diff --git a/.gitignore b/.gitignore index 3ec700458d0a455ed748bb4a6a498a844ae197b8..42240bd35d4a9a631d16da728aa59d45f6f15453 100644 --- a/.gitignore +++ b/.gitignore @@ -9,7 +9,7 @@ Make.dep .*.swp core .gdbinit -cscope.out +/cscope.* /.config /.config.old /.version diff --git a/COPYING b/COPYING index a8113ab027c91b871a68a2632d5f69200e4ca81b..2fcc3edc6addae4a73847bb6371d8297dfa489d2 100644 --- a/COPYING +++ b/COPYING @@ -225,44 +225,3 @@ drivers/video/ov2640 content of those tables and still retain this BSD license. I am guessing so, but I am not a copyright attorney so you should use this driver in products at your own risk. - -apps/netutils/pppd -^^^^^^^^^^^^^^^^^^ - - This implementation of PPPD has a license that is mostly compatible the - NuttX 3-clause BSD license, but includes a fourth clause that required - acknowledgement of Mike Johnson/Mycal Labs if it is built into your - product: - - Copyright (C) 2000, Mycal Labs www.mycal.com - Copyright (c) 2003, Mike Johnson, Mycal Labs, www.mycal.net - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions - are met: - - 1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - 3. All advertising materials mentioning features or use of this software - must display the following acknowledgement: - This product includes software developed by Mike Johnson/Mycal Labs - www.mycal.net. - 4. The name of the author may not be used to endorse or promote - products derived from this software without specific prior - written permission. - - THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/ChangeLog b/ChangeLog index 7722d45c88f9ac0ef6d0c6b0dddf74b1303c16fd..e15bf20e50b65ef62265ccc47d5561cba2288cda 100755 --- a/ChangeLog +++ b/ChangeLog @@ -1676,7 +1676,7 @@ * configs/*/ld.script: Removed 'sh_link not set for section .ARM.edix' for a few of the builds. In you have this warning, it can be removed with the following change to the ld.script file: - + + __exidx_start = ABSOLUTE(.); .ARM.exidx : { - __exidx_start = ABSOLUTE(.); @@ -2004,9 +2004,9 @@ (TWR-K60N512). * drivers/can.c: Fixed a semaphore overflow problem in the CAN driver (reported by Li Zhouy (Lzyy)). - * 8/18/2011: The basic port to the FreeScale Kinetics TWR-K60N512 board is + * 8/18/2011: The basic port to the FreeScale Kinetis TWR-K60N512 board is now functional. - * configs/twr-k60n512: Add Kinetics TWR-K60N512 NSH configuration. + * configs/twr-k60n512: Add Kinetis TWR-K60N512 NSH configuration. * drivers/analog and include/nuttx/analog: Add ADC driver infrastructure and TI ADS1255 driver developed and submitted by Li Zhouy (Lzyy)). * arch/arm/stm32/stm32_sdio.h and drivers/mmcsd/mmcsd.c: Add logic to @@ -3130,7 +3130,7 @@ point numbers. * lib/stdio/lib_libdtoa.c and lib_libvsprintf.c: Correct some floating point options. - * arch/arm/lpc43xx/lpc32_usb0dev.c: Add framework for development of + * arch/arm/lpc43xx/lpc43_usb0dev.c: Add framework for development of an USB0, device-side driver for the LPC43XX. The initial check-in, however, is simply for the LPC31xx driver with name changes. The LPC31xx has the same USB IP, but will require some additional initialization @@ -4374,7 +4374,7 @@ significant amounts of time (2013-03-18). * arch/arm/src/armv7-h/ram_vectors.h, up_ramvec_*.c, arch/arm/src/*/*_irq.c, and Make.defs: Add support for modifiable interrupt vectors in RAM - (2013-03-18). + (2013-03-18). * arch/arm/src/armv7-m/up_exception.S, sam3u/sam3u_vectors.S, and lpc17xx/lpc17_vectors.S: In exception handling with CONFIG_NUTTX_KERNEL, need to explicity set and clear the privilege bit in the CONTROL @@ -4440,7 +4440,7 @@ * binfmt/binfmt_execmodule.c: Here is a place where I forget to update the call to sched_releasetcb() to pass the thread type as the second parameter (2013-03-23). - * arch/arm/src/lm, kinetis, lpc32, and nuc1xx: Add kernel build + * arch/arm/src/lm, kinetis, lpc43, and nuc1xx: Add kernel build support to all ARMv7-M and ARMv6-M chips. There are no configurations in place to to verify these additions! (2013-03-24). @@ -6694,7 +6694,7 @@ * configs/stm3240g-eval/nsh: Configuration converted to use the kconfig-frontends tools (2014-2-28). * configs/*/ostest: Removed most OS test configurations (except in a few - cases where there wass some good argument to retain the ostest + cases where there was some good argument to retain the ostest configuration) (2014-2-28). * configs/stm3240g-eval/nsh2: Configuration converted to use the kconfig-frontends tools (2014-3-1). @@ -10536,8 +10536,7 @@ nuttx/libc/mqueue to nuttx/sched/mqueue. Also add syscall support for mq_setattr() and mq_getattr(). This is necessary in protected and kernel builds because in those cases the message queue structure is - protected and cannot be accessed directly from user mode code. Noted - by Jouko Holopainen (2015-06-03). + protected and cannot be accessed directly from user mode code (2015-06-03). * drivers/net/tun.c: TUN driver bug fix. From Max Neklyudov (2015-06-03. * drivers/net/Kconfig, include/nuttx/net/mii.h, and arch/arm/src/lpc17xx/lpc17_ethernet.c: Add support for the Micrel @@ -10965,7 +10964,7 @@ (2015-09-09). * configs/nucleo-f303re: Support for the STMicro Nucleo F303RE board from Paul Alexander Patience (2015-09-10). - * arch/arm/src/lpc43xx/lpc32_ehci.c and .h: LPC43xx EHCI driver from + * arch/arm/src/lpc43xx/lpc43_ehci.c and .h: LPC43xx EHCI driver from Ilya Averyanov (2015-09-10). * ARMv7-M, all "lazy" interrupt stack logic. Assembly instruction that fetches the saved value is incorrect; replace with more @@ -11586,7 +11585,7 @@ * configs/stm32l476vg-disco: Add support for the STM32L476VG Discovery board. From Dave (2016-03-25). -7.16 2016-xx-xx Gregory Nutt +7.16 2016-06-01 Gregory Nutt * PM: Add activity domain to all PM interfaces and driver callbacks. If CONFIG_PM_NDOMAINS == 1, then the legacy behavior is preserved. If @@ -11615,7 +11614,7 @@ * STM3220G-EVAL: Add support for both the IAR and uVision GCC IDEs From Kha Vo (2016-04-08). * STM32F429I Discovery: Add support for the uVision GCC IDE. From - * Kha Vo (2016-04-08). + Kha Vo (2016-04-08). * libc/signal and include/signal.h: Rename sigset() to signal(). sigset() is the System V function; signal() is the obsoleted POSIX name. These seem to be equivalent. Neither are relevant in modern @@ -11640,7 +11639,7 @@ is interpreted as a packed dual frame exchange. Sebastien Lorquet (2016-04-13). * net/sockets/listen.c and accept.c and include/nuttx/net: Separate - out psock_listen() and psock_accepti() for internal OS usage + out psock_listen() and psock_accept() for internal OS usage (2016-04-14). * fs/inode/, fs/vfs/, and sched/task/: File and socket descriptors are no longer allocated for kernel threads. They must use SYSLOG for @@ -11753,7 +11752,7 @@ * arch/srm/src/stm32l4: Add CAN support for STM32L4. From Sebastien Lorquet (2016-05-19). * arch/arm/src/samv7: Adds a JTAG config and ERASE config to Kconfig to - set the CCFG_SYSIO SYSIO Pins. From Davide Sidrane (2016-05-19). + set the CCFG_SYSIO SYSIO Pins. From David Sidrane (2016-05-19). * arch/sim/src: Enhance networking support for the simulation under Linux. Includes updated support for Linux TUN/TAP, and the addition of support for Linux bridge devices. From Steve (2016-05-20). @@ -11767,7 +11766,7 @@ configurations (2016-05-22). * include/nuttx/crypto/aes.h: Modifications to the crypto API needed for LPC43xx. From Alexander Vasiljev (2016-05-23). - * arch/arm/src/lpc32xx: Add AES support. From Alexander Vasiljev + * arch/arm/src/lpc43xx: Add AES support. From Alexander Vasiljev (2016-05-24). * configs/*/src/tiva_timer.c: Tiva boards: Fix a naming collision, rename board-specific function from tiva_timer_initialize() to @@ -11830,7 +11829,7 @@ * drivers/: Several SPI-based drivers modified. All drivers that use SPI must call SPI_LOCK and SPI_UNLOCK. This is not optional (2016-05-26). - * drivers/sensosrs: Fix a bug in crc computation for ms583730. + * drivers/sensors: Fix a bug in crc computation for ms583730. Implement POSIX read (2016-05-27). * arch/arm/src/samv7: This is a fix to a problem in the handling of the oneshot timer. Due to a wrong assumption concerning the behavior @@ -11842,7 +11841,7 @@ counter register to zero, but the reset of the counter register is not performed instantly. According to the datasheet: "The counter can be reset by a trigger. In this case, the counter value passes to zero on - the next valid edge of the selected clock.” Thus the counter is set to + the next valid edge of the selected clock." Thus the counter is set to zero between 0 and USEC_PER_TICK microseconds after the clock was started. In my fix I use the freerun count value to determine if at least one @@ -11869,3 +11868,2228 @@ are identical (2016-05-29). * arch/arm/src/stm32: Allow to not use all channel in a lower part of PWM. From Pierre-noel Bouteville (2016-05-30). + * libc/math: Add a NAN test on 'x' in asin function of lib_asin.c. + Suggested by Pierre-noel Bouteville (2016-05-31). + * arch/arm/src/stm32: Fix logic in F4 RTCC driver that prevent ALARM + interrupt. From Neil Hancock (2016-05-31). + * arch/arm/src/stm32: Fix STM32 ValueLine ADC IRQ number selection. + From David Sidrane (2016-05-31). + * arch/arm/src/samv7: Fix missing unlock of device in MCAN + mcan_txempty(). From Frank Benkert (2016-06-01). + +7.17 2016-07-25 Gregory Nutt + + * drivers/mtd/flash_eraseall.c: Removed. This is no longer used + in the OS and is simply a wrapper around the MDIOC_BULKERASE + IOCTL command. It used to be called (only) from + apps/system/flash_eraseall, but that has been removed because it + violated the OS/application interface -- by calling flash_eraseall(). + The old code can be found in the Obsoleted' repository (and a revised + version can be found at apps/fsutils/flash_eraseall) (2016-06-03). + * arch/arm/src/stm32: STM32 Timer Driver: Change calculation of per- + timer pre-scaler value. Add support for all timers (2016-6-03) + * drivers/lcd: Correct conditional compilation in ST7565 driver. From + Pierre-noel Bouteville (2016-6-03) + * arch/arm/src/stm32: Correct conditional compilation in STM32 timer + capture logic. From Pierre-noel Bouteville (2016-6-03) + * arch/arm/src/efm32: Fix EFM32 FLASH conditional compilation. From + Pierre-noel Bouteville (2016-6-03) + * arch/arm/src/lpc43xx: Fix errors in GPIO interrupt logic. From v01d + (phreakuencies) (2016-06-04) + * arch/arm/src/kl and lpc11xx: rename xyz_lowputc to up_putc. Remove + all references to up_lowputc, everywhere (2016-06-04). + * configs/stm32f103-minimum: Add minnsh configuration. From Alan + Carvalho de Assis (2016-06-04). + * arch/arm/src/stm32: Add the up_getc() function to STM32 in order to + support the minnsh configuration. From Alan Carvalho de Assis + (2016-06-04). + * include/sys/boardctl.h: Needs to be usable with C++ files (2016-06-05). + * tools/tesbuild.sh will now build NxWM configurations (2016-06-05). + * arch/arm/src/stm32: In PWM driver, just update duty if frequency is + not changed and PSM started. This removeis glitch or blinking when + only duty is frequently changed. From Pierre-noel Bouteville (2016-06-05). + * arch/arm/src/kinetis: Add a USB device controller driver. Derived from + the pic32mx usb driver, which uses the same usb controller. From kfazz + (2016-06). + * configs/teensy-3.x: Add USB support and a usbnsh configuration. From + kfazz (2016-06). + * arch/arm/src/stm32: Add support for the STM32F105R. From Konstantin + Berezenko (2016-06-06). + * include/signal.h: Change type of SIG_ERR, SIG_IGN, ... to + _sa_handler_t. The type void does not work with the IAR toolchain. + From Aleksandr Vyhovanec (2016-06-07). + * configs/nucleo-144: Refactored configs/nucleo-144 sub-directories to + support additional nucleo-144 board. Add support for the Nucleo-F767ZI + board. From David Sidrane (2016-06-07). + * arch/arm/src/stm32f7 and include/stm32f7: Added STM32F76xxx and + STM32F77xx families. From David Sidrane (2016-06-08). + * Refactoring configs/nucleo-144 sub-directories to support additional + nucleo-144 board. Add support for the Nucleo-F767ZI board. From David + Sidrane (2016-06-08). + * include/assert.h: Check if NDEBUG is defined. From Paul Alexander + Patience (2016-06-08). + * arch/arm/src/stm32: Fix STM32 DMA code and configuration for STM32F37X + chips. From Marten Svanfeldt (2016-06-08). + * drivers/mtd: Add a driver of IS25xP SPI flash devices. From Marten + Svanfeldt (2016-06-09). + * arch/arm/src/Kconfig and configs/teensy-3.x: Teensy clock fixes. The + High Gain bit in MCG_C1 was preventing teensy from booting except + after a programming session. The second change doesn't appear to + change any functionality, but complies with restrictions in the k20 + family reference manual on FEI -> FBE clock transiions. From kfazz + (2016-06-09). + * configs/*/include/board.h: Fix timer input clock definitions. From + David Sidrane (2016-06-09). + * Networking: In both IPv6 and IPv4 incoming logic: (1) Should check + if the packet size is large enough before trying to access the packet + length in the IP header. (2) In the comparison between the IP length + and the full packet length, need to subtract the size of the link + layer header before making the comparison or we will get false + positives (i.e., the packet is really too small) (2016-06-09) + * configs/: All configurations that have both CONFIG_NSH_LIBRARY=y and + CONFIG_NET=y must now also have CONFIG_NSH_NETINIT=y (2016-06-09). + * arch/arm/src/kinetis: Kinetis pwm support, based on kl_pwm driver. + From kfazz (2016-06-09). + * arch/srm/src/stm32: Fix compilation errors in debug mode of + stm32_pwm.c. From Konstantin Berezenko (2016-06-09). + * arch/arm/src/kinetis: Support up to 8 channels per timer. From kfazz + (2016-06-09). + * lib/: crc16: fix error. From Paul Alexander Patience (2016-06-10). + * lib/: Add crc64 support. From Paul Alexander Patience (2016-06-10). + * arch/arm/src/kinetis: Added kl_dumpgpio functionality as + kinetis_pindump. From kfazz (2016-06-10). + * arch/arm/src/sam34: Fix some errors in AFEC header file. From + OrbitalFox (2016-06-10). + * arch/arm/include/stm32: Correct the can2 rx irq number for stm32f10xx + chips. From Konstantin Berezenko (2016-06-10). + * drivers/include/input: Button upper half driver: Add definitions + needed for compilation with the poll() interface is not disabled + (2016-06-11). + * Kconfig/, include/debug.h, and many other files: (1) Debug features + are now enabled separately from debug output. CONFIG_DEBUG is gone. + It is replaced with CONFIG_DEBUG_FEATURES. (2) The macros dbg() and + vdbg() have renamed as err() and info(), respectively. This also + applies to all of the variants as well, lldbg(), llvdbg(), XXdbg(), + XXvdbg(), XXlldbg(), and XXllvdbg(). (3) Add a new debug level, + warn() (and all variants vwarn(), llwarn(), etc.). (4) Debug + assertions can now be enabled separately from debug output. (5) You + can now enable subsystem/device driver debug output at different + output levels. For example, CONFIG_DEBUG_FS no longer enables file + system debug output. It enables general file system debug logic and + enables selection of CONFIG_DEBUG_FS_ERROR, CONFIG_DEBUG_FS_WARN, + and CONFIG_DEBUG_FS_INFO (2016-06-12). + * strtoul() and strtoull(): Fix errno settings required by function + definition. Resolved Bitbucket Issue #1. From Sebastien Lorquet + (2016-06-13) + * arch/arm/src/stm32f7: Add SPI driver. DMA not yet supported. From + David Sidrane (2016-06-14). + * configs/nucleo-144: Add test for STM32 F7 SPI. From David Sidrane + (2016-06-14). + * alert(): New debug macro: alert(). This is high priority, + unconditional output and is used to simplify and stanardize crash + error reporting(2016-06-14). + * arch/arm/src/tiva: Bug Fix in tiva_serial.c - UART5, UART6 and UART7 + were not being configured as TTYS0 for printing over serial console. + From Shirshak Sengupta (2016-06-14). + * SAMV7: SPI: SPI-Freq. 40MHz; VARSELECT; hw-features + This change adds the following improvements: + - Increase the allowed SPI-Frequency from 20 to 40 MHz. + - Correct and rename the "VARSELECT" option + This option was included in the code as "CONFIG_SPI_VARSELECT" but + nowhere defined in a Kconfig file. The change renames it to + "CONFIG_SAMV7_SPI_VARSELECT" and corrects the implementation + according the datasheet of Atmel. In short, this option switches + the processor from "fixed peripheral selection" (single device) to + "variable peripheral selection" (multiple devices on the bus). + - Add a new Function to the interface to control the timing and delays + of the chip according the ChipSelect lines. This function can + control the delay between the assertion of the ChipSelect and the + first bit, between the last bit and the de-assertion of the + ChipSelect and between two ChipSelects. This is needed to tune the + transfer according the specification of the connected devices. + - Add three "hw-features" for the SAMV7, which controls the behavior + of the ChipSelect: + - force CS inactive after transfer: this forces a (short) + de-assertion of the CS after a transfer, even if more data is + available in time + - force CS active after transfer: this forces the CS to stay active + after a transfer, even if the chip runs out of data. + Btw.: this is a prerequisit to make the LASTXFER bit working at all. + - escape LASTXFER: this suppresses the LASTXFER bit at the end of the + next transfer. The "escape"-Flag is reset automatically. + From Frank Benkert (2016-06-14) + * Many CONFIG_DEBUG_* options did not have matching macros defined in + include/debug.h. Rather, there were various definitions scattered + throughout the sourse tree. These were collected together and + centralized with single macro definitions in include/debug.h + (2016-06-15) + * STM32F7: Add SPI, I2C, and ADC drivers. From Lok Tep (2016-06-15). + * err(), warn(), info(), and alert() renamed to include leading '_'. + This was done to avoid some naming collisions (2-06-16 + * STM32: Move backup domain reset to to earlier in the initialization + sequence (stm32_rcc.c() in order to avoid disabling LSE during RTC + initialiation. From Alan Carvalho de Assis (2016-06-16). + * SYSLOG: syslog() will now automatically redirect output to lowsyslog() + if called from an interrupt handler (2016-06-16). + * STM32: When configuring a GPIO via stm32_configgpio() the function + will first set the mode to output and then set the initial state of + the gpio later on. If you have an application with an externaly + pulled-up pin, this would lead to a glitch on the line that may be + dangerous in some applications (e.G. Reset Line for other chips, + etc). This changes sets the output state before configuring the pin + as an output. From Pascal Speck (2016-06-17). + * STM32 F7: Apply Pascal Speck's GPIO STM32 change to STM32 L4 + (2016-06-17). + * STM32 L4: Apply Pascal Speck's GPIO STM32 change to STM32 L4. + From Sebastien Lorquet (2016-06-17). + * Review all uses of *err(). These macro family should indicate only + error conditions. Convert *err() to either *info() or add ERROR:, + depending on if an error is reported (2016-06-17). + * STM32F7: Review, correct, and update I2C, SPI, and ADC drivers. From + David Sidrane (2016-06-17). + * LPC17 Ethernet: Needs to correctly ignore PHYID2 revision number + when comparing PHY IDs (2016-06-18). + * SYSLOG: Consolidate all SYSLOG logic in drivers/syslog. Add an + abstraction layer that supports: (1) redirection of SYSLOG outpout. + This is usually so that you can boot with one SYSLOG output but + transition to another SYSLOG output when the OS has initialialized, + (2) adds common serialization of interrupt output as a configuration + option. Without this configuration setting, interrupt level output + will be asynchronous. And (3) vsyslog is now a system call and is + usable with other-than-FLAT builds (2016-06-19). + * TCP Networking: While working with version 7.10 I discovered a + problem in TCP stack that could be observed on high network load. + Generally speaking, the problem is that RST flag is set in + unnecessary case, in which between loss of some TCP packet and its + proper retransmission, another packets had been successfully sent. + The scenario is as follows: NuttX did not receive ACK for some + sent packet, so it has been probably lost somewhere. But before + its retransmission starts, NuttX is correctly issuing next TCP + packets, with sequence numbers increasing properly. When the + retransmission of previously lost packet finally succeeds, tcp_input + receives the accumulated ACK value, which acknowledges also the + packets sent in the meantime (i.e. between unsuccessful sending of + lost packet and its proper retransmission). However, variable unackseq + is still set to conn->isn + conn->sent, which is truth only if no + further packets transmission occurred in the meantime. Because of + incorrect (in such specific case) unackseq value, few lines further + condition if (ackseq <= unackseq)is not met, and, as a result, we + are going to reset label. From Jakub Łągwa (2016-06-20). + * SYSLOG: Remove lowsyslog(), vlowsyslog(), and associated macros + *llinfo(), *llwarn(), and llerr(). In the redesigned syslog() logic, + these serve no purpose (2016-06-20). + * Make system: Need to build the drivers/ directory even it file + descriptors are not supported. There are things in the drivers/ + directory that are still needed (like SYSLOG logic) (2016-06-20). + * assert.h: Define static assert for C++ usage. From Paul Alexander + Patience (2016-06-21). + * arch/arm/src/stm32l4: Add ioctls to set/get bit timing in stm32l4. + Add ioctl hooks to allow future management of can id filters. From + Sebastien Lorquet (2016-06-21). + * drivers/can.c: Add support for poll. From Paul Alexander Patience + (2016-06-21). + * drivers/syslog: Extend SYSLOG logic so that we can send SYSLOG output + to a file. Not verified on initial commit (2016-06-21). + * arch/arm/src/stm32l4: Add some CAN mode IOCTL calls. These will be + useful for device autotest when the application boots. They are + redundant with the CONFIG_CAN_LOOPBACK option, which can now just be + interpreted as a default setting. From Sebastien Lorquet (2016-06-22). + * drivers/syslog: syslog_dev_flush() needs to check if the inode is a + mountpoint before calling the flush() method. Noted by David Sidrane + (2016-06-22). + * arch/arm/src/stm32f7: Adds SDMMC1 for stm32F7 74-75. From Lok Tep + (2016-06-22). + * drivers/syslog: SYSLOG character device channel will now expand LF to + CR-LF. Controllable with a configuration option (2016-06-22). + * arch/arm/src/stm32l4: Implementation of loopback IOCTLs. From + Sebastien Lorquet (2016-06-22). + * Documentation: Add SYSLOG documentation to the porting guide + (2016-06-22). + * configs/stm32f746g-disco: Removed knsh configuration it failed to + refresh (via tools/refresh.sh). I assume that it is a hand-edited + configuration and, hence, must be removed from the repository + (2016-06-23). + * arch/arm/arc/sam34: DAC bugfix: DACC_WPMR_WPKEY_MASK -> DACC_WPMR_WPKEY. + Timer bugfix: Fix ops check in TCIOC_STOP. From Wolfgang Reissnegge + (2016-06-23). + * configs/nucleo-144: Added SDMMC support to Nucleo-144. From David + Sidrane (2016-06-23). + * arch/arm/src/stm32: Port STM32L4 CAN IOCTLs to STM32. From Sebastien + Lorquet (2016-06-24). + * drivers/ioexpander: Add support for a very simple GPIO driver. It + supports only pre-conrigured input and output pins and only basic + input and output operations (2016-06-24). + * arch/arm/src/lpc43xx: Correct auto-negotiation mode in the LPC43xx + Ethernet. From Alexander Vasiljev (2016-06-24) + * arch/arm/src/samv7: TWIHS Driver improved and GPIO-Driver fixed for + Open-Drain Pins + - sam_gpioread: Now the actual line level from the pin is read back. + This is extremely important for Open-Drain Pins, which can be used + bidirectionally + - Re-Implemented twi_reset-function and enhanced it so it can be + called from inside the driver (see next point) + - Glitch-Filter: Added a configuration option to enable the twi-built- + in glitch filter + - Added a "Single Master Mode": In EMC Testing the TWI-Bus got stuck + because the TWI-Master detected a Multi-Master access (but there is + no second master). With the option "Single Master" we detect these + events and automatically trigger a twi_reset. We also do an + automatic recovery if a slave got stuck (SDA stays low). + With the above changes I²C-Bus reliability in harsh environments (eg. + EMC) is greatly improved. The small change in the GPIO-Driver was + necessary because otherwise you cannot read back the correct line + status of Open-Drain Outputs and this is needed by the twi_reset + function. From Michael Spahlinger (2016-06-24) + * arch/arm/src/stm32f7: BUGFIX:PLLs IS2 and SAI P Calculation. From + David Sidrane (2016-06-24). + * arch/arm/src/stm32f7: USB support. From Lok Tep (2016-06-27). + * configs/olimex-stm32-e407: Add support for Olimex STM32 E407 + board. From Mateusz Szafoni (2016-06-27). + * drivers/ioexpander: Shadow-Mode: The output- and configuration + registers of the IO-Expander are held in the microcontrollers memory + and only written to the IO-Expander. This reduces bus traffic and + is more error-proof than the normal read-modify-write operation. Retry + Mode: If enabled and an error occurs while writing to the IO-Expander + the current transmission is automatically repeated once. From Michael + Spahlinger (2016-06-27). + * libc/hex2bin: Move the portable library portion of apps/system/hex2bin + to nuttx/libc/hex2bin where it can be shared with the OS internals + (2016-06-27). + * configs/nucleo-144: Added USB OTG device to Nucleo-144. From David + Sidrane (2016-06-27). + * arch/arm/src/stm32l4: STM32 CAN fixes need to be backported to + STM32L4 as well (2016-06-27). + * ARM stack check: Fix double fault on IDLE task with stack size = 0. + From David Sidrane (2016-06-27). + * configs/nucleo-144: Added bbsram test to Nucleo-144. From David + Sidrane (2016-06-27). + * arch/arm/src/stm32f7: Added PWR, RTC, and BBSRAM support for stm32f7. + From David Sidrane (2016-06-27). + * Build system: Fixed build of SAMV71-XULT/nsh. With the changes from + 26f7b8c the build process of the default configuration did not succeed + anymore. From Michael Spahlinger (2016-06-28). + * sched/semaphore: Need to set errno to EINVAL on errors in sem_post() + and sem_wait(). From Paul Alexander Patience (2016-06-28). + * Build system: This change fixes a build problem that only occurs when + reconfiguring from Linux to Windows or vice-versa. It is a problem + that was present but not usually experienced until two things happened: + (1) The pre_config target was added to run before the menconfig + operation and (2) the context target was added before the pre_config + target in order to set up the correct symbolic links (in the apps/platform + directory) needed by the pre_config target. + But then now if you start with a Linux system and run 'make menuconfig' + to switch to Linux, the context target will execute first and set up + POSIX style symbolic links before doing the menuconfig. Then after the + menuconfig, the make will fail on Windows if you are using a Windows + native toolchain because that native toolchain cannot follow the Cygwin- + style symbolic links. + The fix here is to also execute the clean_context AFTER executing + menuconfig. A lot more happens now: It used to be that doing 'make + menuconfig' only did the menuconfig operation. Now it does context, + pre_config, menuconfig, clean_context. Not nearly as snappy as it used + to be (2016-06-28). + * arch/arm/src/efm32, lcp43, stm32, stm32l4: disable interrupts with + NVIC_IRQ_CLEAR. From Paul Alexander Patience (2016-06-28). + * arch/arm/src/stm32f7: STMF7xxx RTC: (1) Remove proxy #defines, (2) + Ensure the LSE(ON) etal are set and remembered in a) A cold start + (RTC_MAGIC invalid) of the RTC, and b) A warm start (RTC_MAGIC valid) + of the RTC but a clock change. The change was needed because in bench + testing a merge of the latest's STM32 53ec3ca (and friends) it became + apparent that the sequence of operation is wrong in the reset of the + Backup Domain in the RCC code. PWR is required before the Backup + Domain can be futzed with. !!!This Code should be tested on STM32 and + if needed rippled to the STM32 families. From David Sidrane + (2016-06-28). + * arch/arm/src/stm32f7: Added STMF7xxx RTC. From David Sidrane + (2016-06-28). + * arch/arm/src/stm32: STM32 BBSRAM fixed (and formatted) flags. From + David Sidrane (2016-06-28). + * arch/arm/src/stm32f7: STM32F7 BBSRAM fixed (and formatted) flags. + From David Sidrane (2016-06-28). + * arch/arm/src/stm32f7: Added STM32F7 DBGMCU. From David Sidrane + (2016-06-28). + * arch/arm/src/samv7: SAMV7: CAN Message Filtering fixed: (1) stdfilters + didn't work because the filter was never enabled (wrong number of bits + to shift), and (2) Filters were never used because the configuration + register cannot be written without using the initialization mode. + Both bugs are fixed by this change. Filtering has been tested with + both standard and extended identifiers and is now working properly. + From Michael Spahlinger (2016-06-29). + * configs/Kconfig and dummy/: Add logic to support custom board + directories that include a Kconfig file. During the context phase + of the build, any Kconfig file in the custom board directory is copied + into configs/dummy, replacing the existing Kconfig file with the + target Kconfig file (2016-06-29). + * arch/arm/src/stm32l4: Port support for both RX FIFOs from STM32 CAN. + From Paul Alexander Patience (2016-06-29). + * Remove all inclusion of header files from the apps/include directory. + This caused a lot of reshuffling of logic: binfmt pcode support, + usbmonitor is now a kernel thread, TZ/Olson database moved to + libc/zoneinfo (2016-06-29). + * drivers/mtd: Several MTD FLASH drivers nullify the freed 'priv' + structure and failed to return NULL as stated in the comments. + Result, will operate on a NULL pointer later. Noted by David Sidrane + (2016-06-30). + * arch/arm/src/kinetis: Add basic support for the K64 family. I + leveraged the changes from https://github.com/jmacintyre/nuttx-k64f + and merged into the existing kinetis code with a lot of changes and + additions (like pin multiplexing definitions). (2016-07-01). + * configs/freedom-k64f: Add support for the NXP Freedom-K64F board. + This is primarily the work of Jordan Macintyre. I leveraged this + code from https://github.com/jmacintyre/nuttx-k64f but with + significant corrections (LEDs, buttons, README, etc) and extensions + and updates to match more recent BSPs (2016-07-01). + * libc/signal: Add raise() (2016-07-04). + * drivers/syslog: Add a SYSLOG character device that can be used to re- + direct output to the SYSLOG (2016-07-05). + * net/netdev: Break out internal interface psock_ioctl() (2016-07-06). + * configs/stm32f4disovery: add can driver for stm32f4discovery. From + Matthias Renner (2016-07-06). + * configs/freedom-k64f: Increase MCU clock to 120MHz (2016-07-06). + * arch/arm/src/stm32: Add support for Tickless mode (two timer + implementation). From Max Neklyudov (2016-07-06). + * drivers/usbdev: cdcacm_unbind leaks write request objects. This + arises due to freeing the bulk IN endpoint before the loop that + frees the requests via cdcasm_freereq. That function checks the + parameters and skips the freeing if either is NULL. Freeing the bulk + IN enpoint will cause the first param to be NULL, thereby bypassing + the free operation. To fix, I moved the release of the bulk IN + endpoint until after to loop (much as was the case for the OUT and + read requests, which did not exhibit the problem). From ziggurat29 + (2016-07-07). + * arch/arm/src/stm32l4: Update usb dev/host controller drivers to + reflect new(ish) logging standards; augment device enpoint and fifo + allocation #defines to do more sanity checking, and be automatically + adaptive to size changes. Update README.txt to reflect current status + of the implementation. From ziggurat29 (2016-07-07). + * arch/arm/src/stm32f7: Fixed STM32F7 DMA stm32_dmacapable. DMA working + on SDMMC. From David Sidrane (2016-07-07). + * configs/stm32f4discovery: add configuration files for canard. From + Matthias Renner (2016-07-08). + * drivers/pipe: Add missing configuration for pipe ring buffer size. + From Frank Benkert (2016-07-08). + * STM32L4: Fix incorrect clock setup for LPTIM1. From ziggurat29 + (2016-07-08). + * nucleo-l476rg and stm32lf76vg-disco: Define timer clock frequencies on + STM32L4-based boards. From ziggurat29 (2016-07-08). + * STM32L4: Add support for tickless OS, and incidentally timers, pwm, + oneshot, free-running.... From ziggurat29 (2016-07-08). + * SAM3/4 I2C: Fix reversed logic in twi_startmessage(). From Wolfgang + Reissnegger (2016-07-09). + * VFS ioctl(). Per comments from David Sidrane, file_ioctl() should not + return succeed if the ioctl method is not supported. It probably + should return ENOTTY in that case (2016-07-09). + * libm: This change should significantly improve the performance of + single precision floating point math library functions. The vast + majority of changes have to do with preventing the compiler from + needlessly promoting floats to doubles, performing the calculation + with doubles, only to demote the result to float. These changes only + affect the math lib functions that return float. From David Alessio + (2016-07-11). + * STM32F4 Discovery: Add FPU support for ostest for the STM32F4Discovery + platform. From David Alessio (2016-07-11). + * Build system: Remove the includes/apps link to apps/include. It is + no longer used. From Sebastien Lorquet (2016-07-11). + * printf(): If there are no streams, let printf() fall back to use + syslog() for output (2016-07-11). + * Qemu-i486: Fix qemu-i486/ostest/Make.defs test for M32. From Heath + Petersen (2016-07-12). + * UART 16550: Handle when CONFIG_SERIAL_UART_ARCH_IOCTL is not enabled. + From Heath Petersen (2016-07-12). + * Kinetis Ethernet: Add support for the KSZ8081 PHY (2016-07-12). + * SST26 Driver: Before accessing the sst26 flash, the "Global Unlock" + command must me executed, which I do in the sst26 driver. BUT re- + reading the datasheet, the WREN instruction is required to enable the + execution of this command. This was not done. I have no idea how the + driver currently works except by chance. The writes should never + happen at all, the flash is half-enabled! From Sebastien Lorquet + (2016-07-12). + * Freedom K64F: Add a networking NSH configuration. (2016-07-12). + * N25Qxx Driver: Alter the notion of 'blocksize' to be equivalent to + 'flash write page size' in order to align with assumptions in the + smartfs driver (at least, maybe other things do as well). Correct a + bug that was previously masked by having blocksize=eraseblocksize + which would cause buffer overflows and delicious hardfaults. Trivial + spelling changes in comments, etc. From ziggurat29 (2016-07-12). + * STM32L476 Discovery: Update stm32l476 disco to include init code for + smartfs and nxffs for cases where those fs are included in build. + From ziggurat29 (2016-07-12). + * Kinetis Ethernet and Freedom-K64F: Freedcom-K64F PHY address was + wrong. Modified Ethernet driver to try all PHY addresses and then + only fail if the driver cannot find a usable PHY address. MDIO pin + must have an internal pull-up on the Freedom-K64F (2016-07-12). + * Kinetis Ethernet: Add support for CONFIG_NET_NOINTS (2016-07-12). + * SmartFS: Fix a 32-byte memory leak. From Ken Pettit (2016-07-12). + * Freedom-K64F: SDHC is now enabled in the nsh configuration (but does + not work)Add hooks for automounter; Change NSH configuration to use + Windows (2016-07-13). + * SAMV7 USBHS Device: This change solves a problem which causes data + loss while sending data via USB. This problem is caused by an incorrect + handling of the endpoint state in the USB driver sam_usbdevhs. This + leads under some circumstances to situations in which an DMA transfer + is setup while a previous DMA transfer is currently active. Amongst + other things I introduced the new endpoint state USBHS_EPSTATE_SENDING_DMA + for the fix. To reproduce the problem, I used a program which send as + many data as possible via a CDC/ACM device and verified the received + data on the PC. From Stefan Kolb (2016-07-13). + * STM32: Fix bug in oneshot timer. From Max Neklyudov (2016-07-13). + * STM32L4: Port foward bugfix from stm32 of oneshot timer. From + ziggurat29 (2016-07-13). + * STM32 and EFM32: I'm using syslog through ITM. In this case + syslog_channel function is call before RAM initialisation in + stm32_clockconfig. But syslog channel uses a global variable that is + reset to default by the RAM initialization. From Pierre-noel + Bouteville (2016-07-14). + * LPC43xx SPIFI: If CONFIG_SPIFI_SECTOR512 undefined, lpc43_bwrite + doesn't do actual write (probably copy/paste errors). Still not sure + about current state of lpc43_spifi implementation, but for me NXFFS + works with this patch. From Vytautas Lukenskas (2016-07-14). + * SMART MTD layer: Fixes freesector logic error when sectorsPerBlk=256, + adds DEBUGASSERT for invalid geometry and additional memory debug + logic. Also fixes the dangling pointer on error bug. From Ken + Pettit (2016-07-14). + * arch/arm/src/lpc43xx: Extend LPC43xx EMC code to support SDRAM on a + dynamic memory interface. From Vytautas Lukenskas (2016-07-19). + * arch/sim/src: Add the simulated QSPI (N25Q) flash to the simulation + and modify sim up_spiflash.c to enable it to run with different MTD + drivers based on config options (currently m25p, sst26 and w25). + From Ken Pettit (2016-07-19). + * drivers/pipe: Add support to allocating different sizes for pipe and + fifo buffers. Adds mkfifo2() and pipe2() which are just like mkfifo() + and pipe(), but allow control of the size of the underlying, in-memory + circular buffer . Move pipe() and mkpipe() to nuttx/libc, they are no + longer core OS interfaces. Capability currenty used only by PTY logic + to support, configurable, smaller buffers for PTYs (2016-07-19). + * include/nuttx/drivers: Move driver-related files from include/nuttx + to include/nuttx/drivers. Move driver related prototypes out of + include/nuttx/fs/fs.h and into new include/drivers/drivers.h + (2016-07-20). + * include /nuttx/lib: Move library-related files from include/nuttx to + include/nuttx/lib (2016-07-21). + * drivers/serial/serial.c: Fix a race condition noted by Stefan Kolb. + Between the test if the TX buffer is full and entering a critical + section, bytes may be removed from the TX buffer making the wait + unnecessary. The unnecessary wait is an inefficiency, but not really + a problem. But with USB CDC/ACM it can be a problem because the + entire TX buffer may be emptied when we lose the race. If that + happens that uart_putxmitchar() can hang waiting for data to be + removed from an empty TX buffer (2016-07-22). + * arch/arm/src/stm32 and stm32l4: STM32 F4/L4 RTC ALARM: were enabling + interrupts too early in the power-up sequence, BEFORE the interrupt + system was being initialized (2016-07-23). + * drivers/ioexpander: GPIO driver: Add support for receiving signals + from interrupt pins (2016-07-23). + * drivers/usbdev: USBMSC: Add locks when removing request from queue. + From Wolfgang Reissnegger (2016-07-23). + * drivers/usbdev: USBMSC: Fix reversed logic on waiting for SCSI thread + start. The scsi thread was waiting for the wrong condition. However, + this was masked by the fact that the code creating the scsi thread was + also holding usbmsc_scsi_lock(priv) while initializing data, hence + this lock synchronized the scsi thread start with init completion. + From Wolfgang Reissnegger (2016-07-23). + * arch/arm/src/sam34: SAM3/4 UDP: Fix handling of endpoint RX FIFO + banks. This fixes a race condition where the HW fills a FIFO bank + while the SW is busy, resulting in out of sequence USB packets + (2016-07-23). + * Freedom-K64F: Add PWM support. From Jordan MacIntyre (2016-07-25). + +7.18 2016-10-08 Gregory Nutt + + * drivers/serial/pty.c, serial.c, usbdev/cdcacm.c, include/nuttx/fs/ioctl.h: + Fix FIONWRITE and add FIONSPACE. All implementations of FIONWRITE + were wrong. FIONWRITE should return the number of bytes waiting in + the outgoing send queue, not the free space. Rather, FIONSPACE should + return the free space in the send queue (2016-07-25). + * lib_dumpbuffer: Now prints a large on-stack buffer first to avoid + problems when the syslog output is prefixed with time. From Pierre- + noel Bouteville (2016-07-27). + * sched/clock and sched/sched: Add standard adjtime() interface and + basic timekeeping support. Normally used with an NTP client to keep + system time in synchronizationi. From Max Neklyudov (Merged on + 20160-07-28). + * arch/arm/src/stm32: Add timekeeping support for the STM32 tickless + mode. From Max Neklyudov (Merged on 20160-07-28). + * Top-Level Makefiles. Fix a chicken-and-egg problem. In the menuconfig + target, the context dependency was executed before kconfig-mconf. + That was necessary because the link at apps/platform/board needed to + be set up before creating the apps/Kconfig file. Otherwise, the + platform Kconfig files would not be included. But this introduces + the chicken-and-egg problem in some configurations. + In particular: (1) An NX graphics configuration is used that requires + auto-generation of source files using cpp, (2) the configuration is + set for Linux, but (3) we are running under Cygwin with (4) a Windows + native toolchain. In this case, POSIX-style symbolic links are set + up but the Windows native toolchain cannot follow them. + The reason we are running 'make menuconfig' is to change from Linux + to Cygwin, but the target fails. During the context phase, NX runs + CPP to generate source files but that fails because the Windows native + toolchain cannot follow the links. Checkmate. + This was fixed by changing all of the make menuconfig (and related) + targets. They no longer depend on context being run. Instead, they + depend only on the dirlinks target. The dirlinks target only sets + up the directory links but does not try to run all of the context + setup; the compiler is never invoked; no code is autogeneraed; and + things work (2016-07-28). + * tools/refresh.sh: Recent complexities added to apps/ means that + configuration needs correct Make.defs file in place in order to + configure properly (2016-07-28). + * tools/kconfig2html.c: Update to handle absolute paths when sourcing + Kconfig files (2016-07-29). + * libc/math: This fixes the following libc/math issues: (1) asin[f l]() + use Newton’s method to converge on a solution. But Newton’s method + converges very slowly (> 500,000 iterations) for values of x close + to 1.0; and, in the case of asinl(), sometimes fails to converge + (loops forever). The attached patch uses an trig identity for + values of x > sqrt(2). The resultant functions converge in no more + than 5 iterations, 6 for asinl(). (2) The NuttX erf[f l]() functions + are based on Chebyshev fitting to a good guess. The problem there’s a + bug in the implementation that causes the functions to blow up with x + near -3.0. This patch fixes that problem. It should be noted that + this method returns the error function erf(x) with fractional error + less than 1.2E-07 and that’s fine for the float version erff(), but + the same method is used for double and long double version which + will yield only slightly better precision. This patch doesn't address + the issue of lower precision for erf() and erfl(). (3) a faster + version of copysignf() for floats is included. From David S. Alessio + (2016-07-30). + * I/O Expander: Remove hard-coded PCA9555 fields from ioexpander.h + definitons. Add support for an attach() method that may be used when + any subset of pin interrupts occur (2016-07-31). + * PCA9555 Driver: Replace the signalling logic with a simple callback + using the new definitons of ioexpander.h. This repartitioning of + functionality is necessary because (1) the I/O expander driver is the + lower-lower part of any driver that uses GPIOs (include the GPIO + driver itself) and should not be interacting directly with the much + higher level application layer. And (2) in order to be compatible + with the GPIO driver (and any arbitrary upper half driver), the + PCA9555 should not directly signal, but should call back into the + upper half. The upper half driver that interacts directly with the + application is the appropriate place to be generating signal + (2016-07-31). + * drivers/ioexpander/skeleton.c: Add a skeleton I/O Expander driver + (based on the PCA9555 driver) (2016-07-31). + * I/O Expander Interface: Encode and extend I/O expander options to + include interrupt configuration (2016-07-31). + * drivers/ioexpander: Add an (untested) TCA64XX I/O Expander driver + leveraged from Project Ara (2016-07-31). + * I/O Expander Interface: Add argument to interrupt callback. Add a + method to detach the interrupt (2016-08-01). + * drivers/ioexpander: Add a GPIO lower-half driver that can be used to + register a GPIO character driver for accessing pins on an I/O expander + (2016-08-01). + * drivers/ioexpander: Add PCF8574 I/O Expander driver. Some cleanup + also of other expander drivers (2016-08-01). + * drivers/ioexpander: GPIO driver: Add IOCTLs to get the pin type and + to unregister a signal handler (2016-08-01). + * configs/sim: Add simulator-based test support for apps/examples/gpio + 2016-08-01). + * drivers/sensors: Add KXTJ9 Accelerometer driver from the Motorola + Moto Z MDK (2016-08-02). + * arch/arm/sim: Add a simulated I/O Expander driver (2016-08-03). + * configs/sim: Add logic to set the simulated I/O expander for testing + with apps/examples/gpio (2016-08-03). + * fs/fat: FAT performance improvement. In large files, seeking to a + position from the beginning of the file can be very time consuming. + ftell does lssek(fd, 0, SET_CURR). In that case, that is wasted time + since we are going to seek to the same position. This fix short- + circutes fat_seek() in all cases where we attempt to seek to current + position. Suggested by Nate Weibley (2016-08-03). + * tools/sethost.sh: Add sethost.sh. This is a script that you can use + to quickly change the host platform from Linux to Windows/Cygwin. + Might save you a lot of headaches (2016-08-03). + * arch/arm/src/tiva: Add tiva PWM lower-half driver implementation. + From Young (2016-08-05). + * drivers/spi/spi_transfer.c: Add a helper function that encapsulates + and manages a sequence of SPI transfers (2016-08-05). + * drivers/spi: Add an SPI character driver that will permit access to + the SPI bus for testing purposes. This driver is a simple wrapper + around spi_transfer() (2016-08-05). + * drivers/wireless: Add MFRC522 RFID ISO14443 and Mifare transceiver + driver. From Alan Carvalho de Assis (2016-08-06). + * configs/stm32f103-minimum: Add board support to MFRC522 driver. From + Alan Carvalho de Assis (2016-08-06). + * arch/renesas: Rename arch/sh to arch/renesas (2016-08-06). + * arch/arm/src/efm32, stm32, stm32l4: STM32 and EFM32 SPI drivers + adopted an incompatible conventions somewhere along the line. The + set the number of bits to negative when calling SPI_SETBITS which had + the magical side-effect of setting LSB first order of bit + transmission. This is not only a hokey way to pass control + information but is supported by no other SPI drivers. This change + three things: (1) It adds HWFEAT_LSBFIRST as a new H/W feature. + (2) It changes the implementations of SPI_SETBITS in the STM32 and + EFM32 derivers so that negated bit numbers are simply errors and it + adds the SPI_HWFEATURES method that can set the LSB bit order, and + (3) It changes all calls with negative number of bits from all + drivers: The number of bits is now always positive and SPI_HWFEATURES + is called with HWFEAT_LSBFIRST to set the bit order (2016-08-08). + * arch/arm/src/stm32: Add missing SPI2 and SPI3 support for STM32F3F3. + Add STM32F37XX DMA channel configuration. For STM32F37XX, + SYSCFG_EXTICR_PORTE defined twice. From Alan Carvalho de Assis + (2016-08-08). + * arch/arm/src/stm32: Make stm32_pwr_enablebkp thread safe. From + Max Neklyudov (2016-08-09). + * arch/arm/src/stm32: SAM3/4 GPIO: Enable peripheral clock for GPIO port + when GPIO is configured as input. The value of a GPIO input is only + sampled when the peripheral clock for the port controller the GPIO + resides in is enabled. Therefore we need to enable the clock even when + polling a GPIO. From Wolfgang Reissnegger (2016-08-09). + * arch/arm/src/tiva: Fix two bugs of tiva pwm lower-half driver + implementation. From Young (2016-08-10). + * sched/group: Explicitly initialize the group tg_exitsem with + sem_init(). The existing logic worked because the correct + initialization value is all zero, but it is better to initialize the + semaphore explicitly (2016-08-10). + * arch/arm/stm32: Fix bad pllmul values for STM32F1XX connectivity line. + STM32F1XX connectivity line supports only x4, x5, x6, x7, x8, x9 and + x6.5 values. From Michał Łyszczek (2016-08-11). + * include/nuttx/timers: Add oneshot timer lower half interface + (2016-08-11). + * arch/arm/src/stm32: Add a experimental oneshot, lower-half driver for + STM32 (2016-08-11). + * arch/arm/src/samv7: Add option to support oneshot timer without free- + running timer. Add oneshot lower half driver (2016-08-11). + * arch/arm/src/sama5: Add option to support oneshot timer without free- + running timer. Add oneshot lower half driver (2016-08-11). + * arch/arm/src/sam34: SAM4CM: Add option to support oneshot timer without + free-running timer. Add oneshot lower half driver (2016-08-11). + * arch/arm/src/stm32l4: Add oneshot lower half driver (2016-08-11). + * libc/stdlib: strtod() was not returning endptr on error conditions + (2016-08-11). + * libc/math: floor(), floorf(), and floorl(): Fix logic error. Was not + correctly handling negative integral value (2016-08-11). + * configs/sim: Add a configuration useful for testing Mini Basic + (2016-08-12). + * drivers/timers: Add an upper-half, oneshot timer character driver + (2016-08-12). + * arch/sim/src: Add a simulated oneshot lowerhalf driver (2016-08-12). + * arch/arm/src/stm32: STM32F3 SPI: Fix the number of bit setting for + the F3. That and data packing work differently on the STM32F3 than + for other STM32 parts (2016-08-12). + * arch/arm/stm32 and stm32l4: Enabling SPI DMA loses other bits in CR2 + (2016-08-13). + * arch/arm/src/stm32: STM32F3 SPI: Cannot write always 16-bit value to + DR register because of how the F3 implements data packing (2016-08-13). + * Kinetis: Add support for I2C and RTC. From v01d (phreakuencies) + (2016-08-13). + * teensy 3.x i2c. From v01d (phreakuencies) (2016-08-13). + * SH1106 0.96 OLED module support (SSD1306 compatible) + I2C fixes. + From v01d (phreakuencies) (2016-08-13). + * Add support for SAMV7 DACC module. From iotr Mienkowski (2016-08-15). + * Add oneshot board initialization to stm32f103-minimum. From Alan + Carvalho de Assis (2016-08-15). + * drivers/audio/tone.c: Add Audio Tone Generator for NuttX. From Alan + Carvalho de Assis (2016-08-16). + * configs/stm32f103-minimum: Add board configuration to initialize Audio + Tone Generator. From Alan Carvalho de Assis (2016-08-16). + * STM32F411 and STM32F446 map i2c2_sda_4 to different alternate function + numbers. From Konstantin Berezenko (2016-08-17). + * STM32 DMA Fix: Change stm32 adc dma callback to send channel number + instead of index. From Konstantin Berezenko (2016-08-17). + * SAMA5: Add missing oneshot max_delay method (2016-08-18). + * configs/stm32bufferfly2: Add support for the Kamami stm32butterfly2 + development board with optional ETH phy. From Michał Łyszczek + (2016-08-19). + * libc/misc: Separate XorShift128 PRNG from /dev/urandom and make it + generally available (2016-08-20). + * sched/sched_cpuload_oneshot: Use the oneshot timer with optional + entropy to measure cPU load if so configured (2016-08-20). + * drivers/usbhost/usbhost_composite.c: An an EXPERIMENTAL prototype of + how USB host support for composite devices might be implemented. This + feature is EXPERIMENTAL because (1) it is untested and (2) has some + know design issues that must be addressed before it can be of use + (2016-08-28). + * CXXFLAGS: add -fcheck-new whenever -fno-exceptions is used. From Beat + Küng (2016-08-23). + * tools/mkfsdata.pl was still generating the old-style apps/include + inclusion paths (2016-08-23). + * drivers/sensors: Add drvier for the LIS3MDL 3 axis magnetometer. From + Alexander Entinger (2016-08-23). + * drivers/sensors: Add driver for the MLX90393 3 axis magnetometer. + From Alexander Entinger (2016-08-23). + * drivers/mtd: Add Fujistu MB85RS256B ramtron support. From Beat Küng + (2016-08-23). + * drivers/sensors: Add driver for the LIS3DSH 3 axis accelerometer. From + Alexander Entinger (2016-08-24). + * drivers/sensors: Add driver for the Bosch BMG160 3 axis gyroscope. + From Alexander Entinger (2016-08-24). + * STM32: Add IAR-style STM32F1xx vectors. Tested on STM32F103RB and + STM32F107RC. From Aleksandr Vyhovanec (2016-08-24). + * libc/header files: Add POSIX type sig_atomic_t. From Sebastien + Lorquet (2016-08-24). + * libc/header files: isatty() should be prototypes in unstid.h, not + termios.h. From Sebastien Lorquet (2016-08-24). + * Documentation: Update to NuttX C coding style document with additions + discussing long comments on the right side of a statement or data + definition (2016-08-24). + * LPC43xx serial: Fix typos in LPC43 serial driver. Found by Vytautas + Lukenskas (2016-08-24). + * libc/time: This commit adds the difftime() function. The function + depends on the toolchain-dependent CONFIG_HAVE_DOUBLE so is not + available on tiny platforms. From Sebastien Lorquet (2016-08-24). + * libc/stdio: Add support for remove(). From Sebastien Lorquet + (2016-08-25). + * STM32 OTGFS device: Fix for lost first word from FIFO + + 1) Do not overwrite Reserved Bits in GINTSTS (per ref manual)* + 2) Acknowledge all pending int on entry to ISR that are Only rc_w1* + 3) Do not disable RXFVL* + 4) Loop until RXFVL is cleared* + 5) Only clear the NAK on the endpoint on the + OTGFS_GRXSTSD_PKTSTS_SETUPDONE to not loose the first WORD of + FIFO all the data (Bug Fix) + + Changed marked *are just driver clean up and ensure ints are not lost. + The bug fix is #5 + + Test case open putty and observer the Set/Get LineCoding. Without this + fix #5 the Get will not match the Set, and in fact the data might be + skewed by 4 bytes, that are lost from the FIFO if the + OTGFS_DOEPCTL0_CNAK bit is set in the OTGFS_GRXSTSD_PKTSTS_SETUPRECVD + as opposed to the OTGFS_GRXSTSD_PKTSTS_SETUPDONE + + Set Line Coding DATA1: 4B | 00 c2 01 00 00 00 08 | c8 1B + Get Line Coding DATA1: 4B | .. .. .. .. 00 00 08 c8 .. 00 00 07 | 7a 72 + + From David Sidrane (2016-08-25). + * Add system() to stdlib.h. Actual implementation is in + apps/system/system (2016-08-25). + * include/nuttx/input: Add missing prototype for btn_lower_initialize() + (2016-08-27). + * configs/stm32f103-minimum: Add board config support to SPI LCD module + JLX12864G-086. From Alan Carvalho de Assis (2016-08-28). + * net/tcp: tcp_ipvX_bind() not actually using the ported selected with + port==0. Also removes duplicate call to pkt_input(). Issues noted by + Pascal Speck (2016-08-30). + * STM32 F7: Remove duplicate call to pkt_input from Ethernet driver. + Issues noted by Pascal Speck (2016-08-30). + * STM32L4 OTGFS device: Apply stm32 fix to stm32l4. From Sebastien + Lorquet (2016-08-31). + * drivers/contactless: Remove contactless drivers from drivers/wireless + to drivers contactless. From Sebastien Lorquet (2016-08-31). + * USB host composite is at least partially functional. No longer depends + on CONFIG_EXPERIMENTAL (2016-09-02). + * MTD: Fixed cloned typos in several FLASH drivers. From Aleksandr + Vyhovanec (2016-09-02). + * MTD: SPI-based driver for Macronix MX25L3233F or MX25L6433F. From + Aleksandr Vyhovanec (2016-09-02). + * sched/: The TCB nchildren field should not be incremented when + pthreads are created (2016-09-06). + * sched/: Move fields related to parent/child task relationship out of + TCB into group structure (2016-09-06). + * STM32L4: Add support for USART3-USART5. For STM32L4 parts, the higher + number USART ports supported varies. Add the HAVE_USARTx definitions + to the configuration to allow enabling the higher numbered USART ports. + From Jim Wylder (2016-09-15). + * configs/stm32l476-mdk: Support basic booting and nsh on Motorola MDK. + The Motorola MDK is based off of an earlier version of NuttX. This + only provides a basic NSH shell. From Jim Wylder (2016-09-15). + * STM32 USB: Set USB address to avoid a failed assertion. From Pierre-noel + Bouteville (2016-09-15). + * STM32 L4 and L7 USB: Pierre's assertion-avoidance change should also be + applied to STM32 F7 and L4 (2016-09-15). + * sched/: mq_send() was not setting the errno value on certain failures + to allocate a message (2016-09-15). + * include/nuttx/modem: Move all modem-related IOCTL commands to a common + file to assure that they will be unique (2016-09-16). + * STM32 F4 Discovery: Add support for XEN1210 3D-board. From Alan + Carvalho de Assis (2016-09-17). + * drivers/sensors: Adds support for the Sensixs XEN1210 3D-board. This + sensor is used on NANOSATC-BR2 a Brazillian CUBESAT project. From + Alan Carvalho de Assis (2016-09-16). + * include/analog/dac.h: Make DAC structure packed. From Marc Rechté + (2016-09-20). + * All SAM Ethernet Drivers: Add support so that the drivers can be built + with CONFIG_NET_MULTIBUFFER=y (2016-09-20). + * Tiva Ethernet: Needs support for CONFIG_NET_MULTIBUFFER=y (2016-09-20). + * drivers/net: NET_TUN=y => NET_MULTIBUFFER=y. From Vladimir + Komendantskiy (2016-09-20). + * SAM3/4: Fix GPIO pull-up/down code. Enabling the pull-down resistor + while the pull-up resistor is still enabled is not possible. In this + case, the write of PIO_PPDER for the relevant I/O line is discarded. + Likewise, enabling the pull-up resistor while the pull-down resistor + is still enabled is not possible. In this case, the write of PIO_PUER + for the relevant I/O line is discarded. From Wolfgang Reißnegger + (2016-09-20). + * SAM GPIO: Apply Wolfgang's change for SAM3/4 to SAMA5 and SAMV7 + (2016-09-20). + * Tiva QEI: Add QEI lower-half driver impl. for Tiva series chip. From + Young (2016-09-21). + * STM32, L4, and F7: Remove GPIO_ETH_RMII_TX_CLK. TX_CLK is not present + in RMII. Mateusz Szafoni (2016-09-22). + * sched/: Define 'group' even if HAVE_GROUPID is not set. From Mateusz + Szafoni (2016-09-22). + * sched/: vector table should have dimension NR_IRQS, not NR_IRQS+1. + From Sagitta Li (2016-09-22). + * fs/mount: Corrects a bad assertion noted by Pierre-noel Bouteville. + Also fixes a reference counting problem in an error condition: When + the mountpoint inode is found but is not an appropriate mountpoint, + the reference count on the inode was not being decremented (2016-09-22). + * libnx/nxglib: Fix handling of near-horizontal lines of width 1 in + nxgl_splitline(). Missing handling for degenerate condition caused + width 1 lines such as (0, 0) - (100, 10) to have gaps in the drawing. + From Petteri Aimonen (2016-09-22). + * drivers/net/slip.c: Fix calculations using MSEC_PER_TICK. If + USEC_PER_TICK is less than 1000, then MSEC_PER_TICK will be zero. It + will be inaccurate in any case (2016-09-25). + * Tiva QEI: Add a new ioctl command (set MAXPOS) for tiva QEI. From + Young (2016-09-26). + * LPC43xx Serial: There are some small problems in LPC43xx RS485 mode + configuration. In particular: (1) UART0,2,3 do not have DTR pins + (different from UART1), so, Kconfig needs to be adjusted. (2) + lpc43_uart.c in RS485 mode only configures DIR pin, but doesn't enable + pin output for UART0,2,3. (3) should be option to reverse DIR control + pin output polarity. (4) lpc43xx/chip/lpc43_uart.h doesn't have USART3 + definitions. NOTE: I didn't modified and didn't tested USART1, as it + has different hardware. From Vytautas Lukenskas. From Vytautas + Lukenskas (2016-09-30). + * STM32 Ethernet: Correct typo in conditional logic. From Neil Hancock + (2016-10-01). + * sched/pthread and task: When a pthread is started, there is a small + bit of logic that will run on the thread of execution of the new + pthread. In the case where the new pthread has a lower priority than + the parent thread, then this could cause both the parent thread and + the new pthread to be blocked at the priority of the lower priority + pthread (assuming that CONFIG_PRIORITY_INHERITANCE is not selected). + This change temporarily boosts the priority of the new pthread to at + least the priority of the new pthread to at least the priority of the + parent thread. When that bit of logic has executed on the thread of + execution of the new pthread, it will then drop to the correct + priority (if necessary) before calling into the new pthread's entry + point (2016-10-01). + * configs/stm32f103-minimum: Add stm32_bringup support and userled + example to STM32F103 Minimum board. From Alan Carvalho de Assis + (2016-10-02). + * STM32 L4: Add support for quadrature encoders on STM32L4. Sebastien + Lorquet (2016-10-02). + * configs: Add support for qencoders on various nucleo boards. From + Sebastien Lorquet (2016-10-03). + * STM32 L4 USB Device: Fixed L4 USB Driver by avoiding SETUPDONE and + EPOUT_SETUP. From David Sidrane (2016-10-04). + * configs/olimex-stm32-e407: Add some networking configurations. From + Mateusz Szafoni (2016-10-06). + * STM32 SPI: stm32_modifycr2 should be available on all platforms if DMA + is enabled. (2016-10-06). + * STM32 DMA2D: fix an error in up_dma2dcreatelayer where an invalid + pointer was returned when a certain underlying function failed. From + Jens Gräf (2016-10-07). + +7.19 2016-12-26 Gregory Nutt + + * include/nuttx/fs/nxffs.h: Needs forward reference to struct mtd_dev_s + and needs to include stdbool.h (2016-10-09). + * STM32F103 Minimum: Note in Kconfig that the board supports buttons. + From Alan Carvalho de Assis (2016-10-11). + * STM32F103 Minimum: Add button support. From Alan Carvalho de Assis + (2016-10-11). + * arch/arm/kinetis and configs/freedom-k64f: Add UID Unique ID. From + Neil Hancock (2016-10-13). + * arch/arm/src/stm32l4: (1) too many parentheses when calculating max + chan count and (2) channel 4 does not have a complementary output. From + Sebastien Lorquet (2016-10-14). + * arch/arm/src/stm32l4: Support Complementary PWM outputs on STM32L4. + From Sebastien Lorquet (2016-10-14). + * Support PWM testing on board nucleo-l476. From Sebastien Lorquet + (2016-10-14). + * arch/arm/src/stm32: Support oversampling by 8 for the STM32 F4. + From David Sidrane (2016-10-15). + * libc/stdio: Fixes sscanf %sn where strlen(data) < n. From David + Sidrane (2016-10-15). + * arch/risc-v: Add support for the RISC-V architecture and + configs/nr5m100-nexys4 board. I will be making the FPGA code for + this available soon (within a week I would say). The board support on + this is pretty thin, but it seems like maybe a good idea to get the base + RISC-V stuff in since there are people interested in it. From Ken + Pettit (2016-10-16). + * C library: Add a dummy setlocale() function to avoid drawing the + function from newlib (2016-10-17). + * libc/wchar: Add wcslen, wmemchr, wmemcmp, wmemcpy and wmemset to NuttX. + From Alan Carvalho de Assis (2016-10-17). + * syscalls: Add setlocale to libc.csv (2016-10-17). + * libc/locale: Add clocale header file (2016-10-18). + * libc/wchar: Add functions btowc, mbrtowc, mbtowc, wcscmp, wcscoll, + wmemmove. From Alan Carvalho de Assis (2016-10-18). + * usbhost/enumerate: fix possible buffer overwrite. From Janne Rosberg + (2016-10-18). + * configs/Board.mk: Add extra clean operations (2016-10-18). + * usbhost/composite: fix compile; missing semicolons. From Jann + Rosberg (2016-10-18). + * libc/stdio: Include wchar.h in lib_libvsprintf.c to fix compilation + error. From Alan Carvalho de Assis (2016-10-18). + * arch/arm/src/kinetis: Added missing headers. From David Sidrane + (2016-10-18). + * arch/arm/src/kinetis: Kinetis broke out SPI to kinetis/kinetis_spi.h. + From David Sidrane (2016-10-18). + * arch/arm/src/kinetis: Broke out DMA to use the modern Nuttx chip + inclusion - still STUBS. From David Sidrane (2016-10-18). + * arch/arm/src/kinetis: Kinetis Support ARMV7 Common Vector and FPU. + From David Sidrane (2016-10-18). + * arch/arm/src/kinetis: Kinetis Allow CONFIG_ARMV7M_CMNVECTOR, + CONFIG_STACK_COLORATION, CONFIG_ARCH_FPU. From David Sidrane + (2016-10-18). + * arch/arm/src/kinetis: Kinetis i2c driver offset swapped for value + in kinetis_i2c_putreg. From David Sidrane (2016-10-18). + * Add functions wcrtomb, wcslcpy, wcsxfrm, wctob, wctomb, wctype, + localeconv, strcoll, strxfrm. From Alan Carvalho de Assis + (2016-10-18). + * libc/wctype: Add wctype.h; Move lib_wctype.c to libc/wctype. + From Alan Carvalho de Assis (2016-10-18). + * include/: Modify locale.h to add localeconv() and lconv structure. + From Alan Carvalho de Assis (2016-10-18). + * include/sys/time.h: timersub macro modified per recommendations of + phreakuencies (2016-10-18). + * include/: Add isblank() macro to ctype.h. From Alan Carvalho de + Assis (2016-10-19). + * libc/wctype: Add iswctype, towlower, towupper and wcsftime functions. + From Alan Carvalho de Assis (2016-10-19). + * syslog: Fixes required for file syslog output. From Max Kriegleder + (2016-10-19). + * arch/arm/src/stm32: add TIM8 to STM32F103V pinmap. From Maciej Wójcik + (2016-10-19). + * libc/locale: Allows c++ code to compile with or without + CONFIG_LIBC_LOCALE and will generate a link error if CONFIG_LIBC_LOCALE + is not defined and setlocale is referenced. With CONFIG_LIBC_LOCALE + defined setlocale will act as if MB string is not supported and return + "C" for POSIX. C and "". From David Sidrane (2016-10-19). + * Xtensa ESP32: Add vectors for interrupt levels 2-6 (2016-10-20). + * strtof(): Add strtof() as simply a copy of strtod with types and + limits changed (2016-10-20). + * arch/arm/src/stm32v7: Register the watchdog device at the configured + device path CONFIG_WATCHDOG_DEVPATH vs. hard-coded /dev/wdt. From Frank + Benkert (2016-10-21). + * configs/*/defconfig: The buttons example was changed to archbuttons. As + a result all of the button configurations are broken and need some + renaming in the defconfig files. Noted by Frank Berkert (2016-10-21). + * configs/stm32f103-minimum: Add support to PWM on STM32F103-Minimum + board. From Alan Carvalho de Assis (2016-10-21). + * include/ctype.h and cxx/cctype: Implement ctype.h functions as inline + if possible. cctype can then properly select namespace (2016-10-22). + * libc/unisted: Add strtold() (2016-10-22). + * sscanf: Use strtof() instead of strtod() if a short floating point + value was requested. The should help performance with MCUs with 32-bit + FPU support with some additional code size (2016-10-22). + * Remove support for software prioritization of interrupts (2016-10-23). + * drivers/net/tun.c: Fix bug in TUN interface driver. From Max + Nekludov (2016-10-24). + * arch/arm/src/stm32: A new implementation of the STM32 F4 I2C bottom + half. The commin I2C as this did not handled correctly in the current + implementation (see also https://github.com/PX4/NuttX/issues/54). The + changes almost exclusively affect the ISR. From Max Kriegleder + (2016-10-24). + * arch/arm/src/stm32l4: Fix I2C devices RCC registers. From Sebastien + Lorquet (2016-10-25). + * arch/arm/src/stm32l4: Enable and renames for 32l4 UARTs 4 and 5. + From Sebastien Lorquet (2016-10-25). + * configs/stm32f103-minimum: Fix Timers 2 to 7 clock frequencies. + From Alan Carvalho de Assis (2016-10-25). + * arch/arm/src/stm32: Initial implemention of the STM32 F37xx SDADC + module. There are also changes to ADC, DAC modules. SDADC has only been + tested in DMA mode and does not support external TIMER triggers. This + is a work in progress. From Marc Rechté (2016-10-25). + * Add logic to attach peripheral interrupt sources to CPU interrupts + (2016-10-25). + * CHxN channels are always outputs. From Sebastien Lorquet + (2016-10-26). + * sched/semaphore: Within the OS, when a thread obtains a semaphore + count it must call sem_addholder() if CONFIG_PRIORITY_INHERITANCE is + enabled. If a count is available, then sem_wait() calls + sem_addholder(), otherwise it waited for the semaphore and called + sem_addholder() when it eventually received the count. + + This caused a problem when the thread calling sem_wait() was very + low priority. When it received the count, there may be higher + priority threads "hogging" the CPU that prevent the lower priority + task from running and, as a result, the sem_addholder() may be + elayed indefinitely. + + The fix was to have sem_post() call sem_addholder() just before + restarting the thread waiting for the semaphore count. + + This problem was noted by Benix Vincent who also suggested the + solution (2016-10-26). + * configs/stm32f103-minimum: Add RGB LED support on STM32F103 Minimum + board. From Alan Carvalho de Assis (2016-10-26). + * arch/arm/src/stm32f7: stm32_i2c.c Dejavu. Fixes a bug previously + found in the F4. From David Sidrane (2016-10-26). + * arch/arm/src/stm32f7: stm32f76xx77xx_pinmap.h Missed one. From + David Sidrane (2016-10-26). + * LPC43xx serial: Fix a typo in ioctl TIOCSRS485 ioctl. From Vytautas + Lukenskas (2016-10-27). + * sched/clock: Correct clock initialization. The correct range for + the month is 0-11 but is entered as 1-12 in the .config file + (2016-10-27). + * arch/*/include: Add architecture-specific inttypes.h. From Paul + A. Patience (2016-10-27). + * sched/Kconfig: Add ranges to START_YEAR, MONTH, and DAY (2016-10-28). + * configs/nucleo-f303re: Add STM32 F303RE hello configuration; remove + duplicate setting from board.h. From Marc Rechté (2016-10-18). + * arch/arm/src/lpc43xx: Restore RS485 mode on serial port open (if + RS485 is enabled via menuconfig). From Vytautas Lukenskas (2016-10-28). + * arch/arm/src/stm32f7: otgdev fixed typo. From David Sidrane + (2016-10-28). + * arch/xtensa: Basic architectural support for Xtensa processors and + the Expressif. ESP32 added. Totally untested on initial release + (2016-10-31). + * configs/esp32-core: Basic support for Expressif ESP32 Core v2 board + added. The initial release includes an NSH and an SMP test + configuration. Totally untested on initial relesae (2016-10-31). + * configs/bambino-200e: Add basic support to Micromint Bambino 200E + board. This includes contributions from Jim Wolfman. From Alan + Carvalho de Assis (2016-11-01). + * drivers/mtd/at24xx.c: Added EEPROM timeout. Fromo Aleksandr + Vyhovanec (2016-11-02). + * arch/misoc: Adds basic support for the Misoc procoessors and the + LM32 in particular. From Ramtin Amin (2016-11-01). + * configs/misoc. Board support for testing Misoc LM32 with Qemu. + From Ramtin Amin (2016-11-01). + * arch/arm/src/stm32: I think, that Size is (highest address+1 - Base + address). Base address has been removed and if address+count >= size + we are outside of the Flash. From David Sidrane (2016-11-01). + * sched/semaphore, sched/phread/, libc/semaphore, libc/pthread: Add + pthread_mutexattr_get/set_protocol and non-standard sem_get/set_protocol. + These may use to enable or disable priority inheritance on a single + semaphore (2016-11-02). + * arch/arm/src/stm32: Fix ADC compilation error when DMA isn't enabled. + From Paul A. Patience (2016-11-02). + * drivers/ and drivers/spi: Fix Kconfig warning. This commit moves the + ARCH_HAVE_SPI options outside the check for SPI. Those options don't + depend on SPI, and Kconfig files in arch/ enable them even if SPI + isn't enabled. Source the driver's Kconfig in drivers/Kconfig only + if support for the driver is enabled prevents us from defining these + ARCH_HAVE options in the driver's Kconfig. We should probably remove + the other checks in drivers/Kconfig and check if the drivers are + enabled only in their Kconfig. From Paul A. Patience (2016-11-02). + * Move protoypes for the non-standard include/semaphore.h file to the + non-standard include/nuttx/semaphore.h with the other non-standard + semaphore interfaces (2016-11-02). + * include/semaphores.h: Provide macros for sem_setprotocol() and + sem_getprotocol() if priority inheritance is not enabled. More + SEM_PRIO_* definitions to include/nuttx/semaphore.h (2016-11-02). + * drivers/serial.c: Make sure that priority inheritance is not + enabled for the signaling semaphores used in the serial driver + (2016-11-03). + * arch/arm/src/stm32f7: Fix to SPI-Master driver. Without this the + chip select decoding feature will not work properly. From Michael + Spahlinger (2016-11-03). + * drivers/, net/, fs/, sched, arch/, graphics/, libnx,: Disable + priority inheritance on all semaphores used for signaling (2016-11-03). + * sched/semaphore: Handle a case of missing proxy for sem_setprotocol. + Reorder so that (1) this error is avoided, and (2) >No proxy is needed + if priority inheritance is not enabled (2016-11-03). + * config/*/defconfgs: More fallout from name change of + apps/examples/buttons to archbuttons (2016-11-03). + * configs/nucleo_f303re: Various fixes to get the adc configuration + building again after PR. Refresh all configurations (2016-11-03). + * arch/misoc/src/common: Add interrupting Misoc serial driver. From + Ramtin Amin (2016-11-04) + * Fix a number of header files with mismatched 'extern C {' and '}' + (2016-11-05). + * Provide do-nothing stubs for mutex attribute interfaces if features + ot enabled. pthread_cond includes a signaling semaphore and should + call sem_setprotocol (2016-11-05). + * arch/arm/src/armv7-r: Fix compilation error. This commit fixes + compilation errors on MPU support for ARMv7-R. From Heesub Shin + (2016-11-06). + * arch/arm/src/armv7-r: fix invalid drbar handling. In ARMv7-R, + [31:5] bits of DRBAR is physical base address and other bits are + reserved and SBZ. Thus, there is no point in passing other than the + base address. From Heesub Shin (2016-11-06). + * arch/arm/src/armv7-r: Remove the redundant update on SCTLR. + mpu_control() is invoking cp15_wrsctlr() around SCTLR update + redundantly. From Heesub Shin (2016-11-06). + * arch/arm/src/armv7-r: add new Kconfig entries for d/i-cache. + Unlike in ARMv7-A/M, Kconfig entries for data and instruction caches + are currently missing in ARMv7-R. This commit adds those missing + Kconfig entries. Actual implmenetation for those functions will be + added in the subsequent patches. From Heesub Shin (2016-11-06). + * arch/arm/src/armv7-r: add cache handling functions. This commit + adds functions for enabling and disabling d/i-caches which were + missing for ARMv7-R. From Heesub Shin (2016-11-06). + * arch/arm/src/armv7-r: fix typo in mpu support. s/ARMV7M/ARMV7R/g. + From Heesub Shin (2016-11-06). + * arch/arm/src/armv7-r: fix CPSR corruption after exception handling. + A sporadic hang with consequent crash was observed when booting. It + seemed to be caused by the corrupted or wrong CPSR restored on return + from exception. NuttX restores the context using code like this: + + msr spsr, r1 + + GCC translates this to: + + msr spsr_fc, r1 + + As a result, not all SPSR fields are updated on exception return. + This should be: + + msr spsr_fsxc, r1 + + On some evaluation boards, spsr_svc may have totally invalid value at + power-on-reset. As it is not initialized at boot, the code above may + result in the corruption of cpsr and thus unexpected behavior. + + From Heesub Shin (2016-11-06). + * arch/arm/src/armv7-r: fix to restore the Thumb flag in CPSR. Thumb + flag in CPSR is not restored back when the context switch occurs while + executing thumb instruction. From Heesub Shin (2016-11-06). + * sched/wqueue: When queuing new LP work, don't signal any threads + if they are all busy. From Heesub Shin (2016-11-06). + * sched/wqueue: Signal sent from work_signal() may interrupt the low + priority worker thread that is already running. For example, the worker + thread that is waiting for a semaphore could be woken up by the signal + and break any synchronization assumption as a result. It also does not + make any sense to send signal if it is already running and busy. This + commit fixes it. From Heesub Shin (2016-11-06). + * arch/arm/src/stm32f7: STM32F7 SD/MMC driver depends on + CONFIG_SDIO_DMA which is only defined in stm32/Kconfig. Changed to + CONFIG_STM32F7_SDMMC_DMA and defined in stm32f7/Kconfig (2016-11-07). + * arch/arm/src/stm32: Add PWM driver support for STMF37xx. The + changes have been tested successfuly for TIM4 and TIM17 (different + IPs). From Marc Rechté (2016-11-07). + * sched/semaphore: sem_trywait() no longer modifies the errno value + UNLESS an error occurs. This allows these functions to be used + internally without clobbering the errno value. From Freddie Chopin + (2016-11-09). + * arch/arm/src/stm32l4: Change the way to configure quadrature encoder + prescalers. From Sebastien Lorquet (2016-11-09). + * libc/unisted: Patch brings strtol() and related functions more + conformant with POSIX. Corner cases like strtol(-2147483648, NULL, 10) + now pass clang -fsanitize=integer without warnings. From Juha Niskanen + (2016-11-10). + * drivers/sensors and configs/stm32f103-minimum: Add Vishay VEML6070 + driver and support for STM32F103-Minimum board. From From Alan + Carvalho de Assis(2016-11-13). + * Misoc LM32: Corrects a bug that never occured in qemu on simulation or + real fpga. The error was that the r1 register was being modified out of + context switching and not restoring it. From Ramtin Amin (2016-11-14) + * arch/arm/src/samv71: A problem occurred with the SAMV7 USBDEVHS driver + if the USB cable is unplugged while a large amount of data is send over + an IN endpoint using DMA. If the USB cable is plugged in again after a + few seconds it is not possible to send data over this IN endpoint again, + all other endpoints work as expected. + + The problem occurs because if the USB cable is unplugged while an DMA + transfer is in flight the transfer is canceled but the register + SAM_USBHS_DEVDMACTRL is left in an undefined state. The problem was + fixed the problem by resetting the register SAM_USBHS_DEVDMACTRL to a + known state. Additionally all pending interrupts are cleared. + + From Stefan Kolb (2016-11-14). + * configs/esp32-core: ESP32 Core v2: Add configuration to supporting + linking NuttX for execution out of IRAM (2016-11-14). + * libc/unistd: sleep() was returning remaining nanoseconds (kind of), + instead the remaining seconds. From Eunbong Song (2016-11-15). + * sched/irq: Fixes for the SMP case: (1) Change order for SMP case in + enter_critical_section: (1) Disable local interrupts BEFORE taking + spinlock and (2) If SMP is enabled, if any interrupt handler calls + enter_critical_section(), it should take the spinlock. (2016-11-15). + * arch/xtensa: Add EXPERIMENTAL hooks to support lazy Xtensa co- + processor state restore in the future (2016-11-16). + * Add some experimental changes to enter/leave_critical_section to + deal with the case where interrupts are disabled only on the local + CPU (2016-11-16). + * sched/irq: Add logic to handled nested calls to + enter_critical_section() from interrupts handlers (with SMP) + (2016-11-16). + * drivers/timer: Remove the timer driver TIOC_SETHANDLER IOCTL call. + This calls directly from the timer driver into application code. That + is non-standard, non-portable, and cannot be supported (2016-11-17). + *drivers/timer: Add timer driver hooks to support signal notification + of timer expiration. Commented out because invasive interface changes + would also be required to complete the implementation (2016-11-17). + * arch/arm/src/armv7-m: Fix double allocation of MPU region in mmu.h + (2016-11-17). + * timer driver: Use signal to notify of timer expiration. Add generic + argument so that there can be additional usage. From Sebastien Lorquet + (2016-11-17). + * All timer lower half drivers. Port Sebastien's changes to all all + other implementations of the timer lower half. Many changes and + untested. Expect some problems. (2016-11-17). + * sched/irq: irq_csection() has a bad assumption in the SMP case. It + assumed that the state of certain variables. That was true on entry + into the interrupt handler, but might change to the execution of logic + within the interrupt handler (2016-11-18). + * config/ nucleo-l476rg: Add support for timers to nucleo l476. From + Sebastien Lorquet (2016-11-18). + * drivers/net: Add option to use low-priority work queue to all drivers + in drivers/net. Not yet added to all architecture-specific network + drivers (2016-11-18). + * sched/wdog: Most interrupt handling logic interacts with tasks via + standard mechanism such as sem_post, sigqueue, mq_send, etc. These all + call enter_critical_section and are assumed to be safe in the SMP case. + + But certain logic interacts with tasks in different ways. The only one + that comes to mind are wdogs. There is a tasking interface that to + manipulate wdogs, and a different interface in the timer interrupt + handling logic to manage wdog expirations. + + In the normal case, this is fine. Since the tasking level code calls + enter_critical_section, interrupts are disabled an no conflicts can + occur. But that may not be the case in the SMP case. Most + architectures do not permit disabling interrupts on other CPUs so + enter_critical_section must work differently: Locks are required to + protect code. + + So this change adds locking (via enter_critical section) to wdog + expiration logic for the the case if the SMP configuration + (2016-11-18). + * SAM3/4: Add delay between setting and clearing the endpoint RESET bit + in sam_ep_resume(). We need to add a delay between setting and + clearing the endpoint reset bit in SAM_UDP_RSTEP. Without the delay the + USB controller will (may?) not reset the endpoint. If the endpoint is + not being reset, the Data Toggle (DTGLE) bit will not to be cleared + which will cause the next transaction to fail if DTGLE is 1. If that + happens the host will time-out and reset the bus. Adding this delay + may also fix the USBMSC_STALL_RACEWAR in usbmsc_scsi.c, however this + has not been verified yet. From Wolfgang Reißnegger (2016-11-18). + * SAM3/4: Remove unused 'halted' flag in UDP driver. From Wolfgang + Reißnegger (2016-11-18). + * SAM3/4: Remove 'stalled' flag in UDP driver. The flag is not necessary. + The state of the endpoint can be determined using 'epstate' instead. + From Wolfgang Reißnegger (2016-11-18). + * USBMSC: Fix length of mode6 sense reply packet. From Wolfgang + Reißnegger (2016-11-18). + * configs/dk-tm4c129x: Typo fix. From Wolfgang Reißnegger (2016-11-18). + * Typo fix in sam_udp.c. From Wolfgang Reißnegger (2016-11-18). + * STM32: STM32F303xB and STM32F303xC chips have 4 ADCs. From Paul A. + Patience (2016-11-19). + * vfork(): Fix a race condition in the SMP case. Existing logic + depended on the fact that the child would not run until waitpid was + called because the child had the same priority as the parent. BUT + in the SMP case that is not true... the child may run immediately on + a different CPU (2016-11-19). + * arch/: Add option to use low-priority work queue to all Ethernet + drivers in arch that support CONFIG_NET_NOINTS (2016-11-19). + * sched/clock: Correct calculation for the case of Tickless mode with + a 32-bit timer. In that case, the calculation was returning + millisecond accuracy. That is not good when the timer accuracy is < 1 + msec. From Rajan Gill (2016-11-19). + * sched/task: task_restart() test not supported on SMP systems. This is + not fully implemented (2016-11-19). + * This commit adds a new internal interfaces and fixes a problem with + three APIs in the SMP configuration. The new internal interface is + sched_cpu_pause(tcb). This function will pause a CPU if the task + associated with 'tcb' is running on that CPU. This allows a different + CPU to modify that OS data stuctures associated with the CPU. When the + other CPU is resumed, those modifications can safely take place. The + three fixes are to handle cases in the SMP configuration where one CPU + does need to make modifications to TCB and data structures on a task + that could be running running on another CPU. Those three cases are + task_delete(), task_restart(), and execution of signal handles. In + all three cases the solutions is basically the same: (1) Call + sched_cpu_pause(tcb) to pause the CPU on which the task is running, + (2) perform the necessary operations, then (3) call up_cpu_resume() to + restart the paused CPU (2016-11-20). + * task_restart: Make sure new task starts with pre-emption disabled and + not in a critical section (2016-11-21). + * Fix a typo in a spinlock macro (2016-11-21). + * Spinlocks: Added capability to provide architecture-specific memory + barriers. This was for i.MX6 but does not help with the SMP problems. + It is still a good feature (2016-11-21). + * Remove a assertion condition that appears to rarely cause false-alarm + assertions. Teported by Petteri Aimonen (2016-11-21). + * The examples/qencoder app was trying to init the encoder by a direct + call into the board, cheating in a local header to declare the normally + unavailable function prototype. From Sebastien Lorquet (2016-11-22). + * configs: All QE encoder files. Last change made timer hard-coded to 3. + Make configurable (2016-11-22). + * configs: Remove all traces of the no-longer existent ARCHBUTTONS + example. Remove all button configurations that depended on the + obsoleted ARCHBUTTON example (2016-11-22). + * nucleo-l476rg: Add better selection of timer (2016-11-22). + * implementation of dumpgpio for stm32l4, was required for pwm debug. + From Sebastien Lorquet (2016-11-22). + * SMP: Add logic to avoid a deadlock condition when CPU1 is hung waiting + for g_cpu_irqlock and CPU0 is waitin for g_cpu_paused (2016-11-22). + * Misoc: Add timer driver. From Ramtin Amin (2016-11-22). + * Misoc: Add commits and warnings about missing caculation of the timer + reload value (2016-11-22). + * SAM3/4: Name of method is now setcallback, not sethandler (2016-11-22). + * sam4s-xplained-pro/nsh: Configuration uses old, improper timer interface. + CONFIG_TIMER disabled in configuration. (2016-11-22). + * sam4s-xplained-pro: Remove obsolete timer initialization logic + (2016-11-22). + * Misoc LM32: Make system timer configurable via CONFIG_USEC_PER_TICK. + From Ramtin Amin (2016-11-23). + * LPC43xx: Add timer driver; configs/bambino-200e: Add support for timer + driver. From Alan Carvalho de Assis (2016-11-23). + * SMP: Fix backward condition in test (2016-11-23). + * ARMv7-A SMP: Add a little logic to signal handling (2016-11-24). + * Misoc LM32: Add signal handling logic. From Ramtin Amin (2016-11-24). + * SMP: Add spin_trylock(). Use this in conditions where other CPUs need + to stopped but we cannot call enter_critical_section (2016-11-24). + * Fix for F1 RTC Clock, tested on F103. From Maciej Wójcik (2016-11-25). + * SMP: Fix yet another potential deadlock (2016-11-25). + * Enable CONFIG_RTC in the hymini-stm32v/nsh2 (kitchensink) config. + From Maciej Wójcik (2016-11-26). + * This adds support for keeping i.MX6 inter-processor communication data + in a non-cached address region (2016-11-26). + * i.MX6: Disable non-cached region support. Add SCU register definitions + (2016-11-26). + * i.MX6: Add some controls to enable SMP cache coherency in SMP mode + (2016-11-26). + * ARMv7-A: Fix some SCU SMP logic (2016-11-26). + * ARMv7-A/i.MX6: Modify handling of the SMP cache coherency + configuration so that it is identical to the steps from the TRM. + Makes no differenct, however (2016-11-27). + * The Smoothie project needs to compile C++ inside config/boardname/src/ + to use with High Priority Interruption, then I modified the board + configs Makefile to support it. It works fine for the first time + compilation, but if we execute "touch config/boardname/src/Pin.cxx" + and execute "make" it will not detect that Pin.cxx was modified. I + think there is some other place I should modify, but I didn't find + it. From Alan Carvalho de Assis (2016-11-27). + * ARMv7-A/i.MX6 SMP: Move SMP coherent cache setup to earlier in + initialization of CPUn, n>0 (2016-11-27). + * ARMv7 GIC: SGIs are non-maskable but go through the same path as other, + maskable interrupts. Added logic to serialize SGI processing when + necessary (2016-11-27). + * sched_note: Extend OS instrumentation to include some SMP events + (2016-11-27). + * sched_note: Add spinlock instrumentation; In SMP configurations, + select to log only notes from certain CPUs (2016-11-28). + * Misoc LM3: Add Misoc Ethernet driver. Integrate network support into + configs/misoc/hello. Remove configs/misoc/include/generated directory. + I suppose the the intent now is that this is a symbolic link? DANGER! + This means that you cannot compile this code with first generating + these files a providing a symbolic link to this location! From Ramtin + Amin (2016-11-28). + * Add tools/showsize.sh (2016-11-28). + * configs/misoc: Add a sample directory containing generated sources. + This is really only useful for performing test builds. You really + must generate the Misoc architecture for a real-life build. From + Ramtin Amin (2016-11-28). + * sched_note: Permit spinlock and critical section notes in in-memory + buffer iff sched_not_get() interfaces is disabled (2016-11-28). + * STM32 DAC: Fix shift value whenever there are is a DAC2 and, hence, + up to three interfaces. From Marc Rechté (2016-11-29). + * Back out a debug change that was included in commit (2016-11-29). + * i.MX6: Don't output the alphabet if CONFIG_DEBUG_FEATURES is not set + (2016-11-29). + * Misoc LM32: Add logic to flush/invalidate caches. From Ramtin Amin + (2016-11-29). + * drivers/net/: Adapt all Ethernet drivers to work as though + CONFIG_NET_MULTIBUFFER were set. Remove all references to + CONFIG_NET_MULTIBUFFER (2016-11-29). + * stm32_otghshost: if STM32F446 increase number of channels to 16. From + Janne Rosberg (2016-11-30). + * usbhost_composite: fix end offset in usbhost_copyinterface(). From + Janne Rosberg (2016-11-30). + * usbhost_cdcacm: add CDC_SUBCLASS_ACM and CDC_PROTO_ATM to supported + class and proto. From Janne Rosberg (2016-11-30). + * LPC43 SD/MMC: Correct some git definitions on SMMC control register + in lpc43_sdmmc.h. From Alan Carvalho de Assis (2016-11-30). + * STM32L4: Correct USART1/2 definitions. Use default mbed UART4 + settings. From Sebastien Lorquet (2016-12-01). + * boardctl: Add new boardctl() command ,BOARDIOC_NX_START, to start the + NX server as a kernel thread (2016-12-01). + * GPDMA driver for the LPC43xx. The GPDMA block is basically the same + as the LPC17xx. Only the clock configuration is different and LPC43xx + has four different DMA request sources, where LPC17xx has only two. + From Alan Carvalho de Assis (2016-12-01). + * Remove RGMP and RGMP drivers (2016-12-02). + * i.MX6: Add an untested SPI driver taken directly from the i.MX1 port + (2016-12-02). + * Eliminate CONFIG_NO_NOINTS. There is no longer any support for + interrupt level processing of the network stack. Lots of files changed + -> lots of testing needed (2016-12-03). + * Fix DEBUGASSERT() in group_signal.c. From Masayuki Ishikawa + (2016-12-04). + * Add support for the SAM5CMP-DB board. From Masayuki Ishikawa + (2016-12-04). + * SAM3/4: Add SMP support for the dual-core SAM4CM. From Masayuki + Ishikawa (2016-12-04). + * C Library: Allow option to enable IP address conversions even when the + IP address family is not supported (2016-12-04). + * SSD1306: Fix errors in SPI mode configuration. From Gong Darcy + (2016-12-04). + * SAMA5 does not build when executing from SDRAM before board + frequencies are not constant. Rather, the bootloader configures the + clocking and we must derive the clocking from the MCK left by the + bootloader. This means lots more computations. This is untested on + initial commit because I don't have a good PWM test setup right now + (2016-12-04). + * Olimex-LPC1766-STK: Enable procfs in NSH configuration. Automount + /proc on startup (2016-12-05). + * SAM4CMP-DB: Add hooks to auto-mount the procfs file system on startup + in board bring-up logic (2016-12-05). + * Remove all references to BOARDIOC_PWMSETUP and board_pwm_setup() + (2016-12-05). + * Remove all references to BOARDIOC_ADCSETUP and board_adc_setup() + (2016-12-05). + * Added Timers 2-5 and control of SAI and I2S PLLs. From David Sidrane + (2016-12-05). + * Added support for stmf469 SAI and I2S PLL configuration and STM446 + fixes. From David Sidrane (2016-12-05). + * Expanded otgfs support to stm32F469 and stm32f446. Added missing bits + definitions, Used stm32F469 and stm32f446 bit definitions, Removed + unsed header file. From David Sidrane (2016-12-05). + * Remove BOARDIOC_CAN_INITIALIZE. CAN initialization is now done in the + board initialization logic just like every other device driver + (2016-12-06). + * STM32F7: Allow the config to override the clock edge setting. From + David Sidrane (2016-12-06). + * For Cortex-A9, should also set ACTLR.FW in SMP mode to enble TLB and + cache broadcasts. Does not fix SMP cache problem (2016-12-07). + * sched notes: Add additional note to see if/when CPU is started in SMP + mode (2016-12-07). + * EFM32: Fix a compilation error. From Pierre-noel Bouteville + (2016-12-07). + * pthreads: Add pthread_cleanup_push() and pthread_cleanup_pop() + (2016-12-08). + * BUGFIX:STM32F427 was rebooting. Over reached family. From David + Sidrane (2016-12-08). + * Add pthread_setcanceltype() and pthread_testcancel() (2016-12-09). + * Added STM32F469 RAM size and deliberated STM32F446 size. From David + Sidrane (2016-12-09). + * Typo in stm32f76xx77xx_pinmap.h edited online with Bitbucket. From + David Sidrane (2016-12-09). + * stm32_allocateheap.c edited online with Bitbucket. From David Sidrane + (2016-12-09). + * LPC43xx SD card: Correct pin configuration options needed for SD card + pins. From Alan Carvalho de Assis (2016-12-09). + * pthread_mutex_destroy(): Fix an error in destroying a mutex which can + occur after a pthread has been canceled while holding the mutex + (2016-12-09). + * Add support for cancellation points (2016-12-09). + * Forgot to add some files in the last commit (2016-12-10). + * Correct some default font IDs. From Pierre-Noel Bouteville + (2016-12-10). + * task_delete() now obeys all cancellation point semantics (2016-12-10). + * Add task_setcancelstate(), task_setcanceltype(), and task_testcancel(). + These are non-standard interfaces analogous to the correponding pthread_ + interfaces that provide cancellation controls for tasks (2016-12-10). + * i.MX6 interrupt handling: Additional logic needed to handle nested + interrupts when an interrupt stack is used (2016-12-13). + * SAMV7 MCAN: Prevent Interrupt-Flooding of ACKE when not connected to + CAN-BUS. An Acknowledge-Error will occur every time no other CAN Node + acknowledges the message sent. This will also occur if the device is + not connected to the can-bus. The CAN-Standard declares, that the Chip + has to retry a given message as long as it is not sent successfully (or + it is not cancelled by the application). Every time the chip tries to + resend the message an Acknowledge-Error-Interrupt is generated. At high + baud rates this can lead in extremely high CPU load just for handling + the interrupts (and possibly the error handling in the application). To + prevent this Interrupt-Flooding we disable the ACKE once it is seen as + long we didn't transfer at least one message successfully. From Frank + Benkert (2016-12-13). + * i.MX6: Remove non-cached, inter-cpu memory region. Not a useful + concept (2016-12-13). + * minnsh Configurations: Remove minnsh configurations and support logic: + up_getc() and lowinstream. This was an interesting exercise to see + just how small you could get NuttX, but otherwise it was not useful: + (1) the NSH code violated the OS interface layer by callup up_getc and + up_putc directly, and (2) while waiting for character input, NSH would + call up_getc() which would hog all of the CPU. Not a reasonable + solution other than as a proof of concept (2016-12-13). + * Calypso Boards: Remove all Calypso board configurations (2016-12-13). + * Calypso: Remove Calypso architecture support and support for Calypso + SERCOMM driver (2016-12-13). + * ESP32 core v2: Two changes (1) flushes the UART TX buffer in the esp32 + serial shutdown routine. The ROM bootloader does not flush the FIFO + before handing over to user code, so some of this output is not + currently seen when the UART is reconfigured in early stages of + startup. And changes the openocd config file's default flash voltage + from 1.8V to 3.3V. This is not necessary right now, but may save some + hard-to-debug moments down the track (3.3V-only flash running at 1.8V + often half-works and does weird things...). From Angus Gratton + (2016-12-14). + * Xtensa ESP32: Add missing ENTRY() and RET() macros in C callable + assembly language. At one time I though the that the ESP32 support the + CALL0 ABI. I was mistaken so there may be a few more like this + (2016-12-14). + * Xtensa ESP32: Fix a couple of bugs associated with handling of CPU + interrupts (2016-12-14). + * Xtensa ESP32: Fix several build-related issues associated with vector + section (2016-12-15). + * Xtensa ESP32: Fix missing CALL0 ABI condition (2016-12-15). + * Xtensa EPS32: Make sure that all C callable assembly functions includes + ENTRY prologue and RET epilogue (2016-12-15). + * Xtensa ESP32: Fix windowspill register handling + Use r6, not r2 when + passing paramters with call4 (2016-12-16). + * Xtensa ESP32: Use r6, not r2 when passing paramters with call4 + (2016-12-16). + * Xtensa ESP32: Correct a logic problem the prevented dumping the IDLE + thread's stack on an assertion (2016-12-16). + * Xtensa ESP32: Fix some missing SMP logic (2016-12-16). + * Xtensa ESP32: Basically a redesign of the interrupt dispatch logic + (2016-12-16). + * Xtensa ESP32: Level 1 interrupts should return via RFE (2016-12-17). + * Xtensa ESP32: One register getting clobber on context save (2016-12-17). + * STM32 F7: Fix some STM32F7 copy paste errors. From David Sidrane + (2016-12-17). + * CDC/ACM Device Class: uart_ops_s portion of cdcacm will not be + initalized with correct functions if CONFIG_SERIAL_DMA is lit + (2016-12-17). + * Xtensa ESP32: Using wrong register to disable interrupts (2016-12-17). + * Xtensa ESP32: Fix clobbered a9 in co-processor context save/restore + (2016-12-17). + * Xtensa ESP32: Need to clone some logic for synchronous context switch. + Window spill logic in the conmon restores logic is inappropriate in + this context (2016-12-17). + * sscanf(): Add scansets to the scanf function. Enabled + CONFIG_LIBC_SCANSET option. From Aleksandr Vyhovanec (2016-12-17). + * Xtensa ESP32: Fix context save logic when called in window ABI + configuration. Add an IDLE stack. Don't depend on the mystery stack + received from the bootloader (2016-12-18). + * Xtensa ESP32: Need to spill registers to memory as the last dying + action before switching to a new thread (2016-12-18). + * ESP32 Serial: Add logic to prevent infinite loops in interrupt handler + (2016-12-18). + * Xtensa ESP32: Automatically mount /proc at start-up (2016-12-19). + * Xtensa ESP32: Corrects timer initialization and timer input frequency + (2016-12-19). + * Tiva PWM: Support PWM_PULSECOUNT feature for TI tiva. From Young.Mu + (2016-12-20). + * Xtensa ESP32: Missing prologue/epilogue macros on C callable function + (2016-12-20). + * Xtensa ESP32: Update APP CPU startup logic to match current Expressif + example code. Fix errors APP CPU startup (2016-12-20). + * fs/procfs: Fix procfs status for SMP case (2016-12-20). + * Xtensa ESP32: Clock frequency is different if running from IRAM or is + booting from FLASH. This is a booltloader issue (2016-12-20). + * Xtensa ESP32: Basic port is function in both single CPU and dual CPU + SMP configurations. There is an NSH configuration for each CPU + configuration (2016-12-21). + * STM32 F4: Merge in support for the Olimex STM32 P407 board (2016-12-21). + * Xtensa ESP32: Add an OS test to verify the port (2016-12-22). + * Xtensa ESP32: Corrects a problem with dispatching to signal handlers: + Cannot vector directly to the signal handling function as in other ABIs + under the Xtensa Window ABI. In that case, we need to go through a + tiny hook when performs the correct window call (call4) otherwise + registers will be scrambled in the signal handler (2016-12-22). + * SAMV7 CAN: Make delete_filter functions more robust. From Frank + Benkert (2016-12-23). + * Xtensa ESP32: Add stack checking logic (2016-12-23). + * sched note: record ID enumeration now results on constant values; ID + values do not change with configuration. This makes writing + post-processing software much easier (2016-12-24). + * STM32 F3: Forgot to update chip.h for STM32F303x[BC]'s 4 ADCs + (2016-12-24). + * STM32 F4: Allow dma in 1 bit mode in STM32F4xxx. From David Sidrane + (2016-12-24). + * termios.h: Fix CRTSCTS define to include input and output flow. + From Lorenz Meier (2016-12-26). + * SMP: Enforce this rule: Tasks which are normally restored when + sched_unlock() is called must remain pending (1) if we are in a + critical section, i.e., g_cpu_irqlock is locked , or (2) other CPUs + still have pre-emption disabled, i.e., g_cpu_schedlock is locked. In + those cases, the release of the pending tasks must be deferred until + those conditions are met (2016-12-26). + +7.20 2017-03-08 Gregory Nutt + + * i.MX6 SMP/NSH configuration: Enable examples/smp test (2016-12-27). + * SMP: There were certain conditions that we must avoid by preventing the + release of the pending tasks while withn a critical section. But this + logic was incomplete; there was no logic to prevent other CPUs from + adding new, running tasks while on CPU is in a critical section. This + commit corrects this. This is matching logic in sched_addreadytorun to + avoid starting new tasks within the critical section (unless the CPU is + the holder of the lock). The holder of the IRQ lock must be permitted + to do whatever it needs to do (2016-12-27). + * i.MX6: Fix clearing GPT status register. From Masayuki Ishikawa + (2016-12-28). + * SMP: Make checks for CPU lock set more robust. There are certains + conditions early in initialization on during interrupt handling where + things need to be done a little differently (2016-12-28). + * sched_cpulocked: Avoid use of spinlock. That has been reported to + cause a deadlock (2016-12-28). + * SMP: Fix a gap where we may try to make modifications to the task lists + without being in a critical sections. That permits concurrent access to + the tasks lists and many subtle problems. This fix just remains in the + critical section throughout the operation (and possible until the task + is restore in the event of a context switch). Makes a big difference in + stability (2016-12-28). + * SMP: Move sharable function to common file as irq_cpu_locked(). Use + irq_cpu_locked() in sched_unlock(). Use irq_cpu_locked() in + sched_removereadytorun() and sched_setpriority(). Use irq_cpu_locked() + in sched_mergepending() (2016-12-29). + * Add configuration support for builds with Ubuntu under Windows 10 + (2017-01-01). + * Add support for Tom Thumb small mono-space font. From Alan Carvalho de + Assis (2017-01-03). + * Alternative way to encode font spacing for Tom Thumb font (2017-01-04). + * Graphics: Initial separation of font cache from graphics/nxterm. Now in + libnx/nxfronts where it can be shared with other grapics applications + (2017-01-05). + * Font cache: Fix a reference counting issue: count not be initialized + when font cache created. Fix initialization of a semaphore. Enforce + mutually exclusive access to the font cache Replace fixed-size array + with variable size link list. Font cache in libnx needs to use + context-specific memory allocators (2017-01-06). + * Add debug assertion in libdtoa to catch attempts to use floating point + output formats from within an interrupt handler. That will cause + assertions or crashes downstream because __dtoa will attempt to allocate + memory. From Pierre-noel Bouteville (2017-01-06). + * procfs: Correct to snprintf-related errors in fs_procfsproc.c. + Resolves issue #24 (2017-01-07). + * STM32F429i Discovery: Add support for NxWM on STM32F429i-Disco board. + From Alan Carvalho de Assis (2017-01-07). + * STM32F429i-DISCO: Enable keyboard input in nxwm configuration + (2017-01-07). + * STM32F429i-DISCO: Change NxWM cursor character from 137 (graphics + block) to 95 (underscore). NxWM is configured to use a 7-bit character + set so 137 is not a valid character code (2017-01-07). + * NX server: Correct message queue names. Should not be at /dev, but + rather relative to /var/mqueue (2017-01-08). + * NxWM configurations. If using a 7-bit character set, then the cursor + character cannot be 137 (graphic block). Use 95 (underscore) instead + (2017-01-08). + * packed_struct replaced by begin_packed_struct and end_packed_struct. + From Aleksandr Vyhovanec (2017-01-09). + * sched_note: Fix spinlock instrumentation. From Masayuki Ishikawa + (2017-01-12). + * SMP: Fix an error in critical section logic when performing a context + switch from an interrupt handler. The g_cpu_irqset bit was not being + set for the CPU so other CPUs did not know about the critical section + (2017-01-13). + * Kinetis: Added support for CHIP_MK60FN1M0VLQ12 chip. From Maciej + Skrzypek (2017-01-13). + * Kinetis: Fixed wrong MCG VDIV calculation on new NXP K60. From Maciej + Skrzypek (2017-01-13). + * Kinetis Serial: Fixed compile error when UART5 is selected. From Maciej + Skrzypek (2017-01-13). + * Kinetis: Need to set HAVE_UART_DEVICE when UART4 is selected. From + Maciej Skrzypek (2017-01-13). + * Kinetis MCG: Wrong FRDIV set in MCG_C1. From Maciej Skrzypek + (2017-01-13). + * Kinetis: New K60 has no Flex memory. From Maciej Skrzypek (2017-01-13). + * In all implementations of _exit(), use enter_critical_section() vs. + disabling local interrupts (2017-01-13). + * i.MX6: Corrects behavior of last SMP patch with i.MX6 (2017-01-13). + * SMP Signals: Fix some SMP signal delivery logic. Was not handling some + critical sections correctly and was missing logic to signal tasks + running on other CPUs (2017-01-14). + * STM32F103 Minimum: Add support for nRF24 on STM32F103-Minimum board. + From Alan Carvalho de Assis (2017-01-15). + * Kinetis: Add support for K64/K66 RTC lower half driver. From Neil + Hancock (2017-01-17). + * Networking: Fixed some issues that prevented ipv6 to work with ipv4 + enabled. From Pascal Speck (2017-01-18). + * STM32 Oneshot: Fix logic so that it can support multiple oneshot timers + (2017-01-18). + * STM32L4: Port fix for multiple oneshot timers from STM32. Also fixes a + few issues with original STM32 implementation (2017-01-18). + * SAM3/4: Add support for ATSAM4S4C. From Wolfgang Reißnegger (2017-01-18). + * Math library: Leverage optimized ARM functions from BSD license ARM file + (2017-01-19). + * Math library optimatizations for FPU only apply to ARMv8 which is not + yet supported (2017-01-20). + * Move optimized ARM memcpy functions from arch/arm/src/ to + libc/machine/. This is necessary for the PROTECTED and KERNEL build + modes. Otherwise, memcpy() will be built in to kernel space and not + accessible to applications (2017-01-20). + * libc: Fix ARMv7-A/R memcpy assembly (2017-01-20). + * ARM memcpy(): Use DWord vs. HWord offset. ARM 32-bit instructions must + be aligned to DWord boundaries and this gives us more range in the jump + tables (2017-01-20). + * Fix a compile error: in sched_cpuload.c:Line136, the variables ts and + secs are not defined if CONFIG_CPULOAD_ONESHOT_ENTROPY = 0. However, + these variables are used regardless of CONFIG_CPULOAD_ONESHOT_ENTROPY at + lines~180:onwards. From rg (2017-01-22). + * CPU load: Correct computation of the nominal period to use when the + source is a oneshot timer (2017-01-22). + * Kernel Modules: Module initializer may now return a symbol table + (2017-01-22). + * Modules: Extend the module interface so that we can access symbols + exported by the module (2017-01-22). + * Shared Libraries: In the FLAT build mode, kernel modules may be used to + provide minimal shared library functionality (2017-01-22). + * Shared libraries: Add a non-standard dllfnc.h function to set the + symbol table (2017-01-23). + * Olimex-stm32-p407: Add a NSH protected build configuration; Enable + procfs/ in all configurations (2017-01-23). + * SMP: Fix timer related issues: Round robin and sporadic scheduling + were only being performed for tasks running on the CPU that processes + the system timer interrupt. Similary, CPU load measurements were only + be processed for running on the CPU that receives the sampling interrupt + (2017-01-23). + * STM32 F7: Added missing ARCH_HAVE_RESET for F7. From David Sidrane + (2017-01-23). + * STM32: Add missing STM32_BKP_BASE. From David Sidrane (2017-01-23). + * Configurations that enable OSTEST must not disable signals (2017-01-24). + * Add missing sched_note_*() calls to sam4cm SMP functions (2017-01-24). + * Fix return value if x is NaN. From Aleksandr Vyhovanec (2017-01-25). + * MMCSD_SDIO: Only wait for card ejected if card detection is supported. + From Alan Carvalho de Assis (2017-01-26). + * LPC43 pinset definitions: Add more 1 bit to pinset to reach + SFSCLK0-SFSCLK3. Remove PINCONFIG_DIGITAL. From Alan Carvalho de Assis + (2017-01-26). + * sched/modules: Add support for dependencies between modules (2017-01-27). + * Back out use on inline functions to access 16-bit registers. The inline + functions were a work-around for misbehaving compiler years and years + ago. The mon standard macro-ized version should work just fine + (2017-01-27). + * Olimex STM32 P407: Add support for on-board microSD slot. Does not + work... Currently all commands to the SD card timeout (2017-01-28). + * libc/modlib: Add build a configuration logic for a shared module + library (2017-01-29). + * Module names are not needed in libc/modlib when the module library is + used only for shared library support (2017-01-29). + * Shared Libs: Implement module based shared libraries for the PROTECTED + mode build (2017-01-29). + * Typos withim mtd/ with Macronix MX25L. In NuttX/drivers/mtd/Make.defs + letters X between M and 25 are missing. Noted by Oleg Evseev + (2017-01-x30x). + * SAME70-Xplained: Clone some recent SAMV71-XULT changes (2017-01-30). + * Add capabilities() method to SDIO interface. Remove + CONFIG_SDIO_WIDTH_D1_ONLY. That should not be a global propertie, but + rather a capability/limitation of single slot when there may be multiple + slots (2017-01-31). + * Removed dmasupported() method from the SDIO interface. That is now a + bit in the capability set (2017-01-31). + * STM32F7 SDMMC: Add support for single bit operation on SDMMC2 + (2017-01-31). + * STM32F103-Minimum: Fix a compile error. + CONFIG_STM32_TICKLESS_ONESHOT_TIMER is only defined in TICKLESS mode. + Somebody has been hand editing .config files (2017-01-31). + * Timer logic: Add private function prototypes to eliminate a warning; + Functions should not be inline because the may recurse (2017-01-31). + * STM32F7 SDMMC: Make sure that all SDMMC configuration variables begin + with STM32F7_; Eliminate CONFIG_SDMMC1/2_DMA altogether. Does not + appear to be used (2017-01-31). + * STM32F429-DISCO: Move some board initialization logic that is not + usable because it lacks the configuration options to make it so + (2017-01-31). + * Cancellation points: Fix some backward logic in conditional compilation + (2017-02-02). + * Soft links: Add an implementation of readlink() (2017-02-03). + * inode_find: Now takes struct inode_desc_s type as input. That + structure includes some data storage. It was used within inode_find(), + but that means that the life of the data was the life of inode_find(). + That data must persist longer. It is now provided by the caller so that + the life of the data persists for the entire life of the caller + (2017-02-05). + * tools/noteinfo.c: A hack tool that I use to analyze some sched_note + output. Needs a home and may be useful to others (2017-02-05). + * Pseudo File System: Add support for soft links in the top-level psuedo + file system (2017-02-05). + * Updates to Kinetis SDHC driver. From Marc Rechté (2017-02-06). + * SDIO interface: Handle all possible DMA combinations in all SDIO drivers + (2017-02-07). + * up_timer_initialize() is named incorrectly. The prefix should be the + architecture name, not up_ since it is private to the architecture. + up_timerisr() is similarly misnamed and should also be private since it + is used only with the xyz_timerisr.c files (2017-02-07). + * MCG defines are based on the MCG feature configuration. We define the + bits as a common set of names. This means that an index may be added to + a name i.e. LOCK is LOCK0 as that is the superset name. From David + Sidrane (2017-02-07). + * Fixes illdefined BOARD_FR_DIV with BOARD_FRDIV from MCG. Original + BOARD_FR_DIV was never used - that is a good thing because the value ws + defined shifted and the code also shifted it. From David Sidrane + (2017-02-07). + * Added MCG settings that are defiend on the K64 SoC. Added + BOARD_MCG_C2_FCFTRIM and BOARD_MCG_C2_LOCRE0 to configure the MCG_C2 + register cleanup of some comments. From David Sidrane (2017-02-07). + * Better granualarity and errno checking of the board's MCG settings. + Allow for complete MCG_C2 definition from the boart.h file. Moved + #ifdef out of code by setting default values. Allow for individule bit + setting in MCG_C2 for BOARD_EXTCLOCK_MCG_C2, BOARD_MCG_C2_FCFTRIM, + BOARD_MCG_C2_LOCRE0. Added range and sanity checking. From David + Sidrane (2017-02-07). + * Cosmetic changes from review of last PR (2017-02-07). + * C library: Remove comments blocks before empty sections (2017-02-08). + * C Library: Add a very limited, first step implementation of setvbuf(). + This is a collaborative effort. Alan Carvalho de Assis did the initial + prototype (2017-02-08). + * setvbuf: Add support for configuration of line buffering (2017-02-08). + * Bamboo-200E: Add netnsh configuration. From Alan Carvalho de Assis + (2017-02-08). + * USBMSC: Always set LUN readonly flag. From Wolfgang Reißnegger + (2017-02-08). + * drivers/lcd: ssd1306_configspi() must have global scope (2017-02-09). + * SIM: Add readlink and setvbuf to nuttx-names.dat (2017-02-09). + * setvbuf: Add support for disabling I/O bufferin (2017-02-09). + * setvbuf: Fix some compile errors in first build of logic to + enable/disable buffering (2017-02-09). + * C Library: Clean-up buffer selections in Kconfig (2017-02-09). + * sem_open(): Fix a compiler error introduced with the setvbuf() changes + (2017-02-09). + * MMC/SD SDIO: Some drivers need to start DMA before sending CMD24 and + some AFTER. From Alan Carvalho de Assis (2017-02-09). + * Kinetis SDHC driver fixes. From Marc Rechté (2017-02-09). + * Bambino-200E: Use .elf extension on all executables. From Alan Carvalho + de Assis (2017-02-09). + * Kinetis: Add support for K66 family. From David Sidrane (2017-02-09). + * Created a kinetis MCG versioning scheme pulled in by Kinetis chip.h + + The motivations is to version the IP blocks of the Kinetis K series + family of parts. + + This added versioning and configuration features for the Kinetis MCG IP + block. + + It is envisioned that in the long term as a chip is added. The author + of the new chip definitions will either find the exact configuration in + an existing chip define and add the new chip to it Or add the MCG + feature configuration #defines to the chip ifdef list in + arch/arm/include/kinetis/kinetis_mcg.h In either case the author should + mark it as "Verified to Document Number:" taken from the reference manual. + + The version KINETIS_MCG_VERSION_UKN has been applied to most all the + SoCs in the kinetis arch prior to this commit. + + The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12, All K64 and K66 + which not have Verified MCG configurations. + + From David Sidrane (2017-02-09). + * Kinetis chip Adding K66 and including MCG versioning. This includes + arch/arm/include/kinetis/kinetis_mcg.h to bring in the MCG versioning + and defines the KINETIS_K66 family for the added SoCs: + + --------------- ------- --- ------- ------- ------ ------ ------ ----- + PART NUMBER CPU PIN PACKAGE TOTAL PROGRAM EEPROM SRAM GPIO + FREQ CNT FLASH FLASH + --------------- ------- --- ------- ------- ------ ------ ------ ----- + MK66FN2M0VMD18 180 MHz 144 MAPBGA 2 MB — — KB 260 KB 100 + MK66FX1M0VMD18 180 MHz 144 MAPBGA 1.25 MB 1 MB 4 KB 256 KB 100 + MK66FN2M0VLQ18 180 MHz 144 LQFP 2 MB — — KB 260 KB 100 + MK66FX1M0VLQ18 180 MHz 144 LQFP 1.25 MB 1 MB 4 KB 256 KB 100 + + From David Sidrane (2017-02-09). + * STM32: Fixes the bkp reference counter issue. From David Sidrane + (2017-02-09). + * STM32F7: Fixes the bkp reference counter issue. From David Sidrane + (2017-02-09). + * C Library: Add setbuf() which is a trivial wrapper around setvbuf() + (2017-02-09). + * tools/mkconfig.c: Add logic to keep all of the buffering options in sync + (2017-02-10). + * VFS rename: Fix issues with rename to subdirectories and some softlink + issues (2017-02-11). + * Add logic to VFS rename: If target of rename exists and is a directory, + then the source file should be moved 'under' the target directory. + POSIX also requires that if the target is a file, then that old file + must be deleted (2017-02-11). + * rename: An inode with no operations should be treated like a directory + for the purposes of rename (2017-02-12). + * rename(): Correct more issues. (1) Move to the root directory in the + pseudo file system, (2) Fix path naming calculation when the path is the + root directory of a mounted file system, and (3) dont't do the rename if + the source and destination of the rename are the same (2017-02-12). + * Add basic fstat() support (2017-02-12). + * Add fstat support to binfs (2017-02-12). + * fstat: Add fstat() support to romfs (2017-02-12). + * fstat: Add fstat() support to unionfs (2017-02-12). + * I found an issue inside the cp15_coherent_dcache function in file, + arch/arm/src/armv7-r/cp15_coherent_dcache.S. + + The "mcr CP15_BPIALLIS(r0)" instruction is used for invalidating entire + branch predictor. But the problem is, since this is the generic code + and can be called on any armv7-r architecture based CPU's. It is a + problem, if this instruction is called in uni processor configuration. + Because, BPIALLIS (c7, 0, c1, 6) instruction is only added as part of + the "Multiprocessing Extensions" (As per ARM® Architecture Reference + Manual /ARMv7-A and ARMv7-R edition) + + So in my opinion, this instruction should be under SMP configuration. In + non-SMP configuration this instruction could become undefined. + + From Manohara HK (2017-02-13). + * fstat: Add fstat() support to tmpfs (2017-02-13). + * fstat: Add fstat() support to nxffs (2017-02-13). + * fstat: Add fstat() support to nfs (2017-02-13). + * NFS: Use clock_gettime() instead of deprecated gettimeofday() + (2017-02-13). + * fstat: Add fstat() support to FAT. From Alan Carvalho de Assis + (2017-02-13). + * ROMFS: stat() and fstat() should always indicate that directories are + executable (2017-02-13). + * Kinetis SDHC - Enable clock after selected. From David Sidrane + (2017-02-14). + * Kinetis SPI and I2C are 0 based. The K whole family line has max 4 or + each. But the supported parts have the maximums listed below: + + K46 and K66 3 SPI SPI0-SPI2 + K46 and K66 4 I2C I2C0-I2C3 + + From David Sidrane (2017-02-10). + * Add support for NXP Freedom-k66f development board. From David Sidrane + (2017-02-14). + * Kinetis: Define Alternate addresses for IP blocks in both AIPS0 & + AIPS1. Added ALT version of RNGA, FTM2, DAC0 as a facility to later + define secondary access via AIPS1 to these peripherals. From David + Sidrane (2017-02-14). + * Kinetis: Add support for K66. From David Sidrane (2017-02-14). + * procfs: stat() left several fields in uninitialized state (2017-02-14). + * hostfs: Add support for fstat() (2017-02-14). + * procfs: Add support for fstat() (2017-02-14). + * smartfs: Add support for fstat() (2017-02-14). + * Kinetis Freedom K66F: Add Ethernet support. From David Sidrane + (2017-02-14). + * LPC43 serial: Correct conditional logic that selects /dev/ttySN. + Problem noted by Alan Carvalho de Assis (2017-02-14). + * Add usbnsh config to Bambino 200E board. From Alan Carvalho de Assis + (2017-02-14). + * procfs: Most stat() implementations were not initializating the + st_atime, st_ctime, and st_mtime fields (2017-02-15). + * Kinetis Support RMII clock source select. This defined the RMII clock + source select bits and allows the selection to be made via Kconfig. + From David Sidrane (2017-02-15). + * Kinetis PWM: Add FTM3 to PWM. From David Sidrane (2017-02-15). + * Kinetis:Freedom-K66F uses ENET_1588_CLKIN as RMII clock. From David + Sidrane (2017-02-15). + * Fix for SAMv7 SPI: DLYBS value was calculated, but never written to any + registers. This led to incorrect timings on the bus. From Michael + Spahlinger (2017-02-16). + * C library: Add swab() (2017-02-16). + * C library: Add strtoimax and strtoumax (2017-02-16). + * C library: Add ffs(), rindex(), an index(). Add strings.h. Move + strcasecmp, strncasecmp, bzero, bcmp, and bcopy to where they belong in + strings.h.h, not string.h. bzero, bcmp, and bcopy are legacy functions; + the contemporary counterparts should be used instead (2017-02-16). + * Allow board to configure HSE clock in bypass-mode. This is needed to + enable HSE with Nucleo-F746ZG board. From Jussi Kivilinna (2017-02-17). + * C library: Add fstatfs(); fix a reference counting error in fstat() + (2017-02-17). + * Update cwchar. Add cwctype (2017-02-17). + * Add setbuf and setvbuf to cstdio (2017-02-17). + * Port STM32L4 SAI driver from MDK (2017-02-17). + * STM32L4: Bring power management logic from Motrola MDK into NuttX + (2017-02-18). + * STM32L4: Bring LPTIM driver in from the Motorola MDK (2017-02-18). + * drivers/sensors: Add driver for the ST L3GD20 3 axis gyro. From + raiden00 (2017-02-19). + * config/stm32f429i-disco: add support for the L3GD20 driver. From + raiden00 (2017-02-19). + * STM32L4 COMP: Port from Motorola MDK (2017-02-19). + * Add twr-k64f120m config and fix some ENET related problems. From Marc + Rechté (2017-02-19). + * STM32 F7: stm32_allocateheap: allow use DTCM memory for heap. STM32F7 + has up to 128KiB of DTCM memory that is currently left unused. This + change adds DTCM to main heap if CONFIG_STM32F7_DTCMEXCLUDE is not + enabled. From Jussi Kivilinna (2017-02-20). + * This should resolve issue #30: Audio Tone Generator and PWM Multiple + Output Channel options. I don't actually have a setup to verify it, + however (2017-02-20). + * drivers/tone.c: 50% duty needs to be expressed a a fixed precision + number (2017-02-21). + * Kinetis: Created a kinetis SIM versioning scheme pulled in by Kinetis + chip.h. + + The motvations is to version the IP blocks of the Kinetis K series + family of parts. + + This added versioning and configuration features for the Kinetis SIM IP + block. + + It is envisioned that in the long term as a chip is added. The author + of the new chip definitions will either find the exact configuration in + an existing chip define and add the new chip to it Or add the SIM + feature configuration #defines to the chip ifdef list in + arch/arm/include/kinetis/kinetis_sim.h In either case the author should + mark it as "Verified to Document Number:" taken from the reference + manual. + + The version KINETIS_SIM_VERSION_UKN has been applied to most all the + SoCs in the kinetis arch prior to this commit. + + The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12, All K64 and K66 + which not have Verified SIM configurations. + + From David Sidrane (2017-02-21). + * Created a kinetis PMC versioning scheme pulled in by Kinetis chip.h. + + The motivation is to version the IP blocks of the Kinetis K series + family of parts. This added versioning and configuration features for + the Kinetis PMC IP block. It is envisioned that in the long term as a + chip is added. The author of the new chip definitions will either find + the exact configuration in an existing chip define and add the new chip + to it Or add the PMC fature configuration #defines to the chip ifdef + list in arch/arm/include/kinetis/kinetis_pmc.h In either case the + author should mark it as "Verified to Document Number:" taken from the + reference manual. + + The version KINETIS_PMC_VERSION_UKN has been applied to most all the + SoCs in the kinetis arch prior to this commit. + + The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12, + CONFIG_ARCH_CHIP_MK20DXxxxVLH7 All K64 and K66 have been verified PMC + configurations. From David Sidrane (2017-02-22). + * Kinetis: kinetis_clockconfig uses the correct ACKISO. ACKISO is located + in the PMC_REGSC on the majority of the Kinetis SoCs. With the exception + of the MK40DXxxxZVLQ10 where ACKISO is located in LLWU_CS (2017-02-22). + * Kinetis: Refactor you use SIM_SOPT2_PLLFLLSEL, added warning. The + warning has been added because: SIM_SOPT2_PLLFLLSEL is a clock selection + that may feed many clock subsystem: USB, TPM, SDHCSRC, LPUARTSRC. + Therefore, there needs to be a global board level setting to select the + source for SIM_SOPT2_PLLFLLSEL and then derive all the sub selections + and proper fractions/divisors for each modules clock. From David + Sidrane (2017-02-22). + * Add support to QEncoder on STM32F103Minimum board. From Alan Carvalho + de Assis (2017-02-23). + * Olimex STM32 p407: Add external SRAM support. Unfortunately not usable + or testable unless you also disable the serial console (2017-02-23). + * drivers/spi/Kconfig: There is too much SPI in the configuration menu; + SPI Driver Support menu is empty. From Maciej Wójcik (2017-02-23). + * Kinetis: SIM add paramiterized SIM_CLKDIVx_xxFRAC|DIV macros. The makes + for cleaner board definitions. From David Sidrane (2017-02-23). + * kinetis_enet.c add #define for number of loops for auto negotiation to + complete. From Marc Rechté (2017-02-23). + * STM32F4 Discovery: Fix issues with QEncoder support. From Alan Carvalho + de Assis (2017-02-23). + * sigtimedwait: When timer expires, up_unblock_task() is called. This is + okay in the single CPU case because interrupts are disable in the timer + interrupt handler. But it is insufficient in the SMP case. enter_ and + leave_critical_section() must be called in order to manage spinlocks + correctly (2017-02-23). + * Fix QEncoder driver, based on STM32L4 driver. From Alan Carvalho de + Assis (2017-02-23). + * STM32 QEncoder. Enable clocking to the timer on QE setup; disable clock + on QE teardown (2017-02-23). + * Kinetis: Extend clockconfig to support SOPT2_PLLFLLSEL and + SIM_CLKDIV3. A board.h file can now specify the: 1) + BOARD_SOPT2_PLLFLLSEL to select the output of the SIM_SOPT2 MUX from: + MCGFLLCLK, MCGPLLCLK, USB1PFD, and IRC48MHZ. 2) If it defines + BOARD_SIM_CLKDIV3_FREQ then it must define BOARD_SIM_CLKDIV3_PLLFLLFRAC + and BOARD_SIM_CLKDIV3_PLLFLLDIV which wil be used to cpnfigure + SIM_CLKDIV3 [PLLFLLFRAC, PLLFLLDIV]. From David Sidrane (2017-02-23). + * Kinetis serial: Added configurable 1|2 stop bits. HAVE_SERIAL_CONSOLE + -> HAVE_UART_CONSOLE to be consistent with HAVE_LPUART_CONSOLE naming. + From David Sidrane (2017-02-23). + * Kinetis: Add LPUART serial driver and Clock configuartaion to + freedom-k66f board. Pin out LPUART0 for testing. Define + BOARD_SOPT2_PLLFLLSEL ti select MCGPLLCLK. Define + BOARD_SIM_CLKDIV3_FREQ etal to provide BOARD_LPUART0_FREQ. From David + Sidrane (2017-02-25). + * QEncoder: Add mechanism to assure that architecture-specific IOCTL + commands do not overlap (2017-02-25). + * include/nuttx/analog: Add an ioctl.h header file to coordinate analogic + driver IOCTL commands (2017-02-25). + * CAN: Add infrastructure to assure that all CAN IOCTL commands are + uniquely numbered (2017-02-25). + * Wireless and TSC: Add infrastructure to assure that all IOCTL commands + are uniquely numbered (2017-02-25). + * Add basic support for the STM32F334 and Nucleo F334R8 board. From + Mateusz Szafoni (2017-02-16). + * SAM3/4: GPIO bit numbering typo fixes. From Wolfgang Reißnegger + (2017-02-26). + * Add SDCard support over SPI on STM32F103-Minimum board. From Alan + Carvalho de Assis (2017-02-26). + * option to enable Memory Card debug output was hidden with SD cards + connected through SPI. From Maciej Wójcik (2017-02-27). + * Kinetis serial: Fixed up_rxint - did not disable the RX interuppts. + There was an OR where and AND NOT was needed. From David Sidrane + (2017-02-27). + * Kinetis:Add the configuring SIM_CLKDIV2[USBFRAC, USBDIV] in + kinetis_clockconfig. If a board.h provides BOARD_SIM_CLKDIV2_FREQ it + will configure the SIM_CLKDIV2 based on the additional provided + BOARD_SIM_CLKDIV2_USBFRAC and BOARD_SIM_CLKDIV2_USBDIV. The reason for + doing this globaly is that the output the SIM_CLKDIV2 divisor may be + also used for other IP blocks in future configurations (as is done for + SIM_CLKDIV3). From David Sidrane (2017-02-27). + * Kinetis: Refactor clocking in kinetis_usbdev. (1) Removed + SIM_CLKDIV2[USBFRAC, USBDIV] setting as it is now, done in + kinetis_clockconfig, (2) Use BOARD_USB_CLKSRC to select the clock source + to the USB block, (3) Removed CONFIG_TEENSY_3X_OVERCLOCK from the driver + as the board.h will now provide BOARD_SIM_CLKDIV2_USBDIV and + BOARD_SIM_CLKDIV2_USBFRAC to the kinetis_clockconfig. From David + Sidrane (2017-02-27). + * Kinetis: Use BOARD_xxxx to drive system clocking: (1) Shifted the clock + speed of MK20DX128VLH5 to 48 Mhz to be able to uses USB. (2) Set + BOARD_OUTDIV3 to 0 - there is no BOARD_OUTDIV3 on a MK20DX128VLH5 or + K20DX256VLH7, (3) Added BOARD_SOPT2_PLLFLLSEL and BOARD_SOPT2_FREQ along + with settings for BOARD_SIM_CLKDIV2_USBFRAC and BOARD_SIM_CLKDIV2_USBDIV + base on the BOARD_SOPT2_FREQ. From David Sidrane (2017-02-27). + * Kinetis: Define uart and lpuart versions of [early]serialinit. Add + serial init to centralize UART/LPUART management. Use kinetis_ not up_ + where arch specific. Defined kinetis_[lp]uart_[early]serialinit to + facilitate bring up both UARTs and LPUARTs as devices and a console. + Support ordering and merging of serial devices names. From David + Sidrane (2017-02-27). + * Adapt more drivers to utilize the IRQ argument feature (2107-02-28). + * irq_attach() and type xcpt_t. irq_attach now accepts a argument that + will be provided to the interrupt handler when the interrupt ocurrs. + This affects many files by replace ad hoc parameter passing logic with a + standardized approach. From Mark Schulte (2017-03-01). + * Fix open() a block device with CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y. + From Masayuki Ishikawa (2017-03-01). + * net/: fixed a nullptr-dereference on iob_clone. From Pascal Speck + (2017-03-01). + * configs/: All functions that used to return an xcpt_t old handler value, + not return NULL. The oldhandler value is no longer useful with the + recent changes to the interrupt argument passing (2017-03-02). + * arch_phy_irq: Now returns int instead of xcpt_t oldhandler. The + oldhandler is useless after the changes to the interrupt argument. Also + access an argument for the PHY interrupt. phy_notify.c driver changed + to exploit new interrupt argument passing (2017-03-02). + * STM32/F7/L4: EXTI PVD function no longer returns the xcpt_t oldhandler. + There value is useless and dangerous after the recent changes to + interrupt argument passing (2017-03-02). + * STM3 L4: EXTI COMP function no longer returns the xcpt_t oldhandler. + There value is useless and dangerous after the recent changes to + interrupt argument passing (2017-03-02). + * STM32/F7/L4: EXTI ALARM function no longer returns the xcpt_t + oldhandler. There value is useless and dangerous after the recent + changes to interrupt argument passing (2017-03-02). + * Add support to USB Device on STM32F103-Minimum board. From Alan + Carvalho de Assis (2017-03-02). + * Kinetis GPIO: Pin IRQ logic no longer returns the xcpt_t oldhandler. + There value is useless and dangerous after the recent changes to + interrupt argument passing (2017-03-02). + * STM32 Ethernet: Need two work structures so that pending poll work is + not lost when an interrupt occurs (2017-03-02). + * Kinetis-L GPIO: Pin IRQ logic no longer returns the xcpt_t oldhandler. + There value is useless and dangerous after the recent changes to + interrupt argument passing (2017-03-02). + * PIC32MX: Pin IRQ logic no longer returns the xcpt_t oldhandler. There + value is useless and dangerous after the recent changes to interrupt + argument passing (2017-03-02). + * PIC32MZ: Pin IRQ logic no longer returns the xcpt_t oldhandler. There + value is useless and dangerous after the recent changes to interrupt + argument passing (2017-03-02). + * STM32 L4: Pin IRQ logic no longer returns the xcpt_t oldhandler. There + value is useless and dangerous after the recent changes to interrupt + argument passing (2017-03-02). + * Tiva: Pin IRQ logic no longer returns the xcpt_t oldhandler. There + value is useless and dangerous after the recent changes to interrupt + argument passing (2017-03-02). + * board_button_irq: Button IRQ logic no longer returns the xcpt_t + oldhandler. There value is useless and dangerous after the recent + changes to interrupt argument passing (2017-03-02). + * stm32_gpiosetevent: GPIO IRQ logic no longer returns the xcpt_t + oldhandler. This value is useless and dangerous after the recent + changes to interrupt argument passing (2017-03-02). + * Implements support for smaller interrupt tables as described at + http://www.nuttx.org/doku.php?id=wiki:howtos:smallvectors . This is + largely the work of Mark Schulte. However, I have made several changes + to match with the Wiki document. If you like the change, thanks go to + Marc. For any errors you can blame me (2017-03-03). + * Experimental change to STM32 Ethernet driver a success. Porting change + to all other Ethernet drivers (2017-03-03). + * FS: Don't build block driver proxy if PSEUDOFS_OPERATIONS are disabled + (2017-03-04). + * drivers/net: Add framework for serialization in the case where multiple + low-priority work queues are used (2017-03-04). + * net/drivers/skeleton.c: Back out serialization changes of the last + commit. They are not necessary in the skeleton.c example because the + calls to net_lock() at the beginning of each worker function will + enforce serialization (2017-03-04). + * STM32F33XX DAC, OPAMP, COMP and ADC headers. From Mateusz Szafoni + (2017-03-04). + * STM32 F7 SDMMC: Use new interrupt argument facility (2017-03-05). + * stm32f33xxx: Add HRTIM header file. From Mateusz Szafoni (2017-03-05). + * sendfile(): Fix error introduced with commit + ff73be870e38959b0aaee5961dc47b4b58dc2d86. Noted by Maciej Wójcik + (2017-03-05). + * Kinetis: Eliminate warning when USE_EARLYSERIALINIT is not defined + (2017-03-05). + * STM3210E-EVAL: Eliminte a warning. Return type of board_button_irq is + now type int (2017-03-05). + * dk-tm4c129x: Remove warning for variable that is set but not used + (2017-03-05). + * SAMA5D4-EK: Eliminate warning. Correct type of return value + (2017-03-05). + * STM32F103 Minimum: Eliminate warning stm32_usbdev.o givne twice in same + rule (2017-03-05). + * STM32 OTGHS host: stm32_in_transfer() fails and returns NAK if a + short transfer is received. This causes problems from class drivers + like CDC/ACM where short packets are expected. In those protocols, + any transfer may be terminated by sending short or NUL packet. From + Janne Rosberg. Adapt Janne Rosberg's patch to STM32 OTGHS host to + OTGFS host, and to similar USB host implementations for STM32 L4 and + F7 (2017-03-07). + * usbhost_cdcacm: fix tx outbuffer overflow and remove now invalid + assert. From Janne Rosberg (2017-03-07). + +7.21 2017-xx-xx Gregory Nutt diff --git a/Directories.mk b/Directories.mk index 6eeedc79e8a484095ca15f31ccaf20cb9212bad9..2e55b91a94007f210ad4b6ab58700092a32e3bb3 100644 --- a/Directories.mk +++ b/Directories.mk @@ -59,7 +59,10 @@ endif # # FSDIRS depend on file descriptor support; NONFSDIRS do not (except for parts # of FSDIRS). We will exclude FSDIRS from the build if file descriptor -# support is disabled +# support is disabled. NOTE that drivers, in general, depends on file +# descriptor support but is always built because there are other components +# in the drivers directory that are needed even if file descriptors are not +# supported. # CONTEXTDIRS include directories that have special, one-time pre-build # requirements. Normally this includes things like auto-generation of # configuration specific files or creation of configurable symbolic links @@ -69,9 +72,9 @@ endif # be cleaned to prevent garbage from collecting in them when changing # configurations. -NONFSDIRS = sched configs $(ARCH_SRC) $(NUTTX_ADDONS) -FSDIRS = fs drivers binfmt -CONTEXTDIRS = $(APPDIR) +NONFSDIRS = sched drivers configs $(ARCH_SRC) $(NUTTX_ADDONS) +FSDIRS = fs binfmt +CONTEXTDIRS = configs $(APPDIR) USERDIRS = OTHERDIRS = lib @@ -111,6 +114,10 @@ else OTHERDIRS += syscall endif +ifeq ($(CONFIG_LIB_ZONEINFO_ROMFS),y) +CONTEXTDIRS += libc +endif + ifeq ($(CONFIG_NX),y) NONFSDIRS += graphics libnx CONTEXTDIRS += graphics libnx diff --git a/Documentation/NuttShell.html b/Documentation/NuttShell.html index 90e0764a791c20dd8c349a0b56497801b229a664..987f8a7177964283f154f29d0e468339015912b7 100644 --- a/Documentation/NuttShell.html +++ b/Documentation/NuttShell.html @@ -8,7 +8,7 @@

NuttShell (NSH)

-

Last Updated: February 8, 2016

+

Last Updated: February 5, 2017

@@ -263,223 +263,235 @@
- 2.30 List Directory Contents (ls) + 2.30 List to a File or Directory (ln)
- 2.31 Show information about installed OS modules (lsmod) + 2.31 List Directory Contents (ls)
- 2.32 Calculate MD5 (md5) + 2.32 Show information about installed OS modules (lsmod)
- 2.33 Access Memory (mb, mh, and mw) + 2.33 Calculate MD5 (md5)
- 2.34 Show Current Tasks and Threads (ps) + 2.34 Access Memory (mb, mh, and mw)
- 2.35 Create a Directory (mkdir) + 2.35 Show Current Tasks and Threads (ps)
- 2.36 Create a FAT Filesystem (mkfatfs) + 2.36 Create a Directory (mkdir)
- 2.37 Create a FIFO (mkfifo) + 2.37 Create a FAT Filesystem (mkfatfs)
- 2.38 Create a RAMDISK (mkrd) + 2.38 Create a FIFO (mkfifo)
- 2.39 Mount a File System (mount) + 2.39 Create a RAMDISK (mkrd)
- 2.40 Rename a File (mv) + 2.40 Mount a File System (mount)
- 2.41 Mount an NFS file system (nfsmount) + 2.41 Rename a File (mv)
- 2.42 Lookup a network address (nslookup) + 2.42 Mount an NFS file system (nfsmount)
- 2.43 Change a User's Password (passwd) + 2.43 Lookup a network address (nslookup)
- 2.44 Check Network Peer (ping/ping6) + 2.44 Change a User's Password (passwd)
- 2.45 Shut the system down (poweroff) + 2.45 Check Network Peer (ping/ping6)
- 2.46 Send File Via TFTP (put) + 2.46 Shut the system down (poweroff)
- 2.47 Show Current Working Directory (pwd) + 2.47 Send File Via TFTP (put)
- 2.48 Reset and reboot the system (reboot) + 2.48 Show Current Working Directory (pwd)
- 2.49 Remove a File (rm) + 2.49 Show target of a link (readlink)
- 2.50 Remove a Directory (rmdir) + 2.50 Reset and reboot the system (reboot)
- 2.51 Remove on OS Module (rmmod) + 2.51 Remove a File (rm)
- 2.52 Set an Environment Variable (set) + 2.52 Remove a Directory (rmdir)
- 2.53 Execute an NSH Script (sh) + 2.53 Remove on OS Module (rmmod)
- 2.54 Shut the system down (shutdown) + 2.54 Set an Environment Variable (set)
- 2.55 Wait for Seconds (sleep) + 2.55 Execute an NSH Script (sh)
- 2.56 Time execution of another command (time) + 2.56 Shut the system down (shutdown)
- 2.57 Unmount a File System (umount) + 2.57 Wait for Seconds (sleep)
- 2.58 Print system information (uname) + 2.58 Time execution of another command (time)
- 2.59 Unset an Environment Variable (unset) + 2.59 Unmount a File System (umount)
- 2.60 URL Decode (urldecode) + 2.60 Print system information (uname)
- 2.61 URL Encode (urlencode) + 2.61 Unset an Environment Variable (unset)
- 2.62 Add a New User (useradd) + 2.62 URL Decode (urldecode)
- 2.63 Delete a user (userdel) + 2.63 URL Encode (urlencode)
- 2.64 Wait for Microseconds (usleep) + 2.64 Add a New User (useradd)
- 2.65 Get File Via HTTP (wget) + 2.65 Delete a user (userdel)
- 2.66 Hexadecimal Dump of Memory (xd) + 2.66 Wait for Microseconds (usleep) + + + +
+ + 2.67 Get File Via HTTP (wget) + + + +
+ + 2.68 Hexadecimal Dump of Memory (xd) @@ -1681,13 +1693,6 @@ hexdump <file or device> Dump data in hexadecimal format from a file or character device.

- -
- - - - - + + + + + - + @@ -3277,7 +3328,7 @@ nsh> - + @@ -5165,10 +5216,10 @@ xxd -i romfs_img >nsh_romfsimg.h
  • CONFIG_NSH_ROMFSETC
  • CONFIG_NSH_ARCHROMFS
  • CONFIG_NSH_ROMFSMOUNTPT
    • +
  • CONFIG_NSH_ROMFSSECTSIZE
    • @@ -1937,7 +1942,32 @@ losetup d <dev-path> + +
    -

    2.30 List Directory Contents (ls)

     +

    2.30 List to a File or Directory (ln)

     +
    + +

    Command Syntax:

    +
      +link [-s] <target> <link>
+
    +

    + Synopsis. + The link command will create a new symbolic link at <link> for the existing file or directory, <target>. + This implementation is simplied for use with NuttX in these ways: +

    +
      +
    • Links may be created only within the NuttX top-level, pseudo file system. + No file system currently supported by NuttX provides symbolic links.
      • +
    • For the same reason, only soft links are implemented.
      • +
    • File privileges are ignored.
      • +
    • c_time is not updated.
      • +
    + + + +
    +

    2.31 List Directory Contents (ls)
    @@ -1975,7 +2005,7 @@ ls [-lRs] <dir-path>
    -

    2.31 Show information about installed OS modules (lsmod)

     +

    2.32 Show information about installed OS modules (lsmod)
    @@ -2008,7 +2038,7 @@ mydriver 20404659 20404625 0 20404580 552 204047a8 0
    -

    2.32 Calculate MD5 (md5)

     +

    2.33 Calculate MD5 (md5)
    @@ -2025,7 +2055,7 @@ md5 [-f] <string or filepath>
    -

    2.33 Access Memory (mb, mh, and mw)

     +

    2.34 Access Memory (mb, mh, and mw)
    @@ -2079,7 +2109,7 @@ nsh>
    -

    2.34 Show Current Tasks and Threads (ps)

     +

    2.35 Show Current Tasks and Threads (ps)
    @@ -2113,7 +2143,7 @@ nsh> mount -t procfs /proc
    -

    2.35 Create a Directory (mkdir)

     +

    2.36 Create a Directory (mkdir)
    @@ -2148,7 +2178,7 @@ nsh>
    -

    2.36 Create a FAT Filesystem (mkfatfs)

     +

    2.37 Create a FAT Filesystem (mkfatfs)
    @@ -2173,7 +2203,7 @@ mkfatfs [-F <fatsize>] <block-driver>
    -

    2.37 Create a FIFO (mkfifo)

     +

    2.38 Create a FIFO (mkfifo)
    @@ -2211,7 +2241,7 @@ nsh>
    -

    2.38 Create a RAMDISK (mkrd)

     +

    2.39 Create a RAMDISK (mkrd)
    @@ -2262,7 +2292,7 @@ nsh>
    -

    2.39 Mount a File System (mount)

     +

    2.40 Mount a File System (mount)
    @@ -2341,7 +2371,7 @@ nsh> mount
    -

    2.40 Rename a File (mv)

     +

    2.41 Rename a File (mv)
    @@ -2359,7 +2389,7 @@ mv <old-path> <new-path>
    -

    2.41 Mount an NFS file system (nfsmount)

     +

    2.42 Mount an NFS file system (nfsmount)
    @@ -2378,7 +2408,7 @@ nfsmount <server-address> <mount-point> <remote-path>
    -

    2.42 Lookup a network address (nslookup)

     +

    2.43 Lookup a network address (nslookup)
    @@ -2395,7 +2425,7 @@ nslookup <host-name>
    -

    2.43 Change a User's Password (passwd)

     +

    2.44 Change a User's Password (passwd)
    @@ -2412,7 +2442,7 @@ passwd <username> <password>
    -

    2.44 Check Network Peer (ping/ping6)

     +

    2.45 Check Network Peer (ping/ping6)
    @@ -2449,7 +2479,7 @@ nsh>
    -

    2.45 Shut the system down (poweroff)

     +

    2.46 Shut the system down (poweroff)
    @@ -2471,7 +2501,7 @@ poweroff
    -

    2.46 Send File Via TFTP (put)

     +

    2.47 Send File Via TFTP (put)
    @@ -2506,7 +2536,7 @@ put [-b|-n] [-f <remote-path>] -h <ip-address> <local-path>
    -

    2.47 Show Current Working Directory (pwd)

     +

    2.48 Show Current Working Directory (pwd)
    @@ -2536,7 +2566,24 @@ nsh> + +
    -

    2.48 Reboot the system (reboot)

     +

    2.49 Show target of a link (readlink)

     +
    + +

    Command Syntax:

    +
      +readlink <link>
+
    +

    + Synopsis. + Show the target of the soft link at the path <link>. +

    + + + +
    +

    2.50 Reboot the system (reboot)
    @@ -2550,7 +2597,6 @@ reboot Reset and reboot the system immediately. This command depends on hardware support to reset the system.

    -

    NOTE: Supporting both the reboot and shutdown commands is redundant.

    @@ -2558,7 +2604,7 @@ reboot
    -

    2.49 Remove a File (rm)

     +

    2.51 Remove a File (rm)
    @@ -2592,7 +2638,7 @@ nsh>
    -

    2.50 Remove a Directory (rmdir)

     +

    2.52 Remove a Directory (rmdir)
    @@ -2627,7 +2673,7 @@ nsh>
    -

    2.51 Remove on OS Module (rmmod)

     +

    2.53 Remove on OS Module (rmmod)
    @@ -2655,7 +2701,7 @@ nsh>
    -

    2.52 Set an Environment Variable (set)

     +

    2.54 Set an Environment Variable (set)
    @@ -2681,7 +2727,7 @@ nsh>
    -

    2.53 Execute an NSH Script (sh)

     +

    2.55 Execute an NSH Script (sh)
    @@ -2700,7 +2746,7 @@ sh <script-path>
    -

    2.54 Shut the system down (shutdown)

     +

    2.56 Shut the system down (shutdown)
    @@ -2721,7 +2767,7 @@ shutdown [--reboot]
    -

    2.55 Wait for Seconds (sleep)

     +

    2.57 Wait for Seconds (sleep)
    @@ -2738,7 +2784,7 @@ sleep <sec>
    -

    2.56 Time execution of another command (time)

     +

    2.58 Time execution of another command (time)
    @@ -2797,7 +2843,7 @@ nsh>
    -

    2.57 Unmount a File System (umount)

     +

    2.59 Unmount a File System (umount)
    @@ -2827,7 +2873,7 @@ nsh>
    -

    2.58 Print system information (uname)

     +

    2.60 Print system information (uname)
    @@ -2894,7 +2940,7 @@ uname [-a | -imnoprsv]
    -

    2.59 Unset an Environment Variable (unset)

     +

    2.61 Unset an Environment Variable (unset)
    @@ -2920,7 +2966,7 @@ nsh>
    -

    2.60 URL Decode (urldecode)

     +

    2.62 URL Decode (urldecode)
    @@ -2937,7 +2983,7 @@ urldecode [-f] <string or filepath>
    -

    2.61 URL Encode (urlencode)

     +

    2.63 URL Encode (urlencode)
    @@ -2954,7 +3000,7 @@ urlencode [-f] <string or filepath>
    -

    2.62 Add a New User (useradd)

     +

    2.64 Add a New User (useradd)
    @@ -2971,7 +3017,7 @@ useradd <username> <password>
    -

    2.63 Delete a user (userdel)

     +

    2.65 Delete a user (userdel)
    @@ -2988,7 +3034,7 @@ userdel <username>
    -

    2.64 Wait for Microseconds (usleep)

     +

    2.66 Wait for Microseconds (usleep)
    @@ -3005,7 +3051,7 @@ usleep <usec>
    -

    2.65 Get File Via HTTP (wget)

     +

    2.67 Get File Via HTTP (wget)
    @@ -3032,7 +3078,7 @@ wget [-o <local-path>] <url>
    -

    2.66 Hexadecimal Dump of Memory (xd)

     +

    2.68 Hexadecimal Dump of Memory (xd)
    @@ -3241,10 +3287,15 @@ nsh>     		!CONFIG_DISABLE_MOUNTPOINT && CONFIG_NFILE_DESCRIPTORS > 0 && CONFIG_DEV_LOOP CONFIG_NSH_DISABLE_LOSETUP
    lnCONFIG_NFILE_DESCRIPTORS > 0CONFIG_NSH_DISABLE_LL
    ls CONFIG_NFILE_DESCRIPTORS > 0CONFIG_NSH_DISABLE_LSCONFIG_NSH_DISABLE_LS && CONFIG_PSEUDOFS_SOFTLINKS
    lsmod
    mkfifoCONFIG_NFILE_DESCRIPTORS > 0CONFIG_NFILE_DESCRIPTORS > 0 && CONFIG_PIPES && CONFIG_DEV_FIFO_SIZE > 0 CONFIG_NSH_DISABLE_MKFIFO

    NuttX RTOS

    -

    Last Updated: April 12, 2016

    +

    Last Updated: March 8, 2017
    @@ -146,13 +146,11 @@ to support a rich, multi-threaded development environment for deeply embedded processors.

    - NON-GOALS: (1) It is not a goal to provide the level of OS features like those provided by Linux. + NON-GOALS: It is not a goal to provide the level of OS features like those provided by Linux. In order to work with smaller MCUs, small footprint must be more important than an extensive feature set. But standard compliance is more important than small footprint. Surely a smaller RTOS could be produced by ignoring standards. Think of NuttX is a tiny Linux work-alike with a much reduced feature set. - (2) There is no MMU-based support for processes. - At present, NuttX assumes a flat address space.

    @@ -319,7 +317,7 @@

    -

  • POSIX/ANSI-like task controls, named message queues, counting semaphores, clocks/timers, signals, pthreads, environment variables, filesystem.
    • +
  • POSIX/ANSI-like task controls, named message queues, counting semaphores, clocks/timers, signals, pthreads, cancellation points, environment variables, filesystem.

    • @@ -362,7 +360,7 @@

    -

  • Loadable kernel modules.
    • +
  • Loadable kernel modules; lightweight, embedded shared libraries.

    • @@ -389,9 +387,10 @@

    -

  • Inheritable "controlling terminals" and I/O re-direction.
    • +
  • Inheritable "controlling terminals" and I/O re-direction. Pseudo-terminals

    • +
    @@ -1003,7 +1002,7 @@

    -

  • USB device controller drivers available for the PIC32, Atmel AVR, SAM3, SAM4, and SAMA5Dx, NXP LPC17xx, LPC214x, LPC313x, and LPC43xx, Silicon Laboraties EFM32, STMicro STM32 F1, F2, F3, and F4, and TI DM320.
    • +
  • USB device controller drivers available for the PIC32, Atmel AVR, SAM3, SAM4, SAMv7, and SAMA5Dx, NXP/Freescale LPC17xx, LPC214x, LPC313x, LPC43xx, and Kinetis, Silicon Laboraties EFM32, STMicro STM32 F1, F2, F3, F4, and F7, and TI DM320.

    • @@ -1340,11 +1339,11 @@

    Released Versions

    In addition to the ever-changing GIT repository, there are frozen released versions of NuttX available. - The current release is NuttX 7.15. - NuttX 7.15 is the 115th release of NuttX. - It was released on March 27, 2016, and is available for download from the + The current release is NuttX 7.20. + NuttX 7.20 is the 120th release of NuttX. + It was released on March 8, 2016, and is available for download from the Bitbucket.org website. - Note that the release consists of two tarballs: nuttx-7.15.tar.gz and apps-7.15.tar.gz. + Note that the release consists of two tarballs: nuttx-7.20.tar.gz and apps-7.20.tar.gz. Both may be needed (see the top-level nuttx/README.txt file for build information).

    @@ -1353,7 +1352,7 @@ @@ -1865,7 +1865,7 @@ The basic port (timer interrupts, serial ports, network, framebuffer, etc.) is complete. All implemented features have been verified with the exception of the USB device-side driver; that implementation is complete but untested. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -1901,7 +1901,7 @@ However, as of this writing, I have not had the opportunity to verify this new feature.

    - Refer to the Embedded Artists EA3131 board README file for further information. + Refer to the Embedded Artists EA3131 board README file for further information.

    @@ -1917,7 +1917,7 @@ NOTE: That driver should work on the EA3131 as well. However, the EA3131 uses a PCA9532 PWM part to controller the port power so the it would not quite be a simple drop-in.

    - Refer to the Olimex LPC-H3131 board README file for further information. + Refer to the Olimex LPC-H3131 board README file for further information.

    @@ -1945,7 +1945,7 @@ At this point, verification of the EA3152 port has been overcome by events and may never happen. However, the port is available for anyone who may want to use it. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -2137,7 +2137,7 @@ NuttX-7.4 added support for the on-board WM8904 CODEC chip and for Tickless operation.

    - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

  • @@ -2158,7 +2158,7 @@ The SAMA5D3 Xplained board does not have NOR FLASH and, as a consequence NuttX must boot into SDRAM with the help of U-Boot.

    - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    • @@ -2189,7 +2189,7 @@ The TM7000 LCDC with the maXTouch multi-touch controller are also fully support in a special NxWM configuration for that larger display. Support for a graphics media player is included (although there were issues with the WM8904 audio CODEC on my board). An SRAM bootloader was also included. - Refer to the NuttX board README file for current status. + Refer to the NuttX board README file for current status.

    @@ -2232,7 +2232,7 @@ This port was developed on the v1 board, but the others may be compatible:

    - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    STATUS. @@ -2257,20 +2257,24 @@

    NXP/Freescale i.MX6. - A port is underway for the following i.MX6 board + The basic port has been completed for the following i.MX6 board

    • Sabre-6Quad. This is a port to the NXP/Freescale Sabre-6Quad board. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

      STATUS: - The basic, minimal port is code complete and introduced in NuttX-7.15, but has not yet been tested. - I am still waiting for the reciept of the Sabre board. - Expect to see the verified Sabre-6Quad support (with SMP!) in NuttX-7.16. + The basic, minimal port is code complete and introduced in NuttX-7.15, but had not yet been tested at that time due to the inavailability of hardware. + This basic port was verified in the NuttX-7.16 release, however. + The port is still mininal and more device drivers are needed to make the port usable. +

      +

      + Basic support of NuttX running in SMP mode on the i.MX6Q was also accomplished in NuttX-7.16. + However, there are still known issues with SMP support on this platform as described in the README file for the board.

    @@ -2294,13 +2298,13 @@

    STATUS. This is currently in progress but the effort is stalled due to tool-related issues. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    Toolchain: The TMS570 is a big-endian ARM platform and requires a big-endian ARM toolchain. All testing has been performed using a big-endian NuttX buildroot toolchain. - Instructions for building this toolchain are included in the board README file. + Instructions for building this toolchain are included in the board README file.

    @@ -2325,7 +2329,7 @@ This initial support is very minimal: There is a NuttShell (NSH) configuration that might be the basis for an application development. As of this writing, more device drivers are needed to make this a more complete port. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    Memory Usage. @@ -2389,7 +2393,7 @@ nsh> As of NuttX-6.28 more device driver development would be needed to make this a complete port, particularly to support USB OTG. A TSI and a SPI driver were added in NuttX-6.29. Alan contributed a PWM driver in NuttX-6.32. - Refer to the Freedom KL25Z board README file for further information. + Refer to the Freedom KL25Z board README file for further information.

    @@ -2403,7 +2407,7 @@ nsh> STATUS. This is the work of Michael Hope. Verified, initial support for the Teensy-LC first appeared in NuttX-7.10. - Refer to the Teensy-LC board README file for further information. + Refer to the Teensy-LC board README file for further information.

    @@ -2427,7 +2431,7 @@ nsh> This work was contributed in NuttX 7.8 by Derek B. Noonburg. The board support is very similar to the Freedom-KL25Z. It was decided to support this a a separate board, however, due to some small board-level differences. - Refer to the Freedom KL26Z board README file for further information. + Refer to the Freedom KL26Z board README file for further information.

    @@ -2450,7 +2454,7 @@ nsh> The initial SAMD20 Xplained Pro release (NuttX 7.1) included a functional NuttShell (NSH) configuration. An SPI driver was also included to support the OLED1 and I/O1 modules. That SPI driver, however, was not completed verified due to higher priority tasks that came up (I hope to get back to this later). - Refer to the SAMD20 Explained Pro board README file for further information. + Refer to the SAMD20 Explained Pro board README file for further information.

    @@ -2474,7 +2478,7 @@ nsh> Initial support for the SAML21 Xplained Pro was release in the NuttX 7.10. This initial support included a basic configuration for the NuttShell (NSH) (see the NSH User Guide). - Refer to the SAML21 Explained Pro board README file for further information. + Refer to the SAML21 Explained Pro board README file for further information.

    @@ -2496,7 +2500,7 @@ nsh>

    STATUS: The first released version was provided in NuttX 7.10. - Refer to the board README.txt file for further information. + Refer to the board README.txt file for further information.

    @@ -2537,7 +2541,7 @@ nsh>

    STATUS: This port was was released in NuttX 6.14. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -2561,7 +2565,7 @@ nsh> The current port includes timer, serial console, Ethernet, SSI, and microSD support. There are working configurations to run the NuttShell (NSH), the NuttX networking test, and the uIP web server. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -2601,7 +2605,7 @@ nsh> NOTE: As it is configured now, you MUST have a network connected. Otherwise, the NSH prompt will not come up because the Ethernet driver is waiting for the network to come up. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -2627,7 +2631,7 @@ nsh> STATUS: This port was released in NuttX 5.10. Features are the same as with the Eagle-100 LM3S6918 described above. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -2644,7 +2648,7 @@ nsh> Header file support was contributed by Tiago Maluta for this part. Jose Pablo Rojas V. is used those header file changes to port NuttX to the TI/Stellaris EKK-LM3S9B96. That port was available in the NuttX-6.20 release. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -2687,7 +2691,7 @@ nsh> DMA and USART-based SPI supported are included, but not fully tested.

    - Refer to the EFM32 Gecko Starter Kit README.txt file for further information. + Refer to the EFM32 Gecko Starter Kit README.txt file for further information.

  • @@ -2711,7 +2715,7 @@ nsh> The board suppport is complete but untested because of tool-related issues. An OpenOCD compatible, SWD debugger would be required to make further progress in testing.

    - Refer to the Olimex EFM32G880F120-STK README.txt for further information. + Refer to the Olimex EFM32G880F120-STK README.txt for further information.

    • @@ -2806,7 +2810,7 @@ nsh> This initial support includes a configuration using the NuttShell (NSH) that might be the basis for an application development. A driver for the on-board segment LCD is included as well as an option to drive the segment LCD from an NSH "built-in" command. As of this writing, a few more things are needed to make this a more complete port: 1) Verfication of more device drivers (timers, quadrature encoders, PWM, etc.), and 2) logic that actually uses the low-power consumption modes of the EnergyLite part. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    Memory Usage. @@ -2873,7 +2877,7 @@ nsh> STM32VL-Discovery. In NuttX-6.33, support for the STMicro STM32VL-Discovery board was contributed by Alan Carvalho de Assis. The STM32VL-Discovery board features an STM32F100RB MCU. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -2907,16 +2911,30 @@ nsh>

    STMicro STM32F103C4/8 (STM32 F1 Low- and Medium-Density Family). - This port is for "STM32 Tiny" development board. - This board is available from several vendors on the net, and may be sold under different names. - It is based on a STM32 F103C8T6 MCU, and is bundled with a nRF24L01 wireless communication module. + There are two ports available for this family:

      -

      - STATUS: +

    • +

      + One port is for "STM32 Tiny" development board. + This board is available from several vendors on the net, and may be sold under different names. + It is based on a STM32 F103C8T6 MCU, and is bundled with a nRF24L01 wireless communication module. +

      +
      • +
    • +

      + The other port is for a generic minimual STM32F103CBT6 "blue" board contributed by Alan Carvalho de Assis. + Alan added support for numerous sensors, tone generators, user LEDs, and LCD support in NuttX 7.18. +

      +
      • +
    +

    + STATUS: + +

      The basic STM32F103C8 port was released in NuttX version 6.28. This work was contributed by Laurent Latil. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -2941,21 +2959,21 @@ nsh> STM3210E-EVAL. A port for the STMicro STM3210E-EVAL development board that features the STM32F103ZET6 MCU. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

  • HY-Mini STM32v board. This board is based on the STM32F103VCT chip. Port contributed by Laurent Latil. - Refer to the NuttX board README file. + Refer to the NuttX board README file.

  • The M3 Wildfire development board (STM32F103VET6), version 2. See http://firestm32.taobao.com (the current board is version 3). - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

  • @@ -2963,7 +2981,7 @@ nsh> LeafLab's Maple and Maple Mini boards. These boards are based on the STM32F103RBT6 chip for the standard version and on the STM32F103CBT6 for the mini version. See the LeafLabs web site for hardware information; - see the NuttX board README file for further information about the NuttX port. + see the NuttX board README file for further information about the NuttX port.

  • @@ -2972,7 +2990,7 @@ nsh> The Spark boards are based on the STM32F103CBT6 chip and feature wireless networking using the TI CC3000 WLAN module. See the Spark web site for hardware information; The emulated Spark is a base board for the Maple Mini board (see above) developed by David Sidrane that supports Spark development while we all way breathlessly for or Spark boards. - see the NuttX board README file for further information about the NuttX port. + see the NuttX board README file for further information about the NuttX port.

    Initially Spark support was introduced in NuttX 6.31 and completed in NuttX 6.32. @@ -3061,12 +3079,26 @@ nsh>
    + +
    + +

    + STMicro STM32F105x. + Architecture support (only) for the STM32 F105R was contribed in NuttX-7.17 by Konstantin Berezenko. + There is currently no support for boards using any STM32F105x parts in the source tree. +

    + + + +
    +
    +

    STMicro STM32F107x (STM32 F1 "Connectivity Line" family). - Chip support for the STM32 F1 "Connectivity Line" family has been present in NuttX for some time and users have reported that they have successful brought up NuttX on there proprietary boards using this logic. + Chip support for the STM32 F1 "Connectivity Line" family has been present in NuttX for some time and users have reported that they have successful brought up NuttX on theor proprietary boards using this logic.

    • @@ -3093,7 +3125,7 @@ nsh> (1) Basic Cortex-M3 port, (2) Ethernet, (3) On-board LEDs. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    • @@ -3120,7 +3152,17 @@ nsh> STATUS: Networking and touchscreen support are well test. But, at present, neither USB nor LCD functionality have been verified. - Refer to the SViewtool STM32F103/F107 README file for further information. + Refer to the Viewtool STM32F103/F107 README file for further information. +

      +
      • +
    • +

      + Kamami STM32 Butterfly 2 + Support for the Kamami STM32 Butterfly 2 was contributed by Michał Łyszczek in NuttX-7.18. That port features the STMicro STM32F107VC MCU. +

      +

      + STATUS: + A configuration for the NuttShell (NSH), NSH with networking, and NSH with USB host are available and verified.

      • @@ -3160,11 +3202,17 @@ nsh>

      - STATUS: - The peripherals of the STM32 F2 family are compatible with the STM32 F4 family. - See discussion of the STM3240G-EVAL board below for further information. - Refer also to the NuttX board README file for further information. -
    +

    + STATUS: + The peripherals of the STM32 F2 family are compatible with the STM32 F4 family. + See discussion of the STM3240G-EVAL board below for further information. + Refer also to the NuttX board README file for further information. +

    +

    + Support for both the IAR and uVision GCC IDEs added for the STM3220G-EVAL board in NuttX 7.16. + From Kha Vo. +

    + @@ -3196,7 +3244,7 @@ nsh>

    Subsequent NuttX releases will extend this port and add support for the SDIO-based SD cards and USB device. - Refer to the NuttX board README file for further information about this port. + Refer to the NuttX board README file for further information about this port.

    @@ -3226,7 +3274,7 @@ nsh> STATUS: As of this writing, the basic port is code complete and a fully verified configuration exists for the NuttShell NSH). The first fully functional Arduino Due port was released in NuttX-6.29. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -3318,7 +3366,7 @@ nsh>

    • Support for the mbed board was contributed by Dave Marples and released in NuttX-5.11. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -3342,7 +3390,7 @@ nsh> The NuttX-5.17 released added support for low-speed USB devices, interrupt endpoints, and a USB host HID keyboard class driver.
  • - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    • @@ -3361,7 +3409,7 @@ nsh> An fully verified board configuration is included in NuttX-6.2. The Code Red toolchain is supported under either Linux or Windows. Verified configurations include DHCPD, the NuttShell (NSH), NuttX graphis (NX), THTTPD, and USB mass storage device. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

  • @@ -3372,7 +3420,7 @@ nsh> The initial release was included NuttX-6.26. The Nuttx Buildroot toolchain is used by default. Verifed configurations include the "Hello, World!" example application and a THTTPD demonstration. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

  • @@ -3380,7 +3428,7 @@ nsh>

    This board configuration was contributed and made available in NuttX-6.20. As contributed board support, I am unsure of what all has been verfied and what has not. - See the Microment website Lincoln60 board and the NuttX board README file for further information about the Lincoln board. + See the Microment website Lincoln60 board and the NuttX board README file for further information about the Lincoln board.

  • @@ -3388,7 +3436,7 @@ nsh>

    This board configuration was contributed by Vladimir Komendantskiy and made available in NuttX-7.15. This is a variant of the LPCXpresso LPC1768 board support with special provisions for the U-Blox Model Evaluation board. - See the NuttX board README file for further information about this port. + See the NuttX board README file for further information about this port.

    • @@ -3423,7 +3471,7 @@ nsh> The NSH configuration includes verified support for a DMA-based SD card interface. The frame-buffer LCD driver is functional and uses the SDRAM for frame-buffer memory. A touchscreen interface has been developed but there appears to be a hardware issue with the WaveShare implementation of the XPT2046 touchscreen controller. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information. @@ -3446,7 +3494,7 @@ nsh>

      STATUS: - Refer to the Teensy-3.1 board README file for further information. + Refer to the Teensy-3.1 board README file for further information.

    @@ -3474,7 +3522,7 @@ nsh> (2) bring up the NuttShell NSH, (3) develop support for the SDHC-based SD card, (4) develop support for USB host and device, and (2) develop an LCD driver. NOTE: Some of these remaining tasks are shared with the K60 work described below. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -3488,7 +3536,7 @@ nsh>

    FreeScale Kinetis K60. - This port uses the Freescale Kinetis TWR-K60N512 tower system. + This port uses the Freescale Kinetis TWR-K60N512 tower system. Refer to the Freescale web site for further information about this board. The TWR-K60N51 includes with the FreeScale Tower System which provides (among other things) a DBP UART connection.

    @@ -3499,20 +3547,96 @@ nsh> An additional, validated configuration exists for the NuttShell (NSH, see the NSH User Guide). This basic TWR-K60N512 first appeared in NuttX-6.8. + Refer to the NuttX board README file for further information. +

    + +

    + MK60N512VLL100. + Architecture support for the MK60N512VLL100 was contributed by Andrew Webster in NuttX-7.14. +

    + + + +
    +
    + + +
    + +

    + FreeScale Kinetis K64. + Support for the Kinetis K64 family and specifically for the NXP/Freescale Freedom K64F board was added in NuttX 7.17. + Initial release includes two NSH configurations with support for on-board LEDs, buttons, and Ethernet with the on-board KSZ8081 PHY. + SDHC supported has been integrated, but not verified. + Refer to the NuttX board README file for further information. +

    +

    + MK64FN1M0VMD12. + Architecture support for the _MK64FN1M0VMD12 was contributed by Maciej Skrzypek in NuttX-7.20. +

    +

    + Freescale Kinetis TWR-K64F120M. + Support for the Freescale Kinetis TWR-K64F120M was contributed in NuttX-7.20 by Maciej Skrzypek. Refer to the Freescale web site for further information about this board. + The board may be complemented by TWR-SER which includes (among other things), an RS232 and Ethernet connections. + Refer to the NuttX board README file for further information. +

    + + + +
    + +

    + Driver Status. +

    +
      +
    • + NuttX-6.8. Ethernet and SD card (SDHC) drivers also exist: The SDHC driver is partially integrated in to the NSH configuration but has some outstanding issues. - the Ethernet driver became stable in NuttX-7.14 thanks to the efforts of Andrew Webster. Additional work remaining includes: (1) integrate th SDHC drivers, and (2) develop support for USB host and device. NOTE: Most of these remaining tasks are the same as the pending K40 tasks described above. - Refer to the NuttX board README file for further information. -

      +
      • +
    • + NuttX-7.14. + The Ethernet driver became stable in NuttX-7.14 thanks to the efforts of Andrew Webster. +
    • + NuttX-7.17. + Ethernet support was extended and verified on the Freedom K64F. + A Kinetis USB device controller driver and PWM support was contributed by kfazz. +
    + + + +
    +
    + + +
    +

    - MK60N512VLL100. - Architecture support for the MK60N512VLL100 was contributed by Andrew Webster in NuttX-7.14. + FreeScale Kinetis K66. + Support for the Kinetis K64 family and specifically for the NXP/Freescale Freedom K66F board was contributed by David Sidrane in NuttX 7.20. + Refer to the NuttX board README file for further information. +

    + + +
    + +

    + Driver Status.

    +
      +
    • + Most K6x drivers are compatible with the K66. +
      • +
    • + NuttX-7.20. David Sidrane also contributed support for a serial driver on the K66's LPUART. +
      • +
    +
    @@ -3554,7 +3678,7 @@ nsh> The basic port for the STM32F3-Discover was first released in NuttX-6.26. Many of the drivers previously released for the STM32 F1, Value Line, and F2 and F4 may be usable on this platform as well. New drivers will be required for ADC and I2C which are very different on this platform. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -3609,7 +3733,7 @@ nsh>
  • NuttX-7.2 The basic port for STMicro Nucleo F401RE board was contributed by Frank Bennett.
  • - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    • @@ -3661,11 +3785,14 @@ nsh>
  • NuttX-7.3 Support for the Olimex STM32 H405 board was added in NuttX-7.3.
    • -
  • - Refer to the NuttX board README file for further information. +
  • NuttX-7.19 + Support for the Olimex STM32 P405 board was added in NuttX-7.19.

    • +

    + Refer to the STM3240G-EVAL board README file for further information. +

    STMicro STM32F4-Discovery. This port uses the STMicro STM32F4-Discovery board featuring the STM32F407VGT6 MCU. @@ -3693,7 +3820,7 @@ nsh> STATUS: The basic port for the STM32F4-Discovery was contributed by Mike Smith and was first released in NuttX-6.14. All drivers listed for the STM3240G-EVAL are usable on this platform as well. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -3710,7 +3837,7 @@ nsh>

  • Battery connect and batter charger circuit.

    • - See the Mikroelektronika website for more information about this board and the NuttX board README file for further information about the NuttX port. + See the Mikroelektronika website for more information about this board and the NuttX board README file for further information about the NuttX port.

      @@ -3722,12 +3849,23 @@ nsh>

      Olimex STM32 H405. Support for the Olimex STM32 H405 development board was contributed by Martin Lederhilger and appeared in NuttX-7.3. - See the NuttX board README file for further information about the NuttX port. + See the NuttX board README file for further information about the NuttX port.

      Olimex STM32 H407. Support for the Olimex STM32 H407 development board was contributed by Neil Hancock and appeared in NuttX-7.14. - See the NuttX board README file for further information about the NuttX port. + See the NuttX board README file for further information about the NuttX port. +

      +

      + Olimex STM32 E407. + Support for the Olimex STM32 E407 development board was contributed by Mateusz Szafoni and appeared in NuttX-7.17. + Networking configurations were added in NuttX-7.18. + See the NuttX board README file for further information about the NuttX port. +

      +

      + Olimex STM32 P407. + Support for the Olimex STM32 P407 development board appeared in NuttX-7.19. + See the NuttX board README file for further information about the NuttX port.

      @@ -3779,9 +3917,13 @@ nsh> In Nutt-7.7, Marco Krahl included support for a framebuffer based driver using the LTDC and DMA2D. Marcos's implementation included extensions to support more advance LTDC functions through an auxiliary interface. +
    • + Support for the uVision GCC IDE added for theSTM32F429I-Discovery board in NuttX 7.16. + From Kha Vo. +

    - Refer to the STM32F429I-Discovery board README file for further information. + Refer to the STM32F429I-Discovery board README file for further information.

    @@ -3824,19 +3966,27 @@ nsh>

    STMicro STM32 L476. - Two boards are supported in this family: + Three boards are supported in this family:

    • Nucleo-L476RG. - Board support for the STMicro NucleoL476RG board from ST Micro was contributed by Sebastien Lorquet in NuttX-7.15. See the STMicro website and the board README file for further information. + Board support for the STMicro NucleoL476RG board from ST Micro was contributed by Sebastien Lorquet in NuttX-7.15. See the STMicro website and the board README file for further information.

    • STM32L476VG Discovery. - Board support for the STMicro STM32L476VG Discovery board from ST Micro was contributed by Dave in NuttX-7.15. See the STMicro website and the board README file for further information. + Board support for the STMicro STM32L476VG Discovery board from ST Micro was contributed by Dave in NuttX-7.15. See the STMicro website and the board README file for further information. +

      +
      • +
    • +

      + STM32L476 MDK. + Very basic support for NuttX on the Motorola Moto Z MDK was contributed by Jim Wylder in NuttX 7.18. + A simple NSH configuration is available for the STM32L476 chip. + See the Moto Mods Development Kit and the board README file for further information.

    @@ -3853,6 +4003,41 @@ nsh>
  • UART, USART, Serial Console
  • GPIO, DMA, I2C, RNG, SPI
    • +

    + NuttX-7.16. + Additional drivers were contributed: +

    +
      +
    • QSPI with DMA and memory mapped support. From Dave (ziggurat29).
      • +
    • CAN contributed by Sebastien Lorquet.
      • +
    • I2C made functional by Dave (ziggurat29).
      • +
    +

    + NuttX-7.17. + Additional drivers/features were contributed: +

    +
      +
    • Support for tickless mode.
      • +
    • CAN driver enhancements.
      • +
    +

    + NuttX-7.18. + Additional drivers were contributed: +

    +
      +
    • Oneshot timer driver.
      • +
    • Quadrature encode contributed by Sebastien Lorquet.
      • +
    +

    + NuttX-7.20. + Additional drivers were added: +

    +
      +
    • Serial Audio Interface (SAI).
      • +
    • Power Managmement.
      • +
    • LPTIM.
      • +
    • Comparator (COMP).
      • +
    @@ -3876,42 +4061,15 @@ nsh>

    • STATUS: - Refer to the NuttX board README file for more detailed information about this port. + Refer to the NuttX board README file for more detailed information about this port.

    • NuttX-6.20 - The basic port is complete. + The basic LPC4330-Xplorer port is complete. The basic NuttShell (NSH) configuration is present and fully verified. This includes verified support for: SYSTICK system time, pin and GPIO configuration, and a serial console.

      -

      - Several drivers have been copied from the related LPC17xx port but require integration into the LPC43xx: ADC, DAC, GPDMA, I2C, SPI, and SSP. - The registers for these blocks are the same in both the LPC43xx and the LPC17xx and they should integrate into the LPC43xx very easily by simply adapting the clocking and pin configuration logic. -

      -

      - Other LPC17xx drivers were not brought into the LPC43xx port because these peripherals have been completely redesigned: CAN, Ethernet, USB device, and USB host. -

      -

      - So then there is no support for the following LPC43xx peripherals: SD/MMC, EMC, USB0,USB1, Ethernet, LCD, SCT, Timers 0-3, MCPWM, QEI, Alarm timer, WWDT, RTC, Event monitor, and CAN. -

      -

      - Some of these can be leveraged from other MCUs that appear to support the same peripheral IP: -

      -
        -
      • - The LPC43xx USB0 peripheral appears to be the same as the USB OTG peripheral for the LPC31xx. - The LPC31xx USB0 device-side driver has been copied from the LPC31xx port but also integration into the LPC43xx (clocking and pin configuration). - It should be possible to complete porting of this LPC31xx driver with a small porting effort. -
        • -
      • - The Ethernet block looks to be based on the same IP as the STM32 Ethernet and, as a result, it should be possible to leverage the NuttX STM32 Ethernet driver with a little more effort. -
        • -
      -
      • -
    • -

      NuttX-6.21 - Added support for a SPIFI block driver and for RS-485 option to the serial driver.

    @@ -3923,7 +4081,7 @@ nsh>

    • STATUS: - Refer to the NuttX board README file for more detailed information about this port. + Refer to the NuttX board README file for more detailed information about this port.

    • @@ -3943,7 +4101,7 @@ nsh>

      • STATUS: - Refer to the NuttX board README file for more detailed information about this port. + Refer to the NuttX board README file for more detailed information about this port.

      • @@ -3960,7 +4118,7 @@ nsh>

        • STATUS: - Refer to the NuttX board README file for more detailed information about this port. + Refer to the NuttX board README file for more detailed information about this port.

        • @@ -3968,9 +4126,58 @@ nsh> The NXP WaveShare LPC4337-WS port is was contributed by Lok Tep and first released in NuttX-7.14.

          • +
        • +

          NuttX-7.16 + Support for the LPC4337JET100 chip was contribed by Alexander Vasiljev. + Alexander also contributed an LPC43xx AES driver available in NuttX-7.16. +

          +
        + +
        + +

        + Driver Status. +

        +
          +
        • +

          NuttX-6.20 + Several drivers have been copied from the related LPC17xx port but require integration into the LPC43xx: ADC, DAC, GPDMA, I2C, SPI, and SSP. + The registers for these blocks are the same in both the LPC43xx and the LPC17xx and they should integrate into the LPC43xx very easily by simply adapting the clocking and pin configuration logic. +

          +

          + Other LPC17xx drivers were not brought into the LPC43xx port because these peripherals have been completely redesigned: CAN, Ethernet, USB device, and USB host. +

          +

          + So then there is no support for the following LPC43xx peripherals: SD/MMC, EMC, USB0,USB1, Ethernet, LCD, SCT, Timers 0-3, MCPWM, QEI, Alarm timer, WWDT, RTC, Event monitor, and CAN. +

          +

          + Some of these can be leveraged from other MCUs that appear to support the same peripheral IP: +

          +
            +
          • + The LPC43xx USB0 peripheral appears to be the same as the USB OTG peripheral for the LPC31xx. + The LPC31xx USB0 device-side driver has been copied from the LPC31xx port but also integration into the LPC43xx (clocking and pin configuration). + It should be possible to complete porting of this LPC31xx driver with a small porting effort. +
            • +
          • + The Ethernet block looks to be based on the same IP as the STM32 Ethernet and, as a result, it should be possible to leverage the NuttX STM32 Ethernet driver with a little more effort. +
            • +
          +
          • +
        • +

          NuttX-6.21 + Added support for a SPIFI block driver and for RS-485 option to the serial driver. +

          • +
        • +

          NuttX-7.17 + EMC support was extended to include support SDRAM by Vytautas Lukenska. +

          • +
        + +
        @@ -4020,7 +4227,7 @@ nsh>

      - Refer to the EK-TM4C123GXL board README file for more detailed information about this port. + Refer to the EK-TM4C123GXL board README file for more detailed information about this port.

    @@ -4043,10 +4250,11 @@ nsh>
  • Support for the EK-TM4C1294XL was contributed by Frank Sautter and was released in NuttX 7.9. This basic board support included a configuration for the NuttShell NSH) and a configuration for testing IPv6. + See drivers for the TI Tiva TM4C129X.

    • - Refer to the EK-TM4C1294XL board README file for more detailed information about this port. + Refer to the EK-TM4C1294XL board README file for more detailed information about this port.

    @@ -4076,11 +4284,14 @@ nsh>
  • This board supports included two configurations for the NuttShell (NSH). Both are networked enabled: One configured to support IPv4 and one configured to supported IPv6. - Instructions are included in the board README file for configuring both IPv4 and IPv6 simultaneously.. + Instructions are included in the board README file for configuring both IPv4 and IPv6 simultaneously.. +
    • +
  • + Tiva PWM and Quadrature Encoder drivers were contributed to NuttX in 7.18 by Young.

    • - Refer to the DK-TM4C129X board README file for more detailed information about this port. + Refer to the DK-TM4C129X board README file for more detailed information about this port.

    @@ -4103,7 +4314,7 @@ nsh> The basic port was released in NuttX-7.5. This basic board supported includes an verified configuration for the NuttShell NSH). Key wireless networking capability is still missing. - Refer to the CC3200 LaunchPad board README file for more detailed information about this port. + Refer to the CC3200 LaunchPad board README file for more detailed information about this port.

    @@ -4139,7 +4350,7 @@ nsh>

    - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    Memory Usage. @@ -4181,7 +4392,7 @@ Mem: 29232 5920 23312 23312

    - Atmel SAM4C. + Atmel SAM4CM. General architectural support was provided for SAM4CM family in NuttX 7.3 This was architecture-only support, meaning that support for the boards with these chips is available, but no support for any publicly available boards was included. The SAM4CM port should be compatible with most of the SAM3/4 drivers (like HSMCI, DMAC, etc.) but those have not be verified on hardware as of this writing. @@ -4189,6 +4400,18 @@ Mem: 29232 5920 23312 23312

    + +
    + +

    + Atmel SAM4CMP-DB. + Support for the SAM4CMP-DB board was contributed to NuttX by Masayuki Ishikawa in NuttX-7.19. + The SAM4CM is a dual-CPU part and SMP was included for the ARMv7-M and SAM3/4 families. + The SAM4CMP-DB board support includes an NSH configuration that operates in an SMP configuration. + Refer to the NuttX board README file for further information. +

    + +
    @@ -4215,7 +4438,7 @@ Mem: 29232 5920 23312 23312 A DMA-base SPI driver is supported and has been verified with the AT25 Serial FLASH. Touchscreen and LCD support was added in NuttX-7.3, but has not been fully integrated as of this writing. The SAM4E-EK should be compatible with most of the other SAM3/4 drivers (like HSMCI, DMAC, etc.) but those have not be verified on the SAM4E-EK as of this writing. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information. @@ -4244,7 +4467,7 @@ Mem: 29232 5920 23312 23312 Support for the on-board 1MB SRAM was added in NuttX-6.29. An RTT driver was Bob Doiron in NuttX-7.3. Bob also added an high resolution RTC emulation using the RTT for the sub-second counter. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -4259,7 +4482,7 @@ Mem: 29232 5920 23312 23312 As of this writing, the basic port is code complete and a fully verified configuration exists for the NuttShell NSH). The first fully functional SAM4S Xplained Pro port was released in NuttX-7.2. This supported also added HSMCI, RTC, and watchdog and verified support for USB device. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -4292,7 +4515,7 @@ Mem: 29232 5920 23312 23312 A new Ethernet MAC driver has been developed and is functional in the NSH configuration. A DMA-base SPI driver is supported and has been verified with the AT25 Serial FLASH. The SAM4E-EK should be compatible with most of the other SAM3/4 drivers (like HSMCI, DMAC, etc.) but those have not be verified on the SAM4E-EK as of this writing. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information. @@ -4378,7 +4601,7 @@ Mem: 29232 5920 23312 23312
  • RSWDT driver.

    • - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -4395,7 +4618,7 @@ Mem: 29232 5920 23312 23312 This port uses Atmel SAM E70 Xplained Evaluation Kit (ATSAME70-XPLD). This board is essentially a lower cost version of the SAMV71-XULT board featuring the ATSAME70Q21 Cortex-M7 microcontroller. See the Atmel SAMV71 for supported features. - Also refer to the NuttX board README file for further information. + Also refer to the NuttX board README file for further information.

    @@ -4407,24 +4630,50 @@ Mem: 29232 5920 23312 23312

    STMicro STM32 F745/F746. - This port uses the STMicro STM32F746G-DISCO development board featuring the STM32F746NGH6 MCU. The STM32F746NGH6 is a 216MHz Cortex-M7 operation with 1024Kb Flash. - Refer to the STMicro web site for further information about this board. + Two boards are supported for this MCU:

      - STATUS: - The basic port is complete and there are two, verified configurations available. - Both configurations use the NuttShell (NSH) and a serial console; one includes Ethernet support. - DMA supports is available. - The STM32 F7 peripherals are very similar to some members of the STM32 F4 and additional drivers can easily be ported the F7 as discussed in this Wiki page: Porting Drivers to the STM32 F7 - The first release of the STM32F746G_DISCO port was available in NuttX-7.11. + STM32F746G Discovery. + One port uses the STMicro STM32F746G-DISCO development board featuring the STM32F746NGH6 MCU. The STM32F746NGH6 is a 216MHz Cortex-M7 operation with 1024Kb Flash. + Refer to the STMicro web site for further information about this board.

      +

      + A basic port for the Nucleo-144 board with the STM32F746ZG MCU was contribued in NuttX-7.16 by Kconstantin Berezenko.

      - Refer to the NuttX board README file for further information. +

      + STATUS:

      +
        +

        + The basic STM32F746G-DISCO port is complete and there are two, verified configurations available. + Both configurations use the NuttShell (NSH) and a serial console; one includes Ethernet support. + The first release of the STM32F746G_DISCO port was available in NuttX-7.11. +

        +

        + Refer to the NuttX board README file for further information. +

        +
      +
    +

    + STM32 F7 Driver Status: +

    +
      +
    • +

      NuttX-7.11. + Serial driver and Ethernet driver support, along with DMA support, were available availabe in this initial release. + The STM32 F7 peripherals are very similar to some members of the STM32 F4 and additional drivers can easily be ported the F7 as discussed in this Wiki page: Porting Drivers to the STM32 F7 +

      +
      • +
    • +

      NuttX-7.17. + Davide Sidrane contributed PWR, RTC, BBSRAM, and DBGMCU support. + Lok Tep contribed SPI, I2c, ADC, SDMMC, and USB device driver support. +

    +
    @@ -4436,9 +4685,38 @@ Mem: 29232 5920 23312 23312 STMicro STM32 F756. Architecture-only support is available for the STM32 F756 family (meaning that the parts are supported, but there is not example board supported in the system). This support was made available in NuttX-7.11. + See above for STM32 F7 driver availability.

    + + +
    +
    + + +
    + +

    + STMicro STM32 F76xx/F77xx. + Architecture support for the STM32 F76xx and F77xx families was contributed by David Sidrane in NuttX 7.17. Support is available for one board from this family: +

    +
      +
    • +

      + Nucleo-F767ZI. + This is a member of the Nucleo-144 board family. + Support for this board was also contributed by David Sidrane in NuttX-7.17. + See the board README.txt file for further information. +

      +
      • +
    +

    + See above for STM32 F7 driver availability. +

    + + +
    @@ -4476,14 +4754,14 @@ Mem: 29232 5920 23312 23312

    STATUS: Work on this port has stalled due to toolchain issues. Complete, but untested code for this port appears in the NuttX 6.5 release. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    LowPowerLab MoteinoMEGA. This port of NuttX to the MoteinoMEGA from LowPowerLab. The MoteinoMEGA is based on an Atmel ATMega1284P. - See the LowPowerlab website and the board README file for further information. + See the LowPowerlab website and the board README file for further information.

      @@ -4500,7 +4778,7 @@ Mem: 29232 5920 23312 23312 STATUS: The basic port was released in NuttX-7.14 including a simple "Hello, World!" and OS test configurations. Extensive effort was made to the use the special capabilities of the Atmel Studio AVR compiler to retain strings in FLASH memory and so keep the SRAM memory usage to a minimum. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -4530,7 +4808,7 @@ Mem: 29232 5920 23312 23312 The basic port was released in NuttX-6.5. This basic port consists only of a "Hello, World!!" example that demonstrates initialization of the OS, creation of a simple task, and serial console output. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -4552,7 +4830,7 @@ Mem: 29232 5920 23312 23312 An SPI driver and a USB device driver exist for the AT90USB as well as a USB mass storage configuration. However, this configuration is not fully debugged as of the NuttX-6.5 release. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -4645,11 +4923,28 @@ Mem: 29232 5920 23312 23312 The basic, port was be released in NuttX-5.13. A complete port will include drivers for additional AVR32 UC3 devices -- like SPI and USB --- and will be available in a later release, time permitting. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    + + + + + Misoc LM32. + + + +
    + +

    + Misoc LM32 Architectural Support. + Architectural support for the Misoc LM32 was contributed by Ramtin Amin in NuttX 7.19. Driver support is basic in this initial release: Serial, Timer, and Ethernet. "Board" support is a available for developing with Misoc LM32 under Qemu or on your custom FPGA. +

    + + + @@ -4682,7 +4977,7 @@ Mem: 29232 5920 23312 23312 However, testing has not yet begun due to issues with BDMs, Code Warrior, and the paging in the build process. Progress is slow, but I hope to see a fully verified MC9S12NE64 port in the near future. - Refer to the NuttX board README files for DEMO9S12NE64 and for the NE64 /PoE Badge for further information. + Refer to the NuttX board README files for DEMO9S12NE64 and for the NE64 /PoE Badge for further information.

    @@ -4709,35 +5004,7 @@ Mem: 29232 5920 23312 23312 The port is reported to be functional on the Bifferboard as well. In NuttX 7.1, Lizhuoyi contributed additional keyboard and VGA drivers. This is a great, stable starting point for anyone interest in fleshing out the x86 port! - Refer to the NuttX README file for further information. -

    - - - - -
    -
    - - -
    - -

    - RGMP. - RGMP stands for RTOS and GPOS on Multi-Processor. - RGMP is a project for running GPOS and RTOS simultaneously on multi-processor platforms - You can port your favorite RTOS to RGMP together with an unmodified Linux to form a hybrid operating system. - This makes your application able to use both RTOS and GPOS features. -

    -

    - See the RGMP Wiki for further information about RGMP. -

    -
      -

      - STATUS: - This initial port of NuttX to RGMP was provided in NuttX-6.3. - This initial RGP port provides only minimal driver support and does not use the native NuttX interrupt system. - This is a great, stable starting point for anyone interest in working with NuttX under RGMP! - Refer to the NuttX README file for further information. + Refer to the NuttX README file for further information.

    @@ -4768,7 +5035,7 @@ Mem: 29232 5920 23312 23312 The PGA117, however, is not yet fully integrated to support ADC sampling. See the NSH User Guide for further information about NSH. The first verified port to the Mirtoo module was available with the NuttX 6.20 release. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -4802,7 +5069,7 @@ Mem: 29232 5920 23312 23312 An untested USB device-side driver is available in the source tree. A more complete port would include support of the USB OTG port and of the LCD display on this board. Those drivers are not yet available as of this writing. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -4818,7 +5085,7 @@ Mem: 29232 5920 23312 23312 STATUS: The basic port is code complete and fully verified in NuttX 6.13. Available configurations include the NuttShell (NSH - see the NSH User Guide). - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

  • UBW32 Board from Sparkfun This is the port to the Sparkfun UBW32 board. @@ -4831,7 +5098,7 @@ Mem: 29232 5920 23312 23312 The basic port is code complete and fully verified in NuttX 6.18. Available configurations include the NuttShell (NSH - see the NSH User Guide). USB has not yet been fully tested but on first pass appears to be functional. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -4862,7 +5129,7 @@ Mem: 29232 5920 23312 23312 A verified configuration is available for the NuttShel (NSH) appeared in NuttX-6.16. Board support includes a verified USB (device-side) driver. Also included are a a verified Ethernet driver, a partially verified USB device controller driver, and an unverifed SPI driver. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

  • Mikroelektronika PIC32MX7 Mulitmedia Board (MMB). A port has been completed for the Mikroelektronika PIC32MX7 Multimedia Board (MMB). @@ -4885,7 +5152,7 @@ Mem: 29232 5920 23312 23312 However, additional verification and tuning of this driver is required. Further display/touchscreen verification would require C++ support (for NxWidgets and NxWM). Since I there is no PIC32 C++ is the free version of the MPLAB C32 toolchain, further graphics development is stalled. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -4956,7 +5223,7 @@ Mem: 29232 5920 23312 23312
  • Ethernet (code complete, but not yet functional),

    • - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -5002,7 +5269,7 @@ Mem: 29232 5920 23312 23312 (which has very limit SH-1 support to begin with), or perhaps with the CMON debugger. At any rate, I have exhausted all of the energy that I am willing to put into this cool old processor for the time being. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -5039,11 +5306,58 @@ BFD_ASSERT (*plt_offset != (bfd_vma) -1);

    No workaround is known at this time. This is a show stopper for M16C. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    + + + + + + RISC-V. + + + +
    + +

    + RISC-V Architectural Support. + Basic support for the RISC-V architecture was contributed by Ken Pettit in NuttX-7.19. The initial release is thin but a great starting point for anyone interested in RISC-V development with NuttX. +

    + + + + + + + ESP32 (Dual Xtensa LX6). + + + +
    + +

    + Xtensa LX6 ESP32 Architectural Support. + Basic architectural support for Xtensa LX6 processors and the port for the Expressif ESP32 were added in NuttX-7.19. + The basic ESP32 port is function in both single CPU and dual CPU SMP configurations. +

    +

    + Expressif ESP32 Core v2 Board + The NuttX release includes support for Expressif ESP32 Core v2 board. + There is an NSH configuration for each CPU configuration and an OS test configuration for verificatin of the port. +

    +

    + STATUS. + ESP32 support in NuttX-7.19 is functional, but very preliminary. + There is little yet in the way of device driver support. + Outstanding issues include missing clock configuration logic, missing partition tables to support correct configuration from FLASH, and some serial driver pin configuration issues. + The configuration is usable despite these limitations. + Refer to the NuttX board README file for further information. + + + @@ -5066,7 +5380,7 @@ BFD_ASSERT (*plt_offset != (bfd_vma) -1); The initial release of support for the z16f was made available in NuttX version 0.3.7. A working NuttShell (NSH) configuration as added in NuttX-6.33 (although a patch is required to work around an issue with a ZDS-II 5.0.1 tool problem). An ESPI driver was added in NuttX-7.2. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -5101,7 +5415,7 @@ BFD_ASSERT (*plt_offset != (bfd_vma) -1); The first integrated version was released in NuttX version 0.4.2 (with important early bugfixes in 0.4.3 and 0.4.4). As of this writing, that port provides basic board support with a serial console, SPI, and eZ80F91 EMAC driver. - Refer to the NuttX board README files for the ez80f0910200kitg and ez80f910200zcofile for further information. + Refer to the NuttX board README files for the ez80f0910200kitg and ez80f910200zcofile for further information.

    @@ -5132,7 +5446,7 @@ BFD_ASSERT (*plt_offset != (bfd_vma) -1); STATUS: This release has been verified only on the ZiLOG ZDS-II Z8Encore! chip simulation as of nuttx-0.3.9. - Refer to the NuttX board README files for the z8encore000zco and for thez8f64200100kit for further information. + Refer to the NuttX board README files for the z8encore000zco and for thez8f64200100kit for further information.

      @@ -5161,7 +5475,7 @@ BFD_ASSERT (*plt_offset != (bfd_vma) -1); Most of the NuttX is in port for both the Z80182 and for the P112 board. Boards from Kickstarter project will not be available, however, until the third quarter of 2013. So it will be some time before this port is verified on hardware. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

        @@ -5186,7 +5500,7 @@ BFD_ASSERT (*plt_offset != (bfd_vma) -1); STATUS: This port is complete and stable to the extent that it can be tested using an instruction set simulator. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

          @@ -5210,7 +5524,7 @@ BFD_ASSERT (*plt_offset != (bfd_vma) -1); STATUS: Basically the same as for the Z80 instruction set simulator. This port was contributed by Jacques Pelletier. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

            diff --git a/Documentation/NuttXCCodingStandard.html b/Documentation/NuttXCCodingStandard.html index d1e96795c773271a3b2339bc63940a3165799d10..977af36225b1b38fafc229a793742c5d7bdca5ae 100644 --- a/Documentation/NuttXCCodingStandard.html +++ b/Documentation/NuttXCCodingStandard.html @@ -12,7 +12,7 @@

            NuttX C Coding Standard

            -

            Last Updated: July 28, 2015

            +

            Last Updated: February 9, 2017

            @@ -162,10 +162,10 @@ Pre-processor Definitions
          • - Private Types + Private Types (definitions)
          • - Private Function Prototypes + Private Function Prototypes (declarations)
          • Private Data (definitions) @@ -191,7 +191,7 @@ Pre-processor Definitions
          • - Public Types + Public Types (definitions)
          • Public Data (declarations) @@ -212,12 +212,12 @@

            Header File Idempotence. - C header file must protect against multipleinclusion through the use of macros that "guard" against multiple definitions if the header file is included multiple times. + C header file must protect against multiple inclusion through the use of macros that "guard" against multiple definitions if the header file is included multiple times.

            • - Each header file must contain the following pre-processor commands near the beginning of the header file: Between the file header and the "Included Files" block comment. + Each header file must contain the following pre-processor conditional logic near the beginning of the header file: Between the file header and the "Included Files" block comment. For example, 

                @@ -248,7 +248,7 @@
 
 
                
   Deoxygen Information.
-  NuttX does not use Deoxygen for documentation and no file should contain Doxygen tags.
+  NuttX does not use Deoxygen for documentation and no file should contain Doxygen tags or Doxygen style comments.
 
                
 
 
                
@@ -498,8 +498,8 @@
 
 
                
   Comments to the Right of Statements.
-  Comments to the right of statements in C source files are discouraged
-  If such comments are used, they should at least be aligned so that the comment begins in the same comment on each line.
+  Comments to the right of statements in C source files are discouraged.
+  If such comments are used, they should be (1) very short so that they do not exceed the line width (typically 78 characters), (2) fit on one line, and (3) be aligned so that the comment begins in the same comment on each line.
 
                
 
                
diff --git a/Documentation/NuttxPortingGuide.html b/Documentation/NuttxPortingGuide.html
index 9fc2e5e9e29e9ac65548c8c64d5eec5f7e854bd7..2e20d72ac9da106e47e41da3c0c26b9daeaa4704 100644
--- a/Documentation/NuttxPortingGuide.html
+++ b/Documentation/NuttxPortingGuide.html
@@ -12,7 +12,7 @@
       
                
         NuttX RTOS Porting Guide
       
                
-      
                Last Updated: May 12, 2016
                
+      
                Last Updated: February 7, 2017
                
 
                
@@ -538,7 +538,7 @@
 
 
                
   Comments to the Right of Data Definitions.
-  Comments to the right of a declaration with an enumeration or structure, on the other hand, are encourage.
+  Comments to the right of a declaration with an enumeration or structure, on the other hand, are encouraged, provided that the comments are short and do not exceed the maximum line width (usually 78 characters).
   Columnar alignment of comments is very desireable (but often cannot be achieved without violating the line width).
 
                
 
                
@@ -586,6 +586,40 @@ struct animals_s
 
                
 
                
 
+
                
+  Long Comments on the Right.
+  Comments on the right of statements or data definitions must be short and fit on the same line without exceeding the maximum line length.
+  If a longer comment is needed, then it should appear above the statement of definition rather than to the right of the definition.
+
                
+
                
+
+
+
+
                
+
                Incorrect
                
+
                  +  dog = cat; /* This assignment will convert what was at one time a lowly dog into a ferocious feline. */
+
                
+
                
+
                Acceptable
                
+
                  +  dog = cat;       /* This assignment will convert what was at one time a
+                    * lowly dog into a ferocious feline. */
+
                
+
                
+
                Preferred
                
+
                  +  /* This assignment will convert what was at one time a lowly dog into a
+   * ferocious feline.
+   */
+
+  dog = cat;
+
                
+
                
+
                
+  Note that if the comment is continued on multiple lines, the comment alignment and multi-line comment rules still apply with one exception:  The closing */ appears on the same line as the final text of the comment.  This exception to the rule is enforced to keep the statements and definitions from becoming to spread out.
+
                
+
 
                
   Block comments.
   Block comments are only used to delimit groupings with the overall file organization and should not be used unless the usage is consistent with delimiting logical groupings in the program.
@@ -1040,6 +1074,15 @@ int do_foobar(void)
 
 
                2.2 Global Variables
                
 
+Global vs. Local vs. Public vs. Private
+By a global variable it is meant any variable defined outside of a function.
+The distinction is between this kind of global and function local definition and refers to the scope a symbol within a file.
+A related concept for all global names defined within a file is the scope of the name across different files.
+If the global symbol is pre-pended with the static storage class then the scope of the global symbol is within the file only.
+This is a somewhat different concept and within NuttX you will find these distinguished as private vs. public global symbols.
+However, within this standard, the term global variable will refer to any variable that has more than local scope.
+
+
 
                Coding Standard:
                
 
                  
   
                • 
@@ -1080,6 +1123,7 @@ int do_foobar(void)
 
                  Incorrect
                  
 
                     extern int someint;
+static int anotherint;
 uint32_t dwA32BitInt;
 uint32_t gAGlobalVariable;
 
                  
@@ -1088,6 +1132,7 @@ uint32_t gAGlobalVariable;
 
                  Acceptable
                  
 
                     extern int g_someint;
+static int g_anotherint;
 uint32_t g_a32bitint;
 uint32_t g_aglobal;
 
                  
@@ -1102,6 +1147,7 @@ struct my_variables_s
 };
 
 extern int g_someint;
+static int g_anotherint;
 struct my_variables_s g_myvariables;
 
                
 
                
     
   
 
                
@@ -208,11 +208,18 @@
        6.3.8 USB Host-Side Drivers
                
        6.3.9 USB Device-Side Drivers
              - 6.4 Power Management + 6.4 SYSLOG + 6.5 Power Management +
            Appendix A: NuttX Configuration Settings
            @@ -802,7 +809,7 @@

            Definitions in the Make.defs file probably depend on some of the settings in the .config file. For example, the CFLAGS will most likely be - different if CONFIG_DEBUG=y. + different if CONFIG_DEBUG_FEATURES=y.

            The included tools/Config.mk file contains additional definitions that may @@ -941,22 +948,46 @@ drivers/ | |-- Kconfig | |-- Make.defs | `-- (Common ADC and DAC driver source files) +|-- audio/ +| |-- Kconfig +| |-- Make.defs +| `-- (Common audio device source files) |-- bch/ | |-- Kconfig | |-- Make.defs | `-- (bch driver source files) +|-- contactless/ +| |-- Kconfig +| |-- Make.defs +| `-- (Common contactless device driver source files) |-- input/ | |-- Kconfig | |-- Make.defs | `-- (Common touchscreen and keypad driver source files) +|-- ioexpander/ +| |-- Kconfig +| |-- Make.defs +| `-- (Common I/O expander and GPIO-related driver source files) |-- lcd/ | |-- Kconfig | |-- Make.defs | `-- (Common LCD driver source files) +|-- leds/ +| |-- Kconfig +| |-- Make.defs +| `-- (Common LED device driver source files) +|-- loop/ +| |-- Kconfig +| |-- Make.defs +| `-- (Common loop device driver source files) |-- mmcsd/ | |-- Kconfig | |-- Make.defs | `-- (Common MMC/SD card driver source files) +|-- modem/ +| |-- Kconfig +| |-- Make.defs +| `-- (Common modem driver source files) |-- mtd/ | |-- Kconfig | |-- Make.defs @@ -965,6 +996,14 @@ drivers/ | |-- Kconfig | |-- Make.defs | `-- (Common network driver source files) +|-- pipes/ +| |-- Kconfig +| |-- Make.defs +| `-- (Common pipe and FIFO driver source files) +|-- power/ +| |-- Kconfig +| |-- Make.defs +| `-- (Common power-related driver source files) |-- sensors/ | |-- Kconfig | |-- Make.defs @@ -972,11 +1011,19 @@ drivers/ |-- serial/ | |-- Kconfig | |-- Make.defs -| `-- (Files for the Calypso SERCOMM driver) -|-- serial/ +| `-- (Common front-end character drivers for chip-specific UARTs) +|-- spi/ | |-- Kconfig | |-- Make.defs -| `-- (Common front-end character drivers for chip-specific UARTs) +| `-- (Common SPI-related drivers and helper fuctions) +|-- syslog/ +| |-- Kconfig +| |-- Make.defs +| `-- (System logging device support) +|-- timers/ +| |-- Kconfig +| |-- Make.defs +| `-- (Timer-based device driver support) |-- usbdev/ | |-- Kconfig | |-- Make.defs @@ -985,6 +1032,10 @@ drivers/ | |-- Kconfig | |-- Make.defs | `-- (Common USB host driver source files) +|-- usbmonitor/ +| |-- Kconfig +| |-- Make.defs +| `-- (USB monitor source files) |-- wireless/ | |-- Kconfig | |-- Make.defs @@ -1081,16 +1132,32 @@ include/ | | `-- (Audio driver header files) | |-binfmt/ | | `-- (Binary format header files) +| |-contactless/ +| | `-- (Contactless driver header files) +| |-crypto/ +| | `-- (Cryptographic support header files) +| |-drivers/ +| | `-- (Miscellaneous driver header files) +| |-eeprom/ +| | `-- (EEPROM driver header files) | |-fs/ | | `-- (File System header files) | |-input/ | | `-- (Input device driver header files) +| |-ioexpander/ +| | `-- (I/O exander and GPIO drvier header files) | |-lcd/ | | `-- (LCD driver header files) +| |-leds/ +| | `-- (LED driver header files) +| |-lib/ +| | `-- (Non-standard C library driver header files) +| |-mm/ +| | `-- (Memory management header files) +| |-modem/ +| | `-- (Modem driver header files) | |-mtd/ | | `-- (Memory technology device header files) -| |-serial/ -| | `-- (Serial driver header files) | |-net/ | | `-- (Networking header files) | |-nx/ @@ -1099,16 +1166,18 @@ include/ | | `-- (Power management header files) | |-sensors/ | | `-- (Sensor device driver header files) -| |-sercomm/ -| | `-- (SERCOMM driver header files) | |-serial/ | | `-- (Serial driver header files) | |-spi/ | | `-- (SPI driver header files) | |-syslog/ | | `-- (SYSLOG header files) +| |-timers/ +| | `-- (Timer-related driver header files) | |-usb/ | | `-- (USB driver header files) +| |-video/ +| | `-- (Video-related driver header files) | `-wireless/ | `-- (Wireless device driver header files) `- sys/ @@ -1141,16 +1210,28 @@ include/ 

               libc/
+|-- aio/
+|   `-- (Implementation of functions from aio.h)
+|-- audio/
+|   `-- (Implementation of audio-related functions)
+|-- dirent/
+|   `-- (Implementation of functions from dirent.h)
+|-- fixedmath/
+|   `-- (Implementation of functions from fixedmath.h)
+|-- hex2bin/
+|   `-- (Implementation of functions from hex2bin.h)
 |-- libgen/
 |   `-- (Implementation of functions from libgen.h)
 |-- math/
 |   `-- (Implementation of functions from fixedmath.h)
 |-- misc/
 |   `-- (Implementation of miscellaneous library functions)
-|-- mqueue/
-|   `-- (Implementation of some functions from mqueue.h)
 |-- net/
 |   `-- (Implementation of network-related library functions)
+|-- netdb/
+|   `-- (Implementation of functions from netdb.h)
+|-- pthread/
+|   `-- (Implementation of functions from pthread.h)
 |-- queue/
 |   `-- (Implementation of functions from queue.h)
 |-- sched/
@@ -1159,16 +1240,31 @@ libc/
 |   `-- (Implementation of some functions from semaphore.h)
 |-- signal/
 |   `-- (Implementation of some functions from signal.h)
+|-- spawn/
+|   `-- (Implementation of some functions from spawn.h)
 |-- stdio/
 |   `-- (Implementation of functions from stdio.h)
 |-- stdlib/
 |   `-- (Implementation of functions from stdlib.h)
 |-- string/
 |   `-- (Implementation of functions from string.h)
+|-- symtab/
+|   `-- (Implementation of symbol-table library functions)
+|-- syslog/
+|   `-- (Implementation of functions from syslog.h)
+|-- termios/
+|   `-- (Implementation of functions from termios.h)
 |-- time/
 |   `-- (Implementation of some functions from time.h)
-`-- unistd/
-    `-- (Implementation of some functions from unistd.h)
+|-- tls/
+|   `-- (Implementation of some functions from tls.h)
+|-- wqueue/
+|   `-- (Implementation of some functions from wqueue.h)
+|-- unistd/
+|   `-- (Implementation of some functions from unistd.h)
+`-- zoneinfo/
+    `-- (Implementation of timezone database)
+

            2.13 nuttx/libxx

            @@ -2228,7 +2324,7 @@ config ARCH_SIM

            -
            4.3.4.4.1 up_timer_initialize()
            +
            4.3.4.4.1 <arch>_timer_initialize()

            Function Prototype:

              -#include <nuttx/arch.h>
-void up_timer_initialize(void);
+#include "up_internal.h"
+void <arch>_timer_initialize()(void);

            Description:

              @@ -2314,7 +2410,7 @@ void up_timer_initialize(void); int up_timer_gettime(FAR struct timespec *ts);

            Description:

            - Return the elapsed time since power-up (or, more correctly, since up_timer_initialize() was called). This function is functionally equivalent to clock_gettime() for the clock ID CLOCK_MONOTONIC. This function provides the basis for reporting the current time and also is used to eliminate error build-up from small errors in interval time calculations. + Return the elapsed time since power-up (or, more correctly, since <arch>_timer_initialize() was called). This function is functionally equivalent to clock_gettime() for the clock ID CLOCK_MONOTONIC. This function provides the basis for reporting the current time and also is used to eliminate error build-up from small errors in interval time calculations.

            Input Parameters:

            @@ -3813,7 +3909,7 @@ void sched_process_timer(void); The timer interrupt logic itself is implemented in the architecture specific code, but must call the following OS function periodically -- the calling interval must be - MSEC_PER_TICK. + CONFIG_USEC_PER_TICK.

            4.8.4 sched_timer_expiration()

            @@ -4432,7 +4528,7 @@ void board_autoled_off(int led);

            • Interface Definition. - The header file for the NuttX PWM driver reside at include/nuttx/pwm.h. + The header file for the NuttX PWM driver reside at include/nuttx/drivers/pwm.h. This header file includes both the application level interface to the PWM driver as well as the interface between the "upper half" and "lower half" drivers. The PWM module uses a standard character driver framework. However, since the PWM driver is a devices control interface and not a data transfer interface, @@ -4465,7 +4561,7 @@ void board_autoled_off(int led);

              • Interface Definition. - The header file for the NuttX CAN driver reside at include/nuttx/can.h. + The header file for the NuttX CAN driver resides at include/nuttx/drivers/can.h. This header file includes both the application level interface to the CAN driver as well as the interface between the "upper half" and "lower half" drivers. The CAN module uses a standard character driver framework.
                • @@ -5280,7 +5376,8 @@ int kbd_decode(FAR struct lib_instream_s *stream, FAR struct kbd_getstate_s *sta

                  void (*reset)(FAR struct sdio_dev_s *dev);
                  - uint8_t (*status)(FAR struct sdio_dev_s *dev);
                  + sdio_capset_t (*capabilities)(FAR struct sdio_dev_s *dev);
                  + sdio_statset_t (*status)(FAR struct sdio_dev_s *dev);
                  void (*widebus)(FAR struct sdio_dev_s *dev, bool enable);
                  void (*clock)(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate);
                  int (*attach)(FAR struct sdio_dev_s *dev);
                  @@ -5315,7 +5412,6 @@ int kbd_decode(FAR struct lib_instream_s *stream, FAR struct kbd_getstate_s *sta DMA support:

                    -

                    bool (*dmasupported)(FAR struct sdio_dev_s *dev);
                    int (*dmarecvsetup)(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer, size_t buflen);
                    int (*dmasendsetup)(FAR struct sdio_dev_s *dev, FAR const uint8_t *buffer, size_t buflen);

                  @@ -5546,9 +5642,507 @@ int kbd_decode(FAR struct lib_instream_s *stream, FAR struct kbd_getstate_s *sta
                -

                6.4 Power Management

                +

                6.4 SYSLOG

                + +

                6.4.1 SYSLOG Interfaces

                +

                6.4.1.1 Standard SYSLOG Interfaces

                + + The NuttX SYSLOG is an architecture for getting debug and status + information from the system. The syslogging interfaces are defined in the + header file include/syslog.h. The primary interface to SYSLOG sub-system + is the function syslog() and, to a lesser extent, its companion vsyslog(): + +

                6.4.1.2 syslog() and vsyslog()

                +

                Function Prototypes:

                +
                  +#include <syslog.h>
+int syslog(int priority, FAR const IPTR char *format, ...);
+int vsyslog(int priority, FAR const IPTR char *src, va_list ap);
+
                +

                Description: + syslog() generates a log message. The priority argument is formed by ORing the facility and the level values (see include/syslog.h). The remaining arguments are a format, as in printf() and any arguments to the format. +

                +

                + The NuttX implementation does not support any special formatting characters beyond those supported by printf(). +

                +

                + The function vsyslog() performs the same task as syslog() with the difference that it takes a set of arguments which have been obtained using the stdarg variable argument list macros. +

                + +

                6.4.1.3 setlogmask()

                +

                + The additional setlogmask() interface can use use to filter SYSLOG output: +

                +

                Function Prototype:

                +
                  +#include <syslog.h>
+int setlogmask(int mask);
+
                +

                Description: + The setlogmask() function sets the logmask and returns the previous mask. If the mask argument is zerio, the current logmask is not modified. +

                +

                + The SYSLOG priorities are: LOG_EMERG, LOG_ALERT, LOG_CRIT, LOG_ERR, LOG_WARNING, LOG_NOTICE, LOG_INFO, and LOG_DEBUG. The bit corresponding to a priority p is LOG_MASK(p); LOG_UPTO(p) provides the mask of all priorities in the above list up to and including p. +

                +

                + Per OpenGroup.org "If the maskpri argument is 0, the current log mask is not modified." In this implementation, the value zero is permitted in order to disable all SYSLOG levels. +

                +

                + REVISIT: Per POSIX the SYSLOG mask should be a per-process value but in NuttX, the scope of the mask is dependent on the nature of the build: +

                +
                  + +
                • +

                  + Flat Build: There is one, global SYSLOG mask that controls all output. +

                  • +
                • +

                  + Protected Build: There are two SYSLOG masks. One within the kernel that controls only kernel output. And one in user-space that controls only user SYSLOG output. +

                  • +
                • +

                  + Kernel Build: The kernel build is compliant with the POSIX requirement: There will be one mask for for each user process, controlling the SYSLOG output only form that process. There will be a separate mask accessable only in the kernel code to control kernel SYSLOG output. +

                +

                + The above are all standard interfaces as defined at OpenGroup.org. Those interfaces are available for use by application software. The remaining interfaces discussed in this section are non-standard, OS-internal interfaces. +

                + +

                6.4.1.4 Debug Interfaces

                +

                + In NuttX, syslog output is really synonymous to debug output and, herefore, the debugging interface macros defined in the header file + include/debug.h are also syslogging interfaces. Those macros are simply wrappers around syslog(). The debugging interfaces differ from the syslog interfaces in that: +

                +
                  + +
                • +

                  + They do not take a priority parameter; the priority is inherent in the + debug macro name. +

                  • +
                • +

                  + They decorate the output stream with information such as the file name +

                  • +
                • +

                  + They can each be disabled via configuration options. +

                  • +
                +

                + Each debug macro has a base name that represents the priority and a prefix that represents the sub-system. Each macro is individually initialized by both priority and sub-system. For example, uerr() is the macro used for error level messages from the USB subsystem and is enabled with CONFIG_DEBUG_USB_ERROR. +

                +

                + The base debug macro names, their priority, and configuration variable are summarized below: +

                +
                  + +
                • +

                  + info(). The info() macro is the lowest priority (LOG_INFO) and is intended to provide general information about the flow of program execution so that you can get an overview of the behavior of the program. info() is often very chatty and voluminous and usually more information than you may want to see. The info() macro is controlled via CONFIG_DEBUG_subsystem_INFO +

                  • +
                • +

                  + warn(). The warn() macro has medium priority (LOG_WARN) and is controlled by CONFIG_DEBUG_subsystem_WARN. The warn() is intended to + note exceptional or unexpected conditions that meigh be potential + errors or, perhaps, minor errors that easily recovered. +

                  • +
                • +

                  + err(). This is a high priority debug macro (LOG_ERROR) and controlled by CONFIG_DEBUG_subsystem_ERROR. The err() is reserved to indicate important error conditions. +

                  • +
                • +

                  + alert(). The highest priority debug macro (LOG_EMERG) and is controlled by CONFIG_DEBUG_ALERT. The alert() macro is reserved for use solely by assertion and crash handling logic. It also differs from the other macros in that it cannot be enabled or disabled per subsystem. +

                  • +
                + +

                6.4.2 SYSLOG Channels

                +

                6.4.2.1 SYSLOG Channel Interfaces

                +

                + In the NuttX SYSLOG implementation, the underlying device logic the supports the SYSLOG output is referred to as a SYSLOG channel. Each SYSLOG channel is represented by an interface defined in include/nuttx/syslog/syslog.h: +

                +
                  +    /* This structure provides the interface to a SYSLOG device */
+
+    typedef CODE int (*syslog_putc_t)(int ch);
+    typedef CODE int (*syslog_flush_t)(void);
+
+    struct syslog_channel_s
+    {
+      /* I/O redirection methods */
+
+      syslog_putc_t sc_putc;    /* Normal buffered output */
+      syslog_putc_t sc_force;   /* Low-level output for interrupt handlers */
+      syslog_flush_t sc_flush;  /* Flush buffered output (on crash) */
+
+      /* Implementation specific logic may follow */
+    };
+
                +

                + The channel interface is instantiated by calling syslog_channel(): +

                + +

                6.4.2.1 syslog_channel()

                +

                Function Prototype:

                +
                  +#include <nuttx/syslog/syslog.h>
+int syslog_channel(FAR const struct syslog_channel_s *channel);
+
                +

                Description: + Configure the SYSLOG function to use the provided channel to generate SYSLOG output. +

                +

                + syslog_channel() is a non-standard, internal OS interface and is not available to applications. It may be called numerous times as necessary to change channel interfaces. + By default, all system log output goes to console (/dev/console). +

                +

                Input Parmeters: +

                  +
                • +

                  + channel: Describes the interface to the channel to be used. +

                  • +
                +

                Returned Value: +

                  +

                  + Zero (OK)is returned on success. A negated errno value is returned on any failure. +

                  +
                + +

                6.4.2.2 SYSLOG Channel Initialization

                +

                + The initial, default SYSLOG channel is established with statically initialized global variables so that some level of SYSLOG output may be available immediately upon reset. This initialized data is in the file drivers/syslog/syslog_channel.c. The initial SYSLOG capability is determined by the selected SYSLOG channel: +

                +
                  +
                • +

                  + In-Memory Buffer (RAMLOG). Full SYSLOG capability as available at reset. +

                  • +
                • +

                  + Serial Console. If the serial implementation provides the low-level character output function up_putc(), then that low level serial output is available as soon as the serial device has been configured. +

                  • +
                • +

                  + For all other SYSLOG channels, all SYSLOG output goes to the bit- + bucket until the SYSLOG channel device has been initialized. +

                  • +
                +

                + The syslog channel device is initialized when the bring-up logic calls syslog_initialize(): +

                + +

                6.4.2.3 syslog_initialize()

                +

                Function Prototype:

                +
                  +#include <nuttx/syslog/syslog.h>
+#ifndef CONFIG_ARCH_SYSLOG
+int syslog_initialize(enum syslog_init_e phase);
+#else
+#  define syslog_initialize(phase)
+#endif
+
                +

                Description: + One power up, the SYSLOG facility is non-existent or limited to very low-level output. This function is called later in the initialization sequence after full driver support has been initialized. It installs the configured SYSLOG drivers and enables full SYSLOG capability. +

                +

                + This function performs these basic operations: +

                +
                  +
                • +

                  + Initialize the SYSLOG device +

                  • +
                • +

                  + Call syslog_channel() to begin using that device. +

                  • +
                • +

                  + If CONFIG_ARCH_SYSLOG is selected, then the architecture-specific logic will provide its own SYSLOG device initialize which must include as a minimum a call to syslog_channel() to use the device. +

                  • +
                +

                Input Parameters: +

                  +
                • +

                  + phase: One of {SYSLOG_INIT_EARLY, SYSLOG_INIT_LATE} +

                  • +
                +

                Returned Value: + Zero (OK) is returned on success; a negated errno value is returned on any failure. +

                +

                + Different types of SYSLOG devices have different OS initialization + requirements. Some are available immediately at reset, some are available + after some basic OS initialization, and some only after OS is fully + initialized. In order to satisfy these different initialization + requirements, syslog_initialize() is called twice from the boot-up logic: +

                +
                  +
                • +

                  + syslog_initialize() is called from the architecture-specific up_initialize() function as some as basic hardware resources have been initialized: Timers, interrupts, etc. In this case, syslog_initialize() is called with the argument SYSLOG_INIT_EARLY. +

                  • +
                • +

                  + syslog_initialize() is called again from os_start() when the full OS initialization has completed, just before the application main entry point is spawned. In this case, syslog_initialize() is called with the argument SYSLOG_INIT_LATE. +

                  • +
                +

                + There are other types of SYSLOG channel devices that may require even further initialization. For example, the file SYSLOG channel (described below) cannot be initialized until the necessary file systems have been mounted. +

                + +

                6.4.2.3 Interrupt Level SYSLOG Output

                +

                + As a general statement, SYSLOG output only supports //normal// output from NuttX tasks. However, for debugging purposes, it is also useful to get SYSLOG output from interrupt level logic. In an embedded system, that is often where the most critical operations are performed. +

                +

                + There are three conditions under which SYSLOG output generated from interrupt level processing can a included the SYSLOG output stream: +

                +
                  +
                1. +

                  Low-Level Serial Output. + If you are using a SYSLOG console channel (CONFIG_SYSLOG_CONSOLE) with a serial console (CONFIG_SYSLOG_SERIAL_CONSOLE) and if the underlying architecture supports the low-level up_putc() interface(CONFIG_ARCH_LOWPUTC), then the SYLOG logic will direct the output to up_putc() which is capable of generating the serial output within the context of an interrupt handler. +

                  +

                  + There are a few issues in doing this however: +

                  +
                    +
                  • +

                    + up_putc() is able to generate debug output in any context because it disables serial interrupts and polls the hardware directly. These polls may take many milliseconds and during that time, all interrupts are disable within the interrupt handler. This, of course, interferes with the real-time behavior of the RTOS. +

                    +
                    • +
                  • +

                    + The output generated by up_putc() is immediate and in real-time. The normal SYSLOG output, on the other hand, is buffered in the serial driver and may be delayed with respect to the immediate output by many lines. Therefore, the interrupt level SYSLOG ouput provided throug up_putc() is grossly out of synchronization with other debug output +

                    +
                    • +
                  +
              +
              • +
            • +

              In-Memory Buffering. + If the RAMLOG SYSLOG channel is supported, then all SYSLOG output is buffered in memory. Interrupt level SYSLOG output is no different than normal SYSLOG output in this case. +

              +
              • +
            • +

              Serialization Buffer. + A final option is the use the an interrupt buffer to buffer the interrupt level SYSLOG output. In this case: +

              +
                +
              • +

                + SYSLOG output generated from interrupt level process in not sent to the SYSLOG channel immediately. Rather, it is buffered in the interrupt serialization buffer. +

                +
                • +
              • +

                + Later, when the next normal syslog output is generated, it will first empty the content of the interrupt buffer to the SYSLOG device in the proper context. It will then be followed by the normal syslog output. In this case, the interrupt level SYSLOG output will interrupt the normal output stream and the interrupt level SYSLOG output will be inserted into the correct position in the SYSLOG output when the next normal SYLOG output is generated. +

                +
                • +
              +

              + The SYSLOG interrupt buffer is enabled with CONFIG_SYSLOG_INTBUFFER. When the interrupt buffer is enabled, you must also provide the size of the interrupt buffer with CONFIG_SYSLOG_INTBUFSIZE. +

              +
              • + + +

              6.4.3 SYSLOG Channel Options

              +

              6.4.3.1 SYSLOG Console Device

              +

              + The typical SYSLOG device is the system console. If you are using a serial console, for example, then the SYSLOG output will appear on that serial port. +

              +

              + This SYSLOG channel is automatically selected by syslog_initialize() in the LATE initialization phase based on configuration options. The configuration options that affect this channel selection include: +

              +
                +
              • +

                + CONFIG_DEV_CONSOLE. This setting indicates that the system supports a console device, i.e., that the character device /dev/console exists. +

                • +
              • +

                + CONFIG_SERIAL_CONSOLE. This configuration option is automatically selected when a UART or USART is configured as the system console. There is no user selection. +

                • +
              • +

                + CONFIG_SYSLOG_CONSOLE. This configuration option is manually selected from the SYSLOG menu. This is the option that acutally enables the SYSLOG console device. It depends on CONFIG_DEV_CONSOLE and it will automatically select CONFIG_SYSLOG_SERIAL_CONSOLE if CONFIG_SERIAL_CONSOLE is selected. +

                • +
              • +

                + CONFIG_ARCH_LOWPUTC. This is an indication from the architecture configuration that the platform supports the up_putc() interface. up_putc() is a very low level UART interface that can even be used from interrupt handling. +

                • +
              • +

                + CONFIG_SYSLOG_SERIAL_CONSOLE. This enables certain features of the SYSLOG operation that depend on a serial console. If CONFIG_ARCH_LOWPUTC is also selected, for example, then up_putc() will be used for the forced SYSLOG output. +

                • +
              +

              + Interrupt level SYSLOG output will be lost unless: (1) the interrupt buffer + is enabled to support serialization, or (2) a serial console is used and + up_putc() is supported. +

              +

              + NOTE: The console channel uses the fixed character device at /dev/console. The console channel is not synonymous with stdout (or file descriptor 1). stdout is the current output from a task when, say, printf() if used. Initially, stdout does, indeed, use the /dev/console device. However, stdout may subsequently be redirected to some other device or file. This is always the case, for example, when a transient device is used for a console -- such as a USB console or a Telnet console. The SYSLOG channel is not redirected as stdout is; the SYSLOG channel will stayed fixed (unless it is explicitly changed via syslog_channel()). +

              +

              + References: drivers/syslog/syslog_consolechannel.c and + drivers/syslog/syslog_device.c +

              + +

              6.4.3.2 SYSLOG Character Device

              +

              + The system console device, /dev/console, is a character driver with some special properties. However, any character driver may be used as the SYSLOG output channel. For example, suppose you have a serial console on /dev/ttyS0 and you want SYSLOG output on /dev/ttyS1. Or suppose you support only a Telnet console but want to capture debug output /dev/ttyS0. +

              +

              + This SYSLOG device channel is selected with CONFIG_SYSLOG_CHAR and has no other dependencies. Differences fromthe SYSLOG console channel include: +

              +
                +
              • +

                + CONFIG_SYSLOG_DEVPATH. This configuration option string must be set provide the full path to the character device to be used. +

                • +
              • +

                + The forced SYSLOG output always goes to the bit-bucket. This means that interrupt level SYSLOG output will be lost unless the interrupt buffer is enabled to support serialization. +

                • +
              • +

                + CONFIG_SYSLOG_CHAR_CRLF. If CONFIG_SYSLOG_CHAR_CRLF is selected, then linefeeds in the SYSLOG output will be expanded to Carriage Return plus Linefeed. Since the character device is not a console device, the addition of carriage returns to line feeds would not be performed otherwise. You would probably want this expansion if you use a serial terminal program with the character device output. +

                • +
              +

              + References: drivers/syslog/syslog_devchannel.c and drivers/syslog/syslog_device.c +

              + +

              6.4.3.3 SYSLOG File Device

              +

              + Files can also be used as the sink for SYSLOG output. There is, however, a very fundamental difference in using a file as opposed the system console, a RAM buffer, or character device: You must first mount the file system that supports the SYSLOG file. That difference means that the file SYSLOG channel cannot be supported during the boot-up phase but can be instantiated later when board level logic configures the application environment, including mounting of the file systems. +

              +

              + The interface syslog_file_channel() is used to configure the SYSLOG file channel: +

              + +

              6.4.3.4 syslog_file_channel()

              +

              Function Prototype:

              +
                +#include <nuttx/syslog/syslog.h>
+#ifdef CONFIG_SYSLOG_FILE
+int syslog_file_channel(FAR const char *devpath);
+#endif
+
              +

              Description: + Configure to use a file in a mounted file system at devpath as the SYSLOG channel. +

              +

              + This tiny function is simply a wrapper around syslog_dev_initialize() and syslog_channel(). It calls syslog_dev_initialize() to configure the character file at devpath then calls syslog_channel() to use that device as the SYSLOG output channel. +

              +

              + File SYSLOG channels differ from other SYSLOG channels in that they cannot be established until after fully booting and mounting the target file system. This function would need to be called from board-specific bring-up logic AFTER mounting the file system containing devpath. +

              +

              + SYSLOG data generated prior to calling syslog_file_channel() will, of course, not be included in the file. +

              +

              + NOTE interrupt level SYSLOG output will be lost in this case unless the interrupt buffer is used. +

              + +

              Input Parameters: +

                +
              • +

                + devpath: The full path to the file to be used for SYSLOG output. This may be an existing file or not. If the file exists, + syslog_file_channel() will append new SYSLOG data to the end of the file. If it does not, then syslog_file_channel() will create the file. +

                • +
              +

              Returned Value: + Zero (OK) is returned on success; a negated errno value is returned on any failure. +

              +

              + References: drivers/syslog/syslog_filechannel.c, drivers/syslog/syslog_device.c, and include/nuttx/syslog/syslog.h. +

              + +

              6.4.3.5 SYSLOG RAMLOG Device

              +

              + The RAMLOG is a standalone feature that can be used to buffer any + character data in memory. There are, however, special configurations + that can be used to configure the RAMLOG as a SYSLOG channel. The RAMLOG + functionality is described in a more general way in the following + paragraphs. +

              + +

              6.4.4 RAM Logging Device

              +

              + The RAM logging driver is a driver that was intended to support debugging output (SYSLOG) when the normal serial output is not available. For example, if you are using a Telnet or USB serial console, the debug output will get lost -- or worse. For example, what if you want to debug the network over Telnet? +

              +

              + The RAM logging driver can also accept debug output data from interrupt handler with no special serialization buffering. As an added benefit, the RAM logging driver is much less invasive. Since no actual I/O is performed with the debug output is generated, the RAM logger tends to be much faster and will interfere much less when used with time critical drivers. +

              +

              + The RAM logging driver is similar to a pipe in that it saves the debugging output in a circular buffer in RAM. It differs from a pipe in numerous details as needed to support logging. +

              +

              + This driver is built when CONFIG_RAMLOG is defined in the Nuttx configuration. +

              + +

              6.4.4.1 dmesg

              +

              + When the RAMLOG (with SYSLOG) is enabled, a new NuttShell (NSH) command will appear: dmesg. The dmesg command will dump the contents of the circular buffer to the console (and also clear the circular buffer). +

              + +

              6.4.4.2 RAMLOG Configuration options

              +
                +
              • +

                + CONFIG_RAMLOG: Enables the RAM logging feature +

                • +
              • +

                + CONFIG_RAMLOG_CONSOLE: Use the RAM logging device as a system console. If this feature is enabled (along with CONFIG_DEV_CONSOLE), then all console output will be re-directed to a circular buffer in RAM. This might be useful, for example, if the only console is a Telnet console. Then in that case, console output from non-Telnet threads will go to the circular buffer and can be viewed using the NSH dmesg command. This optional is not useful in other scenarios. +

                • +
              • +

                + CONFIG_RAMLOG_SYSLOG: Use the RAM logging device for the SYSLOG interface. If this feature is enabled, then all debug output will be re-directed to the circular buffer in RAM. This RAM log can be viewed from NSH using the dmesg command. NOTE: Unlike the limited, generic character driver SYSLOG device, the RAMLOG can be used to capture debug output from + interrupt level handlers. +

                • +
              • +

                + CONFIG_RAMLOG_NPOLLWAITERS: The number of threads than can be waiting for this driver on poll(). Default: 4 +

                • +
              +

              + If CONFIG_RAMLOG_CONSOLE or CONFIG_RAMLOG_SYSLOG is selected, then the following must also be provided: +

              +
                +
              • +

                + CONFIG_RAMLOG_BUFSIZE: The size of the circular buffer to use. Default: 1024 bytes. +

                • +
              +

              + Other miscellaneous settings +

              +
                +
              • +

                + CONFIG_RAMLOG_CRLF: Pre-pend a carriage return before every linefeed that goes into the RAM log. +

                • +
              • +

                + CONFIG_RAMLOG_NONBLOCKING: Reading from the RAMLOG will never block if the RAMLOG is empty. If the RAMLOG is empty, then zero is returned (usually interpreted as end-of-file). If you do not define this, the NSH dmesg command will lock up when called! So you probably do want this! +

                • +
              • +

                + CONFIG_RAMLOG_NPOLLWAITERS: The maximum number of threads that may be waiting on the poll method. +

                • +
              + +

              6.5 Power Management

              -

              6.4.1 Overview

              +

              6.5.1 Overview

              Power Management (PM) Sub-System. NuttX supports a simple power management (PM) sub-system. This sub-system: @@ -5632,12 +6226,12 @@ int kbd_decode(FAR struct lib_instream_s *stream, FAR struct kbd_getstate_s *sta Multiple PM domains might be useful, for example, if you would want to control power states associated with a network separately from power states associated with a user interface.

              -

              6.4.2 Interfaces

              +

              6.5.2 Interfaces

              All PM interfaces are declared in the file include/nuttx/power/pm.h.

              -

              6.4.2.1 pm_initialize()

              +

              6.5.2.1 pm_initialize()

              Function Prototype:

                 #include <nuttx/power/pm.h>
@@ -5654,7 +6248,7 @@ None
 None
 
                
 
-
                6.4.2.2 pm_register()
                
+
                6.5.2.2 pm_register()
                
 
                Function Prototype:
                
 
                   #include <nuttx/power/pm.h>
@@ -5674,7 +6268,7 @@ int pm_register(FAR struct pm_callback_s *callbacks);
 Zero (OK) on success; otherwise a negated errno value is returned.
 
                  
 
-
                  6.4.2.3 pm_activity()
                  
+
                  6.5.2.3 pm_activity()
                  
 
                  Function Prototype:
                  
 
 
 
                  
diff --git a/Documentation/UsbTrace.html b/Documentation/UsbTrace.html
index 7efb7ebccbae864f39babfe12d882a25209fa3e4..25c8736b7b3a45d131cb0725eac59c2811b55df5 100644
--- a/Documentation/UsbTrace.html
+++ b/Documentation/UsbTrace.html
@@ -125,7 +125,7 @@
 
                  
 
                    
   
                  • CONFIG_USBDEV_TRACE, or
                    • 
-  
                  • CONFIG_DEBUG and CONFIG_DEBUG_USB
                    • 
+  
                  • CONFIG_DEBUG_FEATURES and CONFIG_DEBUG_USB
                    • 
 
                  
 
                  Log Data Sink.
   The logged data itself may go to either (1) an internal circular buffer, or (2) may be provided on the console.
@@ -137,7 +137,7 @@
   Here is an example of USB trace output using apps/examples/usbserial for an LPC1768 platform with the following NuttX configuration settings:
 
                  
 
                    
-  
                  • CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, CONFIG_USB
+  
                  • CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO, CONFIG_USB
   
                  • CONFIG_EXAMPLES_USBSERIAL_TRACEINIT, CONFIG_EXAMPLES_USBSERIAL_TRACECLASS,
     CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS, CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER,
     CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS
@@ -396,7 +396,7 @@ static int pl2303_setup(FAR struct uart_dev_s *dev)
   
   
     
-      CONFIG_SYSTEM_USBMONITOR=y
+      CONFIG_USBMONITOR=y
     
     
       Enable the USB monitor daemon
@@ -404,7 +404,7 @@ static int pl2303_setup(FAR struct uart_dev_s *dev)
   
   
     
-      CONFIG_SYSTEM_USBMONITOR_STACKSIZE=nnnn
+      CONFIG_USBMONITOR_STACKSIZE=nnnn
     
     
       Sets the USB monitor daemon stack size to nnnn.
@@ -413,7 +413,7 @@ static int pl2303_setup(FAR struct uart_dev_s *dev)
   
   
     
-      CONFIG_SYSTEM_USBMONITOR_PRIORITY=50
+      CONFIG_USBMONITOR_PRIORITY=50
     
     
       Sets the USB monitor daemon priority to nnnn.
@@ -423,7 +423,7 @@ static int pl2303_setup(FAR struct uart_dev_s *dev)
   
   
     
-      CONFIG_SYSTEM_USBMONITOR_INTERVAL=nnnn
+      CONFIG_USBMONITOR_INTERVAL=nnnn
     
     
       Dump the buffered USB data every nnnn seconds.
@@ -432,11 +432,11 @@ static int pl2303_setup(FAR struct uart_dev_s *dev)
   
   
     
-      CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y
                    
-      CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y
                    
-      CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y
                    
-      CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y
                    
-      CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y
                    
+      CONFIG_USBMONITOR_TRACEINIT=y
                    
+      CONFIG_USBMONITOR_TRACECLASS=y
                    
+      CONFIG_USBMONITOR_TRACETRANSFERS=y
                    
+      CONFIG_USBMONITOR_TRACECONTROLLER=y
                    
+      CONFIG_USBMONITOR_TRACEINTERRUPTS=y
                    
     
     
       Selects which USB event(s) that you want to be traced.
diff --git a/FlatLibs.mk b/FlatLibs.mk
index 13dcc6c3400f0b24f52fe5bfd140265af0a8c6f3..69fe6a9fa067419996c597ec493e4273d519c0a8 100644
--- a/FlatLibs.mk
+++ b/FlatLibs.mk
@@ -45,6 +45,12 @@
 NUTTXLIBS = lib$(DELIM)libsched$(LIBEXT)
 USERLIBS =
 
+# Driver support.  Generally depends on file descriptor support but there
+# are some components in the drivers directory that are needed even if file
+# descriptors are not supported.
+
+NUTTXLIBS += lib$(DELIM)libdrivers$(LIBEXT)
+
 # Add libraries for board support
 
 NUTTXLIBS += lib$(DELIM)libconfigs$(LIBEXT)
@@ -89,11 +95,8 @@ ifeq ($(CONFIG_NFILE_DESCRIPTORS),0)
 ifneq ($(CONFIG_NSOCKET_DESCRIPTORS),0)
 NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT)
 endif
-ifeq ($(CONFIG_NET),y)
-NUTTXLIBS += lib$(DELIM)libdrivers$(LIBEXT)
-endif
 else
-NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT) lib$(DELIM)libdrivers$(LIBEXT) lib$(DELIM)libbinfmt$(LIBEXT)
+NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT) lib$(DELIM)libbinfmt$(LIBEXT)
 endif
 
 # Add libraries for the NX graphics sub-system
diff --git a/Kconfig b/Kconfig
index 17d6e351f9eb96bb6f72fe51044c4780d9a375a1..4d7949d4e31da4417ff62727a53eb865291c86c2 100644
--- a/Kconfig
+++ b/Kconfig
@@ -45,6 +45,14 @@ config HOST_OTHER
 
 endchoice
 
+config TOOLCHAIN_WINDOWS
+	bool
+	default n
+	depends on HOST_WINDOWS
+	---help---
+		Selected internally if the selected Windows environment is compatible
+		with the use of Windows native toolchains.
+
 choice
 	prompt "Windows Build Environment"
 	default WINDOWS_CYGWIN
@@ -52,24 +60,34 @@ choice
 
 config WINDOWS_NATIVE
 	bool "Windows Native"
+	select TOOLCHAIN_WINDOWS
 	---help---
 		Build natively in a CMD.exe environment with Windows style paths
 		(like C:\cgywin\home)
 
 config WINDOWS_CYGWIN
 	bool "Cygwin"
+	select TOOLCHAIN_WINDOWS
 	---help---
 		Build natively in a Cygwin environment with POSIX style paths (like
-		/cygdrive/c/cgywin/home)
+		/cygdrive/c/Program Files)
+
+config WINDOWS_UBUNTU
+	bool "Ubuntu under Windows 10"
+	---help---
+		Build natively in an Unbuntu shell under Windoes 10 environment with
+		POSIX style paths (like /mnt/c/Program Files)
 
 config WINDOWS_MSYS
 	bool "MSYS"
+	select TOOLCHAIN_WINDOWS
 	---help---
 		Build natively in a Cygwin environment with POSIX style paths (like
 		/cygdrive/c/cgywin/home)
 
 config WINDOWS_OTHER
 	bool "Windows POSIX-like environment"
+	select TOOLCHAIN_WINDOWS
 	---help---
 		Build natively in another POSIX-like environment.  Additional
 		support may be necessary
@@ -339,10 +357,10 @@ config ARCH_MATH_H
 	default n
 	---help---
 		There is also a re-directing version of math.h in the source tree.
-		However, it resides out-of-the-way at include/nuttx/math.h because it
+		However, it resides out-of-the-way at include/nuttx/lib/math.h because it
 		conflicts too often with the system math.h. If ARCH_MATH_H=y is
 		defined, however, the top-level makefile will copy the redirecting
-		math.h header file from include/nuttx/math.h to include/math.h. math.h
+		math.h header file from include/nuttx/lib/math.h to include/math.h. math.h
 		will then include the architecture-specific version of math.h that you
 		must provide at nuttx/arch/>architecture/include/stdarg.h
 
 		If ARCH_STDARG_H=y is defined, the top-level makefile will copy the
-		re-directing stdarg.h header file from include/nuttx/stdarg.h to
+		re-directing stdarg.h header file from include/nuttx/lib/stdarg.h to
 		include/stdarg.h. So for the architectures that cannot use their
 		toolchain's stdarg.h file, they can use this alternative by defining
 		ARCH_STDARG_H=y and providing. If ARCH_STDARG_H, is not defined, then
@@ -395,9 +413,14 @@ endmenu # Customize Header Files
 
 menu "Debug Options"
 
-config DEBUG
+config DEBUG_ALERT
+	bool
+	default n
+
+config DEBUG_FEATURES
 	bool "Enable Debug Features"
 	default n
+	select DEBUG_ALERT
 	---help---
 		Enables built-in debug features.  Selecting this option will (1) Enable
 		debug assertions in the code, (2) enable extended parameter testing in
@@ -405,71 +428,270 @@ config DEBUG
 		Note that enabling this option by itself does not produce debug output.
 		Debug output must also be selected on a subsystem-by-subsystem basis.
 
-config ARCH_HAVE_HEAPCHECK
-	bool
+if DEBUG_FEATURES
+
+comment "Debug SYSLOG Output Controls"
+
+config DEBUG_ERROR
+	bool "Enable Error Output"
+	default n
+	---help---
+		Enables output from [a-z]err() statements.  Errors are significant system
+		exceptions that require immediate attention.
+
+config DEBUG_WARN
+	bool "Enable Warnings Output"
 	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enables output from [a-z]warn() statements.  Warnings are considered to
+		be various unexpected conditions, potential errors or errors that will
+		not have serious consequences.
 
-if DEBUG
+config DEBUG_INFO
+	bool "Enable Informational Debug Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enables verbose "informational" debug output.  If you enable
+		CONFIG_DEBUG_INFO, then very chatty (and often annoying) output
+		will be generated.
 
-config DEBUG_VERBOSE
-	bool "Enable Debug Verbose Output"
+config DEBUG_ASSERTIONS
+	bool "Enable Debug Assertions"
 	default n
 	---help---
-		Enables verbose debug output (assuming debug features are enabled).
-		As a general rule, when DEBUG is enabled only errors will be
-		reported in the debug SYSLOG output.  But if you also enable
-		DEBUG_VERBOSE, then very chatty (and often annoying) output will be
-		generated.  This means there are two levels of debug output:
-		errors-only and everything.
+		Enables the DEBUGASSERT() macro.  When CONFIG_DEBUG_ASSERTIONS is
+		defined, DEBUGASSERT() will cause the system to halt if the
+		assertion fails.  If CONFIG_DEBUG_ASSERTIONS is not defined
+		DEBUGASSERT() compiled out of the system.  In general, you would
+		set CONFIG_DEBUG_ASSERTIONS=y during debug, but disable the
+		assertions on a final, buckled up system.
 
 comment "Subsystem Debug Options"
 
 config DEBUG_AUDIO
-	bool "Audio Device Debug Output"
+	bool "Audio Device Debug Features"
 	default n
 	depends on AUDIO
 	---help---
-		Enable low level debug SYSLOG output from the audio subsystem and
+		Enable audio device debug features.
+		Enable low level debug featurs for the audio subsystem and for audio
 		device drivers. (disabled by default).  Support for this debug option
 		is architecture-specific and may not be available for some MCUs.
 
+if DEBUG_AUDIO
+
+config DEBUG_AUDIO_ERROR
+	bool "Audio Device Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable audio device error output to SYSLOG.
+
+config DEBUG_AUDIO_WARN
+	bool "Audio Device Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable audio device warning output to SYSLOG.
+
+config DEBUG_AUDIO_INFO
+	bool "Audio Device Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable audio device informational output to SYSLOG.
+
+endif # DEBUG_AUDIO
+
 config DEBUG_BINFMT
-	bool "Binary Loader Debug Output"
+	bool "Binary Loader Debug Features"
 	default n
 	depends on !BINFMT_DISABLE
 	---help---
-		Enable binary loader debug SYSLOG output (disabled by default)
+		Enable binary loader debug features.
+
+if DEBUG_BINFMT
+
+config DEBUG_BINFMT_ERROR
+	bool "Binary Loader Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable binary loader error output to SYSLOG.
+
+config DEBUG_BINFMT_WARN
+	bool "Binary Loader Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable binary loader warning output to SYSLOG.
+
+config DEBUG_BINFMT_INFO
+	bool "Binary Loader Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable binary loader informational output to SYSLOG.
+
+endif # DEBUG_BINFMT
 
 config DEBUG_CRYPTO
-	bool "Crypto Debug Output"
+	bool "Crypto Debug Features"
 	default n
 	depends on CRYPTO
 	---help---
-		Enable Crypto debug SYSLOG output (disabled by default)
+		Enable cryptographic debug features.
+
+if DEBUG_CRYPTO
+
+config DEBUG_CRYPTO_ERROR
+	bool "Crypto Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable cryptographic error output to SYSLOG.
+
+config DEBUG_CRYPTO_WARN
+	bool "Crypto Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable cryptographic warning output to SYSLOG.
+
+config DEBUG_CRYPTO_INFO
+	bool "Crypto Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable cryptographic informational output to SYSLOG.
+
+endif # DEBUG_CRYPTO
 
 config DEBUG_FS
-	bool "File System Debug Output"
+	bool "File System Debug Features"
+	default n
+	---help---
+		Enable file system debug features.
+
+if DEBUG_FS
+
+config DEBUG_FS_ERROR
+	bool "File System Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable file system error output to SYSLOG.
+
+config DEBUG_FS_WARN
+	bool "File System Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable file system warning output to SYSLOG.
+
+config DEBUG_FS_INFO
+	bool "File System Informational Output"
 	default n
+	depends on DEBUG_INFO
 	---help---
-		Enable file system debug SYSLOG output (disabled by default)
+		Enable file system informational output to SYSLOG.
+
+endif # DEBUG_FS
 
 config DEBUG_GRAPHICS
-	bool "Graphics Debug Output"
+	bool "Graphics Debug Features"
 	default n
 	---help---
-		Enable NX graphics debug SYSLOG output (disabled by default)
+		Enable NX graphics subsystem debug features.
+
+if DEBUG_GRAPHICS
+
+config DEBUG_GRAPHICS_ERROR
+	bool "Graphics Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable NX graphics subsystem error output to SYSLOG.
+
+config DEBUG_GRAPHICS_WARN
+	bool "Graphics Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable NX graphics subsystem warning output to SYSLOG.
+
+config DEBUG_GRAPHICS_INFO
+	bool "Graphics Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable NX graphics subsystem informational output to SYSLOG.
+
+endif # DEBUG_GRAPHICS
 
 config DEBUG_LIB
-	bool "C Library Debug Output"
+	bool "C Library Debug Features"
+	default n
+	---help---
+		Enable C library debug features.
+
+if DEBUG_LIB
+
+config DEBUG_LIB_ERROR
+	bool "C Library Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable C library error output to SYSLOG.
+
+config DEBUG_LIB_WARN
+	bool "C Library Warnings Output"
 	default n
+	depends on DEBUG_WARN
 	---help---
-		Enable C library debug SYSLOG output (disabled by default)
+		Enable C library warning output to SYSLOG.
+
+config DEBUG_LIB_INFO
+	bool "C Library Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable C library informational output to SYSLOG.
+
+endif # DEBUG_LIB
 
 config DEBUG_MM
-	bool "Memory Manager Debug Output"
+	bool "Memory Manager Debug Features"
+	default n
+	---help---
+		Enable memory management debug features.
+
+if DEBUG_MM
+
+config DEBUG_MM_ERROR
+	bool "Memory Manager Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable memory management error output to SYSLOG.
+
+config DEBUG_MM_WARN
+	bool "Memory Manager Warnings Output"
 	default n
+	depends on DEBUG_WARN
 	---help---
-		Enable memory management debug SYSLOG output (disabled by default)
+		Enable memory management warning output to SYSLOG.
+
+config DEBUG_MM_INFO
+	bool "Memory Manager Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable memory management informational output to SYSLOG.
+
+endif # DEBUG_MM
 
 config DEBUG_SHM
 	bool "Shared Memory Debug Output"
@@ -479,25 +701,101 @@ config DEBUG_SHM
 		Enable shared memory management debug SYSLOG output (disabled by default)
 
 config DEBUG_NET
-	bool "Network Debug Output"
+	bool "Network Debug Features"
 	default n
 	depends on ARCH_HAVE_NET
 	---help---
-		Enable network debug SYSLOG output (disabled by default)
+		Enable network debug features.
+
+if DEBUG_NET
+
+config DEBUG_NET_ERROR
+	bool "Network Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable network error output to SYSLOG.
+
+config DEBUG_NET_WARN
+	bool "Network Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable network warning output to SYSLOG.
+
+config DEBUG_NET_INFO
+	bool "Network Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable network informational output to SYSLOG.
+
+endif # DEBUG_NET
 
 config DEBUG_SCHED
-	bool "Scheduler Debug Output"
+	bool "Scheduler Debug Features"
+	default n
+	---help---
+		Enable OS scheduler debug features.
+
+if DEBUG_SCHED
+
+config DEBUG_SCHED_ERROR
+	bool "Scheduler Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable OS scheduler error output to SYSLOG.
+
+config DEBUG_SCHED_WARN
+	bool "Scheduler Warnings Output"
 	default n
+	depends on DEBUG_WARN
 	---help---
-		Enable OS debug SYSLOG output (disabled by default)
+		Enable OS scheduler warning output to SYSLOG.
+
+config DEBUG_SCHED_INFO
+	bool "Scheduler Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable OS scheduler informational output to SYSLOG.
+
+endif # DEBUG_SCHED
 
 config DEBUG_SYSCALL
-	bool "SYSCALL Debug Output"
+	bool "SYSCALL Debug Features"
 	default n
 	depends on LIB_SYSCALL
 	---help---
-		Enable very low level output related to system calls.  This gives
-		you basically a poor man's version of strace.
+		Enable very low level features related to system calls.  If SYSCAL
+		output is enabled, this gives you basically a poor man's version of
+		strace.
+
+if DEBUG_SYSCALL
+
+config DEBUG_SYSCALL_ERROR
+	bool "SYSCALL Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable OS SYSCALL error output to SYSLOG.
+
+config DEBUG_SYSCALL_WARN
+	bool "SYSCALL Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable OS SYSCALL warning output to SYSLOG.
+
+config DEBUG_SYSCALL_INFO
+	bool "SYSCALL Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable OS SYSCALL informational output to SYSLOG.
+
+endif # DEBUG_SYSCALL
 
 config DEBUG_WIRELESS
 	bool "Wireless Device Debug Output"
@@ -511,25 +809,46 @@ config DEBUG_WIRELESS
 comment "OS Function Debug Options"
 
 config DEBUG_DMA
-	bool "DMA Debug Output"
+	bool "DMA Debug Features"
 	default n
 	depends on ARCH_DMA
 	---help---
-		Enable DMA-releated debug SYSLOG output (disabled by default).
+		Enable DMA debug features.
+
 		Support for this debug option is architecture-specific and may not
 		be available for some MCUs.
 
-config DEBUG_HEAP
-	bool "Heap usage debug hooks"
+if DEBUG_DMA
+
+config DEBUG_DMA_ERROR
+	bool "DMA Error Output"
 	default n
-	depends on ARCH_HAVE_HEAPCHECK
+	depends on DEBUG_ERROR
 	---help---
-		Enable hooks to check heap usage.  Only supported by a few architectures.
+		Enable DMA error output to SYSLOG.
+
+config DEBUG_DMA_WARN
+	bool "DMA Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable DMA warning output to SYSLOG.
+
+config DEBUG_DMA_INFO
+	bool "DMA Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable DMA informational output to SYSLOG.
+
+endif # DEBUG_DMA
 
 config DEBUG_IRQ
-	bool "Interrupt Controller Debug Output"
+	bool "Interrupt Controller Debug Features"
 	default n
 	---help---
+		Enable interrupt controller debug features.
+
 		Some (but not all) architectures support debug output to verify
 		interrupt controller logic.  If supported, then option will enable
 		that output.  This may interfere with normal operations!  You
@@ -537,158 +856,633 @@ config DEBUG_IRQ
 		that here is a problem with that logic.  On some platforms, this
 		option may even cause crashes! Use with care!
 
+if DEBUG_IRQ
+
+config DEBUG_IRQ_ERROR
+	bool "Interrupt Controller Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable interrupt controller error output to SYSLOG.
+
+config DEBUG_IRQ_WARN
+	bool "Interrupt Controller Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable interrupt controller warning output to SYSLOG.
+
+config DEBUG_IRQ_INFO
+	bool "Interrupt Controller Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable interrupt controller informational output to SYSLOG.
+
+endif # DEBUG_IRQ
+
 config DEBUG_PAGING
-	bool "Demand Paging Debug Output"
+	bool "Paging Debug Features"
 	default n
 	depends on PAGING
 	---help---
-		Enable demand paging debug SYSLOG output (disabled by default)
+		Enable OS demand paging debug features.
+
+if DEBUG_PAGING
+
+config DEBUG_PAGING_ERROR
+	bool "Paging Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable OS demand paging error output to SYSLOG.
+
+config DEBUG_PAGING_WARN
+	bool "Paging Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable OS demand paging warning output to SYSLOG.
+
+config DEBUG_PAGING_INFO
+	bool "Paging Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable OS demand paging informational output to SYSLOG.
+
+endif # DEBUG_PAGING
 
 comment "Driver Debug Options"
 
 config DEBUG_LCD
-	bool "Low-level LCD Debug Output"
+	bool "Low-level LCD Debug Features"
 	default n
 	depends on LCD
 	---help---
-		Enable low level debug SYSLOG output from the LCD driver (disabled
-		by default).  Support for this debug option is board-specific and
-		may not be available for some boards.
+		Enable LCD driver debug features.
+
+		Support for this debug option is board-specific and may not
+		be available for some boards.
+if DEBUG_LCD
+
+config DEBUG_LCD_ERROR
+	bool "LCD Driver Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable LCD driver error output to SYSLOG.
+
+config DEBUG_LCD_WARN
+	bool "LCD Driver Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable LCD driver warning output to SYSLOG.
+
+config DEBUG_LCD_INFO
+	bool "LCD Driver Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable LCD driver informational output to SYSLOG.
+
+endif # DEBUG_LCD
 
 config DEBUG_LEDS
-	bool "Low-level LED Debug Output"
+	bool "Low-level LED Debug Features"
 	default n
 	depends on ARCH_HAVE_LEDS
 	---help---
-		Enable low level debug from board-specific LED logic.  Support for
-		this debug option is board-specific and may not be available for
-		some boards.
+		Enable LED driver debug features.
+
+		Support for this debug option is board-specific and may not
+		be available for some boards.
+
+if DEBUG_LEDS
+
+config DEBUG_LEDS_ERROR
+	bool "LED Driver Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable LED driver error output to SYSLOG.
+
+config DEBUG_LEDS_WARN
+	bool "LED Driver Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable LED driver warning output to SYSLOG.
+
+config DEBUG_LEDS_INFO
+	bool "LED Driver Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable LED driver informational output to SYSLOG.
+
+endif # DEBUG_LEDS
 
 config DEBUG_INPUT
-	bool "Input Device Debug Output"
+	bool "Input Device Debug Features"
 	default n
 	depends on INPUT
 	---help---
-		Enable low level debug SYSLOG output from the input device drivers
+		Enable input d.
+		Enable low level evice debug features for the input device drivers
 		such as mice and touchscreens (disabled by default).  Support for
 		this debug option is board-specific and may not be available for
 		some boards.
 
+if DEBUG_INPUT
+
+config DEBUG_INPUT_ERROR
+	bool "Input Device Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable input device error output to SYSLOG.
+
+config DEBUG_INPUT_WARN
+	bool "Input Device Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable input device warning output to SYSLOG.
+
+config DEBUG_INPUT_INFO
+	bool "Input Device Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable input device informational output to SYSLOG.
+
+endif # DEBUG_INPUT
+
 config DEBUG_ANALOG
-	bool "Analog Device Debug Output"
+	bool "Analog Device Debug Features"
+	default n
+	depends on ANALOG
+	---help---
+		Enable analog device debug features.
+		Enable low level debug features the analog device drivers such as
+		A/D and D/A converters (disabled by default).  Support for this
+		debug option is architecture-specific and may not be available for
+		some MCUs.
+
+if DEBUG_ANALOG
+
+config DEBUG_ANALOG_ERROR
+	bool "Analog Device Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable analog device error output to SYSLOG.
+
+config DEBUG_ANALOG_WARN
+	bool "Analog Device Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable analog device warning output to SYSLOG.
+
+config DEBUG_ANALOG_INFO
+	bool "Analog Device Informational Output"
 	default n
+	depends on DEBUG_INFO
 	---help---
-		Enable low level debug SYSLOG output from the analog device drivers
-		such as A/D and D/A converters (disabled by default).  Support for
-		this debug option is architecture-specific and may not be available
-		for some MCUs.
+		Enable CAN driver informational output to SYSLOG.
+
+endif # DEBUG_ANALOG
 
 config DEBUG_CAN
-	bool "CAN Debug Output"
+	bool "CAN Debug Features"
 	default n
 	depends on CAN
 	---help---
-		Enable CAN driver debug SYSLOG output (disabled by default).
+		Enable CAN driver debug features.
+
 		Support for this debug option is architecture-specific and may not
 		be available for some MCUs.
 
+if DEBUG_CAN
+
+config DEBUG_CAN_ERROR
+	bool "CAN Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable CAN driver error output to SYSLOG.
+
+config DEBUG_CAN_WARN
+	bool "CAN Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable CAN driver warning output to SYSLOG.
+
+config DEBUG_CAN_INFO
+	bool "CAN Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable CAN driver informational output to SYSLOG.
+
+endif # DEBUG_CAN
+
 config DEBUG_GPIO
-	bool "GPIO Debug Output"
+	bool "GPIO Debug Features"
 	default n
 	---help---
-		Enable GPIO-releated debug SYSLOG output (disabled by default).
+		Enable GPIO debug features.
+
 		Support for this debug option is architecture-specific and may not
 		be available for some MCUs.
 
+if DEBUG_GPIO
+
+config DEBUG_GPIO_ERROR
+	bool "GPIO Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable GPIO error output to SYSLOG.
+
+config DEBUG_GPIO_WARN
+	bool "GPIO Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable GPIO warning output to SYSLOG.
+
+config DEBUG_GPIO_INFO
+	bool "GPIO Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable GPIO informational output to SYSLOG.
+
+endif # DEBUG_GPIO
+
 config DEBUG_I2C
-	bool "I2C Debug Output"
+	bool "I2C Debug Features"
 	default n
 	depends on I2C
 	---help---
-		Enable I2C driver debug SYSLOG output (disabled by default).
+		Enable I2C debug features.
+
 		Support for this debug option is architecture-specific and may not
 		be available for some MCUs.
 
+if DEBUG_I2C
+
+config DEBUG_I2C_ERROR
+	bool "I2C Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable I2C driver error output to SYSLOG.
+
+config DEBUG_I2C_WARN
+	bool "I2C Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable I2C driver warning output to SYSLOG.
+
+config DEBUG_I2C_INFO
+	bool "I2C Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable I2C driver informational output to SYSLOG.
+
+endif # DEBUG_I2C
+
 config DEBUG_I2S
-	bool "I2S Debug Output"
+	bool "I2S Debug Features"
 	default n
 	depends on I2S
 	---help---
-		Enable I2S driver debug SYSLOG output (disabled by default).
+		Enable I2S debug features.
+
 		Support for this debug option is architecture-specific and may not
 		be available for some MCUs.
 
+if DEBUG_I2S
+
+config DEBUG_I2S_ERROR
+	bool "I2S Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable I2S driver error output to SYSLOG.
+
+		Support for this debug option is architecture-specific and may not
+		be available for some MCUs.
+
+config DEBUG_I2S_WARN
+	bool "I2S Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable I2S driver warning output to SYSLOG.
+
+config DEBUG_I2S_INFO
+	bool "I2S Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable I2S driver informational output to SYSLOG.
+
+endif # DEBUG_I2S
+
 config DEBUG_PWM
-	bool "PWM Debug Output"
+	bool "PWM Debug Features"
 	default n
 	depends on PWM
 	---help---
-		Enable PWM driver debug SYSLOG output (disabled by default).
+		Enable PWM debug features.
+
 		Support for this debug option is architecture-specific and may not
 		be available for some MCUs.
 
+if DEBUG_PWM
+
+config DEBUG_PWM_ERROR
+	bool "PWM Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable PWM driver error output to SYSLOG.
+
+		Support for this debug option is architecture-specific and may not
+		be available for some MCUs.
+
+config DEBUG_PWM_WARN
+	bool "PWM Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable PWM driver warning output to SYSLOG.
+
+config DEBUG_PWM_INFO
+	bool "PWM Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable PWM driver informational output to SYSLOG.
+
+endif # DEBUG_PWM
+
 config DEBUG_RTC
-	bool "RTC Debug Output"
+	bool "RTC Debug Features"
 	default n
 	depends on RTC
 	---help---
-		Enable RTC driver debug SYSLOG output (disabled by default).
+		Enable RTC debug features.
+
+		Support for this debug option is architecture-specific and may not
+		be available for some MCUs.
+
+if DEBUG_RTC
+
+config DEBUG_RTC_ERROR
+	bool "RTC Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable RTC driver error output to SYSLOG.
+
+		Support for this debug option is architecture-specific and may not
+		be available for some MCUs.
+
+config DEBUG_RTC_WARN
+	bool "RTC Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable RTC driver warning output to SYSLOG.
+
+config DEBUG_RTC_INFO
+	bool "RTC Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable RTC driver informational output to SYSLOG.
+
+endif # DEBUG_RTC
+
+config DEBUG_MEMCARD
+	bool "Memory Card Driver Debug Features"
+	default n
+	depends on MMCSD
+	---help---
+		Enable MMC/SD memory card Driver debug features.
+
 		Support for this debug option is architecture-specific and may not
 		be available for some MCUs.
 
-config DEBUG_SDIO
-	bool "SDIO Debug Output"
+if DEBUG_MEMCARD
+
+config DEBUG_MEMCARD_ERROR
+	bool "Memory Card Driver Error Output"
 	default n
-	depends on MMCSD_SDIO
+	depends on DEBUG_ERROR
 	---help---
-		Enable SDIO driver debug SYSLOG output (disabled by default).
+		Enable MMC/SD memory card driver error output to SYSLOG.
+
 		Support for this debug option is architecture-specific and may not
 		be available for some MCUs.
 
+config DEBUG_MEMCARD_WARN
+	bool "Memory Card Driver Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable MMC/SD memory card driver warning output to SYSLOG.
+
+config DEBUG_MEMCARD_INFO
+	bool "Memory Card Driver Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable MMC/SD memory card driver informational output to SYSLOG.
+
+endif # DEBUG_MEMCARD
+
 config DEBUG_SENSORS
-	bool "Sensor Debug Output"
+	bool "Sensor Debug Features"
 	default n
 	depends on SENSORS
 	---help---
-		Enable sensor driver debug SYSLOG output (disabled by default).
+		Enable sensor driver debug features.
+
 		Support for this debug option is architecture-specific and may not
 		be available for some MCUs.
 
+if DEBUG_SENSORS
+
+config DEBUG_SENSORS_ERROR
+	bool "Sensor Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable sensor driver error output to SYSLOG.
+
+config DEBUG_SENSORS_WARN
+	bool "Sensor Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable sensor driver warning output to SYSLOG.
+
+config DEBUG_SENSORS_INFO
+	bool "Sensor Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable sensor driver informational output to SYSLOG.
+
+endif # DEBUG_SENSORS
+
 config DEBUG_SPI
-	bool "SPI Debug Output"
+	bool "SPI Debug Features"
 	default n
 	depends on SPI
 	---help---
-		Enable I2C driver debug SYSLOG output (disabled by default).
+		Enable SPI debug features.
+
 		Support for this debug option is architecture-specific and may not
 		be available for some MCUs.
 
+if DEBUG_SPI
+
+config DEBUG_SPI_ERROR
+	bool "SPI Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable SPI error output to SYSLOG.
+
+config DEBUG_SPI_WARN
+	bool "SPI Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable SPI warning output to SYSLOG.
+
+config DEBUG_SPI_INFO
+	bool "SPI Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable SPI informational output to SYSLOG.
+
+endif # DEBUG_SPI
+
 config DEBUG_TIMER
-	bool "Timer Debug Output"
+	bool "Timer Debug Features"
 	default n
-	depends on TIMER
 	---help---
-		Enable timer debug SYSLOG output (disabled by default).
+		Enable timer debug features.
+
 		Support for this debug option is architecture-specific and may not
 		be available for some MCUs.
 
+if DEBUG_TIMER
+
+config DEBUG_TIMER_ERROR
+	bool "Timer Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable timer error output to SYSLOG.
+
+config DEBUG_TIMER_WARN
+	bool "Timer Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable timer warning output to SYSLOG.
+
+config DEBUG_TIMER_INFO
+	bool "Timer Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable timer informational output to SYSLOG.
+
+endif # DEBUG_TIMER
+
 config DEBUG_USB
-	bool "USB Debug Output"
+	bool "USB Debug Features"
 	default n
 	depends on USBDEV || USBHOST
 	---help---
-		Enable usb debug SYSLOG output (disabled by default)
+		Enable USB debug features.
+
+if DEBUG_USB
+
+config DEBUG_USB_ERROR
+	bool "USB Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable USB error output to SYSLOG.
+
+config DEBUG_USB_WARN
+	bool "USB Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable USB warning output to SYSLOG.
+
+config DEBUG_USB_INFO
+	bool "USB Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable USB informational output to SYSLOG.
+
+endif # DEBUG_USB
 
 config DEBUG_WATCHDOG
-	bool "Watchdog Timer Debug Output"
+	bool "Watchdog Timer Debug Features"
 	default n
 	depends on WATCHDOG
 	---help---
-		Enable watchdog timer debug SYSLOG output (disabled by default).
+		Enable watchdog timer debug features.
+
 		Support for this debug option is architecture-specific and may not
 		be available for some MCUs.
 
-endif # DEBUG
+if DEBUG_WATCHDOG
+
+config DEBUG_WATCHDOG_ERROR
+	bool "Watchdog Timer Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable watchdog time error output to SYSLOG.
+
+config DEBUG_WATCHDOG_WARN
+	bool "Watchdog Timer Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable watchdog time warning output to SYSLOG.
+
+config DEBUG_WATCHDOG_INFO
+	bool "Watchdog Timer Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable watchdog time informational output to SYSLOG.
+
+endif # DEBUG_WATCHDOG
+endif # DEBUG_FEATURES
 
 config ARCH_HAVE_STACKCHECK
 	bool
@@ -705,6 +1499,18 @@ config STACK_COLORATION
 
 		Only supported by a few architectures.
 
+config ARCH_HAVE_HEAPCHECK
+	bool
+	default n
+
+config HEAP_COLORATION
+	bool "Heap coloration"
+	default n
+	depends on ARCH_HAVE_HEAPCHECK
+	---help---
+		Enable heap coloration to check heap usage.  Only supported by a few
+		architectures.
+
 config DEBUG_SYMBOLS
 	bool "Generate Debug Symbols"
 	default n
diff --git a/KernelLibs.mk b/KernelLibs.mk
index a7888d714dceec8e15641311fc2fe46a6886d748..719430b6c9be4d435f414d62813dd4b87022f35b 100644
--- a/KernelLibs.mk
+++ b/KernelLibs.mk
@@ -45,6 +45,12 @@
 NUTTXLIBS = lib$(DELIM)libsched$(LIBEXT)
 USERLIBS =
 
+# Driver support.  Generally depends on file descriptor support but there
+# are some components in the drivers directory that are needed even if file
+# descriptors are not supported.
+
+NUTTXLIBS += lib$(DELIM)libdrivers$(LIBEXT)
+
 # Add libraries for board support
 
 NUTTXLIBS += lib$(DELIM)libconfigs$(LIBEXT)
@@ -83,11 +89,8 @@ ifeq ($(CONFIG_NFILE_DESCRIPTORS),0)
 ifneq ($(CONFIG_NSOCKET_DESCRIPTORS),0)
 NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT)
 endif
-ifeq ($(CONFIG_NET),y)
-NUTTXLIBS += lib$(DELIM)libdrivers$(LIBEXT)
-endif
 else
-NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT) lib$(DELIM)libdrivers$(LIBEXT) lib$(DELIM)libbinfmt$(LIBEXT)
+NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT) lib$(DELIM)libbinfmt$(LIBEXT)
 endif
 
 # Add libraries for the NX graphics sub-system
diff --git a/Makefile.unix b/Makefile.unix
index 022c7962169728566385ea3666e8b05b01815b47..220740c5bd3a08af6492d82b3113b10b080a50b3 100644
--- a/Makefile.unix
+++ b/Makefile.unix
@@ -178,21 +178,22 @@ endif
 
 # This is the name of the final target (relative to the top level directorty)
 
-BIN = nuttx$(EXEEXT)
+NUTTXNAME = nuttx
+BIN       = $(NUTTXNAME)$(EXEEXT)
 
 all: $(BIN)
-.PHONY: context clean_context check_context export subdir_clean clean subdir_distclean distclean apps_clean apps_distclean
+.PHONY: dirlinks context clean_context check_context export subdir_clean clean subdir_distclean distclean apps_clean apps_distclean
 
-# Target used to copy include/nuttx/math.h.  If CONFIG_ARCH_MATH_H is
+# Target used to copy include/nuttx/lib/math.h.  If CONFIG_ARCH_MATH_H is
 # defined, then there is an architecture specific math.h header file
 # that will be included indirectly from include/math.h.  But first, we
 # have to copy math.h from include/nuttx/. to include/.  Logic within
-# include/nuttx/math.h will hand the redirection to the architecture-
+# include/nuttx/lib/math.h will hand the redirection to the architecture-
 # specific math.h header file.
 #
 # If the CONFIG_LIBM is defined, the Rhombus libm will be built at libc/math.
 # Definitions and prototypes for the Rhombus libm are also contained in
-# include/nuttx/math.h and so the file must also be copied in that case.
+# include/nuttx/lib/math.h and so the file must also be copied in that case.
 #
 # If neither CONFIG_ARCH_MATH_H nor CONFIG_LIBM is defined, then no math.h
 # header file will be provided.  You would want that behavior if (1) you
@@ -208,8 +209,8 @@ endif
 endif
 
 ifeq ($(NEED_MATH_H),y)
-include/math.h: include/nuttx/math.h
-	$(Q) cp -f include/nuttx/math.h include/math.h
+include/math.h: include/nuttx/lib/math.h
+	$(Q) cp -f include/nuttx/lib/math.h include/math.h
 else
 include/math.h:
 endif
@@ -221,20 +222,20 @@ endif
 # the settings in this float.h are actually correct for your platform!
 
 ifeq ($(CONFIG_ARCH_FLOAT_H),y)
-include/float.h: include/nuttx/float.h
-	$(Q) cp -f include/nuttx/float.h include/float.h
+include/float.h: include/nuttx/lib/float.h
+	$(Q) cp -f include/nuttx/lib/float.h include/float.h
 else
 include/float.h:
 endif
 
-# Target used to copy include/nuttx/stdarg.h.  If CONFIG_ARCH_STDARG_H is
+# Target used to copy include/nuttx/lib/stdarg.h.  If CONFIG_ARCH_STDARG_H is
 # defined, then there is an architecture specific stdarg.h header file
-# that will be included indirectly from include/stdarg.h.  But first, we
+# that will be included indirectly from include/lib/stdarg.h.  But first, we
 # have to copy stdarg.h from include/nuttx/. to include/.
 
 ifeq ($(CONFIG_ARCH_STDARG_H),y)
-include/stdarg.h: include/nuttx/stdarg.h
-	$(Q) cp -f include/nuttx/stdarg.h include/stdarg.h
+include/stdarg.h: include/nuttx/lib/stdarg.h
+	$(Q) cp -f include/nuttx/lib/stdarg.h include/stdarg.h
 else
 include/stdarg.h:
 endif
@@ -280,16 +281,6 @@ tools/cnvwindeps$(HOSTEXEEXT):
 # setting up symbolic links with 'generic' directory names to specific,
 # configured directories.
 #
-# Link the apps/include directory to include/apps
-
-include/apps: Make.defs
-ifneq ($(APPDIR),)
-	@echo "LN: include/apps to $(APPDIR)/include"
-	$(Q) if [ -d $(TOPDIR)/$(APPDIR)/include ]; then \
-		$(DIRLINK) $(TOPDIR)/$(APPDIR)/include include/apps; \
-	fi
-endif
-
 # Link the arch//include directory to include/arch
 
 include/arch: Make.defs
@@ -324,7 +315,9 @@ ifneq ($(CONFIG_ARCH_CHIP),)
 	$(Q) $(DIRLINK) $(TOPDIR)/$(ARCH_INC)/$(CONFIG_ARCH_CHIP) include/arch/chip
 endif
 
-dirlinks: include/arch include/arch/board include/arch/chip $(ARCH_SRC)/board $(ARCH_SRC)/chip include/apps
+dirlinks: include/arch include/arch/board include/arch/chip $(ARCH_SRC)/board $(ARCH_SRC)/chip
+	$(Q) $(MAKE) -C configs dirlinks TOPDIR="$(TOPDIR)"
+	$(Q) $(MAKE) -C $(CONFIG_APPS_DIR) dirlinks TOPDIR="$(TOPDIR)"
 
 # context
 #
@@ -344,6 +337,7 @@ context: check_context include/nuttx/config.h include/nuttx/version.h include/ma
 # and symbolic links created by the context target.
 
 clean_context:
+	$(Q) $(MAKE) -C configs TOPDIR="$(TOPDIR)" clean_context
 	$(call DELFILE, include/nuttx/config.h)
 	$(call DELFILE, include/nuttx/version.h)
 	$(call DELFILE, include/math.h)
@@ -353,7 +347,6 @@ clean_context:
 	$(Q) $(DIRUNLINK) include/arch
 	$(Q) $(DIRUNLINK) $(ARCH_SRC)/board
 	$(Q) $(DIRUNLINK) $(ARCH_SRC)/chip
-	$(Q) $(DIRUNLINK) include/apps
 
 # check_context
 #
@@ -413,28 +406,28 @@ pass2: pass2deps
 		cp -f $(BIN) /tftpboot/$(BIN).${CONFIG_ARCH}; \
 	fi
 ifeq ($(CONFIG_RRLOAD_BINARY),y)
-	@echo "MK: $(BIN).rr"
-	$(Q) $(TOPDIR)/tools/mkimage.sh --Prefix $(CROSSDEV) $(BIN) $(BIN).rr
+	@echo "MK: $(NUTTXNAME).rr"
+	$(Q) $(TOPDIR)/tools/mkimage.sh --Prefix $(CROSSDEV) $(BIN) $(NUTTXNAME).rr
 	$(Q) if [ -w /tftpboot ] ; then \
-		cp -f $(BIN).rr /tftpboot/$(BIN).rr.$(CONFIG_ARCH); \
+		cp -f $(NUTTXNAME).rr /tftpboot/$(NUTTXNAME).rr.$(CONFIG_ARCH); \
 	fi
 endif
 ifeq ($(CONFIG_INTELHEX_BINARY),y)
-	@echo "CP: $(BIN).hex"
-	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex $(BIN) $(BIN).hex
+	@echo "CP: $(NUTTXNAME).hex"
+	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex $(BIN) $(NUTTXNAME).hex
 endif
 ifeq ($(CONFIG_MOTOROLA_SREC),y)
-	@echo "CP: $(BIN).srec"
-	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec $(BIN) $(BIN).srec
+	@echo "CP: $(NUTTXNAME).srec"
+	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec $(BIN) $(NUTTXNAME).srec
 endif
 ifeq ($(CONFIG_RAW_BINARY),y)
-	@echo "CP: $(BIN).bin"
-	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary $(BIN) $(BIN).bin
+	@echo "CP: $(NUTTXNAME).bin"
+	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary $(BIN) $(NUTTXNAME).bin
 endif
 ifeq ($(CONFIG_UBOOT_UIMAGE),y)
 	@echo "MKIMAGE: uImage"
 	$(Q) mkimage -A arm -O linux -C none -T kernel -a $(CONFIG_UIMAGE_LOAD_ADDRESS) \
-		-e $(CONFIG_UIMAGE_ENTRY_POINT) -n $(BIN) -d $(BIN).bin uImage
+		-e $(CONFIG_UIMAGE_ENTRY_POINT) -n $(BIN) -d $(NUTTXNAME).bin uImage
 	$(Q) if [ -w /tftpboot ] ; then \
 		cp -f uImage /tftpboot/uImage; \
 	fi
@@ -480,24 +473,36 @@ pass2dep: context tools/mkdeps$(HOSTEXEEXT) tools/cnvwindeps$(HOSTEXEEXT)
 # location: http://ymorin.is-a-geek.org/projects/kconfig-frontends.  See
 # README.txt file in the NuttX tools GIT repository for additional information.
 
-config: apps_preconfig
+do_config: dirlinks apps_preconfig
 	$(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-conf Kconfig
 
-oldconfig: apps_preconfig
+config: do_config clean_context
+
+do_oldconfig: dirlinks apps_preconfig
 	$(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-conf --oldconfig Kconfig
 
-olddefconfig: apps_preconfig
+oldconfig: do_oldconfig clean_context
+
+do_olddefconfig: dirlinks apps_preconfig
 	$(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-conf --olddefconfig Kconfig
 
-menuconfig: apps_preconfig
+olddefconfig: do_olddefconfig clean_context
+
+do_menuconfig: dirlinks apps_preconfig
 	$(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-mconf Kconfig
 
-qconfig: apps_preconfig
+menuconfig: do_menuconfig clean_context
+
+do_qconfig: dirlinks apps_preconfig
 	$(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-qconf Kconfig
 
-gconfig: apps_preconfig
+qconfig: do_qconfig clean_context
+
+gconfig: dirlinks apps_preconfig
 	$(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-gconf Kconfig
 
+gconfig: do_gconfig clean_context
+
 # export
 #
 # The export target will package the NuttX libraries and header files into
diff --git a/Makefile.win b/Makefile.win
index 5a71a42122b76d51fa96d2422549c6f45480c04a..feb94d5eb3ff973dbd901ea9eed57d66808be185 100644
--- a/Makefile.win
+++ b/Makefile.win
@@ -171,10 +171,11 @@ endif
 
 # This is the name of the final target (relative to the top level directorty)
 
-BIN = nuttx$(EXEEXT)
+NUTTXNAME = nuttx
+BIN       = $(NUTTXNAME)$(EXEEXT)
 
 all: $(BIN)
-.PHONY: context clean_context check_context configenv config oldconfig menuconfig export subdir_clean clean subdir_distclean distclean apps_clean apps_distclean
+.PHONY: dirlinks context clean_context check_context configenv config oldconfig menuconfig export subdir_clean clean subdir_distclean distclean apps_clean apps_distclean
 
 # Target used to copy include\nuttx\math.h.  If CONFIG_ARCH_MATH_H is
 # defined, then there is an architecture specific math.h header file
@@ -275,19 +276,6 @@ tools\mkdeps$(HOSTEXEEXT):
 # setting up symbolic links with 'generic' directory names to specific,
 # configured directories.
 #
-# Link the apps\include directory to include\apps
-
-include\apps: Make.defs
-ifneq ($(APPDIR),)
-	@echo LN: include\apps $(APPDIR)\include
-ifeq ($(CONFIG_WINDOWS_MKLINK),y)
-	$(Q) /user:administrator mklink /d include\apps $(APPDIR)\include
-else
-	$(Q) xcopy $(APPDIR)\include include\apps /c /q /s /e /y /i
-	$(Q) echo FAKELNK > include\apps\.fakelnk
-endif
-endif
-
 # Link the arch\\include directory to include\arch
 
 include\arch: Make.defs
@@ -347,7 +335,9 @@ else
 endif
 endif
 
-dirlinks: include\arch include\arch\board include\arch\chip $(ARCH_SRC)\board $(ARCH_SRC)\chip include\apps
+dirlinks: include\arch include\arch\board include\arch\chip $(ARCH_SRC)\board $(ARCH_SRC)\chip
+	$(Q) $(MAKE) -C configs dirlinks TOPDIR="$(TOPDIR)"
+	$(Q) $(MAKE) -C $(CONFIG_APPS_DIR) dirlinks TOPDIR="$(TOPDIR)"
 
 # context
 #
@@ -374,7 +364,6 @@ clean_context:
 	$(call DELDIR, include\arch)
 	$(call DELDIR, $(ARCH_SRC)\board)
 	$(call DELDIR, $(ARCH_SRC)\chip)
-	$(call DELDIR, include\apps)
 
 # check_context
 #
@@ -428,20 +417,20 @@ pass2deps: pass2dep $(NUTTXLIBS)
 pass2: pass2deps
 	$(Q) $(MAKE) -C $(ARCH_SRC) TOPDIR="$(TOPDIR)" EXTRA_OBJS="$(EXTRA_OBJS)" LINKLIBS="$(LINKLIBS)" EXTRADEFINES=$(KDEFINE) $(BIN)
 ifeq ($(CONFIG_RRLOAD_BINARY),y)
-	@echo "MK: $(BIN).rr"
-	$(Q) $(TOPDIR)\tools\mkimage.sh --Prefix $(CROSSDEV) $(BIN) $(BIN).rr
+	@echo "MK: $(NUTTXNAME).rr"
+	$(Q) $(TOPDIR)\tools\mkimage.sh --Prefix $(CROSSDEV) $(BIN) $(NUTTXNAME).rr
 endif
 ifeq ($(CONFIG_INTELHEX_BINARY),y)
-	@echo "CP: $(BIN).hex"
-	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex $(BIN) $(BIN).hex
+	@echo "CP: $(NUTTXNAME).hex"
+	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex $(BIN) $(NUTTXNAME).hex
 endif
 ifeq ($(CONFIG_MOTOROLA_SREC),y)
-	@echo "CP: $(BIN).srec"
-	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec $(BIN) $(BIN).srec
+	@echo "CP: $(NUTTXNAME).srec"
+	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec $(BIN) $(NUTTXNAME).srec
 endif
 ifeq ($(CONFIG_RAW_BINARY),y)
-	@echo "CP: $(BIN).bin"
-	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary $(BIN) $(BIN).bin
+	@echo "CP: $(NUTTXNAME).bin"
+	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary $(BIN) $(NUTTXNAME).bin
 endif
 
 # $(BIN)
@@ -480,18 +469,26 @@ pass2dep: context tools\mkdeps$(HOSTEXEEXT)
 # location: http://ymorin.is-a-geek.org/projects/kconfig-frontends.  See
 # misc\tools\README.txt for additional information.
 
-config: apps_preconfig
+do_config: dirlinks apps_preconfig
 	$(Q) set APPSDIR=$(patsubst "%",%,${CONFIG_APPS_DIR})& kconfig-conf Kconfig
 
-oldconfig: apps_preconfig
+config: do_config clean_context
+
+do_oldconfig: dirlinks apps_preconfig
 	$(Q) set APPSDIR=$(patsubst "%",%,${CONFIG_APPS_DIR})& kconfig-conf --oldconfig Kconfig
 
-olddefconfig: apps_preconfig
+oldconfig: do_oldconfig clean_context
+
+do_olddefconfig: dirlinks apps_preconfig
 	$(Q) set APPSDIR=$(patsubst "%",%,${CONFIG_APPS_DIR})& kconfig-conf --olddefconfig Kconfig
 
-menuconfig: configenv apps_preconfig
+olddefconfig: do_olddefconfig clean_context
+
+do_menuconfig: dirlinks configenv apps_preconfig
 	$(Q) set APPSDIR=$(patsubst "%",%,${CONFIG_APPS_DIR})& kconfig-mconf Kconfig
 
+menuconfig: do_menuconfig clean_context
+
 # export
 #
 # The export target will package the NuttX libraries and header files into
diff --git a/ProtectedLibs.mk b/ProtectedLibs.mk
index 70185eacf47162a4f850a36919d398786f3f97b2..4f2e2c6072d35fc34030967de75fa7fe93434c5d 100644
--- a/ProtectedLibs.mk
+++ b/ProtectedLibs.mk
@@ -45,6 +45,12 @@
 NUTTXLIBS = lib$(DELIM)libsched$(LIBEXT)
 USERLIBS =
 
+# Driver support.  Generally depends on file descriptor support but there
+# are some components in the drivers directory that are needed even if file
+# descriptors are not supported.
+
+NUTTXLIBS += lib$(DELIM)libdrivers$(LIBEXT)
+
 # Add libraries for board support
 
 NUTTXLIBS += lib$(DELIM)libconfigs$(LIBEXT)
@@ -89,11 +95,8 @@ ifeq ($(CONFIG_NFILE_DESCRIPTORS),0)
 ifneq ($(CONFIG_NSOCKET_DESCRIPTORS),0)
 NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT)
 endif
-ifeq ($(CONFIG_NET),y)
-NUTTXLIBS += lib$(DELIM)libdrivers$(LIBEXT)
-endif
 else
-NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT) lib$(DELIM)libdrivers$(LIBEXT) lib$(DELIM)libbinfmt$(LIBEXT)
+NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT) lib$(DELIM)libbinfmt$(LIBEXT)
 endif
 
 # Add libraries for the NX graphics sub-system
diff --git a/README.txt b/README.txt
index db0e5e6c10b2e3f515978c38b7a3223be767639c..ed3d41c30f8420f294941b1eb721d996ca277999 100644
--- a/README.txt
+++ b/README.txt
@@ -1,8 +1,10 @@
 README
 ^^^^^^
 
-  o Installation
+  o Environments
     - Installing Cygwin
+    - Ubuntu Bash under Windows 10
+  o Installation
     - Download and Unpack
     - Semi-Optional apps/ Package
     - Installation Directories with Spaces in the Path
@@ -15,6 +17,7 @@ README
     - NuttX Configuration Tool
     - Finding Selections in the Configuration Menus
     - Reveal Hidden Configuration Options
+    - Make Sure that You on on the Right Platform
     - Comparing Two Configurations
     - Incompatibilities with Older Configurations
     - NuttX Configuration Tool under DOS
@@ -33,21 +36,49 @@ README
     - Window Native Toolchain Issues
   o Documentation
 
-INSTALLATION
+ENVIRONMENTS
 ^^^^^^^^^^^^
 
-  NuttX may be installed and built on a Linux system or on a Windows
-  system if Cygwin is installed.  The MSYS environment is an option
-  to Cygwin on the Windows platform.  However, I have little experience
-  that that configuration and it will not be discussed in this README
-  file.
-
-  Instructions for installation of Cygwin on Windows system are provided
-  in the following paragraph.
-
-  NuttX can also be installed and built on a native Windows system, but
-  with some potential tool-related issues (see the discussion "Native
-  Windows Build" below).
+  NuttX requires a POSIX development environment such as you would find under
+  Linux or OSX.  NuttX may be also be installed and built on Windows system
+  if you also provde such a POSIX development environment.  Options for a
+  POSIX development environment under Windows include:
+
+    - An installation of Linux on a virtual machine (VM) in Windows.  I have
+      not been happy using a VM myself.  I have had stability problems with
+      open source VMs and commercial VMs cost more than I want to spend.
+      Sharing files with Linux running in a VM is awkward;  sharing devices
+      connected to the Windows box with Linux in a VM is, at the very least,
+      confusing;  Using Windows tools (such as Segger J-Link) with files
+      built under the Linux VM is not a possibility.
+
+    - The Cygwin environment.  Instructions for installation of Cygwin on a
+      Windows system are provided in the following paragraph, "Installing
+      Cygwin".  Cygwin is a mature, well-tested, and very convenient
+      environment.  It is especially expecially convenient if you  need to
+      integrate with Windows tools and files.  Downsides are that the
+      installation time is very long and the compile times are slow.
+
+    - Ubuntu/Bash shell under Windows 10.  This is a new option under
+      Windows 10.  See the section "Ubuntu Bash under Windows 10" below.
+      This is an improvement over Cygwin if your concern is compile time;
+      its build performance is comparable to native Linux, certainly better
+      than the Cygwin build time.  It also installs in a tiny fraction of
+      the time as Cygwin, perhaps 20 minutes for the basic Ubuntu install
+      (vs. more than a day for the complete Cygwin install).
+
+    - The MSYS environment.  I have no experience using the MSYS environment
+      and that configuration will not be discussed in this README file.
+      See http://www.mingw.org/wiki/MSYS if you are interested in
+      using MSYS.  People report to me that they have used MSYS
+      successfully.  I suppose that the advantages of the MSYS environemnt
+      is that it is closer to a native Windows environment and uses only a
+      minimal of add-on POSIX-land tools.
+
+    - NuttX can also be installed and built on a native Windows system, but
+      with some potential tool-related issues (see the discussion "Native
+      Windows Build" under "Building NuttX" below).  GNUWin32 is used to
+      provide compatible native windows tools.
 
 Installing Cygwin
 -----------------
@@ -83,6 +114,9 @@ Installing Cygwin
      "Publishing".  You can try omitting KDE, Gnome, GTK, and other
      graphics packages if you don't plan to use them.
 
+     Perhaps a minimum set would be those packages listed below for the
+     "Ubuntu Bash under Windows 10" installation?
+
   After installing Cygwin, you will get lots of links for installed
   tools and shells.  I use the RXVT native shell.  It is fast and reliable
   and does not require you to run the Cygwin X server (which is neither
@@ -94,6 +128,136 @@ Installing Cygwin
   about 5GiB.  The server I selected was also very slow so it took
   over a day to do the whole install!
 
+Ubuntu Bash under Windows 10
+----------------------------
+
+  A better version of a command-line only Ubuntu under Windows 10 (beta)
+  has recently been made available from Microsoft.
+
+  Installation
+  ------------
+  Installation instructions abound on the Internet complete with screen
+  shots.  I will attempt to duplicate those instructions in full here.
+  Here are the simplified installation steps:
+
+    - Open "Settings".
+    - Click on "Update & security".
+    - Click on "For Developers".
+    - Under "Use developer features", select the "Developer mode" option to
+      setup the environment to install Bash.
+    - A message box should pop up.  Click "Yes" to turn on developer mode.
+    - After the necessary components install, you'll need to restart your
+      computer.
+
+  Once your computer reboots:
+
+    - Open "Control Panel".
+    - Click on "Programs".
+    - Click on "Turn Windows features on or off".
+    - A list of features will pop up, check the "Windows Subsystem for Linux
+      (beta)" option.
+    - Click OK.
+    - Once the components installed on your computer, click the "Restart
+      now" button to complete the task.
+
+  After your computer restarts, you will notice that Bash will not appear in
+  the "Recently added" list of apps, this is because Bash isn't actually
+  installed yet. Now that you have setup the necessary components, use the
+  following steps to complete the installation of Bash:
+
+    - Open "Start", do a search for bash.exe, and press "Enter".
+    - On the command prompt, type y and press Enter to download and install
+      Bash from the Windows Store.  This will take awhile.
+    - Then you'll need to create a default UNIX user account. This account
+      doesn't have to be the same as your Windows account. Enter the
+      username in the required field and press Enter (you can't use the
+      username "admin").
+    - Close the "bash.exe" command prompt.
+
+  Now that you completed the installation and setup, you can open the Bash
+  tool from the Start menu like you would with any other app.
+
+  Accessing Windows Files from Ubuntu
+  -----------------------------------
+  File sysems will be mounted under "/mnt" so for example "C:\Program Files"
+  appears at "/mnt/c/Program Files".  This is as opposed to Cgwin where
+  the same directory would appear at "/cygdrive/c/Program Files".
+
+  With these differences (perhaps a few other Windows quirks) the Ubuntu
+  install works just like Ubuntu running natively on your PC.
+
+  Accessing Ubuntu Files From Windows
+  -----------------------------------
+  In Ubuntu Userspace for Windows, the Ubuntu file system root directory is
+  at:
+
+    %localappdata%\lxss\rootfs
+
+  Or
+
+    C:\Users\Username\AppData\Local\lxss\rootfs
+
+  Install Linux Software.
+  -----------------------
+  Use "sudo apt-get install ".  As examples, this is how
+  you would get GIT:
+
+    $ sudo apt-get install git
+
+  This will get you a compiler for your host PC:
+
+    $ sudo apt-get install gcc
+
+  This will get you an ARM compiler for your target:
+
+    $ sudo apt-get install gcc-arm-none-eabi
+
+  NOTE: That is just an example.  I am not sure if apt-get will give you a
+  current or usable compiler.  You should carefully select your toolchain
+  for the needs of your project.]
+
+  You will also need to the get the kconfig-frontends configuration as
+  described below under "NuttX Configuration tool".  In order build the
+  kconfig-frontends configuration tool you will also need:  make, gperf,
+  flex, bison, and libncurses-dev.
+
+  That is enough to do a basic NuttX build.
+
+  Integrating with Windows Tools
+  ------------------------------
+  If you want to integrate with Windows native tools, then you would need
+  deal with the same kind of craziness as with integrating Cygwin with
+  native toolchains, see the section "Cygwin Build Problems" below.
+
+  However, there is currently no build support for using Windows native
+  tools with Ubuntu under Windows.  This tool combination is made to work
+  with Cygwin through the use of the 'cygpath -w' tool that converts paths
+  from say '/cydrive/c/Program Files' to 'C:\Program Files'.  There is,
+  however, no corresponding tool to convert '/mnt/c/Program Files' in the
+  Ubuntu environment.
+
+  Graphics Support
+  ----------------
+  The Ubuntu version support by Microsoft is a command-line only version.
+  There is no support for Linux graphics utilities.
+
+  This limititation is not a limitation of Ubuntu, however, only in what
+  Microsoft is willing to support.  If you install a X-Server, then you
+  can also use basic graphics utilities.  See for example:
+
+    http://www.howtogeek.com/261575/how-to-run-graphical-linux-desktop-applications-from-windows-10s-bash-shell/
+
+  Many Linux graphics programs would, however, also require a graphics
+  framework like GTK or Qt.  So this might be a trip down the rabbit hole.
+
+INSTALLATION
+^^^^^^^^^^^^
+
+  There are two ways to get NuttX:  You may download released, stable
+  tarballs from wither the Bitbucket or Sourceforge download locations.
+  Or you may get NuttX by cloning the Bitbucket GIT repositories.  Let's
+  consider the released tarballs first:
+
 Download and Unpack
 -------------------
 
@@ -104,6 +268,11 @@ Download and Unpack
   match the various instructions in the documentation and some scripts
   in the source tree.
 
+  Download locations:
+
+    https://bitbucket.org/nuttx/nuttx/downloads
+    https://sourceforge.net/projects/nuttx/files/nuttx/
+
 Semi-Optional apps/ Package
 ---------------------------
 
@@ -321,13 +490,13 @@ Notes about Header Files
 
     If you have a custom, architecture specific math.h header file, then
     that header file should be placed at arch//include/math.h.  There
-    is a stub math.h header file located at include/nuttx/math.h.  This stub
+    is a stub math.h header file located at include/nuttx/lib/math.h.  This stub
     header file can be used to "redirect" the inclusion to an architecture-
     specific math.h header file.  If you add an architecture specific math.h
     header file then you should also define CONFIG_ARCH_MATH_H=y in your
     NuttX Configuration file.  If CONFIG_ARCH_MATH_H is selected, then the
     top-level Makefile will copy the stub math.h header file from
-    include/nuttx/math.h to include/math.h where it will become the system
+    include/nuttx/lib/math.h to include/math.h where it will become the system
     math.h header file.  The stub math.h header file does nothing other
     than to include that architecture-specific math.h header file as the
     system math.h header file.
@@ -576,6 +745,38 @@ Reveal Hidden Configuration Options
   cannot be selected and has no value).  About all you do is to select
   the  option to see what the dependencies are.
 
+Make Sure that You on on the Right Platform
+-------------------------------------------
+
+  Saved configurations may run on Linux, Cygwin (32- or 64-bit), or other
+  platforms.  The platform characteristics can be changed use 'make
+  menuconfig'.  Sometimes this can be confusing due to the differences
+  between the platforms.  Enter sethost.sh
+
+  sethost.sh is a simple script that changes a configuration to your
+  host platform.  This can greatly simplify life if you use many different
+  configurations.  For example, if you are running on Linux and you
+  configure like this:
+
+    $ cd tools
+    $ ./configure.sh board/configuration
+    $ cd ..
+
+  The you can use the following command to both (1) make sure that the
+  configuration is up to date, AND (2) the configuration is set up
+  correctly for Linux:
+
+    $ tools/sethost.sh -l
+
+  Or, if you are on a Windows/Cygwin 64-bit platform:
+
+    $ tools/sethost.sh -w
+
+  Other options are available from the help option built into the
+  script.  You can see all options with:
+
+    $ tools/sethost.sh -h
+
 Comparing Two Configurations
 ----------------------------
 
@@ -948,8 +1149,12 @@ Native Windows Build
 --------------------
 
   The beginnings of a Windows native build are in place but still not often
-  used as of this writing.  The windows native build logic initiated
-  if CONFIG_WINDOWS_NATIVE=y is defined in the NuttX configuration file:
+  used as of this writing.  The build was functional but because of lack of
+  use may find some issues to be resolved with this build configuration.
+
+  The windows native build logic initiated if CONFIG_WINDOWS_NATIVE=y is
+  defined in the NuttX configuration file:
+
 
   This build:
 
@@ -960,10 +1165,13 @@ Native Windows Build
   In this build, you cannot use a Cygwin or MSYS shell. Rather the build must
   be performed in a Windows console window. Here is a better terminal than the
   standard issue, CMD.exe terminal:  ConEmu which can be downloaded from:
-  http://code.google.com/p/conemu-maximus5/
+  https://sourceforge.net/projects/conemu/ or https://conemu.github.io/ .
 
   Build Tools.  The build still relies on some Unix-like commands.  I use
-  the GNUWin32 tools that can be downloaded from http://gnuwin32.sourceforge.net/.
+  the GNUWin32 tools that can be downloaded from http://gnuwin32.sourceforge.net/
+  using the 'Download all' selection.  Individual packages can be download
+  instead if you know what you are doing and want a faster download (No, I
+  can't tell you which packages you should or should not download).
 
   Host Compiler:  I use the MingGW GCC compiler which can be downloaded from
   http://www.mingw.org/.  If you are using GNUWin32, then it is recommended
@@ -971,12 +1179,13 @@ Native Windows Build
 
   This capability should still be considered a work in progress because:
 
-  (1) It has not been verified on all targets and tools, and
-  (2) it still lacks some of the creature-comforts of the more mature environments.
+    (1) It has not been verified on all targets and tools, and
+    (2) it still lacks some of the creature-comforts of the more mature
+        environments.
 
-   There is an alternative to the setenv.sh script available for the Windows
-   native environment: tools/configure.bat.  See tools/README.txt for additional
-   information.
+  There is an alternative to the setenv.sh script available for the Windows
+  native environment: tools/configure.bat.  See tools/README.txt for additional
+  information.
 
 Installing GNUWin32
 -------------------
@@ -1209,7 +1418,7 @@ nuttx/
  |   |- arm/
  |   |   `- src
  |   |       `- lpc214x/README.txt
- |   |- sh/
+ |   |- renesas/
  |   |   |- include/
  |   |   |   `-README.txt
  |   |   |- src/
@@ -1238,18 +1447,14 @@ nuttx/
  |   |   `- README.txt
  |   |- avr32dev1/
  |   |   `- README.txt
+ |   |- bambino-200e/
+ |   |   `- README.txt
  |   |- c5471evm/
  |   |   `- README.txt
  |   |- cc3200-launchpad/
  |   |   `- README.txt
  |   |- cloudctrl
  |   |   `- README.txt
- |   |- compal_e86
- |   |   `- README.txt
- |   |- compal_e88
- |   |   `- README.txt
- |   |- compal_e99
- |   |   `- README.txt
  |   |- demo0s12ne64/
  |   |   `- README.txt
  |   |- dk-tm4c129x/
@@ -1279,6 +1484,10 @@ nuttx/
  |   |   `- README.txt
  |   |- fire-stm32v2/
  |   |   `- README.txt
+ |   |- freedom-k64f/
+ |   |   `- README.txt
+ |   |- freedom-k66f/
+ |   |   `- README.txt
  |   |- freedom-kl25z/
  |   |   `- README.txt
  |   |- freedom-kl26z/
@@ -1321,7 +1530,7 @@ nuttx/
  |   |   `- README.txt
  |   |- mirtoo/
  |   |   `- README.txt
- |   |- mt-db-x3/
+ |   |- misoc/
  |   |   `- README.txt
  |   |- moteino-mega/
  |   |   `- README.txt
@@ -1354,6 +1563,8 @@ nuttx/
  |   |   `- README.txt
  |   |- olimex-stm32-p207/
  |   |   `- README.txt
+ |   |- olimex-stm32-p407/
+ |   |   `- README.txt
  |   |- olimex-strp711/
  |   |   `- README.txt
  |   |- open1788/
@@ -1370,12 +1581,8 @@ nuttx/
  |   |   `- README.txt
  |   |- pic32mz-starterkit/
  |   |   `- README.txt
- |   |- pirelli_dpl10/
- |   |   `- README.txt
  |   |- qemu-i486/
  |   |   `- README.txt
- |   |- rgmp/
- |   |   `- README.txt
  |   |- sabre-6quad/
  |   |   `- README.txt
  |   |- sama5d2-xult/
@@ -1394,6 +1601,8 @@ nuttx/
  |   |   `- README.txt
  |   |- sam3u-ek/
  |   |   `- README.txt
+ |   |- sam4cmp-db
+ |   |   `- README.txt
  |   |- sam4e-ek/
  |   |   `- README.txt
  |   |- sam4l-xplained/
@@ -1440,6 +1649,8 @@ nuttx/
  |   |   `- README.txt
  |   |- stm32f746g-disco/
  |   |   `- README.txt
+ |   |- stm32l476-mdk/
+ |   |   `- README.txt
  |   |- stm32l476vg-disco/
  |   |   `- README.txt
  |   |- stm32ldiscovery/
@@ -1460,6 +1671,8 @@ nuttx/
  |   |   `- README.txt
  |   |- twr-k60n512/
  |   |   `- README.txt
+ |   |- twr-k64f120m/
+ |   |   `- README.txt
  |   |- u-blox-co27/
  |   |   `- README.txt
  |   |- ubw32/
@@ -1497,8 +1710,6 @@ nuttx/
  |   |   `- README.txt
  |   |- sensors/
  |   |   `- README.txt
- |   |- sercomm/
- |   |   `- README.txt
  |   |- syslog/
  |   |   `- README.txt
  |   `- README.txt
@@ -1520,6 +1731,8 @@ nuttx/
  |- lib/
  |   `- README.txt
  |- libc/
+ |   |- zoneinfo
+ |   |   `- README.txt
  |   `- README.txt
  |- libnx/
  |   `- README.txt
@@ -1548,7 +1761,8 @@ apps/
  |- gpsutils/
  |   `- minmea/README.txt
  |- graphics/
- |   `- tiff/README.txt
+ |   |- tiff/README.txt
+ |   `- traveler/tools/tcledit/README.txt
  |- interpreters/
  |   |- bas
  |   |  `- README.txt
@@ -1586,9 +1800,7 @@ apps/
  |   |   `- README.txt
  |   |- usbmsc
  |   |  `- README.txt
- |   |- zmodem
- |   |  `- README.txt
- |   `- zoneinfo
+ |   `- zmodem
  |      `- README.txt
  `- README.txt
 
diff --git a/ReleaseNotes b/ReleaseNotes
index 89cf4119a4d6c8e6d8c3d67735711e75b99d81fd..ed69375e61034f336d44cee9ce212b69711c422b 100644
--- a/ReleaseNotes
+++ b/ReleaseNotes
@@ -2570,7 +2570,7 @@ New features and extended functionality:
       particular for a CDC/ACM with MSC USB composite driver).
 
       Added a new RAM logging driver.  This will allow debug output into
-      a RAM buffer associated with a character driver at /dev/syslog.
+      a RAM buffer associated with a character driver at /dev/ramlog.
       Added the new command 'dmesg' to NSH that can be used to dump the
       current contents of the log.  This is useful for systems that do not
       have the usual serial console (for example, if you only have a
@@ -5303,7 +5303,8 @@ Additional new features and extended functionality:
         can be re-enabled if needed via configuration option.
       - NXFFS: Make the start up scan of the media a configuration option.
         It just takes to long and is not really necessary!  Those rare cases
-        where the scan was helpful can be fixed using flash_eraseall().
+        where the scan was helpful can be fixed using MDIOC_BULKERASE IOCTL
+        command.
 
     * General Drivers:
 
@@ -8904,25 +8905,25 @@ Additional new features and extended functionality:
         This is based on the similar SAMD20 Xplained Pro board.
 
     * Freescale/NXP KL:
-  
+
       - KL25Z64: Added support for the KL25Z64.  The KL25Z64 is a lower
         memory variant of the KL25Z128 and is used on the Teensy LC.  From
         Michael as SourceForge patch 50.
 
     * Freescale/NXP KL Boards:
-  
+
       - Teensy-LC: Add board support for the Teensy LC board.  Support is
         based off the Freedom KL25Z board.  LED, PWM, and UART0 have been
         tested. The SPI pins are mapped correctly but have not yet been
         tested.  From Michael Hope as SourceForge patch 51.
 
     * NXP LPC111x:
-    
+
       - LPC111x:  Support for the LPC11xx family (the LPC1115 MCU in
         particular).  Contributed by Alan Carvalho de Assis.
 
     * NXP LPC111x Boards:
-    
+
       - LPCXpresso LPC1115:  Support for the LPCXpression LPC1115
         board.  Contributed by Alan Carvalho de Assis.
 
@@ -8990,7 +8991,7 @@ Additional new features and extended functionality:
 
     * Applications: apps/system:
 
-      - apps/system/zoneinfo:  Add logic to build a ROMFS file system
+      - nuttx/zoneinfo:  Add logic to build a ROMFS file system
         containing the timezone data.
 
     * Applications: apps/nshlib:
@@ -9062,7 +9063,7 @@ detailed bugfix information):
         for mq_setattr() and mq_getattr().  This is necessary in protected
         and kernel builds because in those cases the message queue
         structure is protected and cannot be accessed directly from user
-        mode code.  Noted by Jouko Holopainen.
+        mode code.
 
     * File Systems/Block Drivers/MTD:
 
@@ -9157,7 +9158,7 @@ detailed bugfix information):
       - LPC17 USB OHCI:  Correct some initialization of data structures.
         When hub support is enabled, it would overwrite the end of an array
         and clobber some OS data structures.
-      - LPC17xx Ethernet:  Review, update, and modify the Ethernet driver so 
+      - LPC17xx Ethernet:  Review, update, and modify the Ethernet driver so
         that it works better with CONFIG_NET_NOINTS=y.  Also, update all
         LPC17xx networking configurations so that they have
         CONFIG_NET_NOTINTS=y selected.
@@ -9584,7 +9585,7 @@ detailed bugfix information):
     * ARMv7-A:
 
       - Cortex-A5 vfork():  Fix a Cortex-A compilation error when system
-        calls are enabled in modes other than CONFIG_BUILD_KERNEL. 
+        calls are enabled in modes other than CONFIG_BUILD_KERNEL.
 
     * Atmel SAMA5 Drivers:
 
@@ -10098,7 +10099,7 @@ Additional new features and extended functionality:
       - ps command:  The 'ps' command now uses /proc// to obtain task
         status information.  A consequence of this is that you cannot use
         the 'ps' command if the procfs is not enabled and mounted at /proc.
- 
+
     * Applications: apps/system:
 
       - apps/system/hexed:  Port the hexed command line hexadeciamal editor
@@ -10143,7 +10144,7 @@ detailed bugfix information):
 
     * Graphics/Graphic Drivers:
 
-      - ILI9432:  Fixed errors in orientation. Portrait, RPortrait, and 
+      - ILI9432:  Fixed errors in orientation. Portrait, RPortrait, and
         Landscript should work correly now.  They were displayed mirrored.
         From  Marco Krahl.
 
@@ -10320,7 +10321,7 @@ Additional new features and extended functionality:
         pointer indicates that the referenced object may reside either in
         flash or in RAM. The compiler automatically makes 32-bit pointer
         with flag indicating whether referenced object is in flash or RAM
-        and generates code to access either in run-time. Thus, any function 
+        and generates code to access either in run-time. Thus, any function
         hat accepts __memx object can transparently work with RAM and flash
         objects.
         For platforms with a Harvard architecture and a very small RAM like
@@ -10349,7 +10350,7 @@ Additional new features and extended functionality:
         dependencies generated by a Windows compiler so that they can be
         used with the Cygwin make.
       - tools/mkwindeps.sh: A script that coordinates use of cnvwindeps.exe.
-        Dependencies now work on the Cygwin platform when using a Windows 
+        Dependencies now work on the Cygwin platform when using a Windows
         ative toolchain.
 
     * Applications: NSH
@@ -10515,7 +10516,7 @@ Additional new features and extended functionality:
         implemented via ioctl calls.  However, it does not yet implement
         the standard ADC interface.  From Alexander Entinger.
       - U-Blox Modem:  Add an upper half driver for the U-Blox Modem.  From
-        Vladimir Komendantskiy. 
+        Vladimir Komendantskiy.
       - I2C: Add an I2C, "upper half", character drivers to support raw I2C
         data transfers for test applications.
       - RGB LED: Add a driver to manage a RGB LED via PWM.  From Alan
@@ -10716,3 +10717,2832 @@ detailed bugfix information):
       - Moved C++ initialization logic out of the RTOS and into the
         application space, specifically to apps/platform/board, where it
         belongs.
+
+NuttX-7.16 Release Notes
+------------------------
+
+The 116th release of NuttX, Version 7.16, was made on June 1, 2016,
+and is available for download from the Bitbucket.org website.  Note
+that release consists of two tarballs:  nuttx-7.16.tar.gz and
+apps-7.16.tar.gz.  These are available from:
+
+    https://bitbucket.org/nuttx/nuttx/downloads
+    https://bitbucket.org/nuttx/apps/downloads
+
+Both may be needed (see the top-level nuttx/README.txt file for build
+information).
+
+Additional new features and extended functionality:
+
+    * Core OS:
+
+      - Power Management: Add activity domain to all PM interfaces and
+        driver callbacks.  If CONFIG_PM_NDOMAINS == 1, then the legacy
+        behavior is preserved.  If CONFIG_PM_NDOMAINS > 1, then multiple
+        PM domains are supported.  This will allow separate control for
+        certain power management groups.  For example, a network can be
+        shut down without affect an ongoing UI (and vice versa).
+      - board_app_initialize():  board_app_initialize() now accepts an
+        argument that may be used to support initialization in different
+        configurations.
+
+    * File System and Block and MTD Drivers:
+
+      - N25Qxxx: Add MTD support for Micron N25Qxxx family of QSPI flash.
+        From Dave (ziggurat29).
+      - SST26F:  Add an MTD driver for SST26F spi/qspi flash devices (SPI
+        mode only).  From Sebastien Lorquet.
+      - File Descriptor Detach: Add logic to detach a file structure from a
+        file descriptor. This is for use only within the OS.  It permits an
+        open file or driver to be used across multiple threads.
+
+   * Networking and Network Drivers:
+
+      - listen()/accept():  Separate out psock_listen() and psock_accepti()
+        for internal, thread independent OS usage (i.e., without a socket
+        descriptor).
+      - VNC Server:  Add support for a VNC server.  This logic is code
+        complete and functional, but not well tested.
+
+    * Graphics and Graphic Drivers:
+
+      - Framebuffer driver:  Add a display number to each interface in order
+        to support multiple display devices.
+      - VNC Server:  Add support for a VNC server.  This logic is code
+        complete and functional, but not well tested.
+      - LCD Backpack: Add support for PCF8574 LCD Backpack driver. This
+        driver supports an interface board that is based on the PCF8574 I/O
+        expander and supports the HD44780-based (or compatible) LCD modules.
+        There are a myriad of different vendors of such, but they are
+        principally the same, save wiring and minor features like jumpers
+        for I2C addresses. This driver supports known and unknown variants.
+        From Dave (ziggurat29).
+
+    * Common Device Drivers:
+
+      - RTC:  Simplify the RTC interface.  The old interface was way too
+        complex and was not fully implemented anywhere.
+      - BH1750FVI:  Add a character driver for Rohm Ambient Light Sensor
+        BH1750FVI.  From Alan Carvalho de Assis.
+      - CAN:  Improve CAN error reporting. From Frank Benkert.
+      - aes.h:  Modifications to the crypto API needed for LPC43xx.  From
+        Alexander Vasiljev.
+      - ADC:  Interface no longer uses global adc_receive() call.  Added a
+        new bind() method to the ADC interface.  Now the ADC upper half
+        driver will register its receipt-of-data callback.  This change
+        allows the ADC lower half driver to be used with a differ ADC upper
+        half.
+
+     * Simulation Platform:
+
+      - Linux Host Networking:  Enhance networking support for the
+        simulation under Linux. Includes updated support for Linux TUN/TAP,
+        and the addition of support for Linux bridge devices.  From Steve.
+
+    * ARMv7-A, ARMv7-R, and ARMv7-M:
+
+      - ARMv7-M:  Convert more assembly language files for use with the IAR
+        toolchain.  From Kha Vo.
+      - ARMv7-A:  Complete re-design of SMP-related logic to initialize each
+        CPUn, n > 0, when CONFIG_SMP=y.
+
+    * Atmel SAMV7:
+
+      - Add a JTAG config and ERASE config to Kconfig to set the
+        CCFG_SYSIO SYSIO Pins.  From David Sidrane.
+      - System Reset: Add the up_systemreset interface to the samv7 arch.  The
+        approach is slightly different in that: 1) It enables ARCH_HAVE_RESET
+        and allows the user to set if, and for how long, to drive External
+        nRST signal. It also does not contain a default board_reset, as that
+        really should be done in the config's src if CONFIG_BOARDCTL_RESET
+        is defined.  From David Sidrane.
+
+    * Atmel SAMV7 Boards:
+
+      - SAMV71-XULT: Add configuration(s) that were be used to verify VNC
+        graphics output as well as mouse and keyboard input.
+
+    * NXP Freescale i.MX6 Boards:
+
+      - Sabre-6Quad:  The basic i.MX6 port is complete.  This is a minimal
+        port at present and probably still has some as-of-yet-undiscovered
+        issues.
+      - Sabre-6Quad: Basic SMP NSH configuration is now working.  But this
+        is probably only because the SMP test case does not stress the
+        logic.  There are know outstanding SMP issues as noted in the
+        Sabre-6Quad README.txt file.
+
+    * NXP Freescale LPC43xx:
+
+      - LPC4337jet100: Add definitions for the LPC4337jet100 chip.  From
+        Alexander Vasiljev.
+
+    * NXP Freescale LPC43xx Drivers:
+
+      - AES:  Add AES support.  From Alexander Vasiljev.
+
+    * STMicro STM32:
+
+      - STM32 L4: Add configuration options to allow SRAM2 to be used for
+        heap, or not at all, and to zero-initialize it on OS start, or not
+        at all. From Dave dev@ziggurat29.com.
+      - STM32 L4: Add support for HSE and MSI clocks, and auto trim of MSI
+        to LSE (needed for USB).  From Dave (ziggurat29)
+      - STM32 L4: Add support for unique id function to arch; modified board
+        to support unique id boardctl.  From Dave (ziggurat29)
+
+    * STMicro STM32 Drivers:
+
+      - STM32 F4 RTC: Add a custom RTC driver with support for alarms.  From
+        Neil Hancock.
+      - STM32 L4 QSPI: Add a QSPI driver with DMA support and (optional
+        memory mapped mode support. From Dave ziggurat29).
+      - STM32, STM32 L4, and STM32 F7 Serial:  Add support for compliant
+        SD-style breaks. From David Sidrane.
+      - STM32 L4 CAN: Add CAN support for STM32L4.  From Sebastien Lorquet.
+      - STM32 1-Wire:  Add support for a custom 1-wire driver.  The serial
+        driver already supports a 1-wire interface, but this driver uses the
+        same serial logic to implement a lower half driver much like the
+        I2C lower half driver.  From Aleksandr Vyhovanec.
+      - STM32 L4 SPI: Add support for SPI 4 and 5 on stm32f411 chips. From
+        Konstantin Berezenko.
+      - STM32 ADC: Allow omitting use of channels in a lower part of PWM.
+        From Pierre-noel Bouteville.
+      - STM32 L4 I2C: Get I2C working for STM32L4.  From Dave (ziggurat29).
+
+    * STMicro STM32 Boards:
+
+      - STM3220G-EVAL:  Add support for both the IAR and uVision GCC IDEs.
+        From Kha Vo.
+      - STM32F429I Discovery:  Add support for the uVision GCC IDE.   From
+        Kha Vo.
+      - STM32F4 Discovery: Integrate BH1750FVI driver in the STM32F4 Discovery
+        board.  From Alan Carvalho de Assis.
+      - STM32L476VG Discovery:  Add support for QSPI based N25Qxxx flash.
+        From Dave (ziggurat29)
+      - STM32L476VG Discovery: Add board ioctls for allowing user application
+        to cause QSPI memory mapped mode to be engaged and disengaged.  Also
+        partitioned QSPI flash for file system and other (eventually xip).
+        From Dave (ziggurat29)
+      - Nucleo-144: Basic port for the Nucleo-144 board with the STM32F746ZG
+        MCU.  From Kconstantin Berezenko.
+      - STM32F103 Minimum: Add support for this minimual STM32F103CBT6 "blue"
+        board.  From Alan Carvalho de Assis.
+      - STM32F411E Discovery:  Add basic configuration for stm32f411e-disco
+        board with STM32F411VE chip.  From Konstantin Berezenko.
+
+    * Build/Configuration System:
+
+      - Moved NuttX repository to https://bitbucket.org/nuttx/nuttx.
+        Eliminated use of sub-modules.
+      - Add support for the IAR toolchain for the limited case of the ARMv7-M
+        architecture and the STM32 chip.  From Aleksandr Vyhovanec.
+      - make export: Pass top-level make to the script to allow -j greater
+        than 1.  From David Sidrane.
+      - fs/Kconfig:  Allow CONFIG_FS_WRITABLE to be manually selectable. This
+        is needed when there are no writable file systems, but write support
+        is still needed in BCH or FTL.
+      - arch/*/Makefile: Add definitions that can be overrided to use GCC
+        instead of LD in the final link.  From Paul Alexander Patience .
+
+    * Applications: apps/netutils:
+
+      - apps/netutils/esp8266:  ESP8266 driver application.  From Pierre-noel
+        Bouteville.
+
+    * Applications: apps/examples:
+
+      - apps/examples/alarm:  Add a simple test of the ALARM iotcl calls of
+        the RTC driver.
+      - apps/examples/nximage:  Add a configuration option to select
+        greyscale.
+
+    * Platforms: apps/platform:
+
+      - apps/platform/nucleo-144: Add platform files for NUCLEO-144
+        (NUCLEO-F746ZG).  From Mark Olsson.
+      - apps/examples/media:  You can now override the default device driver
+        path by providing an alternal path on the command line.  From
+        Sbastien Lorquet.
+
+Works-In-Progress:
+
+    * IEEE802.14.5/6LowPAN.  Hooks and framework for this effort were
+      introduced in NuttX-7.15.  Work has continued on this effort on
+      forks from the main repositories, albeit with many interruptions.
+      The completion of this wireless feature will postponed until at
+      least NuttX-7.17.
+
+    * i.MX6 SMP.  Partially functional, but there is more that still
+      needs to be done.
+
+Bugfixes.  Only the most critical bugfixes are listed here (see the
+ChangeLog for the complete list of bugfixes and for additional, more
+detailed bugfix information):
+
+    * Core OS:
+
+      - Various places:  Search for places where a stray semicolon following
+        an if condition cause the if body to be executed unconditionally.
+        Fixes in all SAM DMA logic, unionfs, OS signalling logic, and others.
+      - enter/leave_critical_section() may attempt to access task lists
+        before they have been initialized in the SMP configuration.
+
+    * File System/Block Drivers:
+
+      - SMART MTD:  Return code of smart_scan not checked, can cause success
+        result in failure case, leading to 'dev' pointer being invalid. From
+        Dave (ziggurat29)
+      - mount: Fix a backward debug assertion.  Noted by David Sidrane.
+
+    * Common Drivers:
+
+      - NRF24L01: Fix backward calculation of relative frequency.  Noted by
+        Henry Zhang.
+      - PCA9555 I/O expander: Fix an error in the PCA9555 driver: Under
+        certain error conditions, interrupts were not being re-enabled.
+        Sebastien Lorquet.
+      - ADS1255: Must not do SPI access from interrupt handler.  Use the
+        worker thread instead.  Must also lock the SPI bus before using it.
+      - Several SPI-based drivers modified.  All drivers that use SPI must
+        call SPI_LOCK and SPI_UNLOCK.  This is not optional.
+      - MS583730:  Fix a bug in crc computation for ms583730. Implement
+        POSIX read.
+
+    * Atmel SAMV7:
+
+      - Fix typo in MATRIX register definitions.  From Stefan Kolb.
+      - SAMV7 Tickless Mode: This is a fix to a problem in the handling of
+        the oneshot timer. Due to a wrong assumption concerning the behavior
+        directly after the start of the timer/counter the function
+        sam_oneshot_cancel() calculates the wrong remaining time. The code
+        assumes that the counter register is zero directly after the start
+        of the timer, but this is not true. To start the time/counter a
+        software trigger is invoked, this trigger starts the timer/count and
+        sets the counter register to zero, but the reset of the counter
+        register is not performed instantly. According to the datasheet:
+        "The counter can be reset by a trigger. In this case, the counter
+        value passes to zero on the next valid edge of the selected clock."
+        Thus the counter is set to zero between 0 and USEC_PER_TICK
+        microseconds after the clock was started.
+        In my fix I use the freerun count value to determine if at least one
+        tick passed since the start of the timer and thus if the value of
+        the oneshot counter is correct. I also tried to use the function
+        up_timer_gettime() to achieve this but, at least if compiled with
+        no optimization the problem vanishes without using the value of the
+        function, the function call takes too long.
+        Another problem treated in the fix is that if the oneshot timer/counter
+        is canceled, we only know the remaining time with a precision of
+        USEC_PER_TICK microseconds. This means the calculated remaining time
+        is between 0 and USEC_PER_TICK microseconds  too long. To fix this I
+        subtract one tick if the calculated remaining time is greater than
+        one tick and otherwise set the remaining time to zero. By doing so
+        the measured times are much more precise as without it.  From Stefan
+        Kolb.
+
+    * Atmel SAMA5:
+
+      - SAMA5:  Stefan Kolb's change to the SAMV7 Oneshot Timer should also
+        be applied to the SAMA5 oneshot time since the drivers are identical.
+
+    * Atmel SAM3/4:
+
+      - SAM3/4:  Stefan Kolb's change to the SAMV7 Oneshot Timer should also
+        be applied to the SAM3/4 oneshot time since the drivers are identical.
+
+    * Atmel SAMV7 Drivers:
+
+      - SAMV7 TWIHS (as well as SAM3/4 and SAMA5:  Ensure that the TWIHS
+        (i2c) hw get's its clock set when the sequence of
+        sam_i2cbus_initialize(), sam_i2cbus_uninitialize(), then
+        sam_i2cbus_initialize() or twi_reset() is called.  I found this a
+        while back in the stm32 family, so there may be more arch-es with
+        this sort of bug. I suppose any driver that has the notion of "do
+        not set the freq if it is already set" could be suspect.  From David
+        Sidrane.
+      - USBHS Device: Remove disabling of whole USB on suspend of USBHS.
+        This fix removes the disabling of the whole USB peripheral on
+        suspend interrupt. Its enough to freeze the clock instead. When
+        disabling the whole peripheral, the next wakeup-interrupt comes up
+        with an disabled clocking. The unfreeze clock has no effect, because
+        the master clock is disabled. This makes all registers, including
+        the IDR unwriteable and the IRQ falls in an endless loop blocking
+        the whole system. Furthermore the disabling of the peripheral clock
+        prevents hotplugging or reconnecting the USB.  From  Frank Benkert.
+      - MCAN: Fix missing unlock of device in MCAN mcan_txempty().  From
+        Frank Benkert.
+
+    * STMicro STM32:
+
+      - STM32 L4 Clocking: Problem with resetting backup domain clears
+        clocking options set up before in *rcc.c use INITS flag to avoid
+        magic reg value to detect power up reset state of RTC correct a
+        problem clearing interrupt flags (they weren't) which prevented an
+        alarm from ever being used more than once per reset cycle.  From
+        Dave (ziggurat29)
+
+    * STMicro STM32 Drivers:
+
+      - STM32L4 SPI: That STM32Lr SPI driver is quite different. They now
+        handle frames of arbitrary size between 4 and 16 bits. It was broken
+        before a new bit has to be set (RX fifo threshold) to handle <= 8-bit
+        transactions. If not set, the default is 16-bit packed >=8-bit
+        frames and the RXNE bit is never set (it is set when 16-bits are
+        received). weird things as always. This also add 8-bit access
+        routines to the data register, because a 16-bit access to the data
+        register when the frame size is below 9 bits is interpreted as a
+        packed dual frame exchange. Sebastien Lorquet.
+      - STM32:  Correct some bad commits that broke the LTDC display example.
+        From Marco Krahl.
+      - STM32 F4 RTC: Fix logic in F4 RTCC driver that prevent ALARM
+        interrupt.  From Neil Hancock.
+      - STM32 F1 ADC: Fix STM32 ValueLine ADC IRQ number selection. From
+        David Sidrane.
+
+    * STMicro STM32 Boards:
+
+      - STM32F429I Discovery:  Correct some bad commits that broke the LTDC
+        display example.  From Marco Krahl.
+
+    * TI Tiva:
+
+      - GPIO Interrupts: Fix a bug of GPIO falling-edge interrupt for tiva.
+        From Young.
+
+    * C Library:
+
+      - math: Add a NAN test on 'x' in asin function of lib_asin.c. Suggested
+        by Pierre-noel Bouteville.
+
+    * Build/Configuration System:
+
+      - Several Makefiles: Add .PHONY definitions to prevent 'clean up to date'
+        message weirdness when 'make clean' is done with no .config or
+        Make.defs file.
+
+NuttX-7.17 Release Notes
+------------------------
+
+The 117th release of NuttX, Version 7.17, was made on July 25, 2016,
+and is available for download from the Bitbucket.org website.  Note
+that release consists of two tarballs:  nuttx-7.17.tar.gz and
+apps-7.17.tar.gz.  These are available from:
+
+    https://bitbucket.org/nuttx/nuttx/downloads
+    https://bitbucket.org/nuttx/apps/downloads
+
+Both may be needed (see the top-level nuttx/README.txt file for build
+information).
+
+Additional new features and extended functionality:
+
+    * File System and Block and MTD Drivers:
+
+      - drivers/mtd: Add a driver of IS25xP SPI flash devices.  Based on
+        sst25xx driver.  From Marten Svanfeldt.
+
+    * Networking and Network Drivers:
+
+      - Break out internal interface psock_ioctl().
+
+    * Common Device Drivers:
+
+      - PTYs: Added support for pseduo-terminals: Device drivers that can be
+        used for communications between tasks (usually with re-directed I/O).
+        Based on existing pipe logic.
+      - Button upper half driver:  Added support for poll().
+      - CAN:  Add support for poll. From Paul Alexander Patience.
+      - GPIO:  Add support for a simple GPIO driver.  It supports only pre-
+        configured input, output, and interrupting pins with basic input and
+        output operations.  Interrupt events can lead to notification via a
+        signal.
+      - I/O Expander: Shadow-Mode: The output- and configuration registers of
+        the IO-Expander are held in the microcontrollers memory and only
+        written to the IO-Expander.  This reduces bus traffic and is more
+        error-proof than the normal read-modify-write operation. Retry Mode:
+        If enabled and an error occurs while writing to the IO-Expander the
+        current transmission is automatically repeated once. From Michael
+        Spahlinger.
+      - Pipes/FIFOs:  Add support to allocating different sizes for pipe and
+        fifo buffers.  Adds mkfifo2() and pipe2() which are just like mkfifo()
+        and pipe(), but allow control of the size of the underlying, in-memory
+        circular buffer.  Move pipe() and mkpipe() to the C library, they are
+        no longer core OS interfaces.  Capability currenty used only by PTY
+        logic to support, configurable, smaller buffers for PTYs.
+
+    * SYSLOG/Debug Output:
+
+      - SYSLOG: Consolidated all SYSLOG logic in drivers/syslog.  Added an
+        abstraction layer that supports:  (1) redirection of SYSLOG outpout.
+        This is usually so that you can boot with one SYSLOG output but
+        transition to another SYSLOG output when the OS has initialialized,
+        (2) adds common serialization of interrupt output as a configuration
+        option.  Without this configuration setting, interrupt level output
+        will be asynchronous.  And (3) vsyslog is now a system call and is
+        usable with other-than-FLAT builds.
+      - SYSLOG: syslog() will now automatically redirect output to
+        lowsyslog() if called from an interrupt handler.
+      - Extended SYSLOG logic so that we can send SYSLOG output to a file.
+      - SYSLOG character device channel will now expand LF to CR-LF.
+        Controllable with a configuration option.
+      - Add a SYSLOG character device that can be used to re-direct output
+        to the SYSLOG channel (Not be be confused the the SYSLGO output to a
+        character device).
+      - Debug features are now enabled separately from debug output.
+        (1) CONFIG_DEBUG is gone. It is replaced with CONFIG_DEBUG_FEATURES.
+        (2) The macros dbg() and vdbg() have renamed as _err() and _info(),
+        respectively. This also applies to all of the variants as well,
+        XXdbg() and XXvdbg().  (3) Add a new debug level, _warn() (and
+        all variants XXwarn(), XXvwarn(), etc.). (4) Debug assertions can
+        now be enabled separately from debug output. (5) You can now enable
+        subsystem/device driver debug output at different output levels. For
+        example, CONFIG_DEBUG_FS no longer enables file system debug output
+        It enables general file system debug logic and enables selection of
+        CONFIG_DEBUG_FS_ERROR, CONFIG_DEBUG_FS_WARN, and CONFIG_DEBUG_FS_INFO.
+      - Since the SYSLOG layer now automatically handles low-level vs.
+        high-level output, the low-level (ll) variants of the debug macros
+        were eliminated.
+      - Reviewed all uses of *err().  These macro family should indicate
+        only error conditions.  Convert *err() to either *info() or add
+        ERROR:, depending on if an error is reported.
+      - _alert(): New debug macro: _alert().  This is high priority,
+         unconditional output and is used to simplify and standardize crash
+         error reporting.
+      - Many CONFIG_DEBUG_* options did not have matching macros defined in
+        include/debug.h.  Rather, there were various definitions scattered
+        throughout the sourse tree.  These were collected together and
+        centralized with single macro definitions in include/debug.h
+
+    * Simulation Platform:
+
+      - Added the simulated QSPI (N25Q) flash to the simulation and extened
+        flash simulation capabilities to run with MTD drivers based on config
+        options (currently m25p, sst26 and w25). From Ken Pettit.
+
+    * Atmel SAMV7 Drivers:
+
+      - SPI: SPI-Freq. 40MHz; VARSELECT; hw-features This change adds the
+        following improvements:
+
+          o Increase the allowed SPI-Frequency from 20 to 40 MHz.
+          o Correct and rename the "VARSELECT" option   This option was
+            included in the code as "CONFIG_SPI_VARSELECT" but nowhere
+            defined in a Kconfig file. The change renames it to
+            "CONFIG_SAMV7_SPI_VARSELECT" and corrects the implementation
+            according the datasheet of Atmel. In short, this option
+            switches the processor from "fixed peripheral selection"
+            (single device) to "variable peripheral selection" (multiple
+            devices on the bus).
+          o Add a new Function to the interface to control the timing and
+            delays of the chip according the ChipSelect lines. This function
+            can control the delay between the assertion of the ChipSelect and
+            the first bit, between the last bit and the de-assertion of the
+            ChipSelect and between two ChipSelects. This is needed to tune
+            the transfer according the specification of the connected devices.
+          o Add three "hw-features" for the SAMV7, which controls the behavior
+            of the ChipSelect:
+              - force CS inactive after transfer: this forces a (short) de-
+                assertion of the CS after a transfer, even if more data is
+                available in time
+              - force CS active after transfer: this forces the CS to stay
+                active after a transfer, even if the chip runs out of data.
+                Btw.: this is a prerequisit to make the LASTXFER bit working
+                at all.
+              - escape LASTXFER: this suppresses the LASTXFER bit at the end
+                of the next transfer. The "escape"-Flag is reset automatically.
+
+        From Frank Benkert
+      - TWISHS:  Driver improvements from Michael Spahlinger.
+      - GPIO-Driver fixed for Open-Drain Pins:
+
+          o sam_gpioread: Now the actual line level from the pin is read
+            back.   This is extremely important for Open-Drain Pins, which
+            can be used bidirectionally
+          o Re-Implemented twi_reset-function and enhanced it so it can be
+            called from inside the driver (see next point)
+          o Glitch-Filter: Added a configuration option to enable the twi-
+            built-in glitch filter
+          o Added a "Single Master Mode": In EMC Testing the TWI-Bus got
+            stuck because the TWI-Master detected a Multi-Master access (but
+            there is no second master). With the option "Single Master" we
+            detect these events and automatically trigger a twi_reset. We
+            also do an automatic recovery if a slave got stuck (SDA stays
+            low).
+
+        With the above changes IC-Bus reliability in harsh environments (eg.
+        EMC) is greatly improved. The small change in the GPIO-Driver was
+        necessary because otherwise you cannot read back the correct line
+        status of Open-Drain Outputs and this is needed by the twi_reset
+        function.  From Michael Spahlinger
+
+    * NXP Freescale LPC43xx Drivers:
+
+      - EMC: Extend LPC43xx EMC code to support SDRAM on a dynamic memory
+        interface.  From Vytautas Lukenskas.
+
+    * NXP Freescale Kinetis:
+
+      - Kinetis K64:  Add basic support for the K64 family.  I leveraged the
+        changes from https://github.com/jmacintyre/nuttx-k64f and merged
+        into the existing kinetis code  with a lot of changes and additions
+        (like pin multiplexing definitions).
+
+    * NXP Freescale Kinetis Drivers:
+
+      - Add a KinetisUSB device controller driver.  Derived from the pic32mx
+        usb driver, which uses the same usb controller.  From kfazz.
+      - Kinetis pwm support, based on the KL pwm driver.  From kfazz.
+      - Kinetis Ethernet:  Add support for the KSZ8081 PHY.
+      - Kinetis Ethernet:  Modified Ethernet driver to try all PHY addresses
+        and then only fail if the driver cannot find a usable PHY address.
+        This means that you no longer have to specific the PHY address in
+        advance.
+      - Kinetis Ethernet:  Add support for CONFIG_NET_NOINTS.  The driver no
+        longer runs the networking at interrupt level but can defer interrupt
+        work to the high-priority work queue.
+
+    * NXP Freescale Kinetis Boards:
+
+      - Teensy-3.x:  Add USB support and a usbnsh configuration.
+        From kfazz (2016-06).
+      - Freedom-K64F: Add support for the NXP Freedom-K64F board at 120MHz.
+        This is primarily the work of Jordan Macintyre.  I leveraged this
+        code from https://github.com/jmacintyre/nuttx-k64f which was, itself,
+        a leverage from the old K60 TWR configuration.  This includes
+        significant corrections (LEDs, buttons, README, etc) and extensions
+        and updates to match more recent BSPs.
+      - Freedom-K64F:  Added a configuration that supports networking.
+
+    * STMicro STM32:
+
+      - STM32 F1-4: Added support for the STM32F105R.  From Konstantin
+        Berezenko.
+      - STM32 F4: Added support for the STM32FF76xxx and STM32FF7xx
+        families. From David Sidrane.
+      - STM32 F1-4:  Add support for Tickless mode (two timer
+        implementation).  From Max Neklyudov.
+      - STM32 L4: Add support for tickless OS, and incidentally timers,
+        PWM, oneshot, free-running....  From ziggurat29.
+
+    * STMicro STM32 Drivers:
+
+      - STM32 F1-4: Add the up_getc() function to STM32 in order to support
+        the minnsh configuration.  From Alan Carvalho de Assis.
+      - STM32 F7: Add SPI driver.  From David Sidrane.
+      - STM32 F7: Add SPI, I2C, and ADC drivers.  From Lok Tep.
+      - STM32 L4: Add ioctls to set/get CAN bit timing in stm32l4.  Add
+        ioctl hooks to allow future management of can id filters. From
+        Sebastien Lorquet.
+      - STM32 L4: Add some CAN mode IOCTL calls.  These will be useful for
+        device autotest when the application boots.  They are redundant
+        with the CONFIG_CAN_LOOPBACK option, which can now just be
+        interpreted as a default setting.  From Sebastien Lorquet.
+      - STM32 F1-4: Port STM32L4 CAN IOCTLs to STM32.  From Sebastien Lorquet.
+      - STM32 L4: Implementation of loopback IOCTLs.  From Sebastien
+        Lorquet.
+      - STM32 F7: Added SDMMC1 support for stm32F7 74-75.  From Lok Tep.
+      - STM32 F7: Add USB support.  From Lok Tep.
+      - STM32 F7: Added PWR, RTC, and BBSRAM support for stm32f7. From David
+        Sidrane.
+      - STM32 F7: Added STMF7xxx RTC.  From David Sidrane.
+      - STM32 F7: Added STM32F7 DBGMCU.  From David Sidrane.
+      - STM32 L4: Port support for both RX FIFOs from STM32 CAN.  From Paul
+        Alexander Patience.
+
+    * STMicro STM32 Boards:
+
+      - Added a minnsh configuration for the STM32F103-Minimum board.  From
+        Alan Carvalho de Assis .
+      - Added support for the Nucleo-F767ZI board. From David Sidrane.
+      - Nucleo-144/Nucleo-F767ZI:  Add test for STM32 F7 SPI.  From David
+        Sidrane.
+      - Nucleo-144: Added SDMMC support to Nucleo-144. From David Sidrane.
+      - Olimex STM32-E4077:  Add support for Olimex STM32 E407 board.  From
+        Mateusz Szafoni.
+      - Nucleo-144: Added USB OTG device to Nucleo-144.  From David Sidrane.
+      - Nucleo-144: Added bbsram test to Nucleo-144.  From David Sidrane.
+      - STM32F4 Disovery: add CAN support for STM32F4 Discovery.  From
+        Matthias Renner.
+      - STM32F4 Disovery:  added a canard configuration files.  From
+        Matthias Renner.
+      - STM32F4 Discovery: Add FPU support for ostest for the STM32F4
+        Disovery platform. From David Alessio.
+      - STM32L476 Discovery: Update stm32l476 disco to include init code for
+        smartfs and nxffs for cases where those fs are included in build.
+        From ziggurat29.
+
+    * C Library/Header Files:
+
+      - include/assert.h: Check if NDEBUG is defined.  From Paul Alexander
+        Patience.
+      - assert.h: Define static assert for C++ usage.  From Paul Alexander
+        Patience.
+      - Add crc64 support. From  Paul Alexander Patience.
+      - hex2bin:  Move the portable library portion of apps/system/hex2bin
+        the C library with the OS internals.  It is used in certain internal
+        boot-loader builds.
+      - Add raise().
+      - libm: This change should significantly improve the performance of
+        single precision floating point math library functions. The vast
+        majority of changes have to do with preventing the compiler from
+        needlessly promoting floats to doubles, performing the calculation
+        with doubles, only to demote the result to float. These changes only
+        affect the math lib functions that return float. From David Alessio.
+      - printf(): If there are no streams, let printf() fall back to use
+        syslog() for output.
+      - Move pipe() and mkpipe() to nuttx/libc, they are no
+        longer core OS interfaces.  Capability currenty used only by PTY logi
+        to support, configurable, smaller buffers for PTYs.
+      - Move driver-related files from include/nuttx to include/nuttx/drivers.
+        Move driver related prototypes out of include/nuttx/fs/fs.h and into
+        new include/drivers/drivers.h.
+      - include /nuttx/lib: Move library-related files from include/nuttx to
+        include/nuttx/lib.
+
+    * Build/Configuration System:
+
+      - Custom Board Configuration: Add logic to support custom board
+        directories that include a Kconfig file.  During the context phase
+        of the build, any Kconfig file in the custom board directory is
+        copied into configs/dummy, replacing the existing Kconfig file with
+        the target Kconfig file.
+      - Remove the includes/apps link to apps/include.  It is no longer
+        used.  From Sebastien Lorquet.
+
+    * Tools:
+
+      - tools/tesbuild.sh will now build NxWM configurations.
+
+    * Appplication Build/Configuration System:
+
+      - Change to the way that apps/ Kconfig files are generated in
+        order to better support reuse of the apps/ directory in NuttX
+        products.  Changes include: Make the full tree use wildcards
+        make.defs, Add empty preconfig rules to 'leaf' makefiles, Use
+        directory.mk for recursive dir makefiles, Individual app kconfig
+        fixes, Recursive Kconfig autogeneration, Add kconfig files for
+        pcode and tiff, and fix a gitignore rule,  From Sbastien Lorquet.
+      - apps/include directory structure reorganized.  There are no longer
+        any header files in the apps/include/. directory.  Rather, sub-
+        directories were added to match the partitioning of apps/ sub-
+        directories and the header files were moved into the appropriate
+        sub-directory.  This change is intended to help with some changes
+        being considered by Sbastien Lorquet.
+      - Call all includes from  to "bla/bla.h". From Sebastien
+        Lorquet.
+      - Add apps/include to include path in top-level Make.defs file.
+
+    * Applications: apps/nshlib:
+
+      - Make NSH net-initialization be a configuration option. From Marten
+        Svanfeld.
+      - Add NTP client initialization in NSH network startup logic.  From
+        David S. Alessio .
+      - 'ps' command now prints out the stack usage if stack coloration is
+        enabled.  From Frank Benkert.
+      - Allow stack usage to be disabled on constrained systems. From David
+        Sidrane.
+
+    * Applications: apps/netutils:
+
+      - NTP Client:  Add retries.  From David S. Alessio.
+      - NTP Client:  The NTP client will now optionally use pool.ntp.org as
+        the NTP server; and reset the retry count upon success -- more robust.
+        From David Alessio.
+      - ESP8266: Add logic to set the BAUD rate.  From Pierre-noel Bouteville.
+      - ESP8266: In Kconfig, select ARCH_HAVE_NET when NETUTILS_ESP8266 is
+        selected.  This allows, among other things, support for network debug
+        output.  From Pierre-noel Bouteville.
+
+    * Applications: apps/fsutils:
+
+      - flash_eraseall: IOCTL wrapper for MDCIO_BULKERASE command.   Was in
+        nuttx/drivers/mtd.  Moved to apps/fsutils because the call directly into
+        the OS was incorrect.
+
+    * Applications: apps/canutils:
+
+      - canlib: Basic CAN utility library. From Sebastien Lorquet.
+
+    * Platforms: apps/system:
+
+      - flash_eraseall: Now uses the IOCTL wrapper at apps/fsutils/flash_eraseall.
+
+    * Platforms: apps/platform:
+
+      - Add platform files for Olimex STM32 E407.  From Mateusz Szafoni.
+
+    * Applications: apps/examples:
+
+      - apps/examples/canard:  Add canard example application.  From
+        Matthias Renner.
+      - apps/examples/pty_test: PTY test program.  From Alan Carvalho de
+        Assis.
+
+Works-In-Progress:
+
+    * IEEE802.14.5/6LowPAN.  Hooks and framework for this effort were
+      introduced in NuttX-7.15.  Work has continued on this effort on
+      forks from the main repositories, albeit with many interruptions.
+      The completion of this wireless feature will postponed until at
+      least NuttX-7.18.
+
+    * i.MX6 SMP.  Partially functional, but there is more that still
+      needs to be done.
+
+Bugfixes.  Only the most critical bugfixes are listed here (see the
+ChangeLog for the complete list of bugfixes and for additional, more
+detailed bugfix information):
+
+    * Core OS:
+
+      - semaphores: Need to set errno to EINVAL on errors in sem_post()
+        and sem_wait(). From Paul Alexander Patience.
+
+    * File System/Block Drivers/MTD Drivers:
+
+      - Several MTD FLASH drivers nullify the freed 'priv' structure and
+        failed to return NULL as stated in the comments. Result, will
+        operate on a NULL pointer later.  Noted by David Sidrane.
+      - VFS ioctl().  Per comments from David Sidrane, file_ioctl() should
+        not return succeed if the ioctl method is not supported.  It
+        probably should return ENOTTY in that case.
+      - SST26 Driver: Before accessing the sst26 flash, the "Global Unlock"
+        command must me executed, which I do in the sst26 driver.  BUT re-
+        reading the datasheet, the WREN instruction is required to enable
+        the execution of this command. This was not done. I have no idea how
+        the driver currently works except by chance. The writes should never
+        happen at all, the flash is half-enabled!  From Sebastien Lorquet.
+      - N25Qxx Driver: Alter the notion of 'blocksize' to be equivalent to
+        'flash write page size' in order to align with assumptions in the
+        smartfs driver (at least, maybe other things do as well).  Correct a
+        bug that was previously masked by having blocksize=eraseblocksize
+        which would cause buffer overflows and delicious hardfaults.
+        Trivial spelling changes in comments, etc.  From ziggurat29.
+      - SmartFS: Fix a 32-byte memory leak.  From Ken Pettit.
+      - SMART MTD layer: Fixes freesector logic error when sectorsPerBlk=256,
+        adds DEBUGASSERT for invalid geometry and additional memory debug
+        logic.  Also fixes the dangling pointer on error bug.  From Ken
+        Pettit.
+
+    * Common Drivers:
+
+      - USB CDC/ACM Device Class: cdcacm_unbind leaks write request objects.
+        This arises due to freeing the bulk IN endpoint before the loop
+        that frees the requests via cdcasm_freereq.  That function checks
+        the parameters and skips the freeing if either is NULL.  Freeing
+        the bulk IN enpoint will cause the first param to be NULL, thereby
+        bypassing the free operation.  To fix, I moved the release of the
+        bulk IN endpoint until after to loop (much as was the case for the
+        OUT and read requests, which did not exhibit the problem).  From
+        ziggurat29.
+      - Pipes and FIFOs: Add missing configuration for pipe ring buffer
+        size.  From Frank Benkert.
+      - UART 16550: Handle when CONFIG_SERIAL_UART_ARCH_IOCTL is not
+        enabled. From Heath Petersen.
+      - Common Serial Upper Half:  Fix a race condition noted by Stefan
+        Kolb.  Between the test if the TX buffer is full and entering a
+        critical section, bytes may be removed from the TX buffer making
+        the wait unnecessary.  The unnecessary wait is an inefficiency,
+        but not really a problem.  But with USB CDC/ACM it can be a problem
+        because the entire TX buffer may be emptied when we lose the race.
+        If that happens that uart_putxmitchar() can hang waiting for data
+        to be removed from an empty TX buffer.
+      - USB MSC Device Class: Add locks when removing request from queue.
+        From Wolfgang Reissnegger.
+      - USB MSC Device Class: Fix reversed logic on waiting for SCSI thread
+        start.  The scsi thread was waiting for the wrong condition.
+        However, this was masked by the fact that the code creating the
+        scsi thread was also holding usbmsc_scsi_lock(priv) while
+        initializing data, hence this lock synchronized the scsi thread
+        start with init completion.  From Wolfgang Reissnegger.
+
+    * Graphics and Graphic Drivers:
+
+      - Correct conditional compilation in ST7565 LCD driver.  From Pierre-
+        noel Bouteville
+
+    * Networking:
+
+      - In both IPv6 and IPv4 incoming logic:  (1) Should check if the
+        packet size is large enough before trying to access the packet
+        length in the IP header.  (2) In the comparison between the IP
+        length and the full packet length, need to subtract the size of
+        he link layer header before making the comparison or we will get
+        false positives (i.e., the packet is really too small)
+      - TCP Networking: While working with version 7.10 I discovered a
+        problem in TCP stack that could be observed on high network load.
+        Generally speaking, the problem is that RST flag is set in
+        unnecessary case, in which between loss of some TCP packet and its
+        proper retransmission, another packets had been successfully sent.
+        The scenario is as follows:  NuttX did not receive ACK for some sent
+        packet, so it has been probably lost somewhere. But before its
+        retransmission starts, NuttX is correctly issuing next TCP packets,
+        with sequence numbers increasing properly. When the retransmission
+        of previously lost packet finally succeeds, tcp_input receives the
+        accumulated ACK value, which acknowledges also the packets sent in
+        the meantime (i.e. between unsuccessful sending of lost packet and
+        its proper retransmission). However, variable unackseq is still set
+        to conn->isn + conn->sent, which is truth only if no further
+        packets transmission occurred in the meantime.  Because of incorrect
+        (in such specific case) unackseq value, few lines further condition
+        if (ackseq <= unackseq)is not met, and, as a result, we are going to
+        reset label.  From Jakub Lagwa.
+
+    * ARMv7-M:
+
+      - ARM stack check: Fix double fault on IDLE task with stack size = 0.
+        From David Sidrane.
+
+    * Atmel SAMV7 Drivers:
+
+      - CAN: CAN Message Filtering fixed: (1) stdfilters didn't work because
+        the filter was never enabled (wrong number of bits to shift), and
+        (2) Filters were never used because the configuration register
+        cannot be written without using the initialization mode. Both bugs
+        are fixed by this change. Filtering has been tested with both
+        standard and extended identifiers and is now working properly. From
+        Michael Spahlinger.
+
+    * Atmel SAMA5:
+
+
+    * Atmel SAM3/4 Drivers:
+
+      - Fix some errors in AFEC header file.  From OrbitalFox.
+      - DAC: DACC_WPMR_WPKEY_MASK -> DACC_WPMR_WPKEY.  From Wolfgang
+        Reissnegge.
+      - Timer:  Fix ops check in TCIOC_STOP.  From Wolfgang Reissnegge.
+      - I2C: Fix reversed logic in twi_startmessage().  From Wolfgang
+        Reissnegger.
+      - SAM3/4 UDP: Fix handling of endpoint RX FIFO banks.  This fixes
+        a race condition where the HW fills a FIFO bank while the SW is
+        busy, resulting in out of sequence USB packets.
+
+    * Atmel SAMV7 Drivers:
+
+      - USBHS Device:  This change solves a problem which causes data loss
+        while sending data via USB. This problem is caused by an incorrect
+        handling of the endpoint state in the USB driver sam_usbdevhs.  This
+        leads under some circumstances to situations in which an DMA
+        transfer is setup while a previous DMA transfer is currently active.
+        Amongst other things I introduced the new endpoint state
+        USBHS_EPSTATE_SENDING_DMA for the fix.  To reproduce the problem, I
+        used a program which send as many data as possible via a CDC/ACM
+        device and verified the received data on the PC.  From Stefan Kolb.
+
+    * NXP Freescale Kinetis Drivers:
+
+      - Timers: Support up to 8 channels per timer.  From kfazz.
+
+    * NXP Freescale Kinetis Boards:
+
+      - Teensy 3.x clock fixes:  The High Gain bit in MCG_C1 was preventing
+        teensy from booting except after a programming session. The second
+        change doesn't appear to change any functionality, but complies with
+        restrictions in the k20 family reference manual on FEI -> FBE clock
+        transiions.  From kfazz.
+
+    * NXP Freescale LPC17xx Drivers:
+
+      - LPC17 Ethernet:  Needs to correctly ignore PHYID2 revision number
+        when comparing PHY IDs.
+
+    * NXP Freescale LPC43xx Drivers:
+
+      - Fix errors in GPIO interrupt logic.  From v01d (phreakuencies)
+      - Ethernet:  Correct auto-negotiation mode in the LPC43xx Ethernet.
+        From Alexander Vasiljev
+      - Writing zero to NVIC_IRQ_ENABLE has no effect.  Disable interrupts
+        with  NVIC_IRQ_CLEAR. From Paul Alexander Patience.
+      - SPIFI: If CONFIG_SPIFI_SECTOR512 undefined, lpc43_bwrite doesn't do
+        actual write (probably copy/paste errors). Still not sure about
+        current state of lpc43_spifi implementation, but for me NXFFS works
+        with this change.  From Vytautas Lukenskas.
+
+    * Qemu-i486:
+
+      - Fix qemu-i486/ostest/Make.defs test for M32.  From Heath Petersen.
+
+    * SiLabs EFM32 Drivers:
+
+      - Fix EFM32 FLASH conditional compilation.  From Pierre-noel
+        Bouteville
+      - Writing zero to NVIC_IRQ_ENABLE has no effect.  Disable interrupts
+        with  NVIC_IRQ_CLEAR. From Paul Alexander Patience.
+
+    * STMicro STM32:
+
+      - STM32 F1-F4:  In PWM driver, just update duty if frequency is not
+        changed and PSM started.  This removeis glitch or blinking when
+        only duty is frequently changed.  From Pierre-noel Bouteville.
+
+    * STMicro STM32 Drivers:
+
+      - STM32 F7: Fixed STM32F7 DMA stm32_dmacapable.  DMA working on SDMMC.
+        From David Sidrane.
+      - STM32 F1-F4 Timer Driver: Change calculation of per- timer pre-scaler
+        value.  Add support for all timers
+      - STM32 F1-F4: Correct conditional compilation in STM32 timer capture
+        logic.  From Pierre-noel Bouteville
+      - STM32 F1-F4: Fix STM32 DMA code and configuration for STM32F37X chips.
+        From Marten Svanfeldt.
+      - STM32 F1-F4: Fix compilation errors in debug mode of stm32_pwm.c.
+        From Konstantin Berezenko.
+      - STM32 F1-F4: Correct the CAN2 RX IRQ number for stm32f10xx chips.
+        From Konstantin Berezenko.
+      - STM32 F1-F4: Move backup domain reset to to earlier in the
+        initialization sequence (stm32_rcc.c() in order to avoid disabling
+        LSE during RTC initialiation.  From Alan Carvalho de Assis.
+      - STM32 F1-F4: When configuring a GPIO via stm32_configgpio() the
+        function will first set the mode to output and then set the initial
+        state of the gpio later on.  If you have an application with an
+        externaly pulled-up pin, this would lead to a glitch on the line
+        that may be dangerous in some applications (e.G. Reset Line for
+        other chips, etc).  This changes sets the output state before
+        configuring the pin as an output.  From Pascal Speck .
+      - STM32 F7: Apply Pascal Speck's GPIO STM32 change to STM32 L4.
+      - STM32 L4: Apply Pascal Speck's GPIO STM32 change to STM32 L4.
+        From Sebastien Lorquet.
+      - STM32 F7:  BUGFIX: PLLs IS2 and SAI P Calculation. From David
+        Sidrane.
+      - STM32 L4:  STM32 CAN fixes need to be backported to STM32L4 as well.
+      - STM32 F1-F4 and L4: Writing zero to NVIC_IRQ_ENABLE has no effect.
+        Disable interrupts with  NVIC_IRQ_CLEAR. From Paul Alexander
+        Patience.
+      - STM32 F7: STMF7xxx RTC: (1) Remove proxy #defines, (2) Ensure the
+        LSE(ON) etal are set and remembered in a) A cold start (RTC_MAGIC
+        invalid) of the RTC, and b) A warm start (RTC_MAGIC valid) of the
+        RTC but a clock change.  The change was needed because in bench
+        testing a merge of the latest's STM32  53ec3ca (and friends) it
+        became apparent that the sequence of operation is wrong in the
+        reset of the Backup Domain in the RCC code.  PWR is required before
+        the Backup Domain can be futzed with. !!!This Code should be tested
+        on STM32 and if needed rippled to the STM32 families.  From David
+        Sidrane.
+      - STM32 F1-F4: STM32 BBSRAM fixed (and formatted) flags.  From David
+        Sidrane.
+      - STM32 F7: STM32F7 BBSRAM fixed (and formatted) flags. From David
+        Sidrane.
+      - STM32 L4: Fix incorrect clock setup for LPTIM1.  From ziggurat29.
+      - STM32 F4/L4 RTC ALARM: were enabling interrupts too early in the
+        power-up sequence,  BEFORE the interrupt system was being
+        initialized.
+
+    * STMicro STM32 Boards:
+
+      - STM32 board.h: Fix STM32 timer input clock definitions.  From David
+        Sidrane.
+
+    * TI Tiva Drivers:
+
+      - Bug Fix in tiva_serial.c - UART5, UART6 and UART7 were not being
+        configured as TTYS0 for printing over serial console. From Shirshak
+        Sengupta.
+
+    * C Library/Header Files:
+
+      - include/signal.h:  Change type of SIG_ERR, SIG_IGN, ... to
+        _sa_handler_t.  The type void does not work with the IAR toolchain.
+        From Aleksandr Vyhovanec.
+      - crc16: fix error. From  Paul Alexander Patience.
+      - strtoul() and strtoull():  Fix errno settings required by function
+        definition.  Resolved Bitbucket Issue #1. From Sebastien Lorquet.
+
+    * Build/Configuration System:
+
+      - Build system: This change fixes a build problem that only occurs
+        when reconfiguring from Linux to Windows or vice-versa.  It is a
+        problem that was present but not usually experienced until two
+        things happened: (1) The pre_config target was added to run before
+        the menconfig operation and (2) the context target was added before
+        the pre_config target in order to set up the correct symbolic links
+        (in the apps/platform directory) needed by the pre_config target.
+        But then now if you start with a Linux system and run 'make
+        menuconfig' to switch to Linux, the context target will execute
+        first and set up POSIX style symbolic links before doing the
+        menuconfig.  Then after the menuconfig, the make will fail on
+        Windows if you are using a Windows native toolchain because that
+        native toolchain cannot follow the Cygwin- style symbolic links.
+        The fix here is to also execute the clean_context AFTER executing
+        menuconfig.  A lot more happens now:  It used to be that doing
+        'make menuconfig' only did the menuconfig operation.  Now it does
+        context, pre_config, menuconfig, clean_context.  Not nearly as
+        snappy as it used to be.
+      - Need to build the drivers/ directory even it file descriptors are
+        not supported.  There are things in the drivers/ directory that are
+        still needed (like SYSLOG logic).
+      - Remove all inclusion of header files from the apps/include
+        directory from NuttX core logic.  There should be no dependency on
+        logic within NuttX on logic within apps/.  This caused a lot of
+        reshuffling of logic:  binfmt pcode support, usbmonitor is now a
+        kernel thread, TZ/Olson database moved to libc/zoneinfo.
+
+    * Application Build/Configuration System:
+
+      - Make sure that APPNAME is defined in all Makefiles that generate
+        applications.  From Sebastien Lorquet.
+
+    * apps/builtins:
+
+      - apps/builtins: exec_builtin was not using the provided open flags.
+        As a result >> redirection was not working; it was treated the same
+        as >.
+
+    * apps/nshlib:
+
+      - apps/nshilib: PS Command: When Priority Inheritance is enabled, the
+        format of /proc//status changes to show both the current
+        priority and the threads base priority.  This messes up the format
+        of cmd_ps. From David Alessio.
+
+    * apps/netutils:
+
+      - apps/netutils, uIP webserver:  Fix a data declaration in a header
+        file.
+
+    * apps/canutils:
+
+      - apps/canutils/libuavcan: Fix for recent change to STM32 timer
+        frequency definiitions.
+
+    * apps/examples:
+
+      - apps/examples/alarm: ioctl call was clobbering file descriptor.
+      - apps/examples/can: Some variables were not declared in all required
+        cases. From Sebastien Lorquet.
+      - apps/examples/media: media example was intended to take either a
+        command line argument, or a compiled-in default value from config.
+        However, the default was ignored, leading to confusing error
+        messages. From ziggurat29.
+
+NuttX-7.18 Release Notes
+------------------------
+
+The 118th release of NuttX, Version 7.18, was made on October 8, 2016,
+and is available for download from the Bitbucket.org website.  Note
+that release consists of two tarballs:  nuttx-7.18.tar.gz and
+apps-7.18.tar.gz.  These are available from:
+
+    https://bitbucket.org/nuttx/nuttx/downloads
+    https://bitbucket.org/nuttx/apps/downloads
+
+Both may be needed (see the top-level nuttx/README.txt file for build
+information).
+
+Additional new features and extended functionality:
+
+    * Core OS:
+
+      - Add standard adjtime() interface and basic timekeeping support.
+        Normally used with an NTP client to keep system time in
+        synchronization.  From Max Neklyudov.
+      - Use the oneshot timer with optional entropy to measure CPU load if
+        so configured.
+
+    * File System and Block and MTD Drivers:
+
+      - Add Fujistu MB85RS256B ramtron support.  From Beat Kng.
+      - SPI-based MTD driver for Macronix MX25L3233F or MX25L6433F.  From
+        Aleksandr Vyhovanec.
+
+    * Graphics/Display Drivers:
+
+      - SH1106 0.96 OLED module support (SSD1306 compatible) + I2C fixes.
+        From v01d (phreakuencies).
+
+    * Sensor Drivers:
+
+      - Add KXTJ9 Accelerometer driver from the Motorola Moto Z MDK.
+      - Add MFRC522 RFID ISO14443 and Mifare transceiver driver.  From Alan
+        Carvalho de Assis.
+      - Add driver for the LIS3MDL 3 axis magnetometer.  From Alexander
+        Entinger.
+      - Add driver for the MLX90393 3 axis magnetometer. From Alexander
+        Entinger.
+      - Add driver for the LIS3DSH 3 axis accelerometer. From Alexander
+        Entinger.
+      - Add driver for the Bosch BMG160 3 axis gyroscope. From Alexander
+        Entinger.
+      - Add support for the  Sensixs XEN1210 3D-board. This sensor is used
+        on NANOSATC-BR2 a Brazillian CUBESAT project.  From Alan Carvalho
+        de Assis.
+      - Add a new ioctl command (set MAXPOS) for Tiva QEI.  From Young.
+
+    * Other Common Device Drivers:
+
+      - I/O Expander: Remove hard-coded PCA9555 fields from ioexpander.h
+        definitons.  Add support for an attach() method that may be used
+        when any subset of pin interrupts occur.
+      - I/O Expander Interface:  Encode and extend I/O expander options to
+        include interrupt configuration.
+      - PCA9555 Driver:  Replace the signalling logic with a simple callback
+        using the new definitons of ioexpander.h.  This repartitioning of
+        functionality is necessary because (1) the I/O expander driver is
+        the lower-lower part of any driver that uses GPIOs (include the GPIO
+        driver itself) and should not be interacting directly with the much
+        higher level application layer.  And (2) in order to be compatible
+        with the GPIO driver (and any arbitrary upper half driver), the
+        PCA9555 should not directly signal, but should call back into the
+        upper half.  The upper half driver that interacts directly with the
+        application is the appropriate place to be generating signal.
+      - Add a skeleton I/O Expander driver (based on the PCA9555 driver).
+      - Add PCF8574 I/O Expander driver.
+      - GPIO driver:  Add IOCTLs to get the pin type and to unregister a
+        signal handler.
+      - Add a GPIO lower-half driver that can be used to register a GPIO
+        character driver for accessing pins on an I/O expander.
+      - Add an SPI helper function that encapsulates and manages a sequence
+        of SPI transfers.
+      - Add an SPI character driver that will permit access to the SPI bus
+        for testing purposes.
+      - Add oneshot timer lower half interface definition.
+      - Add an upper-half, oneshot timer character driver.
+      - Add Audio Tone Generator for NuttX.  From Alan Carvalho de Assis.
+      - Add USB host support for composite devices.  This feature is not
+        well tested.
+      - drivers/ioexpander: Add an (untested) TCA64XX I/O Expander driver
+        leveraged from Project Ara.
+
+    * Simulation Platform:
+
+      - Add a simulated I/O Expander driver.
+      - Add simulator-based test support for apps/examples/gpio.
+      - Add a configuration useful for testing Mini Basic.
+      - Add a simulated oneshot lowerhalf driver.
+
+    * Atmel SAM3/4 Drivers:
+
+      - SAM4CM: Add option to support oneshot timer without free-running
+        timer.  Add oneshot lower half driver.
+
+    * Atmel SAMA5 Drivers:
+
+      - SAMA5D: Add option to support oneshot timer without free-running
+        timer.  Add oneshot lower half driver.
+
+    * Atmel SAMV7 Drivers:
+
+      - SAMV71/SAME70: Add option to support oneshot timer without
+        free-running timer.  Add oneshot lower half driver.
+      - Add support for SAMV7 DACC module.  From Piotr Mienkowski.
+
+    * NXP Freescale Kinetis Drivers:
+
+      - Add support for I2C and RTC.  From v01d (phreakuencies).
+
+    * NXP Freescale Kinetis Boards:
+
+      - Add teensy 3.x I2C support.  From v01d (phreakuencies).
+
+    * STMicro STM32:
+
+      - Add IAR-style STM32F1xx vectors. Tested on STM32F103RB and
+        STM32F107RC.  From Aleksandr Vyhovanec.
+
+    * STMicro STM32 Drivers:
+
+      - Add timekeeping support for the STM32 tickless mode.  From Max
+        Neklyudov.
+      - Add a oneshot, lower-half driver for STM32.
+      - STM32 L4: Add oneshot lower half driver for STM32 L4.
+      - STM32 L4: Add support for quadrature encoders on STM32L4. Sebastien
+        Lorquet.
+
+    * STMicro STM32 Boards:
+
+      - stm32f103-minimum: Add board support to MFRC522 driver.  From Alan
+        Carvalho de Assis.
+      - Add oneshot board initialization to stm32f103-minimum.  From Alan
+        Carvalho de Assis.
+      - stm32f103-minimum: Add board configuration to initialize Audio Tone
+        Generator.  From Alan Carvalho de Assis.
+      - stm32bufferfly2: Add support for the Kamami stm32butterfly2
+        development board with optional ETH phy.  From  Michal Lyszczek.
+      - stm32f103-minimum: Add board config support to SPI LCD module
+        JLX12864G-086.  From Alan Carvalho de Assis.
+      - stm32l476-mdk: Support basic booting and nsh on Motorola MDK. The
+        Motorola MDK is based off of an earlier version of NuttX.
+        This only provides a basic NSH shell.  From Jim Wylder.
+      - STM32 F4 Discovery:  Add support for XEN1210 3D-board.  From Alan
+        Carvalho de Assis.
+      - stm32f103-minimum:  Add stm32_bringup support and userled example to
+        STM32F103 Minimum board.  From Alan Carvalho de Assis.
+      - Add support for qencoders on various nucleo boards.  From Sebastien
+        Lorquet.
+      - olimex-stm32-e407: Add some networking configurations.  From Mateusz
+        Szafoni.
+
+    * TI Tiva Drivers:
+
+      - Add tiva PWM lower-half driver implementation. From Young.
+      - Tiva QEI:  Add QEI lower-half driver for Tiva series chip.  From
+        Young.
+
+    * C Library/Header Files:
+
+      - Separate XorShift128 PRNG from /dev/urandom and make it generally
+        available.
+      - Add POSIX type sig_atomic_t.  From Sebastien Lorquet.
+      - Add the difftime() function.  The function depends on the toolchain-
+        dependent CONFIG_HAVE_DOUBLE so is not available on tiny platforms.
+        From Sebastien Lorquet.
+      - Add support for remove().  From Sebastien Lorquet.
+      - Add system() to stdlib.h.  Actual implementation is in
+        apps/system/system.
+
+    * Build/Configuration System:
+
+      - Rename arch/sh to arch/renesas.
+      - Remove contactless drivers from drivers/wireless to drivers
+        contactless.  From Sebastien Lorquet.
+      - Move all modem-related IOCTL commands to a common file to assure
+        that they will be unique.
+
+    * Tools:
+
+      - Add sethost.sh.   This is a script that you can use to quickly
+        change the host platform from Linux to Windows/Cygwin. Might save
+        you a lot of headaches.
+
+    * Applications: apps/nshlib:
+
+      - Add logic to support an NSH-specific system command.
+      - Add printf command to NSH, e.g., controlling /dev/userleds from
+        command line: nsh> printf \x01 > /dev/userleds. From Alan Carvalho
+        de Assis.
+
+    * Platforms: apps/system:
+
+      - Port tee command from NetBSD.
+      - Add a generic system command.  Current implentation cannot use
+        /bin/sh and spawns the custom NSH system command directly.
+
+    * Platforms: apps/platform:
+
+      - Add C++ support for STM32L476-MDK.
+
+    * Platforms: apps/interpreters:
+
+      - Add a port of Mini Basic, version 1.0, written by Malcom McLean and
+        released under the Creative Commons Attribution license.
+
+    * Applications: apps/examples:
+
+      - Add a simple test of the GPIO driver.
+      - Add RFID_READUID sample application. From Alan Carvalho de Assis.
+      - Add Oneshot timer example.
+      - Add a simple test of the system command.
+
+Works-In-Progress:
+
+    * IEEE802.14.5/6LowPAN.  Hooks and framework for this effort were
+      introduced in NuttX-7.15.  Work has continued on this effort on
+      forks from the main repositories, albeit with many interruptions.
+      The completion of this wireless feature will postponed until at
+      least NuttX-7.19.
+
+Bugfixes.  Only the most critical bugfixes are listed here (see the
+ChangeLog for the complete list of bugfixes and for additional, more
+detailed bugfix information):
+
+    * Core OS:
+
+      - Explicitly initialize the group tg_exitsem with sem_init().  The
+        existing logic worked because the correct initialization value is
+        all zero, but it is better to initialize the semaphore explicitly.
+      - The TCB nchildren field should not be incremented when pthreads are
+        created.
+      - Move fields related to parent/child task relationship out of TCB
+        into group structure where they belong.  Child is a group, not a
+        thread.
+      - mq_send() was not setting the errno value on certain failures to
+        allocate a message.
+      - Define 'group' even if HAVE_GROUPID is not set.  From Mateusz
+        Szafoni.
+      - Vector table should have dimension NR_IRQS, not NR_IRQS+1. From
+        Sagitta Li.
+      - pthreads:  When a pthread is started, there is a small bit
+        of logic that will run on the thread of execution of the new
+        pthread.  In the case where the new pthread has a lower
+        priority than the parent thread, then this could cause both the
+        parent thread and the new pthread to be blocked at the priority of
+        the lower priority pthread (assuming that CONFIG_PRIORITY_INHERITANCE
+        is not selected). This change temporarily boosts the priority of the
+        new pthread to at least the priority of the new pthread to at least
+        the priority of the parent thread.  When that bit of logic has
+        executed on the thread of execution of the new pthread, it will then
+        drop to the correct priority (if necessary) before calling into the
+        new pthread's entry point.
+
+    * File System/Block Drivers/MTD Drivers:
+
+      - FAT performance improvement. In large files, seeking to a
+        position from the beginning of the file can be very time consuming.
+        ftell does lssek(fd, 0, SET_CURR).  In that case, that is wasted
+        time since we are going to seek to the same position.  This fix
+        short-circuits fat_seek() in all cases where we attempt to seek to
+        current position.  Suggested by Nate Weibley.
+      - MTD: Fixed cloned typos in several FLASH drivers.  From Aleksandr
+        Vyhovanec.
+      - mount: Corrects a bad assertion noted by Pierre-noel Bouteville.
+        Also fixes a reference counting problem in an error condition:
+        When the mountpoint inode is found but is not an appropriate
+        mountpoint, the reference count on the inode was not being
+        decremented.
+
+    * Common Drivers:
+
+      - Various serial drivers: Fix FIONWRITE and add FIONSPACE.  All
+        implementations of FIONWRITE were wrong.  FIONWRITE should return
+        the number of bytes waiting in the outgoing send queue, not the free
+        space.  Rather, FIONSPACE should return the free space in the send
+        queue.
+      - Add missing prototype for btn_lower_initialize().
+      - Make DAC sample structure packed.  From Marc Recht.
+
+    * Networking:
+
+      - TCP:  tcp_ipvX_bind() not actually using the port selected with
+        port==0.  Also removes duplicate call to pkt_input().  Issues noted
+        by Pascal Speck.
+      - drivers/net: NET_TUN=y => NET_MULTIBUFFER=y.  From Vladimir
+        Komendantskiy.
+      - slip driver: Fix calculations using MSEC_PER_TICK.  If
+        USEC_PER_TICK is less than 1000, then MSEC_PER_TICK will be
+        zero.  It will be inaccurate in any case.
+
+    * Atmel SAM3/4 Drivers:
+
+      - SAM3/4 GPIO: Enable peripheral clock for GPIO port when GPIO is
+        configured as input. The value of a GPIO input is only sampled when
+        the peripheral clock for the port controller the GPIO resides in is
+        enabled.  Therefore we need to enable the clock even when polling a
+        GPIO.  From Wolfgang Reissnegger.
+      - All SAM Ethernet Drivers: Add support so that the drivers can be
+        built with CONFIG_NET_MULTIBUFFER=y.
+      - SAM3/4: Fix GPIO pull-up/down code. Enabling the pull-down resistor
+        while the pull-up resistor is still enabled is not possible. In this
+        case, the write of PIO_PPDER for the relevant I/O line is discarded.
+        Likewise, enabling the pull-up resistor while the pull-down resistor
+        is still enabled is not possible. In this case, the write of
+        PIO_PUER for the relevant I/O line is discarded.  From Wolfgang
+        Reinegger.
+
+    * Atmel SAMV7 Drivers:
+
+      - All SAM Ethernet Drivers: Add support so that the drivers can be
+        built with CONFIG_NET_MULTIBUFFER=y.
+      - SAM GPIO: Apply Wolfgang's change for SAM3/4 to SAMA5 and SAMV7.
+
+    * Atmel SAMA5:
+
+      - Add missing oneshot max_delay method.
+      - All SAM Ethernet Drivers: Add support so that the drivers can be
+        built with CONFIG_NET_MULTIBUFFER=y.
+      - SAM GPIO: Apply Wolfgang's change for SAM3/4 to SAMA5 and SAMV7.
+
+    * NXP Freescale LPC43xx Drivers:
+
+      - LPC43xx serial: Fix typos in LPC43 serial driver.  Found by Vytautas
+        Lukenskas.
+      - LPC43xx Serial: There are some small problems in LPC43xx RS485 mode
+        configuration. In particular: (1) UART0,2,3 do not have DTR pins
+        (different from UART1), so, Kconfig needs to be adjusted. (2)
+        lpc43_uart.c in RS485 mode only configures DIR pin, but doesn't
+        enable pin output for UART0,2,3. (3) should be option to reverse DIR
+        control pin output polarity. (4) lpc43xx/chip/lpc43_uart.h doesn't
+        have USART3 definitions.  NOTE: I didn't modified and didn't tested
+        USART1, as it has different hardware.  From Vytautas Lukenskas.
+        From Vytautas Lukenskas.
+
+    * SiLabs EFM32 Drivers:
+
+      - EFM32 SPI drivers adopted incompatible conventions (See STM32 for
+        details of the issue).
+
+    * STMicro STM32 Drivers:
+
+      - STM32, STM32 L4, and EFM32 SPI drivers adopted incompatible
+        conventions somewhere along the line.  They set the number of bits
+        to negative when calling SPI_SETBITS which had the magical side-
+        effect of setting LSB first order of bit transmission.  This is not
+        only a hokey way to pass control information but is supported by no
+        other SPI drivers.  This change three things:  (1) It adds
+        HWFEAT_LSBFIRST as a new H/W feature. (2) It changes the
+        implementations of SPI_SETBITS in the STM32 and EFM32 drivers so
+        that negated bit numbers are simply errors and it adds the
+        SPI_HWFEATURES method that can set the LSB bit order, and
+        (3) It changes all calls with negative number of bits from all
+        drivers: The number of bits is now always positive and
+        SPI_HWFEATURES is called with HWFEAT_LSBFIRST to set the bit order.
+      - Add missing SPI2 and SPI3 support for STM32F3F3.  Add STM32F37XX DMA
+        channel configuration.  For STM32F37XX, SYSCFG_EXTICR_PORTE defined
+        twice.  From Alan Carvalho de Assis.
+      - STM32: Make stm32_pwr_enablebkp thread safe.  From Max Neklyudov.
+      - Fix bad pllmul values for STM32F1XX connectivity line. STM32F1XX
+        connectivity line supports only x4, x5, x6, x7, x8, x9 and x6.5
+        values. From Michal Lyszczek.
+      - STM32F3 SPI:  Fix the number of bit setting for the F3.  That and
+        data packing work differently on the STM32F3 than for other STM32
+        parts.
+      - STM32 and STM32 L4: Enabling SPI DMA loses other bits in CR2.
+      - STM32F3 SPI:  Cannot write always 16-bit value to DR register
+        because of how the F3 implements data packing.
+      - STM32F411 and STM32F446 map i2c2_sda_4 to different alternate
+        function numbers.  From Konstantin Berezenko.
+      - STM32 DMA Fix: Change stm32 adc dma callback to send channel
+        number instead of index.  From Konstantin Berezenko.
+      - STM32 OTGFS device: Fix for lost first word from FIFO
+
+        1) Do not overwrite Reserved Bits in GINTSTS (per ref manual)*
+        2) Acknowledge all pending int on entry to ISR that are Only rc_w1*
+        3) Do not disable RXFVL*
+        4) Loop until RXFVL is cleared*
+        5) Only clear the NAK on the endpoint on the OTGFS_GRXSTSD_PKTSTS_SETUPDONE to not loose the first WORD of FIFO all the data  (Bug Fix)
+
+        Changed marked *are just driver clean up and ensure ints are not lost. The bug fix is #5
+
+        Test case open putty and observer the Set/Get LineCoding. Without this fix #5 the Get will not match the Set, and in fact the data might be skewed by 4 bytes, that are lost from the FIFO if the OTGFS_DOEPCTL0_CNAK bit is set in the OTGFS_GRXSTSD_PKTSTS_SETUPRECVD as opposed to the OTGFS_GRXSTSD_PKTSTS_SETUPDONE
+
+        Set Line Coding DATA1: 4B | 00 c2 01 00 00 00 08 | c8 1B
+        Get Line Coding DATA1: 4B | .. .. .. .. 00 00 08   c8 .. 00 00 07 | 7a 72
+
+        From David Sidrane.
+      - STM32 L4 OTGFS device: Apply stm32 fix to stm32l4.  From Sebastien
+        Lorquet.
+      - STM32 F7: Remove duplicate call to pkt_input from Ethernet driver.
+        Issues noted by Pascal Speck.
+      - STM32 L4: Add support for USART3-USART5.  For STM32L4 parts, the
+        higher number USART ports supported varies.  Add the HAVE_USARTx
+        definitions to the configuration to allow enabling the higher
+        numbered USART ports. From Jim Wylder.
+      - STM32 USB: Set USB address to avoid a failed assertion.  From
+        Pierre-noel Bouteville.
+      - STM32 L4 and L7 USB: Pierre's assertion-avoidance change should
+        also be applied to STM32 F7 and L4.
+      - STM32, L4, and F7:  Remove GPIO_ETH_RMII_TX_CLK. TX_CLK is not
+        present in RMII. Mateusz Szafoni.
+      - STM32 Ethernet: Correct typo in conditional logic.  From Neil
+        Hancock.
+      - STM32 L4 USB Device: Fixed L4 USB Driver by avoiding SETUPDONE and
+        EPOUT_SETUP.  From David Sidrane.
+      - STM32 SPI: stm32_modifycr2 should be available on all platforms if
+        DMA is enabled.
+      - STM32 DMA2D: fix an error in up_dma2dcreatelayer where an invalid
+        pointer was returned when a certain underlying function failed.
+        From Jens Grf.
+
+    * TI Tiva Drivers:
+
+      - Fix two bugs of tiva pwm lower-half driver implementation. From
+        Young.
+      - Tiva Ethernet:  Needs support for CONFIG_NET_MULTIBUFFER=y.
+
+    * C Library/Header Files:
+
+      - lib_dumpbuffer() now prints a large on-stack buffer first to avoid
+        problems when the syslog output is prefixed with time.  From
+        Pierre-noel Bouteville.
+      - libc/math: This fixes the following libc/math issues: (1) asin[f l]()
+        use Newtons method to converge on a solution. But Newtons method
+        converges very slowly (> 500,000 iterations) for values of x close to
+        1.0; and, in the case of asinl(), sometimes fails to converge (loops
+        forever). The attached patch uses an trig identity for values of
+        x > sqrt(2). The resultant functions converge in no more than 5
+        iterations, 6 for asinl().  (2) The NuttX erf[f l]() functions are
+        based on Chebyshev fitting to a good guess. The problem theres a
+        bug in the implementation that causes the functions to blow up with
+        x near -3.0. This patch fixes that problem. It should be noted that
+        this method returns the error function erf(x) with fractional error
+        less than 1.2E-07 and thats fine for the float version erff(), but
+        the same method is used for double and long double version which
+        will yield only slightly better precision. This patch doesn't
+        address the issue of lower precision for erf() and erfl(). (3) a
+        faster version of copysignf() for floats is included. From David S.
+        Alessio.
+      - strtod() was not returning endptr on error conditions.
+      - libc/math: floor(), floorf(), and floorl():  Fix logic error.  Was
+        not correctly handling negative integral value.
+      - isatty() should be prototyped in unstid.h, not termios.h.  From
+        Sebastien Lorquet.
+      - nxglib: Fix handling of near-horizontal lines of width 1 in
+        nxgl_splitline().  Missing handling for degenerate condition caused
+        width 1 lines such as (0, 0) - (100, 10) to have gaps in the
+        drawing. From Petteri Aimonen.
+
+    * Build/Configuration System:
+
+      - Top-Level Makefiles:  Fix a chicken-and-egg problem. In the menuconfig
+        target, the context dependency was executed before kconfig-mconf.  That
+        was necessary because the link at apps/platform/board needed to be set
+        up before creating the apps/Kconfig file.  Otherwise, the platform
+        Kconfig files would not be included.  But this introduces the chicken-
+        and-egg problem in some configurations. In particular:  (1) An NX
+        graphics configuration is used that requires auto-generation of
+        source files using cpp, (2) the configuration is set for Linux, but
+        (3) we are running under Cygwin with (4) a Windows native toolchain.
+        In this case, POSIX-style symbolic links are set up but the Windows
+        native toolchain cannot follow them. The reason we are running
+        'make menuconfig' is to change from Linux to Cygwin, but the target
+        fails.  During the context phase, NX runs CPP to generate source files
+        but that fails because the Windows native toolchain cannot follow
+        the links.  Checkmate.  This was fixed by changing all of the make
+        menuconfig (and related) targets.  They no longer depend on context
+        being run.  Instead, they depend only on the dirlinks target.  The
+        dirlinks target only sets up the directory links but does not try
+        to run all of the context setup; the compiler is never invoked; no
+        code is autogenerated and things work.
+      - CXXFLAGS: add -fcheck-new whenever -fno-exceptions is used. From
+        Beat Kng.
+
+    * Tools
+
+      - tools/refresh.sh: Recent complexities added to apps/ means that
+        configuration needs the correct Make.defs file in place in order to
+        configure properly.
+      - tools/kconfig2html.c: Update to handle absolute paths when sourcing
+        Kconfig files.
+      - tools/mkfsdata.pl was still generating the old-style apps/include
+        inclusion paths.
+
+    * Application Build/Configuration System:
+
+      - Add DIRLINK and DIRUNLINK tool definitions to apps/Make.defs.
+
+    * apps/nshlib:
+
+      - Fix FIFO_SIZE vs PIPE_SIZE.
+      - Fix hex representation of IP address in Kconfig.  Noted by Michal
+        Lyszczek.
+      - nsh_syscmds.c: missing semicolon.  From Mateusz Szafoni.
+      - In system command, don't try to flush output streams if stdio
+        buffered I/O is not supported.
+
+    * apps/canutils:
+
+      - libuavcan: Under certain circumstances, DELIM is not be defined in
+        Makefile.
+      - Add definition for APPNAME in apps/canutils/canlib.  From Sebastien
+        Lorquet.
+
+    * apps/gpsutils:
+
+      - Fix an error minmea.  From Aleksandr Vyhovanec.
+
+    * apps/examples:
+
+      - apps/examples/oneshot:  If the requested delay is > max_delay, then
+        break the delay up into several pieces.
+
+NuttX-7.19 Release Notes
+------------------------
+
+The 119th release of NuttX, Version 7.19, was made on December 26, 2016,
+and is available for download from the Bitbucket.org website.  Note
+that release consists of two tarballs:  nuttx-7.19.tar.gz and
+apps-7.19.tar.gz.  These are available from:
+
+    https://bitbucket.org/nuttx/nuttx/downloads
+    https://bitbucket.org/nuttx/apps/downloads
+
+Both may be needed (see the top-level nuttx/README.txt file for build
+information).
+
+Additional new features and extended functionality:
+
+    * Core OS:
+
+      - sched/semaphore, sched/phread/, libc/semaphore, libc/pthread: Add
+        pthread_mutexattr_get/set_protocol and non-standard
+        sem_get/set_protocol. These may use to enable or disable priority
+        inheritance on a single semaphore.
+      - Spinlocks:  Added capability to provide architecture-specific memory
+        barriers.
+      - SMP: Add spin_trylock().  Use this in conditions where other CPUs need
+        to stopped but we cannot call enter_critical_section().
+      - sched note:  Extend OS instrumentation to include some SMP events.
+        Also add spinlock instrumentation;  In SMP configurations, add a
+        filter mask to log only notes from certain CPUs.
+      - sched note:  Permit spinlock and critical section notes in in-memory
+        buffer iff sched_not_get() interfaces is disabled.
+      - sched note:  Add additional note to see if/when CPU is started in SMP
+        mode.
+      - sched note:  Record ID enumeration now results on constant values; ID
+        values do not change with configuration.  This makes writing post-processing software much easier.
+      - boardctl:  Add new boardctl() command, BOARDIOC_NX_START, to start the
+        NX server as a kernel thread.
+      - pthreads:  Add pthread_cleanup_push() and pthread_cleanup_pop().
+      - pthreads: Added pthread_setcanceltype() and pthread_testcancel().
+      - pthreads: Add support for cancellation points.
+      - task_delete() now obeys all cancellation point semantics.
+      - Add task_setcancelstate(), task_setcanceltype(), and
+        task_testcancel().  These are non-standard interfaces analogous to the
+        correponding pthread_ interfaces that provide cancellation controls
+        for tasks.
+
+    * Graphics/Display Drivers:
+
+      - boardctl:  Add new boardctl() command, BOARDIOC_NX_START, to start the
+        NX server as a kernel thread.
+
+    * Networking/Network Drivers:
+
+      - Network drivers:  Add option to use low-priority work queue to all
+        Ethernet and MAC level drivers.
+      - Network Drivers:  Adapt all Ethernet (and other MAC) drivers to work
+        as though CONFIG_NET_MULTIBUFFER were set.  Remove all references to
+        CONFIG_NET_MULTIBUFFER.
+      - Eliminate CONFIG_NO_NOINTS.  There is no longer any support for
+        interrupt level processing of the network stack. Lots of files changed.
+
+    * Other Common Device Drivers:
+
+      - Vishay VEML6070:  Add Vishay VEML6070 driver.  From Alan Carvalho de
+        Assis.
+
+    * ARMv7-A
+
+      - ARMv7-A/i.MX6:  Add SCU register definitions.  Add some controls to
+        enable SMP cache coherency in SMP mode.  Makes no difference, however
+        -- cache still incoherent on i.MX6.
+      - ARMv7 GIC: SGIs are non-maskable but go through the same path as
+        other, maskable interrupts.  Added logic to serialize SGI processing
+        when necessary.
+
+    * Atmel SAM3/4:
+
+      - SAM3/4:  Add SMP support for the dual-core SAM4CM.  From Masayuki
+        Ishikawa.
+
+    * Atmel SAM3/4 Drivers:
+
+      - Add support for the SAM5CMP-DB board.  From Masayuki Ishikawa.
+
+    * Atmel SAM3/4 Boards:
+
+      - SAM4CMP-DB:  Add support for the Atmel SAM4CMP-DB board running in an
+        SMP configuration.  From Masayuki Ishikawa.
+      - SAM4CMP-DB: Add hooks to auto-mount the procfs file system on startup
+        in board bring-up logic.
+
+    * Atmel SAMV7 Drivers:
+
+      - SAMv7:  Register the watchdog device at the configured device path
+        CONFIG_WATCHDOG_DEVPATH vs. hard-coded /dev/wdt.  From Frank Benkert.
+
+    * Calypso
+
+      - Calyps: Remove all Calypso board configurations.  Remove Calypso
+        architecture support and support for Calypso SERCOMM driver.
+
+    * Misoc LM32:
+
+      - Misoc LM32:  Adds basic support for the Misoc procoessors and the LM32
+        in particular.  From Ramtin Amin.
+      - Misoc LM32:  Add signal handling logic.  From Ramtin Amin.
+      - Misoc LM32:  Add logic to flush/invalidate caches.  From Ramtin Amin.
+
+    * Misoc LM32 Drivers:
+
+      - Misoc LM32 Serial:  Add interrupting Misoc serial driver.  From Ramtin
+        Amin.
+      - Misoc LM32 Timer:  Add timer driver.  From Ramtin Amin.
+      - Misoc LM32:  Add Misoc Ethernet driver  From Ramtin Amin.
+
+    * Misoc LM32 Boards:
+
+      - Misoc LM32 Qemu:  Board support for testing Misoc LM32 with Qemu. From
+        Ramtin Amin.
+      - Misoc LM32 Qemu:  Integrate network support into configs/misoc/hello.
+        From Ramtin Amin.
+      - Misoc LM32 Qemu:  Remove configs/misoc/include/generated directory.  I
+        suppose the the intent now is that this is a symbolic link?  DANGER!
+        This means that you cannot compile this code with first generating
+        these files a providing a symbolic link to this location!   There is a
+        sample directory containing generated sources.  This is really only
+        useful for performing test builds.  You really must generate the Misoc
+        architecture for a real-life build.  From Ramtin Amin.
+
+    * NXP Freescale i.MX6 Drivers:
+
+      - i.MX6:  Add an untested SPI driver taken directly from the i.MX1 port.
+
+    * NXP Freescale Kinetis:
+
+      - Kinetis:  Added missing headers.  Kinetis broke out SPI to
+        kinetis/kinetis_spi.h. Broke out DMA to use the modern Nuttx chip
+        inclusion - still STUBS.  Add Kinetis support for ARMV7-M Common
+        Vector and FPU.  Allow CONFIG_ARMV7M_CMNVECTOR,
+        CONFIG_STACK_COLORATION, CONFIG_ARCH_FPU.  Fix  i2c driver offset
+        swapped for value in kinetis_i2c_putreg.  From David Sidrane.
+
+    * NXP Freescale Kinetis Drivers:
+
+      - Kinetis: Add UID Unique ID.  From Neil Hancock.
+
+    * NXP Freescale Kinetis Boards:
+
+      - Freedom-K64F board: Add support for UID Unique ID.  From Neil Hancock.
+
+    * NXP Freescale LPC17xx Boards:
+
+      - Olimex-LPC1766-STK:  Enable procfs in NSH configuration. Automount
+        /proc on startup.
+
+    * NXP Freescale LPC43xx Drivers:
+
+      - LPC43xx: Add timer driver:  From Alan Carvalho de Assis.
+      - LPC43xx GPDMA driver:  The GPDMA block is basically the same as the
+        LPC17xx.  Only the clock configuration is different and LPC43xx has
+        four different DMA request sources, where LPC17xx has only two. From
+        Alan Carvalho de Assis.
+
+    * NXP Freescale LPC43xx Boards:
+
+      - Bambino 200E:  Add basic support to Micromint Bambino 200E board.
+        This includes contributions from Jim Wolfman.  From Alan Carvalho de
+        Assis.
+      - Bambino 200E:  Add support for timer driver.  From Alan Carvalho de
+        Assis.
+
+    * RGMP:
+
+      - Remove RGMP and RGMP drivers.
+
+    * RISC-V:
+
+      - RISC-V: Add support for the RISC-V architecture and
+        configs/nr5m100-nexys4 board.  The board support on this is pretty
+        thin, but it seems like maybe a good idea to get the base RISC-V stuff
+        in since there are people interested in it.  From Ken Pettit.
+
+    * STMicro STM32 Drivers:
+
+      - STM32 F3:  Implemention of the STM32 F37xx SDADC module. There are
+        also changes to ADC, DAC modules. SDADC has only been tested in DMA
+        mode and does not support external TIMER triggers. This is a work in
+        progress.  From  Marc Recht.
+      - STM32 F3:  Add PWM driver support for STMF37xx.  The changes have been
+        tested successfuly for TIM4 and TIM17 (different IPs).  From  Marc
+        Recht.
+      - STM32 F4:  Support oversampling by 8 for the STM32 F4. From David
+        Sidrane.
+      - STM32 F4:  Added Timers 2-5 and control of SAI and I2S PLLs.  Added
+        support for stmf469 SAI and I2S PLL configuration and STM446 fixes.
+        From David Sidrane.
+      - STM32 F4:  Expanded OTGFS support to stm32F469 and stm32f446.  Added
+        missing bit definitions, Used stm32F469 and stm32f446 bit
+        definitions,  Removed unsed header file.  From David Sidrane.
+      - STM32 F4:  Allow dma in 1 bit mode in STM32F4xxx.  From David Sidrane.
+      - STM32 F7:  Allow the config to override the clock edge setting.  From
+        David Sidrane.
+      - STM32 L4:  Support Complementary PWM outputs on STM32L4.  From
+        Sebastien Lorquet.
+      - STM32 L4:  Add implementation of dumpgpio for stm32l4, was required
+        for pwm debug. From Sebastien Lorquet.
+
+    * STMicro STM32 Boards:
+
+      - STM32F103 Minimum:  Add button support.  From Alan Carvalho de Assis.
+      - STM32F103 Minimum:  Add support to PWM on STM32F103-Minimum board.
+        From Alan Carvalho de Assis.
+      - STM32F103 Minimum:  Add RGB LED support on STM32F103 Minimum board.
+        From Alan Carvalho de Assis.
+      - STM32F103 Minimum:  Add Vishay VEML6070 driver support to the
+        STM32F103-Minimum board.  From Alan Carvalho de Assis.
+      - Nucleo-F303RE:  Add STM32 F303RE hello configuration.   From Marc
+        Recht.
+      - Nucleo-L476:  Support PWM testing on board Nucleo L476.  From
+        Sebastien Lorquet.
+      - Nucleo L476:  Add support for timers to Nucleo L476.  From Sebastien
+        Lorquet.
+      - Hymini STM32v:  Enable CONFIG_RTC in the hymini-stm32v/nsh2
+        (kitchensink) config. From Maciej Wjcik.
+      - Olimex STM32-p407:  Add support for the Olimex STM32 P407 board.
+
+    * TI Tiva Drivers:
+
+      - Tiva PWM: Support PWM_PULSECOUNT feature for TI tiva.  From Young.Mu.
+
+    * Xtensa/ESP32
+
+      - Xtensa ESP32:  Basic architectural support for Xtensa processors and
+        the Expressif. ESP32 added.
+      - Xtensa ESP32:  Add EXPERIMENTAL hooks to support lazy Xtensa
+        co-processor state restore in the future.
+      - Xtensa ESP32:  Basic port is function in both single CPU and dual CPU
+        SMP configurations.  There is an NSH configuration for each CPU
+        configuration.  Outstanding issues include missing clock configuration
+        logic, missing partition tables to support correct configuration from
+        FLASH, and some serial driver pin configuration issues.
+      - Xtensa ESP32: Add stack checking logic.
+
+    * Xtensa/ESP32 Boards:
+
+      - ESP32 Core v2:  Basic support for Expressif ESP32 Core v2 board
+        added.  The initial release includes an NSH and an SMP test
+        configuration.
+      - ESP32 Core v2:  Add configuration to support linking NuttX for
+        execution out of IRAM.
+      - ESP32 Core v2:  Automatically mount /proc at start-up.
+      - ESP32 Core v2:  Add an OS test to verify the port.
+
+    * C Library/Header Files:
+
+      - libc/locale:  Add a dummy setlocale() function to avoid drawing the
+        function from newlib.  Add clocale header file.
+      - include/locale.h:  Modify locale.h to add localeconv() and lconv
+        structure.  From Alan Carvalho de Assis.
+      - libc/locale:  Allows c++ code to compile with or without
+        CONFIG_LIBC_LOCALE and will generate a link error if
+        CONFIG_LIBC_LOCALE is not defined and setlocale is referenced. With
+        CONFIG_LIBC_LOCALE defined setlocale will act as if MB string is not
+        supported and return "C" for POSIX. C and "". From David Sidrane.
+      - libc/wchar:  Add wcslen, wmemchr, wmemcmp, wmemcpy wmemset, btowc,
+        mbrtowc, mbtowc, wcscmp, wcscoll, and wmemmove to NuttX.  From Alan
+        Carvalho de Assis.
+      - libc/wctype:  Add functions wcrtomb, wcslcpy, wcsxfrm, wctob, wctomb,
+        wctype, localeconv, strcoll, strxfrm, swctype, towlower, towupper and
+        wcsftime.   Add wctype.h; Move lib_wctype.c to libc/wctype.  From Alan
+        Carvalho de Assis.
+      - include/ctype.h : Add isblank() macro to ctype.h.  From Alan Carvalho
+        de Assis.
+      - lic/stdlib:   Add strtof() and strtold() as simply a copy of strtod
+        with types and limits changed.
+      - sscanf():  Use strtof() instead of strtod() if a short floating point
+        value was requested.  The should help performance with MCUs with
+        32-bit FPU support with some additional code size.
+      - sscanf(): Add scansets to the scanf function. Enabled
+        CONFIG_LIBC_SCANSET option.  From  Aleksandr Vyhovanec.
+      - include/inttypes.h: Add architecture-specific inttypes.h.  From Paul
+        A. Patience.
+      - C Library:  Allow option to enable IP address conversions even when
+        the IP address family is not supported.
+
+    * Build/Configuration System:
+
+      - The Smoothie project needs to compile C++ inside config/boardname/src/
+        to use with High Priority Interruption, then I modified the board
+        configs Makefile to support it.  It works fine for the first time
+        compilation, but if we execute "touch config/boardname/src/Pin.cxx"
+        and execute "make" it will not detect that Pin.cxx was modified. I
+        think there is some other place I should modify, but I didn't find
+        it.  From Alan Carvalho de Assis.
+
+    * Tools:
+
+      - tools/: Add tools/showsize.sh.
+
+    * NSH: apps/nshlib:
+
+      - NSH: dd command will show statistics.  From  Masayuki Ishikawa.
+
+    * Applications: apps/system:
+
+      - apps/system/sched_note:  Extend to include additions to instumentation
+        for SMP.
+      - apps/system/sched_note:  Add support for spinlock notes.
+      - apps/system/sched_note:  Add support for new scheduler instrumentation.
+
+    * Platforms: apps/platform:
+
+      - ESP32 Core v2:  Add platform support for the ESP32 core v2 board.
+      - Olimex STM32-p407: Add platform support for the Olimex STM32 P407.
+
+    * Graphics: apps/graphics
+
+      - graphics/traveler/tcledit and libwld:  Add an X11 Tcl/Tk tool that can
+        be used to edit Traveler world files.
+      - Graphics: Remove all NX server taks.  Instead, call boardctl() to the
+        NX server kernel thread.
+
+    * Applications: apps/examples:
+
+      - examples/buttons:  Add a new buttons example that uses the button
+        character driver instead of the architecture buttons directly. From
+        Alan Carvalho de Assis.
+      - examples/cctype:  Add an example to verify cctype functions.
+      - Remove RGMP example.
+      - examples/ostest:  Extend the pthread cancellation test to exercise
+        pthread_cleanup_push() (and pthread_cleanup_pop() indirectly via
+        pthread_cancel() and pthread_exit().
+      - examples/ostest: enhance pthread cancellation test some.
+
+Works-In-Progress:
+
+    * IEEE802.14.5/6LowPAN.  Hooks and framework for this effort were
+      introduced in NuttX-7.15.  Work has continued on this effort on
+      forks from the main repositories, albeit with many interruptions.
+      The completion of this wireless feature will postponed until at
+      least NuttX-7.20.
+
+Bugfixes.  Only the most critical bugfixes are listed here (see the
+ChangeLog for the complete list of bugfixes and for additional, more
+detailed bugfix information):
+
+    * Core OS:
+
+      - sched/semaphore: Within the OS, when a thread obtains a semaphore
+        count it must call sem_addholder() if CONFIG_PRIORITY_INHERITANCE is
+        enabled.  If a count is available, then sem_wait() calls
+        sem_addholder(), otherwise it waited for the semaphore and called
+        sem_addholder() when it eventually received the count.  This caused a
+        problem when the thread calling sem_wait() was very low priority.
+        When it received the count, there may be higher priority threads
+        "hogging" the CPU that prevent the lower priority task from running
+        and, as a result, the sem_addholder() may be delayed indefinitely.
+        The fix was to have sem_post() call sem_addholder() just before
+        restarting the thread waiting for the semaphore count.  This problem
+        was noted by Benix Vincent who also suggested the solution.
+      - Many files: Make sure that priority inheritance is not enabled for
+        semaphores whose primary use is signaling (vs locking of resources) by
+        calling sem_setprotocol().
+      - sched/semaphore:  sem_trywait() no longer modifies the errno value
+        UNLESS an error occurs.  This allows these functions to be used
+        internally without clobbering the errno value.  From Freddie Chopin.
+      - sched/clock: Correct clock initialization.  The correct range for the
+        month is 0-11 but is entered as 1-12 in the .config file.  Add ranges
+        to START_YEAR, MONTH, and DAY in sched/Kconfig.
+      - sched/clock:  Correct calculation for the case of Tickless mode with a
+        32-bit timer.  In that case, the calculation was returning millisecond
+        accuracy.  That is not good when the timer accuracy is < 1 msec.  From
+        Rajan Gill.
+      - Work Queue:  When queuing new LP work, don't signal any threads if
+        they are all busy.  From Heesub Shin.
+      - Work Queue: Signal sent from work_signal() may interrupt the low
+        priority worker thread that is already running. For example, the
+        worker thread that is waiting for a semaphore could be woken up by the
+        signal and break any synchronization assumption as a result. It also
+        does not make any sense to send signal if it is already running and
+        busy. This change fixes it.  From Heesub Shin.
+      - Fix DEBUGASSERT() in group_signal.c.  From Masayuki Ishikawa.
+      - Eliminate bad boardctl() commands:  Remove all references to
+        BOARDIOC_PWMSETUP and board_pwm_setup(). Remove all references to
+        BOARDIOC_ADCSETUP and board_adc_setup(). Remove
+        BOARDIOC_CAN_INITIALIZE.  CAN initialization is now done in the board
+        initialization logic just like every other device driver.
+      - pthreads:  Fix an error in pthread_mutex_destroy().  An error could
+        occur while destroying a mutex after a pthread has been canceled while
+        holding the mutex.
+      - task_restart: Make sure new task starts with pre-emption disabled and
+        not in a critical section.
+      - Enter/leave Critical Sections.  Major redeign to
+        enter/leave_critical_section logic to deal with the case where
+        interrupts are disabled only on the local CPU.  In this case, some
+        rather complex spinlocks must be used to maintain the critical section
+        accross all CPUs.
+      - SMP Critical Sections:  Fixes for the SMP case: (1) Change order for
+        SMP case in enter_critical_section:  (1) Disable local interrupts
+        BEFORE taking spinlock and (2) If SMP is enabled, if any interrupt
+        handler calls enter_critical_section(), it should take the spinlock.
+      - SMP wdogs:  Wdog timers use a tasking interface that to manipulate
+        wdogs, and a different interface in the timer interrupt handling logic
+        to manage wdog expirations.  In the single CPU case, this is fine.
+        Since the tasking level code calls enter_critical_section, interrupts
+        are disabled and no conflicts can occur.  But that may not be the case
+        in the SMP case.  Most architectures do not permit disabling
+        interrupts on other CPUs so enter_critical_section must work
+        differently:  Locks are required to protect code. this change adds
+        locking (via enter_critical section) to wdog expiration logic for the
+        the case if the SMP configuration.
+      - SMP vfork():  Fix a race condition in the SMP case.  Existing logic
+        depended on the fact that the child would not run until waitpid was
+        called because the child had the same priority as the parent.  BUT in
+        the SMP case that is not true... the child may run immediately on a
+        different CPU.
+      - SMP: This change adds a new internal interfaces and fixes a problem
+        with three APIs in the SMP configuration.  The new internal interface
+        is sched_cpu_pause(tcb).  This function will pause a CPU if the task
+        associated with 'tcb' is running on that CPU.  This allows a different
+        CPU to modify that OS data stuctures associated with the CPU.  When
+        the other CPU is resumed, those modifications can safely take place.
+        The three fixes are to handle cases in the SMP configuration where one
+        CPU does need to make modifications to TCB and data structures on a
+        task that could be running running on another CPU.  Those three cases
+        are task_delete(), task_restart(), and execution of signal handlers.
+        In all three cases the solutions is basically the same:  (1) Call
+        sched_cpu_pause(tcb) to pause the CPU on which the task is running,
+        (2) perform the necessary operations, then (3) call up_cpu_resume() to
+        restart the paused CPU.
+      - SMP: Add logic to avoid a deadlock condition when CPU1 is hung waiting
+        for g_cpu_irqlock with interrupts interrupts and CPU0 is waiting for
+        g_cpu_paused.
+      - SMP: Enforce this rule: Tasks which are normally restored when
+        sched_unlock() is called must remain pending (1) if we are in a
+        critical section, i.e., g_cpu_irqlock is locked , or (2) other CPUs
+        still have pre-emption disabled, i.e., g_cpu_schedlock is locked.  In
+        those cases, the release of the pending tasks must be deferred until
+        those conditions are met.
+
+    * File System/Block Drivers/MTD Drivers:
+
+      - AT24XX EEPROM MTD driver:  Added EEPROM timeout.  Fromo Aleksandr
+        Vyhovanec.
+      - fs/procfs:  Fix procfs status for SMP case.
+
+    * Graphics/Graphic Drivers:
+
+      - Fonts:  Correct some default font IDs.  From Pierre-Noel Bouteville.
+
+    * Common Drivers:
+
+      - usbhost/enumerate:  Fix possible buffer overwrite.  From Janne Rosberg.
+      - usbhost/composite:  Fix compile; missing semicolons.  From Jann Rosberg.
+      - syslog:  Fixes required for file syslog output.  From Max Kriegleder.
+      - SPI configuration:  Fix Kconfig warning.  This change moves the
+        ARCH_HAVE_SPI options outside the check for SPI.  Those options don't
+        depend on SPI, and Kconfig files  in arch/ enable them even if SPI
+        isn't  enabled.  Source the driver's Kconfig in drivers/Kconfig only
+        if support for the driver is enabled prevents us from defining these
+        ARCH_HAVE options in the driver's Kconfig. We should probably remove
+        the other checks in drivers/Kconfig and check if the drivers are
+        enabled only in their Kconfig.  From Paul A. Patience.
+      - drivers/timer:  Remove the timer driver TIOC_SETHANDLER IOCTL call.
+        This calls directly from the timer driver into application code.  That
+        is non-standard, non-portable, and cannot be supported.  Instead, add
+        timer driver hooks to support signal notification of timer
+        expiration.  Signal notification logic added by Sebastien Lorquet.
+      - All timer lower half drivers.  Port Sebastien's changes to all other
+        implementations of the timer lower half.
+      - USB MSC Device:  Fix length of mode6 sense reply packet.  From
+        Wolfgang Reinegger.
+      - USB Composite Host:  Fix end offset in usbhost_copyinterface().  From
+        Janne Rosberg.
+      - USB CDC/ACM Host:   Add CDC_SUBCLASS_ACM and CDC_PROTO_ATM to
+        supported class and proto.  From Janne Rosberg.
+      - SSD1306:  Fix errors in SPI mode configuration.  From Gong Darcy.
+      - CDC/ACM Device Class:  uart_ops_s portion of cdcacm will not be
+        initalized with correct functions if CONFIG_SERIAL_DMA is selected.
+
+    * Networking/Network Drivers:
+
+      - drivers/net/tun.c: Fix bug in TUN interface driver.  From  Max Nekludov.
+
+    * ARMv7-A:
+
+      - ARMv7-A SMP: Add SMP logic to signal handling.
+
+    * ARMv7-M:
+
+      - ARMv7-M: Fix double allocation of MPU region in mmu.h.
+
+    * ARMv7-R:
+
+      - ARMv7-R:  Fix compilation error.  This change fixes compilation errors
+        on MPU support for ARMv7-R.  From Heesub Shin.
+      - ARMv7-R: fix invalid drbar handling.  In ARMv7-R, [31:5] bits of DRBAR
+        is physical base address and other bits are reserved and SBZ. Thus,
+        there is no point in passing other than the base address.  From Heesub
+        Shin.
+      - ARMv7-R:  Remove the redundant update on SCTLR. mpu_control() is
+        invoking cp15_wrsctlr() around SCTLR update redundantly.  From Heesub
+        Shin.
+      - ARMv7-R: add new Kconfig entries for d/i-cache. Unlike in ARMv7-A/M,
+        Kconfig entries for data and instruction caches are currently missing
+        in ARMv7-R. This change adds those missing Kconfig entries. Actual
+        implmenetation for those functions will be added in the subsequent
+        patches.  From Heesub Shin.
+      - ARMv7-R: Add cache handling functions.  This change adds functions for
+        enabling and disabling d/i-caches which were missing for ARMv7-R.
+        From Heesub Shin.
+      - ARMv7-R: Fix typo in mpu support.  s/ARMV7M/ARMV7R/g. From Heesub Shin.
+      - ARMv7-R: Fix CPSR corruption after exception handling.  A sporadic
+        hang with consequent crash was observed when booting. It seemed to be
+        caused by the corrupted or wrong CPSR restored on return from
+        exception. NuttX restores the context using code like this:  msr spsr,
+        r1.  GCC translates this to:  msr spsr_fc, r1.  As a result, not all
+        SPSR fields are updated on exception return.  This should be: msr
+        spsr_fsxc, r1.  On some evaluation boards, spsr_svc may have totally
+        invalid value at power-on-reset. As it is not initialized at boot, the
+        code above may result in the corruption of cpsr and thus unexpected
+        behavior. From Heesub Shin.
+      - ARMv7-R: Fix to restore the Thumb flag in CPSR.  Thumb flag in CPSR is
+        not restored back when the context switch occurs while executing thumb
+        instruction.  From Heesub Shin.
+
+    * Atmel SAM3/4 Drivers:
+
+      - SAM3/4 UDP:  Add delay between setting and clearing the endpoint RESET
+        bit in sam_ep_resume().  We need to add a delay between setting and
+        clearing the endpoint reset bit in SAM_UDP_RSTEP. Without the delay
+        the USB controller will (may?) not reset the endpoint.  If the
+        endpoint is not being reset, the Data Toggle (DTGLE) bit will not to
+        be cleared which will cause the next transaction to fail if DTGLE is
+        1. If that happens the host will time-out and reset the bus.  Adding
+        this delay may also fix the USBMSC_STALL_RACEWAR in usbmsc_scsi.c,
+        however this has not been verified yet.  From Wolfgang Reinegger.
+      - SAM3/4: Remove unused 'halted' flag from UDP driver.  From Wolfgang
+        Reinegger.
+      - SAM3/4: Remove 'stalled' flag from the UDP driver.  This flag is not
+        necessary because the state of the endpoint can be determined using
+        'epstate' instead. From Wolfgang Reinegger.
+
+    * Atmel SAM3/4 Boards:
+
+      - SAM4S Xplained Pro: Configuration uses old, improper timer interface.
+        CONFIG_TIMER disabled in configuration.  Remove obsolete timer
+        initialization logic.
+
+    * Atmel SAMV7 Drivers:
+
+      - SAMv7 USBDEVHS:  A problem occurred with the SAMV7 USBDEVHS driver  if
+        the USB cable is unplugged while a large amount of data is send over
+        an IN endpoint using DMA. If the USB cable is plugged in again after a
+        few seconds it is not possible to send data over this IN endpoint
+        again, all other endpoints work as expected.  The problem occurs
+        because if the USB cable is unplugged while an DMA transfer is in
+        flight the transfer is canceled but the register SAM_USBHS_DEVDMACTRL
+        is left in an undefined state.  The problem was fixed the problem by
+        resetting the register SAM_USBHS_DEVDMACTRL to a known state.
+        Additionally all pending interrupts are cleared.  From Stefan Kolb.
+      - SAMV7 MCAN: Prevent Interrupt-Flooding of ACKE when not connected to
+        CAN-BUS. An Acknowledge-Error will occur every time no other CAN Node
+        acknowledges the message sent. This will also occur if the device is
+        not connected to the can-bus. The CAN-Standard declares, that the Chip
+        has to retry a given message as long as it is not sent successfully
+        (or it is not cancelled by the application). Every time the chip tries
+        to resend the message an Acknowledge-Error-Interrupt is generated. At
+        high baud rates this can lead in extremely high CPU load just for
+        handling the interrupts (and possibly the error handling in the
+        application). To prevent this Interrupt-Flooding we disable the ACKE
+        once it is seen as long we didn't transfer at least one message
+        successfully.  From Frank Benkert.
+      - SAMV7 MCAN:  Make delete_filter functions more robust.  From Frank
+        Benkert.
+
+    * Atmel SAMA5 Drivers:
+
+      - SAMA5 PWM:  Driver does not build when executing from SDRAM before
+        board frequencies are not constant.  Rather, the bootloader configures
+        the clocking and we must derive the clocking from the MCK left by the
+        bootloader.  This means lots more computations.  This is untested on
+        initial change because I don't have a good PWM test setup right now.
+
+    * Misoc LM32:
+
+      - Misoc LM32: Corrects a bug that never occured in qemu on simulation or
+        real fpga. The error was that the r1 register was being modified out
+        of context switching and not restoring it.  From Ramtin Amin
+
+    * NXP Freescale i.MX6:
+
+      - i.MX6 interrupt handling:  Additional logic needed to handle nested
+        interrupts when an interrupt stack is used.  Nesting can occur because
+        SGI interrupts are non-maskable.
+
+    * NXP Freescale LPC43xx Drivers:
+
+      - LPC43xx serial: Fix a typo in ioctl TIOCSRS485 ioctl.  From Vytautas
+        Lukenskas.
+      - LPC43xx serial:  Restore RS485 mode on serial port open (if RS485 is
+        enabled via menuconfig).  From Vytautas Lukenskas.
+      - LPC43xx SD/MMC:  Correct some definitions on SMMC control register in
+        lpc43_sdmmc.h.  From Alan Carvalho de Assis.
+      - LPC43xx SD card:  Correct pin configuration options needed for SD card
+        pins.  From Alan Carvalho de Assis.
+
+    * SiLabs EFM32:
+
+      - EFM32: Fix a compilation error.  From Pierre-noel Bouteville.
+
+    * STMicro STM32 Drivers:
+
+      - STM32 CHxN channels are always outputs.  From Sebastien Lorquet.
+      - STM32 DAC:  Fix shift value whenever there are is a DAC2 and, hence,
+        up to three interfaces.  From Marc Recht.
+      - STM32 F1:  Add TIM8 to STM32F103V pinmap.  From Maciej Wjcik.
+      - STM32 F1: Fix for F1 RTC Clock, tested on F103.  From Maciej Wjcik.
+      - STM32 F3:  STM32F303xB and STM32F303xC chips have 4 ADCs.  From Paul
+        A. Patience.
+      - STM32 F4:  A new implementation of the STM32 F4 I2C bottom half.  The
+        common I2C as this did not handled correctly in the current
+        implementation (see also https://github.com/PX4/NuttX/issues/54).  The
+        changes almost exclusively affect the ISR.  From Max Kriegleder.
+      - STM32 F4  OTGHS Host:  If STM32F446 increase number of channels to
+        16.  From Janne Rosberg.
+      - STM32 F4:  I think, that Size is (highest address+1 - Base address).
+        Base address has been removed and if address+count >= size we are
+        outside of the Flash.  From David Sidrane.
+      - STM32 F4:  Fix ADC compilation error when DMA isn't enabled. From Paul
+        A. Patience.
+      - STM32 F4:  STM32F427 was rebooting. Over reached family.  From David
+        Sidrane.
+      - STM32 F4:  Added STM32F469 RAM size and deliberated STM32F446 size.
+        From David Sidrane.
+      - STM32 F4:  Typo in stm32f76xxxx_pinmap.h edited online with
+        Bitbucket.  From David Sidrane.
+      - STM32 F7:  stm32_i2c.c Dejavu.  Fixes a bug previously found in the
+        F4. From David Sidrane.
+      - STM32 F7:  OTGDEV fixed typo.  From David Sidrane.
+      - STM32 F7:  Fix to SPI-Master driver.  Without this the chip select
+        decoding feature will not work properly.  From Michael Spahlinger.
+      - STM32 F7:  STM32F7 SD/MMC driver depends on CONFIG_SDIO_DMA which is
+        only defined in stm32/Kconfig.  Changed to CONFIG_STM32F7_SDMMC_DMA
+        and defined in stm32f7/Kconfig.
+      - STM32 F7:  Fix some STM32F7 copy paste errors.  From David Sidrane.
+      - STM32 L4:  Complementary PWM outputs on STM32L4"  (1) too many
+        parentheses when calculating max chan count and (2) channel 4 does not
+        have a complementary output. From Sebastien Lorquet.
+      - STM32 L4:  Fix I2C devices RCC registers.  From Sebastien Lorquet.
+      - STM32 L4:  Enable and renaming for 32l4 UARTs 4 and 5. From Sebastien
+        Lorquet.
+      - STM32 L4:  Change the way to configure quadrature encoder prescalers.
+        From Sebastien Lorquet.
+      - STM32 L4:  Correct USART1/2 definitions.  Use default mbed UART4
+        settings.  From Sebastien Lorquet.
+
+    * STMicro STM32 Boards:
+
+      - STM32F103 Minimum: Fix Timers 2 to 7 clock frequencies. From Alan
+        Carvalho de Assis.
+      - Nucleo-F303RE:  Remove duplicate setting from board.h.   From  Marc
+        Recht.
+      - Nucleo F303RE: Various fixes to get the ADC configuration building
+        again after PR.  Refresh all configurations.
+      - Nucleo L476RG: Add better selection of timer.
+
+    * TI Tiva Boards:
+
+      - DK-TM4C129x: Typo fix.  From Wolfgang Reinegger.
+
+    * Xtensa ESP32:
+
+      - ESP32 core v2:  Flush the UART TX buffer in the esp32 serial shutdown
+        routine. The ROM bootloader does not flush the FIFO before handing
+        over to user code, so some of this output is not currently seen when
+        the UART is reconfigured in early stages of startup.  From Angus
+        Gratton.
+      - Xtensa ESP32:  Corrects a problem with dispatching to signal
+        handlers:  Cannot vector directly to the signal handling function as
+        in other ABIs under the Xtensa Window ABI.  In that case, we need to
+        go through a tiny hook when performs the correct window call (call4)
+        otherwise registers will be scrambled in the signal handler.
+
+    * Xtensa ESP32 Boards:
+
+      - ESP32 core v2:  Changes the openocd config file's default flash
+        voltage from 1.8V to 3.3V. This is not necessary right now, but may
+        save some hard-to-debug moments down the track (3.3V-only flash
+        running at 1.8V often half-works and does weird things...).  From
+        Angus Gratton.
+
+    * C Library/Header Files:
+
+      - libc/stdio:  Fixes sscanf() %sn where strlen(data) < n.  From David
+        Sidrane.
+      - libc/stdio:  Include wchar.h in lib_libvsprintf.c to fix compilation
+        error.  From Alan Carvalho de Assis.
+      - include/sys/time.h: timersub macro modified per recommendations of
+        phreakuencies.
+      - include/ctype.h and cxx/cctype:  Implement ctype.h functions as inline
+        if possible.  cctype can then properly select namespace.
+      - include/: Fix a number of header files with mismatched 'extern C {'
+        and '}'.
+      - libc/unisted:  Change brings strtol() and related functions more
+        conformant with POSIX.  Corner cases like strtol(-2147483648, NULL,
+        10) now pass clang -fsanitize=integer without warnings.  From Juha
+        Niskanen.
+      - libc/unistd: sleep() was returning remaining nanoseconds (kind of),
+        instead the remaining seconds.  From Eunbong Song.
+      - termios.h:  Fix CRTSCTS define to include input and output flow. From
+        Lorenz Meier.
+
+    * Build/Configuration System:
+
+      - configs/*/defconfig: The buttons example was changed to archbuttons.
+        As a result all of the button configurations are broken and need some
+        renaming in the defconfig files.  Noted by Frank Berkert.
+      - config/*/defconfgs: More fallout from name change of
+        apps/examples/buttons to archbuttons.
+      - configs:  All QE encoder files.  Last change made timer hard-coded to
+        3. Make configurable.
+      - configs: Remove all traces of the no-longer existent ARCHBUTTONS
+        example.  Remove all button configurations that depended on the
+        obsoleted ARCHBUTTON example.
+      - minnsh Configurations:  Remove minnsh configurations and support
+        logic:  up_getc() and lowinstream.  This was an interesting exercise
+        to see just how small you could get NuttX, but otherwise it was not
+        useful:  (1) the NSH code violated the OS interface layer by callup
+        up_getc() and up_putc() directly, and (2) while waiting for character
+        input, NSH would call up_getc() which would hog all of the CPU.  Not a
+        reasonable solution other than as a proof of concept.
+
+    * Application Build/Configuration System:
+
+      - Make.defs:  Using wrong link script if native window tool used with
+        Cygwin.
+
+    * apps/platform:
+
+      - ESP32 Core v2 Platform: Fix some naming that prevented building the
+        C++ support.
+
+    * apps/nshlib:
+
+      - NSH Library:  nsh_getdirpath(), use snprint instead of sprintf to
+        avoid possibility of buffer overrun.  Noted by Chung Hwan Kim.
+
+    * apps/system:
+
+      - Remove std_readline().  This called up_getc() and up_putc() directly,
+        violating the POSIX OS interface.
+
+    * apps/netutils:
+
+      - FTPD: Fixed bug that didn't free ftpd ressources on exit.  From Pascal
+        Speck.
+      - NTP client: Fix missing left parenthesis.  From Pierre-Noel Bouteville.
+      - cJSON: Import patch to fix:cJSON_PrintUnformatted() behaves unexpected
+        if an empty array shall be printed to text. from Jerome Lang
+        2012-04-19. From Pierre-Noel Bouteville.
+      - esp8266 update cosmetic and many bug fix.  From Pierre-Noel Bouteville.
+      - FTPD:  Fix bug un ftpd file or socket may be not closed.  From
+        Pierre-Noel Bouteville.
+
+    * apps/modbus:
+
+      - Modbus Master is missing many files and doesn't compile at all. More
+        details in
+        https://groups.yahoo.com/neo/groups/nuttx/conversations/topics/13734.
+        From Vytautas Lukenskas.
+
+    * apps/examples:
+
+      - The examples/qencoder app was trying to init the encoder by a direct
+        call into the board, cheating in a local header to declare the
+        normally unavailable function prototype.  From Sebastien Lorquet.
+      - apps/examples/timer: Should detach signal handler before exiting.
+      - examples/qencode: The examples/qencoder app was trying to init the
+        encoder by a direct call into the board, cheating in a local header to
+        declare the normally unavailable function prototype.  From Sebastien
+        Lorquet.
+      - apps/examples/archbuttons:  Removed becaue it violates OS interface
+        principles.
+      - examples/adc, pwm, can: Remove all usage of BOARDIOC_ADCTEST_SETUP,
+        BIOARDIOC_PWMSETUP.  Remove BOARDIOC_CAN_INITIALIZE.  CAN
+        initialization is now done in the board initialization logic just like
+        every other device driver.
+      - examples/ostest: Add some delays to the pthread cancellation test.
+        With deferred cancellation enabled, things happen more asynchronously.
+
+NuttX-7.20 Release Notes
+------------------------
+
+The 120th release of NuttX, Version 7.20, was made on March 8, 2017,
+and is available for download from the Bitbucket.org website.  Note
+that release consists of two tarballs:  nuttx-7.20.tar.gz and
+apps-7.20.tar.gz.  These are available from:
+
+    https://bitbucket.org/nuttx/nuttx/downloads
+    https://bitbucket.org/nuttx/apps/downloads
+
+Both may be needed (see the top-level nuttx/README.txt file for build
+information).
+
+Additional new features and extended functionality:
+
+    * Core OS:
+
+      - Kernel Modules:  Module initializer may now return a symbol table.
+      - Modules:  Extend the module interface so that we can access symbols
+        exported by the module.
+      - Shared Libraries:  In the FLAT build mode, kernel modules may be
+        used to provide minimal shared library functionality.
+      - Modules/Shared Libraries:  Add support for dependencies between
+        modules.
+      - Module Library:  Add build a configuration logic for a shared module
+        library.
+      - Shared Libraries: Implement module based shared libraries for the
+        PROTECTED mode build.
+      - Interrupt handling:  irq_attach() now includes an argument of type
+        xcpt_t that retained with the handler address.  That argument is
+        then provided to the interrupt handler when the interrupt occurs.
+        The common parameter passing replaces the ad hoc parmater passing
+        implemented in current drivers.  From Mark Schulte.
+      - Adapt many drivers to utilize the IRQ argument feature.
+      - All functions that used to return an xcpt_t old handler value, now
+        return an int error code.  The oldhandler value is no longer useful
+        with the recent changes to the interrupt argument passing.  Some of
+        the functions effected include board_button_irq(), arch_phy_irq(),
+        STM32 EXTI functions (Alarm, COMP, PVD), GPIO interrupt logic like
+        kinetis_pinirq(), stm32_gpiosetevent(), and others.
+      - IRQ subsystem:  Add support for smaller interrupt tables as
+        described at
+        http://www.nuttx.org/doku.php?id=wiki:howtos:smallvectors .  This
+        is partially the work of Mark Schulte.
+
+    * File Systems/Block and MTD Drivers
+
+      - Pseudo File System:  Add support for soft links in the top-level
+        psuedo file system.
+      - Soft links:  Add an implementation of readlink().
+      - Add fstat() support.  Implement fstat() method in binfs, romfs,
+        unionfs, tmpfs, nxffs, nfx, hostfs, procfs, and smartfs.
+      - fstat:  Add fstat() support to FAT.  From Alan Carvalho de Assis.
+
+    * Graphics/Display Drivers:
+
+      - Fonts: Add support for Tom Thumb small mono-space font. From Alan
+        Carvalho de Assis.
+      - Graphics:  Separated of font cache from graphics/nxterm.  Now in
+        libnx/nxfronts where it can be shared with other grapics
+        applications.
+
+    * Networking/Network Drivers:
+
+      - Ethernet drivers:  Add framework for serialization in the case where
+        multiple low-priority work queues are used.
+
+    * Other Common Device Drivers:
+
+      - Add capabilities() method to SDIO interface.  Remove
+        CONFIG_SDIO_WIDTH_D1_ONLY.  That should not be a global propertie,
+        but rather a capability/limitation of single slot when there may be
+        multiple slots.
+      - Removed dmasupported() method from the SDIO interface.  That is now
+        a bit in the capability set.
+      - drivers/sensors: Add driver for the ST L3GD20 3 axis gyro.  From
+        raiden00.
+
+    * Atmel SAM3/4:
+
+      - SAM3/4: Add support for ATSAM4S4C.  From Wolfgang Reinegger.
+
+    * NXP Freescale i.MX6 Boards:
+
+      - Sabre 6quad:  Enable examples/smp test in i.MX6 SMP/NSH
+        configurations.
+
+    * NXP Freescale Kinetis:
+
+      - Kinetis:  Added support for CHIP_MK60FN1M0VLQ12 chip.  From Maciej
+        Skrzypek.
+      - Kinetis:  Add support for K64/K66 RTC lower half driver. From Neil
+        Hancock.
+      - Kinetis:  Extensive modification of MCG support based feature
+        configuration.  From David Sidrane.
+      - Kinetis:  Add support for K66 family.  From David Sidrane.
+      - Kinetis:  Created a kinetis SIM versioning scheme pulled in by
+        Kinetis chip.h.  From David Sidrane.
+      - Created a kinetis PMC versioning scheme pulled in by Kinetis
+        chip.h.  From David Sidrane.
+      - Kinetis: Extend clock configuration logic.  Refactor
+        implementation.  From David Sidrane.
+
+    * NXP Freescale Kinetis Drivers:
+
+      - Kinetis Ethernet:  Kinetis Support RMII clock source select.  This
+        defined the RMII clock source select bits and allows the selection
+        to be made via Kconfig. From David Sidrane.  Freedom-K66F uses
+        ENET_1588_CLKIN as RMII clock
+      - Kinetis Serial:  Added configurable 1|2 stop bits.
+        HAVE_SERIAL_CONSOLE -> HAVE_UART_CONSOLE to be consistent with
+        HAVE_LPUART_CONSOLE naming. From David Sidrane.
+      - Kinetis LPserial:  Add LPUART serial driver and Clock
+        configuartaion to freedom-k66f board.  From David Sidrane.
+      - Kinetis USB device:  Refactor clocking in kinetis_usbdev.  From
+        David Sidrane.
+
+    * NXP Freescale Kinetis Boards:
+
+      - Add support for NXP Freedom-k66f development board.  From David
+        Sidrane.
+      - Kinetis Freedom K66F:  Add Ethernet support.  From David Sidrane.
+      - Add twr-k64f120m config.  From Marc Recht.
+
+    * NXP Freescale LPC43xx Boards:
+
+      - Bamboo-200E: Add netnsh configuration.  From Alan Carvalho de Assis.
+      - Add usbnsh config to Bambino 200E board.  From Alan Carvalho de
+        Assis.
+
+    * STMicro STM32:
+
+      - STM32 F7: Allow board to configure HSE clock in bypass-mode. This
+        is needed to enable HSE with Nucleo-F746ZG board.  From Jussi
+        Kivilinna.
+      - STM32 F7: stm32_allocateheap: allow use DTCM memory for heap.
+        STM32F7 has up to 128KiB of DTCM memory that is currently left
+        unused.  This change adds DTCM to main heap if
+        CONFIG_STM32F7_DTCMEXCLUDE is not enabled.  From Jussi Kivilinna.
+      - Add basic support for the STM32F334.  From Mateusz Szafoni.
+      - STM32F33XX DAC, OPAMP, COMP, ADC, HRTIM headers.   From Mateusz
+        Szafoni.
+
+    * STMicro STM32 Drivers:
+
+      - STM32 F7 SDMMC:  Add support for single bit operation on SDMMC2.
+      - STM32 L4:  Port STM32L4 SAI driver from MDK.
+      - STM32 L4:  Bring power management logic from Motrola MDK into NuttX.
+      - STM32 L4:  Bring LPTIM driver in from the Motorola MDK.
+      - STM32 L4 COMP: Port from Motorola MDK.
+
+    * STMicro STM32 Boards:
+
+      - STM32F429i Discovery: Add support for NxWM on STM32F429i-Disco
+        board. From Alan Carvalho de Assis.
+      - STM32F103 Minimum: Add support for nRF24 on STM32F103-Minimum
+        board. From Alan Carvalho de Assis.
+      - Olimex STM32 P407: Add a NSH protected build configuration; Enable
+        procfs/ in all configurations.
+      - Olimex STM32 P407: Add support for on-board microSD slot.
+      - STM32F429i Discovery: add support for the L3GD20 driver.  From
+        raiden00.
+      - STM32F103 Minimum: Add support to QEncoder on STM32F103 Minimum
+        board.   From Alan Carvalho de Assis.
+      - Olimex STM32 P407:  Add external SRAM support.
+      - Add basic support for the Nucleo F334R8 board.  From Mateusz
+        Szafoni.
+      - STM32F103 Minimum: Add SDCard support over SPI on STM32F103-Minimum
+        board.  From Alan Carvalho de Assis.
+      - STM32F103 Minimum: Add support to USB Device on STM32F103-Minimum
+        board.  From Alan Carvalho de Assis.
+
+    * C Library/Header Files:
+
+      - compiler.h: packed_struct replaced by begin_packed_struct and
+        end_packed_struct. Now support IAR style packed structures.  From
+        Aleksandr Vyhovanec.
+      - Math library: Leverage optimized ARMv8-M functions from BSD license
+        ARM file.
+      - Shared libraries:  Add a non-standard dllfnc.h function to set the
+        symbol table.
+      - C Library: Add a support for setvbuf(). This is a collaborative
+        effort.  Alan Carvalho de Assis did the initial prototype.
+      - C Library: Add setbuf() which is a trivial wrapper around setvbuf().
+      - C library:  Add swab().
+      - C library: Add strtoimax and strtoumax.
+      - C library:  Add ffs(), rindex(), an index().  Add strings.h.  Move
+        strcasecmp, strncasecmp, bzero, bcmp, and bcopy to where they
+        belong in strings.h.h, not string.h.  bzero, bcmp, and bcopy are
+        legacy functions; the contemporary counterparts should be used
+        instead.
+      - C library: Add fstatfs().
+      - Update cwchar.  Add cwctype.
+
+    * Build/Configuration System:
+
+      - Add configuration support for builds with Ubuntu under Windows 10.
+
+    * Tools:
+
+      - tools/noteinfo.c: A hack tool that I use to analyze some sched_note
+        output.  Needs a home and may be useful to others.
+      - tools/mkconfig.c: Add logic to keep all of the buffering options in
+        sync.
+
+    * NSH: apps/nshlib:
+
+      - NSH: Add support for the 'ln' command.
+      - NSH ls command: if node is a symobolic link, use readlink() to get
+        and the display the target of the symblic link.
+      - NSH: Add readlink command.
+
+    * Applications: apps/examples:
+
+      - apps/examples/nxtext: Make line spacing configurable.
+      - apps/system/zmodem/host/nuttx/compiler.h synchronized with
+        nuttx/nuttx/include/nuttx/compiler.h.  From Aleksandr Vyhovanec.
+      - apps/examples/sotest:  Add a test for shared libraries.
+      - apps/examples/ostest:  Add a test of setvbuf().
+      - apps/examples/stat:  Add a simple test for stat(), fstat(),
+        statfs(), and fstatfs().
+
+Works-In-Progress:
+
+    * IEEE802.14.5/6LowPAN.  Hooks and framework for this effort were
+      introduced in NuttX-7.15.  Work has continued on this effort on
+      forks from the main repositories, albeit with many interruptions.
+      The completion of this wireless feature will postponed until at
+      least NuttX-7.21.
+
+Bugfixes.  Only the most critical bugfixes are listed here (see the
+ChangeLog for the complete list of bugfixes and for additional, more
+detailed bugfix information):
+
+    * Core OS:
+
+      - SMP: There were certain conditions that we must avoid by preventing
+        the release of the pending tasks while withn a critical section.
+        But this logic was incomplete; there was no logic to prevent other
+        CPUs from adding new, running tasks while on CPU is in a critical
+        section.  This commit corrects this.  This is matching logic in
+        sched_addreadytorun to avoid starting new tasks within the critical
+        section (unless the CPU is the holder of the lock).  The holder of
+        the IRQ lock must be permitted to do whatever it needs to do.
+      - SMP: Make checks for CPU lock set more robust.  There are certain
+        conditions early in initialization on during interrupt handling
+        where things need to be done a little differently.
+      - sched_cpulocked:  Avoid use of spinlock.  That has been reported to
+        cause a deadlock (2016-12-28).
+      - SMP: Fix a gap where we may try to make modifications to the task
+        lists without being in a critical sections.  That permits
+        concurrent access to the tasks lists and many subtle problems.
+        This fix just remains in the critical section throughout the
+        operation (and possible until the task is restore in the event of a
+        context switch).  Makes a big difference in stability.
+      - SMP: Fix an error in critical section logic when performing a
+        context switch from an interrupt handler.  The g_cpu_irqset bit was
+        not being set for the CPU so other CPUs did not know about the
+        critical section.
+      - SMP Signals: Fix some SMP signal delivery logic. Was not handling
+        some critical sections correctly and was missing logic to signal
+        tasks running on other CPUs.
+      - SMP:  Fix timer related issues:  Round robin and sporadic
+        scheduling were only being performed for tasks running on the CPU
+        that processes the system timer interrupt.  Similary, CPU load
+        measurements were only be processed for running on the CPU that
+        receives the sampling interrupt.
+      - sched_note: Fix spinlock instrumentation.  From Masayuki Ishikawa.
+      - In all implementations of _exit(), use enter_critical_section() vs.
+        disabling local interrupts.
+      - sigtimedwait:  When timer expires, up_unblock_task() is called.
+        This is okay in the single CPU case because interrupts are disable
+        in the timer interrupt handler.  But it is insufficient in the SMP
+        case.  enter_ and leave_critical_section() must be called in order
+        to manage spinlocks correctly.
+      - Fix a compile error: in sched_cpuload.c:Line136, the variables ts
+        and secs are not defined if CONFIG_CPULOAD_ONESHOT_ENTROPY = 0.
+        However, these variables are used regardless of
+        CONFIG_CPULOAD_ONESHOT_ENTROPY at lines~180:onwards.  From rg.
+      - CPU load: Correct computation of the nominal period to use when the
+        source is a oneshot timer.
+      - Cancellation points:  Fix some backward logic in conditional
+        compilation.
+      - Remove an unused variable when calling sigwaitinfo() and
+        sigtimedwait().  From Masayuki Ishikawa.
+
+    * File System/Block and MTD Drivers:
+
+      - procfs:  Correct to snprintf-related errors in fs_procfsproc.c.
+        Resolves issue #24.
+      - Add logic to VFS rename:  If target of rename exists and is a
+        directory, then the source file should be moved 'under' the target
+        directory. POSIX also requires that if the target is a file, then
+        that old file must be deleted.
+      - Fix open() a block device with
+        CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y. From Masayuki Ishikawa.
+      - File System: Don't build block driver proxy if PSEUDOFS_OPERATIONS
+        are disabled.
+      - sendfile():  Fix error introduced with commit
+        ff73be870e38959b0aaee5961dc47b4b58dc2d86.  Noted by Maciej Wjcik.
+
+    * Graphics/Graphic Drivers:
+
+      - NxWM configurations.  If using a 7-bit character set, then the
+        cursor character cannot be 137 (graphic block).  Use 95
+        (underscore) instead.
+      - NX server: Correct message queue names.  Should not be at /dev,
+        but rather relative to /var/mqueue.
+
+    * Common Drivers:
+
+      - MMCSD_SDIO: Only wait for card ejected if card detection is
+        supported. From Alan Carvalho de Assis.
+      - Typos withim mtd/ with Macronix MX25L.  In
+        NuttX/drivers/mtd/Make.defs letters X between M and 25 are
+        missing.  Noted by Oleg Evseev.
+      - USBMSC: Always set LUN readonly flag.  From Wolfgang Reinegger.
+      - drivers/lcd:  ssd1306_configspi() must have global scope.
+      - MMC/SD SDIO:  Some drivers need to start DMA before sending CMD24
+        and some AFTER.  From Alan Carvalho de Assis.
+      - drivers/tone.c:  Handle configuration with multiple PWM channels.
+        This resolves issue #30: Audio Tone Generator and PWM Multiple
+        Output Channel options.
+      - drivers/tone.c:  50% duty needs to be expressed a a fixed precision
+        number.
+      - drivers/spi/Kconfig:  There is too much SPI in the configuration
+        menu; SPI Driver Support menu is empty.  From Maciej Wjcik.
+      - option to enable Memory Card debug output was hidden with SD cards
+        connected through SPI.   From Maciej Wjcik.
+      - usbhost_cdcacm: fix tx outbuffer overflow and remove now invalid
+        assert.  From Janne Rosberg.
+
+    * Networking/Network Drivers:
+
+      - Networking: Fixed some issues that prevented IPv6 from working with
+        IPv4 enabled.  From Pascal Speck.
+      - Networking: fixed a nullptr-dereference on iob_clone.  From Pascal
+        Speck.
+      - Ethernet: Need two work structures (minimum) in all Ethernet
+        drivers so that pending poll work is not lost when an interrupt
+        occurs.
+
+    * ARMv7-R:
+
+      - I found an issue inside the cp15_coherent_dcache function:  The
+        "mcr CP15_BPIALLIS(r0)" should only be used with SMP
+        configurationa. In non-SMP configuration this instruction could
+        become undefined.  From Manohara HK.
+
+    * Atmel SAM3/4 Drivers:
+
+      - SAM3/4: GPIO bit numbering typo fixes.  From Wolfgang Reinegger.
+
+    * Atmel SAM3/4 Boards:
+
+      - Add missing sched_note_*() calls in sam4cm SMP functions.
+
+    * NXP/Freescale Kinetis:
+
+      - Kinetis: Fixed wrong MCG VDIV calculation on new NXP K60.  From
+        Maciej Skrzypek.
+      - Kinetis: Need to set HAVE_UART_DEVICE when UART4 is selected.  From
+        Maciej Skrzypek.
+      - Kinetis MCG: Wrong FRDIV set in MCG_C1.  From Maciej Skrzypek.
+
+    * NXP/Freescale Kinetis Drivers:
+
+      - Kinetis Serial: Fixed compile error when UART5 is selected.  From
+        Maciej Skrzypek.
+      - Kinetis SDHC - Enable clock after selected.  From David Sidrane.
+      - Kinetis:  Correct some SPI and I2C configuration issues.  From
+        David Sidrane.
+      - Kinetis Ethernet:  Add #define for number of loops for auto
+        negotiation to complete.  From Marc Recht.
+      - Kinetis Werial:  Fixed up_rxint - did not disable the RX
+        interuppts. There was an OR where and AND NOT was needed.  From
+        David Sidrane.
+
+    * NXP/Freescale LPC43xx:
+
+      - LPC43 pinset definitions:  Add more 1 bit to pinset to reach
+        SFSCLK0-SFSCLK3. Remove PINCONFIG_DIGITAL.  From Alan Carvalho de
+        Assis.
+
+    * NXP/Freescale LPC43xx Drivers:
+
+      - LPC43 serial:  Correct conditional logic that selects /dev/ttySN.
+        Problem noted by Alan Carvalho de Assis.
+
+    * NXP/Freescale i.MX6:
+
+      - i.MX6: Fix clearing GPT status register.  From Masayuki Ishikawa.
+
+    * STMicro STM32:
+
+      - STM32, STM32L4 Oneshot: Fix logic so that it can support multiple
+        oneshot timers.
+      - STM32 F7: Added missing ARCH_HAVE_RESET for F7.  From David Sidrane.
+      - STM32:  Add missing STM32_BKP_BASE.  From David Sidrane.
+      - STM32 and STM32F7: Fixes the BKP reference counter issue.  From
+        David Sidrane.
+
+    * STMicro STM32 Drivers:
+
+      - Fix for SAMv7 SPI: DLYBS value was calculated, but never written to
+        any registers. This led to incorrect timings on the bus.  From
+        Michael Spahlinger.
+      - STM32 QEncoder: Fix QEncoder driver, based on STM32L4 driver.  From
+        Alan Carvalho de Assis.
+      - STM32 QEncoder:  Enable clocking to the timer on QE setup; disable
+        clock on QE teardown.
+      - STM32 Ethernet: Need two work structures so that pending poll work
+        is not lost when an interrupt occurs.  This change has also been
+        ported to all all other effected Ethernet drivers.
+      - STM32 OTGHS host:  stm32_in_transfer() fails and returns NAK if a
+        short transfer is received.  This causes problems from class
+        drivers like CDC/ACM where short packets are expected.  In those
+        protocols, any transfer may be terminated by sending short or NUL
+        packet.  From Janne Rosberg.  Adapted Janne Rosberg's patch to
+        STM32 OTGHS host to OTGFS host, and to similar USB host
+        implementations for STM32 L4 and F7.
+
+    * STMicro STM32 Boards:
+
+      - STM32F4 Discovery: Fix issues with QEncoder support.  From Alan
+        Carvalho de Assis.
+
+    * C Library/Header Files:
+
+      - Add debug assertion in libdtoa to catch attempts to use floating
+        point output formats from within an interrupt handler.  That will
+        cause assertions or crashes downstream because __dtoa will attempt
+        to allocate memory.  From Pierre-noel Bouteville.
+      - libc: Fix ARMv7-A/R memcpy assembly.
+      - Fix return value if x is NaN.  From Aleksandr Vyhovanec.
+
+    * apps/nshlib:
+
+      - NSH: Eliminate a warning when all memory inspection commands are disabled.
+
+    * apps/graphics:
+
+      - apps/graphics/traveler/tools: Fix linkage issue. The -lm should
+        come after -o binname.  From Alan Carvalho de Assis.
+
+    * apps/netutils:
+
+      - The CONFIG_NETUTILS_HTTPD_PATH constant is used by httpd_mmap.c and
+        httpd_sendfile.c but It was not present in Kconfig menu.  From
+        Maciej Wjcik.
+
+    * apps/examples:
+
+      - Configurations that enable OSTEST must not disable signals.
+      - apps/examples/ostest:  Was ignoring
+        CONFIG_EXAMPLES_OSTEST_FPUTESTDISABLE.
+      - In apps/examples/mtdpart/mtdpart_main.c where
+        CONFIG_EXAMPLES_MTDPART_NPARTITIONS defining is checked should be
+        #ifndef instead of #ifdef.  Noted by Oleg Evseev.
diff --git a/TODO b/TODO
index b131d0205e52500f8192b35c3a4046186fa27dee..8ab2b48b50f3d3d42c1e06db1cc40abd99411c31 100644
--- a/TODO
+++ b/TODO
@@ -1,4 +1,4 @@
-NuttX TODO List (Last updated May 28, 2016)
+NuttX TODO List (Last updated March 7, 2017)
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
 This file summarizes known NuttX bugs, limitations, inconsistencies with
@@ -9,28 +9,30 @@ issues related to each board port.
 
 nuttx/:
 
- (13)  Task/Scheduler (sched/)
+ (10)  Task/Scheduler (sched/)
+  (1)  SMP
   (1)  Memory Management (mm/)
+  (0)  Power Management (drivers/pm)
   (3)  Signals (sched/signal, arch/)
   (2)  pthreads (sched/pthread)
   (0)  Message Queues (sched/mqueue)
-  (9)  Kernel/Protected Build
+  (8)  Kernel/Protected Build
   (3)  C++ Support
   (6)  Binary loaders (binfmt/)
- (12)  Network (net/, drivers/net)
+ (13)  Network (net/, drivers/net)
   (4)  USB (drivers/usbdev, drivers/usbhost)
   (0)  Other drivers (drivers/)
- (11)  Libraries (libc/, libm/)
- (11)  File system/Generic drivers (fs/, drivers/)
-  (8)  Graphics subsystem (graphics/)
-  (1)  Build system / Toolchains
+ (12)  Libraries (libc/, libm/)
+ (10)  File system/Generic drivers (fs/, drivers/)
+  (9)  Graphics Subsystem (graphics/)
+  (2)  Build system / Toolchains
   (3)  Linux/Cywgin simulation (arch/sim)
   (4)  ARM (arch/arm/)
 
 apps/ and other Add-Ons:
 
-  (3)  Network Utilities (apps/netutils/)
-  (2)  NuttShell (NSH) (apps/nshlib)
+  (2)  Network Utilities (apps/netutils/)
+  (1)  NuttShell (NSH) (apps/nshlib)
   (1)  System libraries apps/system (apps/system)
   (1)  Pascal add-on (pcode/)
   (4)  Other Applications & Tests (apps/examples/)
@@ -99,16 +101,37 @@ o Task/Scheduler (sched/)
   Status:      Open
   Priority:    Medium Low for now
 
-  Title:       ISSUES WITH atexit() AND on_exit()
+  Title:       ISSUES WITH atexit(), on_exit(), AND pthread_cleanup_pop()
   Description: These functions execute with the following bad properties:
 
                1. They run with interrupts disabled,
                2. They run in supervisor mode (if applicable), and
                3. They do not obey any setup of PIC or address
                   environments. Do they need to?
+               4. In the case of task_delete() and pthread_cancel(), these
+                  callbacks will run on the thread of execution and address
+                  context of the caller of task.  That is very bad!
 
                The fix for all of these issues it to have the callbacks
-               run on the caller's thread (as with signal handlers).
+               run on the caller's thread as is currently done with
+               signal handlers.  Signals are delivered differently in
+               PROTECTED and KERNEL modes:  The deliver is involes a
+               signal handling trampoline function in the user address
+               space and two signal handlers:  One to call the signal
+               handler trampoline in user mode (SYS_signal_handler) and
+               on in with the signal handler trampoline to return to
+               supervisor mode (SYS_signal_handler_return)
+
+               The primary difference is in the location of the signal
+               handling trampoline:
+
+               - In PROTECTED mode, there is on a single user space blob
+                 with a header at the beginning of the block (at a well-
+                 known location.  There is a pointer to the signal handler
+                 trampoline function in that header.
+               - In the KERNEL mode, a special process signal handler
+                 trampoline is used at a well-known location in every
+                 process address space (ARCH_DATA_RESERVE->ar_sigtramp).
   Status:      Open
   Priority:    Medium Low.  This is an important change to some less
                important interfaces.  For the average user, these
@@ -142,84 +165,11 @@ o Task/Scheduler (sched/)
                incompatibilities could show up in porting some code).
   Priority:    Low
 
-  Title:       REMOVE TASK_DELETE
-  Description: Need to remove or fix task delete.  This interface is non-
-               standard and not safe.  Arbitrary deleting tasks can cause
-               serious problems such as memory leaks.  Better to remove it
-               than to retain it as a latent bug.
-
-               Currently used within the OS and also part of the
-               implementation of pthread_cancel() and task_restart() (which
-               should also go for the same reasons).  It is used in
-               NxWM::CNxConsole to terminate console tasks and also in
-               apps/netutils/thttpd to kill CGI tasks that timeout.
-  Status:      Open
-  Priority:    Low and not easily removable.
-
-  Title:       RELEASE SEMAPHORES HELD BY CANCELED THREADS:
-  Description: Commit: fecb9040d0e54baf14b729e556a832febfe8229e: "In
-                case a thread is doing a blocking operation (e.g. read())
-                on a serial device, while it is being terminated by
-                pthread_cancel(), then uart_close() gets called, but
-                the semaphore (dev->recv.sem in the above example) is
-                still blocked.
-
-               "This means that once the serial device is opened next
-                time, data will arrive on the serial port (and driver
-                interrupts handled as normal), but the received characters
-                never arrive in the reader thread.
-
-                This patch addresses the problem by re-initializing the
-                semaphores on the last uart_close() on the device."
-
-               Yahoo! Groups message 7726: "I think that the system
-                should be required to handle pthread_cancel safely in
-                all cases.  In the NuttX model, a task is like a Unix
-                process and a pthread is like a Unix thread.  Canceling
-                threads should always be safe (or at least as unsafe) as
-                under Unix because the model is complete for pthreads...
-
-               "So, in my opinion, this is a generic system issue, not
-                specific to the serial driver.  I could also implement
-                logic to release all semaphores held by a thread when
-                it exits -- but only if priority inheritance is enabled;
-                because only in that case does the code have any memory
-                of which threads actually hold the semaphore.
-
-               "The patch I just incorporated is also insufficient.  It
-                works only if the serial driver is shut down when the
-                thread is canceled.  But what if there are other open
-                references to the driver?  Then the driver will not be
-                shut down, the semaphores will not be re-initialized, and
-                the semaphore counts will still be off by one.
-
-               "I think that the system needs to automatically release any
-                semaphores held by a thread being killed asynchronously?
-                It seems necessary to me."
-
-               UPDATE; The logic enabled when priority inheritance is
-               enabled for this purpose is insufficient.  It provides
-               hooks so that given a semaphore it can traverse all
-               holders.  What is needed would be logic so that given
-               a task, you can traverse all semaphores held by the task,
-               releasing each semaphore count held by the exiting task.
-               Nothing like this exists now so that solution is not
-               imminent.
-
-               UPDATE: The basic fix to release the semaphore count if
-               a thread is killed via pthread_cancel() or task_delete()
-               has been implemented (2014-12-13).  See the new file:
-               sched/semaphore/sem_recover.c  However, the general
-               issue of freeing semaphores when a thread exists still
-               exists.
-  Status:      Open
-  Priority:    Medium-ish
-
   Title:       SCALABILITY
   Description: Task control information is retained in simple lists.  This
                is completely appropriate for small embedded systems where
                the number of tasks, N, is relatively small.  Most list
-               operations are O(N).  This could become as issue if N gets
+               operations are O(N).  This could become an issue if N gets
                very large.
 
                In that case, these simple lists should be replaced with
@@ -235,6 +185,37 @@ o Task/Scheduler (sched/)
   Priority:    Low.  Things are just the way that we want them for the way
                that NuttX is used today.
 
+o SMP
+  ^^^
+
+  Title:       SMP AND DATA CACHES
+  Description: When spinlocks, semaphores, etc. are used in an SMP system with
+               a data cache, then there may be problems with cache coherency
+               in some CPU architectures:  When one CPU modifies the shared
+               object, the changes may not be visible to another CPU if it
+               does not share the data cache. That would cause failure in
+               the IPC logic.
+
+               Flushing the D-cache on writes and invalidating before a read is
+               not really an option.  That would essentially effect every memory
+               access and there may be side-effects due to cache line sizes
+               and alignment.
+
+               For the same reason a separate, non-cacheable memory region is
+               not an option.  Essentially all data would have to go in the
+               non-cached region and you would have no benefit from the data
+               cache.
+
+               On ARM Cortex-A, each CPU has a separate data cache.  However,
+               the MPCore's Snoop Controller Unit supports coherency among
+               the different caches.  The SCU is enabled by the SCU control
+               register and each CPU participates in the SMP coherency by
+               setting the ACTLR_SMP bit in the auxiliary control register
+               (ACTLR).
+
+  Status:      Closed
+  Priority:    High on platforms that may have the issue.
+
 o Memory Management (mm/)
   ^^^^^^^^^^^^^^^^^^^^^^^
 
@@ -306,7 +287,7 @@ o Memory Management (mm/)
 
                So in this case, NuttX work just link Linux or or *nix systems:
                All memory allocated by processes or threads in processes will
-               be recovered when the process exists.
+               be recovered when the process exits.
 
                But not for the flat memory build.  In that case, the issues
                above do apply.  There is no safe way to recover the memory in
@@ -319,16 +300,21 @@ o Memory Management (mm/)
                it is inherently unsafe, I would never incorporate anything
                like that into NuttX.
 
-  Status:      Open.  No changes are planned.
+  Status:      Open.  No changes are planned.  NOTE: This applies to the FLAT
+               and PROTECTED builds only.  There is no such leaking of memory
+               in the KERNEL build mode.
   Priority:    Medium/Low, a good feature to prevent memory leaks but would
                have negative impact on memory usage and code size.
 
+o Power Management (drivers/pm)
+  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
 o Signals (sched/signal, arch/)
   ^^^^^^^^^^^^^^^^^^^^^^^
 
   Title:       STANDARD SIGNALS
   Description: 'Standard' signals and signal actions are not supported.
-               (e.g., SIGINT, SIGSEGV, etc).
+               (e.g., SIGINT, SIGSEGV, etc).  Default is only SIG_IGN.
 
                Update:  SIGCHLD is supported if so configured.
   Status:      Open.  No further changes are planned.
@@ -362,29 +348,27 @@ o Signals (sched/signal, arch/)
 o pthreads (sched/pthreads)
   ^^^^^^^^^^^^^^^^^
 
-  Title:       CANCELLATION POINTS
-  Description: pthread_cancel():  Should implement cancellation points and
-               pthread_testcancel()
-  Status:      Open.  No changes are planned.
-  Priority:    Low, probably not that useful
-
   Title:       PTHREAD_PRIO_PROTECT
-  Description: Extended pthread_mutexattr_setprotocol() support PTHREAD_PRIO_PROTECT:
+  Description: Extend pthread_mutexattr_setprotocol().  It should support
+               PTHREAD_PRIO_PROTECT (and so should its non-standard counterpart
+               sem_setproto()).
+
                "When a thread owns one or more mutexes initialized with the
                PTHREAD_PRIO_PROTECT protocol, it shall execute at the higher of its
                priority  or  the  highest  of the priority ceilings of all the mutexes
                owned by this thread and initialized with this attribute, regardless of
                whether other threads are blocked on any of these mutexes or not.
 
-               "While  a  thread is holding a mutex which has been initialized with
+               "While a thread is holding a mutex which has been initialized with
                the PTHREAD_PRIO_INHERIT or PTHREAD_PRIO_PROTECT protocol attributes,
                it shall not be subject to being moved to the tail of the scheduling queue
                at its priority in the event that its original priority is changed,
                such as by a call to sched_setparam(). Likewise, when a thread unlocks
                a mutex that has been initialized with the PTHREAD_PRIO_INHERIT or
                PTHREAD_PRIO_PROTECT protocol attributes, it shall not be subject to
-               being moved to the tail of the scheduling queue at its priority in  the
+               being moved to the tail of the scheduling queue at its priority in the
                event that its original priority is changed."
+
   Status:      Open.  No changes planned.
   Priority:    Low -- about zero, probably not that useful. Priority inheritance is
                already supported and is a much better solution.  And it turns out
@@ -392,39 +376,77 @@ o pthreads (sched/pthreads)
                Excerpted from my post in a Linked-In discussion:
 
                "I started to implement this HLS/"PCP" semaphore in an RTOS that I
-               work with (http://www.nuttx.org) and I discovered after doing the
-               analysis and basic code framework that a complete solution for the
-               case of a counting semaphore is still quite complex -- essentially
-               as complex as is priority inheritance.
+                work with (http://www.nuttx.org) and I discovered after doing the
+                analysis and basic code framework that a complete solution for the
+                case of a counting semaphore is still quite complex -- essentially
+                as complex as is priority inheritance.
 
                "For example, suppose that a thread takes 3 different HLS semaphores
-               A, B, and C. Suppose that they are prioritized in that order with
-               A the lowest and C the highest. Suppose the thread takes 5 counts
-               from A, 3 counts from B, and 2 counts from C. What priority should
-               it run at? It would have to run at the priority of the highest
-               priority semaphore C. This means that the RTOS must maintain
-               internal information of the priority of every semaphore held by
-               the thread.
+                A, B, and C. Suppose that they are prioritized in that order with
+                A the lowest and C the highest. Suppose the thread takes 5 counts
+                from A, 3 counts from B, and 2 counts from C. What priority should
+                it run at? It would have to run at the priority of the highest
+                priority semaphore C. This means that the RTOS must maintain
+                internal information of the priority of every semaphore held by
+                the thread.
 
                "Now suppose it releases one count on semaphore B. How does the
-               RTOS know that it still holds 2 counts on B? With some complex
-               internal data structure. The RTOS would have to maintain internal
-               information about how many counts from each semaphore are held
-               by each thread.
+                RTOS know that it still holds 2 counts on B? With some complex
+                internal data structure. The RTOS would have to maintain internal
+                information about how many counts from each semaphore are held
+                by each thread.
 
                "How does the RTOS know that it should not decrement the priority
-               from the priority of C? Again, only with internal complexity. It
-               would have to know the priority of every semaphore held by
-               every thread.
+                from the priority of C? Again, only with internal complexity. It
+                would have to know the priority of every semaphore held by
+                every thread.
 
                "Providing the HLS capability on a simple pthread mutex would not
-               be such quite such a complex job if you allow only one mutex per
-               thread. However, the more general case seems almost as complex
-               as priority inheritance. I decided that the implementation does
-               not have value to me. I only wanted it for its reduced
-               complexity; in all other ways I believe that it is the inferior
-               solution. So I discarded a few hours of programming. Not a
-               big loss from the experience I gained."
+                be such quite such a complex job if you allow only one mutex per
+                thread. However, the more general case seems almost as complex
+                as priority inheritance. I decided that the implementation does
+                not have value to me. I only wanted it for its reduced
+                complexity; in all other ways I believe that it is the inferior
+                solution. So I discarded a few hours of programming. Not a
+                big loss from the experience I gained."
+
+  Title:       ISSUES WITH CANCELLATION POINTS
+  Description: According to POIX cancellation points must occur when a thread is executing
+               the following functions.  There are some execptions as noted:
+
+                accept()             mq_timedsend()           NA putpmsg()          sigtimedwait()
+             04 aio_suspend()     NA msgrcv()                    pwrite()        NA sigwait()
+             NA clock_nanosleep() NA msgsnd()                    read()             sigwaitinfo()
+                close()           NA msync()                  NA readv()         01 sleep()
+                connect()            nanosleep()                 recv()          02 system()
+             -- creat()              open()                      recvfrom()      NA tcdrain()
+                fcntl()              pause()                  NA recvmsg()       01 usleep()
+             NA fdatasync()          poll()                      select()        -- wait()
+                fsync()              pread()                     sem_timedwait()    waitid()
+             NA getmsg()          NA pselect()                   sem_wait()         waitpid()
+             NA getpmsg()            pthread_cond_timedwait()    send()             write()
+             NA lockf()              pthread_cond_wait()      NA sendmsg()       NA writev()
+                mq_receive()         pthread_join()              sendto()
+                mq_send()            pthread_testcancel()     03 sigpause()
+                mq_timedreceive() NA putmsg()                    sigsuspend()
+
+                  NA Not supported
+                  -- Doesn't need instrumentation.  Handled by lower level calls.
+                  nn See note nn
+
+               NOTE 01: sleep() and usleep() are user-space functions in the C library and cannot
+               serve as cancellation points.  They are, however, simple wrappers around nanosleep
+               which is a true cancellation point.
+               NOTE 02: system() is actually implemented in apps/ as part of NSH.  It cannot be
+               a cancellation point.
+               NOTE 03: sigpause() is a user-space function in the C library and cannot serve as
+               cancellation points.  It is, however, a simple wrapper around sigsuspend()
+               which is a true cancellation point.
+               NOTE 04: aio_suspend() is a user-space function in the C library and cannot serve as
+               cancellation points.  It does call around sigtimedwait() which is a true cancellation
+               point.
+  Status:      Not really open.  This is just the way it is.
+  Priority:    Nothing additional is planned.
 
 o Message Queues (sched/mqueue)
   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
@@ -447,6 +469,7 @@ o Kernel/Protected Build
                mkfatfs  mkfatfs
                mkrd     ramdisk_register()
                ping     icmp_ping()
+               mount    foreach_mountpoint()
 
                The busybox mkfatfs does not involve any OS calls; it does
                its job by simply opening the block driver (using open/xopen)
@@ -583,14 +606,6 @@ o Kernel/Protected Build
                improvement.  However, there is no strong motivation now do
                do that partitioning work.
 
-  Title:       TIMER INTERRUPT CALLBACK
-  Description: The timer upper half driver at drivers/timers/timer.c performs
-               interrupt level callbacks into applications.  This, of course,
-               will never work in anything but a non-secure, flat build.
-  Status:      Open
-  Priority:    Medium.  The driver is only usable with all of its features
-               in a FLAT build.
-
   Title:       USER MODE TASKS CAN MODIFY PRIVILEGED TASKS
   Description: Certain interfaces, such as sched_setparam(),
                sched_setscheduler(), etc. can be used by user mode tasks to
@@ -818,7 +833,7 @@ o Binary loaders (binfmt/)
                "Read-Only Data in RAM" at
                http://nuttx.org/Documentation/NuttXNxFlat.html#limitations).
 
-               The newer 4.6.3compiler generated PC relative relocations to the strings:
+               The newer 4.6.3 compiler generated PC relative relocations to the strings:
 
                .L2:
                   .word   .LC0-(.LPIC0+4)
@@ -919,40 +934,18 @@ o Network (net/, drivers/net)
   Priority:    Medium.  Important on slow applications that will not accept
                connections promptly.
 
-  Title:       INTERRUPT LEVEL PROCESSING IN ETHERNET DRIVERS
-  Description: Too many Ethernet drivers do interrupt-level processing with
-               the network stack.  The network stack supports either interrupt
-               level processing or normal task level processing (depending on
-               CONFIG_NET_NOINTS).  This is really a very bad use of CPU
-               resources;  All of the network stack processing should be
-               modified to use a work queue (and, all use of CONFIG_NET_NOINTS=n
-               should be eliminated).  This applies to almost all Ethernet
-               drivers:
-
-               ARCHITECTURE   CONFIG_NET_NOINTS?      ADDRESS FILTER SUPPORT?
-               C5471          NO                      NO
-               STM32          YES                     YES
-               STM32F7        YES                     YES
-               TIVA           ----------------------- ------
-                 LM3S         NO                      NO
-                 TM4C         YES                     YES
-               eZ80           NO                      NO
-               LPC17xx        YES                     YES (not tested)
-               DMxxx NIC      NO                      NO
-               PIC32          NO                      NO
-               RGMP           ???                     ???
-               SAM3/4         YES                     YES
-               SAMA5D         ----------------------- ------
-                 EMACA        NO                      YES (not tested)
-                 EMACB        YES                     YES
-                 GMAC         NO                      YES (not tested)
-               SAMV7          YES                     YES
-               SIM            N/A  (No interrupts)    NO
-
-               The general outline of how this might be done is included in
-               drivers/net/skeleton.c
-  Status:      Open
-  Priority:    Pretty high if you want a well behaved system.
+  Title:       IPv6 REQUIRES ADDRESS FILTER SUPPORT
+  Description: IPv6 requires that the Ethernet driver support NuttX address
+               filter interfaces.  Several Ethernet drivers do support there,
+               however.  Others support the address filtering interfaces but
+               have never been verifed:
+
+               C5471, LM3X, ez80, DM0x90 NIC, PIC: Do not support address
+                 filteringing.
+               Kinetis, LPC17xx, LPC43xx:  Untested address filter support
+
+  Status:      Open
+  Priority:    Pretty high if you want a to use IPv6 on these platforms.
 
   Title:       UDP MULTICAST RECEPTION
   Description: The logic in udp_input() expects either a single receive socket or
@@ -1030,6 +1023,48 @@ o Network (net/, drivers/net)
   Status:      Open
   Priority:    Low
 
+  Title:       REMOVE CONFIG_NET_MULTIBUFFER
+  Description: The CONFIG_NET_MULTIBUFFER controls some details in the layout
+               of the network device structure. This is really a unnecessary
+               complexity and should be removed.  The cost for those network
+               drivers that currently do not support CONFIG_NET_MULTIBUFFER
+               is the size of one pointer.
+  Status:      Open
+  Priority:    Low
+
+  Title:       ETHERNET WITH MULTIPLE LPWORK THREADS
+  Description: Recently, Ethernet drivers were modified to support multiple
+               work queue structures.  The question was raised: "My only
+               reservation would be, how would this interact in the case of having CONFIG_STM32_ETHMAC_LPWORK and CONFIG_SCHED_LPNTHREADS
+               > 1? Can it be guaranteed that one work item won't be
+               interrupted and execution switched to another? I think so but
+               am not 100% confident."
+
+               I suspect that you right.  There are probably vulnerabilities
+               in the CONFIG_STM32_ETHMAC_LPWORK with CONFIG_SCHED_LPNTHREADS
+               > 1 case.  But that really doesn't depend entirely upon the
+               change to add more work queue structures.  Certainly with only
+               work queue structure you would have concurrent Ethernet
+               operations in that multiple LP threads; just because the work
+               structure is available, does not mean that there is not dequeued
+               work in progress.  The multiple structures probably widens the
+               window for that concurrency, but does not create it.
+
+               The current Ethernet designs depend upon a single work queue to
+               serialize data.  In the case of muliple LP threads, some
+               additional mechanism would have to be added to enforce that
+               serialization.
+
+               NOTE:  Most drivers will call net_lock() and net_unlock() around
+               the critical portions of the driver work.  In that case, all work
+               will be properly serialized.  This issue only applies to drivers
+               that may perform operations that require protection outside of
+               the net_lock'ed region.  Sometimes, this may require extending
+               the netlock() to be beginning of the driver work function.
+
+  Status:      Open
+  Priority:    High if you happen to be using Ethernet in this configuration.
+
 o USB (drivers/usbdev, drivers/usbhost)
   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
@@ -1161,7 +1196,7 @@ o USB (drivers/usbdev, drivers/usbhost)
                from being usable:
 
               - The driver works fine when configured for reduced or bulk-
-                only protocol.
+                only protocol on the Olimex LPC1766STK.
 
               - Testing has not been performed with the interrupt IN channel
                 enabled (ie., I have not enabled FLOW control nor do I have
@@ -1186,6 +1221,32 @@ o USB (drivers/usbdev, drivers/usbhost)
                 Apparently the host driver is trashing memory on receipt
                 of data.
 
+                UPDATE:  This behavior needs to be retested with:
+                  commit ce2845c5c3c257d081f624857949a6afd4a4668a
+                  Author: Janne Rosberg 
+                  Date:   Tue Mar 7 06:58:32 2017 -0600
+
+                    usbhost_cdcacm: fix tx outbuffer overflow and remove now
+                    invalid assert
+
+                  commit 3331e9c49aaaa6dcc3aefa6a9e2c80422ffedcd3
+                  Author: Janne Rosberg 
+                  Date:   Tue Mar 7 06:57:06 2017 -0600
+
+                    STM32 OTGHS host:  stm32_in_transfer() fails and returns NAK
+                    if a short transfer is received.  This causes problems from
+                    class drivers like CDC/ACM where short packets are expected.
+                    In those protocols, any transfer may be terminated by sending
+                    short or NUL packet.
+
+                  commit 0631c1aafa76dbaa41b4c37e18db98be47b60481
+                  Author: Gregory Nutt 
+                  Date:   Tue Mar 7 07:17:24 2017 -0600
+
+                    STM32 OTGFS, STM32 L4 and F7: Adapt Janne Rosberg's patch to
+                    STM32 OTGHS host to OTGFS host, and to similar implements for
+                    L4 and F7.
+
               - The SAMA5D EHCI and the LPC31 EHCI drivers both take semaphores
                 in the cancel method.  The current CDC/ACM class driver calls
                 the cancel() method from an interrupt handler.  This will
@@ -1199,15 +1260,18 @@ o USB (drivers/usbdev, drivers/usbhost)
                configurations if you use it.
 
                That all being said, I know of know no issues with the current
-               CDC/ACM driver if the interrupt IN endpoint is not used, i.e.,
-               in "reduced" mode.  The only loss of functionality is output
-               flow control.
+               CDC/ACM driver on the Olimex LPC1766STK platform if the interrupt
+               IN endpoint is not used, i.e., in "reduced" mode.  The only loss
+               of functionality is output flow control.
+
+               UPDATE: The CDC/ACM class driver may also now be functional on
+               the STM32.  That needs to be verified.
 
   Status:      Open
   Priority:    Medium-Low unless you really need host CDC/ACM support.
 
-o Libraries (libc/)
-  ^^^^^^^^^^^^^^^^^
+o Libraries (libc/, libm/)
+  ^^^^^^^^^^^^^^^^^^^^^^^^
 
   Title:       SIGNED time_t
   Description: The NuttX time_t is type uint32_t. I think this is consistent
@@ -1291,8 +1355,8 @@ o Libraries (libc/)
   Priority:    ??
 
   Title:       FLOATING POINT FORMATS
-  Description: Only the %f floating point format is supported.  Others are accepted
-               but treated like %f.
+  Description: Only the %f floating point format is supported.  Others are
+               accepted but treated like %f.
   Status:      Open
   Priority:    Medium (this might important to someone).
 
@@ -1337,24 +1401,80 @@ o Libraries (libc/)
 
                UPDATE: 2015-09-01: A fix for the noted problems with asin()
                has been applied.
+               2016-07-30: Numerous fixes and performance improvements from
+               David Alessio.
 
-Status:        Open
-Priority:      Low for casual users but clearly high if you need care about
+  Status:      Open
+  Priority:    Low for casual users but clearly high if you need care about
                these incorrect corner case behaviors in the math libraries.
 
+  Title:       REPARTITION LIBC FUNCTIONALITY
+  Description: There are many things implemented within the kernel (for example
+               under sched/pthread) that probably should be migrated in the
+               C library where it belongs.
+
+               I would really like to see a little flavor of a micro-kernel
+               at the OS interface:  I would like to see more primitive OS
+               system calls with more higher level logic in the C library.
+
+               One awkward thing is the incompatibility of KERNEL vs FLAT
+               builds:  In the kernel build, it would be nice to move many
+               of the thread-specific data items out of the TCB and into
+               the process address environment where they belong.  It is
+               difficult to make this compatible with the FLAT build,
+               however.
+  Status:      Open
+  Priority:    Low
+
 o File system / Generic drivers (fs/, drivers/)
   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
   NOTE:  The NXFFS file system has its own TODO list at nuttx/fs/nxffs/README.txt
 
-  Title:       CHMOD(), TRUNCATE(), AND FSTAT()
-  Description: Implement chmod(), truncate(), and fstat().
-  Status:      Open
-  Priority:    Low
+  Title:       MISSING FILE SYSTEM FEATURES
+  Description: Implement missing file system features:
+
+               chmod() is probably not relevant since file modes are not
+                 currently supported.
+
+                 File privileges would also be good to support.  But this is
+                 really a small part of a much larger feature.  NuttX has no
+                 user IDs, there are no groups, there are no privileges
+                 associated with either.  User's don't need credentials.
+                 This is really a system wide issues of which chmod is only
+                 a small part.
+
+                 User privileges never seemed important to me since NuttX is
+                 intended for deeply embedded environments where there are
+                 not multiple users with varying levels of trust.
+
+               truncate - The standard way of setting a fixed file size.
+                 Often used with random access, data base files.  There is no
+                 simple way of doing that now (other than just writing data
+                 to the file).
+
+               link, unlink, softlink, readlink - For symbolic links.  Only
+                 the ROMFS file system currently supports hard and soft links,
+                 so this is not too important.
+
+               File locking
+
+               Special files - NuttX support special files only in the top-
+                 level pseudo file system.  Unix systems support many
+                 different special files via mknod().  This would be
+                 important only if it is an objective of NuttX to become a
+                 true Unix OS.  Again only supported by ROMFS.
+
+               True inodes - Standard Unix inodes.  Currently only supported
+                 by ROMFs.
+
+               The primary obstacle to all these is that each would require
+               changes to all existing file systems.  That number is pretty
+               large.  The number of file system implementations that would
+               need to be reviewed and modified  As of this writing this
+               would include binfs, fat, hostfs, nfs, nxffs, procfs, romfs,
+               tmpfs, unionfs, plus pseduo-file system support.
 
-  Title:       CAN POLL SUPPORT
-  Description: At present, the CAN driver does not support the poll() method.
-               See drivers/can.c
   Status:      Open
   Priority:    Low
 
@@ -1403,6 +1523,15 @@ o File system / Generic drivers (fs/, drivers/)
                socket structures.  There really should be one array that
                is a union of file and socket descriptors.  Then socket and
                file descriptors could lie in the same range.
+
+               Another example of how the current implementation limits
+               functionality:  I recently started to implement of the FILEMAX
+               (using pctl() instead sysctl()).  My objective was to be able
+               to control the number of available file descriptors on a task-
+               by-task basis.  The complexity due to the partitioning of
+               desciptor space in a range for file descriptors and a range
+               for socket descriptors made this feature nearly impossible to
+               implement.
   Status:      Open
   Priority:    Low
 
@@ -1428,15 +1557,6 @@ o File system / Generic drivers (fs/, drivers/)
   Status:      Open
   Priority:    Low
 
-  Title:       FAT LONG FILENAME COMPATIBILITY
-  Description: Recently there have been reports that file with long file
-               names created by NuttX don't have long file names when viewed
-               on Windows.  The long file name support has been around for a
-               long time and I don't ever having seen this before so I am
-               suspecting that some evil has crept in.
-  Status:      Open
-  Priority:    Medium
-
   Title:       MISSING FILES IN NSH 'LS' OF A DIRECTORY
   Description: I have seen cases where (1) long file names are enabled,
                but (2) a short file name is created like:
@@ -1494,7 +1614,7 @@ o File system / Generic drivers (fs/, drivers/)
                   ignored by readder() logic.  This the file does not
                   appear in the 'ls'.
 
-o Graphics subsystem (graphics/)
+o Graphics Subsystem (graphics/)
   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
   See also the NxWidgets TODO list file for related issues.
@@ -1537,18 +1657,6 @@ o Graphics subsystem (graphics/)
   Status:      Open
   Priority:    Medium low
 
-  Title:       IMPROVED NxTERM FONT CACHING
-  Description: Now each NxTerm instance has its own private font cache
-               whose size is determined by CONFIG_NXTERM_MXCHARS.  If there
-               are multiple NxTerm instances using the same font, each will
-               have a separate font cache.  This is inefficient and wasteful
-               of memory:  Each NxTerm instance should share a common font
-               cache.
-  Status:      Open
-  Priority:    Medium.  Not important for day-to-day testing but would be
-               a critical improvement if NxTerm were to be used in a
-               product.
-
   Title:       NxTERM VT100 SUPPORT
   Description: If the NxTerm will be used with the Emacs-like command line
                editor (CLE), then it will need to support VT100 cursor control
@@ -1585,6 +1693,37 @@ o Graphics subsystem (graphics/)
   Priority:    Low, not a serious issue but worth noting.  There is no plan
                to change this behavior.
 
+  Title:       REMOVE SINGLE USER MODE
+  Description: NX graphics supports two modes:  A simple single user mode and
+               more complex multi-user mode selected with CONFIG_NX_MULTIUSER=y.
+               In this configuration, an application can start the NX server
+               with boardctrl(BOARDIOC_NX_START);  After that, all graphic
+               interactions are via a thin layer in libnx/.   The OS
+               interface is only via messages sent and received using POSIX
+               message queues.  So this is good code and respects all of the
+               POSIX interfacing rules.  Hence, it works well in all build
+               modes (FLAT, PROTECTED, and KERNEL builds).
+
+               But without CONFIG_NX_MULTIUSER, the single user applications
+               violate all of the rules and calls internal NX functions
+               directly.  This includes all calls to internal OSfunctions
+               with names like, nx_open, up_fbinitialize, board_lcd_*, and
+               others.  This is a violation of interfacing standard in all
+               cases and can only be made to work in the FLAT build mode.
+
+               The single user mode does have some desirable properties:  It
+               is lighter weight and so more suitable for very resource limited
+               platforms.  But I think that in the long run the only reasonable
+               solution is to eliminate the single user mode and provide only
+               the multi-user mode with the message queue interface.
+  Status:      Open
+  Priority:    Low-Medium, not a serious issue but worth noting.  Single user
+               mode is a blemish on the OS and not compatible with the RTOS
+               roadmap.  But neither is there any critical necessity to
+               remove the offending code immediately.  Be aware:  If you use
+               the single user mode, it will be yanked out from under your
+               feet in the not-so-distant future.
+
 o Build system
   ^^^^^^^^^^^^
 
@@ -1601,6 +1740,19 @@ o Build system
   Status:      Open
   Priority:    Low.
 
+  Title:       NATIVE WINDOWS BUILD BROKEN
+  Description: The way that apps/ now generates Kmenu files depends on changes added
+               to apps/tools/mkkconfig.sh.  Similar changes need to be made to
+               apps/tools/mkkconfig.bat to restore the Windows Native build.
+               UPDATE: The mkkconfig.bat script has been updated and appears to work.
+               A native build has still not been attempted and there could likely be
+               issues the carriage returns in Kconfig files.  There are also some
+               issues the interpreters/ficl and bas directories during 'make menuconfig'
+               that still need to be investigated.
+  Status:      Open
+  Priority:    Low, since I am not aware of anyone using the Windows Native build.
+               But, of course, very high if you want to use it.
+
 o Other drivers (drivers/)
   ^^^^^^^^^^^^^^^^^^^^^^^^
 
@@ -1716,7 +1868,7 @@ o ARM (arch/arm/)
                upon return. This could be improved as well:  If there is no
                context switch, then the static registers need not be restored
                because they will not be modified by the called C code.
-               (see arch/sh/src/sh1/sh1_vector.S for example)
+               (see arch/renesas/src/sh1/sh1_vector.S for example)
   Status:      Open
   Priority:    Low
 
@@ -1787,19 +1939,13 @@ o Network Utilities (apps/netutils/)
   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
   Title:       UNVERIFIED THTTPD FEATURES
-  Description: Not all THTTPD features/options have been verified.  In particular, there is no
-               test case of a CGI program receiving POST input.  Only the configuration of
-               apps/examples/thttpd has been tested.
+  Description: Not all THTTPD features/options have been verified.  In
+               particular, there is no test case of a CGI program receiving
+               POST input.  Only the configuration of apps/examples/thttpd
+               has been tested.
   Status:      Open
   Priority:    Medium
 
-  Title:       THTTPD WARNINGS
-  Description: If the network is enabled, but THTTPD is not configured, it spews out lots
-               of pointless warnings.  This is kind of annoying and unprofessional; needs to
-               be fixed someday.
-  Status:      Open.  An annoyance, but not a real problem.
-  Priority:    Low
-
   Title:       NETWORK MONITOR NOT GENERALLY AVAILABLE
   Description: The NSH network management logic has general applicability
                but is currently useful only because it is embedded in the NSH
@@ -1819,11 +1965,6 @@ o NuttShell (NSH) (apps/nshlib)
   Status:      Open
   Priority:    Low
 
-  Title:       ARPPING COMMAND
-  Description: Add an arping command
-  Status:      Open
-  Priority:    Low (enhancement)
-
 o System libraries apps/system (apps/system)
   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
@@ -1879,7 +2020,12 @@ o Other Applications & Tests (apps/examples/)
                it stops rendering.  This is not a problem for the examples/nx
                code because it uses so few fonts, but if the logic were
                leveraged for more general purposes, it would be a problem.
+
                Update: see examples/nxtext for some improved font cache handling.
+               Update: The NXTERM font cache has been generalized and is now
+               offered as the standard, common font cache for all applications.
+               both the nx and nxtext examples should be modified to use this
+               common font cache.  See interfaces defined in nxfonts.h.
   Status:      Open
   Priority:    Low.  This is not really a problem because examples/nx works
                fine with its bogus font caching.
@@ -1893,3 +2039,4 @@ o Other Applications & Tests (apps/examples/)
                the artifact is larger.
   Status:      Open
   Priority:    Medium.
+
diff --git a/arch/Kconfig b/arch/Kconfig
index fd61f2fbf55f96b6af107d6dc625c9454d389d94..6fac6fd310b679ec458384978ddab7e298c78faf 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -39,25 +39,34 @@ config ARCH_MIPS
 	---help---
 		MIPS architectures (PIC32)
 
-config ARCH_RGMP
-	bool "RGMP"
+config ARCH_MISOC
+	bool "MISOC"
+	select ARCH_HAVE_INTERRUPTSTACK
+	select ARCH_HAVE_CUSTOMOPT
 	---help---
-		RTOS and GPOS on Multi-Processor (RGMP) architecture.  See
-		http://rgmp.sourceforge.net/wiki/index.php/Main_Page.
+		MISOC
 
-config ARCH_SH
+config ARCH_RENESAS
 	bool "Renesas"
 	select ARCH_NOINTC
 	select ARCH_HAVE_INTERRUPTSTACK
 	---help---
 		Renesas architectures (SH and M16C).
 
+config ARCH_RISCV
+	bool "RISC-V"
+	select ARCH_HAVE_INTERRUPTSTACK
+	select ARCH_HAVE_CUSTOMOPT
+	---help---
+		RISC-V 32 and 64-bit RV32 / RV64 architectures.
+
 config ARCH_SIM
 	bool "Simulation"
 	select ARCH_HAVE_MULTICPU
 	select ARCH_HAVE_TLS
 	select ARCH_HAVE_TICKLESS
 	select ARCH_HAVE_POWEROFF
+	select SERIAL_CONSOLE
 	---help---
 		Linux/Cywgin user-mode simulation.
 
@@ -66,6 +75,13 @@ config ARCH_X86
 	---help---
 		Intel x86 architectures.
 
+config ARCH_XTENSA
+	bool "Xtensa"
+	select ARCH_HAVE_STACKCHECK
+	select ARCH_HAVE_CUSTOMOPT
+	---help---
+		Cadence® Tensilica® Xtensa® actictures.
+
 config ARCH_Z16
 	bool "ZNEO"
 	select ARCH_HAVE_HEAP2
@@ -82,25 +98,29 @@ endchoice
 
 config ARCH
 	string
-	default "arm"	if ARCH_ARM
-	default "avr"	if ARCH_AVR
-	default "hc"	if ARCH_HC
-	default "mips"	if ARCH_MIPS
-	default "rgmp"	if ARCH_RGMP
-	default "sh"	if ARCH_SH
-	default "sim"	if ARCH_SIM
-	default "x86"	if ARCH_X86
-	default "z16"	if ARCH_Z16
-	default "z80"	if ARCH_Z80
+	default "arm"     if ARCH_ARM
+	default "avr"     if ARCH_AVR
+	default "hc"      if ARCH_HC
+	default "mips"    if ARCH_MIPS
+	default "misoc"   if ARCH_MISOC
+	default "renesas" if ARCH_RENESAS
+	default "risc-v"  if ARCH_RISCV
+	default "sim"     if ARCH_SIM
+	default "x86"     if ARCH_X86
+	default "xtensa"  if ARCH_XTENSA
+	default "z16"     if ARCH_Z16
+	default "z80"     if ARCH_Z80
 
 source arch/arm/Kconfig
 source arch/avr/Kconfig
 source arch/hc/Kconfig
 source arch/mips/Kconfig
-source arch/rgmp/Kconfig
-source arch/sh/Kconfig
+source arch/misoc/Kconfig
+source arch/renesas/Kconfig
+source arch/risc-v/Kconfig
 source arch/sim/Kconfig
 source arch/x86/Kconfig
+source arch/xtensa/Kconfig
 source arch/z16/Kconfig
 source arch/z80/Kconfig
 
@@ -525,6 +545,7 @@ config ARCH_IRQPRIO
 config ARCH_STACKDUMP
 	bool "Dump stack on assertions"
 	default n
+	select DEBUG_ALERT
 	---help---
 		Enable to do stack dumps after assertions
 
@@ -538,6 +559,7 @@ config ARCH_USBDUMP
 config ENDIAN_BIG
 	bool "Big Endian Architecture"
 	default n
+	depends on !ARCH_RISCV
 	---help---
 		Select if architecture operates using big-endian byte ordering.
 
@@ -599,6 +621,44 @@ config ARCH_RAMVECTORS
 		If ARCH_RAMVECTORS is defined, then the architecture will support
 		modifiable vectors in a RAM-based vector table.
 
+config ARCH_MINIMAL_VECTORTABLE
+	bool "Minimal RAM usage for vector table"
+	default n
+	---help---
+		Use a minimum amount of RAM for the vector table.
+
+		Instead of allowing irq_attach() to work for all interrupt vectors,
+		restrict to only working for a select few (defined in your board
+		configuration). This can dramatically reduce the amount of RAM used
+		be your vector table.
+
+		To use this setting, you must have a file in your board config that
+		provides:
+
+		  #include 
+		  const irq_mapped_t g_irqmap[NR_IRQS] =
+		  {
+		    ... IRQ to index mapping values ...
+		  };
+
+		This table is index by the hardware IRQ number and provides a value
+		in the range of 0 to CONFIG_ARCH_NUSER_INTERRUPTS that is the new,
+		mapped index into the vector table.  Unused, unmapped interrupts
+		should be set to IRQMAPPED_MAX.  So, for example, if g_irqmap[37]
+		== 24, then the hardware interrupt vector 37 will be mapped to the
+		interrupt vector table at index 24.  if g_irqmap[42] ==
+		IRQMAPPED_MAX, then hardware interrupt vector 42 is not used and
+		if it occurs will result in an unexpected interrupt crash.
+
+config ARCH_NUSER_INTERRUPTS
+	int "Number of interrupts"
+	default 0
+	depends on ARCH_MINIMAL_VECTORTABLE
+	---help---
+		If CONFIG_ARCH_MINIMAL_VECTORTABLE is defined, then this setting
+		defines the actual number of valid, mapped interrupts in g_irqmap.
+		This number will be the new size of the OS vector table
+
 comment "Board Settings"
 
 config BOARD_LOOPSPERMSEC
diff --git a/arch/README.txt b/arch/README.txt
index 114f2f6f1e7e430067cf244458edbc5a37ffada5..a0f604e4affe695ed956fb33191c3e1bb5e94b6a 100644
--- a/arch/README.txt
+++ b/arch/README.txt
@@ -150,13 +150,14 @@ arch/arm - ARM-based micro-controllers
     Architecture Support
       arch/arm/include and arch/arm/src/common
       arch/arm/src/arm and arch/arm/include/arm
+      arch/arm/src/armv7-a and arch/arm/include/armv6-m
       arch/arm/src/armv7-a and arch/arm/include/armv7-a
       arch/arm/src/armv7-m and arch/arm/include/armv7-m
-      arch/arm/src/armv7-r and arch/arm/include/armv7-4
+      arch/arm/src/armv7-r and arch/arm/include/armv7-r
 
     MCU support
+      arch/arm/include/a1x and arch/arm/src/a1x
       arch/arm/include/c5471 and arch/arm/src/c5471
-      arch/arm/include/calypso and arch/arm/src/calypso
       arch/arm/include/dm320 and arch/arm/src/dm320
       arch/arm/include/efm32 and arch/arm/src/efm32
       arch/arm/include/imx1 and arch/arm/src/imx1
@@ -210,25 +211,24 @@ arch/mips
       arch/mips/include/pic32mx and arch/mips/src/pic32mx
       arch/mips/include/pic32mz and arch/mips/src/pic32mz
 
-arch/rgmp
+arch/renesas - Support for Renesas and legacy Hitachi microcontrollers.
+    This include SuperH and M16C.
 
-    RGMP stands for RTOS and GPOS on Multi-Processor.  RGMP is a project
-    for running GPOS and RTOS simultaneously on multi-processor platforms.
-    You can port your favorite RTOS to RGMP together with an unmodified
-    Linux to form a hybrid operating system. This makes your application
-    able to use both RTOS and GPOS features.
+    Architecture Support
+      arch/renesas/include and arch/renesas/src/common
 
-    See http://rgmp.sourceforge.net/wiki/index.php/Main_Page for further
-    information about RGMP.
+    MCU support
+      arch/renesas/include/m16c and arch/renesas/src/m16c
+      arch/renesas/include/sh1 and arch/renesas/src/sh1
 
-arch/sh - SuperH and related Hitachi/Renesas microcontrollers
+arch/risc-v
+    This directory is dedicated to ports to the RISC-V family.
 
     Architecture Support
-      arch/sh/include and arch/sh/src/common
+      arch/risc-v/include/rv32im
 
     MCU support
-      arch/sh/include/m16c and arch/sh/src/m16c
-      arch/sh/include/sh1 and arch/sh/src/sh1
+      arch/risc-v/include/nr5m100
 
 arch/x86 - Intel x86 architectures
     This directory holds related, 32- and 64-bit architectures from Intel.
@@ -241,6 +241,21 @@ arch/x86 - Intel x86 architectures
       arch/x86/include/i486 and arch/x86/src/i486
       arch/x86/include/qemu and arch/x86/src/qemu
 
+arch/xtensa
+
+    Implementations based on the Cadence® Tensilica® Xtensa® processors,
+    such as the Xtensa LX6 dataplane processing units (DPUs).  At
+    present, this includes the following subdirectories:
+
+    Common XTENSA support:
+      arch/xtensa/include and arch/xtensa/src/common
+
+    LX6 DPU support:
+      arch/xtensa/include/lx6 and arch/xtensa/xtensa/lx6
+
+    Expressif ESP32 implemenation of the LX6 DPU:
+      arch/xtensa/include/esp32 and arch/xtensa/xtensa/esp32
+
 arch/z16 - ZiLOG 16-bit processors
     This directory holds related, 16-bit architectures from ZiLOG.  At
     present, this includes the following subdirectories:
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 6b6c046060d4e3ba2d7233c2a90d9f18b1c401f0..fd44dcff0775e5506d35eebbe4a922167106e031 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -31,16 +31,6 @@ config ARCH_CHIP_C5471
 	---help---
 		TI TMS320 C5471, A180, or DA180 (ARM7TDMI)
 
-config ARCH_CHIP_CALYPSO
-	bool "Calypso"
-	select ARCH_ARM7TDMI
-	select ARCH_HAVE_HEAP2
-	select ARCH_HAVE_LOWVECTORS
-	select OTHER_UART_SERIALDRIVER
-	select ARCH_HAVE_POWEROFF
-	---help---
-		TI Calypso-based cell phones (ARM7TDMI)
-
 config ARCH_CHIP_DM320
 	bool "TMS320 DM320"
 	select ARCH_ARM926EJS
@@ -51,6 +41,7 @@ config ARCH_CHIP_DM320
 config ARCH_CHIP_EFM32
 	bool "Energy Micro"
 	select ARCH_HAVE_CMNVECTOR
+	select ARCH_HAVE_SPI_BITORDER
 	select ARMV7M_CMNVECTOR
 	---help---
 		Energy Micro EFM32 microcontrollers (ARM Cortex-M).
@@ -84,6 +75,7 @@ config ARCH_CHIP_KINETIS
 	select ARM_HAVE_MPU_UNIFIED
 	select ARCH_HAVE_FPU
 	select ARCH_HAVE_RAMFUNCS
+	select ARCH_HAVE_CMNVECTOR
 	---help---
 		Freescale Kinetis Architectures (ARM Cortex-M4)
 
@@ -206,12 +198,14 @@ config ARCH_CHIP_SAM34
 config ARCH_CHIP_SAMV7
 	bool "Atmel SAMV7"
 	select ARCH_HAVE_CMNVECTOR
-	select ARMV7M_CMNVECTOR
 	select ARCH_CORTEXM7
 	select ARCH_HAVE_MPU
-	select ARM_HAVE_MPU_UNIFIED
 	select ARCH_HAVE_RAMFUNCS
 	select ARCH_HAVE_TICKLESS
+	select ARCH_HAVE_I2CRESET
+	select ARCH_HAVE_SPI_CS_CONTROL
+	select ARM_HAVE_MPU_UNIFIED
+	select ARMV7M_CMNVECTOR
 	select ARMV7M_HAVE_STACKCHECK
 	---help---
 		Atmel SAMV7 (ARM Cortex-M7) architectures
@@ -220,9 +214,12 @@ config ARCH_CHIP_STM32
 	bool "STMicro STM32 F1/F2/F3/F4"
 	select ARCH_HAVE_CMNVECTOR
 	select ARCH_HAVE_MPU
-	select ARM_HAVE_MPU_UNIFIED
 	select ARCH_HAVE_I2CRESET
 	select ARCH_HAVE_HEAPCHECK
+	select ARCH_HAVE_TICKLESS
+	select ARCH_HAVE_TIMEKEEPING
+	select ARCH_HAVE_SPI_BITORDER
+	select ARM_HAVE_MPU_UNIFIED
 	select ARMV7M_HAVE_STACKCHECK
 	---help---
 		STMicro STM32 architectures (ARM Cortex-M3/4).
@@ -230,12 +227,13 @@ config ARCH_CHIP_STM32
 config ARCH_CHIP_STM32F7
 	bool "STMicro STM32 F7"
 	select ARCH_HAVE_CMNVECTOR
-	select ARMV7M_CMNVECTOR
 	select ARCH_CORTEXM7
 	select ARCH_HAVE_MPU
-	select ARM_HAVE_MPU_UNIFIED
 	select ARCH_HAVE_I2CRESET
 	select ARCH_HAVE_HEAPCHECK
+	select ARCH_HAVE_SPI_BITORDER
+	select ARM_HAVE_MPU_UNIFIED
+	select ARMV7M_CMNVECTOR
 	select ARMV7M_HAVE_STACKCHECK
 	---help---
 		STMicro STM32 architectures (ARM Cortex-M7).
@@ -243,12 +241,14 @@ config ARCH_CHIP_STM32F7
 config ARCH_CHIP_STM32L4
 	bool "STMicro STM32 L4"
 	select ARCH_HAVE_CMNVECTOR
-	select ARMV7M_CMNVECTOR
 	select ARCH_CORTEXM4
 	select ARCH_HAVE_MPU
-	select ARM_HAVE_MPU_UNIFIED
 	select ARCH_HAVE_I2CRESET
 	select ARCH_HAVE_HEAPCHECK
+	select ARCH_HAVE_TICKLESS
+	select ARCH_HAVE_SPI_BITORDER
+	select ARM_HAVE_MPU_UNIFIED
+	select ARMV7M_CMNVECTOR
 	select ARMV7M_HAVE_STACKCHECK
 	---help---
 		STMicro STM32 architectures (ARM Cortex-M4).
@@ -302,6 +302,10 @@ config ARCH_CORTEXM0
 	select ARCH_HAVE_IRQPRIO
 	select ARCH_HAVE_RESET
 
+config ARCH_CORTEXM23
+	bool
+	default n
+
 config ARCH_CORTEXM3
 	bool
 	default n
@@ -310,6 +314,10 @@ config ARCH_CORTEXM3
 	select ARCH_HAVE_HIPRI_INTERRUPT
 	select ARCH_HAVE_RESET
 
+config ARCH_CORTEXM33
+	bool
+	default n
+
 config ARCH_CORTEXM4
 	bool
 	default n
@@ -325,6 +333,7 @@ config ARCH_CORTEXM7
 	select ARCH_HAVE_IRQPRIO
 	select ARCH_HAVE_RAMVECTORS
 	select ARCH_HAVE_HIPRI_INTERRUPT
+	select ARCH_HAVE_RESET
 	select ARCH_HAVE_COHERENT_DCACHE if ELF || MODULE
 
 config ARCH_CORTEXA5
@@ -399,7 +408,6 @@ config ARCH_CHIP
 	string
 	default "a1x"		if ARCH_CHIP_A1X
 	default "c5471"		if ARCH_CHIP_C5471
-	default "calypso"	if ARCH_CHIP_CALYPSO
 	default "dm320"		if ARCH_CHIP_DM320
 	default "efm32"		if ARCH_CHIP_EFM32
 	default "imx1"		if ARCH_CHIP_IMX1
@@ -588,7 +596,7 @@ config ARCH_ROMPGTABLE
 config DEBUG_HARDFAULT
 	bool "Verbose Hard-Fault Debug"
 	default n
-	depends on DEBUG && (ARCH_CORTEXM3 || ARCH_CORTEXM4 || ARCH_CORTEXM7)
+	depends on DEBUG_FEATURES && (ARCH_CORTEXM3 || ARCH_CORTEXM4 || ARCH_CORTEXM7)
 	---help---
 		Enables verbose debug output when a hard fault is occurs.  This verbose
 		output is sometimes helpful when debugging difficult hard fault problems,
@@ -615,9 +623,6 @@ endif
 if ARCH_CHIP_C5471
 source arch/arm/src/c5471/Kconfig
 endif
-if ARCH_CHIP_CALYPSO
-source arch/arm/src/calypso/Kconfig
-endif
 if ARCH_CHIP_DM320
 source arch/arm/src/dm320/Kconfig
 endif
diff --git a/arch/rgmp/src/arm/sigentry.S b/arch/arm/include/arm/spinlock.h
similarity index 80%
rename from arch/rgmp/src/arm/sigentry.S
rename to arch/arm/include/arm/spinlock.h
index 1e413450bf6573c61f7215f23eb366fe0c38fa06..ee3db052cf0002db9f13b0b8a547196ec97e2aad 100644
--- a/arch/rgmp/src/arm/sigentry.S
+++ b/arch/arm/include/arm/spinlock.h
@@ -1,12 +1,8 @@
 /****************************************************************************
- * arch/rgmp/src/arm/sigentry.S
+ * arch/arm/include/armv7-a/spinlock.h
  *
- *   Copyright (C) 2011 Yu Qiang. All rights reserved.
- *   Author: Yu Qiang 
- *
- * This file is a part of NuttX:
- *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -37,13 +33,7 @@
  *
  ****************************************************************************/
 
-	.globl up_sigentry
-up_sigentry:
-	sub	sp, sp, #68    @ 68 is the size of Trapframe
-	mov	r0, sp
-	bl	up_sigdeliver
-	add	sp, sp, #4     @ skip current_task
-	pop	{r0-r12, lr}
-	rfefd	sp!
+#ifndef __ARCH_ARM_INCLUDE_ARM_SPINLOCK_H
+#define __ARCH_ARM_INCLUDE_ARM_SPINLOCK_H
 
-	
\ No newline at end of file
+#endif /* __ARCH_ARM_INCLUDE_ARM_SPINLOCK_H */
diff --git a/arch/rgmp/include/arm/arch/subarch/arch.h b/arch/arm/include/armv6-m/spinlock.h
similarity index 78%
rename from arch/rgmp/include/arm/arch/subarch/arch.h
rename to arch/arm/include/armv6-m/spinlock.h
index e5f3fff10f93ad6892b0c744442d0956407c60cd..c1d154b37001652e6624c535d113ed7519cce219 100644
--- a/arch/rgmp/include/arm/arch/subarch/arch.h
+++ b/arch/arm/include/armv6-m/spinlock.h
@@ -1,12 +1,8 @@
 /****************************************************************************
- * arch/rgmp/include/arm/arch/subarch/arch.h
+ * arch/arm/include/armv7-a/spinlock.h
  *
- *   Copyright (C) 2011 Yu Qiang. All rights reserved.
- *   Author: Yu Qiang 
- *
- * This file is a part of NuttX:
- *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -37,22 +33,7 @@
  *
  ****************************************************************************/
 
-#ifndef __RGMP_ARCH_SUBARCH_ARCH_H
-#define __RGMP_ARCH_SUBARCH_ARCH_H
-
-#ifndef __ASSEMBLY__
-
-
-static inline void up_mdelay(uint32_t msec)
-{
-
-}
-
-static inline void up_udelay(uint32_t usec)
-{
-
-}
-
-#endif /* !__ASSEMBLY__ */
+#ifndef __ARCH_ARM_INCLUDE_ARMV6_M_SPINLOCK_H
+#define __ARCH_ARM_INCLUDE_ARMV6_M_SPINLOCK_H
 
-#endif
+#endif /* __ARCH_ARM_INCLUDE_ARMV6_M_SPINLOCK_H */
diff --git a/arch/rgmp/src/x86/sigentry.S b/arch/arm/include/armv7-a/spinlock.h
similarity index 75%
rename from arch/rgmp/src/x86/sigentry.S
rename to arch/arm/include/armv7-a/spinlock.h
index 77214e8114a58a94fb22ba469d558e049b3e9245..764a96ecef3104a8f27e6dde4c816cd7afb0864f 100644
--- a/arch/rgmp/src/x86/sigentry.S
+++ b/arch/arm/include/armv7-a/spinlock.h
@@ -1,12 +1,8 @@
 /****************************************************************************
- * arch/rgmp/src/x86/sigentry.S
+ * arch/arm/include/armv7-a/spinlock.h
  *
- *   Copyright (C) 2011 Yu Qiang. All rights reserved.
- *   Author: Yu Qiang 
- *
- * This file is a part of NuttX:
- *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -37,19 +33,7 @@
  *
  ****************************************************************************/
 
-	.globl up_sigentry
-up_sigentry:
-	subl $172, %esp    # 172 is the size of Trapframe without cross ring part
-	pushl %esp
-	movl %esp, %eax
-	call up_sigdeliver
-	addl $8, %esp      # skip parameter and tf_curregs
-	frstor 0(%esp)
-  	addl $108, %esp
-	popal
-	popl %es
-	popl %ds
-	addl $0x8, %esp # trapno and errcode
-	iret
+#ifndef __ARCH_ARM_INCLUDE_ARMV7_A_SPINLOCK_H
+#define __ARCH_ARM_INCLUDE_ARMV7_A_SPINLOCK_H
 
-	
\ No newline at end of file
+#endif /* __ARCH_ARM_INCLUDE_ARMV7_A_SPINLOCK_H */
diff --git a/arch/arm/include/armv7-m/spinlock.h b/arch/arm/include/armv7-m/spinlock.h
new file mode 100644
index 0000000000000000000000000000000000000000..79a06b4173f94731d24c8379f0999dc9e07c1183
--- /dev/null
+++ b/arch/arm/include/armv7-m/spinlock.h
@@ -0,0 +1,39 @@
+/****************************************************************************
+ * arch/arm/include/armv7-a/spinlock.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_INCLUDE_ARMV7_M_SPINLOCK_H
+#define __ARCH_ARM_INCLUDE_ARMV7_M_SPINLOCK_H
+
+#endif /* __ARCH_ARM_INCLUDE_ARMV7_M_SPINLOCK_H */
diff --git a/arch/arm/include/armv7-r/spinlock.h b/arch/arm/include/armv7-r/spinlock.h
new file mode 100644
index 0000000000000000000000000000000000000000..ab7900fa7337d90291c62b4cbfd716559e2a474c
--- /dev/null
+++ b/arch/arm/include/armv7-r/spinlock.h
@@ -0,0 +1,39 @@
+/****************************************************************************
+ * arch/arm/include/armv7-r/spinlock.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_INCLUDE_ARMV7_R_SPINLOCK_H
+#define __ARCH_ARM_INCLUDE_ARMV7_R_SPINLOCK_H
+
+#endif /* __ARCH_ARM_INCLUDE_ARMV7_R_SPINLOCK_H */
diff --git a/arch/arm/include/calypso/clock.h b/arch/arm/include/calypso/clock.h
deleted file mode 100644
index abcfde1d449d947a14904a36f100e5bfea0b95a8..0000000000000000000000000000000000000000
--- a/arch/arm/include/calypso/clock.h
+++ /dev/null
@@ -1,67 +0,0 @@
-#ifndef _CALYPSO_CLK_H
-#define _CALYPSO_CLK_H
-
-#include 
-
-#define CALYPSO_PLL26_52_MHZ	((2 << 8) | 0)
-#define CALYPSO_PLL26_86_7_MHZ	((10 << 8) | 2)
-#define CALYPSO_PLL26_87_MHZ	((3 << 8) | 0)
-#define CALYPSO_PLL13_104_MHZ	((8 << 8) | 0)
-
-enum mclk_div {
-	_ARM_MCLK_DIV_1		= 0,
-	ARM_MCLK_DIV_1		= 1,
-	ARM_MCLK_DIV_2		= 2,
-	ARM_MCLK_DIV_3		= 3,
-	ARM_MCLK_DIV_4		= 4,
-	ARM_MCLK_DIV_5		= 5,
-	ARM_MCLK_DIV_6		= 6,
-	ARM_MCLK_DIV_7		= 7,
-	ARM_MCLK_DIV_1_5	= 0x80 | 1,
-	ARM_MCLK_DIV_2_5	= 0x80 | 2,
-};
-
-void calypso_clock_set(uint8_t vtcxo_div2, uint16_t inp, enum mclk_div mclk_div);
-void calypso_pll_set(uint16_t inp);
-void calypso_clk_dump(void);
-
-/* CNTL_RST */
-enum calypso_rst {
-	RESET_DSP	= (1 << 1),
-	RESET_EXT	= (1 << 2),
-	RESET_WDOG	= (1 << 3),
-};
-
-void calypso_reset_set(enum calypso_rst calypso_rst, int active);
-int calypso_reset_get(enum calypso_rst);
-
-enum calypso_bank {
-	CALYPSO_nCS0	= 0,
-	CALYPSO_nCS1	= 2,
-	CALYPSO_nCS2	= 4,
-	CALYPSO_nCS3	= 6,
-	CALYPSO_nCS7	= 8,
-	CALYPSO_CS4	= 0xa,
-	CALYPSO_nCS6	= 0xc,
-};
-
-enum calypso_mem_width {
-	CALYPSO_MEM_8bit	= 0,
-	CALYPSO_MEM_16bit	= 1,
-	CALYPSO_MEM_32bit	= 2,
-};
-
-void calypso_mem_cfg(enum calypso_bank bank, uint8_t ws,
-		     enum calypso_mem_width width, int we);
-
-/* Enable or disable the internal bootrom mapped to 0x0000'0000 */
-void calypso_bootrom(int enable);
-
-/* Enable or disable the debug unit */
-void calypso_debugunit(int enable);
-
-/* configure the RHEA bus bridge[s] */
-void calypso_rhea_cfg(uint8_t fac0, uint8_t fac1, uint8_t timeout,
-		      uint8_t ws_h, uint8_t ws_l, uint8_t w_en0, uint8_t w_en1);
-
-#endif /* _CALYPSO_CLK_H */
diff --git a/arch/arm/include/calypso/debug.h b/arch/arm/include/calypso/debug.h
deleted file mode 100644
index 8c7b9aabfbdd132ae439b765f0d4318ec31c4144..0000000000000000000000000000000000000000
--- a/arch/arm/include/calypso/debug.h
+++ /dev/null
@@ -1,31 +0,0 @@
-#ifndef _DEBUG_H
-#define _DEBUG_H
-
-#ifndef ARRAY_SIZE
-#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
-#endif
-
-/*
- * Check at compile time that something is of a particular type.
- * Always evaluates to 1 so you may use it easily in comparisons.
- */
-#define typecheck(type,x) \
-({	type __dummy; \
-	typeof(x) __dummy2; \
-	(void)(&__dummy == &__dummy2); \
-	1; \
-})
-
-#ifdef DEBUG
-#define dputchar(x) putchar(x)
-#define dputs(x) puts(x)
-#define dphex(x,y) phex(x,y)
-#define printd(x, ...) printf(x, ##__VA_ARGS__)
-#else
-#define dputchar(x)
-#define dputs(x)
-#define dphex(x,y)
-#define printd(x, args ...)
-#endif
-
-#endif /* _DEBUG_H */
diff --git a/arch/arm/include/calypso/defines.h b/arch/arm/include/calypso/defines.h
deleted file mode 100644
index 3c8732f92f8c086b825e70d7d51c980e41a79e40..0000000000000000000000000000000000000000
--- a/arch/arm/include/calypso/defines.h
+++ /dev/null
@@ -1,18 +0,0 @@
-
-#ifndef _DEFINES_H
-#define _DEFINES_H
-
-#define __attribute_const__	__attribute__((__const__))
-
-/* type properties */
-#define __packed		__attribute__((packed))
-#define __aligned(alignment)	__attribute__((aligned(alignment)))
-#define __unused		__attribute__((unused))
-
-/* linkage */
-#define __section(name) __attribute__((section(name)))
-
-/* force placement in zero-waitstate memory */
-#define __ramtext __section(".ramtext")
-
-#endif /* !_DEFINES_H */
diff --git a/arch/arm/include/calypso/irq.h b/arch/arm/include/calypso/irq.h
deleted file mode 100644
index baea3de5a3f690f6b2a6411e6adfb12f03290325..0000000000000000000000000000000000000000
--- a/arch/arm/include/calypso/irq.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/****************************************************************************
- * arch/arm/include/calypso/irq.h
- * Driver for Calypso IRQ controller
- *
- * (C) 2010 by Harald Welte 
- * (C) 2011 by Stefan Richter 
- *
- * This source code is derivated from Osmocom-BB project and was
- * relicensed as BSD with permission from original authors.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#ifndef __INCLUDE_NUTTX_IRQ_H
-#error "This file should never be included directly! Use "
-#endif
-
-#ifndef _CALYPSO_IRQ_H
-#define _CALYPSO_IRQ_H
-
-#ifndef __ASSEMBLY__
-
-enum irq_nr {
-	IRQ_WATCHDOG		= 0,
-	IRQ_TIMER1		= 1,
-	IRQ_TIMER2		= 2,
-	IRQ_TSP_RX		= 3,
-	IRQ_TPU_FRAME		= 4,
-	IRQ_TPU_PAGE		= 5,
-	IRQ_SIMCARD		= 6,
-	IRQ_UART_MODEM		= 7,
-	IRQ_KEYPAD_GPIO		= 8,
-	IRQ_RTC_TIMER		= 9,
-	IRQ_RTC_ALARM_I2C	= 10,
-	IRQ_ULPD_GAUGING	= 11,
-	IRQ_EXTERNAL		= 12,
-	IRQ_SPI			= 13,
-	IRQ_DMA			= 14,
-	IRQ_API			= 15,
-	IRQ_SIM_DETECT		= 16,
-	IRQ_EXTERNAL_FIQ	= 17,
-	IRQ_UART_IRDA		= 18,
-	IRQ_ULPD_GSM_TIMER	= 19,
-	IRQ_GEA			= 20,
-	_NR_IRQS
-};
-
-#endif /* __ASSEMBLY__ */
-
-/* Don't use _NR_IRQS!!! Won't work in preprocessor... */
-#define NR_IRQS			21
-
-#define IRQ_SYSTIMER		IRQ_TIMER2
-
-#endif /* _CALYPSO_IRQ_H */
diff --git a/arch/arm/include/calypso/memory.h b/arch/arm/include/calypso/memory.h
deleted file mode 100644
index b0a0490cec1c3f8d44714ef9826fed115163be02..0000000000000000000000000000000000000000
--- a/arch/arm/include/calypso/memory.h
+++ /dev/null
@@ -1,28 +0,0 @@
-#ifndef _MEMORY_H
-#define _MEMORY_H
-
-#define __arch_getb(a)			(*(volatile unsigned char *)(a))
-#define __arch_getw(a)			(*(volatile unsigned short *)(a))
-#define __arch_getl(a)			(*(volatile unsigned int *)(a))
-
-#define __arch_putb(v,a)		(*(volatile unsigned char *)(a) = (v))
-#define __arch_putw(v,a)		(*(volatile unsigned short *)(a) = (v))
-#define __arch_putl(v,a)		(*(volatile unsigned int *)(a) = (v))
-
-#define __raw_writeb(v,a)		__arch_putb(v,a)
-#define __raw_writew(v,a)		__arch_putw(v,a)
-#define __raw_writel(v,a)		__arch_putl(v,a)
-
-#define __raw_readb(a)			__arch_getb(a)
-#define __raw_readw(a)			__arch_getw(a)
-#define __raw_readl(a)			__arch_getl(a)
-
-#define writeb(v,a)			__arch_putb(v,a)
-#define writew(v,a)			__arch_putw(v,a)
-#define writel(v,a)			__arch_putl(v,a)
-
-#define readb(a)			__arch_getb(a)
-#define readw(a)			__arch_getw(a)
-#define readl(a)			__arch_getl(a)
-
-#endif /* _MEMORY_H */
diff --git a/arch/arm/include/calypso/timer.h b/arch/arm/include/calypso/timer.h
deleted file mode 100644
index 694e4ebc92efb1d4031508354f4366f9079df243..0000000000000000000000000000000000000000
--- a/arch/arm/include/calypso/timer.h
+++ /dev/null
@@ -1,25 +0,0 @@
-#ifndef _CAL_TIMER_H
-#define _CAL_TIMER_H
-
-/* Enable or Disable a timer */
-void hwtimer_enable(int num, int on);
-
-/* Configure pre-scaler and if timer is auto-reload */
-void hwtimer_config(int num, uint8_t pre_scale, int auto_reload);
-
-/* Load a timer with the given value */
-void hwtimer_load(int num, uint16_t val);
-
-/* Read the current timer value */
-uint16_t hwtimer_read(int num);
-
-/* Enable or disable the watchdog */
-void wdog_enable(int on);
-
-/* Reset cpu using watchdog */
-void wdog_reset(void);
-
-/* power up the timers */
-void hwtimer_init(void);
-
-#endif /* _CAL_TIMER_H */
diff --git a/arch/arm/include/calypso/uwire.h b/arch/arm/include/calypso/uwire.h
deleted file mode 100644
index 19a277bccb5754cb938ce3593e8abe5492936068..0000000000000000000000000000000000000000
--- a/arch/arm/include/calypso/uwire.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _CALYPSO_UWIRE_H
-#define _CALYPSO_UWIRE_H
-void uwire_init(void);
-int uwire_xfer(int cs, int bitlen, const void *dout, void *din);
-#endif
-
diff --git a/arch/arm/include/efm32/irq.h b/arch/arm/include/efm32/irq.h
index 7bd0449d621d225ad6408ea8d6422c28f71e4781..a5f2eff8e47850dc2826a75f7887f0bbe7461022 100644
--- a/arch/arm/include/efm32/irq.h
+++ b/arch/arm/include/efm32/irq.h
@@ -60,7 +60,7 @@
 
 /* Processor Exceptions (vectors 0-15) */
 
-#define EFM32_IRQ_RESERVED     (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define EFM32_IRQ_RESERVED     (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
                                    /* Vector  0: Reset stack pointer value */
                                    /* Vector  1: Reset (not handler as an IRQ) */
 #define EFM32_IRQ_NMI          (2) /* Vector  2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/inttypes.h b/arch/arm/include/inttypes.h
new file mode 100644
index 0000000000000000000000000000000000000000..280d4a5ecaf93f67556b3aca5f7924a98edc8262
--- /dev/null
+++ b/arch/arm/include/inttypes.h
@@ -0,0 +1,245 @@
+/****************************************************************************
+ * arch/arm/include/inttypes.h
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_INCLUDE_INTTYPES_H
+#define __ARCH_ARM_INCLUDE_INTTYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define PRId8       "d"
+#define PRId16      "d"
+#define PRId32      "d"
+#define PRId64      "lld"
+
+#define PRIdLEAST8  "d"
+#define PRIdLEAST16 "d"
+#define PRIdLEAST32 "d"
+#define PRIdLEAST64 "lld"
+
+#define PRIdFAST8   "d"
+#define PRIdFAST16  "d"
+#define PRIdFAST32  "d"
+#define PRIdFAST64  "lld"
+
+#define PRIdMAX     "lld"
+#define PRIdPTR     "d"
+
+#define PRIi8       "i"
+#define PRIi16      "i"
+#define PRIi32      "i"
+#define PRIi64      "lli"
+
+#define PRIiLEAST8  "i"
+#define PRIiLEAST16 "i"
+#define PRIiLEAST32 "i"
+#define PRIiLEAST64 "lli"
+
+#define PRIiFAST8   "i"
+#define PRIiFAST16  "i"
+#define PRIiFAST32  "i"
+#define PRIiFAST64  "lli"
+
+#define PRIiMAX     "lli"
+#define PRIiPTR     "i"
+
+#define PRIo8       "o"
+#define PRIo16      "o"
+#define PRIo32      "o"
+#define PRIo64      "llo"
+
+#define PRIoLEAST8  "o"
+#define PRIoLEAST16 "o"
+#define PRIoLEAST32 "o"
+#define PRIoLEAST64 "llo"
+
+#define PRIoFAST8   "o"
+#define PRIoFAST16  "o"
+#define PRIoFAST32  "o"
+#define PRIoFAST64  "llo"
+
+#define PRIoMAX     "llo"
+#define PRIoPTR     "o"
+
+#define PRIu8       "u"
+#define PRIu16      "u"
+#define PRIu32      "u"
+#define PRIu64      "llu"
+
+#define PRIuLEAST8  "u"
+#define PRIuLEAST16 "u"
+#define PRIuLEAST32 "u"
+#define PRIuLEAST64 "llu"
+
+#define PRIuFAST8   "u"
+#define PRIuFAST16  "u"
+#define PRIuFAST32  "u"
+#define PRIuFAST64  "llu"
+
+#define PRIuMAX     "llu"
+#define PRIuPTR     "u"
+
+#define PRIx8       "x"
+#define PRIx16      "x"
+#define PRIx32      "x"
+#define PRIx64      "llx"
+
+#define PRIxLEAST8  "x"
+#define PRIxLEAST16 "x"
+#define PRIxLEAST32 "x"
+#define PRIxLEAST64 "llx"
+
+#define PRIxFAST8   "x"
+#define PRIxFAST16  "x"
+#define PRIxFAST32  "x"
+#define PRIxFAST64  "llx"
+
+#define PRIxMAX     "llx"
+#define PRIxPTR     "x"
+
+#define PRIX8       "X"
+#define PRIX16      "X"
+#define PRIX32      "X"
+#define PRIX64      "llX"
+
+#define PRIXLEAST8  "X"
+#define PRIXLEAST16 "X"
+#define PRIXLEAST32 "X"
+#define PRIXLEAST64 "llX"
+
+#define PRIXFAST8   "X"
+#define PRIXFAST16  "X"
+#define PRIXFAST32  "X"
+#define PRIXFAST64  "llX"
+
+#define PRIXMAX     "llX"
+#define PRIXPTR     "X"
+
+#define SCNd8       "hhd"
+#define SCNd16      "hd"
+#define SCNd32      "d"
+#define SCNd64      "lld"
+
+#define SCNdLEAST8  "hhd"
+#define SCNdLEAST16 "hd"
+#define SCNdLEAST32 "d"
+#define SCNdLEAST64 "lld"
+
+#define SCNdFAST8   "hhd"
+#define SCNdFAST16  "hd"
+#define SCNdFAST32  "d"
+#define SCNdFAST64  "lld"
+
+#define SCNdMAX     "lld"
+#define SCNdPTR     "d"
+
+#define SCNi8       "hhi"
+#define SCNi16      "hi"
+#define SCNi32      "i"
+#define SCNi64      "lli"
+
+#define SCNiLEAST8  "hhi"
+#define SCNiLEAST16 "hi"
+#define SCNiLEAST32 "i"
+#define SCNiLEAST64 "lli"
+
+#define SCNiFAST8   "hhi"
+#define SCNiFAST16  "hi"
+#define SCNiFAST32  "i"
+#define SCNiFAST64  "lli"
+
+#define SCNiMAX     "lli"
+#define SCNiPTR     "i"
+
+#define SCNo8       "hho"
+#define SCNo16      "ho"
+#define SCNo32      "o"
+#define SCNo64      "llo"
+
+#define SCNoLEAST8  "hho"
+#define SCNoLEAST16 "ho"
+#define SCNoLEAST32 "o"
+#define SCNoLEAST64 "llo"
+
+#define SCNoFAST8   "hho"
+#define SCNoFAST16  "ho"
+#define SCNoFAST32  "o"
+#define SCNoFAST64  "llo"
+
+#define SCNoMAX     "llo"
+#define SCNoPTR     "o"
+
+#define SCNu8       "hhu"
+#define SCNu16      "hu"
+#define SCNu32      "u"
+#define SCNu64      "llu"
+
+#define SCNuLEAST8  "hhu"
+#define SCNuLEAST16 "hu"
+#define SCNuLEAST32 "u"
+#define SCNuLEAST64 "llu"
+
+#define SCNuFAST8   "hhu"
+#define SCNuFAST16  "hu"
+#define SCNuFAST32  "u"
+#define SCNuFAST64  "llu"
+
+#define SCNuMAX     "llu"
+#define SCNuPTR     "u"
+
+#define SCNx8       "hhx"
+#define SCNx16      "hx"
+#define SCNx32      "x"
+#define SCNx64      "llx"
+
+#define SCNxLEAST8  "hhx"
+#define SCNxLEAST16 "hx"
+#define SCNxLEAST32 "x"
+#define SCNxLEAST64 "llx"
+
+#define SCNxFAST8   "hhx"
+#define SCNxFAST16  "hx"
+#define SCNxFAST32  "x"
+#define SCNxFAST64  "llx"
+
+#define SCNxMAX     "llx"
+#define SCNxPTR     "x"
+
+#endif /* __ARCH_ARM_INCLUDE_INTTYPES_H */
diff --git a/arch/arm/include/kinetis/chip.h b/arch/arm/include/kinetis/chip.h
index dd8582e564fc8e78472ed6b53c9e4eaf200d10a1..5c6cc76a0822deb212292e76d37e72dc737e7d55 100644
--- a/arch/arm/include/kinetis/chip.h
+++ b/arch/arm/include/kinetis/chip.h
@@ -1,8 +1,9 @@
 /************************************************************************************
  * arch/arm/include/kinetis/chip.h
  *
- *   Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2011, 2013, 2015-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -41,6 +42,9 @@
  ************************************************************************************/
 
 #include 
+#include 
+#include 
+#include 
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -69,9 +73,11 @@
     defined(CONFIG_ARCH_CHIP_MK20DN128VLH5) || \
     defined(CONFIG_ARCH_CHIP_MK20DX128VLH5)
 
-#  define KINETIS_K20             1          /* Kinetics K20 family */
-#  undef  KINETIS_K40                        /* Not Kinetics K40 family */
+#  define KINETIS_K20             1          /* Kinetis K20 family */
+#  undef  KINETIS_K40                        /* Not Kinetis K40 family */
 #  undef  KINETIS_K60                        /* Not Kinetis K60 family */
+#  undef  KINETIS_K64                        /* Not Kinetis K64 family */
+#  undef  KINETIS_K66                        /* Not Kinetis K66 family */
 
 #if defined(CONFIG_ARCH_CHIP_MK20DN32VLH5)
 #  define KINETIS_FLASH_SIZE      (64*1024)  /* 32Kb */
@@ -150,103 +156,108 @@
       defined(CONFIG_ARCH_CHIP_MK20DX128VLH7) || \
       defined(CONFIG_ARCH_CHIP_MK20DX256VLH7)
 
-#  define KINETIS_K20             1          /* Kinetics K20 family */
-#  undef  KINETIS_K40                        /* Not Kinetics K40 family */
-#  undef  KINETIS_K60                        /* Not Kinetis K60 family */
+#  define KINETIS_K20             1            /* Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  undef  KINETIS_K60                          /* Not Kinetis K60 family */
+#  undef  KINETIS_K64                          /* Not Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
 
 #if defined(CONFIG_ARCH_CHIP_MK20DX64VLH7)
-#  define KINETIS_FLASH_SIZE      (64*1024)  /* 64Kb */
-#  define KINETIS_FLEXMEM_SIZE    (32*1024)  /* 32Kb */
-#  define KINETIS_SRAM_SIZE       (16*1024)  /* 16Kb */
+#  define KINETIS_FLASH_SIZE      (64*1024)    /* 64Kb */
+#  define KINETIS_FLEXMEM_SIZE    (32*1024)    /* 32Kb */
+#  define KINETIS_SRAM_SIZE       (16*1024)    /* 16Kb */
 #elif defined(CONFIG_ARCH_CHIP_MK20DX128VLH7)
-#  define KINETIS_FLASH_SIZE      (128*1024) /* 128Kb */
-#  define KINETIS_FLEXMEM_SIZE    (32*1024)  /* 32Kb */
-#  define KINETIS_SRAM_SIZE       (32*1024)  /* 32Kb */
+#  define KINETIS_FLASH_SIZE      (128*1024)   /* 128Kb */
+#  define KINETIS_FLEXMEM_SIZE    (32*1024)    /* 32Kb */
+#  define KINETIS_SRAM_SIZE       (32*1024)    /* 32Kb */
 #else /* if defined(CONFIG_ARCH_CHIP_MK20DX256VLH7) */
-#  define KINETIS_FLASH_SIZE      (256*1024) /* 256Kb */
-#  define KINETIS_FLEXMEM_SIZE    (32*1024)  /* 32Kb */
-#  define KINETIS_SRAM_SIZE       (64*1024)  /* 64Kb */
+#  define KINETIS_FLASH_SIZE      (256*1024)   /* 256Kb */
+#  define KINETIS_FLEXMEM_SIZE    (32*1024)    /* 32Kb */
+#  define KINETIS_SRAM_SIZE       (64*1024)    /* 64Kb */
 #endif
 
-#  undef  KINETIS_MPU                        /* No memory protection unit */
-#  undef  KINETIS_EXTBUS                     /* No external bus interface */
-#  define KINETIS_NDMACH          16         /* Up to 16 DMA channels */
-#  undef  KINETIS_NENET                      /* No Ethernet controller */
-#  define KINETIS_NUSBHOST        1          /* One USB host controller */
-#  define KINETIS_NUSBOTG         1          /* With USB OTG controller */
-#  define KINETIS_NUSBDEV         1          /* One USB device controller */
-#  undef  KINETIS_NSDHC                      /* No SD host controller */
-#  undef  KINETIS_NTOUCHIF                   /* Xtrinsic touch sensing interface */
-#  define KINETIS_NI2C            2          /* Two I2C modules */
-#  undef  KINETIS_NISO7816                   /* No UART with ISO-786 */
-#  define KINETIS_NUART           3          /* Three UARTs */
-#  define KINETIS_NSPI            1          /* One SPI module */
-#  define KINETIS_NCAN            1          /* Two CAN controller */
-#  define KINETIS_NI2S            1          /* One I2S module */
-#  undef  KINETIS_NSLCD                      /* No segment LCD interface */
-#  define KINETIS_NADC16          2          /* Two 16-bit ADC */
-#  undef  KINETIS_NADC12                     /* No 12-channel ADC */
-#  undef  KINETIS_NADC13                     /* No 13-channel ADC */
-#  undef  KINETIS_NADC15                     /* No 15-channel ADC */
-#  undef  KINETIS_NADC18                     /* No 18-channel ADC */
-#  define KINETIS_NPGA            2          /* Two Programmable Gain Amplifiers */
-#  define KINETIS_NCMP            3          /* Three analog comparators */
-#  define KINETIS_NDAC6           3          /* Three 6-bit DAC */
-#  define KINETIS_NDAC12          1          /* One 12-bit DAC */
-#  define KINETIS_NVREF           1          /* Voltage reference */
-#  define KINETIS_NTIMERS12       2          /* Two 12 channel timers */
-#  undef  KINETIS_NTIMERS20                  /* No 20 channel timers */
-#  undef  KINETIS_NRNG                       /* No random number generator */
-#  define KINETIS_NRTC            1          /* Real time clock */
-#  undef  KINETIS_NMMCAU                     /* No hardware encryption */
-#  undef  KINETIS_NTAMPER                    /* No tamper detect */
-#  undef  KINETIS_NCRC                       /* No CRC */
+#  undef  KINETIS_MPU                          /* No memory protection unit */
+#  undef  KINETIS_EXTBUS                       /* No external bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  undef  KINETIS_NENET                        /* No Ethernet controller */
+#  define KINETIS_NUSBHOST        1            /* One USB host controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  undef  KINETIS_NSDHC                        /* No SD host controller */
+#  undef  KINETIS_NTOUCHIF                     /* Xtrinsic touch sensing interface */
+#  define KINETIS_NI2C            2            /* Two I2C modules */
+#  undef  KINETIS_NISO7816                     /* No UART with ISO-786 */
+#  define KINETIS_NUART           3            /* Three UARTs */
+#  define KINETIS_NSPI            1            /* One SPI module */
+#  define KINETIS_NCAN            1            /* Two CAN controller */
+#  define KINETIS_NI2S            1            /* One I2S module */
+#  undef  KINETIS_NSLCD                        /* No segment LCD interface */
+#  define KINETIS_NADC16          2            /* Two 16-bit ADC */
+#  undef  KINETIS_NADC12                       /* No 12-channel ADC */
+#  undef  KINETIS_NADC13                       /* No 13-channel ADC */
+#  undef  KINETIS_NADC15                       /* No 15-channel ADC */
+#  undef  KINETIS_NADC18                       /* No 18-channel ADC */
+#  define KINETIS_NPGA            2            /* Two Programmable Gain Amplifiers */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  define KINETIS_NDAC6           3            /* Three 6-bit DAC */
+#  define KINETIS_NDAC12          1            /* One 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  define KINETIS_NTIMERS12       2            /* Two 12 channel timers */
+#  undef  KINETIS_NTIMERS20                    /* No 20 channel timers */
+#  undef  KINETIS_NRNG                         /* No random number generator */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  undef  KINETIS_NMMCAU                       /* No hardware encryption */
+#  undef  KINETIS_NTAMPER                      /* No tamper detect */
+#  undef  KINETIS_NCRC                         /* No CRC */
 
 #elif defined(CONFIG_ARCH_CHIP_MK40X64VFX50) || defined(CONFIG_ARCH_CHIP_MK40X64VLH50) || \
     defined(CONFIG_ARCH_CHIP_MK40X64VLK50) || defined(CONFIG_ARCH_CHIP_MK40X64VMB50)
-#  undef  KINETIS_K20                        /* Not Kinetis K20 family */
-#  define KINETIS_K40             1          /* Kinetics K40 family */
-#  undef  KINETIS_K60                        /* Not Kinetis K60 family */
-#  define KINETIS_FLASH_SIZE      (64*1024)  /* 64Kb */
-#  define KINETIS_FLEXMEM_SIZE    (32*1024)  /* 32Kb */
-#  define KINETIS_SRAM_SIZE       (16*1024)  /* 16Kb */
-#  undef  KINETIS_MPU                        /* No memory protection unit */
-#  undef  KINETIS_EXTBUS                     /* No external bus interface */
-#  define KINETIS_NDMACH          16         /* Up to 16 DMA channels */
-#  undef  KINETIS_NENET                      /* No Ethernet controller */
-#  define KINETIS_NUSBHOST        1          /* One USB host controller */
-#  define KINETIS_NUSBOTG         1          /* With USB OTG controller */
-#  define KINETIS_NUSBDEV         1          /* One USB device controller */
-#  undef  KINETIS_NSDHC                      /* No SD host controller */
-#  undef  KINETIS_NTOUCHIF                   /* Xtrinsic touch sensing interface */
-#  define KINETIS_NI2C            2          /* Two I2C modules */
-#  undef  KINETIS_NISO7816                   /* No UART with ISO-786 */
-#  define KINETIS_NUART           6          /* Six UARTs */
-#  define KINETIS_NSPI            3          /* Three SPI modules */
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  define KINETIS_K40             1            /* Kinetis K40 family */
+#  undef  KINETIS_K60                          /* Not Kinetis K60 family */
+#  undef  KINETIS_K64                          /* Not Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (64*1024)    /* 64Kb */
+#  define KINETIS_FLEXMEM_SIZE    (32*1024)    /* 32Kb */
+#  define KINETIS_SRAM_SIZE       (16*1024)    /* 16Kb */
+#  undef  KINETIS_MPU                          /* No memory protection unit */
+#  undef  KINETIS_EXTBUS                       /* No external bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  undef  KINETIS_NENET                        /* No Ethernet controller */
+#  define KINETIS_NUSBHOST        1            /* One USB host controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  undef  KINETIS_NSDHC                        /* No SD host controller */
+#  undef  KINETIS_NTOUCHIF                     /* Xtrinsic touch sensing interface */
+#  define KINETIS_NI2C            2            /* Two I2C modules */
+#  undef  KINETIS_NISO7816                     /* No UART with ISO-786 */
+#  define KINETIS_NUART           6            /* Six UARTs */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
 #  if defined(CONFIG_ARCH_CHIP_MK40X64VLK50) || defined(CONFIG_ARCH_CHIP_MK40X64VMB50)
-#    define KINETIS_NCAN          2          /* Two CAN controllers */
+#    define KINETIS_NCAN          2            /* Two CAN controllers */
 #  else
-#    undef KINETIS_NCAN                      /* No CAN in 64-pin chips */
+#    undef KINETIS_NCAN                        /* No CAN in 64-pin chips */
 #  endif
-#  define KINETIS_NI2S            1          /* One I2S module */
-#  define KINETIS_NSLCD           1          /* One segment LCD interface (up to 25x8/29x4) */
-#  define KINETIS_NADC16          4          /* Four 16-bit ADC */
-#  undef  KINETIS_NADC12                     /* No 12-channel ADC */
-#  undef  KINETIS_NADC13                     /* No 13-channel ADC */
-#  undef  KINETIS_NADC15                     /* No 15-channel ADC */
-#  undef  KINETIS_NADC18                     /* No 18-channel ADC */
-#  define KINETIS_NPGA            2          /* Two Programmable Gain Amplifiers */
-#  define KINETIS_NCMP            3          /* Three analog comparators */
-#  define KINETIS_NDAC6           3          /* Three 6-bit DAC */
-#  define KINETIS_NDAC12          2          /* Two 12-bit DAC */
-#  define KINETIS_NVREF           1          /* Voltage reference */
-#  define KINETIS_NTIMERS12       3          /* Three 12 channel timers */
-#  undef  KINETIS_NTIMERS20                  /* No 20 channel timers */
-#  undef  KINETIS_NRNG                       /* No random number generator */
-#  define KINETIS_NRTC            1          /* Real time clock */
-#  undef  KINETIS_NMMCAU                     /* No hardware encryption */
-#  undef  KINETIS_NTAMPER                    /* No tamper detect */
-#  define KINETIS_NCRC            1          /* CRC */
+#  define KINETIS_NI2S            1            /* One I2S module */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 25x8/29x4) */
+#  define KINETIS_NADC16          4            /* Four 16-bit ADC */
+#  undef  KINETIS_NADC12                       /* No 12-channel ADC */
+#  undef  KINETIS_NADC13                       /* No 13-channel ADC */
+#  undef  KINETIS_NADC15                       /* No 15-channel ADC */
+#  undef  KINETIS_NADC18                       /* No 18-channel ADC */
+#  define KINETIS_NPGA            2            /* Two Programmable Gain Amplifiers */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  define KINETIS_NDAC6           3            /* Three 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Two 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  define KINETIS_NTIMERS12       3            /* Three 12 channel timers */
+#  undef  KINETIS_NTIMERS20                    /* No 20 channel timers */
+#  undef  KINETIS_NRNG                         /* No random number generator */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  undef  KINETIS_NMMCAU                       /* No hardware encryption */
+#  undef  KINETIS_NTAMPER                      /* No tamper detect */
+#  define KINETIS_NCRC            1            /* CRC */
 
 #elif defined(CONFIG_ARCH_CHIP_MK40X128VFX50) || defined(CONFIG_ARCH_CHIP_MK40X128VLH50) || \
     defined(CONFIG_ARCH_CHIP_MK40X128VLK50) || defined(CONFIG_ARCH_CHIP_MK40X128VMB50) || \
@@ -254,742 +265,1185 @@
     defined(CONFIG_ARCH_CHIP_MK40X128VFX72) || defined(CONFIG_ARCH_CHIP_MK40X128VLH72) || \
     defined(CONFIG_ARCH_CHIP_MK40X128VLK72) || defined(CONFIG_ARCH_CHIP_MK40X128VMB72) || \
     defined(CONFIG_ARCH_CHIP_MK40X128VLL72) || defined(CONFIG_ARCH_CHIP_MK40X128VML72)
-#  undef  KINETIS_K20                        /* Not Kinetis K20 family */
-#  define KINETIS_K40             1          /* Kinetics K40 family */
-#  undef  KINETIS_K60                        /* Not Kinetis K60 family */
-#  define KINETIS_FLASH_SIZE      (128*1024) /* 128Kb */
-#  define KINETIS_FLEXMEM_SIZE    (32*1024)  /* 32Kb */
-#  define KINETIS_SRAM_SIZE       (32*1024)  /* 32Kb */
-#  undef  KINETIS_MPU                        /* No memory protection unit */
-#  undef  KINETIS_EXTBUS                     /* No external bus interface */
-#  define KINETIS_NDMACH          16         /* Up to 16 DMA channels */
-#  undef  KINETIS_NENET                      /* No Ethernet controller */
-#  define KINETIS_NUSBHOST        1          /* One USB host controller */
-#  define KINETIS_NUSBOTG         1          /* With USB OTG controller */
-#  define KINETIS_NUSBDEV         1          /* One USB device controller */
-#  undef  KINETIS_NSDHC                      /* No SD host controller */
-#  undef  KINETIS_NTOUCHIF                   /* Xtrinsic touch sensing interface */
-#  define KINETIS_NI2C            2          /* Two I2C modules */
-#  undef  KINETIS_NISO7816                   /* No UART with ISO-786 */
-#  define KINETIS_NUART           6          /* Six UARTs */
-#  define KINETIS_NSPI            3          /* Three SPI modules */
-#  define KINETIS_NCAN            2          /* Two CAN controllers */
-#  define KINETIS_NI2S            1          /* One I2S module */
-#  define KINETIS_NSLCD           1          /* One segment LCD interface (up to 36x8/40x4) */
-#  define KINETIS_NADC16          4          /* Four 16-bit ADC */
-#  undef  KINETIS_NADC12                     /* No 12-channel ADC */
-#  undef  KINETIS_NADC13                     /* No 13-channel ADC */
-#  undef  KINETIS_NADC15                     /* No 15-channel ADC */
-#  undef  KINETIS_NADC18                     /* No 18-channel ADC */
-#  define KINETIS_NPGA            2          /* Two Programmable Gain Amplifiers */
-#  define KINETIS_NCMP            3          /* Three analog comparators */
-#  define KINETIS_NDAC6           3          /* Three 6-bit DAC */
-#  define KINETIS_NDAC12          2          /* Two 12-bit DAC */
-#  define KINETIS_NVREF           1          /* Voltage reference */
-#  define KINETIS_NTIMERS12       3          /* Three 12 channel timers */
-#  undef  KINETIS_NTIMERS20                  /* No 20 channel timers */
-#  define KINETIS_NRTC            1          /* Real time clock */
-#  undef  KINETIS_NRNG                       /* No random number generator */
-#  undef  KINETIS_NMMCAU                     /* No hardware encryption */
-#  undef  KINETIS_NTAMPER                    /* No tamper detect */
-#  define KINETIS_NCRC            1          /* CRC */
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  define KINETIS_K40             1            /* Kinetis K40 family */
+#  undef  KINETIS_K60                          /* Not Kinetis K60 family */
+#  undef  KINETIS_K64                          /* Not Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (128*1024)   /* 128Kb */
+#  define KINETIS_FLEXMEM_SIZE    (32*1024)    /* 32Kb */
+#  define KINETIS_SRAM_SIZE       (32*1024)    /* 32Kb */
+#  undef  KINETIS_MPU                          /* No memory protection unit */
+#  undef  KINETIS_EXTBUS                       /* No external bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  undef  KINETIS_NENET                        /* No Ethernet controller */
+#  define KINETIS_NUSBHOST        1            /* One USB host controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  undef  KINETIS_NSDHC                        /* No SD host controller */
+#  undef  KINETIS_NTOUCHIF                     /* Xtrinsic touch sensing interface */
+#  define KINETIS_NI2C            2            /* Two I2C modules */
+#  undef  KINETIS_NISO7816                     /* No UART with ISO-786 */
+#  define KINETIS_NUART           6            /* Six UARTs */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            2            /* Two CAN controllers */
+#  define KINETIS_NI2S            1            /* One I2S module */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          4            /* Four 16-bit ADC */
+#  undef  KINETIS_NADC12                       /* No 12-channel ADC */
+#  undef  KINETIS_NADC13                       /* No 13-channel ADC */
+#  undef  KINETIS_NADC15                       /* No 15-channel ADC */
+#  undef  KINETIS_NADC18                       /* No 18-channel ADC */
+#  define KINETIS_NPGA            2            /* Two Programmable Gain Amplifiers */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  define KINETIS_NDAC6           3            /* Three 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Two 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  define KINETIS_NTIMERS12       3            /* Three 12 channel timers */
+#  undef  KINETIS_NTIMERS20                    /* No 20 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  undef  KINETIS_NRNG                         /* No random number generator */
+#  undef  KINETIS_NMMCAU                       /* No hardware encryption */
+#  undef  KINETIS_NTAMPER                      /* No tamper detect */
+#  define KINETIS_NCRC            1            /* CRC */
 
 #elif defined(CONFIG_ARCH_CHIP_MK40X256VLK72) || defined(CONFIG_ARCH_CHIP_MK40X256VMB72) || \
     defined(CONFIG_ARCH_CHIP_MK40X256VLL72) || defined(CONFIG_ARCH_CHIP_MK40X256VML72)
-#  undef  KINETIS_K20                        /* Not Kinetis K20 family */
-#  define KINETIS_K40             1          /* Kinetics K40 family */
-#  undef  KINETIS_K60                        /* Not Kinetis K60 family */
-#  define KINETIS_FLASH_SIZE      (256*1024) /* 256Kb */
-#  define KINETIS_FLEXMEM_SIZE    (32*1024)  /* 32Kb */
-#  define KINETIS_SRAM_SIZE       (32*1024)  /* 64Kb */
-#  undef  KINETIS_MPU                        /* No memory protection unit */
-#  undef  KINETIS_EXTBUS                     /* No external bus interface */
-#  define KINETIS_NDMACH          16         /* Up to 16 DMA channels */
-#  undef  KINETIS_NENET                      /* No Ethernet controller */
-#  define KINETIS_NUSBHOST        1          /* One USB host controller */
-#  define KINETIS_NUSBOTG         1          /* With USB OTG controller */
-#  define KINETIS_NUSBDEV         1          /* One USB device controller */
-#  undef  KINETIS_NSDHC                      /* No SD host controller */
-#  undef  KINETIS_NTOUCHIF                   /* Xtrinsic touch sensing interface */
-#  define KINETIS_NI2C            2          /* Two I2C modules */
-#  undef  KINETIS_NISO7816                   /* No UART with ISO-786 */
-#  define KINETIS_NUART           6          /* Six UARTs */
-#  define KINETIS_NSPI            3          /* Three SPI modules */
-#  define KINETIS_NCAN            2          /* Two CAN controllers */
-#  define KINETIS_NI2S            1          /* One I2S module */
-#  define KINETIS_NSLCD           1          /* One segment LCD interface (up to 36x8/40x4) */
-#  define KINETIS_NADC16          4          /* Four 16-bit ADC */
-#  undef  KINETIS_NADC12                     /* No 12-channel ADC */
-#  undef  KINETIS_NADC13                     /* No 13-channel ADC */
-#  undef  KINETIS_NADC15                     /* No 15-channel ADC */
-#  undef  KINETIS_NADC18                     /* No 18-channel ADC */
-#  define KINETIS_NPGA            2          /* Two Programmable Gain Amplifiers */
-#  define KINETIS_NCMP            3          /* Three analog comparators */
-#  define KINETIS_NDAC6           3          /* Three 6-bit DAC */
-#  define KINETIS_NDAC12          2          /* Two 12-bit DAC */
-#  define KINETIS_NVREF           1          /* Voltage reference */
-#  define KINETIS_NTIMERS12       3          /* Three 12 channel timers */
-#  undef  KINETIS_NTIMERS20                  /* No 20 channel timers */
-#  define KINETIS_NRTC            1          /* Real time clock */
-#  undef  KINETIS_NRNG                       /* No random number generator */
-#  undef  KINETIS_NMMCAU                     /* No hardware encryption */
-#  undef  KINETIS_NTAMPER                    /* No tamper detect */
-#  define KINETIS_NCRC            1          /* CRC */
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  define KINETIS_K40             1            /* Kinetis K40 family */
+#  undef  KINETIS_K60                          /* Not Kinetis K60 family */
+#  undef  KINETIS_K64                          /* Not Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (256*1024)   /* 256Kb */
+#  define KINETIS_FLEXMEM_SIZE    (32*1024)    /* 32Kb */
+#  define KINETIS_SRAM_SIZE       (32*1024)    /* 64Kb */
+#  undef  KINETIS_MPU                          /* No memory protection unit */
+#  undef  KINETIS_EXTBUS                       /* No external bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  undef  KINETIS_NENET                        /* No Ethernet controller */
+#  define KINETIS_NUSBHOST        1            /* One USB host controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  undef  KINETIS_NSDHC                        /* No SD host controller */
+#  undef  KINETIS_NTOUCHIF                     /* Xtrinsic touch sensing interface */
+#  define KINETIS_NI2C            2            /* Two I2C modules */
+#  undef  KINETIS_NISO7816                     /* No UART with ISO-786 */
+#  define KINETIS_NUART           6            /* Six UARTs */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            2            /* Two CAN controllers */
+#  define KINETIS_NI2S            1            /* One I2S module */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          4            /* Four 16-bit ADC */
+#  undef  KINETIS_NADC12                       /* No 12-channel ADC */
+#  undef  KINETIS_NADC13                       /* No 13-channel ADC */
+#  undef  KINETIS_NADC15                       /* No 15-channel ADC */
+#  undef  KINETIS_NADC18                       /* No 18-channel ADC */
+#  define KINETIS_NPGA            2            /* Two Programmable Gain Amplifiers */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  define KINETIS_NDAC6           3            /* Three 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Two 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  define KINETIS_NTIMERS12       3            /* Three 12 channel timers */
+#  undef  KINETIS_NTIMERS20                    /* No 20 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  undef  KINETIS_NRNG                         /* No random number generator */
+#  undef  KINETIS_NMMCAU                       /* No hardware encryption */
+#  undef  KINETIS_NTAMPER                      /* No tamper detect */
+#  define KINETIS_NCRC            1            /* CRC */
 
 #elif defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100)
-#  undef  KINETIS_K20                        /* Not Kinetis K20 family */
-#  define KINETIS_K40             1          /* Kinetics K40 family */
-#  undef  KINETIS_K60                        /* Not Kinetis K60 family */
-#  define KINETIS_FLASH_SIZE      (128*1024) /* 128Kb */
-#  define KINETIS_FLEXMEM_SIZE    (128*1024) /* 128Kb */
-#  define KINETIS_SRAM_SIZE       (32*1024)  /* 32Kb */
-#  define KINETIS_MPU             1          /* Memory protection unit */
-#  define KINETIS_EXTBUS          1          /* External bus interface */
-#  define KINETIS_NDMACH          16         /* Up to 16 DMA channels */
-#  undef  KINETIS_NENET                      /* No Ethernet controller */
-#  define KINETIS_NUSBHOST        1          /* One USB host controller */
-#  define KINETIS_NUSBOTG         1          /* With USB OTG controller */
-#  define KINETIS_NUSBDEV         1          /* One USB device controller */
-#  define KINETIS_NSDHC           1          /* One SD host controller */
-#  undef  KINETIS_NTOUCHIF                   /* Xtrinsic touch sensing interface */
-#  define KINETIS_NI2C            2          /* Two I2C modules */
-#  undef  KINETIS_NISO7816                   /* No UART with ISO-786 */
-#  define KINETIS_NUART           6          /* Six UARTs */
-#  define KINETIS_NSPI            3          /* Three SPI modules */
-#  define KINETIS_NCAN            2          /* Two CAN controllers */
-#  define KINETIS_NI2S            1          /* One I2S module */
-#  define KINETIS_NSLCD           1          /* One segment LCD interface (up to 40x8/44x4)*/
-#  define KINETIS_NADC16          4          /* Four 16-bit ADC */
-#  undef  KINETIS_NADC12                     /* No 12-channel ADC */
-#  undef  KINETIS_NADC13                     /* No 13-channel ADC */
-#  undef  KINETIS_NADC15                     /* No 15-channel ADC */
-#  undef  KINETIS_NADC18                     /* No 18-channel ADC */
-#  define KINETIS_NPGA            2          /* Two Programmable Gain Amplifiers */
-#  define KINETIS_NCMP            3          /* Three analog comparators */
-#  define KINETIS_NDAC6           3          /* Three 6-bit DAC */
-#  define KINETIS_NDAC12          2          /* Two 12-bit DAC */
-#  define KINETIS_NVREF           1          /* Voltage reference */
-#  define KINETIS_NTIMERS12       3          /* Three 12 channel timers */
-#  undef  KINETIS_NTIMERS20                  /* No 20 channel timers */
-#  define KINETIS_NRTC            1          /* Real time clock */
-#  undef  KINETIS_NRNG                       /* No random number generator */
-#  undef  KINETIS_NMMCAU                     /* No hardware encryption */
-#  undef  KINETIS_NTAMPER                    /* No tamper detect */
-#  define KINETIS_NCRC            1          /* CRC */
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  define KINETIS_K40             1            /* Kinetis K40 family */
+#  undef  KINETIS_K60                          /* Not Kinetis K60 family */
+#  undef  KINETIS_K64                          /* Not Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (128*1024)   /* 128Kb */
+#  define KINETIS_FLEXMEM_SIZE    (128*1024)   /* 128Kb */
+#  define KINETIS_SRAM_SIZE       (32*1024)    /* 32Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  undef  KINETIS_NENET                        /* No Ethernet controller */
+#  define KINETIS_NUSBHOST        1            /* One USB host controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* One SD host controller */
+#  undef  KINETIS_NTOUCHIF                     /* Xtrinsic touch sensing interface */
+#  define KINETIS_NI2C            2            /* Two I2C modules */
+#  undef  KINETIS_NISO7816                     /* No UART with ISO-786 */
+#  define KINETIS_NUART           6            /* Six UARTs */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            2            /* Two CAN controllers */
+#  define KINETIS_NI2S            1            /* One I2S module */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 40x8/44x4)*/
+#  define KINETIS_NADC16          4            /* Four 16-bit ADC */
+#  undef  KINETIS_NADC12                       /* No 12-channel ADC */
+#  undef  KINETIS_NADC13                       /* No 13-channel ADC */
+#  undef  KINETIS_NADC15                       /* No 15-channel ADC */
+#  undef  KINETIS_NADC18                       /* No 18-channel ADC */
+#  define KINETIS_NPGA            2            /* Two Programmable Gain Amplifiers */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  define KINETIS_NDAC6           3            /* Three 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Two 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  define KINETIS_NTIMERS12       3            /* Three 12 channel timers */
+#  undef  KINETIS_NTIMERS20                    /* No 20 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  undef  KINETIS_NRNG                         /* No random number generator */
+#  undef  KINETIS_NMMCAU                       /* No hardware encryption */
+#  undef  KINETIS_NTAMPER                      /* No tamper detect */
+#  define KINETIS_NCRC            1            /* CRC */
 
 #elif defined(CONFIG_ARCH_CHIP_MK40X256VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X256VMD100)
-#  undef  KINETIS_K20                        /* Not Kinetis K20 family */
-#  define KINETIS_K40             1          /* Kinetics K40 family */
-#  undef  KINETIS_K60                        /* Not Kinetis K60 family */
-#  define KINETIS_FLASH_SIZE      (256*1024) /* 256Kb */
-#  define KINETIS_FLEXMEM_SIZE    (256*1024) /* 256Kb */
-#  define KINETIS_SRAM_SIZE       (64*1024)  /* 32Kb */
-#  define KINETIS_MPU             1          /* Memory protection unit */
-#  define KINETIS_EXTBUS          1          /* External bus interface */
-#  define KINETIS_NDMACH          16         /* Up to 16 DMA channels */
-#  undef  KINETIS_NENET                      /* No Ethernet controller */
-#  define KINETIS_NUSBHOST        1          /* One USB host controller */
-#  define KINETIS_NUSBOTG         1          /* With USB OTG controller */
-#  define KINETIS_NUSBDEV         1          /* One USB device controller */
-#  define KINETIS_NSDHC           1          /* One SD host controller */
-#  undef  KINETIS_NTOUCHIF                   /* Xtrinsic touch sensing interface */
-#  define KINETIS_NI2C            2          /* Two I2C modules */
-#  undef  KINETIS_NISO7816                   /* No UART with ISO-786 */
-#  define KINETIS_NUART           6          /* Six UARTs */
-#  define KINETIS_NSPI            3          /* Three SPI modules */
-#  define KINETIS_NCAN            2          /* Two CAN controllers */
-#  define KINETIS_NI2S            1          /* One I2S module */
-#  define KINETIS_NSLCD           1          /* One segment LCD interface (up to 40x8/44x4)*/
-#  define KINETIS_NADC16          4          /* Four 16-bit ADC */
-#  undef  KINETIS_NADC12                     /* No 12-channel ADC */
-#  undef  KINETIS_NADC13                     /* No 13-channel ADC */
-#  undef  KINETIS_NADC15                     /* No 15-channel ADC */
-#  undef  KINETIS_NADC18                     /* No 18-channel ADC */
-#  define KINETIS_NPGA            2          /* Two Programmable Gain Amplifiers */
-#  define KINETIS_NCMP            3          /* Three analog comparators */
-#  define KINETIS_NDAC6           3          /* Three 6-bit DAC */
-#  define KINETIS_NDAC12          2          /* Two 12-bit DAC */
-#  define KINETIS_NVREF           1          /* Voltage reference */
-#  define KINETIS_NTIMERS12       3          /* Three 12 channel timers */
-#  undef  KINETIS_NTIMERS20                  /* No 20 channel timers */
-#  define KINETIS_NRTC            1          /* Real time clock */
-#  undef  KINETIS_NRNG                       /* No random number generator */
-#  undef  KINETIS_NMMCAU                     /* No hardware encryption */
-#  undef  KINETIS_NTAMPER                    /* No tamper detect */
-#  define KINETIS_NCRC            1          /* CRC */
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  define KINETIS_K40             1            /* Kinetis K40 family */
+#  undef  KINETIS_K60                          /* Not Kinetis K60 family */
+#  undef  KINETIS_K64                          /* Not Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (256*1024)   /* 256Kb */
+#  define KINETIS_FLEXMEM_SIZE    (256*1024)   /* 256Kb */
+#  define KINETIS_SRAM_SIZE       (64*1024)    /* 32Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  undef  KINETIS_NENET                        /* No Ethernet controller */
+#  define KINETIS_NUSBHOST        1            /* One USB host controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* One SD host controller */
+#  undef  KINETIS_NTOUCHIF                     /* Xtrinsic touch sensing interface */
+#  define KINETIS_NI2C            2            /* Two I2C modules */
+#  undef  KINETIS_NISO7816                     /* No UART with ISO-786 */
+#  define KINETIS_NUART           6            /* Six UARTs */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            2            /* Two CAN controllers */
+#  define KINETIS_NI2S            1            /* One I2S module */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 40x8/44x4)*/
+#  define KINETIS_NADC16          4            /* Four 16-bit ADC */
+#  undef  KINETIS_NADC12                       /* No 12-channel ADC */
+#  undef  KINETIS_NADC13                       /* No 13-channel ADC */
+#  undef  KINETIS_NADC15                       /* No 15-channel ADC */
+#  undef  KINETIS_NADC18                       /* No 18-channel ADC */
+#  define KINETIS_NPGA            2            /* Two Programmable Gain Amplifiers */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  define KINETIS_NDAC6           3            /* Three 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Two 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  define KINETIS_NTIMERS12       3            /* Three 12 channel timers */
+#  undef  KINETIS_NTIMERS20                    /* No 20 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  undef  KINETIS_NRNG                         /* No random number generator */
+#  undef  KINETIS_NMMCAU                       /* No hardware encryption */
+#  undef  KINETIS_NTAMPER                      /* No tamper detect */
+#  define KINETIS_NCRC            1            /* CRC */
 
 #elif defined(CONFIG_ARCH_CHIP_MK40N512VLK100) || defined(CONFIG_ARCH_CHIP_MK40N512VMB100) || \
       defined(CONFIG_ARCH_CHIP_MK40N512VLL100) || defined(CONFIG_ARCH_CHIP_MK40N512VML100) || \
       defined(CONFIG_ARCH_CHIP_MK40N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK40N512VMD100)
-#  undef  KINETIS_K20                        /* Not Kinetis K20 family */
-#  define KINETIS_K40             1          /* Kinetics K40 family */
-#  undef  KINETIS_K60                        /* Not Kinetis K60 family */
-#  define KINETIS_FLASH_SIZE      (512*1024) /* 512Kb */
-#  undef  KINETIS_FLEXMEM_SIZE               /* No FlexMemory */
-#  define KINETIS_SRAM_SIZE       (128*1024) /* 128Kb */
-#  define KINETIS_MPU             1          /* Memory protection unit */
-#  define KINETIS_EXTBUS          1          /* External bus interface */
-#  define KINETIS_NDMACH          16         /* Up to 16 DMA channels */
-#  undef  KINETIS_NENET                      /* No Ethernet controller */
-#  define KINETIS_NUSBHOST        1          /* One USB host controller */
-#  define KINETIS_NUSBOTG         1          /* With USB OTG controller */
-#  define KINETIS_NUSBDEV         1          /* One USB device controller */
-#  define KINETIS_NSDHC           1          /* One SD host controller */
-#  undef  KINETIS_NTOUCHIF                   /* Xtrinsic touch sensing interface */
-#  define KINETIS_NI2C            2          /* Two I2C modules */
-#  undef  KINETIS_NISO7816                   /* No UART with ISO-786 */
-#  define KINETIS_NUART           6          /* Six UARTs */
-#  define KINETIS_NSPI            3          /* Three SPI modules */
-#  define KINETIS_NCAN            2          /* Two CAN controllers */
-#  define KINETIS_NI2S            1          /* One I2S module */
-#  define KINETIS_NSLCD           1          /* One segment LCD interface (up to 40x8/44x4)*/
-#  define KINETIS_NADC16          4          /* Four 16-bit ADC */
-#  undef  KINETIS_NADC12                     /* No 12-channel ADC */
-#  undef  KINETIS_NADC13                     /* No 13-channel ADC */
-#  undef  KINETIS_NADC15                     /* No 15-channel ADC */
-#  undef  KINETIS_NADC18                     /* No 18-channel ADC */
-#  define KINETIS_NPGA            2          /* Two Programmable Gain Amplifiers */
-#  define KINETIS_NCMP            3          /* Three analog comparators */
-#  define KINETIS_NDAC6           3          /* Three 6-bit DAC */
-#  define KINETIS_NDAC12          2          /* Two 12-bit DAC */
-#  define KINETIS_NVREF           1          /* Voltage reference */
-#  define KINETIS_NTIMERS12       3          /* Three 12 channel timers */
-#  undef  KINETIS_NTIMERS20                  /* No 20 channel timers */
-#  define KINETIS_NRTC            1          /* Real time clock */
-#  undef  KINETIS_NRNG                       /* No random number generator */
-#  undef  KINETIS_NMMCAU                     /* No hardware encryption */
-#  undef  KINETIS_NTAMPER                    /* No tamper detect */
-#  define KINETIS_NCRC            1          /* CRC */
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  define KINETIS_K40             1            /* Kinetis K40 family */
+#  undef  KINETIS_K60                          /* Not Kinetis K60 family */
+#  undef  KINETIS_K64                          /* Not Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (512*1024)   /* 512Kb */
+#  undef  KINETIS_FLEXMEM_SIZE                 /* No FlexMemory */
+#  define KINETIS_SRAM_SIZE       (128*1024)   /* 128Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  undef  KINETIS_NENET                        /* No Ethernet controller */
+#  define KINETIS_NUSBHOST        1            /* One USB host controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* One SD host controller */
+#  undef  KINETIS_NTOUCHIF                     /* Xtrinsic touch sensing interface */
+#  define KINETIS_NI2C            2            /* Two I2C modules */
+#  undef  KINETIS_NISO7816                     /* No UART with ISO-786 */
+#  define KINETIS_NUART           6            /* Six UARTs */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            2            /* Two CAN controllers */
+#  define KINETIS_NI2S            1            /* One I2S module */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 40x8/44x4)*/
+#  define KINETIS_NADC16          4            /* Four 16-bit ADC */
+#  undef  KINETIS_NADC12                       /* No 12-channel ADC */
+#  undef  KINETIS_NADC13                       /* No 13-channel ADC */
+#  undef  KINETIS_NADC15                       /* No 15-channel ADC */
+#  undef  KINETIS_NADC18                       /* No 18-channel ADC */
+#  define KINETIS_NPGA            2            /* Two Programmable Gain Amplifiers */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  define KINETIS_NDAC6           3            /* Three 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Two 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  define KINETIS_NTIMERS12       3            /* Three 12 channel timers */
+#  undef  KINETIS_NTIMERS20                    /* No 20 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  undef  KINETIS_NRNG                         /* No random number generator */
+#  undef  KINETIS_NMMCAU                       /* No hardware encryption */
+#  undef  KINETIS_NTAMPER                      /* No tamper detect */
+#  define KINETIS_NCRC            1            /* CRC */
 
 #elif defined(CONFIG_ARCH_CHIP_MK60N256VLL100)
-#  undef  KINETIS_K20                        /* Not Kinetis K20 family */
-#  undef  KINETIS_K40                        /* Not Kinetics K40 family */
-#  define KINETIS_K60             1          /* Kinetis K60 family */
-#  define KINETIS_FLASH_SIZE      (256*1024) /* 256Kb */
-#  undef  KINETIS_FLEXNVM_SIZE               /* No FlexNVM */
-#  undef  KINETIS_FLEXRAM_SIZE               /* No FlexRAM */
-#  define KINETIS_SRAM_SIZE       (64*1024)  /* 64Kb */
-#  define KINETIS_MPU             1          /* Memory protection unit */
-#  define KINETIS_EXTBUS          1          /* External bus interface */
-#  define KINETIS_NDMACH          16         /* Up to 16 DMA channels */
-#  define KINETIS_NENET           1          /* One IEEE 1588 Ethernet controller */
-#  define KINETIS_NUSBHOST        1          /* One USB host controller */
-#  define KINETIS_NUSBOTG         1          /* With USB OTG controller */
-#  define KINETIS_NUSBDEV         1          /* One USB device controller */
-#  define KINETIS_NSDHC           1          /* SD host controller */
-#  define KINETIS_NTOUCHIF        1          /* Xtrinsic touch sensing interface */
-#  define KINETIS_NI2C            3          /* Three I2C modules */
-#  define KINETIS_NISO7816        1          /* One UART with ISO-786 */
-#  define KINETIS_NUART           4          /* Four additional UARTs */
-#  define KINETIS_NSPI            3          /* Three SPI modules */
-#  define KINETIS_NCAN            2          /* Two CAN controllers */
-#  define KINETIS_NI2S            2          /* Two I2S modules */
-#  define KINETIS_NSLCD           1          /* One segment LCD interface (up to 36x8/40x4) */
-#  define KINETIS_NADC16          4          /* Four 16-bit ADC */
-#  define KINETIS_NADC12          1          /* One 12-channel ADC (ADC0)*/
-#  define KINETIS_NADC13          1          /* No 13-channel ADC (ADC1) */
-#  undef  KINETIS_NADC15                     /* No 15-channel ADC */
-#  undef  KINETIS_NADC18                     /* No 18-channel ADC */
-#  define KINETIS_NPGA            4          /* Four Programmable Gain Amplifiers */
-#  define KINETIS_NCMP            3          /* Three analog comparators */
-#  undef  KINETIS_NDAC6                      /* No 6-bit DAC */
-#  define KINETIS_NDAC12          1          /* One 12-bit DAC */
-#  define KINETIS_NVREF           1          /* Voltage reference */
-#  undef  KINETIS_NTIMERS12                  /* No 12 channel timers */
-#  define KINETIS_NTIMERS20       4          /* Four 20 channel timers */
-#  define KINETIS_NTIMERS12       3          /* Three 12 channel timers */
-#  undef  KINETIS_NTIMERS20                  /* No 20 channel timers */
-#  define KINETIS_NRTC            1          /* Real time clock */
-#  undef  KINETIS_NRNG                       /* No random number generator */
-#  undef  KINETIS_NMMCAU                     /* No hardware encryption */
-#  undef  KINETIS_NTAMPER                    /* No tamper detect */
-#  define KINETIS_NCRC            1          /* CRC */
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  define KINETIS_K60             1            /* Kinetis K60 family */
+#  undef  KINETIS_K64                          /* Not Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (256*1024)   /* 256Kb */
+#  undef  KINETIS_FLEXNVM_SIZE                 /* No FlexNVM */
+#  undef  KINETIS_FLEXRAM_SIZE                 /* No FlexRAM */
+#  define KINETIS_SRAM_SIZE       (64*1024)    /* 64Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_NUSBHOST        1            /* One USB host controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NTOUCHIF        1            /* Xtrinsic touch sensing interface */
+#  define KINETIS_NI2C            3            /* Three I2C modules */
+#  define KINETIS_NISO7816        1            /* One UART with ISO-786 */
+#  define KINETIS_NUART           4            /* Four additional UARTs */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            2            /* Two CAN controllers */
+#  define KINETIS_NI2S            2            /* Two I2S modules */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          4            /* Four 16-bit ADC */
+#  define KINETIS_NADC12          1            /* One 12-channel ADC (ADC0)*/
+#  define KINETIS_NADC13          1            /* No 13-channel ADC (ADC1) */
+#  undef  KINETIS_NADC15                       /* No 15-channel ADC */
+#  undef  KINETIS_NADC18                       /* No 18-channel ADC */
+#  define KINETIS_NPGA            4            /* Four Programmable Gain Amplifiers */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  undef  KINETIS_NDAC6                        /* No 6-bit DAC */
+#  define KINETIS_NDAC12          1            /* One 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  undef  KINETIS_NTIMERS12                    /* No 12 channel timers */
+#  define KINETIS_NTIMERS20       4            /* Four 20 channel timers */
+#  define KINETIS_NTIMERS12       3            /* Three 12 channel timers */
+#  undef  KINETIS_NTIMERS20                    /* No 20 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  undef  KINETIS_NRNG                         /* No random number generator */
+#  undef  KINETIS_NMMCAU                       /* No hardware encryption */
+#  undef  KINETIS_NTAMPER                      /* No tamper detect */
+#  define KINETIS_NCRC            1            /* CRC */
 
 #elif defined(CONFIG_ARCH_CHIP_MK60X256VLL100)
-#  undef  KINETIS_K20                        /* Not Kinetis K20 family */
-#  undef  KINETIS_K40                        /* Not Kinetics K40 family */
-#  define KINETIS_K60             1          /* Kinetis K60 family */
-#  define KINETIS_FLASH_SIZE      (256*1024) /* 256Kb */
-#  define KINETIS_FLEXNVM_SIZE    (256*1024) /* 256Kb  */
-#  define KINETIS_FLEXRAM_SIZE    (4*1024)   /* 32Kb */
-#  define KINETIS_SRAM_SIZE       (64*1024)  /* 64Kb */
-#  define KINETIS_MPU             1          /* Memory protection unit */
-#  define KINETIS_EXTBUS          1          /* External bus interface */
-#  define KINETIS_NDMACH          16         /* Up to 16 DMA channels */
-#  define KINETIS_NENET           1          /* One IEEE 1588 Ethernet controller */
-#  define KINETIS_NUSBHOST        1          /* One USB host controller */
-#  define KINETIS_NUSBOTG         1          /* With USB OTG controller */
-#  define KINETIS_NUSBDEV         1          /* One USB device controller */
-#  define KINETIS_NSDHC           1          /* SD host controller */
-#  define KINETIS_NTOUCHIF        1          /* Xtrinsic touch sensing interface */
-#  define KINETIS_NI2C            3          /* Three I2C modules */
-#  define KINETIS_NISO7816        1          /* One UART with ISO-786 */
-#  define KINETIS_NUART           4          /* Four additional UARTs */
-#  define KINETIS_NSPI            3          /* Three SPI modules */
-#  define KINETIS_NCAN            2          /* Two CAN controllers */
-#  define KINETIS_NI2S            2          /* Two I2S modules */
-#  define KINETIS_NSLCD           1          /* One segment LCD interface (up to 36x8/40x4) */
-#  define KINETIS_NADC16          4          /* Four 16-bit ADC */
-#  define KINETIS_NADC12          1          /* One 12-channel ADC (ADC0)*/
-#  define KINETIS_NADC13          1          /* No 13-channel ADC (ADC1) */
-#  undef  KINETIS_NADC15                     /* No 15-channel ADC */
-#  undef  KINETIS_NADC18                     /* No 18-channel ADC */
-#  define KINETIS_NPGA            4          /* Four Programmable Gain Amplifiers */
-#  define KINETIS_NCMP            3          /* Three analog comparators */
-#  undef  KINETIS_NDAC6                      /* No 6-bit DAC */
-#  define KINETIS_NDAC12          1          /* One 12-bit DAC */
-#  define KINETIS_NVREF           1          /* Voltage reference */
-#  undef  KINETIS_NTIMERS12                  /* No 12 channel timers */
-#  define KINETIS_NTIMERS20       4          /* Four 20 channel timers */
-#  define KINETIS_NTIMERS12       3          /* Three 12 channel timers */
-#  undef  KINETIS_NTIMERS20                  /* No 20 channel timers */
-#  define KINETIS_NRTC            1          /* Real time clock */
-#  undef  KINETIS_NRNG                       /* No random number generator */
-#  undef  KINETIS_NMMCAU                     /* No hardware encryption */
-#  undef  KINETIS_NTAMPER                    /* No tamper detect */
-#  define KINETIS_NCRC            1          /* CRC */
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  define KINETIS_K60             1            /* Kinetis K60 family */
+#  undef  KINETIS_K64                          /* Not Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (256*1024)   /* 256Kb */
+#  define KINETIS_FLEXNVM_SIZE    (256*1024)   /* 256Kb  */
+#  define KINETIS_FLEXRAM_SIZE    (4*1024)     /* 32Kb */
+#  define KINETIS_SRAM_SIZE       (64*1024)    /* 64Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_NUSBHOST        1            /* One USB host controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NTOUCHIF        1            /* Xtrinsic touch sensing interface */
+#  define KINETIS_NI2C            3            /* Three I2C modules */
+#  define KINETIS_NISO7816        1            /* One UART with ISO-786 */
+#  define KINETIS_NUART           4            /* Four additional UARTs */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            2            /* Two CAN controllers */
+#  define KINETIS_NI2S            2            /* Two I2S modules */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          4            /* Four 16-bit ADC */
+#  define KINETIS_NADC12          1            /* One 12-channel ADC (ADC0)*/
+#  define KINETIS_NADC13          1            /* No 13-channel ADC (ADC1) */
+#  undef  KINETIS_NADC15                       /* No 15-channel ADC */
+#  undef  KINETIS_NADC18                       /* No 18-channel ADC */
+#  define KINETIS_NPGA            4            /* Four Programmable Gain Amplifiers */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  undef  KINETIS_NDAC6                        /* No 6-bit DAC */
+#  define KINETIS_NDAC12          1            /* One 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  undef  KINETIS_NTIMERS12                    /* No 12 channel timers */
+#  define KINETIS_NTIMERS20       4            /* Four 20 channel timers */
+#  define KINETIS_NTIMERS12       3            /* Three 12 channel timers */
+#  undef  KINETIS_NTIMERS20                    /* No 20 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  undef  KINETIS_NRNG                         /* No random number generator */
+#  undef  KINETIS_NMMCAU                       /* No hardware encryption */
+#  undef  KINETIS_NTAMPER                      /* No tamper detect */
+#  define KINETIS_NCRC            1            /* CRC */
 
 #elif defined(CONFIG_ARCH_CHIP_MK60N512VLL100)
-#  undef  KINETIS_K20                        /* Not Kinetis K20 family */
-#  undef  KINETIS_K40                        /* Not Kinetics K40 family */
-#  define KINETIS_K60             1          /* Kinetis K60 family */
-#  define KINETIS_FLASH_SIZE      (512*1024) /* 256Kb */
-#  undef  KINETIS_FLEXNVM_SIZE               /* No FlexNVM */
-#  undef  KINETIS_FLEXRAM_SIZE               /* No FlexRAM */
-#  define KINETIS_SRAM_SIZE       (128*1024) /* 128Kb */
-#  define KINETIS_MPU             1          /* Memory protection unit */
-#  define KINETIS_EXTBUS          1          /* External bus interface */
-#  define KINETIS_NDMACH          16         /* Up to 16 DMA channels */
-#  define KINETIS_NENET           1          /* One IEEE 1588 Ethernet controller */
-#  define KINETIS_ENET_HAS_DBSWAP            /* MAC-NET supports DBSWP bit */
-#  define KINETIS_NUSBHOST        1          /* One USB host controller */
-#  define KINETIS_NUSBOTG         1          /* With USB OTG controller */
-#  define KINETIS_NUSBDEV         1          /* One USB device controller */
-#  define KINETIS_NSDHC           1          /* SD host controller */
-#  define KINETIS_NTOUCHIF        1          /* Xtrinsic touch sensing interface */
-#  define KINETIS_NI2C            3          /* Three I2C modules */
-#  define KINETIS_NISO7816        1          /* One UART with ISO-786 */
-#  define KINETIS_NUART           4          /* Four additional UARTs */
-#  define KINETIS_NSPI            3          /* Three SPI modules */
-#  define KINETIS_NCAN            2          /* Two CAN controllers */
-#  define KINETIS_NI2S            2          /* Two I2S modules */
-#  define KINETIS_NSLCD           1          /* One segment LCD interface (up to 36x8/40x4) */
-#  define KINETIS_NADC16          4          /* Four 16-bit ADC */
-#  define KINETIS_NADC12          1          /* One 12-channel ADC (ADC0)*/
-#  define KINETIS_NADC13          1          /* No 13-channel ADC (ADC1) */
-#  undef  KINETIS_NADC15                     /* No 15-channel ADC */
-#  undef  KINETIS_NADC18                     /* No 18-channel ADC */
-#  define KINETIS_NPGA            4          /* Four Programmable Gain Amplifiers */
-#  define KINETIS_NCMP            3          /* Three analog comparators */
-#  undef  KINETIS_NDAC6                      /* No 6-bit DAC */
-#  define KINETIS_NDAC12          1          /* One 12-bit DAC */
-#  define KINETIS_NVREF           1          /* Voltage reference */
-#  undef  KINETIS_NTIMERS12                  /* No 12 channel timers */
-#  define KINETIS_NTIMERS20       4          /* Four 20 channel timers */
-#  define KINETIS_NTIMERS12       3          /* Three 12 channel timers */
-#  undef  KINETIS_NTIMERS20                  /* No 20 channel timers */
-#  define KINETIS_NRTC            1          /* Real time clock */
-#  undef  KINETIS_NRNG                       /* No random number generator */
-#  undef  KINETIS_NMMCAU                     /* No hardware encryption */
-#  undef  KINETIS_NTAMPER                    /* No tamper detect */
-#  define KINETIS_NCRC            1          /* CRC */
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  define KINETIS_K60             1            /* Kinetis K60 family */
+#  undef  KINETIS_K64                          /* Not Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (512*1024)   /* 256Kb */
+#  undef  KINETIS_FLEXNVM_SIZE                 /* No FlexNVM */
+#  undef  KINETIS_FLEXRAM_SIZE                 /* No FlexRAM */
+#  define KINETIS_SRAM_SIZE       (128*1024)   /* 128Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_ENET_HAS_DBSWAP              /* MAC-NET supports DBSWP bit */
+#  define KINETIS_NUSBHOST        1            /* One USB host controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NTOUCHIF        1            /* Xtrinsic touch sensing interface */
+#  define KINETIS_NI2C            3            /* Three I2C modules */
+#  define KINETIS_NISO7816        1            /* One UART with ISO-786 */
+#  define KINETIS_NUART           4            /* Four additional UARTs */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            2            /* Two CAN controllers */
+#  define KINETIS_NI2S            2            /* Two I2S modules */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          4            /* Four 16-bit ADC */
+#  define KINETIS_NADC12          1            /* One 12-channel ADC (ADC0)*/
+#  define KINETIS_NADC13          1            /* No 13-channel ADC (ADC1) */
+#  undef  KINETIS_NADC15                       /* No 15-channel ADC */
+#  undef  KINETIS_NADC18                       /* No 18-channel ADC */
+#  define KINETIS_NPGA            4            /* Four Programmable Gain Amplifiers */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  undef  KINETIS_NDAC6                        /* No 6-bit DAC */
+#  define KINETIS_NDAC12          1            /* One 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  undef  KINETIS_NTIMERS12                    /* No 12 channel timers */
+#  define KINETIS_NTIMERS20       4            /* Four 20 channel timers */
+#  define KINETIS_NTIMERS12       3            /* Three 12 channel timers */
+#  undef  KINETIS_NTIMERS20                    /* No 20 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  undef  KINETIS_NRNG                         /* No random number generator */
+#  undef  KINETIS_NMMCAU                       /* No hardware encryption */
+#  undef  KINETIS_NTAMPER                      /* No tamper detect */
+#  define KINETIS_NCRC            1            /* CRC */
 
 #elif defined(CONFIG_ARCH_CHIP_MK60N256VML100)
-#  undef  KINETIS_K20                        /* Not Kinetis K20 family */
-#  undef  KINETIS_K40                        /* Not Kinetics K40 family */
-#  define KINETIS_K60             1          /* Kinetis K60 family */
-#  define KINETIS_FLASH_SIZE      (256*1024) /* 256Kb */
-#  undef  KINETIS_FLEXNVM_SIZE               /* No FlexNVM */
-#  undef  KINETIS_FLEXRAM_SIZE               /* No FlexRAM */
-#  define KINETIS_SRAM_SIZE       (64*1024)  /* 64Kb */
-#  define KINETIS_MPU             1          /* Memory protection unit */
-#  define KINETIS_EXTBUS          1          /* External bus interface */
-#  define KINETIS_NDMACH          16         /* Up to 16 DMA channels */
-#  define KINETIS_NENET           1          /* One IEEE 1588 Ethernet controller */
-#  define KINETIS_NUSBHOST        1          /* One USB host controller */
-#  define KINETIS_NUSBOTG         1          /* With USB OTG controller */
-#  define KINETIS_NUSBDEV         1          /* One USB device controller */
-#  define KINETIS_NSDHC           1          /* SD host controller */
-#  define KINETIS_NTOUCHIF        1          /* Xtrinsic touch sensing interface */
-#  define KINETIS_NI2C            3          /* Three I2C modules */
-#  define KINETIS_NISO7816        1          /* One UART with ISO-786 */
-#  define KINETIS_NUART           4          /* Four additional UARTs */
-#  define KINETIS_NSPI            3          /* Three SPI modules */
-#  define KINETIS_NCAN            2          /* Two CAN controllers */
-#  define KINETIS_NI2S            2          /* Two I2S modules */
-#  define KINETIS_NSLCD           1          /* One segment LCD interface (up to 36x8/40x4) */
-#  define KINETIS_NADC16          4          /* Four 16-bit ADC */
-#  define KINETIS_NADC12          1          /* One 12-channel ADC (ADC0)*/
-#  undef  KINETIS_NADC13                     /* No 13-channel ADC */
-#  define KINETIS_NADC15          1          /* One 15-channel ADC (ADC1) */
-#  undef  KINETIS_NADC18                     /* No 18-channel ADC */
-#  define KINETIS_NPGA            4          /* Four Programmable Gain Amplifiers */
-#  define KINETIS_NCMP            3          /* Three analog comparators */
-#  undef  KINETIS_NDAC6                      /* No 6-bit DAC */
-#  define KINETIS_NDAC12          1          /* One 12-bit DAC */
-#  define KINETIS_NVREF           1          /* Voltage reference */
-#  undef  KINETIS_NTIMERS12                  /* No 12 channel timers */
-#  define KINETIS_NTIMERS20       4          /* Four 20 channel timers */
-#  define KINETIS_NTIMERS12       3          /* Three 12 channel timers */
-#  undef  KINETIS_NTIMERS20                  /* No 20 channel timers */
-#  define KINETIS_NRTC            1          /* Real time clock */
-#  undef  KINETIS_NRNG                       /* No random number generator */
-#  undef  KINETIS_NMMCAU                     /* No hardware encryption */
-#  undef  KINETIS_NTAMPER                    /* No tamper detect */
-#  define KINETIS_NCRC            1          /* CRC */
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  define KINETIS_K60             1            /* Kinetis K60 family */
+#  undef  KINETIS_K64                          /* Not Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (256*1024)   /* 256Kb */
+#  undef  KINETIS_FLEXNVM_SIZE                 /* No FlexNVM */
+#  undef  KINETIS_FLEXRAM_SIZE                 /* No FlexRAM */
+#  define KINETIS_SRAM_SIZE       (64*1024)    /* 64Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_NUSBHOST        1            /* One USB host controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NTOUCHIF        1            /* Xtrinsic touch sensing interface */
+#  define KINETIS_NI2C            3            /* Three I2C modules */
+#  define KINETIS_NISO7816        1            /* One UART with ISO-786 */
+#  define KINETIS_NUART           4            /* Four additional UARTs */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            2            /* Two CAN controllers */
+#  define KINETIS_NI2S            2            /* Two I2S modules */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          4            /* Four 16-bit ADC */
+#  define KINETIS_NADC12          1            /* One 12-channel ADC (ADC0)*/
+#  undef  KINETIS_NADC13                       /* No 13-channel ADC */
+#  define KINETIS_NADC15          1            /* One 15-channel ADC (ADC1) */
+#  undef  KINETIS_NADC18                       /* No 18-channel ADC */
+#  define KINETIS_NPGA            4            /* Four Programmable Gain Amplifiers */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  undef  KINETIS_NDAC6                        /* No 6-bit DAC */
+#  define KINETIS_NDAC12          1            /* One 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  undef  KINETIS_NTIMERS12                    /* No 12 channel timers */
+#  define KINETIS_NTIMERS20       4            /* Four 20 channel timers */
+#  define KINETIS_NTIMERS12       3            /* Three 12 channel timers */
+#  undef  KINETIS_NTIMERS20                    /* No 20 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  undef  KINETIS_NRNG                         /* No random number generator */
+#  undef  KINETIS_NMMCAU                       /* No hardware encryption */
+#  undef  KINETIS_NTAMPER                      /* No tamper detect */
+#  define KINETIS_NCRC            1            /* CRC */
 
 #elif defined(CONFIG_ARCH_CHIP_MK60X256VML100)
-#  undef  KINETIS_K20                        /* Not Kinetis K20 family */
-#  undef  KINETIS_K40                        /* Not Kinetics K40 family */
-#  define KINETIS_K60             1          /* Kinetis K60 family */
-#  define KINETIS_FLASH_SIZE      (256*1024) /* 256Kb */
-#  define KINETIS_FLEXNVM_SIZE    (256*1024) /* 256Kb */
-#  define KINETIS_FLEXRAM_SIZE    (4*1024)   /* 4Kb */
-#  define KINETIS_SRAM_SIZE       (64*1024)  /* 64Kb */
-#  define KINETIS_MPU             1          /* Memory protection unit */
-#  define KINETIS_EXTBUS          1          /* External bus interface */
-#  define KINETIS_NDMACH          16         /* Up to 16 DMA channels */
-#  define KINETIS_NENET           1          /* One IEEE 1588 Ethernet controller */
-#  define KINETIS_NUSBHOST        1          /* One USB host controller */
-#  define KINETIS_NUSBOTG         1          /* With USB OTG controller */
-#  define KINETIS_NUSBDEV         1          /* One USB device controller */
-#  define KINETIS_NSDHC           1          /* SD host controller */
-#  define KINETIS_NTOUCHIF        1          /* Xtrinsic touch sensing interface */
-#  define KINETIS_NI2C            3          /* Three I2C modules */
-#  define KINETIS_NISO7816        1          /* One UART with ISO-786 */
-#  define KINETIS_NUART           4          /* Four additional UARTs */
-#  define KINETIS_NSPI            3          /* Three SPI modules */
-#  define KINETIS_NCAN            2          /* Two CAN controllers */
-#  define KINETIS_NI2S            2          /* Two I2S modules */
-#  define KINETIS_NSLCD           1          /* One segment LCD interface (up to 36x8/40x4) */
-#  define KINETIS_NADC16          4          /* Four 16-bit ADC */
-#  define KINETIS_NADC12          1          /* One 12-channel ADC (ADC0)*/
-#  undef  KINETIS_NADC13                     /* No 13-channel ADC */
-#  define KINETIS_NADC15          1          /* One 15-channel ADC (ADC1) */
-#  undef  KINETIS_NADC18                     /* No 18-channel ADC */
-#  define KINETIS_NPGA            4          /* Four Programmable Gain Amplifiers */
-#  define KINETIS_NCMP            3          /* Three analog comparators */
-#  undef  KINETIS_NDAC6                      /* No 6-bit DAC */
-#  define KINETIS_NDAC12          1          /* One 12-bit DAC */
-#  define KINETIS_NVREF           1          /* Voltage reference */
-#  undef  KINETIS_NTIMERS12                  /* No 12 channel timers */
-#  define KINETIS_NTIMERS20       4          /* Four 20 channel timers */
-#  define KINETIS_NTIMERS12       3          /* Three 12 channel timers */
-#  undef  KINETIS_NTIMERS20                  /* No 20 channel timers */
-#  define KINETIS_NRTC            1          /* Real time clock */
-#  undef  KINETIS_NRNG                       /* No random number generator */
-#  undef  KINETIS_NMMCAU                     /* No hardware encryption */
-#  undef  KINETIS_NTAMPER                    /* No tamper detect */
-#  define KINETIS_NCRC            1          /* CRC */
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  define KINETIS_K60             1            /* Kinetis K60 family */
+#  undef  KINETIS_K64                          /* Not Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (256*1024)   /* 256Kb */
+#  define KINETIS_FLEXNVM_SIZE    (256*1024)   /* 256Kb */
+#  define KINETIS_FLEXRAM_SIZE    (4*1024)     /* 4Kb */
+#  define KINETIS_SRAM_SIZE       (64*1024)    /* 64Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_NUSBHOST        1            /* One USB host controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NTOUCHIF        1            /* Xtrinsic touch sensing interface */
+#  define KINETIS_NI2C            3            /* Three I2C modules */
+#  define KINETIS_NISO7816        1            /* One UART with ISO-786 */
+#  define KINETIS_NUART           4            /* Four additional UARTs */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            2            /* Two CAN controllers */
+#  define KINETIS_NI2S            2            /* Two I2S modules */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          4            /* Four 16-bit ADC */
+#  define KINETIS_NADC12          1            /* One 12-channel ADC (ADC0)*/
+#  undef  KINETIS_NADC13                       /* No 13-channel ADC */
+#  define KINETIS_NADC15          1            /* One 15-channel ADC (ADC1) */
+#  undef  KINETIS_NADC18                       /* No 18-channel ADC */
+#  define KINETIS_NPGA            4            /* Four Programmable Gain Amplifiers */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  undef  KINETIS_NDAC6                        /* No 6-bit DAC */
+#  define KINETIS_NDAC12          1            /* One 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  undef  KINETIS_NTIMERS12                    /* No 12 channel timers */
+#  define KINETIS_NTIMERS20       4            /* Four 20 channel timers */
+#  define KINETIS_NTIMERS12       3            /* Three 12 channel timers */
+#  undef  KINETIS_NTIMERS20                    /* No 20 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  undef  KINETIS_NRNG                         /* No random number generator */
+#  undef  KINETIS_NMMCAU                       /* No hardware encryption */
+#  undef  KINETIS_NTAMPER                      /* No tamper detect */
+#  define KINETIS_NCRC            1            /* CRC */
 
 #elif defined(CONFIG_ARCH_CHIP_MK60N512VML100)
-#  undef  KINETIS_K20                        /* Not Kinetis K20 family */
-#  undef  KINETIS_K40                        /* Not Kinetics K40 family */
-#  define KINETIS_K60             1          /* Kinetis K60 family */
-#  define KINETIS_FLASH_SIZE      (512*1024) /* 256Kb */
-#  undef  KINETIS_FLEXNVM_SIZE               /* No FlexNVM */
-#  undef  KINETIS_FLEXRAM_SIZE               /* No FlexRAM */
-#  define KINETIS_SRAM_SIZE       (128*1024) /* 128Kb */
-#  define KINETIS_MPU             1          /* Memory protection unit */
-#  define KINETIS_EXTBUS          1          /* External bus interface */
-#  define KINETIS_NDMACH          16         /* Up to 16 DMA channels */
-#  define KINETIS_NENET           1          /* One IEEE 1588 Ethernet controller */
-#  define KINETIS_NUSBHOST        1          /* One USB host controller */
-#  define KINETIS_NUSBOTG         1          /* With USB OTG controller */
-#  define KINETIS_NUSBDEV         1          /* One USB device controller */
-#  define KINETIS_NSDHC           1          /* SD host controller */
-#  define KINETIS_NTOUCHIF        1          /* Xtrinsic touch sensing interface */
-#  define KINETIS_NI2C            3          /* Three I2C modules */
-#  define KINETIS_NISO7816        1          /* One UART with ISO-786 */
-#  define KINETIS_NUART           4          /* Four additional UARTs */
-#  define KINETIS_NSPI            3          /* Three SPI modules */
-#  define KINETIS_NCAN            2          /* Two CAN controllers */
-#  define KINETIS_NI2S            2          /* Two I2S modules */
-#  define KINETIS_NSLCD           1          /* One segment LCD interface (up to 36x8/40x4) */
-#  define KINETIS_NADC16          4          /* Four 16-bit ADC */
-#  define KINETIS_NADC12          1          /* One 12-channel ADC (ADC0)*/
-#  undef  KINETIS_NADC13                     /* No 13-channel ADC */
-#  define KINETIS_NADC15          1          /* One 15-channel ADC (ADC1) */
-#  undef  KINETIS_NADC18                     /* No 18-channel ADC */
-#  define KINETIS_NPGA            4          /* Four Programmable Gain Amplifiers */
-#  define KINETIS_NCMP            3          /* Three analog comparators */
-#  undef  KINETIS_NDAC6                      /* No 6-bit DAC */
-#  define KINETIS_NDAC12          1          /* One 12-bit DAC */
-#  define KINETIS_NVREF           1          /* Voltage reference */
-#  undef  KINETIS_NTIMERS12                  /* No 12 channel timers */
-#  define KINETIS_NTIMERS20       4          /* Four 20 channel timers */
-#  define KINETIS_NTIMERS12       3          /* Three 12 channel timers */
-#  undef  KINETIS_NTIMERS20                  /* No 20 channel timers */
-#  define KINETIS_NRTC            1          /* Real time clock */
-#  undef  KINETIS_NRNG                       /* No random number generator */
-#  undef  KINETIS_NMMCAU                     /* No hardware encryption */
-#  undef  KINETIS_NTAMPER                    /* No tamper detect */
-#  define KINETIS_NCRC            1          /* CRC */
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  define KINETIS_K60             1            /* Kinetis K60 family */
+#  undef  KINETIS_K64                          /* Not Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (512*1024)   /* 256Kb */
+#  undef  KINETIS_FLEXNVM_SIZE                 /* No FlexNVM */
+#  undef  KINETIS_FLEXRAM_SIZE                 /* No FlexRAM */
+#  define KINETIS_SRAM_SIZE       (128*1024)   /* 128Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_NUSBHOST        1            /* One USB host controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NTOUCHIF        1            /* Xtrinsic touch sensing interface */
+#  define KINETIS_NI2C            3            /* Three I2C modules */
+#  define KINETIS_NISO7816        1            /* One UART with ISO-786 */
+#  define KINETIS_NUART           4            /* Four additional UARTs */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            2            /* Two CAN controllers */
+#  define KINETIS_NI2S            2            /* Two I2S modules */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          4            /* Four 16-bit ADC */
+#  define KINETIS_NADC12          1            /* One 12-channel ADC (ADC0)*/
+#  undef  KINETIS_NADC13                       /* No 13-channel ADC */
+#  define KINETIS_NADC15          1            /* One 15-channel ADC (ADC1) */
+#  undef  KINETIS_NADC18                       /* No 18-channel ADC */
+#  define KINETIS_NPGA            4            /* Four Programmable Gain Amplifiers */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  undef  KINETIS_NDAC6                        /* No 6-bit DAC */
+#  define KINETIS_NDAC12          1            /* One 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  undef  KINETIS_NTIMERS12                    /* No 12 channel timers */
+#  define KINETIS_NTIMERS20       4            /* Four 20 channel timers */
+#  define KINETIS_NTIMERS12       3            /* Three 12 channel timers */
+#  undef  KINETIS_NTIMERS20                    /* No 20 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  undef  KINETIS_NRNG                         /* No random number generator */
+#  undef  KINETIS_NMMCAU                       /* No hardware encryption */
+#  undef  KINETIS_NTAMPER                      /* No tamper detect */
+#  define KINETIS_NCRC            1            /* CRC */
 
 #elif defined(CONFIG_ARCH_CHIP_MK60N256VLQ100)
-#  undef  KINETIS_K20                        /* Not Kinetis K20 family */
-#  undef  KINETIS_K40                        /* Not Kinetics K40 family */
-#  define KINETIS_K60             1          /* Kinetis K60 family */
-#  define KINETIS_FLASH_SIZE      (256*1024) /* 256Kb */
-#  undef  KINETIS_FLEXNVM_SIZE               /* No FlexNVM */
-#  undef  KINETIS_FLEXRAM_SIZE               /* No FlexRAM */
-#  define KINETIS_SRAM_SIZE       (64*1024)  /* 64Kb */
-#  define KINETIS_MPU             1          /* Memory protection unit */
-#  define KINETIS_EXTBUS          1          /* External bus interface */
-#  define KINETIS_NDMACH          16         /* Up to 16 DMA channels */
-#  define KINETIS_NENET           1          /* One IEEE 1588 Ethernet controller */
-#  define KINETIS_NUSBHOST        1          /* One USB host controller */
-#  define KINETIS_NUSBOTG         1          /* With USB OTG controller */
-#  define KINETIS_NUSBDEV         1          /* One USB device controller */
-#  define KINETIS_NSDHC           1          /* SD host controller */
-#  define KINETIS_NTOUCHIF        1          /* Xtrinsic touch sensing interface */
-#  define KINETIS_NI2C            3          /* Three I2C modules */
-#  define KINETIS_NISO7816        1          /* One UART with ISO-786 */
-#  define KINETIS_NUART           5          /* Five additional UARTs */
-#  define KINETIS_NSPI            3          /* Three SPI modules */
-#  define KINETIS_NCAN            2          /* Two CAN controllers */
-#  define KINETIS_NI2S            2          /* Two I2S modules */
-#  define KINETIS_NSLCD           1          /* One segment LCD interface (up to 36x8/40x4) */
-#  define KINETIS_NADC16          4          /* Four 16-bit ADC */
-#  undef  KINETIS_NADC12                     /* No 12-channel ADC */
-#  undef  KINETIS_NADC13                     /* No 13-channel ADC */
-#  define KINETIS_NADC15          1          /* One 15-channel ADC (ADC0) */
-#  define KINETIS_NADC18          1          /* One 18-channel ADC (ADC1) */
-#  define KINETIS_NPGA            4          /* Four Programmable Gain Amplifiers */
-#  define KINETIS_NCMP            3          /* Three analog comparators */
-#  undef  KINETIS_NDAC6                      /* No 6-bit DAC */
-#  define KINETIS_NDAC12          2          /* Twp 12-bit DACs */
-#  define KINETIS_NVREF           1          /* Voltage reference */
-#  undef  KINETIS_NTIMERS12                  /* No 12 channel timers */
-#  define KINETIS_NTIMERS20       4          /* Four 20 channel timers */
-#  define KINETIS_NTIMERS12       3          /* Three 12 channel timers */
-#  undef  KINETIS_NTIMERS20                  /* No 20 channel timers */
-#  define KINETIS_NRTC            1          /* Real time clock */
-#  undef  KINETIS_NRNG                       /* No random number generator */
-#  undef  KINETIS_NMMCAU                     /* No hardware encryption */
-#  undef  KINETIS_NTAMPER                    /* No tamper detect */
-#  define KINETIS_NCRC            1          /* CRC */
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  define KINETIS_K60             1            /* Kinetis K60 family */
+#  undef  KINETIS_K64                          /* Not Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (256*1024)   /* 256Kb */
+#  undef  KINETIS_FLEXNVM_SIZE                 /* No FlexNVM */
+#  undef  KINETIS_FLEXRAM_SIZE                 /* No FlexRAM */
+#  define KINETIS_SRAM_SIZE       (64*1024)    /* 64Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_NUSBHOST        1            /* One USB host controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NTOUCHIF        1            /* Xtrinsic touch sensing interface */
+#  define KINETIS_NI2C            3            /* Three I2C modules */
+#  define KINETIS_NISO7816        1            /* One UART with ISO-786 */
+#  define KINETIS_NUART           5            /* Five additional UARTs */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            2            /* Two CAN controllers */
+#  define KINETIS_NI2S            2            /* Two I2S modules */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          4            /* Four 16-bit ADC */
+#  undef  KINETIS_NADC12                       /* No 12-channel ADC */
+#  undef  KINETIS_NADC13                       /* No 13-channel ADC */
+#  define KINETIS_NADC15          1            /* One 15-channel ADC (ADC0) */
+#  define KINETIS_NADC18          1            /* One 18-channel ADC (ADC1) */
+#  define KINETIS_NPGA            4            /* Four Programmable Gain Amplifiers */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  undef  KINETIS_NDAC6                        /* No 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Twp 12-bit DACs */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  undef  KINETIS_NTIMERS12                    /* No 12 channel timers */
+#  define KINETIS_NTIMERS20       4            /* Four 20 channel timers */
+#  define KINETIS_NTIMERS12       3            /* Three 12 channel timers */
+#  undef  KINETIS_NTIMERS20                    /* No 20 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  undef  KINETIS_NRNG                         /* No random number generator */
+#  undef  KINETIS_NMMCAU                       /* No hardware encryption */
+#  undef  KINETIS_NTAMPER                      /* No tamper detect */
+#  define KINETIS_NCRC            1            /* CRC */
 
 #elif defined(CONFIG_ARCH_CHIP_MK60X256VLQ100)
-#  undef  KINETIS_K20                        /* Not Kinetis K20 family */
-#  undef  KINETIS_K40                        /* Not Kinetics K40 family */
-#  define KINETIS_K60             1          /* Kinetis K60 family */
-#  define KINETIS_FLASH_SIZE      (256*1024) /* 256Kb */
-#  define KINETIS_FLEXNVM_SIZE    (256*1024) /* 256Kb */
-#  define KINETIS_FLEXRAM_SIZE    (4*1024)   /* 4Kb */
-#  define KINETIS_SRAM_SIZE       (64*1024)  /* 64Kb */
-#  define KINETIS_MPU             1          /* Memory protection unit */
-#  define KINETIS_EXTBUS          1          /* External bus interface */
-#  define KINETIS_NDMACH          16         /* Up to 16 DMA channels */
-#  define KINETIS_NENET           1          /* One IEEE 1588 Ethernet controller */
-#  define KINETIS_NUSBHOST        1          /* One USB host controller */
-#  define KINETIS_NUSBOTG         1          /* With USB OTG controller */
-#  define KINETIS_NUSBDEV         1          /* One USB device controller */
-#  define KINETIS_NSDHC           1          /* SD host controller */
-#  define KINETIS_NTOUCHIF        1          /* Xtrinsic touch sensing interface */
-#  define KINETIS_NI2C            3          /* Three I2C modules */
-#  define KINETIS_NISO7816        1          /* One UART with ISO-786 */
-#  define KINETIS_NUART           5          /* Five additional UARTs */
-#  define KINETIS_NSPI            3          /* Three SPI modules */
-#  define KINETIS_NCAN            2          /* Two CAN controllers */
-#  define KINETIS_NI2S            2          /* Two I2S modules */
-#  define KINETIS_NSLCD           1          /* One segment LCD interface (up to 36x8/40x4) */
-#  define KINETIS_NADC16          4          /* Four 16-bit ADC */
-#  undef  KINETIS_NADC12                     /* No 12-channel ADC */
-#  undef  KINETIS_NADC13                     /* No 13-channel ADC */
-#  define KINETIS_NADC15          1          /* One 15-channel ADC (ADC0) */
-#  define KINETIS_NADC18          1          /* One 18-channel ADC (ADC1) */
-#  define KINETIS_NPGA            4          /* Four Programmable Gain Amplifiers */
-#  define KINETIS_NCMP            3          /* Three analog comparators */
-#  undef  KINETIS_NDAC6                      /* No 6-bit DAC */
-#  define KINETIS_NDAC12          2          /* Twp 12-bit DACs */
-#  define KINETIS_NVREF           1          /* Voltage reference */
-#  undef  KINETIS_NTIMERS12                  /* No 12 channel timers */
-#  define KINETIS_NTIMERS20       4          /* Four 20 channel timers */
-#  define KINETIS_NTIMERS12       3          /* Three 12 channel timers */
-#  undef  KINETIS_NTIMERS20                  /* No 20 channel timers */
-#  define KINETIS_NRTC            1          /* Real time clock */
-#  undef  KINETIS_NRNG                       /* No random number generator */
-#  undef  KINETIS_NMMCAU                     /* No hardware encryption */
-#  undef  KINETIS_NTAMPER                    /* No tamper detect */
-#  define KINETIS_NCRC            1          /* CRC */
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  define KINETIS_K60             1            /* Kinetis K60 family */
+#  undef  KINETIS_K64                          /* Not Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (256*1024)   /* 256Kb */
+#  define KINETIS_FLEXNVM_SIZE    (256*1024)   /* 256Kb */
+#  define KINETIS_FLEXRAM_SIZE    (4*1024)     /* 4Kb */
+#  define KINETIS_SRAM_SIZE       (64*1024)    /* 64Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_NUSBHOST        1            /* One USB host controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NTOUCHIF        1            /* Xtrinsic touch sensing interface */
+#  define KINETIS_NI2C            3            /* Three I2C modules */
+#  define KINETIS_NISO7816        1            /* One UART with ISO-786 */
+#  define KINETIS_NUART           5            /* Five additional UARTs */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            2            /* Two CAN controllers */
+#  define KINETIS_NI2S            2            /* Two I2S modules */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          4            /* Four 16-bit ADC */
+#  undef  KINETIS_NADC12                       /* No 12-channel ADC */
+#  undef  KINETIS_NADC13                       /* No 13-channel ADC */
+#  define KINETIS_NADC15          1            /* One 15-channel ADC (ADC0) */
+#  define KINETIS_NADC18          1            /* One 18-channel ADC (ADC1) */
+#  define KINETIS_NPGA            4            /* Four Programmable Gain Amplifiers */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  undef  KINETIS_NDAC6                        /* No 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Twp 12-bit DACs */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  undef  KINETIS_NTIMERS12                    /* No 12 channel timers */
+#  define KINETIS_NTIMERS20       4            /* Four 20 channel timers */
+#  define KINETIS_NTIMERS12       3            /* Three 12 channel timers */
+#  undef  KINETIS_NTIMERS20                    /* No 20 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  undef  KINETIS_NRNG                         /* No random number generator */
+#  undef  KINETIS_NMMCAU                       /* No hardware encryption */
+#  undef  KINETIS_NTAMPER                      /* No tamper detect */
+#  define KINETIS_NCRC            1            /* CRC */
 
 #elif defined(CONFIG_ARCH_CHIP_MK60N512VLQ100)
-#  undef  KINETIS_K20                        /* Not Kinetis K20 family */
-#  undef  KINETIS_K40                        /* Not Kinetics K40 family */
-#  define KINETIS_K60             1          /* Kinetis K60 family */
-#  define KINETIS_FLASH_SIZE      (512*1024) /* 512Kb */
-#  undef  KINETIS_FLEXNVM_SIZE               /* No FlexNVM */
-#  undef  KINETIS_FLEXRAM_SIZE               /* No FlexRAM */
-#  define KINETIS_SRAM_SIZE       (128*1024) /* 128Kb */
-#  define KINETIS_MPU             1          /* Memory protection unit */
-#  define KINETIS_EXTBUS          1          /* External bus interface */
-#  define KINETIS_NDMACH          16         /* Up to 16 DMA channels */
-#  define KINETIS_NENET           1          /* One IEEE 1588 Ethernet controller */
-#  define KINETIS_NUSBHOST        1          /* One USB host controller */
-#  define KINETIS_NUSBOTG         1          /* With USB OTG controller */
-#  define KINETIS_NUSBDEV         1          /* One USB device controller */
-#  define KINETIS_NSDHC           1          /* SD host controller */
-#  define KINETIS_NTOUCHIF        1          /* Xtrinsic touch sensing interface */
-#  define KINETIS_NI2C            3          /* Three I2C modules */
-#  define KINETIS_NISO7816        1          /* One UART with ISO-786 */
-#  define KINETIS_NUART           5          /* Five additional UARTs */
-#  define KINETIS_NSPI            3          /* Three SPI modules */
-#  define KINETIS_NCAN            2          /* Two CAN controllers */
-#  define KINETIS_NI2S            2          /* Two I2S modules */
-#  define KINETIS_NSLCD           1          /* One segment LCD interface (up to 36x8/40x4) */
-#  define KINETIS_NADC16          4          /* Four 16-bit ADC */
-#  undef  KINETIS_NADC12                     /* No 12-channel ADC */
-#  undef  KINETIS_NADC13                     /* No 13-channel ADC */
-#  define KINETIS_NADC15          1          /* One 15-channel ADC (ADC0) */
-#  define KINETIS_NADC18          1          /* One 18-channel ADC (ADC1) */
-#  define KINETIS_NPGA            4          /* Four Programmable Gain Amplifiers */
-#  define KINETIS_NCMP            3          /* Three analog comparators */
-#  undef  KINETIS_NDAC6                      /* No 6-bit DAC */
-#  define KINETIS_NDAC12          2          /* Twp 12-bit DACs */
-#  define KINETIS_NVREF           1          /* Voltage reference */
-#  undef  KINETIS_NTIMERS12                  /* No 12 channel timers */
-#  define KINETIS_NTIMERS20       4          /* Four 20 channel timers */
-#  define KINETIS_NTIMERS12       3          /* Three 12 channel timers */
-#  undef  KINETIS_NTIMERS20                  /* No 20 channel timers */
-#  define KINETIS_NRTC            1          /* Real time clock */
-#  undef  KINETIS_NRNG                       /* No random number generator */
-#  undef  KINETIS_NMMCAU                     /* No hardware encryption */
-#  undef  KINETIS_NTAMPER                    /* No tamper detect */
-#  define KINETIS_NCRC            1          /* CRC */
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  define KINETIS_K60             1            /* Kinetis K60 family */
+#  undef  KINETIS_K64                          /* Not Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (512*1024)   /* 512Kb */
+#  undef  KINETIS_FLEXNVM_SIZE                 /* No FlexNVM */
+#  undef  KINETIS_FLEXRAM_SIZE                 /* No FlexRAM */
+#  define KINETIS_SRAM_SIZE       (128*1024)   /* 128Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_NUSBHOST        1            /* One USB host controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NTOUCHIF        1            /* Xtrinsic touch sensing interface */
+#  define KINETIS_NI2C            3            /* Three I2C modules */
+#  define KINETIS_NISO7816        1            /* One UART with ISO-786 */
+#  define KINETIS_NUART           5            /* Five additional UARTs */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            2            /* Two CAN controllers */
+#  define KINETIS_NI2S            2            /* Two I2S modules */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          4            /* Four 16-bit ADC */
+#  undef  KINETIS_NADC12                       /* No 12-channel ADC */
+#  undef  KINETIS_NADC13                       /* No 13-channel ADC */
+#  define KINETIS_NADC15          1            /* One 15-channel ADC (ADC0) */
+#  define KINETIS_NADC18          1            /* One 18-channel ADC (ADC1) */
+#  define KINETIS_NPGA            4            /* Four Programmable Gain Amplifiers */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  undef  KINETIS_NDAC6                        /* No 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Twp 12-bit DACs */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  undef  KINETIS_NTIMERS12                    /* No 12 channel timers */
+#  define KINETIS_NTIMERS20       4            /* Four 20 channel timers */
+#  define KINETIS_NTIMERS12       3            /* Three 12 channel timers */
+#  undef  KINETIS_NTIMERS20                    /* No 20 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  undef  KINETIS_NRNG                         /* No random number generator */
+#  undef  KINETIS_NMMCAU                       /* No hardware encryption */
+#  undef  KINETIS_NTAMPER                      /* No tamper detect */
+#  define KINETIS_NCRC            1            /* CRC */
 
 #elif defined(CONFIG_ARCH_CHIP_MK60N256VMD100)
-#  undef  KINETIS_K20                        /* Not Kinetis K20 family */
-#  undef  KINETIS_K40                        /* Not Kinetics K40 family */
-#  define KINETIS_K60             1          /* Kinetis K60 family */
-#  define KINETIS_FLASH_SIZE      (256*1024) /* 256Kb */
-#  undef  KINETIS_FLEXNVM_SIZE               /* No FlexNVM */
-#  undef  KINETIS_FLEXRAM_SIZE               /* No FlexRAM */
-#  define KINETIS_SRAM_SIZE       (64*1024)  /* 64Kb */
-#  define KINETIS_MPU             1          /* Memory protection unit */
-#  define KINETIS_EXTBUS          1          /* External bus interface */
-#  define KINETIS_NDMACH          16         /* Up to 16 DMA channels */
-#  define KINETIS_NENET           1          /* One IEEE 1588 Ethernet controller */
-#  define KINETIS_NUSBHOST        1          /* One USB host controller */
-#  define KINETIS_NUSBOTG         1          /* With USB OTG controller */
-#  define KINETIS_NUSBDEV         1          /* One USB device controller */
-#  define KINETIS_NSDHC           1          /* SD host controller */
-#  define KINETIS_NTOUCHIF        1          /* Xtrinsic touch sensing interface */
-#  define KINETIS_NI2C            3          /* Three I2C modules */
-#  define KINETIS_NISO7816        1          /* One UART with ISO-786 */
-#  define KINETIS_NUART           5          /* Five additional UARTs */
-#  define KINETIS_NSPI            3          /* Three SPI modules */
-#  define KINETIS_NCAN            2          /* Two CAN controllers */
-#  define KINETIS_NI2S            2          /* Two I2S modules */
-#  define KINETIS_NSLCD           1          /* One segment LCD interface (up to 36x8/40x4) */
-#  define KINETIS_NADC16          4          /* Four 16-bit ADC */
-#  undef  KINETIS_NADC12                     /* No 12-channel ADC */
-#  undef  KINETIS_NADC13                     /* No 13-channel ADC */
-#  define KINETIS_NADC15          1          /* One 15-channel ADC (ADC0) */
-#  define KINETIS_NADC18          1          /* One 18-channel ADC (ADC1) */
-#  define KINETIS_NPGA            4          /* Four Programmable Gain Amplifiers */
-#  define KINETIS_NCMP            3          /* Three analog comparators */
-#  undef  KINETIS_NDAC6                      /* No 6-bit DAC */
-#  define KINETIS_NDAC12          2          /* Twp 12-bit DACs */
-#  define KINETIS_NVREF           1          /* Voltage reference */
-#  undef  KINETIS_NTIMERS12                  /* No 12 channel timers */
-#  define KINETIS_NTIMERS20       4          /* Four 20 channel timers */
-#  define KINETIS_NTIMERS12       3          /* Three 12 channel timers */
-#  undef  KINETIS_NTIMERS20                  /* No 20 channel timers */
-#  define KINETIS_NRTC            1          /* Real time clock */
-#  undef  KINETIS_NRNG                       /* No random number generator */
-#  undef  KINETIS_NMMCAU                     /* No hardware encryption */
-#  undef  KINETIS_NTAMPER                    /* No tamper detect */
-#  define KINETIS_NCRC            1          /* CRC */
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  define KINETIS_K60             1            /* Kinetis K60 family */
+#  undef  KINETIS_K64                          /* Not Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (256*1024)   /* 256Kb */
+#  undef  KINETIS_FLEXNVM_SIZE                 /* No FlexNVM */
+#  undef  KINETIS_FLEXRAM_SIZE                 /* No FlexRAM */
+#  define KINETIS_SRAM_SIZE       (64*1024)    /* 64Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_NUSBHOST        1            /* One USB host controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NTOUCHIF        1            /* Xtrinsic touch sensing interface */
+#  define KINETIS_NI2C            3            /* Three I2C modules */
+#  define KINETIS_NISO7816        1            /* One UART with ISO-786 */
+#  define KINETIS_NUART           5            /* Five additional UARTs */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            2            /* Two CAN controllers */
+#  define KINETIS_NI2S            2            /* Two I2S modules */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          4            /* Four 16-bit ADC */
+#  undef  KINETIS_NADC12                       /* No 12-channel ADC */
+#  undef  KINETIS_NADC13                       /* No 13-channel ADC */
+#  define KINETIS_NADC15          1            /* One 15-channel ADC (ADC0) */
+#  define KINETIS_NADC18          1            /* One 18-channel ADC (ADC1) */
+#  define KINETIS_NPGA            4            /* Four Programmable Gain Amplifiers */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  undef  KINETIS_NDAC6                        /* No 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Twp 12-bit DACs */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  undef  KINETIS_NTIMERS12                    /* No 12 channel timers */
+#  define KINETIS_NTIMERS20       4            /* Four 20 channel timers */
+#  define KINETIS_NTIMERS12       3            /* Three 12 channel timers */
+#  undef  KINETIS_NTIMERS20                    /* No 20 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  undef  KINETIS_NRNG                         /* No random number generator */
+#  undef  KINETIS_NMMCAU                       /* No hardware encryption */
+#  undef  KINETIS_NTAMPER                      /* No tamper detect */
+#  define KINETIS_NCRC            1            /* CRC */
 
 #elif defined(CONFIG_ARCH_CHIP_MK60X256VMD100)
-#  undef  KINETIS_K20                        /* Not Kinetis K20 family */
-#  undef  KINETIS_K40                        /* Not Kinetics K40 family */
-#  define KINETIS_K60             1          /* Kinetis K60 family */
-#  define KINETIS_FLASH_SIZE      (256*1024) /* 256Kb */
-#  define KINETIS_FLEXNVM_SIZE    (256*1024) /* 256Kb */
-#  define KINETIS_FLEXRAM_SIZE    (4*1024)   /* 4Kb */
-#  define KINETIS_SRAM_SIZE       (64*1024)  /* 64Kb */
-#  define KINETIS_MPU             1          /* Memory protection unit */
-#  define KINETIS_EXTBUS          1          /* External bus interface */
-#  define KINETIS_NDMACH          16         /* Up to 16 DMA channels */
-#  define KINETIS_NENET           1          /* One IEEE 1588 Ethernet controller */
-#  define KINETIS_NUSBHOST        1          /* One USB host controller */
-#  define KINETIS_NUSBOTG         1          /* With USB OTG controller */
-#  define KINETIS_NUSBDEV         1          /* One USB device controller */
-#  define KINETIS_NSDHC           1          /* SD host controller */
-#  define KINETIS_NTOUCHIF        1          /* Xtrinsic touch sensing interface */
-#  define KINETIS_NI2C            3          /* Three I2C modules */
-#  define KINETIS_NISO7816        1          /* One UART with ISO-786 */
-#  define KINETIS_NUART           5          /* Five additional UARTs */
-#  define KINETIS_NSPI            3          /* Three SPI modules */
-#  define KINETIS_NCAN            2          /* Two CAN controllers */
-#  define KINETIS_NI2S            2          /* Two I2S modules */
-#  define KINETIS_NSLCD           1          /* One segment LCD interface (up to 36x8/40x4) */
-#  define KINETIS_NADC16          4          /* Four 16-bit ADC */
-#  undef  KINETIS_NADC12                     /* No 12-channel ADC */
-#  undef  KINETIS_NADC13                     /* No 13-channel ADC */
-#  define KINETIS_NADC15          1          /* One 15-channel ADC (ADC0) */
-#  define KINETIS_NADC18          1          /* One 18-channel ADC (ADC1) */
-#  define KINETIS_NPGA            4          /* Four Programmable Gain Amplifiers */
-#  define KINETIS_NCMP            3          /* Three analog comparators */
-#  undef  KINETIS_NDAC6                      /* No 6-bit DAC */
-#  define KINETIS_NDAC12          2          /* Twp 12-bit DACs */
-#  define KINETIS_NVREF           1          /* Voltage reference */
-#  undef  KINETIS_NTIMERS12                  /* No 12 channel timers */
-#  define KINETIS_NTIMERS20       4          /* Four 20 channel timers */
-#  define KINETIS_NTIMERS12       3          /* Three 12 channel timers */
-#  undef  KINETIS_NTIMERS20                  /* No 20 channel timers */
-#  define KINETIS_NRTC            1          /* Real time clock */
-#  undef  KINETIS_NRNG                       /* No random number generator */
-#  undef  KINETIS_NMMCAU                     /* No hardware encryption */
-#  undef  KINETIS_NTAMPER                    /* No tamper detect */
-#  define KINETIS_NCRC            1          /* CRC */
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  define KINETIS_K60             1            /* Kinetis K60 family */
+#  undef  KINETIS_K64                          /* Not Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (256*1024)   /* 256Kb */
+#  define KINETIS_FLEXNVM_SIZE    (256*1024)   /* 256Kb */
+#  define KINETIS_FLEXRAM_SIZE    (4*1024)     /* 4Kb */
+#  define KINETIS_SRAM_SIZE       (64*1024)    /* 64Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_NUSBHOST        1            /* One USB host controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NTOUCHIF        1            /* Xtrinsic touch sensing interface */
+#  define KINETIS_NI2C            3            /* Three I2C modules */
+#  define KINETIS_NISO7816        1            /* One UART with ISO-786 */
+#  define KINETIS_NUART           5            /* Five additional UARTs */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            2            /* Two CAN controllers */
+#  define KINETIS_NI2S            2            /* Two I2S modules */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          4            /* Four 16-bit ADC */
+#  undef  KINETIS_NADC12                       /* No 12-channel ADC */
+#  undef  KINETIS_NADC13                       /* No 13-channel ADC */
+#  define KINETIS_NADC15          1            /* One 15-channel ADC (ADC0) */
+#  define KINETIS_NADC18          1            /* One 18-channel ADC (ADC1) */
+#  define KINETIS_NPGA            4            /* Four Programmable Gain Amplifiers */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  undef  KINETIS_NDAC6                        /* No 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Twp 12-bit DACs */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  undef  KINETIS_NTIMERS12                    /* No 12 channel timers */
+#  define KINETIS_NTIMERS20       4            /* Four 20 channel timers */
+#  define KINETIS_NTIMERS12       3            /* Three 12 channel timers */
+#  undef  KINETIS_NTIMERS20                    /* No 20 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  undef  KINETIS_NRNG                         /* No random number generator */
+#  undef  KINETIS_NMMCAU                       /* No hardware encryption */
+#  undef  KINETIS_NTAMPER                      /* No tamper detect */
+#  define KINETIS_NCRC            1            /* CRC */
 
 #elif defined(CONFIG_ARCH_CHIP_MK60N512VMD100)
-#  undef  KINETIS_K20                        /* Not Kinetis K20 family */
-#  undef  KINETIS_K40                        /* Not Kinetics K40 family */
-#  define KINETIS_K60             1          /* Kinetis K60 family */
-#  define KINETIS_FLASH_SIZE      (512*1024) /* 512Kb */
-#  undef  KINETIS_FLEXNVM_SIZE               /* No FlexNVM */
-#  undef  KINETIS_FLEXRAM_SIZE               /* No FlexRAM */
-#  define KINETIS_SRAM_SIZE       (128*1024) /* 128Kb */
-#  define KINETIS_MPU             1          /* Memory protection unit */
-#  define KINETIS_EXTBUS          1          /* External bus interface */
-#  define KINETIS_NDMACH          16         /* Up to 16 DMA channels */
-#  define KINETIS_NENET           1          /* One IEEE 1588 Ethernet controller */
-#  define KINETIS_NUSBHOST        1          /* One USB host controller */
-#  define KINETIS_NUSBOTG         1          /* With USB OTG controller */
-#  define KINETIS_NUSBDEV         1          /* One USB device controller */
-#  define KINETIS_NSDHC           1          /* SD host controller */
-#  define KINETIS_NTOUCHIF        1          /* Xtrinsic touch sensing interface */
-#  define KINETIS_NI2C            3          /* Three I2C modules */
-#  define KINETIS_NISO7816        1          /* One UART with ISO-786 */
-#  define KINETIS_NUART           5          /* Five additional UARTs */
-#  define KINETIS_NSPI            3          /* Three SPI modules */
-#  define KINETIS_NCAN            2          /* Two CAN controllers */
-#  define KINETIS_NI2S            2          /* Two I2S modules */
-#  define KINETIS_NSLCD           1          /* One segment LCD interface (up to 36x8/40x4) */
-#  define KINETIS_NADC16          4          /* Four 16-bit ADC */
-#  undef  KINETIS_NADC12                     /* No 12-channel ADC */
-#  undef  KINETIS_NADC13                     /* No 13-channel ADC */
-#  define KINETIS_NADC15          1          /* One 15-channel ADC (ADC0) */
-#  define KINETIS_NADC18          1          /* One 18-channel ADC (ADC1) */
-#  define KINETIS_NPGA            4          /* Four Programmable Gain Amplifiers */
-#  define KINETIS_NCMP            3          /* Three analog comparators */
-#  undef  KINETIS_NDAC6                      /* No 6-bit DAC */
-#  define KINETIS_NDAC12          2          /* Twp 12-bit DACs */
-#  define KINETIS_NVREF           1          /* Voltage reference */
-#  undef  KINETIS_NTIMERS12                  /* No 12 channel timers */
-#  define KINETIS_NTIMERS20       4          /* Four 20 channel timers */
-#  define KINETIS_NTIMERS12       3          /* Three 12 channel timers */
-#  undef  KINETIS_NTIMERS20                  /* No 20 channel timers */
-#  define KINETIS_NRTC            1          /* Real time clock */
-#  undef  KINETIS_NRNG                       /* No random number generator */
-#  undef  KINETIS_NMMCAU                     /* No hardware encryption */
-#  undef  KINETIS_NTAMPER                    /* No tamper detect */
-#  define KINETIS_NCRC            1          /* CRC */
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  define KINETIS_K60             1            /* Kinetis K60 family */
+#  undef  KINETIS_K64                          /* Not Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (512*1024)   /* 512Kb */
+#  undef  KINETIS_FLEXNVM_SIZE                 /* No FlexNVM */
+#  undef  KINETIS_FLEXRAM_SIZE                 /* No FlexRAM */
+#  define KINETIS_SRAM_SIZE       (128*1024)   /* 128Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_NUSBHOST        1            /* One USB host controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NTOUCHIF        1            /* Xtrinsic touch sensing interface */
+#  define KINETIS_NI2C            3            /* Three I2C modules */
+#  define KINETIS_NISO7816        1            /* One UART with ISO-786 */
+#  define KINETIS_NUART           5            /* Five additional UARTs */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            2            /* Two CAN controllers */
+#  define KINETIS_NI2S            2            /* Two I2S modules */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          4            /* Four 16-bit ADC */
+#  undef  KINETIS_NADC12                       /* No 12-channel ADC */
+#  undef  KINETIS_NADC13                       /* No 13-channel ADC */
+#  define KINETIS_NADC15          1            /* One 15-channel ADC (ADC0) */
+#  define KINETIS_NADC18          1            /* One 18-channel ADC (ADC1) */
+#  define KINETIS_NPGA            4            /* Four Programmable Gain Amplifiers */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  undef  KINETIS_NDAC6                        /* No 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Twp 12-bit DACs */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  undef  KINETIS_NTIMERS12                    /* No 12 channel timers */
+#  define KINETIS_NTIMERS20       4            /* Four 20 channel timers */
+#  define KINETIS_NTIMERS12       3            /* Three 12 channel timers */
+#  undef  KINETIS_NTIMERS20                    /* No 20 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  undef  KINETIS_NRNG                         /* No random number generator */
+#  undef  KINETIS_NMMCAU                       /* No hardware encryption */
+#  undef  KINETIS_NTAMPER                      /* No tamper detect */
+#  define KINETIS_NCRC            1            /* CRC */
+
+#elif defined(CONFIG_ARCH_CHIP_MK60FN1M0VLQ12)
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  define KINETIS_K60             1            /* Kinetis K60 family */
+#  define KINETIS_NEW_MCG         1            /* Kinetis New MCG - different VDIV */
+#  undef  KINETIS_K64                          /* Not Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (1024*1024)  /* 1Mb */
+#  undef  KINETIS_FLEXNVM_SIZE                 /* No FlexNVM */
+#  undef  KINETIS_FLEXRAM_SIZE                 /* No FlexRAM */
+#  define KINETIS_SRAM_SIZE       (128*1024)   /* 128Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          32           /* Up to 32 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_NUSBHOST        1            /* One USB host controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NTOUCHIF        1            /* Xtrinsic touch sensing interface */
+#  define KINETIS_NI2C            3            /* Three I2C modules */
+#  define KINETIS_NUART           6            /* Five additional UARTs */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            2            /* Two CAN controllers */
+#  define KINETIS_NI2S            2            /* Two I2S modules */
+#  define KINETIS_NADC16          4            /* Four 16-bit ADC */
+#  define KINETIS_NADC15          1            /* One 15-channel ADC (ADC0) */
+#  define KINETIS_NPGA            4            /* Four Programmable Gain Amplifiers */
+#  define KINETIS_NCMP            4            /* Four analog comparators */
+#  undef  KINETIS_NDAC6           4            /* Four 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Twp 12-bit DACs */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  define KINETIS_NTIMERS8        2            /* Two 8 channel timers */
+#  define KINETIS_NTIMERS20       4            /* Four 20 channel timers */
+#  define KINETIS_NTIMERS12       3            /* Three 12 channel timers */
+#  define KINETIS_NTIMERS2        2            /* Two 2 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  define KINETIS_NRNG            1            /* Random number generator */
+#  define KINETIS_NMMCAU          1            /* Hardware encryption */
+#  undef  KINETIS_NTAMPER                      /* No tamper detect */
+#  define KINETIS_NCRC            1            /* CRC */
 
+#elif defined(CONFIG_ARCH_CHIP_MK64FN1M0VLL12)
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  undef  KINETIS_K60                          /* Not Kinetis K60 family */
+#  define KINETIS_K64             1            /* Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (1024*1024)  /* 1Mb */
+#  undef  KINETIS_FLEXNVM_SIZE                 /* No FlexNVM */
+#  define KINETIS_FLEXRAM_SIZE    (4*1024)     /* 4Kb */
+#  define KINETIS_SRAM_SIZE       (256*1024)   /* 256Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NI2C            3            /* Three I2C modules */
+#  define KINETIS_NUART           6            /* Six UART modues */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            1            /* One CAN controllers */
+#  define KINETIS_NI2S            1            /* One I2S modules */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          2            /* Four 16-bit ADC */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  define KINETIS_NDAC6           3            /* Three 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Two 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  define KINETIS_NTIMERS8        2            /* Two 8 channel timers */
+#  define KINETIS_NTIMERS2        2            /* Two 2 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  define KINETIS_NRNG            1            /* Random number generator */
+#  define KINETIS_NMMCAU          1            /* Hardware encryption */
+#  define KINETIS_NCRC            1            /* CRC */
+
+#elif defined(CONFIG_ARCH_CHIP_MK64FX512VLL12)
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  undef  KINETIS_K60                          /* Not Kinetis K60 family */
+#  define KINETIS_K64             1            /* Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (1024*1024)  /* 1Mb */
+#  undef  KINETIS_FLEXNVM_SIZE                 /* No FlexNVM */
+#  define KINETIS_FLEXRAM_SIZE    (4*1024)     /* 4Kb */
+#  define KINETIS_SRAM_SIZE       (256*1024)   /* 256Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NI2C            3            /* Three I2C modules */
+#  define KINETIS_NUART           6            /* Six UART modues */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            1            /* One CAN controllers */
+#  define KINETIS_NI2S            1            /* One I2S modules */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          2            /* Four 16-bit ADC */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  define KINETIS_NDAC6           3            /* Three 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Two 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  define KINETIS_NTIMERS8        2            /* Two 8 channel timers */
+#  define KINETIS_NTIMERS2        2            /* Two 2 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  define KINETIS_NRNG            1            /* Random number generator */
+#  define KINETIS_NMMCAU          1            /* Hardware encryption */
+#  define KINETIS_NCRC            1            /* CRC */
+
+#elif defined(CONFIG_ARCH_CHIP_MK64FX512VDC12)
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  undef  KINETIS_K60                          /* Not Kinetis K60 family */
+#  define KINETIS_K64             1            /* Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (1024*1024)  /* 1Mb */
+#  undef  KINETIS_FLEXNVM_SIZE                 /* No FlexNVM */
+#  define KINETIS_FLEXRAM_SIZE    (4*1024)     /* 4Kb */
+#  define KINETIS_SRAM_SIZE       (256*1024)   /* 256Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NI2C            3            /* Three I2C modules */
+#  define KINETIS_NUART           6            /* Six UART modues */
+#  define KINETIS_NSPI            3             Three SPI modules
+#  define KINETIS_NCAN            1            /* One CAN controllers */
+#  define KINETIS_NI2S            1            /* One I2S modules */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          2            /* Four 16-bit ADC */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  define KINETIS_NDAC6           3            /* Three 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Two 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  define KINETIS_NTIMERS8        2            /* Two 8 channel timers */
+#  define KINETIS_NTIMERS2        2            /* Two 2 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  define KINETIS_NRNG            1            /* Random number generator */
+#  define KINETIS_NMMCAU          1            /* Hardware encryption */
+#  define KINETIS_NCRC            1            /* CRC */
+
+#elif defined(CONFIG_ARCH_CHIP_MK64FN1M0VDC12)
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  undef  KINETIS_K60                          /* Not Kinetis K60 family */
+#  define KINETIS_K64             1            /* Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (1024*1024)  /* 1Mb */
+#  undef  KINETIS_FLEXNVM_SIZE                 /* No FlexNVM */
+#  define KINETIS_FLEXRAM_SIZE    (4*1024)     /* 4Kb */
+#  define KINETIS_SRAM_SIZE       (256*1024)   /* 256Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NI2C            3            /* Three I2C modules */
+#  define KINETIS_NUART           6            /* Six UART modues */
+#  define KINETIS_NSPI            3             Three SPI modules
+#  define KINETIS_NCAN            1            /* One CAN controllers */
+#  define KINETIS_NI2S            1            /* One I2S modules */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          2            /* Four 16-bit ADC */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  define KINETIS_NDAC6           3            /* Three 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Two 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  define KINETIS_NTIMERS8        2            /* Two 8 channel timers */
+#  define KINETIS_NTIMERS2        2            /* Two 2 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  define KINETIS_NRNG            1            /* Random number generator */
+#  define KINETIS_NMMCAU          1            /* Hardware encryption */
+#  define KINETIS_NCRC            1            /* CRC */
+
+#elif defined(CONFIG_ARCH_CHIP_MK64FX512VLQ12)
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  undef  KINETIS_K60                          /* Not Kinetis K60 family */
+#  define KINETIS_K64             1            /* Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (1024*1024)  /* 1Mb */
+#  undef  KINETIS_FLEXNVM_SIZE                 /* No FlexNVM */
+#  define KINETIS_FLEXRAM_SIZE    (4*1024)     /* 4Kb */
+#  define KINETIS_SRAM_SIZE       (256*1024)   /* 256Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NI2C            3            /* Three I2C modules */
+#  define KINETIS_NUART           6            /* Six UART modues */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            1            /* One CAN controllers */
+#  define KINETIS_NI2S            1            /* One I2S modules */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          2            /* Four 16-bit ADC */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  define KINETIS_NDAC6           3            /* Three 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Two 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  define KINETIS_NTIMERS8        2            /* Two 8 channel timers */
+#  define KINETIS_NTIMERS2        2            /* Two 2 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  define KINETIS_NRNG            1            /* Random number generator */
+#  define KINETIS_NMMCAU          1            /* Hardware encryption */
+#  define KINETIS_NCRC            1            /* CRC */
+
+#elif defined(CONFIG_ARCH_CHIP_MK64FN1M0VLQ12)
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  undef  KINETIS_K60                          /* Not Kinetis K60 family */
+#  define KINETIS_K64             1            /* Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (1024*1024)  /* 1Mb */
+#  undef  KINETIS_FLEXNVM_SIZE                 /* No FlexNVM */
+#  define KINETIS_FLEXRAM_SIZE    (4*1024)     /* 4Kb */
+#  define KINETIS_SRAM_SIZE       (256*1024)   /* 256Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NI2C            3            /* Three I2C modules */
+#  define KINETIS_NUART           6            /* Six UART modues */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            1            /* One CAN controllers */
+#  define KINETIS_NI2S            1            /* One I2S modules */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          2            /* Four 16-bit ADC */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  define KINETIS_NDAC6           3            /* Three 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Two 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  define KINETIS_NTIMERS8        2            /* Two 8 channel timers */
+#  define KINETIS_NTIMERS2        2            /* Two 2 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  define KINETIS_NRNG            1            /* Random number generator */
+#  define KINETIS_NMMCAU          1            /* Hardware encryption */
+#  define KINETIS_NCRC            1            /* CRC */
+
+#elif defined(CONFIG_ARCH_CHIP_MK64FX512VMD12)
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  undef  KINETIS_K60                          /* Not Kinetis K60 family */
+#  define KINETIS_K64             1            /* Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (1024*1024)  /* 1Mb */
+#  undef  KINETIS_FLEXNVM_SIZE                 /* No FlexNVM */
+#  define KINETIS_FLEXRAM_SIZE    (4*1024)     /* 4Kb */
+#  define KINETIS_SRAM_SIZE       (256*1024)   /* 256Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NI2C            3            /* Three I2C modules */
+#  define KINETIS_NUART           6            /* Six UART modues */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            1            /* One CAN controllers */
+#  define KINETIS_NI2S            1            /* One I2S modules */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          2            /* Four 16-bit ADC */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  define KINETIS_NDAC6           3            /* Three 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Two 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  define KINETIS_NTIMERS8        2            /* Two 8 channel timers */
+#  define KINETIS_NTIMERS2        2            /* Two 2 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  define KINETIS_NRNG            1            /* Random number generator */
+#  define KINETIS_NMMCAU          1            /* Hardware encryption */
+#  define KINETIS_NCRC            1            /* CRC */
+
+#elif defined(CONFIG_ARCH_CHIP_MK64FN1M0VMD12)
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  undef  KINETIS_K60                          /* Not Kinetis K60 family */
+#  define KINETIS_K64             1            /* Kinetis K64 family */
+#  undef  KINETIS_K66                          /* Not Kinetis K66 family */
+
+#  define KINETIS_FLASH_SIZE      (1024*1024)  /* 1Mb */
+#  undef  KINETIS_FLEXNVM_SIZE                 /* No FlexNVM */
+#  define KINETIS_FLEXRAM_SIZE    (4*1024)     /* 4Kb */
+#  define KINETIS_SRAM_SIZE       (256*1024)   /* 256Kb */
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          16           /* Up to 16 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NI2C            3            /* Three I2C modules */
+#  define KINETIS_NUART           6            /* Six UART modues */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            1            /* One CAN controllers */
+#  define KINETIS_NI2S            1            /* One I2S modules */
+#  define KINETIS_NSLCD           1            /* One segment LCD interface (up to 36x8/40x4) */
+#  define KINETIS_NADC16          2            /* Four 16-bit ADC */
+#  define KINETIS_NCMP            3            /* Three analog comparators */
+#  define KINETIS_NDAC6           3            /* Three 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Two 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  define KINETIS_NTIMERS8        2            /* Two 8 channel timers */
+#  define KINETIS_NTIMERS2        2            /* Two 2 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  define KINETIS_NRNG            1            /* Random number generator */
+#  define KINETIS_NMMCAU          1            /* Hardware encryption */
+#  define KINETIS_NCRC            1            /* CRC */
+
+/* MK66F N/X 1M0/2M0 V MD/LQ 18
+ *
+ *  --------------- ------- --- ------- ------- ------ ------ ------ -----
+ *  PART NUMBER     CPU     PIN PACKAGE  TOTAL  PROGRAM EEPROM SRAM  GPIO
+ *                  FREQ    CNT          FLASH  FLASH
+ *  --------------- ------- --- ------- ------- ------ ------ ------ -----
+ *  MK66FN2M0VMD18  180 MHz 144 MAPBGA   2   MB    —    — KB  260 KB 100
+ *  MK66FX1M0VMD18  180 MHz 144 MAPBGA  1.25 MB  1 MB   4 KB  256 KB 100
+ *  MK66FN2M0VLQ18  180 MHz 144 LQFP     2   MB    —    — KB  260 KB 100
+ *  MK66FX1M0VLQ18  180 MHz 144 LQFP    1.25 MB  1 MB   4 KB  256 KB 100
+ */
+
+#elif defined(CONFIG_ARCH_CHIP_MK66FN2M0VMD18) || \
+      defined(CONFIG_ARCH_CHIP_MK66FX1M0VMD18) || \
+      defined(CONFIG_ARCH_CHIP_MK66FN2M0VLQ18) || \
+      defined(CONFIG_ARCH_CHIP_MK66FX1M0VLQ18)
+#  undef  KINETIS_K20                          /* Not Kinetis K20 family */
+#  undef  KINETIS_K40                          /* Not Kinetis K40 family */
+#  undef  KINETIS_K60                          /* Not Kinetis K60 family */
+#  undef  KINETIS_K64                          /* Not Kinetis K64 family */
+#  define KINETIS_K66             1            /* Kinetis K66 family */
+
+#  if defined(CONFIG_ARCH_CHIP_MK66FX1M0VMD18) || \
+      defined(CONFIG_ARCH_CHIP_MK66FX1M0VLQ18)
+#    define KINETIS_FLASH_SIZE      (1024*1024)  /* 1Mb */
+#    define KINETIS_FLEXNVM_SIZE    (256*1024)   /* 256Kb  */
+#    define KINETIS_FLEXRAM_SIZE    (4*1024)     /* 4Kb */
+#    define KINETIS_SRAM_SIZE       (256*1024)   /* 256Kb */
+#  endif
+#  if defined(CONFIG_ARCH_CHIP_MK66FN2M0VMD18) || \
+      defined(CONFIG_ARCH_CHIP_MK66FN2M0VLQ18)
+#    define KINETIS_FLASH_SIZE      (2048*1024)  /* 2Mb */
+#  undef  KINETIS_FLEXNVM_SIZE                   /* No FlexNVM */
+#    define KINETIS_FLEXRAM_SIZE    (4*1024)     /* 4Kb */
+#    define KINETIS_SRAM_SIZE       (256*1024)   /* 256Kb */
+#  endif
+#  define KINETIS_MPU             1            /* Memory protection unit */
+#  define KINETIS_EXTBUS          1            /* External bus interface */
+#  define KINETIS_NDMACH          32           /* Up to 32 DMA channels */
+#  define KINETIS_NENET           1            /* One IEEE 1588 Ethernet controller */
+#  define KINETIS_NUSBOTG         1            /* With USB OTG controller */
+#  define KINETIS_NUSBDEV         1            /* One USB device controller */
+#  define KINETIS_NSDHC           1            /* SD host controller */
+#  define KINETIS_NI2C            4            /* Four I2C modules */
+#  define KINETIS_NUART           5            /* Five UART modules */
+#  define KINETIS_NLPUART         1            /* One LPUART modules */
+#  define KINETIS_NSPI            3            /* Three SPI modules */
+#  define KINETIS_NCAN            2            /* Two CAN controllers */
+#  define KINETIS_NI2S            1            /* One I2S modules */
+#  undef  KINETIS_NSLCD                        /* No segment LCD interface */
+#  define KINETIS_NADC16          2            /* Four 16-bit ADC */
+#  define KINETIS_NCMP            4            /* Four analog comparators */
+#  define KINETIS_NDAC6           4            /* Four 6-bit DAC */
+#  define KINETIS_NDAC12          2            /* Two 12-bit DAC */
+#  define KINETIS_NVREF           1            /* Voltage reference */
+#  define KINETIS_NTIMERS8        2            /* ? Two 8 channel timers */
+#  define KINETIS_NTIMERS2        2            /* ? Two 2 channel timers */
+#  define KINETIS_NRTC            1            /* Real time clock */
+#  define KINETIS_NRNG            1            /* Random number generator */
+#  define KINETIS_NMMCAU          1            /* Hardware encryption */
+#  define KINETIS_NCRC            1            /* CRC */
 #else
 #  error "Unsupported Kinetis chip"
 #endif
diff --git a/arch/arm/include/kinetis/irq.h b/arch/arm/include/kinetis/irq.h
index 3355f29b02cf2dcaa2570722632ddea9bd1c57a9..6eb5f00a7ce5329430ab475a43c6dde2ecc817f6 100644
--- a/arch/arm/include/kinetis/irq.h
+++ b/arch/arm/include/kinetis/irq.h
@@ -1,8 +1,9 @@
-/************************************************************************************
+/****************************************************************************
  * arch/arm/include/kinetis/irq.h
  *
- *   Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -31,10 +32,10 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ************************************************************************************/
+ ****************************************************************************/
 
-/* This file should never be included directed but, rather, only indirectly through
- * nuttx/irq.h
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/irq.h
  */
 
 #ifndef __ARCH_ARM_INCLUDE_KINETIS_IRQ_H
@@ -50,15 +51,15 @@
 /************************************************************************************
  * Pre-processor Definitions
  ************************************************************************************/
-/* IRQ numbers **********************************************************************/
-/* The IRQ numbers corresponds directly to vector numbers and hence map directly to
+
+/* IRQ numbers.  The IRQ number corresponds vector number and hence map directly to
  * bits in the NVIC.  This does, however, waste several words of memory in the IRQ
  * to handle mapping tables.
  */
 
 /* Processor Exceptions (vectors 0-15) */
 
-#define KINETIS_IRQ_RESERVED      (0)   /* Reserved vector (only used with CONFIG_DEBUG) */
+#define KINETIS_IRQ_RESERVED      (0)   /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
                                         /* Vector  0: Reset stack pointer value */
                                         /* Vector  1: Reset (not handler as an IRQ) */
 #define KINETIS_IRQ_NMI           (2)   /* Vector  2: Non-Maskable Interrupt (NMI) */
@@ -73,316 +74,20 @@
 #define KINETIS_IRQ_PENDSV        (14)  /* Vector 14: Pendable system service request */
 #define KINETIS_IRQ_SYSTICK       (15)  /* Vector 15: System tick */
 
-/* External interrupts (vectors >= 16) */
-
-#define KINETIS_IRQ_EXTINT        (16)
-
-/* K20 Family ***********************************************************************
- *
- * The interrupt vectors  for the following parts is defined in Freescale document
- * K20P64M72SF1RM
- */
-
-#if defined(CONFIG_ARCH_CHIP_MK20DX256VLH7)
-#  define KINETIS_IRQ_DMACH0      (16)  /* Vector 16: DMA channel 0 transfer complete */
-#  define KINETIS_IRQ_DMACH1      (17)  /* Vector 17: DMA channel 1 transfer complete */
-#  define KINETIS_IRQ_DMACH2      (18)  /* Vector 18: DMA channel 2 transfer complete */
-#  define KINETIS_IRQ_DMACH3      (19)  /* Vector 19: DMA channel 3 transfer complete */
-#  define KINETIS_IRQ_DMACH4      (20)  /* Vector 20: DMA channel 4 transfer complete */
-#  define KINETIS_IRQ_DMACH5      (21)  /* Vector 21: DMA channel 5 transfer complete */
-#  define KINETIS_IRQ_DMACH6      (22)  /* Vector 22: DMA channel 6 transfer complete */
-#  define KINETIS_IRQ_DMACH7      (23)  /* Vector 23: DMA channel 7 transfer complete */
-#  define KINETIS_IRQ_DMACH8      (24)  /* Vector 24: DMA channel 8 transfer complete */
-#  define KINETIS_IRQ_DMACH9      (25)  /* Vector 25: DMA channel 9 transfer complete */
-#  define KINETIS_IRQ_DMACH10     (26)  /* Vector 26: DMA channel 10 transfer complete */
-#  define KINETIS_IRQ_DMACH11     (27)  /* Vector 27: DMA channel 11 transfer complete */
-#  define KINETIS_IRQ_DMACH12     (28)  /* Vector 28: DMA channel 12 transfer complete */
-#  define KINETIS_IRQ_DMACH13     (29)  /* Vector 29: DMA channel 13 transfer complete */
-#  define KINETIS_IRQ_DMACH14     (30)  /* Vector 30: DMA channel 14 transfer complete */
-#  define KINETIS_IRQ_DMACH15     (31)  /* Vector 31: DMA channel 15 transfer complete */
-#  define KINETIS_IRQ_DMAERR      (32)  /* Vector 32: DMA error interrupt channels 0-15 */
-#  define KINETIS_IRQ_FLASHCC     (34)  /* Vector 34: Flash memory command complete */
-#  define KINETIS_IRQ_FLASHRC     (35)  /* Vector 35: Flash memory read collision */
-#  define KINETIS_IRQ_SMCLVD      (36)  /* Vector 36: Mode Controller low-voltage
-                                         *            detect, low-voltage warning */
-#  define KINETIS_IRQ_LLWU        (37)  /* Vector 37: LLWU Normal Low Leakage Wakeup */
-#  define KINETIS_IRQ_WDOG        (38)  /* Vector 38: Watchdog */
-#  define KINETIS_IRQ_I2C0        (40)  /* Vector 40: I2C0 */
-#  define KINETIS_IRQ_I2C1        (41)  /* Vector 41: I2C1 */
-#  define KINETIS_IRQ_SPI0        (42)  /* Vector 42: SPI0 all sources */
-#  define KINETIS_IRQ_SPI1        (43)  /* Vector 43: SPI1 all sources */
-#  define KINETIS_IRQ_CAN0MB      (45)  /* Vector 45: CAN0 OR'ed Message buffer (0-15) */
-#  define KINETIS_IRQ_CAN0BO      (46)  /* Vector 46: CAN0 Bus Off */
-#  define KINETIS_IRQ_CAN0ERR     (47)  /* Vector 47: CAN0 Error */
-#  define KINETIS_IRQ_CAN0TW      (48)  /* Vector 48: CAN0 Transmit Warning */
-#  define KINETIS_IRQ_CAN0RW      (49)  /* Vector 49: CAN0 Receive Warning */
-#  define KINETIS_IRQ_CAN0WU      (50)  /* Vector 50: CAN0 Wake UP */
-//TODO UART0_LON
-#  define KINETIS_IRQ_UART0S      (61)  /* Vector 61: UART0 status */
-#  define KINETIS_IRQ_UART0E      (62)  /* Vector 62: UART0 error */
-#  define KINETIS_IRQ_UART1S      (63)  /* Vector 63: UART1 status */
-#  define KINETIS_IRQ_UART1E      (64)  /* Vector 64: UART1 error */
-#  define KINETIS_IRQ_UART2S      (65)  /* Vector 65: UART2 status */
-#  define KINETIS_IRQ_UART2E      (66)  /* Vector 66: UART2 error */
-#  define KINETIS_IRQ_ADC0        (73)  /* Vector 73: ADC0 */
-#  define KINETIS_IRQ_ADC1        (74)  /* Vector 74: ADC1 */
-#  define KINETIS_IRQ_CMP0        (75)  /* Vector 75: CMP0 */
-#  define KINETIS_IRQ_CMP1        (76)  /* Vector 76: CMP1 */
-#  define KINETIS_IRQ_CMP2        (77)  /* Vector 77: CMP2 */
-#  define KINETIS_IRQ_FTM0        (78)  /* Vector 78: FTM0 all sources */
-#  define KINETIS_IRQ_FTM1        (79)  /* Vector 79: FTM1 all sources */
-#  define KINETIS_IRQ_FTM2        (80)  /* Vector 80: FTM2 all sources */
-#  define KINETIS_IRQ_CMT         (81)  /* Vector 81: CMT */
-#  define KINETIS_IRQ_RTC         (82)  /* Vector 82: RTC alarm interrupt */
-//TODO RTC_SECOND
-#  define KINETIS_IRQ_PITCH0      (84)  /* Vector 84: PIT channel 0 */
-#  define KINETIS_IRQ_PITCH1      (85)  /* Vector 85: PIT channel 1 */
-#  define KINETIS_IRQ_PITCH2      (86)  /* Vector 86: PIT channel 2 */
-#  define KINETIS_IRQ_PITCH3      (87)  /* Vector 87: PIT channel 3 */
-#  define KINETIS_IRQ_PDB         (88)  /* Vector 88: PDB */
-#  define KINETIS_IRQ_USBOTG      (89)  /* Vector 88: USB OTG */
-#  define KINETIS_IRQ_USBCD       (90)  /* Vector 90: USB charger detect */
-#  define KINETIS_IRQ_DAC0        (97)  /* Vector 97: DAC0 */
-#  define KINETIS_IRQ_TSI         (99)  /* Vector 97: TSI all sources */
-#  define KINETIS_IRQ_MCG         (100) /* Vector 100: MCG */
-#  define KINETIS_IRQ_LPT         (101) /* Vector 101: Low power timer */
-#  define KINETIS_IRQ_PORTA       (103) /* Vector 103: Pin detect port A */
-#  define KINETIS_IRQ_PORTB       (104) /* Vector 104: Pin detect port B */
-#  define KINETIS_IRQ_PORTC       (105) /* Vector 105: Pin detect port C */
-#  define KINETIS_IRQ_PORTD       (106) /* Vector 106: Pin detect port D */
-#  define KINETIS_IRQ_PORTE       (107) /* Vector 107: Pin detect port E */
-#  define KINETIS_IRQ_SWI         (110) /* Vector 110: Software interrupt */
-
-#  define NR_VECTORS              (111) /* 111 vectors */
-#  define NR_IRQS                 (111) /* 94 interrupts but 111 IRQ numbers */
-
-/* K40 Family ***********************************************************************
- *
- * The interrupt vectors  for the following parts is defined in Freescale document
- * K40P144M100SF2RM
- */
-
-#elif defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100) || \
-    defined(CONFIG_ARCH_CHIP_MK40X256VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X256VMD100) || \
-    defined(CONFIG_ARCH_CHIP_MK40N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK40N512VMD100)
-
-#  define KINETIS_IRQ_DMACH0      (16)  /* Vector 16: DMA channel 0 transfer complete */
-#  define KINETIS_IRQ_DMACH1      (17)  /* Vector 17: DMA channel 1 transfer complete */
-#  define KINETIS_IRQ_DMACH2      (18)  /* Vector 18: DMA channel 2 transfer complete */
-#  define KINETIS_IRQ_DMACH3      (19)  /* Vector 19: DMA channel 3 transfer complete */
-#  define KINETIS_IRQ_DMACH4      (20)  /* Vector 20: DMA channel 4 transfer complete */
-#  define KINETIS_IRQ_DMACH5      (21)  /* Vector 21: DMA channel 5 transfer complete */
-#  define KINETIS_IRQ_DMACH6      (22)  /* Vector 22: DMA channel 6 transfer complete */
-#  define KINETIS_IRQ_DMACH7      (23)  /* Vector 23: DMA channel 7 transfer complete */
-#  define KINETIS_IRQ_DMACH8      (24)  /* Vector 24: DMA channel 8 transfer complete */
-#  define KINETIS_IRQ_DMACH9      (25)  /* Vector 25: DMA channel 9 transfer complete */
-#  define KINETIS_IRQ_DMACH10     (26)  /* Vector 26: DMA channel 10 transfer complete */
-#  define KINETIS_IRQ_DMACH11     (27)  /* Vector 27: DMA channel 11 transfer complete */
-#  define KINETIS_IRQ_DMACH12     (28)  /* Vector 28: DMA channel 12 transfer complete */
-#  define KINETIS_IRQ_DMACH13     (29)  /* Vector 29: DMA channel 13 transfer complete */
-#  define KINETIS_IRQ_DMACH14     (30)  /* Vector 30: DMA channel 14 transfer complete */
-#  define KINETIS_IRQ_DMACH15     (31)  /* Vector 31: DMA channel 15 transfer complete */
-#  define KINETIS_IRQ_DMAERR      (32)  /* Vector 32: DMA error interrupt channels 0-15 */
-#  define KINETIS_IRQ_MCM         (33)  /* Vector 33: MCM Normal interrupt */
-#  define KINETIS_IRQ_FLASHCC     (34)  /* Vector 34: Flash memory command complete */
-#  define KINETIS_IRQ_FLASHRC     (35)  /* Vector 35: Flash memory read collision */
-#  define KINETIS_IRQ_SMCLVD      (36)  /* Vector 36: Mode Controller low-voltage
-                                         *            detect, low-voltage warning */
-#  define KINETIS_IRQ_LLWU        (37)  /* Vector 37: LLWU Normal Low Leakage Wakeup */
-#  define KINETIS_IRQ_WDOG        (38)  /* Vector 38: Watchdog */
-                                        /* Vector 39: Reserved */
-#  define KINETIS_IRQ_I2C0        (40)  /* Vector 40: I2C0 */
-#  define KINETIS_IRQ_I2C1        (41)  /* Vector 41: I2C1 */
-#  define KINETIS_IRQ_SPI0        (42)  /* Vector 42: SPI0 all sources */
-#  define KINETIS_IRQ_SPI1        (43)  /* Vector 43: SPI1 all sources */
-#  define KINETIS_IRQ_SPI2        (44)  /* Vector 44: SPI2 all sources */
-#  define KINETIS_IRQ_CAN0MB      (45)  /* Vector 45: CAN0 OR'ed Message buffer (0-15) */
-#  define KINETIS_IRQ_CAN0BO      (46)  /* Vector 46: CAN0 Bus Off */
-#  define KINETIS_IRQ_CAN0ERR     (47)  /* Vector 47: CAN0 Error */
-#  define KINETIS_IRQ_CAN0TW      (48)  /* Vector 48: CAN0 Transmit Warning */
-#  define KINETIS_IRQ_CAN0RW      (49)  /* Vector 49: CAN0 Receive Warning */
-#  define KINETIS_IRQ_CAN0WU      (50)  /* Vector 50: CAN0 Wake UP */
-                                        /* Vectors 51-52: Reserved */
-#  define KINETIS_IRQ_CAN1MB      (53)  /* Vector 53: CAN1 OR'ed Message buffer (0-15) */
-#  define KINETIS_IRQ_CAN1BO      (54)  /* Vector 54: CAN1 Bus Off */
-#  define KINETIS_IRQ_CAN1ERR     (55)  /* Vector 55: CAN1 Error */
-#  define KINETIS_IRQ_CAN1TW      (56)  /* Vector 56: CAN1 Transmit Warning */
-#  define KINETIS_IRQ_CAN1RW      (57)  /* Vector 57: CAN1 Receive Warning */
-#  define KINETIS_IRQ_CAN1WU      (58)  /* Vector 58: CAN1 Wake UP */
-                                        /* Vectors 59-60: Reserved */
-#  define KINETIS_IRQ_UART0S      (61)  /* Vector 61: UART0 status */
-#  define KINETIS_IRQ_UART0E      (62)  /* Vector 62: UART0 error */
-#  define KINETIS_IRQ_UART1S      (63)  /* Vector 63: UART1 status */
-#  define KINETIS_IRQ_UART1E      (64)  /* Vector 64: UART1 error */
-#  define KINETIS_IRQ_UART2S      (65)  /* Vector 65: UART2 status */
-#  define KINETIS_IRQ_UART2E      (66)  /* Vector 66: UART2 error */
-#  define KINETIS_IRQ_UART3S      (67)  /* Vector 67: UART3 status */
-#  define KINETIS_IRQ_UART3E      (68)  /* Vector 68: UART3 error */
-#  define KINETIS_IRQ_UART4S      (69)  /* Vector 69: UART4 status */
-#  define KINETIS_IRQ_UART4E      (70)  /* Vector 70: UART4 error */
-#  define KINETIS_IRQ_UART5S      (71)  /* Vector 71: UART5 status */
-#  define KINETIS_IRQ_UART5E      (72)  /* Vector 72: UART5 error */
-#  define KINETIS_IRQ_ADC0        (73)  /* Vector 73: ADC0 */
-#  define KINETIS_IRQ_ADC1        (74)  /* Vector 74: ADC1 */
-#  define KINETIS_IRQ_CMP0        (75)  /* Vector 75: CMP0 */
-#  define KINETIS_IRQ_CMP1        (76)  /* Vector 76: CMP1 */
-#  define KINETIS_IRQ_CMP2        (77)  /* Vector 77: CMP2 */
-#  define KINETIS_IRQ_FTM0        (78)  /* Vector 78: FTM0 all sources */
-#  define KINETIS_IRQ_FTM1        (79)  /* Vector 79: FTM1 all sources */
-#  define KINETIS_IRQ_FTM2        (80)  /* Vector 80: FTM2 all sources */
-#  define KINETIS_IRQ_CMT         (81)  /* Vector 81: CMT */
-#  define KINETIS_IRQ_RTC         (82)  /* Vector 82: RTC alarm interrupt */
-                                        /* Vector 83: Reserved */
-#  define KINETIS_IRQ_PITCH0      (84)  /* Vector 84: PIT channel 0 */
-#  define KINETIS_IRQ_PITCH1      (85)  /* Vector 85: PIT channel 1 */
-#  define KINETIS_IRQ_PITCH2      (86)  /* Vector 86: PIT channel 2 */
-#  define KINETIS_IRQ_PITCH3      (87)  /* Vector 87: PIT channel 3 */
-#  define KINETIS_IRQ_PDB         (88)  /* Vector 88: PDB */
-#  define KINETIS_IRQ_USBOTG      (89)  /* Vector 88: USB OTG */
-#  define KINETIS_IRQ_USBCD       (90)  /* Vector 90: USB charger detect */
-                                        /* Vectors 91-94: Reserved */
-#  define KINETIS_IRQ_I2S0        (95)  /* Vector 95: I2S0 */
-#  define KINETIS_IRQ_SDHC        (96)  /* Vector 96: SDHC */
-#  define KINETIS_IRQ_DAC0        (97)  /* Vector 97: DAC0 */
-#  define KINETIS_IRQ_DAC1        (98)  /* Vector 98: DAC1 */
-#  define KINETIS_IRQ_TSI         (99)  /* Vector 97: TSI all sources */
-#  define KINETIS_IRQ_MCG         (100) /* Vector 100: MCG */
-#  define KINETIS_IRQ_LPT         (101) /* Vector 101: Low power timer */
-#  define KINETIS_IRQ_SLCD        (102) /* Vector 102: Segment LCD all sources */
-#  define KINETIS_IRQ_PORTA       (103) /* Vector 103: Pin detect port A */
-#  define KINETIS_IRQ_PORTB       (104) /* Vector 104: Pin detect port B */
-#  define KINETIS_IRQ_PORTC       (105) /* Vector 105: Pin detect port C */
-#  define KINETIS_IRQ_PORTD       (106) /* Vector 106: Pin detect port D */
-#  define KINETIS_IRQ_PORTE       (107) /* Vector 107: Pin detect port E */
-                                        /* Vectors 108-109: Reserved */
-#  define KINETIS_IRQ_SWI         (110) /* Vector 110: Software interrupt */
-
-/* Note that the total number of IRQ numbers supported is equal to the number of
- * valid interrupt vectors.  This is wasteful in that certain tables are sized by
- * this value.  There are only 94 valid interrupts so, potentially the numver of
- * IRQs to could be reduced to 94.  However, equating IRQ numbers with vector numbers
- * also simplifies operations on NVIC registers and (at least in my state of mind
- * now) seems to justify the waste.
- */
-
-#  define NR_VECTORS              (111) /* 111 vectors */
-#  define NR_IRQS                 (111) /* 94 interrupts but 111 IRQ numbers */
-
-/* K60 Family ***********************************************************************
- *
- * The memory map for the following parts is defined in Freescale document
- * K60P144M100SF2RM
- */
-
-#elif defined(CONFIG_ARCH_CHIP_MK60N256VLQ100) || defined(CONFIG_ARCH_CHIP_MK60X256VLQ100) || \
-      defined(CONFIG_ARCH_CHIP_MK60N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK60N256VMD100) || \
-      defined(CONFIG_ARCH_CHIP_MK60X256VMD100) || defined(CONFIG_ARCH_CHIP_MK60N512VMD100) || \
-      defined(CONFIG_ARCH_CHIP_MK60N512VLL100)
-
-#  define KINETIS_IRQ_DMACH0      (16)  /* Vector 16: DMA channel 0 transfer complete */
-#  define KINETIS_IRQ_DMACH1      (17)  /* Vector 17: DMA channel 1 transfer complete */
-#  define KINETIS_IRQ_DMACH2      (18)  /* Vector 18: DMA channel 2 transfer complete */
-#  define KINETIS_IRQ_DMACH3      (19)  /* Vector 19: DMA channel 3 transfer complete */
-#  define KINETIS_IRQ_DMACH4      (20)  /* Vector 20: DMA channel 4 transfer complete */
-#  define KINETIS_IRQ_DMACH5      (21)  /* Vector 21: DMA channel 5 transfer complete */
-#  define KINETIS_IRQ_DMACH6      (22)  /* Vector 22: DMA channel 6 transfer complete */
-#  define KINETIS_IRQ_DMACH7      (23)  /* Vector 23: DMA channel 7 transfer complete */
-#  define KINETIS_IRQ_DMACH8      (24)  /* Vector 24: DMA channel 8 transfer complete */
-#  define KINETIS_IRQ_DMACH9      (25)  /* Vector 25: DMA channel 9 transfer complete */
-#  define KINETIS_IRQ_DMACH10     (26)  /* Vector 26: DMA channel 10 transfer complete */
-#  define KINETIS_IRQ_DMACH11     (27)  /* Vector 27: DMA channel 11 transfer complete */
-#  define KINETIS_IRQ_DMACH12     (28)  /* Vector 28: DMA channel 12 transfer complete */
-#  define KINETIS_IRQ_DMACH13     (29)  /* Vector 29: DMA channel 13 transfer complete */
-#  define KINETIS_IRQ_DMACH14     (30)  /* Vector 30: DMA channel 14 transfer complete */
-#  define KINETIS_IRQ_DMACH15     (31)  /* Vector 31: DMA channel 15 transfer complete */
-#  define KINETIS_IRQ_DMAERR      (32)  /* Vector 32: DMA error interrupt channels 0-15 */
-#  define KINETIS_IRQ_MCM         (33)  /* Vector 33: MCM Normal interrupt */
-#  define KINETIS_IRQ_FLASHCC     (34)  /* Vector 34: Flash memory command complete */
-#  define KINETIS_IRQ_FLASHRC     (35)  /* Vector 35: Flash memory read collision */
-#  define KINETIS_IRQ_SMCLVD      (36)  /* Vector 36: Mode Controller low-voltage
-                                         *            detect, low-voltage warning */
-#  define KINETIS_IRQ_LLWU        (37)  /* Vector 37: LLWU Normal Low Leakage Wakeup */
-#  define KINETIS_IRQ_WDOG        (38)  /* Vector 38: Watchdog */
-#  define KINETIS_IRQ_RNGB        (39)  /* Vector 39: Random number generator */
-#  define KINETIS_IRQ_I2C0        (40)  /* Vector 40: I2C0 */
-#  define KINETIS_IRQ_I2C1        (41)  /* Vector 41: I2C1 */
-#  define KINETIS_IRQ_SPI0        (42)  /* Vector 42: SPI0 all sources */
-#  define KINETIS_IRQ_SPI1        (43)  /* Vector 43: SPI1 all sources */
-#  define KINETIS_IRQ_SPI2        (44)  /* Vector 44: SPI2 all sources */
-#  define KINETIS_IRQ_CAN0MB      (45)  /* Vector 45: CAN0 OR'ed Message buffer (0-15) */
-#  define KINETIS_IRQ_CAN0BO      (46)  /* Vector 46: CAN0 Bus Off */
-#  define KINETIS_IRQ_CAN0ERR     (47)  /* Vector 47: CAN0 Error */
-#  define KINETIS_IRQ_CAN0TW      (48)  /* Vector 48: CAN0 Transmit Warning */
-#  define KINETIS_IRQ_CAN0RW      (49)  /* Vector 49: CAN0 Receive Warning */
-#  define KINETIS_IRQ_CAN0WU      (50)  /* Vector 50: CAN0 Wake UP */
-                                        /* Vectors 51-52: Reserved */
-#  define KINETIS_IRQ_CAN1MB      (53)  /* Vector 53: CAN1 OR'ed Message buffer (0-15) */
-#  define KINETIS_IRQ_CAN1BO      (54)  /* Vector 54: CAN1 Bus Off */
-#  define KINETIS_IRQ_CAN1ERR     (55)  /* Vector 55: CAN1 Error */
-#  define KINETIS_IRQ_CAN1TW      (56)  /* Vector 56: CAN1 Transmit Warning */
-#  define KINETIS_IRQ_CAN1RW      (57)  /* Vector 57: CAN1 Receive Warning */
-#  define KINETIS_IRQ_CAN1WU      (58)  /* Vector 58: CAN1 Wake UP */
-                                        /* Vectors 59-60: Reserved */
-#  define KINETIS_IRQ_UART0S      (61)  /* Vector 61: UART0 status */
-#  define KINETIS_IRQ_UART0E      (62)  /* Vector 62: UART0 error */
-#  define KINETIS_IRQ_UART1S      (63)  /* Vector 63: UART1 status */
-#  define KINETIS_IRQ_UART1E      (64)  /* Vector 64: UART1 error */
-#  define KINETIS_IRQ_UART2S      (65)  /* Vector 65: UART2 status */
-#  define KINETIS_IRQ_UART2E      (66)  /* Vector 66: UART2 error */
-#  define KINETIS_IRQ_UART3S      (67)  /* Vector 67: UART3 status */
-#  define KINETIS_IRQ_UART3E      (68)  /* Vector 68: UART3 error */
-#  define KINETIS_IRQ_UART4S      (69)  /* Vector 69: UART4 status */
-#  define KINETIS_IRQ_UART4E      (70)  /* Vector 70: UART4 error */
-#  define KINETIS_IRQ_UART5S      (71)  /* Vector 71: UART5 status */
-#  define KINETIS_IRQ_UART5E      (72)  /* Vector 72: UART5 error */
-#  define KINETIS_IRQ_ADC0        (73)  /* Vector 73: ADC0 */
-#  define KINETIS_IRQ_ADC1        (74)  /* Vector 74: ADC1 */
-#  define KINETIS_IRQ_CMP0        (75)  /* Vector 75: CMP0 */
-#  define KINETIS_IRQ_CMP1        (76)  /* Vector 76: CMP1 */
-#  define KINETIS_IRQ_CMP2        (77)  /* Vector 77: CMP2 */
-#  define KINETIS_IRQ_FTM0        (78)  /* Vector 78: FTM0 all sources */
-#  define KINETIS_IRQ_FTM1        (79)  /* Vector 79: FTM1 all sources */
-#  define KINETIS_IRQ_FTM2        (80)  /* Vector 80: FTM2 all sources */
-#  define KINETIS_IRQ_CMT         (81)  /* Vector 81: CMT */
-#  define KINETIS_IRQ_RTC         (82)  /* Vector 82: RTC alarm interrupt */
-                                        /* Vector 83: Reserved */
-#  define KINETIS_IRQ_PITCH0      (84)  /* Vector 84: PIT channel 0 */
-#  define KINETIS_IRQ_PITCH1      (85)  /* Vector 85: PIT channel 1 */
-#  define KINETIS_IRQ_PITCH2      (86)  /* Vector 86: PIT channel 2 */
-#  define KINETIS_IRQ_PITCH3      (87)  /* Vector 87: PIT channel 3 */
-#  define KINETIS_IRQ_PDB         (88)  /* Vector 88: PDB */
-#  define KINETIS_IRQ_USBOTG      (89)  /* Vector 88: USB OTG */
-#  define KINETIS_IRQ_USBCD       (90)  /* Vector 90: USB charger detect */
-#  define KINETIS_IRQ_EMACTMR     (91)  /* Vector 91: Ethernet MAC IEEE 1588 timer interrupt */
-#  define KINETIS_IRQ_EMACTX      (92)  /* Vector 92: Ethernet MAC transmit interrupt */
-#  define KINETIS_IRQ_EMACRX      (93)  /* Vector 93: Ethernet MAC receive interrupt */
-#  define KINETIS_IRQ_EMACMISC    (94)  /* Vector 94: Ethernet MAC error and misc interrupt */
-#  define KINETIS_IRQ_I2S0        (95)  /* Vector 95: I2S0 */
-#  define KINETIS_IRQ_SDHC        (96)  /* Vector 96: SDHC */
-#  define KINETIS_IRQ_DAC0        (97)  /* Vector 97: DAC0 */
-#  define KINETIS_IRQ_DAC1        (98)  /* Vector 98: DAC1 */
-#  define KINETIS_IRQ_TSI         (99)  /* Vector 97: TSI all sources */
-#  define KINETIS_IRQ_MCG         (100) /* Vector 100: MCG */
-#  define KINETIS_IRQ_LPT         (101) /* Vector 101: Low power timer */
-                                        /* Vector 102: Reserved */
-#  define KINETIS_IRQ_PORTA       (103) /* Vector 103: Pin detect port A */
-#  define KINETIS_IRQ_PORTB       (104) /* Vector 104: Pin detect port B */
-#  define KINETIS_IRQ_PORTC       (105) /* Vector 105: Pin detect port C */
-#  define KINETIS_IRQ_PORTD       (106) /* Vector 106: Pin detect port D */
-#  define KINETIS_IRQ_PORTE       (107) /* Vector 107: Pin detect port E */
-                                        /* Vectors 108-119: Reserved */
-
-/* Note that the total number of IRQ numbers supported is equal to the number of
- * valid interrupt vectors.  This is wasteful in that certain tables are sized by
- * this value.  There are only 97 valid interrupts so, potentially the number of
- * IRQs to could be reduced to 97.  However, equating IRQ numbers with vector numbers
- * also simplifies operations on NVIC registers and (at least in my state of mind
- * now) seems to justify the waste.
- */
+/* External interrupts (vectors >= 16).  These definitions are chip-specific */
 
-#  define NR_VECTORS              (120) /* 120 vectors */
-#  define NR_IRQS                 (108) /* 120 interrupts but 108 IRQ numbers */
+#define KINETIS_IRQ_FIRST        (16) /* Vector number of the first external interrupt */
 
+#if defined(CONFIG_ARCH_FAMILY_K20)
+#  include 
+#elif defined(CONFIG_ARCH_FAMILY_K40)
+#  include 
+#elif defined(CONFIG_ARCH_FAMILY_K60)
+#  include 
+#elif defined(CONFIG_ARCH_FAMILY_K64)
+#  include 
+#elif defined(CONFIG_ARCH_FAMILY_K66)
+#  include 
 #else
   /* The interrupt vectors for other parts are defined in other documents and may or
    * may not be the same as above (the family members are all very similar)  This
@@ -390,7 +95,7 @@
    * if the vectors are the same.
    */
 
-#  error "No IRQ numbers for this Kinetis part"
+#  error "No IRQ numbers for this Kinetis K part"
 #endif
 
 /************************************************************************************
diff --git a/arch/arm/include/kinetis/kinetis_k20irq.h b/arch/arm/include/kinetis/kinetis_k20irq.h
new file mode 100644
index 0000000000000000000000000000000000000000..a5bb3068a655f27e97e048d2a6cfd15a2ca576a1
--- /dev/null
+++ b/arch/arm/include/kinetis/kinetis_k20irq.h
@@ -0,0 +1,200 @@
+/*****************************************************************************
+ * arch/arm/include/kinetis/kinetis_k20irq.h
+ *
+ *   Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/irq.h
+ */
+
+#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K20IRQ_H
+#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K20IRQ_H
+
+/*****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/*****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* IRQ numbers.  The IRQ number corresponds vector number and hence map
+ * directly to bits in the NVIC.  This does, however, waste several words of
+ * memory in the IRQ to handle mapping tables.
+ *
+ * Processor Exceptions (vectors 0-15).  These common definitions can be found
+ * in the file nuttx/arch/arm/include/kinets/irq.h which includes this file
+ *
+ * External interrupts (vectors >= 16)
+ *
+ * K20 Family ****************************************************************
+ *
+ * The interrupt vectors  for the following parts is defined in Freescale
+ * document K20P64M72SF1RM
+ */
+
+#define KINETIS_IRQ_DMACH0  (KINETIS_IRQ_FIRST+0)   /* 0: DMA channel 0 transfer complete */
+#define KINETIS_IRQ_DMACH1  (KINETIS_IRQ_FIRST+1)   /* 1: DMA channel 1 transfer complete */
+#define KINETIS_IRQ_DMACH2  (KINETIS_IRQ_FIRST+2)   /* 2: DMA channel 2 transfer complete */
+#define KINETIS_IRQ_DMACH3  (KINETIS_IRQ_FIRST+3)   /* 3: DMA channel 3 transfer complete */
+#define KINETIS_IRQ_DMACH4  (KINETIS_IRQ_FIRST+4)   /* 4: DMA channel 4 transfer complete */
+#define KINETIS_IRQ_DMACH5  (KINETIS_IRQ_FIRST+5)   /* 5: DMA channel 5 transfer complete */
+#define KINETIS_IRQ_DMACH6  (KINETIS_IRQ_FIRST+6)   /* 6: DMA channel 6 transfer complete */
+#define KINETIS_IRQ_DMACH7  (KINETIS_IRQ_FIRST+7)   /* 7: DMA channel 7 transfer complete */
+#define KINETIS_IRQ_DMACH8  (KINETIS_IRQ_FIRST+8)   /* 8: DMA channel 8 transfer complete */
+#define KINETIS_IRQ_DMACH9  (KINETIS_IRQ_FIRST+9)   /* 9: DMA channel 9 transfer complete */
+#define KINETIS_IRQ_DMACH10 (KINETIS_IRQ_FIRST+10)  /* 10: DMA channel 10 transfer complete */
+#define KINETIS_IRQ_DMACH11 (KINETIS_IRQ_FIRST+11)  /* 11: DMA channel 11 transfer complete */
+#define KINETIS_IRQ_DMACH12 (KINETIS_IRQ_FIRST+12)  /* 12: DMA channel 12 transfer complete */
+#define KINETIS_IRQ_DMACH13 (KINETIS_IRQ_FIRST+13)  /* 13: DMA channel 13 transfer complete */
+#define KINETIS_IRQ_DMACH14 (KINETIS_IRQ_FIRST+14)  /* 14: DMA channel 14 transfer complete */
+#define KINETIS_IRQ_DMACH15 (KINETIS_IRQ_FIRST+15)  /* 15: DMA channel 15 transfer complete */
+#define KINETIS_IRQ_DMAERR  (KINETIS_IRQ_FIRST+16)  /* 16: DMA error interrupt channels 0-15 */
+#define KINETIS_IRQ_RESVD17 (KINETIS_IRQ_FIRST+17)  /* 17: Reserved */
+#define KINETIS_IRQ_FLASHCC (KINETIS_IRQ_FIRST+18)  /* 18: Flash memory command complete */
+#define KINETIS_IRQ_FLASHRC (KINETIS_IRQ_FIRST+19)  /* 19: Flash memory read collision */
+#define KINETIS_IRQ_SMCLVD  (KINETIS_IRQ_FIRST+20)  /* 20: Mode Controller low-voltage
+                                                     *     detect, low-voltage warning */
+#define KINETIS_IRQ_LLWU    (KINETIS_IRQ_FIRST+21)  /* 21: LLWU Normal Low Leakage Wakeup */
+#define KINETIS_IRQ_WDOG    (KINETIS_IRQ_FIRST+22)  /* 22: Watchdog */
+#define KINETIS_IRQ_RESVD23 (KINETIS_IRQ_FIRST+23)  /* 23: Reserved */
+#define KINETIS_IRQ_I2C0    (KINETIS_IRQ_FIRST+24)  /* 24: I2C0 */
+#define KINETIS_IRQ_I2C1    (KINETIS_IRQ_FIRST+25)  /* 25: I2C1 */
+#define KINETIS_IRQ_SPI0    (KINETIS_IRQ_FIRST+26)  /* 26: SPI0 all sources */
+#define KINETIS_IRQ_SPI1    (KINETIS_IRQ_FIRST+27)  /* 27: SPI1 all sources */
+#define KINETIS_IRQ_RESVD28 (KINETIS_IRQ_FIRST+28)  /* 28: Reserved */
+#define KINETIS_IRQ_CAN0MB  (KINETIS_IRQ_FIRST+29)  /* 29: CAN0 OR'ed Message buffer (0-15) */
+#define KINETIS_IRQ_CAN0BO  (KINETIS_IRQ_FIRST+30)  /* 30: CAN0 Bus Off */
+#define KINETIS_IRQ_CAN0ERR (KINETIS_IRQ_FIRST+31)  /* 31: CAN0 Error */
+#define KINETIS_IRQ_CAN0TW  (KINETIS_IRQ_FIRST+32)  /* 32: CAN0 Transmit Warning */
+#define KINETIS_IRQ_CAN0RW  (KINETIS_IRQ_FIRST+33)  /* 33: CAN0 Receive Warning */
+#define KINETIS_IRQ_CAN0WU  (KINETIS_IRQ_FIRST+34)  /* 34: CAN0 Wake UP */
+#define KINETIS_IRQ_I2S0TX  (KINETIS_IRQ_FIRST+35)  /* 35: I2S0 Transmit */
+#define KINETIS_IRQ_I2S0TX  (KINETIS_IRQ_FIRST+36)  /* 36: I2S0 Receive */
+#define KINETIS_IRQ_RESVD37 (KINETIS_IRQ_FIRST+37)  /* 37: Reserved */
+#define KINETIS_IRQ_RESVD38 (KINETIS_IRQ_FIRST+38)  /* 38: Reserved */
+#define KINETIS_IRQ_RESVD39 (KINETIS_IRQ_FIRST+39)  /* 39: Reserved */
+#define KINETIS_IRQ_RESVD40 (KINETIS_IRQ_FIRST+40)  /* 40: Reserved */
+#define KINETIS_IRQ_RESVD41 (KINETIS_IRQ_FIRST+41)  /* 41: Reserved */
+#define KINETIS_IRQ_RESVD42 (KINETIS_IRQ_FIRST+42)  /* 42: Reserved */
+#define KINETIS_IRQ_RESVD43 (KINETIS_IRQ_FIRST+43)  /* 43: Reserved */
+#define KINETIS_IRQ_UART0L  (KINETIS_IRQ_FIRST+44)  /* 44: UART0 LON */
+#define KINETIS_IRQ_UART0S  (KINETIS_IRQ_FIRST+45)  /* 45: UART0 status */
+#define KINETIS_IRQ_UART0E  (KINETIS_IRQ_FIRST+46)  /* 46: UART0 error */
+#define KINETIS_IRQ_UART1S  (KINETIS_IRQ_FIRST+47)  /* 47: UART1 status */
+#define KINETIS_IRQ_UART1E  (KINETIS_IRQ_FIRST+48)  /* 48: UART1 error */
+#define KINETIS_IRQ_UART2S  (KINETIS_IRQ_FIRST+49)  /* 49: UART2 status */
+#define KINETIS_IRQ_UART2E  (KINETIS_IRQ_FIRST+50)  /* 50: UART2 error */
+#define KINETIS_IRQ_RESVD51 (KINETIS_IRQ_FIRST+51)  /* 51: Reserved */
+#define KINETIS_IRQ_RESVD52 (KINETIS_IRQ_FIRST+52)  /* 52: Reserved */
+#define KINETIS_IRQ_RESVD53 (KINETIS_IRQ_FIRST+53)  /* 53: Reserved */
+#define KINETIS_IRQ_RESVD54 (KINETIS_IRQ_FIRST+54)  /* 54: Reserved */
+#define KINETIS_IRQ_RESVD55 (KINETIS_IRQ_FIRST+55)  /* 55: Reserved */
+#define KINETIS_IRQ_RESVD56 (KINETIS_IRQ_FIRST+56)  /* 56: Reserved */
+#define KINETIS_IRQ_ADC0    (KINETIS_IRQ_FIRST+57)  /* 57: ADC0 */
+#define KINETIS_IRQ_ADC1    (KINETIS_IRQ_FIRST+58)  /* 58: ADC1 */
+#define KINETIS_IRQ_CMP0    (KINETIS_IRQ_FIRST+59)  /* 59: CMP0 */
+#define KINETIS_IRQ_CMP1    (KINETIS_IRQ_FIRST+60)  /* 60: CMP1 */
+#define KINETIS_IRQ_CMP2    (KINETIS_IRQ_FIRST+61)  /* 61: CMP2 */
+#define KINETIS_IRQ_FTM0    (KINETIS_IRQ_FIRST+62)  /* 62: FTM0 all sources */
+#define KINETIS_IRQ_FTM1    (KINETIS_IRQ_FIRST+63)  /* 63: FTM1 all sources */
+#define KINETIS_IRQ_FTM2    (KINETIS_IRQ_FIRST+64)  /* 64: FTM2 all sources */
+#define KINETIS_IRQ_CMT     (KINETIS_IRQ_FIRST+65)  /* 65: CMT */
+#define KINETIS_IRQ_RTC     (KINETIS_IRQ_FIRST+66)  /* 66: RTC alarm interrupt */
+#define KINETIS_IRQ_RTCS    (KINETIS_IRQ_FIRST+67)  /* 67: RTC Seconds interrupt */
+#define KINETIS_IRQ_PITCH0  (KINETIS_IRQ_FIRST+68)  /* 68: PIT channel 0 */
+#define KINETIS_IRQ_PITCH1  (KINETIS_IRQ_FIRST+69)  /* 69: PIT channel 1 */
+#define KINETIS_IRQ_PITCH2  (KINETIS_IRQ_FIRST+70)  /* 70: PIT channel 2 */
+#define KINETIS_IRQ_PITCH3  (KINETIS_IRQ_FIRST+71)  /* 71: PIT channel 3 */
+#define KINETIS_IRQ_PDB     (KINETIS_IRQ_FIRST+72)  /* 72: PDB */
+#define KINETIS_IRQ_USBOTG  (KINETIS_IRQ_FIRST+73)  /* 73: USB OTG */
+#define KINETIS_IRQ_USBCD   (KINETIS_IRQ_FIRST+74)  /* 74: USB charger detect */
+#define KINETIS_IRQ_RESVD75 (KINETIS_IRQ_FIRST+75)  /* 75: Reserved */
+#define KINETIS_IRQ_RESVD76 (KINETIS_IRQ_FIRST+76)  /* 76: Reserved */
+#define KINETIS_IRQ_RESVD77 (KINETIS_IRQ_FIRST+77)  /* 77: Reserved */
+#define KINETIS_IRQ_RESVD78 (KINETIS_IRQ_FIRST+78)  /* 78: Reserved */
+#define KINETIS_IRQ_RESVD79 (KINETIS_IRQ_FIRST+79)  /* 79: Reserved */
+#define KINETIS_IRQ_RESVD80 (KINETIS_IRQ_FIRST+80)  /* 80: Reserved */
+#define KINETIS_IRQ_DAC0    (KINETIS_IRQ_FIRST+81)  /* 81: DAC0 */
+#define KINETIS_IRQ_RESVD82 (KINETIS_IRQ_FIRST+82)  /* 82: Reserved */
+#define KINETIS_IRQ_TSI     (KINETIS_IRQ_FIRST+83)  /* 83: TSI all sources */
+#define KINETIS_IRQ_MCG     (KINETIS_IRQ_FIRST+84)  /* 84: MCG */
+#define KINETIS_IRQ_LPT     (KINETIS_IRQ_FIRST+85)  /* 85: Low power timer */
+#define KINETIS_IRQ_RESVD86 (KINETIS_IRQ_FIRST+86)  /* 86: Reserved */
+#define KINETIS_IRQ_PORTA   (KINETIS_IRQ_FIRST+87)  /* 87: Pin detect port A */
+#define KINETIS_IRQ_PORTB   (KINETIS_IRQ_FIRST+88)  /* 88: Pin detect port B */
+#define KINETIS_IRQ_PORTC   (KINETIS_IRQ_FIRST+89)  /* 89: Pin detect port C */
+#define KINETIS_IRQ_PORTD   (KINETIS_IRQ_FIRST+90)  /* 90: Pin detect port D */
+#define KINETIS_IRQ_PORTE   (KINETIS_IRQ_FIRST+91)  /* 91: Pin detect port E */
+#define KINETIS_IRQ_RESVD92 (KINETIS_IRQ_FIRST+92)  /* 92: Reserved */
+#define KINETIS_IRQ_RESVD93 (KINETIS_IRQ_FIRST+93)  /* 93: Reserved */
+#define KINETIS_IRQ_SWI     (KINETIS_IRQ_FIRST+94)  /* 94: Software interrupt */
+
+#define NR_INTERRUPTS       95                      /* 95 Non core IRQs*/
+#define NR_VECTORS          (KINETIS_IRQ_FIRST+NR_INTERRUPTS) /* 111 vectors */
+
+/* EXTI interrupts (Do not use IRQ numbers) */
+
+#define NR_IRQS               NR_VECTORS
+
+/*****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/*****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K20IRQ_H */
diff --git a/arch/arm/include/kinetis/kinetis_k40irq.h b/arch/arm/include/kinetis/kinetis_k40irq.h
new file mode 100644
index 0000000000000000000000000000000000000000..4156b321f94ea3a229f3a467626bc000b4b72c00
--- /dev/null
+++ b/arch/arm/include/kinetis/kinetis_k40irq.h
@@ -0,0 +1,200 @@
+/*****************************************************************************
+ * arch/arm/include/kinetis/kinetis_k40irq.h
+ *
+ *   Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/irq.h
+ */
+
+#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_40KIRQ_H
+#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_40KIRQ_H
+
+/*****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/*****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* IRQ numbers.  The IRQ number corresponds vector number and hence map
+ * directly to bits in the NVIC.  This does, however, waste several words of
+ * memory in the IRQ to handle mapping tables.
+ *
+ * Processor Exceptions (vectors 0-15).  These common definitions can be found
+ * in the file nuttx/arch/arm/include/kinets/irq.h which includes this file
+ *
+ * External interrupts (vectors >= 16)
+ *
+ * K40 Family ****************************************************************
+ *
+ * The interrupt vectors  for the following parts is defined in Freescale
+ * document K40P144M100SF2RM
+ */
+
+#define KINETIS_IRQ_DMACH0  (KINETIS_IRQ_FIRST+0)   /* 0: DMA channel 0 transfer complete */
+#define KINETIS_IRQ_DMACH1  (KINETIS_IRQ_FIRST+1)   /* 1: DMA channel 1 transfer complete */
+#define KINETIS_IRQ_DMACH2  (KINETIS_IRQ_FIRST+2)   /* 2: DMA channel 2 transfer complete */
+#define KINETIS_IRQ_DMACH3  (KINETIS_IRQ_FIRST+3)   /* 3: DMA channel 3 transfer complete */
+#define KINETIS_IRQ_DMACH4  (KINETIS_IRQ_FIRST+4)   /* 4: DMA channel 4 transfer complete */
+#define KINETIS_IRQ_DMACH5  (KINETIS_IRQ_FIRST+5)   /* 5: DMA channel 5 transfer complete */
+#define KINETIS_IRQ_DMACH6  (KINETIS_IRQ_FIRST+6)   /* 6: DMA channel 6 transfer complete */
+#define KINETIS_IRQ_DMACH7  (KINETIS_IRQ_FIRST+7)   /* 7: DMA channel 7 transfer complete */
+#define KINETIS_IRQ_DMACH8  (KINETIS_IRQ_FIRST+8)   /* 8: DMA channel 8 transfer complete */
+#define KINETIS_IRQ_DMACH9  (KINETIS_IRQ_FIRST+9)   /* 9: DMA channel 9 transfer complete */
+#define KINETIS_IRQ_DMACH10 (KINETIS_IRQ_FIRST+10)  /* 10: DMA channel 10 transfer complete */
+#define KINETIS_IRQ_DMACH11 (KINETIS_IRQ_FIRST+11)  /* 11: DMA channel 11 transfer complete */
+#define KINETIS_IRQ_DMACH12 (KINETIS_IRQ_FIRST+12)  /* 12: DMA channel 12 transfer complete */
+#define KINETIS_IRQ_DMACH13 (KINETIS_IRQ_FIRST+13)  /* 13: DMA channel 13 transfer complete */
+#define KINETIS_IRQ_DMACH14 (KINETIS_IRQ_FIRST+14)  /* 14: DMA channel 14 transfer complete */
+#define KINETIS_IRQ_DMACH15 (KINETIS_IRQ_FIRST+15)  /* 15: DMA channel 15 transfer complete */
+#define KINETIS_IRQ_DMAERR  (KINETIS_IRQ_FIRST+16)  /* 16: DMA error interrupt channels 0-15 */
+#define KINETIS_IRQ_MCM     (KINETIS_IRQ_FIRST+17)  /* 17: MCM Normal interrupt */
+#define KINETIS_IRQ_FLASHCC (KINETIS_IRQ_FIRST+18)  /* 18: Flash memory command complete */
+#define KINETIS_IRQ_FLASHRC (KINETIS_IRQ_FIRST+19)  /* 19: Flash memory read collision */
+#define KINETIS_IRQ_SMCLVD  (KINETIS_IRQ_FIRST+20)  /* 20: Mode Controller low-voltage
+                                                     *     detect, low-voltage warning */
+#define KINETIS_IRQ_LLWU    (KINETIS_IRQ_FIRST+21)  /* 21: LLWU Normal Low Leakage Wakeup */
+#define KINETIS_IRQ_WDOG    (KINETIS_IRQ_FIRST+22)  /* 22: Watchdog */
+#define KINETIS_IRQ_RESVD23 (KINETIS_IRQ_FIRST+23)  /* 23: Reserved */
+#define KINETIS_IRQ_I2C0    (KINETIS_IRQ_FIRST+24)  /* 24: I2C0 */
+#define KINETIS_IRQ_I2C1    (KINETIS_IRQ_FIRST+25)  /* 25: I2C1 */
+#define KINETIS_IRQ_SPI0    (KINETIS_IRQ_FIRST+26)  /* 26: SPI0 all sources */
+#define KINETIS_IRQ_SPI1    (KINETIS_IRQ_FIRST+27)  /* 27: SPI1 all sources */
+#define KINETIS_IRQ_SPI2    (KINETIS_IRQ_FIRST+28)  /* 28: SPI2 all sources */
+#define KINETIS_IRQ_CAN0MB  (KINETIS_IRQ_FIRST+29)  /* 29: CAN0 OR'ed Message buffer (0-15) */
+#define KINETIS_IRQ_CAN0BO  (KINETIS_IRQ_FIRST+30)  /* 30: CAN0 Bus Off */
+#define KINETIS_IRQ_CAN0ERR (KINETIS_IRQ_FIRST+31)  /* 31: CAN0 Error */
+#define KINETIS_IRQ_CAN0TW  (KINETIS_IRQ_FIRST+32)  /* 32: CAN0 Transmit Warning */
+#define KINETIS_IRQ_CAN0RW  (KINETIS_IRQ_FIRST+33)  /* 33: CAN0 Receive Warning */
+#define KINETIS_IRQ_CAN0WU  (KINETIS_IRQ_FIRST+34)  /* 34: CAN0 Wake UP */
+#define KINETIS_IRQ_RESVD35 (KINETIS_IRQ_FIRST+35)  /* 35: Reserved */
+#define KINETIS_IRQ_RESVD36 (KINETIS_IRQ_FIRST+36)  /* 36: Reserved */
+#define KINETIS_IRQ_CAN1MB  (KINETIS_IRQ_FIRST+37)  /* 37: CAN1 OR'ed Message buffer (0-15) */
+#define KINETIS_IRQ_CAN1BO  (KINETIS_IRQ_FIRST+38)  /* 38: CAN1 Bus Off */
+#define KINETIS_IRQ_CAN1ERR (KINETIS_IRQ_FIRST+39)  /* 39: CAN1 Error */
+#define KINETIS_IRQ_CAN1TW  (KINETIS_IRQ_FIRST+40)  /* 40: CAN1 Transmit Warning */
+#define KINETIS_IRQ_CAN1RW  (KINETIS_IRQ_FIRST+41)  /* 41: CAN1 Receive Warning */
+#define KINETIS_IRQ_CAN1WU  (KINETIS_IRQ_FIRST+42) /*  42: CAN1 Wake UP */
+#define KINETIS_IRQ_RESVD43 (KINETIS_IRQ_FIRST+43)  /* 43: Reserved */
+#define KINETIS_IRQ_RESVD44 (KINETIS_IRQ_FIRST+44)  /* 44: Reserved */
+#define KINETIS_IRQ_UART0S  (KINETIS_IRQ_FIRST+45)  /* 45: UART0 status */
+#define KINETIS_IRQ_UART0E  (KINETIS_IRQ_FIRST+46)  /* 46: UART0 error */
+#define KINETIS_IRQ_UART1S  (KINETIS_IRQ_FIRST+47)  /* 47: UART1 status */
+#define KINETIS_IRQ_UART1E  (KINETIS_IRQ_FIRST+48)  /* 48: UART1 error */
+#define KINETIS_IRQ_UART2S  (KINETIS_IRQ_FIRST+49)  /* 49: UART2 status */
+#define KINETIS_IRQ_UART2E  (KINETIS_IRQ_FIRST+50)  /* 50: UART2 error */
+#define KINETIS_IRQ_UART3S  (KINETIS_IRQ_FIRST+51)  /* 51: UART3 status */
+#define KINETIS_IRQ_UART3E  (KINETIS_IRQ_FIRST+52)  /* 52: UART3 error */
+#define KINETIS_IRQ_UART4S  (KINETIS_IRQ_FIRST+53)  /* 53: UART4 status */
+#define KINETIS_IRQ_UART4E  (KINETIS_IRQ_FIRST+54)  /* 54: UART4 error */
+#define KINETIS_IRQ_UART5S  (KINETIS_IRQ_FIRST+55)  /* 55: UART5 status */
+#define KINETIS_IRQ_UART5E  (KINETIS_IRQ_FIRST+56)  /* 56: UART5 error */
+#define KINETIS_IRQ_ADC0    (KINETIS_IRQ_FIRST+57)  /* 57: ADC0 */
+#define KINETIS_IRQ_ADC1    (KINETIS_IRQ_FIRST+58)  /* 58: ADC1 */
+#define KINETIS_IRQ_CMP0    (KINETIS_IRQ_FIRST+59)  /* 59: CMP0 */
+#define KINETIS_IRQ_CMP1    (KINETIS_IRQ_FIRST+60)  /* 60: CMP1 */
+#define KINETIS_IRQ_CMP2    (KINETIS_IRQ_FIRST+61)  /* 61: CMP2 */
+#define KINETIS_IRQ_FTM0    (KINETIS_IRQ_FIRST+62)  /* 62: FTM0 all sources */
+#define KINETIS_IRQ_FTM1    (KINETIS_IRQ_FIRST+63)  /* 63: FTM1 all sources */
+#define KINETIS_IRQ_FTM2    (KINETIS_IRQ_FIRST+64)  /* 64: FTM2 all sources */
+#define KINETIS_IRQ_CMT     (KINETIS_IRQ_FIRST+65)  /* 65: CMT */
+#define KINETIS_IRQ_RTC     (KINETIS_IRQ_FIRST+66)  /* 66: RTC alarm interrupt */
+#define KINETIS_IRQ_RESVD67 (KINETIS_IRQ_FIRST+67)  /* 67: Reserved */
+#define KINETIS_IRQ_PITCH0  (KINETIS_IRQ_FIRST+68)  /* 68: PIT channel 0 */
+#define KINETIS_IRQ_PITCH1  (KINETIS_IRQ_FIRST+69)  /* 69: PIT channel 1 */
+#define KINETIS_IRQ_PITCH2  (KINETIS_IRQ_FIRST+70)  /* 70: PIT channel 2 */
+#define KINETIS_IRQ_PITCH3  (KINETIS_IRQ_FIRST+71)  /* 71: PIT channel 3 */
+#define KINETIS_IRQ_PDB     (KINETIS_IRQ_FIRST+72)  /* 72: PDB */
+#define KINETIS_IRQ_USBOTG  (KINETIS_IRQ_FIRST+73)  /* 73: USB OTG */
+#define KINETIS_IRQ_USBCD   (KINETIS_IRQ_FIRST+74)  /* 74: USB charger detect */
+#define KINETIS_IRQ_RESVD75 (KINETIS_IRQ_FIRST+75)  /* 75: Reserved */
+#define KINETIS_IRQ_RESVD76 (KINETIS_IRQ_FIRST+76)  /* 76: Reserved */
+#define KINETIS_IRQ_RESVD77 (KINETIS_IRQ_FIRST+77)  /* 77: Reserved */
+#define KINETIS_IRQ_RESVD78 (KINETIS_IRQ_FIRST+78)  /* 78: Reserved */
+#define KINETIS_IRQ_I2S0    (KINETIS_IRQ_FIRST+79)  /* 79: I2S0 */
+#define KINETIS_IRQ_SDHC    (KINETIS_IRQ_FIRST+80)  /* 80: SDHC */
+#define KINETIS_IRQ_DAC0    (KINETIS_IRQ_FIRST+81)  /* 81: DAC0 */
+#define KINETIS_IRQ_DAC1    (KINETIS_IRQ_FIRST+82)  /* 82: DAC1 */
+#define KINETIS_IRQ_TSI     (KINETIS_IRQ_FIRST+83)  /* 83: TSI all sources */
+#define KINETIS_IRQ_MCG     (KINETIS_IRQ_FIRST+84)  /* 84: MCG */
+#define KINETIS_IRQ_LPT     (KINETIS_IRQ_FIRST+85)  /* 85: Low power timer */
+#define KINETIS_IRQ_SLCD    (KINETIS_IRQ_FIRST+86)  /* 86: Segment LCD all sources */
+#define KINETIS_IRQ_PORTA   (KINETIS_IRQ_FIRST+87)  /* 87: Pin detect port A */
+#define KINETIS_IRQ_PORTB   (KINETIS_IRQ_FIRST+88)  /* 88: Pin detect port B */
+#define KINETIS_IRQ_PORTC   (KINETIS_IRQ_FIRST+89)  /* 89: Pin detect port C */
+#define KINETIS_IRQ_PORTD   (KINETIS_IRQ_FIRST+90)  /* 90: Pin detect port D */
+#define KINETIS_IRQ_PORTE   (KINETIS_IRQ_FIRST+91)  /* 91: Pin detect port E */
+#define KINETIS_IRQ_RESVD92 (KINETIS_IRQ_FIRST+92)  /* 92: Reserved */
+#define KINETIS_IRQ_RESVD93 (KINETIS_IRQ_FIRST+93)  /* 93: Reserved */
+#define KINETIS_IRQ_SWI     (KINETIS_IRQ_FIRST+94)  /* 94: Software interrupt */
+
+#define NR_INTERRUPTS       95                      /* 95 Non core IRQs*/
+#define NR_VECTORS          (KINETIS_IRQ_FIRST+NR_INTERRUPTS) /* 111 vectors */
+
+/* EXTI interrupts (Do not use IRQ numbers) */
+
+#define NR_IRQS               NR_VECTORS
+
+/*****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/*****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_40KIRQ_H */
diff --git a/arch/arm/include/kinetis/kinetis_k60irq.h b/arch/arm/include/kinetis/kinetis_k60irq.h
new file mode 100644
index 0000000000000000000000000000000000000000..b2e3a79b83c656f0a106ec14f9dc4f54b06891d9
--- /dev/null
+++ b/arch/arm/include/kinetis/kinetis_k60irq.h
@@ -0,0 +1,200 @@
+/*****************************************************************************
+ * arch/arm/include/kinetis/kinetis_k60irq.h
+ *
+ *   Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/irq.h
+ */
+
+#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_60KIRQ_H
+#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_60KIRQ_H
+
+/*****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/*****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* IRQ numbers.  The IRQ number corresponds vector number and hence map
+ * directly to bits in the NVIC.  This does, however, waste several words of
+ * memory in the IRQ to handle mapping tables.
+ *
+ * Processor Exceptions (vectors 0-15).  These common definitions can be found
+ * in the file nuttx/arch/arm/include/kinets/irq.h which includes this file
+ *
+ * External interrupts (vectors >= 16)
+ *
+ * K60 Family ****************************************************************
+ *
+ * The interrupt vectors  for the following parts is defined in Freescale
+ * document K60P144M100SF2RM
+ */
+
+#define KINETIS_IRQ_DMACH0   (KINETIS_IRQ_FIRST+0)   /* 0: DMA channel 0 transfer complete */
+#define KINETIS_IRQ_DMACH1   (KINETIS_IRQ_FIRST+1)   /* 1: DMA channel 1 transfer complete */
+#define KINETIS_IRQ_DMACH2   (KINETIS_IRQ_FIRST+2)   /* 2: DMA channel 2 transfer complete */
+#define KINETIS_IRQ_DMACH3   (KINETIS_IRQ_FIRST+3)   /* 3: DMA channel 3 transfer complete */
+#define KINETIS_IRQ_DMACH4   (KINETIS_IRQ_FIRST+4)   /* 4: DMA channel 4 transfer complete */
+#define KINETIS_IRQ_DMACH5   (KINETIS_IRQ_FIRST+5)   /* 5: DMA channel 5 transfer complete */
+#define KINETIS_IRQ_DMACH6   (KINETIS_IRQ_FIRST+6)   /* 6: DMA channel 6 transfer complete */
+#define KINETIS_IRQ_DMACH7   (KINETIS_IRQ_FIRST+7)   /* 7: DMA channel 7 transfer complete */
+#define KINETIS_IRQ_DMACH8   (KINETIS_IRQ_FIRST+8)   /* 8: DMA channel 8 transfer complete */
+#define KINETIS_IRQ_DMACH9   (KINETIS_IRQ_FIRST+9)   /* 9: DMA channel 9 transfer complete */
+#define KINETIS_IRQ_DMACH10  (KINETIS_IRQ_FIRST+10)  /* 10: DMA channel 10 transfer complete */
+#define KINETIS_IRQ_DMACH11  (KINETIS_IRQ_FIRST+11)  /* 11: DMA channel 11 transfer complete */
+#define KINETIS_IRQ_DMACH12  (KINETIS_IRQ_FIRST+12)  /* 12: DMA channel 12 transfer complete */
+#define KINETIS_IRQ_DMACH13  (KINETIS_IRQ_FIRST+13)  /* 13: DMA channel 13 transfer complete */
+#define KINETIS_IRQ_DMACH14  (KINETIS_IRQ_FIRST+14)  /* 14: DMA channel 14 transfer complete */
+#define KINETIS_IRQ_DMACH15  (KINETIS_IRQ_FIRST+15)  /* 15: DMA channel 15 transfer complete */
+#define KINETIS_IRQ_DMAERR   (KINETIS_IRQ_FIRST+16)  /* 16: DMA error interrupt channels 0-15 */
+#define KINETIS_IRQ_MCM      (KINETIS_IRQ_FIRST+17)  /* 17: MCM Normal interrupt */
+#define KINETIS_IRQ_FLASHCC  (KINETIS_IRQ_FIRST+18)  /* 18: Flash memory command complete */
+#define KINETIS_IRQ_FLASHRC  (KINETIS_IRQ_FIRST+19)  /* 19: Flash memory read collision */
+#define KINETIS_IRQ_SMCLVD   (KINETIS_IRQ_FIRST+20)  /* 20: Mode Controller low-voltage
+                                                      *     detect, low-voltage warning */
+#define KINETIS_IRQ_LLWU     (KINETIS_IRQ_FIRST+21)  /* 21: LLWU Normal Low Leakage Wakeup */
+#define KINETIS_IRQ_WDOG     (KINETIS_IRQ_FIRST+22)  /* 22: Watchdog */
+#define KINETIS_IRQ_RNGB     (KINETIS_IRQ_FIRST+23)  /* 23: Random number generator */
+#define KINETIS_IRQ_I2C0     (KINETIS_IRQ_FIRST+24)  /* 24: I2C0 */
+#define KINETIS_IRQ_I2C1     (KINETIS_IRQ_FIRST+25)  /* 25: I2C1 */
+#define KINETIS_IRQ_SPI0     (KINETIS_IRQ_FIRST+26)  /* 26: SPI0 all sources */
+#define KINETIS_IRQ_SPI1     (KINETIS_IRQ_FIRST+27)  /* 27: SPI1 all sources */
+#define KINETIS_IRQ_SPI2     (KINETIS_IRQ_FIRST+28)  /* 28: SPI2 all sources */
+#define KINETIS_IRQ_CAN0MB   (KINETIS_IRQ_FIRST+29)  /* 29: CAN0 OR'ed Message buffer (0-15) */
+#define KINETIS_IRQ_CAN0BO   (KINETIS_IRQ_FIRST+30)  /* 30: CAN0 Bus Off */
+#define KINETIS_IRQ_CAN0ERR  (KINETIS_IRQ_FIRST+31)  /* 31: CAN0 Error */
+#define KINETIS_IRQ_CAN0TW   (KINETIS_IRQ_FIRST+32)  /* 32: CAN0 Transmit Warning */
+#define KINETIS_IRQ_CAN0RW   (KINETIS_IRQ_FIRST+33)  /* 33: CAN0 Receive Warning */
+#define KINETIS_IRQ_CAN0WU   (KINETIS_IRQ_FIRST+34)  /* 34: CAN0 Wake UP */
+#define KINETIS_IRQ_RESVD35  (KINETIS_IRQ_FIRST+35)  /* 35: Reserved */
+#define KINETIS_IRQ_RESVD36  (KINETIS_IRQ_FIRST+36)  /* 36: Reserved */
+#define KINETIS_IRQ_CAN1MB   (KINETIS_IRQ_FIRST+37)  /* 37: CAN1 OR'ed Message buffer (0-15) */
+#define KINETIS_IRQ_CAN1BO   (KINETIS_IRQ_FIRST+38)  /* 38: CAN1 Bus Off */
+#define KINETIS_IRQ_CAN1ERR  (KINETIS_IRQ_FIRST+39)  /* 39: CAN1 Error */
+#define KINETIS_IRQ_CAN1TW   (KINETIS_IRQ_FIRST+40)  /* 40: CAN1 Transmit Warning */
+#define KINETIS_IRQ_CAN1RW   (KINETIS_IRQ_FIRST+41)  /* 41: CAN1 Receive Warning */
+#define KINETIS_IRQ_CAN1WU   (KINETIS_IRQ_FIRST+42) /*  42: CAN1 Wake UP */
+#define KINETIS_IRQ_RESVD43  (KINETIS_IRQ_FIRST+43)  /* 43: Reserved */
+#define KINETIS_IRQ_RESVD44  (KINETIS_IRQ_FIRST+44)  /* 44: Reserved */
+#define KINETIS_IRQ_UART0S   (KINETIS_IRQ_FIRST+45)  /* 45: UART0 status */
+#define KINETIS_IRQ_UART0E   (KINETIS_IRQ_FIRST+46)  /* 46: UART0 error */
+#define KINETIS_IRQ_UART1S   (KINETIS_IRQ_FIRST+47)  /* 47: UART1 status */
+#define KINETIS_IRQ_UART1E   (KINETIS_IRQ_FIRST+48)  /* 48: UART1 error */
+#define KINETIS_IRQ_UART2S   (KINETIS_IRQ_FIRST+49)  /* 49: UART2 status */
+#define KINETIS_IRQ_UART2E   (KINETIS_IRQ_FIRST+50)  /* 50: UART2 error */
+#define KINETIS_IRQ_UART3S   (KINETIS_IRQ_FIRST+51)  /* 51: UART3 status */
+#define KINETIS_IRQ_UART3E   (KINETIS_IRQ_FIRST+52)  /* 52: UART3 error */
+#define KINETIS_IRQ_UART4S   (KINETIS_IRQ_FIRST+53)  /* 53: UART4 status */
+#define KINETIS_IRQ_UART4E   (KINETIS_IRQ_FIRST+54)  /* 54: UART4 error */
+#define KINETIS_IRQ_UART5S   (KINETIS_IRQ_FIRST+55)  /* 55: UART5 status */
+#define KINETIS_IRQ_UART5E   (KINETIS_IRQ_FIRST+56)  /* 56: UART5 error */
+#define KINETIS_IRQ_ADC0     (KINETIS_IRQ_FIRST+57)  /* 57: ADC0 */
+#define KINETIS_IRQ_ADC1     (KINETIS_IRQ_FIRST+58)  /* 58: ADC1 */
+#define KINETIS_IRQ_CMP0     (KINETIS_IRQ_FIRST+59)  /* 59: CMP0 */
+#define KINETIS_IRQ_CMP1     (KINETIS_IRQ_FIRST+60)  /* 60: CMP1 */
+#define KINETIS_IRQ_CMP2     (KINETIS_IRQ_FIRST+61)  /* 61: CMP2 */
+#define KINETIS_IRQ_FTM0     (KINETIS_IRQ_FIRST+62)  /* 62: FTM0 all sources */
+#define KINETIS_IRQ_FTM1     (KINETIS_IRQ_FIRST+63)  /* 63: FTM1 all sources */
+#define KINETIS_IRQ_FTM2     (KINETIS_IRQ_FIRST+64)  /* 64: FTM2 all sources */
+#define KINETIS_IRQ_CMT      (KINETIS_IRQ_FIRST+65)  /* 65: CMT */
+#define KINETIS_IRQ_RTC      (KINETIS_IRQ_FIRST+66)  /* 66: RTC alarm interrupt */
+#define KINETIS_IRQ_RESVD67  (KINETIS_IRQ_FIRST+67)  /* 67: Reserved */
+#define KINETIS_IRQ_PITCH0   (KINETIS_IRQ_FIRST+68)  /* 68: PIT channel 0 */
+#define KINETIS_IRQ_PITCH1   (KINETIS_IRQ_FIRST+69)  /* 69: PIT channel 1 */
+#define KINETIS_IRQ_PITCH2   (KINETIS_IRQ_FIRST+70)  /* 70: PIT channel 2 */
+#define KINETIS_IRQ_PITCH3   (KINETIS_IRQ_FIRST+71)  /* 71: PIT channel 3 */
+#define KINETIS_IRQ_PDB      (KINETIS_IRQ_FIRST+72)  /* 72: PDB */
+#define KINETIS_IRQ_USBOTG   (KINETIS_IRQ_FIRST+73)  /* 73: USB OTG */
+#define KINETIS_IRQ_USBCD    (KINETIS_IRQ_FIRST+74)  /* 74: USB charger detect */
+#define KINETIS_IRQ_EMACTMR  (KINETIS_IRQ_FIRST+75)  /* 75: Ethernet MAC IEEE 1588 timer interrupt */
+#define KINETIS_IRQ_EMACTX   (KINETIS_IRQ_FIRST+76)  /* 76: Ethernet MAC transmit interrupt */
+#define KINETIS_IRQ_EMACRX   (KINETIS_IRQ_FIRST+77)  /* 77: Ethernet MAC receive interrupt */
+#define KINETIS_IRQ_EMACMISC (KINETIS_IRQ_FIRST+78)  /* 78: Ethernet MAC error and misc interrupt */
+#define KINETIS_IRQ_I2S0     (KINETIS_IRQ_FIRST+79)  /* 79: I2S0 */
+#define KINETIS_IRQ_SDHC     (KINETIS_IRQ_FIRST+80)  /* 80: SDHC */
+#define KINETIS_IRQ_DAC0     (KINETIS_IRQ_FIRST+81)  /* 81: DAC0 */
+#define KINETIS_IRQ_DAC1     (KINETIS_IRQ_FIRST+82)  /* 82: DAC1 */
+#define KINETIS_IRQ_TSI      (KINETIS_IRQ_FIRST+83)  /* 83: TSI all sources */
+#define KINETIS_IRQ_MCG      (KINETIS_IRQ_FIRST+84)  /* 84: MCG */
+#define KINETIS_IRQ_LPT      (KINETIS_IRQ_FIRST+85)  /* 85: Low power timer */
+#define KINETIS_IRQ_RESVD86  (KINETIS_IRQ_FIRST+86)  /* 86: Reserved */
+#define KINETIS_IRQ_PORTA    (KINETIS_IRQ_FIRST+87)  /* 87: Pin detect port A */
+#define KINETIS_IRQ_PORTB    (KINETIS_IRQ_FIRST+88)  /* 88: Pin detect port B */
+#define KINETIS_IRQ_PORTC    (KINETIS_IRQ_FIRST+89)  /* 89: Pin detect port C */
+#define KINETIS_IRQ_PORTD    (KINETIS_IRQ_FIRST+90)  /* 90: Pin detect port D */
+#define KINETIS_IRQ_PORTE    (KINETIS_IRQ_FIRST+91)  /* 91: Pin detect port E */
+#define KINETIS_IRQ_RESVD92  (KINETIS_IRQ_FIRST+92)  /* 92: Reserved */
+#define KINETIS_IRQ_RESVD93  (KINETIS_IRQ_FIRST+93)  /* 93: Reserved */
+#define KINETIS_IRQ_SWI      (KINETIS_IRQ_FIRST+94)  /* 94: Software interrupt */
+
+#define NR_INTERRUPTS        95                      /* 95 Non core IRQs*/
+#define NR_VECTORS           (KINETIS_IRQ_FIRST+NR_INTERRUPTS) /* 111 vectors */
+
+/* EXTI interrupts (Do not use IRQ numbers) */
+
+#define NR_IRQS               NR_VECTORS
+
+/*****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/*****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_60KIRQ_H */
diff --git a/arch/arm/include/kinetis/kinetis_k64irq.h b/arch/arm/include/kinetis/kinetis_k64irq.h
new file mode 100644
index 0000000000000000000000000000000000000000..c97c4b25122b98494383b851541c1ddc969519f3
--- /dev/null
+++ b/arch/arm/include/kinetis/kinetis_k64irq.h
@@ -0,0 +1,190 @@
+/*****************************************************************************
+ * arch/arm/include/kinetis/kinetis_k64irq.h
+ *
+ *   Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/irq.h
+ */
+
+#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_64KIRQ_H
+#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_64KIRQ_H
+
+/*****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/*****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* IRQ numbers.  The IRQ number corresponds vector number and hence map
+ * directly to bits in the NVIC.  This does, however, waste several words of
+ * memory in the IRQ to handle mapping tables.
+ *
+ * Processor Exceptions (vectors 0-15).  These common definitions can be found
+ * in the file nuttx/arch/arm/include/kinets/irq.h which includes this file
+ *
+ * External interrupts (vectors >= 16)
+ *
+ * K60 Family ****************************************************************
+ *
+ * The interrupt vectors  for the following parts is defined in Freescale
+ * document K64P144M120SF5RM.pdf
+ */
+#define KINETIS_IRQ_DMACH0   (KINETIS_IRQ_FIRST+0)   /* 0: DMA channel 0 transfer complete */
+#define KINETIS_IRQ_DMACH1   (KINETIS_IRQ_FIRST+1)   /* 1: DMA channel 1 transfer complete */
+#define KINETIS_IRQ_DMACH2   (KINETIS_IRQ_FIRST+2)   /* 2: DMA channel 2 transfer complete */
+#define KINETIS_IRQ_DMACH3   (KINETIS_IRQ_FIRST+3)   /* 3: DMA channel 3 transfer complete */
+#define KINETIS_IRQ_DMACH4   (KINETIS_IRQ_FIRST+4)   /* 4: DMA channel 4 transfer complete */
+#define KINETIS_IRQ_DMACH5   (KINETIS_IRQ_FIRST+5)   /* 5: DMA channel 5 transfer complete */
+#define KINETIS_IRQ_DMACH6   (KINETIS_IRQ_FIRST+6)   /* 6: DMA channel 6 transfer complete */
+#define KINETIS_IRQ_DMACH7   (KINETIS_IRQ_FIRST+7)   /* 7: DMA channel 7 transfer complete */
+#define KINETIS_IRQ_DMACH8   (KINETIS_IRQ_FIRST+8)   /* 8: DMA channel 8 transfer complete */
+#define KINETIS_IRQ_DMACH9   (KINETIS_IRQ_FIRST+9)   /* 9: DMA channel 9 transfer complete */
+#define KINETIS_IRQ_DMACH10  (KINETIS_IRQ_FIRST+10)  /* 10: DMA channel 10 transfer complete */
+#define KINETIS_IRQ_DMACH11  (KINETIS_IRQ_FIRST+11)  /* 11: DMA channel 11 transfer complete */
+#define KINETIS_IRQ_DMACH12  (KINETIS_IRQ_FIRST+12)  /* 12: DMA channel 12 transfer complete */
+#define KINETIS_IRQ_DMACH13  (KINETIS_IRQ_FIRST+13)  /* 13: DMA channel 13 transfer complete */
+#define KINETIS_IRQ_DMACH14  (KINETIS_IRQ_FIRST+14)  /* 14: DMA channel 14 transfer complete */
+#define KINETIS_IRQ_DMACH15  (KINETIS_IRQ_FIRST+15)  /* 15: DMA channel 15 transfer complete */
+#define KINETIS_IRQ_DMAERR   (KINETIS_IRQ_FIRST+16)  /* 16: DMA error interrupt channels 0-15 */
+#define KINETIS_IRQ_MCM      (KINETIS_IRQ_FIRST+17)  /* 17: MCM Normal interrupt */
+#define KINETIS_IRQ_FLASHCC  (KINETIS_IRQ_FIRST+18)  /* 18: Flash memory command complete */
+#define KINETIS_IRQ_FLASHRC  (KINETIS_IRQ_FIRST+19)  /* 19: Flash memory read collision */
+#define KINETIS_IRQ_SMCLVD   (KINETIS_IRQ_FIRST+20)  /* 20: Mode Controller low-voltage
+                                                      *     detect, low-voltage warning */
+#define KINETIS_IRQ_LLWU     (KINETIS_IRQ_FIRST+21)  /* 21: LLWU Normal Low Leakage Wakeup */
+#define KINETIS_IRQ_WDOG     (KINETIS_IRQ_FIRST+22)  /* 22: Watchdog or EWM */
+#define KINETIS_IRQ_RNGB     (KINETIS_IRQ_FIRST+23)  /* 23: Random number generator */
+#define KINETIS_IRQ_I2C0     (KINETIS_IRQ_FIRST+24)  /* 24: I2C0 */
+#define KINETIS_IRQ_I2C1     (KINETIS_IRQ_FIRST+25)  /* 25: I2C1 */
+#define KINETIS_IRQ_SPI0     (KINETIS_IRQ_FIRST+26)  /* 26: SPI0 all sources */
+#define KINETIS_IRQ_SPI1     (KINETIS_IRQ_FIRST+27)  /* 27: SPI1 all sources */
+#define KINETIS_IRQ_I2S0     (KINETIS_IRQ_FIRST+28)  /* 28: 12S0 Transmit */
+#define KINETIS_IRQ_I2S1     (KINETIS_IRQ_FIRST+29)  /* 29: 12S0 Receive */
+#define KINETIS_IRQ_RESVD30  (KINETIS_IRQ_FIRST+30)  /* 30: Reserved */
+#define KINETIS_IRQ_UART0S   (KINETIS_IRQ_FIRST+31)  /* 31: UART0 status */
+#define KINETIS_IRQ_UART0E   (KINETIS_IRQ_FIRST+32)  /* 32: UART0 error */
+#define KINETIS_IRQ_UART1S   (KINETIS_IRQ_FIRST+33)  /* 33: UART1 status */
+#define KINETIS_IRQ_UART1E   (KINETIS_IRQ_FIRST+34)  /* 34: UART1 error */
+#define KINETIS_IRQ_UART2S   (KINETIS_IRQ_FIRST+35)  /* 35: UART2 status */
+#define KINETIS_IRQ_UART2E   (KINETIS_IRQ_FIRST+36)  /* 36: UART2 error */
+#define KINETIS_IRQ_UART3S   (KINETIS_IRQ_FIRST+37)  /* 37: UART3 status */
+#define KINETIS_IRQ_UART3E   (KINETIS_IRQ_FIRST+38)  /* 38: UART3 error */
+#define KINETIS_IRQ_ADC0     (KINETIS_IRQ_FIRST+39)  /* 39: ADC0 */
+#define KINETIS_IRQ_CMP0     (KINETIS_IRQ_FIRST+40)  /* 40: CMP0 */
+#define KINETIS_IRQ_CMP1     (KINETIS_IRQ_FIRST+41)  /* 41: CMP1 */
+#define KINETIS_IRQ_FTM0     (KINETIS_IRQ_FIRST+42)  /* 42: FTM0 all sources */
+#define KINETIS_IRQ_FTM1     (KINETIS_IRQ_FIRST+43)  /* 43: FTM1 all sources */
+#define KINETIS_IRQ_FTM2     (KINETIS_IRQ_FIRST+44)  /* 44: FTM2 all sources */
+#define KINETIS_IRQ_CMT      (KINETIS_IRQ_FIRST+45)  /* 45: CMT */
+#define KINETIS_IRQ_RTC      (KINETIS_IRQ_FIRST+46)  /* 46: RTC alarm interrupt */
+#define KINETIS_IRQ_RTCS     (KINETIS_IRQ_FIRST+47)  /* 47: RTC seconds interrupt */
+#define KINETIS_IRQ_PITCH0   (KINETIS_IRQ_FIRST+48)  /* 48: PIT channel 0 */
+#define KINETIS_IRQ_PITCH1   (KINETIS_IRQ_FIRST+49)  /* 49: PIT channel 1 */
+#define KINETIS_IRQ_PITCH2   (KINETIS_IRQ_FIRST+50)  /* 50: PIT channel 2 */
+#define KINETIS_IRQ_PITCH3   (KINETIS_IRQ_FIRST+51)  /* 51: PIT channel 3 */
+#define KINETIS_IRQ_PDB      (KINETIS_IRQ_FIRST+52)  /* 52: PDB */
+#define KINETIS_IRQ_USBOTG   (KINETIS_IRQ_FIRST+53)  /* 53: USB OTG */
+#define KINETIS_IRQ_USBCD    (KINETIS_IRQ_FIRST+54)  /* 54: USB charger detect */
+#define KINETIS_IRQ_RESVD55  (KINETIS_IRQ_FIRST+55)  /* 55: Reserved */
+#define KINETIS_IRQ_DAC0     (KINETIS_IRQ_FIRST+56)  /* 56: DAC0 */
+#define KINETIS_IRQ_MCG      (KINETIS_IRQ_FIRST+57)  /* 57: MCG */
+#define KINETIS_IRQ_LPT      (KINETIS_IRQ_FIRST+58)  /* 58: Low power timer */
+#define KINETIS_IRQ_PORTA    (KINETIS_IRQ_FIRST+59)  /* 59: Pin detect port A */
+#define KINETIS_IRQ_PORTB    (KINETIS_IRQ_FIRST+60)  /* 60: Pin detect port B */
+#define KINETIS_IRQ_PORTC    (KINETIS_IRQ_FIRST+61)  /* 61: Pin detect port C */
+#define KINETIS_IRQ_PORTD    (KINETIS_IRQ_FIRST+62)  /* 62: Pin detect port D */
+#define KINETIS_IRQ_PORTE    (KINETIS_IRQ_FIRST+63)  /* 63: Pin detect port E */
+#define KINETIS_IRQ_SWI      (KINETIS_IRQ_FIRST+64)  /* 64: Software interrupt */
+#define KINETIS_IRQ_SPI2     (KINETIS_IRQ_FIRST+65)  /* 65: SPI2 all sources */
+#define KINETIS_IRQ_UART4S   (KINETIS_IRQ_FIRST+66)  /* 66: UART4 status */
+#define KINETIS_IRQ_UART4E   (KINETIS_IRQ_FIRST+67)  /* 67: UART4 error */
+#define KINETIS_IRQ_UART5S   (KINETIS_IRQ_FIRST+68)  /* 68: UART5 status */
+#define KINETIS_IRQ_UART5E   (KINETIS_IRQ_FIRST+69)  /* 69: UART5 error */
+#define KINETIS_IRQ_CMP2     (KINETIS_IRQ_FIRST+70)  /* 70: CMP2 */
+#define KINETIS_IRQ_FTM3     (KINETIS_IRQ_FIRST+71)  /* 71: FTM3 all sources */
+#define KINETIS_IRQ_DAC1     (KINETIS_IRQ_FIRST+72)  /* 72: DAC1 */
+#define KINETIS_IRQ_ADC1     (KINETIS_IRQ_FIRST+73)  /* 73: ADC1 */
+#define KINETIS_IRQ_I2C2     (KINETIS_IRQ_FIRST+74)  /* 74: I2C2 */
+#define KINETIS_IRQ_CAN0MB   (KINETIS_IRQ_FIRST+75)  /* 75: CAN0 OR'ed Message buffer (0-15) */
+#define KINETIS_IRQ_CAN0BO   (KINETIS_IRQ_FIRST+76)  /* 76: CAN0 Bus Off */
+#define KINETIS_IRQ_CAN0ERR  (KINETIS_IRQ_FIRST+77)  /* 77: CAN0 Error */
+#define KINETIS_IRQ_CAN0TW   (KINETIS_IRQ_FIRST+78)  /* 78: CAN0 Transmit Warning */
+#define KINETIS_IRQ_CAN0RW   (KINETIS_IRQ_FIRST+79)  /* 79: CAN0 Receive Warning */
+#define KINETIS_IRQ_CAN0WU   (KINETIS_IRQ_FIRST+80)  /* 80: CAN0 Wake UP */
+#define KINETIS_IRQ_SDHC     (KINETIS_IRQ_FIRST+81)  /* 81: SDHC */
+#define KINETIS_IRQ_EMACTMR  (KINETIS_IRQ_FIRST+82)  /* 82: Ethernet MAC IEEE 1588 timer interrupt */
+#define KINETIS_IRQ_EMACTX   (KINETIS_IRQ_FIRST+83)  /* 83: Ethernet MAC transmit interrupt */
+#define KINETIS_IRQ_EMACRX   (KINETIS_IRQ_FIRST+84)  /* 84: Ethernet MAC receive interrupt */
+#define KINETIS_IRQ_EMACMISC (KINETIS_IRQ_FIRST+85)  /* 85: Ethernet MAC error and misc interrupt */
+
+#define NR_INTERRUPTS        86                      /* 86 Non core IRQs*/
+#define NR_VECTORS           (KINETIS_IRQ_FIRST+NR_INTERRUPTS) /* 102 vectors */
+
+/* EXTI interrupts (Do not use IRQ numbers) */
+
+#define NR_IRQS               NR_VECTORS
+
+/*****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/*****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_64KIRQ_H */
diff --git a/arch/arm/include/kinetis/kinetis_k66irq.h b/arch/arm/include/kinetis/kinetis_k66irq.h
new file mode 100644
index 0000000000000000000000000000000000000000..bbf0903f5a627587e5880f4fefa57bd056d9bcad
--- /dev/null
+++ b/arch/arm/include/kinetis/kinetis_k66irq.h
@@ -0,0 +1,206 @@
+/*****************************************************************************
+ * arch/arm/include/kinetis/kinetis_k66irq.h
+ *
+ *   Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/irq.h
+ */
+
+#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_66KIRQ_H
+#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_66KIRQ_H
+
+/*****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/*****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* IRQ numbers.  The IRQ number corresponds vector number and hence map
+ * directly to bits in the NVIC.  This does, however, waste several words of
+ * memory in the IRQ to handle mapping tables.
+ *
+ * Processor Exceptions (vectors 0-15).  These common definitions can be found
+ * in the file nuttx/arch/arm/include/kinets/irq.h which includes this file
+ *
+ * External interrupts (vectors >= 16)
+ *
+ * K66 Family ****************************************************************
+ *
+ * The interrupt vectors  for the following parts is defined in Freescale
+ * document K66P144M180SF5RMV2
+ */
+
+#define KINETIS_IRQ_DMACH0   (KINETIS_IRQ_FIRST+0)   /* 0: DMA channel 0, 16 transfer complete */
+#define KINETIS_IRQ_DMACH1   (KINETIS_IRQ_FIRST+1)   /* 1: DMA channel 1, 17 transfer complete */
+#define KINETIS_IRQ_DMACH2   (KINETIS_IRQ_FIRST+2)   /* 2: DMA channel 2, 18 transfer complete */
+#define KINETIS_IRQ_DMACH3   (KINETIS_IRQ_FIRST+3)   /* 3: DMA channel 3, 19 transfer complete */
+#define KINETIS_IRQ_DMACH4   (KINETIS_IRQ_FIRST+4)   /* 4: DMA channel 4, 20 transfer complete */
+#define KINETIS_IRQ_DMACH5   (KINETIS_IRQ_FIRST+5)   /* 5: DMA channel 5, 21 transfer complete */
+#define KINETIS_IRQ_DMACH6   (KINETIS_IRQ_FIRST+6)   /* 6: DMA channel 6, 11 transfer complete */
+#define KINETIS_IRQ_DMACH7   (KINETIS_IRQ_FIRST+7)   /* 7: DMA channel 7, 23 transfer complete */
+#define KINETIS_IRQ_DMACH8   (KINETIS_IRQ_FIRST+8)   /* 8: DMA channel 8, 24 transfer complete */
+#define KINETIS_IRQ_DMACH9   (KINETIS_IRQ_FIRST+9)   /* 9: DMA channel 9, 25 transfer complete */
+#define KINETIS_IRQ_DMACH10  (KINETIS_IRQ_FIRST+10)  /* 10: DMA channel 10, 26 transfer complete */
+#define KINETIS_IRQ_DMACH11  (KINETIS_IRQ_FIRST+11)  /* 11: DMA channel 11, 27 transfer complete */
+#define KINETIS_IRQ_DMACH12  (KINETIS_IRQ_FIRST+12)  /* 12: DMA channel 12, 28 transfer complete */
+#define KINETIS_IRQ_DMACH13  (KINETIS_IRQ_FIRST+13)  /* 13: DMA channel 13, 29 transfer complete */
+#define KINETIS_IRQ_DMACH14  (KINETIS_IRQ_FIRST+14)  /* 14: DMA channel 14, 30 transfer complete */
+#define KINETIS_IRQ_DMACH15  (KINETIS_IRQ_FIRST+15)  /* 15: DMA channel 15, 31 transfer complete */
+#define KINETIS_IRQ_DMAERR   (KINETIS_IRQ_FIRST+16)  /* 16: DMA error interrupt channels 0-31 */
+#define KINETIS_IRQ_MCM      (KINETIS_IRQ_FIRST+17)  /* 17: MCM Normal interrupt */
+#define KINETIS_IRQ_FLASHCC  (KINETIS_IRQ_FIRST+18)  /* 18: Flash memory command complete */
+#define KINETIS_IRQ_FLASHRC  (KINETIS_IRQ_FIRST+19)  /* 19: Flash memory read collision */
+#define KINETIS_IRQ_SMCLVD   (KINETIS_IRQ_FIRST+20)  /* 20: Mode Controller low-voltage
+                                                      *     detect, low-voltage warning */
+#define KINETIS_IRQ_LLWU     (KINETIS_IRQ_FIRST+21)  /* 21: LLWU Normal Low Leakage Wakeup */
+#define KINETIS_IRQ_WDOG     (KINETIS_IRQ_FIRST+22)  /* 22: Watchdog or EWM */
+#define KINETIS_IRQ_RNGB     (KINETIS_IRQ_FIRST+23)  /* 23: Random number generator */
+#define KINETIS_IRQ_I2C0     (KINETIS_IRQ_FIRST+24)  /* 24: I2C0 */
+#define KINETIS_IRQ_I2C1     (KINETIS_IRQ_FIRST+25)  /* 25: I2C1 */
+#define KINETIS_IRQ_SPI0     (KINETIS_IRQ_FIRST+26)  /* 26: SPI0 all sources */
+#define KINETIS_IRQ_SPI1     (KINETIS_IRQ_FIRST+27)  /* 27: SPI1 all sources */
+#define KINETIS_IRQ_I2S0     (KINETIS_IRQ_FIRST+28)  /* 28: 12S0 Transmit */
+#define KINETIS_IRQ_I2S1     (KINETIS_IRQ_FIRST+29)  /* 29: 12S0 Receive */
+#define KINETIS_IRQ_RESVD30  (KINETIS_IRQ_FIRST+30)  /* 30: Reserved */
+#define KINETIS_IRQ_UART0S   (KINETIS_IRQ_FIRST+31)  /* 31: UART0 status */
+#define KINETIS_IRQ_UART0E   (KINETIS_IRQ_FIRST+32)  /* 32: UART0 error */
+#define KINETIS_IRQ_UART1S   (KINETIS_IRQ_FIRST+33)  /* 33: UART1 status */
+#define KINETIS_IRQ_UART1E   (KINETIS_IRQ_FIRST+34)  /* 34: UART1 error */
+#define KINETIS_IRQ_UART2S   (KINETIS_IRQ_FIRST+35)  /* 35: UART2 status */
+#define KINETIS_IRQ_UART2E   (KINETIS_IRQ_FIRST+36)  /* 36: UART2 error */
+#define KINETIS_IRQ_UART3S   (KINETIS_IRQ_FIRST+37)  /* 37: UART3 status */
+#define KINETIS_IRQ_UART3E   (KINETIS_IRQ_FIRST+38)  /* 38: UART3 error */
+#define KINETIS_IRQ_ADC0     (KINETIS_IRQ_FIRST+39)  /* 39: ADC0 */
+#define KINETIS_IRQ_CMP0     (KINETIS_IRQ_FIRST+40)  /* 40: CMP0 */
+#define KINETIS_IRQ_CMP1     (KINETIS_IRQ_FIRST+41)  /* 41: CMP1 */
+#define KINETIS_IRQ_FTM0     (KINETIS_IRQ_FIRST+42)  /* 42: FTM0 all sources */
+#define KINETIS_IRQ_FTM1     (KINETIS_IRQ_FIRST+43)  /* 43: FTM1 all sources */
+#define KINETIS_IRQ_FTM2     (KINETIS_IRQ_FIRST+44)  /* 44: FTM2 all sources */
+#define KINETIS_IRQ_CMT      (KINETIS_IRQ_FIRST+45)  /* 45: CMT */
+#define KINETIS_IRQ_RTC      (KINETIS_IRQ_FIRST+46)  /* 46: RTC alarm interrupt */
+#define KINETIS_IRQ_RTCS     (KINETIS_IRQ_FIRST+47)  /* 47: RTC seconds interrupt */
+#define KINETIS_IRQ_PITCH0   (KINETIS_IRQ_FIRST+48)  /* 48: PIT channel 0 */
+#define KINETIS_IRQ_PITCH1   (KINETIS_IRQ_FIRST+49)  /* 49: PIT channel 1 */
+#define KINETIS_IRQ_PITCH2   (KINETIS_IRQ_FIRST+50)  /* 50: PIT channel 2 */
+#define KINETIS_IRQ_PITCH3   (KINETIS_IRQ_FIRST+51)  /* 51: PIT channel 3 */
+#define KINETIS_IRQ_PDB      (KINETIS_IRQ_FIRST+52)  /* 52: PDB */
+#define KINETIS_IRQ_USBOTG   (KINETIS_IRQ_FIRST+53)  /* 53: USB OTG */
+#define KINETIS_IRQ_USBCD    (KINETIS_IRQ_FIRST+54)  /* 54: USB charger detect */
+#define KINETIS_IRQ_RESVD55  (KINETIS_IRQ_FIRST+55)  /* 55: Reserved */
+#define KINETIS_IRQ_DAC0     (KINETIS_IRQ_FIRST+56)  /* 56: DAC0 */
+#define KINETIS_IRQ_MCG      (KINETIS_IRQ_FIRST+57)  /* 57: MCG */
+#define KINETIS_IRQ_LPT      (KINETIS_IRQ_FIRST+58)  /* 58: Low power timer */
+#define KINETIS_IRQ_PORTA    (KINETIS_IRQ_FIRST+59)  /* 59: Pin detect port A */
+#define KINETIS_IRQ_PORTB    (KINETIS_IRQ_FIRST+60)  /* 60: Pin detect port B */
+#define KINETIS_IRQ_PORTC    (KINETIS_IRQ_FIRST+61)  /* 61: Pin detect port C */
+#define KINETIS_IRQ_PORTD    (KINETIS_IRQ_FIRST+62)  /* 62: Pin detect port D */
+#define KINETIS_IRQ_PORTE    (KINETIS_IRQ_FIRST+63)  /* 63: Pin detect port E */
+#define KINETIS_IRQ_SWI      (KINETIS_IRQ_FIRST+64)  /* 64: Software interrupt */
+#define KINETIS_IRQ_SPI2     (KINETIS_IRQ_FIRST+65)  /* 65: SPI2 all sources */
+#define KINETIS_IRQ_UART4S   (KINETIS_IRQ_FIRST+66)  /* 66: UART4 status */
+#define KINETIS_IRQ_UART4E   (KINETIS_IRQ_FIRST+67)  /* 67: UART4 error */
+#define KINETIS_IRQ_RESVD68  (KINETIS_IRQ_FIRST+68)  /* 68: Reserved */
+#define KINETIS_IRQ_RESVD69  (KINETIS_IRQ_FIRST+69)  /* 69: Reserved */
+#define KINETIS_IRQ_CMP2     (KINETIS_IRQ_FIRST+70)  /* 70: CMP2 */
+#define KINETIS_IRQ_FTM3     (KINETIS_IRQ_FIRST+71)  /* 71: FTM3 all sources */
+#define KINETIS_IRQ_DAC1     (KINETIS_IRQ_FIRST+72)  /* 72: DAC1 */
+#define KINETIS_IRQ_ADC1     (KINETIS_IRQ_FIRST+73)  /* 73: ADC1 */
+#define KINETIS_IRQ_I2C2     (KINETIS_IRQ_FIRST+74)  /* 74: I2C2 */
+#define KINETIS_IRQ_CAN0MB   (KINETIS_IRQ_FIRST+75)  /* 75: CAN0 OR'ed Message buffer (0-15) */
+#define KINETIS_IRQ_CAN0BO   (KINETIS_IRQ_FIRST+76)  /* 76: CAN0 Bus Off */
+#define KINETIS_IRQ_CAN0ERR  (KINETIS_IRQ_FIRST+77)  /* 77: CAN0 Error */
+#define KINETIS_IRQ_CAN0TW   (KINETIS_IRQ_FIRST+78)  /* 78: CAN0 Transmit Warning */
+#define KINETIS_IRQ_CAN0RW   (KINETIS_IRQ_FIRST+79)  /* 79: CAN0 Receive Warning */
+#define KINETIS_IRQ_CAN0WU   (KINETIS_IRQ_FIRST+80)  /* 80: CAN0 Wake UP */
+#define KINETIS_IRQ_SDHC     (KINETIS_IRQ_FIRST+81)  /* 81: SDHC */
+#define KINETIS_IRQ_EMACTMR  (KINETIS_IRQ_FIRST+82)  /* 82: Ethernet MAC IEEE 1588 timer interrupt */
+#define KINETIS_IRQ_EMACTX   (KINETIS_IRQ_FIRST+83)  /* 83: Ethernet MAC transmit interrupt */
+#define KINETIS_IRQ_EMACRX   (KINETIS_IRQ_FIRST+84)  /* 84: Ethernet MAC receive interrupt */
+#define KINETIS_IRQ_EMACMISC (KINETIS_IRQ_FIRST+85)  /* 85: Ethernet MAC error and misc interrupt */
+#define KINETIS_IRQ_LPUART0  (KINETIS_IRQ_FIRST+86)  /* 86: LPUART0 Status and error */
+#define KINETIS_IRQ_TSI0     (KINETIS_IRQ_FIRST+87)  /* 87: TSI0 */
+#define KINETIS_IRQ_TPM1     (KINETIS_IRQ_FIRST+88)  /* 88: TPM1 */
+#define KINETIS_IRQ_TPM2     (KINETIS_IRQ_FIRST+89)  /* 89: TPM2 */
+#define KINETIS_IRQ_USBHSDCD (KINETIS_IRQ_FIRST+90)  /* 90: shared by USBHS DCD & USBHS Phy modules */
+#define KINETIS_IRQ_I2C3     (KINETIS_IRQ_FIRST+91)  /* 91: I2C3 */
+#define KINETIS_IRQ_CMP3     (KINETIS_IRQ_FIRST+92)  /* 92: CMP3 */
+#define KINETIS_IRQ_USBHSOTG (KINETIS_IRQ_FIRST+93)  /* 93: USBHS OTG*/
+#define KINETIS_IRQ_CAN1MB   (KINETIS_IRQ_FIRST+94)  /* 94: CAN1 OR'ed Message buffer (0-15) */
+#define KINETIS_IRQ_CAN1BO   (KINETIS_IRQ_FIRST+95)  /* 95: CAN1 Bus Off */
+#define KINETIS_IRQ_CAN1ERR  (KINETIS_IRQ_FIRST+96)  /* 96: CAN1 Error */
+#define KINETIS_IRQ_CAN1TW   (KINETIS_IRQ_FIRST+97)  /* 97: CAN1 Transmit Warning */
+#define KINETIS_IRQ_CAN1RW   (KINETIS_IRQ_FIRST+98)  /* 98: CAN1 Receive Warning */
+#define KINETIS_IRQ_CAN1WU   (KINETIS_IRQ_FIRST+99)  /* 99: CAN1 Wake UP */
+
+
+#define NR_INTERRUPTS        100                      /* 100 Non core IRQs*/
+#define NR_VECTORS           (KINETIS_IRQ_FIRST+NR_INTERRUPTS) /* 116 vectors */
+
+/* EXTI interrupts (Do not use IRQ numbers) */
+
+#define NR_IRQS               NR_VECTORS
+
+/*****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/*****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_66KIRQ_H */
diff --git a/arch/arm/include/kinetis/kinetis_mcg.h b/arch/arm/include/kinetis/kinetis_mcg.h
new file mode 100644
index 0000000000000000000000000000000000000000..bca6b18883685629929e957abd2643176b3337e4
--- /dev/null
+++ b/arch/arm/include/kinetis/kinetis_mcg.h
@@ -0,0 +1,620 @@
+/************************************************************************************
+ * arch/arm/include/kinetis/kinetis_mcg.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_MCG_H
+#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_MCG_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Note: It is envisioned that in the long term as a chip is added. The author of
+ * the new chip definitions will either find the exact configuration in an existing
+ * chip define and add the new chip to it Or add the MCG feature configuration
+ * #defines to the chip ifdef list below. In either case the author should mark
+ * it as "Verified to Document Number:" taken from the reference manual.
+ *
+ * To maintain backward compatibility to the version of NuttX prior to
+ * 2/5/2017, the catch all KINETIS_MCG_VERSION_UKN configuration is assigned
+ * to all the chips that did not have any conditional compilation based on
+ * NEW_MCG or KINETIS_K64. This is  a "No worse" than the original code solution.
+ * N.B. Each original chip "if"definitions have been left intact so that the
+ * complete legacy definitions prior to 2/5/2017 may be filled in completely when
+ * vetted.
+ */
+
+/* MCG Configuration Parameters
+ *
+ * KINETIS_MCG_PLL_REF_MIN           - OSCCLK/PLL_R minimum
+ * KINETIS_MCG_PLL_REF_MAX           - OSCCLK/PLL_R maximum
+ * KINETIS_MCG_PLL_INTERNAL_DIVBY    - The PLL clock is divided by n before VCO divider
+ * KINETIS_MCG_HAS_PLL_EXTRA_DIVBY   - Is PLL clock divided by n before MCG PLL/FLL
+ *                                     clock selection in the SIM module
+ * KINETIS_MCG_FFCLK_DIVBY           - MCGFFCLK divided by n
+ * KINETIS_MCG_HAS_IRC_48M           -  Has 48MHz internal oscillator
+ * KINETIS_MCG_HAS_LOW_FREQ_IRC      - Has LTRIMRNG, LFRIM, LSTRIM and bit MC[LIRC_DIV2]
+ * KINETIS_MCG_HAS_HIGH_FREQ_IRC     - Has HCTRIM, HTTRIM, HFTRIM and bit MC[HIRCEN]
+ * KINETIS_MCG_HAS_PLL_INTERNAL_MODE - Has PEI mode or PBI mode
+ * KINETIS_MCG_HAS_RESET_IS_BLPI     - Has Reset clock mode is BLPI
+ *
+ * MCG Register Configuration
+ *
+ * KINETIS_MCG_HAS_C1                - SoC has C1 Register
+ * KINETIS_MCG_HAS_C1_IREFS          - SoC has C1[IREFS]
+ * KINETIS_MCG_HAS_C1_FRDIV          - SoC has C1[FRDIV]
+ * KINETIS_MCG_C1_FRDIV_MAX          - C1[FRDIV] maximum value 5=1024, 6=1280 7=1536
+ * KINETIS_MCG_HAS_C2                - SoC has C2 Register
+ * KINETIS_MCG_HAS_C2_HGO            - SoC has C2[HGO]
+ * KINETIS_MCG_HAS_C2_RANGE          - SoC has C2[RANG]
+ * KINETIS_MCG_HAS_C2_FCFTRIM        - SoC has C2[FCFTRIM]
+ * KINETIS_MCG_HAS_C2_LOCRE0         - SoC has C2[LOCRE0]
+ * KINETIS_MCG_HAS_C3                - SoC has C3 Register
+ * KINETIS_MCG_HAS_C4                - SoC has C4 Register
+ * KINETIS_MCG_HAS_C5                - SoC has C5 Register
+ * KINETIS_MCG_HAS_C5_PRDIV          - SoC has C5[PRDIV]
+ * KINETIS_MCG_C5_PRDIV_BASE         - PRDIV base value corresponding to 0 in C5[PRDIV]
+ * KINETIS_MCG_C5_PRDIV_MAX          - The Maximum value of C5[PRVDIV])
+ * KINETIS_MCG_C5_PRDIV_BITS         - Has n bits of phase-locked loop (PLL) PRDIV (register C5[PRDIV]
+ * KINETIS_MCG_HAS_C5_PLLREFSEL0     - SoC has C5[PLLREFSEL0]
+ * KINETIS_MCG_HAS_C6                - SoC has C6 Register
+ * KINETIS_MCG_HAS_C6_VDIV           - SoC has C6[VDIV]
+ * KINETIS_MCG_C6_VDIV_BASE          - VDIV base value corresponding to 0 in C6[VDIV]
+ * KINETIS_MCG_C6_VDIV_MAX           - The Maximum value of C6[VDIV]
+ * KINETIS_MCG_HAS_C6_CME            - SoC has C6[CME]
+ * KINETIS_MCG_HAS_C6_PLLS           - SoC has C6[PLLS]
+ * KINETIS_MCG_HAS_C6_LOLIE0         - SoC has C6[LOLIE0]
+ * KINETIS_MCG_HAS_S                 - SoC has S Register
+ * KINETIS_MCG_HAS_S_PLLST           - SoC has S[PLLST]
+ * KINETIS_MCG_HAS_S_LOCK0           - SoC has S[LOCK0]
+ * KINETIS_MCG_HAS_S_LOLS            - SoC has S[LOLS]
+ * KINETIS_MCG_HAS_ATC               - SoC has ATC Register
+ * KINETIS_MCG_HAS_ATCVH             - SoC has ATCVH Register
+ * KINETIS_MCG_HAS_ATCVL             - SoC has ATCVL Register
+ * KINETIS_MCG_HAS_SC                - SoC has SC Register
+ * KINETIS_MCG_HAS_SC_ATMS           - SoC has SC[ATMS]
+ * KINETIS_MCG_HAS_SC_ATMF           - SoC has SC[ATMF]
+ * KINETIS_MCG_HAS_SC_ATME           - SoC has SC[ATME]
+ * KINETIS_MCG_HAS_C7                - SoC has C7 Register
+ * KINETIS_MCG_HAS_C7_OSCSEL         - SoC has C7[OSCSEL]
+ * KINETIS_MCG_C7_OSCSEL_BITS        - C7[OSCSEL] is n bits wide
+ * KINETIS_MCG_HAS_C8                - SoC has C8 Register
+ * KINETIS_MCG_HAS_C8_LOCS1          - SoC has C8[LOCS1]
+ * KINETIS_MCG_HAS_C8_CME1           - SoC has C8[CME1]
+ * KINETIS_MCG_HAS_C8_LOLRE          - SoC has C8[LOLRE]
+ * KINETIS_MCG_HAS_C8_LOCRE1         - SoC has C8[LOCRE1]
+ * KINETIS_MCG_HAS_C9                - SoC has C9 Register
+ * KINETIS_MCG_HAS_C9_EXT_PLL_LOCS   - SoC has C9_EXT_PLL[LOCS]
+ * KINETIS_MCG_HAS_C9_PLL_LOCRE      - SoC has C9_PLL[LOCRE]
+ * KINETIS_MCG_HAS_C9_PLL_CME        - SoC has C9_PLL[CME]
+ * KINETIS_MCG_HAS_C10               - SoC has C10 Register
+ * KINETIS_MCG_HAS_C10_LOCS1         - SoC has C10[LOCS1]
+ * KINETIS_MCG_HAS_C11               - SoC has C11 Register
+ * KINETIS_MCG_HAS_C11_PLL1OSC1      - SoC has C1[PRDIV1], C11[PLLSTEN1], C11[PLLCLKEN1], C11[PLLREFSEL1],
+ * KINETIS_MCG_HAS_C11_PLLCS         - SoC has C11[PLLCS]
+ * KINETIS_MCG_HAS_C11_PLLREFSEL1    - SoC has C11[PLLREFSEL1]
+ * KINETIS_MCG_HAS_C12               - SoC has C12 Register
+ * KINETIS_MCG_HAS_S2                - SoC has S2 Register
+ * KINETIS_MCG_HAS_S2_PLL1OSC1       - SoC has S2[LOCS2], S2[OSCINIT1], S2[LOCK1], S2[LOLS1]
+ * KINETIS_MCG_HAS_S2_PLLCST         - SoC has S2[PLLCST]
+ */
+
+/* Describe the version of the MCG
+ *
+ * These defines are not related to any NXP reference but are merely
+ * a way to label the versions we are using
+ */
+
+#define KINETIS_MCG_VERSION_UKN   -1 /* What was in nuttx prior to 2/5/2017 */
+#define KINETIS_MCG_VERSION_01    1  /* The addition of MK60FN1M0VLQ12 Previously known as KINETIS_NEW_MCG
+                                      * Verified Document Number: K60P144M150SF3RM Rev. 3, November 2014 */
+#define KINETIS_MCG_VERSION_04    4  /* Verified to Document Number: K64P144M120SF5RM Rev. 2, January 2014 */
+#define KINETIS_MCG_VERSION_06    6  /* Verified to Document Number: K66P144M180SF5RMV2 Rev. 2, May 2015 */
+
+/* MK20DX/DN---VLH5
+ *
+ *  ------------- ------ --- ------- ------ ------- ------ ----- ----
+ *  PART NUMBER   CPU    PIN PACKAGE TOTAL  PROGRAM EEPROM SRAM  GPIO
+ *                FREQ   CNT         FLASH  FLASH
+ *  ------------- ------ --- ------- ------ ------- ------ ----- ----
+ *  MK20DN32VLH5  50 MHz 64  LQFP     32 KB 32 KB   —       8 KB 40
+ *  MK20DX32VLH5  50 MHz 64  LQFP     64 KB 32 KB   2 KB    8 KB 40
+ *  MK20DN64VLH5  50 MHz 64  LQFP     64 KB 64 KB   —      16 KB 40
+ *  MK20DX64VLH5  50 MHz 64  LQFP     96 KB 64 KB   2 KB   16 KB 40
+ *  MK20DN128VLH5 50 MHz 64  LQFP    128 KB 128 KB  —      16 KB 40
+ *  MK20DX128VLH5 50 MHz 64  LQFP    160 KB 128 KB  2 KB   16 KB 40
+ */
+
+#if defined(CONFIG_ARCH_CHIP_MK20DN32VLH5) || \
+    defined(CONFIG_ARCH_CHIP_MK20DX32VLH5) || \
+    defined(CONFIG_ARCH_CHIP_MK20DN64VLH5) || \
+    defined(CONFIG_ARCH_CHIP_MK20DX64VLH5) || \
+    defined(CONFIG_ARCH_CHIP_MK20DN128VLH5) || \
+    defined(CONFIG_ARCH_CHIP_MK20DX128VLH5)
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_UKN
+
+/* MK20DX---VLH7
+ *
+ *  ------------- ------ --- ------- ------ ------- ------ ----- ----
+ *  PART NUMBER   CPU    PIN PACKAGE TOTAL  PROGRAM EEPROM SRAM  GPIO
+ *                FREQ   CNT         FLASH  FLASH
+ *  ------------- ------ --- ------- ------ ------- ------ ----- ----
+ *  MK20DX64VLH7  72 MHz 64  LQFP     96 KB  64 KB  2 KB   16 KB 40
+ *  MK20DX128VLH7 72 MHz 64  LQFP    160 KB 128 KB  2 KB   32 KB 40
+ *  MK20DX256VLH7 72 MHz 64  LQFP    288 KB 256 KB  2 KB   64 KB 40
+ *  ------------- ------ --- ------- ------ ------- ------ ----- ----
+ */
+
+#elif defined(CONFIG_ARCH_CHIP_MK20DX64VLH7) || defined(CONFIG_ARCH_CHIP_MK20DX128VLH7) || \
+      defined(CONFIG_ARCH_CHIP_MK20DX256VLH7)
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK40X64VFX50) || defined(CONFIG_ARCH_CHIP_MK40X64VLH50) || \
+      defined(CONFIG_ARCH_CHIP_MK40X64VLK50) || defined(CONFIG_ARCH_CHIP_MK40X64VMB50)
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK40X128VFX50) || defined(CONFIG_ARCH_CHIP_MK40X128VLH50) || \
+      defined(CONFIG_ARCH_CHIP_MK40X128VLK50) || defined(CONFIG_ARCH_CHIP_MK40X128VMB50) || \
+      defined(CONFIG_ARCH_CHIP_MK40X128VLL50) || defined(CONFIG_ARCH_CHIP_MK40X128VML50) || \
+      defined(CONFIG_ARCH_CHIP_MK40X128VFX72) || defined(CONFIG_ARCH_CHIP_MK40X128VLH72) || \
+      defined(CONFIG_ARCH_CHIP_MK40X128VLK72) || defined(CONFIG_ARCH_CHIP_MK40X128VMB72) || \
+      defined(CONFIG_ARCH_CHIP_MK40X128VLL72) || defined(CONFIG_ARCH_CHIP_MK40X128VML72)
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK40X256VLK72) || defined(CONFIG_ARCH_CHIP_MK40X256VMB72) || \
+      defined(CONFIG_ARCH_CHIP_MK40X256VLL72) || defined(CONFIG_ARCH_CHIP_MK40X256VML72)
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100)
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK40X256VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X256VMD100)
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK40N512VLK100) || defined(CONFIG_ARCH_CHIP_MK40N512VMB100) || \
+      defined(CONFIG_ARCH_CHIP_MK40N512VLL100) || defined(CONFIG_ARCH_CHIP_MK40N512VML100) || \
+      defined(CONFIG_ARCH_CHIP_MK40N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK40N512VMD100)
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N256VLL100)
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60X256VLL100)
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N512VLL100)
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N256VML100)
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60X256VML100)
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N512VML100)
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N256VLQ100)
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60X256VLQ100)
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N512VLQ100)
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N256VMD100)
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60X256VMD100)
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N512VMD100)
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60FN1M0VLQ12)
+
+/* Verified to Document Number: K60P144M100SF2V2RM Rev. 2 Jun 2012 */
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_01
+
+/* MCG Configuration Parameters */
+
+#  define KINETIS_MCG_PLL_REF_MIN            8000000   /* OSCCLK/PLL_R minimum */
+#  define KINETIS_MCG_PLL_REF_MAX            16000000  /* OSCCLK/PLL_R maximum */
+#  define KINETIS_MCG_PLL_INTERNAL_DIVBY     2         /* The PLL clock is divided by 2 before VCO divider */
+#  define KINETIS_MCG_HAS_PLL_EXTRA_DIVBY    2         /* Is PLL clock divided by 2 before MCG PLL/FLL clock selection in the SIM module */
+#  define KINETIS_MCG_FFCLK_DIVBY            2         /* MCGFFCLK divided by 2 */
+#  undef  KINETIS_MCG_HAS_IRC_48M                      /* Has no 48MHz internal oscillator */
+#  undef  KINETIS_MCG_HAS_LOW_FREQ_IRC                 /* Has LTRIMRNG, LFRIM, LSTRIM and bit MC[LIRC_DIV2] */
+#  undef  KINETIS_MCG_HAS_HIGH_FREQ_IRC                /* Has HCTRIM, HTTRIM, HFTRIM and bit MC[HIRCEN] */
+#  undef  KINETIS_MCG_HAS_PLL_INTERNAL_MODE            /* Has PEI mode or PBI mode */
+#  undef  KINETIS_MCG_HAS_RESET_IS_BLPI                /* Has Reset clock mode is BLPI */
+
+/* MCG Register Configuration */
+
+#  define KINETIS_MCG_HAS_C1                 1         /* SoC has C1 Register */
+#  define KINETIS_MCG_HAS_C1_IREFS           1         /* SoC has C1[IREFS] */
+#  define KINETIS_MCG_HAS_C1_FRDIV           1         /* SoC has C1[FRDIV] */
+#  define KINETIS_MCG_C1_FRDIV_MAX           7         /* C1[FRDIV] maximum value 5=1024, 6=1280 7=1536 */
+#  define KINETIS_MCG_HAS_C2                 1         /* SoC has C2 Register */
+#  define KINETIS_MCG_HAS_C2_HGO             1         /* SoC has C2[HGO] */
+#  define KINETIS_MCG_HAS_C2_RANGE           1         /* SoC has C2[RANGE] */
+#  undef  KINETIS_MCG_HAS_C2_FCFTRIM                   /* SoC has C2[FCFTRIM] */
+#  define KINETIS_MCG_HAS_C2_LOCRE0          1         /* SoC has C2[LOCRE0] */
+#  define KINETIS_MCG_HAS_C3                 1         /* SoC has C3 Register */
+#  define KINETIS_MCG_HAS_C4                 1         /* SoC has C4 Register */
+#  define KINETIS_MCG_HAS_C5                 1         /* SoC has C5 Register */
+#  define KINETIS_MCG_HAS_C5_PRDIV           1         /* SoC has C5[PRDIV] */
+#  define KINETIS_MCG_C5_PRDIV_BASE          1         /* PRDIV base value corresponding to 0 in C5[PRDIV] */
+#  define KINETIS_MCG_C5_PRDIV_MAX           8         /* The Maximum value of C5[PRVDIV]) */
+#  define KINETIS_MCG_C5_PRDIV_BITS          3         /* Has 3 bits of phase-locked loop (PLL) PRDIV (register C5[PRDIV] */
+#  define KINETIS_MCG_HAS_C5_PLLREFSEL0      1         /* SoC has C5[PLLREFSEL0] */
+#  define KINETIS_MCG_HAS_C6                 1         /* SoC has C6 Register */
+#  define KINETIS_MCG_HAS_C6_VDIV            1         /* SoC has C6[VDIV] */
+#  define KINETIS_MCG_C6_VDIV_BASE           16        /* VDIV base value corresponding to 0 in C6[VDIV] */
+#  define KINETIS_MCG_C6_VDIV_MAX            47        /* The Maximum value of C6[VDIV] */
+#  define KINETIS_MCG_HAS_C6_CME             1         /* SoC has C6[CME] */
+#  define KINETIS_MCG_HAS_C6_PLLS            1         /* SoC has C6[PLLS] */
+#  define KINETIS_MCG_HAS_C6_LOLIE0          1         /* SoC has C6[LOLIE0] */
+#  define KINETIS_MCG_HAS_S                  1         /* SoC has S Register */
+#  define KINETIS_MCG_HAS_S_PLLST            1         /* SoC has S[PLLST] */
+#  define KINETIS_MCG_HAS_S_LOCK0            1         /* SoC has S[LOCK0] */
+#  define KINETIS_MCG_HAS_S_LOLS             1         /* SoC has S[LOLS] */
+#  undef  KINETIS_MCG_HAS_ATC                          /* SoC has ATC Register */
+#  define KINETIS_MCG_HAS_ATCVH              1         /* SoC has ATCVH Register */
+#  define KINETIS_MCG_HAS_ATCVL              1         /* SoC has ATCVL Register */
+#  define KINETIS_MCG_HAS_SC                 1         /* SoC has SC Register */
+#  define KINETIS_MCG_HAS_SC_ATMS            1         /* SoC has SC[ATMS] */
+#  define KINETIS_MCG_HAS_SC_ATMF            1         /* SoC has SC[ATMF] */
+#  define KINETIS_MCG_HAS_SC_ATME            1         /* SoC has SC[ATME] */
+#  define KINETIS_MCG_HAS_C7                 1         /* SoC has C7 Register */
+#  define KINETIS_MCG_HAS_C7_OSCSEL          1         /* SoC has C7[OSCSEL] */
+#  define KINETIS_MCG_C7_OSCSEL_BITS         1         /* C7[OSCSEL] is n bits wide */
+#  define KINETIS_MCG_HAS_C8                 1         /* SoC has C8 Register */
+#  define KINETIS_MCG_HAS_C8_LOCS1           1         /* SoC has C8[LOCS1] */
+#  define KINETIS_MCG_HAS_C8_CME1            1         /* SoC has C8[CME1] */
+#  undef  KINETIS_MCG_HAS_C8_LOLRE                     /* SoC has C8[LOLRE] */
+#  define KINETIS_MCG_HAS_C8_LOCRE1          1         /* SoC has C8[LOCRE1] */
+#  undef  KINETIS_MCG_HAS_C9                 1         /* SoC has C9 Register */
+#  undef  KINETIS_MCG_HAS_C9_EXT_PLL_LOCS    1         /* SoC has C9_EXT_PLL[LOCS] */
+#  undef  KINETIS_MCG_HAS_C9_PLL_LOCRE       1         /* SoC has C9_PLL[LOCRE] */
+#  undef  KINETIS_MCG_HAS_C9_PLL_CME         1         /* SoC has C9_PLL[CME] */
+#  define KINETIS_MCG_HAS_C10                          /* SoC has C10 Register */
+#  undef  KINETIS_MCG_HAS_C10_LOCS1                    /* SoC has C10[LOCS1] */
+#  define KINETIS_MCG_HAS_C11                          /* SoC has C11 Register */
+#  define KINETIS_MCG_HAS_C11_PLL1OSC1       1         /* SoC has C1[PRDIV1], C11[PLLSTEN1], C11[PLLCLKEN1], C11[PLLREFSEL1] */
+#  define KINETIS_MCG_HAS_C11_PLLCS                    /* SoC has C11[PLLCS] */
+#  define KINETIS_MCG_HAS_C11_PLLREFSEL1     1         /* SoC has C11[PLLREFSEL1] */
+#  define KINETIS_MCG_HAS_C12                          /* SoC has C12 Register */
+#  define KINETIS_MCG_HAS_S2                           /* SoC has S2 Register */
+#  define KINETIS_MCG_HAS_S2_PLL1OSC1        1         /* SoC has S2[LOCS2], S2[OSCINIT1], S2[LOCK1], S2[LOLS1] */
+#  define KINETIS_MCG_HAS_S2_PLLCST                    /* SoC has S2[PLLCST] */
+
+#elif defined(CONFIG_ARCH_CHIP_MK64FN1M0VLL12) || defined(CONFIG_ARCH_CHIP_MK64FX512VLL12) || \
+      defined(CONFIG_ARCH_CHIP_MK64FX512VDC12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VDC12) || \
+      defined(CONFIG_ARCH_CHIP_MK64FX512VLQ12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VLQ12) || \
+      defined(CONFIG_ARCH_CHIP_MK64FX512VMD12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VMD12)
+
+/* Verified to Document Number: K64P144M120SF5RM Rev. 2, January 2014 */
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_04
+
+/* MCG Configuration Parameters */
+
+#  define KINETIS_MCG_PLL_REF_MIN            2000000   /* OSCCLK/PLL_R minimum */
+#  define KINETIS_MCG_PLL_REF_MAX            4000000   /* OSCCLK/PLL_R maximum */
+#  define KINETIS_MCG_PLL_INTERNAL_DIVBY     1         /* The PLL clock is divided by 1 before VCO divider */
+#  define KINETIS_MCG_HAS_PLL_EXTRA_DIVBY    1         /* Is PLL clock divided by 1 before MCG PLL/FLL clock selection in the SIM module */
+#  define KINETIS_MCG_FFCLK_DIVBY            2         /* MCGFFCLK divided by 2 */
+#  define KINETIS_MCG_HAS_IRC_48M            1         /* Has 48MHz internal oscillator */
+#  undef  KINETIS_MCG_HAS_LOW_FREQ_IRC                 /* Has LTRIMRNG, LFRIM, LSTRIM and bit MC[LIRC_DIV2] */
+#  undef  KINETIS_MCG_HAS_HIGH_FREQ_IRC                /* Has HCTRIM, HTTRIM, HFTRIM and bit MC[HIRCEN] */
+#  undef  KINETIS_MCG_HAS_PLL_INTERNAL_MODE            /* Has PEI mode or PBI mode */
+#  undef  KINETIS_MCG_HAS_RESET_IS_BLPI                /* Has Reset clock mode is BLPI */
+
+/* MCG Register Configuration */
+
+#  define KINETIS_MCG_HAS_C1                 1         /* SoC has C1 Register */
+#  define KINETIS_MCG_HAS_C1_IREFS           1         /* SoC has C1[IREFS] */
+#  define KINETIS_MCG_HAS_C1_FRDIV           1         /* SoC has C1[FRDIV] */
+#  define KINETIS_MCG_C1_FRDIV_MAX           7         /* C1[FRDIV] maximum value 5=1024, 6=1280 7=1536 */
+#  define KINETIS_MCG_HAS_C2                 1         /* SoC has C2 Register */
+#  define KINETIS_MCG_HAS_C2_HGO             1         /* SoC has C2[HGO] */
+#  define KINETIS_MCG_HAS_C2_RANGE           1         /* SoC has C2[RANGE] */
+#  define KINETIS_MCG_HAS_C2_FCFTRIM         1         /* SoC has C2[FCFTRIM] */
+#  define KINETIS_MCG_HAS_C2_LOCRE0          1         /* SoC has C2[LOCRE0] */
+#  define KINETIS_MCG_HAS_C3                 1         /* SoC has C3 Register */
+#  define KINETIS_MCG_HAS_C4                 1         /* SoC has C4 Register */
+#  define KINETIS_MCG_HAS_C5                 1         /* SoC has C5 Register */
+#  define KINETIS_MCG_HAS_C5_PRDIV           1         /* SoC has C5[PRDIV] */
+#  define KINETIS_MCG_C5_PRDIV_BASE          1         /* PRDIV base value corresponding to 0 in C5[PRDIV] */
+#  define KINETIS_MCG_C5_PRDIV_MAX           25        /* The Maximum value of C5[PRVDIV]) */
+#  define KINETIS_MCG_C5_PRDIV_BITS          5         /* Has 5 bits of phase-locked loop (PLL) PRDIV (register C5[PRDIV] */
+#  undef  KINETIS_MCG_HAS_C5_PLLREFSEL0                /* SoC has C5[PLLREFSEL0] */
+#  define KINETIS_MCG_HAS_C6                 1         /* SoC has C6 Register */
+#  define KINETIS_MCG_HAS_C6_VDIV            1         /* SoC has C6[VDIV] */
+#  define KINETIS_MCG_C6_VDIV_BASE           24        /* VDIV base value corresponding to 0 in C6[VDIV] */
+#  define KINETIS_MCG_C6_VDIV_MAX            55        /* The Maximum value of C6[VDIV] */
+#  define KINETIS_MCG_HAS_C6_CME             1         /* SoC has C6[CME] */
+#  define KINETIS_MCG_HAS_C6_PLLS            1         /* SoC has C6[PLLS] */
+#  define KINETIS_MCG_HAS_C6_LOLIE0          1         /* SoC has C6[LOLIE0] */
+#  define KINETIS_MCG_HAS_S                  1         /* SoC has S Register */
+#  define KINETIS_MCG_HAS_S_PLLST            1         /* SoC has S[PLLST] */
+#  define KINETIS_MCG_HAS_S_LOCK0            1         /* SoC has S[LOCK0] */
+#  define KINETIS_MCG_HAS_S_LOLS             1         /* SoC has S[LOLS] */
+#  undef  KINETIS_MCG_HAS_ATC                          /* SoC has ATC Register */
+#  define KINETIS_MCG_HAS_ATCVH              1         /* SoC has ATCVH Register */
+#  define KINETIS_MCG_HAS_ATCVL              1         /* SoC has ATCVL Register */
+#  define KINETIS_MCG_HAS_SC                 1         /* SoC has SC Register */
+#  define KINETIS_MCG_HAS_SC_ATMS            1         /* SoC has SC[ATMS] */
+#  define KINETIS_MCG_HAS_SC_ATMF            1         /* SoC has SC[ATMF] */
+#  define KINETIS_MCG_HAS_SC_ATME            1         /* SoC has SC[ATME] */
+#  define KINETIS_MCG_HAS_C7                 1         /* SoC has C7 Register */
+#  define KINETIS_MCG_HAS_C7_OSCSEL          1         /* SoC has C7[OSCSEL] */
+#  define KINETIS_MCG_C7_OSCSEL_BITS         2         /* C7[OSCSEL] is n bits wide */
+#  define KINETIS_MCG_HAS_C8                 1         /* SoC has C8 Register */
+#  define KINETIS_MCG_HAS_C8_LOCS1           1         /* SoC has C8[LOCS1] */
+#  define KINETIS_MCG_HAS_C8_CME1            1         /* SoC has C8[CME1] */
+#  define KINETIS_MCG_HAS_C8_LOLRE           1         /* SoC has C8[LOLRE] */
+#  define KINETIS_MCG_HAS_C8_LOCRE1          1         /* SoC has C8[LOCRE1] */
+#  undef  KINETIS_MCG_HAS_C9                           /* SoC has C9 Register */
+#  undef  KINETIS_MCG_HAS_C9_EXT_PLL_LOCS              /* SoC has C9_EXT_PLL[LOCS] */
+#  undef  KINETIS_MCG_HAS_C9_PLL_LOCRE                 /* SoC has C9_PLL[LOCRE] */
+#  undef  KINETIS_MCG_HAS_C9_PLL_CME                   /* SoC has C9_PLL[CME] */
+#  undef  KINETIS_MCG_HAS_C10                          /* SoC has C10 Register */
+#  undef  KINETIS_MCG_HAS_C10_LOCS1                    /* SoC has C10[LOCS1] */
+#  undef  KINETIS_MCG_HAS_C11                          /* SoC has C11 Register */
+#  undef  KINETIS_MCG_HAS_C11_PLL1OSC1                 /* SoC has C1[PRDIV1], C11[PLLSTEN1], C11[PLLCLKEN1], C11[PLLREFSEL1] */
+#  undef  KINETIS_MCG_HAS_C11_PLLCS                    /* SoC has C11[PLLCS] */
+#  undef  KINETIS_MCG_HAS_C11_PLLREFSEL1               /* SoC has C11[PLLREFSEL1] */
+#  undef  KINETIS_MCG_HAS_C12                          /* SoC has C12 Register */
+#  undef  KINETIS_MCG_HAS_S2                           /* SoC has S2 Register */
+#  undef  KINETIS_MCG_HAS_S2_PLL1OSC1                  /* SoC has S2[LOCS2], S2[OSCINIT1], S2[LOCK1], S2[LOLS1] */
+#  undef  KINETIS_MCG_HAS_S2_PLLCST                    /* SoC has S2[PLLCST] */
+
+/* MK66F N/X 1M0/2M0 V MD/LQ 18
+ *
+ *  --------------- ------- --- ------- ------- ------ ------ ------ -----
+ *  PART NUMBER     CPU     PIN PACKAGE  TOTAL  PROGRAM EEPROM SRAM  GPIO
+ *                  FREQ    CNT          FLASH  FLASH
+ *  --------------- ------- --- ------- ------- ------ ------ ------ -----
+ *  MK66FN2M0VMD18  180 MHz 144 MAPBGA   2   MB    —    — KB  260 KB 100
+ *  MK66FX1M0VMD18  180 MHz 144 MAPBGA  1.25 MB  1 MB   4 KB  256 KB 100
+ *  MK66FN2M0VLQ18  180 MHz 144 LQFP     2   MB    —    — KB  260 KB 100
+ *  MK66FX1M0VLQ18  180 MHz 144 LQFP    1.25 MB  1 MB   4 KB  256 KB 100
+ */
+
+#elif defined(CONFIG_ARCH_CHIP_MK66FN2M0VMD18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VMD18) || \
+      defined(CONFIG_ARCH_CHIP_MK66FN2M0VLQ18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VLQ18)
+
+/* Verified to Document Number: Document Number: K66P144M180SF5RMV2 Rev. 2, May 2015 */
+
+#  define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_06
+
+/* MCG Configuration Parameters */
+
+#  define KINETIS_MCG_PLL_REF_MIN            8000000   /* OSCCLK/PLL_R minimum */
+#  define KINETIS_MCG_PLL_REF_MAX            16000000  /* OSCCLK/PLL_R maximum */
+#  define KINETIS_MCG_PLL_INTERNAL_DIVBY     2         /* The PLL clock is divided by 2 before VCO divider */
+#  define KINETIS_MCG_HAS_PLL_EXTRA_DIVBY    1         /* Is PLL clock divided by 1 before MCG PLL/FLL clock selection in the SIM module */
+#  define KINETIS_MCG_FFCLK_DIVBY            2         /* MCGFFCLK divided by 2 */
+#  define KINETIS_MCG_HAS_IRC_48M            1         /* Has 48MHz internal oscillator */
+#  undef  KINETIS_MCG_HAS_LOW_FREQ_IRC                 /* Has LTRIMRNG, LFRIM, LSTRIM and bit MC[LIRC_DIV2] */
+#  undef  KINETIS_MCG_HAS_HIGH_FREQ_IRC                /* Has HCTRIM, HTTRIM, HFTRIM and bit MC[HIRCEN] */
+#  undef  KINETIS_MCG_HAS_PLL_INTERNAL_MODE            /* Has PEI mode or PBI mode */
+#  undef  KINETIS_MCG_HAS_RESET_IS_BLPI                /* Has Reset clock mode is BLPI */
+
+/* MCG Register Configuration */
+
+#  define KINETIS_MCG_HAS_C1                 1         /* SoC has C1 Register */
+#  define KINETIS_MCG_HAS_C1_IREFS           1         /* SoC has C1[IREFS] */
+#  define KINETIS_MCG_HAS_C1_FRDIV           1         /* SoC has C1[FRDIV] */
+#  define KINETIS_MCG_C1_FRDIV_MAX           7         /* C1[FRDIV] maximum value 5=1024, 6=1280 7=1536 */
+#  define KINETIS_MCG_HAS_C2                 1         /* SoC has C2 Register */
+#  define KINETIS_MCG_HAS_C2_HGO             1         /* SoC has C2[HGO] */
+#  define KINETIS_MCG_HAS_C2_RANGE           1         /* SoC has C2[RANGE] */
+#  define KINETIS_MCG_HAS_C2_FCFTRIM         1         /* SoC has C2[FCFTRIM] */
+#  define KINETIS_MCG_HAS_C2_LOCRE0          1         /* SoC has C2[LOCRE0] */
+#  define KINETIS_MCG_HAS_C3                 1         /* SoC has C3 Register */
+#  define KINETIS_MCG_HAS_C4                 1         /* SoC has C4 Register */
+#  define KINETIS_MCG_HAS_C5                 1         /* SoC has C5 Register */
+#  define KINETIS_MCG_HAS_C5_PRDIV           1         /* SoC has C5[PRDIV] */
+#  define KINETIS_MCG_C5_PRDIV_BASE          1         /* PRDIV base value corresponding to 0 in C5[PRDIV] */
+#  define KINETIS_MCG_C5_PRDIV_MAX           8         /* The Maximum value of C5[PRVDIV]) */
+#  define KINETIS_MCG_C5_PRDIV_BITS          3         /* Has 3 bits of phase-locked loop (PLL) PRDIV (register C5[PRDIV] */
+#  undef  KINETIS_MCG_HAS_C5_PLLREFSEL0                /* SoC has C5[PLLREFSEL0] */
+#  define KINETIS_MCG_HAS_C6                 1         /* SoC has C6 Register */
+#  define KINETIS_MCG_HAS_C6_VDIV            1         /* SoC has C6[VDIV] */
+#  define KINETIS_MCG_C6_VDIV_BASE           16        /* VDIV base value corresponding to 0 in C6[VDIV] */
+#  define KINETIS_MCG_C6_VDIV_MAX            47        /* The Maximum value of C6[VDIV] */
+#  define KINETIS_MCG_HAS_C6_CME             1         /* SoC has C6[CME] */
+#  define KINETIS_MCG_HAS_C6_PLLS            1         /* SoC has C6[PLLS] */
+#  define KINETIS_MCG_HAS_C6_LOLIE0          1         /* SoC has C6[LOLIE0] */
+#  define KINETIS_MCG_HAS_S                  1         /* SoC has S Register */
+#  define KINETIS_MCG_HAS_S_PLLST            1         /* SoC has S[PLLST] */
+#  define KINETIS_MCG_HAS_S_LOCK0            1         /* SoC has S[LOCK0] */
+#  define KINETIS_MCG_HAS_S_LOLS             1         /* SoC has S[LOLS] */
+#  undef  KINETIS_MCG_HAS_ATC                          /* SoC has ATC Register */
+#  define KINETIS_MCG_HAS_ATCVH              1         /* SoC has ATCVH Register */
+#  define KINETIS_MCG_HAS_ATCVL              1         /* SoC has ATCVL Register */
+#  define KINETIS_MCG_HAS_SC                 1         /* SoC has SC Register */
+#  define KINETIS_MCG_HAS_SC_ATMS            1         /* SoC has SC[ATMS] */
+#  define KINETIS_MCG_HAS_SC_ATMF            1         /* SoC has SC[ATMF] */
+#  define KINETIS_MCG_HAS_SC_ATME            1         /* SoC has SC[ATME] */
+#  define KINETIS_MCG_HAS_C7                 1         /* SoC has C7 Register */
+#  define KINETIS_MCG_HAS_C7_OSCSEL          1         /* SoC has C7[OSCSEL] */
+#  define KINETIS_MCG_C7_OSCSEL_BITS         2         /* C7[OSCSEL] is n bits wide */
+#  define KINETIS_MCG_HAS_C8                 1         /* SoC has C8 Register */
+#  define KINETIS_MCG_HAS_C8_LOCS1           1         /* SoC has C8[LOCS1] */
+#  define KINETIS_MCG_HAS_C8_CME1            1         /* SoC has C8[CME1] */
+#  define KINETIS_MCG_HAS_C8_LOLRE           1         /* SoC has C8[LOLRE] */
+#  define KINETIS_MCG_HAS_C8_LOCRE1          1         /* SoC has C8[LOCRE1] */
+#  define KINETIS_MCG_HAS_C9                 1         /* SoC has C9 Register */
+#  define KINETIS_MCG_HAS_C9_EXT_PLL_LOCS    1         /* SoC has C9_EXT_PLL[LOCS] */
+#  define KINETIS_MCG_HAS_C9_PLL_LOCRE       1         /* SoC has C9_PLL[LOCRE] */
+#  define KINETIS_MCG_HAS_C9_PLL_CME         1         /* SoC has C9_PLL[CME] */
+#  undef  KINETIS_MCG_HAS_C10                          /* SoC has C10 Register */
+#  undef  KINETIS_MCG_HAS_C10_LOCS1                    /* SoC has C10[LOCS1] */
+#  define KINETIS_MCG_HAS_C11                          /* SoC has C11 Register */
+#  undef  KINETIS_MCG_HAS_C11_PLL1OSC1                 /* SoC has C1[PRDIV1], C11[PLLSTEN1], C11[PLLCLKEN1], C11[PLLREFSEL1] */
+#  define KINETIS_MCG_HAS_C11_PLLCS                    /* SoC has C11[PLLCS] */
+#  undef  KINETIS_MCG_HAS_C11_PLLREFSEL1               /* SoC has C11[PLLREFSEL1] */
+#  undef  KINETIS_MCG_HAS_C12                          /* SoC has C12 Register */
+#  define KINETIS_MCG_HAS_S2                           /* SoC has S2 Register */
+#  undef  KINETIS_MCG_HAS_S2_PLL1OSC1                  /* SoC has S2[LOCS2], S2[OSCINIT1], S2[LOCK1], S2[LOLS1] */
+#  define KINETIS_MCG_HAS_S2_PLLCST                    /* SoC has S2[PLLCST] */
+
+#else
+#  error "Unsupported Kinetis chip"
+#endif
+
+/* Use the catch all configuration for the MCG based on the implementations in nuttx prior 2/3/2017 */
+
+#if KINETIS_MCG_VERSION == KINETIS_MCG_VERSION_UKN
+
+/* MCG Configuration Parameters */
+
+#  define KINETIS_MCG_PLL_REF_MIN            2000000   /* OSCCLK/PLL_R minimum */
+#  define KINETIS_MCG_PLL_REF_MAX            4000000   /* OSCCLK/PLL_R maximum */
+#  define KINETIS_MCG_PLL_INTERNAL_DIVBY     1         /* The PLL clock is divided by 1 before VCO divider */
+#  define KINETIS_MCG_HAS_PLL_EXTRA_DIVBY    1         /* Is PLL clock divided by 1 before MCG PLL/FLL clock selection in the SIM module */
+#  define KINETIS_MCG_FFCLK_DIVBY            1         /* MCGFFCLK divided by 1 */
+#  undef  KINETIS_MCG_HAS_IRC_48M                      /* Has 48MHz internal oscillator */
+#  undef  KINETIS_MCG_HAS_LOW_FREQ_IRC                 /* Has LTRIMRNG, LFRIM, LSTRIM and bit MC[LIRC_DIV2] */
+#  undef  KINETIS_MCG_HAS_HIGH_FREQ_IRC                /* Has HCTRIM, HTTRIM, HFTRIM and bit MC[HIRCEN] */
+#  undef  KINETIS_MCG_HAS_PLL_INTERNAL_MODE            /* Has PEI mode or PBI mode */
+#  undef  KINETIS_MCG_HAS_RESET_IS_BLPI                /* Has Reset clock mode is BLPI */
+
+/* MCG Register Configuration */
+
+#  define KINETIS_MCG_HAS_C1                 1         /* SoC has C1 Register */
+#  define KINETIS_MCG_HAS_C1_IREFS           1         /* SoC has C1[IREFS] */
+#  define KINETIS_MCG_HAS_C1_FRDIV           1         /* SoC has C1[FRDIV] */
+#  define KINETIS_MCG_C1_FRDIV_MAX           5         /* C1[FRDIV] maximum value 5=1024, 6=1280 7=1536 */
+#  define KINETIS_MCG_HAS_C2                 1         /* SoC has C2 Register */
+#  define KINETIS_MCG_HAS_C2_HGO             1         /* SoC has C2[HGO] */
+#  define KINETIS_MCG_HAS_C2_RANGE           1         /* SoC has C2[RANGE] */
+#  undef  KINETIS_MCG_HAS_C2_FCFTRIM                   /* SoC has C2[FCFTRIM] */
+#  undef  KINETIS_MCG_HAS_C2_LOCRE0                    /* SoC has C2[LOCRE0] */
+#  define KINETIS_MCG_HAS_C3                 1         /* SoC has C3 Register */
+#  define KINETIS_MCG_HAS_C4                 1         /* SoC has C4 Register */
+#  define KINETIS_MCG_HAS_C5                 1         /* SoC has C5 Register */
+#  define KINETIS_MCG_HAS_C5_PRDIV           1         /* SoC has C5[PRDIV] */
+#  define KINETIS_MCG_C5_PRDIV_BASE          1         /* PRDIV base value corresponding to 0 in C5[PRDIV] */
+#  define KINETIS_MCG_C5_PRDIV_MAX           25        /* The Maximum value of C5[PRVDIV]) */
+#  define KINETIS_MCG_C5_PRDIV_BITS          5         /* Has 5 bits of phase-locked loop (PLL) PRDIV (register C5[PRDIV] */
+#  undef  KINETIS_MCG_HAS_C5_PLLREFSEL0                /* SoC has C5[PLLREFSEL0] */
+#  define KINETIS_MCG_HAS_C6                 1         /* SoC has C6 Register */
+#  define KINETIS_MCG_HAS_C6_VDIV            1         /* SoC has C6[VDIV] */
+#  define KINETIS_MCG_C6_VDIV_BASE           24        /* VDIV base value corresponding to 0 in C6[VDIV] */
+#  define KINETIS_MCG_C6_VDIV_MAX            55        /* The Maximum value of C6[VDIV] */
+#  define KINETIS_MCG_HAS_C6_CME             1         /* SoC has C6[CME] */
+#  define KINETIS_MCG_HAS_C6_PLLS            1         /* SoC has C6[PLLS] */
+#  define KINETIS_MCG_HAS_C6_LOLIE0          1         /* SoC has C6[LOLIE0] */
+#  define KINETIS_MCG_HAS_S                  1         /* SoC has S Register */
+#  define KINETIS_MCG_HAS_S_PLLST            1         /* SoC has S[PLLST] */
+#  define KINETIS_MCG_HAS_S_LOCK0            1         /* SoC has S[LOCK0] */
+#  define KINETIS_MCG_HAS_S_LOLS             1         /* SoC has S[LOLS] */
+#  define KINETIS_MCG_HAS_ATC                1         /* SoC has ATC Register */
+#  define KINETIS_MCG_HAS_ATCVH              1         /* SoC has ATCVH Register */
+#  define KINETIS_MCG_HAS_ATCVL              1         /* SoC has ATCVL Register */
+#  undef  KINETIS_MCG_HAS_SC                           /* SoC has SC Register */
+#  undef  KINETIS_MCG_HAS_SC_ATMS                      /* SoC has SC[ATMS] */
+#  undef  KINETIS_MCG_HAS_SC_ATMF                      /* SoC has SC[ATMF] */
+#  undef  KINETIS_MCG_HAS_SC_ATME                      /* SoC has SC[ATME] */
+#  undef  KINETIS_MCG_HAS_C7                           /* SoC has C7 Register */
+#  undef  KINETIS_MCG_HAS_C7_OSCSEL                    /* SoC has C7[OSCSEL] */
+#  undef  KINETIS_MCG_C7_OSCSEL_BITS                   /* C7[OSCSEL] is n bits wide */
+#  undef  KINETIS_MCG_HAS_C8                           /* SoC has C8 Register */
+#  undef  KINETIS_MCG_HAS_C8_LOCS1                     /* SoC has C8[LOCS1] */
+#  undef  KINETIS_MCG_HAS_C8_CME1                      /* SoC has C8[CME1] */
+#  undef  KINETIS_MCG_HAS_C8_LOLRE                     /* SoC has C8[LOLRE] */
+#  undef  KINETIS_MCG_HAS_C8_LOCRE1                    /* SoC has C8[LOCRE1] */
+#  undef  KINETIS_MCG_HAS_C9                           /* SoC has C9 Register */
+#  undef  KINETIS_MCG_HAS_C9_EXT_PLL_LOCS              /* SoC has C9_EXT_PLL[LOCS] */
+#  undef  KINETIS_MCG_HAS_C9_PLL_LOCRE                 /* SoC has C9_PLL[LOCRE] */
+#  undef  KINETIS_MCG_HAS_C9_PLL_CME                   /* SoC has C9_PLL[CME] */
+#  undef  KINETIS_MCG_HAS_C10                          /* SoC has C10 Register */
+#  undef  KINETIS_MCG_HAS_C10_LOCS1                    /* SoC has C10[LOCS1] */
+#  undef  KINETIS_MCG_HAS_C11                          /* SoC has C11 Register */
+#  undef  KINETIS_MCG_HAS_C11_PLL1OSC1                 /* SoC has C1[PRDIV1], C11[PLLSTEN1], C11[PLLCLKEN1], C11[PLLREFSEL1] */
+#  undef  KINETIS_MCG_HAS_C11_PLLCS                    /* SoC has C11[PLLCS] */
+#  undef  KINETIS_MCG_HAS_C11_PLLREFSEL1               /* SoC has C11[PLLREFSEL1] */
+#  undef  KINETIS_MCG_HAS_C12                          /* SoC has C12 Register */
+#  undef  KINETIS_MCG_HAS_S2                           /* SoC has S2 Register */
+#  undef  KINETIS_MCG_HAS_S2_PLL1OSC1                  /* SoC has S2[LOCS2], S2[OSCINIT1], S2[LOCK1], S2[LOLS1] */
+#  undef  KINETIS_MCG_HAS_S2_PLLCST                    /* SoC has S2[PLLCST] */
+#endif
+
+#if !defined(KINETIS_MCG_VERSION)
+#  error "No KINETIS_MCG_VERSION defined!"
+#endif
+
+#if defined(KINETIS_MCG_HAS_C5_PRDIV)
+#  define KINETIS_MCG_C5_PRDIV_MASK  ((1 << (KINETIS_MCG_C5_PRDIV_BITS))-1)
+#endif
+
+#if defined(KINETIS_MCG_HAS_C7_OSCSEL)
+#  define KINETIS_MCG_C7_OSCSEL_MASK  ((1 << (KINETIS_MCG_C7_OSCSEL_BITS))-1)
+#endif
+
+#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_MCG_H */
diff --git a/arch/arm/include/kinetis/kinetis_pmc.h b/arch/arm/include/kinetis/kinetis_pmc.h
new file mode 100644
index 0000000000000000000000000000000000000000..03bc8958426d38b07d1d5646e66b2561456f973f
--- /dev/null
+++ b/arch/arm/include/kinetis/kinetis_pmc.h
@@ -0,0 +1,324 @@
+/************************************************************************************
+ * arch/arm/include/kinetis/kinetis_pmc.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_PMC_H
+#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_PMC_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Note: It is envisioned that in the long term as a chip is added. The author of
+ * the new chip definitions will either find the exact configuration in an existing
+ * chip define and add the new chip to it Or add the PMC feature configuration
+ * #defines to the chip ifdef list below. In either case the author should mark
+ * it as "Verified to Document Number:" taken from the reference manual.
+ *
+ * To maintain backward compatibility to the version of NuttX prior to
+ * 2/22/2017, the catch all KINETIS_PMC_VERSION_UKN configuration is assigned
+ * to all the chips that did not have any conditional compilation based on
+ * KINETIS_K64 or KINETIS_K66. This is  a "No worse" than the original code solution.
+ * N.B. Each original chip "if"definitions have been left intact so that the
+ * complete legacy definitions prior to 2/22/2017 may be filled in completely when
+ * vetted.
+ */
+
+/* PMC Register Configuration
+ *
+ * KINETIS_PMC_HAS_REGSC             - SoC has REGSC Register
+ * KINETIS_PMC_HAS_REGSC_ACKISO      - SoC has REGSC[ACKISO]
+ * KINETIS_PMC_HAS_REGSC_VLPRS       - SoC has REGSC[VLPRS]
+ * KINETIS_PMC_HAS_REGSC_VLPO        - SoC has REGSC[VLPO]
+ * KINETIS_PMC_HAS_REGSC_REGFPM      - SoC has REGSC[REGFPM]
+ * KINETIS_PMC_HAS_REGSC_BGEN        - SoC has REGSC[BGEN]
+ * KINETIS_PMC_HAS_REGSC_TRAMPO      - SoC has REGSC[TRAMPO]
+ * KINETIS_PMC_HAS_REGSC_REGONS      - SoC has REGSC[REGONS]
+ */
+
+/* Describe the version of the PMC
+ *
+ * These defines are not related to any NXP reference but are merely
+ * a way to label the versions we are using
+ */
+
+#define KINETIS_PMC_VERSION_UKN  -1 /* What was in nuttx prior to 2/22/2017 */
+#define KINETIS_PMC_VERSION_01    1  /* Verified Document Number: K60P144M150SF3RM Rev. 3, November 2014 */
+#define KINETIS_PMC_VERSION_04    4  /* Verified to Document Numbers:
+                                      * K20P64M72SF1RM  Rev. 1.1, Dec 2012
+                                      * K64P144M120SF5RM Rev. 2, January 2014
+                                      * K66P144M180SF5RMV2 Rev. 2, May 2015 */
+
+/* MK20DX/DN---VLH5
+ *
+ *  ------------- ------ --- ------- ------ ------- ------ ----- ----
+ *  PART NUMBER   CPU    PIN PACKAGE TOTAL  PROGRAM EEPROM SRAM  GPIO
+ *                FREQ   CNT         FLASH  FLASH
+ *  ------------- ------ --- ------- ------ ------- ------ ----- ----
+ *  MK20DN32VLH5  50 MHz 64  LQFP     32 KB 32 KB   —       8 KB 40
+ *  MK20DX32VLH5  50 MHz 64  LQFP     64 KB 32 KB   2 KB    8 KB 40
+ *  MK20DN64VLH5  50 MHz 64  LQFP     64 KB 64 KB   —      16 KB 40
+ *  MK20DX64VLH5  50 MHz 64  LQFP     96 KB 64 KB   2 KB   16 KB 40
+ *  MK20DN128VLH5 50 MHz 64  LQFP    128 KB 128 KB  —      16 KB 40
+ *  MK20DX128VLH5 50 MHz 64  LQFP    160 KB 128 KB  2 KB   16 KB 40
+ */
+
+#if defined(CONFIG_ARCH_CHIP_MK20DN32VLH5) || \
+    defined(CONFIG_ARCH_CHIP_MK20DX32VLH5) || \
+    defined(CONFIG_ARCH_CHIP_MK20DN64VLH5) || \
+    defined(CONFIG_ARCH_CHIP_MK20DX64VLH5) || \
+    defined(CONFIG_ARCH_CHIP_MK20DN128VLH5) || \
+    defined(CONFIG_ARCH_CHIP_MK20DX128VLH5)
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
+
+/* MK20DX---VLH7
+ *
+ *  ------------- ------ --- ------- ------ ------- ------ ----- ----
+ *  PART NUMBER   CPU    PIN PACKAGE TOTAL  PROGRAM EEPROM SRAM  GPIO
+ *                FREQ   CNT         FLASH  FLASH
+ *  ------------- ------ --- ------- ------ ------- ------ ----- ----
+ *  MK20DX64VLH7  72 MHz 64  LQFP     96 KB  64 KB  2 KB   16 KB 40
+ *  MK20DX128VLH7 72 MHz 64  LQFP    160 KB 128 KB  2 KB   32 KB 40
+ *  MK20DX256VLH7 72 MHz 64  LQFP    288 KB 256 KB  2 KB   64 KB 40
+ *  ------------- ------ --- ------- ------ ------- ------ ----- ----
+ */
+
+#elif defined(CONFIG_ARCH_CHIP_MK20DX64VLH7) || defined(CONFIG_ARCH_CHIP_MK20DX128VLH7) || \
+      defined(CONFIG_ARCH_CHIP_MK20DX256VLH7)
+
+/* Verified to Document Number: K20P64M72SF1RM Rev. 1.1, Dec 2012 */
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_04
+
+/* PMC Register Configuration */
+
+#  define KINETIS_PMC_HAS_REGSC             1 /* SoC has REGSC Register */
+#  define KINETIS_PMC_HAS_REGSC_ACKISO      1 /* SoC has REGSC[ACKISO]  */
+#  undef  KINETIS_PMC_HAS_REGSC_VLPRS         /* SoC has REGSC[VLPRS]   */
+#  undef  KINETIS_PMC_HAS_REGSC_VLPO          /* SoC has REGSC[VLPO]    */
+#  undef  KINETIS_PMC_HAS_REGSC_REGFPM        /* SoC has REGSC[REGFPM]  */
+#  define KINETIS_PMC_HAS_REGSC_BGEN        1 /* SoC has REGSC[BGEN]    */
+#  undef  KINETIS_PMC_HAS_REGSC_TRAMPO        /* SoC has REGSC[TRAMPO]  */
+#  define KINETIS_PMC_HAS_REGSC_REGONS      1 /* SoC has REGSC[REGONS]  */
+
+#elif defined(CONFIG_ARCH_CHIP_MK40X64VFX50) || defined(CONFIG_ARCH_CHIP_MK40X64VLH50) || \
+      defined(CONFIG_ARCH_CHIP_MK40X64VLK50) || defined(CONFIG_ARCH_CHIP_MK40X64VMB50)
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK40X128VFX50) || defined(CONFIG_ARCH_CHIP_MK40X128VLH50) || \
+      defined(CONFIG_ARCH_CHIP_MK40X128VLK50) || defined(CONFIG_ARCH_CHIP_MK40X128VMB50) || \
+      defined(CONFIG_ARCH_CHIP_MK40X128VLL50) || defined(CONFIG_ARCH_CHIP_MK40X128VML50) || \
+      defined(CONFIG_ARCH_CHIP_MK40X128VFX72) || defined(CONFIG_ARCH_CHIP_MK40X128VLH72) || \
+      defined(CONFIG_ARCH_CHIP_MK40X128VLK72) || defined(CONFIG_ARCH_CHIP_MK40X128VMB72) || \
+      defined(CONFIG_ARCH_CHIP_MK40X128VLL72) || defined(CONFIG_ARCH_CHIP_MK40X128VML72)
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK40X256VLK72) || defined(CONFIG_ARCH_CHIP_MK40X256VMB72) || \
+      defined(CONFIG_ARCH_CHIP_MK40X256VLL72) || defined(CONFIG_ARCH_CHIP_MK40X256VML72)
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100)
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK40X256VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X256VMD100)
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK40N512VLK100) || defined(CONFIG_ARCH_CHIP_MK40N512VMB100) || \
+      defined(CONFIG_ARCH_CHIP_MK40N512VLL100) || defined(CONFIG_ARCH_CHIP_MK40N512VML100) || \
+      defined(CONFIG_ARCH_CHIP_MK40N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK40N512VMD100)
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N256VLL100)
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60X256VLL100)
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N512VLL100)
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N256VML100)
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60X256VML100)
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N512VML100)
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N256VLQ100)
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60X256VLQ100)
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N512VLQ100)
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N256VMD100)
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60X256VMD100)
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N512VMD100)
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60FN1M0VLQ12)
+
+/* Verified to Document Number: K60P144M100SF2V2RM Rev. 2 Jun 2012 */
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_01
+
+/* PMC Register Configuration */
+
+#  define KINETIS_PMC_HAS_REGSC             1 /* SoC has REGSC Register */
+#  define KINETIS_PMC_HAS_REGSC_ACKISO      1 /* SoC has REGSC[ACKISO]  */
+#  undef  KINETIS_PMC_HAS_REGSC_VLPRS         /* SoC has REGSC[VLPRS]   */
+#  undef  KINETIS_PMC_HAS_REGSC_VLPO          /* SoC has REGSC[VLPO]    */
+#  undef  KINETIS_PMC_HAS_REGSC_REGFPM        /* SoC has REGSC[REGFPM]  */
+#  undef  KINETIS_PMC_HAS_REGSC_BGEN          /* SoC has REGSC[BGEN]    */
+#  undef  KINETIS_PMC_HAS_REGSC_TRAMPO        /* SoC has REGSC[TRAMPO]  */
+#  define KINETIS_PMC_HAS_REGSC_REGONS      1 /* SoC has REGSC[REGONS]  */
+
+#elif defined(CONFIG_ARCH_CHIP_MK64FN1M0VLL12) || defined(CONFIG_ARCH_CHIP_MK64FX512VLL12) || \
+      defined(CONFIG_ARCH_CHIP_MK64FX512VDC12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VDC12) || \
+      defined(CONFIG_ARCH_CHIP_MK64FX512VLQ12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VLQ12) || \
+      defined(CONFIG_ARCH_CHIP_MK64FX512VMD12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VMD12)
+
+/* Verified to Document Number: K64P144M120SF5RM Rev. 2, January 2014 */
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_04
+
+/* PMC Register Configuration */
+
+#  define KINETIS_PMC_HAS_REGSC             1 /* SoC has REGSC Register */
+#  define KINETIS_PMC_HAS_REGSC_ACKISO      1 /* SoC has REGSC[ACKISO]  */
+#  undef  KINETIS_PMC_HAS_REGSC_VLPRS         /* SoC has REGSC[VLPRS]   */
+#  undef  KINETIS_PMC_HAS_REGSC_VLPO          /* SoC has REGSC[VLPO]    */
+#  undef  KINETIS_PMC_HAS_REGSC_REGFPM        /* SoC has REGSC[REGFPM]  */
+#  define KINETIS_PMC_HAS_REGSC_BGEN        1 /* SoC has REGSC[BGEN]    */
+#  undef  KINETIS_PMC_HAS_REGSC_TRAMPO        /* SoC has REGSC[TRAMPO]  */
+#  define KINETIS_PMC_HAS_REGSC_REGONS      1 /* SoC has REGSC[REGONS]  */
+
+/* MK66F N/X 1M0/2M0 V MD/LQ 18
+ *
+ *  --------------- ------- --- ------- ------- ------ ------ ------ -----
+ *  PART NUMBER     CPU     PIN PACKAGE  TOTAL  PROGRAM EEPROM SRAM  GPIO
+ *                  FREQ    CNT          FLASH  FLASH
+ *  --------------- ------- --- ------- ------- ------ ------ ------ -----
+ *  MK66FN2M0VMD18  180 MHz 144 MAPBGA   2   MB    —    — KB  260 KB 100
+ *  MK66FX1M0VMD18  180 MHz 144 MAPBGA  1.25 MB  1 MB   4 KB  256 KB 100
+ *  MK66FN2M0VLQ18  180 MHz 144 LQFP     2   MB    —    — KB  260 KB 100
+ *  MK66FX1M0VLQ18  180 MHz 144 LQFP    1.25 MB  1 MB   4 KB  256 KB 100
+ */
+
+#elif defined(CONFIG_ARCH_CHIP_MK66FN2M0VMD18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VMD18) || \
+      defined(CONFIG_ARCH_CHIP_MK66FN2M0VLQ18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VLQ18)
+
+/* Verified to Document Number: Document Number: K66P144M180SF5RMV2 Rev. 2, May 2015 */
+
+#  define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_04
+
+/* PMC Register Configuration */
+
+#  define KINETIS_PMC_HAS_REGSC             1 /* SoC has REGSC Register */
+#  define KINETIS_PMC_HAS_REGSC_ACKISO      1 /* SoC has REGSC[ACKISO]  */
+#  undef  KINETIS_PMC_HAS_REGSC_VLPRS         /* SoC has REGSC[VLPRS]   */
+#  undef  KINETIS_PMC_HAS_REGSC_VLPO          /* SoC has REGSC[VLPO]    */
+#  undef  KINETIS_PMC_HAS_REGSC_REGFPM        /* SoC has REGSC[REGFPM]  */
+#  define KINETIS_PMC_HAS_REGSC_BGEN        1 /* SoC has REGSC[BGEN]    */
+#  undef  KINETIS_PMC_HAS_REGSC_TRAMPO        /* SoC has REGSC[TRAMPO]  */
+#  define KINETIS_PMC_HAS_REGSC_REGONS      1 /* SoC has REGSC[REGONS]  */
+
+#else
+#  error "Unsupported Kinetis chip"
+#endif
+
+/* Use the catch all configuration for the PMC based on the implementations in nuttx prior 2/3/2017 */
+
+#if KINETIS_PMC_VERSION == KINETIS_PMC_VERSION_UKN
+
+/* PMC Register Configuration */
+
+#  define KINETIS_PMC_HAS_REGSC             1 /* SoC has REGSC Register */
+#  undef  KINETIS_PMC_HAS_REGSC_ACKISO        /* SoC has REGSC[ACKISO]  */
+#  define KINETIS_PMC_HAS_REGSC_VLPRS       1 /* SoC has REGSC[VLPRS]   */
+#  undef  KINETIS_PMC_HAS_REGSC_VLPO          /* SoC has REGSC[VLPO]    */
+#  undef  KINETIS_PMC_HAS_REGSC_REGFPM        /* SoC has REGSC[REGFPM]  */
+#  undef  KINETIS_PMC_HAS_REGSC_BGEN          /* SoC has REGSC[BGEN]    */
+#  define KINETIS_PMC_HAS_REGSC_TRAMPO      1 /* SoC has REGSC[TRAMPO]  */
+#  define KINETIS_PMC_HAS_REGSC_REGONS      1 /* SoC has REGSC[REGONS]  */
+
+#endif
+
+#if !defined(KINETIS_PMC_VERSION)
+#  error "No KINETIS_PMC_VERSION defined!"
+#endif
+
+#if defined(KINETIS_PMC_HAS_C5_PRDIV)
+#  define KINETIS_PMC_C5_PRDIV_MASK  ((1 << (KINETIS_PMC_C5_PRDIV_BITS))-1)
+#endif
+
+#if defined(KINETIS_PMC_HAS_C7_OSCSEL)
+#  define KINETIS_PMC_C7_OSCSEL_MASK  ((1 << (KINETIS_PMC_C7_OSCSEL_BITS))-1)
+#endif
+
+#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_PMC_H */
diff --git a/arch/arm/include/kinetis/kinetis_sim.h b/arch/arm/include/kinetis/kinetis_sim.h
new file mode 100644
index 0000000000000000000000000000000000000000..224e8b0d787835c6f74b7f2e6855f6dfdff251f7
--- /dev/null
+++ b/arch/arm/include/kinetis/kinetis_sim.h
@@ -0,0 +1,1322 @@
+/************************************************************************************
+ * arch/arm/include/kinetis/kinetis_sim.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_SIM_H
+#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_SIM_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Note: It is envisioned that in the long term as a chip is added. The author of
+ * the new chip definitions will either find the exact configuration in an existing
+ * chip define and add the new chip to it Or add the SIM feature configuration
+ * #defines to the chip ifdef list below. In either case the author should mark
+ * it as "Verified to Document Number:" taken from the reference manual.
+ *
+ * To maintain backward compatibility to the version of NuttX prior to
+ * 2/16/2017, the catch all KINETIS_SIM_VERSION_UKN configuration is assigned
+ * to all the chips that did not have any conditional compilation based on
+ * KINETIS_K64 or KINETIS_K66. This is  a "No worse" than the original code solution.
+ * N.B. Each original chip "if"definitions have been left intact so that the
+ * complete legacy definitions prior to 2/16/2017 may be filled in completely when
+ * vetted.
+ */
+
+/* SIM Register Configuration
+ *
+ * KINETIS_SIM_HAS_SOPT1                   -  SoC has SOPT1 Register
+ * KINETIS_SIM_HAS_SOPT1_OSC32KOUT         -  SoC has SOPT1[OSC32KOUT]
+ * KINETIS_SIM_HAS_SOPT1_OSC32KSEL         -  SoC has SOPT1[OSC32KSEL]
+ * KINETIS_SIM_HAS_SOPT1_OSC32KSEL_BITS    -  SoC has n bits SOPT1[OSC32KSEL]
+ * KINETIS_SIM_HAS_SOPT1_RAMSIZE           -  SoC has SOPT1[RAMSIZE]
+ * KINETIS_SIM_HAS_SOPT1_USBREGEN          -  SoC has SOPT1[USBREGEN]
+ * KINETIS_SIM_HAS_SOPT1_USBSSTBY          -  SoC has SOPT1[USBSSTBY]
+ * KINETIS_SIM_HAS_SOPT1_USBVSTBY          -  SoC has SOPT1[USBVSTBY]
+ * KINETIS_SIM_HAS_SOPT1CFG                -  SoC has SOPT1CFG Register
+ * KINETIS_SIM_HAS_SOPT1CFG_URWE           -  SoC has SOPT1CFG[URWE]
+ * KINETIS_SIM_HAS_SOPT1CFG_USSWE          -  SoC has SOPT1CFG[USSWE]
+ * KINETIS_SIM_HAS_SOPT1CFG_UVSWE          -  SoC has SOPT1CFG[UVSWE]
+ * KINETIS_SIM_HAS_USBPHYCTL               -  SoC has USBPHYCTL Register
+ * KINETIS_SIM_HAS_USBPHYCTL_USB3VOUTTRG   -  SoC has USBPHYCTL[USB3VOUTTRG]
+ * KINETIS_SIM_HAS_USBPHYCTL_USBDISILIM    -  SoC has USBPHYCTL[USBDISILIM]
+ * KINETIS_SIM_HAS_USBPHYCTL_USBVREGPD     -  SoC has USBPHYCTL[USBVREGPD]
+ * KINETIS_SIM_HAS_USBPHYCTL_USBVREGSEL    -  SoC has USBPHYCTL[USBVREGSEL]
+ * KINETIS_SIM_HAS_SOPT2                   -  SoC has SOPT2 Register
+ * KINETIS_SIM_HAS_SOPT2_CMTUARTPAD        -  SoC has SOPT2[CMTUARTPAD]
+ * KINETIS_SIM_HAS_SOPT2_FBSL              -  SoC has SOPT2[FBSL]
+ * KINETIS_SIM_HAS_SOPT2_FLEXIOSRC         -  SoC has SOPT2[FLEXIOSRC]
+ * KINETIS_SIM_HAS_SOPT2_LPUARTSRC         -  SoC has SOPT2[LPUARTSRC]
+ * KINETIS_SIM_HAS_SOPT2_PLLFLLSEL         -  SoC has SOPT2[PLLFLLSEL]
+ * KINETIS_SIM_HAS_SOPT2_PLLFLLSEL_BITS    -  SoC has n bits SOPT2[PLLFLLSEL]
+ * KINETIS_SIM_HAS_SOPT2_PTD7PAD           -  SoC has SOPT2[PTD7PAD]
+ * KINETIS_SIM_HAS_SOPT2_RMIISRC           -  SoC has SOPT2[RMIISRC]
+ * KINETIS_SIM_HAS_SOPT2_RTCCLKOUTSEL      -  SoC has SOPT2[RTCCLKOUTSEL]
+ * KINETIS_SIM_HAS_SOPT2_CLKOUTSEL         -  SoC has SOPT2[CLKOUTSEL]
+ * KINETIS_SIM_HAS_SOPT2_SDHCSRC           -  SoC has SOPT2[SDHCSRC]
+ * KINETIS_SIM_HAS_SOPT2_NFCSRC            -  SoC has SOPT2[NFCSRC]
+ * KINETIS_SIM_HAS_SOPT2_I2SSRC            -  SoC has SOPT2[I2SSRC]
+ * KINETIS_SIM_HAS_SOPT2_TIMESRC           -  SoC has SOPT2[TIMESRC]
+ * KINETIS_SIM_HAS_SOPT2_TPMSRC            -  SoC has SOPT2[TPMSRC]
+ * KINETIS_SIM_HAS_SOPT2_USBFSRC           -  SoC has SOPT2[USBFSRC]
+ * KINETIS_SIM_HAS_SOPT2_TRACECLKSEL       -  SoC has SOPT2[TRACECLKSEL]
+ * KINETIS_SIM_HAS_SOPT2_USBREGEN          -  SoC has SOPT2[USBREGEN]
+ * KINETIS_SIM_HAS_SOPT2_USBSLSRC          -  SoC has SOPT2[USBSLSRC]
+ * KINETIS_SIM_HAS_SOPT2_USBHSRC           -  SoC has SOPT2[USBHSRC]
+ * KINETIS_SIM_HAS_SOPT2_USBSRC            -  SoC has SOPT2[USBSRC]
+ * KINETIS_SIM_HAS_SOPT2_MCGCLKSEL         -  SoC has SOPT2[MCGCLKSEL]
+ * KINETIS_SIM_HAS_SOPT4                   -  SoC has SOPT4 Register
+ * KINETIS_SIM_HAS_SOPT4_FTM0FLT0          -  SoC has SOPT4[FTM0FLT0]
+ * KINETIS_SIM_HAS_SOPT4_FTM0FLT1          -  SoC has SOPT4[FTM0FLT1]
+ * KINETIS_SIM_HAS_SOPT4_FTM0FLT2          -  SoC has SOPT4[FTM0FLT2]
+ * KINETIS_SIM_HAS_SOPT4_FTM0FLT3          -  SoC has SOPT4[FTM0FLT3]
+ * KINETIS_SIM_HAS_SOPT4_FTM0TRG0SRC       -  SoC has SOPT4[FTM0TRG0SRC]
+ * KINETIS_SIM_HAS_SOPT4_FTM0TRG1SRC       -  SoC has SOPT4[FTM0TRG1SRC]
+ * KINETIS_SIM_HAS_SOPT4_FTM1CH0SRC        -  SoC has SOPT4[FTM1CH0SRC] 1, 3 if SOF
+ * KINETIS_SIM_HAS_SOPT4_FTM1FLT0          -  SoC has SOPT4[FTM1FLT0]
+ * KINETIS_SIM_HAS_SOPT4_FTM1FLT1          -  SoC has SOPT4[FTM1FLT1]
+ * KINETIS_SIM_HAS_SOPT4_FTM1FLT2          -  SoC has SOPT4[FTM1FLT2]
+ * KINETIS_SIM_HAS_SOPT4_FTM1FLT3          -  SoC has SOPT4[FTM1FLT3]
+ * KINETIS_SIM_HAS_SOPT4_FTM2CH0SRC        -  SoC has SOPT4[FTM2CH0SRC]
+ * KINETIS_SIM_HAS_SOPT4_FTM2CH1SRC        -  SoC has SOPT4[FTM2CH1SRC]
+ * KINETIS_SIM_HAS_SOPT4_FTM2FLT0          -  SoC has SOPT4[FTM2FLT0]
+ * KINETIS_SIM_HAS_SOPT4_FTM2FLT1          -  SoC has SOPT4[FTM2FLT1]
+ * KINETIS_SIM_HAS_SOPT4_FTM2FLT2          -  SoC has SOPT4[FTM2FLT2]
+ * KINETIS_SIM_HAS_SOPT4_FTM2FLT3          -  SoC has SOPT4[FTM2FLT3]
+ * KINETIS_SIM_HAS_SOPT4_FTM3CH0SRC        -  SoC has SOPT4[FTM3CH0SRC]
+ * KINETIS_SIM_HAS_SOPT4_FTM3FLT0          -  SoC has SOPT4[FTM3FLT0]
+ * KINETIS_SIM_HAS_SOPT4_FTM3FLT1          -  SoC has SOPT4[FTM3FLT1]
+ * KINETIS_SIM_HAS_SOPT4_FTM3FLT2          -  SoC has SOPT4[FTM3FLT2]
+ * KINETIS_SIM_HAS_SOPT4_FTM3FLT3          -  SoC has SOPT4[FTM3FLT3]
+ * KINETIS_SIM_HAS_SOPT4_FTM3TRG0SRC       -  SoC has SOPT4[FTM3TRG0SRC]
+ * KINETIS_SIM_HAS_SOPT4_FTM3TRG1SRC       -  SoC has SOPT4[FTM3TRG1SRC]
+ * KINETIS_SIM_HAS_SOPT4_TPM0CLKSEL        -  SoC has SOPT4[TPM0CLKSEL]
+ * KINETIS_SIM_HAS_SOPT4_TPM1CH0SRC        -  SoC has SOPT4[TPM1CH0SRC]
+ * KINETIS_SIM_HAS_SOPT4_TPM1CLKSEL        -  SoC has SOPT4[TPM1CLKSEL]
+ * KINETIS_SIM_HAS_SOPT4_TPM2CH0SRC        -  SoC has SOPT4[TPM2CH0SRC]
+ * KINETIS_SIM_HAS_SOPT4_TPM2CLKSEL        -  SoC has SOPT4[TPM2CLKSEL]
+ * KINETIS_SIM_HAS_SOPT5                   -  SoC has SOPT5 Register
+ * KINETIS_SIM_HAS_SOPT5_LPUART0RXSRC      -  SoC has SOPT5[LPUART0RXSRC]
+ * KINETIS_SIM_HAS_SOPT5_LPUART0TXSRC      -  SoC has SOPT5[LPUART0TXSRC]
+ * KINETIS_SIM_HAS_SOPT6                   -  SoC has SOPT6 Register
+ * KINETIS_SIM_HAS_SOPT6_MCC               -  SoC has SOPT6[MCC]
+ * KINETIS_SIM_HAS_SOPT6_PCR               -  SoC has SOPT6[PCR]
+ * KINETIS_SIM_HAS_SOPT6_RSTFLTSEL         -  SoC has SOPT6[RSTFLTSEL]
+ * KINETIS_SIM_HAS_SOPT6_RSTFLTEN          -  SoC has SOPT6[RSTFLTEN]
+ * KINETIS_SIM_HAS_SOPT7                   -  SoC has SOPT7 Register
+ * KINETIS_SIM_HAS_SOPT7_ADC0ALTTRGSEL     -  SoC has SOPT7[ADC0ALTTRGSEL]
+ * KINETIS_SIM_HAS_SOPT7_ADC1ALTTRGSEL     -  SoC has SOPT7[ADC1ALTTRGSEL]
+ * KINETIS_SIM_HAS_SOPT7_ADC0PRETRGSEL     -  SoC has SOPT7[ADC0PRETRGSEL]
+ * KINETIS_SIM_HAS_SOPT7_ADC1PRETRGSEL     -  SoC has SOPT7[ADC1PRETRGSEL]
+ * KINETIS_SIM_HAS_SOPT7_ADC2PRETRGSEL     -  SoC has SOPT7[ADC2PRETRGSEL]
+ * KINETIS_SIM_HAS_SOPT7_ADC3PRETRGSEL     -  SoC has SOPT7[ADC3PRETRGSEL]
+ * KINETIS_SIM_HAS_SOPT7_ADC0TRGSEL        -  SoC has n SOPT7[ADC0TRGSEL]
+ * KINETIS_SIM_HAS_SOPT7_ADC1TRGSEL        -  SoC has n SOPT7[ADC1TRGSEL]
+ * KINETIS_SIM_HAS_SOPT7_ADC2TRGSEL        -  SoC has n SOPT7[ADC2TRGSEL]
+ * KINETIS_SIM_HAS_SOPT7_ADC3TRGSEL        -  SoC has n SOPT7[ADC3TRGSEL]
+ * KINETIS_SIM_SOPT7_ADC0ALTTRGEN          -  SoC has ADC0 alternate trigger enable
+ * KINETIS_SIM_SOPT7_ADC1ALTTRGEN          -  SoC has ADC1 alternate trigger enable
+ * KINETIS_SIM_SOPT7_ADC2ALTTRGEN          -  SoC has ADC2 alternate trigger enable
+ * KINETIS_SIM_SOPT7_ADC3ALTTRGEN          -  SoC has ADC3 alternate trigger enable
+ * KINETIS_SIM_HAS_SOPT8                   -  SoC has SOPT8 Register
+ * KINETIS_SIM_HAS_SOPT8_FTM0SYNCBIT       -  SoC has SOPT8[FTM0SYNCBIT]
+ * KINETIS_SIM_HAS_SOPT8_FTM1SYNCBIT       -  SoC has SOPT8[FTM1SYNCBIT]
+ * KINETIS_SIM_HAS_SOPT8_FTM2SYNCBIT       -  SoC has SOPT8[FTM2SYNCBIT]
+ * KINETIS_SIM_HAS_SOPT8_FTM3SYNCBIT       -  SoC has SOPT8[FTM3SYNCBIT]
+ * KINETIS_SIM_HAS_SOPT8_FTM0OCH0SRC       -  SoC has SOPT8[FTM0OCH0SRC]
+ * KINETIS_SIM_HAS_SOPT8_FTM0OCH1SRC       -  SoC has SOPT8[FTM0OCH1SRC]
+ * KINETIS_SIM_HAS_SOPT8_FTM0OCH2SRC       -  SoC has SOPT8[FTM0OCH2SRC]
+ * KINETIS_SIM_HAS_SOPT8_FTM0OCH3SRC       -  SoC has SOPT8[FTM0OCH3SRC]
+ * KINETIS_SIM_HAS_SOPT8_FTM0OCH4SRC       -  SoC has SOPT8[FTM0OCH4SRC]
+ * KINETIS_SIM_HAS_SOPT8_FTM0OCH5SRC       -  SoC has SOPT8[FTM0OCH5SRC]
+ * KINETIS_SIM_HAS_SOPT8_FTM0OCH6SRC       -  SoC has SOPT8[FTM0OCH6SRC]
+ * KINETIS_SIM_HAS_SOPT8_FTM0OCH7SRC       -  SoC has SOPT8[FTM0OCH7SRC]
+ * KINETIS_SIM_HAS_SOPT8_FTM3OCH0SRC       -  SoC has SOPT8[FTM3OCH0SRC]
+ * KINETIS_SIM_HAS_SOPT8_FTM3OCH1SRC       -  SoC has SOPT8[FTM3OCH1SRC]
+ * KINETIS_SIM_HAS_SOPT8_FTM3OCH2SRC       -  SoC has SOPT8[FTM3OCH2SRC]
+ * KINETIS_SIM_HAS_SOPT8_FTM3OCH3SRC       -  SoC has SOPT8[FTM3OCH3SRC]
+ * KINETIS_SIM_HAS_SOPT8_FTM3OCH4SRC       -  SoC has SOPT8[FTM3OCH4SRC]
+ * KINETIS_SIM_HAS_SOPT8_FTM3OCH5SRC       -  SoC has SOPT8[FTM3OCH5SRC]
+ * KINETIS_SIM_HAS_SOPT8_FTM3OCH6SRC       -  SoC has SOPT8[FTM3OCH6SRC]
+ * KINETIS_SIM_HAS_SOPT8_FTM3OCH7SRC       -  SoC has SOPT8[FTM3OCH7SRC]
+ * KINETIS_SIM_HAS_SOPT9                   -  SoC has SOPT9 Register
+ * KINETIS_SIM_HAS_SOPT9_TPM1CH0SRC        -  SoC has SOPT9[TPM1CH0SRC]
+ * KINETIS_SIM_HAS_SOPT9_TPM2CH0SRC        -  SoC has SOPT9[TPM2CH0SRC]
+ * KINETIS_SIM_HAS_SOPT9_TPM1CLKSEL        -  SoC has SOPT9[TPM1CLKSEL]
+ * KINETIS_SIM_HAS_SOPT9_TPM2CLKSEL        -  SoC has SOPT9[TPM2CLKSEL]
+ * KINETIS_SIM_HAS_SDID                    -  SoC has SDID Register
+ * KINETIS_SIM_HAS_SDID_DIEID              -  SoC has SDID[DIEID]
+ * KINETIS_SIM_HAS_SDID_FAMID              -  SoC has SDID[FAMID]
+ * KINETIS_SIM_HAS_SDID_FAMILYID           -  SoC has SDID[FAMILYID]
+ * KINETIS_SIM_HAS_SDID_SERIESID           -  SoC has SDID[SERIESID]
+ * KINETIS_SIM_HAS_SDID_SRAMSIZE           -  SoC has SDID[SRAMSIZE]
+ * KINETIS_SIM_HAS_SDID_SUBFAMID           -  SoC has SDID[SUBFAMID]
+ * KINETIS_SIM_HAS_SCGC1                   -  SoC has _SCGC1 Register
+ * KINETIS_SIM_HAS_SCGC1_UART5             -  SoC has SCGC1[UART5]
+ * KINETIS_SIM_HAS_SCGC1_UART4             -  SoC has SCGC1[UART4]
+ * KINETIS_SIM_HAS_SCGC1_I2C3              -  SoC has SCGC1[I2C3]
+ * KINETIS_SIM_HAS_SCGC1_I2C2              -  SoC has SCGC1[I2C2]
+ * KINETIS_SIM_HAS_SCGC1_OSC1              -  SoC has SCGC1[OSC1]
+ * KINETIS_SIM_HAS_SCGC2                   -  SoC has SCGC2 Register
+ * KINETIS_SIM_HAS_SCGC2_ENET              -  SoC has SCGC2[ENET]
+ * KINETIS_SIM_HAS_SCGC2_LPUART0           -  SoC has SCGC2[LPUART0]
+ * KINETIS_SIM_HAS_SCGC2_TPM1              -  SoC has SCGC2[TPM1]
+ * KINETIS_SIM_HAS_SCGC2_TPM2              -  SoC has SCGC2[TPM2]
+ * KINETIS_SIM_HAS_SCGC3                   -  SoC has SCGC3 Register
+ * KINETIS_SIM_HAS_SCGC3                   -  SoC has SCGC3 Register
+ * KINETIS_SIM_HAS_SCGC3_RNGA              -  SoC has SCGC3[RNGA]
+ * KINETIS_SIM_HAS_SCGC3_USBHS             -  SoC has SCGC3[USBHS]
+ * KINETIS_SIM_HAS_SCGC3_USBHSPHY          -  SoC has SCGC3[USBHSPHY]
+ * KINETIS_SIM_HAS_SCGC3_USBHSDCD          -  SoC has SCGC3[USBHSDCD]
+ * KINETIS_SIM_HAS_SCGC3_FLEXCAN1          -  SoC has SCGC3[FLEXCAN1]
+ * KINETIS_SIM_HAS_SCGC3_NFC               -  SoC has SCGC3[NFC]
+ * KINETIS_SIM_HAS_SCGC3_SPI2              -  SoC has SCGC3[SPI2]
+ * KINETIS_SIM_HAS_SCGC3_SAI1              -  SoC has SCGC3[SAI1]
+ * KINETIS_SIM_HAS_SCGC3_SDHC              -  SoC has SCGC3[SDHC]
+ * KINETIS_SIM_HAS_SCGC3_FTM2              -  SoC has SCGC3[FTM2]
+ * KINETIS_SIM_HAS_SCGC3_FTM3              -  SoC has SCGC3[FTM3]
+ * KINETIS_SIM_HAS_SCGC3_ADC1              -  SoC has SCGC3[ADC1]
+ * KINETIS_SIM_HAS_SCGC3_ADC3              -  SoC has SCGC3[ADC3]
+ * KINETIS_SIM_HAS_SCGC3_SLCD              -  SoC has SCGC3[SLCD]
+ * KINETIS_SIM_HAS_SCGC4                   -  SoC has SCGC4 Register
+ * KINETIS_SIM_HAS_SCGC4_LLWU              -  SoC has SCGC4[LLWU] clock gate
+ * KINETIS_SIM_HAS_SCGC4_UART0             -  SoC has SCGC4[UART0]
+ * KINETIS_SIM_HAS_SCGC4_UART1             -  SoC has SCGC4[UART1]
+ * KINETIS_SIM_HAS_SCGC4_UART2             -  SoC has SCGC4[UART2]
+ * KINETIS_SIM_HAS_SCGC4_UART3             -  SoC has SCGC4[UART3]
+ * KINETIS_SIM_HAS_SCGC5                   -  SoC has _SCGC5 Register
+ * KINETIS_SIM_HAS_SCGC5_REGFILE           -  SoC has SCGC5[REGFILE]
+ * KINETIS_SIM_HAS_SCGC5_TSI               -  SoC has SCGC5[TSI]
+ * KINETIS_SIM_HAS_SCGC5_PORTF             -  SoC has SCGC5[PORTf]
+ * KINETIS_SIM_HAS_SCGC6                   -  SoC has SCGC6 Register
+ * KINETIS_SIM_HAS_SCGC6_FTFL              -  SoC has SCGC6[FTFL]
+ * KINETIS_SIM_HAS_SCGC6_DMAMUX1           -  SoC has SCGC6[DEMUX1]
+ * KINETIS_SIM_HAS_SCGC6_USBHS             -  SoC has SCGC6[USBHS]
+ * KINETIS_SIM_HAS_SCGC6_RNGA              -  SoC has SCGC6[RNGA]
+ * KINETIS_SIM_HAS_SCGC6_FTM2              -  SoC has SCGC6[FTM2]
+ * KINETIS_SIM_HAS_SCGC6_ADC2              -  SoC has SCGC6[ADC2]
+ * KINETIS_SIM_HAS_SCGC6_DAC0              -  SoC has SCGC6[DAC0]
+ * KINETIS_SIM_HAS_SCGC7                   -  SoC has SCGC7 Register
+ * KINETIS_SIM_HAS_SCGC7_FLEXBUS           -  SoC has SCGC7[FLEXBUS]
+ * KINETIS_SIM_HAS_SCGC7_DMA               -  SoC has SCGC7[DMS]
+ * KINETIS_SIM_HAS_SCGC7_MPU               -  SoC has SCGC7[MPU]
+ * KINETIS_SIM_HAS_SCGC7_SDRAMC            -  SoC has SCGC7[SDRAMC]
+ * KINETIS_SIM_HAS_CLKDIV1                 -  SoC has CLKDIV1 Register
+ * KINETIS_SIM_HAS_CLKDIV1_OUTDIV2         -  SoC has CLKDIV1[OUTDIV2]
+ * KINETIS_SIM_HAS_CLKDIV1_OUTDIV3         -  SoC has CLKDIV1[OUTDIV3]
+ * KINETIS_SIM_HAS_CLKDIV1_OUTDIV4         -  SoC has CLKDIV1[OUTDIV4]
+ * KINETIS_SIM_HAS_CLKDIV1_OUTDIV5         -  SoC has CLKDIV1[OUTDIV5]
+ * KINETIS_SIM_HAS_CLKDIV2                 -  SoC has CLKDIV2 Register
+ * KINETIS_SIM_HAS_CLKDIV2_USBDIV          -  SoC has CLKDIV2[USBDIV]
+ * KINETIS_SIM_HAS_CLKDIV2_USBFRAC         -  SoC has CLKDIV2[USBFRAC]
+ * KINETIS_SIM_HAS_CLKDIV2_I2SDIV          -  SoC has CLKDIV2[I2SDIV]
+ * KINETIS_SIM_HAS_CLKDIV2_I2SFRAC         -  SoC has CLKDIV2[I2SFRAC]
+ * KINETIS_SIM_HAS_CLKDIV2_USBHSDIV        -  SoC has CLKDIV2[USBHSDIV]
+ * KINETIS_SIM_HAS_CLKDIV2_USBHSFRAC       -  SoC has CLKDIV2[USBHSFRAC]
+ * KINETIS_SIM_HAS_FCFG1                   -  SoC has FCFG1 Register
+ * KINETIS_SIM_HAS_FCFG1_DEPART            -  SoC has FCFG1[DEPART]
+ * KINETIS_SIM_HAS_FCFG1_EESIZE            -  SoC has FCFG1[EESIZE]
+ * KINETIS_SIM_HAS_FCFG1_FLASHDIS          -  SoC has FCFG1[FLASHDIS]
+ * KINETIS_SIM_HAS_FCFG1_FLASHDOZE         -  SoC has FCFG1[FLASHDOZE]
+ * KINETIS_SIM_HAS_FCFG1_FTFDIS            -  SoC has FCFG1[FTFDIS]
+ * KINETIS_SIM_HAS_FCFG1_NVMSIZE           -  SoC has FCFG1[NVMSIZE]
+ * KINETIS_SIM_HAS_FCFG2                   -  SoC has FCFG2 Register
+ * KINETIS_SIM_HAS_FCFG2_MAXADDR0          -  SoC has n bit of FCFG2[MAXADDR0]
+ * KINETIS_SIM_HAS_FCFG2_MAXADDR1          -  SoC has n bit of FCFG2[MAXADDR1]
+ * KINETIS_SIM_HAS_FCFG2_PFLSH             -  SoC has FCFG2[PFLSH]
+ * KINETIS_SIM_HAS_FCFG2_SWAPPFLSH         -  SoC has FCFG2[SWAPPFLSH]
+ * KINETIS_SIM_HAS_UIDH                    -  SoC has UIDH Register
+ * KINETIS_SIM_HAS_UIDMH                   -  SoC has UIDMH Register
+ * KINETIS_SIM_HAS_UIDML                   -  SoC has UIDML Register
+ * KINETIS_SIM_HAS_UIDL                    -  SoC has UIDL Register
+ * KINETIS_SIM_HAS_CLKDIV3                 -  SoC has CLKDIV3 Register
+ * KINETIS_SIM_HAS_CLKDIV3_PLLFLLDIV       -  SoC has CLKDIV3[PLLFLLDIV]
+ * KINETIS_SIM_HAS_CLKDIV3_PLLFLLFRAC      -  SoC has CLKDIV3[PLLFLLFRAC]
+ * KINETIS_SIM_HAS_CLKDIV4                 -  SoC has CLKDIV4 Register
+ * KINETIS_SIM_HAS_CLKDIV4_TRACEDIV        -  SoC has CLKDIV4[TRACEDIV]
+ * KINETIS_SIM_HAS_CLKDIV4_TRACEFRAC       -  SoC has CLKDIV4[TRACEFRAC]
+ * KINETIS_SIM_HAS_CLKDIV4_NFCEDIV         -  SoC has CLKDIV4[NFCDIV]
+ * KINETIS_SIM_HAS_CLKDIV4_NFCFRAC         -  SoC has CLKDIV4[NFCFRAC]
+ * KINETIS_SIM_HAS_MCR                     -  SoC has MCR Register
+ */
+
+/* Describe the version of the SIM
+ *
+ * These defines are not related to any NXP reference but are merely
+ * a way to label the versions we are using
+ */
+
+#define KINETIS_SIM_VERSION_UKN   -1  /* What was in nuttx prior to 2/16/2017 */
+#define KINETIS_SIM_VERSION_01     1  /* Verified Document Number: K60P144M150SF3RM Rev. 3, November 2014 */
+#define KINETIS_SIM_VERSION_04     4  /* Verified to Document Number: K64P144M120SF5RM Rev. 2, January 2014 */
+#define KINETIS_SIM_VERSION_06     6  /* Verified to Document Number: K66P144M180SF5RMV2 Rev. 2, May 2015 */
+
+/* MK20DX/DN---VLH5
+ *
+ *  ------------- ------ --- ------- ------ ------- ------ ----- ----
+ *  PART NUMBER   CPU    PIN PACKAGE TOTAL  PROGRAM EEPROM SRAM  GPIO
+ *                FREQ   CNT         FLASH  FLASH
+ *  ------------- ------ --- ------- ------ ------- ------ ----- ----
+ *  MK20DN32VLH5  50 MHz 64  LQFP     32 KB 32 KB   —       8 KB 40
+ *  MK20DX32VLH5  50 MHz 64  LQFP     64 KB 32 KB   2 KB    8 KB 40
+ *  MK20DN64VLH5  50 MHz 64  LQFP     64 KB 64 KB   —      16 KB 40
+ *  MK20DX64VLH5  50 MHz 64  LQFP     96 KB 64 KB   2 KB   16 KB 40
+ *  MK20DN128VLH5 50 MHz 64  LQFP    128 KB 128 KB  —      16 KB 40
+ *  MK20DX128VLH5 50 MHz 64  LQFP    160 KB 128 KB  2 KB   16 KB 40
+ */
+
+#if defined(CONFIG_ARCH_CHIP_MK20DN32VLH5) || \
+    defined(CONFIG_ARCH_CHIP_MK20DX32VLH5) || \
+    defined(CONFIG_ARCH_CHIP_MK20DN64VLH5) || \
+    defined(CONFIG_ARCH_CHIP_MK20DX64VLH5) || \
+    defined(CONFIG_ARCH_CHIP_MK20DN128VLH5) || \
+    defined(CONFIG_ARCH_CHIP_MK20DX128VLH5)
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_UKN
+
+/* MK20DX---VLH7
+ *
+ *  ------------- ------ --- ------- ------ ------- ------ ----- ----
+ *  PART NUMBER   CPU    PIN PACKAGE TOTAL  PROGRAM EEPROM SRAM  GPIO
+ *                FREQ   CNT         FLASH  FLASH
+ *  ------------- ------ --- ------- ------ ------- ------ ----- ----
+ *  MK20DX64VLH7  72 MHz 64  LQFP     96 KB  64 KB  2 KB   16 KB 40
+ *  MK20DX128VLH7 72 MHz 64  LQFP    160 KB 128 KB  2 KB   32 KB 40
+ *  MK20DX256VLH7 72 MHz 64  LQFP    288 KB 256 KB  2 KB   64 KB 40
+ *  ------------- ------ --- ------- ------ ------- ------ ----- ----
+ */
+
+#elif defined(CONFIG_ARCH_CHIP_MK20DX64VLH7) || defined(CONFIG_ARCH_CHIP_MK20DX128VLH7) || \
+      defined(CONFIG_ARCH_CHIP_MK20DX256VLH7)
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK40X64VFX50) || defined(CONFIG_ARCH_CHIP_MK40X64VLH50) || \
+      defined(CONFIG_ARCH_CHIP_MK40X64VLK50) || defined(CONFIG_ARCH_CHIP_MK40X64VMB50)
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK40X128VFX50) || defined(CONFIG_ARCH_CHIP_MK40X128VLH50) || \
+      defined(CONFIG_ARCH_CHIP_MK40X128VLK50) || defined(CONFIG_ARCH_CHIP_MK40X128VMB50) || \
+      defined(CONFIG_ARCH_CHIP_MK40X128VLL50) || defined(CONFIG_ARCH_CHIP_MK40X128VML50) || \
+      defined(CONFIG_ARCH_CHIP_MK40X128VFX72) || defined(CONFIG_ARCH_CHIP_MK40X128VLH72) || \
+      defined(CONFIG_ARCH_CHIP_MK40X128VLK72) || defined(CONFIG_ARCH_CHIP_MK40X128VMB72) || \
+      defined(CONFIG_ARCH_CHIP_MK40X128VLL72) || defined(CONFIG_ARCH_CHIP_MK40X128VML72)
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK40X256VLK72) || defined(CONFIG_ARCH_CHIP_MK40X256VMB72) || \
+      defined(CONFIG_ARCH_CHIP_MK40X256VLL72) || defined(CONFIG_ARCH_CHIP_MK40X256VML72)
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100)
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK40X256VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X256VMD100)
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK40N512VLK100) || defined(CONFIG_ARCH_CHIP_MK40N512VMB100) || \
+      defined(CONFIG_ARCH_CHIP_MK40N512VLL100) || defined(CONFIG_ARCH_CHIP_MK40N512VML100) || \
+      defined(CONFIG_ARCH_CHIP_MK40N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK40N512VMD100)
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N256VLL100)
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60X256VLL100)
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N512VLL100)
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N256VML100)
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60X256VML100)
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N512VML100)
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N256VLQ100)
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60X256VLQ100)
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N512VLQ100)
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N256VMD100)
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60X256VMD100)
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60N512VMD100)
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_UKN
+
+#elif defined(CONFIG_ARCH_CHIP_MK60FN1M0VLQ12)
+
+/* Verified to Document Number: K60P144M100SF2V2RM Rev. 2 Jun 2012 */
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_01
+
+/* SIM Register Configuration */
+
+#  define KINETIS_SIM_HAS_SOPT1                       1   /* SoC has SOPT1 Register */
+#  undef  KINETIS_SIM_HAS_SOPT1_OSC32KOUT                 /* SoC has SOPT1[OSC32KOUT] */
+#  define KINETIS_SIM_HAS_SOPT1_OSC32KSEL             1   /* SoC has SOPT1[OSC32KSEL] */
+#  define KINETIS_SIM_HAS_SOPT1_OSC32KSEL_BITS        1   /* SoC has 1 bit SOPT1[OSC32KSEL] */
+#  define KINETIS_SIM_HAS_SOPT1_RAMSIZE               1   /* SoC has SOPT1[RAMSIZE] */
+#  define KINETIS_SIM_HAS_SOPT1_USBREGEN              1   /* SoC has SOPT1[USBREGEN] */
+#  define KINETIS_SIM_HAS_SOPT1_USBSSTBY              1   /* SoC has SOPT1[USBSSTBY] */
+#  define KINETIS_SIM_HAS_SOPT1_USBVSTBY              1   /* SoC has SOPT1[USBVSTBY] */
+#  define KINETIS_SIM_HAS_SOPT1CFG                        /* SoC has SOPT1CFG Register */
+#  define KINETIS_SIM_HAS_SOPT1CFG_URWE               1   /* SoC has SOPT1CFG[URWE] */
+#  define KINETIS_SIM_HAS_SOPT1CFG_USSWE              1   /* SoC has SOPT1CFG[USSWE] */
+#  define KINETIS_SIM_HAS_SOPT1CFG_UVSWE              1   /* SoC has SOPT1CFG[UVSWE] */
+#  undef  KINETIS_SIM_HAS_USBPHYCTL                       /* SoC has USBPHYCTL Register */
+#  undef  KINETIS_SIM_HAS_USBPHYCTL_USB3VOUTTRG           /* SoC has USBPHYCTL[USB3VOUTTRG] */
+#  undef  KINETIS_SIM_HAS_USBPHYCTL_USBDISILIM            /* SoC has USBPHYCTL[USBDISILIM] */
+#  undef  KINETIS_SIM_HAS_USBPHYCTL_USBVREGPD             /* SoC has USBPHYCTL[USBVREGPD] */
+#  undef  KINETIS_SIM_HAS_USBPHYCTL_USBVREGSEL            /* SoC has USBPHYCTL[USBVREGSEL] */
+#  define KINETIS_SIM_HAS_SOPT2                       1   /* SoC has SOPT2 Register */
+#  define KINETIS_SIM_HAS_SOPT2_FBSL                  1   /* SoC has SOPT2[FBSL] */
+#  define KINETIS_SIM_HAS_SOPT2_CMTUARTPAD            1   /* SoC has SOPT2[CMTUARTPAD] */
+#  define KINETIS_SIM_HAS_SOPT2_FLEXIOSRC             1   /* SoC has SOPT2[FLEXIOSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT2_LPUARTSRC                 /* SoC has SOPT2[LPUARTSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_PLLFLLSEL             1   /* SoC has SOPT2[PLLFLLSEL] */
+#  define KINETIS_SIM_HAS_SOPT2_PLLFLLSEL_BITS        2   /* SoC has 2 bits of SOPT2[PLLFLLSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT2_PTD7PAD                   /* SoC has SOPT2[PTD7PAD] */
+#  undef  KINETIS_SIM_HAS_SOPT2_RMIISRC                   /* SoC has SOPT2[RMIISRC] */
+#  define KINETIS_SIM_HAS_SOPT2_RTCCLKOUTSEL          1   /* SoC has SOPT2[RTCCLKOUTSEL] */
+#  define KINETIS_SIM_HAS_SOPT2_CLKOUTSEL             1   /* SoC has SOPT2[CLKOUTSEL] */
+#  define KINETIS_SIM_HAS_SOPT2_SDHCSRC               1   /* SoC has SOPT2[SDHCSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_NFCSRC                1   /* SoC has SOPT2[NFCSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT2_I2SSRC                    /* SoC has SOPT2[I2SSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_TIMESRC               1   /* SoC has SOPT2[TIMESRC] */
+#  undef  KINETIS_SIM_HAS_SOPT2_TPMSRC                    /* SoC has SOPT2[TPMSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_USBFSRC               1   /* SoC has SOPT2[USBFSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_TRACECLKSEL           1   /* SoC has SOPT2[TRACECLKSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT2_USBREGEN                  /* SoC has SOPT2[USBREGEN] */
+#  undef  KINETIS_SIM_HAS_SOPT2_USBSLSRC                  /* SoC has SOPT2[USBSLSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_USBHSRC               1   /* SoC has SOPT2[USBHSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_USBSRC                1   /* SoC has SOPT2[USBSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT2_MCGCLKSEL                 /* SoC has SOPT2[MCGCLKSEL] */
+#  define KINETIS_SIM_HAS_SOPT4                       1   /* SoC has SOPT4 Register */
+#  define KINETIS_SIM_HAS_SOPT4_FTM0FLT0              1   /* SoC has SOPT4[FTM0FLT0] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM0FLT1              1   /* SoC has SOPT4[FTM0FLT1] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM0FLT2              1   /* SoC has SOPT4[FTM0FLT2] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM0FLT3              1   /* SoC has SOPT4[FTM0FLT3] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM0TRG0SRC           1   /* SoC has SOPT4[FTM0TRG0SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM0TRG1SRC           1   /* SoC has SOPT4[FTM0TRG1SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM1CH0SRC            3   /* SoC has SOPT4[FTM1CH0SRC] 1, 3 if SOF */
+#  define KINETIS_SIM_HAS_SOPT4_FTM1FLT0              1   /* SoC has SOPT4[FTM1FLT0] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM1FLT1              1   /* SoC has SOPT4[FTM1FLT1] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM1FLT2              1   /* SoC has SOPT4[FTM1FLT2] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM1FLT3              1   /* SoC has SOPT4[FTM1FLT3] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM2CH0SRC            1   /* SoC has SOPT4[FTM2CH0SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM2CH1SRC                /* SoC has SOPT4[FTM2CH1SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM2FLT0              1   /* SoC has SOPT4[FTM2FLT0] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM2FLT1              1   /* SoC has SOPT4[FTM2FLT1] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM2FLT2              1   /* SoC has SOPT4[FTM2FLT2] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM2FLT3              1   /* SoC has SOPT4[FTM2FLT3] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM3CH0SRC            1   /* SoC has SOPT4[FTM3CH0SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM3FLT0              1   /* SoC has SOPT4[FTM3FLT0] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM3FLT1              1   /* SoC has SOPT4[FTM3FLT1] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM3FLT2              1   /* SoC has SOPT4[FTM3FLT2] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM3FLT3              1   /* SoC has SOPT4[FTM3FLT3] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM3TRG0SRC           1   /* SoC has SOPT4[FTM3TRG0SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM3TRG1SRC           1   /* SoC has SOPT4[FTM3TRG1SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_TPM0CLKSEL            1   /* SoC has SOPT4[TPM0CLKSEL] */
+#  define KINETIS_SIM_HAS_SOPT4_TPM1CH0SRC            1   /* SoC has SOPT4[TPM1CH0SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_TPM1CLKSEL            1   /* SoC has SOPT4[TPM1CLKSEL] */
+#  define KINETIS_SIM_HAS_SOPT4_TPM2CH0SRC            1   /* SoC has SOPT4[TPM2CH0SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_TPM2CLKSEL            1   /* SoC has SOPT4[TPM2CLKSEL] */
+#  define KINETIS_SIM_HAS_SOPT5                       1   /* SoC has SOPT5 Register */
+#  undef  KINETIS_SIM_HAS_SOPT5_LPUART0RXSRC              /* SoC has SOPT5[LPUART0RXSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT5_LPUART0TXSRC              /* SoC has SOPT5[LPUART0TXSRC] */
+#  define KINETIS_SIM_HAS_SOPT6                       1   /* SoC has SOPT6 Register */
+#  define KINETIS_SIM_HAS_SOPT6_MCC                   1   /* SoC has SOPT6[MCC] */
+#  define KINETIS_SIM_HAS_SOPT6_PCR                   1   /* SoC has SOPT6[PCR] */
+#  undef  KINETIS_SIM_HAS_SOPT6_RSTFLTSEL                 /* SoC has SOPT6[RSTFLTSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT6_RSTFLTEN                  /* SoC has SOPT6[RSTFLTEN] */
+#  define KINETIS_SIM_HAS_SOPT7                       1   /* SoC has SOPT7 Register */
+#  define KINETIS_SIM_HAS_SOPT7_ADC0ALTTRGSEL         1   /* SoC has SOPT7[ADC0ALTTRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC1ALTTRGSEL         1   /* SoC has SOPT7[ADC1ALTTRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC0PRETRGSEL         1   /* SoC has SOPT7[ADC0PRETRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC1PRETRGSEL         1   /* SoC has SOPT7[ADC1PRETRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC2PRETRGSEL         1   /* SoC has SOPT7[ADC2PRETRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC3PRETRGSEL         1   /* SoC has SOPT7[ADC3PRETRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC0TRGSEL            15  /* SoC has 15 SOPT7[ADC0TRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC1TRGSEL            15  /* SoC has 15 SOPT7[ADC1TRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC2TRGSEL            15  /* SoC has 15 SOPT7[ADC2TRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC3TRGSEL            15  /* SoC has 15 SOPT7[ADC3TRGSEL] */
+#  define KINETIS_SIM_SOPT7_ADC0ALTTRGEN              1   /* ADC0 alternate trigger enable */
+#  define KINETIS_SIM_SOPT7_ADC1ALTTRGEN              1   /* ADC1 alternate trigger enable */
+#  define KINETIS_SIM_SOPT7_ADC2ALTTRGEN              1   /* ADC2 alternate trigger enable */
+#  define KINETIS_SIM_SOPT7_ADC3ALTTRGEN              1   /* ADC3 alternate trigger enable */
+#  undef  KINETIS_SIM_HAS_SOPT8                           /* SoC has SOPT8 Register */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM0SYNCBIT               /* SoC has SOPT8[FTM0SYNCBIT] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM1SYNCBIT               /* SoC has SOPT8[FTM1SYNCBIT] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM2SYNCBIT               /* SoC has SOPT8[FTM2SYNCBIT] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM3SYNCBIT               /* SoC has SOPT8[FTM3SYNCBIT] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM0OCH0SRC               /* SoC has SOPT8[FTM0OCH0SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM0OCH1SRC               /* SoC has SOPT8[FTM0OCH1SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM0OCH2SRC               /* SoC has SOPT8[FTM0OCH2SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM0OCH3SRC               /* SoC has SOPT8[FTM0OCH3SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM0OCH4SRC               /* SoC has SOPT8[FTM0OCH4SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM0OCH5SRC               /* SoC has SOPT8[FTM0OCH5SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM0OCH6SRC               /* SoC has SOPT8[FTM0OCH6SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM0OCH7SRC               /* SoC has SOPT8[FTM0OCH7SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM3OCH0SRC               /* SoC has SOPT8[FTM3OCH0SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM3OCH1SRC               /* SoC has SOPT8[FTM3OCH1SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM3OCH2SRC               /* SoC has SOPT8[FTM3OCH2SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM3OCH3SRC               /* SoC has SOPT8[FTM3OCH3SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM3OCH4SRC               /* SoC has SOPT8[FTM3OCH4SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM3OCH5SRC               /* SoC has SOPT8[FTM3OCH5SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM3OCH6SRC               /* SoC has SOPT8[FTM3OCH6SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM3OCH7SRC               /* SoC has SOPT8[FTM3OCH7SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT9                           /* SoC has SOPT9 Register */
+#  undef  KINETIS_SIM_HAS_SOPT9_TPM1CH0SRC                /* SoC has SOPT9[TPM1CH0SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT9_TPM2CH0SRC                /* SoC has SOPT9[TPM2CH0SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT9_TPM1CLKSEL                /* SoC has SOPT9[TPM1CLKSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT9_TPM2CLKSEL                /* SoC has SOPT9[TPM2CLKSEL] */
+#  define KINETIS_SIM_HAS_SDID                        1   /* SoC has SDID Register */
+#  undef  KINETIS_SIM_HAS_SDID_DIEID                      /* SoC has SDID[DIEID] */
+#  define KINETIS_SIM_HAS_SDID_FAMID                  1   /* SoC has SDID[FAMID] */
+#  undef  KINETIS_SIM_HAS_SDID_FAMILYID                   /* SoC has SDID[FAMILYID] */
+#  undef  KINETIS_SIM_HAS_SDID_SERIESID                   /* SoC has SDID[SERIESID] */
+#  undef  KINETIS_SIM_HAS_SDID_SRAMSIZE                   /* SoC has SDID[SRAMSIZE] */
+#  undef  KINETIS_SIM_HAS_SDID_SUBFAMID                   /* SoC has SDID[SUBFAMID] */
+#  define KINETIS_SIM_HAS_SCGC1                       1   /* SoC has _SCGC1 Register */
+#  define KINETIS_SIM_HAS_SCGC1_UART5                 1   /* SoC has SCGC1[UART5] */
+#  define KINETIS_SIM_HAS_SCGC1_UART4                 1   /* SoC has SCGC1[UART4] */
+#  undef  KINETIS_SIM_HAS_SCGC1_I2C3                      /* SoC has SCGC1[I2C3] */
+#  undef  KINETIS_SIM_HAS_SCGC1_I2C2                      /* SoC has SCGC1[I2C2] */
+#  define KINETIS_SIM_HAS_SCGC1_OSC1                  1    /* SoC has SCGC1[OSC1] */
+#  define KINETIS_SIM_HAS_SCGC2                       1   /* SoC has _SCGC2 Register */
+#  define KINETIS_SIM_HAS_SCGC2                       1   /* SoC has SCGC2 Register */
+#  define KINETIS_SIM_HAS_SCGC2_ENET                  1   /* SoC has SCGC2[ENET] */
+#  undef  KINETIS_SIM_HAS_SCGC2_LPUART0                   /* SoC has SCGC2[LPUART0] */
+#  undef  KINETIS_SIM_HAS_SCGC2_TPM1                      /* SoC has SCGC2[TPM1] */
+#  undef  KINETIS_SIM_HAS_SCGC2_TPM2                      /* SoC has SCGC2[TPM2] */
+#  define KINETIS_SIM_HAS_SCGC3                       1   /* SoC has SCGC3 Register */
+#  define KINETIS_SIM_HAS_SCGC3_RNGA                  1   /* SoC has SCGC3[RNGA] */
+#  undef  KINETIS_SIM_HAS_SCGC3_USBHS                     /* SoC has SCGC3[USBHS] */
+#  undef  KINETIS_SIM_HAS_SCGC3_USBHSPHY                  /* SoC has SCGC3[USBHSPHY] */
+#  undef  KINETIS_SIM_HAS_SCGC3_USBHSDCD                  /* SoC has SCGC3[USBHSDCD] */
+#  define KINETIS_SIM_HAS_SCGC3_FLEXCAN1              1   /* SoC has SCGC3[FLEXCAN1] */
+#  define KINETIS_SIM_HAS_SCGC3_NFC                   1   /* SoC has SCGC3[NFC] */
+#  define KINETIS_SIM_HAS_SCGC3_SPI2                  1   /* SoC has SCGC3[SPI2] */
+#  define KINETIS_SIM_HAS_SCGC3_SAI1                  1    /* SoC has SCGC3[SAI1] */
+#  define KINETIS_SIM_HAS_SCGC3_SDHC                  1   /* SoC has SCGC3[SDHC] */
+#  define KINETIS_SIM_HAS_SCGC3_FTM2                  1   /* SoC has SCGC3[FTM2] */
+#  define KINETIS_SIM_HAS_SCGC3_FTM3                  1   /* SoC has SCGC3[FTM3] */
+#  define KINETIS_SIM_HAS_SCGC3_ADC1                  1   /* SoC has SCGC3[ADC1] */
+#  define KINETIS_SIM_HAS_SCGC3_ADC3                  1   /* SoC has SCGC3[ADC3] */
+#  undef  KINETIS_SIM_HAS_SCGC3_SLCD                      /* SoC has SCGC3[SLCD] */
+#  define KINETIS_SIM_HAS_SCGC4                       1   /* SoC has SCGC4 Register */
+#  define KINETIS_SIM_HAS_SCGC4_LLWU                  1   /* SoC has SCGC4[LLWU] clock gate */
+#  define KINETIS_SIM_HAS_SCGC4_UART0                 1   /* SoC has SCGC4[UART0] */
+#  define KINETIS_SIM_HAS_SCGC4_UART1                 1   /* SoC has SCGC4[UART1] */
+#  define KINETIS_SIM_HAS_SCGC4_UART2                 1   /* SoC has SCGC4[UART2] */
+#  define KINETIS_SIM_HAS_SCGC4_UART3                 1   /* SoC has SCGC4[UART3] */
+#  define KINETIS_SIM_HAS_SCGC5                       1   /* SoC has _SCGC5 Register */
+#  undef  KINETIS_SIM_HAS_SCGC5_REGFILE                   /* SoC has SCGC5[REGFILE] */
+#  define KINETIS_SIM_HAS_SCGC5_TSI                   1   /* SoC has SCGC5[TSI] */
+#  define KINETIS_SIM_HAS_SCGC5_PORTF                 1   /* SoC has SCGC5[PORTF] */
+#  define KINETIS_SIM_HAS_SCGC6                       1   /* SoC has SCGC6 Register */
+#  undef  KINETIS_SIM_HAS_SCGC6_FTFL                      /* SoC has SCGC6[FTFL] */
+#  define KINETIS_SIM_HAS_SCGC6_DMAMUX1               1   /* SoC has SCGC6[DEMUX1] */
+#  define KINETIS_SIM_HAS_SCGC6_USBHS                 1   /* SoC has SCGC6[USBHS] */
+#  define KINETIS_SIM_HAS_SCGC6_RNGA                  1   /* SoC has SCGC6[RNGA] */
+#  undef  KINETIS_SIM_HAS_SCGC6_FTM2                      /* SoC has SCGC6[FTM2] */
+#  define KINETIS_SIM_HAS_SCGC6_ADC2                  1   /* SoC has SCGC6[ADC2] */
+#  undef  KINETIS_SIM_HAS_SCGC6_DAC0                      /* SoC has SCGC6[DAC0] */
+#  define KINETIS_SIM_HAS_SCGC7                       1   /* SoC has SCGC7 Register */
+#  define KINETIS_SIM_HAS_SCGC7_FLEXBUS               1   /* SoC has SCGC7[FLEXBUS] */
+#  define KINETIS_SIM_HAS_SCGC7_DMA                   1   /* SoC has SCGC7[DMS] */
+#  define KINETIS_SIM_HAS_SCGC7_MPU                   1   /* SoC has SCGC7[MPU] */
+#  undef  KINETIS_SIM_HAS_SCGC7_SDRAMC                    /* SoC has SCGC7[SDRAMC] */
+#  define KINETIS_SIM_HAS_CLKDIV1                     1   /* SoC has CLKDIV1 Register */
+#  define KINETIS_SIM_HAS_CLKDIV1_OUTDIV2             1   /* SoC has CLKDIV1[OUTDIV2] */
+#  define KINETIS_SIM_HAS_CLKDIV1_OUTDIV3             1   /* SoC has CLKDIV1[OUTDIV3] */
+#  define KINETIS_SIM_HAS_CLKDIV1_OUTDIV4             1   /* SoC has CLKDIV1[OUTDIV4] */
+#  undef  KINETIS_SIM_HAS_CLKDIV1_OUTDIV5                 /* SoC has CLKDIV1[OUTDIV5] */
+#  define KINETIS_SIM_HAS_CLKDIV2                     1   /* SoC has CLKDIV2 Register */
+#  define KINETIS_SIM_HAS_CLKDIV2_USBDIV              1   /* SoC has CLKDIV2[USBDIV] */
+#  define KINETIS_SIM_HAS_CLKDIV2_USBFRAC             1   /* SoC has CLKDIV2[USBFRAC] */
+#  undef  KINETIS_SIM_HAS_CLKDIV2_USBFSDIV                /* SoC has CLKDIV2[USBFSDIV] */
+#  undef  KINETIS_SIM_HAS_CLKDIV2_USBFSFRAC               /* SoC has CLKDIV2[USBFSFRAC] */
+#  define KINETIS_SIM_HAS_CLKDIV2_USBHSDIV            1   /* SoC has CLKDIV2[USBHSDIV] */
+#  define KINETIS_SIM_HAS_CLKDIV2_USBHSFRAC           1   /* SoC has CLKDIV2[USBHSFRAC] */
+#  undef  KINETIS_SIM_HAS_CLKDIV2_I2SDIV                  /* SoC has CLKDIV2[I2SDIV] */
+#  undef  KINETIS_SIM_HAS_CLKDIV2_I2SFRAC                 /* SoC has CLKDIV2[I2SFRAC] */
+#  define KINETIS_SIM_HAS_FCFG1                       1   /* SoC has FCFG1 Register */
+#  define KINETIS_SIM_HAS_FCFG1_DEPART                1   /* SoC has FCFG1[DEPART] */
+#  define KINETIS_SIM_HAS_FCFG1_EESIZE                1   /* SoC has FCFG1[EESIZE] */
+#  undef  KINETIS_SIM_HAS_FCFG1_FLASHDIS                  /* SoC has FCFG1[FLASHDIS] */
+#  undef  KINETIS_SIM_HAS_FCFG1_FLASHDOZE                 /* SoC has FCFG1[FLASHDOZE] */
+#  define KINETIS_SIM_HAS_FCFG1_FTFDIS                1   /* SoC has FCFG1[FTFDIS] */
+#  define KINETIS_SIM_HAS_FCFG1_NVMSIZE               1   /* SoC has FCFG1[NVMSIZE] */
+#  define KINETIS_SIM_HAS_FCFG2                       1   /* SoC has FCFG2 Register */
+#  define KINETIS_SIM_HAS_FCFG2_MAXADDR0              6   /* SoC has n bit of FCFG2[MAXADDR0] */
+#  define KINETIS_SIM_HAS_FCFG2_MAXADDR1              6   /* SoC has n bit of FCFG2[MAXADDR1] */
+#  define KINETIS_SIM_HAS_FCFG2_PFLSH                 1   /* SoC has FCFG2[PFLSH] */
+#  define KINETIS_SIM_HAS_FCFG2_SWAPPFLSH             1   /* SoC has FCFG2[SWAPPFLSH] */
+#  define KINETIS_SIM_HAS_UIDH                        1   /* SoC has UIDH Register */
+#  define KINETIS_SIM_HAS_UIDMH                       1   /* SoC has UIDMH Register */
+#  define KINETIS_SIM_HAS_UIDML                       1   /* SoC has UIDML Register */
+#  define KINETIS_SIM_HAS_UIDL                        1   /* SoC has UIDL Register */
+#  undef  KINETIS_SIM_HAS_CLKDIV3                         /* SoC has CLKDIV3 Register */
+#  undef  KINETIS_SIM_HAS_CLKDIV3_PLLFLLDIV               /* SoC has CLKDIV3[PLLFLLDIV] */
+#  undef  KINETIS_SIM_HAS_CLKDIV3_PLLFLLFRAC              /* SoC has CLKDIV3[PLLFLLFRAC] */
+#  define KINETIS_SIM_HAS_CLKDIV4                     1   /* SoC has CLKDIV4 Register */
+#  define KINETIS_SIM_HAS_CLKDIV4_TRACEDIV            1   /* SoC has CLKDIV4[TRACEDIV] */
+#  define KINETIS_SIM_HAS_CLKDIV4_TRACEFRAC           1   /* SoC has CLKDIV4[TRACEFRAC] */
+#  define KINETIS_SIM_HAS_CLKDIV4_NFCDIV              1   /* SoC has CLKDIV4[NFCDIV] */
+#  define KINETIS_SIM_HAS_CLKDIV4_NFCFRAC             1   /* SoC has CLKDIV4[NFCFRAC] */
+#  define KINETIS_SIM_HAS_MCR                         1   /* SoC has MCR Register */
+
+#elif defined(CONFIG_ARCH_CHIP_MK64FN1M0VLL12) || defined(CONFIG_ARCH_CHIP_MK64FX512VLL12) || \
+      defined(CONFIG_ARCH_CHIP_MK64FX512VDC12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VDC12) || \
+      defined(CONFIG_ARCH_CHIP_MK64FX512VLQ12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VLQ12) || \
+      defined(CONFIG_ARCH_CHIP_MK64FX512VMD12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VMD12)
+
+/* Verified to Document Number: K64P144M120SF5RM Rev. 2, January 2014 */
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_04
+
+/* SIM Register Configuration */
+
+#  define KINETIS_SIM_HAS_SOPT1                       1   /* SoC has SOPT1 Register */
+#  undef  KINETIS_SIM_HAS_SOPT1_OSC32KOUT                 /* SoC has SOPT1[OSC32KOUT] */
+#  define KINETIS_SIM_HAS_SOPT1_OSC32KSEL             1   /* SoC has SOPT1[OSC32KSEL] */
+#  define KINETIS_SIM_HAS_SOPT1_OSC32KSEL_BITS        2   /* SoC has 2 bits of SOPT1[OSC32KSEL] */
+#  define KINETIS_SIM_HAS_SOPT1_RAMSIZE               1   /* SoC has SOPT1[RAMSIZE] */
+#  define KINETIS_SIM_HAS_SOPT1_USBREGEN              1   /* SoC has SOPT1[USBREGEN] */
+#  define KINETIS_SIM_HAS_SOPT1_USBSSTBY              1   /* SoC has SOPT1[USBSSTBY] */
+#  define KINETIS_SIM_HAS_SOPT1_USBVSTBY              1   /* SoC has SOPT1[USBVSTBY] */
+#  define KINETIS_SIM_HAS_SOPT1CFG                        /* SoC has SOPT1CFG Register */
+#  define KINETIS_SIM_HAS_SOPT1CFG_URWE               1   /* SoC has SOPT1CFG[URWE] */
+#  define KINETIS_SIM_HAS_SOPT1CFG_USSWE              1   /* SoC has SOPT1CFG[USSWE] */
+#  define KINETIS_SIM_HAS_SOPT1CFG_UVSWE              1   /* SoC has SOPT1CFG[UVSWE] */
+#  undef  KINETIS_SIM_HAS_USBPHYCTL                       /* SoC has USBPHYCTL Register */
+#  undef  KINETIS_SIM_HAS_USBPHYCTL_USB3VOUTTRG           /* SoC has USBPHYCTL[USB3VOUTTRG] */
+#  undef  KINETIS_SIM_HAS_USBPHYCTL_USBDISILIM            /* SoC has USBPHYCTL[USBDISILIM] */
+#  undef  KINETIS_SIM_HAS_USBPHYCTL_USBVREGPD             /* SoC has USBPHYCTL[USBVREGPD] */
+#  undef  KINETIS_SIM_HAS_USBPHYCTL_USBVREGSEL            /* SoC has USBPHYCTL[USBVREGSEL] */
+#  define KINETIS_SIM_HAS_SOPT2                       1   /* SoC has SOPT2 Register */
+#  define KINETIS_SIM_HAS_SOPT2_FBSL                  1   /* SoC has SOPT2[FBSL] */
+#  undef  KINETIS_SIM_HAS_SOPT2_CMTUARTPAD                /* SoC has SOPT2[CMTUARTPAD] */
+#  define KINETIS_SIM_HAS_SOPT2_FLEXIOSRC             1   /* SoC has SOPT2[FLEXIOSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT2_LPUARTSRC                 /* SoC has SOPT2[LPUARTSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_PLLFLLSEL             1   /* SoC has SOPT2[PLLFLLSEL] */
+#  define KINETIS_SIM_HAS_SOPT2_PLLFLLSEL_BITS        2   /* SoC has 2 bits of SOPT2[PLLFLLSEL] */
+#  define KINETIS_SIM_HAS_SOPT2_PTD7PAD               1   /* SoC has SOPT2[PTD7PAD] */
+#  define KINETIS_SIM_HAS_SOPT2_RMIISRC               1   /* SoC has SOPT2[RMIISRC] */
+#  define KINETIS_SIM_HAS_SOPT2_RTCCLKOUTSEL          1   /* SoC has SOPT2[RTCCLKOUTSEL] */
+#  define KINETIS_SIM_HAS_SOPT2_CLKOUTSEL             1   /* SoC has SOPT2[CLKOUTSEL] */
+#  define KINETIS_SIM_HAS_SOPT2_SDHCSRC               1   /* SoC has SOPT2[SDHCSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT2_NFCSRC                    /* SoC has SOPT2[NFCSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT2_I2SSRC                    /* SoC has SOPT2[I2SSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_TIMESRC               1   /* SoC has SOPT2[TIMESRC] */
+#  undef  KINETIS_SIM_HAS_SOPT2_TPMSRC                    /* SoC has SOPT2[TPMSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT2_USBFSRC                   /* SoC has SOPT2[USBFSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_TRACECLKSEL           1   /* SoC has SOPT2[TRACECLKSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT2_USBREGEN                  /* SoC has SOPT2[USBREGEN] */
+#  undef  KINETIS_SIM_HAS_SOPT2_USBSLSRC                  /* SoC has SOPT2[USBSLSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT2_USBHSRC                   /* SoC has SOPT2[USBHSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_USBSRC                1   /* SoC has SOPT2[USBSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT2_MCGCLKSEL                 /* SoC has SOPT2[MCGCLKSEL] */
+#  define KINETIS_SIM_HAS_SOPT4                       1   /* SoC has SOPT4 Register */
+#  define KINETIS_SIM_HAS_SOPT4_FTM0FLT0              1   /* SoC has SOPT4[FTM0FLT0] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM0FLT1              1   /* SoC has SOPT4[FTM0FLT1] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM0FLT2              1   /* SoC has SOPT4[FTM0FLT2] */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM0FLT3                  /* SoC has SOPT4[FTM0FLT3] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM0TRG0SRC           1   /* SoC has SOPT4[FTM0TRG0SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM0TRG1SRC           1   /* SoC has SOPT4[FTM0TRG1SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM1CH0SRC            3   /* SoC has SOPT4[FTM1CH0SRC] 1, 3 if SOF */
+#  define KINETIS_SIM_HAS_SOPT4_FTM1FLT0              1   /* SoC has SOPT4[FTM1FLT0] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM1FLT1              1   /* SoC has SOPT4[FTM1FLT1] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM1FLT2              1   /* SoC has SOPT4[FTM1FLT2] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM1FLT3              1   /* SoC has SOPT4[FTM1FLT3] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM2CH0SRC            1   /* SoC has SOPT4[FTM2CH0SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM2CH1SRC                /* SoC has SOPT4[FTM2CH1SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM2FLT0              1   /* SoC has SOPT4[FTM2FLT0] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM2FLT1              1   /* SoC has SOPT4[FTM2FLT1] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM2FLT2              1   /* SoC has SOPT4[FTM2FLT2] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM2FLT3              1   /* SoC has SOPT4[FTM2FLT3] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM3CH0SRC            1   /* SoC has SOPT4[FTM3CH0SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM3FLT0              1   /* SoC has SOPT4[FTM3FLT0] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM3FLT1              1   /* SoC has SOPT4[FTM3FLT1] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM3FLT2              1   /* SoC has SOPT4[FTM3FLT2] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM3FLT3              1   /* SoC has SOPT4[FTM3FLT3] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM3TRG0SRC           1   /* SoC has SOPT4[FTM3TRG0SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM3TRG1SRC           1   /* SoC has SOPT4[FTM3TRG1SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_TPM0CLKSEL            1   /* SoC has SOPT4[TPM0CLKSEL] */
+#  define KINETIS_SIM_HAS_SOPT4_TPM1CH0SRC            1   /* SoC has SOPT4[TPM1CH0SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_TPM1CLKSEL            1   /* SoC has SOPT4[TPM1CLKSEL] */
+#  define KINETIS_SIM_HAS_SOPT4_TPM2CH0SRC            1   /* SoC has SOPT4[TPM2CH0SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_TPM2CLKSEL            1   /* SoC has SOPT4[TPM2CLKSEL] */
+#  define KINETIS_SIM_HAS_SOPT5                       1   /* SoC has SOPT5 Register */
+#  undef  KINETIS_SIM_HAS_SOPT5_LPUART0RXSRC              /* SoC has SOPT5[LPUART0RXSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT5_LPUART0TXSRC              /* SoC has SOPT5[LPUART0TXSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT6                           /* SoC has SOPT6 Register */
+#  undef  KINETIS_SIM_HAS_SOPT6_MCC                       /* SoC has SOPT6[MCC] */
+#  undef  KINETIS_SIM_HAS_SOPT6_PCR                       /* SoC has SOPT6[PCR] */
+#  undef  KINETIS_SIM_HAS_SOPT6_RSTFLTSEL                 /* SoC has SOPT6[RSTFLTSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT6_RSTFLTEN                  /* SoC has SOPT6[RSTFLTEN] */
+#  define KINETIS_SIM_HAS_SOPT7                       1   /* SoC has SOPT7 Register */
+#  define KINETIS_SIM_HAS_SOPT7_ADC0ALTTRGSEL         1   /* SoC has SOPT7[ADC0ALTTRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC1ALTTRGSEL         1   /* SoC has SOPT7[ADC1ALTTRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC0PRETRGSEL         1   /* SoC has SOPT7[ADC0PRETRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC1PRETRGSEL         1   /* SoC has SOPT7[ADC1PRETRGSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT7_ADC2PRETRGSEL             /* SoC has SOPT7[ADC2PRETRGSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT7_ADC3PRETRGSEL             /* SoC has SOPT7[ADC3PRETRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC0TRGSEL            14  /* SoC has 10 SOPT7[ADC0TRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC1TRGSEL            14  /* SoC has 10 SOPT7[ADC1TRGSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT7_ADC2TRGSEL                /* SoC has 10 SOPT7[ADC2TRGSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT7_ADC3TRGSEL                /* SoC has 10 SOPT7[ADC3TRGSEL] */
+#  define KINETIS_SIM_SOPT7_ADC0ALTTRGEN              1   /* ADC0 alternate trigger enable */
+#  define KINETIS_SIM_SOPT7_ADC1ALTTRGEN              1   /* ADC1 alternate trigger enable */
+#  undef  KINETIS_SIM_SOPT7_ADC2ALTTRGEN                  /* ADC2 alternate trigger enable */
+#  undef  KINETIS_SIM_SOPT7_ADC3ALTTRGEN                  /* ADC3 alternate trigger enable */
+#  undef  KINETIS_SIM_HAS_SOPT8                           /* SoC has SOPT8 Register */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM0SYNCBIT               /* SoC has SOPT8[FTM0SYNCBIT] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM1SYNCBIT               /* SoC has SOPT8[FTM1SYNCBIT] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM2SYNCBIT               /* SoC has SOPT8[FTM2SYNCBIT] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM3SYNCBIT               /* SoC has SOPT8[FTM3SYNCBIT] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM0OCH0SRC               /* SoC has SOPT8[FTM0OCH0SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM0OCH1SRC               /* SoC has SOPT8[FTM0OCH1SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM0OCH2SRC               /* SoC has SOPT8[FTM0OCH2SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM0OCH3SRC               /* SoC has SOPT8[FTM0OCH3SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM0OCH4SRC               /* SoC has SOPT8[FTM0OCH4SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM0OCH5SRC               /* SoC has SOPT8[FTM0OCH5SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM0OCH6SRC               /* SoC has SOPT8[FTM0OCH6SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM0OCH7SRC               /* SoC has SOPT8[FTM0OCH7SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM3OCH0SRC               /* SoC has SOPT8[FTM3OCH0SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM3OCH1SRC               /* SoC has SOPT8[FTM3OCH1SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM3OCH2SRC               /* SoC has SOPT8[FTM3OCH2SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM3OCH3SRC               /* SoC has SOPT8[FTM3OCH3SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM3OCH4SRC               /* SoC has SOPT8[FTM3OCH4SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM3OCH5SRC               /* SoC has SOPT8[FTM3OCH5SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM3OCH6SRC               /* SoC has SOPT8[FTM3OCH6SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT8_FTM3OCH7SRC               /* SoC has SOPT8[FTM3OCH7SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT9                           /* SoC has SOPT9 Register */
+#  undef  KINETIS_SIM_HAS_SOPT9_TPM1CH0SRC                /* SoC has SOPT9[TPM1CH0SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT9_TPM2CH0SRC                /* SoC has SOPT9[TPM2CH0SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT9_TPM1CLKSEL                /* SoC has SOPT9[TPM1CLKSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT9_TPM2CLKSEL                /* SoC has SOPT9[TPM2CLKSEL] */
+#  define KINETIS_SIM_HAS_SDID                        1   /* SoC has SDID Register */
+#  define KINETIS_SIM_HAS_SDID_DIEID                  1   /* SoC has SDID[DIEID] */
+#  define KINETIS_SIM_HAS_SDID_FAMID                  1   /* SoC has SDID[FAMID] */
+#  define KINETIS_SIM_HAS_SDID_FAMILYID               1   /* SoC has SDID[FAMILYID] */
+#  define KINETIS_SIM_HAS_SDID_SERIESID               1   /* SoC has SDID[SERIESID] */
+#  undef  KINETIS_SIM_HAS_SDID_SRAMSIZE                   /* SoC has SDID[SRAMSIZE] */
+#  define KINETIS_SIM_HAS_SDID_SUBFAMID               1   /* SoC has SDID[SUBFAMID] */
+#  define KINETIS_SIM_HAS_SCGC1                       1   /* SoC has _SCGC1 Register */
+#  define KINETIS_SIM_HAS_SCGC1_UART5                 1   /* SoC has SCGC1[UART5] */
+#  define KINETIS_SIM_HAS_SCGC1_UART4                 1   /* SoC has SCGC1[UART4] */
+#  undef  KINETIS_SIM_HAS_SCGC1_I2C3                      /* SoC has SCGC1[I2C3] */
+#  define KINETIS_SIM_HAS_SCGC1_I2C2                  1   /* SoC has SCGC1[I2C2] */
+#  undef  KINETIS_SIM_HAS_SCGC1_OSC1                      /* SoC has SCGC1[OSC1] */
+#  define KINETIS_SIM_HAS_SCGC2                       1   /* SoC has _SCGC2 Register */
+#  define KINETIS_SIM_HAS_SCGC2                       1   /* SoC has SCGC2 Register */
+#  define KINETIS_SIM_HAS_SCGC2_ENET                  1   /* SoC has SCGC2[ENET] */
+#  undef  KINETIS_SIM_HAS_SCGC2_LPUART0                   /* SoC has SCGC2[LPUART0] */
+#  undef  KINETIS_SIM_HAS_SCGC2_TPM1                      /* SoC has SCGC2[TPM1] */
+#  undef  KINETIS_SIM_HAS_SCGC2_TPM2                      /* SoC has SCGC2[TPM2] */
+#  define KINETIS_SIM_HAS_SCGC3                       1   /* SoC has SCGC3 Register */
+#  define KINETIS_SIM_HAS_SCGC3_RNGA                  1   /* SoC has SCGC3[RNGA] */
+#  undef  KINETIS_SIM_HAS_SCGC3_USBHS                     /* SoC has SCGC3[USBHS] */
+#  undef  KINETIS_SIM_HAS_SCGC3_USBHSPHY                  /* SoC has SCGC3[USBHSPHY] */
+#  undef  KINETIS_SIM_HAS_SCGC3_USBHSDCD                  /* SoC has SCGC3[USBHSDCD] */
+#  undef  KINETIS_SIM_HAS_SCGC3_FLEXCAN1                  /* SoC has SCGC3[FLEXCAN1] */
+#  undef  KINETIS_SIM_HAS_SCGC3_NFC                       /* SoC has SCGC3[NFC] */
+#  define KINETIS_SIM_HAS_SCGC3_SPI2                  1   /* SoC has SCGC3[SPI2] */
+#  undef  KINETIS_SIM_HAS_SCGC3_SAI1                      /* SoC has SCGC3[SAI1] */
+#  define KINETIS_SIM_HAS_SCGC3_SDHC                  1   /* SoC has SCGC3[SDHC] */
+#  define KINETIS_SIM_HAS_SCGC3_FTM2                  1   /* SoC has SCGC3[FTM2] */
+#  define KINETIS_SIM_HAS_SCGC3_FTM3                  1   /* SoC has SCGC3[FTM3] */
+#  define KINETIS_SIM_HAS_SCGC3_ADC1                  1   /* SoC has SCGC3[ADC1] */
+#  undef  KINETIS_SIM_HAS_SCGC3_ADC3                      /* SoC has SCGC3[ADC3] */
+#  undef  KINETIS_SIM_HAS_SCGC3_SLCD                      /* SoC has SCGC3[SLCD] */
+#  define KINETIS_SIM_HAS_SCGC4                       1   /* SoC has SCGC4 Register */
+#  undef  KINETIS_SIM_HAS_SCGC4_LLWU                      /* SoC has SCGC4[LLWU] clock gate */
+#  define KINETIS_SIM_HAS_SCGC4_UART0                 1   /* SoC has SCGC4[UART0] */
+#  define KINETIS_SIM_HAS_SCGC4_UART1                 1   /* SoC has SCGC4[UART1] */
+#  define KINETIS_SIM_HAS_SCGC4_UART2                 1   /* SoC has SCGC4[UART2] */
+#  define KINETIS_SIM_HAS_SCGC4_UART3                 1   /* SoC has SCGC4[UART3] */
+#  define KINETIS_SIM_HAS_SCGC5                       1   /* SoC has _SCGC5 Register */
+#  undef  KINETIS_SIM_HAS_SCGC5_REGFILE                   /* SoC has SCGC5[REGFILE] */
+#  undef  KINETIS_SIM_HAS_SCGC5_TSI                       /* SoC has SCGC5[TSI] */
+#  undef  KINETIS_SIM_HAS_SCGC5_PORTF                     /* SoC has SCGC5[PORTF] */
+#  define KINETIS_SIM_HAS_SCGC6                       1   /* SoC has SCGC6 Register */
+#  define KINETIS_SIM_HAS_SCGC6_FTFL                  1   /* SoC has SCGC6[FTFL] */
+#  undef  KINETIS_SIM_HAS_SCGC6_DMAMUX1                   /* SoC has SCGC6[DEMUX1] */
+#  undef  KINETIS_SIM_HAS_SCGC6_USBHS                     /* SoC has SCGC6[USBHS] */
+#  define KINETIS_SIM_HAS_SCGC6_RNGA                  1   /* SoC has SCGC6[RNGA] */
+#  define KINETIS_SIM_HAS_SCGC6_FTM2                  1   /* SoC has SCGC6[FTM2] */
+#  undef  KINETIS_SIM_HAS_SCGC6_ADC2                      /* SoC has SCGC6[ADC2] */
+#  define KINETIS_SIM_HAS_SCGC6_DAC0                  1   /* SoC has SCGC6[DAC0] */
+#  define KINETIS_SIM_HAS_SCGC7                       1   /* SoC has SCGC7 Register */
+#  define KINETIS_SIM_HAS_SCGC7_FLEXBUS               1   /* SoC has SCGC7[FLEXBUS] */
+#  define KINETIS_SIM_HAS_SCGC7_DMA                   1   /* SoC has SCGC7[DMS] */
+#  define KINETIS_SIM_HAS_SCGC7_MPU                   1   /* SoC has SCGC7[MPU] */
+#  undef  KINETIS_SIM_HAS_SCGC7_SDRAMC                    /* SoC has SCGC7[SDRAMC] */
+#  define KINETIS_SIM_HAS_CLKDIV1                     1   /* SoC has CLKDIV1 Register */
+#  define KINETIS_SIM_HAS_CLKDIV1_OUTDIV2             1   /* SoC has CLKDIV1[OUTDIV2] */
+#  define KINETIS_SIM_HAS_CLKDIV1_OUTDIV3             1   /* SoC has CLKDIV1[OUTDIV3] */
+#  define KINETIS_SIM_HAS_CLKDIV1_OUTDIV4             1   /* SoC has CLKDIV1[OUTDIV4] */
+#  undef  KINETIS_SIM_HAS_CLKDIV1_OUTDIV5                 /* SoC has CLKDIV1[OUTDIV5] */
+#  define KINETIS_SIM_HAS_CLKDIV2                     1   /* SoC has CLKDIV2 Register */
+#  define KINETIS_SIM_HAS_CLKDIV2_USBDIV              1   /* SoC has CLKDIV2[USBDIV] */
+#  define KINETIS_SIM_HAS_CLKDIV2_USBFRAC             1   /* SoC has CLKDIV2[USBFRAC] */
+#  undef  KINETIS_SIM_HAS_CLKDIV2_USBFSDIV                /* SoC has CLKDIV2[USBFSDIV] */
+#  undef  KINETIS_SIM_HAS_CLKDIV2_USBFSFRAC               /* SoC has CLKDIV2[USBFSFRAC] */
+#  undef  KINETIS_SIM_HAS_CLKDIV2_USBHSDIV                /* SoC has CLKDIV2[USBHSDIV] */
+#  undef  KINETIS_SIM_HAS_CLKDIV2_USBHSFRAC               /* SoC has CLKDIV2[USBHSFRAC] */
+#  undef  KINETIS_SIM_HAS_CLKDIV2_I2SDIV                  /* SoC has CLKDIV2[I2SDIV] */
+#  undef  KINETIS_SIM_HAS_CLKDIV2_I2SFRAC                 /* SoC has CLKDIV2[I2SFRAC] */
+#  define KINETIS_SIM_HAS_FCFG1                       1   /* SoC has FCFG1 Register */
+#  define KINETIS_SIM_HAS_FCFG1_DEPART                1   /* SoC has FCFG1[DEPART] */
+#  define KINETIS_SIM_HAS_FCFG1_EESIZE                1   /* SoC has FCFG1[EESIZE] */
+#  define KINETIS_SIM_HAS_FCFG1_FLASHDIS              1   /* SoC has FCFG1[FLASHDIS] */
+#  define KINETIS_SIM_HAS_FCFG1_FLASHDOZE             1   /* SoC has FCFG1[FLASHDOZE] */
+#  undef  KINETIS_SIM_HAS_FCFG1_FTFDIS                    /* SoC has FCFG1[FTFDIS] */
+#  define KINETIS_SIM_HAS_FCFG1_NVMSIZE               1   /* SoC has FCFG1[NVMSIZE] */
+#  define KINETIS_SIM_HAS_FCFG2                       1   /* SoC has FCFG2 Register */
+#  define KINETIS_SIM_HAS_FCFG2_MAXADDR0              7   /* SoC has n bit of FCFG2[MAXADDR0] */
+#  define KINETIS_SIM_HAS_FCFG2_MAXADDR1              7   /* SoC has n bit of FCFG2[MAXADDR1] */
+#  define KINETIS_SIM_HAS_FCFG2_PFLSH                 1   /* SoC has FCFG2[PFLSH] */
+#  undef  KINETIS_SIM_HAS_FCFG2_SWAPPFLSH                 /* SoC has FCFG2[SWAPPFLSH] */
+#  define KINETIS_SIM_HAS_UIDH                        1   /* SoC has UIDH Register */
+#  define KINETIS_SIM_HAS_UIDMH                       1   /* SoC has UIDMH Register */
+#  define KINETIS_SIM_HAS_UIDML                       1   /* SoC has UIDML Register */
+#  define KINETIS_SIM_HAS_UIDL                        1   /* SoC has UIDL Register */
+#  undef  KINETIS_SIM_HAS_CLKDIV3                         /* SoC has CLKDIV3 Register */
+#  undef  KINETIS_SIM_HAS_CLKDIV3_PLLFLLDIV               /* SoC has CLKDIV3[PLLFLLDIV] */
+#  undef  KINETIS_SIM_HAS_CLKDIV3_PLLFLLFRAC              /* SoC has CLKDIV3[PLLFLLFRAC] */
+#  undef  KINETIS_SIM_HAS_CLKDIV4                         /* SoC has CLKDIV4 Register */
+#  undef  KINETIS_SIM_HAS_CLKDIV4_TRACEDIV                /* SoC has CLKDIV4[TRACEDIV] */
+#  undef  KINETIS_SIM_HAS_CLKDIV4_TRACEFRAC               /* SoC has CLKDIV4[TRACEFRAC] */
+#  undef  KINETIS_SIM_HAS_CLKDIV4_NFCDIV                  /* SoC has CLKDIV4[NFCDIV] */
+#  undef  KINETIS_SIM_HAS_CLKDIV4_NFCFRAC                 /* SoC has CLKDIV4[NFCFRAC] */
+#  undef  KINETIS_SIM_HAS_MCR                             /* SoC has MCR Register */
+
+/* MK66F N/X 1M0/2M0 V MD/LQ 18
+ *
+ *  --------------- ------- --- ------- ------- ------ ------ ------ -----
+ *  PART NUMBER     CPU     PIN PACKAGE  TOTAL  PROGRAM EEPROM SRAM  GPIO
+ *                  FREQ    CNT          FLASH  FLASH
+ *  --------------- ------- --- ------- ------- ------ ------ ------ -----
+ *  MK66FN2M0VMD18  180 MHz 144 MAPBGA   2   MB    —    — KB  260 KB 100
+ *  MK66FX1M0VMD18  180 MHz 144 MAPBGA  1.25 MB  1 MB   4 KB  256 KB 100
+ *  MK66FN2M0VLQ18  180 MHz 144 LQFP     2   MB    —    — KB  260 KB 100
+ *  MK66FX1M0VLQ18  180 MHz 144 LQFP    1.25 MB  1 MB   4 KB  256 KB 100
+ */
+
+#elif defined(CONFIG_ARCH_CHIP_MK66FN2M0VMD18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VMD18) || \
+      defined(CONFIG_ARCH_CHIP_MK66FN2M0VLQ18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VLQ18)
+
+/* Verified to Document Number: Document Number: K66P144M180SF5RMV2 Rev. 2, May 2015 */
+
+#  define KINETIS_SIM_VERSION KINETIS_SIM_VERSION_06
+
+/* SIM Register Configuration */
+
+#  define KINETIS_SIM_HAS_SOPT1                       1   /* SoC has SOPT1 Register */
+#  undef  KINETIS_SIM_HAS_SOPT1_OSC32KOUT                 /* SoC has SOPT1[OSC32KOUT] */
+#  define KINETIS_SIM_HAS_SOPT1_OSC32KSEL             1   /* SoC has SOPT1[OSC32KSEL] */
+#  define KINETIS_SIM_HAS_SOPT1_OSC32KSEL_BITS        2   /* SoC has 1 bit SOPT1[OSC32KSEL] */
+#  define KINETIS_SIM_HAS_SOPT1_RAMSIZE               1   /* SoC has SOPT1[RAMSIZE] */
+#  define KINETIS_SIM_HAS_SOPT1_USBREGEN              1   /* SoC has SOPT1[USBREGEN] */
+#  define KINETIS_SIM_HAS_SOPT1_USBSSTBY              1   /* SoC has SOPT1[USBSSTBY] */
+#  define KINETIS_SIM_HAS_SOPT1_USBVSTBY              1   /* SoC has SOPT1[USBVSTBY] */
+#  define KINETIS_SIM_HAS_SOPT1CFG                        /* SoC has SOPT1CFG Register */
+#  define KINETIS_SIM_HAS_SOPT1CFG_URWE               1   /* SoC has SOPT1CFG[URWE] */
+#  define KINETIS_SIM_HAS_SOPT1CFG_USSWE              1   /* SoC has SOPT1CFG[USSWE] */
+#  define KINETIS_SIM_HAS_SOPT1CFG_UVSWE              1   /* SoC has SOPT1CFG[UVSWE] */
+#  define KINETIS_SIM_HAS_USBPHYCTL                   1   /* SoC has USBPHYCTL Register */
+#  define KINETIS_SIM_HAS_USBPHYCTL_USB3VOUTTRG       1   /* SoC has USBPHYCTL[USB3VOUTTRG] */
+#  define KINETIS_SIM_HAS_USBPHYCTL_USBDISILIM        1   /* SoC has USBPHYCTL[USBDISILIM] */
+#  define KINETIS_SIM_HAS_USBPHYCTL_USBVREGPD         1   /* SoC has USBPHYCTL[USBVREGPD] */
+#  define KINETIS_SIM_HAS_USBPHYCTL_USBVREGSEL        1   /* SoC has USBPHYCTL[USBVREGSEL] */
+#  define KINETIS_SIM_HAS_SOPT2                       1   /* SoC has SOPT2 Register */
+#  define KINETIS_SIM_HAS_SOPT2_FBSL                  1   /* SoC has SOPT2[FBSL] */
+#  undef  KINETIS_SIM_HAS_SOPT2_CMTUARTPAD                /* SoC has SOPT2[CMTUARTPAD] */
+#  define KINETIS_SIM_HAS_SOPT2_FLEXIOSRC             1   /* SoC has SOPT2[FLEXIOSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_LPUARTSRC             1   /* SoC has SOPT2[LPUARTSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_PLLFLLSEL             1   /* SoC has SOPT2[PLLFLLSEL] */
+#  define KINETIS_SIM_HAS_SOPT2_PLLFLLSEL_BITS        2   /* SoC has 2 bits of SOPT2[PLLFLLSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT2_PTD7PAD                   /* SoC has SOPT2[PTD7PAD] */
+#  define KINETIS_SIM_HAS_SOPT2_RMIISRC               1   /* SoC has SOPT2[RMIISRC] */
+#  define KINETIS_SIM_HAS_SOPT2_RTCCLKOUTSEL          1   /* SoC has SOPT2[RTCCLKOUTSEL] */
+#  define KINETIS_SIM_HAS_SOPT2_CLKOUTSEL             1   /* SoC has SOPT2[CLKOUTSEL] */
+#  define KINETIS_SIM_HAS_SOPT2_SDHCSRC               1   /* SoC has SOPT2[SDHCSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT2_NFCSRC                    /* SoC has SOPT2[NFCSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT2_I2SSRC                    /* SoC has SOPT2[I2SSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_TIMESRC               1   /* SoC has SOPT2[TIMESRC] */
+#  define KINETIS_SIM_HAS_SOPT2_TPMSRC                1   /* SoC has SOPT2[TPMSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT2_USBFSRC                   /* SoC has SOPT2[USBFSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_TRACECLKSEL           1   /* SoC has SOPT2[TRACECLKSEL] */
+#  define KINETIS_SIM_HAS_SOPT2_USBREGEN              1   /* SoC has SOPT2[USBREGEN] */
+#  define KINETIS_SIM_HAS_SOPT2_USBSLSRC              1   /* SoC has SOPT2[USBSLSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT2_USBHSRC                   /* SoC has SOPT2[USBHSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_USBSRC                1   /* SoC has SOPT2[USBSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT2_MCGCLKSEL                 /* SoC has SOPT2[MCGCLKSEL] */
+#  define KINETIS_SIM_HAS_SOPT4                       1   /* SoC has SOPT4 Register */
+#  define KINETIS_SIM_HAS_SOPT4_FTM0FLT0              1   /* SoC has SOPT4[FTM0FLT0] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM0FLT1              1   /* SoC has SOPT4[FTM0FLT1] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM0FLT2              1   /* SoC has SOPT4[FTM0FLT2] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM0FLT3              1   /* SoC has SOPT4[FTM0FLT3] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM0TRG0SRC           1   /* SoC has SOPT4[FTM0TRG0SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM0TRG1SRC           1   /* SoC has SOPT4[FTM0TRG1SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM1CH0SRC            3   /* SoC has SOPT4[FTM1CH0SRC] 1, 3 if SOF */
+#  define KINETIS_SIM_HAS_SOPT4_FTM1FLT0              1   /* SoC has SOPT4[FTM1FLT0] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM1FLT1              1   /* SoC has SOPT4[FTM1FLT1] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM1FLT2              1   /* SoC has SOPT4[FTM1FLT2] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM1FLT3              1   /* SoC has SOPT4[FTM1FLT3] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM2CH0SRC            1   /* SoC has SOPT4[FTM2CH0SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM2CH1SRC            1   /* SoC has SOPT4[FTM2CH1SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM2FLT0              1   /* SoC has SOPT4[FTM2FLT0] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM2FLT1              1   /* SoC has SOPT4[FTM2FLT1] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM2FLT2              1   /* SoC has SOPT4[FTM2FLT2] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM2FLT3              1   /* SoC has SOPT4[FTM2FLT3] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM3CH0SRC            1   /* SoC has SOPT4[FTM3CH0SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM3FLT0              1   /* SoC has SOPT4[FTM3FLT0] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM3FLT1              1   /* SoC has SOPT4[FTM3FLT1] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM3FLT2              1   /* SoC has SOPT4[FTM3FLT2] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM3FLT3              1   /* SoC has SOPT4[FTM3FLT3] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM3TRG0SRC           1   /* SoC has SOPT4[FTM3TRG0SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM3TRG1SRC           1   /* SoC has SOPT4[FTM3TRG1SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_TPM0CLKSEL            1   /* SoC has SOPT4[TPM0CLKSEL] */
+#  define KINETIS_SIM_HAS_SOPT4_TPM1CH0SRC            1   /* SoC has SOPT4[TPM1CH0SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_TPM1CLKSEL            1   /* SoC has SOPT4[TPM1CLKSEL] */
+#  define KINETIS_SIM_HAS_SOPT4_TPM2CH0SRC            1   /* SoC has SOPT4[TPM2CH0SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_TPM2CLKSEL            1   /* SoC has SOPT4[TPM2CLKSEL] */
+#  define KINETIS_SIM_HAS_SOPT5                       1   /* SoC has SOPT5 Register */
+#  define KINETIS_SIM_HAS_SOPT5_LPUART0RXSRC          1   /* SoC has SOPT5[LPUART0RXSRC] */
+#  define KINETIS_SIM_HAS_SOPT5_LPUART0TXSRC          1   /* SoC has SOPT5[LPUART0TXSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT6                           /* SoC has SOPT6 Register */
+#  undef  KINETIS_SIM_HAS_SOPT6_MCC                       /* SoC has SOPT6[MCC] */
+#  undef  KINETIS_SIM_HAS_SOPT6_PCR                       /* SoC has SOPT6[PCR] */
+#  undef  KINETIS_SIM_HAS_SOPT6_RSTFLTSEL                 /* SoC has SOPT6[RSTFLTSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT6_RSTFLTEN                  /* SoC has SOPT6[RSTFLTEN] */
+#  define KINETIS_SIM_HAS_SOPT7                       1   /* SoC has SOPT7 Register */
+#  define KINETIS_SIM_HAS_SOPT7_ADC0ALTTRGSEL         1   /* SoC has SOPT7[ADC0ALTTRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC1ALTTRGSEL         1   /* SoC has SOPT7[ADC1ALTTRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC0PRETRGSEL         1   /* SoC has SOPT7[ADC0PRETRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC1PRETRGSEL         1   /* SoC has SOPT7[ADC1PRETRGSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT7_ADC2PRETRGSEL             /* SoC has SOPT7[ADC2PRETRGSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT7_ADC3PRETRGSEL             /* SoC has SOPT7[ADC3PRETRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC0TRGSEL            15  /* SoC has 10 SOPT7[ADC0TRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC1TRGSEL            15  /* SoC has 10 SOPT7[ADC1TRGSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT7_ADC2TRGSEL                /* SoC has 10 SOPT7[ADC2TRGSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT7_ADC3TRGSEL                /* SoC has 10 SOPT7[ADC3TRGSEL] */
+#  define KINETIS_SIM_SOPT7_ADC0ALTTRGEN              1   /* ADC0 alternate trigger enable */
+#  define KINETIS_SIM_SOPT7_ADC1ALTTRGEN              1   /* ADC1 alternate trigger enable */
+#  undef  KINETIS_SIM_SOPT7_ADC2ALTTRGEN                  /* ADC2 alternate trigger enable */
+#  undef  KINETIS_SIM_SOPT7_ADC3ALTTRGEN                  /* ADC3 alternate trigger enable */
+#  define KINETIS_SIM_HAS_SOPT8                       1   /* SoC has SOPT8 Register */
+#  define KINETIS_SIM_HAS_SOPT8_FTM0SYNCBIT           1   /* SoC has SOPT8[FTM0SYNCBIT] */
+#  define KINETIS_SIM_HAS_SOPT8_FTM1SYNCBIT           1   /* SoC has SOPT8[FTM1SYNCBIT] */
+#  define KINETIS_SIM_HAS_SOPT8_FTM2SYNCBIT           1   /* SoC has SOPT8[FTM2SYNCBIT] */
+#  define KINETIS_SIM_HAS_SOPT8_FTM3SYNCBIT           1   /* SoC has SOPT8[FTM3SYNCBIT] */
+#  define KINETIS_SIM_HAS_SOPT8_FTM0OCH0SRC           1   /* SoC has SOPT8[FTM0OCH0SRC] */
+#  define KINETIS_SIM_HAS_SOPT8_FTM0OCH1SRC           1   /* SoC has SOPT8[FTM0OCH1SRC] */
+#  define KINETIS_SIM_HAS_SOPT8_FTM0OCH2SRC           1   /* SoC has SOPT8[FTM0OCH2SRC] */
+#  define KINETIS_SIM_HAS_SOPT8_FTM0OCH3SRC           1   /* SoC has SOPT8[FTM0OCH3SRC] */
+#  define KINETIS_SIM_HAS_SOPT8_FTM0OCH4SRC           1   /* SoC has SOPT8[FTM0OCH4SRC] */
+#  define KINETIS_SIM_HAS_SOPT8_FTM0OCH5SRC           1   /* SoC has SOPT8[FTM0OCH5SRC] */
+#  define KINETIS_SIM_HAS_SOPT8_FTM0OCH6SRC           1   /* SoC has SOPT8[FTM0OCH6SRC] */
+#  define KINETIS_SIM_HAS_SOPT8_FTM0OCH7SRC           1   /* SoC has SOPT8[FTM0OCH7SRC] */
+#  define KINETIS_SIM_HAS_SOPT8_FTM3OCH0SRC           1   /* SoC has SOPT8[FTM3OCH0SRC] */
+#  define KINETIS_SIM_HAS_SOPT8_FTM3OCH1SRC           1   /* SoC has SOPT8[FTM3OCH1SRC] */
+#  define KINETIS_SIM_HAS_SOPT8_FTM3OCH2SRC           1   /* SoC has SOPT8[FTM3OCH2SRC] */
+#  define KINETIS_SIM_HAS_SOPT8_FTM3OCH3SRC           1   /* SoC has SOPT8[FTM3OCH3SRC] */
+#  define KINETIS_SIM_HAS_SOPT8_FTM3OCH4SRC           1   /* SoC has SOPT8[FTM3OCH4SRC] */
+#  define KINETIS_SIM_HAS_SOPT8_FTM3OCH5SRC           1   /* SoC has SOPT8[FTM3OCH5SRC] */
+#  define KINETIS_SIM_HAS_SOPT8_FTM3OCH6SRC           1   /* SoC has SOPT8[FTM3OCH6SRC] */
+#  define KINETIS_SIM_HAS_SOPT8_FTM3OCH7SRC           1   /* SoC has SOPT8[FTM3OCH7SRC] */
+#  define KINETIS_SIM_HAS_SOPT9                       1   /* SoC has SOPT9 Register */
+#  define KINETIS_SIM_HAS_SOPT9_TPM1CH0SRC            1   /* SoC has SOPT9[TPM1CH0SRC] */
+#  define KINETIS_SIM_HAS_SOPT9_TPM2CH0SRC            1   /* SoC has SOPT9[TPM2CH0SRC] */
+#  define KINETIS_SIM_HAS_SOPT9_TPM1CLKSEL            1   /* SoC has SOPT9[TPM1CLKSEL] */
+#  define KINETIS_SIM_HAS_SOPT9_TPM2CLKSEL            1   /* SoC has SOPT9[TPM2CLKSEL] */
+#  define KINETIS_SIM_HAS_SDID                        1   /* SoC has SDID Register */
+#  define KINETIS_SIM_HAS_SDID_DIEID                  1   /* SoC has SDID[DIEID] */
+#  define KINETIS_SIM_HAS_SDID_FAMID                  1   /* SoC has SDID[FAMID] */
+#  define KINETIS_SIM_HAS_SDID_FAMILYID               1   /* SoC has SDID[FAMILYID] */
+#  define KINETIS_SIM_HAS_SDID_SERIESID               1   /* SoC has SDID[SERIESID] */
+#  undef  KINETIS_SIM_HAS_SDID_SRAMSIZE                   /* SoC has SDID[SRAMSIZE] */
+#  define KINETIS_SIM_HAS_SDID_SUBFAMID               1   /* SoC has SDID[SUBFAMID] */
+#  define KINETIS_SIM_HAS_SCGC1                       1   /* SoC has _SCGC1 Register */
+#  undef  KINETIS_SIM_HAS_SCGC1_UART5                     /* SoC has SCGC1[UART5] */
+#  define KINETIS_SIM_HAS_SCGC1_UART4                 1   /* SoC has SCGC1[UART4] */
+#  define KINETIS_SIM_HAS_SCGC1_I2C3                  1   /* SoC has SCGC1[I2C3] */
+#  define KINETIS_SIM_HAS_SCGC1_I2C2                  1   /* SoC has SCGC1[I2C2] */
+#  undef  KINETIS_SIM_HAS_SCGC1_OSC1                      /* SoC has SCGC1[OSC1] */
+#  define KINETIS_SIM_HAS_SCGC2                       1   /* SoC has _SCGC2 Register */
+#  define KINETIS_SIM_HAS_SCGC2                       1   /* SoC has SCGC2 Register */
+#  define KINETIS_SIM_HAS_SCGC2_ENET                  1   /* SoC has SCGC2[ENET] */
+#  define KINETIS_SIM_HAS_SCGC2_LPUART0               1   /* SoC has SCGC2[LPUART0] */
+#  define KINETIS_SIM_HAS_SCGC2_TPM1                  1   /* SoC has SCGC2[TPM1] */
+#  define KINETIS_SIM_HAS_SCGC2_TPM2                  1   /* SoC has SCGC2[TPM2] */
+#  define KINETIS_SIM_HAS_SCGC3                       1   /* SoC has SCGC3 Register */
+#  define KINETIS_SIM_HAS_SCGC3_RNGA                  1   /* SoC has SCGC3[RNGA] */
+#  define KINETIS_SIM_HAS_SCGC3_USBHS                 1   /* SoC has SCGC3[USBHS] */
+#  define KINETIS_SIM_HAS_SCGC3_USBHSPHY              1   /* SoC has SCGC3[USBHSPHY] */
+#  define KINETIS_SIM_HAS_SCGC3_USBHSDCD              1   /* SoC has SCGC3[USBHSDCD] */
+#  define KINETIS_SIM_HAS_SCGC3_FLEXCAN1              1   /* SoC has SCGC3[FLEXCAN1] */
+#  undef  KINETIS_SIM_HAS_SCGC3_NFC                       /* SoC has SCGC3[NFC] */
+#  define KINETIS_SIM_HAS_SCGC3_SPI2                  1   /* SoC has SCGC3[SPI2] */
+#  undef  KINETIS_SIM_HAS_SCGC3_SAI1                      /* SoC has SCGC3[SAI1] */
+#  define KINETIS_SIM_HAS_SCGC3_SDHC                  1   /* SoC has SCGC3[SDHC] */
+#  define KINETIS_SIM_HAS_SCGC3_FTM2                  1   /* SoC has SCGC3[FTM2] */
+#  define KINETIS_SIM_HAS_SCGC3_FTM3                  1   /* SoC has SCGC3[FTM3] */
+#  define KINETIS_SIM_HAS_SCGC3_ADC1                  1   /* SoC has SCGC3[ADC1] */
+#  undef  KINETIS_SIM_HAS_SCGC3_ADC3                      /* SoC has SCGC3[ADC3] */
+#  undef  KINETIS_SIM_HAS_SCGC3_SLCD                      /* SoC has SCGC3[SLCD] */
+#  define KINETIS_SIM_HAS_SCGC4                       1   /* SoC has SCGC4 Register */
+#  undef  KINETIS_SIM_HAS_SCGC4_LLWU                      /* SoC has SCGC4[LLWU] clock gate */
+#  define KINETIS_SIM_HAS_SCGC4_UART0                 1   /* SoC has SCGC4[UART0] */
+#  define KINETIS_SIM_HAS_SCGC4_UART1                 1   /* SoC has SCGC4[UART1] */
+#  define KINETIS_SIM_HAS_SCGC4_UART2                 1   /* SoC has SCGC4[UART2] */
+#  define KINETIS_SIM_HAS_SCGC4_UART3                 1   /* SoC has SCGC4[UART3] */
+#  define KINETIS_SIM_HAS_SCGC5                       1   /* SoC has _SCGC5 Register */
+#  undef  KINETIS_SIM_HAS_SCGC5_REGFILE                   /* SoC has SCGC5[REGFILE] */
+#  define KINETIS_SIM_HAS_SCGC5_TSI                   1   /* SoC has SCGC5[TSI] */
+#  undef  KINETIS_SIM_HAS_SCGC5_PORTF                     /* SoC has SCGC5[PORTF] */
+#  define KINETIS_SIM_HAS_SCGC6                       1   /* SoC has SCGC6 Register */
+#  define KINETIS_SIM_HAS_SCGC6_FTFL                  1   /* SoC has SCGC6[FTFL] */
+#  undef  KINETIS_SIM_HAS_SCGC6_DMAMUX1                   /* SoC has SCGC6[DEMUX1] */
+#  undef  KINETIS_SIM_HAS_SCGC6_USBHS                     /* SoC has SCGC6[USBHS] */
+#  define KINETIS_SIM_HAS_SCGC6_RNGA                  1   /* SoC has SCGC6[RNGA] */
+#  define KINETIS_SIM_HAS_SCGC6_FTM2                  1   /* SoC has SCGC6[FTM2] */
+#  undef  KINETIS_SIM_HAS_SCGC6_ADC2                      /* SoC has SCGC6[ADC2] */
+#  define KINETIS_SIM_HAS_SCGC6_DAC0                  1   /* SoC has SCGC6[DAC0] */
+#  define KINETIS_SIM_HAS_SCGC7                       1   /* SoC has SCGC7 Register */
+#  define KINETIS_SIM_HAS_SCGC7_FLEXBUS               1   /* SoC has SCGC7[FLEXBUS] */
+#  define KINETIS_SIM_HAS_SCGC7_DMA                   1   /* SoC has SCGC7[DMS] */
+#  define KINETIS_SIM_HAS_SCGC7_MPU                   1   /* SoC has SCGC7[MPU] */
+#  define KINETIS_SIM_HAS_SCGC7_SDRAMC                1   /* SoC has SCGC7[SDRAMC] */
+#  define KINETIS_SIM_HAS_CLKDIV1                     1   /* SoC has CLKDIV1 Register */
+#  define KINETIS_SIM_HAS_CLKDIV1_OUTDIV2             1   /* SoC has CLKDIV1[OUTDIV2] */
+#  define KINETIS_SIM_HAS_CLKDIV1_OUTDIV3             1   /* SoC has CLKDIV1[OUTDIV3] */
+#  define KINETIS_SIM_HAS_CLKDIV1_OUTDIV4             1   /* SoC has CLKDIV1[OUTDIV4] */
+#  undef  KINETIS_SIM_HAS_CLKDIV1_OUTDIV5                 /* SoC has CLKDIV1[OUTDIV5] */
+#  define KINETIS_SIM_HAS_CLKDIV2                     1   /* SoC has CLKDIV2 Register */
+#  define KINETIS_SIM_HAS_CLKDIV2_USBDIV              1   /* SoC has CLKDIV2[USBDIV] */
+#  define KINETIS_SIM_HAS_CLKDIV2_USBFRAC             1   /* SoC has CLKDIV2[USBFRAC] */
+#  undef  KINETIS_SIM_HAS_CLKDIV2_USBFSDIV                /* SoC has CLKDIV2[USBFSDIV] */
+#  undef  KINETIS_SIM_HAS_CLKDIV2_USBFSFRAC               /* SoC has CLKDIV2[USBFSFRAC] */
+#  undef  KINETIS_SIM_HAS_CLKDIV2_USBHSDIV                /* SoC has CLKDIV2[USBHSDIV] */
+#  undef  KINETIS_SIM_HAS_CLKDIV2_USBHSFRAC               /* SoC has CLKDIV2[USBHSFRAC] */
+#  undef  KINETIS_SIM_HAS_CLKDIV2_I2SDIV                  /* SoC has CLKDIV2[I2SDIV] */
+#  undef  KINETIS_SIM_HAS_CLKDIV2_I2SFRAC                 /* SoC has CLKDIV2[I2SFRAC] */
+#  define KINETIS_SIM_HAS_FCFG1                       1   /* SoC has FCFG1 Register */
+#  define KINETIS_SIM_HAS_FCFG1_DEPART                1   /* SoC has FCFG1[DEPART] */
+#  define KINETIS_SIM_HAS_FCFG1_EESIZE                1   /* SoC has FCFG1[EESIZE] */
+#  define KINETIS_SIM_HAS_FCFG1_FLASHDIS              1   /* SoC has FCFG1[FLASHDIS] */
+#  define KINETIS_SIM_HAS_FCFG1_FLASHDOZE             1   /* SoC has FCFG1[FLASHDOZE] */
+#  undef  KINETIS_SIM_HAS_FCFG1_FTFDIS                    /* SoC has FCFG1[FTFDIS] */
+#  define KINETIS_SIM_HAS_FCFG1_NVMSIZE               1   /* SoC has FCFG1[NVMSIZE] */
+#  define KINETIS_SIM_HAS_FCFG2                       1   /* SoC has FCFG2 Register */
+#  define KINETIS_SIM_HAS_FCFG2_MAXADDR0              7   /* SoC has n bit of FCFG2[MAXADDR0] */
+#  define KINETIS_SIM_HAS_FCFG2_MAXADDR1              7   /* SoC has n bit of FCFG2[MAXADDR1] */
+#  define KINETIS_SIM_HAS_FCFG2_PFLSH                 1   /* SoC has FCFG2[PFLSH] */
+#  define KINETIS_SIM_HAS_FCFG2_SWAPPFLSH             1   /* SoC has FCFG2[SWAPPFLSH] */
+#  define KINETIS_SIM_HAS_UIDH                        1   /* SoC has UIDH Register */
+#  define KINETIS_SIM_HAS_UIDMH                       1   /* SoC has UIDMH Register */
+#  define KINETIS_SIM_HAS_UIDML                       1   /* SoC has UIDML Register */
+#  define KINETIS_SIM_HAS_UIDL                        1   /* SoC has UIDL Register */
+#  define KINETIS_SIM_HAS_CLKDIV3                     1   /* SoC has CLKDIV3 Register */
+#  define KINETIS_SIM_HAS_CLKDIV3_PLLFLLDIV           1   /* SoC has CLKDIV3[PLLFLLDIV] */
+#  define KINETIS_SIM_HAS_CLKDIV3_PLLFLLFRAC          1   /* SoC has CLKDIV3[PLLFLLFRAC] */
+#  define KINETIS_SIM_HAS_CLKDIV4                     1   /* SoC has CLKDIV4 Register */
+#  define KINETIS_SIM_HAS_CLKDIV4_TRACEDIV            1   /* SoC has CLKDIV4[TRACEDIV] */
+#  define KINETIS_SIM_HAS_CLKDIV4_TRACEFRAC           1   /* SoC has CLKDIV4[TRACEFRAC] */
+#  undef  KINETIS_SIM_HAS_CLKDIV4_NFCDIV                  /* SoC has CLKDIV4[NFCDIV] */
+#  undef  KINETIS_SIM_HAS_CLKDIV4_NFCFRAC                 /* SoC has CLKDIV4[NFCFRAC] */
+#  undef  KINETIS_SIM_HAS_MCR                             /* SoC has MCR Register */
+#else
+#  error "Unsupported Kinetis chip"
+#endif
+
+/* Use the catch all configuration for the SIM based on the implementations in nuttx prior 2/16/2017 */
+
+#if KINETIS_SIM_VERSION == KINETIS_SIM_VERSION_UKN
+
+/* SIM Register Configuration */
+
+#  define KINETIS_SIM_HAS_SOPT1                       1   /* SoC has SOPT1 Register */
+#  undef  KINETIS_SIM_HAS_SOPT1_OSC32KOUT                 /* SoC has SOPT1[OSC32KOUT] */
+#  define KINETIS_SIM_HAS_SOPT1_OSC32KSEL             1   /* SoC has SOPT1[OSC32KSEL] */
+#  define KINETIS_SIM_HAS_SOPT1_OSC32KSEL_BITS        1   /* SoC has 1 bit SOPT1[OSC32KSEL] */
+#  define KINETIS_SIM_HAS_SOPT1_RAMSIZE               1   /* SoC has SOPT1[RAMSIZE] */
+#  define KINETIS_SIM_HAS_SOPT1_USBREGEN              1   /* SoC has SOPT1[USBREGEN] */
+#  define KINETIS_SIM_HAS_SOPT1_USBSSTBY              1   /* SoC has SOPT1[USBSSTBY] */
+#  undef  KINETIS_SIM_HAS_SOPT1_USBVSTBY                  /* SoC has SOPT1[USBVSTBY] */
+#  undef  KINETIS_SIM_HAS_SOPT1CFG                        /* SoC has SOPT1CFG Register */
+#  undef  KINETIS_SIM_HAS_SOPT1CFG_URWE                   /* SoC has SOPT1CFG[URWE] */
+#  undef  KINETIS_SIM_HAS_SOPT1CFG_USSWE                  /* SoC has SOPT1CFG[USSWE] */
+#  undef  KINETIS_SIM_HAS_SOPT1CFG_UVSWE                  /* SoC has SOPT1CFG[UVSWE] */
+#  undef  KINETIS_SIM_HAS_USBPHYCTL                       /* SoC has USBPHYCTL Register */
+#  undef  KINETIS_SIM_HAS_USBPHYCTL_USB3VOUTTRG           /* SoC has USBPHYCTL[USB3VOUTTRG] */
+#  undef  KINETIS_SIM_HAS_USBPHYCTL_USBDISILIM            /* SoC has USBPHYCTL[USBDISILIM] */
+#  undef  KINETIS_SIM_HAS_USBPHYCTL_USBVREGPD             /* SoC has USBPHYCTL[USBVREGPD] */
+#  undef  KINETIS_SIM_HAS_USBPHYCTL_USBVREGSEL            /* SoC has USBPHYCTL[USBVREGSEL] */
+#  define KINETIS_SIM_HAS_SOPT2                       1   /* SoC has SOPT2 Register */
+#  define KINETIS_SIM_HAS_SOPT2_CMTUARTPAD            1   /* SoC has SOPT2[CMTUARTPAD] */
+#  define KINETIS_SIM_HAS_SOPT2_FBSL                  1   /* SoC has SOPT2[FBSL] */
+#  undef  KINETIS_SIM_HAS_SOPT2_FLEXIOSRC                 /* SoC has SOPT2[FLEXIOSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT2_LPUARTSRC                 /* SoC has SOPT2[LPUARTSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_PLLFLLSEL             1   /* SoC has SOPT2[PLLFLLSEL] */
+#  define KINETIS_SIM_HAS_SOPT2_PLLFLLSEL_BITS        1   /* SoC has 1 bit of SOPT2[PLLFLLSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT2_PTD7PAD                   /* SoC has SOPT2[PTD7PAD] */
+#  undef  KINETIS_SIM_HAS_SOPT2_RMIISRC                   /* SoC has SOPT2[RMIISRC] */
+#  undef  KINETIS_SIM_HAS_SOPT2_RTCCLKOUTSEL              /* SoC has SOPT2[RTCCLKOUTSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT2_CLKOUTSEL                 /* SoC has SOPT2[CLKOUTSEL] */
+#  define KINETIS_SIM_HAS_SOPT2_SDHCSRC               1   /* SoC has SOPT2[SDHCSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_TIMESRC               1   /* SoC has SOPT2[TIMESRC] */
+#  undef  KINETIS_SIM_HAS_SOPT2_TPMSRC                    /* SoC has SOPT2[TPMSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT2_USBFSRC                   /* SoC has SOPT2[USBFSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_I2SSRC                1   /* SoC has SOPT2[I2SSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_TRACECLKSEL           1   /* SoC has SOPT2[TRACECLKSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT2_USBREGEN                  /* SoC has SOPT2[USBREGEN] */
+#  undef  KINETIS_SIM_HAS_SOPT2_USBSLSRC                  /* SoC has SOPT2[USBSLSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT2_USBHSRC                   /* SoC has SOPT2[USBHSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_USBSRC                1   /* SoC has SOPT2[USBSRC] */
+#  define KINETIS_SIM_HAS_SOPT2_MCGCLKSEL             1   /* SoC has SOPT2[MCGCLKSEL] */
+#  define KINETIS_SIM_HAS_SOPT4                       1   /* SoC has SOPT4 Register */
+#  define KINETIS_SIM_HAS_SOPT4_FTM0FLT0              1   /* SoC has SOPT4[FTM0FLT0] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM0FLT1              1   /* SoC has SOPT4[FTM0FLT1] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM0FLT2              1   /* SoC has SOPT4[FTM0FLT2] */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM0FLT3                  /* SoC has SOPT4[FTM0FLT3] */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM0TRG0SRC               /* SoC has SOPT4[FTM0TRG0SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM0TRG1SRC               /* SoC has SOPT4[FTM0TRG1SRC] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM1CH0SRC            1   /* SoC has SOPT4[FTM1CH0SRC] No OF */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM1FLT0                  /* SoC has SOPT4[FTM1FLT0] */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM1FLT1                  /* SoC has SOPT4[FTM1FLT1] */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM1FLT2                  /* SoC has SOPT4[FTM1FLT2] */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM1FLT3                  /* SoC has SOPT4[FTM1FLT3] */
+#  define KINETIS_SIM_HAS_SOPT4_FTM2CH0SRC            1   /* SoC has SOPT4[FTM2CH0SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM2CH1SRC                /* SoC has SOPT4[FTM2CH1SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM2FLT0                  /* SoC has SOPT4[FTM2FLT0] */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM2FLT1                  /* SoC has SOPT4[FTM2FLT1] */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM2FLT2                  /* SoC has SOPT4[FTM2FLT2] */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM2FLT3                  /* SoC has SOPT4[FTM2FLT3] */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM3CH0SRC                /* SoC has SOPT4[FTM3CH0SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM3FLT0                  /* SoC has SOPT4[FTM3FLT0] */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM3FLT1                  /* SoC has SOPT4[FTM3FLT1] */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM3FLT2                  /* SoC has SOPT4[FTM3FLT2] */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM3FLT3                  /* SoC has SOPT4[FTM3FLT3] */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM3TRG0SRC               /* SoC has SOPT4[FTM3TRG0SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT4_FTM3TRG1SRC               /* SoC has SOPT4[FTM3TRG1SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT4_TPM0CLKSEL                /* SoC has SOPT4[TPM0CLKSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT4_TPM1CH0SRC                /* SoC has SOPT4[TPM1CH0SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT4_TPM1CLKSEL                /* SoC has SOPT4[TPM1CLKSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT4_TPM2CH0SRC                /* SoC has SOPT4[TPM2CH0SRC] */
+#  undef  KINETIS_SIM_HAS_SOPT4_TPM2CLKSEL                /* SoC has SOPT4[TPM2CLKSEL] */
+#  define KINETIS_SIM_HAS_SOPT5                           /* SoC has SOPT5 Register */
+#  undef  KINETIS_SIM_HAS_SOPT5_LPUART0RXSRC              /* SoC has SOPT5[LPUART0RXSRC] */
+#  undef  KINETIS_SIM_HAS_SOPT5_LPUART0TXSRC              /* SoC has SOPT5[LPUART0TXSRC] */
+#  define KINETIS_SIM_HAS_SOPT6                       1   /* SoC has SOPT6 Register */
+#  undef  KINETIS_SIM_HAS_SOPT6_MCC                       /* SoC has SOPT6[MCC] */
+#  undef  KINETIS_SIM_HAS_SOPT6_PCR                       /* SoC has SOPT6[PCR] */
+#  define KINETIS_SIM_HAS_SOPT6_RSTFLTSEL             1   /* SoC has SOPT6[RSTFLTSEL] */
+#  define KINETIS_SIM_HAS_SOPT6_RSTFLTEN              1   /* SoC has SOPT6[RSTFLTEN] */
+#  define KINETIS_SIM_HAS_SOPT7                       1   /* SoC has SOPT7 Register */
+#  define KINETIS_SIM_HAS_SOPT7_ADC0ALTTRGSEL         1   /* SoC has SOPT7[ADC0ALTTRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC1ALTTRGSEL         1   /* SoC has SOPT7[ADC1ALTTRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC0PRETRGSEL         1   /* SoC has SOPT7[ADC0PRETRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC1PRETRGSEL         1   /* SoC has SOPT7[ADC1PRETRGSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT7_ADC2PRETRGSEL             /* SoC has SOPT7[ADC2PRETRGSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT7_ADC3PRETRGSEL             /* SoC has SOPT7[ADC3PRETRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC0TRGSEL            14  /* SoC has 10 SOPT7[ADC0TRGSEL] */
+#  define KINETIS_SIM_HAS_SOPT7_ADC1TRGSEL            14  /* SoC has 10 SOPT7[ADC1TRGSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT7_ADC2TRGSEL                /* SoC has 10 SOPT7[ADC2TRGSEL] */
+#  undef  KINETIS_SIM_HAS_SOPT7_ADC3TRGSEL                /* SoC has 10 SOPT7[ADC3TRGSEL] */
+#  define KINETIS_SIM_SOPT7_ADC0ALTTRGEN              1   /* ADC0 alternate trigger enable */
+#  define KINETIS_SIM_SOPT7_ADC1ALTTRGEN              1   /* ADC1 alternate trigger enable */
+#  undef  KINETIS_SIM_SOPT7_ADC2ALTTRGEN                  /* ADC2 alternate trigger enable */
+#  undef  KINETIS_SIM_SOPT7_ADC3ALTTRGEN                  /* ADC3 alternate trigger enable */
+#  undef  KINETIS_SIM_HAS_SOPT8                           /* SoC has SOPT8 Register */
+#  undef  KINETIS_SIM_HAS_SOPT9                           /* SoC has SOPT9 Register */
+#  define KINETIS_SIM_HAS_SDID                        1   /* SoC has SDID Register */
+#  undef  KINETIS_SIM_HAS_SDID_DIEID                      /* SoC has SDID[DIEID] */
+#  define KINETIS_SIM_HAS_SDID_FAMID                  1   /* SoC has SDID[FAMID] */
+#  undef  KINETIS_SIM_HAS_SDID_FAMILYID                   /* SoC has SDID[FAMILYID] */
+#  undef  KINETIS_SIM_HAS_SDID_SERIESID                   /* SoC has SDID[SERIESID] */
+#  undef  KINETIS_SIM_HAS_SDID_SRAMSIZE                   /* SoC has SDID[SRAMSIZE] */
+#  undef  KINETIS_SIM_HAS_SDID_SUBFAMID                   /* SoC has SDID[SUBFAMID] */
+#  define KINETIS_SIM_HAS_SCGC1                       1   /* SoC has SCGC1 Register */
+#  define KINETIS_SIM_HAS_SCGC1_UART5                 1   /* SoC has SCGC1[UART5] */
+#  define KINETIS_SIM_HAS_SCGC1_UART4                 1   /* SoC has SCGC1[UART4] */
+#  undef  KINETIS_SIM_HAS_SCGC1_I2C3                      /* SoC has SCGC1[I2C3] */
+#  undef  KINETIS_SIM_HAS_SCGC1_I2C2                      /* SoC has SCGC1[I2C2] */
+#  undef  KINETIS_SIM_HAS_SCGC1_OSC1                      /* SoC has SCGC1[OSC1] */
+#  define KINETIS_SIM_HAS_SCGC2                       1   /* SoC has SCGC2 Register */
+#  define KINETIS_SIM_HAS_SCGC2_ENET                  1   /* SoC has SCGC2[ENET] */
+#  undef  KINETIS_SIM_HAS_SCGC2_LPUART0                   /* SoC has SCGC2[LPUART0] */
+#  undef  KINETIS_SIM_HAS_SCGC2_TPM1                      /* SoC has SCGC2[TPM1] */
+#  undef  KINETIS_SIM_HAS_SCGC2_TPM2                      /* SoC has SCGC2[TPM2] */
+#  define KINETIS_SIM_HAS_SCGC3                       1   /* SoC has SCGC3 Register */
+#  define KINETIS_SIM_HAS_SCGC3_RNGA                  1   /* SoC has SCGC3[RNGA] */
+#  undef  KINETIS_SIM_HAS_SCGC3_USBHS                     /* SoC has SCGC3[USBHS] */
+#  undef  KINETIS_SIM_HAS_SCGC3_USBHSPHY                  /* SoC has SCGC3[USBHSPHY] */
+#  undef  KINETIS_SIM_HAS_SCGC3_USBHSDCD                  /* SoC has SCGC3[USBHSDCD] */
+#  define KINETIS_SIM_HAS_SCGC3_FLEXCAN1              1   /* SoC has SCGC3[FLEXCAN1] */
+#  undef  KINETIS_SIM_HAS_SCGC3_NFC                       /* SoC has SCGC3[NFC] */
+#  define KINETIS_SIM_HAS_SCGC3_SPI2                  1   /* SoC has SCGC3[SPI2] */
+#  undef  KINETIS_SIM_HAS_SCGC3_SAI1                      /* SoC has SCGC3[SAI1] */
+#  define KINETIS_SIM_HAS_SCGC3_SDHC                  1   /* SoC has SCGC3[SDHC] */
+#  define KINETIS_SIM_HAS_SCGC3_FTM2                  1   /* SoC has SCGC3[FTM2] */
+#  define KINETIS_SIM_HAS_SCGC3_FTM3                  1   /* SoC has SCGC3[FTM3] */
+#  define KINETIS_SIM_HAS_SCGC3_ADC1                  1   /* SoC has SCGC3[ADC1] */
+#  undef  KINETIS_SIM_HAS_SCGC3_ADC3                      /* SoC has SCGC3[ADC3] */
+#  define KINETIS_SIM_HAS_SCGC3_SLCD                  1   /* SoC has SCGC3[SLCD] */
+#  define KINETIS_SIM_HAS_SCGC4                       1   /* SoC has SCGC4 Register */
+#  define KINETIS_SIM_HAS_SCGC4_LLWU                  1   /* SoC has SCGC4[LLWU] clock gate */
+#  define KINETIS_SIM_HAS_SCGC4_UART0                 1   /* SoC has SCGC4[UART0] */
+#  define KINETIS_SIM_HAS_SCGC4_UART1                 1   /* SoC has SCGC4[UART1] */
+#  define KINETIS_SIM_HAS_SCGC4_UART2                 1   /* SoC has SCGC4[UART2] */
+#  define KINETIS_SIM_HAS_SCGC4_UART3                 1   /* SoC has SCGC4[UART3] */
+#  define KINETIS_SIM_HAS_SCGC5                       1   /* SoC has SCGC5 Register */
+#  define KINETIS_SIM_HAS_SCGC5_REGFILE               1   /* SoC has SCGC5[REGFILE] */
+#  define KINETIS_SIM_HAS_SCGC5_TSI                   1   /* SoC has SCGC5[TSI] */
+#  undef  KINETIS_SIM_HAS_SCGC5_PORTF                     /* SoC has SCGC5[PORTF] */
+#  define KINETIS_SIM_HAS_SCGC6                       1   /* SoC has SCGC6 Register */
+#  define KINETIS_SIM_HAS_SCGC6_FTFL                  1   /* SoC has SCGC6[FTFL] */
+#  undef  KINETIS_SIM_HAS_SCGC6_DMAMUX1                   /* SoC has SCGC6[DEMUX1] */
+#  undef  KINETIS_SIM_HAS_SCGC6_USBHS                     /* SoC has SCGC6[USBHS] */
+#  undef  KINETIS_SIM_HAS_SCGC6_RNGA                      /* SoC has SCGC6[RNGA] */
+#  undef  KINETIS_SIM_HAS_SCGC6_FTM2                      /* SoC has SCGC6[FTM2] */
+#  undef  KINETIS_SIM_HAS_SCGC6_ADC2                      /* SoC has SCGC6[ADC2] */
+#  undef  KINETIS_SIM_HAS_SCGC6_DAC0                      /* SoC has SCGC6[DAC0] */
+#  define KINETIS_SIM_HAS_SCGC7                       1   /* SoC has SCGC7 Register */
+#  define KINETIS_SIM_HAS_SCGC7_FLEXBUS               1   /* SoC has SCGC7[FLEXBUS] */
+#  define KINETIS_SIM_HAS_SCGC7_DMA                   1   /* SoC has SCGC7[DMS] */
+#  define KINETIS_SIM_HAS_SCGC7_MPU                   1   /* SoC has SCGC7[MPU] */
+#  undef  KINETIS_SIM_HAS_SCGC7_SDRAMC                    /* SoC has SCGC7[SDRAMC] */
+#  define KINETIS_SIM_HAS_CLKDIV1                     1   /* SoC has CLKDIV1 Register */
+#  define KINETIS_SIM_HAS_CLKDIV1_OUTDIV2             1   /* SoC has CLKDIV1[OUTDIV2] */
+#  define KINETIS_SIM_HAS_CLKDIV1_OUTDIV3             1   /* SoC has CLKDIV1[OUTDIV3] */
+#  define KINETIS_SIM_HAS_CLKDIV1_OUTDIV4             1   /* SoC has CLKDIV1[OUTDIV4] */
+#  undef  KINETIS_SIM_HAS_CLKDIV1_OUTDIV5                 /* SoC has CLKDIV1[OUTDIV5] */
+#  define KINETIS_SIM_HAS_CLKDIV2                     1   /* SoC has CLKDIV2 Register */
+#  define KINETIS_SIM_HAS_CLKDIV2_USBDIV              1   /* SoC has CLKDIV2[USBDIV] */
+#  define KINETIS_SIM_HAS_CLKDIV2_USBFRAC             1   /* SoC has CLKDIV2[USBFRAC] */
+#  undef  KINETIS_SIM_HAS_CLKDIV2_USBFSDIV                /* SoC has CLKDIV2[USBFSDIV] */
+#  undef  KINETIS_SIM_HAS_CLKDIV2_USBFSFRAC               /* SoC has CLKDIV2[USBFSFRAC] */
+#  undef  KINETIS_SIM_HAS_CLKDIV2_USBHSDIV                /* SoC has CLKDIV2[USBHSDIV] */
+#  undef  KINETIS_SIM_HAS_CLKDIV2_USBHSFRAC               /* SoC has CLKDIV2[USBHSFRAC] */
+#  define KINETIS_SIM_HAS_CLKDIV2_I2SDIV              1   /* SoC has CLKDIV2[I2SDIV] */
+#  define KINETIS_SIM_HAS_CLKDIV2_I2SFRAC             1   /* SoC has CLKDIV2[I2SFRAC] */
+#  define KINETIS_SIM_HAS_FCFG1                       1   /* SoC has FCFG1 Register */
+#  define KINETIS_SIM_HAS_FCFG1_DEPART                1   /* SoC has FCFG1[DEPART] */
+#  define KINETIS_SIM_HAS_FCFG1_EESIZE                1   /* SoC has FCFG1[EESIZE] */
+#  undef  KINETIS_SIM_HAS_FCFG1_FLASHDIS                  /* SoC has FCFG1[FLASHDIS] */
+#  undef  KINETIS_SIM_HAS_FCFG1_FLASHDOZE                 /* SoC has FCFG1[FLASHDOZE] */
+#  undef  KINETIS_SIM_HAS_FCFG1_FTFDIS                    /* SoC has FCFG1[FTFDIS] */
+#  define KINETIS_SIM_HAS_FCFG1_NVMSIZE               1   /* SoC has FCFG1[NVMSIZE] */
+#  define KINETIS_SIM_HAS_FCFG2                       1   /* SoC has FCFG2 Register */
+#  define KINETIS_SIM_HAS_FCFG2_MAXADDR0              6   /* SoC has n bit of FCFG2[MAXADDR0] */
+#  define KINETIS_SIM_HAS_FCFG2_MAXADDR1              6   /* SoC has n bit of FCFG2[MAXADDR1] */
+#  define KINETIS_SIM_HAS_FCFG2_PFLSH                 1   /* SoC has FCFG2[PFLSH] */
+#  define KINETIS_SIM_HAS_FCFG2_SWAPPFLSH             1   /* SoC has FCFG2[SWAPPFLSH] */
+#  define KINETIS_SIM_HAS_UIDH                        1   /* SoC has UIDH Register */
+#  define KINETIS_SIM_HAS_UIDMH                       1   /* SoC has UIDMH Register */
+#  define KINETIS_SIM_HAS_UIDML                       1   /* SoC has UIDML Register */
+#  define KINETIS_SIM_HAS_UIDL                        1   /* SoC has UIDL Register */
+#  undef  KINETIS_SIM_HAS_CLKDIV3                         /* SoC has CLKDIV3 Register */
+#  undef  KINETIS_SIM_HAS_CLKDIV3_PLLFLLDIV               /* SoC has CLKDIV3[PLLFLLDIV] */
+#  undef  KINETIS_SIM_HAS_CLKDIV3_PLLFLLFRAC              /* SoC has CLKDIV3[PLLFLLFRAC] */
+#  undef  KINETIS_SIM_HAS_CLKDIV4                         /* SoC has CLKDIV4 Register */
+#  undef  KINETIS_SIM_HAS_CLKDIV4_TRACEDIV                /* SoC has CLKDIV4[TRACEDIV] */
+#  undef  KINETIS_SIM_HAS_CLKDIV4_TRACEFRAC               /* SoC has CLKDIV4[TRACEFRAC] */
+#  undef  KINETIS_SIM_HAS_CLKDIV4_NFCDIV                  /* SoC has CLKDIV4[NFCDIV] */
+#  undef  KINETIS_SIM_HAS_CLKDIV4_NFCFRAC                 /* SoC has CLKDIV4[NFCFRAC] */
+#  undef  KINETIS_SIM_HAS_MCR                             /* SoC has MCR Register */
+#endif
+
+#if !defined(KINETIS_SIM_VERSION)
+#  error "No KINETIS_SIM_VERSION defined!"
+#endif
+
+#if defined(KINETIS_SIM_HAS_SOPT1_OSC32KSEL)
+#  define KINETIS_SIM_SOPT1_OSC32KSEL_MASK  ((1 << (KINETIS_SIM_HAS_SOPT1_OSC32KSEL_BITS))-1)
+#endif
+
+#if defined(KINETIS_SIM_HAS_SOPT2_PLLFLLSEL)
+#  define KINETIS_SIM_SOPT2_PLLFLLSEL_MASK  ((1 << (KINETIS_SIM_HAS_SOPT2_PLLFLLSEL_BITS))-1)
+#endif
+
+#if defined(KINETIS_SIM_HAS_FCFG2_MAXADDR0)
+#  define KINETIS_SIM_FCFG2_MAXADDR0_MASK  ((1 << (KINETIS_SIM_HAS_FCFG2_MAXADDR0))-1)
+#endif
+
+#if defined(KINETIS_SIM_HAS_FCFG2_MAXADDR1)
+#  define KINETIS_SIM_FCFG2_MAXADDR1_MASK  ((1 << (KINETIS_SIM_HAS_FCFG2_MAXADDR1))-1)
+#endif
+
+#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_SIM_H */
diff --git a/arch/arm/include/kl/chip.h b/arch/arm/include/kl/chip.h
index df1029eecb4d5b47f64a3360b12d5791575ee033..8be3b2029fd514ae54adc178768ec994ca0c427e 100644
--- a/arch/arm/include/kl/chip.h
+++ b/arch/arm/include/kl/chip.h
@@ -50,7 +50,7 @@
 
 #if defined(CONFIG_ARCH_CHIP_MKL25Z64)
 
-#  define KL_Z64             1          /* Kinetics KL25Z128 family */
+#  define KL_Z64             1          /* Kinetis KL25Z128 family */
 #  define KL_FLASH_SIZE      (64*1024)  /* 64Kb */
 #  define KL_SRAM_SIZE       (8*1024)   /* 8Kb */
 #  undef  KL_MPU                        /* No memory protection unit */
@@ -88,7 +88,7 @@
 
 #elif defined(CONFIG_ARCH_CHIP_MKL25Z128)
 
-#  define KL_Z128            1          /* Kinetics KL25Z128 family */
+#  define KL_Z128            1          /* Kinetis KL25Z128 family */
 #  define KL_FLASH_SIZE      (128*1024) /* 64Kb */
 #  define KL_SRAM_SIZE       (16*1024)  /* 16Kb */
 #  undef  KL_MPU                        /* No memory protection unit */
@@ -127,7 +127,7 @@
 
 #elif defined(CONFIG_ARCH_CHIP_MKL26Z128)
 
-#  define KL_Z128            1          /* Kinetics KL25Z128 family */
+#  define KL_Z128            1          /* Kinetis KL25Z128 family */
 #  define KL_FLASH_SIZE      (128*1024) /* 64Kb */
 #  define KL_SRAM_SIZE       (16*1024)  /* 16Kb */
 #  undef  KL_MPU                        /* No memory protection unit */
diff --git a/arch/arm/include/kl/irq.h b/arch/arm/include/kl/irq.h
index 27ba8575f52d023f7c9324244a967c05075b6d1c..93021827300d09f52eb1c91b7518cbe43a6d123c 100644
--- a/arch/arm/include/kl/irq.h
+++ b/arch/arm/include/kl/irq.h
@@ -58,7 +58,7 @@
 
 /* Processor Exceptions (vectors 0-15) */
 
-#define KL_IRQ_RESERVED      (0)   /* Reserved vector (only used with CONFIG_DEBUG) */
+#define KL_IRQ_RESERVED      (0)   /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
                                         /* Vector  0: Reset stack pointer value */
                                         /* Vector  1: Reset (not handler as an IRQ) */
 #define KL_IRQ_NMI           (2)   /* Vector  2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/lpc11xx/irq.h b/arch/arm/include/lpc11xx/irq.h
index caac7c3e170c1d858882bbf13a32ae10bb6741fd..46ff7d27cac9225a98bca731e1a287dff5beb9ab 100644
--- a/arch/arm/include/lpc11xx/irq.h
+++ b/arch/arm/include/lpc11xx/irq.h
@@ -59,7 +59,7 @@
 
 /* Common Processor Exceptions (vectors 0-15) */
 
-#define LPC11_IRQ_RESERVED       (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define LPC11_IRQ_RESERVED       (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
                                         /* Vector  0: Reset stack pointer value */
                                         /* Vector  1: Reset (not handler as an IRQ) */
 #define LPC11_IRQ_NMI            (2) /* Vector  2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/lpc17xx/irq.h b/arch/arm/include/lpc17xx/irq.h
index 6af683225ca64dbcad3a639e1f64714018f68976..99bffe17ebbd38510bc10b734fcd1623d480e010 100644
--- a/arch/arm/include/lpc17xx/irq.h
+++ b/arch/arm/include/lpc17xx/irq.h
@@ -59,7 +59,7 @@
 
 /* Common Processor Exceptions (vectors 0-15) */
 
-#define LPC17_IRQ_RESERVED       (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define LPC17_IRQ_RESERVED       (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
                                      /* Vector  0: Reset stack pointer value */
                                      /* Vector  1: Reset (not handler as an IRQ) */
 #define LPC17_IRQ_NMI            (2) /* Vector  2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/lpc17xx/lpc176x_irq.h b/arch/arm/include/lpc17xx/lpc176x_irq.h
index 248c5c47d66070842bed5b0dda851ec236a2b7dd..b844b33d652abd27ccaf2ae87a2b01359cd77c89 100644
--- a/arch/arm/include/lpc17xx/lpc176x_irq.h
+++ b/arch/arm/include/lpc17xx/lpc176x_irq.h
@@ -147,7 +147,7 @@
  * 42
  */
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
 #  define LPC17_VALID_GPIOINT0  (0x7fff8ffful) /* GPIO port 0 interrupt set */
 #  define LPC17_VALID_GPIOINT2  (0x00003ffful) /* GPIO port 2 interrupt set */
 
diff --git a/arch/arm/include/lpc17xx/lpc178x_irq.h b/arch/arm/include/lpc17xx/lpc178x_irq.h
index 76c749045282f80dac2bf2be47d93fee0f991c99..52ed1731a5ceb6fa7af3c93ddaeb0b2fc13007bb 100644
--- a/arch/arm/include/lpc17xx/lpc178x_irq.h
+++ b/arch/arm/include/lpc17xx/lpc178x_irq.h
@@ -166,7 +166,7 @@
  * 42
  */
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
 #  define LPC17_VALID_GPIOINT0  (0xfffffffful) /* GPIO port 0 interrupt set */
 #  define LPC17_VALID_GPIOINT2  (0xfffffffful) /* GPIO port 2 interrupt set */
 
diff --git a/arch/arm/include/lpc214x/irq.h b/arch/arm/include/lpc214x/irq.h
index a4737c38d4bade9651ecb5304accf205dd9ae6bf..852dd0c6495f4dd1993c979bf523100b2170f650 100644
--- a/arch/arm/include/lpc214x/irq.h
+++ b/arch/arm/include/lpc214x/irq.h
@@ -37,8 +37,8 @@
  * only indirectly through nuttx/irq.h
  */
 
-#ifndef __ARCH_LPC214X_IRQ_H
-#define __ARCH_LPC214X_IRQ_H
+#ifndef __ARCH_ARM_INCLUDE_LPC214X_IRQ_H
+#define __ARCH_ARM_INCLUDE_LPC214X_IRQ_H
 
 /****************************************************************************
  * Included Files
@@ -127,5 +127,5 @@ void up_detach_vector(int vector);
 #endif
 #endif
 
-#endif /* __ARCH_LPC214X_IRQ_H */
+#endif /* __ARCH_ARM_INCLUDE_LPC214X_IRQ_H */
 
diff --git a/arch/arm/include/lpc2378/irq.h b/arch/arm/include/lpc2378/irq.h
index 18ef58604b737fa269dc9dbba6febcf9dab137ba..8fa2067fc970ca1be862b1967ca2e02544a32758 100644
--- a/arch/arm/include/lpc2378/irq.h
+++ b/arch/arm/include/lpc2378/irq.h
@@ -43,8 +43,8 @@
  * only indirectly through nuttx/irq.h
  */
 
-#ifndef __ARCH_LPC2378_IRQ_H
-#define __ARCH_LPC2378_IRQ_H
+#ifndef __ARCH_ARM_INCLUDE_LPC2378_IRQ_H
+#define __ARCH_ARM_INCLUDE_LPC2378_IRQ_H
 
 /****************************************************************************
  * Included Files
@@ -149,4 +149,4 @@ void up_detach_vector(int vector);
 #endif
 #endif
 
-#endif /* __ARCH_LPC2378_IRQ_H */
+#endif /* __ARCH_ARM_INCLUDE_LPC2378_IRQ_H */
diff --git a/arch/arm/include/lpc43xx/chip.h b/arch/arm/include/lpc43xx/chip.h
index 4592117de184bb059bacd774145714233b1c4e17..3729ff8f81f5556c26b8511d09643a52b77af2be 100644
--- a/arch/arm/include/lpc43xx/chip.h
+++ b/arch/arm/include/lpc43xx/chip.h
@@ -347,6 +347,32 @@
 #  define LPC43_NADC10             (2)         /* Two 10-bit ADC controllers */
 #  define LPC43_NADC10_CHANNELS    (8)         /* Eight ADC channels */
 #  undef  LPC43_NADC12                         /* No 12-bit ADC controllers */
+#elif defined(CONFIG_ARCH_CHIP_LPC4337FET256)
+#  define LPC43_FLASH_BANKA_SIZE   (512*1024)  /* 1024Kb FLASH */
+#  define LPC43_FLASH_BANKB_SIZE   (512*1024)
+#  define LPC43_LOCSRAM_BANK0_SIZE (32*1024)   /* 72Kb Local SRAM */
+#  define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
+#  define LPC43_AHBSRAM_BANK0_SIZE (48*1024)   /* 64Kb AHB SRAM */
+#  define LPC43_AHBSRAM_BANK1_SIZE (0)
+#  define LPC43_AHBSRAM_BANK2_SIZE (16*1024)
+#  define LPC43_EEPROM_SIZE        (16*1024)   /* 16Kb EEPROM */
+#  undef  LPC43_NLCD                           /* No LCD controller */
+#  define LPC43_ETHERNET           (1)         /* One Ethernet controller */
+#  define LPC43_USB0               (1)         /* Have USB0 (Host, Device, OTG) */
+#  define LPC43_USB1               (1)         /* Have USB1 (Host, Device) */
+#  define LPC43_USB1_ULPI          (1)         /* Have USB1 (Host, Device) with ULPI I/F */
+#  define LPC43_MCPWM              (1)         /* One PWM interface */
+#  define LPC43_QEI                (1)         /* One Quadrature Encoder interface */
+#  define LPC43_NUSARTS            (4)         /* Three USARTs + 1 UART */
+#  define LPC43_NSSP               (2)         /* Two SSP controllers */
+#  define LPC43_NTIMERS            (4)         /* Four Timers */
+#  define LPC43_NI2C               (2)         /* Two I2C controllers */
+#  define LPC43_NI2S               (2)         /* Two I2S controllers */
+#  define LPC43_NCAN               (2)         /* Two CAN controllers */
+#  define LPC43_NDAC               (1)         /* One 10-bit DAC */
+#  define LPC43_NADC10             (2)         /* Two 10-bit ADC controllers */
+#  define LPC43_NADC10_CHANNELS    (8)         /* Eight ADC channels */
+#  undef  LPC43_NADC12                         /* No 12-bit ADC controllers */
 #elif defined(CONFIG_ARCH_CHIP_LPC4350FBD208)
 #  define LPC43_FLASH_BANKA_SIZE   (0)         /* Flashless */
 #  define LPC43_FLASH_BANKB_SIZE   (0)
diff --git a/arch/arm/include/lpc43xx/irq.h b/arch/arm/include/lpc43xx/irq.h
index 9b103e97185005d00d3e254fee0d6ca03ccf3fce..dd9790ab10774093de24bfce479ecf4ee39f4103 100644
--- a/arch/arm/include/lpc43xx/irq.h
+++ b/arch/arm/include/lpc43xx/irq.h
@@ -59,7 +59,7 @@
 
 /* Processor Exceptions (vectors 0-15) */
 
-#define LPC43_IRQ_RESERVED         (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define LPC43_IRQ_RESERVED         (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
                                        /* Vector  0: Reset stack pointer value */
                                        /* Vector  1: Reset (not handler as an IRQ) */
 #define LPC43_IRQ_NMI              (2) /* Vector  2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/nuc1xx/irq.h b/arch/arm/include/nuc1xx/irq.h
index 0db0379d1b4b4360b1ba4fe68491c546afcdf1d5..26b0d8125f510f055abdc400f8e08a8e66e52a44 100644
--- a/arch/arm/include/nuc1xx/irq.h
+++ b/arch/arm/include/nuc1xx/irq.h
@@ -58,7 +58,7 @@
 
 /* Processor Exceptions (vectors 0-15) */
 
-#define NUC_IRQ_RESERVED       (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define NUC_IRQ_RESERVED       (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
                                    /* Vector  0: Reset stack pointer value */
                                    /* Vector  1: Reset (not handler as an IRQ) */
 #define NUC_IRQ_NMI            (2) /* Vector  2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/sam34/chip.h b/arch/arm/include/sam34/chip.h
index 3bd3b42d51e868e3a52c113302d244bef281e19c..fc67f3b5fd4850b1ab2ae988a28f5c39d341aa65 100644
--- a/arch/arm/include/sam34/chip.h
+++ b/arch/arm/include/sam34/chip.h
@@ -543,21 +543,21 @@
 
 /* AT91SAM4S Family *****************************************************************/
 /*
- * FEATURE       SAM4SD32C SAM4SD32B SAM4SD16C SAM4SD16B SAM4SA16C SAM4SA16B SAM4S16C SAM4S16B SAM4S8C SAM4S8B
- * ------------- --------- --------- --------- --------- --------- --------- -------- -------- ------- -------
- * Flash         2x1MB     2x1MB     2x512KB   1x1MB     1x1MB     1x1MB     1x1MB    1x1MB    1x512KB 1x512KB
- * SRAM          160KB     160KB     160KB     160KB     160KB     160KB     128KB    128KB    128KB   128KB
- * HCACHE        2KB       2KB       2KB       2KB       2KB       2KB       -        -        -       -
- * Pins          100       64        100       64        100       64        100      64       100     64
- * No. PIOs      79        47        79        47        79        47        79       47       79      47
- * Ext. BUS      Yes       No        Yes       No        Yes       No        Yes      No       Yes     No
- * 12-bit ADC    16 ch     11 ch     16 ch     11 ch     16 ch     11 ch     16 ch    11 ch    16 ch   11 ch
- * 12-bit DAC    2 ch      2 ch      2 ch      2 ch      2 ch      2 ch      2 ch     2 ch     2 ch    2 ch
- * Timer Counter 6 ch      3 ch      6 ch      3 ch      6 ch      3 ch      6 ch     3 ch     6 ch    3 ch
- * PDC           22 ch     22 ch     22 ch     22 ch     22 ch     22 ch     22 ch    22 ch    22 ch   22 ch
- * USART         2         2         2         2         2         2         2        2        2       2
- * UART          2         2         2         2         2         2         2        2        2       2
- * HSMCI         Yes       Yes       Yes       Yes       Yes       Yes      Yes      Yes      Yes      Yes
+ * FEATURE       SAM4SD32C SAM4SD32B SAM4SD16C SAM4SD16B SAM4SA16C SAM4SA16B SAM4S16C SAM4S16B SAM4S8C SAM4S8B SAM4S4C
+ * ------------- --------- --------- --------- --------- --------- --------- -------- -------- ------- ------- -------
+ * Flash         2x1MB     2x1MB     2x512KB   1x1MB     1x1MB     1x1MB     1x1MB    1x1MB    1x512KB 1x512KB 1x256KB
+ * SRAM          160KB     160KB     160KB     160KB     160KB     160KB     128KB    128KB    128KB   128KB   64KB
+ * HCACHE        2KB       2KB       2KB       2KB       2KB       2KB       -        -        -       -       -
+ * Pins          100       64        100       64        100       64        100      64       100     64      100
+ * No. PIOs      79        47        79        47        79        47        79       47       79      47      79
+ * Ext. BUS      Yes       No        Yes       No        Yes       No        Yes      No       Yes     No      Yes
+ * 12-bit ADC    16 ch     11 ch     16 ch     11 ch     16 ch     11 ch     16 ch    11 ch    16 ch   11 ch   16 ch
+ * 12-bit DAC    2 ch      2 ch      2 ch      2 ch      2 ch      2 ch      2 ch     2 ch     2 ch    2 ch    2 ch
+ * Timer Counter 6 ch      3 ch      6 ch      3 ch      6 ch      3 ch      6 ch     3 ch     6 ch    3 ch    6 ch
+ * PDC           22 ch     22 ch     22 ch     22 ch     22 ch     22 ch     22 ch    22 ch    22 ch   22 ch   22 ch
+ * USART         2         2         2         2         2         2         2        2        2       2       2
+ * UART          2         2         2         2         2         2         2        2        2       2       2
+ * HSMCI         Yes       Yes       Yes       Yes       Yes       Yes       Yes      Yes      Yes     Yes     Yes
  */
 
 #elif defined(CONFIG_ARCH_CHIP_ATSAM4SD32C)
@@ -760,6 +760,26 @@
 #  define SAM34_NUDPFS                1             /* 1 USB full speed device */
 #  define SAM34_NUHPFS                0             /* No USB full speed embedded host */
 
+#elif defined(CONFIG_ARCH_CHIP_ATSAM4S4C)
+/* Internal memory */
+
+#  define SAM34_FLASH_SIZE            (256*1024)    /* 256KB */
+#  define SAM34_SRAM0_SIZE            (64*1024)     /* 64KB */
+#  define SAM34_SRAM1_SIZE            0             /* None */
+#  define SAM34_NFCSRAM_SIZE          0             /* None */
+
+/* Peripherals */
+
+#  define SAM34_NDMACHAN              0             /* No DMAC Channels */
+#  define SAM34_NPDCCHAN              22            /* 22 PDC Channels */
+#  define SAM34_NMCI2                 1             /* 1 memory card interface */
+#  define SAM34_NSLCD                 0             /* No segment LCD interface */
+#  define SAM34_NAESA                 0             /* No advanced encryption standard */
+#  define SAM34_NUDPHS                0             /* No USB high speed device */
+#  define SAM34_NUHPHS                0             /* No USB high speed embedded host */
+#  define SAM34_NUDPFS                1             /* 1 USB full speed device */
+#  define SAM34_NUHPFS                0             /* No USB full speed embedded host */
+
 /* AT91SAM4E Family *****************************************************************/
 /* FEATURE     SAM4E16E  SAM4E8E  SAM4E16C SAM4E8C
  * ----------- --------- -------- -------- --------
diff --git a/arch/arm/include/sam34/irq.h b/arch/arm/include/sam34/irq.h
index 521cd5a93cd71b10d8f5076fb8283a0bd4fbc423..a0f5de604f78b1455b2e72f10108a31f4c8efd42 100644
--- a/arch/arm/include/sam34/irq.h
+++ b/arch/arm/include/sam34/irq.h
@@ -58,7 +58,7 @@
 
 /* Common Processor Exceptions (vectors 0-15) */
 
-#define SAM_IRQ_RESERVED       (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define SAM_IRQ_RESERVED       (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
                                    /* Vector  0: Reset stack pointer value */
                                    /* Vector  1: Reset (not handler as an IRQ) */
 #define SAM_IRQ_NMI            (2) /* Vector  2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/samdl/irq.h b/arch/arm/include/samdl/irq.h
index d74584fb298cc557b03dfe5dfb2804d0a811152c..7da8c7b21e6282b70b4645c57fb806645ef07fc2 100644
--- a/arch/arm/include/samdl/irq.h
+++ b/arch/arm/include/samdl/irq.h
@@ -58,7 +58,7 @@
 
 /* Processor Exceptions (vectors 0-15) */
 
-#define SAM_IRQ_RESERVED       (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define SAM_IRQ_RESERVED       (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
                                    /* Vector  0: Reset stack pointer value */
                                    /* Vector  1: Reset (not handler as an IRQ) */
 #define SAM_IRQ_NMI            (2) /* Vector  2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/samdl/samd20_irq.h b/arch/arm/include/samdl/samd20_irq.h
index 01361e8e00e5b8d9d7e9574fbdacf5b13deca5ee..709fddaeac891120c423746105fa696dcc3580e5 100644
--- a/arch/arm/include/samdl/samd20_irq.h
+++ b/arch/arm/include/samdl/samd20_irq.h
@@ -81,7 +81,7 @@
 
 /* GPIO interrupts.  Up to 16 pins may be configured to support interrupts */
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_SAMDL_GPIOIRQ
 #  define SAM_IRQ_EXTINT0  (SAM_IRQ_NIRQS+0)    /* External interrupt 0 */
 #  define SAM_IRQ_EXTINT1  (SAM_IRQ_NIRQS+1)    /* External interrupt 1 */
 #  define SAM_IRQ_EXTINT2  (SAM_IRQ_NIRQS+2)    /* External interrupt 2 */
diff --git a/arch/arm/include/samdl/samd21_irq.h b/arch/arm/include/samdl/samd21_irq.h
index 2ea4db825795737185aeda5fdea09c6c10357645..7b5c633ef62bffe9675a20ced0096a3c5d75bcf3 100644
--- a/arch/arm/include/samdl/samd21_irq.h
+++ b/arch/arm/include/samdl/samd21_irq.h
@@ -88,7 +88,7 @@
 
 /* GPIO interrupts.  Up to 16 pins may be configured to support interrupts */
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_SAMDL_GPIOIRQ
 #  define SAM_IRQ_EXTINT0  (SAM_IRQ_NIRQS+0)    /* External interrupt 0 */
 #  define SAM_IRQ_EXTINT1  (SAM_IRQ_NIRQS+1)    /* External interrupt 1 */
 #  define SAM_IRQ_EXTINT2  (SAM_IRQ_NIRQS+2)    /* External interrupt 2 */
diff --git a/arch/arm/include/samdl/saml21_irq.h b/arch/arm/include/samdl/saml21_irq.h
index 9622a0321523cc257ab1de0f09435cea89c86439..24c774dbd0f4421e56f97c5e1eedf73d4083d51d 100644
--- a/arch/arm/include/samdl/saml21_irq.h
+++ b/arch/arm/include/samdl/saml21_irq.h
@@ -89,7 +89,7 @@
 
 /* GPIO interrupts.  Up to 16 pins may be configured to support interrupts */
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_SAMDL_GPIOIRQ
 #  define SAM_IRQ_EXTINT0  (SAM_IRQ_NIRQS+0)    /* External interrupt 0 */
 #  define SAM_IRQ_EXTINT1  (SAM_IRQ_NIRQS+1)    /* External interrupt 1 */
 #  define SAM_IRQ_EXTINT2  (SAM_IRQ_NIRQS+2)    /* External interrupt 2 */
diff --git a/arch/arm/include/samv7/irq.h b/arch/arm/include/samv7/irq.h
index 4c33f3dbec0bb4b61b846958c7226f274b549b84..eec3d12e054038332fe20043930130db88ed1820 100644
--- a/arch/arm/include/samv7/irq.h
+++ b/arch/arm/include/samv7/irq.h
@@ -58,7 +58,7 @@
 
 /* Common Processor Exceptions (vectors 0-15) */
 
-#define SAM_IRQ_RESERVED       (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define SAM_IRQ_RESERVED       (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
                                    /* Vector  0: Reset stack pointer value */
                                    /* Vector  1: Reset (not handler as an IRQ) */
 #define SAM_IRQ_NMI            (2) /* Vector  2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/spinlock.h b/arch/arm/include/spinlock.h
index fbd0e424382e7aff2c0607abe48b3b71cd4e5ec0..16079cc81a333f6fed72d3e7b80662859eb0390f 100644
--- a/arch/arm/include/spinlock.h
+++ b/arch/arm/include/spinlock.h
@@ -44,13 +44,59 @@
 #  include 
 #endif /* __ASSEMBLY__ */
 
+/* Include ARM architecture-specific IRQ definitions (including register
+ * save structure and up_irq_save()/up_irq_restore() functions)
+ */
+
+#if defined(CONFIG_ARCH_CORTEXA5) || defined(CONFIG_ARCH_CORTEXA8) || \
+    defined(CONFIG_ARCH_CORTEXA9)
+#  include 
+#elif defined(CONFIG_ARCH_CORTEXR4) || defined(CONFIG_ARCH_CORTEXR4F) || \
+      defined(CONFIG_ARCH_CORTEXR5) || defined(CONFIG_ARCH_CORTEXR5F) || \
+      defined(CONFIG_ARCH_CORTEXR7) || defined(CONFIG_ARCH_CORTEXR7F)
+#  include 
+#elif defined(CONFIG_ARCH_CORTEXM3) || defined(CONFIG_ARCH_CORTEXM4) || \
+      defined(CONFIG_ARCH_CORTEXM7)
+#  include 
+#elif defined(CONFIG_ARCH_CORTEXM0)
+#  include 
+#else
+#  include 
+#endif
+
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
 
+/* Spinlock states */
+
 #define SP_UNLOCKED 0  /* The Un-locked state */
 #define SP_LOCKED   1  /* The Locked state */
 
+/* Memory barriers for use with NuttX spinlock logic
+ *
+ * Data Memory Barrier (DMB) acts as a memory barrier. It ensures that all
+ * explicit memory accesses that appear in program order before the DMB
+ * instruction are observed before any explicit memory accesses that appear
+ * in program order after the DMB instruction. It does not affect the
+ * ordering of any other instructions executing on the processor
+ *
+ *   dmb st - Data memory barrier.  Wait for stores to complete.
+ *
+ * Data Synchronization Barrier (DSB) acts as a special kind of memory
+ * barrier. No instruction in program order after this instruction executes
+ * until this instruction completes. This instruction completes when: (1) All
+ * explicit memory accesses before this instruction complete, and (2) all
+ * Cache, Branch predictor and TLB maintenance operations before this
+ * instruction complete.
+ *
+ *   dsb sy - Data syncrhonization barrier.  Assures that the CPU waits until
+ *            all memory accesses are complete
+ */
+
+#define SP_DSB(n) __asm__ __volatile__ ("dsb sy" : : : "memory")
+#define SP_DMB(n) __asm__ __volatile__ ("dmb st" : : : "memory")
+
 /****************************************************************************
  * Public Types
  ****************************************************************************/
@@ -82,7 +128,7 @@ typedef uint8_t spinlock_t;
  * Name: up_testset
  *
  * Description:
- *   Perform and atomic test and set operation on the provided spinlock.
+ *   Perform an atomic test and set operation on the provided spinlock.
  *
  *   This function must be provided via the architecture-specific logoic.
  *
diff --git a/arch/arm/include/stm32/chip.h b/arch/arm/include/stm32/chip.h
index 98d0073c50617e9ab25a7cb6ddf2e99f0ffb3586..0844c5a09fb5b9d888891b414b79680eafd2b15d 100644
--- a/arch/arm/include/stm32/chip.h
+++ b/arch/arm/include/stm32/chip.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * arch/arm/include/stm32/chip.h
  *
- *   Copyright (C) 2009, 2011-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2011-2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -86,6 +86,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx families */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -126,6 +127,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx families */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -166,6 +168,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx families */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -206,6 +209,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx families */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -246,6 +250,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx families */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -286,6 +291,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx families */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -404,6 +410,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx families */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -442,6 +449,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx families */
 #  define STM32_NFSMC                    0   /* FSMC */
@@ -483,6 +491,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx families */
 #  define STM32_NFSMC                    0   /* FSMC */
@@ -522,6 +531,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx families */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -600,6 +610,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx families */
 #  define STM32_NFSMC                    0   /* FSMC */
@@ -638,6 +649,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx families */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -676,6 +688,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx families */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -714,6 +727,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx families */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -757,6 +771,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -798,6 +813,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx families */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -839,6 +855,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx families */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -878,6 +895,7 @@
 #  define CONFIG_STM32_CONNECTIVITYLINE  1   /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -903,6 +921,44 @@
 #  define STM32_NRNG                     0   /* No random number generator (RNG) */
 #  define STM32_NDCMI                    0   /* No digital camera interface (DCMI) */
 
+#elif defined(CONFIG_ARCH_CHIP_STM32F105RB)
+#  undef  CONFIG_STM32_STM32L15XX            /* STM32L151xx and STM32L152xx family */
+#  undef  CONFIG_STM32_ENERGYLITE            /* STM32L EnergyLite family */
+#  define CONFIG_STM32_STM32F10XX        1   /* STM32F10xxx family */
+#  undef  CONFIG_STM32_LOWDENSITY            /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
+#  undef  CONFIG_STM32_MEDIUMDENSITY         /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
+#  undef  CONFIG_STM32_MEDIUMPLUSDENSITY     /* STM32L15xxC w/ 32/256 Kbytes */
+#  undef  CONFIG_STM32_HIGHDENSITY           /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
+#  undef  CONFIG_STM32_VALUELINE             /* STM32F100x */
+#  define CONFIG_STM32_CONNECTIVITYLINE  1   /* STM32F105x and STM32F107x */
+#  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
+#  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
+#  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
+#  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx */
+#  define STM32_NFSMC                    1   /* FSMC */
+#  define STM32_NATIM                    1   /* One advanced timers TIM1 */
+#  define STM32_NGTIM                    4   /* 16-bit general timers TIM2-5 with DMA */
+#  define STM32_NGTIMNDMA                0   /* No 16-bit general timers without DMA */
+#  define STM32_NBTIM                    2   /* Two basic timers, TIM6-7 */
+#  define STM32_NDMA                     2   /* DMA1-2 */
+#  define STM32_NSPI                     3   /* SPI1-3 */
+#  define STM32_NI2S                     2   /* I2S1-2 (multiplexed with SPI2-3) */
+#  define STM32_NUSART                   5   /* USART1-3, UART 4-5 */
+#  define STM32_NI2C                     2   /* I2C1-2 */
+#  define STM32_NCAN                     2   /* CAN1-2 */
+#  define STM32_NSDIO                    0   /* No SDIO */
+#  define STM32_NLCD                     0   /* No LCD */
+#  define STM32_NUSBOTG                  1   /* USB OTG FS/HS */
+#  define STM32_NGPIO                    51  /* GPIOA-E */
+#  define STM32_NADC                     2   /* ADC1-2 */
+#  define STM32_NDAC                     2   /* DAC1-2 */
+#  define STM32_NCAPSENSE                0   /* No capacitive sensing channels */
+#  define STM32_NCRC                     1   /* CRC */
+#  define STM32_NETHERNET                0   /* 100/100 Ethernet MAC */
+#  define STM32_NRNG                     0   /* No random number generator (RNG) */
+#  define STM32_NDCMI                    0   /* No digital camera interface (DCMI) */
+
 #elif defined(CONFIG_ARCH_CHIP_STM32F107VC)
 #  undef  CONFIG_STM32_STM32L15XX            /* STM32L151xx and STM32L152xx family */
 #  undef  CONFIG_STM32_ENERGYLITE            /* STM32L EnergyLite family */
@@ -915,6 +971,7 @@
 #  define CONFIG_STM32_CONNECTIVITYLINE  1   /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -954,6 +1011,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  define CONFIG_STM32_STM32F20XX        1   /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -992,6 +1050,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  define CONFIG_STM32_STM32F20XX        1   /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -1030,6 +1089,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  define CONFIG_STM32_STM32F20XX        1   /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -1060,11 +1120,10 @@
 /* Part Numbering: STM32Fssscfxxx
  *
  *  Where
- *     sss = 302/303 or 372/373
+ *     sss = 302/303, 334 or 372/373
  *     c   = C (48pins) R (68 pins) V (100 pins)
  *     c   = K (32 pins), C (48 pins), R (68 pins), V (100 pins)
  *     f   = 6 (32KB FLASH), 8 (64KB FLASH), B (128KB FLASH), C (256KB FLASH)
- *     f   = 8 (64KB FLASH), B (128KB FLASH), C (256KB FLASH)
  *     xxx = Package, temperature range, options (ignored here)
  */
 
@@ -1118,6 +1177,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  define CONFIG_STM32_STM32F30XX        1   /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -1158,6 +1218,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  define CONFIG_STM32_STM32F30XX        1   /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -1198,6 +1259,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  define CONFIG_STM32_STM32F30XX        1   /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -1238,6 +1300,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  define CONFIG_STM32_STM32F30XX        1   /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -1278,6 +1341,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  define CONFIG_STM32_STM32F30XX        1   /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -1318,6 +1382,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  define CONFIG_STM32_STM32F30XX        1   /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -1338,7 +1403,7 @@
 #  define STM32_NLCD                     0   /* (0) No LCD */
 #  define STM32_NUSBOTG                  0   /* USB FS device, but no USB OTG FS/HS */
 #  define STM32_NGPIO                    37  /* GPIOA-F */
-#  define STM32_NADC                     3   /* (3) 12-bit ADC1-3 */
+#  define STM32_NADC                     4   /* (3) 12-bit ADC1-4 */
 #  define STM32_NDAC                     2   /* (2) 12-bit DAC1-2 */
 #  define STM32_NCAPSENSE                0   /* (0) No capacitive sensing channels */
 #  define STM32_NCRC                     1   /* (1) CRC calculation unit */
@@ -1358,6 +1423,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  define CONFIG_STM32_STM32F30XX        1   /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -1378,7 +1444,7 @@
 #  define STM32_NLCD                     0   /* (0) No LCD */
 #  define STM32_NUSBOTG                  0   /* USB FS device, but no USB OTG FS/HS */
 #  define STM32_NGPIO                    52  /* GPIOA-F */
-#  define STM32_NADC                     3   /* (3) 12-bit ADC1-3 */
+#  define STM32_NADC                     4   /* (3) 12-bit ADC1-4 */
 #  define STM32_NDAC                     2   /* (2) 12-bit DAC1-2 */
 #  define STM32_NCAPSENSE                0   /* (0) No capacitive sensing channels */
 #  define STM32_NCRC                     1   /* (1) CRC calculation unit */
@@ -1398,6 +1464,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  define CONFIG_STM32_STM32F30XX        1   /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -1438,6 +1505,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  define CONFIG_STM32_STM32F30XX        1   /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -1458,7 +1526,7 @@
 #  define STM32_NLCD                     0   /* (0) No LCD */
 #  define STM32_NUSBOTG                  0   /* USB FS device, but no USB OTG FS/HS */
 #  define STM32_NGPIO                    87  /* GPIOA-F */
-#  define STM32_NADC                     3   /* (3) 12-bit ADC1-3 */
+#  define STM32_NADC                     4   /* (3) 12-bit ADC1-4 */
 #  define STM32_NDAC                     2   /* (2) 12-bit DAC1-2 */
 #  define STM32_NCAPSENSE                0   /* (0) No capacitive sensing channels */
 #  define STM32_NCRC                     1   /* (1) CRC calculation unit */
@@ -1466,6 +1534,138 @@
 #  define STM32_NRNG                     0   /* (0) No random number generator (RNG) */
 #  define STM32_NDCMI                    0   /* (0) No digital camera interface (DCMI) */
 
+#elif defined(CONFIG_ARCH_CHIP_STM32F334K4) || defined(CONFIG_ARCH_CHIP_STM32F334K6) || defined(CONFIG_ARCH_CHIP_STM32F334K8)
+#  undef  CONFIG_STM32_STM32L15XX            /* STM32L151xx and STM32L152xx family */
+#  undef  CONFIG_STM32_ENERGYLITE            /* STM32L EnergyLite family */
+#  undef  CONFIG_STM32_STM32F10XX            /* STM32F10xxx family */
+#  undef  CONFIG_STM32_LOWDENSITY            /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
+#  undef  CONFIG_STM32_MEDIUMDENSITY         /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
+#  undef  CONFIG_STM32_MEDIUMPLUSDENSITY     /* STM32L15xxC w/ 32/256 Kbytes */
+#  undef  CONFIG_STM32_HIGHDENSITY           /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
+#  undef  CONFIG_STM32_VALUELINE             /* STM32F100x */
+#  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
+#  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
+#  undef CONFIG_STM32_STM32F30XX             /* STM32F30xxx family */
+#  define CONFIG_STM32_STM32F33XX        1   /* STM32F33xxx family */
+#  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
+#  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx */
+#  define STM32_NFSMC                    0   /* No FSMC */
+
+#  define STM32_HRTIM                    1   /* (1) High-resolution timer 16-bit, 10 channels: HRTIM1 */
+#  define STM32_NATIM                    1   /* (1) Advanced 16-bit timers with DMA: TIM1*/
+#  define STM32_NGTIM                    5   /* (1) 16-bit general timers with DMA: TIM3
+                                              * (1) 32-bit general timers with DMA: TIM2
+                                              * (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
+#  define STM32_NGTIMNDMA                0   /* All timers have DMA */
+#  define STM32_NBTIM                    2   /* (2) Basic timers: TIM6 and TIM7 */
+#  define STM32_NDMA                     1   /* (2) DMA1 (7 channels) */
+#  define STM32_NSPI                     1   /* (3) SPI1 */
+#  define STM32_NI2S                     0   /* (0) I2S1 */
+#  define STM32_NUSART                   2   /* (2) USART1-2 */
+#  define STM32_NI2C                     1   /* (2) I2C1 */
+#  define STM32_NCAN                     1   /* (1) CAN1 */
+#  define STM32_NSDIO                    0   /* (0) No SDIO */
+#  define STM32_NLCD                     0   /* (0) No LCD */
+#  define STM32_NUSBOTG                  0   /* (0) No USB */
+#  define STM32_NGPIO                    25  /* GPIOA-F */
+#  define STM32_NADC                     2   /* (3) 12-bit ADC1-2 */
+#  define STM32_NDAC                     2   /* (2) 12-bit DAC1-2 */
+#  define STM32_NCMP                     2   /* (2) Ultra-fast analog comparators: COMP2 and COMP4 */
+#  define STM32_NPGA                     1   /* (1) Operational amplifiers: OPAMP */
+#  define STM32_NCAPSENSE                14  /* (14) No capacitive sensing channels */
+#  define STM32_NCRC                     1   /* (1) CRC calculation unit */
+#  define STM32_NETHERNET                0   /* (0) No Ethernet MAC */
+#  define STM32_NRNG                     0   /* (0) No random number generator (RNG) */
+#  define STM32_NDCMI                    0   /* (0) No digital camera interface (DCMI) */
+
+#elif defined(CONFIG_ARCH_CHIP_STM32F334C4) || defined(CONFIG_ARCH_CHIP_STM32F334C6) || defined(CONFIG_ARCH_CHIP_STM32F334C8)
+#  undef  CONFIG_STM32_STM32L15XX            /* STM32L151xx and STM32L152xx family */
+#  undef  CONFIG_STM32_ENERGYLITE            /* STM32L EnergyLite family */
+#  undef  CONFIG_STM32_STM32F10XX            /* STM32F10xxx family */
+#  undef  CONFIG_STM32_LOWDENSITY            /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
+#  undef  CONFIG_STM32_MEDIUMDENSITY         /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
+#  undef  CONFIG_STM32_MEDIUMPLUSDENSITY     /* STM32L15xxC w/ 32/256 Kbytes */
+#  undef  CONFIG_STM32_HIGHDENSITY           /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
+#  undef  CONFIG_STM32_VALUELINE             /* STM32F100x */
+#  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
+#  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
+#  undef CONFIG_STM32_STM32F30XX             /* STM32F30xxx family */
+#  define CONFIG_STM32_STM32F33XX        1   /* STM32F33xxx family */
+#  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
+#  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx */
+#  define STM32_NFSMC                    0   /* No FSMC */
+
+#  define STM32_HRTIM                    1   /* (1) High-resolution timer 16-bit, 10 channels: HRTIM1 */
+#  define STM32_NATIM                    1   /* (1) Advanced 16-bit timers with DMA: TIM1*/
+#  define STM32_NGTIM                    5   /* (1) 16-bit general timers with DMA: TIM3
+                                              * (1) 32-bit general timers with DMA: TIM2
+                                              * (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
+#  define STM32_NGTIMNDMA                0   /* All timers have DMA */
+#  define STM32_NBTIM                    2   /* (2) Basic timers: TIM6 and TIM7 */
+#  define STM32_NDMA                     1   /* (2) DMA1 (7 channels) */
+#  define STM32_NSPI                     1   /* (3) SPI1 */
+#  define STM32_NI2S                     0   /* (0) I2S1 */
+#  define STM32_NUSART                   3   /* (2) USART1-3 */
+#  define STM32_NI2C                     1   /* (2) I2C1 */
+#  define STM32_NCAN                     1   /* (1) CAN1 */
+#  define STM32_NSDIO                    0   /* (0) No SDIO */
+#  define STM32_NLCD                     0   /* (0) No LCD */
+#  define STM32_NUSBOTG                  0   /* (0) No USB */
+#  define STM32_NGPIO                    37  /* GPIOA-F */
+#  define STM32_NADC                     3   /* (3) 12-bit ADC1-3 */
+#  define STM32_NDAC                     2   /* (2) 12-bit DAC1-2 */
+#  define STM32_NCMP                     3   /* (3) Ultra-fast analog comparators: COMP2, COMP4 and COMP6 */
+#  define STM32_NPGA                     1   /* (1) Operational amplifiers: OPAMP */
+#  define STM32_NCAPSENSE                17  /* (17) No capacitive sensing channels */
+#  define STM32_NCRC                     1   /* (1) CRC calculation unit */
+#  define STM32_NETHERNET                0   /* (0) No Ethernet MAC */
+#  define STM32_NRNG                     0   /* (0) No random number generator (RNG) */
+#  define STM32_NDCMI                    0   /* (0) No digital camera interface (DCMI) */
+
+#elif defined(CONFIG_ARCH_CHIP_STM32F334R4) || defined(CONFIG_ARCH_CHIP_STM32F334R6) || defined(CONFIG_ARCH_CHIP_STM32F334R8)
+#  undef  CONFIG_STM32_STM32L15XX            /* STM32L151xx and STM32L152xx family */
+#  undef  CONFIG_STM32_ENERGYLITE            /* STM32L EnergyLite family */
+#  undef  CONFIG_STM32_STM32F10XX            /* STM32F10xxx family */
+#  undef  CONFIG_STM32_LOWDENSITY            /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
+#  undef  CONFIG_STM32_MEDIUMDENSITY         /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
+#  undef  CONFIG_STM32_MEDIUMPLUSDENSITY     /* STM32L15xxC w/ 32/256 Kbytes */
+#  undef  CONFIG_STM32_HIGHDENSITY           /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
+#  undef  CONFIG_STM32_VALUELINE             /* STM32F100x */
+#  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
+#  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
+#  undef CONFIG_STM32_STM32F30XX             /* STM32F30xxx family */
+#  define CONFIG_STM32_STM32F33XX        1   /* STM32F33xxx family */
+#  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
+#  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx */
+#  define STM32_NFSMC                    0   /* No FSMC */
+
+#  define STM32_HRTIM                    1   /* (1) High-resolution timer 16-bit, 10 channels: HRTIM1 */
+#  define STM32_NATIM                    1   /* (1) Advanced 16-bit timers with DMA: TIM1*/
+#  define STM32_NGTIM                    5   /* (1) 16-bit general timers with DMA: TIM3
+                                              * (1) 32-bit general timers with DMA: TIM2
+                                              * (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
+#  define STM32_NGTIMNDMA                0   /* All timers have DMA */
+#  define STM32_NBTIM                    2   /* (2) Basic timers: TIM6 and TIM7 */
+#  define STM32_NDMA                     1   /* (2) DMA1 (7 channels) */
+#  define STM32_NSPI                     1   /* (3) SPI1 */
+#  define STM32_NI2S                     0   /* (0) I2S1 */
+#  define STM32_NUSART                   3   /* (2) USART1-3 */
+#  define STM32_NI2C                     1   /* (2) I2C1 */
+#  define STM32_NCAN                     1   /* (1) CAN1 */
+#  define STM32_NSDIO                    0   /* (0) No SDIO */
+#  define STM32_NLCD                     0   /* (0) No LCD */
+#  define STM32_NUSBOTG                  0   /* (0) No USB */
+#  define STM32_NGPIO                    51  /* GPIOA-F */
+#  define STM32_NADC                     3   /* (3) 12-bit ADC1-3 */
+#  define STM32_NDAC                     2   /* (3) 12-bit DAC1-2 */
+#  define STM32_NCMP                     3   /* (3) Ultra-fast analog comparators: COMP2, COMP4 and COMP6 */
+#  define STM32_NPGA                     1   /* (1) Operational amplifiers: OPAMP */
+#  define STM32_NCAPSENSE                18  /* (18) No capacitive sensing channels */
+#  define STM32_NCRC                     1   /* (1) CRC calculation unit */
+#  define STM32_NETHERNET                0   /* (0) No Ethernet MAC */
+#  define STM32_NRNG                     0   /* (0) No random number generator (RNG) */
+#  define STM32_NDCMI                    0   /* (0) No digital camera interface (DCMI) */
+
 #elif defined(CONFIG_ARCH_CHIP_STM32F373C8) || defined(CONFIG_ARCH_CHIP_STM32F373CB) || defined(CONFIG_ARCH_CHIP_STM32F373CC)
 #  undef  CONFIG_STM32_STM32L15XX            /* STM32L151xx and STM32L152xx family */
 #  undef  CONFIG_STM32_ENERGYLITE            /* STM32L EnergyLite vamily */
@@ -1477,6 +1677,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  define CONFIG_STM32_STM32F37XX        1   /* STM32F37xxx family */
 #  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -1497,7 +1698,8 @@
 #  define STM32_NLCD                     0   /* (0) No LCD */
 #  define STM32_NUSBOTG                  0   /* USB FS device, but no USB OTG FS/HS */
 #  define STM32_NGPIO                    87  /* GPIOA-F */
-#  define STM32_NADC                     1   /* (3) 12-bit ADC1 */
+#  define STM32_NADC                     1   /* (1) 12-bit ADC1 */
+#  define STM32_NSDADC                   3   /* (3) 16-bit SDADC1-3 */
 #  define STM32_NDAC                     2   /* (2) 12-bit DAC1-2 */
 #  define STM32_NCAPSENSE                0   /* (0) No capacitive sensing channels */
 #  define STM32_NCRC                     1   /* (1) CRC calculation unit */
@@ -1521,6 +1723,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -1559,6 +1762,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -1597,6 +1801,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -1635,6 +1840,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    0   /* No FSMC */
@@ -1673,6 +1879,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -1711,6 +1918,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -1749,6 +1957,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -1787,6 +1996,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -1825,6 +2035,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -1863,6 +2074,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -1901,6 +2113,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -1939,6 +2152,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx and STM32407xx */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -1977,6 +2191,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx, STM32407xx and STM32F427/437 */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -2015,6 +2230,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx, STM32407xx and STM32F427/437 */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -2053,6 +2269,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx, STM32407xx and STM32F427/437 */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -2091,6 +2308,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx, STM32407xx and STM32F427/437 */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -2129,6 +2347,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx, STM32407xx and STM32F427/437/429/439 */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -2167,6 +2386,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx, STM32407xx and STM32F427/437 */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -2205,6 +2425,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx, STM32407xx and STM32F427/437 STM32F466 */
 #  define STM32_NFSMC                    0   /* FSMC */
@@ -2243,6 +2464,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx, STM32407xx and STM32F427/437 STM32F466 */
 #  define STM32_NFSMC                    0   /* FSMC */
@@ -2281,6 +2503,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx, STM32407xx and STM32F427/437 STM32F466 */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -2319,6 +2542,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx, STM32407xx and STM32F427/437 STM32F466 */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -2357,6 +2581,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx, STM32407xx and STM32F427/437 */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -2398,6 +2623,7 @@
 #  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
 #  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
 #  undef  CONFIG_STM32_STM32F30XX            /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F33XX            /* STM32F33xxx family */
 #  undef  CONFIG_STM32_STM32F37XX            /* STM32F37xxx family */
 #  define CONFIG_STM32_STM32F40XX        1   /* STM32F405xx, STM32407xx and STM32F427/437 */
 #  define STM32_NFSMC                    1   /* FSMC */
@@ -2430,7 +2656,7 @@
 #  if defined(CONFIG_ARCH_CHIP_STM32F469A)
 #    define STM32_NETHERNET              0   /* No Ethernet MAC */
 #  elif defined(CONFIG_ARCH_CHIP_STM32F469I) || \
-#       defined(CONFIG_ARCH_CHIP_STM32F469B) || \
+        defined(CONFIG_ARCH_CHIP_STM32F469B) || \
         defined(CONFIG_ARCH_CHIP_STM32F469N)
 #    define STM32_NETHERNET              1   /* 100/100 Ethernet MAC */
 #  endif
diff --git a/arch/arm/include/stm32/dma2d.h b/arch/arm/include/stm32/dma2d.h
index 349944148f93158f1c2b80f11a6187693b2ffd6e..be807de31dca8b917cad700529c7d6da46568c57 100644
--- a/arch/arm/include/stm32/dma2d.h
+++ b/arch/arm/include/stm32/dma2d.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/include/stm32/dma2d.h
+ * arch/arm/include/stm32/dma2d.h
  *
  *   Copyright (C) 2015 Marco Krahl. All rights reserved.
  *   Author: Marco Krahl 
@@ -345,7 +345,7 @@ struct dma2d_layer_s
  *
  ****************************************************************************/
 
-FAR struct dma2d_layer_s * up_dma2dgetlayer(int lid);
+FAR struct dma2d_layer_s *up_dma2dgetlayer(int lid);
 
 /****************************************************************************
  * Name: up_dma2dcreatelayer
diff --git a/arch/arm/include/stm32/irq.h b/arch/arm/include/stm32/irq.h
index 1d57bc3e500147c86db55809a6c4cad1aca92c5e..ed369355a14f5576168ee5be11872976bdd211e0 100644
--- a/arch/arm/include/stm32/irq.h
+++ b/arch/arm/include/stm32/irq.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/include/stm32s/irq.h
+ * arch/arm/include/stm32/irq.h
  *
- *   Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -59,7 +59,7 @@
 
 /* Processor Exceptions (vectors 0-15) */
 
-#define STM32_IRQ_RESERVED       (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define STM32_IRQ_RESERVED       (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
                                      /* Vector  0: Reset stack pointer value */
                                      /* Vector  1: Reset (not handler as an IRQ) */
 #define STM32_IRQ_NMI            (2) /* Vector  2: Non-Maskable Interrupt (NMI) */
@@ -85,6 +85,8 @@
 #  include 
 #elif defined(CONFIG_STM32_STM32F30XX)
 #  include 
+#elif defined(CONFIG_STM32_STM32F33XX)
+#  include 
 #elif defined(CONFIG_STM32_STM32F37XX)
 #  include 
 #elif defined(CONFIG_STM32_STM32F40XX)
diff --git a/arch/arm/include/stm32/ltdc.h b/arch/arm/include/stm32/ltdc.h
index 70f978058aa6fa13a6f791c99fb80b6781837272..704b578a9965f4cdd9218f5caddf52bb0a8c74ff 100644
--- a/arch/arm/include/stm32/ltdc.h
+++ b/arch/arm/include/stm32/ltdc.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/include/stm32/ltdc.h
+ * arch/arm/include/stm32/ltdc.h
  *
  *   Copyright (C) 2014-2015 Marco Krahl. All rights reserved.
  *   Author: Marco Krahl 
diff --git a/arch/arm/include/stm32/stm32f10xxx_irq.h b/arch/arm/include/stm32/stm32f10xxx_irq.h
index 29f07b0fd8837e37be3182765bbe25130ef752e3..e56df1338e93ae326dcb9e882234ffbad42c2af5 100644
--- a/arch/arm/include/stm32/stm32f10xxx_irq.h
+++ b/arch/arm/include/stm32/stm32f10xxx_irq.h
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/include/stm32s/stm32f10xxx_irq.h
+ * arch/arm/include/stm32/stm32f10xxx_irq.h
  *
  *   Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -199,7 +199,7 @@
 #  define STM32_IRQ_ETH         (77) /* 61: Ethernet global interrupt */
 #  define STM32_IRQ_ETHWKUP     (78) /* 62: Ethernet Wakeup through EXTI line interrupt */
 #  define STM32_IRQ_CAN2TX      (79) /* 63: CAN2 TX interrupts */
-#  define STM32_IRQ_CAN2RX0     (70) /* 64: CAN2 RX0 interrupts */
+#  define STM32_IRQ_CAN2RX0     (80) /* 64: CAN2 RX0 interrupts */
 #  define STM32_IRQ_CAN2RX1     (81) /* 65: CAN2 RX1 interrupt */
 #  define STM32_IRQ_CAN2SCE     (82) /* 66: CAN2 SCE interrupt */
 #  define STM32_IRQ_OTGFS       (83) /* 67: USB On The Go FS global interrupt */
diff --git a/arch/arm/include/stm32/stm32f20xxx_irq.h b/arch/arm/include/stm32/stm32f20xxx_irq.h
index 43a2e218eb9ca9c329692e457834dbbe45b88867..1c5bc9480e15b43b715c5ca3aa4e006eefa63069 100644
--- a/arch/arm/include/stm32/stm32f20xxx_irq.h
+++ b/arch/arm/include/stm32/stm32f20xxx_irq.h
@@ -1,5 +1,5 @@
 /****************************************************************************************************
- * arch/arm/include/stm32s/stm32f20xxx_irq.h
+ * arch/arm/include/stm32/stm32f20xxx_irq.h
  *
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/arm/include/stm32/stm32f30xxx_irq.h b/arch/arm/include/stm32/stm32f30xxx_irq.h
index 74c8a279a65ecfad11406d4ee14b0b4b57ee416b..f109c8b85d7899cedff414af9c14eb1f958550d3 100644
--- a/arch/arm/include/stm32/stm32f30xxx_irq.h
+++ b/arch/arm/include/stm32/stm32f30xxx_irq.h
@@ -1,5 +1,5 @@
 /****************************************************************************************************
- * arch/arm/include/stm32s/stm32f30xxx_irq.h
+ * arch/arm/include/stm32/stm32f30xxx_irq.h
  *
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/arm/include/stm32/stm32f33xxx_irq.h b/arch/arm/include/stm32/stm32f33xxx_irq.h
new file mode 100644
index 0000000000000000000000000000000000000000..7170959ec93f8734ec49c4a40e5112b350756941
--- /dev/null
+++ b/arch/arm/include/stm32/stm32f33xxx_irq.h
@@ -0,0 +1,185 @@
+/****************************************************************************************************
+ * arch/arm/include/stm32/stm32f33xxx_irq.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *   Modified for STM32F334 by Mateusz Szafoni 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly through nuttx/irq.h */
+
+#ifndef __ARCH_ARM_INCLUDE_STM32_STM32F33XXX_IRQ_H
+#define __ARCH_ARM_INCLUDE_STM32_STM32F33XXX_IRQ_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+/* IRQ numbers.  The IRQ number corresponds vector number and hence map directly to
+ * bits in the NVIC.  This does, however, waste several words of memory in the IRQ
+ * to handle mapping tables.
+ *
+ * Processor Exceptions (vectors 0-15).  These common definitions can be found
+ * in nuttx/arch/arm/include/stm32/irq.h
+ *
+ * External interrupts (vectors >= 16)
+ */
+
+#define STM32_IRQ_WWDG        (STM32_IRQ_FIRST+0)  /* 0:  Window Watchdog interrupt */
+#define STM32_IRQ_PVD         (STM32_IRQ_FIRST+1)  /* 1:  PVD through EXTI Line detection interrupt */
+#define STM32_IRQ_TAMPER      (STM32_IRQ_FIRST+2)  /* 2:  Tamper interrupt, or */
+#define STM32_IRQ_TIMESTAMP   (STM32_IRQ_FIRST+2)  /* 2:  Time stamp interrupt */
+#define STM32_IRQ_RTC_WKUP    (STM32_IRQ_FIRST+3)  /* 3:  RTC global interrupt */
+#define STM32_IRQ_FLASH       (STM32_IRQ_FIRST+4)  /* 4:  Flash global interrupt */
+#define STM32_IRQ_RCC         (STM32_IRQ_FIRST+5)  /* 5:  RCC global interrupt */
+#define STM32_IRQ_EXTI0       (STM32_IRQ_FIRST+6)  /* 6:  EXTI Line 0 interrupt */
+#define STM32_IRQ_EXTI1       (STM32_IRQ_FIRST+7)  /* 7:  EXTI Line 1 interrupt */
+#define STM32_IRQ_EXTI2       (STM32_IRQ_FIRST+8)  /* 8:  EXTI Line 2 interrupt, or */
+#define STM32_IRQ_TSC         (STM32_IRQ_FIRST+8)  /* 8:  TSC interrupt */
+#define STM32_IRQ_EXTI3       (STM32_IRQ_FIRST+9)  /* 9:  EXTI Line 3 interrupt */
+#define STM32_IRQ_EXTI4       (STM32_IRQ_FIRST+10) /* 10: EXTI Line 4 interrupt */
+#define STM32_IRQ_DMA1CH1     (STM32_IRQ_FIRST+11) /* 11: DMA1 channel 1 global interrupt */
+#define STM32_IRQ_DMA1CH2     (STM32_IRQ_FIRST+12) /* 12: DMA1 channel 2 global interrupt */
+#define STM32_IRQ_DMA1CH3     (STM32_IRQ_FIRST+13) /* 13: DMA1 channel 3 global interrupt */
+#define STM32_IRQ_DMA1CH4     (STM32_IRQ_FIRST+14) /* 14: DMA1 channel 4 global interrupt */
+#define STM32_IRQ_DMA1CH5     (STM32_IRQ_FIRST+15) /* 15: DMA1 channel 5 global interrupt */
+#define STM32_IRQ_DMA1CH6     (STM32_IRQ_FIRST+16) /* 16: DMA1 channel 6 global interrupt */
+#define STM32_IRQ_DMA1CH7     (STM32_IRQ_FIRST+17) /* 17: DMA1 channel 7 global interrupt */
+#define STM32_IRQ_ADC12       (STM32_IRQ_FIRST+18) /* 18: ADC1/ADC2 global interrupt */
+#define STM32_IRQ_CAN1TX      (STM32_IRQ_FIRST+19) /* 19: CAN1 TX interrupts */
+#define STM32_IRQ_CAN1RX0     (STM32_IRQ_FIRST+20) /* 20: CAN1 RX0 interrupts*/
+#define STM32_IRQ_CAN1RX1     (STM32_IRQ_FIRST+21) /* 21: CAN1 RX1 interrupt */
+#define STM32_IRQ_CAN1SCE     (STM32_IRQ_FIRST+22) /* 22: CAN1 SCE interrupt */
+#define STM32_IRQ_EXTI95      (STM32_IRQ_FIRST+23) /* 23: EXTI Line[9:5] interrupts */
+#define STM32_IRQ_TIM1BRK     (STM32_IRQ_FIRST+24) /* 24: TIM1 Break interrupt, or */
+#define STM32_IRQ_TIM15       (STM32_IRQ_FIRST+24) /* 24: TIM15 global interrupt */
+#define STM32_IRQ_TIM1UP      (STM32_IRQ_FIRST+25) /* 25: TIM1 Update interrupt, or */
+#define STM32_IRQ_TIM16       (STM32_IRQ_FIRST+25) /* 25: TIM16 global interrupt */
+#define STM32_IRQ_TIM1TRGCOM  (STM32_IRQ_FIRST+26) /* 26: TIM1 Trigger and Commutation interrupts, or */
+#define STM32_IRQ_TIM17       (STM32_IRQ_FIRST+26) /* 26: TIM17 global interrupt */
+#define STM32_IRQ_TIM1CC      (STM32_IRQ_FIRST+27) /* 27: TIM1 Capture Compare interrupt */
+#define STM32_IRQ_TIM2        (STM32_IRQ_FIRST+28) /* 28: TIM2 global interrupt */
+#define STM32_IRQ_TIM3        (STM32_IRQ_FIRST+29) /* 29: TIM3 global interrupt */
+#define STM32_IRQ_RESERVED30  (STM32_IRQ_FIRST+30) /* 30: Reserved */
+#define STM32_IRQ_I2C1EV      (STM32_IRQ_FIRST+31) /* 31: I2C1 event interrupt */
+#define STM32_IRQ_I2C1ER      (STM32_IRQ_FIRST+32) /* 32: I2C1 error interrupt */
+#define STM32_IRQ_RESERVED33  (STM32_IRQ_FIRST+33) /* 33: Reserved */
+#define STM32_IRQ_RESERVED34  (STM32_IRQ_FIRST+34) /* 34: Reserved */
+#define STM32_IRQ_SPI1        (STM32_IRQ_FIRST+35) /* 35: SPI1 global interrupt */
+#define STM32_IRQ_RESERVED36  (STM32_IRQ_FIRST+36) /* 36: Reserved */
+#define STM32_IRQ_USART1      (STM32_IRQ_FIRST+37) /* 37: USART1 global interrupt */
+#define STM32_IRQ_USART2      (STM32_IRQ_FIRST+38) /* 38: USART2 global interrupt */
+#define STM32_IRQ_USART3      (STM32_IRQ_FIRST+39) /* 39: USART3 global interrupt */
+#define STM32_IRQ_EXTI1510    (STM32_IRQ_FIRST+40) /* 40: EXTI Line[15:10] interrupts */
+#define STM32_IRQ_RTCALRM     (STM32_IRQ_FIRST+41) /* 41: RTC alarm through EXTI line interrupt */
+#define STM32_IRQ_RESERVED42  (STM32_IRQ_FIRST+42) /* 42: Reserved */
+#define STM32_IRQ_RESERVED43  (STM32_IRQ_FIRST+43) /* 43: Reserved */
+#define STM32_IRQ_RESERVED44  (STM32_IRQ_FIRST+44) /* 44: Reserved */
+#define STM32_IRQ_RESERVED45  (STM32_IRQ_FIRST+45) /* 45: Reserved */
+#define STM32_IRQ_RESERVED46  (STM32_IRQ_FIRST+46) /* 46: Reserved */
+#define STM32_IRQ_RESERVED47  (STM32_IRQ_FIRST+47) /* 47: Reserved */
+#define STM32_IRQ_RESERVED48  (STM32_IRQ_FIRST+48) /* 48: Reserved */
+#define STM32_IRQ_RESERVED49  (STM32_IRQ_FIRST+49) /* 49: Reserved */
+#define STM32_IRQ_RESERVED50  (STM32_IRQ_FIRST+50) /* 50: Reserved */
+#define STM32_IRQ_RESERVED51  (STM32_IRQ_FIRST+51) /* 51: Reserved */
+#define STM32_IRQ_RESERVED52  (STM32_IRQ_FIRST+52) /* 52: Reserved */
+#define STM32_IRQ_RESERVED53  (STM32_IRQ_FIRST+53) /* 53: Reserved */
+#define STM32_IRQ_TIM6        (STM32_IRQ_FIRST+54) /* 54: TIM6 global interrupt, or */
+#define STM32_IRQ_DAC1        (STM32_IRQ_FIRST+54) /* 54: DAC1 underrun error interrupts */
+#define STM32_IRQ_TIM7        (STM32_IRQ_FIRST+55) /* 55: TIM7 global interrupt, or */
+#define STM32_IRQ_DAC2        (STM32_IRQ_FIRST+54) /* 55: DAC2 underrun error interrupts */
+#define STM32_IRQ_RESERVED56  (STM32_IRQ_FIRST+56) /* 56: Reserved */
+#define STM32_IRQ_RESERVED57  (STM32_IRQ_FIRST+57) /* 57: Reserved */
+#define STM32_IRQ_RESERVED58  (STM32_IRQ_FIRST+58) /* 58: Reserved */
+#define STM32_IRQ_RESERVED59  (STM32_IRQ_FIRST+59) /* 59: Reserved */
+#define STM32_IRQ_RESERVED60  (STM32_IRQ_FIRST+60) /* 60: Reserved */
+#define STM32_IRQ_RESERVED61  (STM32_IRQ_FIRST+61) /* 61: Reserved */
+#define STM32_IRQ_RESERVED62  (STM32_IRQ_FIRST+62) /* 62: Reserved */
+#define STM32_IRQ_RESERVED63  (STM32_IRQ_FIRST+63) /* 63: Reserved */
+#define STM32_IRQ_COMP2       (STM32_IRQ_FIRST+64) /* 64: COMP2 interrupts, or */
+#define STM32_IRQ_EXTI2129    (STM32_IRQ_FIRST+64) /* 64: EXTI Lines 21, 22 and 29 interrupts */
+#define STM32_IRQ_COMP46      (STM32_IRQ_FIRST+65) /* 65: COMP4 & COMP6 interrupts, or */
+#define STM32_IRQ_EXTI3012    (STM32_IRQ_FIRST+65) /* 65: EXTI Lines 30, 31 and 32 interrupts */
+#define STM32_IRQ_RESERVED66  (STM32_IRQ_FIRST+66) /* 66: Reserved */
+#define STM32_IRQ_HRTIMTM     (STM32_IRQ_FIRST+67) /* 67: HRTIM master timer interrupt */
+#define STM32_IRQ_HRTIMTA     (STM32_IRQ_FIRST+68) /* 68: HRTIM timer A interrupt */
+#define STM32_IRQ_HRTIMTB     (STM32_IRQ_FIRST+69) /* 69: HRTIM timer B interrupt */
+#define STM32_IRQ_HRTIMTC     (STM32_IRQ_FIRST+70) /* 70: HRTIM timer C interrupt */
+#define STM32_IRQ_HRTIMTD     (STM32_IRQ_FIRST+71) /* 71: HRTIM timer D interrupt */
+#define STM32_IRQ_HRTIMTE     (STM32_IRQ_FIRST+72) /* 72: HRTIM timer E interrupt */
+#define STM32_IRQ_HRTIMFLT    (STM32_IRQ_FIRST+73) /* 73: HRTIM fault interrupt */
+#define STM32_IRQ_RESERVED74  (STM32_IRQ_FIRST+74) /* 74: Reserved */
+#define STM32_IRQ_RESERVED75  (STM32_IRQ_FIRST+75) /* 75: Reserved */
+#define STM32_IRQ_RESERVED76  (STM32_IRQ_FIRST+76) /* 76: Reserved */
+#define STM32_IRQ_RESERVED77  (STM32_IRQ_FIRST+77) /* 77: Reserved */
+#define STM32_IRQ_RESERVED78  (STM32_IRQ_FIRST+78) /* 78: Reserved */
+#define STM32_IRQ_RESERVED79  (STM32_IRQ_FIRST+79) /* 79: Reserved */
+#define STM32_IRQ_RESERVED80  (STM32_IRQ_FIRST+80) /* 80: Reserved */
+#define STM32_IRQ_FPU         (STM32_IRQ_FIRST+81) /* 81: FPU global interrupt */
+
+#define NR_VECTORS            (STM32_IRQ_FIRST+82)
+#define NR_IRQS               (STM32_IRQ_FIRST+82)
+
+/****************************************************************************************************
+ * Public Types
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public Data
+****************************************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************************************
+ * Public Functions
+ ****************************************************************************************************/
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_ARM_INCLUDE_STM32F30XXX_IRQ_H */
diff --git a/arch/arm/include/stm32/stm32f37xxx_irq.h b/arch/arm/include/stm32/stm32f37xxx_irq.h
index 22456683bc3bcaae51a78028f9a0395f1d9a6946..4f8a431bf9d3a60650cbbbcaf48c170192d345e6 100644
--- a/arch/arm/include/stm32/stm32f37xxx_irq.h
+++ b/arch/arm/include/stm32/stm32f37xxx_irq.h
@@ -1,5 +1,5 @@
 /****************************************************************************************************
- * arch/arm/include/stm32s/stm32f37xxx_irq.h
+ * arch/arm/include/stm32/stm32f37xxx_irq.h
  *
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/arm/include/stm32/stm32f40xxx_irq.h b/arch/arm/include/stm32/stm32f40xxx_irq.h
index b0499b6ba32bf3285545fb89bdc95e743345d0d6..64df1a6fe5752554ceb31090e22eaed3b6f3af7d 100644
--- a/arch/arm/include/stm32/stm32f40xxx_irq.h
+++ b/arch/arm/include/stm32/stm32f40xxx_irq.h
@@ -1,5 +1,5 @@
 /****************************************************************************************************
- * arch/arm/include/stm32s/stm32f40xxx_irq.h
+ * arch/arm/include/stm32/stm32f40xxx_irq.h
  *
  *   Copyright (C) 2009, 2014-2015 Gregory Nutt. All rights reserved.
  *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
diff --git a/arch/arm/include/stm32/stm32l15xxx_irq.h b/arch/arm/include/stm32/stm32l15xxx_irq.h
index ca692932f9be8e49f9be0bc23a7f844a3f4f0bba..d0c1380c8783149d36af1ebb0a6bd741564bffb1 100644
--- a/arch/arm/include/stm32/stm32l15xxx_irq.h
+++ b/arch/arm/include/stm32/stm32l15xxx_irq.h
@@ -1,5 +1,5 @@
 /****************************************************************************************************
- * arch/arm/include/stm32s/stm32l15xxx_irq.h
+ * arch/arm/include/stm32/stm32l15xxx_irq.h
  * For STM32L100xx, STM32L151xx, STM32L152xx and STM32L162xx advanced ARM-based 32-bit MCUs
  *
  *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
diff --git a/arch/arm/include/stm32f7/chip.h b/arch/arm/include/stm32f7/chip.h
index 372bd1143f4529271932312ce75e3bd89919a2f8..b3beb4e09e8697413a363f70b74df38caed19bb9 100644
--- a/arch/arm/include/stm32f7/chip.h
+++ b/arch/arm/include/stm32f7/chip.h
@@ -1,8 +1,9 @@
 /************************************************************************************
  * arch/arm/include/stm32f7/chip.h
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -45,99 +46,272 @@
 /************************************************************************************
  * Pre-processor Definitions
  ************************************************************************************/
-/* STM32F745xx, STM32F746xx, and STM32F56xx.  Differences between family members:
- *
- *   ----------- ---------------- ----- -------- ------------ --------
- *   PART        PACKAGE          GPIOs SPI/I2S  ADC CHANNELS LCD-TFT?
- *   ----------- ---------------- ----- -------- ------------ --------
- *   STM32F745Vx LQFP100            82   4/3         16         No
- *   STM32F745Zx WLCSP143/LQFP144  114   6/3         24         No
- *   STM32F745Ix UFBGA176/LQFP176  140   6/3         24         No
- *   STM32F745Bx LQFP208           168   6/3         24         No
- *   STM32F745Nx TFBGA216           68   6/3         24         No
- *
- *   STM32F746Vx LQFP100            82   4/3         16         Yes
- *   STM32F746Zx WLCSP143/LQFP144  114   6/3         24         Yes
- *   STM32F746Ix UFBGA176/LQFP176  140   6/3         24         Yes
- *   STM32F746Bx LQFP208           168   6/3         24         Yes
- *   STM32F746Nx TFBGA216          168   6/3         24         Yes
- *
- *   STM32F756Vx LQFP100            82   4/3         16         Yes
- *   STM32F756Zx WLCSP143/LQFP144  114   6/3         24         Yes
- *   STM32F756Ix UFBGA176/LQFP176  140   6/3         24         Yes
- *   STM32F756Bx LQFP208           168   6/3         24         Yes
- *   STM32F756Nx TFBGA216          168   6/3         24         Yes
- *   ----------- ---------------- ----- -------- ------------ --------
+/* STM32F745xx, STM32F746xx, STM32F756xx, STM32F765xx, STM32F767xx, STM32F768xx,
+ * STM32F769xx, STM32F777xx and STM32F779xx  Differences between family members:
+ *
+ *   ----------- ---------------- ----- ---- ----- ---- ---- ---- ---- ---- ----- ----- ---- ------------ ------
+ *                                       SPI   ADC LCD
+ *   PART        PACKAGE          GPIOs  I2S  CHAN TFT  MIPI JPEG CAN  ETH  DFSDM CRYPTO FPU      RAM      L1
+ *   ----------- ---------------- ----- ---- ----- ---- ---- ---- ---- ---- ----- ----- ---- ------------ ------
+ *   STM32F745Vx LQFP100            82   4/3   16   No   No   No   2   Yes   No    No   SFPU (240+16+64)  4+4
+ *   STM32F745Zx WLCSP143/LQFP144  114   6/3   24   No   No   No   2   Yes   No    No   SFPU (240+16+64)  4+4
+ *   STM32F745Ix UFBGA176/LQFP176  140   6/3   24   No   No   No   2   Yes   No    No   SFPU (240+16+64)  4+4
+ *   STM32F745Bx LQFP208           168   6/3   24   No   No   No   2   Yes   No    No   SFPU (240+16+64)  4+4
+ *   STM32F745Nx TFBGA216           68   6/3   24   No   No   No   2   Yes   No    No   SFPU (240+16+64)  4+4
+ *
+ *   STM32F746Vx LQFP100            82   4/3   16   Yes  No   No   2   Yes   No    No   SFPU (240+16+64)  4+4
+ *   STM32F746Zx WLCSP143/LQFP144  114   6/3   24   Yes  No   No   2   Yes   No    No   SFPU (240+16+64)  4+4
+ *   STM32F746Ix UFBGA176/LQFP176  140   6/3   24   Yes  No   No   2   Yes   No    No   SFPU (240+16+64)  4+4
+ *   STM32F746Bx LQFP208           168   6/3   24   Yes  No   No   2   Yes   No    No   SFPU (240+16+64)  4+4
+ *   STM32F746Nx TFBGA216          168   6/3   24   Yes  No   No   2   Yes   No    No   SFPU
+ *
+ *   STM32F756Vx LQFP100            82   4/3   16   Yes  No   No   2   Yes   No   Yes   SFPU (240+16+64)  4+4
+ *   STM32F756Zx WLCSP143/LQFP144  114   6/3   24   Yes  No   No   2   Yes   No   Yes   SFPU (240+16+64)  4+4
+ *   STM32F756Ix UFBGA176/LQFP176  140   6/3   24   Yes  No   No   2   Yes   No   Yes   SFPU (240+16+64)  4+4
+ *   STM32F756Bx LQFP208           168   6/3   24   Yes  No   No   2   Yes   No   Yes   SFPU (240+16+64)  4+4
+ *   STM32F756Nx TFBGA216          168   6/3   24   Yes  No   No   2   Yes   No   Yes   SFPU (240+16+64)  4+4
+ *
+ *   STM32F765Vx LQFP100            82   4/3   16   No   No   No   3   Yes   Yes   No   DFPU (368+16+128) 16+16
+ *   STM32F765Zx WLCSP143/LQFP144  114   6/3   24   No   No   No   3   Yes   Yes   No   DFPU (368+16+128) 16+16
+ *   STM32F765Ix UFBGA176/LQFP176  140   6/3   24   No   No   No   3   Yes   Yes   No   DFPU (368+16+128) 16+16
+ *   STM32F765Bx LQFP208           168   6/3   24   No   No   No   3   Yes   Yes   No   DFPU (368+16+128) 16+16
+ *   STM32F765Nx TFBGA216          168   6/3   24   No   No   No   3   Yes   Yes   No   DFPU (368+16+128) 16+16
+ *
+ *   STM32F767Vx LQFP100            82   4/3   16   Yes  No   Yes  3   Yes   Yes   No   DFPU (368+16+128) 16+16
+ *   STM32F767Zx WLCSP143/LQFP144  114   6/3   24   Yes  No   Yes  3   Yes   Yes   No   DFPU (368+16+128) 16+16
+ *   STM32F767Ix UFBGA176/LQFP176  132   6/3   24   Yes  Yes  Yes  3   Yes   Yes   No   DFPU (368+16+128) 16+16
+ *   STM32F767Bx LQFP208           168   6/3   24   Yes  Yes  Yes  3   Yes   Yes   No   DFPU (368+16+128) 16+16
+ *   STM32F767Nx TFBGA216          159   6/3   24   Yes  Yes  Yes  3   Yes   Yes   No   DFPU (368+16+128) 16+16
+ *
+ *   STM32F768Ax WLCSP180          129   6/3   24   Yes  Yes  Yes  3   No    Yes   No   DFPU (368+16+128) 16+16
+ *
+ *   STM32F769Vx LQFP100            82   4/3   16   Yes  No   Yes  3   Yes   Yes   No   DFPU (368+16+128) 16+16
+ *   STM32F769Zx LQFP144           114   6/3   24   Yes  No   Yes  3   Yes   Yes   No   DFPU (368+16+128) 16+16
+ *   STM32F769Ix UFBGA176/LQFP176  132   6/3   24   Yes  Yes  Yes  3   Yes   Yes   No   DFPU (368+16+128) 16+16
+ *   STM32F769Bx LQFP208           168   6/3   24   Yes  Yes  Yes  3   Yes   Yes   No   DFPU (368+16+128) 16+16
+ *   STM32F769Nx TFBGA216          159   6/3   24   Yes  Yes  Yes  3   Yes   Yes   No   DFPU (368+16+128) 16+16
+ *
+ *   STM32F769Ax WLCSP180          129   6/3   24   Yes  Yes  Yes  3   No    Yes   No   DFPU (368+16+128) 16+16
+ *
+ *   STM32F777Vx LQFP100            82   4/3   16   Yes  No   Yes  3   Yes   Yes   Yes  DFPU (368+16+128) 16+16
+ *   STM32F777Zx LQFP144           114   6/3   24   Yes  No   Yes  3   Yes   Yes   Yes  DFPU (368+16+128) 16+16
+ *   STM32F777Ix UFBGA176/LQFP176  132   6/3   24   Yes  Yes  Yes  3   Yes   Yes   Yes  DFPU (368+16+128) 16+16
+ *   STM32F777Bx LQFP208           159   6/3   24   Yes  Yes  Yes  3   Yes   Yes   Yes  DFPU (368+16+128) 16+16
+ *   STM32F777Nx TFBGA216          159   6/3   24   Yes  Yes  Yes  3   Yes   Yes   Yes  DFPU (368+16+128) 16+16
+ *
+ *   STM32F778Ax WLCSP180          129   6/3   24   Yes  Yes  Yes  3   No    Yes   Yes  DFPU (368+16+128) 16+16
+ *
+ *   STM32F779Ix UFBGA176/LQFP176  132   6/3   24   Yes  Yes  Yes  3   Yes   Yes   Yes  DFPU (368+16+128) 16+16
+ *   STM32F779Bx LQFP208           159   6/3   24   Yes  Yes  Yes  3   Yes   Yes   Yes  DFPU (368+16+128) 16+16
+ *   STM32F779Nx TFBGA216          159   6/3   24   Yes  Yes  Yes  3   Yes   Yes   Yes  DFPU (368+16+128) 16+16
+
+ *   STM32F779Ax WLCSP180          129   6/3   24   Yes  Yes  Yes  3   No    Yes   Yes  DFPU (368+16+128) 16+16
+ *   ----------- ---------------- ----- ---- ----- ---- ---- ---- ---- ---- ----- ----- ---- ------------ ------
  *
  * Parts STM32F74xxE have 512Kb of FLASH
  * Parts STM32F74xxG have 1024Kb of FLASH
+ * Parts STM32F74xxI have 2048Kb of FLASH
+ *
+ * The correct FLASH size will be set CONFIG_STM32F7_FLASH_CONFIG_x or overridden
+ * with CONFIG_STM32F7_FLASH_OVERRIDE_x
  *
- * The correct FLASH size must be set with a CONFIG_STM32F7_FLASH_*KB
- * selection.
  */
+#if defined(CONFIG_ARCH_CHIP_STM32F745VG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F745VE) || \
+  defined(CONFIG_ARCH_CHIP_STM32F745IG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F745IE) || \
+  defined(CONFIG_ARCH_CHIP_STM32F745ZE) || \
+  defined(CONFIG_ARCH_CHIP_STM32F745ZG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F746BG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F746VG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F746VE) || \
+  defined(CONFIG_ARCH_CHIP_STM32F746BE) || \
+  defined(CONFIG_ARCH_CHIP_STM32F746ZG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F746IE) || \
+  defined(CONFIG_ARCH_CHIP_STM32F746NG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F746NE) || \
+  defined(CONFIG_ARCH_CHIP_STM32F746ZE) || \
+  defined(CONFIG_ARCH_CHIP_STM32F746IG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F756NG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F756BG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F756IG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F756VG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F756ZG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F765NI) || \
+  defined(CONFIG_ARCH_CHIP_STM32F765VI) || \
+  defined(CONFIG_ARCH_CHIP_STM32F765VG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F765BI) || \
+  defined(CONFIG_ARCH_CHIP_STM32F765NG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F765ZG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F765ZI) || \
+  defined(CONFIG_ARCH_CHIP_STM32F765IG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F765BG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F765II) || \
+  defined(CONFIG_ARCH_CHIP_STM32F767NG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F767IG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F767VG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F767ZG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F767NI) || \
+  defined(CONFIG_ARCH_CHIP_STM32F767VI) || \
+  defined(CONFIG_ARCH_CHIP_STM32F767BG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F767ZI) || \
+  defined(CONFIG_ARCH_CHIP_STM32F767II) || \
+  defined(CONFIG_ARCH_CHIP_STM32F769BI) || \
+  defined(CONFIG_ARCH_CHIP_STM32F769II) || \
+  defined(CONFIG_ARCH_CHIP_STM32F769BG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F769NI) || \
+  defined(CONFIG_ARCH_CHIP_STM32F769AI) || \
+  defined(CONFIG_ARCH_CHIP_STM32F769NG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F769IG) || \
+  defined(CONFIG_ARCH_CHIP_STM32F777ZI) || \
+  defined(CONFIG_ARCH_CHIP_STM32F777VI) || \
+  defined(CONFIG_ARCH_CHIP_STM32F777NI) || \
+  defined(CONFIG_ARCH_CHIP_STM32F777BI) || \
+  defined(CONFIG_ARCH_CHIP_STM32F777II) || \
+  defined(CONFIG_ARCH_CHIP_STM32F778AI) || \
+  defined(CONFIG_ARCH_CHIP_STM32F779II) || \
+  defined(CONFIG_ARCH_CHIP_STM32F779NI) || \
+  defined(CONFIG_ARCH_CHIP_STM32F779BI) || \
+  defined(CONFIG_ARCH_CHIP_STM32F779AI)
+#else
+#  error STM32 F7 chip not identified
+#endif
 
-#if defined(CONFIG_ARCH_CHIP_STM32F745) || defined(CONFIG_ARCH_CHIP_STM32F746) || \
-    defined(CONFIG_ARCH_CHIP_STM32F756)
-
-#if defined(CONFIG_ARCH_CHIP_STM32F745)
-#  define STM32F7_STM32F745XX              1   /* STM32F745xx family */
-#  undef  STM32F7_STM32F746XX                  /* Not STM32F746xx family */
-#  undef  STM32F7_STM32F756XX                  /* Not STM32F756xx family */
-
-#  define STM32F7_NLCDTFT                  0   /* No LCD-TFT */
-
-#elif  defined(CONFIG_ARCH_CHIP_STM32F746)
-
-#  undef  STM32F7_STM32F745XX                  /* Not STM32F745xx family */
-#  define STM32F7_STM32F746XX              1   /* STM32F746xx family */
-#  undef  STM32F7_STM32F756XX                  /* Not STM32F756xx family */
-
-#  define STM32F7_NLCDTFT                  1   /* One LCD-TFT */
-
-#else /* if  defined(CONFIG_ARCH_CHIP_STM32F746) */
-
-#  undef  STM32F7_STM32F745XX                  /* Not STM32F745xx family */
-#  undef  STM32F7_STM32F746XX                  /* Not STM32F746xx family */
-#  define STM32F7_STM32F756XX              1   /* STM32F756xx family */
+/* Size SRAM */
 
-#  define STM32F7_NLCDTFT                  1   /* One LCD-TFT */
+#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
+#    define STM32F7_SRAM1_SIZE            (240*1024)  /* 240Kb SRAM1 on AHB bus Matrix */
+#    define STM32F7_SRAM2_SIZE            (16*1024)   /* 16Kb SRAM2 on AHB bus Matrix */
+#  if defined(CONFIG_ARMV7M_HAVE_DTCM)
+#      define STM32F7_DTCM_SRAM_SIZE      (64*1024)   /* 64Kb DTCM SRAM on TCM interface */
+#  else
+#      define STM32F7_DTCM_SRAM_SIZE      (0)         /* No DTCM SRAM on TCM interface */
+#  endif
+#  if defined(CONFIG_ARMV7M_HAVE_ITCM)
+#      define STM32F7_ITCM_SRAM_SIZE      (16*1024)   /* 16Kb ITCM SRAM on TCM interface */
+#  else
+#      define STM32F7_ITCM_SRAM_SIZE      (0)         /* No ITCM SRAM on TCM interface */
+#  endif
+#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77X)
+#    define STM32F7_SRAM1_SIZE            (368*1024)  /* 368Kb SRAM1 on AHB bus Matrix */
+#    define STM32F7_SRAM2_SIZE            (16*1024)   /* 16Kb SRAM2 on AHB bus Matrix */
+#  if defined(CONFIG_ARMV7M_HAVE_DTCM)
+#      define STM32F7_DTCM_SRAM_SIZE      (128*1024)  /* 128Kb DTCM SRAM on TCM interface */
+#  else
+#      define STM32F7_DTCM_SRAM_SIZE      (0)         /* No DTCM SRAM on TCM interface */
+#  endif
+#  if defined(CONFIG_ARMV7M_HAVE_ITCM)
+#      define STM32F7_ITCM_SRAM_SIZE      (16*1024)   /* 16Kb ITCM SRAM on TCM interface */
+#  else
+#      define STM32F7_ITCM_SRAM_SIZE      (0)         /* No ITCM SRAM on TCM interface */
+#  endif
+#else
+#  error STM32 F7 chip Family not identified
 #endif
 
-#  define STM32F7_SRAM1_SIZE      (240*1024)   /* 240Kb SRAM1 on AHB bus Matrix */
-#  define STM32F7_SRAM2_SIZE       (16*1024)   /* 16Kb SRAM2 on AHB bus Matrix */
-#  define STM32F7_DTCM_SRAM_SIZE   (64*1024)   /* 64Kb DTCM SRAM on TCM inerface */
-#  define STM32F7_ITCM_SRAM_SIZE   (16*1024)   /* 16Kb ITCM SRAM on TCM inerface */
+/* Common to all Family members */
 
-#  define STM32F7_NFSMC                    1   /* Have FSMC memory controller */
-#  define STM32F7_NETHERNET                1   /* 100/100 Ethernet MAC */
 #  define STM32F7_NATIM                    2   /* Two advanced timers TIM1 and 8 */
 #  define STM32F7_NGTIM32                  2   /* 32-bit general timers TIM2 and 5 with DMA */
 #  define STM32F7_NGTIM16                  2   /* 16-bit general timers TIM3 and 4 with DMA */
 #  define STM32F7_NGTIMNDMA                6   /* 16-bit general timers TIM9-14 without DMA */
 #  define STM32F7_NBTIM                    2   /* Two basic timers, TIM6-7 */
-#  define STM32F7_NRNG                     1   /* Random number generator (RNG) */
 #  define STM32F7_NUART                    4   /* UART 4-5 and 7-8 */
 #  define STM32F7_NUSART                   4   /* USART1-3 and 6 */
-#  define STM32F7_NSPI                     6   /* SPI1-6 (Except V series) */
 #  define STM32F7_NI2S                     3   /* I2S1-2 (multiplexed with SPI1-3) */
 #  define STM32F7_NI2C                     4   /* I2C1-4 */
 #  define STM32F7_NUSBOTGFS                1   /* USB OTG FS */
 #  define STM32F7_NUSBOTGHS                1   /* USB OTG HS */
-#  define STM32F7_NCAN                     2   /* CAN1-2 */
 #  define STM32F7_NSAI                     2   /* SAI1-2 */
 #  define STM32F7_NSPDIFRX                 4   /* 4 SPDIFRX inputs */
-#  define STM32F7_NSDMMC                   1   /* SDMMC interface */
-#  define STM32F7_NDCMI                    1   /* Digital camera interface (DCMI) */
 #  define STM32F7_NDMA                     2   /* DMA1-2 */
-#  define STM32F7_NDMA2D                   1   /* DChrom-ART Accelerator™ (DMA2D) */
 #  define STM32F7_NGPIO                   11   /* 11 GPIO ports, GPIOA-K */
 #  define STM32F7_NADC                     3   /* 12-bit ADC1-3, 24 channels *except V series) */
 #  define STM32F7_NDAC                     2   /* 12-bit DAC1-2 */
 #  define STM32F7_NCAPSENSE                0   /* No capacitive sensing channels */
 #  define STM32F7_NCRC                     1   /* CRC */
 
+/* TBD FPU Configuration */
+
+#if defined(CONFIG_ARCH_HAVE_FPU)
 #else
-#  error STM32 F7 chip not identified
+#endif
+
+#if defined(CONFIG_ARCH_HAVE_DPFPU)
+#else
+#endif
+
+/* Diversification based on Family and package */
+
+#if defined(CONFIG_STM32F7_HAVE_FSMC)
+#  define STM32F7_NFSMC                    1   /* Have FSMC memory controller */
+#else
+#  define STM32F7_NFSMC                    0   /* No FSMC memory controller */
+#endif
+#if defined(CONFIG_STM32F7_HAVE_ETHRNET)
+#  define STM32F7_NETHERNET                1   /* 100/100 Ethernet MAC */
+#else
+#  define STM32F7_NETHERNET                0   /* No 100/100 Ethernet MAC */
+#endif
+#if defined(CONFIG_STM32F7_HAVE_RNG)
+#  define STM32F7_NRNG                     1   /* Random number generator (RNG) */
+#else
+#  define STM32F7_NRNG                     0   /* No Random number generator (RNG) */
+#endif
+#if defined(CONFIG_STM32F7_HAVE_SPI5) && defined(CONFIG_STM32F7_HAVE_SPI6)
+#  define STM32F7_NSPI                     6   /* SPI1-6 (Except V series) */
+#else
+#  define STM32F7_NSPI                     4   /* SPI1-4 V series */
+#endif
+#if defined(CONFIG_STM32F7_HAVE_SDMMC2)
+#  define STM32F7_NSDMMC                   2   /* 2 SDMMC interfaces */
+#else
+#  define STM32F7_NSDMMC                   1   /* 1 SDMMC interface */
+#endif
+#if defined(CONFIG_STM32F7_HAVE_CAN3)
+#  define STM32F7_NCAN                     3   /* CAN1-3 */
+#else
+#  define STM32F7_NCAN                     2   /* CAN1-2 */
+#endif
+#if defined(CONFIG_STM32F7_HAVE_DCMI)
+#  define STM32F7_NDCMI                    1   /* Digital camera interface (DCMI) */
+#else
+#  define STM32F7_NDCMI                    0   /* No Digital camera interface (DCMI) */
+#endif
+#if defined(CONFIG_STM32F7_HAVE_DSIHOST)
+#  define STM32F7_NDSIHOST                 1   /* Have MIPI DSI Host */
+#else
+#  define STM32F7_NDSIHOST                 0   /* No MIPI DSI Host */
+#endif
+#if defined (CONFIG_STM32F7_HAVE_LTDC)
+#  define STM32F7_NLCDTFT                  1   /* One LCD-TFT */
+#else
+#  define STM32F7_NLCDTFT                  0   /* No LCD-TFT */
+#endif
+#if defined(CONFIG_STM32F7_HAVE_DMA2D)
+#  define STM32F7_NDMA2D                   0   /* No DChrom-ART Accelerator™ (DMA2D) */
+#else
+#  define STM32F7_NDMA2D                   1   /* DChrom-ART Accelerator™ (DMA2D) */
+#endif
+#if defined(CONFIG_STM32F7_HAVE_JPEG)
+#define STM32F7_NJPEG                      1   /* One JPEG Converter */
+#else
+#define STM32F7_NJPEG                      0   /* No JPEG Converter */
+#endif
+#if defined(CONFIG_STM32F7_HAVE_CRYP)
+#define STM32F7_NCRYP                      1   /* One CRYP engine */
+#else
+#define STM32F7_NCRYP                      0   /* No  CRYP engine */
+#endif
+#if defined(CONFIG_STM32F7_HAVE_HASH)
+#define STM32F7_NHASH                      1   /* One HASH engine */
+#else
+#define STM32F7_NHASH                      0   /* No HASH engine */
+#endif
+#if defined(CONFIG_STM32F7_HAVE_DFSDM)
+#define STM32F7_NDFSDM                     4   /* One set of 4 Digital filters */
+#else
+#define STM32F7_NDFSDM                     0   /* No Digital filters */
 #endif
 
 /* NVIC priority levels *************************************************************/
diff --git a/arch/arm/include/stm32f7/irq.h b/arch/arm/include/stm32f7/irq.h
index 5a5c710803668cca2b371ceaca5c60d89b510c5a..f09659190b74a2f4078b0c0df1f5f31cbcfe2389 100644
--- a/arch/arm/include/stm32f7/irq.h
+++ b/arch/arm/include/stm32f7/irq.h
@@ -57,7 +57,7 @@
 
 /* Processor Exceptions (vectors 0-15) */
 
-#define STM32_IRQ_RESERVED       (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define STM32_IRQ_RESERVED       (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
                                      /* Vector  0: Reset stack pointer value */
                                      /* Vector  1: Reset (not handler as an IRQ) */
 #define STM32_IRQ_NMI            (2) /* Vector  2: Non-Maskable Interrupt (NMI) */
@@ -78,6 +78,8 @@
 
 #if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
 #  include 
+#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+#  include 
 #else
 #  error "Unsupported STM32 F7 chip"
 #endif
diff --git a/arch/arm/include/stm32f7/stm32f76xx77xx_irq.h b/arch/arm/include/stm32f7/stm32f76xx77xx_irq.h
new file mode 100644
index 0000000000000000000000000000000000000000..6c0461f9ef22bb07ef8381ebdcb1cc86c28eaee8
--- /dev/null
+++ b/arch/arm/include/stm32f7/stm32f76xx77xx_irq.h
@@ -0,0 +1,215 @@
+/****************************************************************************************************
+ * arch/arm/include/stm32f7/stm32f76xx77xx_irq.h.h
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly through arch/irq.h */
+
+#ifndef __ARCH_ARM_INCLUDE_STM32F7_STM32F76XX77XX_IRQ_H
+#define __ARCH_ARM_INCLUDE_STM32F7_STM32F76XX77XX_IRQ_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include 
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+/* IRQ numbers.  The IRQ number corresponds vector number and hence map directly to bits in the
+ * NVIC.  This does, however, waste several words of memory in the IRQ to handle mapping tables.
+ *
+ * Processor Exceptions (vectors 0-15).  These common definitions can be found in the file
+ * nuttx/arch/arm/include/stm32f7/irq.h which includes this file
+ *
+ * External interrupts (vectors >= 16)
+ */
+
+#define STM32_IRQ_WWDG        (STM32_IRQ_FIRST+0)  /* 0:  Window Watchdog interrupt */
+#define STM32_IRQ_PVD         (STM32_IRQ_FIRST+1)  /* 1:  PVD through EXTI Line detection interrupt */
+#define STM32_IRQ_TAMPER      (STM32_IRQ_FIRST+2)  /* 2:  Tamper and time stamp interrupts */
+#define STM32_IRQ_TIMESTAMP   (STM32_IRQ_FIRST+2)  /* 2:  Tamper and time stamp interrupts */
+#define STM32_IRQ_RTC_WKUP    (STM32_IRQ_FIRST+3)  /* 3:  RTC global interrupt */
+#define STM32_IRQ_FLASH       (STM32_IRQ_FIRST+4)  /* 4:  Flash global interrupt */
+#define STM32_IRQ_RCC         (STM32_IRQ_FIRST+5)  /* 5:  RCC global interrupt */
+#define STM32_IRQ_EXTI0       (STM32_IRQ_FIRST+6)  /* 6:  EXTI Line 0 interrupt */
+#define STM32_IRQ_EXTI1       (STM32_IRQ_FIRST+7)  /* 7:  EXTI Line 1 interrupt */
+#define STM32_IRQ_EXTI2       (STM32_IRQ_FIRST+8)  /* 8:  EXTI Line 2 interrupt */
+#define STM32_IRQ_EXTI3       (STM32_IRQ_FIRST+9)  /* 9:  EXTI Line 3 interrupt */
+#define STM32_IRQ_EXTI4       (STM32_IRQ_FIRST+10) /* 10: EXTI Line 4 interrupt */
+#define STM32_IRQ_DMA1S0      (STM32_IRQ_FIRST+11) /* 11: DMA1 Stream 0 global interrupt */
+#define STM32_IRQ_DMA1S1      (STM32_IRQ_FIRST+12) /* 12: DMA1 Stream 1 global interrupt */
+#define STM32_IRQ_DMA1S2      (STM32_IRQ_FIRST+13) /* 13: DMA1 Stream 2 global interrupt */
+#define STM32_IRQ_DMA1S3      (STM32_IRQ_FIRST+14) /* 14: DMA1 Stream 3 global interrupt */
+#define STM32_IRQ_DMA1S4      (STM32_IRQ_FIRST+15) /* 15: DMA1 Stream 4 global interrupt */
+#define STM32_IRQ_DMA1S5      (STM32_IRQ_FIRST+16) /* 16: DMA1 Stream 5 global interrupt */
+#define STM32_IRQ_DMA1S6      (STM32_IRQ_FIRST+17) /* 17: DMA1 Stream 6 global interrupt */
+#define STM32_IRQ_ADC         (STM32_IRQ_FIRST+18) /* 18: ADC1, ADC2, and ADC3 global interrupt */
+#define STM32_IRQ_CAN1TX      (STM32_IRQ_FIRST+19) /* 19: CAN1 TX interrupts */
+#define STM32_IRQ_CAN1RX0     (STM32_IRQ_FIRST+20) /* 20: CAN1 RX0 interrupts */
+#define STM32_IRQ_CAN1RX1     (STM32_IRQ_FIRST+21) /* 21: CAN1 RX1 interrupt */
+#define STM32_IRQ_CAN1SCE     (STM32_IRQ_FIRST+22) /* 22: CAN1 SCE interrupt */
+#define STM32_IRQ_EXTI95      (STM32_IRQ_FIRST+23) /* 23: EXTI Line[9:5] interrupts */
+#define STM32_IRQ_TIM1BRK     (STM32_IRQ_FIRST+24) /* 24: TIM1 Break interrupt */
+#define STM32_IRQ_TIM9        (STM32_IRQ_FIRST+24) /* 24: TIM9 global interrupt */
+#define STM32_IRQ_TIM1UP      (STM32_IRQ_FIRST+25) /* 25: TIM1 Update interrupt */
+#define STM32_IRQ_TIM10       (STM32_IRQ_FIRST+25) /* 25: TIM10 global interrupt */
+#define STM32_IRQ_TIM1TRGCOM  (STM32_IRQ_FIRST+26) /* 26: TIM1 Trigger and Commutation interrupts */
+#define STM32_IRQ_TIM11       (STM32_IRQ_FIRST+26) /* 26: TIM11 global interrupt */
+#define STM32_IRQ_TIM1CC      (STM32_IRQ_FIRST+27) /* 27: TIM1 Capture Compare interrupt */
+#define STM32_IRQ_TIM2        (STM32_IRQ_FIRST+28) /* 28: TIM2 global interrupt */
+#define STM32_IRQ_TIM3        (STM32_IRQ_FIRST+29) /* 29: TIM3 global interrupt */
+#define STM32_IRQ_TIM4        (STM32_IRQ_FIRST+30) /* 30: TIM4 global interrupt */
+#define STM32_IRQ_I2C1EV      (STM32_IRQ_FIRST+31) /* 31: I2C1 event interrupt */
+#define STM32_IRQ_I2C1ER      (STM32_IRQ_FIRST+32) /* 32: I2C1 error interrupt */
+#define STM32_IRQ_I2C2EV      (STM32_IRQ_FIRST+33) /* 33: I2C2 event interrupt */
+#define STM32_IRQ_I2C2ER      (STM32_IRQ_FIRST+34) /* 34: I2C2 error interrupt */
+#define STM32_IRQ_SPI1        (STM32_IRQ_FIRST+35) /* 35: SPI1 global interrupt */
+#define STM32_IRQ_SPI2        (STM32_IRQ_FIRST+36) /* 36: SPI2 global interrupt */
+#define STM32_IRQ_USART1      (STM32_IRQ_FIRST+37) /* 37: USART1 global interrupt */
+#define STM32_IRQ_USART2      (STM32_IRQ_FIRST+38) /* 38: USART2 global interrupt */
+#define STM32_IRQ_USART3      (STM32_IRQ_FIRST+39) /* 39: USART3 global interrupt */
+#define STM32_IRQ_EXTI1510    (STM32_IRQ_FIRST+40) /* 40: EXTI Line[15:10] interrupts */
+#define STM32_IRQ_RTCALRM     (STM32_IRQ_FIRST+41) /* 41: RTC alarm through EXTI line interrupt */
+#define STM32_IRQ_OTGFSWKUP   (STM32_IRQ_FIRST+42) /* 42: USB On-The-Go FS Wakeup through EXTI line interrupt */
+#define STM32_IRQ_TIM8BRK     (STM32_IRQ_FIRST+43) /* 43: TIM8 Break interrupt */
+#define STM32_IRQ_TIM12       (STM32_IRQ_FIRST+43) /* 43: TIM12 global interrupt */
+#define STM32_IRQ_TIM8UP      (STM32_IRQ_FIRST+44) /* 44: TIM8 Update interrupt */
+#define STM32_IRQ_TIM13       (STM32_IRQ_FIRST+44) /* 44: TIM13 global interrupt */
+#define STM32_IRQ_TIM8TRGCOM  (STM32_IRQ_FIRST+45) /* 45: TIM8 Trigger and Commutation interrupts */
+#define STM32_IRQ_TIM14       (STM32_IRQ_FIRST+45) /* 45: TIM14 global interrupt */
+#define STM32_IRQ_TIM8CC      (STM32_IRQ_FIRST+46) /* 46: TIM8 Capture Compare interrupt */
+#define STM32_IRQ_DMA1S7      (STM32_IRQ_FIRST+47) /* 47: DMA1 Stream 7 global interrupt */
+#define STM32_IRQ_FSMC        (STM32_IRQ_FIRST+48) /* 48: FSMC global interrupt */
+#define STM32_IRQ_SDMMC1      (STM32_IRQ_FIRST+49) /* 49: SDMMC1 global interrupt */
+#define STM32_IRQ_TIM5        (STM32_IRQ_FIRST+50) /* 50: TIM5 global interrupt */
+#define STM32_IRQ_SPI3        (STM32_IRQ_FIRST+51) /* 51: SPI3 global interrupt */
+#define STM32_IRQ_UART4       (STM32_IRQ_FIRST+52) /* 52: UART4 global interrupt */
+#define STM32_IRQ_UART5       (STM32_IRQ_FIRST+53) /* 53: UART5 global interrupt */
+#define STM32_IRQ_TIM6        (STM32_IRQ_FIRST+54) /* 54: TIM6 global interrupt */
+#define STM32_IRQ_DAC         (STM32_IRQ_FIRST+54) /* 54: DAC1 and DAC2 underrun error interrupts */
+#define STM32_IRQ_TIM7        (STM32_IRQ_FIRST+55) /* 55: TIM7 global interrupt */
+#define STM32_IRQ_DMA2S0      (STM32_IRQ_FIRST+56) /* 56: DMA2 Stream 0 global interrupt */
+#define STM32_IRQ_DMA2S1      (STM32_IRQ_FIRST+57) /* 57: DMA2 Stream 1 global interrupt */
+#define STM32_IRQ_DMA2S2      (STM32_IRQ_FIRST+58) /* 58: DMA2 Stream 2 global interrupt */
+#define STM32_IRQ_DMA2S3      (STM32_IRQ_FIRST+59) /* 59: DMA2 Stream 3 global interrupt */
+#define STM32_IRQ_DMA2S4      (STM32_IRQ_FIRST+60) /* 60: DMA2 Stream 4 global interrupt */
+#define STM32_IRQ_ETH         (STM32_IRQ_FIRST+61) /* 61: Ethernet global interrupt */
+#define STM32_IRQ_ETHWKUP     (STM32_IRQ_FIRST+62) /* 62: Ethernet Wakeup through EXTI line interrupt */
+#define STM32_IRQ_CAN2TX      (STM32_IRQ_FIRST+63) /* 63: CAN2 TX interrupts */
+#define STM32_IRQ_CAN2RX0     (STM32_IRQ_FIRST+64) /* 64: CAN2 RX0 interrupts */
+#define STM32_IRQ_CAN2RX1     (STM32_IRQ_FIRST+65) /* 65: CAN2 RX1 interrupt */
+#define STM32_IRQ_CAN2SCE     (STM32_IRQ_FIRST+66) /* 66: CAN2 SCE interrupt */
+#define STM32_IRQ_OTGFS       (STM32_IRQ_FIRST+67) /* 67: USB On The Go FS global interrupt */
+#define STM32_IRQ_DMA2S5      (STM32_IRQ_FIRST+68) /* 68: DMA2 Stream 5 global interrupt */
+#define STM32_IRQ_DMA2S6      (STM32_IRQ_FIRST+69) /* 69: DMA2 Stream 6 global interrupt */
+#define STM32_IRQ_DMA2S7      (STM32_IRQ_FIRST+70) /* 70: DMA2 Stream 7 global interrupt */
+#define STM32_IRQ_USART6      (STM32_IRQ_FIRST+71) /* 71: USART6 global interrupt */
+#define STM32_IRQ_I2C3EV      (STM32_IRQ_FIRST+72) /* 72: I2C3 event interrupt */
+#define STM32_IRQ_I2C3ER      (STM32_IRQ_FIRST+73) /* 73: I2C3 error interrupt */
+#define STM32_IRQ_OTGHSEP1OUT (STM32_IRQ_FIRST+74) /* 74: USB On The Go HS End Point 1 Out global interrupt */
+#define STM32_IRQ_OTGHSEP1IN  (STM32_IRQ_FIRST+75) /* 75: USB On The Go HS End Point 1 In global interrupt */
+#define STM32_IRQ_OTGHSWKUP   (STM32_IRQ_FIRST+76) /* 76: USB On The Go HS Wakeup through EXTI interrupt */
+#define STM32_IRQ_OTGHS       (STM32_IRQ_FIRST+77) /* 77: USB On The Go HS global interrupt */
+#define STM32_IRQ_DCMI        (STM32_IRQ_FIRST+78) /* 78: DCMI global interrupt */
+#define STM32_IRQ_CRYP        (STM32_IRQ_FIRST+79) /* 79: CRYP crypto global interrupt */
+#define STM32_IRQ_HASH        (STM32_IRQ_FIRST+80) /* 80: Hash and Rng global interrupt */
+#define STM32_IRQ_RNG         (STM32_IRQ_FIRST+80) /* 80: Hash and Rng global interrupt */
+#define STM32_IRQ_FPU         (STM32_IRQ_FIRST+81) /* 81: FPU global interrupt */
+#define STM32_IRQ_UART7       (STM32_IRQ_FIRST+82) /* 82: UART7 global interrupt */
+#define STM32_IRQ_UART8       (STM32_IRQ_FIRST+83) /* 83: UART8 global interrupt */
+#define STM32_IRQ_SPI4        (STM32_IRQ_FIRST+84) /* 84: SPI4 global interrupt */
+#define STM32_IRQ_SPI5        (STM32_IRQ_FIRST+85) /* 85: SPI5 global interrupt */
+#define STM32_IRQ_SPI6        (STM32_IRQ_FIRST+86) /* 86: SPI6 global interrupt */
+#define STM32_IRQ_SAI1        (STM32_IRQ_FIRST+87) /* 87: SAI1 global interrupt */
+#define STM32_IRQ_LTDCINT     (STM32_IRQ_FIRST+88) /* 88: LCD-TFT global interrupt */
+#define STM32_IRQ_LTDCERRINT  (STM32_IRQ_FIRST+89) /* 89: LCD-TFT global Error interrupt */
+#define STM32_IRQ_DMA2D       (STM32_IRQ_FIRST+90) /* 90: DMA2D global interrupt */
+#define STM32_IRQ_SAI2        (STM32_IRQ_FIRST+91) /* 91: SAI2 global interrupt */
+#define STM32_IRQ_QUADSPI     (STM32_IRQ_FIRST+92) /* 92: QuadSPI global interrupt */
+#define STM32_IRQ_LPTIMER1    (STM32_IRQ_FIRST+93) /* 93: LP Timer1 global interrupt */
+#define STM32_IRQ_HDMICEC     (STM32_IRQ_FIRST+94) /* 94: HDMI-CEC global interrupt */
+#define STM32_IRQ_I2C4EV      (STM32_IRQ_FIRST+95) /* 95: I2C4 event interrupt */
+#define STM32_IRQ_I2C4ER      (STM32_IRQ_FIRST+96) /* 96: I2C4 Error interrupt */
+#define STM32_IRQ_SPDIFRX     (STM32_IRQ_FIRST+97) /* 97: SPDIFRX global interrupt */
+#define STM32_IRQ_DSIHOST     (STM32_IRQ_FIRST+98) /* 98: DSI host global interrupt */
+#define STM32_IRQ_DFSDM1FLT0  (STM32_IRQ_FIRST+99) /* 99: DFSDM1 Filter 0 global interrupt */
+#define STM32_IRQ_DFSDM1FLT1  (STM32_IRQ_FIRST+100) /* 100: DFSDM1 Filter 1 global interrupt */
+#define STM32_IRQ_DFSDM1FLT2  (STM32_IRQ_FIRST+101) /* 101: DFSDM1 Filter 2 global interrupt */
+#define STM32_IRQ_DFSDM1FLT3  (STM32_IRQ_FIRST+102) /* 102: DFSDM1 Filter 3 global interrupt */
+#define STM32_IRQ_SDMMC2      (STM32_IRQ_FIRST+103) /* 103: SDMMC2 global interrupt */
+#define STM32_IRQ_CAN3TX      (STM32_IRQ_FIRST+104) /* 104: CAN3 TX interrupt */
+#define STM32_IRQ_CAN3RX0     (STM32_IRQ_FIRST+105) /* 105: CAN3 RX0 interrupt */
+#define STM32_IRQ_CAN3RX1     (STM32_IRQ_FIRST+106) /* 106: CAN3 RX1 interrupt */
+#define STM32_IRQ_CAN3SCE     (STM32_IRQ_FIRST+107) /* 107: CAN3 SCE interrupt */
+#define STM32_IRQ_JPEG        (STM32_IRQ_FIRST+108) /* 108: JPEG global interrupt */
+#define STM32_IRQ_MDIOS       (STM32_IRQ_FIRST+109) /* 109: MDIO slave global interrupt */
+
+#define NR_INTERRUPTS         110
+#define NR_VECTORS            (STM32_IRQ_FIRST+NR_INTERRUPTS)
+
+/* EXTI interrupts (Do not use IRQ numbers) */
+
+#define NR_IRQS               NR_VECTORS
+
+/****************************************************************************************************
+ * Public Types
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public Data
+ ****************************************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************************************
+ * Public Functions
+ ****************************************************************************************************/
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_ARM_INCLUDE_STM32F7_STM32F76XX77XX_IRQ_H */
diff --git a/arch/arm/include/stm32l4/chip.h b/arch/arm/include/stm32l4/chip.h
index 12d718764060f81070e5897e5b8cd95a2e426531..9d0712b27682037e9224e5f89104edf1259841c9 100644
--- a/arch/arm/include/stm32l4/chip.h
+++ b/arch/arm/include/stm32l4/chip.h
@@ -77,7 +77,7 @@
 #  define STM32L4_NBTIM                    2   /* Two basic timers, TIM6-7 */
 #  define STM32L4_NLPTIM                   2   /* Two low-power timers, LPTIM1-2 */
 #  define STM32L4_NRNG                     1   /* Random number generator (RNG) */
-#  define STM32L4_NUART                    4   /* UART 4-5 */
+#  define STM32L4_NUART                    2   /* UART 4-5 */
 #  define STM32L4_NUSART                   3   /* USART 1-3 */
 #  define STM32L4_NLPUART                  1   /* LPUART 1 */
 #  define STM32L4_NSPI                     3   /* SPI1-3 */
diff --git a/arch/arm/include/stm32l4/irq.h b/arch/arm/include/stm32l4/irq.h
index ebfb22667891d9084a91b3b87ee0afed7db0a55f..89e74c1760bedd01330ff9062de2016f0542782f 100644
--- a/arch/arm/include/stm32l4/irq.h
+++ b/arch/arm/include/stm32l4/irq.h
@@ -57,7 +57,7 @@
 
 /* Processor Exceptions (vectors 0-15) */
 
-#define STM32L4_IRQ_RESERVED       (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define STM32L4_IRQ_RESERVED       (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
                                      /* Vector  0: Reset stack pointer value */
                                      /* Vector  1: Reset (not handler as an IRQ) */
 #define STM32L4_IRQ_NMI            (2) /* Vector  2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/tiva/irq.h b/arch/arm/include/tiva/irq.h
index 17c73a254de4d8f121593187ba0b4c62fad42a41..d6a3216da96da623e67e666ee3a606e9b7ea630b 100644
--- a/arch/arm/include/tiva/irq.h
+++ b/arch/arm/include/tiva/irq.h
@@ -162,7 +162,7 @@
 
 /* Processor Exceptions (vectors 0-15) */
 
-#define TIVA_IRQ_RESERVED     (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define TIVA_IRQ_RESERVED     (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
                                   /* Vector  0: Reset stack pointer value */
                                   /* Vector  1: Reset (not handler as an IRQ) */
 #define TIVA_IRQ_NMI          (2) /* Vector  2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/src/a1x/Make.defs b/arch/arm/src/a1x/Make.defs
index f823d5c4e6193f60741acdd0d698d83096dd93bb..7ffb41537e9ea2cdac4c22f0fd332bff095c2302 100644
--- a/arch/arm/src/a1x/Make.defs
+++ b/arch/arm/src/a1x/Make.defs
@@ -59,10 +59,6 @@ CMN_ASRCS += arm_testset.S
 CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
 CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S cp15_invalidate_dcache_all.S
 
-ifeq ($(CONFIG_ARCH_MEMCPY),y)
-CMN_ASRCS += arm_memcpy.S
-endif
-
 # Common C source files
 
 CMN_CSRCS  = up_initialize.c up_idle.c up_interruptcontext.c up_exit.c
@@ -112,9 +108,9 @@ endif
 endif
 
 ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += arm_elf.c arm_coherent_dcache.c
+CMN_CSRCS += arm_coherent_dcache.c
 else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += arm_elf.c arm_coherent_dcache.c
+CMN_CSRCS += arm_coherent_dcache.c
 endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)
diff --git a/arch/arm/src/a1x/a1x_irq.c b/arch/arm/src/a1x/a1x_irq.c
index 65e18ffd73bb5b9e53291d548221da072f50368f..ecabb5ff4d66b77df5f7bab603d6866da245a18f 100644
--- a/arch/arm/src/a1x/a1x_irq.c
+++ b/arch/arm/src/a1x/a1x_irq.c
@@ -77,7 +77,7 @@ volatile uint32_t *g_current_regs[1];
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_IRQ)
+#if defined(CONFIG_DEBUG_IRQ_INFO)
 static void a1x_dumpintc(const char *msg, int irq)
 {
   irqstate_t flags;
@@ -85,40 +85,42 @@ static void a1x_dumpintc(const char *msg, int irq)
   /* Dump some relevant ARMv7 register contents */
 
   flags = enter_critical_section();
-  lldbg("ARMv7 (%s, irq=%d):\n", msg, irq);
-  lldbg("  CPSR: %08x SCTLR: %08x\n", flags, cp15_rdsctlr());
+
+  irqinfo("ARMv7 (%s, irq=%d):\n", msg, irq);
+  irqinfo("  CPSR: %08x SCTLR: %08x\n", flags, cp15_rdsctlr());
 
   /* Dump all of the (readable) INTC register contents */
 
-  lldbg("INTC (%s, irq=%d):\n", msg, irq);
-  lldbg("  VECTOR: %08x BASE: %08x PROTECT: %08x NMICTRL: %08x\n",
-        getreg32(A1X_INTC_VECTOR),    getreg32(A1X_INTC_BASEADDR),
-        getreg32(A1X_INTC_PROTECT),   getreg32(A1X_INTC_NMICTRL));
-  lldbg("  IRQ PEND: %08x %08x %08x\n",
-        getreg32(A1X_INTC_IRQ_PEND0), getreg32(A1X_INTC_IRQ_PEND1),
-        getreg32(A1X_INTC_IRQ_PEND2));
-  lldbg("  FIQ PEND: %08x %08x %08x\n",
-        getreg32(A1X_INTC_FIQ_PEND0), getreg32(A1X_INTC_FIQ_PEND1),
-        getreg32(A1X_INTC_FIQ_PEND2));
-  lldbg("  SEL:      %08x %08x %08x\n",
-        getreg32(A1X_INTC_IRQ_SEL0),  getreg32(A1X_INTC_IRQ_SEL1),
-        getreg32(A1X_INTC_IRQ_SEL2));
-  lldbg("  EN:       %08x %08x %08x\n",
-        getreg32(A1X_INTC_EN0),       getreg32(A1X_INTC_EN1),
-        getreg32(A1X_INTC_EN2));
-  lldbg("  MASK:     %08x %08x %08x\n",
-        getreg32(A1X_INTC_MASK0),     getreg32(A1X_INTC_MASK1),
-        getreg32(A1X_INTC_MASK2));
-  lldbg("  RESP:     %08x %08x %08x\n",
-        getreg32(A1X_INTC_RESP0),     getreg32(A1X_INTC_RESP1),
-        getreg32(A1X_INTC_RESP2));
-  lldbg("  FF:       %08x %08x %08x\n",
-        getreg32(A1X_INTC_FF0),       getreg32(A1X_INTC_FF1),
-        getreg32(A1X_INTC_FF2));
-  lldbg("  PRIO:     %08x %08x %08x %08x %08x\n",
-        getreg32(A1X_INTC_PRIO0),     getreg32(A1X_INTC_PRIO1),
-        getreg32(A1X_INTC_PRIO2),     getreg32(A1X_INTC_PRIO3),
-        getreg32(A1X_INTC_PRIO4));
+  irqinfo("INTC (%s, irq=%d):\n", msg, irq);
+  irqinfo("  VECTOR: %08x BASE: %08x PROTECT: %08x NMICTRL: %08x\n",
+          getreg32(A1X_INTC_VECTOR),    getreg32(A1X_INTC_BASEADDR),
+          getreg32(A1X_INTC_PROTECT),   getreg32(A1X_INTC_NMICTRL));
+  irqinfo("  IRQ PEND: %08x %08x %08x\n",
+          getreg32(A1X_INTC_IRQ_PEND0), getreg32(A1X_INTC_IRQ_PEND1),
+          getreg32(A1X_INTC_IRQ_PEND2));
+  irqinfo("  FIQ PEND: %08x %08x %08x\n",
+          getreg32(A1X_INTC_FIQ_PEND0), getreg32(A1X_INTC_FIQ_PEND1),
+          getreg32(A1X_INTC_FIQ_PEND2));
+  irqinfo("  SEL:      %08x %08x %08x\n",
+          getreg32(A1X_INTC_IRQ_SEL0),  getreg32(A1X_INTC_IRQ_SEL1),
+          getreg32(A1X_INTC_IRQ_SEL2));
+  irqinfo("  EN:       %08x %08x %08x\n",
+          getreg32(A1X_INTC_EN0),       getreg32(A1X_INTC_EN1),
+          getreg32(A1X_INTC_EN2));
+  irqinfo("  MASK:     %08x %08x %08x\n",
+          getreg32(A1X_INTC_MASK0),     getreg32(A1X_INTC_MASK1),
+          getreg32(A1X_INTC_MASK2));
+  irqinfo("  RESP:     %08x %08x %08x\n",
+          getreg32(A1X_INTC_RESP0),     getreg32(A1X_INTC_RESP1),
+          getreg32(A1X_INTC_RESP2));
+  irqinfo("  FF:       %08x %08x %08x\n",
+          getreg32(A1X_INTC_FF0),       getreg32(A1X_INTC_FF1),
+          getreg32(A1X_INTC_FF2));
+  irqinfo("  PRIO:     %08x %08x %08x %08x %08x\n",
+          getreg32(A1X_INTC_PRIO0),     getreg32(A1X_INTC_PRIO1),
+          getreg32(A1X_INTC_PRIO2),     getreg32(A1X_INTC_PRIO3),
+          getreg32(A1X_INTC_PRIO4));
+
   leave_critical_section(flags);
 }
 #else
diff --git a/arch/arm/src/a1x/a1x_serial.c b/arch/arm/src/a1x/a1x_serial.c
index b6e536fdc601ecc0f79ec321a8eeb0f09258f4d4..ec8de5e0090507c7175fe96dd1ed9f423a5c2c61 100644
--- a/arch/arm/src/a1x/a1x_serial.c
+++ b/arch/arm/src/a1x/a1x_serial.c
@@ -93,7 +93,6 @@ struct up_dev_s
   uint32_t uartbase;  /* Base address of UART registers */
   uint32_t baud;      /* Configured baud */
   uint32_t ier;       /* Saved IER value */
-  xcpt_t   handler;   /* UART interrupt handler */
   uint8_t  irq;       /* IRQ associated with this UART */
   uint8_t  parity;    /* 0=none, 1=odd, 2=even */
   uint8_t  bits;      /* Number of bits (7 or 8) */
@@ -108,31 +107,7 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-static int  uart_interrupt(struct uart_dev_s *dev);
-#ifdef CONFIG_A1X_UART0
-static int  uart0_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_A1X_UART1
-static int  uart1_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_A1X_UART2
-static int  uart2_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_A1X_UART3
-static int  uart3_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_A1X_UART4
-static int  uart4_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_A1X_UART5
-static int  uart5_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_A1X_UART6
-static int  uart6_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_A1X_UART7
-static int  uart7_interrupt(int irq, void *context);
-#endif
+static int  uart_interrupt(int irq, void *context, void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  up_receive(struct uart_dev_s *dev, uint32_t *status);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
@@ -214,7 +189,6 @@ static struct up_dev_s g_uart0priv =
 {
   .uartbase       = A1X_UART0_VADDR,
   .baud           = CONFIG_UART0_BAUD,
-  .handler        = uart0_interrupt,
   .irq            = A1X_IRQ_UART0,
   .parity         = CONFIG_UART0_PARITY,
   .bits           = CONFIG_UART0_BITS,
@@ -245,7 +219,6 @@ static struct up_dev_s g_uart1priv =
 {
   .uartbase       = A1X_UART1_VADDR,
   .baud           = CONFIG_UART1_BAUD,
-  .handler        = uart1_interrupt,
   .irq            = A1X_IRQ_UART1,
   .parity         = CONFIG_UART1_PARITY,
   .bits           = CONFIG_UART1_BITS,
@@ -276,7 +249,6 @@ static struct up_dev_s g_uart2priv =
 {
   .uartbase       = A1X_UART2_VADDR,
   .baud           = CONFIG_UART2_BAUD,
-  .handler        = uart2_interrupt,
   .irq            = A1X_IRQ_UART2,
   .parity         = CONFIG_UART2_PARITY,
   .bits           = CONFIG_UART2_BITS,
@@ -307,7 +279,6 @@ static struct up_dev_s g_uart3priv =
 {
   .uartbase       = A1X_UART3_VADDR,
   .baud           = CONFIG_UART3_BAUD,
-  .handler        = uart3_interrupt,
   .irq            = A1X_IRQ_UART3,
   .parity         = CONFIG_UART3_PARITY,
   .bits           = CONFIG_UART3_BITS,
@@ -338,7 +309,6 @@ static struct up_dev_s g_uart4priv =
 {
   .uartbase       = A1X_UART4_VADDR,
   .baud           = CONFIG_UART4_BAUD,
-  .handler        = uart4_interrupt,
   .irq            = A1X_IRQ_UART4,
   .parity         = CONFIG_UART4_PARITY,
   .bits           = CONFIG_UART4_BITS,
@@ -369,7 +339,6 @@ static struct up_dev_s g_uart5priv =
 {
   .uartbase       = A1X_UART5_VADDR,
   .baud           = CONFIG_UART5_BAUD,
-  .handler        = uart5_interrupt,
   .irq            = A1X_IRQ_UART5,
   .parity         = CONFIG_UART5_PARITY,
   .bits           = CONFIG_UART5_BITS,
@@ -400,7 +369,6 @@ static struct up_dev_s g_uart6priv =
 {
   .uartbase       = A1X_UART6_VADDR,
   .baud           = CONFIG_UART6_BAUD,
-  .handler        = uart6_interrupt,
   .irq            = A1X_IRQ_UART6,
   .parity         = CONFIG_UART6_PARITY,
   .bits           = CONFIG_UART6_BITS,
@@ -431,7 +399,6 @@ static struct up_dev_s g_uart7priv =
 {
   .uartbase       = A1X_UART7_VADDR,
   .baud           = CONFIG_UART7_BAUD,
-  .handler        = uart7_interrupt,
   .irq            = A1X_IRQ_UART7,
   .parity         = CONFIG_UART7_PARITY,
   .bits           = CONFIG_UART7_BITS,
@@ -1068,7 +1035,7 @@ static int up_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, priv->handler);
+  ret = irq_attach(priv->irq, uart_interrupt, priv);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
@@ -1110,12 +1077,14 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int uart_interrupt(struct uart_dev_s *dev)
+static int uart_interrupt(int irq, void *context, void *arg)
 {
-  struct up_dev_s *priv;
-  uint32_t         status;
-  int              passes;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
+  struct up_dev_s *priv = (struct up_dev_s *)arg;
+  uint32_t status;
+  int passes;
 
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct up_dev_s *)dev->priv;
 
   /* Loop until there are no characters to be transferred or,
@@ -1156,7 +1125,7 @@ static int uart_interrupt(struct uart_dev_s *dev)
               /* Read the modem status register (MSR) to clear */
 
               status = up_serialin(priv, A1X_UART_MSR_OFFSET);
-              vdbg("MSR: %02x\n", status);
+              _info("MSR: %02x\n", status);
               break;
             }
 
@@ -1167,7 +1136,7 @@ static int uart_interrupt(struct uart_dev_s *dev)
               /* Read the line status register (LSR) to clear */
 
               status = up_serialin(priv, A1X_UART_LSR_OFFSET);
-              vdbg("LSR: %02x\n", status);
+              _info("LSR: %02x\n", status);
               break;
             }
 
@@ -1192,7 +1161,7 @@ static int uart_interrupt(struct uart_dev_s *dev)
 
           default:
             {
-              lldbg("Unexpected IIR: %02x\n", status);
+              _err("ERROR: Unexpected IIR: %02x\n", status);
               break;
             }
         }
@@ -1201,62 +1170,6 @@ static int uart_interrupt(struct uart_dev_s *dev)
   return OK;
 }
 
-#ifdef CONFIG_A1X_UART0
-static int uart0_interrupt(int irq, void *context)
-{
-  return uart_interrupt(&g_uart0port);
-}
-#endif
-
-#ifdef CONFIG_A1X_UART1
-static int uart1_interrupt(int irq, void *context)
-{
-  return uart_interrupt(&g_uart1port);
-}
-#endif
-
-#ifdef CONFIG_A1X_UART2
-static int uart2_interrupt(int irq, void *context)
-{
-  return uart_interrupt(&g_uart2port);
-}
-#endif
-
-#ifdef CONFIG_A1X_UART3
-static int uart3_interrupt(int irq, void *context)
-{
-  return uart_interrupt(&g_uart3port);
-}
-#endif
-
-#ifdef CONFIG_A1X_UART4
-static int uart4_interrupt(int irq, void *context)
-{
-  return uart_interrupt(&g_uart4port);
-}
-#endif
-
-#ifdef CONFIG_A1X_UART5
-static int uart5_interrupt(int irq, void *context)
-{
-  return uart_interrupt(&g_uart5port);
-}
-#endif
-
-#ifdef CONFIG_A1X_UART6
-static int uart6_interrupt(int irq, void *context)
-{
-  return uart_interrupt(&g_uart6port);
-}
-#endif
-
-#ifdef CONFIG_A1X_UART7
-static int uart7_interrupt(int irq, void *context)
-{
-  return uart_interrupt(&g_uart7port);
-}
-#endif
-
 /****************************************************************************
  * Name: up_ioctl
  *
diff --git a/arch/arm/src/a1x/a1x_timerisr.c b/arch/arm/src/a1x/a1x_timerisr.c
index d4e827b13d539f66d2abc929350c460d3dfb6739..d5ef7508f418f5fec56a8e38186fd50cd7234581 100644
--- a/arch/arm/src/a1x/a1x_timerisr.c
+++ b/arch/arm/src/a1x/a1x_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/a1x/a1x_timerisr.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -70,19 +70,11 @@
 #define TMR_INTERVAL ((TMR0_CLOCK + (CLK_TCK >> 1)) / CLK_TCK)
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  a1x_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -90,7 +82,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int a1x_timerisr(int irq, uint32_t *regs, void *arg)
 {
   /* Only a TIMER0 interrupt is expected here */
 
@@ -107,7 +99,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -115,7 +111,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t regval;
 
@@ -142,7 +138,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(A1X_IRQ_TIMER0, (xcpt_t)up_timerisr);
+  (void)irq_attach(A1X_IRQ_TIMER0, (xcpt_t)a1x_timerisr, NULL);
 
   /* Enable interrupts from the TIMER 0 port */
 
diff --git a/arch/arm/src/arm/Kconfig b/arch/arm/src/arm/Kconfig
index 53f0958b2e2fd339c6e8097b1a026599c69090c6..4b9ce185510f29490a4adeaeb4beb4b1d5b1cc89 100644
--- a/arch/arm/src/arm/Kconfig
+++ b/arch/arm/src/arm/Kconfig
@@ -7,8 +7,8 @@ comment "ARM Configuration Options"
 
 choice
 	prompt "Toolchain Selection"
-	default ARM_TOOLCHAIN_GNU_EABIW if HOST_WINDOWS
-	default ARM_TOOLCHAIN_GNU_EABIL if !HOST_WINDOWS
+	default ARM_TOOLCHAIN_GNU_EABIW if TOOLCHAIN_WINDOWS
+	default ARM_TOOLCHAIN_GNU_EABIL if !TOOLCHAIN_WINDOWS
 
 config ARM_TOOLCHAIN_BUILDROOT
 	bool "Buildroot (Cygwin or Linux)"
@@ -24,11 +24,11 @@ config ARM_TOOLCHAIN_CODESOURCERYL
 
 config ARM_TOOLCHAIN_CODESOURCERYW
 	bool "CodeSourcery GNU toolchain under Windows"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 
 config ARM_TOOLCHAIN_DEVKITARM
 	bool "devkitARM GNU toolchain"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 
 config ARM_TOOLCHAIN_GNU_EABIL
 	bool "Generic GNU EABI toolchain under Linux (or other POSIX environment)"
@@ -38,7 +38,7 @@ config ARM_TOOLCHAIN_GNU_EABIL
 
 config ARM_TOOLCHAIN_GNU_EABIW
 	bool "Generic GNU EABI toolchain under Windows"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 	---help---
 		This option should work for any modern GNU toolchain (GCC 4.5 or newer)
 		configured for arm-none-eabi-.
diff --git a/arch/arm/src/arm/up_assert.c b/arch/arm/src/arm/up_assert.c
index 336a76c8613862c4bcea2c7b559eb727c947360e..3d188174b3d3ea661b7d508ef738cbef6fb73761 100644
--- a/arch/arm/src/arm/up_assert.c
+++ b/arch/arm/src/arm/up_assert.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/arm/up_assert.c
  *
- *   Copyright (C) 2007-2010, 2012-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2010, 2012-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-#  undef  CONFIG_DEBUG
-#  undef  CONFIG_DEBUG_VERBOSE
-#  define CONFIG_DEBUG 1
-#  define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 #include 
@@ -77,23 +66,6 @@
 #  undef CONFIG_ARCH_USBDUMP
 #endif
 
-/* The following is just intended to keep some ugliness out of the mainline
- * code.  We are going to print the task name if:
- *
- *  CONFIG_TASK_NAME_SIZE > 0 &&    <-- The task has a name
- *  (defined(CONFIG_DEBUG)    ||    <-- And the debug is enabled (lldbg used)
- *   defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
- */
-
-#undef CONFIG_PRINT_TASKNAME
-#if CONFIG_TASK_NAME_SIZE > 0 && (defined(CONFIG_DEBUG) || defined(CONFIG_ARCH_STACKDUMP))
-#  define CONFIG_PRINT_TASKNAME 1
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -127,7 +99,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
   for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
     {
       uint32_t *ptr = (uint32_t *)stack;
-      lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+      _alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
              stack, ptr[0], ptr[1], ptr[2], ptr[3],
              ptr[4], ptr[5], ptr[6], ptr[7]);
     }
@@ -154,12 +126,12 @@ static inline void up_registerdump(void)
       for (regs = REG_R0; regs <= REG_R15; regs += 8)
         {
           uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs];
-          lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+          _alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
                  regs, ptr[0], ptr[1], ptr[2], ptr[3],
                  ptr[4], ptr[5], ptr[6], ptr[7]);
         }
 
-      lldbg("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
+      _alert("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
     }
 }
 #else
@@ -179,7 +151,7 @@ static int usbtrace_syslog(FAR const char *fmt, ...)
   /* Let vsyslog do the real work */
 
   va_start(ap, fmt);
-  ret = lowvsyslog(LOG_INFO, fmt, ap);
+  ret = vsyslog(LOG_EMERG, fmt, ap);
   va_end(ap);
   return ret;
 }
@@ -228,12 +200,12 @@ static void up_dumpstate(void)
 
   /* Show interrupt stack info */
 
-  lldbg("sp:     %08x\n", sp);
-  lldbg("IRQ stack:\n");
-  lldbg("  base: %08x\n", istackbase);
-  lldbg("  size: %08x\n", istacksize);
+  _alert("sp:     %08x\n", sp);
+  _alert("IRQ stack:\n");
+  _alert("  base: %08x\n", istackbase);
+  _alert("  size: %08x\n", istacksize);
 #ifdef CONFIG_STACK_COLORATION
-  lldbg("  used: %08x\n", up_check_intstack());
+  _alert("  used: %08x\n", up_check_intstack());
 #endif
 
   /* Does the current stack pointer lie within the interrupt
@@ -251,24 +223,24 @@ static void up_dumpstate(void)
        */
 
       sp = g_intstackbase;
-      lldbg("sp:     %08x\n", sp);
+      _alert("sp:     %08x\n", sp);
     }
 
   /* Show user stack info */
 
-  lldbg("User stack:\n");
-  lldbg("  base: %08x\n", ustackbase);
-  lldbg("  size: %08x\n", ustacksize);
+  _alert("User stack:\n");
+  _alert("  base: %08x\n", ustackbase);
+  _alert("  size: %08x\n", ustacksize);
 #ifdef CONFIG_STACK_COLORATION
-  lldbg("  used: %08x\n", up_check_tcbstack(rtcb));
+  _alert("  used: %08x\n", up_check_tcbstack(rtcb));
 #endif
 
 #else
-  lldbg("sp:         %08x\n", sp);
-  lldbg("stack base: %08x\n", ustackbase);
-  lldbg("stack size: %08x\n", ustacksize);
+  _alert("sp:         %08x\n", sp);
+  _alert("stack base: %08x\n", ustackbase);
+  _alert("stack size: %08x\n", ustacksize);
 #ifdef CONFIG_STACK_COLORATION
-  lldbg("stack used: %08x\n", up_check_tcbstack(rtcb));
+  _alert("stack used: %08x\n", up_check_tcbstack(rtcb));
 #endif
 #endif
 
@@ -279,7 +251,7 @@ static void up_dumpstate(void)
   if (sp > ustackbase || sp <= ustackbase - ustacksize)
     {
 #if !defined(CONFIG_ARCH_INTERRUPTSTACK) || CONFIG_ARCH_INTERRUPTSTACK < 4
-      lldbg("ERROR: Stack pointer is not within allocated stack\n");
+      _alert("ERROR: Stack pointer is not within allocated stack\n");
 #endif
     }
   else
@@ -339,17 +311,17 @@ static void _up_assert(int errorcode)
 
 void up_assert(const uint8_t *filename, int lineno)
 {
-#ifdef CONFIG_PRINT_TASKNAME
+#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
   struct tcb_s *rtcb = this_task();
 #endif
 
   board_autoled_on(LED_ASSERTION);
 
-#ifdef CONFIG_PRINT_TASKNAME
-  lldbg("Assertion failed at file:%s line: %d task: %s\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+  _alert("Assertion failed at file:%s line: %d task: %s\n",
         filename, lineno, rtcb->name);
 #else
-  lldbg("Assertion failed at file:%s line: %d\n",
+  _alert("Assertion failed at file:%s line: %d\n",
         filename, lineno);
 #endif
 
diff --git a/arch/arm/src/arm/up_dataabort.c b/arch/arm/src/arm/up_dataabort.c
index 2ab00b15c9403b3e349288ef734b3c48f68a37f9..318c59232c46ab0464c2a6c3be1ec2885247cdf7 100644
--- a/arch/arm/src/arm/up_dataabort.c
+++ b/arch/arm/src/arm/up_dataabort.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/arm/up_dataabort.c
  *
- *   Copyright (C) 2007-2011, 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2011, 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 
@@ -63,18 +52,6 @@
 #  include "arm.h"
 #endif
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -112,7 +89,6 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
    * for register dumps and possibly context switching.
    */
 
-
   savestate    = (uint32_t *)CURRENT_REGS;
 #endif
   CURRENT_REGS = regs;
@@ -131,7 +107,7 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
    * fatal error.
    */
 
-  pglldbg("FSR: %08x FAR: %08x\n", fsr, far);
+  pginfo("FSR: %08x FAR: %08x\n", fsr, far);
   if ((fsr & FSR_MASK) != FSR_PAGE)
     {
       goto segfault;
@@ -142,7 +118,7 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
    * (It has not yet been saved in the register context save area).
    */
 
-  pgllvdbg("VBASE: %08x VEND: %08x\n", PG_PAGED_VBASE, PG_PAGED_VEND);
+  pginfo("VBASE: %08x VEND: %08x\n", PG_PAGED_VBASE, PG_PAGED_VEND);
   if (far < PG_PAGED_VBASE || far >= PG_PAGED_VEND)
     {
       goto segfault;
@@ -180,7 +156,7 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
 
 segfault:
 #endif
-  lldbg("Data abort. PC: %08x FAR: %08x FSR: %08x\n", regs[REG_PC], far, fsr);
+  _alert("Data abort. PC: %08x FAR: %08x FSR: %08x\n", regs[REG_PC], far, fsr);
   PANIC();
 }
 
@@ -196,7 +172,7 @@ void up_dataabort(uint32_t *regs)
 
   /* Crash -- possibly showing diagnost debug information. */
 
-  lldbg("Data abort. PC: %08x\n", regs[REG_PC]);
+  _alert("Data abort. PC: %08x\n", regs[REG_PC]);
   PANIC();
 }
 
diff --git a/arch/arm/src/arm/up_head.S b/arch/arm/src/arm/up_head.S
index 53f94a2e0faf31dd1cb2c73141c0c8c89bfa571f..da317c12f978c740dc6472bdbcdbfb19e7411b4f 100644
--- a/arch/arm/src/arm/up_head.S
+++ b/arch/arm/src/arm/up_head.S
@@ -208,7 +208,7 @@
 
 /* This macro will modify r0, r1, r2 and r14 */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 	.macro	showprogress, code
 	mov		r0, #\code
 	bl		up_lowputc
diff --git a/arch/arm/src/arm/up_nommuhead.S b/arch/arm/src/arm/up_nommuhead.S
index 04c5205efe057ee58a52286f961e40e3a65624ad..d8689d85bd6ee0d893a2e8f7040a44422d0787ae 100644
--- a/arch/arm/src/arm/up_nommuhead.S
+++ b/arch/arm/src/arm/up_nommuhead.S
@@ -49,7 +49,7 @@
 
 	/* This macro will modify r0, r1, r2 and r14 */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 	.macro	showprogress, code
 	mov	r0, #\code
 	bl	up_lowputc
@@ -115,7 +115,7 @@ __start:
 	bl		up_earlyserialinit
 #endif
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 	mov		r0, #'C'
 	bl		up_putc
 	mov		r0, #'\n'
diff --git a/arch/arm/src/arm/up_prefetchabort.c b/arch/arm/src/arm/up_prefetchabort.c
index ed2bfb1bf9db8035dfb43915edf2ca23ad37051a..ab97efd5737264712b8b8e4b20e68e35d7ad9f00 100644
--- a/arch/arm/src/arm/up_prefetchabort.c
+++ b/arch/arm/src/arm/up_prefetchabort.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  *  arch/arm/src/arm/up_prefetchabort.c
  *
- *   Copyright (C) 2007-2011, 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2011, 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 
@@ -110,8 +99,8 @@ void up_prefetchabort(uint32_t *regs)
    * virtual addresses.
    */
 
-  pglldbg("VADDR: %08x VBASE: %08x VEND: %08x\n",
-          regs[REG_PC], PG_PAGED_VBASE, PG_PAGED_VEND);
+  pginfo("VADDR: %08x VBASE: %08x VEND: %08x\n",
+         regs[REG_PC], PG_PAGED_VBASE, PG_PAGED_VEND);
 
   if (regs[REG_R15] >= PG_PAGED_VBASE && regs[REG_R15] < PG_PAGED_VEND)
     {
@@ -148,7 +137,7 @@ void up_prefetchabort(uint32_t *regs)
   else
 #endif
     {
-      lldbg("Prefetch abort. PC: %08x\n", regs[REG_PC]);
+      _alert("Prefetch abort. PC: %08x\n", regs[REG_PC]);
       PANIC();
     }
 }
diff --git a/arch/arm/src/arm/up_releasepending.c b/arch/arm/src/arm/up_releasepending.c
index 4defb895e00e0398df6d95c135f521300e313211..c0ee7e6e727051e418f6e8638db3f8e9cbafe3ef 100644
--- a/arch/arm/src/arm/up_releasepending.c
+++ b/arch/arm/src/arm/up_releasepending.c
@@ -67,7 +67,7 @@ void up_release_pending(void)
 {
   struct tcb_s *rtcb = this_task();
 
-  slldbg("From TCB=%p\n", rtcb);
+  sinfo("From TCB=%p\n", rtcb);
 
   /* Merge the g_pendingtasks list into the ready-to-run task list */
 
diff --git a/arch/arm/src/arm/up_reprioritizertr.c b/arch/arm/src/arm/up_reprioritizertr.c
index 8f6b739d08dc5cb7265c9234dcc93cb9b1faebe1..95679e31dd7276d9b11c1c24d8a8dfa25e7c1e1c 100644
--- a/arch/arm/src/arm/up_reprioritizertr.c
+++ b/arch/arm/src/arm/up_reprioritizertr.c
@@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
       struct tcb_s *rtcb = this_task();
       bool switch_needed;
 
-      slldbg("TCB=%p PRI=%d\n", tcb, priority);
+      sinfo("TCB=%p PRI=%d\n", tcb, priority);
 
       /* Remove the tcb task from the ready-to-run list.
        * sched_removereadytorun will return true if we just
diff --git a/arch/arm/src/arm/up_schedulesigaction.c b/arch/arm/src/arm/up_schedulesigaction.c
index 3972b7792120a9ebe55b3ae569862e5b259c90cd..f6f0c655e8fe2cd623e84ea9e487b6c0af15ac33 100644
--- a/arch/arm/src/arm/up_schedulesigaction.c
+++ b/arch/arm/src/arm/up_schedulesigaction.c
@@ -94,7 +94,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
 {
   irqstate_t flags;
 
-  sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+  sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
 
   /* Make sure that interrupts are disabled */
 
@@ -108,7 +108,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
        * being delivered to the currently executing task.
        */
 
-      sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
+      sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
 
       if (tcb == this_task())
         {
diff --git a/arch/arm/src/arm/up_sigdeliver.c b/arch/arm/src/arm/up_sigdeliver.c
index c03511d4df485c2648ae567bcbdb43656196e8d7..29176429f3cecd284f677bb9f74cb46be9570aeb 100644
--- a/arch/arm/src/arm/up_sigdeliver.c
+++ b/arch/arm/src/arm/up_sigdeliver.c
@@ -95,7 +95,7 @@ void up_sigdeliver(void)
 
   board_autoled_on(LED_SIGNAL);
 
-  sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
         rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
   ASSERT(rtcb->xcp.sigdeliver != NULL);
 
@@ -126,7 +126,7 @@ void up_sigdeliver(void)
    * errno that is needed by the user logic (it is probably EINTR).
    */
 
-  sdbg("Resuming\n");
+  sinfo("Resuming\n");
   (void)up_irq_save();
   rtcb->pterrno = saved_errno;
 
diff --git a/arch/arm/src/arm/up_syscall.c b/arch/arm/src/arm/up_syscall.c
index 07d8ac26d229a90eff58544e4349008ffde9a7d4..c52b036951920870dff3fc4882d72e63f17a07cb 100644
--- a/arch/arm/src/arm/up_syscall.c
+++ b/arch/arm/src/arm/up_syscall.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  *  arch/arm/src/arm/up_syscall.c
  *
- *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 
@@ -58,22 +47,6 @@
 #include "up_arch.h"
 #include "up_internal.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * vectors
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -82,8 +55,8 @@
  * Name: up_syscall
  *
  * Description:
- *   SWI interrupts will vection here with insn=the SWI
- *   instruction and xcp=the interrupt context
+ *   SWI interrupts will vector here with insn=the SWI instruction and
+ *   xcp=the interrupt context
  *
  *   The handler may get the SWI number be de-referencing
  *   the return address saved in the xcp and decoding
@@ -93,7 +66,7 @@
 
 void up_syscall(uint32_t *regs)
 {
-  lldbg("Syscall from 0x%x\n", regs[REG_PC]);
+  _alert("Syscall from 0x%x\n", regs[REG_PC]);
   CURRENT_REGS = regs;
   PANIC();
 }
diff --git a/arch/arm/src/arm/up_undefinedinsn.c b/arch/arm/src/arm/up_undefinedinsn.c
index 99b1e3fc66b1bca83ed545f1f9e6442f24d65ad2..364b072acdef98754b6e72d7921904c05576427b 100644
--- a/arch/arm/src/arm/up_undefinedinsn.c
+++ b/arch/arm/src/arm/up_undefinedinsn.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/arm/up_undefinedinsn.c
  *
- *   Copyright (C) 2007-2009, 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 #include 
@@ -58,18 +47,6 @@
 
 #include "up_internal.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -80,7 +57,7 @@
 
 void up_undefinedinsn(uint32_t *regs)
 {
-  lldbg("Undefined instruction at 0x%x\n", regs[REG_PC]);
+  _alert("Undefined instruction at 0x%x\n", regs[REG_PC]);
   CURRENT_REGS = regs;
   PANIC();
 }
diff --git a/arch/arm/src/armv6-m/Kconfig b/arch/arm/src/armv6-m/Kconfig
index ed8b54a8e1a06c89ed5864f86e1be46649e2df06..ed56bc9a71e7f7b36730fc08ed420fafe6e0d45a 100644
--- a/arch/arm/src/armv6-m/Kconfig
+++ b/arch/arm/src/armv6-m/Kconfig
@@ -7,12 +7,12 @@ comment "ARMV6M Configuration Options"
 
 choice
 	prompt "Toolchain Selection"
-	default ARMV6M_TOOLCHAIN_GNU_EABIW if HOST_WINDOWS
-	default ARMV6M_TOOLCHAIN_GNU_EABIL if !HOST_WINDOWS
+	default ARMV6M_TOOLCHAIN_GNU_EABIW if TOOLCHAIN_WINDOWS
+	default ARMV6M_TOOLCHAIN_GNU_EABIL if !TOOLCHAIN_WINDOWS
 
 config ARMV6M_TOOLCHAIN_ATOLLIC
 	bool "Atollic Lite/Pro for Windows"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 
 config ARMV6M_TOOLCHAIN_BUILDROOT
 	bool "Buildroot (Cygwin or Linux)"
@@ -24,7 +24,7 @@ config ARMV6M_TOOLCHAIN_CODEREDL
 
 config ARMV6M_TOOLCHAIN_CODEREDW
 	bool "CodeRed for Windows"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 
 config ARMV6M_TOOLCHAIN_CODESOURCERYL
 	bool "CodeSourcery GNU toolchain under Linux"
@@ -32,11 +32,11 @@ config ARMV6M_TOOLCHAIN_CODESOURCERYL
 
 config ARMV6M_TOOLCHAIN_CODESOURCERYW
 	bool "CodeSourcery GNU toolchain under Windows"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 
 config ARMV6M_TOOLCHAIN_DEVKITARM
 	bool "devkitARM GNU toolchain"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 
 config ARMV6M_TOOLCHAIN_GNU_EABIL
 	bool "Generic GNU EABI toolchain under Linux (or other POSIX environment)"
@@ -46,7 +46,7 @@ config ARMV6M_TOOLCHAIN_GNU_EABIL
 
 config ARMV6M_TOOLCHAIN_GNU_EABIW
 	bool "Generic GNU EABI toolchain under Windows"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 	---help---
 		This option should work for any modern GNU toolchain (GCC 4.5 or newer)
 		configured for arm-none-eabi.
diff --git a/arch/arm/src/armv6-m/nvic.h b/arch/arm/src/armv6-m/nvic.h
index 945d5c4338f27eddd05964437a3989e5459fbce5..b6f4391a4a68466c299e149d152d83d0ad48f284 100644
--- a/arch/arm/src/armv6-m/nvic.h
+++ b/arch/arm/src/armv6-m/nvic.h
@@ -41,6 +41,7 @@
  ****************************************************************************************************/
 
 #include 
+#include 
 
 /****************************************************************************************************
  * Pre-processor Definitions
@@ -386,7 +387,7 @@ extern "C"
  *
  ****************************************************************************************************/
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 void up_dumpnvic(FAR const char *msg);
 #else
 #  define up_dumpnvic(m)
diff --git a/arch/arm/src/armv6-m/up_assert.c b/arch/arm/src/armv6-m/up_assert.c
index dcb71392696ac255d524318c661bc8d5c0b136df..f218cd477b028866ec07d179ca4daeedda62f1a7 100644
--- a/arch/arm/src/armv6-m/up_assert.c
+++ b/arch/arm/src/armv6-m/up_assert.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/armv6-m/up_assert.c
  *
- *   Copyright (C) 2013-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013-2015, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 #include 
@@ -76,23 +65,6 @@
 #  undef CONFIG_ARCH_USBDUMP
 #endif
 
-/* The following is just intended to keep some ugliness out of the mainline
- * code.  We are going to print the task name if:
- *
- *  CONFIG_TASK_NAME_SIZE > 0 &&    <-- The task has a name
- *  (defined(CONFIG_DEBUG)    ||    <-- And the debug is enabled (lldbg used)
- *   defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
- */
-
-#undef CONFIG_PRINT_TASKNAME
-#if CONFIG_TASK_NAME_SIZE > 0 && (defined(CONFIG_DEBUG) || defined(CONFIG_ARCH_STACKDUMP))
-#  define CONFIG_PRINT_TASKNAME 1
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -126,7 +98,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
   for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
     {
       uint32_t *ptr = (uint32_t *)stack;
-      lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+      _alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
              stack, ptr[0], ptr[1], ptr[2], ptr[3],
              ptr[4], ptr[5], ptr[6], ptr[7]);
     }
@@ -144,12 +116,12 @@ static void up_taskdump(FAR struct tcb_s *tcb, FAR void *arg)
 {
   /* Dump interesting properties of this task */
 
-#ifdef CONFIG_PRINT_TASKNAME
-  lldbg("%s: PID=%d Stack Used=%lu of %lu\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+  _alert("%s: PID=%d Stack Used=%lu of %lu\n",
         tcb->name, tcb->pid, (unsigned long)up_check_tcbstack(tcb),
         (unsigned long)tcb->adj_stack_size);
 #else
-  lldbg("PID: %d Stack Used=%lu of %lu\n",
+  _alert("PID: %d Stack Used=%lu of %lu\n",
         tcb->pid, (unsigned long)up_check_tcbstack(tcb),
         (unsigned long)tcb->adj_stack_size);
 #endif
@@ -184,22 +156,22 @@ static inline void up_registerdump(void)
     {
       /* Yes.. dump the interrupt registers */
 
-      lldbg("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+      _alert("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
             CURRENT_REGS[REG_R0],  CURRENT_REGS[REG_R1],
             CURRENT_REGS[REG_R2],  CURRENT_REGS[REG_R3],
             CURRENT_REGS[REG_R4],  CURRENT_REGS[REG_R5],
             CURRENT_REGS[REG_R6],  CURRENT_REGS[REG_R7]);
-      lldbg("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+      _alert("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
             CURRENT_REGS[REG_R8],  CURRENT_REGS[REG_R9],
             CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
             CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
             CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
 #ifdef CONFIG_BUILD_PROTECTED
-      lldbg("xPSR: %08x PRIMASK: %08x EXEC_RETURN: %08x\n",
+      _alert("xPSR: %08x PRIMASK: %08x EXEC_RETURN: %08x\n",
             CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
             CURRENT_REGS[REG_EXC_RETURN]);
 #else
-      lldbg("xPSR: %08x PRIMASK: %08x\n",
+      _alert("xPSR: %08x PRIMASK: %08x\n",
             CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
 #endif
     }
@@ -221,7 +193,7 @@ static int usbtrace_syslog(FAR const char *fmt, ...)
   /* Let vsyslog do the real work */
 
   va_start(ap, fmt);
-  ret = lowvsyslog(LOG_INFO, fmt, ap);
+  ret = vsyslog(LOG_EMERG, fmt, ap);
   va_end(ap);
   return ret;
 }
@@ -270,12 +242,12 @@ static void up_dumpstate(void)
 
   /* Show interrupt stack info */
 
-  lldbg("sp:     %08x\n", sp);
-  lldbg("IRQ stack:\n");
-  lldbg("  base: %08x\n", istackbase);
-  lldbg("  size: %08x\n", istacksize);
+  _alert("sp:     %08x\n", sp);
+  _alert("IRQ stack:\n");
+  _alert("  base: %08x\n", istackbase);
+  _alert("  size: %08x\n", istacksize);
 #ifdef CONFIG_STACK_COLORATION
-  lldbg("  used: %08x\n", up_check_intstack());
+  _alert("  used: %08x\n", up_check_intstack());
 #endif
 
   /* Does the current stack pointer lie within the interrupt
@@ -297,14 +269,14 @@ static void up_dumpstate(void)
   if (CURRENT_REGS)
     {
       sp = CURRENT_REGS[REG_R13];
-      lldbg("sp:     %08x\n", sp);
+      _alert("sp:     %08x\n", sp);
     }
 
-  lldbg("User stack:\n");
-  lldbg("  base: %08x\n", ustackbase);
-  lldbg("  size: %08x\n", ustacksize);
+  _alert("User stack:\n");
+  _alert("  base: %08x\n", ustackbase);
+  _alert("  size: %08x\n", ustacksize);
 #ifdef CONFIG_STACK_COLORATION
-  lldbg("  used: %08x\n", up_check_tcbstack(rtcb));
+  _alert("  used: %08x\n", up_check_tcbstack(rtcb));
 #endif
 
   /* Dump the user stack if the stack pointer lies within the allocated user
@@ -317,11 +289,11 @@ static void up_dumpstate(void)
     }
 
 #else
-  lldbg("sp:         %08x\n", sp);
-  lldbg("stack base: %08x\n", ustackbase);
-  lldbg("stack size: %08x\n", ustacksize);
+  _alert("sp:         %08x\n", sp);
+  _alert("stack base: %08x\n", ustackbase);
+  _alert("stack size: %08x\n", ustacksize);
 #ifdef CONFIG_STACK_COLORATION
-  lldbg("stack used: %08x\n", up_check_tcbstack(rtcb));
+  _alert("stack used: %08x\n", up_check_tcbstack(rtcb));
 #endif
 
   /* Dump the user stack if the stack pointer lies within the allocated user
@@ -330,7 +302,7 @@ static void up_dumpstate(void)
 
   if (sp > ustackbase || sp <= ustackbase - ustacksize)
     {
-      lldbg("ERROR: Stack pointer is not within allocated stack\n");
+      _alert("ERROR: Stack pointer is not within allocated stack\n");
     }
   else
     {
@@ -394,17 +366,17 @@ static void _up_assert(int errorcode)
 
 void up_assert(const uint8_t *filename, int lineno)
 {
-#ifdef CONFIG_PRINT_TASKNAME
+#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
   struct tcb_s *rtcb = this_task();
 #endif
 
   board_autoled_on(LED_ASSERTION);
 
-#ifdef CONFIG_PRINT_TASKNAME
-  lldbg("Assertion failed at file:%s line: %d task: %s\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+  _alert("Assertion failed at file:%s line: %d task: %s\n",
         filename, lineno, rtcb->name);
 #else
-  lldbg("Assertion failed at file:%s line: %d\n",
+  _alert("Assertion failed at file:%s line: %d\n",
         filename, lineno);
 #endif
 
diff --git a/arch/arm/src/armv6-m/up_dumpnvic.c b/arch/arm/src/armv6-m/up_dumpnvic.c
index 36c2fdf21682cf9e24b417aa83da5bcd60ae845c..8439ac6a2a91f7005ea86a5fe762fdf560dbce8b 100644
--- a/arch/arm/src/armv6-m/up_dumpnvic.c
+++ b/arch/arm/src/armv6-m/up_dumpnvic.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/armv6-m/up_dumpnvic.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -48,19 +48,7 @@
 
 #include "nvic.h"
 
-#ifdef CONFIG_DEBUG
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
+#ifdef CONFIG_DEBUG_FEATURES
 
 /****************************************************************************
  * Public Functions
@@ -76,6 +64,7 @@
 
 void up_dumpnvic(FAR const char *msg)
 {
+#ifdef CONFIG_DEBUG_INFO
   irqstate_t flags;
   int i;
 
@@ -83,29 +72,30 @@ void up_dumpnvic(FAR const char *msg)
 
   flags = enter_critical_section();
 
-  lldbg("NVIC: %s\n", msg);
-  lldbg("   ISER: %08x  ICER: %08x  ISPR: %08x  ICPR: %08x\n",
-        getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER),
-        getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
+  _info("NVIC: %s\n", msg);
+  _info("   ISER: %08x  ICER: %08x  ISPR: %08x  ICPR: %08x\n",
+       getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER),
+       getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
 
   for (i = 0 ; i < 8; i += 4)
     {
-      lldbg("   IPR%d: %08x  IPR%d: %08x  IPR%d: %08x  IPR%d: %08x\n",
-            i,   getreg32(ARMV6M_NVIC_IPR(i)),
-            i+1, getreg32(ARMV6M_NVIC_IPR(i+1)),
-            i+2, getreg32(ARMV6M_NVIC_IPR(i+2)),
-            i+3, getreg32(ARMV6M_NVIC_IPR(i+3)));
+      _info("   IPR%d: %08x  IPR%d: %08x  IPR%d: %08x  IPR%d: %08x\n",
+           i,   getreg32(ARMV6M_NVIC_IPR(i)),
+           i+1, getreg32(ARMV6M_NVIC_IPR(i+1)),
+           i+2, getreg32(ARMV6M_NVIC_IPR(i+2)),
+           i+3, getreg32(ARMV6M_NVIC_IPR(i+3)));
     }
 
-  lldbg("SYSCON:\n");
-  lldbg("  CPUID: %08x  ICSR: %08x AIRCR: %08x   SCR: %08x\n",
-        getreg32(ARMV6M_SYSCON_CPUID), getreg32(ARMV6M_SYSCON_ICSR),
-        getreg32(ARMV6M_SYSCON_AIRCR), getreg32(ARMV6M_SYSCON_SCR));
-  lldbg("    CCR: %08x SHPR2: %08x SHPR3: %08x\n",
-        getreg32(ARMV6M_SYSCON_CCR),   getreg32(ARMV6M_SYSCON_SHPR2),
-        getreg32(ARMV6M_SYSCON_SHPR3));
+  _info("SYSCON:\n");
+  _info("  CPUID: %08x  ICSR: %08x AIRCR: %08x   SCR: %08x\n",
+       getreg32(ARMV6M_SYSCON_CPUID), getreg32(ARMV6M_SYSCON_ICSR),
+       getreg32(ARMV6M_SYSCON_AIRCR), getreg32(ARMV6M_SYSCON_SCR));
+  _info("    CCR: %08x SHPR2: %08x SHPR3: %08x\n",
+       getreg32(ARMV6M_SYSCON_CCR),   getreg32(ARMV6M_SYSCON_SHPR2),
+       getreg32(ARMV6M_SYSCON_SHPR3));
 
   leave_critical_section(flags);
+#endif
 }
 
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_FEATURES */
diff --git a/arch/arm/src/armv6-m/up_hardfault.c b/arch/arm/src/armv6-m/up_hardfault.c
index edd1bab6a23606f93397d4c85bd62494de83cf90..6b4f69760e19327fb4fb3bf72e496290ef256e28 100644
--- a/arch/arm/src/armv6-m/up_hardfault.c
+++ b/arch/arm/src/armv6-m/up_hardfault.c
@@ -55,25 +55,13 @@
  ****************************************************************************/
 
 #ifdef CONFIG_DEBUG_HARDFAULT
-# define hfdbg(format, ...) lldbg(format, ##__VA_ARGS__)
+# define hfinfo(format, ...)  _alert(format, ##__VA_ARGS__)
 #else
-# define hfdbg(x...)
+# define hfinfo(x...)
 #endif
 
 #define INSN_SVC0        0xdf00 /* insn: svc 0 */
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -87,7 +75,7 @@
  *
  ****************************************************************************/
 
-int up_hardfault(int irq, FAR void *context)
+int up_hardfault(int irq, FAR void *context, FAR void *arg)
 {
   uint32_t *regs = (uint32_t *)context;
 
@@ -118,7 +106,7 @@ int up_hardfault(int irq, FAR void *context)
       /* Fetch the instruction that caused the Hard fault */
 
       uint16_t insn = *pc;
-      hfdbg("  PC: %p INSN: %04x\n", pc, insn);
+      hfinfo("  PC: %p INSN: %04x\n", pc, insn);
 
       /* If this was the instruction 'svc 0', then forward processing
        * to the SVCall handler
@@ -126,30 +114,30 @@ int up_hardfault(int irq, FAR void *context)
 
       if (insn == INSN_SVC0)
         {
-          hfdbg("Forward SVCall\n");
-          return up_svcall(irq, context);
+          hfinfo("Forward SVCall\n");
+          return up_svcall(irq, context, NULL);
         }
     }
 
 #if defined(CONFIG_DEBUG_HARDFAULT)
   /* Dump some hard fault info */
 
-  hfdbg("\nHard Fault:\n");
-  hfdbg("  IRQ: %d regs: %p\n", irq, regs);
-  hfdbg("  PRIMASK: %08x IPSR: %08x\n",
-        getprimask(), getipsr());
-  hfdbg("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-        regs[REG_R0],  regs[REG_R1],  regs[REG_R2],  regs[REG_R3],
-        regs[REG_R4],  regs[REG_R5],  regs[REG_R6],  regs[REG_R7]);
-  hfdbg("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-        regs[REG_R8],  regs[REG_R9],  regs[REG_R10], regs[REG_R11],
-        regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
-  hfdbg("  xPSR: %08x PRIMASK: %08x (saved)\n",
-        CURRENT_REGS[REG_XPSR],  CURRENT_REGS[REG_PRIMASK]);
+  _alert("\nHard Fault:\n");
+  _alert("  IRQ: %d regs: %p\n", irq, regs);
+  _alert("  PRIMASK: %08x IPSR: %08x\n",
+         getprimask(), getipsr());
+  _alert("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+         regs[REG_R0],  regs[REG_R1],  regs[REG_R2],  regs[REG_R3],
+         regs[REG_R4],  regs[REG_R5],  regs[REG_R6],  regs[REG_R7]);
+  _alert("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+         regs[REG_R8],  regs[REG_R9],  regs[REG_R10], regs[REG_R11],
+         regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
+  _alert("  xPSR: %08x PRIMASK: %08x (saved)\n",
+         CURRENT_REGS[REG_XPSR],  CURRENT_REGS[REG_PRIMASK]);
 #endif
 
   (void)up_irq_save();
-  lldbg("PANIC!!! Hard fault\n");
+  _alert("PANIC!!! Hard fault\n");
   PANIC();
   return OK; /* Won't get here */
 }
diff --git a/arch/arm/src/armv6-m/up_releasepending.c b/arch/arm/src/armv6-m/up_releasepending.c
index c3e2d02ea70c64ed4323136e48f3dff423627322..3c925a02b816280902308c6f314ef8baadc8dc9c 100644
--- a/arch/arm/src/armv6-m/up_releasepending.c
+++ b/arch/arm/src/armv6-m/up_releasepending.c
@@ -66,7 +66,7 @@ void up_release_pending(void)
 {
   struct tcb_s *rtcb = this_task();
 
-  slldbg("From TCB=%p\n", rtcb);
+  sinfo("From TCB=%p\n", rtcb);
 
   /* Merge the g_pendingtasks list into the ready-to-run task list */
 
diff --git a/arch/arm/src/armv6-m/up_reprioritizertr.c b/arch/arm/src/armv6-m/up_reprioritizertr.c
index bd50b88b70c2d8c05e5f29b410eeff6af135ac88..41f0c8700d33b9b6859c372b6a134087d4ed89e7 100644
--- a/arch/arm/src/armv6-m/up_reprioritizertr.c
+++ b/arch/arm/src/armv6-m/up_reprioritizertr.c
@@ -94,7 +94,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
       struct tcb_s *rtcb = this_task();
       bool switch_needed;
 
-      slldbg("TCB=%p PRI=%d\n", tcb, priority);
+      sinfo("TCB=%p PRI=%d\n", tcb, priority);
 
       /* Remove the tcb task from the ready-to-run list.
        * sched_removereadytorun will return true if we just removed the head
diff --git a/arch/arm/src/armv6-m/up_schedulesigaction.c b/arch/arm/src/armv6-m/up_schedulesigaction.c
index be9505a9c2c9ae74404f0cf8edd4d215b42cc432..5040582bacf59d2c87c8f27501cb454fd648b357 100644
--- a/arch/arm/src/armv6-m/up_schedulesigaction.c
+++ b/arch/arm/src/armv6-m/up_schedulesigaction.c
@@ -107,7 +107,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
 {
   irqstate_t flags;
 
-  sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+  sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
 
   /* Make sure that interrupts are disabled */
 
@@ -121,7 +121,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
        * to the currently executing task.
        */
 
-      sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
+      sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
 
       if (tcb == this_task())
         {
diff --git a/arch/arm/src/armv6-m/up_sigdeliver.c b/arch/arm/src/armv6-m/up_sigdeliver.c
index 84b89542a207aff8cceb519d51bd8e0ac47ce0ff..c2b3e8675e0ee606060d2872254b66607aa5a354 100644
--- a/arch/arm/src/armv6-m/up_sigdeliver.c
+++ b/arch/arm/src/armv6-m/up_sigdeliver.c
@@ -100,7 +100,7 @@ void up_sigdeliver(void)
 
   board_autoled_on(LED_SIGNAL);
 
-  sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
         rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
   ASSERT(rtcb->xcp.sigdeliver != NULL);
 
@@ -135,7 +135,7 @@ void up_sigdeliver(void)
    * errno that is needed by the user logic (it is probably EINTR).
    */
 
-  sdbg("Resuming\n");
+  sinfo("Resuming\n");
   (void)up_irq_save();
   rtcb->pterrno = saved_errno;
 
diff --git a/arch/arm/src/armv6-m/up_svcall.c b/arch/arm/src/armv6-m/up_svcall.c
index b5cec07937933cdc12a47165f980057554c8b0e2..fd61de1906f7a6dbf464e0048981d44216b85e99 100644
--- a/arch/arm/src/armv6-m/up_svcall.c
+++ b/arch/arm/src/armv6-m/up_svcall.c
@@ -55,33 +55,6 @@
 #include "exc_return.h"
 #include "up_internal.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-/* Configuration ************************************************************/
-
-/* Debug ********************************************************************/
-/* Debug output from this file may interfere with context switching!  To get
- * debug output you must enabled the following in your NuttX configuration:
- *
- * - CONFIG_DEBUG and CONFIG_DEBUG_SYSCALL (shows only syscalls)
- * - CONFIG_DEBUG and CONFIG_DEBUG_SVCALL  (shows everything)
- */
-
-#if defined(CONFIG_DEBUG_SYSCALL) || defined(CONFIG_DEBUG_SVCALL)
-# define svcdbg(format, ...) lldbg(format, ##__VA_ARGS__)
-#else
-# define svcdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -157,7 +130,7 @@ static void dispatch_syscall(void)
  *
  ****************************************************************************/
 
-int up_svcall(int irq, FAR void *context)
+int up_svcall(int irq, FAR void *context, FAR void *arg)
 {
   uint32_t *regs = (uint32_t *)context;
   uint32_t cmd;
@@ -169,24 +142,24 @@ int up_svcall(int irq, FAR void *context)
    * and R1..R7 =  variable number of arguments depending on the system call.
    */
 
-#if defined(CONFIG_DEBUG_SYSCALL) || defined(CONFIG_DEBUG_SVCALL)
+#ifdef CONFIG_DEBUG_SYSCALL_INFO
 # ifndef CONFIG_DEBUG_SVCALL
   if (cmd > SYS_switch_context)
 # endif
     {
-      svcdbg("SVCALL Entry: regs: %p cmd: %d\n", regs, cmd);
-      svcdbg("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-             regs[REG_R0],  regs[REG_R1],  regs[REG_R2],  regs[REG_R3],
-             regs[REG_R4],  regs[REG_R5],  regs[REG_R6],  regs[REG_R7]);
-      svcdbg("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-             regs[REG_R8],  regs[REG_R9],  regs[REG_R10], regs[REG_R11],
-             regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
+      svcinfo("SVCALL Entry: regs: %p cmd: %d\n", regs, cmd);
+      svcinfo("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+              regs[REG_R0],  regs[REG_R1],  regs[REG_R2],  regs[REG_R3],
+              regs[REG_R4],  regs[REG_R5],  regs[REG_R6],  regs[REG_R7]);
+      svcinfo("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+              regs[REG_R8],  regs[REG_R9],  regs[REG_R10], regs[REG_R11],
+              regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
 # ifdef CONFIG_BUILD_PROTECTED
-      svcdbg(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n",
-             regs[REG_XPSR], regs[REG_PRIMASK], regs[REG_EXC_RETURN]);
+      svcinfo(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n",
+              regs[REG_XPSR], regs[REG_PRIMASK], regs[REG_EXC_RETURN]);
 # else
-      svcdbg(" PSR: %08x PRIMASK: %08x\n",
-             regs[REG_XPSR], regs[REG_PRIMASK]);
+      svcinfo(" PSR: %08x PRIMASK: %08x\n",
+              regs[REG_XPSR], regs[REG_PRIMASK]);
 # endif
     }
 #endif
@@ -471,7 +444,7 @@ int up_svcall(int irq, FAR void *context)
 
           regs[REG_R0] -= CONFIG_SYS_RESERVED;
 #else
-          slldbg("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
+          svcerr("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
 #endif
         }
         break;
@@ -479,37 +452,37 @@ int up_svcall(int irq, FAR void *context)
 
   /* Report what happened.  That might difficult in the case of a context switch */
 
-#if defined(CONFIG_DEBUG_SYSCALL) || defined(CONFIG_DEBUG_SVCALL)
+#ifdef CONFIG_DEBUG_SYSCALL_INFO
 # ifndef CONFIG_DEBUG_SVCALL
   if (cmd > SYS_switch_context)
 # else
   if (regs != CURRENT_REGS)
 # endif
     {
-      svcdbg("SVCall Return:\n");
-      svcdbg("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-             CURRENT_REGS[REG_R0],  CURRENT_REGS[REG_R1],
-             CURRENT_REGS[REG_R2],  CURRENT_REGS[REG_R3],
-             CURRENT_REGS[REG_R4],  CURRENT_REGS[REG_R5],
-             CURRENT_REGS[REG_R6],  CURRENT_REGS[REG_R7]);
-      svcdbg("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-             CURRENT_REGS[REG_R8],  CURRENT_REGS[REG_R9],
-             CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
-             CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
-             CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
+      svcinfo("SVCall Return:\n");
+      svcinfo("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+              CURRENT_REGS[REG_R0],  CURRENT_REGS[REG_R1],
+              CURRENT_REGS[REG_R2],  CURRENT_REGS[REG_R3],
+              CURRENT_REGS[REG_R4],  CURRENT_REGS[REG_R5],
+              CURRENT_REGS[REG_R6],  CURRENT_REGS[REG_R7]);
+      svcinfo("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+              CURRENT_REGS[REG_R8],  CURRENT_REGS[REG_R9],
+              CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
+              CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
+              CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
 #ifdef CONFIG_BUILD_PROTECTED
-      svcdbg(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n",
-             CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
-             CURRENT_REGS[REG_EXC_RETURN]);
+      svcinfo(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n",
+              CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
+              CURRENT_REGS[REG_EXC_RETURN]);
 #else
-      svcdbg(" PSR: %08x PRIMASK: %08x\n",
-             CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
+      svcinfo(" PSR: %08x PRIMASK: %08x\n",
+              CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
 #endif
     }
 # ifdef CONFIG_DEBUG_SVCALL
   else
     {
-      svcdbg("SVCall Return: %d\n", regs[REG_R0]);
+      svcinfo("SVCall Return: %d\n", regs[REG_R0]);
     }
 # endif
 #endif
diff --git a/arch/arm/src/armv7-a/Kconfig b/arch/arm/src/armv7-a/Kconfig
index 85ad10bbee0c202068ccec5d04ae73a1af94596c..e4746900a3fb81a0e821bb37fedc80986deb4e7d 100644
--- a/arch/arm/src/armv7-a/Kconfig
+++ b/arch/arm/src/armv7-a/Kconfig
@@ -128,15 +128,17 @@ endif # ARMV7A_HAVE_L2CC
 
 choice
 	prompt "Toolchain Selection"
-	default ARMV7A_TOOLCHAIN_GNU_EABIW if HOST_WINDOWS
-	default ARMV7A_TOOLCHAIN_GNU_EABIL if !HOST_WINDOWS
+	default ARMV7A_TOOLCHAIN_GNU_EABIW if TOOLCHAIN_WINDOWS
+	default ARMV7A_TOOLCHAIN_GNU_EABIL if !TOOLCHAIN_WINDOWS
 
 config ARMV7A_TOOLCHAIN_BUILDROOT
 	bool "Buildroot (Cygwin or Linux)"
+	select ARM_TOOLCHAIN_GNU
 	depends on !WINDOWS_NATIVE
 
 config ARMV7A_TOOLCHAIN_CODESOURCERYL
 	bool "CodeSourcery GNU toolchain under Linux"
+	select ARM_TOOLCHAIN_GNU
 	depends on HOST_LINUX
 	---help---
 		For use with the GNU toolchain built with the NuttX buildroot package.
@@ -145,27 +147,32 @@ config ARMV7A_TOOLCHAIN_CODESOURCERYL
 
 config ARMV7A_TOOLCHAIN_CODESOURCERYW
 	bool "CodeSourcery GNU toolchain under Windows"
-	depends on HOST_WINDOWS
+	select ARM_TOOLCHAIN_GNU
+	depends on TOOLCHAIN_WINDOWS
 
 config ARMV7A_TOOLCHAIN_DEVKITARM
 	bool "devkitARM GNU toolchain"
-	depends on HOST_WINDOWS
+	select ARM_TOOLCHAIN_GNU
+	depends on TOOLCHAIN_WINDOWS
 
 config ARMV7A_TOOLCHAIN_GNU_EABIL
 	bool "Generic GNU EABI toolchain under Linux (or other POSIX environment)"
+	select ARM_TOOLCHAIN_GNU
 	---help---
 		This option should work for any modern GNU toolchain (GCC 4.5 or newer)
 		configured for arm-none-eabi-.
 
 config ARMV7A_TOOLCHAIN_GNU_EABIW
 	bool "Generic GNU EABI toolchain under Windows"
-	depends on HOST_WINDOWS
+	select ARM_TOOLCHAIN_GNU
+	depends on TOOLCHAIN_WINDOWS
 	---help---
 		This option should work for any modern GNU toolchain (GCC 4.5 or newer)
 		configured for arm-none-eabi-.
 
 config ARMV7A_TOOLCHAIN_GNU_OABI
 	bool "Generic GNU OABI toolchain"
+	select ARM_TOOLCHAIN_GNU
 	---help---
 		This option should work for any GNU toolchain configured for arm-elf-.
 
diff --git a/arch/arm/src/armv7-a/arm_addrenv.c b/arch/arm/src/armv7-a/arm_addrenv.c
index 2bd1f886cecc08fa8ea163c382416c38cbe64375..7d2818283dca2d1148ea3ecb01c9c4b66fae85a0 100644
--- a/arch/arm/src/armv7-a/arm_addrenv.c
+++ b/arch/arm/src/armv7-a/arm_addrenv.c
@@ -257,7 +257,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
 {
   int ret;
 
-  bvdbg("addrenv=%p textsize=%lu datasize=%lu\n",
+  binfo("addrenv=%p textsize=%lu datasize=%lu\n",
         addrenv, (unsigned long)textsize, (unsigned long)datasize);
 
   DEBUGASSERT(addrenv);
@@ -278,7 +278,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
                                   MMU_L2_UTEXTFLAGS);
   if (ret < 0)
     {
-      bdbg("ERROR: Failed to create .text region: %d\n", ret);
+      berr("ERROR: Failed to create .text region: %d\n", ret);
       goto errout;
     }
 
@@ -293,7 +293,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
                                   MMU_L2_UDATAFLAGS);
   if (ret < 0)
     {
-      bdbg("ERROR: Failed to create .bss/.data region: %d\n", ret);
+      berr("ERROR: Failed to create .bss/.data region: %d\n", ret);
       goto errout;
     }
 
@@ -305,7 +305,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
   ret = up_addrenv_initdata((uintptr_t)addrenv->data[0] & PMD_PTE_PADDR_MASK);
   if (ret < 0)
     {
-      bdbg("ERROR: Failed to initialize .bss/.data region: %d\n", ret);
+      berr("ERROR: Failed to initialize .bss/.data region: %d\n", ret);
       goto errout;
     }
 #endif
@@ -318,7 +318,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
                                   MMU_L2_UDATAFLAGS);
   if (ret < 0)
     {
-      bdbg("ERROR: Failed to create heap region: %d\n", ret);
+      berr("ERROR: Failed to create heap region: %d\n", ret);
       goto errout;
     }
 
@@ -353,7 +353,7 @@ errout:
 
 int up_addrenv_destroy(FAR group_addrenv_t *addrenv)
 {
-  bvdbg("addrenv=%p\n", addrenv);
+  binfo("addrenv=%p\n", addrenv);
   DEBUGASSERT(addrenv);
 
   /* Destroy the .text region */
@@ -405,7 +405,7 @@ int up_addrenv_destroy(FAR group_addrenv_t *addrenv)
 
 int up_addrenv_vtext(FAR group_addrenv_t *addrenv, FAR void **vtext)
 {
-  bvdbg("return=%p\n", (FAR void *)CONFIG_ARCH_TEXT_VBASE);
+  binfo("return=%p\n", (FAR void *)CONFIG_ARCH_TEXT_VBASE);
 
   /* Not much to do in this case */
 
@@ -439,7 +439,7 @@ int up_addrenv_vtext(FAR group_addrenv_t *addrenv, FAR void **vtext)
 int up_addrenv_vdata(FAR group_addrenv_t *addrenv, uintptr_t textsize,
                      FAR void **vdata)
 {
-  bvdbg("return=%p\n",
+  binfo("return=%p\n",
         (FAR void *)(CONFIG_ARCH_DATA_VBASE + ARCH_DATA_RESERVE_SIZE));
 
   /* Not much to do in this case */
@@ -636,7 +636,7 @@ int up_addrenv_restore(FAR const save_addrenv_t *oldenv)
   uintptr_t vaddr;
   int i;
 
-  bvdbg("oldenv=%p\n", oldenv);
+  binfo("oldenv=%p\n", oldenv);
   DEBUGASSERT(oldenv);
 
   for (vaddr = CONFIG_ARCH_TEXT_VBASE, i = 0;
@@ -752,7 +752,7 @@ int up_addrenv_coherent(FAR const group_addrenv_t *addrenv)
 int up_addrenv_clone(FAR const group_addrenv_t *src,
                      FAR group_addrenv_t *dest)
 {
-  bvdbg("src=%p dest=%p\n", src, dest);
+  binfo("src=%p dest=%p\n", src, dest);
   DEBUGASSERT(src && dest);
 
   /* Just copy the address environment from the source to the destination */
@@ -784,7 +784,7 @@ int up_addrenv_clone(FAR const group_addrenv_t *src,
 
 int up_addrenv_attach(FAR struct task_group_s *group, FAR struct tcb_s *tcb)
 {
-  bvdbg("group=%p tcb=%p\n", group, tcb);
+  binfo("group=%p tcb=%p\n", group, tcb);
 
   /* Nothing needs to be done in this implementation */
 
@@ -817,7 +817,7 @@ int up_addrenv_attach(FAR struct task_group_s *group, FAR struct tcb_s *tcb)
 
 int up_addrenv_detach(FAR struct task_group_s *group, FAR struct tcb_s *tcb)
 {
-  bvdbg("group=%p tcb=%p\n", group, tcb);
+  binfo("group=%p tcb=%p\n", group, tcb);
 
   /* Nothing needs to be done in this implementation */
 
diff --git a/arch/arm/src/armv7-a/arm_addrenv_kstack.c b/arch/arm/src/armv7-a/arm_addrenv_kstack.c
index da2a474126edce8306937c48ce5202bb016f14b7..5bb2b688b541cc09b477555ac879010dd39f7d06 100644
--- a/arch/arm/src/armv7-a/arm_addrenv_kstack.c
+++ b/arch/arm/src/armv7-a/arm_addrenv_kstack.c
@@ -144,7 +144,7 @@
 
 int up_addrenv_kstackalloc(FAR struct tcb_s *tcb)
 {
-  bvdbg("tcb=%p stacksize=%u\n", tcb, ARCH_KERNEL_STACKSIZE);
+  binfo("tcb=%p stacksize=%u\n", tcb, ARCH_KERNEL_STACKSIZE);
 
   DEBUGASSERT(tcb && tcb->xcp.kstack == 0);
 
@@ -153,7 +153,7 @@ int up_addrenv_kstackalloc(FAR struct tcb_s *tcb)
   tcb->xcp.kstack = (FAR uint32_t *)kmm_memalign(8, ARCH_KERNEL_STACKSIZE);
   if (!tcb->xcp.kstack)
     {
-      bdbg("ERROR: Failed to allocate the kernel stack\n");
+      berr("ERROR: Failed to allocate the kernel stack\n");
       return -ENOMEM;
     }
 
@@ -177,7 +177,7 @@ int up_addrenv_kstackalloc(FAR struct tcb_s *tcb)
 
 int up_addrenv_kstackfree(FAR struct tcb_s *tcb)
 {
-  bvdbg("tcb=%p\n", tcb);
+  binfo("tcb=%p\n", tcb);
   DEBUGASSERT(tcb);
 
   /* Does the exiting thread have a kernel stack? */
diff --git a/arch/arm/src/armv7-a/arm_addrenv_shm.c b/arch/arm/src/armv7-a/arm_addrenv_shm.c
index 9a05b9f7b92997542052a72156a2b7c1dab6cbb2..cc9c9440d802dba65a345c74e6c7ebbb98e108c6 100644
--- a/arch/arm/src/armv7-a/arm_addrenv_shm.c
+++ b/arch/arm/src/armv7-a/arm_addrenv_shm.c
@@ -92,7 +92,7 @@ int up_shmat(FAR uintptr_t *pages, unsigned int npages, uintptr_t vaddr)
   unsigned int nmapped;
   unsigned int shmndx;
 
-  shmvdbg("pages=%p npages=%d vaddr=%08lx\n",
+  shminfo("pages=%p npages=%d vaddr=%08lx\n",
           pages, npages, (unsigned long)vaddr);
 
   /* Sanity checks */
@@ -241,7 +241,7 @@ int up_shmdt(uintptr_t vaddr, unsigned int npages)
   unsigned int nunmapped;
   unsigned int shmndx;
 
-  shmvdbg("npages=%d vaddr=%08lx\n", npages, (unsigned long)vaddr);
+  shminfo("npages=%d vaddr=%08lx\n", npages, (unsigned long)vaddr);
 
   /* Sanity checks */
 
diff --git a/arch/arm/src/armv7-a/arm_addrenv_ustack.c b/arch/arm/src/armv7-a/arm_addrenv_ustack.c
index 206d517ef3810f7190d84bc1d0241328b851ddf9..4b7be01bd6d73e4c8df83412385790799d7ed909 100644
--- a/arch/arm/src/armv7-a/arm_addrenv_ustack.c
+++ b/arch/arm/src/armv7-a/arm_addrenv_ustack.c
@@ -143,7 +143,7 @@ int up_addrenv_ustackalloc(FAR struct tcb_s *tcb, size_t stacksize)
 {
   int ret;
 
-  bvdbg("tcb=%p stacksize=%lu\n", tcb, (unsigned long)stacksize);
+  binfo("tcb=%p stacksize=%lu\n", tcb, (unsigned long)stacksize);
 
   DEBUGASSERT(tcb);
 
@@ -163,7 +163,7 @@ int up_addrenv_ustackalloc(FAR struct tcb_s *tcb, size_t stacksize)
                                   MMU_L2_UDATAFLAGS);
   if (ret < 0)
     {
-      bdbg("ERROR: Failed to create stack region: %d\n", ret);
+      berr("ERROR: Failed to create stack region: %d\n", ret);
       up_addrenv_ustackfree(tcb);
       return ret;
     }
@@ -190,7 +190,7 @@ int up_addrenv_ustackalloc(FAR struct tcb_s *tcb, size_t stacksize)
 
 int up_addrenv_ustackfree(FAR struct tcb_s *tcb)
 {
-  bvdbg("tcb=%p\n", tcb);
+  binfo("tcb=%p\n", tcb);
   DEBUGASSERT(tcb);
 
   /* Destroy the stack region */
@@ -221,7 +221,7 @@ int up_addrenv_ustackfree(FAR struct tcb_s *tcb)
 
 int up_addrenv_vustack(FAR const struct tcb_s *tcb, FAR void **vstack)
 {
-  bvdbg("Return=%p\n", (FAR void *)CONFIG_ARCH_STACK_VBASE);
+  binfo("Return=%p\n", (FAR void *)CONFIG_ARCH_STACK_VBASE);
 
   /* Not much to do in this case */
 
diff --git a/arch/arm/src/armv7-a/arm_addrenv_utils.c b/arch/arm/src/armv7-a/arm_addrenv_utils.c
index f3147918f26e5f32c8d749b19eb6be06a1b1aee0..2eb58623afaa55e5da925232879a620c256823c5 100644
--- a/arch/arm/src/armv7-a/arm_addrenv_utils.c
+++ b/arch/arm/src/armv7-a/arm_addrenv_utils.c
@@ -84,7 +84,7 @@ int arm_addrenv_create_region(FAR uintptr_t **list, unsigned int listlen,
   unsigned int i;
   unsigned int j;
 
-  bvdbg("listlen=%d vaddr=%08lx regionsize=%ld, mmuflags=%08x\n",
+  binfo("listlen=%d vaddr=%08lx regionsize=%ld, mmuflags=%08x\n",
         listlen, (unsigned long)vaddr, (unsigned long)regionsize,
         (unsigned int)mmuflags);
 
@@ -98,7 +98,7 @@ int arm_addrenv_create_region(FAR uintptr_t **list, unsigned int listlen,
   npages = MM_NPAGES(regionsize);
   if (npages > (listlen << (20 - MM_PGSHIFT)))
     {
-      bdbg("ERROR: npages=%u listlen=%u\n", npages, listlen);
+      berr("ERROR: npages=%u listlen=%u\n", npages, listlen);
       return -E2BIG;
     }
 
@@ -201,7 +201,7 @@ void arm_addrenv_destroy_region(FAR uintptr_t **list, unsigned int listlen,
   int i;
   int j;
 
-  bvdbg("listlen=%d vaddr=%08lx\n", listlen, (unsigned long)vaddr);
+  binfo("listlen=%d vaddr=%08lx\n", listlen, (unsigned long)vaddr);
 
   for (i = 0; i < listlen; vaddr += SECTION_SIZE, list++, i++)
     {
diff --git a/arch/arm/src/armv7-a/arm_assert.c b/arch/arm/src/armv7-a/arm_assert.c
index ab3bd4c90819c9eea4377d7116f9a111cf366c31..72952e0cfaa096d8902ff03440d4ece14c70bd07 100644
--- a/arch/arm/src/armv7-a/arm_assert.c
+++ b/arch/arm/src/armv7-a/arm_assert.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/armv7-a/arm_assert.c
  *
- *   Copyright (C) 2013-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 #include 
@@ -64,6 +53,7 @@
 
 #include "up_arch.h"
 #include "sched/sched.h"
+#include "irq/irq.h"
 #include "up_internal.h"
 
 /****************************************************************************
@@ -75,19 +65,6 @@
 #  undef CONFIG_ARCH_USBDUMP
 #endif
 
-/* The following is just intended to keep some ugliness out of the mainline
- * code.  We are going to print the task name if:
- *
- *  CONFIG_TASK_NAME_SIZE > 0 &&    <-- The task has a name
- *  (defined(CONFIG_DEBUG)    ||    <-- And the debug is enabled (lldbg used)
- *   defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
- */
-
-#undef CONFIG_PRINT_TASKNAME
-#if CONFIG_TASK_NAME_SIZE > 0 && (defined(CONFIG_DEBUG) || defined(CONFIG_ARCH_STACKDUMP))
-#  define CONFIG_PRINT_TASKNAME 1
-#endif
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -121,7 +98,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
   for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
     {
       uint32_t *ptr = (uint32_t *)stack;
-      lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+      _alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
              stack, ptr[0], ptr[1], ptr[2], ptr[3],
              ptr[4], ptr[5], ptr[6], ptr[7]);
     }
@@ -139,12 +116,12 @@ static void up_taskdump(FAR struct tcb_s *tcb, FAR void *arg)
 {
   /* Dump interesting properties of this task */
 
-#ifdef CONFIG_PRINT_TASKNAME
-  lldbg("%s: PID=%d Stack Used=%lu of %lu\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+  _alert("%s: PID=%d Stack Used=%lu of %lu\n",
         tcb->name, tcb->pid, (unsigned long)up_check_tcbstack(tcb),
         (unsigned long)tcb->adj_stack_size);
 #else
-  lldbg("PID: %d Stack Used=%lu of %lu\n",
+  _alert("PID: %d Stack Used=%lu of %lu\n",
         tcb->pid, (unsigned long)up_check_tcbstack(tcb),
         (unsigned long)tcb->adj_stack_size);
 #endif
@@ -184,12 +161,12 @@ static inline void up_registerdump(void)
       for (regs = REG_R0; regs <= REG_R15; regs += 8)
         {
           uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs];
-          lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+          _alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
                  regs, ptr[0], ptr[1], ptr[2], ptr[3],
                  ptr[4], ptr[5], ptr[6], ptr[7]);
         }
 
-      lldbg("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
+      _alert("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
     }
 }
 #else
@@ -209,7 +186,7 @@ static int usbtrace_syslog(FAR const char *fmt, ...)
   /* Let vsyslog do the real work */
 
   va_start(ap, fmt);
-  ret = lowvsyslog(LOG_INFO, fmt, ap);
+  ret = vsyslog(LOG_EMERG, fmt, ap);
   va_end(ap);
   return ret;
 }
@@ -253,7 +230,7 @@ static void up_dumpstate(void)
       ustacksize = (uint32_t)rtcb->adj_stack_size;
     }
 
-  lldbg("Current sp: %08x\n", sp);
+  _alert("Current sp: %08x\n", sp);
 
 #if CONFIG_ARCH_INTERRUPTSTACK > 3
   /* Get the limits on the interrupt stack memory */
@@ -263,21 +240,21 @@ static void up_dumpstate(void)
 
   /* Show interrupt stack info */
 
-  lldbg("Interrupt stack:\n");
-  lldbg("  base: %08x\n", istackbase);
-  lldbg("  size: %08x\n", istacksize);
+  _alert("Interrupt stack:\n");
+  _alert("  base: %08x\n", istackbase);
+  _alert("  size: %08x\n", istacksize);
 #ifdef CONFIG_STACK_COLORATION
-  lldbg("  used: %08x\n", up_check_intstack());
+  _alert("  used: %08x\n", up_check_intstack());
 #endif
 #endif
 
   /* Show user stack info */
 
-  lldbg("User stack:\n");
-  lldbg("  base: %08x\n", ustackbase);
-  lldbg("  size: %08x\n", ustacksize);
+  _alert("User stack:\n");
+  _alert("  base: %08x\n", ustackbase);
+  _alert("  size: %08x\n", ustacksize);
 #ifdef CONFIG_STACK_COLORATION
-  lldbg("  used: %08x\n", up_check_tcbstack(rtcb));
+  _alert("  used: %08x\n", up_check_tcbstack(rtcb));
 #endif
 
 #ifdef CONFIG_ARCH_KERNEL_STACK
@@ -287,9 +264,9 @@ static void up_dumpstate(void)
     {
       kstackbase = (uint32_t)rtcb->xcp.kstack + CONFIG_ARCH_KERNEL_STACKSIZE - 4;
 
-      lldbg("Kernel stack:\n");
-      lldbg("  base: %08x\n", kstackbase);
-      lldbg("  size: %08x\n", CONFIG_ARCH_KERNEL_STACKSIZE);
+      _alert("Kernel stack:\n");
+      _alert("  base: %08x\n", kstackbase);
+      _alert("  size: %08x\n", CONFIG_ARCH_KERNEL_STACKSIZE);
     }
 #endif
 
@@ -300,7 +277,7 @@ static void up_dumpstate(void)
     {
       /* Yes.. dump the interrupt stack */
 
-      lldbg("Interrupt Stack\n", sp);
+      _alert("Interrupt Stack\n", sp);
       up_stackdump(sp, istackbase);
 
       /* Extract the user stack pointer which should lie
@@ -308,7 +285,7 @@ static void up_dumpstate(void)
        */
 
       sp = g_intstackbase;
-      lldbg("User sp: %08x\n", sp);
+      _alert("User sp: %08x\n", sp);
     }
 #endif
 
@@ -318,7 +295,7 @@ static void up_dumpstate(void)
 
   if (sp > ustackbase - ustacksize && sp < ustackbase)
     {
-      lldbg("User Stack\n", sp);
+      _alert("User Stack\n", sp);
       up_stackdump(sp, ustackbase);
     }
 
@@ -329,7 +306,7 @@ static void up_dumpstate(void)
 
   if (sp >= (uint32_t)rtcb->xcp.kstack && sp < kstackbase)
     {
-      lldbg("Kernel Stack\n", sp);
+      _alert("Kernel Stack\n", sp);
       up_stackdump(sp, kstackbase);
     }
 #endif
@@ -337,7 +314,7 @@ static void up_dumpstate(void)
 #ifdef CONFIG_SMP
   /* Show the CPU number */
 
-  lldbg("CPU%d:\n", up_cpu_index());
+  _alert("CPU%d:\n", up_cpu_index());
 #endif
 
   /* Then dump the CPU registers (if available) */
@@ -369,10 +346,21 @@ static void _up_assert(int errorcode)
 
   if (CURRENT_REGS || this_task()->pid == 0)
     {
+      /* Disable interrupts on this CPU */
+
       (void)up_irq_save();
+
       for (; ; )
         {
+#ifdef CONFIG_SMP
+          /* Try (again) to stop activity on other CPUs */
+
+          (void)spin_trylock(&g_cpu_irqlock);
+#endif
+
 #ifdef CONFIG_ARCH_LEDS
+          /* FLASH LEDs a 2Hz */
+
           board_autoled_on(LED_PANIC);
           up_mdelay(250);
           board_autoled_off(LED_PANIC);
@@ -396,16 +384,16 @@ static void _up_assert(int errorcode)
 
 void up_assert(const uint8_t *filename, int lineno)
 {
-#ifdef CONFIG_PRINT_TASKNAME
+#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
   struct tcb_s *rtcb = this_task();
 #endif
   board_autoled_on(LED_ASSERTION);
 
-#ifdef CONFIG_PRINT_TASKNAME
-  lldbg("Assertion failed at file:%s line: %d task: %s\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+  _alert("Assertion failed at file:%s line: %d task: %s\n",
         filename, lineno, rtcb->name);
 #else
-  lldbg("Assertion failed at file:%s line: %d\n",
+  _alert("Assertion failed at file:%s line: %d\n",
         filename, lineno);
 #endif
   up_dumpstate();
diff --git a/arch/arm/src/armv7-a/arm_cpuhead.S b/arch/arm/src/armv7-a/arm_cpuhead.S
index 487fee0a46bc805660b030c47d20c34976627b10..02735e36d50c39df1d5ff8a558fcf138d66df0fa 100644
--- a/arch/arm/src/armv7-a/arm_cpuhead.S
+++ b/arch/arm/src/armv7-a/arm_cpuhead.S
@@ -308,7 +308,11 @@ __cpu3_start:
 	orr		r0, r0, #(SCTLR_RR)
 #endif
 
-#ifndef CPU_DCACHE_DISABLE
+	/* In SMP configurations, the data cache will not be enabled until later
+	 * after SMP cache coherency has been setup.
+	 */
+
+#if 0 /* !defined(CPU_DCACHE_DISABLE) && !defined(CONFIG_SMP) */
 	/* Dcache enable
 	 *
 	 *   SCTLR_C    Bit 2:  DCache enable
diff --git a/arch/arm/src/armv7-a/arm_cpupause.c b/arch/arm/src/armv7-a/arm_cpupause.c
index 585d574b06c5f6f97c42bac4a46b28b90e9b3277..8a1499c29761cc4acfa98b48696e7db45188bdb0 100644
--- a/arch/arm/src/armv7-a/arm_cpupause.c
+++ b/arch/arm/src/armv7-a/arm_cpupause.c
@@ -44,6 +44,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "up_internal.h"
 #include "gic.h"
@@ -55,18 +56,58 @@
  * Private Data
  ****************************************************************************/
 
-static spinlock_t g_cpu_wait[CONFIG_SMP_NCPUS];
-static spinlock_t g_cpu_paused[CONFIG_SMP_NCPUS];
+/* These spinlocks are used in the SMP configuration in order to implement
+ * up_cpu_pause().  The protocol for CPUn to pause CPUm is as follows
+ *
+ * 1. The up_cpu_pause() implementation on CPUn locks both g_cpu_wait[m]
+ *    and g_cpu_paused[m].  CPUn then waits spinning on g_cpu_paused[m].
+ * 2. CPUm receives the interrupt it (1) unlocks g_cpu_paused[m] and
+ *    (2) locks g_cpu_wait[m].  The first unblocks CPUn and the second
+ *    blocks CPUm in the interrupt handler.
+ *
+ * When CPUm resumes, CPUn unlocks g_cpu_wait[m] and the interrupt handler
+ * on CPUm continues.  CPUm must, of course, also then unlock g_cpu_wait[m]
+ * so that it will be ready for the next pause operation.
+ */
+
+static volatile spinlock_t g_cpu_wait[CONFIG_SMP_NCPUS] SP_SECTION;
+static volatile spinlock_t g_cpu_paused[CONFIG_SMP_NCPUS] SP_SECTION;
 
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: arm_pause_handler
+ * Name: up_cpu_pausereq
  *
  * Description:
- *   This is the handler for SGI2.  It performs the following operations:
+ *   Return true if a pause request is pending for this CPU.
+ *
+ * Input Parameters:
+ *   cpu - The index of the CPU to be queried
+ *
+ * Returned Value:
+ *   true   = a pause request is pending.
+ *   false = no pasue request is pending.
+ *
+ ****************************************************************************/
+
+bool up_cpu_pausereq(int cpu)
+{
+  return spin_islocked(&g_cpu_paused[cpu]);
+}
+
+/****************************************************************************
+ * Name: up_cpu_paused
+ *
+ * Description:
+ *   Handle a pause request from another CPU.  Normally, this logic is
+ *   executed from interrupt handling logic within the architecture-specific
+ *   However, it is sometimes necessary necessary to perform the pending
+ *   pause operation in other contexts where the interrupt cannot be taken
+ *   in order to avoid deadlocks.
+ *
+ *   This function performs the following operations:
  *
  *   1. It saves the current task state at the head of the current assigned
  *      task list.
@@ -75,49 +116,107 @@ static spinlock_t g_cpu_paused[CONFIG_SMP_NCPUS];
  *      head of the ready to run list.
  *
  * Input Parameters:
- *   Standard interrupt handling
+ *   cpu - The index of the CPU to be paused
  *
  * Returned Value:
- *   Zero on success; a negated errno value on failure.
+ *   On success, OK is returned.  Otherwise, a negated errno value indicating
+ *   the nature of the failure is returned.
  *
  ****************************************************************************/
 
-int arm_pause_handler(int irq, FAR void *context)
+int up_cpu_paused(int cpu)
 {
   FAR struct tcb_s *tcb = this_task();
-  int cpu = up_cpu_index();
 
   /* Update scheduler parameters */
 
   sched_suspend_scheduler(tcb);
 
-  /* Save the current context at CURRENT_REGS into the TCB at the head of the
-   * assigned task list for this CPU.
+#ifdef CONFIG_SCHED_INSTRUMENTATION
+  /* Notify that we are paused */
+
+  sched_note_cpu_paused(tcb);
+#endif
+
+  /* Save the current context at CURRENT_REGS into the TCB at the head
+   * of the assigned task list for this CPU.
    */
 
   up_savestate(tcb->xcp.regs);
 
-  /* Wait for the spinlock to be released */
+  /* Release the g_cpu_puased spinlock to synchronize with the
+   * requesting CPU.
+   */
 
   spin_unlock(&g_cpu_paused[cpu]);
+
+  /* Wait for the spinlock to be released.  The requesting CPU will release
+   * the spinlcok when the CPU is resumed.
+   */
+
   spin_lock(&g_cpu_wait[cpu]);
 
-  /* Restore the exception context of the tcb at the (new) head of the
-   * assigned task list.
+  /* This CPU has been resumed. Restore the exception context of the TCB at
+   * the (new) head of the assigned task list.
    */
 
   tcb = this_task();
 
+#ifdef CONFIG_SCHED_INSTRUMENTATION
+  /* Notify that we have resumed */
+
+  sched_note_cpu_resumed(tcb);
+#endif
+
   /* Reset scheduler parameters */
 
   sched_resume_scheduler(tcb);
 
-  /* Then switch contexts.  Any necessary address environment changes will
-   * be made when the interrupt returns.
+  /* Then switch contexts.  Any necessary address environment changes
+   * will be made when the interrupt returns.
    */
 
   up_restorestate(tcb->xcp.regs);
   spin_unlock(&g_cpu_wait[cpu]);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: arm_pause_handler
+ *
+ * Description:
+ *   This is the handler for SGI2.  It performs the following operations:
+ *
+ *   1. It saves the current task state at the head of the current assigned
+ *      task list.
+ *   2. It waits on a spinlock, then
+ *   3. Returns from interrupt, restoring the state of the new task at the
+ *      head of the ready to run list.
+ *
+ * Input Parameters:
+ *   Standard interrupt handling
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int arm_pause_handler(int irq, FAR void *context, FAR void *arg)
+{
+  int cpu = this_cpu();
+
+  /* Check for false alarms.  Such false could occur as a consequence of
+   * some deadlock breaking logic that might have already serviced the SG2
+   * interrupt by calling up_cpu_paused().  If the pause event has already
+   * been processed then g_cpu_paused[cpu] will not be locked.
+   */
+
+  if (spin_islocked(&g_cpu_paused[cpu]))
+    {
+      return up_cpu_paused(cpu);
+    }
+
   return OK;
 }
 
@@ -134,7 +233,7 @@ int arm_pause_handler(int irq, FAR void *context)
  *   CPU.
  *
  * Input Parameters:
- *   cpu - The index of the CPU to be stopped/
+ *   cpu - The index of the CPU to be stopped
  *
  * Returned Value:
  *   Zero on success; a negated errno value on failure.
@@ -147,6 +246,12 @@ int up_cpu_pause(int cpu)
 
   DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu());
 
+#ifdef CONFIG_SCHED_INSTRUMENTATION
+  /* Notify of the pause event */
+
+  sched_note_cpu_pause(this_task(), cpu);
+#endif
+
   /* Take the both spinlocks.  The g_cpu_wait spinlock will prevent the SGI2
    * handler from returning until up_cpu_resume() is called; g_cpu_paused
    * is a handshake that will prefent this function from returning until
@@ -210,6 +315,12 @@ int up_cpu_resume(int cpu)
 {
   DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu());
 
+#ifdef CONFIG_SCHED_INSTRUMENTATION
+  /* Notify of the resume event */
+
+  sched_note_cpu_resume(this_task(), cpu);
+#endif
+
   /* Release the spinlock.  Releasing the spinlock will cause the SGI2
    * handler on 'cpu' to continue and return from interrupt to the newly
    * established thread.
diff --git a/arch/arm/src/armv7-a/arm_cpustart.c b/arch/arm/src/armv7-a/arm_cpustart.c
index 1ec95da855a9122c37c018593feda1c0d9118b2b..3226153f5c188719e76ac95da412d11078cb1488 100644
--- a/arch/arm/src/armv7-a/arm_cpustart.c
+++ b/arch/arm/src/armv7-a/arm_cpustart.c
@@ -43,10 +43,11 @@
 
 #include 
 #include 
+#include 
 
 #include "up_internal.h"
-#include "gic.h"
 #include "cp15_cacheops.h"
+#include "gic.h"
 #include "sched/sched.h"
 
 #ifdef CONFIG_SMP
@@ -64,19 +65,19 @@ static inline void arm_registerdump(FAR struct tcb_s *tcb)
 {
   int regndx;
 
-  lldbg("CPU%d:\n", up_cpu_index());
+  _info("CPU%d:\n", up_cpu_index());
 
   /* Dump the startup registers */
 
   for (regndx = REG_R0; regndx <= REG_R15; regndx += 8)
     {
       uint32_t *ptr = (uint32_t *)&tcb->xcp.regs[regndx];
-      lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-             regndx, ptr[0], ptr[1], ptr[2], ptr[3],
-             ptr[4], ptr[5], ptr[6], ptr[7]);
+      _info("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+            regndx, ptr[0], ptr[1], ptr[2], ptr[3],
+            ptr[4], ptr[5], ptr[6], ptr[7]);
     }
 
-  lldbg("CPSR: %08x\n", tcb->xcp.regs[REG_CPSR]);
+  _info("CPSR: %08x\n", tcb->xcp.regs[REG_CPSR]);
 }
 #else
 # define arm_registerdump(tcb)
@@ -102,15 +103,20 @@ static inline void arm_registerdump(FAR struct tcb_s *tcb)
  *
  ****************************************************************************/
 
-int arm_start_handler(int irq, FAR void *context)
+int arm_start_handler(int irq, FAR void *context, FAR void *arg)
 {
-  FAR struct tcb_s *tcb;
+  FAR struct tcb_s *tcb = this_task();
+
+  sinfo("CPU%d Started\n", this_cpu());
+
+#ifdef CONFIG_SCHED_INSTRUMENTATION
+  /* Notify that this CPU has started */
 
-  sllvdbg("CPU%d Started\n", up_cpu_index());
+  sched_note_cpu_started(tcb);
+#endif
 
   /* Reset scheduler parameters */
 
-  tcb = this_task();
   sched_resume_scheduler(tcb);
 
   /* Dump registers so that we can see what is going to happen on return */
@@ -155,10 +161,16 @@ int arm_start_handler(int irq, FAR void *context)
 
 int up_cpu_start(int cpu)
 {
-  sllvdbg("Starting CPU%d\n", cpu);
+  sinfo("Starting CPU%d\n", cpu);
 
   DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu());
 
+#ifdef CONFIG_SCHED_INSTRUMENTATION
+  /* Notify of the start event */
+
+  sched_note_cpu_start(this_task(), cpu);
+#endif
+
   /* Make the content of CPU0 L1 cache has been written to coherent L2 */
 
   cp15_clean_dcache(CONFIG_RAM_START, CONFIG_RAM_END - 1);
diff --git a/arch/arm/src/armv7-a/arm_dataabort.c b/arch/arm/src/armv7-a/arm_dataabort.c
index 818557c552abc99c82e0acde220c62afeb9ff910..50c95a20188001fd7013b49f8822ce9ec930d9bc 100644
--- a/arch/arm/src/armv7-a/arm_dataabort.c
+++ b/arch/arm/src/armv7-a/arm_dataabort.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/armv7-a/arm_dataabort.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 
@@ -115,7 +104,7 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
    * fatal error.
    */
 
-  pglldbg("DFSR: %08x DFAR: %08x\n", dfsr, dfar);
+  pginfo("DFSR: %08x DFAR: %08x\n", dfsr, dfar);
   if ((dfsr & FSR_MASK) != FSR_PAGE)
     {
       goto segfault;
@@ -126,7 +115,7 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
    * (It has not yet been saved in the register context save area).
    */
 
-  pgllvdbg("VBASE: %08x VEND: %08x\n", PG_PAGED_VBASE, PG_PAGED_VEND);
+  pginfo("VBASE: %08x VEND: %08x\n", PG_PAGED_VBASE, PG_PAGED_VEND);
   if (dfar < PG_PAGED_VBASE || dfar >= PG_PAGED_VEND)
     {
       goto segfault;
@@ -163,7 +152,7 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
   return regs;
 
 segfault:
-  lldbg("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
+  _alert("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
         regs[REG_PC], dfar, dfsr);
   PANIC();
   return regs; /* To keep the compiler happy */
@@ -181,7 +170,7 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
 
   /* Crash -- possibly showing diagnostic debug information. */
 
-  lldbg("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
+  _alert("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
         regs[REG_PC], dfar, dfsr);
   PANIC();
   return regs; /* To keep the compiler happy */
diff --git a/arch/arm/src/armv7-a/arm_doirq.c b/arch/arm/src/armv7-a/arm_doirq.c
index b3d98151c0bcb262f2b0e10901a684e78fb80544..fa3e104582383162b874619a58dfd86b165aed78 100644
--- a/arch/arm/src/armv7-a/arm_doirq.c
+++ b/arch/arm/src/armv7-a/arm_doirq.c
@@ -40,10 +40,10 @@
 #include 
 
 #include 
-#include 
-#include 
 #include 
 
+#include 
+#include 
 #include 
 #include 
 
@@ -51,21 +51,40 @@
 #include "up_internal.h"
 
 #include "group/group.h"
+#include "gic.h"
 
 /****************************************************************************
- * Public Functions
+ * Private Data
  ****************************************************************************/
 
-uint32_t *arm_doirq(int irq, uint32_t *regs)
-{
-  board_autoled_on(LED_INIRQ);
-#ifdef CONFIG_SUPPRESS_INTERRUPTS
-  PANIC();
+/* A bit set of pending, non-maskable SGI interrupts, on bit set for each
+ * supported CPU.
+ */
+
+#ifdef CONFIG_ARMV7A_HAVE_GICv2
+#ifdef CONFIG_SMP
+static uint16_t g_sgi_pending[CONFIG_SMP_NCPUS];
 #else
-  /* Nested interrupts are not supported */
+static uint16_t g_sgi_pending[1];
+#endif
+#endif
 
-  DEBUGASSERT(CURRENT_REGS == NULL);
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: _arm_doirq
+ *
+ * Description:
+ *   Receives the one decoded interrupt and dispatches control to the
+ *   attached interrupt handler.
+ *
+ ****************************************************************************/
 
+#ifndef CONFIG_SUPPRESS_INTERRUPTS
+static inline uint32_t *_arm_doirq(int irq, uint32_t *regs)
+{
   /* Current regs non-zero indicates that we are processing an interrupt;
    * CURRENT_REGS is also used to manage interrupt level context switches.
    */
@@ -110,8 +129,131 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
 
   regs         = (uint32_t *)CURRENT_REGS;
   CURRENT_REGS = NULL;
+
+  return regs;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: arm_doirq
+ *
+ * Description:
+ *   Receives the decoded GIC interrupt information and dispatches control
+ *   to the attached interrupt handler.  There are two versions:
+ *
+ *   1) For the simple case where all interrupts are maskable.  In that
+ *      simple case, arm_doirq() is simply a wrapper for the inlined
+ *      _arm_do_irq() that does the real work.
+ *
+ *   2) With the GICv2, there are 16 non-maskable software generated
+ *      interrupts (SGIs) that also come through arm_doirq().  In that case,
+ *      we must avoid nesting interrupt handling and serial the processing.
+ *
+ ****************************************************************************/
+
+#ifndef CONFIG_ARMV7A_HAVE_GICv2
+uint32_t *arm_doirq(int irq, uint32_t *regs)
+{
+  board_autoled_on(LED_INIRQ);
+#ifdef CONFIG_SUPPRESS_INTERRUPTS
+  PANIC();
+#else
+  /* Nested interrupts are not supported */
+
+  DEBUGASSERT(CURRENT_REGS == NULL);
+
+  /* Dispatch the interrupt to its attached handler */
+
+  regs = _arm_doirq(irq, regs);
+#endif
+
+  board_autoled_off(LED_INIRQ);
+  return regs;
+}
+#endif
+
+#ifdef CONFIG_ARMV7A_HAVE_GICv2
+uint32_t *arm_doirq(int irq, uint32_t *regs)
+{
+#ifndef CONFIG_SUPPRESS_INTERRUPTS
+  uint32_t bit;
+  int cpu;
+  int i;
+#endif
+
+  board_autoled_on(LED_INIRQ);
+#ifdef CONFIG_SUPPRESS_INTERRUPTS
+  PANIC();
+
+#else
+  /* Get the CPU processing the interrupt */
+
+#ifdef CONFIG_SMP
+  cpu = up_cpu_index();
+#else
+  cpu = 0;
+#endif
+
+  /* Non-zero CURRENT_REGS indicates that we are already processing an
+   * interrupt.  This could be a normal event for the case of the GICv2;
+   * Software generated interrupts are non-maskable.
+   *
+   * REVISIT: There is no support for nested SGIs!  That will cause an
+   * assertion below.  There is also no protection for concurrent access
+   * to g_sgi_pending for that case.
+   */
+
+  if (CURRENT_REGS != NULL)
+    {
+      int ndx = irq - GIC_IRQ_SGI0;
+      bit = (1 << (ndx));
+
+      /* Only an SGI should cause this event.  We also cannot support
+       * multiple pending SGI interrupts.
+       */
+
+      ASSERT((unsigned int)irq <= GIC_IRQ_SGI15 &&
+             (g_sgi_pending[cpu] & bit) == 0);
+
+      /* Mare the SGI as pending and return immediately */
+
+      sinfo("SGI%d pending\n", ndx);
+      g_sgi_pending[cpu] |= bit;
+      return regs;
+    }
+
+  /* Dispatch the interrupt to its attached handler */
+
+   regs = _arm_doirq(irq, regs);
+
+  /* Then loop dispatching any pending SGI interrupts that occcurred during
+   * processing of the interrupts.
+   */
+
+  for (i = 0; i < 16 && g_sgi_pending[cpu] != 0; i++)
+    {
+      /* Check if this SGI is pending */
+
+      bit = (1 << i);
+      if ((g_sgi_pending[cpu] & bit) != 0)
+        {
+          /* Clear the pending bit */
+
+          g_sgi_pending[cpu] &= ~bit;
+
+          /* And dispatch the SGI */
+
+          sinfo("Dispatching pending SGI%d\n", i + GIC_IRQ_SGI0);
+          regs = _arm_doirq(i + GIC_IRQ_SGI0, regs);
+        }
+    }
 #endif
 
   board_autoled_off(LED_INIRQ);
   return regs;
 }
+#endif
diff --git a/arch/arm/src/armv7-a/arm_gicv2.c b/arch/arm/src/armv7-a/arm_gicv2.c
index 990a2c66dd3dd11ae2e9d58e6ab6dc020ecef858..ec32fa5271072f011e78732f7514b125f2abfe95 100644
--- a/arch/arm/src/armv7-a/arm_gicv2.c
+++ b/arch/arm/src/armv7-a/arm_gicv2.c
@@ -122,10 +122,10 @@ void arm_gic0_initialize(void)
     }
 
 #ifdef CONFIG_SMP
-  /* Attach SGI interrupt handlers */
+  /* Attach SGI interrupt handlers.  This attaches the handler for all CPUs. */
 
-  DEBUGVERIFY(irq_attach(GIC_IRQ_SGI1, arm_start_handler));
-  DEBUGVERIFY(irq_attach(GIC_IRQ_SGI2, arm_pause_handler));
+  DEBUGVERIFY(irq_attach(GIC_IRQ_SGI1, arm_start_handler, NULL));
+  DEBUGVERIFY(irq_attach(GIC_IRQ_SGI2, arm_pause_handler, NULL));
 #endif
 
   arm_gic_dump("Exit arm_gic0_initialize", true, 0);
@@ -387,7 +387,7 @@ uint32_t *arm_decodeirq(uint32_t *regs)
   regval = getreg32(GIC_ICCIAR);
   irq    = (regval & GIC_ICCIAR_INTID_MASK) >> GIC_ICCIAR_INTID_SHIFT;
 
-  gicllvdbg("irq=%d\n", irq);
+  irqinfo("irq=%d\n", irq);
 
   /* Ignore spurions IRQs.  ICCIAR will report 1023 if there is no pending
    * interrupt.
@@ -574,5 +574,4 @@ int arm_gic_irq_trigger(int irq, bool edge)
   return -EINVAL;
 }
 
-
 #endif /* CONFIG_ARMV7A_HAVE_GICv2 */
diff --git a/arch/arm/src/armv7-a/arm_gicv2_dump.c b/arch/arm/src/armv7-a/arm_gicv2_dump.c
index 9e4dfa340f1f97b25cdf3c55dce81d9f1610012e..23e43738da24a1716663f518a2294a08c1306a4f 100644
--- a/arch/arm/src/armv7-a/arm_gicv2_dump.c
+++ b/arch/arm/src/armv7-a/arm_gicv2_dump.c
@@ -40,12 +40,12 @@
 #include 
 
 #include 
-#include 
+#include 
 
 #include "up_arch.h"
 #include "gic.h"
 
-#if defined(CONFIG_ARMV7A_HAVE_GICv2) && defined(CONFIG_DEBUG_IRQ)
+#if defined(CONFIG_ARMV7A_HAVE_GICv2) && defined(CONFIG_DEBUG_IRQ_INFO)
 
 /****************************************************************************
  * Private Functions
@@ -69,22 +69,22 @@
 
 static inline void arm_gic_dump_cpu(bool all, int irq, int nlines)
 {
-  lowsyslog(LOG_INFO, "  CPU Interface Registers:\n");
-  lowsyslog(LOG_INFO, "       ICR: %08x    PMR: %08x    BPR: %08x    IAR: %08x\n",
-            getreg32(GIC_ICCICR), getreg32(GIC_ICCPMR),
-            getreg32(GIC_ICCBPR), getreg32(GIC_ICCIAR));
-  lowsyslog(LOG_INFO, "       RPR: %08x   HPIR: %08x   ABPR: %08x\n",
-            getreg32(GIC_ICCRPR), getreg32(GIC_ICCHPIR),
-            getreg32(GIC_ICCABPR));
-  lowsyslog(LOG_INFO, "      AIAR: %08x  AHPIR: %08x    IDR: %08x\n",
-            getreg32(GIC_ICCAIAR), getreg32(GIC_ICCAHPIR),
-            getreg32(GIC_ICCIDR));
-  lowsyslog(LOG_INFO, "      APR1: %08x   APR2: %08x   APR3: %08x   APR4: %08x\n",
-            getreg32(GIC_ICCAPR1), getreg32(GIC_ICCAPR2),
-            getreg32(GIC_ICCAPR3), getreg32(GIC_ICCAPR4));
-  lowsyslog(LOG_INFO, "    NSAPR1: %08x NSAPR2: %08x NSAPR3: %08x NSAPR4: %08x\n",
-            getreg32(GIC_ICCNSAPR1), getreg32(GIC_ICCNSAPR2),
-            getreg32(GIC_ICCNSAPR3), getreg32(GIC_ICCNSAPR4));
+  irqinfo("  CPU Interface Registers:\n");
+  irqinfo("       ICR: %08x    PMR: %08x    BPR: %08x    IAR: %08x\n",
+          getreg32(GIC_ICCICR), getreg32(GIC_ICCPMR),
+          getreg32(GIC_ICCBPR), getreg32(GIC_ICCIAR));
+  irqinfo("       RPR: %08x   HPIR: %08x   ABPR: %08x\n",
+          getreg32(GIC_ICCRPR), getreg32(GIC_ICCHPIR),
+          getreg32(GIC_ICCABPR));
+  irqinfo("      AIAR: %08x  AHPIR: %08x    IDR: %08x\n",
+          getreg32(GIC_ICCAIAR), getreg32(GIC_ICCAHPIR),
+          getreg32(GIC_ICCIDR));
+  irqinfo("      APR1: %08x   APR2: %08x   APR3: %08x   APR4: %08x\n",
+          getreg32(GIC_ICCAPR1), getreg32(GIC_ICCAPR2),
+          getreg32(GIC_ICCAPR3), getreg32(GIC_ICCAPR4));
+  irqinfo("    NSAPR1: %08x NSAPR2: %08x NSAPR3: %08x NSAPR4: %08x\n",
+          getreg32(GIC_ICCNSAPR1), getreg32(GIC_ICCNSAPR2),
+          getreg32(GIC_ICCNSAPR3), getreg32(GIC_ICCNSAPR4));
 }
 
 /****************************************************************************
@@ -110,9 +110,9 @@ static void arm_gic_dumpregs(uintptr_t regaddr, int nlines, int incr)
   incr <<= 2;
   for (i = 0; i < nlines; i += incr, regaddr += 16)
     {
-      lowsyslog(LOG_INFO, "         %08x %08x %08x %08x\n",
-                getreg32(regaddr), getreg32(regaddr + 4),
-                getreg32(regaddr + 8), getreg32(regaddr + 12));
+      irqinfo("         %08x %08x %08x %08x\n",
+              getreg32(regaddr), getreg32(regaddr + 4),
+              getreg32(regaddr + 8), getreg32(regaddr + 12));
     }
 }
 
@@ -135,7 +135,7 @@ static void arm_gic_dumpregs(uintptr_t regaddr, int nlines, int incr)
 static inline void arm_gic_dump4(const char *name, uintptr_t regaddr,
                                  int nlines)
 {
-  lowsyslog(LOG_INFO, "       %s[%08lx]\n", name, (unsigned long)regaddr);
+  irqinfo("       %s[%08lx]\n", name, (unsigned long)regaddr);
   arm_gic_dumpregs(regaddr, nlines, 4);
 }
 
@@ -158,7 +158,7 @@ static inline void arm_gic_dump4(const char *name, uintptr_t regaddr,
 static inline void arm_gic_dump8(const char *name, uintptr_t regaddr,
                                  int nlines)
 {
-  lowsyslog(LOG_INFO, "       %s[%08lx]\n", name, (unsigned long)regaddr);
+  irqinfo("       %s[%08lx]\n", name, (unsigned long)regaddr);
   arm_gic_dumpregs(regaddr, nlines, 8);
 }
 
@@ -181,7 +181,7 @@ static inline void arm_gic_dump8(const char *name, uintptr_t regaddr,
 static inline void arm_gic_dump16(const char *name, uintptr_t regaddr,
                                   int nlines)
 {
-  lowsyslog(LOG_INFO, "       %s[%08lx]\n", name, (unsigned long)regaddr);
+  irqinfo("       %s[%08lx]\n", name, (unsigned long)regaddr);
   arm_gic_dumpregs(regaddr, nlines, 16);
 }
 
@@ -204,7 +204,7 @@ static inline void arm_gic_dump16(const char *name, uintptr_t regaddr,
 static inline void arm_gic_dump32(const char *name, uintptr_t regaddr,
                                   int nlines)
 {
-  lowsyslog(LOG_INFO, "       %s[%08lx]\n", name, (unsigned long)regaddr);
+  irqinfo("       %s[%08lx]\n", name, (unsigned long)regaddr);
   arm_gic_dumpregs(regaddr, nlines, 32);
 }
 
@@ -226,10 +226,10 @@ static inline void arm_gic_dump32(const char *name, uintptr_t regaddr,
 
 static inline void arm_gic_dump_distributor(bool all, int irq, int nlines)
 {
-  lowsyslog(LOG_INFO, "  Distributor Registers:\n");
-  lowsyslog(LOG_INFO, "       DCR: %08x   ICTR: %08x   IIDR: %08x\n",
-        getreg32(GIC_ICDDCR), getreg32(GIC_ICDICTR),
-        getreg32(GIC_ICDIIDR));
+  irqinfo("  Distributor Registers:\n");
+  irqinfo("       DCR: %08x   ICTR: %08x   IIDR: %08x\n",
+          getreg32(GIC_ICDDCR), getreg32(GIC_ICDICTR),
+          getreg32(GIC_ICDIIDR));
 
   if (all)
     {
@@ -246,27 +246,27 @@ static inline void arm_gic_dump_distributor(bool all, int irq, int nlines)
     }
   else
     {
-      lowsyslog(LOG_INFO, "       ISR: %08x   ISER: %08x   ISPR: %08x    SAR: %08x\n",
-                getreg32(GIC_ICDISR(irq)), getreg32(GIC_ICDISER(irq)),
-                getreg32(GIC_ICDISPR(irq)), getreg32(GIC_ICDSAR(irq)));
-      lowsyslog(LOG_INFO, "       IPR: %08x   IPTR: %08x   ICFR: %08x  SPISR: %08x\n",
-                getreg32(GIC_ICDIPR(irq)), getreg32(GIC_ICDIPTR(irq)),
-                getreg32(GIC_ICDICFR(irq)), getreg32(GIC_ICDSPISR(irq)));
-      lowsyslog(LOG_INFO, "     NSACR: %08x   SCPR: %08x\n",
-                getreg32(GIC_ICDNSACR(irq)), getreg32(GIC_ICDSCPR(irq)));
+      irqinfo("       ISR: %08x   ISER: %08x   ISPR: %08x    SAR: %08x\n",
+              getreg32(GIC_ICDISR(irq)), getreg32(GIC_ICDISER(irq)),
+              getreg32(GIC_ICDISPR(irq)), getreg32(GIC_ICDSAR(irq)));
+      irqinfo("       IPR: %08x   IPTR: %08x   ICFR: %08x  SPISR: %08x\n",
+              getreg32(GIC_ICDIPR(irq)), getreg32(GIC_ICDIPTR(irq)),
+              getreg32(GIC_ICDICFR(irq)), getreg32(GIC_ICDSPISR(irq)));
+      irqinfo("     NSACR: %08x   SCPR: %08x\n",
+              getreg32(GIC_ICDNSACR(irq)), getreg32(GIC_ICDSCPR(irq)));
     }
 
-  lowsyslog(LOG_INFO, "       PIDR[%08lx]:\n", (unsigned long)GIC_ICDPIDR(0));
-  lowsyslog(LOG_INFO, "         %08x %08x %08x %08x\n",
-            getreg32(GIC_ICDPIDR(0)), getreg32(GIC_ICDPIDR(1)),
-            getreg32(GIC_ICDPIDR(2)), getreg32(GIC_ICDPIDR(3)));
-  lowsyslog(LOG_INFO, "         %08x %08x %08x %08x\n",
-            getreg32(GIC_ICDPIDR(4)), getreg32(GIC_ICDPIDR(5)),
-            getreg32(GIC_ICDPIDR(6)));
-  lowsyslog(LOG_INFO, "       CIDR[%08lx]:\n", (unsigned long)GIC_ICDCIDR(0));
-  lowsyslog(LOG_INFO, "         %08x %08x %08x %08x\n",
-            getreg32(GIC_ICDCIDR(0)), getreg32(GIC_ICDCIDR(1)),
-            getreg32(GIC_ICDCIDR(2)), getreg32(GIC_ICDCIDR(3)));
+  irqinfo("       PIDR[%08lx]:\n", (unsigned long)GIC_ICDPIDR(0));
+  irqinfo("         %08x %08x %08x %08x\n",
+          getreg32(GIC_ICDPIDR(0)), getreg32(GIC_ICDPIDR(1)),
+          getreg32(GIC_ICDPIDR(2)), getreg32(GIC_ICDPIDR(3)));
+  irqinfo("         %08x %08x %08x %08x\n",
+          getreg32(GIC_ICDPIDR(4)), getreg32(GIC_ICDPIDR(5)),
+          getreg32(GIC_ICDPIDR(6)));
+  irqinfo("       CIDR[%08lx]:\n", (unsigned long)GIC_ICDCIDR(0));
+  irqinfo("         %08x %08x %08x %08x\n",
+          getreg32(GIC_ICDCIDR(0)), getreg32(GIC_ICDCIDR(1)),
+          getreg32(GIC_ICDCIDR(2)), getreg32(GIC_ICDCIDR(3)));
 }
 
 /****************************************************************************
@@ -295,15 +295,15 @@ void arm_gic_dump(const char *msg, bool all, int irq)
 
   if (all)
     {
-      lowsyslog(LOG_INFO, "GIC: %s NLINES=%u\n", msg, nlines);
+      irqinfo("GIC: %s NLINES=%u\n", msg, nlines);
     }
   else
     {
-      lowsyslog(LOG_INFO, "GIC: %s IRQ=%d\n", msg, irq);
+      irqinfo("GIC: %s IRQ=%d\n", msg, irq);
     }
 
   arm_gic_dump_cpu(all, irq, nlines);
   arm_gic_dump_distributor(all, irq, nlines);
 }
 
-#endif /* CONFIG_ARMV7A_HAVE_GICv2 && CONFIG_DEBUG_IRQ */
+#endif /* CONFIG_ARMV7A_HAVE_GICv2 && CONFIG_DEBUG_IRQ_INFO */
diff --git a/arch/arm/src/armv7-a/arm_head.S b/arch/arm/src/armv7-a/arm_head.S
index 220026da340758619e11b7ec48c3b122957a5975..27c2a5b4dcfb628db63ee069385070ef01a39735 100644
--- a/arch/arm/src/armv7-a/arm_head.S
+++ b/arch/arm/src/armv7-a/arm_head.S
@@ -169,7 +169,7 @@
 
 /* This macro will modify r0, r1, r2 and r14 */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 	.macro	showprogress, code
 	mov		r0, #\code
 	bl		up_lowputc
@@ -450,7 +450,11 @@ __start:
 	orr		r0, r0, #(SCTLR_RR)
 #endif
 
-#ifndef CPU_DCACHE_DISABLE
+	/* In SMP configurations, the data cache will not be enabled until later
+	 * after SMP cache coherency has been setup.
+	 */
+
+#if !defined(CPU_DCACHE_DISABLE) && !defined(CONFIG_SMP)
 	/* Dcache enable
 	 *
 	 *   SCTLR_C    Bit 2:  DCache enable
@@ -638,7 +642,7 @@ __start:
 #endif
 
 	/* Perform early C-level, platform-specific initialization.  Logic
-	 * within arm_boot() must configure SDRAM and call arm_ram_initailize.
+	 * within arm_boot() must configure SDRAM and call arm_data_initialize().
 	 */
 
 	bl		arm_boot
diff --git a/arch/arm/src/armv7-a/arm_l2cc_pl310.c b/arch/arm/src/armv7-a/arm_l2cc_pl310.c
index 64aeaf3b8bc61cbec7dc990fee8011650c961de3..9d455e40d270d8daec5a960739716f01599fcbfe 100644
--- a/arch/arm/src/armv7-a/arm_l2cc_pl310.c
+++ b/arch/arm/src/armv7-a/arm_l2cc_pl310.c
@@ -411,7 +411,7 @@ void up_l2ccinitialize(void)
       putreg32(L2CC_CR_L2CEN, L2CC_CR);
     }
 
-  lldbg("(%d ways) * (%d bytes/way) = %d bytes\n",
+  sinfo("(%d ways) * (%d bytes/way) = %d bytes\n",
         PL310_NWAYS, PL310_WAYSIZE, PL310_CACHE_SIZE);
 }
 
diff --git a/arch/arm/src/armv7-a/arm_pghead.S b/arch/arm/src/armv7-a/arm_pghead.S
index bc4c99ce26da187dc4508f79e9737b4663ca1fbf..1dda0acdd929ba56db8fa450e68d781300c084df 100644
--- a/arch/arm/src/armv7-a/arm_pghead.S
+++ b/arch/arm/src/armv7-a/arm_pghead.S
@@ -194,7 +194,7 @@
 
 /* This macro will modify r0, r1, r2 and r14 */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 	.macro	showprogress, code
 	mov		r0, #\code
 	bl		up_lowputc
@@ -434,7 +434,11 @@ __start:
 	orr		r0, r0, #(SCTLR_RR)
 #endif
 
-#ifndef CPU_DCACHE_DISABLE
+	/* In SMP configurations, the data cache will not be enabled until later
+	 * after SMP cache coherency has been setup.
+	*/
+
+#if !defined(CPU_DCACHE_DISABLE) && !defined(CONFIG_SMP)
 	/* Dcache enable
 	 *
 	 *   SCTLR_C    Bit 2:  DCache enable
@@ -670,7 +674,7 @@ __start:
 #endif
 
 	/* Perform early C-level, platform-specific initialization.  Logic
-	 * within arm_boot() must configure SDRAM and call arm_ram_initailize.
+	 * within arm_boot() must configure SDRAM and call arm_data_initialize().
 	 */
 
 	bl		arm_boot
diff --git a/arch/arm/src/armv7-a/arm_prefetchabort.c b/arch/arm/src/armv7-a/arm_prefetchabort.c
index bdd28c4a3aa72505bd66d469e5d6bcf24dddeee5..0bb8cd37932f68ed9c101f5ad575b3a7f7f16f38 100644
--- a/arch/arm/src/armv7-a/arm_prefetchabort.c
+++ b/arch/arm/src/armv7-a/arm_prefetchabort.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  *  arch/arm/src/armv7-a/arm_prefetchabort.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 
@@ -97,8 +86,8 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
    * virtual addresses.
    */
 
-  pglldbg("VADDR: %08x VBASE: %08x VEND: %08x\n",
-          regs[REG_PC], PG_PAGED_VBASE, PG_PAGED_VEND);
+  pginfo("VADDR: %08x VBASE: %08x VEND: %08x\n",
+         regs[REG_PC], PG_PAGED_VBASE, PG_PAGED_VEND);
 
   if (regs[REG_R15] >= PG_PAGED_VBASE && regs[REG_R15] < PG_PAGED_VEND)
     {
@@ -134,7 +123,7 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
     }
   else
     {
-      lldbg("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
+      _alert("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
             regs[REG_PC], ifar, ifsr);
       PANIC();
     }
@@ -154,7 +143,7 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
 
   /* Crash -- possibly showing diagnostic debug information. */
 
-  lldbg("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
+  _alert("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
         regs[REG_PC], ifar, ifsr);
   PANIC();
   return regs; /* To keep the compiler happy */
diff --git a/arch/arm/src/armv7-a/arm_releasepending.c b/arch/arm/src/armv7-a/arm_releasepending.c
index 9696e931c0bdb7643535b0aa3e795eb237cb9c8c..7afc6989a75829f647ee14ba35e2a6b3ef991415 100644
--- a/arch/arm/src/armv7-a/arm_releasepending.c
+++ b/arch/arm/src/armv7-a/arm_releasepending.c
@@ -67,7 +67,7 @@ void up_release_pending(void)
 {
   struct tcb_s *rtcb = this_task();
 
-  slldbg("From TCB=%p\n", rtcb);
+  sinfo("From TCB=%p\n", rtcb);
 
   /* Merge the g_pendingtasks list into the ready-to-run task list */
 
diff --git a/arch/arm/src/armv7-a/arm_reprioritizertr.c b/arch/arm/src/armv7-a/arm_reprioritizertr.c
index d4b2699f6dd01f2a3cc0c3be38038f1961c18c6e..4381178e05b311e620c620b6d9465e10cec5a333 100644
--- a/arch/arm/src/armv7-a/arm_reprioritizertr.c
+++ b/arch/arm/src/armv7-a/arm_reprioritizertr.c
@@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
       struct tcb_s *rtcb = this_task();
       bool switch_needed;
 
-      slldbg("TCB=%p PRI=%d\n", tcb, priority);
+      sinfo("TCB=%p PRI=%d\n", tcb, priority);
 
       /* Remove the tcb task from the ready-to-run list.
        * sched_removereadytorun will return true if we just
diff --git a/arch/arm/src/armv7-a/arm_schedulesigaction.c b/arch/arm/src/armv7-a/arm_schedulesigaction.c
index 3dfe5fc285f7c9a5f4de4a519107067c5ca1bb34..9f1a46f67542b2a245d73006af5bec0462302d7a 100644
--- a/arch/arm/src/armv7-a/arm_schedulesigaction.c
+++ b/arch/arm/src/armv7-a/arm_schedulesigaction.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/armv7-a/arm_schedulesigaction.c
  *
- *   Copyright (C) 2013, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2015-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -51,6 +51,8 @@
 #include "up_internal.h"
 #include "up_arch.h"
 
+#include "irq/irq.h"
+
 #ifndef CONFIG_DISABLE_SIGNALS
 
 /****************************************************************************
@@ -90,11 +92,12 @@
  *
  ****************************************************************************/
 
+#ifndef CONFIG_SMP
 void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
 {
   irqstate_t flags;
 
-  sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+  sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
 
   /* Make sure that interrupts are disabled */
 
@@ -105,10 +108,10 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
   if (!tcb->xcp.sigdeliver)
     {
       /* First, handle some special cases when the signal is being delivered
-       * to the currently executing task.
+       * to task that is currently executing on this CPU.
        */
 
-      sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
+      sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
 
       if (tcb == this_task())
         {
@@ -142,16 +145,16 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
                * the signals have been delivered.
                */
 
-              tcb->xcp.sigdeliver       = sigdeliver;
-              tcb->xcp.saved_pc         = CURRENT_REGS[REG_PC];
-              tcb->xcp.saved_cpsr       = CURRENT_REGS[REG_CPSR];
+              tcb->xcp.sigdeliver    = sigdeliver;
+              tcb->xcp.saved_pc      = CURRENT_REGS[REG_PC];
+              tcb->xcp.saved_cpsr    = CURRENT_REGS[REG_CPSR];
 
               /* Then set up to vector to the trampoline with interrupts
                * disabled
                */
 
-              CURRENT_REGS[REG_PC]      = (uint32_t)up_sigdeliver;
-              CURRENT_REGS[REG_CPSR]    = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
+              CURRENT_REGS[REG_PC]   = (uint32_t)up_sigdeliver;
+              CURRENT_REGS[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
 
               /* And make sure that the saved context in the TCB is the same
                * as the interrupt return context.
@@ -163,7 +166,168 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
 
       /* Otherwise, we are (1) signaling a task is not running from an
        * interrupt handler or (2) we are not in an interrupt handler and the
-       * running task is signalling some non-running task.
+       * running task is signalling some other non-running task.
+       */
+
+      else
+        {
+          /* Save the return lr and cpsr and one scratch register.  These
+           * will be restored by the signal trampoline after the signals
+           * have been delivered.
+           */
+
+          tcb->xcp.sigdeliver     = sigdeliver;
+          tcb->xcp.saved_pc       = tcb->xcp.regs[REG_PC];
+          tcb->xcp.saved_cpsr     = tcb->xcp.regs[REG_CPSR];
+
+          /* Then set up to vector to the trampoline with interrupts
+           * disabled
+           */
+
+          tcb->xcp.regs[REG_PC]   = (uint32_t)up_sigdeliver;
+          tcb->xcp.regs[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
+        }
+    }
+
+  leave_critical_section(flags);
+}
+#endif /* !CONFIG_SMP */
+
+#ifdef CONFIG_SMP
+void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
+{
+  irqstate_t flags;
+  int cpu;
+  int me;
+
+  sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+
+  /* Make sure that interrupts are disabled */
+
+  flags = enter_critical_section();
+
+  /* Refuse to handle nested signal actions */
+
+  if (!tcb->xcp.sigdeliver)
+    {
+      /* First, handle some special cases when the signal is being delivered
+       * to task that is currently executing on any CPU.
+       */
+
+      sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
+
+      if (tcb->task_state == TSTATE_TASK_RUNNING)
+        {
+          me  = this_cpu();
+          cpu = tcb->cpu;
+
+          /* CASE 1:  We are not in an interrupt handler and a task is
+           * signalling itself for some reason.
+           */
+
+          if (cpu == me && !CURRENT_REGS)
+            {
+              /* In this case just deliver the signal now. */
+
+              sigdeliver(tcb);
+            }
+
+          /* CASE 2:  The task that needs to receive the signal is running.
+           * This could happen if the task is running on another CPU OR if
+           * we are in an interrupt handler and the task is running on this
+           * CPU.  In the former case, we will have to PAUSE the other CPU
+           * first.  But in either case, we will have to modify the return
+           * state as well as the state in the TCB.
+           *
+           * Hmmm... there looks like a latent bug here: The following logic
+           * would fail in the strange case where we are in an interrupt
+           * handler, the thread is signalling itself, but a context switch
+           * to another task has occurred so that CURRENT_REGS does not
+           * refer to the thread of this_task()!
+           */
+
+          else
+            {
+              /* If we signalling a task running on the other CPU, we have
+               * to PAUSE the other CPU.
+               */
+
+              if (cpu != me)
+                {
+                  up_cpu_pause(cpu);
+                }
+
+              /* Save the return lr and cpsr and one scratch register
+               * These will be restored by the signal trampoline after
+               * the signals have been delivered.
+               */
+
+              tcb->xcp.sigdeliver       = sigdeliver;
+              tcb->xcp.saved_pc         = CURRENT_REGS[REG_PC];
+              tcb->xcp.saved_cpsr       = CURRENT_REGS[REG_CPSR];
+
+              /* Increment the IRQ lock count so that when the task is restarted,
+               * it will hold the IRQ spinlock.
+               */
+
+              DEBUGASSERT(tcb->irqcount < INT16_MAX);
+              tcb->irqcount++;
+
+              /* Handle a possible race condition where the TCB was suspended
+               * just before we paused the other CPU.  The critical section
+               * established above will prevent new threads from running on
+               * that CPU, but it will not guarantee that the running thread
+               * did not suspend itself (allowing any threads "assigned" to
+               * the CPU to run).
+               */
+
+              if (tcb->task_state != TSTATE_TASK_RUNNING)
+                {
+                  /* Then set up to vector to the trampoline with interrupts
+                   * disabled
+                   */
+
+                  tcb->xcp.regs[REG_PC]   = (uint32_t)up_sigdeliver;
+                  tcb->xcp.regs[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
+                }
+              else
+                {
+                  /* Then set up to vector to the trampoline with interrupts
+                   * disabled
+                   */
+
+                  CURRENT_REGS[REG_PC]   = (uint32_t)up_sigdeliver;
+                  CURRENT_REGS[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
+
+                  /* In an SMP configuration, the interrupt disable logic also
+                   * involves spinlocks that are configured per the TCB irqcount
+                   * field.  This is logically equivalent to enter_critical_section().
+                   * The matching call to leave_critical_section() will be
+                   * performed in up_sigdeliver().
+                   */
+
+                  spin_setbit(&g_cpu_irqset, cpu, &g_cpu_irqsetlock,
+                              &g_cpu_irqlock);
+
+                  /* And make sure that the saved context in the TCB is the same
+                   * as the interrupt return context.
+                   */
+
+                  up_savestate(tcb->xcp.regs);
+                }
+
+              /* RESUME the other CPU if it was PAUSED */
+
+              if (cpu != me)
+                {
+                  up_cpu_resume(cpu);
+                }
+            }
+        }
+
+      /* Otherwise, we are (1) signaling a task is not running from an
+       * interrupt handler or (2) we are not in an interrupt handler and the
+       * running task is signalling some other non-running task.
        */
 
       else
@@ -173,20 +337,28 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
            * have been delivered.
            */
 
-          tcb->xcp.sigdeliver       = sigdeliver;
-          tcb->xcp.saved_pc         = tcb->xcp.regs[REG_PC];
-          tcb->xcp.saved_cpsr       = tcb->xcp.regs[REG_CPSR];
+          tcb->xcp.sigdeliver     = sigdeliver;
+          tcb->xcp.saved_pc       = tcb->xcp.regs[REG_PC];
+          tcb->xcp.saved_cpsr     = tcb->xcp.regs[REG_CPSR];
+
+          /* Increment the IRQ lock count so that when the task is restarted,
+           * it will hold the IRQ spinlock.
+           */
+
+          DEBUGASSERT(tcb->irqcount < INT16_MAX);
+          tcb->irqcount++;
 
           /* Then set up to vector to the trampoline with interrupts
            * disabled
            */
 
-          tcb->xcp.regs[REG_PC]      = (uint32_t)up_sigdeliver;
-          tcb->xcp.regs[REG_CPSR]    = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
+          tcb->xcp.regs[REG_PC]   = (uint32_t)up_sigdeliver;
+          tcb->xcp.regs[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
         }
     }
 
   leave_critical_section(flags);
 }
+#endif /* CONFIG_SMP */
 
 #endif /* !CONFIG_DISABLE_SIGNALS */
diff --git a/arch/arm/src/armv7-a/arm_scu.c b/arch/arm/src/armv7-a/arm_scu.c
new file mode 100644
index 0000000000000000000000000000000000000000..eedf179e73161438d738872ce2af869d634cd3b5
--- /dev/null
+++ b/arch/arm/src/armv7-a/arm_scu.c
@@ -0,0 +1,227 @@
+/****************************************************************************
+ * arch/arm/src/armv7-a/arm_scu.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include "up_arch.h"
+#include "cp15_cacheops.h"
+#include "sctlr.h"
+#include "cache.h"
+#include "scu.h"
+
+#ifdef CONFIG_SMP
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: arm_get_sctlr
+ *
+ * Description:
+ *   Get the contents of the SCTLR register
+ *
+ ****************************************************************************/
+
+static inline uint32_t arm_get_sctlr(void)
+{
+  uint32_t sctlr;
+
+  __asm__ __volatile__
+  (
+    "\tmrc   p15, 0, %0, c1, c0, 0\n"  /* Read SCTLR */
+    : "=r"(sctlr)
+    :
+    :
+  );
+
+  return sctlr;
+}
+
+/****************************************************************************
+ * Name: arm_set_sctlr
+ *
+ * Description:
+ *   Set the contents of the SCTLR register
+ *
+ ****************************************************************************/
+
+static inline void arm_set_sctlr(uint32_t sctlr)
+{
+  __asm__ __volatile__
+  (
+    "\tmcr  p15, 0, %0, c1, c0, 0\n" /* Write SCTLR */
+    :
+    : "r"(sctlr)
+    :
+  );
+}
+
+/****************************************************************************
+ * Name: arm_get_actlr
+ *
+ * Description:
+ *   Get the contents of the ACTLR register
+ *
+ ****************************************************************************/
+
+static inline uint32_t arm_get_actlr(void)
+{
+  uint32_t actlr;
+
+  __asm__ __volatile__
+  (
+    "\tmrc  p15, 0, %0, c1, c0, 1\n"  /* Read ACTLR */
+    : "=r"(actlr)
+    :
+    :
+  );
+
+  return actlr;
+}
+
+/****************************************************************************
+ * Name: arm_set_actlr
+ *
+ * Description:
+ *   Set the contents of the ACTLR register
+ *
+ ****************************************************************************/
+
+static inline void arm_set_actlr(uint32_t actlr)
+{
+  __asm__ __volatile__
+  (
+    "\tmcr p15, 0, %0, c1, c0, 1\n" /* Write ACTLR */
+    :
+    : "r"(actlr)
+    :
+  );
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: arm_enable_smp
+ *
+ * Description:
+ *   Enable the SCU and make certain that current CPU is participating in
+ *   the SMP cache coherency.
+ *
+ * Assumption:
+ *   Called early in the CPU start-up.  No special critical sections are
+ *   needed if only CPU-private registers are modified.
+ *
+ ****************************************************************************/
+
+void arm_enable_smp(int cpu)
+{
+  uint32_t regval;
+
+  /* Handle actions unique to CPU0 which comes up first */
+
+  if (cpu == 0)
+    {
+      /* Invalidate the SCU duplicate tags for all processors */
+
+      putreg32((SCU_INVALIDATE_ALL_WAYS << SCU_INVALIDATE_CPU0_SHIFT) |
+               (SCU_INVALIDATE_ALL_WAYS << SCU_INVALIDATE_CPU1_SHIFT) |
+               (SCU_INVALIDATE_ALL_WAYS << SCU_INVALIDATE_CPU2_SHIFT) |
+               (SCU_INVALIDATE_ALL_WAYS << SCU_INVALIDATE_CPU3_SHIFT),
+               SCU_INVALIDATE);
+
+      /* Invalidate CPUn L1 data cache so that is will we be reloaded from
+       * coherent L2.
+       */
+
+      cp15_invalidate_dcache_all();
+      ARM_DSB();
+
+      /* Invalidate the L2C-310 -- Missing logic. */
+
+      /* Enable the SCU */
+
+      regval  = getreg32(SCU_CTRL);
+      regval |= SCU_CTRL_ENABLE;
+      putreg32(regval, SCU_CTRL);
+    }
+
+  /* Actions for other CPUs */
+
+  else
+    {
+      /* Invalidate CPUn L1 data cache so that is will we be reloaded from
+       * coherent L2.
+       */
+
+      cp15_invalidate_dcache_all();
+      ARM_DSB();
+
+      /* Wait for the SCU to be enabled by the primary processor -- should
+       * not be necessary.
+       */
+    }
+
+  /* Enable the data cache, set the SMP mode with ACTLR.SMP=1.
+   *
+   *   SMP - Sgnals if the Cortex-A9 processor is taking part in coherency
+   *         or not.
+   *
+   * Cortex-A9 also needs  ACTLR.FW=1
+   *
+   *   FW  - Cache and TLB maintenance broadcast.
+   */
+
+  regval  = arm_get_actlr();
+  regval |= ACTLR_SMP;
+#ifdef CONFIG_ARCH_CORTEXA9
+  regval |= ACTLR_FW;
+#endif
+  arm_set_actlr(regval);
+
+  regval  = arm_get_sctlr();
+  regval |= SCTLR_C;
+  arm_set_sctlr(regval);
+}
+
+#endif
diff --git a/arch/arm/src/armv7-a/arm_sigdeliver.c b/arch/arm/src/armv7-a/arm_sigdeliver.c
index 32f1e0b40d1219f98a282c6ca98fa5c7070bcc6a..5d89583282032ac543a151682ff517f94b31b212 100644
--- a/arch/arm/src/armv7-a/arm_sigdeliver.c
+++ b/arch/arm/src/armv7-a/arm_sigdeliver.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/armv7-a/arm_sigdeliver.c
  *
- *   Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -83,7 +83,7 @@ void up_sigdeliver(void)
 
   board_autoled_on(LED_SIGNAL);
 
-  sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
         rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
   ASSERT(rtcb->xcp.sigdeliver != NULL);
 
@@ -103,18 +103,27 @@ void up_sigdeliver(void)
 
   /* Then restore the task interrupt state */
 
-  up_irq_restore(regs[REG_CPSR]);
+  leave_critical_section(regs[REG_CPSR]);
 
-  /* Deliver the signals */
+  /* Deliver the signal */
 
   sigdeliver(rtcb);
 
   /* Output any debug messages BEFORE restoring errno (because they may
    * alter errno), then disable interrupts again and restore the original
    * errno that is needed by the user logic (it is probably EINTR).
+   *
+   * REVISIT: In SMP mode up_irq_save() probably only disables interrupts
+   * on the local CPU.  We do not want to call enter_critical_section()
+   * here, however, because we don't want this state to stick after the
+   * call to up_fullcontextrestore().
+   *
+   * I would prefer that all interrupts are disabled when
+   * up_fullcontextrestore() is called, but that may not be necessary.
    */
 
-  sdbg("Resuming\n");
+  sinfo("Resuming\n");
+
   (void)up_irq_save();
   rtcb->pterrno = saved_errno;
 
diff --git a/arch/arm/src/armv7-a/arm_syscall.c b/arch/arm/src/armv7-a/arm_syscall.c
index 854ece3de2cdf789db4e59069a03236733dd78da..77b33b45f4be7954bc50389d3c3d8ccade7776eb 100644
--- a/arch/arm/src/armv7-a/arm_syscall.c
+++ b/arch/arm/src/armv7-a/arm_syscall.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  *  arch/arm/src/armv7-a/arm_syscall.c
  *
- *   Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013-2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 #include 
@@ -65,17 +54,6 @@
 #include "addrenv.h"
 #include "up_internal.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-/* Debug ********************************************************************/
-
-#if defined(CONFIG_DEBUG_SYSCALL)
-# define svcdbg(format, ...) lldbg(format, ##__VA_ARGS__)
-#else
-# define svcdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -178,16 +156,14 @@ uint32_t *arm_syscall(uint32_t *regs)
    * and R1..R7 =  variable number of arguments depending on the system call.
    */
 
-#if defined(CONFIG_DEBUG_SYSCALL)
-  svcdbg("SYSCALL Entry: regs: %p cmd: %d\n", regs, cmd);
-  svcdbg("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-         regs[REG_R0],  regs[REG_R1],  regs[REG_R2],  regs[REG_R3],
-         regs[REG_R4],  regs[REG_R5],  regs[REG_R6],  regs[REG_R7]);
-  svcdbg("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-         regs[REG_R8],  regs[REG_R9],  regs[REG_R10], regs[REG_R11],
-         regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
-  svcdbg("CPSR: %08x\n", regs[REG_CPSR]);
-#endif
+  svcinfo("SYSCALL Entry: regs: %p cmd: %d\n", regs, cmd);
+  svcinfo("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+          regs[REG_R0],  regs[REG_R1],  regs[REG_R2],  regs[REG_R3],
+          regs[REG_R4],  regs[REG_R5],  regs[REG_R6],  regs[REG_R7]);
+  svcinfo("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+          regs[REG_R8],  regs[REG_R9],  regs[REG_R10], regs[REG_R11],
+          regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
+  svcinfo("CPSR: %08x\n", regs[REG_CPSR]);
 
   /* Handle the SVCall according to the command in R0 */
 
@@ -480,7 +456,7 @@ uint32_t *arm_syscall(uint32_t *regs)
 
           regs[REG_R0] -= CONFIG_SYS_RESERVED;
 #else
-          svcdbg("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
+          svcerr("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
 #endif
 
 #ifdef CONFIG_ARCH_KERNEL_STACK
@@ -501,18 +477,16 @@ uint32_t *arm_syscall(uint32_t *regs)
         break;
     }
 
-#if defined(CONFIG_DEBUG_SYSCALL)
   /* Report what happened */
 
-  svcdbg("SYSCALL Exit: regs: %p\n", regs);
-  svcdbg("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-         regs[REG_R0],  regs[REG_R1],  regs[REG_R2],  regs[REG_R3],
-         regs[REG_R4],  regs[REG_R5],  regs[REG_R6],  regs[REG_R7]);
-  svcdbg("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-         regs[REG_R8],  regs[REG_R9],  regs[REG_R10], regs[REG_R11],
+  svcinfo("SYSCALL Exit: regs: %p\n", regs);
+  svcinfo("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+          regs[REG_R0],  regs[REG_R1],  regs[REG_R2],  regs[REG_R3],
+          regs[REG_R4],  regs[REG_R5],  regs[REG_R6],  regs[REG_R7]);
+  svcinfo("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+          regs[REG_R8],  regs[REG_R9],  regs[REG_R10], regs[REG_R11],
          regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
-  svcdbg("CPSR: %08x\n", regs[REG_CPSR]);
-#endif
+  svcinfo("CPSR: %08x\n", regs[REG_CPSR]);
 
   /* Return the last value of curent_regs.  This supports context switches
    * on return from the exception.  That capability is only used with the
@@ -526,7 +500,7 @@ uint32_t *arm_syscall(uint32_t *regs)
 
 uint32_t *arm_syscall(uint32_t *regs)
 {
-  lldbg("SYSCALL from 0x%x\n", regs[REG_PC]);
+  _alert("SYSCALL from 0x%x\n", regs[REG_PC]);
   CURRENT_REGS = regs;
   PANIC();
 }
diff --git a/arch/arm/src/armv7-a/arm_testset.S b/arch/arm/src/armv7-a/arm_testset.S
index 6d6cdcd4acb78859f48730a62024408df1df53de..638736e4d6729815674902098a7e3c867ee42760 100644
--- a/arch/arm/src/armv7-a/arm_testset.S
+++ b/arch/arm/src/armv7-a/arm_testset.S
@@ -70,12 +70,12 @@
  * Name: up_testset
  *
  * Description:
- *   Perform and atomic test and set operation on the provided spinlock.
+ *   Perform an atomic test and set operation on the provided spinlock.
  *
  *   This function must be provided via the architecture-specific logoic.
  *
  * Input Parameters:
- *   lock - The address of spinlock object.
+ *   lock - The address of spinlock object (r0).
  *
  * Returned Value:
  *   The spinlock is always locked upon return.  The value of previous value
@@ -84,6 +84,8 @@
  *   obtain the lock) or SP_UNLOCKED if the spinlock was previously unlocked
  *   (meaning that we successfully obtained the lock)
  *
+ * Modifies: r1, r2, and lr
+ *
  ****************************************************************************/
 
 	.globl	up_testset
@@ -98,7 +100,7 @@ up_testset:
 1:
 	ldrexb	r2, [r0]			/* Test if spinlock is locked or not */
 	cmp		r2, r1				/* Already locked? */
-	beq		2f					/* If alrady locked, return SP_LOCKED */
+	beq		2f					/* If already locked, return SP_LOCKED */
 
 	/* Not locked ... attempt to lock it */
 
diff --git a/arch/arm/src/armv7-a/arm_undefinedinsn.c b/arch/arm/src/armv7-a/arm_undefinedinsn.c
index 0c051d9dd916accbf64c8e0d35fb5a5ad801071d..54dbcc25b8a2aa0ce2da4506083a11934f1fef5e 100644
--- a/arch/arm/src/armv7-a/arm_undefinedinsn.c
+++ b/arch/arm/src/armv7-a/arm_undefinedinsn.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/armv7-a/arm_undefinedinsn.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 #include 
@@ -68,7 +57,7 @@
 
 uint32_t *arm_undefinedinsn(uint32_t *regs)
 {
-  lldbg("Undefined instruction at 0x%x\n", regs[REG_PC]);
+  _alert("Undefined instruction at 0x%x\n", regs[REG_PC]);
   CURRENT_REGS = regs;
   PANIC();
   return regs; /* To keep the compiler happy */
diff --git a/arch/arm/src/armv7-a/arm_vectors.S b/arch/arm/src/armv7-a/arm_vectors.S
index 33d1f8fc550dc6e49d4e7623e2a66892de87837d..8a76e000b563ec9c1c9e6a19322ce8e0af7ec0ff 100644
--- a/arch/arm/src/armv7-a/arm_vectors.S
+++ b/arch/arm/src/armv7-a/arm_vectors.S
@@ -64,6 +64,10 @@ g_fiqtmp:
 	.word	0		/* Saved lr */
 	.word	0		/* Saved spsr */
 #endif
+#if CONFIG_ARCH_INTERRUPTSTACK > 3 && defined(CONFIG_ARMV7A_HAVE_GICv2)
+g_nestlevel:
+	.word	0		/* Interrupt nesting level */
+#endif
 
 /************************************************************************************
  * Private Functions
@@ -172,13 +176,53 @@ arm_vectorirq:
 	mov		r0, sp					/* Get r0=xcp */
 
 #if CONFIG_ARCH_INTERRUPTSTACK > 3
+#ifdef CONFIG_ARMV7A_HAVE_GICv2
+	/* We will switch to the interrupt stack, UNLESS we are processing a
+	 * nested interrupt in which case we are already using the interrupt
+	 * stack.  SGI interrupts may be nested because they are non-maskable.
+	 */
+
+	ldr		r5, .Lirqnestlevel		/* r1=Points to interrupt nesting level */
+	ldr		r1, [r5]				/* Get r1= nesting level */
+	add		r1, r1, #1				/* Increment nesting level */
+	str		r1, [r5]				/* Save r1= nesting level */
+
+	cmp		r1, #1					/* r1>1 if nested */
+	bgt		.Lintnested				/* Use current SP if nested */
+#endif
+
+	/* Call arm_decodeirq() on the interrupt stack */
+
 	ldr		sp, .Lirqstackbase		/* SP = interrupt stack base */
 	str		r0, [sp]				/* Save the user stack pointer */
 	mov		r4, sp					/* Save the SP in a preserved register */
 	bic		sp, sp, #7				/* Force 8-byte alignment */
 	bl		arm_decodeirq			/* Call the handler */
 	ldr		sp, [r4]				/* Restore the user stack pointer */
+
+#ifdef CONFIG_ARMV7A_HAVE_GICv2
+	b		.Lintreturn
+
+	/* Call arm_decodeirq() on whatever stack is in place */
+
+.Lintnested:
+	mov		r4, sp					/* Save the SP in a preserved register */
+	bic		sp, sp, #7				/* Force 8-byte alignment */
+	bl		arm_decodeirq			/* Call the handler */
+	mov		sp, r4					/* Restore the possibly unaligned stack pointer */
+
+	/* Decrement the nesting level (r5 should be preserved) */
+
+.Lintreturn:
+	ldr		r1, [r5]				/* Get r1= nesting level */
+	cmp		r1, #0					/* A sanity check*/
+	subgt	r1, r1, #1				/* Decrement nesting level */
+	strgt	r1, [r5]				/* Save r1= nesting level */
+#endif
+
 #else
+	/* Call arm_decodeirq() on the user stack */
+
 	mov		r4, sp					/* Save the SP in a preserved register */
 	bic		sp, sp, #7				/* Force 8-byte alignment */
 	bl		arm_decodeirq			/* Call the handler */
@@ -227,6 +271,10 @@ arm_vectorirq:
 #if CONFIG_ARCH_INTERRUPTSTACK > 3
 .Lirqstackbase:
 	.word	g_intstackbase
+#ifdef CONFIG_ARMV7A_HAVE_GICv2
+.Lirqnestlevel:
+	.word	g_nestlevel
+#endif
 #endif
 	.size	arm_vectorirq, . - arm_vectorirq
 	.align	5
@@ -937,7 +985,7 @@ arm_vectorfiq:
 	.word	g_fiqtmp
 #if CONFIG_ARCH_INTERRUPTSTACK > 3
 .Lfiqstackbase:
-	.word	g_intstackbase
+	.word	g_fiqstackbase
 #endif
 
 #else
@@ -965,5 +1013,21 @@ g_intstackbase:
 	.size	g_intstackbase, 4
 	.size	g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~3)
 
+	.globl	g_fiqstackalloc
+	.type	g_fiqstackalloc, object
+	.globl	g_fiqstackbase
+	.type	g_fiqstackbase, object
+
+/************************************************************************************
+ *  Name: g_fiqstackalloc/g_fiqstackbase
+ ************************************************************************************/
+
+g_fiqstackalloc:
+	.skip	((CONFIG_ARCH_INTERRUPTSTACK & ~3) - 4)
+g_fiqstackbase:
+	.skip	4
+	.size	g_fiqstackbase, 4
+	.size	g_fiqstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~3)
+
 #endif /* CONFIG_ARCH_INTERRUPTSTACK > 3 */
 	.end
diff --git a/arch/arm/src/armv7-a/cache.h b/arch/arm/src/armv7-a/cache.h
index dda36271e2d865a5e2533e9201feea5952fc9845..c9af0611f7b31d4a16fac7ca43b299f68f08c283 100644
--- a/arch/arm/src/armv7-a/cache.h
+++ b/arch/arm/src/armv7-a/cache.h
@@ -50,6 +50,16 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
+/* Intrinsics are used in these inline functions */
+
+#define arm_isb(n) __asm__ __volatile__ ("isb " #n : : : "memory")
+#define arm_dsb(n) __asm__ __volatile__ ("dsb " #n : : : "memory")
+#define arm_dmb(n) __asm__ __volatile__ ("dmb " #n : : : "memory")
+
+#define ARM_DSB()  arm_dsb(15)
+#define ARM_ISB()  arm_isb(15)
+#define ARM_DMB()  arm_dmb(15)
+
  /************************************************************************************
  * Inline Functions
  ************************************************************************************/
diff --git a/arch/arm/src/armv7-a/gic.h b/arch/arm/src/armv7-a/gic.h
index cc6ee4833004f661ec96a5f9d248d23944a7ff6b..8c882ad6ddc2c8711c978f0885c83fe11b8a9afa 100644
--- a/arch/arm/src/armv7-a/gic.h
+++ b/arch/arm/src/armv7-a/gic.h
@@ -590,21 +590,6 @@
 
 #define GIC_IRQ_SPI              32  /* First SPI interrupt ID */
 
-/* General Macro Definitions ************************************************/
-/* Debug */
-
-#ifdef CONFIG_DEBUG_IRQ
-#  define gicdbg(format, ...)    dbg(format, ##__VA_ARGS__)
-#  define giclldbg(format, ...)  lldbg(format, ##__VA_ARGS__)
-#  define gicvdbg(format, ...)   vdbg(format, ##__VA_ARGS__)
-#  define gicllvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
-#else
-#  define gicdbg(x...)
-#  define giclldbg(x...)
-#  define gicvdbg(x...)
-#  define gicllvdbg(x...)
-#endif
-
 /****************************************************************************
  * Inline Functions
  ****************************************************************************/
@@ -774,7 +759,7 @@ uint32_t *arm_decodeirq(uint32_t *regs);
  ****************************************************************************/
 
 #ifdef CONFIG_SMP
-int arm_start_handler(int irq, FAR void *context);
+int arm_start_handler(int irq, FAR void *context, FAR void *arg);
 #endif
 
 /****************************************************************************
@@ -798,7 +783,7 @@ int arm_start_handler(int irq, FAR void *context);
  ****************************************************************************/
 
 #ifdef CONFIG_SMP
-int arm_pause_handler(int irq, FAR void *context);
+int arm_pause_handler(int irq, FAR void *context, FAR void *arg);
 #endif
 
 /****************************************************************************
@@ -817,7 +802,7 @@ int arm_pause_handler(int irq, FAR void *context);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_IRQ
+#ifdef CONFIG_DEBUG_IRQ_INFO
 void arm_gic_dump(const char *msg, bool all, int irq);
 #else
 #  define arm_gic_dump(m,a,i)
diff --git a/arch/arm/src/armv7-a/mmu.h b/arch/arm/src/armv7-a/mmu.h
index 9ce8280b73232ba793c8a0d11ed0e958f41aeb77..c6338d33378b30395f574085ac6aac80ed98a4f6 100644
--- a/arch/arm/src/armv7-a/mmu.h
+++ b/arch/arm/src/armv7-a/mmu.h
@@ -513,7 +513,6 @@
  * NMRR registers.  For the simple case where TEX[2:0] = 0b000, the control
  * is as follows:
  *
- *
  *       MEMORY     INNER         OUTER        OUTER SHAREABLE
  *   C B TYPE       CACHEABILITY  CACHEABILITY ATTRIBUTE
  *   - - ---------- ------------- ------------ -----------------
@@ -602,7 +601,6 @@
 #define MMU_L2_PGTABFLAGS     (PTE_TYPE_SMALL | PTE_WRITE_THROUGH | PTE_AP_RW1)
 
 #define MMU_L1_VECTORFLAGS    (PMD_TYPE_PTE | PMD_PTE_PXN | PMD_PTE_DOM(0))
-
 #define MMU_L2_VECTRWFLAGS    (PTE_TYPE_SMALL | PTE_WRITE_THROUGH | PTE_AP_RW1)
 #define MMU_L2_VECTROFLAGS    (PTE_TYPE_SMALL | PTE_WRITE_THROUGH | PTE_AP_R1)
 #define MMU_L2_VECTORFLAGS    MMU_L2_VECTRWFLAGS
@@ -1424,6 +1422,28 @@ void mmu_l1_restore(uintptr_t vaddr, uint32_t l1entry);
 #  define mmu_l1_clrentry(v) mmu_l1_restore(v,0)
 #endif
 
+/****************************************************************************
+ * Name: mmu_l2_setentry
+ *
+ * Description:
+ *   Set one small (4096B) entry in a level2 translation table.
+ *
+ * Input Parameters:
+ *   l2vaddr - the virtual address of the beginning of the L2 translation
+ *     table.
+ *   paddr - The physical address to be mapped.  Must be aligned to a 4KB
+ *     address boundary
+ *   vaddr - The virtual address to be mapped.  Must be aligned to a 4KB
+ *     address boundary
+ *   mmuflags - The MMU flags to use in the mapping.
+ *
+ ****************************************************************************/
+
+#ifndef CONFIG_ARCH_ROMPGTABLE
+void mmu_l2_setentry(uint32_t l2vaddr, uint32_t paddr, uint32_t vaddr,
+                     uint32_t mmuflags);
+#endif
+
 /************************************************************************************
  * Name: mmu_l1_map_region
  *
diff --git a/arch/arm/src/armv7-a/scu.h b/arch/arm/src/armv7-a/scu.h
new file mode 100644
index 0000000000000000000000000000000000000000..a84fb0cc4f84bdaa007b4ee61edd1bd295cf947f
--- /dev/null
+++ b/arch/arm/src/armv7-a/scu.h
@@ -0,0 +1,176 @@
+/****************************************************************************
+ * arch/arm/src/armv7-a/scu.h
+ * Generic Interrupt Controller Definitions
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Reference:
+ *   Cortex™-A9 MPCore, Revision: r4p1, Technical Reference Manual, ARM DDI
+ *   0407I (ID091612).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_ARMV7_A_SCU_H
+#define __ARCH_ARM_SRC_ARMV7_A_SCU_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include "mpcore.h"                         /* For MPCORE_SCU_VBASE */
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Register offsets *********************************************************/
+
+#define SCU_CTRL_OFFSET              0x0000 /* SCU Control Register (Implementation defined) */
+#define SCU_CONFIG_OFFSET            0x0004 /* SCU Configuration Register (Implementation defined) */
+#define SCU_PWRSTATUS_OFFSET         0x0008 /* SCU CPU Power Status Register */
+#define SCU_INVALIDATE_OFFSET        0x000c /* SCU Invalidate All Registers in Secure State */
+#define SCU_FILTERSTART_OFFSET       0x0040 /* Filtering Start Address Register Defined by FILTERSTART input */
+#define SCU_FILTEREND_OFFSET         0x0044 /* Filtering End Address Register Defined by FILTEREND input */
+#define SCU_SAC_OFFSET               0x0050 /* SCU Access Control (SAC) Register */
+#define SCU_SNSAC_OFFSET             0x0054 /* SCU Non-secure Access Control (SNSAC) Register */
+
+/* Register addresses *******************************************************/
+
+#define SCU_CTRL                     (MPCORE_SCU_VBASE+SCU_CTRL_OFFSET)
+#define SCU_CONFIG                   (MPCORE_SCU_VBASE+SCU_CONFIG_OFFSET)
+#define SCU_PWRSTATUS                (MPCORE_SCU_VBASE+SCU_PWRSTATUS_OFFSET)
+#define SCU_INVALIDATE               (MPCORE_SCU_VBASE+SCU_INVALIDATE_OFFSET)
+#define SCU_FILTERSTART              (MPCORE_SCU_VBASE+SCU_FILTERSTART_OFFSET)
+#define SCU_FILTEREND                (MPCORE_SCU_VBASE+SCU_FILTEREND_OFFSET)
+#define SCU_SAC                      (MPCORE_SCU_VBASE+SCU_SAC_OFFSET)
+#define SCU_SNSAC                    (MPCORE_SCU_VBASE+SCU_SNSAC_OFFSET)
+
+/* Register bit-field definitions *******************************************/
+
+/* SCU Control Register (Implementation defined) */
+
+#define SCU_CTRL_ENABLE              (1 << 0)  /* SCU enable */
+#define SCU_CTRL_ADDRFILTER          (1 << 1)  /* Address filtering enable */
+#define SCU_CTRL_RAMPARITY           (1 << 2)  /* SCU RAMs parity enable */
+#define SCU_CTRL_LINFILL             (1 << 3)  /* SCU speculative linefill enable */
+#define SCU_CTRL_PORT0               (1 << 4)  /* Force all device to port0 enable */
+#define SCU_CTRL_STANDBY             (1 << 5)  /* SCU standby enable */
+#define SCU_CTRL_ICSTANDBY           (1 << 6)  /* IC standby enable */
+
+/* SCU Configuration Register (Implementation defined) */
+
+#define SCU_CONFIG_NCPUS_SHIFT       0         /* CPU number Number of CPUs present */
+#define SCU_CONFIG_NCPUS_MASK        (3 << SCU_CONFIG_NCPUS_SHIFT)
+#  define SCU_CONFIG_NCPUS(r)        ((((uint32_t)(r) &  SCU_CONFIG_NCPUS_MASK) >> SCU_CONFIG_NCPUS_SHIFT) + 1)
+#define SCU_CONFIG_SMPCPUS_SHIFT     4         /* Processors that are in SMP or AMP mode */
+#define SCU_CONFIG_SMPCPUS_MASK      (15 << SCU_CONFIG_SMPCPUS_SHIFT)
+#  define SCU_CONFIG_CPU_SMP(n)      (1 << ((n)+4))
+#  define SCU_CONFIG_CPU0_SMP        (1 << 4)
+#  define SCU_CONFIG_CPU1_SMP        (1 << 5)
+#  define SCU_CONFIG_CPU2_SMP        (1 << 6)
+#  define SCU_CONFIG_CPU3_SMP        (1 << 7)
+
+#define SCU_CONFIG_TAGRAM_16KB       0
+#define SCU_CONFIG_TAGRAM_32KB       1
+#define SCU_CONFIG_TAGRAM_64KB       2
+
+#define SCU_CONFIG_CPU0_TAGRAM_SHIFT 8         /* CPU 0 tag RAM size */
+#define SCU_CONFIG_CPU0_TAGRAM_MASK  (3 << SCU_CONFIG_CPU0_TAGRAM_SHIFT)
+#define SCU_CONFIG_CPU1_TAGRAM_SHIFT 10        /* CPU 1 tag RAM size */
+#define SCU_CONFIG_CPU1_TAGRAM_MASK  (3 << SCU_CONFIG_CPU0_TAGRAM_SHIFT)
+#define SCU_CONFIG_CPU2_TAGRAM_SHIFT 12        /* CPU 1 tag RAM size */
+#define SCU_CONFIG_CPU2_TAGRAM_MASK  (3 << SCU_CONFIG_CPU0_TAGRAM_SHIFT)
+#define SCU_CONFIG_CPU3_TAGRAM_SHIFT 14        /* CPU 1 tag RAM size */
+#define SCU_CONFIG_CPU3_TAGRAM_MASK  (3 << SCU_CONFIG_CPU0_TAGRAM_SHIFT)
+
+/* SCU CPU Power Status Register */
+
+#define SCU_PWRSTATUS_NORMAL         0
+#define SCU_PWRSTATUS_DORMANT        2
+#define SCU_PWRSTATUS_PWROFF         3
+
+#define SCU_PWRSTATUS_CPU0_SHIFT     0         /* CPU0 status Power status */
+#define SCU_PWRSTATUS_CPU0_MASK      (3 << SCU_PWRSTATUS_CPU0_SHIFT)
+#define SCU_PWRSTATUS_CPU1_SHIFT     8         /* CPU1 status Power status */
+#define SCU_PWRSTATUS_CPU1_MASK      (3 << SCU_PWRSTATUS_CPU1_SHIFT)
+#define SCU_PWRSTATUS_CPU2_SHIFT     16        /* CPU2 status Power status */
+#define SCU_PWRSTATUS_CPU2_MASK      (3 << SCU_PWRSTATUS_CPU2_SHIFT)
+#define SCU_PWRSTATUS_CPU3_SHIFT     24        /* CPU3 status Power status */
+#define SCU_PWRSTATUS_CPU3_MASK      (3 << SCU_PWRSTATUS_CPU3_SHIFT)
+
+/* SCU Invalidate All Registers in Secure State */
+
+#define SCU_INVALIDATE_ALL_WAYS      15
+#define SCU_INVALIDATE_CPU0_SHIFT    0         /* Ways that must be invalidated for CPU0 */
+#define SCU_INVALIDATE_CPU0_MASK     (15 << SCU_INVALIDATE_CPU0_SHIFT)
+#define SCU_INVALIDATE_CPU1_SHIFT    4         /* Ways that must be invalidated for CPU1 */
+#define SCU_INVALIDATE_CPU1_MASK     (15 << SCU_INVALIDATE_CPU1_SHIFT)
+#define SCU_INVALIDATE_CPU2_SHIFT    8         /* Ways that must be invalidated for CPU2 */
+#define SCU_INVALIDATE_CPU2_MASK     (15 << SCU_INVALIDATE_CPU2_SHIFT)
+#define SCU_INVALIDATE_CPU3_SHIFT    12        /* Ways that must be invalidated for CPU3 */
+#define SCU_INVALIDATE_CPU3_MASK     (15 << SCU_INVALIDATE_CPU3_SHIFT)
+
+/* Filtering Start Address Register Defined by FILTERSTART input */
+
+#define SCU_FILTERSTART_SHIFT        10        /* Filtering start address */
+#define SCU_FILTERSTART_MASK         (0xfff << SCU_FILTERSTART_SHIFT)
+
+/* Filtering End Address Register Defined by FILTEREND input */
+
+#define SCU_FILTEREND_SHIFT          10        /* Filtering start address */
+#define SCU_FILTEREND_MASK           (0xfff << SCU_FILTEREND_SHIFT)
+
+/* SCU Access Control (SAC) Register */
+
+#define SCU_SAC_CPU(n)               (1 << (n)) /* CPUn may access components */
+
+/* SCU Non-secure Access Control (SNSAC) Register */
+
+#define SCU_SNSAC_COMP_CPU(n)        (1 << (n))     /* CPUn has non-secure access to components */
+#define SCU_SNSAC_PTIM_CPU(n)        (1 << ((n)+4)) /* CPUn has non-secure access to private timers */
+#define SCU_SNSAC_GTIM_CPU(n)        (1 << ((n)+8)) /* CPUn has non-secure access to global timer */
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: arm_enable_smp
+ *
+ * Description:
+ *   Enable the SCU and make certain that current CPU is participating in
+ *   the SMP cache coherency.
+ *
+ ****************************************************************************/
+
+void arm_enable_smp(int cpu);
+
+#endif /* __ARCH_ARM_SRC_ARMV7_A_SCU_H */
diff --git a/arch/arm/src/armv7-m/Kconfig b/arch/arm/src/armv7-m/Kconfig
index 406e2e46624be926494b130312a91d539bc3c02b..4c66b55d54d2f55a97b2b1d4a15e566f8c3ed6d6 100644
--- a/arch/arm/src/armv7-m/Kconfig
+++ b/arch/arm/src/armv7-m/Kconfig
@@ -48,12 +48,12 @@ config ARMV7M_DTCM
 
 choice
 	prompt "Toolchain Selection"
-	default ARMV7M_TOOLCHAIN_GNU_EABIW if HOST_WINDOWS
-	default ARMV7M_TOOLCHAIN_GNU_EABIL if !HOST_WINDOWS
+	default ARMV7M_TOOLCHAIN_GNU_EABIW if TOOLCHAIN_WINDOWS
+	default ARMV7M_TOOLCHAIN_GNU_EABIL if !TOOLCHAIN_WINDOWS
 
 config ARMV7M_TOOLCHAIN_IARW
 	bool "IAR for Windows"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 	select ARM_TOOLCHAIN_IAR
 
 config ARMV7M_TOOLCHAIN_IARL
@@ -63,7 +63,7 @@ config ARMV7M_TOOLCHAIN_IARL
 
 config ARMV7M_TOOLCHAIN_ATOLLIC
 	bool "Atollic Lite/Pro for Windows"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 	select ARM_TOOLCHAIN_GNU
 
 config ARMV7M_TOOLCHAIN_BUILDROOT
@@ -78,7 +78,7 @@ config ARMV7M_TOOLCHAIN_CODEREDL
 
 config ARMV7M_TOOLCHAIN_CODEREDW
 	bool "CodeRed for Windows"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 	select ARM_TOOLCHAIN_GNU
 
 config ARMV7M_TOOLCHAIN_CODESOURCERYL
@@ -88,12 +88,12 @@ config ARMV7M_TOOLCHAIN_CODESOURCERYL
 
 config ARMV7M_TOOLCHAIN_CODESOURCERYW
 	bool "CodeSourcery GNU toolchain under Windows"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 	select ARM_TOOLCHAIN_GNU
 
 config ARMV7M_TOOLCHAIN_DEVKITARM
 	bool "devkitARM GNU toolchain"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 	select ARM_TOOLCHAIN_GNU
 
 config ARMV7M_TOOLCHAIN_GNU_EABIL
@@ -106,7 +106,7 @@ config ARMV7M_TOOLCHAIN_GNU_EABIL
 
 config ARMV7M_TOOLCHAIN_GNU_EABIW
 	bool "Generic GNU EABI toolchain under Windows"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 	select ARM_TOOLCHAIN_GNU
 	---help---
 		This option should work for any modern GNU toolchain (GCC 4.5 or newer)
@@ -114,7 +114,7 @@ config ARMV7M_TOOLCHAIN_GNU_EABIW
 
 config ARMV7M_TOOLCHAIN_RAISONANCE
 	bool "STMicro Raisonance for Windows"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 	select ARM_TOOLCHAIN_GNU
 
 endchoice
@@ -160,6 +160,7 @@ config ARMV7M_STACKCHECK
 config ARMV7M_ITMSYSLOG
 	bool "ITM SYSLOG support"
 	default n
+	select ARCH_SYSLOG
 	select SYSLOG
 	---help---
 		Enable hooks to support ITM syslog output.  This requires additional
diff --git a/arch/arm/src/armv7-m/gnu/up_testset.S b/arch/arm/src/armv7-m/gnu/up_testset.S
index 7dd45eee4dbef257817c6ac0095450811b371d80..c1888c56a98fcc5a64381b053c0e8903c585c65e 100644
--- a/arch/arm/src/armv7-m/gnu/up_testset.S
+++ b/arch/arm/src/armv7-m/gnu/up_testset.S
@@ -72,7 +72,7 @@
  * Name: up_testset
  *
  * Description:
- *   Perform and atomic test and set operation on the provided spinlock.
+ *   Perform an atomic test and set operation on the provided spinlock.
  *
  *   This function must be provided via the architecture-specific logoic.
  *
diff --git a/arch/arm/src/armv7-m/iar/up_testset.S b/arch/arm/src/armv7-m/iar/up_testset.S
index 9590e576e77ef8d16927948a82564f75401e38fb..e690aed3de9d7f6ae88d9374e67b6f71d04d32ae 100644
--- a/arch/arm/src/armv7-m/iar/up_testset.S
+++ b/arch/arm/src/armv7-m/iar/up_testset.S
@@ -57,7 +57,7 @@
  * Name: up_testset
  *
  * Description:
- *   Perform and atomic test and set operation on the provided spinlock.
+ *   Perform an atomic test and set operation on the provided spinlock.
  *
  *   This function must be provided via the architecture-specific logoic.
  *
diff --git a/arch/arm/src/armv7-m/itm_syslog.h b/arch/arm/src/armv7-m/itm_syslog.h
index 1b42be2ea8e442ee412ebf9169103b7c8fa9f289..40f71624f57dad9714603f428ef48e839f0d843d 100644
--- a/arch/arm/src/armv7-m/itm_syslog.h
+++ b/arch/arm/src/armv7-m/itm_syslog.h
@@ -57,7 +57,7 @@
  *
  ****************************************************************************/
 
-#if defined(CONFIG_SYSLOG) || defined(CONFIG_ARMV7M_ITMSYSLOG)
+#ifdef CONFIG_ARMV7M_ITMSYSLOG
 void itm_syslog_initialize(void);
 #else
 #  define itm_syslog_initialize()
diff --git a/arch/arm/src/armv7-m/mpu.h b/arch/arm/src/armv7-m/mpu.h
index 310c21a90912303363435c59a6dbf1f348386ca2..4a5bab065bda53bc67807f874c0e77683d05adca 100644
--- a/arch/arm/src/armv7-m/mpu.h
+++ b/arch/arm/src/armv7-m/mpu.h
@@ -219,12 +219,13 @@ uint32_t mpu_subregion(uintptr_t base, size_t size, uint8_t l2size);
 
 static inline void mpu_showtype(void)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_SCHED_INFO
   uint32_t regval = getreg32(MPU_TYPE);
-  dbg("%s MPU Regions: data=%d instr=%d\n",
-      (regval & MPU_TYPE_SEPARATE) != 0 ? "Separate" : "Unified",
-      (regval & MPU_TYPE_DREGION_MASK) >> MPU_TYPE_DREGION_SHIFT,
-      (regval & MPU_TYPE_IREGION_MASK) >> MPU_TYPE_IREGION_SHIFT);
+
+  sinfo("%s MPU Regions: data=%d instr=%d\n",
+        (regval & MPU_TYPE_SEPARATE) != 0 ? "Separate" : "Unified",
+        (regval & MPU_TYPE_DREGION_MASK) >> MPU_TYPE_DREGION_SHIFT,
+        (regval & MPU_TYPE_IREGION_MASK) >> MPU_TYPE_IREGION_SHIFT);
 #endif
 }
 
@@ -356,7 +357,7 @@ static inline void mpu_priv_flash(uintptr_t base, size_t size)
 
   /* Select the region */
 
-  putreg32(mpu_allocregion(), MPU_RNR);
+  putreg32(region, MPU_RNR);
 
   /* Select the region base address */
 
diff --git a/arch/arm/src/armv7-m/up_assert.c b/arch/arm/src/armv7-m/up_assert.c
index 0f6fa00d219488401220dc6d35a5d469786f66d8..11f29cd653422c3b58535fabcac7249c72115eec 100644
--- a/arch/arm/src/armv7-m/up_assert.c
+++ b/arch/arm/src/armv7-m/up_assert.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/armv7-m/up_assert.c
  *
- *   Copyright (C) 2009-2010, 2012-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009-2010, 2012-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 #include 
@@ -64,6 +53,7 @@
 
 #include "up_arch.h"
 #include "sched/sched.h"
+#include "irq/irq.h"
 #include "up_internal.h"
 
 /****************************************************************************
@@ -75,23 +65,6 @@
 #  undef CONFIG_ARCH_USBDUMP
 #endif
 
-/* The following is just intended to keep some ugliness out of the mainline
- * code.  We are going to print the task name if:
- *
- *  CONFIG_TASK_NAME_SIZE > 0 &&    <-- The task has a name
- *  (defined(CONFIG_DEBUG)    ||    <-- And the debug is enabled (lldbg used)
- *   defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
- */
-
-#undef CONFIG_PRINT_TASKNAME
-#if CONFIG_TASK_NAME_SIZE > 0 && (defined(CONFIG_DEBUG) || defined(CONFIG_ARCH_STACKDUMP))
-#  define CONFIG_PRINT_TASKNAME 1
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -125,7 +98,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
   for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
     {
       uint32_t *ptr = (uint32_t *)stack;
-      lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+      _alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
              stack, ptr[0], ptr[1], ptr[2], ptr[3],
              ptr[4], ptr[5], ptr[6], ptr[7]);
     }
@@ -143,12 +116,12 @@ static void up_taskdump(FAR struct tcb_s *tcb, FAR void *arg)
 {
   /* Dump interesting properties of this task */
 
-#ifdef CONFIG_PRINT_TASKNAME
-  lldbg("%s: PID=%d Stack Used=%lu of %lu\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+  _alert("%s: PID=%d Stack Used=%lu of %lu\n",
         tcb->name, tcb->pid, (unsigned long)up_check_tcbstack(tcb),
         (unsigned long)tcb->adj_stack_size);
 #else
-  lldbg("PID: %d Stack Used=%lu of %lu\n",
+  _alert("PID: %d Stack Used=%lu of %lu\n",
         tcb->pid, (unsigned long)up_check_tcbstack(tcb),
         (unsigned long)tcb->adj_stack_size);
 #endif
@@ -183,29 +156,29 @@ static inline void up_registerdump(void)
     {
       /* Yes.. dump the interrupt registers */
 
-      lldbg("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+      _alert("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
             CURRENT_REGS[REG_R0],  CURRENT_REGS[REG_R1],
             CURRENT_REGS[REG_R2],  CURRENT_REGS[REG_R3],
             CURRENT_REGS[REG_R4],  CURRENT_REGS[REG_R5],
             CURRENT_REGS[REG_R6],  CURRENT_REGS[REG_R7]);
-      lldbg("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+      _alert("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
             CURRENT_REGS[REG_R8],  CURRENT_REGS[REG_R9],
             CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
             CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
             CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
 
 #ifdef CONFIG_ARMV7M_USEBASEPRI
-      lldbg("xPSR: %08x BASEPRI: %08x CONTROL: %08x\n",
+      _alert("xPSR: %08x BASEPRI: %08x CONTROL: %08x\n",
             CURRENT_REGS[REG_XPSR],  CURRENT_REGS[REG_BASEPRI],
             getcontrol());
 #else
-      lldbg("xPSR: %08x PRIMASK: %08x CONTROL: %08x\n",
+      _alert("xPSR: %08x PRIMASK: %08x CONTROL: %08x\n",
             CURRENT_REGS[REG_XPSR],  CURRENT_REGS[REG_PRIMASK],
             getcontrol());
 #endif
 
 #ifdef REG_EXC_RETURN
-      lldbg("EXC_RETURN: %08x\n", CURRENT_REGS[REG_EXC_RETURN]);
+      _alert("EXC_RETURN: %08x\n", CURRENT_REGS[REG_EXC_RETURN]);
 #endif
     }
 }
@@ -226,7 +199,7 @@ static int usbtrace_syslog(FAR const char *fmt, ...)
   /* Let vsyslog do the real work */
 
   va_start(ap, fmt);
-  ret = lowvsyslog(LOG_INFO, fmt, ap);
+  ret = vsyslog(LOG_EMERG, fmt, ap);
   va_end(ap);
   return ret;
 }
@@ -275,12 +248,12 @@ static void up_dumpstate(void)
 
   /* Show interrupt stack info */
 
-  lldbg("sp:     %08x\n", sp);
-  lldbg("IRQ stack:\n");
-  lldbg("  base: %08x\n", istackbase);
-  lldbg("  size: %08x\n", istacksize);
+  _alert("sp:     %08x\n", sp);
+  _alert("IRQ stack:\n");
+  _alert("  base: %08x\n", istackbase);
+  _alert("  size: %08x\n", istacksize);
 #ifdef CONFIG_STACK_COLORATION
-  lldbg("  used: %08x\n", up_check_intstack());
+  _alert("  used: %08x\n", up_check_intstack());
 #endif
 
   /* Does the current stack pointer lie within the interrupt
@@ -302,14 +275,14 @@ static void up_dumpstate(void)
   if (CURRENT_REGS)
     {
       sp = CURRENT_REGS[REG_R13];
-      lldbg("sp:     %08x\n", sp);
+      _alert("sp:     %08x\n", sp);
     }
 
-  lldbg("User stack:\n");
-  lldbg("  base: %08x\n", ustackbase);
-  lldbg("  size: %08x\n", ustacksize);
+  _alert("User stack:\n");
+  _alert("  base: %08x\n", ustackbase);
+  _alert("  size: %08x\n", ustacksize);
 #ifdef CONFIG_STACK_COLORATION
-  lldbg("  used: %08x\n", up_check_tcbstack(rtcb));
+  _alert("  used: %08x\n", up_check_tcbstack(rtcb));
 #endif
 
   /* Dump the user stack if the stack pointer lies within the allocated user
@@ -325,11 +298,11 @@ static void up_dumpstate(void)
 
   /* Show user stack info */
 
-  lldbg("sp:         %08x\n", sp);
-  lldbg("stack base: %08x\n", ustackbase);
-  lldbg("stack size: %08x\n", ustacksize);
+  _alert("sp:         %08x\n", sp);
+  _alert("stack base: %08x\n", ustackbase);
+  _alert("stack size: %08x\n", ustacksize);
 #ifdef CONFIG_STACK_COLORATION
-  lldbg("stack used: %08x\n", up_check_tcbstack(rtcb));
+  _alert("stack used: %08x\n", up_check_tcbstack(rtcb));
 #endif
 
   /* Dump the user stack if the stack pointer lies within the allocated user
@@ -338,7 +311,7 @@ static void up_dumpstate(void)
 
   if (sp > ustackbase || sp <= ustackbase - ustacksize)
     {
-      lldbg("ERROR: Stack pointer is not within the allocated stack\n");
+      _alert("ERROR: Stack pointer is not within the allocated stack\n");
     }
   else
     {
@@ -347,6 +320,12 @@ static void up_dumpstate(void)
 
 #endif
 
+#ifdef CONFIG_SMP
+  /* Show the CPU number */
+
+  _alert("CPU%d:\n", up_cpu_index());
+#endif
+
   /* Then dump the registers (if available) */
 
   up_registerdump();
@@ -379,6 +358,12 @@ static void _up_assert(int errorcode)
       (void)up_irq_save();
       for (; ; )
         {
+#ifdef CONFIG_SMP
+          /* Try (again) to stop activity on other CPUs */
+
+          (void)spin_trylock(&g_cpu_irqlock);
+#endif
+
 #ifdef CONFIG_ARCH_LEDS
           board_autoled_on(LED_PANIC);
           up_mdelay(250);
@@ -403,17 +388,17 @@ static void _up_assert(int errorcode)
 
 void up_assert(const uint8_t *filename, int lineno)
 {
-#ifdef CONFIG_PRINT_TASKNAME
+#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
   struct tcb_s *rtcb = this_task();
 #endif
 
   board_autoled_on(LED_ASSERTION);
 
-#ifdef CONFIG_PRINT_TASKNAME
-  lldbg("Assertion failed at file:%s line: %d task: %s\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+  _alert("Assertion failed at file:%s line: %d task: %s\n",
         filename, lineno, rtcb->name);
 #else
-  lldbg("Assertion failed at file:%s line: %d\n",
+  _alert("Assertion failed at file:%s line: %d\n",
         filename, lineno);
 #endif
 
diff --git a/arch/arm/src/armv7-m/up_coherent_dcache.c b/arch/arm/src/armv7-m/up_coherent_dcache.c
index 019205f46bc8f74e50e92a124a4a067a41a0a560..008b37a9a338a21bd68415eda8710aeae0085582 100644
--- a/arch/arm/src/armv7-m/up_coherent_dcache.c
+++ b/arch/arm/src/armv7-m/up_coherent_dcache.c
@@ -46,18 +46,6 @@
 
 #include 
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/arch/arm/src/armv7-m/up_copyarmstate.c b/arch/arm/src/armv7-m/up_copyarmstate.c
index 13fec55422aa731c510d0c807e52d77c1098e4db..22e2f390036cdc1fcc76aa4fcdc511d939deb03a 100644
--- a/arch/arm/src/armv7-m/up_copyarmstate.c
+++ b/arch/arm/src/armv7-m/up_copyarmstate.c
@@ -48,18 +48,6 @@
 #if defined(CONFIG_ARCH_FPU) && \
     (!defined(CONFIG_ARMV7M_CMNVECTOR) || defined(CONFIG_ARMV7M_LAZYFPU))
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/arch/arm/src/armv7-m/up_copyfullstate.c b/arch/arm/src/armv7-m/up_copyfullstate.c
index e3618d486238c6ac0c14b2a79bce17c6506ab855..43b10751898b8efcf0bf0584183891f83ffba0cc 100644
--- a/arch/arm/src/armv7-m/up_copyfullstate.c
+++ b/arch/arm/src/armv7-m/up_copyfullstate.c
@@ -44,18 +44,6 @@
 
 #include "up_internal.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/arch/arm/src/armv7-m/up_doirq.c b/arch/arm/src/armv7-m/up_doirq.c
index b51c10e55823bf3ca9861292e97258244519c3cd..8a9cea505e9d85a4457298b39c8f3a8030141775 100644
--- a/arch/arm/src/armv7-m/up_doirq.c
+++ b/arch/arm/src/armv7-m/up_doirq.c
@@ -50,22 +50,6 @@
 #include "up_arch.h"
 #include "up_internal.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -83,7 +67,7 @@ uint32_t *up_doirq(int irq, uint32_t *regs)
    * CURRENT_REGS is handled and (2) the design associated with
    * CONFIG_ARCH_INTERRUPTSTACK.  The savestate variable will not work for
    * that purpose as implemented here because only the outermost nested
-   * interrupt can result in a context switch (it can probably be deleted).
+   * interrupt can result in a context switch.
    */
 
   /* Current regs non-zero indicates that we are processing an interrupt;
diff --git a/arch/arm/src/armv7-m/up_hardfault.c b/arch/arm/src/armv7-m/up_hardfault.c
index 807d45cc43922595c1dbb7a3c92a0235acbf76e9..a68996836e17e68d5cbb42b4a76f5d34b3e4ba76 100644
--- a/arch/arm/src/armv7-m/up_hardfault.c
+++ b/arch/arm/src/armv7-m/up_hardfault.c
@@ -60,25 +60,13 @@
  */
 
 #ifdef CONFIG_DEBUG_HARDFAULT
-# define hfdbg(format, ...) lldbg(format, ##__VA_ARGS__)
+# define hfalert(format, ...)  _alert(format, ##__VA_ARGS__)
 #else
-# define hfdbg(x...)
+# define hfalert(x...)
 #endif
 
 #define INSN_SVC0        0xdf00 /* insn: svc 0 */
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -92,7 +80,7 @@
  *
  ****************************************************************************/
 
-int up_hardfault(int irq, FAR void *context)
+int up_hardfault(int irq, FAR void *context, FAR void *arg)
 {
 #if defined(CONFIG_DEBUG_HARDFAULT) || !defined(CONFIG_ARMV7M_USEBASEPRI)
   uint32_t *regs = (uint32_t *)context;
@@ -127,7 +115,7 @@ int up_hardfault(int irq, FAR void *context)
       /* Fetch the instruction that caused the Hard fault */
 
       uint16_t insn = *pc;
-      hfdbg("  PC: %p INSN: %04x\n", pc, insn);
+      hfalert("  PC: %p INSN: %04x\n", pc, insn);
 
       /* If this was the instruction 'svc 0', then forward processing
        * to the SVCall handler
@@ -135,51 +123,51 @@ int up_hardfault(int irq, FAR void *context)
 
       if (insn == INSN_SVC0)
         {
-          hfdbg("Forward SVCall\n");
-          return up_svcall(irq, context);
+          hfalert("Forward SVCall\n");
+          return up_svcall(irq, context, arg);
         }
     }
 #endif
 
   /* Dump some hard fault info */
 
-  hfdbg("Hard Fault:\n");
-  hfdbg("  IRQ: %d regs: %p\n", irq, regs);
-  hfdbg("  BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
-        getbasepri(), getprimask(), getipsr(), getcontrol());
-  hfdbg("  CFAULTS: %08x HFAULTS: %08x DFAULTS: %08x BFAULTADDR: %08x AFAULTS: %08x\n",
-        getreg32(NVIC_CFAULTS), getreg32(NVIC_HFAULTS),
-        getreg32(NVIC_DFAULTS), getreg32(NVIC_BFAULT_ADDR),
-        getreg32(NVIC_AFAULTS));
-  hfdbg("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-        regs[REG_R0],  regs[REG_R1],  regs[REG_R2],  regs[REG_R3],
-        regs[REG_R4],  regs[REG_R5],  regs[REG_R6],  regs[REG_R7]);
-  hfdbg("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-        regs[REG_R8],  regs[REG_R9],  regs[REG_R10], regs[REG_R11],
-        regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
+  hfalert("Hard Fault:\n");
+  hfalert("  IRQ: %d regs: %p\n", irq, regs);
+  hfalert("  BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
+          getbasepri(), getprimask(), getipsr(), getcontrol());
+  hfalert("  CFAULTS: %08x HFAULTS: %08x DFAULTS: %08x BFAULTADDR: %08x AFAULTS: %08x\n",
+          getreg32(NVIC_CFAULTS), getreg32(NVIC_HFAULTS),
+          getreg32(NVIC_DFAULTS), getreg32(NVIC_BFAULT_ADDR),
+          getreg32(NVIC_AFAULTS));
+  hfalert("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+          regs[REG_R0],  regs[REG_R1],  regs[REG_R2],  regs[REG_R3],
+          regs[REG_R4],  regs[REG_R5],  regs[REG_R6],  regs[REG_R7]);
+  hfalert("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+          regs[REG_R8],  regs[REG_R9],  regs[REG_R10], regs[REG_R11],
+          regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
 
 #ifdef CONFIG_ARMV7M_USEBASEPRI
 #  ifdef REG_EXC_RETURN
-  hfdbg("  xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
-        CURRENT_REGS[REG_XPSR],  CURRENT_REGS[REG_BASEPRI],
-        CURRENT_REGS[REG_EXC_RETURN]);
+  hfalert("  xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
+          CURRENT_REGS[REG_XPSR],  CURRENT_REGS[REG_BASEPRI],
+          CURRENT_REGS[REG_EXC_RETURN]);
 #  else
-  hfdbg("  xPSR: %08x BASEPRI: %08x (saved)\n",
-        CURRENT_REGS[REG_XPSR],  CURRENT_REGS[REG_BASEPRI]);
+  hfalert("  xPSR: %08x BASEPRI: %08x (saved)\n",
+          CURRENT_REGS[REG_XPSR],  CURRENT_REGS[REG_BASEPRI]);
 #  endif
 #else
 #  ifdef REG_EXC_RETURN
-  hfdbg("  xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
-        CURRENT_REGS[REG_XPSR],  CURRENT_REGS[REG_PRIMASK],
-        CURRENT_REGS[REG_EXC_RETURN]);
+  hfalert("  xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
+          CURRENT_REGS[REG_XPSR],  CURRENT_REGS[REG_PRIMASK],
+          CURRENT_REGS[REG_EXC_RETURN]);
 #  else
-  hfdbg("  xPSR: %08x PRIMASK: %08x (saved)\n",
-        CURRENT_REGS[REG_XPSR],  CURRENT_REGS[REG_PRIMASK]);
+  hfalert("  xPSR: %08x PRIMASK: %08x (saved)\n",
+          CURRENT_REGS[REG_XPSR],  CURRENT_REGS[REG_PRIMASK]);
 #  endif
 #endif
 
   (void)up_irq_save();
-  lldbg("PANIC!!! Hard fault: %08x\n", getreg32(NVIC_HFAULTS));
+  _alert("PANIC!!! Hard fault: %08x\n", getreg32(NVIC_HFAULTS));
   PANIC();
   return OK;
 }
diff --git a/arch/arm/src/armv7-m/up_initialstate.c b/arch/arm/src/armv7-m/up_initialstate.c
index 7cf6816c21820e75a684e276469410c04f5fd1ae..37cb86cb4640a812243730349401b44c872dd674 100644
--- a/arch/arm/src/armv7-m/up_initialstate.c
+++ b/arch/arm/src/armv7-m/up_initialstate.c
@@ -51,18 +51,6 @@
 #include "psr.h"
 #include "exc_return.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/arch/arm/src/armv7-m/up_itm_syslog.c b/arch/arm/src/armv7-m/up_itm_syslog.c
index 94b499879a79b9111a9225f50f6990a66e6059fb..d63fed09adb238e571c2cdd74f731759cb67e848 100644
--- a/arch/arm/src/armv7-m/up_itm_syslog.c
+++ b/arch/arm/src/armv7-m/up_itm_syslog.c
@@ -2,7 +2,7 @@
  * arch/arm/src/armv7-m/up_itm_syslog.c
  *
  *   Copyright (C) 2014 Pierre-noel Bouteville . All rights reserved.
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Authors: Pierre-noel Bouteville 
  *            Gregory Nutt 
  *
@@ -52,7 +52,7 @@
 #include "up_arch.h"
 #include "itm_syslog.h"
 
-#if defined(CONFIG_SYSLOG) || defined(CONFIG_ARMV7M_ITMSYSLOG)
+#ifdef CONFIG_ARMV7M_ITMSYSLOG
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -72,6 +72,73 @@
 #  define CONFIG_ARMV7M_ITMSYSLOG_PORT 0
 #endif
 
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* SYSLOG channel methods */
+
+static int itm_putc(int ch);
+static int itm_flush(void);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* This structure describes the ITM SYSLOG channel */
+
+static const struct syslog_channel_s g_itm_channel =
+{
+  .sc_putc  = itm_putc,
+  .sc_force = itm_putc,
+  .sc_flush = itm_flush,
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: itm_putc
+ *
+ * Description:
+ *   This is the low-level system logging interface.
+ *
+ ****************************************************************************/
+
+static int itm_putc(int ch)
+{
+  /* ITM enabled */
+
+  if ((getreg32(ITM_TCR) & ITM_TCR_ITMENA_Msk) == 0)
+    {
+      return EOF;
+    }
+
+  /* ITM Port "CONFIG_ARMV7M_ITMSYSLOG_PORT" enabled */
+
+  if (getreg32(ITM_TER) & (1 << CONFIG_ARMV7M_ITMSYSLOG_PORT))
+    {
+      while (getreg32(ITM_PORT(CONFIG_ARMV7M_ITMSYSLOG_PORT)) == 0);
+      putreg8((uint8_t)ch, ITM_PORT(CONFIG_ARMV7M_ITMSYSLOG_PORT));
+    }
+
+  return ch;
+}
+
+/****************************************************************************
+ * Name: itm_flush
+ *
+ * Description:
+ *   A dummy FLUSH method
+ *
+ ****************************************************************************/
+
+static int itm_flush(void)
+{
+  return OK;
+}
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -116,38 +183,10 @@ void itm_syslog_initialize(void)
   putreg32(0x0001000d, ITM_TCR);
   putreg32(0x00000100, TPI_FFCR);
   putreg32(0xffffffff, ITM_TER); /* Enable 32 Ports */
-}
 
-/****************************************************************************
- * Name: syslog_putc
- *
- * Description:
- *   This is the low-level system logging interface.  The debugging/syslogging
- *   interfaces are syslog() and lowsyslog().  The difference is that
- *   the syslog() internface writes to fd=1 (stdout) whereas lowsyslog() uses
- *   a lower level interface that works from interrupt handlers.  This
- *   function is the low-level interface used to implement lowsyslog().
- *
- ****************************************************************************/
+  /* Setup the SYSLOG channel */
 
-int syslog_putc(int ch)
-{
-  /* ITM enabled */
-
-  if ((getreg32(ITM_TCR) & ITM_TCR_ITMENA_Msk) == 0)
-    {
-      return EOF;
-    }
-
-  /* ITM Port "CONFIG_ARMV7M_ITMSYSLOG_PORT" enabled */
-
-  if (getreg32(ITM_TER) & (1 << CONFIG_ARMV7M_ITMSYSLOG_PORT))
-    {
-      while (getreg32(ITM_PORT(CONFIG_ARMV7M_ITMSYSLOG_PORT)) == 0);
-      putreg8((uint8_t)ch, ITM_PORT(CONFIG_ARMV7M_ITMSYSLOG_PORT));
-    }
-
-  return ch;
+  (void)syslog_channel(&g_itm_channel);
 }
 
-#endif /* CONFIG_SYSLOG && CONFIG_ARMV7M_ITMSYSLOG */
+#endif /* CONFIG_ARMV7M_ITMSYSLOG */
diff --git a/arch/arm/src/armv7-m/up_memfault.c b/arch/arm/src/armv7-m/up_memfault.c
index 145dba531d0d788fc61d212c3f9ec860f0e2da35..f4f642e4defc21856c9fc75676bdeb85dc5e91b5 100644
--- a/arch/arm/src/armv7-m/up_memfault.c
+++ b/arch/arm/src/armv7-m/up_memfault.c
@@ -55,23 +55,13 @@
 #undef DEBUG_MEMFAULTS         /* Define to debug memory management faults */
 
 #ifdef DEBUG_MEMFAULTS
-# define mfdbg(format, ...) lldbg(format, ##__VA_ARGS__)
+# define mferr(format, ...)  _alert(format, ##__VA_ARGS__)
+# define mfinfo(format, ...) _alert(format, ##__VA_ARGS__)
 #else
-# define mfdbg(x...)
+# define mferr(x...)
+# define mfinfo(x...)
 #endif
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -87,41 +77,41 @@
  *
  ****************************************************************************/
 
-int up_memfault(int irq, FAR void *context)
+int up_memfault(int irq, FAR void *context, FAR void *arg)
 {
   /* Dump some memory management fault info */
 
   (void)up_irq_save();
-  lldbg("PANIC!!! Memory Management Fault:\n");
-  mfdbg("  IRQ: %d context: %p\n", irq, regs);
-  lldbg("  CFAULTS: %08x MMFAR: %08x\n",
+  _alert("PANIC!!! Memory Management Fault:\n");
+  mfinfo("  IRQ: %d context: %p\n", irq, regs);
+  _alert("  CFAULTS: %08x MMFAR: %08x\n",
         getreg32(NVIC_CFAULTS), getreg32(NVIC_MEMMANAGE_ADDR));
-  mfdbg("  BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
-        getbasepri(), getprimask(), getipsr(), getcontrol());
-  mfdbg("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-        regs[REG_R0],  regs[REG_R1],  regs[REG_R2],  regs[REG_R3],
-        regs[REG_R4],  regs[REG_R5],  regs[REG_R6],  regs[REG_R7]);
-  mfdbg("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-        regs[REG_R8],  regs[REG_R9],  regs[REG_R10], regs[REG_R11],
-        regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
+  mfinfo("  BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
+         getbasepri(), getprimask(), getipsr(), getcontrol());
+  mfinfo("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+         regs[REG_R0],  regs[REG_R1],  regs[REG_R2],  regs[REG_R3],
+         regs[REG_R4],  regs[REG_R5],  regs[REG_R6],  regs[REG_R7]);
+  mfinfo("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+         regs[REG_R8],  regs[REG_R9],  regs[REG_R10], regs[REG_R11],
+         regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
 
 #ifdef CONFIG_ARMV7M_USEBASEPRI
 #  ifdef REG_EXC_RETURN
-  mfdbg("  xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
-        CURRENT_REGS[REG_XPSR],  CURRENT_REGS[REG_BASEPRI],
-        CURRENT_REGS[REG_EXC_RETURN]);
+  mfinfo("  xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
+         CURRENT_REGS[REG_XPSR],  CURRENT_REGS[REG_BASEPRI],
+         CURRENT_REGS[REG_EXC_RETURN]);
 #  else
-  mfdbg("  xPSR: %08x BASEPRI: %08x (saved)\n",
-        CURRENT_REGS[REG_XPSR],  CURRENT_REGS[REG_BASEPRI]);
+  mfinfo("  xPSR: %08x BASEPRI: %08x (saved)\n",
+         CURRENT_REGS[REG_XPSR],  CURRENT_REGS[REG_BASEPRI]);
 #  endif
 #else
 #  ifdef REG_EXC_RETURN
-  mfdbg("  xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
-        CURRENT_REGS[REG_XPSR],  CURRENT_REGS[REG_PRIMASK],
-        CURRENT_REGS[REG_EXC_RETURN]);
+  mfinfo("  xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
+         CURRENT_REGS[REG_XPSR],  CURRENT_REGS[REG_PRIMASK],
+         CURRENT_REGS[REG_EXC_RETURN]);
 #  else
-  mfdbg("  xPSR: %08x PRIMASK: %08x (saved)\n",
-        CURRENT_REGS[REG_XPSR],  CURRENT_REGS[REG_PRIMASK]);
+  mfinfo("  xPSR: %08x PRIMASK: %08x (saved)\n",
+         CURRENT_REGS[REG_XPSR],  CURRENT_REGS[REG_PRIMASK]);
 #  endif
 #endif
 
diff --git a/arch/arm/src/armv7-m/up_ramvec_attach.c b/arch/arm/src/armv7-m/up_ramvec_attach.c
index 3700cdb00bc1542ff0b44e29585e3363475cded5..6b954803e03db95599e75c5d3066d61c2cd80b36 100644
--- a/arch/arm/src/armv7-m/up_ramvec_attach.c
+++ b/arch/arm/src/armv7-m/up_ramvec_attach.c
@@ -49,39 +49,6 @@
 
 #ifdef CONFIG_ARCH_RAMVECTORS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing the interrupt
- * config.  NOTE: that only lldbg types are used so that the output is
- * immediately available.
- */
-
-#ifdef CONFIG_DEBUG_IRQ
-#  define intdbg    lldbg
-#  define intvdbg   llvdbg
-#else
-#  define intdbg(x...)
-#  define intvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -103,7 +70,7 @@ int up_ramvec_attach(int irq, up_vector_t vector)
 {
   int ret = -EINVAL;
 
-  intvdbg("%s IRQ%d\n", vector ? "Attaching" : "Detaching", irq);
+  irqinfo("%s IRQ%d\n", vector ? "Attaching" : "Detaching", irq);
 
   if ((unsigned)irq < NR_VECTORS)
     {
diff --git a/arch/arm/src/armv7-m/up_ramvec_initialize.c b/arch/arm/src/armv7-m/up_ramvec_initialize.c
index 80b176d67403d0eaf8d14cb880ac1b3e99946bc7..4db7bb2be322172bf6bf3a036a8bb8d0fa7132b9 100644
--- a/arch/arm/src/armv7-m/up_ramvec_initialize.c
+++ b/arch/arm/src/armv7-m/up_ramvec_initialize.c
@@ -71,24 +71,6 @@
 
 #define RAMVEC_ALIGN ((~NVIC_VECTAB_TBLOFF_MASK & 0xffff) + 1)
 
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing the interrupt
- * config.  NOTE: that only lldbg types are used so that the output is
- * immediately available.
- */
-
-#ifdef CONFIG_DEBUG_IRQ
-#  define intdbg    lldbg
-#  define intvdbg   llvdbg
-#else
-#  define intdbg(x...)
-#  define intvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
 /****************************************************************************
  * Public Data
  ****************************************************************************/
@@ -108,14 +90,6 @@
 up_vector_t g_ram_vectors[ARMV7M_VECTAB_SIZE]
   __attribute__ ((section (".ram_vectors"), aligned (RAMVEC_ALIGN)));
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -147,7 +121,7 @@ void up_ramvec_initialize(void)
   src  = (const CODE up_vector_t *)getreg32(NVIC_VECTAB);
   dest = g_ram_vectors;
 
-  intvdbg("src=%p dest=%p\n", src, dest);
+  irqinfo("src=%p dest=%p\n", src, dest);
 
   for (i = 0; i < ARMV7M_VECTAB_SIZE; i++)
     {
@@ -163,7 +137,7 @@ void up_ramvec_initialize(void)
    * the table alignment is insufficient.
    */
 
-  intvdbg("NVIC_VECTAB=%08x\n", getreg32(NVIC_VECTAB));
+  irqinfo("NVIC_VECTAB=%08x\n", getreg32(NVIC_VECTAB));
   DEBUGASSERT(getreg32(NVIC_VECTAB) == (uint32_t)g_ram_vectors);
 }
 
diff --git a/arch/arm/src/armv7-m/up_releasepending.c b/arch/arm/src/armv7-m/up_releasepending.c
index e9f4cceb33cdf2181f3273caa7bc473d0ea4201d..83be88094e75072d3bc5c8020673c247465829cf 100644
--- a/arch/arm/src/armv7-m/up_releasepending.c
+++ b/arch/arm/src/armv7-m/up_releasepending.c
@@ -66,7 +66,7 @@ void up_release_pending(void)
 {
   struct tcb_s *rtcb = this_task();
 
-  slldbg("From TCB=%p\n", rtcb);
+  sinfo("From TCB=%p\n", rtcb);
 
   /* Merge the g_pendingtasks list into the ready-to-run task list */
 
diff --git a/arch/arm/src/armv7-m/up_reprioritizertr.c b/arch/arm/src/armv7-m/up_reprioritizertr.c
index d3415e77414246695490bb00e54bb912dbb6dac7..5e65a3d33837b16d3928614b6fbd726d2009b34d 100644
--- a/arch/arm/src/armv7-m/up_reprioritizertr.c
+++ b/arch/arm/src/armv7-m/up_reprioritizertr.c
@@ -94,7 +94,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
       struct tcb_s *rtcb = this_task();
       bool switch_needed;
 
-      slldbg("TCB=%p PRI=%d\n", tcb, priority);
+      sinfo("TCB=%p PRI=%d\n", tcb, priority);
 
       /* Remove the tcb task from the ready-to-run list.
        * sched_removereadytorun will return true if we just removed the head
diff --git a/arch/arm/src/armv7-m/up_schedulesigaction.c b/arch/arm/src/armv7-m/up_schedulesigaction.c
index c44298c14ece181a4a7033324d600a2258b752c8..42aa2932ba64ce13f56a3ef67af8512a83780ba1 100644
--- a/arch/arm/src/armv7-m/up_schedulesigaction.c
+++ b/arch/arm/src/armv7-m/up_schedulesigaction.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/armv7-m/up_schedulesigaction.c
  *
- *   Copyright (C) 2009-2014, 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009-2014, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -52,6 +52,8 @@
 #include "up_internal.h"
 #include "up_arch.h"
 
+#include "irq/irq.h"
+
 #ifndef CONFIG_DISABLE_SIGNALS
 
 /****************************************************************************
@@ -91,11 +93,12 @@
  *
  ****************************************************************************/
 
+#ifndef CONFIG_SMP
 void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
 {
   irqstate_t flags;
 
-  sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+  sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
   DEBUGASSERT(tcb != NULL && sigdeliver != NULL);
 
   /* Make sure that interrupts are disabled */
@@ -110,7 +113,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
        * to the currently executing task.
        */
 
-      sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
+      sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
 
       if (tcb == this_task())
         {
@@ -163,7 +166,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
 #endif
               CURRENT_REGS[REG_XPSR]    = ARMV7M_XPSR_T;
 #ifdef CONFIG_BUILD_PROTECTED
-              CURRENT_REGS[REG_LR]     = EXC_RETURN_PRIVTHR;
+              CURRENT_REGS[REG_LR]      = EXC_RETURN_PRIVTHR;
 #endif
               /* And make sure that the saved context in the TCB is the same
                * as the interrupt return context.
@@ -216,5 +219,214 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
 
   leave_critical_section(flags);
 }
+#endif /* !CONFIG_SMP */
+
+#ifdef CONFIG_SMP
+void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
+{
+  irqstate_t flags;
+  int cpu;
+  int me;
+
+  sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+
+  /* Make sure that interrupts are disabled */
+
+  flags = enter_critical_section();
+
+  /* Refuse to handle nested signal actions */
+
+  if (!tcb->xcp.sigdeliver)
+    {
+      /* First, handle some special cases when the signal is being delivered
+       * to task that is currently executing on any CPU.
+       */
+
+      sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
+
+      if (tcb->task_state == TSTATE_TASK_RUNNING)
+        {
+          me  = this_cpu();
+          cpu = tcb->cpu;
+
+          /* CASE 1:  We are not in an interrupt handler and a task is
+           * signalling itself for some reason.
+           */
+
+          if (cpu == me && !CURRENT_REGS)
+            {
+              /* In this case just deliver the signal now. */
+
+              sigdeliver(tcb);
+            }
+
+          /* CASE 2:  The task that needs to receive the signal is running.
+           * This could happen if the task is running on another CPU OR if
+           * we are in an interrupt handler and the task is running on this
+           * CPU.  In the former case, we will have to PAUSE the other CPU
+           * first.  But in either case, we will have to modify the return
+           * state as well as the state in the TCB.
+           *
+           * Hmmm... there looks like a latent bug here: The following logic
+           * would fail in the strange case where we are in an interrupt
+           * handler, the thread is signalling itself, but a context switch
+           * to another task has occurred so that CURRENT_REGS does not
+           * refer to the thread of this_task()!
+           */
+
+          else
+            {
+              /* If we signalling a task running on the other CPU, we have
+               * to PAUSE the other CPU.
+               */
+
+              if (cpu != me)
+                {
+                  up_cpu_pause(cpu);
+                }
+
+              /* Save the return PC, CPSR and either the BASEPRI or PRIMASK
+               * registers (and perhaps also the LR).  These will be
+               * restored by the signal trampoline after the signal has been
+               * delivered.
+               */
+
+              tcb->xcp.sigdeliver       = (FAR void *)sigdeliver;
+              tcb->xcp.saved_pc         = CURRENT_REGS[REG_PC];
+#ifdef CONFIG_ARMV7M_USEBASEPRI
+              tcb->xcp.saved_basepri    = CURRENT_REGS[REG_BASEPRI];
+#else
+              tcb->xcp.saved_primask    = CURRENT_REGS[REG_PRIMASK];
+#endif
+              tcb->xcp.saved_xpsr       = CURRENT_REGS[REG_XPSR];
+#ifdef CONFIG_BUILD_PROTECTED
+              tcb->xcp.saved_lr         = CURRENT_REGS[REG_LR];
+#endif
+              /* Increment the IRQ lock count so that when the task is restarted,
+               * it will hold the IRQ spinlock.
+               */
+
+              DEBUGASSERT(tcb->irqcount < INT16_MAX);
+              tcb->irqcount++;
+
+              /* Handle a possible race condition where the TCB was suspended
+               * just before we paused the other CPU.  The critical section
+               * established above will prevent new threads from running on
+               * that CPU, but it will not guarantee that the running thread
+               * did not suspend itself (allowing any threads "assigned" to
+               * the CPU to run).
+               */
+
+              if (tcb->task_state != TSTATE_TASK_RUNNING)
+                {
+                  /* Then set up to vector to the trampoline with interrupts
+                   * disabled.  We must already be in privileged thread mode
+                   * to be here.
+                   */
+
+                  tcb->xcp.regs[REG_PC]      = (uint32_t)up_sigdeliver;
+#ifdef CONFIG_ARMV7M_USEBASEPRI
+                  tcb->xcp.regs[REG_BASEPRI] = NVIC_SYSH_DISABLE_PRIORITY;
+#else
+                  tcb->xcp.regs[REG_PRIMASK] = 1;
+#endif
+                  tcb->xcp.regs[REG_XPSR]    = ARMV7M_XPSR_T;
+#ifdef CONFIG_BUILD_PROTECTED
+                  tcb->xcp.regs[REG_LR]      = EXC_RETURN_PRIVTHR;
+#endif
+                }
+              else
+                {
+                  /* Then set up to vector to the trampoline with interrupts
+                   * disabled
+                   */
+
+                  CURRENT_REGS[REG_PC]      = (uint32_t)up_sigdeliver;
+#ifdef CONFIG_ARMV7M_USEBASEPRI
+                  CURRENT_REGS[REG_BASEPRI] = NVIC_SYSH_DISABLE_PRIORITY;
+#else
+                  CURRENT_REGS[REG_PRIMASK] = 1;
+#endif
+                  CURRENT_REGS[REG_XPSR]    = ARMV7M_XPSR_T;
+#ifdef CONFIG_BUILD_PROTECTED
+                  CURRENT_REGS[REG_LR]      = EXC_RETURN_PRIVTHR;
+#endif
+                  /* In an SMP configuration, the interrupt disable logic also
+                   * involves spinlocks that are configured per the TCB irqcount
+                   * field.  This is logically equivalent to enter_critical_section().
+                   * The matching call to leave_critical_section() will be
+                   * performed in up_sigdeliver().
+                   */
+
+                  spin_setbit(&g_cpu_irqset, cpu, &g_cpu_irqsetlock,
+                              &g_cpu_irqlock);
+
+                  /* And make sure that the saved context in the TCB is the same
+                   * as the interrupt return context.
+                   */
+
+                  up_savestate(tcb->xcp.regs);
+                }
+
+              /* RESUME the other CPU if it was PAUSED */
+
+              if (cpu != me)
+                {
+                  up_cpu_resume(cpu);
+                }
+            }
+        }
+
+      /* Otherwise, we are (1) signaling a task is not running from an
+       * interrupt handler or (2) we are not in an interrupt handler and the
+       * running task is signalling some other non-running task.
+       */
+
+      else
+        {
+          /* Save the return PC, CPSR and either the BASEPRI or PRIMASK
+           * registers (and perhaps also the LR).  These will be restored
+           * by the signal trampoline after the signal has been delivered.
+           */
+
+          tcb->xcp.sigdeliver       = (FAR void *)sigdeliver;
+          tcb->xcp.saved_pc         = tcb->xcp.regs[REG_PC];
+#ifdef CONFIG_ARMV7M_USEBASEPRI
+          tcb->xcp.saved_basepri    = tcb->xcp.regs[REG_BASEPRI];
+#else
+          tcb->xcp.saved_primask    = tcb->xcp.regs[REG_PRIMASK];
+#endif
+          tcb->xcp.saved_xpsr       = tcb->xcp.regs[REG_XPSR];
+#ifdef CONFIG_BUILD_PROTECTED
+          tcb->xcp.saved_lr         = tcb->xcp.regs[REG_LR];
+#endif
+          /* Increment the IRQ lock count so that when the task is restarted,
+           * it will hold the IRQ spinlock.
+           */
+
+          DEBUGASSERT(tcb->irqcount < INT16_MAX);
+          tcb->irqcount++;
+
+          /* Then set up to vector to the trampoline with interrupts
+           * disabled.  We must already be in privileged thread mode to be
+           * here.
+           */
+
+          tcb->xcp.regs[REG_PC]      = (uint32_t)up_sigdeliver;
+#ifdef CONFIG_ARMV7M_USEBASEPRI
+          tcb->xcp.regs[REG_BASEPRI] = NVIC_SYSH_DISABLE_PRIORITY;
+#else
+          tcb->xcp.regs[REG_PRIMASK] = 1;
+#endif
+          tcb->xcp.regs[REG_XPSR]    = ARMV7M_XPSR_T;
+#ifdef CONFIG_BUILD_PROTECTED
+          tcb->xcp.regs[REG_LR]      = EXC_RETURN_PRIVTHR;
+#endif
+        }
+    }
+
+  leave_critical_section(flags);
+}
+#endif /* CONFIG_SMP */
 
 #endif /* !CONFIG_DISABLE_SIGNALS */
diff --git a/arch/arm/src/armv7-m/up_sigdeliver.c b/arch/arm/src/armv7-m/up_sigdeliver.c
index bfa672aa7acf3d154b2169869a9c9166149ea4bc..5aff11499c2630f32e12785f1c94e56d57e68b1d 100644
--- a/arch/arm/src/armv7-m/up_sigdeliver.c
+++ b/arch/arm/src/armv7-m/up_sigdeliver.c
@@ -54,18 +54,6 @@
 
 #ifndef CONFIG_DISABLE_SIGNALS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -95,7 +83,7 @@ void up_sigdeliver(void)
 
   board_autoled_on(LED_SIGNAL);
 
-  sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
         rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
   ASSERT(rtcb->xcp.sigdeliver != NULL);
 
@@ -124,9 +112,9 @@ void up_sigdeliver(void)
   /* Then restore the task interrupt state */
 
 #ifdef CONFIG_ARMV7M_USEBASEPRI
-  up_irq_restore((uint8_t)regs[REG_BASEPRI]);
+  leave_critical_section((uint8_t)regs[REG_BASEPRI]);
 #else
-  up_irq_restore((uint16_t)regs[REG_PRIMASK]);
+  leave_critical_section((uint16_t)regs[REG_PRIMASK]);
 #endif
 
   /* Deliver the signal */
@@ -136,9 +124,18 @@ void up_sigdeliver(void)
   /* Output any debug messages BEFORE restoring errno (because they may
    * alter errno), then disable interrupts again and restore the original
    * errno that is needed by the user logic (it is probably EINTR).
+   *
+   * REVISIT: In SMP mode up_irq_save() probably only disables interrupts
+   * on the local CPU.  We do not want to call enter_critical_section()
+   * here, however, because we don't want this state to stick after the
+   * call to up_fullcontextrestore().
+   *
+   * I would prefer that all interrupts are disabled when
+   * up_fullcontextrestore() is called, but that may not be necessary.
    */
 
-  sdbg("Resuming\n");
+  sinfo("Resuming\n");
+
   (void)up_irq_save();
   rtcb->pterrno = saved_errno;
 
diff --git a/arch/arm/src/armv7-m/up_signal_dispatch.c b/arch/arm/src/armv7-m/up_signal_dispatch.c
index 4a03a26b213e7d39ceedd7086c6c10162d4d6051..9ec7d151529ca35f84e4dc939165e35f8882d9a5 100644
--- a/arch/arm/src/armv7-m/up_signal_dispatch.c
+++ b/arch/arm/src/armv7-m/up_signal_dispatch.c
@@ -46,18 +46,6 @@
 #if ((defined(CONFIG_BUILD_PROTECTED) && defined(__KERNEL__)) || \
       defined(CONFIG_BUILD_KERNEL)) && !defined(CONFIG_DISABLE_SIGNALS)
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/arch/arm/src/armv7-m/up_svcall.c b/arch/arm/src/armv7-m/up_svcall.c
index 4d28224fd7eba41837ef4b49a91a4381733c4af4..e16a6f104c2dd841df3fe1b6d41cf3e9cf45c2ab 100644
--- a/arch/arm/src/armv7-m/up_svcall.c
+++ b/arch/arm/src/armv7-m/up_svcall.c
@@ -56,33 +56,6 @@
 #include "exc_return.h"
 #include "up_internal.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-/* Configuration ************************************************************/
-
-/* Debug ********************************************************************/
-/* Debug output from this file may interfere with context switching!  To get
- * debug output you must enabled the following in your NuttX configuration:
- *
- * - CONFIG_DEBUG and CONFIG_DEBUG_SYSCALL (shows only syscalls)
- * - CONFIG_DEBUG and CONFIG_DEBUG_SVCALL  (shows everything)
- */
-
-#if defined(CONFIG_DEBUG_SYSCALL) || defined(CONFIG_DEBUG_SVCALL)
-# define svcdbg(format, ...) lldbg(format, ##__VA_ARGS__)
-#else
-# define svcdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -152,7 +125,7 @@ static void dispatch_syscall(void)
  *
  ****************************************************************************/
 
-int up_svcall(int irq, FAR void *context)
+int up_svcall(int irq, FAR void *context, FAR void *arg)
 {
   uint32_t *regs = (uint32_t *)context;
   uint32_t cmd;
@@ -164,23 +137,23 @@ int up_svcall(int irq, FAR void *context)
    * and R1..R7 =  variable number of arguments depending on the system call.
    */
 
-#if defined(CONFIG_DEBUG_SYSCALL) || defined(CONFIG_DEBUG_SVCALL)
+#ifdef CONFIG_DEBUG_SYSCALL_INFO
 # ifndef CONFIG_DEBUG_SVCALL
   if (cmd > SYS_switch_context)
 # endif
     {
-      svcdbg("SVCALL Entry: regs: %p cmd: %d\n", regs, cmd);
-      svcdbg("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-             regs[REG_R0],  regs[REG_R1],  regs[REG_R2],  regs[REG_R3],
-             regs[REG_R4],  regs[REG_R5],  regs[REG_R6],  regs[REG_R7]);
-      svcdbg("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-             regs[REG_R8],  regs[REG_R9],  regs[REG_R10], regs[REG_R11],
-             regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
+      svcinfo("SVCALL Entry: regs: %p cmd: %d\n", regs, cmd);
+      svcinfo("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+              regs[REG_R0],  regs[REG_R1],  regs[REG_R2],  regs[REG_R3],
+              regs[REG_R4],  regs[REG_R5],  regs[REG_R6],  regs[REG_R7]);
+      svcinfo("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+              regs[REG_R8],  regs[REG_R9],  regs[REG_R10], regs[REG_R11],
+              regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
 # ifdef REG_EXC_RETURN
-      svcdbg(" PSR: %08x EXC_RETURN: %08x\n",
-             regs[REG_XPSR], regs[REG_EXC_RETURN]);
+      svcinfo(" PSR: %08x EXC_RETURN: %08x\n",
+              regs[REG_XPSR], regs[REG_EXC_RETURN]);
 # else
-      svcdbg(" PSR: %08x\n", regs[REG_XPSR]);
+      svcinfo(" PSR: %08x\n", regs[REG_XPSR]);
 # endif
     }
 #endif
@@ -473,7 +446,7 @@ int up_svcall(int irq, FAR void *context)
 
           regs[REG_R0] -= CONFIG_SYS_RESERVED;
 #else
-          slldbg("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
+          svcerr("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
 #endif
         }
         break;
@@ -481,35 +454,35 @@ int up_svcall(int irq, FAR void *context)
 
   /* Report what happened.  That might difficult in the case of a context switch */
 
-#if defined(CONFIG_DEBUG_SYSCALL) || defined(CONFIG_DEBUG_SVCALL)
+#ifdef CONFIG_DEBUG_SYSCALL_INFO
 # ifndef CONFIG_DEBUG_SVCALL
   if (cmd > SYS_switch_context)
 # else
   if (regs != CURRENT_REGS)
 # endif
     {
-      svcdbg("SVCall Return:\n");
-      svcdbg("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-             CURRENT_REGS[REG_R0],  CURRENT_REGS[REG_R1],
-             CURRENT_REGS[REG_R2],  CURRENT_REGS[REG_R3],
-             CURRENT_REGS[REG_R4],  CURRENT_REGS[REG_R5],
-             CURRENT_REGS[REG_R6],  CURRENT_REGS[REG_R7]);
-      svcdbg("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-             CURRENT_REGS[REG_R8],  CURRENT_REGS[REG_R9],
-             CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
-             CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
-             CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
+      svcinfo("SVCall Return:\n");
+      svcinfo("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+              CURRENT_REGS[REG_R0],  CURRENT_REGS[REG_R1],
+              CURRENT_REGS[REG_R2],  CURRENT_REGS[REG_R3],
+              CURRENT_REGS[REG_R4],  CURRENT_REGS[REG_R5],
+              CURRENT_REGS[REG_R6],  CURRENT_REGS[REG_R7]);
+      svcinfo("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+              CURRENT_REGS[REG_R8],  CURRENT_REGS[REG_R9],
+              CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
+              CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
+              CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
 # ifdef REG_EXC_RETURN
-      svcdbg(" PSR: %08x EXC_RETURN: %08x\n",
-             CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_EXC_RETURN]);
+      svcinfo(" PSR: %08x EXC_RETURN: %08x\n",
+              CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_EXC_RETURN]);
 # else
-      svcdbg(" PSR: %08x\n", CURRENT_REGS[REG_XPSR]);
+      svcinfo(" PSR: %08x\n", CURRENT_REGS[REG_XPSR]);
 # endif
     }
 # ifdef CONFIG_DEBUG_SVCALL
   else
     {
-      svcdbg("SVCall Return: %d\n", regs[REG_R0]);
+      svcinfo("SVCall Return: %d\n", regs[REG_R0]);
     }
 # endif
 #endif
diff --git a/arch/arm/src/armv7-r/Kconfig b/arch/arm/src/armv7-r/Kconfig
index 0582a4fee3361af32e82c9d368bddce074040244..b4ec974db03d58b0a67a10b2eb5bb7c66ae7b6db 100644
--- a/arch/arm/src/armv7-r/Kconfig
+++ b/arch/arm/src/armv7-r/Kconfig
@@ -3,7 +3,7 @@
 # see the file kconfig-language.txt in the NuttX tools repository.
 #
 
-comment "ARMv7-A Configuration Options"
+comment "ARMv7-R Configuration Options"
 
 config ARMV7R_MEMINIT
 	bool
@@ -19,6 +19,29 @@ config ARMV7R_MEMINIT
 		the memory initialization first, then explicitly call
 		arm_data_initialize().
 
+config ARMV7R_HAVE_ICACHE
+	bool
+	default n
+
+config ARMV7R_HAVE_DCACHE
+	bool
+	default n
+
+config ARMV7R_ICACHE
+	bool "Use I-Cache"
+	default n
+	depends on ARMV7R_HAVE_ICACHE
+
+config ARMV7R_DCACHE
+	bool "Use D-Cache"
+	default n
+	depends on ARMV7R_HAVE_DCACHE
+
+config ARMV7R_DCACHE_WRITETHROUGH
+	bool "D-Cache Write-Through"
+	default n
+	depends on ARMV7R_DCACHE
+
 config ARMV7R_HAVE_L2CC
 	bool
 	default n
@@ -121,15 +144,17 @@ endif # ARMV7R_HAVE_L2CC
 
 choice
 	prompt "Toolchain Selection"
-	default ARMV7R_TOOLCHAIN_GNU_EABIW if HOST_WINDOWS
-	default ARMV7R_TOOLCHAIN_GNU_EABIL if !HOST_WINDOWS
+	default ARMV7R_TOOLCHAIN_GNU_EABIW if TOOLCHAIN_WINDOWS
+	default ARMV7R_TOOLCHAIN_GNU_EABIL if !TOOLCHAIN_WINDOWS
 
 config ARMV7R_TOOLCHAIN_BUILDROOT
 	bool "Buildroot (Cygwin or Linux)"
+	select ARM_TOOLCHAIN_GNU
 	depends on !WINDOWS_NATIVE
 
 config ARMV7R_TOOLCHAIN_CODESOURCERYL
 	bool "CodeSourcery GNU toolchain under Linux"
+	select ARM_TOOLCHAIN_GNU
 	depends on HOST_LINUX
 	---help---
 		For use with the GNU toolchain built with the NuttX buildroot package.
@@ -138,31 +163,36 @@ config ARMV7R_TOOLCHAIN_CODESOURCERYL
 
 config ARMV7R_TOOLCHAIN_CODESOURCERYW
 	bool "CodeSourcery GNU toolchain under Windows"
-	depends on HOST_WINDOWS
+	select ARM_TOOLCHAIN_GNU
+	depends on TOOLCHAIN_WINDOWS
 
 config ARMV7R_TOOLCHAIN_DEVKITARM
 	bool "devkitARM GNU toolchain"
-	depends on HOST_WINDOWS
+	select ARM_TOOLCHAIN_GNU
+	depends on TOOLCHAIN_WINDOWS
 
 config ARMV7R_TOOLCHAIN_GNU_EABIL
 	bool "Generic GNU EABI toolchain under Linux (or other POSIX environment)"
+	select ARM_TOOLCHAIN_GNU
 	---help---
 		This option should work for any modern GNU toolchain (GCC 4.5 or newer)
 		configured for arm-none-eabi-.
 
 config ARMV7R_TOOLCHAIN_GNU_EABIW
 	bool "Generic GNU EABI toolchain under Windows"
-	depends on HOST_WINDOWS
+	select ARM_TOOLCHAIN_GNU
+	depends on TOOLCHAIN_WINDOWS
 	---help---
 		This option should work for any modern GNU toolchain (GCC 4.5 or newer)
 		configured for arm-none-eabi-.
 
 config ARMV7R_TOOLCHAIN_GNU_OABI
 	bool "Generic GNU OABI toolchain"
+	select ARM_TOOLCHAIN_GNU
 	---help---
 		This option should work for any GNU toolchain configured for arm-elf-.
 
-endchoice # ARMV7R_HAVE_L2CC
+endchoice # Toolchain Selection
 
 config ARMV7R_OABI_TOOLCHAIN
 	bool "OABI (vs EABI)"
diff --git a/arch/arm/src/armv7-r/arm_assert.c b/arch/arm/src/armv7-r/arm_assert.c
index 11dd9fad09be9e339bb896a1767a819ff7e0583a..b841416450be9d4b20e612b6d2fea91c4d305c6a 100644
--- a/arch/arm/src/armv7-r/arm_assert.c
+++ b/arch/arm/src/armv7-r/arm_assert.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/armv7-r/arm_assert.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 #include 
@@ -69,25 +58,13 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
 /* USB trace dumping */
 
 #ifndef CONFIG_USBDEV_TRACE
 #  undef CONFIG_ARCH_USBDUMP
 #endif
 
-/* The following is just intended to keep some ugliness out of the mainline
- * code.  We are going to print the task name if:
- *
- *  CONFIG_TASK_NAME_SIZE > 0 &&    <-- The task has a name
- *  (defined(CONFIG_DEBUG)    ||    <-- And the debug is enabled (lldbg used)
- *   defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
- */
-
-#undef CONFIG_PRINT_TASKNAME
-#if CONFIG_TASK_NAME_SIZE > 0 && (defined(CONFIG_DEBUG) || defined(CONFIG_ARCH_STACKDUMP))
-#  define CONFIG_PRINT_TASKNAME 1
-#endif
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -121,7 +98,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
   for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
     {
       uint32_t *ptr = (uint32_t *)stack;
-      lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+      _alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
              stack, ptr[0], ptr[1], ptr[2], ptr[3],
              ptr[4], ptr[5], ptr[6], ptr[7]);
     }
@@ -139,12 +116,12 @@ static void up_taskdump(FAR struct tcb_s *tcb, FAR void *arg)
 {
   /* Dump interesting properties of this task */
 
-#ifdef CONFIG_PRINT_TASKNAME
-  lldbg("%s: PID=%d Stack Used=%lu of %lu\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+  _alert("%s: PID=%d Stack Used=%lu of %lu\n",
         tcb->name, tcb->pid, (unsigned long)up_check_tcbstack(tcb),
         (unsigned long)tcb->adj_stack_size);
 #else
-  lldbg("PID: %d Stack Used=%lu of %lu\n",
+  _alert("PID: %d Stack Used=%lu of %lu\n",
         tcb->pid, (unsigned long)up_check_tcbstack(tcb),
         (unsigned long)tcb->adj_stack_size);
 #endif
@@ -184,12 +161,12 @@ static inline void up_registerdump(void)
       for (regs = REG_R0; regs <= REG_R15; regs += 8)
         {
           uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs];
-          lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+          _alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
                  regs, ptr[0], ptr[1], ptr[2], ptr[3],
                  ptr[4], ptr[5], ptr[6], ptr[7]);
         }
 
-      lldbg("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
+      _alert("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
     }
 }
 #else
@@ -209,7 +186,7 @@ static int usbtrace_syslog(FAR const char *fmt, ...)
   /* Let vsyslog do the real work */
 
   va_start(ap, fmt);
-  ret = lowvsyslog(LOG_INFO, fmt, ap);
+  ret = vsyslog(LOG_EMERG, fmt, ap);
   va_end(ap);
   return ret;
 }
@@ -253,7 +230,7 @@ static void up_dumpstate(void)
       ustacksize = (uint32_t)rtcb->adj_stack_size;
     }
 
-  lldbg("Current sp: %08x\n", sp);
+  _alert("Current sp: %08x\n", sp);
 
 #if CONFIG_ARCH_INTERRUPTSTACK > 3
   /* Get the limits on the interrupt stack memory */
@@ -263,21 +240,21 @@ static void up_dumpstate(void)
 
   /* Show interrupt stack info */
 
-  lldbg("Interrupt stack:\n");
-  lldbg("  base: %08x\n", istackbase);
-  lldbg("  size: %08x\n", istacksize);
+  _alert("Interrupt stack:\n");
+  _alert("  base: %08x\n", istackbase);
+  _alert("  size: %08x\n", istacksize);
 #ifdef CONFIG_STACK_COLORATION
-  lldbg("  used: %08x\n", up_check_intstack());
+  _alert("  used: %08x\n", up_check_intstack());
 #endif
 #endif
 
   /* Show user stack info */
 
-  lldbg("User stack:\n");
-  lldbg("  base: %08x\n", ustackbase);
-  lldbg("  size: %08x\n", ustacksize);
+  _alert("User stack:\n");
+  _alert("  base: %08x\n", ustackbase);
+  _alert("  size: %08x\n", ustacksize);
 #ifdef CONFIG_STACK_COLORATION
-  lldbg("  used: %08x\n", up_check_tcbstack(rtcb));
+  _alert("  used: %08x\n", up_check_tcbstack(rtcb));
 #endif
 
 #ifdef CONFIG_ARCH_KERNEL_STACK
@@ -287,9 +264,9 @@ static void up_dumpstate(void)
     {
       kstackbase = (uint32_t)rtcb->xcp.kstack + CONFIG_ARCH_KERNEL_STACKSIZE - 4;
 
-      lldbg("Kernel stack:\n");
-      lldbg("  base: %08x\n", kstackbase);
-      lldbg("  size: %08x\n", CONFIG_ARCH_KERNEL_STACKSIZE);
+      _alert("Kernel stack:\n");
+      _alert("  base: %08x\n", kstackbase);
+      _alert("  size: %08x\n", CONFIG_ARCH_KERNEL_STACKSIZE);
     }
 #endif
 
@@ -300,7 +277,7 @@ static void up_dumpstate(void)
     {
       /* Yes.. dump the interrupt stack */
 
-      lldbg("Interrupt Stack\n", sp);
+      _alert("Interrupt Stack\n", sp);
       up_stackdump(sp, istackbase);
 
       /* Extract the user stack pointer which should lie
@@ -308,7 +285,7 @@ static void up_dumpstate(void)
        */
 
       sp = g_intstackbase;
-      lldbg("User sp: %08x\n", sp);
+      _alert("User sp: %08x\n", sp);
     }
 #endif
 
@@ -318,7 +295,7 @@ static void up_dumpstate(void)
 
   if (sp > ustackbase - ustacksize && sp < ustackbase)
     {
-      lldbg("User Stack\n", sp);
+      _alert("User Stack\n", sp);
       up_stackdump(sp, ustackbase);
     }
 
@@ -329,7 +306,7 @@ static void up_dumpstate(void)
 
   if (sp >= (uint32_t)rtcb->xcp.kstack && sp < kstackbase)
     {
-      lldbg("Kernel Stack\n", sp);
+      _alert("Kernel Stack\n", sp);
       up_stackdump(sp, kstackbase);
     }
 #endif
@@ -390,16 +367,16 @@ static void _up_assert(int errorcode)
 
 void up_assert(const uint8_t *filename, int lineno)
 {
-#ifdef CONFIG_PRINT_TASKNAME
+#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
   struct tcb_s *rtcb = this_task();
 #endif
   board_autoled_on(LED_ASSERTION);
 
-#ifdef CONFIG_PRINT_TASKNAME
-  lldbg("Assertion failed at file:%s line: %d task: %s\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+  _alert("Assertion failed at file:%s line: %d task: %s\n",
         filename, lineno, rtcb->name);
 #else
-  lldbg("Assertion failed at file:%s line: %d\n",
+  _alert("Assertion failed at file:%s line: %d\n",
         filename, lineno);
 #endif
   up_dumpstate();
diff --git a/arch/arm/src/armv7-r/arm_dataabort.c b/arch/arm/src/armv7-r/arm_dataabort.c
index 789fb0f5adae6e62bc6be4e1b919da3f9b56abcc..52f5d124365dbe84f502b6f133721e76e174faa2 100644
--- a/arch/arm/src/armv7-r/arm_dataabort.c
+++ b/arch/arm/src/armv7-r/arm_dataabort.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/armv7-r/arm_dataabort.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 
@@ -86,7 +75,7 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
 
   /* Crash -- possibly showing diagnostic debug information. */
 
-  lldbg("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
+  _alert("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
         regs[REG_PC], dfar, dfsr);
   PANIC();
   return regs; /* To keep the compiler happy */
diff --git a/arch/arm/src/armv7-r/arm_doirq.c b/arch/arm/src/armv7-r/arm_doirq.c
index fdf392d3384d5ceab1b845f49c83b511221c0032..5d492f5ddc7efb134a332b74f2c98a712def7ec9 100644
--- a/arch/arm/src/armv7-r/arm_doirq.c
+++ b/arch/arm/src/armv7-r/arm_doirq.c
@@ -52,22 +52,6 @@
 
 #include "group/group.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_fullcontextrestore.S b/arch/arm/src/armv7-r/arm_fullcontextrestore.S
index 9f197063b27de976981cef4065527029a2b2d1cb..06daa2218262b5b223219b0f85450e505786911e 100644
--- a/arch/arm/src/armv7-r/arm_fullcontextrestore.S
+++ b/arch/arm/src/armv7-r/arm_fullcontextrestore.S
@@ -60,7 +60,6 @@
 	.cpu	cortex-r4f
 #endif
 	.syntax	unified
-	.file	"arm_fullcontextrestore.S"
 
 /****************************************************************************
  * Public Functions
@@ -157,20 +156,11 @@ up_fullcontextrestore:
 	 */
 
 	ldr		r1, [r0, #(4*REG_CPSR)]	/* Fetch the stored CPSR value */
-	msr		cpsr, r1				/* Set the CPSR */
-
-	/* Now recover r0 and r1 */
-
-	ldr		r0, [sp]
-	ldr		r1, [sp, #4]
-	add		sp, sp, #(2*4)
-
-	/* Then return to the address at the stop of the stack,
-	 * destroying the stack frame
-	 */
+	msr		spsr_cxsf, r1				/* Set the SPSR */
 
-	ldr		pc, [sp], #4
+	/* Now recover r0-r1, pc and cpsr, destroying the stack frame */
 
+	ldmia		sp!, {r0-r1, pc}^
 #endif
 
 	.size up_fullcontextrestore, . - up_fullcontextrestore
diff --git a/arch/arm/src/armv7-r/arm_l2cc_pl310.c b/arch/arm/src/armv7-r/arm_l2cc_pl310.c
index e019e70e95f2e95d4a1581da09d3f350585c29d1..18c3d224a2c6cbfb6e10d62007f55c42f3c0709f 100644
--- a/arch/arm/src/armv7-r/arm_l2cc_pl310.c
+++ b/arch/arm/src/armv7-r/arm_l2cc_pl310.c
@@ -411,8 +411,8 @@ void up_l2ccinitialize(void)
       putreg32(L2CC_CR_L2CEN, L2CC_CR);
     }
 
-  lldbg("(%d ways) * (%d bytes/way) = %d bytes\n",
-        PL310_NWAYS, PL310_WAYSIZE, PL310_CACHE_SIZE);
+  sinfo("(%d ways) * (%d bytes/way) = %d bytes\n",
+          PL310_NWAYS, PL310_WAYSIZE, PL310_CACHE_SIZE);
 }
 
 /****************************************************************************
diff --git a/arch/arm/src/armv7-r/arm_prefetchabort.c b/arch/arm/src/armv7-r/arm_prefetchabort.c
index bf16d194676ce28f4402db9c4330a28c73c90c6a..74713f5ad3eae3be527be24885bab7aaea3df460 100644
--- a/arch/arm/src/armv7-r/arm_prefetchabort.c
+++ b/arch/arm/src/armv7-r/arm_prefetchabort.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  *  arch/arm/src/armv7-r/arm_prefetchabort.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 
@@ -82,7 +71,7 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
 
   /* Crash -- possibly showing diagnostic debug information. */
 
-  lldbg("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
+  _alert("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
         regs[REG_PC], ifar, ifsr);
   PANIC();
   return regs; /* To keep the compiler happy */
diff --git a/arch/arm/src/armv7-r/arm_releasepending.c b/arch/arm/src/armv7-r/arm_releasepending.c
index 89827085907498d7edaab83db8dd1fab47e3c817..a66de941356278880015b60eeeec25132b261cdf 100644
--- a/arch/arm/src/armv7-r/arm_releasepending.c
+++ b/arch/arm/src/armv7-r/arm_releasepending.c
@@ -67,7 +67,7 @@ void up_release_pending(void)
 {
   struct tcb_s *rtcb = this_task();
 
-  slldbg("From TCB=%p\n", rtcb);
+  sinfo("From TCB=%p\n", rtcb);
 
   /* Merge the g_pendingtasks list into the ready-to-run task list */
 
diff --git a/arch/arm/src/armv7-r/arm_reprioritizertr.c b/arch/arm/src/armv7-r/arm_reprioritizertr.c
index 4fed13e8f272ca7b43fd90e1e65109e3bc18ae63..db96424eb2f4d6042c672334f327784d4fcecbee 100644
--- a/arch/arm/src/armv7-r/arm_reprioritizertr.c
+++ b/arch/arm/src/armv7-r/arm_reprioritizertr.c
@@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
       struct tcb_s *rtcb = this_task();
       bool switch_needed;
 
-      slldbg("TCB=%p PRI=%d\n", tcb, priority);
+      sinfo("TCB=%p PRI=%d\n", tcb, priority);
 
       /* Remove the tcb task from the ready-to-run list.
        * sched_removereadytorun will return true if we just
diff --git a/arch/arm/src/armv7-r/arm_schedulesigaction.c b/arch/arm/src/armv7-r/arm_schedulesigaction.c
index 692debff2f0590db39b0d6d12d8c716cdf210c9f..a51d660cb4c686297671874d892868d1d91d266d 100644
--- a/arch/arm/src/armv7-r/arm_schedulesigaction.c
+++ b/arch/arm/src/armv7-r/arm_schedulesigaction.c
@@ -94,7 +94,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
 {
   irqstate_t flags;
 
-  sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+  sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
 
   /* Make sure that interrupts are disabled */
 
@@ -108,7 +108,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
        * to the currently executing task.
        */
 
-      sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
+      sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
 
       if (tcb == this_task())
         {
diff --git a/arch/arm/src/armv7-r/arm_sigdeliver.c b/arch/arm/src/armv7-r/arm_sigdeliver.c
index f638b35bfd64aec670f86dca54c1a23ebe4ad4c3..280a5ef9c71b0bb360fc444edb21675d85c72eab 100644
--- a/arch/arm/src/armv7-r/arm_sigdeliver.c
+++ b/arch/arm/src/armv7-r/arm_sigdeliver.c
@@ -83,7 +83,7 @@ void up_sigdeliver(void)
 
   board_autoled_on(LED_SIGNAL);
 
-  sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
         rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
   ASSERT(rtcb->xcp.sigdeliver != NULL);
 
@@ -114,7 +114,7 @@ void up_sigdeliver(void)
    * errno that is needed by the user logic (it is probably EINTR).
    */
 
-  sdbg("Resuming\n");
+  sinfo("Resuming\n");
   (void)up_irq_save();
   rtcb->pterrno = saved_errno;
 
diff --git a/arch/arm/src/armv7-r/arm_syscall.c b/arch/arm/src/armv7-r/arm_syscall.c
index 3e41a3484344f1dafbbfa8258f892f3986c125b8..49290d5509ef138578d1f52f66b62982f21f17cf 100644
--- a/arch/arm/src/armv7-r/arm_syscall.c
+++ b/arch/arm/src/armv7-r/arm_syscall.c
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 #include 
@@ -64,18 +53,7 @@
 #include "up_internal.h"
 
 /****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-/* Debug ********************************************************************/
-
-#if defined(CONFIG_DEBUG_SYSCALL)
-# define svcdbg(format, ...) lldbg(format, ##__VA_ARGS__)
-#else
-# define svcdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
@@ -176,16 +154,14 @@ uint32_t *arm_syscall(uint32_t *regs)
    * and R1..R7 =  variable number of arguments depending on the system call.
    */
 
-#if defined(CONFIG_DEBUG_SYSCALL)
-  svcdbg("SYSCALL Entry: regs: %p cmd: %d\n", regs, cmd);
-  svcdbg("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-         regs[REG_R0],  regs[REG_R1],  regs[REG_R2],  regs[REG_R3],
-         regs[REG_R4],  regs[REG_R5],  regs[REG_R6],  regs[REG_R7]);
-  svcdbg("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-         regs[REG_R8],  regs[REG_R9],  regs[REG_R10], regs[REG_R11],
-         regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
-  svcdbg("CPSR: %08x\n", regs[REG_CPSR]);
-#endif
+  svcinfo("SYSCALL Entry: regs: %p cmd: %d\n", regs, cmd);
+  svcinfo("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+          regs[REG_R0],  regs[REG_R1],  regs[REG_R2],  regs[REG_R3],
+          regs[REG_R4],  regs[REG_R5],  regs[REG_R6],  regs[REG_R7]);
+  svcinfo("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+          regs[REG_R8],  regs[REG_R9],  regs[REG_R10], regs[REG_R11],
+          regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
+  svcinfo("CPSR: %08x\n", regs[REG_CPSR]);
 
   /* Handle the SVCall according to the command in R0 */
 
@@ -478,7 +454,7 @@ uint32_t *arm_syscall(uint32_t *regs)
 
           regs[REG_R0] -= CONFIG_SYS_RESERVED;
 #else
-          svcdbg("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
+          svcerr("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
 #endif
 
 #ifdef CONFIG_ARCH_KERNEL_STACK
@@ -499,18 +475,16 @@ uint32_t *arm_syscall(uint32_t *regs)
         break;
     }
 
-#if defined(CONFIG_DEBUG_SYSCALL)
   /* Report what happened */
 
-  svcdbg("SYSCALL Exit: regs: %p\n", regs);
-  svcdbg("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-         regs[REG_R0],  regs[REG_R1],  regs[REG_R2],  regs[REG_R3],
-         regs[REG_R4],  regs[REG_R5],  regs[REG_R6],  regs[REG_R7]);
-  svcdbg("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-         regs[REG_R8],  regs[REG_R9],  regs[REG_R10], regs[REG_R11],
-         regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
-  svcdbg("CPSR: %08x\n", regs[REG_CPSR]);
-#endif
+  svcinfo("SYSCALL Exit: regs: %p\n", regs);
+  svcinfo("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+          regs[REG_R0],  regs[REG_R1],  regs[REG_R2],  regs[REG_R3],
+          regs[REG_R4],  regs[REG_R5],  regs[REG_R6],  regs[REG_R7]);
+  svcinfo("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+          regs[REG_R8],  regs[REG_R9],  regs[REG_R10], regs[REG_R11],
+          regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
+  svcinfo("CPSR: %08x\n", regs[REG_CPSR]);
 
   /* Return the last value of curent_regs.  This supports context switches
    * on return from the exception.  That capability is only used with the
@@ -524,7 +498,7 @@ uint32_t *arm_syscall(uint32_t *regs)
 
 uint32_t *arm_syscall(uint32_t *regs)
 {
-  lldbg("SYSCALL from 0x%x\n", regs[REG_PC]);
+  _alert("SYSCALL from 0x%x\n", regs[REG_PC]);
   CURRENT_REGS = regs;
   PANIC();
 }
diff --git a/arch/arm/src/armv7-r/arm_testset.S b/arch/arm/src/armv7-r/arm_testset.S
index 7cd741fed734dfe86cd9b803306c74fc09973435..f82837d5fe8f688779b5620a0ad03fa029631071 100644
--- a/arch/arm/src/armv7-r/arm_testset.S
+++ b/arch/arm/src/armv7-r/arm_testset.S
@@ -70,7 +70,7 @@
  * Name: up_testset
  *
  * Description:
- *   Perform and atomic test and set operation on the provided spinlock.
+ *   Perform an atomic test and set operation on the provided spinlock.
  *
  *   This function must be provided via the architecture-specific logoic.
  *
diff --git a/arch/arm/src/armv7-r/arm_undefinedinsn.c b/arch/arm/src/armv7-r/arm_undefinedinsn.c
index b1db4f88686c6f35d98ef625c8e3a50a1b4af2dc..733fb06cb2b4ec245e40aa0fcf3e96ab73a5f5bc 100644
--- a/arch/arm/src/armv7-r/arm_undefinedinsn.c
+++ b/arch/arm/src/armv7-r/arm_undefinedinsn.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/armv7-r/arm_undefinedinsn.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 #include 
@@ -58,18 +47,6 @@
 
 #include "up_internal.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -80,7 +57,7 @@
 
 uint32_t *arm_undefinedinsn(uint32_t *regs)
 {
-  lldbg("Undefined instruction at 0x%x\n", regs[REG_PC]);
+  _alert("Undefined instruction at 0x%x\n", regs[REG_PC]);
   CURRENT_REGS = regs;
   PANIC();
   return regs; /* To keep the compiler happy */
diff --git a/arch/arm/src/armv7-r/arm_vectors.S b/arch/arm/src/armv7-r/arm_vectors.S
index 216633e3a36f47d7c16ca8ae23af25aec2bd5bd8..bea7c927bcebf14c8e4aee423be394ccb3b58870 100644
--- a/arch/arm/src/armv7-r/arm_vectors.S
+++ b/arch/arm/src/armv7-r/arm_vectors.S
@@ -202,7 +202,7 @@ arm_vectorirq:
 	/* Restore the CPSR, SVC mode registers and return */
 
 	ldr		r1, [r0, #(4*REG_CPSR)]	/* Fetch the return SPSR */
-	msr		spsr, r1				/* Set the return mode SPSR */
+	msr		spsr_cxsf, r1			/* Set the return mode SPSR */
 
 #ifdef CONFIG_BUILD_PROTECTED
 	/* Are we leaving in user mode?  If so then we need to restore the
@@ -331,7 +331,7 @@ arm_vectorsvc:
 	/* Restore the CPSR, SVC mode registers and return */
 
 	ldr		r1, [r0, #(4*REG_CPSR)]	/* Fetch the return SPSR */
-	msr		spsr, r1				/* Set the return mode SPSR */
+	msr		spsr_cxsf, r1			/* Set the return mode SPSR */
 
 #ifdef CONFIG_BUILD_PROTECTED
 	/* Are we leaving in user mode?  If so then we need to restore the
@@ -913,7 +913,7 @@ arm_vectorfiq:
 	/* Restore the CPSR, SVC mode registers and return */
 
 	ldr		r1, [r0, #(4*REG_CPSR)]	/* Fetch the return SPSR */
-	msr		spsr, r1				/* Set the return mode SPSR */
+	msr		spsr_cxsf, r1			/* Set the return mode SPSR */
 
 #ifdef CONFIG_BUILD_PROTECTED
 	/* Are we leaving in user mode?  If so then we need to restore the
diff --git a/arch/arm/src/armv7-r/cache.h b/arch/arm/src/armv7-r/cache.h
index 2c60fe2c3d62d266e01506c6473f4473609efb42..721f40313f29236c6ffcc0b7d0f10ec304129ccf 100644
--- a/arch/arm/src/armv7-r/cache.h
+++ b/arch/arm/src/armv7-r/cache.h
@@ -43,6 +43,7 @@
 #include 
 #include 
 
+#include "sctlr.h"
 #include "cp15_cacheops.h"
 #include "l2cc.h"
 
@@ -50,7 +51,17 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
- /************************************************************************************
+/* Intrinsics are used in these inline functions */
+
+#define arm_isb(n) __asm__ __volatile__ ("isb " #n : : : "memory")
+#define arm_dsb(n) __asm__ __volatile__ ("dsb " #n : : : "memory")
+#define arm_dmb(n) __asm__ __volatile__ ("dmb " #n : : : "memory")
+
+#define ARM_DSB()  arm_dsb(15)
+#define ARM_ISB()  arm_isb(15)
+#define ARM_DMB()  arm_dmb(15)
+
+/************************************************************************************
  * Inline Functions
  ************************************************************************************/
 
@@ -183,6 +194,70 @@ static inline void arch_flush_dcache(uintptr_t start, uintptr_t end)
   l2cc_flush(start, end);
 }
 
+/****************************************************************************
+ * Name: arch_enable_icache
+ *
+ * Description:
+ *   Enable the I-Cache
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static inline void arch_enable_icache(void)
+{
+#ifdef CONFIG_ARMV7R_ICACHE
+  uint32_t regval;
+
+  ARM_DSB();
+  ARM_ISB();
+
+  /* Enable the I-Cache */
+
+  regval = cp15_rdsctlr();
+  if ((regval & SCTLR_I) == 0)
+    {
+      cp15_wrsctlr(regval | SCTLR_I);
+    }
+
+  ARM_DSB();
+  ARM_ISB();
+#endif
+}
+
+/****************************************************************************
+* Name: arch_enable_dcache
+*
+* Description:
+*   Enable the D-Cache
+*
+* Input Parameters:
+*   None
+*
+* Returned Value:
+*   None
+*
+****************************************************************************/
+
+static inline void arch_enable_dcache(void)
+{
+#ifdef CONFIG_ARMV7R_DCACHE
+  uint32_t regval;
+
+  /* Enable the D-Cache */
+
+  regval = cp15_rdsctlr();
+  if ((regval & SCTLR_C) == 0)
+    {
+      cp15_wrsctlr(regval | SCTLR_C);
+    }
+#endif
+}
+
 /****************************************************************************
  * Public Data
  ****************************************************************************/
diff --git a/arch/arm/src/armv7-r/cp15_coherent_dcache.S b/arch/arm/src/armv7-r/cp15_coherent_dcache.S
index fa8b728f28713a874fa8858e7fb5f183d134103d..beecbd9733dbe15260cdddbd2854c7e1e270cca8 100644
--- a/arch/arm/src/armv7-r/cp15_coherent_dcache.S
+++ b/arch/arm/src/armv7-r/cp15_coherent_dcache.S
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/armv7-r/cp15_coherent_dcache.S
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * References:
@@ -93,7 +93,7 @@
 	.type	cp15_coherent_dcache, function
 
 cp15_coherent_dcache:
-	mrc		CP15_CTR(r3)				/* Read the Cache Type Register */
+	mrc		CP15_CTR(r3)			/* Read the Cache Type Register */
 	lsr		r3, r3, #16				/* Isolate the DMinLine field */
 	and		r3, r3, #0xf
 	mov		r2, #4
@@ -111,7 +111,7 @@ cp15_coherent_dcache:
 
 	dsb
 
-	mrc		CP15_CTR(r3)				/* Read the Cache Type Register */
+	mrc		CP15_CTR(r3)			/* Read the Cache Type Register */
 	and		r3, r3, #0xf			/* Isolate the IminLine field */
 	mov		r2, #4
 	mov		r2, r2, lsl r3			/* Get the cache line size in bytes */
@@ -127,8 +127,10 @@ cp15_coherent_dcache:
 	blo		1b
 
 	mov		r0, #0
+#ifdef CONFIG_SMP
 	mcr		CP15_BPIALLIS(r0)		/* Invalidate entire branch predictor array Inner Shareable */
-	mcr		CP15_BPIALL(r0)			/* Invalidate entire branch predictor array Inner Shareable */
+#endif
+	mcr		CP15_BPIALL(r0)			/* Invalidate all branch predictors */
 
 	dsb
 	isb
diff --git a/arch/arm/src/armv7-r/mpu.h b/arch/arm/src/armv7-r/mpu.h
index 67aeb2e94a240db6b6f00282643b4590dca98065..7c1a201567db5188478ece9a7d3bce27a3dc62bc 100644
--- a/arch/arm/src/armv7-r/mpu.h
+++ b/arch/arm/src/armv7-r/mpu.h
@@ -49,6 +49,8 @@
 #  include 
 
 #  include "up_arch.h"
+#  include "cache.h"
+#  include "sctlr.h"
 #  include "cp15.h"
 #endif
 
@@ -66,7 +68,7 @@
 
 /* Region Base Address Register Definitions */
 
-#define MPU_RBAR_MASK            0xfffffffc
+#define MPU_RBAR_ADDR_MASK       0xfffffffc
 
 /* Region Size and Enable Register */
 
@@ -201,7 +203,7 @@ static inline unsigned int mpu_get_mpuir(void)
   unsigned int mpuir;
   __asm__ __volatile__
     (
-      "\tmrc " CP15_MPUIR(%0)
+      "\tmrc p15, 0, %0, c0, c0, 4"
       : "=r" (mpuir)
       :
       : "memory"
@@ -222,7 +224,7 @@ static inline void mpu_set_drbar(unsigned int drbar)
 {
   __asm__ __volatile__
     (
-      "\tmcr " CP15_DRBAR(%0)
+      "\tmcr p15, 0, %0, c6, c1, 0"
       :
       : "r" (drbar)
       : "memory"
@@ -241,7 +243,7 @@ static inline void mpu_set_drsr(unsigned int drsr)
 {
   __asm__ __volatile__
     (
-      "\tmcr " CP15_DRSR(%0)
+      "\tmcr p15, 0, %0, c6, c1, 2"
       :
       : "r" (drsr)
       : "memory"
@@ -260,7 +262,7 @@ static inline void mpu_set_dracr(unsigned int dracr)
 {
   __asm__ __volatile__
     (
-      "\tmcr " CP15_DRACR(%0)
+      "\tmcr p15, 0, %0, c6, c1, 4"
       :
       : "r" (dracr)
       : "memory"
@@ -280,7 +282,7 @@ static inline void mpu_set_irbar(unsigned int irbar)
 {
   __asm__ __volatile__
     (
-      "\tmcr " CP15_IRBAR(%0)
+      "\tmcr p15, 0, %0, c6, c1, 1"
       :
       : "r" (irbar)
       : "memory"
@@ -301,7 +303,7 @@ static inline void mpu_set_irsr(unsigned int irsr)
 {
   __asm__ __volatile__
     (
-      "\tmcr " CP15_IRSR(%0)
+      "\tmcr p15, 0, %0, c6, c1, 3"
       :
       : "r" (irsr)
       : "memory"
@@ -322,7 +324,7 @@ static inline void mpu_set_iracr(unsigned int iracr)
 {
   __asm__ __volatile__
     (
-      "\tmcr " CP15_IRACR(%0)
+      "\tmcr p15, 0, %0, c6, c1, 5"
       :
       : "r" (iracr)
       : "memory"
@@ -342,7 +344,7 @@ static inline void mpu_set_rgnr(unsigned int rgnr)
 {
   __asm__ __volatile__
     (
-      "\tmcr " CP15_RGNR(%0)
+      "\tmcr p15, 0, %0, c6, c2, 0"
       :
       : "r" (rgnr)
       : "memory"
@@ -359,12 +361,12 @@ static inline void mpu_set_rgnr(unsigned int rgnr)
 
 static inline void mpu_showtype(void)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_SCHED_INFO
   uint32_t regval = mpu_get_mpuir();
-  dbg("%s MPU Regions: data=%d instr=%d\n",
-      (regval & MPUIR_SEPARATE) != 0 ? "Separate" : "Unified",
-      (regval & MPUIR_DREGION_MASK) >> MPUIR_DREGION_SHIFT,
-      (regval & MPUIR_IREGION_MASK) >> MPUIR_IREGION_SHIFT);
+  sinfo("%s MPU Regions: data=%d instr=%d\n",
+        (regval & MPUIR_SEPARATE) != 0 ? "Separate" : "Unified",
+        (regval & MPUIR_DREGION_MASK) >> MPUIR_DREGION_SHIFT,
+        (regval & MPUIR_IREGION_MASK) >> MPUIR_IREGION_SHIFT);
 #endif
 }
 
@@ -390,7 +392,6 @@ static inline void mpu_control(bool enable)
   if (enable)
     {
       regval |= (SCTLR_M | SCTLR_BR);
-      cp15_wrsctlr(regval);
     }
   else
     {
@@ -408,7 +409,7 @@ static inline void mpu_control(bool enable)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_ARMV7M_HAVE_ICACHE) || defined(CONFIG_ARMV7M_DCACHE)
+#if defined(CONFIG_ARMV7R_HAVE_ICACHE) || defined(CONFIG_ARMV7R_DCACHE)
 static inline void mpu_priv_stronglyordered(uintptr_t base, size_t size)
 {
   unsigned int region = mpu_allocregion();
@@ -422,7 +423,7 @@ static inline void mpu_priv_stronglyordered(uintptr_t base, size_t size)
 
   /* Select the region base address */
 
-  mpu_set_drbar(base & MPU_RBAR_ADDR_MASK) | region | MPU_RBAR_VALID);
+  mpu_set_drbar(base & MPU_RBAR_ADDR_MASK);
 
   /* Select the region size and the sub-region map */
 
@@ -465,7 +466,7 @@ static inline void mpu_user_flash(uintptr_t base, size_t size)
 
   /* Select the region base address */
 
-  mpu_set_drbar((base & MPU_RBAR_ADDR_MASK) | region);
+  mpu_set_drbar(base & MPU_RBAR_ADDR_MASK);
 
   /* Select the region size and the sub-region map */
 
@@ -506,7 +507,7 @@ static inline void mpu_priv_flash(uintptr_t base, size_t size)
 
   /* Select the region base address */
 
-  mpu_set_drbar((base & MPU_RBAR_ADDR_MASK) | region);
+  mpu_set_drbar(base & MPU_RBAR_ADDR_MASK);
 
   /* Select the region size and the sub-region map */
 
@@ -546,7 +547,7 @@ static inline void mpu_user_intsram(uintptr_t base, size_t size)
 
   /* Select the region base address */
 
-  mpu_set_drbar((base & MPU_RBAR_ADDR_MASK) | region);
+  mpu_set_drbar(base & MPU_RBAR_ADDR_MASK);
 
   /* Select the region size and the sub-region map */
 
@@ -587,7 +588,7 @@ static inline void mpu_priv_intsram(uintptr_t base, size_t size)
 
   /* Select the region base address */
 
-  mpu_set_drbar((base & MPU_RBAR_ADDR_MASK) | region);
+  mpu_set_drbar(base & MPU_RBAR_ADDR_MASK);
 
   /* Select the region size and the sub-region map */
 
@@ -628,7 +629,7 @@ static inline void mpu_user_extsram(uintptr_t base, size_t size)
 
   /* Select the region base address */
 
-  mpu_set_drbar((base & MPU_RBAR_ADDR_MASK) | region);
+  mpu_set_drbar(base & MPU_RBAR_ADDR_MASK);
 
   /* Select the region size and the sub-region map */
 
@@ -670,7 +671,7 @@ static inline void mpu_priv_extsram(uintptr_t base, size_t size)
 
   /* Select the region base address */
 
-  mpu_set_drbar((base & MPU_RBAR_ADDR_MASK) | region);
+  mpu_set_drbar(base & MPU_RBAR_ADDR_MASK);
 
   /* Select the region size and the sub-region map */
 
@@ -712,7 +713,7 @@ static inline void mpu_peripheral(uintptr_t base, size_t size)
 
   /* Select the region base address */
 
-  mpu_set_drbar((base & MPU_RBAR_ADDR_MASK) | region);
+  mpu_set_drbar(base & MPU_RBAR_ADDR_MASK);
 
   /* Select the region size and the sub-region map */
 
diff --git a/arch/arm/src/c5471/Kconfig b/arch/arm/src/c5471/Kconfig
index 17b615a0973de6b10fe31faaecf11b7afd0054fc..5f46d7684a967f190b343a84a55c81e9e26fae08 100644
--- a/arch/arm/src/c5471/Kconfig
+++ b/arch/arm/src/c5471/Kconfig
@@ -110,3 +110,23 @@ config C5471_BASET10
 	bool "10BaseT FullDuplex"
 
 endchoice
+
+choice
+	prompt "Ethernet work queue"
+	default C5471_LPWORK if SCHED_LPWORK
+	default C5471_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the Ethernet driver.  If the
+		low priority work queue is available, then it should be used by the
+		driver.
+
+config C5471_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
+
+config C5471_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
+
+endchoice # Work queue
diff --git a/arch/arm/src/c5471/Make.defs b/arch/arm/src/c5471/Make.defs
index 92320e5d480af0fc2b7d5d84672d5c1b59e62daa..a0c3b9a5b399cad6adbf08f4eb37c0326bd212a9 100644
--- a/arch/arm/src/c5471/Make.defs
+++ b/arch/arm/src/c5471/Make.defs
@@ -45,12 +45,6 @@ CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c
 CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_syscall.c up_unblocktask.c
 CMN_CSRCS += up_undefinedinsn.c up_usestack.c up_vfork.c
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c
-endif
-
 ifeq ($(CONFIG_STACK_COLORATION),y)
 CMN_CSRCS += up_checkstack.c
 endif
diff --git a/arch/arm/src/c5471/c5471_ethernet.c b/arch/arm/src/c5471/c5471_ethernet.c
index 5d1ddb686322c6f2fb36a35b26aa9e3590f9278a..03ddbe33837179b224215d5e7b10c658beacfc6d 100644
--- a/arch/arm/src/c5471/c5471_ethernet.c
+++ b/arch/arm/src/c5471/c5471_ethernet.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/c5471/c5471_ethernet.c
  *
- *   Copyright (C) 2007, 2009-2010, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2009-2010, 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Based one a C5471 Linux driver and released under this BSD license with
@@ -59,6 +59,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -75,6 +76,25 @@
  ****************************************************************************/
 
 /* Configuration ************************************************************/
+/* If processing is not done at the interrupt level, then work queue support
+ * is required.
+ */
+
+#if !defined(CONFIG_SCHED_WORKQUEUE)
+#  error Work queue support is required in this configuration (CONFIG_SCHED_WORKQUEUE)
+#else
+
+  /* Use the low priority work queue if possible */
+
+#  if defined(CONFIG_C5471_HPWORK)
+#    define ETHWORK HPWORK
+#  elif defined(CONFIG_C5471_LPWORK)
+#    define ETHWORK LPWORK
+#  else
+#    error Neither CONFIG_C5471_HPWORK nor CONFIG_C5471_LPWORK defined
+#  endif
+#endif
+
 /* CONFIG_C5471_NET_NINTERFACES determines the number of physical interfaces
  * that will be supported.
  */
@@ -273,12 +293,16 @@
 
 /* This is a helper pointer for accessing the contents of the Ethernet header */
 
-#define BUF ((struct eth_hdr_s *)c5471->c_dev.d_buf)
+#define BUF ((struct eth_hdr_s *)priv->c_dev.d_buf)
 
 /****************************************************************************
  * Private Types
  ****************************************************************************/
 
+/* A single packet buffer is used */
+
+static uint8_t g_pktbuf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
+
 /* The c5471_driver_s encapsulates all state information for a single c5471
  * hardware interface
  */
@@ -288,6 +312,8 @@ struct c5471_driver_s
   bool    c_bifup;           /* true:ifup false:ifdown */
   WDOG_ID c_txpoll;          /* TX poll timer */
   WDOG_ID c_txtimeout;       /* TX timeout timer */
+  struct work_s c_irqwork;   /* For deferring interrupt work to the work queue */
+  struct work_s c_pollwork;  /* For deferring poll work to the work queue */
 
   /* Note: According to the C547x documentation: "The software has to maintain
    * two pointers to the current RX-CPU and TX-CPU descriptors. At init time,
@@ -356,36 +382,44 @@ static int  c5471_phyinit (void);
 
 /* Support logic */
 
-static inline void c5471_inctxcpu(struct c5471_driver_s *c5471);
-static inline void c5471_incrxcpu(struct c5471_driver_s *c5471);
+static inline void c5471_inctxcpu(struct c5471_driver_s *priv);
+static inline void c5471_incrxcpu(struct c5471_driver_s *priv);
 
 /* Common TX logic */
 
-static int  c5471_transmit(struct c5471_driver_s *c5471);
+static int  c5471_transmit(struct c5471_driver_s *priv);
 static int  c5471_txpoll(struct net_driver_s *dev);
 
 /* Interrupt handling */
 
 #ifdef CONFIG_C5471_NET_STATS
-static void c5471_rxstatus(struct c5471_driver_s *c5471);
+static void c5471_rxstatus(struct c5471_driver_s *priv);
 #endif
-static void c5471_receive(struct c5471_driver_s *c5471);
+static void c5471_receive(struct c5471_driver_s *priv);
 #ifdef CONFIG_C5471_NET_STATS
-static void c5471_txstatus(struct c5471_driver_s *c5471);
+static void c5471_txstatus(struct c5471_driver_s *priv);
 #endif
-static void c5471_txdone(struct c5471_driver_s *c5471);
-static int  c5471_interrupt(int irq, FAR void *context);
+static void c5471_txdone(struct c5471_driver_s *priv);
+
+static void c5471_interrupt_work(FAR void *arg);
+static int  c5471_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
-static void c5471_polltimer(int argc, uint32_t arg, ...);
-static void c5471_txtimeout(int argc, uint32_t arg, ...);
+static void c5471_txtimeout_work(FAR void *arg);
+static void c5471_txtimeout_expiry(int argc, uint32_t arg, ...);
+
+static void c5471_poll_work(FAR void *arg);
+static void c5471_poll_expiry(int argc, uint32_t arg, ...);
 
 /* NuttX callback functions */
 
 static int c5471_ifup(struct net_driver_s *dev);
 static int c5471_ifdown(struct net_driver_s *dev);
+
+static void c5471_txavail_work(FAR void *arg);
 static int c5471_txavail(struct net_driver_s *dev);
+
 #ifdef CONFIG_NET_IGMP
 static int c5471_addmac(struct net_driver_s *dev, FAR const uint8_t *mac);
 static int c5471_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac);
@@ -393,10 +427,10 @@ static int c5471_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac);
 
 /* Initialization functions */
 
-static void c5471_eimreset (struct c5471_driver_s *c5471);
-static void c5471_eimconfig(struct c5471_driver_s *c5471);
-static void c5471_reset(struct c5471_driver_s *c5471);
-static void c5471_macassign(struct c5471_driver_s *c5471);
+static void c5471_eimreset (struct c5471_driver_s *priv);
+static void c5471_eimconfig(struct c5471_driver_s *priv);
+static void c5471_reset(struct c5471_driver_s *priv);
+static void c5471_macassign(struct c5471_driver_s *priv);
 
 /****************************************************************************
  * Private Functions
@@ -411,13 +445,14 @@ static void c5471_macassign(struct c5471_driver_s *c5471);
  ****************************************************************************/
 
 #ifdef CONFIG_C5471_NET_DUMPBUFFER
-static inline void c5471_dumpbuffer(const char *msg, const uint8_t *buffer, unsigned int nbytes)
+static inline void c5471_dumpbuffer(const char *msg, const uint8_t *buffer,
+                                    unsigned int nbytes)
 {
-  /* CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, and CONFIG_DEBUG_NET have to be
+  /* CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO, and CONFIG_DEBUG_NET have to be
    * defined or the following does nothing.
    */
 
-  nvdbgdumpbuffer(msg, buffer, nbytes);
+  ninfodumpbuffer(msg, buffer, nbytes);
 }
 #else
 # define c5471_dumpbuffer(msg, buffer,nbytes)
@@ -737,22 +772,22 @@ static int c5471_phyinit (void)
   phyid = (c5471_mdread(0, MD_PHY_MSB_REG) << 16) | c5471_mdread(0, MD_PHY_LSB_REG);
   if (phyid != LU3X31_T64_PHYID)
     {
-      ndbg("Unrecognized PHY ID: %08x\n", phyid);
+      nerr("ERROR: Unrecognized PHY ID: %08x\n", phyid);
       return ERROR;
     }
 
   /* Next, Set desired network rate, 10BaseT, 100BaseT, or auto. */
 
 #ifdef CONFIG_C5471_AUTONEGOTIATION
-  ndbg("Setting PHY Transceiver for Autonegotiation\n");
+  ninfo("Setting PHY Transceiver for Autonegotiation\n");
   c5471_mdwrite(0, MD_PHY_CONTROL_REG, MODE_AUTONEG);
 #endif
 #ifdef CONFIG_C5471_BASET100
-  ndbg("Setting PHY Transceiver for 100BaseT FullDuplex\n");
+  ninfo("Setting PHY Transceiver for 100BaseT FullDuplex\n");
   c5471_mdwrite(0, MD_PHY_CONTROL_REG, MODE_100MBIT_FULLDUP);
 #endif
 #ifdef CONFIG_C5471_BASET10
-  ndbg("Setting PHY Transceiver for 10BaseT FullDuplex\n");
+  ninfo("Setting PHY Transceiver for 10BaseT FullDuplex\n");
   c5471_mdwrite(0, MD_PHY_CONTROL_REG, MODE_10MBIT_FULLDUP);
 #endif
 
@@ -789,20 +824,20 @@ static int c5471_phyinit (void)
  *
  ****************************************************************************/
 
-static inline void c5471_inctxcpu(struct c5471_driver_s *c5471)
+static inline void c5471_inctxcpu(struct c5471_driver_s *priv)
 {
-  if (EIM_TXDESC_WRAP_NEXT & getreg32(c5471->c_txcpudesc))
+  if (EIM_TXDESC_WRAP_NEXT & getreg32(priv->c_txcpudesc))
     {
       /* Loop back around to base of descriptor queue */
 
-      c5471->c_txcpudesc = getreg32(EIM_CPU_TXBA) + EIM_RAM_START;
+      priv->c_txcpudesc = getreg32(EIM_CPU_TXBA) + EIM_RAM_START;
     }
   else
     {
-      c5471->c_txcpudesc += 2*sizeof(uint32_t);
+      priv->c_txcpudesc += 2*sizeof(uint32_t);
     }
 
-  nvdbg("TX CPU desc: %08x\n", c5471->c_txcpudesc);
+  ninfo("TX CPU desc: %08x\n", priv->c_txcpudesc);
 }
 
 /****************************************************************************
@@ -812,20 +847,20 @@ static inline void c5471_inctxcpu(struct c5471_driver_s *c5471)
  *
  ****************************************************************************/
 
-static inline void c5471_incrxcpu(struct c5471_driver_s *c5471)
+static inline void c5471_incrxcpu(struct c5471_driver_s *priv)
 {
-  if (EIM_RXDESC_WRAP_NEXT & getreg32(c5471->c_rxcpudesc))
+  if (EIM_RXDESC_WRAP_NEXT & getreg32(priv->c_rxcpudesc))
     {
       /* Loop back around to base of descriptor queue */
 
-      c5471->c_rxcpudesc = getreg32(EIM_CPU_RXBA) + EIM_RAM_START;
+      priv->c_rxcpudesc = getreg32(EIM_CPU_RXBA) + EIM_RAM_START;
     }
   else
     {
-      c5471->c_rxcpudesc += 2*sizeof(uint32_t);
+      priv->c_rxcpudesc += 2*sizeof(uint32_t);
     }
 
-  nvdbg("RX CPU desc: %08x\n", c5471->c_rxcpudesc);
+  ninfo("RX CPU desc: %08x\n", priv->c_rxcpudesc);
 }
 
 /****************************************************************************
@@ -836,7 +871,7 @@ static inline void c5471_incrxcpu(struct c5471_driver_s *c5471)
  *   handling or from watchdog based polling.
  *
  * Parameters:
- *   c5471  - Reference to the driver state structure
+ *   priv  - Reference to the driver state structure
  *
  * Returned Value:
  *   OK on success; a negated errno on failure
@@ -845,9 +880,9 @@ static inline void c5471_incrxcpu(struct c5471_driver_s *c5471)
  *
  ****************************************************************************/
 
-static int c5471_transmit(struct c5471_driver_s *c5471)
+static int c5471_transmit(struct c5471_driver_s *priv)
 {
-  struct net_driver_s *dev = &c5471->c_dev;
+  struct net_driver_s *dev = &priv->c_dev;
   volatile uint16_t *packetmem;
   uint16_t framelen;
   bool bfirstframe;
@@ -856,12 +891,12 @@ static int c5471_transmit(struct c5471_driver_s *c5471)
   unsigned int i;
   unsigned int j;
 
-  nbytes                 = (dev->d_len + 1) & ~1;
-  j                      = 0;
-  bfirstframe            = true;
-  c5471->c_lastdescstart = c5471->c_rxcpudesc;
+  nbytes                = (dev->d_len + 1) & ~1;
+  j                     = 0;
+  bfirstframe           = true;
+  priv->c_lastdescstart = priv->c_rxcpudesc;
 
-  nvdbg("Packet size: %d RX CPU desc: %08x\n", nbytes, c5471->c_rxcpudesc);
+  ninfo("Packet size: %d RX CPU desc: %08x\n", nbytes, priv->c_rxcpudesc);
   c5471_dumpbuffer("Transmit packet", dev->d_buf, dev->d_len);
 
   while (nbytes)
@@ -869,7 +904,7 @@ static int c5471_transmit(struct c5471_driver_s *c5471)
       /* Verify that the hardware is ready to send another packet */
       /* Words #0 and #1 of descriptor */
 
-      while (EIM_TXDESC_OWN_HOST & getreg32(c5471->c_rxcpudesc))
+      while (EIM_TXDESC_OWN_HOST & getreg32(priv->c_rxcpudesc))
         {
           /* Loop until the SWITCH lets go of the descriptor giving us access
            * rights to submit our new ether frame to it.
@@ -878,18 +913,18 @@ static int c5471_transmit(struct c5471_driver_s *c5471)
 
       if (bfirstframe)
         {
-          putreg32((getreg32(c5471->c_rxcpudesc) | EIM_RXDESC_FIF), c5471->c_rxcpudesc);
+          putreg32((getreg32(priv->c_rxcpudesc) | EIM_RXDESC_FIF), priv->c_rxcpudesc);
         }
       else
         {
-          putreg32((getreg32(c5471->c_rxcpudesc) & ~EIM_RXDESC_FIF), c5471->c_rxcpudesc);
+          putreg32((getreg32(priv->c_rxcpudesc) & ~EIM_RXDESC_FIF), priv->c_rxcpudesc);
         }
 
-      putreg32((getreg32(c5471->c_rxcpudesc) & ~EIM_RXDESC_PADCRC), c5471->c_rxcpudesc);
+      putreg32((getreg32(priv->c_rxcpudesc) & ~EIM_RXDESC_PADCRC), priv->c_rxcpudesc);
 
       if (bfirstframe)
         {
-          putreg32((getreg32(c5471->c_rxcpudesc) | EIM_RXDESC_PADCRC), c5471->c_rxcpudesc);
+          putreg32((getreg32(priv->c_rxcpudesc) | EIM_RXDESC_PADCRC), priv->c_rxcpudesc);
         }
 
       if (nbytes >= EIM_PACKET_BYTES)
@@ -908,7 +943,7 @@ static int c5471_transmit(struct c5471_driver_s *c5471)
 
       /* Words #2 and #3 of descriptor */
 
-      packetmem = (uint16_t *)getreg32(c5471->c_rxcpudesc + sizeof(uint32_t));
+      packetmem = (uint16_t *)getreg32(priv->c_rxcpudesc + sizeof(uint32_t));
       for (i = 0; i < nshorts; i++, j++)
         {
           /* 16-bits at a time. */
@@ -916,43 +951,45 @@ static int c5471_transmit(struct c5471_driver_s *c5471)
           packetmem[i] = htons(((uint16_t *)dev->d_buf)[j]);
         }
 
-      putreg32(((getreg32(c5471->c_rxcpudesc) & ~EIM_RXDESC_BYTEMASK) | framelen), c5471->c_rxcpudesc);
+      putreg32(((getreg32(priv->c_rxcpudesc) & ~EIM_RXDESC_BYTEMASK) | framelen),
+               priv->c_rxcpudesc);
       nbytes -= framelen;
-      nvdbg("Wrote framelen: %d nbytes: %d nshorts: %d\n", framelen, nbytes, nshorts);
+      ninfo("Wrote framelen: %d nbytes: %d nshorts: %d\n", framelen, nbytes, nshorts);
 
       if (0 == nbytes)
         {
-          putreg32((getreg32(c5471->c_rxcpudesc) | EIM_RXDESC_LIF), c5471->c_rxcpudesc);
+          putreg32((getreg32(priv->c_rxcpudesc) | EIM_RXDESC_LIF), priv->c_rxcpudesc);
         }
       else
         {
-          putreg32((getreg32(c5471->c_rxcpudesc) & ~EIM_RXDESC_LIF), c5471->c_rxcpudesc);
+          putreg32((getreg32(priv->c_rxcpudesc) & ~EIM_RXDESC_LIF), priv->c_rxcpudesc);
         }
 
       /* We're done with that descriptor; give access rights back to h/w */
 
-      putreg32((getreg32(c5471->c_rxcpudesc) | EIM_RXDESC_OWN_HOST), c5471->c_rxcpudesc);
+      putreg32((getreg32(priv->c_rxcpudesc) | EIM_RXDESC_OWN_HOST), priv->c_rxcpudesc);
 
       /* Next, tell Ether Module that those submitted bytes are ready for the wire */
 
       putreg32(0x00000001, EIM_CPU_RXREADY);
-      c5471->c_lastdescend = c5471->c_rxcpudesc;
+      priv->c_lastdescend = priv->c_rxcpudesc;
 
       /* Advance to the next free descriptor */
 
-      c5471_incrxcpu(c5471);
+      c5471_incrxcpu(priv);
       bfirstframe = false;
     }
 
   /* Packet transferred .. Update statistics */
 
 #ifdef CONFIG_C5471_NET_STATS
-  c5471->c_txpackets++;
+  priv->c_txpackets++;
 #endif
 
   /* Setup the TX timeout watchdog (perhaps restarting the timer) */
 
-  (void)wd_start(c5471->c_txtimeout, C5471_TXTIMEOUT, c5471_txtimeout, 1, (uint32_t)c5471);
+  (void)wd_start(priv->c_txtimeout, C5471_TXTIMEOUT,
+                 c5471_txtimeout_expiry, 1, (wdparm_t)priv);
   return OK;
 }
 
@@ -979,13 +1016,13 @@ static int c5471_transmit(struct c5471_driver_s *c5471)
 
 static int c5471_txpoll(struct net_driver_s *dev)
 {
-  struct c5471_driver_s *c5471 = (struct c5471_driver_s *)dev->d_private;
+  struct c5471_driver_s *priv = (struct c5471_driver_s *)dev->d_private;
 
   /* If the polling resulted in data that should be sent out on the network,
    * the field d_len is set to a value > 0.
    */
 
-  if (c5471->c_dev.d_len > 0)
+  if (priv->c_dev.d_len > 0)
     {
       /* Look up the destination MAC address and add it to the Ethernet
        * header.
@@ -993,10 +1030,10 @@ static int c5471_txpoll(struct net_driver_s *dev)
 
 #ifdef CONFIG_NET_IPv4
 #ifdef CONFIG_NET_IPv6
-      if (IFF_IS_IPv4(c5471->c_dev.d_flags))
+      if (IFF_IS_IPv4(priv->c_dev.d_flags))
 #endif
         {
-          arp_out(&c5471->c_dev);
+          arp_out(&priv->c_dev);
         }
 #endif /* CONFIG_NET_IPv4 */
 
@@ -1005,19 +1042,19 @@ static int c5471_txpoll(struct net_driver_s *dev)
       else
 #endif
         {
-          neighbor_out(&c5471->c_dev);
+          neighbor_out(&priv->c_dev);
         }
 #endif /* CONFIG_NET_IPv6 */
 
       /* Send the packet */
 
-      c5471_transmit(c5471);
+      c5471_transmit(priv);
 
       /* Check if the ESM has let go of the RX descriptor giving us access
        * rights to submit another Ethernet frame.
        */
 
-      if ((EIM_TXDESC_OWN_HOST & getreg32(c5471->c_rxcpudesc)) != 0)
+      if ((EIM_TXDESC_OWN_HOST & getreg32(priv->c_rxcpudesc)) != 0)
         {
           /* No, then return non-zero to terminate the poll */
 
@@ -1039,7 +1076,7 @@ static int c5471_txpoll(struct net_driver_s *dev)
  *   An interrupt was received indicating that the last RX packet(s) is done
  *
  * Parameters:
- *   c5471  - Reference to the driver state structure
+ *   priv  - Reference to the driver state structure
  *
  * Returned Value:
  *   None
@@ -1049,9 +1086,9 @@ static int c5471_txpoll(struct net_driver_s *dev)
  ****************************************************************************/
 
 #ifdef CONFIG_C5471_NET_STATS
-static void c5471_rxstatus(struct c5471_driver_s *c5471)
+static void c5471_rxstatus(struct c5471_driver_s *priv)
 {
-  uint32_t desc = c5471->c_txcpudesc;
+  uint32_t desc = priv->c_txcpudesc;
   uint32_t rxstatus;
 
   /* Walk that last packet we just received to collect xmit status bits. */
@@ -1091,44 +1128,44 @@ static void c5471_rxstatus(struct c5471_driver_s *c5471)
     {
       if ((rxstatus & EIM_TXDESC_RETRYERROR) != 0)
         {
-          c5471->c_rxretries++;
-          nvdbg("c_rxretries: %d\n", c5471->c_rxretries);
+          priv->c_rxretries++;
+          ninfo("c_rxretries: %d\n", priv->c_rxretries);
         }
 
       if ((rxstatus & EIM_TXDESC_HEARTBEAT) != 0)
         {
-          c5471->c_rxheartbeat++;
-          nvdbg("c_rxheartbeat: %d\n", c5471->c_rxheartbeat);
+          priv->c_rxheartbeat++;
+          ninfo("c_rxheartbeat: %d\n", priv->c_rxheartbeat);
         }
 
       if ((rxstatus & EIM_TXDESC_LCOLLISON) != 0)
         {
-          c5471->c_rxlcollision++;
-          nvdbg("c_rxlcollision: %d\n", c5471->c_rxlcollision);
+          priv->c_rxlcollision++;
+          ninfo("c_rxlcollision: %d\n", priv->c_rxlcollision);
         }
 
       if ((rxstatus & EIM_TXDESC_COLLISION) != 0)
         {
-          c5471->c_rxcollision++;
-          nvdbg("c_rxcollision: %d\n", c5471->c_rxcollision);
+          priv->c_rxcollision++;
+          ninfo("c_rxcollision: %d\n", priv->c_rxcollision);
         }
 
       if ((rxstatus & EIM_TXDESC_CRCERROR) != 0)
         {
-          c5471->c_rxcrc++;
-          nvdbg("c_rxcrc: %d\n", c5471->c_rxcrc);
+          priv->c_rxcrc++;
+          ninfo("c_rxcrc: %d\n", priv->c_rxcrc);
         }
 
       if ((rxstatus & EIM_TXDESC_UNDERRUN) != 0)
         {
-          c5471->c_rxunderrun++;
-          nvdbg("c_rxunderrun: %d\n", c5471->c_rxunderrun);
+          priv->c_rxunderrun++;
+          ninfo("c_rxunderrun: %d\n", priv->c_rxunderrun);
         }
 
       if ((rxstatus & EIM_TXDESC_LOC) != 0)
         {
-          c5471->c_rxloc++;
-          nvdbg("c_rxloc: %d\n", c5471->c_rxloc);
+          priv->c_rxloc++;
+          ninfo("c_rxloc: %d\n", priv->c_rxloc);
         }
     }
 }
@@ -1141,7 +1178,7 @@ static void c5471_rxstatus(struct c5471_driver_s *c5471)
  *   An interrupt was received indicating the availability of a new RX packet
  *
  * Parameters:
- *   c5471  - Reference to the driver state structure
+ *   priv  - Reference to the driver state structure
  *
  * Returned Value:
  *   None
@@ -1150,9 +1187,9 @@ static void c5471_rxstatus(struct c5471_driver_s *c5471)
  *
  ****************************************************************************/
 
-static void c5471_receive(struct c5471_driver_s *c5471)
+static void c5471_receive(struct c5471_driver_s *priv)
 {
-  struct net_driver_s *dev = &c5471->c_dev;
+  struct net_driver_s *dev = &priv->c_dev;
   uint16_t *packetmem;
   bool bmore = true;
   int packetlen = 0;
@@ -1166,12 +1203,12 @@ static void c5471_receive(struct c5471_driver_s *c5471)
    * the EIM for additional packets that might be received later from the network.
    */
 
-  nvdbg("Reading TX CPU desc: %08x\n", c5471->c_txcpudesc);
+  ninfo("Reading TX CPU desc: %08x\n", priv->c_txcpudesc);
   while (bmore)
     {
       /* Words #0 and #1 of descriptor */
 
-      if (EIM_TXDESC_OWN_HOST & getreg32(c5471->c_txcpudesc))
+      if (EIM_TXDESC_OWN_HOST & getreg32(priv->c_txcpudesc))
         {
           /* No further packets to receive. */
 
@@ -1182,7 +1219,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
        * and update the accumulated packet size
        */
 
-      framelen   = (getreg32(c5471->c_txcpudesc) & EIM_TXDESC_BYTEMASK);
+      framelen   = (getreg32(priv->c_txcpudesc) & EIM_TXDESC_BYTEMASK);
       packetlen += framelen;
 
       /* Check if the received packet will fit within the network packet buffer */
@@ -1191,17 +1228,17 @@ static void c5471_receive(struct c5471_driver_s *c5471)
         {
           /* Get the packet memory from words #2 and #3 of descriptor */
 
-          packetmem = (uint16_t *)getreg32(c5471->c_txcpudesc + sizeof(uint32_t));
+          packetmem = (uint16_t *)getreg32(priv->c_txcpudesc + sizeof(uint32_t));
 
           /* Divide by 2 with round up to get the number of 16-bit words. */
 
           nshorts = (framelen + 1) >> 1;
-          nvdbg("Reading framelen: %d packetlen: %d nshorts: %d packetmen: %p\n",
+          ninfo("Reading framelen: %d packetlen: %d nshorts: %d packetmen: %p\n",
                  framelen, packetlen, nshorts, packetmem);
 
           for (i = 0 ; i < nshorts; i++, j++)
             {
-              /* Copy the data data from the hardware to c5471->c_dev.d_buf 16-bits at
+              /* Copy the data data from the hardware to priv->c_dev.d_buf 16-bits at
                * a time.
                */
 
@@ -1210,10 +1247,10 @@ static void c5471_receive(struct c5471_driver_s *c5471)
         }
       else
         {
-          nvdbg("Discarding framelen: %d packetlen\n", framelen, packetlen);
+          ninfo("Discarding framelen: %d packetlen\n", framelen, packetlen);
         }
 
-      if (getreg32(c5471->c_txcpudesc) & EIM_TXDESC_LIF)
+      if (getreg32(priv->c_txcpudesc) & EIM_TXDESC_LIF)
         {
           bmore = false;
         }
@@ -1222,16 +1259,16 @@ static void c5471_receive(struct c5471_driver_s *c5471)
        * the settings of a select few. Can leave descriptor words 2/3 alone.
        */
 
-      putreg32((getreg32(c5471->c_txcpudesc) & (EIM_TXDESC_WRAP_NEXT | EIM_TXDESC_INTRE)),
-               c5471->c_txcpudesc);
+      putreg32((getreg32(priv->c_txcpudesc) & (EIM_TXDESC_WRAP_NEXT | EIM_TXDESC_INTRE)),
+               priv->c_txcpudesc);
 
       /* Next, Give ownership of now emptied descriptor back to the Ether Module's SWITCH */
 
-      putreg32((getreg32(c5471->c_txcpudesc) | EIM_TXDESC_OWN_HOST), c5471->c_txcpudesc);
+      putreg32((getreg32(priv->c_txcpudesc) | EIM_TXDESC_OWN_HOST), priv->c_txcpudesc);
 
       /* Advance to the next data buffer */
 
-      c5471_inctxcpu(c5471);
+      c5471_inctxcpu(priv);
     }
 
   /* Adjust the packet length to remove the CRC bytes that the network doesn't care about. */
@@ -1241,7 +1278,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
 #ifdef CONFIG_C5471_NET_STATS
   /* Increment the count of received packets */
 
-  c5471->c_rxpackets++;
+  priv->c_rxpackets++;
 #endif
 
   /* If we successfully transferred the data into the network buffer, then pass it on
@@ -1250,10 +1287,10 @@ static void c5471_receive(struct c5471_driver_s *c5471)
 
   if (packetlen > 0 && packetlen < CONFIG_NET_ETH_MTU)
     {
-      /* Set amount of data in c5471->c_dev.d_len. */
+      /* Set amount of data in priv->c_dev.d_len. */
 
       dev->d_len = packetlen;
-      nvdbg("Received packet, packetlen: %d type: %02x\n", packetlen, ntohs(BUF->type));
+      ninfo("Received packet, packetlen: %d type: %02x\n", packetlen, ntohs(BUF->type));
       c5471_dumpbuffer("Received packet", dev->d_buf, dev->d_len);
 
 #ifdef CONFIG_NET_PKT
@@ -1267,7 +1304,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
 #ifdef CONFIG_NET_IPv4
       if (BUF->type == HTONS(ETHTYPE_IP))
         {
-          nllvdbg("IPv4 frame\n");
+          ninfo("IPv4 frame\n");
 
           /* Handle ARP on input then give the IPv4 packet to the network
            * layer
@@ -1283,7 +1320,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
            */
 
           if (dev->d_len > 0 &&
-             (EIM_TXDESC_OWN_HOST & getreg32(c5471->c_rxcpudesc)) == 0)
+             (EIM_TXDESC_OWN_HOST & getreg32(priv->c_rxcpudesc)) == 0)
             {
               /* Update the Ethernet header with the correct MAC address */
 
@@ -1302,7 +1339,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
 
               /* And send the packet */
 
-               c5471_transmit(c5471);
+               c5471_transmit(priv);
             }
         }
       else
@@ -1310,7 +1347,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
 #ifdef CONFIG_NET_IPv6
       if (BUF->type == HTONS(ETHTYPE_IP6))
         {
-          nllvdbg("Iv6 frame\n");
+          ninfo("Iv6 frame\n");
 
           /* Give the IPv6 packet to the network layer */
 
@@ -1323,7 +1360,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
            */
 
           if (dev->d_len > 0 &&
-             (EIM_TXDESC_OWN_HOST & getreg32(c5471->c_rxcpudesc)) == 0)
+             (EIM_TXDESC_OWN_HOST & getreg32(priv->c_rxcpudesc)) == 0)
             {
               /* Update the Ethernet header with the correct MAC address */
 
@@ -1342,7 +1379,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
 
               /* And send the packet */
 
-               c5471_transmit(c5471);
+               c5471_transmit(priv);
             }
         }
       else
@@ -1359,9 +1396,9 @@ static void c5471_receive(struct c5471_driver_s *c5471)
            */
 
           if (dev->d_len > 0 &&
-             (EIM_TXDESC_OWN_HOST & getreg32(c5471->c_rxcpudesc)) == 0)
+             (EIM_TXDESC_OWN_HOST & getreg32(priv->c_rxcpudesc)) == 0)
             {
-              c5471_transmit(c5471);
+              c5471_transmit(priv);
             }
         }
 #endif
@@ -1371,8 +1408,8 @@ static void c5471_receive(struct c5471_driver_s *c5471)
     {
       /* Increment the count of dropped packets */
 
-      ndbg("Too big! packetlen: %d\n", packetlen);
-      c5471->c_rxdropped++;
+      nwarn("WARNING: Too big! packetlen: %d\n", packetlen);
+      priv->c_rxdropped++;
     }
 #endif
 }
@@ -1384,7 +1421,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
  *   An interrupt was received indicating that the last TX packet(s) is done
  *
  * Parameters:
- *   c5471  - Reference to the driver state structure
+ *   priv  - Reference to the driver state structure
  *
  * Returned Value:
  *   None
@@ -1394,27 +1431,27 @@ static void c5471_receive(struct c5471_driver_s *c5471)
  ****************************************************************************/
 
 #ifdef CONFIG_C5471_NET_STATS
-static void c5471_txstatus(struct c5471_driver_s *c5471)
+static void c5471_txstatus(struct c5471_driver_s *priv)
 {
-  uint32_t desc = c5471->c_lastdescstart;
+  uint32_t desc = priv->c_lastdescstart;
   uint32_t txstatus;
 
   /* Walk that last packet we just sent to collect xmit status bits. */
 
   txstatus = 0;
-  if (c5471->c_lastdescstart && c5471->c_lastdescend)
+  if (priv->c_lastdescstart && priv->c_lastdescend)
     {
       for (; ; )
         {
           txstatus |= (getreg32(desc) & EIM_RXDESC_STATUSMASK);
-          if (desc == c5471->c_lastdescend)
+          if (desc == priv->c_lastdescend)
             {
               break;
             }
 
           /* This packet is made up of several descriptors, find next one in chain. */
 
-          if (EIM_RXDESC_WRAP_NEXT & getreg32(c5471->c_rxcpudesc))
+          if (EIM_RXDESC_WRAP_NEXT & getreg32(priv->c_rxcpudesc))
             {
               /* Loop back around to base of descriptor queue. */
 
@@ -1431,44 +1468,44 @@ static void c5471_txstatus(struct c5471_driver_s *c5471)
     {
       if ((txstatus & EIM_RXDESC_MISS) != 0)
         {
-          c5471->c_txmiss++;
-          nvdbg("c_txmiss: %d\n", c5471->c_txmiss);
+          priv->c_txmiss++;
+          ninfo("c_txmiss: %d\n", priv->c_txmiss);
         }
 
       if ((txstatus & EIM_RXDESC_VLAN) != 0)
         {
-          c5471->c_txvlan++;
-          nvdbg("c_txvlan: %d\n", c5471->c_txvlan);
+          priv->c_txvlan++;
+          ninfo("c_txvlan: %d\n", priv->c_txvlan);
         }
 
       if ((txstatus & EIM_RXDESC_LFRAME) != 0)
         {
-          c5471->c_txlframe++;
-          nvdbg("c_txlframe: %d\n", c5471->c_txlframe);
+          priv->c_txlframe++;
+          ninfo("c_txlframe: %d\n", priv->c_txlframe);
         }
 
       if ((txstatus & EIM_RXDESC_SFRAME) != 0)
         {
-          c5471->c_txsframe++;
-          nvdbg("c_txsframe: %d\n", c5471->c_txsframe);
+          priv->c_txsframe++;
+          ninfo("c_txsframe: %d\n", priv->c_txsframe);
         }
 
       if ((txstatus & EIM_RXDESC_CRCERROR) != 0)
         {
-          c5471->c_txcrc++;
-          nvdbg("c_txcrc: %d\n", c5471->c_txcrc);
+          priv->c_txcrc++;
+          ninfo("c_txcrc: %d\n", priv->c_txcrc);
         }
 
       if ((txstatus & EIM_RXDESC_OVERRUN) != 0)
         {
-          c5471->c_txoverrun++;
-          nvdbg("c_txoverrun: %d\n", c5471->c_txoverrun);
+          priv->c_txoverrun++;
+          ninfo("c_txoverrun: %d\n", priv->c_txoverrun);
         }
 
       if ((txstatus & EIM_RXDESC_OVERRUN) != 0)
         {
-          c5471->c_txalign++;
-          nvdbg("c_txalign: %d\n", c5471->c_txalign);
+          priv->c_txalign++;
+          ninfo("c_txalign: %d\n", priv->c_txalign);
         }
     }
 }
@@ -1481,7 +1518,7 @@ static void c5471_txstatus(struct c5471_driver_s *c5471)
  *   An interrupt was received indicating that the last TX packet(s) is done
  *
  * Parameters:
- *   c5471  - Reference to the driver state structure
+ *   priv  - Reference to the driver state structure
  *
  * Returned Value:
  *   None
@@ -1490,50 +1527,50 @@ static void c5471_txstatus(struct c5471_driver_s *c5471)
  *
  ****************************************************************************/
 
-static void c5471_txdone(struct c5471_driver_s *c5471)
+static void c5471_txdone(struct c5471_driver_s *priv)
 {
   /* If no further xmits are pending, then cancel the TX timeout */
 
-  wd_cancel(c5471->c_txtimeout);
+  wd_cancel(priv->c_txtimeout);
 
   /* Then poll the network for new XMIT data */
 
-  (void)devif_poll(&c5471->c_dev, c5471_txpoll);
+  (void)devif_poll(&priv->c_dev, c5471_txpoll);
 }
 
 /****************************************************************************
- * Function: c5471_interrupt
+ * Function: c5471_interrupt_work
  *
  * Description:
- *   Hardware interrupt handler
+ *   Perform interrupt related work from the worker thread
  *
  * Parameters:
- *   irq     - Number of the IRQ that generated the interrupt
- *   context - Interrupt register state save info (architecture-specific)
+ *   arg - The argument passed when work_queue() was called.
  *
  * Returned Value:
  *   OK on success
  *
  * Assumptions:
+ *   The network is locked.
  *
  ****************************************************************************/
 
-static int c5471_interrupt(int irq, FAR void *context)
+static void c5471_interrupt_work(FAR void *arg)
 {
-#if CONFIG_C5471_NET_NINTERFACES == 1
-  register struct c5471_driver_s *c5471 = &g_c5471[0];
-#else
-# error "Additional logic needed to support multiple interfaces"
-#endif
+  FAR struct c5471_driver_s *priv = (FAR struct c5471_driver_s *)arg;
+
+  /* Process pending Ethernet interrupts */
+
+  net_lock();
 
   /* Get and clear interrupt status bits */
 
-  c5471->c_eimstatus = getreg32(EIM_STATUS);
+  priv->c_eimstatus = getreg32(EIM_STATUS);
 
   /* Handle interrupts according to status bit settings */
   /* Check if we received an incoming packet, if so, call c5471_receive() */
 
-  if ((EIM_STATUS_CPU_TX & c5471->c_eimstatus) != 0)
+  if ((EIM_STATUS_CPU_TX & priv->c_eimstatus) != 0)
     {
       /* An incoming packet has been received by the EIM from the network and
        * the interrupt associated with EIM's CPU TX queue has been asserted. It
@@ -1545,17 +1582,17 @@ static int c5471_interrupt(int irq, FAR void *context)
 #ifdef CONFIG_C5471_NET_STATS
       /* Check for RX errors */
 
-      c5471_rxstatus(c5471);
+      c5471_rxstatus(priv);
 #endif
 
       /* Process the received packet */
 
-      c5471_receive(c5471);
+      c5471_receive(priv);
     }
 
   /* Check is a packet transmission just completed.  If so, call c5471_txdone */
 
-  if ((EIM_STATUS_CPU_RX & c5471->c_eimstatus) != 0)
+  if ((EIM_STATUS_CPU_RX & priv->c_eimstatus) != 0)
     {
       /* An outgoing packet has been processed by the EIM and the interrupt
        * associated with EIM's CPU RX que has been asserted. It is the EIM's
@@ -1566,65 +1603,116 @@ static int c5471_interrupt(int irq, FAR void *context)
 #ifdef CONFIG_C5471_NET_STATS
       /* Check for TX errors */
 
-      c5471_txstatus(c5471);
+      c5471_txstatus(priv);
 #endif
 
       /* Handle the transmission done event */
 
-      c5471_txdone(c5471);
+      c5471_txdone(priv);
     }
 
-  /* Enable Ethernet interrupts (perhaps excluding the TX done interrupt if
-   * there are no pending transmissions.
+  net_unlock();
+
+  /* Re-enable Ethernet interrupts */
+
+  up_enable_irq(C5471_IRQ_ETHER);
+}
+
+/****************************************************************************
+ * Function: c5471_interrupt
+ *
+ * Description:
+ *   Hardware interrupt handler
+ *
+ * Parameters:
+ *   irq     - Number of the IRQ that generated the interrupt
+ *   context - Interrupt register state save info (architecture-specific)
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *
+ ****************************************************************************/
+
+static int c5471_interrupt(int irq, FAR void *context, FAR void *arg)
+{
+#if CONFIG_C5471_NET_NINTERFACES == 1
+  register struct c5471_driver_s *priv = &g_c5471[0];
+#else
+# error "Additional logic needed to support multiple interfaces"
+#endif
+
+  /* Disable further Ethernet interrupts.  Because Ethernet interrupts are
+   * also disabled if the TX timeout event occurs, there can be no race
+   * condition here.
    */
 
+  up_disable_irq(C5471_IRQ_ETHER);
+
+  /* TODO: Determine if a TX transfer just completed */
+
+    {
+      /* If a TX transfer just completed, then cancel the TX timeout so
+       * there will be no race condition between any subsequent timeout
+       * expiration and the deferred interrupt processing.
+       */
+
+       wd_cancel(priv->c_txtimeout);
+    }
+
+  /* Schedule to perform the interrupt processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->c_irqwork, c5471_interrupt_work, priv, 0);
   return OK;
 }
 
 /****************************************************************************
- * Function: c5471_txtimeout
+ * Function: c5471_txtimeout_work
  *
  * Description:
- *   Our TX watchdog timed out.  Called from the timer interrupt handler.
- *   The last TX never completed.  Reset the hardware and start again.
+ *   Perform TX timeout related work from the worker thread
  *
  * Parameters:
- *   argc - The number of available arguments
- *   arg  - The first argument
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
+ *   The network is locked.
  *
  ****************************************************************************/
 
-static void c5471_txtimeout(int argc, uint32_t arg, ...)
+static void c5471_txtimeout_work(FAR void *arg)
 {
-  struct c5471_driver_s *c5471 = (struct c5471_driver_s *)arg;
+  FAR struct c5471_driver_s *priv = (FAR struct c5471_driver_s *)arg;
 
   /* Increment statistics */
 
+  net_lock();
 #ifdef CONFIG_C5471_NET_STATS
-  c5471->c_txtimeouts++;
-  nvdbg("c_txtimeouts: %d\n", c5471->c_txtimeouts);
+  priv->c_txtimeouts++;
+  ninfo("c_txtimeouts: %d\n", priv->c_txtimeouts);
 #endif
 
   /* Then try to restart the hardware */
 
-  c5471_ifdown(&c5471->c_dev);
-  c5471_ifup(&c5471->c_dev);
+  c5471_ifdown(&priv->c_dev);
+  c5471_ifup(&priv->c_dev);
 
   /* Then poll the network for new XMIT data */
 
-  (void)devif_poll(&c5471->c_dev, c5471_txpoll);
+  (void)devif_poll(&priv->c_dev, c5471_txpoll);
+  net_unlock();
 }
 
 /****************************************************************************
- * Function: c5471_polltimer
+ * Function: c5471_txtimeout_expiry
  *
  * Description:
- *   Periodic timer handler.  Called from the timer interrupt handler.
+ *   Our TX watchdog timed out.  Called from the timer interrupt handler.
+ *   The last TX never completed.  Reset the hardware and start again.
  *
  * Parameters:
  *   argc - The number of available arguments
@@ -1634,27 +1722,93 @@ static void c5471_txtimeout(int argc, uint32_t arg, ...)
  *   None
  *
  * Assumptions:
+ *   Global interrupts are disabled by the watchdog logic.
+ *
+ ****************************************************************************/
+
+static void c5471_txtimeout_expiry(int argc, wdparm_t arg, ...)
+{
+  struct c5471_driver_s *priv = (struct c5471_driver_s *)arg;
+
+  /* Disable further Ethernet interrupts.  This will prevent some race
+   * conditions with interrupt work.  There is still a potential race
+   * condition with interrupt work that is already queued and in progress.
+   */
+
+  up_disable_irq(C5471_IRQ_ETHER);
+
+  /* Schedule to perform the TX timeout processing on the worker thread,
+   * canceling any pending IRQ work.
+   */
+
+  work_queue(ETHWORK, &priv->c_irqwork, c5471_txtimeout_work, priv, 0);
+}
+
+/****************************************************************************
+ * Function: c5471_poll_work
+ *
+ * Description:
+ *   Perform periodic polling from the worker thread
+ *
+ * Parameters:
+ *   arg - The argument passed when work_queue() as called.
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *   The network is locked.
  *
  ****************************************************************************/
 
-static void c5471_polltimer(int argc, uint32_t arg, ...)
+static void c5471_poll_work(FAR void *arg)
 {
-  struct c5471_driver_s *c5471 = (struct c5471_driver_s *)arg;
+  FAR struct c5471_driver_s *priv = (FAR struct c5471_driver_s *)arg;
 
   /* Check if the ESM has let go of the RX descriptor giving us access rights
    * to submit another Ethernet frame.
    */
 
-  if ((EIM_TXDESC_OWN_HOST & getreg32(c5471->c_rxcpudesc)) == 0)
+  net_lock();
+  if ((EIM_TXDESC_OWN_HOST & getreg32(priv->c_rxcpudesc)) == 0)
     {
       /* If so, update TCP timing states and poll the network for new XMIT data */
 
-      (void)devif_timer(&c5471->c_dev, c5471_txpoll);
+      (void)devif_timer(&priv->c_dev, c5471_txpoll);
     }
 
   /* Setup the watchdog poll timer again */
 
-  (void)wd_start(c5471->c_txpoll, C5471_WDDELAY, c5471_polltimer, 1, arg);
+  (void)wd_start(priv->c_txpoll, C5471_WDDELAY, c5471_poll_expiry, 1,
+                 (wdparm_t)priv);
+  net_unlock();
+}
+
+/****************************************************************************
+ * Function: c5471_poll_expiry
+ *
+ * Description:
+ *   Periodic timer handler.  Called from the timer interrupt handler.
+ *
+ * Parameters:
+ *   argc - The number of available arguments
+ *   arg  - The first argument
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Global interrupts are disabled by the watchdog logic.
+ *
+ ****************************************************************************/
+
+static void c5471_poll_expiry(int argc, wdparm_t arg, ...)
+{
+  struct c5471_driver_s *priv = (struct c5471_driver_s *)arg;
+
+  /* Schedule to perform the interrupt processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->c_pollwork, c5471_poll_work, priv, 0);
 }
 
 /****************************************************************************
@@ -1677,20 +1831,20 @@ static void c5471_polltimer(int argc, uint32_t arg, ...)
 
 static int c5471_ifup(struct net_driver_s *dev)
 {
-  struct c5471_driver_s *c5471 = (struct c5471_driver_s *)dev->d_private;
+  struct c5471_driver_s *priv = (struct c5471_driver_s *)dev->d_private;
   volatile uint32_t clearbits;
 
-  ndbg("Bringing up: %d.%d.%d.%d\n",
-       dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-       (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 
   /* Initilize Ethernet interface */
 
-  c5471_reset(c5471);
+  c5471_reset(priv);
 
   /* Assign the MAC to the device */
 
-  c5471_macassign(c5471);
+  c5471_macassign(priv);
 
   /* Clear pending interrupts by reading the EIM status register */
 
@@ -1712,11 +1866,12 @@ static int c5471_ifup(struct net_driver_s *dev)
 
   /* Set and activate a timer process */
 
-  (void)wd_start(c5471->c_txpoll, C5471_WDDELAY, c5471_polltimer, 1, (uint32_t)c5471);
+  (void)wd_start(priv->c_txpoll, C5471_WDDELAY, c5471_poll_expiry,
+                 1, (wdparm_t)priv);
 
   /* Enable the Ethernet interrupt */
 
-  c5471->c_bifup = true;
+  priv->c_bifup = true;
   up_enable_irq(C5471_IRQ_ETHER);
   return OK;
 }
@@ -1739,10 +1894,10 @@ static int c5471_ifup(struct net_driver_s *dev)
 
 static int c5471_ifdown(struct net_driver_s *dev)
 {
-  struct c5471_driver_s *c5471 = (struct c5471_driver_s *)dev->d_private;
+  struct c5471_driver_s *priv = (struct c5471_driver_s *)dev->d_private;
   irqstate_t flags;
 
-  ndbg("Stopping\n");
+  ninfo("Stopping\n");
 
   /* Disable the Ethernet interrupt */
 
@@ -1764,60 +1919,94 @@ static int c5471_ifdown(struct net_driver_s *dev)
 
   /* Cancel the TX poll timer and TX timeout timers */
 
-  wd_cancel(c5471->c_txpoll);
-  wd_cancel(c5471->c_txtimeout);
+  wd_cancel(priv->c_txpoll);
+  wd_cancel(priv->c_txtimeout);
 
   /* Reset the device */
 
-  c5471->c_bifup = false;
+  priv->c_bifup = false;
   leave_critical_section(flags);
   return OK;
 }
 
 /****************************************************************************
- * Function: c5471_txavail
+ * Function: c5471_txavail_work
  *
  * Description:
- *   Driver callback invoked when new TX data is available.  This is a
- *   stimulus perform an out-of-cycle poll and, thereby, reduce the TX
- *   latency.
+ *   Perform an out-of-cycle poll on the worker thread.
  *
  * Parameters:
- *   dev  - Reference to the NuttX driver state structure
+ *   arg - Reference to the NuttX driver state structure (cast to void*)
  *
  * Returned Value:
  *   None
  *
  * Assumptions:
- *   Called in normal user mode
+ *   Called on the higher priority worker thread.
  *
  ****************************************************************************/
 
-static int c5471_txavail(struct net_driver_s *dev)
+static void c5471_txavail_work(FAR void *arg)
 {
-  struct c5471_driver_s *c5471 = (struct c5471_driver_s *)dev->d_private;
-  irqstate_t flags;
+  FAR struct c5471_driver_s *priv = (FAR struct c5471_driver_s *)arg;
 
-  ndbg("Polling\n");
-  flags = enter_critical_section();
+  ninfo("Polling\n");
 
   /* Ignore the notification if the interface is not yet up */
 
-  if (c5471->c_bifup)
+  net_lock();
+  if (priv->c_bifup)
     {
       /* Check if the ESM has let go of the RX descriptor giving us access
        * rights to submit another Ethernet frame.
        */
 
-      if ((EIM_TXDESC_OWN_HOST & getreg32(c5471->c_rxcpudesc)) == 0)
+      if ((EIM_TXDESC_OWN_HOST & getreg32(priv->c_rxcpudesc)) == 0)
         {
           /* If so, then poll the network for new XMIT data */
 
-          (void)devif_poll(&c5471->c_dev, c5471_txpoll);
+          (void)devif_poll(&priv->c_dev, c5471_txpoll);
         }
     }
 
-  leave_critical_section(flags);
+  net_unlock();
+}
+
+/****************************************************************************
+ * Function: c5471_txavail
+ *
+ * Description:
+ *   Driver callback invoked when new TX data is available.  This is a
+ *   stimulus perform an out-of-cycle poll and, thereby, reduce the TX
+ *   latency.
+ *
+ * Parameters:
+ *   dev - Reference to the NuttX driver state structure
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Called in normal user mode
+ *
+ ****************************************************************************/
+
+static int c5471_txavail(FAR struct net_driver_s *dev)
+{
+  struct c5471_driver_s *priv = (struct c5471_driver_s *)dev->d_private;
+
+  /* Is our single work structure available?  It may not be if there are
+   * pending interrupt actions and we will have to ignore the Tx
+   * availability action.
+   */
+
+  if (work_available(&priv->c_pollwork))
+    {
+      /* Schedule to serialize the poll on the worker thread. */
+
+      work_queue(ETHWORK, &priv->c_pollwork, c5471_txavail_work, priv, 0);
+    }
+
   return OK;
 }
 
@@ -1895,7 +2084,7 @@ static int c5471_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac)
  *
  ****************************************************************************/
 
-static void c5471_eimreset (struct c5471_driver_s *c5471)
+static void c5471_eimreset (struct c5471_driver_s *priv)
 {
   /* Stop the EIM module clock */
 
@@ -1925,8 +2114,8 @@ static void c5471_eimreset (struct c5471_driver_s *c5471)
 
   /* All EIM register should now be in there power-up default states */
 
-  c5471->c_lastdescstart = 0;
-  c5471->c_lastdescend   = 0;
+  priv->c_lastdescstart = 0;
+  priv->c_lastdescend   = 0;
 }
 
 /****************************************************************************
@@ -1939,7 +2128,7 @@ static void c5471_eimreset (struct c5471_driver_s *c5471)
  *
  ****************************************************************************/
 
-static void c5471_eimconfig(struct c5471_driver_s *c5471)
+static void c5471_eimconfig(struct c5471_driver_s *priv)
 {
   volatile uint32_t pbuf;
   volatile uint32_t desc;
@@ -1951,7 +2140,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
 
   /* TX ENET 0 */
 
-  ndbg("TX ENET0 desc: %08x pbuf: %08x\n", desc, pbuf);
+  ninfo("TX ENET0 desc: %08x pbuf: %08x\n", desc, pbuf);
   putreg32((desc & 0x0000ffff), ENET0_TDBA); /* 16-bit offset address */
   for (i = NUM_DESC_TX-1; i >= 0; i--)
     {
@@ -1978,7 +2167,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
 
   /* RX ENET 0 */
 
-  ndbg("RX ENET0 desc: %08x pbuf: %08x\n", desc, pbuf);
+  ninfo("RX ENET0 desc: %08x pbuf: %08x\n", desc, pbuf);
   putreg32((desc & 0x0000ffff), ENET0_RDBA); /* 16-bit offset address */
   for (i = NUM_DESC_RX-1; i >= 0; i--)
     {
@@ -2005,8 +2194,8 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
 
   /* TX CPU */
 
-  ndbg("TX CPU desc: %08x pbuf: %08x\n", desc, pbuf);
-  c5471->c_txcpudesc = desc;
+  ninfo("TX CPU desc: %08x pbuf: %08x\n", desc, pbuf);
+  priv->c_txcpudesc = desc;
   putreg32((desc & 0x0000ffff), EIM_CPU_TXBA); /* 16-bit offset address */
   for (i = NUM_DESC_TX-1; i >= 0; i--)
     {
@@ -2035,8 +2224,8 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
 
   /* RX CPU */
 
-  ndbg("RX CPU desc: %08x pbuf: %08x\n", desc, pbuf);
-  c5471->c_rxcpudesc = desc;
+  ninfo("RX CPU desc: %08x pbuf: %08x\n", desc, pbuf);
+  priv->c_rxcpudesc = desc;
   putreg32((desc & 0x0000ffff), EIM_CPU_RXBA); /* 16-bit offset address */
   for (i = NUM_DESC_RX-1; i >= 0; i--)
     {
@@ -2063,7 +2252,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
       pbuf += sizeof(uint32_t); /* Ether Module's "Buffer Usage Word" */
     }
 
-  ndbg("END desc: %08x pbuf: %08x\n", desc, pbuf);
+  ninfo("END desc: %08x pbuf: %08x\n", desc, pbuf);
 
   /* Save the descriptor packet size */
 
@@ -2147,17 +2336,17 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
  *
  ****************************************************************************/
 
-static void c5471_reset(struct c5471_driver_s *c5471)
+static void c5471_reset(struct c5471_driver_s *priv)
 {
 #if defined(CONFIG_C5471_PHY_LU3X31T_T64)
-  ndbg("EIM reset\n");
-  c5471_eimreset(c5471);
+  ninfo("EIM reset\n");
+  c5471_eimreset(priv);
 #endif
-  ndbg("PHY init\n");
+  ninfo("PHY init\n");
   c5471_phyinit();
 
-  ndbg("EIM config\n");
-  c5471_eimconfig(c5471);
+  ninfo("EIM config\n");
+  c5471_eimconfig(priv);
 }
 
 /****************************************************************************
@@ -2172,13 +2361,13 @@ static void c5471_reset(struct c5471_driver_s *c5471)
  *
  ****************************************************************************/
 
-static void c5471_macassign(struct c5471_driver_s *c5471)
+static void c5471_macassign(struct c5471_driver_s *priv)
 {
-  struct net_driver_s *dev = &c5471->c_dev;
+  struct net_driver_s *dev = &priv->c_dev;
   uint8_t *mptr = dev->d_mac.ether_addr_octet;
   register uint32_t tmp;
 
-  ndbg("MAC: %0x:%0x:%0x:%0x:%0x:%0x\n",
+  ninfo("MAC: %0x:%0x:%0x:%0x:%0x:%0x\n",
         mptr[0], mptr[1], mptr[2], mptr[3], mptr[4], mptr[5]);
 
   /* Set CPU port MAC address. S/W will only see incoming packets that match
@@ -2237,17 +2426,18 @@ void up_netinitialize(void)
 {
   /* Attach the IRQ to the driver */
 
-  if (irq_attach(C5471_IRQ_ETHER, c5471_interrupt))
+  if (irq_attach(C5471_IRQ_ETHER, c5471_interrupt, NULL))
     {
       /* We could not attach the ISR to the ISR */
 
-      nlldbg("irq_attach() failed\n");
+      nerr("ERROR: irq_attach() failed\n");
       return;
     }
 
   /* Initialize the driver structure */
 
   memset(g_c5471, 0, CONFIG_C5471_NET_NINTERFACES*sizeof(struct c5471_driver_s));
+  g_c5471[0].c_dev.d_buf     = g_pktbuf;        /* Single packet buffer */
   g_c5471[0].c_dev.d_ifup    = c5471_ifup;      /* I/F down callback */
   g_c5471[0].c_dev.d_ifdown  = c5471_ifdown;    /* I/F up (new IP address) callback */
   g_c5471[0].c_dev.d_txavail = c5471_txavail;   /* New TX data callback */
diff --git a/arch/arm/src/c5471/c5471_serial.c b/arch/arm/src/c5471/c5471_serial.c
index 935bc46871de9100e78b1c337d3a7f9f2b754f9c..44d0dc7fd250d0b5e62204d6528faf25cff8f3a2 100644
--- a/arch/arm/src/c5471/c5471_serial.c
+++ b/arch/arm/src/c5471/c5471_serial.c
@@ -108,7 +108,7 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-static int  up_interrupt(int irq, void *context);
+static int  up_interrupt(int irq, void *context, void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  up_receive(struct uart_dev_s *dev, unsigned int *status);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
@@ -491,7 +491,7 @@ static int up_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, up_interrupt);
+  ret = irq_attach(priv->irq, up_interrupt, dev);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
@@ -534,24 +534,13 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_interrupt(int irq, void *context)
+static int up_interrupt(int irq, void *context, void *arg)
 {
-  struct uart_dev_s *dev = NULL;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct up_dev_s   *priv;
   volatile uint32_t  cause;
 
-  if (g_irdapriv.irq == irq)
-    {
-      dev = &g_irdaport;
-    }
-  else if (g_modempriv.irq == irq)
-    {
-      dev = &g_modemport;
-    }
-  else
-    {
-      PANIC();
-    }
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct up_dev_s *)dev->priv;
 
   cause = up_inserial(priv, UART_ISR_OFFS) & 0x0000003f;
diff --git a/arch/arm/src/c5471/c5471_timerisr.c b/arch/arm/src/c5471/c5471_timerisr.c
index 6f1ca3da87b808f69a558e28e4cb23b2cd9814e8..3933e5252bb6a106cc6fa181e1318b71e9178b3f 100644
--- a/arch/arm/src/c5471/c5471_timerisr.c
+++ b/arch/arm/src/c5471/c5471_timerisr.c
@@ -70,19 +70,11 @@
 #define PTV                0x00000003
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  c5471_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for
@@ -90,7 +82,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int c5471_timerisr(int irq, uint32_t *regs, FAR void *arg)
 {
   /* Process timer interrupt */
 
@@ -99,7 +91,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -107,7 +103,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t val;
 
@@ -122,6 +118,6 @@ void up_timer_initialize(void)
 
   /* Attach and enable the timer interrupt */
 
-  irq_attach(C5471_IRQ_SYSTIMER, (xcpt_t)up_timerisr);
+  irq_attach(C5471_IRQ_SYSTIMER, (xcpt_t)c5471_timerisr, NULL);
   up_enable_irq(C5471_IRQ_SYSTIMER);
 }
diff --git a/arch/arm/src/c5471/c5471_watchdog.c b/arch/arm/src/c5471/c5471_watchdog.c
index 2143246d6e7597754d6716eb259808b946a17af4..baa7dd77496224d8fbecbfe9aadad9ffe4406841 100644
--- a/arch/arm/src/c5471/c5471_watchdog.c
+++ b/arch/arm/src/c5471/c5471_watchdog.c
@@ -95,7 +95,7 @@
 static inline unsigned int wdt_prescaletoptv(unsigned int prescale);
 
 static int     wdt_setusec(uint32_t usec);
-static int     wdt_interrupt(int irq, void *context);
+static int     wdt_interrupt(int irq, void *context, FAR void *arg);
 
 static int     wdt_open(struct file *filep);
 static int     wdt_close(struct file *filep);
@@ -155,7 +155,7 @@ static inline unsigned int wdt_prescaletoptv(unsigned int prescale)
         }
     }
 
-  dbg("prescale=%d -> ptv=%d\n", prescale, ptv);
+  wdinfo("prescale=%d -> ptv=%d\n", prescale, ptv);
   return ptv;
 }
 
@@ -173,7 +173,7 @@ static int wdt_setusec(uint32_t usec)
   uint32_t divisor   = 1;
   uint32_t mode;
 
-  dbg("usec=%d\n", usec);
+  wdinfo("usec=%d\n", usec);
 
   /* Calculate a value of prescaler and divisor that will be able
    * to count to the usec.  It may not be exact or the best
@@ -186,7 +186,7 @@ static int wdt_setusec(uint32_t usec)
   do
     {
       divisor = (CLOCK_MHZx2 * usec) / (prescaler * 2);
-      dbg("divisor=0x%x prescaler=0x%x\n", divisor, prescaler);
+      wdinfo("divisor=0x%x prescaler=0x%x\n", divisor, prescaler);
 
       if (divisor >= 0x10000)
         {
@@ -194,7 +194,7 @@ static int wdt_setusec(uint32_t usec)
             {
               /* This is the max possible ~2.5 seconds. */
 
-              dbg("prescaler=0x%x too big!\n", prescaler);
+              wderr("ERROR: prescaler=0x%x too big!\n", prescaler);
               return ERROR;
             }
 
@@ -207,19 +207,19 @@ static int wdt_setusec(uint32_t usec)
     }
   while (divisor >= 0x10000);
 
-  dbg("prescaler=0x%x divisor=0x%x\n", prescaler, divisor);
+  wdinfo("prescaler=0x%x divisor=0x%x\n", prescaler, divisor);
 
   mode  = wdt_prescaletoptv(prescaler);
   mode &= ~C5471_TIMER_AUTORELOAD; /* One shot mode. */
   mode |= divisor << 5;
-  dbg("mode=0x%x\n", mode);
+  wdinfo("mode=0x%x\n", mode);
 
   c5471_wdt_cntl = mode;
 
   /* Now start the watchdog */
 
   c5471_wdt_cntl |= C5471_TIMER_STARTBIT;
-  dbg("cntl_timer=0x%x\n", c5471_wdt_cntl);
+  wdinfo("cntl_timer=0x%x\n", c5471_wdt_cntl);
 
   return 0;
 }
@@ -232,19 +232,19 @@ static int wdt_setusec(uint32_t usec)
  * Name: wdt_interrupt
  ****************************************************************************/
 
-static int wdt_interrupt(int irq, void *context)
+static int wdt_interrupt(int irq, void *context, FAR void *arg)
 {
-  dbg("expired\n");
+  wdinfo("expired\n");
 
 #if defined(CONFIG_SOFTWARE_REBOOT)
 #  if defined(CONFIG_SOFTWARE_TEST)
-  dbg("  Test only\n");
+  wdinfo("  Test only\n");
 #  else
-  dbg("  Re-booting\n");
+  wdinfo("  Re-booting\n");
 #    warning "Add logic to reset CPU here"
 #  endif
 #else
-  dbg("  No reboot\n");
+  wdinfo("  No reboot\n");
 #endif
   return OK;
 }
@@ -259,7 +259,7 @@ static ssize_t wdt_read(struct file *filep, char *buffer, size_t buflen)
    * not work if the user provides a buffer smaller than 18 bytes.
    */
 
-  dbg("buflen=%d\n", buflen);
+  wdinfo("buflen=%d\n", buflen);
   if (buflen >= 18)
     {
       sprintf(buffer, "%08x %08x\n", c5471_wdt_cntl, c5471_wdt_count);
@@ -274,7 +274,7 @@ static ssize_t wdt_read(struct file *filep, char *buffer, size_t buflen)
 
 static ssize_t wdt_write(struct file *filep, const char *buffer, size_t buflen)
 {
-  dbg("buflen=%d\n", buflen);
+  wdinfo("buflen=%d\n", buflen);
   if (buflen)
     {
       /* Reset the timer to the maximum delay */
@@ -292,7 +292,7 @@ static ssize_t wdt_write(struct file *filep, const char *buffer, size_t buflen)
 
 static int wdt_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 {
-  dbg("ioctl Call: cmd=0x%x arg=0x%x", cmd, arg);
+  wdinfo("ioctl Call: cmd=0x%x arg=0x%x", cmd, arg);
 
   /* Process the IOCTL command (see arch/watchdog.h) */
 
@@ -315,8 +315,6 @@ static int wdt_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
 static int wdt_open(struct file *filep)
 {
-  dbg("");
-
   if (g_wdtopen)
     {
       return -EBUSY;
@@ -339,11 +337,8 @@ static int wdt_open(struct file *filep)
 
 static int wdt_close(struct file *filep)
 {
-  dbg("");
-
   /* The task controlling the watchdog has terminated.  Take the timer
-   *  the
-   * watchdog in interrupt mode -- we are going to reset unless the
+   * the watchdog in interrupt mode -- we are going to reset unless the
    * reopened again soon.
    */
 
@@ -367,7 +362,7 @@ int up_wdtinit(void)
 {
   int ret;
 
-  dbg("C547x Watchdog Driver\n");
+  wdinfo("C547x Watchdog Driver\n");
 
   /* Register as /dev/wdt */
 
@@ -379,7 +374,7 @@ int up_wdtinit(void)
 
   /* Register for an interrupt level callback through wdt_interrupt */
 
-  dbg("Attach to IRQ=%d\n", C5471_IRQ_WATCHDOG);
+  wdinfo("Attach to IRQ=%d\n", C5471_IRQ_WATCHDOG);
 
   /* Make sure that the timer is stopped */
 
@@ -387,7 +382,7 @@ int up_wdtinit(void)
 
   /* Request the interrupt. */
 
-  ret = irq_attach(C5471_IRQ_WATCHDOG, wdt_interrupt);
+  ret = irq_attach(C5471_IRQ_WATCHDOG, wdt_interrupt, NULL);
   if (ret)
     {
       unregister_driver("/dev/wdt");
diff --git a/arch/arm/src/c5471/chip.h b/arch/arm/src/c5471/chip.h
index 580ae075dcd6a8fef32e505b78ef45e2cd249253..e1f40e58d3e9999a08b232b58e0c5787cbc4e561 100644
--- a/arch/arm/src/c5471/chip.h
+++ b/arch/arm/src/c5471/chip.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * c5471/chip.h
+ * arch/arm/src/c5471/chip.h
  *
  *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __C5471_CHIP_H
-#define __C5471_CHIP_H
+#ifndef __ARCH_ARM_SRC_C5471_CHIP_H
+#define __ARCH_ARM_SRC_C5471_CHIP_H
 
 /****************************************************************************
  * Included Files
@@ -368,4 +368,4 @@
  * Public Function Prototypes
  ****************************************************************************/
 
-#endif  /* __C5471_CHIP_H */
+#endif  /* __ARCH_ARM_SRC_C5471_CHIP_H */
diff --git a/arch/arm/src/calypso/Kconfig b/arch/arm/src/calypso/Kconfig
deleted file mode 100644
index e044280f6269506a88aea11e65cf644a639a958c..0000000000000000000000000000000000000000
--- a/arch/arm/src/calypso/Kconfig
+++ /dev/null
@@ -1,115 +0,0 @@
-#
-# For a description of the syntax of this configuration file,
-# see the file kconfig-language.txt in the NuttX tools repository.
-#
-
-comment "Calypso Configuration Options"
-
-menu "Modem UART Configuration"
-
-config UART_MODEM_BAUD
-	int "Modem UART BAUD"
-	default 115200
-
-config UART_MODEM_PARITY
-	int "Modem UART parity"
-	default 0
-	---help---
-		Modem UART parity.  0=None, 1=Odd, 2=Even.  Default: None
-
-config UART_MODEM_BITS
-	int "Modem UART number of bits"
-	default 8
-	---help---
-		Modem UART number of bits.  Default: 8
-
-config UART_MODEM_2STOP
-	int "Modem UART two stop bits"
-	default 0
-	---help---
-		0=1 stop bit, 1=Two stop bits.  Default: 1 stop bit
-
-config UART_MODEM_RXBUFSIZE
-	int "Modem UART Rx buffer size"
-	default 256
-	---help---
-		Modem UART Rx buffer size.  Default: 256
-
-config UART_MODEM_TXBUFSIZE
-	int "Modem UART Tx buffer size"
-	default 256
-	---help---
-		Modem UART Tx buffer size.  Default: 256
-
-config UART_MODEM_HWFLOWCONTROL
-	bool "Hardware flow control"
-	default n
-	---help---
-		Enabled Modem UART hardware flow control. Default: n
-
-endmenu
-
-menu "IrDA UART Configuration"
-
-config UART_IRDA_BAUD
-	int "IrDA UART BAUD"
-	default 115200
-
-config UART_IRDA_PARITY
-	int "IrDA UART parity"
-	default 0
-	---help---
-		IrDA UART parity.  0=None, 1=Odd, 2=Even.  Default: None
-
-config UART_IRDA_BITS
-	int "IrDA UART number of bits"
-	default 8
-	---help---
-		IrDA UART number of bits.  Default: 8
-
-config UART_IRDA_2STOP
-	int "IrDA UART two stop bits"
-	default 0
-	---help---
-		0=1 stop bit, 1=Two stop bits.  Default: 1 stop bit
-
-config UART_IRDA_RXBUFSIZE
-	int "IrDA UART Rx buffer size"
-	default 256
-	---help---
-		IrDA UART Rx buffer size.  Default: 256
-
-config UART_IRDA_TXBUFSIZE
-	int "IrDA UART Tx buffer size"
-	default 256
-	---help---
-		IrDA UART Tx buffer size.  Default: 256
-
-config UART_IRDA_HWFLOWCONTROL
-	bool "Hardware flow control"
-	default n
-	---help---
-		Enabled IrDA UART hardware flow control. Default: n
-
-endmenu
-
-choice
-	prompt "Serial Console Selection"
-	default SERIAL_CONSOLE_NONE
-	depends on DEV_CONSOLE
-
-# See drivers/Kconfig
-config USE_SERCOMM_CONSOLE
-	bool "SERCOMM console"
-	select SERCOMM_CONSOLE
-
-config SERIAL_MODEM_CONSOLE
-	bool "Serial console on modem UART"
-
-config SERIAL_IRDA_CONSOLE
-	bool "Serial console on IrDA UART"
-
-config SERIAL_CONSOLE_NONE
-	bool "No serial console"
-
-endchoice
diff --git a/arch/arm/src/calypso/Make.defs b/arch/arm/src/calypso/Make.defs
deleted file mode 100644
index c3d6b6b0bb53d4c625c3e08aefc5c8445bc6dc01..0000000000000000000000000000000000000000
--- a/arch/arm/src/calypso/Make.defs
+++ /dev/null
@@ -1,71 +0,0 @@
-############################################################################
-# calypso/Make.defs
-#
-#   Copyright (C) 2007, 2013-2015 Gregory Nutt. All rights reserved.
-#   Author: Gregory Nutt 
-#
-#   Copyright (C) 2011 Stefan Richter. All rights reserved.
-#   Author: Stefan Richter 
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name Gregory Nutt nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-############################################################################
-
-HEAD_ASRC = calypso_head.S
-
-CMN_ASRCS  = up_saveusercontext.S up_fullcontextrestore.S up_vectors.S
-CMN_ASRCS += up_nommuhead.S vfork.S
-CMN_CSRCS  = up_allocateheap.c up_assert.c up_blocktask.c up_copyfullstate.c
-CMN_CSRCS += up_createstack.c up_dataabort.c up_mdelay.c up_udelay.c
-CMN_CSRCS += up_doirq.c up_exit.c up_idle.c up_initialstate.c up_initialize.c
-CMN_CSRCS += up_interruptcontext.c up_prefetchabort.c up_releasepending.c
-CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c
-CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_syscall.c up_unblocktask.c
-CMN_CSRCS += up_undefinedinsn.c up_usestack.c calypso_power.c up_vfork.c
-
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c
-endif
-
-ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
-endif
-
-CHIP_ASRCS  = calypso_lowputc.S
-CHIP_CSRCS  = calypso_irq.c calypso_heap.c calypso_serial.c clock.c
-CHIP_CSRCS += calypso_uwire.c calypso_armio.c calypso_keypad.c
-
-ifeq ($(CONFIG_SPI),y)
-CHIP_CSRCS += calypso_spi.c
-endif
-
-ifneq ($(CONFIG_SCHED_TICKLESS),y)
-CHIP_CSRCS += calypso_timer.c
-endif
diff --git a/arch/arm/src/calypso/calypso_armio.c b/arch/arm/src/calypso/calypso_armio.c
deleted file mode 100644
index c210fa34dce0e2b030308775ad9a30056e5f5d04..0000000000000000000000000000000000000000
--- a/arch/arm/src/calypso/calypso_armio.c
+++ /dev/null
@@ -1,103 +0,0 @@
-/****************************************************************************
- * Driver for shared features of ARMIO modules
- *
- *   Copyright (C) 2011 Stefan Richter. All rights reserved.
- *   Author: Stefan Richter 
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#include 
-
-#include 
-#include 
-
-#include 
-#include 
-
-#include "up_arch.h"
-
-/****************************************************************************
- * HW access
- ****************************************************************************/
-
-#define BASE_ADDR_ARMIO  0xfffe4800
-#define ARMIO_REG(x)     (BASE_ADDR_ARMIO + (x))
-
-enum armio_reg {
-  LATCH_IN        = 0x00,
-  LATCH_OUT       = 0x02,
-  IO_CNTL         = 0x04,
-  CNTL_REG        = 0x06,
-  LOAD_TIM        = 0x08,
-  KBR_LATCH_REG   = 0x0a,
-  KBC_REG         = 0x0c,
-  BUZZ_LIGHT_REG  = 0x0e,
-  LIGHT_LEVEL     = 0x10,
-  BUZZER_LEVEL    = 0x12,
-  GPIO_EVENT_MODE = 0x14,
-  KBD_GPIO_INT    = 0x16,
-  KBD_GPIO_MASKIT = 0x18,
-  GPIO_DEBOUNCING = 0x1a,
-  GPIO_LATCH      = 0x1c,
-};
-
-#define KBD_INT    (1 << 0)
-#define GPIO_INT   (1 << 1)
-
-/****************************************************************************
- * ARMIO interrupt handler
- *   forward keypad events
- *   forward GPIO events
- ****************************************************************************/
-
-static int kbd_gpio_irq(int irq, uint32_t *regs)
-{
-  return calypso_kbd_irq(irq, regs);
-}
-
-/****************************************************************************
- * Initialize ARMIO
- ****************************************************************************/
-
-void calypso_armio(void)
-{
-  /* Enable ARMIO clock */
-
-  putreg16(1 << 5, ARMIO_REG(CNTL_REG));
-
-  /* Mask GPIO interrupt and keypad interrupt */
-
-  putreg16(KBD_INT | GPIO_INT, ARMIO_REG(KBD_GPIO_MASKIT));
-
-  /* Attach and enable the interrupt */
-
-  irq_attach(IRQ_KEYPAD_GPIO, (xcpt_t)kbd_gpio_irq);
-  up_enable_irq(IRQ_KEYPAD_GPIO);
-}
diff --git a/arch/arm/src/calypso/calypso_head.S b/arch/arm/src/calypso/calypso_head.S
deleted file mode 100644
index eb83b68516f261043edeb713474cb864fda7b5d2..0000000000000000000000000000000000000000
--- a/arch/arm/src/calypso/calypso_head.S
+++ /dev/null
@@ -1,23 +0,0 @@
-/* Place a branch to the real head at the entry point */
-.section .text.start
-	b	__start
-
-
-/* Exception Vectors like they are needed for the exception vector
-   indirection of the internal boot ROM.  The following section must
-   be liked to appear at 0x80001c */
-.section .text.exceptions
-_undef_instr:
-	b	up_vectorundefinsn
-_sw_interr:
-	b	up_vectorswi
-_prefetch_abort:
-	b	up_vectorprefetch
-_data_abort:
-	b	up_vectordata
-_reserved:
-	b	_reserved
-_irq:
-	b	up_vectorirq
-_fiq:
-	b	up_vectorfiq
diff --git a/arch/arm/src/calypso/calypso_irq.c b/arch/arm/src/calypso/calypso_irq.c
deleted file mode 100644
index 85f4f084589bb7ac4e68b25f5761191a3bdcfdd3..0000000000000000000000000000000000000000
--- a/arch/arm/src/calypso/calypso_irq.c
+++ /dev/null
@@ -1,357 +0,0 @@
-/****************************************************************************
- * arch/arm/src/calypso/calypso_irq.c
- * Driver for Calypso IRQ controller
- *
- * (C) 2010 by Harald Welte 
- * (C) 2011 by Stefan Richter 
- *
- * This source code is derivated from Osmocom-BB project and was
- * relicensed as BSD with permission from original authors.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include 
-
-#include 
-#include 
-
-#include 
-#include 
-
-#include 
-#include 
-
-#include "arm.h"
-#include "up_internal.h"
-#include "up_arch.h"
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-#define BASE_ADDR_IRQ       0xfffffa00
-#define BASE_ADDR_IBOOT_EXC 0x0080001C
-
-enum irq_reg
-{
-  IT_REG1      = 0x00,
-  IT_REG2      = 0x02,
-  MASK_IT_REG1 = 0x08,
-  MASK_IT_REG2 = 0x0a,
-  IRQ_NUM      = 0x10,
-  FIQ_NUM      = 0x12,
-  IRQ_CTRL     = 0x14,
-};
-
-#define ILR_IRQ(x)  (0x20 + (x*2))
-#define IRQ_REG(x)  (BASE_ADDR_IRQ + (x))
-
-#ifndef ARRAY_SIZE
-#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
-#endif
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/* g_current_regs[] holds a references to the current interrupt level
- * register storage structure.  If is non-NULL only during interrupt
- * processing.  Access to g_current_regs[] must be through the macro
- * CURRENT_REGS for portability.
- */
-
-volatile uint32_t *g_current_regs[1];
-extern uint32_t _exceptions;
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-static uint8_t default_irq_prio[] =
-{
-  [IRQ_WATCHDOG]       = 0xff,
-  [IRQ_TIMER1]         = 0xff,
-  [IRQ_TIMER2]         = 0xff,
-  [IRQ_TSP_RX]         = 0,
-  [IRQ_TPU_FRAME]      = 3,
-  [IRQ_TPU_PAGE]       = 0xff,
-  [IRQ_SIMCARD]        = 0xff,
-  [IRQ_UART_MODEM]     = 8,
-  [IRQ_KEYPAD_GPIO]    = 4,
-  [IRQ_RTC_TIMER]      = 9,
-  [IRQ_RTC_ALARM_I2C]  = 10,
-  [IRQ_ULPD_GAUGING]   = 2,
-  [IRQ_EXTERNAL]       = 12,
-  [IRQ_SPI]            = 0xff,
-  [IRQ_DMA]            = 0xff,
-  [IRQ_API]            = 0xff,
-  [IRQ_SIM_DETECT]     = 0,
-  [IRQ_EXTERNAL_FIQ]   = 7,
-  [IRQ_UART_IRDA]      = 2,
-  [IRQ_ULPD_GSM_TIMER] = 1,
-  [IRQ_GEA]            = 0xff,
-};
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
-static void _irq_enable(enum irq_nr nr, int enable)
-{
-  uintptr_t reg = IRQ_REG(MASK_IT_REG1);
-  uint16_t val;
-
-  if (nr > 15)
-    {
-      reg = IRQ_REG(MASK_IT_REG2);
-      nr -= 16;
-    }
-
-  val = getreg16(reg);
-  if (enable)
-    {
-      val &= ~(1 << nr);
-    }
-  else
-    {
-      val |= (1 << nr);
-    }
-
-  putreg16(val, reg);
-}
-
-static void set_default_priorities(void)
-{
-  unsigned int i;
-
-  for (i = 0; i < ARRAY_SIZE(default_irq_prio); i++)
-    {
-      uint16_t val;
-      uint8_t prio = default_irq_prio[i];
-
-      if (prio > 31)
-        {
-          prio = 31;
-        }
-
-      val = getreg16(IRQ_REG(ILR_IRQ(i)));
-      val &= ~(0x1f << 2);
-      val |= prio << 2;
-
-      /* Make edge mode default. Hopefully causes less trouble */
-
-      val |= 0x02;
-
-      putreg16(val, IRQ_REG(ILR_IRQ(i)));
-    }
-}
-
-/* Install the exception handlers to where the ROM loader jumps */
-
-static void calypso_exceptions_install(void)
-{
-  uint32_t *exceptions_dst = (uint32_t *) BASE_ADDR_IBOOT_EXC;
-  uint32_t *exceptions_src = &_exceptions;
-  int i;
-
-  for (i = 0; i < 7; i++)
-    {
-      *exceptions_dst++ = *exceptions_src++;
-    }
-}
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_irqinitialize
- *
- * Description:
- *   Setup the IRQ and FIQ controllers
- *
- ****************************************************************************/
-
-void up_irqinitialize(void)
-{
-  /* Prepare hardware */
-
-  calypso_exceptions_install();
-  CURRENT_REGS = NULL;
-
-  /* Switch to internal ROM */
-
-  calypso_bootrom(1);
-
-  /* Set default priorities */
-
-  set_default_priorities();
-
-  /* Mask all interrupts off */
-
-  putreg16(0xffff, IRQ_REG(MASK_IT_REG1));
-  putreg16(0xffff, IRQ_REG(MASK_IT_REG2));
-
-  /* clear all pending interrupts */
-  putreg16(0, IRQ_REG(IT_REG1));
-  putreg16(0, IRQ_REG(IT_REG2));
-
-  /* Enable interrupts globally to the ARM core */
-
-#ifndef CONFIG_SUPPRESS_INTERRUPTS
-  up_irq_restore(SVC_MODE | PSR_F_BIT);
-#endif
-}
-
-/****************************************************************************
- * Name: up_disable_irq
- *
- * Description:
- *   Disable the IRQ specified by 'irq'
- *
- ****************************************************************************/
-
-void up_disable_irq(int irq)
-{
-  if ((unsigned)irq < NR_IRQS)
-    {
-      _irq_enable(irq, 0);
-    }
-}
-
-/****************************************************************************
- * Name: up_enable_irq
- *
- * Description:
- *   Enable the IRQ specified by 'irq'
- *
- ****************************************************************************/
-
-void up_enable_irq(int irq)
-{
-  if ((unsigned)irq < NR_IRQS)
-    {
-      _irq_enable(irq, 1);
-    }
-}
-
-/****************************************************************************
- * Name: up_prioritize_irq
- *
- * Description:
- *   Set the priority of an IRQ.
- *
- ****************************************************************************/
-
-#ifndef CONFIG_ARCH_IRQPRIO
-int up_prioritize_irq(int nr, int prio)
-{
-  uint16_t val;
-
-  if (prio == -1)
-    {
-      prio = default_irq_prio[nr];
-    }
-
-  if (prio > 31)
-    {
-      prio = 31;
-    }
-
-  val = prio << 2;
-  putreg16(val, IRQ_REG(ILR_IRQ(nr)));
-
-  return 0;
-}
-#endif
-
-/****************************************************************************
- * Entry point for interrupts
- ****************************************************************************/
-
-void up_decodeirq(uint32_t *regs)
-{
-  uint8_t num, tmp;
-  uint32_t *saved_regs;
-
-  /* XXX: What is this???
-   * Passed to but ignored in IRQ handlers
-   * Only valid meaning is apparently non-NULL == IRQ context */
-
-  saved_regs = (uint32_t *)CURRENT_REGS;
-  CURRENT_REGS = regs;
-
-  /* Detect & deliver the IRQ */
-
-  num = getreg8(IRQ_REG(IRQ_NUM)) & 0x1f;
-  irq_dispatch(num, regs);
-
-  /* Start new IRQ agreement */
-
-  tmp = getreg8(IRQ_REG(IRQ_CTRL));
-  tmp |= 0x01;
-  putreg8(tmp, IRQ_REG(IRQ_CTRL));
-
-  CURRENT_REGS = saved_regs;
-}
-
-/****************************************************************************
- * Entry point for FIQs
- ****************************************************************************/
-
-void calypso_fiq(void)
-{
-  uint8_t num, tmp;
-  uint32_t *regs;
-
-  /* XXX: What is this???
-   * Passed to but ignored in IRQ handlers
-   * Only valid meaning is apparently non-NULL == IRQ context */
-
-  regs = (uint32_t *)CURRENT_REGS;
-  CURRENT_REGS = (uint32_t *)#
-
-  /* Detect & deliver like an IRQ but we are in FIQ context */
-
-  num = getreg8(IRQ_REG(FIQ_NUM)) & 0x1f;
-  irq_dispatch(num, regs);
-
-  /* Start new FIQ agreement */
-
-  tmp = getreg8(IRQ_REG(IRQ_CTRL));
-  tmp |= 0x02;
-  putreg8(tmp, IRQ_REG(IRQ_CTRL));
-
-  CURRENT_REGS = regs;
-}
diff --git a/arch/arm/src/calypso/calypso_keypad.c b/arch/arm/src/calypso/calypso_keypad.c
deleted file mode 100644
index 2430667ca553012fdcec47709e6576c4ec6d3eb0..0000000000000000000000000000000000000000
--- a/arch/arm/src/calypso/calypso_keypad.c
+++ /dev/null
@@ -1,380 +0,0 @@
-/****************************************************************************
- * Driver for Calypso keypad hardware
- *
- *   Copyright (C) 2011 Stefan Richter. All rights reserved.
- *   Author: Stefan Richter 
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#include 
-
-#include 
-#include 
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-#include 
-#include 
-#include 
-
-/****************************************************************************
- * HW access
- ****************************************************************************/
-
-#define BASE_ADDR_ARMIO 0xfffe4800
-#define ARMIO_REG(x)    ((void *)BASE_ADDR_ARMIO + (x))
-
-enum armio_reg
-{
-  LATCH_IN = 0x00,
-  LATCH_OUT = 0x02,
-  IO_CNTL = 0x04,
-  CNTL_REG = 0x06,
-  LOAD_TIM = 0x08,
-  KBR_LATCH_REG = 0x0a,
-  KBC_REG = 0x0c,
-  BUZZ_LIGHT_REG = 0x0e,
-  LIGHT_LEVEL = 0x10,
-  BUZZER_LEVEL = 0x12,
-  GPIO_EVENT_MODE = 0x14,
-  KBD_GPIO_INT = 0x16,
-  KBD_GPIO_MASKIT = 0x18,
-  GPIO_DEBOUNCING = 0x1a,
-  GPIO_LATCH = 0x1c,
-};
-
-#define KBD_INT     (1 << 0)
-#define GPIO_INT    (1 << 1)
-
-/****************************************************************************
- * Decoder functions for matrix and power button
- ****************************************************************************/
-
-static int btn_dec(uint32_t * btn_state, uint8_t col, uint8_t reg,
-                   char *buf, size_t buflen, size_t * len)
-{
-  uint8_t diff = (*btn_state ^ reg) & 0x1f;
-
-  while (diff)
-    {
-      uint8_t val = diff & ~(diff - 1);
-      uint8_t sc = val >> 1;
-      sc |= sc << 2;
-      sc += col;
-      sc += (sc & 0x20) ? 0x26 : 0x3f;
-
-      if (reg & val)
-        {
-          sc |= 0x20;
-        }
-
-      /* Check for space in buffer and dispatch */
-
-      if (*len < buflen)
-        {
-          buf[(*len)++] = sc;
-        }
-      else
-        {
-          break;
-        }
-
-      /* Only change diff if dispatched/buffer not full */
-
-      diff ^= val;
-    }
-
-  /* Store new state of the buttons (but only if they where dispatch) */
-
-  *btn_state >>= 5;
-#ifdef INCLUDE_ALL_COLS
-  *btn_state |= (reg ^ diff) << 20;
-#else
-  *btn_state |= (reg ^ diff) << 15;
-#endif
-  return diff;
-}
-
-static int pwr_btn_dec(uint32_t * state, uint8_t reg, char *buf, size_t * len)
-{
-  if (reg)
-    {
-      /* Check for pressed power button. If pressed, ignore other
-       * buttons since it collides with an entire row.
-       */
-
-      if (~*state & 0x80000000)
-        {
-          buf[0] = 'z';
-          *len = 1;
-          *state |= 0x80000000;
-        }
-
-      return 1; /* break loop in caller */
-    }
-  else
-    {
-      /* Check for released power button. */
-
-      if (*state & 0x80000000)
-        {
-          buf[0] = 'Z';
-          *len = 1;
-
-          *state &= 0x7fffffff;
-
-          /* Don't scan others when released; might trigger
-           * false keystrokes otherwise
-           */
-
-          return 1;
-        }
-    }
-
-  return 0; /* Continue with other columns */
-}
-
-/****************************************************************************
- * Keypad: Fileops Prototypes and Structures
- ****************************************************************************/
-
-typedef FAR struct file file_t;
-
-static int keypad_open(file_t * filep);
-static int keypad_close(file_t * filep);
-static ssize_t keypad_read(file_t * filep, FAR char *buffer, size_t buflen);
-#ifndef CONFIG_DISABLE_POLL
-static int keypad_poll(file_t * filep, FAR struct pollfd *fds, bool setup);
-#endif
-
-static const struct file_operations keypad_ops =
-{
-  keypad_open,                  /* open */
-  keypad_close,                 /* close */
-  keypad_read,                  /* read */
-  0,                            /* write */
-  0,                            /* seek */
-  0,                            /* ioctl */
-#ifndef CONFIG_DISABLE_POLL
-  keypad_poll                   /* poll */
-#endif
-};
-
-static sem_t kbdsem;
-
-/****************************************************************************
- * Keypad: Fileops
- ****************************************************************************/
-
-static int keypad_open(file_t * filep)
-{
-  register uint16_t reg;
-
-  /* Unmask keypad interrupt */
-
-  reg = readw(ARMIO_REG(KBD_GPIO_MASKIT));
-  writew(reg & ~KBD_INT, ARMIO_REG(KBD_GPIO_MASKIT));
-
-  return OK;
-}
-
-static int keypad_close(file_t * filep)
-{
-  register uint16_t reg;
-
-  /* Mask keypad interrupt */
-
-  reg = readw(ARMIO_REG(KBD_GPIO_MASKIT));
-  writew(reg | KBD_INT, ARMIO_REG(KBD_GPIO_MASKIT));
-
-  return OK;
-}
-
-static ssize_t keypad_read(file_t * filep, FAR char *buf, size_t buflen)
-{
-  static uint32_t btn_state = 0;
-  register uint16_t reg;
-  uint16_t col, col_mask;
-  size_t len = 0;
-
-  if (buf == NULL || buflen < 1)
-    {
-      /* Well... nothing to do */
-
-      return -EINVAL;
-    }
-
-retry:
-  col = 1;
-  col_mask = 0x1e;
-
-  if (!btn_state)
-    {
-      /* Drive all cols low such that all buttons cause events */
-
-      writew(0, ARMIO_REG(KBC_REG));
-
-      /* No button currently pressed, use IRQ */
-
-      reg = readw(ARMIO_REG(KBD_GPIO_MASKIT));
-      writew(reg & ~KBD_INT, ARMIO_REG(KBD_GPIO_MASKIT));
-      sem_wait(&kbdsem);
-    }
-  else
-    {
-      writew(0x1f, ARMIO_REG(KBC_REG));
-      usleep(80000);
-    }
-
-  /* Scan columns */
-
-#ifdef INCLUDE_ALL_COLS
-  while (col <= 6)
-    {
-#else
-  while (col <= 5)
-    {
-#endif
-      /* Read keypad latch and immediately set new column since
-       * synchronization takes about 5usec. For the 1st round, the
-       * interrupt has prepared this and the context switch takes
-       * long enough to serve as a delay.
-       */
-
-      reg = readw(ARMIO_REG(KBR_LATCH_REG));
-      writew(col_mask, ARMIO_REG(KBC_REG));
-
-      /* Turn pressed buttons into 1s */
-
-      reg = 0x1f & ~reg;
-
-      if (col == 1)
-        {
-          /* Power/End switch */
-
-          if (pwr_btn_dec(&btn_state, reg, buf, &len))
-            {
-              break;
-            }
-        }
-      else
-        {
-          /* Non-power switches */
-
-          if (btn_dec(&btn_state, col, reg, buf, buflen, &len))
-            {
-              break;
-            }
-        }
-
-      /* Select next column and respective mask */
-
-      col_mask = 0x1f & ~(1 << col++);
-
-      /* We have to wait for synchronization of the inputs. The
-       * processing is too fast if no/few buttons are processed.
-       */
-
-      usleep(5);
-
-      /* XXX: usleep seems to suffer hugh overhead. Better this!?
-       * If nothing else can be done, it's overhead still wastes
-       * time 'usefully'.
-       */
-      /* sched_yield(); up_udelay(2); */
-    }
-
-  /* If we don't have anything to return, retry to avoid EOF */
-
-  if (!len)
-    {
-      goto retry;
-    }
-
-  return len;
-}
-
-/****************************************************************************
- * Keypad interrupt handler
- *   mask interrupts
- *   prepare column drivers for scan
- *   posts keypad semaphore
- ****************************************************************************/
-
-int calypso_kbd_irq(int irq, uint32_t * regs)
-{
-  register uint16_t reg;
-
-  /* Mask keypad interrupt */
-
-  reg = readw(ARMIO_REG(KBD_GPIO_MASKIT));
-  writew(reg | KBD_INT, ARMIO_REG(KBD_GPIO_MASKIT));
-
-  /* Turn off column drivers */
-
-  writew(0x1f, ARMIO_REG(KBC_REG));
-
-  /* Let the userspace know */
-
-  sem_post(&kbdsem);
-
-  return 0;
-}
-
-/****************************************************************************
- * Initialize device, add /dev/... nodes
- ****************************************************************************/
-
-void up_keypad(void)
-{
-  /* Semaphore; helps leaving IRQ ctx as soon as possible */
-
-  sem_init(&kbdsem, 0, 0);
-
-  /* Drive cols low in idle state such that all buttons cause events */
-
-  writew(0, ARMIO_REG(KBC_REG));
-
-  (void)register_driver("/dev/keypad", &keypad_ops, 0444, NULL);
-}
-
-int keypad_kbdinit(void)
-{
-  calypso_armio();
-  up_keypad();
-
-  return OK;
-}
diff --git a/arch/arm/src/calypso/calypso_power.c b/arch/arm/src/calypso/calypso_power.c
deleted file mode 100644
index 11b51a629bf63315435e70725a0df8bd4f47ed56..0000000000000000000000000000000000000000
--- a/arch/arm/src/calypso/calypso_power.c
+++ /dev/null
@@ -1,50 +0,0 @@
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include 
-
-#include 
-
-#include 
-#include 
-
-#include "calypso_spi.h"
-
-/****************************************************************************
- * Name: board_power_off
- *
- * Description:
- *   Power off the board.
- *
- *   If this function returns, then it was not possible to power-off the
- *   board due to some other constraints.
- *
- * Input Parameters:
- *   status - Status information provided with the power off event.
- *
- * Returned Value:
- *   If this function returns, then it was not possible to power-off the
- *   board due to some constraints.  The return value int this case is a
- *   board-specific reason for the failure to shutdown.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_BOARDCTL_POWEROFF
-int board_power_off(int status)
-{
-  struct spi_dev_s *spi = calypso_spibus_initialize(0);
-  uint16_t tx;
-
-  SPI_SETBITS(spi, 16);
-  (void)SPI_HWFEATURES(spi, 0);
-
-  tx = (1 << 6) | (1 << 1);
-  SPI_SNDBLOCK(spi, &tx, 1);
-
-  tx = (1 << 6) | (30 << 1);
-  SPI_SNDBLOCK(spi, &tx, 1);
-
-  return 0;
-}
-#endif
diff --git a/arch/arm/src/calypso/calypso_serial.c b/arch/arm/src/calypso/calypso_serial.c
deleted file mode 100644
index 0c4a44c0c14d90c08489ed35ac9e388a12c10aab..0000000000000000000000000000000000000000
--- a/arch/arm/src/calypso/calypso_serial.c
+++ /dev/null
@@ -1,968 +0,0 @@
-/****************************************************************************
- * arch/arm/src/calypso/calypso_serial.c
- *
- *   Copyright (C) 2011 Stefan Richter. All rights reserved.
- *   Author: Stefan Richter 
- *
- * based on c5471/c5471_serial.c
- *   Copyright (C) 2007-2009, 2013 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-#include 
-#include 
-#include 
-
-#include "chip.h"
-#include "up_arch.h"
-#include "up_internal.h"
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-#define BASE_BAUD     115200
-
-#if defined(CONFIG_UART_IRDA_HWFLOWCONTROL) || defined(CONFIG_UART_MODEM_HWFLOWCONTROL)
-# define CONFIG_UART_HWFLOWCONTROL
-#endif
-
-#if UART_FCR_OFFS == UART_EFR_OFFS
-# define UART_MULTIPLEX_REGS
-
-/* HW flow control not supported yet */
-
-# undef  CONFIG_UART_HWFLOWCONTROL
-#endif
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-struct uart_regs_s
-{
-  uint32_t  ier;
-  uint32_t  lcr;
-  uint32_t  fcr;
-#ifdef CONFIG_UART_HWFLOWCONTROL
-  uint32_t  efr;
-  uint32_t  tcr;
-#endif
-};
-
-struct up_dev_s
-{
-  unsigned int         uartbase;    /* Base address of UART registers */
-  unsigned int         baud_base;   /* Base baud for conversions */
-  unsigned int         baud;        /* Configured baud */
-  uint8_t              xmit_fifo_size; /* Size of transmit FIFO */
-  uint8_t              irq;         /* IRQ associated with this UART */
-  uint8_t              parity;      /* 0=none, 1=odd, 2=even */
-  uint8_t              bits;        /* Number of bits (7 or 8) */
-#ifdef CONFIG_UART_HWFLOWCONTROL
-  bool                 flowcontrol; /* true: Hardware flow control
-                                     * is enabled. */
-#endif
-  bool                 stopbits2;   /* true: Configure with 2
-                                     * stop bits instead of 1 */
-  struct uart_regs_s   regs;        /* Shadow copy of readonly regs */
-
-#ifdef CONFIG_SERCOMM_CONSOLE
-  bool                 sercomm;     /* Call sercomm in interrupt if true */
-#endif
-};
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-static int  up_setup(struct uart_dev_s *dev);
-static void up_shutdown(struct uart_dev_s *dev);
-static int  up_attach(struct uart_dev_s *dev);
-static void up_detach(struct uart_dev_s *dev);
-static int  up_interrupt(int irq, void *context);
-static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
-static int  up_receive(struct uart_dev_s *dev, unsigned int *status);
-static void up_rxint(struct uart_dev_s *dev, bool enable);
-static bool up_rxavailable(struct uart_dev_s *dev);
-static void up_send(struct uart_dev_s *dev, int ch);
-static void up_txint(struct uart_dev_s *dev, bool enable);
-static bool up_txready(struct uart_dev_s *dev);
-static bool up_txempty(struct uart_dev_s *dev);
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-static const struct uart_ops_s g_uart_ops =
-{
-  .setup          = up_setup,
-  .shutdown       = up_shutdown,
-  .attach         = up_attach,
-  .detach         = up_detach,
-  .ioctl          = up_ioctl,
-  .receive        = up_receive,
-  .rxint          = up_rxint,
-  .rxavailable    = up_rxavailable,
-#ifdef CONFIG_SERIAL_IFLOWCONTROL
-  .rxflowcontrol  = NULL,
-#endif
-  .send           = up_send,
-  .txint          = up_txint,
-  .txready        = up_txready,
-  .txempty        = up_txempty,
-};
-
-/* I/O buffers */
-
-static char g_irdarxbuffer[CONFIG_UART_IRDA_RXBUFSIZE];
-static char g_irdatxbuffer[CONFIG_UART_IRDA_TXBUFSIZE];
-static char g_modemrxbuffer[CONFIG_UART_MODEM_RXBUFSIZE];
-static char g_modemtxbuffer[CONFIG_UART_MODEM_TXBUFSIZE];
-
-/* This describes the state of the C5471 serial IRDA port. */
-
-static struct up_dev_s g_irdapriv =
-{
-  .xmit_fifo_size = UART_IRDA_XMIT_FIFO_SIZE,
-  .baud_base      = BASE_BAUD,
-  .uartbase       = UART_IRDA_BASE,
-  .baud           = CONFIG_UART_IRDA_BAUD,
-  .irq            = UART_IRQ_IRDA,
-  .parity         = CONFIG_UART_IRDA_PARITY,
-  .bits           = CONFIG_UART_IRDA_BITS,
-#ifdef CONFIG_UART_IRDA_HWFLOWCONTROL
-  .flowcontrol    = true,
-#endif
-  .stopbits2      = CONFIG_UART_IRDA_2STOP,
-
-#ifdef CONFIG_SERCOMM_CONSOLE
-  .sercomm        = false,
-#endif
-};
-
-static uart_dev_t g_irdaport =
-{
-  .recv     =
-  {
-    .size   = CONFIG_UART_IRDA_RXBUFSIZE,
-    .buffer = g_irdarxbuffer,
-  },
-  .xmit     =
-  {
-    .size   = CONFIG_UART_IRDA_TXBUFSIZE,
-    .buffer = g_irdatxbuffer,
-   },
-  .ops      = &g_uart_ops,
-  .priv     = &g_irdapriv,
-};
-
-/* This describes the state of the C5471 serial Modem port. */
-
-static struct up_dev_s g_modempriv =
-{
-  .xmit_fifo_size = UART_XMIT_FIFO_SIZE,
-  .baud_base      = BASE_BAUD,
-  .uartbase       = UART_MODEM_BASE,
-  .baud           = CONFIG_UART_MODEM_BAUD,
-  .irq            = UART_IRQ_MODEM,
-  .parity         = CONFIG_UART_MODEM_PARITY,
-  .bits           = CONFIG_UART_MODEM_BITS,
-#ifdef CONFIG_UART_MODEM_HWFLOWCONTROL
-  .flowcontrol    = true,
-#endif
-  .stopbits2      = CONFIG_UART_MODEM_2STOP,
-
-#ifdef CONFIG_SERCOMM_CONSOLE
-  .sercomm        = false,
-#endif
-};
-
-static uart_dev_t g_modemport =
-{
-  .recv     =
-  {
-    .size   = CONFIG_UART_MODEM_RXBUFSIZE,
-    .buffer = g_modemrxbuffer,
-  },
-  .xmit     =
-  {
-    .size   = CONFIG_UART_MODEM_TXBUFSIZE,
-    .buffer = g_modemtxbuffer,
-  },
-  .ops      = &g_uart_ops,
-  .priv     = &g_modempriv,
-};
-
-/* Now, which one with be tty0/console and which tty1? */
-
-#ifdef CONFIG_SERIAL_IRDA_CONSOLE
-# define CONSOLE_DEV     g_irdaport
-# define TTYS0_DEV       g_irdaport
-# define TTYS1_DEV       g_modemport
-#else
-# define CONSOLE_DEV     g_modemport
-# define TTYS0_DEV       g_modemport
-# define TTYS1_DEV       g_irdaport
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_inserial
- ****************************************************************************/
-
-static inline uint32_t up_inserial(struct up_dev_s *priv, uint32_t offset)
-{
-#if UART_REGISTER_BITS == 8
-  return getreg8(priv->uartbase + offset);
-#elif UART_REGISTER_BITS == 32
-  return getreg32(priv->uartbase + offset);
-#else
-#error Unsupported number of bits set in UART_REGISTER_BITS
-#endif
-}
-
-/****************************************************************************
- * Name: up_serialout
- ****************************************************************************/
-
-static inline void up_serialout(struct up_dev_s *priv, uint32_t offset, uint32_t value)
-{
-#if UART_REGISTER_BITS == 8
-  putreg8(value & 0xff, priv->uartbase + offset);
-#elif UART_REGISTER_BITS == 32
-  putreg32(value, priv->uartbase + offset);
-#endif
-}
-
-/****************************************************************************
- * Name: up_disableuartint
- ****************************************************************************/
-
-static inline void up_disableuartint(struct up_dev_s *priv, uint16_t *ier)
-{
-  if (ier)
-    {
-      *ier = priv->regs.ier & UART_IER_INTMASK;
-    }
-  priv->regs.ier &= ~UART_IER_INTMASK;
-  up_serialout(priv, UART_IER_OFFS, priv->regs.ier);
-}
-
-/****************************************************************************
- * Name: up_restoreuartint
- ****************************************************************************/
-
-static inline void up_restoreuartint(struct up_dev_s *priv, uint16_t ier)
-{
-  priv->regs.ier |= ier & (UART_IER_RECVINT | UART_IER_XMITINT);
-  up_serialout(priv, UART_IER_OFFS, priv->regs.ier);
-}
-
-/****************************************************************************
- * Name: up_waittxready
- ****************************************************************************/
-
-static inline void up_waittxready(struct up_dev_s *priv)
-{
-  int tmp;
-
-  for (tmp = 1000 ; tmp > 0 ; tmp--)
-    {
-      if ((up_inserial(priv, UART_SSR_OFFS) & UART_SSR_TXFULL) == 0)
-        {
-          break;
-        }
-    }
-}
-/****************************************************************************
- * Name: up_disablebreaks
- ****************************************************************************/
-
-static inline void up_disablebreaks(struct up_dev_s *priv)
-{
-  priv->regs.lcr &= ~UART_LCR_BOC;
-  up_serialout(priv, UART_LCR_OFFS, priv->regs.lcr);
-}
-
-/****************************************************************************
- * Name: up_enablebreaks
- ****************************************************************************/
-
-static inline void up_enablebreaks(struct up_dev_s *priv)
-{
-  priv->regs.lcr |= UART_LCR_BOC;
-  up_serialout(priv, UART_LCR_OFFS, priv->regs.lcr);
-}
-
-/****************************************************************************
- * Name: up_setrate
- ****************************************************************************/
-
-static inline void up_setrate(struct up_dev_s *priv, unsigned int rate)
-{
-  uint32_t div_bit_rate;
-
-  switch (rate)
-    {
-    case 115200:
-      div_bit_rate = BAUD_115200;
-      break;
-    case 57600:
-      div_bit_rate = BAUD_57600;
-      break;
-    case 38400:
-      div_bit_rate = BAUD_38400;
-      break;
-    case 19200:
-      div_bit_rate = BAUD_19200;
-      break;
-    case 4800:
-      div_bit_rate = BAUD_4800;
-      break;
-    case 2400:
-      div_bit_rate = BAUD_2400;
-      break;
-    case 1200:
-      div_bit_rate = BAUD_1200;
-      break;
-    case 9600:
-    default:
-      div_bit_rate = BAUD_9600;
-      break;
-    }
-
-#ifdef UART_DIV_BIT_RATE_OFFS
-  up_serialout(priv, UART_DIV_BIT_RATE_OFFS, div_bit_rate);
-#else
-  up_serialout(priv, UART_DIV_LOW_OFFS, div_bit_rate);
-  up_serialout(priv, UART_DIV_HIGH_OFFS, div_bit_rate >> 8);
-#endif
-}
-
-/****************************************************************************
- * Name: up_setup
- *
- * Description:
- *   Configure the UART baud, bits, parity, fifos, etc. This
- *   method is called the first time that the serial port is
- *   opened.
- *
- ****************************************************************************/
-#include 
-static int up_setup(struct uart_dev_s *dev)
-{
-#ifndef CONFIG_SUPPRESS_UART_CONFIG
-  struct up_dev_s *priv = dev->priv;
-  unsigned int cval;
-
-  if (priv->bits == 7)
-    {
-      cval = UART_LCR_7BITS;
-    }
-  else
-    {
-      cval = UART_LCR_8BITS;
-    }
-
-  if (priv->stopbits2)
-    {
-      cval |= UART_LCR_2STOP;
-    }
-
-  if (priv->parity == 1)   /* Odd parity */
-    {
-      cval |= (UART_LCR_PAREN | UART_LCR_PARODD);
-    }
-  else if (priv->parity == 2)  /* Even parity */
-    {
-      cval |= (UART_LCR_PAREN | UART_LCR_PAREVEN);
-    }
-
-  /* Both the IrDA and MODEM UARTs support RESET and UART mode. */
-
-  up_serialout(priv, UART_MDR_OFFS, MDR_RESET_MODE);
-  up_serialout(priv, UART_LCR_OFFS, 0xbf);
-  up_serialout(priv, UART_XON1_OFFS, 0x00);
-  up_serialout(priv, UART_XON2_OFFS, 0x00);
-  up_serialout(priv, UART_XOFF1_OFFS, 0x00);
-  up_serialout(priv, UART_XOFF2_OFFS, 0x00);
-  up_serialout(priv, UART_EFR_OFFS, 0x00);
-  up_serialout(priv, UART_LCR_OFFS, 0x00);
-  up_mdelay(5);
-
-  up_serialout(priv, UART_MDR_OFFS, MDR_UART_MODE);
-  up_mdelay(5);
-
-  priv->regs.ier = up_inserial(priv, UART_IER_OFFS);
-  priv->regs.lcr = up_inserial(priv, UART_LCR_OFFS);
-#ifdef CONFIG_UART_HWFLOWCONTROL
-  if (priv->flowcontrol)
-    {
-      priv->regs.efr = up_inserial(priv, UART_EFR_OFFS);
-      priv->regs.tcr = up_inserial(priv, UART_TCR_OFFS);
-    }
-#endif
-
-  up_disableuartint(priv, NULL);
-
-#ifdef UART_MULTIPLEX_REGS
-  up_serialout(priv, UART_LCR_OFFS, 0x00bf);
-#endif
-
-  up_serialout(priv, UART_EFR_OFFS,  0x0010);           /* Unprotect enhanced control */
-
-#ifdef UART_MULTIPLEX_REGS
-  priv->regs.lcr = 0x80;
-  up_serialout(priv, UART_LCR_OFFS, priv->regs.lcr);
-  //up_serialout(priv, UART_MCR_OFFS, 1 << 4);          /* loopback */
-#endif
-
-  up_serialout(priv, UART_TFCR_OFFS, 0);                /* Reset to 0 */
-  up_serialout(priv, UART_RFCR_OFFS, UART_FCR_RX_CLR);  /* Clear RX fifo */
-  up_serialout(priv, UART_TFCR_OFFS, UART_FCR_TX_CLR);  /* Clear TX fifo */
-  priv->regs.fcr = UART_FCR_FIFO_EN;
-  up_serialout(priv, UART_TFCR_OFFS, priv->regs.fcr); /* Enable RX/TX fifos */
-
-  up_disablebreaks(priv);
-
-  /* Set the RX and TX trigger levels to the minimum */
-
-  priv->regs.fcr = (priv->regs.fcr & 0xffffff0f) | UART_FCR_FTL;
-  up_serialout(priv, UART_RFCR_OFFS, priv->regs.fcr);
-
-  up_setrate(priv, priv->baud);
-
-#ifdef UART_MULTIPLEX_REGS
-  up_serialout(priv, UART_SCR_OFFS, 1);  /* Disable DMA */
-  priv->regs.lcr = (uint32_t)cval;       /* Configure mode, return to THR/RHR */
-#else
-  priv->regs.lcr &= 0xffffffe0;       /* clear original field, and... */
-  priv->regs.lcr |= (uint32_t)cval;   /* Set new bits in that field. */
-#endif
-  up_serialout(priv, UART_LCR_OFFS, priv->regs.lcr);
-
-#ifdef CONFIG_UART_HWFLOWCONTROL
-  if (priv->flowcontrol)
-    {
-      /* Set the FIFO level triggers for flow control
-       * Halt = 48 bytes, resume = 12 bytes
-       */
-
-      priv->regs.tcr = (priv->regs.tcr & 0xffffff00) | 0x0000003c;
-      up_serialout(priv, UART_TCR_OFFS, priv->regs.tcr);
-
-      /* Enable RTS/CTS flow control */
-
-      priv->regs.efr |= 0x000000c0;
-      up_serialout(priv, UART_EFR_OFFS, priv->regs.efr);
-    }
-  else
-    {
-      /* Disable RTS/CTS flow control */
-
-      priv->regs.efr &= 0xffffff3f;
-      up_serialout(priv, UART_EFR_OFFS, priv->regs.efr);
-    }
-#endif
-#endif
-  return OK;
-}
-
-/****************************************************************************
- * Name: up_shutdown
- *
- * Description:
- *   Disable the UART.  This method is called when the serial port is closed
- *
- ****************************************************************************/
-
-static void up_shutdown(struct uart_dev_s *dev)
-{
-  struct up_dev_s *priv = (struct up_dev_s *)CONSOLE_DEV.priv;
-  up_disableuartint(priv, NULL);
-}
-
-/****************************************************************************
- * Name: up_attach
- *
- * Description:
- *   Configure the UART to operation in interrupt driven mode.  This method is
- *   called when the serial port is opened.  Normally, this is just after the
- *   the setup() method is called, however, the serial console may operate in
- *   a non-interrupt driven mode during the boot phase.
- *
- *   RX and TX interrupts are not enabled when by the attach method (unless the
- *   hardware supports multiple levels of interrupt enabling).  The RX and TX
- *   interrupts are not enabled until the txint() and rxint() methods are called.
- *
- ****************************************************************************/
-
-static int up_attach(struct uart_dev_s *dev)
-{
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
-  int ret;
-
-  /* Attach and enable the IRQ */
-
-  ret = irq_attach(priv->irq, up_interrupt);
-  if (ret == OK)
-    {
-      /* Enable the interrupt (RX and TX interrupts are still disabled
-       * in the UART
-       */
-
-      up_enable_irq(priv->irq);
-    }
-
-  return ret;
-}
-
-/****************************************************************************
- * Name: up_detach
- *
- * Description:
- *   Detach UART interrupts.  This method is called when the serial port is
- *   closed normally just before the shutdown method is called.  The exception is
- *   the serial console which is never shutdown.
- *
- ****************************************************************************/
-
-static void up_detach(struct uart_dev_s *dev)
-{
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
-  up_disable_irq(priv->irq);
-  irq_detach(priv->irq);
-}
-
-/****************************************************************************
- * Name: up_interrupt
- *
- * Description:
- *   This is the UART interrupt handler.  It will be invoked
- *   when an interrupt received on the 'irq'  It should call
- *   uart_transmitchars or uart_receivechar to perform the
- *   appropriate data transfers.  The interrupt handling logic\
- *   must be able to map the 'irq' number into the approprite
- *   uart_dev_s structure in order to call these functions.
- *
- ****************************************************************************/
-
-static int up_interrupt(int irq, void *context)
-{
-  struct uart_dev_s *dev = NULL;
-  struct up_dev_s   *priv;
-  volatile uint32_t  cause;
-
-  if (g_irdapriv.irq == irq)
-    {
-      dev = &g_irdaport;
-    }
-  else if (g_modempriv.irq == irq)
-    {
-      dev = &g_modemport;
-    }
-  else
-    {
-      PANIC();
-    }
-  priv = (struct up_dev_s *)dev->priv;
-
-  cause = up_inserial(priv, UART_ISR_OFFS) & 0x0000003f;
-
-  if ((cause & 0x0000000c) == 0x0000000c)
-    {
-      uint32_t ier_val = 0;
-
-      /* Is this an interrupt from the IrDA UART? */
-
-      if (irq == UART_IRQ_IRDA)
-        {
-          /* Save the currently enabled IrDA UART interrupts
-           * so that we can restore the IrDA interrupt state
-           * below.
-           */
-
-          ier_val = up_inserial(priv, UART_IER_OFFS);
-
-          /* Then disable all IrDA UART interrupts */
-
-          up_serialout(priv, UART_IER_OFFS, 0);
-        }
-
-      /* Receive characters from the RX fifo */
-
-#ifdef CONFIG_SERCOMM_CONSOLE
-      if (priv->sercomm)
-        {
-          sercomm_recvchars(dev);
-        }
-      else
-#endif
-        {
-          uart_recvchars(dev);
-        }
-
-      /* read UART_RHR to clear int condition
-       * toss = up_inserialchar(priv,&status);
-       */
-
-      /* Is this an interrupt from the IrDA UART? */
-
-      if (irq == UART_IRQ_IRDA)
-        {
-          /* Restore the IrDA UART interrupt enables */
-
-          up_serialout(priv, UART_IER_OFFS, ier_val);
-        }
-    }
-  else if ((cause & 0x0000000c) == 0x00000004)
-    {
-#ifdef CONFIG_SERCOMM_CONSOLE
-      if (priv->sercomm)
-        {
-          sercomm_recvchars(dev);
-        }
-      else
-#endif
-        {
-          uart_recvchars(dev);
-        }
-    }
-
-  if ((cause & 0x00000002) != 0)
-    {
-#ifdef CONFIG_SERCOMM_CONSOLE
-      if (priv->sercomm)
-        {
-          sercomm_xmitchars(dev);
-        }
-      else
-#endif
-        {
-          uart_xmitchars(dev);
-        }
-    }
-
-  return OK;
-}
-
-/****************************************************************************
- * Name: up_ioctl
- *
- * Description:
- *   All ioctl calls will be routed through this method
- *
- ****************************************************************************/
-
-static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
-{
-  struct inode      *inode = filep->f_inode;
-  struct uart_dev_s *dev   = inode->i_private;
-  struct up_dev_s   *priv  = (struct up_dev_s *)dev->priv;
-  int                ret    = OK;
-
-  switch (cmd)
-    {
-#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
-    case TIOCSERGSTRUCT:
-      {
-         struct up_dev_s *user = (struct up_dev_s *)arg;
-         if (!user)
-           {
-             ret = -EINVAL;
-           }
-         else
-           {
-             memcpy(user, dev, sizeof(struct up_dev_s));
-           }
-       }
-       break;
-#endif
-
-    case TIOCSBRK:  /* BSD compatibility: Turn break on, unconditionally */
-      {
-        irqstate_t flags = enter_critical_section();
-        up_enablebreaks(priv);
-        leave_critical_section(flags);
-      }
-      break;
-
-    case TIOCCBRK:  /* BSD compatibility: Turn break off, unconditionally */
-      {
-        irqstate_t flags;
-        flags = enter_critical_section();
-        up_disablebreaks(priv);
-        leave_critical_section(flags);
-      }
-      break;
-
-    default:
-      ret = -ENOTTY;
-      break;
-    }
-
-  return ret;
-}
-
-/****************************************************************************
- * Name: up_receive
- *
- * Description:
- * Called (usually) from the interrupt level to receive one character from
- * the UART.  Error bits associated with the receipt are provided in the
- * the return 'status'.
- *
- ****************************************************************************/
-
-static int up_receive(struct uart_dev_s *dev, unsigned int *status)
-{
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
-  uint32_t rhr;
-  uint32_t lsr;
-
-  /* Construct a 16bit status word that uses the high byte to
-   * hold the status bits associated with framing,parity,break
-   * and a low byte that holds error bits of LSR for
-   * conditions such as overflow, etc.
-   */
-
-  rhr = up_inserial(priv, UART_RHR_OFFS);
-  lsr = up_inserial(priv, UART_LSR_OFFS);
-
-  *status = (unsigned int)((rhr & 0x0000ff00) | (lsr & 0x000000ff));
-
-  return rhr & 0x000000ff;
-}
-
-/****************************************************************************
- * Name: up_rxint
- *
- * Description:
- *   Call to enable or disable RX interrupts
- *
- ****************************************************************************/
-
-static void up_rxint(struct uart_dev_s *dev, bool enable)
-{
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
-  if (enable)
-    {
-#ifndef CONFIG_SUPPRESS_SERIAL_INTS
-      priv->regs.ier |= UART_IER_RECVINT;
-      up_serialout(priv, UART_IER_OFFS, priv->regs.ier);
-#endif
-    }
-  else
-    {
-      priv->regs.ier &= ~UART_IER_RECVINT;
-      up_serialout(priv, UART_IER_OFFS, priv->regs.ier);
-    }
-}
-
-/****************************************************************************
- * Name: up_rxavailable
- *
- * Description:
- *   Return true if the receive fifo is not empty
- *
- ****************************************************************************/
-
-static bool up_rxavailable(struct uart_dev_s *dev)
-{
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
-  return up_inserial(priv, UART_LSR_OFFS) & UART_RX_FIFO_NOEMPTY;
-}
-
-/****************************************************************************
- * Name: up_send
- *
- * Description:
- *   This method will send one byte on the UART
- *
- ****************************************************************************/
-
-static void up_send(struct uart_dev_s *dev, int ch)
-{
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
-  up_serialout(priv, UART_THR_OFFS, (uint8_t)ch);
-}
-
-/****************************************************************************
- * Name: up_txint
- *
- * Description:
- *   Call to enable or disable TX interrupts
- *
- ****************************************************************************/
-
-static void up_txint(struct uart_dev_s *dev, bool enable)
-{
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
-  if (enable)
-    {
-#ifndef CONFIG_SUPPRESS_SERIAL_INTS
-      priv->regs.ier |= UART_IER_XMITINT;
-      up_serialout(priv, UART_IER_OFFS, priv->regs.ier);
-#endif
-    }
-  else
-    {
-      priv->regs.ier &= ~UART_IER_XMITINT;
-      up_serialout(priv, UART_IER_OFFS, priv->regs.ier);
-    }
-}
-
-/****************************************************************************
- * Name: up_txready
- *
- * Description:
- *   Return true if the tranmsit fifo is not full
- *
- ****************************************************************************/
-
-static bool up_txready(struct uart_dev_s *dev)
-{
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
-  return (up_inserial(priv, UART_SSR_OFFS) & UART_SSR_TXFULL) == 0;
-}
-
-/****************************************************************************
- * Name: up_txempty
- *
- * Description:
- *   Return true if the transmit fifo is empty
- *
- ****************************************************************************/
-
-static bool up_txempty(struct uart_dev_s *dev)
-{
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
-  return (up_inserial(priv, UART_LSR_OFFS) & UART_LSR_TREF) != 0;
-}
-
-/****************************************************************************
- * Public Funtions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_earlyserialinit
- *
- * Description:
- *   Performs the low level UART initialization early in
- *   debug so that the serial console will be available
- *   during bootup.  This must be called before up_serialinit.
- *
- ****************************************************************************/
-
-void up_earlyserialinit(void)
-{
-  up_disableuartint(TTYS0_DEV.priv, NULL);
-  up_disableuartint(TTYS1_DEV.priv, NULL);
-
-  CONSOLE_DEV.isconsole = true;
-  up_setup(&CONSOLE_DEV);
-}
-
-/****************************************************************************
- * Name: up_serialinit
- *
- * Description:
- *   Register serial console and serial ports.  This assumes
- *   that up_earlyserialinit was called previously.
- *
- ****************************************************************************/
-
-void up_serialinit(void)
-{
-#ifdef CONFIG_SERCOMM_CONSOLE
-  ((struct up_dev_s *)TTYS0_DEV.priv)->sercomm = true;
-  (void)sercomm_register("/dev/console", &TTYS0_DEV);
-  (void)uart_register("/dev/ttyS0", &TTYS1_DEV);
-#else
-  (void)uart_register("/dev/console", &CONSOLE_DEV);
-  (void)uart_register("/dev/ttyS0", &TTYS0_DEV);
-  (void)uart_register("/dev/ttyS1", &TTYS1_DEV);
-#endif
-}
-
-/****************************************************************************
- * Name: up_putc
- *
- * Description:
- *   Provide priority, low-level access to support OS debug
- *   writes
- *
- ****************************************************************************/
-
-int up_putc(int ch)
-{
-  struct up_dev_s *priv = (struct up_dev_s *)CONSOLE_DEV.priv;
-  uint16_t  ier;
-
-  up_disableuartint(priv, &ier);
-  up_waittxready(priv);
-  up_serialout(priv, UART_THR_OFFS, (uint8_t)ch);
-
-  /* Check for LF */
-
-  if (ch == '\n')
-    {
-      /* Add CR */
-
-      up_waittxready(priv);
-      up_serialout(priv, UART_THR_OFFS, '\r');
-    }
-
-  up_waittxready(priv);
-  up_restoreuartint(priv, ier);
-  return ch;
-}
-
diff --git a/arch/arm/src/calypso/calypso_spi.c b/arch/arm/src/calypso/calypso_spi.c
deleted file mode 100644
index e3b063a559d671f504750e3bf711c16c479be0ec..0000000000000000000000000000000000000000
--- a/arch/arm/src/calypso/calypso_spi.c
+++ /dev/null
@@ -1,314 +0,0 @@
-/****************************************************************************
- * arch/arm/src/calypso/calypso_spi.c
- * SPI driver for TI Calypso
- *
- *   Copyright (C) 2010 Harald Welte 
- *   Copyright (C) 2011 Stefan Richter 
- *
- * Part of this source code is derivated from Osmocom-BB project and was
- * relicensed as BSD with permission from original authors.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#include 
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include "up_arch.h"
-#include "calypso_spi.h"
-
-#warning "MOST OF SPI API IS INCOMPLETE! (Wrapper around Osmocom driver)"
-extern void spi_init(void);
-extern int spi_xfer(uint8_t dev_idx, uint8_t bitlen, const void *dout, void *din);
-
-#ifndef CONFIG_SPI_EXCHANGE
-#error "Calypso HW only supports exchange. Enable CONFIG_SPI_EXCHANGE!"
-#endif
-
-struct calypso_spidev_s
-{
-  struct spi_dev_s spidev;  /* External driver interface */
-  int              nbits;   /* Number of transfered bits */
-  sem_t            exclsem; /* Supports mutually exclusive access */
-};
-
-static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
-{
-  struct calypso_spidev_s *priv = (struct calypso_spidev_s *)dev;
-
-  if (lock)
-    {
-      /* Take the semaphore (perhaps waiting) */
-
-      while (sem_wait(&priv->exclsem) != 0)
-        {
-          /* The only case that an error should occur here is if the wait
-           * was awakened by a signal.
-           */
-
-          DEBUGASSERT(errno == EINTR);
-        }
-    }
-  else
-    {
-      (void)sem_post(&priv->exclsem);
-    }
-
-  return OK;
-}
-
-/* STUBS! */
-
-static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
-                       bool selected)
-{
-}
-
-static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
-{
-  return frequency;
-}
-
-static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
-{
-}
-
-/* Osmocom wrapper */
-
-static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
-{
-  ((FAR struct calypso_spidev_s *)dev)->nbits = nbits;
-}
-
-static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
-                         FAR void *rxbuffer, size_t nwords)
-{
-  FAR struct calypso_spidev_s *priv = (FAR struct calypso_spidev_s *)dev;
-  size_t i;
-
-  for (i = 0; i < nwords; i++)
-    {
-      spi_xfer(0, priv->nbits, txbuffer + i, rxbuffer + i);
-    }
-}
-
-static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
-{
-  uint16_t buf = wd;
-  spi_exchange(dev, &buf, &buf, 1);
-  return buf;
-}
-
-static const struct spi_ops_s g_spiops =
-{
-  .lock              = spi_lock,
-  .select            = spi_select,
-  .setfrequency      = spi_setfrequency,
-  .setmode           = spi_setmode,
-  .setbits           = spi_setbits,
-#ifdef CONFIG_SPI_HWFEATURES
-  .hwfeatures        = 0,
-#endif
-  .status            = 0,
-#ifdef CONFIG_SPI_CMDDATA
-  .cmddata           = 0,
-#endif
-  .send              = spi_send,
-#ifdef CONFIG_SPI_EXCHANGE
-  .exchange          = spi_exchange,
-#else
-  .sndblock          = spi_sndblock,
-  .recvblock         = spi_recvblock,
-#endif
-  .registercallback  = 0,
-};
-
-static struct calypso_spidev_s g_spidev =
-{
-  .spidev  = { &g_spiops },
-  .nbits   = 0,
-  .exclsem = SEM_INITIALIZER(1)
-};
-
-void spi_init(void)
-{
-  putreg16(SPI_SET1_EN_CLK | SPI_SET1_WR_IRQ_DIS | SPI_SET1_RDWR_IRQ_DIS,
-           SPI_REG(REG_SET1));
-
-  putreg16(0x0001, SPI_REG(REG_SET2));
-}
-
-int spi_xfer(uint8_t dev_idx, uint8_t bitlen, const void *dout, void *din)
-{
-  uint8_t bytes_per_xfer;
-  uint8_t reg_status, reg_ctrl = 0;
-  uint32_t tmp;
-
-  if (bitlen == 0)
-    {
-      return 0;
-    }
-
-  if (bitlen > 32)
-    {
-      return -1;
-    }
-
-  if (dev_idx > 4)
-    {
-      return -1;
-    }
-
-  bytes_per_xfer = bitlen / 8;
-  if (bitlen % 8)
-    {
-      bytes_per_xfer ++;
-    }
-
-  reg_ctrl |= (bitlen - 1) << SPI_CTRL_NB_SHIFT;
-  reg_ctrl |= (dev_idx & 0x7) << SPI_CTRL_AD_SHIFT;
-
-  if (bitlen <= 8)
-    {
-      tmp = *(uint8_t *)dout;
-      tmp <<= 24 + (8-bitlen);  /* align to MSB */
-    }
-  else if (bitlen <= 16)
-    {
-      tmp = *(uint16_t *)dout;
-      tmp <<= 16 + (16-bitlen);  /* align to MSB */
-    }
-  else
-    {
-      tmp = *(uint32_t *)dout;
-      tmp <<= (32-bitlen);    /* align to MSB */
-    }
-
-  dbg("spi_xfer(dev_idx=%u, bitlen=%u, data_out=0x%08x): ",
-      dev_idx, bitlen, tmp);
-
-  /* fill transmit registers */
-
-  putreg16(tmp >> 16, SPI_REG(REG_TX_MSB));
-  putreg16(tmp & 0xffff, SPI_REG(REG_TX_LSB));
-
-  /* initiate transfer */
-
-  if (din)
-    {
-      reg_ctrl |= SPI_CTRL_RDWR;
-    }
-  else
-    {
-      reg_ctrl |= SPI_CTRL_WR;
-    }
-
-  putreg16(reg_ctrl, SPI_REG(REG_CTRL));
-  dbg("reg_ctrl=0x%04x ", reg_ctrl);
-
-  /* wait until the transfer is complete */
-
-  while (1)
-    {
-      reg_status = getreg16(SPI_REG(REG_STATUS));
-      dbg("status=0x%04x ", reg_status);
-      if (din && (reg_status & SPI_STATUS_RE))
-        {
-          break;
-        }
-      else if (reg_status & SPI_STATUS_WE)
-        {
-          break;
-        }
-    }
-
-  /* FIXME: calibrate how much delay we really need (seven 13MHz cycles) */
-
-  usleep(1000);
-
-  if (din)
-    {
-      tmp = getreg16(SPI_REG(REG_RX_MSB)) << 16;
-      tmp |= getreg16(SPI_REG(REG_RX_LSB));
-      dbg("data_in=0x%08x ", tmp);
-
-      if (bitlen <= 8)
-        {
-          *(uint8_t *)din = tmp & 0xff;
-        }
-      else if (bitlen <= 16)
-        {
-          *(uint16_t *)din = tmp & 0xffff;
-        }
-      else
-        {
-          *(uint32_t *)din = tmp;
-        }
-    }
-
-  dbg("\n");
-
-  return 0;
-}
-
-/****************************************************************************
- * Name: calypso_spibus_initialize
- *
- * Description:
- *   Initialize the selected SPI port
- *
- * Input Parameter:
- *   Port number (for hardware that has mutiple SPI interfaces)
- *
- * Returned Value:
- *   Valid SPI device structure reference on succcess; a NULL on failure
- *
- ****************************************************************************/
-
-FAR struct spi_dev_s *calypso_spibus_initialize(int port)
-{
-  switch (port)
-    {
-    case 0:    /* SPI master device */
-      spi_init();
-      return (FAR struct spi_dev_s *)&g_spidev;
-
-    case 1:    /* uWire device */
-      return NULL;
-
-    default:
-      return NULL;
-    }
-}
diff --git a/arch/arm/src/calypso/calypso_spi.h b/arch/arm/src/calypso/calypso_spi.h
deleted file mode 100644
index 70ca2ad9d0a826788a96d1af5d70865b142801b3..0000000000000000000000000000000000000000
--- a/arch/arm/src/calypso/calypso_spi.h
+++ /dev/null
@@ -1,59 +0,0 @@
-#ifndef ___ARCH_ARM_SRC_CALYPSO_CALYPSO_SPI_H
-#define ___ARCH_ARM_SRC_CALYPSO_CALYPSO_SPI_H
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-#define BASE_ADDR_SPI   0xfffe3000
-#define SPI_REG(n)      (BASE_ADDR_SPI+(n))
-
-#define SPI_SET1_EN_CLK         (1 << 0)
-#define SPI_SET1_WR_IRQ_DIS     (1 << 4)
-#define SPI_SET1_RDWR_IRQ_DIS   (1 << 5)
-
-#define SPI_CTRL_RDWR           (1 << 0)
-#define SPI_CTRL_WR             (1 << 1)
-#define SPI_CTRL_NB_SHIFT       2
-#define SPI_CTRL_AD_SHIFT       7
-
-#define SPI_STATUS_RE           (1 << 0)        /* Read End */
-#define SPI_STATUS_WE           (1 << 1)        /* Write End */
-
-/****************************************************************************
- * Public Types
- ****************************************************************************/
-
-enum spi_regs
-{
-  REG_SET1        = 0x00,
-  REG_SET2        = 0x02,
-  REG_CTRL        = 0x04,
-  REG_STATUS      = 0x06,
-  REG_TX_LSB      = 0x08,
-  REG_TX_MSB      = 0x0a,
-  REG_RX_LSB      = 0x0c,
-  REG_RX_MSB      = 0x0e,
-};
-
-/****************************************************************************
- * Public Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Name: calypso_spibus_initialize
- *
- * Description:
- *   Initialize the selected SPI port
- *
- * Input Parameter:
- *   Port number (for hardware that has mutiple SPI interfaces)
- *
- * Returned Value:
- *   Valid SPI device structure reference on succcess; a NULL on failure
- *
- ****************************************************************************/
-
-FAR struct spi_dev_s *calypso_spibus_initialize(int port);
-
-#endif /* ___ARCH_ARM_SRC_CALYPSO_CALYPSO_SPI_H */
diff --git a/arch/arm/src/calypso/calypso_timer.c b/arch/arm/src/calypso/calypso_timer.c
deleted file mode 100644
index 86626c5de64944b6b6c854b9445965517e0e4c95..0000000000000000000000000000000000000000
--- a/arch/arm/src/calypso/calypso_timer.c
+++ /dev/null
@@ -1,227 +0,0 @@
-/****************************************************************************
- * arch/arm/src/calypso/calypso_timer.c
- * Calypso DBB internal Timer Driver
- *
- * (C) 2010 by Harald Welte 
- * (C) 2011 by Stefan Richter 
- *
- * This source code is derivated from Osmocom-BB project and was
- * relicensed as BSD with permission from original authors.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#include 
-#include 
-#include 
-
-#include 
-#include 
-#include 
-
-#include "up_arch.h"
-
-#define BASE_ADDR_TIMER        0xfffe3800
-#define TIMER2_OFFSET        0x3000
-
-#define TIMER_REG(n, m)        (((n)-1) ? (BASE_ADDR_TIMER + TIMER2_OFFSET + (m)) : (BASE_ADDR_TIMER + (m)))
-
-enum timer_reg
-{
-  CNTL_TIMER    = 0x00,
-  LOAD_TIMER    = 0x02,
-  READ_TIMER    = 0x04,
-};
-
-enum timer_ctl
-{
-  CNTL_START        = (1 << 0),
-  CNTL_AUTO_RELOAD  = (1 << 1),
-  CNTL_CLOCK_ENABLE = (1 << 5),
-};
-
-/* Regular Timers (1 and 2) */
-
-void hwtimer_enable(int num, int on)
-{
-  uint8_t ctl;
-
-  if (num < 1 || num > 2)
-    {
-      printf("Unknown timer %d\n", num);
-      return;
-    }
-
-  ctl = getreg8(TIMER_REG(num, CNTL_TIMER));
-  if (on)
-    {
-      ctl |= CNTL_START | CNTL_CLOCK_ENABLE;
-    }
-  else
-    {
-      ctl &= ~CNTL_START;
-    }
-
-  putreg8(ctl, TIMER_REG(num, CNTL_TIMER));
-}
-
-void hwtimer_config(int num, uint8_t pre_scale, int auto_reload)
-{
-  uint8_t ctl;
-
-  ctl = (pre_scale & 0x7) << 2;
-  if (auto_reload)
-      ctl |= CNTL_AUTO_RELOAD;
-
-  putreg8(ctl, TIMER_REG(num, CNTL_TIMER));
-}
-
-void hwtimer_load(int num, uint16_t val)
-{
-  putreg16(val, TIMER_REG(num, LOAD_TIMER));
-}
-
-uint16_t hwtimer_read(int num)
-{
-  uint8_t ctl = getreg8(TIMER_REG(num, CNTL_TIMER));
-
-  /* Somehow a read results in an abort */
-
-  if ((ctl & (CNTL_START | CNTL_CLOCK_ENABLE)) != (CNTL_START | CNTL_CLOCK_ENABLE))
-    {
-      return 0xffff;
-    }
-
-  return getreg16(TIMER_REG(num, READ_TIMER));
-}
-
-/****************************************************************************
- * Watchdog Timer
- ****************************************************************************/
-
-#define BASE_ADDR_WDOG        0xfffff800
-#define WDOG_REG(m)        (BASE_ADDR_WDOG + m)
-
-enum wdog_reg
-{
-  WD_CNTL_TIMER    = CNTL_TIMER,
-  WD_LOAD_TIMER    = LOAD_TIMER,
-  WD_READ_TIMER    = 0x02,
-  WD_MODE          = 0x04,
-};
-
-enum wdog_ctl
-{
-  WD_CTL_START       = (1 << 7),
-  WD_CTL_AUTO_RELOAD = (1 << 8)
-};
-
-enum wdog_mode
-{
-  WD_MODE_DIS_ARM     = 0xF5,
-  WD_MODE_DIS_CONFIRM = 0xA0,
-  WD_MODE_ENABLE      = (1 << 15)
-};
-
-#define WD_CTL_PRESCALE(value) (((value)&0x07) << 9)
-
-static void wdog_irq(__unused enum irq_nr nr)
-{
-  puts("=> WATCHDOG\n");
-}
-
-void wdog_enable(int on)
-{
-  if (!on)
-    {
-      putreg16(WD_MODE_DIS_ARM, WDOG_REG(WD_MODE));
-      putreg16(WD_MODE_DIS_CONFIRM, WDOG_REG(WD_MODE));
-    }
-}
-
-void wdog_reset(void)
-{
-  /* Enable watchdog */
-
-  putreg16(WD_MODE_ENABLE, WDOG_REG(WD_MODE));
-
-  /* Force expiration */
-
-  putreg16(0x0000, WDOG_REG(WD_LOAD_TIMER));
-  putreg16(0x0000, WDOG_REG(WD_LOAD_TIMER));
-}
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
- *
- * Description:
- *   The timer ISR will perform a variety of services for
- *   various portions of the systems.
- *
- ****************************************************************************/
-
-int up_timerisr(int irq, uint32_t *regs)
-{
-  /* Process timer interrupt */
-
-  sched_process_timer();
-  return 0;
-}
-
-/****************************************************************************
- * Function:  up_timer_initialize
- *
- * Description:
- *   Setup Calypso HW timer 2 to cause system ticks.
- *
- *   This function is called during start-up to initialize
- *   the timer interrupt.
- *
- ****************************************************************************/
-
-void up_timer_initialize(void)
-{
-  up_disable_irq(IRQ_SYSTIMER);
-
-  /* The timer runs at 13MHz / 32, i.e. 406.25kHz */
-  /* 4062 ticks until expiry yields 100Hz interrupt */
-
-  hwtimer_load(2, 4062);
-  hwtimer_config(2, 0, 1);
-  hwtimer_enable(2, 1);
-
-  /* Attach and enable the timer interrupt */
-
-  irq_attach(IRQ_SYSTIMER, (xcpt_t)up_timerisr);
-  up_enable_irq(IRQ_SYSTIMER);
-}
diff --git a/arch/arm/src/calypso/calypso_uwire.c b/arch/arm/src/calypso/calypso_uwire.c
deleted file mode 100644
index d837a7abdc249ac67c300fcfe566aa575c28f6ac..0000000000000000000000000000000000000000
--- a/arch/arm/src/calypso/calypso_uwire.c
+++ /dev/null
@@ -1,161 +0,0 @@
-/****************************************************************************
- * arch/arm/src/calypso/calypso_uwire.c
- * Driver for Calypso uWire Master Controller
- *
- * (C) 2010 by Sylvain Munaut 
- *
- * This source code is derivated from Osmocom-BB project and was
- * relicensed as BSD with permission from original authors.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include 
-#include 
-#include 
-
-#include "up_arch.h"
-
-#define BASE_ADDR_UWIRE    0xfffe4000
-#define UWIRE_REG(n)    (BASE_ADDR_UWIRE+(n))
-
-enum uwire_regs
-{
-  REG_DATA    = 0x00,
-  REG_CSR     = 0x02,
-  REG_SR1     = 0x04,
-  REG_SR2     = 0x06,
-  REG_SR3     = 0x08,
-};
-
-#define UWIRE_CSR_BITS_RD(n) (((n) & 0x1f) << 0)
-#define UWIRE_CSR_BITS_WR(n) (((n) & 0x1f) << 5)
-#define UWIRE_CSR_IDX(n)     (((n) & 3) << 10)
-#define UWIRE_CSR_CS_CMD     (1 << 12)
-#define UWIRE_CSR_START      (1 << 13)
-#define UWIRE_CSR_CSRB       (1 << 14)
-#define UWIRE_CSR_RDRB       (1 << 15)
-
-#define UWIRE_CSn_EDGE_RD    (1 << 0)    /* 1=falling 0=rising */
-#define UWIRE_CSn_EDGE_WR    (1 << 1)    /* 1=falling 0=rising */
-#define UWIRE_CSn_CS_LVL     (1 << 2)
-#define UWIRE_CSn_FRQ_DIV2   (0 << 3)
-#define UWIRE_CSn_FRQ_DIV4   (1 << 3)
-#define UWIRE_CSn_FRQ_DIV8   (2 << 3)
-#define UWIRE_CSn_CKH
-
-#define UWIRE_CSn_SHIFT(n)   (((n) & 1) ? 6 : 0)
-#define UWIRE_CSn_REG(n)     (((n) & 2) ? REG_SR2 : REG_SR1)
-
-#define UWIRE_SR3_CLK_EN     (1 << 0)
-#define UWIRE_SR3_CLK_DIV2   (0 << 1)
-#define UWIRE_SR3_CLK_DIV4   (1 << 1)
-#define UWIRE_SR3_CLK_DIV7   (2 << 1)
-#define UWIRE_SR3_CLK_DIV10  (3 << 1)
-
-static inline void _uwire_wait(int mask, int val)
-{
-  while ((getreg16(UWIRE_REG(REG_CSR)) & mask) != val);
-}
-
-void uwire_init(void)
-{
-  putreg16(UWIRE_SR3_CLK_EN | UWIRE_SR3_CLK_DIV2, UWIRE_REG(REG_SR3));
-
-  /* FIXME only init CS0 for now */
-
-  putreg16(((UWIRE_CSn_CS_LVL | UWIRE_CSn_FRQ_DIV2) << UWIRE_CSn_SHIFT(0)),
-           UWIRE_REG(UWIRE_CSn_REG(0)));
-  putreg16(UWIRE_CSR_IDX(0) | UWIRE_CSR_CS_CMD, UWIRE_REG(REG_CSR));
-  _uwire_wait(UWIRE_CSR_CSRB, 0);
-}
-
-int uwire_xfer(int cs, int bitlen, const void *dout, void *din)
-{
-  uint16_t tmp = 0;
-
-  if (bitlen <= 0 || bitlen > 16)
-      return -1;
-
-  if (cs < 0 || cs > 4)
-      return -1;
-
-  /* FIXME uwire_init always selects CS0 for now */
-
-  dbg("uwire_xfer(dev_idx=%u, bitlen=%u\n", cs, bitlen);
-
-  /* select the chip */
-
-  putreg16(UWIRE_CSR_IDX(0) | UWIRE_CSR_CS_CMD, UWIRE_REG(REG_CSR));
-  _uwire_wait(UWIRE_CSR_CSRB, 0);
-
-  if (dout)
-    {
-      if (bitlen <= 8)
-          tmp = *(uint8_t *)dout;
-      else if (bitlen <= 16)
-          tmp = *(uint16_t *)dout;
-
-      tmp <<= 16 - bitlen; /* align to MSB */
-      putreg16(tmp, UWIRE_REG(REG_DATA));
-      dbg(", data_out=0x%04hx", tmp);
-    }
-
-  tmp = (dout ? UWIRE_CSR_BITS_WR(bitlen) : 0) |
-        (din  ? UWIRE_CSR_BITS_RD(bitlen) : 0) |
-         UWIRE_CSR_START;
-  putreg16(tmp, UWIRE_REG(REG_CSR));
-  _uwire_wait(UWIRE_CSR_CSRB, 0);
-
-  if (din)
-    {
-      _uwire_wait(UWIRE_CSR_RDRB, UWIRE_CSR_RDRB);
-
-      tmp = getreg16(UWIRE_REG(REG_DATA));
-      dbg(", data_in=0x%08x", tmp);
-
-      if (bitlen <= 8)
-          *(uint8_t *)din = tmp & 0xff;
-      else if (bitlen <= 16)
-          *(uint16_t *)din = tmp & 0xffff;
-    }
-
-  /* unselect the chip */
-
-  putreg16(UWIRE_CSR_IDX(0) | 0, UWIRE_REG(REG_CSR));
-  _uwire_wait(UWIRE_CSR_CSRB, 0);
-
-  dbg(")\n");
-
-  return 0;
-}
diff --git a/arch/arm/src/calypso/chip.h b/arch/arm/src/calypso/chip.h
deleted file mode 100644
index 824fdce8935f609f55780cba31853a8859373972..0000000000000000000000000000000000000000
--- a/arch/arm/src/calypso/chip.h
+++ /dev/null
@@ -1,211 +0,0 @@
-/****************************************************************************
- * calypso/chip.h
- *
- *   Copyright (C) 2011 Stefan Richter. All rights reserved.
- *   Author: Stefan Richter 
- *
- * based on: c5471/chip.h
- *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name Gregory Nutt nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#ifndef __CALYPSO_CHIP_H
-#define __CALYPSO_CHIP_H
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* UARTs ********************************************************************/
-
-#define UART_IRDA_BASE         0xffff5000
-#define UART_MODEM_BASE        0xffff5800
-#define UART_UIR               0xffff6000
-#define UARTn_IO_RANGE         0x00000800
-
-/* Common UART Registers.  Expressed as offsets from the BASE address */
-
-#define UART_RHR_OFFS          0x00000000 /* Rcv Holding Register */
-#define UART_THR_OFFS          0x00000000 /* Xmit Holding Register */
-#define UART_FCR_OFFS          0x00000002 /* FIFO Control Register */
-#define UART_RFCR_OFFS         0x00000002 /* Rcv FIFO Control Register */
-#define UART_TFCR_OFFS         0x00000002 /* Xmit FIFO Control Register */
-#define UART_SCR_OFFS          0x00000010 /* Status Control Register */
-#define UART_LCR_OFFS          0x00000003 /* Line Control Register */
-#define UART_LSR_OFFS          0x00000005 /* Line Status Register */
-#define UART_SSR_OFFS          0x00000011 /* Supplementary Status Register */
-#define UART_MCR_OFFS          0x00000004 /* Modem Control Register */
-#define UART_MSR_OFFS          0x00000006 /* Modem Status Register */
-#define UART_IER_OFFS          0x00000001 /* Interrupt Enable Register */
-#define UART_ISR_OFFS          0x00000002 /* Interrupt Status Register */
-#define UART_EFR_OFFS          0x00000002 /* Enhanced Feature Register */
-#define UART_XON1_OFFS         0x00000004 /* XON1 Character Register */
-#define UART_XON2_OFFS         0x00000005 /* XON2 Character Register */
-#define UART_XOFF1_OFFS        0x00000006 /* XOFF1 Character Register */
-#define UART_XOFF2_OFFS        0x00000007 /* XOFF2 Character Register */
-#define UART_SPR_OFFS          0x00000007 /* Scratch-pad Register */
-#define UART_DIV_LOW_OFFS      0x00000000 /* Divisor for baud generation */
-#define UART_DIV_HIGH_OFFS     0x00000001
-#define UART_TCR_OFFS          0x00000006 /* Transmission Control Register */
-#define UART_TLR_OFFS          0x00000007 /* Trigger Level Register */
-#define UART_MDR_OFFS          0x00000008 /* Mode Definition Register */
-
-/* UART Settings ************************************************************/
-
-/* Miscellaneous UART settings. */
-
-#define UART_REGISTER_BITS   8
-#define UART_IRQ_MODEM       IRQ_UART_MODEM
-#define UART_IRQ_IRDA        IRQ_UART_IRDA
-
-#define UART_RX_FIFO_NOEMPTY 0x00000001
-#define UART_SSR_TXFULL      0x00000001
-#define UART_LSR_TREF        0x00000020
-
-#define UART_XMIT_FIFO_SIZE      64
-#define UART_IRDA_XMIT_FIFO_SIZE 64
-
-/* UART_LCR Register */
-                                        /* Bits 31-7: Reserved */
-#define UART_LCR_BOC         0x00000040 /* Bit 6: Break Control */
-                                        /* Bit 5: Parity Type 2 */
-#define UART_LCR_PAREVEN     0x00000010 /* Bit 4: Parity Type 1 */
-#define UART_LCR_PARODD      0x00000000
-#define UART_LCR_PARMARK     0x00000010
-#define UART_LCR_PARSPACE    0x00000011
-#define UART_LCR_PAREN       0x00000008 /* Bit 3: Paity Enable */
-#define UART_LCR_PARDIS      0x00000000
-#define UART_LCR_2STOP       0x00000004 /* Bit 2: Number of stop bits */
-#define UART_LCR_1STOP       0x00000000
-#define UART_LCR_5BITS       0x00000000 /* Bits 0-1: Word-length */
-#define UART_LCR_6BITS       0x00000001
-#define UART_LCR_7BITS       0x00000002
-#define UART_LCR_8BITS       0x00000003
-
-#define UART_FCR_FTL         0x000000f0
-#define UART_FCR_FIFO_EN     0x00000001
-#define UART_FCR_TX_CLR      0x00000002
-#define UART_FCR_RX_CLR      0x00000004
-
-#define UART_IER_RECVINT     0x00000001
-#define UART_IER_XMITINT     0x00000002
-#define UART_IER_LINESTSINT  0x00000004
-#define UART_IER_MODEMSTSINT 0x00000008 /* IrDA UART only */
-#define UART_IER_XOFFINT     0x00000020
-#define UART_IER_RTSINT      0x00000040 /* IrDA UART only */
-#define UART_IER_CTSINT      0x00000080 /* IrDA UART only */
-#define UART_IER_INTMASK     0x000000ff
-
-#define BAUD_115200          0x00000007
-#define BAUD_57600           0x00000014
-#define BAUD_38400           0x00000021
-#define BAUD_19200           0x00000006
-#define BAUD_9600            0x0000000C
-#define BAUD_4800            0x00000018
-#define BAUD_2400            0x00000030
-#define BAUD_1200            0x00000060
-
-#define MDR_UART_MODE        0x00000000  /* Both IrDA and Modem UARTs */
-#define MDR_SIR_MODE         0x00000001  /* IrDA UART only */
-#define MDR_AUTOBAUDING_MODE 0x00000002  /* Modem UART only */
-#define MDR_RESET_MODE       0x00000007  /* Both IrDA and Modem UARTs */
-
-/* SPI **********************************************************************/
-
-#define MAX_SPI 3
-
-#define SPI_REGISTER_BASE    0xffff2000
-
-/* ARMIO ********************************************************************/
-/* Timers / Watchdog ********************************************************/
-
-#define C5471_TIMER0_CTRL    0xffff2a00
-#define C5471_TIMER0_CNT     0xffff2a04
-#define C5471_TIMER1_CTRL    0xffff2b00
-#define C5471_TIMER1_CNT     0xffff2b04
-#define C5471_TIMER2_CTRL    0xffff2c00
-#define C5471_TIMER2_CNT     0xffff2c04
-
-/* Interrupts ***************************************************************/
-
-#define HAVE_SRC_IRQ_BIN_REG 0
-
-#define INT_FIRST_IO         0xffff2d00
-#define INT_IO_RANGE         0x5C
-
-#define IT_REG               0xffff2d00
-#define MASK_IT_REG          0xffff2d04
-#define SRC_IRQ_REG          0xffff2d08
-#define SRC_FIQ_REG          0xffff2d0c
-#define SRC_IRQ_BIN_REG      0xffff2d10
-#define INT_CTRL_REG         0xffff2d18
-
-#define ILR_IRQ0_REG         0xffff2d1C /*  0-Timer 0       */
-#define ILR_IRQ1_REG         0xffff2d20 /*  1-Timer 1       */
-#define ILR_IRQ2_REG         0xffff2d24 /*  2-Timer 2       */
-#define ILR_IRQ3_REG         0xffff2d28 /*  3-GPIO0         */
-#define ILR_IRQ4_REG         0xffff2d2c /*  4-Ethernet      */
-#define ILR_IRQ5_REG         0xffff2d30 /*  5-KBGPIO[7:0]   */
-#define ILR_IRQ6_REG         0xffff2d34 /*  6-Uart serial   */
-#define ILR_IRQ7_REG         0xffff2d38 /*  7-Uart IRDA     */
-#define ILR_IRQ8_REG         0xffff2d3c /*  8-KBGPIO[15:8]  */
-#define ILR_IRQ9_REG         0xffff2d40 /*  9-GPIO3         */
-#define ILR_IRQ10_REG        0xffff2d44 /* 10-GPIO2         */
-#define ILR_IRQ11_REG        0xffff2d48 /* 11-I2C           */
-#define ILR_IRQ12_REG        0xffff2d4c /* 12-GPIO1         */
-#define ILR_IRQ13_REG        0xffff2d50 /* 13-SPI           */
-#define ILR_IRQ14_REG        0xffff2d54 /* 14-GPIO[19:4]    */
-#define ILR_IRQ15_REG        0xffff2d58 /* 15-API           */
-
-/* CLKM *********************************************************************/
-
-#define CLKM                 0xffff2f00
-#define CLKM_CTL_RST         0xffff2f10
-#define CLKM_RESET           0xffff2f18
-
-#define CLKM_RESET_EIM          0x00000008
-#define CLKM_EIM_CLK_STOP       0x00000010
-#define CLKM_CTL_RST_LEAD_RESET 0x00000000
-#define CLKM_CTL_RST_EXT_RESET  0x00000002
-
-/****************************************************************************
- * Inline Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Public Function Prototypes
- ****************************************************************************/
-
-#endif  /* __CALYPSO_CHIP_H */
diff --git a/arch/arm/src/calypso/clock.c b/arch/arm/src/calypso/clock.c
deleted file mode 100644
index 29dc2f8273ad66a264a3eccac1ada2c809c5b1ac..0000000000000000000000000000000000000000
--- a/arch/arm/src/calypso/clock.c
+++ /dev/null
@@ -1,230 +0,0 @@
-/****************************************************************************
- * arch/arm/src/calypso/clock.c
- * Driver for Calypso clock management
- *
- * (C) 2010 by Harald Welte 
- *
- * This source code is derivated from Osmocom-BB project and was
- * relicensed as BSD with permission from original authors.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#include 
-
-#include 
-#include 
-
-//#define DEBUG
-#include 
-
-#include 
-#include 
-
-#include "up_arch.h"
-
-#define REG_DPLL              0xffff9800
-#define DPLL_LOCK             (1 << 0)
-#define DPLL_BREAKLN          (1 << 1)
-#define DPLL_BYPASS_DIV_SHIFT 2         /* 2 bits */
-#define DPLL_PLL_ENABLE       (1 << 4)
-#define DPLL_PLL_DIV_SHIFT    5         /* 2 bits */
-#define DPLL_PLL_MULT_SHIFT   7         /* 5 bits */
-#define DPLL_TEST             (1 << 12)
-#define DPLL_IOB              (1 << 13) /* Initialize on break */
-#define DPLL_IAI              (1 << 14) /* Initialize after Idle */
-
-#define BASE_ADDR_CLKM        0xfffffd00
-#define CLKM_REG(m)           (BASE_ADDR_CLKM+(m))
-
-enum clkm_reg
-{
-  CNTL_ARM_CLK  = 0,
-  CNTL_CLK      = 2,
-  CNTL_RST      = 4,
-  CNTL_ARM_DIV  = 8,
-};
-
-/* CNTL_ARM_CLK */
-
-#define ARM_CLK_BIG_SLEEP     (1 << 0)    /* MCU Master Clock enabled? */
-#define ARM_CLK_CLKIN_SEL0    (1 << 1)    /* MCU source clock (0 = DPLL output, 1 = VTCXO or CLKIN */
-#define ARM_CLK_CLKIN_SEL     (1 << 2)    /* 0 = VTCXO or 1 = CLKIN */
-#define ARM_CLK_MCLK_DIV5     (1 << 3)    /* enable 1.5 or 2.5 division factor */
-#define ARM_CLK_MCLK_DIV_SHIFT   4        /* 3 bits */
-#define ARM_CLK_DEEP_POWER_SHIFT 8
-#define ARM_CLK_DEEP_SLEEP       12
-
-/* CNTL_CLK */
-#define CLK_IRQ_CLK_DIS       (1 << 0)    /* IRQ clock control (0 always, 1 according ARM_MCLK_EN) */
-#define CLK_BRIDGE_CLK_DIS    (1 << 1)
-#define CLK_TIMER_CLK_DIS     (1 << 2)
-#define CLK_DPLL_DIS          (1 << 3)    /* 0: DPLL is not stopped during SLEEP */
-#define CLK_CLKOUT_EN         (1 << 4)    /* Enable CLKOUT output pins */
-#define CLK_EN_IDLE3_FLG      (1 << 5)    /* DSP idle flag control (1 =
-                                           * SAM/HOM register forced to HOM when DSP IDLE3) */
-#define CLK_VCLKOUT_DIV2      (1 << 6)    /* 1: VCLKOUT-FR is divided by 2 */
-#define CLK_VTCXO_DIV2        (1 << 7)    /* 1: VTCXO is dividied by 2 */
-
-#define BASE_ADDR_MEMIF       0xfffffb00
-#define MEMIF_REG(x)          (BASE_ADDR_MEMIF+(x))
-
-enum memif_reg
-{
-  API_RHEA_CTL  = 0x0e,
-  EXTRA_CONF    = 0x10,
-};
-
-static void dump_reg16(uint32_t addr, char *name)
-{
-  printf("%s=0x%04x\n", name, getreg16(addr));
-}
-
-void calypso_clk_dump(void)
-{
-  dump_reg16(REG_DPLL, "REG_DPLL");
-  dump_reg16(CLKM_REG(CNTL_ARM_CLK), "CNTL_ARM_CLK");
-  dump_reg16(CLKM_REG(CNTL_CLK), "CNTL_CLK");
-  dump_reg16(CLKM_REG(CNTL_RST), "CNTL_RST");
-  dump_reg16(CLKM_REG(CNTL_ARM_DIV), "CNTL_ARM_DIV");
-}
-
-void calypso_pll_set(uint16_t inp)
-{
-  uint8_t mult = inp >> 8;
-  uint8_t div = inp & 0xff;
-  uint16_t reg = getreg16(REG_DPLL);
-
-  reg &= ~0x0fe0;
-  reg |= (div & 0x3) << DPLL_PLL_DIV_SHIFT;
-  reg |= (mult & 0x1f) << DPLL_PLL_MULT_SHIFT;
-  reg |= DPLL_PLL_ENABLE;
-
-  putreg16(reg, REG_DPLL);
-}
-
-void calypso_reset_set(enum calypso_rst calypso_rst, int active)
-{
-  uint8_t reg = getreg8(CLKM_REG(CNTL_RST));
-
-  if (active)
-      reg |= calypso_rst;
-  else
-      reg &= ~calypso_rst;
-
-  putreg8(reg, CLKM_REG(CNTL_RST));
-}
-
-int calypso_reset_get(enum calypso_rst calypso_rst)
-{
-  uint8_t reg = getreg8(CLKM_REG(CNTL_RST));
-
-  if (reg & calypso_rst)
-      return 1;
-  else
-      return 0;
-}
-
-void calypso_clock_set(uint8_t vtcxo_div2, uint16_t inp, enum mclk_div mclk_div)
-{
-  uint16_t cntl_clock = getreg16(CLKM_REG(CNTL_CLK));
-  uint16_t cntl_arm_clk = getreg16(CLKM_REG(CNTL_ARM_CLK));
-
-  /* First set the vtcxo_div2 */
-
-  cntl_clock &= ~CLK_VCLKOUT_DIV2;
-  if (vtcxo_div2)
-      cntl_clock |= CLK_VTCXO_DIV2;
-  else
-      cntl_clock &= ~CLK_VTCXO_DIV2;
-
-  putreg16(cntl_clock, CLKM_REG(CNTL_CLK));
-
-  /* Then configure the MCLK divider */
-
-  cntl_arm_clk &= ~ARM_CLK_CLKIN_SEL0;
-  if (mclk_div & 0x80)
-    {
-      mclk_div &= ~0x80;
-      cntl_arm_clk |= ARM_CLK_MCLK_DIV5;
-    }
-  else
-    cntl_arm_clk &= ~ARM_CLK_MCLK_DIV5;
-
-  cntl_arm_clk &= ~(0x7 << ARM_CLK_MCLK_DIV_SHIFT);
-  cntl_arm_clk |= (mclk_div << ARM_CLK_MCLK_DIV_SHIFT);
-  putreg16(cntl_arm_clk, CLKM_REG(CNTL_ARM_CLK));
-
-  /* Then finally set the PLL */
-
-  calypso_pll_set(inp);
-}
-
-void calypso_mem_cfg(enum calypso_bank bank, uint8_t ws,
-                     enum calypso_mem_width width, int we)
-{
-  putreg16((ws & 0x1f) | ((width & 3) << 5) | ((we & 1) << 7),
-           BASE_ADDR_MEMIF + bank);
-}
-
-void calypso_bootrom(int enable)
-{
-  uint16_t conf = getreg16(MEMIF_REG(EXTRA_CONF));
-
-  conf |= (3 << 8);
-
-  if (enable)
-      conf &= ~(1 << 9);
-
-  putreg16(conf, MEMIF_REG(EXTRA_CONF));
-}
-
-void calypso_debugunit(int enable)
-{
-  uint16_t conf = getreg16(MEMIF_REG(EXTRA_CONF));
-
-  if (enable)
-      conf &= ~(1 << 11);
-  else
-      conf |= (1 << 11);
-
-  putreg16(conf, MEMIF_REG(EXTRA_CONF));
-}
-
-#define REG_RHEA_CNTL   0xfffff900
-#define REG_API_CNTL    0xfffff902
-#define REG_ARM_RHEA    0xfffff904
-
-void calypso_rhea_cfg(uint8_t fac0, uint8_t fac1, uint8_t timeout,
-                      uint8_t ws_h, uint8_t ws_l, uint8_t w_en0, uint8_t w_en1)
-{
-  putreg16(fac0 | (fac1 << 4) | (timeout << 8), REG_RHEA_CNTL);
-  putreg16(ws_h | (ws_l << 5), REG_API_CNTL);
-  putreg16(w_en0 | (w_en1 << 1), REG_ARM_RHEA);
-}
diff --git a/arch/arm/src/common/up_arch.h b/arch/arm/src/common/up_arch.h
index fc6981efb6ff5636a094bf0572ffb1a28e8e4126..c5fbc9023723b4f3f7cc0bbbcff0e4b1097b1407 100644
--- a/arch/arm/src/common/up_arch.h
+++ b/arch/arm/src/common/up_arch.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/common/up_arch.h
  *
- *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -45,10 +45,6 @@
 # include 
 #endif
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Inline Functions
  ****************************************************************************/
@@ -57,27 +53,11 @@
 
 # define getreg8(a)           (*(volatile uint8_t *)(a))
 # define putreg8(v,a)         (*(volatile uint8_t *)(a) = (v))
+# define getreg16(a)          (*(volatile uint16_t *)(a))
+# define putreg16(v,a)        (*(volatile uint16_t *)(a) = (v))
 # define getreg32(a)          (*(volatile uint32_t *)(a))
 # define putreg32(v,a)        (*(volatile uint32_t *)(a) = (v))
 
-/* Some compiler options will convert short loads and stores into byte loads
- * and stores.  We don't want this to happen for IO reads and writes!
- */
-
-/* # define getreg16(a)       (*(volatile uint16_t *)(a)) */
-static inline uint16_t getreg16(unsigned int addr)
-{
-  uint16_t retval;
- __asm__ __volatile__("\tldrh %0, [%1]\n\t" : "=r"(retval) : "r"(addr));
-  return retval;
-}
-
-/* define putreg16(v,a)       (*(volatile uint16_t *)(a) = (v)) */
-static inline void putreg16(uint16_t val, unsigned int addr)
-{
- __asm__ __volatile__("\tstrh %0, [%1]\n\t": : "r"(val), "r"(addr));
-}
-
 /****************************************************************************
  * Public Function Prototypes
  ****************************************************************************/
diff --git a/arch/arm/src/common/up_checkstack.c b/arch/arm/src/common/up_checkstack.c
index 55f89388e3ee983d72ce5ccabdf23acb71677733..f6b4034cbcb588c62a5e1d970d956c5573b9667d 100644
--- a/arch/arm/src/common/up_checkstack.c
+++ b/arch/arm/src/common/up_checkstack.c
@@ -84,7 +84,13 @@ static size_t do_stackcheck(uintptr_t alloc, size_t size)
   FAR uint32_t *ptr;
   size_t mark;
 
+  if (size == 0)
+    {
+      return 0;
+    }
+
   /* Get aligned addresses of the top and bottom of the stack */
+
 #ifdef CONFIG_TLS
   /* Skip over the TLS data structure at the bottom of the stack */
 
@@ -122,7 +128,8 @@ static size_t do_stackcheck(uintptr_t alloc, size_t size)
 #if 0
   if (mark + 16 > nwords)
     {
-      int i, j;
+      int i;
+      int j;
 
       ptr = (FAR uint32_t *)start;
       for (i = 0; i < size; i += 4*64)
diff --git a/arch/arm/src/common/up_createstack.c b/arch/arm/src/common/up_createstack.c
index c3aa9d7adb917d16f1e2c8c2c2e64402bbd8a26d..70d83a83a58ac63a42569869836ba0f42f3f07f3 100644
--- a/arch/arm/src/common/up_createstack.c
+++ b/arch/arm/src/common/up_createstack.c
@@ -205,12 +205,12 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
         }
 #endif /* CONFIG_TLS */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       /* Was the allocation successful? */
 
       if (!tcb->stack_alloc_ptr)
         {
-          sdbg("ERROR: Failed to allocate stack, size %d\n", stack_size);
+          serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
         }
 #endif
     }
diff --git a/arch/arm/src/common/up_exit.c b/arch/arm/src/common/up_exit.c
index 57137a60def127946b8ed5079c442e2433bd85d6..c746486d5b0ad42d0b3eddca7ec36b6faba737ee 100644
--- a/arch/arm/src/common/up_exit.c
+++ b/arch/arm/src/common/up_exit.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * common/up_exit.c
  *
- *   Copyright (C) 2007-2009, 201-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 201-2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -41,17 +41,27 @@
 
 #include 
 #include 
-#include 
 
+#include 
+#include 
 #ifdef CONFIG_DUMP_ON_EXIT
-#include 
+#  include 
 #endif
 
 #include "task/task.h"
 #include "sched/sched.h"
 #include "group/group.h"
+#include "irq/irq.h"
 #include "up_internal.h"
 
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef CONFIG_DEBUG_SCHED_INFO
+#  undef CONFIG_DUMP_ON_EXIT
+#endif
+
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -66,7 +76,7 @@
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_DUMP_ON_EXIT
 static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
 {
 #if CONFIG_NFILE_DESCRIPTORS > 0
@@ -77,8 +87,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
   int i;
 #endif
 
-  sdbg("  TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
-  sdbg("    priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
+  sinfo("  TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
+  sinfo("    priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
 
 #if CONFIG_NFILE_DESCRIPTORS > 0
   filelist = tcb->group->tg_filelist;
@@ -87,8 +97,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
       struct inode *inode = filelist->fl_files[i].f_inode;
       if (inode)
         {
-          sdbg("      fd=%d refcount=%d\n",
-               i, inode->i_crefs);
+          sinfo("      fd=%d refcount=%d\n",
+                i, inode->i_crefssinfo);
         }
     }
 #endif
@@ -100,13 +110,18 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
       struct file_struct *filep = &streamlist->sl_streams[i];
       if (filep->fs_fd >= 0)
         {
-#if CONFIG_STDIO_BUFFER_SIZE > 0
-          sdbg("      fd=%d nbytes=%d\n",
-               filep->fs_fd,
-               filep->fs_bufpos - filep->fs_bufstart);
-#else
-          sdbg("      fd=%d\n", filep->fs_fd);
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
+          if (filep->fs_bufstart != NULL)
+            {
+              sinfo("      fd=%d nbytes=%d\n",
+                    filep->fs_fd,
+                    filep->fs_bufpos - filep->fs_bufstart);
+            }
+          else
 #endif
+            {
+              sinfo("      fd=%d\n", filep->fs_fd);
+            }
         }
     }
 #endif
@@ -132,16 +147,16 @@ void _exit(int status)
 {
   struct tcb_s *tcb;
 
-  /* Disable interrupts.  They will be restored when the next
-   * task is started.
+  /* Make sure that we are in a critical section with local interrupts.
+   * The IRQ state will be restored when the next task is started.
    */
 
-  (void)up_irq_save();
+  (void)enter_critical_section();
 
-  slldbg("TCB=%p exiting\n", this_task());
+  sinfo("TCB=%p exiting\n", this_task());
 
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
-  slldbg("Other tasks:\n");
+#ifdef CONFIG_DUMP_ON_EXIT
+  sinfo("Other tasks:\n");
   sched_foreach(_up_dumponexit, NULL);
 #endif
 
@@ -169,4 +184,3 @@ void _exit(int status)
 
   up_fullcontextrestore(tcb->xcp.regs);
 }
-
diff --git a/arch/arm/src/common/up_initialize.c b/arch/arm/src/common/up_initialize.c
index 511138e4f51640de6328d0d1019d6241ca2c2898..5182598246ada2b35f3cdd4ebb1e4c1635419d43 100644
--- a/arch/arm/src/common/up_initialize.c
+++ b/arch/arm/src/common/up_initialize.c
@@ -44,14 +44,16 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
+#include 
 #include 
+#include 
 
 #include 
 
@@ -72,18 +74,18 @@
  *
  ****************************************************************************/
 
-#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG_FEATURES)
 static void up_calibratedelay(void)
 {
   int i;
 
-  lldbg("Beginning 100s delay\n");
+  _warn("Beginning 100s delay\n");
   for (i = 0; i < 100; i++)
     {
       up_mdelay(1000);
     }
 
-  lldbg("End 100s delay\n");
+  _warn("End 100s delay\n");
 }
 #else
 # define up_calibratedelay()
@@ -158,21 +160,21 @@ void up_initialize(void)
 
   up_irqinitialize();
 
+#ifdef CONFIG_PM
   /* Initialize the power management subsystem.  This MCU-specific function
    * must be called *very* early in the initialization sequence *before* any
    * other device drivers are initialized (since they may attempt to register
    * with the power management subsystem).
    */
 
-#ifdef CONFIG_PM
   up_pminitialize();
 #endif
 
+#ifdef CONFIG_ARCH_DMA
   /* Initialize the DMA subsystem if the weak function up_dmainitialize has been
    * brought into the build
    */
 
-#ifdef CONFIG_ARCH_DMA
 #ifdef CONFIG_HAVE_WEAKFUNCTIONS
   if (up_dmainitialize)
 #endif
@@ -185,7 +187,7 @@ void up_initialize(void)
 
 #if !defined(CONFIG_SUPPRESS_INTERRUPTS) && !defined(CONFIG_SUPPRESS_TIMER_INTS) && \
     !defined(CONFIG_SYSTEMTICK_EXTCLK)
-  up_timer_initialize();
+  arm_timer_initialize();
 #endif
 
   /* Register devices */
@@ -196,6 +198,14 @@ void up_initialize(void)
   devnull_register();   /* Standard /dev/null */
 #endif
 
+#if defined(CONFIG_DEV_RANDOM)
+  devrandom_register(); /* Standard /dev/random */
+#endif
+
+#if defined(CONFIG_DEV_URANDOM)
+  devurandom_register();   /* Standard /dev/urandom */
+#endif
+
 #if defined(CONFIG_DEV_ZERO)
   devzero_register();   /* Standard /dev/zero */
 #endif
@@ -222,37 +232,33 @@ void up_initialize(void)
 
 #if defined(CONFIG_DEV_LOWCONSOLE)
   lowconsole_init();
-#elif defined(CONFIG_SYSLOG_CONSOLE)
+#elif defined(CONFIG_CONSOLE_SYSLOG)
   syslog_console_init();
 #elif defined(CONFIG_RAMLOG_CONSOLE)
   ramlog_consoleinit();
 #endif
 
-  /* Initialize the HW crypto and /dev/crypto */
+#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_PSEUDOTERM_SUSV1)
+  /* Register the master pseudo-terminal multiplexor device */
 
-#if defined(CONFIG_CRYPTO)
-  up_cryptoinitialize();
+  (void)ptmx_register();
 #endif
 
-#if CONFIG_NFILE_DESCRIPTORS > 0
-#if defined(CONFIG_CRYPTO_CRYPTODEV)
-  devcrypto_register();
-#endif
-#endif
-
-  /* Initialize the Random Number Generator (RNG)  */
+  /* Early initialization of the system logging device.  Some SYSLOG channel
+   * can be initialized early in the initialization sequence because they
+   * depend on only minimal OS initialization.
+   */
 
-#ifdef CONFIG_DEV_RANDOM
-  up_rnginitialize();
-#endif
+  syslog_initialize(SYSLOG_INIT_EARLY);
 
-  /* Initialize the system logging device */
+#if defined(CONFIG_CRYPTO)
+  /* Initialize the HW crypto and /dev/crypto */
 
-#ifdef CONFIG_SYSLOG_CHAR
-  syslog_initialize();
+  up_cryptoinitialize();
 #endif
-#ifdef CONFIG_RAMLOG_SYSLOG
-  ramlog_sysloginit();
+
+#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_CRYPTO_CRYPTODEV)
+  devcrypto_register();
 #endif
 
 #ifndef CONFIG_NETDEV_LATEINIT
diff --git a/arch/arm/src/common/up_internal.h b/arch/arm/src/common/up_internal.h
index 8dccf8a1ef073639233fe062dd9d35990332f3d9..31d264828d395d72b60661364a0761d40c1d4d7c 100644
--- a/arch/arm/src/common/up_internal.h
+++ b/arch/arm/src/common/up_internal.h
@@ -63,6 +63,10 @@
 #undef  CONFIG_SUPPRESS_UART_CONFIG   /* DEFINED: Do not reconfig UART */
 #undef  CONFIG_DUMP_ON_EXIT           /* DEFINED: Dump task state on exit */
 
+#ifndef CONFIG_DEBUG_SCHED_INFO
+#  undef CONFIG_DUMP_ON_EXIT          /* Needs CONFIG_DEBUG_SCHED_INFO */
+#endif
+
 /* Determine which (if any) console driver to use.  If a console is enabled
  * and no other console device is specified, then a serial console is
  * assumed.
@@ -97,13 +101,6 @@
 #  define USE_SERIALDRIVER 1
 #endif
 
-/* Determine which device to use as the system logging device */
-
-#ifndef CONFIG_SYSLOG
-#  undef CONFIG_SYSLOG_CHAR
-#  undef CONFIG_RAMLOG_SYSLOG
-#endif
-
 /* Check if an interrupt stack size is configured */
 
 #ifndef CONFIG_ARCH_INTERRUPTSTACK
@@ -377,13 +374,13 @@ uint32_t *up_doirq(int irq, uint32_t *regs);
 
 /* Exception Handlers */
 
-int  up_svcall(int irq, FAR void *context);
-int  up_hardfault(int irq, FAR void *context);
+int  up_svcall(int irq, FAR void *context, FAR void *arg);
+int  up_hardfault(int irq, FAR void *context, FAR void *arg);
 
 #  if defined(CONFIG_ARCH_CORTEXM3) || defined(CONFIG_ARCH_CORTEXM4) || \
       defined(CONFIG_ARCH_CORTEXM7)
 
-int  up_memfault(int irq, FAR void *context);
+int  up_memfault(int irq, FAR void *context, FAR void *arg);
 
 #  endif /* CONFIG_ARCH_CORTEXM3,4,7 */
 
@@ -465,8 +462,7 @@ void up_restorefpu(const uint32_t *regs);
 
 /* System timer *************************************************************/
 
-void up_timer_initialize(void);
-int  up_timerisr(int irq, uint32_t *regs);
+void arm_timer_initialize(void);
 
 /* Low level serial output **************************************************/
 
@@ -548,12 +544,6 @@ void up_usbuninitialize(void);
 # define up_usbuninitialize()
 #endif
 
-/* Random Number Generator (RNG) ********************************************/
-
-#ifdef CONFIG_DEV_RANDOM
-void up_rnginitialize(void);
-#endif
-
 /* Debug ********************************************************************/
 #ifdef CONFIG_STACK_COLORATION
 void up_stack_color(FAR void *stackbase, size_t nbytes);
diff --git a/arch/arm/src/common/up_vfork.c b/arch/arm/src/common/up_vfork.c
index b902ccba7b9f93dcbd8e6f22181f472bd97a5f26..e655ab15b43c1648777e5f454ddcf04faec162f5 100644
--- a/arch/arm/src/common/up_vfork.c
+++ b/arch/arm/src/common/up_vfork.c
@@ -130,12 +130,12 @@ pid_t up_vfork(const struct vfork_s *context)
   uint32_t stackutil;
   int ret;
 
-  svdbg("vfork context [%p]:\n", context);
-  svdbg("  r4:%08x r5:%08x r6:%08x r7:%08x\n",
+  sinfo("vfork context [%p]:\n", context);
+  sinfo("  r4:%08x r5:%08x r6:%08x r7:%08x\n",
         context->r4, context->r5, context->r6, context->r7);
-  svdbg("  r8:%08x r9:%08x r10:%08x\n",
+  sinfo("  r8:%08x r9:%08x r10:%08x\n",
         context->r8, context->r9, context->r10);
-  svdbg("  fp:%08x sp:%08x lr:%08x\n",
+  sinfo("  fp:%08x sp:%08x lr:%08x\n",
         context->fp, context->sp, context->lr);
 
   /* Allocate and initialize a TCB for the child task. */
@@ -143,11 +143,11 @@ pid_t up_vfork(const struct vfork_s *context)
   child = task_vforksetup((start_t)(context->lr & ~1));
   if (!child)
     {
-      sdbg("ERROR: task_vforksetup failed\n");
+      serr("ERROR: task_vforksetup failed\n");
       return (pid_t)ERROR;
     }
 
-  svdbg("TCBs: Parent=%p Child=%p\n", parent, child);
+  sinfo("TCBs: Parent=%p Child=%p\n", parent, child);
 
   /* Get the size of the parent task's stack.  Due to alignment operations,
    * the adjusted stack size may be smaller than the stack size originally
@@ -162,7 +162,7 @@ pid_t up_vfork(const struct vfork_s *context)
                         parent->flags & TCB_FLAG_TTYPE_MASK);
   if (ret != OK)
     {
-      sdbg("ERROR: up_create_stack failed: %d\n", ret);
+      serr("ERROR: up_create_stack failed: %d\n", ret);
       task_vforkabort(child, -ret);
       return (pid_t)ERROR;
     }
@@ -176,7 +176,7 @@ pid_t up_vfork(const struct vfork_s *context)
   DEBUGASSERT((uint32_t)parent->adj_stack_ptr > context->sp);
   stackutil = (uint32_t)parent->adj_stack_ptr - context->sp;
 
-  svdbg("Parent: stacksize:%d stackutil:%d\n", stacksize, stackutil);
+  sinfo("Parent: stacksize:%d stackutil:%d\n", stacksize, stackutil);
 
   /* Make some feeble effort to preserve the stack contents.  This is
    * feeble because the stack surely contains invalid pointers and other
@@ -201,9 +201,9 @@ pid_t up_vfork(const struct vfork_s *context)
       newfp = context->fp;
     }
 
-  svdbg("Parent: stack base:%08x SP:%08x FP:%08x\n",
+  sinfo("Parent: stack base:%08x SP:%08x FP:%08x\n",
         parent->adj_stack_ptr, context->sp, context->fp);
-  svdbg("Child:  stack base:%08x SP:%08x FP:%08x\n",
+  sinfo("Child:  stack base:%08x SP:%08x FP:%08x\n",
         child->cmn.adj_stack_ptr, newsp, newfp);
 
   /* Update the stack pointer, frame pointer, and volatile registers.  When
diff --git a/arch/arm/src/dm320/Make.defs b/arch/arm/src/dm320/Make.defs
index ab9b2afa638eb4d521023ce9b2bf12f88679468b..0c408f66243deff031b91358c46f2c8bc48aa457 100644
--- a/arch/arm/src/dm320/Make.defs
+++ b/arch/arm/src/dm320/Make.defs
@@ -46,12 +46,6 @@ CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c
 CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_syscall.c up_unblocktask.c
 CMN_CSRCS += up_undefinedinsn.c up_usestack.c up_vfork.c
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c
-endif
-
 ifeq ($(CONFIG_STACK_COLORATION),y)
 CMN_CSRCS += up_checkstack.c
 endif
diff --git a/arch/arm/src/dm320/chip.h b/arch/arm/src/dm320/chip.h
index 73e53b68317bc91e2cac994345a12ced92f3d117..20c722ab6a1e93c937833babf60d864aa003a5f5 100644
--- a/arch/arm/src/dm320/chip.h
+++ b/arch/arm/src/dm320/chip.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __DM320_CHIP_H
-#define __DM320_CHIP_H
+#ifndef __ARCH_ARM_SRC_DM320_CHIP_H
+#define __ARCH_ARM_SRC_DM320_CHIP_H
 
 /************************************************************************************
  * Included Files
@@ -58,4 +58,4 @@
  * Inline Functions
  ************************************************************************************/
 
-#endif  /* __DM320_CHIP_H */
+#endif  /* __ARCH_ARM_SRC_DM320_CHIP_H */
diff --git a/arch/arm/src/dm320/dm320_decodeirq.c b/arch/arm/src/dm320/dm320_decodeirq.c
index 5d36a6bdc65685f41bc4bdb50e6710b3d82b6071..5d7e709588192ac5e9ad2f0dd0b3aa61e2cbf64e 100644
--- a/arch/arm/src/dm320/dm320_decodeirq.c
+++ b/arch/arm/src/dm320/dm320_decodeirq.c
@@ -51,22 +51,6 @@
 
 #include "group/group.h"
 
-/********************************************************************************
- * Pre-processor Definitions
- ********************************************************************************/
-
-/********************************************************************************
- * Public Data
- ********************************************************************************/
-
-/********************************************************************************
- * Private Data
- ********************************************************************************/
-
-/********************************************************************************
- * Private Functions
- ********************************************************************************/
-
 /********************************************************************************
  * Public Functions
  ********************************************************************************/
@@ -74,8 +58,8 @@
 void up_decodeirq(uint32_t *regs)
 {
 #ifdef CONFIG_SUPPRESS_INTERRUPTS
-  lowsyslog(LOG_ERR, "Unexpected IRQ\n");
   CURRENT_REGS = regs;
+  err("ERROR: Unexpected IRQ\n");
   PANIC();
 #else
   /* Decode the interrupt.  First, fetch the interrupt id register. */
diff --git a/arch/arm/src/dm320/dm320_emif.h b/arch/arm/src/dm320/dm320_emif.h
index 653e20fe0d5532f4970971a19b48e8e653e0630f..72d4e8947dc5d29d88f91016da5622ac8ca4cf4a 100644
--- a/arch/arm/src/dm320/dm320_emif.h
+++ b/arch/arm/src/dm320/dm320_emif.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __DM320_DM320_EMIF_H
-#define __DM320_DM320_EMIF_H
+#ifndef __ARCH_ARM_SRC_DM320_DM320_EMIF_H
+#define __ARCH_ARM_SRC_DM320_DM320_EMIF_H
 
 /************************************************************************************
  * Included Files
@@ -105,4 +105,4 @@
 
 #endif
 
-#endif  /* __DM320_DM320_EMIF_H */
+#endif  /* __ARCH_ARM_SRC_DM320_DM320_EMIF_H */
diff --git a/arch/arm/src/dm320/dm320_framebuffer.c b/arch/arm/src/dm320/dm320_framebuffer.c
index 8fd4ec44634f3890f2a9c883ed49a99fa9d48738..dcedcb62e5d277cd46d2280e1055017ef09db437 100644
--- a/arch/arm/src/dm320/dm320_framebuffer.c
+++ b/arch/arm/src/dm320/dm320_framebuffer.c
@@ -768,15 +768,15 @@ static void dm320_disable(void)
 {
   /* Disable all planes */
 
-  gvdbg("Inactivate OSD:\n");
+  ginfo("Inactivate OSD:\n");
 
   putreg16(0, DM320_OSD_OSDWIN0MD); /* Win0 mode = 0 (1:active) */
   putreg16(0, DM320_OSD_OSDWIN1MD); /* Win1 mode = 0 (1:active) */
   putreg16(0, DM320_OSD_RECTCUR);   /* Rectangular cursor mode = 0 (1:active) */
 
-  gvdbg("DM320_OSD_OSDWIN0MD:   %04x\n", getreg16(DM320_OSD_OSDWIN0MD));
-  gvdbg("DM320_OSD_OSDWIN1MD:   %04x\n", getreg16(DM320_OSD_OSDWIN1MD));
-  gvdbg("DM320_OSD_RECTCUR:     %04x\n", getreg16(DM320_OSD_RECTCUR));
+  ginfo("DM320_OSD_OSDWIN0MD:   %04x\n", getreg16(DM320_OSD_OSDWIN0MD));
+  ginfo("DM320_OSD_OSDWIN1MD:   %04x\n", getreg16(DM320_OSD_OSDWIN1MD));
+  ginfo("DM320_OSD_RECTCUR:     %04x\n", getreg16(DM320_OSD_RECTCUR));
 }
 
 /****************************************************************************
@@ -791,17 +791,17 @@ static void dm320_hwinitialize(void)
 
   /* Initialize the main video to correct the origin */
 
-  gvdbg("Setup main video origin:\n");
+  ginfo("Setup main video origin:\n");
 
   putreg16(CONFIG_DM320_BASEX, DM320_OSD_BASEPX);
   putreg16(CONFIG_DM320_BASEY, DM320_OSD_BASEPY);
 
-  gvdbg("DM320_OSD_BASEPX:      %04x\n", getreg16(DM320_OSD_BASEPX));
-  gvdbg("DM320_OSD_BASEPY:      %04x\n", getreg16(DM320_OSD_BASEPY));
+  ginfo("DM320_OSD_BASEPX:      %04x\n", getreg16(DM320_OSD_BASEPX));
+  ginfo("DM320_OSD_BASEPY:      %04x\n", getreg16(DM320_OSD_BASEPY));
 
   /* Set up the frame buffer address registers */
 
-  gvdbg("Setup framebuffer addresses:\n");
+  ginfo("Setup framebuffer addresses:\n");
 
 
   putreg16(((dm320_osd1upperoffset() << 8) |
@@ -809,9 +809,9 @@ static void dm320_hwinitialize(void)
   putreg16(dm320_osd0loweroffset(), DM320_OSD_OSDWIN0ADL);
   putreg16(dm320_osd1loweroffset(), DM320_OSD_OSDWIN1ADL);
 
-  gvdbg("DM320_OSD_OSDWINADH:   %04x\n", getreg16(DM320_OSD_OSDWINADH));
-  gvdbg("DM320_OSD_OSDWIN0ADL:  %04x\n", getreg16(DM320_OSD_OSDWIN0ADL));
-  gvdbg("DM320_OSD_OSDWIN1ADL:  %04x\n", getreg16(DM320_OSD_OSDWIN1ADL));
+  ginfo("DM320_OSD_OSDWINADH:   %04x\n", getreg16(DM320_OSD_OSDWINADH));
+  ginfo("DM320_OSD_OSDWIN0ADL:  %04x\n", getreg16(DM320_OSD_OSDWIN0ADL));
+  ginfo("DM320_OSD_OSDWIN1ADL:  %04x\n", getreg16(DM320_OSD_OSDWIN1ADL));
 
   /* Set up VID WIN0 */
 
@@ -820,19 +820,19 @@ static void dm320_hwinitialize(void)
 #endif
 
 #ifndef CONFIG_DM320_VID0_DISABLE
-  gvdbg("Initialize video win0:\n");
+  ginfo("Initialize video win0:\n");
   putreg16(dm320_vid0loweroffset(), DM320_OSD_VIDWIN0ADL);
 
-  gvdbg("DM320_OSD_VIDWINADH:   %04x\n", getreg16(DM320_OSD_VIDWINADH));
-  gvdbg("DM320_OSD_VIDWIN0ADL:  %04x\n", getreg16(DM320_OSD_VIDWIN0ADL));
+  ginfo("DM320_OSD_VIDWINADH:   %04x\n", getreg16(DM320_OSD_VIDWINADH));
+  ginfo("DM320_OSD_VIDWIN0ADL:  %04x\n", getreg16(DM320_OSD_VIDWIN0ADL));
   dm320_blankscreen((uint8_t *)g_vid0base, DM320_VID0_FBLEN);
 
 #ifndef CONFIG_DM320_DISABLE_PINGPONG
   putreg16(dm320_vid0ppupperoffset(), DM320_OSD_PPVWIN0ADH);
   putreg16(dm320_vid0pploweroffset(), DM320_OSD_PPVWIN0ADL);
 
-  gvdbg("DM320_OSD_PPVWIN0ADH:  %04x\n", getreg16(DM320_OSD_PPVWIN0ADH));
-  gvdbg("DM320_OSD_PPVWIN0ADL:  %04x\n", getreg16(DM320_OSD_PPVWIN0ADL));
+  ginfo("DM320_OSD_PPVWIN0ADH:  %04x\n", getreg16(DM320_OSD_PPVWIN0ADH));
+  ginfo("DM320_OSD_PPVWIN0ADL:  %04x\n", getreg16(DM320_OSD_PPVWIN0ADL));
   dm320_blankscreen((uint8_t *)g_vid0ppbase, DM320_VID0_FBLEN);
 #endif
 
@@ -842,21 +842,21 @@ static void dm320_hwinitialize(void)
   putreg16(CONFIG_DM320_VID0_XRES, DM320_OSD_VIDWIN0XL);
   putreg16(CONFIG_DM320_VID0_YRES, DM320_OSD_VIDWIN0YL);
 
-  gvdbg("DM320_OSD_VIDWIN0XP:   %04x\n", getreg16(DM320_OSD_VIDWIN0XP));
-  gvdbg("DM320_OSD_VIDWIN0YP:   %04x\n", getreg16(DM320_OSD_VIDWIN0YP));
-  gvdbg("DM320_OSD_VIDWIN0OFST: %04x\n", getreg16(DM320_OSD_VIDWIN0OFST));
-  gvdbg("DM320_OSD_VIDWIN0XL:   %04x\n", getreg16(DM320_OSD_VIDWIN0XL));
-  gvdbg("DM320_OSD_VIDWIN0YL:   %04x\n", getreg16(DM320_OSD_VIDWIN0YL));
+  ginfo("DM320_OSD_VIDWIN0XP:   %04x\n", getreg16(DM320_OSD_VIDWIN0XP));
+  ginfo("DM320_OSD_VIDWIN0YP:   %04x\n", getreg16(DM320_OSD_VIDWIN0YP));
+  ginfo("DM320_OSD_VIDWIN0OFST: %04x\n", getreg16(DM320_OSD_VIDWIN0OFST));
+  ginfo("DM320_OSD_VIDWIN0XL:   %04x\n", getreg16(DM320_OSD_VIDWIN0XL));
+  ginfo("DM320_OSD_VIDWIN0YL:   %04x\n", getreg16(DM320_OSD_VIDWIN0YL));
 #endif
 
   /* Set up VID WIN1 */
 
 #ifndef CONFIG_DM320_VID1_DISABLE
-  gvdbg("Initialize video win1:\n");
+  ginfo("Initialize video win1:\n");
   putreg16(dm320_vid1loweroffset(), DM320_OSD_VIDWIN1ADL);
 
-  gvdbg("DM320_OSD_VIDWINADH:   %04x\n", getreg16(DM320_OSD_VIDWINADH));
-  gvdbg("DM320_OSD_VIDWIN1ADL:  %04x\n", getreg16(DM320_OSD_VIDWIN1ADL));
+  ginfo("DM320_OSD_VIDWINADH:   %04x\n", getreg16(DM320_OSD_VIDWINADH));
+  ginfo("DM320_OSD_VIDWIN1ADL:  %04x\n", getreg16(DM320_OSD_VIDWIN1ADL));
   dm320_blankscreen((uint8_t *)g_vid1base, DM320_VID1_FBLEN);
 
   putreg16(CONFIG_DM320_VID1_XPOS, DM320_OSD_VIDWIN1XP);
@@ -865,20 +865,20 @@ static void dm320_hwinitialize(void)
   putreg16(CONFIG_DM320_VID1_XRES, DM320_OSD_VIDWIN1XL);
   putreg16(CONFIG_DM320_VID1_YRES, DM320_OSD_VIDWIN1YL);
 
-  gvdbg("DM320_OSD_VIDWIN1XP:   %04x\n", getreg16(DM320_OSD_VIDWIN1XP));
-  gvdbg("DM320_OSD_VIDWIN1YP:   %04x\n", getreg16(DM320_OSD_VIDWIN1YP));
-  gvdbg("DM320_OSD_VIDWIN1OFST: %04x\n", getreg16(DM320_OSD_VIDWIN1OFST));
-  gvdbg("DM320_OSD_VIDWIN1XL:   %04x\n", getreg16(DM320_OSD_VIDWIN1XL));
-  gvdbg("DM320_OSD_VIDWIN1YL:   %04x\n", getreg16(DM320_OSD_VIDWIN1YL));
+  ginfo("DM320_OSD_VIDWIN1XP:   %04x\n", getreg16(DM320_OSD_VIDWIN1XP));
+  ginfo("DM320_OSD_VIDWIN1YP:   %04x\n", getreg16(DM320_OSD_VIDWIN1YP));
+  ginfo("DM320_OSD_VIDWIN1OFST: %04x\n", getreg16(DM320_OSD_VIDWIN1OFST));
+  ginfo("DM320_OSD_VIDWIN1XL:   %04x\n", getreg16(DM320_OSD_VIDWIN1XL));
+  ginfo("DM320_OSD_VIDWIN1YL:   %04x\n", getreg16(DM320_OSD_VIDWIN1YL));
 #endif
 
   putreg16(DM320_VIDMODE, DM320_OSD_VIDWINMD);
-  gvdbg("DM320_OSD_VIDWINMD:    %04x\n", getreg16(DM320_OSD_VIDWINMD));
+  ginfo("DM320_OSD_VIDWINMD:    %04x\n", getreg16(DM320_OSD_VIDWINMD));
 
   /* Set up OSD WIN0 */
 
 #ifndef CONFIG_DM320_OSD0_DISABLE
-  gvdbg("Initialize OSD win0:\n");
+  ginfo("Initialize OSD win0:\n");
   dm320_blankscreen((uint8_t *)g_osd0base, DM320_OSD0_FBLEN);
 
   putreg16(CONFIG_DM320_OSD0_XPOS, DM320_OSD_OSDWIN0XP);
@@ -892,18 +892,18 @@ static void dm320_hwinitialize(void)
   putreg16(CONFIG_DM320_OSD0_YRES, DM320_OSD_OSDWIN0YL);
   putreg16(INITIAL_OSD0MODE, DM320_OSD_OSDWIN0MD);
 
-  gvdbg("DM320_OSD_OSDWIN0XP:   %04x\n", getreg16(DM320_OSD_OSDWIN0XP));
-  gvdbg("DM320_OSD_OSDWIN0YP:   %04x\n", getreg16(DM320_OSD_OSDWIN0YP));
-  gvdbg("DM320_OSD_OSDWIN0OFST: %04x\n", getreg16(DM320_OSD_OSDWIN0OFST));
-  gvdbg("DM320_OSD_OSDWIN0XL:   %04x\n", getreg16(DM320_OSD_OSDWIN0XL));
-  gvdbg("DM320_OSD_OSDWIN0YL:   %04x\n", getreg16(DM320_OSD_OSDWIN0YL));
-  gvdbg("DM320_OSD_OSDWIN0MD:   %04x\n", getreg16(DM320_OSD_OSDWIN0MD));
+  ginfo("DM320_OSD_OSDWIN0XP:   %04x\n", getreg16(DM320_OSD_OSDWIN0XP));
+  ginfo("DM320_OSD_OSDWIN0YP:   %04x\n", getreg16(DM320_OSD_OSDWIN0YP));
+  ginfo("DM320_OSD_OSDWIN0OFST: %04x\n", getreg16(DM320_OSD_OSDWIN0OFST));
+  ginfo("DM320_OSD_OSDWIN0XL:   %04x\n", getreg16(DM320_OSD_OSDWIN0XL));
+  ginfo("DM320_OSD_OSDWIN0YL:   %04x\n", getreg16(DM320_OSD_OSDWIN0YL));
+  ginfo("DM320_OSD_OSDWIN0MD:   %04x\n", getreg16(DM320_OSD_OSDWIN0MD));
 #endif
 
   /* Set up OSD WIN1 */
 
 #ifndef CONFIG_DM320_OSD1_DISABLE
-  gvdbg("Initialize OSD win1\n");
+  ginfo("Initialize OSD win1\n");
   dm320_blankscreen((uint8_t *)g_osd1base, DM320_OSD1_FBLEN);
 
   putreg16(CONFIG_DM320_OSD1_XPOS, DM320_OSD_OSDWIN1XP);
@@ -917,18 +917,18 @@ static void dm320_hwinitialize(void)
   putreg16(CONFIG_DM320_OSD1_YRES, DM320_OSD_OSDWIN1YL);
   putreg16(INITIAL_OSD1MODE, DM320_OSD_OSDWIN1MD);
 
-  gvdbg("DM320_OSD_OSDWIN1XP:   %04x\n", getreg16(DM320_OSD_OSDWIN1XP));
-  gvdbg("DM320_OSD_OSDWIN1YP:   %04x\n", getreg16(DM320_OSD_OSDWIN1YP));
-  gvdbg("DM320_OSD_OSDWIN1OFST: %04x\n", getreg16(DM320_OSD_OSDWIN1OFST));
-  gvdbg("DM320_OSD_OSDWIN1XL:   %04x\n", getreg16(DM320_OSD_OSDWIN1XL));
-  gvdbg("DM320_OSD_OSDWIN1YL:   %04x\n", getreg16(DM320_OSD_OSDWIN1YL));
-  gvdbg("DM320_OSD_OSDWIN1MD:   %04x\n", getreg16(DM320_OSD_OSDWIN1MD));
+  ginfo("DM320_OSD_OSDWIN1XP:   %04x\n", getreg16(DM320_OSD_OSDWIN1XP));
+  ginfo("DM320_OSD_OSDWIN1YP:   %04x\n", getreg16(DM320_OSD_OSDWIN1YP));
+  ginfo("DM320_OSD_OSDWIN1OFST: %04x\n", getreg16(DM320_OSD_OSDWIN1OFST));
+  ginfo("DM320_OSD_OSDWIN1XL:   %04x\n", getreg16(DM320_OSD_OSDWIN1XL));
+  ginfo("DM320_OSD_OSDWIN1YL:   %04x\n", getreg16(DM320_OSD_OSDWIN1YL));
+  ginfo("DM320_OSD_OSDWIN1MD:   %04x\n", getreg16(DM320_OSD_OSDWIN1MD));
 #endif
 
   /* Set up the rectangular cursor with defaults */
 
 #ifdef CONFIG_FB_HWCURSOR
-  gdbg("Initialize rectangular cursor\n");
+  lcdinfo("Initialize rectangular cursor\n");
 
   putreg16(0, DM320_OSD_CURXP);
   putreg16(0, DM320_OSD_CURYP);
@@ -946,11 +946,11 @@ static void dm320_hwinitialize(void)
 
   putreg16(DM320_RECTCURSOR_SETUP, DM320_OSD_RECTCUR);
 
-  gvdbg("DM320_OSD_CURXP:       %04x\n", getreg16(DM320_OSD_CURXP));
-  gvdbg("DM320_OSD_CURYP:       %04x\n", getreg16(DM320_OSD_CURYP));
-  gvdbg("DM320_OSD_CURXL:       %04x\n", getreg16(DM320_OSD_CURXL));
-  gvdbg("DM320_OSD_CURYL:       %04x\n", getreg16(DM320_OSD_CURYL));
-  gvdbg("DM320_OSD_RECTCUR:     %04x\n", getreg16(DM320_OSD_RECTCUR));
+  ginfo("DM320_OSD_CURXP:       %04x\n", getreg16(DM320_OSD_CURXP));
+  ginfo("DM320_OSD_CURYP:       %04x\n", getreg16(DM320_OSD_CURYP));
+  ginfo("DM320_OSD_CURXL:       %04x\n", getreg16(DM320_OSD_CURXL));
+  ginfo("DM320_OSD_CURYL:       %04x\n", getreg16(DM320_OSD_CURYL));
+  ginfo("DM320_OSD_RECTCUR:     %04x\n", getreg16(DM320_OSD_RECTCUR));
 #endif
 
   /* Set main window to the hardware default state.  That initial
@@ -969,7 +969,7 @@ static void dm320_hwinitialize(void)
    */
 
   putreg16(CONFIG_DM320_BKGDCLUT, DM320_OSD_OSDMODE);
-  gvdbg("DM320_OSD_OSDMODE:     %04x\n", getreg16(DM320_OSD_OSDMODE));
+  ginfo("DM320_OSD_OSDMODE:     %04x\n", getreg16(DM320_OSD_OSDMODE));
 }
 
 /****************************************************************************
@@ -980,7 +980,7 @@ static void dm320_hwinitialize(void)
 static int dm320_getvid0videoinfo(FAR struct fb_vtable_s *vtable,
                                   FAR struct fb_videoinfo_s *vinfo)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!vtable || !vinfo)
     {
       return -EINVAL;
@@ -1003,7 +1003,7 @@ static int dm320_getvid0videoinfo(FAR struct fb_vtable_s *vtable,
 static int dm320_getvid0planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
                                   FAR struct fb_planeinfo_s *pinfo)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!vtable || !pinfo)
     {
       return -EINVAL;
@@ -1027,7 +1027,7 @@ static int dm320_getvid0planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
 static int dm320_getvid1videoinfo(FAR struct fb_vtable_s *vtable,
                                   FAR struct fb_videoinfo_s *vinfo)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!vtable || !vinfo)
     {
       return -EINVAL;
@@ -1050,7 +1050,7 @@ static int dm320_getvid1videoinfo(FAR struct fb_vtable_s *vtable,
 static int dm320_getvid1planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
                                   FAR struct fb_planeinfo_s *pinfo)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!vtable || !pinfo)
     {
       return -EINVAL;
@@ -1074,7 +1074,7 @@ static int dm320_getvid1planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
 static int dm320_getosd0videoinfo(FAR struct fb_vtable_s *vtable,
                                   FAR struct fb_videoinfo_s *vinfo)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!vtable || !vinfo)
     {
       return -EINVAL;
@@ -1101,7 +1101,7 @@ static int dm320_getosd0videoinfo(FAR struct fb_vtable_s *vtable,
 static int dm320_getosd0planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
                                   FAR struct fb_planeinfo_s *pinfo)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!vtable || !pinfo)
     {
       return -EINVAL;
@@ -1125,7 +1125,7 @@ static int dm320_getosd0planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
 static int dm320_getosd1videoinfo(FAR struct fb_vtable_s *vtable,
                                   FAR struct fb_videoinfo_s *vinfo)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!vtable || !vinfo)
     {
       return -EINVAL;
@@ -1152,7 +1152,7 @@ static int dm320_getosd1videoinfo(FAR struct fb_vtable_s *vtable,
 static int dm320_getosd1planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
                                   FAR struct fb_planeinfo_s *pinfo)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!vtable || !pinfo)
     {
       return -EINVAL;
@@ -1196,7 +1196,7 @@ static int dm320_putcmap(FAR struct fb_vtable_s *vtable, FAR struct fb_cmap_s *c
   int len
   int i;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!vtable || !cmap || !cmap->read || !cmap->green || !cmap->blue)
     {
       return -EINVAL;
@@ -1245,7 +1245,7 @@ static int dm320_getcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_cursora
 {
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!vtable || !attrib)
     {
       return -EINVAL;
@@ -1265,16 +1265,16 @@ static int dm320_getcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_cursora
   attrib->mxsize.w = MAX_XRES;
   attrib->mxsize.h = MAX_YRES;
 
-  gvdbg("DM320_OSD_CURXP:       %04x\n", attrib->pos.x);
-  gvdbg("DM320_OSD_CURYP:       %04x\n", attrib->pos.y);
+  ginfo("DM320_OSD_CURXP:       %04x\n", attrib->pos.x);
+  ginfo("DM320_OSD_CURYP:       %04x\n", attrib->pos.y);
 #ifdef CONFIG_FB_HWCURSORSIZE
-  gvdbg("DM320_OSD_CURXL:       %04x\n", attrib->size.w);
-  gvdbg("DM320_OSD_CURYL:       %04x\n", attrib->size.h);
+  ginfo("DM320_OSD_CURXL:       %04x\n", attrib->size.w);
+  ginfo("DM320_OSD_CURYL:       %04x\n", attrib->size.h);
 #else
-  gvdbg("DM320_OSD_CURXL:       %04x\n", getreg16(DM320_OSD_CURXL));
-  gvdbg("DM320_OSD_CURYL:       %04x\n", getreg16(DM320_OSD_CURYL));
+  ginfo("DM320_OSD_CURXL:       %04x\n", getreg16(DM320_OSD_CURXL));
+  ginfo("DM320_OSD_CURYL:       %04x\n", getreg16(DM320_OSD_CURYL));
 #endif
-  gvdbg("DM320_OSD_RECTCUR:     %04x\n", getreg16(DM320_OSD_RECTCUR));
+  ginfo("DM320_OSD_RECTCUR:     %04x\n", getreg16(DM320_OSD_RECTCUR));
 }
 #endif
 
@@ -1288,7 +1288,7 @@ static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcurs
   irqstate_t flags;
   uint16_t regval;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!vtable || !settings)
     {
       return -EINVAL;
@@ -1300,7 +1300,7 @@ static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcurs
   flags = enter_critical_section();
   if ((settings->flags & FB_CUR_SETPOSITION) != 0)
     {
-      gvdbg("x=%d y=%d\n", settings->pos.x, settings->pos.y);
+      ginfo("x=%d y=%d\n", settings->pos.x, settings->pos.y);
 
       if (settings->pos.x > MAX_YRES)
         {
@@ -1319,7 +1319,7 @@ static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcurs
 #ifdef CONFIG_FB_HWCURSORSIZE
   if ((settings->flags & FB_CUR_SETSIZE) != 0)
     {
-      gvdbg("h=%d w=%d\n", settings->size.h, settings->size.w);
+      ginfo("h=%d w=%d\n", settings->size.h, settings->size.w);
 
       if (settings->size.w > MAX_YRES)
         {
@@ -1349,11 +1349,11 @@ static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcurs
   putreg16(regval, DM320_OSD_RECTCUR);
   leave_critical_section(flags);
 
-  gvdbg("DM320_OSD_CURXP:       %04x\n", getreg16(DM320_OSD_CURXP));
-  gvdbg("DM320_OSD_CURYP:       %04x\n", getreg16(DM320_OSD_CURYP));
-  gvdbg("DM320_OSD_CURXL:       %04x\n", getreg16(DM320_OSD_CURXL));
-  gvdbg("DM320_OSD_CURYL:       %04x\n", getreg16(DM320_OSD_CURYL));
-  gvdbg("DM320_OSD_RECTCUR:     %04x\n", getreg16(DM320_OSD_RECTCUR));
+  ginfo("DM320_OSD_CURXP:       %04x\n", getreg16(DM320_OSD_CURXP));
+  ginfo("DM320_OSD_CURYP:       %04x\n", getreg16(DM320_OSD_CURYP));
+  ginfo("DM320_OSD_CURXL:       %04x\n", getreg16(DM320_OSD_CURXL));
+  ginfo("DM320_OSD_CURYL:       %04x\n", getreg16(DM320_OSD_CURYL));
+  ginfo("DM320_OSD_RECTCUR:     %04x\n", getreg16(DM320_OSD_RECTCUR));
 }
 #endif
 
@@ -1381,17 +1381,17 @@ int up_fbinitialize(int display)
 {
   int ret;
 
-  gvdbg("Allocating framebuffers\n");
+  ginfo("Allocating framebuffers\n");
   ret = dm320_allocvideomemory();
   if (ret != 0)
     {
-      gdbg("Failed to allocate video buffers\n");
+      lcderr("ERROR: Failed to allocate video buffers\n");
       return ret;
     }
 
   /* Initialize the hardware */
 
-  gvdbg("Initializing hardware\n");
+  ginfo("Initializing hardware\n");
   dm320_hwinitialize();
   return 0;
 }
diff --git a/arch/arm/src/dm320/dm320_gio.h b/arch/arm/src/dm320/dm320_gio.h
index 136e96118ce096717dda1ae61ba41fe3dbecd496..5c0fdc73c3b9f9efa0f740cda30ca9e4dd2d4fbd 100644
--- a/arch/arm/src/dm320/dm320_gio.h
+++ b/arch/arm/src/dm320/dm320_gio.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __DM320_DM320GIO_H
-#define __DM320_DM320GIO_H
+#ifndef __ARCH_ARM_SRC_DM320_DM320_GIO_H
+#define __ARCH_ARM_SRC_DM320_DM320_GIO_H
 
 /************************************************************************************
  * Included Files
diff --git a/arch/arm/src/dm320/dm320_intc.h b/arch/arm/src/dm320/dm320_intc.h
index f05febb2f953ac5a118f0e6e5f23da64700cf27c..57bc5c1f346d0e90bbaa54f3e133a3dd9f5052f0 100644
--- a/arch/arm/src/dm320/dm320_intc.h
+++ b/arch/arm/src/dm320/dm320_intc.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __DM320_DM320_INTC_H
-#define __DM320_DM320_INTC_H
+#ifndef __ARCH_ARM_SRC_DM320_DM320_INTC_H
+#define __ARCH_ARM_SRC_DM320_DM320_INTC_H
 
 /************************************************************************************
  * Included Files
@@ -98,4 +98,4 @@
 
 #endif
 
-#endif  /* __DM320_DM320_INTC_H */
+#endif  /* __ARCH_ARM_SRC_DM320_DM320_INTC_H */
diff --git a/arch/arm/src/dm320/dm320_memorymap.h b/arch/arm/src/dm320/dm320_memorymap.h
index 67923b1507403702bb105d53b86f023431882150..a5db5963615fee61d2d1a6807db12962c9e1dff5 100644
--- a/arch/arm/src/dm320/dm320_memorymap.h
+++ b/arch/arm/src/dm320/dm320_memorymap.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __DM320_MEMORYMAP_H
-#define __DM320_MEMORYMAP_H
+#ifndef __ARCH_ARM_SRC_DM320_DM320_MEMORYMAP_H
+#define __ARCH_ARM_SRC_DM320_DM320_MEMORYMAP_H
 
 /************************************************************************************
  * Included Files
@@ -261,4 +261,4 @@
 
 #endif
 
-#endif  /* __DM320_MEMORYMAP_H */
+#endif  /* __ARCH_ARM_SRC_DM320_DM320_MEMORYMAP_H */
diff --git a/arch/arm/src/dm320/dm320_serial.c b/arch/arm/src/dm320/dm320_serial.c
index 19e5c9d7bdf2d319a1a9130c82d7eede212a4f01..964e8923f07ca6f696a1fda4de2491fdf22d9a68 100644
--- a/arch/arm/src/dm320/dm320_serial.c
+++ b/arch/arm/src/dm320/dm320_serial.c
@@ -1,8 +1,7 @@
 /****************************************************************************
  * arch/arm/src/dm320/dm320_serial.c
- * arch/arm/src/chip/dm320_serial.c
  *
- *   Copyright (C) 2007-2009, 2012-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2012-2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -89,7 +88,7 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-static int  up_interrupt(int irq, void *context);
+static int  up_interrupt(int irq, void *context, void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  up_receive(struct uart_dev_s *dev, uint32_t *status);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
@@ -430,7 +429,7 @@ static int up_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, up_interrupt);
+  ret = irq_attach(priv->irq, up_interrupt, dev);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
@@ -472,25 +471,14 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_interrupt(int irq, void *context)
+static int up_interrupt(int irq, void *context, void *arg)
 {
-  struct uart_dev_s *dev = NULL;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct up_dev_s   *priv;
   uint16_t           status;
   int                passes = 0;
 
-  if (g_uart1priv.irq == irq)
-    {
-      dev = &g_uart1port;
-    }
-  else if (g_uart0priv.irq == irq)
-    {
-      dev = &g_uart0port;
-    }
-  else
-    {
-      PANIC();
-    }
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct up_dev_s *)dev->priv;
 
   /* Loop until there are no characters to be transferred or,
diff --git a/arch/arm/src/dm320/dm320_timer.h b/arch/arm/src/dm320/dm320_timer.h
index 2ef40790673b0e4e2a90cc2f6bf2641973d14c5e..5b1830b98c7f975f6d486509179942f69a5ad085 100644
--- a/arch/arm/src/dm320/dm320_timer.h
+++ b/arch/arm/src/dm320/dm320_timer.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __DM320_TIMER_H
-#define __DM320_TIMER_H
+#ifndef __ARCH_ARM_SRC_DM320_DM320_TIMER_H
+#define __ARCH_ARM_SRC_DM320_DM320_TIMER_H
 
 /************************************************************************************
  * Included Files
@@ -105,4 +105,4 @@
 
 #endif
 
-#endif  /* __DM320_TIMER_H */
+#endif  /* __ARCH_ARM_SRC_DM320_DM320_TIMER_H */
diff --git a/arch/arm/src/dm320/dm320_timerisr.c b/arch/arm/src/dm320/dm320_timerisr.c
index e88cac0630c4f1875ffb66b2bb3ff65bfc891ef0..735af0460dad4c15fd3f2d2fe6f1e7f34817c9fc 100644
--- a/arch/arm/src/dm320/dm320_timerisr.c
+++ b/arch/arm/src/dm320/dm320_timerisr.c
@@ -2,7 +2,7 @@
  * arch/arm/src/dm320/dm320_timerisr.c
  * arch/arm/src/chip/dm320_timerisr.c
  *
- *   Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2009, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -97,19 +97,11 @@
 #define DM320_TMR0_PRSCL 9                      /* (see above) */
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  dm320_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -117,7 +109,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int dm320_timerisr(int irq, uint32_t *regs, FAR void *arg)
 {
   /* Process timer interrupt */
 
@@ -126,7 +118,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize the timer
@@ -134,7 +130,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   up_disable_irq(DM320_IRQ_SYSTIMER);
 
@@ -151,7 +147,7 @@ void up_timer_initialize(void)
 
   /* Attach and enable the timer interrupt */
 
-  irq_attach(DM320_IRQ_SYSTIMER, (xcpt_t)up_timerisr);
+  irq_attach(DM320_IRQ_SYSTIMER, (xcpt_t)dm320_timerisr, NULL);
   up_enable_irq(DM320_IRQ_SYSTIMER);
 }
 
diff --git a/arch/arm/src/dm320/dm320_uart.h b/arch/arm/src/dm320/dm320_uart.h
index d668489412075518199c52a170475331f8e97dfd..af9c1df91f8ff4001dd187c3194681e9d4a6661e 100644
--- a/arch/arm/src/dm320/dm320_uart.h
+++ b/arch/arm/src/dm320/dm320_uart.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __DM320_UART_H
-#define __DM320_UART_H
+#ifndef __ARCH_ARM_SRC_DM320_DM320_UART_H
+#define __ARCH_ARM_SRC_DM320_DM320_UART_H
 
 /************************************************************************************
  * Included Files
@@ -173,4 +173,4 @@
  * Inline Functions
  ************************************************************************************/
 
-#endif  /* __DM320_UART_H */
+#endif  /* __ARCH_ARM_SRC_DM320_DM320_UART_H */
diff --git a/arch/arm/src/dm320/dm320_usbdev.c b/arch/arm/src/dm320/dm320_usbdev.c
index f0f87b7f584c88cbe5ca18d1eac7ebf1bc4b2102..18dce86dbf164c93689ae1f9dbd7e57abd3abc99 100644
--- a/arch/arm/src/dm320/dm320_usbdev.c
+++ b/arch/arm/src/dm320/dm320_usbdev.c
@@ -268,7 +268,7 @@ struct dm320_epinfo_s
 
 /* Register operations */
 
-#if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_DM320_USBDEV_REGDEBUG
 static uint32_t dm320_getreg8(uint32_t addr);
 static uint32_t dm320_getreg16(uint32_t addr);
 static uint32_t dm320_getreg32(uint32_t addr);
@@ -309,8 +309,8 @@ static void dm320_dispatchrequest(struct dm320_usbdev_s *priv,
               const struct usb_ctrlreq_s *ctrl);
 static inline void dm320_ep0setup(struct dm320_usbdev_s *priv);
 static inline uint32_t dm320_highestpriinterrupt(int intstatus);
-static int  dm320_ctlrinterrupt(int irq, FAR void *context);
-static int  dm320_attachinterrupt(int irq, FAR void *context);
+static int  dm320_ctlrinterrupt(int irq, FAR void *context, FAR void *arg);
+static int  dm320_attachinterrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Initialization operations */
 
@@ -422,7 +422,7 @@ static const struct dm320_epinfo_s g_epinfo[DM320_NENDPOINTS] =
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_DM320_USBDEV_REGDEBUG
 static uint8_t dm320_getreg8(uint32_t addr)
 {
   static uint32_t prevaddr = 0;
@@ -443,7 +443,7 @@ static uint8_t dm320_getreg8(uint32_t addr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              uinfo("...\n");
             }
 
           return val;
@@ -460,7 +460,7 @@ static uint8_t dm320_getreg8(uint32_t addr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          uinfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -472,7 +472,7 @@ static uint8_t dm320_getreg8(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%02x\n", addr, val);
+  uinfo("%08x->%02x\n", addr, val);
   return val;
 }
 #endif
@@ -485,7 +485,7 @@ static uint8_t dm320_getreg8(uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_DM320_USBDEV_REGDEBUG
 static uint32_t dm320_getreg16(uint32_t addr)
 {
   static uint32_t prevaddr = 0;
@@ -506,7 +506,7 @@ static uint32_t dm320_getreg16(uint32_t addr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              uinfo("...\n");
             }
 
           return val;
@@ -523,7 +523,7 @@ static uint32_t dm320_getreg16(uint32_t addr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          uinfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -535,7 +535,7 @@ static uint32_t dm320_getreg16(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%04x\n", addr, val);
+  uinfo("%08x->%04x\n", addr, val);
   return val;
 }
 #endif
@@ -548,7 +548,7 @@ static uint32_t dm320_getreg16(uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_DM320_USBDEV_REGDEBUG
 static uint32_t dm320_getreg32(uint32_t addr)
 {
   static uint32_t prevaddr = 0;
@@ -569,7 +569,7 @@ static uint32_t dm320_getreg32(uint32_t addr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              uinfo("...\n");
             }
 
           return val;
@@ -586,7 +586,7 @@ static uint32_t dm320_getreg32(uint32_t addr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          uinfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -598,7 +598,7 @@ static uint32_t dm320_getreg32(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%08x\n", addr, val);
+  uinfo("%08x->%08x\n", addr, val);
   return val;
 }
 #endif
@@ -611,12 +611,12 @@ static uint32_t dm320_getreg32(uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_DM320_USBDEV_REGDEBUG
 static void dm320_putreg8(uint8_t val, uint32_t addr)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%02x\n", addr, val);
+  uinfo("%08x<-%02x\n", addr, val);
 
   /* Write the value */
 
@@ -632,12 +632,12 @@ static void dm320_putreg8(uint8_t val, uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_DM320_USBDEV_REGDEBUG
 static void dm320_putreg16(uint16_t val, uint32_t addr)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%04x\n", addr, val);
+  uinfo("%08x<-%04x\n", addr, val);
 
   /* Write the value */
 
@@ -653,12 +653,12 @@ static void dm320_putreg16(uint16_t val, uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_DM320_USBDEV_REGDEBUG
 static void dm320_putreg32(uint32_t val, uint32_t addr)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", addr, val);
+  uinfo("%08x<-%08x\n", addr, val);
 
   /* Write the value */
 
@@ -1216,8 +1216,8 @@ static inline void dm320_ep0setup(struct dm320_usbdev_s *priv)
   value = GETUINT16(ctrl.value);
   len   = GETUINT16(ctrl.len);
 
-  ullvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
-          ctrl.type, ctrl.req, value, index, len);
+  uinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+        ctrl.type, ctrl.req, value, index, len);
 
   /* Dispatch any non-standard requests */
 
@@ -1513,7 +1513,7 @@ static inline uint32_t dm320_highestpriinterrupt(int intstatus)
  *
  ****************************************************************************/
 
-static int dm320_ctlrinterrupt(int irq, FAR void *context)
+static int dm320_ctlrinterrupt(int irq, FAR void *context, FAR void *arg)
 {
   struct dm320_usbdev_s *priv = &g_usbdev;
   struct dm320_ep_s *privep ;
@@ -1618,7 +1618,7 @@ static int dm320_ctlrinterrupt(int irq, FAR void *context)
               }
             else
               {
-                ullvdbg("Pending data on OUT endpoint\n");
+                uinfo("Pending data on OUT endpoint\n");
                 priv->rxpending = 1;
               }
           }
@@ -1680,7 +1680,7 @@ static int dm320_ctlrinterrupt(int irq, FAR void *context)
  *
  ****************************************************************************/
 
-static int dm320_attachinterrupt(int irq, FAR void *context)
+static int dm320_attachinterrupt(int irq, FAR void *context, FAR void *arg)
 {
   struct dm320_usbdev_s *priv = &g_usbdev;
   uint16_t gio;
@@ -1943,7 +1943,7 @@ static int dm320_epdisable(FAR struct usbdev_ep_s *ep)
   FAR struct dm320_ep_s *privep = (FAR struct dm320_ep_s *)ep;
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(DM320_TRACEERR_INVALIDPARMS), 0);
@@ -1974,7 +1974,7 @@ static FAR struct usbdev_req_s *dm320_epallocreq(FAR struct usbdev_ep_s *ep)
 {
   FAR struct dm320_req_s *privreq;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       return NULL;
@@ -2005,7 +2005,7 @@ static void dm320_epfreereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
 {
   FAR struct dm320_req_s *privreq = (FAR struct dm320_req_s *)req;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(DM320_TRACEERR_INVALIDPARMS), 0);
@@ -2075,7 +2075,7 @@ static int dm320_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
   irqstate_t flags;
   int ret = OK;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!req || !req->callback || !req->buf || !ep)
     {
       usbtrace(TRACE_DEVERROR(DM320_TRACEERR_INVALIDPARMS), 0);
@@ -2170,7 +2170,7 @@ static int dm320_epcancel(struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req)
   FAR struct dm320_usbdev_s *priv;
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(DM320_TRACEERR_INVALIDPARMS), 0);
@@ -2293,7 +2293,7 @@ static int dm320_getframe(struct usbdev_s *dev)
 
   usbtrace(TRACE_DEVGETFRAME, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(DM320_TRACEERR_INVALIDPARMS), 0);
@@ -2345,7 +2345,7 @@ static int dm320_selfpowered(struct usbdev_s *dev, bool selfpowered)
 
   usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(DM320_TRACEERR_INVALIDPARMS), 0);
@@ -2415,9 +2415,9 @@ void up_usbinitialize(void)
   memset(priv, 0, sizeof(struct dm320_usbdev_s));
   priv->usbdev.ops = &g_devops;
 
-#ifdef CONFIG_DEBUG_USB
+#ifdef CONFIG_DEBUG_USB_INFO
   chiprev = dm320_getreg16(DM320_BUSC_REVR);
-  ulldbg("DM320 revision : %d.%d\n", chiprev >> 4, chiprev & 0x0f);
+  uinfo("DM320 revision : %d.%d\n", chiprev >> 4, chiprev & 0x0f);
 #endif
 
   /* Enable USB clock & GIO clock  */
@@ -2438,7 +2438,7 @@ void up_usbinitialize(void)
 
   /* Attach host attach GIO interrupt */
 
-  if (irq_attach(IRQ_USBATTACH, dm320_attachinterrupt) != 0)
+  if (irq_attach(IRQ_USBATTACH, dm320_attachinterrupt, NULL) != 0)
     {
       usbtrace(TRACE_DEVERROR(DM320_TRACEERR_ATTACHIRQREG), 0);
       goto errout;
@@ -2448,7 +2448,7 @@ void up_usbinitialize(void)
    * enabled when the driver is bound
    */
 
-  if (irq_attach(DM320_IRQ_USB1, dm320_ctlrinterrupt) != 0)
+  if (irq_attach(DM320_IRQ_USB1, dm320_ctlrinterrupt, NULL) != 0)
     {
       usbtrace(TRACE_DEVERROR(DM320_TRACEERR_COREIRQREG), 0);
       goto errout;
@@ -2544,7 +2544,7 @@ int usbdev_register(FAR struct usbdevclass_driver_s *driver)
 
   usbtrace(TRACE_DEVREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || (driver->speed != USB_SPEED_FULL) || !driver->ops->bind ||
       !driver->ops->unbind || !driver->ops->setup)
     {
@@ -2602,7 +2602,7 @@ int usbdev_unregister(FAR struct usbdevclass_driver_s *driver)
 {
   usbtrace(TRACE_DEVUNREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (driver != g_usbdev.driver)
     {
       usbtrace(TRACE_DEVERROR(DM320_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/efm32/Kconfig b/arch/arm/src/efm32/Kconfig
index ad1abfbfa06550a44aeb96d644df6eed23467004..877cca10740d2309d6d0830c87e6d79f490e2eb9 100644
--- a/arch/arm/src/efm32/Kconfig
+++ b/arch/arm/src/efm32/Kconfig
@@ -140,7 +140,7 @@ config EFM32_FLASHPROG
 config EFM32_RMU_DEBUG
 	bool "Reset Management Unit (RMU) DEBUG "
 	default n
-	depends on EFM32_RMU && DEBUG
+	depends on EFM32_RMU && DEBUG_FEATURES
 
 config EFM32_I2C0
 	bool "I2C0"
diff --git a/arch/arm/src/efm32/Make.defs b/arch/arm/src/efm32/Make.defs
index 623941031bb7e1ed505e2d9c6ec5f165485e2bc4..0b5ae3819fd0f030bf37640498e0128165627afb 100644
--- a/arch/arm/src/efm32/Make.defs
+++ b/arch/arm/src/efm32/Make.defs
@@ -63,10 +63,6 @@ ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
 CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
 endif
 
-ifeq ($(CONFIG_ARCH_MEMCPY),y)
-CMN_ASRCS += up_memcpy.S
-endif
-
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
 CMN_CSRCS += up_mpu.c up_task_start.c up_pthread_start.c
 ifneq ($(CONFIG_DISABLE_SIGNALS),y)
@@ -79,12 +75,6 @@ ifeq ($(CONFIG_STACK_COLORATION),y)
 CMN_CSRCS += up_checkstack.c
 endif
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c
-endif
-
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += up_fpu.S
 ifneq ($(CONFIG_ARMV7M_CMNVECTOR),y)
diff --git a/arch/arm/src/efm32/efm32_adc.c b/arch/arm/src/efm32/efm32_adc.c
index 53cb731ad6091b64e8682a580d9b2779f81d5bfc..e79c2a61ef53b568ffbc67e4557d9e62e2e87f06 100644
--- a/arch/arm/src/efm32/efm32_adc.c
+++ b/arch/arm/src/efm32/efm32_adc.c
@@ -123,7 +123,7 @@ static void     adc_hw_reset(struct efm32_dev_s *priv, bool reset);
 
 /* ADC Interrupt Handler */
 
-static int adc_interrupt(FAR struct adc_dev_s *dev);
+static int adc_interrupt(int irq, FAR void *context, FAR struct adc_dev_s *dev);
 
 /* ADC Driver Methods */
 
@@ -716,23 +716,23 @@ endif /* defined(ADC_COUNT) && (ADC_COUNT > 0) */
 #ifdef ADC_HAVE_TIMER
 static void adc_tim_dumpregs(struct efm32_dev_s *priv, FAR const char *msg)
 {
-#if defined(CONFIG_DEBUG_ANALOG) && defined(CONFIG_DEBUG_VERBOSE)
-  avdbg("%s:\n", msg);
-  avdbg("  CR1: %04x CR2:  %04x SMCR:  %04x DIER:  %04x\n",
+#if defined(CONFIG_DEBUG_ANALOG) && defined(CONFIG_DEBUG_INFO)
+  ainfo("%s:\n", msg);
+  ainfo("  CR1: %04x CR2:  %04x SMCR:  %04x DIER:  %04x\n",
         tim_getreg(priv, EFM32_GTIM_CR1_OFFSET),
         tim_getreg(priv, EFM32_GTIM_CR2_OFFSET),
         tim_getreg(priv, EFM32_GTIM_SMCR_OFFSET),
         tim_getreg(priv, EFM32_GTIM_DIER_OFFSET));
-  avdbg("   SR: %04x EGR:  0000 CCMR1: %04x CCMR2: %04x\n",
+  ainfo("   SR: %04x EGR:  0000 CCMR1: %04x CCMR2: %04x\n",
         tim_getreg(priv, EFM32_GTIM_SR_OFFSET),
         tim_getreg(priv, EFM32_GTIM_CCMR1_OFFSET),
         tim_getreg(priv, EFM32_GTIM_CCMR2_OFFSET));
-  avdbg(" CCER: %04x CNT:  %04x PSC:   %04x ARR:   %04x\n",
+  ainfo(" CCER: %04x CNT:  %04x PSC:   %04x ARR:   %04x\n",
         tim_getreg(priv, EFM32_GTIM_CCER_OFFSET),
         tim_getreg(priv, EFM32_GTIM_CNT_OFFSET),
         tim_getreg(priv, EFM32_GTIM_PSC_OFFSET),
         tim_getreg(priv, EFM32_GTIM_ARR_OFFSET));
-  avdbg(" CCR1: %04x CCR2: %04x CCR3:  %04x CCR4:  %04x\n",
+  ainfo(" CCR1: %04x CCR2: %04x CCR3:  %04x CCR4:  %04x\n",
         tim_getreg(priv, EFM32_GTIM_CCR1_OFFSET),
         tim_getreg(priv, EFM32_GTIM_CCR2_OFFSET),
         tim_getreg(priv, EFM32_GTIM_CCR3_OFFSET),
@@ -740,7 +740,7 @@ static void adc_tim_dumpregs(struct efm32_dev_s *priv, FAR const char *msg)
 
   if (priv->tbase == EFM32_TIM1_BASE || priv->tbase == EFM32_TIM8_BASE)
     {
-      avdbg("  RCR: %04x BDTR: %04x DCR:   %04x DMAR:  %04x\n",
+      ainfo("  RCR: %04x BDTR: %04x DCR:   %04x DMAR:  %04x\n",
             tim_getreg(priv, EFM32_ATIM_RCR_OFFSET),
             tim_getreg(priv, EFM32_ATIM_BDTR_OFFSET),
             tim_getreg(priv, EFM32_ATIM_DCR_OFFSET),
@@ -748,7 +748,7 @@ static void adc_tim_dumpregs(struct efm32_dev_s *priv, FAR const char *msg)
     }
   else
     {
-      avdbg("  DCR: %04x DMAR: %04x\n",
+      ainfo("  DCR: %04x DMAR: %04x\n",
             tim_getreg(priv, EFM32_GTIM_DCR_OFFSET),
             tim_getreg(priv, EFM32_GTIM_DMAR_OFFSET));
     }
@@ -775,7 +775,7 @@ static void adc_startconv(struct efm32_dev_s *priv, bool enable)
 {
   uint32_t regval;
 
-  avdbg("enable: %d\n", enable);
+  ainfo("enable: %d\n", enable);
 
   regval = adc_getreg(priv, EFM32_ADC_CR2_OFFSET);
   if (enable)
@@ -864,7 +864,7 @@ static void adc_enable(FAR struct efm32_dev_s *priv, bool enable)
 {
   uint32_t regval;
 
-  avdbg("enable: %d\n", enable);
+  ainfo("enable: %d\n", enable);
 
   regval  = adc_getreg(priv, EFM32_ADC_CR2_OFFSET);
   if (enable)
@@ -922,7 +922,7 @@ static void adc_reset(FAR struct adc_dev_s *dev)
   int ret;
 #endif
 
-  avdbg("intf: ADC%d\n", priv->intf);
+  ainfo("intf: ADC%d\n", priv->intf);
   flags = enter_critical_section();
 
   /* Enable ADC reset state */
@@ -1040,11 +1040,11 @@ static void adc_reset(FAR struct adc_dev_s *dev)
 
   leave_critical_section(flags);
 
-  avdbg("SR:   0x%08x CR1:  0x%08x CR2:  0x%08x\n",
+  ainfo("SR:   0x%08x CR1:  0x%08x CR2:  0x%08x\n",
         adc_getreg(priv, EFM32_ADC_SR_OFFSET),
         adc_getreg(priv, EFM32_ADC_CR1_OFFSET),
         adc_getreg(priv, EFM32_ADC_CR2_OFFSET));
-  avdbg("SQR1: 0x%08x SQR2: 0x%08x SQR3: 0x%08x\n",
+  ainfo("SQR1: 0x%08x SQR2: 0x%08x SQR3: 0x%08x\n",
         adc_getreg(priv, EFM32_ADC_SQR1_OFFSET),
         adc_getreg(priv, EFM32_ADC_SQR2_OFFSET),
         adc_getreg(priv, EFM32_ADC_SQR3_OFFSET));
@@ -1072,7 +1072,7 @@ static int adc_setup(FAR struct adc_dev_s *dev)
 
   /* Attach the ADC interrupt */
 
-  ret = irq_attach(priv->irq, priv->isr);
+  ret = irq_attach(priv->irq, priv->isr, dev);
   if (ret == OK)
     {
       /* Make sure that the ADC device is in the powered up, reset state */
@@ -1081,7 +1081,7 @@ static int adc_setup(FAR struct adc_dev_s *dev)
 
       /* Enable the ADC interrupt */
 
-      avdbg("Enable the ADC interrupt: irq=%d\n", priv->irq);
+      ainfo("Enable the ADC interrupt: irq=%d\n", priv->irq);
       up_enable_irq(priv->irq);
     }
 
@@ -1132,7 +1132,7 @@ static void adc_rxint(FAR struct adc_dev_s *dev, bool enable)
   FAR struct efm32_dev_s *priv = (FAR struct efm32_dev_s *)dev->ad_priv;
   uint32_t regval;
 
-  avdbg("intf: %d enable: %d\n", priv->intf, enable);
+  ainfo("intf: %d enable: %d\n", priv->intf, enable);
 
   regval = adc_getreg(priv, EFM32_ADC_CR1_OFFSET);
   if (enable)
@@ -1180,7 +1180,7 @@ static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg)
  *
  ****************************************************************************/
 
-static int adc_interrupt(FAR struct adc_dev_s *dev)
+static int adc_interrupt(int irq, FAR void *context, FAR struct adc_dev_s *dev)
 {
   FAR struct efm32_dev_s *priv = (FAR struct efm32_dev_s *)dev->ad_priv;
   uint32_t adcsr;
@@ -1191,7 +1191,7 @@ static int adc_interrupt(FAR struct adc_dev_s *dev)
   adcsr = adc_getreg(priv, EFM32_ADC_SR_OFFSET);
   if ((adcsr & ADC_SR_AWD) != 0)
     {
-      alldbg("WARNING: Analog Watchdog, Value converted out of range!\n");
+      awarn("WARNING: Analog Watchdog, Value converted out of range!\n");
     }
 
   /* EOC: End of conversion */
@@ -1271,12 +1271,12 @@ struct adc_dev_s *efm32_adcinitialize(int intf, const uint8_t *chanlist, int nch
   FAR struct adc_dev_s   *dev;
   FAR struct efm32_dev_s *priv;
 
-  avdbg("intf: %d nchannels: %d\n", intf, nchannels);
+  ainfo("intf: %d nchannels: %d\n", intf, nchannels);
 
 #ifdef CONFIG_EFM32_ADC1
   if (intf == 1)
     {
-      avdbg("ADC1 Selected\n");
+      ainfo("ADC1 Selected\n");
       dev = &g_adcdev1;
     }
   else
@@ -1284,7 +1284,7 @@ struct adc_dev_s *efm32_adcinitialize(int intf, const uint8_t *chanlist, int nch
 #ifdef CONFIG_EFM32_ADC2
   if (intf == 2)
     {
-      avdbg("ADC2 Selected\n");
+      ainfo("ADC2 Selected\n");
       dev = &g_adcdev2;
     }
   else
@@ -1292,13 +1292,13 @@ struct adc_dev_s *efm32_adcinitialize(int intf, const uint8_t *chanlist, int nch
 #ifdef CONFIG_EFM32_ADC3
   if (intf == 3)
     {
-      avdbg("ADC3 Selected\n");
+      ainfo("ADC3 Selected\n");
       dev = &g_adcdev3;
     }
   else
 #endif
     {
-      adbg("No ADC interface defined\n");
+      aerr("ERROR: No ADC interface defined\n");
       return NULL;
     }
 
diff --git a/arch/arm/src/efm32/efm32_clockconfig.c b/arch/arm/src/efm32/efm32_clockconfig.c
index e2f0d3b5df7fc7530b39e467470ce7f587dc56d0..aeef784326b1d08107ce811c7946921d42de39c9 100644
--- a/arch/arm/src/efm32/efm32_clockconfig.c
+++ b/arch/arm/src/efm32/efm32_clockconfig.c
@@ -450,7 +450,7 @@ static inline uint32_t efm32_hfclk_config(uint32_t hfclksel, uint32_t hfclkdiv)
       }
       break;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       default:
         PANIC();
 #endif
@@ -884,7 +884,7 @@ static inline void efm32_gpioclock(void)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_SYSLOG) || defined(CONFIG_ARMV7M_ITMSYSLOG)
+#ifdef CONFIG_ARMV7M_ITMSYSLOG
 static inline void efm32_itm_syslog(void)
 {
   int regval;
@@ -909,9 +909,6 @@ static inline void efm32_itm_syslog(void)
 
   efm32_enable_auxhfrco();
 
-  /* Then perform ARMv7-M ITM SYSLOG initialization */
-
-  itm_syslog_initialize();
 }
 #else
 #  define efm32_itm_syslog()
diff --git a/arch/arm/src/efm32/efm32_config.h b/arch/arm/src/efm32/efm32_config.h
index b60c3a60e4dcb267198c7bd710df888e5c5937fe..f0bf6335d96aa4f9eb6171cc499352bec686af34 100644
--- a/arch/arm/src/efm32/efm32_config.h
+++ b/arch/arm/src/efm32/efm32_config.h
@@ -127,7 +127,7 @@
 #undef HAVE_UART_CONSOLE
 #undef HAVE_LEUART_CONSOLE
 
-#if defined(CONFIG_SYSLOG_CONSOLE)
+#if defined(CONFIG_CONSOLE_SYSLOG)
 #  undef CONFIG_USART1_SERIAL_CONSOLE
 #  undef CONFIG_USART2_SERIAL_CONSOLE
 #  undef CONFIG_UART0_SERIAL_CONSOLE
diff --git a/arch/arm/src/efm32/efm32_dma.c b/arch/arm/src/efm32/efm32_dma.c
index a96bc160c0de6a072f6d9b4e3227ff576f5eec97..d568626b2958d9718dc0aec45fe5df70461997cf 100644
--- a/arch/arm/src/efm32/efm32_dma.c
+++ b/arch/arm/src/efm32/efm32_dma.c
@@ -204,7 +204,7 @@ efm32_get_descriptor(struct dma_channel_s *dmach, bool alt)
  *
  ****************************************************************************/
 
-static int efm32_dmac_interrupt(int irq, void *context)
+static int efm32_dmac_interrupt(int irq, void *context, FAR void *arg)
 {
   struct dma_channel_s *dmach;
   unsigned int chndx;
@@ -270,7 +270,7 @@ void weak_function up_dmainitialize(void)
   uint32_t regval;
   int i;
 
-  dmallvdbg("Initialize XDMAC0\n");
+  dmainfo("Initialize XDMAC0\n");
 
   /* Initialize the channel list  */
 
@@ -297,7 +297,7 @@ void weak_function up_dmainitialize(void)
 
   /* Attach DMA interrupt vector */
 
-  (void)irq_attach(EFM32_IRQ_DMA, efm32_dmac_interrupt);
+  (void)irq_attach(EFM32_IRQ_DMA, efm32_dmac_interrupt, NULL);
 
   /* Enable the DMA controller */
 
@@ -416,7 +416,7 @@ void efm32_dmafree(DMA_HANDLE handle)
   struct dma_channel_s *dmach = (struct dma_channel_s *)handle;
 
   DEBUGASSERT(dmach != NULL && dmach->inuse);
-  dmavdbg("DMA channel %d\n", dmach->chan);
+  dmainfo("DMA channel %d\n", dmach->chan);
 
   /* Disable the channel */
 
@@ -745,7 +745,7 @@ void efm32_dmastop(DMA_HANDLE handle)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void efm32_dmasample(DMA_HANDLE handle, struct efm32_dmaregs_s *regs)
 {
   struct dma_channel_s *dmach = (struct dma_channel_s *)handle;
@@ -798,35 +798,35 @@ void efm32_dmasample(DMA_HANDLE handle, struct efm32_dmaregs_s *regs)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void efm32_dmadump(DMA_HANDLE handle, const struct efm32_dmaregs_s *regs,
                    const char *msg)
 {
   struct dma_channel_s *dmach = (struct dma_channel_s *)handle;
 
-  dmadbg("%s\n", msg);
-  dmadbg("  DMA Registers:\n");
-  dmadbg("        STATUS: %08x\n", regs->status);
-  dmadbg("      CTRLBASE: %08x\n", regs->ctrlbase);
-  dmadbg("   ALTCTRLBASE: %08x\n", regs->altctrlbase);
-  dmadbg("  CHWAITSTATUS: %08x\n", regs->chwaitstatus);
-  dmadbg("   CHUSEBURSTS: %08x\n", regs->chusebursts);
-  dmadbg("    CHREQMASKS: %08x\n", regs->chreqmasks);
-  dmadbg("         CHENS: %08x\n", regs->chens);
-  dmadbg("        CHALTS: %08x\n", regs->chalts);
-  dmadbg("        CHPRIS: %08x\n", regs->chpris);
-  dmadbg("        ERRORC: %08x\n", regs->errorc);
-  dmadbg("   CHREQSTATUS: %08x\n", regs->chreqstatus);
-  dmadbg("  CHSREQSTATUS: %08x\n", regs->chsreqstatus);
-  dmadbg("           IEN: %08x\n", regs->ien);
+  dmainfo("%s\n", msg);
+  dmainfo("  DMA Registers:\n");
+  dmainfo("        STATUS: %08x\n", regs->status);
+  dmainfo("      CTRLBASE: %08x\n", regs->ctrlbase);
+  dmainfo("   ALTCTRLBASE: %08x\n", regs->altctrlbase);
+  dmainfo("  CHWAITSTATUS: %08x\n", regs->chwaitstatus);
+  dmainfo("   CHUSEBURSTS: %08x\n", regs->chusebursts);
+  dmainfo("    CHREQMASKS: %08x\n", regs->chreqmasks);
+  dmainfo("         CHENS: %08x\n", regs->chens);
+  dmainfo("        CHALTS: %08x\n", regs->chalts);
+  dmainfo("        CHPRIS: %08x\n", regs->chpris);
+  dmainfo("        ERRORC: %08x\n", regs->errorc);
+  dmainfo("   CHREQSTATUS: %08x\n", regs->chreqstatus);
+  dmainfo("  CHSREQSTATUS: %08x\n", regs->chsreqstatus);
+  dmainfo("           IEN: %08x\n", regs->ien);
 #if defined(CONFIG_EFM32_EFM32GG)
-  dmadbg("          CTRL: %08x\n", regs->ctrl);
-  dmadbg("           RDS: %08x\n", regs->rds);
-  dmadbg("         LOOP0: %08x\n", regs->loop0);
-  dmadbg("         LOOP1: %08x\n", regs->loop1);
-  dmadbg("         RECT0: %08x\n", regs->rect0);
+  dmainfo("          CTRL: %08x\n", regs->ctrl);
+  dmainfo("           RDS: %08x\n", regs->rds);
+  dmainfo("         LOOP0: %08x\n", regs->loop0);
+  dmainfo("         LOOP1: %08x\n", regs->loop1);
+  dmainfo("         RECT0: %08x\n", regs->rect0);
 #endif
-  dmadbg("  DMA Channel %d Registers:\n", dmach->chan);
-  dmadbg("        CHCTRL: %08x\n", regs->chnctrl);
+  dmainfo("  DMA Channel %d Registers:\n", dmach->chan);
+  dmainfo("        CHCTRL: %08x\n", regs->chnctrl);
 }
 #endif
diff --git a/arch/arm/src/efm32/efm32_dma.h b/arch/arm/src/efm32/efm32_dma.h
index 2cedb881f3822b3203365ba51a074c2747f0dfbb..011a7d987421d0ce823c77dfeb6b9890aecb000a 100644
--- a/arch/arm/src/efm32/efm32_dma.h
+++ b/arch/arm/src/efm32/efm32_dma.h
@@ -109,7 +109,7 @@ typedef FAR void *DMA_HANDLE;
 
 typedef void (*dma_callback_t)(DMA_HANDLE handle, uint8_t status, void *arg);
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 struct efm32_dmaregs_s
 {
   uint32_t status;            /* DMA Status Register */
@@ -282,7 +282,7 @@ void efm32_dmastop(DMA_HANDLE handle);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void efm32_dmasample(DMA_HANDLE handle, struct efm32_dmaregs_s *regs);
 #else
 #  define efm32_dmasample(handle,regs)
@@ -299,7 +299,7 @@ void efm32_dmasample(DMA_HANDLE handle, struct efm32_dmaregs_s *regs);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void efm32_dmadump(DMA_HANDLE handle, const struct efm32_dmaregs_s *regs,
                    const char *msg);
 #else
diff --git a/arch/arm/src/efm32/efm32_flash.c b/arch/arm/src/efm32/efm32_flash.c
index a35422b73da9786785ef5b7f692b386b5a4f1031..1353bbbdb12f2cccec47425947f324cf1eb913c2 100644
--- a/arch/arm/src/efm32/efm32_flash.c
+++ b/arch/arm/src/efm32/efm32_flash.c
@@ -845,7 +845,7 @@ ssize_t __ramfunc__ up_progmem_write(size_t addr, const void *buf, size_t size)
 
   bitband_set_peripheral(EFM32_MSC_WRITECTRL, _MSC_WRITECTRL_WREN_SHIFT, 0);
 
-#if (defined(CONFIG_EFM32_EFM32GG) || defined(CONFIG_EFM32_EFM32WG)) && (2==WORDS_PER_DATA_PHASE)
+#if (defined(CONFIG_EFM32_EFM32GG) || defined(CONFIG_EFM32_EFM32WG))
 
   /* Turn off double word write cycle support. */
 
diff --git a/arch/arm/src/efm32/efm32_gpio.c b/arch/arm/src/efm32/efm32_gpio.c
index 77bc980481dd95c755d85472b73cf584915a8715..7ffc58cf3445f37d7522b8fffc1cec6129eb54eb 100644
--- a/arch/arm/src/efm32/efm32_gpio.c
+++ b/arch/arm/src/efm32/efm32_gpio.c
@@ -390,7 +390,7 @@ bool efm32_gpioread(gpio_pinset_t pinset)
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 int efm32_dumpgpio(uint32_t pinset, const char *msg)
 {
 #warning Missing logic
diff --git a/arch/arm/src/efm32/efm32_gpio.h b/arch/arm/src/efm32/efm32_gpio.h
index ed54bb5148c80f63ad81b579f1f91840e3933eac..7dc6624975e97b9260f446f6f50b2d7bd8ab7941 100644
--- a/arch/arm/src/efm32/efm32_gpio.h
+++ b/arch/arm/src/efm32/efm32_gpio.h
@@ -50,10 +50,6 @@
  ************************************************************************************/
 /* Configuration ********************************************************************/
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_GPIO
-#endif
-
 #define EFM32_NGPIO                5 /* (5) GPIOA-F */
 
 /* Bit-encoded input to efm32_configgpio() *******************************************/
@@ -350,7 +346,7 @@ void efm32_gpioirqclear(int irq);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 int efm32_dumpgpio(uint32_t pinset, const char *msg);
 #else
 #  define efm32_dumpgpio(p,m)
diff --git a/arch/arm/src/efm32/efm32_gpioirq.c b/arch/arm/src/efm32/efm32_gpioirq.c
index 8c3527e9f55d2cfcaac2b6c4cbcd3108a898292e..1b317582811bda574e17982282ae53998d34831e 100644
--- a/arch/arm/src/efm32/efm32_gpioirq.c
+++ b/arch/arm/src/efm32/efm32_gpioirq.c
@@ -133,7 +133,7 @@ static int  efm32_gpio_interrupt(uint32_t mask, void *context)
  *
  ************************************************************************************/
 
-static int efm32_even_interrupt(int irq, void *context)
+static int efm32_even_interrupt(int irq, void *context, FAR void *arg)
 {
   return efm32_gpio_interrupt(0x00005555, context);
 }
@@ -146,7 +146,7 @@ static int efm32_even_interrupt(int irq, void *context)
  *
  ************************************************************************************/
 
-static int efm32_odd_interrupt(int irq, void *context)
+static int efm32_odd_interrupt(int irq, void *context, FAR void *arg)
 {
   return efm32_gpio_interrupt(0x0000aaaa, context);
 }
@@ -173,8 +173,8 @@ void efm32_gpioirqinitialize(void)
 
   /* Attach the even and odd interrupt handlers */
 
-  DEBUGVERIFY(irq_attach(EFM32_IRQ_GPIO_EVEN, efm32_even_interrupt));
-  DEBUGVERIFY(irq_attach(EFM32_IRQ_GPIO_ODD, efm32_odd_interrupt));
+  DEBUGVERIFY(irq_attach(EFM32_IRQ_GPIO_EVEN, efm32_even_interrupt, NULL));
+  DEBUGVERIFY(irq_attach(EFM32_IRQ_GPIO_ODD, efm32_odd_interrupt, NULL));
 
   /* Enable GPIO even and odd interrupts at the NVIC */
 
diff --git a/arch/arm/src/efm32/efm32_i2c.c b/arch/arm/src/efm32/efm32_i2c.c
index 3f4638390e6b5871642d944b870a58353fe9680f..59ad3aa2f840ac2ba12c71d2eead750b54b06472 100644
--- a/arch/arm/src/efm32/efm32_i2c.c
+++ b/arch/arm/src/efm32/efm32_i2c.c
@@ -71,8 +71,9 @@
 
 #include 
 #include 
-#include 
 #include 
+#include 
+#include 
 
 #include 
 
@@ -134,16 +135,6 @@
 
 /* Debug ****************************************************************************/
 
-/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
-
-#ifdef CONFIG_DEBUG_I2C
-#  define i2cdbg dbg
-#  define i2cvdbg vdbg
-#else
-#  define i2cdbg(x...)
-#  define i2cvdbg(x...)
-#endif
-
 /* I2C event trace logic.  NOTE:  trace uses the internal, non-standard,
  * low-level debug interface syslog() but does not require that any other debug
  * is enabled.
@@ -229,7 +220,7 @@ struct efm32_i2c_config_s
   uint32_t scl_pin;           /* GPIO configuration for SCL as SCL */
   uint32_t sda_pin;           /* GPIO configuration for SDA as SDA */
 #ifndef CONFIG_I2C_POLLED
-  int (*isr) (int, void *);   /* Interrupt handler */
+  int (*isr) (int, void *, void *);   /* Interrupt handler */
   uint32_t irq;               /* Event IRQ */
 #endif
 };
@@ -307,10 +298,10 @@ static int efm32_i2c_isr(struct efm32_i2c_priv_s *priv);
 
 #ifndef CONFIG_I2C_POLLED
 #ifdef CONFIG_EFM32_I2C0
-static int efm32_i2c0_isr(int irq, void *context);
+static int efm32_i2c0_isr(int irq, void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_EFM32_I2C1
-static int efm32_i2c1_isr(int irq, void *context);
+static int efm32_i2c1_isr(int irq, void *context, FAR void *arg);
 #endif
 #endif /* !CONFIG_I2C_POLLED */
 
@@ -605,7 +596,7 @@ static inline int efm32_i2c_sem_waitdone(FAR struct efm32_i2c_priv_s *priv)
 
   while (priv->result == I2CRESULT_INPROGRESS);
 
-  i2cvdbg("result: %s elapsed: %d threshold: %d i2c_state %s "
+  i2cinfo("result: %s elapsed: %d threshold: %d i2c_state %s "
           "I2Cx_STATES: %08x I2Cx_IF: %08x\n",
           efm32_i2c_result_str(priv->result), elapsed, timeout,
           efm32_i2c_state_str(priv->i2c_state), priv->i2c_reg_state,
@@ -652,7 +643,7 @@ static inline int efm32_i2c_sem_waitdone(FAR struct efm32_i2c_priv_s *priv)
 
   while ((priv->result == I2CRESULT_INPROGRESS) && elapsed < timeout);
 
-  i2cvdbg("result: %s elapsed: %d threshold: %d i2c_state %s "
+  i2cinfo("result: %s elapsed: %d threshold: %d i2c_state %s "
           "I2Cx_STATES: %08x I2Cx_IF: %08x\n",
           efm32_i2c_result_str(priv->result), elapsed, timeout,
           efm32_i2c_state_str(priv->i2c_state), priv->i2c_reg_state,
@@ -691,8 +682,14 @@ static inline void efm32_i2c_sem_post(FAR struct efm32_i2c_priv_s *priv)
 static inline void efm32_i2c_sem_init(FAR struct efm32_i2c_priv_s *priv)
 {
   sem_init(&priv->sem_excl, 0, 1);
+
 #ifndef CONFIG_I2C_POLLED
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   sem_init(&priv->sem_isr, 0, 0);
+  sem_setprotocol(&priv->sem_isr, SEM_PRIO_NONE);
 #endif
 }
 
@@ -761,7 +758,7 @@ static void efm32_i2c_tracenew(FAR struct efm32_i2c_priv_s *priv)
 
           if (priv->tndx >= (CONFIG_I2C_NTRACE - 1))
             {
-              i2cdbg("Trace table overflow\n");
+              i2cerr("ERROR: Trace table overflow\n");
               return;
             }
 
@@ -1293,7 +1290,7 @@ done:
  ****************************************************************************/
 
 #ifdef CONFIG_EFM32_I2C0
-static int efm32_i2c0_isr(int irq, void *context)
+static int efm32_i2c0_isr(int irq, void *context, FAR void *arg)
 {
   return efm32_i2c_isr(&efm32_i2c0_priv);
 }
@@ -1308,7 +1305,7 @@ static int efm32_i2c0_isr(int irq, void *context)
  ****************************************************************************/
 
 #ifdef CONFIG_EFM32_I2C1
-static int efm32_i2c1_isr(int irq, void *context)
+static int efm32_i2c1_isr(int irq, void *context, FAR void *arg)
 {
   return efm32_i2c_isr(&efm32_i2c1_priv);
 }
@@ -1392,7 +1389,7 @@ static int efm32_i2c_init(FAR struct efm32_i2c_priv_s *priv)
   /* Attach ISRs */
 
 #ifndef CONFIG_I2C_POLLED
-  irq_attach(priv->config->irq, priv->config->isr);
+  irq_attach(priv->config->irq, priv->config->isr, NULL);
   up_enable_irq(priv->config->irq);
 #endif
 
@@ -1536,9 +1533,9 @@ static int efm32_i2c_transfer(FAR struct i2c_master_s *dev,
     {
       ret = -ETIMEDOUT;
 
-      i2cdbg("Timed out: I2Cx_STATE: 0x%04x I2Cx_STATUS: 0x%08x\n",
-             efm32_i2c_getreg(priv, EFM32_I2C_STATE_OFFSET),
-             efm32_i2c_getreg(priv, EFM32_I2C_STATUS_OFFSET));
+      i2cerr("ERROR: Timed out: I2Cx_STATE: 0x%04x I2Cx_STATUS: 0x%08x\n",
+              efm32_i2c_getreg(priv, EFM32_I2C_STATE_OFFSET),
+              efm32_i2c_getreg(priv, EFM32_I2C_STATUS_OFFSET));
 
       /* Abort */
 
diff --git a/arch/arm/src/efm32/efm32_idle.c b/arch/arm/src/efm32/efm32_idle.c
index 62d4e6315ba8021e99b4390648d63b2dce98d3b6..9a6d9f7e155142fa1a099ec3627a862514c377cf 100644
--- a/arch/arm/src/efm32/efm32_idle.c
+++ b/arch/arm/src/efm32/efm32_idle.c
@@ -110,7 +110,7 @@ static void up_idlepm(void)
 
       /* Perform board-specific, state-dependent logic here */
 
-      llvdbg("newstate= %d oldstate=%d\n", newstate, oldstate);
+      _info("newstate= %d oldstate=%d\n", newstate, oldstate);
 
       /* Then force the global state change */
 
diff --git a/arch/arm/src/efm32/efm32_irq.c b/arch/arm/src/efm32/efm32_irq.c
index 821d5cdc76d469b0538df013ede64f8509ddecff..859860d0725bf907f686a8acdb76956f029f6672 100644
--- a/arch/arm/src/efm32/efm32_irq.c
+++ b/arch/arm/src/efm32/efm32_irq.c
@@ -93,10 +93,6 @@ volatile uint32_t *g_current_regs[1];
 
 extern uint32_t _vectors[];
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -109,44 +105,46 @@ extern uint32_t _vectors[];
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_IRQ)
+#if defined(CONFIG_DEBUG_IRQ_INFO)
 static void efm32_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = enter_critical_section();
-  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  lldbg("  INTCTRL:    %08x VECTAB:  %08x\n",
-        getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
-  lldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
-        getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
-        getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
-  lldbg("  IRQ ENABLE: %08x %08x %08x\n",
-        getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
-        getreg32(NVIC_IRQ64_95_ENABLE));
-  lldbg("  SYSH_PRIO:  %08x %08x %08x\n",
-        getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
-        getreg32(NVIC_SYSH12_15_PRIORITY));
-  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
-        getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
-        getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+
+  irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
+  irqinfo("  INTCTRL:    %08x VECTAB:  %08x\n",
+          getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
+  irqinfo("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+          getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
+          getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+  irqinfo("  IRQ ENABLE: %08x %08x %08x\n",
+          getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
+          getreg32(NVIC_IRQ64_95_ENABLE));
+  irqinfo("  SYSH_PRIO:  %08x %08x %08x\n",
+          getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+          getreg32(NVIC_SYSH12_15_PRIORITY));
+  irqinfo("  IRQ PRIO:   %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
+          getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
+          getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
 #if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 32)
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
-        getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
+          getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
 #if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 48)
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
-        getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
+          getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
 #if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 64)
-  lldbg("              %08x\n",
-        getreg32(NVIC_IRQ64_67_PRIORITY));
+  irqinfo("              %08x\n",
+          getreg32(NVIC_IRQ64_67_PRIORITY));
 #endif
 #endif
 #endif
+
   leave_critical_section(flags);
 }
 #else
@@ -164,51 +162,51 @@ static void efm32_dumpnvic(const char *msg, int irq)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
-static int efm32_nmi(int irq, FAR void *context)
+#ifdef CONFIG_DEBUG_FEATURES
+static int efm32_nmi(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! NMI received\n");
+  _err("PANIC!!! NMI received\n");
   PANIC();
   return 0;
 }
 
-static int efm32_busfault(int irq, FAR void *context)
+static int efm32_busfault(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
+  _err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
   PANIC();
   return 0;
 }
 
-static int efm32_usagefault(int irq, FAR void *context)
+static int efm32_usagefault(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
+  _err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
   PANIC();
   return 0;
 }
 
-static int efm32_pendsv(int irq, FAR void *context)
+static int efm32_pendsv(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! PendSV received\n");
+  _err("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
 }
 
-static int efm32_dbgmonitor(int irq, FAR void *context)
+static int efm32_dbgmonitor(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Debug Monitor received\n");
+  _err("PANIC!!! Debug Monitor received\n");
   PANIC();
   return 0;
 }
 
-static int efm32_reserved(int irq, FAR void *context)
+static int efm32_reserved(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Reserved interrupt\n");
+  _err("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;
 }
@@ -249,61 +247,19 @@ static inline void efm32_prioritize_syscall(int priority)
 static int efm32_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
                          uintptr_t offset)
 {
+  int n;
+
   DEBUGASSERT(irq >= EFM32_IRQ_NMI && irq < NR_IRQS);
 
-  /* Check for external interrupt or (a second level GPIO interrupt) */
+  /* Check for external interrupt or a second level GPIO interrupt */
 
   if (irq >= EFM32_IRQ_INTERRUPTS)
     {
-      /* Is this an external interrupt? */
-
       if (irq < NR_VECTORS)
         {
-          /* Yes.. We have support implemented for vectors 0-95 */
-
-          DEBUGASSERT(irq < (EFM32_IRQ_INTERRUPTS + 96));
-
-#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 32)
-          /* Check for vectors 0-31 */
-
-          if (irq < EFM32_IRQ_INTERRUPTS + 32)
-#endif
-            {
-              *regaddr = (NVIC_IRQ0_31_ENABLE + offset);
-              *bit     = 1 << (irq - EFM32_IRQ_INTERRUPTS);
-            }
-#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 32)
-          /* Yes..  Check for vectors 32-63 */
-
-          else
-#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 64)
-          if (irq < EFM32_IRQ_INTERRUPTS + 64)
-#endif
-            {
-              *regaddr = (NVIC_IRQ32_63_ENABLE + offset);
-              *bit     = 1 << (irq - EFM32_IRQ_INTERRUPTS - 32);
-            }
-#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 64)
-          /* Yes..  Check for vectors 64-95 */
-
-          else
-#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 96)
-          /* Yes..  Check for vectors 64-95 */
-
-          if (irq < NR_VECTORS)
-#endif
-            {
-              *regaddr = (NVIC_IRQ64_95_ENABLE + offset);
-              *bit     = 1 << (irq - EFM32_IRQ_INTERRUPTS - 64);
-            }
-#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 96)
-          else
-            {
-              return -EINVAL; /* We should never get here */
-            }
-#endif
-#endif
-#endif
+          n        = irq - EFM32_IRQ_INTERRUPTS;
+          *regaddr = NVIC_IRQ_ENABLE(n) + offset;
+          *bit     = (uint32_t)1 << (n & 0x1f);
         }
       else
         {
@@ -354,16 +310,14 @@ void up_irqinitialize(void)
 {
   uint32_t regaddr;
   int num_priority_registers;
+  int i;
 
   /* Disable all interrupts */
 
-  putreg32(0, NVIC_IRQ0_31_ENABLE);
-#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 32)
-  putreg32(0, NVIC_IRQ32_63_ENABLE);
-#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 64)
-  putreg32(0, NVIC_IRQ64_95_ENABLE);
-#endif
-#endif
+  for (i = 0; i < NR_VECTORS - EFM32_IRQ_INTERRUPTS; i += 32)
+    {
+      putreg32(0xffffffff, NVIC_IRQ_CLEAR(i));
+    }
 
 #if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 3
   /* Colorize the interrupt stack for debug purposes */
@@ -428,8 +382,8 @@ void up_irqinitialize(void)
    * under certain conditions.
    */
 
-  irq_attach(EFM32_IRQ_SVCALL, up_svcall);
-  irq_attach(EFM32_IRQ_HARDFAULT, up_hardfault);
+  irq_attach(EFM32_IRQ_SVCALL, up_svcall, NULL);
+  irq_attach(EFM32_IRQ_HARDFAULT, up_hardfault, NULL);
 
   /* Set the priority of the SVCall interrupt */
 
@@ -442,22 +396,22 @@ void up_irqinitialize(void)
    */
 
 #ifdef CONFIG_ARM_MPU
-  irq_attach(EFM32_IRQ_MEMFAULT, up_memfault);
+  irq_attach(EFM32_IRQ_MEMFAULT, up_memfault, NULL);
   up_enable_irq(EFM32_IRQ_MEMFAULT);
 #endif
 
   /* Attach all other processor exceptions (except reset and sys tick) */
 
-#ifdef CONFIG_DEBUG
-  irq_attach(EFM32_IRQ_NMI, efm32_nmi);
+#ifdef CONFIG_DEBUG_FEATURES
+  irq_attach(EFM32_IRQ_NMI, efm32_nmi, NULL);
 #ifndef CONFIG_ARM_MPU
-  irq_attach(EFM32_IRQ_MEMFAULT, up_memfault);
+  irq_attach(EFM32_IRQ_MEMFAULT, up_memfault, NULL);
 #endif
-  irq_attach(EFM32_IRQ_BUSFAULT, efm32_busfault);
-  irq_attach(EFM32_IRQ_USAGEFAULT, efm32_usagefault);
-  irq_attach(EFM32_IRQ_PENDSV, efm32_pendsv);
-  irq_attach(EFM32_IRQ_DBGMONITOR, efm32_dbgmonitor);
-  irq_attach(EFM32_IRQ_RESERVED, efm32_reserved);
+  irq_attach(EFM32_IRQ_BUSFAULT, efm32_busfault, NULL);
+  irq_attach(EFM32_IRQ_USAGEFAULT, efm32_usagefault, NULL);
+  irq_attach(EFM32_IRQ_PENDSV, efm32_pendsv, NULL);
+  irq_attach(EFM32_IRQ_DBGMONITOR, efm32_dbgmonitor, NULL);
+  irq_attach(EFM32_IRQ_RESERVED, efm32_reserved, NULL);
 #endif
 
   efm32_dumpnvic("initial", NR_VECTORS);
diff --git a/arch/arm/src/efm32/efm32_leserial.c b/arch/arm/src/efm32/efm32_leserial.c
index e57af783531a4c39980ec868be90b3534fed7043..de8d157c8ab54a1d36c2f4563806684af7de6acb 100644
--- a/arch/arm/src/efm32/efm32_leserial.c
+++ b/arch/arm/src/efm32/efm32_leserial.c
@@ -119,7 +119,7 @@
 #define EFM32_TXERR_INTS      (LEUART_IEN_TXOF)
 #define EFM32_RXERR_INTS      (LEUART_IEN_RXOF | LEUART_IEN_PERR | \
                                LEUART_IEN_FERR)
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 #  define EFM32_TX_INTS       (LEUART_IEN_TXBL | EFM32_TXERR_INTS)
 #  define EFM32_RX_INTS       (LEUART_IEN_RXDATAV | EFM32_RXERR_INTS)
 #else
@@ -134,7 +134,6 @@
 struct efm32_config_s
 {
   uintptr_t uartbase;  /* Base address of UART registers */
-  xcpt_t    handler;   /* Interrupt handler */
   uint32_t  baud;      /* Configured baud */
   uint8_t   irq;       /* IRQ associated with this LEUART (for enable) */
   uint8_t   parity;    /* 0=none, 1=odd, 2=even */
@@ -163,13 +162,7 @@ static int  efm32_setup(struct uart_dev_s *dev);
 static void efm32_shutdown(struct uart_dev_s *dev);
 static int  efm32_attach(struct uart_dev_s *dev);
 static void efm32_detach(struct uart_dev_s *dev);
-static int  efm32_interrupt(struct uart_dev_s *dev);
-#if defined(CONFIG_EFM32_LEUART0)
-static int  efm32_leuart0_interrupt(int irq, void *context);
-#endif
-#if defined(CONFIG_EFM32_LEUART1)
-static int  efm32_leuart1_interrupt(int irq, void *context);
-#endif
+static int  efm32_interrupt(int irq, void *context, FAR void *arg);
 static int  efm32_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  efm32_receive(struct uart_dev_s *dev, uint32_t *status);
 static void efm32_rxint(struct uart_dev_s *dev, bool enable);
@@ -219,7 +212,6 @@ static char g_leuart1txbuffer[CONFIG_LEUART1_TXBUFSIZE];
 static const struct efm32_config_s g_leuart0config =
 {
   .uartbase  = EFM32_LEUART0_BASE,
-  .handler   = efm32_leuart0_interrupt,
   .baud      = CONFIG_LEUART0_BAUD,
   .irq       = EFM32_IRQ_LEUART0,
   .parity    = CONFIG_LEUART0_PARITY,
@@ -255,7 +247,6 @@ static struct uart_dev_s g_leuart0port =
 static struct efm32_config_s g_leuart1config =
 {
   .uartbase  = EFM32_LEUART1_BASE,
-  .handler   = efm32_leuart1_interrupt,
   .baud      = CONFIG_LEUART1_BAUD,
   .irq       = EFM32_IRQ_LEUART1,
   .parity    = CONFIG_LEUART1_PARITY,
@@ -429,7 +420,7 @@ static int efm32_attach(struct uart_dev_s *dev)
    * disabled in the C2 register.
    */
 
-  ret = irq_attach(config->irq, config->handler);
+  ret = irq_attach(config->irq, efm32_interrupt, dev);
   if (ret >= 0)
     {
       up_enable_irq(config->irq);
@@ -471,12 +462,14 @@ static void efm32_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int  efm32_interrupt(struct uart_dev_s *dev)
+static int efm32_interrupt(int irq, void *context, FAR void *arg)
 {
-  struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
+  struct efm32_leuart_s *priv;
   uint32_t intflags;
 
-  DEBUGASSERT(priv);
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
+  priv = (struct efm32_leuart_s *)dev->priv;
 
   /* Read the interrupt flags register */
 
@@ -506,7 +499,7 @@ static int  efm32_interrupt(struct uart_dev_s *dev)
       uart_xmitchars(dev);
     }
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   /* Check for receive errors */
 
   if ((intflags & EFM32_RXERR_INTS) != 0)
@@ -518,7 +511,7 @@ static int  efm32_interrupt(struct uart_dev_s *dev)
        * FERR - Framing Error Interrupt Enable
        */
 
-      lldbg("RX ERROR: %08x\n", intflags);
+      _err("RX ERROR: %08x\n", intflags);
     }
 
   /* Check for transmit errors */
@@ -527,27 +520,13 @@ static int  efm32_interrupt(struct uart_dev_s *dev)
     {
       /* TXOF - TX Overflow Interrupt Enable */
 
-      lldbg("RX ERROR: %08x\n", intflags);
+      _err("RX ERROR: %08x\n", intflags);
     }
 #endif
 
   return OK;
 }
 
-#if defined(CONFIG_EFM32_LEUART0)
-static int efm32_leuart0_interrupt(int irq, void *context)
-{
-  return efm32_interrupt(&g_leuart0port);
-}
-#endif
-
-#if defined(CONFIG_EFM32_LEUART1)
-static int  efm32_leuart1_interrupt(int irq, void *context)
-{
-  return efm32_interrupt(&g_leuart1port);
-}
-#endif
-
 /****************************************************************************
  * Name: efm32_ioctl
  *
diff --git a/arch/arm/src/efm32/efm32_lowputc.c b/arch/arm/src/efm32/efm32_lowputc.c
index b3fa2ee3866e0077a4bf4db7595c3d358cfd7937..26ec02884aa3664881c864eab95903e165785bf2 100644
--- a/arch/arm/src/efm32/efm32_lowputc.c
+++ b/arch/arm/src/efm32/efm32_lowputc.c
@@ -281,7 +281,8 @@ static void efm32_leuart_setbaud(uintptr_t base,  uint32_t baud)
 
 void efm32_lowsetup(void)
 {
-#if defined(HAVE_UART_DEVICE) || defined(HAVE_LEUART_DEVICE)
+#if defined(HAVE_UART_DEVICE) || defined(HAVE_LEUART_DEVICE) || \
+    defined(HAVE_SPI_DEVICE)
   uint32_t regval;
 #endif
 
diff --git a/arch/arm/src/efm32/efm32_pwm.c b/arch/arm/src/efm32/efm32_pwm.c
index 04941d44344cae714da23e60e40ac909b4ec1937..180fe04e00c15cdffc145c72f20847faca43aa30 100644
--- a/arch/arm/src/efm32/efm32_pwm.c
+++ b/arch/arm/src/efm32/efm32_pwm.c
@@ -47,7 +47,7 @@
 
 #include 
 #include 
-#include 
+#include 
 #include 
 
 #include "up_arch.h"
@@ -75,29 +75,10 @@
 /* The following definitions are used to identify the various time types */
 
 /* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing PWM */
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_PWM
-#endif
-
-#ifdef CONFIG_DEBUG_PWM
-#  define pwmdbg              dbg
-#  define pwmlldbg            lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define pwmvdbg           vdbg
-#    define pwmllvdbg         llvdbg
-#    define pwm_dumpgpio(p,m) efm32_dumpgpio(p,m)
-#  else
-#    define pwmlldbg(x...)
-#    define pwmllvdbg(x...)
-#    define pwm_dumpgpio(p,m)
-#  endif
+#ifdef CONFIG_DEBUG_PWM_INFO
+#  define pwm_dumpgpio(p,m) efm32_dumpgpio(p,m)
 #else
-#  define pwmdbg(x...)
-#  define pwmlldbg(x...)
-#  define pwmvdbg(x...)
-#  define pwmllvdbg(x...)
 #  define pwm_dumpgpio(p,m)
 #endif
 
@@ -136,7 +117,7 @@ static uint32_t pwm_getreg(struct efm32_pwmtimer_s *priv, int offset);
 static void pwm_putreg(struct efm32_pwmtimer_s *priv, int offset,
                        uint32_t value);
 
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_PWM_INFO
 static void pwm_dumpregs(struct efm32_pwmtimer_s *priv, FAR const char *msg);
 #else
 #  define pwm_dumpregs(priv,msg)
@@ -152,19 +133,7 @@ static int pwm_timer(FAR struct efm32_pwmtimer_s *priv,
                                        defined(CONFIG_EFM32_TIMER2_PWM) || \
                                        defined(CONFIG_EFM32_TIMER3_PWM) \
                                        )
-static int pwm_interrupt(struct efm32_pwmtimer_s *priv);
-#if defined(CONFIG_EFM32_TIMER0_PWM)
-static int pwm_timer0_interrupt(int irq, void *context);
-#endif
-#if defined(CONFIG_EFM32_TIMER1_PWM)
-static int pwm_timer1_interrupt(int irq, void *context);
-#endif
-#if defined(CONFIG_EFM32_TIMER2_PWM)
-static int pwm_timer2_interrupt(int irq, void *context);
-#endif
-#if defined(CONFIG_EFM32_TIMER3_PWM)
-static int pwm_timer3_interrupt(int irq, void *context);
-#endif
+static int pwm_interrupt(int irq, void *context, FAR void *arg);
 static uint8_t pwm_pulsecount(uint32_t count);
 
 #endif
@@ -323,29 +292,29 @@ static void pwm_putreg(struct efm32_pwmtimer_s *priv, int offset, uint32_t value
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_PWM_INFO
 static void pwm_dumpregs(struct efm32_pwmtimer_s *priv, FAR const char *msg)
 {
   /* TODO debug pwm_dumpregs */
 
 #if 0
-  pwmvdbg("%s:\n", msg);
-  pwmvdbg("  CR1: %04x CR2:  %04x SMCR:  %04x DIER:  %04x\n",
+  pwminfo("%s:\n", msg);
+  pwminfo("  CR1: %04x CR2:  %04x SMCR:  %04x DIER:  %04x\n",
           pwm_getreg(priv, STM32_GTIM_CR1_OFFSET),
           pwm_getreg(priv, STM32_GTIM_CR2_OFFSET),
           pwm_getreg(priv, STM32_GTIM_SMCR_OFFSET),
           pwm_getreg(priv, STM32_GTIM_DIER_OFFSET));
-  pwmvdbg("   SR: %04x EGR:  %04x CCMR1: %04x CCMR2: %04x\n",
+  pwminfo("   SR: %04x EGR:  %04x CCMR1: %04x CCMR2: %04x\n",
           pwm_getreg(priv, STM32_GTIM_SR_OFFSET),
           pwm_getreg(priv, STM32_GTIM_EGR_OFFSET),
           pwm_getreg(priv, STM32_GTIM_CCMR1_OFFSET),
           pwm_getreg(priv, STM32_GTIM_CCMR2_OFFSET));
-  pwmvdbg(" CCER: %04x CNT:  %04x PSC:   %04x ARR:   %04x\n",
+  pwminfo(" CCER: %04x CNT:  %04x PSC:   %04x ARR:   %04x\n",
           pwm_getreg(priv, STM32_GTIM_CCER_OFFSET),
           pwm_getreg(priv, STM32_GTIM_CNT_OFFSET),
           pwm_getreg(priv, STM32_GTIM_PSC_OFFSET),
           pwm_getreg(priv, STM32_GTIM_ARR_OFFSET));
-  pwmvdbg(" CCR1: %04x CCR2: %04x CCR3:  %04x CCR4:  %04x\n",
+  pwminfo(" CCR1: %04x CCR2: %04x CCR3:  %04x CCR4:  %04x\n",
           pwm_getreg(priv, STM32_GTIM_CCR1_OFFSET),
           pwm_getreg(priv, STM32_GTIM_CCR2_OFFSET),
           pwm_getreg(priv, STM32_GTIM_CCR3_OFFSET),
@@ -353,7 +322,7 @@ static void pwm_dumpregs(struct efm32_pwmtimer_s *priv, FAR const char *msg)
 #if defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM)
   if (priv->timtype == TIMTYPE_ADVANCED)
     {
-      pwmvdbg("  RCR: %04x BDTR: %04x DCR:   %04x DMAR:  %04x\n",
+      pwminfo("  RCR: %04x BDTR: %04x DCR:   %04x DMAR:  %04x\n",
           pwm_getreg(priv, STM32_ATIM_RCR_OFFSET),
           pwm_getreg(priv, STM32_ATIM_BDTR_OFFSET),
           pwm_getreg(priv, STM32_ATIM_DCR_OFFSET),
@@ -362,7 +331,7 @@ static void pwm_dumpregs(struct efm32_pwmtimer_s *priv, FAR const char *msg)
   else
 #endif
     {
-      pwmvdbg("  DCR: %04x DMAR: %04x\n",
+      pwminfo("  DCR: %04x DMAR: %04x\n",
           pwm_getreg(priv, STM32_GTIM_DCR_OFFSET),
           pwm_getreg(priv, STM32_GTIM_DMAR_OFFSET));
     }
@@ -396,11 +365,11 @@ static int pwm_timer(FAR struct efm32_pwmtimer_s *priv,
   DEBUGASSERT(priv != NULL && info != NULL);
 
 #ifdef CONFIG_PWM_PULSECOUNT
-  pwmvdbg("TIMER%d channel: %d frequency: %d duty: %08x count: %d\n",
+  pwminfo("TIMER%d channel: %d frequency: %d duty: %08x count: %d\n",
           priv->timid, priv->channel, info->frequency,
           info->duty, info->count);
 #else
-  pwmvdbg("TIMER%d channel: %d frequency: %d duty: %08x\n",
+  pwminfo("TIMER%d channel: %d frequency: %d duty: %08x\n",
           priv->timid, priv->channel, info->frequency, info->duty);
 #endif
   DEBUGASSERT(info->frequency > 0 && info->duty >= 0 &&
@@ -414,7 +383,7 @@ static int pwm_timer(FAR struct efm32_pwmtimer_s *priv,
 
   if (efm32_timer_set_freq(priv->base, priv->pclk, info->frequency) < 0)
     {
-      pwmdbg("Cannot set TIMER frequency %dHz from clock %dHz\n",
+      pwmerr("ERROR: Cannot set TIMER frequency %dHz from clock %dHz\n",
              info->frequency, priv->pclk);
       return -EINVAL;
     }
@@ -465,7 +434,7 @@ static int pwm_timer(FAR struct efm32_pwmtimer_s *priv,
  *   Handle timer interrupts.
  *
  * Input parameters:
- *   priv - A reference to the lower half PWM driver state structure
+ *   Standard interrupt handler arguments.
  *
  * Returned Value:
  *   Zero on success; a negated errno value on failure
@@ -478,12 +447,15 @@ static int pwm_timer(FAR struct efm32_pwmtimer_s *priv,
                                        defined(CONFIG_EFM32_TIMER3_PWM) \
                                        )
 #warning "not yet implemented"
-static int pwm_interrupt(struct efm32_pwmtimer_s *priv)
+static int pwm_interrupt(int irq, void *context, FAR void *arg)
 {
   /* TODO pwm_interrupt */
 #if 0
+  struct efm32_pwmtimer_s *priv = (struct efm32_pwmtimer_s *)arg;
   uint32_t regval;
 
+  DEBUGASSERT(priv != NULL);
+
   /* Verify that this is an update interrupt.  Nothing else is expected. */
 
   regval = pwm_getreg(priv, STM32_ATIM_SR_OFFSET);
@@ -541,8 +513,8 @@ static int pwm_interrupt(struct efm32_pwmtimer_s *priv)
 
   /* Now all of the time critical stuff is done so we can do some debug output */
 
-  pwmllvdbg("Update interrupt SR: %04x prev: %d curr: %d count: %d\n",
-            regval, priv->prev, priv->curr, priv->count);
+  pwminfo("Update interrupt SR: %04x prev: %d curr: %d count: %d\n",
+          regval, priv->prev, priv->curr, priv->count);
 
   return OK;
 #else
@@ -551,48 +523,6 @@ static int pwm_interrupt(struct efm32_pwmtimer_s *priv)
 }
 #endif
 
-/****************************************************************************
- * Name: pwm_timer1/3_interrupt
- *
- * Description:
- *   Handle timer 1..3 interrupts.
- *
- * Input parameters:
- *   Standard NuttX interrupt inputs
- *
- * Returned Value:
- *   Zero on success; a negated errno value on failure
- *
- ****************************************************************************/
-
-#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_EFM32_TIMER0_PWM)
-static int pwm_timer0_interrupt(int irq, void *context)
-{
-  return pwm_interrupt(&g_pwm0dev);
-}
-#endif
-
-#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_EFM32_TIMER1_PWM)
-static int pwm_timer1_interrupt(int irq, void *context)
-{
-  return pwm_interrupt(&g_pwm1dev);
-}
-#endif
-
-#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_EFM32_TIMER2_PWM)
-static int pwm_timer2_interrupt(int irq, void *context)
-{
-  return pwm_interrupt(&g_pwm2dev);
-}
-#endif
-
-#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_EFM32_TIMER3_PWM)
-static int pwm_timer3_interrupt(int irq, void *context)
-{
-  return pwm_interrupt(&g_pwm3dev);
-}
-#endif
-
 /****************************************************************************
  * Name: pwm_pulsecount
  *
@@ -669,7 +599,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
 {
   FAR struct efm32_pwmtimer_s *priv = (FAR struct efm32_pwmtimer_s *)dev;
 
-  pwmvdbg("TIMER%d pincfg: %08x\n", priv->timid, priv->pincfg);
+  pwminfo("TIMER%d pincfg: %08x\n", priv->timid, priv->pincfg);
   pwm_dumpregs(priv, "Initially");
 
   /* Configure the PWM output pin, but do not start the timer yet */
@@ -726,7 +656,7 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
   FAR struct efm32_pwmtimer_s *priv = (FAR struct efm32_pwmtimer_s *)dev;
   uint32_t pincfg;
 
-  pwmvdbg("TIMER%d pincfg: %08x\n", priv->timid, priv->pincfg);
+  pwminfo("TIMER%d pincfg: %08x\n", priv->timid, priv->pincfg);
 
   /* Make sure that the output has been stopped */
 
@@ -805,7 +735,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
   FAR struct efm32_pwmtimer_s *priv = (FAR struct efm32_pwmtimer_s *)dev;
   irqstate_t flags;
 
-  pwmvdbg("TIMER%d\n", priv->timid);
+  pwminfo("TIMER%d\n", priv->timid);
 
   /* Disable interrupts momentary to stop any ongoing timer processing and
    * to prevent any concurrent access to the reset register.
@@ -843,12 +773,12 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
 
 static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg)
 {
-#ifdef CONFIG_DEBUG_PWM
+#ifdef CONFIG_DEBUG_PWM_INFO
   FAR struct efm32_pwmtimer_s *priv = (FAR struct efm32_pwmtimer_s *)dev;
 
   /* There are no platform-specific ioctl commands */
 
-  pwmvdbg("TIMER%d\n", priv->timid);
+  pwminfo("TIMER%d\n", priv->timid);
 #endif
   return -ENOTTY;
 }
@@ -878,65 +808,44 @@ FAR struct pwm_lowerhalf_s *efm32_pwminitialize(int timer)
 {
   FAR struct efm32_pwmtimer_s *lower;
 
-  pwmvdbg("TIMER%d\n", timer);
+  pwminfo("TIMER%d\n", timer);
 
   switch (timer)
     {
 #ifdef CONFIG_EFM32_TIMER0_PWM
       case 0:
         lower = &g_pwm0dev;
-
-        /* Attach but disable the TIM1 update interrupt */
-
-#ifdef CONFIG_PWM_PULSECOUNT
-        irq_attach(lower->irq, pwm_timer0_interrupt);
-        up_disable_irq(lower->irq);
-#endif
         break;
 #endif
 
 #ifdef CONFIG_EFM32_TIMER1_PWM
       case 1:
         lower = &g_pwm1dev;
-
-        /* Attach but disable the TIM1 update interrupt */
-
-#ifdef CONFIG_PWM_PULSECOUNT
-        irq_attach(lower->irq, pwm_timer0_interrupt);
-        up_disable_irq(lower->irq);
-#endif
         break;
 #endif
 #ifdef CONFIG_EFM32_TIMER2_PWM
       case 2:
         lower = &g_pwm2dev;
-
-        /* Attach but disable the TIM1 update interrupt */
-
-#ifdef CONFIG_PWM_PULSECOUNT
-        irq_attach(lower->irq, pwm_timer2_interrupt);
-        up_disable_irq(lower->irq);
-#endif
         break;
 #endif
 #ifdef CONFIG_EFM32_TIMER3_PWM
       case 3:
         lower = &g_pwm3dev;
-
-        /* Attach but disable the TIM1 update interrupt */
-
-#ifdef CONFIG_PWM_PULSECOUNT
-        irq_attach(lower->irq, pwm_timer3_interrupt);
-        up_disable_irq(lower->irq);
-#endif
         break;
 #endif
 
       default:
-        pwmdbg("No such timer configured\n");
+        pwmerr("ERROR: No such timer configured\n");
         return NULL;
     }
 
+  /* Attach but disable the timer update interrupt */
+
+#ifdef CONFIG_PWM_PULSECOUNT
+  irq_attach(lower->irq, pwm_interrupt, lower);
+  up_disable_irq(lower->irq);
+#endif
+
   return (FAR struct pwm_lowerhalf_s *)lower;
 }
 
diff --git a/arch/arm/src/efm32/efm32_pwm.h b/arch/arm/src/efm32/efm32_pwm.h
index af46c3b6f8bccea22bb397435a0b3ce16293ebe1..61e4f5f116db095177b47f3aeed3e6c45c7ae1a2 100644
--- a/arch/arm/src/efm32/efm32_pwm.h
+++ b/arch/arm/src/efm32/efm32_pwm.h
@@ -39,7 +39,7 @@
 /* The EFM32 does not have dedicated PWM hardware.  Rather, pulsed output 
  * control is a capability of the EFM32 timers.  The logic in this file 
  * implements the lower half of the standard, NuttX PWM interface using the 
- * EFM32 timers. That interface is described in include/nuttx/pwm.h.
+ * EFM32 timers. That interface is described in include/nuttx/drivers/pwm.h.
  */
 
 /****************************************************************************
diff --git a/arch/arm/src/efm32/efm32_rmu.c b/arch/arm/src/efm32/efm32_rmu.c
index 6b77564b24d73e5ff3805a804e75bf11bb06edbd..57d7b0e02b76d82a03a67010b6d0da4a6f98163b 100644
--- a/arch/arm/src/efm32/efm32_rmu.c
+++ b/arch/arm/src/efm32/efm32_rmu.c
@@ -63,7 +63,7 @@
  * Private Types
  ************************************************************************************/
 
-#ifdef CONFIG_EFM32_RMU_DEBUG
+#if defined(CONFIG_EFM32_RMU_DEBUG) && defined(CONFIG_DEBUG_WARN)
 typedef struct
 {
   const uint32_t val;
@@ -76,7 +76,7 @@ typedef struct
  * Private Data
  ************************************************************************************/
 
-#ifdef CONFIG_EFM32_RMU_DEBUG
+#if defined(CONFIG_EFM32_RMU_DEBUG) && defined(CONFIG_DEBUG_WARN)
 static efm32_reset_cause_list_t efm32_reset_cause_list[] =
 {
   {
@@ -191,7 +191,7 @@ uint32_t g_efm32_rstcause;
  *
  ************************************************************************************/
 
-#ifdef CONFIG_EFM32_RMU_DEBUG
+#if defined(CONFIG_EFM32_RMU_DEBUG) && defined(CONFIG_DEBUG_WARN)
 const char *efm32_reset_cause_list_str(uint32_t reg, unsigned int *idx)
 {
   int len = sizeof(efm32_reset_cause_list)/sizeof(efm32_reset_cause_list[0]);
@@ -261,8 +261,8 @@ void efm32_rmu_initialize(void)
       putreg32(EMU_LOCK_LOCKKEY_LOCK, EMU_LOCK_LOCKKEY_LOCK);
     }
 
-#ifdef CONFIG_EFM32_RMU_DEBUG
-  rmudbg("RMU => reg = 0x%08X\n", g_efm32_rstcause);
+#if defined(CONFIG_EFM32_RMU_DEBUG) && defined(CONFIG_DEBUG_WARN)
+  rmuwarn("RMU => reg = 0x%08X\n", g_efm32_rstcause);
   for (; ; )
     {
       const char *str;
@@ -273,7 +273,7 @@ void efm32_rmu_initialize(void)
           break;
         }
 
-      rmudbg("RMU => %s\n", str);
+      rmuwarn("RMU => %s\n", str);
     }
 #endif
 }
diff --git a/arch/arm/src/efm32/efm32_rmu.h b/arch/arm/src/efm32/efm32_rmu.h
index 0aae6fbb0d97b34543af55153e1831a3a72ea1c4..1bcfec2d33f0952fbd1bc9753dcc1aec951dcda1 100644
--- a/arch/arm/src/efm32/efm32_rmu.h
+++ b/arch/arm/src/efm32/efm32_rmu.h
@@ -50,21 +50,18 @@
  ****************************************************************************/
 /* Configuration ************************************************************/
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_ERROR
 #  undef CONFIG_EFM32_RMU_DEBUG
 #endif
 
 #ifdef CONFIG_EFM32_RMU_DEBUG
-#  define rmudbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define rmuvdbg lldbg
-#  else
-#    define rmuvdbg(x...)
-#  endif
+#  define rmuerr   _err
+#  define rmuwarn  _warn
+#  define rmuinfo  _info
 #else
-#  define rmudbg(x...)
-#  define rmuvdbg(x...)
+#  define rmuerr(x...)
+#  define rmuwarn(x...)
+#  define rmuinfo(x...)
 #endif
 
 /****************************************************************************
diff --git a/arch/arm/src/efm32/efm32_rtc_burtc.c b/arch/arm/src/efm32/efm32_rtc_burtc.c
index 914ebd03ff3b226f7ac48575f32d17596dcdbb71..d0028b6a11f73e3d3499c23e40d4087e7b63cfe7 100644
--- a/arch/arm/src/efm32/efm32_rtc_burtc.c
+++ b/arch/arm/src/efm32/efm32_rtc_burtc.c
@@ -130,16 +130,6 @@
 #define __CNT_CARRY_REG         EFM32_BURTC_RET_REG(0)
 #define __CNT_ZERO_REG          EFM32_BURTC_RET_REG(1)
 
-#if defined CONFIG_DEBUG && defined CONFIG_RTC_DEBUG
-#   define burtcdbg lldbg
-#else
-#   define burtcdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Types
- ************************************************************************************/
-
 /************************************************************************************
  * Private Data
  ************************************************************************************/
@@ -185,13 +175,13 @@ volatile bool g_rtc_enabled = false;
  *
  ************************************************************************************/
 
-static int efm32_rtc_burtc_interrupt(int irq, void *context)
+static int efm32_rtc_burtc_interrupt(int irq, void *context, FAR void *arg)
 {
   uint32_t source = getreg32(EFM32_BURTC_IF);
 
   if (source & BURTC_IF_LFXOFAIL)
     {
-      burtcdbg("BURTC_IF_LFXOFAIL");
+      rtcerr("ERROR: BURTC_IF_LFXOFAIL");
     }
 
 #ifdef CONFIG_RTC_HIRES
@@ -245,7 +235,7 @@ static void efm32_rtc_burtc_init(void)
   regval = g_efm32_rstcause;
   regval2 = getreg32(EFM32_BURTC_CTRL);
 
-  burtcdbg("BURTC RESETCAUSE=0x%08X BURTC_CTRL=0x%08X\n", regval, regval2);
+  rtcinfo("BURTC RESETCAUSE=0x%08X BURTC_CTRL=0x%08X\n", regval, regval2);
 
   if (!(regval2 & BURTC_CTRL_RSTEN) &&
       !(regval  & RMU_RSTCAUSE_BUBODREG) &&
@@ -262,11 +252,11 @@ static void efm32_rtc_burtc_init(void)
 
       /* restore saved base time */
 
-      burtcdbg("BURTC OK\n");
+      rtcinfo("BURTC OK\n");
       return;
     }
 
-  burtcdbg("BURTC RESETED\n");
+  rtcinfo("BURTC RESET\n");
 
   /* Disable reset of BackupDomain */
 
@@ -358,7 +348,7 @@ static uint64_t efm32_get_burtc_tick(void)
 
   val = (uint64_t)cnt_carry*__CNT_TOP + cnt + cnt_zero;
 
-  burtcdbg("Get Tick carry %u zero %u reg %u\n", cnt_carry, cnt_carry,cnt);
+  rtcinfo("Get Tick carry %u zero %u reg %u\n", cnt_carry, cnt_carry,cnt);
 
   return val;
 }
@@ -388,7 +378,7 @@ int up_rtc_initialize(void)
 
   /* Configure RTC interrupt to catch overflow and alarm interrupts. */
 
-  irq_attach(EFM32_IRQ_BURTC, efm32_rtc_burtc_interrupt);
+  irq_attach(EFM32_IRQ_BURTC, efm32_rtc_burtc_interrupt, NULL);
   up_enable_irq(EFM32_IRQ_BURTC);
 
   g_rtc_enabled = true;
@@ -449,7 +439,7 @@ int up_rtc_gettime(FAR struct timespec *tp)
   tp->tv_sec  = val  / CONFIG_RTC_FREQUENCY;
   tp->tv_nsec = (val % CONFIG_RTC_FREQUENCY)*(NSEC_PER_SEC/CONFIG_RTC_FREQUENCY);
 
-  burtcdbg("Get RTC %u.%09u\n", tp->tv_sec, tp->tv_nsec);
+  rtcinfo("Get RTC %u.%09u\n", tp->tv_sec, tp->tv_nsec);
 
   return OK;
 }
@@ -499,7 +489,7 @@ int up_rtc_settime(FAR const struct timespec *tp)
   cnt_carry = val / __CNT_TOP;
   cnt       = val % __CNT_TOP;
 
-  burtcdbg("Set RTC %u.%09u carry %u zero %u reg %u\n",
+  rtcinfo("Set RTC %u.%09u carry %u zero %u reg %u\n",
            tp->tv_sec, tp->tv_nsec, cnt_carry, cnt, cnt_reg);
 
   putreg32(cnt_carry, __CNT_CARRY_REG);
diff --git a/arch/arm/src/efm32/efm32_serial.c b/arch/arm/src/efm32/efm32_serial.c
index fed33adcba28fc10f17177ba5fb58b8ecd775f47..a13bfe4d588e83060639af5feec52905dcd13ad6 100644
--- a/arch/arm/src/efm32/efm32_serial.c
+++ b/arch/arm/src/efm32/efm32_serial.c
@@ -205,7 +205,7 @@
 #define EFM32_TXERR_INTS      (USART_IEN_TXOF)
 #define EFM32_RXERR_INTS      (USART_IEN_RXOF | USART_IEN_RXUF | \
                                USART_IEN_PERR | USART_IEN_FERR)
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 #  define EFM32_TX_INTS       (USART_IEN_TXBL | EFM32_TXERR_INTS)
 #  define EFM32_RX_INTS       (USART_IEN_RXDATAV | EFM32_RXERR_INTS)
 #else
@@ -220,8 +220,6 @@
 struct efm32_config_s
 {
   uintptr_t uartbase;  /* Base address of UART registers */
-  xcpt_t    rxhandler; /* RX interrupt handler */
-  xcpt_t    txhandler; /* TX interrupt handler */
   uint32_t  baud;      /* Configured baud */
   uint8_t   rxirq;     /* RX IRQ associated with this UART (for enable) */
   uint8_t   txirq;     /* TX IRQ associated with this UART (for enable) */
@@ -257,38 +255,8 @@ static int  efm32_setup(struct uart_dev_s *dev);
 static void efm32_shutdown(struct uart_dev_s *dev);
 static int  efm32_attach(struct uart_dev_s *dev);
 static void efm32_detach(struct uart_dev_s *dev);
-static int  efm32_rxinterrupt(struct uart_dev_s *dev);
-#if defined(CONFIG_EFM32_USART0_ISUART)
-static int  efm32_usart0_rxinterrupt(int irq, void *context);
-#endif
-#if defined(CONFIG_EFM32_USART1_ISUART)
-static int  efm32_usart1_rxinterrupt(int irq, void *context);
-#endif
-#if defined(CONFIG_EFM32_USART2_ISUART)
-static int  efm32_usart2_rxinterrupt(int irq, void *context);
-#endif
-#if defined(CONFIG_EFM32_UART0)
-static int  efm32_uart0_rxinterrupt(int irq, void *context);
-#endif
-#if defined(CONFIG_EFM32_UART1)
-static int  efm32_uart1_rxinterrupt(int irq, void *context);
-#endif
-static int  efm32_txinterrupt(struct uart_dev_s *dev);
-#if defined(CONFIG_EFM32_USART0_ISUART)
-static int  efm32_usart0_txinterrupt(int irq, void *context);
-#endif
-#if defined(CONFIG_EFM32_USART1_ISUART)
-static int  efm32_usart1_txinterrupt(int irq, void *context);
-#endif
-#if defined(CONFIG_EFM32_USART2_ISUART)
-static int  efm32_usart2_txinterrupt(int irq, void *context);
-#endif
-#if defined(CONFIG_EFM32_UART0)
-static int  efm32_uart0_txinterrupt(int irq, void *context);
-#endif
-#if defined(CONFIG_EFM32_UART1)
-static int  efm32_uart1_txinterrupt(int irq, void *context);
-#endif
+static int  efm32_rxinterrupt(int irq, void *context, void *arg);
+static int  efm32_txinterrupt((int irq, void *context, void *arg);
 static int  efm32_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  efm32_receive(struct uart_dev_s *dev, uint32_t *status);
 static void efm32_rxint(struct uart_dev_s *dev, bool enable);
@@ -350,8 +318,6 @@ static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE];
 static const struct efm32_usart_s g_usart0config =
 {
   .uartbase  = EFM32_USART0_BASE,
-  .rxhandler = efm32_usart0_rxinterrupt,
-  .txhandler = efm32_usart0_txinterrupt,
   .baud      = CONFIG_USART0_BAUD,
   .rxirq     = EFM32_IRQ_USART0_RX,
   .txirq     = EFM32_IRQ_USART0_TX,
@@ -388,8 +354,6 @@ static struct uart_dev_s g_usart0port =
 static struct efm32_config_s g_usart1config =
 {
   .uartbase  = EFM32_USART1_BASE,
-  .rxhandler = efm32_usart1_rxinterrupt,
-  .txhandler = efm32_usart1_txinterrupt,
   .baud      = CONFIG_USART1_BAUD,
   .rxirq     = EFM32_IRQ_USART1_RX,
   .txirq     = EFM32_IRQ_USART1_TX,
@@ -426,8 +390,6 @@ static struct uart_dev_s g_usart1port =
 static struct efm32_config_s g_usart2config =
 {
   .uartbase  = EFM32_USART2_BASE,
-  .rxhandler = efm32_usart2_rxinterrupt,
-  .txhandler = efm32_usart2_txinterrupt,
   .baud      = CONFIG_USART2_BAUD,
   .rxirq     = EFM32_IRQ_USART2_RX,
   .txirq     = EFM32_IRQ_USART2_TX,
@@ -464,8 +426,6 @@ static struct uart_dev_s g_usart2port =
 static struct efm32_config_s g_uart0config =
 {
   .uartbase  = EFM32_UART0_BASE,
-  .rxhandler = efm32_uart0_rxinterrupt,
-  .txhandler = efm32_uart0_txinterrupt,
   .baud      = CONFIG_UART0_BAUD,
   .rxirq     = EFM32_IRQ_UART0_RX,
   .txirq     = EFM32_IRQ_UART0_TX,
@@ -502,8 +462,6 @@ static struct uart_dev_s g_uart0port =
 static struct efm32_usart_s g_uart1config =
 {
   .uartbase  = EFM32_UART1_BASE,
-  .rxhandler = efm32_uart1_rxinterrupt,
-  .txhandler = efm32_uart1_txinterrupt,
   .baud      = CONFIG_UART1_BAUD,
   .rxirq     = EFM32_IRQ_UART1_RX,
   .txirq     = EFM32_IRQ_UART1_TX,
@@ -689,13 +647,13 @@ static int efm32_attach(struct uart_dev_s *dev)
    * disabled in the C2 register.
    */
 
-  ret = irq_attach(config->rxirq, config->rxhandler);
+  ret = irq_attach(config->rxirq, efm32_rxinterrupt, dev);
   if (ret < 0)
     {
       return ret;
     }
 
-  ret = irq_attach(config->txirq, config->txhandler);
+  ret = irq_attach(config->txirq, efm32_txinterrupt, dev);
   if (ret < 0)
     {
       irq_detach(config->rxirq);
@@ -742,12 +700,14 @@ static void efm32_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int  efm32_rxinterrupt(struct uart_dev_s *dev)
+static int efm32_rxinterrupt(int irq, void *context, void *arg)
 {
-  struct efm32_usart_s *priv = (struct efm32_usart_s *)dev->priv;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
+  struct efm32_usart_s *priv;
   uint32_t intflags;
 
-  DEBUGASSERT(priv);
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
+  priv = (struct efm32_usart_s *)dev->priv;
 
   /* Read the interrupt flags register */
 
@@ -768,7 +728,7 @@ static int  efm32_rxinterrupt(struct uart_dev_s *dev)
       uart_recvchars(dev);
     }
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   /* Check for receive errors */
 
   if ((intflags & EFM32_RXERR_INTS) != 0)
@@ -780,48 +740,13 @@ static int  efm32_rxinterrupt(struct uart_dev_s *dev)
        * FERR - Framing Error Interrupt Enable
        */
 
-      lldbg("RX ERROR: %08x\n", intflags);
+      _err("RX ERROR: %08x\n", intflags);
     }
 #endif
 
   return OK;
 }
 
-#if defined(CONFIG_EFM32_USART0_ISUART)
-static int efm32_usart0_rxinterrupt(int irq, void *context)
-{
-  return efm32_rxinterrupt(&g_usart0port);
-}
-#endif
-
-#if defined(CONFIG_EFM32_USART1_ISUART)
-static int  efm32_usart1_rxinterrupt(int irq, void *context)
-{
-  return efm32_rxinterrupt(&g_usart1port);
-}
-#endif
-
-#if defined(CONFIG_EFM32_USART2_ISUART)
-static int  efm32_usart2_rxinterrupt(int irq, void *context)
-{
-  return efm32_rxinterrupt(&g_usart2port);
-}
-#endif
-
-#if defined(CONFIG_EFM32_UART0)
-static int  efm32_uart0_rxinterrupt(int irq, void *context)
-{
-  return efm32_rxinterrupt(&g_uart0port);
-}
-#endif
-
-#if defined(CONFIG_EFM32_UART1)
-static int  efm32_uart1_rxinterrupt(int irq, void *context)
-{
-  return efm32_rxinterrupt(&g_uart1port);
-}
-#endif
-
 /****************************************************************************
  * Name: efm32_txinterrupt
  *
@@ -830,12 +755,14 @@ static int  efm32_uart1_rxinterrupt(int irq, void *context)
  *
  ****************************************************************************/
 
-static int  efm32_txinterrupt(struct uart_dev_s *dev)
+static int efm32_txinterrupt((int irq, void *context, void *arg)
 {
-  struct efm32_usart_s *priv = (struct efm32_usart_s *)dev->priv;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
+  struct efm32_usart_s *priv;
   uint32_t intflags;
 
-  DEBUGASSERT(priv);
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
+  priv = (struct efm32_usart_s *)dev->priv;
 
   /* Read the interrupt flags register */
 
@@ -856,55 +783,20 @@ static int  efm32_txinterrupt(struct uart_dev_s *dev)
       uart_xmitchars(dev);
     }
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   /* Check for transmit errors */
 
   if ((intflags & EFM32_TXERR_INTS) != 0)
     {
       /* TXOF - TX Overflow Interrupt Enable */
 
-      lldbg("RX ERROR: %08x\n", intflags);
+      _err("RX ERROR: %08x\n", intflags);
     }
 #endif
 
   return OK;
 }
 
-#if defined(CONFIG_EFM32_USART0_ISUART)
-static int efm32_usart0_txinterrupt(int irq, void *context)
-{
-  return efm32_txinterrupt(&g_usart0port);
-}
-#endif
-
-#if defined(CONFIG_EFM32_USART1_ISUART)
-static int  efm32_usart1_txinterrupt(int irq, void *context)
-{
-  return efm32_txinterrupt(&g_usart1port);
-}
-#endif
-
-#if defined(CONFIG_EFM32_USART2_ISUART)
-static int  efm32_usart2_txinterrupt(int irq, void *context)
-{
-  return efm32_txinterrupt(&g_usart2port);
-}
-#endif
-
-#if defined(CONFIG_EFM32_UART0)
-static int  efm32_uart0_txinterrupt(int irq, void *context)
-{
-  return efm32_txinterrupt(&g_uart0port);
-}
-#endif
-
-#if defined(CONFIG_EFM32_UART1)
-static int  efm32_uart1_txinterrupt(int irq, void *context)
-{
-  return efm32_txinterrupt(&g_uart1port);
-}
-#endif
-
 /****************************************************************************
  * Name: efm32_ioctl
  *
diff --git a/arch/arm/src/efm32/efm32_spi.c b/arch/arm/src/efm32/efm32_spi.c
index 05c0ab7c5197bf77625fd22f03f0889d8f70c4c2..d0ae6d378a2932ea0482bf56aa98fd7c0d8b0d35 100644
--- a/arch/arm/src/efm32/efm32_spi.c
+++ b/arch/arm/src/efm32/efm32_spi.c
@@ -53,6 +53,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -91,26 +92,6 @@
 #define SPI_DMA16_CONFIG      (EFM32_DMA_XFERSIZE_HWORD | EFM32_DMA_MEMINCR)
 #define SPI_DMA16NULL_CONFIG  (EFM32_DMA_XFERSIZE_HWORD | EFM32_DMA_NOINCR)
 
-/* Debug ********************************************************************/
-/* Check if SPI debug is enabled */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_SPI
-#endif
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -205,6 +186,10 @@ static uint32_t  spi_setfrequency(struct spi_dev_s *dev,
                    uint32_t frequency);
 static void      spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode);
 static void      spi_setbits(struct spi_dev_s *dev, int nbits);
+#ifdef CONFIG_SPI_HWFEATURES
+static int       spi_hwfeatures(FAR struct spi_dev_s *dev,
+                                spi_hwfeatures_t features);
+#endif
 static uint8_t   spi_status(struct spi_dev_s *dev, enum spi_dev_e devid);
 #ifdef CONFIG_SPI_CMDDATA
 static int       spi_cmddata(struct spi_dev_s *dev, enum spi_dev_e devid,
@@ -238,7 +223,7 @@ static const struct spi_ops_s g_spiops =
   .setmode           = spi_setmode,
   .setbits           = spi_setbits,
 #ifdef CONFIG_SPI_HWFEATURES
-  .hwfeatures        = 0,
+  .hwfeatures        = spi_hwfeatures,
 #endif
   .status            = spi_status,
 #ifdef CONFIG_SPI_CMDDATA
@@ -897,7 +882,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
        */
 
       actual = (BOARD_HFPERCLK_FREQUENCY << 7) / (256 + clkdiv);
-      spivdbg("frequency=%u actual=%u\n", frequency, actual);
+      spiinfo("frequency=%u actual=%u\n", frequency, actual);
 
       /* Save the frequency selection so that subsequent reconfigurations
        * will be faster.
@@ -932,7 +917,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
   uint32_t setting;
   uint32_t regval;
 
-  spivdbg("mode=%d\n", mode);
+  spiinfo("mode=%d\n", mode);
 
   DEBUGASSERT(priv && priv->config);
   config = priv->config;
@@ -996,47 +981,16 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
   const struct efm32_spiconfig_s *config;
   uint32_t regval;
   uint32_t setting;
-  bool lsbfirst;
 
-  spivdbg("nbits=%d\n", nbits);
+  spiinfo("nbits=%d\n", nbits);
 
   DEBUGASSERT(priv && priv->config);
   config = priv->config;
 
-  /* Bit order is encoded by the sign of nbits */
+  /* Has the number of bits changed? */
 
-  if (nbits < 0)
+  if (nbits != priv->nbits)
     {
-      /* LSB first */
-
-      lsbfirst = true;
-      nbits    = -nbits;
-    }
-  else
-    {
-      /* MSH first */
-
-      lsbfirst = false;
-    }
-
-  /* Has the number of bits or the bit order changed? */
-
-  if (nbits != priv->nbits || lsbfirst != priv->lsbfirst)
-    {
-      /* Set the new bit order */
-
-      regval = spi_getreg(config, EFM32_USART_CTRL_OFFSET);
-      if (lsbfirst)
-        {
-          regval &= ~USART_CTRL_MSBF;
-        }
-      else
-        {
-          regval |= USART_CTRL_MSBF;
-        }
-
-      spi_putreg(config, EFM32_USART_CTRL_OFFSET, regval);
-
       /* Select the new number of bits */
 
       switch (nbits)
@@ -1106,10 +1060,77 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
        * faster
        */
 
-      priv->nbits    = nbits;
+      priv->nbits = nbits;
+    }
+}
+
+/****************************************************************************
+ * Name: spi_hwfeatures
+ *
+ * Description:
+ *   Set hardware-specific feature flags.
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   features - H/W feature flags
+ *
+ * Returned Value:
+ *   Zero (OK) if the selected H/W features are enabled; A negated errno
+ *   value if any H/W feature is not supportable.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI_HWFEATURES
+static int spi_hwfeatures(FAR struct spi_dev_s *dev, spi_hwfeatures_t features)
+{
+#ifdef CONFIG_SPI_BITORDER
+  struct efm32_spidev_s *priv = (struct efm32_spidev_s *)dev;
+  const struct efm32_spiconfig_s *config;
+  uint32_t regval;
+  bool lsbfirst;
+
+  spiinfo("features=%08x\n", features);
+
+  DEBUGASSERT(priv && priv->config);
+  config = priv->config;
+
+  /* Bit order is encoded by the sign of nbits */
+
+  lsbfirst = ((features & HWFEAT_LSBFIRST) != 0);
+
+  /* Has the number of bits or the bit order changed? */
+
+  if (lsbfirst != priv->lsbfirst)
+    {
+      /* Set the new bit order */
+
+      regval = spi_getreg(config, EFM32_USART_CTRL_OFFSET);
+      if (lsbfirst)
+        {
+          regval &= ~USART_CTRL_MSBF;
+        }
+      else
+        {
+          regval |= USART_CTRL_MSBF;
+        }
+
+      spi_putreg(config, EFM32_USART_CTRL_OFFSET, regval);
+
+      /* Save the selection so the subsequence re-configurations will be
+       * faster
+       */
+
       priv->lsbfirst = lsbfirst;
     }
+
+  /* Other H/W features are not supported */
+
+  return ((features & ~HWFEAT_LSBFIRST) == 0) ? OK : -ENOSYS;
+#else
+  return -ENOSYS;
+#endif
 }
+#endif
 
 /****************************************************************************
  * Name: spi_status
@@ -1222,7 +1243,7 @@ static uint16_t spi_send(struct spi_dev_s *dev, uint16_t wd)
   spi_wait_status(config, _USART_STATUS_RXDATAV_MASK, USART_STATUS_RXDATAV);
   ret = (uint16_t)spi_getreg(config, EFM32_USART_RXDATA_OFFSET);
 
-  spivdbg("Sent: %04x Return: %04x \n", wd, ret);
+  spiinfo("Sent: %04x Return: %04x \n", wd, ret);
   return ret;
 }
 
@@ -1263,7 +1284,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
   DEBUGASSERT(priv && priv->config);
   config = priv->config;
 
-  spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+  spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
 
   /* Flush any unread data */
 
@@ -1427,7 +1448,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
   else
 #endif
     {
-      spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n",
+      spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n",
               txbuffer, rxbuffer, nwords);
 
       /* Pre-calculate the timeout value */
@@ -1456,7 +1477,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
       ret = wd_start(priv->wdog, (int)ticks, spi_dma_timeout, 1, (uint32_t)priv);
       if (ret < 0)
         {
-          spidbg("ERROR: Failed to start timeout\n");
+          spierr("ERROR: Failed to start timeout\n");
         }
 
       /* Then wait for each to complete.  TX should complete first */
@@ -1492,7 +1513,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
 static void spi_sndblock(struct spi_dev_s *dev, const void *txbuffer,
                          size_t nwords)
 {
-  spivdbg("txbuffer=%p nwords=%d\n", txbuffer, nwords);
+  spiinfo("txbuffer=%p nwords=%d\n", txbuffer, nwords);
   return spi_exchange(dev, txbuffer, NULL, nwords);
 }
 #endif
@@ -1521,7 +1542,7 @@ static void spi_sndblock(struct spi_dev_s *dev, const void *txbuffer,
 static void spi_recvblock(struct spi_dev_s *dev, void *rxbuffer,
                           size_t nwords)
 {
-  spivdbg("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
+  spiinfo("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
   return spi_exchange(dev, NULL, rxbuffer, nwords);
 }
 #endif
@@ -1594,7 +1615,7 @@ static int spi_portinitialize(struct efm32_spidev_s *priv)
   priv->rxdmach = efm32_dmachannel();
   if (!priv->rxdmach)
     {
-      spidbg("ERROR: Failed to allocate the RX DMA channel for SPI port: %d\n",
+      spierr("ERROR: Failed to allocate the RX DMA channel for SPI port: %d\n",
              port);
       goto errout;
     }
@@ -1602,7 +1623,7 @@ static int spi_portinitialize(struct efm32_spidev_s *priv)
   priv->txdmach = efm32_dmachannel();
   if (!priv->txdmach)
     {
-      spidbg("ERROR: Failed to allocate the TX DMA channel for SPI port: %d\n",
+      spierr("ERROR: Failed to allocate the TX DMA channel for SPI port: %d\n",
              port);
       goto errout_with_rxdmach;
     }
@@ -1612,7 +1633,7 @@ static int spi_portinitialize(struct efm32_spidev_s *priv)
   priv->wdog = wd_create();
   if (!priv->wdog)
     {
-      spidbg("ERROR: Failed to create a timer for SPI port: %d\n", port);
+      spierr("ERROR: Failed to create a timer for SPI port: %d\n", port);
       goto errout_with_txdmach;
     }
 
@@ -1620,6 +1641,13 @@ static int spi_portinitialize(struct efm32_spidev_s *priv)
 
   (void)sem_init(&priv->rxdmasem, 0, 0);
   (void)sem_init(&priv->txdmasem, 0, 0);
+
+  /* These semaphores are used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+   sem_setprotocol(&priv->rxdmasem, SEM_PRIO_NONE);
+   sem_setprotocol(&priv->txdmasem, SEM_PRIO_NONE);
 #endif
 
   /* Enable SPI */
@@ -1709,7 +1737,7 @@ struct spi_dev_s *efm32_spibus_initialize(int port)
   else
 #endif
     {
-      spidbg("ERROR: Unsupported SPI port: %d\n", port);
+      spierr("ERROR: Unsupported SPI port: %d\n", port);
       return NULL;
     }
 
@@ -1731,7 +1759,7 @@ struct spi_dev_s *efm32_spibus_initialize(int port)
       ret = spi_portinitialize(priv);
       if (ret < 0)
         {
-          spidbg("ERROR: Failed to initialize SPI port %d\n", port);
+          spierr("ERROR: Failed to initialize SPI port %d\n", port);
           leave_critical_section(flags);
           return NULL;
         }
diff --git a/arch/arm/src/efm32/efm32_start.c b/arch/arm/src/efm32/efm32_start.c
index ec0171f2307b17cc93b29c239364aedf98435788..59c45afaa3253fc14a803a67374d47094aa8edf6 100644
--- a/arch/arm/src/efm32/efm32_start.c
+++ b/arch/arm/src/efm32/efm32_start.c
@@ -85,7 +85,7 @@ static void go_os_start(void *pv, unsigned int nbytes)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 #  if defined(CONFIG_ARMV7M_ITMSYSLOG)
 #    define showprogress(c) (void)syslog_putc(c)
 #  elif defined(HAVE_UART_CONSOLE) || defined(HAVE_LEUART_CONSOLE)
@@ -275,6 +275,12 @@ void __start(void)
 
   showprogress('C');
 
+#ifdef CONFIG_ARMV7M_ITMSYSLOG
+  /* Perform ARMv7-M ITM SYSLOG initialization */
+
+  itm_syslog_initialize();
+#endif
+
   /* Perform early serial initialization */
 
   up_earlyserialinit();
diff --git a/arch/arm/src/efm32/efm32_timer.c b/arch/arm/src/efm32/efm32_timer.c
index 19c50b56c20e7dd9de87526934eaf1344ded0de2..6264c3a378243369f4b713c9dae04b20982c787a 100644
--- a/arch/arm/src/efm32/efm32_timer.c
+++ b/arch/arm/src/efm32/efm32_timer.c
@@ -55,50 +55,18 @@
 #include "efm32_config.h"
 #include "efm32_gpio.h"
 
-
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
 
 /* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing TIMER */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_TIMER
-#endif
 
-#ifdef CONFIG_DEBUG_TIMER
-#  define efm32_timerdbg              dbg
-#  define efm32_timerlldbg            lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define efm32_timervdbg           vdbg
-#    define efm32_timerllvdbg         llvdbg
-#    define efm32_timer_dumpgpio(p,m) efm32_dumpgpio(p,m)
-#  else
-#    define efm32_timerlldbg(x...)
-#    define efm32_timerllvdbg(x...)
-#    define efm32_timer_dumpgpio(p,m)
-#  endif
+#ifdef CONFIG_DEBUG_TIMER_INFO
+#  define efm32_timer_dumpgpio(p,m) efm32_dumpgpio(p,m)
 #else
-#  define efm32_timerdbg(x...)
-#  define efm32_timerlldbg(x...)
-#  define efm32_timervdbg(x...)
-#  define efm32_timerllvdbg(x...)
 #  define efm32_timer_dumpgpio(p,m)
 #endif
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Static Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -119,48 +87,43 @@
 
 void efm32_timer_dumpregs(uintptr_t base, FAR const char *msg)
 {
+#ifdef CONFIG_DEBUG_TIMER_INFO
   int i;
 
-  efm32_timervdbg("%s:\n", msg);
-  efm32_timervdbg("  CTRL: %04x STATUS: %04x   IEN: %04x     IF: %04x\n",
-                  getreg32(base + EFM32_TIMER_CTRL_OFFSET   ),
-                  getreg32(base + EFM32_TIMER_STATUS_OFFSET ),
-                  getreg32(base + EFM32_TIMER_IEN_OFFSET    ),
-                  getreg32(base + EFM32_TIMER_IF_OFFSET     )
-                 );
-  efm32_timervdbg("   TOP: %04x   TOPB: %04x   CNT: %04x  ROUTE: %04x\n",
-                  getreg32(base + EFM32_TIMER_TOP_OFFSET    ),
-                  getreg32(base + EFM32_TIMER_TOPB_OFFSET   ),
-                  getreg32(base + EFM32_TIMER_CNT_OFFSET    ),
-                  getreg32(base + EFM32_TIMER_ROUTE_OFFSET  )
-                 );
+  tmrinfo("%s:\n", msg);
+  tmrinfo("  CTRL: %04x STATUS: %04x   IEN: %04x     IF: %04x\n",
+          getreg32(base + EFM32_TIMER_CTRL_OFFSET   ),
+          getreg32(base + EFM32_TIMER_STATUS_OFFSET ),
+          getreg32(base + EFM32_TIMER_IEN_OFFSET    ),
+          getreg32(base + EFM32_TIMER_IF_OFFSET     ));
+  tmrinfo("   TOP: %04x   TOPB: %04x   CNT: %04x  ROUTE: %04x\n",
+          getreg32(base + EFM32_TIMER_TOP_OFFSET    ),
+          getreg32(base + EFM32_TIMER_TOPB_OFFSET   ),
+          getreg32(base + EFM32_TIMER_CNT_OFFSET    ),
+          getreg32(base + EFM32_TIMER_ROUTE_OFFSET  ));
 
   for (i = 0; i < EFM32_TIMER_NCC; i++)
     {
-#if defined(CONFIG_DEBUG_TIMER) && defined(CONFIG_DEBUG_VERBOSE)
       uintptr_t base_cc = base + EFM32_TIMER_CC_OFFSET(i);
-#endif
-      efm32_timervdbg("CC%d => CTRL: %04x    CCV:  %04x  CCVP: %04x CCVB: %04x\n",
-                      i
-                      getreg32(base_cc + EFM32_TIMER_CC_CTRL_OFFSET ),
-                      getreg32(base_cc + EFM32_TIMER_CC_CCV_OFFSET  ),
-                      getreg32(base_cc + EFM32_TIMER_CC_CCVP_OFFSET ),
-                      getreg32(base_cc + EFM32_TIMER_CC_CCVB_OFFSET )
-                     );
+
+      tmrinfo("CC%d => CTRL: %04x    CCV:  %04x  CCVP: %04x CCVB: %04x\n",
+              i
+              getreg32(base_cc + EFM32_TIMER_CC_CTRL_OFFSET ),
+              getreg32(base_cc + EFM32_TIMER_CC_CCV_OFFSET  ),
+              getreg32(base_cc + EFM32_TIMER_CC_CCVP_OFFSET ),
+              getreg32(base_cc + EFM32_TIMER_CC_CCVB_OFFSET ));
     }
 
-  efm32_timervdbg("DTCTRL: %04x DTTIME: %04x  DTFC: %04x DTOGEN:  %04x\n",
-                  getreg32(base + EFM32_TIMER_CTRL_OFFSET   ),
-                  getreg32(base + EFM32_TIMER_STATUS_OFFSET ),
-                  getreg32(base + EFM32_TIMER_IEN_OFFSET    ),
-                  getreg32(base + EFM32_TIMER_IF_OFFSET     )
-                 );
-  efm32_timervdbg("DTFAULT: %04x DTFAULTC: %04x  DTLOCK: %04x \n",
-                  getreg32(base + EFM32_TIMER_CTRL_OFFSET   ),
-                  getreg32(base + EFM32_TIMER_STATUS_OFFSET ),
-                  getreg32(base + EFM32_TIMER_IEN_OFFSET    ),
-                  getreg32(base + EFM32_TIMER_IF_OFFSET     )
-                 );
+  tmrinfo("DTCTRL: %04x DTTIME: %04x  DTFC: %04x DTOGEN:  %04x\n",
+          getreg32(base + EFM32_TIMER_CTRL_OFFSET   ),
+          getreg32(base + EFM32_TIMER_STATUS_OFFSET ),
+          getreg32(base + EFM32_TIMER_IEN_OFFSET    ),
+          getreg32(base + EFM32_TIMER_IF_OFFSET     ));
+  tmrinfo("DTFAULT: %04x DTFAULTC: %04x  DTLOCK: %04x \n",
+          getreg32(base + EFM32_TIMER_CTRL_OFFSET   ),
+          getreg32(base + EFM32_TIMER_STATUS_OFFSET ),
+          getreg32(base + EFM32_TIMER_IEN_OFFSET    ),
+#endif
 }
 
 /****************************************************************************
@@ -238,6 +201,7 @@ void efm32_timer_reset(uintptr_t base)
  *   prescaler setted, -1 in case of error.
  *
  ****************************************************************************/
+
 int efm32_timer_set_freq(uintptr_t base, uint32_t clk_freq, uint32_t freq)
 {
   int prescaler = 0;
@@ -262,8 +226,7 @@ int efm32_timer_set_freq(uintptr_t base, uint32_t clk_freq, uint32_t freq)
 
   reload = (clk_freq / prescaler / freq);
 
-  efm32_timerdbg("Source: %4xHz Div: %4x Reload: %4x \n",
-                 clk_freq, prescaler, reload);
+  tmrinfo("Source: %4xHz Div: %4x Reload: %4x \n", clk_freq, prescaler, reload);
 
   putreg32(reload, base + EFM32_TIMER_TOP_OFFSET);
 
diff --git a/arch/arm/src/efm32/efm32_timerisr.c b/arch/arm/src/efm32/efm32_timerisr.c
index 4810d5c3b6ea60a87a645fc45dde662174adeb24..2fdd5a6661fb00605ea4970e0e33cb57b0d7a8cf 100644
--- a/arch/arm/src/efm32/efm32_timerisr.c
+++ b/arch/arm/src/efm32/efm32_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/efm32/efm32_timerisr.c
  *
- *   Copyright (C) 2009, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2014, 2017 Gregory Nutt. All rights reserved.
  *   Copyright (C) 2014 Pierre-noel Bouteville . All rights reserved.
  *   Author: Gregory Nutt 
  *           Pierre-noel Bouteville 
@@ -74,19 +74,11 @@
 #endif
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  efm32_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -94,7 +86,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int efm32_timerisr(int irq, uint32_t *regs, FAR void *arg)
 {
   /* Process timer interrupt */
 
@@ -103,7 +95,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -111,7 +107,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t regval;
 
@@ -129,7 +125,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(EFM32_IRQ_SYSTICK, (xcpt_t)up_timerisr);
+  (void)irq_attach(EFM32_IRQ_SYSTICK, (xcpt_t)efm32_timerisr, NULL);
 
   /* Enable SysTick interrupts */
 
diff --git a/arch/arm/src/efm32/efm32_usbdev.c b/arch/arm/src/efm32/efm32_usbdev.c
index fb20993657f4f926aa58d0d9f1cc6ee91a4dcd18..8f598342806bbe3208d25836d231cb3a5b3d3ee2 100644
--- a/arch/arm/src/efm32/efm32_usbdev.c
+++ b/arch/arm/src/efm32/efm32_usbdev.c
@@ -114,6 +114,10 @@
 #  error "FIFO allocations exceed FIFO memory size"
 #endif
 
+#ifndef CONFIG_DEBUG_USB_INFO
+#  undef CONFIG_EFM32_USBDEV_REGDEBUG
+#endif
+
 /* The actual FIFO addresses that we use must be aligned to 4-byte boundaries;
  * FIFO sizes must be provided in units of 32-bit words.
  */
@@ -474,7 +478,7 @@ struct efm32_usbdev_s
 
 /* Register operations ********************************************************/
 
-#if defined(CONFIG_EFM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_EFM32_USBDEV_REGDEBUG
 static uint32_t    efm32_getreg(uint32_t addr);
 static void        efm32_putreg(uint32_t val, uint32_t addr);
 #else
@@ -570,7 +574,7 @@ static inline void efm32_otginterrupt(FAR struct efm32_usbdev_s *priv);
 
 /* First level interrupt processing */
 
-static int         efm32_usbinterrupt(int irq, FAR void *context);
+static int         efm32_usbinterrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Endpoint operations *********************************************************/
 /* Global OUT NAK controls */
@@ -794,7 +798,7 @@ const struct trace_msg_t g_usb_trace_strings_intdecode[] =
  *
  ****************************************************************************/
 
-#if defined(CONFIG_EFM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_EFM32_USBDEV_REGDEBUG
 static uint32_t efm32_getreg(uint32_t addr)
 {
   static uint32_t prevaddr = 0;
@@ -815,7 +819,7 @@ static uint32_t efm32_getreg(uint32_t addr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              uinfo("...\n");
             }
 
           return val;
@@ -832,7 +836,7 @@ static uint32_t efm32_getreg(uint32_t addr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          uinfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -844,7 +848,7 @@ static uint32_t efm32_getreg(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%08x\n", addr, val);
+  uinfo("%08x->%08x\n", addr, val);
   return val;
 }
 #endif
@@ -857,12 +861,12 @@ static uint32_t efm32_getreg(uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_EFM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_EFM32_USBDEV_REGDEBUG
 static void efm32_putreg(uint32_t val, uint32_t addr)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", addr, val);
+  uinfo("%08x<-%08x\n", addr, val);
 
   /* Write the value */
 
@@ -1220,9 +1224,9 @@ static void efm32_epin_request(FAR struct efm32_usbdev_s *priv,
       return;
     }
 
-  ullvdbg("EP%d req=%p: len=%d xfrd=%d zlp=%d\n",
-          privep->epphy, privreq, privreq->req.len,
-          privreq->req.xfrd, privep->zlp);
+  uinfo("EP%d req=%p: len=%d xfrd=%d zlp=%d\n",
+        privep->epphy, privreq, privreq->req.len,
+        privreq->req.xfrd, privep->zlp);
 
   /* Check for a special case:  If we are just starting a request (xfrd==0) and
    * the class driver is trying to send a zero-length packet (len==0).  Then set
@@ -1486,8 +1490,8 @@ static void efm32_epout_complete(FAR struct efm32_usbdev_s *priv,
       return;
     }
 
-  ullvdbg("EP%d: len=%d xfrd=%d\n",
-          privep->epphy, privreq->req.len, privreq->req.xfrd);
+  uinfo("EP%d: len=%d xfrd=%d\n",
+        privep->epphy, privreq->req.len, privreq->req.xfrd);
 
   /* Return the completed read request to the class driver and mark the state
    * IDLE.
@@ -1521,7 +1525,7 @@ static inline void efm32_ep0out_receive(FAR struct efm32_ep_s *privep, int bcnt)
   DEBUGASSERT(privep && privep->ep.priv);
   priv = (FAR struct efm32_usbdev_s *)privep->ep.priv;
 
-  ullvdbg("EP0: bcnt=%d\n", bcnt);
+  uinfo("EP0: bcnt=%d\n", bcnt);
   usbtrace(TRACE_READ(EP0), bcnt);
 
   /* Verify that an OUT SETUP request as received before this data was
@@ -1614,7 +1618,8 @@ static inline void efm32_epout_receive(FAR struct efm32_ep_s *privep, int bcnt)
       return;
     }
 
-  ullvdbg("EP%d: len=%d xfrd=%d\n", privep->epphy, privreq->req.len, privreq->req.xfrd);
+  uinfo("EP%d: len=%d xfrd=%d\n",
+        privep->epphy, privreq->req.len, privreq->req.xfrd);
   usbtrace(TRACE_READ(privep->epphy), bcnt);
 
   /* Get the number of bytes to transfer from the RxFIFO */
@@ -1698,7 +1703,7 @@ static void efm32_epout_request(FAR struct efm32_usbdev_s *priv,
               return;
             }
 
-          ullvdbg("EP%d: len=%d\n", privep->epphy, privreq->req.len);
+          uinfo("EP%d: len=%d\n", privep->epphy, privreq->req.len);
 
           /* Ignore any attempt to receive a zero length packet (this really
            * should not happen.
@@ -2494,8 +2499,8 @@ static inline void efm32_ep0out_setup(struct efm32_usbdev_s *priv)
   ctrlreq.index = GETUINT16(priv->ctrlreq.index);
   ctrlreq.len   = GETUINT16(priv->ctrlreq.len);
 
-  ullvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
-          ctrlreq.type, ctrlreq.req, ctrlreq.value, ctrlreq.index, ctrlreq.len);
+  uinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+        ctrlreq.type, ctrlreq.req, ctrlreq.value, ctrlreq.index, ctrlreq.len);
 
   /* Check for a standard request */
 
@@ -2629,7 +2634,7 @@ static inline void efm32_epout_interrupt(FAR struct efm32_usbdev_s *priv)
           if ((daint & 1) != 0)
             {
               regval = efm32_getreg(EFM32_USB_DOEPINT(epno));
-              ulldbg("DOEPINT(%d) = %08x\n", epno, regval);
+              uinfo("DOEPINT(%d) = %08x\n", epno, regval);
               efm32_putreg(0xFF, EFM32_USB_DOEPINT(epno));
             }
 
@@ -2859,8 +2864,8 @@ static inline void efm32_epin_interrupt(FAR struct efm32_usbdev_s *priv)
         {
           if ((daint & 1) != 0)
             {
-              ulldbg("DIEPINT(%d) = %08x\n",
-                     epno, efm32_getreg(EFM32_USB_DIEPINT(epno)));
+              uinfo("DIEPINT(%d) = %08x\n",
+                    epno, efm32_getreg(EFM32_USB_DIEPINT(epno)));
               efm32_putreg(0xFF, EFM32_USB_DIEPINT(epno));
             }
 
@@ -3493,7 +3498,7 @@ static inline void efm32_otginterrupt(FAR struct efm32_usbdev_s *priv)
  *
  ****************************************************************************/
 
-static int efm32_usbinterrupt(int irq, FAR void *context)
+static int efm32_usbinterrupt(int irq, FAR void *context, FAR void *arg)
 {
   /* At present, there is only a single OTG FS device support. Hence it is
    * pre-allocated as g_otgfsdev.  However, in most code, the private data
@@ -3799,7 +3804,7 @@ static int efm32_epout_configure(FAR struct efm32_ep_s *privep, uint8_t eptype,
             break;
 
           default:
-            udbg("Unsupported maxpacket: %d\n", maxpacket);
+            uerr("ERROR: Unsupported maxpacket: %d\n", maxpacket);
             return -EINVAL;
         }
     }
@@ -3894,7 +3899,7 @@ static int efm32_epin_configure(FAR struct efm32_ep_s *privep, uint8_t eptype,
             break;
 
           default:
-            udbg("Unsupported maxpacket: %d\n", maxpacket);
+            uerr("ERROR: Unsupported maxpacket: %d\n", maxpacket);
             return -EINVAL;
         }
     }
@@ -4184,7 +4189,7 @@ static int efm32_ep_disable(FAR struct usbdev_ep_s *ep)
 {
   FAR struct efm32_ep_s *privep = (FAR struct efm32_ep_s *)ep;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(EFM32_TRACEERR_INVALIDPARMS), 0);
@@ -4224,7 +4229,7 @@ static FAR struct usbdev_req_s *efm32_ep_allocreq(FAR struct usbdev_ep_s *ep)
 {
   FAR struct efm32_req_s *privreq;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(EFM32_TRACEERR_INVALIDPARMS), 0);
@@ -4257,7 +4262,7 @@ static void efm32_ep_freereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
 {
   FAR struct efm32_req_s *privreq = (FAR struct efm32_req_s *)req;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(EFM32_TRACEERR_INVALIDPARMS), 0);
@@ -4329,11 +4334,12 @@ static int efm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
 
   /* Some sanity checking */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!req || !req->callback || !req->buf || !ep)
     {
       usbtrace(TRACE_DEVERROR(EFM32_TRACEERR_INVALIDPARMS), 0);
-      ullvdbg("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+      uinfo("req=%p callback=%p buf=%p ep=%p\n",
+            req, req->callback, req->buf, ep);
       return -EINVAL;
     }
 #endif
@@ -4341,7 +4347,7 @@ static int efm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
   usbtrace(TRACE_EPSUBMIT, privep->epphy);
   priv = privep->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv->driver)
     {
       usbtrace(TRACE_DEVERROR(EFM32_TRACEERR_NOTCONFIGURED), priv->usbdev.speed);
@@ -4418,7 +4424,7 @@ static int efm32_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
   FAR struct efm32_ep_s *privep = (FAR struct efm32_ep_s *)ep;
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(EFM32_TRACEERR_INVALIDPARMS), 0);
@@ -4876,7 +4882,7 @@ static int efm32_selfpowered(struct usbdev_s *dev, bool selfpowered)
 
   usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(EFM32_TRACEERR_INVALIDPARMS), 0);
@@ -5479,10 +5485,10 @@ void up_usbinitialize(void)
 
   /* Attach the OTG FS interrupt handler */
 
-  ret = irq_attach(EFM32_IRQ_USB, efm32_usbinterrupt);
+  ret = irq_attach(EFM32_IRQ_USB, efm32_usbinterrupt, NULL);
   if (ret < 0)
     {
-      udbg("irq_attach failed\n", ret);
+      uerr("ERROR: irq_attach failed\n", ret);
       goto errout;
     }
 
@@ -5605,7 +5611,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
 
   usbtrace(TRACE_DEVREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !driver->ops->bind || !driver->ops->unbind ||
       !driver->ops->disconnect || !driver->ops->setup)
     {
@@ -5676,7 +5682,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
 
   usbtrace(TRACE_DEVUNREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (driver != priv->driver)
     {
       usbtrace(TRACE_DEVERROR(EFM32_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/efm32/efm32_usbhost.c b/arch/arm/src/efm32/efm32_usbhost.c
index cc9fe1c7d8d0a3037c98b0b74bfa2e488578ab1b..3d5a6888baa5714910b3f13233b14c349693628a 100644
--- a/arch/arm/src/efm32/efm32_usbhost.c
+++ b/arch/arm/src/efm32/efm32_usbhost.c
@@ -52,6 +52,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -92,9 +93,9 @@
  *  CONFIG_EFM32_OTGFS_SOFINTR - Enable SOF interrupts.  Why would you ever
  *    want to do that?
  *  CONFIG_EFM32_USBHOST_REGDEBUG - Enable very low-level register access
- *    debug.  Depends on CONFIG_DEBUG.
+ *    debug.  Depends on CONFIG_DEBUG_FEATURES.
  *  CONFIG_EFM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
- *    packets. Depends on CONFIG_DEBUG.
+ *    packets. Depends on CONFIG_DEBUG_FEATURES.
  */
 
 /* Default RxFIFO size */
@@ -121,9 +122,9 @@
 #  define CONFIG_EFM32_OTGFS_DESCSIZE 128
 #endif
 
-/* Register/packet debug depends on CONFIG_DEBUG */
+/* Register/packet debug depends on CONFIG_DEBUG_FEATURES */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_USB_INFO
 #  undef CONFIG_EFM32_USBHOST_REGDEBUG
 #  undef CONFIG_EFM32_USBHOST_PKTDUMP
 #endif
@@ -416,7 +417,7 @@ static inline void efm32_gint_ipxfrisr(FAR struct efm32_usbhost_s *priv);
 
 /* First level, global interrupt handler */
 
-static int efm32_gint_isr(int irq, FAR void *context);
+static int efm32_gint_isr(int irq, FAR void *context, FAR void *arg);
 
 /* Interrupt controls */
 
@@ -582,7 +583,7 @@ static const struct efm32_usbhost_trace_s g_trace2[TRACE2_NSTRINGS] =
 #ifdef CONFIG_EFM32_USBHOST_REGDEBUG
 static void efm32_printreg(uint32_t addr, uint32_t val, bool iswrite)
 {
-  lldbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
+  uinfo("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
 }
 #endif
 
@@ -632,7 +633,7 @@ static void efm32_checkreg(uint32_t addr, uint32_t val, bool iswrite)
             {
               /* No.. More than one. */
 
-              lldbg("[repeats %d more times]\n", count);
+              uinfo("[repeats %d more times]\n", count);
             }
         }
 
@@ -1362,7 +1363,7 @@ static int efm32_ctrlep_alloc(FAR struct efm32_usbhost_s *priv,
   ctrlep = (FAR struct efm32_ctrlinfo_s *)kmm_malloc(sizeof(struct efm32_ctrlinfo_s));
   if (ctrlep == NULL)
     {
-      udbg("ERROR: Failed to allocate control endpoint container\n");
+      uerr("ERROR: Failed to allocate control endpoint container\n");
       return -ENOMEM;
     }
 
@@ -1372,7 +1373,7 @@ static int efm32_ctrlep_alloc(FAR struct efm32_usbhost_s *priv,
                              hport->funcaddr, hport->speed, ctrlep);
   if (ret < 0)
     {
-      udbg("ERROR: efm32_ctrlchan_alloc failed: %d\n", ret);
+      uerr("ERROR: efm32_ctrlchan_alloc failed: %d\n", ret);
       kmm_free(ctrlep);
       return ret;
     }
@@ -1424,7 +1425,7 @@ static int efm32_xfrep_alloc(FAR struct efm32_usbhost_s *priv,
   chidx = efm32_chan_alloc(priv);
   if (chidx < 0)
     {
-      udbg("ERROR: Failed to allocate a host channel\n");
+      uerr("ERROR: Failed to allocate a host channel\n");
       return -ENOMEM;
     }
 
@@ -1934,7 +1935,7 @@ static ssize_t efm32_in_transfer(FAR struct efm32_usbhost_s *priv, int chidx,
       ret = efm32_in_setup(priv, chidx);
       if (ret < 0)
         {
-          udbg("ERROR: efm32_in_setup failed: %d\n", ret);
+          uerr("ERROR: efm32_in_setup failed: %d\n", ret);
           return  (ssize_t)ret;
         }
 
@@ -1965,7 +1966,7 @@ static ssize_t efm32_in_transfer(FAR struct efm32_usbhost_s *priv, int chidx,
             {
               /* Break out and return the error */
 
-              udbg("ERROR: efm32_chan_wait failed: %d\n", ret);
+              uerr("ERROR: efm32_chan_wait failed: %d\n", ret);
               return (ssize_t)ret;
             }
         }
@@ -2010,13 +2011,13 @@ static void efm32_in_next(FAR struct efm32_usbhost_s *priv,
           return;
         }
 
-      udbg("ERROR: efm32_in_setup failed: %d\n", ret);
+      uerr("ERROR: efm32_in_setup failed: %d\n", ret);
       result = ret;
     }
 
   /* The transfer is complete, with or without an error */
 
-  uvdbg("Transfer complete:  %d\n", result);
+  uinfo("Transfer complete:  %d\n", result);
 
   /* Extract the callback information */
 
@@ -2068,7 +2069,7 @@ static int efm32_in_asynch(FAR struct efm32_usbhost_s *priv, int chidx,
   ret = efm32_chan_asynchsetup(priv, chan, callback, arg);
   if (ret < 0)
     {
-      udbg("ERROR: efm32_chan_asynchsetup failed: %d\n", ret);
+      uerr("ERROR: efm32_chan_asynchsetup failed: %d\n", ret);
       return ret;
     }
 
@@ -2077,7 +2078,7 @@ static int efm32_in_asynch(FAR struct efm32_usbhost_s *priv, int chidx,
   ret = efm32_in_setup(priv, chidx);
   if (ret < 0)
     {
-      udbg("ERROR: efm32_in_setup failed: %d\n", ret);
+      uerr("ERROR: efm32_in_setup failed: %d\n", ret);
     }
 
   /* And return with the transfer pending */
@@ -2203,7 +2204,7 @@ static ssize_t efm32_out_transfer(FAR struct efm32_usbhost_s *priv, int chidx,
       ret = efm32_out_setup(priv, chidx);
       if (ret < 0)
         {
-          udbg("ERROR: efm32_out_setup failed: %d\n", ret);
+          uerr("ERROR: efm32_out_setup failed: %d\n", ret);
           return (ssize_t)ret;
         }
 
@@ -2231,7 +2232,7 @@ static ssize_t efm32_out_transfer(FAR struct efm32_usbhost_s *priv, int chidx,
             {
               /* Break out and return the error */
 
-              udbg("ERROR: efm32_chan_wait failed: %d\n", ret);
+              uerr("ERROR: efm32_chan_wait failed: %d\n", ret);
               return (ssize_t)ret;
             }
 
@@ -2296,13 +2297,13 @@ static void efm32_out_next(FAR struct efm32_usbhost_s *priv,
           return;
         }
 
-      udbg("ERROR: efm32_out_setup failed: %d\n", ret);
+      uerr("ERROR: efm32_out_setup failed: %d\n", ret);
       result = ret;
     }
 
   /* The transfer is complete, with or without an error */
 
-  uvdbg("Transfer complete:  %d\n", result);
+  uinfo("Transfer complete:  %d\n", result);
 
   /* Extract the callback information */
 
@@ -2354,7 +2355,7 @@ static int efm32_out_asynch(FAR struct efm32_usbhost_s *priv, int chidx,
   ret = efm32_chan_asynchsetup(priv, chan, callback, arg);
   if (ret < 0)
     {
-      udbg("ERROR: efm32_chan_asynchsetup failed: %d\n", ret);
+      uerr("ERROR: efm32_chan_asynchsetup failed: %d\n", ret);
       return ret;
     }
 
@@ -2363,7 +2364,7 @@ static int efm32_out_asynch(FAR struct efm32_usbhost_s *priv, int chidx,
   ret = efm32_out_setup(priv, chidx);
   if (ret < 0)
     {
-      udbg("ERROR: efm32_out_setup failed: %d\n", ret);
+      uerr("ERROR: efm32_out_setup failed: %d\n", ret);
     }
 
   /* And return with the transfer pending */
@@ -2448,7 +2449,7 @@ static inline void efm32_gint_hcinisr(FAR struct efm32_usbhost_s *priv,
   /* AND the two to get the set of enabled, pending HC interrupts */
 
   pending &= regval;
-  ullvdbg("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
+  uinfo("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
 
   /* Check for a pending ACK response received/transmitted (ACK) interrupt */
 
@@ -2709,7 +2710,7 @@ static inline void efm32_gint_hcoutisr(FAR struct efm32_usbhost_s *priv,
   /* AND the two to get the set of enabled, pending HC interrupts */
 
   pending &= regval;
-  ullvdbg("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
+  uinfo("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
 
   /* Check for a pending ACK response received/transmitted (ACK) interrupt */
 
@@ -3012,7 +3013,7 @@ static inline void efm32_gint_rxflvlisr(FAR struct efm32_usbhost_s *priv)
   /* Read and pop the next status from the Rx FIFO */
 
   grxsts = efm32_getreg(EFM32_USB_GRXSTSP);
-  ullvdbg("GRXSTS: %08x\n", grxsts);
+  uinfo("GRXSTS: %08x\n", grxsts);
 
   /* Isolate the channel number/index in the status word */
 
@@ -3166,8 +3167,8 @@ static inline void efm32_gint_nptxfeisr(FAR struct efm32_usbhost_s *priv)
 
   /* Write the next group of packets into the Tx FIFO */
 
-  ullvdbg("HNPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
-           regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
+  uinfo("HNPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
+         regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
 
   efm32_gint_wrpacket(priv, chan->buffer, chidx, wrsize);
 }
@@ -3254,8 +3255,8 @@ static inline void efm32_gint_ptxfeisr(FAR struct efm32_usbhost_s *priv)
 
   /* Write the next group of packets into the Tx FIFO */
 
-  ullvdbg("HPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
-           regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
+  uinfo("HPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
+        regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
 
   efm32_gint_wrpacket(priv, chan->buffer, chidx, wrsize);
 }
@@ -3494,7 +3495,7 @@ static inline void efm32_gint_ipxfrisr(FAR struct efm32_usbhost_s *priv)
  *
  ****************************************************************************/
 
-static int efm32_gint_isr(int irq, FAR void *context)
+static int efm32_gint_isr(int irq, FAR void *context, FAR void *arg)
 {
   /* At present, there is only support for a single OTG FS host. Hence it is
    * pre-allocated as g_usbhost.  However, in most code, the private data
@@ -3827,7 +3828,7 @@ static int efm32_wait(FAR struct usbhost_connection_s *conn,
           *hport = connport;
           leave_critical_section(flags);
 
-          uvdbg("RHport Connected: %s\n", connport->connected ? "YES" : "NO");
+          uinfo("RHport Connected: %s\n", connport->connected ? "YES" : "NO");
           return OK;
         }
 
@@ -3844,7 +3845,7 @@ static int efm32_wait(FAR struct usbhost_connection_s *conn,
           *hport = connport;
           leave_critical_section(flags);
 
-          uvdbg("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
+          uinfo("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
           return OK;
         }
 #endif
@@ -3932,7 +3933,7 @@ static int efm32_rh_enumerate(FAR struct efm32_usbhost_s *priv,
   ret = efm32_ctrlchan_alloc(priv, 0, 0, priv->rhport.hport.speed, &priv->ep0);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to allocate a control endpoint: %d\n", ret);
+      uerr("ERROR: Failed to allocate a control endpoint: %d\n", ret);
     }
 
   return ret;
@@ -3964,7 +3965,7 @@ static int efm32_enumerate(FAR struct usbhost_connection_s *conn,
 
   /* Then let the common usbhost_enumerate do the real enumeration. */
 
-  uvdbg("Enumerate the device\n");
+  uinfo("Enumerate the device\n");
   priv->smstate = SMSTATE_ENUM;
   ret = usbhost_enumerate(hport, &hport->devclass);
 
@@ -3978,7 +3979,7 @@ static int efm32_enumerate(FAR struct usbhost_connection_s *conn,
     {
       /* Return to the disconnected state */
 
-      udbg("ERROR: Enumeration failed: %d\n", ret);
+      uerr("ERROR: Enumeration failed: %d\n", ret);
       efm32_gint_disconnected(priv);
     }
 
@@ -4380,7 +4381,7 @@ static int efm32_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
 
   DEBUGASSERT(priv != NULL && ep0info != NULL && req != NULL);
   usbhost_vtrace2(USBHOST_VTRACE2_CTRLIN, req->type, req->req);
-  uvdbg("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
+  uinfo("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
         req->type, req->req, req->value[1], req->value[0],
         req->index[1], req->index[0], req->len[1], req->len[0]);
 
@@ -4465,7 +4466,7 @@ static int efm32_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
 
   DEBUGASSERT(priv != NULL && ep0info != NULL && req != NULL);
   usbhost_vtrace2(USBHOST_VTRACE2_CTRLOUT, req->type, req->req);
-  uvdbg("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
+  uinfo("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
         req->type, req->req, req->value[1], req->value[0],
         req->index[1], req->index[0], req->len[1], req->len[0]);
 
@@ -4583,7 +4584,7 @@ static ssize_t efm32_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep
   unsigned int chidx = (unsigned int)ep;
   ssize_t nbytes;
 
-  uvdbg("chidx: %d buflen: %d\n",  (unsigned int)ep, buflen);
+  uinfo("chidx: %d buflen: %d\n",  (unsigned int)ep, buflen);
 
   DEBUGASSERT(priv && buffer && chidx < EFM32_MAX_TX_FIFOS && buflen > 0);
 
@@ -4650,7 +4651,7 @@ static int efm32_asynch(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep,
   unsigned int chidx = (unsigned int)ep;
   int ret;
 
-  uvdbg("chidx: %d buflen: %d\n",  (unsigned int)ep, buflen);
+  uinfo("chidx: %d buflen: %d\n",  (unsigned int)ep, buflen);
 
   DEBUGASSERT(priv && buffer && chidx < EFM32_MAX_TX_FIFOS && buflen > 0);
 
@@ -4700,7 +4701,7 @@ static int efm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
   unsigned int chidx = (unsigned int)ep;
   irqstate_t flags;
 
-  uvdbg("chidx: %u: %d\n",  chidx);
+  uinfo("chidx: %u: %d\n",  chidx);
 
   DEBUGASSERT(priv && chidx < EFM32_MAX_TX_FIFOS);
   chan = &priv->chan[chidx];
@@ -4795,7 +4796,8 @@ static int efm32_connect(FAR struct usbhost_driver_s *drvr,
   /* Set the connected/disconnected flag */
 
   hport->connected = connected;
-  ullvdbg("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
+  uinfo("Hub port %d connected: %s\n",
+        hport->port, connected ? "YES" : "NO");
 
   /* Report the connection event */
 
@@ -5156,6 +5158,12 @@ static inline void efm32_sw_initialize(FAR struct efm32_usbhost_s *priv)
   sem_init(&priv->pscsem,  0, 0);
   sem_init(&priv->exclsem, 0, 1);
 
+  /* The pscsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->pscsem, SEM_PRIO_NONE);
+
   /* Initialize the driver state data */
 
   priv->smstate   = SMSTATE_DETACHED;
@@ -5171,8 +5179,15 @@ static inline void efm32_sw_initialize(FAR struct efm32_usbhost_s *priv)
   for (i = 0; i < EFM32_MAX_TX_FIFOS; i++)
     {
       FAR struct efm32_chan_s *chan = &priv->chan[i];
+
       chan->chidx = i;
+
+      /* The waitsem semaphore is used for signaling and, hence, should not
+       * have priority inheritance enabled.
+       */
+
       sem_init(&chan->waitsem,  0, 0);
+      sem_setprotocol(&chan->waitsem, SEM_PRIO_NONE);
     }
 }
 
@@ -5359,7 +5374,7 @@ FAR struct usbhost_connection_s *efm32_usbhost_initialize(int controller)
 
   /* Attach USB host controller interrupt handler */
 
-  if (irq_attach(EFM32_IRQ_USB, efm32_gint_isr) != 0)
+  if (irq_attach(EFM32_IRQ_USB, efm32_gint_isr, NULL) != 0)
     {
       usbhost_trace1(USBHOST_TRACE1_IRQATTACH, 0);
       return NULL;
diff --git a/arch/arm/src/imx1/Make.defs b/arch/arm/src/imx1/Make.defs
index 40999a4e5fcf4b78c07534427973c8f5f6304797..3a3b245da41f6cdcd9e63d02152adf4674899867 100644
--- a/arch/arm/src/imx1/Make.defs
+++ b/arch/arm/src/imx1/Make.defs
@@ -45,12 +45,6 @@ CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c
 CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_syscall.c up_unblocktask.c
 CMN_CSRCS += up_undefinedinsn.c up_usestack.c up_vfork.c
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c
-endif
-
 ifeq ($(CONFIG_STACK_COLORATION),y)
 CMN_CSRCS += up_checkstack.c
 endif
diff --git a/arch/arm/src/imx1/imx_decodeirq.c b/arch/arm/src/imx1/imx_decodeirq.c
index 5c35e68fab2dbc619aeea11cc6146698c74a09b4..48164d9099c465561c9cb65e30b0b14c140c5404 100644
--- a/arch/arm/src/imx1/imx_decodeirq.c
+++ b/arch/arm/src/imx1/imx_decodeirq.c
@@ -74,8 +74,8 @@
 void up_decodeirq(uint32_t *regs)
 {
 #ifdef CONFIG_SUPPRESS_INTERRUPTS
-  lowsyslog(LOG_ERR, "Unexpected IRQ\n");
   CURRENT_REGS = regs;
+  err("ERROR: Unexpected IRQ\n");
   PANIC();
 #else
   uint32_t regval;
diff --git a/arch/arm/src/imx1/imx_serial.c b/arch/arm/src/imx1/imx_serial.c
index e3826192b22433a46464f3b70086c537a682af32..ebe996e81b4794b9c38fcd41a64eefaacdc208c4 100644
--- a/arch/arm/src/imx1/imx_serial.c
+++ b/arch/arm/src/imx1/imx_serial.c
@@ -112,7 +112,7 @@ static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
 static inline struct uart_dev_s *up_mapirq(int irq);
-static int  up_interrupt(int irq, void *context);
+static int  up_interrupt(int irq, void *context, FAR void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  up_receive(struct uart_dev_s *dev, uint32_t *status);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
@@ -753,13 +753,13 @@ static int up_attach(struct uart_dev_s *dev)
   /* Attach and enable the IRQ */
 
 #if defined(CONFIG_ARCH_CHIP_IMX1) || defined(CONFIG_ARCH_CHIP_IMXL)
-  ret = irq_attach(priv->rxirq, up_interrupt);
+  ret = irq_attach(priv->rxirq, up_interrupt, NULL);
   if (ret < 0)
     {
       return ret;
     }
 
-  ret = irq_attach(priv->txirq, up_interrupt);
+  ret = irq_attach(priv->txirq, up_interrupt, NULL);
   if (ret < 0)
     {
       irq_detach(priv->rxirq);
@@ -772,7 +772,7 @@ static int up_attach(struct uart_dev_s *dev)
   up_enable_irq(priv->txirq);
 
 #else
-  ret = irq_attach(priv->irq, up_interrupt);
+  ret = irq_attach(priv->irq, up_interrupt, NULL);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
@@ -877,7 +877,7 @@ static inline struct uart_dev_s *up_mapirq(int irq)
  *
  ****************************************************************************/
 
-static int up_interrupt(int irq, void *context)
+static int up_interrupt(int irq, void *context, FAR void *arg)
 {
   struct uart_dev_s *dev;
   struct up_dev_s   *priv;
diff --git a/arch/arm/src/imx1/imx_spi.c b/arch/arm/src/imx1/imx_spi.c
index fb5831438699a061fcad0194bca16d613a5e6c1e..695d6b358f8ca3feb64a2a62646042196c68bcd6 100644
--- a/arch/arm/src/imx1/imx_spi.c
+++ b/arch/arm/src/imx1/imx_spi.c
@@ -50,6 +50,7 @@
 #include 
 
 #include 
+#include 
 #include 
 
 #include "up_internal.h"
@@ -164,7 +165,7 @@ static int    spi_transfer(struct imx_spidev_s *priv, const void *txbuffer,
 
 #ifndef CONFIG_SPI_POLLWAIT
 static inline struct imx_spidev_s *spi_mapirq(int irq);
-static int    spi_interrupt(int irq, void *context);
+static int    spi_interrupt(int irq, void *context, FAR void *arg, FAR void *arg);
 #endif
 
 /* SPI methods */
@@ -652,7 +653,7 @@ static inline struct imx_spidev_s *spi_mapirq(int irq)
  ****************************************************************************/
 
 #ifndef CONFIG_SPI_POLLWAIT
-static int spi_interrupt(int irq, void *context)
+static int spi_interrupt(int irq, void *context, FAR void *arg, FAR void *arg)
 {
   struct imx_spidev_s *priv = spi_mapirq(irq);
   int ntxd;
@@ -1116,7 +1117,13 @@ FAR struct spi_dev_s *imx_spibus_initialize(int port)
   /* Initialize the state structure */
 
 #ifndef CONFIG_SPI_POLLWAIT
+  /* Initialize the semaphore that is used to wake up the waiting
+   * thread when the DMA transfer completes.  This semaphore is used for
+   * signaling and, hence, should not have priority inheritance enabled.
+   */
+
    sem_init(&priv->waitsem, 0, 0);
+   sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
 #endif
    sem_init(&priv->exclsem, 0, 1);
 
@@ -1161,7 +1168,7 @@ FAR struct spi_dev_s *imx_spibus_initialize(int port)
   /* Attach the interrupt */
 
 #ifndef CONFIG_SPI_POLLWAIT
-  irq_attach(priv->irq, (xcpt_t)spi_interrupt);
+  irq_attach(priv->irq, (xcpt_t)spi_interrupt, NULL);
 #endif
 
   /* Enable SPI */
diff --git a/arch/arm/src/imx1/imx_timerisr.c b/arch/arm/src/imx1/imx_timerisr.c
index 77facd7cc913fe7239102af2717a8296ac81f0aa..2b021e085652af8d87dc439fccec86876900ea7b 100644
--- a/arch/arm/src/imx1/imx_timerisr.c
+++ b/arch/arm/src/imx1/imx_timerisr.c
@@ -2,7 +2,7 @@
  * arch/arm/src/imx1/imx_timerisr.c
  * arch/arm/src/chip/imx_timerisr.c
  *
- *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -52,23 +52,11 @@
 #include "up_internal.h"
 
 /****************************************************************************
- * Pre-processor Definitions
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  imx_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -76,7 +64,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int imx_timerisr(int irq, uint32_t *regs, FAR void *arg)
 {
   uint32_t tstat;
   int    ret = -EIO;
@@ -100,7 +88,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize the timer
@@ -108,7 +100,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t tctl;
 
@@ -158,7 +150,7 @@ void up_timer_initialize(void)
 
   /* Attach and enable the timer interrupt */
 
-  irq_attach(IMX_IRQ_SYSTIMER, (xcpt_t)up_timerisr);
+  irq_attach(IMX_IRQ_SYSTIMER, (xcpt_t)imx_timerisr, NULL);
   up_enable_irq(IMX_IRQ_SYSTIMER);
 }
 
diff --git a/arch/arm/src/imx6/Make.defs b/arch/arm/src/imx6/Make.defs
index 47b36a5f1af3719f2927d323946d2fdc12797149..c551c22d97b3d024a5c728914f4cfb99b4eba5b9 100644
--- a/arch/arm/src/imx6/Make.defs
+++ b/arch/arm/src/imx6/Make.defs
@@ -62,10 +62,6 @@ CMN_ASRCS += arm_testset.S
 CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
 CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S cp15_invalidate_dcache_all.S
 
-ifeq ($(CONFIG_ARCH_MEMCPY),y)
-CMN_ASRCS += arm_memcpy.S
-endif
-
 # Common C source files
 
 CMN_CSRCS  = up_initialize.c up_idle.c up_interruptcontext.c up_exit.c
@@ -81,9 +77,10 @@ CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c
 
 ifeq ($(CONFIG_SMP),y)
 CMN_CSRCS += arm_cpuindex.c arm_cpustart.c arm_cpupause.c arm_cpuidlestack.c
+CMN_CSRCS += arm_scu.c
 endif
 
-ifeq ($(CONFIG_DEBUG_IRQ),y)
+ifeq ($(CONFIG_DEBUG_IRQ_INFO),y)
 CMN_CSRCS += arm_gicv2_dump.c
 endif
 
@@ -123,9 +120,9 @@ endif
 endif
 
 ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += arm_elf.c arm_coherent_dcache.c
+CMN_CSRCS += arm_coherent_dcache.c
 else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += arm_elf.c arm_coherent_dcache.c
+CMN_CSRCS += arm_coherent_dcache.c
 endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)
diff --git a/arch/arm/src/imx6/chip/imx_memorymap.h b/arch/arm/src/imx6/chip/imx_memorymap.h
index c91fb924e093e1095bb85200a4c28fbbf03404f5..c9ad19dfdf353053ff32ba10c76580e9c046e578 100644
--- a/arch/arm/src/imx6/chip/imx_memorymap.h
+++ b/arch/arm/src/imx6/chip/imx_memorymap.h
@@ -122,6 +122,16 @@
 #define IMX_MMDCDDR_PSECTION     0x10000000  /* 10000000-ffffffff 3840 MB MMDC-DDR Controller */
                                              /* 10000000-7fffffff 1792 MB */
 
+/* By default, NuttX uses a 1-1 memory mapping.  So the unused, reserved
+ * address in the top-level memory map are candidates for other mapping uses:
+ *
+ *  00018000-000fffff Reserved -- Not used
+ *  00400000-007fffff Reserved -- Not used
+ *  00d00000-00ffffff Reserved -- Not used
+ *  0220c000-023fffff Reserved -- Not used
+ *  80000000-efffffff Reserved -- Level 2 page table (See below)
+ */
+
 /* i.MX6 DMA PSECTION Offsets */
 
 #define IMX_CAAMRAM_OFFSET       0x00000000  /* 00000000-00003fff  16 KB CAAM (16K secure RAM) */
@@ -897,7 +907,7 @@
  *   0x80000000-0xefffffff: Undefined (1.75 GB)
  *
  * That is the offset where the main L2 page tables will be positioned.  This
- * corresponds to page table offsets 0x000002000 up to 0x000003c00.  That
+ * corresponds to page table offsets 0x00002000 up to 0x00003c00.  That
  * is 1792 entries, each mapping 4KB of address for a total of 7MB of virtual
  * address space)
  *
@@ -918,6 +928,14 @@
  */
 
 #ifndef CONFIG_ARCH_LOWVECTORS
+  /* Memory map
+   * VIRTUAL ADDRESS RANGE L1 PG TABLE L2 PG TABLE  DESCRIPTION
+   * START      END        OFFSET      SIZE
+   * ---------- ---------- ------------ ----------------------------
+   * 0x80000000 0x803fffff 0x000002000 0x000000400  Vectors (1MiB)
+   * 0x80100000 0x806fffff 0x000002400 0x000001800  Paging  (6MiB)
+   */
+
   /* Vector L2 page table offset/size */
 
 #  define VECTOR_L2_OFFSET        0x000002000
@@ -939,10 +957,18 @@
 #  define PGTABLE_L2_SIZE         0x000001800
 
 #else
+  /* Memory map
+   * VIRTUAL ADDRESS RANGE L1 PG TABLE L2 PG TABLE  DESCRIPTION
+   * START      END        OFFSET      SIZE
+   * ---------- ---------- ------------ ----------------------------
+   * 0x80000000 0x806fffff 0x000002000 0x000001c00  Paging  (7MiB)
+   */
+
   /* Paging L2 page table offset/size */
 
 #  define PGTABLE_L2_OFFSET       0x000002000
 #  define PGTABLE_L2_SIZE         0x000001c00
+
 #endif
 
 /* Paging L2 page table base addresses
@@ -974,14 +1000,30 @@
  */
 
 #ifdef CONFIG_ARCH_LOWVECTORS  /* Vectors located at 0x0000:0000  */
-
-  /* Vectors will always lie at the beginnin of OCRAM */
+/* Vectors will always lie at the beginning of OCRAM
+ *
+ * OCRAM Memory Map:
+ * ---------- ---------- ---------------------------
+ * START      END        CONTENT
+ * ---------- ---------- ---------------------------
+ * 0x00000000 0x00010000 Vectors (VECTOR_TABLE_SIZE)
+ * 0x00010000 0x0003c000 Unused
+ * 0x0003c000 0x00004000 Page table (PGTABLE_SIZE)
+ */
 
 #  define IMX_VECTOR_PADDR        IMX_OCRAM_PBASE
 #  define IMX_VECTOR_VSRAM        IMX_OCRAM_VBASE
 #  define IMX_VECTOR_VADDR        0x00000000
 
 #else  /* Vectors located at 0xffff:0000 -- this probably does not work */
+/* OCRAM Memory Map:
+ * ---------- ---------- ---------------------------
+ * START      END        CONTENT
+ * ---------- ---------- ---------------------------
+ * 0x00000000 0x00004000 Page table (PGTABLE_SIZE)
+ * 0x00004000 0x00030000 Unused
+ * 0x00030000 0x00010000 Vectors (VECTOR_TABLE_SIZE)
+ */
 
 #  define IMX_VECTOR_PADDR        (IMX_OCRAM_PBASE + IMX_OCRAM_SIZE - VECTOR_TABLE_SIZE)
 #  define IMX_VECTOR_VSRAM        (IMX_OCRAM_VBASE + IMX_OCRAM_SIZE - VECTOR_TABLE_SIZE)
diff --git a/arch/arm/src/imx6/imx_boot.c b/arch/arm/src/imx6/imx_boot.c
index edfd5304a14386affc0dcda7a02312e0d18515db..6abc6f8b15753ea4479657b7a8a341b6d0ff7703 100644
--- a/arch/arm/src/imx6/imx_boot.c
+++ b/arch/arm/src/imx6/imx_boot.c
@@ -52,6 +52,7 @@
 #include "chip.h"
 #include "arm.h"
 #include "mmu.h"
+#include "scu.h"
 #include "cache.h"
 #include "fpu.h"
 #include "up_internal.h"
@@ -64,6 +65,16 @@
 #include "imx_serial.h"
 #include "imx_boot.h"
 
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_DEBUG_FEATURES
+#  define PROGRESS(c) imx_lowputc(c)
+#else
+#  define PROGRESS(c)
+#endif
+
 /****************************************************************************
  * Public Data
  ****************************************************************************/
@@ -388,8 +399,10 @@ static inline void imx_wdtdisable(void)
 
 void arm_boot(void)
 {
-#ifdef CONFIG_ARCH_RAMFUNCS
+#if defined(CONFIG_ARCH_RAMFUNCS)
   const uint32_t *src;
+#endif
+#if defined(CONFIG_ARCH_RAMFUNCS) || defined(CONFIG_SMP) && defined(SMP_INTERCPU_NONCACHED)
   uint32_t *dest;
 #endif
 
@@ -398,7 +411,7 @@ void arm_boot(void)
    */
 
   imx_setupmappings();
-  imx_lowputc('A');
+  PROGRESS('A');
 
   /* Make sure that all other CPUs are in the disabled state.  This is a
    * formality because the other CPUs are actually running then we have
@@ -406,13 +419,21 @@ void arm_boot(void)
    */
 
   imx_cpu_disable();
+  PROGRESS('B');
+
+#ifdef CONFIG_SMP
+  /* Enable SMP cache coherency for CPU0 */
+
+  arm_enable_smp(0);
+  PROGRESS('C');
+#endif
 
   /* Provide a special mapping for the OCRAM interrupt vector positioned in
    * high memory.
    */
 
   imx_vectormapping();
-  imx_lowputc('B');
+  PROGRESS('D');
 
 #ifdef CONFIG_ARCH_RAMFUNCS
   /* Copy any necessary code sections from FLASH to RAM.  The correct
@@ -426,14 +447,14 @@ void arm_boot(void)
       *dest++ = *src++;
     }
 
-  imx_lowputc('C');
+  PROGRESS('E');
 
   /* Flush the copied RAM functions into physical RAM so that will
    * be available when fetched into the I-Cache.
    */
 
   arch_clean_dcache((uintptr_t)&_sramfuncs, (uintptr_t)&_eramfuncs)
-  imx_lowputc('D');
+  PROGRESS('F');
 #endif
 
   /* Setup up vector block.  _vector_start and _vector_end are exported from
@@ -441,37 +462,35 @@ void arm_boot(void)
    */
 
   imx_copyvectorblock();
-  imx_lowputc('E');
+  PROGRESS('G');
 
   /* Disable the watchdog timer */
 
   imx_wdtdisable();
-  imx_lowputc('F');
+  PROGRESS('H');
 
   /* Initialize clocking to settings provided by board-specific logic */
 
   imx_clockconfig();
-  imx_lowputc('G');
+  PROGRESS('I');
 
 #ifdef CONFIG_ARCH_FPU
   /* Initialize the FPU */
 
   arm_fpuconfig();
-  imx_lowputc('H');
+  PROGRESS('J');
 #endif
 
-  /* Perform board-specific initialization,  This must include:
-   *
-   * - Initialization of board-specific memory resources (e.g., SDRAM)
-   * - Configuration of board specific resources (PIOs, LEDs, etc).
+  /* Perform board-specific memroy initialization,  This must include
+   * initialization of board-specific memory resources (e.g., SDRAM)
    *
    * NOTE: We must use caution prior to this point to make sure that
    * the logic does not access any global variables that might lie
    * in SDRAM.
    */
 
-  imx_board_initialize();
-  imx_lowputc('I');
+  imx_memory_initialize();
+  PROGRESS('K');
 
 #ifdef NEED_SDRAM_REMAPPING
   /* SDRAM was configured in a temporary state to support low-level
@@ -480,7 +499,7 @@ void arm_boot(void)
    */
 
   imx_remap();
-  imx_lowputc('J');
+  PROGRESS('L');
 #endif
 
 #ifdef CONFIG_BOOT_SDRAM_DATA
@@ -489,13 +508,20 @@ void arm_boot(void)
    */
 
   arm_data_initialize();
-  imx_lowputc('K');
+  PROGRESS('M');
 #endif
 
+  /* Perform board-specific device initialization. This would include
+   * configuration of board specific resources such as GPIOs, LEDs, etc.
+   */
+
+  imx_board_initialize();
+  PROGRESS('N');
+
   /* Perform common, low-level chip initialization (might do nothing) */
 
   imx_lowsetup();
-  imx_lowputc('L');
+  PROGRESS('O');
 
 #ifdef USE_EARLYSERIALINIT
   /* Perform early serial initialization if we are going to use the serial
@@ -503,7 +529,7 @@ void arm_boot(void)
    */
 
   imx_earlyserialinit();
-  imx_lowputc('M');
+  PROGRESS('P');
 #endif
 
   /* Now we can enable all other CPUs.  The enabled CPUs will start execution
@@ -512,6 +538,6 @@ void arm_boot(void)
    */
 
   imx_cpu_enable();
-  imx_lowputc('N');
-  imx_lowputc('\n');
+  PROGRESS('Q');
+  PROGRESS('\n');
 }
diff --git a/arch/arm/src/imx6/imx_boot.h b/arch/arm/src/imx6/imx_boot.h
index 11c1ef56fe38f2b4795b4172fb7997df90db98a0..7f98d347acd51d0f908c3ef58741333883445cf6 100644
--- a/arch/arm/src/imx6/imx_boot.h
+++ b/arch/arm/src/imx6/imx_boot.h
@@ -110,14 +110,37 @@ void imx_cpu_enable(void);
 #  define imx_cpu_enable()
 #endif
 
+/****************************************************************************
+ * Name: imx_memory_initialize
+ *
+ * Description:
+ *   All i.MX6 architectures must provide the following entry point.  This
+ *   entry point is called early in the initialization before memory has
+ *   been configured.  This board-specific function is responsible for
+ *   configuring any on-board memories.
+ *
+ *   Logic in imx_memory_initialize must be careful to avoid using any
+ *   global variables because those will be uninitialized at the time this
+ *   function is called.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void imx_memory_initialize(void);
+
 /****************************************************************************
  * Name: imx_board_initialize
  *
  * Description:
  *   All i.MX6 architectures must provide the following entry point.  This
- *   entry point is called early in the initialization -- after all memory
- *   has been configured and mapped but before any devices have been
- *   initialized.
+ *   entry point is called in the initialization phase -- after
+ *   imx_memory_initialize and after all memory has been configured and
+ *   mapped but before any devices have been initialized.
  *
  * Input Parameters:
  *   None
diff --git a/arch/arm/src/imx6/imx_cpuboot.c b/arch/arm/src/imx6/imx_cpuboot.c
index 50b23b5c1d403f8256df08f9b7eb650a05878f16..818b327a4bc4c3cee317fbefdb7d7c8ee3891685 100644
--- a/arch/arm/src/imx6/imx_cpuboot.c
+++ b/arch/arm/src/imx6/imx_cpuboot.c
@@ -51,9 +51,9 @@
 #include "chip/imx_src.h"
 #include "sctlr.h"
 #include "smp.h"
+#include "scu.h"
 #include "fpu.h"
 #include "gic.h"
-#include "cp15_cacheops.h"
 
 #ifdef CONFIG_SMP
 
@@ -260,6 +260,10 @@ void imx_cpu_enable(void)
 
 void arm_cpu_boot(int cpu)
 {
+  /* Enable SMP cache coherency for the CPU */
+
+  arm_enable_smp(cpu);
+
 #ifdef CONFIG_ARCH_FPU
   /* Initialize the FPU */
 
@@ -297,10 +301,6 @@ void arm_cpu_boot(int cpu)
   (void)up_irq_enable();
 #endif
 
-  /* Invalidate CPUn L1 so that is will be reloaded from coherent L2. */
-
-  cp15_invalidate_dcache_all();
-
   /* The next thing that we expect to happen is for logic running on CPU0
    * to call up_cpu_start() which generate an SGI and a context switch to
    * the configured NuttX IDLE task.
diff --git a/arch/arm/src/imx6/imx_ecspi.c b/arch/arm/src/imx6/imx_ecspi.c
new file mode 100644
index 0000000000000000000000000000000000000000..0199419681764cd3683b49619f9763d3794d7b52
--- /dev/null
+++ b/arch/arm/src/imx6/imx_ecspi.c
@@ -0,0 +1,1374 @@
+/****************************************************************************
+ * arch/arm/src/imx6/imx_ecspi.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from the i.MX1 CSPI driver:
+ *
+ *   Copyright (C) 2009-2010, 2013, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "up_internal.h"
+#include "up_arch.h"
+
+#include "chip.h"
+#include "imx_gpio.h"
+#include "imx_ecspi.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* The i.MX6 supports 25SPI interfaces.  Which have been enabled? */
+
+#define __SPI1_NDX       0
+
+#ifdef CONFIG_IMX6_ECSPI1
+#  define SPI1_NDX       __SPI1_NDX
+#  define __SPI1_PRESENT 1
+#  define __SPI2_NDX     (__SPI1_NDX + 1)
+#else
+#  define __SPI1_PRESENT 0
+#  define __SPI2_NDX     __SPI1_NDX
+#endif
+
+#ifdef CONFIG_IMX6_ECSPI2
+#  define SPI2_NDX       __SPI2_NDX
+#  define __SPI2_PRESENT 1
+#  define __SPI3_NDX     (__SPI2_NDX + 1)
+#else
+#  define __SPI2_PRESENT 0
+#  define __SPI3_NDX     __SPI2_NDX
+#endif
+
+#ifdef CONFIG_IMX6_ECSPI3
+#  define SPI3_NDX       __SPI3_NDX
+#  define __SPI3_PRESENT 1
+#  define __SPI4_NDX     (__SPI3_NDX + 1)
+#else
+#  define __SPI3_PRESENT 0
+#  define __SPI4_NDX     __SPI3_NDX
+#endif
+
+#ifdef CONFIG_IMX6_ECSPI4
+#  define SPI4_NDX       __SPI4_NDX
+#  define __SPI4_PRESENT 1
+#  define __SPI5_NDX     (__SPI4_NDX + 1)
+#else
+#  define __SPI4_PRESENT 0
+#  define __SPI5_NDX     __SPI5_NDX
+#endif
+
+#ifdef CONFIG_IMX6_ECSPI5
+#  define SPI5_NDX       __SPI5_NDX
+#  define __SPI5_PRESENT 1
+#  define __SPI6_NDX     (__SPI5_NDX + 1)
+#else
+#  define __SPI5_PRESENT 0
+#  define __SPI6_NDX     __SPI5_NDX
+#endif
+
+#define NSPIS            (__SPI1_PRESENT + __SPI2_PRESENT + __SPI3_PRESENT + \
+                          __SPI4_PRESENT + __SPI5_PRESENT)
+
+/* Compile the rest of the file only if at least one SPI interface has been
+ * enabled.
+ */
+
+#if NSPIS > 0
+
+/* The number of words that will fit in the Tx FIFO */
+
+#define IMX_TXFIFO_WORDS 8
+
+/****************************************************************************
+ * Private Type Definitions
+ ****************************************************************************/
+
+ /* Per SPI callouts to board-specific logic */
+ 
+typedef CODE void (*imx_select_t)(FAR struct spi_dev_s *dev,
+                                  enum spi_dev_e devid, bool selected);
+typedef CODE uint8_t (*imx_status_t)(FAR struct spi_dev_s *dev,
+                                     enum spi_dev_e devid);
+#ifdef CONFIG_SPI_CMDDATA
+typedef CODE int (*imx_cmddata_t)(FAR struct spi_dev_s *dev,
+                                  enum spi_dev_e devid, bool cmd);
+#endif
+
+struct imx_spidev_s
+{
+  const struct spi_ops_s *ops;  /* Common SPI operations */
+#ifndef CONFIG_SPI_POLLWAIT
+  sem_t waitsem;                /* Wait for transfer to complete */
+#endif
+  sem_t exclsem;                /* Supports mutually exclusive access */
+
+  /* These following are the source and destination buffers of the transfer.
+   * they are retained in this structure so that they will be accessible
+   * from an interrupt handler.  The actual type of the buffer is uint8_t is
+   * nbits <=8 and uint16_t is nbits >8.
+   */
+
+  void  *txbuffer;              /* Source buffer */
+  void  *rxbuffer;              /* Destination buffer */
+
+  /* These are functions pointers that are configured to perform the
+   * appropriate transfer for the particular kind of exchange that is
+   * occurring.  Differnt functions may be selected depending on (1)
+   * if the tx or txbuffer is NULL and depending on the number of bits
+   * per word.
+   */
+
+  void  (*txword)(struct imx_spidev_s *priv);
+  void  (*rxword)(struct imx_spidev_s *priv);
+
+  uint32_t base;                /* SPI register base address */
+  uint32_t frequency;           /* Current desired SCLK frequency */
+  uint32_t actual;              /* Current actual SCLK frequency */
+
+  int    ntxwords;              /* Number of words left to transfer on the Tx FIFO */
+  int    nrxwords;              /* Number of words received on the Rx FIFO */
+  int    nwords;                /* Number of words to be exchanged */
+
+  uint8_t  mode;                /* Current mode */
+  uint8_t  nbits;               /* Current number of bits per word */
+  uint8_t  spindx;              /* SPI index */
+#ifndef CONFIG_SPI_POLLWAIT
+  uint8_t  irq;                 /* SPI IRQ number */
+#endif
+
+  /* Per SPI callouts to board-specific logic */
+
+  imx_select_t select;          /* Select callout */
+  imx_status_t status;          /* Status callout */
+#ifdef CONFIG_SPI_CMDDATA
+  imx_cmddata_t cmddata;        /* Cmddata callout */
+#endif
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* SPI register access */
+
+static inline uint32_t spi_getreg(struct imx_spidev_s *priv, unsigned int offset);
+static inline void spi_putreg(struct imx_spidev_s *priv, unsigned int offset, uint32_t value);
+
+/* SPI data transfer */
+
+static void   spi_txnull(struct imx_spidev_s *priv);
+static void   spi_txuint16(struct imx_spidev_s *priv);
+static void   spi_txuint8(struct imx_spidev_s *priv);
+static void   spi_rxnull(struct imx_spidev_s *priv);
+static void   spi_rxuint16(struct imx_spidev_s *priv);
+static void   spi_rxuint8(struct imx_spidev_s *priv);
+static int    spi_performtx(struct imx_spidev_s *priv);
+static inline void spi_performrx(struct imx_spidev_s *priv);
+static int    spi_transfer(struct imx_spidev_s *priv, const void *txbuffer,
+                           void *rxbuffer, unsigned int nwords);
+
+/* Interrupt handling */
+
+#ifndef CONFIG_SPI_POLLWAIT
+static int    spi_interrupt(int irq, void *context, FAR void *arg);
+#endif
+
+/* SPI methods */
+
+static int    spi_lock(FAR struct spi_dev_s *dev, bool lock);
+static void   spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
+                         bool selected);
+static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev,
+                                 uint32_t frequency);
+static void   spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
+static void   spi_setbits(FAR struct spi_dev_s *dev, int nbits);
+static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd);
+static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
+#ifdef CONFIG_SPI_CMDDATA
+static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
+                       bool cmd);
+#endif
+#ifdef CONFIG_SPI_EXCHANGE
+static void   spi_exchange(FAR struct spi_dev_s *dev,
+                           FAR const void *txbuffer,
+                           FAR void *rxbuffer, size_t nwords);
+#else
+static void   spi_sndblock(FAR struct spi_dev_s *dev,
+                           FAR const void *buffer, size_t nwords);
+static void   spi_recvblock(FAR struct spi_dev_s *dev,
+                            FAR void *buffer, size_t nwords);
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Common SPI operations */
+
+static const struct spi_ops_s g_spiops =
+{
+  .lock         = spi_lock,
+  .select       = spi_select,       /* Provided externally by board logic */
+  .setfrequency = spi_setfrequency,
+  .setmode      = spi_setmode,
+  .setbits      = spi_setbits,
+#ifdef CONFIG_SPI_HWFEATURES
+  .hwfeatures   = 0,                /* Not supported */
+#endif
+  .status       = spi_status,       /* Provided externally by board logic */
+#ifdef CONFIG_SPI_CMDDATA
+  .cmddata      = spi_cmddata,
+#endif
+  .send         = spi_send,
+#ifdef CONFIG_SPI_EXCHANGE
+  .exchange     = spi_exchange,
+#else
+  .sndblock     = spi_sndblock,
+  .recvblock    = spi_recvblock,
+#endif
+};
+
+/* This supports is up to five SPI busses/ports */
+
+static struct imx_spidev_s g_spidev[] =
+{
+#ifdef CONFIG_IMX6_ECSPI1
+    {
+      .ops     = &g_spiops,
+      .base    = IMX_ECSPI1_VBASE,
+      .spindx  = SPI1_NDX,
+#ifndef CONFIG_SPI_POLLWAIT
+      .irq     = IMX_IRQ_ECSPI1,
+#endif
+      .select  = imx_spi1select,
+      .status  = imx_spi1status,
+#ifdef CONFIG_SPI_CMDDATA
+      .cmddata = imx_spi1cmddata,
+#endif
+    }
+#endif
+
+#ifdef CONFIG_IMX6_ECSPI2
+  , {
+      .ops     = &g_spiops,
+      .base    = IMX_ECSPI2_VBASE,
+      .spindx  = SPI2_NDX,
+#ifndef CONFIG_SPI_POLLWAIT
+      .irq     = IMX_IRQ_ECSPI2,
+#endif
+      .select  = imx_spi2select,
+      .status  = imx_spi2status,
+#ifdef CONFIG_SPI_CMDDATA
+      .cmddata = imx_spi2cmddata,
+#endif
+    }
+#endif
+
+#ifdef CONFIG_IMX6_ECSPI3
+  , {
+      .ops     = &g_spiops,
+      .base    = IMX_ECSPI3_VBASE,
+      .spindx  = SPI3_NDX,
+#ifndef CONFIG_SPI_POLLWAIT
+      .irq     = IMX_IRQ_ECSPI3,
+#endif
+      .select  = imx_spi3select,
+      .status  = imx_spi3status,
+#ifdef CONFIG_SPI_CMDDATA
+      .cmddata = imx_spi3cmddata,
+#endif
+    }
+#endif
+
+#ifdef CONFIG_IMX6_ECSPI4
+  , {
+      .ops     = &g_spiops,
+      .base    = IMX_ECSPI4_VBASE,
+      .spindx  = SPI4_NDX,
+#ifndef CONFIG_SPI_POLLWAIT
+      .irq     = IMX_IRQ_ECSPI4,
+#endif
+      .select  = imx_spi4select,
+      .status  = imx_spi4status,
+#ifdef CONFIG_SPI_CMDDATA
+      .cmddata = imx_spi4cmddata,
+#endif
+    }
+#endif
+
+#ifdef CONFIG_IMX6_ECSPI5
+  , {
+      .ops     = &g_spiops,
+      .base    = IMX_ECSPI5_VBASE,
+      .spindx  = SPI5_NDX,
+#ifndef CONFIG_SPI_POLLWAIT
+      .irq     = IMX_IRQ_ECSPI5,
+#endif
+      .select  = imx_spi5select,
+      .status  = imx_spi5status,
+#ifdef CONFIG_SPI_CMDDATA
+      .cmddata = imx_spi5cmddata,
+#endif
+    }
+#endif
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: spi_getreg
+ *
+ * Description:
+ *   Read the SPI register at this offeset
+ *
+ * Input Parameters:
+ *   priv   - Device-specific state data
+ *   offset - Offset to the SPI register from the register base address
+ *
+ * Returned Value:
+ *   Value of the register at this offset
+ *
+ ****************************************************************************/
+
+static inline uint32_t spi_getreg(struct imx_spidev_s *priv, unsigned int offset)
+{
+  return getreg32(priv->base + offset);
+}
+
+/****************************************************************************
+ * Name: spi_putreg
+ *
+ * Description:
+ *   Write the value to the SPI register at this offeset
+ *
+ * Input Parameters:
+ *   priv   - Device-specific state data
+ *   offset - Offset to the SPI register from the register base address
+ *   value  - Value to write
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static inline void spi_putreg(struct imx_spidev_s *priv, unsigned int offset, uint32_t value)
+{
+  putreg32(value, priv->base + offset);
+}
+
+/****************************************************************************
+ * Name: spi_txnull, spi_txuint16, and spi_txuint8
+ *
+ * Description:
+ *   Transfer all ones, a uint8_t, or uint16_t to Tx FIFO and update the txbuffer
+ *   pointer appropriately.  The selected function dependes on (1) if there
+ *   is a source txbuffer provided, and (2) if the number of bits per
+ *   word is <=8 or >8.
+ *
+ * Input Parameters:
+ *   priv   - Device-specific state data
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void spi_txnull(struct imx_spidev_s *priv)
+{
+  spi_putreg(priv, ECSPI_TXDATA_OFFSET, 0xffff);
+}
+
+static void spi_txuint16(struct imx_spidev_s *priv)
+{
+  uint16_t *ptr = (uint16_t *)priv->txbuffer;
+  spi_putreg(priv, ECSPI_TXDATA_OFFSET, *ptr++);
+  priv->txbuffer = (void *)ptr;
+}
+
+static void spi_txuint8(struct imx_spidev_s *priv)
+{
+  uint8_t *ptr = (uint8_t *)priv->txbuffer;
+  spi_putreg(priv, ECSPI_TXDATA_OFFSET, *ptr++);
+  priv->txbuffer = (void *)ptr;
+}
+
+/****************************************************************************
+ * Name: spi_rxnull,spi_rxuint16, and spi_rxuint8
+ *
+ * Description:
+ *   Discard input, save a uint8_t, or or save a uint16_t from Tx FIFO in the
+ *   user rxvbuffer and update the rxbuffer pointer appropriately.  The
+ *   selected function dependes on (1) if there is a desination rxbuffer
+ *   provided, and (2) if the number of bits per word is <=8 or >8.
+ *
+ * Input Parameters:
+ *   priv   - Device-specific state data
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void spi_rxnull(struct imx_spidev_s *priv)
+{
+  (void)spi_getreg(priv, ECSPI_RXDATA_OFFSET);
+}
+
+static void spi_rxuint16(struct imx_spidev_s *priv)
+{
+  uint16_t *ptr = (uint16_t *)priv->rxbuffer;
+  *ptr++ = (uint16_t)spi_getreg(priv, ECSPI_TXDATA_OFFSET);
+  priv->rxbuffer = (void *)ptr;
+}
+
+static void spi_rxuint8(struct imx_spidev_s *priv)
+{
+  uint8_t *ptr = (uint8_t *)priv->rxbuffer;
+  *ptr++ = (uint8_t)spi_getreg(priv, ECSPI_TXDATA_OFFSET);
+  priv->rxbuffer = (void *)ptr;
+}
+
+/****************************************************************************
+ * Name: spi_performtx
+ *
+ * Description:
+ *   If the Tx FIFO is empty, then transfer as many words as we can to
+ *   the FIFO.
+ *
+ * Input Parameters:
+ *   priv   - Device-specific state data
+ *
+ * Returned Value:
+ *   The number of words written to the Tx FIFO (a value from 0 to 8,
+ *   inclusive).
+ *
+ ****************************************************************************/
+
+static int spi_performtx(struct imx_spidev_s *priv)
+{
+  uint32_t regval;
+  int ntxd = 0;  /* Number of words written to Tx FIFO */
+
+  /* Check if the Tx FIFO is empty */
+
+  if ((spi_getreg(priv, ECSPI_STATREG_OFFSET) & ECSPI_INT_TE) != 0)
+    {
+      /* Check if all of the Tx words have been sent */
+
+      if (priv->ntxwords > 0)
+        {
+          /* No.. Transfer more words until either the TxFIFO is full or
+           * until all of the user provided data has been sent.
+           */
+
+          for (; ntxd < priv->ntxwords && ntxd < IMX_TXFIFO_WORDS; ntxd++)
+            {
+               priv->txword(priv);
+            }
+
+          /* Update the count of words to to transferred */
+
+          priv->ntxwords -= ntxd;
+        }
+      else
+        {
+          /* Yes.. The transfer is complete, disable Tx FIFO empty interrupt */
+
+          regval = spi_getreg(priv, ECSPI_INTREG_OFFSET);
+          regval &= ~ECSPI_INT_TE;
+          spi_putreg(priv, ECSPI_INTREG_OFFSET, regval);
+        }
+    }
+  return ntxd;
+}
+
+/****************************************************************************
+ * Name: spi_performrx
+ *
+ * Description:
+ *   Transfer as many bytes as possible from the Rx FIFO to the user Rx
+ *   buffer (if one was provided).
+ *
+ * Input Parameters:
+ *   priv   - Device-specific state data
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static inline void spi_performrx(struct imx_spidev_s *priv)
+{
+  /* Loop while data is available in the Rx FIFO */
+
+  while ((spi_getreg(priv, ECSPI_STATREG_OFFSET) & ECSPI_INT_RR) != 0)
+    {
+      /* Have all of the requested words been transferred from the Rx FIFO? */
+
+      if (priv->nrxwords < priv->nwords)
+        {
+          /* No.. Read more data from Rx FIFO */
+
+          priv->rxword(priv);
+          priv->nrxwords++;
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: spi_startxfr
+ *
+ * Description:
+ *   If data was added to the Tx FIFO, then start the exchange
+ *
+ * Input Parameters:
+ *   priv  - Device-specific state data
+ *   ntxd  - The number of bytes added to the Tx FIFO by spi_performtx.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void spi_startxfr(struct imx_spidev_s *priv, int ntxd)
+{
+  uint32_t regval;
+
+  /* The XCH bit initiates an exchange in master mode.  It remains set
+   * remains set while the exchange is in progress but is automatically
+   * clear when all data in the Tx FIFO and shift register are shifted out.
+   * So if we have added data to the Tx FIFO on this interrupt, we must
+   * set the XCH bit to resume the exchange.
+   */
+
+  if (ntxd > 0)
+    {
+      regval = spi_getreg(priv, ECSPI_CONREG_OFFSET);
+      regval |= ECSPI_CONREG_XCH;
+      spi_putreg(priv, ECSPI_CONREG_OFFSET, regval);
+    }
+}
+
+/****************************************************************************
+ * Name: spi_transfer
+ *
+ * Description:
+ *   Exchange a block data with the SPI device
+ *
+ * Input Parameters:
+ *   priv   - Device-specific state data
+ *   txbuffer - The buffer of data to send to the device (may be NULL).
+ *   rxbuffer - The buffer to receive data from the device (may be NULL).
+ *   nwords   - The total number of words to be exchanged.  If the interface
+ *              uses <= 8 bits per word, then this is the number of uint8_t's;
+ *              if the interface uses >8 bits per word, then this is the
+ *              number of uint16_t's
+ *
+ * Returned Value:
+ *   0: success, <0:Negated error number on failure
+ *
+ ****************************************************************************/
+
+static int spi_transfer(struct imx_spidev_s *priv, const void *txbuffer,
+                        void *rxbuffer, unsigned int nwords)
+{
+#ifndef CONFIG_SPI_POLLWAIT
+  irqstate_t flags;
+  uint32_t regval;
+  int ret;
+#endif
+  int ntxd;
+
+  /* Set up to perform the transfer */
+
+  priv->txbuffer     = (uint8_t *)txbuffer; /* Source buffer */
+  priv->rxbuffer     = (uint8_t *)rxbuffer; /* Destination buffer */
+  priv->ntxwords     = nwords;              /* Number of words left to send */
+  priv->nrxwords     = 0;                   /* Number of words received */
+  priv->nwords       = nwords;              /* Total number of exchanges */
+
+  /* Set up the low-level data transfer function pointers */
+
+  if (priv->nbits > 8)
+    {
+      priv->txword = spi_txuint16;
+      priv->rxword = spi_rxuint16;
+    }
+  else
+    {
+      priv->txword = spi_txuint8;
+      priv->rxword = spi_rxuint8;
+    }
+
+  if (!txbuffer)
+    {
+      priv->txword = spi_txnull;
+    }
+
+  if (!rxbuffer)
+    {
+      priv->rxword = spi_rxnull;
+    }
+
+  /* Prime the Tx FIFO to start the sequence (saves one interrupt) */
+
+#ifndef CONFIG_SPI_POLLWAIT
+  flags = enter_critical_section();
+  ntxd  = spi_performtx(priv);
+  spi_startxfr(priv, ntxd);
+
+  /* Enable transmit empty interrupt */
+
+  regval  = spi_getreg(priv, ECSPI_INTREG_OFFSET);
+  regval |= ECSPI_INT_TE;
+  spi_putreg(priv, ECSPI_INTREG_OFFSET, regval);
+  leave_critical_section(flags);
+
+  /* Wait for the transfer to complete.  Since there is no handshake
+   * with SPI, the following should complete even if there are problems
+   * with the transfer, so it should be safe with no timeout.
+   */
+
+  do
+    {
+      /* Wait to be signaled from the interrupt handler */
+
+      ret = sem_wait(&priv->waitsem);
+    }
+  while (ret < 0 && errno == EINTR);
+
+#else
+  /* Perform the transfer using polling logic.  This will totally
+   * dominate the CPU until the transfer is complete.  Only recommended
+   * if (1) your SPI is very fast, and (2) if you only use very short
+   * transfers.
+   */
+
+  do
+    {
+      /* Handle outgoing Tx FIFO transfers */
+
+      ntxd = spi_performtx(priv);
+
+      /* Handle incoming Rx FIFO transfers */
+
+      spi_performrx(priv);
+
+      /* Resume the transfer */
+
+      spi_startxfr(priv, ntxd);
+
+      /* If there are other threads at this same priority level,
+       * the following may help:
+       */
+
+      sched_yield();
+    }
+  while (priv->nrxwords < priv->nwords);
+#endif
+  return OK;
+}
+
+/****************************************************************************
+ * Name: spi_interrupt
+ *
+ * Description:
+ *   Common ECSPI interrupt handling logic
+ *
+ * Input Parameters:
+ *   priv   - Device-specific state data
+ *
+ * Returned Value:
+ *   0: success, <0:Negated error number on failure
+ *
+ ****************************************************************************/
+
+#ifndef CONFIG_SPI_POLLWAIT
+static int spi_interrupt(int irq, void *context, FAR void *arg)
+{
+  struct imx_spidev_s *priv = (struct imx_spidev_s *)arg;
+  int ntxd;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Handle outgoing Tx FIFO transfers */
+
+  ntxd = spi_performtx(priv);
+
+  /* Handle incoming Rx FIFO transfers */
+
+  spi_performrx(priv);
+
+  /* Resume the transfer */
+
+  spi_startxfr(priv, ntxd);
+
+  /* Check if the transfer is complete */
+
+  if (priv->nrxwords >= priv->nwords)
+    {
+      /* Yes, wake up the waiting thread */
+
+      sem_post(&priv->waitsem);
+    }
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: spi_lock
+ *
+ * Description:
+ *   On SPI busses where there are multiple devices, it will be necessary to
+ *   lock SPI to have exclusive access to the busses for a sequence of
+ *   transfers.  The bus should be locked before the chip is selected. After
+ *   locking the SPI bus, the caller should then also call the setfrequency,
+ *   setbits, and setmode methods to make sure that the SPI is properly
+ *   configured for the device.  If the SPI buss is being shared, then it
+ *   may have been left in an incompatible state.
+ *
+ * Input Parameters:
+ *   dev  - Device-specific state data
+ *   lock - true: Lock spi bus, false: unlock SPI bus
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
+{
+  struct imx_spidev_s *priv = (struct imx_spidev_s *)dev;
+
+  if (lock)
+    {
+      /* Take the semaphore (perhaps waiting) */
+
+      while (sem_wait(&priv->exclsem) != 0)
+        {
+          /* The only case that an error should occur here is if the wait
+           * was awakened by a signal.
+           */
+
+          DEBUGASSERT(errno == EINTR);
+        }
+    }
+  else
+    {
+      (void)sem_post(&priv->exclsem);
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: spi_select
+ *
+ * Description:
+ *   Enable/disable the SPI chip select.   The implementation of this method
+ *   must include handshaking:  If a device is selected, it must hold off
+ *   all other attempts to select the device until the device is deselected.
+ *   Required.
+ *
+ * Input Parameters:
+ *   dev -      Device-specific state data
+ *   devid -    Identifies the device to select
+ *   selected - true: slave selected, false: slave de-selected
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
+                       bool selected)
+{
+  struct imx_spidev_s *priv = (struct imx_spidev_s *)dev;
+
+  DEBUGASSERT(priv != NULL && priv->select != NULL);
+  priv->select(dev, devid, selected);
+}
+
+/****************************************************************************
+ * Name: spi_setfrequency
+ *
+ * Description:
+ *   Set the SPI frequency.
+ *
+ * Input Parameters:
+ *   dev -       Device-specific state data
+ *   frequency - The SPI frequency requested
+ *
+ * Returned Value:
+ *   Returns the actual frequency selected
+ *
+ ****************************************************************************/
+
+static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
+{
+  struct imx_spidev_s *priv = (struct imx_spidev_s *)dev;
+  uint32_t actual;
+
+  DEBUGASSERT(priv != NULL);
+  actual = priv->actual;
+
+  if (frequency != priv->frequency)
+    {
+      uint32_t freqbits;
+      uint32_t regval;
+
+      if (frequency >= IMX_PERCLK2_FREQ / 4)
+        {
+          freqbits = ECSPI_CONREG_DIV4;
+          actual   = IMX_PERCLK2_FREQ / 4;
+        }
+      else if (frequency >= IMX_PERCLK2_FREQ / 8)
+        {
+          freqbits = ECSPI_CONREG_DIV8;
+          actual   = IMX_PERCLK2_FREQ / 8;
+        }
+      else if (frequency >= IMX_PERCLK2_FREQ / 16)
+        {
+          freqbits = ECSPI_CONREG_DIV16;
+          actual   = IMX_PERCLK2_FREQ / 16;
+        }
+      else if (frequency >= IMX_PERCLK2_FREQ / 32)
+        {
+          freqbits = ECSPI_CONREG_DIV32;
+          actual   = IMX_PERCLK2_FREQ / 32;
+        }
+      else if (frequency >= IMX_PERCLK2_FREQ / 64)
+        {
+          freqbits = ECSPI_CONREG_DIV64;
+          actual   = IMX_PERCLK2_FREQ / 64;
+        }
+      else if (frequency >= IMX_PERCLK2_FREQ / 128)
+        {
+          freqbits = ECSPI_CONREG_DIV128;
+          actual   = IMX_PERCLK2_FREQ / 128;
+        }
+      else if (frequency >= IMX_PERCLK2_FREQ / 256)
+        {
+          freqbits = ECSPI_CONREG_DIV256;
+          actual   = IMX_PERCLK2_FREQ / 256;
+        }
+      else /* if (frequency >= IMX_PERCLK2_FREQ / 512) */
+        {
+          freqbits = ECSPI_CONREG_DIV512;
+          actual   = IMX_PERCLK2_FREQ / 512;
+        }
+
+      /* Then set the selected frequency */
+
+      regval = spi_getreg(priv, ECSPI_CONREG_OFFSET);
+      regval &= ~(ECSPI_CONREG_DATARATE_MASK);
+      regval |= freqbits;
+      spi_putreg(priv, ECSPI_CONREG_OFFSET, regval);
+
+      priv->frequency = frequency;
+      priv->actual    = actual;
+    }
+
+  return actual;
+}
+
+/****************************************************************************
+ * Name: spi_setmode
+ *
+ * Description:
+ *   Set the SPI mode. Optional.  See enum spi_mode_e for mode definitions
+ *
+ * Input Parameters:
+ *   dev -  Device-specific state data
+ *   mode - The SPI mode requested
+ *
+ * Returned Value:
+ *   none
+ *
+ ****************************************************************************/
+
+static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
+{
+  struct imx_spidev_s *priv = (struct imx_spidev_s *)dev;
+  if (priv && mode != priv->mode)
+    {
+      uint32_t modebits;
+      uint32_t regval;
+
+      /* Select the CTL register bits based on the selected mode */
+
+      switch (mode)
+        {
+        case SPIDEV_MODE0: /* CPOL=0 CHPHA=0 */
+          modebits = 0;
+          break;
+
+        case SPIDEV_MODE1: /* CPOL=0 CHPHA=1 */
+          modebits = ECSPI_CONREG_PHA;
+          break;
+
+        case SPIDEV_MODE2: /* CPOL=1 CHPHA=0 */
+          modebits = ECSPI_CONREG_POL;
+         break;
+
+        case SPIDEV_MODE3: /* CPOL=1 CHPHA=1 */
+          modebits = ECSPI_CONREG_PHA | ECSPI_CONREG_POL;
+          break;
+
+        default:
+          return;
+        }
+
+      /* Then set the selected mode */
+
+      regval = spi_getreg(priv, ECSPI_CONREG_OFFSET);
+      regval &= ~(ECSPI_CONREG_PHA | ECSPI_CONREG_POL);
+      regval |= modebits;
+      spi_putreg(priv, ECSPI_CONREG_OFFSET, regval);
+    }
+}
+
+/****************************************************************************
+ * Name: spi_setbits
+ *
+ * Description:
+ *   Set the number of bits per word.
+ *
+ * Input Parameters:
+ *   dev -  Device-specific state data
+ *   nbits - The number of bits requests
+ *
+ * Returned Value:
+ *   none
+ *
+ ****************************************************************************/
+
+static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
+{
+  struct imx_spidev_s *priv = (struct imx_spidev_s *)dev;
+  if (priv && nbits != priv->nbits && nbits > 0 && nbits <= 16)
+    {
+      uint32_t regval = spi_getreg(priv, ECSPI_CONREG_OFFSET);
+      regval       &= ~ECSPI_CONREG_BITCOUNT_MASK;
+      regval       |= ((nbits - 1) << ECSPI_CONREG_BITCOUNT_SHIFT);
+      spi_putreg(priv, ECSPI_CONREG_OFFSET, regval);
+      priv->nbits   = nbits;
+    }
+}
+
+/****************************************************************************
+ * Name: spi_send
+ *
+ * Description:
+ *   Exchange one word on SPI
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   wd  - The word to send.  the size of the data is determined by the
+ *         number of bits selected for the SPI interface.
+ *
+ * Returned Value:
+ *   response
+ *
+ ****************************************************************************/
+
+static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
+{
+  struct imx_spidev_s *priv = (struct imx_spidev_s *)dev;
+  uint16_t response = 0;
+
+  (void)spi_transfer(priv, &wd, &response, 1);
+  return response;
+}
+
+/****************************************************************************
+ * Name: spi_status
+ *
+ * Description:
+ *   Get SPI/MMC status.  Optional.
+ *
+ * Input Parameters:
+ *   dev   - Device-specific state data
+ *   devid - Identifies the device to report status on
+ *
+ * Returned Value:
+ *   Returns a bitset of status values (see SPI_STATUS_* defines)
+ *
+ ****************************************************************************/
+
+static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  struct imx_spidev_s *priv = (struct imx_spidev_s *)dev;
+  uint8_t ret = 0;
+
+  DEBUGASSERT(priv != NULL);
+
+  if (priv->status != NULL);
+    {
+      ret = priv->select(dev, devid);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: spi_cmddata
+ *
+ * Description:
+ *   Some devices require and additional out-of-band bit to specify if the
+ *   next word sent to the device is a command or data. This is typical, for
+ *   example, in "9-bit" displays where the 9th bit is the CMD/DATA bit.
+ *   This function provides selection of command or data.
+ *
+ *   This "latches" the CMD/DATA state.  It does not have to be called before
+ *   every word is transferred; only when the CMD/DATA state changes.  This
+ *   method is required if CONFIG_SPI_CMDDATA is selected in the NuttX
+ *   configuration
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   cmd - TRUE: The following word is a command; FALSE: the following words
+ *         are data.
+ *
+ * Returned Value:
+ *   OK unless an error occurs.  Then a negated errno value is returned
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI_CMDDATA
+static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
+                       bool cmd)
+{
+  struct imx_spidev_s *priv = (struct imx_spidev_s *)dev;
+  int ret = -ENOSYS;
+
+  DEBUGASSERT(priv != NULL);
+
+  if (priv->cmddata != NULL);
+    {
+      ret = priv->cmddata(dev, devid, cmd);
+    }
+
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: SPI_EXCHANGE
+ *
+ * Description:
+ *   Exahange a block of data from SPI. Required.
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   buffer   - A pointer to the buffer of data to be sent
+ *   rxbuffer - A pointer to the buffer in which to recieve data
+ *   nwords   - the length of data that to be exchanged in units of words.
+ *              The wordsize is determined by the number of bits-per-word
+ *              selected for the SPI interface.  If nbits <= 8, the data is
+ *              packed into uint8_t's; if nbits >8, the data is packed into uint16_t's
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI_EXCHANGE
+static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
+                         FAR void *rxbuffer, size_t nwords)
+{
+  struct imx_spidev_s *priv = (struct imx_spidev_s *)dev;
+  (void)spi_transfer(priv, txbuffer, rxbuffer, nwords);
+}
+#endif
+
+/****************************************************************************
+ * Name: spi_sndblock
+ *
+ * Description:
+ *   Send a block of data on SPI
+ *
+ * Input Parameters:
+ *   dev -    Device-specific state data
+ *   buffer - A pointer to the buffer of data to be sent
+ *   nwords - the length of data to send from the buffer in number of words.
+ *            The wordsize is determined by the number of bits-per-word
+ *            selected for the SPI interface.  If nbits <= 8, the data is
+ *            packed into uint8_t's; if nbits >8, the data is packed into uint16_t's
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifndef CONFIG_SPI_EXCHANGE
+static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t nwords)
+{
+  struct imx_spidev_s *priv = (struct imx_spidev_s *)dev;
+  (void)spi_transfer(priv, buffer, NULL, nwords);
+}
+#endif
+
+/****************************************************************************
+ * Name: spi_recvblock
+ *
+ * Description:
+ *   Revice a block of data from SPI
+ *
+ * Input Parameters:
+ *   dev -    Device-specific state data
+ *   buffer - A pointer to the buffer in which to recieve data
+ *   nwords - the length of data that can be received in the buffer in number
+ *            of words.  The wordsize is determined by the number of bits-per-word
+ *            selected for the SPI interface.  If nbits <= 8, the data is
+ *            packed into uint8_t's; if nbits >8, the data is packed into uint16_t's
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifndef CONFIG_SPI_EXCHANGE
+static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nwords)
+{
+  struct imx_spidev_s *priv = (struct imx_spidev_s *)dev;
+  (void)spi_transfer(priv, NULL, buffer, nwords);
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: imx_spibus_initialize
+ *
+ * Description:
+ *   Initialize common parts the selected SPI port.  Initialization of
+ *   chip select GPIOs must have been performed by board specific logic
+ *   prior to calling this function.  Specifically:  GPIOs should have
+ *   been configured for output, and all chip selects disabled.
+ *
+ *   One GPIO, SS (PB2 on the eZ8F091) is reserved as a chip select.  However,
+ *   If multiple devices on on the bus, then multiple chip selects will be
+ *   required.  Theregore, all GPIO chip management is deferred to board-
+ *   specific logic.
+ *
+ * Input Parameter:
+ *   Port number (for hardware that has mutiple SPI interfaces)
+ *
+ * Returned Value:
+ *   Valid SPI device structre reference on succcess; a NULL on failure
+ *
+ ****************************************************************************/
+
+FAR struct spi_dev_s *imx_spibus_initialize(int port)
+{
+  struct imx_spidev_s *priv;
+  uint8_t regval;
+
+  /* Only the SPI1 interface is supported */
+
+  switch (port)
+    {
+#ifdef CONFIG_IMX6_ECSPI1
+    case 1:
+      /* Select SPI1 */
+
+      priv = &g_spidev[SPI1_NDX];
+
+      /* Configure SPI1 GPIOs (NOTE that SS is not initialized here, the
+       * logic in this file makes no assumptions about chip select)
+       */
+
+      imxgpio_configpfinput(GPIOC, 13);  /* Port C, pin 13: RDY */
+      imxgpio_configpfoutput(GPIOC, 14); /* Port C, pin 14: SCLK */
+      imxgpio_configpfinput(GPIOC, 16);  /* Port C, pin 16: MISO */
+      imxgpio_configpfoutput(GPIOC, 17); /* Port C, pin 17: MOSI */
+      break;
+#endif /* CONFIG_IMX6_ECSPI1 */
+
+#ifdef CONFIG_IMX6_ECSPI2
+    case 2:
+      /* Select SPI2 */
+
+      priv = &g_spidev[SPI2_NDX];
+
+      /* Configure SPI2 GPIOs */
+      /* SCLK: AIN of Port A, pin 0 -OR- AIN of Port D, pin 7 */
+
+#if 1
+      imxgpio_configoutput(GPIOA, 0); /* Set GIUS=1 OCR=0 DIR=OUT */
+#else
+      imxgpio_configoutput(GPIOD, 7); /* Set GIUS=1 OCR=0 DIR=OUT */
+#endif
+
+      /* SS: AIN of Port A, pin 17 -OR- AIN of Port D, pin 8.(NOTE that SS
+       * is not initialized here, the logic in this file makes no assumptions
+       * about chip select)
+       */
+
+      /* RXD: AOUT of Port A, pin 1 -OR- AOUT of Port D, pin 9 */
+
+#if 1
+      imxgpio_configinput(GPIOA, 1); /* Set GIUS=1 OCR=0 DIR=IN */
+
+      /* Select input from SPI2_RXD_0 pin (AOUT Port A, pin 1) */
+
+      regval = getreg32(IMX_SC_FMCR);
+      regval &= ~FMCR_SPI2_RXDSEL;
+      putreg32(regval, IMX_SC_FMCR);
+#else
+      imxgpio_configinput(GPIOD, 9); /* Set GIUS=1 OCR=0 DIR=IN */
+
+      /* Select input from SPI2_RXD_1 pin (AOUT Port D, pin 9) */
+
+      regval = getreg32(IMX_SC_FMCR);
+      regval |= FMCR_SPI2_RXDSEL;
+      putreg32(regval, IMX_SC_FMCR);
+#endif
+
+      /* TXD: BIN of Port D, pin 31 -OR- AIN of Port D, pin 10 */
+
+#if 1
+      imxgpio_configinput(GPIOD, 31);
+      imxgpio_ocrbin(GPIOD, 31);
+      imxgpio_dirout(GPIOD, 31);
+#else
+      imxgpio_configoutput(GPIOD, 10);
+#endif
+      break;
+#endif /* CONFIG_IMX6_ECSPI2 */
+
+    default:
+      return NULL;
+    }
+
+  /* Initialize the state structure */
+  /* Initialize Semaphores */
+
+#ifndef CONFIG_SPI_POLLWAIT
+  /* Initialize the semaphore that is used to wake up the waiting
+   * thread when the DMA transfer completes.  This semaphore is used for
+   * signaling and, hence, should not have priority inheritance enabled.
+   */
+
+   sem_init(&priv->waitsem, 0, 0);
+   sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
+#endif
+   sem_init(&priv->exclsem, 0, 1);
+
+  /* Initialize control register: min frequency, ignore ready, master mode, mode=0, 8-bit */
+
+  spi_putreg(priv, ECSPI_CONREG_OFFSET,
+             ECSPI_CONREG_DIV512 |                /* Lowest frequency */
+             ECSPI_CONREG_DRCTL_IGNRDY |          /* Ignore ready */
+             ECSPI_CONREG_MODE |                  /* Master mode */
+             (7 << ECSPI_CONREG_BITCOUNT_SHIFT)); /* 8-bit data */
+
+  /* Make sure state agrees with data */
+
+  priv->mode  = SPIDEV_MODE0;
+  priv->nbits = 8;
+
+  /* Set the initial clock frequency for identification mode < 400kHz */
+
+  spi_setfrequency((FAR struct spi_dev_s *)priv, 400000);
+
+  /* Enable interrupts on data ready (and certain error conditions */
+
+#ifndef CONFIG_SPI_POLLWAIT
+  spi_putreg(priv, ECSPI_INTREG_OFFSET,
+             ECSPI_INT_RR |                 /* RXFIFO Data Ready Interrupt Enable */
+             ECSPI_INT_RO |                 /* RXFIFO Overflow Interrupt Enable */
+             ECSPI_INT_BO);                 /* Bit Count Overflow Interrupt Enable */
+#else
+  spi_putreg(priv, ECSPI_INTREG_OFFSET, 0);      /* No interrupts */
+#endif
+
+  /* Set the clock source=bit clock and number of clocks inserted between
+   * transactions = 2.
+   */
+
+  spi_putreg(priv, ECSPI_PERIODREG_OFFSET, 2);
+
+  /* No DMA */
+
+  spi_putreg(priv, ECSPI_DMAREG_OFFSET, 0);
+
+  /* Attach the interrupt */
+
+#ifndef CONFIG_SPI_POLLWAIT
+  DEBUGVERIFY(irq_attach(priv->irq, spi_interrupt, priv));
+#endif
+
+  /* Enable SPI */
+
+  regval = spi_getreg(priv, ECSPI_CONREG_OFFSET);
+  regval |= ECSPI_CONREG_SPIEN;
+  spi_putreg(priv, ECSPI_CONREG_OFFSET, regval);
+
+  /* Enable SPI interrupts */
+
+#ifndef CONFIG_SPI_POLLWAIT
+  up_enable_irq(priv->irq);
+#endif
+  return (FAR struct spi_dev_s *)priv;
+}
+
+#endif /* NSPIS > 0 */
diff --git a/arch/arm/src/imx6/imx_gpio.h b/arch/arm/src/imx6/imx_gpio.h
index 2c3acd9abe28c35dc8baad9849f46c6fc9394e48..23ca29c318714cb886c366ae4b585b3e61684ef5 100644
--- a/arch/arm/src/imx6/imx_gpio.h
+++ b/arch/arm/src/imx6/imx_gpio.h
@@ -288,7 +288,7 @@ void imx_gpioirq_disable(int irq);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 int imx_dump_gpio(uint32_t pinset, const char *msg);
 #else
 #  define imx_dumpgpio(p,m)
diff --git a/arch/arm/src/imx6/imx_irq.c b/arch/arm/src/imx6/imx_irq.c
index e00a8e9527dfa0585a8760d097da4663353c8d45..b15a9a4e6ddbc7a707196b4e51390c3e47398d78 100644
--- a/arch/arm/src/imx6/imx_irq.c
+++ b/arch/arm/src/imx6/imx_irq.c
@@ -134,11 +134,11 @@ void up_irqinitialize(void)
   CURRENT_REGS = NULL;
 
 #ifndef CONFIG_SUPPRESS_INTERRUPTS
+#ifdef CONFIG_IMX6_PIO_IRQ
   /* Initialize logic to support a second level of interrupt decoding for
    * PIO pins.
    */
 
-#ifdef CONFIG_IMX6_PIO_IRQ
   imx_gpioirq_initialize();
 #endif
 
diff --git a/arch/arm/src/imx6/imx_lowputc.c b/arch/arm/src/imx6/imx_lowputc.c
index a6387e732168c2b2bda1cb45c3b4ab04fb0077a0..8bfabf7085641fb359bfd3555ebe96265224df57 100644
--- a/arch/arm/src/imx6/imx_lowputc.c
+++ b/arch/arm/src/imx6/imx_lowputc.c
@@ -584,7 +584,7 @@ int imx_uart_configure(uint32_t base, FAR const struct uart_config_s *config)
  *
  ************************************************************************************/
 
-#if defined(IMX_HAVE_UART) && defined(CONFIG_DEBUG)
+#if defined(IMX_HAVE_UART) && defined(CONFIG_DEBUG_FEATURES)
 void imx_lowputc(int ch)
 {
   /* Poll the TX fifo trigger level bit of the UART status register. When the TXFE
diff --git a/arch/arm/src/imx6/imx_lowputc.h b/arch/arm/src/imx6/imx_lowputc.h
index d487931dc63362a429f80b953a7255e818a04312..081f366ea7cb6e7ed1265001fedc0ff6800bffdb 100644
--- a/arch/arm/src/imx6/imx_lowputc.h
+++ b/arch/arm/src/imx6/imx_lowputc.h
@@ -105,7 +105,7 @@ int imx_uart_configure(uint32_t base, FAR const struct uart_config_s *config);
  *
  ************************************************************************************/
 
-#if defined(IMX_HAVE_UART) && defined(CONFIG_DEBUG)
+#if defined(IMX_HAVE_UART) && defined(CONFIG_DEBUG_FEATURES)
 void imx_lowputc(int ch);
 #else
 #  define imx_lowputc(ch)
diff --git a/arch/arm/src/imx6/imx_serial.c b/arch/arm/src/imx6/imx_serial.c
index a34d2f988adb1418456740d5d5c67aaaed2dc3b0..8ae64136b5257aeb5ba8b94a2fb80de896dea6e9 100644
--- a/arch/arm/src/imx6/imx_serial.c
+++ b/arch/arm/src/imx6/imx_serial.c
@@ -199,7 +199,6 @@
 
 struct imx_uart_s
 {
-  xcpt_t   handler;     /* Interrupt handler */
   uint32_t uartbase;    /* Base address of UART registers */
   uint32_t baud;        /* Configured baud */
   uint32_t ucr1;        /* Saved UCR1 value */
@@ -229,24 +228,7 @@ static int  imx_setup(struct uart_dev_s *dev);
 static void imx_shutdown(struct uart_dev_s *dev);
 static int  imx_attach(struct uart_dev_s *dev);
 static void imx_detach(struct uart_dev_s *dev);
-
-static int  imx_interrupt(struct uart_dev_s *dev);
-#ifdef CONFIG_IMX6_UART1
-static int  imx_uart1_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_IMX6_UART2
-static int  imx_uart2_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_IMX6_UART3
-static int  imx_uart3_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_IMX6_UART4
-static int  imx_uart4_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_IMX6_UART5
-static int  imx_uart5_interrupt(int irq, void *context);
-#endif
-
+static int  imx_interrupt(int irq, void *context, FAR void *arg);
 static int  imx_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  imx_receive(struct uart_dev_s *dev, uint32_t *status);
 static void imx_rxint(struct uart_dev_s *dev, bool enable);
@@ -317,7 +299,6 @@ static char g_uart5txbuffer[CONFIG_UART5_TXBUFSIZE];
 #ifdef CONFIG_IMX6_UART1
 static struct imx_uart_s g_uart1priv =
 {
-  .handler        = imx_uart1_interrupt,
   .uartbase       = IMX_UART1_VBASE,
   .baud           = CONFIG_UART1_BAUD,
   .irq            = IMX_IRQ_UART1,
@@ -348,7 +329,6 @@ static struct uart_dev_s g_uart1port =
 #ifdef CONFIG_IMX6_UART2
 static struct imx_uart_s g_uart2priv =
 {
-  .handler        = imx_uart2_interrupt,
   .uartbase       = IMX_UART2_VBASE,
   .baud           = CONFIG_UART2_BAUD,
   .irq            = IMX_IRQ_UART2,
@@ -377,7 +357,6 @@ static struct uart_dev_s g_uart2port =
 #ifdef CONFIG_IMX6_UART3
 static struct imx_uart_s g_uart3priv =
 {
-  .handler        = imx_uart3_interrupt,
   .uartbase       = IMX_UART3_REGISTER_BASE,
   .baud           = IMX_UART3_VBASE,
   .irq            = IMX_IRQ_UART3,
@@ -406,7 +385,6 @@ static struct uart_dev_s g_uart3port =
 #ifdef CONFIG_IMX6_UART4
 static struct imx_uart_s g_uart4priv =
 {
-  .handler        = imx_uart4_interrupt,
   .uartbase       = IMX_UART4_REGISTER_BASE,
   .baud           = IMX_UART4_VBASE,
   .irq            = IMX_IRQ_UART4,
@@ -435,7 +413,6 @@ static struct uart_dev_s g_uart4port =
 #ifdef CONFIG_IMX6_UART5
 static struct imx_uart_s g_uart5priv =
 {
-  .handler        = imx_uart5_interrupt,
   .uartbase       = IMX_UART5_REGISTER_BASE,
   .baud           = IMX_UART5_VBASE,
   .irq            = IMX_IRQ_UART5,
@@ -618,7 +595,7 @@ static int imx_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, priv->handler);
+  ret = irq_attach(priv->irq, imx_interrupt, priv);
   if (ret == OK)
     {
       /* Configure as a (high) level interrupt */
@@ -663,12 +640,16 @@ static void imx_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int imx_interrupt(struct uart_dev_s *dev)
+static int imx_interrupt(int irq, void *context, FAR void *arg)
 {
-  struct imx_uart_s *priv = (struct imx_uart_s *)dev->priv;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
+  struct imx_uart_s *priv;
   uint32_t usr1;
   int passes = 0;
 
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
+  priv = (struct imx_uart_s *)dev->priv;
+
   /* Loop until there are no characters to be transferred or,
    * until we have been looping for a long time.
    */
@@ -710,46 +691,6 @@ static int imx_interrupt(struct uart_dev_s *dev)
     }
 }
 
-/****************************************************************************
- * Name: imx_uart[n]_interrupt
- *
- * Description:
- *   UART-specific interrupt handlers just transfer control to the common
- *   UART interrupt handler, passing the relevant driver state structure.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_IMX6_UART1
-static int  imx_uart1_interrupt(int irq, void *context)
-{
-  return imx_interrupt(&g_uart1port);
-}
-#endif
-#ifdef CONFIG_IMX6_UART2
-static int  imx_uart2_interrupt(int irq, void *context)
-{
-  return imx_interrupt(&g_uart2port);
-}
-#endif
-#ifdef CONFIG_IMX6_UART3
-static int  imx_uart3_interrupt(int irq, void *context)
-{
-  return imx_interrupt(&g_uart3port);
-}
-#endif
-#ifdef CONFIG_IMX6_UART4
-static int  imx_uart4_interrupt(int irq, void *context)
-{
-  return imx_interrupt(&g_uart4port);
-}
-#endif
-#ifdef CONFIG_IMX6_UART5
-static int  imx_uart5_interrupt(int irq, void *context)
-{
-  return imx_interrupt(&g_uart5port);
-}
-#endif
-
 /****************************************************************************
  * Name: imx_ioctl
  *
diff --git a/arch/arm/src/imx6/imx_timerisr.c b/arch/arm/src/imx6/imx_timerisr.c
index 60f8864177fec17af9a72a58556c9cdd8b00d0b9..36cd8cced00fe9df360da1ef46fe94909cb38789 100644
--- a/arch/arm/src/imx6/imx_timerisr.c
+++ b/arch/arm/src/imx6/imx_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/imx6/imx_timerisr.c
  *
- *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -102,23 +102,19 @@
  ****************************************************************************/
 
 /****************************************************************************
- * Function:  up_output_compare
+ * Function:  imx_output_compare
  *
  * Description:
  *   Handle one pending output compare interrupt.
  *
  ****************************************************************************/
 
-static void up_output_compare(uint32_t sr, uint32_t of)
+static void imx_output_compare(uint32_t sr, uint32_t of)
 {
   /* Check for a pending output compare interrupt */
 
   if ((sr & of) != 0)
     {
-      /* Clear the pending output compare interrupt */
-
-      putreg32(of, IMX_GPT_SR);
-
       /* Process timer interrupt event */
 
       sched_process_timer();
@@ -126,11 +122,7 @@ static void up_output_compare(uint32_t sr, uint32_t of)
 }
 
 /****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  imx_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -138,19 +130,30 @@ static void up_output_compare(uint32_t sr, uint32_t of)
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int imx_timerisr(int irq, uint32_t *regs, FAR void *arg)
 {
-  /* Sample the SR (once) and process all pending output compare interrupt */
+  /* Sample the SR (once) */
 
   uint32_t sr = getreg32(IMX_GPT_SR);
-  up_output_compare(sr, GPT_INT_OF1);
-  up_output_compare(sr, GPT_INT_OF2);
-  up_output_compare(sr, GPT_INT_OF3);
+
+  /* Clear GPT status register */
+
+  putreg32(sr, IMX_GPT_SR);
+
+  /* Process all pending output compare interrupt */
+
+  imx_output_compare(sr, GPT_INT_OF1);
+  imx_output_compare(sr, GPT_INT_OF2);
+  imx_output_compare(sr, GPT_INT_OF3);
   return OK;
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -158,7 +161,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t regval;
   uint32_t cr;
@@ -257,7 +260,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(IMX_IRQ_GPT, (xcpt_t)up_timerisr);
+  (void)irq_attach(IMX_IRQ_GPT, (xcpt_t)imx_timerisr, NULL);
 
   /* Enable all three GPT output compare interrupts */
 
diff --git a/arch/arm/src/kinetis/Kconfig b/arch/arm/src/kinetis/Kconfig
index fdf54e1941c65fe4445f3d303201eba7b1f58ea2..271921a9ef6a5f720d50c5ba9c134375ec69bc3f 100644
--- a/arch/arm/src/kinetis/Kconfig
+++ b/arch/arm/src/kinetis/Kconfig
@@ -37,85 +37,266 @@ config ARCH_CHIP_MK20DX128VLH5
 config ARCH_CHIP_MK20DX64VLH7
 	bool "MK20DX64VLH7"
 	select ARCH_FAMILY_K20
+	select KINETIS_HAVE_I2C1
 
 config ARCH_CHIP_MK20DX128VLH7
 	bool "MK20DX128VLH7"
 	select ARCH_FAMILY_K20
+	select KINETIS_HAVE_I2C1
 
 config ARCH_CHIP_MK20DX256VLH7
 	bool "MK20DX256VLH7"
 	select ARCH_FAMILY_K20
+	select KINETIS_HAVE_I2C1
 
 config ARCH_CHIP_MK40N512VLQ100
 	bool "MK40N512VLQ100"
 	select ARCH_FAMILY_K40
+	select KINETIS_HAVE_I2C1
 
 config ARCH_CHIP_MK40N512VMD100
 	bool "MK40N512VMD100"
 	select ARCH_FAMILY_K40
+	select KINETIS_HAVE_I2C1
 
 config ARCH_CHIP_MK40X128VLQ100
 	bool "MK40X128VLQ100"
 	select ARCH_FAMILY_K40
+	select KINETIS_HAVE_I2C1
 
 config ARCH_CHIP_MK40X128VMD100
 	bool "MK40X128VMD100"
 	select ARCH_FAMILY_K40
+	select KINETIS_HAVE_I2C1
 
 config ARCH_CHIP_MK40X256VLQ100
 	bool "MK40X256VLQ100"
 	select ARCH_FAMILY_K40
+	select KINETIS_HAVE_I2C1
 
 config ARCH_CHIP_MK40X256VMD100
 	bool "MK40X256VMD100"
 	select ARCH_FAMILY_K40
+	select KINETIS_HAVE_I2C1
 
 config ARCH_CHIP_MK60N256VLQ100
 	bool "MK60N256VLQ100"
 	select ARCH_FAMILY_K60
+	select KINETIS_HAVE_I2C1
 
 config ARCH_CHIP_MK60N256VMD100
 	bool "MK60N256VMD100"
 	select ARCH_FAMILY_K60
+	select KINETIS_HAVE_I2C1
+	select KINETIS_HAVE_I2C2
 
 config ARCH_CHIP_MK60N512VLL100
 	bool "MK60N512VLL100"
 	select ARCH_FAMILY_K60
+	select KINETIS_HAVE_I2C1
+	select KINETIS_HAVE_I2C2
 
 config ARCH_CHIP_MK60N512VLQ100
 	bool "MK60N512VLQ100"
 	select ARCH_FAMILY_K60
+	select KINETIS_HAVE_I2C1
+	select KINETIS_HAVE_I2C2
 
 config ARCH_CHIP_MK60N512VMD100
 	bool "MK60N512VMD100"
 	select ARCH_FAMILY_K60
+	select KINETIS_HAVE_I2C1
+	select KINETIS_HAVE_I2C2
 
 config ARCH_CHIP_MK60X256VLQ100
 	bool "MK60X256VLQ100"
 	select ARCH_FAMILY_K60
+	select KINETIS_HAVE_I2C1
+	select KINETIS_HAVE_I2C2
 
 config ARCH_CHIP_MK60X256VMD100
 	bool "MK60X256VMD100"
 	select ARCH_FAMILY_K60
+	select KINETIS_HAVE_I2C1
+	select KINETIS_HAVE_I2C2
+
+config ARCH_CHIP_MK60FN1M0VLQ12
+	bool "MK60FN1M0VLQ12"
+	select ARCH_FAMILY_K60
+	select KINETIS_HAVE_I2C1
+	select KINETIS_HAVE_I2C2
+
+config ARCH_CHIP_MK64FN1M0VLL12
+	bool "MK64FN1M0VLL12"
+	select ARCH_FAMILY_K64
+	select KINETIS_HAVE_I2C1
+	select KINETIS_HAVE_I2C2
+	select KINETIS_HAVE_SPI1
+	select KINETIS_HAVE_SPI2
+
+config ARCH_CHIP_MK64FX512VLL12
+	bool "MK64FX512VLL12"
+	select ARCH_FAMILY_K64
+	select KINETIS_HAVE_I2C1
+	select KINETIS_HAVE_I2C2
+	select KINETIS_HAVE_SPI1
+	select KINETIS_HAVE_SPI2
+
+config ARCH_CHIP_MK64FX512VDC12
+	bool "MK64FX512VDC12"
+	select ARCH_FAMILY_K64
+	select KINETIS_HAVE_I2C1
+	select KINETIS_HAVE_I2C2
+	select KINETIS_HAVE_SPI1
+	select KINETIS_HAVE_SPI2
+
+config ARCH_CHIP_MK64FN1M0VDC12
+	bool "MK64FN1M0VDC12"
+	select ARCH_FAMILY_K64
+	select KINETIS_HAVE_I2C1
+	select KINETIS_HAVE_I2C2
+	select KINETIS_HAVE_SPI1
+	select KINETIS_HAVE_SPI2
+
+config ARCH_CHIP_MK64FX512VLQ12
+	bool "MK64FX512VLQ12"
+	select ARCH_FAMILY_K64
+	select KINETIS_HAVE_I2C1
+	select KINETIS_HAVE_I2C2
+	select KINETIS_HAVE_SPI1
+	select KINETIS_HAVE_SPI2
+
+config ARCH_CHIP_MK64FX512VMD12
+	bool "MK64FX512VMD12"
+	select ARCH_FAMILY_K64
+	select KINETIS_HAVE_I2C1
+	select KINETIS_HAVE_I2C2
+	select KINETIS_HAVE_SPI1
+	select KINETIS_HAVE_SPI2
+
+config ARCH_CHIP_MK64FN1M0VMD12
+	bool "MK64FN1M0VMD12"
+	select ARCH_FAMILY_K64
+	select KINETIS_HAVE_I2C1
+	select KINETIS_HAVE_I2C2
+	select KINETIS_HAVE_SPI1
+	select KINETIS_HAVE_SPI2
+
+config ARCH_CHIP_MK66FX1M0VMD18
+	bool "MK66FX1M0VMD18"
+	select ARCH_FAMILY_K66
+	select KINETIS_HAVE_I2C1
+	select KINETIS_HAVE_I2C2
+	select KINETIS_HAVE_I2C3
+	select KINETIS_HAVE_SPI1
+	select KINETIS_HAVE_SPI2
+
+config ARCH_CHIP_MK66FN2M0VMD18
+	bool "MK66FN2M0VMD18"
+	select ARCH_FAMILY_K66
+	select KINETIS_HAVE_I2C1
+	select KINETIS_HAVE_I2C2
+	select KINETIS_HAVE_I2C3
+	select KINETIS_HAVE_SPI1
+	select KINETIS_HAVE_SPI2
+
+config ARCH_CHIP_MK66FX1M0VLQ18
+	bool "MK66FX1M0VLQ18"
+	select ARCH_FAMILY_K66
+	select KINETIS_HAVE_I2C1
+	select KINETIS_HAVE_I2C2
+	select KINETIS_HAVE_I2C3
+	select KINETIS_HAVE_SPI1
+	select KINETIS_HAVE_SPI2
+
+config ARCH_CHIP_MK66FN2M0VLQ18
+	bool "MK66FN2M0VLQ18"
+	select ARCH_FAMILY_K66
+	select KINETIS_HAVE_I2C1
+	select KINETIS_HAVE_I2C2
+	select KINETIS_HAVE_I2C3
+	select KINETIS_HAVE_SPI1
+	select KINETIS_HAVE_SPI2
 
 endchoice
 
+# These "hidden" settings determine is a peripheral option is available for
+# the selection MCU
+
+config KINETIS_HAVE_UART5
+	bool
+	default n
+
+config KINETIS_HAVE_LPUART0
+	bool
+	default n
+
+config KINETIS_HAVE_LPUART1
+	bool
+	default n
+
+# When there are multiple instances of a device, these "hidden" settings
+# will automatically be selected and will represent the 'OR' of the
+# instances selected.
+
+config KINETIS_LPUART
+	bool
+	default n
+
+config KINETIS_UART
+	bool
+	default n
+	select MCU_SERIAL
+
 # Chip families
 
 config ARCH_FAMILY_K20
 	bool
 	default n
+	select KINETIS_HAVE_UART5
 
 config ARCH_FAMILY_K40
 	bool
 	default n
+	select KINETIS_HAVE_UART5
 
 config ARCH_FAMILY_K60
 	bool
 	default n
+	select KINETIS_HAVE_UART5
+
+config ARCH_FAMILY_K64
+	bool
+	default n
+	select KINETIS_HAVE_UART5
+
+config ARCH_FAMILY_K66
+	bool
+	default n
+	select KINETIS_HAVE_LPUART0
 
 menu "Kinetis Peripheral Support"
 
+config KINETIS_HAVE_I2C1
+	bool
+	default n
+
+config KINETIS_HAVE_I2C2
+	bool
+	default n
+
+config KINETIS_HAVE_I2C3
+	bool
+	default n
+
+config KINETIS_HAVE_SPI1
+	bool
+	default n
+
+config KINETIS_HAVE_SPI2
+	bool
+	default n
+
 config KINETIS_TRACE
 	bool "Trace"
 	default n
@@ -132,6 +313,7 @@ config KINETIS_UART0
 	bool "UART0"
 	default n
 	select UART0_SERIALDRIVER
+	select KINETIS_UART
 	---help---
 		Support UART0
 
@@ -139,6 +321,7 @@ config KINETIS_UART1
 	bool "UART1"
 	default n
 	select UART1_SERIALDRIVER
+	select KINETIS_UART
 	---help---
 		Support UART1
 
@@ -146,6 +329,7 @@ config KINETIS_UART2
 	bool "UART2"
 	default n
 	select UART2_SERIALDRIVER
+	select KINETIS_UART
 	---help---
 		Support UART2
 
@@ -153,6 +337,7 @@ config KINETIS_UART3
 	bool "UART3"
 	default n
 	select UART3_SERIALDRIVER
+	select KINETIS_UART
 	---help---
 		Support UART3
 
@@ -160,32 +345,55 @@ config KINETIS_UART4
 	bool "UART4"
 	default n
 	select UART4_SERIALDRIVER
+	select KINETIS_UART
 	---help---
 		Support UART4
 
 config KINETIS_UART5
 	bool "UART5"
 	default n
+	depends on KINETIS_HAVE_UART5
 	select UART5_SERIALDRIVER
+	select KINETIS_UART
 	---help---
 		Support UART5
 
+config KINETIS_LPUART0
+	bool "Low power LPUART0"
+	default n
+	depends on KINETIS_HAVE_LPUART0
+	select OTHER_UART_SERIALDRIVER
+	select KINETIS_LPUART
+	---help---
+		Support the low power UART0
+
+config KINETIS_LPUART1
+	bool "Low power LPUART1"
+	default n
+	depends on KINETIS_HAVE_LPUART1
+	select OTHER_UART_SERIALDRIVER
+	select KINETIS_LPUART
+	---help---
+		Support the low power UART1
+
 config KINETIS_ENET
 	bool "Ethernet"
 	default n
-	depends on ARCH_FAMILY_K60
-	select NET
+	depends on ARCH_FAMILY_K60 || ARCH_FAMILY_K64 || ARCH_FAMILY_K66
+	select ARCH_HAVE_PHY
 	select ARCH_HAVE_NETDEV_STATISTICS
+	select NET
+	select NETDEVICES
 	---help---
-		Support Ethernet (K60 only)
+		Support Ethernet (K6x only)
 
 config KINETIS_RNGB
 	bool "Random number generator"
 	default n
-	depends on ARCH_FAMILY_K60
+	depends on ARCH_FAMILY_K60 || ARCH_FAMILY_K64 || ARCH_FAMILY_K66
 	select ARCH_HAVE_RNG
 	---help---
-		Support the random number generator(K60 only)
+		Support the random number generator(K6x only)
 
 config KINETIS_FLEXCAN0
 	bool "FlexCAN0"
@@ -202,33 +410,57 @@ config KINETIS_FLEXCAN1
 config KINETIS_SPI0
 	bool "SPI0"
 	default n
+	select SPI
 	---help---
 		Support SPI0
 
 config KINETIS_SPI1
 	bool "SPI1"
 	default n
+	select SPI
+	depends on KINETIS_HAVE_SPI1
 	---help---
 		Support SPI1
 
 config KINETIS_SPI2
 	bool "SPI2"
 	default n
+	select SPI
+	depends on KINETIS_HAVE_SPI2
 	---help---
 		Support SPI2
 
 config KINETIS_I2C0
 	bool "I2C0"
 	default n
+	select I2C
 	---help---
 		Support I2C0
 
 config KINETIS_I2C1
 	bool "I2C1"
 	default n
+	select I2C
+	depends on KINETIS_HAVE_I2C1
 	---help---
 		Support I2C1
 
+config KINETIS_I2C2
+	bool "I2C2"
+	default n
+	select I2C
+	depends on KINETIS_HAVE_I2C2
+	---help---
+		Support I2C2
+
+config KINETIS_I2C3
+	bool "I2C3"
+	default n
+	select I2C
+	depends on KINETIS_HAVE_I2C3
+	---help---
+		Support I2C3
+
 config KINETIS_I2S
 	bool "I2S"
 	default n
@@ -296,6 +528,13 @@ config KINETIS_FTM2
 	---help---
 		Support FlexTimer 2
 
+config KINETIS_FTM3
+	bool "FTM3"
+	default n
+	depends on ARCH_FAMILY_K64 || ARCH_FAMILY_K66
+	---help---
+		Support FlexTimer 3
+
 config KINETIS_LPTIMER
 	bool "Low power timer (LPTIMER)"
 	default n
@@ -383,14 +622,104 @@ config KINETIS_PIT
 
 endmenu
 
-comment "Kinetis GPIO Interrupt Configuration"
+menu "Kinetis FTM PWM Configuration"
+	depends on KINETIS_FTM0 || KINETIS_FTM1 || KINETIS_FTM2 || KINETIS_FTM3
+
+config KINETIS_FTM0_PWM
+	bool "FTM0 PWM"
+	default n
+	depends on KINETIS_FTM0
+	---help---
+		Reserve timer 0 for use by PWM
+
+		Timer devices may be used for different purposes.  One special
+		purpose is to generate modulated outputs for such things as motor
+		control.  If KINETIS_FTM0 is defined then THIS following may also be
+		defined to indicate that the timer is intended to be used for pulsed
+		output modulation.
+
+config KINETIS_FTM0_CHANNEL
+	int "FTM0 PWM Output Channel"
+	default 0
+	range 0 7
+	depends on KINETIS_FTM0_PWM
+	---help---
+		If FTM0 is enabled for PWM usage, you also need specifies the timer output
+		channel {0,..,7}
+
+config KINETIS_FTM1_PWM
+	bool "FTM1 PWM"
+	default n
+	depends on KINETIS_FTM1
+	---help---
+		Reserve timer 1 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If KINETIS_FTM1
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+config KINETIS_FTM1_CHANNEL
+	int "FTM1 PWM Output Channel"
+	default 0
+	range 0 1
+	depends on KINETIS_FTM1_PWM
+	---help---
+		If FTM1 is enabled for PWM usage, you also need specifies the timer output
+		channel {0,..,1}
+
+config KINETIS_FTM2_PWM
+	bool "FTM2 PWM"
+	default n
+	depends on KINETIS_FTM2
+	---help---
+		Reserve timer 2 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If KINETIS_FTM2
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+config KINETIS_FTM2_CHANNEL
+	int "FTM2 PWM Output Channel"
+	default 0
+	range 0 1
+	depends on KINETIS_FTM2_PWM
+	---help---
+		If FTM2 is enabled for PWM usage, you also need specifies the timer output
+		channel {0,..,1}
+
+config KINETIS_FTM3_PWM
+	bool "FTM3 PWM"
+	default n
+	depends on KINETIS_FTM3
+	---help---
+		Reserve timer 3 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If KINETIS_FTM3
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+config KINETIS_FTM3_CHANNEL
+	int "FTM3 PWM Output Channel"
+	default 0
+	range 0 7
+	depends on KINETIS_FTM3_PWM
+	---help---
+		If FTM3 is enabled for PWM usage, you also need specifies the timer output
+		channel {0,..,7}
+
+endmenu # Kinetis FTM PWM Configuration
 
-config GPIO_IRQ
+menu "Kinetis GPIO Interrupt Configuration"
+
+config KINETIS_GPIOIRQ
 	bool "GPIO pin interrupts"
 	---help---
 		Enable support for interrupting GPIO pins
 
-if GPIO_IRQ
+if KINETIS_GPIOIRQ
 
 config KINETIS_PORTAINTS
 	bool "GPIOA interrupts"
@@ -418,55 +747,113 @@ config KINETIS_PORTEINTS
 		Enable support for 32 interrupts from GPIO port E pins
 
 endif
+endmenu # Kinetis GPIO Interrupt Configuration
 
-if KINETIS_ENET
-
-comment "Kinetis Ethernet Configuration"
+menu "Kinetis Ethernet Configuration"
+	depends on KINETIS_ENET
 
-config ENET_ENHANCEDBD
+config KINETIS_ENETENHANCEDBD
 	bool "Use enhanced buffer descriptors"
 	default n
 	---help---
 		Use enhanced, 32-byte buffer descriptors
 
-config ENET_NETHIFS
+config KINETIS_ENETNETHIFS
 	int "Number of Ethernet interfaces"
 	default 1
 	---help---
 		Number of Ethernet interfaces supported by the hardware.  Must be
 		one for now.
 
-config ENET_NRXBUFFERS
+config KINETIS_ENETNRXBUFFERS
 	int "Number of Ethernet Rx buffers"
 	default 6
 	---help---
 		Number of Ethernet Rx buffers to use.  The size of one buffer is
 		determined by NET_BUFSIZE
 
-config ENET_NTXBUFFERS
+config KINETIS_ENETNTXBUFFERS
 	int "Number of Ethernet Tx buffers"
 	default 2
 	---help---
 		Number of Ethernet Tx buffers to use. The size of one buffer is
 		determined by NET_BUFSIZE
 
-config ENET_PHYADDR
-	int "PHY address"
-	default 1
-	---help---
-		MII/RMII address of the PHY
-
-config ENET_USEMII
+config KINETIS_ENETUSEMII
 	bool "Use MII interface"
 	default n
 	---help---
 		The the MII PHY interface.  Default:  Use RMII interface
 
-endif
+config KINETIS_ENET_MDIOPULLUP
+	bool "MDIO pull-up"
+	default n
+	---help---
+		If there is no on-board pull-up resister on the MII/RMII MDIO line,
+		then this option may be selected in order to configure an internal
+		pull-up on MDIO.
 
-if KINETIS_SDHC
+config KINETIS_ENET_NORXER
+	bool "Suppress RXER"
+	default n
+	---help---
+		If selected, then the MII/RMII RXER output will be configured as a
+		GPIO and pulled low.
 
-comment "Kinetis SDHC Configuration"
+choice
+	prompt "RMII Clock Source"
+	default KINETIS_EMAC_RMIICLKEXTAL
+	depends on !KINETIS_ENETUSEMII && (ARCH_FAMILY_K64 || ARCH_FAMILY_K66)
+	---help---
+		The RMII clock can be selected between EXTAL or ENET_1588_CLKIN
+
+config KINETIS_EMAC_RMIICLKEXTAL
+	bool "Use EXTAL for RMII Clock"
+
+config KINETIS_EMAC_RMIICLK1588CLKIN
+	bool "Use ENET_1588_CLKIN for RMII Clock"
+
+endchoice # RMII Clock Source
+
+choice
+	prompt "Work queue"
+	default KINETIS_EMAC_LPWORK if SCHED_LPWORK
+	default KINETIS_EMAC_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the Ethernet driver.  If the
+		low priority work queue is available, then it should be used by the
+		driver.
+
+config KINETIS_EMAC_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
+
+config KINETIS_EMAC_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
+
+endchoice # Work queue
+endmenu # Kinetis Ethernet Configuration
+
+menu "Kinetis SDHC Configuration"
+	depends on KINETIS_SDHC
+
+config KINETIS_SDHC_DMA
+	bool "Support DMA data transfers"
+	default y
+	select SDIO_DMA
+	---help---
+		Support DMA data transfers.
+		Enable SD card DMA data transfers.  This is marginally optional.
+		For most usages, SD accesses will cause data overruns if used without
+		DMA.
+
+config KINETIS_SDHC_WIDTH_D1_ONLY
+	bool "Use D1 only"
+	default n
+	---help---
+		Select 1-bit transfer mode.  Default: 4-bit transfer mode.
 
 config KINETIS_SDHC_ABSFREQ
 	bool "Custom transfer frequencies"
@@ -497,30 +884,205 @@ config KINETIS_MMCXFR_FREQ
 config KINETIS_SD1BIT_FREQ
 	int "SD 1-bit transfer frequency"
 	default 20000000
-	depends on SDIO_WIDTH_D1_ONLY
+	depends on KINETIS_SDHC_WIDTH_D1_ONLY
 	---help---
 		Frequency to use for transferring data to/from an SD card using on a single data liune.
 
 config KINETIS_SD4BIT_FREQ
 	int "SD 4-bit transfer frequency"
 	default 20000000
-	depends on !SDIO_WIDTH_D1_ONLY
+	depends on !KINETIS_SDHC_WIDTH_D1_ONLY
 	---help---
 		Frequency to use for transferring data to/from an SD card using all four data lines.
 
 endif
+endmenu # Kinetis SDHC Configuration
 
-config KINETIS_SDHC_DMAPRIO
-	int "SDHC DMA priority"
-	depends on SDIO_DMA
-	---help---
-		SDHC DMA priority
-
-endif
+#
+# MCU serial peripheral driver?
+#
 
-comment "Kinetis UART Configuration"
+menu "Kinetis UART Configuration"
 
 config KINETIS_UARTFIFOS
 	bool "Enable UART0 FIFO"
 	default n
 	depends on KINETIS_UART0
+
+endmenu # Kinetis UART Configuration
+
+menu "Kinetis LPUART0 Configuration"
+	depends on KINETIS_LPUART0
+
+config LPUART0_RXBUFSIZE
+	int "Receive buffer size"
+	default 256
+	---help---
+		Characters are buffered as they are received. This specifies
+		the size of the receive buffer.
+
+config LPUART0_TXBUFSIZE
+	int "Transmit buffer size"
+	default 256
+	---help---
+		Characters are buffered before being sent.  This specifies
+		the size of the transmit buffer.
+
+config LPUART0_BAUD
+	int "BAUD rate"
+	default 115200
+	---help---
+		The configured BAUD of the UART.
+
+config LPUART0_BITS
+	int "Character size"
+	default 8
+	---help---
+		The number of bits.  Must be either 7 or 8.
+
+config LPUART0_PARITY
+	int "Parity setting"
+	range 0 2
+	default 0
+	---help---
+		0=no parity, 1=odd parity, 2=even parity
+
+config LPUART0_2STOP
+	int "use 2 stop bits"
+	default 0
+	---help---
+		1=Two stop bits
+
+config LPUART0_IFLOWCONTROL
+	bool "LPUART0 RTS flow control"
+	default n
+	select SERIAL_IFLOWCONTROL
+	---help---
+		Enable LPUART0 RTS flow control
+
+config LPUART0_OFLOWCONTROL
+	bool "LPUART0 CTS flow control"
+	default n
+	select SERIAL_OFLOWCONTROL
+	---help---
+		Enable LPUART0 CTS flow control
+
+config LPUART0_DMA
+	bool "LPUART0 DMA support"
+	default n
+	select SERIAL_DMA
+	---help---
+		Enable DMA transfers on LPUART0
+
+endmenu # Kinetis LPUART0 Configuration
+
+menu "Kinetis LPUART1 Configuration"
+	depends on KINETIS_LPUART1
+
+config LPUART1_RXBUFSIZE
+	int "Receive buffer size"
+	default 256
+	---help---
+		Characters are buffered as they are received. This specifies
+		the size of the receive buffer.
+
+config LPUART1_TXBUFSIZE
+	int "Transmit buffer size"
+	default 256
+	---help---
+		Characters are buffered before being sent.  This specifies
+		the size of the transmit buffer.
+
+config LPUART1_BAUD
+	int "BAUD rate"
+	default 115200
+	---help---
+		The configured BAUD of the UART.
+
+config LPUART1_BITS
+	int "Character size"
+	default 8
+	---help---
+		The number of bits.  Must be either 7 or 8.
+
+config LPUART1_PARITY
+	int "Parity setting"
+	range 0 2
+	default 0
+	---help---
+		0=no parity, 1=odd parity, 2=even parity
+
+config LPUART1_2STOP
+	int "use 2 stop bits"
+	default 0
+	---help---
+		1=Two stop bits
+
+config LPUART1_IFLOWCONTROL
+	bool "LPUART1 RTS flow control"
+	default n
+	select SERIAL_IFLOWCONTROL
+	---help---
+		Enable LPUART1 RTS flow control
+
+config LPUART1_OFLOWCONTROL
+	bool "LPUART1 CTS flow control"
+	default n
+	select SERIAL_OFLOWCONTROL
+	---help---
+		Enable LPUART1 CTS flow control
+
+config LPUART1_DMA
+	bool "LPUART1 DMA support"
+	default n
+	select SERIAL_DMA
+	---help---
+		Enable DMA transfers on LPUART1
+
+endmenu # Kinetis LPUART1 Configuration
+
+choice
+	prompt "Kinetis LPUART Serial Console"
+	default NO_LPUART_SERIAL_CONSOLE
+	depends on DEV_CONSOLE && KINETIS_LPUART
+
+config LPUART0_SERIAL_CONSOLE
+	bool "Use LPUART0 as the serial console"
+	depends on KINETIS_LPUART0
+	select OTHER_SERIAL_CONSOLE
+	---help---
+		Use the LPUART0 device as the serial console
+
+config LPUART1_SERIAL_CONSOLE
+	bool "Use LPUART1 as the serial console"
+	depends on KINETIS_LPUART1
+	select OTHER_SERIAL_CONSOLE
+	---help---
+		Use the LPUART1 device as the serial console
+
+config NO_LPUART_SERIAL_CONSOLE
+	bool "No LPUART serial console"
+	---help---
+		No serial LPUART based console OR some other serial device provides
+		the serial console
+
+endchoice # Kinetis LPUART Serial Console
+
+config KINETIS_MERGE_TTY
+	bool "Kinetis Merge TTY names for LPUARTS"
+	default n
+	depends on KINETIS_LPUART
+	---help---
+		Enable the merging of the TTY names when both LPUARTs and UARTs
+		are defined.  When enabled, all both LPUARTS and UART types will be
+		listed as dev/ttySn. When disabled, LPUARTS willbe listed as
+		/dev/ttyLPn and UARTs as /dev/ttySn see also (KINETS_LPUART_LOWEST)
+
+config KINETS_LPUART_LOWEST
+	bool "Kinetis Order ttySn LPUARTs before UARTS"
+	default n
+	depends on KINETIS_LPUART && KINETIS_UART
+	depends on KINETIS_MERGE_TTY
+	---help---
+		Used with KINETIS_MERGE_TTY, will set the order of ttySn assignments
+		Enabled will order the LPUART's before the UARTS.
diff --git a/arch/arm/src/kinetis/Make.defs b/arch/arm/src/kinetis/Make.defs
index c9c5ec6ca802c979bb4f056e4a6ff9b8e95ff2fd..6ee494c6526c29590b3fa14d2686f54f8a64c8bc 100644
--- a/arch/arm/src/kinetis/Make.defs
+++ b/arch/arm/src/kinetis/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # arch/arm/src/kinetis/Make.defs
 #
-#   Copyright (C) 2011, 2013-2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2011, 2013-2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -33,11 +33,14 @@
 #
 ############################################################################
 
-# The start-up, "head", file
-
+ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
+HEAD_ASRC =
+else
 HEAD_ASRC = kinetis_vectors.S
+endif
 
-# Common ARM and Cortex-M3 files
+CMN_UASRCS =
+CMN_UCSRCS =
 
 CMN_ASRCS  = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
 CMN_ASRCS += up_testset.S vfork.S
@@ -48,15 +51,24 @@ CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_modifyreg8.c
 CMN_CSRCS += up_modifyreg16.c up_modifyreg32.c up_releasestack.c
 CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c up_releasepending.c
 CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_unblocktask.c up_usestack.c
-CMN_CSRCS += up_doirq.c up_hardfault.c up_svcall.c up_checkstack.c up_vfork.c
+CMN_CSRCS += up_doirq.c up_hardfault.c up_svcall.c up_vfork.c
 CMN_CSRCS += up_systemreset.c
 
-ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
-CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
+CMN_CSRCS += up_stackcheck.c
 endif
 
-ifeq ($(CONFIG_ARCH_MEMCPY),y)
-CMN_ASRCS += up_memcpy.S
+ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
+ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
+CMN_ASRCS += up_lazyexception.S
+else
+CMN_ASRCS += up_exception.S
+endif
+CMN_CSRCS += up_vectors.c
+endif
+
+ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
+CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
@@ -67,6 +79,10 @@ CMN_UASRCS += up_signal_handler.S
 endif
 endif
 
+ifeq ($(CONFIG_STACK_COLORATION),y)
+CMN_CSRCS += up_checkstack.c
+endif
+
 # Use of common/up_etherstub.c is deprecated.  The preferred mechanism is to
 # use CONFIG_NETDEV_LATEINIT=y to suppress the call to up_netinitialize() in
 # up_initialize().  Then this stub would not be needed.
@@ -77,10 +93,17 @@ CMN_CSRCS += up_etherstub.c
 endif
 endif
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c
+ifeq ($(CONFIG_ARCH_FPU),y)
+CMN_ASRCS += up_fpu.S
+ifneq ($(CONFIG_ARMV7M_CMNVECTOR),y)
+CMN_CSRCS += up_copyarmstate.c
+else ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
+CMN_CSRCS += up_copyarmstate.c
+endif
+endif
+
+ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)
+CMN_CSRCS += up_itm_syslog.c
 endif
 
 # Required Kinetis files
@@ -90,7 +113,8 @@ CHIP_ASRCS  =
 CHIP_CSRCS  = kinetis_allocateheap.c kinetis_clockconfig.c
 CHIP_CSRCS += kinetis_clrpend.c kinetis_idle.c kinetis_irq.c
 CHIP_CSRCS += kinetis_lowputc.c kinetis_pin.c kinetis_pingpio.c
-CHIP_CSRCS += kinetis_serial.c kinetis_start.c kinetis_wdog.c
+CHIP_CSRCS += kinetis_serialinit.c kinetis_serial.c
+CHIP_CSRCS += kinetis_start.c kinetis_uid.c kinetis_wdog.c
 CHIP_CSRCS += kinetis_cfmconfig.c
 
 # Configuration-dependent Kinetis files
@@ -103,12 +127,12 @@ ifeq ($(CONFIG_BUILD_PROTECTED),y)
 CHIP_CSRCS += kinetis_userspace.c kinetis_mpuinit.c
 endif
 
-ifeq ($(CONFIG_GPIO_IRQ),y)
+ifeq ($(CONFIG_KINETIS_GPIOIRQ),y)
 CHIP_CSRCS += kinetis_pinirq.c
 endif
 
-ifeq ($(CONFIG_DEBUG_GPIO),y)
-CHIP_CSRCS += kinetis_pindbg.c
+ifeq ($(CONFIG_DEBUG_GPIO_INFO),y)
+CHIP_CSRCS += kinetis_pindump.c
 endif
 
 ifeq ($(CONFIG_KINETIS_SDHC),y)
@@ -127,6 +151,29 @@ ifeq ($(CONFIG_KINETIS_DMA),y)
 CHIP_CSRCS += kinetis_dma.c kinetis_pindma.c
 endif
 
+ifeq ($(CONFIG_PWM),y)
+CHIP_CSRCS += kinetis_pwm.c
+endif
+
+ifeq ($(CONFIG_PWM),y)
+CHIP_CSRCS += kinetis_dma.c
+endif
+
+ifeq ($(CONFIG_I2C),y)
+CHIP_CSRCS += kinetis_i2c.c
+endif
+
+ifeq ($(CONFIG_KINETIS_LPUART),y)
+CHIP_CSRCS += kinetis_lpserial.c
+endif
+
+ifeq ($(CONFIG_RTC),y)
+CHIP_CSRCS += kinetis_rtc.c
+ifeq ($(CONFIG_RTC_DRIVER),y)
+CHIP_CSRCS += kinetis_rtc_lowerhalf.c
+endif
+endif
+
 ifeq ($(CONFIG_NET),y)
 ifeq ($(CONFIG_KINETIS_ENET),y)
 CHIP_CSRCS += kinetis_enet.c
diff --git a/arch/arm/src/kinetis/chip.h b/arch/arm/src/kinetis/chip.h
index 0ed152bac2f52203fe3ac39ebe4a6a48b6eac622..c16f31b14d9b8f106289ca899f20a8a94673e01d 100644
--- a/arch/arm/src/kinetis/chip.h
+++ b/arch/arm/src/kinetis/chip.h
@@ -46,8 +46,17 @@
  * should then include this file for the proper setup.
  */
 
+#include 
 #include 
-#include "kinetis_memorymap.h"
+#include "chip/kinetis_memorymap.h"
+
+/* If the common ARMv7-M vector handling logic is used, then it expects the
+ * following definition in this file that provides the number of supported external
+ * interrupts which, for this architecture, is provided in the arch/stm32f7/chip.h
+ * header file.
+ */
+
+#define ARMV7M_PERIPHERAL_INTERRUPTS NR_INTERRUPTS
 
 /************************************************************************************
  * Pre-processor Definitions
diff --git a/arch/arm/src/kinetis/kinetis_adc.h b/arch/arm/src/kinetis/chip/kinetis_adc.h
similarity index 93%
rename from arch/arm/src/kinetis/kinetis_adc.h
rename to arch/arm/src/kinetis/chip/kinetis_adc.h
index a17aa06c7f4274ca8a612e933cafec3c43c9bd71..6b3b74fa9c32c51efdddcaa71d5b4bd7bbbbe0c7 100644
--- a/arch/arm/src/kinetis/kinetis_adc.h
+++ b/arch/arm/src/kinetis/chip/kinetis_adc.h
@@ -1,7 +1,7 @@
 /********************************************************************************************
- * arch/arm/src/kinetis/kinetis_adc.h
+ * arch/arm/src/kinetis/chip/kinetis_adc.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ********************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_ADC_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_ADC_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_ADC_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_ADC_H
 
 /********************************************************************************************
  * Included Files
@@ -70,7 +70,9 @@
 #define KINETIS_ADC_CLP2_OFFSET  0x0044 /* ADC plus-side general calibration value register */
 #define KINETIS_ADC_CLP1_OFFSET  0x0048 /* ADC plus-side general calibration value register */
 #define KINETIS_ADC_CLP0_OFFSET  0x004c /* ADC plus-side general calibration value register */
-#define KINETIS_ADC_PGA_OFFSET   0x0050 /* ADC PGA register */
+#ifndef KINETIS_K64
+#  define KINETIS_ADC_PGA_OFFSET 0x0050 /* ADC PGA register */
+#endif
 #define KINETIS_ADC_CLMD_OFFSET  0x0054 /* ADC minus-side general calibration value register */
 #define KINETIS_ADC_CLMS_OFFSET  0x0058 /* ADC minus-side general calibration value register */
 #define KINETIS_ADC_CLM4_OFFSET  0x005c /* ADC minus-side general calibration value register */
@@ -80,7 +82,7 @@
 #define KINETIS_ADC_CLM0_OFFSET  0x006c /* ADC minus-side general calibration value register */
 
 /* Register Addresses ***********************************************************************/
-# define KINETIS_ADC1_BASE      0x400bb000 /* Analog-to-digital converter (ADC) 1 */
+# define KINETIS_ADC1_BASE       0x400bb000 /* Analog-to-digital converter (ADC) 1 */
 
 #define KINETIS_ADC0_SC1A        (KINETIS_ADC0_BASE+KINETIS_ADC_SC1A_OFFSET)
 #define KINETIS_ADC0_SC1B        (KINETIS_ADC0_BASE+KINETIS_ADC_SC1B_OFFSET)
@@ -102,7 +104,9 @@
 #define KINETIS_ADC0_CLP2        (KINETIS_ADC0_BASE+KINETIS_ADC_CLP2_OFFSET)
 #define KINETIS_ADC0_CLP1        (KINETIS_ADC0_BASE+KINETIS_ADC_CLP1_OFFSET)
 #define KINETIS_ADC0_CLP0        (KINETIS_ADC0_BASE+KINETIS_ADC_CLP0_OFFSET)
-#define KINETIS_ADC0_PGA         (KINETIS_ADC0_BASE+KINETIS_ADC_PGA_OFFSET)
+#ifndef KINETIS_K64
+#  define KINETIS_ADC0_PGA       (KINETIS_ADC0_BASE+KINETIS_ADC_PGA_OFFSET)
+#endif
 #define KINETIS_ADC0_CLMD        (KINETIS_ADC0_BASE+KINETIS_ADC_CLMD_OFFSET)
 #define KINETIS_ADC0_CLMS        (KINETIS_ADC0_BASE+KINETIS_ADC_CLMS_OFFSET)
 #define KINETIS_ADC0_CLM4        (KINETIS_ADC0_BASE+KINETIS_ADC_CLM4_OFFSET)
@@ -131,7 +135,9 @@
 #define KINETIS_ADC1_CLP2        (KINETIS_ADC1_BASE+KINETIS_ADC_CLP2_OFFSET)
 #define KINETIS_ADC1_CLP1        (KINETIS_ADC1_BASE+KINETIS_ADC_CLP1_OFFSET)
 #define KINETIS_ADC1_CLP0        (KINETIS_ADC1_BASE+KINETIS_ADC_CLP0_OFFSET)
-#define KINETIS_ADC1_PGA         (KINETIS_ADC1_BASE+KINETIS_ADC_PGA_OFFSET)
+#ifndef KINETIS_K64
+#  define KINETIS_ADC1_PGA       (KINETIS_ADC1_BASE+KINETIS_ADC_PGA_OFFSET)
+#endif
 #define KINETIS_ADC1_CLMD        (KINETIS_ADC1_BASE+KINETIS_ADC_CLMD_OFFSET)
 #define KINETIS_ADC1_CLMS        (KINETIS_ADC1_BASE+KINETIS_ADC_CLMS_OFFSET)
 #define KINETIS_ADC1_CLM4        (KINETIS_ADC1_BASE+KINETIS_ADC_CLM4_OFFSET)
@@ -272,22 +278,26 @@
 #define ADC_CLP0_MASK             (0x3f)    /* Bits 0-5: Calibration value */
 
 /* ADC PGA register */
+
+#ifndef KINETIS_K64
                                             /* Bits 0-15: Reserved */
-#define ADC_PGA_PGAG_SHIFT        (16)      /* Bits 16-19: PGA gain setting*/
-#define ADC_PGA_PGAG_MASK         (15 << ADC_PGA_PGAG_SHIFT)
-#  define ADC_PGA_PGAG_1          (0 << ADC_PGA_PGAG_SHIFT)
-#  define ADC_PGA_PGAG_2          (1 << ADC_PGA_PGAG_SHIFT)
-#  define ADC_PGA_PGAG_4          (2 << ADC_PGA_PGAG_SHIFT)
-#  define ADC_PGA_PGAG_8          (3 << ADC_PGA_PGAG_SHIFT)
-#  define ADC_PGA_PGAG_16         (4 << ADC_PGA_PGAG_SHIFT)
-#  define ADC_PGA_PGAG_32         (5 << ADC_PGA_PGAG_SHIFT)
-#  define ADC_PGA_PGAG_64         (6 << ADC_PGA_PGAG_SHIFT)
-#ifdef KINETIS_K40
-#  define ADC_PGA_PGALP           (1 << 20) /* Bit 20:  PGA low-power mode control */
-#endif
+#  define ADC_PGA_PGAG_SHIFT      (16)      /* Bits 16-19: PGA gain setting*/
+#  define ADC_PGA_PGAG_MASK       (15 << ADC_PGA_PGAG_SHIFT)
+#    define ADC_PGA_PGAG_1        (0 << ADC_PGA_PGAG_SHIFT)
+#    define ADC_PGA_PGAG_2        (1 << ADC_PGA_PGAG_SHIFT)
+#    define ADC_PGA_PGAG_4        (2 << ADC_PGA_PGAG_SHIFT)
+#    define ADC_PGA_PGAG_8        (3 << ADC_PGA_PGAG_SHIFT)
+#    define ADC_PGA_PGAG_16       (4 << ADC_PGA_PGAG_SHIFT)
+#    define ADC_PGA_PGAG_32       (5 << ADC_PGA_PGAG_SHIFT)
+#    define ADC_PGA_PGAG_64       (6 << ADC_PGA_PGAG_SHIFT)
+#  ifdef KINETIS_K40
+#    define ADC_PGA_PGALP         (1 << 20) /* Bit 20:  PGA low-power mode control */
+#  endif
                                             /* Bits 21-22: Reserved */
-#define ADC_PGA_PGAEN             (1 << 23) /* Bit 23:  PGA enable*/
+#  define ADC_PGA_PGAEN           (1 << 23) /* Bit 23:  PGA enable*/
                                             /* Bits 24-31: Reserved */
+#endif
+
 /* ADC minus-side general calibration value registers */
 
 #define ADC_CLMD_MASK             (0x3f)    /* Bits 0-5: Calibration value */
@@ -310,4 +320,4 @@
  * Public Functions
  ********************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_ADC_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_ADC_H */
diff --git a/arch/arm/src/kinetis/kinetis_aips.h b/arch/arm/src/kinetis/chip/kinetis_aips.h
similarity index 87%
rename from arch/arm/src/kinetis/kinetis_aips.h
rename to arch/arm/src/kinetis/chip/kinetis_aips.h
index 8f460567f76125052a24664fdc02843624729dba..a8050fb61397771f32b90c52fe0387920e39f285 100644
--- a/arch/arm/src/kinetis/kinetis_aips.h
+++ b/arch/arm/src/kinetis/chip/kinetis_aips.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/kinetis/kinetis_aips.h
+ * arch/arm/src/kinetis/chip/kinetis_aips.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_AIPS_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_AIPS_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_AIPS_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_AIPS_H
 
 /************************************************************************************
  * Included Files
@@ -68,6 +68,9 @@
 #define KINETIS_AIPS_PACRN_OFFSET   0x0064 /* Peripheral Access Control Register */
 #define KINETIS_AIPS_PACRO_OFFSET   0x0068 /* Peripheral Access Control Register */
 #define KINETIS_AIPS_PACRP_OFFSET   0x006c /* Peripheral Access Control Register */
+#ifdef KINETIS_K64
+#  define KINETIS_AIPS_PACRU_OFFSET 0x0080 /* Peripheral Access Control Register */
+#endif
 
 /* Register Addresses ***************************************************************/
 
@@ -88,24 +91,30 @@
 #define KINETIS_AIPS0_PACRN         (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRN_OFFSET)
 #define KINETIS_AIPS0_PACRO         (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRO_OFFSET)
 #define KINETIS_AIPS0_PACRP         (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRP_OFFSET)
-
-#define KINETIS_AIPS1_MPRA          (KINETIS_AIPS0_BASE+KINETIS_AIPS_MPRA_OFFSET)
-#define KINETIS_AIPS1_PACRA         (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRA_OFFSET)
-#define KINETIS_AIPS1_PACRB         (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRB_OFFSET)
-#define KINETIS_AIPS1_PACRC         (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRC_OFFSET)
-#define KINETIS_AIPS1_PACRD         (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRD_OFFSET)
-#define KINETIS_AIPS1_PACRE         (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRE_OFFSET)
-#define KINETIS_AIPS1_PACRF         (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRF_OFFSET)
-#define KINETIS_AIPS1_PACRG         (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRG_OFFSET)
-#define KINETIS_AIPS1_PACRH         (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRH_OFFSET)
-#define KINETIS_AIPS1_PACRI         (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRI_OFFSET)
-#define KINETIS_AIPS1_PACRJ         (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRJ_OFFSET)
-#define KINETIS_AIPS1_PACRK         (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRK_OFFSET)
-#define KINETIS_AIPS1_PACRL         (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRL_OFFSET)
-#define KINETIS_AIPS1_PACRM         (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRM_OFFSET)
-#define KINETIS_AIPS1_PACRN         (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRN_OFFSET)
-#define KINETIS_AIPS1_PACRO         (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRO_OFFSET)
-#define KINETIS_AIPS1_PACRP         (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRP_OFFSET)
+#ifdef KINETIS_K64
+#  define KINETIS_AIPS0_PACRU       (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRU_OFFSET)
+#endif
+
+#define KINETIS_AIPS1_MPRA          (KINETIS_AIPS1_BASE+KINETIS_AIPS_MPRA_OFFSET)
+#define KINETIS_AIPS1_PACRA         (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRA_OFFSET)
+#define KINETIS_AIPS1_PACRB         (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRB_OFFSET)
+#define KINETIS_AIPS1_PACRC         (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRC_OFFSET)
+#define KINETIS_AIPS1_PACRD         (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRD_OFFSET)
+#define KINETIS_AIPS1_PACRE         (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRE_OFFSET)
+#define KINETIS_AIPS1_PACRF         (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRF_OFFSET)
+#define KINETIS_AIPS1_PACRG         (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRG_OFFSET)
+#define KINETIS_AIPS1_PACRH         (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRH_OFFSET)
+#define KINETIS_AIPS1_PACRI         (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRI_OFFSET)
+#define KINETIS_AIPS1_PACRJ         (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRJ_OFFSET)
+#define KINETIS_AIPS1_PACRK         (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRK_OFFSET)
+#define KINETIS_AIPS1_PACRL         (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRL_OFFSET)
+#define KINETIS_AIPS1_PACRM         (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRM_OFFSET)
+#define KINETIS_AIPS1_PACRN         (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRN_OFFSET)
+#define KINETIS_AIPS1_PACRO         (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRO_OFFSET)
+#define KINETIS_AIPS1_PACRP         (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRP_OFFSET)
+#ifdef KINETIS_K64
+#  define KINETIS_AIPS1_PACRU       (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRU_OFFSET)
+#endif
 
 /* Register Bit Definitions *********************************************************/
 
@@ -205,4 +214,4 @@
  * Public Functions
  ************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_AIPS_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_AIPS_H */
diff --git a/arch/arm/src/kinetis/kinetis_axbs.h b/arch/arm/src/kinetis/chip/kinetis_axbs.h
similarity index 98%
rename from arch/arm/src/kinetis/kinetis_axbs.h
rename to arch/arm/src/kinetis/chip/kinetis_axbs.h
index bf8543d4dac5a5dc5b13a4b110e447483d1dcdb7..7aab308593c3a3b56a32ef8c9703f55e4b9cec92 100644
--- a/arch/arm/src/kinetis/kinetis_axbs.h
+++ b/arch/arm/src/kinetis/chip/kinetis_axbs.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/kinetis/kinetis_axbs.h
+ * arch/arm/src/kinetis/chip/kinetis_axbs.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_AXBS_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_AXBS_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_AXBS_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_AXBS_H
 
 /************************************************************************************
  * Included Files
@@ -248,4 +248,4 @@
  * Public Functions
  ************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_AXBS_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_AXBS_H */
diff --git a/arch/arm/src/kinetis/kinetis_cmp.h b/arch/arm/src/kinetis/chip/kinetis_cmp.h
similarity index 96%
rename from arch/arm/src/kinetis/kinetis_cmp.h
rename to arch/arm/src/kinetis/chip/kinetis_cmp.h
index 822b7a339f5de9603af3e3236f03d1e5b47068ba..09e9eb19f6a9846b58fb0be5f686a1c0c49da08f 100644
--- a/arch/arm/src/kinetis/kinetis_cmp.h
+++ b/arch/arm/src/kinetis/chip/kinetis_cmp.h
@@ -1,7 +1,7 @@
 /********************************************************************************************
- * arch/arm/src/kinetis/kinetis_cmp.h
+ * arch/arm/src/kinetis/chip/kinetis_cmp.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ********************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_CMP_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_CMP_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_CMP_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_CMP_H
 
 /********************************************************************************************
  * Included Files
@@ -172,7 +172,9 @@
 #  define CMP_MUXCR_PSEL_IN5      (5 << CMP_MUXCR_PSEL_SHIFT)
 #  define CMP_MUXCR_PSEL_IN6      (6 << CMP_MUXCR_PSEL_SHIFT)
 #  define CMP_MUXCR_PSEL_IN7      (7 << CMP_MUXCR_PSEL_SHIFT)
-#define CMP_MUXCR_MEN             (1 << 6)  /* Bit 6:  MMUX Enable */
+#ifndef KINETIS_K64
+#  define CMP_MUXCR_MEN           (1 << 6)  /* Bit 6:  MMUX Enable */
+#endif
 #define CMP_MUXCR_PEN             (1 << 7)  /* Bit 7:  PMUX Enable */
 
 /********************************************************************************************
@@ -187,4 +189,4 @@
  * Public Functions
  ********************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_CMP_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_CMP_H */
diff --git a/arch/arm/src/kinetis/kinetis_cmt.h b/arch/arm/src/kinetis/chip/kinetis_cmt.h
similarity index 96%
rename from arch/arm/src/kinetis/kinetis_cmt.h
rename to arch/arm/src/kinetis/chip/kinetis_cmt.h
index c3c47bb6761254a0ce4c86484a43e41809433cdf..e86720db91e02a4d55df9c9baec355c9a51f152f 100644
--- a/arch/arm/src/kinetis/kinetis_cmt.h
+++ b/arch/arm/src/kinetis/chip/kinetis_cmt.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/kinetis/kinetis_cmt.h
+ * arch/arm/src/kinetis/chip/kinetis_cmt.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_CMT_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_CMT_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_CMT_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_CMT_H
 
 /************************************************************************************
  * Included Files
@@ -135,4 +135,4 @@
  * Public Functions
  ************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_CMT_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_CMT_H */
diff --git a/arch/arm/src/kinetis/kinetis_crc.h b/arch/arm/src/kinetis/chip/kinetis_crc.h
similarity index 85%
rename from arch/arm/src/kinetis/kinetis_crc.h
rename to arch/arm/src/kinetis/chip/kinetis_crc.h
index 7b590cf3a9a0c39374982f0c8b747da54bb71ccf..d2f0fc7fddb10ecae0286603b9d50c7f4139477f 100644
--- a/arch/arm/src/kinetis/kinetis_crc.h
+++ b/arch/arm/src/kinetis/chip/kinetis_crc.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/kinetis/kinetis_crc.h
+ * arch/arm/src/kinetis/chip/kinetis_crc.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_CRC_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_CRC_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_CRC_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_CRC_H
 
 /************************************************************************************
  * Included Files
@@ -52,13 +52,13 @@
 
 /* Register Offsets *****************************************************************/
 
-#define KINETIS_CRC_CRC_OFFSET    0x0000 /* CRC Data Register */
+#define KINETIS_CRC_DATA_OFFSET   0x0000 /* CRC Data Register */
 #define KINETIS_CRC_GPOLY_OFFSET  0x0004 /* CRC Polynomial Register */
 #define KINETIS_CRC_CTRL_OFFSET   0x0008 /* CRC Control Register */
 
 /* Register Addresses ***************************************************************/
 
-#define KINETIS_CRC_CRC           (KINETIS_CRC_BASE+KINETIS_CRC_CRC_OFFSET)
+#define KINETIS_CRC_DATA          (KINETIS_CRC_BASE+KINETIS_CRC_DATA_OFFSET)
 #define KINETIS_CRC_GPOLY         (KINETIS_CRC_BASE+KINETIS_CRC_GPOLY_OFFSET)
 #define KINETIS_CRC_CTRL          (KINETIS_CRC_BASE+KINETIS_CRC_CTRL_OFFSET)
 
@@ -66,14 +66,14 @@
 
 /* CRC Data Register (32-bit) */
 
-#define CRC_CRC_LL_SHIFT          (0)       /* Bits 0-7: CRC Low Lower Byte */
-#define CRC_CRC_LL_MASK           (0xff << CRC_CRC_LL_SHIFT)
-#define CRC_CRC_LU_SHIFT          (8)       /* Bits 8-15: CRC Low Upper Byte */
-#define CRC_CRC_LU_MASK           (0xff << CRC_CRC_LU_SHIFT)
-#define CRC_CRC_HL_SHIFT          (16)      /* Bits 16-23: CRC High Lower Byte */
-#define CRC_CRC_HL_MASK           (0xff << CRC_CRC_HL_SHIFT)
-#define CRC_CRC_HU_SHIFT          (24)      /* Bits 24-31: CRC High Upper Byte */
-#define CRC_CRC_HU_MASK           (0xff << CRC_CRC_HU_SHIFT)
+#define CRC_DATA_LL_SHIFT         (0)       /* Bits 0-7: CRC Low Lower Byte */
+#define CRC_DATA_LL_MASK          (0xff << CRC_DATA_LL_SHIFT)
+#define CRC_DATA_LU_SHIFT         (8)       /* Bits 8-15: CRC Low Upper Byte */
+#define CRC_DATA_LU_MASK          (0xff << CRC_DATA_LU_SHIFT)
+#define CRC_DATA_HL_SHIFT         (16)      /* Bits 16-23: CRC High Lower Byte */
+#define CRC_DATA_HL_MASK          (0xff << CRC_DATA_HL_SHIFT)
+#define CRC_DATA_HU_SHIFT         (24)      /* Bits 24-31: CRC High Upper Byte */
+#define CRC_DATA_HU_MASK          (0xff << CRC_DATA_HU_SHIFT)
 
 /* CRC Polynomial Register */
 
@@ -114,4 +114,4 @@
  ************************************************************************************/
 
 #endif /* KINETIS_NCRC && KINETIS_NCRC > 0 */
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_CRC_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_CRC_H */
diff --git a/arch/arm/src/kinetis/kinetis_dac.h b/arch/arm/src/kinetis/chip/kinetis_dac.h
similarity index 98%
rename from arch/arm/src/kinetis/kinetis_dac.h
rename to arch/arm/src/kinetis/chip/kinetis_dac.h
index 5c3b5c0c037503fc669c2427f5581f6b2322285d..bf2184382632158f1270fec96d536a0e9ff363d7 100644
--- a/arch/arm/src/kinetis/kinetis_dac.h
+++ b/arch/arm/src/kinetis/chip/kinetis_dac.h
@@ -1,7 +1,7 @@
 /********************************************************************************************
- * arch/arm/src/kinetis/kinetis_dac.h
+ * arch/arm/src/kinetis/chip/kinetis_dac.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ********************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_DACE_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_DACE_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DAC_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DAC_H
 
 /********************************************************************************************
  * Included Files
@@ -232,4 +232,4 @@
  * Public Functions
  ********************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_DACE_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DAC_H */
diff --git a/arch/arm/src/kinetis/chip/kinetis_dma.h b/arch/arm/src/kinetis/chip/kinetis_dma.h
new file mode 100644
index 0000000000000000000000000000000000000000..aec14d32f4fd5d7e88adf8082560486bbd608345
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_dma.h
@@ -0,0 +1,779 @@
+/****************************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_dma.h
+ *
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DMA_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DMA_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+/* Register Offsets *********************************************************************************/
+
+#define KINETIS_DMA_CR_OFFSET             0x0000 /* Control Register */
+#define KINETIS_DMA_ES_OFFSET             0x0004 /* Error Status Register */
+#define KINETIS_DMA_ERQ_OFFSET            0x000c /* Enable Request Register */
+#define KINETIS_DMA_EEI_OFFSET            0x0014 /* Enable Error Interrupt Register */
+#define KINETIS_DMA_CEEI_OFFSET           0x0018 /* Clear Enable Error Interrupt Register */
+#define KINETIS_DMA_SEEI_OFFSET           0x0019 /* Set Enable Error Interrupt Register */
+#define KINETIS_DMA_CERQ_OFFSET           0x001a /* Clear Enable Request Register */
+#define KINETIS_DMA_SERQ_OFFSET           0x001b /* Set Enable Request Register */
+#define KINETIS_DMA_CDNE_OFFSET           0x001c /* Clear DONE Status Bit Register */
+#define KINETIS_DMA_SSRT_OFFSET           0x001d /* Set START Bit Register */
+#define KINETIS_DMA_CERR_OFFSET           0x001e /* Clear Error Register */
+#define KINETIS_DMA_CINT_OFFSET           0x001f /* Clear Interrupt Request Register */
+#define KINETIS_DMA_INT_OFFSET            0x0024 /* Interrupt Request Register */
+#define KINETIS_DMA_ERR_OFFSET            0x002c /* Error Register */
+#define KINETIS_DMA_HRS_OFFSET            0x0034 /* Hardware Request Status Register */
+
+#define KINETIS_DMA_DCHPRI3_OFFSET        0x0100 /* Channel 3 Priority Register */
+#define KINETIS_DMA_DCHPRI2_OFFSET        0x0101 /* Channel 2 Priority Register */
+#define KINETIS_DMA_DCHPRI1_OFFSET        0x0102 /* Channel 1 Priority Register */
+#define KINETIS_DMA_DCHPRI0_OFFSET        0x0103 /* Channel 0 Priority Register */
+#define KINETIS_DMA_DCHPRI7_OFFSET        0x0104 /* Channel 7 Priority Register */
+#define KINETIS_DMA_DCHPRI6_OFFSET        0x0105 /* Channel 6 Priority Register */
+#define KINETIS_DMA_DCHPRI5_OFFSET        0x0106 /* Channel 5 Priority Register */
+#define KINETIS_DMA_DCHPRI4_OFFSET        0x0107 /* Channel 4 Priority Register */
+#define KINETIS_DMA_DCHPRI11_OFFSET       0x0108 /* Channel 11 Priority Register */
+#define KINETIS_DMA_DCHPRI10_OFFSET       0x0109 /* Channel 10 Priority Register */
+#define KINETIS_DMA_DCHPRI9_OFFSET        0x010a /* Channel 9 Priority Register */
+#define KINETIS_DMA_DCHPRI8_OFFSET        0x010b /* Channel 8 Priority Register */
+#define KINETIS_DMA_DCHPRI15_OFFSET       0x010c /* Channel 15 Priority Register */
+#define KINETIS_DMA_DCHPRI14_OFFSET       0x010d /* Channel 14 Priority Register */
+#define KINETIS_DMA_DCHPRI13_OFFSET       0x010e /* Channel 13 Priority Register */
+#define KINETIS_DMA_DCHPRI12_OFFSET       0x010f /* Channel 12 Priority Register */
+
+#ifndef KINETIS_K64
+#  define KINETIS_DMA_TCD_OFFSET(n)       (0x0000+((n) << 5))
+#  define KINETIS_DMA_TCD_SADDR_OFFSET    0x0000 /* TCD Source Address */
+#  define KINETIS_DMA_TCD_SOFF_OFFSET     0x0004 /* TCD Signed Source Address Offset */
+#  define KINETIS_DMA_TCD_ATTR_OFFSET     0x0006 /* TCD Transfer Attributes */
+#  define KINETIS_DMA_TCD_NBYTES_OFFSET   0x0008 /* TCD Minor Byte Count */
+#  define KINETIS_DMA_TCD_SLAST_OFFSET    0x000c /* TCD Last Source Address Adjustment */
+#  define KINETIS_DMA_TCD_DADDR_OFFSET    0x0010 /* TCD Destination Address */
+#  define KINETIS_DMA_TCD_DOFF_OFFSET     0x0014 /* TCD Signed Destination Address Offset */
+#  define KINETIS_DMA_TCD_CITER_OFFSET    0x0016 /* TCD Current Minor Loop Link, Major Loop Count */
+#  define KINETIS_DMA_TCD_DLASTSGA_OFFSET 0x0018 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#  define KINETIS_DMA_TCD_CSR_OFFSET      0x001c /* TCD Control and Status */
+#  define KINETIS_DMA_TCD_BITER_OFFSET    0x001e /* TCD Beginning Minor Loop Link, Major Loop Count */
+#endif
+
+#define KINETIS_DMA_TCD0_SADDR_OFFSET     0x0000 /* TCD Source Address */
+#define KINETIS_DMA_TCD0_SOFF_OFFSET      0x0004 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD0_ATTR_OFFSET      0x0006 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD0_NBYTES_OFFSET    0x0008 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD0_SLAST_OFFSET     0x000c /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD0_DADDR_OFFSET     0x0010 /* TCD Destination Address */
+#define KINETIS_DMA_TCD0_DOFF_OFFSET      0x0014 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD0_CITER_OFFSET     0x0016 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD0_DLASTSGA_OFFSET  0x0018 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD0_CSR_OFFSET       0x001c /* TCD Control and Status */
+#define KINETIS_DMA_TCD0_BITER_OFFSET     0x001e /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD1_SADDR_OFFSET     0x0020 /* TCD Source Address */
+#define KINETIS_DMA_TCD1_SOFF_OFFSET      0x0024 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD1_ATTR_OFFSET      0x0026 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD1_NBYTES_OFFSET    0x0028 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD1_SLAST_OFFSET     0x002c /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD1_DADDR_OFFSET     0x0030 /* TCD Destination Address */
+#define KINETIS_DMA_TCD1_DOFF_OFFSET      0x0034 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD1_CITER_OFFSET     0x0036 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD1_DLASTSGA_OFFSET  0x0038 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD1_CSR_OFFSET       0x003c /* TCD Control and Status */
+#define KINETIS_DMA_TCD1_BITER_OFFSET     0x003e /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD2_SADDR_OFFSET     0x0040 /* TCD Source Address */
+#define KINETIS_DMA_TCD2_SOFF_OFFSET      0x0044 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD2_ATTR_OFFSET      0x0046 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD2_NBYTES_OFFSET    0x0048 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD2_SLAST_OFFSET     0x004c /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD2_DADDR_OFFSET     0x0050 /* TCD Destination Address */
+#define KINETIS_DMA_TCD2_DOFF_OFFSET      0x0054 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD2_CITER_OFFSET     0x0056 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD2_DLASTSGA_OFFSET  0x0058 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD2_CSR_OFFSET       0x005c /* TCD Control and Status */
+#define KINETIS_DMA_TCD2_BITER_OFFSET     0x005e /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD3_SADDR_OFFSET     0x0060 /* TCD Source Address */
+#define KINETIS_DMA_TCD3_SOFF_OFFSET      0x0064 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD3_ATTR_OFFSET      0x0066 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD3_NBYTES_OFFSET    0x0068 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD3_SLAST_OFFSET     0x006c /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD3_DADDR_OFFSET     0x0070 /* TCD Destination Address */
+#define KINETIS_DMA_TCD3_DOFF_OFFSET      0x0074 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD3_CITER_OFFSET     0x0076 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD3_DLASTSGA_OFFSET  0x0078 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD3_CSR_OFFSET       0x007c /* TCD Control and Status */
+#define KINETIS_DMA_TCD3_BITER_OFFSET     0x007e /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD4_SADDR_OFFSET     0x0080 /* TCD Source Address */
+#define KINETIS_DMA_TCD4_SOFF_OFFSET      0x0084 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD4_ATTR_OFFSET      0x0086 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD4_NBYTES_OFFSET    0x0088 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD4_SLAST_OFFSET     0x008c /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD4_DADDR_OFFSET     0x0090 /* TCD Destination Address */
+#define KINETIS_DMA_TCD4_DOFF_OFFSET      0x0094 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD4_CITER_OFFSET     0x0096 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD4_DLASTSGA_OFFSET  0x0098 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD4_CSR_OFFSET       0x009c /* TCD Control and Status */
+#define KINETIS_DMA_TCD4_BITER_OFFSET     0x009e /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD5_SADDR_OFFSET     0x00a0 /* TCD Source Address */
+#define KINETIS_DMA_TCD5_SOFF_OFFSET      0x00a4 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD5_ATTR_OFFSET      0x00a6 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD5_NBYTES_OFFSET    0x00a8 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD5_SLAST_OFFSET     0x00ac /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD5_DADDR_OFFSET     0x00b0 /* TCD Destination Address */
+#define KINETIS_DMA_TCD5_DOFF_OFFSET      0x00b4 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD5_CITER_OFFSET     0x00b6 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD5_DLASTSGA_OFFSET  0x00b8 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD5_CSR_OFFSET       0x00bc /* TCD Control and Status */
+#define KINETIS_DMA_TCD5_BITER_OFFSET     0x00be /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD6_SADDR_OFFSET     0x00c0 /* TCD Source Address */
+#define KINETIS_DMA_TCD6_SOFF_OFFSET      0x00c4 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD6_ATTR_OFFSET      0x00c6 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD6_NBYTES_OFFSET    0x00c8 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD6_SLAST_OFFSET     0x00cc /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD6_DADDR_OFFSET     0x00d0 /* TCD Destination Address */
+#define KINETIS_DMA_TCD6_DOFF_OFFSET      0x00d4 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD6_CITER_OFFSET     0x00d6 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD6_DLASTSGA_OFFSET  0x00d8 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD6_CSR_OFFSET       0x00dc /* TCD Control and Status */
+#define KINETIS_DMA_TCD6_BITER_OFFSET     0x00de /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD7_SADDR_OFFSET     0x00e0 /* TCD Source Address */
+#define KINETIS_DMA_TCD7_SOFF_OFFSET      0x00e4 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD7_ATTR_OFFSET      0x00e6 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD7_NBYTES_OFFSET    0x00e8 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD7_SLAST_OFFSET     0x00ec /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD7_DADDR_OFFSET     0x00f0 /* TCD Destination Address */
+#define KINETIS_DMA_TCD7_DOFF_OFFSET      0x00f4 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD7_CITER_OFFSET     0x00f6 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD7_DLASTSGA_OFFSET  0x00f8 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD7_CSR_OFFSET       0x00fc /* TCD Control and Status */
+#define KINETIS_DMA_TCD7_BITER_OFFSET     0x00fe /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD8_SADDR_OFFSET     0x0100 /* TCD Source Address */
+#define KINETIS_DMA_TCD8_SOFF_OFFSET      0x0104 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD8_ATTR_OFFSET      0x0106 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD8_NBYTES_OFFSET    0x0108 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD8_SLAST_OFFSET     0x010c /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD8_DADDR_OFFSET     0x0110 /* TCD Destination Address */
+#define KINETIS_DMA_TCD8_DOFF_OFFSET      0x0114 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD8_CITER_OFFSET     0x0116 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD8_DLASTSGA_OFFSET  0x0118 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD8_CSR_OFFSET       0x011c /* TCD Control and Status */
+#define KINETIS_DMA_TCD8_BITER_OFFSET     0x011e /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD9_SADDR_OFFSET     0x0120 /* TCD Source Address */
+#define KINETIS_DMA_TCD9_SOFF_OFFSET      0x0124 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD9_ATTR_OFFSET      0x0126 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD9_NBYTES_OFFSET    0x0128 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD9_SLAST_OFFSET     0x012c /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD9_DADDR_OFFSET     0x0130 /* TCD Destination Address */
+#define KINETIS_DMA_TCD9_DOFF_OFFSET      0x0134 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD9_CITER_OFFSET     0x0136 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD9_DLASTSGA_OFFSET  0x0138 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD9_CSR_OFFSET       0x013c /* TCD Control and Status */
+#define KINETIS_DMA_TCD9_BITER_OFFSET     0x013e /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD10_SADDR_OFFSET    0x0140 /* TCD Source Address */
+#define KINETIS_DMA_TCD10_SOFF_OFFSET     0x0144 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD10_ATTR_OFFSET     0x0146 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD10_NBYTES_OFFSET   0x0148 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD10_SLAST_OFFSET    0x014c /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD10_DADDR_OFFSET    0x0150 /* TCD Destination Address */
+#define KINETIS_DMA_TCD10_DOFF_OFFSET     0x0154 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD10_CITER_OFFSET    0x0156 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD10_DLASTSGA_OFFSET 0x0158 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD10_CSR_OFFSET      0x015c /* TCD Control and Status */
+#define KINETIS_DMA_TCD10_BITER_OFFSET    0x015e /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD11_SADDR_OFFSET    0x0160 /* TCD Source Address */
+#define KINETIS_DMA_TCD11_SOFF_OFFSET     0x0164 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD11_ATTR_OFFSET     0x0166 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD11_NBYTES_OFFSET   0x0168 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD11_SLAST_OFFSET    0x016c /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD11_DADDR_OFFSET    0x0170 /* TCD Destination Address */
+#define KINETIS_DMA_TCD11_DOFF_OFFSET     0x0174 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD11_CITER_OFFSET    0x0176 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD11_DLASTSGA_OFFSET 0x0178 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD11_CSR_OFFSET      0x017c /* TCD Control and Status */
+#define KINETIS_DMA_TCD11_BITER_OFFSET    0x017e /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD12_SADDR_OFFSET    0x0180 /* TCD Source Address */
+#define KINETIS_DMA_TCD12_SOFF_OFFSET     0x0184 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD12_ATTR_OFFSET     0x0186 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD12_NBYTES_OFFSET   0x0188 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD12_SLAST_OFFSET    0x018c /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD12_DADDR_OFFSET    0x0190 /* TCD Destination Address */
+#define KINETIS_DMA_TCD12_DOFF_OFFSET     0x0194 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD12_CITER_OFFSET    0x0196 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD12_DLASTSGA_OFFSET 0x0198 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD12_CSR_OFFSET      0x019c /* TCD Control and Status */
+#define KINETIS_DMA_TCD12_BITER_OFFSET    0x019e /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD13_SADDR_OFFSET    0x01a0 /* TCD Source Address */
+#define KINETIS_DMA_TCD13_SOFF_OFFSET     0x01a4 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD13_ATTR_OFFSET     0x01a6 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD13_NBYTES_OFFSET   0x01a8 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD13_SLAST_OFFSET    0x01ac /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD13_DADDR_OFFSET    0x01b0 /* TCD Destination Address */
+#define KINETIS_DMA_TCD13_DOFF_OFFSET     0x01b4 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD13_CITER_OFFSET    0x01b6 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD13_DLASTSGA_OFFSET 0x01b8 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD13_CSR_OFFSET      0x01bc /* TCD Control and Status */
+#define KINETIS_DMA_TCD13_BITER_OFFSET    0x01be /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD14_SADDR_OFFSET    0x01c0 /* TCD Source Address */
+#define KINETIS_DMA_TCD14_SOFF_OFFSET     0x01c4 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD14_ATTR_OFFSET     0x01c6 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD14_NBYTES_OFFSET   0x01c8 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD14_SLAST_OFFSET    0x01cc /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD14_DADDR_OFFSET    0x01d0 /* TCD Destination Address */
+#define KINETIS_DMA_TCD14_DOFF_OFFSET     0x01d4 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD14_CITER_OFFSET    0x01d6 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD14_DLASTSGA_OFFSET 0x01d8 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD14_CSR_OFFSET      0x01dc /* TCD Control and Status */
+#define KINETIS_DMA_TCD14_BITER_OFFSET    0x01de /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD15_SADDR_OFFSET    0x01e0 /* TCD Source Address */
+#define KINETIS_DMA_TCD15_SOFF_OFFSET     0x01e4 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD15_ATTR_OFFSET     0x01e6 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD15_NBYTES_OFFSET   0x01e8 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD15_SLAST_OFFSET    0x01ec /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD15_DADDR_OFFSET    0x01f0 /* TCD Destination Address */
+#define KINETIS_DMA_TCD15_DOFF_OFFSET     0x01f4 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD15_CITER_OFFSET    0x01f6 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD15_DLASTSGA_OFFSET 0x01f8 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD15_CSR_OFFSET      0x01fc /* TCD Control and Status */
+#define KINETIS_DMA_TCD15_BITER_OFFSET    0x01fe /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+/* Register Addresses *******************************************************************************/
+
+#define KINETIS_DMA_CR                    (KINETIS_DMAC_BASE+KINETIS_DMA_CR_OFFSET)
+#define KINETIS_DMA_ES                    (KINETIS_DMAC_BASE+KINETIS_DMA_ES_OFFSET)
+#define KINETIS_DMA_ERQ                   (KINETIS_DMAC_BASE+KINETIS_DMA_ERQ_OFFSET)
+#define KINETIS_DMA_EEI                   (KINETIS_DMAC_BASE+KINETIS_DMA_EEI_OFFSET)
+#define KINETIS_DMA_CEEI                  (KINETIS_DMAC_BASE+KINETIS_DMA_CEEI_OFFSET)
+#define KINETIS_DMA_SEEI                  (KINETIS_DMAC_BASE+KINETIS_DMA_SEEI_OFFSET)
+#define KINETIS_DMA_CERQ                  (KINETIS_DMAC_BASE+KINETIS_DMA_CERQ_OFFSET)
+#define KINETIS_DMA_SERQ                  (KINETIS_DMAC_BASE+KINETIS_DMA_SERQ_OFFSET)
+#define KINETIS_DMA_CDNE                  (KINETIS_DMAC_BASE+KINETIS_DMA_CDNE_OFFSET)
+#define KINETIS_DMA_SSRT                  (KINETIS_DMAC_BASE+KINETIS_DMA_SSRT_OFFSET)
+#define KINETIS_DMA_CERR                  (KINETIS_DMAC_BASE+KINETIS_DMA_CERR_OFFSET)
+#define KINETIS_DMA_CINT                  (KINETIS_DMAC_BASE+KINETIS_DMA_CINT_OFFSET)
+#define KINETIS_DMA_INT                   (KINETIS_DMAC_BASE+KINETIS_DMA_INT_OFFSET)
+#define KINETIS_DMA_ERR                   (KINETIS_DMAC_BASE+KINETIS_DMA_ERR_OFFSET)
+#define KINETIS_DMA_HRS                   (KINETIS_DMAC_BASE+KINETIS_DMA_HRS_OFFSET)
+
+#define KINETIS_DMA_DCHPRI3               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI3_OFFSET)
+#define KINETIS_DMA_DCHPRI2               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI2_OFFSET)
+#define KINETIS_DMA_DCHPRI1               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI1_OFFSET)
+#define KINETIS_DMA_DCHPRI0               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI0_OFFSET)
+#define KINETIS_DMA_DCHPRI7               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI7_OFFSET)
+#define KINETIS_DMA_DCHPRI6               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI6_OFFSET)
+#define KINETIS_DMA_DCHPRI5               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI5_OFFSET)
+#define KINETIS_DMA_DCHPRI4               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI4_OFFSET)
+#define KINETIS_DMA_DCHPRI11              (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI11_OFFSET)
+#define KINETIS_DMA_DCHPRI10              (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI10_OFFSET)
+#define KINETIS_DMA_DCHPRI9               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI9_OFFSET)
+#define KINETIS_DMA_DCHPRI8               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI8_OFFSET)
+#define KINETIS_DMA_DCHPRI15              (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI15_OFFSET)
+#define KINETIS_DMA_DCHPRI14              (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI14_OFFSET)
+#define KINETIS_DMA_DCHPRI13              (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI13_OFFSET)
+#define KINETIS_DMA_DCHPRI12              (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI12_OFFSET)
+
+#ifndef KINETIS_K64
+#  define KINETIS_DMA_TCD_BASE(n)         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD_OFFSET(n))
+
+#  define KINETIS_DMA_TCD_SADDR(n)        (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_SADDR_OFFSET)
+#  define KINETIS_DMA_TCD_SOFF(n)         (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_SOFF_OFFSET)
+#  define KINETIS_DMA_TCD_ATTR(n)         (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_ATTR_OFFSET)
+#  define KINETIS_DMA_TCD_NBYTES(n)       (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_NBYTES_OFFSET)
+#  define KINETIS_DMA_TCD_SLAST(n)        (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_SLAST_OFFSET)
+#  define KINETIS_DMA_TCD_DADDR(n)        (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_DADDR_OFFSET)
+#  define KINETIS_DMA_TCD_DOFF(n)         (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_DOFF_OFFSET)
+#  define KINETIS_DMA_TCD_CITER(n)        (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_CITER_OFFSET)
+#  define KINETIS_DMA_TCD_DLASTSGA(n)     (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_DLASTSGA_OFFSET)
+#  define KINETIS_DMA_TCD_CSR(n)          (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_CSR_OFFSET)
+#  define KINETIS_DMA_TCD_BITER(n)        (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_BITER_OFFSET)
+#endif
+
+#define KINETIS_DMA_TCD0_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_SADDR_OFFSET)
+#define KINETIS_DMA_TCD0_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_SOFF_OFFSET)
+#define KINETIS_DMA_TCD0_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_ATTR_OFFSET)
+#define KINETIS_DMA_TCD0_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD0_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_SLAST_OFFSET)
+#define KINETIS_DMA_TCD0_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_DADDR_OFFSET)
+#define KINETIS_DMA_TCD0_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_DOFF_OFFSET)
+#define KINETIS_DMA_TCD0_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_CITER_OFFSET)
+#define KINETIS_DMA_TCD0_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD0_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_CSR_OFFSET)
+#define KINETIS_DMA_TCD0_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD1_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_SADDR_OFFSET)
+#define KINETIS_DMA_TCD1_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_SOFF_OFFSET)
+#define KINETIS_DMA_TCD1_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_ATTR_OFFSET)
+#define KINETIS_DMA_TCD1_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD1_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_SLAST_OFFSET)
+#define KINETIS_DMA_TCD1_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_DADDR_OFFSET)
+#define KINETIS_DMA_TCD1_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_DOFF_OFFSET)
+#define KINETIS_DMA_TCD1_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_CITER_OFFSET)
+#define KINETIS_DMA_TCD1_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD1_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_CSR_OFFSET)
+#define KINETIS_DMA_TCD1_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD2_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_SADDR_OFFSET)
+#define KINETIS_DMA_TCD2_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_SOFF_OFFSET)
+#define KINETIS_DMA_TCD2_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_ATTR_OFFSET)
+#define KINETIS_DMA_TCD2_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD2_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_SLAST_OFFSET)
+#define KINETIS_DMA_TCD2_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_DADDR_OFFSET)
+#define KINETIS_DMA_TCD2_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_DOFF_OFFSET)
+#define KINETIS_DMA_TCD2_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_CITER_OFFSET)
+#define KINETIS_DMA_TCD2_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD2_CSR_             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_CSR_OFFSET)
+#define KINETIS_DMA_TCD2_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD3_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_SADDR_OFFSET)
+#define KINETIS_DMA_TCD3_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_SOFF_OFFSET)
+#define KINETIS_DMA_TCD3_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_ATTR_OFFSET)
+#define KINETIS_DMA_TCD3_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD3_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_SLAST_OFFSET)
+#define KINETIS_DMA_TCD3_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_DADDR_OFFSET)
+#define KINETIS_DMA_TCD3_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_DOFF_OFFSET)
+#define KINETIS_DMA_TCD3_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_CITER_OFFSET)
+#define KINETIS_DMA_TCD3_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_DLASTSGA_OFFSET
+#define KINETIS_DMA_TCD3_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_CSR_OFFSET)
+#define KINETIS_DMA_TCD3_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD4_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_SADDR_OFFSET)
+#define KINETIS_DMA_TCD4_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_SOFF_OFFSET)
+#define KINETIS_DMA_TCD4_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_ATTR_OFFSET0)
+#define KINETIS_DMA_TCD4_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD4_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_SLAST_OFFSET)
+#define KINETIS_DMA_TCD4_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_DADDR_OFFSET)
+#define KINETIS_DMA_TCD4_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_DOFF_OFFSET)
+#define KINETIS_DMA_TCD4_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_CITER_OFFSET)
+#define KINETIS_DMA_TCD4_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD4_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_CSR_OFFSET)
+#define KINETIS_DMA_TCD4_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD5_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_SADDR_OFFSET)
+#define KINETIS_DMA_TCD5_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_SOFF_OFFSET)
+#define KINETIS_DMA_TCD5_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_ATTR_OFFSET)
+#define KINETIS_DMA_TCD5_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD5_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_SLAST_OFFSET)
+#define KINETIS_DMA_TCD5_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_DADDR_OFFSET)
+#define KINETIS_DMA_TCD5_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_DOFF_OFFSET)
+#define KINETIS_DMA_TCD5_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_CITER_OFFSET)
+#define KINETIS_DMA_TCD5_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD5_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_CSR_OFFSET)
+#define KINETIS_DMA_TCD5_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD6_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_SADDR_OFFSET)
+#define KINETIS_DMA_TCD6_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_SOFF_OFFSET)
+#define KINETIS_DMA_TCD6_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_ATTR_OFFSET)
+#define KINETIS_DMA_TCD6_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD6_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_SLAST_OFFSET)
+#define KINETIS_DMA_TCD6_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_DADDR_OFFSET)
+#define KINETIS_DMA_TCD6_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_DOFF_OFFSET)
+#define KINETIS_DMA_TCD6_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_CITER_OFFSET)
+#define KINETIS_DMA_TCD6_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD6_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_CSR_OFFSET)
+#define KINETIS_DMA_TCD6_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD7_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_SADDR_OFFSET)
+#define KINETIS_DMA_TCD7_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_SOFF_OFFSET)
+#define KINETIS_DMA_TCD7_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_ATTR_OFFSET)
+#define KINETIS_DMA_TCD7_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD7_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_SLAST_OFFSET)
+#define KINETIS_DMA_TCD7_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_DADDR_OFFSET)
+#define KINETIS_DMA_TCD7_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_DOFF_OFFSET)
+#define KINETIS_DMA_TCD7_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_CITER_OFFSET)
+#define KINETIS_DMA_TCD7_DLASTSGA_        (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD7_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_CSR_OFFSET)
+#define KINETIS_DMA_TCD7_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD8_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_SADDR_OFFSET)
+#define KINETIS_DMA_TCD8_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_SOFF_OFFSET)
+#define KINETIS_DMA_TCD8_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_ATTR_OFFSET)
+#define KINETIS_DMA_TCD8_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD8_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_SLAST_OFFSET)
+#define KINETIS_DMA_TCD8_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_DADDR_OFFSET)
+#define KINETIS_DMA_TCD8_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_DOFF_OFFSET)
+#define KINETIS_DMA_TCD8_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_CITER_OFFSET)
+#define KINETIS_DMA_TCD8_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD8_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_CSR_OFFSET)
+#define KINETIS_DMA_TCD8_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD9_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_SADDR_OFFSET)
+#define KINETIS_DMA_TCD9_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_SOFF_OFFSET)
+#define KINETIS_DMA_TCD9_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_ATTR_OFFSET)
+#define KINETIS_DMA_TCD9_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD9_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_SLAST_OFFSET)
+#define KINETIS_DMA_TCD9_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_DADDR_OFFSET)
+#define KINETIS_DMA_TCD9_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_DOFF_OFFSET)
+#define KINETIS_DMA_TCD9_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_CITER_OFFSET)
+#define KINETIS_DMA_TCD9_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD9_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_CSR_OFFSET)
+#define KINETIS_DMA_TCD9_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD10_SADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_SADDR_OFFSET)
+#define KINETIS_DMA_TCD10_SOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_SOFF_OFFSET)
+#define KINETIS_DMA_TCD10_ATTR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_ATTR_OFFSET)
+#define KINETIS_DMA_TCD10_NBYTES          (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD10_SLAST           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_SLAST_OFFSET)
+#define KINETIS_DMA_TCD10_DADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_DADDR_OFFSET)
+#define KINETIS_DMA_TCD10_DOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_DOFF_OFFSET)
+#define KINETIS_DMA_TCD10_CITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_CITER_OFFSET)
+#define KINETIS_DMA_TCD10_DLASTSGA        (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD10_CSR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_CSR_OFFSET)
+#define KINETIS_DMA_TCD10_BITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD11_SADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_SADDR_OFFSET)
+#define KINETIS_DMA_TCD11_SOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_SOFF_OFFSET)
+#define KINETIS_DMA_TCD11_ATTR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_ATTR_OFFSET)
+#define KINETIS_DMA_TCD11_NBYTES          (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD11_SLAST           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_SLAST_OFFSET)
+#define KINETIS_DMA_TCD11_DADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_DADDR_OFFSET)
+#define KINETIS_DMA_TCD11_DOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_DOFF_OFFSET)
+#define KINETIS_DMA_TCD11_CITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_CITER_OFFSET)
+#define KINETIS_DMA_TCD11_DLASTSGA        (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD11_CSR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_CSR_OFFSET)
+#define KINETIS_DMA_TCD11_BITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD12_SADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_SADDR_OFFSET)
+#define KINETIS_DMA_TCD12_SOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_SOFF_OFFSET)
+#define KINETIS_DMA_TCD12_ATTR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_ATTR_OFFSET)
+#define KINETIS_DMA_TCD12_NBYTES          (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD12_SLAST           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_SLAST_OFFSET)
+#define KINETIS_DMA_TCD12_DADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_DADDR_OFFSET)
+#define KINETIS_DMA_TCD12_DOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_DOFF_OFFSET)
+#define KINETIS_DMA_TCD12_CITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_CITER_OFFSET)
+#define KINETIS_DMA_TCD12_DLASTSGA        (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD12_CSR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_CSR_OFFSET)
+#define KINETIS_DMA_TCD12_BITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD13_SADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_SADDR_OFFSET)
+#define KINETIS_DMA_TCD13_SOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_SOFF_OFFSET)
+#define KINETIS_DMA_TCD13_ATTR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_ATTR_OFFSET)
+#define KINETIS_DMA_TCD13_NBYTES          (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD13_SLAST           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_SLAST_OFFSET)
+#define KINETIS_DMA_TCD13_DADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_DADDR_OFFSET)
+#define KINETIS_DMA_TCD13_DOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_DOFF_OFFSET)
+#define KINETIS_DMA_TCD13_CITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_CITER_OFFSET)
+#define KINETIS_DMA_TCD13_DLASTSGA        (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD13_CSR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_CSR_OFFSET)
+#define KINETIS_DMA_TCD13_BITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD14_SADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_SADDR_OFFSET)
+#define KINETIS_DMA_TCD14_SOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_SOFF_OFFSET)
+#define KINETIS_DMA_TCD14_ATTR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_ATTR_OFFSET)
+#define KINETIS_DMA_TCD14_NBYTES          (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD14_SLAST           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_SLAST_OFFSET)
+#define KINETIS_DMA_TCD14_DADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_DADDR_OFFSET)
+#define KINETIS_DMA_TCD14_DOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_DOFF_OFFSET)
+#define KINETIS_DMA_TCD14_CITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_CITER_OFFSET)
+#define KINETIS_DMA_TCD14_DLASTSGA        (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD14_CSR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_CSR_OFFSET)
+#define KINETIS_DMA_TCD14_BITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD15_SADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_SADDR_OFFSET)
+#define KINETIS_DMA_TCD15_SOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_SOFF_OFFSET)
+#define KINETIS_DMA_TCD15_ATTR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_ATTR_OFFSET)
+#define KINETIS_DMA_TCD15_NBYTES          (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD15_SLAST           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_SLAST_OFFSET)
+#define KINETIS_DMA_TCD15_DADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_DADDR_OFFSET)
+#define KINETIS_DMA_TCD15_DOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_DOFF_OFFSET)
+#define KINETIS_DMA_TCD15_CITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_CITER_OFFSET)
+#define KINETIS_DMA_TCD15_DLASTSGA        (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD15_CSR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_CSR_OFFSET)
+#define KINETIS_DMA_TCD15_BITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_BITER_OFFSET)
+
+/* Register Bit Definitions *************************************************************************/
+
+/* Control Register (32-bit) */
+                                                    /* Bit 0:  Reserved */
+#define DMA_CR_EDBG                       (1 << 1)  /* Bit 1:  Enable debug */
+#define DMA_CR_ERCA                       (1 << 2)  /* Bit 2:  Enable round robin channel arbitration */
+                                                    /* Bit 3:  Reserved */
+#define DMA_CR_HOE                        (1 << 4)  /* Bit 4:  Halt on error */
+#define DMA_CR_HALT                       (1 << 5)  /* Bit 5:  Halt DMA operations */
+#define DMA_CR_CLM                        (1 << 6)  /* Bit 6:  Continuous link mode */
+#define DMA_CR_EMLM                       (1 << 7)  /* Bit 7:  Enable minor loop mapping */
+                                                    /* Bits 8-15: Reserved */
+#define DMA_CR_ECX                        (1 << 16) /* Bit 16: Error cancel transfer */
+#define DMA_CR_CX                         (1 << 17) /* Bit 17: Cancel transfer */
+                                                    /* Bits 18-31: Reserved */
+/* Error Status Register */
+
+#define DMA_ES_DBE                        (1 << 0)  /* Bit 0:  Destination bus error */
+#define DMA_ES_SBE                        (1 << 1)  /* Bit 1:  Source bus error */
+#define DMA_ES_SGE                        (1 << 2)  /* Bit 2:  Scatter/gather configuration error */
+#define DMA_ES_NCE                        (1 << 3)  /* Bit 3:  NBYTES/CITER configuration error */
+#define DMA_ES_DOE                        (1 << 4)  /* Bit 4:  Destination offset error */
+#define DMA_ES_DAE                        (1 << 5)  /* Bit 5:  Destination address error */
+#define DMA_ES_SOE                        (1 << 6)  /* Bit 6:  Source offset error */
+#define DMA_ES_SAE                        (1 << 7)  /* Bit 7:  Source address error */
+#define DMA_ES_ERRCHN_SHIFT               (8)       /* Bits 8-11: Error channel number or cancelled channel number */
+#define DMA_ES_ERRCHN_MASK                (15 << DMA_ES_ERRCHN_SHIFT)
+                                                    /* Bits 12-13: Reserved */
+#define DMA_ES_CPE                        (1 << 14) /* Bit 14:  Channel priority error */
+                                                    /* Bit 15: Reserved */
+#define DMA_ES_ECX                        (1 << 16) /* Bit 16:  Transfer cancelled */
+                                                    /* Bits 17-30: Reserved */
+#define DMA_ES_VLD                        (1 << 31) /* Bit 31:  Logical OR of all ERR status bits */
+
+/* Enable Request Register, Enable Error Interrupt Register, Interrupt Request Register,  Error
+ * Register, Hardware Request Status Register common bit definitions (32-bit, except for Error
+ * Register which is 16-bit)
+ */
+
+#define DMA_REQ(n)                        (1 << (n)) /* Bit n: DMA Request n */
+#define DMA_REQ0                          (1 << 0)  /* Bit 0:  DMA Request 0 */
+#define DMA_REQ1                          (1 << 1)  /* Bit 1:  DMA Request 1 */
+#define DMA_REQ2                          (1 << 2)  /* Bit 2:  DMA Request 2 */
+#define DMA_REQ3                          (1 << 3)  /* Bit 3:  DMA Request 3 */
+#define DMA_REQ4                          (1 << 4)  /* Bit 4:  DMA Request 4 */
+#define DMA_REQ5                          (1 << 5)  /* Bit 5:  DMA Request 5 */
+#define DMA_REQ6                          (1 << 6)  /* Bit 6:  DMA Request 6 */
+#define DMA_REQ7                          (1 << 7)  /* Bit 7:  DMA Request 7 */
+#define DMA_REQ8                          (1 << 8)  /* Bit 8:  DMA Request 8 */
+#define DMA_REQ9                          (1 << 9)  /* Bit 9:  DMA Request 9 */
+#define DMA_REQ10                         (1 << 10) /* Bit 10: DMA Request 10 */
+#define DMA_REQ11                         (1 << 11) /* Bit 11: DMA Request 11 */
+#define DMA_REQ12                         (1 << 12) /* Bit 12: DMA Request 12 */
+#define DMA_REQ13                         (1 << 13) /* Bit 13: DMA Request 13 */
+#define DMA_REQ14                         (1 << 14) /* Bit 14: DMA Request 14 */
+#define DMA_REQ15                         (1 << 15) /* Bit 15: DMA Request 15 */
+                                                    /* Bits 16-31: Reserved */
+/* Clear Enable Error Interrupt Register (8-bit) */
+
+#define DMA_CEEI_SHIFT                    (0)       /* Bits 0-3: Clear enable error interrupt */
+#define DMA_CEEI_MASK                     (15 << DMA_CEEI_SHIFT)
+                                                    /* Bits 4-5: Reserved */
+#define DMA_CEEI_CAEE                     (1 << 6)  /* Bit 6:  Clear all enable error interrupts */
+#define DMA_CEEI_NOP                      (1 << 7)  /* Bit 7:  No operation */
+
+/* Set Enable Error Interrupt Register (8-bit) */
+
+#define DMA_SEEI_SHIFT                    (0)       /* Bits 0-3: Set enable error interrupt */
+#define DMA_SEEI_MASK                     (15 << DMA_SEEI_SHIFT)
+                                                    /* Bits 4-5: Reserved */
+#define DMA_SEEI_SAEE                     (1 << 6)  /* Bit 6:  Set all enable error interrupts */
+#define DMA_SEEI_NOP                      (1 << 7)  /* Bit 7:  No operation */
+
+/* Clear Enable Request Register (8-bit) */
+
+#define DMA_CERQ_SHIFT                    (0)       /* Bits 0-3: Clear enable request */
+#define DMA_CERQ_MASK                     (15 << DMA_CERQ_SHIFT)
+                                                    /* Bits 4-5: Reserved */
+#define DMA_CERQ_CAER                     (1 << 6)  /* Bit 6:  Clear all enable requests */
+#define DMA_CERQ_NOP                      (1 << 7)  /* Bit 7:  No operation */
+
+/* Set Enable Request Register (8-bit) */
+
+#define DMA_SERQ_SHIFT                    (0)       /* Bits 0-3: Set enable request */
+#define DMA_SERQ_MASK                     (15 << DMA_SERQ_SHIFT)
+                                                    /* Bits 4-5: Reserved */
+#define DMA_SERQ_SAER                     (1 << 6)  /* Bit 6:  Set all enable requests */
+#define DMA_SERQ_NOP                      (1 << 7)  /* Bit 7:  No operation */
+
+/* Clear DONE Status Bit Register (8-bit) */
+
+#define DMA_CDNE_SHIFT                    (0)       /* Bits 0-3: Clear DONE bit */
+#define DMA_CDNE_MASK                     (15 << DMA_CDNE_SHIFT)
+                                                    /* Bits 4-5: Reserved */
+#define DMA_CDNE_CADN                     (1 << 6)  /* Bit 6:  Clears all DONE bits */
+#define DMA_CDNE_NOP                      (1 << 7)  /* Bit 7:  No operation */
+
+/* Set START Bit Register (8-bit) */
+
+#define DMA_SSRT_SHIFT                    (0)       /* Bits 0-3: Set START bit */
+#define DMA_SSRT_MASK                     (15 << DMA_SSRT_SHIFT)
+                                                    /* Bits 4-5: Reserved */
+#define DMA_SSRT_SAST                     (1 << 6)  /* Bit 6:  Set all START bits (activates all channels) */
+#define DMA_SSRT_NOP                      (1 << 7)  /* Bit 7:  No operation */
+
+/* Clear Error Register (8-bit) */
+
+#define DMA_CERR_SHIFT                    (0)       /* Bits 0-3: Clear error indicator */
+#define DMA_CERR_MASK                     (15 << DMA_CERR_SHIFT)
+                                                    /* Bits 4-5: Reserved */
+#define DMA_CERR_CAEI                     (1 << 6)  /* Bit 6:  Clear all error indicators */
+#define DMA_CERR_NOP                      (1 << 7)  /* Bit 7:  No operation */
+
+/* Clear Interrupt Request Register (8-bit) */
+
+#define DMA_CINT_SHIFT                    (0)       /* Bits 0-3: Clear interrupt request */
+#define DMA_CINT_MASK                     (15 << DMA_CINT_SHIFT)
+                                                    /* Bits 4-5: Reserved */
+#define DMA_CINT_CAIR                     (1 << 6)  /* Bit 6:  Clear all interrupt requests */
+#define DMA_CINT_NOP                      (1 << 7)  /* Bit 7:  No operation */
+
+/* Channel n Priority Register (8-bit) */
+
+#define DMA_DCHPR_SHIFT                   (0)       /* Bits 0-3: Channel n arbitration priority */
+#define DMA_DCHPR_MASK                    (15 << DMA_DCHPR_SHIFT)
+                                                    /* Bits 4-5: Reserved */
+#define DMA_DCHPR_DPA                     (1 << 6)  /* Bit 6:  Disable preempt ability */
+#define DMA_DCHPR_ECP                     (1 << 7)  /* Bit 7:  Enable channel preemption */
+
+
+/* TCD Source Address.  32-bit address value. */
+/* TCD Signed Source Address Offset.  32-bit offset value. */
+
+/* TCD Transfer Attributes (16-bit) */
+
+#define DMA_TCD_ATTR_DSIZE_SHIFT          (0)       /* Bits 0-2: Destination data transfer size */
+#define DMA_TCD_ATTR_DSIZE_MASK           (7 << DMA_TCD_ATTR_DSIZE_SHIFT)
+#  define DMA_TCD_ATTR_DSIZE_8BIT         (0 << DMA_TCD_ATTR_DSIZE_SHIFT) /* 8-bit */
+#  define DMA_TCD_ATTR_DSIZE_16BIT        (1 << DMA_TCD_ATTR_DSIZE_SHIFT) /* 16-bit */
+#  define DMA_TCD_ATTR_DSIZE_32BIT        (2 << DMA_TCD_ATTR_DSIZE_SHIFT) /* 32-bit */
+#  define DMA_TCD_ATTR_DSIZE_16BYTE       (4 << DMA_TCD_ATTR_DSIZE_SHIFT) /* 16-byte */
+#define DMA_TCD_ATTR_DMOD_SHIFT           (3)       /* Bits 3-7: Destination address modulo */
+#define DMA_TCD_ATTR_DMOD_MASK            (31 << DMA_TCD_ATTR_DMOD_SHIFT)
+#define DMA_TCD_ATTR_SSIZE_SHIFT          (8)       /* Bits 8-10: Source data transfer size */
+#define DMA_TCD_ATTR_SSIZE_MASK           (7 << DMA_TCD_ATTR_SSIZE_SHIFT)
+#  define DMA_TCD_ATTR_SSIZE_8BIT         (0 << DMA_TCD_ATTR_SSIZE_SHIFT) /* 8-bit */
+#  define DMA_TCD_ATTR_SSIZE_16BIT        (1 << DMA_TCD_ATTR_SSIZE_SHIFT) /* 16-bit */
+#  define DMA_TCD_ATTR_SSIZE_32BIT        (2 << DMA_TCD_ATTR_SSIZE_SHIFT) /* 32-bit */
+#  define DMA_TCD_ATTR_SSIZE_16BYTE       (4 << DMA_TCD_ATTR_SSIZE_SHIFT) /* 16-byte */
+#define DMA_TCD_ATTR_SMOD_SHIFT           (11)      /* Bits 11-15: Source address modulo */
+#define DMA_TCD_ATTR_SMOD_MASK            (31 << DMA_TCD_ATTR_SMOD_SHIFT)
+
+/* TCD Minor Byte Count.
+ * Case 1: Minor Loop Disabled.  In this case, the register holds a simple 32-bit count value.
+ * Case 2: Minor Loop Enabled and Offset Disabled:
+ */
+
+#define DMA_TCD_NBYTES2_SHIFT             (0)       /* Bits 0-29: Minor byte transfer count */
+#define DMA_TCD_NBYTES2_MASK              (0x3fffffff)
+#define DMA_TCD_NBYTES_DMLOE              (1 << 30) /* Bit 30: Destination minor loop offset enable (Case 2&3) */
+#define DMA_TCD_NBYTES_SMLOE              (1 << 31) /* Bit 31: Source minor loop offset enable (Case 2&3) */
+
+/* Case 3: (Minor Loop and Offset Enabled): */
+
+#define DMA_TCD_NBYTES3_SHIFT             (0)       /* Bits 0-9: Minor byte transfer count */
+#define DMA_TCD_NBYTES3_MASK              (0x3ff << DMA_TCD_NBYTES3_SHIFT)
+#define DMA_TCD_NBYTES_MLOFF_SHIFT        (10)      /* Bits 10-29: Sign-extended address offset */
+#define DMA_TCD_NBYTES_MLOFF_MASK         (0xfffff << DMA_TCD_NBYTES_MLOFF_SHIFT)
+                                                    /* Bit 30: Same as Case 2 */
+                                                    /* Bit 31: Same as Case 2 */
+
+/* TCD Last Source Address Adjustment. 32-bit address value. */
+/* TCD Destination Address. 32-bit address value. */
+/* TCD Signed Destination Address Offset. 32-bit offset value. */
+
+/* TCD Current Minor Loop Link, Major Loop Count. 16-bit.
+ * Case 1:  Channel Linking Enabled:
+ */
+
+#define DMA_TCD_CITER1_SHIFT              (0)       /* Bits 0-8: Current major iteration count */
+#define DMA_TCD_CITER1_MASK               (0x1ff << DMA_TCD_CITER1_SHIFT)
+#define DMA_TCD_CITER1_LINKCH_SHIFT       (9)       /* Bits 9-12: Link channel number */
+#define DMA_TCD_CITER1_LINKCH_MASK        (15 << DMA_TCD_CITER1_LINKCH_SHIFT)
+                                                    /* Bits 13-14: Reserved */
+#define DMA_TCD_CITER_ELINK               (1 << 15) /* Bit 15: Enable channel-to-channel linking on minor-loop complete (Case 1&2) */
+
+/* Case 2:  Channel Linking Disabled: */
+
+#define DMA_TCD_CITER2_SHIFT              (0)       /* Bits 0-14: Current major iteration count */
+#define DMA_TCD_CITER2_MASK               (0x7fff << DMA_TCD_CITER2_SHIFT)
+                                                    /* Bits 15: Same as Case 1 */
+
+/* TCD Last Destination Address Adjustment/Scatter Gather Address. 32-bit address value. */
+
+/* TCD Control and Status (16-bit) */
+
+#define DMA_TCD_CSR_START                 (1 << 0)  /* Bit 0:  Channel start */
+#define DMA_TCD_CSR_INTMAJOR              (1 << 1)  /* Bit 1:  Enable an interrupt when major iteration count completes */
+#define DMA_TCD_CSR_INTHALF               (1 << 2)  /* Bit 2:  Enable an interrupt when major counter is half complete */
+#define DMA_TCD_CSR_DREQ                  (1 << 3)  /* Bit 3:  Disable request */
+#define DMA_TCD_CSR_ESG                   (1 << 4)  /* Bit 4:  Enable scatter/gather processing */
+#define DMA_TCD_CSR_MAJORELINK            (1 << 5)  /* Bit 5:  Enable channel-to-channel linking on major loop complete */
+#define DMA_TCD_CSR_ACTIVE                (1 << 6)  /* Bit 6:  Channel active */
+#define DMA_TCD_CSR_DONE                  (1 << 7)  /* Bit 7:  Channel done */
+#define DMA_TCD_CSR_MAJORLINKCH_SHIFT     (8)       /* Bits 8-11: Link channel number */
+#define DMA_TCD_CSR_MAJORLINKCH_MASK      (15 << DMA_TCD_CSR_MAJORLINKCH_SHIFT)
+                                                    /* Bits 12-13: Reserved */
+#define DMA_TCD_CSR_BWC_SHIFT             (14)      /* Bits 14-15: Bandwidth control */
+#define DMA_TCD_CSR_BWC_MASK              (3 << DMA_TCD_CSR_BWC_SHIFT)
+#  define DMA_TCD_CSR_BWC_NOSTALLS        (0 << DMA_TCD_CSR_BWC_SHIFT) /* No eDMA engine stalls */
+#  define DMA_TCD_CSR_BWC_4CYCLES         (2 << DMA_TCD_CSR_BWC_SHIFT) /* eDMA engine stalls 4 cycles after each R/W */
+#  define DMA_TCD_CSR_BWC_8CYCLES         (3 << DMA_TCD_CSR_BWC_SHIFT) /* eDMA engine stalls 8 cycles after each R/W */
+
+/* TCD Beginning Minor Loop Link, Major Loop Count (16-bit).
+ *
+ * Case 1: Channel Linking Enabled:
+ */
+
+#define DMA_TCD_BITER1_SHIFT              (0)       /* Bits 0-8: Starting major iteration count */
+#define DMA_TCD_BITER1_MASK               (0x1ff << DMA_TCD_BITER1_SHIFT)
+#define DMA_TCD_BITER1_LINKCH_SHIFT       (9)       /* Bits 9-12: Link channel number */
+#define DMA_TCD_BITER1_LINKCH_MASK        (15 << DMA_TCD_BITER1_LINKCH_SHIFT)
+                                                    /* Bits 13-14: Reserved */
+#define DMA_TCD_BITER_ELINK               (1 << 15) /* Bit 15: Enable channel-to-channel linking on minor-loop complete (Case 1&2) */
+
+/* Case 2: Channel Linking Disabled: */
+
+#define DMA_TCD_BITER2_SHIFT              (0)       /* Bits 0-14: Starting major iteration count */
+#define DMA_TCD_BITER2_MASK               (0x7fff << DMA_TCD_CITER2_SHIFT)
+                                                    /* Bits 15: Same as Case 1 */
+
+/****************************************************************************************************
+ * Public Types
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public Data
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public Functions
+ ****************************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DMA_H */
diff --git a/arch/arm/src/kinetis/kinetis_dmamux.h b/arch/arm/src/kinetis/chip/kinetis_dmamux.h
similarity index 95%
rename from arch/arm/src/kinetis/kinetis_dmamux.h
rename to arch/arm/src/kinetis/chip/kinetis_dmamux.h
index b83579180ea0ca53d2d0b99d55ac6de604ab51e8..d63feb8da31e3d562ea1c033afc094a7d1121f67 100644
--- a/arch/arm/src/kinetis/kinetis_dmamux.h
+++ b/arch/arm/src/kinetis/chip/kinetis_dmamux.h
@@ -1,7 +1,7 @@
 /********************************************************************************************
- * arch/arm/src/kinetis/kinetis_dmamux.h
+ * arch/arm/src/kinetis/chip/kinetis_dmamux.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ********************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_DMAMUX_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_DMAMUX_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DMAMUX_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DMAMUX_H
 
 /********************************************************************************************
  * Included Files
@@ -108,4 +108,4 @@
  * Public Functions
  ********************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_DMAMUX_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DMAMUX_H */
diff --git a/arch/arm/src/kinetis/kinetis_dspi.h b/arch/arm/src/kinetis/chip/kinetis_dspi.h
similarity index 74%
rename from arch/arm/src/kinetis/kinetis_dspi.h
rename to arch/arm/src/kinetis/chip/kinetis_dspi.h
index e682ef23e8555ab5f706903846579803d7c16e39..e41674494fb617c069645911792efbcbf1026d81 100644
--- a/arch/arm/src/kinetis/kinetis_dspi.h
+++ b/arch/arm/src/kinetis/chip/kinetis_dspi.h
@@ -1,7 +1,7 @@
 /********************************************************************************************
- * arch/arm/src/kinetis/kinetis_dspi.h
+ * arch/arm/src/kinetis/chip/kinetis_dspi.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ********************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_DSPI_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_DSPI_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DSPI_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DSPI_H
 
 /********************************************************************************************
  * Included Files
@@ -50,75 +50,75 @@
 
 /* Register Offsets *************************************************************************/
 
-#define KINETICS_SPI_MCR_OFFSET    0x0000 /* DSPI Module Configuration Register */
-#define KINETICS_SPI_TCR_OFFSET    0x0008 /* DSPI Transfer Count Register */
-#define KINETICS_SPI_CTAR0_OFFSET  0x000c /* DSPI Clock and Transfer Attributes Register */
-#define KINETICS_SPI_CTAR1_OFFSET  0x0010 /* DSPI Clock and Transfer Attributes Register */
-#define KINETICS_SPI_SR_OFFSET     0x002c /* DSPI Status Register */
-#define KINETICS_SPI_RSER_OFFSET   0x0030 /* DSPI DMA/Interrupt Request Select and Enable Register */
-#define KINETICS_SPI_PUSHR_OFFSET  0x0034 /* DSPI PUSH TX FIFO Register */
-#define KINETICS_SPI_POPR_OFFSET   0x0038 /* DSPI POP RX FIFO Register */
-#define KINETICS_SPI_TXFR0_OFFSET  0x003c /* DSPI Transmit FIFO Registers */
-#define KINETICS_SPI_TXFR1_OFFSET  0x0040 /* DSPI Transmit FIFO Registers */
-#define KINETICS_SPI_TXFR2_OFFSET  0x0044 /* DSPI Transmit FIFO Registers */
-#define KINETICS_SPI_TXFR3_OFFSET  0x0048 /* DSPI Transmit FIFO Registers */
-#define KINETICS_SPI_RXFR0_OFFSET  0x007c /* DSPI Receive FIFO Registers */
-#define KINETICS_SPI_RXFR1_OFFSET  0x0080 /* DSPI Receive FIFO Registers */
-#define KINETICS_SPI_RXFR2_OFFSET  0x0084 /* DSPI Receive FIFO Registers */
-#define KINETICS_SPI_RXFR3_OFFSET  0x0088 /* DSPI Receive FIFO Registers */
+#define KINETIS_SPI_MCR_OFFSET     0x0000 /* DSPI Module Configuration Register */
+#define KINETIS_SPI_TCR_OFFSET     0x0008 /* DSPI Transfer Count Register */
+#define KINETIS_SPI_CTAR0_OFFSET   0x000c /* DSPI Clock and Transfer Attributes Register */
+#define KINETIS_SPI_CTAR1_OFFSET   0x0010 /* DSPI Clock and Transfer Attributes Register */
+#define KINETIS_SPI_SR_OFFSET      0x002c /* DSPI Status Register */
+#define KINETIS_SPI_RSER_OFFSET    0x0030 /* DSPI DMA/Interrupt Request Select and Enable Register */
+#define KINETIS_SPI_PUSHR_OFFSET   0x0034 /* DSPI PUSH TX FIFO Register */
+#define KINETIS_SPI_POPR_OFFSET    0x0038 /* DSPI POP RX FIFO Register */
+#define KINETIS_SPI_TXFR0_OFFSET   0x003c /* DSPI Transmit FIFO Registers */
+#define KINETIS_SPI_TXFR1_OFFSET   0x0040 /* DSPI Transmit FIFO Registers */
+#define KINETIS_SPI_TXFR2_OFFSET   0x0044 /* DSPI Transmit FIFO Registers */
+#define KINETIS_SPI_TXFR3_OFFSET   0x0048 /* DSPI Transmit FIFO Registers */
+#define KINETIS_SPI_RXFR0_OFFSET   0x007c /* DSPI Receive FIFO Registers */
+#define KINETIS_SPI_RXFR1_OFFSET   0x0080 /* DSPI Receive FIFO Registers */
+#define KINETIS_SPI_RXFR2_OFFSET   0x0084 /* DSPI Receive FIFO Registers */
+#define KINETIS_SPI_RXFR3_OFFSET   0x0088 /* DSPI Receive FIFO Registers */
 
 /* Register Addresses ***********************************************************************/
 
-#define KINETICS_SPI0_MCR          (KINETIS_SPI0_BASE+KINETICS_SPI_MCR_OFFSET)
-#define KINETICS_SPI0_TCR          (KINETIS_SPI0_BASE+KINETICS_SPI_TCR_OFFSET)
-#define KINETICS_SPI0_CTAR0        (KINETIS_SPI0_BASE+KINETICS_SPI_CTAR0_OFFSET)
-#define KINETICS_SPI0_CTAR1        (KINETIS_SPI0_BASE+KINETICS_SPI_CTAR1_OFFSET)
-#define KINETICS_SPI0_SR           (KINETIS_SPI0_BASE+KINETICS_SPI_SR_OFFSET)
-#define KINETICS_SPI0_RSER         (KINETIS_SPI0_BASE+KINETICS_SPI_RSER_OFFSET)
-#define KINETICS_SPI0_PUSHR        (KINETIS_SPI0_BASE+KINETICS_SPI_PUSHR_OFFSET)
-#define KINETICS_SPI0_POPR         (KINETIS_SPI0_BASE+KINETICS_SPI_POPR_OFFSET)
-#define KINETICS_SPI0_TXFR0        (KINETIS_SPI0_BASE+KINETICS_SPI_TXFR0_OFFSET)
-#define KINETICS_SPI0_TXFR1        (KINETIS_SPI0_BASE+KINETICS_SPI_TXFR1_OFFSET)
-#define KINETICS_SPI0_TXFR2        (KINETIS_SPI0_BASE+KINETICS_SPI_TXFR2_OFFSET)
-#define KINETICS_SPI0_TXFR3        (KINETIS_SPI0_BASE+KINETICS_SPI_TXFR3_OFFSET)
-#define KINETICS_SPI0_RXFR0        (KINETIS_SPI0_BASE+KINETICS_SPI_RXFR0_OFFSET)
-#define KINETICS_SPI0_RXFR1        (KINETIS_SPI0_BASE+KINETICS_SPI_RXFR1_OFFSET)
-#define KINETICS_SPI0_RXFR2        (KINETIS_SPI0_BASE+KINETICS_SPI_RXFR2_OFFSET)
-#define KINETICS_SPI0_RXFR3        (KINETIS_SPI0_BASE+KINETICS_SPI_RXFR3_OFFSET)
-
-#define KINETICS_SPI1_MCR          (KINETIS_SPI1_BASE+KINETICS_SPI_MCR_OFFSET)
-#define KINETICS_SPI1_TCR          (KINETIS_SPI1_BASE+KINETICS_SPI_TCR_OFFSET)
-#define KINETICS_SPI1_CTAR0        (KINETIS_SPI1_BASE+KINETICS_SPI_CTAR0_OFFSET)
-#define KINETICS_SPI1_CTAR1        (KINETIS_SPI1_BASE+KINETICS_SPI_CTAR1_OFFSET)
-#define KINETICS_SPI1_SR           (KINETIS_SPI1_BASE+KINETICS_SPI_SR_OFFSET)
-#define KINETICS_SPI1_RSER         (KINETIS_SPI1_BASE+KINETICS_SPI_RSER_OFFSET)
-#define KINETICS_SPI1_PUSHR        (KINETIS_SPI1_BASE+KINETICS_SPI_PUSHR_OFFSET)
-#define KINETICS_SPI1_POPR         (KINETIS_SPI1_BASE+KINETICS_SPI_POPR_OFFSET)
-#define KINETICS_SPI1_TXFR0        (KINETIS_SPI1_BASE+KINETICS_SPI_TXFR0_OFFSET)
-#define KINETICS_SPI1_TXFR1        (KINETIS_SPI1_BASE+KINETICS_SPI_TXFR1_OFFSET)
-#define KINETICS_SPI1_TXFR2        (KINETIS_SPI1_BASE+KINETICS_SPI_TXFR2_OFFSET)
-#define KINETICS_SPI1_TXFR3        (KINETIS_SPI1_BASE+KINETICS_SPI_TXFR3_OFFSET)
-#define KINETICS_SPI1_RXFR0        (KINETIS_SPI1_BASE+KINETICS_SPI_RXFR0_OFFSET)
-#define KINETICS_SPI1_RXFR1        (KINETIS_SPI1_BASE+KINETICS_SPI_RXFR1_OFFSET)
-#define KINETICS_SPI1_RXFR2        (KINETIS_SPI1_BASE+KINETICS_SPI_RXFR2_OFFSET)
-#define KINETICS_SPI1_RXFR3        (KINETIS_SPI1_BASE+KINETICS_SPI_RXFR3_OFFSET)
-
-#define KINETICS_SPI2_MCR          (KINETIS_SPI2_BASE+KINETICS_SPI_MCR_OFFSET)
-#define KINETICS_SPI2_TCR          (KINETIS_SPI2_BASE+KINETICS_SPI_TCR_OFFSET)
-#define KINETICS_SPI2_CTAR0        (KINETIS_SPI2_BASE+KINETICS_SPI_CTAR0_OFFSET)
-#define KINETICS_SPI2_CTAR1        (KINETIS_SPI2_BASE+KINETICS_SPI_CTAR1_OFFSET)
-#define KINETICS_SPI2_SR           (KINETIS_SPI2_BASE+KINETICS_SPI_SR_OFFSET)
-#define KINETICS_SPI2_RSER         (KINETIS_SPI2_BASE+KINETICS_SPI_RSER_OFFSET)
-#define KINETICS_SPI2_PUSHR        (KINETIS_SPI2_BASE+KINETICS_SPI_PUSHR_OFFSET)
-#define KINETICS_SPI2_POPR         (KINETIS_SPI2_BASE+KINETICS_SPI_POPR_OFFSET)
-#define KINETICS_SPI2_TXFR0        (KINETIS_SPI2_BASE+KINETICS_SPI_TXFR0_OFFSET)
-#define KINETICS_SPI2_TXFR1        (KINETIS_SPI2_BASE+KINETICS_SPI_TXFR1_OFFSET)
-#define KINETICS_SPI2_TXFR2        (KINETIS_SPI2_BASE+KINETICS_SPI_TXFR2_OFFSET)
-#define KINETICS_SPI2_TXFR3        (KINETIS_SPI2_BASE+KINETICS_SPI_TXFR3_OFFSET)
-#define KINETICS_SPI2_RXFR0        (KINETIS_SPI2_BASE+KINETICS_SPI_RXFR0_OFFSET)
-#define KINETICS_SPI2_RXFR1        (KINETIS_SPI2_BASE+KINETICS_SPI_RXFR1_OFFSET)
-#define KINETICS_SPI2_RXFR2        (KINETIS_SPI2_BASE+KINETICS_SPI_RXFR2_OFFSET)
-#define KINETICS_SPI2_RXFR3        (KINETIS_SPI2_BASE+KINETICS_SPI_RXFR3_OFFSET)
+#define KINETIS_SPI0_MCR           (KINETIS_SPI0_BASE+KINETIS_SPI_MCR_OFFSET)
+#define KINETIS_SPI0_TCR           (KINETIS_SPI0_BASE+KINETIS_SPI_TCR_OFFSET)
+#define KINETIS_SPI0_CTAR0         (KINETIS_SPI0_BASE+KINETIS_SPI_CTAR0_OFFSET)
+#define KINETIS_SPI0_CTAR1         (KINETIS_SPI0_BASE+KINETIS_SPI_CTAR1_OFFSET)
+#define KINETIS_SPI0_SR            (KINETIS_SPI0_BASE+KINETIS_SPI_SR_OFFSET)
+#define KINETIS_SPI0_RSER          (KINETIS_SPI0_BASE+KINETIS_SPI_RSER_OFFSET)
+#define KINETIS_SPI0_PUSHR         (KINETIS_SPI0_BASE+KINETIS_SPI_PUSHR_OFFSET)
+#define KINETIS_SPI0_POPR          (KINETIS_SPI0_BASE+KINETIS_SPI_POPR_OFFSET)
+#define KINETIS_SPI0_TXFR0         (KINETIS_SPI0_BASE+KINETIS_SPI_TXFR0_OFFSET)
+#define KINETIS_SPI0_TXFR1         (KINETIS_SPI0_BASE+KINETIS_SPI_TXFR1_OFFSET)
+#define KINETIS_SPI0_TXFR2         (KINETIS_SPI0_BASE+KINETIS_SPI_TXFR2_OFFSET)
+#define KINETIS_SPI0_TXFR3         (KINETIS_SPI0_BASE+KINETIS_SPI_TXFR3_OFFSET)
+#define KINETIS_SPI0_RXFR0         (KINETIS_SPI0_BASE+KINETIS_SPI_RXFR0_OFFSET)
+#define KINETIS_SPI0_RXFR1         (KINETIS_SPI0_BASE+KINETIS_SPI_RXFR1_OFFSET)
+#define KINETIS_SPI0_RXFR2         (KINETIS_SPI0_BASE+KINETIS_SPI_RXFR2_OFFSET)
+#define KINETIS_SPI0_RXFR3         (KINETIS_SPI0_BASE+KINETIS_SPI_RXFR3_OFFSET)
+
+#define KINETIS_SPI1_MCR           (KINETIS_SPI1_BASE+KINETIS_SPI_MCR_OFFSET)
+#define KINETIS_SPI1_TCR           (KINETIS_SPI1_BASE+KINETIS_SPI_TCR_OFFSET)
+#define KINETIS_SPI1_CTAR0         (KINETIS_SPI1_BASE+KINETIS_SPI_CTAR0_OFFSET)
+#define KINETIS_SPI1_CTAR1         (KINETIS_SPI1_BASE+KINETIS_SPI_CTAR1_OFFSET)
+#define KINETIS_SPI1_SR            (KINETIS_SPI1_BASE+KINETIS_SPI_SR_OFFSET)
+#define KINETIS_SPI1_RSER          (KINETIS_SPI1_BASE+KINETIS_SPI_RSER_OFFSET)
+#define KINETIS_SPI1_PUSHR         (KINETIS_SPI1_BASE+KINETIS_SPI_PUSHR_OFFSET)
+#define KINETIS_SPI1_POPR          (KINETIS_SPI1_BASE+KINETIS_SPI_POPR_OFFSET)
+#define KINETIS_SPI1_TXFR0         (KINETIS_SPI1_BASE+KINETIS_SPI_TXFR0_OFFSET)
+#define KINETIS_SPI1_TXFR1         (KINETIS_SPI1_BASE+KINETIS_SPI_TXFR1_OFFSET)
+#define KINETIS_SPI1_TXFR2         (KINETIS_SPI1_BASE+KINETIS_SPI_TXFR2_OFFSET)
+#define KINETIS_SPI1_TXFR3         (KINETIS_SPI1_BASE+KINETIS_SPI_TXFR3_OFFSET)
+#define KINETIS_SPI1_RXFR0         (KINETIS_SPI1_BASE+KINETIS_SPI_RXFR0_OFFSET)
+#define KINETIS_SPI1_RXFR1         (KINETIS_SPI1_BASE+KINETIS_SPI_RXFR1_OFFSET)
+#define KINETIS_SPI1_RXFR2         (KINETIS_SPI1_BASE+KINETIS_SPI_RXFR2_OFFSET)
+#define KINETIS_SPI1_RXFR3         (KINETIS_SPI1_BASE+KINETIS_SPI_RXFR3_OFFSET)
+
+#define KINETIS_SPI2_MCR           (KINETIS_SPI2_BASE+KINETIS_SPI_MCR_OFFSET)
+#define KINETIS_SPI2_TCR           (KINETIS_SPI2_BASE+KINETIS_SPI_TCR_OFFSET)
+#define KINETIS_SPI2_CTAR0         (KINETIS_SPI2_BASE+KINETIS_SPI_CTAR0_OFFSET)
+#define KINETIS_SPI2_CTAR1         (KINETIS_SPI2_BASE+KINETIS_SPI_CTAR1_OFFSET)
+#define KINETIS_SPI2_SR            (KINETIS_SPI2_BASE+KINETIS_SPI_SR_OFFSET)
+#define KINETIS_SPI2_RSER          (KINETIS_SPI2_BASE+KINETIS_SPI_RSER_OFFSET)
+#define KINETIS_SPI2_PUSHR         (KINETIS_SPI2_BASE+KINETIS_SPI_PUSHR_OFFSET)
+#define KINETIS_SPI2_POPR          (KINETIS_SPI2_BASE+KINETIS_SPI_POPR_OFFSET)
+#define KINETIS_SPI2_TXFR0         (KINETIS_SPI2_BASE+KINETIS_SPI_TXFR0_OFFSET)
+#define KINETIS_SPI2_TXFR1         (KINETIS_SPI2_BASE+KINETIS_SPI_TXFR1_OFFSET)
+#define KINETIS_SPI2_TXFR2         (KINETIS_SPI2_BASE+KINETIS_SPI_TXFR2_OFFSET)
+#define KINETIS_SPI2_TXFR3         (KINETIS_SPI2_BASE+KINETIS_SPI_TXFR3_OFFSET)
+#define KINETIS_SPI2_RXFR0         (KINETIS_SPI2_BASE+KINETIS_SPI_RXFR0_OFFSET)
+#define KINETIS_SPI2_RXFR1         (KINETIS_SPI2_BASE+KINETIS_SPI_RXFR1_OFFSET)
+#define KINETIS_SPI2_RXFR2         (KINETIS_SPI2_BASE+KINETIS_SPI_RXFR2_OFFSET)
+#define KINETIS_SPI2_RXFR3         (KINETIS_SPI2_BASE+KINETIS_SPI_RXFR3_OFFSET)
 
 /* Register Bit Definitions *****************************************************************/
 
@@ -318,4 +318,4 @@
  * Public Functions
  ********************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_DSPI_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DSPI_H */
diff --git a/arch/arm/src/kinetis/kinetis_enet.h b/arch/arm/src/kinetis/chip/kinetis_enet.h
similarity index 99%
rename from arch/arm/src/kinetis/kinetis_enet.h
rename to arch/arm/src/kinetis/chip/kinetis_enet.h
index cadd006d8ce114644b37fc9a77b5c2cb87dd67f3..8f34d0c7f6468ecfd1f6fd9ed32442786d240107 100644
--- a/arch/arm/src/kinetis/kinetis_enet.h
+++ b/arch/arm/src/kinetis/chip/kinetis_enet.h
@@ -1,7 +1,7 @@
 /********************************************************************************************
- * arch/arm/src/kinetis/kinetis_enet.h
+ * arch/arm/src/kinetis/chip/kinetis_enet.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ********************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_ENET_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_ENET_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_ENET_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_ENET_H
 
 /********************************************************************************************
  * Included Files
@@ -649,4 +649,4 @@ struct enet_desc_s
  ********************************************************************************************/
 
 #endif /* KINETIS_NENET &&  KINETIS_NENET > 0 */
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_ENET_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_ENET_H */
diff --git a/arch/arm/src/kinetis/kinetis_ewm.h b/arch/arm/src/kinetis/chip/kinetis_ewm.h
similarity index 93%
rename from arch/arm/src/kinetis/kinetis_ewm.h
rename to arch/arm/src/kinetis/chip/kinetis_ewm.h
index e259a3cf29af2f891e40532f4afd01ff3e5626bc..e91bc28c2c60fda5d1397b45092b62bd81f6618e 100644
--- a/arch/arm/src/kinetis/kinetis_ewm.h
+++ b/arch/arm/src/kinetis/chip/kinetis_ewm.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/kinetis/kinetis_ewm.h
+ * arch/arm/src/kinetis/chip/kinetis_ewm.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_EWM_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_EWM_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_EWM_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_EWM_H
 
 /************************************************************************************
  * Included Files
@@ -87,4 +87,4 @@
  * Public Functions
  ************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_EWM_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_EWM_H */
diff --git a/arch/arm/src/kinetis/kinetis_flexbus.h b/arch/arm/src/kinetis/chip/kinetis_flexbus.h
similarity index 97%
rename from arch/arm/src/kinetis/kinetis_flexbus.h
rename to arch/arm/src/kinetis/chip/kinetis_flexbus.h
index 37992320fb18804f50c1d985bcfe5a3e13a85bef..7c063d086976a06e039aa101ffccfe775084b21d 100644
--- a/arch/arm/src/kinetis/kinetis_flexbus.h
+++ b/arch/arm/src/kinetis/chip/kinetis_flexbus.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/kinetis/kinetis_flexbus.h
+ * arch/arm/src/kinetis/chip/kinetis_flexbus.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_FLEXBUS_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_FLEXBUS_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FLEXBUS_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FLEXBUS_H
 
 /************************************************************************************
  * Included Files
@@ -210,4 +210,4 @@
  * Public Functions
  ************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_FLEXBUS_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FLEXBUS_H */
diff --git a/arch/arm/src/kinetis/kinetis_flexcan.h b/arch/arm/src/kinetis/chip/kinetis_flexcan.h
similarity index 98%
rename from arch/arm/src/kinetis/kinetis_flexcan.h
rename to arch/arm/src/kinetis/chip/kinetis_flexcan.h
index db151d5403474d7dd1dc48ee249a8043846ae774..9d3ec74a38168c2a7ef7a0de6897dd401fdbb17e 100644
--- a/arch/arm/src/kinetis/kinetis_flexcan.h
+++ b/arch/arm/src/kinetis/chip/kinetis_flexcan.h
@@ -1,7 +1,7 @@
 /****************************************************************************************************
- * arch/arm/src/kinetis/kinetis_flexcan.h
+ * arch/arm/src/kinetis/chip/kinetis_flexcan.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ****************************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_FLEXCAN_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_FLEXCAN_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FLEXCAN_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FLEXCAN_H
 
 /****************************************************************************************************
  * Included Files
@@ -315,4 +315,4 @@
  * Public Functions
  ****************************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_FLEXCAN_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FLEXCAN_H */
diff --git a/arch/arm/src/kinetis/chip/kinetis_fmc.h b/arch/arm/src/kinetis/chip/kinetis_fmc.h
new file mode 100644
index 0000000000000000000000000000000000000000..fb5bc188876aad48668a4b1efcce6b4255288a94
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_fmc.h
@@ -0,0 +1,77 @@
+/********************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_fmc.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FMC_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FMC_H
+
+/********************************************************************************************
+ * Included Files
+ ********************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/* This file is just a wrapper around pin muxing header files for the Kinetis family selected
+ * by the logic in chip.h.
+ */
+
+#if defined(KINETIS_K20) || defined(KINETIS_K40) || defined(KINETIS_K60)
+#  include "chip/kinetis_k20k40k60fmc.h"
+#elif defined(KINETIS_K64)
+#  include "chip/kinetis_k64fmc.h"
+#elif defined(KINETIS_K66)
+#  include "chip/kinetis_k66fmc.h"
+#else
+#  error "No FMC definitions for this Kinetis part"
+#endif
+
+/********************************************************************************************
+ * Pre-processor Definitions
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Public Types
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Public Data
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Public Functions
+ ********************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FMC_H */
diff --git a/arch/arm/src/kinetis/chip/kinetis_ftfe.h b/arch/arm/src/kinetis/chip/kinetis_ftfe.h
new file mode 100644
index 0000000000000000000000000000000000000000..13794d97dbe08a6ad7809ac2a5380fde12fd0c95
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_ftfe.h
@@ -0,0 +1,159 @@
+/************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_ftfe.h
+ *
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FTFE_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FTFE_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Register Offsets *****************************************************************/
+
+#define KINETIS_FTFE_FSTAT_OFFSET   0x0000 /* Flash Status Register */
+#define KINETIS_FTFE_FCNFG_OFFSET   0x0001 /* Flash Configuration Register */
+#define KINETIS_FTFE_FSEC_OFFSET    0x0002 /* Flash Security Register */
+#define KINETIS_FTFE_FOPT_OFFSET    0x0003 /* Flash Option Register */
+
+#define KINETIS_FTFE_FCCOB3_OFFSET  0x0004 /* Flash Common Command Object Registers */
+#define KINETIS_FTFE_FCCOB2_OFFSET  0x0005 /* Flash Common Command Object Registers */
+#define KINETIS_FTFE_FCCOB1_OFFSET  0x0006 /* Flash Common Command Object Registers */
+#define KINETIS_FTFE_FCCOB0_OFFSET  0x0007 /* Flash Common Command Object Registers */
+#define KINETIS_FTFE_FCCOB7_OFFSET  0x0008 /* Flash Common Command Object Registers */
+#define KINETIS_FTFE_FCCOB6_OFFSET  0x0009 /* Flash Common Command Object Registers */
+#define KINETIS_FTFE_FCCOB5_OFFSET  0x000a /* Flash Common Command Object Registers */
+#define KINETIS_FTFE_FCCOB4_OFFSET  0x000b /* Flash Common Command Object Registers */
+#define KINETIS_FTFE_FCCOBB_OFFSET  0x000c /* Flash Common Command Object Registers */
+#define KINETIS_FTFE_FCCOBA_OFFSET  0x000d /* Flash Common Command Object Registers */
+#define KINETIS_FTFE_FCCOB9_OFFSET  0x000e /* Flash Common Command Object Registers */
+#define KINETIS_FTFE_FCCOB8_OFFSET  0x000f /* Flash Common Command Object Registers */
+#define KINETIS_FTFE_FPROT3_OFFSET  0x0010 /* Program Flash Protection Registers */
+#define KINETIS_FTFE_FPROT2_OFFSET  0x0011 /* Program Flash Protection Registers */
+#define KINETIS_FTFE_FPROT1_OFFSET  0x0012 /* Program Flash Protection Registers */
+#define KINETIS_FTFE_FPROT0_OFFSET  0x0013 /* Program Flash Protection Registers */
+#define KINETIS_FTFE_FEPROT_OFFSET  0x0016 /* EEPROM Protection Register */
+#define KINETIS_FTFE_FDPROT_OFFSET  0x0017 /* Data Flash Protection Register */
+
+/* Register Addresses ***************************************************************/
+
+#define KINETIS_FTFE_FSTAT          (KINETIS_FTFE_BASE+KINETIS_FTFE_FSTAT_OFFSET)
+#define KINETIS_FTFE_FCNFG          (KINETIS_FTFE_BASE+KINETIS_FTFE_FCNFG_OFFSET)
+#define KINETIS_FTFE_FSEC           (KINETIS_FTFE_BASE+KINETIS_FTFE_FSEC_OFFSET)
+#define KINETIS_FTFE_FOPT           (KINETIS_FTFE_BASE+KINETIS_FTFE_FOPT_OFFSET)
+#define KINETIS_FTFE_FCCOB3         (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB3_OFFSET)
+#define KINETIS_FTFE_FCCOB2         (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB2_OFFSET)
+#define KINETIS_FTFE_FCCOB1         (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB1_OFFSET)
+#define KINETIS_FTFE_FCCOB0         (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB0_OFFSET)
+#define KINETIS_FTFE_FCCOB7         (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB7_OFFSET)
+#define KINETIS_FTFE_FCCOB6         (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB6_OFFSET)
+#define KINETIS_FTFE_FCCOB5         (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB5_OFFSET)
+#define KINETIS_FTFE_FCCOB4         (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB4_OFFSET)
+#define KINETIS_FTFE_FCCOBB         (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOBB_OFFSET)
+#define KINETIS_FTFE_FCCOBA         (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOBA_OFFSET)
+#define KINETIS_FTFE_FCCOB9         (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB9_OFFSET)
+#define KINETIS_FTFE_FCCOB8         (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB8_OFFSET)
+#define KINETIS_FTFE_FPROT3         (KINETIS_FTFE_BASE+KINETIS_FTFE_FPROT3_OFFSET)
+#define KINETIS_FTFE_FPROT2         (KINETIS_FTFE_BASE+KINETIS_FTFE_FPROT2_OFFSET)
+#define KINETIS_FTFE_FPROT1         (KINETIS_FTFE_BASE+KINETIS_FTFE_FPROT1_OFFSET)
+#define KINETIS_FTFE_FPROT0         (KINETIS_FTFE_BASE+KINETIS_FTFE_FPROT0_OFFSET)
+#define KINETIS_FTFE_FEPROT         (KINETIS_FTFE_BASE+KINETIS_FTFE_FEPROT_OFFSET)
+#define KINETIS_FTFE_FDPROT         (KINETIS_FTFE_BASE+KINETIS_FTFE_FDPROT_OFFSET)
+
+/* Register Bit Definitions *********************************************************/
+
+/* Flash Status Register */
+
+#define FTFE_FSTAT_MGSTAT0          (1 << 0)  /* Bit 0:  Memory Controller Command Completion Status Flag */
+                                              /* Bits 1-3: Reserved */
+#define FTFE_FSTAT_FPVIOL           (1 << 4)  /* Bit 4:  Flash Protection Violation Flag */
+#define FTFE_FSTAT_ACCERR           (1 << 5)  /* Bit 5:  Flash Access Error Flag */
+#define FTFE_FSTAT_RDCOLERR         (1 << 6)  /* Bit 6:  FTFE Read Collision Error Flag */
+#define FTFE_FSTAT_CCIF             (1 << 7)  /* Bit 7:  Command Complete Interrupt Flag */
+
+/* Flash Configuration Register */
+
+#define FTFE_FCNFG_EEERDY           (1 << 0)  /* Bit 0:  FEEPROM backup data copied to FlexRAM */
+#define FTFE_FCNFG_RAMRDY           (1 << 1)  /* Bit 1:  RAM Ready */
+#define FTFE_FCNFG_PFLSH            (1 << 2)  /* Bit 2:  FTFE configuration */
+#define FTFE_FCNFG_SWAP             (1 << 3)  /* Bit 3:  Swap */
+#define FTFE_FCNFG_ERSSUSP          (1 << 4)  /* Bit 4:  Erase Suspend */
+#define FTFE_FCNFG_ERSAREQ          (1 << 5)  /* Bit 5:  Erase All Request */
+#define FTFE_FCNFG_RDCOLLIE         (1 << 6)  /* Bit 6:  Read Collision Error Interrupt Enable */
+#define FTFE_FCNFG_CCIE             (1 << 7)  /* Bit 7:  Command Complete Interrupt Enable */
+
+/* Flash Security Register */
+
+#define FTFE_FSEC_SEC_SHIFT         (0)       /* Bits 0-1: Flash Security */
+#define FTFE_FSEC_SEC_MASK          (3 << FTFE_FSEC_SEC_SHIFT)
+#  define FTFE_FSEC_SEC_SECURE      (0 << FTFE_FSEC_SEC_SHIFT) /* 00,01,11: status is secure */
+#  define FTFE_FSEC_SEC_UNSECURE    (2 << FTFE_FSEC_SEC_SHIFT) /* 10: status is insecure */
+#define FTFE_FSEC_FSLACC_SHIFT      (2)       /* Bits 2-3: Freescale Failure Analysis Access Code */
+#define FTFE_FSEC_FSLACC_MASK       (3 << FTFE_FSEC_FSLACC_SHIFT)
+#  define FTFE_FSEC_FSLACC_GRANTED  (0 << FTFE_FSEC_FSLACC_SHIFT) /* 00 or 11: Access granted */
+#  define FTFE_FSEC_FSLACC_DENIED   (1 << FTFE_FSEC_FSLACC_SHIFT) /* 01 or 10: Access denied */
+#define FTFE_FSEC_MEEN_SHIFT        (4)       /* Bits 4-5: Mass Erase Enable Bits */
+#define FTFE_FSEC_MEEN_MASK         (3 << FTFE_FSEC_MEEN_SHIFT)
+#  define FTFE_FSEC_MEEN_ENABLED    (0 << FTFE_FSEC_MEEN_SHIFT) /* All values are enabled */
+#define FTFE_FSEC_KEYEN_SHIFT       (6)       /* Bits 6-7: Backdoor Key Security Enable */
+#define FTFE_FSEC_KEYEN_MASK        (3 << FTFE_FSEC_KEYEN_SHIFT)
+#  define FTFE_FSEC_KEYEN_DISABLED  (1 << FTFE_FSEC_KEYEN_SHIFT) /* All values are disabled */
+
+/* Flash Option Register (32-bits, see Chip Configuration details) */
+/* Flash Common Command Object Registers (8-bit flash command data) */
+/* Program Flash Protection Registers (8-bit flash protection data) */
+/* EEPROM Protection Register (8-bit eeprom protection data) */
+/* Data Flash Protection Register (8-bit data flash protection data) */
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FTFE_H */
diff --git a/arch/arm/src/kinetis/kinetis_ftm.h b/arch/arm/src/kinetis/chip/kinetis_ftm.h
similarity index 90%
rename from arch/arm/src/kinetis/kinetis_ftm.h
rename to arch/arm/src/kinetis/chip/kinetis_ftm.h
index 2f031b5dd9b68e6e1d71831b638a213f72478d04..1402f5e8d8a3af88caace4bc3e0d17d6d12b8b0d 100644
--- a/arch/arm/src/kinetis/kinetis_ftm.h
+++ b/arch/arm/src/kinetis/chip/kinetis_ftm.h
@@ -1,7 +1,7 @@
 /********************************************************************************************
- * arch/arm/src/kinetis/kinetis_ftm.h
+ * arch/arm/src/kinetis/chip/kinetis_ftm.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ********************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_FTM_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_FTM_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FTM_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FTM_H
 
 /********************************************************************************************
  * Included Files
@@ -228,6 +228,50 @@
 #define KINETIS_FTM2_SWOCTRL         (KINETIS_FTM2_BASE+KINETIS_FTM_SWOCTRL_OFFSET)
 #define KINETIS_FTM2_PWMLOAD         (KINETIS_FTM2_BASE+KINETIS_FTM_PWMLOAD_OFFSET)
 
+#define KINETIS_FTM3_SC              (KINETIS_FTM3_BASE+KINETIS_FTM_SC_OFFSET)
+#define KINETIS_FTM3_CNT             (KINETIS_FTM3_BASE+KINETIS_FTM_CNT_OFFSET)
+#define KINETIS_FTM3_MOD             (KINETIS_FTM3_BASE+KINETIS_FTM_MOD_OFFSET)
+
+#define KINETIS_FTM3_CSC(n)          (KINETIS_FTM3_BASE+KINETIS_FTM_CSC_OFFSET(n))
+#define KINETIS_FTM3_CV(n)           (KINETIS_FTM3_BASE+KINETIS_FTM_CV_OFFSET(n))
+#define KINETIS_FTM3_C0SC            (KINETIS_FTM3_BASE+KINETIS_FTM_C0SC_OFFSET)
+#define KINETIS_FTM3_C0V             (KINETIS_FTM3_BASE+KINETIS_FTM_C0V_OFFSET)
+#define KINETIS_FTM3_C1SC            (KINETIS_FTM3_BASE+KINETIS_FTM_C1SC_OFFSET)
+#define KINETIS_FTM3_C1V             (KINETIS_FTM3_BASE+KINETIS_FTM_C1V_OFFSET)
+#define KINETIS_FTM3_C2SC            (KINETIS_FTM3_BASE+KINETIS_FTM_C2SC_OFFSET)
+#define KINETIS_FTM3_C2V             (KINETIS_FTM3_BASE+KINETIS_FTM_C2V_OFFSET)
+#define KINETIS_FTM3_C3SC            (KINETIS_FTM3_BASE+KINETIS_FTM_C3SC_OFFSET)
+#define KINETIS_FTM3_C3V             (KINETIS_FTM3_BASE+KINETIS_FTM_C3V_OFFSET)
+#define KINETIS_FTM3_C4SC            (KINETIS_FTM3_BASE+KINETIS_FTM_C4SC_OFFSET)
+#define KINETIS_FTM3_C4V             (KINETIS_FTM3_BASE+KINETIS_FTM_C4V_OFFSET)
+#define KINETIS_FTM3_C5SC            (KINETIS_FTM3_BASE+KINETIS_FTM_C5SC_OFFSET)
+#define KINETIS_FTM3_C5V             (KINETIS_FTM3_BASE+KINETIS_FTM_C5V_OFFSET)
+#define KINETIS_FTM3_C6SC            (KINETIS_FTM3_BASE+KINETIS_FTM_C6SC_OFFSET)
+#define KINETIS_FTM3_C6V             (KINETIS_FTM3_BASE+KINETIS_FTM_C6V_OFFSET)
+#define KINETIS_FTM3_C7SC            (KINETIS_FTM3_BASE+KINETIS_FTM_C7SC_OFFSET)
+#define KINETIS_FTM3_C7V             (KINETIS_FTM3_BASE+KINETIS_FTM_C7V_OFFSET)
+
+#define KINETIS_FTM3_CNTIN           (KINETIS_FTM3_BASE+KINETIS_FTM_CNTIN_OFFSET)
+#define KINETIS_FTM3_STATUS          (KINETIS_FTM3_BASE+KINETIS_FTM_STATUS_OFFSET)
+#define KINETIS_FTM3_MODE            (KINETIS_FTM3_BASE+KINETIS_FTM_MODE_OFFSET)
+#define KINETIS_FTM3_SYNC            (KINETIS_FTM3_BASE+KINETIS_FTM_SYNC_OFFSET)
+#define KINETIS_FTM3_OUTINIT         (KINETIS_FTM3_BASE+KINETIS_FTM_OUTINIT_OFFSET)
+#define KINETIS_FTM3_OUTMASK         (KINETIS_FTM3_BASE+KINETIS_FTM_OUTMASK_OFFSET)
+#define KINETIS_FTM3_COMBINE         (KINETIS_FTM3_BASE+KINETIS_FTM_COMBINE_OFFSET)
+#define KINETIS_FTM3_DEADTIME        (KINETIS_FTM3_BASE+KINETIS_FTM_DEADTIME_OFFSET)
+#define KINETIS_FTM3_EXTTRIG         (KINETIS_FTM3_BASE+KINETIS_FTM_EXTTRIG_OFFSET)
+#define KINETIS_FTM3_POL             (KINETIS_FTM3_BASE+KINETIS_FTM_POL_OFFSET)
+#define KINETIS_FTM3_FMS             (KINETIS_FTM3_BASE+KINETIS_FTM_FMS_OFFSET)
+#define KINETIS_FTM3_FILTER          (KINETIS_FTM3_BASE+KINETIS_FTM_FILTER_OFFSET)
+#define KINETIS_FTM3_FLTCTRL         (KINETIS_FTM3_BASE+KINETIS_FTM_FLTCTRL_OFFSET)
+#define KINETIS_FTM3_QDCTRL          (KINETIS_FTM3_BASE+KINETIS_FTM_QDCTRL_OFFSET)
+#define KINETIS_FTM3_CONF            (KINETIS_FTM3_BASE+KINETIS_FTM_CONF_OFFSET)
+#define KINETIS_FTM3_FLTPOL          (KINETIS_FTM3_BASE+KINETIS_FTM_FLTPOL_OFFSET)
+#define KINETIS_FTM3_SYNCONF         (KINETIS_FTM3_BASE+KINETIS_FTM_SYNCONF_OFFSET)
+#define KINETIS_FTM3_INVCTRL         (KINETIS_FTM3_BASE+KINETIS_FTM_INVCTRL_OFFSET)
+#define KINETIS_FTM3_SWOCTRL         (KINETIS_FTM3_BASE+KINETIS_FTM_SWOCTRL_OFFSET)
+#define KINETIS_FTM3_PWMLOAD         (KINETIS_FTM3_BASE+KINETIS_FTM_PWMLOAD_OFFSET)
+
 /* Register Bit Definitions *****************************************************************/
 
 /* Status and Control */
@@ -525,4 +569,4 @@
  * Public Functions
  ********************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_FTM_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FTM_H */
diff --git a/arch/arm/src/kinetis/kinetis_gpio.h b/arch/arm/src/kinetis/chip/kinetis_gpio.h
similarity index 100%
rename from arch/arm/src/kinetis/kinetis_gpio.h
rename to arch/arm/src/kinetis/chip/kinetis_gpio.h
diff --git a/arch/arm/src/kinetis/chip/kinetis_i2c.h b/arch/arm/src/kinetis/chip/kinetis_i2c.h
new file mode 100644
index 0000000000000000000000000000000000000000..95cd965ca84e5d36591b7e233cc233e8f62d5e96
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_i2c.h
@@ -0,0 +1,295 @@
+/********************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_i2c.h
+ *
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_I2CE_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_I2CE_H
+
+/********************************************************************************************
+ * Included Files
+ ********************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/********************************************************************************************
+ * Pre-processor Definitions
+ ********************************************************************************************/
+
+/* Register Offsets *************************************************************************/
+
+#define KINETIS_I2C_A1_OFFSET    0x0000 /* I2C Address Register 1 */
+#define KINETIS_I2C_F_OFFSET     0x0001 /* I2C Frequency Divider register */
+#define KINETIS_I2C_C1_OFFSET    0x0002 /* I2C Control Register 1 */
+#define KINETIS_I2C_S_OFFSET     0x0003 /* I2C Status Register */
+#define KINETIS_I2C_D_OFFSET     0x0004 /* I2C Data I/O register */
+#define KINETIS_I2C_C2_OFFSET    0x0005 /* I2C Control Register 2 */
+#define KINETIS_I2C_FLT_OFFSET   0x0006 /* I2C Programmable Input Glitch Filter register */
+#define KINETIS_I2C_RA_OFFSET    0x0007 /* I2C Range Address register */
+#define KINETIS_I2C_SMB_OFFSET   0x0008 /* I2C SMBus Control and Status register */
+#define KINETIS_I2C_A2_OFFSET    0x0009 /* I2C Address Register 2 */
+#define KINETIS_I2C_SLTH_OFFSET  0x000a /* I2C SCL Low Timeout Register High */
+#define KINETIS_I2C_SLTL_OFFSET  0x000b /* I2C SCL Low Timeout Register Low */
+
+/* Register Addresses ***********************************************************************/
+
+#define KINETIS_I2C0_A1          (KINETIS_I2C0_BASE+KINETIS_I2C_A1_OFFSET)
+#define KINETIS_I2C0_F           (KINETIS_I2C0_BASE+KINETIS_I2C_F_OFFSET)
+#define KINETIS_I2C0_C1          (KINETIS_I2C0_BASE+KINETIS_I2C_C1_OFFSET)
+#define KINETIS_I2C0_S           (KINETIS_I2C0_BASE+KINETIS_I2C_S_OFFSET)
+#define KINETIS_I2C0_D           (KINETIS_I2C0_BASE+KINETIS_I2C_D_OFFSET)
+#define KINETIS_I2C0_C2          (KINETIS_I2C0_BASE+KINETIS_I2C_C2_OFFSET)
+#define KINETIS_I2C0_FLT         (KINETIS_I2C0_BASE+KINETIS_I2C_FLT_OFFSET)
+#define KINETIS_I2C0_RA          (KINETIS_I2C0_BASE+KINETIS_I2C_RA_OFFSET)
+#define KINETIS_I2C0_SMB         (KINETIS_I2C0_BASE+KINETIS_I2C_SMB_OFFSET)
+#define KINETIS_I2C0_A2          (KINETIS_I2C0_BASE+KINETIS_I2C_A2_OFFSET)
+#define KINETIS_I2C0_SLTH        (KINETIS_I2C0_BASE+KINETIS_I2C_SLTH_OFFSET)
+#define KINETIS_I2C0_SLTL        (KINETIS_I2C0_BASE+KINETIS_I2C_SLTL_OFFSET)
+
+#ifdef CONFIG_KINETIS_HAVE_I2C1
+#  define KINETIS_I2C1_A1        (KINETIS_I2C1_BASE+KINETIS_I2C_A1_OFFSET)
+#  define KINETIS_I2C1_F         (KINETIS_I2C1_BASE+KINETIS_I2C_F_OFFSET)
+#  define KINETIS_I2C1_C1        (KINETIS_I2C1_BASE+KINETIS_I2C_C1_OFFSET)
+#  define KINETIS_I2C1_S         (KINETIS_I2C1_BASE+KINETIS_I2C_S_OFFSET)
+#  define KINETIS_I2C1_D         (KINETIS_I2C1_BASE+KINETIS_I2C_D_OFFSET)
+#  define KINETIS_I2C1_C2        (KINETIS_I2C1_BASE+KINETIS_I2C_C2_OFFSET)
+#  define KINETIS_I2C1_FLT       (KINETIS_I2C1_BASE+KINETIS_I2C_FLT_OFFSET)
+#  define KINETIS_I2C1_RA        (KINETIS_I2C1_BASE+KINETIS_I2C_RA_OFFSET)
+#  define KINETIS_I2C1_SMB       (KINETIS_I2C1_BASE+KINETIS_I2C_SMB_OFFSET)
+#  define KINETIS_I2C1_A2        (KINETIS_I2C1_BASE+KINETIS_I2C_A2_OFFSET)
+#  define KINETIS_I2C1_SLTH      (KINETIS_I2C1_BASE+KINETIS_I2C_SLTH_OFFSET)
+#  define KINETIS_I2C1_SLTL      (KINETIS_I2C1_BASE+KINETIS_I2C_SLTL_OFFSET)
+#endif
+
+#ifdef CONFIG_KINETIS_HAVE_I2C2
+#  define KINETIS_I2C2_A1        (KINETIS_I2C2_BASE+KINETIS_I2C_A1_OFFSET)
+#  define KINETIS_I2C2_F         (KINETIS_I2C2_BASE+KINETIS_I2C_F_OFFSET)
+#  define KINETIS_I2C2_C1        (KINETIS_I2C2_BASE+KINETIS_I2C_C1_OFFSET)
+#  define KINETIS_I2C2_S         (KINETIS_I2C2_BASE+KINETIS_I2C_S_OFFSET)
+#  define KINETIS_I2C2_D         (KINETIS_I2C2_BASE+KINETIS_I2C_D_OFFSET)
+#  define KINETIS_I2C2_C2        (KINETIS_I2C2_BASE+KINETIS_I2C_C2_OFFSET)
+#  define KINETIS_I2C2_FLT       (KINETIS_I2C2_BASE+KINETIS_I2C_FLT_OFFSET)
+#  define KINETIS_I2C2_RA        (KINETIS_I2C2_BASE+KINETIS_I2C_RA_OFFSET)
+#  define KINETIS_I2C2_SMB       (KINETIS_I2C2_BASE+KINETIS_I2C_SMB_OFFSET)
+#  define KINETIS_I2C2_A2        (KINETIS_I2C2_BASE+KINETIS_I2C_A2_OFFSET)
+#  define KINETIS_I2C2_SLTH      (KINETIS_I2C2_BASE+KINETIS_I2C_SLTH_OFFSET)
+#  define KINETIS_I2C2_SLTL      (KINETIS_I2C2_BASE+KINETIS_I2C_SLTL_OFFSET)
+#endif
+
+/* Register Bit Definitions *****************************************************************/
+
+/* I2C Address Register 1 (8-bit) */
+                                           /* Bit 0: Reserved */
+#define I2C_A1_SHIFT             (1)       /* Bits 1-7: Address */
+#define I2C_A1_MASK              (0x7f << I2C_A1_SHIFT)
+
+/* I2C Frequency Divider register (8-bit) */
+
+#define I2C_F_ICR_SHIFT          (0)       /* Bits 0-5: Clock rate */
+#define I2C_F_ICR_MASK           (0x3f << I2C_F_ICR_SHIFT)
+#  define I2C_F_ICR(n)           ((uint8_t)(n) << I2C_F_ICR_SHIFT)
+#define I2C_F_MULT_SHIFT         (6)       /* Bits 6-7: Multiplier factor */
+#define I2C_F_MULT_MASK          (3 << I2C_F_MULT_SHIFT)
+#  define I2C_F_MULT_1           (0 << I2C_F_MULT_SHIFT)
+#  define I2C_F_MULT_2           (1 << I2C_F_MULT_SHIFT)
+#  define I2C_F_MULT_4           (2 << I2C_F_MULT_SHIFT)
+
+/* From Table 51-54. I2C divider and hold values.  Duplicate divider values differ in hold
+ * times.  Refer to the Table 51-54. in the K64 Sub-Family Reference Manual.
+ */
+
+#define I2C_F_DIV20              ((uint8_t)0x00)
+#define I2C_F_DIV22              ((uint8_t)0x01)
+#define I2C_F_DIV24              ((uint8_t)0x02)
+#define I2C_F_DIV26              ((uint8_t)0x03)
+#define I2C_F_DIV28              ((uint8_t)0x04)
+#define I2C_F_DIV30              ((uint8_t)0x05)
+#define I2C_F_DIV34              ((uint8_t)0x06)
+#define I2C_F_DIV36              ((uint8_t)0x0a)
+#define I2C_F_DIV40_1            ((uint8_t)0x07)
+#define I2C_F_DIV41              ((uint8_t)0x08)
+
+#define I2C_F_DIV32              ((uint8_t)0x09)
+#define I2C_F_DIV36              ((uint8_t)0x0a)
+#define I2C_F_DIV40_2            ((uint8_t)0x0b)
+#define I2C_F_DIV44              ((uint8_t)0x0c)
+#define I2C_F_DIV48_1            ((uint8_t)0x0d)
+#define I2C_F_DIV56_1            ((uint8_t)0x0e)
+#define I2C_F_DIV68              ((uint8_t)0x0f)
+
+#define I2C_F_DIV48_2            ((uint8_t)0x10)
+#define I2C_F_DIV56_2            ((uint8_t)0x11)
+#define I2C_F_DIV64              ((uint8_t)0x12)
+#define I2C_F_DIV72              ((uint8_t)0x13)
+#define I2C_F_DIV80_1            ((uint8_t)0x14)
+#define I2C_F_DIV88              ((uint8_t)0x15)
+#define I2C_F_DIV104             ((uint8_t)0x16)
+#define I2C_F_DIV128_1           ((uint8_t)0x17)
+
+#define I2C_F_DIV80_2            ((uint8_t)0x18)
+#define I2C_F_DIV96              ((uint8_t)0x19)
+#define I2C_F_DIV112             ((uint8_t)0x1a)
+#define I2C_F_DIV128_2           ((uint8_t)0x1b)
+#define I2C_F_DIV144             ((uint8_t)0x1c)
+#define I2C_F_DIV160_1           ((uint8_t)0x1d)
+#define I2C_F_DIV192_1           ((uint8_t)0x1e)
+#define I2C_F_DIV240             ((uint8_t)0x1f)
+
+#define I2C_F_DIV160_2           ((uint8_t)0x20)
+#define I2C_F_DIV192_2           ((uint8_t)0x1e)
+#define I2C_F_DIV224             ((uint8_t)0x22)
+#define I2C_F_DIV256             ((uint8_t)0x23)
+#define I2C_F_DIV288             ((uint8_t)0x24)
+#define I2C_F_DIV320_1           ((uint8_t)0x25)
+#define I2C_F_DIV384_1           ((uint8_t)0x26)
+#define I2C_F_DIV480             ((uint8_t)0x27)
+
+#define I2C_F_DIV320_2           ((uint8_t)0x28)
+#define I2C_F_DIV384_2           ((uint8_t)0x29)
+#define I2C_F_DIV448             ((uint8_t)0x2a)
+#define I2C_F_DIV512             ((uint8_t)0x2b)
+#define I2C_F_DIV576             ((uint8_t)0x2c)
+#define I2C_F_DIV640_1           ((uint8_t)0x2d)
+#define I2C_F_DIV768_1           ((uint8_t)0x2e)
+#define I2C_F_DIV960             ((uint8_t)0x2f)
+
+#define I2C_F_DIV640_2           ((uint8_t)0x30)
+#define I2C_F_DIV768_3           ((uint8_t)0x31)
+#define I2C_F_DIV896             ((uint8_t)0x32)
+#define I2C_F_DIV1024            ((uint8_t)0x33)
+#define I2C_F_DIV1152            ((uint8_t)0x34)
+#define I2C_F_DIV1280_1          ((uint8_t)0x35)
+#define I2C_F_DIV1536_1          ((uint8_t)0x36)
+#define I2C_F_DIV1920            ((uint8_t)0x37)
+
+#define I2C_F_DIV1280_2          ((uint8_t)0x38)
+#define I2C_F_DIV1536_2          ((uint8_t)0x39)
+#define I2C_F_DIV1792            ((uint8_t)0x3a)
+#define I2C_F_DIV2048            ((uint8_t)0x3b)
+#define I2C_F_DIV2304            ((uint8_t)0x3c)
+#define I2C_F_DIV2560            ((uint8_t)0x3d)
+#define I2C_F_DIV3072            ((uint8_t)0x3e)
+#define I2C_F_DIV3840            ((uint8_t)0x3f)
+
+/* I2C Control Register 1 (8-bit) */
+
+#define I2C_C1_DMAEN             (1 << 0)  /* Bit 0:  DMA enable */
+#define I2C_C1_WUEN              (1 << 1)  /* Bit 1:  Wakeup enable */
+#define I2C_C1_RSTA              (1 << 2)  /* Bit 2:  Repeat START */
+#define I2C_C1_TXAK              (1 << 3)  /* Bit 3:  Transmit acknowledge enable */
+#define I2C_C1_TX                (1 << 4)  /* Bit 4:  Transmit mode select */
+#define I2C_C1_MST               (1 << 5)  /* Bit 5:  Master mode select */
+#define I2C_C1_IICIE             (1 << 6)  /* Bit 6:  I2C interrupt enable */
+#define I2C_C1_IICEN             (1 << 7)  /* Bit 7:  I2C enable */
+
+/* I2C Status Register (8-bit) */
+
+#define I2C_S_RXAK               (1 << 0)  /* Bit 0:  Receive acknowledge */
+#define I2C_S_IICIF              (1 << 1)  /* Bit 1:  Interrupt flag */
+#define I2C_S_SRW                (1 << 2)  /* Bit 2:  Slave read/write */
+#define I2C_S_RAM                (1 << 3)  /* Bit 3:  Range address match */
+#define I2C_S_ARBL               (1 << 4)  /* Bit 4:  Arbitration lost */
+#define I2C_S_BUSY               (1 << 5)  /* Bit 5:  Bus busy */
+#define I2C_S_IAAS               (1 << 6)  /* Bit 6:  Addressed as a slave */
+#define I2C_S_TCF                (1 << 7)  /* Bit 7:  Transfer complete flag */
+
+/* I2C Data I/O register (8-bit data register) */
+
+/* I2C Control Register 2 (8-bit) */
+
+#define I2C_C2_AD_SHIFT          (0)       /* Bits 0-2: Slave address */
+#define I2C_C2_AD_MASK           (7 << I2C_C2_AD_SHIFT)
+#  define I2C_C2_AD(n)           ((uint8_t)(n) << I2C_C2_AD_SHIFT)
+#define I2C_C2_RMEN              (1 << 3)  /* Bit 3:  Range address matching enable */
+#define I2C_C2_SBRC              (1 << 4)  /* Bit 4:  Slave baud rate control */
+#define I2C_C2_HDRS              (1 << 5)  /* Bit 5:  High drive select */
+#define I2C_C2_ADEXT             (1 << 6)  /* Bit 6:  Address extension */
+#define I2C_C2_GCAEN             (1 << 7)  /* Bit 7:  General call address enable */
+
+/* I2C Programmable Input Glitch Filter register (8-bit) */
+
+#if defined(KINETIS_K20) || defined(KINETIS_K40) || defined(KINETIS_K60)
+#  define I2C_FLT_SHIFT          (0)       /* Bits 0-4: I2C programmable filter factor */
+#  define I2C_FLT_MASK           (31 << I2C_FLT_SHIFT)
+#    define I2C_FLT(n)           ((uint8_t)(n) << I2C_FLT_SHIFT)
+                                           /* Bits 5-7: Reserved */
+#endif
+
+#if defined(KINETIS_K64) || defined(KINETIS_K66)
+#  define I2C_FLT_SHIFT          (0)       /* Bits 0-3: I2C programmable filter factor */
+#  define I2C_FLT_MASK           (15 << I2C_FLT_SHIFT)
+#    define I2C_FLT(n)           ((uint8_t)(n) << I2C_FLT_SHIFT)
+#  define I2C_FLT_STARTF         (1 << 4)  /* I2C bus start detect flag */
+#  define I2C_FLT_SSIE           (1 << 5)  /* I2C bus stop or start interrupt enable */
+#  define I2C_FLT_STOPF          (1 << 6)  /* I2C bus stop detect flag */
+#  define I2C_FLT_SHEN           (1 << 7)  /* Stop hold enable */
+#endif
+
+/* I2C Range Address register (8-bit) */
+                                           /* Bit 0: Reserved */
+#define I2C_RA_SHIFT             (1)       /* Bits 1-7: Range slave address */
+#define I2C_RA_MASK              (0x7f << I2C_RA_SHIFT)
+
+/* I2C SMBus Control and Status register (8-bit) */
+
+#define I2C_SMB_SHTF2IE          (1 << 0)  /* Bit 0:  SHTF2 interrupt enable */
+#define I2C_SMB_SHTF2            (1 << 1)  /* Bit 1:  SCL high timeout flag 2 */
+#define I2C_SMB_SHTF1            (1 << 2)  /* Bit 2:  SCL high timeout flag 1 */
+#define I2C_SMB_SLTF             (1 << 3)  /* Bit 3:  SCL low timeout flag */
+#define I2C_SMB_TCKSEL           (1 << 4)  /* Bit 4:  Timeout counter clock select */
+#define I2C_SMB_SIICAEN          (1 << 5)  /* Bit 5:  Second I2C address enable */
+#define I2C_SMB_ALERTEN          (1 << 6)  /* Bit 6:  SMBus alert response address enable */
+#define I2C_SMB_FACK             (1 << 7)  /* Bit 7:  Fast NACK/ACK enable */
+
+/* I2C Address Register 2 (8-bit) */
+                                           /* Bit 0: Reserved */
+#define I2C_A2_SHIFT             (1)       /* Bits 1-7: SMBus address */
+#define I2C_A2_MASK              (0x7f << I2C_A2_SHIFT)
+
+/* I2C SCL Low Timeout Register High/Low (16-bit data in two 8-bit registers) */
+
+/********************************************************************************************
+ * Public Types
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Public Data
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Public Functions
+ ********************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_I2CE_H */
diff --git a/arch/arm/src/kinetis/kinetis_i2s.h b/arch/arm/src/kinetis/chip/kinetis_i2s.h
similarity index 98%
rename from arch/arm/src/kinetis/kinetis_i2s.h
rename to arch/arm/src/kinetis/chip/kinetis_i2s.h
index 11bcc0995562bbb550a7380bf8191bf8534e2c42..5de08843bb078e71422f3b61270dbb821306489f 100644
--- a/arch/arm/src/kinetis/kinetis_i2s.h
+++ b/arch/arm/src/kinetis/chip/kinetis_i2s.h
@@ -1,7 +1,7 @@
 /****************************************************************************************************
- * arch/arm/src/kinetis/kinetis_i2s.h
+ * arch/arm/src/kinetis/chip/kinetis_i2s.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ****************************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_I2S_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_I2S_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_I2S_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_I2S_H
 
 /****************************************************************************************************
  * Included Files
@@ -294,4 +294,4 @@
  * Public Functions
  ****************************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_I2S_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_I2S_H */
diff --git a/arch/arm/src/kinetis/kinetis_fmc.h b/arch/arm/src/kinetis/chip/kinetis_k20k40k60fmc.h
similarity index 97%
rename from arch/arm/src/kinetis/kinetis_fmc.h
rename to arch/arm/src/kinetis/chip/kinetis_k20k40k60fmc.h
index 66f3a390926777330a36fed3374cc2a7632741d7..8dce4d682ef0289abb74d260a66c4b7b27b4633b 100644
--- a/arch/arm/src/kinetis/kinetis_fmc.h
+++ b/arch/arm/src/kinetis/chip/kinetis_k20k40k60fmc.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/kinetis/kinetis_fmc.h
+ * arch/arm/src/kinetis/kinetis_k20k40k60fmc.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_FMC_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_FMC_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K20K40K60FMC_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K20K40K60FMC_H
 
 /************************************************************************************
  * Included Files
@@ -50,13 +50,13 @@
 
 /* Register Offsets *****************************************************************/
 
-#define KINETIS_FMC_PFAPR_OFFSET    0x0000 /* Flash Access Protection Register */
-#define KINETIS_FMC_PFB0CR_OFFSET   0x0004 /* Flash Bank 0 Control Register */
-#define KINETIS_FMC_PFB1CR_OFFSET   0x0008 /* Flash Bank 1 Control Register */
+#define KINETIS_FMC_PFAPR_OFFSET        0x0000 /* Flash Access Protection Register */
+#define KINETIS_FMC_PFB0CR_OFFSET       0x0004 /* Flash Bank 0 Control Register */
+#define KINETIS_FMC_PFB1CR_OFFSET       0x0008 /* Flash Bank 1 Control Register */
 
 /* Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */
 
-#define KINETIS_FMC_TAGVD_OFFSET(w,s) (0x100+((w)<<5)+((s)<<2))
+#define KINETIS_FMC_TAGVD_OFFSET(w,s)   (0x100 + ((w) << 5) + ((s) << 2))
 
 #define KINETIS_FMC_TAGVDW0S0_OFFSET    0x0100 /* Cache Directory Storage */
 #define KINETIS_FMC_TAGVDW0S1_OFFSET    0x0104 /* Cache Directory Storage */
@@ -96,8 +96,8 @@
 
 /* Cache Data Storage (upper and lower) for way=w and set=s, w=0..3, s=0..7 */
 
-#define KINETIS_FMC_DATAU_OFFSET(w,s) (0x200+((w)<<6)+((s)<<2))
-#define KINETIS_FMC_DATAL_OFFSET(w,s) (0x204+((w)<<6)+((s)<<2))
+#define KINETIS_FMC_DATAU_OFFSET(w,s)   (0x200 + ((w) << 6) + ((s) << 2))
+#define KINETIS_FMC_DATAL_OFFSET(w,s)   (0x204 + ((w) << 6) + ((s) << 2))
 
 #define KINETIS_FMC_DATAW0S0U_OFFSET    0x0200 /* Cache Data Storage (upper word) */
 #define KINETIS_FMC_DATAW0S0L_OFFSET    0x0204 /* Cache Data Storage (lower word) */
@@ -386,4 +386,4 @@
  * Public Functions
  ************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_FMC_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K20K40K60FMC_H */
diff --git a/arch/arm/src/kinetis/kinetis_mpu.h b/arch/arm/src/kinetis/chip/kinetis_k20k40k60mpu.h
similarity index 100%
rename from arch/arm/src/kinetis/kinetis_mpu.h
rename to arch/arm/src/kinetis/chip/kinetis_k20k40k60mpu.h
diff --git a/arch/arm/src/kinetis/chip/kinetis_k20memorymap.h b/arch/arm/src/kinetis/chip/kinetis_k20memorymap.h
new file mode 100644
index 0000000000000000000000000000000000000000..7d5aa615cd3512c74c66304030e973ea17f3a229
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_k20memorymap.h
@@ -0,0 +1,180 @@
+/************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_k20memorymap.h
+ *
+ *   Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K20MEMORYMAP_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K20MEMORYMAP_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+#ifdef KINETIS_K20
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Memory Map ***********************************************************************/
+/* K20 Family
+ *
+ * The memory map for the following parts is defined in Freescale document
+ * K20P64M72SF1RM
+ */
+
+#define KINETIS_FLASH_BASE     0x00000000  /* –0x0fffffff Program flash and read-
+                                            *             only data (Includes exception
+                                            *             vectors in first 1024 bytes) */
+#if !defined(KINETIS_FLEXMEM_SIZE)
+#  define KINETIS_FLEXNVM_BASE 0x10000000  /* –0x13ffffff FlexNVM */
+#  define KINETIS_FLEXRAM_BASE 0x14000000  /* –0x17ffffff FlexRAM */
+#endif
+                             /* 0x18000000  * –0x1bffffff Reserved */
+#define KINETIS_SRAML_BASE     0x1c000000  /* –0x1fffffff SRAM_L: Lower SRAM
+                                            *             (ICODE/DCODE) */
+#define KINETIS_SRAMU_BASE     0x20000000  /* –0x200fffff SRAM_U: Upper SRAM bitband
+                                            *             region */
+                             /* 0x20100000  * –0x21ffffff Reserved */
+#define KINETIS_SALIAS_BASE    0x22000000  /* –0x23ffffff Aliased to SRAM_U bitband */
+                             /* 0x24000000  * –0x3fffffff Reserved */
+#define KINETIS_BRIDGE0_BASE   0x40000000  /* –0x4007ffff Bitband region for peripheral
+                                            *             bridge 0 (AIPS-Lite0) */
+#define KINETIS_BRIDGE1_BASE   0x40080000  /* –0x400fffff Bitband region for peripheral
+                                            *             bridge 1 (AIPS-Lite1) */
+#define KINETIS_GPIOBB_BASE    0x400ff000  /* –0x400fffff Bitband region for general
+                                            *             purpose input/output (GPIO) */
+                             /* 0x40100000  * –0x41ffffff Reserved */
+#define KINETIS_PALIAS_BASE    0x42000000  /* –0x43ffffff Aliased to peripheral bridge
+                                            *             (AIPS-Lite) and general purpose
+                                            *             input/output (GPIO) bitband */
+                             /* 0x44000000  * –0xdfffffff Reserved */
+#define KINETIS_PERIPH_BASE    0xe0000000  /* –0xe00fffff Private peripherals */
+                             /* 0xe0100000  * –0xffffffff Reserved */
+
+/* Peripheral Bridge 0 Memory Map ***************************************************/
+
+#define KINETIS_AIPS0_BASE     0x40000000  /* Peripheral bridge 0 (AIPS-Lite 0) */
+#define KINETIS_XBAR_BASE      0x40004000  /* Crossbar switch */
+#define KINETIS_DMAC_BASE      0x40008000  /* DMA controller */
+#define KINETIS_DMADESC_BASE   0x40009000  /* DMA controller transfer control descriptors */
+#define KINETIS_FMC_BASE       0x4001f000  /* Flash memory controller */
+#define KINETIS_FTFL_BASE      0x40020000  /* Flash memory */
+#define KINETIS_DMAMUX0_BASE   0x40021000  /* DMA channel mutiplexer 0 */
+#define KINETIS_CAN0_BASE      0x40024000  /* FlexCAN 0 */
+#define KINETIS_SPI0_BASE      0x4002c000  /* SPI 0 */
+#define KINETIS_SPI1_BASE      0x4002d000  /* SPI 1 */
+#define KINETIS_I2S0_BASE      0x4002f000  /* I2S 0 */
+#define KINETIS_CRC_BASE       0x40032000  /* CRC */
+#define KINETIS_USBDCD_BASE    0x40035000  /* USB DCD */
+#define KINETIS_PDB0_BASE      0x40036000  /* Programmable delay block */
+#define KINETIS_PIT_BASE       0x40037000  /* Periodic interrupt timers (PIT) */
+#define KINETIS_FTM0_BASE      0x40038000  /* FlexTimer 0 */
+#define KINETIS_FTM1_BASE      0x40039000  /* FlexTimer 1 */
+#define KINETIS_ADC0_BASE      0x4003b000  /* Analog-to-digital converter (ADC) 0 */
+#define KINETIS_RTC_BASE       0x4003d000  /* Real time clock */
+#define KINETIS_VBATR_BASE     0x4003e000  /* VBAT register file */
+#define KINETIS_LPTMR_BASE     0x40040000  /* Low power timer */
+#define KINETIS_SYSR_BASE      0x40041000  /* System register file */
+#define KINETIS_TSI0_BASE      0x40045000  /* Touch sense interface */
+#define KINETIS_SIMLP_BASE     0x40047000  /* SIM low-power logic */
+#define KINETIS_SIM_BASE       0x40048000  /* System integration module (SIM) */
+#define KINETIS_PORT_BASE(n)   (0x40049000 + ((n) << 12))
+#define KINETIS_PORTA_BASE     0x40049000  /* Port A multiplexing control */
+#define KINETIS_PORTB_BASE     0x4004a000  /* Port B multiplexing control */
+#define KINETIS_PORTC_BASE     0x4004b000  /* Port C multiplexing control */
+#define KINETIS_PORTD_BASE     0x4004c000  /* Port D multiplexing control */
+#define KINETIS_PORTE_BASE     0x4004d000  /* Port E multiplexing control */
+#define KINETIS_WDOG_BASE      0x40052000  /* Software watchdog */
+#define KINETIS_EWM_BASE       0x40061000  /* External watchdog */
+#define KINETIS_CMT_BASE       0x40062000  /* Carrier modulator timer (CMT) */
+#define KINETIS_MCG_BASE       0x40064000  /* Multi-purpose Clock Generator (MCG) */
+#define KINETIS_OSC_BASE       0x40065000  /* System oscillator (OSC) */
+#define KINETIS_I2C0_BASE      0x40066000  /* I2C 0 */
+#define KINETIS_I2C1_BASE      0x40067000  /* I2C 1 */
+#define KINETIS_UART0_BASE     0x4006a000  /* UART0 */
+#define KINETIS_UART1_BASE     0x4006b000  /* UART1 */
+#define KINETIS_UART2_BASE     0x4006c000  /* UART2 */
+#define KINETIS_USB0_BASE      0x40072000  /* USB OTG FS/LS */
+#define KINETIS_CMP_BASE       0x40073000  /* Analog comparator (CMP) / 6-bit digital-to-analog converter (DAC) */
+#define KINETIS_VREF_BASE      0x40074000  /* Voltage reference (VREF) */
+#define KINETIS_LLWU_BASE      0x4007c000  /* Low-leakage wakeup unit (LLWU) */
+#define KINETIS_PMC_BASE       0x4007d000  /* Power management controller (PMC) */
+#define KINETIS_SMC_BASE       0x4007e000  /* System Mode controller (SMC) */
+
+/* Peripheral Bridge 1 Memory Map ***************************************************/
+
+#define KINETIS_AIPS1_BASE     0x40080000  /* Peripheral bridge 1 (AIPS-Lite 1) */
+#define KINETIS_FTM2_BASE      0x400b8000  /* FlexTimer 2 */
+#define KINETIS_ADC1_BASE      0x400bb000  /* Analog-to-digital converter (ADC) 1 */
+#define KINETIS_DAC0_BASE      0x400cc000  /* 12-bit digital-to-analog converter (DAC) 0 */
+
+#define KINETIS_XBARSS_BASE    0x400ff000  /* Not an AIPS-Lite slot. The 32-bit general
+                                            * purpose input/output module that shares the
+                                            * crossbar switch slave port with the AIPS-Lite
+                                            * is accessed at this address. */
+#define KINETIS_GPIO_BASE(n)   (0x400ff000 + ((n) << 6))
+#define KINETIS_GPIOA_BASE     0x400ff000  /* GPIO PORTA registers */
+#define KINETIS_GPIOB_BASE     0x400ff040  /* GPIO PORTB registers */
+#define KINETIS_GPIOC_BASE     0x400ff080  /* GPIO PORTC registers */
+#define KINETIS_GPIOD_BASE     0x400ff0c0  /* GPIO PORTD registers */
+#define KINETIS_GPIOE_BASE     0x400ff100  /* GPIO PORTE registers */
+
+/* Private Peripheral Bus (PPB) Memory Map ******************************************/
+
+#define KINETIS_ITM_BASE       0xe0000000  /* Instrumentation Trace Macrocell (ITM) */
+#define KINETIS_DWT_BASE       0xe0001000  /* Data Watchpoint and Trace (DWT) */
+#define KINETIS_FPB_BASE       0xe0002000  /* Flash Patch and Breakpoint (FPB) */
+#define KINETIS_SCS_BASE       0xe000e000  /* System Control Space (SCS) (for NVIC) */
+#define KINETIS_TPIU_BASE      0xe0040000  /* Trace Port Interface Unit (TPIU) */
+#define KINETIS_MCM_BASE       0xe0080000  /* Miscellaneous Control Module (including ETB Almost Full) */
+#define KINETIS_ROMTAB_BASE    0xe00ff000  /* ROM Table - allows auto-detection of debug components */
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* KINETIS_K20 */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K20MEMORYMAP_H */
diff --git a/arch/arm/src/kinetis/kinetis_k20pinmux.h b/arch/arm/src/kinetis/chip/kinetis_k20pinmux.h
similarity index 98%
rename from arch/arm/src/kinetis/kinetis_k20pinmux.h
rename to arch/arm/src/kinetis/chip/kinetis_k20pinmux.h
index a4ca3eda29b7dfd8ee96ff4d4be9b89133adf717..ca708acfdf8aa4b6c6252384a16c0c31dfd6ac05 100644
--- a/arch/arm/src/kinetis/kinetis_k20pinmux.h
+++ b/arch/arm/src/kinetis/chip/kinetis_k20pinmux.h
@@ -1,7 +1,7 @@
 /********************************************************************************************
- * arch/arm/src/kinetis/kinetis_k40pinmux.h
+ * arch/arm/src/kinetis/chip/kinetis_k20pinmux.h
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ********************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_K20PINMUX_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_K20PINMUX_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K20PINMUX_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K20PINMUX_H
 
 /********************************************************************************************
  * Included Files
@@ -349,4 +349,4 @@
  * Public Functions
  ********************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_K20PINMUX_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K20PINMUX_H */
diff --git a/arch/arm/src/kinetis/chip/kinetis_k20vectors.h b/arch/arm/src/kinetis/chip/kinetis_k20vectors.h
new file mode 100644
index 0000000000000000000000000000000000000000..ef0730d4aefeaa54860d1b13f35425ba42ee709b
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_k20vectors.h
@@ -0,0 +1,156 @@
+/************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_k20vectors.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Pre-processor definitions
+ ************************************************************************************/
+/* This file is included by kinetis_vectors.S.  It provides the macro VECTOR that
+ * supplies ach K20 vector in terms of a (lower-case) ISR label and an
+ * (upper-case) IRQ number as defined in arch/arm/include/kinetis/kinetis_k20irq.h.
+ * kinetis_vectors.S will defined the VECTOR in different ways in order to generate
+ * the interrupt vectors and handlers in their final form.
+ */
+
+#if defined(CONFIG_ARCH_FAMILY_K20)
+
+/* If the common ARMv7-M vector handling is used, then all it needs is the following
+ * definition that provides the number of supported vectors.
+ */
+
+#  ifdef CONFIG_ARMV7M_CMNVECTOR
+
+/* Reserve interrupt table entries for I/O interrupts. */
+
+#    define ARMV7M_PERIPHERAL_INTERRUPTS NR_INTERRUPTS
+
+#  else
+VECTOR(kinetis_dmach0, KINETIS_IRQ_DMACH0)   /* Vector 16: DMA channel 0 transfer complete */
+VECTOR(kinetis_dmach1, KINETIS_IRQ_DMACH1)   /* Vector 17: DMA channel 1 transfer complete */
+VECTOR(kinetis_dmach2, KINETIS_IRQ_DMACH2)   /* Vector 18: DMA channel 2 transfer complete */
+VECTOR(kinetis_dmach3, KINETIS_IRQ_DMACH3)   /* Vector 19: DMA channel 3 transfer complete */
+VECTOR(kinetis_dmach4, KINETIS_IRQ_DMACH4)   /* Vector 20: DMA channel 4 transfer complete */
+VECTOR(kinetis_dmach5, KINETIS_IRQ_DMACH5)   /* Vector 21: DMA channel 5 transfer complete */
+VECTOR(kinetis_dmach6, KINETIS_IRQ_DMACH6)   /* Vector 22: DMA channel 6 transfer complete */
+VECTOR(kinetis_dmach7, KINETIS_IRQ_DMACH7)   /* Vector 23: DMA channel 7 transfer complete */
+VECTOR(kinetis_dmach8, KINETIS_IRQ_DMACH8)   /* Vector 24: DMA channel 8 transfer complete */
+VECTOR(kinetis_dmach9, KINETIS_IRQ_DMACH9)   /* Vector 25: DMA channel 9 transfer complete */
+VECTOR(kinetis_dmach10, KINETIS_IRQ_DMACH10) /* Vector 26: DMA channel 10 transfer complete */
+VECTOR(kinetis_dmach11, KINETIS_IRQ_DMACH11) /* Vector 27: DMA channel 11 transfer complete */
+VECTOR(kinetis_dmach12, KINETIS_IRQ_DMACH12) /* Vector 28: DMA channel 12 transfer complete */
+VECTOR(kinetis_dmach13, KINETIS_IRQ_DMACH13) /* Vector 29: DMA channel 13 transfer complete */
+VECTOR(kinetis_dmach14, KINETIS_IRQ_DMACH14) /* Vector 30: DMA channel 14 transfer complete */
+VECTOR(kinetis_dmach15, KINETIS_IRQ_DMACH15) /* Vector 31: DMA channel 15 transfer complete */
+VECTOR(kinetis_dmaerr, KINETIS_IRQ_DMAERR)   /* Vector 32: DMA error interrupt channels 0-15 */
+UNUSED(KINETIS_IRQ_RESVD17)                  /* Vector 33: Reserved */
+VECTOR(kinetis_flashcc, KINETIS_IRQ_FLASHCC) /* Vector 34: Flash memory command complete */
+VECTOR(kinetis_flashrc, KINETIS_IRQ_FLASHRC) /* Vector 35: Flash memory read collision */
+VECTOR(kinetis_smclvd, KINETIS_IRQ_SMCLVD)   /* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
+VECTOR(kinetis_llwu, KINETIS_IRQ_LLWU)       /* Vector 37: LLWU Normal Low Leakage Wakeup */
+VECTOR(kinetis_wdog, KINETIS_IRQ_WDOG)       /* Vector 38: Watchdog */
+UNUSED(KINETIS_IRQ_RESVD23)                  /* Vector 39: Reserved */
+VECTOR(kinetis_i2c0, KINETIS_IRQ_I2C0)       /* Vector 40: I2C0 */
+VECTOR(kinetis_i2c1, KINETIS_IRQ_I2C1)       /* Vector 41: I2C1 */
+VECTOR(kinetis_spi0, KINETIS_IRQ_SPI0)       /* Vector 42: SPI0 all sources */
+VECTOR(kinetis_spi1, KINETIS_IRQ_SPI1)       /* Vector 43: SPI1 all sources */
+UNUSED(KINETIS_IRQ_RESVD28)                  /* Vector 44: Reserved */
+VECTOR(kinetis_can0mb, KINETIS_IRQ_CAN0MB)   /* Vector 45: CAN0 OR'ed Message buffer (0-15) */
+VECTOR(kinetis_can0bo, KINETIS_IRQ_CAN0BO)   /* Vector 46: CAN0 Bus Off */
+VECTOR(kinetis_can0err, KINETIS_IRQ_CAN0ERR) /* Vector 47: CAN0 Error */
+VECTOR(kinetis_can0tw, KINETIS_IRQ_CAN0TW)   /* Vector 48: CAN0 Transmit Warning */
+VECTOR(kinetis_can0rw, KINETIS_IRQ_CAN0RW)   /* Vector 49: CAN0 Receive Warning */
+VECTOR(kinetis_can0wu, KINETIS_IRQ_CAN0WU)   /* Vector 50: CAN0 Wake UP */
+UNUSED(KINETIS_IRQ_RESVD35)                  /* Vector 51: Reserved */
+UNUSED(KINETIS_IRQ_RESVD36)                  /* Vector 52: Reserved */
+UNUSED(KINETIS_IRQ_RESVD37)                  /* Vector 53: Reserved */
+UNUSED(KINETIS_IRQ_RESVD38)                  /* Vector 54: Reserved */
+UNUSED(KINETIS_IRQ_RESVD39)                  /* Vector 55: Reserved */
+UNUSED(KINETIS_IRQ_RESVD40)                  /* Vector 56: Reserved */
+UNUSED(KINETIS_IRQ_RESVD41)                  /* Vector 57: Reserved */
+UNUSED(KINETIS_IRQ_RESVD42)                  /* Vector 58: Reserved */
+UNUSED(KINETIS_IRQ_RESVD43)                  /* Vector 59: Reserved */
+VECTOR(kinetis_uart0l, KINETIS_IRQ_UART0L)   /* Vector 60: UART0 LON */
+VECTOR(kinetis_uart0s, KINETIS_IRQ_UART0S)   /* Vector 61: UART0 status */
+VECTOR(kinetis_uart0e, KINETIS_IRQ_UART0E)   /* Vector 62: UART0 error */
+VECTOR(kinetis_uart1s, KINETIS_IRQ_UART1S)   /* Vector 63: UART1 status */
+VECTOR(kinetis_uart1e, KINETIS_IRQ_UART1E)   /* Vector 64: UART1 error */
+VECTOR(kinetis_uart2s, KINETIS_IRQ_UART2S)   /* Vector 65: UART2 status */
+VECTOR(kinetis_uart2e, KINETIS_IRQ_UART2E)   /* Vector 66: UART2 error */
+UNUSED(KINETIS_IRQ_RESVD51)                  /* Vector 67: Reserved */
+UNUSED(KINETIS_IRQ_RESVD52)                  /* Vector 68: Reserved */
+UNUSED(KINETIS_IRQ_RESVD53)                  /* Vector 69: Reserved */
+UNUSED(KINETIS_IRQ_RESVD54)                  /* Vector 70: Reserved */
+UNUSED(KINETIS_IRQ_RESVD55)                  /* Vector 71: Reserved */
+UNUSED(KINETIS_IRQ_RESVD56)                  /* Vector 72: Reserved */
+VECTOR(kinetis_adc0, KINETIS_IRQ_ADC0)       /* Vector 73: ADC0 */
+VECTOR(kinetis_adc1, KINETIS_IRQ_ADC1)       /* Vector 74: ADC1 */
+VECTOR(kinetis_cmp0, KINETIS_IRQ_CMP0)       /* Vector 75: CMP0 */
+VECTOR(kinetis_cmp1, KINETIS_IRQ_CMP1)       /* Vector 76: CMP1 */
+VECTOR(kinetis_cmp2, KINETIS_IRQ_CMP2)       /* Vector 77: CMP2 */
+VECTOR(kinetis_ftm0, KINETIS_IRQ_FTM0)       /* Vector 78: FTM0 all sources */
+VECTOR(kinetis_ftm1, KINETIS_IRQ_FTM1)       /* Vector 79: FTM1 all sources */
+VECTOR(kinetis_ftm2, KINETIS_IRQ_FTM2)       /* Vector 80: FTM2 all sources */
+VECTOR(kinetis_cmt, KINETIS_IRQ_CMT)         /* Vector 81: CMT */
+VECTOR(kinetis_rtc, KINETIS_IRQ_RTC)         /* Vector 82: RTC alarm interrupt */
+VECTOR(kinetis_rtcs, KINETIS_IRQ_RTCS)       /* Vector 83: RTC seconds interrupt */
+VECTOR(kinetis_pitch0, KINETIS_IRQ_PITCH0)   /* Vector 84: PIT channel 0 */
+VECTOR(kinetis_pitch1, KINETIS_IRQ_PITCH1)   /* Vector 85: PIT channel 1 */
+VECTOR(kinetis_pitch2, KINETIS_IRQ_PITCH2)   /* Vector 86: PIT channel 2 */
+VECTOR(kinetis_pitch3, KINETIS_IRQ_PITCH3)   /* Vector 87: PIT channel 3 */
+VECTOR(kinetis_pdb, KINETIS_IRQ_PDB)         /* Vector 88: PDB */
+VECTOR(kinetis_usbotg, KINETIS_IRQ_USBOTG)   /* Vector 89: USB OTG */
+VECTOR(kinetis_usbcd, KINETIS_IRQ_USBCD)     /* Vector 90: USB charger detect */
+UNUSED(KINETIS_IRQ_RESVD75)                  /* Vector 91: Reserved */
+UNUSED(KINETIS_IRQ_RESVD76)                  /* Vector 92: Reserved */
+UNUSED(KINETIS_IRQ_RESVD77)                  /* Vector 93: Reserved */
+UNUSED(KINETIS_IRQ_RESVD78)                  /* Vector 94: Reserved */
+UNUSED(KINETIS_IRQ_RESVD79)                  /* Vector 95: Reserved */
+UNUSED(KINETIS_IRQ_RESVD80)                  /* Vector 96: Reserved */
+VECTOR(kinetis_dac0, KINETIS_IRQ_DAC0)       /* Vector 97: DAC0 */
+UNUSED(KINETIS_IRQ_RESVD82)                  /* Vector 98: Reserved */
+VECTOR(kinetis_tsi, KINETIS_IRQ_TSI)         /* Vector 99: TSI all sources */
+VECTOR(kinetis_mcg, KINETIS_IRQ_MCG)         /* Vector 100: MCG */
+VECTOR(kinetis_lpt, KINETIS_IRQ_LPT)         /* Vector 101: Low power timer */
+UNUSED(KINETIS_IRQ_RESVD86)                  /* Vector 102: Reserved */
+VECTOR(kinetis_porta, KINETIS_IRQ_PORTA)     /* Vector 103: Pin detect port A */
+VECTOR(kinetis_portb, KINETIS_IRQ_PORTB)     /* Vector 104: Pin detect port B */
+VECTOR(kinetis_portc, KINETIS_IRQ_PORTC)     /* Vector 105: Pin detect port C */
+VECTOR(kinetis_portd, KINETIS_IRQ_PORTD)     /* Vector 106: Pin detect port D */
+VECTOR(kinetis_porte, KINETIS_IRQ_PORTE)     /* Vector 107: Pin detect port E */
+UNUSED(KINETIS_IRQ_RESVD92)                  /* Vector 108: Reserved */
+UNUSED(KINETIS_IRQ_RESVD93)                  /* Vector 109: Reserved */
+VECTOR(kinetis_swi, KINETIS_IRQ_SWI)         /* Vector 110: Software interrupt */
+#  endif /* CONFIG_ARMV7M_CMNVECTOR */
+#endif /* CONFIG_STM32_CONNECTIVITYLINE */
diff --git a/arch/arm/src/kinetis/chip/kinetis_k40memorymap.h b/arch/arm/src/kinetis/chip/kinetis_k40memorymap.h
new file mode 100644
index 0000000000000000000000000000000000000000..65f2788ab6c3ba84c069173531f5db7cd5387ccd
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_k40memorymap.h
@@ -0,0 +1,199 @@
+/************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_k40memorymap.h
+ *
+ *   Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K40MEMORYMAP_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K40MEMORYMAP_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+#ifdef KINETIS_K40
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Memory Map ***********************************************************************/
+/* K40 Family
+ *
+ * The memory map for the following parts is defined in Freescale document
+ * K40P144M100SF2RM
+ */
+
+#define KINETIS_FLASH_BASE     0x00000000  /* -0x0fffffff Program flash and read-
+                                            *             only data (Includes exception
+                                            *             vectors in first 1024 bytes) */
+# if !defined(KINETIS_FLEXMEM_SIZE)
+#  define KINETIS_FLEXNVM_BASE 0x10000000  /* -0x13ffffff FlexNVM */
+#  define KINETIS_FLEXRAM_BASE 0x14000000  /* -0x17ffffff FlexRAM */
+# endif
+#define KINETIS_SRAML_BASE     0x18000000  /* -0x1fffffff SRAM_L: Lower SRAM
+                                            *             (ICODE/DCODE) */
+#define KINETIS_SRAMU_BASE     0x20000000  /* -0x200fffff SRAM_U: Upper SRAM bitband
+                                            *             region */
+                             /* 0x20100000  * -0x21ffffff Reserved */
+#define KINETIS_SALIAS_BASE    0x22000000  /* -0x23ffffff Aliased to SRAM_U bitband */
+                             /* 0x24000000  * -0x3fffffff Reserved */
+#define KINETIS_BRIDGE0_BASE   0x40000000  /* -0x4007ffff Bitband region for peripheral
+                                            *             bridge 0 (AIPS-Lite0) */
+#define KINETIS_BRIDGE1_BASE   0x40080000  /* -0x400fffff Bitband region for peripheral
+                                            *             bridge 1 (AIPS-Lite1) */
+#define KINETIS_GPIOBB_BASE    0x400ff000  /* -0x400fffff Bitband region for general
+                                            *             purpose input/output (GPIO) */
+                             /* 0x40100000  * -0x41ffffff Reserved */
+#define KINETIS_PALIAS_BASE    0x42000000  /* -0x43ffffff Aliased to peripheral bridge
+                                            *             (AIPS-Lite) and general purpose
+                                            *             input/output (GPIO) bitband */
+                             /* 0x44000000  * -0x5fffffff Reserved */
+#define KINETIS_FLEXBUS_WBBASE 0x60000000  /* -0x7fffffff FlexBus (External Memory -
+                                            *             Write-back) */
+#define KINETIS_FLEXBUS_WTBASE 0x80000000  /* -0x9fffffff FlexBus (External Memory -
+                                            *             Write-through) */
+#define KINETIS_FLEXBUS_NXBASE 0xa0000000  /* -0xdfffffff FlexBus (External Memory -
+                                            *             Non-executable) */
+#define KINETIS_PERIPH_BASE    0xe0000000  /* -0xe00fffff Private peripherals */
+                             /* 0xe0100000  * -0xffffffff Reserved */
+
+/* Peripheral Bridge 0 Memory Map ***************************************************/
+
+#define KINETIS_AIPS0_BASE     0x40000000  /* Peripheral bridge 0 (AIPS-Lite 0) */
+#define KINETIS_XBAR_BASE      0x40004000  /* Crossbar switch */
+#define KINETIS_DMAC_BASE      0x40008000  /* DMA controller */
+#define KINETIS_DMADESC_BASE   0x40009000  /* DMA controller transfer control descriptors */
+#define KINETIS_FLEXBUSC_BASE  0x4000c000  /* FlexBus controller */
+#define KINETIS_MPU_BASE       0x4000d000  /* MPU */
+#define KINETIS_FMC_BASE       0x4001f000  /* Flash memory controller */
+#define KINETIS_FTFL_BASE      0x40020000  /* Flash memory */
+#define KINETIS_DMAMUX0_BASE   0x40021000  /* DMA channel mutiplexer 0 */
+#define KINETIS_CAN0_BASE      0x40024000  /* FlexCAN 0 */
+#define KINETIS_SPI0_BASE      0x4002c000  /* SPI 0 */
+#define KINETIS_SPI1_BASE      0x4002d000  /* SPI 1 */
+#define KINETIS_I2S0_BASE      0x4002f000  /* I2S 0 */
+#define KINETIS_CRC_BASE       0x40032000  /* CRC */
+#define KINETIS_USBDCD_BASE    0x40035000  /* USB DCD */
+#define KINETIS_PDB0_BASE      0x40036000  /* Programmable delay block */
+#define KINETIS_PIT_BASE       0x40037000  /* Periodic interrupt timers (PIT) */
+#define KINETIS_FTM0_BASE      0x40038000  /* FlexTimer 0 */
+#define KINETIS_FTM1_BASE      0x40039000  /* FlexTimer 1 */
+#define KINETIS_ADC0_BASE      0x4003b000  /* Analog-to-digital converter (ADC) 0 */
+#define KINETIS_RTC_BASE       0x4003d000  /* Real time clock */
+#define KINETIS_VBATR_BASE     0x4003e000  /* VBAT register file */
+#define KINETIS_LPTMR_BASE     0x40040000  /* Low power timer */
+#define KINETIS_SYSR_BASE      0x40041000  /* System register file */
+#define KINETIS_DRYICE_BASE    0x40042000  /* DryIce */
+#define KINETIS_DRYICESS_BASE  0x40043000  /* DryIce secure storage */
+#define KINETIS_TSI0_BASE      0x40045000  /* Touch sense interface */
+#define KINETIS_SIMLP_BASE     0x40047000  /* SIM low-power logic */
+#define KINETIS_SIM_BASE       0x40048000  /* System integration module (SIM) */
+#define KINETIS_PORT_BASE(n)   (0x40049000 + ((n) << 12))
+#define KINETIS_PORTA_BASE     0x40049000  /* Port A multiplexing control */
+#define KINETIS_PORTB_BASE     0x4004a000  /* Port B multiplexing control */
+#define KINETIS_PORTC_BASE     0x4004b000  /* Port C multiplexing control */
+#define KINETIS_PORTD_BASE     0x4004c000  /* Port D multiplexing control */
+#define KINETIS_PORTE_BASE     0x4004d000  /* Port E multiplexing control */
+#define KINETIS_WDOG_BASE      0x40052000  /* Software watchdog */
+#define KINETIS_EWM_BASE       0x40061000  /* External watchdog */
+#define KINETIS_CMT_BASE       0x40062000  /* Carrier modulator timer (CMT) */
+#define KINETIS_MCG_BASE       0x40064000  /* Multi-purpose Clock Generator (MCG) */
+#define KINETIS_OSC_BASE       0x40065000  /* System oscillator (OSC) */
+#define KINETIS_I2C0_BASE      0x40066000  /* I2C 0 */
+#define KINETIS_I2C1_BASE      0x40067000  /* I2C 1 */
+#define KINETIS_UART0_BASE     0x4006a000  /* UART0 */
+#define KINETIS_UART1_BASE     0x4006b000  /* UART1 */
+#define KINETIS_UART2_BASE     0x4006c000  /* UART2 */
+#define KINETIS_UART3_BASE     0x4006d000  /* UART3 */
+#define KINETIS_USB0_BASE      0x40072000  /* USB OTG FS/LS */
+#define KINETIS_CMP_BASE       0x40073000  /* Analog comparator (CMP) / 6-bit digital-to-analog converter (DAC) */
+#define KINETIS_VREF_BASE      0x40074000  /* Voltage reference (VREF) */
+#define KINETIS_LLWU_BASE      0x4007c000  /* Low-leakage wakeup unit (LLWU) */
+#define KINETIS_PMC_BASE       0x4007d000  /* Power management controller (PMC) */
+#define KINETIS_SMC_BASE       0x4007e000  /* System Mode controller (SMC) */
+
+/* Peripheral Bridge 1 Memory Map ***************************************************/
+
+#define KINETIS_AIPS1_BASE     0x40080000  /* Peripheral bridge 1 (AIPS-Lite 1) */
+#define KINETIS_CAN1_BASE      0x400a4000  /* FlexCAN 1 */
+#define KINETIS_SPI2_BASE      0x400ac000  /* SPI 2 */
+#define KINETIS_SDHC_BASE      0x400b1000  /* SDHC */
+#define KINETIS_FTM2_BASE      0x400b8000  /* FlexTimer 2 */
+#define KINETIS_ADC1_BASE      0x400bb000  /* Analog-to-digital converter (ADC) 1 */
+#define KINETIS_SLCD_BASE      0x400be000  /* Segment LCD */
+#define KINETIS_DAC0_BASE      0x400cc000  /* 12-bit digital-to-analog converter (DAC) 0 */
+#define KINETIS_DAC1_BASE      0x400cd000  /* 12-bit digital-to-analog converter (DAC) 1 */
+#define KINETIS_UART4_BASE     0x400ea000  /* UART4 */
+#define KINETIS_UART5_BASE     0x400eb000  /* UART5 */
+#define KINETIS_XBARSS_BASE    0x400ff000  /* Not an AIPS-Lite slot. The 32-bit general
+                                            * purpose input/output module that shares the
+                                            * crossbar switch slave port with the AIPS-Lite
+                                            * is accessed at this address. */
+#define KINETIS_GPIO_BASE(n)   (0x400ff000 + ((n) << 6))
+#define KINETIS_GPIOA_BASE     0x400ff000  /* GPIO PORTA registers */
+#define KINETIS_GPIOB_BASE     0x400ff040  /* GPIO PORTB registers */
+#define KINETIS_GPIOC_BASE     0x400ff080  /* GPIO PORTC registers */
+#define KINETIS_GPIOD_BASE     0x400ff0c0  /* GPIO PORTD registers */
+#define KINETIS_GPIOE_BASE     0x400ff100  /* GPIO PORTE registers */
+
+/* Private Peripheral Bus (PPB) Memory Map ******************************************/
+
+#define KINETIS_ITM_BASE       0xe0000000  /* Instrumentation Trace Macrocell (ITM) */
+#define KINETIS_DWT_BASE       0xe0001000  /* Data Watchpoint and Trace (DWT) */
+#define KINETIS_FPB_BASE       0xe0002000  /* Flash Patch and Breakpoint (FPB) */
+#define KINETIS_SCS_BASE       0xe000e000  /* System Control Space (SCS) (for NVIC) */
+#define KINETIS_TPIU_BASE      0xe0040000  /* Trace Port Interface Unit (TPIU) */
+#define KINETIS_ETM_BASE       0xe0041000  /* Embedded Trace Macrocell (ETM) */
+#define KINETIS_ETB_BASE       0xe0042000  /* Embedded Trace Buffer (ETB) */
+#define KINETIS_TFUN_BASE      0xe0043000  /* Embedded Trace Funnel */
+#define KINETIS_MCM_BASE       0xe0080000  /* Miscellaneous Control Module (including ETB Almost Full) */
+#define KINETIS_ROMTAB_BASE    0xe00ff000  /* ROM Table - allows auto-detection of debug components */
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* KINETIS_K40 */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K40MEMORYMAP_H */
diff --git a/arch/arm/src/kinetis/kinetis_k40pinmux.h b/arch/arm/src/kinetis/chip/kinetis_k40pinmux.h
similarity index 99%
rename from arch/arm/src/kinetis/kinetis_k40pinmux.h
rename to arch/arm/src/kinetis/chip/kinetis_k40pinmux.h
index 9798eda6be1522e19bf0b7fc2bc1d176a61a0fed..7083b0caf7c5dccde1573fcc508ffd8e47ef9a17 100644
--- a/arch/arm/src/kinetis/kinetis_k40pinmux.h
+++ b/arch/arm/src/kinetis/chip/kinetis_k40pinmux.h
@@ -1,7 +1,7 @@
 /********************************************************************************************
- * arch/arm/src/kinetis/kinetis_k40pinmux.h
+ * arch/arm/src/kinetis/chip/kinetis_k40pinmux.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ********************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_K40PINMUX_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_K40PINMUX_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K40PINMUX_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K40PINMUX_H
 
 /********************************************************************************************
  * Included Files
@@ -515,4 +515,4 @@
  * Public Functions
  ********************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_K40PINMUX_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K40PINMUX_H */
diff --git a/arch/arm/src/kinetis/chip/kinetis_k40vectors.h b/arch/arm/src/kinetis/chip/kinetis_k40vectors.h
new file mode 100644
index 0000000000000000000000000000000000000000..08aeb61e20505b23385ed810de68a7678e0e03fa
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_k40vectors.h
@@ -0,0 +1,156 @@
+/************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_k40vectors.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Pre-processor definitions
+ ************************************************************************************/
+/* This file is included by kinetis_vectors.S.  It provides the macro VECTOR that
+ * supplies ach K40 vector in terms of a (lower-case) ISR label and an
+ * (upper-case) IRQ number as defined in arch/arm/include/kinetis/kinetis_k40irq.h.
+ * kinetis_vectors.S will defined the VECTOR in different ways in order to generate
+ * the interrupt vectors and handlers in their final form.
+ */
+
+#if defined(CONFIG_ARCH_FAMILY_K40)
+
+/* If the common ARMv7-M vector handling is used, then all it needs is the following
+ * definition that provides the number of supported vectors.
+ */
+
+#  ifdef CONFIG_ARMV7M_CMNVECTOR
+
+/* Reserve interrupt table entries for I/O interrupts. */
+
+#    define ARMV7M_PERIPHERAL_INTERRUPTS NR_INTERRUPTS
+
+#  else
+VECTOR(kinetis_dmach0, KINETIS_IRQ_DMACH0)   /* Vector 16: DMA channel 0 transfer complete */
+VECTOR(kinetis_dmach1, KINETIS_IRQ_DMACH1)   /* Vector 17: DMA channel 1 transfer complete */
+VECTOR(kinetis_dmach2, KINETIS_IRQ_DMACH2)   /* Vector 18: DMA channel 2 transfer complete */
+VECTOR(kinetis_dmach3, KINETIS_IRQ_DMACH3)   /* Vector 19: DMA channel 3 transfer complete */
+VECTOR(kinetis_dmach4, KINETIS_IRQ_DMACH4)   /* Vector 20: DMA channel 4 transfer complete */
+VECTOR(kinetis_dmach5, KINETIS_IRQ_DMACH5)   /* Vector 21: DMA channel 5 transfer complete */
+VECTOR(kinetis_dmach6, KINETIS_IRQ_DMACH6)   /* Vector 22: DMA channel 6 transfer complete */
+VECTOR(kinetis_dmach7, KINETIS_IRQ_DMACH7)   /* Vector 23: DMA channel 7 transfer complete */
+VECTOR(kinetis_dmach8, KINETIS_IRQ_DMACH8)   /* Vector 24: DMA channel 8 transfer complete */
+VECTOR(kinetis_dmach9, KINETIS_IRQ_DMACH9)   /* Vector 25: DMA channel 9 transfer complete */
+VECTOR(kinetis_dmach10, KINETIS_IRQ_DMACH10) /* Vector 26: DMA channel 10 transfer complete */
+VECTOR(kinetis_dmach11, KINETIS_IRQ_DMACH11) /* Vector 27: DMA channel 11 transfer complete */
+VECTOR(kinetis_dmach12, KINETIS_IRQ_DMACH12) /* Vector 28: DMA channel 12 transfer complete */
+VECTOR(kinetis_dmach13, KINETIS_IRQ_DMACH13) /* Vector 29: DMA channel 13 transfer complete */
+VECTOR(kinetis_dmach14, KINETIS_IRQ_DMACH14) /* Vector 30: DMA channel 14 transfer complete */
+VECTOR(kinetis_dmach15, KINETIS_IRQ_DMACH15) /* Vector 31: DMA channel 15 transfer complete */
+VECTOR(kinetis_dmaerr, KINETIS_IRQ_DMAERR)   /* Vector 32: DMA error interrupt channels 0-15 */
+VECTOR(kinetis_mcm, KINETIS_IRQ_MCM)         /* Vector 33: MCM Normal interrupt */
+VECTOR(kinetis_flashcc, KINETIS_IRQ_FLASHCC) /* Vector 34: Flash memory command complete */
+VECTOR(kinetis_flashrc, KINETIS_IRQ_FLASHRC) /* Vector 35: Flash memory read collision */
+VECTOR(kinetis_smclvd, KINETIS_IRQ_SMCLVD)   /* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
+VECTOR(kinetis_llwu, KINETIS_IRQ_LLWU)       /* Vector 37: LLWU Normal Low Leakage Wakeup */
+VECTOR(kinetis_wdog, KINETIS_IRQ_WDOG)       /* Vector 38: Watchdog */
+UNUSED(KINETIS_IRQ_RESVD23)                  /* Vector 39: Reserved */
+VECTOR(kinetis_i2c0, KINETIS_IRQ_I2C0)       /* Vector 40: I2C0 */
+VECTOR(kinetis_i2c1, KINETIS_IRQ_I2C1)       /* Vector 41: I2C1 */
+VECTOR(kinetis_spi0, KINETIS_IRQ_SPI0)       /* Vector 42: SPI0 all sources */
+VECTOR(kinetis_spi1, KINETIS_IRQ_SPI1)       /* Vector 43: SPI1 all sources */
+VECTOR(kinetis_spi2, KINETIS_IRQ_SPI2)       /* Vector 44: SPI2 all sources */
+VECTOR(kinetis_can0mb, KINETIS_IRQ_CAN0MB)   /* Vector 45: CAN0 OR'ed Message buffer (0-15) */
+VECTOR(kinetis_can0bo, KINETIS_IRQ_CAN0BO)   /* Vector 46: CAN0 Bus Off */
+VECTOR(kinetis_can0err, KINETIS_IRQ_CAN0ERR) /* Vector 47: CAN0 Error */
+VECTOR(kinetis_can0tw, KINETIS_IRQ_CAN0TW)   /* Vector 48: CAN0 Transmit Warning */
+VECTOR(kinetis_can0rw, KINETIS_IRQ_CAN0RW)   /* Vector 49: CAN0 Receive Warning */
+VECTOR(kinetis_can0wu, KINETIS_IRQ_CAN0WU)   /* Vector 50: CAN0 Wake UP */
+UNUSED(KINETIS_IRQ_RESVD35)                  /* Vector 51: Reserved */
+UNUSED(KINETIS_IRQ_RESVD36)                  /* Vector 52: Reserved */
+VECTOR(kinetis_can1mb, KINETIS_IRQ_CAN1MB)   /* Vector 53: CAN1 OR'ed Message buffer (0-15) */
+VECTOR(kinetis_can1bo, KINETIS_IRQ_CAN1BO)   /* Vector 54: CAN1 Bus Off */
+VECTOR(kinetis_can1err, KINETIS_IRQ_CAN1ERR) /* Vector 55: CAN1 Error */
+VECTOR(kinetis_can1tw, KINETIS_IRQ_CAN1TW)   /* Vector 56: CAN1 Transmit Warning */
+VECTOR(kinetis_can1rw, KINETIS_IRQ_CAN1RW)   /* Vector 57: CAN1 Receive Warning */
+VECTOR(kinetis_can1wu, KINETIS_IRQ_CAN1WU)   /* Vector 58: CAN1 Wake UP */
+UNUSED(KINETIS_IRQ_RESVD43)                  /* Vector 59: Reserved */
+UNUSED(KINETIS_IRQ_RESVD44)                  /* Vector 60: Reserved */
+VECTOR(kinetis_uart0s, KINETIS_IRQ_UART0S)   /* Vector 61: UART0 status */
+VECTOR(kinetis_uart0e, KINETIS_IRQ_UART0E)   /* Vector 62: UART0 error */
+VECTOR(kinetis_uart1s, KINETIS_IRQ_UART1S)   /* Vector 63: UART1 status */
+VECTOR(kinetis_uart1e, KINETIS_IRQ_UART1E)   /* Vector 64: UART1 error */
+VECTOR(kinetis_uart2s, KINETIS_IRQ_UART2S)   /* Vector 65: UART2 status */
+VECTOR(kinetis_uart2e, KINETIS_IRQ_UART2E)   /* Vector 66: UART2 error */
+VECTOR(kinetis_uart3s, KINETIS_IRQ_UART3S)   /* Vector 67: UART3 status */
+VECTOR(kinetis_uart3e, KINETIS_IRQ_UART3E)   /* Vector 68: UART3 error */
+VECTOR(kinetis_uart4s, KINETIS_IRQ_UART4S)   /* Vector 69: UART4 status */
+VECTOR(kinetis_uart4e, KINETIS_IRQ_UART4E)   /* Vector 70: UART4 error */
+VECTOR(kinetis_uart5s, KINETIS_IRQ_UART5S)   /* Vector 71: UART5 status */
+VECTOR(kinetis_uart5e, KINETIS_IRQ_UART5E)   /* Vector 72: UART5 error */
+VECTOR(kinetis_adc0, KINETIS_IRQ_ADC0)       /* Vector 73: ADC0 */
+VECTOR(kinetis_adc1, KINETIS_IRQ_ADC1)       /* Vector 74: ADC1 */
+VECTOR(kinetis_cmp0, KINETIS_IRQ_CMP0)       /* Vector 75: CMP0 */
+VECTOR(kinetis_cmp1, KINETIS_IRQ_CMP1)       /* Vector 76: CMP1 */
+VECTOR(kinetis_cmp2, KINETIS_IRQ_CMP2)       /* Vector 77: CMP2 */
+VECTOR(kinetis_ftm0, KINETIS_IRQ_FTM0)       /* Vector 78: FTM0 all sources */
+VECTOR(kinetis_ftm1, KINETIS_IRQ_FTM1)       /* Vector 79: FTM1 all sources */
+VECTOR(kinetis_ftm2, KINETIS_IRQ_FTM2)       /* Vector 80: FTM2 all sources */
+VECTOR(kinetis_cmt, KINETIS_IRQ_CMT)         /* Vector 81: CMT */
+VECTOR(kinetis_rtc, KINETIS_IRQ_RTC)         /* Vector 82: RTC alarm interrupt */
+UNUSED(KINETIS_IRQ_RESVD67)                  /* Vector 83: Reserved */
+VECTOR(kinetis_pitch0, KINETIS_IRQ_PITCH0)   /* Vector 84: PIT channel 0 */
+VECTOR(kinetis_pitch1, KINETIS_IRQ_PITCH1)   /* Vector 85: PIT channel 1 */
+VECTOR(kinetis_pitch2, KINETIS_IRQ_PITCH2)   /* Vector 86: PIT channel 2 */
+VECTOR(kinetis_pitch3, KINETIS_IRQ_PITCH3)   /* Vector 87: PIT channel 3 */
+VECTOR(kinetis_pdb, KINETIS_IRQ_PDB)         /* Vector 88: PDB */
+VECTOR(kinetis_usbotg, KINETIS_IRQ_USBOTG)   /* Vector 89: USB OTG */
+VECTOR(kinetis_usbcd, KINETIS_IRQ_USBCD)     /* Vector 90: USB charger detect */
+UNUSED(KINETIS_IRQ_RESVD75)                  /* Vector 91: Reserved */
+UNUSED(KINETIS_IRQ_RESVD76)                  /* Vector 92: Reserved */
+UNUSED(KINETIS_IRQ_RESVD77)                  /* Vector 93: Reserved */
+UNUSED(KINETIS_IRQ_RESVD78)                  /* Vector 94: Reserved */
+VECTOR(kinetis_i2s0, KINETIS_IRQ_I2S0)       /* Vector 95: I2S0 */
+VECTOR(kinetis_sdhc, KINETIS_IRQ_SDHC)       /* Vector 96: SDHC */
+VECTOR(kinetis_dac0, KINETIS_IRQ_DAC0)       /* Vector 97: DAC0 */
+VECTOR(kinetis_dac1, KINETIS_IRQ_DAC1)       /* Vector 98: DAC1 */
+VECTOR(kinetis_tsi, KINETIS_IRQ_TSI)         /* Vector 99: TSI all sources */
+VECTOR(kinetis_mcg, KINETIS_IRQ_MCG)         /* Vector 100: MCG */
+VECTOR(kinetis_lpt, KINETIS_IRQ_LPT)         /* Vector 101: Low power timer */
+VECTOR(kinetis_slcd, KINETIS_IRQ_SLCD)       /* Vector 102: Segment LCD all sources */
+VECTOR(kinetis_porta, KINETIS_IRQ_PORTA)     /* Vector 103: Pin detect port A */
+VECTOR(kinetis_portb, KINETIS_IRQ_PORTB)     /* Vector 104: Pin detect port B */
+VECTOR(kinetis_portc, KINETIS_IRQ_PORTC)     /* Vector 105: Pin detect port C */
+VECTOR(kinetis_portd, KINETIS_IRQ_PORTD)     /* Vector 106: Pin detect port D */
+VECTOR(kinetis_porte, KINETIS_IRQ_PORTE)     /* Vector 107: Pin detect port E */
+UNUSED(KINETIS_IRQ_RESVD92)                  /* Vector 108: Reserved */
+UNUSED(KINETIS_IRQ_RESVD93)                  /* Vector 109: Reserved */
+VECTOR(kinetis_swi, KINETIS_IRQ_SWI)         /* Vector 110: Software interrupt */
+#  endif /* CONFIG_ARMV7M_CMNVECTOR */
+#endif /* CONFIG_ARCH_FAMILY_K40 */
diff --git a/arch/arm/src/kinetis/chip/kinetis_k60memorymap.h b/arch/arm/src/kinetis/chip/kinetis_k60memorymap.h
new file mode 100644
index 0000000000000000000000000000000000000000..135da4755366ed9870f4c2bad2771f6fe9d0d5ec
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_k60memorymap.h
@@ -0,0 +1,196 @@
+/************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_k60memorymap.h
+ *
+ *   Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K60MEMORYMAP_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K60MEMORYMAP_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+#ifdef KINETIS_K60
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Memory Map ***********************************************************************/
+/* K60 Family
+ *
+ * The memory map for the following parts is defined in Freescale document
+ * K60P144M100SF2RM
+ */
+
+#define KINETIS_FLASH_BASE     0x00000000  /* -0x0fffffff Program flash and read-
+                                            *             only data (Includes exception
+                                            *             vectors in first 1024 bytes) */
+#if !defined(KINETIS_FLEXMEM_SIZE)
+#  define KINETIS_FLEXNVM_BASE 0x10000000  /* -0x13ffffff FlexNVM */
+#  define KINETIS_FLEXRAM_BASE 0x14000000  /* -0x17ffffff FlexRAM */
+#endif
+#define KINETIS_SRAML_BASE     0x18000000  /* -0x1fffffff SRAM_L: Lower SRAM
+                                            *             (ICODE/DCODE) */
+#define KINETIS_SRAMU_BASE     0x20000000  /* -0x200fffff SRAM_U: Upper SRAM bitband
+                                            *             region */
+                             /* 0x20100000  * -0x21ffffff Reserved */
+#define KINETIS_SALIAS_BASE    0x22000000  /* -0x23ffffff Aliased to SRAM_U bitband */
+                             /* 0x24000000  * -0x3fffffff Reserved */
+#define KINETIS_BRIDGE0_BASE   0x40000000  /* -0x4007ffff Bitband region for peripheral
+                                            *             bridge 0 (AIPS-Lite0) */
+#define KINETIS_BRIDGE1_BASE   0x40080000   /* -0x400fffff Bitband region for peripheral
+                                            *             bridge 1 (AIPS-Lite1) */
+#define KINETIS_GPIOBB_BASE    0x400ff000  /* -0x400fffff Bitband region for general
+                                            *             purpose input/output (GPIO) */
+                             /* 0x40100000  * -0x41ffffff Reserved */
+#define KINETIS_PALIAS_BASE    0x42000000  /* -0x43ffffff Aliased to peripheral bridge
+                                            *             (AIPS-Lite) and general purpose
+                                            *             input/output (GPIO) bitband */
+                             /* 0x44000000  * -0x5fffffff Reserved */
+#define KINETIS_FLEXBUS_BASE   0x60000000  /* -0x7fffffff FlexBus */
+#define KINETIS_PERIPH_BASE    0xe0000000  /* -0xe00fffff Private peripherals */
+                             /* 0xe0100000  * -0xffffffff Reserved */
+
+/* Peripheral Bridge 0 Memory Map ***************************************************/
+
+#define KINETIS_AIPS0_BASE     0x40000000  /* Peripheral bridge 0 (AIPS-Lite 0) */
+#define KINETIS_XBAR_BASE      0x40004000  /* Crossbar switch */
+#define KINETIS_DMAC_BASE      0x40008000  /* DMA controller */
+#define KINETIS_DMADESC_BASE   0x40009000  /* DMA controller transfer control descriptors */
+#define KINETIS_FLEXBUSC_BASE  0x4000c000  /* FlexBus controller */
+#define KINETIS_MPU_BASE       0x4000d000  /* MPU */
+#define KINETIS_FMC_BASE       0x4001f000  /* Flash memory controller */
+#define KINETIS_FTFL_BASE      0x40020000  /* Flash memory */
+#define KINETIS_DMAMUX0_BASE   0x40021000  /* DMA channel mutiplexer 0 */
+#define KINETIS_CAN0_BASE      0x40024000  /* FlexCAN 0 */
+#define KINETIS_SPI0_BASE      0x4002c000  /* DSPI 0 */
+#define KINETIS_SPI1_BASE      0x4002d000  /* DSPI 1 */
+#define KINETIS_I2S0_BASE      0x4002f000  /* I2S 0 */
+#define KINETIS_CRC_BASE       0x40032000  /* CRC */
+#define KINETIS_USBDCD_BASE    0x40035000  /* USB DCD */
+#define KINETIS_PDB0_BASE      0x40036000  /* Programmable delay block */
+#define KINETIS_PIT_BASE       0x40037000  /* Periodic interrupt timers (PIT) */
+#define KINETIS_FTM0_BASE      0x40038000  /* FlexTimer (FTM) 0 */
+#define KINETIS_FTM1_BASE      0x40039000  /* FlexTimer (FTM) 1 */
+#define KINETIS_ADC0_BASE      0x4003b000  /* Analog-to-digital converter (ADC) 0 */
+#define KINETIS_RTC_BASE       0x4003d000  /* Real time clock */
+#define KINETIS_VBATR_BASE     0x4003e000  /* VBAT register file */
+#define KINETIS_LPTMR_BASE     0x40040000  /* Low power timer */
+#define KINETIS_SYSR_BASE      0x40041000  /* System register file */
+#define KINETIS_DRYICE_BASE    0x40042000  /* DryIce */
+#define KINETIS_DRYICESS_BASE  0x40043000  /* DryIce secure storage */
+#define KINETIS_TSI0_BASE      0x40045000  /* Touch sense interface */
+#define KINETIS_SIMLP_BASE     0x40047000  /* SIM low-power logic */
+#define KINETIS_SIM_BASE       0x40048000  /* System integration module (SIM) */
+#define KINETIS_PORT_BASE(n)   (0x40049000 + ((n) << 12))
+#define KINETIS_PORTA_BASE     0x40049000  /* Port A multiplexing control */
+#define KINETIS_PORTB_BASE     0x4004a000  /* Port B multiplexing control */
+#define KINETIS_PORTC_BASE     0x4004b000  /* Port C multiplexing control */
+#define KINETIS_PORTD_BASE     0x4004c000  /* Port D multiplexing control */
+#define KINETIS_PORTE_BASE     0x4004d000  /* Port E multiplexing control */
+#define KINETIS_WDOG_BASE      0x40052000  /* Software watchdog */
+#define KINETIS_EWM_BASE       0x40061000  /* External watchdog */
+#define KINETIS_CMT_BASE       0x40062000  /* Carrier modulator timer (CMT) */
+#define KINETIS_MCG_BASE       0x40064000  /* Multi-purpose Clock Generator (MCG) */
+#define KINETIS_OSC_BASE       0x40065000  /* System oscillator (XOSC) */
+#define KINETIS_I2C0_BASE      0x40066000  /* I2C 0 */
+#define KINETIS_I2C1_BASE      0x40067000  /* I2C 1 */
+#define KINETIS_UART0_BASE     0x4006a000  /* UART0 */
+#define KINETIS_UART1_BASE     0x4006b000  /* UART1 */
+#define KINETIS_UART2_BASE     0x4006c000  /* UART2 */
+#define KINETIS_UART3_BASE     0x4006d000  /* UART3 */
+#define KINETIS_USB0_BASE      0x40072000  /* USB OTG FS/LS */
+#define KINETIS_CMP_BASE       0x40073000  /* Analog comparator (CMP) / 6-bit digital-to-analog converter (DAC) */
+#define KINETIS_VREF_BASE      0x40074000  /* Voltage reference (VREF) */
+#define KINETIS_LLWU_BASE      0x4007c000  /* Low-leakage wakeup unit (LLWU) */
+#define KINETIS_PMC_BASE       0x4007d000  /* Power management controller (PMC) */
+#define KINETIS_SMC_BASE       0x4007e000  /* System Mode controller (SMC) */
+
+/* Peripheral Bridge 1 Memory Map ***************************************************/
+
+#define KINETIS_AIPS1_BASE     0x40080000  /* Peripheral bridge 1 (AIPS-Lite 1) */
+#define KINETIS_RNGB_BASE      0x400a0000  /* Random number generator (RNGB) */
+#define KINETIS_CAN1_BASE      0x400a4000  /* FlexCAN 1 */
+#define KINETIS_SPI2_BASE      0x400ac000  /* DSPI 2 */
+#define KINETIS_SDHC_BASE      0x400b1000  /* SDHC */
+#define KINETIS_FTM2_BASE      0x400b8000  /* FlexTimer 2 */
+#define KINETIS_ADC1_BASE      0x400bb000  /* Analog-to-digital converter (ADC) 1 */
+#define KINETIS_EMAC_BASE      0x400c0000  /* Ethernet MAC and IEEE 1588 timers */
+#define KINETIS_DAC0_BASE      0x400cc000  /* 12-bit digital-to-analog converter (DAC) 0 */
+#define KINETIS_DAC1_BASE      0x400cd000  /* 12-bit digital-to-analog converter (DAC) 1 */
+#define KINETIS_UART4_BASE     0x400ea000  /* UART4 */
+#define KINETIS_UART5_BASE     0x400eb000  /* UART5 */
+#define KINETIS_XBARSS_BASE    0x400ff000  /* Not an AIPS-Lite slot. The 32-bit general
+                                            * purpose input/output module that shares the
+                                            * crossbar switch slave port with the AIPS-Lite
+                                            * is accessed at this address. */
+#define KINETIS_GPIO_BASE(n)   (0x400ff000 + ((n) << 6))
+#define KINETIS_GPIOA_BASE     0x400ff000  /* GPIO PORTA registers */
+#define KINETIS_GPIOB_BASE     0x400ff040  /* GPIO PORTB registers */
+#define KINETIS_GPIOC_BASE     0x400ff080  /* GPIO PORTC registers */
+#define KINETIS_GPIOD_BASE     0x400ff0c0  /* GPIO PORTD registers */
+#define KINETIS_GPIOE_BASE     0x400ff100  /* GPIO PORTE registers */
+
+/* Private Peripheral Bus (PPB) Memory Map ******************************************/
+
+#define KINETIS_ITM_BASE       0xe0000000  /* Instrumentation Trace Macrocell (ITM) */
+#define KINETIS_DWT_BASE       0xe0001000  /* Data Watchpoint and Trace (DWT) */
+#define KINETIS_FPB_BASE       0xe0002000  /* Flash Patch and Breakpoint (FPB) */
+#define KINETIS_SCS_BASE       0xe000e000  /* System Control Space (SCS) (for NVIC) */
+#define KINETIS_TPIU_BASE      0xe0040000  /* Trace Port Interface Unit (TPIU) */
+#define KINETIS_ETM_BASE       0xe0041000  /* Embedded Trace Macrocell (ETM) */
+#define KINETIS_ETB_BASE       0xe0042000  /* Embedded Trace Buffer (ETB) */
+#define KINETIS_TFUN_BASE      0xe0043000  /* Embedded Trace Funnel */
+#define KINETIS_MCM_BASE       0xe0080000  /* Miscellaneous Control Module (including ETB Almost Full) */
+#define KINETIS_MMCAU_BASE     0xe0081000  /* Memory Mapped Cryptographic Acceleration Unit (MMCAU) */
+#define KINETIS_ROMTAB_BASE    0xe00ff000  /* ROM Table - allows auto-detection of debug components */
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* KINETIS_K60 */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K60MEMORYMAP_H */
diff --git a/arch/arm/src/kinetis/kinetis_k60pinmux.h b/arch/arm/src/kinetis/chip/kinetis_k60pinmux.h
similarity index 97%
rename from arch/arm/src/kinetis/kinetis_k60pinmux.h
rename to arch/arm/src/kinetis/chip/kinetis_k60pinmux.h
index 7fd69a0813e7f3c3bad938e38e69b5a77deb1719..888a5955840f58f5b66a24f9ee718d5535481b61 100644
--- a/arch/arm/src/kinetis/kinetis_k60pinmux.h
+++ b/arch/arm/src/kinetis/chip/kinetis_k60pinmux.h
@@ -1,7 +1,7 @@
 /********************************************************************************************
- * arch/arm/src/kinetis/kinetis_k60pinset.h
+ * arch/arm/src/kinetis/chip/kinetis_k60pinset.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ********************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_K60PINMUX_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_K60PINMUX_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K60PINMUX_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K60PINMUX_H
 
 /********************************************************************************************
  * Included Files
@@ -55,10 +55,10 @@
  * configuration (with no suffix) that maps to the correct alternative.
  */
 
-#if defined(CONFIG_ARCH_CHIP_MK60N256VLQ100) || defined(CONFIG_ARCH_CHIP_MK60X256VLQ100) || \
+#if   defined(CONFIG_ARCH_CHIP_MK60N256VLQ100) || defined(CONFIG_ARCH_CHIP_MK60X256VLQ100) || \
       defined(CONFIG_ARCH_CHIP_MK60N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK60N256VMD100) || \
       defined(CONFIG_ARCH_CHIP_MK60X256VMD100) || defined(CONFIG_ARCH_CHIP_MK60N512VMD100) || \
-      defined(CONFIG_ARCH_CHIP_MK60N512VLL100)
+      defined(CONFIG_ARCH_CHIP_MK60N512VLL100) || defined(CONFIG_ARCH_CHIP_MK60FN1M0VLQ12)
 
 #define PIN_TSI0_CH1             (PIN_ANALOG | PIN_PORTA | PIN0)
 #define PIN_UART0_CTS_1          (PIN_ALT2   | PIN_PORTA | PIN0)
@@ -83,12 +83,12 @@
 #define PIN_FTM0_CH1_1           (PIN_ALT3   | PIN_PORTA | PIN4)
 #define PIN_NMI                  (PIN_ALT7   | PIN_PORTA | PIN4)
 #define PIN_FTM0_CH2_1           (PIN_ALT3   | PIN_PORTA | PIN5)
-#if 0
+#ifdef CONFIG_KINETIS_ENET_NORXER
+#  define PIN_RMII0_RXER         (GPIO_PULLDOWN | PIN_PORTA | PIN5)
+#  define PIN_MII0_RXER          (GPIO_PULLDOWN | PIN_PORTA | PIN5)
+#else
 #  define PIN_RMII0_RXER         (PIN_ALT4   | PIN_PORTA | PIN5)
 #  define PIN_MII0_RXER          (PIN_ALT4   | PIN_PORTA | PIN5)
-#else
-#  define PIN_RMII0_RXER         (GPIO_PULLDOWN | PIN_PORTA | PIN5)
-# define PIN_MII0_RXER           (GPIO_PULLDOWN | PIN_PORTA | PIN5)
 #endif
 #define PIN_CMP2_OUT_1           (PIN_ALT5   | PIN_PORTA | PIN5)
 #define PIN_I2S0_RX_BCLK_1       (PIN_ALT6   | PIN_PORTA | PIN5)
@@ -174,7 +174,11 @@
 #define PIN_TSI0_CH0             (PIN_ANALOG | PIN_PORTB | PIN0)
 #define PIN_I2C0_SCL_1           (PIN_ALT2   | PIN_PORTB | PIN0)
 #define PIN_FTM1_CH0_3           (PIN_ALT3   | PIN_PORTB | PIN0)
-#define PIN_RMII0_MDIO           (PIN_ALT4   | PIN_PORTB | PIN0)
+#ifdef CONFIG_KINETIS_ENET_MDIOPULLUP
+#  define PIN_RMII0_MDIO         (PIN_ALT4_PULLUP | PIN_PORTB | PIN0)
+#else
+#  define PIN_RMII0_MDIO         (PIN_ALT4   | PIN_PORTB | PIN0)
+#endif
 #define PIN_MII0_MDIO            (PIN_ALT4   | PIN_PORTB | PIN0)
 #define PIN_FTM1_QD_PHA_3        (PIN_ALT6   | PIN_PORTB | PIN0)
 #define PIN_ADC0_SE9             (PIN_ANALOG | PIN_PORTB | PIN1)
@@ -479,4 +483,4 @@
  * Public Functions
  ********************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_K60PINMUX_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K60PINMUX_H */
diff --git a/arch/arm/src/kinetis/chip/kinetis_k60vectors.h b/arch/arm/src/kinetis/chip/kinetis_k60vectors.h
new file mode 100644
index 0000000000000000000000000000000000000000..e7b2cf78878de9c46631537c83d0683fba98b290
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_k60vectors.h
@@ -0,0 +1,156 @@
+/************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_k60vectors.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Pre-processor definitions
+ ************************************************************************************/
+/* This file is included by kinetis_vectors.S.  It provides the macro VECTOR that
+ * supplies ach K60 vector in terms of a (lower-case) ISR label and an
+ * (upper-case) IRQ number as defined in arch/arm/include/kinetis/kinetis_k60irq.h.
+ * kinetis_vectors.S will defined the VECTOR in different ways in order to generate
+ * the interrupt vectors and handlers in their final form.
+ */
+
+#if defined(CONFIG_ARCH_FAMILY_K60)
+
+/* If the common ARMv7-M vector handling is used, then all it needs is the following
+ * definition that provides the number of supported vectors.
+ */
+
+#  ifdef CONFIG_ARMV7M_CMNVECTOR
+
+/* Reserve interrupt table entries for I/O interrupts. */
+
+#    define ARMV7M_PERIPHERAL_INTERRUPTS NR_INTERRUPTS
+
+#  else
+VECTOR(kinetis_dmach0, KINETIS_IRQ_DMACH0)     /* Vector 16: DMA channel 0 transfer complete */
+VECTOR(kinetis_dmach1, KINETIS_IRQ_DMACH1)     /* Vector 17: DMA channel 1 transfer complete */
+VECTOR(kinetis_dmach2, KINETIS_IRQ_DMACH2)     /* Vector 18: DMA channel 2 transfer complete */
+VECTOR(kinetis_dmach3, KINETIS_IRQ_DMACH3)     /* Vector 19: DMA channel 3 transfer complete */
+VECTOR(kinetis_dmach4, KINETIS_IRQ_DMACH4)     /* Vector 20: DMA channel 4 transfer complete */
+VECTOR(kinetis_dmach5, KINETIS_IRQ_DMACH5)     /* Vector 21: DMA channel 5 transfer complete */
+VECTOR(kinetis_dmach6, KINETIS_IRQ_DMACH6)     /* Vector 22: DMA channel 6 transfer complete */
+VECTOR(kinetis_dmach7, KINETIS_IRQ_DMACH7)     /* Vector 23: DMA channel 7 transfer complete */
+VECTOR(kinetis_dmach8, KINETIS_IRQ_DMACH8)     /* Vector 24: DMA channel 8 transfer complete */
+VECTOR(kinetis_dmach9, KINETIS_IRQ_DMACH9)     /* Vector 25: DMA channel 9 transfer complete */
+VECTOR(kinetis_dmach10, KINETIS_IRQ_DMACH10)   /* Vector 26: DMA channel 10 transfer complete */
+VECTOR(kinetis_dmach11, KINETIS_IRQ_DMACH11)   /* Vector 27: DMA channel 11 transfer complete */
+VECTOR(kinetis_dmach12, KINETIS_IRQ_DMACH12)   /* Vector 28: DMA channel 12 transfer complete */
+VECTOR(kinetis_dmach13, KINETIS_IRQ_DMACH13)   /* Vector 29: DMA channel 13 transfer complete */
+VECTOR(kinetis_dmach14, KINETIS_IRQ_DMACH14)   /* Vector 30: DMA channel 14 transfer complete */
+VECTOR(kinetis_dmach15, KINETIS_IRQ_DMACH15)   /* Vector 31: DMA channel 15 transfer complete */
+VECTOR(kinetis_dmaerr, KINETIS_IRQ_DMAERR)     /* Vector 32: DMA error interrupt channels 0-15 */
+VECTOR(kinetis_mcm, KINETIS_IRQ_MCM)           /* Vector 33: MCM Normal interrupt */
+VECTOR(kinetis_flashcc, KINETIS_IRQ_FLASHCC)   /* Vector 34: Flash memory command complete */
+VECTOR(kinetis_flashrc, KINETIS_IRQ_FLASHRC)   /* Vector 35: Flash memory read collision */
+VECTOR(kinetis_smclvd, KINETIS_IRQ_SMCLVD)     /* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
+VECTOR(kinetis_llwu, KINETIS_IRQ_LLWU)         /* Vector 37: LLWU Normal Low Leakage Wakeup */
+VECTOR(kinetis_wdog, KINETIS_IRQ_WDOG)         /* Vector 38: Watchdog */
+VECTOR(kinetis_rngb, KINETIS_IRQ_RNGB)         /* Vector 39: Random number generator */
+VECTOR(kinetis_i2c0, KINETIS_IRQ_I2C0)         /* Vector 40: I2C0 */
+VECTOR(kinetis_i2c1, KINETIS_IRQ_I2C1)         /* Vector 41: I2C1 */
+VECTOR(kinetis_spi0, KINETIS_IRQ_SPI0)         /* Vector 42: SPI0 all sources */
+VECTOR(kinetis_spi1, KINETIS_IRQ_SPI1)         /* Vector 43: SPI1 all sources */
+VECTOR(kinetis_spi2, KINETIS_IRQ_SPI2)         /* Vector 44: SPI2 all sources */
+VECTOR(kinetis_can0mb, KINETIS_IRQ_CAN0MB)     /* Vector 45: CAN0 OR'ed Message buffer (0-15) */
+VECTOR(kinetis_can0bo, KINETIS_IRQ_CAN0BO)     /* Vector 46: CAN0 Bus Off */
+VECTOR(kinetis_can0err, KINETIS_IRQ_CAN0ERR)   /* Vector 47: CAN0 Error */
+VECTOR(kinetis_can0tw, KINETIS_IRQ_CAN0TW)     /* Vector 48: CAN0 Transmit Warning */
+VECTOR(kinetis_can0rw, KINETIS_IRQ_CAN0RW)     /* Vector 49: CAN0 Receive Warning */
+VECTOR(kinetis_can0wu, KINETIS_IRQ_CAN0WU)     /* Vector 50: CAN0 Wake UP */
+UNUSED(KINETIS_IRQ_RESVD35)                    /* Vector 51: Reserved */
+UNUSED(KINETIS_IRQ_RESVD36)                    /* Vector 52: Reserved */
+VECTOR(kinetis_can1mb, KINETIS_IRQ_CAN1MB)     /* Vector 53: CAN1 OR'ed Message buffer (0-15) */
+VECTOR(kinetis_can1bo, KINETIS_IRQ_CAN1BO)     /* Vector 54: CAN1 Bus Off */
+VECTOR(kinetis_can1err, KINETIS_IRQ_CAN1ERR)   /* Vector 55: CAN1 Error */
+VECTOR(kinetis_can1tw, KINETIS_IRQ_CAN1TW)     /* Vector 56: CAN1 Transmit Warning */
+VECTOR(kinetis_can1rw, KINETIS_IRQ_CAN1RW)     /* Vector 57: CAN1 Receive Warning */
+VECTOR(kinetis_can1wu, KINETIS_IRQ_CAN1WU)     /* Vector 58: CAN1 Wake UP */
+UNUSED(KINETIS_IRQ_RESVD43)                    /* Vector 59: Reserved */
+UNUSED(KINETIS_IRQ_RESVD44)                    /* Vector 60: Reserved */
+VECTOR(kinetis_uart0s, KINETIS_IRQ_UART0S)     /* Vector 61: UART0 status */
+VECTOR(kinetis_uart0e, KINETIS_IRQ_UART0E)     /* Vector 62: UART0 error */
+VECTOR(kinetis_uart1s, KINETIS_IRQ_UART1S)     /* Vector 63: UART1 status */
+VECTOR(kinetis_uart1e, KINETIS_IRQ_UART1E)     /* Vector 64: UART1 error */
+VECTOR(kinetis_uart2s, KINETIS_IRQ_UART2S)     /* Vector 65: UART2 status */
+VECTOR(kinetis_uart2e, KINETIS_IRQ_UART2E)     /* Vector 66: UART2 error */
+VECTOR(kinetis_uart3s, KINETIS_IRQ_UART3S)     /* Vector 67: UART3 status */
+VECTOR(kinetis_uart3e, KINETIS_IRQ_UART3E)     /* Vector 68: UART3 error */
+VECTOR(kinetis_uart4s, KINETIS_IRQ_UART4S)     /* Vector 69: UART4 status */
+VECTOR(kinetis_uart4e, KINETIS_IRQ_UART4E)     /* Vector 70: UART4 error */
+VECTOR(kinetis_uart5s, KINETIS_IRQ_UART5S)     /* Vector 71: UART5 status */
+VECTOR(kinetis_uart5e, KINETIS_IRQ_UART5E)     /* Vector 72: UART5 error */
+VECTOR(kinetis_adc0, KINETIS_IRQ_ADC0)         /* Vector 73: ADC0 */
+VECTOR(kinetis_adc1, KINETIS_IRQ_ADC1)         /* Vector 74: ADC1 */
+VECTOR(kinetis_cmp0, KINETIS_IRQ_CMP0)         /* Vector 75: CMP0 */
+VECTOR(kinetis_cmp1, KINETIS_IRQ_CMP1)         /* Vector 76: CMP1 */
+VECTOR(kinetis_cmp2, KINETIS_IRQ_CMP2)         /* Vector 77: CMP2 */
+VECTOR(kinetis_ftm0, KINETIS_IRQ_FTM0)         /* Vector 78: FTM0 all sources */
+VECTOR(kinetis_ftm1, KINETIS_IRQ_FTM1)         /* Vector 79: FTM1 all sources */
+VECTOR(kinetis_ftm2, KINETIS_IRQ_FTM2)         /* Vector 80: FTM2 all sources */
+VECTOR(kinetis_cmt, KINETIS_IRQ_CMT)           /* Vector 81: CMT */
+VECTOR(kinetis_rtc, KINETIS_IRQ_RTC)           /* Vector 82: RTC alarm interrupt */
+UNUSED(KINETIS_IRQ_RESVD67)                    /* Vector 83: Reserved */
+VECTOR(kinetis_pitch0, KINETIS_IRQ_PITCH0)     /* Vector 84: PIT channel 0 */
+VECTOR(kinetis_pitch1, KINETIS_IRQ_PITCH1)     /* Vector 85: PIT channel 1 */
+VECTOR(kinetis_pitch2, KINETIS_IRQ_PITCH2)     /* Vector 86: PIT channel 2 */
+VECTOR(kinetis_pitch3, KINETIS_IRQ_PITCH3)     /* Vector 87: PIT channel 3 */
+VECTOR(kinetis_pdb, KINETIS_IRQ_PDB)           /* Vector 88: PDB */
+VECTOR(kinetis_usbotg, KINETIS_IRQ_USBOTG)     /* Vector 89: USB OTG */
+VECTOR(kinetis_usbcd, KINETIS_IRQ_USBCD)       /* Vector 90: USB charger detect */
+VECTOR(kinetis_emactmr, KINETIS_IRQ_EMACTMR)   /* Vector 91: Ethernet MAC IEEE 1588 timer interrupt */
+VECTOR(kinetis_emactx, KINETIS_IRQ_EMACTX)     /* Vector 92: Ethernet MAC transmit interrupt */
+VECTOR(kinetis_emacrx, KINETIS_IRQ_EMACRX)     /* Vector 93: Ethernet MAC receive interrupt */
+VECTOR(kinetis_emacmisc, KINETIS_IRQ_EMACMISC) /* Vector 94: Ethernet MAC error and misc interrupt */
+VECTOR(kinetis_i2s0, KINETIS_IRQ_I2S0)         /* Vector 95: I2S0 */
+VECTOR(kinetis_sdhc, KINETIS_IRQ_SDHC)         /* Vector 96: SDHC */
+VECTOR(kinetis_dac0, KINETIS_IRQ_DAC0)         /* Vector 97: DAC0 */
+VECTOR(kinetis_dac1, KINETIS_IRQ_DAC1)         /* Vector 98: DAC1 */
+VECTOR(kinetis_tsi, KINETIS_IRQ_TSI)           /* Vector 99: TSI all sources */
+VECTOR(kinetis_mcg, KINETIS_IRQ_MCG)           /* Vector 100: MCG */
+VECTOR(kinetis_lpt, KINETIS_IRQ_LPT)           /* Vector 101: Low power timer */
+UNUSED(KINETIS_IRQ_RESVD86)                    /* Vector 102: Reserved */
+VECTOR(kinetis_porta, KINETIS_IRQ_PORTA)       /* Vector 103: Pin detect port A */
+VECTOR(kinetis_portb, KINETIS_IRQ_PORTB)       /* Vector 104: Pin detect port B */
+VECTOR(kinetis_portc, KINETIS_IRQ_PORTC)       /* Vector 105: Pin detect port C */
+VECTOR(kinetis_portd, KINETIS_IRQ_PORTD)       /* Vector 106: Pin detect port D */
+VECTOR(kinetis_porte, KINETIS_IRQ_PORTE)       /* Vector 107: Pin detect port E */
+UNUSED(KINETIS_IRQ_RESVD92)                    /* Vector 108: Reserved */
+UNUSED(KINETIS_IRQ_RESVD93)                    /* Vector 109: Reserved */
+VECTOR(kinetis_swi, KINETIS_IRQ_SWI)           /* Vector 110: Software interrupt */
+#  endif /* CONFIG_ARMV7M_CMNVECTOR */
+#endif /* CONFIG_ARCH_FAMILY_K60 */
diff --git a/arch/arm/src/kinetis/chip/kinetis_k64fmc.h b/arch/arm/src/kinetis/chip/kinetis_k64fmc.h
new file mode 100644
index 0000000000000000000000000000000000000000..036e38f1299075c3268146a460b03119bfd098dc
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_k64fmc.h
@@ -0,0 +1,293 @@
+/************************************************************************************
+ * arch/arm/src/kinetis/kinetis_k64fmc.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K64FMC_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K64FMC_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Register Offsets *****************************************************************/
+
+#define KINETIS_FMC_PFAPR_OFFSET        0x0000 /* Flash Access Protection Register */
+#define KINETIS_FMC_PFB0CR_OFFSET       0x0004 /* Flash Bank 0 Control Register */
+#define KINETIS_FMC_PFB1CR_OFFSET       0x0008 /* Flash Bank 1 Control Register */
+
+/* Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */
+
+#define KINETIS_FMC_TAGVD_OFFSET(w,s)   (0x100 + ((w) << 5) + ((s) << 2))
+
+#define KINETIS_FMC_TAGVDW0S0_OFFSET    0x0100 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW0S1_OFFSET    0x0104 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW0S2_OFFSET    0x0108 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW0S3_OFFSET    0x010c /* Cache Directory Storage */
+
+#define KINETIS_FMC_TAGVDW1S0_OFFSET    0x0110 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW1S1_OFFSET    0x0114 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW1S2_OFFSET    0x0118 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW1S3_OFFSET    0x011c /* Cache Directory Storage */
+
+#define KINETIS_FMC_TAGVDW2S0_OFFSET    0x0120 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW2S1_OFFSET    0x0124 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW2S2_OFFSET    0x0128 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW2S3_OFFSET    0x012c /* Cache Directory Storage */
+
+#define KINETIS_FMC_TAGVDW3S0_OFFSET    0x0130 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW3S1_OFFSET    0x0134 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW3S2_OFFSET    0x0138 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW3S3_OFFSET    0x013c /* Cache Directory Storage */
+
+/* Cache Data Storage (upper and lower) for way=w and set=s, w=0..3, s=0..7 */
+
+#define KINETIS_FMC_DATAU_OFFSET(w,s)   (0x200 + ((w) << 6) + ((s) << 2))
+#define KINETIS_FMC_DATAL_OFFSET(w,s)   (0x204 + ((w) << 6) + ((s) << 2))
+
+#define KINETIS_FMC_DATAW0S0U_OFFSET    0x0200 /* Cache Data Storage (upper word) */
+#define KINETIS_FMC_DATAW0S0L_OFFSET    0x0204 /* Cache Data Storage (lower word) */
+#define KINETIS_FMC_DATAW0S1U_OFFSET    0x0208 /* Cache Data Storage (upper word) */
+#define KINETIS_FMC_DATAW0S1L_OFFSET    0x020c /* Cache Data Storage (lower word) */
+#define KINETIS_FMC_DATAW0S2U_OFFSET    0x0210 /* Cache Data Storage (upper word) */
+#define KINETIS_FMC_DATAW0S2L_OFFSET    0x0214 /* Cache Data Storage (lower word) */
+#define KINETIS_FMC_DATAW0S3U_OFFSET    0x0218 /* Cache Data Storage (upper word) */
+#define KINETIS_FMC_DATAW0S3L_OFFSET    0x021c /* Cache Data Storage (lower word) */
+
+#define KINETIS_FMC_DATAW1S0U_OFFSET    0x0220 /* Cache Data Storage (upper word) */
+#define KINETIS_FMC_DATAW1S0L_OFFSET    0x0224 /* Cache Data Storage (lower word) */
+#define KINETIS_FMC_DATAW1S1U_OFFSET    0x0228 /* Cache Data Storage (upper word) */
+#define KINETIS_FMC_DATAW1S1L_OFFSET    0x022c /* Cache Data Storage (lower word) */
+#define KINETIS_FMC_DATAW1S2U_OFFSET    0x0230 /* Cache Data Storage (upper word) */
+#define KINETIS_FMC_DATAW1S2L_OFFSET    0x0234 /* Cache Data Storage (lower word) */
+#define KINETIS_FMC_DATAW1S3U_OFFSET    0x0238 /* Cache Data Storage (upper word) */
+#define KINETIS_FMC_DATAW1S3L_OFFSET    0x023c /* Cache Data Storage (lower word) */
+
+#define KINETIS_FMC_DATAW2S0U_OFFSET    0x0240 /* Cache Data Storage (upper word) */
+#define KINETIS_FMC_DATAW2S0L_OFFSET    0x0244 /* Cache Data Storage (lower word) */
+#define KINETIS_FMC_DATAW2S1U_OFFSET    0x0248 /* Cache Data Storage (upper word) */
+#define KINETIS_FMC_DATAW2S1L_OFFSET    0x024c /* Cache Data Storage (lower word) */
+#define KINETIS_FMC_DATAW2S2U_OFFSET    0x0250 /* Cache Data Storage (upper word) */
+#define KINETIS_FMC_DATAW2S2L_OFFSET    0x0254 /* Cache Data Storage (lower word) */
+#define KINETIS_FMC_DATAW2S3U_OFFSET    0x0258 /* Cache Data Storage (upper word) */
+#define KINETIS_FMC_DATAW2S3L_OFFSET    0x025c /* Cache Data Storage (lower word) */
+
+#define KINETIS_FMC_DATAW3S0U_OFFSET    0x0260 /* Cache Data Storage (upper word) */
+#define KINETIS_FMC_DATAW3S0L_OFFSET    0x0264 /* Cache Data Storage (lower word) */
+#define KINETIS_FMC_DATAW3S1U_OFFSET    0x0268 /* Cache Data Storage (upper word) */
+#define KINETIS_FMC_DATAW3S1L_OFFSET    0x026c /* Cache Data Storage (lower word) */
+#define KINETIS_FMC_DATAW3S2U_OFFSET    0x0270 /* Cache Data Storage (upper word) */
+#define KINETIS_FMC_DATAW3S2L_OFFSET    0x0274 /* Cache Data Storage (lower word) */
+#define KINETIS_FMC_DATAW3S3U_OFFSET    0x0278 /* Cache Data Storage (upper word) */
+#define KINETIS_FMC_DATAW3S3L_OFFSET    0x027c /* Cache Data Storage (lower word) */
+
+/* Register Addresses ***************************************************************/
+
+#define KINETIS_FMC_PFAPR               (KINETIS_FMC_BASE+KINETIS_FMC_PFAPR_OFFSET)
+#define KINETIS_FMC_PFB0CR              (KINETIS_FMC_BASE+KINETIS_FMC_PFB0CR_OFFSET)
+#define KINETIS_FMC_PFB1CR              (KINETIS_FMC_BASE+KINETIS_FMC_PFB1CR_OFFSET)
+
+/*  Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */
+
+#define KINETIS_FMC_TAGVD(w,s)          (KINETIS_FMC_BASE+KINETIS_FMC_TAGVD_OFFSET(w,s))
+
+#define KINETIS_FMC_TAGVDW0S0           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW0S0_OFFSET)
+#define KINETIS_FMC_TAGVDW0S1           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW0S1_OFFSET)
+#define KINETIS_FMC_TAGVDW0S2           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW0S2_OFFSET)
+#define KINETIS_FMC_TAGVDW0S3           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW0S3_OFFSET)
+
+#define KINETIS_FMC_TAGVDW1S0           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW1S0_OFFSET)
+#define KINETIS_FMC_TAGVDW1S1           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW1S1_OFFSET)
+#define KINETIS_FMC_TAGVDW1S2           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW1S2_OFFSET)
+#define KINETIS_FMC_TAGVDW1S3           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW1S3_OFFSET)
+
+#define KINETIS_FMC_TAGVDW2S0           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW2S0_OFFSET)
+#define KINETIS_FMC_TAGVDW2S1           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW2S1_OFFSET)
+#define KINETIS_FMC_TAGVDW2S2           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW2S2_OFFSET)
+#define KINETIS_FMC_TAGVDW2S3           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW2S3_OFFSET)
+
+#define KINETIS_FMC_TAGVDW3S0           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW3S0_OFFSET)
+#define KINETIS_FMC_TAGVDW3S1           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW3S1_OFFSET)
+#define KINETIS_FMC_TAGVDW3S2           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW3S2_OFFSET)
+#define KINETIS_FMC_TAGVDW3S3           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW3S3_OFFSET)
+
+/* Cache Data Storage (upper and lower) for way=w and set=s, w=0..3, s=0..7 */
+
+#define KINETIS_FMC_DATAU(w,s)          (KINETIS_FMC_BASE+KINETIS_FMC_DATAU_OFFSET(w,s))
+#define KINETIS_FMC_DATAL(w,s)          (KINETIS_FMC_BASE+KINETIS_FMC_DATAL_OFFSET(w,s))
+
+#define KINETIS_FMC_DATAW0S0U           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S0U_OFFSET)
+#define KINETIS_FMC_DATAW0S0L           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S0L_OFFSET)
+#define KINETIS_FMC_DATAW0S1U           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S1U_OFFSET)
+#define KINETIS_FMC_DATAW0S1L           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S1L_OFFSET)
+#define KINETIS_FMC_DATAW0S2U           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S2U_OFFSET)
+#define KINETIS_FMC_DATAW0S2L           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S2L_OFFSET)
+#define KINETIS_FMC_DATAW0S3U           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S3U_OFFSET)
+#define KINETIS_FMC_DATAW0S3L           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S3L_OFFSET)
+
+#define KINETIS_FMC_DATAW1S0U           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S0U_OFFSET)
+#define KINETIS_FMC_DATAW1S0L           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S0L_OFFSET)
+#define KINETIS_FMC_DATAW1S1U           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S1U_OFFSET)
+#define KINETIS_FMC_DATAW1S1L           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S1L_OFFSET)
+#define KINETIS_FMC_DATAW1S2U           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S2U_OFFSET)
+#define KINETIS_FMC_DATAW1S2L           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S2L_OFFSET)
+#define KINETIS_FMC_DATAW1S3U           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S3U_OFFSET)
+#define KINETIS_FMC_DATAW1S3L           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S3L_OFFSET)
+
+#define KINETIS_FMC_DATAW2S0U           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S0U_OFFSET)
+#define KINETIS_FMC_DATAW2S0L           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S0L_OFFSET)
+#define KINETIS_FMC_DATAW2S1U           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S1U_OFFSET)
+#define KINETIS_FMC_DATAW2S1L           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S1L_OFFSET)
+#define KINETIS_FMC_DATAW2S2U           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S2U_OFFSET)
+#define KINETIS_FMC_DATAW2S2L           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S2L_OFFSET)
+#define KINETIS_FMC_DATAW2S3U           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S3U_OFFSET)
+#define KINETIS_FMC_DATAW2S3L           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S3L_OFFSET)
+
+#define KINETIS_FMC_DATAW3S0U           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S0U_OFFSET)
+#define KINETIS_FMC_DATAW3S0L           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S0L_OFFSET)
+#define KINETIS_FMC_DATAW3S1U           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S1U_OFFSET)
+#define KINETIS_FMC_DATAW3S1L           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S1L_OFFSET)
+#define KINETIS_FMC_DATAW3S2U           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S2U_OFFSET)
+#define KINETIS_FMC_DATAW3S2L           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S2L_OFFSET)
+#define KINETIS_FMC_DATAW3S3U           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S3U_OFFSET)
+#define KINETIS_FMC_DATAW3S3L           (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S3L_OFFSET)
+
+/* Register Bit Definitions *********************************************************/
+
+/* Flash Access Protection Register */
+/* Access protection bits (all masters) */
+
+#define FMC_PFAPR_NONE                  0 /* No access may be performed by this master */
+#define FMC_PFAPR_RDONLY                1 /* Only read accesses may be performed by this master */
+#define FMC_PFAPR_WRONLY                2 /* Only write accesses may be performed by this master */
+#define FMC_PFAPR_RDWR                  3 /* Both read and write accesses may be performed by this master */
+
+#define FMC_PFAPR_M0AP_SHIFT            (0)       /* Bits 0-1: Master 0 Access Protection */
+#define FMC_PFAPR_M0AP_MASK             (3 << FMC_PFAPR_M0AP_SHIFT)
+#define FMC_PFAPR_M1AP_SHIFT            (2)       /* Bits 2-3: Master 1 Access Protection */
+#define FMC_PFAPR_M1AP_MASK             (3 << FMC_PFAPR_M1AP_SHIFT)
+#define FMC_PFAPR_M2AP_SHIFT            (4)       /* Bits 4-5: Master 2 Access Protection */
+#define FMC_PFAPR_M2AP_MASK             (3 << FMC_PFAPR_M2AP_SHIFT)
+#define FMC_PFAPR_M3AP_SHIFT            (6)       /* Bits 6-7: Master 3 Access Protection */
+#define FMC_PFAPR_M3AP_MASK             (3 << FMC_PFAPR_M3AP_SHIFT)
+#define FMC_PFAPR_M4AP_SHIFT            (8)       /* Bits 8-9: Master 4 Access Protection */
+#define FMC_PFAPR_M4AP_MASK             (3 << FMC_PFAPR_M4AP_SHIFT)
+#define FMC_PFAPR_M5AP_SHIFT            (10)      /* Bits 10-11: Master 5 Access Protection */
+#define FMC_PFAPR_M5AP_MASK             (3 << FMC_PFAPR_M5AP_SHIFT)
+#define FMC_PFAPR_M6AP_SHIFT            (12)      /* Bits 12-13: Master 6 Access Protection */
+#define FMC_PFAPR_M6AP_MASK             (3 << FMC_PFAPR_M6AP_SHIFT)
+#define FMC_PFAPR_M7AP_SHIFT            (14)      /* Bits 14-15: Master 7 Access Protection */
+#define FMC_PFAPR_M7AP_MASK             (3 << FMC_PFAPR_M7AP_SHIFT)
+#define FMC_PFAPR_M0PFD                 (1 << 16) /* Bit 16: Master 0 Prefetch Disable */
+#define FMC_PFAPR_M1PFD                 (1 << 17) /* Bit 17: Master 1 Prefetch Disable */
+#define FMC_PFAPR_M2PFD                 (1 << 18) /* Bit 18: Master 2 Prefetch Disable */
+#define FMC_PFAPR_M3PFD                 (1 << 19) /* Bit 19: Master 3 Prefetch Disable */
+#define FMC_PFAPR_M4PFD                 (1 << 20) /* Bit 20: Master 4 Prefetch Disable */
+#define FMC_PFAPR_M5PFD                 (1 << 21) /* Bit 21: Master 5 Prefetch Disable */
+#define FMC_PFAPR_M6PFD                 (1 << 22) /* Bit 22: Master 6 Prefetch Disable */
+#define FMC_PFAPR_M7PFD                 (1 << 23) /* Bit 23: Master 7 Prefetch Disable */
+                                                  /* Bits 24-31: Reserved */
+/* Flash Bank 0 Control Register */
+
+#define FMC_PFB0CR_B0SEBE               (1 << 0)  /* Bit 0:  Bank 0 Single Entry Buffer Enable */
+#define FMC_PFB0CR_B0IPE                (1 << 1)  /* Bit 1:  Bank 0 Instruction Prefetch Enable */
+#define FMC_PFB0CR_B0DPE                (1 << 2)  /* Bit 2:  Bank 0 Data Prefetch Enable */
+#define FMC_PFB0CR_B0ICE                (1 << 3)  /* Bit 3:  Bank 0 Instruction Cache Enable */
+#define FMC_PFB0CR_B0DCE                (1 << 4)  /* Bit 4:  Bank 0 Data Cache Enable */
+#define FMC_PFB0CR_CRC_SHIFT            (5)       /* Bits 5-7: Cache Replacement Control */
+#define FMC_PFB0CR_CRC_MASK             (7 << FMC_PFB0CR_CRC_SHIFT)
+#  define FMC_PFB0CR_CRC_ALL            (0 << FMC_PFB0CR_CRC_SHIFT) /* LRU all four ways */
+#  define FMC_PFB0CR_CRC_I01D23         (2 << FMC_PFB0CR_CRC_SHIFT) /* LRU ifetches 0-1 data 2-3 */
+#  define FMC_PFB0CR_CRC_I012D3         (3 << FMC_PFB0CR_CRC_SHIFT) /* LRU ifetches 0-3 data 3 */
+                                                  /* Bits 8-16: Reserved */
+#define FMC_PFB0CR_B0MW_SHIFT           (17)      /* Bits 17-18: Bank 0 Memory Width */
+#define FMC_PFB0CR_B0MW_MASK            (3 << FMC_PFB0CR_B0MW_SHIFT)
+#  define FMC_PFB0CR_B0MW_32BITS        (0 << FMC_PFB0CR_B0MW_SHIFT) /* 32 bits */
+#  define FMC_PFB0CR_B0MW_64BITS        (1 << FMC_PFB0CR_B0MW_SHIFT) /* 64 bits */
+#define FMC_PFB0CR_S_B_INV              (1 << 19) /* Bit 19:  Invalidate Prefetch Speculation Buffer */
+#define FMC_PFB0CR_CINV_WAY_SHIFT       (20)      /* Bits 20-23: Cache Invalidate Way x */
+#define FMC_PFB0CR_CINV_WAY_MASK        (15 << FMC_PFB0CR_CINV_WAY_SHIFT)
+#define FMC_PFB0CR_CLCK_WAY_SHIFT       (24)      /* Bits 24-27: Cache Lock Way x */
+#define FMC_PFB0CR_CLCK_WAY_MASK        (15 << FMC_PFB0CR_CLCK_WAY_SHIFT)
+#define FMC_PFB0CR_B0RWSC_SHIFT         (28)      /* Bits 28-31: Bank 0 Read Wait State Control */
+#define FMC_PFB0CR_B0RWSC_MASK          (15 << FMC_PFB0CR_B0RWSC_SHIFT)
+
+/* Flash Bank 1 Control Register */
+
+#define FMC_PFB1CR_B1SEBE               (1 << 0)  /* Bit 0:  Bank 1 Single Entry Buffer Enable */
+#define FMC_PFB1CR_B1IPE                (1 << 1)  /* Bit 1:  Bank 1 Instruction Prefetch Enable */
+#define FMC_PFB1CR_B1DPE                (1 << 2)  /* Bit 2:  Bank 1 Data Prefetch Enable */
+#define FMC_PFB1CR_B1ICE                (1 << 3)  /* Bit 3:  Bank 1 Instruction Cache Enable */
+#define FMC_PFB1CR_B1DCE                (1 << 4)  /* Bit 4:  Bank 1 Data Cache Enable */
+                                                  /* Bits 5-16: Reserved */
+#define FMC_PFB1CR_B1MW_SHIFT           (17)      /* Bits 17-18: Bank 1 Memory Width */
+#define FMC_PFB1CR_B1MW_MASK            (3 << FMC_PFB1CR_B1MW_SHIFT)
+#  define FMC_PFB1CR_B1MW_32BITS        (0 << FMC_PFB1CR_B1MW_SHIFT) /* 32 bits */
+#  define FMC_PFB1CR_B1MW_64BITS        (1 << FMC_PFB1CR_B1MW_SHIFT) /* 64 bits */
+                                                  /* Bits 19-27: Reserved */
+#define FMC_PFB1CR_B1RWSC_SHIFT         (28)      /* Bits 28-31: Bank 1 Read Wait State Control */
+#define FMC_PFB1CR_B1RWSC_MASK          (15 << FMC_PFB1CR_B0RWSC_SHIFT)
+
+/* Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */
+
+#define FMC_TAGVD_VALID                 (1 << 0)  /* Bit 0:  1-bit valid for cache entry */
+                                                  /* Bits 1-4: Reserved */
+#define FMC_TAGVD_TAG_SHIFT             (5)       /* Bits 5-18: 13-bit tag for cache entry */
+#define FMC_TAGVD_TAG_MASK              (0x1fff << FMC_TAGVD_TAG_SHIFT)
+                                                  /* Bits 19-31: Reserved */
+
+/* Cache Data Storage (upper and lower) for way=w and set=s, w=0..3, s=0..7.
+ * 64-bit data in two 32-bit registers.
+ */
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K64FMC_H */
diff --git a/arch/arm/src/kinetis/chip/kinetis_k64k66mpu.h b/arch/arm/src/kinetis/chip/kinetis_k64k66mpu.h
new file mode 100644
index 0000000000000000000000000000000000000000..5c9d22ccc63aeeab5650ec205932820ec5c46b24
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_k64k66mpu.h
@@ -0,0 +1,359 @@
+/****************************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_k64k66mpu.h
+ *
+ *   Copyright (C) 2011, 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K64K66MPU_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K64K66MPU_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+/* Register Offsets *********************************************************************************/
+
+#define KINETIS_MPU_CESR_OFFSET         0x0000 /* Control/Error Status Register */
+
+#define KINETIS_MPU_EAR_OFFSET(n)      (0x0010+((n)<<3)) /* Error Address Register, Slave Port n */
+#define KINETIS_MPU_EDR_OFFSET(n)      (0x0014+((n)<<3)) /* Error Detail Register, Slave Port n */
+
+#define KINETIS_MPU_EAR0_OFFSET        0x0010 /* Error Address Register, Slave Port 0 */
+#define KINETIS_MPU_EDR0_OFFSET        0x0014 /* Error Detail Register, Slave Port 0 */
+#define KINETIS_MPU_EAR1_OFFSET        0x0018 /* Error Address Register, Slave Port 1 */
+#define KINETIS_MPU_EDR1_OFFSET        0x001c /* Error Detail Register, Slave Port 1 */
+#define KINETIS_MPU_EAR2_OFFSET        0x0020 /* Error Address Register, Slave Port 2 */
+#define KINETIS_MPU_EDR2_OFFSET        0x0024 /* Error Detail Register, Slave Port 2 */
+#define KINETIS_MPU_EAR3_OFFSET        0x0028 /* Error Address Register, Slave Port 3 */
+#define KINETIS_MPU_EDR3_OFFSET        0x002c /* Error Detail Register, Slave Port 3 */
+#define KINETIS_MPU_EAR4_OFFSET        0x0030 /* Error Address Register, Slave Port 4 */
+#define KINETIS_MPU_EDR4_OFFSET        0x0034 /* Error Detail Register, Slave Port 4 */
+
+#define KINETIS_MPU_RGD_WORD_OFFSET(n,m) (x0400+((n)<<4)+((m)<< 2) /* Region Descriptor n, Word m */
+
+#define KINETIS_MPU_RGD0_WORD0_OFFSET  0x0400 /* Region Descriptor 0, Word 0 */
+#define KINETIS_MPU_RGD0_WORD1_OFFSET  0x0404 /* Region Descriptor 0, Word 1 */
+#define KINETIS_MPU_RGD0_WORD2_OFFSET  0x0408 /* Region Descriptor 0, Word 2 */
+#define KINETIS_MPU_RGD0_WORD3_OFFSET  0x040c /* Region Descriptor 0, Word 3 */
+#define KINETIS_MPU_RGD1_WORD0_OFFSET  0x0410 /* Region Descriptor 1, Word 0 */
+#define KINETIS_MPU_RGD1_WORD1_OFFSET  0x0414 /* Region Descriptor 1, Word 1 */
+#define KINETIS_MPU_RGD1_WORD2_OFFSET  0x0418 /* Region Descriptor 1, Word 2 */
+#define KINETIS_MPU_RGD1_WORD3_OFFSET  0x041c /* Region Descriptor 1, Word 3 */
+#define KINETIS_MPU_RGD2_WORD0_OFFSET  0x0420 /* Region Descriptor 2, Word 0 */
+#define KINETIS_MPU_RGD2_WORD1_OFFSET  0x0424 /* Region Descriptor 2, Word 1 */
+#define KINETIS_MPU_RGD2_WORD2_OFFSET  0x0428 /* Region Descriptor 2, Word 2 */
+#define KINETIS_MPU_RGD2_WORD3_OFFSET  0x042c /* Region Descriptor 2, Word 3 */
+#define KINETIS_MPU_RGD3_WORD0_OFFSET  0x0430 /* Region Descriptor 3, Word 0 */
+#define KINETIS_MPU_RGD3_WORD1_OFFSET  0x0434 /* Region Descriptor 3, Word 1 */
+#define KINETIS_MPU_RGD3_WORD2_OFFSET  0x0438 /* Region Descriptor 3, Word 2 */
+#define KINETIS_MPU_RGD3_WORD3_OFFSET  0x043c /* Region Descriptor 3, Word 3 */
+#define KINETIS_MPU_RGD4_WORD0_OFFSET  0x0440 /* Region Descriptor 4, Word 0 */
+#define KINETIS_MPU_RGD4_WORD1_OFFSET  0x0444 /* Region Descriptor 4, Word 1 */
+#define KINETIS_MPU_RGD4_WORD2_OFFSET  0x0448 /* Region Descriptor 4, Word 2 */
+#define KINETIS_MPU_RGD4_WORD3_OFFSET  0x044c /* Region Descriptor 4, Word 3 */
+#define KINETIS_MPU_RGD5_WORD0_OFFSET  0x0450 /* Region Descriptor 5, Word 0 */
+#define KINETIS_MPU_RGD5_WORD1_OFFSET  0x0454 /* Region Descriptor 5, Word 1 */
+#define KINETIS_MPU_RGD5_WORD2_OFFSET  0x0458 /* Region Descriptor 5, Word 2 */
+#define KINETIS_MPU_RGD5_WORD3_OFFSET  0x045c /* Region Descriptor 5, Word 3 */
+#define KINETIS_MPU_RGD6_WORD0_OFFSET  0x0460 /* Region Descriptor 6, Word 0 */
+#define KINETIS_MPU_RGD6_WORD1_OFFSET  0x0464 /* Region Descriptor 6, Word 1 */
+#define KINETIS_MPU_RGD6_WORD2_OFFSET  0x0468 /* Region Descriptor 6, Word 2 */
+#define KINETIS_MPU_RGD6_WORD3_OFFSET  0x046c /* Region Descriptor 6, Word 3 */
+#define KINETIS_MPU_RGD7_WORD0_OFFSET  0x0470 /* Region Descriptor 7, Word 0 */
+#define KINETIS_MPU_RGD7_WORD1_OFFSET  0x0474 /* Region Descriptor 7, Word 1 */
+#define KINETIS_MPU_RGD7_WORD2_OFFSET  0x0478 /* Region Descriptor 7, Word 2 */
+#define KINETIS_MPU_RGD7_WORD3_OFFSET  0x047c /* Region Descriptor 7, Word 3 */
+#define KINETIS_MPU_RGD8_WORD0_OFFSET  0x0480 /* Region Descriptor 8, Word 0 */
+#define KINETIS_MPU_RGD8_WORD1_OFFSET  0x0484 /* Region Descriptor 8, Word 1 */
+#define KINETIS_MPU_RGD8_WORD2_OFFSET  0x0488 /* Region Descriptor 8, Word 2 */
+#define KINETIS_MPU_RGD8_WORD3_OFFSET  0x048c /* Region Descriptor 8, Word 3 */
+#define KINETIS_MPU_RGD9_WORD0_OFFSET  0x0490 /* Region Descriptor 9, Word 0 */
+#define KINETIS_MPU_RGD9_WORD1_OFFSET  0x0494 /* Region Descriptor 9, Word 1 */
+#define KINETIS_MPU_RGD9_WORD2_OFFSET  0x0498 /* Region Descriptor 9, Word 2 */
+#define KINETIS_MPU_RGD9_WORD3_OFFSET  0x049c /* Region Descriptor 9, Word 3 */
+#define KINETIS_MPU_RGD10_WORD0_OFFSET 0x04a0 /* Region Descriptor 10, Word 0 */
+#define KINETIS_MPU_RGD10_WORD1_OFFSET 0x04a4 /* Region Descriptor 10, Word 1 */
+#define KINETIS_MPU_RGD10_WORD2_OFFSET 0x04a8 /* Region Descriptor 10, Word 2 */
+#define KINETIS_MPU_RGD10_WORD3_OFFSET 0x04ac /* Region Descriptor 10, Word 3 */
+#define KINETIS_MPU_RGD11_WORD0_OFFSET 0x04b0 /* Region Descriptor 11, Word 0 */
+#define KINETIS_MPU_RGD11_WORD1_OFFSET 0x04b4 /* Region Descriptor 11, Word 1 */
+#define KINETIS_MPU_RGD11_WORD2_OFFSET 0x04b8 /* Region Descriptor 11, Word 2 */
+#define KINETIS_MPU_RGD11_WORD3_OFFSET 0x04bc /* Region Descriptor 11, Word 3 */
+
+#define KINETIS_MPU_RGDAAC_OFFSET(n)   (0x0800+((n)<<2)) /* Region Descriptor Alternate Access Control n */
+
+#define KINETIS_MPU_RGDAAC0_OFFSET     0x0800 /* Region Descriptor Alternate Access Control 0 */
+#define KINETIS_MPU_RGDAAC1_OFFSET     0x0804 /* Region Descriptor Alternate Access Control 1 */
+#define KINETIS_MPU_RGDAAC2_OFFSET     0x0808 /* Region Descriptor Alternate Access Control 2 */
+#define KINETIS_MPU_RGDAAC3_OFFSET     0x080c /* Region Descriptor Alternate Access Control 3 */
+#define KINETIS_MPU_RGDAAC4_OFFSET     0x0810 /* Region Descriptor Alternate Access Control 4 */
+#define KINETIS_MPU_RGDAAC5_OFFSET     0x0814 /* Region Descriptor Alternate Access Control 5 */
+#define KINETIS_MPU_RGDAAC6_OFFSET     0x0818 /* Region Descriptor Alternate Access Control 6 */
+#define KINETIS_MPU_RGDAAC7_OFFSET     0x081c /* Region Descriptor Alternate Access Control 7 */
+#define KINETIS_MPU_RGDAAC8_OFFSET     0x0820 /* Region Descriptor Alternate Access Control 8 */
+#define KINETIS_MPU_RGDAAC9_OFFSET     0x0824 /* Region Descriptor Alternate Access Control 9 */
+#define KINETIS_MPU_RGDAAC10_OFFSET    0x0828 /* Region Descriptor Alternate Access Control 10 */
+#define KINETIS_MPU_RGDAAC11_OFFSET    0x082c /* Region Descriptor Alternate Access Control 11 */
+
+/* Register Addresses *******************************************************************************/
+
+#define KINETIS_MPU_CESR               (KINETIS_MPU_BASE+KINETIS_MPU_CESR_OFFSET)
+
+#define KINETIS_MPU_EAR(n)             (KINETIS_MPU_BASE+KINETIS_MPU_EAR_OFFSET(n))
+#define KINETIS_MPU_EDR(n)             (KINETIS_MPU_BASE+KINETIS_MPU_EDR_OFFSET(n))
+
+#define KINETIS_MPU_EAR0               (KINETIS_MPU_BASE+KINETIS_MPU_EAR0_OFFSET)
+#define KINETIS_MPU_EDR0               (KINETIS_MPU_BASE+KINETIS_MPU_EDR0_OFFSET)
+#define KINETIS_MPU_EAR1               (KINETIS_MPU_BASE+KINETIS_MPU_EAR1_OFFSET)
+#define KINETIS_MPU_EDR1               (KINETIS_MPU_BASE+KINETIS_MPU_EDR1_OFFSET)
+#define KINETIS_MPU_EAR2               (KINETIS_MPU_BASE+KINETIS_MPU_EAR2_OFFSET)
+#define KINETIS_MPU_EDR2               (KINETIS_MPU_BASE+KINETIS_MPU_EDR2_OFFSET)
+#define KINETIS_MPU_EAR3               (KINETIS_MPU_BASE+KINETIS_MPU_EAR3_OFFSET)
+#define KINETIS_MPU_EDR3               (KINETIS_MPU_BASE+KINETIS_MPU_EDR3_OFFSET)
+#define KINETIS_MPU_EAR4               (KINETIS_MPU_BASE+KINETIS_MPU_EAR4_OFFSET)
+#define KINETIS_MPU_EDR4               (KINETIS_MPU_BASE+KINETIS_MPU_EDR4_OFFSET)
+
+#define KINETIS_MPU_RGD_WORD(n,m)      (KINETIS_MPU_BASE+KINETIS_MPU_RGD_WORD_OFFSET(n,m))
+
+#define KINETIS_MPU_RGD0_WORD0         (KINETIS_MPU_BASE+KINETIS_MPU_RGD0_WORD0_OFFSET)
+#define KINETIS_MPU_RGD0_WORD1         (KINETIS_MPU_BASE+KINETIS_MPU_RGD0_WORD1_OFFSET)
+#define KINETIS_MPU_RGD0_WORD2         (KINETIS_MPU_BASE+KINETIS_MPU_RGD0_WORD2_OFFSET)
+#define KINETIS_MPU_RGD0_WORD3         (KINETIS_MPU_BASE+KINETIS_MPU_RGD0_WORD3_OFFSET)
+#define KINETIS_MPU_RGD1_WORD0         (KINETIS_MPU_BASE+KINETIS_MPU_RGD1_WORD0_OFFSET)
+#define KINETIS_MPU_RGD1_WORD1         (KINETIS_MPU_BASE+KINETIS_MPU_RGD1_WORD1_OFFSET)
+#define KINETIS_MPU_RGD1_WORD2         (KINETIS_MPU_BASE+KINETIS_MPU_RGD1_WORD2_OFFSET)
+#define KINETIS_MPU_RGD1_WORD3         (KINETIS_MPU_BASE+KINETIS_MPU_RGD1_WORD3_OFFSET)
+#define KINETIS_MPU_RGD2_WORD0         (KINETIS_MPU_BASE+KINETIS_MPU_RGD2_WORD0_OFFSET)
+#define KINETIS_MPU_RGD2_WORD1         (KINETIS_MPU_BASE+KINETIS_MPU_RGD2_WORD1_OFFSET)
+#define KINETIS_MPU_RGD2_WORD2         (KINETIS_MPU_BASE+KINETIS_MPU_RGD2_WORD2_OFFSET)
+#define KINETIS_MPU_RGD2_WORD3         (KINETIS_MPU_BASE+KINETIS_MPU_RGD2_WORD3_OFFSET)
+#define KINETIS_MPU_RGD3_WORD0         (KINETIS_MPU_BASE+KINETIS_MPU_RGD3_WORD0_OFFSET)
+#define KINETIS_MPU_RGD3_WORD1         (KINETIS_MPU_BASE+KINETIS_MPU_RGD3_WORD1_OFFSET)
+#define KINETIS_MPU_RGD3_WORD2         (KINETIS_MPU_BASE+KINETIS_MPU_RGD3_WORD2_OFFSET)
+#define KINETIS_MPU_RGD3_WORD3         (KINETIS_MPU_BASE+KINETIS_MPU_RGD3_WORD3_OFFSET)
+#define KINETIS_MPU_RGD4_WORD0         (KINETIS_MPU_BASE+KINETIS_MPU_RGD4_WORD0_OFFSET)
+#define KINETIS_MPU_RGD4_WORD1         (KINETIS_MPU_BASE+KINETIS_MPU_RGD4_WORD1_OFFSET)
+#define KINETIS_MPU_RGD4_WORD2         (KINETIS_MPU_BASE+KINETIS_MPU_RGD4_WORD2_OFFSET)
+#define KINETIS_MPU_RGD4_WORD3         (KINETIS_MPU_BASE+KINETIS_MPU_RGD4_WORD3_OFFSET)
+#define KINETIS_MPU_RGD5_WORD0         (KINETIS_MPU_BASE+KINETIS_MPU_RGD5_WORD0_OFFSET)
+#define KINETIS_MPU_RGD5_WORD1         (KINETIS_MPU_BASE+KINETIS_MPU_RGD5_WORD1_OFFSET)
+#define KINETIS_MPU_RGD5_WORD2         (KINETIS_MPU_BASE+KINETIS_MPU_RGD5_WORD2_OFFSET)
+#define KINETIS_MPU_RGD5_WORD3         (KINETIS_MPU_BASE+KINETIS_MPU_RGD5_WORD3_OFFSET)
+#define KINETIS_MPU_RGD6_WORD0         (KINETIS_MPU_BASE+KINETIS_MPU_RGD6_WORD0_OFFSET)
+#define KINETIS_MPU_RGD6_WORD1         (KINETIS_MPU_BASE+KINETIS_MPU_RGD6_WORD1_OFFSET)
+#define KINETIS_MPU_RGD6_WORD2         (KINETIS_MPU_BASE+KINETIS_MPU_RGD6_WORD2_OFFSET)
+#define KINETIS_MPU_RGD6_WORD3         (KINETIS_MPU_BASE+KINETIS_MPU_RGD6_WORD3_OFFSET)
+#define KINETIS_MPU_RGD7_WORD0         (KINETIS_MPU_BASE+KINETIS_MPU_RGD7_WORD0_OFFSET)
+#define KINETIS_MPU_RGD7_WORD1         (KINETIS_MPU_BASE+KINETIS_MPU_RGD7_WORD1_OFFSET)
+#define KINETIS_MPU_RGD7_WORD2         (KINETIS_MPU_BASE+KINETIS_MPU_RGD7_WORD2_OFFSET)
+#define KINETIS_MPU_RGD7_WORD3         (KINETIS_MPU_BASE+KINETIS_MPU_RGD7_WORD3_OFFSET)
+#define KINETIS_MPU_RGD8_WORD0         (KINETIS_MPU_BASE+KINETIS_MPU_RGD8_WORD0_OFFSET)
+#define KINETIS_MPU_RGD8_WORD1         (KINETIS_MPU_BASE+KINETIS_MPU_RGD8_WORD1_OFFSET)
+#define KINETIS_MPU_RGD8_WORD2         (KINETIS_MPU_BASE+KINETIS_MPU_RGD8_WORD2_OFFSET)
+#define KINETIS_MPU_RGD8_WORD3         (KINETIS_MPU_BASE+KINETIS_MPU_RGD8_WORD3_OFFSET)
+#define KINETIS_MPU_RGD9_WORD0         (KINETIS_MPU_BASE+KINETIS_MPU_RGD9_WORD0_OFFSET)
+#define KINETIS_MPU_RGD9_WORD1         (KINETIS_MPU_BASE+KINETIS_MPU_RGD9_WORD1_OFFSET)
+#define KINETIS_MPU_RGD9_WORD2         (KINETIS_MPU_BASE+KINETIS_MPU_RGD9_WORD2_OFFSET)
+#define KINETIS_MPU_RGD9_WORD3         (KINETIS_MPU_BASE+KINETIS_MPU_RGD9_WORD3_OFFSET)
+#define KINETIS_MPU_RGD10_WORD0        (KINETIS_MPU_BASE+KINETIS_MPU_RGD10_WORD0_OFFSET)
+#define KINETIS_MPU_RGD10_WORD1        (KINETIS_MPU_BASE+KINETIS_MPU_RGD10_WORD1_OFFSET)
+#define KINETIS_MPU_RGD10_WORD2        (KINETIS_MPU_BASE+KINETIS_MPU_RGD10_WORD2_OFFSET)
+#define KINETIS_MPU_RGD10_WORD3        (KINETIS_MPU_BASE+KINETIS_MPU_RGD10_WORD3_OFFSET)
+#define KINETIS_MPU_RGD11_WORD0        (KINETIS_MPU_BASE+KINETIS_MPU_RGD11_WORD0_OFFSET)
+#define KINETIS_MPU_RGD11_WORD1        (KINETIS_MPU_BASE+KINETIS_MPU_RGD11_WORD1_OFFSET)
+#define KINETIS_MPU_RGD11_WORD2        (KINETIS_MPU_BASE+KINETIS_MPU_RGD11_WORD2_OFFSET)
+#define KINETIS_MPU_RGD11_WORD3        (KINETIS_MPU_BASE+KINETIS_MPU_RGD11_WORD3_OFFSET)
+
+#define KINETIS_MPU_RGDAAC(n)          (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC_OFFSET(n))
+
+#define KINETIS_MPU_RGDAAC0            (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC0_OFFSET)
+#define KINETIS_MPU_RGDAAC1            (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC1_OFFSET)
+#define KINETIS_MPU_RGDAAC2            (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC2_OFFSET)
+#define KINETIS_MPU_RGDAAC3            (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC3_OFFSET)
+#define KINETIS_MPU_RGDAAC4            (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC4_OFFSET)
+#define KINETIS_MPU_RGDAAC5            (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC5_OFFSET)
+#define KINETIS_MPU_RGDAAC6            (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC6_OFFSET)
+#define KINETIS_MPU_RGDAAC7            (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC7_OFFSET)
+#define KINETIS_MPU_RGDAAC8            (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC8_OFFSET)
+#define KINETIS_MPU_RGDAAC9            (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC9_OFFSET)
+#define KINETIS_MPU_RGDAAC10           (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC10_OFFSET)
+#define KINETIS_MPU_RGDAAC11           (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC11_OFFSET)
+
+/* Register Bit Definitions *************************************************************************/
+
+/* Control/Error Status Register */
+
+#define MPU_CESR_VLD                   (1 << 0)  /* Bit 0:  Valid (global enable/disable for the MPU) */
+                                                 /* Bits 1-7: Reserved */
+#define MPU_CESR_NRGD_SHIFT            (8)       /* Bits 8-11: Number of region descriptors */
+#define MPU_CESR_NRGD_MASK             (15 << MPU_CESR_NRGD_SHIFT)
+#  define MPU_CESR_NRGD_8DESC          (0 << MPU_CESR_NRGD_SHIFT) /* 8 region descriptors */
+#  define MPU_CESR_NRGD_12DESC         (1 << MPU_CESR_NRGD_SHIFT) /* 12 region descriptors */
+#  define MPU_CESR_NRGD_16DESC         (2 << MPU_CESR_NRGD_SHIFT) /* 16 region descriptors */
+#define MPU_CESR_NSP_SHIFT             (12)      /* Bits 12-15: Number of slave ports */
+#define MPU_CESR_NSP_MASK              (15 << MPU_CESR_NSP_SHIFT)
+#define MPU_CESR_HRL_SHIFT             (16)      /* Bits 16-19: Hardware revision level */
+#define MPU_CESR_HRL_MASK              (15 << MPU_CESR_HRL_SHIFT)
+                                                 /* Bits 20-26: Reserved */
+#define MPU_CESR_SPERR_SHIFT           (27)      /* Bits 27-31: Slave port n error */
+#define MPU_CESR_SPERR_MASK            (31 << MPU_CESR_SPERR_SHIFT)
+#  define MPU_CESR_SPERR_SPORT(n)      ((1 << (4-(n))) << MPU_CESR_SPERR_SHIFT) /* Slave port nn */
+#  define MPU_CESR_SPERR_SPORT0        (16 << MPU_CESR_SPERR_SHIFT) /* Slave port 0 */
+#  define MPU_CESR_SPERR_SPORT1        (8 << MPU_CESR_SPERR_SHIFT)  /* Slave port 1 */
+#  define MPU_CESR_SPERR_SPORT2        (4 << MPU_CESR_SPERR_SHIFT)  /* Slave port 2 */
+#  define MPU_CESR_SPERR_SPORT3        (2 << MPU_CESR_SPERR_SHIFT)  /* Slave port 3 */
+#  define MPU_CESR_SPERR_SPORT4        (1 << MPU_CESR_SPERR_SHIFT)  /* Slave port 4 */
+
+/* Error Address Register, Slave Port n.  32-bit error address. */
+
+/* Error Detail Register, Slave Port n */
+
+#define MPU_EDR_ERW                    (1 << 0)  /* Bit 0:  Error read/write */
+#define MPU_EDR_EATTR_SHIFT            (1)       /* Bits 1-3: Error attributes */
+#define MPU_EDR_EATTR_MASK             (7 << MPU_EDR_EATTR_SHIFT)
+#  define MPU_EDR_EATTR_USRINST        (0 << MPU_EDR_EATTR_SHIFT) /* User mode, instruction access */
+#  define MPU_EDR_EATTR_USRDATA        (1 << MPU_EDR_EATTR_SHIFT) /* User mode, data access */
+#  define MPU_EDR_EATTR_SUPINST        (2 << MPU_EDR_EATTR_SHIFT) /* Supervisor mode, instruction access */
+#  define MPU_EDR_EATTR_SUPDATA        (3 << MPU_EDR_EATTR_SHIFT) /* Supervisor mode, data access */
+#define MPU_EDR_EMN_SHIFT              (4)       /* Bits 4-7: Error master number */
+#define MPU_EDR_EMN_MASK               (15 << MPU_EDR_EMN_SHIFT)
+                                                 /* Bits 8-15: Reserved */
+#define MPU_EDR_EACD_SHIFT             (26)      /* Bits 16-31: Error access control detail */
+#define MPU_EDR_EACD_MASK              (0xffff << MPU_EDR_EACD_SHIFT)
+
+/* Region Descriptor n, Word 0 */
+                                                 /* Bits 0-4: Reserved */
+#define MPU_RGD_WORD0_SRTADDR_SHIFT    (5)       /* Bits 5-31: Start address */
+#define MPU_RGD_WORD0_SRTADDR_MASK     (0xffffffe0)
+
+/* Region Descriptor n, Word 1 */
+                                                 /* Bits 0-4: Reserved */
+#define MPU_RGD_WORD1_ENDADDR_SHIFT    (5)       /* Bits 5-31: End address */
+#define MPU_RGD_WORD1_ENDADDR_MASK     (0xffffffe0)
+
+/* Region Descriptor n, Word 2 */
+
+#define MPU_RGD_MSM_RWX                0         /* R/W/X; read, write and execute allowed */
+#define MPU_RGD_MSM_RX                 1         /* R/X; read and execute allowed, but no write */
+#define MPU_RGD_MSM_RW                 2         /* R/W; read and write allowed, but no execute */
+#define MPU_RGD_MSM_UM                 3         /* Same as user mode defined in MUM */
+
+#define MPU_RGD_MUM_R                  4         /* Read allowed */
+#define MPU_RGD_MUM_W                  2         /* Write allowed */
+#define MPU_RGD_MUM_X                  1         /* Execute allocated */
+
+#define MPU_RGD_WORD2_M0UM_SHIFT       (0)       /* Bits 0-2: Bus master 0 user mode access control */
+#define MPU_RGD_WORD2_M0UM_MASK        (7 << MPU_RGD_WORD2_M0UM_SHIFT)
+#define MPU_RGD_WORD2_M0SM_SHIFT       (3)       /* Bits 3-4: Bus master 0 supervisor mode access control */
+#define MPU_RGD_WORD2_M0SM_MASK        (3 << MPU_RGD_WORD2_M0SM_SHIFT)
+#define MPU_RGD_WORD2_M0PE             (1 << 5) /* Bit 5: Bus Master 0 Process Identifier Enable */
+#define MPU_RGD_WORD2_M1UM_SHIFT       (6)       /* Bits 6-8: Bus master 1 user mode access control */
+#define MPU_RGD_WORD2_M1UM_MASK        (7 << MPU_RGD_WORD2_M1UM_SHIFT)
+#define MPU_RGD_WORD2_M1SM_SHIFT       (9)       /* Bits 9-10: Bus master 1 supervisor mode access control */
+#define MPU_RGD_WORD2_M1SM_MASK        (3 << MPU_RGD_WORD2_M1SM_SHIFT)
+#define MPU_RGD_WORD2_M1PE             (1 << 11) /* Bit 11: Bus Master 1 Process Identifier Enable */
+#define MPU_RGD_WORD2_M2UM_SHIFT       (12)      /* Bits 12-14: Bus master 2 user mode access control */
+#define MPU_RGD_WORD2_M2UM_MASK        (7 << MPU_RGD_WORD2_M2UM_SHIFT)
+#define MPU_RGD_WORD2_M2SM_SHIFT       (15)      /* Bits 15-16: Bus master 2 supervisor mode access control */
+#define MPU_RGD_WORD2_M2SM_MASK        (3 << MPU_RGD_WORD2_M2SM_SHIFT)
+#define MPU_RGD_WORD2_M2PE             (1 << 17) /* Bit 17: Bus Master 2 Process Identifier Enable */
+#define MPU_RGD_WORD2_M3UM_SHIFT       (18)      /* Bits 18-20: Bus master 3 user mode access control */
+#define MPU_RGD_WORD2_M3UM_MASK        (7 << MPU_RGD_WORD2_M3UM_SHIFT)
+#define MPU_RGD_WORD2_M3SM_SHIFT       (21)      /* Bits 21-22: Bus master 3 supervisor mode access control */
+#define MPU_RGD_WORD2_M3SM_MASK        (3 << MPU_RGD_WORD2_M3SM_SHIFT)
+#define MPU_RGD_WORD2_M3PE             (1 << 23) /* Bit 23: Bus Master 3 Process Identifier Enable */
+#define MPU_RGD_WORD2_M4WE             (1 << 24) /* Bit 24: Bus master 4 write enable */
+#define MPU_RGD_WORD2_M4RE             (1 << 25) /* Bit 25: Bus master 4 read enable */
+#define MPU_RGD_WORD2_M5WE             (1 << 26) /* Bit 26: Bus master 5 write enable */
+#define MPU_RGD_WORD2_M5RE             (1 << 27) /* Bit 27: Bus master 5 read enable */
+#define MPU_RGD_WORD2_M6WE             (1 << 28) /* Bit 28: Bus master 6 write enable */
+#define MPU_RGD_WORD2_M6RE             (1 << 29) /* Bit 29: Bus master 6 read enable */
+#define MPU_RGD_WORD2_M7WE             (1 << 30) /* Bit 30: Bus master 7 write enable */
+#define MPU_RGD_WORD2_M7RE             (1 << 31) /* Bit 31: Bus master 7 read enable */
+
+/* Region Descriptor n, Word 3 */
+
+#define MPU_RGD_WORD3_VLD              (1 << 0)  /* Bit 0:  Valid */
+                                                 /* Bits 1-31: Reserved */
+/* Region Descriptor Alternate Access Control n */
+
+#define MPU_RGD_RBDACC_M0UM_SHIFT      (0)       /* Bits 0-2: Bus master 0 user mode access control */
+#define MPU_RGD_RBDACC_M0UM_MASK       (7 << MPU_RGD_RBDACC_M0UM_SHIFT)
+#define MPU_RGD_RBDACC_M0SM_SHIFT      (3)       /* Bits 3-4: Bus master 0 supervisor mode access control */
+#define MPU_RGD_RBDACC_M0SM_MASK       (3 << MPU_RGD_RBDACC_M0SM_SHIFT)
+                                                 /* Bit 5: Reserved */
+#define MPU_RGD_RBDACC_M1UM_SHIFT      (6)       /* Bits 6-8: Bus master 1 user mode access control */
+#define MPU_RGD_RBDACC_M1UM_MASK       (7 << MPU_RGD_RBDACC_M1UM_SHIFT)
+#define MPU_RGD_RBDACC_M1SM_SHIFT      (9)       /* Bits 9-10: Bus master 1 supervisor mode access control */
+#define MPU_RGD_RBDACC_M1SM_MASK       (3 << MPU_RGD_RBDACC_M1SM_SHIFT)
+                                                 /* Bit 11: Reserved */
+#define MPU_RGD_RBDACC_M2UM_SHIFT      (12)      /* Bits 12-14: Bus master 2 user mode access control */
+#define MPU_RGD_RBDACC_M2UM_MASK       (7 << MPU_RGD_RBDACC_M2UM_SHIFT)
+#define MPU_RGD_RBDACC_M2SM_SHIFT      (15)      /* Bits 15-16: Bus master 2 supervisor mode access control */
+#define MPU_RGD_RBDACC_M2SM_MASK       (3 << MPU_RGD_RBDACC_M2SM_SHIFT)
+                                                 /* Bit 17: Reserved */
+#define MPU_RGD_RBDACC_M3UM_SHIFT      (18)      /* Bits 18-20: Bus master 3 user mode access control */
+#define MPU_RGD_RBDACC_M3UM_MASK       (7 << MPU_RGD_RBDACC_M3UM_SHIFT)
+#define MPU_RGD_RBDACC_M3SM_SHIFT      (21)      /* Bits 21-22: Bus master 3 supervisor mode access control */
+#define MPU_RGD_RBDACC_M3SM_MASK       (3 << MPU_RGD_RBDACC_M3SM_SHIFT)
+                                                 /* Bit 23: Reserved */
+#define MPU_RGD_RBDACC_M4WE            (1 << 24) /* Bit 24: Bus master 4 write enable */
+#define MPU_RGD_RBDACC_M4RE            (1 << 25) /* Bit 25: Bus master 4 read enable */
+#define MPU_RGD_RBDACC_M5WE            (1 << 26) /* Bit 26: Bus master 5 write enable */
+#define MPU_RGD_RBDACC_M5RE            (1 << 27) /* Bit 27: Bus master 5 read enable */
+#define MPU_RGD_RBDACC_M6WE            (1 << 28) /* Bit 28: Bus master 6 write enable */
+#define MPU_RGD_RBDACC_M6RE            (1 << 29) /* Bit 29: Bus master 6 read enable */
+#define MPU_RGD_RBDACC_M7WE            (1 << 30) /* Bit 30: Bus master 7 write enable */
+#define MPU_RGD_RBDACC_M7RE            (1 << 31) /* Bit 31: Bus master 7 read enable */
+
+/****************************************************************************************************
+ * Public Types
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public Data
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public Functions
+ ****************************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K64K66MPU_H */
diff --git a/arch/arm/src/kinetis/chip/kinetis_k64memorymap.h b/arch/arm/src/kinetis/chip/kinetis_k64memorymap.h
new file mode 100644
index 0000000000000000000000000000000000000000..181e9fda641d03957bec48196f844eec4ae71974
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_k64memorymap.h
@@ -0,0 +1,213 @@
+/************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_k64memorymap.h
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K64MEMORYMAP_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K64MEMORYMAP_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+#ifdef KINETIS_K64
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Memory Map ***********************************************************************/
+/* K64 Family
+ *
+ * The memory map for the following parts is defined in NXP document
+ * K64P144M120SF5RM.pdf
+ */
+
+#if defined(CONFIG_ARCH_CHIP_MK64FX512VLL12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VLL12) || \
+      defined(CONFIG_ARCH_CHIP_MK64FX512VDC12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VDC12) || \
+      defined(CONFIG_ARCH_CHIP_MK64FX512VLQ12) || defined(CONFIG_ARCH_CHIP_MK64FX512VMD12) || \
+      defined(CONFIG_ARCH_CHIP_MK64FN1M0VLQ12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VMD12)
+
+# define KINETIS_FLASH_BASE     0x00000000 /* -0x0fffffff Program flash and read-
+                                            *             only data (Includes exception
+                                            *             vectors in first 1024 bytes) */
+# if !defined(KINETIS_FLEXMEM_SIZE)
+#  define KINETIS_FLEXNVM_BASE  0x10000000 /* -0x13ffffff FlexNVM */
+#  define KINETIS_FLEXRAM_BASE  0x14000000 /* -0x17ffffff FlexRAM */
+# endif
+# define KINETIS_SRAML_BASE     0x18000000 /* -0x1fffffff SRAM_L: Lower SRAM
+                                            *             (ICODE/DCODE) */
+# define KINETIS_SRAMU_BASE     0x20000000 /* -0x200fffff SRAM_U: Upper SRAM bitband
+                                            *             region */
+                             /* 0x20100000  * -0x21ffffff Reserved */
+# define KINETIS_SALIAS_BASE    0x22000000 /* -0x23ffffff Aliased to SRAM_U bitband */
+                             /* 0x24000000  * -0x3fffffff Reserved */
+# define KINETIS_BRIDGE0_BASE   0x40000000 /* -0x4007ffff Bitband region for peripheral
+                                            *             bridge 0 (AIPS-Lite0) */
+# define KINETIS_BRIDGE1_BASE   0x40080000 /* -0x400fffff Bitband region for peripheral
+                                            *             bridge 1 (AIPS-Lite1) */
+# define KINETIS_GPIOBB_BASE    0x400ff000 /* -0x400fffff Bitband region for general
+                                            *             purpose input/output (GPIO) */
+                             /* 0x40100000  * -0x41ffffff Reserved */
+# define KINETIS_PALIAS_BASE    0x42000000 /* -0x43ffffff Aliased to peripheral bridge
+                                            *             (AIPS-Lite) and general purpose
+                                            *             input/output (GPIO) bitband */
+                             /* 0x44000000  * -0x5fffffff Reserved */
+# define KINETIS_FLEXBUS_BASE   0x60000000 /* -0x7fffffff FlexBus */
+# define KINETIS_PERIPH_BASE    0xe0000000 /* -0xe00fffff Private peripherals */
+                             /* 0xe0100000  * -0xffffffff Reserved */
+
+/* Peripheral Bridge 0 Memory Map ***************************************************/
+
+# define KINETIS_AIPS0_BASE     0x40000000 /* Peripheral bridge 0 (AIPS-Lite 0) */
+# define KINETIS_XBAR_BASE      0x40004000 /* Crossbar switch */
+# define KINETIS_DMAC_BASE      0x40008000 /* DMA controller */
+# define KINETIS_DMADESC_BASE   0x40009000 /* DMA controller transfer control descriptors */
+# define KINETIS_FLEXBUSC_BASE  0x4000c000 /* FlexBus controller */
+# define KINETIS_MPU_BASE       0x4000d000 /* MPU */
+# define KINETIS_FMC_BASE       0x4001f000 /* Flash memory controller */
+# define KINETIS_FTFE_BASE      0x40020000 /* Flash memory */
+# define KINETIS_DMAMUX0_BASE   0x40021000 /* DMA channel mutiplexer 0 */
+# define KINETIS_CAN0_BASE      0x40024000 /* FlexCAN 0 */
+# define KINETIS_SPI0_BASE      0x4002c000 /* DSPI 0 */
+# define KINETIS_SPI1_BASE      0x4002d000 /* DSPI 1 */
+# define KINETIS_I2S0_BASE      0x4002f000 /* I2S 0 */
+# define KINETIS_CRC_BASE       0x40032000 /* CRC */
+# define KINETIS_USBDCD_BASE    0x40035000 /* USB DCD */
+# define KINETIS_PDB0_BASE      0x40036000 /* Programmable delay block */
+# define KINETIS_PIT_BASE       0x40037000 /* Periodic interrupt timers (PIT) */
+# define KINETIS_FTM0_BASE      0x40038000 /* FlexTimer (FTM) 0 */
+# define KINETIS_FTM1_BASE      0x40039000 /* FlexTimer (FTM) 1 */
+# define KINETIS_ADC0_BASE      0x4003b000 /* Analog-to-digital converter (ADC) 0 */
+# define KINETIS_RTC_BASE       0x4003d000 /* Real time clock */
+# define KINETIS_VBATR_BASE     0x4003e000 /* VBAT register file */
+# define KINETIS_LPTMR_BASE     0x40040000 /* Low power timer */
+# define KINETIS_SYSR_BASE      0x40041000 /* System register file */
+# define KINETIS_DRYICE_BASE    0x40042000 /* DryIce */
+# define KINETIS_DRYICESS_BASE  0x40043000 /* DryIce secure storage */
+# define KINETIS_TSI0_BASE      0x40045000 /* Touch sense interface */
+# define KINETIS_SIMLP_BASE     0x40047000 /* SIM low-power logic */
+# define KINETIS_SIM_BASE       0x40048000 /* System integration module (SIM) */
+# define KINETIS_PORT_BASE(n)   (0x40049000 + ((n) << 12))
+# define KINETIS_PORTA_BASE     0x40049000 /* Port A multiplexing control */
+# define KINETIS_PORTB_BASE     0x4004a000 /* Port B multiplexing control */
+# define KINETIS_PORTC_BASE     0x4004b000 /* Port C multiplexing control */
+# define KINETIS_PORTD_BASE     0x4004c000 /* Port D multiplexing control */
+# define KINETIS_PORTE_BASE     0x4004d000 /* Port E multiplexing control */
+# define KINETIS_WDOG_BASE      0x40052000 /* Software watchdog */
+# define KINETIS_EWM_BASE       0x40061000 /* External watchdog */
+# define KINETIS_CMT_BASE       0x40062000 /* Carrier modulator timer (CMT) */
+# define KINETIS_MCG_BASE       0x40064000 /* Multi-purpose Clock Generator (MCG) */
+# define KINETIS_OSC_BASE       0x40065000 /* System oscillator (XOSC) */
+# define KINETIS_I2C0_BASE      0x40066000 /* I2C 0 */
+# define KINETIS_I2C1_BASE      0x40067000 /* I2C 1 */
+# define KINETIS_I2C2_BASE      0x400E6000 /* I2C 2 */
+# define KINETIS_UART0_BASE     0x4006a000 /* UART0 */
+# define KINETIS_UART1_BASE     0x4006b000 /* UART1 */
+# define KINETIS_UART2_BASE     0x4006c000 /* UART2 */
+# define KINETIS_UART3_BASE     0x4006d000 /* UART3 */
+# define KINETIS_USB0_BASE      0x40072000 /* USB OTG FS/LS */
+# define KINETIS_CMP_BASE       0x40073000 /* Analog comparator (CMP) / 6-bit digital-to-analog converter (DAC) */
+# define KINETIS_VREF_BASE      0x40074000 /* Voltage reference (VREF) */
+# define KINETIS_LLWU_BASE      0x4007c000 /* Low-leakage wakeup unit (LLWU) */
+# define KINETIS_PMC_BASE       0x4007d000 /* Power management controller (PMC) */
+# define KINETIS_SMC_BASE       0x4007e000 /* System Mode controller (SMC) */
+
+/* Peripheral Bridge 1 Memory Map ***************************************************/
+
+# define KINETIS_AIPS1_BASE     0x40080000 /* Peripheral bridge 1 (AIPS-Lite 1) */
+# define KINETIS_RNGB_BASE      0x400a0000 /* Random number generator (RNGB) */
+# define KINETIS_CAN1_BASE      0x400a4000 /* FlexCAN 1 */
+# define KINETIS_SPI2_BASE      0x400ac000 /* DSPI 2 */
+# define KINETIS_SDHC_BASE      0x400b1000 /* SDHC */
+# define KINETIS_FTM2_BASE      0x4003a000 /* FlexTimer 2 */
+# define KINETIS_FTM3_BASE      0x400b9000 /* FlexTimer 3 */
+# define KINETIS_ADC1_BASE      0x400bb000 /* Analog-to-digital converter (ADC) 1 */
+# define KINETIS_EMAC_BASE      0x400c0000 /* Ethernet MAC and IEEE 1588 timers */
+# define KINETIS_DAC0_BASE      0x400cc000 /* 12-bit digital-to-analog converter (DAC) 0 */
+# define KINETIS_DAC1_BASE      0x400cd000 /* 12-bit digital-to-analog converter (DAC) 1 */
+# define KINETIS_UART4_BASE     0x400ea000 /* UART4 */
+# define KINETIS_UART5_BASE     0x400eb000 /* UART5 */
+# define KINETIS_XBARSS_BASE    0x400ff000 /* Not an AIPS-Lite slot. The 32-bit general
+                                            * purpose input/output module that shares the
+                                            * crossbar switch slave port with the AIPS-Lite
+                                            * is accessed at this address. */
+# define KINETIS_GPIO_BASE(n)   (0x400ff000 + ((n) << 6))
+# define KINETIS_GPIOA_BASE     0x400ff000 /* GPIO PORTA registers */
+# define KINETIS_GPIOB_BASE     0x400ff040 /* GPIO PORTB registers */
+# define KINETIS_GPIOC_BASE     0x400ff080 /* GPIO PORTC registers */
+# define KINETIS_GPIOD_BASE     0x400ff0c0 /* GPIO PORTD registers */
+# define KINETIS_GPIOE_BASE     0x400ff100 /* GPIO PORTE registers */
+
+/* Private Peripheral Bus (PPB) Memory Map ******************************************/
+
+# define KINETIS_ITM_BASE       0xe0000000 /* Instrumentation Trace Macrocell (ITM) */
+# define KINETIS_DWT_BASE       0xe0001000 /* Data Watchpoint and Trace (DWT) */
+# define KINETIS_FPB_BASE       0xe0002000 /* Flash Patch and Breakpoint (FPB) */
+# define KINETIS_SCS_BASE       0xe000e000 /* System Control Space (SCS) (for NVIC) */
+# define KINETIS_TPIU_BASE      0xe0040000 /* Trace Port Interface Unit (TPIU) */
+# define KINETIS_ETM_BASE       0xe0041000 /* Embedded Trace Macrocell (ETM) */
+# define KINETIS_ETB_BASE       0xe0042000 /* Embedded Trace Buffer (ETB) */
+# define KINETIS_TFUN_BASE      0xe0043000 /* Embedded Trace Funnel */
+# define KINETIS_MCM_BASE       0xe0080000 /* Miscellaneous Control Module (including ETB Almost Full) */
+# define KINETIS_MMCAU_BASE     0xe0081000 /* Memory Mapped Cryptographic Acceleration Unit (MMCAU) */
+# define KINETIS_ROMTAB_BASE    0xe00ff000 /* ROM Table - allows auto-detection of debug components */
+
+#else
+  /* The memory map for other parts is defined in other documents and may or may not
+   * be the same as above (the family members are all very similar)  This error just
+   * means that you have to look at the document and determine for yourself if the
+   * memory map is the same.
+   */
+
+#  error "No memory map for this K64 part"
+#endif
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* KINETIS_K64 */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K64MEMORYMAP_H */
diff --git a/arch/arm/src/kinetis/chip/kinetis_k64pinmux.h b/arch/arm/src/kinetis/chip/kinetis_k64pinmux.h
new file mode 100644
index 0000000000000000000000000000000000000000..3479099bf6c99c2275611636ded8721fe11f1526
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_k64pinmux.h
@@ -0,0 +1,640 @@
+/********************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_k64pinmux.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_CHP_KINETIS_K64PINMUX_H
+#define __ARCH_ARM_SRC_KINETIS_CHP_KINETIS_K64PINMUX_H
+
+/********************************************************************************************
+ * Included Files
+ ********************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+#ifdef KINETIS_K64
+
+/********************************************************************************************
+ * Pre-processor Definitions
+ ********************************************************************************************/
+/* In most cases, there are alternative configurations for various pins. Those alternative
+ * pins are labeled with a suffix like _1, _2, etc. in order to distinguish them.  Logic in
+ * the board.h file must select the correct pin configuration for the board by defining a pin
+ * configuration (with no suffix) that maps to the correct alternative.
+ *
+ * WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!!
+ * Additional effort is required to select specific GPIO options such as frequency,
+ * open-drain/push-pull, and pull-up/down!  Just the basics are defined for most
+ * pins in the initial version of this file.
+ */
+
+/* ADC */
+
+#define PIN_ADC0_DM2              (PIN_ANALOG | PIN_PORTE | PIN3)
+#define PIN_ADC0_DP2              (PIN_ANALOG | PIN_PORTE | PIN2)
+#define PIN_ADC0_SE4B             (PIN_ANALOG | PIN_PORTC | PIN2)
+#define PIN_ADC0_SE5B             (PIN_ANALOG | PIN_PORTD | PIN1)
+#define PIN_ADC0_SE6B             (PIN_ANALOG | PIN_PORTD | PIN5)
+#define PIN_ADC0_SE7B             (PIN_ANALOG | PIN_PORTD | PIN6)
+#define PIN_ADC0_SE8              (PIN_ANALOG | PIN_PORTB | PIN0)
+#define PIN_ADC0_SE9              (PIN_ANALOG | PIN_PORTB | PIN1)
+#define PIN_ADC0_SE10             (PIN_ANALOG | PIN_PORTA | PIN7)
+#define PIN_ADC0_SE11             (PIN_ANALOG | PIN_PORTA | PIN8)
+#define PIN_ADC0_SE12             (PIN_ANALOG | PIN_PORTB | PIN2)
+#define PIN_ADC0_SE13             (PIN_ANALOG | PIN_PORTB | PIN3)
+#define PIN_ADC0_SE14             (PIN_ANALOG | PIN_PORTC | PIN0)
+#define PIN_ADC0_SE15             (PIN_ANALOG | PIN_PORTC | PIN1)
+#define PIN_ADC0_SE17             (PIN_ANALOG | PIN_PORTE | PIN24)
+#define PIN_ADC0_SE18             (PIN_ANALOG | PIN_PORTE | PIN25)
+
+#define PIN_ADC1_SE4A             (PIN_ANALOG | PIN_PORTE | PIN0)
+#define PIN_ADC1_SE4B             (PIN_ANALOG | PIN_PORTC | PIN8)
+#define PIN_ADC1_SE5A             (PIN_ANALOG | PIN_PORTE | PIN1)
+#define PIN_ADC1_SE5B             (PIN_ANALOG | PIN_PORTC | PIN9)
+#define PIN_ADC1_SE6A             (PIN_ANALOG | PIN_PORTE | PIN2)
+#define PIN_ADC1_SE6B             (PIN_ANALOG | PIN_PORTC | PIN10)
+#define PIN_ADC1_SE7A             (PIN_ANALOG | PIN_PORTE | PIN3)
+#define PIN_ADC1_SE7B             (PIN_ANALOG | PIN_PORTC | PIN11)
+#define PIN_ADC1_SE8              (PIN_ANALOG | PIN_PORTB | PIN0)
+#define PIN_ADC1_SE9              (PIN_ANALOG | PIN_PORTB | PIN1)
+#define PIN_ADC1_SE10             (PIN_ANALOG | PIN_PORTB | PIN4)
+#define PIN_ADC1_SE11             (PIN_ANALOG | PIN_PORTB | PIN5)
+#define PIN_ADC1_SE12             (PIN_ANALOG | PIN_PORTB | PIN6)
+#define PIN_ADC1_SE13             (PIN_ANALOG | PIN_PORTB | PIN7)
+#define PIN_ADC1_SE14             (PIN_ANALOG | PIN_PORTB | PIN10)
+#define PIN_ADC1_SE15             (PIN_ANALOG | PIN_PORTB | PIN11)
+#define PIN_ADC1_SE17             (PIN_ANALOG | PIN_PORTA | PIN17)
+
+/* CAN */
+
+#define PIN_CAN0_RX_1             (PIN_ALT2   | PIN_PORTA | PIN13)
+#define PIN_CAN0_RX_2             (PIN_ALT2   | PIN_PORTB | PIN19)
+#define PIN_CAN0_TX_1             (PIN_ALT2   | PIN_PORTA | PIN12)
+#define PIN_CAN0_TX_2             (PIN_ALT2   | PIN_PORTB | PIN18)
+
+/* Output clock */
+
+#define PIN_CLKOUT_1              (PIN_ALT5   | PIN_PORTA | PIN6)
+#define PIN_CLKOUT_2              (PIN_ALT5   | PIN_PORTC | PIN3)
+
+/* Comparators */
+
+#define PIN_CMP0_IN0              (PIN_ANALOG | PIN_PORTC | PIN6)
+#define PIN_CMP0_IN1              (PIN_ANALOG | PIN_PORTC | PIN7)
+#define PIN_CMP0_IN2              (PIN_ANALOG | PIN_PORTC | PIN8)
+#define PIN_CMP0_IN3              (PIN_ANALOG | PIN_PORTC | PIN9)
+#define PIN_CMP0_OUT_1            (PIN_ALT6   | PIN_PORTB | PIN20)
+#define PIN_CMP0_OUT_2            (PIN_ALT6   | PIN_PORTC | PIN5)
+
+#define PIN_CMP1_IN0              (PIN_ANALOG | PIN_PORTC | PIN2)
+#define PIN_CMP1_IN1              (PIN_ANALOG | PIN_PORTC | PIN3)
+#define PIN_CMP1_OUT_1            (PIN_ALT6   | PIN_PORTB | PIN21)
+#define PIN_CMP1_OUT_2            (PIN_ALT6   | PIN_PORTC | PIN4)
+
+#define PIN_CMP2_IN0              (PIN_ANALOG | PIN_PORTA | PIN12)
+#define PIN_CMP2_IN1              (PIN_ANALOG | PIN_PORTA | PIN13)
+#define PIN_CMP2_OUT_1            (PIN_ALT5   | PIN_PORTA | PIN5)
+#define PIN_CMP2_OUT_2            (PIN_ALT6   | PIN_PORTB | PIN22)
+
+/* Carrier Modulator Transmittor (CMT) */
+
+#define PIN_CMT_IRO               (PIN_ALT2   | PIN_PORTD | PIN7)
+
+/* Ethernet */
+
+#define PIN_ENET_1588_CLKIN       (PIN_ALT2   | PIN_PORTE | PIN26)
+#define PIN_ENET0_1588_TMR0_1     (PIN_ALT4   | PIN_PORTB | PIN2)
+#define PIN_ENET0_1588_TMR0_2     (PIN_ALT4   | PIN_PORTC | PIN16)
+#define PIN_ENET0_1588_TMR1_1     (PIN_ALT4   | PIN_PORTB | PIN3)
+#define PIN_ENET0_1588_TMR1_2     (PIN_ALT4   | PIN_PORTC | PIN17)
+#define PIN_ENET0_1588_TMR2_1     (PIN_ALT4   | PIN_PORTB | PIN4)
+#define PIN_ENET0_1588_TMR2_2     (PIN_ALT4   | PIN_PORTC | PIN18)
+#define PIN_ENET0_1588_TMR3_1     (PIN_ALT4   | PIN_PORTB | PIN5)
+#define PIN_ENET0_1588_TMR3_2     (PIN_ALT4   | PIN_PORTC | PIN19)
+
+/* External Watchdog Monitor (EWM) */
+
+#define PIN_EWM_IN_1              (PIN_ALT6   | PIN_PORTB | PIN16)
+#define PIN_EWM_IN_2              (PIN_ALT6   | PIN_PORTD | PIN4)
+#define PIN_EWM_IN_3              (PIN_ALT6   | PIN_PORTE | PIN25)
+#define PIN_EWM_OUT_1             (PIN_ALT6   | PIN_PORTB | PIN17)
+#define PIN_EWM_OUT_2             (PIN_ALT6   | PIN_PORTD | PIN5)
+#define PIN_EWM_OUT_3             (PIN_ALT6   | PIN_PORTE | PIN24)
+
+/* FlexBus */
+
+#define PIN_FB_A16                (PIN_ALT6   | PIN_PORTD | PIN8)
+#define PIN_FB_A17                (PIN_ALT6   | PIN_PORTD | PIN9)
+#define PIN_FB_A18                (PIN_ALT6   | PIN_PORTD | PIN10)
+#define PIN_FB_A19                (PIN_ALT6   | PIN_PORTD | PIN11)
+#define PIN_FB_A20                (PIN_ALT6   | PIN_PORTD | PIN12)
+#define PIN_FB_A21                (PIN_ALT6   | PIN_PORTD | PIN13)
+#define PIN_FB_A22                (PIN_ALT6   | PIN_PORTD | PIN14)
+#define PIN_FB_A23                (PIN_ALT6   | PIN_PORTD | PIN15)
+#define PIN_FB_A24                (PIN_ALT6   | PIN_PORTA | PIN29)
+#define PIN_FB_A25                (PIN_ALT6   | PIN_PORTA | PIN28)
+#define PIN_FB_A26                (PIN_ALT6   | PIN_PORTA | PIN27)
+#define PIN_FB_A27                (PIN_ALT6   | PIN_PORTA | PIN26)
+#define PIN_FB_A28                (PIN_ALT6   | PIN_PORTA | PIN25)
+#define PIN_FB_A29                (PIN_ALT6   | PIN_PORTA | PIN24)
+#define PIN_FB_AD0                (PIN_ALT5   | PIN_PORTD | PIN6)
+#define PIN_FB_AD1                (PIN_ALT5   | PIN_PORTD | PIN5)
+#define PIN_FB_AD2                (PIN_ALT5   | PIN_PORTD | PIN4)
+#define PIN_FB_AD3                (PIN_ALT5   | PIN_PORTD | PIN3)
+#define PIN_FB_AD4                (PIN_ALT5   | PIN_PORTD | PIN2)
+#define PIN_FB_AD5                (PIN_ALT5   | PIN_PORTC | PIN10)
+#define PIN_FB_AD6                (PIN_ALT5   | PIN_PORTC | PIN9)
+#define PIN_FB_AD7                (PIN_ALT5   | PIN_PORTC | PIN8)
+#define PIN_FB_AD8                (PIN_ALT5   | PIN_PORTC | PIN7)
+#define PIN_FB_AD9                (PIN_ALT5   | PIN_PORTC | PIN6)
+#define PIN_FB_AD10               (PIN_ALT5   | PIN_PORTC | PIN5)
+#define PIN_FB_AD11               (PIN_ALT5   | PIN_PORTC | PIN4)
+#define PIN_FB_AD12               (PIN_ALT5   | PIN_PORTC | PIN2)
+#define PIN_FB_AD13               (PIN_ALT5   | PIN_PORTC | PIN1)
+#define PIN_FB_AD14               (PIN_ALT5   | PIN_PORTC | PIN0)
+#define PIN_FB_AD15               (PIN_ALT5   | PIN_PORTB | PIN18)
+#define PIN_FB_AD16               (PIN_ALT5   | PIN_PORTB | PIN17)
+#define PIN_FB_AD17               (PIN_ALT5   | PIN_PORTB | PIN16)
+#define PIN_FB_AD18               (PIN_ALT5   | PIN_PORTB | PIN11)
+#define PIN_FB_AD19               (PIN_ALT5   | PIN_PORTB | PIN10)
+#define PIN_FB_AD20               (PIN_ALT5   | PIN_PORTB | PIN9)
+#define PIN_FB_AD21               (PIN_ALT5   | PIN_PORTB | PIN8)
+#define PIN_FB_AD22               (PIN_ALT5   | PIN_PORTB | PIN7)
+#define PIN_FB_AD23               (PIN_ALT5   | PIN_PORTB | PIN6)
+#define PIN_FB_AD24               (PIN_ALT5   | PIN_PORTC | PIN15)
+#define PIN_FB_AD25               (PIN_ALT5   | PIN_PORTC | PIN14)
+#define PIN_FB_AD26               (PIN_ALT5   | PIN_PORTC | PIN13)
+#define PIN_FB_AD27               (PIN_ALT5   | PIN_PORTC | PIN12)
+#define PIN_FB_AD28               (PIN_ALT5   | PIN_PORTB | PIN23)
+#define PIN_FB_AD29               (PIN_ALT5   | PIN_PORTB | PIN22)
+#define PIN_FB_AD30               (PIN_ALT5   | PIN_PORTB | PIN21)
+#define PIN_FB_AD31               (PIN_ALT5   | PIN_PORTB | PIN20)
+#define PIN_FB_ALE                (PIN_ALT5   | PIN_PORTD | PIN0)
+#define PIN_FB_BE15_8_BLS23_16    (PIN_ALT5   | PIN_PORTC | PIN18)
+#define PIN_FB_BE23_16_BLS15_8    (PIN_ALT5   | PIN_PORTC | PIN16)
+#define PIN_FB_BE31_24_BLS7_0     (PIN_ALT5   | PIN_PORTC | PIN17)
+#define PIN_FB_BE7_0_BLS31_24     (PIN_ALT5   | PIN_PORTC | PIN19)
+#define PIN_FB_CS0                (PIN_ALT5   | PIN_PORTD | PIN1)
+#define PIN_FB_CS1                (PIN_ALT5   | PIN_PORTD | PIN0)
+#define PIN_FB_CS2                (PIN_ALT5   | PIN_PORTC | PIN18)
+#define PIN_FB_CS3                (PIN_ALT5   | PIN_PORTC | PIN19)
+#define PIN_FB_CS4                (PIN_ALT5   | PIN_PORTC | PIN17)
+#define PIN_FB_CS5                (PIN_ALT5   | PIN_PORTC | PIN16)
+#define PIN_FB_OE                 (PIN_ALT5   | PIN_PORTB | PIN19)
+#define PIN_FB_RW                 (PIN_ALT5   | PIN_PORTC | PIN11)
+#define PIN_FB_TA                 (PIN_ALT6   | PIN_PORTC | PIN19)
+#define PIN_FB_TBST               (PIN_ALT5   | PIN_PORTC | PIN18)
+#define PIN_FB_TS                 (PIN_ALT5   | PIN_PORTD | PIN0)
+#define PIN_FB_TSIZ0              (PIN_ALT5   | PIN_PORTC | PIN17)
+#define PIN_FB_TSIZ1              (PIN_ALT5   | PIN_PORTC | PIN16)
+
+/* FlexTimer Module (FTM) */
+
+#define PIN_FTM_CLKIN0_1          (PIN_ALT4   | PIN_PORTA | PIN18)
+#define PIN_FTM_CLKIN0_2          (PIN_ALT4   | PIN_PORTB | PIN16)
+#define PIN_FTM_CLKIN1_1          (PIN_ALT4   | PIN_PORTA | PIN19)
+#define PIN_FTM_CLKIN1_2          (PIN_ALT4   | PIN_PORTB | PIN17)
+
+#define PIN_FTM0_CH0_1            (PIN_ALT3   | PIN_PORTA | PIN3)
+#define PIN_FTM0_CH0_2            (PIN_ALT4   | PIN_PORTC | PIN1)
+#define PIN_FTM0_CH1_1            (PIN_ALT3   | PIN_PORTA | PIN4)
+#define PIN_FTM0_CH1_2            (PIN_ALT4   | PIN_PORTC | PIN2)
+#define PIN_FTM0_CH2_1            (PIN_ALT3   | PIN_PORTA | PIN5)
+#define PIN_FTM0_CH2_2            (PIN_ALT4   | PIN_PORTC | PIN3)
+#define PIN_FTM0_CH2_3            (PIN_ALT7   | PIN_PORTC | PIN5)
+#define PIN_FTM0_CH3_1            (PIN_ALT3   | PIN_PORTA | PIN6)
+#define PIN_FTM0_CH3_2            (PIN_ALT4   | PIN_PORTC | PIN4)
+#define PIN_FTM0_CH4_1            (PIN_ALT3   | PIN_PORTA | PIN7)
+#define PIN_FTM0_CH4_2            (PIN_ALT4   | PIN_PORTB | PIN12)
+#define PIN_FTM0_CH4_3            (PIN_ALT4   | PIN_PORTD | PIN4)
+#define PIN_FTM0_CH5_1            (PIN_ALT3   | PIN_PORTA | PIN0)
+#define PIN_FTM0_CH5_2            (PIN_ALT4   | PIN_PORTB | PIN13)
+#define PIN_FTM0_CH5_3            (PIN_ALT4   | PIN_PORTD | PIN5)
+#define PIN_FTM0_CH6_1            (PIN_ALT3   | PIN_PORTA | PIN1)
+#define PIN_FTM0_CH6_2            (PIN_ALT4   | PIN_PORTD | PIN6)
+#define PIN_FTM0_CH7_1            (PIN_ALT3   | PIN_PORTA | PIN2)
+#define PIN_FTM0_CH7_2            (PIN_ALT4   | PIN_PORTD | PIN7)
+#define PIN_FTM0_FLT0_1           (PIN_ALT6   | PIN_PORTB | PIN3)
+#define PIN_FTM0_FLT0_2           (PIN_ALT6   | PIN_PORTD | PIN6)
+#define PIN_FTM0_FLT1_1           (PIN_ALT6   | PIN_PORTB | PIN10)
+#define PIN_FTM0_FLT1_2           (PIN_ALT6   | PIN_PORTD | PIN7)
+#define PIN_FTM0_FLT2_1           (PIN_ALT3   | PIN_PORTA | PIN18)
+#define PIN_FTM0_FLT2_2           (PIN_ALT6   | PIN_PORTB | PIN11)
+#define PIN_FTM0_FLT3             (PIN_ALT6   | PIN_PORTB | PIN2)
+
+#define PIN_FTM1_CH0_1            (PIN_ALT3   | PIN_PORTA | PIN12)
+#define PIN_FTM1_CH0_2            (PIN_ALT3   | PIN_PORTA | PIN8)
+#define PIN_FTM1_CH0_3            (PIN_ALT3   | PIN_PORTB | PIN0)
+#define PIN_FTM1_CH0_4            (PIN_ALT3   | PIN_PORTB | PIN12)
+#define PIN_FTM1_CH1_1            (PIN_ALT3   | PIN_PORTA | PIN13)
+#define PIN_FTM1_CH1_2            (PIN_ALT3   | PIN_PORTA | PIN9)
+#define PIN_FTM1_CH1_3            (PIN_ALT3   | PIN_PORTB | PIN1)
+#define PIN_FTM1_CH1_4            (PIN_ALT3   | PIN_PORTB | PIN13)
+#define PIN_FTM1_FLT0_1           (PIN_ALT3   | PIN_PORTA | PIN19)
+#define PIN_FTM1_FLT0_2           (PIN_ALT6   | PIN_PORTB | PIN4)
+#define PIN_FTM1_QD_PHA_1         (PIN_ALT6   | PIN_PORTA | PIN8)
+#define PIN_FTM1_QD_PHA_2         (PIN_ALT6   | PIN_PORTB | PIN0)
+#define PIN_FTM1_QD_PHA_3         (PIN_ALT6   | PIN_PORTB | PIN12)
+#define PIN_FTM1_QD_PHA_4         (PIN_ALT7   | PIN_PORTA | PIN12)
+#define PIN_FTM1_QD_PHB_1         (PIN_ALT6   | PIN_PORTA | PIN9)
+#define PIN_FTM1_QD_PHB_2         (PIN_ALT6   | PIN_PORTB | PIN1)
+#define PIN_FTM1_QD_PHB_3         (PIN_ALT6   | PIN_PORTB | PIN13)
+#define PIN_FTM1_QD_PHB_4         (PIN_ALT7   | PIN_PORTA | PIN13)
+
+#define PIN_FTM2_CH0_1            (PIN_ALT3   | PIN_PORTA | PIN10)
+#define PIN_FTM2_CH0_2            (PIN_ALT3   | PIN_PORTB | PIN18)
+#define PIN_FTM2_CH1_1            (PIN_ALT3   | PIN_PORTA | PIN11)
+#define PIN_FTM2_CH1_2            (PIN_ALT3   | PIN_PORTB | PIN19)
+#define PIN_FTM2_FLT0_1           (PIN_ALT6   | PIN_PORTB | PIN5)
+#define PIN_FTM2_FLT0_2           (PIN_ALT6   | PIN_PORTC | PIN9)
+#define PIN_FTM2_QD_PHA_1         (PIN_ALT6   | PIN_PORTA | PIN10)
+#define PIN_FTM2_QD_PHA_2         (PIN_ALT6   | PIN_PORTB | PIN18)
+#define PIN_FTM2_QD_PHB_1         (PIN_ALT6   | PIN_PORTA | PIN11)
+#define PIN_FTM2_QD_PHB_2         (PIN_ALT6   | PIN_PORTB | PIN19)
+
+#define PIN_FTM3_CH0_1            (PIN_ALT4   | PIN_PORTD | PIN0)
+#define PIN_FTM3_CH0_2            (PIN_ALT6   | PIN_PORTE | PIN5)
+#define PIN_FTM3_CH1_1            (PIN_ALT4   | PIN_PORTD | PIN1)
+#define PIN_FTM3_CH1_2            (PIN_ALT6   | PIN_PORTE | PIN6)
+#define PIN_FTM3_CH2_1            (PIN_ALT4   | PIN_PORTD | PIN2)
+#define PIN_FTM3_CH2_2            (PIN_ALT6   | PIN_PORTE | PIN7)
+#define PIN_FTM3_CH3_1            (PIN_ALT4   | PIN_PORTD | PIN3)
+#define PIN_FTM3_CH3_2            (PIN_ALT6   | PIN_PORTE | PIN8)
+#define PIN_FTM3_CH4_1            (PIN_ALT3   | PIN_PORTC | PIN8)
+#define PIN_FTM3_CH4_2            (PIN_ALT6   | PIN_PORTE | PIN9)
+#define PIN_FTM3_CH5_1            (PIN_ALT3   | PIN_PORTC | PIN9)
+#define PIN_FTM3_CH5_2            (PIN_ALT6   | PIN_PORTE | PIN10)
+#define PIN_FTM3_CH6_1            (PIN_ALT3   | PIN_PORTC | PIN10)
+#define PIN_FTM3_CH6_2            (PIN_ALT6   | PIN_PORTE | PIN11)
+#define PIN_FTM3_CH7_1            (PIN_ALT3   | PIN_PORTC | PIN11)
+#define PIN_FTM3_CH7_2            (PIN_ALT6   | PIN_PORTE | PIN12)
+#define PIN_FTM3_FLT0_1           (PIN_ALT3   | PIN_PORTD | PIN12)
+#define PIN_FTM3_FLT0_2           (PIN_ALT6   | PIN_PORTC | PIN12)
+
+/* I2C */
+
+#define PIN_I2C0_SCL_1            (PIN_ALT2   | PIN_PORTB | PIN0)
+#define PIN_I2C0_SCL_2            (PIN_ALT2   | PIN_PORTB | PIN2)
+#define PIN_I2C0_SCL_3            (PIN_ALT2   | PIN_PORTD | PIN8)
+#define PIN_I2C0_SCL_4            (PIN_ALT5   | PIN_PORTE | PIN24)
+#define PIN_I2C0_SCL_5            (PIN_ALT7   | PIN_PORTD | PIN2)
+#define PIN_I2C0_SDA_1            (PIN_ALT2   | PIN_PORTB | PIN1)
+#define PIN_I2C0_SDA_2            (PIN_ALT2   | PIN_PORTB | PIN3)
+#define PIN_I2C0_SDA_3            (PIN_ALT2   | PIN_PORTD | PIN9)
+#define PIN_I2C0_SDA_4            (PIN_ALT5   | PIN_PORTE | PIN25)
+#define PIN_I2C0_SDA_5            (PIN_ALT7   | PIN_PORTD | PIN3)
+
+#define PIN_I2C1_SCL_1            (PIN_ALT2   | PIN_PORTC | PIN10)
+#define PIN_I2C1_SCL_2            (PIN_ALT6   | PIN_PORTE | PIN1)
+#define PIN_I2C1_SDA_1            (PIN_ALT2   | PIN_PORTC | PIN11)
+#define PIN_I2C1_SDA_2            (PIN_ALT6   | PIN_PORTE | PIN0)
+
+#define PIN_I2C2_SCL_1            (PIN_ALT5   | PIN_PORTA | PIN12)
+#define PIN_I2C2_SCL_2            (PIN_ALT5   | PIN_PORTA | PIN14)
+#define PIN_I2C2_SDA_1            (PIN_ALT5   | PIN_PORTA | PIN11)
+#define PIN_I2C2_SDA_2            (PIN_ALT5   | PIN_PORTA | PIN13)
+
+/* I2S */
+
+#define PIN_I2S0_MCLK_1           (PIN_ALT4   | PIN_PORTC | PIN8)
+#define PIN_I2S0_MCLK_2           (PIN_ALT4   | PIN_PORTE | PIN6)
+#define PIN_I2S0_MCLK_3           (PIN_ALT6   | PIN_PORTA | PIN17)
+#define PIN_I2S0_MCLK_4           (PIN_ALT6   | PIN_PORTC | PIN6)
+#define PIN_I2S0_RX_BCLK_1        (PIN_ALT4   | PIN_PORTC | PIN6)
+#define PIN_I2S0_RX_BCLK_2        (PIN_ALT4   | PIN_PORTC | PIN9)
+#define PIN_I2S0_RX_BCLK_3        (PIN_ALT4   | PIN_PORTE | PIN9)
+#define PIN_I2S0_RX_BCLK_4        (PIN_ALT6   | PIN_PORTA | PIN14)
+#define PIN_I2S0_RX_FS_1          (PIN_ALT4   | PIN_PORTC | PIN10)
+#define PIN_I2S0_RX_FS_2          (PIN_ALT4   | PIN_PORTC | PIN7)
+#define PIN_I2S0_RX_FS_3          (PIN_ALT4   | PIN_PORTE | PIN8)
+#define PIN_I2S0_RX_FS_4          (PIN_ALT6   | PIN_PORTA | PIN16)
+#define PIN_I2S0_RXD0_1           (PIN_ALT4   | PIN_PORTC | PIN5)
+#define PIN_I2S0_RXD0_2           (PIN_ALT4   | PIN_PORTE | PIN7)
+#define PIN_I2S0_RXD0_3           (PIN_ALT6   | PIN_PORTA | PIN15)
+#define PIN_I2S0_RXD1_1           (PIN_ALT2   | PIN_PORTE | PIN8)
+#define PIN_I2S0_RXD1_2           (PIN_ALT4   | PIN_PORTC | PIN11)
+#define PIN_I2S0_RXD1_3           (PIN_ALT7   | PIN_PORTA | PIN16)
+#define PIN_I2S0_TX_BCLK_1        (PIN_ALT4   | PIN_PORTB | PIN18)
+#define PIN_I2S0_TX_BCLK_2        (PIN_ALT4   | PIN_PORTE | PIN12)
+#define PIN_I2S0_TX_BCLK_3        (PIN_ALT6   | PIN_PORTA | PIN5)
+#define PIN_I2S0_TX_BCLK_4        (PIN_ALT6   | PIN_PORTC | PIN3)
+#define PIN_I2S0_TX_FS_1          (PIN_ALT4   | PIN_PORTB | PIN19)
+#define PIN_I2S0_TX_FS_2          (PIN_ALT4   | PIN_PORTE | PIN11)
+#define PIN_I2S0_TX_FS_3          (PIN_ALT6   | PIN_PORTA | PIN13)
+#define PIN_I2S0_TX_FS_4          (PIN_ALT6   | PIN_PORTC | PIN2)
+#define PIN_I2S0_TXD0_1           (PIN_ALT4   | PIN_PORTE | PIN10)
+#define PIN_I2S0_TXD0_2           (PIN_ALT6   | PIN_PORTA | PIN12)
+#define PIN_I2S0_TXD0_3           (PIN_ALT6   | PIN_PORTC | PIN1)
+#define PIN_I2S0_TXD1_1           (PIN_ALT2   | PIN_PORTE | PIN9)
+#define PIN_I2S0_TXD1_2           (PIN_ALT6   | PIN_PORTC | PIN0)
+#define PIN_I2S0_TXD1_3           (PIN_ALT7   | PIN_PORTA | PIN14)
+
+/* JTAG */
+
+#define PIN_JTAG_TCLK             (PIN_ALT7   | PIN_PORTA | PIN0)
+#define PIN_JTAG_TDI              (PIN_ALT7   | PIN_PORTA | PIN1)
+#define PIN_JTAG_TDO              (PIN_ALT7   | PIN_PORTA | PIN2)
+#define PIN_JTAG_TMS              (PIN_ALT7   | PIN_PORTA | PIN3)
+#define PIN_JTAG_TRST             (PIN_ALT7   | PIN_PORTA | PIN5)
+
+/* Low-leakage wakeup module (LLWU, actually GPIO configurations) */
+
+#define PIN_LLWU_P0               (PIN_ALT1   | PIN_PORTE | PIN1)
+#define PIN_LLWU_P1               (PIN_ALT1   | PIN_PORTE | PIN2)
+#define PIN_LLWU_P2               (PIN_ALT1   | PIN_PORTE | PIN4)
+#define PIN_LLWU_P3               (PIN_ALT1   | PIN_PORTA | PIN4)
+#define PIN_LLWU_P4               (PIN_ALT1   | PIN_PORTA | PIN13)
+#define PIN_LLWU_P5               (PIN_ALT1   | PIN_PORTB | PIN0)
+#define PIN_LLWU_P6               (PIN_ALT1   | PIN_PORTC | PIN1)
+#define PIN_LLWU_P7               (PIN_ALT1   | PIN_PORTC | PIN3)
+#define PIN_LLWU_P8               (PIN_ALT1   | PIN_PORTC | PIN4)
+#define PIN_LLWU_P9               (PIN_ALT1   | PIN_PORTC | PIN5)
+#define PIN_LLWU_P10              (PIN_ALT1   | PIN_PORTC | PIN6)
+#define PIN_LLWU_P11              (PIN_ALT1   | PIN_PORTC | PIN11)
+#define PIN_LLWU_P12              (PIN_ALT1   | PIN_PORTD | PIN0)
+#define PIN_LLWU_P13              (PIN_ALT1   | PIN_PORTD | PIN2)
+#define PIN_LLWU_P14              (PIN_ALT1   | PIN_PORTD | PIN4)
+#define PIN_LLWU_P15              (PIN_ALT1   | PIN_PORTD | PIN6)
+
+/* Low-Power Timer (LPTMR) */
+
+#define PIN_LPTMR0_ALT1           (PIN_ALT6   | PIN_PORTA | PIN19)
+#define PIN_LPTMR0_ALT2           (PIN_ALT3   | PIN_PORTC | PIN5)
+
+/* MII */
+
+#define PIN_MII0_COL              (PIN_ALT4   | PIN_PORTA | PIN29)
+#define PIN_MII0_CRS              (PIN_ALT4   | PIN_PORTA | PIN27)
+#define PIN_MII0_MDC              (PIN_ALT4   | PIN_PORTB | PIN1)
+#ifdef CONFIG_KINETIS_ENET_MDIOPULLUP
+#  define PIN_MII0_MDIO           (PIN_ALT4_PULLUP | PIN_PORTB | PIN0)
+#else
+#  define PIN_MII0_MDIO           (PIN_ALT4   | PIN_PORTB | PIN0)
+#endif
+#define PIN_MII0_RXCLK            (PIN_ALT4   | PIN_PORTA | PIN11)
+#define PIN_MII0_RXD0             (PIN_ALT4   | PIN_PORTA | PIN13)
+#define PIN_MII0_RXD1             (PIN_ALT4   | PIN_PORTA | PIN12)
+#define PIN_MII0_RXD2             (PIN_ALT4   | PIN_PORTA | PIN10)
+#define PIN_MII0_RXD3             (PIN_ALT4   | PIN_PORTA | PIN9)
+#define PIN_MII0_RXDV             (PIN_ALT4   | PIN_PORTA | PIN14)
+#ifdef CONFIG_KINETIS_ENET_NORXER
+#  define PIN_MII0_RXER           (GPIO_PULLDOWN | PIN_PORTA | PIN5)
+#else
+#  define PIN_MII0_RXER           (PIN_ALT4   | PIN_PORTA | PIN5)
+#endif
+#define PIN_MII0_TXCLK            (PIN_ALT4   | PIN_PORTA | PIN25)
+#define PIN_MII0_TXD0             (PIN_ALT4   | PIN_PORTA | PIN16)
+#define PIN_MII0_TXD1             (PIN_ALT4   | PIN_PORTA | PIN17)
+#define PIN_MII0_TXD2             (PIN_ALT4   | PIN_PORTA | PIN24)
+#define PIN_MII0_TXD3             (PIN_ALT4   | PIN_PORTA | PIN26)
+#define PIN_MII0_TXEN             (PIN_ALT4   | PIN_PORTA | PIN15)
+#define PIN_MII0_TXER             (PIN_ALT4   | PIN_PORTA | PIN28)
+
+/* NMI */
+
+#define PIN_NMI                   (PIN_ALT7   | PIN_PORTA | PIN4)
+
+/* Programmable Delay Block (PDB) */
+
+#define PIN_PDB0_EXTRG_1          (PIN_ALT3   | PIN_PORTC | PIN0)
+#define PIN_PDB0_EXTRG_2          (PIN_ALT3   | PIN_PORTC | PIN6)
+
+/* RMII */
+
+#define PIN_RMII0_CRS_DV          (PIN_ALT4   | PIN_PORTA | PIN14)
+#define PIN_RMII0_MDC             (PIN_ALT4   | PIN_PORTB | PIN1)
+#ifdef CONFIG_KINETIS_ENET_MDIOPULLUP
+#  define PIN_RMII0_MDIO          (PIN_ALT4_PULLUP | PIN_PORTB | PIN0)
+#else
+#  define PIN_RMII0_MDIO          (PIN_ALT4   | PIN_PORTB | PIN0)
+#endif
+#define PIN_RMII0_RXD0            (PIN_ALT4   | PIN_PORTA | PIN13)
+#define PIN_RMII0_RXD1            (PIN_ALT4   | PIN_PORTA | PIN12)
+#ifdef CONFIG_KINETIS_ENET_NORXER
+#  define PIN_RMII0_RXER          (GPIO_PULLDOWN | PIN_PORTA | PIN5)
+#else
+#  define PIN_RMII0_RXER          (PIN_ALT4   | PIN_PORTA | PIN5)
+#endif
+#define PIN_RMII0_TXD0            (PIN_ALT4   | PIN_PORTA | PIN16)
+#define PIN_RMII0_TXD1            (PIN_ALT4   | PIN_PORTA | PIN17)
+#define PIN_RMII0_TXEN            (PIN_ALT4   | PIN_PORTA | PIN15)
+
+/* Real-Time Clock (RTC) */
+
+#define PIN_RTC_CLKOUT_1          (PIN_ALT6   | PIN_PORTE | PIN26)
+#define PIN_RTC_CLKOUT_2          (PIN_ALT7   | PIN_PORTE | PIN0)
+
+/* Secured digital host controller (SDHC) */
+
+#define PIN_SDHC0_CLKIN           (PIN_ALT4   | PIN_PORTD | PIN11)
+#define PIN_SDHC0_CMD             (PIN_ALT4   | PIN_PORTE | PIN3)
+#define PIN_SDHC0_D0              (PIN_ALT4   | PIN_PORTE | PIN1)
+#define PIN_SDHC0_D1              (PIN_ALT4   | PIN_PORTE | PIN0)
+#define PIN_SDHC0_D2              (PIN_ALT4   | PIN_PORTE | PIN5)
+#define PIN_SDHC0_D3              (PIN_ALT4   | PIN_PORTE | PIN4)
+#define PIN_SDHC0_D4              (PIN_ALT4   | PIN_PORTD | PIN12)
+#define PIN_SDHC0_D5              (PIN_ALT4   | PIN_PORTD | PIN13)
+#define PIN_SDHC0_D6              (PIN_ALT4   | PIN_PORTD | PIN14)
+#define PIN_SDHC0_D7              (PIN_ALT4   | PIN_PORTD | PIN15)
+#define PIN_SDHC0_DCLK            (PIN_ALT4   | PIN_PORTE | PIN2)
+
+/* SPI */
+
+#define PIN_SPI0_PCS0_1           (PIN_ALT2   | PIN_PORTA | PIN14)
+#define PIN_SPI0_PCS0_2           (PIN_ALT2   | PIN_PORTC | PIN4)
+#define PIN_SPI0_PCS0_3           (PIN_ALT2   | PIN_PORTD | PIN0)
+#define PIN_SPI0_PCS1_1           (PIN_ALT2   | PIN_PORTC | PIN3)
+#define PIN_SPI0_PCS1_2           (PIN_ALT2   | PIN_PORTD | PIN4)
+#define PIN_SPI0_PCS2_1           (PIN_ALT2   | PIN_PORTC | PIN2)
+#define PIN_SPI0_PCS2_3           (PIN_ALT2   | PIN_PORTD | PIN5)
+#define PIN_SPI0_PCS3_1           (PIN_ALT2   | PIN_PORTC | PIN1)
+#define PIN_SPI0_PCS3_2           (PIN_ALT2   | PIN_PORTD | PIN6)
+#define PIN_SPI0_PCS4             (PIN_ALT2   | PIN_PORTC | PIN0)
+#define PIN_SPI0_PCS5             (PIN_ALT3   | PIN_PORTB | PIN23)
+#define PIN_SPI0_SCK_1            (PIN_ALT2   | PIN_PORTA | PIN15)
+#define PIN_SPI0_SCK_2            (PIN_ALT2   | PIN_PORTC | PIN5)
+#define PIN_SPI0_SCK_3            (PIN_ALT2   | PIN_PORTD | PIN1)
+#define PIN_SPI0_SIN_1            (PIN_ALT2   | PIN_PORTA | PIN17)
+#define PIN_SPI0_SIN_2            (PIN_ALT2   | PIN_PORTC | PIN7)
+#define PIN_SPI0_SIN_3            (PIN_ALT2   | PIN_PORTD | PIN3)
+#define PIN_SPI0_SOUT_1           (PIN_ALT2   | PIN_PORTA | PIN16)
+#define PIN_SPI0_SOUT_2           (PIN_ALT2   | PIN_PORTC | PIN6)
+#define PIN_SPI0_SOUT_3           (PIN_ALT2   | PIN_PORTD | PIN2)
+
+#define PIN_SPI1_PCS0_1           (PIN_ALT2   | PIN_PORTB | PIN10)
+#define PIN_SPI1_PCS0_2           (PIN_ALT2   | PIN_PORTE | PIN4)
+#define PIN_SPI1_PCS0_3           (PIN_ALT7   | PIN_PORTD | PIN4)
+#define PIN_SPI1_PCS1_1           (PIN_ALT2   | PIN_PORTB | PIN9)
+#define PIN_SPI1_PCS1_2           (PIN_ALT2   | PIN_PORTE | PIN0)
+#define PIN_SPI1_PCS2             (PIN_ALT2   | PIN_PORTE | PIN5)
+#define PIN_SPI1_PCS3             (PIN_ALT2   | PIN_PORTE | PIN6)
+#define PIN_SPI1_SCK_1            (PIN_ALT2   | PIN_PORTB | PIN11)
+#define PIN_SPI1_SCK_2            (PIN_ALT2   | PIN_PORTE | PIN2)
+#define PIN_SPI1_SCK_3            (PIN_ALT7   | PIN_PORTD | PIN5)
+#define PIN_SPI1_SIN_1            (PIN_ALT2   | PIN_PORTB | PIN17)
+#define PIN_SPI1_SIN_2            (PIN_ALT2   | PIN_PORTE | PIN3)
+#define PIN_SPI1_SIN_3            (PIN_ALT7   | PIN_PORTD | PIN7)
+#define PIN_SPI1_SIN_4            (PIN_ALT7   | PIN_PORTE | PIN1)
+#define PIN_SPI1_SOUT_1           (PIN_ALT2   | PIN_PORTB | PIN16)
+#define PIN_SPI1_SOUT_2           (PIN_ALT2   | PIN_PORTE | PIN1)
+#define PIN_SPI1_SOUT_3           (PIN_ALT7   | PIN_PORTD | PIN6)
+#define PIN_SPI1_SOUT_4           (PIN_ALT7   | PIN_PORTE | PIN3)
+
+#define PIN_SPI2_PCS0_1           (PIN_ALT2   | PIN_PORTB | PIN20)
+#define PIN_SPI2_PCS0_2           (PIN_ALT2   | PIN_PORTD | PIN11)
+#define PIN_SPI2_PCS1             (PIN_ALT2   | PIN_PORTD | PIN15)
+#define PIN_SPI2_SCK_1            (PIN_ALT2   | PIN_PORTB | PIN21)
+#define PIN_SPI2_SCK_2            (PIN_ALT2   | PIN_PORTD | PIN12)
+#define PIN_SPI2_SIN_1            (PIN_ALT2   | PIN_PORTB | PIN23)
+#define PIN_SPI2_SIN_2            (PIN_ALT2   | PIN_PORTD | PIN14)
+#define PIN_SPI2_SOUT_1           (PIN_ALT2   | PIN_PORTB | PIN22)
+#define PIN_SPI2_SOUT_2           (PIN_ALT2   | PIN_PORTD | PIN13)
+
+/* SWD */
+
+#define PIN_SWD_CLK               (PIN_ALT7   | PIN_PORTA | PIN0)
+#define PIN_SWD_DIO               (PIN_ALT7   | PIN_PORTA | PIN3)
+
+/* Trace */
+
+#define PIN_TRACE_CLKOUT_1        (PIN_ALT5   | PIN_PORTE | PIN0)
+#define PIN_TRACE_CLKOUT_2        (PIN_ALT7   | PIN_PORTA | PIN6)
+#define PIN_TRACE_D0_1            (PIN_ALT5   | PIN_PORTE | PIN4)
+#define PIN_TRACE_D0_2            (PIN_ALT7   | PIN_PORTA | PIN10)
+#define PIN_TRACE_D1_1            (PIN_ALT5   | PIN_PORTE | PIN3)
+#define PIN_TRACE_D1_2            (PIN_ALT7   | PIN_PORTA | PIN9)
+#define PIN_TRACE_D2_1            (PIN_ALT5   | PIN_PORTE | PIN2)
+#define PIN_TRACE_D2_2            (PIN_ALT7   | PIN_PORTA | PIN8)
+#define PIN_TRACE_D3_1            (PIN_ALT5   | PIN_PORTE | PIN1)
+#define PIN_TRACE_D3_2            (PIN_ALT7   | PIN_PORTA | PIN7)
+#define PIN_TRACE_SWO             (PIN_ALT7   | PIN_PORTA | PIN2)
+
+/* UARTs */
+
+#define PIN_UART0_COL_1           (PIN_ALT2   | PIN_PORTA | PIN0)
+#define PIN_UART0_COL_2           (PIN_ALT3   | PIN_PORTA | PIN16)
+#define PIN_UART0_COL_3           (PIN_ALT3   | PIN_PORTB | PIN3)
+#define PIN_UART0_COL_4           (PIN_ALT3   | PIN_PORTD | PIN5)
+#define PIN_UART0_CTS_1           (PIN_ALT2   | PIN_PORTA | PIN0)
+#define PIN_UART0_CTS_2           (PIN_ALT3   | PIN_PORTA | PIN16)
+#define PIN_UART0_CTS_3           (PIN_ALT3   | PIN_PORTB | PIN3)
+#define PIN_UART0_CTS_4           (PIN_ALT3   | PIN_PORTD | PIN5)
+#define PIN_UART0_RTS_1           (PIN_ALT2   | PIN_PORTA | PIN3)
+#define PIN_UART0_RTS_2           (PIN_ALT3   | PIN_PORTA | PIN17)
+#define PIN_UART0_RTS_3           (PIN_ALT3   | PIN_PORTB | PIN2)
+#define PIN_UART0_RTS_4           (PIN_ALT3   | PIN_PORTD | PIN4)
+#define PIN_UART0_RX_1            (PIN_ALT2   | PIN_PORTA | PIN1)
+#define PIN_UART0_RX_2            (PIN_ALT3   | PIN_PORTA | PIN15)
+#define PIN_UART0_RX_3            (PIN_ALT3   | PIN_PORTB | PIN16)
+#define PIN_UART0_RX_4            (PIN_ALT3   | PIN_PORTD | PIN6)
+#define PIN_UART0_TX_1            (PIN_ALT2   | PIN_PORTA | PIN2)
+#define PIN_UART0_TX_2            (PIN_ALT3   | PIN_PORTA | PIN14)
+#define PIN_UART0_TX_3            (PIN_ALT3   | PIN_PORTB | PIN17)
+#define PIN_UART0_TX_4            (PIN_ALT3   | PIN_PORTD | PIN7)
+
+#define PIN_UART1_CTS_1           (PIN_ALT3   | PIN_PORTC | PIN2)
+#define PIN_UART1_CTS_2           (PIN_ALT3   | PIN_PORTE | PIN2)
+#define PIN_UART1_RTS_1           (PIN_ALT3   | PIN_PORTC | PIN1)
+#define PIN_UART1_RTS_2           (PIN_ALT3   | PIN_PORTE | PIN3)
+#define PIN_UART1_RX_1            (PIN_ALT3   | PIN_PORTC | PIN3)
+#define PIN_UART1_RX_2            (PIN_ALT3   | PIN_PORTE | PIN1)
+#define PIN_UART1_TX_1            (PIN_ALT3   | PIN_PORTC | PIN4)
+#define PIN_UART1_TX_2            (PIN_ALT3   | PIN_PORTE | PIN0)
+
+#define PIN_UART2_CTS             (PIN_ALT3   | PIN_PORTD | PIN1)
+#define PIN_UART2_RTS             (PIN_ALT3   | PIN_PORTD | PIN0)
+#define PIN_UART2_RX              (PIN_ALT3   | PIN_PORTD | PIN2)
+#define PIN_UART2_TX              (PIN_ALT3   | PIN_PORTD | PIN3)
+
+#define PIN_UART3_CTS_1           (PIN_ALT2   | PIN_PORTB | PIN13)
+#define PIN_UART3_CTS_2           (PIN_ALT3   | PIN_PORTB | PIN9)
+#define PIN_UART3_CTS_3           (PIN_ALT3   | PIN_PORTC | PIN19)
+#define PIN_UART3_CTS_4           (PIN_ALT3   | PIN_PORTE | PIN6)
+#define PIN_UART3_RTS_1           (PIN_ALT2   | PIN_PORTB | PIN12)
+#define PIN_UART3_RTS_2           (PIN_ALT3   | PIN_PORTB | PIN8)
+#define PIN_UART3_RTS_3           (PIN_ALT3   | PIN_PORTC | PIN18)
+#define PIN_UART3_RTS_4           (PIN_ALT3   | PIN_PORTE | PIN7)
+#define PIN_UART3_RX_1            (PIN_ALT3   | PIN_PORTB | PIN10)
+#define PIN_UART3_RX_2            (PIN_ALT3   | PIN_PORTC | PIN16)
+#define PIN_UART3_RX_3            (PIN_ALT3   | PIN_PORTE | PIN5)
+#define PIN_UART3_TX_1            (PIN_ALT3   | PIN_PORTB | PIN11)
+#define PIN_UART3_TX_2            (PIN_ALT3   | PIN_PORTC | PIN17)
+#define PIN_UART3_TX_3            (PIN_ALT3   | PIN_PORTE | PIN4)
+
+#define PIN_UART4_CTS_1           (PIN_ALT3   | PIN_PORTC | PIN13)
+#define PIN_UART4_CTS_2           (PIN_ALT3   | PIN_PORTE | PIN26)
+#define PIN_UART4_RTS_1           (PIN_ALT3   | PIN_PORTC | PIN12)
+#define PIN_UART4_RTS_2           (PIN_ALT3   | PIN_PORTE | PIN27)
+#define PIN_UART4_RX_1            (PIN_ALT3   | PIN_PORTC | PIN14)
+#define PIN_UART4_RX_2            (PIN_ALT3   | PIN_PORTE | PIN25)
+#define PIN_UART4_TX_1            (PIN_ALT3   | PIN_PORTC | PIN15)
+#define PIN_UART4_TX_2            (PIN_ALT3   | PIN_PORTE | PIN24)
+
+#define PIN_UART5_CTS_1           (PIN_ALT3   | PIN_PORTD | PIN11)
+#define PIN_UART5_CTS_2           (PIN_ALT3   | PIN_PORTE | PIN10)
+#define PIN_UART5_RTS_1           (PIN_ALT3   | PIN_PORTD | PIN10)
+#define PIN_UART5_RTS_2           (PIN_ALT3   | PIN_PORTE | PIN11)
+#define PIN_UART5_RX_1            (PIN_ALT3   | PIN_PORTD | PIN8)
+#define PIN_UART5_RX_2            (PIN_ALT3   | PIN_PORTE | PIN9)
+#define PIN_UART5_TX_1            (PIN_ALT3   | PIN_PORTD | PIN9)
+#define PIN_UART5_TX_2            (PIN_ALT3   | PIN_PORTE | PIN8)
+
+/* USB */
+
+#define PIN_USB_CLKIN_1           (PIN_ALT2   | PIN_PORTA | PIN5)
+#define PIN_USB_CLKIN_2           (PIN_ALT7   | PIN_PORTE | PIN26)
+#define PIN_USB_SOF_OUT_1         (PIN_ALT3   | PIN_PORTC | PIN7)
+#define PIN_USB_SOF_OUT_2         (PIN_ALT4   | PIN_PORTC | PIN0)
+#define PIN_USB_SOF_OUT_3         (PIN_ALT7   | PIN_PORTE | PIN6)
+
+/* External Crystal */
+
+#define PIN_EXTAL0                (PIN_ANALOG | PIN_PORTA | PIN18)
+#define PIN_XTAL0                 (PIN_ANALOG | PIN_PORTA | PIN19)
+
+/********************************************************************************************
+ * Public Types
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Public Data
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Public Functions
+ ********************************************************************************************/
+
+#endif /* KINETIS_K64 */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHP_KINETIS_K64PINMUX_H */
diff --git a/arch/arm/src/kinetis/chip/kinetis_k64vectors.h b/arch/arm/src/kinetis/chip/kinetis_k64vectors.h
new file mode 100644
index 0000000000000000000000000000000000000000..e010253a7fe5c6c7a678c166c2b3f40dea70a85d
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_k64vectors.h
@@ -0,0 +1,147 @@
+/************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_k64vectors.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Pre-processor definitions
+ ************************************************************************************/
+/* This file is included by kinetis_vectors.S.  It provides the macro VECTOR that
+ * supplies ach K64 vector in terms of a (lower-case) ISR label and an
+ * (upper-case) IRQ number as defined in arch/arm/include/kinetis/kinetis_k64irq.h.
+ * kinetis_vectors.S will defined the VECTOR in different ways in order to generate
+ * the interrupt vectors and handlers in their final form.
+ */
+
+#if defined(CONFIG_ARCH_FAMILY_K64)
+
+/* If the common ARMv7-M vector handling is used, then all it needs is the following
+ * definition that provides the number of supported vectors.
+ */
+
+#  ifdef CONFIG_ARMV7M_CMNVECTOR
+
+/* Reserve interrupt table entries for I/O interrupts. */
+
+#    define ARMV7M_PERIPHERAL_INTERRUPTS NR_INTERRUPTS
+
+#  else
+VECTOR(kinetis_dmach0, KINETIS_IRQ_DMACH0)     /* Vector 16: DMA channel 0 transfer complete */
+VECTOR(kinetis_dmach1, KINETIS_IRQ_DMACH1)     /* Vector 17: DMA channel 1 transfer complete */
+VECTOR(kinetis_dmach2, KINETIS_IRQ_DMACH2)     /* Vector 18: DMA channel 2 transfer complete */
+VECTOR(kinetis_dmach3, KINETIS_IRQ_DMACH3)     /* Vector 19: DMA channel 3 transfer complete */
+VECTOR(kinetis_dmach4, KINETIS_IRQ_DMACH4)     /* Vector 20: DMA channel 4 transfer complete */
+VECTOR(kinetis_dmach5, KINETIS_IRQ_DMACH5)     /* Vector 21: DMA channel 5 transfer complete */
+VECTOR(kinetis_dmach6, KINETIS_IRQ_DMACH6)     /* Vector 22: DMA channel 6 transfer complete */
+VECTOR(kinetis_dmach7, KINETIS_IRQ_DMACH7)     /* Vector 23: DMA channel 7 transfer complete */
+VECTOR(kinetis_dmach8, KINETIS_IRQ_DMACH8)     /* Vector 24: DMA channel 8 transfer complete */
+VECTOR(kinetis_dmach9, KINETIS_IRQ_DMACH9)     /* Vector 25: DMA channel 9 transfer complete */
+VECTOR(kinetis_dmach10, KINETIS_IRQ_DMACH10)   /* Vector 26: DMA channel 10 transfer complete */
+VECTOR(kinetis_dmach11, KINETIS_IRQ_DMACH11)   /* Vector 27: DMA channel 11 transfer complete */
+VECTOR(kinetis_dmach12, KINETIS_IRQ_DMACH12)   /* Vector 28: DMA channel 12 transfer complete */
+VECTOR(kinetis_dmach13, KINETIS_IRQ_DMACH13)   /* Vector 29: DMA channel 13 transfer complete */
+VECTOR(kinetis_dmach14, KINETIS_IRQ_DMACH14)   /* Vector 30: DMA channel 14 transfer complete */
+VECTOR(kinetis_dmach15, KINETIS_IRQ_DMACH15)   /* Vector 31: DMA channel 15 transfer complete */
+VECTOR(kinetis_dmaerr, KINETIS_IRQ_DMAERR)     /* Vector 32: DMA error interrupt channels 0-15 */
+VECTOR(kinetis_mcm, KINETIS_IRQ_MCM)           /* Vector 33: MCM Normal interrupt */
+VECTOR(kinetis_flashcc, KINETIS_IRQ_FLASHCC)   /* Vector 34: Flash memory command complete */
+VECTOR(kinetis_flashrc, KINETIS_IRQ_FLASHRC)   /* Vector 35: Flash memory read collision */
+VECTOR(kinetis_smclvd, KINETIS_IRQ_SMCLVD)     /* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
+VECTOR(kinetis_llwu, KINETIS_IRQ_LLWU)         /* Vector 37: LLWU Normal Low Leakage Wakeup */
+VECTOR(kinetis_wdog, KINETIS_IRQ_WDOG)         /* Vector 38: Watchdog */
+VECTOR(kinetis_rngb, KINETIS_IRQ_RNGB)         /* Vector 39: Random number generator */
+VECTOR(kinetis_i2c0, KINETIS_IRQ_I2C0)         /* Vector 40: I2C0 */
+VECTOR(kinetis_i2c1, KINETIS_IRQ_I2C1)         /* Vector 41: I2C1 */
+VECTOR(kinetis_spi0, KINETIS_IRQ_SPI0)         /* Vector 42: SPI0 all sources */
+VECTOR(kinetis_spi1, KINETIS_IRQ_SPI1)         /* Vector 43: SPI1 all sources */
+VECTOR(kinetis_i2s0, KINETIS_IRQ_I2S0)         /* Vector 44: Transmit */
+VECTOR(kinetis_i2s1, KINETIS_IRQ_I2S1)         /* Vector 45: Transmit */
+UNUSED(KINETIS_IRQ_RESVD30)                    /* Vector 46: Reserved */
+VECTOR(kinetis_uart0s, KINETIS_IRQ_UART0S)     /* Vector 47: UART0 status */
+VECTOR(kinetis_uart0e, KINETIS_IRQ_UART0E)     /* Vector 48: UART0 error */
+VECTOR(kinetis_uart1s, KINETIS_IRQ_UART1S)     /* Vector 49: UART1 status */
+VECTOR(kinetis_uart1e, KINETIS_IRQ_UART1E)     /* Vector 50: UART1 error */
+VECTOR(kinetis_uart2s, KINETIS_IRQ_UART2S)     /* Vector 51: UART2 status */
+VECTOR(kinetis_uart2e, KINETIS_IRQ_UART2E)     /* Vector 52: UART2 error */
+VECTOR(kinetis_uart3s, KINETIS_IRQ_UART3S)     /* Vector 53: UART3 status */
+VECTOR(kinetis_uart3e, KINETIS_IRQ_UART3E)     /* Vector 54: UART3 error */
+VECTOR(kinetis_adc0, KINETIS_IRQ_ADC0)         /* Vector 55: ADC0 */
+VECTOR(kinetis_cmp0, KINETIS_IRQ_CMP0)         /* Vector 56: CMP0 */
+VECTOR(kinetis_cmp1, KINETIS_IRQ_CMP1)         /* Vector 57: CMP1 */
+VECTOR(kinetis_ftm0, KINETIS_IRQ_FTM0)         /* Vector 58: FTM0 all sources */
+VECTOR(kinetis_ftm1, KINETIS_IRQ_FTM1)         /* Vector 59: FTM1 all sources */
+VECTOR(kinetis_ftm2, KINETIS_IRQ_FTM2)         /* Vector 60: FTM2 all sources */
+VECTOR(kinetis_cmt, KINETIS_IRQ_CMT)           /* Vector 61: CMT */
+VECTOR(kinetis_rtc0, KINETIS_IRQ_RTC)          /* Vector 62: RTC alarm interrupt */
+VECTOR(kinetis_rtc1, KINETIS_IRQ_RTCS)         /* Vector 63: RTC seconds interrupt */
+VECTOR(kinetis_pitch0, KINETIS_IRQ_PITCH0)     /* Vector 64: PIT channel 0 */
+VECTOR(kinetis_pitch1, KINETIS_IRQ_PITCH1)     /* Vector 65: PIT channel 1 */
+VECTOR(kinetis_pitch2, KINETIS_IRQ_PITCH2)     /* Vector 66: PIT channel 2 */
+VECTOR(kinetis_pitch3, KINETIS_IRQ_PITCH3)     /* Vector 67: PIT channel 3 */
+VECTOR(kinetis_pdb, KINETIS_IRQ_PDB)           /* Vector 68: PDB */
+VECTOR(kinetis_usbotg, KINETIS_IRQ_USBOTG)     /* Vector 69: USB OTG */
+VECTOR(kinetis_usbcd, KINETIS_IRQ_USBCD)       /* Vector 70: USB charger detect */
+UNUSED(KINETIS_IRQ_RESVD55)                    /* Vector 71: Reserved */
+VECTOR(kinetis_dac0, KINETIS_IRQ_DAC0)         /* Vector 72: DAC0 */
+VECTOR(kinetis_mcg, KINETIS_IRQ_MCG)           /* Vector 73: MCG */
+VECTOR(kinetis_lpt, KINETIS_IRQ_LPT)           /* Vector 74: Low power timer */
+VECTOR(kinetis_porta, KINETIS_IRQ_PORTA)       /* Vector 75: Pin detect port A */
+VECTOR(kinetis_portb, KINETIS_IRQ_PORTB)       /* Vector 76: Pin detect port B */
+VECTOR(kinetis_portc, KINETIS_IRQ_PORTC)       /* Vector 77: Pin detect port C */
+VECTOR(kinetis_portd, KINETIS_IRQ_PORTD)       /* Vector 78: Pin detect port D */
+VECTOR(kinetis_porte, KINETIS_IRQ_PORTE)       /* Vector 79: Pin detect port E */
+VECTOR(kinetis_software, KINETIS_IRQ_SWI)      /* Vector 80: Software interrupt */
+VECTOR(kinetis_spi2, KINETIS_IRQ_SPI2)         /* Vector 81: SPI2 all sources */
+VECTOR(kinetis_uart4s, KINETIS_IRQ_UART4S)     /* Vector 82: UART4 status */
+VECTOR(kinetis_uart4e, KINETIS_IRQ_UART4E)     /* Vector 83: UART4 error */
+VECTOR(kinetis_uart5s, KINETIS_IRQ_UART5S)     /* Vector 84: UART5 status */
+VECTOR(kinetis_uart5e, KINETIS_IRQ_UART5E)     /* Vector 85: UART5 error */
+VECTOR(kinetis_cmp2, KINETIS_IRQ_CMP2)         /* Vector 86: CMP2 */
+VECTOR(kinetis_ftm3, KINETIS_IRQ_FTM3)         /* Vector 87: FTM3 all sources */
+VECTOR(kinetis_dac1, KINETIS_IRQ_DAC1)         /* Vector 88: DAC1 */
+VECTOR(kinetis_adc1, KINETIS_IRQ_ADC1)         /* Vector 89: ADC1 */
+VECTOR(kinetis_i2c2, KINETIS_IRQ_I2C2)         /* Vector 90: I2C2 */
+VECTOR(kinetis_can0mb, KINETIS_IRQ_CAN0MB)     /* Vector 91: CAN0 ORed Message buffer (0-15) */
+VECTOR(kinetis_can0bo, KINETIS_IRQ_CAN0BO)     /* Vector 92: CAN0 Bus Off */
+VECTOR(kinetis_can0err, KINETIS_IRQ_CAN0ERR)   /* Vector 93: CAN0 Error */
+VECTOR(kinetis_can0tw, KINETIS_IRQ_CAN0TW)     /* Vector 94: CAN0 Transmit Warning */
+VECTOR(kinetis_can0rw, KINETIS_IRQ_CAN0RW)     /* Vector 95: CAN0 Receive Warning */
+VECTOR(kinetis_can0wu, KINETIS_IRQ_CAN0WU)     /* Vector 96: CAN0 Wake UP */
+VECTOR(kinetis_sdhc, KINETIS_IRQ_SDHC)         /* Vector 97: SDHC */
+VECTOR(kinetis_emactmr, KINETIS_IRQ_EMACTMR)   /* Vector 91: Ethernet MAC IEEE 1588 timer interrupt */
+VECTOR(kinetis_emactx, KINETIS_IRQ_EMACTX)     /* Vector 92: Ethernet MAC transmit interrupt */
+VECTOR(kinetis_emacrx, KINETIS_IRQ_EMACRX)     /* Vector 93: Ethernet MAC receive interrupt */
+VECTOR(kinetis_emacmisc, KINETIS_IRQ_EMACMISC) /* Vector 94: Ethernet MAC error and misc interrupt */
+#  endif /* CONFIG_ARMV7M_CMNVECTOR */
+#endif /* CONFIG_ARCH_FAMILY_K64 */
diff --git a/arch/arm/src/kinetis/chip/kinetis_k66fmc.h b/arch/arm/src/kinetis/chip/kinetis_k66fmc.h
new file mode 100644
index 0000000000000000000000000000000000000000..4140902f393873c52f3bf844f7d2b7b6d9947170
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_k66fmc.h
@@ -0,0 +1,364 @@
+/************************************************************************************
+ * arch/arm/src/kinetis/kinetis_k66fmc.h
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K66FMC_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K66FMC_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Register Offsets *****************************************************************/
+
+#define KINETIS_FMC_PFAPR_OFFSET        0x0000 /* Flash Access Protection Register */
+#define KINETIS_FMC_PFB01CR_OFFSET      0x0004 /* Flash Bank 0-1 Control Register */
+#define KINETIS_FMC_PFB23CR_OFFSET      0x0008 /* Flash Bank 2-3 Control Register */
+
+/* Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */
+
+#define KINETIS_FMC_TAGVD_OFFSET(w,s)   (0x100 + ((w) << 5) + ((s) << 2))
+
+#define KINETIS_FMC_TAGVDW0S0_OFFSET    0x0100 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW0S1_OFFSET    0x0104 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW0S2_OFFSET    0x0108 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW0S3_OFFSET    0x010c /* Cache Directory Storage */
+
+#define KINETIS_FMC_TAGVDW1S0_OFFSET    0x0110 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW1S1_OFFSET    0x0114 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW1S2_OFFSET    0x0118 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW1S3_OFFSET    0x011c /* Cache Directory Storage */
+
+#define KINETIS_FMC_TAGVDW2S0_OFFSET    0x0120 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW2S1_OFFSET    0x0124 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW2S2_OFFSET    0x0128 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW2S3_OFFSET    0x012c /* Cache Directory Storage */
+
+#define KINETIS_FMC_TAGVDW3S0_OFFSET    0x0130 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW3S1_OFFSET    0x0134 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW3S2_OFFSET    0x0138 /* Cache Directory Storage */
+#define KINETIS_FMC_TAGVDW3S3_OFFSET    0x013c /* Cache Directory Storage */
+
+/* Cache Data Storage (UpperMost, MidUpper, MidLower LowerMost) for way=w and set=s, w=0..3, s=0..7 */
+
+#define KINETIS_FMC_DATAUM_OFFSET(w,s)  (0x200 + ((w) << 6) + ((s) << 2))
+#define KINETIS_FMC_DATAMU_OFFSET(w,s)  (0x204 + ((w) << 6) + ((s) << 2))
+#define KINETIS_FMC_DATAML_OFFSET(w,s)  (0x208 + ((w) << 6) + ((s) << 2))
+#define KINETIS_FMC_DATALM_OFFSET(w,s)  (0x20c + ((w) << 6) + ((s) << 2))
+
+#define KINETIS_FMC_DATAW0S0UM_OFFSET   0x0200 /* Cache Data Storage (uppermost word) */
+#define KINETIS_FMC_DATAW0S0MU_OFFSET   0x0204 /* Cache Data Storage (mid-upper word) */
+#define KINETIS_FMC_DATAW0S0ML_OFFSET   0x0208 /* Cache Data Storage (mid-lower word) */
+#define KINETIS_FMC_DATAW0S0LM_OFFSET   0x020c /* Cache Data Storage (lowermost word) */
+#define KINETIS_FMC_DATAW0S1UM_OFFSET   0x0210 /* Cache Data Storage (uppermost word) */
+#define KINETIS_FMC_DATAW0S1MU_OFFSET   0x0214 /* Cache Data Storage (mid-upper word) */
+#define KINETIS_FMC_DATAW0S1ML_OFFSET   0x0218 /* Cache Data Storage (mid-lower word) */
+#define KINETIS_FMC_DATAW0S1LM_OFFSET   0x021c /* Cache Data Storage (lowermost word) */
+
+#define KINETIS_FMC_DATAW0S2UM_OFFSET   0x0220 /* Cache Data Storage (uppermost word) */
+#define KINETIS_FMC_DATAW0S2MU_OFFSET   0x0224 /* Cache Data Storage (mid-upper word) */
+#define KINETIS_FMC_DATAW0S2ML_OFFSET   0x0228 /* Cache Data Storage (mid-lower word) */
+#define KINETIS_FMC_DATAW0S2LM_OFFSET   0x022c /* Cache Data Storage (lowermost word) */
+#define KINETIS_FMC_DATAW0S3UM_OFFSET   0x0230 /* Cache Data Storage (uppermost word) */
+#define KINETIS_FMC_DATAW0S3MU_OFFSET   0x0234 /* Cache Data Storage (mid-upper word) */
+#define KINETIS_FMC_DATAW0S3ML_OFFSET   0x0238 /* Cache Data Storage (mid-lower word) */
+#define KINETIS_FMC_DATAW0S3LM_OFFSET   0x023c /* Cache Data Storage (lowermost word) */
+#define KINETIS_FMC_DATAW1S0UM_OFFSET   0x0240 /* Cache Data Storage (uppermost word) */
+#define KINETIS_FMC_DATAW1S0MU_OFFSET   0x0244 /* Cache Data Storage (mid-upper word) */
+#define KINETIS_FMC_DATAW1S0ML_OFFSET   0x0248 /* Cache Data Storage (mid-lower word) */
+#define KINETIS_FMC_DATAW1S0LM_OFFSET   0x024c /* Cache Data Storage (lowermost word) */
+#define KINETIS_FMC_DATAW1S1UM_OFFSET   0x0250 /* Cache Data Storage (uppermost word) */
+#define KINETIS_FMC_DATAW1S1MU_OFFSET   0x0254 /* Cache Data Storage (mid-upper word) */
+#define KINETIS_FMC_DATAW1S1ML_OFFSET   0x0258 /* Cache Data Storage (mid-lower word) */
+#define KINETIS_FMC_DATAW1S1LM_OFFSET   0x025c /* Cache Data Storage (lowermost word) */
+#define KINETIS_FMC_DATAW1S2UM_OFFSET   0x0260 /* Cache Data Storage (uppermost word) */
+#define KINETIS_FMC_DATAW1S2MU_OFFSET   0x0264 /* Cache Data Storage (mid-upper word) */
+#define KINETIS_FMC_DATAW1S2ML_OFFSET   0x0268 /* Cache Data Storage (mid-lower word) */
+#define KINETIS_FMC_DATAW1S2LM_OFFSET   0x026c /* Cache Data Storage (lowermost word) */
+#define KINETIS_FMC_DATAW1S3UM_OFFSET   0x0270 /* Cache Data Storage (uppermost word) */
+#define KINETIS_FMC_DATAW1S3MU_OFFSET   0x0274 /* Cache Data Storage (mid-upper word) */
+#define KINETIS_FMC_DATAW1S3ML_OFFSET   0x0278 /* Cache Data Storage (mid-lower word) */
+#define KINETIS_FMC_DATAW1S3LM_OFFSET   0x027c /* Cache Data Storage (lowermost word) */
+
+#define KINETIS_FMC_DATAW2S0UM_OFFSET   0x0280 /* Cache Data Storage (uppermost word) */
+#define KINETIS_FMC_DATAW2S0MU_OFFSET   0x0284 /* Cache Data Storage (mid-upper word) */
+#define KINETIS_FMC_DATAW2S0ML_OFFSET   0x0288 /* Cache Data Storage (mid-lower word) */
+#define KINETIS_FMC_DATAW2S0LM_OFFSET   0x028c /* Cache Data Storage (lowermost word) */
+#define KINETIS_FMC_DATAW2S1UM_OFFSET   0x0290 /* Cache Data Storage (uppermost word) */
+#define KINETIS_FMC_DATAW2S1MU_OFFSET   0x0294 /* Cache Data Storage (mid-upper word) */
+#define KINETIS_FMC_DATAW2S1ML_OFFSET   0x0298 /* Cache Data Storage (mid-lower word) */
+#define KINETIS_FMC_DATAW2S1LM_OFFSET   0x029c /* Cache Data Storage (lowermost word) */
+#define KINETIS_FMC_DATAW2S2UM_OFFSET   0x02a0 /* Cache Data Storage (uppermost word) */
+#define KINETIS_FMC_DATAW2S2MU_OFFSET   0x02a4 /* Cache Data Storage (mid-upper word) */
+#define KINETIS_FMC_DATAW2S2ML_OFFSET   0x02a8 /* Cache Data Storage (mid-lower word) */
+#define KINETIS_FMC_DATAW2S2LM_OFFSET   0x02ac /* Cache Data Storage (lowermost word) */
+#define KINETIS_FMC_DATAW2S3UM_OFFSET   0x02b0 /* Cache Data Storage (uppermost word) */
+#define KINETIS_FMC_DATAW2S3MU_OFFSET   0x02b4 /* Cache Data Storage (mid-upper word) */
+#define KINETIS_FMC_DATAW2S3ML_OFFSET   0x02b8 /* Cache Data Storage (mid-lower word) */
+#define KINETIS_FMC_DATAW2S3LM_OFFSET   0x02bc /* Cache Data Storage (lowermost word) */
+
+#define KINETIS_FMC_DATAW3S0UM_OFFSET   0x02c0 /* Cache Data Storage (uppermost word) */
+#define KINETIS_FMC_DATAW3S0MU_OFFSET   0x02c4 /* Cache Data Storage (mid-upper word) */
+#define KINETIS_FMC_DATAW3S0ML_OFFSET   0x02c8 /* Cache Data Storage (mid-lower word) */
+#define KINETIS_FMC_DATAW3S0LM_OFFSET   0x02cc /* Cache Data Storage (lowermost word) */
+#define KINETIS_FMC_DATAW3S1UM_OFFSET   0x02d0 /* Cache Data Storage (uppermost word) */
+#define KINETIS_FMC_DATAW3S1MU_OFFSET   0x02d4 /* Cache Data Storage (mid-upper word) */
+#define KINETIS_FMC_DATAW3S1ML_OFFSET   0x02d8 /* Cache Data Storage (mid-lower word) */
+#define KINETIS_FMC_DATAW3S1LM_OFFSET   0x02dc /* Cache Data Storage (lowermost word) */
+#define KINETIS_FMC_DATAW3S2UM_OFFSET   0x02e0 /* Cache Data Storage (uppermost word) */
+#define KINETIS_FMC_DATAW3S2MU_OFFSET   0x02e4 /* Cache Data Storage (mid-upper word) */
+#define KINETIS_FMC_DATAW3S2ML_OFFSET   0x02e8 /* Cache Data Storage (mid-lower word) */
+#define KINETIS_FMC_DATAW3S2LM_OFFSET   0x02ec /* Cache Data Storage (lowermost word) */
+#define KINETIS_FMC_DATAW3S3UM_OFFSET   0x02f0 /* Cache Data Storage (uppermost word) */
+#define KINETIS_FMC_DATAW3S3MU_OFFSET   0x02f4 /* Cache Data Storage (mid-upper word) */
+#define KINETIS_FMC_DATAW3S3ML_OFFSET   0x02f8 /* Cache Data Storage (mid-lower word) */
+#define KINETIS_FMC_DATAW3S3LM_OFFSET   0x02fc /* Cache Data Storage (lowermost word) */
+
+/* Register Addresses ***************************************************************/
+
+#define KINETIS_FMC_PFAPR               (KINETIS_FMC_BASE+KINETIS_FMC_PFAPR_OFFSET)
+#define KINETIS_FMC_PFB01CR             (KINETIS_FMC_BASE+KINETIS_FMC_PFB01CR_OFFSET)
+#define KINETIS_FMC_PFB23CR             (KINETIS_FMC_BASE+KINETIS_FMC_PFB23CR_OFFSET)
+
+/*  Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */
+
+#define KINETIS_FMC_TAGVD(w,s)          (KINETIS_FMC_BASE+KINETIS_FMC_TAGVD_OFFSET(w,s))
+
+#define KINETIS_FMC_TAGVDW0S0           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW0S0_OFFSET)
+#define KINETIS_FMC_TAGVDW0S1           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW0S1_OFFSET)
+#define KINETIS_FMC_TAGVDW0S2           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW0S2_OFFSET)
+#define KINETIS_FMC_TAGVDW0S3           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW0S3_OFFSET)
+
+#define KINETIS_FMC_TAGVDW1S0           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW1S0_OFFSET)
+#define KINETIS_FMC_TAGVDW1S1           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW1S1_OFFSET)
+#define KINETIS_FMC_TAGVDW1S2           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW1S2_OFFSET)
+#define KINETIS_FMC_TAGVDW1S3           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW1S3_OFFSET)
+
+#define KINETIS_FMC_TAGVDW2S0           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW2S0_OFFSET)
+#define KINETIS_FMC_TAGVDW2S1           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW2S1_OFFSET)
+#define KINETIS_FMC_TAGVDW2S2           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW2S2_OFFSET)
+#define KINETIS_FMC_TAGVDW2S3           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW2S3_OFFSET)
+
+#define KINETIS_FMC_TAGVDW3S0           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW3S0_OFFSET)
+#define KINETIS_FMC_TAGVDW3S1           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW3S1_OFFSET)
+#define KINETIS_FMC_TAGVDW3S2           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW3S2_OFFSET)
+#define KINETIS_FMC_TAGVDW3S3           (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW3S3_OFFSET)
+
+/* Cache Data Storage (UpperMost, MidUpper, MidLower LowerMost) for way=w and set=s, w=0..3, s=0..7 */
+
+#define KINETIS_FMC_DATAUM(w,s)         (KINETIS_FMC_BASE+KINETIS_FMC_DATAUM_OFFSET(w,s))
+#define KINETIS_FMC_DATAMU(w,s)         (KINETIS_FMC_BASE+KINETIS_FMC_DATAMU_OFFSET(w,s))
+#define KINETIS_FMC_DATAML(w,s)         (KINETIS_FMC_BASE+KINETIS_FMC_DATAML_OFFSET(w,s))
+#define KINETIS_FMC_DATALM(w,s)         (KINETIS_FMC_BASE+KINETIS_FMC_DATALM_OFFSET(w,s))
+
+#define KINETIS_FMC_DATAW0S0UM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S0UM_OFFSET)
+#define KINETIS_FMC_DATAW0S0MU          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S0MU_OFFSET)
+#define KINETIS_FMC_DATAW0S0ML          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S0ML_OFFSET)
+#define KINETIS_FMC_DATAW0S0LM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S0LM_OFFSET)
+#define KINETIS_FMC_DATAW0S1UM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S1UM_OFFSET)
+#define KINETIS_FMC_DATAW0S1MU          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S1MU_OFFSET)
+#define KINETIS_FMC_DATAW0S1ML          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S1ML_OFFSET)
+#define KINETIS_FMC_DATAW0S1LM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S1LM_OFFSET)
+#define KINETIS_FMC_DATAW0S2UM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S2UM_OFFSET)
+#define KINETIS_FMC_DATAW0S2MU          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S2MU_OFFSET)
+#define KINETIS_FMC_DATAW0S2ML          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S2ML_OFFSET)
+#define KINETIS_FMC_DATAW0S2LM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S2LM_OFFSET)
+#define KINETIS_FMC_DATAW0S3UM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S3UM_OFFSET)
+#define KINETIS_FMC_DATAW0S3MU          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S3MU_OFFSET)
+#define KINETIS_FMC_DATAW0S3ML          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S3ML_OFFSET)
+#define KINETIS_FMC_DATAW0S3LM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S3LM_OFFSET)
+
+#define KINETIS_FMC_DATAW1S0UM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S0UM_OFFSET)
+#define KINETIS_FMC_DATAW1S0MU          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S0MU_OFFSET)
+#define KINETIS_FMC_DATAW1S0ML          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S0ML_OFFSET)
+#define KINETIS_FMC_DATAW1S0LM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S0LM_OFFSET)
+#define KINETIS_FMC_DATAW1S1UM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S1UM_OFFSET)
+#define KINETIS_FMC_DATAW1S1MU          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S1MU_OFFSET)
+#define KINETIS_FMC_DATAW1S1ML          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S1ML_OFFSET)
+#define KINETIS_FMC_DATAW1S1LM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S1LM_OFFSET)
+#define KINETIS_FMC_DATAW1S2UM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S2UM_OFFSET)
+#define KINETIS_FMC_DATAW1S2MU          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S2MU_OFFSET)
+#define KINETIS_FMC_DATAW1S2ML          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S2ML_OFFSET)
+#define KINETIS_FMC_DATAW1S2LM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S2LM_OFFSET)
+#define KINETIS_FMC_DATAW1S3UM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S3UM_OFFSET)
+#define KINETIS_FMC_DATAW1S3MU          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S3MU_OFFSET)
+#define KINETIS_FMC_DATAW1S3ML          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S3ML_OFFSET)
+#define KINETIS_FMC_DATAW1S3LM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S3LM_OFFSET)
+
+#define KINETIS_FMC_DATAW2S0UM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S0UM_OFFSET)
+#define KINETIS_FMC_DATAW2S0MU          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S0MU_OFFSET)
+#define KINETIS_FMC_DATAW2S0ML          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S0ML_OFFSET)
+#define KINETIS_FMC_DATAW2S0LM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S0LM_OFFSET)
+#define KINETIS_FMC_DATAW2S1UM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S1UM_OFFSET)
+#define KINETIS_FMC_DATAW2S1MU          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S1MU_OFFSET)
+#define KINETIS_FMC_DATAW2S1ML          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S1ML_OFFSET)
+#define KINETIS_FMC_DATAW2S1LM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S1LM_OFFSET)
+#define KINETIS_FMC_DATAW2S2UM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S2UM_OFFSET)
+#define KINETIS_FMC_DATAW2S2MU          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S2MU_OFFSET)
+#define KINETIS_FMC_DATAW2S2ML          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S2ML_OFFSET)
+#define KINETIS_FMC_DATAW2S2LM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S2LM_OFFSET)
+#define KINETIS_FMC_DATAW2S3UM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S3UM_OFFSET)
+#define KINETIS_FMC_DATAW2S3MU          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S3MU_OFFSET)
+#define KINETIS_FMC_DATAW2S3ML          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S3ML_OFFSET)
+#define KINETIS_FMC_DATAW2S3LM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S3LM_OFFSET)
+
+#define KINETIS_FMC_DATAW3S0UM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S0UM_OFFSET)
+#define KINETIS_FMC_DATAW3S0MU          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S0MU_OFFSET)
+#define KINETIS_FMC_DATAW3S0ML          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S0ML_OFFSET)
+#define KINETIS_FMC_DATAW3S0LM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S0LM_OFFSET)
+#define KINETIS_FMC_DATAW3S1UM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S1UM_OFFSET)
+#define KINETIS_FMC_DATAW3S1MU          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S1MU_OFFSET)
+#define KINETIS_FMC_DATAW3S1ML          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S1ML_OFFSET)
+#define KINETIS_FMC_DATAW3S1LM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S1LM_OFFSET)
+#define KINETIS_FMC_DATAW3S2UM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S2UM_OFFSET)
+#define KINETIS_FMC_DATAW3S2MU          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S2MU_OFFSET)
+#define KINETIS_FMC_DATAW3S2ML          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S2ML_OFFSET)
+#define KINETIS_FMC_DATAW3S2LM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S2LM_OFFSET)
+#define KINETIS_FMC_DATAW3S3UM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S3UM_OFFSET)
+#define KINETIS_FMC_DATAW3S3MU          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S3MU_OFFSET)
+#define KINETIS_FMC_DATAW3S3ML          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S3ML_OFFSET)
+#define KINETIS_FMC_DATAW3S3LM          (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S3LM_OFFSET)
+
+/* Register Bit Definitions *********************************************************/
+
+/* Flash Access Protection Register */
+/* Access protection bits (all masters) */
+
+#define FMC_PFAPR_NONE                  0 /* No access may be performed by this master */
+#define FMC_PFAPR_RDONLY                1 /* Only read accesses may be performed by this master */
+#define FMC_PFAPR_WRONLY                2 /* Only write accesses may be performed by this master */
+#define FMC_PFAPR_RDWR                  3 /* Both read and write accesses may be performed by this master */
+
+#define FMC_PFAPR_M0AP_SHIFT            (0)       /* Bits 0-1: Master 0 Access Protection */
+#define FMC_PFAPR_M0AP_MASK             (3 << FMC_PFAPR_M0AP_SHIFT)
+#define FMC_PFAPR_M1AP_SHIFT            (2)       /* Bits 2-3: Master 1 Access Protection */
+#define FMC_PFAPR_M1AP_MASK             (3 << FMC_PFAPR_M1AP_SHIFT)
+#define FMC_PFAPR_M2AP_SHIFT            (4)       /* Bits 4-5: Master 2 Access Protection */
+#define FMC_PFAPR_M2AP_MASK             (3 << FMC_PFAPR_M2AP_SHIFT)
+#define FMC_PFAPR_M3AP_SHIFT            (6)       /* Bits 6-7: Master 3 Access Protection */
+#define FMC_PFAPR_M3AP_MASK             (3 << FMC_PFAPR_M3AP_SHIFT)
+#define FMC_PFAPR_M4AP_SHIFT            (8)       /* Bits 8-9: Master 4 Access Protection */
+#define FMC_PFAPR_M4AP_MASK             (3 << FMC_PFAPR_M4AP_SHIFT)
+#define FMC_PFAPR_M5AP_SHIFT            (10)      /* Bits 10-11: Master 5 Access Protection */
+#define FMC_PFAPR_M5AP_MASK             (3 << FMC_PFAPR_M5AP_SHIFT)
+#define FMC_PFAPR_M6AP_SHIFT            (12)      /* Bits 12-13: Master 6 Access Protection */
+#define FMC_PFAPR_M6AP_MASK             (3 << FMC_PFAPR_M6AP_SHIFT)
+#define FMC_PFAPR_M7AP_SHIFT            (14)      /* Bits 14-15: Master 7 Access Protection */
+#define FMC_PFAPR_M7AP_MASK             (3 << FMC_PFAPR_M7AP_SHIFT)
+#define FMC_PFAPR_M0PFD                 (1 << 16) /* Bit 16: Master 0 Prefetch Disable */
+#define FMC_PFAPR_M1PFD                 (1 << 17) /* Bit 17: Master 1 Prefetch Disable */
+#define FMC_PFAPR_M2PFD                 (1 << 18) /* Bit 18: Master 2 Prefetch Disable */
+#define FMC_PFAPR_M3PFD                 (1 << 19) /* Bit 19: Master 3 Prefetch Disable */
+#define FMC_PFAPR_M4PFD                 (1 << 20) /* Bit 20: Master 4 Prefetch Disable */
+#define FMC_PFAPR_M5PFD                 (1 << 21) /* Bit 21: Master 5 Prefetch Disable */
+#define FMC_PFAPR_M6PFD                 (1 << 22) /* Bit 22: Master 6 Prefetch Disable */
+#define FMC_PFAPR_M7PFD                 (1 << 23) /* Bit 23: Master 7 Prefetch Disable */
+                                                  /* Bits 24-31: Reserved */
+/* Flash Bank 0-1 Control Register */
+
+#define FMC_PFB01CR_RFU                 (1 << 0)  /* Bit 0:  Reserved for future use */
+#define FMC_PFB01CR_B0IPE               (1 << 1)  /* Bit 1:  Bank 0 Instruction Prefetch Enable */
+#define FMC_PFB01CR_B0DPE               (1 << 2)  /* Bit 2:  Bank 0 Data Prefetch Enable */
+#define FMC_PFB01CR_B0ICE               (1 << 3)  /* Bit 3:  Bank 0 Instruction Cache Enable */
+#define FMC_PFB01CR_B0DCE               (1 << 4)  /* Bit 4:  Bank 0 Data Cache Enable */
+#define FMC_PFB01CR_CRC_SHIFT           (5)       /* Bits 5-7: Cache Replacement Control */
+#define FMC_PFB01CR_CRC_MASK            (7 << FMC_PFB01CR_CRC_SHIFT)
+#  define FMC_PFB01CR_CRC_ALL           (0 << FMC_PFB01CR_CRC_SHIFT) /* LRU all four ways */
+#  define FMC_PFB01CR_CRC_I01D23        (2 << FMC_PFB01CR_CRC_SHIFT) /* LRU ifetches 0-1 data 2-3 */
+#  define FMC_PFB01CR_CRC_I012D3        (3 << FMC_PFB01CR_CRC_SHIFT) /* LRU ifetches 0-3 data 3 */
+                                                 /* Bits 8-16: Reserved */
+#define FMC_PFB01CR_B0MW_SHIFT          (17)      /* Bits 17-18: Bank 0 Memory Width */
+#define FMC_PFB01CR_B0MW_MASK           (3 << FMC_PFB01CR_B0MW_SHIFT)
+#  define FMC_PFB01CR_B0MW_32BITS       (0 << FMC_PFB01CR_B0MW_SHIFT) /* 32 bits */
+#  define FMC_PFB01CR_B0MW_64BITS       (1 << FMC_PFB01CR_B0MW_SHIFT) /* 64 bits */
+#  define FMC_PFB01CR_B0MW_128BITS      (2 << FMC_PFB01CR_B0MW_SHIFT) /* 128 bits */
+#define FMC_PFB01CR_S_B_INV             (1 << 19) /* Bit 19:  Invalidate Prefetch Speculation Buffer */
+#define FMC_PFB01CR_CINV_WAY_SHIFT      (20)      /* Bits 20-23: Cache Invalidate Way x */
+#define FMC_PFB01CR_CINV_WAY_MASK       (15 << FMC_PFB01CR_CINV_WAY_SHIFT)
+#define FMC_PFB01CR_CLCK_WAY_SHIFT      (24)      /* Bits 24-27: Cache Lock Way x */
+#define FMC_PFB01CR_CLCK_WAY_MASK       (15 << FMC_PFB01CR_CLCK_WAY_SHIFT)
+#define FMC_PFB01CR_B0RWSC_SHIFT        (28)      /* Bits 28-31: Bank 0 Read Wait State Control */
+#define FMC_PFB01CR_B0RWSC_MASK         (15 << FMC_PFB01CR_B0RWSC_SHIFT)
+
+/* Flash Bank 2-3 Control Register */
+
+#define FMC_PFB23CR_RFU                 (1 << 0)  /* Bit 0:  served for future use */
+#define FMC_PFB23CR_B1IPE               (1 << 1)  /* Bit 1:  Bank 1 Instruction Prefetch Enable */
+#define FMC_PFB23CR_B1DPE               (1 << 2)  /* Bit 2:  Bank 1 Data Prefetch Enable */
+#define FMC_PFB23CR_B1ICE               (1 << 3)  /* Bit 3:  Bank 1 Instruction Cache Enable */
+#define FMC_PFB23CR_B1DCE               (1 << 4)  /* Bit 4:  Bank 1 Data Cache Enable */
+                                                  /* Bits 5-16: Reserved */
+#define FMC_PFB23CR_B1MW_SHIFT          (17)      /* Bits 17-18: Bank 1 Memory Width */
+#define FMC_PFB23CR_B1MW_MASK           (3 << FMC_PFB23CR_B1MW_SHIFT)
+#  define FMC_PFB23CR_B1MW_32BITS       (0 << FMC_PFB23CR_B1MW_SHIFT) /* 32 bits */
+#  define FMC_PFB23CR_B1MW_64BITS       (1 << FMC_PFB23CR_B1MW_SHIFT) /* 64 bits */
+#  define FMC_PFB23CR_B1MW_128BITS      (2 << FMC_PFB23CR_B1MW_SHIFT) /* 128 bits */
+                                                  /* Bits 19-27: Reserved */
+#define FMC_PFB23CR_B1RWSC_SHIFT        (28)      /* Bits 28-31: Bank 1 Read Wait State Control */
+#define FMC_PFB23CR_B1RWSC_MASK         (15 << FMC_PFB23CR_B0RWSC_SHIFT)
+
+/* Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */
+
+#define FMC_TAGVD_VALID                 (1 << 0)  /* Bit 0:  1-bit valid for cache entry */
+                                                  /* Bits 1-5: Reserved */
+#define FMC_TAGVD_TAG_SHIFT             (6)       /* Bits 6-21: 16-bit tag for cache entry */
+#define FMC_TAGVD_TAG_MASK              (0xffff << FMC_TAGVD_TAG_SHIFT)
+                                                  /* Bits 19-31: Reserved */
+
+/* Cache Data Storage (UpperMost, MidUpper, MidLower LowerMost) for way=w and set=s,
+ * w=0..3, s=0..7  128-bit data in four 32-bit registers.
+ */
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K66FMC_H */
diff --git a/arch/arm/src/kinetis/chip/kinetis_k66memorymap.h b/arch/arm/src/kinetis/chip/kinetis_k66memorymap.h
new file mode 100644
index 0000000000000000000000000000000000000000..d1c370abdab4b9e5d319d7a47f64f5dceb18c7be
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_k66memorymap.h
@@ -0,0 +1,241 @@
+/************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_k66memorymap.h
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K66MEMORYMAP_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K66MEMORYMAP_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+#ifdef KINETIS_K66
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Memory Map ***********************************************************************/
+/* K66 Family
+ *
+ * The memory map for the following parts is defined in NXP document
+ * K66P144M180SF5RMV2 Rev. 2, May 2015
+ */
+
+#if defined(CONFIG_ARCH_CHIP_MK66FN2M0VMD18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VMD18) || \
+      defined(CONFIG_ARCH_CHIP_MK66FN2M0VLQ18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VLQ18)
+
+# define KINETIS_FLASH_BASE         0x00000000 /* -0x07ffffff Program flash and read-
+                                                *             only data (Includes exception
+                                                *             vectors in first 1024 bytes) */
+
+# define KINETIS_SDRAMALIAS_BASE    0x08000000 /* -0x0fffffff SDRAM (Aliased area). mapped
+                                                *             to same space of 0x88000000 -
+                                                *             0x8FFF_FFFF. See bit31 of
+                                                *             SDRAMC */
+# if defined(KINETIS_FLEXMEM_SIZE)
+#  define KINETIS_FLEXNVM_BASE      0x10000000 /* -0x13ffffff FlexNVM */
+#  define KINETIS_FLEXRAM_BASE      0x14000000 /* -0x17ffffff FlexRAM */
+# else
+#  define KINETIS_PRGACCLRAM_BASE   0x14000000 /* -0x17ffffff For devices with program flash
+                                                *             only: Programming acceleration
+                                                *             RAM */
+# endif
+# define KINETIS_FBALIAS_BASE      0x18000000  /* -0x1bffffff FlexBus (Aliased Area). mapped
+                                                *             to same space of 0x9800_0000 -
+                                                *             0x9BFF_FFFF. See bit31 of
+                                                *             FlexBus chip select */
+# define KINETIS_SRAML_BASE         0x1c000000 /* -0x1fffffff SRAM_L: Lower SRAM
+                                                *             (ICODE/DCODE) */
+# define KINETIS_SRAMU_BASE         0x20000000 /* -0x200fffff SRAM_U: Upper SRAM bitband
+                                                *             region */
+                             /*     0x20100000  * -0x21ffffff Reserved */
+# define KINETIS_SALIAS_BASE        0x22000000 /* -0x23ffffff Aliased to SRAM_U bitband */
+                             /*     0x24000000  * -0x2fffffff Reserved */
+# define KINETIS_FDATALIAS_BASE     0x30000000 /* -0x33ffffff Flash Data Alias */
+# define KINETIS_FLEXNVMCO_BASE     0x34000000 /* -0x3fffffff FlexNVM Cortex-M4 core only */
+# define KINETIS_BRIDGE0_BASE       0x40000000 /* -0x4007ffff Bitband region for peripheral
+                                                *             bridge 0 (AIPS-Lite0) */
+# define KINETIS_BRIDGE1_BASE       0x40080000 /* -0x400fffff Bitband region for peripheral
+                                                *             bridge 1 (AIPS-Lite1) */
+# define KINETIS_GPIOBB_BASE        0x400ff000 /* -0x400fffff Bitband region for general
+                                                *             purpose input/output (GPIO) */
+                             /*     0x40100000  * -0x41ffffff Reserved */
+# define KINETIS_PALIAS_BASE        0x42000000 /* -0x43ffffff Aliased to peripheral bridge
+                                                *             (AIPS-Lite) and general purpose
+                                                *             input/output (GPIO) bitband */
+                             /*     0x44000000  * -0x5fffffff Reserved */
+# define KINETIS_FLEXBUS_BASE       0x60000000 /* -0x7fffffff FlexBus (External Memory - Write-back) */
+# define KINETIS_SDRAMWB_BASE       0x70000000 /* -0x7fffffff SDRAM (External RAM - Write-back) */
+# define KINETIS_SDRAMWT_BASE       0x80000000 /* -0x8fffffff SDRAM (External RAM - Write-through) */
+# define KINETIS_FLEXBUSWT_BASE     0x90000000 /* -0x9fffffff FlexBus (External RAM - Write-through) */
+# define KINETIS_FLEXBUSEP_BASE     0xa0000000 /* -0xdfffffff FlexBus External Peripheral - Not executable)*/
+# define KINETIS_PERIPH_BASE        0xe0000000 /* -0xe00fffff Private peripherals */
+                             /*     0xe0100000  * -0xffffffff Reserved */
+
+/* Peripheral Bridge 0 Memory Map ***************************************************/
+
+# define KINETIS_AIPS0_BASE         0x40000000 /* Peripheral bridge 0 (AIPS-Lite 0) */
+# define KINETIS_XBAR_BASE          0x40004000 /* Crossbar switch */
+# define KINETIS_DMAC_BASE          0x40008000 /* DMA controller */
+# define KINETIS_DMADESC_BASE       0x40009000 /* DMA controller transfer control descriptors */
+# define KINETIS_FLEXBUSC_BASE      0x4000c000 /* FlexBus controller */
+# define KINETIS_MPU_BASE           0x4000d000 /* MPU */
+# define KINETIS_SDRAMC_BASE        0x4000f000 /* SDRAMC */
+# define KINETIS_FMC_BASE           0x4001f000 /* Flash memory controller */
+# define KINETIS_FTFE_BASE          0x40020000 /* Flash memory */
+# define KINETIS_DMAMUX0_BASE       0x40021000 /* DMA channel mutiplexer 0 */
+# define KINETIS_CAN0_BASE          0x40024000 /* FlexCAN 0 */
+# define KINETIS_RNGA_BASE          0x40029000 /* Random Number Generator (RNGA) */
+# define KINETIS_SPI0_BASE          0x4002c000 /* DSPI 0 */
+# define KINETIS_SPI1_BASE          0x4002d000 /* DSPI 1 */
+# define KINETIS_I2S0_BASE          0x4002f000 /* I2S 0 */
+# define KINETIS_CRC_BASE           0x40032000 /* CRC */
+# define KINETIS_USBDCD_BASE        0x40035000 /* USB DCD */
+# define KINETIS_PDB0_BASE          0x40036000 /* Programmable delay block */
+# define KINETIS_PIT_BASE           0x40037000 /* Periodic interrupt timers (PIT) */
+# define KINETIS_FTM0_BASE          0x40038000 /* FlexTimer (FTM) 0 */
+# define KINETIS_FTM1_BASE          0x40039000 /* FlexTimer (FTM) 1 */
+# define KINETIS_FTM2_BASE          0x4003a000 /* FlexTimer (FTM) 2 */
+# define KINETIS_ADC0_BASE          0x4003b000 /* Analog-to-digital converter (ADC) 0 */
+# define KINETIS_RTC_BASE           0x4003d000 /* Real time clock */
+# define KINETIS_VBATR_BASE         0x4003e000 /* VBAT register file */
+# define KINETIS_DAC0_BASE          0x4003f000 /* DAC0 */
+# define KINETIS_LPTMR_BASE         0x40040000 /* Low power timer */
+# define KINETIS_SYSR_BASE          0x40041000 /* System register file */
+# define KINETIS_TSI0_BASE          0x40045000 /* Touch sense interface */
+# define KINETIS_SIMLP_BASE         0x40047000 /* SIM low-power logic */
+# define KINETIS_SIM_BASE           0x40048000 /* System integration module (SIM) */
+# define KINETIS_PORT_BASE(n)       (0x40049000 + ((n) << 12))
+# define KINETIS_PORTA_BASE         0x40049000 /* Port A multiplexing control */
+# define KINETIS_PORTB_BASE         0x4004a000 /* Port B multiplexing control */
+# define KINETIS_PORTC_BASE         0x4004b000 /* Port C multiplexing control */
+# define KINETIS_PORTD_BASE         0x4004c000 /* Port D multiplexing control */
+# define KINETIS_PORTE_BASE         0x4004d000 /* Port E multiplexing control */
+# define KINETIS_WDOG_BASE          0x40052000 /* Software watchdog */
+# define KINETIS_EWM_BASE           0x40061000 /* External watchdog */
+# define KINETIS_CMT_BASE           0x40062000 /* Carrier modulator timer (CMT) */
+# define KINETIS_MCG_BASE           0x40064000 /* Multi-purpose Clock Generator (MCG) */
+# define KINETIS_OSC_BASE           0x40065000 /* System oscillator (XOSC) */
+# define KINETIS_I2C0_BASE          0x40066000 /* I2C 0 */
+# define KINETIS_I2C1_BASE          0x40067000 /* I2C 1 */
+# define KINETIS_UART0_BASE         0x4006a000 /* UART0 */
+# define KINETIS_UART1_BASE         0x4006b000 /* UART1 */
+# define KINETIS_UART2_BASE         0x4006c000 /* UART2 */
+# define KINETIS_UART3_BASE         0x4006d000 /* UART3 */
+# define KINETIS_USB0_BASE          0x40072000 /* USB OTG FS/LS */
+# define KINETIS_CMP_BASE           0x40073000 /* Analog comparator (CMP) / 6-bit digital-to-analog converter (DAC) */
+# define KINETIS_VREF_BASE          0x40074000 /* Voltage reference (VREF) */
+# define KINETIS_LLWU_BASE          0x4007c000 /* Low-leakage wakeup unit (LLWU) */
+# define KINETIS_PMC_BASE           0x4007d000 /* Power management controller (PMC) */
+# define KINETIS_SMC_BASE           0x4007e000 /* System Mode controller (SMC) */
+# define KINETIS_RCM_BASE           0x4007f000 /* Reset Control Module (RCM) */
+
+/* Peripheral Bridge 1 Memory Map ***************************************************/
+
+# define KINETIS_AIPS1_BASE         0x40080000 /* Peripheral bridge 1 (AIPS-Lite 1) */
+# define KINETIS_RNGA_ALT_BASE      0x400a0000 /* Alternate address Random number generator (RNGA) */
+# define KINETIS_USBHS_BASE         0x400a1000 /* USB OTG HS/FS/LS */
+# define KINETIS_USBHSPHY_BASE      0x400a2000 /* USBHS PHY */
+# define KINETIS_USBHSDCD_BASE      0x400a3000 /* USBHS DCD */
+# define KINETIS_CAN1_BASE          0x400a4000 /* FlexCAN 1 */
+# define KINETIS_SPI2_BASE          0x400ac000 /* DSPI 2 */
+# define KINETIS_SDHC_BASE          0x400b1000 /* eSDHC */
+# define KINETIS_FTM2_ALT_BASE      0x400b8000 /* Alternate address FlexTimer 2 */
+# define KINETIS_FTM3_BASE          0x400b9000 /* FlexTimer 3 */
+# define KINETIS_ADC1_BASE          0x400bb000 /* Analog-to-digital converter (ADC) 1 */
+# define KINETIS_EMAC_BASE          0x400c0000 /* Ethernet MAC and IEEE 1588 timers */
+# define KINETIS_LPUART0_BASE       0x400c4000 /* LPUART0 */
+# define KINETIS_TPM1_BASE          0x400c9000 /* TPM1 */
+# define KINETIS_TPM2_BASE          0x400ca000 /* TPM2 */
+# define KINETIS_DAC0_ALT_BASE      0x400cc000 /* Alternate address 12-bit digital-to-analog converter (DAC) 0 */
+# define KINETIS_DAC1_BASE          0x400cd000 /* 12-bit digital-to-analog converter (DAC) 1 */
+# define KINETIS_I2C2_BASE          0x400e6000 /* I2C 2 */
+# define KINETIS_I2C3_BASE          0x400e7000 /* I2C 3 */
+# define KINETIS_UART4_BASE         0x400ea000 /* UART4 */
+# define KINETIS_XBARSS_BASE        0x400ff000 /* Not an AIPS-Lite slot. The 32-bit general
+                                                * purpose input/output module that shares the
+                                                * crossbar switch slave port with the AIPS-Lite
+                                                * is accessed at this address. */
+# define KINETIS_GPIO_BASE(n)       (0x400ff000 + ((n) << 6))
+# define KINETIS_GPIOA_BASE         0x400ff000 /* GPIO PORTA registers */
+# define KINETIS_GPIOB_BASE         0x400ff040 /* GPIO PORTB registers */
+# define KINETIS_GPIOC_BASE         0x400ff080 /* GPIO PORTC registers */
+# define KINETIS_GPIOD_BASE         0x400ff0c0 /* GPIO PORTD registers */
+# define KINETIS_GPIOE_BASE         0x400ff100 /* GPIO PORTE registers */
+
+/* Private Peripheral Bus (PPB) Memory Map ******************************************/
+
+# define KINETIS_ITM_BASE           0xe0000000 /* Instrumentation Trace Macrocell (ITM) */
+# define KINETIS_DWT_BASE           0xe0001000 /* Data Watchpoint and Trace (DWT) */
+# define KINETIS_FPB_BASE           0xe0002000 /* Flash Patch and Breakpoint (FPB) */
+# define KINETIS_SCS_BASE           0xe000e000 /* System Control Space (SCS) (for NVIC) */
+# define KINETIS_TPIU_BASE          0xe0040000 /* Trace Port Interface Unit (TPIU) */
+# define KINETIS_ETM_BASE           0xe0041000 /* Embedded Trace Macrocell (ETM) */
+# define KINETIS_ETB_BASE           0xe0042000 /* Embedded Trace Buffer (ETB) */
+# define KINETIS_TFUN_BASE          0xe0043000 /* Embedded Trace Funnel */
+# define KINETIS_MCM_BASE           0xe0080000 /* Miscellaneous Control Module (including ETB Almost Full) */
+# define KINETIS_MMCAU_BASE         0xe0081000 /* Memory Mapped Cryptographic Acceleration Unit (MMCAU) */
+# define KINETIS_CACHECTL_BASE      0xe0082000 /* Cache Controller */
+# define KINETIS_ROMTAB_BASE        0xe00ff000 /* ROM Table - allows auto-detection of debug components */
+
+#else
+  /* The memory map for other parts is defined in other documents and may or may not
+   * be the same as above (the family members are all very similar)  This error just
+   * means that you have to look at the document and determine for yourself if the
+   * memory map is the same.
+   */
+
+#  error "No memory map for this K66 part"
+#endif
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* KINETIS_K66 */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K66MEMORYMAP_H */
diff --git a/arch/arm/src/kinetis/chip/kinetis_k66pinmux.h b/arch/arm/src/kinetis/chip/kinetis_k66pinmux.h
new file mode 100644
index 0000000000000000000000000000000000000000..b549f5c76d1b1db80644daf20d9407c5e8964199
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_k66pinmux.h
@@ -0,0 +1,764 @@
+/********************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_k66pinmux.h
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_CHP_KINETIS_K66PINMUX_H
+#define __ARCH_ARM_SRC_KINETIS_CHP_KINETIS_K66PINMUX_H
+
+/********************************************************************************************
+ * Included Files
+ ********************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+#ifdef KINETIS_K66
+
+/********************************************************************************************
+ * Pre-processor Definitions
+ ********************************************************************************************/
+/* In most cases, there are alternative configurations for various pins. Those alternative
+ * pins are labeled with a suffix like _1, _2, etc. in order to distinguish them.  Logic in
+ * the board.h file must select the correct pin configuration for the board by defining a pin
+ * configuration (with no suffix) that maps to the correct alternative.
+ *
+ * WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!!
+ * Additional effort is required to select specific GPIO options such as frequency,
+ * open-drain/push-pull, and pull-up/down!  Just the basics are defined for most
+ * pins in the initial version of this file.
+ */
+
+/* ADC */
+
+#define PIN_ADC0_SE4B             (PIN_ANALOG | PIN_PORTC | PIN2)
+#define PIN_ADC0_SE5B             (PIN_ANALOG | PIN_PORTD | PIN1)
+#define PIN_ADC0_SE6B             (PIN_ANALOG | PIN_PORTD | PIN5)
+#define PIN_ADC0_SE7B             (PIN_ANALOG | PIN_PORTD | PIN6)
+#define PIN_ADC0_SE8              (PIN_ANALOG | PIN_PORTB | PIN0)
+#define PIN_ADC0_SE9              (PIN_ANALOG | PIN_PORTB | PIN1)
+#define PIN_ADC0_SE10             (PIN_ANALOG | PIN_PORTA | PIN7)
+#define PIN_ADC0_SE11             (PIN_ANALOG | PIN_PORTA | PIN8)
+#define PIN_ADC0_SE12             (PIN_ANALOG | PIN_PORTB | PIN2)
+#define PIN_ADC0_SE13             (PIN_ANALOG | PIN_PORTB | PIN3)
+#define PIN_ADC0_SE14             (PIN_ANALOG | PIN_PORTC | PIN0)
+#define PIN_ADC0_SE15             (PIN_ANALOG | PIN_PORTC | PIN1)
+#define PIN_ADC0_SE17             (PIN_ANALOG | PIN_PORTE | PIN24)
+#define PIN_ADC0_SE18             (PIN_ANALOG | PIN_PORTE | PIN25)
+
+#define PIN_ADC1_SE4A             (PIN_ANALOG | PIN_PORTE | PIN0)
+#define PIN_ADC1_SE4B             (PIN_ANALOG | PIN_PORTC | PIN8)
+#define PIN_ADC1_SE5A             (PIN_ANALOG | PIN_PORTE | PIN1)
+#define PIN_ADC1_SE5B             (PIN_ANALOG | PIN_PORTC | PIN9)
+#define PIN_ADC1_SE6A             (PIN_ANALOG | PIN_PORTE | PIN2)
+#define PIN_ADC1_SE6B             (PIN_ANALOG | PIN_PORTC | PIN10)
+#define PIN_ADC1_SE7A             (PIN_ANALOG | PIN_PORTE | PIN3)
+#define PIN_ADC1_SE7B             (PIN_ANALOG | PIN_PORTC | PIN11)
+#define PIN_ADC1_SE8              (PIN_ANALOG | PIN_PORTB | PIN0)
+#define PIN_ADC1_SE9              (PIN_ANALOG | PIN_PORTB | PIN1)
+#define PIN_ADC1_SE10             (PIN_ANALOG | PIN_PORTB | PIN4)
+#define PIN_ADC1_SE11             (PIN_ANALOG | PIN_PORTB | PIN5)
+#define PIN_ADC1_SE12             (PIN_ANALOG | PIN_PORTB | PIN6)
+#define PIN_ADC1_SE13             (PIN_ANALOG | PIN_PORTB | PIN7)
+#define PIN_ADC1_SE14             (PIN_ANALOG | PIN_PORTB | PIN10)
+#define PIN_ADC1_SE15             (PIN_ANALOG | PIN_PORTB | PIN11)
+#define PIN_ADC1_SE17             (PIN_ANALOG | PIN_PORTA | PIN17)
+
+/* CAN */
+
+#define PIN_CAN0_RX_1             (PIN_ALT2   | PIN_PORTA | PIN13)
+#define PIN_CAN0_RX_2             (PIN_ALT2   | PIN_PORTB | PIN19)
+#define PIN_CAN0_TX_1             (PIN_ALT2   | PIN_PORTA | PIN12)
+#define PIN_CAN0_TX_2             (PIN_ALT2   | PIN_PORTB | PIN18)
+
+#define PIN_CAN1_TX_1             (PIN_ALT2   | PIN_PORTE | PIN24)
+#define PIN_CAN1_TX_2             (PIN_ALT2   | PIN_PORTC | PIN17)
+#define PIN_CAN1_RX_1             (PIN_ALT2   | PIN_PORTE | PIN25)
+#define PIN_CAN1_RX_2             (PIN_ALT2   | PIN_PORTC | PIN16)
+
+/* Output clock */
+
+#define PIN_CLKOUT_1              (PIN_ALT5   | PIN_PORTA | PIN6)
+#define PIN_CLKOUT_2              (PIN_ALT5   | PIN_PORTC | PIN3)
+
+/* Comparators */
+
+#define PIN_CMP0_IN0              (PIN_ANALOG | PIN_PORTC | PIN6)
+#define PIN_CMP0_IN1              (PIN_ANALOG | PIN_PORTC | PIN7)
+#define PIN_CMP0_IN2              (PIN_ANALOG | PIN_PORTC | PIN8)
+#define PIN_CMP0_IN3              (PIN_ANALOG | PIN_PORTC | PIN9)
+#define PIN_CMP0_OUT_1            (PIN_ALT6   | PIN_PORTB | PIN20)
+#define PIN_CMP0_OUT_2            (PIN_ALT6   | PIN_PORTC | PIN5)
+
+#define PIN_CMP1_IN0              (PIN_ANALOG | PIN_PORTC | PIN2)
+#define PIN_CMP1_IN1              (PIN_ANALOG | PIN_PORTC | PIN3)
+#define PIN_CMP1_OUT_1            (PIN_ALT6   | PIN_PORTB | PIN21)
+#define PIN_CMP1_OUT_2            (PIN_ALT6   | PIN_PORTC | PIN4)
+
+#define PIN_CMP2_IN0              (PIN_ANALOG | PIN_PORTA | PIN12)
+#define PIN_CMP2_IN1              (PIN_ANALOG | PIN_PORTA | PIN13)
+#define PIN_CMP2_OUT_1            (PIN_ALT5   | PIN_PORTA | PIN5)
+#define PIN_CMP2_OUT_2            (PIN_ALT6   | PIN_PORTB | PIN22)
+
+#define PIN_CMP3_IN1              (PIN_ANALOG | PIN_PORTA | PIN15)
+#define PIN_CMP3_IN2              (PIN_ANALOG | PIN_PORTA | PIN16)
+#define PIN_CMP3_IN4              (PIN_ANALOG | PIN_PORTA | PIN24)
+#define PIN_CMP3_IN5              (PIN_ANALOG | PIN_PORTA | PIN25)
+#define PIN_CMP3_OUT_1            (PIN_ALT6   | PIN_PORTB | PIN23)
+
+/* Carrier Modulator Transmittor (CMT) */
+
+#define PIN_CMT_IRO               (PIN_ALT2   | PIN_PORTD | PIN7)
+
+/* Ethernet */
+
+#define PIN_ENET_1588_CLKIN       (PIN_ALT2   | PIN_PORTE | PIN26)
+#define PIN_ENET0_1588_TMR0_1     (PIN_ALT4   | PIN_PORTB | PIN2)
+#define PIN_ENET0_1588_TMR0_2     (PIN_ALT4   | PIN_PORTC | PIN16)
+#define PIN_ENET0_1588_TMR1_1     (PIN_ALT4   | PIN_PORTB | PIN3)
+#define PIN_ENET0_1588_TMR1_2     (PIN_ALT4   | PIN_PORTC | PIN17)
+#define PIN_ENET0_1588_TMR2_1     (PIN_ALT4   | PIN_PORTB | PIN4)
+#define PIN_ENET0_1588_TMR2_2     (PIN_ALT4   | PIN_PORTC | PIN18)
+#define PIN_ENET0_1588_TMR3_1     (PIN_ALT4   | PIN_PORTB | PIN5)
+#define PIN_ENET0_1588_TMR3_2     (PIN_ALT4   | PIN_PORTC | PIN19)
+
+/* External Watchdog Monitor (EWM) */
+
+#define PIN_EWM_IN_1              (PIN_ALT6   | PIN_PORTB | PIN16)
+#define PIN_EWM_IN_2              (PIN_ALT6   | PIN_PORTD | PIN4)
+#define PIN_EWM_IN_3              (PIN_ALT6   | PIN_PORTE | PIN25)
+#define PIN_EWM_OUT_1             (PIN_ALT6   | PIN_PORTB | PIN17)
+#define PIN_EWM_OUT_2             (PIN_ALT6   | PIN_PORTD | PIN5)
+#define PIN_EWM_OUT_3             (PIN_ALT6   | PIN_PORTE | PIN24)
+
+/* FlexBus */
+
+#define PIN_FB_A16                (PIN_ALT6   | PIN_PORTD | PIN8)
+#define PIN_FB_A17                (PIN_ALT6   | PIN_PORTD | PIN9)
+#define PIN_FB_A18                (PIN_ALT6   | PIN_PORTD | PIN10)
+#define PIN_FB_A19                (PIN_ALT6   | PIN_PORTD | PIN11)
+#define PIN_FB_A20                (PIN_ALT6   | PIN_PORTD | PIN12)
+#define PIN_FB_A21                (PIN_ALT6   | PIN_PORTD | PIN13)
+#define PIN_FB_A22                (PIN_ALT6   | PIN_PORTD | PIN14)
+#define PIN_FB_A23                (PIN_ALT6   | PIN_PORTD | PIN15)
+#define PIN_FB_A24                (PIN_ALT6   | PIN_PORTA | PIN29)
+#define PIN_FB_A25                (PIN_ALT6   | PIN_PORTA | PIN28)
+#define PIN_FB_A26                (PIN_ALT6   | PIN_PORTA | PIN27)
+#define PIN_FB_A27                (PIN_ALT6   | PIN_PORTA | PIN26)
+#define PIN_FB_A28                (PIN_ALT6   | PIN_PORTA | PIN25)
+#define PIN_FB_A29                (PIN_ALT6   | PIN_PORTA | PIN24)
+#define PIN_FB_AD0                (PIN_ALT5   | PIN_PORTD | PIN6)
+#define PIN_FB_AD1                (PIN_ALT5   | PIN_PORTD | PIN5)
+#define PIN_FB_AD2                (PIN_ALT5   | PIN_PORTD | PIN4)
+#define PIN_FB_AD3                (PIN_ALT5   | PIN_PORTD | PIN3)
+#define PIN_FB_AD4                (PIN_ALT5   | PIN_PORTD | PIN2)
+#define PIN_FB_AD5                (PIN_ALT5   | PIN_PORTC | PIN10)
+#define PIN_FB_AD6                (PIN_ALT5   | PIN_PORTC | PIN9)
+#define PIN_FB_AD7                (PIN_ALT5   | PIN_PORTC | PIN8)
+#define PIN_FB_AD8                (PIN_ALT5   | PIN_PORTC | PIN7)
+#define PIN_FB_AD9                (PIN_ALT5   | PIN_PORTC | PIN6)
+#define PIN_FB_AD10               (PIN_ALT5   | PIN_PORTC | PIN5)
+#define PIN_FB_AD11               (PIN_ALT5   | PIN_PORTC | PIN4)
+#define PIN_FB_AD12               (PIN_ALT5   | PIN_PORTC | PIN2)
+#define PIN_FB_AD13               (PIN_ALT5   | PIN_PORTC | PIN1)
+#define PIN_FB_AD14               (PIN_ALT5   | PIN_PORTC | PIN0)
+#define PIN_FB_AD15               (PIN_ALT5   | PIN_PORTB | PIN18)
+#define PIN_FB_AD16               (PIN_ALT5   | PIN_PORTB | PIN17)
+#define PIN_FB_AD17               (PIN_ALT5   | PIN_PORTB | PIN16)
+#define PIN_FB_AD18               (PIN_ALT5   | PIN_PORTB | PIN11)
+#define PIN_FB_AD19               (PIN_ALT5   | PIN_PORTB | PIN10)
+#define PIN_FB_AD20               (PIN_ALT5   | PIN_PORTB | PIN9)
+#define PIN_FB_AD21               (PIN_ALT5   | PIN_PORTB | PIN8)
+#define PIN_FB_AD22               (PIN_ALT5   | PIN_PORTB | PIN7)
+#define PIN_FB_AD23               (PIN_ALT5   | PIN_PORTB | PIN6)
+#define PIN_FB_AD24               (PIN_ALT5   | PIN_PORTC | PIN15)
+#define PIN_FB_AD25               (PIN_ALT5   | PIN_PORTC | PIN14)
+#define PIN_FB_AD26               (PIN_ALT5   | PIN_PORTC | PIN13)
+#define PIN_FB_AD27               (PIN_ALT5   | PIN_PORTC | PIN12)
+#define PIN_FB_AD28               (PIN_ALT5   | PIN_PORTB | PIN23)
+#define PIN_FB_AD29               (PIN_ALT5   | PIN_PORTB | PIN22)
+#define PIN_FB_AD30               (PIN_ALT5   | PIN_PORTB | PIN21)
+#define PIN_FB_AD31               (PIN_ALT5   | PIN_PORTB | PIN20)
+#define PIN_FB_ALE                (PIN_ALT5   | PIN_PORTD | PIN0)
+#define PIN_FB_BE15_8_BLS23_16    (PIN_ALT5   | PIN_PORTC | PIN18)
+#define PIN_FB_BE23_16_BLS15_8    (PIN_ALT5   | PIN_PORTC | PIN16)
+#define PIN_FB_BE31_24_BLS7_0     (PIN_ALT5   | PIN_PORTC | PIN17)
+#define PIN_FB_BE7_0_BLS31_24     (PIN_ALT5   | PIN_PORTC | PIN19)
+#define PIN_FB_CS0                (PIN_ALT5   | PIN_PORTD | PIN1)
+#define PIN_FB_CS1                (PIN_ALT5   | PIN_PORTD | PIN0)
+#define PIN_FB_CS2                (PIN_ALT5   | PIN_PORTC | PIN18)
+#define PIN_FB_CS3                (PIN_ALT5   | PIN_PORTC | PIN19)
+#define PIN_FB_CS4                (PIN_ALT5   | PIN_PORTC | PIN17)
+#define PIN_FB_CS5                (PIN_ALT5   | PIN_PORTC | PIN16)
+#define PIN_FB_OE                 (PIN_ALT5   | PIN_PORTB | PIN19)
+#define PIN_FB_RW                 (PIN_ALT5   | PIN_PORTC | PIN11)
+#define PIN_FB_TA                 (PIN_ALT6   | PIN_PORTC | PIN19)
+#define PIN_FB_TBST               (PIN_ALT5   | PIN_PORTC | PIN18)
+#define PIN_FB_TS                 (PIN_ALT5   | PIN_PORTD | PIN0)
+#define PIN_FB_TSIZ0              (PIN_ALT5   | PIN_PORTC | PIN17)
+#define PIN_FB_TSIZ1              (PIN_ALT5   | PIN_PORTC | PIN16)
+
+/* FlexTimer Module (FTM) */
+
+#define PIN_FTM_CLKIN0_1          (PIN_ALT4   | PIN_PORTA | PIN18)
+#define PIN_FTM_CLKIN0_2          (PIN_ALT4   | PIN_PORTB | PIN16)
+#define PIN_FTM_CLKIN0_3          (PIN_ALT4   | PIN_PORTC | PIN12)
+#define PIN_FTM_CLKIN1_1          (PIN_ALT4   | PIN_PORTA | PIN19)
+#define PIN_FTM_CLKIN1_2          (PIN_ALT4   | PIN_PORTB | PIN17)
+#define PIN_FTM_CLKIN1_3          (PIN_ALT4   | PIN_PORTC | PIN13)
+
+#define PIN_FTM0_CH0_1            (PIN_ALT3   | PIN_PORTA | PIN3)
+#define PIN_FTM0_CH0_2            (PIN_ALT4   | PIN_PORTC | PIN1)
+#define PIN_FTM0_CH1_1            (PIN_ALT3   | PIN_PORTA | PIN4)
+#define PIN_FTM0_CH1_2            (PIN_ALT4   | PIN_PORTC | PIN2)
+#define PIN_FTM0_CH2_1            (PIN_ALT3   | PIN_PORTA | PIN5)
+#define PIN_FTM0_CH2_2            (PIN_ALT4   | PIN_PORTC | PIN3)
+#define PIN_FTM0_CH2_3            (PIN_ALT7   | PIN_PORTC | PIN5)
+#define PIN_FTM0_CH3_1            (PIN_ALT3   | PIN_PORTA | PIN6)
+#define PIN_FTM0_CH3_2            (PIN_ALT4   | PIN_PORTC | PIN4)
+#define PIN_FTM0_CH4_1            (PIN_ALT3   | PIN_PORTA | PIN7)
+#define PIN_FTM0_CH4_2            (PIN_ALT4   | PIN_PORTB | PIN12)
+#define PIN_FTM0_CH4_3            (PIN_ALT4   | PIN_PORTD | PIN4)
+#define PIN_FTM0_CH5_1            (PIN_ALT3   | PIN_PORTA | PIN0)
+#define PIN_FTM0_CH5_2            (PIN_ALT4   | PIN_PORTB | PIN13)
+#define PIN_FTM0_CH5_3            (PIN_ALT4   | PIN_PORTD | PIN5)
+#define PIN_FTM0_CH6_1            (PIN_ALT3   | PIN_PORTA | PIN1)
+#define PIN_FTM0_CH6_2            (PIN_ALT4   | PIN_PORTD | PIN6)
+#define PIN_FTM0_CH7_1            (PIN_ALT3   | PIN_PORTA | PIN2)
+#define PIN_FTM0_CH7_2            (PIN_ALT4   | PIN_PORTD | PIN7)
+#define PIN_FTM0_FLT0_1           (PIN_ALT6   | PIN_PORTB | PIN3)
+#define PIN_FTM0_FLT0_2           (PIN_ALT6   | PIN_PORTD | PIN6)
+#define PIN_FTM0_FLT1_1           (PIN_ALT6   | PIN_PORTB | PIN10)
+#define PIN_FTM0_FLT1_2           (PIN_ALT6   | PIN_PORTD | PIN7)
+#define PIN_FTM0_FLT2_1           (PIN_ALT3   | PIN_PORTA | PIN18)
+#define PIN_FTM0_FLT2_2           (PIN_ALT6   | PIN_PORTB | PIN11)
+#define PIN_FTM0_FLT3             (PIN_ALT6   | PIN_PORTB | PIN2)
+
+#define PIN_FTM1_CH0_1            (PIN_ALT3   | PIN_PORTA | PIN12)
+#define PIN_FTM1_CH0_2            (PIN_ALT3   | PIN_PORTA | PIN8)
+#define PIN_FTM1_CH0_3            (PIN_ALT3   | PIN_PORTB | PIN0)
+#define PIN_FTM1_CH0_4            (PIN_ALT3   | PIN_PORTB | PIN12)
+#define PIN_FTM1_CH1_1            (PIN_ALT3   | PIN_PORTA | PIN13)
+#define PIN_FTM1_CH1_2            (PIN_ALT3   | PIN_PORTA | PIN9)
+#define PIN_FTM1_CH1_3            (PIN_ALT3   | PIN_PORTB | PIN1)
+#define PIN_FTM1_CH1_4            (PIN_ALT3   | PIN_PORTB | PIN13)
+#define PIN_FTM1_FLT0_1           (PIN_ALT3   | PIN_PORTA | PIN19)
+#define PIN_FTM1_FLT0_2           (PIN_ALT6   | PIN_PORTB | PIN4)
+#define PIN_FTM1_QD_PHA_1         (PIN_ALT6   | PIN_PORTA | PIN8)
+#define PIN_FTM1_QD_PHA_2         (PIN_ALT6   | PIN_PORTB | PIN0)
+#define PIN_FTM1_QD_PHA_3         (PIN_ALT6   | PIN_PORTB | PIN12)
+#define PIN_FTM1_QD_PHA_4         (PIN_ALT7   | PIN_PORTA | PIN12)
+#define PIN_FTM1_QD_PHB_1         (PIN_ALT6   | PIN_PORTA | PIN9)
+#define PIN_FTM1_QD_PHB_2         (PIN_ALT6   | PIN_PORTB | PIN1)
+#define PIN_FTM1_QD_PHB_3         (PIN_ALT6   | PIN_PORTB | PIN13)
+#define PIN_FTM1_QD_PHB_4         (PIN_ALT7   | PIN_PORTA | PIN13)
+
+#define PIN_FTM2_CH0_1            (PIN_ALT3   | PIN_PORTA | PIN10)
+#define PIN_FTM2_CH0_2            (PIN_ALT3   | PIN_PORTB | PIN18)
+#define PIN_FTM2_CH1_1            (PIN_ALT3   | PIN_PORTA | PIN11)
+#define PIN_FTM2_CH1_2            (PIN_ALT3   | PIN_PORTB | PIN19)
+#define PIN_FTM2_FLT0_1           (PIN_ALT6   | PIN_PORTB | PIN5)
+#define PIN_FTM2_FLT0_2           (PIN_ALT6   | PIN_PORTC | PIN9)
+#define PIN_FTM2_QD_PHA_1         (PIN_ALT6   | PIN_PORTA | PIN10)
+#define PIN_FTM2_QD_PHA_2         (PIN_ALT6   | PIN_PORTB | PIN18)
+#define PIN_FTM2_QD_PHB_1         (PIN_ALT6   | PIN_PORTA | PIN11)
+#define PIN_FTM2_QD_PHB_2         (PIN_ALT6   | PIN_PORTB | PIN19)
+
+#define PIN_FTM3_CH0_1            (PIN_ALT4   | PIN_PORTD | PIN0)
+#define PIN_FTM3_CH0_2            (PIN_ALT6   | PIN_PORTE | PIN5)
+#define PIN_FTM3_CH1_1            (PIN_ALT4   | PIN_PORTD | PIN1)
+#define PIN_FTM3_CH1_2            (PIN_ALT6   | PIN_PORTE | PIN6)
+#define PIN_FTM3_CH2_1            (PIN_ALT4   | PIN_PORTD | PIN2)
+#define PIN_FTM3_CH2_2            (PIN_ALT6   | PIN_PORTE | PIN7)
+#define PIN_FTM3_CH3_1            (PIN_ALT4   | PIN_PORTD | PIN3)
+#define PIN_FTM3_CH3_2            (PIN_ALT6   | PIN_PORTE | PIN8)
+#define PIN_FTM3_CH4_1            (PIN_ALT3   | PIN_PORTC | PIN8)
+#define PIN_FTM3_CH4_2            (PIN_ALT6   | PIN_PORTE | PIN9)
+#define PIN_FTM3_CH5_1            (PIN_ALT3   | PIN_PORTC | PIN9)
+#define PIN_FTM3_CH5_2            (PIN_ALT6   | PIN_PORTE | PIN10)
+#define PIN_FTM3_CH6_1            (PIN_ALT3   | PIN_PORTC | PIN10)
+#define PIN_FTM3_CH6_2            (PIN_ALT6   | PIN_PORTE | PIN11)
+#define PIN_FTM3_CH7_1            (PIN_ALT3   | PIN_PORTC | PIN11)
+#define PIN_FTM3_CH7_2            (PIN_ALT6   | PIN_PORTE | PIN12)
+#define PIN_FTM3_FLT0_1           (PIN_ALT3   | PIN_PORTD | PIN12)
+#define PIN_FTM3_FLT0_2           (PIN_ALT6   | PIN_PORTC | PIN12)
+
+/* I2C */
+
+#define PIN_I2C0_SCL_1            (PIN_ALT2   | PIN_PORTB | PIN0)
+#define PIN_I2C0_SCL_2            (PIN_ALT2   | PIN_PORTB | PIN2)
+#define PIN_I2C0_SCL_3            (PIN_ALT2   | PIN_PORTD | PIN8)
+#define PIN_I2C0_SCL_4            (PIN_ALT5   | PIN_PORTE | PIN24)
+#define PIN_I2C0_SCL_5            (PIN_ALT7   | PIN_PORTD | PIN2)
+#define PIN_I2C0_SDA_1            (PIN_ALT2   | PIN_PORTB | PIN1)
+#define PIN_I2C0_SDA_2            (PIN_ALT2   | PIN_PORTB | PIN3)
+#define PIN_I2C0_SDA_3            (PIN_ALT2   | PIN_PORTD | PIN9)
+#define PIN_I2C0_SDA_4            (PIN_ALT5   | PIN_PORTE | PIN25)
+#define PIN_I2C0_SDA_5            (PIN_ALT7   | PIN_PORTD | PIN3)
+
+#define PIN_I2C1_SCL_1            (PIN_ALT2   | PIN_PORTC | PIN10)
+#define PIN_I2C1_SCL_2            (PIN_ALT6   | PIN_PORTE | PIN1)
+#define PIN_I2C1_SDA_1            (PIN_ALT2   | PIN_PORTC | PIN11)
+#define PIN_I2C1_SDA_2            (PIN_ALT6   | PIN_PORTE | PIN0)
+
+#define PIN_I2C2_SCL_1            (PIN_ALT5   | PIN_PORTA | PIN12)
+#define PIN_I2C2_SCL_2            (PIN_ALT5   | PIN_PORTA | PIN14)
+#define PIN_I2C2_SDA_1            (PIN_ALT5   | PIN_PORTA | PIN11)
+#define PIN_I2C2_SDA_2            (PIN_ALT5   | PIN_PORTA | PIN13)
+
+#define PIN_I2C3_SCL_1            (PIN_ALT2   | PIN_PORTE | PIN11)
+#define PIN_I2C3_SCL_2            (PIN_ALT4   | PIN_PORTA | PIN2)
+#define PIN_I2C3_SDA_1            (PIN_ALT2   | PIN_PORTE | PIN10)
+#define PIN_I2C3_SDA_2            (PIN_ALT4   | PIN_PORTA | PIN1)
+
+/* I2S */
+
+#define PIN_I2S0_MCLK_1           (PIN_ALT4   | PIN_PORTC | PIN8)
+#define PIN_I2S0_MCLK_2           (PIN_ALT4   | PIN_PORTE | PIN6)
+#define PIN_I2S0_MCLK_3           (PIN_ALT6   | PIN_PORTA | PIN17)
+#define PIN_I2S0_MCLK_4           (PIN_ALT6   | PIN_PORTC | PIN6)
+#define PIN_I2S0_RX_BCLK_1        (PIN_ALT4   | PIN_PORTC | PIN6)
+#define PIN_I2S0_RX_BCLK_2        (PIN_ALT4   | PIN_PORTC | PIN9)
+#define PIN_I2S0_RX_BCLK_3        (PIN_ALT4   | PIN_PORTE | PIN9)
+#define PIN_I2S0_RX_BCLK_4        (PIN_ALT6   | PIN_PORTA | PIN14)
+#define PIN_I2S0_RX_FS_1          (PIN_ALT4   | PIN_PORTC | PIN10)
+#define PIN_I2S0_RX_FS_2          (PIN_ALT4   | PIN_PORTC | PIN7)
+#define PIN_I2S0_RX_FS_3          (PIN_ALT4   | PIN_PORTE | PIN8)
+#define PIN_I2S0_RX_FS_4          (PIN_ALT6   | PIN_PORTA | PIN16)
+#define PIN_I2S0_RXD0_1           (PIN_ALT4   | PIN_PORTC | PIN5)
+#define PIN_I2S0_RXD0_2           (PIN_ALT4   | PIN_PORTE | PIN7)
+#define PIN_I2S0_RXD0_3           (PIN_ALT6   | PIN_PORTA | PIN15)
+#define PIN_I2S0_RXD1_1           (PIN_ALT2   | PIN_PORTE | PIN8)
+#define PIN_I2S0_RXD1_2           (PIN_ALT4   | PIN_PORTC | PIN11)
+#define PIN_I2S0_RXD1_3           (PIN_ALT7   | PIN_PORTA | PIN16)
+#define PIN_I2S0_TX_BCLK_1        (PIN_ALT4   | PIN_PORTB | PIN18)
+#define PIN_I2S0_TX_BCLK_2        (PIN_ALT4   | PIN_PORTE | PIN12)
+#define PIN_I2S0_TX_BCLK_3        (PIN_ALT6   | PIN_PORTA | PIN5)
+#define PIN_I2S0_TX_BCLK_4        (PIN_ALT6   | PIN_PORTC | PIN3)
+#define PIN_I2S0_TX_FS_1          (PIN_ALT4   | PIN_PORTB | PIN19)
+#define PIN_I2S0_TX_FS_2          (PIN_ALT4   | PIN_PORTE | PIN11)
+#define PIN_I2S0_TX_FS_3          (PIN_ALT6   | PIN_PORTA | PIN13)
+#define PIN_I2S0_TX_FS_4          (PIN_ALT6   | PIN_PORTC | PIN2)
+#define PIN_I2S0_TXD0_1           (PIN_ALT4   | PIN_PORTE | PIN10)
+#define PIN_I2S0_TXD0_2           (PIN_ALT6   | PIN_PORTA | PIN12)
+#define PIN_I2S0_TXD0_3           (PIN_ALT6   | PIN_PORTC | PIN1)
+#define PIN_I2S0_TXD1_1           (PIN_ALT2   | PIN_PORTE | PIN9)
+#define PIN_I2S0_TXD1_2           (PIN_ALT6   | PIN_PORTC | PIN0)
+#define PIN_I2S0_TXD1_3           (PIN_ALT7   | PIN_PORTA | PIN14)
+
+/* JTAG */
+
+#define PIN_JTAG_TCLK             (PIN_ALT7   | PIN_PORTA | PIN0)
+#define PIN_JTAG_TDI              (PIN_ALT7   | PIN_PORTA | PIN1)
+#define PIN_JTAG_TDO              (PIN_ALT7   | PIN_PORTA | PIN2)
+#define PIN_JTAG_TMS              (PIN_ALT7   | PIN_PORTA | PIN3)
+#define PIN_JTAG_TRST             (PIN_ALT7   | PIN_PORTA | PIN5)
+
+/* Low-leakage wakeup module (LLWU, actually GPIO configurations) */
+
+#define PIN_LLWU_P0               (PIN_ALT1   | PIN_PORTE | PIN1)
+#define PIN_LLWU_P1               (PIN_ALT1   | PIN_PORTE | PIN2)
+#define PIN_LLWU_P2               (PIN_ALT1   | PIN_PORTE | PIN4)
+#define PIN_LLWU_P3               (PIN_ALT1   | PIN_PORTA | PIN4)
+#define PIN_LLWU_P4               (PIN_ALT1   | PIN_PORTA | PIN13)
+#define PIN_LLWU_P5               (PIN_ALT1   | PIN_PORTB | PIN0)
+#define PIN_LLWU_P6               (PIN_ALT1   | PIN_PORTC | PIN1)
+#define PIN_LLWU_P7               (PIN_ALT1   | PIN_PORTC | PIN3)
+#define PIN_LLWU_P8               (PIN_ALT1   | PIN_PORTC | PIN4)
+#define PIN_LLWU_P9               (PIN_ALT1   | PIN_PORTC | PIN5)
+#define PIN_LLWU_P10              (PIN_ALT1   | PIN_PORTC | PIN6)
+#define PIN_LLWU_P11              (PIN_ALT1   | PIN_PORTC | PIN11)
+#define PIN_LLWU_P12              (PIN_ALT1   | PIN_PORTD | PIN0)
+#define PIN_LLWU_P13              (PIN_ALT1   | PIN_PORTD | PIN2)
+#define PIN_LLWU_P14              (PIN_ALT1   | PIN_PORTD | PIN4)
+#define PIN_LLWU_P15              (PIN_ALT1   | PIN_PORTD | PIN6)
+#define PIN_LLWU_P16              (PIN_ALT1   | PIN_PORTE | PIN6)
+#define PIN_LLWU_P17              (PIN_ALT1   | PIN_PORTE | PIN9)
+#define PIN_LLWU_P18              (PIN_ALT1   | PIN_PORTE | PIN10)
+#define PIN_LLWU_P21              (PIN_ALT1   | PIN_PORTE | PIN25)
+#define PIN_LLWU_P22              (PIN_ALT1   | PIN_PORTA | PIN10)
+#define PIN_LLWU_P23              (PIN_ALT1   | PIN_PORTA | PIN11)
+#define PIN_LLWU_P24              (PIN_ALT1   | PIN_PORTD | PIN8)
+#define PIN_LLWU_P25              (PIN_ALT1   | PIN_PORTD | PIN11)
+
+/* Low-Power Timer (LPTMR) */
+
+#define PIN_LPTMR0_ALT1           (PIN_ALT6   | PIN_PORTA | PIN19)
+#define PIN_LPTMR0_ALT2           (PIN_ALT3   | PIN_PORTC | PIN5)
+
+/* MII */
+
+#define PIN_MII0_COL              (PIN_ALT4   | PIN_PORTA | PIN29)
+#define PIN_MII0_CRS              (PIN_ALT4   | PIN_PORTA | PIN27)
+#define PIN_MII0_MDC_1            (PIN_ALT4   | PIN_PORTB | PIN1)
+#define PIN_MII0_MDC_2            (PIN_ALT5   | PIN_PORTA | PIN8)
+#ifdef CONFIG_KINETIS_ENET_MDIOPULLUP
+#  define PIN_MII0_MDIO_1         (PIN_ALT4_PULLUP | PIN_PORTB | PIN0)
+#  define PIN_MII0_MDIO_2         (PIN_ALT5_PULLUP | PIN_PORTA | PIN7)
+#else
+#  define PIN_MII0_MDIO_1         (PIN_ALT4   | PIN_PORTB | PIN0)
+#  define PIN_MII0_MDIO_2         (PIN_ALT5   | PIN_PORTA | PIN7)
+#endif
+#define PIN_MII0_RXCLK            (PIN_ALT4   | PIN_PORTA | PIN11)
+#define PIN_MII0_RXD0             (PIN_ALT4   | PIN_PORTA | PIN13)
+#define PIN_MII0_RXD1             (PIN_ALT4   | PIN_PORTA | PIN12)
+#define PIN_MII0_RXD2             (PIN_ALT4   | PIN_PORTA | PIN10)
+#define PIN_MII0_RXD3             (PIN_ALT4   | PIN_PORTA | PIN9)
+#define PIN_MII0_RXDV             (PIN_ALT4   | PIN_PORTA | PIN14)
+#ifdef CONFIG_KINETIS_ENET_NORXER
+#  define PIN_MII0_RXER           (GPIO_PULLDOWN | PIN_PORTA | PIN5)
+#else
+#  define PIN_MII0_RXER           (PIN_ALT4   | PIN_PORTA | PIN5)
+#endif
+#define PIN_MII0_TXCLK            (PIN_ALT4   | PIN_PORTA | PIN25)
+#define PIN_MII0_TXD0             (PIN_ALT4   | PIN_PORTA | PIN16)
+#define PIN_MII0_TXD1             (PIN_ALT4   | PIN_PORTA | PIN17)
+#define PIN_MII0_TXD2             (PIN_ALT4   | PIN_PORTA | PIN24)
+#define PIN_MII0_TXD3             (PIN_ALT4   | PIN_PORTA | PIN26)
+#define PIN_MII0_TXEN             (PIN_ALT4   | PIN_PORTA | PIN15)
+#define PIN_MII0_TXER             (PIN_ALT4   | PIN_PORTA | PIN28)
+
+/* NMI */
+
+#define PIN_NMI                   (PIN_ALT7   | PIN_PORTA | PIN4)
+
+/* Programmable Delay Block (PDB) */
+
+#define PIN_PDB0_EXTRG_1          (PIN_ALT3   | PIN_PORTC | PIN0)
+#define PIN_PDB0_EXTRG_2          (PIN_ALT3   | PIN_PORTC | PIN6)
+
+/* RMII */
+
+#define PIN_RMII0_CRS_DV          (PIN_ALT4   | PIN_PORTA | PIN14)
+#define PIN_RMII0_MDC_1           (PIN_ALT4   | PIN_PORTB | PIN1)
+#define PIN_RMII0_MDC_2           (PIN_ALT5   | PIN_PORTA | PIN8)
+#ifdef CONFIG_KINETIS_ENET_MDIOPULLUP
+#  define PIN_RMII0_MDIO_1        (PIN_ALT4_PULLUP | PIN_PORTB | PIN0)
+#  define PIN_RMII0_MDIO_2        (PIN_ALT5_PULLUP | PIN_PORTA | PIN7)
+#else
+#  define PIN_RMII0_MDIO_1        (PIN_ALT4   | PIN_PORTB | PIN0)
+#  define PIN_RMII0_MDIO_2        (PIN_ALT5   | PIN_PORTA | PIN7)
+#endif
+#define PIN_RMII0_RXD0            (PIN_ALT4   | PIN_PORTA | PIN13)
+#define PIN_RMII0_RXD1            (PIN_ALT4   | PIN_PORTA | PIN12)
+#ifdef CONFIG_KINETIS_ENET_NORXER
+#  define PIN_RMII0_RXER          (GPIO_PULLDOWN | PIN_PORTA | PIN5)
+#else
+#  define PIN_RMII0_RXER          (PIN_ALT4   | PIN_PORTA | PIN5)
+#endif
+#define PIN_RMII0_TXD0            (PIN_ALT4   | PIN_PORTA | PIN16)
+#define PIN_RMII0_TXD1            (PIN_ALT4   | PIN_PORTA | PIN17)
+#define PIN_RMII0_TXEN            (PIN_ALT4   | PIN_PORTA | PIN15)
+
+/* Real-Time Clock (RTC) */
+
+#define PIN_RTC_CLKOUT_1          (PIN_ALT6   | PIN_PORTE | PIN26)
+#define PIN_RTC_CLKOUT_2          (PIN_ALT7   | PIN_PORTE | PIN0)
+
+/* Synchronous DRAM Controller Module (SDRAM) */
+
+#define PIN_SDRAM_CAS_B           (PIN_ALT5   | PIN_PORTB | PIN0)
+#define PIN_SDRAM_RAS_B           (PIN_ALT5   | PIN_PORTB | PIN1)
+#define PIN_SDRAM_WE              (PIN_ALT5   | PIN_PORTB | PIN2)
+#define PIN_SDRAM_CKE             (PIN_ALT5   | PIN_PORTD | PIN7)
+#define PIN_SDRAM_CS0_B           (PIN_ALT5   | PIN_PORTB | PIN3)
+#define PIN_SDRAM_CS1_B           (PIN_ALT5   | PIN_PORTB | PIN4)
+#define PIN_SDRAM_D16             (PIN_ALT5   | PIN_PORTB | PIN17)
+#define PIN_SDRAM_D17             (PIN_ALT5   | PIN_PORTB | PIN16)
+#define PIN_SDRAM_D18             (PIN_ALT5   | PIN_PORTB | PIN11)
+#define PIN_SDRAM_D19             (PIN_ALT5   | PIN_PORTB | PIN10)
+#define PIN_SDRAM_D20             (PIN_ALT5   | PIN_PORTB | PIN9)
+#define PIN_SDRAM_D21             (PIN_ALT5   | PIN_PORTB | PIN8)
+#define PIN_SDRAM_D22             (PIN_ALT5   | PIN_PORTB | PIN7)
+#define PIN_SDRAM_D23             (PIN_ALT5   | PIN_PORTB | PIN6)
+#define PIN_SDRAM_D24             (PIN_ALT5   | PIN_PORTC | PIN15)
+#define PIN_SDRAM_D25             (PIN_ALT5   | PIN_PORTC | PIN14)
+#define PIN_SDRAM_D26             (PIN_ALT5   | PIN_PORTC | PIN13)
+#define PIN_SDRAM_D27             (PIN_ALT5   | PIN_PORTC | PIN12)
+#define PIN_SDRAM_D28             (PIN_ALT5   | PIN_PORTB | PIN23)
+#define PIN_SDRAM_D29             (PIN_ALT5   | PIN_PORTB | PIN22)
+#define PIN_SDRAM_D30             (PIN_ALT5   | PIN_PORTB | PIN21)
+#define PIN_SDRAM_D31             (PIN_ALT5   | PIN_PORTB | PIN20)
+
+#define PIN_SDRAM_DQM0            (PIN_ALT5   | PIN_PORTC | PIN19)
+#define PIN_SDRAM_DQM1            (PIN_ALT5   | PIN_PORTC | PIN18)
+#define PIN_SDRAM_DQM2            (PIN_ALT5   | PIN_PORTC | PIN16)
+#define PIN_SDRAM_DQM3            (PIN_ALT5   | PIN_PORTC | PIN17)
+
+#define PIN_SDRAM_A9              (PIN_ALT5   | PIN_PORTD | PIN5)
+#define PIN_SDRAM_A10             (PIN_ALT5   | PIN_PORTD | PIN4)
+#define PIN_SDRAM_A11             (PIN_ALT5   | PIN_PORTD | PIN3)
+#define PIN_SDRAM_A12             (PIN_ALT5   | PIN_PORTD | PIN2)
+#define PIN_SDRAM_A13             (PIN_ALT5   | PIN_PORTC | PIN10)
+#define PIN_SDRAM_A14             (PIN_ALT5   | PIN_PORTC | PIN9)
+#define PIN_SDRAM_A15             (PIN_ALT5   | PIN_PORTC | PIN8)
+#define PIN_SDRAM_A16             (PIN_ALT5   | PIN_PORTC | PIN7)
+#define PIN_SDRAM_A17             (PIN_ALT5   | PIN_PORTC | PIN6)
+#define PIN_SDRAM_A18             (PIN_ALT5   | PIN_PORTC | PIN5)
+#define PIN_SDRAM_A19             (PIN_ALT5   | PIN_PORTC | PIN4)
+#define PIN_SDRAM_A20             (PIN_ALT5   | PIN_PORTC | PIN2)
+#define PIN_SDRAM_A21             (PIN_ALT5   | PIN_PORTC | PIN1)
+#define PIN_SDRAM_A22             (PIN_ALT5   | PIN_PORTC | PIN0)
+#define PIN_SDRAM_A23             (PIN_ALT5   | PIN_PORTB | PIN18)
+
+
+/* Secured digital host controller (SDHC) */
+
+#define PIN_SDHC0_CLKIN           (PIN_ALT4   | PIN_PORTD | PIN11)
+#define PIN_SDHC0_CMD             (PIN_ALT4   | PIN_PORTE | PIN3)
+#define PIN_SDHC0_D0              (PIN_ALT4   | PIN_PORTE | PIN1)
+#define PIN_SDHC0_D1              (PIN_ALT4   | PIN_PORTE | PIN0)
+#define PIN_SDHC0_D2              (PIN_ALT4   | PIN_PORTE | PIN5)
+#define PIN_SDHC0_D3              (PIN_ALT4   | PIN_PORTE | PIN4)
+#define PIN_SDHC0_D4              (PIN_ALT4   | PIN_PORTD | PIN12)
+#define PIN_SDHC0_D5              (PIN_ALT4   | PIN_PORTD | PIN13)
+#define PIN_SDHC0_D6              (PIN_ALT4   | PIN_PORTD | PIN14)
+#define PIN_SDHC0_D7              (PIN_ALT4   | PIN_PORTD | PIN15)
+#define PIN_SDHC0_DCLK            (PIN_ALT4   | PIN_PORTE | PIN2)
+
+/* SPI */
+
+#define PIN_SPI0_PCS0_1           (PIN_ALT2   | PIN_PORTA | PIN14)
+#define PIN_SPI0_PCS0_2           (PIN_ALT2   | PIN_PORTC | PIN4)
+#define PIN_SPI0_PCS0_3           (PIN_ALT2   | PIN_PORTD | PIN0)
+#define PIN_SPI0_PCS1_1           (PIN_ALT2   | PIN_PORTC | PIN3)
+#define PIN_SPI0_PCS1_2           (PIN_ALT2   | PIN_PORTD | PIN4)
+#define PIN_SPI0_PCS2_1           (PIN_ALT2   | PIN_PORTC | PIN2)
+#define PIN_SPI0_PCS2_3           (PIN_ALT2   | PIN_PORTD | PIN5)
+#define PIN_SPI0_PCS3_1           (PIN_ALT2   | PIN_PORTC | PIN1)
+#define PIN_SPI0_PCS3_2           (PIN_ALT2   | PIN_PORTD | PIN6)
+#define PIN_SPI0_PCS4             (PIN_ALT2   | PIN_PORTC | PIN0)
+#define PIN_SPI0_PCS5             (PIN_ALT3   | PIN_PORTB | PIN23)
+#define PIN_SPI0_SCK_1            (PIN_ALT2   | PIN_PORTA | PIN15)
+#define PIN_SPI0_SCK_2            (PIN_ALT2   | PIN_PORTC | PIN5)
+#define PIN_SPI0_SCK_3            (PIN_ALT2   | PIN_PORTD | PIN1)
+#define PIN_SPI0_SIN_1            (PIN_ALT2   | PIN_PORTA | PIN17)
+#define PIN_SPI0_SIN_2            (PIN_ALT2   | PIN_PORTC | PIN7)
+#define PIN_SPI0_SIN_3            (PIN_ALT2   | PIN_PORTD | PIN3)
+#define PIN_SPI0_SOUT_1           (PIN_ALT2   | PIN_PORTA | PIN16)
+#define PIN_SPI0_SOUT_2           (PIN_ALT2   | PIN_PORTC | PIN6)
+#define PIN_SPI0_SOUT_3           (PIN_ALT2   | PIN_PORTD | PIN2)
+
+#define PIN_SPI1_PCS0_1           (PIN_ALT2   | PIN_PORTB | PIN10)
+#define PIN_SPI1_PCS0_2           (PIN_ALT2   | PIN_PORTE | PIN4)
+#define PIN_SPI1_PCS0_3           (PIN_ALT7   | PIN_PORTD | PIN4)
+#define PIN_SPI1_PCS1_1           (PIN_ALT2   | PIN_PORTB | PIN9)
+#define PIN_SPI1_PCS1_2           (PIN_ALT2   | PIN_PORTE | PIN0)
+#define PIN_SPI1_PCS2             (PIN_ALT2   | PIN_PORTE | PIN5)
+#define PIN_SPI1_PCS3             (PIN_ALT2   | PIN_PORTE | PIN6)
+#define PIN_SPI1_SCK_1            (PIN_ALT2   | PIN_PORTB | PIN11)
+#define PIN_SPI1_SCK_2            (PIN_ALT2   | PIN_PORTE | PIN2)
+#define PIN_SPI1_SCK_3            (PIN_ALT7   | PIN_PORTD | PIN5)
+#define PIN_SPI1_SIN_1            (PIN_ALT2   | PIN_PORTB | PIN17)
+#define PIN_SPI1_SIN_2            (PIN_ALT2   | PIN_PORTE | PIN3)
+#define PIN_SPI1_SIN_3            (PIN_ALT7   | PIN_PORTD | PIN7)
+#define PIN_SPI1_SIN_4            (PIN_ALT7   | PIN_PORTE | PIN1)
+#define PIN_SPI1_SOUT_1           (PIN_ALT2   | PIN_PORTB | PIN16)
+#define PIN_SPI1_SOUT_2           (PIN_ALT2   | PIN_PORTE | PIN1)
+#define PIN_SPI1_SOUT_3           (PIN_ALT7   | PIN_PORTD | PIN6)
+#define PIN_SPI1_SOUT_4           (PIN_ALT7   | PIN_PORTE | PIN3)
+
+#define PIN_SPI2_PCS0_1           (PIN_ALT2   | PIN_PORTB | PIN20)
+#define PIN_SPI2_PCS0_2           (PIN_ALT2   | PIN_PORTD | PIN11)
+#define PIN_SPI2_PCS1             (PIN_ALT2   | PIN_PORTD | PIN15)
+#define PIN_SPI2_SCK_1            (PIN_ALT2   | PIN_PORTB | PIN21)
+#define PIN_SPI2_SCK_2            (PIN_ALT2   | PIN_PORTD | PIN12)
+#define PIN_SPI2_SIN_1            (PIN_ALT2   | PIN_PORTB | PIN23)
+#define PIN_SPI2_SIN_2            (PIN_ALT2   | PIN_PORTD | PIN14)
+#define PIN_SPI2_SOUT_1           (PIN_ALT2   | PIN_PORTB | PIN22)
+#define PIN_SPI2_SOUT_2           (PIN_ALT2   | PIN_PORTD | PIN13)
+
+/* SWD */
+
+#define PIN_SWD_CLK               (PIN_ALT7   | PIN_PORTA | PIN0)
+#define PIN_SWD_DIO               (PIN_ALT7   | PIN_PORTA | PIN3)
+
+/* Timer/PWM Module (TPM) */
+
+#define PIN_TPM1_CH0_1            (PIN_ALT6   | PIN_PORTA | PIN8)
+#define PIN_TPM1_CH0_2            (PIN_ALT7   | PIN_PORTA | PIN12)
+#define PIN_TPM1_CH0_3            (PIN_ALT6   | PIN_PORTB | PIN0)
+#define PIN_TPM1_CH1_1            (PIN_ALT6   | PIN_PORTA | PIN9)
+#define PIN_TPM1_CH1_2            (PIN_ALT7   | PIN_PORTA | PIN13)
+#define PIN_TPM1_CH1_3            (PIN_ALT6   | PIN_PORTB | PIN1)
+#define PIN_TPM2_CH0_1            (PIN_ALT6   | PIN_PORTA | PIN10)
+#define PIN_TPM2_CH0_2            (PIN_ALT6   | PIN_PORTB | PIN18)
+#define PIN_TPM2_CH1_1            (PIN_ALT1   | PIN_PORTA | PIN11)
+#define PIN_TPM2_CH1_2            (PIN_ALT6   | PIN_PORTB | PIN19)
+
+#define PIN_TPM_CLKIN0_1          (PIN_ALT7   | PIN_PORTA | PIN18)
+#define PIN_TPM_CLKIN0_2          (PIN_ALT7   | PIN_PORTB | PIN16)
+#define PIN_TPM_CLKIN0_3          (PIN_ALT7   | PIN_PORTC | PIN12)
+#define PIN_TPM_CLKIN1_1          (PIN_ALT7   | PIN_PORTA | PIN17)
+#define PIN_TPM_CLKIN1_2          (PIN_ALT7   | PIN_PORTB | PIN17)
+#define PIN_TPM_CLKIN1_3          (PIN_ALT7   | PIN_PORTC | PIN13)
+
+
+/* Touch Sensing Input (TSI) */
+
+#define PIN_TSI0_CH0_1            (PIN_ANALOG   | PIN_PORTB | PIN0)
+#define PIN_TSI0_CH1_1            (PIN_ANALOG   | PIN_PORTA | PIN0)
+#define PIN_TSI0_CH2_1            (PIN_ANALOG   | PIN_PORTA | PIN1)
+#define PIN_TSI0_CH3_1            (PIN_ANALOG   | PIN_PORTA | PIN2)
+#define PIN_TSI0_CH4_1            (PIN_ANALOG   | PIN_PORTA | PIN3)
+#define PIN_TSI0_CH5_1            (PIN_ANALOG   | PIN_PORTA | PIN4)
+#define PIN_TSI0_CH6_1            (PIN_ANALOG   | PIN_PORTB | PIN1)
+#define PIN_TSI0_CH7_1            (PIN_ANALOG   | PIN_PORTB | PIN2)
+#define PIN_TSI0_CH8_1            (PIN_ANALOG   | PIN_PORTB | PIN3)
+#define PIN_TSI0_CH9_1            (PIN_ANALOG   | PIN_PORTB | PIN16)
+#define PIN_TSI0_CH10_1           (PIN_ANALOG   | PIN_PORTB | PIN17)
+#define PIN_TSI0_CH11_1           (PIN_ANALOG   | PIN_PORTB | PIN18)
+#define PIN_TSI0_CH12_1           (PIN_ANALOG   | PIN_PORTB | PIN19)
+#define PIN_TSI0_CH13_1           (PIN_ANALOG   | PIN_PORTC | PIN0)
+#define PIN_TSI0_CH14_1           (PIN_ANALOG   | PIN_PORTC | PIN1)
+#define PIN_TSI0_CH15_1           (PIN_ANALOG   | PIN_PORTC | PIN2)
+
+/* Trace */
+
+#define PIN_TRACE_CLKOUT_1        (PIN_ALT5   | PIN_PORTE | PIN0)
+#define PIN_TRACE_CLKOUT_2        (PIN_ALT7   | PIN_PORTA | PIN6)
+#define PIN_TRACE_D0_1            (PIN_ALT5   | PIN_PORTE | PIN4)
+#define PIN_TRACE_D0_2            (PIN_ALT7   | PIN_PORTA | PIN10)
+#define PIN_TRACE_D1_1            (PIN_ALT5   | PIN_PORTE | PIN3)
+#define PIN_TRACE_D1_2            (PIN_ALT7   | PIN_PORTA | PIN9)
+#define PIN_TRACE_D2_1            (PIN_ALT5   | PIN_PORTE | PIN2)
+#define PIN_TRACE_D2_2            (PIN_ALT7   | PIN_PORTA | PIN8)
+#define PIN_TRACE_D3_1            (PIN_ALT5   | PIN_PORTE | PIN1)
+#define PIN_TRACE_D3_2            (PIN_ALT7   | PIN_PORTA | PIN7)
+#define PIN_TRACE_SWO             (PIN_ALT7   | PIN_PORTA | PIN2)
+
+/* UARTs */
+
+#define PIN_UART0_COL_1           (PIN_ALT2   | PIN_PORTA | PIN0)
+#define PIN_UART0_COL_2           (PIN_ALT3   | PIN_PORTA | PIN16)
+#define PIN_UART0_COL_3           (PIN_ALT3   | PIN_PORTB | PIN3)
+#define PIN_UART0_COL_4           (PIN_ALT3   | PIN_PORTD | PIN5)
+#define PIN_UART0_CTS_1           (PIN_ALT2   | PIN_PORTA | PIN0)
+#define PIN_UART0_CTS_2           (PIN_ALT3   | PIN_PORTA | PIN16)
+#define PIN_UART0_CTS_3           (PIN_ALT3   | PIN_PORTB | PIN3)
+#define PIN_UART0_CTS_4           (PIN_ALT3   | PIN_PORTD | PIN5)
+#define PIN_UART0_RTS_1           (PIN_ALT2   | PIN_PORTA | PIN3)
+#define PIN_UART0_RTS_2           (PIN_ALT3   | PIN_PORTA | PIN17)
+#define PIN_UART0_RTS_3           (PIN_ALT3   | PIN_PORTB | PIN2)
+#define PIN_UART0_RTS_4           (PIN_ALT3   | PIN_PORTD | PIN4)
+#define PIN_UART0_RX_1            (PIN_ALT2   | PIN_PORTA | PIN1)
+#define PIN_UART0_RX_2            (PIN_ALT3   | PIN_PORTA | PIN15)
+#define PIN_UART0_RX_3            (PIN_ALT3   | PIN_PORTB | PIN16)
+#define PIN_UART0_RX_4            (PIN_ALT3   | PIN_PORTD | PIN6)
+#define PIN_UART0_TX_1            (PIN_ALT2   | PIN_PORTA | PIN2)
+#define PIN_UART0_TX_2            (PIN_ALT3   | PIN_PORTA | PIN14)
+#define PIN_UART0_TX_3            (PIN_ALT3   | PIN_PORTB | PIN17)
+#define PIN_UART0_TX_4            (PIN_ALT3   | PIN_PORTD | PIN7)
+
+#define PIN_UART1_CTS_1           (PIN_ALT3   | PIN_PORTC | PIN2)
+#define PIN_UART1_CTS_2           (PIN_ALT3   | PIN_PORTE | PIN2)
+#define PIN_UART1_RTS_1           (PIN_ALT3   | PIN_PORTC | PIN1)
+#define PIN_UART1_RTS_2           (PIN_ALT3   | PIN_PORTE | PIN3)
+#define PIN_UART1_RX_1            (PIN_ALT3   | PIN_PORTC | PIN3)
+#define PIN_UART1_RX_2            (PIN_ALT3   | PIN_PORTE | PIN1)
+#define PIN_UART1_TX_1            (PIN_ALT3   | PIN_PORTC | PIN4)
+#define PIN_UART1_TX_2            (PIN_ALT3   | PIN_PORTE | PIN0)
+
+#define PIN_UART2_CTS             (PIN_ALT3   | PIN_PORTD | PIN1)
+#define PIN_UART2_RTS             (PIN_ALT3   | PIN_PORTD | PIN0)
+#define PIN_UART2_RX              (PIN_ALT3   | PIN_PORTD | PIN2)
+#define PIN_UART2_TX              (PIN_ALT3   | PIN_PORTD | PIN3)
+
+#define PIN_UART3_CTS_1           (PIN_ALT2   | PIN_PORTB | PIN13)
+#define PIN_UART3_CTS_2           (PIN_ALT3   | PIN_PORTB | PIN9)
+#define PIN_UART3_CTS_3           (PIN_ALT3   | PIN_PORTC | PIN19)
+#define PIN_UART3_CTS_4           (PIN_ALT3   | PIN_PORTE | PIN6)
+#define PIN_UART3_RTS_1           (PIN_ALT2   | PIN_PORTB | PIN12)
+#define PIN_UART3_RTS_2           (PIN_ALT3   | PIN_PORTB | PIN8)
+#define PIN_UART3_RTS_3           (PIN_ALT3   | PIN_PORTC | PIN18)
+#define PIN_UART3_RTS_4           (PIN_ALT3   | PIN_PORTE | PIN7)
+#define PIN_UART3_RX_1            (PIN_ALT3   | PIN_PORTB | PIN10)
+#define PIN_UART3_RX_2            (PIN_ALT3   | PIN_PORTC | PIN16)
+#define PIN_UART3_RX_3            (PIN_ALT3   | PIN_PORTE | PIN5)
+#define PIN_UART3_TX_1            (PIN_ALT3   | PIN_PORTB | PIN11)
+#define PIN_UART3_TX_2            (PIN_ALT3   | PIN_PORTC | PIN17)
+#define PIN_UART3_TX_3            (PIN_ALT3   | PIN_PORTE | PIN4)
+
+#define PIN_UART4_CTS_1           (PIN_ALT3   | PIN_PORTC | PIN13)
+#define PIN_UART4_CTS_2           (PIN_ALT3   | PIN_PORTE | PIN26)
+#define PIN_UART4_RTS_1           (PIN_ALT3   | PIN_PORTC | PIN12)
+#define PIN_UART4_RTS_2           (PIN_ALT3   | PIN_PORTE | PIN27)
+#define PIN_UART4_RX_1            (PIN_ALT3   | PIN_PORTC | PIN14)
+#define PIN_UART4_RX_2            (PIN_ALT3   | PIN_PORTE | PIN25)
+#define PIN_UART4_TX_1            (PIN_ALT3   | PIN_PORTC | PIN15)
+#define PIN_UART4_TX_2            (PIN_ALT3   | PIN_PORTE | PIN24)
+
+#define PIN_LPUART0_CTS_B_1       (PIN_ALT5   | PIN_PORTE | PIN10)
+#define PIN_LPUART0_CTS_B_2       (PIN_ALT5   | PIN_PORTA | PIN0)
+#define PIN_LPUART0_CTS_B_3       (PIN_ALT5   | PIN_PORTD | PIN11)
+#define PIN_LPUART0_RTS_B_1       (PIN_ALT5   | PIN_PORTE | PIN11)
+#define PIN_LPUART0_RTS_B_2       (PIN_ALT5   | PIN_PORTA | PIN3)
+#define PIN_LPUART0_RTS_B_3       (PIN_ALT5   | PIN_PORTD | PIN10)
+#define PIN_LPUART0_RX_1          (PIN_ALT5   | PIN_PORTE | PIN9)
+#define PIN_LPUART0_RX_2          (PIN_ALT5   | PIN_PORTA | PIN1)
+#define PIN_LPUART0_RX_3          (PIN_ALT5   | PIN_PORTD | PIN8)
+#define PIN_LPUART0_TX_1          (PIN_ALT5   | PIN_PORTE | PIN8)
+#define PIN_LPUART0_TX_2          (PIN_ALT5   | PIN_PORTA | PIN2)
+#define PIN_LPUART0_TX_3          (PIN_ALT5   | PIN_PORTD | PIN9)
+
+/* USB */
+
+#define PIN_USB0_CLKIN_1          (PIN_ALT2   | PIN_PORTA | PIN5)
+#define PIN_USB0_CLKIN_2          (PIN_ALT7   | PIN_PORTE | PIN26)
+#define PIN_USB0_SOF_OUT_1        (PIN_ALT3   | PIN_PORTC | PIN7)
+#define PIN_USB0_SOF_OUT_2        (PIN_ALT4   | PIN_PORTC | PIN0)
+#define PIN_USB0_SOF_OUT_3        (PIN_ALT7   | PIN_PORTE | PIN6)
+
+#define PIN_USB1_ID_1             (PIN_ALT7   | PIN_PORTE | PIN10)
+
+/* External Crystal */
+
+#define PIN_EXTAL0                (PIN_ANALOG | PIN_PORTA | PIN18)
+#define PIN_XTAL0                 (PIN_ANALOG | PIN_PORTA | PIN19)
+
+/********************************************************************************************
+ * Public Types
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Public Data
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Public Functions
+ ********************************************************************************************/
+
+#endif /* KINETIS_K66 */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHP_KINETIS_K66PINMUX_H */
diff --git a/arch/arm/src/kinetis/chip/kinetis_k66vectors.h b/arch/arm/src/kinetis/chip/kinetis_k66vectors.h
new file mode 100644
index 0000000000000000000000000000000000000000..982320e07ef2cfdb51d1602823b351732d36f1ed
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_k66vectors.h
@@ -0,0 +1,162 @@
+/************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_k64vectors.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Pre-processor definitions
+ ************************************************************************************/
+/* This file is included by kinetis_vectors.S.  It provides the macro VECTOR that
+ * supplies ach K64 vector in terms of a (lower-case) ISR label and an
+ * (upper-case) IRQ number as defined in arch/arm/include/kinetis/kinetis_k64irq.h.
+ * kinetis_vectors.S will defined the VECTOR in different ways in order to generate
+ * the interrupt vectors and handlers in their final form.
+ */
+
+#if defined(CONFIG_ARCH_FAMILY_K64)
+
+/* If the common ARMv7-M vector handling is used, then all it needs is the following
+ * definition that provides the number of supported vectors.
+ */
+
+#  ifdef CONFIG_ARMV7M_CMNVECTOR
+
+/* Reserve interrupt table entries for I/O interrupts. */
+
+#    define ARMV7M_PERIPHERAL_INTERRUPTS NR_INTERRUPTS
+
+#  else
+VECTOR(kinetis_dmach0, KINETIS_IRQ_DMACH0)     /* Vector 16: DMA channel 0 transfer complete */
+VECTOR(kinetis_dmach1, KINETIS_IRQ_DMACH1)     /* Vector 17: DMA channel 1 transfer complete */
+VECTOR(kinetis_dmach2, KINETIS_IRQ_DMACH2)     /* Vector 18: DMA channel 2 transfer complete */
+VECTOR(kinetis_dmach3, KINETIS_IRQ_DMACH3)     /* Vector 19: DMA channel 3 transfer complete */
+VECTOR(kinetis_dmach4, KINETIS_IRQ_DMACH4)     /* Vector 20: DMA channel 4 transfer complete */
+VECTOR(kinetis_dmach5, KINETIS_IRQ_DMACH5)     /* Vector 21: DMA channel 5 transfer complete */
+VECTOR(kinetis_dmach6, KINETIS_IRQ_DMACH6)     /* Vector 22: DMA channel 6 transfer complete */
+VECTOR(kinetis_dmach7, KINETIS_IRQ_DMACH7)     /* Vector 23: DMA channel 7 transfer complete */
+VECTOR(kinetis_dmach8, KINETIS_IRQ_DMACH8)     /* Vector 24: DMA channel 8 transfer complete */
+VECTOR(kinetis_dmach9, KINETIS_IRQ_DMACH9)     /* Vector 25: DMA channel 9 transfer complete */
+VECTOR(kinetis_dmach10, KINETIS_IRQ_DMACH10)   /* Vector 26: DMA channel 10 transfer complete */
+VECTOR(kinetis_dmach11, KINETIS_IRQ_DMACH11)   /* Vector 27: DMA channel 11 transfer complete */
+VECTOR(kinetis_dmach12, KINETIS_IRQ_DMACH12)   /* Vector 28: DMA channel 12 transfer complete */
+VECTOR(kinetis_dmach13, KINETIS_IRQ_DMACH13)   /* Vector 29: DMA channel 13 transfer complete */
+VECTOR(kinetis_dmach14, KINETIS_IRQ_DMACH14)   /* Vector 30: DMA channel 14 transfer complete */
+VECTOR(kinetis_dmach15, KINETIS_IRQ_DMACH15)   /* Vector 31: DMA channel 15 transfer complete */
+VECTOR(kinetis_dmaerr, KINETIS_IRQ_DMAERR)     /* Vector 32: DMA error interrupt channels 0-15 */
+VECTOR(kinetis_mcm, KINETIS_IRQ_MCM)           /* Vector 33: MCM Normal interrupt */
+VECTOR(kinetis_flashcc, KINETIS_IRQ_FLASHCC)   /* Vector 34: Flash memory command complete */
+VECTOR(kinetis_flashrc, KINETIS_IRQ_FLASHRC)   /* Vector 35: Flash memory read collision */
+VECTOR(kinetis_smclvd, KINETIS_IRQ_SMCLVD)     /* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
+VECTOR(kinetis_llwu, KINETIS_IRQ_LLWU)         /* Vector 37: LLWU Normal Low Leakage Wakeup */
+VECTOR(kinetis_wdog, KINETIS_IRQ_WDOG)         /* Vector 38: Watchdog */
+VECTOR(kinetis_rngb, KINETIS_IRQ_RNGB)         /* Vector 39: Random number generator */
+VECTOR(kinetis_i2c0, KINETIS_IRQ_I2C0)         /* Vector 40: I2C0 */
+VECTOR(kinetis_i2c1, KINETIS_IRQ_I2C1)         /* Vector 41: I2C1 */
+VECTOR(kinetis_spi0, KINETIS_IRQ_SPI0)         /* Vector 42: SPI0 all sources */
+VECTOR(kinetis_spi1, KINETIS_IRQ_SPI1)         /* Vector 43: SPI1 all sources */
+VECTOR(kinetis_i2s0, KINETIS_IRQ_I2S0)         /* Vector 44: Transmit */
+VECTOR(kinetis_i2s1, KINETIS_IRQ_I2S1)         /* Vector 45: Transmit */
+UNUSED(KINETIS_IRQ_RESVD30)                    /* Vector 46: Reserved */
+VECTOR(kinetis_uart0s, KINETIS_IRQ_UART0S)     /* Vector 47: UART0 status */
+VECTOR(kinetis_uart0e, KINETIS_IRQ_UART0E)     /* Vector 48: UART0 error */
+VECTOR(kinetis_uart1s, KINETIS_IRQ_UART1S)     /* Vector 49: UART1 status */
+VECTOR(kinetis_uart1e, KINETIS_IRQ_UART1E)     /* Vector 50: UART1 error */
+VECTOR(kinetis_uart2s, KINETIS_IRQ_UART2S)     /* Vector 51: UART2 status */
+VECTOR(kinetis_uart2e, KINETIS_IRQ_UART2E)     /* Vector 52: UART2 error */
+VECTOR(kinetis_uart3s, KINETIS_IRQ_UART3S)     /* Vector 53: UART3 status */
+VECTOR(kinetis_uart3e, KINETIS_IRQ_UART3E)     /* Vector 54: UART3 error */
+VECTOR(kinetis_adc0, KINETIS_IRQ_ADC0)         /* Vector 55: ADC0 */
+VECTOR(kinetis_cmp0, KINETIS_IRQ_CMP0)         /* Vector 56: CMP0 */
+VECTOR(kinetis_cmp1, KINETIS_IRQ_CMP1)         /* Vector 57: CMP1 */
+VECTOR(kinetis_ftm0, KINETIS_IRQ_FTM0)         /* Vector 58: FTM0 all sources */
+VECTOR(kinetis_ftm1, KINETIS_IRQ_FTM1)         /* Vector 59: FTM1 all sources */
+VECTOR(kinetis_ftm2, KINETIS_IRQ_FTM2)         /* Vector 60: FTM2 all sources */
+VECTOR(kinetis_cmt, KINETIS_IRQ_CMT)           /* Vector 61: CMT */
+VECTOR(kinetis_rtc0, KINETIS_IRQ_RTC)          /* Vector 62: RTC alarm interrupt */
+VECTOR(kinetis_rtc1, KINETIS_IRQ_RTCS)         /* Vector 63: RTC seconds interrupt */
+VECTOR(kinetis_pitch0, KINETIS_IRQ_PITCH0)     /* Vector 64: PIT channel 0 */
+VECTOR(kinetis_pitch1, KINETIS_IRQ_PITCH1)     /* Vector 65: PIT channel 1 */
+VECTOR(kinetis_pitch2, KINETIS_IRQ_PITCH2)     /* Vector 66: PIT channel 2 */
+VECTOR(kinetis_pitch3, KINETIS_IRQ_PITCH3)     /* Vector 67: PIT channel 3 */
+VECTOR(kinetis_pdb, KINETIS_IRQ_PDB)           /* Vector 68: PDB */
+VECTOR(kinetis_usbotg, KINETIS_IRQ_USBOTG)     /* Vector 69: USB OTG */
+VECTOR(kinetis_usbcd, KINETIS_IRQ_USBCD)       /* Vector 70: USB charger detect */
+UNUSED(KINETIS_IRQ_RESVD55)                    /* Vector 71: Reserved */
+VECTOR(kinetis_dac0, KINETIS_IRQ_DAC0)         /* Vector 72: DAC0 */
+VECTOR(kinetis_mcg, KINETIS_IRQ_MCG)           /* Vector 73: MCG */
+VECTOR(kinetis_lpt, KINETIS_IRQ_LPT)           /* Vector 74: Low power timer */
+VECTOR(kinetis_porta, KINETIS_IRQ_PORTA)       /* Vector 75: Pin detect port A */
+VECTOR(kinetis_portb, KINETIS_IRQ_PORTB)       /* Vector 76: Pin detect port B */
+VECTOR(kinetis_portc, KINETIS_IRQ_PORTC)       /* Vector 77: Pin detect port C */
+VECTOR(kinetis_portd, KINETIS_IRQ_PORTD)       /* Vector 78: Pin detect port D */
+VECTOR(kinetis_porte, KINETIS_IRQ_PORTE)       /* Vector 79: Pin detect port E */
+VECTOR(kinetis_software, KINETIS_IRQ_SWI)      /* Vector 80: Software interrupt */
+VECTOR(kinetis_spi2, KINETIS_IRQ_SPI2)         /* Vector 81: SPI2 all sources */
+VECTOR(kinetis_uart4s, KINETIS_IRQ_UART4S)     /* Vector 82: UART4 status */
+VECTOR(kinetis_uart4e, KINETIS_IRQ_UART4E)     /* Vector 83: UART4 error */
+UNUSED(KINETIS_IRQ_RESVD68)                    /* Vector 84: Reserved */
+UNUSED(KINETIS_IRQ_RESVD69)                    /* Vector 85: Reserved */
+VECTOR(kinetis_cmp2, KINETIS_IRQ_CMP2)         /* Vector 86: CMP2 */
+VECTOR(kinetis_ftm3, KINETIS_IRQ_FTM3)         /* Vector 87: FTM3 all sources */
+VECTOR(kinetis_dac1, KINETIS_IRQ_DAC1)         /* Vector 88: DAC1 */
+VECTOR(kinetis_adc1, KINETIS_IRQ_ADC1)         /* Vector 89: ADC1 */
+VECTOR(kinetis_i2c2, KINETIS_IRQ_I2C2)         /* Vector 90: I2C2 */
+VECTOR(kinetis_can0mb, KINETIS_IRQ_CAN0MB)     /* Vector 91: CAN0 ORed Message buffer (0-15) */
+VECTOR(kinetis_can0bo, KINETIS_IRQ_CAN0BO)     /* Vector 92: CAN0 Bus Off */
+VECTOR(kinetis_can0err, KINETIS_IRQ_CAN0ERR)   /* Vector 93: CAN0 Error */
+VECTOR(kinetis_can0tw, KINETIS_IRQ_CAN0TW)     /* Vector 94: CAN0 Transmit Warning */
+VECTOR(kinetis_can0rw, KINETIS_IRQ_CAN0RW)     /* Vector 95: CAN0 Receive Warning */
+VECTOR(kinetis_can0wu, KINETIS_IRQ_CAN0WU)     /* Vector 96: CAN0 Wake UP */
+VECTOR(kinetis_sdhc, KINETIS_IRQ_SDHC)         /* Vector 97: SDHC */
+VECTOR(kinetis_emactmr, KINETIS_IRQ_EMACTMR)   /* Vector 98: Ethernet MAC IEEE 1588 timer interrupt */
+VECTOR(kinetis_emactx, KINETIS_IRQ_EMACTX)     /* Vector 99: Ethernet MAC transmit interrupt */
+VECTOR(kinetis_emacrx, KINETIS_IRQ_EMACRX)     /* Vector 100: Ethernet MAC receive interrupt */
+VECTOR(kinetis_emacmisc, KINETIS_IRQ_EMACMISC) /* Vector 101: Ethernet MAC error and misc interrupt */
+VECTOR(kinetis_lpuart0, KINETIS_IRQ_LPUART0)   /* Vector 102: LPUART0 Status and error */
+VECTOR(kinetis_tsi0, KINETIS_IRQ_TSI0)         /* Vector 103: TSI0 */
+VECTOR(kinetis_tpm1, KINETIS_IRQ_TPM1)         /* Vector 104: TPM1 */
+VECTOR(kinetis_tpm2, KINETIS_IRQ_TPM2)         /* Vector 105: TPM2 */
+VECTOR(kinetis_usbhsdcd,KINETIS_IRQ_USBHSDCD)  /* Vector 106: shared by USBHS DCD & USBHS Phy modules */
+VECTOR(kinetis_i2c3, KINETIS_IRQ_I2C3)         /* Vector 107: I2C3 */
+VECTOR(kinetis_cmp3, KINETIS_IRQ_CMP3)         /* Vector 108: CMP3 */
+VECTOR(kinetis_usbhsotg,KINETIS_IRQ_USBHSOTG)  /* Vector 109: USBHS OTG*/
+VECTOR(kinetis_can1mb, KINETIS_IRQ_CAN1MB)     /* Vector 110: CAN1 OR'ed Message buffer (0-15) */
+VECTOR(kinetis_can1bo, KINETIS_IRQ_CAN1BO)     /* Vector 111: CAN1 Bus Off */
+VECTOR(kinetis_can1err, KINETIS_IRQ_CAN1ERR )  /* Vector 112: CAN1 Error */
+VECTOR(kinetis_can1tw, KINETIS_IRQ_CAN1TW)     /* Vector 113: CAN1 Transmit Warning */
+VECTOR(kinetis_can1rw, KINETIS_IRQ_CAN1RW)     /* Vector 114: CAN1 Receive Warning */
+VECTOR(kinetis_can1wu, KINETIS_IRQ_CAN1WU)     /* Vector 115: CAN1 Wake UP */
+
+#  endif /* CONFIG_ARMV7M_CMNVECTOR */
+#endif /* CONFIG_ARCH_FAMILY_K64 */
diff --git a/arch/arm/src/kinetis/kinetis_llwu.h b/arch/arm/src/kinetis/chip/kinetis_llwu.h
similarity index 97%
rename from arch/arm/src/kinetis/kinetis_llwu.h
rename to arch/arm/src/kinetis/chip/kinetis_llwu.h
index 4324a76251b412e0a542816025f408c85514f8a2..c4abaa74ddf66b0dfd674ce3e65df503420ec299 100644
--- a/arch/arm/src/kinetis/kinetis_llwu.h
+++ b/arch/arm/src/kinetis/chip/kinetis_llwu.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/kinetis/kinetis_llwu.h
+ * arch/arm/src/kinetis/chip/kinetis_llwu.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_LLWU_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_LLWU_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_LLWU_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_LLWU_H
 
 /************************************************************************************
  * Included Files
@@ -232,7 +232,9 @@
 
 /* LLWU Control and Status Register */
 
-#define LLWU_CS_ACKISO             (1 << 7)  /* Bit 7:  Acknowledge Isolation */
+#if !defined(KINETIS_PMC_HAS_REGSC_ACKISO)
+#  define LLWU_CS_ACKISO           (1 << 7)  /* Bit 7:  Acknowledge Isolation */
+#endif
                                              /* Bits 2-6: Reserved */
 #define LLWU_CS_FLTEP              (1 << 1)  /* Bit 1:  Digital Filter on External Pin */
 #define LLWU_CS_FLTR               (1 << 0)  /* Bit 0:  Digital Filter on RESET Pin */
@@ -249,4 +251,4 @@
  * Public Functions
  ************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_LLWU_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_LLWU_H */
diff --git a/arch/arm/src/kinetis/kinetis_lptmr.h b/arch/arm/src/kinetis/chip/kinetis_lptmr.h
similarity index 96%
rename from arch/arm/src/kinetis/kinetis_lptmr.h
rename to arch/arm/src/kinetis/chip/kinetis_lptmr.h
index 863b24108eacec47e4808534cc2a7e93ff602132..15aeb4a5614c386f5a78b8a8c321ca6acf139fce 100644
--- a/arch/arm/src/kinetis/kinetis_lptmr.h
+++ b/arch/arm/src/kinetis/chip/kinetis_lptmr.h
@@ -1,7 +1,7 @@
 /****************************************************************************************************
- * arch/arm/src/kinetis/kinetis_lptmr.h
+ * arch/arm/src/kinetis/chip/kinetis_lptmr.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ****************************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_LPTMR_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_LPTMR_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_LPTMR_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_LPTMR_H
 
 /****************************************************************************************************
  * Included Files
@@ -130,4 +130,4 @@
  * Public Functions
  ****************************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_LPTMR_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_LPTMR_H */
diff --git a/arch/arm/src/kinetis/chip/kinetis_lpuart.h b/arch/arm/src/kinetis/chip/kinetis_lpuart.h
new file mode 100644
index 0000000000000000000000000000000000000000..eafd18f122c38c00cf189944d852d91ee483b06d
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_lpuart.h
@@ -0,0 +1,222 @@
+/****************************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_lpuart.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_LPUART_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_LPUART_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+/* Register Offsets *********************************************************************************/
+
+#define KINETIS_LPUART_BAUD_OFFSET  0x0000 /* Low Power UART Baud Rate Register */
+#define KINETIS_LPUART_STAT_OFFSET  0x0004 /* Low Power UART Status Register */
+#define KINETIS_LPUART_CTRL_OFFSET  0x0008 /* Low Power UART Control Register */
+#define KINETIS_LPUART_DATA_OFFSET  0x000c /* Low Power UART Data Register */
+#define KINETIS_LPUART_MATCH_OFFSET 0x000c /* Low Power UART Match Address Register */
+#define KINETIS_LPUART_MODIR_OFFSET 0x000c /* Low Power UART Modem IrDA Register */
+
+/* Register Addresses *******************************************************************************/
+
+#define KINETIS_LPUART0_BAUD        (KINETIS_LPUART0_BASE+KINETIS_LPUART_BAUD_OFFSET)
+#define KINETIS_LPUART0_STAT        (KINETIS_LPUART0_BASE+KINETIS_LPUART_STAT_OFFSET)
+#define KINETIS_LPUART0_CTRL        (KINETIS_LPUART0_BASE+KINETIS_LPUART_CTRL_OFFSET)
+#define KINETIS_LPUART0_DATA        (KINETIS_LPUART0_BASE+KINETIS_LPUART_DATA_OFFSET)
+#define KINETIS_LPUART0_MATCH       (KINETIS_LPUART0_BASE+KINETIS_LPUART_MATCH_OFFSET)
+#define KINETIS_LPUART0_MODIR       (KINETIS_LPUART0_BASE+KINETIS_LPUART_MODIR_OFFSET)
+
+/* Register Bit Definitions *************************************************************************/
+
+/*  Low Power UART Baud Rate Register */
+
+#define LPUART_BAUD_SBR_SHIFT       (0)       /* Bits 0-12:  Baud Rate Modulo Divisor */
+#define LPUART_BAUD_SBR_MASK        (0x1fff << LPUART_BAUD_SBR_SHIFT)
+#  define LPUART_BAUD_SBR(n)        (((n) & 0x1fff) << LPUART_BAUD_SBR_SHIFT) /* n= 1..8191*/
+#define LPUART_BAUD_SBNS            (1 << 13) /* Bit 13:  Stop Bit Number Select */
+#define LPUART_BAUD_RXEDGIE         (1 << 14) /* Bit 14:  RX Input Active Edge Interrupt Enable */
+#define LPUART_BAUD_LBKDIE          (1 << 15) /* Bit 15:  LIN Break Detect Interrupt Enable */
+#define LPUART_BAUD_RESYNCDIS       (1 << 16) /* Bit 16:  Resynchronizations Disable */
+#define LPUART_BAUD_BOTHEDGE        (1 << 17) /* Bit 17:  Both Edge Sampling */
+#define LPUART_BAUD_MATCFG_SHIFT    (18)      /* Bits 18-19:  Match Configuration */
+#define LPUART_BAUD_MATCFG_MASK     (3 << LPUART_BAUD_MATCFG_SHIFT)
+#  define LPUART_BAUD_MATCFG_AMW    (0 << LPUART_BAUD_MATCFG_SHIFT) /* Address Match Wakeup */
+#  define LPUART_BAUD_MATCFG_IMW    (1 << LPUART_BAUD_MATCFG_SHIFT) /* Idle Match Wakeup */
+#  define LPUART_BAUD_MATCFG_MONOFF (2 << LPUART_BAUD_MATCFG_SHIFT) /* Match On and Match Off */
+#  define LPUART_BAUD_MATCFG_RWU    (3 << LPUART_BAUD_MATCFG_SHIFT) /* Enables RWU on Data Match and Match On/Off for transmitter CTS input */
+                                              /* Bit 20:  Reserved */
+#define LPUART_BAUD_RDMAE           (1 << 21) /* Bit 21:  Receiver Full DMA Enable */
+                                              /* Bit 22:  Reserved */
+#define LPUART_BAUD_TDMAE           (1 << 23) /* Bit 23:  Transmitter DMA Enable */
+#define LPUART_BAUD_OSR_SHIFT       (24)      /* Bits 24-28:  Over Sampling Ratio */
+#define LPUART_BAUD_OSR_MASK        (0x1f << LPUART_BAUD_OSR_SHIFT)
+#define   LPUART_BAUD_OSR(n)        ((((n)-1) & 0x1f) << LPUART_BAUD_OSR_SHIFT) /* n=4..32 */
+#define LPUART_BAUD_M10             (1 << 29) /* Bit 29:  10-bit Mode select */
+#define LPUART_BAUD_MAEN2           (1 << 30) /* Bit 30:  Match Address Mode Enable 2 */
+#define LPUART_BAUD_MAEN1           (1 << 31) /* Bit 31:  Match Address Mode Enable 1 */
+
+/* Low Power UART Status Register */
+
+                                             /* Bits 0-13:  Reserved */
+#define LPUART_STAT_MA2F            (1 << 14) /* Match 2 Flag */
+#define LPUART_STAT_MA1F            (1 << 15) /* Match 1 Flag */
+#define LPUART_STAT_PF              (1 << 16) /* Parity Error Flag */
+#define LPUART_STAT_FE              (1 << 17) /* Framing Error Flag */
+#define LPUART_STAT_NF              (1 << 18) /* Noise Flag */
+#define LPUART_STAT_OR              (1 << 19) /* Receiver Overrun Flag */
+#define LPUART_STAT_IDLE            (1 << 20) /* Idle Line Flag */
+#define LPUART_STAT_RDRF            (1 << 21) /* Receive Data Register Full Flag */
+#define LPUART_STAT_TC              (1 << 22) /* Transmission Complete Flag */
+#define LPUART_STAT_TDRE            (1 << 23) /* Transmit Data Register Empty Flag */
+#define LPUART_STAT_RAF             (1 << 24) /* Receiver Active Flag */
+#define LPUART_STAT_LBKDE           (1 << 25) /* LIN Break Detection Enable */
+#define LPUART_STAT_BRK13           (1 << 26) /* Break Character Generation Length */
+#define LPUART_STAT_RWUID           (1 << 27) /* Receive Wake Up Idle Detect */
+#define LPUART_STAT_RXINV           (1 << 28) /* Receive Data Inversion */
+#define LPUART_STAT_MSBF            (1 << 29) /* MSB First */
+#define LPUART_STAT_RXEDGIF         (1 << 30) /* LPUART_RX Pin Active Edge Interrupt Flag */
+#define LPUART_STAT_LBKDIF          (1 << 31) /* LIN Break Detect Interrupt Flag */
+
+/* Low Power UART Control Register */
+
+#define LPUART_CTRL_PT              (1 << 0)   /* Bit 0:  Parity Type */
+#define LPUART_CTRL_PE              (1 << 1)   /* Bit 1:  Parity Enable */
+#define LPUART_CTRL_ILT             (1 << 2)   /* Bit 2:  Idle Line Type Select */
+#define LPUART_CTRL_WAKE            (1 << 3)   /* Bit 3:  Receiver Wakeup Method Select */
+#define LPUART_CTRL_M               (1 << 4)   /* Bit 4:  9-Bit or 8-Bit Mode Select */
+#define LPUART_CTRL_RSRC            (1 << 5)   /* Bit 5:  Receiver Source Select */
+#define LPUART_CTRL_DOZEEN          (1 << 6)   /* Bit 6:  Doze Enable */
+#define LPUART_CTRL_LOOPS           (1 << 7)   /* Bit 7:  Loop Mode Select */
+#define LPUART_CTRL_IDLECFG_SHIFT   (8)        /* Bits 8-10:  Idle Configuration */
+#define LPUART_CTRL_IDLECFG_MASK    (3 << LPUART_CTRL_IDLECFG_SHIFT)
+#  define LPUART_CTRL_IDLECFG_1     (0 << LPUART_CTRL_IDLECFG_SHIFT) /* 1   idle character */
+#  define LPUART_CTRL_IDLECFG_2     (1 << LPUART_CTRL_IDLECFG_SHIFT) /* 2   idle characters */
+#  define LPUART_CTRL_IDLECFG_4     (2 << LPUART_CTRL_IDLECFG_SHIFT) /* 4   idle characters */
+#  define LPUART_CTRL_IDLECFG_8     (3 << LPUART_CTRL_IDLECFG_SHIFT) /* 8   idle characters */
+#  define LPUART_CTRL_IDLECFG_16    (4 << LPUART_CTRL_IDLECFG_SHIFT) /* 16  idle characters */
+#  define LPUART_CTRL_IDLECFG_32    (5 << LPUART_CTRL_IDLECFG_SHIFT) /* 32  idle characters */
+#  define LPUART_CTRL_IDLECFG_64    (6 << LPUART_CTRL_IDLECFG_SHIFT) /* 64  idle characters */
+#  define LPUART_CTRL_IDLECFG_128   (7 << LPUART_CTRL_IDLECFG_SHIFT) /* 128 idle characters */
+                                               /* Bits 11-13:  Reserved */
+#define LPUART_CTRL_MA2IE           (1 << 14)  /* Bit 14:  Match 2 Interrupt Enable */
+#define LPUART_CTRL_MA1IE           (1 << 15)  /* Bit 15:  Match 1 Interrupt Enable */
+#define LPUART_CTRL_SBK             (1 << 16)  /* Bit 16:  Send Break */
+#define LPUART_CTRL_RWU             (1 << 17)  /* Bit 17:  Receiver Wakeup Control */
+#define LPUART_CTRL_RE              (1 << 18)  /* Bit 18:  Receiver Enable */
+#define LPUART_CTRL_TE              (1 << 19)  /* Bit 19:  Transmitter Enable */
+#define LPUART_CTRL_ILIE            (1 << 20)  /* Bit 20:  Idle Line Interrupt Enable */
+#define LPUART_CTRL_RIE             (1 << 21)  /* Bit 21:  Receiver Interrupt Enable */
+#define LPUART_CTRL_TCIE            (1 << 22)  /* Bit 22:  Transmission Complete Interrupt Enable for */
+#define LPUART_CTRL_TIE             (1 << 23)  /* Bit 23:  Transmit Interrupt Enable */
+#define LPUART_CTRL_PEIE            (1 << 24)  /* Bit 24:  Parity Error Interrupt Enable */
+#define LPUART_CTRL_FEIE            (1 << 25)  /* Bit 25:  Framing Error Interrupt Enable */
+#define LPUART_CTRL_NEIE            (1 << 26)  /* Bit 26:  Noise Error Interrupt Enable */
+#define LPUART_CTRL_ORIE            (1 << 27)  /* Bit 27:  Overrun Interrupt Enable */
+#define LPUART_CTRL_TXINV           (1 << 28)  /* Bit 28:  Transmit Data Inversion */
+#define LPUART_CTRL_TXDIR           (1 << 29)  /* Bit 29:  LPUART_TX Pin Direction in Single-Wire Mode */
+#define LPUART_CTRL_R9T8            (1 << 30)  /* Bit 30:  Receive Bit 9 / Transmit Bit 8 */
+#define LPUART_CTRL_R8T9            (1 << 31)  /* Bit 31:  Receive Bit 8 / Transmit Bit 9 */
+
+/* Low Power UART Data Register */
+
+#define LPUART_DATA_SHIFT           (0)        /* Bits 0-9:  Read receive/ write transmit data */
+#define LPUART_DATA_MASK            (0x3ff << LPUART_DATA_SHIFT)
+#define LPUART_DATA8(n)             (((n) & 0xff) << LPUART_DATA_SHIFT)
+#define LPUART_DATA9(n)             (((n) & 0x1ff) << LPUART_DATA_SHIFT)
+#define LPUART_DATA10(n)            (((n) & 0x3ff) << LPUART_DATA_SHIFT)
+#define LPUART_DATA_R0T0            (1 << 0)   /* Bit 0:  Read receive data buffer 0 or write transmit data buffer 0 */
+#define LPUART_DATA_R1T1            (1 << 1)   /* Bit 1:  Read receive data buffer 1 or write transmit data buffer 1 */
+#define LPUART_DATA_R2T2            (1 << 2)   /* Bit 2:  Read receive data buffer 2 or write transmit data buffer 2 */
+#define LPUART_DATA_R3T3            (1 << 3)   /* Bit 3:  Read receive data buffer 3 or write transmit data buffer 3 */
+#define LPUART_DATA_R4T4            (1 << 4)   /* Bit 4:  Read receive data buffer 4 or write transmit data buffer 4 */
+#define LPUART_DATA_R5T5            (1 << 5)   /* Bit 5:  Read receive data buffer 5 or write transmit data buffer 5 */
+#define LPUART_DATA_R6T6            (1 << 6)   /* Bit 6:  Read receive data buffer 6 or write transmit data buffer 6 */
+#define LPUART_DATA_R7T7            (1 << 7)   /* Bit 7:  Read receive data buffer 7 or write transmit data buffer 7 */
+#define LPUART_DATA_R8T8            (1 << 8)   /* Bit 8:  Read receive data buffer 8 or write transmit data buffer 8 */
+#define LPUART_DATA_R9T9            (1 << 9)   /* Bit 9:  Read receive data buffer 9 or write transmit data buffer 9 */
+                                               /* Bit 10:  Reserved */
+#define LPUART_DATA_IDLINE          (1 << 11)  /* Bit 11:  Idle Line */
+#define LPUART_DATA_RXEMPT          (1 << 12)  /* Bit 12:  Receive Buffer Empty */
+#define LPUART_DATA_FRETSC          (1 << 13)  /* Bit 13:  Frame Error / Transmit Special Character */
+#define LPUART_DATA_PARITYE         (1 << 14)  /* Bit 14:  The current received dataword contained in DATA[R9:R0] was received with a parity error */
+#define LPUART_DATA_NOISY           (1 << 15)  /* Bit 15:  The current received dataword contained in DATA[R9:R0] was received with noise */
+                                               /* Bits 16-31:  This field is reserved */
+
+/* Low Power UART Match Address Register */
+
+#define LPUART_MATCH_MA1_SHIFT      (0)        /* Bits 0-9:  Match Address 1 */
+#define LPUART_MATCH_MA1_MASK       (0x3ff << LPUART_MATCH_MA1_SHIFT)
+                                               /* Bits 10-15:  Reserved */
+#define LPUART_MATCH_MA2_SHIFT      (16)       /* Bits 16-25:  Match Address 2 */
+#define LPUART_MATCH_MA2_MASK       (0x3ff << LPUART_MATCH_MA2_SHIFT)
+                                               /* Bits 26-31:  Reserved */
+
+/* Low Power UART Modem IrDA Register */
+
+#define LPUART_MODIR_TXCTSE          (1 << 0)   /* Bit 0:  Transmitter clear-to-send enable */
+#define LPUART_MODIR_TXRTSE          (1 << 1)   /* Bit 1:  Transmitter request-to-send enable */
+#define LPUART_MODIR_TXRTSPOL        (1 << 2)   /* Bit 2:  Transmitter request-to-send polarity */
+#define LPUART_MODIR_RXRTSE          (1 << 3)   /* Bit 3:  Receiver request-to-send enable */
+#define LPUART_MODIR_TXCTSC          (1 << 4)   /* Bit 4:  Transmit CTS Configuration */
+#define LPUART_MODIR_TXCTSSRC        (1 << 5)   /* Bit 5:  Transmit CTS Source */
+                                                /* Bits 6-15:  Reserved */
+#define LPUART_MODIR_TNP_SHIFT       (16)       /* Bits 16-17:  Transmitter narrow pulse */
+#define LPUART_MODIR_TNP_MASK        (3 << LPUART_MODIR_TNP_SHIFT)
+#  define LPUART_MODIR_TNP(n)        (((n)-1) << LPUART_MODIR_TNP_SHIFT) /* n=1-4 */
+#define LPUART_MODIR_IREN            (1 << 18)  /* Bit 18:  Infrared enable */
+                                                /* Bits 19-31:  Reserved */
+
+/****************************************************************************************************
+ * Public Types
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public Data
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public Functions
+ ****************************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_LPUART_H */
diff --git a/arch/arm/src/kinetis/chip/kinetis_mcg.h b/arch/arm/src/kinetis/chip/kinetis_mcg.h
new file mode 100644
index 0000000000000000000000000000000000000000..a319699e24c29fa26cef7f0c87a8af0eca5cb8c6
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_mcg.h
@@ -0,0 +1,436 @@
+/************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_mcg.h
+ *
+ *   Copyright (C) 2011, 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_MCG_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_MCG_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Register Offsets *****************************************************************/
+
+#define KINETIS_MCG_C1_OFFSET       0x0000 /* MCG Control 1 Register */
+#define KINETIS_MCG_C2_OFFSET       0x0001 /* MCG Control 2 Register */
+#define KINETIS_MCG_C3_OFFSET       0x0002 /* MCG Control 3 Register */
+#define KINETIS_MCG_C4_OFFSET       0x0003 /* MCG Control 4 Register */
+#define KINETIS_MCG_C5_OFFSET       0x0004 /* MCG Control 5 Register */
+#define KINETIS_MCG_C6_OFFSET       0x0005 /* MCG Control 6 Register */
+#define KINETIS_MCG_S_OFFSET        0x0006 /* MCG Status Register */
+#if defined(KINETIS_MCG_HAS_ATC) && !defined(KINETIS_MCG_HAS_SC)
+#  define KINETIS_MCG_ATC_OFFSET    0x0008 /* MCG Auto Trim Control Register */
+#endif
+#if defined(KINETIS_MCG_HAS_SC)
+#  define KINETIS_MCG_SC_OFFSET     0x0008 /* MMCG Status and Control Register */
+#endif
+#if defined(KINETIS_MCG_HAS_ATCVH)
+#  define KINETIS_MCG_ATCVH_OFFSET  0x000a /* MCG Auto Trim Compare Value High Register */
+#endif
+#if defined(KINETIS_MCG_HAS_ATCVL)
+#  define KINETIS_MCG_ATCVL_OFFSET  0x000b /* MCG Auto Trim Compare Value Low Register */
+#endif
+#if defined(KINETIS_MCG_HAS_C7)
+#  define KINETIS_MCG_C7_OFFSET     0x000c /* MCG Control 7 Register */
+#endif
+#if defined(KINETIS_MCG_HAS_C8)
+#  define KINETIS_MCG_C8_OFFSET     0x000d /* MCG Control 8 Register */
+#endif
+#if defined(KINETIS_MCG_HAS_C9)
+#  define KINETIS_MCG_C9_OFFSET     0x000e /* MCG Control 9 Register */
+#endif
+#if defined(KINETIS_MCG_HAS_C10)
+#  define KINETIS_MCG_C10_OFFSET    0x000f /* MCG Control 10 Register */
+#endif
+#if defined(KINETIS_MCG_HAS_C11)
+#  define KINETIS_MCG_C11_OFFSET    0x0010 /* MCG Control 11 Register */
+#endif
+#if defined(KINETIS_MCG_HAS_C12)
+#  define KINETIS_MCG_C12_OFFSET    0x0011 /* MCG Control 12 Register */
+#endif
+#if defined(KINETIS_MCG_HAS_S2)
+#  define KINETIS_MCG_S2_OFFSET     0x0012 /* MCG Control S2 Register */
+#endif
+#if defined(KINETIS_MCG_HAS_T3)
+#  define KINETIS_MCG_T3_OFFSET     0x0013 /* MCG Control T3 Register */
+#endif
+
+/* Register Addresses ***************************************************************/
+
+#define KINETIS_MCG_C1            (KINETIS_MCG_BASE+KINETIS_MCG_C1_OFFSET)
+#define KINETIS_MCG_C2            (KINETIS_MCG_BASE+KINETIS_MCG_C2_OFFSET)
+#define KINETIS_MCG_C3            (KINETIS_MCG_BASE+KINETIS_MCG_C3_OFFSET)
+#define KINETIS_MCG_C4            (KINETIS_MCG_BASE+KINETIS_MCG_C4_OFFSET)
+#define KINETIS_MCG_C5            (KINETIS_MCG_BASE+KINETIS_MCG_C5_OFFSET)
+#define KINETIS_MCG_C6            (KINETIS_MCG_BASE+KINETIS_MCG_C6_OFFSET)
+#define KINETIS_MCG_S             (KINETIS_MCG_BASE+KINETIS_MCG_S_OFFSET)
+#if defined(KINETIS_MCG_HAS_ATC) && !defined(KINETIS_MCG_HAS_SC)
+#  define KINETIS_MCG_ATC         (KINETIS_MCG_BASE+KINETIS_MCG_ATC_OFFSET)
+#endif
+#if defined(KINETIS_MCG_HAS_SC)
+#  define KINETIS_MCG_SC          (KINETIS_MCG_BASE+KINETIS_MCG_SC_OFFSET)
+#endif
+#if defined(KINETIS_MCG_HAS_ATCVH)
+#  define KINETIS_MCG_ATCVH       (KINETIS_MCG_BASE+KINETIS_MCG_ATCVH_OFFSET)
+#endif
+#if defined(KINETIS_MCG_HAS_ATCVL)
+#  define KINETIS_MCG_ATCVL       (KINETIS_MCG_BASE+KINETIS_MCG_ATCVL_OFFSET)
+#endif
+#if defined(KINETIS_MCG_HAS_C7)
+#  define KINETIS_MCG_C7          (KINETIS_MCG_BASE+KINETIS_MCG_C7_OFFSET)
+#endif
+#if defined(KINETIS_MCG_HAS_C8)
+#  define KINETIS_MCG_C8          (KINETIS_MCG_BASE+KINETIS_MCG_C8_OFFSET)
+#endif
+#if defined(KINETIS_MCG_HAS_C9)
+#  define KINETIS_MCG_C9          (KINETIS_MCG_BASE+KINETIS_MCG_C9_OFFSET)
+#endif
+#if defined(KINETIS_MCG_HAS_C10)
+#  define KINETIS_MCG_C10         (KINETIS_MCG_BASE+KINETIS_MCG_C10_OFFSET)
+#endif
+#if defined(KINETIS_MCG_HAS_C11)
+#  define KINETIS_MCG_C11         (KINETIS_MCG_BASE+KINETIS_MCG_C11_OFFSET)
+#endif
+#if defined(KINETIS_MCG_HAS_C12)
+#  define KINETIS_MCG_C12         (KINETIS_MCG_BASE+KINETIS_MCG_C12_OFFSET)
+#endif
+#if defined(KINETIS_MCG_HAS_S2)
+#  define KINETIS_MCG_S2          (KINETIS_MCG_BASE+KINETIS_MCG_S2_OFFSET)
+#endif
+#if defined(KINETIS_MCG_HAS_T3)
+#  define KINETIS_MCG_T3          (KINETIS_MCG_BASE+KINETIS_MCG_T3_OFFSET)
+#endif
+
+/* Register Bit Definitions *********************************************************/
+
+/* MCG Control 1 Register (8-bit) */
+
+#define MCG_C1_IREFSTEN             (1 << 0)  /* Bit 0:  Internal Reference Stop Enable */
+#define MCG_C1_IRCLKEN              (1 << 1)  /* Bit 1:  Internal Reference Clock Enable */
+#if defined(KINETIS_MCG_HAS_C1_IREFS)
+#  define MCG_C1_IREFS              (1 << 2)  /* Bit 2:  Internal Reference Select */
+#endif
+#if defined(KINETIS_MCG_HAS_C1_FRDIV)
+#  define MCG_C1_FRDIV_SHIFT        (3)       /* Bits 3-5: FLL External Reference Divider */
+#  define MCG_C1_FRDIV_MASK         (7 << MCG_C1_FRDIV_SHIFT)
+#    define MCG_C1_FRDIV_R0DIV1     (0 << MCG_C1_FRDIV_SHIFT) /* RANGE==0 divider=1 */
+#    define MCG_C1_FRDIV_R0DIV2     (1 << MCG_C1_FRDIV_SHIFT) /* RANGE==0 divider=2 */
+#    define MCG_C1_FRDIV_R0DIV4     (2 << MCG_C1_FRDIV_SHIFT) /* RANGE==0 divider=4 */
+#    define MCG_C1_FRDIV_R0DIV8     (3 << MCG_C1_FRDIV_SHIFT) /* RANGE==0 divider=8 */
+#    define MCG_C1_FRDIV_R0DIV16    (4 << MCG_C1_FRDIV_SHIFT) /* RANGE==0 divider=16 */
+#    define MCG_C1_FRDIV_R0DIV32    (5 << MCG_C1_FRDIV_SHIFT) /* RANGE==0 divider=32 */
+#    define MCG_C1_FRDIV_R0DIV64    (6 << MCG_C1_FRDIV_SHIFT) /* RANGE==0 divider=64 */
+#    define MCG_C1_FRDIV_R0DIV128   (7 << MCG_C1_FRDIV_SHIFT) /* RANGE==0 divider=128 */
+#    define MCG_C1_FRDIV_DIV32      (0 << MCG_C1_FRDIV_SHIFT) /* RANGE!=0 divider=32 */
+#    define MCG_C1_FRDIV_DIV64      (1 << MCG_C1_FRDIV_SHIFT) /* RANGE!=0 divider=64 */
+#    define MCG_C1_FRDIV_DIV128     (2 << MCG_C1_FRDIV_SHIFT) /* RANGE!=0 divider=128 */
+#    define MCG_C1_FRDIV_DIV256     (3 << MCG_C1_FRDIV_SHIFT) /* RANGE!=0 divider=256 */
+#    define MCG_C1_FRDIV_DIV512     (4 << MCG_C1_FRDIV_SHIFT) /* RANGE!=0 divider=512 */
+#    define MCG_C1_FRDIV_DIV1024    (5 << MCG_C1_FRDIV_SHIFT) /* RANGE!=0 divider=1024 */
+#    if KINETIS_MCG_C1_FRDIV_MAX > 5
+#      define MCG_C1_FRDIV_DIV1280  (6 << MCG_C1_FRDIV_SHIFT) /* RANGE!=0 divider=1280 */
+#    endif
+#    if KINETIS_MCG_C1_FRDIV_MAX > 6
+#      define MCG_C1_FRDIV_DIV1536  (7 << MCG_C1_FRDIV_SHIFT) /* RANGE!=0 divider=1536 */
+#    endif
+#endif /* defined (KINETIS_MCG_HAS  _C1_FRDIV) */
+#define MCG_C1_CLKS_SHIFT           (6)       /* Bits 6-7: Clock Source Select */
+#define MCG_C1_CLKS_MASK            (3 << MCG_C1_CLKS_SHIFT)
+#  define MCG_C1_CLKS_PLL           (0 << MCG_C1_CLKS_SHIFT) /* FLL or PLL output */
+#  define MCG_C1_CLKS_INTREF        (1 << MCG_C1_CLKS_SHIFT) /* Internal reference clock */
+#  define MCG_C1_CLKS_EXTREF        (2 << MCG_C1_CLKS_SHIFT) /* External reference clock */
+
+/* MCG Control 2 Register */
+
+#define MCG_C2_IRCS                 (1 << 0)  /* Bit 0:  Internal Reference Clock Select */
+#define MCG_C2_LP                   (1 << 1)  /* Bit 1:  Low Power Select */
+#define MCG_C2_EREFS                (1 << 2)  /* Bit 2:  External Reference Select */
+#if defined(KINETIS_MCG_HAS_C2_HGO)
+#  define MCG_C2_HGO                (1 << 3)  /* Bit 3:  High Gain Oscillator Select */
+#endif
+#if defined(KINETIS_MCG_HAS_C2_RANGE)
+#  define MCG_C2_RANGE_SHIFT        (4)       /* Bits 4-5: Frequency Range Select */
+#  define MCG_C2_RANGE_MASK         (3 << MCG_C2_RANGE_SHIFT)
+#    define MCG_C2_RANGE_LOW        (0 << MCG_C2_RANGE_SHIFT) /* Oscillator of 32 kHz to 40 kHz  */
+#    define MCG_C2_RANGE_HIGH       (1 << MCG_C2_RANGE_SHIFT) /* Oscillator of 1 MHz to 8 MHz */
+#    define MCG_C2_RANGE_VHIGH      (2 << MCG_C2_RANGE_SHIFT) /* Oscillator of 8 MHz to 32 MHz */
+#endif
+#if defined(KINETIS_MCG_HAS_C2_FCFTRIM)
+#  define MCG_C2_FCFTRIM            (1 << 6)  /* Bit 6:  Fast Internal Reference Clock Fine Trim */
+#endif
+#if defined(KINETIS_MCG_HAS_C2_LOCRE0)
+#  define MCG_C2_LOCRE0             (1 << 7)  /* Bit 7: Loss of Clock Reset Enable */
+#endif
+
+/* MCG Control 3 Register (8-bit Slow Internal Reference Clock Trim Setting) */
+
+/* MCG Control 4 Register (8-bit) */
+
+#define MCG_C4_SCFTRIM              (1 << 0)  /* Bit 0:  Slow Internal Reference Clock Fine Trim */
+#define MCG_C4_FCTRIM_SHIFT         (1)       /* Bits 1-4: Fast Internal Reference Clock Trim Setting */
+#define MCG_C4_FCTRIM_MASK          (15 << MCG_C4_FCTRIM_SHIFT)
+#define MCG_C4_DRST_DRS_SHIFT       (5)       /* Bits 5-6: DCO Range Select */
+#define MCG_C4_DRST_DRS_MASK        (3 << MCG_C4_DRST_DRS_SHIFT)
+#  define MCG_C4_DRST_DRS_LOW       (00 << MCG_C4_DRST_DRS_SHIFT)
+#  define MCG_C4_DRST_DRS_MID       (01 << MCG_C4_DRST_DRS_SHIFT)
+#  define MCG_C4_DRST_DRS_MIDHIGH   (10 << MCG_C4_DRST_DRS_SHIFT)
+#  define MCG_C4_DRST_DRS_HIGH      (11 << MCG_C4_DRST_DRS_SHIFT)
+#define MCG_C4_DMX32                (1 << 7)  /* Bit 7:  DCO Maximum Frequency with 32.768 kHz Reference */
+
+/* MCG Control 5 Register */
+
+#if defined(KINETIS_MCG_HAS_C5_PRDIV)
+#  define MCG_C5_PRDIV_SHIFT        (0)       /* Bits 0-[2|4]: PLL External Reference Divider */
+#  define MCG_C5_PRDIV_MASK         (KINETIS_MCG_C5_PRDIV_MASK << MCG_C5_PRDIV_SHIFT)
+#  define MCG_C5_PRDIV(n)           ((((n) & KINETIS_MCG_C5_PRDIV_MASK)-KINETIS_MCG_C5_PRDIV_BASE) << MCG_C5_PRDIV_SHIFT) /* n=KINETIS_MCG_C5_PRDIV_BASE..KINETIS_MCG_C5_PRDIV_MAX */
+#endif
+#define MCG_C5_PLLSTEN              (1 << 5)  /* Bit 5:  PLL Stop Enable */
+#define MCG_C5_PLLCLKEN             (1 << 6)  /* Bit 6:  PLL Clock Enable */
+#if defined(KINETIS_MCG_HAS_C5_PLLREFSEL0)
+#  define MCG_C5_PLLREFSEL0         (1 << 7)  /* Bit 7:  PLL0 External Reference Select */
+#endif
+
+/* MCG Control 6 Register */
+#if defined(KINETIS_MCG_HAS_C6_VDIV)
+#  define MCG_C6_VDIV_SHIFT         (0)       /* Bits 0-4: VCO Divider */
+#  define MCG_C6_VDIV_MASK          (31 << MCG_C6_VDIV_SHIFT)
+#  define MCG_C6_VDIV(n)            (((n)-KINETIS_MCG_C6_VDIV_BASE) << MCG_C6_VDIV_SHIFT) /* n=KINETIS_MCG_C6_VDIV_BASE..KINETIS_MCG_C6_VDIV_MAX */
+#endif
+#if defined(KINETIS_MCG_HAS_C6_CME)
+#  define MCG_C6_CME                (1 << 5)  /* Bit 5:  Clock Monitor Enable */
+#endif
+#if defined(KINETIS_MCG_HAS_C6_PLLS)
+#  define MCG_C6_PLLS               (1 << 6)  /* Bit 6:  PLL Select */
+#endif
+#if defined(KINETIS_MCG_HAS_C6_LOLIE0)
+#  define MCG_C6__LOLIE0            (1 << 7)  /* Bit 7:  Loss of Lock Interrupt Enable */
+#endif
+
+/* MCG Status Register */
+
+#if defined(KINETIS_MCG_HAS_S)
+#  define MCG_S_IRCST               (1 << 0)  /* Bit 0:  Internal Reference Clock Status */
+#  define MCG_S_OSCINIT             (1 << 1)  /* Bit 1:  OSC Initialization */
+#  define MCG_S_CLKST_SHIFT         (2)       /* Bits 2-3: Clock Mode Status */
+#  define MCG_S_CLKST_MASK          (3 << MCG_S_CLKST_SHIFT)
+#    define MCG_S_CLKST_FLL         (0 << MCG_S_CLKST_SHIFT) /* Output of the FLL */
+#    define MCG_S_CLKST_INTREF      (1 << MCG_S_CLKST_SHIFT) /* Internal reference clock */
+#    define MCG_S_CLKST_EXTREF      (2 << MCG_S_CLKST_SHIFT) /* External reference clock */
+#    define MCG_S_CLKST_PLL         (3 << MCG_S_CLKST_SHIFT) /* Output of the PLL */
+#  define MCG_S_IREFST              (1 << 4)  /* Bit 4:  Internal Reference Status */
+#  if defined(KINETIS_MCG_HAS_S_PLLST)
+#    define MCG_S_PLLST             (1 << 5)  /* Bit 5:  PLL Select Status */
+#  endif
+#  if defined(KINETIS_MCG_HAS_S_LOCK0)
+#    define MCG_S_LOCK0             (1 << 6)  /* Bit 6:  Lock Status */
+#  endif
+#  if defined(KINETIS_MCG_HAS_S_LOLS)
+#    define MCG_S_LOLS              (1 << 7)  /* Bit 7:  Loss of Lock Status */
+#  endif
+#endif
+
+/* MCG Auto Trim Control Register */
+
+#if defined(KINETIS_MCG_HAS_ATC) && !defined(KINETIS_MCG_HAS_SC)
+                                              /* Bits 0-4: Reserved */
+#  define MCG_ATC_ATMF              (1 << 5)  /* Bit 5:  Automatic Trim machine Fail Flag */
+#  define MCG_ATC_ATMS              (1 << 6)  /* Bit 6:  Automatic Trim Machine Select */
+#  define MCG_ATC_ATME              (1 << 7)  /* Bit 7:  Automatic Trim Machine Enable */
+#endif
+
+/* MCG Auto Trim Compare Value High/Low Registers (8-bit compare value) */
+
+#if defined(KINETIS_MCG_HAS_SC)
+#  define MCG_SC_LOCS0              (1 << 0)  /* Bit 0:  OSC0 Loss of Clock Status */
+#  define MCG_SC_FCRDIV_SHIFT       (1)       /* Bits 1-3: Fast Clock Internal Reference Divider */
+#  define MCG_SC_FCRDIV_MASK        (7 << MCG_SC_FLTPRSRV_SHIFT)
+#  define MCG_SC_FCRDIV(n)          (((n)) << MCG_SC_FLTPRSRV_SHIFT)  /* n=0..7 */
+#  define MCG_SC_FCRDIV_1           (0 << MCG_SC_FLTPRSRV_SHIFT)  /* Divide Factor is 1 */
+#  define MCG_SC_FCRDIV_2           (1 << MCG_SC_FLTPRSRV_SHIFT)  /* Divide Factor is 2 */
+#  define MCG_SC_FCRDIV_4           (2 << MCG_SC_FLTPRSRV_SHIFT)  /* Divide Factor is 4 */
+#  define MCG_SC_FCRDIV_8           (3 << MCG_SC_FLTPRSRV_SHIFT)  /* Divide Factor is 8 */
+#  define MCG_SC_FCRDIV_16          (4 << MCG_SC_FLTPRSRV_SHIFT)  /* Divide Factor is 16 */
+#  define MCG_SC_FCRDIV_32          (5 << MCG_SC_FLTPRSRV_SHIFT)  /* Divide Factor is 32 */
+#  define MCG_SC_FCRDIV_64          (6 << MCG_SC_FLTPRSRV_SHIFT)  /* Divide Factor is 64 */
+#  define MCG_SC_FCRDIV_128         (7 << MCG_SC_FLTPRSRV_SHIFT)  /* Divide Factor is 128 */
+#  define MCG_SC_FLTPRSRV           (1 << 4)  /* Bit 4:  FLL Filter Preserve Enable */
+#  if defined(KINETIS_MCG_HAS_SC_ATMF)
+#    define MCG_SC_ATMF             (1 << 5)  /* Bit 5:  Automatic Trim machine Fail Flag */
+#  endif
+#  if defined(KINETIS_MCG_HAS_SC_ATMS)
+#    define MCG_SC_ATMS             (1 << 6)  /* Bit 6:  Automatic Trim Machine Select */
+#  endif
+#  if defined(KINETIS_MCG_HAS_SC_ATME)
+#    define MCG_ASC_ATME            (1 << 7)  /* Bit 7:  Automatic Trim Machine Enable */
+#  endif
+#endif
+
+/* MCG Control 7 Register */
+
+#if defined(KINETIS_MCG_HAS_C7)
+#  if defined(KINETIS_MCG_HAS_C7_OSCSEL)
+#    define MCG_C7_OSCSEL_SHIFT    (0)        /* Bits 0-[1]: MCG OSC Clock Select */
+#    define MCG_C7_OSCSEL_MASK     (KINETIS_MCG_C7_OSCSEL_MASK << MCG_C7_OSCSEL_SHIFT)
+#    define MCG_C7_OSCSEL_OSCCLK   (0 << MCG_C7_OSCSEL_SHIFT)  /* Selects Oscillator (OSCCLK) */
+#    define MCG_C7_OSCSEL_32KHZ    (1 << MCG_C7_OSCSEL_SHIFT)  /* Selects 32 kHz RTC Oscillator */
+#    if (KINETIS_MCG_C7_OSCSEL_MASK & 2) != 0
+#      define MCG_C7_OSCSEL_OSCCLK1  (2 << MCG_C7_OSCSEL_SHIFT)  /* Selects Oscillator (OSCCLK1). */
+#    endif
+#  endif
+#endif
+
+/* MCG Control 8 Register */
+
+#if defined(KINETIS_MCG_HAS_C8)
+#  if defined(KINETIS_MCG_HAS_C8_LOCS1)
+#    define MCG_C8_LOCS1           (1 << 0)   /* Bit 0: RTC Loss of Clock Status */
+#  endif
+                                              /* Bits 1-4: Reserved */
+#  if defined(KINETIS_MCG_HAS_C8_CME1)
+#    define MCG_C8_CME1             (1 << 5)  /* Bit 5:  Clock Monitor Enable1 */
+#  endif
+#  if defined(KINETIS_MCG_HAS_C8_LOLRE)
+#    define MCG_C8_LOLRE            (1 << 6)  /* Bit 6:  PLL Loss of Lock Reset Enable */
+#  endif
+#  if defined(KINETIS_MCG_HAS_C8_LOCRE1)
+#    define MCG_C8_LOCRE1           (1 << 7)  /* Bit 7:  Loss of Clock Reset Enable */
+#  endif
+#endif
+
+/* MCG Control 9 Register */
+
+#if defined(KINETIS_MCG_HAS_C9)
+#  if defined(KINETIS_MCG_HAS_C9_EXT_PLL_LOCS)
+#    define MCG_C9_EXT_PLL_LOCS     (1 << 0)  /* Bit 0: External PLL Loss of Clock Status */
+#  endif
+                                              /* Bits 1-3: Reserved */
+#  if defined(KINETIS_MCG_HAS_C9_PLL_LOCRE)
+#    define MCG_C9_EXT_PLL_LOCRE    (1 << 4)  /* Bit 4: MCG External PLL Loss of Clock Reset Enable */
+#  endif
+#  if defined(KINETIS_MCG_HAS_C9_PLL_CME)
+#    define MCG_C9_EXT_C9_PLL_CME   (1 << 5)  /* Bit 5: MCG External PLL Clock Monitor Enable */
+#  endif
+                                              /* Bits 6-7: Reserved */
+#endif
+
+/* MCG Control 10 Register */
+
+#if defined(KINETIS_MCG_HAS_C10)
+                                              /* Bits 0-[1]: Reserved */
+#  if defined(KINETIS_MCG_HAS_C10_LOCS1)
+#    define MCG_C10_LOCS1_SHIFT     (1 << 1)  /* Bit 1: RTC Loss of Clock Status */
+#  endif
+#  define MCG_C10_EREFS1            (1 << 2)  /* Bit 2:  External Reference Select */
+#  define MCG_C10_HGO1              (1 << 3)  /* Bit 3:  High Gain Oscillator1 Select */
+#  define MCG_C10_RANGE1_SHIFT      (4)       /* Bits 4-5: Frequency Range1 Select */
+#  define MCG_C10_RANGE_MASK        (3 << MCG_C10_RANGE_SHIFT)
+#    define MCG_C10_RANGE_LOW       (0 << MCG_C10_RANGE_SHIFT) /* Oscillator of 32 kHz to 40 kHz  */
+#    define MCG_C10_RANGE_HIGH      (1 << MCG_C10_RANGE_SHIFT) /* Oscillator of 1 MHz to 8 MHz */
+#    define MCG_C10_RANGE_VHIGH     (2 << MCG_C10_RANGE_SHIFT) /* Oscillator of 8 MHz to 32 MHz */
+                                              /* Bit 6: Reserved */
+#  define MCG_C10_LOCRE2            (1 << 7)  /* Bit 7: OSC1 Loss of Clock Reset Enable */
+#endif
+
+/* MCG Control 11 Register */
+
+#if defined(KINETIS_MCG_HAS_C11)
+#  if defined(KINETIS_MCG_HAS_C11_PLL1OSC1)
+#    define MCG_C11_PRDIV1_SHIFT    (0)       /* Bits 0-2: PLL1 External Reference Divider */
+#    define MCG_C11_PRDIV1_MASK     (7 << MCG_C11_PRDIV1_SHIFT)
+#    define MCG_C11_PRDIV1(n)       (((n)-1) << MCG_C11_PRDIV_SHIFT) /* 1..8 */
+#  endif
+                                              /* Bit 3: Reserved */
+#  if defined(KINETIS_MCG_HAS_C11_PLLCS)
+#    define MCG_C11_PLLCS           (1 << 4)  /* Bit 4:  PLL Clock Select */
+#  endif
+#  if defined(KINETIS_MCG_HAS_C11_PLL1OSC1)
+#    define MCG_C11_PLLSTEN1        (1 << 5)  /* Bit 5:  PLL1 Stop Enable */
+#    define MCG_C11_PLLCLKEN1       (1 << 6)  /* Bit 6:  PLL1 Clock Enable */
+#  endif
+#  if defined(KINETIS_MCG_HAS_C11_PLLREFSEL1)
+#    define MCG_C11_PLLREFSEL1      (1 << 7)  /* Bit 7:  PLL1 External Reference Select */
+#  endif
+#endif
+
+/* MCG Control 12 Register */
+
+#if defined(KINETIS_MCG_HAS_C12)
+#  define MCG_C12_VDIV1_SHIFT       (0)       /* Bits 0-4: VCO Divider */
+#  define MCG_C12_VDIV1_MASK        (31 << MCG_C12_VDIV1_SHIFT)
+#  define MCG_C12_VDIV(n)           (((n)-16) << MCG_C12_VDIV1_SHIFT) /* n=16..47 */
+#  define MCG_C12_CME2              (1 << 5)  /* Bit 5:  Clock Monitor Enable2 */
+                                              /* Bit 6: Reserved */
+#define MCG_C12_LOLIE1              (1 << 7)  /* Bit 7:  PLL1 Loss of Lock Interrupt Enable */
+#endif
+
+/* MCG Control S2 Register */
+
+#if defined(KINETIS_MCG_HAS_S2)
+#  if defined(KINETIS_MCG_HAS_S2_PLL1OSC1)
+#    define MCG_S2_LOCS2_SHIFT      (1 << 0)  /* Bit 0: OSC1 Loss of Clock Status */
+#    define MCG_S2_OSCINIT1         (1 << 1)  /* Bit 1: OSC1 Initialization */
+#  endif
+                                              /* Bits 2-3: Reserved */
+#  if defined(KINETIS_MCG_HAS_S2_PLLCST)
+#    define MCG_S2_PLLCST           (1 << 4)  /* Bit 4: PLL Clock Select Status */
+#  endif
+                                              /* Bit 5: Reserved */
+#  if defined(KINETIS_MCG_HAS_S2_PLL1OSC1)
+#    define MCG_S2_LOCK1            (1 << 6)  /* Bit 6: Lock1 Status */
+#    define MCG_S2_LOLS1            (1 << 7)  /* Bit 7: Loss of Lock1 Status */
+#  endif
+#endif
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_MCG_H */
diff --git a/arch/arm/src/kinetis/kinetis_mcm.h b/arch/arm/src/kinetis/chip/kinetis_mcm.h
similarity index 94%
rename from arch/arm/src/kinetis/kinetis_mcm.h
rename to arch/arm/src/kinetis/chip/kinetis_mcm.h
index d899b77027ac135150314bfaf214ef3cc7ba6c29..f46305056ef84f13d7cc8766a0ecfdaf26c45f9e 100644
--- a/arch/arm/src/kinetis/kinetis_mcm.h
+++ b/arch/arm/src/kinetis/chip/kinetis_mcm.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/kinetis/kinetis_mcm.h
+ * arch/arm/src/kinetis/chip/kinetis_mcm.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_MCM_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_MCM_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_MCM_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_MCM_H
 
 /************************************************************************************
  * Included Files
@@ -57,6 +57,9 @@
 #define KINETIS_MCM_ETBCC_OFFSET    0x0014 /* ETB counter control register */
 #define KINETIS_MCM_ETBRL_OFFSET    0x0018 /* ETB reload register */
 #define KINETIS_MCM_ETBCNT_OFFSET   0x001c /* ETB counter value register */
+#ifdef KINETIS_K64
+#  define KINETIS_MCM_PID_OFFSET    0x0030 /* Process ID register */
+#endif
 
 /* Register Addresses ***************************************************************/
 
@@ -67,6 +70,9 @@
 #define KINETIS_MCM_ETBCC           (KINETIS_MCM_BASE+KINETIS_MCM_ETBCC_OFFSET)
 #define KINETIS_MCM_ETBRL           (KINETIS_MCM_BASE+KINETIS_MCM_ETBRL_OFFSET)
 #define KINETIS_MCM_ETBCNT          (KINETIS_MCM_BASE+KINETIS_MCM_ETBCNT_OFFSET)
+#ifdef KINETIS_K64
+#  define KINETIS_MCM_PID           (KINETIS_MCM_BASE+KINETIS_MCM_PID_OFFSET)
+#endif
 
 /* Register Bit Definitions *********************************************************/
 
@@ -148,4 +154,4 @@
  * Public Functions
  ************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_MCM_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_MCM_H */
diff --git a/arch/arm/src/kinetis/chip/kinetis_memorymap.h b/arch/arm/src/kinetis/chip/kinetis_memorymap.h
new file mode 100644
index 0000000000000000000000000000000000000000..2cc6d11dc878a347544a52695cd09dae82c78998
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_memorymap.h
@@ -0,0 +1,81 @@
+/********************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_memorymap.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_MEMORYMAP_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_MEMORYMAP_H
+
+/********************************************************************************************
+ * Included Files
+ ********************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/* This file is just a wrapper around pin muxing header files for the Kinetis family selected
+ * by the logic in chip.h.
+ */
+
+#if defined(KINETIS_K20)
+#  include "chip/kinetis_k20memorymap.h"
+#elif defined(KINETIS_K40)
+#  include "chip/kinetis_k40memorymap.h"
+#elif defined(KINETIS_K60)
+#  include "chip/kinetis_k60memorymap.h"
+#elif defined(KINETIS_K64)
+#  include "chip/kinetis_k64memorymap.h"
+#elif defined(KINETIS_K66)
+#  include "chip/kinetis_k66memorymap.h"
+#else
+#  error "No memory map for this Kinetis part"
+#endif
+
+/********************************************************************************************
+ * Pre-processor Definitions
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Public Types
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Public Data
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Public Functions
+ ********************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_MEMORYMAP_H */
diff --git a/arch/arm/src/kinetis/kinetis_mmcau.h b/arch/arm/src/kinetis/chip/kinetis_mmcau.h
similarity index 89%
rename from arch/arm/src/kinetis/kinetis_mmcau.h
rename to arch/arm/src/kinetis/chip/kinetis_mmcau.h
index 7468a1d0bfe3b3563918e57adf8a99bdfb0aed86..90c9cf6552cdf60eafd0b00f4d924d3aac2f2326 100644
--- a/arch/arm/src/kinetis/kinetis_mmcau.h
+++ b/arch/arm/src/kinetis/chip/kinetis_mmcau.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/kinetis/kinetis_mmcau.h
+ * arch/arm/src/kinetis/chip/kinetis_mmcau.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_MMCAU_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_MMCAU_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_MMCAU_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_MMCAU_H
 
 /************************************************************************************
  * Included Files
@@ -61,9 +61,11 @@
 #define KINETIS_CAU_CA3_OFFSET   0x0005  /* General Purpose Register 3 */
 #define KINETIS_CAU_CA4_OFFSET   0x0006  /* General Purpose Register 4 */
 #define KINETIS_CAU_CA5_OFFSET   0x0007  /* General Purpose Register 5 */
-#define KINETIS_CAU_CA6_OFFSET   0x0008  /* General Purpose Register 6 */
-#define KINETIS_CAU_CA7_OFFSET   0x0009  /* General Purpose Register 7 */
-#define KINETIS_CAU_CA8_OFFSET   0x000a  /* General Purpose Register 8 */
+#ifndef KINETIS_K64
+#  define KINETIS_CAU_CA6_OFFSET 0x0008  /* General Purpose Register 6 */
+#  define KINETIS_CAU_CA7_OFFSET 0x0009  /* General Purpose Register 7 */
+#  define KINETIS_CAU_CA8_OFFSET 0x000a  /* General Purpose Register 8 */
+#endif
 
 /* Register Addresses ***************************************************************/
 
@@ -77,9 +79,11 @@
 #define KINETIS_CAU_CA3          (KINETIS_MMCAU_BASE+KINETIS_CAU_CA3_OFFSET)
 #define KINETIS_CAU_CA4          (KINETIS_MMCAU_BASE+KINETIS_CAU_CA4_OFFSET)
 #define KINETIS_CAU_CA5          (KINETIS_MMCAU_BASE+KINETIS_CAU_CA5_OFFSET)
-#define KINETIS_CAU_CA6          (KINETIS_MMCAU_BASE+KINETIS_CAU_CA6_OFFSET)
-#define KINETIS_CAU_CA7          (KINETIS_MMCAU_BASE+KINETIS_CAU_CA7_OFFSET)
-#define KINETIS_CAU_CA8          (KINETIS_MMCAU_BASE+KINETIS_CAU_CA8_OFFSET)
+#ifndef KINETIS_K64
+#  define KINETIS_CAU_CA6        (KINETIS_MMCAU_BASE+KINETIS_CAU_CA6_OFFSET)
+#  define KINETIS_CAU_CA7        (KINETIS_MMCAU_BASE+KINETIS_CAU_CA7_OFFSET)
+#  define KINETIS_CAU_CA8        (KINETIS_MMCAU_BASE+KINETIS_CAU_CA8_OFFSET)
+#endif
 
 /* Register Bit Definitions *********************************************************/
 
@@ -135,4 +139,4 @@
  ************************************************************************************/
 
 #endif /* KINETIS_NMMCAU && KINETIS_NMMCAU > 0 */
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_MMCAU_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_MMCAU_H */
diff --git a/arch/arm/src/kinetis/chip/kinetis_mpu.h b/arch/arm/src/kinetis/chip/kinetis_mpu.h
new file mode 100644
index 0000000000000000000000000000000000000000..50a4593238ecfc30fe5349a41d1ad0f6bcbc97cf
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_mpu.h
@@ -0,0 +1,75 @@
+/********************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_mpu.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_MPU_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_MPU_H
+
+/********************************************************************************************
+ * Included Files
+ ********************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/* This file is just a wrapper around pin muxing header files for the Kinetis family selected
+ * by the logic in chip.h.
+ */
+
+#if defined(KINETIS_K20) || defined(KINETIS_K40) || defined(KINETIS_K60)
+#  include "chip/kinetis_k20k40k60mpu.h"
+#elif defined(KINETIS_K64) || defined(KINETIS_K66)
+#  include "chip/kinetis_k64k66mpu.h"
+#else
+#  error "No MPU definitions for this Kinetis part"
+#endif
+
+/********************************************************************************************
+ * Pre-processor Definitions
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Public Types
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Public Data
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Public Functions
+ ********************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_MPU_H */
diff --git a/arch/arm/src/kinetis/kinetis_osc.h b/arch/arm/src/kinetis/chip/kinetis_osc.h
similarity index 93%
rename from arch/arm/src/kinetis/kinetis_osc.h
rename to arch/arm/src/kinetis/chip/kinetis_osc.h
index 16efcf328266055cf0ac411838a8b948dd520f93..69a7b8a30c8cabb5d7fd8ea17946893363f1437e 100644
--- a/arch/arm/src/kinetis/kinetis_osc.h
+++ b/arch/arm/src/kinetis/chip/kinetis_osc.h
@@ -1,7 +1,7 @@
 /********************************************************************************************
- * arch/arm/src/kinetis/kinetis_osc.h
+ * arch/arm/src/kinetis/chip/kinetis_osc.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ********************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_OSC_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_OSC_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIHP_KINETIS_OSC_H
+#define __ARCH_ARM_SRC_KINETIS_CHIHP_KINETIS_OSC_H
 
 /********************************************************************************************
  * Included Files
@@ -81,4 +81,4 @@
  * Public Functions
  ********************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_OSC_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIHP_KINETIS_OSC_H */
diff --git a/arch/arm/src/kinetis/kinetis_pdb.h b/arch/arm/src/kinetis/chip/kinetis_pdb.h
similarity index 95%
rename from arch/arm/src/kinetis/kinetis_pdb.h
rename to arch/arm/src/kinetis/chip/kinetis_pdb.h
index 9cfab9b99f187b3dbe0440f2c486d32c84784ce5..d0238240dfabe07583762fbc2a77cc1d94fbb4bd 100644
--- a/arch/arm/src/kinetis/kinetis_pdb.h
+++ b/arch/arm/src/kinetis/chip/kinetis_pdb.h
@@ -1,7 +1,7 @@
 /********************************************************************************************
- * arch/arm/src/kinetis/kinetis_pdb.h
+ * arch/arm/src/kinetis/chip/kinetis_pdb.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ********************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_PDB_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_PDB_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PDB_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PDB_H
 
 /********************************************************************************************
  * Included Files
@@ -83,6 +83,10 @@
 
 #define KINETIS_PDB_PO0EN_OFFSET     0x0190 /* Pulse-Out 0 Enable Register */
 #define KINETIS_PDB_PO0DLY_OFFSET    0x0194 /* Pulse-Out 0 Delay Register */
+#ifdef KINETIS_K64
+#  define KINETIS_PDB_PO1DLY_OFFSET  0x0198 /* Pulse-Out 1 Delay Register */
+#  define KINETIS_PDB_PO2DLY_OFFSET  0x019c /* Pulse-Out 2 Delay Register */
+#endif
 
 /* Register Addresses ***********************************************************************/
 
@@ -119,6 +123,10 @@
 
 #define KINETIS_PDB0_PO0EN           (KINETIS_PDB0_BASE+KINETIS_PDB_PO0EN_OFFSET)
 #define KINETIS_PDB0_PO0DLY          (KINETIS_PDB0_BASE+KINETIS_PDB_PO0DLY_OFFSET)
+#ifdef KINETIS_K64
+#  define KINETIS_PDB0_PO1DLY        (KINETIS_PDB0_BASE+KINETIS_PDB_PO1DLY_OFFSET)
+#  define KINETIS_PDB0_PO2DLY        (KINETIS_PDB0_BASE+KINETIS_PDB_PO2DLY_OFFSET)
+#endif
 
 /* Register Bit Definitions *****************************************************************/
 
@@ -252,4 +260,4 @@
  * Public Functions
  ********************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_PDB_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PDB_H */
diff --git a/arch/arm/src/kinetis/kinetis_pinmux.h b/arch/arm/src/kinetis/chip/kinetis_pinmux.h
similarity index 85%
rename from arch/arm/src/kinetis/kinetis_pinmux.h
rename to arch/arm/src/kinetis/chip/kinetis_pinmux.h
index 589184ffdd2ceb507fa865da22fd9f0b37d54bb0..98849272e4e8e38947663b2ba9725f8fb9c1232d 100644
--- a/arch/arm/src/kinetis/kinetis_pinmux.h
+++ b/arch/arm/src/kinetis/chip/kinetis_pinmux.h
@@ -1,7 +1,7 @@
 /********************************************************************************************
- * arch/arm/src/kinetis/kinetis_pinmux.h
+ * arch/arm/src/kinetis/chip/kinetis_pinmux.h
  *
- *   Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ********************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_PINMUX_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_PINMUX_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PINMUX_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PINMUX_H
 
 /********************************************************************************************
  * Included Files
@@ -49,11 +49,15 @@
  */
 
 #if defined(KINETIS_K20)
-#  include "kinetis_k20pinmux.h"
+#  include "chip/kinetis_k20pinmux.h"
 #elif defined(KINETIS_K40)
-#  include "kinetis_k40pinmux.h"
+#  include "chip/kinetis_k40pinmux.h"
 #elif defined(KINETIS_K60)
-#  include "kinetis_k60pinmux.h"
+#  include "chip/kinetis_k60pinmux.h"
+#elif defined(KINETIS_K64)
+#  include "chip/kinetis_k64pinmux.h"
+#elif defined(KINETIS_K66)
+#  include "chip/kinetis_k66pinmux.h"
 #else
 #  error "No pin multiplexing for this Kinetis part"
 #endif
@@ -74,4 +78,4 @@
  * Public Functions
  ********************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_PINMUX_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PINMUX_H */
diff --git a/arch/arm/src/kinetis/kinetis_pit.h b/arch/arm/src/kinetis/chip/kinetis_pit.h
similarity index 96%
rename from arch/arm/src/kinetis/kinetis_pit.h
rename to arch/arm/src/kinetis/chip/kinetis_pit.h
index 808508f8fedd17be9e6af540338c248095be02fc..26cd6caea6dd16ed146060852473da3708811cb9 100644
--- a/arch/arm/src/kinetis/kinetis_pit.h
+++ b/arch/arm/src/kinetis/chip/kinetis_pit.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/kinetis/kinetis_pit.h
+ * arch/arm/src/kinetis/chip/kinetis_pit.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_PIT_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_PIT_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PIT_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PIT_H
 
 /************************************************************************************
  * Included Files
@@ -121,4 +121,4 @@
  * Public Functions
  ************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_PIT_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PIT_H */
diff --git a/arch/arm/src/kinetis/kinetis_pmc.h b/arch/arm/src/kinetis/chip/kinetis_pmc.h
similarity index 82%
rename from arch/arm/src/kinetis/kinetis_pmc.h
rename to arch/arm/src/kinetis/chip/kinetis_pmc.h
index 065847da3d5a6f5bc702e8f7f44b8b1d7273ccad..be346bf67fe154d0cc48fa3c8a718f34dffc84bc 100644
--- a/arch/arm/src/kinetis/kinetis_pmc.h
+++ b/arch/arm/src/kinetis/chip/kinetis_pmc.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/kinetis/kinetis_pmc.h
+ * arch/arm/src/kinetis/chip/kinetis_pmc.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_PMC_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_PMC_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PMC_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PMC_H
 
 /************************************************************************************
  * Included Files
@@ -78,22 +78,33 @@
 
 #define PMC_LVDSC2_LVWV_SHIFT     (0)       /* Bits 0-1: Low-Voltage Warning Voltage Select */
 #define PMC_LVDSC2_LVWV_MASK      (3 << PMC_LVDSC2_LVWV_SHIFT)
-#  define PMC_LVDSC2_LVWV_ LOW    (0 << PMC_LVDSC2_LVWV_SHIFT) /* Low trip point selected (VLVW = VLVW1H/L) */
-#  define PMC_LVDSC2_LVWV_ MID1   (1 << PMC_LVDSC2_LVWV_SHIFT) /* Mid 1 trip point selected (VLVW = VLVW2H/L) */
-#  define PMC_LVDSC2_LVWV_ MID2   (2 << PMC_LVDSC2_LVWV_SHIFT) /* Mid 2 trip point selected (VLVW = VLVW3H/L) */
-#  define PMC_LVDSC2_LVWV_ HIGH   (3 << PMC_LVDSC2_LVWV_SHIFT) /* High trip point selected (VLVW = VLVW4H/L) */
+#  define PMC_LVDSC2_LVWV_LOW     (0 << PMC_LVDSC2_LVWV_SHIFT) /* Low trip point selected (VLVW = VLVW1H/L) */
+#  define PMC_LVDSC2_LVWV_MID1    (1 << PMC_LVDSC2_LVWV_SHIFT) /* Mid 1 trip point selected (VLVW = VLVW2H/L) */
+#  define PMC_LVDSC2_LVWV_MID2    (2 << PMC_LVDSC2_LVWV_SHIFT) /* Mid 2 trip point selected (VLVW = VLVW3H/L) */
+#  define PMC_LVDSC2_LVWV_HIGH    (3 << PMC_LVDSC2_LVWV_SHIFT) /* High trip point selected (VLVW = VLVW4H/L) */
                                             /* Bits 2-4: Reserved */
 #define PMC_LVDSC2_LVWIE          (1 << 5)  /* Bit 5:  Low-Voltage Warning Interrupt Enable */
 #define PMC_LVDSC2_LVWACK         (1 << 6)  /* Bit 6:  Low-Voltage Warning Acknowledge */
 #define PMC_LVDSC2_LVWF           (1 << 7)  /* Bit 7:  Low-Voltage Warning Flag */
 
 /* Regulator Status and Control Register */
-
 #define PMC_REGSC_BGBE            (1 << 0)  /* Bit 0:  Bandgap Buffer Enable */
                                             /* Bit 1: Reserved */
-#define PMC_REGSC_REGONS          (1 << 2)  /* Bit 2:  Regulator in Run Regulation Status */
-#define PMC_REGSC_VLPRS           (1 << 3)  /* Bit 3:  Very Low Power Run Status */
-#define PMC_REGSC_TRAMPO          (1 << 4)  /* Bit 4:  For devices with FlexNVM: Traditional RAM Power Option */
+#if defined(KINETIS_PMC_HAS_REGSC_REGONS)
+#  define PMC_REGSC_REGONS        (1 << 2)  /* Bit 2:  Regulator in Run Regulation Status */
+#endif
+#if defined(KINETIS_PMC_HAS_REGSC_ACKISO)
+#  define PMC_REGSC_ACKISO        (1 << 3)  /* Bit 3:  Acknowledge Isolation */
+#endif
+#if defined(KINETIS_PMC_HAS_REGSC_VLPRS)
+#  define PMC_REGSC_VLPRS         (1 << 3)  /* Bit 3:  Very Low Power Run Status */
+#endif
+#if defined(KINETIS_PMC_HAS_REGSC_BGEN)
+#  define PMC_REGSC_BGEN          (1 << 4)  /* Bit 4:  Bandgap Enable In VLPx Operation */
+#endif
+#if defined(KINETIS_PMC_HAS_REGSC_TRAMPO)
+#  define PMC_REGSC_TRAMPO        (1 << 4)  /* Bit 4:  For devices with FlexNVM: Traditional RAM Power Option */
+#endif
                                             /* Bits 5-7: Reserved */
 
 /************************************************************************************
@@ -108,4 +119,4 @@
  * Public Functions
  ************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_PMC_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PMC_H */
diff --git a/arch/arm/src/kinetis/kinetis_port.h b/arch/arm/src/kinetis/chip/kinetis_port.h
similarity index 99%
rename from arch/arm/src/kinetis/kinetis_port.h
rename to arch/arm/src/kinetis/chip/kinetis_port.h
index 5a568537b01ed8845c61eaa891734226a191ca2d..36dfa4e0983aed0df88034a7acebace36d123ad2 100644
--- a/arch/arm/src/kinetis/kinetis_port.h
+++ b/arch/arm/src/kinetis/chip/kinetis_port.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/kinetis/kinetis_port.h
+ * arch/arm/src/kinetis/chip/kinetis_port.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_PORT_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_PORT_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PORT_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PORT_H
 
 /************************************************************************************
  * Included Files
@@ -426,4 +426,4 @@
  * Public Functions
  ************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_PORT_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PORT_H */
diff --git a/arch/arm/src/kinetis/kinetis_rngb.h b/arch/arm/src/kinetis/chip/kinetis_rngb.h
similarity index 97%
rename from arch/arm/src/kinetis/kinetis_rngb.h
rename to arch/arm/src/kinetis/chip/kinetis_rngb.h
index a4f677555030cd5be5f25fd5898407986aeeb40e..1e005c08ae30a1b2a95b7991a7b42bf38ff1da8a 100644
--- a/arch/arm/src/kinetis/kinetis_rngb.h
+++ b/arch/arm/src/kinetis/chip/kinetis_rngb.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/kinetis/kinetis_rngb.h
+ * arch/arm/src/kinetis/chip/kinetis_rngb.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_RNGB_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_RNGB_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_RNGB_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_RNGB_H
 
 /************************************************************************************
  * Included Files
@@ -158,4 +158,4 @@
  ************************************************************************************/
 
 #endif /* KINETIS_NRNG && KINETIS_NRNG > 0 */
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_RNGB_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_RNGB_H */
diff --git a/arch/arm/src/kinetis/chip/kinetis_rtc.h b/arch/arm/src/kinetis/chip/kinetis_rtc.h
new file mode 100644
index 0000000000000000000000000000000000000000..4ad016af6c01049f6041b4ea8e984cc50b161dff
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_rtc.h
@@ -0,0 +1,277 @@
+/************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_rtc.h
+ *
+ *   Copyright (C) 2011, 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_RTC_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_RTC_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+#if defined(KINETIS_NRTC) && KINETIS_NRTC > 0
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Register Offsets *****************************************************************/
+
+/* NXP/Freescale has familes and technology generations (sometimes seen as processor
+ * speed).  These are organized into feature families, and faster speeds sometimes
+ * have extended features.  Families are K02 K10 K20 K22  K24 K30 K40 K50 K60 K64 K65
+ * K66 K70 K80
+ *
+ * So far only two variations/generations on the RTC have been discovered.
+ * GEN1    RTC_TSR TPR TAR TCR CR SR LR IER                      WAR RAR
+ * GEN2    RTC_TSR TPR TAR TCR CR SR LR IER  TTSR MER MCLR MCHR  WAR RAR
+ *
+ * KINETIS RTC_GEN1  K20P32-->K20P81M K22 K40 K50 K60@100Mhz K64 120MHz
+ * Assumed K10 K11
+ *
+ * KINETIS_RTC_GEN2 K02 K20P144M K26P169 K60@120Mhz  K65x K66x
+ *
+ * Note current naming doesn't allow GEN1:MK60FN...Q10  & GEN2:MK60FN...Q12
+ */
+
+#if defined(KINETIS_K26) || defined(KINETIS_K65) || defined(KINETIS_K66)
+#  define KINETIS_RTC_GEN2
+#endif
+
+#define KINETIS_RTC_TSR_OFFSET    0x0000 /* RTC Time Seconds Register */
+#define KINETIS_RTC_TPR_OFFSET    0x0004 /* RTC Time Prescaler Register */
+#define KINETIS_RTC_TAR_OFFSET    0x0008 /* RTC Time Alarm Register */
+#define KINETIS_RTC_TCR_OFFSET    0x000c /* RTC Time Compensation Register */
+#define KINETIS_RTC_CR_OFFSET     0x0010 /* RTC Control Register */
+#define KINETIS_RTC_SR_OFFSET     0x0014 /* RTC Status Register */
+#define KINETIS_RTC_LR_OFFSET     0x0018 /* RTC Lock Register */
+#define KINETIS_RTC_IER_OFFSET    0x001c /* RTC Interrupt Enable Register (K40) */
+
+#ifdef KINETIS_K60
+ /* Haven't found a processor or nuttx file where KINETIS_RTC_CCR is in it
+  * from K60P100M100SF2V2RM this would be called  KINETIS_RTC_IER_OFFSET.
+  */
+
+#  define KINETIS_RTC_CCR_OFFSET  0x001c /* RTC Chip Configuration Register (K60) */
+#endif
+
+#ifdef KINETIS_RTC_GEN2
+#  define KINETIS_RTC_TTSR_OFFSET 0x0020 /* RTC Tamper Times Seconds Register */
+#  define KINETIS_RTC_MR_OFFSET   0x0024 /* RTC Monotonic Enable Register */
+#  define KINETIS_RTC_MCLR_OFFSET 0x0028 /* RTC Monotonic Counter Low  Register */
+#  define KINETIS_RTC_MCHR_OFFSET 0x002c /* RTC Monotonic Counter High Register */
+#endif
+
+#define KINETIS_RTC_WAR_OFFSET    0x0800 /* RTC Write Access Register */
+#define KINETIS_RTC_RAR_OFFSET    0x0804 /* RTC Read Access Register */
+
+/* Register Addresses ***************************************************************/
+
+#define KINETIS_RTC_TSR           (KINETIS_RTC_BASE+KINETIS_RTC_TSR_OFFSET)
+#define KINETIS_RTC_TPR           (KINETIS_RTC_BASE+KINETIS_RTC_TPR_OFFSET)
+#define KINETIS_RTC_TAR           (KINETIS_RTC_BASE+KINETIS_RTC_TAR_OFFSET)
+#define KINETIS_RTC_TCR           (KINETIS_RTC_BASE+KINETIS_RTC_TCR_OFFSET)
+#define KINETIS_RTC_CR            (KINETIS_RTC_BASE+KINETIS_RTC_CR_OFFSET)
+#define KINETIS_RTC_SR            (KINETIS_RTC_BASE+KINETIS_RTC_SR_OFFSET)
+#define KINETIS_RTC_LR            (KINETIS_RTC_BASE+KINETIS_RTC_LR_OFFSET)
+#define KINETIS_RTC_IER           (KINETIS_RTC_BASE+KINETIS_RTC_IER_OFFSET)
+
+#ifdef KINETIS_K60
+/* From K60P100M100SF2V2RM this would be called  KINETIS_RTC_IER */
+
+#  define KINETIS_CCR_IER         (KINETIS_RTC_BASE+KINETIS_RTC_CCR_OFFSET)
+#endif
+
+#ifdef KINETIS_RTC_GEN2
+#  define KINETIS_RTC_TTSR        (KINETIS_RTC_BASE+KINETIS_RTC_TTSR_OFFSET)
+#  define KINETIS_RTC_MER         (KINETIS_RTC_BASE+KINETIS_RTC_MER_OFFSET)
+#  define KINETIS_RTC_MCLR        (KINETIS_RTC_BASE+KINETIS_RTC_MCLR_OFFSET)
+#  define KINETIS_RTC_MCHR        (KINETIS_RTC_BASE+KINETIS_RTC_MCHR_OFFSET)
+#endif
+
+#define KINETIS_RTC_WAR           (KINETIS_RTC_BASE+KINETIS_RTC_WAR_OFFSET)
+#define KINETIS_RTC_RAR           (KINETIS_RTC_BASE+KINETIS_RTC_RAR_OFFSET)
+
+/* Register Bit Definitions *********************************************************/
+
+/* RTC Time Seconds Register (32-bits of time in seconds) */
+
+/* RTC Time Prescaler Register */
+
+#define RTC_TPR_SHIFT             (0)       /* Bits 0-15: Time Prescaler Register */
+#define RTC_TPR_MASK              (0xffff << RTC_TPR_SHIFT)
+                                           /* Bits 16-31: Reserved */
+/* RTC Time Alarm Register (32-bits of time alarm) */
+
+/* RTC Time Compensation Register (32-bits) */
+
+#define RTC_TCR_TCR_SHIFT         (0)       /* Bits 0-7: Time Compensation Register */
+#define RTC_TCR_TCR_MASK          (0xff << RTC_TCR_CIR_MASK)
+#define RTC_TCR_CIR_SHIFT         (8)       /* Bits 8-15: Compensation Interval Register */
+#define RTC_TCR_CIR_MASK          (0xff << RTC_TCR_CIR_SHIFT)
+#define RTC_TCR_TCV_SHIFT         (16)      /* Bits 16-23: Time Compensation Value */
+#define RTC_TCR_TCV_MASK          (0xff << RTC_TCR_TCV_SHIFT)
+#define RTC_TCR_CIC_SHIFT         (24)      /* Bits 24-31: Compensation Interval Counter */
+#define RTC_TCR_CIC_MASK          (0xff << RTC_TCR_CIC_SHIFT)
+
+/* RTC Control Register (32-bits) */
+
+#define RTC_CR_SWR                (1 << 0)  /* Bit 0:  Software Reset */
+#define RTC_CR_WPE                (1 << 1)  /* Bit 1:  Wakeup Pin Enable */
+#define RTC_CR_SUP                (1 << 2)  /* Bit 2:  Supervisor Access */
+#define RTC_CR_UM                 (1 << 3)  /* Bit 3:  Update Mode */
+                                            /* Bits 4-7: Reserved */
+#define RTC_CR_OSCE               (1 << 8)  /* Bit 8:  Oscillator Enable */
+#define RTC_CR_CLKO               (1 << 9)  /* Bit 9:  Clock Output */
+#define RTC_CR_SC16P              (1 << 10) /* Bit 10: Oscillator 16pF load configure */
+#define RTC_CR_SC8P               (1 << 11) /* Bit 11: Oscillator 8pF load configure */
+#define RTC_CR_SC4P               (1 << 12) /* Bit 12: Oscillator 4pF load configure */
+#define RTC_CR_SC2P               (1 << 13) /* Bit 13: Oscillator 2pF load configure */
+                                            /* Bits 14-31: Reserved */
+/* RTC Status Register (32-bits) */
+
+#define RTC_SR_TIF                (1 << 0)  /* Bit 0:  Time Invalid Flag */
+#define RTC_SR_TOF                (1 << 1)  /* Bit 1:  Time Overflow Flag */
+#define RTC_SR_TAF                (1 << 2)  /* Bit 2:  Time Alarm Flag */
+
+#ifdef KINETIS_RTC_GEN2
+#  define RTC_SR_MOF              (1 << 3)  /* Bit 3:  Time Monotonic overflow Flag */
+#endif
+                                            /* Bit 3: Reserved RTC_GEN1 */
+#define RTC_SR_TCE                (1 << 4)  /* Bit 4:  Time Counter Enable */
+                                            /* Bits 5-31: Reserved */
+/* RTC Lock Register (32-bits) */
+                                            /* Bits 0-2: Reserved */
+#define RTC_LR_TCL                (1 << 3)  /* Bit 3:  Time Compensation Lock */
+#define RTC_LR_CRL                (1 << 4)  /* Bit 4:  Control Register Lock */
+#define RTC_LR_SRL                (1 << 5)  /* Bit 5:  Status Register Lock */
+#define RTC_LR_LRL                (1 << 6)  /* Bit 6:  Lock Register Lock  */
+                                            /* Bit 7:  Reserved */
+#ifdef KINETIS_RTC_GEN2
+#  define RTC_LR_TTSL             (1 << 8)  /* Bit 8:  Tamper Time Seconds Lock */
+#  define RTC_LR_MEL              (1 << 9)  /* Bit 9:  Monotonic Enable lock */
+#  define RTC_LR_MCLL             (1 << 10) /* Bit 10: Monotoic Counter Low Lock */
+#  define RTC_LR_MCHL             (1 << 11) /* Bit 10: Monotoic Counter High Lock */
+#endif
+                                            /* Bits 12-31: Reserved */
+/* RTC Interrupt Enable Register (32-bits, K40) */
+
+#  define RTC_IER_TIIE            (1 << 0)  /* Bit 0:  Time Invalid Interrupt Enable */
+#  define RTC_IER_TOIE            (1 << 1)  /* Bit 1:  Time Overflow Interrupt Enable */
+#  define RTC_IER_TAIE            (1 << 2)  /* Bit 2:  Time Alarm Interrupt Enable */
+
+#ifdef KINETIS_RTC_GEN2
+#  define RTC_IER_MOIE            (1 << 3)  /* Bit 3:  Monotonic Overflow Interrupt Enable */
+#endif
+
+#  define RTC_IER_TSIE            (1 << 4)  /* Bit 4:  Time Seconds Interrupt Enable */
+                                            /* Bits 5-6: Reserved */
+#  define RTC_IER_WPON            (1 << 7)  /* Bit 7:  Wakeup Pin On */
+
+#ifdef KINETIS_K60
+/* RTC Chip Configuration Register (32-bits,K60) */
+/* Haven't found this in K60P100M100SF2V2RM */
+
+#  define RTC_CCR_CONFIG_SHIFT    (0)       /* Bits 0-7: Chip Configuration */
+#  define RTC_CCR_CONFIG_MASK     (0xff << RTC_CCR_CONFIG_SHIFT)
+                                            /* Bits 8-31: Reserved */
+#endif
+
+/* RTC Write Access Register (32-bits) */
+
+#define RTC_WAR_TSRW              (1 << 0)  /* Bit 0:  Time Seconds Register Write */
+#define RTC_WAR_TPRW              (1 << 1)  /* Bit 1:  Time Prescaler Register Write */
+#define RTC_WAR_TARW              (1 << 2)  /* Bit 2:  Time Alarm Register Write */
+#define RTC_WAR_TCRW              (1 << 3)  /* Bit 3:  Time Compensation Register Write */
+#define RTC_WAR_CRW               (1 << 4)  /* Bit 4:  Control Register Write */
+#define RTC_WAR_SRW               (1 << 5)  /* Bit 5:  Status Register Write */
+#define RTC_WAR_LRW               (1 << 6)  /* Bit 6:  Lock Register Write */
+#define RTC_WAR_IERW              (1 << 7)  /* Bit 7:  Interrupt Enable Register Write */
+
+#ifdef KINETIS_K60
+/* This looks like old name, from K60P100M100SF2V2RM bit 7 would be called RTC_RAR_IERW */
+
+#  define RTC_WAR_CCRW            (1 << 7)  /* Bit 7:  Chip Config Register Write */
+#endif
+                                            /* Bits 8-31: Reserved */
+/* RTC Read Access Register */
+
+#define RTC_RAR_TSRR              (1 << 0)  /* Bit 0:  Time Seconds Register Read */
+#define RTC_RAR_TPRR              (1 << 1)  /* Bit 1:  Time Prescaler Register Read */
+#define RTC_RAR_TARR              (1 << 2)  /* Bit 2:  Time Alarm Register Read */
+#define RTC_RAR_TCRR              (1 << 3)  /* Bit 3:  Time Compensation Register Read */
+#define RTC_RAR_CRR               (1 << 4)  /* Bit 4:  Control Register Read */
+#define RTC_RAR_SRR               (1 << 5)  /* Bit 5:  Status Register Read */
+#define RTC_RAR_LRR               (1 << 6)  /* Bit 6:  Lock Register Read */
+#define RTC_RAR_IERR              (1 << 7)  /* Bit 7:  Interrupt Enable Register Read */
+
+#ifdef KINETIS_K60
+/* This is possibly an old name, from K60P100M100SF2V2RM bit 7 would be called
+ * RTC_RAR_IERR.
+ */
+
+#  define RTC_RAR_CCRR            (1 << 7)  /* Bit 7:  Chip Config Register Read */
+#endif
+
+#ifdef KINETIS_RTC_GEN2
+#  define RTC_RAR_TTSR            (1 << 8)  /* Bit 8:  Tamper Time Seconds Read */
+#  define RTC_RAR_MERR            (1 << 9)  /* Bit 9:  Monotonic Enable Read */
+#  define RTC_RAR_MCLR            (1 << 10) /* Bit 10: Monotoic Counter Low Register Read */
+#  define RTC_RAR_MCHR            (1 << 11) /* Bit 10: Monotoic Counter High Register Read */
+#endif
+                                            /* Bits 11-31: Reserved */
+
+#if defined(KINETIS_RTC_GEN2)/* && defined(CONFIG_RTC_MAGIC) */
+#  define CONFIG_RTC_MAGICL   0xfacefee0
+#  define CONFIG_RTC_MAGICH   0xef32a141
+#endif
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* KINETIS_NRTC && KINETIS_NRTC > 0 */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_RTC_H */
diff --git a/arch/arm/src/kinetis/kinetis_sdhc.h b/arch/arm/src/kinetis/chip/kinetis_sdhc.h
similarity index 99%
rename from arch/arm/src/kinetis/kinetis_sdhc.h
rename to arch/arm/src/kinetis/chip/kinetis_sdhc.h
index 5d122315a9d2efa426865fd396748ac3e0372434..b57b85c94e70e83d72f12e2e6101ca42c3c83c35 100644
--- a/arch/arm/src/kinetis/kinetis_sdhc.h
+++ b/arch/arm/src/kinetis/chip/kinetis_sdhc.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/kinetis/kinetis_sdhc.h
+ * arch/arm/src/kinetis/chip/kinetis_sdhc.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_SDHC_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_SDHC_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_SDHC_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_SDHC_H
 
 /************************************************************************************
  * Included Files
@@ -385,4 +385,4 @@
  * Public Functions
  ************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_SDHC_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_SDHC_H */
diff --git a/arch/arm/src/kinetis/chip/kinetis_sim.h b/arch/arm/src/kinetis/chip/kinetis_sim.h
new file mode 100644
index 0000000000000000000000000000000000000000..3e6cb6a6efb709c19036429963baf371e7cbc33a
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_sim.h
@@ -0,0 +1,1324 @@
+/************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_sim.h
+ *
+ *   Copyright (C) 2011, 2016, 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_SIM_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_SIM_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Register Offsets *****************************************************************/
+
+#define KINETIS_SIM_SOPT1_OFFSET              0x0000  /* System Options Register 1 */
+#if defined (KINETIS_SIM_HAS_SOPT1CFG)
+#  define KINETIS_SIM_SOPT1CFG_OFFSET         0x0004  /* SOPT1 Configuration Register */
+#endif
+#if defined(KINETIS_SIM_HAS_USBPHYCTL)
+#  define KINETIS_SIM_USBPHYCTL_OFFSET        0x0008  /* USB PHY Control Register */
+#endif
+#define KINETIS_SIM_SOPT2_OFFSET              0x0004  /* System Options Register 2 */
+#define KINETIS_SIM_SOPT4_OFFSET              0x000c  /* System Options Register 4 */
+#define KINETIS_SIM_SOPT5_OFFSET              0x0010  /* System Options Register 5 */
+#define KINETIS_SIM_SOPT6_OFFSET              0x0014  /* System Options Register 6 */
+#define KINETIS_SIM_SOPT7_OFFSET              0x0018  /* System Options Register 7 */
+#if defined(KINETIS_SIM_HAS_SOPT8)
+#  define KINETIS_SIM_SOPT8_OFFSET            0x001c  /* System Options Register 8 */
+#endif
+#if defined(KINETIS_SIM_HAS_SOPT9)
+#  define KINETIS_SIM_SOPT9_OFFSET            0x0020  /* System Options Register 9 */
+#endif
+#define KINETIS_SIM_SDID_OFFSET               0x0024  /* System Device Identification Register */
+#define KINETIS_SIM_SCGC1_OFFSET              0x0028  /* System Clock Gating Control Register 1 */
+#define KINETIS_SIM_SCGC2_OFFSET              0x002c  /* System Clock Gating Control Register 2 */
+#define KINETIS_SIM_SCGC3_OFFSET              0x0030  /* System Clock Gating Control Register 3 */
+#define KINETIS_SIM_SCGC4_OFFSET              0x0034  /* System Clock Gating Control Register 4 */
+#define KINETIS_SIM_SCGC5_OFFSET              0x0038  /* System Clock Gating Control Register 5 */
+#define KINETIS_SIM_SCGC6_OFFSET              0x003c  /* System Clock Gating Control Register 6 */
+#define KINETIS_SIM_SCGC7_OFFSET              0x0040  /* System Clock Gating Control Register 7 */
+#define KINETIS_SIM_CLKDIV1_OFFSET            0x0044  /* System Clock Divider Register 1 */
+#define KINETIS_SIM_CLKDIV2_OFFSET            0x0048  /* System Clock Divider Register 2 */
+#define KINETIS_SIM_FCFG1_OFFSET              0x004c  /* Flash Configuration Register 1 */
+#define KINETIS_SIM_FCFG2_OFFSET              0x0050  /* Flash Configuration Register 2 */
+#define KINETIS_SIM_UIDH_OFFSET               0x0054  /* Unique Identification Register High */
+#define KINETIS_SIM_UIDMH_OFFSET              0x0058  /* Unique Identification Register Mid-High */
+#define KINETIS_SIM_UIDML_OFFSET              0x005c  /* Unique Identification Register Mid Low */
+#define KINETIS_SIM_UIDL_OFFSET               0x0060  /* Unique Identification Register Low */
+#if defined(KINETIS_SIM_HAS_CLKDIV3)
+#  define KINETIS_SIM_CLKDIV3_OFFSET          0x0064  /* System Clock Divider Register 3 */
+#endif
+#if defined(KINETIS_SIM_HAS_CLKDIV4)
+#  define KINETIS_SIM_CLKDIV4_OFFSET          0x0068  /* System Clock Divider Register 4 */
+#endif
+
+/* Register Addresses ***************************************************************/
+/* NOTE: The SIM_SOPT1, SIM_SOPT1CFG and SIM_USBPHYCTL registers are located at a
+ * different base address than the other SIM registers.
+ */
+
+#define KINETIS_SIM_SOPT1                     (KINETIS_SIMLP_BASE+KINETIS_SIM_SOPT1_OFFSET)
+#if defined(KINETIS_SIM_HAS_SOPT1CFG)
+#  define KINETIS_SIM_SOPT1CFG                (KINETIS_SIMLP_BASE+KINETIS_SIM_SOPT1CFG_OFFSET)
+#endif
+#if defined(KINETIS_SIM_HAS_USBPHYCTL)
+#  define KINETIS_SIM_USBPHYCTL               (KINETIS_SIMLP_BASE+KINETIS_SIM_USBPHYCTL_OFFSET)
+#endif
+#define KINETIS_SIM_SOPT2                     (KINETIS_SIM_BASE+KINETIS_SIM_SOPT2_OFFSET)
+#define KINETIS_SIM_SOPT4                     (KINETIS_SIM_BASE+KINETIS_SIM_SOPT4_OFFSET)
+#define KINETIS_SIM_SOPT5                     (KINETIS_SIM_BASE+KINETIS_SIM_SOPT5_OFFSET)
+#define KINETIS_SIM_SOPT6                     (KINETIS_SIM_BASE+KINETIS_SIM_SOPT6_OFFSET)
+#define KINETIS_SIM_SOPT7                     (KINETIS_SIM_BASE+KINETIS_SIM_SOPT7_OFFSET)
+#if defined(KINETIS_SIM_HAS_SOPT8)
+#  define KINETIS_SIM_SOPT8                   (KINETIS_SIM_BASE+KINETIS_SIM_SOPT8_OFFSET)
+#endif
+#if defined(KINETIS_SIM_HAS_SOPT9)
+#  define KINETIS_SIM_SOPT9                   (KINETIS_SIM_BASE+KINETIS_SIM_SOPT8_OFFSET)
+#endif
+#define KINETIS_SIM_SDID                      (KINETIS_SIM_BASE+KINETIS_SIM_SDID_OFFSET)
+#define KINETIS_SIM_SCGC1                     (KINETIS_SIM_BASE+KINETIS_SIM_SCGC1_OFFSET)
+#define KINETIS_SIM_SCGC2                     (KINETIS_SIM_BASE+KINETIS_SIM_SCGC2_OFFSET)
+#define KINETIS_SIM_SCGC3                     (KINETIS_SIM_BASE+KINETIS_SIM_SCGC3_OFFSET)
+#define KINETIS_SIM_SCGC4                     (KINETIS_SIM_BASE+KINETIS_SIM_SCGC4_OFFSET)
+#define KINETIS_SIM_SCGC5                     (KINETIS_SIM_BASE+KINETIS_SIM_SCGC5_OFFSET)
+#define KINETIS_SIM_SCGC6                     (KINETIS_SIM_BASE+KINETIS_SIM_SCGC6_OFFSET)
+#define KINETIS_SIM_SCGC7                     (KINETIS_SIM_BASE+KINETIS_SIM_SCGC7_OFFSET)
+#define KINETIS_SIM_CLKDIV1                   (KINETIS_SIM_BASE+KINETIS_SIM_CLKDIV1_OFFSET)
+#define KINETIS_SIM_CLKDIV2                   (KINETIS_SIM_BASE+KINETIS_SIM_CLKDIV2_OFFSET)
+#define KINETIS_SIM_FCFG1                     (KINETIS_SIM_BASE+KINETIS_SIM_FCFG1_OFFSET)
+#define KINETIS_SIM_FCFG2                     (KINETIS_SIM_BASE+KINETIS_SIM_FCFG2_OFFSET)
+#define KINETIS_SIM_UIDH                      (KINETIS_SIM_BASE+KINETIS_SIM_UIDH_OFFSET)
+#define KINETIS_SIM_UIDMH                     (KINETIS_SIM_BASE+KINETIS_SIM_UIDMH_OFFSET)
+#define KINETIS_SIM_UIDML                     (KINETIS_SIM_BASE+KINETIS_SIM_UIDML_OFFSET)
+#define KINETIS_SIM_UIDL                      (KINETIS_SIM_BASE+KINETIS_SIM_UIDL_OFFSET)
+#if defined(KINETIS_SIM_HAS_CLKDIV3)
+#  define KINETIS_SIM_CLKDIV3                 (KINETIS_SIM_BASE+KINETIS_SIM_CLKDIV3_OFFSET)
+#endif
+#if defined(KINETIS_SIM_HAS_CLKDIV4)
+#  define KINETIS_SIM_CLKDIV4                 (KINETIS_SIM_BASE+KINETIS_SIM_CLKDIV4_OFFSET)
+#endif
+
+/* Register Bit Definitions *********************************************************/
+
+/* System Options Register 1 */
+                                                         /* Bits 0-11: Reserved */
+#if defined(KINETIS_SIM_HAS_SOPT1_RAMSIZE)
+#  define SIM_SOPT1_RAMSIZE_SHIFT             (12)       /* Bits 12-15: RAM size */
+#  define SIM_SOPT1_RAMSIZE_MASK              (15 << SIM_SOPT1_RAMSIZE_SHIFT)
+#    define SIM_SOPT1_RAMSIZE_32KB            (5 << SIM_SOPT1_RAMSIZE_SHIFT)  /* 32 KBytes */
+#    define SIM_SOPT1_RAMSIZE_64KB            (7 << SIM_SOPT1_RAMSIZE_SHIFT)  /* 64 KBytes */
+#    define SIM_SOPT1_RAMSIZE_96KB            (8 << SIM_SOPT1_RAMSIZE_SHIFT)  /* 96 KBytes */
+#    define SIM_SOPT1_RAMSIZE_128KB           (9 << SIM_SOPT1_RAMSIZE_SHIFT)  /* 128 KBytes */
+#    define SIM_SOPT1_RAMSIZE_256KB           (10 << SIM_SOPT1_RAMSIZE_SHIFT) /* 256 KBytes */
+#endif
+                                                         /* Bits 16-18: Reserved */
+#if defined(KINETIS_SIM_HAS_SOPT1_OSC32KSEL)
+#  define SIM_SOPT1_OSC32KSEL_SHIFT           (20-KINETIS_SIM_HAS_SOPT1_OSC32KSEL_BITS) /* Bit 19 or 18: 32K oscillator clock select */
+#  define SIM_SOPT1_OSC32KSEL_MASK            (KINETIS_SIM_SOPT1_OSC32KSEL_MASK << SIM_SOPT1_OSC32KSEL_SHIFT)
+#  define SIM_SOPT1_OSC32KSEL(n)              ((((n) & KINETIS_SIM_SOPT1_OSC32KSEL_MASK)) << SIM_SOPT1_OSC32KSEL_SHIFT)
+#  if KINETIS_SIM_HAS_SOPT1_OSC32KSEL_BITS == 1
+#    define SIM_SOPT1_OSC32KSEL_OSC32KCLK     (((0 & KINETIS_SIM_SOPT1_OSC32KSEL_MASK)) << SIM_SOPT1_OSC32KSEL_SHIFT)
+#    define SIM_SOPT1_OSC32KSEL_RTC           (((1 & KINETIS_SIM_SOPT1_OSC32KSEL_MASK)) << SIM_SOPT1_OSC32KSEL_SHIFT)
+#  endif
+#  if KINETIS_SIM_HAS_SOPT1_OSC32KSEL_BITS == 2
+#    define SIM_SOPT1_OSC32KSEL_OSC32KCLK      (((0 & KINETIS_SIM_SOPT1_OSC32KSEL_MASK)) << SIM_SOPT1_OSC32KSEL_SHIFT)
+#    define SIM_SOPT1_OSC32KSEL_RTC            (((2 & KINETIS_SIM_SOPT1_OSC32KSEL_MASK)) << SIM_SOPT1_OSC32KSEL_SHIFT)
+#    define SIM_SOPT1_OSC32KSEL_LPO1KZ         (((3 & KINETIS_SIM_SOPT1_OSC32KSEL_MASK)) << SIM_SOPT1_OSC32KSEL_SHIFT)
+#  endif
+#endif
+                                                         /* Bits 20-28: Reserved */
+#if defined(KINETIS_SIM_HAS_SOPT1_USBVSTBY)
+                                                         /* Bits 24-28: Reserved */
+#  define SIM_SOPT1_USBVSTBY                  (1 << 29)  /* Bit 29: USB voltage regulator in standby mode during VLPR and VLPW modes */
+#endif
+#if defined(KINETIS_SIM_HAS_SOPT1_USBSSTBY)
+#  define SIM_SOPT1_USBSTBY                   (1 << 30)  /* Bit 30: USB voltage regulator in standby mode */
+#endif
+#if defined(KINETIS_SIM_HAS_SOPT1_USBREGEN)
+#  define SIM_SOPT1_USBREGEN                  (1 << 31)  /* Bit 31: USB voltage regulator enable */
+#endif
+
+#if defined(KINETIS_SIM_HAS_SOPT1CFG)
+/* SOPT1 Configuration Register */
+
+                                                         /* Bits 0-22: Reserved */
+#  if defined(KINETIS_SIM_HAS_SOPT1CFG_URWE)
+#    define SIM_SOPT1CFG_URWE                 (1 << 24)  /* Bit 24: USB voltage regulator enable write enable */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT1CFG_USSWE)
+#    define SIM_SOPT1CFG_USSWE                (1 << 25)  /* Bit 25: USB voltage regulator VLP standby write enable */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT1CFG_UVSWE)
+#    define SIM_SOPT1CFG_UVSWE                (1 << 26)  /* Bit 26: USB voltage regulator stop standby write enable */
+#  endif
+                                                         /* Bits 27-31: Reserved */
+#endif
+
+
+#if defined(KINETIS_SIM_HAS_USBPHYCTL)
+/* USB PHY Control Register */
+
+                                                         /* Bits 0-7: Reserved */
+#  if defined(KINETIS_SIM_HAS_USBPHYCTL_USBVREGSEL)
+#    define SIM_USBPHYCTL_USBVREGSEL          (1 << 8)   /* Bit 8: Selects the default input voltage source */
+#  endif
+#  if defined(KINETIS_SIM_HAS_USBPHYCTL_USBVREGPD)
+#    define SIM_USBPHYCTL_USBVREGPD           (1 << 9)   /* Bit 9: Enables the pulldown on the output of the USB Regulator */
+#  endif
+                                                         /* Bits 10-19: Reserved */
+#  if defined(KINETIS_SIM_HAS_USBPHYCTL_USB3VOUTTRG)
+#    define SIM_USBPHYCTL_USB3VOUTTRG_SHIFT   (20)       /* Bit 20-22: USB 3.3V Output Target */
+#    define SIM_USBPHYCTL_USB3VOUTTRG_MASK    (7 << SIM_USBPHYCTL_USB3VOUTTRG_SHIFT)
+#      define SIM_USBPHYCTL_USB3VOUTTRG_2V733 (0 << SIM_USBPHYCTL_USB3VOUTTRG_SHIFT) /* 2.733V */
+#      define SIM_USBPHYCTL_USB3VOUTTRG_3V020 (1 << SIM_USBPHYCTL_USB3VOUTTRG_SHIFT) /* 3.020V */
+#      define SIM_USBPHYCTL_USB3VOUTTRG_3V074 (2 << SIM_USBPHYCTL_USB3VOUTTRG_SHIFT) /* 3.074V */
+#      define SIM_USBPHYCTL_USB3VOUTTRG_3V130 (3 << SIM_USBPHYCTL_USB3VOUTTRG_SHIFT) /* 3.130V */
+#      define SIM_USBPHYCTL_USB3VOUTTRG_3V188 (4 << SIM_USBPHYCTL_USB3VOUTTRG_SHIFT) /* 3.188V */
+#      define SIM_USBPHYCTL_USB3VOUTTRG_3V248 (5 << SIM_USBPHYCTL_USB3VOUTTRG_SHIFT) /* 3.248V */
+#      define SIM_USBPHYCTL_USB3VOUTTRG_3V310 (6 << SIM_USBPHYCTL_USB3VOUTTRG_SHIFT) /* 3.310V (default) */
+#      define SIM_USBPHYCTL_USB3VOUTTRG_3V662 (7 << SIM_USBPHYCTL_USB3VOUTTRG_SHIFT) /* 3.662V (For Freescale use only, not for customer use) */
+#  endif
+#  if defined(KINETIS_SIM_HAS_USBPHYCTL_USBDISILIM)
+#    define SIM_USBPHYCTL_USBDISILIM           (1 << 23)  /* Bit 23: USB Disable Inrush Current Limit */
+#  endif
+                                                         /* Bits 24-31: Reserved */
+#endif
+
+/* System Options Register 2 */
+
+#if defined(KINETIS_SIM_HAS_SOPT2)
+#  if defined(KINETIS_SIM_HAS_SOPT2_MCGCLKSEL)
+#    define SIM_SOPT2_MCGCLKSEL               (1 << 0)  /* Bit 0: MCG clock select */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT2_USBSLSRC)
+#    define SIM_SOPT2_USBSLSRC                (1 << 0)  /* Bit 0: USB Slow Clock Source */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT2_USBREGEN)
+#    define SIM_SOPT2_USBREGEN                (1 << 1)  /* Bit 1: USB PHY PLL Regulator Enable */
+#  endif
+                                                        /* Bits 2-3: Reserved */
+#  if defined(KINETIS_SIM_HAS_SOPT2_USBHSRC)
+#    define SIM_SOPT2_USBSHSRC_SHIFT          (2)       /* Bit 2-3: USB HS clock source select */
+#    define SIM_SOPT2_USBSHSRC_MASK           (3 << SIM_SOPT2_USBSHSRC_SHIFT)
+#      define SIM_SOPT2_USBSHSRC_BUSCLK       (0 << SIM_SOPT2_USBSHSRC_SHIFT)
+#      define SIM_SOPT2_USBSHSRC_MCGPLL0CLK   (1 << SIM_SOPT2_USBSHSRC_SHIFT)
+#      define SIM_SOPT2_USBSHSRC_MCGPLL1CLK   (2 << SIM_SOPT2_USBSHSRC_SHIFT)
+#      define SIM_SOPT2_USBSHSRC_OSC0ERCLK    (3 << SIM_SOPT2_USBSHSRC_SHIFT)
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT2_RTCCLKOUTSEL)
+#    define SIM_SOPT2_RTCCLKOUTSEL            (1 << 4)  /* Bit 4: RTC clock out select */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT2_CLKOUTSEL)
+#    define SIM_SOPT2_CLKOUTSEL_SHIFT         (5)       /* Bits 5-7: CLKOUT select */
+#    define SIM_SOPT2_CLKOUTSEL_MASK          (7 << SIM_SOPT2_CLKOUTSEL_SHIFT)
+#      define SIM_SOPT2_CLKOUTSEL_FBCLKOUT    (0 << SIM_SOPT2_CLKOUTSEL_SHIFT)
+#      define SIM_SOPT2_CLKOUTSEL_FLSHCLK     (2 << SIM_SOPT2_CLKOUTSEL_SHIFT)
+#      define SIM_SOPT2_CLKOUTSEL_LPO1KHZ     (3 << SIM_SOPT2_CLKOUTSEL_SHIFT)
+#      define SIM_SOPT2_CLKOUTSEL_MCGIRCLK    (4 << SIM_SOPT2_CLKOUTSEL_SHIFT)
+#      define SIM_SOPT2_CLKOUTSEL_RTC32768KHZ (5 << SIM_SOPT2_CLKOUTSEL_SHIFT)
+#      define SIM_SOPT2_CLKOUTSEL_OSCERCLK0   (6 << SIM_SOPT2_CLKOUTSEL_SHIFT)
+#      define SIM_SOPT2_CLKOUTSEL_IRC48MHZ    (7 << SIM_SOPT2_CLKOUTSEL_SHIFT)
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT2_FBSL)
+#    define SIM_SOPT2_FBSL_SHIFT              (8)       /* Bits 8-9: FlexBus security level */
+#    define SIM_SOPT2_FBSL_MASK               (3 << SIM_SOPT2_FBSL_SHIFT)
+#      define SIM_SOPT2_FBSL_NONE             (0 << SIM_SOPT2_FBSL_SHIFT) /* All off-chip accesses disallowed */
+#      define SIM_SOPT2_FBSL_DATA             (2 << SIM_SOPT2_FBSL_SHIFT) /* Off-chip data accesses are allowed */
+#      define SIM_SOPT2_FBSL_ALL              (3 << SIM_SOPT2_FBSL_SHIFT) /* All Off-chip accesses allowed */
+#  endif
+                                                        /* Bit 10: Reserved */
+#  if defined(KINETIS_SIM_HAS_SOPT2_CMTUARTPAD)
+#    define SIM_SOPT2_CMTUARTPAD              (1 << 11) /* Bit 11: CMT/UART pad drive strength */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT2_PTD7PAD)
+#    define SIM_SOPT2_PTD7PAD                 (1 << 11) /* Bit 11: PTD7P pad drive strength */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT2_TRACECLKSEL)
+#    define SIM_SOPT2_TRACECLKSEL             (1 << 12) /* Bit 12: Debug trace clock select */
+#  endif
+                                                        /* Bits 13-15: Reserved */
+#  if defined(KINETIS_SIM_HAS_SOPT2_PLLFLLSEL)
+#    define SIM_SOPT2_PLLFLLSEL_SHIFT         (16)      /* Bits 16-[17]: PLL/FLL clock select */
+#    define SIM_SOPT2_PLLFLLSEL_MASK          (KINETIS_SIM_SOPT2_PLLFLLSEL_MASK << SIM_SOPT2_PLLFLLSEL_SHIFT)
+#      define SIM_SOPT2_PLLFLLSEL(n)          (((n) &  KINETIS_SIM_SOPT2_PLLFLLSEL_MASK) << SIM_SOPT2_PLLFLLSEL_SHIFT)
+#      define SIM_SOPT2_PLLFLLSEL_MCGFLLCLK   ((0 &  KINETIS_SIM_SOPT2_PLLFLLSEL_MASK) << SIM_SOPT2_PLLFLLSEL_SHIFT)
+#      define SIM_SOPT2_PLLFLLSEL_MCGPLLCLK   ((1 &  KINETIS_SIM_SOPT2_PLLFLLSEL_MASK) << SIM_SOPT2_PLLFLLSEL_SHIFT)
+#      if KINETIS_SIM_HAS_SOPT2_PLLFLLSEL_BITS > 1
+#        define SIM_SOPT2_PLLFLLSEL_USB1PFD   ((2 &  KINETIS_SIM_SOPT2_PLLFLLSEL_MASK) << SIM_SOPT2_PLLFLLSEL_SHIFT)
+#        define SIM_SOPT2_PLLFLLSEL_IRC48MHZ  ((3 &  KINETIS_SIM_SOPT2_PLLFLLSEL_MASK) << SIM_SOPT2_PLLFLLSEL_SHIFT)
+#      endif
+#  endif
+                                                        /* Bit 17: Reserved */
+#  if defined(KINETIS_SIM_HAS_SOPT2_USBSRC)
+#    define SIM_SOPT2_USBSRC                  (1 << 18) /* Bit 18: USB clock source select */
+#  endif
+                                                        /* Bit 19: Reserved */
+#  if defined(KINETIS_SIM_HAS_SOPT2_RMIISRC)
+#    define SIM_SOPT2_RMIISRC_SHIFT           (19)      /* Bit 19: RMII clock source select */
+#    define SIM_SOPT2_RMIISRC_EXTAL           (0 << SIM_SOPT2_RMIISRC_SHIFT) /* EXTAL clock */
+#    define SIM_SOPT2_RMIISRC_EXTBYP          (1 << SIM_SOPT2_RMIISRC_SHIFT) /* External bypass clock (ENET_1588_CLKIN) */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT2_TIMESRC)
+#    define SIM_SOPT2_TIMESRC_SHIFT           (20)      /* Bit 20-21: IEEE 1588 timestamp clock source select */
+#    define SIM_SOPT2_TIMESRC_MASK            (3 << SIM_SOPT2_TIMESRC_SHIFT)
+#    define SIM_SOPT2_TIMESRC_CORE            (0 << SIM_SOPT2_TIMESRC_SHIFT) /* Core/system clock */
+#    define SIM_SOPT2_TIMESRC_PLLSEL          (1 << SIM_SOPT2_TIMESRC_SHIFT) /* MCGFLLCLK,MCGPLLCLK,IRC48M,USB1 PFD
+                                                                                clock as selected by SOPT2[PLLFLLSEL] */
+#    define SIM_SOPT2_TIMESRC_OSCERCLK        (2 << SIM_SOPT2_TIMESRC_SHIFT) /* OSCERCLK clock */
+#    define SIM_SOPT2_TIMESRC_EXTBYP          (3 << SIM_SOPT2_TIMESRC_SHIFT) /* External bypass clock (ENET_1588_CLKIN) */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT2_FLEXIOSRC)
+                                                        /* TBD */
+#  endif
+                                                        /* Bits 22-23: Reserved */
+#  if defined(KINETIS_SIM_HAS_SOPT2_USBFSRC)
+#    define SIM_SOPT2_USBFSRC_SHIFT            (22)     /* Bits 22-23: USB FS clock source select */
+#    define SIM_SOPT2_USBFSRC_MASK             (3 << SIM_SOPT2_USBFSRC_SHIFT)
+#      define SIM_SOPT2_USBFSRC_MCGCLK         (0 << SIM_SOPT2_USBFSRC_SHIFT) /* MCGFLLCLK,MCGPLLCLK clock as selected by SOPT2[PLLFLLSEL] */
+#      define SIM_SOPT2_USBFSRC_MCGPLL0CLK     (1 << SIM_SOPT2_USBFSRC_SHIFT) /* MCGPLL0CLK clock */
+#      define SIM_SOPT2_USBFSRC_MCGPLL1CLK     (2 << SIM_SOPT2_USBFSRC_SHIFT) /* MCGPLL1CLK clock */
+#      define SIM_SOPT2_USBFSRC_OCS0ERCLK      (3 << SIM_SOPT2_USBFSRC_SHIFT) /* OSC0ERCLK clock */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT2_TPMSRC)
+#    define SIM_SOPT2_TPMSRC_SHIFT            (24)      /* Bits 24-25: TPM clock source select */
+#    define SIM_SOPT2_TPMSRC_MASK             (3 << SIM_SOPT2_TPMSRC_SHIFT)
+#      define SIM_SOPT2_TPMSRC_CORE           (0 << SIM_SOPT2_TPMSRC_SHIFT) /* Clock disabled */
+#      define SIM_SOPT2_TPMSRC_MCGCLK         (1 << SIM_SOPT2_TPMSRC_SHIFT) /* MCGFLLCLK,MCGPLLCLK,IRC48M,USB1 PFD
+                                                                                     clock as selected by SOPT2[PLLFLLSEL] and then
+                                                                                     divided by the PLLFLLCLK fractional divider
+                                                                                     as configured by SIM_CLKDIV3[PLLFLLFRAC, PLLFLLDIV] */
+#      define SIM_SOPT2_TPMSRC_OCSERCLK       (2 << SIM_SOPT2_TPMSRC_SHIFT) /* OSCERCLK clock */
+#      define SIM_SOPT2_TPMSRC_EXTBYP         (3 << SIM_SOPT2_TPMSRC_SHIFT) /* MCGIRCLK clock */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT2_I2SSRC)
+#      define SIM_SOPT2_I2SSRC_SHIFT          (24)      /* Bits 24-25: I2S master clock source select */
+#      define SIM_SOPT2_I2SSRC_MASK           (3 << SIM_SOPT2_I2SSRC_SHIFT)
+#        define SIM_SOPT2_I2SCSRC_CORE        (0 << SIM_SOPT2_I2SSRC_SHIFT) /* Core/system clock / I2S fractional divider */
+#        define SIM_SOPT2_I2SCSRC_MCGCLK      (1 << SIM_SOPT2_I2SSRC_SHIFT) /* MCGPLLCLK/MCGFLLCLK clock/ I2S fractional divider */
+#        define SIM_SOPT2_I2SCSRC_OCSERCLK    (2 << SIM_SOPT2_I2SSRC_SHIFT) /* OSCERCLK clock */
+#        define SIM_SOPT2_I2SCSRC_EXTBYP      (3 << SIM_SOPT2_I2SSRC_SHIFT) /* External bypass clock (I2S0_CLKIN) */
+#  endif
+                                                        /* Bits 26-27: Reserved */
+#  if defined(KINETIS_SIM_HAS_SOPT2_LPUARTSRC)
+#    define SIM_SOPT2_LPUARTSRC_SHIFT         (26)      /* Bits 26-27: LPUART clock source select */
+#    define SIM_SOPT2_LPUARTSRC_MASK          (3 << SIM_SOPT2_LPUARTSRC_SHIFT)
+#      define SIM_SOPT2_LPUARTSRC_CORE        (0 << SIM_SOPT2_LPUARTSRC_SHIFT) /* Clock disabled */
+#      define SIM_SOPT2_LPUARTSRC_MCGCLK      (1 << SIM_SOPT2_LPUARTSRC_SHIFT) /* MCGFLLCLK,MCGPLLCLK,IRC48M,USB1 PFD
+                                                                                  clock as selected by SOPT2[PLLFLLSEL] and then
+                                                                                  divided by the PLLFLLCLK fractional divider
+                                                                                  as configured by SIM_CLKDIV3[PLLFLLFRAC, PLLFLLDIV] */
+#      define SIM_SOPT2_LPUARTSRC_OCSERCLK    (2 << SIM_SOPT2_LPUARTSRC_SHIFT) /* OSCERCLK clock */
+#      define SIM_SOPT2_LPUARTSRC_EXTBYP      (3 << SIM_SOPT2_LPUARTSRC_SHIFT) /* MCGIRCLK clock */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT2_SDHCSRC)
+#    define SIM_SOPT2_SDHCSRC_SHIFT           (28)      /* Bits 28-29: SDHC clock source select */
+#    define SIM_SOPT2_SDHCSRC_MASK            (3 << SIM_SOPT2_SDHCSRC_SHIFT)
+#      define SIM_SOPT2_SDHCSRC_CORE          (0 << SIM_SOPT2_SDHCSRC_SHIFT) /* Core/system clock */
+#      define SIM_SOPT2_SDHCSRC_MCGCLK        (1 << SIM_SOPT2_SDHCSRC_SHIFT) /* MCGPLLCLK/MCGFLLCLK clock */
+#      define SIM_SOPT2_SDHCSRC_OCSERCLK      (2 << SIM_SOPT2_SDHCSRC_SHIFT) /* OSCERCLK clock */
+#      define SIM_SOPT2_SDHCSRC_EXTBYP        (3 << SIM_SOPT2_SDHCSRC_SHIFT) /* External bypass clock (SDHC0_CLKIN) */
+                                                        /* Bits 30-31: Reserved */
+#  endif
+                                                        /* Bits 30-31: Reserved */
+#  if defined(KINETIS_SIM_HAS_SOPT2_NFCSRC)
+#    define SIM_SOPT2_NFCSRC_SHIFT            (30)      /* Bits 30-31: NFC Flash clock source select */
+#    define SIM_SOPT2_NFCSRC_MASK             (3 << SIM_SOPT2_NFCSRC_SHIFT)
+#      define SIM_SOPT2_NFCSRC_BUS            (0 << SIM_SOPT2_NFCSRC_SHIFT) /* BUS clock */
+#      define SIM_SOPT2_NFCSRC_MCGPLL0CLK     (1 << SIM_SOPT2_NFCSRC_SHIFT) /* MCGPLL0CLK clock */
+#      define SIM_SOPT2_NFCSRC_MCGPLL1CLK     (2 << SIM_SOPT2_NFCSRC_SHIFT) /* MCGPLL1CLK clock */
+#      define SIM_SOPT2_NFCSRC_OCS0ERCLK      (3 << SIM_SOPT2_NFCSRC_SHIFT) /* OSC0ERCLK clock */
+#  endif
+#endif
+
+/* System Options Register 4 */
+
+#define SIM_SOPT4_FTM0FLT0                    (1 << 0)  /* Bit 0:  FTM0 Fault 0 Select */
+#define SIM_SOPT4_FTM0FLT1                    (1 << 1)  /* Bit 1:  FTM0 Fault 1 Select */
+#define SIM_SOPT4_FTM0FLT2                    (1 << 2)  /* Bit 2:  FTM0 Fault 2 Select */
+                                                        /* Bit 3: Reserved */
+#if defined(KINETIS_SIM_HAS_SOPT4_FTM0FLT3)
+#  define SIM_SOPT4_FTM0FLT3                  (1 << 3)  /* Bit 3:  FTM0 Fault 3 Select */
+#endif
+#define SIM_SOPT4_FTM1FLT0                    (1 << 4)  /* Bit 4:  FTM1 Fault 0 Select */
+                                                        /* Bits 5-7: Reserved */
+#define SIM_SOPT4_FTM2FLT0                    (1 << 8)  /* Bit 8:  FTM2 Fault 0 Select */
+                                                        /* Bits 9-17: Reserved */
+#if defined(KINETIS_SIM_HAS_SOPT4_FTM3FLT0)
+                                                        /* Bits 9-11,13-17: Reserved */
+#  define SIM_SOPT4_FTM3FLT0                  (1 << 12) /* Bit 12:  FTM3 Fault 0 Select */
+#endif
+#if defined(KINETIS_SIM_HAS_SOPT4_FTM1CH0SRC)
+#  define SIM_SOPT4_FTM1CH0SRC_SHIFT          (18)      /* Bits 18-19: FTM1 channel 0 input capture source select */
+#  define SIM_SOPT4_FTM1CH0SRC_MASK           (3 << SIM_SOPT4_FTM1CH0SRC_SHIFT)
+#    define SIM_SOPT4_FTM1CH0SRC_CH0          (0 << SIM_SOPT4_FTM1CH0SRC_SHIFT) /* FTM1_CH0 signal */
+#    define SIM_SOPT4_FTM1CH0SRC_CMP0         (1 << SIM_SOPT4_FTM1CH0SRC_SHIFT) /* CMP0 output */
+#    define SIM_SOPT4_FTM1CH0SRC_CMP1         (2 << SIM_SOPT4_FTM1CH0SRC_SHIFT) /* CMP1 output */
+#  if KINETIS_SIM_HAS_SOPT4_FTM1CH0SRC > 2
+#      define SIM_SOPT4_FTM1CH0SRC_USBSOF     (3 << SIM_SOPT4_FTM1CH0SRC_SHIFT) /* USB start of frame pulse */
+#  endif
+#endif
+#if defined(KINETIS_SIM_HAS_SOPT4_FTM2CH0SRC)
+#  define SIM_SOPT4_FTM2CH0SRC_SHIFT           (20)     /* Bits 20-21: FTM2 channel 0 input capture source select */
+#  define SIM_SOPT4_FTM2CH0SRC_MASK            (3 << SIM_SOPT4_FTM2CH0SRC_SHIFT)
+#    define SIM_SOPT4_FTM2CH0SRC_CH0           (0 << SIM_SOPT4_FTM2CH0SRC_SHIFT) /* FTM2_CH0 signal */
+#    define SIM_SOPT4_FTM2CH0SRC_CMP0          (1 << SIM_SOPT4_FTM2CH0SRC_SHIFT) /* CMP0 output */
+#    define SIM_SOPT4_FTM2CH0SRC_CMP1          (2 << SIM_SOPT4_FTM2CH0SRC_SHIFT) /* CMP1 output */
+#endif
+                                                        /* Bits 22-23: Reserved */
+#if defined(KINETIS_SIM_HAS_SOPT4_FTM2CH1SRC)
+                                                        /* Bit 23: Reserved */
+  #define SIM_SOPT4_FTM2CH1SRC                (1 << 22) /* Bit 22:  FTM2 channel 1 input capture source select */
+#endif
+#define SIM_SOPT4_FTM0CLKSEL                  (1 << 24) /* Bit 24:  FlexTimer 0 External Clock Pin Select */
+#define SIM_SOPT4_FTM1CLKSEL                  (1 << 25) /* Bit 25:  FTM1 External Clock Pin Select */
+#define SIM_SOPT4_FTM2CLKSEL                  (1 << 26) /* Bit 26:  FlexTimer 2 External Clock Pin Select */
+                                                        /* Bits 27-31: Reserved */
+#if defined(KINETIS_SIM_HAS_SOPT4_FTM3TRG1SRC) || defined(KINETIS_SIM_HAS_SOPT4_FTM3TRG0SRC)
+#  define SIM_SOPT4_FTM3CLKSEL                (1 << 27) /* Bit 27: FlexTimer 3 External Clock Pin Select */
+#endif
+#if defined(KINETIS_SIM_HAS_SOPT4_FTM0TRG0SRC)
+                                                        /* Bits 27,30-31: Reserved */
+#  define SIM_SOPT4_FTM0TRG0SRC               (1 << 28) /* Bit 28:  FlexTimer 0 Hardware Trigger 0 Source Select */
+#endif
+#if defined(KINETIS_SIM_HAS_SOPT4_FTM0TRG1SRC)
+                                                        /* Bits 27,30-31: Reserved */
+#  define SIM_SOPT4_FTM0TRG1SRC               (1 << 29) /* Bit 29:  FlexTimer 0 Hardware Trigger 1 Source Select */
+#endif
+#if defined(KINETIS_SIM_HAS_SOPT4_FTM3TRG0SRC)
+#  define SIM_SOPT4_FTM3TRG0SRC               (1 << 30) /* Bit 30: FlexTimer 3 Hardware Trigger 0 Source Select */
+#endif
+#if defined(KINETIS_SIM_HAS_SOPT4_FTM3TRG1SRC)
+#  define SIM_SOPT4_FTM3TRG1SRC               (1 << 31) /* Bit 31: FlexTimer 3 Hardware Trigger 1 Source Select */
+#endif
+
+/* System Options Register 5 */
+
+#define SIM_SOPT5_UART0TXSRC_SHIFT            (0)       /* Bits 0-1: UART 0 transmit data source select */
+#define SIM_SOPT5_UART0TXSRC_MASK             (3 << SIM_SOPT5_UART0TXSRC_SHIFT)
+#  define SIM_SOPT5_UART0TXSRC_TX             (0 << SIM_SOPT5_UART0TXSRC_SHIFT) /* UART0_TX pin */
+#  define SIM_SOPT5_UART0TXSRC_FTM1           (1 << SIM_SOPT5_UART0TXSRC_SHIFT) /* UART0_TX modulated with FTM1 ch0 output */
+#  define SIM_SOPT5_UART0TXSRC_FTM2           (2 << SIM_SOPT5_UART0TXSRC_SHIFT) /* UART0_TX modulated with FTM2 ch0 output */
+#define SIM_SOPT5_UART0RXSRC_SHIFT            (2)       /* Bits 2-3: UART 0 receive data source select */
+#define SIM_SOPT5_UART0RXSRC_MASK             (3 << SIM_SOPT5_UART0RXSRC_SHIFT)
+#  define SIM_SOPT5_UART0RXSRC_RX             (0 << SIM_SOPT5_UART0RXSRC_SHIFT) /* UART0_RX pin */
+#  define SIM_SOPT5_UART0RXSRC_CMP0           (1 << SIM_SOPT5_UART0RXSRC_SHIFT) /* CMP0 */
+#  define SIM_SOPT5_UART0RXSRC_CMP1           (2 << SIM_SOPT5_UART0RXSRC_SHIFT) /* CMP1 */
+#define SIM_SOPT5_UART1TXSRC_SHIFT            (4)       /* Bits 4-5: UART 1 transmit data source select */
+#define SIM_SOPT5_UART1TXSRC_MASK             (3 << SIM_SOPT5_UART1TXSRC_SHIFT)
+#  define SIM_SOPT5_UART1TXSRC_TX             (0 << SIM_SOPT5_UART1TXSRC_SHIFT) /* UART1_TX pin */
+#  define SIM_SOPT5_UART1TXSRC_FTM1           (1 << SIM_SOPT5_UART1TXSRC_SHIFT) /* UART1_TX modulated with FTM1 ch0 output */
+#  define SIM_SOPT5_UART1TXSRC_FTM2           (2 << SIM_SOPT5_UART1TXSRC_SHIFT) /* UART1_TX modulated with FTM2 ch0 output */
+#define SIM_SOPT5_UART1RXSRC_SHIFT            (6)       /* Bits 6-7: UART 1 receive data source select */
+#define SIM_SOPT5_UART1RXSRC_MASK             (3 << SIM_SOPT5_UART1RXSRC_SHIFT)
+#  define SIM_SOPT5_UART1RXSRC_RX             (0 << SIM_SOPT5_UART1RXSRC_SHIFT) /* UART1_RX pin */
+#  define SIM_SOPT5_UART1RXSRC_CMP0           (1 << SIM_SOPT5_UART1RXSRC_SHIFT) /* CMP0 */
+#  define SIM_SOPT5_UART1RXSRC_CMP1           (2 << SIM_SOPT5_UART1RXSRC_SHIFT) /* CMP1 */
+                                                        /* Bits 8-31: Reserved */
+#if defined(KINETIS_SIM_HAS_SOPT5_LPUART0TXSRC)
+                                                        /* Bits 8-15, 18-31: Reserved */
+#  define SIM_SOPT5_LPUART0TXSRC_SHIFT        (16)      /* Bit 16:  LPUART0 transmit data source select */
+#  define SIM_SOPT5_LPUART0TXSRC_MASK         (3 << SIM_SOPT5_LPUART0TXSRC_SHIFT)
+#    define SIM_SOPT5_LPUART0TXSRC_TX         (0 << SIM_SOPT5_LPUART0TXSRC_SHIFT) /* LPUART0_TX pin */
+#    define SIM_SOPT5_LPUART0TXSRC_TXTMP1CH0  (1 << SIM_SOPT5_LPUART0TXSRC_SHIFT) /* LPUART0_TX pin modulated with TPM1 channel 0 output */
+#    define SIM_SOPT5_LPUART0TXSRC_TXTMP2CH0  (2 << SIM_SOPT5_LPUART0TXSRC_SHIFT) /* LPUART0_TX pin modulated with TPM2 channel 0 output */
+#endif
+                                                        /* Bits 8-15, 18-31: Reserved */
+#if defined(KINETIS_SIM_HAS_SOPT5_LPUART0RXSRC)
+                                                        /* Bits 8-15, 20-31: Reserved */
+#  define SIM_SOPT5_LPUART0RXSRC_SHIFT        (18)      /* Bit 18:  LPUART0 receive data source select */
+#  define SIM_SOPT5_LPUART0RXSRC_MASK         (3 << SIM_SOPT5_LPUART0RXSRC_SHIFT)
+#    define SIM_SOPT5_LPUART0RXSRC_TX         (0 << SIM_SOPT5_LPUART0RXSRC_SHIFT) /* LPUART0_RX pin */
+#    define SIM_SOPT5_LPUART0RXSRC_TXTMP1CH0  (1 << SIM_SOPT5_LPUART0RXSRC_SHIFT) /* CMP0 output */
+#    define SIM_SOPT5_LPUART0RXSRC_TXTMP2CH0  (2 << SIM_SOPT5_LPUART0RXSRC_SHIFT) /* CMP1 output */
+#endif
+
+#if defined(KINETIS_SIM_HAS_SOPT6)
+/* System Options Register 6 */
+
+                                                        /* Bits 0-23: Reserved */
+#  if defined(KINETIS_SIM_HAS_SOPT6_MCC)
+                                                        /* Bits 16-23: Reserved */
+#    define SIM_SOPT6_MCC_SHIFT               (0)       /* Bits 0-15: NFC hold cycle in case FlexBus request while NFC is granted */
+#    define SIM_SOPT6_MCC_MASK                (0xffff << SIM_SOPT6_MCC_SHIFT)
+#    define SIM_SOPT6_MCC(n)                  (((n) & 0xffff) << SIM_SOPT6_MCC_SHIFT)
+#  endif
+                                                        /* Bits 16-23: Reserved */
+#  if defined(KINETIS_SIM_HAS_SOPT6_PCR)
+                                                        /* Bits 20-23: Reserved */
+#    define SIM_SOPT6_PCR_SHIFT               (16)      /* Bits 16-19: FlexBus hold cycles before FlexBus can release bus to NFC or to IDLE */
+#    define SIM_SOPT6_PCR_MASK                (7 << SIM_SOPT6_PCR_SHIFT)
+#    define SIM_SOPT6_PCR(n)                  (((n) & 7) << SIM_SOPT6_PCR_SHIFT)
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT6_RSTFLTSEL)
+#    define SIM_SOPT6_RSTFLTSEL_SHIFT         (24)      /* Bits 24-28: Reset pin filter select */
+#    define SIM_SOPT6_RSTFLTSEL_MASK          (31 << SIM_SOPT6_RSTFLTSEL_SHIFT)
+#       define SIM_SOPT6_RSTFLTSEL(n)         ((uint32_t)((n)-1) << SIM_SOPT6_RSTFLTSEL_SHIFT) /* n=1..32 */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT6_RSTFLTEN)
+#    define SIM_SOPT6_RSTFLTEN_SHIFT          (29)      /* Bits 29-31: Reset pin filter enable */
+#    define SIM_SOPT6_RSTFLTEN_MASK           (7 << SIM_SOPT6_RSTFLTEN_SHIFT)
+#    define SIM_SOPT6_RSTFLTEN_DISABLED       (0 << SIM_SOPT6_RSTFLTEN_SHIFT) /* All filtering disabled */
+#      define SIM_SOPT6_RSTFLTEN_BUSCLK1      (1 << SIM_SOPT6_RSTFLTEN_SHIFT) /* Bus clock filter enabled (normal); LPO clock filter enabled (stop) */
+#      define SIM_SOPT6_RSTFLTEN_LPO1         (2 << SIM_SOPT6_RSTFLTEN_SHIFT) /* LPO clock filter enabled */
+#      define SIM_SOPT6_RSTFLTEN_BUSCLK2      (3 << SIM_SOPT6_RSTFLTEN_SHIFT) /* Bus clock filter enabled (normal); All filtering disabled (stop) */
+#      define SIM_SOPT6_RSTFLTEN_LPO2         (4 << SIM_SOPT6_RSTFLTEN_SHIFT) /* PO clock filter enabled (normal); All filtering disabled (stop) */
+#  endif
+#endif
+
+/* System Options Register 7 */
+
+#if defined(KINETIS_SIM_HAS_SOPT7_ADC0TRGSEL)
+#  define SIM_SOPT7_ADC0TRGSEL_SHIFT          (0)       /* Bits 0-3: ADC0 trigger select */
+#  define SIM_SOPT7_ADC0TRGSEL_MASK           (15 << SIM_SOPT7_ADC0TRGSEL_SHIFT)
+#    define SIM_SOPT7_ADC0TRGSEL_PDB          (0 << SIM_SOPT7_ADC0TRGSEL_SHIFT)  /* PDB external trigger (PDB0_EXTRG) */
+#    define SIM_SOPT7_ADC0TRGSEL_CMP0         (1 << SIM_SOPT7_ADC0TRGSEL_SHIFT)  /* High speed comparator 0 output */
+#    define SIM_SOPT7_ADC0TRGSEL_CMP1         (2 << SIM_SOPT7_ADC0TRGSEL_SHIFT)  /* High speed comparator 1 output */
+#    define SIM_SOPT7_ADC0TRGSEL_CMP2         (3 << SIM_SOPT7_ADC0TRGSEL_SHIFT)  /* High speed comparator 2 output */
+#    define SIM_SOPT7_ADC0TRGSEL_PIT0         (4 << SIM_SOPT7_ADC0TRGSEL_SHIFT)  /* PIT trigger 0 */
+#    define SIM_SOPT7_ADC0TRGSEL_PIT1         (5 << SIM_SOPT7_ADC0TRGSEL_SHIFT)  /* PIT trigger 1 */
+#    define SIM_SOPT7_ADC0TRGSEL_PIT2         (6 << SIM_SOPT7_ADC0TRGSEL_SHIFT)  /* PIT trigger 2 */
+#    define SIM_SOPT7_ADC0TRGSEL_PIT3         (7 << SIM_SOPT7_ADC0TRGSEL_SHIFT)  /* PIT trigger 3 */
+#    define SIM_SOPT7_ADC0TRGSEL_FTM0         (8 << SIM_SOPT7_ADC0TRGSEL_SHIFT)  /* FTM0 trigger */
+#    define SIM_SOPT7_ADC0TRGSEL_FTM1         (9 << SIM_SOPT7_ADC0TRGSEL_SHIFT)  /* FTM1 trigger */
+#    define SIM_SOPT7_ADC0TRGSEL_FTM2         (10 << SIM_SOPT7_ADC0TRGSEL_SHIFT) /* FTM2 trigger */
+#    if KINETIS_SIM_HAS_SOPT7_ADC0TRGSEL > 10 && defined(KINETIS_SIM_HAS_SOPT4_FTM3CH0SRC)
+#        define SIM_SOPT7_ADC0TRGSEL_FTM3     (11 << SIM_SOPT7_ADC0TRGSEL_SHIFT) /* FTM3 trigger */
+#    endif
+#    if KINETIS_SIM_HAS_SOPT7_ADC0TRGSEL > 11
+#      define SIM_SOPT7_ADC0TRGSEL_ALARM      (12 << SIM_SOPT7_ADC0TRGSEL_SHIFT) /* RTC alarm */
+#    endif
+#    if KINETIS_SIM_HAS_SOPT7_ADC0TRGSEL > 12
+#      define SIM_SOPT7_ADC0TRGSEL_SECS       (13 << SIM_SOPT7_ADC0TRGSEL_SHIFT) /* RTC seconds */
+#    endif
+#    if KINETIS_SIM_HAS_SOPT7_ADC0TRGSEL > 13
+#      define SIM_SOPT7_ADC0TRGSEL_LPTMR      (14 << SIM_SOPT7_ADC0TRGSEL_SHIFT) /* Low-power timer trigger */
+#    endif
+#    if KINETIS_SIM_HAS_SOPT7_ADC0TRGSEL > 14
+#        define SIM_SOPT7_ADC0TRGSEL_TPM1CH0  (15 << SIM_SOPT7_ADC0TRGSEL_SHIFT) /* TPM1 channel 0 (A pretrigger) and channel 1 (B pretrigger) */
+#    endif
+#endif
+#if defined(KINETIS_SIM_HAS_SOPT7_ADC0PRETRGSEL)
+#  define SIM_SOPT7_ADC0PRETRGSEL             (1 << 4)  /* Bit 4:  ADC0 pretrigger select */
+#endif
+                                                        /* Bits 5-6: Reserved */
+#if defined(KINETIS_SIM_SOPT7_ADC0ALTTRGEN)
+#  define SIM_SOPT7_ADC0ALTTRGEN              (1 << 7)  /* Bit 7:  ADC0 alternate trigger enable */
+#endif
+
+#if defined(KINETIS_SIM_HAS_SOPT7_ADC1TRGSEL)
+#  define SIM_SOPT7_ADC1TRGSEL_SHIFT          (8)       /* Bits 8-11: ADC1 trigger select */
+#  define SIM_SOPT7_ADC1TRGSEL_MASK           (15 << SIM_SOPT7_ADC1TRGSEL_SHIFT)
+#    define SIM_SOPT7_ADC1TRGSEL_PDB          (0 << SIM_SOPT7_ADC1TRGSEL_SHIFT)  /* PDB external trigger (PDB0_EXTRG) */
+#    define SIM_SOPT7_ADC1TRGSEL_CMP0         (1 << SIM_SOPT7_ADC1TRGSEL_SHIFT)  /* High speed comparator 0 output */
+#    define SIM_SOPT7_ADC1TRGSEL_CMP1         (2 << SIM_SOPT7_ADC1TRGSEL_SHIFT)  /* High speed comparator 1 output */
+#    define SIM_SOPT7_ADC1TRGSEL_CMP2         (3 << SIM_SOPT7_ADC1TRGSEL_SHIFT)  /* High speed comparator 2 output */
+#    define SIM_SOPT7_ADC1TRGSEL_PIT0         (4 << SIM_SOPT7_ADC1TRGSEL_SHIFT)  /* PIT trigger 0 */
+#    define SIM_SOPT7_ADC1TRGSEL_PIT1         (5 << SIM_SOPT7_ADC1TRGSEL_SHIFT)  /* PIT trigger 1 */
+#    define SIM_SOPT7_ADC1TRGSEL_PIT2         (6 << SIM_SOPT7_ADC1TRGSEL_SHIFT)  /* PIT trigger 2 */
+#    define SIM_SOPT7_ADC1TRGSEL_PIT3         (7 << SIM_SOPT7_ADC1TRGSEL_SHIFT)  /* PIT trigger 3 */
+#    define SIM_SOPT7_ADC1TRGSEL_FTM0         (8 << SIM_SOPT7_ADC1TRGSEL_SHIFT)  /* FTM0 trigger */
+#    define SIM_SOPT7_ADC1TRGSEL_FTM1         (9 << SIM_SOPT7_ADC1TRGSEL_SHIFT)  /* FTM1 trigger */
+#    define SIM_SOPT7_ADC1TRGSEL_FTM2         (10 << SIM_SOPT7_ADC1TRGSEL_SHIFT) /* FTM2 trigger */
+#    define SIM_SOPT7_ADC1TRGSEL_ALARM        (12 << SIM_SOPT7_ADC1TRGSEL_SHIFT) /* RTC alarm */
+#    if KINETIS_SIM_HAS_SOPT7_ADC1TRGSEL > 10 && defined(KINETIS_SIM_HAS_SOPT4_FTM3CH0SRC)
+#        define SIM_SOPT7_ADC1TRGSEL_FTM3     (11 << SIM_SOPT7_ADC1TRGSEL_SHIFT) /* FTM3 trigger */
+#    endif
+#    if KINETIS_SIM_HAS_SOPT7_ADC1TRGSEL > 11
+#      define SIM_SOPT7_ADC1TRGSEL_ALARM      (12 << SIM_SOPT7_ADC1TRGSEL_SHIFT) /* RTC alarm */
+#    endif
+#    if KINETIS_SIM_HAS_SOPT7_ADC1TRGSEL > 12
+#      define SIM_SOPT7_ADC1TRGSEL_SECS       (13 << SIM_SOPT7_ADC1TRGSEL_SHIFT) /* RTC seconds */
+#    endif
+#    if KINETIS_SIM_HAS_SOPT7_ADC1TRGSEL > 13
+#      define SIM_SOPT7_ADC1TRGSEL_LPTMR      (14 << SIM_SOPT7_ADC1TRGSEL_SHIFT) /* Low-power timer trigger */
+#    endif
+#    if KINETIS_SIM_HAS_SOPT7_ADC1TRGSEL > 14
+#        define SIM_SOPT7_ADC1TRGSEL_TPM2CH0  (15 << SIM_SOPT7_ADC1TRGSEL_SHIFT) /* TPM2 channel 0 (A pretrigger) and channel 1 (B pretrigger) */
+#    endif
+#endif
+#if defined(KINETIS_SIM_HAS_SOPT7_ADC1PRETRGSEL)
+#  define SIM_SOPT7_ADC1PRETRGSEL             (1 << 12) /* Bit 12: ADC1 pre-trigger select */
+#endif
+                                                        /* Bits 13-14: Reserved */
+#if defined(KINETIS_SIM_SOPT7_ADC1ALTTRGEN)
+# define SIM_SOPT7_ADC1ALTTRGEN               (1 << 15) /* Bit 15: ADC1 alternate trigger enable */
+#endif
+                                                        /* Bits 16-31: Reserved */
+#if defined(KINETIS_SIM_HAS_SOPT7_ADC2TRGSEL)
+#  define SIM_SOPT7_ADC2TRGSEL_SHIFT          (16)      /* Bits 16-19: ADC2 trigger select */
+#  define SIM_SOPT7_ADC2TRGSEL_MASK           (15 << SIM_SOPT7_ADC2TRGSEL_SHIFT)
+#    define SIM_SOPT7_ADC2TRGSEL_PDB          (0 << SIM_SOPT7_ADC2TRGSEL_SHIFT)  /* PDB external trigger (PDB0_EXTRG) */
+#    define SIM_SOPT7_ADC2TRGSEL_CMP0         (1 << SIM_SOPT7_ADC2TRGSEL_SHIFT)  /* High speed comparator 0 output */
+#    define SIM_SOPT7_ADC2TRGSEL_CMP1         (2 << SIM_SOPT7_ADC2TRGSEL_SHIFT)  /* High speed comparator 1 output */
+#    define SIM_SOPT7_ADC2TRGSEL_CMP2         (3 << SIM_SOPT7_ADC2TRGSEL_SHIFT)  /* High speed comparator 2 output */
+#    define SIM_SOPT7_ADC2TRGSEL_PIT0         (4 << SIM_SOPT7_ADC2TRGSEL_SHIFT)  /* PIT trigger 0 */
+#    define SIM_SOPT7_ADC2TRGSEL_PIT1         (5 << SIM_SOPT7_ADC2TRGSEL_SHIFT)  /* PIT trigger 1 */
+#    define SIM_SOPT7_ADC2TRGSEL_PIT2         (6 << SIM_SOPT7_ADC2TRGSEL_SHIFT)  /* PIT trigger 2 */
+#    define SIM_SOPT7_ADC2TRGSEL_PIT3         (7 << SIM_SOPT7_ADC2TRGSEL_SHIFT)  /* PIT trigger 3 */
+#    define SIM_SOPT7_ADC2TRGSEL_FTM0         (8 << SIM_SOPT7_ADC2TRGSEL_SHIFT)  /* FTM0 trigger */
+#    define SIM_SOPT7_ADC2TRGSEL_FTM1         (9 << SIM_SOPT7_ADC2TRGSEL_SHIFT)  /* FTM1 trigger */
+#    define SIM_SOPT7_ADC2TRGSEL_FTM2         (10 << SIM_SOPT7_ADC2TRGSEL_SHIFT) /* FTM2 trigger */
+#    if KINETIS_SIM_HAS_SOPT7_ADC2TRGSEL > 10 && defined(KINETIS_SIM_HAS_SOPT4_FTM3CH0SRC)
+#        define SIM_SOPT7_ADC2TRGSEL_FTM3     (11 << SIM_SOPT7_ADC2TRGSEL_SHIFT) /* FTM3 trigger */
+#    endif
+#    if KINETIS_SIM_HAS_SOPT7_ADC2TRGSEL > 11
+#      define SIM_SOPT7_ADC2TRGSEL_ALARM      (12 << SIM_SOPT7_ADC2TRGSEL_SHIFT) /* RTC alarm */
+#    endif
+#    if KINETIS_SIM_HAS_SOPT7_ADC2TRGSEL > 12
+#      define SIM_SOPT7_ADC2TRGSEL_SECS       (13 << SIM_SOPT7_ADC2TRGSEL_SHIFT) /* RTC seconds */
+#    endif
+#    if KINETIS_SIM_HAS_SOPT7_ADC2TRGSEL > 13
+#      define SIM_SOPT7_ADC2TRGSEL_LPTMR      (14 << SIM_SOPT7_ADC2TRGSEL_SHIFT) /* Low-power timer trigger */
+#    endif
+#    if KINETIS_SIM_HAS_SOPT7_ADC2TRGSEL > 14
+#        define SIM_SOPT7_ADC2TRGSEL_CMP3    (15 << SIM_SOPT7_ADC2TRGSEL_SHIFT) /* High speed comparator 3 asynchronous interrupt */
+#    endif
+#endif
+#if defined(KINETIS_SIM_HAS_SOPT7_ADC2PRETRGSEL)
+#  define SIM_SOPT7_ADC2PRETRGSEL             (1 << 20) /* Bit 20:  ADC2 pretrigger select */
+#endif
+                                                        /* Bits 21-22: Reserved */
+#if defined(KINETIS_SIM_SOPT7_ADC2ALTTRGEN)
+#  define SIM_SOPT7_ADC2ALTTRGEN              (1 << 23) /* Bit 23:  ADC2 alternate trigger enable */
+#endif
+                                                        /* Bits 23-27: Reserved */
+#if defined(KINETIS_SIM_HAS_SOPT7_ADC3TRGSEL)
+#  define SIM_SOPT7_ADC3TRGSEL_SHIFT          (24)      /* Bits 24-27: ADC3 trigger select */
+#  define SIM_SOPT7_ADC3TRGSEL_MASK           (15 << SIM_SOPT7_ADC3TRGSEL_SHIFT)
+#    define SIM_SOPT7_ADC3TRGSEL_PDB          (0 << SIM_SOPT7_ADC3TRGSEL_SHIFT)  /* PDB external trigger (PDB0_EXTRG) */
+#    define SIM_SOPT7_ADC3TRGSEL_CMP0         (1 << SIM_SOPT7_ADC3TRGSEL_SHIFT)  /* High speed comparator 0 output */
+#    define SIM_SOPT7_ADC3TRGSEL_CMP1         (2 << SIM_SOPT7_ADC3TRGSEL_SHIFT)  /* High speed comparator 1 output */
+#    define SIM_SOPT7_ADC3TRGSEL_CMP2         (3 << SIM_SOPT7_ADC3TRGSEL_SHIFT)  /* High speed comparator 2 output */
+#    define SIM_SOPT7_ADC3TRGSEL_PIT0         (4 << SIM_SOPT7_ADC3TRGSEL_SHIFT)  /* PIT trigger 0 */
+#    define SIM_SOPT7_ADC3TRGSEL_PIT1         (5 << SIM_SOPT7_ADC3TRGSEL_SHIFT)  /* PIT trigger 1 */
+#    define SIM_SOPT7_ADC3TRGSEL_PIT2         (6 << SIM_SOPT7_ADC3TRGSEL_SHIFT)  /* PIT trigger 2 */
+#    define SIM_SOPT7_ADC3TRGSEL_PIT3         (7 << SIM_SOPT7_ADC3TRGSEL_SHIFT)  /* PIT trigger 3 */
+#    define SIM_SOPT7_ADC3TRGSEL_FTM0         (8 << SIM_SOPT7_ADC3TRGSEL_SHIFT)  /* FTM0 trigger */
+#    define SIM_SOPT7_ADC3TRGSEL_FTM1         (9 << SIM_SOPT7_ADC3TRGSEL_SHIFT)  /* FTM1 trigger */
+#    define SIM_SOPT7_ADC3TRGSEL_FTM2         (10 << SIM_SOPT7_ADC3TRGSEL_SHIFT) /* FTM2 trigger */
+#    if KINETIS_SIM_HAS_SOPT7_ADC3TRGSEL > 10 && defined(KINETIS_SIM_HAS_SOPT4_FTM3CH0SRC)
+#        define SIM_SOPT7_ADC3TRGSEL_FTM3     (11 << SIM_SOPT7_ADC3TRGSEL_SHIFT) /* FTM3 trigger */
+#    endif
+#    if KINETIS_SIM_HAS_SOPT7_ADC3TRGSEL > 11
+#      define SIM_SOPT7_ADC3TRGSEL_ALARM      (12 << SIM_SOPT7_ADC3TRGSEL_SHIFT) /* RTC alarm */
+#    endif
+#    if KINETIS_SIM_HAS_SOPT7_ADC3TRGSEL > 12
+#      define SIM_SOPT7_ADC3TRGSEL_SECS       (13 << SIM_SOPT7_ADC3TRGSEL_SHIFT) /* RTC seconds */
+#    endif
+#    if KINETIS_SIM_HAS_SOPT7_ADC3TRGSEL > 13
+#      define SIM_SOPT7_ADC3TRGSEL_LPTMR      (14 << SIM_SOPT7_ADC3TRGSEL_SHIFT) /* Low-power timer trigger */
+#    endif
+#    if KINETIS_SIM_HAS_SOPT7_ADC3TRGSEL > 14
+#        define SIM_SOPT7_ADC3TRGSEL_CMP3    (15 << SIM_SOPT7_ADC3TRGSEL_SHIFT) /* High speed comparator 3 asynchronous interrupt */
+#    endif
+#endif
+#if defined(KINETIS_SIM_HAS_SOPT7_ADC3PRETRGSEL)
+#  define SIM_SOPT7_ADC3PRETRGSEL             (1 << 28) /* Bit 28:  ADC3 pretrigger select */
+#endif
+                                                        /* Bits 29-30: Reserved */
+#if defined(KINETIS_SIM_SOPT7_ADC3ALTTRGEN)
+#  define SIM_SOPT7_ADC3ALTTRGEN              (1 << 31) /* Bit 31:  ADC3 alternate trigger enable */
+#endif
+
+#if defined(KINETIS_SIM_HAS_SOPT8)
+/* System Options Register 8 */
+
+#  if defined(KINETIS_SIM_HAS_SOPT8_FTM0SYNCBIT)
+#    define SIM_SOPT8_FTM0SYNCBIT             (1 << 0)  /* Bit 0:  FTM0 Hardware Trigger 0 Software Synchronization */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT8_FTM1SYNCBIT)
+#    define SIM_SOPT8_FTM1SYNCBIT             (1 << 1)  /* Bit 1:  FTM1 Hardware Trigger 0 Software Synchronization */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT8_FTM2SYNCBIT)
+#    define SIM_SOPT8_FTM2SYNCBIT             (1 << 2)  /* Bit 2:  FTM2 Hardware Trigger 0 Software Synchronization */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT8_FTM3SYNCBIT)
+#    define SIM_SOPT8_FTM3SYNCBIT             (1 << 3)  /* Bit 3:  FTM3 Hardware Trigger 0 Software Synchronization */
+#  endif
+                                                        /* Bits 4-15: Reserved */
+#  if defined(KINETIS_SIM_HAS_SOPT8_FTM0OCH0SRC)
+#    define SIM_SOPT8_FTM0OCH0SRC             (1 << 16) /* Bit 16:  FTM0 channel 0 output source */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT8_FTM0OCH1SRC)
+#    define SIM_SOPT8_FTM0OCH1SRC             (1 << 17) /* Bit 17:  FTM0 channel 1 output source */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT8_FTM0OCH2SRC)
+#    define SIM_SOPT8_FTM0OCH2SRC             (1 << 18) /* Bit 18:  FTM0 channel 2 output source */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT8_FTM0OCH3SRC)
+#    define SIM_SOPT8_FTM0OCH3SRC             (1 << 19) /* Bit 19:  FTM0 channel 3 output source */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT8_FTM0OCH4SRC)
+#    define SIM_SOPT8_FTM0OCH4SRC             (1 << 20) /* Bit 20:  FTM0 channel 4 output source */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT8_FTM0OCH5SRC)
+#    define SIM_SOPT8_FTM0OCH5SRC             (1 << 21) /* Bit 21:  FTM0 channel 5 output source */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT8_FTM0OCH6SRC)
+#    define SIM_SOPT8_FTM0OCH6SRC             (1 << 22) /* Bit 22:  FTM0 channel 6 output source */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT8_FTM0OCH7SRC)
+#    define SIM_SOPT8_FTM0OCH7SRC             (1 << 23) /* Bit 23:  FTM0 channel 7 output source */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT8_FTM3OCH0SRC)
+#    define SIM_SOPT8_FTM3OCH0SRC             (1 << 24) /* Bit 24:  FTM3 channel 0 output source */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT8_FTM3OCH1SRC)
+#    define SIM_SOPT8_FTM3OCH1SRC             (1 << 25) /* Bit 25:  FTM3 channel 1 output source */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT8_FTM3OCH2SRC)
+#    define SIM_SOPT8_FTM3OCH2SRC             (1 << 26) /* Bit 26:  FTM3 channel 2 output source */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT8_FTM3OCH3SRC)
+#    define SIM_SOPT8_FTM3OCH3SRC             (1 << 27) /* Bit 27:  FTM3 channel 3 output source */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT8_FTM3OCH4SRC)
+#    define SIM_SOPT8_FTM3OCH4SRC             (1 << 28) /* Bit 28:  FTM3 channel 4 output source */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT8_FTM3OCH5SRC)
+#    define SIM_SOPT8_FTM3OCH5SRC             (1 << 29) /* Bit 29:  FTM3 channel 5 output source */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT8_FTM3OCH6SRC)
+#    define SIM_SOPT8_FTM3OCH6SRC             (1 << 30) /* Bit 30:  FTM3 channel 6 output source */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT8_FTM3OCH7SRC)
+#    define SIM_SOPT8_FTM3OCH7SRC             (1 << 31) /* Bit 31:  FTM3 channel 7 output source */
+#  endif
+#endif
+
+#if defined(KINETIS_SIM_HAS_SOPT9)
+/* System Options Register 9 */
+
+                                                        /* Bits 0-17: Reserved */
+#  if defined(KINETIS_SIM_HAS_SOPT9_TPM1CH0SRC)
+#    define SIM_SOPT9_TPM1CH0SRC_SHIFT        (18)      /* Bits 18-19:  TPM1 channel 0 input capture source select */
+#    define SIM_SOPT9_TPM1CH0SRC_MASK         (3 << SIM_SOPT9_TPM1CH0SRC_SHIFT)
+#      define SIM_SOPT9_TPM1CH0SRC_TMP1CH0    (0 << SIM_SOPT9_TPM1CH0SRC_SHIFT)
+#      define SIM_SOPT9_TPM1CH0SRC_CMP0       (1 << SIM_SOPT9_TPM1CH0SRC_SHIFT)
+#      define SIM_SOPT9_TPM1CH0SRC_CMP1       (2 << SIM_SOPT9_TPM1CH0SRC_SHIFT)
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT9_TPM2CH0SRC)
+#    define SIM_SOPT9_TPM2CH0SRC_SHIFT        (20)      /* Bits 20-21  TPM2 channel 0 input capture source select */
+#    define SIM_SOPT9_TPM2CH0SRC_MASK         (3 << SIM_SOPT9_TPM2CH0SRC_SHIFT)
+#      define SIM_SOPT9_TPM2CH0SRC_TMP1CH0    (0 << SIM_SOPT9_TPM2CH0SRC_SHIFT)
+#      define SIM_SOPT9_TPM2CH0SRC_CMP0       (1 << SIM_SOPT9_TPM2CH0SRC_SHIFT)
+#      define SIM_SOPT9_TPM2CH0SRC_CMP1       (2 << SIM_SOPT9_TPM2CH0SRC_SHIFT)
+#  endif
+                                                        /* Bits 22-24: Reserved */
+#  if defined(KINETIS_SIM_HAS_SOPT9_TPM1CLKSEL)
+#    define SIM_SOPT9_TPM1CLKSEL              (1 << 25) /* Bit 25:  TPM1 External Clock Pin Select */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SOPT9_TPM2CLKSEL)
+#    define SIM_SOPT9_TPM2CLKSEL              (1 << 26) /* Bit 26:  TPM2 External Clock Pin Select */
+#  endif
+                                                        /* Bits 27-31: Reserved */
+#endif
+
+/* System Device Identification Register */
+
+#define SIM_SDID_PINID_SHIFT                  (0)       /* Bits 0-3: Pincount identification */
+#define SIM_SDID_PINID_MASK                   (15 << SIM_SDID_PINID_SHIFT)
+#  define SIM_SDID_PINID_32PIN                (2 << SIM_SDID_PINID_SHIFT)  /* 32-pin */
+#  define SIM_SDID_PINID_48PIN                (4 << SIM_SDID_PINID_SHIFT)  /* 48-pin */
+#  define SIM_SDID_PINID_64PIN                (5 << SIM_SDID_PINID_SHIFT)  /* 64-pin */
+#  define SIM_SDID_PINID_80PIN                (6 << SIM_SDID_PINID_SHIFT)  /* 80-pin */
+#  define SIM_SDID_PINID_81PIN                (7 << SIM_SDID_PINID_SHIFT)  /* 81-pin */
+#  define SIM_SDID_PINID_100PIN               (8 << SIM_SDID_PINID_SHIFT)  /* 100-pin */
+#  define SIM_SDID_PINID_121PIN               (9 << SIM_SDID_PINID_SHIFT)  /* 121-pin */
+#  define SIM_SDID_PINID_144PIN               (10 << SIM_SDID_PINID_SHIFT) /* 144-pin */
+#  define SIM_SDID_PINID_196PIN               (12 << SIM_SDID_PINID_SHIFT) /* 196-pin */
+#  define SIM_SDID_PINID_256PIN               (14 << SIM_SDID_PINID_SHIFT) /* 256-pin */
+#if defined(KINETIS_SIM_HAS_SDID_FAMID)
+#  if !defined(KINETIS_SIM_HAS_SDID_FAMILYID)
+#    define SIM_SDID_FAMID_SHIFT              (4)       /* Bits 4-6: Kinetis family identification */
+#    define SIM_SDID_FAMID_MASK               (7 << SIM_SDID_FAMID_SHIFT)
+#      define SIM_SDID_FAMID_K10              (0 << SIM_SDID_FAMID_SHIFT) /* K10 */
+#      define SIM_SDID_FAMID_K20              (1 << SIM_SDID_FAMID_SHIFT)) /* K20 */
+#      define SIM_SDID_FAMID_K30              (2 << SIM_SDID_FAMID_SHIFT)) /* K30 */
+#      define SIM_SDID_FAMID_K40              (3 << SIM_SDID_FAMID_SHIFT)) /* K40 */
+#      define SIM_SDID_FAMID_K60              (4 << SIM_SDID_FAMID_SHIFT)) /* K60 */
+#      define SIM_SDID_FAMID_K70              (5 << SIM_SDID_FAMID_SHIFT)) /* K70 */
+#      define SIM_SDID_FAMID_K50              (6 << SIM_SDID_FAMID_SHIFT)) /* K50 and K52 */
+#      define SIM_SDID_FAMID_K51              (7 << SIM_SDID_FAMID_SHIFT)) /* K51 and K53 */
+#  else
+#      define SIM_SDID_FAMID_K1X              (0 << SIM_SDID_FAMID_SHIFT) /* K1X */
+#      define SIM_SDID_FAMID_K2X              (1 << SIM_SDID_FAMID_SHIFT)) /* K2X */
+#      define SIM_SDID_FAMID_K3X              (2 << SIM_SDID_FAMID_SHIFT)) /* K3X */
+#      define SIM_SDID_FAMID_K4X              (3 << SIM_SDID_FAMID_SHIFT)) /* K4X */
+#      define SIM_SDID_FAMID_K6X              (4 << SIM_SDID_FAMID_SHIFT)) /* K6X */
+#      define SIM_SDID_FAMID_K7X              (5 << SIM_SDID_FAMID_SHIFT)) /* K7X */
+#  endif
+#endif
+                                                        /* Bits 7-11: Reserved */
+#if defined(KINETIS_SIM_HAS_SDID_DIEID)
+#  define SIM_SDID_DIEID_SHIFT                (7)       /* Bits 7-11:  Device Die ID */
+#  define SIM_SDID_DIEID_MASK                 (31 < SIM_SDID_DIEID_SHIFT)
+#endif
+
+#define SIM_SDID_REVID_SHIFT                  (12)      /* Bits 12-15: Device revision number */
+#define SIM_SDID_REVID_MASK                   (15 << SIM_SDID_REVID_SHIFT)
+                                                        /* Bits 16-31: Reserved */
+#if defined(KINETIS_SIM_HAS_SDID_SRAMSIZE)
+#  define SIM_SDID_SRAMSIZE_SHIFT             (16)      /* Bits 16-19: SRAM Size */
+#  define SIM_SDID_SRAMSIZE_MASK              (15 < SIM_SDID_SRAMSIZE_SHIFT)
+#endif
+#if defined(KINETIS_SIM_HAS_SDID_SERIESID)
+#  define SIM_SDID_SERIESID_SHIFT             (20)      /* Bits 20-23: Kinetis Series ID */
+#  define SIM_SDID_SERIESID_MASK              (15 << SIM_SDID_SERIESID_SHIFT)
+#  define SIM_SDID_SERIESID_K                 (0 << SIM_SDID_SERIESID_SHIFT) /* Kinetis K series */
+#  define SIM_SDID_SERIESID_L                 (1 << SIM_SDID_SERIESID_SHIFT) /* Kinetis L series */
+#  define SIM_SDID_SERIESID_W                 (5 << SIM_SDID_SERIESID_SHIFT) /* Kinetis W series */
+#  define SIM_SDID_SERIESID_V                 (6 << SIM_SDID_SERIESID_SHIFT) /* Kinetis V series */
+#endif
+#if defined(KINETIS_SIM_HAS_SDID_SUBFAMID)
+#  define SIM_SDID_SUBFAMID_SHIFT             (24)      /* Bits 24-27: Kinetis Sub-Family ID */
+#  define SIM_SDID_SUBFAMID_MASK              (15 << SIM_SDID_SUBFAMID_SHIFT)
+#  define SIM_SDID_SUBFAMID_KX0               (0 << SIM_SDID_SUBFAMID_SHIFT) /* Kx0 Subfamily */
+#  define SIM_SDID_SUBFAMID_KX1               (1 << SIM_SDID_SUBFAMID_SHIFT) /* Kx1 Subfamily (tamper detect) */
+#  define SIM_SDID_SUBFAMID_KX2               (2 << SIM_SDID_SUBFAMID_SHIFT) /* Kx2 Subfamily */
+#  define SIM_SDID_SUBFAMID_KX3               (3 << SIM_SDID_SUBFAMID_SHIFT) /* Kx3 Subfamily (tamper detect) */
+#  define SIM_SDID_SUBFAMID_KX4               (4 << SIM_SDID_SUBFAMID_SHIFT) /* Kx4 Subfamily */
+#  define SIM_SDID_SUBFAMID_KX5               (5 << SIM_SDID_SUBFAMID_SHIFT) /* Kx5 Subfamily (tamper detect) */
+#  define SIM_SDID_SUBFAMID_KX6               (6 << SIM_SDID_SUBFAMID_SHIFT) /* Kx6 Subfamily */
+#endif
+#if defined(KINETIS_SIM_HAS_SDID_FAMILYID)
+#  define SIM_SDID_FAMILYID_SHIFT             (28)      /* Bits 28-31: Kinetis Family ID */
+#  define SIM_SDID_FAMILYID_MASK              (15 << SIM_SDID_FAMILYID_SHIFT)
+#    define SIM_SDID_FAMILYID_K0X             (0 << SIM_SDID_FAMILYID_SHIFT) /* K0x Family */
+#    define SIM_SDID_FAMILYID_K1X             (1 << SIM_SDID_FAMILYID_SHIFT) /* K1x Family */
+#    define SIM_SDID_FAMILYID_K2X             (2 << SIM_SDID_FAMILYID_SHIFT) /* K2x Family */
+#    define SIM_SDID_FAMILYID_K3X             (3 << SIM_SDID_FAMILYID_SHIFT) /* K3x Family */
+#    define SIM_SDID_FAMILYID_K4X             (4 << SIM_SDID_FAMILYID_SHIFT) /* K4x Family */
+#    define SIM_SDID_FAMILYID_K6X             (6 << SIM_SDID_FAMILYID_SHIFT) /* K6x Family */
+#    define SIM_SDID_FAMILYID_K7X             (7 << SIM_SDID_FAMILYID_SHIFT) /* K7x Family */
+#    define SIM_SDID_FAMILYID_K8X             (8 << SIM_SDID_FAMILYID_SHIFT) /* K8x Family */
+#endif
+
+
+/* System Clock Gating Control Register 1 */
+
+#if defined(KINETIS_SIM_HAS_SCGC1)
+                                                        /* Bits 0-9: Reserved */
+#  if defined(KINETIS_SIM_HAS_SCGC1_OSC1)
+                                                        /* Bits 0-4: Reserved */
+#    define SIM_SCGC1_OSC1                    (1 << 5)  /* OSC1 clock gate control */
+#  endif
+                                                        /* Bits 6-9: Reserved */
+#  if defined(KINETIS_SIM_HAS_SCGC1_I2C2)
+#    define SIM_SCGC1_I2C2                    (1 << 6)  /* Bit 6: I2C2 Clock Gate Control */
+#  endif
+                                                        /* Bits 7-9: Reserved */
+#  if defined(KINETIS_SIM_HAS_SCGC1_I2C3)
+#    define SIM_SCGC1_I2C3                    (1 << 7)  /* Bit 7: I2C3 Clock Gate Control */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SCGC1_UART4)
+#    define SIM_SCGC1_UART4                   (1 << 10) /* Bit 10: UART4 Clock Gate Control */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SCGC1_UART5)
+#    define SIM_SCGC1_UART5                   (1 << 11) /* Bit 11: UART5 Clock Gate Control */
+#  endif
+                                                        /* Bits 12-31: Reserved */
+#endif
+
+#if defined(KINETIS_SIM_HAS_SCGC2)
+/* System Clock Gating Control Register 2 */
+
+#  if defined(KINETIS_SIM_HAS_SCGC2_ENET) && defined(KINETIS_NENET) && KINETIS_NENET > 0
+#    define SIM_SCGC2_ENET                    (1 << 0)  /* Bit 0:  ENET Clock Gate Control */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SCGC2_LPUART0)
+#    define SIM_SCGC2_LPUART0                 (1 << 4)  /* Bit 4:  LPUART0 Clock Gate Control */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SCGC2_TPM1)
+#    define SIM_SCGC2_TPM1                    (1 << 9)  /* Bit 9:  TPM1 Clock Gate Control */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SCGC2_TPM2)
+#    define SIM_SCGC2_TPM2                    (1 << 10) /* Bit 10:  TPM2 Clock Gate Control */
+#  endif
+#  define SIM_SCGC2_DAC0                      (1 << 12) /* Bit 12: DAC0 Clock Gate Control */
+#  define SIM_SCGC2_DAC1                      (1 << 13) /* Bit 13: DAC1 Clock Gate Control */
+                                                        /* Bits 14-31: Reserved */
+#endif
+
+#if defined(KINETIS_SIM_HAS_SCGC3)
+/* System Clock Gating Control Register 3 */
+
+#  if defined(KINETIS_SIM_HAS_SCGC3_RNGA)  && defined(KINETIS_NRNG) && KINETIS_NRNG > 0
+#    define SIM_SCGC3_RNGA                    (1 << 0)  /* Bit 0:  RNGB Clock Gate Control */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SCGC3_USBHS)
+#    define SIM_SCGC3_USBHS                   (1 << 1)  /* Bit 1:  USBHS Clock Gate Control */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SCGC3_USBHSPHY)
+#    define SIM_SCGC3_USBHSPHY                (1 << 2)  /* Bit 2:  USBHS PHY Clock Gate Control */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SCGC3_USBHSDCD)
+#    define SIM_SCGC3_USBHSDCD                (1 << 3)  /* Bit 3:  USBHS DCD Clock Gate Control */
+#  endif
+                                                        /* Bits 5-11: Reserved */
+#  if defined(KINETIS_SIM_HAS_SCGC3_FLEXCAN1)
+#    define SIM_SCGC3_FLEXCAN1                (1 << 4)  /* Bit 4:  FlexCAN1 Clock Gate Control */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SCGC3_NFC)
+#    define SIM_SCGC3_FLEXCAN1                (1 << 8)  /* Bit 8:  NFC Clock Gate Control */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SCGC3_SPI2)
+#    define SIM_SCGC3_SPI2                    (1 << 12) /* Bit 12: SPI2 Clock Gate Control */
+#  endif
+                                                        /* Bits 13-14: Reserved */
+#  if defined(KINETIS_SIM_HAS_SCGC3_SAI1)
+#    define SIM_SCGC3_SAI1                    (1 << 15)  /* Bit 15:  SAI1 clock Gate control */
+#  endif
+                                                        /* Bit 16: Reserved */
+#  if defined(KINETIS_SIM_HAS_SCGC3_SDHC)
+#    define SIM_SCGC3_SDHC                    (1 << 17) /* Bit 17:  SDHC Clock Gate Control */
+#  endif
+                                                        /* Bits 18-23: Reserved */
+#  if defined(KINETIS_SIM_HAS_SCGC3_FTM2)
+#    define SIM_SCGC3_FTM2                    (1 << 24) /* Bit 24:  FTM2 Clock Gate Control */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SCGC3_FTM3) && defined(KINETIS_SIM_HAS_SOPT4_FTM3CH0SRC)
+#    define SIM_SCGC3_FTM3                    (1 << 25) /* Bit 25:  RFTM3 Clock Gate Control */
+#  endif
+                                                        /* Bit 26: Reserved */
+#  if defined(KINETIS_SIM_HAS_SCGC3_ADC1)
+#    define SIM_SCGC3_ADC1                    (1 << 27) /* Bit 27: ADC1 Clock Gate Control */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SCGC3_ADC3)
+#    define SIM_SCGC3_ADC3                    (1 << 28) /* Bit 28:  ADC3 Clock Gate Control */
+#  endif
+                                                        /* Bit 29: Reserved */
+#  if defined(KINETIS_SIM_HAS_SCGC3_SLCD) && defined(KINETIS_NSLCD) && KINETIS_NSLCD > 0
+#    define SIM_SCGC3_SLCD                    (1 << 30) /* Bit 30: Segment LCD Clock Gate Control */
+#  endif
+                                                        /* Bit 31: Reserved */
+#endif
+
+/* System Clock Gating Control Register 4 */
+
+                                                        /* Bit 0:  Reserved */
+#define SIM_SCGC4_EWM                         (1 << 1)  /* Bit 1:  EWM Clock Gate Control */
+#define SIM_SCGC4_CMT                         (1 << 2)  /* Bit 2:  CMT Clock Gate Control */
+                                                        /* Bits 3-5: Reserved */
+#define SIM_SCGC4_I2C0                        (1 << 6)  /* Bit 6:  I2C0 Clock Gate Control */
+#define SIM_SCGC4_I2C1                        (1 << 7)  /* Bit 7:  I2C1 Clock Gate Control */
+                                                        /* Bits 8-9: Reserved */
+#if defined(KINETIS_SIM_HAS_SCGC4_UART0)
+#  define SIM_SCGC4_UART0                     (1 << 10) /* Bit 10: UART0 Clock Gate Control */
+#endif
+#if defined(KINETIS_SIM_HAS_SCGC4_UART1)
+#  define SIM_SCGC4_UART1                     (1 << 11) /* Bit 11: UART1 Clock Gate Control */
+#endif
+#if defined(KINETIS_SIM_HAS_SCGC4_UART2)
+#  define SIM_SCGC4_UART2                     (1 << 12) /* Bit 12: UART2 Clock Gate Control */
+#endif
+#if defined(KINETIS_SIM_HAS_SCGC4_UART3)
+#  define SIM_SCGC4_UART3                     (1 << 13) /* Bit 13: UART3 Clock Gate Control */
+#endif
+                                                        /* Bits 14-17: Reserved */
+#define SIM_SCGC4_USBOTG                      (1 << 18) /* Bit 18: USB Clock Gate Control */
+#define SIM_SCGC4_CMP                         (1 << 19) /* Bit 19: Comparator Clock Gate Control */
+#define SIM_SCGC4_VREF                        (1 << 20) /* Bit 20: VREF Clock Gate Control */
+                                                        /* Bits 21-17: Reserved */
+#if defined(KINETIS_SIM_HAS_SCGC4_LLWU)
+#  define SIM_SCGC4_LLWU                      (1 << 28) /* Bit 28: LLWU Clock Gate Control */
+#endif
+                                                /* Bits 29-31: Reserved */
+
+/* System Clock Gating Control Register 5 */
+
+#define SIM_SCGC5_LPTIMER                     (1 << 0)  /* Bit 0:  Low Power Timer Clock Gate Control */
+#if defined(KINETIS_SIM_HAS_SCGC5_REGFILE)
+#  define SIM_SCGC5_REGFILE                   (1 << 1)  /* Bit 1:  Register File Clock Gate Control */
+#endif
+                                                        /* Bits 2-4: Reserved */
+#if defined(KINETIS_SIM_HAS_SCGC5_TSI)
+#  define SIM_SCGC5_TSI                       (1 << 5)  /* Bit 5:  TSI Clock Gate Control */
+#endif
+                                                        /* Bits 6-8: Reserved */
+#define SIM_SCGC5_PORTA                       (1 << 9)  /* Bit 9:  Port A Clock Gate Control */
+#define SIM_SCGC5_PORTB                       (1 << 10) /* Bit 10: Port B Clock Gate Control */
+#define SIM_SCGC5_PORTC                       (1 << 11) /* Bit 11: Port C Clock Gate Control */
+#define SIM_SCGC5_PORTD                       (1 << 12) /* Bit 12: Port D Clock Gate Control */
+#define SIM_SCGC5_PORTE                       (1 << 13) /* Bit 13: Port E Clock Gate Control */
+#if defined(KINETIS_SIM_HAS_SCGC5_PORTF)
+#  define SIM_SCGC5_PORTF                     (1 << 14) /* Bit 14: Port F Clock Gate Control */
+#endif
+                                                /* Bits 14-31: Reserved */
+/* System Clock Gating Control Register 6 */
+#if defined(KINETIS_SIM_HAS_SCGC6_FTFL)
+#  define SIM_SCGC6_FTFL                      (1 << 0)  /* Bit 0:  Flash Memory Clock Gate Control */
+#endif
+#define SIM_SCGC6_DMAMUX0                     (1 << 1)  /* Bit 1:  DMA Mux 0 Clock Gate Control */
+                                                        /* Bits 2-3: Reserved */
+#if defined(KINETIS_SIM_HAS_SCGC6_DMAMUX1)
+#  define SIM_SCGC6_DMAMUX1                   (1 << 2)  /* Bit 2:  DMA Mux 1 Clock Gate Control */
+#endif
+#define SIM_SCGC6_FLEXCAN0                    (1 << 4)  /* Bit 4:  FlexCAN0 Clock Gate Control */
+                                                        /* Bits 5-9: Reserved */
+
+#if defined(KINETIS_SIM_HAS_SCGC6_RNGA)
+#  define SIM_SCGC6_RNGA                      (1 << 9)  /* Bit 9: SPI0 Clock Gate Control */
+#endif
+                                                        /* Bits 10-11: Reserved */
+#define SIM_SCGC6_SPI0                        (1 << 12) /* Bit 12: SPI0 Clock Gate Control */
+#define SIM_SCGC6_SPI1                        (1 << 13) /* Bit 13: SPI1 Clock Gate Control */
+                                                        /* Bit 14: Reserved */
+#define SIM_SCGC6_I2S                         (1 << 15) /* Bit 15: I2S Clock Gate Control */
+                                                        /* Bits 16-17: Reserved */
+#define SIM_SCGC6_CRC                         (1 << 18) /* Bit 18: CRC Clock Gate Control */
+                                                        /* Bits 19-20: Reserved */
+#if defined(KINETIS_SIM_HAS_SCGC6_USBHS)
+#  define SIM_SCGC6_USBHS                     (1 << 20) /* Bit 20: USB HS Clock Gate Control */
+#endif
+#define SIM_SCGC6_USBDCD                      (1 << 21) /* Bit 21: USB DCD Clock Gate Control */
+#define SIM_SCGC6_PDB                         (1 << 22) /* Bit 22: PDB Clock Gate Control */
+#define SIM_SCGC6_PIT                         (1 << 23) /* Bit 23: PIT Clock Gate Control */
+#define SIM_SCGC6_FTM0                        (1 << 24) /* Bit 24: FTM0 Clock Gate Control */
+#define SIM_SCGC6_FTM1                        (1 << 25) /* Bit 25: FTM1 Clock Gate Control */
+                                                        /* Bit 26: Reserved */
+#if defined(KINETIS_SIM_HAS_SCGC6_FTM2)
+#  define SIM_SCGC6_FTM2                      (1 << 26) /* Bit 26: FTM2 Clock Gate Control */
+#endif
+#define SIM_SCGC6_ADC0                        (1 << 27) /* Bit 27: ADC0 Clock Gate Control */
+                                                        /* Bit 28: Reserved */
+#if defined(KINETIS_SIM_HAS_SCGC6_ADC2)
+#  define SIM_SCGC6_ADC2                      (1 << 28) /* Bit 28: ADC2 Clock Gate Control */
+#endif
+#define SIM_SCGC6_RTC                         (1 << 29) /* Bit 29: RTC Clock Gate Control */
+                                                        /* Bits 30-31: Reserved */
+#if defined(KINETIS_SIM_HAS_SCGC6_DAC0)
+#  define SIM_SCGC6_DAC0                      (1 << 31) /* Bit 31: RTC Clock Gate Control */
+#endif
+
+#if defined(KINETIS_SIM_HAS_SCGC7)
+/* System Clock Gating Control Register 7 */
+
+#  if defined(KINETIS_SIM_HAS_SCGC7_FLEXBUS)
+#    define SIM_SCGC7_FLEXBUS                 (1 << 0)  /* Bit 0:  FlexBus Clock Gate Control */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SCGC7_DMA)
+#    define SIM_SCGC7_DMA                     (1 << 1)  /* Bit 1:  DMA Clock Gate Control */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SCGC7_MPU)
+#    define SIM_SCGC7_MPU                     (1 << 2)  /* Bit 2:  MPU Clock Gate Control */
+#  endif
+#  if defined(KINETIS_SIM_HAS_SCGC7_SDRAMC)
+#    define SIM_SCGC7_SDRAMC                  (1 << 3)  /* Bit 3:  SDRAMC Clock Gate Control */
+#  endif
+                                                        /* Bits 4-31: Reserved */
+#  endif
+
+/* System Clock Divider Register 1 */
+
+#if defined(KINETIS_SIM_HAS_CLKDIV1_OUTDIV5)
+                                                        /* Bits 0-15: Reserved */
+#endif
+#if defined(KINETIS_SIM_HAS_CLKDIV1_OUTDIV4)
+#  define SIM_CLKDIV1_OUTDIV4_SHIFT           (16)      /* Bits 16-19: Clock 4 output divider value */
+#  define SIM_CLKDIV1_OUTDIV4_MASK            (15 << SIM_CLKDIV1_OUTDIV4_SHIFT)
+#    define SIM_CLKDIV1_OUTDIV4(n)            ((uint32_t)((n)-1) << SIM_CLKDIV1_OUTDIV4_SHIFT) /* n=1..16 */
+#    define SIM_CLKDIV1_OUTDIV4_1             (0 << SIM_CLKDIV1_OUTDIV4_SHIFT)  /* Divide by 1 */
+#    define SIM_CLKDIV1_OUTDIV4_2             (1 << SIM_CLKDIV1_OUTDIV4_SHIFT)  /* Divide by 2 */
+#    define SIM_CLKDIV1_OUTDIV4_3             (2 << SIM_CLKDIV1_OUTDIV4_SHIFT)  /* Divide by 3 */
+#    define SIM_CLKDIV1_OUTDIV4_4             (3 << SIM_CLKDIV1_OUTDIV4_SHIFT)  /* Divide by 4 */
+#    define SIM_CLKDIV1_OUTDIV4_5             (4 << SIM_CLKDIV1_OUTDIV4_SHIFT)  /* Divide by 5 */
+#    define SIM_CLKDIV1_OUTDIV4_6             (5 << SIM_CLKDIV1_OUTDIV4_SHIFT)  /* Divide by 6 */
+#    define SIM_CLKDIV1_OUTDIV4_7             (6 << SIM_CLKDIV1_OUTDIV4_SHIFT)  /* Divide by 7 */
+#    define SIM_CLKDIV1_OUTDIV4_8             (7 << SIM_CLKDIV1_OUTDIV4_SHIFT)  /* Divide by 8 */
+#    define SIM_CLKDIV1_OUTDIV4_9             (8 << SIM_CLKDIV1_OUTDIV4_SHIFT)  /* Divide by 9 */
+#    define SIM_CLKDIV1_OUTDIV4_10            (9 << SIM_CLKDIV1_OUTDIV4_SHIFT)  /* Divide by 10 */
+#    define SIM_CLKDIV1_OUTDIV4_11            (10 << SIM_CLKDIV1_OUTDIV4_SHIFT) /* Divide by 11 */
+#    define SIM_CLKDIV1_OUTDIV4_12            (11 << SIM_CLKDIV1_OUTDIV4_SHIFT) /* Divide by 12 */
+#    define SIM_CLKDIV1_OUTDIV4_13            (12 << SIM_CLKDIV1_OUTDIV4_SHIFT) /* Divide by 13 */
+#    define SIM_CLKDIV1_OUTDIV4_14            (13 << SIM_CLKDIV1_OUTDIV4_SHIFT) /* Divide by 14 */
+#    define SIM_CLKDIV1_OUTDIV4_15            (14 << SIM_CLKDIV1_OUTDIV4_SHIFT) /* Divide by 15 */
+#    define SIM_CLKDIV1_OUTDIV4_16            (15 << SIM_CLKDIV1_OUTDIV4_SHIFT) /* Divide by 16 */
+#endif
+#if defined(KINETIS_SIM_HAS_CLKDIV1_OUTDIV3)
+#  define SIM_CLKDIV1_OUTDIV3_SHIFT           (20)      /* Bits 20-23: Clock 3 output divider value */
+#  define SIM_CLKDIV1_OUTDIV3_MASK            (15 << SIM_CLKDIV1_OUTDIV3_SHIFT)
+#    define SIM_CLKDIV1_OUTDIV3(n)            ((uint32_t)((n)-1) << SIM_CLKDIV1_OUTDIV3_SHIFT) /* n=1..16 */
+#    define SIM_CLKDIV1_OUTDIV3_1             (0 << SIM_CLKDIV1_OUTDIV3_SHIFT)  /* Divide by 1 */
+#    define SIM_CLKDIV1_OUTDIV3_2             (1 << SIM_CLKDIV1_OUTDIV3_SHIFT)  /* Divide by 2 */
+#    define SIM_CLKDIV1_OUTDIV3_3             (2 << SIM_CLKDIV1_OUTDIV3_SHIFT)  /* Divide by 3 */
+#    define SIM_CLKDIV1_OUTDIV3_4             (3 << SIM_CLKDIV1_OUTDIV3_SHIFT)  /* Divide by 4 */
+#    define SIM_CLKDIV1_OUTDIV3_5             (4 << SIM_CLKDIV1_OUTDIV3_SHIFT)  /* Divide by 5 */
+#    define SIM_CLKDIV1_OUTDIV3_6             (5 << SIM_CLKDIV1_OUTDIV3_SHIFT)  /* Divide by 6 */
+#    define SIM_CLKDIV1_OUTDIV3_7             (6 << SIM_CLKDIV1_OUTDIV3_SHIFT)  /* Divide by 7 */
+#    define SIM_CLKDIV1_OUTDIV3_8             (7 << SIM_CLKDIV1_OUTDIV3_SHIFT)  /* Divide by 8 */
+#    define SIM_CLKDIV1_OUTDIV3_9             (8 << SIM_CLKDIV1_OUTDIV3_SHIFT)  /* Divide by 9 */
+#    define SIM_CLKDIV1_OUTDIV3_10            (9 << SIM_CLKDIV1_OUTDIV3_SHIFT)  /* Divide by 10 */
+#    define SIM_CLKDIV1_OUTDIV3_11            (10 << SIM_CLKDIV1_OUTDIV3_SHIFT) /* Divide by 11 */
+#    define SIM_CLKDIV1_OUTDIV3_12            (11 << SIM_CLKDIV1_OUTDIV3_SHIFT) /* Divide by 12 */
+#    define SIM_CLKDIV1_OUTDIV3_13            (12 << SIM_CLKDIV1_OUTDIV3_SHIFT) /* Divide by 13 */
+#    define SIM_CLKDIV1_OUTDIV3_14            (13 << SIM_CLKDIV1_OUTDIV3_SHIFT) /* Divide by 14 */
+#    define SIM_CLKDIV1_OUTDIV3_15            (14 << SIM_CLKDIV1_OUTDIV3_SHIFT) /* Divide by 15 */
+#    define SIM_CLKDIV1_OUTDIV3_16            (15 << SIM_CLKDIV1_OUTDIV3_SHIFT) /* Divide by 16 */
+#endif
+#if defined(KINETIS_SIM_HAS_CLKDIV1_OUTDIV2)
+#  define SIM_CLKDIV1_OUTDIV2_SHIFT           (24)      /* Bits 24-27: Clock 2 output divider value */
+#  define SIM_CLKDIV1_OUTDIV2_MASK            (15 << SIM_CLKDIV1_OUTDIV2_SHIFT)
+#    define SIM_CLKDIV1_OUTDIV2(n)            ((uint32_t)((n)-1) << SIM_CLKDIV1_OUTDIV2_SHIFT) /* n=1..16 */
+#    define SIM_CLKDIV1_OUTDIV2_1             (0 << SIM_CLKDIV1_OUTDIV2_SHIFT)  /* Divide by 1 */
+#    define SIM_CLKDIV1_OUTDIV2_2             (1 << SIM_CLKDIV1_OUTDIV2_SHIFT)  /* Divide by 2 */
+#    define SIM_CLKDIV1_OUTDIV2_3             (2 << SIM_CLKDIV1_OUTDIV2_SHIFT)  /* Divide by 3 */
+#    define SIM_CLKDIV1_OUTDIV2_4             (3 << SIM_CLKDIV1_OUTDIV2_SHIFT)  /* Divide by 4 */
+#    define SIM_CLKDIV1_OUTDIV2_5             (4 << SIM_CLKDIV1_OUTDIV2_SHIFT)  /* Divide by 5 */
+#    define SIM_CLKDIV1_OUTDIV2_6             (5 << SIM_CLKDIV1_OUTDIV2_SHIFT)  /* Divide by 6 */
+#    define SIM_CLKDIV1_OUTDIV2_7             (6 << SIM_CLKDIV1_OUTDIV2_SHIFT)  /* Divide by 7 */
+#    define SIM_CLKDIV1_OUTDIV2_8             (7 << SIM_CLKDIV1_OUTDIV2_SHIFT)  /* Divide by 8 */
+#    define SIM_CLKDIV1_OUTDIV2_9             (8 << SIM_CLKDIV1_OUTDIV2_SHIFT)  /* Divide by 9 */
+#    define SIM_CLKDIV1_OUTDIV2_10            (9 << SIM_CLKDIV1_OUTDIV2_SHIFT)  /* Divide by 10 */
+#    define SIM_CLKDIV1_OUTDIV2_11            (10 << SIM_CLKDIV1_OUTDIV2_SHIFT) /* Divide by 11 */
+#    define SIM_CLKDIV1_OUTDIV2_12            (11 << SIM_CLKDIV1_OUTDIV2_SHIFT) /* Divide by 12 */
+#    define SIM_CLKDIV1_OUTDIV2_13            (12 << SIM_CLKDIV1_OUTDIV2_SHIFT) /* Divide by 13 */
+#    define SIM_CLKDIV1_OUTDIV2_14            (13 << SIM_CLKDIV1_OUTDIV2_SHIFT) /* Divide by 14 */
+#    define SIM_CLKDIV1_OUTDIV2_15            (14 << SIM_CLKDIV1_OUTDIV2_SHIFT) /* Divide by 15 */
+#    define SIM_CLKDIV1_OUTDIV2_16            (15 << SIM_CLKDIV1_OUTDIV2_SHIFT) /* Divide by 16 */
+#endif
+#define SIM_CLKDIV1_OUTDIV1_SHIFT             (28)      /* Bits 28-31: Clock 1 output divider value */
+#define SIM_CLKDIV1_OUTDIV1_MASK              (15 << SIM_CLKDIV1_OUTDIV1_SHIFT)
+#  define SIM_CLKDIV1_OUTDIV1(n)              ((uint32_t)((n)-1) << SIM_CLKDIV1_OUTDIV1_SHIFT) /* n=1..16 */
+#  define SIM_CLKDIV1_OUTDIV1_1               (0 << SIM_CLKDIV1_OUTDIV1_SHIFT)  /* Divide by 1 */
+#  define SIM_CLKDIV1_OUTDIV1_2               (1 << SIM_CLKDIV1_OUTDIV1_SHIFT)  /* Divide by 2 */
+#  define SIM_CLKDIV1_OUTDIV1_3               (2 << SIM_CLKDIV1_OUTDIV1_SHIFT)  /* Divide by 3 */
+#  define SIM_CLKDIV1_OUTDIV1_4               (3 << SIM_CLKDIV1_OUTDIV1_SHIFT)  /* Divide by 4 */
+#  define SIM_CLKDIV1_OUTDIV1_5               (4 << SIM_CLKDIV1_OUTDIV1_SHIFT)  /* Divide by 5 */
+#  define SIM_CLKDIV1_OUTDIV1_6               (5 << SIM_CLKDIV1_OUTDIV1_SHIFT)  /* Divide by 6 */
+#  define SIM_CLKDIV1_OUTDIV1_7               (6 << SIM_CLKDIV1_OUTDIV1_SHIFT)  /* Divide by 7 */
+#  define SIM_CLKDIV1_OUTDIV1_8               (7 << SIM_CLKDIV1_OUTDIV1_SHIFT)  /* Divide by 8 */
+#  define SIM_CLKDIV1_OUTDIV1_9               (8 << SIM_CLKDIV1_OUTDIV1_SHIFT)  /* Divide by 9 */
+#  define SIM_CLKDIV1_OUTDIV1_10              (9 << SIM_CLKDIV1_OUTDIV1_SHIFT)  /* Divide by 10 */
+#  define SIM_CLKDIV1_OUTDIV1_11              (10 << SIM_CLKDIV1_OUTDIV1_SHIFT) /* Divide by 11 */
+#  define SIM_CLKDIV1_OUTDIV1_12              (11 << SIM_CLKDIV1_OUTDIV1_SHIFT) /* Divide by 12 */
+#  define SIM_CLKDIV1_OUTDIV1_13              (12 << SIM_CLKDIV1_OUTDIV1_SHIFT) /* Divide by 13 */
+#  define SIM_CLKDIV1_OUTDIV1_14              (13 << SIM_CLKDIV1_OUTDIV1_SHIFT) /* Divide by 14 */
+#  define SIM_CLKDIV1_OUTDIV1_15              (14 << SIM_CLKDIV1_OUTDIV1_SHIFT) /* Divide by 15 */
+#  define SIM_CLKDIV1_OUTDIV1_16              (15 << SIM_CLKDIV1_OUTDIV1_SHIFT) /* Divide by 16 */
+
+/* System Clock Divider Register 2 */
+
+#if defined(KINETIS_SIM_HAS_CLKDIV2_USBFRAC)
+#  define SIM_CLKDIV2_USBFRAC_SHIFT           (0)  /* Bit 0:  USB clock divider fraction */
+#  define SIM_CLKDIV2_USBFRAC_MASK            (1 << SIM_CLKDIV2_USBFRAC_SHIFT)
+#    define SIM_CLKDIV2_USBFRAC(n)            ((((n)-1) & 1) << SIM_CLKDIV2_USBFRAC_SHIFT) /* n=1..2 */
+#endif
+#if defined(KINETIS_SIM_HAS_CLKDIV2_USBDIV)
+#  define SIM_CLKDIV2_USBDIV_SHIFT            (1)       /* Bits 1-3: USB clock divider divisor */
+#  define SIM_CLKDIV2_USBDIV_MASK             (7 << SIM_CLKDIV2_USBDIV_SHIFT)
+#  define SIM_CLKDIV2_USBDIV(n)               ((((n)-1) & 7) << SIM_CLKDIV2_USBDIV_SHIFT) /* n=1..8 */
+#endif
+                                                        /* Bits 4-7: Reserved */
+#if defined(KINETIS_SIM_HAS_CLKDIV2_USBHSFRAC)
+#  define SIM_CLKDIV2_USBHSFRAC_SHIFT         (8)       /* Bit 8:  USB HS clock divider fraction */
+#  define SIM_CLKDIV2_USBHSFRAC_MASK          (1 << SIM_CLKDIV2_USBHSFRAC_SHIFT)
+#    define SIM_CLKDIV2_USBHSFRAC(n)          ((((n)-1) & 1) << SIM_CLKDIV2_USBHSFRAC_SHIFT) /* n=1..2 */
+#endif
+#if defined(KINETIS_SIM_HAS_CLKDIV2_USBHSDIV)
+#  define SIM_CLKDIV2_USBHSDIV_SHIFT          (9)       /* Bits 1-3: USB HS clock divider divisor */
+#  define SIM_CLKDIV2_USBHSDIV_MASK           (7 << SIM_CLKDIV2_USBHSDIV_SHIFT)
+#  define SIM_CLKDIV2_USBHSDIV(n)             ((((n)-1) & 7) << SIM_CLKDIV2_USBHSDIV_SHIFT) /* n=1..8 */
+#endif
+#if defined(KINETIS_SIM_HAS_CLKDIV2_I2SFRAC)
+#  define SIM_CLKDIV2_I2SFRAC_SHIFT           (8)       /* Bits 8-15: I2S clock divider fraction */
+#  define SIM_CLKDIV2_I2SFRAC_MASK            (0xff << SIM_CLKDIV2_I2SFRAC_SHIFT)
+#endif
+                                                        /* Bits 16-19: Reserved */
+#if defined(KINETIS_SIM_HAS_CLKDIV2_I2SDIV)
+#  define SIM_CLKDIV2_I2SDIV_SHIFT            (20)      /* Bits 20-31: I2S clock divider value */
+#  define SIM_CLKDIV2_I2SDIV_MASK             (0xfff << SIM_CLKDIV2_I2SDIV_SHIFT)
+#endif
+
+/* Flash Configuration Register 1 */
+
+#if defined(KINETIS_SIM_HAS_FCFG1_FTFDIS)
+#  define SIM_FCFG1_FTFDIS                    (1 << 0)  /* Bit 0:  Disable FTFE */
+#endif
+#if defined(KINETIS_SIM_HAS_FCFG1_FLASHDIS)
+#  define SIM_FCFG1_FLASHDIS                  (1 << 0)  /* Bit 0:  Flash Disable */
+#endif
+#if defined(KINETIS_SIM_HAS_FCFG1_FLASHDOZE)
+#  define SIM_FCFG1_FLASHDOZE                 (1 << 1)  /* Bit 1:  Flash Doze */
+#endif
+                                                        /* Bits 0-7: Reserved */
+#if defined(KINETIS_SIM_HAS_FCFG1_DEPART)
+#  define SIM_FCFG1_DEPART_SHIFT              (8)       /* Bits 8-11: FlexNVM partition */
+#  define SIM_FCFG1_DEPART_MASK               (15 << SIM_FCFG1_DEPART_SHIFT)
+#endif
+                                                        /* Bits 12-15: Reserved */
+#if defined(KINETIS_SIM_HAS_FCFG1_EESIZE)
+#  define SIM_FCFG1_EESIZE_SHIFT              (16)      /* Bits 16-19: EEPROM size */
+#  define SIM_FCFG1_EESIZE_MASK               (15 << SIM_FCFG1_EESIZE_SHIFT)
+#    define SIM_FCFG1_EESIZE_16KB             (0 << SIM_FCFG1_EESIZE_SHIFT)  /* 16 KB */
+#    define SIM_FCFG1_EESIZE_8KB              (1 << SIM_FCFG1_EESIZE_SHIFT)  /* 8 KB */
+#    define SIM_FCFG1_EESIZE_4KB              (2 << SIM_FCFG1_EESIZE_SHIFT)  /* 4 KB */
+#    define SIM_FCFG1_EESIZE_2KB              (3 << SIM_FCFG1_EESIZE_SHIFT)  /* 2 KB */
+#    define SIM_FCFG1_EESIZE_1KB              (4 << SIM_FCFG1_EESIZE_SHIFT)  /* 1 KB */
+#    define SIM_FCFG1_EESIZE_512B             (5 << SIM_FCFG1_EESIZE_SHIFT)  /* 512 Bytes */
+#    define SIM_FCFG1_EESIZE_256B             (6 << SIM_FCFG1_EESIZE_SHIFT)  /* 256 Bytes */
+#    define SIM_FCFG1_EESIZE_128B             (7 << SIM_FCFG1_EESIZE_SHIFT)  /* 128 Bytes */
+#    define SIM_FCFG1_EESIZE_64B              (8 << SIM_FCFG1_EESIZE_SHIFT)  /* 64 Bytes */
+#    define SIM_FCFG1_EESIZE_32B              (9 << SIM_FCFG1_EESIZE_SHIFT)  /* 32 Bytes */
+#    define SIM_FCFG1_EESIZE_NONE             (15 << SIM_FCFG1_EESIZE_SHIFT) /* 0 Bytes */
+#endif
+                                                        /* Bits 20-23: Reserved */
+#define SIM_FCFG1_PFSIZE_SHIFT                (24)      /* Bits 24-27: Program flash size */
+#define SIM_FCFG1_PFSIZE_MASK                 (15 << SIM_FCFG1_PFSIZE_SHIFT)
+#  if defined(KINETIS_K40)
+#    define SIM_FCFG1_PFSIZE_128KB            (7 << SIM_FCFG1_PFSIZE_SHIFT)  /* 128KB program flash, 4KB protection region */
+#    define SIM_FCFG1_PFSIZE_256KB            (9 << SIM_FCFG1_PFSIZE_SHIFT)  /* 256KB program flash, 8KB protection region */
+#    define SIM_FCFG1_PFSIZE_512KB            (11 << SIM_FCFG1_PFSIZE_SHIFT) /* 512KB program flash, 16KB protection region */
+#    define SIM_FCFG1_PFSIZE_512KB2           (15 << SIM_FCFG1_PFSIZE_SHIFT) /* 512KB program flash, 16KB protection region */
+#  endif
+#  if defined(KINETIS_K60)
+#    define SIM_FCFG1_PFSIZE_512KB            (11 << SIM_FCFG1_PFSIZE_SHIFT)  /* 512 KB, 16 KB protection size */
+#    define SIM_FCFG1_PFSIZE_1024KB           (13 << SIM_FCFG1_PFSIZE_SHIFT)  /* 1024 KB, 32 KB protection size */
+#    define SIM_FCFG1_PFSIZE_2048KB           (15 << SIM_FCFG1_PFSIZE_SHIFT)  /* 1024 KB, 32 KB protection size */
+#  endif
+#  if defined(KINETIS_K64) || defined(KINETIS_K66)
+#    define SIM_FCFG1_PFSIZE_32KB             (3 << SIM_FCFG1_PFSIZE_SHIFT)  /* 32 KB of program flash memory */
+#    define SIM_FCFG1_PFSIZE_64KB             (5 << SIM_FCFG1_PFSIZE_SHIFT)  /* 64 KB of program flash memory */
+#    define SIM_FCFG1_PFSIZE_128KB            (7 << SIM_FCFG1_PFSIZE_SHIFT)  /* 128 KB of program flash memory */
+#    define SIM_FCFG1_PFSIZE_256KB            (9 << SIM_FCFG1_PFSIZE_SHIFT)  /* 256 KB of program flash memory */
+#    define SIM_FCFG1_PFSIZE_512KB            (11 << SIM_FCFG1_PFSIZE_SHIFT)  /* 512 KB of program flash memory */
+#    define SIM_FCFG1_PFSIZE_1024KB           (13 << SIM_FCFG1_PFSIZE_SHIFT)  /* 1024 KB of program flash memory */
+#    define SIM_FCFG1_PFSIZE_2048KB           (15 << SIM_FCFG1_PFSIZE_SHIFT)  /* 2048 KB of program flash memory */
+#  endif
+
+#if defined(KINETIS_SIM_HAS_FCFG1_NVMSIZE)
+#  define SIM_FCFG1_NVMSIZE_SHIFT             (28)      /* Bits 28-31: FlexNVM size */
+#  define SIM_FCFG1_NVMSIZE_MASK              (15 << SIM_FCFG1_NVMSIZE_SHIFT)
+#    define SIM_FCFG1_NVMSIZE_NONE            (0 << SIM_FCFG1_NVMSIZE_SHIFT)  /*  0KB FlexNVM */
+#    define SIM_FCFG1_NVMSIZE_128KB           (7 << SIM_FCFG1_NVMSIZE_SHIFT)  /* 128KB FlexNVM, 16KB protection region */
+#    define SIM_FCFG1_NVMSIZE_256KB           (9 << SIM_FCFG1_NVMSIZE_SHIFT)  /* 256KB FlexNVM, 32KB protection region */
+#    define SIM_FCFG1_NVMSIZE_256KB2          (15 << SIM_FCFG1_NVMSIZE_SHIFT) /* 256KB FlexNVM, 32KB protection region */
+#endif
+
+/* Flash Configuration Register 2 */
+                                                /* Bits 0-15: Reserved */
+#if (KINETIS_SIM_HAS_FCFG2_MAXADDR1)
+#  define SIM_FCFG2_MAXADDR1_SHIFT            (16)      /* Bits 16-[21|22]: Max address block 1 */
+#  define SIM_FCFG2_MAXADDR1_MASK             (KINETIS_SIM_FCFG2_MAXADDR1_MASK << SIM_FCFG2_MAXADDR1_SHIFT)
+#  define SIM_FCFG2_MAXADDR1(n)               (((n) & KINETIS_SIM_FCFG2_MAXADDR1_MASK) << SIM_FCFG2_MAXADDR1_SHIFT)
+#endif
+                                                        /* Bit 22: Reserved */
+#if defined(KINETIS_SIM_HAS_FCFG2_PFLSH)
+#  define SIM_FCFG2_PFLSH                     (1 << 23) /* Bit 23: Program flash */
+#endif
+#if defined(KINETIS_SIM_HAS_FCFG2_MAXADDR0)
+#  define SIM_FCFG2_MAXADDR0_SHIFT            (24)      /* Bits 24-[29|30]: Max address block 0 */
+#  define SIM_FCFG2_MAXADDR0_MASK             (KINETIS_SIM_FCFG2_MAXADDR0_MASK << SIM_FCFG2_MAXADDR0_SHIFT)
+#  define SIM_FCFG2_MAXADDR0(n)               (((n) & KINETIS_SIM_FCFG2_MAXADDR0_MASK) << SIM_FCFG2_MAXADDR0_SHIFT)
+                                                        /* Bit 30: Reserved */
+#endif
+#if defined(KINETIS_SIM_HAS_FCFG2_SWAPPFLSH)
+#  define SIM_FCFG2_SWAPPFLSH                 (1 << 31) /* Bit 31: Swap program flash */
+#endif
+
+/* Unique Identification Register High. 32-bit Unique Identification. */
+/* Unique Identification Register Mid-High. 32-bit Unique Identification. */
+/* Unique Identification Register Mid Low. 32-bit Unique Identification. */
+/* Unique Identification Register Low. 32-bit Unique Identification. */
+
+#if defined(KINETIS_SIM_HAS_CLKDIV3)
+/* System Clock Divider Register 3 */
+
+#  if defined(KINETIS_SIM_HAS_CLKDIV3_PLLFLLFRAC)
+#    define SIM_CLKDIV3_PLLFLLFRAC_SHIFT       (0) /* Bit 0: PLLFLL clock divider fraction */
+#    define SIM_CLKDIV3_PLLFLLFRAC_MASK        (1 << SIM_CLKDIV3_PLLFLLFRAC_SHIFT)
+#      define SIM_CLKDIV3_PLLFLLFRAC(n)         ((((n)-1) & 1) <<  SIM_CLKDIV3_PLLFLLFRAC_SHIFT) /* n=1..2 */
+#  endif
+#  if defined(KINETIS_SIM_HAS_CLKDIV3_PLLFLLDIV)
+#    define SIM_CLKDIV3_PLLFLLDIV_SHIFT       (1)      /* Bits 1-3: PLLFLL clock divider divisor */
+#    define SIM_CLKDIV3_PLLFLLDIV_MASK        (7 << SIM_CLKDIV3_PLLFLLDIV_SHIFT)
+#      define SIM_CLKDIV3_PLLFLLDIV(n)        ((((n)-1) & 7)  << SIM_CLKDIV3_PLLFLLDIV_SHIFT) /* n=1..8 */
+#  endif
+#endif
+#if defined(KINETIS_SIM_HAS_CLKDIV4)
+/* System Clock Divider Register 4 */
+
+#  if defined(KINETIS_SIM_HAS_CLKDIV4_TRACEFRAC)
+#    define SIM_CLKDIV4_TRACEFRAC_SHIFTS      (0)      /* Bit 0: Trace clock divider fraction */
+#    define SIM_CLKDIV4_TRACEFRAC_MASK        (1 << SIM_CLKDIV4_TRACEFRAC_SHIFTS)
+#    define SIM_CLKDIV4_TRACEFRAC(n)          ((((n)-1) & 1) <<  SIM_CLKDIV4_TRACEFRAC_SHIFTS) /* n=1..2 */
+#  endif
+#  if defined(KINETIS_SIM_HAS_CLKDIV4_TRACEDIV)
+#    define SIM_CLKDIV4_TRACEDIV_SHIFT        (1)      /* Bits 1-3: Trace clock divider divisor */
+#    define SIM_CLKDIV4_TRACEDIV_MASK         (7 << SIM_CLKDIV3_TRACEDIV_SHIFT)
+#      define SIM_CLKDIV4_TRACEDIV(n)         ((((n)-1) & 7)  << SIM_CLKDIV4_TRACEDIV_SHIFT) /* n=1..8 */
+#  endif
+#  if defined(KINETIS_SIM_HAS_CLKDIV4_NFCFRAC)
+#    define SIM_CLKDIV4_NFCFRAC_SHIFT         (24) /* Bits 24-26: NFC clock divider fraction */
+#    define SIM_CLKDIV4_NFCFRAC_MASK          (7 << SIM_CLKDIV4_NFCFRAC_SHIFT)
+#    define SIM_CLKDIV4_NFCFRAC(n)            ((((n)-1) & 7) << SIM_CLKDIV4_NFCFRAC_SHIFT) /* n=1..8 */
+#  endif
+#  if defined(KINETIS_SIM_HAS_CLKDIV4_NFCDIV)
+#    define SIM_CLKDIV4_NFCDIV_SHIFT          (27)      /* Bits 27-31: NFC clock divider divisor */
+#    define SIM_CLKDIV4_NFCDIV_MASK           (31 << SIM_CLKDIV3_NFCDIV_SHIFT)
+#      define SIM_CLKDIV4_NFCDIV(n)           ((((n)-1) & 31)  << SIM_CLKDIV4_NFCDIV_SHIFT) /* n=1..32 */
+#  endif
+#endif
+
+#if defined(KINETIS_SIM_HAS_MCR)
+/* Misc Control Register */
+
+                                                            /* Bits 0-28: Reserved */
+#  define SIM_MCR_PDBLOOP                     (1<< 29)      /* Bit 29: PDB Loop Mode */
+                                                            /* Bit 30: Reserved */
+#  define SIM_MCR_TRACECLKDIS                 (1<< 31)      /* Bit 31: Trace clock disable. */
+#endif
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_SIM_H */
diff --git a/arch/arm/src/kinetis/kinetis_slcd.h b/arch/arm/src/kinetis/chip/kinetis_slcd.h
similarity index 99%
rename from arch/arm/src/kinetis/kinetis_slcd.h
rename to arch/arm/src/kinetis/chip/kinetis_slcd.h
index d56ee5c41eac0e547aeb67874a94d8b76bf95d34..d4a68f07f5a977efaa980bde2dfd00e3edd72b7c 100644
--- a/arch/arm/src/kinetis/kinetis_slcd.h
+++ b/arch/arm/src/kinetis/chip/kinetis_slcd.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/kinetis/kinetis_slcd.h
+ * arch/arm/src/kinetis/chip/kinetis_slcd.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_SLCD_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_SLCD_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_SLCD_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_SLCD_H
 
 /************************************************************************************
  * Included Files
@@ -417,4 +417,4 @@
  * Public Functions
  ************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_SLCD_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_SLCD_H */
diff --git a/arch/arm/src/kinetis/kinetis_smc.h b/arch/arm/src/kinetis/chip/kinetis_smc.h
similarity index 96%
rename from arch/arm/src/kinetis/kinetis_smc.h
rename to arch/arm/src/kinetis/chip/kinetis_smc.h
index 213ea80775972d3f6537b77ec3b36e492b1a0e2d..19a9d9d14b81dbe4c45ce8188adf3bc19c3d4ea1 100644
--- a/arch/arm/src/kinetis/kinetis_smc.h
+++ b/arch/arm/src/kinetis/chip/kinetis_smc.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/kinetis/kinetis_smc.h
+ * arch/arm/src/kinetis/chip/kinetis_smc.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_SMC_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_SMC_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_SMC_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_SMC_H
 
 /************************************************************************************
  * Included Files
@@ -119,4 +119,4 @@
  * Public Functions
  ************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_SMC_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_SMC_H */
diff --git a/arch/arm/src/kinetis/kinetis_tsi.h b/arch/arm/src/kinetis/chip/kinetis_tsi.h
similarity index 98%
rename from arch/arm/src/kinetis/kinetis_tsi.h
rename to arch/arm/src/kinetis/chip/kinetis_tsi.h
index ea52c0fd1db765848316645b2d9a5b9be5c1e56d..6881150160fe0ef2e41ae4b47b7942dfa3f5937b 100644
--- a/arch/arm/src/kinetis/kinetis_tsi.h
+++ b/arch/arm/src/kinetis/chip/kinetis_tsi.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/kinetis/kinetis_tsi.h
+ * arch/arm/src/kinetis/chip/kinetis_tsi.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_TSI_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_TSI_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_TSI_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_TSI_H
 
 /************************************************************************************
  * Included Files
@@ -308,4 +308,4 @@
  * Public Functions
  ************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_TSI_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_TSI_H */
diff --git a/arch/arm/src/kinetis/kinetis_uart.h b/arch/arm/src/kinetis/chip/kinetis_uart.h
similarity index 98%
rename from arch/arm/src/kinetis/kinetis_uart.h
rename to arch/arm/src/kinetis/chip/kinetis_uart.h
index fbdf7a3192a86cb4536100ef092b38beed3256a8..d7296ce7066de26b513823a294f4f3ba105e8c3b 100644
--- a/arch/arm/src/kinetis/kinetis_uart.h
+++ b/arch/arm/src/kinetis/chip/kinetis_uart.h
@@ -1,8 +1,9 @@
 /************************************************************************************
- * arch/arm/src/kinetis/kinetis_uart.h
+ * arch/arm/src/kinetis/chip/kinetis_uart.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2011, 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -33,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_UART_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_UART_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_UART_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_UART_H
 
 /************************************************************************************
  * Included Files
@@ -42,7 +43,7 @@
 
 #include 
 
-#include "kinetis_memorymap.h"
+#include "chip/kinetis_memorymap.h"
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -293,7 +294,7 @@
 
 #define UART_BDH_SBR_SHIFT           (0)       /* Bits 0-4: MS Bits 8-13 of the UART Baud Rate Bits */
 #define UART_BDH_SBR_MASK            (31 << UART_BDH_SBR_SHIFT)
-                                               /* Bit 5: Reserved */
+#define UART_BDH_SBNS                (1 << 5)  /* Bit 5:  Stop Bit Number Select */
 #define UART_BDH_RXEDGIE             (1 << 6)  /* Bit 6: RxD Input Active Edge Interrupt Enable */
 #define UART_BDH_LBKDIE              (1 << 7)  /* Bit 7: LIN Break Detect Interrupt Enable */
 
@@ -508,4 +509,4 @@
  * Public Functions
  ************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_UART_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_UART_H */
diff --git a/arch/arm/src/kinetis/kinetis_usbdcd.h b/arch/arm/src/kinetis/chip/kinetis_usbdcd.h
similarity index 87%
rename from arch/arm/src/kinetis/kinetis_usbdcd.h
rename to arch/arm/src/kinetis/chip/kinetis_usbdcd.h
index fad76d1500e8771666c3dc123a676dd905d72712..6c4297ff7afec566aa555d6dcc8c875db18bedbe 100644
--- a/arch/arm/src/kinetis/kinetis_usbdcd.h
+++ b/arch/arm/src/kinetis/chip/kinetis_usbdcd.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/kinetis/kinetis_usbdcd.h
+ * arch/arm/src/kinetis/chip/kinetis_usbdcd.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_USBDCD_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_USBDCD_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_USBDCD_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_USBDCD_H
 
 /************************************************************************************
  * Included Files
@@ -50,12 +50,17 @@
 
 /* Register Offsets *****************************************************************/
 
-#define KINETIS_USBDCD_CONTROL_OFFSET    0x0000 /* Control Register */
-#define KINETIS_USBDCD_CLOCK_OFFSET      0x0004 /* Clock Register */
-#define KINETIS_USBDCD_STATUS_OFFSET     0x0008 /* Status Register */
-#define KINETIS_USBDCD_TIMER0_OFFSET     0x0010 /* TIMER0 Register */
-#define KINETIS_USBDCD_TIMER1_OFFSET     0x0014 /* TIMER1 Register */
-#define KINETIS_USBDCD_TIMER2_OFFSET     0x0018 /* TIMER2 Register */
+#define KINETIS_USBDCD_CONTROL_OFFSET       0x0000 /* Control Register */
+#define KINETIS_USBDCD_CLOCK_OFFSET         0x0004 /* Clock Register */
+#define KINETIS_USBDCD_STATUS_OFFSET        0x0008 /* Status Register */
+#define KINETIS_USBDCD_TIMER0_OFFSET        0x0010 /* TIMER0 Register */
+#define KINETIS_USBDCD_TIMER1_OFFSET        0x0014 /* TIMER1 Register */
+#ifdef KINETIS_K64
+#  define KINETIS_USBDCD_TIMER2_BC11_OFFSET 0x0018 /* TIMER2_BC11 Register */
+#  define KINETIS_USBDCD_TIMER2_BC12_OFFSET 0x001c /* TIMER2_BC12 Register */
+#else
+#  define KINETIS_USBDCD_TIMER2_OFFSET      0x0018 /* TIMER2 Register */
+#endif
 
 /* Register Addresses ***************************************************************/
 
@@ -64,7 +69,12 @@
 #define KINETIS_USBDCD_STATUS            (KINETIS_USBDCD_BASE+KINETIS_USBDCD_STATUS_OFFSET)
 #define KINETIS_USBDCD_TIMER0            (KINETIS_USBDCD_BASE+KINETIS_USBDCD_TIMER0_OFFSET)
 #define KINETIS_USBDCD_TIMER1            (KINETIS_USBDCD_BASE+KINETIS_USBDCD_TIMER1_OFFSET)
-#define KINETIS_USBDCD_TIMER2            (KINETIS_USBDCD_BASE+KINETIS_USBDCD_TIMER2_OFFSET)
+#ifdef KINETIS_K64
+#  define KINETIS_USBDCD_TIMER2_BC11     (KINETIS_USBDCD_BASE+KINETIS_USBDCD_TIMER2_BC11_OFFSET)
+#  define KINETIS_USBDCD_TIMER2_BC12     (KINETIS_USBDCD_BASE+KINETIS_USBDCD_TIMER2_BC12_OFFSET)
+#else
+#  define KINETIS_USBDCD_TIMER2          (KINETIS_USBDCD_BASE+KINETIS_USBDCD_TIMER2_OFFSET)
+#endif
 
 /* Register Bit Definitions *********************************************************/
 
@@ -138,4 +148,4 @@
  * Public Functions
  ************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_USBDCD_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_USBDCD_H */
diff --git a/arch/arm/src/kinetis/chip/kinetis_usbotg.h b/arch/arm/src/kinetis/chip/kinetis_usbotg.h
new file mode 100644
index 0000000000000000000000000000000000000000..16cecc22610fb3c0a9a75adbf2c89d7bbe6f25f6
--- /dev/null
+++ b/arch/arm/src/kinetis/chip/kinetis_usbotg.h
@@ -0,0 +1,377 @@
+/********************************************************************************************
+ * arch/arm/src/kinetis/chip/kinetis_usbotg.h
+ *
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_USBOTG_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_USBOTG_H
+
+/********************************************************************************************
+ * Included Files
+ ********************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/********************************************************************************************
+ * Pre-processor Definitions
+ ********************************************************************************************/
+
+/* Register Offsets *************************************************************************/
+
+#define KINETIS_USB_PERID_OFFSET    0x0000 /* Peripheral ID Register */
+#define KINETIS_USB_IDCOMP_OFFSET   0x0004 /* Peripheral ID Complement Register */
+#define KINETIS_USB_REV_OFFSET      0x0008 /* Peripheral Revision Register */
+#define KINETIS_USB_ADDINFO_OFFSET  0x000c /* Peripheral Additional Info Register */
+#define KINETIS_USB_OTGISTAT_OFFSET 0x0010 /* OTG Interrupt Status Register */
+#define KINETIS_USB_OTGICR_OFFSET   0x0014 /* OTG Interrupt Control Register */
+#define KINETIS_USB_OTGSTAT_OFFSET  0x0018 /* OTG Status Register */
+#define KINETIS_USB_OTGCTL_OFFSET   0x001c /* OTG Control Register */
+#define KINETIS_USB_ISTAT_OFFSET    0x0080 /* Interrupt Status Register */
+#define KINETIS_USB_INTEN_OFFSET    0x0084 /* Interrupt Enable Register */
+#define KINETIS_USB_ERRSTAT_OFFSET  0x0088 /* Error Interrupt Status Register */
+#define KINETIS_USB_ERREN_OFFSET    0x008c /* Error Interrupt Enable Register */
+#define KINETIS_USB_STAT_OFFSET     0x0090 /* Status Register */
+#define KINETIS_USB_CTL_OFFSET      0x0094 /* Control Register */
+#define KINETIS_USB_ADDR_OFFSET     0x0098 /* Address Register */
+#define KINETIS_USB_BDTPAGE1_OFFSET 0x009c /* BDT Page Register 1 */
+#define KINETIS_USB_FRMNUML_OFFSET  0x00a0 /* Frame Number Register Low */
+#define KINETIS_USB_FRMNUMH_OFFSET  0x00a4 /* Frame Number Register High */
+#define KINETIS_USB_TOKEN_OFFSET    0x00a8 /* Token Register */
+#define KINETIS_USB_SOFTHLD_OFFSET  0x00ac /* SOF Threshold Register */
+#define KINETIS_USB_BDTPAGE2_OFFSET 0x00b0 /* BDT Page Register 2 */
+#define KINETIS_USB_BDTPAGE3_OFFSET 0x00b4 /* BDT Page Register 3 */
+
+#define KINETIS_USB_ENDPT_OFFSET(n) (0x00c0+((n)<<2)) /* Endpoint n Control Register */
+#define KINETIS_USB_ENDPT0_OFFSET   0x00c0 /* Endpoint 0 Control Register */
+#define KINETIS_USB_ENDPT1_OFFSET   0x00c4 /* Endpoint 1 Control Register */
+#define KINETIS_USB_ENDPT2_OFFSET   0x00c8 /* Endpoint 2 Control Register */
+#define KINETIS_USB_ENDPT3_OFFSET   0x00cc /* Endpoint 3 Control Register */
+#define KINETIS_USB_ENDPT4_OFFSET   0x00d0 /* Endpoint 4 Control Register */
+#define KINETIS_USB_ENDPT5_OFFSET   0x00d4 /* Endpoint 5 Control Register */
+#define KINETIS_USB_ENDPT6_OFFSET   0x00d8 /* Endpoint 6 Control Register */
+#define KINETIS_USB_ENDPT7_OFFSET   0x00dc /* Endpoint 7 Control Register */
+#define KINETIS_USB_ENDPT8_OFFSET   0x00e0 /* Endpoint 8 Control Register */
+#define KINETIS_USB_ENDPT9_OFFSET   0x00e4 /* Endpoint 9 Control Register */
+#define KINETIS_USB_ENDPT10_OFFSET  0x00e8 /* Endpoint 10 Control Register */
+#define KINETIS_USB_ENDPT11_OFFSET  0x00ec /* Endpoint 11 Control Register */
+#define KINETIS_USB_ENDPT12_OFFSET  0x00f0 /* Endpoint 12 Control Register */
+#define KINETIS_USB_ENDPT13_OFFSET  0x00f4 /* Endpoint 13 Control Register */
+#define KINETIS_USB_ENDPT14_OFFSET  0x00f8 /* Endpoint 14 Control Register */
+#define KINETIS_USB_ENDPT15_OFFSET  0x00fc /* Endpoint 15 Control Register */
+
+#define KINETIS_USB_USBCTRL_OFFSET  0x0100 /* USB Control Register */
+#define KINETIS_USB_OBSERVE_OFFSET  0x0104 /* USB OTG Observe Register */
+#define KINETIS_USB_CONTROL_OFFSET  0x0108 /* USB OTG Control Register */
+#define KINETIS_USB_USBTRC0_OFFSET  0x010c /* USB Transceiver Control Register 0 */
+
+#ifdef KINETIS_K64
+#  define KINETIS_USB_USBFRMADJUST_OFFSET                0x114 /* Frame Adjust Register */
+#  define KINETIS_USB_USB0_CLK_RECOVER_CTRL_OFFSET       0x140 /* USB Clock recovery control */
+#  define KINETIS_USB_USB0_CLK_RECOVER_IRC_EN_OFFSET     0x144 /* IRC48M oscillator enable register */
+#  define KINETIS_USB_USB0_CLK_RECOVER_INT_STATUS_OFFSET 0x15c /* Clock recovery sperated interrupt status */
+#endif
+
+/* Register Addresses ***********************************************************************/
+
+#define KINETIS_USB0_PERID          (KINETIS_USB0_BASE+KINETIS_USB_PERID_OFFSET)
+#define KINETIS_USB0_IDCOMP         (KINETIS_USB0_BASE+KINETIS_USB_IDCOMP_OFFSET)
+#define KINETIS_USB0_REV            (KINETIS_USB0_BASE+KINETIS_USB_REV_OFFSET)
+#define KINETIS_USB0_ADDINFO        (KINETIS_USB0_BASE+KINETIS_USB_ADDINFO_OFFSET)
+#define KINETIS_USB0_OTGISTAT       (KINETIS_USB0_BASE+KINETIS_USB_OTGISTAT_OFFSET)
+#define KINETIS_USB0_OTGICR         (KINETIS_USB0_BASE+KINETIS_USB_OTGICR_OFFSET)
+#define KINETIS_USB0_OTGSTAT        (KINETIS_USB0_BASE+KINETIS_USB_OTGSTAT_OFFSET)
+#define KINETIS_USB0_OTGCTL         (KINETIS_USB0_BASE+KINETIS_USB_OTGCTL_OFFSET)
+#define KINETIS_USB0_ISTAT          (KINETIS_USB0_BASE+KINETIS_USB_ISTAT_OFFSET)
+#define KINETIS_USB0_INTEN          (KINETIS_USB0_BASE+KINETIS_USB_INTEN_OFFSET)
+#define KINETIS_USB0_ERRSTAT        (KINETIS_USB0_BASE+KINETIS_USB_ERRSTAT_OFFSET)
+#define KINETIS_USB0_ERREN          (KINETIS_USB0_BASE+KINETIS_USB_ERREN_OFFSET)
+#define KINETIS_USB0_STAT           (KINETIS_USB0_BASE+KINETIS_USB_STAT_OFFSET)
+#define KINETIS_USB0_CTL            (KINETIS_USB0_BASE+KINETIS_USB_CTL_OFFSET)
+#define KINETIS_USB0_ADDR           (KINETIS_USB0_BASE+KINETIS_USB_ADDR_OFFSET)
+#define KINETIS_USB0_BDTPAGE1       (KINETIS_USB0_BASE+KINETIS_USB_BDTPAGE1_OFFSET)
+#define KINETIS_USB0_FRMNUML        (KINETIS_USB0_BASE+KINETIS_USB_FRMNUML_OFFSET)
+#define KINETIS_USB0_FRMNUMH        (KINETIS_USB0_BASE+KINETIS_USB_FRMNUMH_OFFSET)
+#define KINETIS_USB0_TOKEN          (KINETIS_USB0_BASE+KINETIS_USB_TOKEN_OFFSET)
+#define KINETIS_USB0_SOFTHLD        (KINETIS_USB0_BASE+KINETIS_USB_SOFTHLD_OFFSET)
+#define KINETIS_USB0_BDTPAGE2       (KINETIS_USB0_BASE+KINETIS_USB_BDTPAGE2_OFFSET)
+#define KINETIS_USB0_BDTPAGE3       (KINETIS_USB0_BASE+KINETIS_USB_BDTPAGE3_OFFSET)
+
+#define KINETIS_USB0_ENDPT(n)       (KINETIS_USB0_BASE+KINETIS_USB_ENDPT_OFFSET(n))
+#define KINETIS_USB0_ENDPT0         (KINETIS_USB0_BASE+KINETIS_USB_ENDPT0_OFFSET)
+#define KINETIS_USB0_ENDPT1         (KINETIS_USB0_BASE+KINETIS_USB_ENDPT1_OFFSET)
+#define KINETIS_USB0_ENDPT2         (KINETIS_USB0_BASE+KINETIS_USB_ENDPT2_OFFSET)
+#define KINETIS_USB0_ENDPT3         (KINETIS_USB0_BASE+KINETIS_USB_ENDPT3_OFFSET)
+#define KINETIS_USB0_ENDPT4         (KINETIS_USB0_BASE+KINETIS_USB_ENDPT4_OFFSET)
+#define KINETIS_USB0_ENDPT5         (KINETIS_USB0_BASE+KINETIS_USB_ENDPT5_OFFSET)
+#define KINETIS_USB0_ENDPT6         (KINETIS_USB0_BASE+KINETIS_USB_ENDPT6_OFFSET)
+#define KINETIS_USB0_ENDPT7         (KINETIS_USB0_BASE+KINETIS_USB_ENDPT7_OFFSET)
+#define KINETIS_USB0_ENDPT8         (KINETIS_USB0_BASE+KINETIS_USB_ENDPT8_OFFSET)
+#define KINETIS_USB0_ENDPT9         (KINETIS_USB0_BASE+KINETIS_USB_ENDPT9_OFFSET)
+#define KINETIS_USB0_ENDPT10        (KINETIS_USB0_BASE+KINETIS_USB_ENDPT10_OFFSET)
+#define KINETIS_USB0_ENDPT11        (KINETIS_USB0_BASE+KINETIS_USB_ENDPT11_OFFSET)
+#define KINETIS_USB0_ENDPT12        (KINETIS_USB0_BASE+KINETIS_USB_ENDPT12_OFFSET)
+#define KINETIS_USB0_ENDPT13        (KINETIS_USB0_BASE+KINETIS_USB_ENDPT13_OFFSET)
+#define KINETIS_USB0_ENDPT14        (KINETIS_USB0_BASE+KINETIS_USB_ENDPT14_OFFSET)
+#define KINETIS_USB0_ENDPT15        (KINETIS_USB0_BASE+KINETIS_USB_ENDPT15_OFFSET)
+
+#define KINETIS_USB0_USBCTRL        (KINETIS_USB0_BASE+KINETIS_USB_USBCTRL_OFFSET)
+#define KINETIS_USB0_OBSERVE        (KINETIS_USB0_BASE+KINETIS_USB_OBSERVE_OFFSET)
+#define KINETIS_USB0_CONTROL        (KINETIS_USB0_BASE+KINETIS_USB_CONTROL_OFFSET)
+#define KINETIS_USB0_USBTRC0        (KINETIS_USB0_BASE+KINETIS_USB_USBTRC0_OFFSET)
+
+#ifdef KINETIS_K64
+#  define KINETIS_USB_USBFRMADJUST \
+    (KINETIS_USB0_BASE+KINETIS_USB_USBFRMADJUST_OFFSET)       
+#  define KINETIS_USB_USB0_CLK_RECOVER_CTRL \
+    (KINETIS_USB0_BASE+KINETIS_USB_USB0_CLK_RECOVER_CTRL_OFFSET)   
+#  define KINETIS_USB_USB0_CLK_RECOVER_IRC_EN \
+    (KINETIS_USB0_BASE+KINETIS_USB_USB0_CLK_RECOVER_IRC_EN_OFFSET)  
+#  define KINETIS_USB_USB0_CLK_RECOVER_INT_STATUS \
+    (KINETIS_USB0_BASE+KINETIS_USB_USB0_CLK_RECOVER_INT_STATUS_OFFSET)
+#endif
+
+/* Register Bit Definitions *****************************************************************/
+
+/* Peripheral ID Register (8-bit) */
+                                              /* Bits 6-7: Reserved */
+#define USB_PERID_MASK              (0x3f)    /* Bits 0-5: Peripheral identification bits */
+
+/* Peripheral ID Complement Register (8-bit) */
+#define USB_IDCOMP_
+                                              /* Bits 6-7: Reserved */
+#define USB_IDCOMP_MASK             (0x3f)    /* Bits 0-5: Ones complement of peripheral identification bits */
+
+/* Peripheral Revision Register (8-bit revision number) */
+
+/* Peripheral Additional Info Register (8-bit) */
+
+#define USB_ADDINFO_IEHOST          (1 << 0)  /* Bit 0:  This bit is set if host mode is enabled */
+                                              /* Bits 1-2: Reserved */
+#define USB_ADDINFO_IRQNUM_SHIFT    (3)       /* Bits 3-7: Assigned Interrupt Request Number */
+#define USB_ADDINFO_IRQNUM_MASK     (31 << USB_ADDINFO_IRQNUM_SHIFT)
+
+/* OTG Interrupt Status Register(8-bit)  */
+
+#define USB_OTGISTAT_AVBUSCHG       (1 << 0)  /* Bit 0:  Change in VBUS is detected on an A device */
+                                              /* Bit 1:  Reserved */
+#define USB_OTGISTAT_B_SESS_CHG     (1 << 2)  /* Bit 2:  Change in VBUS is detected on a B device */
+#define USB_OTGISTAT_SESSVLDCHG     (1 << 3)  /* Bit 3:  Change in VBUS is detected */
+                                              /* Bit 4:  Reserved */
+#define USB_OTGISTAT_LINE_STATE_CHG (1 << 5)  /* Bit 5:  Change USB line state */
+#define USB_OTGISTAT_ONEMSEC        (1 << 6)  /* Bit 6:  Set when the 1 millisecond timer expires */
+#define USB_OTGISTAT_IDCHG          (1 << 7)  /* Bit 7:  Change in ID Signal from the USB connector */
+
+/* OTG Interrupt Control Register (8-bit) */
+
+#define USB_OTGICR_AVBUSEN          (1 << 0)  /* Bit 0:  A VBUS Valid interrupt enable */
+                                              /* Bit 1:  Reserved */
+#define USB_OTGICR_BSESSEN          (1 << 2)  /* Bit 2:  B Session END interrupt enable */
+#define USB_OTGICR_SESSVLDEN        (1 << 3)  /* Bit 3:  Session valid interrupt enable */
+                                              /* Bit 4:  Reserved */
+#define USB_OTGICR_LINESTATEEN      (1 << 5)  /* Bit 5:  Line State change interrupt enable */
+#define USB_OTGICR_ONEMSECEN        (1 << 6)  /* Bit 6:  1 millisecond interrupt enable */
+#define USB_OTGICR_IDEN             (1 << 7)  /* Bit 7:  ID interrupt enable */
+
+/* OTG Status Register (8-bit) */
+
+#define USB_OTGSTAT_AVBUSVLD        (1 << 0)  /* Bit 0:  A VBUS Valid */
+                                              /* Bit 1:  Reserved */
+#define USB_OTGSTAT_BSESSEND        (1 << 2)  /* Bit 2:  B Session END */
+#define USB_OTGSTAT_SESS_VLD        (1 << 3)  /* Bit 3:  Session valid */
+                                              /* Bit 4:  Reserved */
+#define USB_OTGSTAT_LINESTATESTABLE (1 << 5)  /* Bit 5:  OTGISTAT LINE_STATE_CHG bit stable */
+#define USB_OTGSTAT_ONEMSECEN       (1 << 6)  /* Bit 6:  Reserved for the 1msec count */
+#define USB_OTGSTAT_ID              (1 << 7)  /* Bit 7:  Current state of the ID pin on the USB connector */
+
+/* OTG Control Register (8-bit) */
+                                              /* Bits 0-1:  Reserved */
+#define USB_OTGCTL_OTGEN            (1 << 2)  /* Bit 2:  On-The-Go pullup/pulldown resistor enable */
+                                              /* Bit 3:  Reserved */
+#define USB_OTGCTL_DMLOW            (1 << 4)  /* Bit 4:  D- Data Line pull-down resistor enable */
+#define USB_OTGCTL_DPLOW            (1 << 5)  /* Bit 5:  D+ Data Line pull-down resistor enable */
+                                              /* Bit 6:  Reserved */
+#define USB_OTGCTL_DPHIGH           (1 << 7)  /* Bit 7: D+ Data Line pullup resistor enable */
+
+/* Interrupt Status Register Interrupt Enable Register (8-bit) */
+
+#define USB_INT_USBRST              (1 << 0)  /* Bit 0:  USB Module has decoded a valid USB reset */
+#define USB_INT_ERROR               (1 << 1)  /* Bit 1:  Any of the error conditions within the ERRSTAT register */
+#define USB_INT_SOFTOK              (1 << 2)  /* Bit 2:  USB Module received a Start Of Frame (SOF) token */
+#define USB_INT_TOKDNE              (1 << 3)  /* Bit 3:  Current token being processed has completed */
+#define USB_INT_SLEEP               (1 << 4)  /* Bit 4:  Constant idle on the USB bus for 3 milliseconds */
+#define USB_INT_RESUME              (1 << 5)  /* Bit 5:  Signal remote wake-up signaling */
+#define USB_INT_ATTACH              (1 << 6)  /* Bit 6:  Attach Interrupt */
+#define USB_INT_STALL               (1 << 7)  /* Bit 7:  Stall Interrupt */
+
+#define USB_INT_ALL                0xFF
+
+/* Error Interrupt Status Register and Error Interrupt Enable Register (8-bit) */
+
+#define USB_ERRSTAT_PIDERR          (1 << 0)  /* Bit 0:  This bit is set when the PID check field fails */
+#define USB_ERRSTAT_CRC5EOF         (1 << 1)  /* Bit 1:  Host data CRC error or End of frame errors */
+#define USB_ERRSTAT_CRC16           (1 << 2)  /* Bit 2:  Data packet is rejected due to a CRC16 error */
+#define USB_ERRSTAT_DFN8            (1 << 3)  /* Bit 3:  Data field received was not 8 bits in length */
+#define USB_ERRSTAT_BTOERR          (1 << 4)  /* Bit 4:  Bus turnaround timeout error occurred */
+#define USB_ERRSTAT_DMAERR          (1 << 5)  /* Bit 5:  DMA error */
+                                              /* Bit 6:  Reserved */
+#define USB_ERRSTAT_BTSERR          (1 << 7)  /* Bit 7:  Bit stuff error is detected */
+
+#define USB_EINT_ALL               0xBF
+
+/* Status Register (8-bit) */
+
+                                              /* Bits 0-1:  Reserved */
+#define USB_STAT_ODD                (1 << 2)  /* Bit 2:  Last Buffer Descriptor was in the odd bank of the BDT */
+#define USB_STAT_TX                 (1 << 3)  /* Bit 3:  Transmit Indicator */
+#define USB_STAT_ENDP_SHIFT         (4)       /* Bits 4-7: Endpoint address that received or transmitted the token */
+#define USB_STAT_ENDP_MASK          (15 << USB_STAT_ENDP_SHIFT)
+
+/* Control Register (8-bit) */
+
+#define USB_CTL_USBENSOFEN          (1 << 0)  /* Bit 0:  USB Enable */
+#define USB_CTL_ODDRST              (1 << 1)  /* Bit 1:  Resets all the BDT ODD ping/pong bits to 0 */
+#define USB_CTL_RESUME              (1 << 2)  /* Bit 2:  Enables the USB Module to execute resume signaling */
+#define USB_CTL_HOSTMODEEN          (1 << 3)  /* Bit 3:  Enables the USB Module to operate in Host mode */
+#define USB_CTL_RESET               (1 << 4)  /* Bit 4:  Enables the USB Module to generate USB reset signaling */
+#define USB_CTL_TXSUSPENDTOKENBUSY  (1 << 5)  /* Bit 5:  USB Module is busy executing a USB token */
+#define USB_CTL_SE0                 (1 << 6)  /* Bit 6:  Live USB Single Ended Zero signal */
+#define USB_CTL_JSTATE              (1 << 7)  /* Bit 7:  Live USB differential receiver JSTATE signal */
+
+/* Address Register (8-bit) */
+
+#define USB_ADDR_LSEN               (1 << 7)  /* Bit 7:  Low Speed Enable bit */
+#define USB_ADDR_SHIFT              (0)       /* Bits 0-6: USB address */
+#define USB_ADDR_MASK               (0x7f << USB_ADDR_SHIFT)
+
+/* BDT Page Register 1 (8-bit) */
+                                              /* Bit 0:  Reserved */
+#define USB_BDTPAGE1_SHIFT          (1)       /* Bits 1-7: Address bits 9-15 of the BDT base address */
+#define USB_BDTPAGE1_MASK           (0x7f << USB_BDTPAGE1_SHIFT)
+
+/* Frame Number Register Low (8-bit, bits 0-7 of the 11 bit frame number) */
+#define USB_FRMNUML_MASK            0xFF
+/* Frame Number Register High (8-bit) */
+                                              /* Bits 3-7:  Reserved */
+#define USB_FRMNUMH_SHIFT           (0)       /* Bits 0-2: Bits 8-10 of the 11-bit frame number */
+#define USB_FRMNUMH_MASK            (7 << USB_FRMNUMH_SHIFT)
+
+/* Token Register (8-bit) */
+
+#define USB_TOKEN_ENDPT_SHIFT       (0)       /* Bits 0-3: Endpoint address for the token command */
+#define USB_TOKEN_ENDPT_MASK        (15 << USB_TOKEN_ENDPT_SHIFT)
+#define USB_TOKEN_PID_SHIFT         (4)       /* Bits 4-7: Token type executed by the USB Module */
+#define USB_TOKEN_PID_MASK          (15 << USB_TOKEN_PID_SHIFT)
+#  define USB_TOKEN_PID_OUT         (1 << USB_TOKEN_PID_SHIFT)  /* OUT Token */
+#  define USB_TOKEN_PID_IN          (9 << USB_TOKEN_PID_SHIFT)  /* IN Token */
+#  define USB_TOKEN_PID_SETUP       (13 << USB_TOKEN_PID_SHIFT) /* SETUP Token */
+
+/* SOF Threshold Register (8-bit count value) */
+/* BDT Page Register 2/3 (16 bit address in two 8-bit registers) */
+
+/* Endpoint n Control Register (8-bit) */
+
+#define USB_ENDPT_EPHSHK            (1 << 0)  /* Bit 0:  Enable handshaking during a transaction to the endpoint */
+#define USB_ENDPT_EPSTALL           (1 << 1)  /* Bit 1:  Endpoint is stalled */
+#define USB_ENDPT_EPTXEN            (1 << 2)  /* Bit 2:  Enable the endpoint for TX transfers */
+#define USB_ENDPT_EPRXEN            (1 << 3)  /* Bit 3:  Enable the endpoint for RX transfers */
+#define USB_ENDPT_EPCTLDIS          (1 << 4)  /* Bit 4:  Disable control (SETUP) transfers */
+                                              /* Bit 5:  Reserved */
+#define USB_ENDPT_RETRYDIS          (1 << 6)  /* Bit 6:  Disable host retry NAK'ed transactions (host EP0) */
+#define USB_ENDPT_HOSTWOHUB         (1 << 7)  /* Bit 7:  Allows the host to communicate to a low speed device (host EP0) */
+
+/* USB Control Register (8-bit) */
+                                              /* Bits 0-5:  Reserved */
+#define USB_USBCTRL_PDE             (1 << 6)  /* Bit 6:  Enables the weak pulldowns on the USB transceiver */
+#define USB_USBCTRL_SUSP            (1 << 7)  /* Bit 7:  Places the USB transceiver into the suspend state */
+
+/* USB OTG Observe Register (8-bit) */
+                                              /* Bits 0-3:  Reserved */
+#define USB_OBSERVE_DMPD            (1 << 4)  /* Bit 4:  D- Pull Down signal output from the USB OTG module */
+                                              /* Bit 5:  Reserved */
+#define USB_OBSERVE_DPPD            (1 << 6)  /* Bit 6:  D+ Pull Down signal output from the USB OTG module */
+#define USB_OBSERVE_DPPU            (1 << 7)  /* Bit 7:  D+ Pull Up signal output from the USB OTG module */
+
+/* USB OTG Control Register (8-bit) */
+                                              /* Bits 0-3:  Reserved */
+#define USB_CONTROL_DPPULLUPNONOTG  (1 << 4)  /* Bit 4:  Controls of the DP PULLUP in the USB OTG module */
+                                              /* Bits 5-7:  Reserved */
+/* USB Transceiver Control Register 0 (8-bit) */
+
+#define USB_USBTRC0_USBRESET        (1 << 7)  /* Bit 7:  USB reset */
+                                              /* Bit 6:  Reserved */
+#define USB_USBTRC0_USBRESMEN       (1 << 5)  /* Bit 5:  Asynchronous Resume Interrupt Enable */
+                                              /* Bits 2-4:  Reserved */
+#define USB_USBTRC0_SYNC_DET        (1 << 1)  /* Bit 1:  Synchronous USB Interrupt Detect */
+#define USB_USBTRC0_RESUME_INT      (1 << 0)  /* Bit 0:  USB Asynchronous Interrupt */
+
+/* Buffer Descriptor Table (BDT) ****************************************************/
+/* Offset 0: On write (software->hardware) */
+
+#define USB_BDT_STATUS_MASK        0xfc     /* Bits 2-7: Status bits */
+#define USB_BDT_BSTALL             (1 << 2) /*   Bit 2: Buffer Stall Enable bit */
+#define USB_BDT_DTS                (1 << 3) /*   Bit 3: Data Toggle Synchronization Enable bit */
+#define USB_BDT_NINC               (1 << 4) /*   Bit 4: DMA Address Increment Disable bit */
+#define USB_BDT_KEEP               (1 << 5) /*   Bit 5: BD Keep Enable bit */
+#define USB_BDT_DATA01             (1 << 6) /*   Bit 6: Data Toggle Packet bit */
+#define USB_BDT_UOWN               (1 << 7) /*   Bit 7: USB Own bit */
+#define USB_BDT_BYTECOUNT_SHIFT    (16)     /* Bits 16-25: Byte Count bits */
+#define USB_BDT_BYTECOUNT_MASK     (0x3ff << USB_BDT_BYTECOUNT_SHIFT)
+
+#define USB_BDT_DATA0              0              /* DATA0 packet expected next */
+#define USB_BDT_DATA1              USB_BDT_DATA01 /* DATA1 packet expected next */
+#define USB_BDT_COWN               0              /* CPU owns the descriptor */
+
+/* Offset 0: On read (hardware->software) */
+
+#define USB_BDT_PID_SHIFT          (2)      /* Bits 2-5: Packet Identifier bits */
+#define USB_BDT_PID_MASK           (15 << USB_BDT_PID_SHIFT)
+                                            /* Bit 7: USB Own bit (same) */
+                                            /* Bits 16-25: Byte Count bits (same) */
+
+/* Offset 4: BUFFER_ADDRESS, 32-bit Buffer Address bits */
+
+#define USB_BDT_BYTES_SIZE         8        /* Eight bytes per BDT */
+#define USB_BDT_WORD_SIZE          2        /* Two 32-bit words per BDT */
+#define USB_NBDTS_PER_EP           4        /* Number of BDTS per endpoint: IN/OUT and EVEN/ODD */
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/********************************************************************************************
+ * Public Functions
+ ********************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_USBOTG_H */
diff --git a/arch/arm/src/kinetis/kinetis_vrefv1.h b/arch/arm/src/kinetis/chip/kinetis_vrefv1.h
similarity index 94%
rename from arch/arm/src/kinetis/kinetis_vrefv1.h
rename to arch/arm/src/kinetis/chip/kinetis_vrefv1.h
index ed9a1ff95c5dc51779b89864f9ac29f5f73f371c..29c871dd22d10fb2066d2ea564a93be9eadc036d 100644
--- a/arch/arm/src/kinetis/kinetis_vrefv1.h
+++ b/arch/arm/src/kinetis/chip/kinetis_vrefv1.h
@@ -1,7 +1,7 @@
 /********************************************************************************************
- * arch/arm/src/kinetis/kinetis_vrefv1.h
+ * arch/arm/src/kinetis/chip/kinetis_vrefv1.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ********************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_VREFV1_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_VREFV1_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_VREFV1_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_VREFV1_H
 
 /********************************************************************************************
  * Included Files
@@ -89,4 +89,4 @@
  * Public Functions
  ********************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_VREFV1_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_VREFV1_H */
diff --git a/arch/arm/src/kinetis/kinetis_wdog.h b/arch/arm/src/kinetis/chip/kinetis_wdog.h
similarity index 95%
rename from arch/arm/src/kinetis/kinetis_wdog.h
rename to arch/arm/src/kinetis/chip/kinetis_wdog.h
index 326c2cf628fe360fc904dc2f51ebe09008fd24ed..6f50386049900167f4930e4ab19dc3775a51e696 100644
--- a/arch/arm/src/kinetis/kinetis_wdog.h
+++ b/arch/arm/src/kinetis/chip/kinetis_wdog.h
@@ -1,7 +1,7 @@
 /********************************************************************************************
- * arch/arm/src/kinetis/kinetis_wdog.h
+ * arch/arm/src/kinetis/chip/kinetis_wdog.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ********************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_WDOG_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_WDOG_H
+#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_WDOG_H
+#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_WDOG_H
 
 /********************************************************************************************
  * Included Files
@@ -90,7 +90,9 @@
 #define WDOG_STCTRLH_DBGEN           (1 << 5)  /* Bit 5:  Enables or disables WDOG in Debug mode */
 #define WDOG_STCTRLH_STOPEN          (1 << 6)  /* Bit 6:  Enables or disables WDOG in stop mode */
 #define WDOG_STCTRLH_WAITEN          (1 << 7)  /* Bit 7:  Enables or disables WDOG in wait mode */
-#define WDOG_STCTRLH_STNDBYEN        (1 << 8)  /* Bit 8:  Enables or disables WDOG in Standby mode */
+#ifndef KINETIS_K64
+#  define WDOG_STCTRLH_STNDBYEN      (1 << 8)  /* Bit 8:  Enables or disables WDOG in Standby mode */
+#endif
                                                /* Bit 9:  Reserved */
 #define WDOG_STCTRLH_TESTWDOG        (1 << 10) /* Bit 10: Selects functional test mode */
 #define WDOG_STCTRLH_TESTSEL         (1 << 11) /* Bit 11: Selects the test to be run */
@@ -132,4 +134,4 @@
  * Public Functions
  ********************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_WDOG_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_WDOG_H */
diff --git a/arch/arm/src/kinetis/kinetis.h b/arch/arm/src/kinetis/kinetis.h
index b0c016d22a1dfea6f7077175d8a2b03f0e8c08e6..3f171e223b5cea7f85817e464b1e7609fb96169d 100644
--- a/arch/arm/src/kinetis/kinetis.h
+++ b/arch/arm/src/kinetis/kinetis.h
@@ -1,8 +1,9 @@
 /************************************************************************************
  * arch/arm/src/kinetis/kinetis.h
  *
- *   Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2011, 2013, 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -52,7 +53,7 @@
 #include "up_internal.h"
 #include "kinetis_config.h"
 #include "chip.h"
-#include "kinetis_port.h"
+#include "chip/kinetis_port.h"
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -132,8 +133,8 @@
 #define GPIO_OUTPUT            (_PIN_MODE_GPIO | _PIN_OUTPUT)
 #define GPIO_FAST              (_PIN_MODE_GPIO | _PIN_OUTPUT_FAST)
 #define GPIO_SLOW              (_PIN_MODE_GPIO | _PIN_OUTPUT_SLOW)
-#define GPIO_OPENDRAIN         (_PIN_MODE_GPIO | _PIN_OUTPUT_LOWDRIVE)
-#define GPIO_LOWDRIVE          (_PIN_MODE_GPIO | _PIN_OUTPUT_OPENDRAIN)
+#define GPIO_OPENDRAIN         (_PIN_MODE_GPIO | _PIN_OUTPUT_OPENDRAIN)
+#define GPIO_LOWDRIVE          (_PIN_MODE_GPIO | _PIN_OUTPUT_LOWDRIVE)
 #define GPIO_HIGHDRIVE         (_PIN_MODE_GPIO | _PIN_OUTPUT_HIGHDRIVE)
 
 #define PIN_ALT2               _PIN_MODE_ALT2
@@ -143,8 +144,8 @@
 #define PIN_ALT2_OUTPUT        (_PIN_MODE_ALT2 | _PIN_OUTPUT)
 #define PIN_ALT2_FAST          (_PIN_MODE_ALT2 | _PIN_OUTPUT_FAST)
 #define PIN_ALT2_SLOW          (_PIN_MODE_ALT2 | _PIN_OUTPUT_SLOW)
-#define PIN_ALT2_OPENDRAIN     (_PIN_MODE_ALT2 | _PIN_OUTPUT_LOWDRIVE)
-#define PIN_ALT2_LOWDRIVE      (_PIN_MODE_ALT2 | _PIN_OUTPUT_OPENDRAIN)
+#define PIN_ALT2_OPENDRAIN     (_PIN_MODE_ALT2 | _PIN_OUTPUT_OPENDRAIN)
+#define PIN_ALT2_LOWDRIVE      (_PIN_MODE_ALT2 | _PIN_OUTPUT_LOWDRIVE)
 #define PIN_ALT2_HIGHDRIVE     (_PIN_MODE_ALT2 | _PIN_OUTPUT_HIGHDRIVE)
 
 #define PIN_ALT3               _PIN_MODE_ALT3
@@ -154,8 +155,8 @@
 #define PIN_ALT3_OUTPUT        (_PIN_MODE_ALT3 | _PIN_OUTPUT)
 #define PIN_ALT3_FAST          (_PIN_MODE_ALT3 | _PIN_OUTPUT_FAST)
 #define PIN_ALT3_SLOW          (_PIN_MODE_ALT3 | _PIN_OUTPUT_SLOW)
-#define PIN_ALT3_OPENDRAIN     (_PIN_MODE_ALT3 | _PIN_OUTPUT_LOWDRIVE)
-#define PIN_ALT3_LOWDRIVE      (_PIN_MODE_ALT3 | _PIN_OUTPUT_OPENDRAIN)
+#define PIN_ALT3_OPENDRAIN     (_PIN_MODE_ALT3 | _PIN_OUTPUT_OPENDRAIN)
+#define PIN_ALT3_LOWDRIVE      (_PIN_MODE_ALT3 | _PIN_OUTPUT_LOWDRIVE)
 #define PIN_ALT3_HIGHDRIVE     (_PIN_MODE_ALT3 | _PIN_OUTPUT_HIGHDRIVE)
 
 #define PIN_ALT4               _PIN_MODE_ALT4
@@ -165,8 +166,8 @@
 #define PIN_ALT4_OUTPUT        (_PIN_MODE_ALT4 | _PIN_OUTPUT)
 #define PIN_ALT4_FAST          (_PIN_MODE_ALT4 | _PIN_OUTPUT_FAST)
 #define PIN_ALT4_SLOW          (_PIN_MODE_ALT4 | _PIN_OUTPUT_SLOW)
-#define PIN_ALT4_OPENDRAIN     (_PIN_MODE_ALT4 | _PIN_OUTPUT_LOWDRIVE)
-#define PIN_ALT4_LOWDRIVE      (_PIN_MODE_ALT4 | _PIN_OUTPUT_OPENDRAIN)
+#define PIN_ALT4_OPENDRAIN     (_PIN_MODE_ALT4 | _PIN_OUTPUT_OPENDRAIN)
+#define PIN_ALT4_LOWDRIVE      (_PIN_MODE_ALT4 | _PIN_OUTPUT_LOWDRIVE)
 #define PIN_ALT4_HIGHDRIVE     (_PIN_MODE_ALT4 | _PIN_OUTPUT_HIGHDRIVE)
 
 #define PIN_ALT5               _PIN_MODE_ALT5
@@ -176,8 +177,8 @@
 #define PIN_ALT5_OUTPUT        (_PIN_MODE_ALT5 | _PIN_OUTPUT)
 #define PIN_ALT5_FAST          (_PIN_MODE_ALT5 | _PIN_OUTPUT_FAST)
 #define PIN_ALT5_SLOW          (_PIN_MODE_ALT5 | _PIN_OUTPUT_SLOW)
-#define PIN_ALT5_OPENDRAIN     (_PIN_MODE_ALT5 | _PIN_OUTPUT_LOWDRIVE)
-#define PIN_ALT5_LOWDRIVE      (_PIN_MODE_ALT5 | _PIN_OUTPUT_OPENDRAIN)
+#define PIN_ALT5_OPENDRAIN     (_PIN_MODE_ALT5 | _PIN_OUTPUT_OPENDRAIN)
+#define PIN_ALT5_LOWDRIVE      (_PIN_MODE_ALT5 | _PIN_OUTPUT_LOWDRIVE)
 #define PIN_ALT5_HIGHDRIVE     (_PIN_MODE_ALT5 | _PIN_OUTPUT_HIGHDRIVE)
 
 #define PIN_ALT6               _PIN_MODE_ALT6
@@ -187,8 +188,8 @@
 #define PIN_ALT6_OUTPUT        (_PIN_MODE_ALT6 | _PIN_OUTPUT)
 #define PIN_ALT6_FAST          (_PIN_MODE_ALT6 | _PIN_OUTPUT_FAST)
 #define PIN_ALT6_SLOW          (_PIN_MODE_ALT6 | _PIN_OUTPUT_SLOW)
-#define PIN_ALT6_OPENDRAIN     (_PIN_MODE_ALT6 | _PIN_OUTPUT_LOWDRIVE)
-#define PIN_ALT6_LOWDRIVE      (_PIN_MODE_ALT6 | _PIN_OUTPUT_OPENDRAIN)
+#define PIN_ALT6_OPENDRAIN     (_PIN_MODE_ALT6 | _PIN_OUTPUT_OPENDRAIN)
+#define PIN_ALT6_LOWDRIVE      (_PIN_MODE_ALT6 | _PIN_OUTPUT_LOWDRIVE)
 #define PIN_ALT6_HIGHDRIVE     (_PIN_MODE_ALT6 | _PIN_OUTPUT_HIGHDRIVE)
 
 #define PIN_ALT7               _PIN_MODE_ALT7
@@ -198,8 +199,8 @@
 #define PIN_ALT7_OUTPUT        (_PIN_MODE_ALT7 | _PIN_OUTPUT)
 #define PIN_ALT7_FAST          (_PIN_MODE_ALT7 | _PIN_OUTPUT_FAST)
 #define PIN_ALT7_SLOW          (_PIN_MODE_ALT7 | _PIN_OUTPUT_SLOW)
-#define PIN_ALT7_OPENDRAIN     (_PIN_MODE_ALT7 | _PIN_OUTPUT_LOWDRIVE)
-#define PIN_ALT7_LOWDRIVE      (_PIN_MODE_ALT7 | _PIN_OUTPUT_OPENDRAIN)
+#define PIN_ALT7_OPENDRAIN     (_PIN_MODE_ALT7 | _PIN_OUTPUT_OPENDRAIN)
+#define PIN_ALT7_LOWDRIVE      (_PIN_MODE_ALT7 | _PIN_OUTPUT_LOWDRIVE)
 #define PIN_ALT7_HIGHDRIVE     (_PIN_MODE_ALT7 | _PIN_OUTPUT_HIGHDRIVE)
 
 /* The initial value for GPIO (Alternative 1 outputs):
@@ -305,40 +306,6 @@
 #define PIN30                  (30 << _PIN_SHIFT)
 #define PIN31                  (31 << _PIN_SHIFT)
 
-/************************************************************************************
- * Public Types
- ************************************************************************************/
-
-typedef FAR void *DMA_HANDLE;
-typedef void (*dma_callback_t)(DMA_HANDLE handle, void *arg, int result);
-
-/* The following is used for sampling DMA registers when CONFIG DEBUG_DMA is selected */
-
-#ifdef CONFIG_DEBUG_DMA
-struct kinetis_dmaglobalregs_s
-{
-#warning "Missing logic"
-  /* Global Registers */
-};
-
-struct kinetis_dmachanregs_s
-{
-#warning "Missing logic"
-  /* Channel Registers */
-};
-
-struct kinetis_dmaregs_s
-{
-  /* Global Registers */
-
-  struct kinetis_dmaglobalregs_s gbl;
-
-  /* Channel Registers */
-
-  struct kinetis_dmachanregs_s   ch;
-};
-#endif
-
 /************************************************************************************
  * Inline Functions
  ************************************************************************************/
@@ -374,6 +341,48 @@ extern "C"
 
 void kinetis_clockconfig(void);
 
+/****************************************************************************
+ * Name: kinetis_earlyserialinit
+ *
+ * Description:
+ *   Performs the low level UART/LPUART initialization early in debug so that
+ *   the serial console will be available during bootup.  This must be called
+ *   before up_serialinit.
+ *
+ ****************************************************************************/
+
+#ifdef USE_EARLYSERIALINIT
+void kinetis_earlyserialinit(void);
+#endif
+
+/****************************************************************************
+ * Name: kinetis_uart_earlyserialinit
+ *
+ * Description:
+ *   Performs the low level UART initialization early in debug so that the
+ *   serial console will be available during bootup.  This must be called
+ *   before up_serialinit.
+ *
+ ****************************************************************************/
+
+#ifdef USE_EARLYSERIALINIT
+void kinetis_uart_earlyserialinit(void);
+#endif
+
+/****************************************************************************
+ * Name: kinetis_lpuart_earlyserialinit
+ *
+ * Description:
+ *   Performs the low level LPUART initialization early in debug so that the
+ *   serial console will be available during bootup.  This must be called
+ *   before up_serialinit.
+ *
+ ****************************************************************************/
+
+#ifdef USE_EARLYSERIALINIT
+void kinetis_lpuart_earlyserialinit(void);
+#endif
+
 /************************************************************************************
  * Name: kinetis_lowsetup
  *
@@ -386,6 +395,44 @@ void kinetis_clockconfig(void);
 
 void kinetis_lowsetup(void);
 
+/****************************************************************************
+ * Name: kinetis_uart_serialinit
+ *
+ * Description:
+ *   Register all UART based serial console and serial ports.  This assumes
+ *   that kinetis_earlyserialinit was called previously.
+ *
+ * Input Parameters:
+ *   first: - First TTY number to assign
+ *
+ * Returns Value:
+ *   The next TTY number available for assignment
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_UART_DEVICE
+unsigned int kinetis_uart_serialinit(unsigned int first);
+#endif
+
+/****************************************************************************
+ * Name: kinetis_lpuart_serialinit
+ *
+ * Description:
+ *   Register all LPUART based serial console and serial ports.  This assumes
+ *   that kinetis_earlyserialinit was called previously.
+ *
+ * Input Parameters:
+ *   first: - First TTY number to assign
+ *
+ * Returns Value:
+ *   The next TTY number available for assignment
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_LPUART_DEVICE
+unsigned int kinetis_lpuart_serialinit(unsigned int first);
+#endif
+
 /****************************************************************************
  * Name: kinetis_uartreset
  *
@@ -398,6 +445,18 @@ void kinetis_lowsetup(void);
 void kinetis_uartreset(uintptr_t uart_base);
 #endif
 
+/****************************************************************************
+ * Name: kinetis_lpuartreset
+ *
+ * Description:
+ *   Reset a UART.
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_LPUART_DEVICE
+void kinetis_lpuartreset(uintptr_t uart_base);
+#endif
+
 /****************************************************************************
  * Name: kinetis_uartconfigure
  *
@@ -408,7 +467,22 @@ void kinetis_uartreset(uintptr_t uart_base);
 
 #ifdef HAVE_UART_DEVICE
 void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud, uint32_t clock,
-                           unsigned int parity, unsigned int nbits);
+                           unsigned int parity, unsigned int nbits,
+                           unsigned int stop2);
+#endif
+
+/****************************************************************************
+ * Name: kinetis_lpuartconfigure
+ *
+ * Description:
+ *   Configure a UART as a RS-232 UART.
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_LPUART_DEVICE
+void kinetis_lpuartconfigure(uintptr_t uart_base, uint32_t baud, uint32_t clock,
+                           unsigned int parity, unsigned int nbits,
+                           unsigned int stop2);
 #endif
 
 /************************************************************************************
@@ -438,7 +512,7 @@ int kinetis_pinconfig(uint32_t cfgset);
  *   Configure the digital filter associated with a port. The digital filter
  *   capabilities of the PORT module are available in all digital pin muxing modes.
  *
- * Input parmeters:
+ * Input Parameters:
  *   port  - See KINETIS_PORTn definitions in kinetis_port.h
  *   lpo   - true: Digital Filters are clocked by the bus clock
  *           false: Digital Filters are clocked by the 1 kHz LPO clock
@@ -476,7 +550,7 @@ bool kinetis_gpioread(uint32_t pinset);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_KINETIS_GPIOIRQ
 void kinetis_pinirqinitialize(void);
 #else
 #  define kinetis_pinirqinitialize()
@@ -494,17 +568,17 @@ void kinetis_pinirqinitialize(void);
  *   3. Call kinetis_pinirqenable() to enable interrupts on the pin.
  *
  * Parameters:
- *  - pinset:  Pin configuration
- *  - pinisr:  Pin interrupt service routine
+ *   pinset -  Pin configuration
+ *   pinisr -  Pin interrupt service routine
+ *   arg    -  An argument that will be provided to the interrupt service routine.
  *
- * Returns:
- *   The previous value of the interrupt handler function pointer.  This value may,
- *   for example, be used to restore the previous handler when multiple handlers are
- *   used.
+ * Return Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on any
+ *   failure to indicate the nature of the failure.
  *
  ************************************************************************************/
 
-xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr);
+int kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr, void *arg);
 
 /************************************************************************************
  * Name: kinetis_pinirqenable
@@ -514,7 +588,7 @@ xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_KINETIS_GPIOIRQ
 void kinetis_pinirqenable(uint32_t pinset);
 #else
 #  define kinetis_pinirqenable(pinset)
@@ -528,7 +602,7 @@ void kinetis_pinirqenable(uint32_t pinset);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_KINETIS_GPIOIRQ
 void kinetis_pinirqdisable(uint32_t pinset);
 #else
 #  define kinetis_pinirqdisable(pinset)
@@ -566,8 +640,8 @@ void kinetis_pindmadisable(uint32_t pinset);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
-int kinetis_pindump(uint32_t pinset, const char *msg);
+#ifdef CONFIG_DEBUG_GPIO_INFO
+void kinetis_pindump(uint32_t pinset, const char *msg);
 #else
 #  define kinetis_pindump(p,m)
 #endif
@@ -583,209 +657,13 @@ int kinetis_pindump(uint32_t pinset, const char *msg);
 
 void kinetis_clrpend(int irq);
 
-/************************************************************************************
- * Name:  kinetis_spi[n]select, kinetis_spi[n]status, and kinetis_spi[n]cmddata
- *
- * Description:
- *   These external functions must be provided by board-specific logic.  They are
- *   implementations of the select, status, and cmddata methods of the SPI interface
- *   defined by struct spi_ops_s (see include/nuttx/spi/spi.h). All other methods
- *   including kinetis_spibus_initialize()) are provided by common Kinetis logic.  To use
- *   this common SPI logic on your board:
- *
- *   1. Provide logic in kinetis_boardinitialize() to configure SPI chip select
- *      pins.
- *   2. Provide kinetis_spi[n]select() and kinetis_spi[n]status() functions
- *      in your board-specific logic.  These functions will perform chip selection
- *      and status operations using GPIOs in the way your board is configured.
- *   2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide
- *      kinetis_spi[n]cmddata() functions in your board-specific logic.  These
- *      functions will perform cmd/data selection operations using GPIOs in the way
- *      your board is configured.
- *   3. Add a call to kinetis_spibus_initialize() in your low level application
- *      initialization logic
- *   4. The handle returned by kinetis_spibus_initialize() may then be used to bind the
- *      SPI driver to higher level logic (e.g., calling
- *      mmcsd_spislotinitialize(), for example, will bind the SPI driver to
- *      the SPI MMC/SD driver).
- *
- ************************************************************************************/
-
-struct spi_dev_s;
-enum spi_dev_e;
-
-#ifdef CONFIG_KINETIS_SPI0
-void  kinetis_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
-uint8_t kinetis_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
-#ifdef CONFIG_SPI_CMDDATA
-int kinetis_spi0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
-#endif
-#endif
-#ifdef CONFIG_KINETIS_SPI1
-void  kinetis_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
-uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
-#ifdef CONFIG_SPI_CMDDATA
-int kinetis_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
-#endif
-#endif
-#ifdef CONFIG_KINETIS_SPI2
-void  kinetis_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
-uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
-#ifdef CONFIG_SPI_CMDDATA
-int kinetis_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
-#endif
-#endif
-
-/****************************************************************************
- * Name: ssp_flush
- *
- * Description:
- *   Flush and discard any words left in the RX fifo.  This can be called
- *   from spi[n]select after a device is deselected (if you worry about such
- *   things).
- *
- * Input Parameters:
- *   dev - Device-specific state data
- *
- * Returned Value:
- *   None
- *
- ****************************************************************************/
-
-#if defined(CONFIG_KINETIS_SPI0) || defined(CONFIG_KINETIS_SPI0) || defined(CONFIG_KINETIS_SPI2)
-struct spi_dev_s;
-void spi_flush(FAR struct spi_dev_s *dev);
-#endif
-
-/****************************************************************************
- * Name: kinetis_dmainitialize
- *
- * Description:
- *   Initialize the GPDMA subsystem.
- *
- * Returned Value:
- *   None
- *
- ****************************************************************************/
-
-#ifdef CONFIG_KINETIS_DMA
-void kinetis_dmainitilaize(void);
-#endif
-
-/****************************************************************************
- * Name: kinetis_dmachannel
- *
- * Description:
- *   Allocate a DMA channel.  This function sets aside a DMA channel and
- *   gives the caller exclusive access to the DMA channel.
- *
- * Returned Value:
- *   One success, this function returns a non-NULL, void* DMA channel
- *   handle.  NULL is returned on any failure.  This function can fail only
- *   if no DMA channel is available.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_KINETIS_DMA
-DMA_HANDLE kinetis_dmachannel(void);
-#endif
-
-/****************************************************************************
- * Name: kinetis_dmafree
- *
- * Description:
- *   Release a DMA channel.  NOTE:  The 'handle' used in this argument must
- *   NEVER be used again until kinetis_dmachannel() is called again to re-gain
- *   a valid handle.
- *
- * Returned Value:
- *   None
- *
- ****************************************************************************/
-
-#ifdef CONFIG_KINETIS_DMA
-void kinetis_dmafree(DMA_HANDLE handle);
-#endif
-
-/****************************************************************************
- * Name: kinetis_dmasetup
- *
- * Description:
- *   Configure DMA for one transfer.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_KINETIS_DMA
-int kinetis_dmarxsetup(DMA_HANDLE handle, uint32_t control, uint32_t config,
-                       uint32_t srcaddr, uint32_t destaddr, size_t nbytes);
-#endif
-
-/****************************************************************************
- * Name: kinetis_dmastart
- *
- * Description:
- *   Start the DMA transfer
- *
- ****************************************************************************/
-
-#ifdef CONFIG_KINETIS_DMA
-int kinetis_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg);
-#endif
-
-/****************************************************************************
- * Name: kinetis_dmastop
- *
- * Description:
- *   Cancel the DMA.  After kinetis_dmastop() is called, the DMA channel is
- *   reset and kinetis_dmasetup() must be called before kinetis_dmastart() can be
- *   called again
- *
- ****************************************************************************/
-
-#ifdef CONFIG_KINETIS_DMA
-void kinetis_dmastop(DMA_HANDLE handle);
-#endif
-
-/****************************************************************************
- * Name: kinetis_dmasample
- *
- * Description:
- *   Sample DMA register contents
- *
- ****************************************************************************/
-
-#ifdef CONFIG_KINETIS_DMA
-#ifdef CONFIG_DEBUG_DMA
-void kinetis_dmasample(DMA_HANDLE handle, struct kinetis_dmaregs_s *regs);
-#else
-#  define kinetis_dmasample(handle,regs)
-#endif
-#endif
-
-/****************************************************************************
- * Name: kinetis_dmadump
- *
- * Description:
- *   Dump previously sampled DMA register contents
- *
- ****************************************************************************/
-
-#ifdef CONFIG_KINETIS_DMA
-#ifdef CONFIG_DEBUG_DMA
-void kinetis_dmadump(DMA_HANDLE handle, const struct kinetis_dmaregs_s *regs,
-                     const char *msg);
-#else
-#  define kinetis_dmadump(handle,regs,msg)
-#endif
-#endif
-
 /****************************************************************************
  * Name: sdhc_initialize
  *
  * Description:
  *   Initialize SDIO for operation.
  *
- * Input Parameters:
+ * Input parameters:
  *   slotno - Not used.
  *
  * Returned Values:
diff --git a/libc/syslog/lib_lowsyslog.c b/arch/arm/src/kinetis/kinetis_alarm.h
similarity index 54%
rename from libc/syslog/lib_lowsyslog.c
rename to arch/arm/src/kinetis/kinetis_alarm.h
index 8c9c84c177a22b01815cf56f28734bfc8857329e..3815e374c88a63fad966c400193d985def48271b 100644
--- a/libc/syslog/lib_lowsyslog.c
+++ b/arch/arm/src/kinetis/kinetis_alarm.h
@@ -1,8 +1,8 @@
 /****************************************************************************
- * lib/syslog/lib_lowsyslog.c
+ * arch/arm/src/kinetis/kinetis_alarm.h
  *
- *   Copyright (C) 2007-2009, 2011-2012 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author:  Matias v01d 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -33,107 +33,132 @@
  *
  ****************************************************************************/
 
+#ifndef __ARCH_ARM_SRC_KINETIS_ALARM_H
+#define __ARCH_ARM_SRC_KINETIS_ALARM_H
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
 
 #include 
 
-#include 
-#include 
-
-#include 
-
-#include "syslog/syslog.h"
+#include "chip.h"
 
-#if defined(CONFIG_ARCH_LOWPUTC) || defined(CONFIG_SYSLOG)
+#ifdef CONFIG_RTC_ALARM
 
 /****************************************************************************
- * Private Functions
+ * Public Types
  ****************************************************************************/
 
-/****************************************************************************
- * Name: lowvsyslog_internal
- *
- * Description:
- *   This is the internal implementation of lowvsyslog (see the description
- *   of lowsyslog and lowvsyslog below)
+#ifndef __ASSEMBLY__
+
+/* The form of an alarm callback */
+
+typedef CODE void (*alarmcb_t)(void);
+
+/* These features are in KinetisK 1st generation
+ * Time Alarm Interrupt
+ * Time Overflow Interrupt
+ * Time Seconds Interrupt
  *
- ****************************************************************************/
+ * For KinetisK 2nd Generation devices
+ * 64bit Monotonic  register.
+ */
 
-static inline int lowvsyslog_internal(FAR const IPTR char *fmt, va_list ap)
+enum alm_id_e
 {
-  struct lib_outstream_s stream;
+  /* Used for indexing - must be sequential */
 
-  /* Wrap the stdout in a stream object and let lib_vsprintf do the work. */
+  RTC_ALARMA = 0,     /* RTC ALARM A */
+  RTC_ALARMM,         /* FUT: RTC Monotonic */
+  RTC_ALARM_LAST
+};
 
-#ifdef CONFIG_SYSLOG
-  lib_syslogstream((FAR struct lib_outstream_s *)&stream);
-#else
-  lib_lowoutstream((FAR struct lib_outstream_s *)&stream);
-#endif
-  return lib_vsprintf((FAR struct lib_outstream_s *)&stream, fmt, ap);
-}
+/* Structure used to pass parmaters to set an alarm */
+
+struct alm_setalarm_s
+{
+  int as_id;          /* enum alm_id_e */
+  struct tm as_time;  /* Alarm expiration time */
+  alarmcb_t as_cb;    /* Callback (if non-NULL) */
+  FAR void *as_arg;   /* Argument for callback */
+};
 
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
 /****************************************************************************
- * Name: lowvsyslog
+ * Name: kinetis_rtc_setalarm
  *
  * Description:
- *   The function lowvsyslog() performs the same task as lowsyslog() with
- *   the difference that it takes a set of arguments which have been
- *   obtained using the stdarg variable argument list macros.
+ *   Set up an alarm.
+ *
+ * Input Parameters:
+ *   tp - the time to set the alarm
+ *   callback - the function to call when the alarm expires.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
  *
  ****************************************************************************/
 
-int lowvsyslog(int priority, FAR const IPTR char *fmt, va_list ap)
-{
-  int ret = 0;
-
-  /* Check if this priority is enabled */
-
-  if ((g_syslog_mask & LOG_MASK(priority)) != 0)
-    {
-      /* Yes.. let vsylog_internal to the deed */
-
-      ret = lowvsyslog_internal(fmt, ap);
-    }
-
-  return ret;
-}
+int kinetis_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback);
 
 /****************************************************************************
- * Name: lowsyslog
+ * Name: kinetis_rtc_cancelalarm
  *
  * Description:
- *   syslog() generates a log message. The priority argument is formed by
- *   ORing the facility and the level values (see include/syslog.h). The
- *   remaining arguments are a format, as in printf and any arguments to the
- *   format.
+ *   Cancel a pending alarm alarm
+ *
+ * Input Parameters:
+ *   none
  *
- *   This is a non-standard, low-level system logging interface.  The
- *   difference between syslog() and lowsyslog() is that the syslog()
- *   interface writes to the syslog device (usually fd=1, stdout) whereas
- *   lowsyslog() uses a lower level interface that works even from interrupt
- *   handlers.
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
  *
  ****************************************************************************/
 
-int lowsyslog(int priority, FAR const IPTR char *fmt, ...)
-{
-  va_list ap;
-  int ret;
+int kinetis_rtc_cancelalarm(void);
 
-  /* Let lowvsyslog do the work */
+/****************************************************************************
+ * Name: kinetis_rtc_lowerhalf
+ *
+ * Description:
+ *   Instantiate the RTC lower half driver for the Kinetis.  General usage:
+ *
+ *     #include 
+ *     #include "kinetis_rtc.h>
+ *
+ *     struct rtc_lowerhalf_s *lower;
+ *     lower = kinetis_rtc_lowerhalf();
+ *     rtc_initialize(0, lower);
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   On success, a non-NULL RTC lower interface is returned.
+ *   NULL is returned on any failure.
+ *
+ ****************************************************************************/
 
-  va_start(ap, fmt);
-  ret = lowvsyslog(priority, fmt, ap);
-  va_end(ap);
+FAR struct rtc_lowerhalf_s *kinetis_rtc_lowerhalf(void);
 
-  return ret;
+#undef EXTERN
+#if defined(__cplusplus)
 }
+#endif
 
-#endif /* CONFIG_ARCH_LOWPUTC || CONFIG_SYSLOG */
+#endif /* __ASSEMBLY__ */
+#endif /* CONFIG_RTC_ALARM */
+#endif /* __ARCH_ARM_SRC_KINETIS_ALARM_H */
diff --git a/arch/arm/src/kinetis/kinetis_clockconfig.c b/arch/arm/src/kinetis/kinetis_clockconfig.c
index dc2fe0482bf893b6fda5a199785dfbb3ae184c41..b954f33be2e4fd75b1074fb5b85540349c3d511e 100644
--- a/arch/arm/src/kinetis/kinetis_clockconfig.c
+++ b/arch/arm/src/kinetis/kinetis_clockconfig.c
@@ -1,9 +1,9 @@
 /****************************************************************************
  * arch/arm/src/kinetis/kinetis_clockconfig.c
- * arch/arm/src/chip/kinetis_clockconfig.c
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2011, 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -40,16 +40,17 @@
 
 #include 
 
-#include 
-
 #include "up_arch.h"
 
 #include "kinetis.h"
-#include "kinetis_mcg.h"
-#include "kinetis_sim.h"
-#include "kinetis_fmc.h"
-#include "kinetis_llwu.h"
-#include "kinetis_pinmux.h"
+#include "chip/kinetis_mcg.h"
+#include "chip/kinetis_sim.h"
+#include "chip/kinetis_fmc.h"
+#include "chip/kinetis_pmc.h"
+#include "chip/kinetis_llwu.h"
+#include "chip/kinetis_pinmux.h"
+
+#include 
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -59,6 +60,97 @@
 # error "CONFIG_ARCH_RAMFUNCS must be defined for this logic"
 #endif
 
+/* A board may provide an override for BOARD_FRDIV */
+
+#if !defined(BOARD_FRDIV)
+#  define BOARD_FRDIV               MCG_C1_FRDIV_DIV256
+#endif
+
+/* A board may provide BOARD_MCG_C2 with all the MCG_C2 setting
+ * or use individual setting with 0 defaults
+ */
+
+#if !defined(BOARD_MCG_C2)
+
+/* A board may provide an override for BOARD_EXTCLOCK_MCG_C2 */
+
+#  if defined(BOARD_EXTCLOCK)
+#    if defined(BOARD_EXTCLOCK_MCG_C2)
+#      define EXTCLOCK_MCG_C2   BOARD_EXTCLOCK_MCG_C2
+#    else
+#      define EXTCLOCK_MCG_C2   0
+#    endif
+#  endif
+
+/* A board may provide BOARD_EXTAL_LP to not choose MCG_C2_HGO */
+
+# if defined(BOARD_EXTAL_LP)
+#   define BOARD_MGC_C2_HGO        0  /* Do not use MCG_C2_HGO */
+# else
+#   if !defined(KINETIS_MCG_HAS_C2_HGO)
+#     error BOARD_EXTAL_LP is not defined and MCG_C2_HGO is not supported on this SoC!
+#   else
+#     define BOARD_MGC_C2_HGO      MCG_C2_HGO
+#   endif
+# endif
+
+/* A board must provide BOARD_MCG_C2_FCFTRIM when SoC has the setting */
+
+#  if defined(KINETIS_MCG_HAS_C2_FCFTRIM) && !defined(BOARD_MCG_C2_FCFTRIM)
+#    error MCG_C2_FCFTRIM is supported on this SoC and BOARD_MCG_C2_FCFTRIM is not defined!
+#  endif
+
+#  if !defined(KINETIS_MCG_HAS_C2_FCFTRIM) && defined(BOARD_MCG_C2_FCFTRIM)
+#    error BOARD_MCG_C2_FCFTRIM is defined but MCG_C2_FCFTRIM is not supported on this SoC!
+#  endif
+
+/* Provide the 0 default */
+
+#  if !defined(KINETIS_MCG_HAS_C2_FCFTRIM) && !defined(BOARD_MCG_C2_FCFTRIM)
+#    define BOARD_MCG_C2_FCFTRIM 0
+#  endif
+
+/* A board must provide BOARD_MCG_C2_LOCRE0 when SoC has the setting */
+
+#  if defined(KINETIS_MCG_HAS_C2_LOCRE0) && !defined(BOARD_MCG_C2_LOCRE0)
+#      error MCG_C2_LOCRE0 is supported on this SoC and BOARD_MCG_C2_LOCRE0 is not defined!
+#  endif
+
+#  if !defined(KINETIS_MCG_HAS_C2_LOCRE0) && defined(BOARD_MCG_C2_LOCRE0)
+#      error BOARD_MCG_C2_LOCRE0 is defined but MCG_C2_LOCRE0 is not supported on this SoC!
+#  endif
+
+/* Provide the 0 default */
+
+#  if !defined(KINETIS_MCG_HAS_C2_LOCRE0) && !defined(BOARD_MCG_C2_LOCRE0)
+#    define BOARD_MCG_C2_LOCRE0 0
+#  endif
+#endif /* !defined(BOARD_MCG_C2) */
+
+/* Do some sanity checking */
+
+#if BOARD_PRDIV > KINETIS_MCG_C5_PRDIV_MAX || \
+    BOARD_PRDIV < KINETIS_MCG_C5_PRDIV_BASE
+#  error BOARD_PRDIV must satisfy KINETIS_MCG_C5_PRDIV_BASE >= \
+         BOARD_VDIV <= KINETIS_MCG_C5_PRDIV_MAX
+#endif
+
+#if BOARD_VDIV > KINETIS_MCG_C6_VDIV_MAX || \
+    BOARD_VDIV < KINETIS_MCG_C6_VDIV_BASE
+#  error BOARD_VDIV must satisfy KINETIS_MCG_C6_VDIV_BASE >= \
+         BOARD_VDIV <= KINETIS_MCG_C6_VDIV_MAX
+#endif
+
+#if BOARD_PLLIN_FREQ < KINETIS_MCG_PLL_REF_MIN || \
+    BOARD_PLLIN_FREQ > KINETIS_MCG_PLL_REF_MAX
+#  error BOARD_PLLIN_FREQ must satisfy KINETIS_MCG_PLL_REF_MIN >= \
+         BOARD_PLLIN_FREQ <= KINETIS_MCG_PLL_REF_MAX
+#endif
+
+#if ((BOARD_FRDIV & MCG_C1_FRDIV_MASK) >> MCG_C1_FRDIV_SHIFT) > KINETIS_MCG_C1_FRDIV_MAX
+#  error BOARD_FRDIV choice is not supported on this SoC
+#endif
+
 /****************************************************************************
  * Private Function Prototypes
  ****************************************************************************/
@@ -66,14 +158,6 @@
 void __ramfunc__
 kinesis_setdividers(uint32_t div1, uint32_t div2, uint32_t div3, uint32_t div4);
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -109,12 +193,22 @@ static inline void kinesis_portclocks(void)
 
 void kinetis_pllconfig(void)
 {
+#if defined(SIM_SCGC4_LLWU) || defined(BOARD_SOPT2_PLLFLLSEL) || \
+    defined(BOARD_SIM_CLKDIV3_FREQ)
   uint32_t regval32;
+#endif
   uint8_t regval8;
 
+#if defined(BOARD_MCG_C2)
+
+  /* Use complete BOARD_MCG_C2 settings */
+
+  putreg8(BOARD_MCG_C2, KINETIS_MCG_C2);
+#else
+
   /* Transition to FLL Bypassed External (FBE) mode */
 
-#ifdef BOARD_EXTCLOCK
+#  if defined(BOARD_EXTCLOCK)
   /*   IRCS  = 0 (Internal Reference Clock Select)
    *   LP    = 0 (Low Power Select)
    *   EREFS = 0 (External Reference Select)
@@ -122,29 +216,42 @@ void kinetis_pllconfig(void)
    *   RANGE = 0 (Oscillator of 32 kHz to 40 kHz)
    */
 
-  putreg8(0, KINETIS_MCG_C2);
-#else
+  putreg8(EXTCLOCK_MCG_C2, KINETIS_MCG_C2);
+#  else
   /* Enable external oscillator:
    *
-   *   IRCS  = 0 (Internal Reference Clock Select)
-   *   LP    = 0 (Low Power Select)
-   *   EREFS = 1 (External Reference Select)
-   *   HGO   = 1 (High Gain Oscillator Select)
-   *   RANGE = 2 (Oscillator of 8 MHz to 32 MHz)
+   *   IRCS    = 0 (Internal Reference Clock Select)
+   *   LP      = 0 (Low Power Select)
+   *   EREFS   = 1 (External Reference Select)
+   *   HGO     = 1 (High Gain Oscillator Select)
+   *   RANGE   = 2 (Oscillator of 8 MHz to 32 MHz)
+   *   FCFTRIM = 0 if not supported or value provided by board
+   *   LOCRE0  = 0 if not supported or value provided by board
    */
 
-  putreg8(MCG_C2_EREFS | MCG_C2_HGO | MCG_C2_RANGE_VHIGH, KINETIS_MCG_C2);
-#endif
-
+  putreg8(BOARD_MCG_C2_LOCRE0 | BOARD_MCG_C2_FCFTRIM | BOARD_MGC_C2_HGO |
+          MCG_C2_RANGE_VHIGH | MCG_C2_EREFS, KINETIS_MCG_C2);
+#  endif
+#endif /* defined(BOARD_MCG_C2) */
+#if defined(SIM_SCGC4_LLWU)
   /* Released latched state of oscillator and GPIO */
 
   regval32 = getreg32(KINETIS_SIM_SCGC4);
   regval32 |= SIM_SCGC4_LLWU;
   putreg32(regval32, KINETIS_SIM_SCGC4);
+#endif
 
+#if defined(LLWU_CS_ACKISO)
   regval8 = getreg8(KINETIS_LLWU_CS);
   regval8 |= LLWU_CS_ACKISO;
   putreg8(regval8, KINETIS_LLWU_CS);
+#endif
+
+#if defined(PMC_REGSC_ACKISO)
+  regval8 = getreg8(KINETIS_PMC_REGSC);
+  regval8 |= PMC_REGSC_ACKISO;
+  putreg8(regval8, KINETIS_PMC_REGSC);
+#endif
 
   /* Select external oscillator and Reference Divider and clear IREFS to
    * start the external oscillator.
@@ -152,17 +259,17 @@ void kinetis_pllconfig(void)
    *   IREFSTEN = 0 (Internal Reference Stop Enable)
    *   IRCLKEN  = 0 (Internal Reference Clock Enable)
    *   IREFS    = 0 (Internal Reference Select)
-   *   FRDIV    = 3 (FLL External Reference Divider, RANGE!=0 divider=256)
+   *   FRDIV    = BOARD_FRDIV (FLL External Reference Divider)
    *   CLKS     = 2 (Clock Source Select, External reference clock)
    */
 
-  putreg8(MCG_C1_FRDIV_DIV256 | MCG_C1_CLKS_EXTREF, KINETIS_MCG_C1);
+  putreg8(BOARD_FRDIV | MCG_C1_CLKS_EXTREF, KINETIS_MCG_C1);
 
+#ifndef BOARD_EXTCLOCK
   /* If we aren't using an oscillator input we don't need to wait for the
    * oscillator to initialize
    */
 
-#ifndef BOARD_EXTCLOCK
   while ((getreg8(KINETIS_MCG_S) & MCG_S_OSCINIT) == 0);
 #endif
 
@@ -185,7 +292,8 @@ void kinetis_pllconfig(void)
    *
    * Either the external clock or crystal frequency is used to select the
    * PRDIV value. Only reference clock frequencies are supported that will
-   * produce a 2MHz reference clock to the PLL.
+   * produce a KINETIS_MCG_PLL_REF_MIN >= PLLIN <= KINETIS_MCG_PLL_REF_MAX
+   * reference clock to the PLL.
    */
 
   putreg8(MCG_C5_PRDIV(BOARD_PRDIV), KINETIS_MCG_C5);
@@ -225,7 +333,7 @@ void kinetis_pllconfig(void)
 
   /* Wait for the PLL LOCK bit to set */
 
-  while ((getreg8(KINETIS_MCG_S) & MCG_S_LOCK) == 0);
+  while ((getreg8(KINETIS_MCG_S) & MCG_S_LOCK0) == 0);
 
   /* We are now running in PLL Bypassed External (PBE) mode.  Transition to
    * PLL Engaged External (PEE) mode by setting CLKS to 0
@@ -240,6 +348,37 @@ void kinetis_pllconfig(void)
   while ((getreg8(KINETIS_MCG_S) & MCG_S_CLKST_MASK) != MCG_S_CLKST_PLL);
 
   /* We are now running in PLL Engaged External (PEE) mode. */
+
+  /* Do we have BOARD_SOPT2_PLLFLLSEL */
+
+#if defined(BOARD_SOPT2_PLLFLLSEL)
+  /* Set up the SOPT2[PLLFLLSEL] */
+
+  regval32 = getreg32(KINETIS_SIM_SOPT2);
+  regval32 &= ~SIM_SOPT2_PLLFLLSEL_MASK;
+  regval32 |= BOARD_SOPT2_PLLFLLSEL;
+  putreg32(regval32, KINETIS_SIM_SOPT2);
+#endif
+
+#if defined(BOARD_SIM_CLKDIV2_FREQ)
+  /* Set up the SIM_CLKDIV2[USBFRAC, USBDIV] */
+
+  regval32 = getreg32(KINETIS_SIM_CLKDIV2);
+  regval32 &= ~(SIM_CLKDIV2_USBFRAC_MASK | SIM_CLKDIV2_USBDIV_MASK);
+  regval32 |= (SIM_CLKDIV2_USBFRAC(BOARD_SIM_CLKDIV2_USBFRAC) |
+               SIM_CLKDIV2_USBDIV(BOARD_SIM_CLKDIV2_USBDIV));
+  putreg32(regval32, KINETIS_SIM_CLKDIV2);
+#endif
+
+#if defined(BOARD_SIM_CLKDIV3_FREQ)
+  /* Set up the SIM_CLKDIV3 [PLLFLLFRAC, PLLFLLDIV] */
+
+  regval32 = getreg32(KINETIS_SIM_CLKDIV3);
+  regval32 &= ~(SIM_CLKDIV3_PLLFLLFRAC_MASK | SIM_CLKDIV3_PLLFLLDIV_MASK);
+  regval32 |= (SIM_CLKDIV3_PLLFLLFRAC(BOARD_SIM_CLKDIV3_PLLFLLFRAC) |
+               SIM_CLKDIV3_PLLFLLDIV(BOARD_SIM_CLKDIV3_PLLFLLDIV));
+  putreg32(regval32, KINETIS_SIM_CLKDIV3);
+#endif
 }
 
 /****************************************************************************
@@ -347,7 +486,7 @@ void __ramfunc__
 kinesis_setdividers(uint32_t div1, uint32_t div2, uint32_t div3, uint32_t div4)
 {
   uint32_t regval;
-  int i;
+  volatile int i;
 
   /* Save the current value of the Flash Access Protection Register */
 
@@ -374,6 +513,3 @@ kinesis_setdividers(uint32_t div1, uint32_t div2, uint32_t div3, uint32_t div4)
 
   putreg32(regval, KINETIS_FMC_PFAPR);
 }
-
-
-
diff --git a/arch/arm/src/kinetis/kinetis_clrpend.c b/arch/arm/src/kinetis/kinetis_clrpend.c
index 7f0395c4aeb2f1cbe7f9038a275b2ad40a8bbe99..faf35271d8f1d4bff1ae7147fb71fd61cfedcd2f 100644
--- a/arch/arm/src/kinetis/kinetis_clrpend.c
+++ b/arch/arm/src/kinetis/kinetis_clrpend.c
@@ -82,23 +82,23 @@ void kinetis_clrpend(int irq)
 {
   /* Check for external interrupt */
 
-  if (irq >= KINETIS_IRQ_EXTINT)
+  if (irq >= KINETIS_IRQ_FIRST)
     {
-      if (irq < (KINETIS_IRQ_EXTINT+32))
+      if (irq < (KINETIS_IRQ_FIRST+32))
         {
-          putreg32(1 << (irq - KINETIS_IRQ_EXTINT), NVIC_IRQ0_31_CLRPEND);
+          putreg32(1 << (irq - KINETIS_IRQ_FIRST), NVIC_IRQ0_31_CLRPEND);
         }
-      else if (irq < (KINETIS_IRQ_EXTINT+64))
+      else if (irq < (KINETIS_IRQ_FIRST+64))
         {
-          putreg32(1 << (irq - KINETIS_IRQ_EXTINT - 32), NVIC_IRQ32_63_CLRPEND);
+          putreg32(1 << (irq - KINETIS_IRQ_FIRST - 32), NVIC_IRQ32_63_CLRPEND);
         }
-      else if (irq < (KINETIS_IRQ_EXTINT+96))
+      else if (irq < (KINETIS_IRQ_FIRST+96))
         {
-          putreg32(1 << (irq - KINETIS_IRQ_EXTINT - 64), NVIC_IRQ64_95_CLRPEND);
+          putreg32(1 << (irq - KINETIS_IRQ_FIRST - 64), NVIC_IRQ64_95_CLRPEND);
         }
       else if (irq < NR_IRQS)
         {
-          putreg32(1 << (irq - KINETIS_IRQ_EXTINT - 96), NVIC_IRQ96_127_CLRPEND);
+          putreg32(1 << (irq - KINETIS_IRQ_FIRST - 96), NVIC_IRQ96_127_CLRPEND);
         }
     }
 }
diff --git a/arch/arm/src/kinetis/kinetis_config.h b/arch/arm/src/kinetis/kinetis_config.h
index ce1c6efedf79b6d7348ef4a04fb77b12d3cc1d15..732dd403c438085c2a046b521748f9e12493ffae 100644
--- a/arch/arm/src/kinetis/kinetis_config.h
+++ b/arch/arm/src/kinetis/kinetis_config.h
@@ -1,8 +1,9 @@
 /************************************************************************************
  * arch/arm/src/kinetis/kinetis_config.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2011, 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -33,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETISXX_KINETIS_CONFIG_H
-#define __ARCH_ARM_SRC_KINETISXX_KINETIS_CONFIG_H
+#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_CONFIG_H
+#define __ARCH_ARM_SRC_KINETIS_KINETIS_CONFIG_H
 
 /************************************************************************************
  * Included Files
@@ -50,7 +51,11 @@
  ************************************************************************************/
 
 /* Configuration *********************************************************************/
-/* Make that no unsupported UARTs are enabled */
+/* Make sure that no unsupported UARTs are enabled */
+
+#ifndef KINETIS_NLPUART
+#  define KINETIS_NLPUART 0
+#endif
 
 #ifndef KINETIS_NISO7816
 #  define KINETIS_NISO7816 0
@@ -75,69 +80,151 @@
 #  endif
 #endif
 
-/* Are any UARTs enabled? */
+#if KINETIS_NLPUART < 1
+#  undef CONFIG_KINETIS_LPUART0
+#endif
+
+/* Are any UARTs or LPUARTs enabled? */
 
 #undef HAVE_UART_DEVICE
 #if defined(CONFIG_KINETIS_UART0) || defined(CONFIG_KINETIS_UART1) || \
     defined(CONFIG_KINETIS_UART2) || defined(CONFIG_KINETIS_UART3) || \
-    defined(CONFIG_KINETIS_UART5)
+    defined(CONFIG_KINETIS_UART4) || defined(CONFIG_KINETIS_UART5)
 #  define HAVE_UART_DEVICE 1
 #endif
 
+#undef HAVE_LPUART_DEVICE
+#if defined(CONFIG_KINETIS_LPUART0) || defined(CONFIG_KINETIS_LPUART1)
+#  define HAVE_LPUART_DEVICE 1
+#endif
+
 /* Is there a serial console? There should be at most one defined.  It could be on
  * any UARTn, n=0,1,2,3,4,5
  */
 
-#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART0)
-#  undef CONFIG_UART1_SERIAL_CONSOLE
-#  undef CONFIG_UART2_SERIAL_CONSOLE
-#  undef CONFIG_UART3_SERIAL_CONSOLE
-#  undef CONFIG_UART4_SERIAL_CONSOLE
-#  undef CONFIG_UART5_SERIAL_CONSOLE
-#  define HAVE_SERIAL_CONSOLE 1
-#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART1)
-#  undef CONFIG_UART0_SERIAL_CONSOLE
-#  undef CONFIG_UART2_SERIAL_CONSOLE
-#  undef CONFIG_UART3_SERIAL_CONSOLE
-#  undef CONFIG_UART4_SERIAL_CONSOLE
-#  undef CONFIG_UART5_SERIAL_CONSOLE
-#  define HAVE_SERIAL_CONSOLE 1
-#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART2)
-#  undef CONFIG_UART0_SERIAL_CONSOLE
-#  undef CONFIG_UART1_SERIAL_CONSOLE
-#  undef CONFIG_UART3_SERIAL_CONSOLE
-#  undef CONFIG_UART4_SERIAL_CONSOLE
-#  undef CONFIG_UART5_SERIAL_CONSOLE
-#  define HAVE_SERIAL_CONSOLE 1
-#elif defined(CONFIG_UART3_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART3)
-#  undef CONFIG_UART0_SERIAL_CONSOLE
-#  undef CONFIG_UART1_SERIAL_CONSOLE
-#  undef CONFIG_UART2_SERIAL_CONSOLE
-#  undef CONFIG_UART4_SERIAL_CONSOLE
-#  undef CONFIG_UART5_SERIAL_CONSOLE
-#  define HAVE_SERIAL_CONSOLE 1
-#elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART4)
-#  undef CONFIG_UART0_SERIAL_CONSOLE
-#  undef CONFIG_UART1_SERIAL_CONSOLE
-#  undef CONFIG_UART2_SERIAL_CONSOLE
-#  undef CONFIG_UART3_SERIAL_CONSOLE
-#  undef CONFIG_UART5_SERIAL_CONSOLE
-#  define HAVE_SERIAL_CONSOLE 1
-#elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART5)
-#  undef CONFIG_UART0_SERIAL_CONSOLE
-#  undef CONFIG_UART1_SERIAL_CONSOLE
-#  undef CONFIG_UART2_SERIAL_CONSOLE
-#  undef CONFIG_UART3_SERIAL_CONSOLE
-#  undef CONFIG_UART4_SERIAL_CONSOLE
-#  define HAVE_SERIAL_CONSOLE 1
+#undef HAVE_UART_CONSOLE
+#undef HAVE_LPUART_CONSOLE
+
+#if defined(CONFIG_CONSOLE_SYSLOG)
+#    undef CONFIG_UART0_SERIAL_CONSOLE
+#    undef CONFIG_UART1_SERIAL_CONSOLE
+#    undef CONFIG_UART2_SERIAL_CONSOLE
+#    undef CONFIG_UART3_SERIAL_CONSOLE
+#    undef CONFIG_UART4_SERIAL_CONSOLE
+#    undef CONFIG_UART5_SERIAL_CONSOLE
+#    undef CONFIG_LPUART0_SERIAL_CONSOLE
+#    undef CONFIG_LPUART1_SERIAL_CONSOLE
 #else
-#  undef CONFIG_UART0_SERIAL_CONSOLE
-#  undef CONFIG_UART1_SERIAL_CONSOLE
-#  undef CONFIG_UART2_SERIAL_CONSOLE
-#  undef CONFIG_UART3_SERIAL_CONSOLE
-#  undef CONFIG_UART4_SERIAL_CONSOLE
-#  undef CONFIG_UART5_SERIAL_CONSOLE
-#  undef HAVE_SERIAL_CONSOLE
+#  if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART0)
+#    undef CONFIG_UART1_SERIAL_CONSOLE
+#    undef CONFIG_UART2_SERIAL_CONSOLE
+#    undef CONFIG_UART3_SERIAL_CONSOLE
+#    undef CONFIG_UART4_SERIAL_CONSOLE
+#    undef CONFIG_UART5_SERIAL_CONSOLE
+#    undef CONFIG_LPUART0_SERIAL_CONSOLE
+#    undef CONFIG_LPUART1_SERIAL_CONSOLE
+#    define HAVE_UART_CONSOLE 1
+#  elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART1)
+#    undef CONFIG_UART0_SERIAL_CONSOLE
+#    undef CONFIG_UART2_SERIAL_CONSOLE
+#    undef CONFIG_UART3_SERIAL_CONSOLE
+#    undef CONFIG_UART4_SERIAL_CONSOLE
+#    undef CONFIG_UART5_SERIAL_CONSOLE
+#    undef CONFIG_LPUART0_SERIAL_CONSOLE
+#    undef CONFIG_LPUART1_SERIAL_CONSOLE
+#    define HAVE_UART_CONSOLE 1
+#  elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART2)
+#    undef CONFIG_UART0_SERIAL_CONSOLE
+#    undef CONFIG_UART1_SERIAL_CONSOLE
+#    undef CONFIG_UART3_SERIAL_CONSOLE
+#    undef CONFIG_UART4_SERIAL_CONSOLE
+#    undef CONFIG_UART5_SERIAL_CONSOLE
+#    undef CONFIG_LPUART0_SERIAL_CONSOLE
+#    undef CONFIG_LPUART1_SERIAL_CONSOLE
+#    define HAVE_UART_CONSOLE 1
+#  elif defined(CONFIG_UART3_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART3)
+#    undef CONFIG_UART0_SERIAL_CONSOLE
+#    undef CONFIG_UART1_SERIAL_CONSOLE
+#    undef CONFIG_UART2_SERIAL_CONSOLE
+#    undef CONFIG_UART4_SERIAL_CONSOLE
+#    undef CONFIG_UART5_SERIAL_CONSOLE
+#    undef CONFIG_LPUART0_SERIAL_CONSOLE
+#    undef CONFIG_LPUART1_SERIAL_CONSOLE
+#    define HAVE_UART_CONSOLE 1
+#  elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART4)
+#    undef CONFIG_UART0_SERIAL_CONSOLE
+#    undef CONFIG_UART1_SERIAL_CONSOLE
+#    undef CONFIG_UART2_SERIAL_CONSOLE
+#    undef CONFIG_UART3_SERIAL_CONSOLE
+#    undef CONFIG_UART5_SERIAL_CONSOLE
+#    undef CONFIG_LPUART0_SERIAL_CONSOLE
+#    undef CONFIG_LPUART1_SERIAL_CONSOLE
+#    define HAVE_UART_CONSOLE 1
+#  elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART5)
+#    undef CONFIG_UART0_SERIAL_CONSOLE
+#    undef CONFIG_UART1_SERIAL_CONSOLE
+#    undef CONFIG_UART2_SERIAL_CONSOLE
+#    undef CONFIG_UART3_SERIAL_CONSOLE
+#    undef CONFIG_UART4_SERIAL_CONSOLE
+#    undef CONFIG_LPUART0_SERIAL_CONSOLE
+#    undef CONFIG_LPUART1_SERIAL_CONSOLE
+#    define HAVE_UART_CONSOLE 1
+#  elif defined(CONFIG_LPUART0_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_LPUART0)
+#    undef CONFIG_UART0_SERIAL_CONSOLE
+#    undef CONFIG_UART1_SERIAL_CONSOLE
+#    undef CONFIG_UART2_SERIAL_CONSOLE
+#    undef CONFIG_UART3_SERIAL_CONSOLE
+#    undef CONFIG_UART4_SERIAL_CONSOLE
+#    undef CONFIG_UART5_SERIAL_CONSOLE
+#    undef CONFIG_LPUART1_SERIAL_CONSOLE
+#    define HAVE_LPUART_CONSOLE 1
+#  elif defined(CONFIG_LPUART1_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_LPUART1)
+#    undef CONFIG_UART0_SERIAL_CONSOLE
+#    undef CONFIG_UART1_SERIAL_CONSOLE
+#    undef CONFIG_UART2_SERIAL_CONSOLE
+#    undef CONFIG_UART3_SERIAL_CONSOLE
+#    undef CONFIG_UART4_SERIAL_CONSOLE
+#    undef CONFIG_UART5_SERIAL_CONSOLE
+#    undef CONFIG_LPUART0_SERIAL_CONSOLE
+#    define HAVE_LPUART_CONSOLE 1
+#  else
+#    ifdef CONFIG_DEV_CONSOLE
+#      warning "No valid CONFIG_[LP]UART[n]_SERIAL_CONSOLE Setting"
+#    endif
+#    undef CONFIG_UART0_SERIAL_CONSOLE
+#    undef CONFIG_UART1_SERIAL_CONSOLE
+#    undef CONFIG_UART2_SERIAL_CONSOLE
+#    undef CONFIG_UART3_SERIAL_CONSOLE
+#    undef CONFIG_UART4_SERIAL_CONSOLE
+#    undef CONFIG_UART5_SERIAL_CONSOLE
+#    undef CONFIG_LPUART0_SERIAL_CONSOLE
+#    undef CONFIG_LPUART1_SERIAL_CONSOLE
+#  endif
+#endif
+
+/* Which version of up_putc() should be built?
+ *
+ * --------------------+-------------------+-----------------+------------------
+ *                      HAVE_UART_DEVICE && HAVE_UART_DEVICE  HAVE_LPUART_DEVICE
+ *                      HAVE_LPUART_DEVICE  (only)            (only)
+ * --------------------+-------------------+-----------------+------------------
+ * HAVE_UART_CONSOLE    kinetis_serial      kinetis_serial    (impossible)
+ * HAVE_LPUART_CONSOLE  kinetis_lpserial    (impossible)      kinetis_lpserial
+ * No serial console    kinetis_serial      kinetis_serial    kinetis_lpserial
+ * --------------------+-------------------+-----------------+------------------
+ */
+
+#undef HAVE_UART_PUTC
+#undef HAVE_LPUART_PUTC
+
+#if defined(HAVE_LPUART_CONSOLE)
+#  define HAVE_LPUART_PUTC 1
+#elif defined(HAVE_UART_CONSOLE)
+#  define HAVE_UART_PUTC   1
+#elif defined(HAVE_UART_DEVICE)
+#  define HAVE_UART_PUTC   1
+#elif defined(HAVE_LPUART_DEVICE)
+#  define HAVE_LPUART_PUTC 1
 #endif
 
 /* Check UART flow control (Not yet supported) */
@@ -148,6 +235,8 @@
 # undef CONFIG_UART3_FLOWCONTROL
 # undef CONFIG_UART4_FLOWCONTROL
 # undef CONFIG_UART5_FLOWCONTROL
+# undef CONFIG_LPUART0_FLOWCONTROL
+# undef CONFIG_LPUART1_FLOWCONTROL
 
 /* UART FIFO support is not fully implemented.
  *
@@ -183,6 +272,12 @@
 #ifndef CONFIG_KINETIS_UART5PRIO
 #  define CONFIG_KINETIS_UART5PRIO NVIC_SYSH_PRIORITY_DEFAULT
 #endif
+#ifndef CONFIG_KINETIS_LPUART0PRIO
+#  define CONFIG_KINETIS_LPUART0PRIO NVIC_SYSH_PRIORITY_DEFAULT
+#endif
+#ifndef CONFIG_KINETIS_LPUART1PRIO
+#  define CONFIG_KINETIS_LPUART1PRIO NVIC_SYSH_PRIORITY_DEFAULT
+#endif
 
 /* Ethernet controller configuration */
 
@@ -197,8 +292,8 @@
 #  define CONFIG_ENET_PHYADDR 1
 #endif
 
-#ifndef CONFIG_ENET_NETHIFS
-# define CONFIG_ENET_NETHIFS 1
+#ifndef CONFIG_ENETNETHIFS
+# define CONFIG_ENETNETHIFS 1
 #endif
 
 /* EMAC Default Interrupt Priorities */
@@ -232,4 +327,4 @@
  * Public Functions
  ************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETISXX_KINETIS_CONFIG_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_CONFIG_H */
diff --git a/arch/arm/src/kinetis/kinetis_dma.c b/arch/arm/src/kinetis/kinetis_dma.c
new file mode 100644
index 0000000000000000000000000000000000000000..fda8c5fb4fe73efb580c8b551644e2271874b6fc
--- /dev/null
+++ b/arch/arm/src/kinetis/kinetis_dma.c
@@ -0,0 +1,199 @@
+/****************************************************************************
+ *  arch/arm/src/kinetis/kinetis_dma.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "up_arch.h"
+#include "up_internal.h"
+
+#include "kinetis_config.h"
+#include "chip.h"
+#include "kinetis_dma.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+
+/****************************************************************************
+ * Name: kinetis_dmainitialize
+ *
+ * Description:
+ *   Initialize the DMA subsystem.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void kinetis_dmainitilaize(void)
+{
+
+}
+
+/****************************************************************************
+ * Name: kinetis_dmachannel
+ *
+ * Description:
+ *   Allocate a DMA channel.  This function sets aside a DMA channel and
+ *   gives the caller exclusive access to the DMA channel.
+ *
+ * Returned Value:
+ *   One success, this function returns a non-NULL, void* DMA channel
+ *   handle.  NULL is returned on any failure.  This function can fail only
+ *   if no DMA channel is available.
+ *
+ ****************************************************************************/
+
+DMA_HANDLE kinetis_dmachannel(void)
+{
+	return NULL;
+}
+
+/****************************************************************************
+ * Name: kinetis_dmafree
+ *
+ * Description:
+ *   Release a DMA channel.  NOTE:  The 'handle' used in this argument must
+ *   NEVER be used again until kinetis_dmachannel() is called again to re-gain
+ *   a valid handle.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void kinetis_dmafree(DMA_HANDLE handle)
+{
+
+}
+
+/****************************************************************************
+ * Name: kinetis_dmasetup
+ *
+ * Description:
+ *   Configure DMA for one transfer.
+ *
+ ****************************************************************************/
+
+int kinetis_dmarxsetup(DMA_HANDLE handle, uint32_t control, uint32_t config,
+                  uint32_t srcaddr, uint32_t destaddr, size_t nbytes)
+{
+  return -1;
+}
+
+/****************************************************************************
+ * Name: kinetis_dmastart
+ *
+ * Description:
+ *   Start the DMA transfer
+ *
+ ****************************************************************************/
+
+int kinetis_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
+{
+  return -1;
+}
+
+
+/****************************************************************************
+ * Name: kinetis_dmastop
+ *
+ * Description:
+ *   Cancel the DMA.  After kinetis_dmastop() is called, the DMA channel is
+ *   reset and kinetis_dmasetup() must be called before kinetis_dmastart() can be
+ *   called again
+ *
+ ****************************************************************************/
+
+void kinetis_dmastop(DMA_HANDLE handle)
+{
+}
+
+/****************************************************************************
+ * Name: kinetis_dmasample
+ *
+ * Description:
+ *   Sample DMA register contents
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEBUG_DMA
+void kinetis_dmasample(DMA_HANDLE handle, struct kinetis_dmaregs_s *regs)
+{
+
+}
+#endif
+
+/****************************************************************************
+ * Name: kinetis_dmadump
+ *
+ * Description:
+ *   Dump previously sampled DMA register contents
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEBUG_DMA
+void kinetis_dmadump(DMA_HANDLE handle, const struct kinetis_dmaregs_s *regs,
+                const char *msg)
+{
+
+}
+#endif
+
diff --git a/arch/arm/src/kinetis/kinetis_dma.h b/arch/arm/src/kinetis/kinetis_dma.h
index 9876a46a0f0fdc794f55676c284e2f446ea5dd8a..38f03f87a36b86ae6053921485990d6711be33f4 100644
--- a/arch/arm/src/kinetis/kinetis_dma.h
+++ b/arch/arm/src/kinetis/kinetis_dma.h
@@ -1,8 +1,9 @@
-/****************************************************************************************************
+/****************************************************************************
  * arch/arm/src/kinetis/kinetis_dma.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -31,745 +32,188 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ****************************************************************************************************/
+ ****************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_DMA_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_DMA_H
+#ifndef __ARCH_ARM_SRC_KINETEIS_KINETEIS_DMA_H
+#define __ARCH_ARM_SRC_KINETEIS_KINETEIS_DMA_H
 
-/****************************************************************************************************
+/****************************************************************************
  * Included Files
- ****************************************************************************************************/
+ ****************************************************************************/
 
 #include 
+#include 
 
-#include "chip.h"
-
-/****************************************************************************************************
- * Pre-processor Definitions
- ****************************************************************************************************/
-
-/* Register Offsets *********************************************************************************/
-
-#define KINETIS_DMA_CR_OFFSET             0x0000 /* Control Register */
-#define KINETIS_DMA_ES_OFFSET             0x0004 /* Error Status Register */
-#define KINETIS_DMA_ERQ_OFFSET            0x000c /* Enable Request Register */
-#define KINETIS_DMA_EEI_OFFSET            0x0014 /* Enable Error Interrupt Register */
-#define KINETIS_DMA_CEEI_OFFSET           0x0018 /* Clear Enable Error Interrupt Register */
-#define KINETIS_DMA_SEEI_OFFSET           0x0019 /* Set Enable Error Interrupt Register */
-#define KINETIS_DMA_CERQ_OFFSET           0x001a /* Clear Enable Request Register */
-#define KINETIS_DMA_SERQ_OFFSET           0x001b /* Set Enable Request Register */
-#define KINETIS_DMA_CDNE_OFFSET           0x001c /* Clear DONE Status Bit Register */
-#define KINETIS_DMA_SSRT_OFFSET           0x001d /* Set START Bit Register */
-#define KINETIS_DMA_CERR_OFFSET           0x001e /* Clear Error Register */
-#define KINETIS_DMA_CINT_OFFSET           0x001f /* Clear Interrupt Request Register */
-#define KINETIS_DMA_INT_OFFSET            0x0024 /* Interrupt Request Register */
-#define KINETIS_DMA_ERR_OFFSET            0x002c /* Error Register */
-#define KINETIS_DMA_HRS_OFFSET            0x0034 /* Hardware Request Status Register */
-
-#define KINETIS_DMA_DCHPRI3_OFFSET        0x0100 /* Channel 3 Priority Register */
-#define KINETIS_DMA_DCHPRI2_OFFSET        0x0101 /* Channel 2 Priority Register */
-#define KINETIS_DMA_DCHPRI1_OFFSET        0x0102 /* Channel 1 Priority Register */
-#define KINETIS_DMA_DCHPRI0_OFFSET        0x0103 /* Channel 0 Priority Register */
-#define KINETIS_DMA_DCHPRI7_OFFSET        0x0104 /* Channel 7 Priority Register */
-#define KINETIS_DMA_DCHPRI6_OFFSET        0x0105 /* Channel 6 Priority Register */
-#define KINETIS_DMA_DCHPRI5_OFFSET        0x0106 /* Channel 5 Priority Register */
-#define KINETIS_DMA_DCHPRI4_OFFSET        0x0107 /* Channel 4 Priority Register */
-#define KINETIS_DMA_DCHPRI11_OFFSET       0x0108 /* Channel 11 Priority Register */
-#define KINETIS_DMA_DCHPRI10_OFFSET       0x0109 /* Channel 10 Priority Register */
-#define KINETIS_DMA_DCHPRI9_OFFSET        0x010a /* Channel 9 Priority Register */
-#define KINETIS_DMA_DCHPRI8_OFFSET        0x010b /* Channel 8 Priority Register */
-#define KINETIS_DMA_DCHPRI15_OFFSET       0x010c /* Channel 15 Priority Register */
-#define KINETIS_DMA_DCHPRI14_OFFSET       0x010d /* Channel 14 Priority Register */
-#define KINETIS_DMA_DCHPRI13_OFFSET       0x010e /* Channel 13 Priority Register */
-#define KINETIS_DMA_DCHPRI12_OFFSET       0x010f /* Channel 12 Priority Register */
-
-#define KINETIS_DMA_TCD_OFFSET(n)         (0x0000+((n) << 5))
-#define KINETIS_DMA_TCD_SADDR_OFFSET      0x0000 /* TCD Source Address */
-#define KINETIS_DMA_TCD_SOFF_OFFSET       0x0004 /* TCD Signed Source Address Offset */
-#define KINETIS_DMA_TCD_ATTR_OFFSET       0x0006 /* TCD Transfer Attributes */
-#define KINETIS_DMA_TCD_NBYTES_OFFSET     0x0008 /* TCD Minor Byte Count */
-#define KINETIS_DMA_TCD_SLAST_OFFSET      0x000c /* TCD Last Source Address Adjustment */
-#define KINETIS_DMA_TCD_DADDR_OFFSET      0x0010 /* TCD Destination Address */
-#define KINETIS_DMA_TCD_DOFF_OFFSET       0x0014 /* TCD Signed Destination Address Offset */
-#define KINETIS_DMA_TCD_CITER_OFFSET      0x0016 /* TCD Current Minor Loop Link, Major Loop Count */
-#define KINETIS_DMA_TCD_DLASTSGA_OFFSET   0x0018 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
-#define KINETIS_DMA_TCD_CSR_OFFSET        0x001c /* TCD Control and Status */
-#define KINETIS_DMA_TCD_BITER_OFFSET      0x001e /* TCD Beginning Minor Loop Link, Major Loop Count */
-
-#define KINETIS_DMA_TCD0_SADDR_OFFSET     0x0000 /* TCD Source Address */
-#define KINETIS_DMA_TCD0_SOFF_OFFSET      0x0004 /* TCD Signed Source Address Offset */
-#define KINETIS_DMA_TCD0_ATTR_OFFSET      0x0006 /* TCD Transfer Attributes */
-#define KINETIS_DMA_TCD0_NBYTES_OFFSET    0x0008 /* TCD Minor Byte Count */
-#define KINETIS_DMA_TCD0_SLAST_OFFSET     0x000c /* TCD Last Source Address Adjustment */
-#define KINETIS_DMA_TCD0_DADDR_OFFSET     0x0010 /* TCD Destination Address */
-#define KINETIS_DMA_TCD0_DOFF_OFFSET      0x0014 /* TCD Signed Destination Address Offset */
-#define KINETIS_DMA_TCD0_CITER_OFFSET     0x0016 /* TCD Current Minor Loop Link, Major Loop Count */
-#define KINETIS_DMA_TCD0_DLASTSGA_OFFSET  0x0018 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
-#define KINETIS_DMA_TCD0_CSR_OFFSET       0x001c /* TCD Control and Status */
-#define KINETIS_DMA_TCD0_BITER_OFFSET     0x001e /* TCD Beginning Minor Loop Link, Major Loop Count */
-
-#define KINETIS_DMA_TCD1_SADDR_OFFSET     0x0020 /* TCD Source Address */
-#define KINETIS_DMA_TCD1_SOFF_OFFSET      0x0024 /* TCD Signed Source Address Offset */
-#define KINETIS_DMA_TCD1_ATTR_OFFSET      0x0026 /* TCD Transfer Attributes */
-#define KINETIS_DMA_TCD1_NBYTES_OFFSET    0x0028 /* TCD Minor Byte Count */
-#define KINETIS_DMA_TCD1_SLAST_OFFSET     0x002c /* TCD Last Source Address Adjustment */
-#define KINETIS_DMA_TCD1_DADDR_OFFSET     0x0030 /* TCD Destination Address */
-#define KINETIS_DMA_TCD1_DOFF_OFFSET      0x0034 /* TCD Signed Destination Address Offset */
-#define KINETIS_DMA_TCD1_CITER_OFFSET     0x0036 /* TCD Current Minor Loop Link, Major Loop Count */
-#define KINETIS_DMA_TCD1_DLASTSGA_OFFSET  0x0038 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
-#define KINETIS_DMA_TCD1_CSR_OFFSET       0x003c /* TCD Control and Status */
-#define KINETIS_DMA_TCD1_BITER_OFFSET     0x003e /* TCD Beginning Minor Loop Link, Major Loop Count */
-
-#define KINETIS_DMA_TCD2_SADDR_OFFSET     0x0040 /* TCD Source Address */
-#define KINETIS_DMA_TCD2_SOFF_OFFSET      0x0044 /* TCD Signed Source Address Offset */
-#define KINETIS_DMA_TCD2_ATTR_OFFSET      0x0046 /* TCD Transfer Attributes */
-#define KINETIS_DMA_TCD2_NBYTES_OFFSET    0x0048 /* TCD Minor Byte Count */
-#define KINETIS_DMA_TCD2_SLAST_OFFSET     0x004c /* TCD Last Source Address Adjustment */
-#define KINETIS_DMA_TCD2_DADDR_OFFSET     0x0050 /* TCD Destination Address */
-#define KINETIS_DMA_TCD2_DOFF_OFFSET      0x0054 /* TCD Signed Destination Address Offset */
-#define KINETIS_DMA_TCD2_CITER_OFFSET     0x0056 /* TCD Current Minor Loop Link, Major Loop Count */
-#define KINETIS_DMA_TCD2_DLASTSGA_OFFSET  0x0058 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
-#define KINETIS_DMA_TCD2_CSR_OFFSET       0x005c /* TCD Control and Status */
-#define KINETIS_DMA_TCD2_BITER_OFFSET     0x005e /* TCD Beginning Minor Loop Link, Major Loop Count */
-
-#define KINETIS_DMA_TCD3_SADDR_OFFSET     0x0060 /* TCD Source Address */
-#define KINETIS_DMA_TCD3_SOFF_OFFSET      0x0064 /* TCD Signed Source Address Offset */
-#define KINETIS_DMA_TCD3_ATTR_OFFSET      0x0066 /* TCD Transfer Attributes */
-#define KINETIS_DMA_TCD3_NBYTES_OFFSET    0x0068 /* TCD Minor Byte Count */
-#define KINETIS_DMA_TCD3_SLAST_OFFSET     0x006c /* TCD Last Source Address Adjustment */
-#define KINETIS_DMA_TCD3_DADDR_OFFSET     0x0070 /* TCD Destination Address */
-#define KINETIS_DMA_TCD3_DOFF_OFFSET      0x0074 /* TCD Signed Destination Address Offset */
-#define KINETIS_DMA_TCD3_CITER_OFFSET     0x0076 /* TCD Current Minor Loop Link, Major Loop Count */
-#define KINETIS_DMA_TCD3_DLASTSGA_OFFSET  0x0078 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
-#define KINETIS_DMA_TCD3_CSR_OFFSET       0x007c /* TCD Control and Status */
-#define KINETIS_DMA_TCD3_BITER_OFFSET     0x007e /* TCD Beginning Minor Loop Link, Major Loop Count */
-
-#define KINETIS_DMA_TCD4_SADDR_OFFSET     0x0080 /* TCD Source Address */
-#define KINETIS_DMA_TCD4_SOFF_OFFSET      0x0084 /* TCD Signed Source Address Offset */
-#define KINETIS_DMA_TCD4_ATTR_OFFSET      0x0086 /* TCD Transfer Attributes */
-#define KINETIS_DMA_TCD4_NBYTES_OFFSET    0x0088 /* TCD Minor Byte Count */
-#define KINETIS_DMA_TCD4_SLAST_OFFSET     0x008c /* TCD Last Source Address Adjustment */
-#define KINETIS_DMA_TCD4_DADDR_OFFSET     0x0090 /* TCD Destination Address */
-#define KINETIS_DMA_TCD4_DOFF_OFFSET      0x0094 /* TCD Signed Destination Address Offset */
-#define KINETIS_DMA_TCD4_CITER_OFFSET     0x0096 /* TCD Current Minor Loop Link, Major Loop Count */
-#define KINETIS_DMA_TCD4_DLASTSGA_OFFSET  0x0098 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
-#define KINETIS_DMA_TCD4_CSR_OFFSET       0x009c /* TCD Control and Status */
-#define KINETIS_DMA_TCD4_BITER_OFFSET     0x009e /* TCD Beginning Minor Loop Link, Major Loop Count */
-
-#define KINETIS_DMA_TCD5_SADDR_OFFSET     0x00a0 /* TCD Source Address */
-#define KINETIS_DMA_TCD5_SOFF_OFFSET      0x00a4 /* TCD Signed Source Address Offset */
-#define KINETIS_DMA_TCD5_ATTR_OFFSET      0x00a6 /* TCD Transfer Attributes */
-#define KINETIS_DMA_TCD5_NBYTES_OFFSET    0x00a8 /* TCD Minor Byte Count */
-#define KINETIS_DMA_TCD5_SLAST_OFFSET     0x00ac /* TCD Last Source Address Adjustment */
-#define KINETIS_DMA_TCD5_DADDR_OFFSET     0x00b0 /* TCD Destination Address */
-#define KINETIS_DMA_TCD5_DOFF_OFFSET      0x00b4 /* TCD Signed Destination Address Offset */
-#define KINETIS_DMA_TCD5_CITER_OFFSET     0x00b6 /* TCD Current Minor Loop Link, Major Loop Count */
-#define KINETIS_DMA_TCD5_DLASTSGA_OFFSET  0x00b8 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
-#define KINETIS_DMA_TCD5_CSR_OFFSET       0x00bc /* TCD Control and Status */
-#define KINETIS_DMA_TCD5_BITER_OFFSET     0x00be /* TCD Beginning Minor Loop Link, Major Loop Count */
-
-#define KINETIS_DMA_TCD6_SADDR_OFFSET     0x00c0 /* TCD Source Address */
-#define KINETIS_DMA_TCD6_SOFF_OFFSET      0x00c4 /* TCD Signed Source Address Offset */
-#define KINETIS_DMA_TCD6_ATTR_OFFSET      0x00c6 /* TCD Transfer Attributes */
-#define KINETIS_DMA_TCD6_NBYTES_OFFSET    0x00c8 /* TCD Minor Byte Count */
-#define KINETIS_DMA_TCD6_SLAST_OFFSET     0x00cc /* TCD Last Source Address Adjustment */
-#define KINETIS_DMA_TCD6_DADDR_OFFSET     0x00d0 /* TCD Destination Address */
-#define KINETIS_DMA_TCD6_DOFF_OFFSET      0x00d4 /* TCD Signed Destination Address Offset */
-#define KINETIS_DMA_TCD6_CITER_OFFSET     0x00d6 /* TCD Current Minor Loop Link, Major Loop Count */
-#define KINETIS_DMA_TCD6_DLASTSGA_OFFSET  0x00d8 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
-#define KINETIS_DMA_TCD6_CSR_OFFSET       0x00dc /* TCD Control and Status */
-#define KINETIS_DMA_TCD6_BITER_OFFSET     0x00de /* TCD Beginning Minor Loop Link, Major Loop Count */
-
-#define KINETIS_DMA_TCD7_SADDR_OFFSET     0x00e0 /* TCD Source Address */
-#define KINETIS_DMA_TCD7_SOFF_OFFSET      0x00e4 /* TCD Signed Source Address Offset */
-#define KINETIS_DMA_TCD7_ATTR_OFFSET      0x00e6 /* TCD Transfer Attributes */
-#define KINETIS_DMA_TCD7_NBYTES_OFFSET    0x00e8 /* TCD Minor Byte Count */
-#define KINETIS_DMA_TCD7_SLAST_OFFSET     0x00ec /* TCD Last Source Address Adjustment */
-#define KINETIS_DMA_TCD7_DADDR_OFFSET     0x00f0 /* TCD Destination Address */
-#define KINETIS_DMA_TCD7_DOFF_OFFSET      0x00f4 /* TCD Signed Destination Address Offset */
-#define KINETIS_DMA_TCD7_CITER_OFFSET     0x00f6 /* TCD Current Minor Loop Link, Major Loop Count */
-#define KINETIS_DMA_TCD7_DLASTSGA_OFFSET  0x00f8 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
-#define KINETIS_DMA_TCD7_CSR_OFFSET       0x00fc /* TCD Control and Status */
-#define KINETIS_DMA_TCD7_BITER_OFFSET     0x00fe /* TCD Beginning Minor Loop Link, Major Loop Count */
-
-#define KINETIS_DMA_TCD8_SADDR_OFFSET     0x0100 /* TCD Source Address */
-#define KINETIS_DMA_TCD8_SOFF_OFFSET      0x0104 /* TCD Signed Source Address Offset */
-#define KINETIS_DMA_TCD8_ATTR_OFFSET      0x0106 /* TCD Transfer Attributes */
-#define KINETIS_DMA_TCD8_NBYTES_OFFSET    0x0108 /* TCD Minor Byte Count */
-#define KINETIS_DMA_TCD8_SLAST_OFFSET     0x010c /* TCD Last Source Address Adjustment */
-#define KINETIS_DMA_TCD8_DADDR_OFFSET     0x0110 /* TCD Destination Address */
-#define KINETIS_DMA_TCD8_DOFF_OFFSET      0x0114 /* TCD Signed Destination Address Offset */
-#define KINETIS_DMA_TCD8_CITER_OFFSET     0x0116 /* TCD Current Minor Loop Link, Major Loop Count */
-#define KINETIS_DMA_TCD8_DLASTSGA_OFFSET  0x0118 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
-#define KINETIS_DMA_TCD8_CSR_OFFSET       0x011c /* TCD Control and Status */
-#define KINETIS_DMA_TCD8_BITER_OFFSET     0x011e /* TCD Beginning Minor Loop Link, Major Loop Count */
-
-#define KINETIS_DMA_TCD9_SADDR_OFFSET     0x0120 /* TCD Source Address */
-#define KINETIS_DMA_TCD9_SOFF_OFFSET      0x0124 /* TCD Signed Source Address Offset */
-#define KINETIS_DMA_TCD9_ATTR_OFFSET      0x0126 /* TCD Transfer Attributes */
-#define KINETIS_DMA_TCD9_NBYTES_OFFSET    0x0128 /* TCD Minor Byte Count */
-#define KINETIS_DMA_TCD9_SLAST_OFFSET     0x012c /* TCD Last Source Address Adjustment */
-#define KINETIS_DMA_TCD9_DADDR_OFFSET     0x0130 /* TCD Destination Address */
-#define KINETIS_DMA_TCD9_DOFF_OFFSET      0x0134 /* TCD Signed Destination Address Offset */
-#define KINETIS_DMA_TCD9_CITER_OFFSET     0x0136 /* TCD Current Minor Loop Link, Major Loop Count */
-#define KINETIS_DMA_TCD9_DLASTSGA_OFFSET  0x0138 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
-#define KINETIS_DMA_TCD9_CSR_OFFSET       0x013c /* TCD Control and Status */
-#define KINETIS_DMA_TCD9_BITER_OFFSET     0x013e /* TCD Beginning Minor Loop Link, Major Loop Count */
-
-#define KINETIS_DMA_TCD10_SADDR_OFFSET    0x0140 /* TCD Source Address */
-#define KINETIS_DMA_TCD10_SOFF_OFFSET     0x0144 /* TCD Signed Source Address Offset */
-#define KINETIS_DMA_TCD10_ATTR_OFFSET     0x0146 /* TCD Transfer Attributes */
-#define KINETIS_DMA_TCD10_NBYTES_OFFSET   0x0148 /* TCD Minor Byte Count */
-#define KINETIS_DMA_TCD10_SLAST_OFFSET    0x014c /* TCD Last Source Address Adjustment */
-#define KINETIS_DMA_TCD10_DADDR_OFFSET    0x0150 /* TCD Destination Address */
-#define KINETIS_DMA_TCD10_DOFF_OFFSET     0x0154 /* TCD Signed Destination Address Offset */
-#define KINETIS_DMA_TCD10_CITER_OFFSET    0x0156 /* TCD Current Minor Loop Link, Major Loop Count */
-#define KINETIS_DMA_TCD10_DLASTSGA_OFFSET 0x0158 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
-#define KINETIS_DMA_TCD10_CSR_OFFSET      0x015c /* TCD Control and Status */
-#define KINETIS_DMA_TCD10_BITER_OFFSET    0x015e /* TCD Beginning Minor Loop Link, Major Loop Count */
-
-#define KINETIS_DMA_TCD11_SADDR_OFFSET    0x0160 /* TCD Source Address */
-#define KINETIS_DMA_TCD11_SOFF_OFFSET     0x0164 /* TCD Signed Source Address Offset */
-#define KINETIS_DMA_TCD11_ATTR_OFFSET     0x0166 /* TCD Transfer Attributes */
-#define KINETIS_DMA_TCD11_NBYTES_OFFSET   0x0168 /* TCD Minor Byte Count */
-#define KINETIS_DMA_TCD11_SLAST_OFFSET    0x016c /* TCD Last Source Address Adjustment */
-#define KINETIS_DMA_TCD11_DADDR_OFFSET    0x0170 /* TCD Destination Address */
-#define KINETIS_DMA_TCD11_DOFF_OFFSET     0x0174 /* TCD Signed Destination Address Offset */
-#define KINETIS_DMA_TCD11_CITER_OFFSET    0x0176 /* TCD Current Minor Loop Link, Major Loop Count */
-#define KINETIS_DMA_TCD11_DLASTSGA_OFFSET 0x0178 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
-#define KINETIS_DMA_TCD11_CSR_OFFSET      0x017c /* TCD Control and Status */
-#define KINETIS_DMA_TCD11_BITER_OFFSET    0x017e /* TCD Beginning Minor Loop Link, Major Loop Count */
-
-#define KINETIS_DMA_TCD12_SADDR_OFFSET    0x0180 /* TCD Source Address */
-#define KINETIS_DMA_TCD12_SOFF_OFFSET     0x0184 /* TCD Signed Source Address Offset */
-#define KINETIS_DMA_TCD12_ATTR_OFFSET     0x0186 /* TCD Transfer Attributes */
-#define KINETIS_DMA_TCD12_NBYTES_OFFSET   0x0188 /* TCD Minor Byte Count */
-#define KINETIS_DMA_TCD12_SLAST_OFFSET    0x018c /* TCD Last Source Address Adjustment */
-#define KINETIS_DMA_TCD12_DADDR_OFFSET    0x0190 /* TCD Destination Address */
-#define KINETIS_DMA_TCD12_DOFF_OFFSET     0x0194 /* TCD Signed Destination Address Offset */
-#define KINETIS_DMA_TCD12_CITER_OFFSET    0x0196 /* TCD Current Minor Loop Link, Major Loop Count */
-#define KINETIS_DMA_TCD12_DLASTSGA_OFFSET 0x0198 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
-#define KINETIS_DMA_TCD12_CSR_OFFSET      0x019c /* TCD Control and Status */
-#define KINETIS_DMA_TCD12_BITER_OFFSET    0x019e /* TCD Beginning Minor Loop Link, Major Loop Count */
-
-#define KINETIS_DMA_TCD13_SADDR_OFFSET    0x01a0 /* TCD Source Address */
-#define KINETIS_DMA_TCD13_SOFF_OFFSET     0x01a4 /* TCD Signed Source Address Offset */
-#define KINETIS_DMA_TCD13_ATTR_OFFSET     0x01a6 /* TCD Transfer Attributes */
-#define KINETIS_DMA_TCD13_NBYTES_OFFSET   0x01a8 /* TCD Minor Byte Count */
-#define KINETIS_DMA_TCD13_SLAST_OFFSET    0x01ac /* TCD Last Source Address Adjustment */
-#define KINETIS_DMA_TCD13_DADDR_OFFSET    0x01b0 /* TCD Destination Address */
-#define KINETIS_DMA_TCD13_DOFF_OFFSET     0x01b4 /* TCD Signed Destination Address Offset */
-#define KINETIS_DMA_TCD13_CITER_OFFSET    0x01b6 /* TCD Current Minor Loop Link, Major Loop Count */
-#define KINETIS_DMA_TCD13_DLASTSGA_OFFSET 0x01b8 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
-#define KINETIS_DMA_TCD13_CSR_OFFSET      0x01bc /* TCD Control and Status */
-#define KINETIS_DMA_TCD13_BITER_OFFSET    0x01be /* TCD Beginning Minor Loop Link, Major Loop Count */
-
-#define KINETIS_DMA_TCD14_SADDR_OFFSET    0x01c0 /* TCD Source Address */
-#define KINETIS_DMA_TCD14_SOFF_OFFSET     0x01c4 /* TCD Signed Source Address Offset */
-#define KINETIS_DMA_TCD14_ATTR_OFFSET     0x01c6 /* TCD Transfer Attributes */
-#define KINETIS_DMA_TCD14_NBYTES_OFFSET   0x01c8 /* TCD Minor Byte Count */
-#define KINETIS_DMA_TCD14_SLAST_OFFSET    0x01cc /* TCD Last Source Address Adjustment */
-#define KINETIS_DMA_TCD14_DADDR_OFFSET    0x01d0 /* TCD Destination Address */
-#define KINETIS_DMA_TCD14_DOFF_OFFSET     0x01d4 /* TCD Signed Destination Address Offset */
-#define KINETIS_DMA_TCD14_CITER_OFFSET    0x01d6 /* TCD Current Minor Loop Link, Major Loop Count */
-#define KINETIS_DMA_TCD14_DLASTSGA_OFFSET 0x01d8 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
-#define KINETIS_DMA_TCD14_CSR_OFFSET      0x01dc /* TCD Control and Status */
-#define KINETIS_DMA_TCD14_BITER_OFFSET    0x01de /* TCD Beginning Minor Loop Link, Major Loop Count */
-
-#define KINETIS_DMA_TCD15_SADDR_OFFSET    0x01e0 /* TCD Source Address */
-#define KINETIS_DMA_TCD15_SOFF_OFFSET     0x01e4 /* TCD Signed Source Address Offset */
-#define KINETIS_DMA_TCD15_ATTR_OFFSET     0x01e6 /* TCD Transfer Attributes */
-#define KINETIS_DMA_TCD15_NBYTES_OFFSET   0x01e8 /* TCD Minor Byte Count */
-#define KINETIS_DMA_TCD15_SLAST_OFFSET    0x01ec /* TCD Last Source Address Adjustment */
-#define KINETIS_DMA_TCD15_DADDR_OFFSET    0x01f0 /* TCD Destination Address */
-#define KINETIS_DMA_TCD15_DOFF_OFFSET     0x01f4 /* TCD Signed Destination Address Offset */
-#define KINETIS_DMA_TCD15_CITER_OFFSET    0x01f6 /* TCD Current Minor Loop Link, Major Loop Count */
-#define KINETIS_DMA_TCD15_DLASTSGA_OFFSET 0x01f8 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
-#define KINETIS_DMA_TCD15_CSR_OFFSET      0x01fc /* TCD Control and Status */
-#define KINETIS_DMA_TCD15_BITER_OFFSET    0x01fe /* TCD Beginning Minor Loop Link, Major Loop Count */
-
-/* Register Addresses *******************************************************************************/
-
-#define KINETIS_DMA_CR                    (KINETIS_DMAC_BASE+KINETIS_DMA_CR_OFFSET)
-#define KINETIS_DMA_ES                    (KINETIS_DMAC_BASE+KINETIS_DMA_ES_OFFSET)
-#define KINETIS_DMA_ERQ                   (KINETIS_DMAC_BASE+KINETIS_DMA_ERQ_OFFSET)
-#define KINETIS_DMA_EEI                   (KINETIS_DMAC_BASE+KINETIS_DMA_EEI_OFFSET)
-#define KINETIS_DMA_CEEI                  (KINETIS_DMAC_BASE+KINETIS_DMA_CEEI_OFFSET)
-#define KINETIS_DMA_SEEI                  (KINETIS_DMAC_BASE+KINETIS_DMA_SEEI_OFFSET)
-#define KINETIS_DMA_CERQ                  (KINETIS_DMAC_BASE+KINETIS_DMA_CERQ_OFFSET)
-#define KINETIS_DMA_SERQ                  (KINETIS_DMAC_BASE+KINETIS_DMA_SERQ_OFFSET)
-#define KINETIS_DMA_CDNE                  (KINETIS_DMAC_BASE+KINETIS_DMA_CDNE_OFFSET)
-#define KINETIS_DMA_SSRT                  (KINETIS_DMAC_BASE+KINETIS_DMA_SSRT_OFFSET)
-#define KINETIS_DMA_CERR                  (KINETIS_DMAC_BASE+KINETIS_DMA_CERR_OFFSET)
-#define KINETIS_DMA_CINT                  (KINETIS_DMAC_BASE+KINETIS_DMA_CINT_OFFSET)
-#define KINETIS_DMA_INT                   (KINETIS_DMAC_BASE+KINETIS_DMA_INT_OFFSET)
-#define KINETIS_DMA_ERR                   (KINETIS_DMAC_BASE+KINETIS_DMA_ERR_OFFSET)
-#define KINETIS_DMA_HRS                   (KINETIS_DMAC_BASE+KINETIS_DMA_HRS_OFFSET)
-
-#define KINETIS_DMA_DCHPRI3               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI3_OFFSET)
-#define KINETIS_DMA_DCHPRI2               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI2_OFFSET)
-#define KINETIS_DMA_DCHPRI1               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI1_OFFSET)
-#define KINETIS_DMA_DCHPRI0               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI0_OFFSET)
-#define KINETIS_DMA_DCHPRI7               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI7_OFFSET)
-#define KINETIS_DMA_DCHPRI6               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI6_OFFSET)
-#define KINETIS_DMA_DCHPRI5               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI5_OFFSET)
-#define KINETIS_DMA_DCHPRI4               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI4_OFFSET)
-#define KINETIS_DMA_DCHPRI11              (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI11_OFFSET)
-#define KINETIS_DMA_DCHPRI10              (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI10_OFFSET)
-#define KINETIS_DMA_DCHPRI9               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI9_OFFSET)
-#define KINETIS_DMA_DCHPRI8               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI8_OFFSET)
-#define KINETIS_DMA_DCHPRI15              (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI15_OFFSET)
-#define KINETIS_DMA_DCHPRI14              (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI14_OFFSET)
-#define KINETIS_DMA_DCHPRI13              (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI13_OFFSET)
-#define KINETIS_DMA_DCHPRI12              (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI12_OFFSET)
-
-#define KINETIS_DMA_TCD_BASE(n)           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD_OFFSET(n))
-
-#define KINETIS_DMA_TCD_SADDR(n)          (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_SADDR_OFFSET)
-#define KINETIS_DMA_TCD_SOFF(n)           (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_SOFF_OFFSET)
-#define KINETIS_DMA_TCD_ATTR(n)           (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_ATTR_OFFSET)
-#define KINETIS_DMA_TCD_NBYTES(n)         (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_NBYTES_OFFSET)
-#define KINETIS_DMA_TCD_SLAST(n)          (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_SLAST_OFFSET)
-#define KINETIS_DMA_TCD_DADDR(n)          (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_DADDR_OFFSET)
-#define KINETIS_DMA_TCD_DOFF(n)           (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_DOFF_OFFSET)
-#define KINETIS_DMA_TCD_CITER(n)          (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_CITER_OFFSET)
-#define KINETIS_DMA_TCD_DLASTSGA(n)       (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_DLASTSGA_OFFSET)
-#define KINETIS_DMA_TCD_CSR(n)            (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_CSR_OFFSET)
-#define KINETIS_DMA_TCD_BITER(n)          (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_BITER_OFFSET)
-
-#define KINETIS_DMA_TCD0_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_SADDR_OFFSET)
-#define KINETIS_DMA_TCD0_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_SOFF_OFFSET)
-#define KINETIS_DMA_TCD0_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_ATTR_OFFSET)
-#define KINETIS_DMA_TCD0_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_NBYTES_OFFSET)
-#define KINETIS_DMA_TCD0_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_SLAST_OFFSET)
-#define KINETIS_DMA_TCD0_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_DADDR_OFFSET)
-#define KINETIS_DMA_TCD0_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_DOFF_OFFSET)
-#define KINETIS_DMA_TCD0_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_CITER_OFFSET)
-#define KINETIS_DMA_TCD0_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_DLASTSGA_OFFSET)
-#define KINETIS_DMA_TCD0_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_CSR_OFFSET)
-#define KINETIS_DMA_TCD0_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_BITER_OFFSET)
-
-#define KINETIS_DMA_TCD1_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_SADDR_OFFSET)
-#define KINETIS_DMA_TCD1_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_SOFF_OFFSET)
-#define KINETIS_DMA_TCD1_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_ATTR_OFFSET)
-#define KINETIS_DMA_TCD1_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_NBYTES_OFFSET)
-#define KINETIS_DMA_TCD1_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_SLAST_OFFSET)
-#define KINETIS_DMA_TCD1_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_DADDR_OFFSET)
-#define KINETIS_DMA_TCD1_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_DOFF_OFFSET)
-#define KINETIS_DMA_TCD1_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_CITER_OFFSET)
-#define KINETIS_DMA_TCD1_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_DLASTSGA_OFFSET)
-#define KINETIS_DMA_TCD1_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_CSR_OFFSET)
-#define KINETIS_DMA_TCD1_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_BITER_OFFSET)
-
-#define KINETIS_DMA_TCD2_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_SADDR_OFFSET)
-#define KINETIS_DMA_TCD2_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_SOFF_OFFSET)
-#define KINETIS_DMA_TCD2_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_ATTR_OFFSET)
-#define KINETIS_DMA_TCD2_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_NBYTES_OFFSET)
-#define KINETIS_DMA_TCD2_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_SLAST_OFFSET)
-#define KINETIS_DMA_TCD2_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_DADDR_OFFSET)
-#define KINETIS_DMA_TCD2_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_DOFF_OFFSET)
-#define KINETIS_DMA_TCD2_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_CITER_OFFSET)
-#define KINETIS_DMA_TCD2_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_DLASTSGA_OFFSET)
-#define KINETIS_DMA_TCD2_CSR_             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_CSR_OFFSET)
-#define KINETIS_DMA_TCD2_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_BITER_OFFSET)
-
-#define KINETIS_DMA_TCD3_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_SADDR_OFFSET)
-#define KINETIS_DMA_TCD3_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_SOFF_OFFSET)
-#define KINETIS_DMA_TCD3_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_ATTR_OFFSET)
-#define KINETIS_DMA_TCD3_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_NBYTES_OFFSET)
-#define KINETIS_DMA_TCD3_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_SLAST_OFFSET)
-#define KINETIS_DMA_TCD3_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_DADDR_OFFSET)
-#define KINETIS_DMA_TCD3_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_DOFF_OFFSET)
-#define KINETIS_DMA_TCD3_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_CITER_OFFSET)
-#define KINETIS_DMA_TCD3_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_DLASTSGA_OFFSET
-#define KINETIS_DMA_TCD3_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_CSR_OFFSET)
-#define KINETIS_DMA_TCD3_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_BITER_OFFSET)
-
-#define KINETIS_DMA_TCD4_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_SADDR_OFFSET)
-#define KINETIS_DMA_TCD4_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_SOFF_OFFSET)
-#define KINETIS_DMA_TCD4_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_ATTR_OFFSET0)
-#define KINETIS_DMA_TCD4_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_NBYTES_OFFSET)
-#define KINETIS_DMA_TCD4_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_SLAST_OFFSET)
-#define KINETIS_DMA_TCD4_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_DADDR_OFFSET)
-#define KINETIS_DMA_TCD4_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_DOFF_OFFSET)
-#define KINETIS_DMA_TCD4_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_CITER_OFFSET)
-#define KINETIS_DMA_TCD4_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_DLASTSGA_OFFSET)
-#define KINETIS_DMA_TCD4_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_CSR_OFFSET)
-#define KINETIS_DMA_TCD4_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_BITER_OFFSET)
-
-#define KINETIS_DMA_TCD5_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_SADDR_OFFSET)
-#define KINETIS_DMA_TCD5_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_SOFF_OFFSET)
-#define KINETIS_DMA_TCD5_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_ATTR_OFFSET)
-#define KINETIS_DMA_TCD5_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_NBYTES_OFFSET)
-#define KINETIS_DMA_TCD5_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_SLAST_OFFSET)
-#define KINETIS_DMA_TCD5_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_DADDR_OFFSET)
-#define KINETIS_DMA_TCD5_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_DOFF_OFFSET)
-#define KINETIS_DMA_TCD5_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_CITER_OFFSET)
-#define KINETIS_DMA_TCD5_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_DLASTSGA_OFFSET)
-#define KINETIS_DMA_TCD5_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_CSR_OFFSET)
-#define KINETIS_DMA_TCD5_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_BITER_OFFSET)
-
-#define KINETIS_DMA_TCD6_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_SADDR_OFFSET)
-#define KINETIS_DMA_TCD6_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_SOFF_OFFSET)
-#define KINETIS_DMA_TCD6_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_ATTR_OFFSET)
-#define KINETIS_DMA_TCD6_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_NBYTES_OFFSET)
-#define KINETIS_DMA_TCD6_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_SLAST_OFFSET)
-#define KINETIS_DMA_TCD6_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_DADDR_OFFSET)
-#define KINETIS_DMA_TCD6_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_DOFF_OFFSET)
-#define KINETIS_DMA_TCD6_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_CITER_OFFSET)
-#define KINETIS_DMA_TCD6_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_DLASTSGA_OFFSET)
-#define KINETIS_DMA_TCD6_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_CSR_OFFSET)
-#define KINETIS_DMA_TCD6_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_BITER_OFFSET)
-
-#define KINETIS_DMA_TCD7_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_SADDR_OFFSET)
-#define KINETIS_DMA_TCD7_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_SOFF_OFFSET)
-#define KINETIS_DMA_TCD7_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_ATTR_OFFSET)
-#define KINETIS_DMA_TCD7_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_NBYTES_OFFSET)
-#define KINETIS_DMA_TCD7_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_SLAST_OFFSET)
-#define KINETIS_DMA_TCD7_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_DADDR_OFFSET)
-#define KINETIS_DMA_TCD7_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_DOFF_OFFSET)
-#define KINETIS_DMA_TCD7_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_CITER_OFFSET)
-#define KINETIS_DMA_TCD7_DLASTSGA_        (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_DLASTSGA_OFFSET)
-#define KINETIS_DMA_TCD7_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_CSR_OFFSET)
-#define KINETIS_DMA_TCD7_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_BITER_OFFSET)
-
-#define KINETIS_DMA_TCD8_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_SADDR_OFFSET)
-#define KINETIS_DMA_TCD8_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_SOFF_OFFSET)
-#define KINETIS_DMA_TCD8_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_ATTR_OFFSET)
-#define KINETIS_DMA_TCD8_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_NBYTES_OFFSET)
-#define KINETIS_DMA_TCD8_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_SLAST_OFFSET)
-#define KINETIS_DMA_TCD8_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_DADDR_OFFSET)
-#define KINETIS_DMA_TCD8_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_DOFF_OFFSET)
-#define KINETIS_DMA_TCD8_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_CITER_OFFSET)
-#define KINETIS_DMA_TCD8_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_DLASTSGA_OFFSET)
-#define KINETIS_DMA_TCD8_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_CSR_OFFSET)
-#define KINETIS_DMA_TCD8_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_BITER_OFFSET)
-
-#define KINETIS_DMA_TCD9_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_SADDR_OFFSET)
-#define KINETIS_DMA_TCD9_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_SOFF_OFFSET)
-#define KINETIS_DMA_TCD9_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_ATTR_OFFSET)
-#define KINETIS_DMA_TCD9_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_NBYTES_OFFSET)
-#define KINETIS_DMA_TCD9_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_SLAST_OFFSET)
-#define KINETIS_DMA_TCD9_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_DADDR_OFFSET)
-#define KINETIS_DMA_TCD9_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_DOFF_OFFSET)
-#define KINETIS_DMA_TCD9_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_CITER_OFFSET)
-#define KINETIS_DMA_TCD9_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_DLASTSGA_OFFSET)
-#define KINETIS_DMA_TCD9_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_CSR_OFFSET)
-#define KINETIS_DMA_TCD9_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_BITER_OFFSET)
-
-#define KINETIS_DMA_TCD10_SADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_SADDR_OFFSET)
-#define KINETIS_DMA_TCD10_SOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_SOFF_OFFSET)
-#define KINETIS_DMA_TCD10_ATTR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_ATTR_OFFSET)
-#define KINETIS_DMA_TCD10_NBYTES          (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_NBYTES_OFFSET)
-#define KINETIS_DMA_TCD10_SLAST           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_SLAST_OFFSET)
-#define KINETIS_DMA_TCD10_DADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_DADDR_OFFSET)
-#define KINETIS_DMA_TCD10_DOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_DOFF_OFFSET)
-#define KINETIS_DMA_TCD10_CITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_CITER_OFFSET)
-#define KINETIS_DMA_TCD10_DLASTSGA        (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_DLASTSGA_OFFSET)
-#define KINETIS_DMA_TCD10_CSR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_CSR_OFFSET)
-#define KINETIS_DMA_TCD10_BITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_BITER_OFFSET)
-
-#define KINETIS_DMA_TCD11_SADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_SADDR_OFFSET)
-#define KINETIS_DMA_TCD11_SOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_SOFF_OFFSET)
-#define KINETIS_DMA_TCD11_ATTR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_ATTR_OFFSET)
-#define KINETIS_DMA_TCD11_NBYTES          (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_NBYTES_OFFSET)
-#define KINETIS_DMA_TCD11_SLAST           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_SLAST_OFFSET)
-#define KINETIS_DMA_TCD11_DADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_DADDR_OFFSET)
-#define KINETIS_DMA_TCD11_DOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_DOFF_OFFSET)
-#define KINETIS_DMA_TCD11_CITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_CITER_OFFSET)
-#define KINETIS_DMA_TCD11_DLASTSGA        (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_DLASTSGA_OFFSET)
-#define KINETIS_DMA_TCD11_CSR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_CSR_OFFSET)
-#define KINETIS_DMA_TCD11_BITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_BITER_OFFSET)
-
-#define KINETIS_DMA_TCD12_SADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_SADDR_OFFSET)
-#define KINETIS_DMA_TCD12_SOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_SOFF_OFFSET)
-#define KINETIS_DMA_TCD12_ATTR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_ATTR_OFFSET)
-#define KINETIS_DMA_TCD12_NBYTES          (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_NBYTES_OFFSET)
-#define KINETIS_DMA_TCD12_SLAST           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_SLAST_OFFSET)
-#define KINETIS_DMA_TCD12_DADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_DADDR_OFFSET)
-#define KINETIS_DMA_TCD12_DOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_DOFF_OFFSET)
-#define KINETIS_DMA_TCD12_CITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_CITER_OFFSET)
-#define KINETIS_DMA_TCD12_DLASTSGA        (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_DLASTSGA_OFFSET)
-#define KINETIS_DMA_TCD12_CSR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_CSR_OFFSET)
-#define KINETIS_DMA_TCD12_BITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_BITER_OFFSET)
-
-#define KINETIS_DMA_TCD13_SADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_SADDR_OFFSET)
-#define KINETIS_DMA_TCD13_SOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_SOFF_OFFSET)
-#define KINETIS_DMA_TCD13_ATTR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_ATTR_OFFSET)
-#define KINETIS_DMA_TCD13_NBYTES          (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_NBYTES_OFFSET)
-#define KINETIS_DMA_TCD13_SLAST           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_SLAST_OFFSET)
-#define KINETIS_DMA_TCD13_DADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_DADDR_OFFSET)
-#define KINETIS_DMA_TCD13_DOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_DOFF_OFFSET)
-#define KINETIS_DMA_TCD13_CITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_CITER_OFFSET)
-#define KINETIS_DMA_TCD13_DLASTSGA        (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_DLASTSGA_OFFSET)
-#define KINETIS_DMA_TCD13_CSR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_CSR_OFFSET)
-#define KINETIS_DMA_TCD13_BITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_BITER_OFFSET)
-
-#define KINETIS_DMA_TCD14_SADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_SADDR_OFFSET)
-#define KINETIS_DMA_TCD14_SOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_SOFF_OFFSET)
-#define KINETIS_DMA_TCD14_ATTR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_ATTR_OFFSET)
-#define KINETIS_DMA_TCD14_NBYTES          (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_NBYTES_OFFSET)
-#define KINETIS_DMA_TCD14_SLAST           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_SLAST_OFFSET)
-#define KINETIS_DMA_TCD14_DADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_DADDR_OFFSET)
-#define KINETIS_DMA_TCD14_DOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_DOFF_OFFSET)
-#define KINETIS_DMA_TCD14_CITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_CITER_OFFSET)
-#define KINETIS_DMA_TCD14_DLASTSGA        (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_DLASTSGA_OFFSET)
-#define KINETIS_DMA_TCD14_CSR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_CSR_OFFSET)
-#define KINETIS_DMA_TCD14_BITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_BITER_OFFSET)
-
-#define KINETIS_DMA_TCD15_SADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_SADDR_OFFSET)
-#define KINETIS_DMA_TCD15_SOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_SOFF_OFFSET)
-#define KINETIS_DMA_TCD15_ATTR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_ATTR_OFFSET)
-#define KINETIS_DMA_TCD15_NBYTES          (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_NBYTES_OFFSET)
-#define KINETIS_DMA_TCD15_SLAST           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_SLAST_OFFSET)
-#define KINETIS_DMA_TCD15_DADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_DADDR_OFFSET)
-#define KINETIS_DMA_TCD15_DOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_DOFF_OFFSET)
-#define KINETIS_DMA_TCD15_CITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_CITER_OFFSET)
-#define KINETIS_DMA_TCD15_DLASTSGA        (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_DLASTSGA_OFFSET)
-#define KINETIS_DMA_TCD15_CSR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_CSR_OFFSET)
-#define KINETIS_DMA_TCD15_BITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_BITER_OFFSET)
-
-/* Register Bit Definitions *************************************************************************/
-
-/* Control Register (32-bit) */
-                                                    /* Bit 0:  Reserved */
-#define DMA_CR_EDBG                       (1 << 1)  /* Bit 1:  Enable debug */
-#define DMA_CR_ERCA                       (1 << 2)  /* Bit 2:  Enable round robin channel arbitration */
-                                                    /* Bit 3:  Reserved */
-#define DMA_CR_HOE                        (1 << 4)  /* Bit 4:  Halt on error */
-#define DMA_CR_HALT                       (1 << 5)  /* Bit 5:  Halt DMA operations */
-#define DMA_CR_CLM                        (1 << 6)  /* Bit 6:  Continuous link mode */
-#define DMA_CR_EMLM                       (1 << 7)  /* Bit 7:  Enable minor loop mapping */
-                                                    /* Bits 8-15: Reserved */
-#define DMA_CR_ECX                        (1 << 16) /* Bit 16: Error cancel transfer */
-#define DMA_CR_CX                         (1 << 17) /* Bit 17: Cancel transfer */
-                                                    /* Bits 18-31: Reserved */
-/* Error Status Register */
-
-#define DMA_ES_DBE                        (1 << 0)  /* Bit 0:  Destination bus error */
-#define DMA_ES_SBE                        (1 << 1)  /* Bit 1:  Source bus error */
-#define DMA_ES_SGE                        (1 << 2)  /* Bit 2:  Scatter/gather configuration error */
-#define DMA_ES_NCE                        (1 << 3)  /* Bit 3:  NBYTES/CITER configuration error */
-#define DMA_ES_DOE                        (1 << 4)  /* Bit 4:  Destination offset error */
-#define DMA_ES_DAE                        (1 << 5)  /* Bit 5:  Destination address error */
-#define DMA_ES_SOE                        (1 << 6)  /* Bit 6:  Source offset error */
-#define DMA_ES_SAE                        (1 << 7)  /* Bit 7:  Source address error */
-#define DMA_ES_ERRCHN_SHIFT               (8)       /* Bits 8-11: Error channel number or cancelled channel number */
-#define DMA_ES_ERRCHN_MASK                (15 << DMA_ES_ERRCHN_SHIFT)
-                                                    /* Bits 12-13: Reserved */
-#define DMA_ES_CPE                        (1 << 14) /* Bit 14:  Channel priority error */
-                                                    /* Bit 15: Reserved */
-#define DMA_ES_ECX                        (1 << 16) /* Bit 16:  Transfer cancelled */
-                                                    /* Bits 17-30: Reserved */
-#define DMA_ES_VLD                        (1 << 31) /* Bit 31:  Logical OR of all ERR status bits */
-
-/* Enable Request Register, Enable Error Interrupt Register, Interrupt Request Register,  Error
- * Register, Hardware Request Status Register common bit definitions (32-bit, except for Error
- * Register which is 16-bit)
- */
-
-#define DMA_REQ(n)                        (1 << (n)) /* Bit n: DMA Request n */
-#define DMA_REQ0                          (1 << 0)  /* Bit 0:  DMA Request 0 */
-#define DMA_REQ1                          (1 << 1)  /* Bit 1:  DMA Request 1 */
-#define DMA_REQ2                          (1 << 2)  /* Bit 2:  DMA Request 2 */
-#define DMA_REQ3                          (1 << 3)  /* Bit 3:  DMA Request 3 */
-#define DMA_REQ4                          (1 << 4)  /* Bit 4:  DMA Request 4 */
-#define DMA_REQ5                          (1 << 5)  /* Bit 5:  DMA Request 5 */
-#define DMA_REQ6                          (1 << 6)  /* Bit 6:  DMA Request 6 */
-#define DMA_REQ7                          (1 << 7)  /* Bit 7:  DMA Request 7 */
-#define DMA_REQ8                          (1 << 8)  /* Bit 8:  DMA Request 8 */
-#define DMA_REQ9                          (1 << 9)  /* Bit 9:  DMA Request 9 */
-#define DMA_REQ10                         (1 << 10) /* Bit 10: DMA Request 10 */
-#define DMA_REQ11                         (1 << 11) /* Bit 11: DMA Request 11 */
-#define DMA_REQ12                         (1 << 12) /* Bit 12: DMA Request 12 */
-#define DMA_REQ13                         (1 << 13) /* Bit 13: DMA Request 13 */
-#define DMA_REQ14                         (1 << 14) /* Bit 14: DMA Request 14 */
-#define DMA_REQ15                         (1 << 15) /* Bit 15: DMA Request 15 */
-                                                    /* Bits 16-31: Reserved */
-/* Clear Enable Error Interrupt Register (8-bit) */
-
-#define DMA_CEEI_SHIFT                    (0)       /* Bits 0-3: Clear enable error interrupt */
-#define DMA_CEEI_MASK                     (15 << DMA_CEEI_SHIFT)
-                                                    /* Bits 4-5: Reserved */
-#define DMA_CEEI_CAEE                     (1 << 6)  /* Bit 6:  Clear all enable error interrupts */
-#define DMA_CEEI_NOP                      (1 << 7)  /* Bit 7:  No operation */
-
-/* Set Enable Error Interrupt Register (8-bit) */
-
-#define DMA_SEEI_SHIFT                    (0)       /* Bits 0-3: Set enable error interrupt */
-#define DMA_SEEI_MASK                     (15 << DMA_SEEI_SHIFT)
-                                                    /* Bits 4-5: Reserved */
-#define DMA_SEEI_SAEE                     (1 << 6)  /* Bit 6:  Set all enable error interrupts */
-#define DMA_SEEI_NOP                      (1 << 7)  /* Bit 7:  No operation */
-
-/* Clear Enable Request Register (8-bit) */
-
-#define DMA_CERQ_SHIFT                    (0)       /* Bits 0-3: Clear enable request */
-#define DMA_CERQ_MASK                     (15 << DMA_CERQ_SHIFT)
-                                                    /* Bits 4-5: Reserved */
-#define DMA_CERQ_CAER                     (1 << 6)  /* Bit 6:  Clear all enable requests */
-#define DMA_CERQ_NOP                      (1 << 7)  /* Bit 7:  No operation */
-
-/* Set Enable Request Register (8-bit) */
-
-#define DMA_SERQ_SHIFT                    (0)       /* Bits 0-3: Set enable request */
-#define DMA_SERQ_MASK                     (15 << DMA_SERQ_SHIFT)
-                                                    /* Bits 4-5: Reserved */
-#define DMA_SERQ_SAER                     (1 << 6)  /* Bit 6:  Set all enable requests */
-#define DMA_SERQ_NOP                      (1 << 7)  /* Bit 7:  No operation */
-
-/* Clear DONE Status Bit Register (8-bit) */
-
-#define DMA_CDNE_SHIFT                    (0)       /* Bits 0-3: Clear DONE bit */
-#define DMA_CDNE_MASK                     (15 << DMA_CDNE_SHIFT)
-                                                    /* Bits 4-5: Reserved */
-#define DMA_CDNE_CADN                     (1 << 6)  /* Bit 6:  Clears all DONE bits */
-#define DMA_CDNE_NOP                      (1 << 7)  /* Bit 7:  No operation */
-
-/* Set START Bit Register (8-bit) */
-
-#define DMA_SSRT_SHIFT                    (0)       /* Bits 0-3: Set START bit */
-#define DMA_SSRT_MASK                     (15 << DMA_SSRT_SHIFT)
-                                                    /* Bits 4-5: Reserved */
-#define DMA_SSRT_SAST                     (1 << 6)  /* Bit 6:  Set all START bits (activates all channels) */
-#define DMA_SSRT_NOP                      (1 << 7)  /* Bit 7:  No operation */
-
-/* Clear Error Register (8-bit) */
-
-#define DMA_CERR_SHIFT                    (0)       /* Bits 0-3: Clear error indicator */
-#define DMA_CERR_MASK                     (15 << DMA_CERR_SHIFT)
-                                                    /* Bits 4-5: Reserved */
-#define DMA_CERR_CAEI                     (1 << 6)  /* Bit 6:  Clear all error indicators */
-#define DMA_CERR_NOP                      (1 << 7)  /* Bit 7:  No operation */
-
-/* Clear Interrupt Request Register (8-bit) */
-
-#define DMA_CINT_SHIFT                    (0)       /* Bits 0-3: Clear interrupt request */
-#define DMA_CINT_MASK                     (15 << DMA_CINT_SHIFT)
-                                                    /* Bits 4-5: Reserved */
-#define DMA_CINT_CAIR                     (1 << 6)  /* Bit 6:  Clear all interrupt requests */
-#define DMA_CINT_NOP                      (1 << 7)  /* Bit 7:  No operation */
-
-/* Channel n Priority Register (8-bit) */
-
-#define DMA_DCHPR_SHIFT                   (0)       /* Bits 0-3: Channel n arbitration priority */
-#define DMA_DCHPR_MASK                    (15 << DMA_DCHPR_SHIFT)
-                                                    /* Bits 4-5: Reserved */
-#define DMA_DCHPR_DPA                     (1 << 6)  /* Bit 6:  Disable preempt ability */
-#define DMA_DCHPR_ECP                     (1 << 7)  /* Bit 7:  Enable channel preemption */
-
-
-/* TCD Source Address.  32-bit address value. */
-/* TCD Signed Source Address Offset.  32-bit offset value. */
-
-/* TCD Transfer Attributes (16-bit) */
-
-#define DMA_TCD_ATTR_DSIZE_SHIFT          (0)       /* Bits 0-2: Destination data transfer size */
-#define DMA_TCD_ATTR_DSIZE_MASK           (7 << DMA_TCD_ATTR_DSIZE_SHIFT)
-#  define DMA_TCD_ATTR_DSIZE_8BIT         (0 << DMA_TCD_ATTR_DSIZE_SHIFT) /* 8-bit */
-#  define DMA_TCD_ATTR_DSIZE_16BIT        (1 << DMA_TCD_ATTR_DSIZE_SHIFT) /* 16-bit */
-#  define DMA_TCD_ATTR_DSIZE_32BIT        (2 << DMA_TCD_ATTR_DSIZE_SHIFT) /* 32-bit */
-#  define DMA_TCD_ATTR_DSIZE_16BYTE       (4 << DMA_TCD_ATTR_DSIZE_SHIFT) /* 16-byte */
-#define DMA_TCD_ATTR_DMOD_SHIFT           (3)       /* Bits 3-7: Destination address modulo */
-#define DMA_TCD_ATTR_DMOD_MASK            (31 << DMA_TCD_ATTR_DMOD_SHIFT)
-#define DMA_TCD_ATTR_SSIZE_SHIFT          (8)       /* Bits 8-10: Source data transfer size */
-#define DMA_TCD_ATTR_SSIZE_MASK           (7 << DMA_TCD_ATTR_SSIZE_SHIFT)
-#  define DMA_TCD_ATTR_SSIZE_8BIT         (0 << DMA_TCD_ATTR_SSIZE_SHIFT) /* 8-bit */
-#  define DMA_TCD_ATTR_SSIZE_16BIT        (1 << DMA_TCD_ATTR_SSIZE_SHIFT) /* 16-bit */
-#  define DMA_TCD_ATTR_SSIZE_32BIT        (2 << DMA_TCD_ATTR_SSIZE_SHIFT) /* 32-bit */
-#  define DMA_TCD_ATTR_SSIZE_16BYTE       (4 << DMA_TCD_ATTR_SSIZE_SHIFT) /* 16-byte */
-#define DMA_TCD_ATTR_SMOD_SHIFT           (11)      /* Bits 11-15: Source address modulo */
-#define DMA_TCD_ATTR_SMOD_MASK            (31 << DMA_TCD_ATTR_SMOD_SHIFT)
-
-/* TCD Minor Byte Count.
- * Case 1: Minor Loop Disabled.  In this case, the register holds a simple 32-bit count value.
- * Case 2: Minor Loop Enabled and Offset Disabled:
- */
-
-#define DMA_TCD_NBYTES2_SHIFT             (0)       /* Bits 0-29: Minor byte transfer count */
-#define DMA_TCD_NBYTES2_MASK              (0x3fffffff)
-#define DMA_TCD_NBYTES_DMLOE              (1 << 30) /* Bit 30: Destination minor loop offset enable (Case 2&3) */
-#define DMA_TCD_NBYTES_SMLOE              (1 << 31) /* Bit 31: Source minor loop offset enable (Case 2&3) */
-
-/* Case 3: (Minor Loop and Offset Enabled): */
-
-#define DMA_TCD_NBYTES3_SHIFT             (0)       /* Bits 0-9: Minor byte transfer count */
-#define DMA_TCD_NBYTES3_MASK              (0x3ff << DMA_TCD_NBYTES3_SHIFT)
-#define DMA_TCD_NBYTES_MLOFF_SHIFT        (10)      /* Bits 10-29: Sign-extended address offset */
-#define DMA_TCD_NBYTES_MLOFF_MASK         (0xfffff << DMA_TCD_NBYTES_MLOFF_SHIFT)
-                                                    /* Bit 30: Same as Case 2 */
-                                                    /* Bit 31: Same as Case 2 */
-
-/* TCD Last Source Address Adjustment. 32-bit address value. */
-/* TCD Destination Address. 32-bit address value. */
-/* TCD Signed Destination Address Offset. 32-bit offset value. */
-
-/* TCD Current Minor Loop Link, Major Loop Count. 16-bit.
- * Case 1:  Channel Linking Enabled:
- */
-
-#define DMA_TCD_CITER1_SHIFT              (0)       /* Bits 0-8: Current major iteration count */
-#define DMA_TCD_CITER1_MASK               (0x1ff << DMA_TCD_CITER1_SHIFT)
-#define DMA_TCD_CITER1_LINKCH_SHIFT       (9)       /* Bits 9-12: Link channel number */
-#define DMA_TCD_CITER1_LINKCH_MASK        (15 << DMA_TCD_CITER1_LINKCH_SHIFT)
-                                                    /* Bits 13-14: Reserved */
-#define DMA_TCD_CITER_ELINK               (1 << 15) /* Bit 15: Enable channel-to-channel linking on minor-loop complete (Case 1&2) */
-
-/* Case 2:  Channel Linking Disabled: */
-
-#define DMA_TCD_CITER2_SHIFT              (0)       /* Bits 0-14: Current major iteration count */
-#define DMA_TCD_CITER2_MASK               (0x7fff << DMA_TCD_CITER2_SHIFT)
-                                                    /* Bits 15: Same as Case 1 */
-
-/* TCD Last Destination Address Adjustment/Scatter Gather Address. 32-bit address value. */
-
-/* TCD Control and Status (16-bit) */
-
-#define DMA_TCD_CSR_START                 (1 << 0)  /* Bit 0:  Channel start */
-#define DMA_TCD_CSR_INTMAJOR              (1 << 1)  /* Bit 1:  Enable an interrupt when major iteration count completes */
-#define DMA_TCD_CSR_INTHALF               (1 << 2)  /* Bit 2:  Enable an interrupt when major counter is half complete */
-#define DMA_TCD_CSR_DREQ                  (1 << 3)  /* Bit 3:  Disable request */
-#define DMA_TCD_CSR_ESG                   (1 << 4)  /* Bit 4:  Enable scatter/gather processing */
-#define DMA_TCD_CSR_MAJORELINK            (1 << 5)  /* Bit 5:  Enable channel-to-channel linking on major loop complete */
-#define DMA_TCD_CSR_ACTIVE                (1 << 6)  /* Bit 6:  Channel active */
-#define DMA_TCD_CSR_DONE                  (1 << 7)  /* Bit 7:  Channel done */
-#define DMA_TCD_CSR_MAJORLINKCH_SHIFT     (8)       /* Bits 8-11: Link channel number */
-#define DMA_TCD_CSR_MAJORLINKCH_MASK      (15 << DMA_TCD_CSR_MAJORLINKCH_SHIFT)
-                                                    /* Bits 12-13: Reserved */
-#define DMA_TCD_CSR_BWC_SHIFT             (14)      /* Bits 14-15: Bandwidth control */
-#define DMA_TCD_CSR_BWC_MASK              (3 << DMA_TCD_CSR_BWC_SHIFT)
-#  define DMA_TCD_CSR_BWC_NOSTALLS        (0 << DMA_TCD_CSR_BWC_SHIFT) /* No eDMA engine stalls */
-#  define DMA_TCD_CSR_BWC_4CYCLES         (2 << DMA_TCD_CSR_BWC_SHIFT) /* eDMA engine stalls 4 cycles after each R/W */
-#  define DMA_TCD_CSR_BWC_8CYCLES         (3 << DMA_TCD_CSR_BWC_SHIFT) /* eDMA engine stalls 8 cycles after each R/W */
-
-/* TCD Beginning Minor Loop Link, Major Loop Count (16-bit).
- *
- * Case 1: Channel Linking Enabled:
- */
+#include "chip/kinetis_dma.h"
 
-#define DMA_TCD_BITER1_SHIFT              (0)       /* Bits 0-8: Starting major iteration count */
-#define DMA_TCD_BITER1_MASK               (0x1ff << DMA_TCD_BITER1_SHIFT)
-#define DMA_TCD_BITER1_LINKCH_SHIFT       (9)       /* Bits 9-12: Link channel number */
-#define DMA_TCD_BITER1_LINKCH_MASK        (15 << DMA_TCD_BITER1_LINKCH_SHIFT)
-                                                    /* Bits 13-14: Reserved */
-#define DMA_TCD_BITER_ELINK               (1 << 15) /* Bit 15: Enable channel-to-channel linking on minor-loop complete (Case 1&2) */
+/****************************************************************************
+ * Pre-processor Declarations
+ ****************************************************************************/
 
-/* Case 2: Channel Linking Disabled: */
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
 
-#define DMA_TCD_BITER2_SHIFT              (0)       /* Bits 0-14: Starting major iteration count */
-#define DMA_TCD_BITER2_MASK               (0x7fff << DMA_TCD_CITER2_SHIFT)
-                                                    /* Bits 15: Same as Case 1 */
+typedef FAR void *DMA_HANDLE;
+typedef void (*dma_callback_t)(DMA_HANDLE handle, void *arg, int result);
 
-/****************************************************************************************************
- * Public Types
- ****************************************************************************************************/
+/* The following is used for sampling DMA registers when CONFIG DEBUG_DMA is selected */
+
+#ifdef CONFIG_DEBUG_DMA
+struct kinetis_dmaglobalregs_s
+{
+#warning "Missing logic"
+  /* Global Registers */
+};
+
+struct kinetis_dmachanregs_s
+{
+#warning "Missing logic"
+  /* Channel Registers */
+};
+
+struct kinetis_dmaregs_s
+{
+  /* Global Registers */
 
-/****************************************************************************************************
+  struct kinetis_dmaglobalregs_s gbl;
+
+  /* Channel Registers */
+
+  struct kinetis_dmachanregs_s   ch;
+};
+#endif
+
+/****************************************************************************
  * Public Data
- ****************************************************************************************************/
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
 
-/****************************************************************************************************
+/************************************************************************************
  * Public Functions
- ****************************************************************************************************/
+ ************************************************************************************/
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_DMA_H */
+/****************************************************************************
+ * Name: kinetis_dmainitialize
+ *
+ * Description:
+ *   Initialize the GPDMA subsystem.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void kinetis_dmainitilaize(void);
+
+/****************************************************************************
+ * Name: kinetis_dmachannel
+ *
+ * Description:
+ *   Allocate a DMA channel.  This function sets aside a DMA channel and
+ *   gives the caller exclusive access to the DMA channel.
+ *
+ * Returned Value:
+ *   One success, this function returns a non-NULL, void* DMA channel
+ *   handle.  NULL is returned on any failure.  This function can fail only
+ *   if no DMA channel is available.
+ *
+ ****************************************************************************/
+
+DMA_HANDLE kinetis_dmachannel(void);
+
+/****************************************************************************
+ * Name: kinetis_dmafree
+ *
+ * Description:
+ *   Release a DMA channel.  NOTE:  The 'handle' used in this argument must
+ *   NEVER be used again until kinetis_dmachannel() is called again to re-gain
+ *   a valid handle.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void kinetis_dmafree(DMA_HANDLE handle);
+
+/****************************************************************************
+ * Name: kinetis_dmasetup
+ *
+ * Description:
+ *   Configure DMA for one transfer.
+ *
+ ****************************************************************************/
+
+int kinetis_dmarxsetup(DMA_HANDLE handle, uint32_t control, uint32_t config,
+                       uint32_t srcaddr, uint32_t destaddr, size_t nbytes);
+
+/****************************************************************************
+ * Name: kinetis_dmastart
+ *
+ * Description:
+ *   Start the DMA transfer
+ *
+ ****************************************************************************/
+
+int kinetis_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg);
+
+/****************************************************************************
+ * Name: kinetis_dmastop
+ *
+ * Description:
+ *   Cancel the DMA.  After kinetis_dmastop() is called, the DMA channel is
+ *   reset and kinetis_dmasetup() must be called before kinetis_dmastart() can be
+ *   called again
+ *
+ ****************************************************************************/
+
+void kinetis_dmastop(DMA_HANDLE handle);
+
+/****************************************************************************
+ * Name: kinetis_dmasample
+ *
+ * Description:
+ *   Sample DMA register contents
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEBUG_DMA
+void kinetis_dmasample(DMA_HANDLE handle, struct kinetis_dmaregs_s *regs);
+#else
+#  define kinetis_dmasample(handle,regs)
+#endif
+
+/****************************************************************************
+ * Name: kinetis_dmadump
+ *
+ * Description:
+ *   Dump previously sampled DMA register contents
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEBUG_DMA
+void kinetis_dmadump(DMA_HANDLE handle, const struct kinetis_dmaregs_s *regs,
+                     const char *msg);
+#else
+#  define kinetis_dmadump(handle,regs,msg)
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_KINETEIS_KINETEIS_DMA_H */
diff --git a/arch/arm/src/kinetis/kinetis_enet.c b/arch/arm/src/kinetis/kinetis_enet.c
index 0a05346055eec8c3f56a74d4437aa2baf93d0aa6..694b155734c5ef900e01cdc00e4e9ea41362f586 100644
--- a/arch/arm/src/kinetis/kinetis_enet.c
+++ b/arch/arm/src/kinetis/kinetis_enet.c
@@ -1,8 +1,9 @@
 /****************************************************************************
- * drivers/net/kinetis_enet.c
+ * arch/arm/src/kinetis/kinetis_enet.c
  *
- *   Copyright (C) 2011-2012, 2014-2016 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2011-2012, 2014-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -53,6 +54,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -65,10 +67,10 @@
 #include "chip.h"
 #include "kinetis.h"
 #include "kinetis_config.h"
-#include "kinetis_pinmux.h"
-#include "kinetis_sim.h"
-#include "kinetis_mpu.h"
-#include "kinetis_enet.h"
+#include "chip/kinetis_pinmux.h"
+#include "chip/kinetis_sim.h"
+#include "chip/kinetis_mpu.h"
+#include "chip/kinetis_enet.h"
 
 #if defined(KINETIS_NENET) && KINETIS_NENET > 0
 
@@ -76,29 +78,47 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_ENET_NETHIFS determines the number of physical interfaces
+/* If processing is not done at the interrupt level, then work queue support
+ * is required.
+ */
+
+#if !defined(CONFIG_SCHED_WORKQUEUE)
+#  error Work queue support is required
+#else
+
+  /* Select work queue */
+
+#  if defined(CONFIG_KINETIS_EMAC_HPWORK)
+#    define ETHWORK HPWORK
+#  elif defined(CONFIG_KINETIS_EMAC_LPWORK)
+#    define ETHWORK LPWORK
+#  else
+#    error Neither CONFIG_KINETIS_EMAC_HPWORK nor CONFIG_KINETIS_EMAC_LPWORK defined
+#  endif
+#endif
+
+/* CONFIG_KINETIS_ENETNETHIFS determines the number of physical interfaces
  * that will be supported.
  */
 
-#if CONFIG_ENET_NETHIFS != 1
-#  error "CONFIG_ENET_NETHIFS must be one for now"
+#if CONFIG_KINETIS_ENETNETHIFS != 1
+#  error "CONFIG_KINETIS_ENETNETHIFS must be one for now"
 #endif
 
-#if CONFIG_ENET_NTXBUFFERS < 1
+#if CONFIG_KINETIS_ENETNTXBUFFERS < 1
 #  error "Need at least one TX buffer"
 #endif
 
-#if CONFIG_ENET_NRXBUFFERS < 1
+#if CONFIG_KINETIS_ENETNRXBUFFERS < 1
 #  error "Need at least one RX buffer"
 #endif
 
-#define NENET_NBUFFERS (CONFIG_ENET_NTXBUFFERS+CONFIG_ENET_NRXBUFFERS)
-
-#ifndef CONFIG_NET_MULTIBUFFER
-#  error "CONFIG_NET_MULTIBUFFER is required in the configuration"
-#endif
+#define NENET_NBUFFERS \
+  (CONFIG_KINETIS_ENETNTXBUFFERS+CONFIG_KINETIS_ENETNRXBUFFERS)
 
-/* TX poll delay = 1 seconds. CLK_TCK is the number of clock ticks per second */
+/* TX poll delay = 1 seconds. CLK_TCK is the number of clock ticks per
+ * second.
+ */
 
 #define KINETIS_WDDELAY   (1*CLK_TCK)
 
@@ -107,29 +127,61 @@
 #define KINETIS_TXTIMEOUT (60*CLK_TCK)
 #define MII_MAXPOLLS      (0x1ffff)
 #define LINK_WAITUS       (500*1000)
-
-/* PHY hardware specifics.  This was copied from the FreeScale code examples.
- * this is a vendor specific register and bit settings.  I really should
- * do the research and find out what this really is.
+#define LINK_NLOOPS       (10)
+
+/* PHY definitions.
+ *
+ * The selected PHY must be selected from the drivers/net/Kconfig PHY menu.
+ * A description of the PHY must be provided here.  That description must
+ * include:
+ *
+ * 1. BOARD_PHY_NAME: A PHY name string (for debug output),
+ * 2. BOARD_PHYID1 and BOARD_PHYID2: The PHYID1 and PHYID2 values (from
+ *    include/nuttx/net/mii.h)
+ * 3. BOARD_PHY_STATUS:  The address of the status register to use when
+ *    querying link status (from include/nuttx/net/mii.h)
+ * 4. BOARD_PHY_ISDUPLEX:  A macro that can convert the status register
+ *    value into a boolean: true=duplex mode, false=half-duplex mode
+ * 5. BOARD_PHY_10BASET:  A macro that can convert the status register
+ *    value into a boolean: true=10Base-T, false=Not 10Base-T
+ * 6. BOARD_PHY_100BASET:  A macro that can convert the status register
+ *    value into a boolean: true=100Base-T, false=Not 100Base-T
+ *
+ * The Tower SER board uses a KSZ8041 PHY.
+ * The Freedom K64F board uses a KSZ8081 PHY
+ * The Freedom K66F board uses a KSZ8081 PHY
  */
 
-#define PHY_STATUS         (0x1f)
-#define PHY_DUPLEX_STATUS  (4 << 2)
-#define PHY_SPEED_STATUS   (1 << 2)
+#if defined(CONFIG_ETH0_PHY_KSZ8041)
+#  define BOARD_PHY_NAME        "KSZ8041"
+#  define BOARD_PHYID1          MII_PHYID1_KSZ8041
+#  define BOARD_PHYID2          MII_PHYID2_KSZ8041
+#  define BOARD_PHY_STATUS      MII_KSZ8041_PHYCTRL2
+#elif defined(CONFIG_ETH0_PHY_KSZ8081)
+#  define BOARD_PHY_NAME        "KSZ8081"
+#  define BOARD_PHYID1          MII_PHYID1_KSZ8081
+#  define BOARD_PHYID2          MII_PHYID2_KSZ8081
+#  define BOARD_PHY_STATUS      MII_KSZ8081_PHYCTRL2
+#else
+#  error "Unrecognized or missing PHY selection"
+#endif
+
+#define BOARD_PHY_10BASET(s)  (((s) & (1 << MII_PHYCTRL2_MODE_SHIFT)) != 0)
+#define BOARD_PHY_100BASET(s) (((s) & (2 << MII_PHYCTRL2_MODE_SHIFT)) != 0)
+#define BOARD_PHY_ISDUPLEX(s) (((s) & (4 << MII_PHYCTRL2_MODE_SHIFT)) != 0)
 
-/* Estimate the hold time to use based on the peripheral (bus) clock:
+/* Estimate the MII_SPEED in order to get an MDC close to 2.5MHz, 
+   based on the internal module (ENET) clock:
  *
- *   HOLD_TIME = (2*BUS_FREQ_MHZ)/5 + 1
- *             = (BUS_FREQ)/2500000 + 1
+ *   MII_SPEED = ENET_FREQ/5000000 -1
  *
- * For example, if BUS_FREQ_MHZ=48 (MHz):
+ * For example, if ENET_FREQ_MHZ=120 (MHz):
  *
- *   HOLD_TIME = 48Mhz, hold time clocks
- *             = 48000000/2500000 + 1
- *             = 20
+ *   MII_SPEED = 120000000/5000000 -1
+ *             = 23
  */
 
-#define KINETIS_MII_SPEED  (BOARD_BUS_FREQ/2500000 + 1)
+#define KINETIS_MII_SPEED  (BOARD_CORECLK_FREQ/5000000 - 1)
 #if KINETIS_MII_SPEED > 63
 #  error "KINETIS_MII_SPEED is out-of-range"
 #endif
@@ -147,6 +199,16 @@
 
 #define KINETIS_BUF_SIZE  ((CONFIG_NET_ETH_MTU & 0xfffffff0) + 0x10)
 
+/* If this SoC has the RMII Clock Source selection configure it */
+
+#if defined(CONFIG_KINETIS_EMAC_RMIICLKEXTAL)
+#  define SIM_SOPT2_RMIISRC SIM_SOPT2_RMIISRC_EXTAL
+#endif
+
+#if defined(CONFIG_KINETIS_EMAC_RMIICLK1588CLKIN)
+#  define SIM_SOPT2_RMIISRC SIM_SOPT2_RMIISRC_EXTBYP
+#endif
+
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -160,8 +222,11 @@ struct kinetis_driver_s
   uint8_t txtail;              /* The oldest busy TX descriptor */
   uint8_t txhead;              /* The next TX descriptor to use */
   uint8_t rxtail;              /* The next RX descriptor to use */
+  uint8_t phyaddr;             /* Selected PHY address */
   WDOG_ID txpoll;              /* TX poll timer */
   WDOG_ID txtimeout;           /* TX timeout timer */
+  struct work_s irqwork;       /* For deferring interrupt work to the work queue */
+  struct work_s pollwork;      /* For deferring poll work to the work queue */
   struct enet_desc_s *txdesc;  /* A pointer to the list of TX descriptor */
   struct enet_desc_s *rxdesc;  /* A pointer to the list of RX descriptors */
 
@@ -188,7 +253,7 @@ struct kinetis_driver_s
  * Private Data
  ****************************************************************************/
 
-static struct kinetis_driver_s g_enet[CONFIG_ENET_NETHIFS];
+static struct kinetis_driver_s g_enet[CONFIG_KINETIS_ENETNETHIFS];
 
 /****************************************************************************
  * Private Function Prototypes
@@ -210,7 +275,7 @@ static inline uint16_t kinesis_swap16(uint16_t value);
 
 /* Common TX logic */
 
-static bool kinetics_txringfull(FAR struct kinetis_driver_s *priv);
+static bool kinetis_txringfull(FAR struct kinetis_driver_s *priv);
 static int  kinetis_transmit(FAR struct kinetis_driver_s *priv);
 static int  kinetis_txpoll(struct net_driver_s *dev);
 
@@ -218,22 +283,31 @@ static int  kinetis_txpoll(struct net_driver_s *dev);
 
 static void kinetis_receive(FAR struct kinetis_driver_s *priv);
 static void kinetis_txdone(FAR struct kinetis_driver_s *priv);
-static int  kinetis_interrupt(int irq, FAR void *context);
+
+static void kinetis_interrupt_work(FAR void *arg);
+static int  kinetis_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
-static void kinetis_polltimer(int argc, uint32_t arg, ...);
-static void kinetis_txtimeout(int argc, uint32_t arg, ...);
+static void kinetis_txtimeout_work(FAR void *arg);
+static void kinetis_txtimeout_expiry(int argc, uint32_t arg, ...);
+
+static void kinetis_poll_work(FAR void *arg);
+static void kinetis_polltimer_expiry(int argc, uint32_t arg, ...);
 
 /* NuttX callback functions */
 
 static int kinetis_ifup(struct net_driver_s *dev);
 static int kinetis_ifdown(struct net_driver_s *dev);
+
+static void kinetis_txavail_work(FAR void *arg);
 static int kinetis_txavail(struct net_driver_s *dev);
+
 #ifdef CONFIG_NET_IGMP
 static int kinetis_addmac(struct net_driver_s *dev, FAR const uint8_t *mac);
 static int kinetis_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac);
 #endif
+
 #ifdef CONFIG_NETDEV_PHY_IOCTL
 static int kinetis_ioctl(struct net_driver_s *dev, int cmd, long arg);
 #endif
@@ -241,7 +315,11 @@ static int kinetis_ioctl(struct net_driver_s *dev, int cmd, long arg);
 /* PHY/MII support */
 
 static inline void kinetis_initmii(struct kinetis_driver_s *priv);
-static inline void kinetis_initphy(struct kinetis_driver_s *priv);
+static int kinetis_writemii(struct kinetis_driver_s *priv, uint8_t phyaddr,
+                            uint8_t regaddr, uint16_t data);
+static int kinetis_readmii(struct kinetis_driver_s *priv, uint8_t phyaddr,
+                           uint8_t regaddr, uint16_t *data);
+static inline int kinetis_initphy(struct kinetis_driver_s *priv);
 
 /* Initialization */
 
@@ -299,7 +377,7 @@ static inline uint16_t kinesis_swap16(uint16_t value)
 #endif
 
 /****************************************************************************
- * Function: kinetics_txringfull
+ * Function: kinetis_txringfull
  *
  * Description:
  *   Check if all of the TX descriptors are in use.
@@ -313,7 +391,7 @@ static inline uint16_t kinesis_swap16(uint16_t value)
  *
  ****************************************************************************/
 
-static bool kinetics_txringfull(FAR struct kinetis_driver_s *priv)
+static bool kinetis_txringfull(FAR struct kinetis_driver_s *priv)
 {
   uint8_t txnext;
 
@@ -323,7 +401,7 @@ static bool kinetics_txringfull(FAR struct kinetis_driver_s *priv)
    */
 
   txnext = priv->txhead + 1;
-  if (txnext >= CONFIG_ENET_NTXBUFFERS)
+  if (txnext >= CONFIG_KINETIS_ENETNTXBUFFERS)
     {
       txnext = 0;
     }
@@ -362,7 +440,7 @@ static int kinetis_transmit(FAR struct kinetis_driver_s *priv)
    * case, the outgoing packet will be dropped (e.g. an ARP reply)
    */
 
-  if (kinetics_txringfull(priv))
+  if (kinetis_txringfull(priv))
     {
       return -EBUSY;
     }
@@ -375,7 +453,7 @@ static int kinetis_transmit(FAR struct kinetis_driver_s *priv)
 
   txdesc = &priv->txdesc[priv->txhead];
   priv->txhead++;
-  if (priv->txhead >= CONFIG_ENET_NTXBUFFERS)
+  if (priv->txhead >= CONFIG_KINETIS_ENETNTXBUFFERS)
     {
       priv->txhead = 0;
     }
@@ -392,7 +470,7 @@ static int kinetis_transmit(FAR struct kinetis_driver_s *priv)
    */
 
   txdesc->length  = kinesis_swap16(priv->dev.d_len);
-#ifdef CONFIG_ENET_ENHANCEDBD
+#ifdef CONFIG_KINETIS_ENETENHANCEDBD
   txdesc->bdu     = 0x00000000;
   txdesc->status2 = TXDESC_INT | TXDESC_TS; /* | TXDESC_IINS | TXDESC_PINS; */
 #endif
@@ -426,8 +504,8 @@ static int kinetis_transmit(FAR struct kinetis_driver_s *priv)
 
   /* Setup the TX timeout watchdog (perhaps restarting the timer) */
 
-  (void)wd_start(priv->txtimeout, KINETIS_TXTIMEOUT, kinetis_txtimeout, 1,
-                 (uint32_t)priv);
+  (void)wd_start(priv->txtimeout, KINETIS_TXTIMEOUT, kinetis_txtimeout_expiry, 1,
+                 (wdparm_t)priv);
   return OK;
 }
 
@@ -498,7 +576,7 @@ static int kinetis_txpoll(struct net_driver_s *dev)
        * return a non-zero value to terminate the poll.
        */
 
-      if (kinetics_txringfull(priv))
+      if (kinetis_txringfull(priv))
         {
           return -EBUSY;
         }
@@ -557,7 +635,7 @@ static void kinetis_receive(FAR struct kinetis_driver_s *priv)
 #ifdef CONFIG_NET_IPv4
       if (BUF->type == HTONS(ETHTYPE_IP))
         {
-          nllvdbg("IPv4 frame\n");
+          ninfo("IPv4 frame\n");
           NETDEV_RXIPV4(&priv->dev);
 
           /* Handle ARP on input then give the IPv4 packet to the network
@@ -598,7 +676,7 @@ static void kinetis_receive(FAR struct kinetis_driver_s *priv)
 #ifdef CONFIG_NET_IPv6
       if (BUF->type == HTONS(ETHTYPE_IP6))
         {
-          nllvdbg("Iv6 frame\n");
+          ninfo("Iv6 frame\n");
           NETDEV_RXIPV6(&priv->dev);
 
           /* Give the IPv6 packet to the network layer */
@@ -668,7 +746,7 @@ static void kinetis_receive(FAR struct kinetis_driver_s *priv)
       /* Update the index to the next descriptor */
 
       priv->rxtail++;
-      if (priv->rxtail >= CONFIG_ENET_NRXBUFFERS)
+      if (priv->rxtail >= CONFIG_KINETIS_ENETNRXBUFFERS)
         {
           priv->rxtail = 0;
         }
@@ -708,7 +786,7 @@ static void kinetis_txdone(FAR struct kinetis_driver_s *priv)
       /* Yes.. bump up the tail pointer, making space for a new TX descriptor */
 
       priv->txtail++;
-      if (priv->txtail >= CONFIG_ENET_NTXBUFFERS)
+      if (priv->txtail >= CONFIG_KINETIS_ENETNTXBUFFERS)
         {
           priv->txtail = 0;
         }
@@ -739,30 +817,31 @@ static void kinetis_txdone(FAR struct kinetis_driver_s *priv)
 }
 
 /****************************************************************************
- * Function: kinetis_interrupt
+ * Function: kinetis_interrupt_work
  *
  * Description:
- *   Three interrupt sources will vector this this function:
- *   1. Ethernet MAC transmit interrupt handler
- *   2. Ethernet MAC receive interrupt handler
- *   3.
+ *   Perform interrupt related work from the worker thread
  *
  * Parameters:
- *   irq     - Number of the IRQ that generated the interrupt
- *   context - Interrupt register state save info (architecture-specific)
+ *   arg - The argument passed when work_queue() was called.
  *
  * Returned Value:
  *   OK on success
  *
  * Assumptions:
+ *   The network is locked.
  *
  ****************************************************************************/
 
-static int kinetis_interrupt(int irq, FAR void *context)
+static void kinetis_interrupt_work(FAR void *arg)
 {
-  register FAR struct kinetis_driver_s *priv = &g_enet[0];
+  FAR struct kinetis_driver_s *priv = (FAR struct kinetis_driver_s *)arg;
   uint32_t pending;
 
+  /* Process pending Ethernet interrupts */
+
+  net_lock();
+
   /* Get the set of unmasked, pending interrupt. */
 
   pending = getreg32(KINETIS_ENET_EIR) & getreg32(KINETIS_ENET_EIMR);
@@ -811,34 +890,93 @@ static int kinetis_interrupt(int irq, FAR void *context)
       putreg32(ENET_RDAR, KINETIS_ENET_RDAR);
     }
 
+  net_unlock();
+
+  /* Re-enable Ethernet interrupts */
+
+#if 0
+  up_enable_irq(KINETIS_IRQ_EMACTMR);
+#endif
+  up_enable_irq(KINETIS_IRQ_EMACTX);
+  up_enable_irq(KINETIS_IRQ_EMACRX);
+  up_enable_irq(KINETIS_IRQ_EMACMISC);
+}
+
+/****************************************************************************
+ * Function: kinetis_interrupt
+ *
+ * Description:
+ *   Three interrupt sources will vector this this function:
+ *   1. Ethernet MAC transmit interrupt handler
+ *   2. Ethernet MAC receive interrupt handler
+ *   3.
+ *
+ * Parameters:
+ *   irq     - Number of the IRQ that generated the interrupt
+ *   context - Interrupt register state save info (architecture-specific)
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *
+ ****************************************************************************/
+
+static int kinetis_interrupt(int irq, FAR void *context, FAR void *arg)
+{
+  register FAR struct kinetis_driver_s *priv = &g_enet[0];
+
+  /* Disable further Ethernet interrupts.  Because Ethernet interrupts are
+   * also disabled if the TX timeout event occurs, there can be no race
+   * condition here.
+   */
+
+  up_disable_irq(KINETIS_IRQ_EMACTMR);
+  up_disable_irq(KINETIS_IRQ_EMACTX);
+  up_disable_irq(KINETIS_IRQ_EMACRX);
+  up_disable_irq(KINETIS_IRQ_EMACMISC);
+
+  /* TODO: Determine if a TX transfer just completed */
+
+    {
+      /* If a TX transfer just completed, then cancel the TX timeout so
+       * there will be do race condition between any subsequent timeout
+       * expiration and the deferred interrupt processing.
+       */
+
+       wd_cancel(priv->txtimeout);
+    }
+
+  /* Schedule to perform the interrupt processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->irqwork, kinetis_interrupt_work, priv, 0);
   return OK;
 }
 
 /****************************************************************************
- * Function: kinetis_txtimeout
+ * Function: kinetis_txtimeout_work
  *
  * Description:
- *   Our TX watchdog timed out.  Called from the timer interrupt handler.
- *   The last TX never completed.  Reset the hardware and start again.
+ *   Perform TX timeout related work from the worker thread
  *
  * Parameters:
- *   argc - The number of available arguments
- *   arg  - The first argument
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
- *   Global interrupts are disabled by the watchdog logic.
+ *   The network is locked.
  *
  ****************************************************************************/
 
-static void kinetis_txtimeout(int argc, uint32_t arg, ...)
+static void kinetis_txtimeout_work(FAR void *arg)
 {
   FAR struct kinetis_driver_s *priv = (FAR struct kinetis_driver_s *)arg;
 
   /* Increment statistics and dump debug info */
 
+  net_lock();
   NETDEV_TXTIMEOUTS(&priv->dev);
 
   /* Take the interface down and bring it back up.  The is the most agressive
@@ -851,13 +989,15 @@ static void kinetis_txtimeout(int argc, uint32_t arg, ...)
   /* Then poll the network for new XMIT data */
 
   (void)devif_poll(&priv->dev, kinetis_txpoll);
+  net_unlock();
 }
 
 /****************************************************************************
- * Function: kinetis_polltimer
+ * Function: kinetis_txtimeout_expiry
  *
  * Description:
- *   Periodic timer handler.  Called from the timer interrupt handler.
+ *   Our TX watchdog timed out.  Called from the timer interrupt handler.
+ *   The last TX never completed.  Reset the hardware and start again.
  *
  * Parameters:
  *   argc - The number of available arguments
@@ -871,7 +1011,45 @@ static void kinetis_txtimeout(int argc, uint32_t arg, ...)
  *
  ****************************************************************************/
 
-static void kinetis_polltimer(int argc, uint32_t arg, ...)
+static void kinetis_txtimeout_expiry(int argc, uint32_t arg, ...)
+{
+  FAR struct kinetis_driver_s *priv = (FAR struct kinetis_driver_s *)arg;
+
+  /* Disable further Ethernet interrupts.  This will prevent some race
+   * conditions with interrupt work.  There is still a potential race
+   * condition with interrupt work that is already queued and in progress.
+   */
+
+  up_disable_irq(KINETIS_IRQ_EMACTMR);
+  up_disable_irq(KINETIS_IRQ_EMACTX);
+  up_disable_irq(KINETIS_IRQ_EMACRX);
+  up_disable_irq(KINETIS_IRQ_EMACMISC);
+
+  /* Schedule to perform the TX timeout processing on the worker thread,
+   * canceling any pending interrupt work.
+   */
+
+  work_queue(ETHWORK, &priv->irqwork, kinetis_txtimeout_work, priv, 0);
+}
+
+/****************************************************************************
+ * Function: kinetis_poll_work
+ *
+ * Description:
+ *   Perform periodic polling from the worker thread
+ *
+ * Parameters:
+ *   arg - The argument passed when work_queue() as called.
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *   The network is locked.
+ *
+ ****************************************************************************/
+
+static void kinetis_poll_work(FAR void *arg)
 {
   FAR struct kinetis_driver_s *priv = (FAR struct kinetis_driver_s *)arg;
 
@@ -879,7 +1057,8 @@ static void kinetis_polltimer(int argc, uint32_t arg, ...)
    * the TX poll if he are unable to accept another packet for transmission.
    */
 
-  if (!kinetics_txringfull(priv))
+  net_lock();
+  if (!kinetis_txringfull(priv))
     {
       /* If so, update TCP timing states and poll the network for new XMIT data. Hmmm..
        * might be bug here.  Does this mean if there is a transmit in progress,
@@ -891,7 +1070,36 @@ static void kinetis_polltimer(int argc, uint32_t arg, ...)
 
   /* Setup the watchdog poll timer again in any case */
 
-  (void)wd_start(priv->txpoll, KINETIS_WDDELAY, kinetis_polltimer, 1, arg);
+  (void)wd_start(priv->txpoll, KINETIS_WDDELAY, kinetis_polltimer_expiry,
+                 1, (wdparm_t)priv);
+  net_unlock();
+}
+
+/****************************************************************************
+ * Function: kinetis_polltimer_expiry
+ *
+ * Description:
+ *   Periodic timer handler.  Called from the timer interrupt handler.
+ *
+ * Parameters:
+ *   argc - The number of available arguments
+ *   arg  - The first argument
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Global interrupts are disabled by the watchdog logic.
+ *
+ ****************************************************************************/
+
+static void kinetis_polltimer_expiry(int argc, uint32_t arg, ...)
+{
+  FAR struct kinetis_driver_s *priv = (FAR struct kinetis_driver_s *)arg;
+
+  /* Schedule to perform the poll processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->pollwork, kinetis_poll_work, priv, 0);
 }
 
 /****************************************************************************
@@ -917,10 +1125,11 @@ static int kinetis_ifup(struct net_driver_s *dev)
     (FAR struct kinetis_driver_s *)dev->d_private;
   uint8_t *mac = dev->d_mac.ether_addr_octet;
   uint32_t regval;
+  int ret;
 
-  ndbg("Bringing up: %d.%d.%d.%d\n",
-       dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-       (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 
   /* Initialize ENET buffers */
 
@@ -949,7 +1158,12 @@ static int kinetis_ifup(struct net_driver_s *dev)
 
   /* Configure the PHY */
 
-  kinetis_initphy(priv);
+  ret = kinetis_initphy(priv);
+  if (ret < 0)
+    {
+      nerr("ERROR: Failed to configure the PHY: %d\n", ret);
+      return ret;
+    }
 
   /* Handle promiscuous mode */
 
@@ -961,7 +1175,7 @@ static int kinetis_ifup(struct net_driver_s *dev)
 
   /* Select legacy of enhanced buffer descriptor format */
 
-#ifdef CONFIG_ENET_ENHANCEDBD
+#ifdef CONFIG_KINETIS_ENETENHANCEDBD
   putreg32(ENET_ECR_EN1588, KINETIS_ENET_ECR);
 #else
   putreg32(0, KINETIS_ENET_ECR);
@@ -995,8 +1209,8 @@ static int kinetis_ifup(struct net_driver_s *dev)
 
   /* Set and activate a timer process */
 
-  (void)wd_start(priv->txpoll, KINETIS_WDDELAY, kinetis_polltimer, 1,
-                 (uint32_t)priv);
+  (void)wd_start(priv->txpoll, KINETIS_WDDELAY, kinetis_polltimer_expiry, 1,
+                 (wdparm_t)priv);
 
   /* Clear all pending ENET interrupt */
 
@@ -1072,45 +1286,36 @@ static int kinetis_ifdown(struct net_driver_s *dev)
 }
 
 /****************************************************************************
- * Function: kinetis_txavail
+ * Function: kinetis_txavail_work
  *
  * Description:
- *   Driver callback invoked when new TX data is available.  This is a
- *   stimulus perform an out-of-cycle poll and, thereby, reduce the TX
- *   latency.
+ *   Perform an out-of-cycle poll on the worker thread.
  *
  * Parameters:
- *   dev  - Reference to the NuttX driver state structure
+ *   arg - Reference to the NuttX driver state structure (cast to void*)
  *
  * Returned Value:
  *   None
  *
  * Assumptions:
- *   Called in normal user mode
+ *   Called on the higher priority worker thread.
  *
  ****************************************************************************/
 
-static int kinetis_txavail(struct net_driver_s *dev)
+static void kinetis_txavail_work(FAR void *arg)
 {
-  FAR struct kinetis_driver_s *priv =
-    (FAR struct kinetis_driver_s *)dev->d_private;
-  irqstate_t flags;
-
-  /* Disable interrupts because this function may be called from interrupt
-   * level processing.
-   */
-
-  flags = enter_critical_section();
+  FAR struct kinetis_driver_s *priv = (FAR struct kinetis_driver_s *)arg;
 
   /* Ignore the notification if the interface is not yet up */
 
+  net_lock();
   if (priv->bifup)
     {
       /* Check if there is room in the hardware to hold another outgoing
        * packet.
        */
 
-      if (!kinetics_txringfull(priv))
+      if (!kinetis_txringfull(priv))
         {
           /* No, there is space for another transfer.  Poll the network for new
            * XMIT data.
@@ -1120,7 +1325,45 @@ static int kinetis_txavail(struct net_driver_s *dev)
         }
     }
 
-  leave_critical_section(flags);
+  net_unlock();
+}
+
+/****************************************************************************
+ * Function: kinetis_txavail
+ *
+ * Description:
+ *   Driver callback invoked when new TX data is available.  This is a
+ *   stimulus perform an out-of-cycle poll and, thereby, reduce the TX
+ *   latency.
+ *
+ * Parameters:
+ *   dev  - Reference to the NuttX driver state structure
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Called in normal user mode
+ *
+ ****************************************************************************/
+
+static int kinetis_txavail(struct net_driver_s *dev)
+{
+  FAR struct kinetis_driver_s *priv =
+    (FAR struct kinetis_driver_s *)dev->d_private;
+
+  /* Is our single work structure available?  It may not be if there are
+   * pending interrupt actions and we will have to ignore the Tx
+   * availability action.
+   */
+
+  if (work_available(&priv->pollwork))
+    {
+      /* Schedule to serialize the poll on the worker thread. */
+
+      work_queue(ETHWORK, &priv->pollwork, kinetis_txavail_work, priv, 0);
+    }
+
   return OK;
 }
 
@@ -1216,7 +1459,7 @@ static int kinetis_ioctl(struct net_driver_s *dev, int cmd, long arg)
     {
       struct mii_ioctl_data_s *req =
         (struct mii_ioctl_data_s *)((uintptr_t)arg);
-      req->phy_id = CONFIG_ENET_PHYADDR;
+      req->phy_id = priv->phyaddr;
       ret = OK;
     }
     break;
@@ -1333,7 +1576,7 @@ static int kinetis_writemii(struct kinetis_driver_s *priv, uint8_t phyaddr,
 }
 
 /****************************************************************************
- * Function: kinetis_writemii
+ * Function: kinetis_reademii
  *
  * Description:
  *   Read a 16-bit value from a PHY register.
@@ -1381,6 +1624,7 @@ static int kinetis_readmii(struct kinetis_driver_s *priv, uint8_t phyaddr,
 
   if (timeout >= MII_MAXPOLLS)
     {
+      nerr("ERROR: Timed out waiting for transfer to complete\n");
       return -ETIMEDOUT;
     }
 
@@ -1404,56 +1648,155 @@ static int kinetis_readmii(struct kinetis_driver_s *priv, uint8_t phyaddr,
  *   priv - Reference to the private ENET driver state structure
  *
  * Returned Value:
- *   None
+ *   Zero (OK) returned on success; a negated errno value is returned on any
+ *   failure;
  *
  * Assumptions:
  *
  ****************************************************************************/
 
-static inline void kinetis_initphy(struct kinetis_driver_s *priv)
+static inline int kinetis_initphy(struct kinetis_driver_s *priv)
 {
   uint32_t rcr;
   uint32_t tcr;
   uint16_t phydata;
+  uint8_t phyaddr;
+  int retries;
+  int ret;
 
   /* Loop (potentially infinitely?) until we successfully communicate with
    * the PHY.
    */
 
-  do
+  for (phyaddr = 0; phyaddr < 32; phyaddr++)
     {
-      usleep(LINK_WAITUS);
-      phydata = 0xffff;
-      kinetis_readmii(priv, CONFIG_ENET_PHYADDR, MII_PHYID1, &phydata);
+      ninfo("%s: Try phyaddr: %u\n", BOARD_PHY_NAME, phyaddr);
+
+      /* Try to read PHYID1 few times using this address */
+
+      retries = 0;
+      do
+        {
+          usleep(LINK_WAITUS);
+          ninfo("%s: Read PHYID1, retries=%d\n",  BOARD_PHY_NAME, retries + 1);
+          phydata = 0xffff;
+          ret = kinetis_readmii(priv, phyaddr, MII_PHYID1, &phydata);
+        }
+      while ((ret < 0 || phydata == 0xffff) && ++retries < 3);
+
+      /* If we successfully read anything then break out, using this PHY address */
+
+      if (retries < 3)
+        {
+          break;
+        }
+    }
+
+  if (phyaddr >= 32)
+    {
+      nerr("ERROR: Failed to read %s PHYID1 at any address\n");
+      return -ENOENT;
+    }
+
+  ninfo("%s: Using PHY address %u\n", BOARD_PHY_NAME, phyaddr);
+  priv->phyaddr = phyaddr;
+
+  /* Verify PHYID1.  Compare OUI bits 3-18 */
+
+  ninfo("%s: PHYID1: %04x\n", BOARD_PHY_NAME, phydata);
+  if (phydata != BOARD_PHYID1)
+    {
+      nerr("ERROR: PHYID1=%04x incorrect for %s.  Expected %04x\n",
+           phydata, BOARD_PHY_NAME, BOARD_PHYID1);
+      return -ENXIO;
+    }
+
+  /* Read PHYID2 */
+
+  ret = kinetis_readmii(priv, phyaddr, MII_PHYID2, &phydata);
+  if (ret < 0)
+    {
+      nerr("ERROR: Failed to read %s PHYID2: %d\n", BOARD_PHY_NAME, ret);
+      return ret;
+    }
+
+  ninfo("%s: PHYID2: %04x\n", BOARD_PHY_NAME, phydata);
+
+  /* Verify PHYID2:  Compare OUI bits 19-24 and the 6-bit model number
+   * (ignoring the 4-bit revision number).
+   */
+
+  if ((phydata & 0xfff0) != (BOARD_PHYID2 & 0xfff0))
+    {
+      nerr("ERROR: PHYID2=%04x incorrect for %s.  Expected %04x\n",
+           (phydata & 0xfff0), BOARD_PHY_NAME, (BOARD_PHYID2 & 0xfff0));
+      return -ENXIO;
     }
-  while (phydata == 0xffff);
 
   /* Start auto negotiation */
 
-  kinetis_writemii(priv, CONFIG_ENET_PHYADDR, MII_MCR,
+  ninfo("%s: Start Autonegotiation...\n",  BOARD_PHY_NAME);
+  kinetis_writemii(priv, phyaddr, MII_MCR,
                   (MII_MCR_ANRESTART | MII_MCR_ANENABLE));
 
-  /* Wait (potentially forever) for auto negotiation to complete */
+  /* Wait for auto negotiation to complete */
 
-  do
+  for (retries = 0; retries < LINK_NLOOPS; retries++)
     {
+      ret = kinetis_readmii(priv, phyaddr, MII_MSR, &phydata);
+      if (ret < 0)
+        {
+          nerr("ERROR: Failed to read %s MII_MSR: %d\n",
+                BOARD_PHY_NAME, ret);
+          return ret;
+        }
+
+      if (phydata & MII_MSR_ANEGCOMPLETE)
+        {
+          break;
+        }
+
       usleep(LINK_WAITUS);
-      kinetis_readmii(priv, CONFIG_ENET_PHYADDR, MII_MSR, &phydata);
+    }
+
+  if (phydata & MII_MSR_ANEGCOMPLETE) 
+    {
+      ninfo("%s: Autonegotiation complete\n",  BOARD_PHY_NAME);
+      ninfo("%s: MII_MSR: %04x\n", BOARD_PHY_NAME, phydata);
+    }
+  else
+    {
+      /* TODO: Autonegotitation has right now failed. Maybe the Eth cable is not connected.
+         PHY chip have mechanisms to configure link OK. We should leave autconf on, 
+         and find a way to re-configure MCU whenever the link is ready. */
 
+      ninfo("%s: Autonegotiation failed [%d] (is cable plugged-in ?), default to 10Mbs mode\n", \
+            BOARD_PHY_NAME, retries);
+
+      /* Stop auto negotiation */
+      
+      kinetis_writemii(priv, phyaddr, MII_MCR, 0);
     }
-  while ((phydata & MII_MSR_ANEGCOMPLETE) == 0);
 
-  /* When we get here we have a link - Find the negotiated speed and duplex. */
+  /* When we get here we have a (negotiated) speed and duplex. */
 
   phydata = 0;
-  kinetis_readmii(priv, CONFIG_ENET_PHYADDR, PHY_STATUS, &phydata);
+  ret = kinetis_readmii(priv, phyaddr, BOARD_PHY_STATUS, &phydata);
+  if (ret < 0)
+    {
+      nerr("ERROR: Failed to read %s BOARD_PHY_STATUS[%02x]: %d\n",
+           BOARD_PHY_NAME, BOARD_PHY_STATUS, ret);
+      return ret;
+   }
 
-  /* Set up the transmit and receive contrel registers based on the
+  ninfo("%s: BOARD_PHY_STATUS: %04x\n", BOARD_PHY_NAME, phydata);
+
+  /* Set up the transmit and receive control registers based on the
    * configuration and the auto negotiation results.
    */
 
-#ifdef CONFIG_ENET_USEMII
-  rcr = ENET_RCR_MII_MODE | ENET_RCR_CRCFWD |
+#ifdef CONFIG_KINETIS_ENETUSEMII
+  rcr = ENET_RCR_CRCFWD |
         CONFIG_NET_ETH_MTU << ENET_RCR_MAX_FL_SHIFT |
         ENET_RCR_MII_MODE;
 #else
@@ -1468,28 +1811,46 @@ static inline void kinetis_initphy(struct kinetis_driver_s *priv)
 
   /* Setup half or full duplex */
 
-  if ((phydata & PHY_DUPLEX_STATUS) != 0)
+  if (BOARD_PHY_ISDUPLEX(phydata))
     {
       /* Full duplex */
 
+      ninfo("%s: Full duplex\n",  BOARD_PHY_NAME);
       tcr |= ENET_TCR_FDEN;
     }
   else
     {
       /* Half duplex */
 
+      ninfo("%s: Half duplex\n",  BOARD_PHY_NAME);
       rcr |= ENET_RCR_DRT;
     }
 
-  if ((phydata & PHY_SPEED_STATUS) != 0)
+  if (BOARD_PHY_10BASET(phydata))
     {
-      /* 10Mbps */
+      /* 10 Mbps */
 
+      ninfo("%s: 10 Base-T\n",  BOARD_PHY_NAME);
       rcr |= ENET_RCR_RMII_10T;
     }
+  else if (BOARD_PHY_100BASET(phydata))
+    {
+      /* 100 Mbps */
+
+      ninfo("%s: 100 Base-T\n",  BOARD_PHY_NAME);
+    }
+  else
+    {
+      /* This might happen if Autonegotiation did not complete(?) */
+
+      nerr("ERROR: Neither 10- nor 100-BaseT reported: PHY STATUS=%04x\n",
+           phydata);
+      return -EIO;
+    }
 
   putreg32(rcr, KINETIS_ENET_RCR);
   putreg32(tcr, KINETIS_ENET_TCR);
+  return OK;
 }
 
 /****************************************************************************
@@ -1520,7 +1881,7 @@ static void kinetis_initbuffers(struct kinetis_driver_s *priv)
 
   /* Get an aligned RX descriptor (array) address */
 
-  addr        +=  CONFIG_ENET_NTXBUFFERS * sizeof(struct enet_desc_s);
+  addr        +=  CONFIG_KINETIS_ENETNTXBUFFERS * sizeof(struct enet_desc_s);
   priv->rxdesc = (struct enet_desc_s *)addr;
 
   /* Get the beginning of the first aligned buffer */
@@ -1529,12 +1890,12 @@ static void kinetis_initbuffers(struct kinetis_driver_s *priv)
 
   /* Then fill in the TX descriptors */
 
-  for (i = 0; i < CONFIG_ENET_NTXBUFFERS; i++)
+  for (i = 0; i < CONFIG_KINETIS_ENETNTXBUFFERS; i++)
     {
       priv->txdesc[i].status1 = 0;
       priv->txdesc[i].length  = 0;
       priv->txdesc[i].data    = (uint8_t *)kinesis_swap32((uint32_t)addr);
-#ifdef CONFIG_ENET_ENHANCEDBD
+#ifdef CONFIG_KINETIS_ENETENHANCEDBD
       priv->txdesc[i].status2 = TXDESC_IINS | TXDESC_PINS;
 #endif
       addr                   += KINETIS_BUF_SIZE;
@@ -1542,12 +1903,12 @@ static void kinetis_initbuffers(struct kinetis_driver_s *priv)
 
   /* Then fill in the RX descriptors */
 
-  for (i = 0; i < CONFIG_ENET_NRXBUFFERS; i++)
+  for (i = 0; i < CONFIG_KINETIS_ENETNRXBUFFERS; i++)
     {
       priv->rxdesc[i].status1 = RXDESC_E;
       priv->rxdesc[i].length  = 0;
       priv->rxdesc[i].data    = (uint8_t *)kinesis_swap32((uint32_t)addr);
-#ifdef CONFIG_ENET_ENHANCEDBD
+#ifdef CONFIG_KINETIS_ENETENHANCEDBD
       priv->rxdesc[i].bdu     = 0;
       priv->rxdesc[i].status2 = RXDESC_INT;
 #endif
@@ -1556,8 +1917,8 @@ static void kinetis_initbuffers(struct kinetis_driver_s *priv)
 
   /* Set the wrap bit in the last descriptors to form a ring */
 
-  priv->txdesc[CONFIG_ENET_NTXBUFFERS-1].status1 |= TXDESC_W;
-  priv->rxdesc[CONFIG_ENET_NRXBUFFERS-1].status1 |= RXDESC_W;
+  priv->txdesc[CONFIG_KINETIS_ENETNTXBUFFERS-1].status1 |= TXDESC_W;
+  priv->rxdesc[CONFIG_KINETIS_ENETNRXBUFFERS-1].status1 |= RXDESC_W;
 
   /* We start with RX descriptor 0 and with no TX descriptors in use */
 
@@ -1627,13 +1988,33 @@ static void kinetis_reset(struct kinetis_driver_s *priv)
 int kinetis_netinitialize(int intf)
 {
   struct kinetis_driver_s *priv;
+#ifdef CONFIG_NET_ETHERNET
+  uint32_t uidl;
+  uint32_t uidml;
+  uint8_t *mac;
+#endif
   uint32_t regval;
 
   /* Get the interface structure associated with this interface number. */
 
-  DEBUGASSERT(intf < CONFIG_ENET_NETHIFS);
+  DEBUGASSERT(intf < CONFIG_KINETIS_ENETNETHIFS);
   priv = &g_enet[intf];
 
+#if defined(SIM_SOPT2_RMIISRC)
+  /* If this Soc has RMII clock select then select the RMII clock source.
+   * First if the source is ENET_1588_CLKIN - configure the pin to apply the
+   * clock to the block. Then select it as the source.
+   */
+
+#  if SIM_SOPT2_RMIISRC == SIM_SOPT2_RMIISRC_EXTBYP
+  kinetis_pinconfig(PIN_ENET_1588_CLKIN);
+#  endif
+
+  regval  = getreg32(KINETIS_SIM_SOPT2);
+  regval |= SIM_SOPT2_RMIISRC;
+  putreg32(regval, KINETIS_SIM_SOPT2);
+#endif
+
   /* Enable the ENET clock */
 
   regval  = getreg32(KINETIS_SIM_SCGC2);
@@ -1646,9 +2027,9 @@ int kinetis_netinitialize(int intf)
 
   putreg32(0, KINETIS_MPU_CESR);
 
+#ifdef CONFIG_KINETIS_ENETUSEMII
   /* Configure all ENET/MII pins */
 
-#ifdef CONFIG_ENET_USEMII
   kinetis_pinconfig(PIN_MII0_MDIO);
   kinetis_pinconfig(PIN_MII0_MDC);
   kinetis_pinconfig(PIN_MII0_RXDV);
@@ -1668,6 +2049,8 @@ int kinetis_netinitialize(int intf)
   kinetis_pinconfig(PIN_MII0_CRS);
   kinetis_pinconfig(PIN_MII0_COL);
 #else
+  /* Use RMII subset */
+
   kinetis_pinconfig(PIN_RMII0_MDIO);
   kinetis_pinconfig(PIN_RMII0_MDC);
   kinetis_pinconfig(PIN_RMII0_CRS_DV);
@@ -1691,42 +2074,42 @@ int kinetis_netinitialize(int intf)
   /* Attach the Ethernet MAC IEEE 1588 timer interrupt handler */
 
 #if 0
-  if (irq_attach(KINETIS_IRQ_EMACTMR, kinetis_tmrinterrupt))
+  if (irq_attach(KINETIS_IRQ_EMACTMR, kinetis_tmrinterrupt, NULL))
     {
       /* We could not attach the ISR to the interrupt */
 
-      ndbg("Failed to attach EMACTMR IRQ\n");
+      nerr("ERROR: Failed to attach EMACTMR IRQ\n");
       return -EAGAIN;
     }
 #endif
 
   /* Attach the Ethernet MAC transmit interrupt handler */
 
-  if (irq_attach(KINETIS_IRQ_EMACTX, kinetis_interrupt))
+  if (irq_attach(KINETIS_IRQ_EMACTX, kinetis_interrupt, NULL))
     {
       /* We could not attach the ISR to the interrupt */
 
-      ndbg("Failed to attach EMACTX IRQ\n");
+      nerr("ERROR: Failed to attach EMACTX IRQ\n");
       return -EAGAIN;
     }
 
   /* Attach the Ethernet MAC receive interrupt handler */
 
-  if (irq_attach(KINETIS_IRQ_EMACRX, kinetis_interrupt))
+  if (irq_attach(KINETIS_IRQ_EMACRX, kinetis_interrupt, NULL))
     {
       /* We could not attach the ISR to the interrupt */
 
-      ndbg("Failed to attach EMACRX IRQ\n");
+      nerr("ERROR: Failed to attach EMACRX IRQ\n");
       return -EAGAIN;
     }
 
   /* Attach the Ethernet MAC error and misc interrupt handler */
 
-  if (irq_attach(KINETIS_IRQ_EMACMISC, kinetis_interrupt))
+  if (irq_attach(KINETIS_IRQ_EMACMISC, kinetis_interrupt, NULL))
     {
       /* We could not attach the ISR to the interrupt */
 
-      ndbg("Failed to attach EMACMISC IRQ\n");
+      nerr("ERROR: Failed to attach EMACMISC IRQ\n");
       return -EAGAIN;
     }
 
@@ -1750,6 +2133,28 @@ int kinetis_netinitialize(int intf)
   priv->txpoll        = wd_create();      /* Create periodic poll timer */
   priv->txtimeout     = wd_create();      /* Create TX timeout timer */
 
+#ifdef CONFIG_NET_ETHERNET
+ /* Determine a semi-unique MAC address from MCU UID
+  * We use UID Low and Mid Low registers to get 64 bits, from which we keep
+  * 48 bits.  We then force unicast and locally administered bits (b0 and b1,
+  * 1st octet)
+  */
+
+  uidl   = getreg32(KINETIS_SIM_UIDL);
+  uidml  = getreg32(KINETIS_SIM_UIDML);
+  mac    = priv->dev.d_mac.ether_addr_octet;
+
+  uidml |= 0x00000200;
+  uidml &= 0x0000FEFF;
+
+  mac[0] = (uidml & 0x0000ff00) >> 8;
+  mac[1] = (uidml & 0x000000ff);
+  mac[2] = (uidl &  0xff000000) >> 24;
+  mac[3] = (uidl &  0x00ff0000) >> 16;
+  mac[4] = (uidl &  0x0000ff00) >> 8;
+  mac[5] = (uidl &  0x000000ff);
+#endif
+
   /* Put the interface in the down state.  This usually amounts to resetting
    * the device and/or calling kinetis_ifdown().
    */
@@ -1773,7 +2178,7 @@ int kinetis_netinitialize(int intf)
  *
  ****************************************************************************/
 
-#if CONFIG_ENET_NETHIFS == 1
+#if CONFIG_KINETIS_ENETNETHIFS == 1
 void up_netinitialize(void)
 {
   (void)kinetis_netinitialize(0);
diff --git a/arch/arm/src/kinetis/kinetis_ftfl.h b/arch/arm/src/kinetis/kinetis_ftfl.h
deleted file mode 100644
index 92e53b650d03d2cfbaf6ba3b3cd9427304069d8d..0000000000000000000000000000000000000000
--- a/arch/arm/src/kinetis/kinetis_ftfl.h
+++ /dev/null
@@ -1,159 +0,0 @@
-/************************************************************************************
- * arch/arm/src/kinetis/kinetis_ftfl.h
- *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ************************************************************************************/
-
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_FTFL_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_FTFL_H
-
-/************************************************************************************
- * Included Files
- ************************************************************************************/
-
-#include 
-
-#include "chip.h"
-
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Register Offsets *****************************************************************/
-
-#define KINETIS_FTFL_FSTAT_OFFSET   0x0000 /* Flash Status Register */
-#define KINETIS_FTFL_FCNFG_OFFSET   0x0001 /* Flash Configuration Register */
-#define KINETIS_FTFL_FSEC_OFFSET    0x0002 /* Flash Security Register */
-#define KINETIS_FTFL_FOPT_OFFSET    0x0003 /* Flash Option Register */
-
-#define KINETIS_FTFL_FCCOB3_OFFSET  0x0004 /* Flash Common Command Object Registers */
-#define KINETIS_FTFL_FCCOB2_OFFSET  0x0005 /* Flash Common Command Object Registers */
-#define KINETIS_FTFL_FCCOB1_OFFSET  0x0006 /* Flash Common Command Object Registers */
-#define KINETIS_FTFL_FCCOB0_OFFSET  0x0007 /* Flash Common Command Object Registers */
-#define KINETIS_FTFL_FCCOB7_OFFSET  0x0008 /* Flash Common Command Object Registers */
-#define KINETIS_FTFL_FCCOB6_OFFSET  0x0009 /* Flash Common Command Object Registers */
-#define KINETIS_FTFL_FCCOB5_OFFSET  0x000a /* Flash Common Command Object Registers */
-#define KINETIS_FTFL_FCCOB4_OFFSET  0x000b /* Flash Common Command Object Registers */
-#define KINETIS_FTFL_FCCOBB_OFFSET  0x000c /* Flash Common Command Object Registers */
-#define KINETIS_FTFL_FCCOBA_OFFSET  0x000d /* Flash Common Command Object Registers */
-#define KINETIS_FTFL_FCCOB9_OFFSET  0x000e /* Flash Common Command Object Registers */
-#define KINETIS_FTFL_FCCOB8_OFFSET  0x000f /* Flash Common Command Object Registers */
-#define KINETIS_FTFL_FPROT3_OFFSET  0x0010 /* Program Flash Protection Registers */
-#define KINETIS_FTFL_FPROT2_OFFSET  0x0011 /* Program Flash Protection Registers */
-#define KINETIS_FTFL_FPROT1_OFFSET  0x0012 /* Program Flash Protection Registers */
-#define KINETIS_FTFL_FPROT0_OFFSET  0x0013 /* Program Flash Protection Registers */
-#define KINETIS_FTFL_FEPROT_OFFSET  0x0016 /* EEPROM Protection Register */
-#define KINETIS_FTFL_FDPROT_OFFSET  0x0017 /* Data Flash Protection Register */
-
-/* Register Addresses ***************************************************************/
-
-#define KINETIS_FTFL_FSTAT          (KINETIS_FTFL_BASE+KINETIS_FTFL_FSTAT_OFFSET)
-#define KINETIS_FTFL_FCNFG          (KINETIS_FTFL_BASE+KINETIS_FTFL_FCNFG_OFFSET)
-#define KINETIS_FTFL_FSEC           (KINETIS_FTFL_BASE+KINETIS_FTFL_FSEC_OFFSET)
-#define KINETIS_FTFL_FOPT           (KINETIS_FTFL_BASE+KINETIS_FTFL_FOPT_OFFSET)
-#define KINETIS_FTFL_FCCOB3         (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOB3_OFFSET)
-#define KINETIS_FTFL_FCCOB2         (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOB2_OFFSET)
-#define KINETIS_FTFL_FCCOB1         (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOB1_OFFSET)
-#define KINETIS_FTFL_FCCOB0         (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOB0_OFFSET)
-#define KINETIS_FTFL_FCCOB7         (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOB7_OFFSET)
-#define KINETIS_FTFL_FCCOB6         (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOB6_OFFSET)
-#define KINETIS_FTFL_FCCOB5         (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOB5_OFFSET)
-#define KINETIS_FTFL_FCCOB4         (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOB4_OFFSET)
-#define KINETIS_FTFL_FCCOBB         (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOBB_OFFSET)
-#define KINETIS_FTFL_FCCOBA         (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOBA_OFFSET)
-#define KINETIS_FTFL_FCCOB9         (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOB9_OFFSET)
-#define KINETIS_FTFL_FCCOB8         (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOB8_OFFSET)
-#define KINETIS_FTFL_FPROT3         (KINETIS_FTFL_BASE+KINETIS_FTFL_FPROT3_OFFSET)
-#define KINETIS_FTFL_FPROT2         (KINETIS_FTFL_BASE+KINETIS_FTFL_FPROT2_OFFSET)
-#define KINETIS_FTFL_FPROT1         (KINETIS_FTFL_BASE+KINETIS_FTFL_FPROT1_OFFSET)
-#define KINETIS_FTFL_FPROT0         (KINETIS_FTFL_BASE+KINETIS_FTFL_FPROT0_OFFSET)
-#define KINETIS_FTFL_FEPROT         (KINETIS_FTFL_BASE+KINETIS_FTFL_FEPROT_OFFSET)
-#define KINETIS_FTFL_FDPROT         (KINETIS_FTFL_BASE+KINETIS_FTFL_FDPROT_OFFSET)
-
-/* Register Bit Definitions *********************************************************/
-
-/* Flash Status Register */
-
-#define FTFL_FSTAT_MGSTAT0          (1 << 0)  /* Bit 0:  Memory Controller Command Completion Status Flag */
-                                              /* Bits 1-3: Reserved */
-#define FTFL_FSTAT_FPVIOL           (1 << 4)  /* Bit 4:  Flash Protection Violation Flag */
-#define FTFL_FSTAT_ACCERR           (1 << 5)  /* Bit 5:  Flash Access Error Flag */
-#define FTFL_FSTAT_RDCOLERR         (1 << 6)  /* Bit 6:  FTFL Read Collision Error Flag */
-#define FTFL_FSTAT_CCIF             (1 << 7)  /* Bit 7:  Command Complete Interrupt Flag */
-
-/* Flash Configuration Register */
-
-#define FTFL_FCNFG_EEERDY           (1 << 0)  /* Bit 0:  FEEPROM backup data copied to FlexRAM */
-#define FTFL_FCNFG_RAMRDY           (1 << 1)  /* Bit 1:  RAM Ready */
-#define FTFL_FCNFG_PFLSH            (1 << 2)  /* Bit 2:  FTFL configuration */
-#define FTFL_FCNFG_SWAP             (1 << 3)  /* Bit 3:  Swap */
-#define FTFL_FCNFG_ERSSUSP          (1 << 4)  /* Bit 4:  Erase Suspend */
-#define FTFL_FCNFG_ERSAREQ          (1 << 5)  /* Bit 5:  Erase All Request */
-#define FTFL_FCNFG_RDCOLLIE         (1 << 6)  /* Bit 6:  Read Collision Error Interrupt Enable */
-#define FTFL_FCNFG_CCIE             (1 << 7)  /* Bit 7:  Command Complete Interrupt Enable */
-
-/* Flash Security Register */
-
-#define FTFL_FSEC_SEC_SHIFT         (0)       /* Bits 0-1: Flash Security */
-#define FTFL_FSEC_SEC_MASK          (3 << FTFL_FSEC_SEC_SHIFT)
-#  define FTFL_FSEC_SEC_SECURE      (0 << FTFL_FSEC_SEC_SHIFT) /* 00,01,11: status is secure */
-#  define FTFL_FSEC_SEC_UNSECURE    (2 << FTFL_FSEC_SEC_SHIFT) /* 10: status is insecure */
-#define FTFL_FSEC_FSLACC_SHIFT      (2)       /* Bits 2-3: Freescale Failure Analysis Access Code */
-#define FTFL_FSEC_FSLACC_MASK       (3 << FTFL_FSEC_FSLACC_SHIFT)
-#  define FTFL_FSEC_FSLACC_GRANTED  (0 << FTFL_FSEC_FSLACC_SHIFT) /* 00 or 11: Access granted */
-#  define FTFL_FSEC_FSLACC_DENIED   (1 << FTFL_FSEC_FSLACC_SHIFT) /* 01 or 10: Access denied */
-#define FTFL_FSEC_MEEN_SHIFT        (4)       /* Bits 4-5: Mass Erase Enable Bits */
-#define FTFL_FSEC_MEEN_MASK         (3 << FTFL_FSEC_MEEN_SHIFT)
-#  define FTFL_FSEC_MEEN_ENABLED    (0 << FTFL_FSEC_MEEN_SHIFT) /* All values are enabled */
-#define FTFL_FSEC_KEYEN_SHIFT       (6)       /* Bits 6-7: Backdoor Key Security Enable */
-#define FTFL_FSEC_KEYEN_MASK        (3 << FTFL_FSEC_KEYEN_SHIFT)
-#  define FTFL_FSEC_KEYEN_DISABLED  (1 << FTFL_FSEC_KEYEN_SHIFT) /* All values are disabled */
-
-/* Flash Option Register (32-bits, see Chip Configuration details) */
-/* Flash Common Command Object Registers (8-bit flash command data) */
-/* Program Flash Protection Registers (8-bit flash protection data) */
-/* EEPROM Protection Register (8-bit eeprom protection data) */
-/* Data Flash Protection Register (8-bit data flash protection data) */
-
-/************************************************************************************
- * Public Types
- ************************************************************************************/
-
-/************************************************************************************
- * Public Data
- ************************************************************************************/
-
-/************************************************************************************
- * Public Functions
- ************************************************************************************/
-
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_FTFL_H */
diff --git a/arch/arm/src/kinetis/kinetis_i2c.c b/arch/arm/src/kinetis/kinetis_i2c.c
new file mode 100644
index 0000000000000000000000000000000000000000..6350b18f3469672a6c8f9bd58b41274cad2f3dd0
--- /dev/null
+++ b/arch/arm/src/kinetis/kinetis_i2c.c
@@ -0,0 +1,1115 @@
+/****************************************************************************
+ * arch/arm/src/kinetis/kinetis_i2c.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author:  Matias v01d 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "chip.h"
+#include "up_arch.h"
+#include "up_internal.h"
+
+#include "kinetis_config.h"
+#include "chip.h"
+#include "chip/kinetis_i2c.h"
+#include "chip/kinetis_sim.h"
+#include "chip/kinetis_pinmux.h"
+#include "kinetis.h"
+#include "kinetis_i2c.h"
+
+#if defined(CONFIG_KINETIS_I2C0) || defined(CONFIG_KINETIS_I2C1) || \
+    defined(CONFIG_KINETIS_I2C2)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define I2C_TIMEOUT  (20*1000/CONFIG_USEC_PER_TICK)   /* 20 mS */
+
+#define I2C_DEFAULT_FREQUENCY 400000
+
+#define STATE_OK                0
+#define STATE_ARBITRATION_ERROR 1
+#define STATE_TIMEOUT           2
+#define STATE_NAK               3
+
+/* TODO:
+ * - revisar tamanio de todos los registros (getreg/putreg)
+ */
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* I2C device state structure */
+
+struct kinetis_i2cdev_s
+{
+  struct i2c_master_s dev;    /* Generic I2C device */
+  uintptr_t base;             /* Base address of registers */
+  uint32_t basefreq;          /* Branch frequency */
+  uint32_t frequency;         /* Current I2C frequency */
+  uint16_t irqid;             /* IRQ for this device */
+  uint16_t nmsg;              /* Number of transfer remaining */
+  uint16_t wrcnt;             /* number of bytes sent to tx fifo */
+  uint16_t rdcnt;             /* number of bytes read from rx fifo */
+  volatile uint8_t state;     /* State of state machine */
+  bool restart;               /* Should next transfer restart or not */
+  sem_t mutex;                /* Only one thread can access at a time */
+  sem_t wait;                 /* Place to wait for state machine completion */
+  WDOG_ID timeout;            /* watchdog to timeout when bus hung */
+  struct i2c_msg_s *msgs;     /* Remaining transfers - first one is in
+                               * progress */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* Register access */
+
+static uint8_t kinetis_i2c_getreg(struct kinetis_i2cdev_s *priv,
+                                  uint8_t offset);
+static void kinetis_i2c_putreg(struct kinetis_i2cdev_s *priv,
+                               uint8_t value, uint8_t offset);
+
+/* I2C helpers */
+
+static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv,
+                                     uint32_t frequency);
+static int  kinetis_i2c_start(struct kinetis_i2cdev_s *priv);
+static void kinetis_i2c_stop(struct kinetis_i2cdev_s *priv);
+static int kinetis_i2c_interrupt(int irq, void *context, void *arg);
+static void kinetis_i2c_timeout(int argc, uint32_t arg, ...);
+static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv,
+                                     uint32_t frequency);
+
+/* I2C lower half driver methods */
+
+static int  kinetis_i2c_transfer(struct i2c_master_s *dev,
+                                 struct i2c_msg_s *msgs, int count);
+#ifdef CONFIG_I2C_RESET
+static int  kinetis_i2c_reset(struct i2c_master_s *dev);
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* I2C lower half driver operations */
+
+static const struct i2c_ops_s g_i2c_ops =
+{
+  .transfer = kinetis_i2c_transfer
+#ifdef CONFIG_I2C_RESET
+  ,.reset   = kinetis_i2c_reset
+#endif
+};
+
+/* I2C device state instances */
+
+#ifdef CONFIG_KINETIS_I2C0
+static struct kinetis_i2cdev_s g_i2c0_dev;
+#endif
+#ifdef CONFIG_KINETIS_I2C1
+static struct kinetis_i2cdev_s g_i2c1_dev;
+#endif
+#ifdef CONFIG_KINETIS_I2C2
+static struct kinetis_i2cdev_s g_i2c2_dev;
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: kinetis_i2c_getreg
+ *
+ * Description:
+ *   Get a 16-bit register value by offset
+ *
+ ****************************************************************************/
+
+static uint8_t kinetis_i2c_getreg(struct kinetis_i2cdev_s *priv,
+                                  uint8_t offset)
+{
+  return getreg8(priv->base + offset);
+}
+
+/****************************************************************************
+ * Name: kinetis_i2c_putreg
+ *
+ * Description:
+ *  Put a 16-bit register value by offset
+ *
+ ****************************************************************************/
+
+static void kinetis_i2c_putreg(struct kinetis_i2cdev_s *priv, uint8_t value,
+                               uint8_t offset)
+{
+  putreg8(value, priv->base + offset);
+}
+
+/****************************************************************************
+ * Name: kinetis_i2c_setfrequency
+ *
+ * Description:
+ *   Set the frequency for the next transfer
+ *
+ ****************************************************************************/
+
+static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv,
+                                     uint32_t frequency)
+{
+  i2cinfo("frequency=%lu\n", (unsigned long)frequency);
+
+  if (frequency == priv->frequency)
+    {
+      return;
+    }
+
+#if BOARD_BUS_FREQ == 120000000
+  if (frequency < 400000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV1152, KINETIS_I2C_F_OFFSET);   /* 104 kHz */
+    }
+  else if (frequency < 1000000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV288, KINETIS_I2C_F_OFFSET);    /* 416 kHz */
+    }
+  else
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV128, KINETIS_I2C_F_OFFSET);    /* 0.94 MHz */
+    }
+
+  kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET);
+
+#elif BOARD_BUS_FREQ == 108000000
+  if (frequency < 400000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV1024, KINETIS_I2C_F_OFFSET);   /* 105 kHz */
+    }
+  else if (frequency < 1000000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV256, KINETIS_I2C_F_OFFSET);    /* 422 kHz */
+    }
+  else
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV112, KINETIS_I2C_F_OFFSET);    /* 0.96 MHz */
+    }
+
+  kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET);
+
+#elif BOARD_BUS_FREQ == 96000000
+  if (frequency < 400000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV960, KINETIS_I2C_F_OFFSET);    /* 100 kHz */
+    }
+  else if (frequency < 1000000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV240, KINETIS_I2C_F_OFFSET);    /* 400 kHz */
+    }
+  else
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV96, KINETIS_I2C_F_OFFSET);     /* 1.0 MHz */
+    }
+
+  kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET);
+
+#elif BOARD_BUS_FREQ == 90000000
+  if (frequency < 400000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV896, KINETIS_I2C_F_OFFSET);    /* 100 kHz */
+    }
+  else if (frequency < 1000000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV224, KINETIS_I2C_F_OFFSET);    /* 402 kHz */
+    }
+  else
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV88, KINETIS_I2C_F_OFFSET);     /* 1.02 MHz */
+    }
+
+  kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET);
+
+#elif BOARD_BUS_FREQ == 80000000
+  if (frequency < 400000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV768, KINETIS_I2C_F_OFFSET);    /* 104 kHz */
+    }
+  else if (frequency < 1000000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV192, KINETIS_I2C_F_OFFSET);    /* 416 kHz */
+    }
+  else
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV80, KINETIS_I2C_F_OFFSET);     /* 1.0 MHz */
+    }
+
+  kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET);
+
+#elif BOARD_BUS_FREQ == 72000000
+  if (frequency < 400000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV640, KINETIS_I2C_F_OFFSET);    /* 112 kHz */
+    }
+  else if (frequency < 1000000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV192, KINETIS_I2C_F_OFFSET);    /* 375 kHz */
+    }
+  else
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV72, KINETIS_I2C_F_OFFSET);     /* 1.0 MHz */
+    }
+
+  kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET);
+
+#elif BOARD_BUS_FREQ == 64000000
+  if (frequency < 400000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV640, KINETIS_I2C_F_OFFSET);    /* 100 kHz */
+    }
+  else if (frequency < 1000000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV160, KINETIS_I2C_F_OFFSET);    /* 400 kHz */
+    }
+  else
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV64, KINETIS_I2C_F_OFFSET);     /* 1.0 MHz */
+    }
+
+  kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET);
+
+#elif BOARD_BUS_FREQ == 60000000
+  if (frequency < 400000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV576, KINETIS_I2C_F_OFFSET);    /* 104 kHz */
+    }
+  else if (frequency < 1000000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV144, KINETIS_I2C_F_OFFSET);    /* 416 kHz */
+    }
+  else
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV64, KINETIS_I2C_F_OFFSET);     /* 938 kHz */
+    }
+
+  kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET);
+
+#elif BOARD_BUS_FREQ == 56000000
+  if (frequency < 400000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV512, KINETIS_I2C_F_OFFSET);    /* 109 kHz */
+    }
+  else if (frequency < 1000000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV144, KINETIS_I2C_F_OFFSET);    /* 389 kHz */
+    }
+  else
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV56_1, KINETIS_I2C_F_OFFSET);   /* 1 MHz */
+    }
+
+  kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET);
+
+#elif BOARD_BUS_FREQ == 54000000
+  if (frequency < 400000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV512, KINETIS_I2C_F_OFFSET);    /* 105 kHz */
+    }
+  else if (frequency < 1000000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV128, KINETIS_I2C_F_OFFSET);    /* 422 kHz */
+    }
+  else
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV56, KINETIS_I2C_F_OFFSET);     /* 0.96 MHz */
+    }
+
+  kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET);
+
+#elif BOARD_BUS_FREQ == 48000000
+  if (frequency < 400000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV480, KINETIS_I2C_F_OFFSET);    /* 100 kHz */
+    }
+  else if (frequency < 1000000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV112, KINETIS_I2C_F_OFFSET);    /* 400 kHz */
+    }
+  else
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV48_1, KINETIS_I2C_F_OFFSET);   /* 1 MHz */
+    }
+
+  kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET);
+
+#elif BOARD_BUS_FREQ == 40000000
+  if (frequency < 400000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV384_2, KINETIS_I2C_F_OFFSET);  /* 104 kHz */
+    }
+  else if (frequency < 1000000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV96, KINETIS_I2C_F_OFFSET);     /* 416 kHz */
+    }
+  else
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV40_2, KINETIS_I2C_F_OFFSET);   /* 1 MHz */
+    }
+
+  kinetis_i2c_putreg(priv, I2C_FLT(3), KINETIS_I2C_FLT_OFFSET);
+
+#elif BOARD_BUS_FREQ == 36000000
+  if (frequency < 400000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV320_2, KINETIS_I2C_F_OFFSET);  /* 113 kHz */
+    }
+  else if (frequency < 1000000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV96, KINETIS_I2C_F_OFFSET);     /* 375 kHz */
+    }
+  else
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV36, KINETIS_I2C_F_OFFSET);     /* 1 MHz */
+    }
+
+  kinetis_i2c_putreg(priv, I2C_FLT(3), KINETIS_I2C_FLT_OFFSET);
+
+#elif BOARD_BUS_FREQ == 24000000
+  if (frequency < 400000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV240, KINETIS_I2C_F_OFFSET);    /* 100 kHz */
+    }
+  else if (frequency < 1000000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV64, KINETIS_I2C_F_OFFSET);     /* 375 kHz */
+    }
+  else
+    {161
+      kinetis_i2c_putreg(priv, I2C_F_DIV24, KINETIS_I2C_F_OFFSET);     /* 1 MHz */
+    }
+
+  kinetis_i2c_putreg(priv, I2C_FLT(2), KINETIS_I2C_FLT_OFFSET);
+
+#elif BOARD_BUS_FREQ == 16000000
+  if (frequency < 400000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV160_2, KINETIS_I2C_F_OFFSET);  /* 100 kHz */
+    }
+  else if (frequency < 1000000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV40_1, KINETIS_I2C_F_OFFSET);   /* 400 kHz */
+    }
+  else
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV20, KINETIS_I2C_F_OFFSET);     /* 800 MHz */
+    }
+
+  kinetis_i2c_putreg(priv, I2C_FLT(1), KINETIS_I2C_FLT_OFFSET);
+
+#elif BOARD_BUS_FREQ == 8000000
+  if (frequency < 400000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV80_1, KINETIS_I2C_F_OFFSET);   /* 100 kHz */
+    }
+  else
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV20, KINETIS_I2C_F_OFFSET);     /* 400 kHz */
+    }
+
+  kinetis_i2c_putreg(priv, I2C_FLT(1), KINETIS_I2C_FLT_OFFSET);
+
+#elif BOARD_BUS_FREQ == 4000000
+  if (frequency < 400000)
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV40_1, KINETIS_I2C_F_OFFSET);   /* 100 kHz */
+    }
+  else
+    {
+      kinetis_i2c_putreg(priv, I2C_F_DIV20, KINETIS_I2C_F_OFFSET);     /* 200 kHz */
+    }
+
+  kinetis_i2c_putreg(priv, I2C_FLT(1), KINETIS_I2C_FLT_OFFSET);
+
+#elif BOARD_BUS_FREQ == 2000000
+  kinetis_i2c_putreg(priv, I2C_F_DIV20, KINETIS_I2C_F_OFFSET);         /* 100 kHz */
+  kinetis_i2c_putreg(priv, I2C_FLT(1), KINETIS_I2C_FLT_OFFSET);
+
+#else
+#  error "F_BUS must be 120, 108, 96, 9, 80, 72, 64, 60, 56, 54, 48, 40, 36, 24, 16, 8, 4 or 2 MHz"
+#endif
+
+  priv->frequency = frequency;
+}
+
+/****************************************************************************
+ * Name: kinetis_i2c_start
+ *
+ * Description:
+ *   Initiate I2C transfer (START/RSTART + address)
+ *
+ ****************************************************************************/
+
+static int kinetis_i2c_start(struct kinetis_i2cdev_s *priv)
+{
+  struct i2c_msg_s *msg;
+
+  i2cinfo("START msg=%p\n", priv->msgs);
+  msg = priv->msgs;
+
+  /* Now take control of the bus */
+
+  if (kinetis_i2c_getreg(priv, KINETIS_I2C_C1_OFFSET) & I2C_C1_MST)
+    {
+      /* We are already the bus master, so send a repeated start */
+
+      kinetis_i2c_putreg(priv, I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST |
+                         I2C_C1_RSTA | I2C_C1_TX, KINETIS_I2C_C1_OFFSET);
+    }
+  else
+    {
+      /* We are not currently the bus master, so wait for bus ready */
+
+      while (kinetis_i2c_getreg(priv, KINETIS_I2C_S_OFFSET) & I2C_S_BUSY);
+
+      /* Become the bus master in transmit mode (send start) */
+
+      kinetis_i2c_putreg(priv, I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST |
+                         I2C_C1_TX,  KINETIS_I2C_C1_OFFSET);
+    }
+
+  if (I2C_M_READ & msg->flags)  /* DEBUG: should happen always */
+    {
+      /* Wait until start condition establishes control of the bus */
+
+      while (1)
+        {
+          if (kinetis_i2c_getreg(priv, KINETIS_I2C_S_OFFSET) & I2C_S_BUSY)
+            {
+              break;
+            }
+        }
+    }
+
+  /* Initiate actual transfer (send address) */
+
+  kinetis_i2c_putreg(priv, (I2C_M_READ & msg->flags) == I2C_M_READ ?
+                     I2C_READADDR8(msg->addr) : I2C_WRITEADDR8(msg->addr),
+                     KINETIS_I2C_D_OFFSET);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: kinetis_i2c_stop
+ *
+ * Description:
+ *   Perform a I2C transfer stop
+ *
+ ****************************************************************************/
+
+static void kinetis_i2c_stop(struct kinetis_i2cdev_s *priv)
+{
+  i2cinfo("STOP msg=%p\n", priv->msgs);
+
+  kinetis_i2c_putreg(priv, I2C_C1_IICEN | I2C_C1_IICIE,
+                     KINETIS_I2C_C1_OFFSET);
+  sem_post(&priv->wait);
+}
+
+/****************************************************************************
+ * Name: kinetis_i2c_timeout
+ *
+ * Description:
+ *   Watchdog timer for timeout of I2C operation
+ *
+ ****************************************************************************/
+
+static void kinetis_i2c_timeout(int argc, uint32_t arg, ...)
+{
+  struct kinetis_i2cdev_s *priv = (struct kinetis_i2cdev_s *)arg;
+
+  DEBUGASSERT(priv != NULL);
+  i2cinfo("Timeout msg=%p\n", priv->msgs);
+
+  irqstate_t flags = enter_critical_section();
+  priv->state = STATE_TIMEOUT;
+  sem_post(&priv->wait);
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: kinetis_i2c_nextmsg
+ *
+ * Description:
+ *   Setup for the next message.
+ *
+ ****************************************************************************/
+
+void kinetis_i2c_nextmsg(struct kinetis_i2cdev_s *priv)
+{
+  priv->nmsg--;
+  i2cinfo("nmsg=%u\n", priv->nmsg);
+
+  if (priv->nmsg > 0)
+    {
+      priv->msgs++;
+      i2cinfo("msg=%p\n", priv->msgs);
+
+      priv->wrcnt = 0;
+      priv->rdcnt = 0;
+
+      if (priv->restart)
+        {
+          sem_post(&priv->wait);
+        }
+    }
+  else
+    {
+      kinetis_i2c_stop(priv);
+    }
+}
+
+/****************************************************************************
+ * Name: kinetis_i2c_interrupt
+ *
+ * Description:
+ *   The I2C common interrupt handler
+ *
+ ****************************************************************************/
+
+static int kinetis_i2c_interrupt(int irq, void *context, void *arg)
+{
+  struct kinetis_i2cdev_s *priv = (struct kinetis_i2cdev_s *)arg;
+  struct i2c_msg_s *msg;
+  uint32_t state;
+  int regval;
+  int dummy;
+  UNUSED(dummy);
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Get current state */
+
+  state = kinetis_i2c_getreg(priv, KINETIS_I2C_S_OFFSET);
+  msg = priv->msgs;
+
+  /* Arbitration lost */
+
+  if (state & I2C_S_ARBL)
+    {
+      kinetis_i2c_putreg(priv, I2C_S_IICIF | I2C_S_ARBL,
+                         KINETIS_I2C_S_OFFSET);
+      priv->state = STATE_ARBITRATION_ERROR;
+      kinetis_i2c_stop(priv);
+    }
+  else
+    {
+      /* Clear interrupt */
+
+      kinetis_i2c_putreg(priv, I2C_S_IICIF, KINETIS_I2C_S_OFFSET);
+      regval = kinetis_i2c_getreg(priv, KINETIS_I2C_C1_OFFSET);
+
+      /* TX mode */
+
+      if (regval & I2C_C1_TX)
+        {
+          /* Last write was not acknowledged */
+
+          if (state & I2C_S_RXAK)
+            {
+              priv->state = STATE_NAK;  /* Set error flag */
+              kinetis_i2c_stop(priv);   /* Send STOP */
+            }
+          else
+            {
+              /* Actually intending to write */
+
+              if ((I2C_M_READ & msg->flags) == 0)
+                {
+                  /* Wrote everything */
+
+                  if (priv->wrcnt == msg->length)
+                    {
+                      /* Continue with next message */
+
+                      kinetis_i2c_nextmsg(priv);
+
+                      if (!priv->restart)
+                        {
+                          /* Initiate transfer of following message */
+
+                          kinetis_i2c_putreg(priv,
+                                             priv->msgs->buffer[priv->wrcnt],
+                                             KINETIS_I2C_D_OFFSET);
+                          priv->wrcnt++;
+
+                          sem_post(&priv->wait);
+                        }
+                    }
+                  else
+                    {
+                      /* Put next byte */
+
+                      kinetis_i2c_putreg(priv, msg->buffer[priv->wrcnt],
+                                         KINETIS_I2C_D_OFFSET);
+                      priv->wrcnt++;
+                    }
+                }
+
+              /* Actually intending to read (address was just sent) */
+
+              else
+                {
+                  if (msg->length == 1 && priv->restart)
+                    {
+                      /* Go to RX mode, do not send ACK */
+
+                      kinetis_i2c_putreg(priv, I2C_C1_IICEN | I2C_C1_IICIE |
+                                         I2C_C1_MST | I2C_C1_TXAK,
+                                         KINETIS_I2C_C1_OFFSET);
+                    }
+                  else
+                    {
+                      /* Go to RX mode */
+
+                      kinetis_i2c_putreg(priv, I2C_C1_IICEN | I2C_C1_IICIE |
+                                         I2C_C1_MST, KINETIS_I2C_C1_OFFSET);
+                    }
+
+                  /* TODO: handle zero-length reads */
+                  /* Dummy read to initiate reception */
+
+                  dummy = kinetis_i2c_getreg(priv, KINETIS_I2C_D_OFFSET);
+                }
+            }
+        }
+
+      /* RX: mode */
+
+      else
+        {
+          /* If last receiving byte */
+
+          if (priv->rdcnt == (msg->length - 1))
+            {
+              if (priv->restart)
+                {
+                  /* Go to TX mode before last read, otherwise a new read is
+                   * triggered.
+                   */
+
+                  /* Go to TX mode */
+
+                  kinetis_i2c_putreg(priv, I2C_C1_IICEN | I2C_C1_IICIE |
+                                     I2C_C1_MST | I2C_C1_TX,
+                                     KINETIS_I2C_C1_OFFSET);
+                }
+              else if ((priv->msgs + 1)->length == 1)
+                {
+                  /* We will continue reception on next message.
+                   * if next message is length == 1, this is actually the
+                   * 2nd to last byte, so do not send ACK.
+                   */
+
+                  /* Do not ACK any more */
+
+                  kinetis_i2c_putreg(priv, I2C_C1_IICEN | I2C_C1_IICIE |
+                                     I2C_C1_MST | I2C_C1_TXAK,
+                                     KINETIS_I2C_C1_OFFSET);
+                }
+
+              msg->buffer[priv->rdcnt] =
+                kinetis_i2c_getreg(priv, KINETIS_I2C_D_OFFSET);
+              priv->rdcnt++;
+
+              kinetis_i2c_nextmsg(priv);
+            }
+
+          /* Second to last receiving byte */
+
+          else if (priv->rdcnt == (msg->length - 2))
+            {
+              if (priv->restart)
+                {
+                  /* Do not ACK any more */
+
+                  kinetis_i2c_putreg(priv, I2C_C1_IICEN | I2C_C1_IICIE |
+                                     I2C_C1_MST | I2C_C1_TXAK, KINETIS_I2C_C1_OFFSET);
+                }
+
+              msg->buffer[priv->rdcnt] =
+                kinetis_i2c_getreg(priv, KINETIS_I2C_D_OFFSET);
+              priv->rdcnt++;
+            }
+          else
+            {
+              msg->buffer[priv->rdcnt] =
+                kinetis_i2c_getreg(priv, KINETIS_I2C_D_OFFSET);
+              priv->rdcnt++;
+            }
+        }
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: kinetis_i2c_transfer
+ *
+ * Description:
+ *   Perform a sequence of I2C transfers
+ *
+ ****************************************************************************/
+
+static int kinetis_i2c_transfer(struct i2c_master_s *dev,
+                                struct i2c_msg_s *msgs, int count)
+{
+  struct kinetis_i2cdev_s *priv = (struct kinetis_i2cdev_s *)dev;
+  int msg_n;
+
+  i2cinfo("msgs=%p count=%d\n", msgs, count);
+  DEBUGASSERT(dev != NULL && msgs != NULL && (unsigned)count <= UINT16_MAX);
+
+  /* Get exclusive access to the I2C bus */
+
+  sem_wait(&priv->mutex);
+
+  /* Set up for the transfer */
+
+  msg_n       = 0;
+  priv->msgs  = msgs;
+  priv->nmsg  = count;
+  priv->state = STATE_OK;
+  priv->wrcnt = 0;
+  priv->rdcnt = 0;
+
+  /* Configure the I2C frequency. REVISIT: Note that the frequency is set
+   * only on the first message. This could be extended to support
+   * different transfer frequencies for each message segment.
+   */
+
+  kinetis_i2c_setfrequency(priv, msgs->frequency);
+
+  /* Clear the status flags */
+
+  kinetis_i2c_putreg(priv, I2C_S_IICIF | I2C_S_ARBL, KINETIS_I2C_S_OFFSET);
+
+  /* Process every message */
+
+  while (priv->nmsg > 0 && priv->state == STATE_OK)
+    {
+      priv->restart = true;
+
+      /* Process NORESTART flag */
+
+      if (priv->nmsg > 1)
+        {
+          struct i2c_msg_s* nextmsg = (priv->msgs + 1);
+
+          /* If there is a following message with "norestart" flag of
+           * the same type as the current one, we can avoid the restart
+           */
+
+          if ((nextmsg->flags & I2C_M_NORESTART) &&
+              nextmsg->addr == priv->msgs->addr &&
+              nextmsg->frequency == priv->msgs->frequency &&
+              (nextmsg->flags & I2C_M_READ) == (priv->msgs->flags & I2C_M_READ))
+            {
+              /* "no restart" can be performed */
+
+              priv->restart = false;
+            }
+        }
+
+      /* Only send start when required (we are trusting the flags setting to
+       * be correctly used here).
+       */
+
+      if (!(priv->msgs->flags & I2C_M_NORESTART))
+        {
+          /* Initiate the transfer, in case restart is required */
+
+          kinetis_i2c_start(priv);
+        }
+
+      /* Wait for transfer complete */
+
+      wd_start(priv->timeout, I2C_TIMEOUT, kinetis_i2c_timeout, 1,
+               (uint32_t) priv);
+      sem_wait(&priv->wait);
+
+      wd_cancel(priv->timeout);
+
+      msg_n++;
+    }
+
+  /* Disable interrupts */
+
+  kinetis_i2c_putreg(priv, I2C_C1_IICEN, KINETIS_I2C_C1_OFFSET);
+
+  /* Release access to I2C bus */
+
+  sem_post(&priv->mutex);
+
+  if (priv->state != STATE_OK)
+    {
+      return -EIO;
+    }
+  else
+    {
+      return 0;
+    }
+}
+
+/************************************************************************************
+ * Name: kinetis_i2c_reset
+ *
+ * Description:
+ *   Perform an I2C bus reset in an attempt to break loose stuck I2C devices.
+ *
+ * Input Parameters:
+ *   dev   - Device-specific state data
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_I2C_RESET
+static int kinetis_i2c_reset(struct i2c_master_s *dev)
+{
+  i2cinfo("No reset...\n");
+  return OK;
+}
+#endif  /* CONFIG_I2C_RESET */
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: kinetis_i2cbus_initialize
+ *
+ * Description:
+ *   Initialise an I2C device
+ *
+ ****************************************************************************/
+
+struct i2c_master_s *kinetis_i2cbus_initialize(int port)
+{
+  struct kinetis_i2cdev_s *priv;
+
+  i2cinfo("port=%d\n", port);
+
+  if (port > 1)
+    {
+      i2cerr("ERROR: Kinetis I2C Only suppors ports 0 and 1\n");
+      return NULL;
+    }
+
+  irqstate_t flags;
+  uint32_t regval;
+
+  flags = enter_critical_section();
+
+#ifdef CONFIG_KINETIS_I2C0
+  if (port == 0)
+    {
+      priv           = &g_i2c0_dev;
+      priv->base     = KINETIS_I2C0_BASE;
+      priv->irqid    = KINETIS_IRQ_I2C0;
+      priv->basefreq = BOARD_BUS_FREQ;
+
+      /* Enable clock */
+
+      regval         = getreg32(KINETIS_SIM_SCGC4);
+      regval        |= SIM_SCGC4_I2C0;
+      putreg32(regval, KINETIS_SIM_SCGC4);
+
+      /* Disable while configuring */
+
+      kinetis_i2c_putreg(priv, 0, KINETIS_I2C_C1_OFFSET);
+
+      /* Configure pins */
+
+      kinetis_pinconfig(PIN_I2C0_SCL);
+      kinetis_pinconfig(PIN_I2C0_SDA);
+    }
+  else
+#endif
+#ifdef CONFIG_KINETIS_I2C1
+  if (port == 1)
+    {
+      priv           = &g_i2c1_dev;
+      priv->base     = KINETIS_I2C1_BASE;
+      priv->irqid    = KINETIS_IRQ_I2C1;
+      priv->basefreq = BOARD_BUS_FREQ;
+
+      /* Enable clock */
+
+      regval         = getreg32(KINETIS_SIM_SCGC4);
+      regval        |= SIM_SCGC4_I2C1;
+      putreg32(regval, KINETIS_SIM_SCGC4);
+
+      /* Disable while configuring */
+
+      kinetis_i2c_putreg(priv, 0, KINETIS_I2C_C1_OFFSET);
+
+      /* Configure pins */
+
+      kinetis_pinconfig(PIN_I2C1_SCL);
+      kinetis_pinconfig(PIN_I2C1_SDA);
+    }
+  else
+#endif
+#ifdef CONFIG_KINETIS_I2C2
+  if (port == 2)
+    {
+      priv           = &g_i2c2_dev;
+      priv->base     = KINETIS_I2C2_BASE;
+      priv->irqid    = KINETIS_IRQ_I2C2;
+      priv->basefreq = BOARD_BUS_FREQ;
+
+      /* Enable clock */
+
+      regval         = getreg32(KINETIS_SIM_SCGC4);
+      regval        |= SIM_SCGC4_I2C2;
+      putreg32(regval, KINETIS_SIM_SCGC4);
+
+      /* Disable while configuring */
+
+      kinetis_i2c_putreg(priv, 0, KINETIS_I2C_C1_OFFSET);
+
+      /* Configure pins */
+
+      kinetis_pinconfig(PIN_I2C2_SCL);
+      kinetis_pinconfig(PIN_I2C2_SDA);
+    }
+  else
+#endif
+    {
+      leave_critical_section(flags);
+      i2cerr("ERROR: Unsupport I2C bus: %d\n", port);
+      return NULL;
+    }
+
+  /* Set the default I2C frequency */
+
+  kinetis_i2c_setfrequency(priv, I2C_DEFAULT_FREQUENCY);
+
+  /* Enable */
+
+  kinetis_i2c_putreg(priv, I2C_C1_IICEN, KINETIS_I2C_C1_OFFSET);
+
+  /* High-drive select (TODO: why)? */
+
+  regval = kinetis_i2c_getreg(priv, KINETIS_I2C_C2_OFFSET);
+  regval |= I2C_C2_HDRS;
+  kinetis_i2c_putreg(priv, regval, KINETIS_I2C_C2_OFFSET);
+
+  leave_critical_section(flags);
+
+  /* Initialize semaphores */
+
+  sem_init(&priv->mutex, 0, 1);
+  sem_init(&priv->wait, 0, 0);
+
+  /* The wait semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->wait, SEM_PRIO_NONE);
+
+  /* Allocate a watchdog timer */
+
+  priv->timeout = wd_create();
+  DEBUGASSERT(priv->timeout != 0);
+
+  /* Attach Interrupt Handler */
+
+  irq_attach(priv->irqid, kinetis_i2c_interrupt, priv);
+
+  /* Enable Interrupt Handler */
+
+  up_enable_irq(priv->irqid);
+
+  /* Install our operations */
+
+  priv->dev.ops = &g_i2c_ops;
+  return &priv->dev;
+}
+
+/****************************************************************************
+ * Name: kinetis_i2cbus_uninitialize
+ *
+ * Description:
+ *   Uninitialise an I2C device
+ *
+ ****************************************************************************/
+
+int kinetis_i2cbus_uninitialize(struct i2c_master_s *dev)
+{
+  struct kinetis_i2cdev_s *priv = (struct kinetis_i2cdev_s *)dev;
+
+  DEBUGASSERT(priv != NULL);
+
+  kinetis_i2c_putreg(priv, 0, KINETIS_I2C_C1_OFFSET);
+
+  up_disable_irq(priv->irqid);
+  irq_detach(priv->irqid);
+  return OK;
+}
+
+#endif /* CONFIG_KINETIS_I2C0 || CONFIG_KINETIS_I2C1 || CONFIG_KINETIS_I2C2 */
diff --git a/arch/arm/src/kinetis/kinetis_i2c.h b/arch/arm/src/kinetis/kinetis_i2c.h
index bee9ef92db16c19ffe2dc0eb1815140211295345..098e4d39add5981788688eff46db049908210a33 100644
--- a/arch/arm/src/kinetis/kinetis_i2c.h
+++ b/arch/arm/src/kinetis/kinetis_i2c.h
@@ -1,8 +1,8 @@
-/********************************************************************************************
+/****************************************************************************
  * arch/arm/src/kinetis/kinetis_i2c.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author:  Matias v01d 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -31,155 +31,57 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************************************/
+ ****************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_I2CE_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_I2CE_H
+#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_I2C_H
+#define __ARCH_ARM_SRC_KINETIS_KINETIS_I2C_H
 
-/********************************************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************************************/
+ ****************************************************************************/
 
 #include 
+#include 
+#include "chip/kinetis_i2c.h"
 
-#include "chip.h"
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
 
-/********************************************************************************************
- * Pre-processor Definitions
- ********************************************************************************************/
-
-/* Register Offsets *************************************************************************/
-
-#define KINETIS_I2C_A1_OFFSET    0x0000 /* I2C Address Register 1 */
-#define KINETIS_I2C_F_OFFSET     0x0001 /* I2C Frequency Divider register */
-#define KINETIS_I2C_C1_OFFSET    0x0002 /* I2C Control Register 1 */
-#define KINETIS_I2C_S_OFFSET     0x0003 /* I2C Status Register */
-#define KINETIS_I2C_D_OFFSET     0x0004 /* I2C Data I/O register */
-#define KINETIS_I2C_C2_OFFSET    0x0005 /* I2C Control Register 2 */
-#define KINETIS_I2C_FLT_OFFSET   0x0006 /* I2C Programmable Input Glitch Filter register */
-#define KINETIS_I2C_RA_OFFSET    0x0007 /* I2C Range Address register */
-#define KINETIS_I2C_SMB_OFFSET   0x0008 /* I2C SMBus Control and Status register */
-#define KINETIS_I2C_A2_OFFSET    0x0009 /* I2C Address Register 2 */
-#define KINETIS_I2C_SLTH_OFFSET  0x000a /* I2C SCL Low Timeout Register High */
-#define KINETIS_I2C_SLTL_OFFSET  0x000b /* I2C SCL Low Timeout Register Low */
-
-/* Register Addresses ***********************************************************************/
-
-#define KINETIS_I2C0_A1          (KINETIS_I2C0_BASE+KINETIS_I2C_A1_OFFSET)
-#define KINETIS_I2C0_F           (KINETIS_I2C0_BASE+KINETIS_I2C_F_OFFSET)
-#define KINETIS_I2C0_C1          (KINETIS_I2C0_BASE+KINETIS_I2C_C1_OFFSET)
-#define KINETIS_I2C0_S           (KINETIS_I2C0_BASE+KINETIS_I2C_S_OFFSET)
-#define KINETIS_I2C0_D           (KINETIS_I2C0_BASE+KINETIS_I2C_D_OFFSET)
-#define KINETIS_I2C0_C2          (KINETIS_I2C0_BASE+KINETIS_I2C_C2_OFFSET)
-#define KINETIS_I2C0_FLT         (KINETIS_I2C0_BASE+KINETIS_I2C_FLT_OFFSET)
-#define KINETIS_I2C0_RA          (KINETIS_I2C0_BASE+KINETIS_I2C_RA_OFFSET)
-#define KINETIS_I2C0_SMB         (KINETIS_I2C0_BASE+KINETIS_I2C_SMB_OFFSET)
-#define KINETIS_I2C0_A2          (KINETIS_I2C0_BASE+KINETIS_I2C_A2_OFFSET)
-#define KINETIS_I2C0_SLTH        (KINETIS_I2C0_BASE+KINETIS_I2C_SLTH_OFFSET)
-#define KINETIS_I2C0_SLTL        (KINETIS_I2C0_BASE+KINETIS_I2C_SLTL_OFFSET)
-
-#define KINETIS_I2C1_A1          (KINETIS_I2C1_BASE+KINETIS_I2C_A1_OFFSET)
-#define KINETIS_I2C1_F           (KINETIS_I2C1_BASE+KINETIS_I2C_F_OFFSET)
-#define KINETIS_I2C1_C1          (KINETIS_I2C1_BASE+KINETIS_I2C_C1_OFFSET)
-#define KINETIS_I2C1_S           (KINETIS_I2C1_BASE+KINETIS_I2C_S_OFFSET)
-#define KINETIS_I2C1_D           (KINETIS_I2C1_BASE+KINETIS_I2C_D_OFFSET)
-#define KINETIS_I2C1_C2          (KINETIS_I2C1_BASE+KINETIS_I2C_C2_OFFSET)
-#define KINETIS_I2C1_FLT         (KINETIS_I2C1_BASE+KINETIS_I2C_FLT_OFFSET)
-#define KINETIS_I2C1_RA          (KINETIS_I2C1_BASE+KINETIS_I2C_RA_OFFSET)
-#define KINETIS_I2C1_SMB         (KINETIS_I2C1_BASE+KINETIS_I2C_SMB_OFFSET)
-#define KINETIS_I2C1_A2          (KINETIS_I2C1_BASE+KINETIS_I2C_A2_OFFSET)
-#define KINETIS_I2C1_SLTH        (KINETIS_I2C1_BASE+KINETIS_I2C_SLTH_OFFSET)
-#define KINETIS_I2C1_SLTL        (KINETIS_I2C1_BASE+KINETIS_I2C_SLTL_OFFSET)
-
-/* Register Bit Definitions *****************************************************************/
-
-/* I2C Address Register 1 (8-bit) */
-                                           /* Bit 0: Reserved */
-#define I2C_A1_SHIFT             (1)       /* Bits 1-7: Address */
-#define I2C_A1_MASK              (0x7f << I2C_A1_SHIFT)
-
-/* I2C Frequency Divider register (8-bit) */
-
-#define I2C_F_ICR_SHIFT          (0)       /* Bits 0-5: Clock rate */
-#define I2C_F_ICR_MASK           (0x3f << I2C_F_ICR_SHIFT)
-#define I2C_F_MULT_SHIFT         (6)       /* Bits 6-7: Multiplier factor */
-#define I2C_F_MULT_MASK          (3 << I2C_F_MULT_SHIFT)
-#  define I2C_F_MULT_1           (0 << I2C_F_MULT_SHIFT)
-#  define I2C_F_MULT_2           (1 << I2C_F_MULT_SHIFT)
-#  define I2C_F_MULT_4           (2 << I2C_F_MULT_SHIFT)
-
-/* I2C Control Register 1 (8-bit) */
-
-#define I2C_C1_DMAEN             (1 << 0)  /* Bit 0:  DMA enable */
-#define I2C_C1_WUEN              (1 << 1)  /* Bit 1:  Wakeup enable */
-#define I2C_C1_RSTA              (1 << 2)  /* Bit 2:  Repeat START */
-#define I2C_C1_TXAK              (1 << 3)  /* Bit 3:  Transmit acknowledge enable */
-#define I2C_C1_TX                (1 << 4)  /* Bit 4:  Transmit mode select */
-#define I2C_C1_MST               (1 << 5)  /* Bit 5:  Master mode select */
-#define I2C_C1_IICIE             (1 << 6)  /* Bit 6:  I2C interrupt enable */
-#define I2C_C1_IICEN             (1 << 7)  /* Bit 7:  I2C enable */
-
-/* I2C Status Register (8-bit) */
-
-#define I2C_S_RXAK               (1 << 0)  /* Bit 0:  Receive acknowledge */
-#define I2C_S_IICIF              (1 << 1)  /* Bit 1:  Interrupt flag */
-#define I2C_S_SRW                (1 << 2)  /* Bit 2:  Slave read/write */
-#define I2C_S_RAM                (1 << 3)  /* Bit 3:  Range address match */
-#define I2C_S_ARBL               (1 << 4)  /* Bit 4:  Arbitration lost */
-#define I2C_S_BUSY               (1 << 5)  /* Bit 5:  Bus busy */
-#define I2C_S_IAAS               (1 << 6)  /* Bit 6:  Addressed as a slave */
-#define I2C_S_TCF                (1 << 7)  /* Bit 7:  Transfer complete flag */
-
-/* I2C Data I/O register (8-bit data register) */
-
-/* I2C Control Register 2 (8-bit) */
-
-#define I2C_C2_AD_SHIFT          (0)       /* Bits 0-2: Slave address */
-#define I2C_C2_AD_MASK           (7 << I2C_C2_AD_SHIFT)
-#define I2C_C2_RMEN              (1 << 3)  /* Bit 3:  Range address matching enable */
-#define I2C_C2_SBRC              (1 << 4)  /* Bit 4:  Slave baud rate control */
-#define I2C_C2_HDRS              (1 << 5)  /* Bit 5:  High drive select */
-#define I2C_C2_ADEXT             (1 << 6)  /* Bit 6:  Address extension */
-#define I2C_C2_GCAEN             (1 << 7)  /* Bit 7:  General call address enable */
-
-/* I2C Programmable Input Glitch Filter register (8-bit) */
-                                           /* Bits 5-7: Reserved */
-#define I2C_FLT_SHIFT            (0)       /* Bits 0-4: I2C programmable filter factor */
-#define I2C_FLT_MASK             (31 << I2C_FLT_SHIFT)
-
-/* I2C Range Address register (8-bit) */
-                                           /* Bit 0: Reserved */
-#define I2C_RA_SHIFT             (1)       /* Bits 1-7: Range slave address */
-#define I2C_RA_MASK              (0x7f << I2C_RA_SHIFT)
-
-/* I2C SMBus Control and Status register (8-bit) */
-
-#define I2C_SMB_SHTF2IE          (1 << 0)  /* Bit 0:  SHTF2 interrupt enable */
-#define I2C_SMB_SHTF2            (1 << 1)  /* Bit 1:  SCL high timeout flag 2 */
-#define I2C_SMB_SHTF1            (1 << 2)  /* Bit 2:  SCL high timeout flag 1 */
-#define I2C_SMB_SLTF             (1 << 3)  /* Bit 3:  SCL low timeout flag */
-#define I2C_SMB_TCKSEL           (1 << 4)  /* Bit 4:  Timeout counter clock select */
-#define I2C_SMB_SIICAEN          (1 << 5)  /* Bit 5:  Second I2C address enable */
-#define I2C_SMB_ALERTEN          (1 << 6)  /* Bit 6:  SMBus alert response address enable */
-#define I2C_SMB_FACK             (1 << 7)  /* Bit 7:  Fast NACK/ACK enable */
-
-/* I2C Address Register 2 (8-bit) */
-                                           /* Bit 0: Reserved */
-#define I2C_A2_SHIFT             (1)       /* Bits 1-7: SMBus address */
-#define I2C_A2_MASK              (0x7f << I2C_A2_SHIFT)
-
-/* I2C SCL Low Timeout Register High/Low (16-bit data in two 8-bit registers) */
+/****************************************************************************
+ * Name: kinetis_i2cbus_initialize
+ *
+ * Description:
+ *   Initialize the selected I2C port. And return a unique instance of struct
+ *   struct i2c_master_s.  This function may be called to obtain multiple
+ *   instances of the interface, each of which may be set up with a
+ *   different frequency and slave address.
+ *
+ * Input Parameter:
+ *   Port number (for hardware that has multiple I2C interfaces)
+ *
+ * Returned Value:
+ *   Valid I2C device structure reference on succcess; a NULL on failure
+ *
+ ****************************************************************************/
 
-/********************************************************************************************
- * Public Types
- ********************************************************************************************/
+FAR struct i2c_master_s *kinetis_i2cbus_initialize(int port);
 
-/********************************************************************************************
- * Public Data
- ********************************************************************************************/
+/****************************************************************************
+ * Name: kinetis_i2cbus_uninitialize
+ *
+ * Description:
+ *   De-initialize the selected I2C port, and power down the device.
+ *
+ * Input Parameter:
+ *   Device structure as returned by the lpc43_i2cbus_initialize()
+ *
+ * Returned Value:
+ *   OK on success, ERROR when internal reference count mismatch or dev
+ *   points to invalid hardware device.
+ *
+ ****************************************************************************/
 
-/********************************************************************************************
- * Public Functions
- ********************************************************************************************/
+int kinetis_i2cbus_uninitialize(FAR struct i2c_master_s *dev);
 
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_I2CE_H */
+#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_I2C_H */
diff --git a/arch/arm/src/kinetis/kinetis_irq.c b/arch/arm/src/kinetis/kinetis_irq.c
index 44f21af47d611f546d8c80d9c2c13bc2b6aedcb5..f75085d7b552df4c0356741cc4101b0d6d748341 100644
--- a/arch/arm/src/kinetis/kinetis_irq.c
+++ b/arch/arm/src/kinetis/kinetis_irq.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/lpc17/kinetis_irq.c
+ * arch/arm/src/kinetis/kinetis_irq.c
  *
  *   Copyright (C) 2011, 2013-2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -105,50 +105,51 @@ extern uint32_t _vectors[];
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_IRQ)
+#if defined(CONFIG_DEBUG_IRQ_INFO)
 static void kinetis_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = enter_critical_section();
-  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  lldbg("  INTCTRL:    %08x VECTAB: %08x\n",
-        getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
+
+  irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
+  irqinfo("  INTCTRL:    %08x VECTAB: %08x\n",
+          getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
 #if 0
-  lldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
-        getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
-        getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+  irqinfo("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+          getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
+          getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
 #endif
-  lldbg("  IRQ ENABLE: %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
-        getreg32(NVIC_IRQ64_95_ENABLE), getreg32(NVIC_IRQ96_127_ENABLE));
-  lldbg("  SYSH_PRIO:  %08x %08x %08x\n",
-        getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
-        getreg32(NVIC_SYSH12_15_PRIORITY));
-  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
-        getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
-        getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
-        getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
-        getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
-        getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ80_83_PRIORITY), getreg32(NVIC_IRQ84_87_PRIORITY),
-        getreg32(NVIC_IRQ88_91_PRIORITY), getreg32(NVIC_IRQ92_95_PRIORITY));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ96_99_PRIORITY), getreg32(NVIC_IRQ100_103_PRIORITY),
-        getreg32(NVIC_IRQ104_107_PRIORITY), getreg32(NVIC_IRQ108_111_PRIORITY));
+  irqinfo("  IRQ ENABLE: %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
+          getreg32(NVIC_IRQ64_95_ENABLE), getreg32(NVIC_IRQ96_127_ENABLE));
+  irqinfo("  SYSH_PRIO:  %08x %08x %08x\n",
+          getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+          getreg32(NVIC_SYSH12_15_PRIORITY));
+  irqinfo("  IRQ PRIO:   %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
+          getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
+          getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
+          getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
+          getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
+          getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ80_83_PRIORITY), getreg32(NVIC_IRQ84_87_PRIORITY),
+          getreg32(NVIC_IRQ88_91_PRIORITY), getreg32(NVIC_IRQ92_95_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ96_99_PRIORITY), getreg32(NVIC_IRQ100_103_PRIORITY),
+          getreg32(NVIC_IRQ104_107_PRIORITY), getreg32(NVIC_IRQ108_111_PRIORITY));
 #if NR_VECTORS > 111
-  lldbg("              %08x %08x\n",
-        getreg32(NVIC_IRQ112_115_PRIORITY), getreg32(NVIC_IRQ116_119_PRIORITY));
+  irqinfo("              %08x %08x\n",
+          getreg32(NVIC_IRQ112_115_PRIORITY), getreg32(NVIC_IRQ116_119_PRIORITY));
 #endif
 
   leave_critical_section(flags);
@@ -168,51 +169,51 @@ static void kinetis_dumpnvic(const char *msg, int irq)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
-static int kinetis_nmi(int irq, FAR void *context)
+#ifdef CONFIG_DEBUG_FEATURES
+static int kinetis_nmi(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! NMI received\n");
+  _err("PANIC!!! NMI received\n");
   PANIC();
   return 0;
 }
 
-static int kinetis_busfault(int irq, FAR void *context)
+static int kinetis_busfault(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Bus fault recived\n");
+  _err("PANIC!!! Bus fault recived\n");
   PANIC();
   return 0;
 }
 
-static int kinetis_usagefault(int irq, FAR void *context)
+static int kinetis_usagefault(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Usage fault received\n");
+  _err("PANIC!!! Usage fault received\n");
   PANIC();
   return 0;
 }
 
-static int kinetis_pendsv(int irq, FAR void *context)
+static int kinetis_pendsv(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! PendSV received\n");
+  _err("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
 }
 
-static int kinetis_dbgmonitor(int irq, FAR void *context)
+static int kinetis_dbgmonitor(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Debug Monitor received\n");
+  _err("PANIC!!! Debug Monitor received\n");
   PANIC();
   return 0;
 }
 
-static int kinetis_reserved(int irq, FAR void *context)
+static int kinetis_reserved(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Reserved interrupt\n");
+  _err("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;
 }
@@ -257,27 +258,27 @@ static int kinetis_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
 
   /* Check for external interrupt */
 
-  if (irq >= KINETIS_IRQ_EXTINT)
+  if (irq >= KINETIS_IRQ_FIRST)
     {
-      if (irq < (KINETIS_IRQ_EXTINT+32))
+      if (irq < (KINETIS_IRQ_FIRST+32))
         {
            *regaddr = (NVIC_IRQ0_31_ENABLE + offset);
-           *bit     = 1 << (irq - KINETIS_IRQ_EXTINT);
+           *bit     = 1 << (irq - KINETIS_IRQ_FIRST);
         }
-      else if (irq < (KINETIS_IRQ_EXTINT+64))
+      else if (irq < (KINETIS_IRQ_FIRST+64))
         {
            *regaddr = (NVIC_IRQ32_63_ENABLE + offset);
-           *bit     = 1 << (irq - KINETIS_IRQ_EXTINT - 32);
+           *bit     = 1 << (irq - KINETIS_IRQ_FIRST - 32);
         }
-      else if (irq < (KINETIS_IRQ_EXTINT+96))
+      else if (irq < (KINETIS_IRQ_FIRST+96))
         {
            *regaddr = (NVIC_IRQ64_95_ENABLE + offset);
-           *bit     = 1 << (irq - KINETIS_IRQ_EXTINT - 64);
+           *bit     = 1 << (irq - KINETIS_IRQ_FIRST - 64);
         }
       else if (irq < NR_IRQS)
         {
            *regaddr = (NVIC_IRQ96_127_ENABLE + offset);
-           *bit     = 1 << (irq - KINETIS_IRQ_EXTINT - 96);
+           *bit     = 1 << (irq - KINETIS_IRQ_FIRST - 96);
         }
       else
         {
@@ -397,8 +398,8 @@ void up_irqinitialize(void)
    * under certain conditions.
    */
 
-  irq_attach(KINETIS_IRQ_SVCALL, up_svcall);
-  irq_attach(KINETIS_IRQ_HARDFAULT, up_hardfault);
+  irq_attach(KINETIS_IRQ_SVCALL, up_svcall, NULL);
+  irq_attach(KINETIS_IRQ_HARDFAULT, up_hardfault, NULL);
 
   /* Set the priority of the SVCall interrupt */
 
@@ -414,22 +415,22 @@ void up_irqinitialize(void)
    */
 
 #ifdef CONFIG_ARM_MPU
-  irq_attach(KINETIS_IRQ_MEMFAULT, up_memfault);
+  irq_attach(KINETIS_IRQ_MEMFAULT, up_memfault, NULL);
   up_enable_irq(KINETIS_IRQ_MEMFAULT);
 #endif
 
   /* Attach all other processor exceptions (except reset and sys tick) */
 
-#ifdef CONFIG_DEBUG
-  irq_attach(KINETIS_IRQ_NMI, kinetis_nmi);
+#ifdef CONFIG_DEBUG_FEATURES
+  irq_attach(KINETIS_IRQ_NMI, kinetis_nmi, NULL);
 #ifndef CONFIG_ARM_MPU
-  irq_attach(KINETIS_IRQ_MEMFAULT, up_memfault);
+  irq_attach(KINETIS_IRQ_MEMFAULT, up_memfault, NULL);
 #endif
-  irq_attach(KINETIS_IRQ_BUSFAULT, kinetis_busfault);
-  irq_attach(KINETIS_IRQ_USAGEFAULT, kinetis_usagefault);
-  irq_attach(KINETIS_IRQ_PENDSV, kinetis_pendsv);
-  irq_attach(KINETIS_IRQ_DBGMONITOR, kinetis_dbgmonitor);
-  irq_attach(KINETIS_IRQ_RESERVED, kinetis_reserved);
+  irq_attach(KINETIS_IRQ_BUSFAULT, kinetis_busfault, NULL);
+  irq_attach(KINETIS_IRQ_USAGEFAULT, kinetis_usagefault, NULL);
+  irq_attach(KINETIS_IRQ_PENDSV, kinetis_pendsv, NULL);
+  irq_attach(KINETIS_IRQ_DBGMONITOR, kinetis_dbgmonitor, NULL);
+  irq_attach(KINETIS_IRQ_RESERVED, kinetis_reserved, NULL);
 #endif
 
   kinetis_dumpnvic("initial", NR_IRQS);
@@ -438,7 +439,7 @@ void up_irqinitialize(void)
    * configured pin interrupts.
    */
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_KINETIS_GPIOIRQ
   kinetis_pinirqinitialize();
 #endif
 
@@ -471,7 +472,7 @@ void up_disable_irq(int irq)
        * clear the bit in the System Handler Control and State Register.
        */
 
-      if (irq >= KINETIS_IRQ_EXTINT)
+      if (irq >= KINETIS_IRQ_FIRST)
         {
           putreg32(bit, regaddr);
         }
@@ -508,7 +509,7 @@ void up_enable_irq(int irq)
        * set the bit in the System Handler Control and State Register.
        */
 
-      if (irq >= KINETIS_IRQ_EXTINT)
+      if (irq >= KINETIS_IRQ_FIRST)
         {
           putreg32(bit, regaddr);
         }
@@ -559,7 +560,7 @@ int up_prioritize_irq(int irq, int priority)
   DEBUGASSERT(irq >= KINETIS_IRQ_MEMFAULT && irq < NR_IRQS &&
               (unsigned)priority <= NVIC_SYSH_PRIORITY_MIN);
 
-  if (irq < KINETIS_IRQ_EXTINT)
+  if (irq < KINETIS_IRQ_FIRST)
     {
       /* NVIC_SYSH_PRIORITY() maps {0..15} to one of three priority
        * registers (0-3 are invalid)
@@ -572,7 +573,7 @@ int up_prioritize_irq(int irq, int priority)
     {
       /* NVIC_IRQ_PRIORITY() maps {0..} to one of many priority registers */
 
-      irq    -= KINETIS_IRQ_EXTINT;
+      irq    -= KINETIS_IRQ_FIRST;
       regaddr = NVIC_IRQ_PRIORITY(irq);
     }
 
diff --git a/arch/arm/src/kinetis/kinetis_lowputc.c b/arch/arm/src/kinetis/kinetis_lowputc.c
index bd3b27a8769bd97d4945ad5d32e2d6e3637bfd52..31bb32f697b936efb4bce26878539827a5ffb587 100644
--- a/arch/arm/src/kinetis/kinetis_lowputc.c
+++ b/arch/arm/src/kinetis/kinetis_lowputc.c
@@ -1,8 +1,9 @@
 /****************************************************************************
  * arch/arm/src/kinetis/kinetis_lowputc.c
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2011, 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -49,9 +50,10 @@
 
 #include "kinetis_config.h"
 #include "kinetis.h"
-#include "kinetis_uart.h"
-#include "kinetis_sim.h"
-#include "kinetis_pinmux.h"
+#include "chip/kinetis_uart.h"
+#include "chip/kinetis_lpuart.h"
+#include "chip/kinetis_sim.h"
+#include "chip/kinetis_pinmux.h"
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -59,57 +61,84 @@
 
 /* Select UART parameters for the selected console */
 
-#if defined(CONFIG_UART0_SERIAL_CONSOLE)
-#  define CONSOLE_BASE     KINETIS_UART0_BASE
-#  define CONSOLE_FREQ     BOARD_CORECLK_FREQ
-#  define CONSOLE_BAUD     CONFIG_UART0_BAUD
-#  define CONSOLE_BITS     CONFIG_UART0_BITS
-#  define CONSOLE_PARITY   CONFIG_UART0_PARITY
-#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
-#  define CONSOLE_BASE     KINETIS_UART1_BASE
-#  define CONSOLE_FREQ     BOARD_CORECLK_FREQ
-#  define CONSOLE_BAUD     CONFIG_UART1_BAUD
-#  define CONSOLE_BITS     CONFIG_UART1_BITS
-#  define CONSOLE_PARITY   CONFIG_UART1_PARITY
-#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
-#  define CONSOLE_BASE     KINETIS_UART2_BASE
-#  define CONSOLE_FREQ     BOARD_BUS_FREQ
-#  define CONSOLE_BAUD     CONFIG_UART2_BAUD
-#  define CONSOLE_BITS     CONFIG_UART2_BITS
-#  define CONSOLE_PARITY   CONFIG_UART2_PARITY
-#elif defined(CONFIG_UART3_SERIAL_CONSOLE)
-#  define CONSOLE_BASE     KINETIS_UART3_BASE
-#  define CONSOLE_FREQ     BOARD_BUS_FREQ
-#  define CONSOLE_BAUD     CONFIG_UART3_BAUD
-#  define CONSOLE_BITS     CONFIG_UART3_BITS
-#  define CONSOLE_PARITY   CONFIG_UART3_PARITY
-#elif defined(CONFIG_UART4_SERIAL_CONSOLE)
-#  define CONSOLE_BASE     KINETIS_UART4_BASE
-#  define CONSOLE_FREQ     BOARD_BUS_FREQ
-#  define CONSOLE_BAUD     CONFIG_UART4_BAUD
-#  define CONSOLE_BITS     CONFIG_UART4_BITS
-#  define CONSOLE_PARITY   CONFIG_UART4_PARITY
-#elif defined(CONFIG_UART5_SERIAL_CONSOLE)
-#  define CONSOLE_BASE     KINETIS_UART5_BASE
-#  define CONSOLE_FREQ     BOARD_BUS_FREQ
-#  define CONSOLE_BAUD     CONFIG_UART5_BAUD
-#  define CONSOLE_BITS     CONFIG_UART5_BITS
-#  define CONSOLE_PARITY   CONFIG_UART5_PARITY
-#elif defined(HAVE_SERIAL_CONSOLE)
-#  error "No CONFIG_UARTn_SERIAL_CONSOLE Setting"
-#endif
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
+#if defined(HAVE_UART_CONSOLE)
+#  if defined(CONFIG_UART0_SERIAL_CONSOLE)
+#    define CONSOLE_BASE     KINETIS_UART0_BASE
+#    define CONSOLE_FREQ     BOARD_CORECLK_FREQ
+#    define CONSOLE_BAUD     CONFIG_UART0_BAUD
+#    define CONSOLE_BITS     CONFIG_UART0_BITS
+#    define CONSOLE_2STOP    CONFIG_UART0_2STOP
+#    define CONSOLE_PARITY   CONFIG_UART0_PARITY
+#  elif defined(CONFIG_UART1_SERIAL_CONSOLE)
+#    define CONSOLE_BASE     KINETIS_UART1_BASE
+#    define CONSOLE_FREQ     BOARD_CORECLK_FREQ
+#    define CONSOLE_BAUD     CONFIG_UART1_BAUD
+#    define CONSOLE_BITS     CONFIG_UART1_BITS
+#    define CONSOLE_2STOP    CONFIG_UART1_2STOP
+#    define CONSOLE_PARITY   CONFIG_UART1_PARITY
+#  elif defined(CONFIG_UART2_SERIAL_CONSOLE)
+#    define CONSOLE_BASE     KINETIS_UART2_BASE
+#    define CONSOLE_FREQ     BOARD_BUS_FREQ
+#    define CONSOLE_BAUD     CONFIG_UART2_BAUD
+#    define CONSOLE_BITS     CONFIG_UART2_BITS
+#    define CONSOLE_2STOP    CONFIG_UART2_2STOP
+#    define CONSOLE_PARITY   CONFIG_UART2_PARITY
+#  elif defined(CONFIG_UART3_SERIAL_CONSOLE)
+#    define CONSOLE_BASE     KINETIS_UART3_BASE
+#    define CONSOLE_FREQ     BOARD_BUS_FREQ
+#    define CONSOLE_BAUD     CONFIG_UART3_BAUD
+#    define CONSOLE_BITS     CONFIG_UART3_BITS
+#    define CONSOLE_2STOP    CONFIG_UART3_2STOP
+#    define CONSOLE_PARITY   CONFIG_UART3_PARITY
+#  elif defined(CONFIG_UART4_SERIAL_CONSOLE)
+#    define CONSOLE_BASE     KINETIS_UART4_BASE
+#    define CONSOLE_FREQ     BOARD_BUS_FREQ
+#    define CONSOLE_BAUD     CONFIG_UART4_BAUD
+#    define CONSOLE_BITS     CONFIG_UART4_BITS
+#    define CONSOLE_2STOP    CONFIG_UART4_2STOP
+#    define CONSOLE_PARITY   CONFIG_UART4_PARITY
+#  elif defined(CONFIG_UART5_SERIAL_CONSOLE)
+#    define CONSOLE_BASE     KINETIS_UART5_BASE
+#    define CONSOLE_FREQ     BOARD_BUS_FREQ
+#    define CONSOLE_BAUD     CONFIG_UART5_BAUD
+#    define CONSOLE_BITS     CONFIG_UART5_BITS
+#    define CONSOLE_2STOP    CONFIG_UART5_2STOP
+#    define CONSOLE_PARITY   CONFIG_UART5_PARITY
+#  elif defined(HAVE_UART_CONSOLE)
+#    error "No CONFIG_UARTn_SERIAL_CONSOLE Setting"
+#  endif
+#elif defined(HAVE_LPUART_CONSOLE)
+#  if defined(CONFIG_LPUART0_SERIAL_CONSOLE)
+#    define CONSOLE_BASE   KINETIS_LPUART0_BASE
+#    define CONSOLE_FREQ   BOARD_LPUART0_FREQ
+#    define CONSOLE_BAUD   CONFIG_LPUART0_BAUD
+#    define CONSOLE_PARITY CONFIG_LPUART0_PARITY
+#    define CONSOLE_BITS   CONFIG_LPUART0_BITS
+#    define CONSOLE_2STOP  CONFIG_LPUART0_2STOP
+#  elif defined(CONFIG_LPUART1_SERIAL_CONSOLE)
+#    define CONSOLE_BASE   KINETIS_LPUART1_BASE
+#    define CONSOLE_FREQ   BOARD_LPUART1_FREQ
+#    define CONSOLE_BAUD   CONFIG_LPUART1_BAUD
+#    define CONSOLE_PARITY CONFIG_LPUART1_PARITY
+#    define CONSOLE_BITS   CONFIG_LPUART1_BITS
+#    define CONSOLE_2STOP  CONFIG_LPUART1_2STOP
+#  else
+#    error "No LPUART console is selected"
+#  endif
+#endif /* HAVE_UART_CONSOLE */
 
-/****************************************************************************
- * Public Data
- ****************************************************************************/
+#if defined(HAVE_LPUART_CONSOLE)
+#  if ((CONSOLE_FREQ / (CONSOLE_BAUD * 32)) > (LPUART_BAUD_SBR_MASK >> LPUART_BAUD_SBR_SHIFT))
+#    error "LPUART Console: Baud rate not obtainable with this input clock!"
+#  endif
+#  define LPUART_BAUD_INIT (LPUART_BAUD_SBR_MASK | LPUART_BAUD_SBNS | \
+                            LPUART_BAUD_RXEDGIE | LPUART_BAUD_LBKDIE | \
+                            LPUART_BAUD_RESYNCDIS |LPUART_BAUD_BOTHEDGE | \
+                            LPUART_BAUD_MATCFG_MASK | LPUART_BAUD_RDMAE | \
+                            LPUART_BAUD_TDMAE | LPUART_BAUD_OSR_MASK | \
+                            LPUART_BAUD_M10 | LPUART_BAUD_MAEN2 | \
+                            LPUART_BAUD_MAEN2)
+#endif
 
 /****************************************************************************
  * Private Data
@@ -120,13 +149,12 @@
  */
 
 #ifdef CONFIG_KINETIS_UARTFIFOS
-static uint8_t g_sizemap[8] = {1, 4, 8, 16, 32, 64, 128, 0};
+static uint8_t g_sizemap[8] =
+{
+  1, 4, 8, 16, 32, 64, 128, 0
+};
 #endif
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -141,20 +169,20 @@ static uint8_t g_sizemap[8] = {1, 4, 8, 16, 32, 64, 128, 0};
 
 void up_lowputc(char ch)
 {
-#if defined HAVE_UART_DEVICE && defined HAVE_SERIAL_CONSOLE
-#ifdef CONFIG_KINETIS_UARTFIFOS
+#if defined(HAVE_UART_CONSOLE)
+#  ifdef CONFIG_KINETIS_UARTFIFOS
   /* Wait until there is space in the TX FIFO:  Read the number of bytes
    * currently in the FIFO and compare that to the size of the FIFO.  If
    * there are fewer bytes in the FIFO than the size of the FIFO, then we
    * are able to transmit.
    */
 
-#  error "Missing logic"
-#else
+#    error "Missing logic"
+#  else
   /* Wait until the transmit data register is "empty" (TDRE).  This state
    * depends on the TX watermark setting and may not mean that the transmit
    * buffer is truly empty.  It just means that we can now add another
-   * characterto the transmit buffer without exceeding the watermark.
+   * character to the transmit buffer without exceeding the watermark.
    *
    * NOTE:  UART0 has an 8-byte deep FIFO; the other UARTs have no FIFOs
    * (1-deep).  There appears to be no way to know when the FIFO is not
@@ -167,11 +195,18 @@ void up_lowputc(char ch)
    */
 
   while ((getreg8(CONSOLE_BASE+KINETIS_UART_S1_OFFSET) & UART_S1_TDRE) == 0);
-#endif
+#  endif
 
   /* Then write the character to the UART data register */
 
   putreg8((uint8_t)ch, CONSOLE_BASE+KINETIS_UART_D_OFFSET);
+
+#elif defined(HAVE_LPUART_CONSOLE)
+  while ((getreg32(CONSOLE_BASE + KINETIS_LPUART_STAT_OFFSET) & LPUART_STAT_TDRE) == 0);
+
+  /* Then send the character */
+
+  putreg32((uint32_t)ch, CONSOLE_BASE + KINETIS_LPUART_DATA_OFFSET);
 #endif
 }
 
@@ -180,92 +215,131 @@ void up_lowputc(char ch)
  *
  * Description:
  *   This performs basic initialization of the UART used for the serial
- *   console.  Its purpose is to get the console output availabe as soon
+ *   console.  Its purpose is to get the console output available as soon
  *   as possible.
  *
  ****************************************************************************/
 
 void kinetis_lowsetup(void)
 {
-#ifdef HAVE_UART_DEVICE
+#if defined(HAVE_UART_DEVICE) ||defined(HAVE_LUART_DEVICE)
   uint32_t regval;
+#endif
+#ifdef HAVE_UART_DEVICE
 
   /* Enable peripheral clocking for all enabled UARTs.  Clocking for UARTs
    * 0-3 is enabled in the SCGC4 register.
    */
 
-#if defined(CONFIG_KINETIS_UART0) || defined(CONFIG_KINETIS_UART1) || \
-    defined(CONFIG_KINETIS_UART2) || defined(CONFIG_KINETIS_UART3)
+#  if defined(CONFIG_KINETIS_UART0) || defined(CONFIG_KINETIS_UART1) || \
+      defined(CONFIG_KINETIS_UART2) || defined(CONFIG_KINETIS_UART3)
 
    regval = getreg32(KINETIS_SIM_SCGC4);
-#  ifdef CONFIG_KINETIS_UART0
+#    ifdef CONFIG_KINETIS_UART0
    regval |= SIM_SCGC4_UART0;
-#  endif
-#  ifdef CONFIG_KINETIS_UART1
+#    endif
+#    ifdef CONFIG_KINETIS_UART1
    regval |= SIM_SCGC4_UART1;
-#  endif
-#  ifdef CONFIG_KINETIS_UART2
+#    endif
+#    ifdef CONFIG_KINETIS_UART2
    regval |= SIM_SCGC4_UART2;
-#  endif
-#  ifdef CONFIG_KINETIS_UART3
+#    endif
+#    ifdef CONFIG_KINETIS_UART3
    regval |= SIM_SCGC4_UART3;
-#  endif
+#    endif
    putreg32(regval, KINETIS_SIM_SCGC4);
 
-#endif
+#  endif
 
   /* Clocking for UARTs 4-5 is enabled in the SCGC1 register. */
 
-#if defined(CONFIG_KINETIS_UART4) || defined(CONFIG_KINETIS_UART5)
+#  if defined(CONFIG_KINETIS_UART4) || defined(CONFIG_KINETIS_UART5)
 
    regval = getreg32(KINETIS_SIM_SCGC1);
-#  ifdef CONFIG_KINETIS_UART4
+#    ifdef CONFIG_KINETIS_UART4
    regval |= SIM_SCGC1_UART4;
-#  endif
-#  ifdef CONFIG_KINETIS_UART5
+#    endif
+#    ifdef CONFIG_KINETIS_UART5
    regval |= SIM_SCGC1_UART5;
-#  endif
+#    endif
    putreg32(regval, KINETIS_SIM_SCGC1);
 
-#endif
+#  endif
 
   /* Configure UART pins for the all enabled UARTs */
 
-#ifdef CONFIG_KINETIS_UART0
+#  ifdef CONFIG_KINETIS_UART0
   kinetis_pinconfig(PIN_UART0_TX);
   kinetis_pinconfig(PIN_UART0_RX);
-#endif
-#ifdef CONFIG_KINETIS_UART1
+#  endif
+#  ifdef CONFIG_KINETIS_UART1
   kinetis_pinconfig(PIN_UART1_TX);
   kinetis_pinconfig(PIN_UART1_RX);
-#endif
-#ifdef CONFIG_KINETIS_UART2
+#  endif
+#  ifdef CONFIG_KINETIS_UART2
   kinetis_pinconfig(PIN_UART2_TX);
   kinetis_pinconfig(PIN_UART2_RX);
-#endif
-#ifdef CONFIG_KINETIS_UART3
+#  endif
+#  ifdef CONFIG_KINETIS_UART3
   kinetis_pinconfig(PIN_UART3_TX);
   kinetis_pinconfig(PIN_UART3_RX);
-#endif
-#ifdef CONFIG_KINETIS_UART4
+#  endif
+#  ifdef CONFIG_KINETIS_UART4
   kinetis_pinconfig(PIN_UART4_TX);
   kinetis_pinconfig(PIN_UART4_RX);
-#endif
-#ifdef CONFIG_KINETIS_UART5
+#  endif
+#  ifdef CONFIG_KINETIS_UART5
   kinetis_pinconfig(PIN_UART5_TX);
   kinetis_pinconfig(PIN_UART5_RX);
-#endif
+#  endif
 
   /* Configure the console (only) now.  Other UARTs will be configured
    * when the serial driver is opened.
    */
 
-#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
+#  if defined(HAVE_UART_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
 
-  kinetis_uartconfigure(CONSOLE_BASE, CONSOLE_BAUD, CONSOLE_FREQ,
-                        CONSOLE_PARITY, CONSOLE_BITS);
-#endif
+  kinetis_uartconfigure(CONSOLE_BASE, CONSOLE_BAUD, CONSOLE_FREQ, \
+                        CONSOLE_PARITY, CONSOLE_BITS, CONSOLE_2STOP);
+#  endif
 #endif /* HAVE_UART_DEVICE */
+
+#ifdef HAVE_LPUART_DEVICE
+
+  /* Clocking Source for LPUARTs 0 selected in  SIM_SOPT2 */
+
+#  if defined(CONFIG_KINETIS_LPUART0)
+    regval = getreg32(KINETIS_SIM_SOPT2);
+    regval &= ~(SIM_SOPT2_LPUARTSRC_MASK);
+    regval |= BOARD_LPUART0_CLKSRC;
+    putreg32(regval, KINETIS_SIM_SOPT2);
+
+    /* Clocking for LPUARTs 0-1 is enabled in the SCGC2 register. */
+
+    regval = getreg32(KINETIS_SIM_SCGC2);
+    regval |= SIM_SCGC2_LPUART0;
+    putreg32(regval, KINETIS_SIM_SCGC2);
+
+#  endif
+
+   /* Configure UART pins for the all enabled UARTs */
+
+#  ifdef CONFIG_KINETIS_LPUART0
+   kinetis_pinconfig(PIN_LPUART0_TX);
+   kinetis_pinconfig(PIN_LPUART0_RX);
+#  endif
+
+#  ifdef CONFIG_KINETIS_LPUART1
+   kinetis_pinconfig(PIN_LPUART1_TX);
+   kinetis_pinconfig(PIN_LPUART1_RX);
+#  endif
+
+#  if defined(HAVE_LPUART_CONSOLE) && !defined(CONFIG_SUPPRESS_LPUART_CONFIG)
+
+   kinetis_lpuartconfigure(CONSOLE_BASE, CONSOLE_BAUD, CONSOLE_FREQ, \
+                           CONSOLE_PARITY, CONSOLE_BITS, CONSOLE_2STOP);
+#  endif
+#endif /* HAVE_LPUART_DEVICE */
 }
 
 /****************************************************************************
@@ -289,6 +363,27 @@ void kinetis_uartreset(uintptr_t uart_base)
 }
 #endif
 
+/****************************************************************************
+ * Name: kinetis_lpuartreset
+ *
+ * Description:
+ *   Reset a UART.
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_LPUART_DEVICE
+void kinetis_lpuartreset(uintptr_t uart_base)
+{
+  uint32_t regval;
+
+  /* Just disable the transmitter and receiver */
+
+  regval = getreg32(uart_base+KINETIS_LPUART_CTRL_OFFSET);
+  regval &= ~(LPUART_CTRL_RE | LPUART_CTRL_TE);
+  putreg32(regval, uart_base+KINETIS_LPUART_CTRL_OFFSET);
+}
+#endif
+
 /****************************************************************************
  * Name: kinetis_uartconfigure
  *
@@ -300,7 +395,7 @@ void kinetis_uartreset(uintptr_t uart_base)
 #ifdef HAVE_UART_DEVICE
 void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
                            uint32_t clock, unsigned int parity,
-                           unsigned int nbits)
+                           unsigned int nbits, unsigned int stop2)
 {
   uint32_t     sbr;
   uint32_t     brfa;
@@ -362,11 +457,16 @@ void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
   sbr = clock / (baud << 4);
   DEBUGASSERT(sbr < 0x2000);
 
-  /* Save the new baud divisor, retaining other bits in the UARTx_BDH
-   * register.
+  /* Save the new baud divisor and stop bits, retaining other bits in the
+   * UARTx_BDH register.
    */
 
-  regval  = getreg8(uart_base+KINETIS_UART_BDH_OFFSET) & UART_BDH_SBR_MASK;
+  regval  = getreg8(uart_base+KINETIS_UART_BDH_OFFSET);
+  regval  &= ~(UART_BDH_SBR_MASK | UART_BDH_SBNS);
+  if (stop2)
+    {
+      regval |= UART_BDH_SBNS;
+    }
   tmp     = sbr >> 8;
   regval |= (((uint8_t)tmp) << UART_BDH_SBR_SHIFT) & UART_BDH_SBR_MASK;
   putreg8(regval, uart_base+KINETIS_UART_BDH_OFFSET);
@@ -378,7 +478,7 @@ void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
    * The fractional divider, BRFA, is a 5 bit fractional value that is
    * logically added to the SBR:
    *
-   *   UART baud rate = clock / (16  (SBR + BRFD))
+   *   UART baud rate = clock / (16 � (SBR + BRFD))
    *
    * The BRFA the remainder.  This will be a non-negative value since the SBR
    * was calculated by truncation.
@@ -411,6 +511,7 @@ void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
     {
       depth = (3 * depth) >> 2;
     }
+
   putreg8(depth , uart_base+KINETIS_UART_RWFIFO_OFFSET);
 
   depth = g_sizemap[(regval & UART_PFIFO_TXFIFOSIZE_MASK) >> UART_PFIFO_TXFIFOSIZE_SHIFT];
@@ -418,6 +519,7 @@ void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
     {
       depth = (depth >> 2);
     }
+
   putreg8(depth, uart_base+KINETIS_UART_TWFIFO_OFFSET);
 
   /* Enable RX and TX FIFOs */
@@ -442,9 +544,176 @@ void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
 
   /* Now we can (re-)enable the transmitter and receiver */
 
-  regval = getreg8(uart_base+KINETIS_UART_C2_OFFSET);
+  regval  = getreg8(uart_base+KINETIS_UART_C2_OFFSET);
   regval |= (UART_C2_RE | UART_C2_TE);
   putreg8(regval, uart_base+KINETIS_UART_C2_OFFSET);
 }
 #endif
 
+/****************************************************************************
+ * Name: kinetis_lpuartconfigure
+ *
+ * Description:
+ *   Configure a LPUART as a RS-232 UART.
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_LPUART_DEVICE
+void kinetis_lpuartconfigure(uintptr_t uart_base, uint32_t baud,
+                           uint32_t clock, unsigned int parity,
+                           unsigned int nbits, unsigned int stop2)
+{
+  uint32_t     sbrreg;
+  uint32_t     osrreg;
+  uint32_t     sbr;
+  uint32_t     osr;
+  uint32_t     actual_baud;
+  uint32_t     current_baud;
+  uint32_t     baud_error;
+  uint32_t     min_baud_error;
+  uint32_t     regval;
+
+  /* General note: LPART block input clock can be sourced by
+   * SIM_CLKDIV3[PLLFLLFRAC, PLLFLLDIV] since this can be shared with TPM, we
+   * would ideally want to maximize the input frequency. This also helps to
+   * maximize the oversampling.
+   *
+   * We would like to maximize oversample and minimize the baud rate error
+   *
+   * USART baud is generated according to:
+   *
+   *   baud = clock / (SBR[0:12] * (OSR +1 ))
+   *
+   * Or, equivalently:
+   *
+   *   SBR   = clock / (baud * (OSR + 1))
+   *   OSR   = clock / (baud * SBR) -1
+   *
+   *   SBR must be 1..8191
+   *   OSR must be 3..31 (macro value 4..32)
+   */
+
+  min_baud_error = baud;
+  sbrreg = 0;
+  osrreg = 0;
+
+  /* While maximizing OSR look for a SBR that minimizes the difference
+   * between actual baud and requested baud rate
+   */
+
+  for (osr = 32; osr >= 4; osr--)
+    {
+       sbr = clock / (baud * osr);
+
+       /* Ensure the minimum SBR */
+
+       if (sbr == 0)
+         {
+           sbr++;
+         }
+
+       /* Calculate the actual baud rate */
+
+       current_baud = clock / (sbr * osr);
+
+       /* look at the deviation of current baud to requested */
+
+       baud_error = current_baud - baud;
+       if (baud_error <= min_baud_error)
+         {
+           min_baud_error = baud_error;
+           actual_baud = current_baud;
+           sbrreg = sbr;
+           osrreg = osr;
+         }
+    }
+
+  UNUSED(actual_baud);
+  DEBUGASSERT(actual_baud-baud < (baud /100) * 2);
+  DEBUGASSERT(sbrreg != 0 && sbrreg < 8192);
+  DEBUGASSERT(osrreg != 0);
+
+  /* Disable the transmitter and receiver throughout the reconfiguration */
+
+  regval = getreg32(uart_base+KINETIS_LPUART_CTRL_OFFSET);
+  regval &= ~(LPUART_CTRL_RE | LPUART_CTRL_TE);
+  putreg32(regval, uart_base+KINETIS_LPUART_CTRL_OFFSET);
+
+  /* Reset the BAUD register */
+
+  regval = getreg32(uart_base+KINETIS_LPUART_BAUD_OFFSET);
+  regval &= ~(LPUART_BAUD_INIT);
+
+  /* Set the Baud rate, nbits and stop bits */
+
+  regval |= LPUART_BAUD_OSR(osrreg);
+  regval |= LPUART_BAUD_SBR(sbrreg);
+
+  /* Set the 10 bit mode */
+
+  if (nbits == 10)
+    {
+      regval |= LPUART_BAUD_M10;
+    }
+
+  /* Set the 2 stop bit mode */
+
+  if (stop2)
+    {
+      regval |= LPUART_BAUD_SBNS;
+    }
+
+  /* BOTHEDG needs to be turned on for 4X-7X */
+
+  if (osrreg >= 4 && osrreg <= 7)
+    {
+      regval |= LPUART_BAUD_BOTHEDGE;
+    }
+
+  putreg32(regval, uart_base+KINETIS_LPUART_BAUD_OFFSET);
+
+  /* Configure number of bits and parity */
+
+  regval = 0;
+
+  /* Check for odd parity */
+
+  if (parity == 1)
+    {
+      regval |= (LPUART_CTRL_PE | LPUART_CTRL_PT); /* Enable + odd parity type */
+    }
+
+  /* Check for even parity */
+
+  else if (parity == 2)
+    {
+      regval |= LPUART_CTRL_PE;                   /* Enable (even parity default) */
+    }
+
+  /* The only other option is no parity */
+
+  else
+    {
+      DEBUGASSERT(parity == 0);
+    }
+
+  /* Check for 9-bit operation */
+
+  if (nbits == 9)
+    {
+      regval |= LPUART_CTRL_M;
+    }
+
+  /* The only other option is 8-bit operation */
+
+  else
+    {
+      DEBUGASSERT(nbits == 8);
+    }
+
+  /* Now we can (re-)enable the transmitter and receiver */
+
+  regval |= (LPUART_CTRL_RE | LPUART_CTRL_TE);
+  putreg32(regval, uart_base+KINETIS_LPUART_CTRL_OFFSET);
+}
+#endif
diff --git a/arch/arm/src/kinetis/kinetis_lpserial.c b/arch/arm/src/kinetis/kinetis_lpserial.c
new file mode 100644
index 0000000000000000000000000000000000000000..2980f18b8d445bed636c513d7fe7bcaf625e2bc5
--- /dev/null
+++ b/arch/arm/src/kinetis/kinetis_lpserial.c
@@ -0,0 +1,911 @@
+/****************************************************************************
+ * arch/arm/src/kinetis/kinetis_lpserial.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "up_arch.h"
+#include "up_internal.h"
+
+#include "kinetis_config.h"
+#include "chip.h"
+#include "chip/kinetis_lpuart.h"
+#include "kinetis.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Some sanity checks *******************************************************/
+/* Is there at least one LPUART enabled and configured as a RS-232 device? */
+
+#ifndef HAVE_LPUART_DEVICE
+#  warning "No LPUARTs enabled"
+#endif
+
+/* If we are not using the serial driver for the console, then we still must
+ * provide some minimal implementation of up_putc.
+ */
+
+#if defined(HAVE_LPUART_DEVICE) && defined(USE_SERIALDRIVER)
+
+/* Which LPUART with be tty0/console and which tty1?  The console will always
+ * be ttyS0.  If there is no console then will use the lowest numbered LPUART.
+ */
+
+/* First pick the console and ttys0.  This could be any of LPUART0-1 */
+
+#if defined(CONFIG_LPUART0_SERIAL_CONSOLE)
+#    define CONSOLE_DEV         g_lpuart0port /* LPUART0 is console */
+#    define TTYS0_DEV           g_lpuart0port /* LPUART0 is ttyS0 */
+#    define LPUART0_ASSIGNED    1
+#elif defined(CONFIG_LPUART1_SERIAL_CONSOLE)
+#    define CONSOLE_DEV         g_lpuart1port /* LPUART1 is console */
+#    define TTYS0_DEV           g_lpuart1port /* LPUART1 is ttyS0 */
+#    define LPUART1_ASSIGNED    1
+#else
+#  undef CONSOLE_DEV                        /* No console */
+#  if defined(CONFIG_KINETIS_LPUART0)
+#    define TTYS0_DEV           g_lpuart0port /* LPUART0 is ttyS0 */
+#    define LPUART0_ASSIGNED    1
+#  elif defined(CONFIG_KINETIS_LPUART1)
+#    define TTYS0_DEV           g_lpuart1port /* LPUART1 is ttyS0 */
+#    define LPUART1_ASSIGNED    1
+#  endif
+#endif
+
+/* Pick ttys1. This could be any of LPUART0-1 excluding the console LPUART. */
+
+#if defined(CONFIG_KINETIS_LPUART0) && !defined(LPUART0_ASSIGNED)
+#  define TTYS1_DEV             g_lpuart0port /* LPUART0 is ttyS1 */
+#  define LPUART0_ASSIGNED      1
+#elif defined(CONFIG_KINETIS_LPUART1) && !defined(LPUART1_ASSIGNED)
+#  define TTYS1_DEV             g_lpuart1port /* LPUART1 is ttyS1 */
+#  define LPUART1_ASSIGNED      1
+#endif
+
+#define LPUART_CTRL_ERROR_INTS  (LPUART_CTRL_ORIE | LPUART_CTRL_FEIE | \
+                                 LPUART_CTRL_NEIE | LPUART_CTRL_PEIE)
+
+#define LPUART_CTRL_RX_INTS     LPUART_CTRL_RIE
+
+#define LPUART_CTRL_TX_INTS     LPUART_CTRL_TIE
+
+#define LPUART_CTRL_ALL_INTS    (LPUART_CTRL_TX_INTS | LPUART_CTRL_RX_INTS | \
+                                 LPUART_CTRL_MA1IE | LPUART_CTRL_MA1IE | \
+                                 LPUART_CTRL_ILIE  | LPUART_CTRL_TCIE)
+
+#define LPUART_STAT_ERRORS      (LPUART_STAT_OR | LPUART_STAT_FE | \
+                                 LPUART_STAT_PF | LPUART_STAT_NF)
+
+
+/* The LPUART does not have an common set of aligned bits for the interrupt
+ * enable and the status. So map the ctrl to the stat bits
+ */
+
+#define LPUART_CTRL_TR_INTS     (LPUART_CTRL_TX_INTS | LPUART_CTRL_RX_INTS)
+#define LPUART_CTRL2STAT(c)     ((((c) & LPUART_CTRL_ERROR_INTS) >> 8) | \
+                                 ((c) & (LPUART_CTRL_TR_INTS)))
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct kinetis_dev_s
+{
+  uintptr_t uartbase;  /* Base address of LPUART registers */
+  uint32_t  baud;      /* Configured baud */
+  uint32_t  clock;     /* Clocking frequency of the LPUART module */
+  uint32_t  ie;        /* Interrupts enabled */
+  uint8_t   irq;       /* IRQ associated with this LPUART (for enable) */
+  uint8_t   irqprio;   /* Interrupt priority */
+  uint8_t   parity;    /* 0=none, 1=odd, 2=even */
+  uint8_t   bits;      /* Number of bits (8 or 9) */
+  uint8_t   stop2;     /* Use 2 stop bits */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int  kinetis_setup(struct uart_dev_s *dev);
+static void kinetis_shutdown(struct uart_dev_s *dev);
+static int  kinetis_attach(struct uart_dev_s *dev);
+static void kinetis_detach(struct uart_dev_s *dev);
+static int  kinetis_interrupt(int irq, void *context, void *arg);
+static int  kinetis_ioctl(struct file *filep, int cmd, unsigned long arg);
+static int  kinetis_receive(struct uart_dev_s *dev, uint32_t *status);
+static void kinetis_rxint(struct uart_dev_s *dev, bool enable);
+static bool kinetis_rxavailable(struct uart_dev_s *dev);
+static void kinetis_send(struct uart_dev_s *dev, int ch);
+static void kinetis_txint(struct uart_dev_s *dev, bool enable);
+static bool kinetis_txready(struct uart_dev_s *dev);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct uart_ops_s g_lpuart_ops =
+{
+  .setup          = kinetis_setup,
+  .shutdown       = kinetis_shutdown,
+  .attach         = kinetis_attach,
+  .detach         = kinetis_detach,
+  .ioctl          = kinetis_ioctl,
+  .receive        = kinetis_receive,
+  .rxint          = kinetis_rxint,
+  .rxavailable    = kinetis_rxavailable,
+#ifdef CONFIG_SERIAL_IFLOWCONTROL
+  .rxflowcontrol  = NULL,
+#endif
+  .send           = kinetis_send,
+  .txint          = kinetis_txint,
+  .txready        = kinetis_txready,
+  .txempty        = kinetis_txready,
+};
+
+/* I/O buffers */
+
+#ifdef CONFIG_KINETIS_LPUART0
+static char g_lpuart0rxbuffer[CONFIG_LPUART0_RXBUFSIZE];
+static char g_lpuart0txbuffer[CONFIG_LPUART0_TXBUFSIZE];
+#endif
+#ifdef CONFIG_KINETIS_LPUART1
+static char g_lpuart1rxbuffer[CONFIG_LPUART1_RXBUFSIZE];
+static char g_lpuart1txbuffer[CONFIG_LPUART1_TXBUFSIZE];
+#endif
+
+/* This describes the state of the Kinetis LPUART0 port. */
+
+#ifdef CONFIG_KINETIS_LPUART0
+static struct kinetis_dev_s g_lpuart0priv =
+{
+  .uartbase       = KINETIS_LPUART0_BASE,
+  .clock          = BOARD_LPUART0_FREQ,
+  .baud           = CONFIG_LPUART0_BAUD,
+  .irq            = KINETIS_IRQ_LPUART0,
+  .irqprio        = CONFIG_KINETIS_LPUART0PRIO,
+  .parity         = CONFIG_LPUART0_PARITY,
+  .bits           = CONFIG_LPUART0_BITS,
+  .stop2          = CONFIG_LPUART0_2STOP,
+};
+
+static uart_dev_t g_lpuart0port =
+{
+  .recv     =
+  {
+    .size   = CONFIG_LPUART0_RXBUFSIZE,
+    .buffer = g_lpuart0rxbuffer,
+  },
+  .xmit     =
+  {
+    .size   = CONFIG_LPUART0_TXBUFSIZE,
+    .buffer = g_lpuart0txbuffer,
+   },
+  .ops      = &g_lpuart_ops,
+  .priv     = &g_lpuart0priv,
+};
+#endif
+
+/* This describes the state of the Kinetis LPUART1 port. */
+
+#ifdef CONFIG_KINETIS_LPUART1
+static struct kinetis_dev_s g_lpuart1priv =
+{
+  .uartbase       = KINETIS_LPUART1_BASE,
+  .clock          = BOARD_CORECLK_FREQ,
+  .baud           = BOARD_LPUART1_FREQ,
+  .irq            = KINETIS_IRQ_LPUART1,
+  .irqprio        = CONFIG_KINETIS_LPUART1PRIO,
+  .parity         = CONFIG_LPUART1_PARITY,
+  .bits           = CONFIG_LPUART1_BITS,
+  .stop2          = CONFIG_LPUART1_2STOP,
+};
+
+static uart_dev_t g_lpuart1port =
+{
+  .recv     =
+  {
+    .size   = CONFIG_LPUART1_RXBUFSIZE,
+    .buffer = g_lpuart1rxbuffer,
+  },
+  .xmit     =
+  {
+    .size   = CONFIG_LPUART1_TXBUFSIZE,
+    .buffer = g_lpuart1txbuffer,
+   },
+  .ops      = &g_lpuart_ops,
+  .priv     = &g_lpuart1priv,
+};
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: kinetis_serialin
+ ****************************************************************************/
+
+static inline uint32_t kinetis_serialin(struct kinetis_dev_s *priv,
+                                        int offset)
+{
+  return getreg32(priv->uartbase + offset);
+}
+
+/****************************************************************************
+ * Name: kinetis_serialout
+ ****************************************************************************/
+
+static inline void kinetis_serialout(struct kinetis_dev_s *priv, int offset,
+                                     uint32_t value)
+{
+  putreg32(value, priv->uartbase + offset);
+}
+
+/****************************************************************************
+ * Name: kinetis_setuartint
+ ****************************************************************************/
+
+static void kinetis_setuartint(struct kinetis_dev_s *priv)
+{
+  irqstate_t flags;
+  uint32_t regval;
+
+  /* Re-enable/re-disable interrupts corresponding to the state of bits in ie */
+
+  flags    = enter_critical_section();
+  regval   = kinetis_serialin(priv, KINETIS_LPUART_CTRL_OFFSET);
+  regval  &= ~LPUART_CTRL_ALL_INTS;
+  regval  |= priv->ie;
+  kinetis_serialout(priv, KINETIS_LPUART_CTRL_OFFSET, regval);
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: kinetis_restoreuartint
+ ****************************************************************************/
+
+static void kinetis_restoreuartint(struct kinetis_dev_s *priv, uint32_t ie)
+{
+  irqstate_t flags;
+
+  /* Re-enable/re-disable interrupts corresponding to the state of bits in ie */
+
+  flags    = enter_critical_section();
+  priv->ie = ie & LPUART_CTRL_ALL_INTS;
+  kinetis_setuartint(priv);
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: kinetis_disableuartint
+ ****************************************************************************/
+
+static void kinetis_disableuartint(struct kinetis_dev_s *priv, uint32_t *ie)
+{
+  irqstate_t flags;
+
+  flags = enter_critical_section();
+  if (ie)
+    {
+      *ie = priv->ie;
+    }
+
+  kinetis_restoreuartint(priv, 0);
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: kinetis_setup
+ *
+ * Description:
+ *   Configure the LPUART baud, bits, parity, etc. This method is called the
+ *   first time that the serial port is opened.
+ *
+ ****************************************************************************/
+
+static int kinetis_setup(struct uart_dev_s *dev)
+{
+#ifndef CONFIG_SUPPRESS_LPUART_CONFIG
+  struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev->priv;
+
+  /* Configure the LPUART as an RS-232 UART */
+
+  kinetis_lpuartconfigure(priv->uartbase, priv->baud, priv->clock,
+                        priv->parity, priv->bits, priv->stop2);
+#endif
+
+  /* Make sure that all interrupts are disabled */
+
+  kinetis_restoreuartint(priv, 0);
+
+#ifdef CONFIG_ARCH_IRQPRIO
+  /* Set up the interrupt priority */
+
+  up_prioritize_irq(priv->irq, priv->irqprio);
+#endif
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: kinetis_shutdown
+ *
+ * Description:
+ *   Disable the LPUART.  This method is called when the serial
+ *   port is closed
+ *
+ ****************************************************************************/
+
+static void kinetis_shutdown(struct uart_dev_s *dev)
+{
+  struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev->priv;
+
+  /* Disable interrupts */
+
+  kinetis_restoreuartint(priv, 0);
+
+  /* Reset hardware and disable Rx and Tx */
+
+  kinetis_lpuartreset(priv->uartbase);
+}
+
+/****************************************************************************
+ * Name: kinetis_attach
+ *
+ * Description:
+ *   Configure the LPUART to operation in interrupt driven mode.  This
+ *   method is called when the serial port is opened.  Normally, this is
+ *   just after the the setup() method is called, however, the serial
+ *   console may operate in a non-interrupt driven mode during the boot phase.
+ *
+ *   RX and TX interrupts are not enabled when by the attach method (unless
+ *   the hardware supports multiple levels of interrupt enabling).  The RX
+ *   and TX interrupts are not enabled until the txint() and rxint() methods
+ *   are called.
+ *
+ ****************************************************************************/
+
+static int kinetis_attach(struct uart_dev_s *dev)
+{
+  struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev->priv;
+  int ret;
+
+  /* Attach and enable the IRQ(s).  The interrupts are (probably) still
+   * disabled in the LPUART_CTRL register.
+   */
+
+  ret = irq_attach(priv->irq, kinetis_interrupt, dev);
+  if (ret == OK)
+    {
+      up_enable_irq(priv->irq);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: kinetis_detach
+ *
+ * Description:
+ *   Detach LPUART interrupts.  This method is called when the serial port
+ *   is closed normally just before the shutdown method is called.  The
+ *   exception is the serial console which is never shutdown.
+ *
+ ****************************************************************************/
+
+static void kinetis_detach(struct uart_dev_s *dev)
+{
+  struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev->priv;
+
+  /* Disable interrupts */
+
+  kinetis_restoreuartint(priv, 0);
+  up_disable_irq(priv->irq);
+
+  /* Detach from the interrupt(s) */
+
+  irq_detach(priv->irq);
+}
+
+/****************************************************************************
+ * Name: kinetis_interrupts
+ *
+ * Description:
+ *   This is the LPUART status interrupt handler.  It will be invoked when
+ *   an interrupt received on the 'irq'  It should call uart_transmitchars
+ *   or uart_receivechar to perform the appropriate data transfers.  The
+ *   interrupt handling logic must be able to map the 'irq' number into the
+ *   Appropriate uart_dev_s structure in order to call these functions.
+ *
+ ****************************************************************************/
+
+static int kinetis_interrupt(int irq, void *context, void *arg)
+{
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
+  struct kinetis_dev_s *priv;
+  uint32_t stat;
+  uint32_t ctrl;
+
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
+  priv = (struct kinetis_dev_s *)dev->priv;
+
+  /* Read status register and qualify it with STAT bit corresponding CTRL IE bits */
+
+  stat = kinetis_serialin(priv, KINETIS_LPUART_STAT_OFFSET);
+  ctrl = kinetis_serialin(priv, KINETIS_LPUART_CTRL_OFFSET);
+  stat &= LPUART_CTRL2STAT(ctrl);
+  do
+    {
+
+      /* Handle errors.  This interrupt may be caused by:
+       *
+       * OR: Receiver Overrun Flag. To clear OR, when STAT read with OR set,
+       *     write STAT with OR set;
+       * FE: Framing error. To clear FE, when STAT read with FE set, read the
+       *     data to discard it and write STAT with FE set;
+       * NF: Noise flag. To clear NF, when STAT read with EE set, read the
+       *     data to discard it and write STAT with NE set;
+       * PF: Parity error flag. To clear PF, when STAT read with PE set, read
+       *     the data to discard it and write STAT with PE set;
+       */
+
+      if (stat & LPUART_STAT_ERRORS)
+        {
+
+          /* Only Overrun error does not need a read operation */
+
+          if ((stat & LPUART_STAT_OR) != LPUART_STAT_OR)
+            {
+              (void) kinetis_serialin(priv, KINETIS_LPUART_DATA_OFFSET);
+            }
+
+          /* Reset any Errors */
+
+          kinetis_serialout(priv, KINETIS_LPUART_STAT_OFFSET, stat & LPUART_STAT_ERRORS);
+          return OK;
+        }
+
+      /* Handle incoming, receive bytes
+       *
+       * Check if the receive data register is full (RDRF).
+       *
+       * The RDRF status indication is cleared when the data is read from
+       * the RX data register.
+       */
+
+      if (stat & LPUART_STAT_RDRF)
+        {
+          uart_recvchars(dev);
+        }
+
+      /* Handle outgoing, transmit bytes
+       *
+       * Check if the transmit data register is "empty."
+       *
+       * The TDRE status indication is cleared when the data is written to
+       * the TX data register.
+       */
+
+      if (stat & LPUART_STAT_TDRE)
+        {
+          uart_xmitchars(dev);
+        }
+
+      /* Read status register and requalify it with STAT bit corresponding CTRL IE bits */
+
+      stat = kinetis_serialin(priv, KINETIS_LPUART_STAT_OFFSET);
+      ctrl = kinetis_serialin(priv, KINETIS_LPUART_CTRL_OFFSET);
+      stat &= LPUART_CTRL2STAT(ctrl);
+    } while(stat != 0);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: kinetis_ioctl
+ *
+ * Description:
+ *   All ioctl calls will be routed through this method
+ *
+ ****************************************************************************/
+
+static int kinetis_ioctl(struct file *filep, int cmd, unsigned long arg)
+{
+#if 0 /* Reserved for future growth */
+  struct inode      *inode;
+  struct uart_dev_s *dev;
+  struct kinetis_dev_s   *priv;
+  int ret = OK;
+
+  DEBUGASSERT(filep, filep->f_inode);
+  inode = filep->f_inode;
+  dev   = inode->i_private;
+
+  DEBUGASSERT(dev, dev->priv);
+  priv = (struct kinetis_dev_s *)dev->priv;
+
+  switch (cmd)
+    {
+    case xxx: /* Add commands here */
+      break;
+
+    default:
+      ret = -ENOTTY;
+      break;
+    }
+
+  return ret;
+#else
+  return -ENOTTY;
+#endif
+}
+
+/****************************************************************************
+ * Name: kinetis_receive
+ *
+ * Description:
+ *   Called (usually) from the interrupt level to receive one
+ *   character from the LPUART.  Error bits associated with the
+ *   receipt are provided in the return 'status'.
+ *
+ ****************************************************************************/
+
+static int kinetis_receive(struct uart_dev_s *dev, uint32_t *status)
+{
+  struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev->priv;
+  uint32_t regval;
+  int data;
+
+  /* Get error status information:
+   *
+   * OR: Receiver Overrun Flag. To clear OR, when STAT read with OR set,
+   *     write STAT with OR set;
+   * FE: Framing error. To clear FE, when STAT read with FE set, read the
+   *     data to discard it and write STAT with FE set;
+   * NF: Noise flag. To clear NF, when STAT read with EE set, read the
+   *     data to discard it and write STAT with NE set;
+   * PF: Parity error flag. To clear PF, when STAT read with PE set, read
+   *     the data to discard it and write STAT with PE set;
+   */
+
+  regval = kinetis_serialin(priv, KINETIS_LPUART_STAT_OFFSET);
+
+  /* Return status information */
+
+  if (status)
+    {
+      *status = regval;
+    }
+
+  /* Then return the actual received byte.  Read DATA. Then if
+   * there were any errors write 1 to them to clear the RX errors.
+   */
+
+  data = (int)kinetis_serialin(priv, KINETIS_LPUART_DATA_OFFSET);
+  regval &= LPUART_STAT_ERRORS;
+  if (regval)
+    {
+      kinetis_serialout(priv, KINETIS_LPUART_STAT_OFFSET, regval);
+    }
+
+  return data;
+}
+
+/****************************************************************************
+ * Name: kinetis_rxint
+ *
+ * Description:
+ *   Call to enable or disable RX interrupts
+ *
+ ****************************************************************************/
+
+static void kinetis_rxint(struct uart_dev_s *dev, bool enable)
+{
+  struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev->priv;
+  irqstate_t flags;
+
+  flags = enter_critical_section();
+  if (enable)
+    {
+      /* Receive an interrupt when their is anything in the Rx data register
+       * (or an Rx related error occurs).
+       */
+
+#ifndef CONFIG_SUPPRESS_SERIAL_INTS
+      priv->ie |= (LPUART_CTRL_RX_INTS | LPUART_CTRL_ERROR_INTS);
+      kinetis_setuartint(priv);
+#endif
+    }
+  else
+    {
+      priv->ie &= ~(LPUART_CTRL_RX_INTS | LPUART_CTRL_ERROR_INTS);
+      kinetis_setuartint(priv);
+    }
+
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: kinetis_rxavailable
+ *
+ * Description:
+ *   Return true if the receive register is not empty
+ *
+ ****************************************************************************/
+
+static bool kinetis_rxavailable(struct uart_dev_s *dev)
+{
+  struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev->priv;
+
+  /* Return true if the receive data register is full (RDRF).
+   */
+
+  return (kinetis_serialin(priv, KINETIS_LPUART_STAT_OFFSET) & LPUART_STAT_RDRF) != 0;
+}
+
+/****************************************************************************
+ * Name: kinetis_send
+ *
+ * Description:
+ *   This method will send one byte on the LPUART.
+ *
+ ****************************************************************************/
+
+static void kinetis_send(struct uart_dev_s *dev, int ch)
+{
+  struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev->priv;
+  kinetis_serialout(priv, KINETIS_LPUART_DATA_OFFSET, ch);
+}
+
+/****************************************************************************
+ * Name: kinetis_txint
+ *
+ * Description:
+ *   Call to enable or disable TX interrupts
+ *
+ ****************************************************************************/
+
+static void kinetis_txint(struct uart_dev_s *dev, bool enable)
+{
+  struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev->priv;
+  irqstate_t flags;
+
+  flags = enter_critical_section();
+  if (enable)
+    {
+      /* Enable the TX interrupt */
+
+#ifndef CONFIG_SUPPRESS_SERIAL_INTS
+      priv->ie |= LPUART_CTRL_TX_INTS;
+      kinetis_setuartint(priv);
+
+      /* Fake a TX interrupt here by just calling uart_xmitchars() with
+       * interrupts disabled (note this may recurse).
+       */
+
+      uart_xmitchars(dev);
+#endif
+    }
+  else
+    {
+      /* Disable the TX interrupt */
+
+      priv->ie &= ~LPUART_CTRL_TX_INTS;
+      kinetis_setuartint(priv);
+    }
+
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: kinetis_txready
+ *
+ * Description:
+ *   Return true if the transmit data register is empty
+ *
+ ****************************************************************************/
+
+static bool kinetis_txready(struct uart_dev_s *dev)
+{
+  struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev->priv;
+
+  /* Return true if the transmit data register is "empty." */
+
+  return (kinetis_serialin(priv, KINETIS_LPUART_STAT_OFFSET) & LPUART_STAT_TDRE) != 0;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: kinetis_lpuart_earlyserialinit
+ *
+ * Description:
+ *   Performs the low level LPUART initialization early in debug so that the
+ *   serial console will be available during bootup.  This must be called
+ *   before up_serialinit.  NOTE:  This function depends on GPIO pin
+ *   configuration performed in kinetis_lowsetup() and main clock initialization
+ *   performed in up_clkinitialize().
+ *
+ ****************************************************************************/
+
+void kinetis_lpuart_earlyserialinit(void)
+{
+  /* Disable interrupts from all LPUARTS.  The console is enabled in
+   * kinetis_setup()
+   */
+
+  kinetis_restoreuartint(TTYS0_DEV.priv, 0);
+#ifdef TTYS1_DEV
+  kinetis_restoreuartint(TTYS1_DEV.priv, 0);
+#endif
+
+  /* Configuration whichever one is the console */
+
+#ifdef HAVE_LPUART_CONSOLE
+  CONSOLE_DEV.isconsole = true;
+  kinetis_setup(&CONSOLE_DEV);
+#endif
+}
+
+/****************************************************************************
+ * Name: kinetis_lpuart_serialinit
+ *
+ * Description:
+ *   Register serial console and serial ports.  This assumes
+ *   that up_earlyserialinit was called previously.
+ *
+ * Input Parameters:
+ *   first: - First TTY number to assign
+ *
+ * Returns Value:
+ *   The next TTY number available for assignment
+ *
+ ****************************************************************************/
+
+unsigned int kinetis_lpuart_serialinit(unsigned int first)
+{
+#if defined(CONFIG_KINETIS_MERGE_TTY)
+  char devname[] = "/dev/ttySx";
+#endif
+
+/* Register the console */
+
+#ifdef HAVE_LPUART_CONSOLE
+  (void)uart_register("/dev/console", &CONSOLE_DEV);
+#endif
+#if !defined(CONFIG_KINETIS_MERGE_TTY)
+  /* Register all LPUARTs as LPn devices */
+
+  (void)uart_register("/dev/ttyLP0", &TTYS0_DEV);
+#  ifdef TTYS1_DEV
+  (void)uart_register("/dev/ttyLP1", &TTYS1_DEV);
+#  endif
+#else
+  devname[(sizeof(devname)/sizeof(devname[0]))-2] = '0' + first++;
+  (void)uart_register(devname, &TTYS0_DEV);
+#  ifdef TTYS1_DEV
+  devname[(sizeof(devname)/sizeof(devname[0]))-2] = '0' + first++;
+  (void)uart_register(devname, &TTYS1_DEV);
+#  endif
+#endif
+  return first;
+}
+
+/****************************************************************************
+ * Name: up_putc
+ *
+ * Description:
+ *   Provide priority, low-level access to support OS debug  writes
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_LPUART_PUTC
+int up_putc(int ch)
+{
+#ifdef HAVE_LPUART_CONSOLE
+  struct kinetis_dev_s *priv = (struct kinetis_dev_s *)CONSOLE_DEV.priv;
+  uint32_t ie;
+
+  kinetis_disableuartint(priv, &ie);
+
+  /* Check for LF */
+
+  if (ch == '\n')
+    {
+      /* Add CR */
+
+      up_lowputc('\r');
+    }
+
+  up_lowputc(ch);
+  kinetis_restoreuartint(priv, ie);
+#endif
+  return ch;
+}
+#endif
+
+#else /* USE_SERIALDRIVER */
+
+/****************************************************************************
+ * Name: up_putc
+ *
+ * Description:
+ *   Provide priority, low-level access to support OS debug writes
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_LPUART_PUTC
+int up_putc(int ch)
+{
+#ifdef HAVE_LPUART_CONSOLE
+  /* Check for LF */
+
+  if (ch == '\n')
+    {
+      /* Add CR */
+
+      up_lowputc('\r');
+    }
+
+  up_lowputc(ch);
+#endif
+  return ch;
+}
+#endif
+
+#endif /* HAVE_LPUART_DEVICE && USE_SERIALDRIVER) */
diff --git a/arch/arm/src/kinetis/kinetis_mcg.h b/arch/arm/src/kinetis/kinetis_mcg.h
deleted file mode 100644
index 60f13cd2a0b788ef8e897b0c9adbeee28387aae0..0000000000000000000000000000000000000000
--- a/arch/arm/src/kinetis/kinetis_mcg.h
+++ /dev/null
@@ -1,186 +0,0 @@
-/************************************************************************************
- * arch/arm/src/kinetis/kinetis_mcg.h
- *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ************************************************************************************/
-
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_MCG_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_MCG_H
-
-/************************************************************************************
- * Included Files
- ************************************************************************************/
-
-#include 
-
-#include "chip.h"
-
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Register Offsets *****************************************************************/
-
-#define KINETIS_MCG_C1_OFFSET     0x0000 /* MCG Control 1 Register */
-#define KINETIS_MCG_C2_OFFSET     0x0001 /* MCG Control 2 Register */
-#define KINETIS_MCG_C3_OFFSET     0x0002 /* MCG Control 3 Register */
-#define KINETIS_MCG_C4_OFFSET     0x0003 /* MCG Control 4 Register */
-#define KINETIS_MCG_C5_OFFSET     0x0004 /* MCG Control 5 Register */
-#define KINETIS_MCG_C6_OFFSET     0x0005 /* MCG Control 6 Register */
-#define KINETIS_MCG_S_OFFSET      0x0006 /* MCG Status Register */
-#define KINETIS_MCG_ATC_OFFSET    0x0008 /* MCG Auto Trim Control Register */
-#define KINETIS_MCG_ATCVH_OFFSET  0x000a /* MCG Auto Trim Compare Value High Register */
-#define KINETIS_MCG_ATCVL_OFFSET  0x000b /* MCG Auto Trim Compare Value Low Register */
-
-/* Register Addresses ***************************************************************/
-
-#define KINETIS_MCG_C1            (KINETIS_MCG_BASE+KINETIS_MCG_C1_OFFSET)
-#define KINETIS_MCG_C2            (KINETIS_MCG_BASE+KINETIS_MCG_C2_OFFSET)
-#define KINETIS_MCG_C3            (KINETIS_MCG_BASE+KINETIS_MCG_C3_OFFSET)
-#define KINETIS_MCG_C4            (KINETIS_MCG_BASE+KINETIS_MCG_C4_OFFSET)
-#define KINETIS_MCG_C5            (KINETIS_MCG_BASE+KINETIS_MCG_C5_OFFSET)
-#define KINETIS_MCG_C6            (KINETIS_MCG_BASE+KINETIS_MCG_C6_OFFSET)
-#define KINETIS_MCG_S             (KINETIS_MCG_BASE+KINETIS_MCG_S_OFFSET)
-#define KINETIS_MCG_ATC           (KINETIS_MCG_BASE+KINETIS_MCG_ATC_OFFSET)
-#define KINETIS_MCG_ATCVH         (KINETIS_MCG_BASE+KINETIS_MCG_ATCVH_OFFSET)
-#define KINETIS_MCG_ATCVL         (KINETIS_MCG_BASE+KINETIS_MCG_ATCVL_OFFSET)
-
-/* Register Bit Definitions *********************************************************/
-
-/* MCG Control 1 Register (8-bit) */
-
-#define MCG_C1_IREFSTEN           (1 << 0)  /* Bit 0:  Internal Reference Stop Enable */
-#define MCG_C1_IRCLKEN            (1 << 1)  /* Bit 1:  Internal Reference Clock Enable */
-#define MCG_C1_IREFS              (1 << 2)  /* Bit 2:  Internal Reference Select */
-#define MCG_C1_FRDIV_SHIFT        (3)       /* Bits 3-5: FLL External Reference Divider */
-#define MCG_C1_FRDIV_MASK         (7 << MCG_C1_FRDIV_SHIFT)
-#  define MCG_C1_FRDIV_R0DIV1     (0 << MCG_C1_FRDIV_SHIFT) /* RANGE==0 divider=1 */
-#  define MCG_C1_FRDIV_R0DIV2     (1 << MCG_C1_FRDIV_SHIFT) /* RANGE==0 divider=2 */
-#  define MCG_C1_FRDIV_R0DIV4     (2 << MCG_C1_FRDIV_SHIFT) /* RANGE==0 divider=4 */
-#  define MCG_C1_FRDIV_R0DIV8     (3 << MCG_C1_FRDIV_SHIFT) /* RANGE==0 divider=8 */
-#  define MCG_C1_FRDIV_R0DIV16    (4 << MCG_C1_FRDIV_SHIFT) /* RANGE==0 divider=16 */
-#  define MCG_C1_FRDIV_R0DIV32    (5 << MCG_C1_FRDIV_SHIFT) /* RANGE==0 divider=32 */
-#  define MCG_C1_FRDIV_R0DIV64    (6 << MCG_C1_FRDIV_SHIFT) /* RANGE==0 divider=64 */
-#  define MCG_C1_FRDIV_R0DIV128   (7 << MCG_C1_FRDIV_SHIFT) /* RANGE==0 divider=128 */
-#  define MCG_C1_FRDIV_DIV32      (0 << MCG_C1_FRDIV_SHIFT) /* RANGE!=0 divider=32 */
-#  define MCG_C1_FRDIV_DIV64      (1 << MCG_C1_FRDIV_SHIFT) /* RANGE!=0 divider=64 */
-#  define MCG_C1_FRDIV_DIV128     (2 << MCG_C1_FRDIV_SHIFT) /* RANGE!=0 divider=128 */
-#  define MCG_C1_FRDIV_DIV256     (3 << MCG_C1_FRDIV_SHIFT) /* RANGE!=0 divider=256 */
-#  define MCG_C1_FRDIV_DIV512     (4 << MCG_C1_FRDIV_SHIFT) /* RANGE!=0 divider=512 */
-#  define MCG_C1_FRDIV_DIV1024    (5 << MCG_C1_FRDIV_SHIFT) /* RANGE!=0 divider=1024 */
-#define MCG_C1_CLKS_SHIFT         (6)       /* Bits 6-7: Clock Source Select */
-#define MCG_C1_CLKS_MASK          (3 << MCG_C1_CLKS_SHIFT)
-#  define MCG_C1_CLKS_PLL         (0 << MCG_C1_CLKS_SHIFT) /* FLL or PLL output */
-#  define MCG_C1_CLKS_INTREF      (1 << MCG_C1_CLKS_SHIFT) /* Internal reference clock */
-#  define MCG_C1_CLKS_EXTREF      (2 << MCG_C1_CLKS_SHIFT) /* External reference clock */
-
-/* MCG Control 2 Register */
-
-#define MCG_C2_IRCS               (1 << 0)  /* Bit 0:  Internal Reference Clock Select */
-#define MCG_C2_LP                 (1 << 1)  /* Bit 1:  Low Power Select */
-#define MCG_C2_EREFS              (1 << 2)  /* Bit 2:  External Reference Select */
-#define MCG_C2_HGO                (1 << 3)  /* Bit 3:  High Gain Oscillator Select */
-#define MCG_C2_RANGE_SHIFT        (4)       /* Bits 4-5: Frequency Range Select */
-#define MCG_C2_RANGE_MASK         (3 << MCG_C2_RANGE_SHIFT)
-#  define MCG_C2_RANGE_LOW        (0 << MCG_C2_RANGE_SHIFT) /* Oscillator of 32 kHz to 40 kHz  */
-#  define MCG_C2_RANGE_HIGH       (1 << MCG_C2_RANGE_SHIFT) /* Oscillator of 1 MHz to 8 MHz */
-#  define MCG_C2_RANGE_VHIGH      (2 << MCG_C2_RANGE_SHIFT) /* Oscillator of 8 MHz to 32 MHz */
-                                            /* Bits 6-7: Reserved */
-/* MCG Control 3 Register (8-bit Slow Internal Reference Clock Trim Setting) */
-
-/* MCG Control 4 Register (8-bit) */
-
-#define MCG_C4_SCFTRIM            (1 << 0)  /* Bit 0:  Slow Internal Reference Clock Fine Trim */
-#define MCG_C4_FCTRIM_SHIFT       (1)       /* Bits 1-4: Fast Internal Reference Clock Trim Setting */
-#define MCG_C4_FCTRIM_MASK        (15 << MCG_C4_FCTRIM_SHIFT)
-#define MCG_C4_DRST_DRS_SHIFT     (5)       /* Bits 5-6: DCO Range Select */
-#define MCG_C4_DRST_DRS_MASK      (3 << MCG_C4_DRST_DRS_SHIFT)
-#  define MCG_C4_DRST_DRS_LOW     (nn << MCG_C4_DRST_DRS_SHIFT)
-#  define MCG_C4_DRST_DRS_MID     (nn << MCG_C4_DRST_DRS_SHIFT)
-#  define MCG_C4_DRST_DRS_MIDHIGH (nn << MCG_C4_DRST_DRS_SHIFT)
-#  define MCG_C4_DRST_DRS_HIGH    (nn << MCG_C4_DRST_DRS_SHIFT)
-#define MCG_C4_DMX32              (1 << 7)  /* Bit 7:  DCO Maximum Frequency with 32.768 kHz Reference */
-
-/* MCG Control 5 Register */
-
-#define MCG_C5_PRDIV_SHIFT        (0)       /* Bits 0-4: PLL External Reference Divider */
-#define MCG_C5_PRDIV_MASK         (31 << MCG_C5_PRDIV_SHIFT)
-#  define MCG_C5_PRDIV(n)         (((n)-1) << MCG_C5_PRDIV_SHIFT) /* Divide factor n=1..25 */
-#define MCG_C5_PLLSTEN            (1 << 5)  /* Bit 5:  PLL Stop Enable */
-#define MCG_C5_PLLCLKEN           (1 << 6)  /* Bit 6:  PLL Clock Enable */
-                                            /* Bit 7: Reserved */
-
-/* MCG Control 6 Register */
-
-#define MCG_C6_VDIV_SHIFT         (0)       /* Bits 0-4: VCO Divider */
-#define MCG_C6_VDIV_MASK          (31 << MCG_C6_VDIV_SHIFT)
-#  define MCG_C6_VDIV(n)          (((n)-24) << MCG_C6_VDIV_SHIFT) /* Divide factor n=24..55 */
-#define MCG_C6_CME                (1 << 5)  /* Bit 5:  Clock Monitor Enable */
-#define MCG_C6_PLLS               (1 << 6)  /* Bit 6:  PLL Select */
-#define MCG_C6_LOLIE              (1 << 7)  /* Bit 7:  Loss of Lock Interrrupt Enable */
-
-/* MCG Status Register */
-
-#define MCG_S_IRCST               (1 << 0)  /* Bit 0:  Internal Reference Clock Status */
-#define MCG_S_OSCINIT             (1 << 1)  /* Bit 1:  OSC Initialization */
-#define MCG_S_CLKST_SHIFT         (2)       /* Bits 2-3: Clock Mode Status */
-#define MCG_S_CLKST_MASK          (3 << MCG_S_CLKST_SHIFT)
-#  define MCG_S_CLKST_FLL         (0 << MCG_S_CLKST_SHIFT) /* Output of the FLL */
-#  define MCG_S_CLKST_INTREF      (1 << MCG_S_CLKST_SHIFT) /* Internal reference clock */
-#  define MCG_S_CLKST_EXTREF      (2 << MCG_S_CLKST_SHIFT) /* External reference clock */
-#  define MCG_S_CLKST_PLL         (3 << MCG_S_CLKST_SHIFT) /* Output of the PLL */
-#define MCG_S_IREFST              (1 << 4)  /* Bit 4:  Internal Reference Status */
-#define MCG_S_PLLST               (1 << 5)  /* Bit 5:  PLL Select Status */
-#define MCG_S_LOCK                (1 << 6)  /* Bit 6:  Lock Status */
-#define MCG_S_LOLS                (1 << 7)  /* Bit 7:  Loss of Lock Status */
-
-/* MCG Auto Trim Control Register */
-                                            /* Bits 0-4: Reserved */
-#define MCG_ATC_ATMF              (1 << 5)  /* Bit 5:  Automatic Trim machine Fail Flag */
-#define MCG_ATC_ATMS              (1 << 6)  /* Bit 6:  Automatic Trim Machine Select */
-#define MCG_ATC_ATME              (1 << 7)  /* Bit 7:  Automatic Trim Machine Enable */
-
-/* MCG Auto Trim Compare Value High/Low Registers (8-bit compare value) */
-
-/************************************************************************************
- * Public Types
- ************************************************************************************/
-
-/************************************************************************************
- * Public Data
- ************************************************************************************/
-
-/************************************************************************************
- * Public Functions
- ************************************************************************************/
-
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_MCG_H */
diff --git a/arch/arm/src/kinetis/kinetis_memorymap.h b/arch/arm/src/kinetis/kinetis_memorymap.h
deleted file mode 100644
index 1e7d2820de451ebfd117c086c31a2de30e2ba3ff..0000000000000000000000000000000000000000
--- a/arch/arm/src/kinetis/kinetis_memorymap.h
+++ /dev/null
@@ -1,461 +0,0 @@
-/************************************************************************************
- * arch/arm/src/kinetis/kinetis_memorymap.h
- *
- *   Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ************************************************************************************/
-
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_MEMORYMAP_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_MEMORYMAP_H
-
-/************************************************************************************
- * Included Files
- ************************************************************************************/
-
-#include 
-
-#include "chip.h"
-
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Memory Map ***********************************************************************/
-/* K20 Family
- *
- * The memory map for the following parts is defined in Freescale document
- * K20P64M72SF1RM
- */
-
-#if defined(CONFIG_ARCH_CHIP_MK20DX256VLH7)
-
-# define KINETIS_FLASH_BASE     0x00000000 /* –0x0fffffff Program flash and read-
-                                            *             only data (Includes exception
-                                            *             vectors in first 1024 bytes) */
-# if !defined(KINETIS_FLEXMEM_SIZE)
-#  define KINETIS_FLEXNVM_BASE  0x10000000 /* –0x13ffffff FlexNVM */
-#  define KINETIS_FLEXRAM_BASE  0x14000000 /* –0x17ffffff FlexRAM */
-# endif
-                             /* 0x18000000  * –0x1bffffff Reserved */
-# define KINETIS_SRAML_BASE     0x1c000000 /* –0x1fffffff SRAM_L: Lower SRAM
-                                            *             (ICODE/DCODE) */
-# define KINETIS_SRAMU_BASE     0x20000000 /* –0x200fffff SRAM_U: Upper SRAM bitband
-                                            *             region */
-                             /* 0x20100000  * –0x21ffffff Reserved */
-# define KINETIS_SALIAS_BASE    0x22000000 /* –0x23ffffff Aliased to SRAM_U bitband */
-                             /* 0x24000000  * –0x3fffffff Reserved */
-# define KINETIS_BRIDGE0_BASE   0x40000000 /* –0x4007ffff Bitband region for peripheral
-                                            *             bridge 0 (AIPS-Lite0) */
-# define KINETIS_BRIDGE1_BASE   0x40080000 /* –0x400fffff Bitband region for peripheral
-                                            *             bridge 1 (AIPS-Lite1) */
-# define KINETIS_GPIOBB_BASE    0x400ff000 /* –0x400fffff Bitband region for general
-                                            *             purpose input/output (GPIO) */
-                             /* 0x40100000  * –0x41ffffff Reserved */
-# define KINETIS_PALIAS_BASE    0x42000000 /* –0x43ffffff Aliased to peripheral bridge
-                                            *             (AIPS-Lite) and general purpose
-                                            *             input/output (GPIO) bitband */
-                             /* 0x44000000  * –0xdfffffff Reserved */
-# define KINETIS_PERIPH_BASE    0xe0000000 /* –0xe00fffff Private peripherals */
-                             /* 0xe0100000  * –0xffffffff Reserved */
-
-/* Peripheral Bridge 0 Memory Map ***************************************************/
-
-# define KINETIS_AIPS0_BASE     0x40000000 /* Peripheral bridge 0 (AIPS-Lite 0) */
-# define KINETIS_XBAR_BASE      0x40004000 /* Crossbar switch */
-# define KINETIS_DMAC_BASE      0x40008000 /* DMA controller */
-# define KINETIS_DMADESC_BASE   0x40009000 /* DMA controller transfer control descriptors */
-# define KINETIS_FMC_BASE       0x4001f000 /* Flash memory controller */
-# define KINETIS_FTFL_BASE      0x40020000 /* Flash memory */
-# define KINETIS_DMAMUX0_BASE   0x40021000 /* DMA channel mutiplexer 0 */
-# define KINETIS_CAN0_BASE      0x40024000 /* FlexCAN 0 */
-# define KINETIS_SPI0_BASE      0x4002c000 /* SPI 0 */
-# define KINETIS_SPI1_BASE      0x4002d000 /* SPI 1 */
-# define KINETIS_I2S0_BASE      0x4002f000 /* I2S 0 */
-# define KINETIS_CRC_BASE       0x40032000 /* CRC */
-# define KINETIS_USBDCD_BASE    0x40035000 /* USB DCD */
-# define KINETIS_PDB0_BASE      0x40036000 /* Programmable delay block */
-# define KINETIS_PIT_BASE       0x40037000 /* Periodic interrupt timers (PIT) */
-# define KINETIS_FTM0_BASE      0x40038000 /* FlexTimer 0 */
-# define KINETIS_FTM1_BASE      0x40039000 /* FlexTimer 1 */
-# define KINETIS_ADC0_BASE      0x4003b000 /* Analog-to-digital converter (ADC) 0 */
-# define KINETIS_RTC_BASE       0x4003d000 /* Real time clock */
-# define KINETIS_VBATR_BASE     0x4003e000 /* VBAT register file */
-# define KINETIS_LPTMR_BASE     0x40040000 /* Low power timer */
-# define KINETIS_SYSR_BASE      0x40041000 /* System register file */
-# define KINETIS_TSI0_BASE      0x40045000 /* Touch sense interface */
-# define KINETIS_SIMLP_BASE     0x40047000 /* SIM low-power logic */
-# define KINETIS_SIM_BASE       0x40048000 /* System integration module (SIM) */
-# define KINETIS_PORT_BASE(n)   (0x40049000 + ((n) << 12))
-# define KINETIS_PORTA_BASE     0x40049000 /* Port A multiplexing control */
-# define KINETIS_PORTB_BASE     0x4004a000 /* Port B multiplexing control */
-# define KINETIS_PORTC_BASE     0x4004b000 /* Port C multiplexing control */
-# define KINETIS_PORTD_BASE     0x4004c000 /* Port D multiplexing control */
-# define KINETIS_PORTE_BASE     0x4004d000 /* Port E multiplexing control */
-# define KINETIS_WDOG_BASE      0x40052000 /* Software watchdog */
-# define KINETIS_EWM_BASE       0x40061000 /* External watchdog */
-# define KINETIS_CMT_BASE       0x40062000 /* Carrier modulator timer (CMT) */
-# define KINETIS_MCG_BASE       0x40064000 /* Multi-purpose Clock Generator (MCG) */
-# define KINETIS_OSC_BASE       0x40065000 /* System oscillator (OSC) */
-# define KINETIS_I2C0_BASE      0x40066000 /* I2C 0 */
-# define KINETIS_I2C1_BASE      0x40067000 /* I2C 1 */
-# define KINETIS_UART0_BASE     0x4006a000 /* UART0 */
-# define KINETIS_UART1_BASE     0x4006b000 /* UART1 */
-# define KINETIS_UART2_BASE     0x4006c000 /* UART2 */
-# define KINETIS_USB0_BASE      0x40072000 /* USB OTG FS/LS */
-# define KINETIS_CMP_BASE       0x40073000 /* Analog comparator (CMP) / 6-bit digital-to-analog converter (DAC) */
-# define KINETIS_VREF_BASE      0x40074000 /* Voltage reference (VREF) */
-# define KINETIS_LLWU_BASE      0x4007c000 /* Low-leakage wakeup unit (LLWU) */
-# define KINETIS_PMC_BASE       0x4007d000 /* Power management controller (PMC) */
-# define KINETIS_SMC_BASE       0x4007e000 /* System Mode controller (SMC) */
-
-/* Peripheral Bridge 1 Memory Map ***************************************************/
-
-# define KINETIS_AIPS1_BASE     0x40080000 /* Peripheral bridge 1 (AIPS-Lite 1) */
-# define KINETIS_FTM2_BASE      0x400b8000 /* FlexTimer 2 */
-# define KINETIS_ADC1_BASE      0x400bb000 /* Analog-to-digital converter (ADC) 1 */
-# define KINETIS_DAC0_BASE      0x400cc000 /* 12-bit digital-to-analog converter (DAC) 0 */
-
-# define KINETIS_XBARSS_BASE    0x400ff000 /* Not an AIPS-Lite slot. The 32-bit general
-                                            * purpose input/output module that shares the
-                                            * crossbar switch slave port with the AIPS-Lite
-                                            * is accessed at this address. */
-# define KINETIS_GPIO_BASE(n)   (0x400ff000 + ((n) << 6))
-# define KINETIS_GPIOA_BASE     0x400ff000 /* GPIO PORTA registers */
-# define KINETIS_GPIOB_BASE     0x400ff040 /* GPIO PORTB registers */
-# define KINETIS_GPIOC_BASE     0x400ff080 /* GPIO PORTC registers */
-# define KINETIS_GPIOD_BASE     0x400ff0c0 /* GPIO PORTD registers */
-# define KINETIS_GPIOE_BASE     0x400ff100 /* GPIO PORTE registers */
-
-/* Private Peripheral Bus (PPB) Memory Map ******************************************/
-
-# define KINETIS_ITM_BASE       0xe0000000 /* Instrumentation Trace Macrocell (ITM) */
-# define KINETIS_DWT_BASE       0xe0001000 /* Data Watchpoint and Trace (DWT) */
-# define KINETIS_FPB_BASE       0xe0002000 /* Flash Patch and Breakpoint (FPB) */
-# define KINETIS_SCS_BASE       0xe000e000 /* System Control Space (SCS) (for NVIC) */
-# define KINETIS_TPIU_BASE      0xe0040000 /* Trace Port Interface Unit (TPIU) */
-# define KINETIS_MCM_BASE       0xe0080000 /* Miscellaneous Control Module (including ETB Almost Full) */
-# define KINETIS_ROMTAB_BASE    0xe00ff000 /* ROM Table - allows auto-detection of debug components */
-
-/* Memory Map ***********************************************************************/
-/* K40 Family
- *
- * The memory map for the following parts is defined in Freescale document
- * K40P144M100SF2RM
- */
-
-#elif defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100) || \
-    defined(CONFIG_ARCH_CHIP_MK40X256VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X256VMD100) || \
-    defined(CONFIG_ARCH_CHIP_MK40N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK40N512VMD100)
-
-# define KINETIS_FLASH_BASE     0x00000000 /* 0x0fffffff Program flash and read-
-                                            *             only data (Includes exception
-                                            *             vectors in first 1024 bytes) */
-# if !defined(KINETIS_FLEXMEM_SIZE)
-#  define KINETIS_FLEXNVM_BASE  0x10000000 /* 0x13ffffff FlexNVM */
-#  define KINETIS_FLEXRAM_BASE  0x14000000 /* 0x17ffffff FlexRAM */
-# endif
-# define KINETIS_SRAML_BASE     0x18000000 /* 0x1fffffff SRAM_L: Lower SRAM
-                                            *             (ICODE/DCODE) */
-# define KINETIS_SRAMU_BASE     0x20000000 /* 0x200fffff SRAM_U: Upper SRAM bitband
-                                            *             region */
-                             /* 0x20100000  * 0x21ffffff Reserved */
-# define KINETIS_SALIAS_BASE    0x22000000 /* 0x23ffffff Aliased to SRAM_U bitband */
-                             /* 0x24000000  * 0x3fffffff Reserved */
-# define KINETIS_BRIDGE0_BASE   0x40000000 /* 0x4007ffff Bitband region for peripheral
-                                            *             bridge 0 (AIPS-Lite0) */
-# define KINETIS_BRIDGE1_BASE   0x40080000 /* 0x400fffff Bitband region for peripheral
-                                            *             bridge 1 (AIPS-Lite1) */
-# define KINETIS_GPIOBB_BASE    0x400ff000 /* 0x400fffff Bitband region for general
-                                            *             purpose input/output (GPIO) */
-                             /* 0x40100000  * 0x41ffffff Reserved */
-# define KINETIS_PALIAS_BASE    0x42000000 /* 0x43ffffff Aliased to peripheral bridge
-                                            *             (AIPS-Lite) and general purpose
-                                            *             input/output (GPIO) bitband */
-                             /* 0x44000000  * 0x5fffffff Reserved */
-# define KINETIS_FLEXBUS_WBBASE 0x60000000 /* 0x7fffffff FlexBus (External Memory -
-                                            *             Write-back) */
-# define KINETIS_FLEXBUS_WTBASE 0x80000000 /* 0x9fffffff FlexBus (External Memory -
-                                            *             Write-through) */
-# define KINETIS_FLEXBUS_NXBASE 0xa0000000 /* 0xdfffffff FlexBus (External Memory -
-                                            *             Non-executable) */
-# define KINETIS_PERIPH_BASE    0xe0000000 /* 0xe00fffff Private peripherals */
-                             /* 0xe0100000  * 0xffffffff Reserved */
-
-/* Peripheral Bridge 0 Memory Map ***************************************************/
-
-# define KINETIS_AIPS0_BASE     0x40000000 /* Peripheral bridge 0 (AIPS-Lite 0) */
-# define KINETIS_XBAR_BASE      0x40004000 /* Crossbar switch */
-# define KINETIS_DMAC_BASE      0x40008000 /* DMA controller */
-# define KINETIS_DMADESC_BASE   0x40009000 /* DMA controller transfer control descriptors */
-# define KINETIS_FLEXBUSC_BASE  0x4000c000 /* FlexBus controller */
-# define KINETIS_MPU_BASE       0x4000d000 /* MPU */
-# define KINETIS_FMC_BASE       0x4001f000 /* Flash memory controller */
-# define KINETIS_FTFL_BASE      0x40020000 /* Flash memory */
-# define KINETIS_DMAMUX0_BASE   0x40021000 /* DMA channel mutiplexer 0 */
-# define KINETIS_CAN0_BASE      0x40024000 /* FlexCAN 0 */
-# define KINETIS_SPI0_BASE      0x4002c000 /* SPI 0 */
-# define KINETIS_SPI1_BASE      0x4002d000 /* SPI 1 */
-# define KINETIS_I2S0_BASE      0x4002f000 /* I2S 0 */
-# define KINETIS_CRC_BASE       0x40032000 /* CRC */
-# define KINETIS_USBDCD_BASE    0x40035000 /* USB DCD */
-# define KINETIS_PDB0_BASE      0x40036000 /* Programmable delay block */
-# define KINETIS_PIT_BASE       0x40037000 /* Periodic interrupt timers (PIT) */
-# define KINETIS_FTM0_BASE      0x40038000 /* FlexTimer 0 */
-# define KINETIS_FTM1_BASE      0x40039000 /* FlexTimer 1 */
-# define KINETIS_ADC0_BASE      0x4003b000 /* Analog-to-digital converter (ADC) 0 */
-# define KINETIS_RTC_BASE       0x4003d000 /* Real time clock */
-# define KINETIS_VBATR_BASE     0x4003e000 /* VBAT register file */
-# define KINETIS_LPTMR_BASE     0x40040000 /* Low power timer */
-# define KINETIS_SYSR_BASE      0x40041000 /* System register file */
-# define KINETIS_DRYICE_BASE    0x40042000 /* DryIce */
-# define KINETIS_DRYICESS_BASE  0x40043000 /* DryIce secure storage */
-# define KINETIS_TSI0_BASE      0x40045000 /* Touch sense interface */
-# define KINETIS_SIMLP_BASE     0x40047000 /* SIM low-power logic */
-# define KINETIS_SIM_BASE       0x40048000 /* System integration module (SIM) */
-# define KINETIS_PORT_BASE(n)   (0x40049000 + ((n) << 12))
-# define KINETIS_PORTA_BASE     0x40049000 /* Port A multiplexing control */
-# define KINETIS_PORTB_BASE     0x4004a000 /* Port B multiplexing control */
-# define KINETIS_PORTC_BASE     0x4004b000 /* Port C multiplexing control */
-# define KINETIS_PORTD_BASE     0x4004c000 /* Port D multiplexing control */
-# define KINETIS_PORTE_BASE     0x4004d000 /* Port E multiplexing control */
-# define KINETIS_WDOG_BASE      0x40052000 /* Software watchdog */
-# define KINETIS_EWM_BASE       0x40061000 /* External watchdog */
-# define KINETIS_CMT_BASE       0x40062000 /* Carrier modulator timer (CMT) */
-# define KINETIS_MCG_BASE       0x40064000 /* Multi-purpose Clock Generator (MCG) */
-# define KINETIS_OSC_BASE       0x40065000 /* System oscillator (OSC) */
-# define KINETIS_I2C0_BASE      0x40066000 /* I2C 0 */
-# define KINETIS_I2C1_BASE      0x40067000 /* I2C 1 */
-# define KINETIS_UART0_BASE     0x4006a000 /* UART0 */
-# define KINETIS_UART1_BASE     0x4006b000 /* UART1 */
-# define KINETIS_UART2_BASE     0x4006c000 /* UART2 */
-# define KINETIS_UART3_BASE     0x4006d000 /* UART3 */
-# define KINETIS_USB0_BASE      0x40072000 /* USB OTG FS/LS */
-# define KINETIS_CMP_BASE       0x40073000 /* Analog comparator (CMP) / 6-bit digital-to-analog converter (DAC) */
-# define KINETIS_VREF_BASE      0x40074000 /* Voltage reference (VREF) */
-# define KINETIS_LLWU_BASE      0x4007c000 /* Low-leakage wakeup unit (LLWU) */
-# define KINETIS_PMC_BASE       0x4007d000 /* Power management controller (PMC) */
-# define KINETIS_SMC_BASE       0x4007e000 /* System Mode controller (SMC) */
-
-/* Peripheral Bridge 1 Memory Map ***************************************************/
-
-# define KINETIS_AIPS1_BASE     0x40080000 /* Peripheral bridge 1 (AIPS-Lite 1) */
-# define KINETIS_CAN1_BASE      0x400a4000 /* FlexCAN 1 */
-# define KINETIS_SPI2_BASE      0x400ac000 /* SPI 2 */
-# define KINETIS_SDHC_BASE      0x400b1000 /* SDHC */
-# define KINETIS_FTM2_BASE      0x400b8000 /* FlexTimer 2 */
-# define KINETIS_ADC1_BASE      0x400bb000 /* Analog-to-digital converter (ADC) 1 */
-# define KINETIS_SLCD_BASE      0x400be000 /* Segment LCD */
-# define KINETIS_DAC0_BASE      0x400cc000 /* 12-bit digital-to-analog converter (DAC) 0 */
-# define KINETIS_DAC1_BASE      0x400cd000 /* 12-bit digital-to-analog converter (DAC) 1 */
-# define KINETIS_UART4_BASE     0x400ea000 /* UART4 */
-# define KINETIS_UART5_BASE     0x400eb000 /* UART5 */
-# define KINETIS_XBARSS_BASE    0x400ff000 /* Not an AIPS-Lite slot. The 32-bit general
-                                            * purpose input/output module that shares the
-                                            * crossbar switch slave port with the AIPS-Lite
-                                            * is accessed at this address. */
-# define KINETIS_GPIO_BASE(n)   (0x400ff000 + ((n) << 6))
-# define KINETIS_GPIOA_BASE     0x400ff000 /* GPIO PORTA registers */
-# define KINETIS_GPIOB_BASE     0x400ff040 /* GPIO PORTB registers */
-# define KINETIS_GPIOC_BASE     0x400ff080 /* GPIO PORTC registers */
-# define KINETIS_GPIOD_BASE     0x400ff0c0 /* GPIO PORTD registers */
-# define KINETIS_GPIOE_BASE     0x400ff100 /* GPIO PORTE registers */
-
-/* Private Peripheral Bus (PPB) Memory Map ******************************************/
-
-# define KINETIS_ITM_BASE       0xe0000000 /* Instrumentation Trace Macrocell (ITM) */
-# define KINETIS_DWT_BASE       0xe0001000 /* Data Watchpoint and Trace (DWT) */
-# define KINETIS_FPB_BASE       0xe0002000 /* Flash Patch and Breakpoint (FPB) */
-# define KINETIS_SCS_BASE       0xe000e000 /* System Control Space (SCS) (for NVIC) */
-# define KINETIS_TPIU_BASE      0xe0040000 /* Trace Port Interface Unit (TPIU) */
-# define KINETIS_ETM_BASE       0xe0041000 /* Embedded Trace Macrocell (ETM) */
-# define KINETIS_ETB_BASE       0xe0042000 /* Embedded Trace Buffer (ETB) */
-# define KINETIS_TFUN_BASE      0xe0043000 /* Embedded Trace Funnel */
-# define KINETIS_MCM_BASE       0xe0080000 /* Miscellaneous Control Module (including ETB Almost Full) */
-# define KINETIS_ROMTAB_BASE    0xe00ff000 /* ROM Table - allows auto-detection of debug components */
-
-/* Memory Map ***********************************************************************/
-/* K60 Family
- *
- * The memory map for the following parts is defined in Freescale document
- * K60P144M100SF2RM
- */
-
-#elif defined(CONFIG_ARCH_CHIP_MK60N256VLQ100) || defined(CONFIG_ARCH_CHIP_MK60X256VLQ100) || \
-      defined(CONFIG_ARCH_CHIP_MK60N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK60N256VMD100) || \
-      defined(CONFIG_ARCH_CHIP_MK60X256VMD100) || defined(CONFIG_ARCH_CHIP_MK60N512VMD100) || \
-      defined(CONFIG_ARCH_CHIP_MK60N512VLL100)
-
-# define KINETIS_FLASH_BASE     0x00000000 /* 0x0fffffff Program flash and read-
-                                            *             only data (Includes exception
-                                            *             vectors in first 1024 bytes) */
-# if !defined(KINETIS_FLEXMEM_SIZE)
-#  define KINETIS_FLEXNVM_BASE  0x10000000 /* 0x13ffffff FlexNVM */
-#  define KINETIS_FLEXRAM_BASE  0x14000000 /* 0x17ffffff FlexRAM */
-# endif
-# define KINETIS_SRAML_BASE     0x18000000 /* 0x1fffffff SRAM_L: Lower SRAM
-                                            *             (ICODE/DCODE) */
-# define KINETIS_SRAMU_BASE     0x20000000 /* 0x200fffff SRAM_U: Upper SRAM bitband
-                                            *             region */
-                             /* 0x20100000  * 0x21ffffff Reserved */
-# define KINETIS_SALIAS_BASE    0x22000000 /* 0x23ffffff Aliased to SRAM_U bitband */
-                             /* 0x24000000  * 0x3fffffff Reserved */
-# define KINETIS_BRIDGE0_BASE   0x40000000 /* 0x4007ffff Bitband region for peripheral
-                                            *             bridge 0 (AIPS-Lite0) */
-# define KINETIS_BRIDGE1_BASE   0x40080000 /* 0x400fffff Bitband region for peripheral
-                                            *             bridge 1 (AIPS-Lite1) */
-# define KINETIS_GPIOBB_BASE    0x400ff000 /* 0x400fffff Bitband region for general
-                                            *             purpose input/output (GPIO) */
-                             /* 0x40100000  * 0x41ffffff Reserved */
-# define KINETIS_PALIAS_BASE    0x42000000 /* 0x43ffffff Aliased to peripheral bridge
-                                            *             (AIPS-Lite) and general purpose
-                                            *             input/output (GPIO) bitband */
-                             /* 0x44000000  * 0x5fffffff Reserved */
-# define KINETIS_FLEXBUS_BASE   0x60000000 /* 0x7fffffff FlexBus */
-# define KINETIS_PERIPH_BASE    0xe0000000 /* 0xe00fffff Private peripherals */
-                             /* 0xe0100000  * 0xffffffff Reserved */
-
-/* Peripheral Bridge 0 Memory Map ***************************************************/
-
-# define KINETIS_AIPS0_BASE     0x40000000 /* Peripheral bridge 0 (AIPS-Lite 0) */
-# define KINETIS_XBAR_BASE      0x40004000 /* Crossbar switch */
-# define KINETIS_DMAC_BASE      0x40008000 /* DMA controller */
-# define KINETIS_DMADESC_BASE   0x40009000 /* DMA controller transfer control descriptors */
-# define KINETIS_FLEXBUSC_BASE  0x4000c000 /* FlexBus controller */
-# define KINETIS_MPU_BASE       0x4000d000 /* MPU */
-# define KINETIS_FMC_BASE       0x4001f000 /* Flash memory controller */
-# define KINETIS_FTFL_BASE      0x40020000 /* Flash memory */
-# define KINETIS_DMAMUX0_BASE   0x40021000 /* DMA channel mutiplexer 0 */
-# define KINETIS_CAN0_BASE      0x40024000 /* FlexCAN 0 */
-# define KINETIS_SPI0_BASE      0x4002c000 /* DSPI 0 */
-# define KINETIS_SPI1_BASE      0x4002d000 /* DSPI 1 */
-# define KINETIS_I2S0_BASE      0x4002f000 /* I2S 0 */
-# define KINETIS_CRC_BASE       0x40032000 /* CRC */
-# define KINETIS_USBDCD_BASE    0x40035000 /* USB DCD */
-# define KINETIS_PDB0_BASE      0x40036000 /* Programmable delay block */
-# define KINETIS_PIT_BASE       0x40037000 /* Periodic interrupt timers (PIT) */
-# define KINETIS_FTM0_BASE      0x40038000 /* FlexTimer (FTM) 0 */
-# define KINETIS_FTM1_BASE      0x40039000 /* FlexTimer (FTM) 1 */
-# define KINETIS_ADC0_BASE      0x4003b000 /* Analog-to-digital converter (ADC) 0 */
-# define KINETIS_RTC_BASE       0x4003d000 /* Real time clock */
-# define KINETIS_VBATR_BASE     0x4003e000 /* VBAT register file */
-# define KINETIS_LPTMR_BASE     0x40040000 /* Low power timer */
-# define KINETIS_SYSR_BASE      0x40041000 /* System register file */
-# define KINETIS_DRYICE_BASE    0x40042000 /* DryIce */
-# define KINETIS_DRYICESS_BASE  0x40043000 /* DryIce secure storage */
-# define KINETIS_TSI0_BASE      0x40045000 /* Touch sense interface */
-# define KINETIS_SIMLP_BASE     0x40047000 /* SIM low-power logic */
-# define KINETIS_SIM_BASE       0x40048000 /* System integration module (SIM) */
-# define KINETIS_PORT_BASE(n)   (0x40049000 + ((n) << 12))
-# define KINETIS_PORTA_BASE     0x40049000 /* Port A multiplexing control */
-# define KINETIS_PORTB_BASE     0x4004a000 /* Port B multiplexing control */
-# define KINETIS_PORTC_BASE     0x4004b000 /* Port C multiplexing control */
-# define KINETIS_PORTD_BASE     0x4004c000 /* Port D multiplexing control */
-# define KINETIS_PORTE_BASE     0x4004d000 /* Port E multiplexing control */
-# define KINETIS_WDOG_BASE      0x40052000 /* Software watchdog */
-# define KINETIS_EWM_BASE       0x40061000 /* External watchdog */
-# define KINETIS_CMT_BASE       0x40062000 /* Carrier modulator timer (CMT) */
-# define KINETIS_MCG_BASE       0x40064000 /* Multi-purpose Clock Generator (MCG) */
-# define KINETIS_OSC_BASE       0x40065000 /* System oscillator (XOSC) */
-# define KINETIS_I2C0_BASE      0x40066000 /* I2C 0 */
-# define KINETIS_I2C1_BASE      0x40067000 /* I2C 1 */
-# define KINETIS_UART0_BASE     0x4006a000 /* UART0 */
-# define KINETIS_UART1_BASE     0x4006b000 /* UART1 */
-# define KINETIS_UART2_BASE     0x4006c000 /* UART2 */
-# define KINETIS_UART3_BASE     0x4006d000 /* UART3 */
-# define KINETIS_USB0_BASE      0x40072000 /* USB OTG FS/LS */
-# define KINETIS_CMP_BASE       0x40073000 /* Analog comparator (CMP) / 6-bit digital-to-analog converter (DAC) */
-# define KINETIS_VREF_BASE      0x40074000 /* Voltage reference (VREF) */
-# define KINETIS_LLWU_BASE      0x4007c000 /* Low-leakage wakeup unit (LLWU) */
-# define KINETIS_PMC_BASE       0x4007d000 /* Power management controller (PMC) */
-# define KINETIS_SMC_BASE       0x4007e000 /* System Mode controller (SMC) */
-
-/* Peripheral Bridge 1 Memory Map ***************************************************/
-
-# define KINETIS_AIPS1_BASE     0x40080000 /* Peripheral bridge 1 (AIPS-Lite 1) */
-# define KINETIS_RNGB_BASE      0x400a0000 /* Random number generator (RNGB) */
-# define KINETIS_CAN1_BASE      0x400a4000 /* FlexCAN 1 */
-# define KINETIS_SPI2_BASE      0x400ac000 /* DSPI 2 */
-# define KINETIS_SDHC_BASE      0x400b1000 /* SDHC */
-# define KINETIS_FTM2_BASE      0x400b8000 /* FlexTimer 2 */
-# define KINETIS_ADC1_BASE      0x400bb000 /* Analog-to-digital converter (ADC) 1 */
-# define KINETIS_EMAC_BASE      0x400c0000 /* Ethernet MAC and IEEE 1588 timers */
-# define KINETIS_DAC0_BASE      0x400cc000 /* 12-bit digital-to-analog converter (DAC) 0 */
-# define KINETIS_DAC1_BASE      0x400cd000 /* 12-bit digital-to-analog converter (DAC) 1 */
-# define KINETIS_UART4_BASE     0x400ea000 /* UART4 */
-# define KINETIS_UART5_BASE     0x400eb000 /* UART5 */
-# define KINETIS_XBARSS_BASE    0x400ff000 /* Not an AIPS-Lite slot. The 32-bit general
-                                            * purpose input/output module that shares the
-                                            * crossbar switch slave port with the AIPS-Lite
-                                            * is accessed at this address. */
-# define KINETIS_GPIO_BASE(n)   (0x400ff000 + ((n) << 6))
-# define KINETIS_GPIOA_BASE     0x400ff000 /* GPIO PORTA registers */
-# define KINETIS_GPIOB_BASE     0x400ff040 /* GPIO PORTB registers */
-# define KINETIS_GPIOC_BASE     0x400ff080 /* GPIO PORTC registers */
-# define KINETIS_GPIOD_BASE     0x400ff0c0 /* GPIO PORTD registers */
-# define KINETIS_GPIOE_BASE     0x400ff100 /* GPIO PORTE registers */
-
-/* Private Peripheral Bus (PPB) Memory Map ******************************************/
-
-# define KINETIS_ITM_BASE       0xe0000000 /* Instrumentation Trace Macrocell (ITM) */
-# define KINETIS_DWT_BASE       0xe0001000 /* Data Watchpoint and Trace (DWT) */
-# define KINETIS_FPB_BASE       0xe0002000 /* Flash Patch and Breakpoint (FPB) */
-# define KINETIS_SCS_BASE       0xe000e000 /* System Control Space (SCS) (for NVIC) */
-# define KINETIS_TPIU_BASE      0xe0040000 /* Trace Port Interface Unit (TPIU) */
-# define KINETIS_ETM_BASE       0xe0041000 /* Embedded Trace Macrocell (ETM) */
-# define KINETIS_ETB_BASE       0xe0042000 /* Embedded Trace Buffer (ETB) */
-# define KINETIS_TFUN_BASE      0xe0043000 /* Embedded Trace Funnel */
-# define KINETIS_MCM_BASE       0xe0080000 /* Miscellaneous Control Module (including ETB Almost Full) */
-# define KINETIS_MMCAU_BASE     0xe0081000 /* Memory Mapped Cryptographic Acceleration Unit (MMCAU) */
-# define KINETIS_ROMTAB_BASE    0xe00ff000 /* ROM Table - allows auto-detection of debug components */
-
-#else
-  /* The memory map for other parts is defined in other documents and may or may not
-   * be the same as above (the family members are all very similar)  This error just
-   * means that you have to look at the document and determine for yourself if the
-   * memory map is the same.
-   */
-
-#  error "No memory map for this Kinetis part"
-#endif
-
-/************************************************************************************
- * Public Types
- ************************************************************************************/
-
-/************************************************************************************
- * Public Data
- ************************************************************************************/
-
-/************************************************************************************
- * Public Functions
- ************************************************************************************/
-
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_MEMORYMAP_H */
diff --git a/arch/arm/src/kinetis/kinetis_mpuinit.h b/arch/arm/src/kinetis/kinetis_mpuinit.h
index f3cf95370efc9addeb53f17871c50b370aa1239f..3327176841b742c3c652ceb7539e3ce3d5bf84fb 100644
--- a/arch/arm/src/kinetis/kinetis_mpuinit.h
+++ b/arch/arm/src/kinetis/kinetis_mpuinit.h
@@ -42,18 +42,6 @@
 
 #include 
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/************************************************************************************
- * Public Types
- ************************************************************************************/
-
-/************************************************************************************
- * Public Data
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
diff --git a/arch/arm/src/kinetis/kinetis_pin.c b/arch/arm/src/kinetis/kinetis_pin.c
index 851d0c9d9cf885a9eab330d5d06502dc10535183..8a2e3294321a6ce237c2dd19be73404fa4751d50 100644
--- a/arch/arm/src/kinetis/kinetis_pin.c
+++ b/arch/arm/src/kinetis/kinetis_pin.c
@@ -48,22 +48,9 @@
 #include "up_arch.h"
 #include "up_internal.h"
 
-#include "kinetis_memorymap.h"
 #include "kinetis.h"
-#include "kinetis_port.h"
-#include "kinetis_gpio.h"
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
+#include "chip/kinetis_port.h"
+#include "chip/kinetis_gpio.h"
 
 /****************************************************************************
  * Public Functions
diff --git a/arch/arm/src/kinetis/kinetis_pindma.c b/arch/arm/src/kinetis/kinetis_pindma.c
index 40acdc036b58b07092851a87d490e610257ee698..411f371bbbc746a54bbb380e29d4de094eba5e8c 100644
--- a/arch/arm/src/kinetis/kinetis_pindma.c
+++ b/arch/arm/src/kinetis/kinetis_pindma.c
@@ -37,12 +37,24 @@
  * Included Files
  ****************************************************************************/
 
-#include 
 #include 
 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
 #include 
 #include "up_internal.h"
 
+#include "kinetis_config.h"
+#include "chip.h"
+#include "kinetis.h"
+
+
+
 #ifdef CONFIG_KINETIS_DMA
 
 /****************************************************************************
diff --git a/arch/arm/src/kinetis/kinetis_pindump.c b/arch/arm/src/kinetis/kinetis_pindump.c
new file mode 100644
index 0000000000000000000000000000000000000000..a660c87307c014bcb1ae255116d7124a1f63fa2c
--- /dev/null
+++ b/arch/arm/src/kinetis/kinetis_pindump.c
@@ -0,0 +1,128 @@
+/****************************************************************************
+ * arch/arm/src/kinetis/kinetis_pindump.c
+ *
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include "up_arch.h"
+
+#include "kinetis.h"
+#include "chip/kinetis_gpio.h"
+#include "chip/kinetis_port.h"
+
+#ifdef CONFIG_DEBUG_GPIO_INFO
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Port letters for prettier debug output */
+
+static const char g_portchar[KINETIS_NPORTS] =
+{
+#if KINETIS_NPORTS > 9
+#  error "Additional support required for this number of GPIOs"
+#elif KINETIS_NPORTS > 8
+  'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I'
+#elif KINETIS_NPORTS > 7
+  'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H'
+#elif KINETIS_NPORTS > 6
+  'A', 'B', 'C', 'D', 'E', 'F', 'G'
+#elif KINETIS_NPORTS > 5
+  'A', 'B', 'C', 'D', 'E', 'F'
+#elif KINETIS_NPORTS > 4
+  'A', 'B', 'C', 'D', 'E'
+#elif KINETIS_NPORTS > 3
+  'A', 'B', 'C', 'D'
+#elif KINETIS_NPORTS > 2
+  'A', 'B', 'C'
+#elif KINETIS_NPORTS > 1
+  'A', 'B'
+#elif KINETIS_NPORTS > 0
+  'A'
+#else
+#  error "Bad number of GPIOs"
+#endif
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  kinetis_pindump
+ *
+ * Description:
+ *   Dump all GPIO registers associated with the provided pin description
+ *   along with a descriptive messasge.
+ *
+ ****************************************************************************/
+
+void kinetis_pindump(uint32_t pinset, const char *msg)
+{
+  irqstate_t flags;
+  uintptr_t base;
+  int port;
+
+  /* Decode the port and pin.  Use the port number to get the GPIO base
+   * address.
+   */
+
+  port = (pinset & _PIN_PORT_MASK) >> _PIN_PORT_SHIFT;
+  DEBUGASSERT((unsigned)port < KINETIS_NPORTS);
+  base = KINETIS_GPIO_BASE(port);
+
+  /* The following requires exclusive access to the GPIO registers */
+
+  flags = enter_critical_section();
+
+  gpioinfo("GPIO%c pinset: %08x base: %08x -- %s\n",
+           g_portchar[port], pinset, base, msg);
+  gpioinfo("  PDOR: %08x  PDIR: %08x  PDDR: %08x\n",
+           getreg32(base + KINETIS_GPIO_PDOR_OFFSET),
+           getreg32(base + KINETIS_GPIO_PDIR_OFFSET),
+           getreg32(base + KINETIS_GPIO_PDDR_OFFSET));
+
+  leave_critical_section(flags);
+}
+
+#endif /* CONFIG_DEBUG_GPIO_INFO */
diff --git a/arch/arm/src/kinetis/kinetis_pingpio.c b/arch/arm/src/kinetis/kinetis_pingpio.c
index 3663a92399f8c58e6523394970d5285912889ba0..b8879208164ef1bb05e36ac126e6e3624df41681 100644
--- a/arch/arm/src/kinetis/kinetis_pingpio.c
+++ b/arch/arm/src/kinetis/kinetis_pingpio.c
@@ -48,21 +48,8 @@
 #include "up_arch.h"
 #include "up_internal.h"
 
-#include "kinetis_memorymap.h"
 #include "kinetis.h"
-#include "kinetis_gpio.h"
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
+#include "chip/kinetis_gpio.h"
 
 /****************************************************************************
  * Public Functions
diff --git a/arch/arm/src/kinetis/kinetis_pinirq.c b/arch/arm/src/kinetis/kinetis_pinirq.c
index 0ec0d64176b30e8882154adc9fb6a4261745ab07..f40be80a8e44cadd302da347df4a194cf10e9588 100644
--- a/arch/arm/src/kinetis/kinetis_pinirq.c
+++ b/arch/arm/src/kinetis/kinetis_pinirq.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  *  arch/arm/src/kinetis/kinetis_pinirq.c
  *
- *   Copyright (C) 2011, 2013, 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2013, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -41,6 +41,7 @@
 #include 
 
 #include 
+#include 
 #include 
 
 #include 
@@ -50,9 +51,9 @@
 #include "up_internal.h"
 
 #include "kinetis.h"
-#include "kinetis_port.h"
+#include "chip/kinetis_port.h"
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_KINETIS_GPIOIRQ
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -73,6 +74,12 @@
  * Private Types
  ****************************************************************************/
 
+struct kinetis_pinirq_s
+{
+   xcpt_t handler;
+   void *arg;
+};
+
 /****************************************************************************
  * Private Data
  ****************************************************************************/
@@ -84,19 +91,19 @@
  */
 
 #ifdef CONFIG_KINETIS_PORTAINTS
-static xcpt_t g_portaisrs[32];
+static struct kinetis_pinirq_s g_portaisrs[32];
 #endif
 #ifdef CONFIG_KINETIS_PORTBINTS
-static xcpt_t g_portbisrs[32];
+static struct kinetis_pinirq_s g_portbisrs[32];
 #endif
 #ifdef CONFIG_KINETIS_PORTCINTS
-static xcpt_t g_portcisrs[32];
+static struct kinetis_pinirq_s g_portcisrs[32];
 #endif
 #ifdef CONFIG_KINETIS_PORTDINTS
-static xcpt_t g_portdisrs[32];
+static struct kinetis_pinirq_s g_portdisrs[32];
 #endif
 #ifdef CONFIG_KINETIS_PORTEINTS
-static xcpt_t g_porteisrs[32];
+static struct kinetis_pinirq_s g_porteisrs[32];
 #endif
 
 /****************************************************************************
@@ -113,7 +120,7 @@ static xcpt_t g_porteisrs[32];
 
 #ifdef HAVE_PORTINTS
 static int kinetis_portinterrupt(int irq, FAR void *context,
-                                uintptr_t addr, xcpt_t *isrtab)
+                                uintptr_t addr, struct kinetis_pinirq_s *isrtab)
 {
   uint32_t isfr = getreg32(addr);
   int i;
@@ -136,11 +143,14 @@ static int kinetis_portinterrupt(int irq, FAR void *context,
            * interrupt handler for the pin.
            */
 
-          if (isrtab[i])
+          if (isrtab[i].handler != NULL)
             {
+              xcpt_t handler = isrtab[i].handler;
+              void  *arg     = isrtab[i].arg;
+
               /* There is a registered interrupt handler... invoke it */
 
-              (void)isrtab[i](irq, context);
+              (void)handler(irq, context, arg);
             }
 
           /* Writing a one to the ISFR register will clear the pending
@@ -169,31 +179,31 @@ static int kinetis_portinterrupt(int irq, FAR void *context,
  ****************************************************************************/
 
 #ifdef CONFIG_KINETIS_PORTAINTS
-static int kinetis_portainterrupt(int irq, FAR void *context)
+static int kinetis_portainterrupt(int irq, FAR void *context, FAR void *arg)
 {
   return kinetis_portinterrupt(irq, context, KINETIS_PORTA_ISFR, g_portaisrs);
 }
 #endif
 #ifdef CONFIG_KINETIS_PORTBINTS
-static int kinetis_portbinterrupt(int irq, FAR void *context)
+static int kinetis_portbinterrupt(int irq, FAR void *context, FAR void *arg)
 {
   return kinetis_portinterrupt(irq, context, KINETIS_PORTB_ISFR, g_portbisrs);
 }
 #endif
 #ifdef CONFIG_KINETIS_PORTCINTS
-static int kinetis_portcinterrupt(int irq, FAR void *context)
+static int kinetis_portcinterrupt(int irq, FAR void *context, FAR void *arg)
 {
   return kinetis_portinterrupt(irq, context, KINETIS_PORTC_ISFR, g_portcisrs);
 }
 #endif
 #ifdef CONFIG_KINETIS_PORTDINTS
-static int kinetis_portdinterrupt(int irq, FAR void *context)
+static int kinetis_portdinterrupt(int irq, FAR void *context, FAR void *arg)
 {
   return kinetis_portinterrupt(irq, context, KINETIS_PORTD_ISFR, g_portdisrs);
 }
 #endif
 #ifdef CONFIG_KINETIS_PORTEINTS
-static int kinetis_porteinterrupt(int irq, FAR void *context)
+static int kinetis_porteinterrupt(int irq, FAR void *context, FAR void *arg)
 {
   return kinetis_portinterrupt(irq, context, KINETIS_PORTE_ISFR, g_porteisrs);
 }
@@ -215,27 +225,27 @@ static int kinetis_porteinterrupt(int irq, FAR void *context)
 void kinetis_pinirqinitialize(void)
 {
 #ifdef CONFIG_KINETIS_PORTAINTS
-  (void)irq_attach(KINETIS_IRQ_PORTA, kinetis_portainterrupt);
+  (void)irq_attach(KINETIS_IRQ_PORTA, kinetis_portainterrupt, NULL);
   putreg32(0xffffffff, KINETIS_PORTA_ISFR);
   up_enable_irq(KINETIS_IRQ_PORTA);
 #endif
 #ifdef CONFIG_KINETIS_PORTBINTS
-  (void)irq_attach(KINETIS_IRQ_PORTB, kinetis_portbinterrupt);
+  (void)irq_attach(KINETIS_IRQ_PORTB, kinetis_portbinterrupt, NULL);
   putreg32(0xffffffff, KINETIS_PORTB_ISFR);
   up_enable_irq(KINETIS_IRQ_PORTB);
 #endif
 #ifdef CONFIG_KINETIS_PORTCINTS
-  (void)irq_attach(KINETIS_IRQ_PORTC, kinetis_portcinterrupt);
+  (void)irq_attach(KINETIS_IRQ_PORTC, kinetis_portcinterrupt, NULL);
   putreg32(0xffffffff, KINETIS_PORTC_ISFR);
   up_enable_irq(KINETIS_IRQ_PORTC);
 #endif
 #ifdef CONFIG_KINETIS_PORTDINTS
-  (void)irq_attach(KINETIS_IRQ_PORTD, kinetis_portdinterrupt);
+  (void)irq_attach(KINETIS_IRQ_PORTD, kinetis_portdinterrupt, NULL);
   putreg32(0xffffffff, KINETIS_PORTD_ISFR);
   up_enable_irq(KINETIS_IRQ_PORTD);
 #endif
 #ifdef CONFIG_KINETIS_PORTEINTS
-  (void)irq_attach(KINETIS_IRQ_PORTE, kinetis_porteinterrupt);
+  (void)irq_attach(KINETIS_IRQ_PORTE, kinetis_porteinterrupt, NULL);
   putreg32(0xffffffff, KINETIS_PORTE_ISFR);
   up_enable_irq(KINETIS_IRQ_PORTE);
 #endif
@@ -253,22 +263,21 @@ void kinetis_pinirqinitialize(void)
  *   3. Call kinetis_pinirqenable() to enable interrupts on the pin.
  *
  * Parameters:
- *  - pinset:  Pin configuration
- *  - pinisr:  Pin interrupt service routine
+ *   pinset - Pin configuration
+ *   pinisr - Pin interrupt service routine
+ *   arg    - An argument that will be provided to the interrupt service routine.
  *
  * Returns:
- *   The previous value of the interrupt handler function pointer.  This
- *   value may, for example, be used to restore the previous handler whe
- *   multiple handlers are used.
+ *   Zero (OK) is returned on success; a negated errno value is returned on any
+ *   failure to indicate the nature of the failure.
  *
- ****************************************************************************/
+ ************************************************************************************/
 
-xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr)
+int kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr, void *arg)
 {
 #ifdef HAVE_PORTINTS
-  xcpt_t      *isrtab;
-  xcpt_t       oldisr;
-  irqstate_t   flags;
+  struct kinetis_pinirq_s *isrtab;
+  irqstate_t flags;
   unsigned int port;
   unsigned int pin;
 
@@ -317,20 +326,20 @@ xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr)
 #endif
       default:
         leave_critical_section(flags);
-        return NULL;
+        return -EINVAL;
     }
 
    /* Get the old PIN ISR and set the new PIN ISR */
 
-   oldisr      = isrtab[pin];
-   isrtab[pin] = pinisr;
+   isrtab[pin].handler = pinisr;
+   isrtab[pin].arg     = arg;
 
    /* And return the old PIN isr address */
 
    leave_critical_section(flags);
-   return oldisr;
+   return OK;
 #else
-   return NULL;
+   return -ENOSYS;
 #endif /* HAVE_PORTINTS */
 }
 
@@ -450,4 +459,4 @@ void kinetis_pinirqdisable(uint32_t pinset)
     }
 #endif /* HAVE_PORTINTS */
 }
-#endif /* CONFIG_GPIO_IRQ */
+#endif /* CONFIG_KINETIS_GPIOIRQ */
diff --git a/arch/arm/src/kinetis/kinetis_pwm.c b/arch/arm/src/kinetis/kinetis_pwm.c
new file mode 100644
index 0000000000000000000000000000000000000000..83f6c76699bea27e692439aa3d842e97df1e00be
--- /dev/null
+++ b/arch/arm/src/kinetis/kinetis_pwm.c
@@ -0,0 +1,812 @@
+/****************************************************************************
+ * arch/arm/src/kinetis/kinetis_pwm.c
+ *
+ *   Copyright (C) 2013, 2016, 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            Alan Carvalho de Assis 
+ *            Ken Fazzone 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "up_internal.h"
+#include "up_arch.h"
+
+#include "chip.h"
+
+#include "kinetis.h"
+#include "kinetis_pwm.h"
+#include "chip/kinetis_gpio.h"
+#include "chip/kinetis_ftm.h"
+#include "chip/kinetis_sim.h"
+
+/* This module then only compiles if there is at least one enabled timer
+ * intended for use with the PWM upper half driver.
+ */
+
+#if defined(CONFIG_KINETIS_FTM0_PWM)  || defined(CONFIG_KINETIS_FTM1_PWM)  || \
+    defined(CONFIG_KINETIS_FTM2_PWM)  || defined(CONFIG_KINETIS_FTM3_PWM)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* PWM/Timer Definitions ****************************************************/
+
+/* Debug ********************************************************************/
+
+#ifdef CONFIG_DEBUG_PWM_INFO
+#  define pwm_dumpgpio(p,m) kinetis_pindump(p,m)
+#else
+#  define pwm_dumpgpio(p,m)
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* This structure represents the state of one PWM timer */
+
+struct kinetis_pwmtimer_s
+{
+  FAR const struct pwm_ops_s *ops;     /* PWM operations */
+  uint8_t                     tpmid;   /* Timer/PWM Module ID {0,..,2} */
+  uint8_t                     channel; /* Timer/PWM Module channel: {0,..5} */
+  uint32_t                    base;    /* The base address of the timer */
+  uint32_t                    pincfg;  /* Output pin configuration */
+  uint32_t                    pclk;    /* The frequency of the peripheral clock */
+};
+
+/****************************************************************************
+ * Static Function Prototypes
+ ****************************************************************************/
+
+/* Register access */
+
+static uint32_t pwm_getreg(struct kinetis_pwmtimer_s *priv, int offset);
+static void pwm_putreg(struct kinetis_pwmtimer_s *priv, int offset, uint32_t value);
+
+#ifdef CONFIG_DEBUG_PWM_INFO
+static void pwm_dumpregs(struct kinetis_pwmtimer_s *priv, FAR const char *msg);
+#else
+#  define pwm_dumpregs(priv,msg)
+#endif
+
+/* Timer management */
+
+static int pwm_timer(FAR struct kinetis_pwmtimer_s *priv,
+                     FAR const struct pwm_info_s *info);
+
+/* PWM driver methods */
+
+static int pwm_setup(FAR struct pwm_lowerhalf_s *dev);
+static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev);
+
+static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
+                     FAR const struct pwm_info_s *info);
+
+static int pwm_stop(FAR struct pwm_lowerhalf_s *dev);
+static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev,
+                     int cmd, unsigned long arg);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* This is the list of lower half PWM driver methods used by the upper half
+ * driver.
+ */
+
+static const struct pwm_ops_s g_pwmops =
+{
+  .setup      = pwm_setup,
+  .shutdown   = pwm_shutdown,
+  .start      = pwm_start,
+  .stop       = pwm_stop,
+  .ioctl      = pwm_ioctl,
+};
+
+#ifdef CONFIG_KINETIS_FTM0_PWM
+static struct kinetis_pwmtimer_s g_pwm0dev =
+{
+  .ops        = &g_pwmops,
+  .tpmid      = 0,
+  .channel    = CONFIG_KINETIS_FTM0_CHANNEL,
+  .base       = KINETIS_FTM0_BASE,
+  .pincfg     = PWM_FTM0_PINCFG,
+  .pclk       = BOARD_CORECLK_FREQ,
+};
+#endif
+
+#ifdef CONFIG_KINETIS_FTM1_PWM
+static struct kinetis_pwmtimer_s g_pwm1dev =
+{
+  .ops        = &g_pwmops,
+  .tpmid      = 1,
+  .channel    = CONFIG_KINETIS_FTM1_CHANNEL,
+  .base       = KINETIS_FTM1_BASE,
+  .pincfg     = PWM_FTM1_PINCFG,
+  .pclk       = BOARD_CORECLK_FREQ,
+};
+#endif
+
+#ifdef CONFIG_KINETIS_FTM2_PWM
+static struct kinetis_pwmtimer_s g_pwm2dev =
+{
+  .ops        = &g_pwmops,
+  .tpmid      = 2,
+  .channel    = CONFIG_KINETIS_FTM2_CHANNEL,
+  .base       = KINETIS_FTM2_BASE,
+  .pincfg     = PWM_FTM2_PINCFG,
+  .pclk       = BOARD_CORECLK_FREQ,
+};
+#endif
+
+#ifdef CONFIG_KINETIS_FTM3_PWM
+static struct kinetis_pwmtimer_s g_pwm3dev =
+{
+  .ops        = &g_pwmops,
+  .tpmid      = 3,
+  .channel    = CONFIG_KINETIS_FTM3_CHANNEL,
+  .base       = KINETIS_FTM3_BASE,
+  .pincfg     = PWM_FTM3_PINCFG,
+  .pclk       = BOARD_CORECLK_FREQ,
+};
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: pwm_getreg
+ *
+ * Description:
+ *   Read the value of an PWM timer register.
+ *
+ * Input Parameters:
+ *   priv - A reference to the PWM block status
+ *   offset - The offset to the register to read
+ *
+ * Returned Value:
+ *   The current contents of the specified register
+ *
+ ****************************************************************************/
+
+static uint32_t pwm_getreg(struct kinetis_pwmtimer_s *priv, int offset)
+{
+  return getreg32(priv->base + offset);
+}
+
+/****************************************************************************
+ * Name: pwm_putreg
+ *
+ * Description:
+ *   Read the value of an PWM timer register.
+ *
+ * Input Parameters:
+ *   priv - A reference to the PWM block status
+ *   offset - The offset to the register to read
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void pwm_putreg(struct kinetis_pwmtimer_s *priv, int offset, uint32_t value)
+{
+  putreg32(value, priv->base + offset);
+}
+
+/****************************************************************************
+ * Name: pwm_dumpregs
+ *
+ * Description:
+ *   Dump all timer registers.
+ *
+ * Input parameters:
+ *   priv - A reference to the PWM block status
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEBUG_PWM_INFO
+static void pwm_dumpregs(struct kinetis_pwmtimer_s *priv, FAR const char *msg)
+{
+  int nchannels = (priv->tpmid == 0) ? 8 : 2;
+
+  pwminfo("%s:\n", msg);
+  pwminfo("  FTM%d_SC:     %04x   FTM%d_CNT:  %04x     FTM%d_MOD:  %04x\n",
+          priv->tpmid,
+          pwm_getreg(priv, KINETIS_FTM_SC_OFFSET),
+          priv->tpmid,
+          pwm_getreg(priv, KINETIS_FTM_CNT_OFFSET),
+          priv->tpmid,
+          pwm_getreg(priv, KINETIS_FTM_MOD_OFFSET));
+  pwminfo("  FTM%d_STATUS: %04x   FTM%d_CONF: %04x\n",
+          priv->tpmid,
+          pwm_getreg(priv, KINETIS_FTM_STATUS_OFFSET),
+          priv->tpmid,
+          pwm_getreg(priv, KINETIS_FTM_CONF_OFFSET));
+  pwminfo("   FTM%d_C0SC:  %04x   FTM%d_C0V:  %04x\n",
+          priv->tpmid,
+          pwm_getreg(priv, KINETIS_FTM_C0SC_OFFSET),
+          priv->tpmid,
+          pwm_getreg(priv, KINETIS_FTM_C0V_OFFSET));
+  pwminfo("   FTM%d_C1SC:  %04x   FTM%d_C1V:  %04x\n",
+          priv->tpmid,
+          pwm_getreg(priv, KINETIS_FTM_C1SC_OFFSET),
+          priv->tpmid,
+          pwm_getreg(priv, KINETIS_FTM_C1V_OFFSET));
+
+  if (nchannels >= 3)
+    {
+      pwminfo("   FTM%d_C2SC:  %04x   FTM%d_C2V:  %04x\n",
+              priv->tpmid,
+              pwm_getreg(priv, KINETIS_FTM_C2SC_OFFSET),
+              priv->tpmid,
+              pwm_getreg(priv, KINETIS_FTM_C2V_OFFSET));
+    }
+
+  if (nchannels >= 4)
+    {
+      pwminfo("   FTM%d_C3SC:  %04x   FTM%d_C3V:  %04x\n",
+              priv->tpmid,
+              pwm_getreg(priv, KINETIS_FTM_C3SC_OFFSET),
+              priv->tpmid,
+              pwm_getreg(priv, KINETIS_FTM_C3V_OFFSET));
+    }
+
+  if (nchannels >= 5)
+    {
+      pwminfo("   FTM%d_C4SC:  %04x   FTM%d_C4V:  %04x\n",
+              priv->tpmid,
+              pwm_getreg(priv, KINETIS_FTM_C4SC_OFFSET),
+              priv->tpmid,
+              pwm_getreg(priv, KINETIS_FTM_C4V_OFFSET));
+    }
+
+  if (nchannels >= 6)
+    {
+      pwminfo("   FTM%d_C5SC:  %04x   FTM%d_C5V:  %04x\n",
+              priv->tpmid,
+              pwm_getreg(priv, KINETIS_FTM_C5SC_OFFSET),
+              priv->tpmid,
+              pwm_getreg(priv, KINETIS_FTM_C5V_OFFSET));
+    }
+
+  if (nchannels >= 7)
+    {
+      pwminfo("   FTM%d_C6SC:  %04x   FTM%d_C6V:  %04x\n",
+              priv->tpmid,
+              pwm_getreg(priv, KINETIS_FTM_C6SC_OFFSET),
+              priv->tpmid,
+              pwm_getreg(priv, KINETIS_FTM_C6V_OFFSET));
+    }
+
+  if (nchannels >= 8)
+    {
+      pwminfo("   FTM%d_C7SC:  %04x   FTM%d_C7V:  %04x\n",
+              priv->tpmid,
+              pwm_getreg(priv, KINETIS_FTM_C7SC_OFFSET),
+              priv->tpmid,
+              pwm_getreg(priv, KINETIS_FTM_C7V_OFFSET));
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: pwm_timer
+ *
+ * Description:
+ *   (Re-)initialize the timer resources and start the pulsed output
+ *
+ * Input parameters:
+ *   priv - A reference to the lower half PWM driver state structure
+ *   info - A reference to the characteristics of the pulsed output
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int pwm_timer(FAR struct kinetis_pwmtimer_s *priv,
+                     FAR const struct pwm_info_s *info)
+{
+  /* Calculated values */
+
+  uint32_t prescaler;
+  uint32_t tpmclk;
+  uint32_t modulo;
+  uint32_t regval;
+  uint32_t cv;
+  uint8_t i;
+
+  static const uint8_t presc_values[8] = {1, 2, 4, 8, 16, 32, 64, 128};
+
+  /* Register contents */
+
+  DEBUGASSERT(priv != NULL && info != NULL);
+
+  pwminfo("FTM%d channel: %d frequency: %d duty: %08x\n",
+          priv->tpmid, priv->channel, info->frequency, info->duty);
+
+  DEBUGASSERT(info->frequency > 0 && info->duty > 0 &&
+              info->duty < uitoub16(100));
+
+  /* Calculate optimal values for the timer prescaler and for the timer modulo
+   * register.  If' frequency' is the desired frequency, then
+   *
+   *   modulo = tpmclk / frequency
+   *   tpmclk = pclk / presc
+   *
+   * Or,
+   *
+   *   modulo = pclk / presc / frequency
+   *
+   * There are many solutions to do this, but the best solution will be the
+   * one that has the largest modulo value and the smallest prescaler value.
+   * That is the solution that should give us the most accuracy in the timer
+   * control.  Subject to:
+   *
+   *   1 <= presc  <= 128 (need to be 1, 2, 4, 8, 16, 32, 64, 128)
+   *   1 <= modulo <= 65535
+   *
+   * So presc = pclk / 65535 / frequency would be optimal.
+   *
+   * Example:
+   *
+   *  pclk      = 24 MHz
+   *  frequency = 100 Hz
+   *
+   *  prescaler = 24,000,000 / 65,535 / 100
+   *            = 3.6 (or 4 -- taking the ceiling always)
+   *  timclk    = 24,000,000 / 4
+   *            = 6,000,000
+   *  modulo    = 6,000,000 / 100
+   *            = 60,000
+   */
+
+  prescaler = (priv->pclk / info->frequency + 65534) / 65535;
+
+  for (i = 0; i < 7; i++)
+    {
+      if (prescaler <= presc_values[i])
+        {
+           break;
+        }
+    }
+
+  prescaler = i;
+
+  tpmclk = priv->pclk / presc_values[prescaler];
+
+  modulo = tpmclk / info->frequency;
+  if (modulo < 1)
+    {
+      modulo = 1;
+    }
+  else if (modulo > 65535)
+    {
+      modulo = 65535;
+    }
+
+  /* Duty cycle:
+   *
+   * duty cycle = cv / modulo (fractional value)
+   */
+
+  cv = b16toi(info->duty * modulo + b16HALF);
+
+  pwminfo("FTM%d PCLK: %d frequency: %d FTMCLK: %d prescaler: %d modulo: %d c0v: %d\n",
+          priv->tpmid, priv->pclk, info->frequency, tpmclk,
+          presc_values[prescaler], modulo, cv);
+
+  /* Disable FTM and reset CNT before writing MOD and PS */
+
+  pwm_putreg(priv, KINETIS_FTM_SC_OFFSET, FTM_SC_CLKS_NONE);
+  pwm_putreg(priv, KINETIS_FTM_CNT_OFFSET, 0);
+
+  /* Set the modulo value */
+
+  pwm_putreg(priv, KINETIS_FTM_MOD_OFFSET, (uint16_t)modulo);
+
+  /* Set the duty cycle for channel specific */
+
+  switch (priv->channel)
+    {
+      case 0:  /* PWM Mode configuration: Channel 0 */
+        {
+          pwm_putreg(priv, KINETIS_FTM_C0SC_OFFSET, FTM_CSC_MSB | FTM_CSC_ELSB);
+          pwm_putreg(priv, KINETIS_FTM_C0V_OFFSET, (uint16_t) cv);
+        }
+        break;
+
+      case 1:  /* PWM Mode configuration: Channel 1 */
+        {
+          pwm_putreg(priv, KINETIS_FTM_C1SC_OFFSET, FTM_CSC_MSB | FTM_CSC_ELSB);
+          pwm_putreg(priv, KINETIS_FTM_C1V_OFFSET, (uint16_t) cv);
+        }
+        break;
+
+      case 2:  /* PWM Mode configuration: Channel 2 */
+        {
+          pwm_putreg(priv, KINETIS_FTM_C2SC_OFFSET, FTM_CSC_MSB | FTM_CSC_ELSB);
+          pwm_putreg(priv, KINETIS_FTM_C2V_OFFSET, (uint16_t) cv);
+        }
+        break;
+
+      case 3:  /* PWM Mode configuration: Channel 3 */
+        {
+          pwm_putreg(priv, KINETIS_FTM_C3SC_OFFSET, FTM_CSC_MSB | FTM_CSC_ELSB);
+          pwm_putreg(priv, KINETIS_FTM_C3V_OFFSET, (uint16_t) cv);
+        }
+        break;
+
+      case 4:  /* PWM Mode configuration: Channel 4 */
+        {
+          pwm_putreg(priv, KINETIS_FTM_C4SC_OFFSET, FTM_CSC_MSB | FTM_CSC_ELSB);
+          pwm_putreg(priv, KINETIS_FTM_C4V_OFFSET, (uint16_t) cv);
+        }
+        break;
+
+      case 5:  /* PWM Mode configuration: Channel 5 */
+        {
+          pwm_putreg(priv, KINETIS_FTM_C5SC_OFFSET, FTM_CSC_MSB | FTM_CSC_ELSB);
+          pwm_putreg(priv, KINETIS_FTM_C5V_OFFSET, (uint16_t) cv);
+        }
+        break;
+
+      case 6:  /* PWM Mode configuration: Channel 6 */
+        {
+          pwm_putreg(priv, KINETIS_FTM_C6SC_OFFSET, FTM_CSC_MSB | FTM_CSC_ELSB);
+          pwm_putreg(priv, KINETIS_FTM_C6V_OFFSET, (uint16_t) cv);
+        }
+        break;
+      case 7:  /* PWM Mode configuration: Channel 7 */
+        {
+          pwm_putreg(priv, KINETIS_FTM_C7SC_OFFSET, FTM_CSC_MSB | FTM_CSC_ELSB);
+          pwm_putreg(priv, KINETIS_FTM_C7V_OFFSET, (uint16_t) cv);
+        }
+        break;
+
+      default:
+        pwmerr("ERROR: No such channel: %d\n", priv->channel);
+        return -EINVAL;
+    }
+
+  /* Set prescaler and enable clock */
+
+  regval = pwm_getreg(priv, KINETIS_FTM_SC_OFFSET);
+  regval &= ~(FTM_SC_PS_MASK);
+  regval &= ~(FTM_SC_CLKS_MASK);
+  regval |= prescaler | FTM_SC_CLKS_SYSCLK;
+  pwm_putreg(priv, KINETIS_FTM_SC_OFFSET, (uint16_t)regval);
+
+  pwm_dumpregs(priv, "After starting");
+  return OK;
+}
+
+/****************************************************************************
+ * Name: pwm_setup
+ *
+ * Description:
+ *   This method is called when the driver is opened.  The lower half driver
+ *   should configure and initialize the device so that it is ready for use.
+ *   It should not, however, output pulses until the start method is called.
+ *
+ * Input parameters:
+ *   dev - A reference to the lower half PWM driver state structure
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ * Assumptions:
+ *   AHB1 or 2 clocking for the GPIOs and timer has already been configured
+ *   by the RCC logic at power up.
+ *
+ ****************************************************************************/
+
+static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
+{
+  uint32_t regval;
+  FAR struct kinetis_pwmtimer_s *priv = (FAR struct kinetis_pwmtimer_s *)dev;
+
+  /* Enable access to FTM modules */
+
+  regval = getreg32(KINETIS_SIM_SCGC6);
+  regval |= SIM_SCGC6_FTM0 | SIM_SCGC6_FTM1;
+  putreg32(regval, KINETIS_SIM_SCGC6);
+
+  regval = getreg32(KINETIS_SIM_SCGC3);
+  regval |= SIM_SCGC3_FTM2;
+#if defined(CONFIG_KINETIS_FTM3_PWM)
+  regval |= SIM_SCGC3_FTM3;
+#endif
+  putreg32(regval, KINETIS_SIM_SCGC3);
+
+  pwminfo("FTM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
+  pwm_dumpregs(priv, "Initially");
+
+  /* Configure the PWM output pin, but do not start the timer yet */
+
+  kinetis_pinconfig(priv->pincfg);
+  pwm_dumpgpio(priv->pincfg, "PWM setup");
+  return OK;
+}
+
+/****************************************************************************
+ * Name: pwm_shutdown
+ *
+ * Description:
+ *   This method is called when the driver is closed.  The lower half driver
+ *   stop pulsed output, free any resources, disable the timer hardware, and
+ *   put the system into the lowest possible power usage state
+ *
+ * Input parameters:
+ *   dev - A reference to the lower half PWM driver state structure
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
+{
+  FAR struct kinetis_pwmtimer_s *priv = (FAR struct kinetis_pwmtimer_s *)dev;
+  uint32_t pincfg;
+
+  pwminfo("FTM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
+
+  /* Make sure that the output has been stopped */
+
+  pwm_stop(dev);
+
+  /* Then put the GPIO pin back to the default state */
+
+  pincfg  = (priv->pincfg & ~(_PIN_MODE_MASK));
+  pincfg |= GPIO_INPUT;
+  kinetis_pinconfig(pincfg);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: pwm_start
+ *
+ * Description:
+ *   (Re-)initialize the timer resources and start the pulsed output
+ *
+ * Input parameters:
+ *   dev - A reference to the lower half PWM driver state structure
+ *   info - A reference to the characteristics of the pulsed output
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
+                     FAR const struct pwm_info_s *info)
+{
+  FAR struct kinetis_pwmtimer_s *priv = (FAR struct kinetis_pwmtimer_s *)dev;
+  return pwm_timer(priv, info);
+}
+
+/****************************************************************************
+ * Name: pwm_stop
+ *
+ * Description:
+ *   Stop the pulsed output and reset the timer resources
+ *
+ * Input parameters:
+ *   dev - A reference to the lower half PWM driver state structure
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ * Assumptions:
+ *   This function is called to stop the pulsed output at anytime.  This
+ *   method is also called from the timer interrupt handler when a repetition
+ *   count expires... automatically stopping the timer.
+ *
+ ****************************************************************************/
+
+static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
+{
+  FAR struct kinetis_pwmtimer_s *priv = (FAR struct kinetis_pwmtimer_s *)dev;
+  irqstate_t flags;
+
+  pwminfo("FTM%d\n", priv->tpmid);
+
+  /* Disable interrupts momentary to stop any ongoing timer processing and
+   * to prevent any concurrent access to the reset register.
+   */
+
+  flags = enter_critical_section();
+
+  /* Disable further interrupts and stop the timer */
+
+  pwm_putreg(priv, KINETIS_FTM_SC_OFFSET, FTM_SC_CLKS_NONE);
+  pwm_putreg(priv, KINETIS_FTM_CNT_OFFSET, 0);
+
+  /* Determine which timer channel to clear */
+
+  switch (priv->channel)
+    {
+      case 0:
+        pwm_putreg(priv, KINETIS_FTM_C0V_OFFSET, 0);
+        break;
+
+      case 1:
+        pwm_putreg(priv, KINETIS_FTM_C1V_OFFSET, 0);
+        break;
+
+      case 2:
+        pwm_putreg(priv, KINETIS_FTM_C2V_OFFSET, 0);
+        break;
+
+      case 3:
+        pwm_putreg(priv, KINETIS_FTM_C3V_OFFSET, 0);
+        break;
+
+      case 4:
+        pwm_putreg(priv, KINETIS_FTM_C4V_OFFSET, 0);
+        break;
+
+      case 5:
+        pwm_putreg(priv, KINETIS_FTM_C5V_OFFSET, 0);
+        break;
+
+      case 6:
+        pwm_putreg(priv, KINETIS_FTM_C6V_OFFSET, 0);
+        break;
+
+      case 7:
+        pwm_putreg(priv, KINETIS_FTM_C7V_OFFSET, 0);
+        break;
+
+      default:
+        pwmerr("ERROR: No such channel: %d\n", priv->channel);
+        return -EINVAL;
+    }
+
+  leave_critical_section(flags);
+
+  pwm_dumpregs(priv, "After stop");
+  return OK;
+}
+
+/****************************************************************************
+ * Name: pwm_ioctl
+ *
+ * Description:
+ *   Lower-half logic may support platform-specific ioctl commands
+ *
+ * Input parameters:
+ *   dev - A reference to the lower half PWM driver state structure
+ *   cmd - The ioctl command
+ *   arg - The argument accompanying the ioctl command
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg)
+{
+#ifdef CONFIG_DEBUG_PWM_INFO
+  FAR struct kinetis_pwmtimer_s *priv = (FAR struct kinetis_pwmtimer_s *)dev;
+
+  /* There are no platform-specific ioctl commands */
+
+  pwminfo("FTM%d\n", priv->tpmid);
+#endif
+  return -ENOTTY;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: kinetis_pwminitialize
+ *
+ * Description:
+ *   Initialize one timer for use with the upper_level PWM driver.
+ *
+ * Input Parameters:
+ *   timer - A number identifying the timer use.
+ *
+ * Returned Value:
+ *   On success, a pointer to the kinetis lower half PWM driver is returned.
+ *   NULL is returned on any failure.
+ *
+ ****************************************************************************/
+
+FAR struct pwm_lowerhalf_s *kinetis_pwminitialize(int timer)
+{
+  FAR struct kinetis_pwmtimer_s *lower;
+
+  pwminfo("FTM%d\n", timer);
+
+  switch (timer)
+    {
+#ifdef CONFIG_KINETIS_FTM0_PWM
+      case 0:
+        lower = &g_pwm0dev;
+        break;
+#endif
+
+#ifdef CONFIG_KINETIS_FTM1_PWM
+      case 1:
+        lower = &g_pwm1dev;
+        break;
+#endif
+
+#ifdef CONFIG_KINETIS_FTM2_PWM
+      case 2:
+        lower = &g_pwm2dev;
+        break;
+#endif
+
+#ifdef CONFIG_KINETIS_FTM3_PWM
+      case 3:
+        lower = &g_pwm3dev;
+        break;
+#endif
+
+      default:
+        pwmerr("ERROR: No such timer configured\n");
+        return NULL;
+    }
+
+  return (FAR struct pwm_lowerhalf_s *)lower;
+}
+
+#endif /* CONFIG_KINETIS_FTMn_PWM, n = 0,...,3 */
diff --git a/arch/arm/src/kinetis/kinetis_pwm.h b/arch/arm/src/kinetis/kinetis_pwm.h
new file mode 100644
index 0000000000000000000000000000000000000000..3caf77c6d2ddfe603f99abf4123fd4bf5159aaf9
--- /dev/null
+++ b/arch/arm/src/kinetis/kinetis_pwm.h
@@ -0,0 +1,226 @@
+/************************************************************************************
+ * arch/arm/src/kinetis/kinetis_pwm.h
+ *
+ *   Copyright (C) 2013, 2016, 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            Alan Carvalho de Assis 
+ *            Ken Fazzone 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_PWM_H
+#define __ARCH_ARM_SRC_KINETIS_KINETIS_PWM_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Configuration ********************************************************************/
+/* Timer devices may be used for different purposes.  One special purpose is
+ * to generate modulated outputs for such things as motor control.  If CONFIG_KINETIS_FTMn
+ * is defined then the CONFIG_KINETIS_FTMn_PWM must also be defined to indicate that
+ * timer "n" is intended to be used for pulsed output signal generation.
+ */
+
+#ifndef CONFIG_KINETIS_FTM0
+#  undef CONFIG_KINETIS_FTM0_PWM
+#endif
+#ifndef CONFIG_KINETIS_FTM1
+#  undef CONFIG_KINETIS_FTM1_PWM
+#endif
+#ifndef CONFIG_KINETIS_FTM2
+#  undef CONFIG_KINETIS_FTM2_PWM
+#endif
+#ifndef CONFIG_KINETIS_FTM3
+#  undef CONFIG_KINETIS_FTM3_PWM
+#endif
+
+/* Check if PWM support for any channel is enabled. */
+
+#if defined(CONFIG_KINETIS_FTM0_PWM)  || defined(CONFIG_KINETIS_FTM1_PWM)  || \
+    defined(CONFIG_KINETIS_FTM2_PWM)  || defined(CONFIG_KINETIS_FTM3_PWM)
+
+#include 
+#include "chip/kinetis_pinmux.h"
+
+/* For each timer that is enabled for PWM usage, we need the following additional
+ * configuration settings:
+ *
+ * CONFIG_KINETIS_FTMx_CHANNEL - Specifies the timer output channel {1,..,4}
+ * PWM_FTMx_CHn - One of the values defined in kinetis*_pinmap.h.  In the case
+ *   where there are multiple pin selections, the correct setting must be provided
+ *   in the arch/board/board.h file.
+ */
+
+#ifdef CONFIG_KINETIS_FTM0_PWM
+#  if !defined(CONFIG_KINETIS_FTM0_CHANNEL)
+#    error "CONFIG_KINETIS_FTM0_CHANNEL must be provided"
+#  elif CONFIG_KINETIS_FTM0_CHANNEL == 0
+#    define PWM_FTM0_PINCFG GPIO_FTM0_CH0OUT
+#  elif CONFIG_KINETIS_FTM0_CHANNEL == 1
+#    define PWM_FTM0_PINCFG GPIO_FTM0_CH1OUT
+#  elif CONFIG_KINETIS_FTM0_CHANNEL == 2
+#    define PWM_FTM0_PINCFG GPIO_FTM0_CH2OUT
+#  elif CONFIG_KINETIS_FTM0_CHANNEL == 3
+#    define PWM_FTM0_PINCFG GPIO_FTM0_CH3OUT
+#  elif CONFIG_KINETIS_FTM0_CHANNEL == 4
+#    define PWM_FTM0_PINCFG GPIO_FTM0_CH4OUT
+#  elif CONFIG_KINETIS_FTM0_CHANNEL == 5
+#    define PWM_FTM0_PINCFG GPIO_FTM0_CH5OUT
+#  elif CONFIG_KINETIS_FTM0_CHANNEL == 6
+#    define PWM_FTM0_PINCFG GPIO_FTM0_CH6OUT
+#  elif CONFIG_KINETIS_FTM0_CHANNEL == 7
+#    define PWM_FTM0_PINCFG GPIO_FTM0_CH7OUT
+#  else
+#    error "Unsupported value of CONFIG_KINETIS_FTM1_CHANNEL"
+#  endif
+#endif
+
+#ifdef CONFIG_KINETIS_FTM1_PWM
+#  if !defined(CONFIG_KINETIS_FTM1_CHANNEL)
+#    error "CONFIG_KINETIS_FTM1_CHANNEL must be provided"
+#  elif CONFIG_KINETIS_FTM1_CHANNEL == 0
+#    define PWM_FTM1_PINCFG GPIO_FTM1_CH0OUT
+#  elif CONFIG_KINETIS_FTM1_CHANNEL == 1
+#    define PWM_FTM1_PINCFG GPIO_FTM1_CH1OUT
+#  elif CONFIG_KINETIS_FTM1_CHANNEL == 2
+#    define PWM_FTM1_PINCFG GPIO_FTM1_CH2OUT
+#  elif CONFIG_KINETIS_FTM1_CHANNEL == 3
+#    define PWM_FTM1_PINCFG GPIO_FTM1_CH3OUT
+#  elif CONFIG_KINETIS_FTM1_CHANNEL == 4
+#    define PWM_FTM1_PINCFG GPIO_FTM1_CH4OUT
+#  elif CONFIG_KINETIS_FTM1_CHANNEL == 5
+#    define PWM_FTM1_PINCFG GPIO_FTM1_CH5OUT
+#  else
+#    error "Unsupported value of CONFIG_KINETIS_FTM2_CHANNEL"
+#  endif
+#endif
+
+#ifdef CONFIG_KINETIS_FTM2_PWM
+#  if !defined(CONFIG_KINETIS_FTM2_CHANNEL)
+#    error "CONFIG_KINETIS_FTM2_CHANNEL must be provided"
+#  elif CONFIG_KINETIS_FTM2_CHANNEL == 0
+#    define PWM_FTM2_PINCFG GPIO_FTM2_CH0OUT
+#  elif CONFIG_KINETIS_FTM2_CHANNEL == 1
+#    define PWM_FTM2_PINCFG GPIO_FTM2_CH1OUT
+#  elif CONFIG_KINETIS_FTM2_CHANNEL == 2
+#    define PWM_FTM2_PINCFG GPIO_FTM2_CH2OUT
+#  elif CONFIG_KINETIS_FTM2_CHANNEL == 3
+#    define PWM_FTM2_PINCFG GPIO_FTM2_CH3OUT
+#  elif CONFIG_KINETIS_FTM2_CHANNEL == 4
+#    define PWM_FTM2_PINCFG GPIO_FTM2_CH4OUT
+#  elif CONFIG_KINETIS_FTM2_CHANNEL == 5
+#    define PWM_FTM2_PINCFG GPIO_FTM2_CH5OUT
+#  else
+#    error "Unsupported value of CONFIG_KINETIS_FTM3_CHANNEL"
+#  endif
+#endif
+
+#ifdef CONFIG_KINETIS_FTM3_PWM
+#  if !defined(CONFIG_KINETIS_FTM3_CHANNEL)
+#    error "CONFIG_KINETIS_FTM3_CHANNEL must be provided"
+#  elif CONFIG_KINETIS_FTM3_CHANNEL == 0
+#    define PWM_FTM3_PINCFG GPIO_FTM3_CH0OUT
+#  elif CONFIG_KINETIS_FTM3_CHANNEL == 1
+#    define PWM_FTM3_PINCFG GPIO_FTM3_CH1OUT
+#  elif CONFIG_KINETIS_FTM3_CHANNEL == 2
+#    define PWM_FTM3_PINCFG GPIO_FTM3_CH2OUT
+#  elif CONFIG_KINETIS_FTM3_CHANNEL == 3
+#    define PWM_FTM3_PINCFG GPIO_FTM3_CH3OUT
+#  elif CONFIG_KINETIS_FTM3_CHANNEL == 4
+#    define PWM_FTM3_PINCFG GPIO_FTM3_CH4OUT
+#  elif CONFIG_KINETIS_FTM3_CHANNEL == 5
+#    define PWM_FTM3_PINCFG GPIO_FTM3_CH5OUT
+#  elif CONFIG_KINETIS_FTM3_CHANNEL == 6
+#    define PWM_FTM3_PINCFG GPIO_FTM3_CH6OUT
+#  elif CONFIG_KINETIS_FTM3_CHANNEL == 7
+#    define PWM_FTM3_PINCFG GPIO_FTM3_CH7OUT
+#  else
+#    error "Unsupported value of CONFIG_KINETIS_FTM3_CHANNEL"
+#  endif
+#endif
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: kinetis_pwminitialize
+ *
+ * Description:
+ *   Initialize one timer for use with the upper_level PWM driver.
+ *
+ * Input Parameters:
+ *   timer - A number identifying the timer use.
+ *
+ * Returned Value:
+ *   On success, a pointer to the kinetis lower half PWM driver is returned.
+ *   NULL is returned on any failure.
+ *
+ ************************************************************************************/
+
+FAR struct pwm_lowerhalf_s *kinetis_pwminitialize(int timer);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* CONFIG_KINETIS_FTMx_PWM */
+#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_PWM_H */
diff --git a/arch/arm/src/kinetis/kinetis_rtc.c b/arch/arm/src/kinetis/kinetis_rtc.c
new file mode 100644
index 0000000000000000000000000000000000000000..824a72245d667d55b142d1bc4bf4ca513db91af4
--- /dev/null
+++ b/arch/arm/src/kinetis/kinetis_rtc.c
@@ -0,0 +1,587 @@
+/****************************************************************************
+ * arch/arm/src/kinetis/kinetis_rtc.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author:  Matias v01d 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "up_arch.h"
+
+#include "kinetis_config.h"
+#include "chip.h"
+#include "chip/kinetis_rtc.h"
+#include "chip/kinetis_sim.h"
+#include "kinetis.h"
+#include "kinetis_alarm.h"
+
+#if defined(CONFIG_RTC)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if !defined(BOARD_RTC_CAP)
+/* Capacitance values 8pF if not already defined */
+
+#  define BOARD_RTC_CAP RTC_CR_SC8P | RTC_CR_SC4P
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+static alarmcb_t g_alarmcb;
+static bool rtc_irq_state = false;
+#endif
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+volatile bool g_rtc_enabled = false;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: rtc_dumpregs
+ *
+ * Description:
+ *    Disable RTC write protection
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEBUG_RTC_INFO
+static void rtc_dumpregs(FAR const char *msg)
+{
+  rtcinfo("%s:\n", msg);
+  rtcinfo("   TSR: %08x\n", getreg32(KINETIS_RTC_TSR));
+  rtcinfo("   TPR: %08x\n", getreg32(KINETIS_RTC_TPR));
+  rtcinfo("   TAR: %08x\n", getreg32(KINETIS_RTC_TAR));
+  rtcinfo("    CR: %08x\n", getreg32(KINETIS_RTC_CR));
+  rtcinfo("    SR: %08x\n", getreg32(KINETIS_RTC_SR));
+  rtcinfo("    LR: %08x\n", getreg32(KINETIS_RTC_LR));
+  rtcinfo("   IER: %08x\n", getreg32(KINETIS_RTC_IER));
+#if defined(KINETIS_RTC_GEN2)
+  rtcinfo("  TTSR: %08x\n", getreg32(KINETIS_RTC_TTSR));
+  rtcinfo("   MER: %08x\n", getreg32(KINETIS_RTC_MER));
+  rtcinfo("  MCLR: %08x\n", getreg32(KINETIS_RTC_MCLR));
+  rtcinfo("  MCHR: %08x\n", getreg32(KINETIS_RTC_MCHR));
+  rtcinfo("   WAR: %08x\n", getreg32(KINETIS_RTC_WAR));
+  rtcinfo("   RAR: %08x\n", getreg32(KINETIS_RTC_RAR));
+#endif
+}
+#else
+#  define rtc_dumpregs(msg)
+#endif
+
+/****************************************************************************
+ * Name: rtc_dumptime
+ *
+ * Description:
+ *    Disable RTC write protection
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEBUG_RTC_INFO
+static void rtc_dumptime(FAR struct tm *tp, FAR const char *msg)
+{
+  rtcinfo("%s:\n", msg);
+  rtcinfo("  tm_sec: %08x\n", tp->tm_sec);
+  rtcinfo("  tm_min: %08x\n", tp->tm_min);
+  rtcinfo(" tm_hour: %08x\n", tp->tm_hour);
+  rtcinfo(" tm_mday: %08x\n", tp->tm_mday);
+  rtcinfo("  tm_mon: %08x\n", tp->tm_mon);
+  rtcinfo(" tm_year: %08x\n", tp->tm_year);
+}
+#else
+#  define rtc_dumptime(tp, msg)
+#endif
+
+/****************************************************************************
+ * Name: kinetis_rtc_interrupt
+ *
+ * Description:
+ *    RTC interrupt service routine
+ *
+ * Input Parameters:
+ *   irq - The IRQ number that generated the interrupt
+ *   context - Architecture specific register save information.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; A negated errno value on failure.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_RTC_ALARM)
+static int kinetis_rtc_interrupt(int irq, void *context, FAR void *arg)
+{
+ uint16_t rtc_sr;
+
+  /* if alarm */
+  rtc_sr = getreg32( KINETIS_RTC_SR);
+  if (rtc_sr & RTC_SR_TAF )
+    {
+      if (g_alarmcb != NULL)
+        {
+          /* Alarm callback */
+
+          g_alarmcb();
+          g_alarmcb = NULL;
+        }
+    }
+  else
+    {
+      /* other interrupts are serious and should leave a turd
+       *
+       * RTC_SR_TIF   _TOF   _MOF
+       */
+
+      rtcwarn("unexp int src=0x%x, num=", rtc_sr);
+    }
+
+  /* Clear pending flags, disable alarm */
+
+  putreg32(0, KINETIS_RTC_TAR); /* Unset alarm (resets flags) */
+  putreg32(0, KINETIS_RTC_IER); /* Disable alarm interrupt */
+
+  return 0;
+}
+#endif
+
+/****************************************************************************
+ * Name: RTC_Reset
+ *
+ * Description:
+ *    Reset the RTC to known state
+ *
+ * Input Parameters:
+ *    none
+ *
+ * Returned Value:
+ *   none
+ *
+ ****************************************************************************/
+
+static inline void RTC_Reset(void)
+{
+    putreg32(( RTC_CR_SWR | getreg32(KINETIS_RTC_CR)),KINETIS_RTC_CR);
+    putreg32((~RTC_CR_SWR & getreg32(KINETIS_RTC_CR)),KINETIS_RTC_CR);
+
+   /* Set TSR register to 0x1 to avoid the timer invalid (TIF) bit being
+    * set in the SR register
+    */
+
+    putreg32(1,KINETIS_RTC_TSR);
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_rtc_irqinit
+ *
+ * Description:
+ *   Initialize the hardware RTC irq.
+*    This only needs to be called once when first used.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_RTC_ALARM)
+int up_rtc_irq_attach(void)
+{
+  uint32_t rtc_sr;
+
+  if (!rtc_irq_state)
+    {
+      rtc_irq_state=true;
+
+      /* Clear TAF if pending */
+
+      rtc_sr = getreg32( KINETIS_RTC_SR);
+      if (rtc_sr & RTC_SR_TAF )
+        {
+          putreg32(0, KINETIS_RTC_TAR);
+        }
+
+      /* Enable alarm interrupts.
+       * This will not work if part of up_rtc_initialize()
+       * as it is called very early in initialization BEFORE the interrupt
+       * system will be enabled.  All interrupts will disabled later when
+       * the interrupt system is disabled. This must be done later when the
+       * alarm is first set.
+       *
+       * KINETIS_IRQ_RTCS is a separate interrupt for seconds if needed
+       */
+
+      irq_attach(KINETIS_IRQ_RTC, kinetis_rtc_interrupt, NULL);
+      up_enable_irq(KINETIS_IRQ_RTC);
+    }
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: up_rtc_initialize
+ *
+ * Description:
+ *   Initialize the hardware RTC per the selected configuration.  This
+ *   function is called once during the OS initialization sequence
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+int up_rtc_initialize(void)
+{
+  uint32_t regval;
+  bool rtc_valid = false;
+
+  /* Enable RTC module */
+
+  regval = getreg32(KINETIS_SIM_SCGC6);
+  regval |= SIM_SCGC6_RTC;
+  putreg32(regval, KINETIS_SIM_SCGC6);
+
+  regval = getreg32(KINETIS_RTC_SR);
+  if (!(regval & RTC_SR_TIF))
+    {
+#ifdef KINETIS_RTC_GEN2
+      /* Check if the one-time initialization of the RTC has already been
+       * performed. We can determine this by checking if the magic number
+       * has been writing to to back-up date register DR0.
+       */
+
+      regval = getreg32(KINETIS_RTC_MCLR);
+      if ((CONFIG_RTC_MAGICL == regval ) &&
+          (CONFIG_RTC_MAGICH == getreg32(KINETIS_RTC_MCHR)) )
+#endif
+        {
+          rtc_valid = true;
+        }
+    }
+
+  if (rtc_valid)
+    {
+      rtcinfo("Do resume\n");
+
+      /* RTC already set-up, just resume normal operation */
+
+      rtc_dumpregs("Did resume");
+    }
+  else
+    {
+      rtcinfo("Do setup\n");
+      RTC_Reset();
+
+#ifdef KINETIS_RTC_GEN2
+      /* Configure the RTC to be initialized */
+
+      putreg32(CONFIG_RTC_MAGICL, KINETIS_RTC_MCLR);
+      putreg32(CONFIG_RTC_MAGICH, KINETIS_RTC_MCHR);
+#endif
+
+      /* Setup the update mode and supervisor access mode */
+
+      putreg32((~(RTC_CR_UM|RTC_CR_SUP) & getreg32(KINETIS_RTC_CR)),
+               KINETIS_RTC_CR);
+
+      /* Disable counters (just in case) */
+
+      putreg32(0, KINETIS_RTC_SR);
+
+      /* Enable oscilator - must have Vbat else hard fault */
+
+      putreg32((BOARD_RTC_CAP | RTC_CR_OSCE ), KINETIS_RTC_CR);
+
+     /* TODO - add capability to accurately tune RTC
+      * This is a per individual board customization and requires
+      * parameters to be configurable and stored in non-volatile eg flash.
+      */
+
+      /* TODO: delay some time (1024 cycles? would be 30ms) */
+    }
+
+  /* Disable interrupts */
+
+  putreg32(0, KINETIS_RTC_IER);
+
+  /* Reset flags requires writing the seconds register, the following line
+   * avoids altering any stored time value.
+   */
+
+  putreg32(getreg32(KINETIS_RTC_TSR), KINETIS_RTC_TSR);
+
+  /* Enable counters */
+
+  putreg32(RTC_SR_TCE, KINETIS_RTC_SR);
+
+  /* Mark RTC enabled */
+
+  g_rtc_enabled = true;
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: up_rtc_time
+ *
+ * Description:
+ *   Get the current time in seconds.  This is similar to the standard
+ *   time() function.  This interface is only required if the low-resolution
+ *   RTC/counter hardware implementation selected.  It is only used by the
+ *   RTOS during initialization to set up the system time when CONFIG_RTC is
+ *   set but neither CONFIG_RTC_HIRES nor CONFIG_RTC_DATETIME are set.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   The current time in seconds
+ *
+ ****************************************************************************/
+
+#ifndef CONFIG_RTC_HIRES
+time_t up_rtc_time(void)
+{
+  return getreg32(KINETIS_RTC_TSR);
+}
+#endif
+
+/****************************************************************************
+ * Name: up_rtc_gettime
+ *
+ * Description:
+ *   Get the current time from the high resolution RTC clock/counter.  This
+ *   interface is only supported by the high-resolution RTC/counter hardware
+ *   implementation. It is used to replace the system timer.
+ *
+ * Input Parameters:
+ *   tp - The location to return the high resolution time value.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_HIRES
+int up_rtc_gettime(FAR struct timespec *tp)
+{
+  irqstate_t flags;
+  uint32_t seconds, prescaler, prescaler2;
+
+  /* Get prescaler and seconds register. this is in a loop which ensures that
+   * registers will be re-read if during the reads the prescaler has
+   * wrapped-around.
+   */
+
+  flags = enter_critical_section();
+  do
+    {
+      prescaler = getreg32(KINETIS_RTC_TPR);
+      seconds = getreg32(KINETIS_RTC_TSR);
+      prescaler2 = getreg32(KINETIS_RTC_TPR);
+    }
+  while (prescaler > prescaler2);
+
+  leave_critical_section(flags);
+
+  /* Build seconds + nanoseconds from seconds and prescaler register */
+
+  tp->tv_sec = seconds;
+  tp->tv_nsec = prescaler * (1000000000 / CONFIG_RTC_FREQUENCY);
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: up_rtc_settime
+ *
+ * Description:
+ *   Set the RTC to the provided time.  All RTC implementations must be able
+ *   to set their time based on a standard timespec.
+ *
+ * Input Parameters:
+ *   tp - the time to use
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+int up_rtc_settime(FAR const struct timespec *tp)
+{
+  irqstate_t flags;
+  uint32_t seconds, prescaler;
+
+  seconds = tp->tv_sec;
+  prescaler = tp->tv_nsec * (CONFIG_RTC_FREQUENCY / 1000000000);
+
+  flags = enter_critical_section();
+
+  putreg32(0, KINETIS_RTC_SR);  /* Disable counter */
+
+  putreg32(prescaler, KINETIS_RTC_TPR); /* Always write prescaler first */
+  putreg32(seconds, KINETIS_RTC_TSR);
+
+  putreg32(RTC_SR_TCE, KINETIS_RTC_SR); /* Re-enable counter */
+
+  leave_critical_section(flags);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: kinetis_rtc_setalarm
+ *
+ * Description:
+ *   Set up an alarm.
+ *
+ * Input Parameters:
+ *   tp - the time to set the alarm
+ *   callback - the function to call when the alarm expires.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+int kinetis_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback)
+{
+  /* Is there already something waiting on the ALARM? */
+
+  if (g_alarmcb == NULL)
+    {
+      /* No.. Save the callback function pointer */
+
+      g_alarmcb = callback;
+
+      /* ensure irq is attached */
+
+      up_rtc_irq_attach();
+
+      /* Enable and set RTC alarm */
+
+      putreg32(tp->tv_sec, KINETIS_RTC_TAR);    /* Set alarm (also resets
+                                                 * flags) */
+      putreg32(RTC_IER_TAIE, KINETIS_RTC_IER);  /* Enable alarm interrupt */
+
+      rtc_dumpregs("set alarmtime");
+
+      return OK;
+    }
+  else
+    {
+      return -EBUSY;
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: kinetis_rtc_cancelalarm
+ *
+ * Description:
+ *   Cancel a pending alarm alarm
+ *
+ * Input Parameters:
+ *   none
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+int kinetis_rtc_cancelalarm(void)
+{
+  if (g_alarmcb != NULL)
+    {
+      /* Cancel the global callback function */
+
+      g_alarmcb = NULL;
+
+      /* Unset the alarm */
+
+      putreg32(0, KINETIS_RTC_IER);     /* disable alarm interrupt */
+
+      return OK;
+    }
+  else
+    {
+      return -ENODATA;
+    }
+}
+#endif
+
+#endif /* KINETIS_RTC */
diff --git a/arch/arm/src/kinetis/kinetis_rtc.h b/arch/arm/src/kinetis/kinetis_rtc.h
deleted file mode 100644
index 69c097a7c950627992f577b40e61cede1480ccf4..0000000000000000000000000000000000000000
--- a/arch/arm/src/kinetis/kinetis_rtc.h
+++ /dev/null
@@ -1,207 +0,0 @@
-/************************************************************************************
- * arch/arm/src/kinetis/kinetis_rtc.h
- *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ************************************************************************************/
-
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_RTC_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_RTC_H
-
-/************************************************************************************
- * Included Files
- ************************************************************************************/
-
-#include 
-
-#include "chip.h"
-
-#if defined(KINETIS_NRTC) && KINETIS_NRTC > 0
-
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Register Offsets *****************************************************************/
-
-#define KINETIS_RTC_TSR_OFFSET   0x0000 /* RTC Time Seconds Register */
-#define KINETIS_RTC_TPR_OFFSET   0x0004 /* RTC Time Prescaler Register */
-#define KINETIS_RTC_TAR_OFFSET   0x0008 /* RTC Time Alarm Register */
-#define KINETIS_RTC_TCR_OFFSET   0x000c /* RTC Time Compensation Register */
-#define KINETIS_RTC_CR_OFFSET    0x0010 /* RTC Control Register */
-#define KINETIS_RTC_SR_OFFSET    0x0014 /* RTC Status Register */
-#define KINETIS_RTC_LR_OFFSET    0x0018 /* RTC Lock Register */
-#ifdef KINETIS_K40
-#  define KINETIS_RTC_IER_OFFSET 0x001c /* RTC Interrupt Enable Register (K40) */
-#endif
-#ifdef KINETIS_K60
-#  define KINETIS_RTC_CCR_OFFSET 0x001c /* RTC Chip Configuration Register (K60) */
-#endif
-#define KINETIS_RTC_WAR_OFFSET   0x0800 /* RTC Write Access Register */
-#define KINETIS_RTC_RAR_OFFSET   0x0804 /* RTC Read Access Register */
-
-/* Register Addresses ***************************************************************/
-
-#define KINETIS_RTC_TSR          (KINETIS_RTC_BASE+KINETIS_RTC_TSR_OFFSET)
-#define KINETIS_RTC_TPR          (KINETIS_RTC_BASE+KINETIS_RTC_TPR_OFFSET)
-#define KINETIS_RTC_TAR          (KINETIS_RTC_BASE+KINETIS_RTC_TAR_OFFSET)
-#define KINETIS_RTC_TCR          (KINETIS_RTC_BASE+KINETIS_RTC_TCR_OFFSET)
-#define KINETIS_RTC_CR           (KINETIS_RTC_BASE+KINETIS_RTC_CR_OFFSET)
-#define KINETIS_RTC_SR           (KINETIS_RTC_BASE+KINETIS_RTC_SR_OFFSET)
-#define KINETIS_RTC_LR           (KINETIS_RTC_BASE+KINETIS_RTC_LR_OFFSET)
-#ifdef KINETIS_K40
-#  define KINETIS_RTC_IER        (KINETIS_RTC_BASE+KINETIS_RTC_IER_OFFSET)
-#endif
-#ifdef KINETIS_K60
-#  define KINETIS_CCR_IER        (KINETIS_RTC_BASE+KINETIS_RTC_CCR_OFFSET)
-#endif
-#define KINETIS_RTC_WAR          (KINETIS_RTC_BASE+KINETIS_RTC_WAR_OFFSET)
-#define KINETIS_RTC_RAR          (KINETIS_RTC_BASE+KINETIS_RTC_RAR_OFFSET)
-
-/* Register Bit Definitions *********************************************************/
-
-/* RTC Time Seconds Register (32-bits of time in seconds) */
-
-/* RTC Time Prescaler Register */
-
-#define RTC_TPR_SHIFT            (0)       /* Bits 0-15: Time Prescaler Register */
-#define RTC_TPR_MASK             (0xffff << RTC_TPR_SHIFT)
-                                           /* Bits 16-31: Reserved */
-/* RTC Time Alarm Register (32-bits of time alarm) */
-
-/* RTC Time Compensation Register (32-bits) */
-
-#define RTC_TCR_TCR_SHIFT        (0)       /* Bits 0-7: Time Compensation Register */
-#define RTC_TCR_TCR_MASK         (0xff << RTC_TCR_CIR_MASK)
-#define RTC_TCR_CIR_SHIFT        (8)       /* Bits 8-15: Compensation Interval Register */
-#define RTC_TCR_CIR_MASK         (0xff << RTC_TCR_CIR_SHIFT)
-#define RTC_TCR_TCV_SHIFT        (16)      /* Bits 16-23: Time Compensation Value */
-#define RTC_TCR_TCV_MASK         (0xff << RTC_TCR_TCV_SHIFT)
-#define RTC_TCR_CIC_SHIFT        (24)      /* Bits 24-31: Compensation Interval Counter */
-#define RTC_TCR_CIC_MASK         (0xff << RTC_TCR_CIC_SHIFT)
-
-/* RTC Control Register (32-bits) */
-
-#define RTC_CR_SWR               (1 << 0)  /* Bit 0:  Software Reset */
-#define RTC_CR_WPE               (1 << 1)  /* Bit 1:  Wakeup Pin Enable */
-#define RTC_CR_SUP               (1 << 2)  /* Bit 2:  Supervisor Access */
-#define RTC_CR_UM                (1 << 3)  /* Bit 3:  Update Mode */
-                                           /* Bits 4-7: Reserved */
-#define RTC_CR_OSCE              (1 << 8)  /* Bit 8:  Oscillator Enable */
-#define RTC_CR_CLKO              (1 << 9)  /* Bit 9:  Clock Output */
-#define RTC_CR_SC16P             (1 << 10) /* Bit 10: Oscillator 16pF load configure */
-#define RTC_CR_SC8P              (1 << 11) /* Bit 11: Oscillator 8pF load configure */
-#define RTC_CR_SC4P              (1 << 12) /* Bit 12: Oscillator 4pF load configure */
-#define RTC_CR_SC2P              (1 << 13) /* Bit 13: Oscillator 2pF load configure */
-                                           /* Bits 14-31: Reserved */
-/* RTC Status Register (32-bits) */
-
-#define RTC_SR_TIF               (1 << 0)  /* Bit 0:  Time Invalid Flag */
-#define RTC_SR_TOF               (1 << 1)  /* Bit 1:  Time Overflow Flag */
-                                           /* Bit 3: Reserved */
-#define RTC_SR_TAF               (1 << 2)  /* Bit 2:  Time Alarm Flag */
-#define RTC_SR_TCE               (1 << 4)  /* Bit 4:  Time Counter Enable */
-                                           /* Bits 5-31: Reserved */
-/* RTC Lock Register (32-bits) */
-                                           /* Bits 0-2: Reserved */
-#define RTC_LR_TCL               (1 << 3)  /* Bit 3:  Time Compensation Lock */
-#define RTC_LR_CRL               (1 << 4)  /* Bit 4:  Control Register Lock */
-#define RTC_LR_SRL               (1 << 5)  /* Bit 5:  Status Register Lock */
-#ifdef KINETIS_K40
-#  define RTC_LR_LRL             (1 << 6)  /* Bit 6:  Lock Register Lock (K40) */
-#endif
-                                           /* Bits 7-31: Reserved */
-/* RTC Interrupt Enable Register (32-bits, K40) */
-
-#ifdef KINETIS_K40
-#  define RTC_IER_TIIE           (1 << 0)  /* Bit 0:  Time Invalid Interrupt Enable */
-#  define RTC_IER_TOIE           (1 << 1)  /* Bit 1:  Time Overflow Interrupt Enable */
-#  define RTC_IER_TAIE           (1 << 2)  /* Bit 2:  Time Alarm Interrupt Enable */
-                                           /* Bit 3: Reserved */
-#  define RTC_IER_TSIE           (1 << 4)  /* Bit 4:  Time Seconds Interrupt Enable */
-                                           /* Bits 5-31: Reserved */
-#endif
-
-/* RTC Chip Configuration Register (32-bits,K60) */
-
-#ifdef KINETIS_K60
-#  define RTC_CCR_CONFIG_SHIFT   (0)       /* Bits 0-7: Chip Configuration */
-#  define RTC_CCR_CONFIG_MASK    (0xff << RTC_CCR_CONFIG_SHIFT)
-                                           /* Bits 8-31: Reserved */
-#endif
-
-/* RTC Write Access Register (32-bits) */
-
-#define RTC_WAR_TSRW             (1 << 0)  /* Bit 0:  Time Seconds Register Write */
-#define RTC_WAR_TPRW             (1 << 1)  /* Bit 1:  Time Prescaler Register Write */
-#define RTC_WAR_TARW             (1 << 2)  /* Bit 2:  Time Alarm Register Write */
-#define RTC_WAR_TCRW             (1 << 3)  /* Bit 3:  Time Compensation Register Write */
-#define RTC_WAR_CRW              (1 << 4)  /* Bit 4:  Control Register Write */
-#define RTC_WAR_SRW              (1 << 5)  /* Bit 5:  Status Register Write */
-#define RTC_WAR_LRW              (1 << 6)  /* Bit 6:  Lock Register Write */
-#ifdef KINETIS_K40
-#  define RTC_WAR_IERW           (1 << 7)  /* Bit 7:  Interrupt Enable Register Write */
-#endif
-#ifdef KINETIS_K60
-#  define RTC_WAR_CCRW           (1 << 7)  /* Bit 7:  Chip Config Register Write */
-#endif
-                                           /* Bits 8-31: Reserved */
-/* RTC Read Access Register */
-
-#define RTC_RAR_TSRR             (1 << 0)  /* Bit 0:  Time Seconds Register Read */
-#define RTC_RAR_TPRR             (1 << 1)  /* Bit 1:  Time Prescaler Register Read */
-#define RTC_RAR_TARR             (1 << 2)  /* Bit 2:  Time Alarm Register Read */
-#define RTC_RAR_TCRR             (1 << 3)  /* Bit 3:  Time Compensation Register Read */
-#define RTC_RAR_CRR              (1 << 4)  /* Bit 4:  Control Register Read */
-#define RTC_RAR_SRR              (1 << 5)  /* Bit 5:  Status Register Read */
-#define RTC_RAR_LRR              (1 << 6)  /* Bit 6:  Lock Register Read */
-#ifdef KINETIS_K40
-#  define RTC_RAR_IERR           (1 << 7)  /* Bit 7:  Interrupt Enable Register Read */
-#endif
-#ifdef KINETIS_K60
-#  define RTC_RAR_CCRR           (1 << 7)  /* Bit 7:  Chip Config Register Read */
-#endif
-                                           /* Bits 8-31: Reserved */
-
-/************************************************************************************
- * Public Types
- ************************************************************************************/
-
-/************************************************************************************
- * Public Data
- ************************************************************************************/
-
-/************************************************************************************
- * Public Functions
- ************************************************************************************/
-
-#endif /* KINETIS_NRTC && KINETIS_NRTC > 0 */
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_RTC_H */
diff --git a/arch/arm/src/kinetis/kinetis_rtc_if.h b/arch/arm/src/kinetis/kinetis_rtc_if.h
new file mode 100644
index 0000000000000000000000000000000000000000..78dd7774f2e72657f0164c0baaa65d63c99bf6c9
--- /dev/null
+++ b/arch/arm/src/kinetis/kinetis_rtc_if.h
@@ -0,0 +1,150 @@
+/****************************************************************************
+ * arch/arm/src/kinetis/kinetis_rtc_if.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Neil Hancock
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_RTC_IF_H
+#define __ARCH_ARM_SRC_KINETIS_KINETIS_RTC_IF_H
+
+#include 
+
+#include "chip.h"
+
+/* Kinetis parts all have a simple battery-backed 32bit counter for its RTC
+ * KINETIS_RTC_GEN2 have
+ *    a Tamper Time seconds - 32bibt
+ *    a MONOTONC seconds  which is used is 2*32bit registers
+ *
+ */
+
+#include "kinetis_alarm.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: KINETIS_rtc_getdatetime_with_subseconds
+ *
+ * Description:
+ *   Get the current date and time from the date/time RTC.  This interface
+ *   is only supported by the date/time RTC hardware implementation.
+ *   It is used to replace the system timer.  It is only used by the RTOS
+ *   during initialization to set up the system time when CONFIG_RTC and
+ *   CONFIG_RTC_DATETIME are selected (and CONFIG_RTC_HIRES is not).
+ *
+ *   NOTE: Some date/time RTC hardware is capability of sub-second accuracy.
+ *   Thatsub-second accuracy is returned through 'nsec'.
+ *
+ * Input Parameters:
+ *   tp - The location to return the high resolution time value.
+ *   nsec - The location to return the subsecond time value.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_KINETIS_HAVE_RTC_SUBSECONDS
+int KINETIS_rtc_getdatetime_with_subseconds(FAR struct tm *tp, FAR long *nsec);
+#endif
+
+/****************************************************************************
+ * Name: KINETIS_rtc_setdatetime
+ *
+ * Description:
+ *   Set the RTC to the provided time. RTC implementations which provide
+ *   up_rtc_getdatetime() (CONFIG_RTC_DATETIME is selected) should provide
+ *   this function.
+ *
+ * Input Parameters:
+ *   tp - the time to use
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_DATETIME
+struct tm;
+int kinetis_rtc_setdatetime(FAR const struct tm *tp);
+#endif
+
+/****************************************************************************
+ * Name: KINETIS_rtc_lowerhalf
+ *
+ * Description:
+ *   Instantiate the RTC lower half driver for the KINETIS.  General usage:
+ *
+ *     #include 
+ *     #include "KINETIS_rtc.h>
+ *
+ *     struct rtc_lowerhalf_s *lower;
+ *     lower = KINETIS_rtc_lowerhalf();
+ *     rtc_initialize(0, lower);
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   On success, a non-NULL RTC lower interface is returned.  NULL is
+ *   returned on any failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_DRIVER
+FAR struct rtc_lowerhalf_s *kinetis_rtc_lowerhalf(void);
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_RTC_IF_H */
diff --git a/arch/arm/src/kinetis/kinetis_rtc_lowerhalf.c b/arch/arm/src/kinetis/kinetis_rtc_lowerhalf.c
new file mode 100644
index 0000000000000000000000000000000000000000..961a212b6a8123189986fe1c0a9a1f3b9fe0d94b
--- /dev/null
+++ b/arch/arm/src/kinetis/kinetis_rtc_lowerhalf.c
@@ -0,0 +1,525 @@
+/****************************************************************************
+ * arch/arm/src/kinetis/kinetis_rtc_lowerhalf.c
+ *
+ *   Copyright (C) 2015-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Updates for kinetis by Neil Hancock
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* REVISIT:  This driver is *not* thread-safe! */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "chip.h"
+#include "kinetis_rtc_if.h"
+#include "kinetis_alarm.h"
+
+#ifdef CONFIG_RTC_DRIVER
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+struct kinetis_cbinfo_s
+{
+  volatile rtc_alarm_callback_t cb;  /* Callback when the alarm expires */
+  volatile FAR void *priv;           /* Private argurment to accompany callback */
+};
+#endif
+
+/* This is the private type for the RTC state.  It must be cast compatible
+ * with struct rtc_lowerhalf_s.
+ */
+
+struct kinetis_lowerhalf_s
+{
+  /* This is the contained reference to the read-only, lower-half
+   * operations vtable (which may lie in FLASH or ROM)
+   */
+
+  FAR const struct rtc_ops_s *ops;
+
+  /* Data following is private to this driver and not visible outside of
+   * this file.
+   */
+
+#ifdef CONFIG_RTC_ALARM
+  /* Alarm callback information */
+
+  struct kinetis_cbinfo_s cbinfo;
+#endif
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* Prototypes for static methods in struct rtc_ops_s */
+
+static int kinetis_rdtime(FAR struct rtc_lowerhalf_s *lower,
+                          FAR struct rtc_time *rtctime);
+static int kinetis_settime(FAR struct rtc_lowerhalf_s *lower,
+                           FAR const struct rtc_time *rtctime);
+
+#ifdef CONFIG_RTC_ALARM
+static int kinetis_setalarm(FAR struct rtc_lowerhalf_s *lower,
+                            FAR const struct lower_setalarm_s *alarminfo);
+static int kinetis_setrelative(FAR struct rtc_lowerhalf_s *lower,
+                               FAR const struct lower_setrelative_s *alarminfo);
+static int kinetis_cancelalarm(FAR struct rtc_lowerhalf_s *lower,
+                               int alarmid);
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Kinetis RTC driver operations */
+
+static const struct rtc_ops_s g_rtc_ops =
+{
+  .rdtime      = kinetis_rdtime,
+  .settime     = kinetis_settime,
+#ifdef CONFIG_RTC_ALARM
+  .setalarm    = kinetis_setalarm,
+  .setrelative = kinetis_setrelative,
+  .cancelalarm = kinetis_cancelalarm,
+#endif
+#ifdef CONFIG_RTC_IOCTL
+  .ioctl       = NULL,
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  .destroy     = NULL,
+#endif
+};
+
+/* Kinetis RTC device operations */
+
+static struct kinetis_lowerhalf_s g_rtc_lowerhalf =
+{
+  .ops        = &g_rtc_ops,
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: kinetis_alarm_callback
+ *
+ * Description:
+ *   This is the function that is called from the RTC driver when the alarm
+ *   goes off.  It just invokes the upper half drivers callback.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+static void kinetis_alarm_callback(void)
+{
+  FAR struct kinetis_cbinfo_s *cbinfo = &g_rtc_lowerhalf.cbinfo;/*[0];*/
+
+  /* Sample and clear the callback information to minimize the window in
+   * time in which race conditions can occur.
+   */
+
+  rtc_alarm_callback_t cb = (rtc_alarm_callback_t)cbinfo->cb;
+  FAR void *arg           = (FAR void *)cbinfo->priv;
+
+  cbinfo->cb              = NULL;
+  cbinfo->priv            = NULL;
+
+  /* Perform the callback */
+
+  if (cb != NULL)
+    {
+      cb(arg, 0);
+    }
+}
+#endif /* CONFIG_RTC_ALARM */
+
+/****************************************************************************
+ * Name: kinetis_rdtime
+ *
+ * Description:
+ *   Implements the rdtime() method of the RTC driver interface
+ *
+ * Input Parameters:
+ *   lower   - A reference to RTC lower half driver state structure
+ *   rtctime - The location in which to return the current RTC time.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on any failure.
+ *
+ ****************************************************************************/
+
+static int kinetis_rdtime(FAR struct rtc_lowerhalf_s *lower,
+                          FAR struct rtc_time *rtctime)
+{
+#if defined(CONFIG_RTC_DATETIME)
+  /* This operation depends on the fact that struct rtc_time is cast
+   * compatible with struct tm.
+   */
+
+  return up_rtc_getdatetime((FAR struct tm *)rtctime);
+
+#elif defined(CONFIG_RTC_HIRES)
+  FAR struct timespec ts;
+  int ret;
+
+  /* Get the higher resolution time */
+
+  ret = up_rtc_gettime(&ts);
+  if (ret < 0)
+    {
+      goto errout_with_errno;
+    }
+
+  /* Convert the one second epoch time to a struct tm.  This operation
+   * depends on the fact that struct rtc_time and struct tm are cast
+   * compatible.
+   */
+
+  if (!gmtime_r(&ts.tv_sec, (FAR struct tm *)rtctime))
+    {
+      goto errout_with_errno;
+    }
+
+  return OK;
+
+errout_with_errno:
+  ret = get_errno();
+  DEBUGASSERT(ret > 0);
+  return -ret;
+
+#else
+  time_t timer;
+
+  /* The resolution of time is only 1 second */
+
+  timer = up_rtc_time();
+
+  /* Convert the one second epoch time to a struct tm */
+
+  if (!gmtime_r(&timer, (FAR struct tm *)rtctime))
+    {
+      int errcode = get_errno();
+      DEBUGASSERT(errcode > 0);
+      return -errcode;
+    }
+
+  return OK;
+#endif
+}
+
+/****************************************************************************
+ * Name: kinetis_settime
+ *
+ * Description:
+ *   Implements the settime() method of the RTC driver interface
+ *
+ * Input Parameters:
+ *   lower   - A reference to RTC lower half driver state structure
+ *   rcttime - The new time to set
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on any failure.
+ *
+ ****************************************************************************/
+
+static int kinetis_settime(FAR struct rtc_lowerhalf_s *lower,
+                           FAR const struct rtc_time *rtctime)
+{
+  struct timespec ts;
+
+  /* Convert the struct rtc_time to a time_t.  Here we assume that struct
+   * rtc_time is cast compatible with struct tm.
+   */
+
+  ts.tv_sec  = mktime((FAR struct tm *)rtctime);
+  ts.tv_nsec = 0;
+
+  /* Set the time (to one second accuracy) */
+
+  return up_rtc_settime(&ts);
+}
+
+/****************************************************************************
+ * Name: kinetis_setalarm
+ *
+ * Description:
+ *   Set a new alarm.  This function implements the setalarm() method of the
+ *   RTC driver interface
+ *
+ * Input Parameters:
+ *   lower - A reference to RTC lower half driver state structure
+ *   alarminfo - Provided information needed to set the alarm
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on any failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+static int kinetis_setalarm(FAR struct rtc_lowerhalf_s *lower,
+                            FAR const struct lower_setalarm_s *alarminfo)
+{
+  FAR struct kinetis_lowerhalf_s *priv;
+  FAR struct kinetis_cbinfo_s *cbinfo;
+
+  struct timespec tp;
+
+  int ret = -EINVAL;
+
+  /* ID0-> Alarm A supported */
+
+  DEBUGASSERT(lower != NULL && alarminfo != NULL);
+  priv = (FAR struct kinetis_lowerhalf_s *)lower;
+
+  if (alarminfo->id == RTC_ALARMA )
+    {
+      /* Remember the callback information */
+
+      cbinfo           = &priv->cbinfo;
+      cbinfo->cb       = alarminfo->cb;
+      cbinfo->priv     = alarminfo->priv;
+
+      /* Convert from Julian calendar time to epoch time */
+
+      tp.tv_sec = mktime((FAR struct tm *)&alarminfo->time) ;
+
+      /* And set the alarm */
+
+      ret = kinetis_rtc_setalarm(&tp, kinetis_alarm_callback);
+      if (ret < 0)
+        {
+          cbinfo->cb   = NULL;
+          cbinfo->priv = NULL;
+        }
+    }
+
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: kinetis_setrelative
+ *
+ * Description:
+ *   Set a new alarm relative to the current time.  This function implements
+ *   the setrelative() method of the RTC driver interface
+ *
+ * Input Parameters:
+ *   lower - A reference to RTC lower half driver state structure
+ *   alarminfo - Provided information needed to set the alarm
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on any failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+static int kinetis_setrelative(FAR struct rtc_lowerhalf_s *lower,
+                               FAR const struct lower_setrelative_s *alarminfo)
+{
+  struct lower_setalarm_s setalarm;
+#if defined(CONFIG_RTC_DATETIME)
+  struct tm time;
+#endif
+  time_t seconds;
+  struct timespec ts;
+  int ret = -EINVAL;
+
+  ASSERT(lower != NULL && alarminfo != NULL);
+  DEBUGASSERT(alarminfo->id == RTC_ALARMA);
+
+  if ((alarminfo->id == RTC_ALARMA ) &&
+      alarminfo->reltime > 0)
+    {
+      /* Disable pre-emption while we do this so that we don't have to worry
+       * about being suspended and working on an old time.
+       */
+
+      sched_lock();
+
+#if defined(CONFIG_RTC_DATETIME)
+      /* Get the broken out time and convert to seconds */
+
+      ret = up_rtc_getdatetime(&time);
+      if (ret < 0)
+        {
+          sched_unlock();
+          return ret;
+        }
+
+      ts.tv_sec  = mktime(&time);
+      ts.tv_nsec = 0;
+#else
+      /* Get the current time in broken out format */
+
+      ret = up_rtc_gettime(&ts);
+      if (ret < 0)
+        {
+          sched_unlock();
+          return ret;
+        }
+#endif
+      /* Convert to seconds since the epoch */
+
+      seconds = ts.tv_sec;
+
+      /* Add the seconds offset.  Add one to the number of seconds
+       * because we are unsure of the phase of the timer.
+       */
+
+      seconds += (alarminfo->reltime + 1);
+
+      /* And convert the time back to Julian/broken out format */
+
+      (void)gmtime_r(&seconds, (FAR struct tm *)&setalarm.time);
+
+      /* The set the alarm using this absolute time */
+
+      setalarm.id   = alarminfo->id;
+      setalarm.cb   = alarminfo->cb;
+      setalarm.priv = alarminfo->priv;
+
+      ret = kinetis_setalarm(lower, &setalarm);
+
+      sched_unlock();
+    }
+
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: kinetis_cancelalarm
+ *
+ * Description:
+ *   Cancel the current alarm.  This function implements the cancelalarm()
+ *   method of the RTC driver interface
+ *
+ * Input Parameters:
+ *   lower - A reference to RTC lower half driver state structure
+ *   alarminfo - Provided information needed to set the alarm
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on any failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+static int kinetis_cancelalarm(FAR struct rtc_lowerhalf_s *lower, int alarmid)
+{
+  FAR struct kinetis_lowerhalf_s *priv;
+  FAR struct kinetis_cbinfo_s *cbinfo;
+  int ret = -EINVAL;
+
+  DEBUGASSERT(lower != NULL);
+  DEBUGASSERT(alarmid == RTC_ALARMA);
+  priv = (FAR struct kinetis_lowerhalf_s *)lower;
+
+  /* ID0-> Alarm A */
+
+  if (alarmid == RTC_ALARMA)
+    {
+      /* Nullify callback information to reduce window for race conditions */
+
+      cbinfo       = &priv->cbinfo;
+      cbinfo->cb   = NULL;
+      cbinfo->priv = NULL;
+
+      /* Then cancel the alarm */
+
+      ret = kinetis_rtc_cancelalarm();
+
+    }
+
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: kinetis_rtc_lowerhalf
+ *
+ * Description:
+ *   Instantiate the RTC lower half driver for the Kinetis.  General usage:
+ *
+ *     #include 
+ *     #include "kinetis_rtc.h>
+ *
+ *     struct rtc_lowerhalf_s *lower;
+ *     lower = kinetis_rtc_lowerhalf();
+ *     rtc_initialize(0, lower);
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   On success, a non-NULL RTC lower interface is returned.
+ *   NULL is returned on any failure.
+ *
+ ****************************************************************************/
+
+FAR struct rtc_lowerhalf_s *kinetis_rtc_lowerhalf(void)
+{
+  return (FAR struct rtc_lowerhalf_s *)&g_rtc_lowerhalf;
+}
+
+#endif /* CONFIG_RTC_DRIVER */
diff --git a/arch/arm/src/kinetis/kinetis_sdhc.c b/arch/arm/src/kinetis/kinetis_sdhc.c
index 7841cc1ad59e7e3ec842515f39fcc8f61d2aa709..e3a36762e0a260aa97c016f81977d54961ed4e75 100644
--- a/arch/arm/src/kinetis/kinetis_sdhc.c
+++ b/arch/arm/src/kinetis/kinetis_sdhc.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/kinetis/kinetis_sdhc.c
  *
- *   Copyright (C) 2011-2012, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2014, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -52,6 +52,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -61,9 +62,9 @@
 #include "up_arch.h"
 
 #include "kinetis.h"
-#include "kinetis_pinmux.h"
-#include "kinetis_sim.h"
-#include "kinetis_sdhc.h"
+#include "chip/kinetis_pinmux.h"
+#include "chip/kinetis_sim.h"
+#include "chip/kinetis_sdhc.h"
 
 #ifdef CONFIG_KINETIS_SDHC
 
@@ -73,8 +74,10 @@
 
 /* Configuration ************************************************************/
 
-#ifndef CONFIG_SDIO_DMA
+#if !defined(CONFIG_KINETIS_SDHC_DMA)
 #  warning "Large Non-DMA transfer may result in RX overrun failures"
+#elif !defined(CONFIG_SDIO_DMA)
+#  warning CONFIG_SDIO_DMA should be defined with CONFIG_KINETIS_SDHC_DMA
 #endif
 
 #if !defined(CONFIG_SCHED_WORKQUEUE) || !defined(CONFIG_SCHED_HPWORK)
@@ -85,11 +88,7 @@
 #  define CONFIG_KINETIS_SDHC_PRIO NVIC_SYSH_PRIORITY_DEFAULT
 #endif
 
-#ifndef CONFIG_KINETIS_SDHC_DMAPRIO
-#  define CONFIG_KINETIS_SDHC_DMAPRIO DMA_CCR_PRIMED
-#endif
-
-#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG_VERBOSE)
+#ifndef CONFIG_DEBUG_MEMCARD_INFO
 #  undef CONFIG_SDIO_XFRDEBUG
 #endif
 
@@ -117,15 +116,15 @@
 #  endif
 #endif
 
-/* Timing */
+/* Timing in ms for commands wait response */
 
-#define SDHC_CMDTIMEOUT         (100000)
-#define SDHC_LONGTIMEOUT        (0x7fffffff)
+#define SDHC_CMDTIMEOUT         MSEC2TICK(100)
+#define SDHC_LONGTIMEOUT        MSEC2TICK(500)
 
-/* Big DVS setting.  Range is 0=SDCLK*213 through 14=SDCLK*227 */
+/* Big DTOCV setting.  Range is 0=SDCLK*2^13 through 14=SDCLK*2^27 */
 
-#define SDHC_DVS_MAXTIMEOUT     (14)
-#define SDHC_DVS_DATATIMEOUT    (14)
+#define SDHC_DTOCV_MAXTIMEOUT   (14)
+#define SDHC_DTOCV_DATATIMEOUT  (14)
 
 /* Maximum watermark value */
 
@@ -176,7 +175,7 @@ struct kinetis_dev_s
 
   /* Callback support */
 
-  uint8_t            cdstatus;   /* Card status */
+  sdio_statset_t     cdstatus;   /* Card status */
   sdio_eventset_t    cbevents;   /* Set of events to be cause callbacks */
   worker_t           callback;   /* Registered callback function */
   void              *cbarg;      /* Registered callback argument */
@@ -190,7 +189,7 @@ struct kinetis_dev_s
 
   /* DMA data transfer support */
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_KINETIS_SDHC_DMA
   volatile uint8_t   xfrflags;   /* Used to synchronize SDIO and DMA completion events */
 #endif
 };
@@ -262,7 +261,7 @@ static void kinetis_dataconfig(struct kinetis_dev_s *priv, bool bwrite,
                                unsigned int blocksize, unsigned int nblocks,
                                unsigned int timeout);
 static void kinetis_datadisable(void);
-#ifndef CONFIG_SDIO_DMA
+#ifndef CONFIG_KINETIS_SDHC_DMA
 static void kinetis_transmit(struct kinetis_dev_s *priv);
 static void kinetis_receive(struct kinetis_dev_s *priv);
 #endif
@@ -272,7 +271,7 @@ static void kinetis_endtransfer(struct kinetis_dev_s *priv, sdio_eventset_t wkup
 
 /* Interrupt Handling *******************************************************/
 
-static int  kinetis_interrupt(int irq, void *context);
+static int  kinetis_interrupt(int irq, void *context, FAR void *arg);
 
 /* SDIO interface methods ***************************************************/
 
@@ -285,7 +284,8 @@ static int kinetis_lock(FAR struct sdio_dev_s *dev, bool lock);
 /* Initialization/setup */
 
 static void kinetis_reset(FAR struct sdio_dev_s *dev);
-static uint8_t kinetis_status(FAR struct sdio_dev_s *dev);
+static sdio_capset_t kinetis_capabilities(FAR struct sdio_dev_s *dev);
+static sdio_statset_t kinetis_status(FAR struct sdio_dev_s *dev);
 static void kinetis_widebus(FAR struct sdio_dev_s *dev, bool enable);
 #ifdef CONFIG_KINETIS_SDHC_ABSFREQ
 static void kinetis_frequency(FAR struct sdio_dev_s *dev, uint32_t frequency);
@@ -298,7 +298,7 @@ static int  kinetis_attach(FAR struct sdio_dev_s *dev);
 
 static int  kinetis_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd,
               uint32_t arg);
-#ifndef CONFIG_SDIO_DMA
+#ifndef CONFIG_KINETIS_SDHC_DMA
 static int  kinetis_recvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
               size_t nbytes);
 static int  kinetis_sendsetup(FAR struct sdio_dev_s *dev,
@@ -329,8 +329,7 @@ static int  kinetis_registercallback(FAR struct sdio_dev_s *dev,
 
 /* DMA */
 
-#ifdef CONFIG_SDIO_DMA
-static bool kinetis_dmasupported(FAR struct sdio_dev_s *dev);
+#ifdef CONFIG_KINETIS_SDHC_DMA
 static int  kinetis_dmarecvsetup(FAR struct sdio_dev_s *dev,
               FAR uint8_t *buffer, size_t buflen);
 static int  kinetis_dmasendsetup(FAR struct sdio_dev_s *dev,
@@ -353,12 +352,13 @@ struct kinetis_dev_s g_sdhcdev =
     .lock             = kinetis_lock,
 #endif
     .reset            = kinetis_reset,
+    .capabilities     = kinetis_capabilities,
     .status           = kinetis_status,
     .widebus          = kinetis_widebus,
     .clock            = kinetis_clock,
     .attach           = kinetis_attach,
     .sendcmd          = kinetis_sendcmd,
-#ifndef CONFIG_SDIO_DMA
+#ifndef CONFIG_KINETIS_SDHC_DMA
     .recvsetup        = kinetis_recvsetup,
     .sendsetup        = kinetis_sendsetup,
 #else
@@ -379,9 +379,13 @@ struct kinetis_dev_s g_sdhcdev =
     .callbackenable   = kinetis_callbackenable,
     .registercallback = kinetis_registercallback,
 #ifdef CONFIG_SDIO_DMA
-    .dmasupported     = kinetis_dmasupported,
+#ifdef CONFIG_KINETIS_SDHC_DMA
     .dmarecvsetup     = kinetis_dmarecvsetup,
     .dmasendsetup     = kinetis_dmasendsetup,
+#else
+    .dmarecvsetup     = kinetis_recvsetup,
+    .dmasendsetup     = kinetis_sendsetup,
+#endif
 #endif
   },
 };
@@ -459,7 +463,7 @@ static void kinetis_configwaitints(struct kinetis_dev_s *priv, uint32_t waitints
   priv->waitevents = waitevents;
   priv->wkupevent  = wkupevent;
   priv->waitints   = waitints;
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_KINETIS_SDHC_DMA
   priv->xfrflags   = 0;
 #endif
   putreg32(priv->xfrints | priv->waitints | SDHC_INT_CINT,
@@ -574,29 +578,29 @@ static void kinetis_sample(struct kinetis_dev_s *priv, int index)
 static void kinetis_dumpsample(struct kinetis_dev_s *priv,
                                struct kinetis_sdhcregs_s *regs, const char *msg)
 {
-  fdbg("SDHC Registers: %s\n", msg);
-  fdbg("   DSADDR[%08x]: %08x\n", KINETIS_SDHC_DSADDR,    regs->dsaddr);
-  fdbg("  BLKATTR[%08x]: %08x\n", KINETIS_SDHC_BLKATTR,   regs->blkattr);
-  fdbg("   CMDARG[%08x]: %08x\n", KINETIS_SDHC_CMDARG,    regs->cmdarg);
-  fdbg("   XFERTY[%08x]: %08x\n", KINETIS_SDHC_XFERTYP,   regs->xferty);
-  fdbg("  CMDRSP0[%08x]: %08x\n", KINETIS_SDHC_CMDRSP0,   regs->cmdrsp0);
-  fdbg("  CMDRSP1[%08x]: %08x\n", KINETIS_SDHC_CMDRSP1,   regs->cmdrsp1);
-  fdbg("  CMDRSP2[%08x]: %08x\n", KINETIS_SDHC_CMDRSP2,   regs->cmdrsp2);
-  fdbg("  CMDRSP3[%08x]: %08x\n", KINETIS_SDHC_CMDRSP3,   regs->cmdrsp3);
-  fdbg("  PRSSTAT[%08x]: %08x\n", KINETIS_SDHC_PRSSTAT,   regs->prsstat);
-  fdbg("   PROCTL[%08x]: %08x\n", KINETIS_SDHC_PROCTL,    regs->proctl);
-  fdbg("   SYSCTL[%08x]: %08x\n", KINETIS_SDHC_SYSCTL,    regs->sysctl);
-  fdbg("  IRQSTAT[%08x]: %08x\n", KINETIS_SDHC_IRQSTAT,   regs->irqstat);
-  fdbg("IRQSTATEN[%08x]: %08x\n", KINETIS_SDHC_IRQSTATEN, regs->irqstaten);
-  fdbg(" IRQSIGEN[%08x]: %08x\n", KINETIS_SDHC_IRQSIGEN,  regs->irqsigen);
-  fdbg("  AC12ERR[%08x]: %08x\n", KINETIS_SDHC_AC12ERR,   regs->ac12err);
-  fdbg(" HTCAPBLT[%08x]: %08x\n", KINETIS_SDHC_HTCAPBLT,  regs->htcapblt);
-  fdbg("      WML[%08x]: %08x\n", KINETIS_SDHC_WML,       regs->wml);
-  fdbg("   ADMAES[%08x]: %08x\n", KINETIS_SDHC_ADMAES,    regs->admaes);
-  fdbg("  ADSADDR[%08x]: %08x\n", KINETIS_SDHC_ADSADDR,   regs->adsaddr);
-  fdbg("   VENDOR[%08x]: %08x\n", KINETIS_SDHC_VENDOR,    regs->vendor);
-  fdbg("  MMCBOOT[%08x]: %08x\n", KINETIS_SDHC_MMCBOOT,   regs->mmcboot);
-  fdbg("  HOSTVER[%08x]: %08x\n", KINETIS_SDHC_HOSTVER,   regs->hostver);
+  mcinfo("SDHC Registers: %s\n", msg);
+  mcinfo("   DSADDR[%08x]: %08x\n", KINETIS_SDHC_DSADDR,    regs->dsaddr);
+  mcinfo("  BLKATTR[%08x]: %08x\n", KINETIS_SDHC_BLKATTR,   regs->blkattr);
+  mcinfo("   CMDARG[%08x]: %08x\n", KINETIS_SDHC_CMDARG,    regs->cmdarg);
+  mcinfo("   XFERTY[%08x]: %08x\n", KINETIS_SDHC_XFERTYP,   regs->xferty);
+  mcinfo("  CMDRSP0[%08x]: %08x\n", KINETIS_SDHC_CMDRSP0,   regs->cmdrsp0);
+  mcinfo("  CMDRSP1[%08x]: %08x\n", KINETIS_SDHC_CMDRSP1,   regs->cmdrsp1);
+  mcinfo("  CMDRSP2[%08x]: %08x\n", KINETIS_SDHC_CMDRSP2,   regs->cmdrsp2);
+  mcinfo("  CMDRSP3[%08x]: %08x\n", KINETIS_SDHC_CMDRSP3,   regs->cmdrsp3);
+  mcinfo("  PRSSTAT[%08x]: %08x\n", KINETIS_SDHC_PRSSTAT,   regs->prsstat);
+  mcinfo("   PROCTL[%08x]: %08x\n", KINETIS_SDHC_PROCTL,    regs->proctl);
+  mcinfo("   SYSCTL[%08x]: %08x\n", KINETIS_SDHC_SYSCTL,    regs->sysctl);
+  mcinfo("  IRQSTAT[%08x]: %08x\n", KINETIS_SDHC_IRQSTAT,   regs->irqstat);
+  mcinfo("IRQSTATEN[%08x]: %08x\n", KINETIS_SDHC_IRQSTATEN, regs->irqstaten);
+  mcinfo(" IRQSIGEN[%08x]: %08x\n", KINETIS_SDHC_IRQSIGEN,  regs->irqsigen);
+  mcinfo("  AC12ERR[%08x]: %08x\n", KINETIS_SDHC_AC12ERR,   regs->ac12err);
+  mcinfo(" HTCAPBLT[%08x]: %08x\n", KINETIS_SDHC_HTCAPBLT,  regs->htcapblt);
+  mcinfo("      WML[%08x]: %08x\n", KINETIS_SDHC_WML,       regs->wml);
+  mcinfo("   ADMAES[%08x]: %08x\n", KINETIS_SDHC_ADMAES,    regs->admaes);
+  mcinfo("  ADSADDR[%08x]: %08x\n", KINETIS_SDHC_ADSADDR,   regs->adsaddr);
+  mcinfo("   VENDOR[%08x]: %08x\n", KINETIS_SDHC_VENDOR,    regs->vendor);
+  mcinfo("  MMCBOOT[%08x]: %08x\n", KINETIS_SDHC_MMCBOOT,   regs->mmcboot);
+  mcinfo("  HOSTVER[%08x]: %08x\n", KINETIS_SDHC_HOSTVER,   regs->hostver);
 }
 #endif
 
@@ -657,8 +661,8 @@ static void kinetis_dataconfig(struct kinetis_dev_s *priv, bool bwrite,
   /* Set the data timeout value in the SDHC_SYSCTL field to the selected value */
 
   regval  = getreg32(KINETIS_SDHC_SYSCTL);
-  regval &= ~SDHC_SYSCTL_DVS_MASK;
-  regval |= timeout << SDHC_SYSCTL_DVS_SHIFT;
+  regval &= ~SDHC_SYSCTL_DTOCV_MASK;
+  regval |= timeout << SDHC_SYSCTL_DTOCV_SHIFT;
   putreg32(regval, KINETIS_SDHC_SYSCTL);
 
   /* Set the block size and count in the SDHC_BLKATTR register.  The block
@@ -671,7 +675,6 @@ static void kinetis_dataconfig(struct kinetis_dev_s *priv, bool bwrite,
 
   /* Set the watermark level */
 
-#ifdef CONFIG_SDIO_DMA
   /* Set the Read Watermark Level to the blocksize to be read
    * (limited to half of the maximum watermark value).  BRR will be
    * set when the number of queued words is greater than or equal
@@ -711,32 +714,6 @@ static void kinetis_dataconfig(struct kinetis_dev_s *priv, bool bwrite,
 
       putreg32(watermark << SDHC_WML_RD_SHIFT, KINETIS_SDHC_WML);
     }
-#else
-  if (bwrite)
-    {
-      /* Write Watermark Level = 0:  BWR will be set when the number of
-       * queued words is less than or equal to 0.
-       */
-
-      putreg32(0, KINETIS_SDHC_WML);
-    }
-  else
-    {
-      /* Set the Read Watermark Level to the blocksize to be read
-       * (limited to half of the maximum watermark value).  BRR will be
-       * set when the number of queued words is greater than or equal
-       * to this value.
-       */
-
-      watermark = (blocksize + 3) >> 2;
-      if (watermark > (SDHC_MAX_WATERMARK / 2))
-        {
-          watermark = (SDHC_MAX_WATERMARK / 2);
-        }
-
-      putreg32(watermark << SDHC_WML_RD_SHIFT, KINETIS_SDHC_WML);
-    }
-#endif
 }
 
 /****************************************************************************
@@ -755,8 +732,8 @@ static void kinetis_datadisable(void)
   /* Set the data timeout value in the SDHC_SYSCTL field to the maximum value */
 
   regval  = getreg32(KINETIS_SDHC_SYSCTL);
-  regval &= ~SDHC_SYSCTL_DVS_MASK;
-  regval |= SDHC_DVS_MAXTIMEOUT << SDHC_SYSCTL_DVS_SHIFT;
+  regval &= ~SDHC_SYSCTL_DTOCV_MASK;
+  regval |= SDHC_DTOCV_MAXTIMEOUT << SDHC_SYSCTL_DTOCV_SHIFT;
   putreg32(regval, KINETIS_SDHC_SYSCTL);
 
   /* Set the block size to zero (no transfer) */
@@ -778,7 +755,7 @@ static void kinetis_datadisable(void)
  *
  ****************************************************************************/
 
-#ifndef CONFIG_SDIO_DMA
+#ifndef CONFIG_KINETIS_SDHC_DMA
 static void kinetis_transmit(struct kinetis_dev_s *priv)
 {
   union
@@ -787,22 +764,16 @@ static void kinetis_transmit(struct kinetis_dev_s *priv)
     uint8_t  b[4];
   } data;
 
-  /* Loop while there is more data to be sent, waiting for buffer write
-   * ready (BWR)
+  /* Loop while there is more data to be sent, while buffer write enable
+   * (PRSSTAT.BWEN)
    */
 
-  fllvdbg("Entry: remaining: %d IRQSTAT: %08x\n",
-          priv->remaining, getreg32(KINETIS_SDHC_IRQSTAT));
+  mcinfo("Entry: remaining: %d IRQSTAT: %08x\n",
+         priv->remaining, getreg32(KINETIS_SDHC_IRQSTAT));
 
   while (priv->remaining > 0 &&
-         (getreg32(KINETIS_SDHC_IRQSTAT) & SDHC_INT_BWR) != 0)
+         (getreg32(KINETIS_SDHC_PRSSTAT) & SDHC_PRSSTAT_BWEN) != 0)
     {
-      /* Clear BWR.  If there is more data in the buffer, writing to the
-       * buffer should reset BRR.
-       */
-
-      putreg32(SDHC_INT_BWR, KINETIS_SDHC_IRQSTAT);
-
       /* Is there a full word remaining in the user buffer? */
 
       if (priv->remaining >= sizeof(uint32_t))
@@ -837,9 +808,14 @@ static void kinetis_transmit(struct kinetis_dev_s *priv)
       putreg32(data.w, KINETIS_SDHC_DATPORT);
     }
 
-  fllvdbg("Exit: remaining: %d IRQSTAT: %08x\n",
-          priv->remaining, getreg32(KINETIS_SDHC_IRQSTAT));
+  /* Clear BWR.  If there is more data in the buffer, writing to the
+   * buffer should reset BWR.
+   */
+
+  putreg32(SDHC_INT_BWR, KINETIS_SDHC_IRQSTAT);
 
+  mcinfo("Exit: remaining: %d IRQSTAT: %08x\n",
+         priv->remaining, getreg32(KINETIS_SDHC_IRQSTAT));
 }
 #endif
 
@@ -857,7 +833,7 @@ static void kinetis_transmit(struct kinetis_dev_s *priv)
  *
  ****************************************************************************/
 
-#ifndef CONFIG_SDIO_DMA
+#ifndef CONFIG_KINETIS_SDHC_DMA
 static void kinetis_receive(struct kinetis_dev_s *priv)
 {
   unsigned int watermark;
@@ -877,8 +853,8 @@ static void kinetis_receive(struct kinetis_dev_s *priv)
    * ready (BRR)
    */
 
-  fllvdbg("Entry: remaining: %d IRQSTAT: %08x\n",
-          priv->remaining, getreg32(KINETIS_SDHC_IRQSTAT));
+  mcinfo("Entry: remaining: %d IRQSTAT: %08x\n",
+         priv->remaining, getreg32(KINETIS_SDHC_IRQSTAT));
 
   while (priv->remaining > 0 &&
          (getreg32(KINETIS_SDHC_IRQSTAT) & SDHC_INT_BRR) != 0)
@@ -929,10 +905,9 @@ static void kinetis_receive(struct kinetis_dev_s *priv)
 
   putreg32(watermark << SDHC_WML_RD_SHIFT, KINETIS_SDHC_WML);
 
-  fllvdbg("Exit: remaining: %d IRQSTAT: %08x WML: %08x\n",
-          priv->remaining, getreg32(KINETIS_SDHC_IRQSTAT),
-          getreg32(KINETIS_SDHC_WML));
-
+  mcinfo("Exit: remaining: %d IRQSTAT: %08x WML: %08x\n",
+         priv->remaining, getreg32(KINETIS_SDHC_IRQSTAT),
+         getreg32(KINETIS_SDHC_WML));
 }
 #endif
 
@@ -973,7 +948,7 @@ static void kinetis_eventtimeout(int argc, uint32_t arg)
       /* Wake up any waiting threads */
 
       kinetis_endwait(priv, SDIOWAIT_TIMEOUT);
-      flldbg("Timeout: remaining: %d\n", priv->remaining);
+      mcerr("ERROR: Timeout: remaining: %d\n", priv->remaining);
     }
 }
 
@@ -1032,7 +1007,7 @@ static void kinetis_endwait(struct kinetis_dev_s *priv, sdio_eventset_t wkupeven
 
 static void kinetis_endtransfer(struct kinetis_dev_s *priv, sdio_eventset_t wkupevent)
 {
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_KINETIS_SDHC_DMA
   uint32_t regval;
 #endif
 
@@ -1046,7 +1021,7 @@ static void kinetis_endtransfer(struct kinetis_dev_s *priv, sdio_eventset_t wkup
 
   /* If this was a DMA transfer, make sure that DMA is stopped */
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_KINETIS_SDHC_DMA
   /* Stop the DMA by resetting the data path */
 
   regval = getreg32(KINETIS_SDHC_SYSCTL);
@@ -1090,7 +1065,7 @@ static void kinetis_endtransfer(struct kinetis_dev_s *priv, sdio_eventset_t wkup
  *
  ****************************************************************************/
 
-static int kinetis_interrupt(int irq, void *context)
+static int kinetis_interrupt(int irq, void *context, FAR void *arg)
 {
   struct kinetis_dev_s *priv = &g_sdhcdev;
   uint32_t enabled;
@@ -1105,8 +1080,8 @@ static int kinetis_interrupt(int irq, void *context)
 
   regval  = getreg32(KINETIS_SDHC_IRQSIGEN);
   enabled = getreg32(KINETIS_SDHC_IRQSTAT) & regval;
-  fllvdbg("IRQSTAT: %08x IRQSIGEN %08x enabled: %08x\n",
-          getreg32(KINETIS_SDHC_IRQSTAT), regval, enabled);
+  mcinfo("IRQSTAT: %08x IRQSIGEN %08x enabled: %08x\n",
+         getreg32(KINETIS_SDHC_IRQSTAT), regval, enabled);
 
   /* Disable card interrupts to clear the card interrupt to the host system. */
 
@@ -1122,7 +1097,7 @@ static int kinetis_interrupt(int irq, void *context)
   pending  = enabled & priv->xfrints;
   if (pending != 0)
     {
-#ifndef CONFIG_SDIO_DMA
+#ifndef CONFIG_KINETIS_SDHC_DMA
       /* Is the RX buffer read ready?  Is so then we must be processing a
        * non-DMA receive transaction.
        */
@@ -1162,7 +1137,7 @@ static int kinetis_interrupt(int irq, void *context)
         {
           /* Terminate the transfer with an error */
 
-          flldbg("ERROR: Data block CRC failure, remaining: %d\n", priv->remaining);
+          mcerr("ERROR: Data block CRC failure, remaining: %d\n", priv->remaining);
           kinetis_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
         }
 
@@ -1172,7 +1147,7 @@ static int kinetis_interrupt(int irq, void *context)
         {
           /* Terminate the transfer with an error */
 
-          flldbg("ERROR: Data timeout, remaining: %d\n", priv->remaining);
+          mcerr("ERROR: Data timeout, remaining: %d\n", priv->remaining);
           kinetis_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT);
         }
     }
@@ -1289,9 +1264,9 @@ static void kinetis_reset(FAR struct sdio_dev_s *dev)
 
   putreg32(SDHC_INT_ALL, KINETIS_SDHC_IRQSTATEN);
 
-  fvdbg("SYSCTL: %08x PRSSTAT: %08x IRQSTATEN: %08x\n",
-        getreg32(KINETIS_SDHC_SYSCTL), getreg32(KINETIS_SDHC_PRSSTAT),
-        getreg32(KINETIS_SDHC_IRQSTATEN));
+  mcinfo("SYSCTL: %08x PRSSTAT: %08x IRQSTATEN: %08x\n",
+         getreg32(KINETIS_SDHC_SYSCTL), getreg32(KINETIS_SDHC_PRSSTAT),
+         getreg32(KINETIS_SDHC_IRQSTATEN));
 
   /* The next phase of the hardware reset would be to set the SYSCTRL INITA
    * bit to send 80 clock ticks for card to power up and then reset the card
@@ -1303,7 +1278,7 @@ static void kinetis_reset(FAR struct sdio_dev_s *dev)
   priv->waitevents = 0;      /* Set of events to be waited for */
   priv->waitints   = 0;      /* Interrupt enables for event waiting */
   priv->wkupevent  = 0;      /* The event that caused the wakeup */
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_KINETIS_SDHC_DMA
   priv->xfrflags   = 0;      /* Used to synchronize SDIO and DMA completion events */
 #endif
 
@@ -1316,6 +1291,35 @@ static void kinetis_reset(FAR struct sdio_dev_s *dev)
   priv->xfrints    = 0;      /* Interrupt enables for data transfer */
 }
 
+/****************************************************************************
+ * Name: kinetis_capabilities
+ *
+ * Description:
+ *   Get capabilities (and limitations) of the SDIO driver (optional)
+ *
+ * Input Parameters:
+ *   dev   - Device-specific state data
+ *
+ * Returned Value:
+ *   Returns a bitset of status values (see SDIO_CAPS_* defines)
+ *
+ ****************************************************************************/
+
+static sdio_capset_t kinetis_capabilities(FAR struct sdio_dev_s *dev)
+{
+  sdio_capset_t caps = 0;
+
+#ifdef CONFIG_KINETIS_SDHC_WIDTH_D1_ONLY
+  caps |= SDIO_CAPS_1BIT_ONLY;
+#endif
+#ifdef CONFIG_KINETIS_SDHC_DMA
+  caps |= SDIO_CAPS_DMASUPPORTED;
+#endif
+  caps |= SDIO_CAPS_DMABEFOREWRITE;
+
+  return caps;
+}
+
 /****************************************************************************
  * Name: kinetis_status
  *
@@ -1330,7 +1334,7 @@ static void kinetis_reset(FAR struct sdio_dev_s *dev)
  *
  ****************************************************************************/
 
-static uint8_t kinetis_status(FAR struct sdio_dev_s *dev)
+static sdio_statset_t kinetis_status(FAR struct sdio_dev_s *dev)
 {
   struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev;
   return priv->cdstatus;
@@ -1504,7 +1508,7 @@ static void kinetis_frequency(FAR struct sdio_dev_s *dev, uint32_t frequency)
   regval |= (SDHC_SYSCTL_SDCLKEN | SDHC_SYSCTL_PEREN | SDHC_SYSCTL_HCKEN |
              SDHC_SYSCTL_IPGEN);
   putreg32(regval, KINETIS_SDHC_SYSCTL);
-  fvdbg("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
+  mcinfo("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
 }
 #endif
 
@@ -1538,7 +1542,7 @@ static void kinetis_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
   regval  = getreg32(KINETIS_SDHC_SYSCTL);
   regval &= ~SDHC_SYSCTL_SDCLKEN;
   putreg32(regval, KINETIS_SDHC_SYSCTL);
-  fvdbg("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
+  mcinfo("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
 
   switch (rate)
     {
@@ -1552,7 +1556,7 @@ static void kinetis_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
           regval &= ~(SDHC_SYSCTL_IPGEN | SDHC_SYSCTL_HCKEN | SDHC_SYSCTL_PEREN |
                       SDHC_SYSCTL_SDCLKFS_MASK | SDHC_SYSCTL_DVS_MASK);
           putreg32(regval, KINETIS_SDHC_SYSCTL);
-          fvdbg("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
+          mcinfo("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
           return;
         }
 
@@ -1565,7 +1569,7 @@ static void kinetis_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
         break;
 
       case CLOCK_SD_TRANSFER_1BIT :  /* SD normal operation clocking (narrow 1-bit mode) */
-#ifndef CONFIG_SDIO_WIDTH_D1_ONLY
+#ifndef CONFIG_KINETIS_SDHC_WIDTH_D1_ONLY
         frequency = CONFIG_KINETIS_SD1BIT_FREQ;
         break;
 #endif
@@ -1593,7 +1597,7 @@ static void kinetis_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
   regval  = getreg32(KINETIS_SDHC_SYSCTL);
   regval &= ~SDHC_SYSCTL_SDCLKEN;
   putreg32(regval, KINETIS_SDHC_SYSCTL);
-  fvdbg("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
+  mcinfo("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
 
   /* Clear the old prescaler and divisor values so that new ones can be ORed
    * in.
@@ -1619,7 +1623,7 @@ static void kinetis_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
 
           regval &= ~(SDHC_SYSCTL_IPGEN | SDHC_SYSCTL_HCKEN | SDHC_SYSCTL_PEREN);
           putreg32(regval, KINETIS_SDHC_SYSCTL);
-          fvdbg("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
+          mcinfo("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
           return;
         }
 
@@ -1637,8 +1641,8 @@ static void kinetis_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
 
       case CLOCK_SD_TRANSFER_1BIT :  /* SD normal operation clocking (narrow
                                       * 1-bit mode) */
-#ifndef CONFIG_SDIO_WIDTH_D1_ONLY
-        regval |= (BOARD_SDHC_SD1MODE_PRESCALER | BOARD_SDHC_IDMODE_DIVISOR |
+#ifndef CONFIG_KINETIS_SDHC_WIDTH_D1_ONLY
+        regval |= (BOARD_SDHC_SD1MODE_PRESCALER | BOARD_SDHC_SD1MODE_DIVISOR |
                    SDHC_SYSCTL_SDCLKEN | SDHC_SYSCTL_PEREN | SDHC_SYSCTL_HCKEN |
                    SDHC_SYSCTL_IPGEN);
         break;
@@ -1653,7 +1657,7 @@ static void kinetis_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
     }
 
   putreg32(regval, KINETIS_SDHC_SYSCTL);
-  fvdbg("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
+  mcinfo("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
 }
 #endif
 
@@ -1677,7 +1681,7 @@ static int kinetis_attach(FAR struct sdio_dev_s *dev)
 
   /* Attach the SDIO interrupt handler */
 
-  ret = irq_attach(KINETIS_IRQ_SDHC, kinetis_interrupt);
+  ret = irq_attach(KINETIS_IRQ_SDHC, kinetis_interrupt, NULL);
   if (ret == OK)
     {
 
@@ -1720,11 +1724,14 @@ static int kinetis_attach(FAR struct sdio_dev_s *dev)
  *
  ****************************************************************************/
 
-static int kinetis_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t arg)
+static int kinetis_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd,
+                           uint32_t arg)
 {
+  systime_t timeout;
+  systime_t start;
+  systime_t elapsed;
   uint32_t regval;
   uint32_t cmdidx;
-  int32_t  timeout;
 
   /* Initialize the command index */
 
@@ -1816,7 +1823,7 @@ static int kinetis_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t ar
 
   /* Enable DMA */
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_KINETIS_SDHC_DMA
   /* Internal DMA is used */
 
   regval |= SDHC_XFERTYP_DMAEN;
@@ -1824,7 +1831,7 @@ static int kinetis_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t ar
 
   /* Other bits? What about CMDTYP? */
 
-  fvdbg("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
+  mcinfo("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
 
   /* The Command Inhibit (CIHB) bit is set in the PRSSTAT bit immediately
    * after the transfer type register is written.  This bit is cleared when
@@ -1836,12 +1843,17 @@ static int kinetis_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t ar
    */
 
   timeout = SDHC_CMDTIMEOUT;
+  start   = clock_systimer();
+
   while ((getreg32(KINETIS_SDHC_PRSSTAT) & SDHC_PRSSTAT_CIHB) != 0)
     {
-      if (--timeout <= 0)
+      /* Calculate the elapsed time */
+
+      elapsed = clock_systimer() - start;
+      if (elapsed >= timeout)
         {
-          fdbg("ERROR: Timeout cmd: %08x PRSSTAT: %08x\n",
-               cmd, getreg32(KINETIS_SDHC_PRSSTAT));
+          mcerr("ERROR: Timeout cmd: %08x PRSSTAT: %08x\n",
+                cmd, getreg32(KINETIS_SDHC_PRSSTAT));
 
           return -EBUSY;
         }
@@ -1879,7 +1891,7 @@ static int kinetis_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t ar
  *
  ****************************************************************************/
 
-#ifndef CONFIG_SDIO_DMA
+#ifndef CONFIG_KINETIS_SDHC_DMA
 static int kinetis_recvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
                              size_t nbytes)
 {
@@ -1901,7 +1913,7 @@ static int kinetis_recvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
 
   /* Then set up the SDIO data path */
 
-  kinetis_dataconfig(priv, false, nbytes, 1, SDHC_DVS_DATATIMEOUT);
+  kinetis_dataconfig(priv, false, nbytes, 1, SDHC_DTOCV_DATATIMEOUT);
 
   /* And enable interrupts */
 
@@ -1930,7 +1942,7 @@ static int kinetis_recvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
  *
  ****************************************************************************/
 
-#ifndef CONFIG_SDIO_DMA
+#ifndef CONFIG_KINETIS_SDHC_DMA
 static int kinetis_sendsetup(FAR struct sdio_dev_s *dev, FAR const uint8_t *buffer,
                            size_t nbytes)
 {
@@ -1952,7 +1964,7 @@ static int kinetis_sendsetup(FAR struct sdio_dev_s *dev, FAR const uint8_t *buff
 
   /* Then set up the SDIO data path */
 
-  kinetis_dataconfig(priv, true, nbytes, 1, SDHC_DVS_DATATIMEOUT);
+  kinetis_dataconfig(priv, true, nbytes, 1, SDHC_DTOCV_DATATIMEOUT);
 
   /* Enable TX interrupts */
 
@@ -1982,7 +1994,7 @@ static int kinetis_sendsetup(FAR struct sdio_dev_s *dev, FAR const uint8_t *buff
 static int kinetis_cancel(FAR struct sdio_dev_s *dev)
 {
   struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev;
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_KINETIS_SDHC_DMA
   uint32_t regval;
 #endif
 
@@ -2003,7 +2015,7 @@ static int kinetis_cancel(FAR struct sdio_dev_s *dev)
 
   /* If this was a DMA transfer, make sure that DMA is stopped */
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_KINETIS_SDHC_DMA
   /* Stop the DMA by resetting the data path */
 
   regval = getreg32(KINETIS_SDHC_SYSCTL);
@@ -2037,9 +2049,11 @@ static int kinetis_cancel(FAR struct sdio_dev_s *dev)
 
 static int kinetis_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
 {
+  systime_t timeout;
+  systime_t start;
+  systime_t elapsed;
   uint32_t errors;
-  int32_t  timeout;
-  int      ret = OK;
+  int ret = OK;
 
   switch (cmd & MMCSD_RESPONSE_MASK)
     {
@@ -2075,12 +2089,17 @@ static int kinetis_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
    * (except Auto CMD12).
    */
 
+  start = clock_systimer();
+
   while ((getreg32(KINETIS_SDHC_IRQSTAT) & SDHC_INT_CC) == 0)
     {
-      if (--timeout <= 0)
+      /* Calculate the elapsed time */
+
+      elapsed = clock_systimer() - start;
+      if (elapsed >= timeout)
         {
-          fdbg("ERROR: Timeout cmd: %08x IRQSTAT: %08x\n",
-               cmd, getreg32(KINETIS_SDHC_IRQSTAT));
+          mcerr("ERROR: Timeout cmd: %08x IRQSTAT: %08x\n",
+                cmd, getreg32(KINETIS_SDHC_IRQSTAT));
 
           return -ETIMEDOUT;
         }
@@ -2090,8 +2109,8 @@ static int kinetis_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
 
   if ((getreg32(KINETIS_SDHC_IRQSTAT) & errors) != 0)
     {
-      fdbg("ERROR: cmd: %08x errors: %08x IRQSTAT: %08x\n",
-           cmd, errors, getreg32(KINETIS_SDHC_IRQSTAT));
+      mcerr("ERROR: cmd: %08x errors: %08x IRQSTAT: %08x\n",
+            cmd, errors, getreg32(KINETIS_SDHC_IRQSTAT));
       ret = -EIO;
     }
 
@@ -2152,10 +2171,10 @@ static int kinetis_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd,
    */
 
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!rshort)
     {
-      fdbg("ERROR: rshort=NULL\n");
+      mcerr("ERROR: rshort=NULL\n");
       ret = -EINVAL;
     }
 
@@ -2165,7 +2184,7 @@ static int kinetis_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd,
            (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R1B_RESPONSE &&
            (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R6_RESPONSE)
     {
-      fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+      mcerr("ERROR: Wrong response CMD=%08x\n", cmd);
       ret = -EINVAL;
     }
   else
@@ -2176,12 +2195,12 @@ static int kinetis_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd,
       regval = getreg32(KINETIS_SDHC_IRQSTAT);
       if ((regval & SDHC_INT_CTOE) != 0)
         {
-          fdbg("ERROR: Command timeout: %08x\n", regval);
+          mcerr("ERROR: Command timeout: %08x\n", regval);
           ret = -ETIMEDOUT;
         }
       else if ((regval & SDHC_INT_CCE) != 0)
         {
-          fdbg("ERROR: CRC failure: %08x\n", regval);
+          mcerr("ERROR: CRC failure: %08x\n", regval);
           ret = -EIO;
         }
     }
@@ -2195,7 +2214,8 @@ static int kinetis_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd,
   return ret;
 }
 
-static int kinetis_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t rlong[4])
+static int kinetis_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd,
+                            uint32_t rlong[4])
 {
   uint32_t regval;
   int ret = OK;
@@ -2209,12 +2229,12 @@ static int kinetis_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t r
    *     0         1               End bit
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   /* Check that R1 is the correct response to this command */
 
   if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R2_RESPONSE)
     {
-      fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+      mcerr("ERROR: Wrong response CMD=%08x\n", cmd);
       ret = -EINVAL;
     }
   else
@@ -2225,12 +2245,12 @@ static int kinetis_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t r
       regval = getreg32(KINETIS_SDHC_IRQSTAT);
       if (regval & SDHC_INT_CTOE)
         {
-          fdbg("ERROR: Timeout IRQSTAT: %08x\n", regval);
+          mcerr("ERROR: Timeout IRQSTAT: %08x\n", regval);
           ret = -ETIMEDOUT;
         }
       else if (regval & SDHC_INT_CCE)
         {
-          fdbg("ERROR: CRC fail IRQSTAT: %08x\n", regval);
+          mcerr("ERROR: CRC fail IRQSTAT: %08x\n", regval);
           ret = -EIO;
         }
     }
@@ -2239,15 +2259,29 @@ static int kinetis_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t r
 
   if (rlong)
     {
+#if 0
       rlong[0] = getreg32(KINETIS_SDHC_CMDRSP3);
       rlong[1] = getreg32(KINETIS_SDHC_CMDRSP2);
       rlong[2] = getreg32(KINETIS_SDHC_CMDRSP1);
       rlong[3] = getreg32(KINETIS_SDHC_CMDRSP0);
+#else
+      uint32_t rsp3 = getreg32(KINETIS_SDHC_CMDRSP3);
+      uint32_t rsp2 = getreg32(KINETIS_SDHC_CMDRSP2);
+      uint32_t rsp1 = getreg32(KINETIS_SDHC_CMDRSP1);
+      uint32_t rsp0 = getreg32(KINETIS_SDHC_CMDRSP0);
+
+      rlong[0] = rsp3 << 8 | rsp2 >> 24;
+      rlong[1] = rsp2 << 8 | rsp1 >> 24;
+      rlong[2] = rsp1 << 8 | rsp0 >> 24;
+      rlong[3] = rsp0 << 8;
+#endif
     }
+
   return ret;
 }
 
-static int kinetis_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *rshort)
+static int kinetis_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd,
+                             uint32_t *rshort)
 {
   uint32_t regval;
   int ret = OK;
@@ -2263,11 +2297,11 @@ static int kinetis_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
 
   /* Check that this is the correct response to this command */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R3_RESPONSE &&
       (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R7_RESPONSE)
     {
-      fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+      mcerr("ERROR: Wrong response CMD=%08x\n", cmd);
       ret = -EINVAL;
     }
   else
@@ -2280,7 +2314,7 @@ static int kinetis_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
       regval = getreg32(KINETIS_SDHC_IRQSTAT);
       if (regval & SDHC_INT_CTOE)
         {
-          fdbg("ERROR: Timeout IRQSTAT: %08x\n", regval);
+          mcerr("ERROR: Timeout IRQSTAT: %08x\n", regval);
           ret = -ETIMEDOUT;
         }
     }
@@ -2416,7 +2450,7 @@ static sdio_eventset_t kinetis_eventwait(FAR struct sdio_dev_s *dev,
                        1, (uint32_t)priv);
       if (ret != OK)
         {
-          fdbg("ERROR: wd_start failed: %d\n", ret);
+          mcerr("ERROR: wd_start failed: %d\n", ret);
         }
     }
 
@@ -2451,7 +2485,7 @@ static sdio_eventset_t kinetis_eventwait(FAR struct sdio_dev_s *dev,
   /* Disable event-related interrupts */
 
   kinetis_configwaitints(priv, 0, 0, 0);
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_KINETIS_SDHC_DMA
   priv->xfrflags   = 0;
 #endif
 
@@ -2486,7 +2520,7 @@ static void kinetis_callbackenable(FAR struct sdio_dev_s *dev,
 {
   struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev;
 
-  fvdbg("eventset: %02x\n", eventset);
+  mcinfo("eventset: %02x\n", eventset);
   DEBUGASSERT(priv != NULL);
 
   priv->cbevents = eventset;
@@ -2522,7 +2556,7 @@ static int kinetis_registercallback(FAR struct sdio_dev_s *dev,
 
   /* Disable callbacks and register this callback and is argument */
 
-  fvdbg("Register %p(%p)\n", callback, arg);
+  mcinfo("Register %p(%p)\n", callback, arg);
   DEBUGASSERT(priv != NULL);
 
   priv->cbevents = 0;
@@ -2531,27 +2565,6 @@ static int kinetis_registercallback(FAR struct sdio_dev_s *dev,
   return OK;
 }
 
-/****************************************************************************
- * Name: kinetis_dmasupported
- *
- * Description:
- *   Return true if the hardware can support DMA
- *
- * Input Parameters:
- *   dev - An instance of the SDIO device interface
- *
- * Returned Value:
- *   true if DMA is supported.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_SDIO_DMA
-static bool kinetis_dmasupported(FAR struct sdio_dev_s *dev)
-{
-  return true;
-}
-#endif
-
 /****************************************************************************
  * Name: kinetis_dmarecvsetup
  *
@@ -2571,7 +2584,7 @@ static bool kinetis_dmasupported(FAR struct sdio_dev_s *dev)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_KINETIS_SDHC_DMA
 static int kinetis_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
                               size_t buflen)
 {
@@ -2596,7 +2609,7 @@ static int kinetis_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
 
   /* Then set up the SDIO data path */
 
-  kinetis_dataconfig(priv, false, buflen, 1, SDHC_DVS_DATATIMEOUT);
+  kinetis_dataconfig(priv, false, buflen, 1, SDHC_DTOCV_DATATIMEOUT);
 
   /* Configure the RX DMA */
 
@@ -2629,7 +2642,7 @@ static int kinetis_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
  *
  ****************************************************************************/
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_KINETIS_SDHC_DMA
 static int kinetis_dmasendsetup(FAR struct sdio_dev_s *dev,
                               FAR const uint8_t *buffer, size_t buflen)
 {
@@ -2654,7 +2667,7 @@ static int kinetis_dmasendsetup(FAR struct sdio_dev_s *dev,
 
   /* Then set up the SDIO data path */
 
-  kinetis_dataconfig(priv, true, buflen, 1, SDHC_DVS_DATATIMEOUT);
+  kinetis_dataconfig(priv, true, buflen, 1, SDHC_DTOCV_DATATIMEOUT);
 
   /* Configure the TX DMA */
 
@@ -2694,8 +2707,8 @@ static void kinetis_callback(void *arg)
   /* Is a callback registered? */
 
   DEBUGASSERT(priv != NULL);
-  fvdbg("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
-        priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus);
+  mcinfo("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
+         priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus);
 
   if (priv->callback)
     {
@@ -2739,14 +2752,14 @@ static void kinetis_callback(void *arg)
         {
           /* Yes.. queue it */
 
-           fvdbg("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
+           mcinfo("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
           (void)work_queue(HPWORK, &priv->cbwork, (worker_t)priv->callback, priv->cbarg, 0);
         }
       else
         {
           /* No.. then just call the callback here */
 
-          fvdbg("Callback to %p(%p)\n", priv->callback, priv->cbarg);
+          mcinfo("Callback to %p(%p)\n", priv->callback, priv->cbarg);
           priv->callback(priv->cbarg);
         }
     }
@@ -2780,19 +2793,20 @@ FAR struct sdio_dev_s *sdhc_initialize(int slotno)
   DEBUGASSERT(slotno == 0);
 
   /* Initialize the SDHC slot structure data structure */
+  /* Initialize semaphores */
 
   sem_init(&priv->waitsem, 0, 0);
-  priv->waitwdog = wd_create();
-  DEBUGASSERT(priv->waitwdog);
 
-  /* Enable clocking to the SDHC module.  Clocking is still diabled in
-   * the SYSCTRL register.
+  /* The waitsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
    */
 
-  regval = getreg32(KINETIS_SIM_SCGC3);
-  regval |= SIM_SCGC3_SDHC;
-  putreg32(regval, KINETIS_SIM_SCGC3);
-  fvdbg("SIM_SCGC3: %08x\n", regval);
+  sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
+
+  /* Create a watchdog timer */
+
+  priv->waitwdog = wd_create();
+  DEBUGASSERT(priv->waitwdog);
 
   /* In addition to the system clock, the SDHC module needs a clock for the
    * base for the external card clock.  There are four possible sources for
@@ -2808,7 +2822,17 @@ FAR struct sdio_dev_s *sdhc_initialize(int slotno)
   regval &= ~SIM_SOPT2_SDHCSRC_MASK;
   regval |= SIM_SOPT2_SDHCSRC_CORE;
   putreg32(regval, KINETIS_SIM_SOPT2);
-  fvdbg("SIM_SOPT2: %08x\n", regval);
+  mcinfo("SIM_SOPT2: %08x\n", regval);
+
+  /* Enable clocking to the SDHC module.  Clocking is still disabled in
+   * the SYSCTRL register.
+   */
+
+  regval = getreg32(KINETIS_SIM_SCGC3);
+  regval |= SIM_SCGC3_SDHC;
+  putreg32(regval, KINETIS_SIM_SCGC3);
+  mcinfo("SIM_SCGC3: %08x\n", regval);
+
 
   /* Configure pins for 1 or 4-bit, wide-bus operation (the chip is capable
    * of 8-bit wide bus operation but D4-D7 are not configured).
@@ -2824,7 +2848,7 @@ FAR struct sdio_dev_s *sdhc_initialize(int slotno)
 
   /* Data width 4 or 8 */
 
-#ifndef CONFIG_SDIO_WIDTH_D1_ONLY
+#ifndef CONFIG_KINETIS_SDHC_WIDTH_D1_ONLY
   kinetis_pinconfig(PIN_SDHC0_D1);
   kinetis_pinconfig(PIN_SDHC0_D2);
   kinetis_pinconfig(PIN_SDHC0_D3);
@@ -2876,7 +2900,7 @@ FAR struct sdio_dev_s *sdhc_initialize(int slotno)
 void sdhc_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
 {
   struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev;
-  uint8_t cdstatus;
+  sdio_statset_t cdstatus;
   irqstate_t flags;
 
   /* Update card status */
@@ -2892,7 +2916,9 @@ void sdhc_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
       priv->cdstatus &= ~SDIO_STATUS_PRESENT;
     }
 
-  fvdbg("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
+  leave_critical_section(flags);
+
+  mcinfo("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
 
   /* Perform any requested callback if the status has changed */
 
@@ -2900,8 +2926,6 @@ void sdhc_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
     {
       kinetis_callback(priv);
     }
-
-  leave_critical_section(flags);
 }
 
 /****************************************************************************
@@ -2937,7 +2961,7 @@ void sdhc_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
       priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED;
     }
 
-  fvdbg("cdstatus: %02x\n", priv->cdstatus);
+  mcinfo("cdstatus: %02x\n", priv->cdstatus);
   leave_critical_section(flags);
 }
 #endif /* CONFIG_KINETIS_SDHC */
diff --git a/arch/arm/src/kinetis/kinetis_serial.c b/arch/arm/src/kinetis/kinetis_serial.c
index 550ff55917d5a613f893164ea9a74ba147e4f219..63873ecab5fc9ae67c4ff593fef61c7ef5ad2c3f 100644
--- a/arch/arm/src/kinetis/kinetis_serial.c
+++ b/arch/arm/src/kinetis/kinetis_serial.c
@@ -1,8 +1,9 @@
 /****************************************************************************
- * arch/mips/src/kinetis/kinetis_serial.c
+ * arch/arm/src/kinetis/kinetis_serial.c
  *
- *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2011-2012, 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -59,7 +60,7 @@
 
 #include "kinetis_config.h"
 #include "chip.h"
-#include "kinetis_uart.h"
+#include "chip/kinetis_uart.h"
 #include "kinetis.h"
 
 /****************************************************************************
@@ -76,7 +77,7 @@
  * provide some minimal implementation of up_putc.
  */
 
-#ifdef USE_SERIALDRIVER
+#if defined(HAVE_UART_DEVICE) && defined(USE_SERIALDRIVER)
 
 /* Which UART with be tty0/console and which tty1-4?  The console will always
  * be ttyS0.  If there is no console then will use the lowest numbered UART.
@@ -232,7 +233,7 @@ struct up_dev_s
   uintptr_t uartbase;  /* Base address of UART registers */
   uint32_t  baud;      /* Configured baud */
   uint32_t  clock;     /* Clocking frequency of the UART module */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   uint8_t   irqe;      /* Error IRQ associated with this UART (for enable) */
 #endif
   uint8_t   irqs;      /* Status IRQ associated with this UART (for enable) */
@@ -240,6 +241,7 @@ struct up_dev_s
   uint8_t   ie;        /* Interrupts enabled */
   uint8_t   parity;    /* 0=none, 1=odd, 2=even */
   uint8_t   bits;      /* Number of bits (8 or 9) */
+  uint8_t   stop2;     /* Use 2 stop bits */
 };
 
 /****************************************************************************
@@ -250,10 +252,10 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-#ifdef CONFIG_DEBUG
-static int  up_interrupte(int irq, void *context);
+#ifdef CONFIG_DEBUG_FEATURES
+static int  up_interrupt(int irq, void *context, FAR void *arg);
 #endif
-static int  up_interrupts(int irq, void *context);
+static int  up_interrupts(int irq, void *context, FAR void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  up_receive(struct uart_dev_s *dev, uint32_t *status);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
@@ -327,13 +329,14 @@ static struct up_dev_s g_uart0priv =
   .uartbase       = KINETIS_UART0_BASE,
   .clock          = BOARD_CORECLK_FREQ,
   .baud           = CONFIG_UART0_BAUD,
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   .irqe           = KINETIS_IRQ_UART0E,
 #endif
   .irqs           = KINETIS_IRQ_UART0S,
   .irqprio        = CONFIG_KINETIS_UART0PRIO,
   .parity         = CONFIG_UART0_PARITY,
   .bits           = CONFIG_UART0_BITS,
+  .stop2          = CONFIG_UART0_2STOP,
 };
 
 static uart_dev_t g_uart0port =
@@ -361,13 +364,14 @@ static struct up_dev_s g_uart1priv =
   .uartbase       = KINETIS_UART1_BASE,
   .clock          = BOARD_CORECLK_FREQ,
   .baud           = CONFIG_UART1_BAUD,
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   .irqe           = KINETIS_IRQ_UART1E,
 #endif
   .irqs           = KINETIS_IRQ_UART1S,
   .irqprio        = CONFIG_KINETIS_UART1PRIO,
   .parity         = CONFIG_UART1_PARITY,
   .bits           = CONFIG_UART1_BITS,
+  .stop2          = CONFIG_UART1_2STOP,
 };
 
 static uart_dev_t g_uart1port =
@@ -395,13 +399,14 @@ static struct up_dev_s g_uart2priv =
   .uartbase       = KINETIS_UART2_BASE,
   .clock          = BOARD_BUS_FREQ,
   .baud           = CONFIG_UART2_BAUD,
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   .irqe           = KINETIS_IRQ_UART2E,
 #endif
   .irqs           = KINETIS_IRQ_UART2S,
   .irqprio        = CONFIG_KINETIS_UART2PRIO,
   .parity         = CONFIG_UART2_PARITY,
   .bits           = CONFIG_UART2_BITS,
+  .stop2          = CONFIG_UART2_2STOP,
 };
 
 static uart_dev_t g_uart2port =
@@ -429,13 +434,14 @@ static struct up_dev_s g_uart3priv =
   .uartbase       = KINETIS_UART3_BASE,
   .clock          = BOARD_BUS_FREQ,
   .baud           = CONFIG_UART3_BAUD,
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   .irqe           = KINETIS_IRQ_UART3E,
 #endif
   .irqs           = KINETIS_IRQ_UART3S,
   .irqprio        = CONFIG_KINETIS_UART3PRIO,
   .parity         = CONFIG_UART3_PARITY,
   .bits           = CONFIG_UART3_BITS,
+  .stop2          = CONFIG_UART3_2STOP,
 };
 
 static uart_dev_t g_uart3port =
@@ -463,13 +469,14 @@ static struct up_dev_s g_uart4priv =
   .uartbase       = KINETIS_UART4_BASE,
   .clock          = BOARD_BUS_FREQ,
   .baud           = CONFIG_UART4_BAUD,
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   .irqe           = KINETIS_IRQ_UART4E,
 #endif
   .irqs           = KINETIS_IRQ_UART4S,
   .irqprio        = CONFIG_KINETIS_UART4PRIO,
   .parity         = CONFIG_UART4_PARITY,
   .bits           = CONFIG_UART4_BITS,
+  .stop2          = CONFIG_UART4_2STOP,
 };
 
 static uart_dev_t g_uart4port =
@@ -497,13 +504,14 @@ static struct up_dev_s g_uart5priv =
   .uartbase       = KINETIS_UART5_BASE,
   .clock          = BOARD_BUS_FREQ,
   .baud           = CONFIG_UART5_BAUD,
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   .irqe           = KINETIS_IRQ_UART5E,
 #endif
   .irqs           = KINETIS_IRQ_UART5S,
   .irqprio        = CONFIG_KINETIS_UART5PRIO,
   .parity         = CONFIG_UART5_PARITY,
   .bits           = CONFIG_UART5_BITS,
+  .stop2          = CONFIG_UART5_2STOP,
 };
 
 static uart_dev_t g_uart5port =
@@ -615,7 +623,7 @@ static int up_setup(struct uart_dev_s *dev)
   /* Configure the UART as an RS-232 UART */
 
   kinetis_uartconfigure(priv->uartbase, priv->baud, priv->clock,
-                        priv->parity, priv->bits);
+                        priv->parity, priv->bits, priv->stop2);
 #endif
 
   /* Make sure that all interrupts are disabled */
@@ -626,7 +634,7 @@ static int up_setup(struct uart_dev_s *dev)
   /* Set up the interrupt priority */
 
   up_prioritize_irq(priv->irqs, priv->irqprio);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   up_prioritize_irq(priv->irqe, priv->irqprio);
 #endif
 #endif
@@ -680,17 +688,17 @@ static int up_attach(struct uart_dev_s *dev)
    * disabled in the C2 register.
    */
 
-  ret = irq_attach(priv->irqs, up_interrupts);
-#ifdef CONFIG_DEBUG
+  ret = irq_attach(priv->irqs, up_interrupts, dev);
+#ifdef CONFIG_DEBUG_FEATURES
   if (ret == OK)
     {
-      ret = irq_attach(priv->irqe, up_interrupte);
+      ret = irq_attach(priv->irqe, up_interrupt, dev);
     }
 #endif
 
   if (ret == OK)
     {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       up_enable_irq(priv->irqe);
 #endif
       up_enable_irq(priv->irqs);
@@ -716,7 +724,7 @@ static void up_detach(struct uart_dev_s *dev)
   /* Disable interrupts */
 
   up_restoreuartint(priv, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   up_disable_irq(priv->irqe);
 #endif
   up_disable_irq(priv->irqs);
@@ -724,13 +732,13 @@ static void up_detach(struct uart_dev_s *dev)
   /* Detach from the interrupt(s) */
 
   irq_detach(priv->irqs);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   irq_detach(priv->irqe);
 #endif
 }
 
 /****************************************************************************
- * Name: up_interrupte
+ * Name: up_interrupt
  *
  * Description:
  *   This is the UART error interrupt handler.  It will be invoked when an
@@ -738,60 +746,15 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
-static int up_interrupte(int irq, void *context)
+#ifdef CONFIG_DEBUG_FEATURES
+static int up_interrupt(int irq, void *context, FAR void *arg)
 {
-  struct uart_dev_s *dev = NULL;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct up_dev_s   *priv;
   uint8_t            regval;
 
-#ifdef CONFIG_KINETIS_UART0
-  if (g_uart0priv.irqe == irq)
-    {
-      dev = &g_uart0port;
-    }
-  else
-#endif
-#ifdef CONFIG_KINETIS_UART1
-  if (g_uart1priv.irqe == irq)
-    {
-      dev = &g_uart1port;
-    }
-  else
-#endif
-#ifdef CONFIG_KINETIS_UART2
-  if (g_uart2priv.irqe == irq)
-    {
-      dev = &g_uart2port;
-    }
-  else
-#endif
-#ifdef CONFIG_KINETIS_UART3
-  if (g_uart3priv.irqe == irq)
-    {
-      dev = &g_uart3port;
-    }
-  else
-#endif
-#ifdef CONFIG_KINETIS_UART4
-  if (g_uart4priv.irqe == irq)
-    {
-      dev = &g_uart4port;
-    }
-  else
-#endif
-#ifdef CONFIG_KINETIS_UART5
-  if (g_uart5priv.irqe == irq)
-    {
-      dev = &g_uart5port;
-    }
-  else
-#endif
-    {
-      PANIC();
-    }
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct up_dev_s *)dev->priv;
-  DEBUGASSERT(priv);
 
   /* Handle error interrupts.  This interrupt may be caused by:
    *
@@ -804,11 +767,15 @@ static int up_interrupte(int irq, void *context)
    */
 
   regval = up_serialin(priv, KINETIS_UART_S1_OFFSET);
-  lldbg("S1: %02x\n", regval);
+  _info("S1: %02x\n", regval);
+  UNUSED(regval);
+
   regval = up_serialin(priv, KINETIS_UART_D_OFFSET);
+  UNUSED(regval);
+
   return OK;
 }
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_FEATURES */
 
 /****************************************************************************
  * Name: up_interrupts
@@ -822,9 +789,9 @@ static int up_interrupte(int irq, void *context)
  *
  ****************************************************************************/
 
-static int up_interrupts(int irq, void *context)
+static int up_interrupts(int irq, void *context, FAR void *arg)
 {
-  struct uart_dev_s *dev = NULL;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct up_dev_s   *priv;
   int                passes;
 #ifdef CONFIG_KINETIS_UARTFIFOS
@@ -834,53 +801,8 @@ static int up_interrupts(int irq, void *context)
 #endif
   bool               handled;
 
-#ifdef CONFIG_KINETIS_UART0
-  if (g_uart0priv.irqs == irq)
-    {
-      dev = &g_uart0port;
-    }
-  else
-#endif
-#ifdef CONFIG_KINETIS_UART1
-  if (g_uart1priv.irqs == irq)
-    {
-      dev = &g_uart1port;
-    }
-  else
-#endif
-#ifdef CONFIG_KINETIS_UART2
-  if (g_uart2priv.irqs == irq)
-    {
-      dev = &g_uart2port;
-    }
-  else
-#endif
-#ifdef CONFIG_KINETIS_UART3
-  if (g_uart3priv.irqs == irq)
-    {
-      dev = &g_uart3port;
-    }
-  else
-#endif
-#ifdef CONFIG_KINETIS_UART4
-  if (g_uart4priv.irqs == irq)
-    {
-      dev = &g_uart4port;
-    }
-  else
-#endif
-#ifdef CONFIG_KINETIS_UART5
-  if (g_uart5priv.irq == irqs)
-    {
-      dev = &g_uart5port;
-    }
-  else
-#endif
-    {
-      PANIC();
-    }
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct up_dev_s *)dev->priv;
-  DEBUGASSERT(priv);
 
   /* Loop until there are no characters to be transferred or,
    * until we have been looping for a long time.
@@ -1064,11 +986,11 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
     }
   else
     {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 #  warning "Revisit:  How are errors enabled?"
-      priv->ie |= UART_C2_RIE;
+      priv->ie &= ~UART_C2_RIE;
 #else
-      priv->ie |= UART_C2_RIE;
+      priv->ie &= ~UART_C2_RIE;
 #endif
       up_setuartint(priv);
     }
@@ -1215,7 +1137,7 @@ static bool up_txempty(struct uart_dev_s *dev)
  ****************************************************************************/
 
 /****************************************************************************
- * Name: up_earlyserialinit
+ * Name: kinetis_uart_earlyserialinit
  *
  * Description:
  *   Performs the low level UART initialization early in debug so that the
@@ -1226,7 +1148,8 @@ static bool up_txempty(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-void up_earlyserialinit(void)
+#if defined(USE_EARLYSERIALINIT)
+void kinetis_uart_earlyserialinit(void)
 {
   /* Disable interrupts from all UARTS.  The console is enabled in
    * pic32mx_consoleinit()
@@ -1251,47 +1174,63 @@ void up_earlyserialinit(void)
 
   /* Configuration whichever one is the console */
 
-#ifdef HAVE_SERIAL_CONSOLE
+#ifdef HAVE_UART_CONSOLE
   CONSOLE_DEV.isconsole = true;
   up_setup(&CONSOLE_DEV);
 #endif
 }
+#endif
 
 /****************************************************************************
- * Name: up_serialinit
+ * Name: kinetis_uart_serialinit
  *
  * Description:
  *   Register serial console and serial ports.  This assumes
  *   that up_earlyserialinit was called previously.
  *
+ * Input Parameters:
+ *   first: - First TTY number to assign
+ *
+ * Returns Value:
+ *   The next TTY number available for assignment
+ *
  ****************************************************************************/
 
-void up_serialinit(void)
+unsigned int kinetis_uart_serialinit(unsigned int first)
 {
+  char devname[] = "/dev/ttySx";
+
   /* Register the console */
 
-#ifdef HAVE_SERIAL_CONSOLE
+#ifdef HAVE_UART_CONSOLE
   (void)uart_register("/dev/console", &CONSOLE_DEV);
 #endif
 
   /* Register all UARTs */
 
-  (void)uart_register("/dev/ttyS0", &TTYS0_DEV);
+  devname[(sizeof(devname)/sizeof(devname[0]))-2] = '0' + first++;
+  (void)uart_register(devname, &TTYS0_DEV);
 #ifdef TTYS1_DEV
-  (void)uart_register("/dev/ttyS1", &TTYS1_DEV);
+  devname[(sizeof(devname)/sizeof(devname[0]))-2] = '0' + first++;
+  (void)uart_register(devname, &TTYS1_DEV);
 #endif
 #ifdef TTYS2_DEV
-  (void)uart_register("/dev/ttyS2", &TTYS2_DEV);
+  devname[(sizeof(devname)/sizeof(devname[0]))-2] = '0' + first++;
+  (void)uart_register(devname, &TTYS2_DEV);
 #endif
 #ifdef TTYS3_DEV
-  (void)uart_register("/dev/ttyS3", &TTYS3_DEV);
+  devname[(sizeof(devname)/sizeof(devname[0]))-2] = '0' + first++;
+  (void)uart_register(devname, &TTYS3_DEV);
 #endif
 #ifdef TTYS4_DEV
-  (void)uart_register("/dev/ttyS4", &TTYS4_DEV);
+  devname[(sizeof(devname)/sizeof(devname[0]))-2] = '0' + first++;
+  (void)uart_register(devname, &TTYS4_DEV);
 #endif
 #ifdef TTYS5_DEV
-  (void)uart_register("/dev/ttyS5", &TTYS5_DEV);
+  devname[(sizeof(devname)/sizeof(devname[0]))-2] = '0' + first++;
+  (void)uart_register(devname, &TTYS5_DEV);
 #endif
+  return first;
 }
 
 /****************************************************************************
@@ -1302,9 +1241,10 @@ void up_serialinit(void)
  *
  ****************************************************************************/
 
+#ifdef HAVE_UART_PUTC
 int up_putc(int ch)
 {
-#ifdef HAVE_SERIAL_CONSOLE
+#ifdef HAVE_UART_CONSOLE
   struct up_dev_s *priv = (struct up_dev_s *)CONSOLE_DEV.priv;
   uint8_t ie;
 
@@ -1324,6 +1264,7 @@ int up_putc(int ch)
 #endif
   return ch;
 }
+#endif
 
 #else /* USE_SERIALDRIVER */
 
@@ -1335,9 +1276,10 @@ int up_putc(int ch)
  *
  ****************************************************************************/
 
+#ifdef HAVE_UART_PUTC
 int up_putc(int ch)
 {
-#ifdef HAVE_SERIAL_CONSOLE
+#ifdef HAVE_UART_CONSOLE
   /* Check for LF */
 
   if (ch == '\n')
@@ -1351,6 +1293,7 @@ int up_putc(int ch)
 #endif
   return ch;
 }
+#endif
 
-#endif /* USE_SERIALDRIVER */
+#endif /* HAVE_UART_DEVICE && USE_SERIALDRIVER) */
 
diff --git a/arch/arm/src/kinetis/kinetis_serialinit.c b/arch/arm/src/kinetis/kinetis_serialinit.c
new file mode 100644
index 0000000000000000000000000000000000000000..0638d360f9285bc3ee75a31840383aac17a46b96
--- /dev/null
+++ b/arch/arm/src/kinetis/kinetis_serialinit.c
@@ -0,0 +1,128 @@
+/****************************************************************************
+ * arch/arm/src/kinetis/kinetis_serialinit.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include "kinetis_config.h"
+#include "kinetis.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if !defined(HAVE_UART_DEVICE) && !defined(HAVE_LPUART_DEVICE)
+#  undef CONFIG_KINETS_LPUART_LOWEST
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: kinetis_earlyserialinit
+ *
+ * Description:
+ *   Performs the low level UART and LPUART initialization early in debug
+ *   so that the serial console will be available during bootup.  This must
+ *   be called before up_serialinit.  NOTE:  This function depends on GPIO
+ *   pin configuration performed in up_consoleinit() and main clock
+ *   initialization performed in up_clkinitialize().
+ *
+ ****************************************************************************/
+
+#if defined(USE_EARLYSERIALINIT)
+void kinetis_earlyserialinit(void)
+{
+#if defined(HAVE_UART_DEVICE)
+  /* Initialize UART drivers */
+
+  kinetis_uart_earlyserialinit();
+#endif
+
+#if defined(HAVE_LPUART_DEVICE)
+  /* Initialize LPUART drivers */
+
+  kinetis_lpuart_earlyserialinit();
+#endif
+}
+#endif
+
+#if defined(USE_SERIALDRIVER)
+
+/****************************************************************************
+ * Name: up_serialinit
+ *
+ * Description:
+ *   Register all the serial console and serial ports.  This assumes
+ *   that kinetis_earlyserialinit was called previously.
+ *
+ ****************************************************************************/
+
+void up_serialinit(void)
+{
+#if defined(HAVE_UART_DEVICE) ||defined(HAVE_LUART_DEVICE)
+  uint32_t start = 0;
+#endif
+
+  /* Register the console and drivers */
+
+#if defined(HAVE_LPUART_DEVICE) && defined(CONFIG_KINETS_LPUART_LOWEST)
+  /* Register LPUART drivers in starting positions */
+
+   start = kinetis_lpuart_serialinit(start);
+#endif
+
+#if defined(HAVE_UART_DEVICE)
+  /* Register UART drivers */
+
+  start = kinetis_uart_serialinit(start);
+#endif
+
+#if defined(HAVE_LPUART_DEVICE) && !defined(CONFIG_KINETS_LPUART_LOWEST)
+  /* Register LPUART drivers in last positions */
+
+   start = kinetis_lpuart_serialinit(start);
+#endif
+
+}
+#endif /* USE_SERIALDRIVER */
+
diff --git a/arch/arm/src/kinetis/kinetis_sim.h b/arch/arm/src/kinetis/kinetis_sim.h
deleted file mode 100644
index aad17e923e80c2bc7513fba4ff707c3825e2d5a3..0000000000000000000000000000000000000000
--- a/arch/arm/src/kinetis/kinetis_sim.h
+++ /dev/null
@@ -1,545 +0,0 @@
-/************************************************************************************
- * arch/arm/src/kinetis/kinetis_sim.h
- *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ************************************************************************************/
-
-#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_SIM_H
-#define __ARCH_ARM_SRC_KINETIS_KINETIS_SIM_H
-
-/************************************************************************************
- * Included Files
- ************************************************************************************/
-
-#include 
-
-#include "chip.h"
-
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Register Offsets *****************************************************************/
-
-#define KINETIS_SIM_SOPT1_OFFSET      0x0000 /* System Options Register 1 */
-#define KINETIS_SIM_SOPT2_OFFSET      0x0004 /* System Options Register 2 */
-#define KINETIS_SIM_SOPT4_OFFSET      0x000c /* System Options Register 4 */
-#define KINETIS_SIM_SOPT5_OFFSET      0x0010 /* System Options Register 5 */
-#define KINETIS_SIM_SOPT6_OFFSET      0x0014 /* System Options Register 6 */
-#define KINETIS_SIM_SOPT7_OFFSET      0x0018 /* System Options Register 7 */
-#define KINETIS_SIM_SDID_OFFSET       0x0024 /* System Device Identification Register */
-#define KINETIS_SIM_SCGC1_OFFSET      0x0028 /* System Clock Gating Control Register 1 */
-#define KINETIS_SIM_SCGC2_OFFSET      0x002c /* System Clock Gating Control Register 2 */
-#define KINETIS_SIM_SCGC3_OFFSET      0x0030 /* System Clock Gating Control Register 3 */
-#define KINETIS_SIM_SCGC4_OFFSET      0x0034 /* System Clock Gating Control Register 4 */
-#define KINETIS_SIM_SCGC5_OFFSET      0x0038 /* System Clock Gating Control Register 5 */
-#define KINETIS_SIM_SCGC6_OFFSET      0x003c /* System Clock Gating Control Register 6 */
-#define KINETIS_SIM_SCGC7_OFFSET      0x0040 /* System Clock Gating Control Register 7 */
-#define KINETIS_SIM_CLKDIV1_OFFSET    0x0044 /* System Clock Divider Register 1 */
-#define KINETIS_SIM_CLKDIV2_OFFSET    0x0048 /* System Clock Divider Register 2 */
-#define KINETIS_SIM_FCFG1_OFFSET      0x004c /* Flash Configuration Register 1 */
-#define KINETIS_SIM_FCFG2_OFFSET      0x0050 /* Flash Configuration Register 2 */
-#define KINETIS_SIM_UIDH_OFFSET       0x0054 /* Unique Identification Register High */
-#define KINETIS_SIM_UIDMH_OFFSET      0x0058 /* Unique Identification Register Mid-High */
-#define KINETIS_SIM_UIDML_OFFSET      0x005c /* Unique Identification Register Mid Low */
-#define KINETIS_SIM_UIDL_OFFSET       0x0060 /* Unique Identification Register Low */
-
-/* Register Addresses ***************************************************************/
-/* NOTE: The SIM_SOPT1 register is located at a different base address than the
- * other SIM registers.
- */
-
-#define KINETIS_SIM_SOPT1             (KINETIS_SIMLP_BASE+KINETIS_SIM_SOPT1_OFFSET)
-#define KINETIS_SIM_SOPT2             (KINETIS_SIM_BASE+KINETIS_SIM_SOPT2_OFFSET)
-#define KINETIS_SIM_SOPT4             (KINETIS_SIM_BASE+KINETIS_SIM_SOPT4_OFFSET)
-#define KINETIS_SIM_SOPT5             (KINETIS_SIM_BASE+KINETIS_SIM_SOPT5_OFFSET)
-#define KINETIS_SIM_SOPT6             (KINETIS_SIM_BASE+KINETIS_SIM_SOPT6_OFFSET)
-#define KINETIS_SIM_SOPT7             (KINETIS_SIM_BASE+KINETIS_SIM_SOPT7_OFFSET)
-#define KINETIS_SIM_SDID              (KINETIS_SIM_BASE+KINETIS_SIM_SDID_OFFSET)
-#define KINETIS_SIM_SCGC1             (KINETIS_SIM_BASE+KINETIS_SIM_SCGC1_OFFSET)
-#define KINETIS_SIM_SCGC2             (KINETIS_SIM_BASE+KINETIS_SIM_SCGC2_OFFSET)
-#define KINETIS_SIM_SCGC3             (KINETIS_SIM_BASE+KINETIS_SIM_SCGC3_OFFSET)
-#define KINETIS_SIM_SCGC4             (KINETIS_SIM_BASE+KINETIS_SIM_SCGC4_OFFSET)
-#define KINETIS_SIM_SCGC5             (KINETIS_SIM_BASE+KINETIS_SIM_SCGC5_OFFSET)
-#define KINETIS_SIM_SCGC6             (KINETIS_SIM_BASE+KINETIS_SIM_SCGC6_OFFSET)
-#define KINETIS_SIM_SCGC7             (KINETIS_SIM_BASE+KINETIS_SIM_SCGC7_OFFSET)
-#define KINETIS_SIM_CLKDIV1           (KINETIS_SIM_BASE+KINETIS_SIM_CLKDIV1_OFFSET)
-#define KINETIS_SIM_CLKDIV2           (KINETIS_SIM_BASE+KINETIS_SIM_CLKDIV2_OFFSET)
-#define KINETIS_SIM_FCFG1             (KINETIS_SIM_BASE+KINETIS_SIM_FCFG1_OFFSET)
-#define KINETIS_SIM_FCFG2             (KINETIS_SIM_BASE+KINETIS_SIM_FCFG2_OFFSET)
-#define KINETIS_SIM_UIDH              (KINETIS_SIM_BASE+KINETIS_SIM_UIDH_OFFSET)
-#define KINETIS_SIM_UIDMH             (KINETIS_SIM_BASE+KINETIS_SIM_UIDMH_OFFSET)
-#define KINETIS_SIM_UIDML             (KINETIS_SIM_BASE+KINETIS_SIM_UIDML_OFFSET)
-#define KINETIS_SIM_UIDL              (KINETIS_SIM_BASE+KINETIS_SIM_UIDL_OFFSET)
-
-/* Register Bit Definitions *********************************************************/
-
-/* System Options Register 1 */
-                                                /* Bits 0-11: Reserved */
-#define SIM_SOPT1_RAMSIZE_SHIFT       (12)      /* Bits 12-15: RAM size */
-#define SIM_SOPT1_RAMSIZE_MASK        (15 << SIM_SOPT1_RAMSIZE_SHIFT)
-#  define SIM_SOPT1_RAMSIZE_32KB      (5 << SIM_SOPT1_RAMSIZE_SHIFT) /* 32 KBytes */
-#  define SIM_SOPT1_RAMSIZE_64KB      (7 << SIM_SOPT1_RAMSIZE_SHIFT) /* 64 KBytes */
-#  define SIM_SOPT1_RAMSIZE_96KB      (8 << SIM_SOPT1_RAMSIZE_SHIFT) /* 96 KBytes */
-#  define SIM_SOPT1_RAMSIZE_128KB     (9 << SIM_SOPT1_RAMSIZE_SHIFT) /* 128 KBytes */
-                                                /* Bits 16-18: Reserved */
-#define SIM_SOPT1_OSC32KSEL           (1 << 19) /* Bit 19: 32K oscillator clock select */
-                                                /* Bits 20-22: Reserved */
-#define SIM_SOPT1_MS                  (1 << 23) /* Bit 23: EzPort chip select pin state */
-                                                /* Bits 24-29: Reserved */
-#define SIM_SOPT1_USBSTBY             (1 << 30) /* Bit 30: USB voltage regulator in standby mode */
-#define SIM_SOPT1_USBREGEN            (1 << 31) /* Bit 31: USB voltage regulator enable */
-
-/* System Options Register 2 */
-
-#define SIM_SOPT2_MCGCLKSEL           (1 << 0)  /* Bit 0:  MCG clock select */
-                                                /* Bits 1-7: Reserved */
-#define SIM_SOPT2_FBSL_SHIFT          (8)       /* Bits 8-9: FlexBus security level */
-#define SIM_SOPT2_FBSL_MASK           (3 << SIM_SOPT2_FBSL_SHIFT)
-#  define SIM_SOPT2_FBSL_NONE         (0 << SIM_SOPT2_FBSL_SHIFT) /* All off-chip accesses disallowed */
-#  define SIM_SOPT2_FBSL_DATA         (2 << SIM_SOPT2_FBSL_SHIFT) /* Off-chip data accesses are allowed */
-#  define SIM_SOPT2_FBSL_ALL          (3 << SIM_SOPT2_FBSL_SHIFT) /* All Off-chip accesses allowed */
-                                                /* Bit 10: Reserved */
-#define SIM_SOPT2_CMTUARTPAD          (1 << 11) /* Bit 11: CMT/UART pad drive strength */
-#define SIM_SOPT2_TRACECLKSEL         (1 << 12) /* Bit 12: Debug trace clock select */
-                                                /* Bits 13-15: Reserved */
-#define SIM_SOPT2_PLLFLLSEL           (1 << 16) /* Bit 16: PLL/FLL clock select */
-                                                /* Bit 17: Reserved */
-#define SIM_SOPT2_USBSRC              (1 << 18) /* Bit 18: USB clock source select */
-                                                /* Bit 19: Reserved */
-#ifdef KINETIS_K60
-#  define SIM_SOPT2_TIMESRC           (1 << 20) /* Bit 20: IEEE 1588 timestamp clock source select (K60) */
-#endif
-                                                /* Bits 12-23: Reserved */
-#define SIM_SOPT2_I2SSRC_SHIFT        (24)      /* Bits 24-25: I2S master clock source select */
-#define SIM_SOPT2_I2SSRC_MASK         (3 << SIM_SOPT2_I2SSRC_SHIFT)
-#  define SIM_SOPT2_I2SCSRC_CORE      (0 << SIM_SOPT2_I2SSRC_SHIFT) /* Core/system clock / I2S fractional divider*/
-#  define SIM_SOPT2_I2SCSRC_MCGCLK    (1 << SIM_SOPT2_I2SSRC_SHIFT) /* MCGPLLCLK/MCGFLLCLK clock/ I2S fractional divider */
-#  define SIM_SOPT2_I2SCSRC_OCSERCLK  (2 << SIM_SOPT2_I2SSRC_SHIFT) /* OSCERCLK clock */
-#  define SIM_SOPT2_I2SCSRC_EXTBYP    (3 << SIM_SOPT2_I2SSRC_SHIFT) /* External bypass clock (I2S0_CLKIN) */
-                                                /* Bits 26-27: Reserved */
-#define SIM_SOPT2_SDHCSRC_SHIFT       (28)      /* Bits 28-29: SDHC clock source select*/
-#define SIM_SOPT2_SDHCSRC_MASK        (3 << SIM_SOPT2_SDHCSRC_SHIFT)
-#  define SIM_SOPT2_SDHCSRC_CORE      (0 << SIM_SOPT2_SDHCSRC_SHIFT) /* Core/system clock */
-#  define SIM_SOPT2_SDHCSRC_MCGCLK    (1 << SIM_SOPT2_SDHCSRC_SHIFT) /* MCGPLLCLK/MCGFLLCLK clock */
-#  define SIM_SOPT2_SDHCSRC_OCSERCLK  (2 << SIM_SOPT2_SDHCSRC_SHIFT) /* OSCERCLK clock */
-#  define SIM_SOPT2_SDHCSRC_EXTBYP    (3 << SIM_SOPT2_SDHCSRC_SHIFT) /* External bypass clock (SDHC0_CLKIN) */                                                /* Bits 30-31: Reserved */
-
-/* System Options Register 4 */
-
-#define SIM_SOPT4_FTM0FLT0            (1 << 0)  /* Bit 0:  FTM0 Fault 0 Select */
-#define SIM_SOPT4_FTM0FLT1            (1 << 1)  /* Bit 1:  FTM0 Fault 1 Select */
-#define SIM_SOPT4_FTM0FLT2            (1 << 2)  /* Bit 2:  FTM0 Fault 2 Select */
-                                                /* Bit 3: Reserved */
-#define SIM_SOPT4_FTM1FLT0            (1 << 4)  /* Bit 4:  FTM1 Fault 0 Select */
-                                                /* Bits 5-7: Reserved */
-#define SIM_SOPT4_FTM2FLT0            (1 << 8)  /* Bit 8:  FTM2 Fault 0 Select */
-                                                /* Bits 9-17: Reserved */
-#define SIM_SOPT4_FTM1CH0SRC_SHIFT    (18)      /* Bits 18-19: FTM1 channel 0 input capture source select */
-#define SIM_SOPT4_FTM1CH0SRC_MASK     (3 << SIM_SOPT4_FTM1CH0SRC_SHIFT)
-#  define SIM_SOPT4_FTM1CH0SRC_CH0    (0 << SIM_SOPT4_FTM1CH0SRC_SHIFT) /* FTM1_CH0 signal */
-#  define SIM_SOPT4_FTM1CH0SRC_CMP0   (1 << SIM_SOPT4_FTM1CH0SRC_SHIFT) /* CMP0 output */
-#  define SIM_SOPT4_FTM1CH0SRC_CMP1   (2 << SIM_SOPT4_FTM1CH0SRC_SHIFT) /* CMP1 output */
-#define SIM_SOPT4_FTM2CH0SRC_SHIFT    (20)      /* Bits 20-21: FTM2 channel 0 input capture source select */
-#define SIM_SOPT4_FTM2CH0SRC_MASK     (3 << SIM_SOPT4_FTM2CH0SRC_SHIFT)
-#  define SIM_SOPT4_FTM2CH0SRC_CH0    (0 << SIM_SOPT4_FTM2CH0SRC_SHIFT) /* FTM2_CH0 signal */
-#  define SIM_SOPT4_FTM2CH0SRC_CMP0   (1 << SIM_SOPT4_FTM2CH0SRC_SHIFT) /* CMP0 output */
-#  define SIM_SOPT4_FTM2CH0SRC_CMP1   (2 << SIM_SOPT4_FTM2CH0SRC_SHIFT) /* CMP1 output */
-                                                /* Bits 22-23: Reserved */
-#define SIM_SOPT4_FTM0CLKSEL          (1 << 24) /* Bit 24:  FlexTimer 0 External Clock Pin Select */
-#define SIM_SOPT4_FTM1CLKSEL          (1 << 25) /* Bit 25:  FTM1 External Clock Pin Select */
-#define SIM_SOPT4_FTM2CLKSEL          (1 << 26) /* Bit 26:  FlexTimer 2 External Clock Pin Select */
-                                                /* Bits 27-31: Reserved */
-
-/* System Options Register 5 */
-
-#define SIM_SOPT5_UART0TXSRC_SHIFT    (0)       /* Bits 0-1: UART 0 transmit data source select */
-#define SIM_SOPT5_UART0TXSRC_MASK     (3 << SIM_SOPT5_UART0TXSRC_SHIFT)
-#  define SIM_SOPT5_UART0TXSRC_TX     (0 << SIM_SOPT5_UART0TXSRC_SHIFT) /* UART0_TX pin */
-#  define SIM_SOPT5_UART0TXSRC_FTM1   (1 << SIM_SOPT5_UART0TXSRC_SHIFT) /* UART0_TX modulated with FTM1 ch0 output */
-#  define SIM_SOPT5_UART0TXSRC_FTM2   (2 << SIM_SOPT5_UART0TXSRC_SHIFT) /* UART0_TX modulated with FTM2 ch0 output */
-#define SIM_SOPT5_UART0RXSRC_SHIFT    (2)       /* Bits 2-3: UART 0 receive data source select */
-#define SIM_SOPT5_UART0RXSRC_MASK     (3 << SIM_SOPT5_UART0RXSRC_SHIFT)
-#  define SIM_SOPT5_UART0RXSRC_RX     (0 << SIM_SOPT5_UART0RXSRC_SHIFT) /* UART0_RX pin */
-#  define SIM_SOPT5_UART0RXSRC_CMP0   (1 << SIM_SOPT5_UART0RXSRC_SHIFT) /* CMP0 */
-#  define SIM_SOPT5_UART0RXSRC_CMP1   (2 << SIM_SOPT5_UART0RXSRC_SHIFT) /* CMP1 */
-#define SIM_SOPT5_UART1TXSRC_SHIFT    (4)       /* Bits 4-5: UART 1 transmit data source select */
-#define SIM_SOPT5_UART1TXSRC_MASK     (3 << SIM_SOPT5_UART1TXSRC_SHIFT)
-#  define SIM_SOPT5_UART1TXSRC_TX     (0 << SIM_SOPT5_UART1TXSRC_SHIFT) /* UART1_TX pin */
-#  define SIM_SOPT5_UART1TXSRC_FTM1   (1 << SIM_SOPT5_UART1TXSRC_SHIFT) /* UART1_TX modulated with FTM1 ch0 output */
-#  define SIM_SOPT5_UART1TXSRC_FTM2   (2 << SIM_SOPT5_UART1TXSRC_SHIFT) /* UART1_TX modulated with FTM2 ch0 output */
-#define SIM_SOPT5_UART1RXSRC_SHIFT    (6)       /* Bits 6-7: UART 1 receive data source select */
-#define SIM_SOPT5_UART1RXSRC_MASK     (3 << SIM_SOPT5_UART1RXSRC_SHIFT)
-#  define SIM_SOPT5_UART1RXSRC_RX     (0 << SIM_SOPT5_UART1RXSRC_SHIFT) /* UART1_RX pin */
-#  define SIM_SOPT5_UART1RXSRC_CMP0   (1 << SIM_SOPT5_UART1RXSRC_SHIFT) /* CMP0 */
-#  define SIM_SOPT5_UART1RXSRC_CMP1   (2 << SIM_SOPT5_UART1RXSRC_SHIFT) /* CMP1 */
-                                                /* Bits 8-31: Reserved */
-/* System Options Register 6 */
-                                                /* Bits 0-23: Reserved */
-#define SIM_SOPT6_RSTFLTSEL_SHIFT     (24)      /* Bits 24-28: Reset pin filter select */
-#define SIM_SOPT6_RSTFLTSEL_MASK      (31 << SIM_SOPT6_RSTFLTSEL_SHIFT)
-#   define SIM_SOPT6_RSTFLTSEL(n)     (((n)-1) << SIM_SOPT6_RSTFLTSEL_SHIFT) /* Bux clock filter count n, n=1..32 */
-#define SIM_SOPT6_RSTFLTEN_SHIFT      (29)      /* Bits 29-31: Reset pin filter enable */
-#define SIM_SOPT6_RSTFLTEN_MASK       (7 << SIM_SOPT6_RSTFLTEN_SHIFT)
-#define SIM_SOPT6_RSTFLTEN_DISABLED   (0 << SIM_SOPT6_RSTFLTEN_SHIFT) /* All filtering disabled */
-#  define SIM_SOPT6_RSTFLTEN_BUSCLK1  (1 << SIM_SOPT6_RSTFLTEN_SHIFT) /* Bus clock filter enabled (normal); LPO clock filter enabled (stop) */
-#  define SIM_SOPT6_RSTFLTEN_LPO1     (2 << SIM_SOPT6_RSTFLTEN_SHIFT) /* LPO clock filter enabled */
-#  define SIM_SOPT6_RSTFLTEN_BUSCLK2  (3 << SIM_SOPT6_RSTFLTEN_SHIFT) /* Bus clock filter enabled (normal); All filtering disabled (stop) */
-#  define SIM_SOPT6_RSTFLTEN_LPO2     (4 << SIM_SOPT6_RSTFLTEN_SHIFT) /* PO clock filter enabled (normal); All filtering disabled (stop) */
-
-/* System Options Register 7 */
-
-#define SIM_SOPT7_ADC0TRGSEL_SHIFT    (0)       /* Bits 0-3: ADC0 trigger select */
-#define SIM_SOPT7_ADC0TRGSEL_MASK     (15 << SIM_SOPT7_ADC0TRGSEL_SHIFT)
-#  define SIM_SOPT7_ADC0TRGSEL_PDB    (0 << SIM_SOPT7_ADC0TRGSEL_SHIFT)  /* PDB external trigger (PDB0_EXTRG) */
-#  define SIM_SOPT7_ADC0TRGSEL_CMP0   (1 << SIM_SOPT7_ADC0TRGSEL_SHIFT)  /* High speed comparator 0 output */
-#  define SIM_SOPT7_ADC0TRGSEL_CMP1   (2 << SIM_SOPT7_ADC0TRGSEL_SHIFT)  /* High speed comparator 1 output */
-#  define SIM_SOPT7_ADC0TRGSEL_CMP2   (3 << SIM_SOPT7_ADC0TRGSEL_SHIFT)  /* High speed comparator 2 output */
-#  define SIM_SOPT7_ADC0TRGSEL_PIT0   (4 << SIM_SOPT7_ADC0TRGSEL_SHIFT)  /* PIT trigger 0 */
-#  define SIM_SOPT7_ADC0TRGSEL_PIT1   (5 << SIM_SOPT7_ADC0TRGSEL_SHIFT)  /* PIT trigger 1 */
-#  define SIM_SOPT7_ADC0TRGSEL_PIT2   (6 << SIM_SOPT7_ADC0TRGSEL_SHIFT)  /* PIT trigger 2 */
-#  define SIM_SOPT7_ADC0TRGSEL_PIT3   (7 << SIM_SOPT7_ADC0TRGSEL_SHIFT)  /* PIT trigger 3 */
-#  define SIM_SOPT7_ADC0TRGSEL_FTM0   (8 << SIM_SOPT7_ADC0TRGSEL_SHIFT)  /* FTM0 trigger */
-#  define SIM_SOPT7_ADC0TRGSEL_FTM1   (9 << SIM_SOPT7_ADC0TRGSEL_SHIFT)  /* FTM1 trigger */
-#  define SIM_SOPT7_ADC0TRGSEL_FTM2   (10 << SIM_SOPT7_ADC0TRGSEL_SHIFT) /* FTM2 trigger */
-#  define SIM_SOPT7_ADC0TRGSEL_ALARM  (12 << SIM_SOPT7_ADC0TRGSEL_SHIFT) /* RTC alarm */
-#  define SIM_SOPT7_ADC0TRGSEL_SECS   (13 << SIM_SOPT7_ADC0TRGSEL_SHIFT) /* RTC seconds */
-#  define SIM_SOPT7_ADC0TRGSEL_LPTMR  (14 << SIM_SOPT7_ADC0TRGSEL_SHIFT) /* Low-power timer trigger */
-#define SIM_SOPT7_ADC0PRETRGSEL       (1 << 4)  /* Bit 4:  ADC0 pretrigger select */
-                                                /* Bits 5-6: Reserved */
-#define SIM_SOPT7_ADC0ALTTRGEN        (1 << 7)  /* Bit 7:  ADC0 alternate trigger enable */
-#define SIM_SOPT7_ADC1TRGSEL_SHIFT    (8)       /* Bits 8-11: ADC1 trigger select */
-#define SIM_SOPT7_ADC1TRGSEL_MASK     (15 << SIM_SOPT7_ADC1TRGSEL_SHIFT)
-#  define SIM_SOPT7_ADC1TRGSEL_PDB    (0 << SIM_SOPT7_ADC1TRGSEL_SHIFT)  /* PDB external trigger (PDB0_EXTRG) */
-#  define SIM_SOPT7_ADC1TRGSEL_CMP0   (1 << SIM_SOPT7_ADC1TRGSEL_SHIFT)  /* High speed comparator 0 output */
-#  define SIM_SOPT7_ADC1TRGSEL_CMP1   (2 << SIM_SOPT7_ADC1TRGSEL_SHIFT)  /* High speed comparator 1 output */
-#  define SIM_SOPT7_ADC1TRGSEL_CMP2   (3 << SIM_SOPT7_ADC1TRGSEL_SHIFT)  /* High speed comparator 2 output */
-#  define SIM_SOPT7_ADC1TRGSEL_PIT0   (4 << SIM_SOPT7_ADC1TRGSEL_SHIFT)  /* PIT trigger 0 */
-#  define SIM_SOPT7_ADC1TRGSEL_PIT1   (5 << SIM_SOPT7_ADC1TRGSEL_SHIFT)  /* PIT trigger 1 */
-#  define SIM_SOPT7_ADC1TRGSEL_PIT2   (6 << SIM_SOPT7_ADC1TRGSEL_SHIFT)  /* PIT trigger 2 */
-#  define SIM_SOPT7_ADC1TRGSEL_PIT3   (7 << SIM_SOPT7_ADC1TRGSEL_SHIFT)  /* PIT trigger 3 */
-#  define SIM_SOPT7_ADC1TRGSEL_FTM0   (8 << SIM_SOPT7_ADC1TRGSEL_SHIFT)  /* FTM0 trigger */
-#  define SIM_SOPT7_ADC1TRGSEL_FTM1   (9 << SIM_SOPT7_ADC1TRGSEL_SHIFT)  /* FTM1 trigger */
-#  define SIM_SOPT7_ADC1TRGSEL_FTM2   (10 << SIM_SOPT7_ADC1TRGSEL_SHIFT) /* FTM2 trigger */
-#  define SIM_SOPT7_ADC1TRGSEL_ALARM  (12 << SIM_SOPT7_ADC1TRGSEL_SHIFT) /* RTC alarm */
-#  define SIM_SOPT7_ADC1TRGSEL_SECS   (13 << SIM_SOPT7_ADC1TRGSEL_SHIFT) /* RTC seconds */
-#  define SIM_SOPT7_ADC1TRGSEL_LPTMR  (14 << SIM_SOPT7_ADC1TRGSEL_SHIFT) /* Low-power timer trigger */
-#define SIM_SOPT7_ADC1PRETRGSEL       (1 << 12) /* Bit 12: ADC1 pre-trigger select */
-                                                /* Bits 13-14: Reserved */
-#define SIM_SOPT7_ADC1ALTTRGEN        (1 << 15) /* Bit 15: ADC1 alternate trigger enable */
-                                                /* Bits 16-31: Reserved */
-/* System Device Identification Register */
-
-#define SIM_SDID_PINID_SHIFT          (0)       /* Bits 0-3: Pincount identification */
-#define SIM_SDID_PINID_MASK           (15 << SIM_SDID_PINID_SHIFT)
-#  define SIM_SDID_PINID_32PIN        (2 << SIM_SDID_PINID_SHIFT)  /* 32-pin */
-#  define SIM_SDID_PINID_48PIN        (4 << SIM_SDID_PINID_SHIFT)  /* 48-pin */
-#  define SIM_SDID_PINID_64PIN        (5 << SIM_SDID_PINID_SHIFT)  /* 64-pin */
-#  define SIM_SDID_PINID_80PIN        (6 << SIM_SDID_PINID_SHIFT)  /* 80-pin */
-#  define SIM_SDID_PINID_81PIN        (7 << SIM_SDID_PINID_SHIFT)  /* 81-pin */
-#  define SIM_SDID_PINID_100PIN       (8 << SIM_SDID_PINID_SHIFT)  /* 100-pin */
-#  define SIM_SDID_PINID_121PIN       (9 << SIM_SDID_PINID_SHIFT)  /* 121-pin */
-#  define SIM_SDID_PINID_144PIN       (10 << SIM_SDID_PINID_SHIFT) /* 144-pin */
-#  define SIM_SDID_PINID_196PIN       (12 << SIM_SDID_PINID_SHIFT) /* 196-pin */
-#  define SIM_SDID_PINID_256PIN       (14 << SIM_SDID_PINID_SHIFT) /* 256-pin */
-#define SIM_SDID_FAMID_SHIFT          (4)       /* Bits 4-6: Kinetis family identification */
-#define SIM_SDID_FAMID_MASK           (7 << SIM_SDID_FAMID_SHIFT)
-#  define SIM_SDID_FAMID_K10          (0 << SIM_SDID_FAMID_SHIFT) /* K10 */
-#  define SIM_SDID_FAMID_K20          (1 << SIM_SDID_FAMID_SHIFT)) /* K20 */
-#  define SIM_SDID_FAMID_K30          (2 << SIM_SDID_FAMID_SHIFT)) /* K30 */
-#  define SIM_SDID_FAMID_K40          (3 << SIM_SDID_FAMID_SHIFT)) /* K40 */
-#  define SIM_SDID_FAMID_K60          (4 << SIM_SDID_FAMID_SHIFT)) /* K60 */
-#  define SIM_SDID_FAMID_K70          (5 << SIM_SDID_FAMID_SHIFT)) /* K70 */
-#  define SIM_SDID_FAMID_K50          (6 << SIM_SDID_FAMID_SHIFT)) /* K50 and K52 */
-#  define SIM_SDID_FAMID_K51          (7 << SIM_SDID_FAMID_SHIFT)) /* K51 and K53 */
-                                                /* Bits 7-11: Reserved */
-#define SIM_SDID_REVID_SHIFT          (12)      /* Bits 12-15: Device revision number */
-#define SIM_SDID_REVID_MASK           (15 << SIM_SDID_REVID_SHIFT)
-                                                /* Bits 16-31: Reserved */
-/* System Clock Gating Control Register 1 */
-                                                /* Bits 0-9: Reserved */
-#define SIM_SCGC1_UART4               (1 << 10) /* Bit 10: UART4 Clock Gate Control */
-#define SIM_SCGC1_UART5               (1 << 11) /* Bit 11: UART5 Clock Gate Control */
-                                                /* Bits 12-31: Reserved */
-/* System Clock Gating Control Register 2 */
-
-#if defined(KINETIS_NENET) && KINETIS_NENET > 0
-#  define SIM_SCGC2_ENET              (1 << 0)  /* Bit 0:  ENET Clock Gate Control (K60) */
-#endif
-                                                /* Bits 1-11: Reserved */
-#define SIM_SCGC2_DAC0                (1 << 12) /* Bit 12: DAC0 Clock Gate Control */
-#define SIM_SCGC2_DAC1                (1 << 13) /* Bit 13: DAC1 Clock Gate Control */
-                                                /* Bits 14-31: Reserved */
-/* System Clock Gating Control Register 3 */
-
-#if defined(KINETIS_NRNG) && KINETIS_NRNG > 0
-#  define SIM_SCGC3_RNGB              (1 << 0)  /* Bit 0:  RNGB Clock Gate Control (K60) */
-#endif
-                                                /* Bits 1-3: Reserved */
-#define SIM_SCGC3_FLEXCAN1            (1 << 4)  /* Bit 4:  FlexCAN1 Clock Gate Control */
-                                                /* Bits 5-11: Reserved */
-#define SIM_SCGC3_SPI2                (1 << 12) /* Bit 12: SPI2 Clock Gate Control */
-                                                /* Bits 13-16: Reserved */
-#define SIM_SCGC3_SDHC                (1 << 17) /* Bit 17: SDHC Clock Gate Control */
-                                                /* Bits 18-23: Reserved */
-#define SIM_SCGC3_FTM2                (1 << 24) /* Bit 24: FTM2 Clock Gate Control */
-                                                /* Bits 25-26: Reserved */
-#define SIM_SCGC3_ADC1                (1 << 27) /* Bit 27: ADC1 Clock Gate Control */
-                                                /* Bits 28-29: Reserved */
-#if defined(KINETIS_NSLCD) && KINETIS_NSLCD > 0
-#  define SIM_SCGC3_SLCD              (1 << 30) /* Bit 30: Segment LCD Clock Gate Control (K40) */
-#endif
-                                                /* Bit 31: Reserved */
-/* System Clock Gating Control Register 4 */
-                                                /* Bit 0:  Reserved */
-#define SIM_SCGC4_EWM                 (1 << 1)  /* Bit 1:  EWM Clock Gate Control */
-#define SIM_SCGC4_CMT                 (1 << 2)  /* Bit 2:  CMT Clock Gate Control */
-                                                /* Bits 3-5: Reserved */
-#define SIM_SCGC4_I2C0                (1 << 6)  /* Bit 6:  I2C0 Clock Gate Control */
-#define SIM_SCGC4_I2C1                (1 << 7)  /* Bit 7:  I2C1 Clock Gate Control */
-                                                /* Bits 8-9: Reserved */
-#define SIM_SCGC4_UART0               (1 << 10) /* Bit 10: UART0 Clock Gate Control */
-#define SIM_SCGC4_UART1               (1 << 11) /* Bit 11: UART1 Clock Gate Control */
-#define SIM_SCGC4_UART2               (1 << 12) /* Bit 12: UART2 Clock Gate Control */
-#define SIM_SCGC4_UART3               (1 << 13) /* Bit 13: UART3 Clock Gate Control */
-                                                /* Bits 14-17: Reserved */
-#define SIM_SCGC4_USBOTG              (1 << 18) /* Bit 18: USB Clock Gate Control */
-#define SIM_SCGC4_CMP                 (1 << 19) /* Bit 19: Comparator Clock Gate Control */
-#define SIM_SCGC4_VREF                (1 << 20) /* Bit 20: VREF Clock Gate Control */
-                                                /* Bits 21-17: Reserved */
-#define SIM_SCGC4_LLWU                (1 << 28) /* Bit 28: LLWU Clock Gate Control */
-                                                /* Bits 29-31: Reserved */
-/* System Clock Gating Control Register 5 */
-
-#define SIM_SCGC5_LPTIMER             (1 << 0)  /* Bit 0:  Low Power Timer Clock Gate Control */
-#define SIM_SCGC5_REGFILE             (1 << 1)  /* Bit 1:  Register File Clock Gate Control */
-                                                /* Bits 2-4: Reserved */
-#define SIM_SCGC5_TSI                 (1 << 5)  /* Bit 5:  TSI Clock Gate Control */
-                                                /* Bits 6-8: Reserved */
-#define SIM_SCGC5_PORTA               (1 << 9)  /* Bit 9:  Port A Clock Gate Control */
-#define SIM_SCGC5_PORTB               (1 << 10) /* Bit 10: Port B Clock Gate Control */
-#define SIM_SCGC5_PORTC               (1 << 11) /* Bit 11: Port C Clock Gate Control */
-#define SIM_SCGC5_PORTD               (1 << 12) /* Bit 12: Port D Clock Gate Control */
-#define SIM_SCGC5_PORTE               (1 << 13) /* Bit 13: Port E Clock Gate Control */
-                                                /* Bits 14-31: Reserved */
-/* System Clock Gating Control Register 6 */
-
-#define SIM_SCGC6_FTFL                (1 << 0)  /* Bit 0:  Flash Memory Clock Gate Control */
-#define SIM_SCGC6_DMAMUX              (1 << 1)  /* Bit 1:  DMA Mux Clock Gate Control */
-                                                /* Bits 2-3: Reserved */
-#define SIM_SCGC6_FLEXCAN0            (1 << 4)  /* Bit 4:  FlexCAN0 Clock Gate Control */
-                                                /* Bits 5-11: Reserved */
-#define SIM_SCGC6_SPI0                (1 << 12) /* Bit 12: SPI0 Clock Gate Control */
-#define SIM_SCGC6_SPI1                (1 << 13) /* Bit 13: SPI1 Clock Gate Control */
-                                                /* Bit 14: Reserved */
-#define SIM_SCGC6_I2S                 (1 << 15) /* Bit 15: I2S Clock Gate Control */
-                                                /* Bits 16-17: Reserved */
-#define SIM_SCGC6_CRC                 (1 << 18) /* Bit 18: CRC Clock Gate Control */
-                                                /* Bits 19-20: Reserved */
-#define SIM_SCGC6_USBDCD              (1 << 21) /* Bit 21: USB DCD Clock Gate Control */
-#define SIM_SCGC6_PDB                 (1 << 22) /* Bit 22: PDB Clock Gate Control */
-#define SIM_SCGC6_PIT                 (1 << 23) /* Bit 23: PIT Clock Gate Control */
-#define SIM_SCGC6_FTM0                (1 << 24) /* Bit 24: FTM0 Clock Gate Control */
-#define SIM_SCGC6_FTM1                (1 << 25) /* Bit 25: FTM1 Clock Gate Control */
-                                                /* Bit 26: Reserved */
-#define SIM_SCGC6_ADC0                (1 << 27) /* Bit 27: ADC0 Clock Gate Control */
-                                                /* Bit 28: Reserved */
-#define SIM_SCGC6_RTC                 (1 << 29) /* Bit 29: RTC Clock Gate Control */
-                                                /* Bits 30-31: Reserved */
-/* System Clock Gating Control Register 7 */
-
-#define SIM_SCGC7_FLEXBUS             (1 << 0)  /* Bit 0:  FlexBus Clock Gate Control */
-#define SIM_SCGC7_DMA                 (1 << 1)  /* Bit 1:  DMA Clock Gate Control */
-#define SIM_SCGC7_MPU                 (1 << 2)  /* Bit 2:  MPU Clock Gate Control */
-                                                /* Bits 3-31: Reserved */
-/* System Clock Divider Register 1 */
-                                                /* Bits 0-15: Reserved */
-#define SIM_CLKDIV1_OUTDIV4_SHIFT     (16)      /* Bits 16-19: Clock 4 output divider value */
-#define SIM_CLKDIV1_OUTDIV4_MASK      (15 << SIM_CLKDIV1_OUTDIV4_SHIFT)
-#  define SIM_CLKDIV1_OUTDIV4(n)      (((n)-1) << SIM_CLKDIV1_OUTDIV4_SHIFT) /* Divide by n, n=1..16 */
-#  define SIM_CLKDIV1_OUTDIV4_1       (0 << SIM_CLKDIV1_OUTDIV4_SHIFT)  /* Divide by 1 */
-#  define SIM_CLKDIV1_OUTDIV4_2       (1 << SIM_CLKDIV1_OUTDIV4_SHIFT)  /* Divide by 2 */
-#  define SIM_CLKDIV1_OUTDIV4_3       (2 << SIM_CLKDIV1_OUTDIV4_SHIFT)  /* Divide by 3 */
-#  define SIM_CLKDIV1_OUTDIV4_4       (3 << SIM_CLKDIV1_OUTDIV4_SHIFT)  /* Divide by 4 */
-#  define SIM_CLKDIV1_OUTDIV4_5       (4 << SIM_CLKDIV1_OUTDIV4_SHIFT)  /* Divide by 5 */
-#  define SIM_CLKDIV1_OUTDIV4_6       (5 << SIM_CLKDIV1_OUTDIV4_SHIFT)  /* Divide by 6 */
-#  define SIM_CLKDIV1_OUTDIV4_7       (6 << SIM_CLKDIV1_OUTDIV4_SHIFT)  /* Divide by 7 */
-#  define SIM_CLKDIV1_OUTDIV4_8       (7 << SIM_CLKDIV1_OUTDIV4_SHIFT)  /* Divide by 8 */
-#  define SIM_CLKDIV1_OUTDIV4_9       (8 << SIM_CLKDIV1_OUTDIV4_SHIFT)  /* Divide by 9 */
-#  define SIM_CLKDIV1_OUTDIV4_10      (9 << SIM_CLKDIV1_OUTDIV4_SHIFT)  /* Divide by 10 */
-#  define SIM_CLKDIV1_OUTDIV4_11      (10 << SIM_CLKDIV1_OUTDIV4_SHIFT) /* Divide by 11 */
-#  define SIM_CLKDIV1_OUTDIV4_12      (11 << SIM_CLKDIV1_OUTDIV4_SHIFT) /* Divide by 12 */
-#  define SIM_CLKDIV1_OUTDIV4_13      (12 << SIM_CLKDIV1_OUTDIV4_SHIFT) /* Divide by 13 */
-#  define SIM_CLKDIV1_OUTDIV4_14      (13 << SIM_CLKDIV1_OUTDIV4_SHIFT) /* Divide by 14 */
-#  define SIM_CLKDIV1_OUTDIV4_15      (14 << SIM_CLKDIV1_OUTDIV4_SHIFT) /* Divide by 15 */
-#  define SIM_CLKDIV1_OUTDIV4_16      (15 << SIM_CLKDIV1_OUTDIV4_SHIFT) /* Divide by 16 */
-#define SIM_CLKDIV1_OUTDIV3_SHIFT     (20)      /* Bits 20-23: Clock 3 output divider value */
-#define SIM_CLKDIV1_OUTDIV3_MASK      (15 << SIM_CLKDIV1_OUTDIV3_SHIFT)
-#  define SIM_CLKDIV1_OUTDIV3(n)      (((n)-1) << SIM_CLKDIV1_OUTDIV3_SHIFT) /* Divide by n, n=1..16 */
-#  define SIM_CLKDIV1_OUTDIV3_1       (0 << SIM_CLKDIV1_OUTDIV3_SHIFT)  /* Divide by 1 */
-#  define SIM_CLKDIV1_OUTDIV3_2       (1 << SIM_CLKDIV1_OUTDIV3_SHIFT)  /* Divide by 2 */
-#  define SIM_CLKDIV1_OUTDIV3_3       (2 << SIM_CLKDIV1_OUTDIV3_SHIFT)  /* Divide by 3 */
-#  define SIM_CLKDIV1_OUTDIV3_4       (3 << SIM_CLKDIV1_OUTDIV3_SHIFT)  /* Divide by 4 */
-#  define SIM_CLKDIV1_OUTDIV3_5       (4 << SIM_CLKDIV1_OUTDIV3_SHIFT)  /* Divide by 5 */
-#  define SIM_CLKDIV1_OUTDIV3_6       (5 << SIM_CLKDIV1_OUTDIV3_SHIFT)  /* Divide by 6 */
-#  define SIM_CLKDIV1_OUTDIV3_7       (6 << SIM_CLKDIV1_OUTDIV3_SHIFT)  /* Divide by 7 */
-#  define SIM_CLKDIV1_OUTDIV3_8       (7 << SIM_CLKDIV1_OUTDIV3_SHIFT)  /* Divide by 8 */
-#  define SIM_CLKDIV1_OUTDIV3_9       (8 << SIM_CLKDIV1_OUTDIV3_SHIFT)  /* Divide by 9 */
-#  define SIM_CLKDIV1_OUTDIV3_10      (9 << SIM_CLKDIV1_OUTDIV3_SHIFT)  /* Divide by 10 */
-#  define SIM_CLKDIV1_OUTDIV3_11      (10 << SIM_CLKDIV1_OUTDIV3_SHIFT) /* Divide by 11 */
-#  define SIM_CLKDIV1_OUTDIV3_12      (11 << SIM_CLKDIV1_OUTDIV3_SHIFT) /* Divide by 12 */
-#  define SIM_CLKDIV1_OUTDIV3_13      (12 << SIM_CLKDIV1_OUTDIV3_SHIFT) /* Divide by 13 */
-#  define SIM_CLKDIV1_OUTDIV3_14      (13 << SIM_CLKDIV1_OUTDIV3_SHIFT) /* Divide by 14 */
-#  define SIM_CLKDIV1_OUTDIV3_15      (14 << SIM_CLKDIV1_OUTDIV3_SHIFT) /* Divide by 15 */
-#  define SIM_CLKDIV1_OUTDIV3_16      (15 << SIM_CLKDIV1_OUTDIV3_SHIFT) /* Divide by 16 */
-#define SIM_CLKDIV1_OUTDIV2_SHIFT     (24)      /* Bits 24-27: Clock 2 output divider value */
-#define SIM_CLKDIV1_OUTDIV2_MASK      (15 << SIM_CLKDIV1_OUTDIV2_SHIFT)
-#  define SIM_CLKDIV1_OUTDIV2(n)      (((n)-1) << SIM_CLKDIV1_OUTDIV2_SHIFT) /* Divide by n, n=1..16 */
-#  define SIM_CLKDIV1_OUTDIV2_1       (0 << SIM_CLKDIV1_OUTDIV2_SHIFT)  /* Divide by 1 */
-#  define SIM_CLKDIV1_OUTDIV2_2       (1 << SIM_CLKDIV1_OUTDIV2_SHIFT)  /* Divide by 2 */
-#  define SIM_CLKDIV1_OUTDIV2_3       (2 << SIM_CLKDIV1_OUTDIV2_SHIFT)  /* Divide by 3 */
-#  define SIM_CLKDIV1_OUTDIV2_4       (3 << SIM_CLKDIV1_OUTDIV2_SHIFT)  /* Divide by 4 */
-#  define SIM_CLKDIV1_OUTDIV2_5       (4 << SIM_CLKDIV1_OUTDIV2_SHIFT)  /* Divide by 5 */
-#  define SIM_CLKDIV1_OUTDIV2_6       (5 << SIM_CLKDIV1_OUTDIV2_SHIFT)  /* Divide by 6 */
-#  define SIM_CLKDIV1_OUTDIV2_7       (6 << SIM_CLKDIV1_OUTDIV2_SHIFT)  /* Divide by 7 */
-#  define SIM_CLKDIV1_OUTDIV2_8       (7 << SIM_CLKDIV1_OUTDIV2_SHIFT)  /* Divide by 8 */
-#  define SIM_CLKDIV1_OUTDIV2_9       (8 << SIM_CLKDIV1_OUTDIV2_SHIFT)  /* Divide by 9 */
-#  define SIM_CLKDIV1_OUTDIV2_10      (9 << SIM_CLKDIV1_OUTDIV2_SHIFT)  /* Divide by 10 */
-#  define SIM_CLKDIV1_OUTDIV2_11      (10 << SIM_CLKDIV1_OUTDIV2_SHIFT) /* Divide by 11 */
-#  define SIM_CLKDIV1_OUTDIV2_12      (11 << SIM_CLKDIV1_OUTDIV2_SHIFT) /* Divide by 12 */
-#  define SIM_CLKDIV1_OUTDIV2_13      (12 << SIM_CLKDIV1_OUTDIV2_SHIFT) /* Divide by 13 */
-#  define SIM_CLKDIV1_OUTDIV2_14      (13 << SIM_CLKDIV1_OUTDIV2_SHIFT) /* Divide by 14 */
-#  define SIM_CLKDIV1_OUTDIV2_15      (14 << SIM_CLKDIV1_OUTDIV2_SHIFT) /* Divide by 15 */
-#  define SIM_CLKDIV1_OUTDIV2_16      (15 << SIM_CLKDIV1_OUTDIV2_SHIFT) /* Divide by 16 */
-#define SIM_CLKDIV1_OUTDIV1_SHIFT     (28)      /* Bits 28-31: Clock 1 output divider value */
-#define SIM_CLKDIV1_OUTDIV1_MASK      (15 << SIM_CLKDIV1_OUTDIV1_SHIFT)
-#  define SIM_CLKDIV1_OUTDIV1(n)      (((n)-1) << SIM_CLKDIV1_OUTDIV1_SHIFT) /* Divide by n, n=1..16 */
-#  define SIM_CLKDIV1_OUTDIV1_1       (0 << SIM_CLKDIV1_OUTDIV1_SHIFT)  /* Divide by 1 */
-#  define SIM_CLKDIV1_OUTDIV1_2       (1 << SIM_CLKDIV1_OUTDIV1_SHIFT)  /* Divide by 2 */
-#  define SIM_CLKDIV1_OUTDIV1_3       (2 << SIM_CLKDIV1_OUTDIV1_SHIFT)  /* Divide by 3 */
-#  define SIM_CLKDIV1_OUTDIV1_4       (3 << SIM_CLKDIV1_OUTDIV1_SHIFT)  /* Divide by 4 */
-#  define SIM_CLKDIV1_OUTDIV1_5       (4 << SIM_CLKDIV1_OUTDIV1_SHIFT)  /* Divide by 5 */
-#  define SIM_CLKDIV1_OUTDIV1_6       (5 << SIM_CLKDIV1_OUTDIV1_SHIFT)  /* Divide by 6 */
-#  define SIM_CLKDIV1_OUTDIV1_7       (6 << SIM_CLKDIV1_OUTDIV1_SHIFT)  /* Divide by 7 */
-#  define SIM_CLKDIV1_OUTDIV1_8       (7 << SIM_CLKDIV1_OUTDIV1_SHIFT)  /* Divide by 8 */
-#  define SIM_CLKDIV1_OUTDIV1_9       (8 << SIM_CLKDIV1_OUTDIV1_SHIFT)  /* Divide by 9 */
-#  define SIM_CLKDIV1_OUTDIV1_10      (9 << SIM_CLKDIV1_OUTDIV1_SHIFT)  /* Divide by 10 */
-#  define SIM_CLKDIV1_OUTDIV1_11      (10 << SIM_CLKDIV1_OUTDIV1_SHIFT) /* Divide by 11 */
-#  define SIM_CLKDIV1_OUTDIV1_12      (11 << SIM_CLKDIV1_OUTDIV1_SHIFT) /* Divide by 12 */
-#  define SIM_CLKDIV1_OUTDIV1_13      (12 << SIM_CLKDIV1_OUTDIV1_SHIFT) /* Divide by 13 */
-#  define SIM_CLKDIV1_OUTDIV1_14      (13 << SIM_CLKDIV1_OUTDIV1_SHIFT) /* Divide by 14 */
-#  define SIM_CLKDIV1_OUTDIV1_15      (14 << SIM_CLKDIV1_OUTDIV1_SHIFT) /* Divide by 15 */
-#  define SIM_CLKDIV1_OUTDIV1_16      (15 << SIM_CLKDIV1_OUTDIV1_SHIFT) /* Divide by 16 */
-
-/* System Clock Divider Register 2 */
-
-#define SIM_CLKDIV2_USBFRAC           (1 << 0)  /* Bit 0:  USB clock divider fraction */
-#define SIM_CLKDIV2_USBDIV_SHIFT      (1)       /* Bits 1-3: USB clock divider divisor */
-#define SIM_CLKDIV2_USBDIV_MASK       (7 << SIM_CLKDIV2_USBDIV_SHIFT)
-                                                /* Bits 4-7: Reserved */
-#define SIM_CLKDIV2_I2SFRAC_SHIFT     (8)       /* Bits 8-15: I2S clock divider fraction */
-#define SIM_CLKDIV2_I2SFRAC_MASK      (0xff << SIM_CLKDIV2_I2SFRAC_SHIFT)
-                                                /* Bits 16-19: Reserved */
-#define SIM_CLKDIV2_I2SDIV_SHIFT      (20)      /* Bits 20-31: I2S clock divider value */
-#define SIM_CLKDIV2_I2SDIV_MASK       (0xfff << SIM_CLKDIV2_I2SDIV_SHIFT)
-
-/* Flash Configuration Register 1 */
-                                                /* Bits 0-7: Reserved */
-#define SIM_FCFG1_DEPART_SHIFT        (8)       /* Bits 8-11: FlexNVM partition */
-#define SIM_FCFG1_DEPART_MASK         (15 << SIM_FCFG1_DEPART_SHIFT)
-                                                /* Bits 12-15: Reserved */
-#define SIM_FCFG1_EESIZE_SHIFT        (16)      /* Bits 16-19: EEPROM size*/
-#define SIM_FCFG1_EESIZE_MASK         (15 << SIM_FCFG1_EESIZE_SHIFT)
-#  define SIM_FCFG1_EESIZE_4KB        (2 << SIM_FCFG1_EESIZE_SHIFT)  /* 4 KB */
-#  define SIM_FCFG1_EESIZE_2KB        (3 << SIM_FCFG1_EESIZE_SHIFT)  /* 2 KB */
-#  define SIM_FCFG1_EESIZE_1KB        (4 << SIM_FCFG1_EESIZE_SHIFT)  /* 1 KB */
-#  define SIM_FCFG1_EESIZE_512B       (5 << SIM_FCFG1_EESIZE_SHIFT)  /* 512 Bytes */
-#  define SIM_FCFG1_EESIZE_256B       (6 << SIM_FCFG1_EESIZE_SHIFT)  /* 256 Bytes */
-#  define SIM_FCFG1_EESIZE_128B       (7 << SIM_FCFG1_EESIZE_SHIFT)  /* 128 Bytes */
-#  define SIM_FCFG1_EESIZE_64B        (8 << SIM_FCFG1_EESIZE_SHIFT)  /* 64 Bytes */
-#  define SIM_FCFG1_EESIZE_32B        (9 << SIM_FCFG1_EESIZE_SHIFT)  /* 32 Bytes */
-#  define SIM_FCFG1_EESIZE_NONE       (15 << SIM_FCFG1_EESIZE_SHIFT) /* 0 Bytes */
-                                                /* Bits 20-23: Reserved */
-#ifdef KINETIS_K40
-#define SIM_FCFG1_PFSIZE_SHIFT        (24)      /* Bits 24-27: Program flash size (K40) */
-#define SIM_FCFG1_PFSIZE_MASK         (15 << SIM_FCFG1_PFSIZE_SHIFT)
-#  define SIM_FCFG1_PFSIZE_128KB      (7 << SIM_FCFG1_PFSIZE_SHIFT)  /* 128KB program flash, 4KB protection region */
-#  define SIM_FCFG1_PFSIZE_256KB      (9 << SIM_FCFG1_PFSIZE_SHIFT)  /* 256KB program flash, 8KB protection region */
-#  define SIM_FCFG1_PFSIZE_512KB      (11 << SIM_FCFG1_PFSIZE_SHIFT) /* 512KB program flash, 16KB protection region */
-#  define SIM_FCFG1_PFSIZE_512KB2     (15 << SIM_FCFG1_PFSIZE_SHIFT) /* 512KB program flash, 16KB protection region */
-#define SIM_FCFG1_NVMSIZE_SHIFT       (28)      /* Bits 28-31: FlexNVM size (K40)*/
-#define SIM_FCFG1_NVMSIZE_MASK        (15 << SIM_FCFG1_NVMSIZE_SHIFT)
-#  define SIM_FCFG1_NVMSIZE_NONE      (0 << SIM_FCFG1_NVMSIZE_SHIFT)  /*  0KB FlexNVM */
-#  define SIM_FCFG1_NVMSIZE_128KB     (7 << SIM_FCFG1_NVMSIZE_SHIFT)  /* 128KB FlexNVM, 16KB protection region */
-#  define SIM_FCFG1_NVMSIZE_256KB     (9 << SIM_FCFG1_NVMSIZE_SHIFT)  /* 256KB FlexNVM, 32KB protection region */
-#  define SIM_FCFG1_NVMSIZE_256KB2    (15 << SIM_FCFG1_NVMSIZE_SHIFT) /* 256KB FlexNVM, 32KB protection region */
-#endif
-
-#ifdef KINETIS_K60
-#define SIM_FCFG1_FSIZE_SHIFT         (24)      /* Bits 24-31: Flash size (K60)*/
-#define SIM_FCFG1_FSIZE_MASK          (0xff << SIM_FCFG1_FSIZE_SHIFT)
-#  define SIM_FCFG1_FSIZE_32KB        (2 << SIM_FCFG1_FSIZE_SHIFT)  /* 32KB program flash, 1KB protection region */
-#  define SIM_FCFG1_FSIZE_64KB        (4 << SIM_FCFG1_FSIZE_SHIFT)  /* 64KB program flash, 2KB protection region */
-#  define SIM_FCFG1_FSIZE_128KB       (6 << SIM_FCFG1_FSIZE_SHIFT)  /* 128KB program flash, 4KB protection region */
-#  define SIM_FCFG1_FSIZE_256KB       (8 << SIM_FCFG1_FSIZE_SHIFT)  /* 256KB program flash, 8KB protection region */
-#  define SIM_FCFG1_FSIZE_512KB       (12 << SIM_FCFG1_FSIZE_SHIFT) /* 512KB program flash, 16KB protection region */
-#endif
-
-/* Flash Configuration Register 2 */
-                                                /* Bits 0-15: Reserved */
-#define SIM_FCFG2_MAXADDR1_SHIFT      (16)      /* Bits 16-21: Max address block 1 */
-#define SIM_FCFG2_MAXADDR1_MASK       (nn << SIM_FCFG2_MAXADDR1_SHIFT)
-                                                /* Bit 22: Reserved */
-#define SIM_FCFG2_PFLSH               (1 << 23) /* Bit 23: Program flash */
-#define SIM_FCFG2_MAXADDR0_SHIFT      (24)      /* Bits 24-29: Max address block 0 */
-#define SIM_FCFG2_MAXADDR0_MASK       (nn << SIM_FCFG2_MAXADDR0_SHIFT)
-                                                /* Bit 30: Reserved */
-#define SIM_FCFG2_SWAPPFLSH           (1 << 31) /* Bit 31: Swap program flash */
-
-/* Unique Identification Register High. 32-bit Unique Identification. */
-/* Unique Identification Register Mid-High. 32-bit Unique Identification. */
-/* Unique Identification Register Mid Low. 32-bit Unique Identification. */
-/* Unique Identification Register Low. 32-bit Unique Identification. */
-
-/************************************************************************************
- * Public Types
- ************************************************************************************/
-
-/************************************************************************************
- * Public Data
- ************************************************************************************/
-
-/************************************************************************************
- * Public Functions
- ************************************************************************************/
-
-#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_SIM_H */
diff --git a/arch/arm/src/kinetis/kinetis_spi.h b/arch/arm/src/kinetis/kinetis_spi.h
new file mode 100644
index 0000000000000000000000000000000000000000..19ce126d1026ff623ddaef56bebc7d892844cc4b
--- /dev/null
+++ b/arch/arm/src/kinetis/kinetis_spi.h
@@ -0,0 +1,166 @@
+/****************************************************************************
+ * arch/arm/src/kinetis/kinetis_spi.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors:  David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_SPI_H
+#define __ARCH_ARM_SRC_KINETIS_KINETIS_SPI_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include "chip/kinetis_dspi.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+struct  spi_dev_s;
+enum    spi_dev_e;
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/************************************************************************************
+ * Name: kinetis_spibus_initialize
+ *
+ * Description:
+ *   Initialize the selected SPI bus
+ *
+ * Input Parameter:
+ *   bus number (for hardware that has mutiple SPI interfaces)
+ *
+ * Returned Value:
+ *   Valid SPI device structure reference on succcess; a NULL on failure
+ *
+ ************************************************************************************/
+
+FAR struct spi_dev_s *kinetis_spibus_initialize(int bus);
+
+/************************************************************************************
+ * Name:  kinetis_spi[n]select, kinetis_spi[n]status, and kinetis_spi[n]cmddata
+ *
+ * Description:
+ *   These external functions must be provided by board-specific logic.  They are
+ *   implementations of the select, status, and cmddata methods of the SPI interface
+ *   defined by struct spi_ops_s (see include/nuttx/spi/spi.h). All other methods
+ *   including kinetis_spibus_initialize()) are provided by common Kinetis logic.  To use
+ *   this common SPI logic on your board:
+ *
+ *   1. Provide logic in kinetis_boardinitialize() to configure SPI chip select
+ *      pins.
+ *   2. Provide kinetis_spi[n]select() and kinetis_spi[n]status() functions
+ *      in your board-specific logic.  These functions will perform chip selection
+ *      and status operations using GPIOs in the way your board is configured.
+ *   2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide
+ *      kinetis_spi[n]cmddata() functions in your board-specific logic.  These
+ *      functions will perform cmd/data selection operations using GPIOs in the way
+ *      your board is configured.
+ *   3. Add a call to kinetis_spibus_initialize() in your low level application
+ *      initialization logic
+ *   4. The handle returned by kinetis_spibus_initialize() may then be used to bind the
+ *      SPI driver to higher level logic (e.g., calling
+ *      mmcsd_spislotinitialize(), for example, will bind the SPI driver to
+ *      the SPI MMC/SD driver).
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_KINETIS_SPI0
+void  kinetis_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
+uint8_t kinetis_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
+#ifdef CONFIG_SPI_CMDDATA
+int kinetis_spi0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
+#endif
+#endif
+#ifdef CONFIG_KINETIS_SPI1
+void  kinetis_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
+uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
+#ifdef CONFIG_SPI_CMDDATA
+int kinetis_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
+#endif
+#endif
+#ifdef CONFIG_KINETIS_SPI2
+void  kinetis_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
+uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
+#ifdef CONFIG_SPI_CMDDATA
+int kinetis_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
+#endif
+#endif
+
+/****************************************************************************
+ * Name: ssp_flush
+ *
+ * Description:
+ *   Flush and discard any words left in the RX fifo.  This can be called
+ *   from spi[n]select after a device is deselected (if you worry about such
+ *   things).
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+#if defined(CONFIG_KINETIS_SPI0) || defined(CONFIG_KINETIS_SPI1) || defined(CONFIG_KINETIS_SPI2)
+struct spi_dev_s;
+void spi_flush(FAR struct spi_dev_s *dev);
+#endif
+
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_SPI_H */
diff --git a/arch/arm/src/kinetis/kinetis_start.c b/arch/arm/src/kinetis/kinetis_start.c
index f686e77915cedb8a48cf085dbec960fe039c2b26..6747ce24e88661cf1f4d3604f2da3fed69ee3389 100644
--- a/arch/arm/src/kinetis/kinetis_start.c
+++ b/arch/arm/src/kinetis/kinetis_start.c
@@ -51,12 +51,62 @@
 #include "up_internal.h"
 
 #include "kinetis.h"
-#include "kinetis_smc.h"
+#include "chip/kinetis_smc.h"
 #include "kinetis_userspace.h"
 
+#ifdef CONFIG_ARCH_FPU
+#  include "nvic.h"
+#endif
+
+/****************************************************************************
+ * Private Function prototypes
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_FPU
+static inline void kinetis_fpuconfig(void);
+#endif
+#ifdef CONFIG_STACK_COLORATION
+static void go_os_start(void *pv, unsigned int nbytes)
+  __attribute__ ((naked, no_instrument_function, noreturn));
+#endif
+
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+/* Memory Map ***************************************************************/
+/*
+ * 0x0000:0000 - Beginning of the internal FLASH.   Address of vectors.
+ *               Mapped as boot memory address 0x0000:0000 at reset.
+ * 0x07ff:ffff - End of flash region (assuming the max of 2MiB of FLASH).
+ * 0x1fff:0000 - Start of internal SRAM and start of .data (_sdata)
+ *             - End of .data (_edata) and start of .bss (_sbss)
+ *             - End of .bss (_ebss) and bottom of idle stack
+ *             - _ebss + CONFIG_IDLETHREAD_STACKSIZE = end of idle stack,
+ *               start of heap. NOTE that the ARM uses a decrement before
+ *               store stack so that the correct initial value is the end of
+ *               the stack + 4;
+ * 0x2002:ffff - End of internal SRAM and end of heap (a
+ */
+
+#define IDLE_STACK ((uintptr_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
+#define HEAP_BASE  ((uintptr_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE)
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* g_idle_topstack: _sbss is the start of the BSS region as defined by the
+ * linker script. _ebss lies at the end of the BSS region. The idle task
+ * stack starts at the end of BSS and is of size CONFIG_IDLETHREAD_STACKSIZE.
+ * The IDLE thread is the thread that the system boots on and, eventually,
+ * becomes the IDLE, do nothing task that runs only when there is nothing
+ * else to run.  The heap continues from there until the end of memory.
+ * g_idle_topstack is a read-only variable the provides this computed
+ * address.
+ */
+#if defined(CONFIG_ARMV7M_CMNVECTOR)
+const uintptr_t g_idle_topstack = HEAP_BASE;
+#endif
 
 /****************************************************************************
  * Private Data
@@ -70,6 +120,143 @@
  * Private Functions
  ****************************************************************************/
 
+
+#ifdef CONFIG_ARMV7M_STACKCHECK
+/* we need to get r10 set before we can allow instrumentation calls */
+
+void __start(void) __attribute__ ((no_instrument_function));
+#endif
+
+/****************************************************************************
+ * Name: kinetis_fpuconfig
+ *
+ * Description:
+ *   Configure the FPU.  Relative bit settings:
+ *
+ *     CPACR:  Enables access to CP10 and CP11
+ *     CONTROL.FPCA: Determines whether the FP extension is active in the
+ *       current context:
+ *     FPCCR.ASPEN:  Enables automatic FP state preservation, then the
+ *       processor sets this bit to 1 on successful completion of any FP
+ *       instruction.
+ *     FPCCR.LSPEN:  Enables lazy context save of FP state. When this is
+ *       done, the processor reserves space on the stack for the FP state,
+ *       but does not save that state information to the stack.
+ *
+ *  Software must not change the value of the ASPEN bit or LSPEN bit while either:
+ *   - the CPACR permits access to CP10 and CP11, that give access to the FP
+ *     extension, or
+ *   - the CONTROL.FPCA bit is set to 1
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_FPU
+#if defined(CONFIG_ARMV7M_CMNVECTOR) && !defined(CONFIG_ARMV7M_LAZYFPU)
+
+static inline void kinetis_fpuconfig(void)
+{
+  uint32_t regval;
+
+  /* Set CONTROL.FPCA so that we always get the extended context frame
+   * with the volatile FP registers stacked above the basic context.
+   */
+
+  regval = getcontrol();
+  regval |= (1 << 2);
+  setcontrol(regval);
+
+  /* Ensure that FPCCR.LSPEN is disabled, so that we don't have to contend
+   * with the lazy FP context save behaviour.  Clear FPCCR.ASPEN since we
+   * are going to turn on CONTROL.FPCA for all contexts.
+   */
+
+  regval = getreg32(NVIC_FPCCR);
+  regval &= ~((1 << 31) | (1 << 30));
+  putreg32(regval, NVIC_FPCCR);
+
+  /* Enable full access to CP10 and CP11 */
+
+  regval = getreg32(NVIC_CPACR);
+  regval |= ((3 << (2*10)) | (3 << (2*11)));
+  putreg32(regval, NVIC_CPACR);
+}
+
+#else
+
+static inline void kinetis_fpuconfig(void)
+{
+  uint32_t regval;
+
+  /* Clear CONTROL.FPCA so that we do not get the extended context frame
+   * with the volatile FP registers stacked in the saved context.
+   */
+
+  regval = getcontrol();
+  regval &= ~(1 << 2);
+  setcontrol(regval);
+
+  /* Ensure that FPCCR.LSPEN is disabled, so that we don't have to contend
+   * with the lazy FP context save behaviour.  Clear FPCCR.ASPEN since we
+   * are going to keep CONTROL.FPCA off for all contexts.
+   */
+
+  regval = getreg32(NVIC_FPCCR);
+  regval &= ~((1 << 31) | (1 << 30));
+  putreg32(regval, NVIC_FPCCR);
+
+  /* Enable full access to CP10 and CP11 */
+
+  regval = getreg32(NVIC_CPACR);
+  regval |= ((3 << (2*10)) | (3 << (2*11)));
+  putreg32(regval, NVIC_CPACR);
+}
+
+#endif
+
+#else
+#  define kinetis_fpuconfig()
+#endif
+
+/****************************************************************************
+ * Name: go_os_start
+ *
+ * Description:
+ *   Set the IDLE stack to the
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STACK_COLORATION
+static void go_os_start(void *pv, unsigned int nbytes)
+{
+  /* Set the IDLE stack to the stack coloration value then jump to
+   * os_start().  We take extreme care here because were currently
+   * executing on this stack.
+   *
+   * We want to avoid sneak stack access generated by the compiler.
+   */
+
+  __asm__ __volatile__
+  (
+    "\tmovs r1, r1, lsr #2\n"   /* R1 = nwords = nbytes >> 2 */
+    "\tbeq  2f\n"               /* (should not happen) */
+
+    "\tbic  r0, r0, #3\n"       /* R0 = Aligned stackptr */
+    "\tmovw r2, #0xbeef\n"      /* R2 = STACK_COLOR = 0xdeadbeef */
+    "\tmovt r2, #0xdead\n"
+
+    "1:\n"                      /* Top of the loop */
+    "\tsub  r1, r1, #1\n"       /* R1 nwords-- */
+    "\tcmp  r1, #0\n"           /* Check (nwords == 0) */
+    "\tstr  r2, [r0], #4\n"     /* Save stack color word, increment stackptr */
+    "\tbne  1b\n"               /* Bottom of the loop */
+
+    "2:\n"
+    "\tmov  r14, #0\n"          /* LR = return address (none) */
+    "\tb    os_start\n"         /* Branch to os_start */
+  );
+}
+#endif
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -87,6 +274,12 @@ void __start(void)
   const uint32_t *src;
   uint32_t *dest;
 
+#ifdef CONFIG_ARMV7M_STACKCHECK
+  /* Set the stack limit before we attempt to call any functions */
+
+  __asm__ volatile ("sub r10, sp, %0" : : "r" (CONFIG_IDLETHREAD_STACKSIZE - 64) : );
+#endif
+
   /* Disable the watchdog timer */
 
   kinetis_wddisable();
@@ -134,10 +327,10 @@ void __start(void)
    * can get debug output as soon as possible (This depends on clock
    * configuration).
    */
-
+  kinetis_fpuconfig();
   kinetis_lowsetup();
 #ifdef USE_EARLYSERIALINIT
-  up_earlyserialinit();
+  kinetis_earlyserialinit();
 #endif
 
   /* For the case of the separate user-/kernel-space build, perform whatever
@@ -156,8 +349,8 @@ void __start(void)
 
   /* Show reset status */
 
-  dbg("Reset status: %02x:%02x\n",
-      getreg8(KINETIS_SMC_SRSH), getreg8(KINETIS_SMC_SRSL));
+  _warn("Reset status: %02x:%02x\n",
+        getreg8(KINETIS_SMC_SRSH), getreg8(KINETIS_SMC_SRSL));
 
   /* Then start NuttX */
 
diff --git a/arch/arm/src/kinetis/kinetis_timerisr.c b/arch/arm/src/kinetis/kinetis_timerisr.c
index a418a5e82340105415d620e242a9b6f8235bc5b7..44f7e3e9be564ee3e1f46e0c0c7c68a17cb1deb6 100644
--- a/arch/arm/src/kinetis/kinetis_timerisr.c
+++ b/arch/arm/src/kinetis/kinetis_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/kinetis/kinetis_timerisr.c
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -78,19 +78,11 @@
 #endif
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  kinetis_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -98,7 +90,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int kinetis_timerisr(int irq, uint32_t *regs, FAR void *arg)
 {
   /* Process timer interrupt */
 
@@ -107,7 +99,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -115,7 +111,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t regval;
 
@@ -143,7 +139,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(KINETIS_IRQ_SYSTICK, (xcpt_t)up_timerisr);
+  (void)irq_attach(KINETIS_IRQ_SYSTICK, (xcpt_t)kinetis_timerisr, NULL);
 
   /* Enable SysTick interrupts */
 
diff --git a/arch/arm/src/kinetis/kinetis_uid.c b/arch/arm/src/kinetis/kinetis_uid.c
new file mode 100644
index 0000000000000000000000000000000000000000..954c667f4181f436a71553756716884e06e16c89
--- /dev/null
+++ b/arch/arm/src/kinetis/kinetis_uid.c
@@ -0,0 +1,70 @@
+/****************************************************************************
+ * arch/arm/src/kinetis/kinetis_uid.c
+ *
+ *   Copyright (C) 2016 Neil Hancock. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include "kinetis_uid.h"
+
+#ifdef CONFIG_BOARDCTL_UNIQUEID
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: kinetis_get_uniqueid
+ ****************************************************************************/
+
+void kinetis_get_uniqueid(uint8_t *uniqueid)
+{
+  uint32_t *unique_u32;
+  int i;
+
+  unique_u32 = (uint32_t *)uniqueid;
+
+  /* Copy into buffer LS first, which in the Kinetis is the highest memory */
+
+  for (i = 0; i < (KINETIS_UID_SIZE / sizeof(uint32_t)); i++)
+    {
+      unique_u32[i] = *((uint32_t*)(KINETIS_SIM_UIDL) - i);
+    }
+}
+
+#endif /* CONFIG_BOARDCTL_UNIQUEID */
diff --git a/arch/arm/src/kinetis/kinetis_uid.h b/arch/arm/src/kinetis/kinetis_uid.h
new file mode 100644
index 0000000000000000000000000000000000000000..29299da5822fdb4571a3b518242d38cc8ae76892
--- /dev/null
+++ b/arch/arm/src/kinetis/kinetis_uid.h
@@ -0,0 +1,56 @@
+/****************************************************************************
+ * arch/arm/src/kinetis/kinetis_uid.h
+ *
+ *   Copyright (C) 2016 Neil Hancock. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_UID_H
+#define __ARCH_ARM_SRC_KINETIS_UID_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define KINETIS_UID_SIZE 16
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+void kinetis_get_uniqueid(uint8_t *uniqueid);
+
+#endif /* __ARCH_ARM_SRC_KINETIS_UID_H */
diff --git a/arch/arm/src/kinetis/kinetis_usbdev.c b/arch/arm/src/kinetis/kinetis_usbdev.c
new file mode 100644
index 0000000000000000000000000000000000000000..c550fbd3252a60135ef66380f5b439bb8da65cb6
--- /dev/null
+++ b/arch/arm/src/kinetis/kinetis_usbdev.c
@@ -0,0 +1,4668 @@
+/****************************************************************************
+ * arch/arm/src/kinetis/kinetis_usbdev.c
+ *
+ *   Copyright (C) 2011-2014, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * References:
+ *   This file derives from the STM32 USB device driver with modifications
+ *   based on additional information from:
+ *
+ *   - "USB On-The-Go (OTG)", DS61126E, Microchip Technology Inc., 2009
+ *   - Sample code provided with the Sure Electronics PIC32 board
+ *     (which seems to have derived from Microchip PICDEM PIC18 code).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "up_arch.h"
+#include "kinetis.h"
+#include "kinetis_usbotg.h"
+#include "chip/kinetis_sim.h"
+#include "chip/kinetis_fmc.h"
+
+#if defined(CONFIG_USBDEV) && defined(CONFIG_KINETIS_USBOTG)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+#ifndef CONFIG_USBDEV_EP0_MAXSIZE
+#  define CONFIG_USBDEV_EP0_MAXSIZE 64
+#endif
+
+/* Extremely detailed register/BDT debug that you would normally never want
+ * enabled.
+ */
+
+#ifndef CONFIG_DEBUG_USB_INFO
+#  undef CONFIG_KHCI_USBDEV_REGDEBUG
+#  undef CONFIG_KHCI_USBDEV_BDTDEBUG
+#endif
+
+/* Disable this logic because it is buggy.  It works most of the time but
+ * has some lurking issues that keep this higher performance solution from
+ * being usable.
+ */
+
+#undef CONFIG_USBDEV_NOREADAHEAD      /* Makes no difference */
+
+#undef CONFIG_USBDEV_NOWRITEAHEAD
+#define CONFIG_USBDEV_NOWRITEAHEAD 1  /* Fixes some problems with IN transfers */
+
+/* Interrupts ***************************************************************/
+/* Initial interrupt sets */
+
+#ifdef CONFIG_USB_SOFINTS
+#  define USB_SOF_INTERRUPT USB_INT_SOFTOK
+#else
+#  define USB_SOF_INTERRUPT 0
+#endif
+
+#define ERROR_INTERRUPTS  (USB_ERRSTAT_PIDERR | USB_ERRSTAT_CRC5EOF |  \
+                           USB_ERRSTAT_CRC16 | USB_ERRSTAT_DFN8 | USB_ERRSTAT_BTOERR | \
+                           USB_ERRSTAT_BTSERR)
+
+#define NORMAL_INTERRUPTS (USB_INT_USBRST | USB_INT_ERROR | USB_SOF_INTERRUPT | \
+                           USB_INT_TOKDNE | USB_INT_SLEEP | USB_INT_STALL)
+
+/* Endpoints ****************************************************************/
+
+#define USB_STAT_ENDPT(n)     ((n) << USB_STAT_ENDP_SHIFT) /* Endpoint n, n=0..15 */
+
+#define USB_STAT_ODD_ODD      USB_STAT_ODD /* The last transaction was to the ODD BD bank */
+#define USB_STAT_ODD_EVEN     0            /* The last transaction was to the EVEN BD bank */
+
+#define USB_STAT_TX_IN        USB_STAT_TX  /* Last transaction was a transmit transfer (TX) */
+#define USB_STAT_TX_OUT       0            /* Last transaction was a receive transfer (RX) */
+
+#define KHCI_NENDPOINTS       (16)
+#define EP0                   (0)
+
+#define KHCI_ENDP_BIT(ep)     (1 << (ep))
+#define KHCI_ENDP_ALLSET      0xffff
+
+/* BDT Table Indexing.  The BDT is addressed in the hardware as follows:
+ *
+ *   Bits 9-31:  These come the BDT address bits written into the BDTP3,
+ *               BDTP2, and BDTP1 registers
+ *   Bits 5-8:   The endpoint number
+ *   Bit 4:      Direction:
+ *               1 = Transmit: SETUP/OUT for host, IN for function
+ *               0 = Receive: IN for host, SETUP/OUT for function
+ *   Bit 3:      PPBI, the ping point buffer index bit (0=EVEN, 1=ODD)
+ *   Bits 0-2:   Supports 8-byte BDT entries
+ */
+
+#define EP0_OUT_EVEN          (0)
+#define EP0_OUT_ODD           (1)
+#define EP0_IN_EVEN           (2)
+#define EP0_IN_ODD            (3)
+#define EP_OUT_EVEN(ep)       ((int)(ep) << 2)
+#define EP_OUT_ODD(ep)        (((int)(ep) << 2) + 1)
+#define EP_IN_EVEN(ep)        (((int)(ep) << 2) + 2)
+#define EP_IN_ODD(ep)         (((int)(ep) << 2) + 3)
+
+#define EP(ep,dir,pp)         (((int)(ep) << 2) + ((int)(dir) << 1) + (int)(pp))
+#define EP_DIR_OUT            0
+#define EP_DIR_IN             1
+#define EP_PP_EVEN            0
+#define EP_PP_ODD             1
+
+/* Packet sizes.  We use a fixed 64 max packet size for all endpoint types */
+
+#define KHCI_MAXPACKET_SHIFT  (6)
+#define KHCI_MAXPACKET_SIZE   (1 << (KHCI_MAXPACKET_SHIFT))
+
+#define KHCI_EP0MAXPACKET     KHCI_MAXPACKET_SIZE
+
+/* Endpoint register initialization parameters */
+
+#define KHCI_EP_CONTROL   (USB_ENDPT_EPHSHK | USB_ENDPT_EPTXEN | USB_ENDPT_EPRXEN)
+#define KHCI_EP_BULKIN    (USB_ENDPT_EPTXEN | USB_ENDPT_EPCTLDIS | USB_ENDPT_EPHSHK)
+#define KHCI_EP_BULKOUT   (USB_ENDPT_EPRXEN | USB_ENDPT_EPCTLDIS | USB_ENDPT_EPHSHK)
+#define KHCI_EP_INTIN     (USB_ENDPT_EPTXEN | USB_ENDPT_EPCTLDIS | USB_ENDPT_EPHSHK)
+#define KHCI_EP_INTOUT    (USB_ENDPT_EPRXEN | USB_ENDPT_EPCTLDIS | USB_ENDPT_EPHSHK)
+#define KHCI_EP_ISOCIN    (USB_ENDPT_EPTXEN | USB_ENDPT_EPCTLDIS)
+#define KHCI_EP_ISOCOUT   (USB_ENDPT_EPRXEN | USB_ENDPT_EPCTLDIS)
+
+/* USB-related masks */
+
+#define REQRECIPIENT_MASK (USB_REQ_TYPE_MASK | USB_REQ_RECIPIENT_MASK)
+
+/* Request queue operations *************************************************/
+
+#define khci_rqempty(q)   ((q)->head == NULL)
+#define khci_rqhead(q)    ((q)->head)
+#define khci_rqtail(q)    ((q)->tail)
+
+#define RESTART_DELAY     (150 * CLOCKS_PER_SEC / 1000)
+
+/* USB trace ****************************************************************/
+/* Trace error codes */
+
+#define KHCI_TRACEERR_ALLOCFAIL            0x0001
+#define KHCI_TRACEERR_BADCLEARFEATURE      0x0002
+#define KHCI_TRACEERR_BADDEVGETSTATUS      0x0003
+#define KHCI_TRACEERR_BADEPGETSTATUS       0x0004
+#define KHCI_TRACEERR_BADEPNO              0x0005
+#define KHCI_TRACEERR_BADEPTYPE            0x0006
+#define KHCI_TRACEERR_BADGETCONFIG         0x0007
+#define KHCI_TRACEERR_BADGETSETDESC        0x0008
+#define KHCI_TRACEERR_BADGETSTATUS         0x0009
+#define KHCI_TRACEERR_BADSETADDRESS        0x000a
+#define KHCI_TRACEERR_BADSETCONFIG         0x000b
+#define KHCI_TRACEERR_BADSETFEATURE        0x000c
+#define KHCI_TRACEERR_BINDFAILED           0x000d
+#define KHCI_TRACEERR_DISPATCHSTALL        0x000e
+#define KHCI_TRACEERR_DRIVER               0x000f
+#define KHCI_TRACEERR_DRIVERREGISTERED     0x0010
+#define KHCI_TRACEERR_EP0SETUPSTALLED      0x0011
+#define KHCI_TRACEERR_EPDISABLED           0x0012
+#define KHCI_TRACEERR_EPOUTNULLPACKET      0x0013
+#define KHCI_TRACEERR_EPRESERVE            0x0014
+#define KHCI_TRACEERR_INVALIDCTRLREQ       0x0015
+#define KHCI_TRACEERR_INVALIDPARMS         0x0016
+#define KHCI_TRACEERR_IRQREGISTRATION      0x0017
+#define KHCI_TRACEERR_NOTCONFIGURED        0x0018
+#define KHCI_TRACEERR_REQABORTED           0x0019
+#define KHCI_TRACEERR_INVALIDSTATE         0x001a
+
+/* Trace interrupt codes */
+
+#define KHCI_TRACEINTID_CLEARFEATURE       0x0001
+#define KHCI_TRACEINTID_DEVGETSTATUS       0x0002
+#define KHCI_TRACEINTID_DISPATCH           0x0003
+#define KHCI_TRACEINTID_EP0IN              0x0004
+#define KHCI_TRACEINTID_EP0INDONE          0x0005
+#define KHCI_TRACEINTID_EP0OUTDONE         0x0006
+#define KHCI_TRACEINTID_EP0SETUPDONE       0x0007
+#define KHCI_TRACEINTID_EP0SETUPSETADDRESS 0x0008
+#define KHCI_TRACEINTID_EP0ADDRESSSET      0x0009
+#define KHCI_TRACEINTID_EPGETSTATUS        0x000a
+#define KHCI_TRACEINTID_EPINDONE           0x000b
+#define KHCI_TRACEINTID_EPINQEMPTY         0x000c
+#define KHCI_TRACEINTID_EPOUTDONE          0x000d
+#define KHCI_TRACEINTID_EPOUTQEMPTY        0x000e
+#define KHCI_TRACEINTID_SOF                0x000f
+#define KHCI_TRACEINTID_GETCONFIG          0x0010
+#define KHCI_TRACEINTID_GETSETDESC         0x0011
+#define KHCI_TRACEINTID_GETSETIF           0x0012
+#define KHCI_TRACEINTID_GETSTATUS          0x0013
+#define KHCI_TRACEINTID_IFGETSTATUS        0x0014
+#define KHCI_TRACEINTID_TRNC               0x0015
+#define KHCI_TRACEINTID_TRNCS              0x0016
+#define KHCI_TRACEINTID_INTERRUPT          0x0017
+#define KHCI_TRACEINTID_NOSTDREQ           0x0018
+#define KHCI_TRACEINTID_RESET              0x0019
+#define KHCI_TRACEINTID_SETCONFIG          0x001a
+#define KHCI_TRACEINTID_SETFEATURE         0x001b
+#define KHCI_TRACEINTID_IDLE               0x001c
+#define KHCI_TRACEINTID_SYNCHFRAME         0x001d
+#define KHCI_TRACEINTID_WKUP               0x001e
+#define KHCI_TRACEINTID_T1MSEC             0x001f
+#define KHCI_TRACEINTID_OTGID              0x0020
+#define KHCI_TRACEINTID_STALL              0x0021
+#define KHCI_TRACEINTID_UERR               0x0022
+#define KHCI_TRACEINTID_SUSPENDED          0x0023
+#define KHCI_TRACEINTID_WAITRESET          0x0024
+
+#ifdef CONFIG_USBDEV_TRACE_STRINGS
+const struct trace_msg_t g_usb_trace_strings_intdecode[] =
+{
+  TRACE_STR(KHCI_TRACEINTID_CLEARFEATURE       ), /* 0x0001 */
+  TRACE_STR(KHCI_TRACEINTID_DEVGETSTATUS       ), /* 0x0002 */
+  TRACE_STR(KHCI_TRACEINTID_DISPATCH           ), /* 0x0003 */
+  TRACE_STR(KHCI_TRACEINTID_EP0IN              ), /* 0x0004 */
+  TRACE_STR(KHCI_TRACEINTID_EP0INDONE          ), /* 0x0005 */
+  TRACE_STR(KHCI_TRACEINTID_EP0OUTDONE         ), /* 0x0006 */
+  TRACE_STR(KHCI_TRACEINTID_EP0SETUPDONE       ), /* 0x0007 */
+  TRACE_STR(KHCI_TRACEINTID_EP0SETUPSETADDRESS ), /* 0x0008 */
+  TRACE_STR(KHCI_TRACEINTID_EP0ADDRESSSET      ), /* 0x0009 */
+  TRACE_STR(KHCI_TRACEINTID_EPGETSTATUS        ), /* 0x000a */
+  TRACE_STR(KHCI_TRACEINTID_EPINDONE           ), /* 0x000b */
+  TRACE_STR(KHCI_TRACEINTID_EPINQEMPTY         ), /* 0x000c */
+  TRACE_STR(KHCI_TRACEINTID_EPOUTDONE          ), /* 0x000d */
+  TRACE_STR(KHCI_TRACEINTID_EPOUTQEMPTY        ), /* 0x000e */
+  TRACE_STR(KHCI_TRACEINTID_SOF                ), /* 0x000f */
+  TRACE_STR(KHCI_TRACEINTID_GETCONFIG          ), /* 0x0010 */
+  TRACE_STR(KHCI_TRACEINTID_GETSETDESC         ), /* 0x0011 */
+  TRACE_STR(KHCI_TRACEINTID_GETSETIF           ), /* 0x0012 */
+  TRACE_STR(KHCI_TRACEINTID_GETSTATUS          ), /* 0x0013 */
+  TRACE_STR(KHCI_TRACEINTID_IFGETSTATUS        ), /* 0x0014 */
+  TRACE_STR(KHCI_TRACEINTID_TRNC               ), /* 0x0015 */
+  TRACE_STR(KHCI_TRACEINTID_TRNCS              ), /* 0x0016 */
+  TRACE_STR(KHCI_TRACEINTID_INTERRUPT          ), /* 0x0017 */
+  TRACE_STR(KHCI_TRACEINTID_NOSTDREQ           ), /* 0x0018 */
+  TRACE_STR(KHCI_TRACEINTID_RESET              ), /* 0x0019 */
+  TRACE_STR(KHCI_TRACEINTID_SETCONFIG          ), /* 0x001a */
+  TRACE_STR(KHCI_TRACEINTID_SETFEATURE         ), /* 0x001b */
+  TRACE_STR(KHCI_TRACEINTID_IDLE               ), /* 0x001c */
+  TRACE_STR(KHCI_TRACEINTID_SYNCHFRAME         ), /* 0x001d */
+  TRACE_STR(KHCI_TRACEINTID_WKUP               ), /* 0x001e */
+  TRACE_STR(KHCI_TRACEINTID_T1MSEC             ), /* 0x001f */
+  TRACE_STR(KHCI_TRACEINTID_OTGID              ), /* 0x0020 */
+  TRACE_STR(KHCI_TRACEINTID_STALL              ), /* 0x0021 */
+  TRACE_STR(KHCI_TRACEINTID_UERR               ), /* 0x0022 */
+  TRACE_STR(KHCI_TRACEINTID_SUSPENDED          ), /* 0x0023 */
+  TRACE_STR(KHCI_TRACEINTID_WAITRESET          ), /* 0x0024 */
+  TRACE_STR_END
+};
+#endif
+
+#ifdef CONFIG_USBDEV_TRACE_STRINGS
+const struct trace_msg_t g_usb_trace_strings_deverror[] =
+{
+  TRACE_STR(KHCI_TRACEERR_ALLOCFAIL            ), /* 0x0001 */
+  TRACE_STR(KHCI_TRACEERR_BADCLEARFEATURE      ), /* 0x0002 */
+  TRACE_STR(KHCI_TRACEERR_BADDEVGETSTATUS      ), /* 0x0003 */
+  TRACE_STR(KHCI_TRACEERR_BADEPGETSTATUS       ), /* 0x0004 */
+  TRACE_STR(KHCI_TRACEERR_BADEPNO              ), /* 0x0005 */
+  TRACE_STR(KHCI_TRACEERR_BADEPTYPE            ), /* 0x0006 */
+  TRACE_STR(KHCI_TRACEERR_BADGETCONFIG         ), /* 0x0007 */
+  TRACE_STR(KHCI_TRACEERR_BADGETSETDESC        ), /* 0x0008 */
+  TRACE_STR(KHCI_TRACEERR_BADGETSTATUS         ), /* 0x0009 */
+  TRACE_STR(KHCI_TRACEERR_BADSETADDRESS        ), /* 0x000a */
+  TRACE_STR(KHCI_TRACEERR_BADSETCONFIG         ), /* 0x000b */
+  TRACE_STR(KHCI_TRACEERR_BADSETFEATURE        ), /* 0x000c */
+  TRACE_STR(KHCI_TRACEERR_BINDFAILED           ), /* 0x000d */
+  TRACE_STR(KHCI_TRACEERR_DISPATCHSTALL        ), /* 0x000e */
+  TRACE_STR(KHCI_TRACEERR_DRIVER               ), /* 0x000f */
+  TRACE_STR(KHCI_TRACEERR_DRIVERREGISTERED     ), /* 0x0010 */
+  TRACE_STR(KHCI_TRACEERR_EP0SETUPSTALLED      ), /* 0x0011 */
+  TRACE_STR(KHCI_TRACEERR_EPDISABLED           ), /* 0x0012 */
+  TRACE_STR(KHCI_TRACEERR_EPOUTNULLPACKET      ), /* 0x0013 */
+  TRACE_STR(KHCI_TRACEERR_EPRESERVE            ), /* 0x0014 */
+  TRACE_STR(KHCI_TRACEERR_INVALIDCTRLREQ       ), /* 0x0015 */
+  TRACE_STR(KHCI_TRACEERR_INVALIDPARMS         ), /* 0x0016 */
+  TRACE_STR(KHCI_TRACEERR_IRQREGISTRATION      ), /* 0x0017 */
+  TRACE_STR(KHCI_TRACEERR_NOTCONFIGURED        ), /* 0x0018 */
+  TRACE_STR(KHCI_TRACEERR_REQABORTED           ), /* 0x0019 */
+  TRACE_STR(KHCI_TRACEERR_INVALIDSTATE         ), /* 0x001a */
+  TRACE_STR_END
+};
+#endif
+
+/* Misc Helper Macros *******************************************************/
+
+/* Ever-present MIN and MAX macros */
+
+#ifndef MIN
+#  define MIN(a,b) (a < b ? a : b)
+#endif
+
+#ifndef MAX
+#  define MAX(a,b) (a > b ? a : b)
+#endif
+
+/* Byte ordering in host-based values */
+
+#ifdef CONFIG_ENDIAN_BIG
+#  define LSB 1
+#  define MSB 0
+#else
+#  define LSB 0
+#  define MSB 1
+#endif
+
+/* Debug ********************************************************************/
+/* CONFIG_KHCI_USBDEV_REGDEBUG enables dumping of all low-level register
+ * access and BDT accesses.  Normally, this generates so much debug output
+ * that USB may not even be functional.
+ */
+
+#ifdef CONFIG_KHCI_USBDEV_REGDEBUG
+#  undef CONFIG_KHCI_USBDEV_BDTDEBUG
+#  define CONFIG_KHCI_USBDEV_BDTDEBUG 1
+#else
+#  define khci_getreg(addr)      getreg8(addr)
+#  define khci_putreg(val,addr)  putreg8(val,addr)
+#endif
+
+/* CONFIG_KHCI_USBDEV_BDTDEBUG dumps most BDT settings */
+
+#ifdef CONFIG_KHCI_USBDEV_BDTDEBUG
+#  define bdterr  uerr
+#  define bdtinfo uinfo
+#else
+#  define bdterr(x...)
+#  define bdtinfo(x...)
+#endif
+
+/****************************************************************************
+ * Private Type Definitions
+ ****************************************************************************/
+
+/* Overvall device state */
+
+enum khci_devstate_e
+{
+  DEVSTATE_DETACHED = 0,  /* Not connected to a host */
+  DEVSTATE_ATTACHED,      /* Connected to a host */
+  DEVSTATE_POWERED,       /* Powered */
+  DEVSTATE_DEFAULT,       /* Default state */
+  DEVSTATE_ADDRPENDING,   /* Waiting for an address */
+  DEVSTATE_ADDRESS,       /* Address received */
+  DEVSTATE_CONFIGURED,    /* Configuration received */
+};
+
+/* The various states of the control pipe */
+
+enum khci_ctrlstate_e
+{
+  CTRLSTATE_WAITSETUP = 0,  /* No request in progress, waiting for setup */
+  CTRLSTATE_RDREQUEST,      /* Read request (OUT) in progress */
+  CTRLSTATE_WRREQUEST,      /* Write request (IN) in progress */
+  CTRLSTATE_STALL,          /* EP0 stall requested */
+  CTRLSTATE_STALLED         /* EP0 is stalled */
+};
+
+union wb_u
+{
+  uint16_t w;
+  uint8_t  b[2];
+};
+
+/* A container for a request so that the request make be retained in a
+ * singly-linked list.
+ */
+
+struct khci_req_s
+{
+  struct usbdev_req_s req;             /* Standard USB request */
+#ifdef CONFIG_USBDEV_NOWRITEAHEAD
+  uint16_t inflight[1];                /* The number of bytes "in-flight" */
+#else
+  uint16_t inflight[2];                /* The number of bytes "in-flight" */
+#endif
+  struct khci_req_s *flink;            /* Supports a singly linked list */
+};
+
+/* This structure represents the 'head' of a singly linked list of requests */
+
+struct khci_queue_s
+{
+  struct khci_req_s *head;             /* Head of the request queue */
+  struct khci_req_s *tail;             /* Tail of the request queue */
+};
+
+/* This is the internal representation of an endpoint */
+
+struct khci_ep_s
+{
+  /* Common endpoint fields.  This must be the first thing defined in the
+   * structure so that it is possible to simply cast from struct usbdev_ep_s
+   * to struct khci_ep_s.
+   */
+
+  struct usbdev_ep_s ep;               /* Standard endpoint structure */
+
+  /* KHCI-specific fields */
+
+  struct khci_usbdev_s *dev;           /* Reference to private driver data */
+  struct khci_queue_s pend;            /* List of pending (inactive) requests for this endpoint */
+  struct khci_queue_s active;          /* List of active requests for this endpoint */
+  uint8_t stalled:1;                   /* true: Endpoint is stalled */
+  uint8_t halted:1;                    /* true: Endpoint feature halted */
+  uint8_t txnullpkt:1;                 /* Null packet needed at end of TX transfer */
+  uint8_t txdata1:1;                   /* Data0/1 of next TX transfer */
+  uint8_t rxdata1:1;                   /* Data0/1 of next RX transfer */
+  volatile struct usbotg_bdtentry_s *bdtin;  /* BDT entry for the IN transaction */
+  volatile struct usbotg_bdtentry_s *bdtout; /* BDT entry for the OUT transaction */
+};
+
+struct khci_usbdev_s
+{
+  /* Common device fields.  This must be the first thing defined in the
+   * structure so that it is possible to simply cast from struct usbdev_s
+   * to structkhci_usbdev_s.
+   */
+
+  struct usbdev_s usbdev;
+
+  /* The bound device class driver */
+
+  struct usbdevclass_driver_s *driver;
+
+  /* KHCI-specific fields */
+
+  struct usb_ctrlreq_s  ctrl;          /* Last EP0 request */
+  uint8_t devstate;                    /* Driver state (see enum khci_devstate_e) */
+  uint8_t ctrlstate;                   /* Control EP state (see enum khci_ctrlstate_e) */
+  uint8_t selfpowered:1;               /* 1: Device is self powered */
+  uint8_t rwakeup:1;                   /* 1: Device supports remote wakeup */
+  uint8_t attached:1;                  /* Device is attached to the host */
+  uint8_t ep0done:1;                   /* EP0 OUT already prepared */
+  uint8_t rxbusy:1;                    /* EP0 OUT data transfer in progress */
+  uint16_t epavail;                    /* Bitset of available endpoints */
+  uint16_t epstalled;                  /* Bitset of stalled endpoints */
+  WDOG_ID wdog;                        /* Supports the restart delay */
+
+  /* The endpoint list */
+
+  struct khci_ep_s eplist[KHCI_NENDPOINTS];
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* Register operations ******************************************************/
+
+#ifdef CONFIG_KHCI_USBDEV_REGDEBUG
+static uint16_t khci_getreg(uint32_t addr);
+static void khci_putreg(uint32_t val, uint32_t addr);
+#endif
+
+/* Suspend/Resume Helpers ***************************************************/
+
+static void   khci_suspend(struct khci_usbdev_s *priv);
+static void   khci_resume(struct khci_usbdev_s *priv);
+
+/* Request Queue Management *************************************************/
+
+static struct khci_req_s *khci_remfirst(struct khci_queue_s *queue);
+static struct khci_req_s *khci_remlast(struct khci_queue_s *queue);
+static void   khci_addlast(struct khci_queue_s *queue,
+                struct khci_req_s *req);
+static void   khci_addfirst(struct khci_queue_s *queue,
+                struct khci_req_s *req);
+
+/* Request Helpers **********************************************************/
+
+static void   khci_reqreturn(struct khci_ep_s *privep,
+                struct khci_req_s *privreq, int16_t result);
+static void   khci_reqcomplete(struct khci_ep_s *privep,
+                int16_t result);
+static void   khci_epwrite(struct khci_ep_s *privep,
+                volatile struct usbotg_bdtentry_s *bdt,
+                const uint8_t *src, uint32_t nbytes);
+static void   khci_wrcomplete(struct khci_usbdev_s *priv,
+                struct khci_ep_s *privep);
+static void   khci_rqrestart(int argc, uint32_t arg1, ...);
+static void   khci_delayedrestart(struct khci_usbdev_s *priv,
+                uint8_t epno);
+static void   khci_rqstop(struct khci_ep_s *privep);
+static int    khci_wrstart(struct khci_usbdev_s *priv,
+                struct khci_ep_s *privep);
+static int    khci_wrrequest(struct khci_usbdev_s *priv,
+                struct khci_ep_s *privep);
+static int    khci_rdcomplete(struct khci_usbdev_s *priv,
+                struct khci_ep_s *privep);
+static int    khci_ep0rdsetup(struct khci_usbdev_s *priv,
+                uint8_t *dest, int readlen);
+static int    khci_rdsetup(struct khci_ep_s *privep, uint8_t *dest,
+                int readlen);
+static int    khci_rdrequest(struct khci_usbdev_s *priv,
+                struct khci_ep_s *privep);
+static void   khci_cancelrequests(struct khci_ep_s *privep,
+                int16_t result);
+
+/* Interrupt level processing ***********************************************/
+
+static void   khci_dispatchrequest(struct khci_usbdev_s *priv);
+static void   khci_ep0stall(struct khci_usbdev_s *priv);
+static void   khci_eptransfer(struct khci_usbdev_s *priv, uint8_t epno,
+                uint16_t ustat);
+static void   khci_ep0nextsetup(struct khci_usbdev_s *priv);
+static void   khci_ep0rdcomplete(struct khci_usbdev_s *priv);
+static void   khci_ep0setup(struct khci_usbdev_s *priv);
+static void   khci_ep0outcomplete(struct khci_usbdev_s *priv);
+static void   khci_ep0incomplete(struct khci_usbdev_s *priv);
+static void   khci_ep0transfer(struct khci_usbdev_s *priv,
+                uint16_t ustat);
+static int    khci_interrupt(int irq, void *context, FAR void *arg);
+
+/* Endpoint helpers *********************************************************/
+
+static inline struct khci_ep_s *
+              khci_epreserve(struct khci_usbdev_s *priv, uint8_t epset);
+static inline void
+              khci_epunreserve(struct khci_usbdev_s *priv,
+              struct khci_ep_s *privep);
+static inline bool
+              khci_epreserved(struct khci_usbdev_s *priv, int epno);
+static void  khci_ep0configure(struct khci_usbdev_s *priv);
+
+/* Endpoint operations ******************************************************/
+
+static int    khci_epconfigure(struct usbdev_ep_s *ep,
+                const struct usb_epdesc_s *desc, bool last);
+static int    khci_epdisable(struct usbdev_ep_s *ep);
+static struct usbdev_req_s *
+              khci_epallocreq(struct usbdev_ep_s *ep);
+static void   khci_epfreereq(struct usbdev_ep_s *ep,
+                struct usbdev_req_s *);
+static int    khci_epsubmit(struct usbdev_ep_s *ep,
+                struct usbdev_req_s *req);
+static int    khci_epcancel(struct usbdev_ep_s *ep,
+                struct usbdev_req_s *req);
+static int    khci_epbdtstall(struct usbdev_ep_s *ep, bool resume,
+                bool epin);
+static int    khci_epstall(struct usbdev_ep_s *ep, bool resume);
+
+/* USB device controller operations *****************************************/
+
+static struct usbdev_ep_s *
+              khci_allocep(struct usbdev_s *dev, uint8_t epno, bool in,
+                uint8_t eptype);
+static void   khci_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep);
+static int    khci_getframe(struct usbdev_s *dev);
+static int    khci_wakeup(struct usbdev_s *dev);
+static int    khci_selfpowered(struct usbdev_s *dev, bool selfpowered);
+
+/* Initialization/Reset *****************************************************/
+
+static void   khci_reset(struct khci_usbdev_s *priv);
+static void   khci_attach(struct khci_usbdev_s *priv);
+static void   khci_detach(struct khci_usbdev_s *priv);
+static void   khci_swreset(struct khci_usbdev_s *priv);
+static void   khci_hwreset(struct khci_usbdev_s *priv);
+static void   khci_stateinit(struct khci_usbdev_s *priv);
+static void   khci_hwshutdown(struct khci_usbdev_s *priv);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Since there is only a single USB interface, all status information can be
+ * be simply retained in a single global instance.
+ */
+
+static struct khci_usbdev_s g_usbdev;
+
+static const struct usbdev_epops_s g_epops =
+{
+  .configure   = khci_epconfigure,
+  .disable     = khci_epdisable,
+  .allocreq    = khci_epallocreq,
+  .freereq     = khci_epfreereq,
+  .submit      = khci_epsubmit,
+  .cancel      = khci_epcancel,
+  .stall       = khci_epstall,
+};
+
+static const struct usbdev_ops_s g_devops =
+{
+  .allocep     = khci_allocep,
+  .freeep      = khci_freeep,
+  .getframe    = khci_getframe,
+  .wakeup      = khci_wakeup,
+  .selfpowered = khci_selfpowered,
+  .pullup      = kinetis_usbpullup,
+};
+
+/* Buffer Descriptor Table.  Four BDT entries per endpoint
+ *
+ * The BDT is addressed in the hardware as follows:
+ *
+ *   Bits 9-31:  These come the BDT address bits written into the BDTP3, BDTP2
+ *      and BDTP1 registers
+ *   Bits 5-8:   The endpoint number
+ *   Bit 4:      Direction (0=IN/Tx, 1 = OUT/Rx)
+ *   Bit 3:      PPBI, the ping point buffer index bit.
+ *   Bits 0-2:   Supports 8-byte BDT entries
+ */
+
+static volatile struct usbotg_bdtentry_s g_bdt[4*KHCI_NENDPOINTS]
+  __attribute__ ((aligned(512)));
+
+/****************************************************************************
+ * Private Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Register Operations
+ ****************************************************************************/
+
+ /****************************************************************************
+ * Name: khci_getreg
+ ****************************************************************************/
+
+#ifdef CONFIG_KHCI_USBDEV_REGDEBUG
+static uint16_t khci_getreg(uint32_t addr)
+{
+  static uint32_t prevaddr = 0;
+  static uint32_t preval = 0;
+  static uint32_t count = 0;
+
+  /* Read the value from the register */
+
+  uint16_t val = getreg8(addr);
+
+  /* Is this the same value that we read from the same register last time?
+   * Are we polling the register?  If so, suppress some of the output.
+   */
+
+  if (addr == prevaddr && val == preval)
+    {
+      if (count == 0xffffffff || ++count > 3)
+        {
+           if (count == 4)
+             {
+               uinfo("...\n");
+             }
+          return val;
+        }
+    }
+
+  /* No this is a new address or value */
+
+  else
+    {
+       /* Did we print "..." for the previous value? */
+
+       if (count > 3)
+         {
+           /* Yes.. then show how many times the value repeated */
+
+           uinfo("[repeats %d more times]\n", count-3);
+         }
+
+       /* Save the new address, value, and count */
+
+       prevaddr = addr;
+       preval   = val;
+       count    = 1;
+    }
+
+  /* Show the register value read */
+
+  uinfo("%08x->%04x\n", addr, val);
+  return val;
+}
+#endif
+
+/****************************************************************************
+ * Name: khci_putreg
+ ****************************************************************************/
+
+#ifdef CONFIG_KHCI_USBDEV_REGDEBUG
+static void khci_putreg(uint32_t val, uint32_t addr)
+{
+  /* Show the register value being written */
+
+  uinfo("%08x<-%04x\n", addr, val);
+
+  /* Write the value */
+
+  putreg8(val, addr);
+}
+#endif
+
+/****************************************************************************
+ * Request Helpers
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: khci_remfirst
+ ****************************************************************************/
+
+static struct khci_req_s *khci_remfirst(struct khci_queue_s *queue)
+{
+  struct khci_req_s *ret = queue->head;
+
+  if (ret)
+    {
+      queue->head = ret->flink;
+      if (!queue->head)
+        {
+          queue->tail = NULL;
+        }
+
+      ret->flink = NULL;
+    }
+
+  return ret;
+}
+
+
+/****************************************************************************
+ * Name: khci_remlast
+ ****************************************************************************/
+
+static struct khci_req_s *khci_remlast(struct khci_queue_s *queue)
+{
+  struct khci_req_s *prev;
+  struct khci_req_s *ret = queue->tail;
+
+  ret = queue->tail;
+  if (ret)
+    {
+      if (queue->head == queue->tail)
+        {
+          queue->head = NULL;
+          queue->tail = NULL;
+        }
+      else
+        {
+          for (prev = queue->head;
+               prev && prev->flink != ret;
+               prev = prev->flink);
+
+          if (prev)
+            {
+              prev->flink = NULL;
+              queue->tail = prev;
+            }
+        }
+
+      ret->flink = NULL;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: khci_addlast
+ ****************************************************************************/
+
+static void khci_addlast(struct khci_queue_s *queue, struct khci_req_s *req)
+{
+  req->flink = NULL;
+  if (!queue->head)
+    {
+      queue->head = req;
+      queue->tail = req;
+    }
+  else
+    {
+      queue->tail->flink = req;
+      queue->tail        = req;
+    }
+}
+
+/****************************************************************************
+ * Name: khci_addfirst
+ ****************************************************************************/
+
+static void khci_addfirst(struct khci_queue_s *queue, struct khci_req_s *req)
+{
+  req->flink = queue->head;
+  if (!queue->head)
+    {
+      queue->tail = req;
+    }
+
+  queue->head = req;
+}
+
+/****************************************************************************
+ * Name: khci_reqreturn
+ ****************************************************************************/
+
+static void khci_reqreturn(struct khci_ep_s *privep,
+                              struct khci_req_s *privreq, int16_t result)
+{
+  /* If endpoint 0, temporarily reflect the state of protocol stalled
+   * in the callback.
+   */
+
+  bool stalled = privep->stalled;
+  if (USB_EPNO(privep->ep.eplog) == EP0)
+    {
+      privep->stalled = (privep->dev->ctrlstate == CTRLSTATE_STALLED);
+    }
+
+  /* Save the result in the request structure */
+
+  privreq->req.result = result;
+
+  /* Callback to the request completion handler */
+
+  privreq->flink = NULL;
+  privreq->req.callback(&privep->ep, &privreq->req);
+
+  /* Restore the stalled indication */
+
+  privep->stalled = stalled;
+}
+
+/****************************************************************************
+ * Name: khci_reqcomplete
+ ****************************************************************************/
+
+static void khci_reqcomplete(struct khci_ep_s *privep, int16_t result)
+{
+  struct khci_req_s *privreq;
+  irqstate_t flags;
+
+  /* Remove the completed request at the head of the endpoint's active
+   * request list.
+   */
+
+  flags = enter_critical_section();
+  privreq = khci_remfirst(&privep->active);
+  leave_critical_section(flags);
+
+  if (privreq)
+    {
+      /* Return the request to the class driver */
+
+      khci_reqreturn(privep, privreq, result);
+    }
+}
+
+/****************************************************************************
+ * Name: khci_epwrite
+ ****************************************************************************/
+
+static void khci_epwrite(struct khci_ep_s *privep,
+                            volatile struct usbotg_bdtentry_s *bdt,
+                            const uint8_t *src, uint32_t nbytes)
+{
+  uint32_t status;
+
+  usbtrace(TRACE_WRITE(USB_EPNO(privep->ep.eplog)), nbytes);
+
+  /* Clear all bits in the status (assuring that we own the BDT) */
+
+  bdt->status = 0;
+
+  /* Get the correct data toggle (as well as other BDT bits) */
+
+  if (privep->txdata1)
+    {
+      status          = (USB_BDT_UOWN | USB_BDT_DATA1 | USB_BDT_DTS);
+      privep->txdata1 = 0;
+    }
+  else
+    {
+      status          = (USB_BDT_UOWN | USB_BDT_DATA0 | USB_BDT_DTS);
+      privep->txdata1 = 1;
+    }
+
+  /* Set the data pointer and data length */
+
+  bdt->addr = (uint8_t *)src;
+  status   |= (nbytes << USB_BDT_BYTECOUNT_SHIFT) | USB_BDT_DTS;
+
+  /* And, finally, give the BDT to the USB */
+
+  bdtinfo("EP%d BDT IN [%p] {%08x, %08x}\n",
+          USB_EPNO(privep->ep.eplog), bdt, status, bdt->addr);
+
+  bdt->status = status;
+}
+
+/****************************************************************************
+ * Name: khci_wrcomplete
+ ****************************************************************************/
+
+static void khci_wrcomplete(struct khci_usbdev_s *priv,
+                               struct khci_ep_s *privep)
+{
+  volatile struct usbotg_bdtentry_s *bdtin;
+  struct khci_req_s *privreq;
+  int bytesleft;
+  int epno;
+
+  /* Check the request at the head of the endpoint's active request queue.
+   * Since we got here from a write completion event, the active request queue
+   * should not be empty.
+   */
+
+  privreq = khci_rqhead(&privep->active);
+  DEBUGASSERT(privreq != NULL);
+
+  /* An outgoing IN packet has completed.  bdtin should point to the BDT
+   * that just completed.
+   */
+
+  bdtin = privep->bdtin;
+  epno   = USB_EPNO(privep->ep.eplog);
+
+#ifdef CONFIG_USBDEV_NOWRITEAHEAD
+  uinfo("EP%d: len=%d xfrd=%d inflight=%d\n",
+        epno, privreq->req.len, privreq->req.xfrd, privreq->inflight[0]);
+#else
+  uinfo("EP%d: len=%d xfrd=%d inflight={%d, %d}\n",
+        epno, privreq->req.len, privreq->req.xfrd,
+        privreq->inflight[0], privreq->inflight[1]);
+#endif
+  bdtinfo("EP%d BDT IN [%p] {%08x, %08x}\n",
+        epno, bdtin, bdtin->status, bdtin->addr);
+
+  /* We should own the BDT that just completed. But NULLify the entire BDT IN.
+   * Why?  So that we can tell later that the BDT available.  No, it is not
+   * sufficient to look at the UOWN bit.  If UOWN==0, then the transfer has
+   * been completed BUT it may not yet have been processed.  But a completely
+   * NULLified BDT is a sure indication
+   */
+
+  DEBUGASSERT((bdtin->status & USB_BDT_UOWN) == USB_BDT_COWN);
+  bdtin->status = 0;
+  bdtin->addr   = 0;
+
+  /* Toggle bdtin to the other BDT.  Is the current bdtin the EVEN bdt? */
+
+  privep->bdtin = &g_bdt[EP_IN_EVEN(epno)];
+  if (bdtin == privep->bdtin)
+    {
+      /* Yes.. Then the other BDT is the ODD BDT */
+
+      privep->bdtin++;
+    }
+
+  /* Update the number of bytes transferred. */
+
+  privreq->req.xfrd   += privreq->inflight[0];
+#ifdef CONFIG_USBDEV_NOWRITEAHEAD
+  privreq->inflight[0] = 0;
+#else
+  privreq->inflight[0] = privreq->inflight[1];
+  privreq->inflight[1] = 0;
+#endif
+  bytesleft            = privreq->req.len - privreq->req.xfrd;
+
+  /* If all of the bytes were sent (bytesleft == 0) and no NULL packet is
+   * needed (!txnullpkt), then we are finished with the transfer
+   */
+
+  if (bytesleft == 0 && !privep->txnullpkt)
+    {
+      /* The transfer is complete.  Give the completed request back to
+       * the class driver.
+       */
+
+      usbtrace(TRACE_COMPLETE(USB_EPNO(privep->ep.eplog)), privreq->req.xfrd);
+      khci_reqcomplete(privep, OK);
+
+      /* Special case writes to endpoint zero.  If there is no transfer in
+       * progress, then we need to configure to received the next SETUP packet.
+       */
+
+      if (USB_EPNO(privep->ep.eplog) == 0)
+        {
+          priv->ctrlstate = CTRLSTATE_WAITSETUP;
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: khci_rqrestart
+ ****************************************************************************/
+
+static void khci_rqrestart(int argc, uint32_t arg1, ...)
+{
+  struct khci_usbdev_s *priv;
+  struct khci_ep_s *privep;
+  struct khci_req_s *privreq;
+  uint16_t epstalled;
+  uint16_t mask;
+  int epno;
+
+  /* Recover the pointer to the driver structure */
+
+  priv = (struct khci_usbdev_s *)((uintptr_t)arg1);
+  DEBUGASSERT(priv != NULL);
+
+  /* Sample and clear the set of endpoints that have recovered from a stall */
+
+  epstalled = priv->epstalled;
+  priv->epstalled = 0;
+
+  /* Loop, checking each bit in the epstalled bit set */
+
+  for (epno = 0; epstalled && epno < KHCI_NENDPOINTS; epno++)
+    {
+      /* Has this encpoint recovered from a stall? */
+
+      mask = (1 << epno);
+      if ((epstalled & mask) != 0)
+        {
+          /* Yes, this endpoint needs to be restarteed */
+
+          epstalled      &= ~mask;
+          privep          = &priv->eplist[epno];
+
+          /* Reset some endpoint state variables */
+
+          privep->stalled   = false;
+          privep->txnullpkt = false;
+
+          /* Check the request at the head of the endpoint's pending request queue */
+
+          privreq = khci_rqhead(&privep->pend);
+          if (privreq)
+            {
+              /* Restart transmission after we have recovered from a stall */
+
+              privreq->req.xfrd    = 0;
+              privreq->inflight[0] = 0;
+#ifndef CONFIG_USBDEV_NOWRITEAHEAD
+              privreq->inflight[1] = 0;
+#endif
+              (void)khci_wrrequest(priv, privep);
+            }
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: khci_delayedrestart
+ ****************************************************************************/
+
+static void khci_delayedrestart(struct khci_usbdev_s *priv, uint8_t epno)
+{
+  /* Add endpoint to the set of endpoints that need to be restarted */
+
+  priv->epstalled |= (1 << epno);
+
+  /* And start (or re-start) the watchdog timer */
+
+  wd_start(priv->wdog, RESTART_DELAY, khci_rqrestart, 1, (uint32_t)priv);
+}
+
+/****************************************************************************
+ * Name: khci_rqstop
+ ****************************************************************************/
+
+static void khci_rqstop(struct khci_ep_s *privep)
+{
+  struct khci_req_s *privreq;
+
+  /* Move all of the active requests back to the pending request queue */
+
+  while ((privreq = khci_remlast(&privep->active)))
+    {
+      /* Move the request back to the head of the pending list */
+
+      khci_addfirst(&privep->pend, privreq);
+    }
+}
+
+/****************************************************************************
+ * Name: khci_wrstart
+ ****************************************************************************/
+
+static int khci_wrstart(struct khci_usbdev_s *priv,
+                           struct khci_ep_s *privep)
+{
+  volatile struct usbotg_bdtentry_s *bdt;
+  struct khci_req_s *privreq;
+  uint8_t *buf;
+  uint8_t epno;
+  int nbytes;
+  int bytesleft;
+  int xfrd;
+  int index;
+
+  /* We get here when either (1) an IN endpoint completion interrupt occurs,
+   * or (2) a new write request is reqeived from the class.
+   */
+
+  /* Get the endpoint number that we are servicing */
+
+  epno = USB_EPNO(privep->ep.eplog);
+
+  /* Decide which BDT to use.  bdtin points to the "current" BDT.  That is,
+   * the one that either (1) available for next transfer, or (2) the one
+   * that is currently busy with the current transfer.  If the current
+   * BDT is busy, we have the option of setting up the other BDT in advance
+   * in order to improve data transfer performance.
+   */
+
+  bdt   = privep->bdtin;
+  index = 0;
+
+  if (bdt->status || bdt->addr)
+    {
+#ifdef CONFIG_USBDEV_NOWRITEAHEAD
+      /* The current BDT is not available and write ahead is disabled.  There
+       * is nothing we can do now.  Return -EBUSY to indicate this condition.
+       */
+
+      return -EBUSY;
+#else
+      /* The current BDT is not available, check the other BDT */
+
+      volatile struct usbotg_bdtentry_s *otherbdt;
+      otherbdt = &g_bdt[EP(epno, EP_DIR_IN, EP_PP_EVEN)];
+      if (otherbdt == bdt)
+        {
+          otherbdt++;
+        }
+
+      /* Is it available? */
+
+      if (otherbdt->status || otherbdt->addr)
+        {
+          /* No, neither are available.  We cannot perform the transfer now.
+           * Return -EBUSY to indicate this condition.
+           */
+
+          return -EBUSY;
+        }
+
+      /* Yes... use the other BDT */
+
+      bdt   = otherbdt;
+      index = 1;
+#endif
+    }
+
+  /* A BDT is available.  Which request should we be operating on?  The last
+   * incomplete, active request would be at the tail of the active list.
+   */
+
+  privreq = khci_rqtail(&privep->active);
+
+  /* This request would be NULL if there is no incomplete, active request. */
+
+  if (privreq)
+    {
+      /* Get the number of bytes left to be transferred in the request */
+
+      xfrd      = privreq->req.xfrd;
+      bytesleft = privreq->req.len - xfrd;
+
+      /* Even if the request is incomplete, transfer of all the requested
+       * bytes may already been started.  NOTE: inflight[1] should be zero
+       * because we know that there is a BDT available.
+       */
+
+#ifndef CONFIG_USBDEV_NOWRITEAHEAD
+      DEBUGASSERT(privreq->inflight[1] == 0);
+#endif
+      /* Has the transfer been initiated for all of the bytes? */
+
+      if (bytesleft > privreq->inflight[0])
+        {
+          /* No.. we have more work to do with this request */
+
+          xfrd      += privreq->inflight[0];
+          bytesleft -=  privreq->inflight[0];
+        }
+
+      /* Do we need to send a null packet after this packet? */
+
+      else if (privep->txnullpkt)
+        {
+          /* Yes... set up for the NULL packet transfer */
+
+          xfrd      = privreq->req.len;
+          bytesleft = 0;
+        }
+      else
+        {
+          /* No.. We are finished with this request.  We need to get the
+           * next request from the head of the pending request list.
+           */
+
+          privreq = NULL;
+        }
+    }
+
+  /* If privreq is NULL here then either (1) there is no active request, or
+   * (2) the (only) active request is fully queued.  In either case, we need
+   * to get the next request from the head of the pending request list.
+   */
+
+  if (!privreq)
+    {
+      /* Remove the next request from the head of the pending request list */
+
+      privreq = khci_remfirst(&privep->pend);
+      if (!privreq)
+        {
+          /* The pending request list is empty. There are no queued TX
+           * requests to be sent.
+           */
+
+          usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EPINQEMPTY), epno);
+
+          /* Return -ENODATA to indicate that there are no further requests
+           * to be processed.
+           */
+
+          return -ENODATA;
+        }
+
+      /* Add this request to the tail of the active request list */
+
+      khci_addlast(&privep->active, privreq);
+
+      /* Set up the first transfer for this request */
+
+      xfrd      = 0;
+      bytesleft = privreq->req.len;
+    }
+
+  uinfo("epno=%d req=%p: len=%d xfrd=%d index=%d nullpkt=%d\n",
+        epno, privreq, privreq->req.len, xfrd, index, privep->txnullpkt);
+
+  /* Get the number of bytes left to be sent in the packet */
+
+  nbytes = bytesleft;
+  if (nbytes > 0 || privep->txnullpkt)
+    {
+      /* Either send the maxpacketsize or all of the remaining data in
+       * the request.
+       */
+
+      privep->txnullpkt = 0;
+      if (nbytes >= privep->ep.maxpacket)
+        {
+          nbytes =  privep->ep.maxpacket;
+
+          /* Handle the case where this packet is exactly the
+           * maxpacketsize.  Do we need to send a zero-length packet
+           * in this case?
+           */
+
+          if (bytesleft ==  privep->ep.maxpacket &&
+             (privreq->req.flags & USBDEV_REQFLAGS_NULLPKT) != 0)
+            {
+              privep->txnullpkt = 1;
+            }
+        }
+    }
+
+  /* Send the packet (might be a null packet with nbytes == 0) */
+
+  buf = privreq->req.buf + xfrd;
+
+  /* Setup the writes to the endpoints */
+
+  khci_epwrite(privep, bdt, buf, nbytes);
+
+  /* Special case endpoint 0 state information.  The write request is in
+   * progress.
+   */
+
+  if (epno == 0)
+    {
+      priv->ctrlstate = CTRLSTATE_WRREQUEST;
+    }
+
+  /* Update for the next data IN interrupt */
+
+  privreq->inflight[index] = nbytes;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: khci_wrrequest
+ ****************************************************************************/
+
+static int khci_wrrequest(struct khci_usbdev_s *priv, struct khci_ep_s *privep)
+{
+  int ret;
+
+  /* Always try to start two transfers in order to take advantage of the
+   * KHCI's ping pong buffering.
+   */
+
+  ret = khci_wrstart(priv, privep);
+#ifndef CONFIG_USBDEV_NOWRITEAHEAD
+  if (ret == OK)
+    {
+      /* Note:  We need to return the error condition only if nothing was
+       * queued
+       */
+
+      (void)khci_wrstart(priv, privep);
+    }
+#else
+  UNUSED(ret);
+#endif
+
+  /* We return OK to indicate that a write request is still in progress */
+
+  return khci_rqhead(&privep->active) == NULL ? -ENODATA : OK;
+}
+
+/****************************************************************************
+ * Name: khci_rdcomplete
+ ****************************************************************************/
+
+static int khci_rdcomplete(struct khci_usbdev_s *priv,
+                              struct khci_ep_s *privep)
+{
+  volatile struct usbotg_bdtentry_s *bdtout;
+  struct khci_req_s *privreq;
+  int epno;
+
+  /* Check the request at the head of the endpoint's active request queue */
+
+  privreq = khci_rqhead(&privep->active);
+  if (!privreq)
+    {
+      /* There is no active packet waiting to receive any data. Then why are
+       * we here?
+       */
+
+      usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EPOUTQEMPTY),
+               USB_EPNO(privep->ep.eplog));
+      return -EINVAL;
+    }
+
+  /* bdtout should point to the BDT that just completed */
+
+  bdtout = privep->bdtout;
+  epno   = USB_EPNO(privep->ep.eplog);
+
+  uinfo("EP%d: len=%d xfrd=%d\n",
+        epno, privreq->req.len, privreq->req.xfrd);
+  bdtinfo("EP%d BDT OUT [%p] {%08x, %08x}\n",
+        epno, bdtout, bdtout->status, bdtout->addr);
+
+  /* We should own the BDT that just completed */
+
+  DEBUGASSERT((bdtout->status & USB_BDT_UOWN) == USB_BDT_COWN);
+
+  /* Get the length of the data received from the BDT. */
+
+  privreq->req.xfrd = (bdtout->status & USB_BDT_BYTECOUNT_MASK) >> USB_BDT_BYTECOUNT_SHIFT;
+
+  /* Complete the transfer and return the request to the class driver. */
+
+  usbtrace(TRACE_COMPLETE(USB_EPNO(privep->ep.eplog)), privreq->req.xfrd);
+  khci_reqcomplete(privep, OK);
+
+  /* Nullify the BDT entry that just completed.  Why?  So that we can tell later
+   * that the BDT has been processed.  No, it is not sufficient to look at the
+   * UOWN bit.  If UOWN==0, then the transfer has been completed BUT it may not
+   * yet have been processed.
+   */
+
+  bdtout->status = 0;
+  bdtout->addr   = 0;
+
+  /* Toggle bdtout to the other BDT.  Is the current bdtout the EVEN bdt? */
+
+  privep->bdtout = &g_bdt[EP_OUT_EVEN(epno)];
+  if (bdtout == privep->bdtout)
+    {
+      /* Yes.. Then the other BDT is the ODD BDT */
+
+      privep->bdtout++;
+    }
+
+  /* Set up the next read operation */
+
+  return khci_rdrequest(priv, privep);
+}
+
+/****************************************************************************
+ * Name: khci_ep0rdsetup
+ ****************************************************************************/
+
+static int khci_ep0rdsetup(struct khci_usbdev_s *priv, uint8_t *dest,
+                              int readlen)
+{
+  volatile struct usbotg_bdtentry_s *bdtout;
+  volatile struct usbotg_bdtentry_s *otherbdt;
+  struct khci_ep_s *privep;
+  uint32_t status;
+
+  /* bdtout refers to the next ping-pong BDT to use. */
+
+  privep = &priv->eplist[EP0];
+  bdtout = privep->bdtout;
+
+  /* Get the other BDT.  Check if the current BDT the EVEN BDT? */
+
+  otherbdt = &g_bdt[EP_OUT_EVEN(EP0)];
+  if (bdtout == otherbdt)
+    {
+      /* Yes.. then the other BDT is the ODD BDT. */
+
+      otherbdt++;
+    }
+
+  /* If there is no RX transfer in progress, then the other BDT is setup
+   * to receive the next setup packet.  There is a race condition here!
+   * Stop any setup packet.
+   */
+
+  if (!priv->rxbusy)
+    {
+      /* Nullify all BDT OUT entries.  Why?  So that we can tell later
+       * that the BDT available.  No, it is not sufficient to look at the
+       * UOWN bit.  If UOWN==0, then the transfer has been completed BUT
+       * it may not yet have been processed.  But a completely NULLified
+       * BDT is a sure indication
+       */
+
+      bdtout->status   = 0;
+      bdtout->addr     = 0;
+      otherbdt->status = 0;
+      otherbdt->addr   = 0;
+
+      /* Reset the other BDT to zero... this will cause any attempted use
+       * of the other BDT to be NAKed.  Set the first DATA0/1 value to 1.
+       */
+
+      privep->rxdata1  = 1;
+    }
+
+  /* Otherwise, there are RX transfers in progress.  bdtout may be
+   * unavailable now.  In that case, we are free to setup the other BDT
+   * in order to improve performance.  NOTE: That we check if the
+   * entire BDT has been NULLified.  That is the only sure indication
+   * that the BDT is available (see above).
+   */
+
+  if (bdtout->status || bdtout->addr)
+    {
+#ifdef CONFIG_USBDEV_NOREADAHEAD
+      /* We will not try to read ahead */
+
+      return -EBUSY;
+#else
+      /* bdtout is not available.  Is the other BDT available? */
+
+      if (otherbdt->status || otherbdt->addr)
+        {
+          /* Neither are available... we cannot accept the request now */
+
+          return -EBUSY;
+        }
+
+      /* Use the other BDT */
+
+      bdtout = otherbdt;
+#endif
+    }
+
+  usbtrace(TRACE_READ(EP0), readlen);
+
+  /* Get the correct data toggle (as well as other BDT bits) */
+
+  if (privep->rxdata1)
+    {
+      status          = (USB_BDT_UOWN | USB_BDT_DATA1 | USB_BDT_DTS);
+      privep->rxdata1 = 0;
+    }
+  else
+    {
+      status          = (USB_BDT_UOWN | USB_BDT_DATA0 | USB_BDT_DTS);
+      privep->rxdata1 = 1;
+    }
+
+   /* Set the data pointer, data length, and enable the endpoint */
+
+  bdtout->addr  = (uint8_t *)dest;
+  status       |= ((uint32_t)readlen << USB_BDT_BYTECOUNT_SHIFT);
+
+  /* Then give the BDT to the USB */
+
+  bdtinfo("EP0 BDT OUT [%p] {%08x, %08x}\n", bdtout, status, bdtout->addr);
+  bdtout->status = status;
+
+  priv->ctrlstate = CTRLSTATE_RDREQUEST;
+  priv->rxbusy    = 1;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: khci_rdsetup
+ ****************************************************************************/
+
+static int khci_rdsetup(struct khci_ep_s *privep, uint8_t *dest, int readlen)
+{
+  volatile struct usbotg_bdtentry_s *bdtout;
+  uint32_t status;
+  int epno;
+
+  /* Select a BDT.  Check both the even and the ODD BDT and use the first one
+   * that we own.
+   */
+
+  epno = USB_EPNO(privep->ep.eplog);
+
+  /* bdtout refers to the next ping-pong BDT to use.  However, bdtout may be
+   * unavailable now.  But, in that case, we are free to setup the other BDT
+   * in order to improve performance.
+   *
+   * Note that we NULLify the BDT OUT entries.  This is so that we can tell
+   * that the BDT readlly available.  No, it is not sufficient to look at the
+   * UOWN bit.  If UOWN==0, then the transfer has been completed BUT it may
+   * not yet have been processed.  But a completely NULLified BDT is a sure
+   * indication
+   */
+
+  bdtout = privep->bdtout;
+  if (bdtout->status || bdtout->addr)
+    {
+#ifdef CONFIG_USBDEV_NOREADAHEAD
+      /* We will not try to read-ahead */
+
+      return -EBUSY;
+#else
+      volatile struct usbotg_bdtentry_s *otherbdt;
+
+      /* Is the current BDT the EVEN BDT? */
+
+      otherbdt = &g_bdt[EP_OUT_EVEN(epno)];
+      if (bdtout == otherbdt)
+        {
+          /* Yes.. select the ODD BDT */
+
+          otherbdt++;
+        }
+
+      /* Is the other BDT available? */
+
+      if (otherbdt->status || otherbdt->addr)
+        {
+          /* Neither are available... we cannot accept the request now */
+
+          return -EBUSY;
+        }
+
+      /* Use the other BDT */
+
+      bdtout = otherbdt;
+#endif
+    }
+
+  usbtrace(TRACE_READ(USB_EPNO(privep->ep.eplog)), readlen);
+
+  /* Clear status bits (making sure that UOWN is cleared before doing anything
+   * else).
+   */
+
+  bdtout->status = 0;
+
+  /* Set the data pointer, data length, and enable the endpoint */
+
+  bdtout->addr = (uint8_t *)dest;
+
+  /* Get the correct data toggle. */
+
+  if (privep->rxdata1)
+    {
+      status          = (USB_BDT_UOWN | USB_BDT_DATA1 | USB_BDT_DTS);
+      privep->rxdata1 = 0;
+    }
+  else
+    {
+      status          = (USB_BDT_UOWN | USB_BDT_DATA0 | USB_BDT_DTS);
+      privep->rxdata1 = 1;
+    }
+
+  /* Set the data length (preserving the data toggle). */
+
+  status |= ((uint32_t)readlen << USB_BDT_BYTECOUNT_SHIFT);
+
+  /* Then give the BDT to the USB */
+
+  bdtinfo("EP%d BDT OUT [%p] {%08x, %08x}\n", 
+          epno, bdtout, status, bdtout->addr);
+
+  bdtout->status = status;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: khci_rdrequest
+ ****************************************************************************/
+
+static int khci_rdrequest(struct khci_usbdev_s *priv,
+                             struct khci_ep_s *privep)
+{
+  struct khci_req_s *privreq;
+  int readlen;
+  int ret;
+
+  /* Check the request at the head of the endpoint request queue */
+
+  privreq = khci_rqhead(&privep->pend);
+  if (!privreq)
+    {
+      /* There is no packet to receive any data. */
+
+      usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EPOUTQEMPTY),
+               USB_EPNO(privep->ep.eplog));
+
+      /* Special case reads from to endpoint zero.  If there is no transfer in
+       * progress, then we need to configure to received the next SETUP packet.
+       */
+
+      if (USB_EPNO(privep->ep.eplog) == 0 &&
+          priv->ctrlstate == CTRLSTATE_RDREQUEST)
+        {
+          priv->ctrlstate = CTRLSTATE_WAITSETUP;
+          priv->rxbusy    = 0;
+        }
+
+      return OK;
+    }
+
+  uinfo("EP%d: len=%d\n", USB_EPNO(privep->ep.eplog), privreq->req.len);
+
+  /* Ignore any attempt to receive a zero length packet */
+
+  if (privreq->req.len == 0)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_EPOUTNULLPACKET), 0);
+      khci_reqcomplete(privep, OK);
+      return OK;
+    }
+
+  /* Limit the size of the transfer to either the buffer size or the max
+   * packet size of the endpoint.
+   */
+
+  readlen = MIN(privreq->req.len, privep->ep.maxpacket);
+
+  /* Handle EP0 in a few special ways */
+
+  if (USB_EPNO(privep->ep.eplog) == EP0)
+    {
+      ret = khci_ep0rdsetup(priv, privreq->req.buf, readlen);
+    }
+  else
+    {
+      ret = khci_rdsetup(privep, privreq->req.buf, readlen);
+    }
+
+  /* If the read request was successfully setup, then move the request from
+   * the head of the pending request queue to the tail of the active request
+   * queue.
+   */
+
+  if (ret == OK)
+    {
+      privreq = khci_remfirst(&privep->pend);
+      DEBUGASSERT(privreq != NULL);
+      khci_addlast(&privep->active, privreq);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: khci_cancelrequests
+ ****************************************************************************/
+
+static void khci_cancelrequests(struct khci_ep_s *privep, int16_t result)
+{
+  struct khci_req_s *privreq;
+
+  while ((privreq = khci_remfirst(&privep->active)))
+    {
+      usbtrace(TRACE_COMPLETE(USB_EPNO(privep->ep.eplog)), privreq->req.xfrd);
+      khci_reqreturn(privep, privreq, result);
+    }
+
+  while ((privreq = khci_remfirst(&privep->pend)))
+    {
+      usbtrace(TRACE_COMPLETE(USB_EPNO(privep->ep.eplog)), privreq->req.xfrd);
+      khci_reqreturn(privep, privreq, result);
+    }
+}
+
+/****************************************************************************
+ * Interrupt Level Processing
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: khci_dispatchrequest
+ ****************************************************************************/
+
+static void khci_dispatchrequest(struct khci_usbdev_s *priv)
+{
+  int ret;
+
+  usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_DISPATCH), 0);
+  if (priv && priv->driver)
+    {
+      /* Forward to the control request to the class driver implementation */
+
+      ret = CLASS_SETUP(priv->driver, &priv->usbdev, &priv->ctrl, NULL, 0);
+      if (ret < 0)
+        {
+          /* Stall on failure */
+
+          usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_DISPATCHSTALL), 0);
+          priv->ctrlstate = CTRLSTATE_STALL;
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: khci_ep0stall
+ ****************************************************************************/
+
+static void khci_ep0stall(struct khci_usbdev_s *priv)
+{
+  uint32_t regval;
+
+  /* Check if EP0 is stalled */
+
+  regval = khci_getreg(KINETIS_USB0_ENDPT0);
+  if ((regval & USB_ENDPT_EPSTALL) != 0)
+    {
+      /* If so, clear the EP0 stall status */
+
+      regval &= ~USB_ENDPT_EPSTALL;
+      khci_putreg(regval, KINETIS_USB0_ENDPT0);
+    }
+}
+
+/****************************************************************************
+ * Name: khci_eptransfer
+ ****************************************************************************/
+
+static void khci_eptransfer(struct khci_usbdev_s *priv, uint8_t epno,
+                               uint16_t ustat)
+{
+  struct khci_ep_s *privep;
+  int ret;
+
+  /* Decode and service non control endpoints interrupt */
+
+  privep = &priv->eplist[epno];
+
+  /* Check if the last transaction was an EP0 OUT transaction */
+
+  if ((ustat & USB_STAT_TX) == USB_STAT_TX_OUT)
+    {
+      /* OUT: host-to-device */
+
+      usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EPOUTDONE), ustat);
+
+      /* Handle read requests. Call khci_rdcomplete() to complete the OUT
+       * transfer and setup the next out transfer.
+       */
+
+      ret = khci_rdcomplete(priv, privep);
+#ifdef CONFIG_USBDEV_NOREADAHEAD
+      if (ret == OK)
+        {
+          /* If that succeeds, then try to set up another OUT transfer. */
+
+          (void)khci_rdrequest(priv, privep);
+        }
+#else
+      UNUSED(ret);
+#endif
+    }
+  else
+    {
+      /* IN: device-to-host */
+
+      usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EPINDONE), ustat);
+
+      /* An outgoing IN packet has completed.  Update the number of bytes transferred
+       * and check for completion of the transfer.
+       */
+
+      khci_wrcomplete(priv, privep);
+
+      /* Handle additional queued write requests */
+
+      (void)khci_wrrequest(priv, privep);
+    }
+}
+
+/****************************************************************************
+ * Name: khci_ep0nextsetup
+ *
+ * Description:
+ *   This function is called (1) after sucessful completion of an EP0 Setup
+ *   command, or (2) after receipt of the OUT complete event (for simple
+ *   transfers).  It simply sets up the single BDT to accept the next
+ *   SETUP commend.
+ *
+ ****************************************************************************/
+
+static void khci_ep0nextsetup(struct khci_usbdev_s *priv)
+{
+  volatile struct usbotg_bdtentry_s *bdt = priv->eplist[EP0].bdtout;
+  uint32_t bytecount;
+
+  /* This operation should be performed no more than once per OUT transaction.
+   * priv->ep0done is set to zero at the beginning of processing of each EP0
+   * transfer.  It is set the first time that this function runs after the EP0
+   * transfer.
+   */
+
+  if (!priv->ep0done)
+    {
+      bytecount     = (USB_SIZEOF_CTRLREQ << USB_BDT_BYTECOUNT_SHIFT);
+      bdt->addr     = (uint8_t *)&priv->ctrl;
+      bdt->status   = (USB_BDT_UOWN | bytecount);
+      priv->ep0done = 1;
+    }
+}
+
+/****************************************************************************
+ * Name: khci_ep0rdcomplete
+ *
+ * Description:
+ *   This function is called after a sequence of read sequence.  In this
+ *   context, only one BDT is used.  Both BDTs must be prepared to receive
+ *   SETUP packets.
+ *
+ ****************************************************************************/
+
+static void khci_ep0rdcomplete(struct khci_usbdev_s *priv)
+{
+  volatile struct usbotg_bdtentry_s *bdt;
+  struct khci_ep_s *ep0;
+  uint32_t physaddr;
+  uint32_t bytecount;
+
+  /* This operation should be performed no more than once per OUT transaction.
+   * priv->ep0done is set to zero at the beginning of processing of each EP0
+   * transfer.  It is set the first time that this function runs after the EP0
+   * transfer.
+   */
+
+  if (!priv->ep0done)
+    {
+      bytecount     = (USB_SIZEOF_CTRLREQ << USB_BDT_BYTECOUNT_SHIFT);
+      physaddr      = (uint32_t)&priv->ctrl;
+
+      bdt           = &g_bdt[EP0_OUT_EVEN];
+      bdt->addr     = (uint8_t *)physaddr;
+      bdt->status   = (USB_BDT_UOWN | bytecount);
+
+      bdt           = &g_bdt[EP0_OUT_ODD];
+      bdt->addr     = (uint8_t *)physaddr;
+      bdt->status   = (USB_BDT_UOWN | bytecount);
+
+      priv->ep0done = 1;
+
+      /* Data toggling is not used on SETUP transfers.  And IN transfer
+       * resulting from a SETUP command should begin with DATA1.
+       */
+
+      ep0           = &priv->eplist[EP0];
+      ep0->rxdata1  = 0;
+      ep0->txdata1  = 1;
+    }
+}
+
+/****************************************************************************
+ * Name: khci_ep0setup
+ ****************************************************************************/
+
+static void khci_ep0setup(struct khci_usbdev_s *priv)
+{
+  volatile struct usbotg_bdtentry_s *bdt;
+  struct khci_ep_s *ep0;
+  struct khci_ep_s *privep;
+  union wb_u value;
+  union wb_u index;
+  union wb_u len;
+  union wb_u response;
+  uint32_t regval;
+  bool dispatched = false;
+  uint8_t epno;
+  int nbytes = 0; /* Assume zero-length packet */
+  int ret;
+
+  /* Cancel any pending requests. */
+
+  ep0 = &priv->eplist[EP0];
+  khci_cancelrequests(ep0, -EPROTO);
+
+  /* Assume NOT stalled; no TX in progress; no RX overrun.  Data 0/1 toggling
+   * is not used on SETUP packets, but any following EP0 IN transfer should
+   * beginning with DATA1.
+   */
+
+  ep0->stalled = false;
+  ep0->rxdata1 = 0;
+  ep0->txdata1 = 1;
+
+  /* Initialize for the SETUP */
+
+  priv->ctrlstate = CTRLSTATE_WAITSETUP;
+
+  /* And extract the little-endian 16-bit values to host order */
+
+  value.w = GETUINT16(priv->ctrl.value);
+  index.w = GETUINT16(priv->ctrl.index);
+  len.w   = GETUINT16(priv->ctrl.len);
+
+  uinfo("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+        priv->ctrl.type, priv->ctrl.req, value.w, index.w, len.w);
+
+  /* Dispatch any non-standard requests */
+
+  if ((priv->ctrl.type & USB_REQ_TYPE_MASK) != USB_REQ_TYPE_STANDARD)
+    {
+      usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_NOSTDREQ), priv->ctrl.type);
+
+      /* Let the class implementation handle all non-standar requests */
+
+      khci_dispatchrequest(priv);
+      dispatched = true;
+      goto resume_packet_processing;  /* Sorry about the goto */
+    }
+
+  /* Handle standard request.  Pick off the things of interest to the
+   * USB device controller driver; pass what is left to the class driver
+   */
+
+  switch (priv->ctrl.req)
+    {
+    case USB_REQ_GETSTATUS:
+      {
+        /* type:  device-to-host; recipient = device, interface, endpoint
+         * value: 0
+         * index: zero interface endpoint
+         * len:   2; data = status
+         */
+
+        usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_GETSTATUS), priv->ctrl.type);
+        if (len.w != 2 || (priv->ctrl.type & USB_REQ_DIR_IN) == 0 ||
+            index.b[MSB] != 0 || value.w != 0)
+          {
+            usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADEPGETSTATUS), 0);
+            priv->ctrlstate = CTRLSTATE_STALL;
+          }
+        else
+          {
+            switch (priv->ctrl.type & USB_REQ_RECIPIENT_MASK)
+              {
+               case USB_REQ_RECIPIENT_ENDPOINT:
+                {
+                  epno = USB_EPNO(index.b[LSB]);
+                  usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EPGETSTATUS), epno);
+                  if (epno >= KHCI_NENDPOINTS)
+                    {
+                      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADEPGETSTATUS), epno);
+                      priv->ctrlstate = CTRLSTATE_STALL;
+                    }
+                  else
+                    {
+                      privep            = &priv->eplist[epno];
+                      response.w        = 0; /* Not stalled */
+                      nbytes            = 2; /* Response size: 2 bytes */
+
+                      if (USB_ISEPIN(index.b[LSB]))
+                        {
+                          /* IN endpoint */
+
+                          bdt = privep->bdtin;
+                        }
+                      else
+                        {
+                          /* OUT endpoint */
+
+                          bdt = privep->bdtout;
+                        }
+
+                      /* BSTALL set if stalled */
+
+                      if ((bdt->status & USB_BDT_BSTALL) != 0)
+                        {
+                          response.b[LSB] = 1; /* Stalled, set bit 0 */
+                        }
+                    }
+                }
+                break;
+
+              case USB_REQ_RECIPIENT_DEVICE:
+                {
+                 if (index.w == 0)
+                    {
+                      usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_DEVGETSTATUS), 0);
+
+                      /* Features:  Remote Wakeup=YES; selfpowered=? */
+
+                      response.w      = 0;
+                      response.b[LSB] = (priv->selfpowered << USB_FEATURE_SELFPOWERED) |
+                                        (priv->rwakeup << USB_FEATURE_REMOTEWAKEUP);
+                      nbytes          = 2; /* Response size: 2 bytes */
+                    }
+                  else
+                    {
+                      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADDEVGETSTATUS), 0);
+                      priv->ctrlstate = CTRLSTATE_STALL;
+                    }
+                }
+                break;
+
+              case USB_REQ_RECIPIENT_INTERFACE:
+                {
+                  usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_IFGETSTATUS), 0);
+                  response.w        = 0;
+                  nbytes            = 2; /* Response size: 2 bytes */
+                }
+                break;
+
+              default:
+                {
+                  usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADGETSTATUS), 0);
+                  priv->ctrlstate = CTRLSTATE_STALL;
+                }
+                break;
+              }
+          }
+      }
+      break;
+
+    case USB_REQ_CLEARFEATURE:
+      {
+        /* type:  host-to-device; recipient = device, interface or endpoint
+         * value: feature selector
+         * index: zero interface endpoint;
+         * len:   zero, data = none
+         */
+
+        usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_CLEARFEATURE), priv->ctrl.type);
+        if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE)
+          {
+            /* Disable B device from performing HNP */
+
+#ifdef CONFIG_USBOTG
+            if (value.w == USBOTG_FEATURE_B_HNP_ENABLE)
+              {
+                /* Disable HNP */
+#warning Missing Logic
+              }
+
+            /* Disable A device HNP support */
+
+            else if (value.w == USBOTG_FEATURE_A_HNP_SUPPORT)
+              {
+                /* Disable HNP support */
+#warning Missing Logic
+              }
+
+            /* Disable alternate HNP support */
+
+            else if (value.w == USBOTG_FEATURE_A_ALT_HNP_SUPPORT)
+              {
+                /* Disable alternate HNP */
+#warning Missing Logic
+              }
+            else
+#endif
+            /* Disable remote wakeup */
+
+            if (value.w == USB_FEATURE_REMOTEWAKEUP)
+              {
+                priv->rwakeup     = 0;
+              }
+            else
+              {
+                /* Let the class implementation handle all other device features */
+
+                khci_dispatchrequest(priv);
+                dispatched = true;
+              }
+          }
+        else if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_ENDPOINT)
+          {
+            epno = USB_EPNO(index.b[LSB]);
+            if (epno > 0 && epno < KHCI_NENDPOINTS && index.b[MSB] == 0 &&
+                value.w == USB_FEATURE_ENDPOINTHALT && len.w == 0)
+              {
+                privep            = &priv->eplist[epno];
+                privep->halted    = false;
+                ret               = khci_epstall(&privep->ep, true);
+                UNUSED(ret);
+              }
+            else
+              {
+                usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADCLEARFEATURE), 0);
+                priv->ctrlstate = CTRLSTATE_STALL;
+              }
+          }
+        else
+          {
+            /* Let the class implementation handle all other recipients. */
+
+            khci_dispatchrequest(priv);
+            dispatched = true;
+          }
+      }
+      break;
+
+    case USB_REQ_SETFEATURE:
+      {
+        /* type:  host-to-device; recipient = device, interface, endpoint
+         * value: feature selector
+         * index: zero interface endpoint;
+         * len:   0; data = none
+         */
+
+        usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_SETFEATURE), priv->ctrl.type);
+
+        if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE)
+          {
+            /* Enable B device to perform HNP */
+
+#ifdef CONFIG_USBOTG
+            if (value.w == USBOTG_FEATURE_B_HNP_ENABLE)
+              {
+                /* Enable HNP */
+#warning "Missing logic"
+              }
+
+            /* Enable A device HNP supports */
+
+            else if (value.w == USBOTG_FEATURE_A_HNP_SUPPORT)
+              {
+                /* Enable HNP support */
+#warning "Missing logic"
+              }
+
+            /* Another port on the A device supports HNP */
+
+            else if (value.w == USBOTG_FEATURE_A_ALT_HNP_SUPPORT)
+              {
+                /* Enable alternate HNP */
+#warning "Missing logic"
+              }
+            else
+#endif
+
+            if (value.w == USB_FEATURE_REMOTEWAKEUP)
+              {
+                priv->rwakeup     = 0;
+              }
+            else if (value.w == USB_FEATURE_TESTMODE)
+              {
+                /* Special case recipient=device test mode */
+
+                uinfo("test mode: %d\n", index.w);
+              }
+            else
+              {
+                /* Let the class implementation handle all other device features */
+
+                khci_dispatchrequest(priv);
+                dispatched = true;
+              }
+          }
+        else if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_ENDPOINT)
+          {
+            /* Handler recipient=endpoint */
+
+            epno = USB_EPNO(index.b[LSB]);
+            if (epno < KHCI_NENDPOINTS && index.b[MSB] == 0 &&
+                value.w == USB_FEATURE_ENDPOINTHALT && len.w == 0)
+              {
+                privep            = &priv->eplist[epno];
+                privep->halted    = true;
+                ret               = khci_epstall(&privep->ep, false);
+                UNUSED(ret);
+              }
+            else
+              {
+                usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADSETFEATURE), 0);
+                priv->ctrlstate = CTRLSTATE_STALL;
+              }
+          }
+        else
+          {
+            /* The class driver handles all recipients except recipient=endpoint */
+
+            khci_dispatchrequest(priv);
+            dispatched = true;
+          }
+      }
+      break;
+
+    case USB_REQ_SETADDRESS:
+      {
+        /* type:  host-to-device; recipient = device
+         * value: device address
+         * index: 0
+         * len:   0; data = none
+         */
+
+        usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EP0SETUPSETADDRESS), value.w);
+        if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) != USB_REQ_RECIPIENT_DEVICE ||
+            index.w != 0 || len.w != 0 || value.w > 127)
+          {
+            usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADSETADDRESS), 0);
+            priv->ctrlstate = CTRLSTATE_STALL;
+          }
+        else
+          {
+            /* Note that setting of the device address will be deferred.  A zero-length
+             * packet will be sent and the device address will be set when the zero-
+             * length packet transfer completes.
+             */
+
+            priv->devstate = DEVSTATE_ADDRPENDING;
+          }
+      }
+      break;
+
+    case USB_REQ_GETDESCRIPTOR:
+      /* type:  device-to-host; recipient = device
+       * value: descriptor type and index
+       * index: 0 or language ID;
+       * len:   descriptor len; data = descriptor
+       */
+    case USB_REQ_SETDESCRIPTOR:
+      /* type:  host-to-device; recipient = device
+       * value: descriptor type and index
+       * index: 0 or language ID;
+       * len:   descriptor len; data = descriptor
+       */
+
+      {
+        usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_GETSETDESC), priv->ctrl.type);
+        if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE)
+          {
+            /* The request seems valid... let the class implementation handle it */
+
+            khci_dispatchrequest(priv);
+            dispatched = true;
+          }
+        else
+          {
+            usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADGETSETDESC), 0);
+            priv->ctrlstate = CTRLSTATE_STALL;
+          }
+      }
+      break;
+
+    case USB_REQ_GETCONFIGURATION:
+      /* type:  device-to-host; recipient = device
+       * value: 0;
+       * index: 0;
+       * len:   1; data = configuration value
+       */
+
+      {
+        usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_GETCONFIG), priv->ctrl.type);
+        if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE &&
+            value.w == 0 && index.w == 0 && len.w == 1)
+          {
+            /* The request seems valid... let the class implementation handle it */
+
+            khci_dispatchrequest(priv);
+            dispatched = true;
+          }
+        else
+          {
+            usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADGETCONFIG), 0);
+            priv->ctrlstate = CTRLSTATE_STALL;
+          }
+      }
+      break;
+
+    case USB_REQ_SETCONFIGURATION:
+      /* type:  host-to-device; recipient = device
+       * value: configuration value
+       * index: 0;
+       * len:   0; data = none
+       */
+
+      {
+        usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_SETCONFIG), priv->ctrl.type);
+        if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE &&
+            index.w == 0 && len.w == 0)
+          {
+             /* The request seems valid... let the class implementation handle it */
+
+             khci_dispatchrequest(priv);
+             dispatched = true;
+          }
+        else
+          {
+            usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADSETCONFIG), 0);
+            priv->ctrlstate = CTRLSTATE_STALL;
+          }
+      }
+      break;
+
+    case USB_REQ_GETINTERFACE:
+      /* type:  device-to-host; recipient = interface
+       * value: 0
+       * index: interface;
+       * len:   1; data = alt interface
+       */
+    case USB_REQ_SETINTERFACE:
+      /* type:  host-to-device; recipient = interface
+       * value: alternate setting
+       * index: interface;
+       * len:   0; data = none
+       */
+
+      {
+        /* Let the class implementation handle the request */
+
+        usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_GETSETIF), priv->ctrl.type);
+        khci_dispatchrequest(priv);
+        dispatched = true;
+      }
+      break;
+
+    case USB_REQ_SYNCHFRAME:
+      /* type:  device-to-host; recipient = endpoint
+       * value: 0
+       * index: endpoint;
+       * len:   2; data = frame number
+       */
+
+      {
+        usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_SYNCHFRAME), 0);
+      }
+      break;
+
+    default:
+      {
+        usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDCTRLREQ), priv->ctrl.req);
+        priv->ctrlstate = CTRLSTATE_STALL;
+      }
+      break;
+    }
+
+  /* PKTDIS bit is set when a Setup Transaction is received. Clear to resume
+   * packet processing.
+   */
+
+resume_packet_processing:
+  regval = khci_getreg(KINETIS_USB0_CTL);
+  regval &= ~USB_CTL_TXSUSPENDTOKENBUSY;
+  khci_putreg(regval, KINETIS_USB0_CTL);
+
+  /* At this point, the request has been handled and there are three possible
+   * outcomes:
+   *
+   * 1. The setup request was successfully handled above and a response packet
+   *    must be sent (may be a zero length packet).
+   * 2. The request was successfully handled by the class implementation.  In
+   *    case, the EP0 IN response has already been queued and the local variable
+   *    'dispatched' will be set to true and ctrlstate != CTRLSTATE_STALL;
+   * 3. An error was detected in either the above logic or by the class implementation
+   *    logic.  In either case, priv->state will be set CTRLSTATE_STALL
+   *    to indicate this case.
+   *
+   * NOTE: Non-standard requests are a special case.  They are handled by the
+   * class implementation and this function returned early above, skipping this
+   * logic altogether.
+   */
+
+  if (!dispatched && (priv->ctrlstate != CTRLSTATE_STALL))
+    {
+      /* The SETUP command was not dispatched to the class driver and the SETUP
+       * command did not cause a stall. We will respond.  First, restrict the
+       * data length to the length requested in the setup packet
+       */
+
+      if (nbytes > len.w)
+        {
+          nbytes = len.w;
+        }
+
+      /* Send the EP0 SETUP response (might be a zero-length packet) */
+
+      khci_epwrite(ep0, ep0->bdtin, response.b, nbytes);
+      priv->ctrlstate = CTRLSTATE_WAITSETUP;
+    }
+
+  /* Did we stall?  This might have occurred from the above logic OR the stall
+   * condition may have been set less obviously in khci_dispatchrequest().
+   * In either case, we handle the stall condition the same.
+   *
+   * However, bad things happen if we try to stall a SETUP packet.  So lets
+   * not.  If we wait a bit, things will recover.  Hmmm.. If we completed
+   * the data phase (perhaps by sending a NULL packet), then I think we
+   * could stall the endpoint and perhaps speed things up a bit???.
+   */
+
+   /* Set up the BDT to accept the next setup commend. */
+
+   khci_ep0nextsetup(priv);
+   priv->ctrlstate = CTRLSTATE_WAITSETUP;
+}
+
+/****************************************************************************
+ * Name: khci_ep0incomplete
+ ****************************************************************************/
+
+static void khci_ep0incomplete(struct khci_usbdev_s *priv)
+{
+  struct khci_ep_s *ep0 = &priv->eplist[EP0];
+  volatile struct usbotg_bdtentry_s *bdtlast;
+  int ret;
+
+  /* Get the last BDT and make sure that we own it. */
+
+  bdtlast = ep0->bdtin;
+
+  /* Make sure that we own the last BDT. */
+
+  bdtlast->status = 0;
+  bdtlast->addr   = 0;
+
+  /* Are we processing the completion of one packet of an outgoing request
+   * from the class driver?
+   */
+
+  if (priv->ctrlstate == CTRLSTATE_WRREQUEST)
+    {
+      /* An outgoing EP0 transfer has completed.  Update the byte count and
+       * check for the completion of the transfer.
+       *
+       * NOTE: khci_wrcomplete() will toggle bdtin to the other buffer so
+       * we do not need to that for this case.
+       */
+
+      khci_wrcomplete(priv, &priv->eplist[EP0]);
+
+      /* Handle the next queue IN transfer.  If there are no further queued
+       * IN transfers, khci_wrrequest will return -ENODATA and that is the
+       * only expected error return value in this context.
+       */
+
+      ret = khci_wrrequest(priv, &priv->eplist[EP0]);
+      if (ret < 0)
+        {
+          DEBUGASSERT(ret == -ENODATA);
+
+          /* If there is nothing to be sent, then we need to configure to
+           * receive the next SETUP packet.
+           */
+
+          priv->ctrlstate = CTRLSTATE_WAITSETUP;
+        }
+    }
+
+  /* No.. Are we processing the completion of a status response? */
+
+  else if (priv->ctrlstate == CTRLSTATE_WAITSETUP)
+    {
+      /* Get the next IN BDT */
+
+      if (bdtlast == &g_bdt[EP0_IN_EVEN])
+        {
+          ep0->bdtin = &g_bdt[EP0_IN_ODD];
+        }
+      else
+        {
+          DEBUGASSERT(bdtlast == &g_bdt[EP0_IN_ODD]);
+          ep0->bdtin = &g_bdt[EP0_IN_EVEN];
+       }
+
+      /* Look at the saved SETUP command.  Was it a SET ADDRESS request?
+       * If so, then now is the time to set the address.
+       */
+
+      if (priv->devstate == DEVSTATE_ADDRPENDING)
+        {
+          uint16_t addr = GETUINT16(priv->ctrl.value);
+          usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EP0ADDRESSSET), addr);
+
+          /* This should be the equivalent state */
+
+          DEBUGASSERT(priv->ctrl.req == USB_REQ_SETADDRESS &&
+                     (priv->ctrl.type & REQRECIPIENT_MASK) ==
+                     (USB_REQ_TYPE_STANDARD | USB_REQ_RECIPIENT_DEVICE));
+
+          /* Set (or clear) the address */
+
+          khci_putreg(addr, KINETIS_USB0_ADDR);
+          if (addr > 0)
+            {
+              priv->devstate = DEVSTATE_ADDRESS;
+            }
+          else
+            {
+              priv->devstate = DEVSTATE_DEFAULT;
+            }
+        }
+    }
+
+  /* No other state is expected in this context */
+
+  else
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDSTATE), priv->ctrlstate);
+      priv->ctrlstate = CTRLSTATE_STALL;
+    }
+}
+
+/****************************************************************************
+ * Name: khci_ep0outcomplete
+ ****************************************************************************/
+
+static void khci_ep0outcomplete(struct khci_usbdev_s *priv)
+{
+  struct khci_ep_s *ep0 = &priv->eplist[EP0];
+
+  switch (priv->ctrlstate)
+    {
+      /* Read request in progress */
+
+      case CTRLSTATE_RDREQUEST:
+
+        /* Process the next read request for EP0 */
+
+        khci_rdcomplete(priv, ep0);
+
+        /* Was this the end of the OUT transfer? */
+
+        if (priv->ctrlstate == CTRLSTATE_WAITSETUP)
+          {
+            /* Prepare EP0 OUT for the next SETUP transaction. */
+
+            khci_ep0rdcomplete(priv);
+          }
+        break;
+
+      /* No transfer in progress, waiting for SETUP */
+
+      case CTRLSTATE_WAITSETUP:
+        {
+          /* In this case the last OUT transaction must have been a status
+           * stage of a CTRLSTATE_WRREQUEST: Prepare EP0 OUT for the next SETUP
+           * transaction.
+           */
+
+           khci_ep0nextsetup(priv);
+        }
+        break;
+
+      /* Unexpected state OR host aborted the OUT transfer before it completed,
+       * STALL the endpoint in either case
+       */
+
+      default:
+        {
+          usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDSTATE), priv->ctrlstate);
+          priv->ctrlstate = CTRLSTATE_STALL;
+        }
+        break;
+    }
+}
+
+/****************************************************************************
+ * Name: khci_ep0transfer
+ ****************************************************************************/
+
+static void khci_ep0transfer(struct khci_usbdev_s *priv, uint16_t ustat)
+{
+  volatile struct usbotg_bdtentry_s *bdt;
+
+  /* The following information is available in the status register :
+   *
+   * ENDPT - The 4 bit endpoint number that cause the interrupt.
+   * DIR   - The direction of the endpoint.
+   * PPBI  - The ping-pong buffer used in the transaction.
+   */
+
+  priv->ep0done = 0;
+
+  /* Check if the last transaction was an EP0 OUT transaction */
+
+  if ((ustat & USB_STAT_TX) == USB_STAT_TX_OUT)
+    {
+      int index;
+
+      /* It was an EP0 OUT transaction.  Get the index to the BDT. */
+
+      index = ((ustat & USB_STAT_ODD) == 0 ? EP0_OUT_EVEN : EP0_OUT_ODD);
+      bdt   = &g_bdt[index];
+      priv->eplist[0].bdtout = bdt;
+
+      bdtinfo("EP0 BDT OUT [%p] {%08x, %08x}\n", bdt, bdt->status, bdt->addr);
+
+      /* Check the current EP0 OUT buffer contains a SETUP packet */
+
+      if (((bdt->status & USB_BDT_PID_MASK) >> USB_BDT_PID_SHIFT) == USB_PID_SETUP_TOKEN)
+        {
+          /* Check if the SETUP transaction data went into the priv->ctrl
+           * buffer. If not, then we will need to copy it.
+           */
+
+          if (bdt->addr != (uint8_t *)&priv->ctrl)
+            {
+              void *src = (void *)bdt->addr;
+              void *dest = &priv->ctrl;
+
+              memcpy(dest, src, USB_SIZEOF_CTRLREQ);
+              bdt->addr = (uint8_t *)&priv->ctrl;
+            }
+
+          /* Handle the control OUT transfer */
+
+          usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EP0SETUPDONE), bdt->status);
+          khci_ep0setup(priv);
+        }
+      else
+        {
+          /* Handle the data OUT transfer */
+
+          usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EP0OUTDONE), ustat);
+          khci_ep0outcomplete(priv);
+        }
+    }
+
+  /* No.. it was an EP0 IN transfer */
+
+  else /* if ((status & USB_STAT_TX) == USB_STAT_TX_IN) */
+    {
+      usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EP0INDONE), ustat);
+
+      /* Handle the IN transfer complete */
+
+      khci_ep0incomplete(priv);
+    }
+
+  /* Check for a request to stall EP0 */
+
+  if (priv->ctrlstate == CTRLSTATE_STALL)
+    {
+      /* Stall EP0 */
+
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_EP0SETUPSTALLED), priv->ctrlstate);
+      (void)khci_epstall(&priv->eplist[EP0].ep, false);
+    }
+}
+
+/****************************************************************************
+ * Name: khci_interrupt
+ ****************************************************************************/
+
+static int khci_interrupt(int irq, void *context, FAR void *arg)
+{
+  /* For now there is only one USB controller, but we will always refer to
+   * it using a pointer to make any future ports to multiple USB controllers
+   * easier.
+   */
+
+  struct khci_usbdev_s *priv = &g_usbdev;
+  uint16_t usbir;
+  uint16_t otgir;
+  uint32_t regval;
+  int i;
+
+  /* Get the set of pending USB and OTG interrupts interrupts */
+
+  usbir = khci_getreg(KINETIS_USB0_ISTAT) & khci_getreg(KINETIS_USB0_INTEN);
+  otgir = khci_getreg(KINETIS_USB0_OTGISTAT) & khci_getreg(KINETIS_USB0_OTGICR);
+
+  usbtrace(TRACE_INTENTRY(KHCI_TRACEINTID_INTERRUPT), usbir | otgir);
+
+#ifdef CONFIG_USBOTG
+  /* Session Request Protocol (SRP) Time Out Check */
+
+  /* Check if USB OTG SRP is ready */
+#  warning "Missing logic"
+    {
+      /* Check if the 1 millisecond timer has expired */
+
+      if ((otgir & USBOTG_INT_T1MSEC) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_T1MSEC), otgir);
+
+          /* Check for the USB OTG SRP timeout */
+#  warning "Missing logic"
+            {
+              /* Handle OTG events of the SRP timeout has expired */
+#  warning "Missing logic"
+            }
+
+            /* Clear Interrupt 1 msec timer Flag */
+
+            khci_putreg(USBOTG_INT_T1MSEC, KINETIS_USB0_ISTAT);
+        }
+    }
+#endif
+
+  /* Handle events while we are in the attached state */
+
+  if (priv->devstate == DEVSTATE_ATTACHED)
+    {
+      /* Clear all USB interrupts */
+
+      khci_putreg(USB_INT_ALL, KINETIS_USB0_ISTAT);
+
+      /* Make sure that the USE reset and IDLE detect interrupts are enabled */
+
+      regval = khci_getreg(KINETIS_USB0_INTEN);
+      regval |= (USB_INT_USBRST | USB_INT_SLEEP);
+      khci_putreg(regval, KINETIS_USB0_INTEN);
+
+      /* Now were are in the powered state */
+
+      priv->devstate = DEVSTATE_POWERED;
+    }
+
+#ifdef  CONFIG_USBOTG
+  /* Check if the ID Pin Changed State */
+
+  if ((otgir & USBOTG_INT_ID) != 0)
+    {
+      usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_OTGID), otgir);
+
+      /* Re-detect and re-initialize */
+#warning "Missing logic"
+
+      khci_putreg(USBOTG_INT_ID, KINETIS_USB0_ISTAT);
+    }
+#endif
+#if 0
+  /* Service the USB Activity Interrupt */
+
+  if ((otgir & USBOTG_INT_ACTV) != 0)
+    {
+      usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_WKUP), otgir);
+
+      /* Wake-up from susepnd mode */
+
+      khci_putreg(USBOTG_INT_ACTV, KINETIS_USB0_ISTAT);
+      khci_resume(priv);
+    }
+
+  /*  It is pointless to continue servicing if the device is in suspend mode. */
+x
+  if ((khci_getreg(KINETIS_USB0_CTL) & USB_USBCTRL_SUSP) != 0)
+    {
+      /* Just clear the interrupt and return */
+
+      usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_SUSPENDED), khci_getreg(KINETIS_USB0_CTL));
+      goto interrupt_exit;
+    }
+#endif
+
+  /* Service USB Bus Reset Interrupt. When bus reset is received during
+   * suspend, ACTVIF will be set first, once the UCONbits.SUSPND is clear,
+   * then the URSTIF bit will be asserted. This is why URSTIF is checked
+   * after ACTVIF.  The USB reset flag is masked when the USB state is in
+   * DEVSTATE_DETACHED or DEVSTATE_ATTACHED, and therefore cannot cause a
+   * USB reset event during these two states.
+   */
+
+  if ((usbir & USB_INT_USBRST) != 0)
+    {
+      usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_RESET), usbir);
+
+      /* Reset interrupt received. Restore our initial state.  NOTE:  the
+       * hardware automatically resets the USB address, so we really just
+       * need reset any existing configuration/transfer states.
+       */
+      khci_reset(priv);
+      priv->devstate = DEVSTATE_DEFAULT;
+
+#ifdef CONFIG_USBOTG
+        /* Disable and deactivate HNP */
+#warning Missing Logic
+#endif
+      /* Acknowlege the reset interrupt */
+
+      khci_putreg(USB_INT_USBRST, KINETIS_USB0_ISTAT);
+      goto interrupt_exit;
+    }
+
+  /* Service IDLE interrupts */
+
+  if ((usbir & USB_INT_SLEEP) != 0)
+    {
+      usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_IDLE), usbir);
+
+#ifdef  CONFIG_USBOTG
+      /* If Suspended, Try to switch to Host */
+#warning "Missing logic"
+#else
+      khci_suspend(priv);
+
+#endif
+      khci_putreg(USB_INT_SLEEP, KINETIS_USB0_ISTAT);
+    }
+
+  /* Service SOF interrupts */
+
+#ifdef CONFIG_USB_SOFINTS
+  if ((usbir & USB_INT_SOFTOK) != 0)
+    {
+      usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_SOF), 0);
+
+      /* I am not sure why you would ever enable SOF interrupts */
+
+      khci_putreg(USB_INT_SOFTOK, KINETIS_USB0_ISTAT);
+    }
+#endif
+
+   /* Service stall interrupts */
+
+   if ((usbir & USB_INT_STALL) != 0)
+    {
+      usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_STALL), usbir);
+
+      khci_ep0stall(priv);
+
+      /* Clear the pending STALL interrupt */
+
+      khci_putreg(USB_INT_STALL, KINETIS_USB0_ISTAT);
+    }
+
+  /* Service error interrupts */
+
+  if ((usbir & USB_INT_ERROR) != 0)
+    {
+      usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_UERR), usbir);
+      uerr("ERROR: EIR=%04x\n", khci_getreg(KINETIS_USB0_ERRSTAT));
+
+      /* Clear all pending USB error interrupts */
+
+      khci_putreg(USB_EINT_ALL, KINETIS_USB0_ERRSTAT);
+    }
+
+  /* There is no point in continuing if the host has not sent a bus reset.
+   * Once bus reset is received, the device transitions into the DEFAULT
+   * state and is ready for communication.
+   */
+
+#if 0
+  if (priv->devstate < DEVSTATE_DEFAULT)
+    {
+      /* Just clear the interrupt and return */
+
+      usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_WAITRESET), priv->devstate);
+      goto interrupt_exit;
+    }
+#endif
+
+  /*  Service USB Transaction Complete Interrupt */
+
+  if ((usbir & USB_INT_TOKDNE) != 0)
+    {
+      usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_TRNC), usbir);
+
+      /* Drain the USAT FIFO entries.  If the USB FIFO ever gets full, USB
+       * bandwidth utilization can be compromised, and the device won't be
+       * able to receive SETUP packets.
+       */
+
+      for (i = 0; i < 4; i++)
+        {
+          uint8_t epno;
+
+          /* Check the pending interrupt register.  Is token processing complete. */
+
+          if ((khci_getreg(KINETIS_USB0_ISTAT) & USB_INT_TOKDNE) != 0)
+            {
+              regval = khci_getreg(KINETIS_USB0_STAT);
+              khci_putreg(USB_INT_TOKDNE, KINETIS_USB0_ISTAT);
+
+              usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_TRNCS), regval);
+
+              /* Handle the endpoint transfer complete event. */
+
+              epno = (regval & USB_STAT_ENDP_MASK) >> USB_STAT_ENDP_SHIFT;
+              if (epno == 0)
+                {
+                   khci_ep0transfer(priv, regval);
+                }
+              else
+                {
+                  khci_eptransfer(priv, epno, regval);
+                }
+            }
+          else
+            {
+               /* USTAT FIFO must be empty. */
+
+               break;
+            }
+        }
+    }
+
+  UNUSED(otgir); /* May not be used, depending on above conditional logic */
+
+  /* Clear the pending USB interrupt.  Goto is used in the above to assure
+   * that all interrupt exists pass through this logic.
+   */
+
+interrupt_exit:
+  kinetis_clrpend(KINETIS_IRQ_USBOTG);
+  usbtrace(TRACE_INTEXIT(KHCI_TRACEINTID_INTERRUPT), usbir | otgir);
+  return OK;
+}
+
+/****************************************************************************
+ * Suspend/Resume Helpers
+ ****************************************************************************/
+/****************************************************************************
+ * Name: khci_suspend
+ ****************************************************************************/
+
+static void khci_suspend(struct khci_usbdev_s *priv)
+{
+#if 0
+  uint32_t regval;
+#endif
+
+  /* Notify the class driver of the suspend event */
+
+  if (priv->driver)
+    {
+      CLASS_SUSPEND(priv->driver, &priv->usbdev);
+    }
+
+#if 0
+  /* Enable the ACTV interrupt.
+   *
+   * NOTE: Do not clear UIRbits.ACTVIF here! Reason: ACTVIF is only
+   * generated once an IDLEIF has been generated. This is a 1:1 ratio
+   * interrupt generation. For every IDLEIF, there will be only one ACTVIF
+   * regardless of the number of subsequent bus transitions.  If the ACTIF
+   * is cleared here, a problem could occur. The driver services IDLEIF
+   * first because ACTIVIE=0. If this routine clears the only ACTIVIF,
+   * then it can never get out of the suspend mode.
+   */
+
+  regval  = khci_getreg(KINETIS_USB0_OTGICR);
+  regval |= USBOTG_INT_ACTV;
+  khci_putreg(regval, KINETIS_USB0_OTGICR);
+
+  /* Disable further IDLE interrupts.  Once is enough. */
+
+  regval  = khci_getreg(KINETIS_USB0_INTEN);
+  regval &= ~USB_INT_SLEEP;
+  khci_putreg(regval, KINETIS_USB0_INTEN);
+#endif
+
+  /* Invoke a callback into board-specific logic.  The board-specific logic
+   * may enter into sleep or idle modes or switch to a slower clock, etc.
+   */
+
+  kinetis_usbsuspend((struct usbdev_s *)priv, false);
+}
+
+/****************************************************************************
+ * Name: khci_resume
+ ****************************************************************************/
+
+static void khci_resume(struct khci_usbdev_s *priv)
+{
+  irqstate_t flags;
+  uint32_t regval;
+
+  flags = enter_critical_section();
+
+  /* Start RESUME signaling */
+
+  regval = khci_getreg(KINETIS_USB0_CTL);
+  regval |= USB_CTL_RESUME;
+  khci_putreg(regval, KINETIS_USB0_CTL);
+
+  /* Keep the RESUME line set for 1-13 ms */
+
+  up_mdelay(10);
+
+  regval &= ~USB_CTL_RESUME;
+  khci_putreg(regval, KINETIS_USB0_CTL);
+
+  /* This function is called when the USB activity interrupt occurs.
+   * If using clock switching, this is the place to call out to
+   * logic to restore the original MCU core clock frequency.
+   */
+
+  kinetis_usbsuspend((struct usbdev_s *)priv, true);
+
+  /* Disable further activity interrupts */
+#if 0
+  regval  = khci_getreg(KINETIS_USB0_OTGICR);
+  regval &= ~USBOTG_INT_ACTV;
+  khci_putreg(regval, KINETIS_USB0_OTGICR);
+#endif
+
+  /* The ACTVIF bit cannot be cleared immediately after the USB module wakes
+   * up from Suspend or while the USB module is suspended. A few clock cycles
+   * are required to synchronize the internal hardware state machine before
+   * the ACTIVIF bit can be cleared by firmware. Clearing the ACTVIF bit
+   * before the internal hardware is synchronized may not have an effect on
+   * the value of ACTVIF. Additionally, if the USB module uses the clock from
+   * the 96 MHz PLL source, then after clearing the SUSPND bit, the USB
+   * module may not be immediately operational while waiting for the 96 MHz
+   * PLL to lock.
+   */
+
+  khci_putreg(USB_INT_SLEEP, KINETIS_USB0_ISTAT);
+
+  /* Notify the class driver of the resume event */
+
+  if (priv->driver)
+    {
+      CLASS_RESUME(priv->driver, &priv->usbdev);
+    }
+
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Endpoint Helpers
+ ****************************************************************************/
+/****************************************************************************
+ * Name: khci_epreserve
+ ****************************************************************************/
+
+static inline struct khci_ep_s *
+khci_epreserve(struct khci_usbdev_s *priv, uint8_t epset)
+{
+  struct khci_ep_s *privep = NULL;
+  irqstate_t flags;
+  int epndx = 0;
+
+  flags = enter_critical_section();
+  epset &= priv->epavail;
+  if (epset)
+    {
+      /* Select the lowest bit in the set of matching, available endpoints
+       * (skipping EP0)
+       */
+
+      for (epndx = 1; epndx < KHCI_NENDPOINTS; epndx++)
+        {
+          uint8_t bit = KHCI_ENDP_BIT(epndx);
+          if ((epset & bit) != 0)
+            {
+              /* Mark the endpoint no longer available */
+
+              priv->epavail &= ~bit;
+
+              /* And return the pointer to the standard endpoint structure */
+
+              privep = &priv->eplist[epndx];
+              break;
+            }
+        }
+    }
+
+  leave_critical_section(flags);
+  return privep;
+}
+
+/****************************************************************************
+ * Name: khci_epunreserve
+ ****************************************************************************/
+
+static inline void
+khci_epunreserve(struct khci_usbdev_s *priv, struct khci_ep_s *privep)
+{
+  irqstate_t flags = enter_critical_section();
+  priv->epavail   |= KHCI_ENDP_BIT(USB_EPNO(privep->ep.eplog));
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: khci_epreserved
+ ****************************************************************************/
+
+static inline bool
+khci_epreserved(struct khci_usbdev_s *priv, int epno)
+{
+  return ((priv->epavail & KHCI_ENDP_BIT(epno)) == 0);
+}
+
+/****************************************************************************
+ * Name: khci_ep0configure
+ ****************************************************************************/
+
+static void khci_ep0configure(struct khci_usbdev_s *priv)
+{
+  volatile struct usbotg_bdtentry_s *bdt;
+  struct khci_ep_s *ep0;
+  uint32_t bytecount;
+
+  /* Enable the EP0 endpoint */
+
+  khci_putreg(KHCI_EP_CONTROL, KINETIS_USB0_ENDPT0);
+
+  /* Configure the OUT BDTs.  We assume that the ping-poing buffer index has
+   * just been reset and we expect to receive on the EVEN BDT first.  Data
+   * toggle synchronization is not needed for SETUP packets.
+   */
+
+  ep0         = &priv->eplist[EP0];
+  bytecount   = (USB_SIZEOF_CTRLREQ << USB_BDT_BYTECOUNT_SHIFT);
+
+  bdt         = &g_bdt[EP0_OUT_EVEN];
+  bdt->addr   = (uint8_t *)&priv->ctrl;
+  bdt->status = (USB_BDT_UOWN | bytecount);
+  ep0->bdtout = bdt;
+
+  bdt++;
+  bdt->status = (USB_BDT_UOWN | bytecount);
+  bdt->addr   = (uint8_t *)&priv->ctrl;
+
+  /* Configure the IN BDTs. */
+
+  bdt         = &g_bdt[EP0_IN_EVEN];
+  bdt->status = 0;
+  bdt->addr   = 0;
+  ep0->bdtin  = bdt;
+
+  bdt++;
+  bdt->status = 0;
+  bdt->addr   = 0;
+
+  /* Data toggling is not used on SETUP transfers.  And IN transfer resulting
+   * from a SETUP command should begin with DATA1.
+   */
+
+  ep0->rxdata1 = 0;
+  ep0->txdata1 = 1;
+}
+
+/****************************************************************************
+ * Endpoint operations
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: khci_epconfigure
+ ****************************************************************************/
+
+static int khci_epconfigure(struct usbdev_ep_s *ep,
+                               const struct usb_epdesc_s *desc,
+                               bool last)
+{
+  struct khci_ep_s *privep = (struct khci_ep_s *)ep;
+  volatile struct usbotg_bdtentry_s *bdt;
+  uint16_t maxpacket;
+  uint32_t regval;
+  uint8_t  epno;
+  bool     epin;
+  bool     bidi;
+  int      index;
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!ep || !desc)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
+      uerr("ERROR: ep=%p desc=%p\n");
+      return -EINVAL;
+    }
+#endif
+
+  /* Get the unadorned endpoint address */
+
+  epno = USB_EPNO(desc->addr);
+  epin = USB_ISEPIN(desc->addr);
+
+  usbtrace(TRACE_EPCONFIGURE, (uint16_t)epno);
+  DEBUGASSERT(epno == USB_EPNO(ep->eplog));
+
+  /* Set the requested type */
+
+  switch (desc->attr & USB_EP_ATTR_XFERTYPE_MASK)
+   {
+    case USB_EP_ATTR_XFER_INT: /* Interrupt endpoint */
+      regval = epin ? KHCI_EP_INTIN : KHCI_EP_INTOUT;
+      break;
+
+    case USB_EP_ATTR_XFER_BULK: /* Bulk endpoint */
+      regval = epin ? KHCI_EP_BULKIN : KHCI_EP_BULKOUT;
+      break;
+
+    case USB_EP_ATTR_XFER_ISOC: /* Isochronous endpoint */
+      regval = epin ? KHCI_EP_ISOCIN : KHCI_EP_ISOCOUT;
+      break;
+
+    case USB_EP_ATTR_XFER_CONTROL: /* Control endpoint */
+      regval = KHCI_EP_CONTROL;
+      bidi   = true;
+      break;
+
+    default:
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADEPTYPE), (uint16_t)desc->type);
+      return -EINVAL;
+    }
+
+  /* Enable the endpoint */
+
+  khci_putreg(regval, KINETIS_USB0_ENDPT(epno));
+
+  /* Setup up buffer descriptor table (BDT) entry/ies for this endpoint */
+
+  if (epin || bidi)
+    {
+      /* Get the pointer to BDT entry */
+
+      index         =  EP(epno, EP_DIR_IN, EP_PP_EVEN);
+      bdt           = &g_bdt[index];
+      privep->bdtin = bdt;
+
+      /* Mark that we own the entry */
+
+      bdt->status = 0;
+      bdt->addr   = 0;
+
+      bdtinfo("EP%d BDT IN [%p] {%08x, %08x}\n",
+              epno, bdt, bdt->status, bdt->addr);
+
+      /* Now do the same for the other buffer. */
+
+      bdt++;
+      bdt->status = 0;
+      bdt->addr   = 0;
+
+      bdtinfo("EP%d BDT IN [%p] {%08x, %08x}\n",
+              epno, bdt, bdt->status, bdt->addr);
+    }
+
+  if (!epin || bidi)
+    {
+      index          =  EP(epno, EP_DIR_OUT, EP_PP_EVEN);
+      bdt            = &g_bdt[index];
+      privep->bdtout = bdt;
+
+      /* Mark that we own the entry */
+
+      bdt->status = 0;
+      bdt->addr   = 0;
+
+      bdtinfo("EP%d BDT OUT [%p] {%08x, %08x}\n",
+              epno, bdt, bdt->status, bdt->addr);
+
+      /* Now do the same for the other buffer. */
+
+      bdt++;
+      bdt->status = 0;
+      bdt->addr   = 0;
+
+      bdtinfo("EP%d BDT OUT [%p] {%08x, %08x}\n",
+              epno, bdt, bdt->status, bdt->addr);
+    }
+
+  /* Get the maxpacket size of the endpoint. */
+
+  maxpacket = GETUINT16(desc->mxpacketsize);
+  DEBUGASSERT(maxpacket <= KHCI_MAXPACKET_SIZE);
+  ep->maxpacket = maxpacket;
+
+  /* Set the full, logic EP number (that includes direction encoded in bit 7) */
+
+  if (epin)
+    {
+      ep->eplog = USB_EPIN(epno);
+    }
+  else
+    {
+      ep->eplog = USB_EPOUT(epno);
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: khci_epdisable
+ ****************************************************************************/
+
+static int khci_epdisable(struct usbdev_ep_s *ep)
+{
+  struct khci_ep_s *privep;
+  volatile uint32_t *ptr;
+  int epno;
+  int i;
+  irqstate_t flags;
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!ep)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
+      uerr("ERROR: ep=%p\n", ep);
+      return -EINVAL;
+    }
+#endif
+
+  privep = (struct khci_ep_s *)ep;
+  epno   = USB_EPNO(ep->eplog);
+  usbtrace(TRACE_EPDISABLE, epno);
+
+  /* Cancel any ongoing activity */
+
+  flags = enter_critical_section();
+  khci_cancelrequests(privep, -ESHUTDOWN);
+
+  /* Disable the endpoint */
+
+  khci_putreg(0, KINETIS_USB0_ENDPT(epno));
+
+  /* Reset the BDTs for the endpoint.  Four BDT entries per endpoint; Two
+   * 32-bit words per BDT.
+   */
+
+  ptr = (uint32_t *)&g_bdt[EP(epno, EP_DIR_OUT, EP_PP_EVEN)];
+  for (i = 0; i < USB_BDT_WORD_SIZE * USB_NBDTS_PER_EP; i++)
+    {
+      *ptr++ = 0;
+    }
+
+  leave_critical_section(flags);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: khci_epallocreq
+ ****************************************************************************/
+
+static struct usbdev_req_s *khci_epallocreq(struct usbdev_ep_s *ep)
+{
+  struct khci_req_s *privreq;
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!ep)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
+      return NULL;
+    }
+#endif
+
+  usbtrace(TRACE_EPALLOCREQ, USB_EPNO(ep->eplog));
+
+  privreq = (struct khci_req_s *)kmm_malloc(sizeof(struct khci_req_s));
+  if (!privreq)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_ALLOCFAIL), 0);
+      return NULL;
+    }
+
+  memset(privreq, 0, sizeof(struct khci_req_s));
+  return &privreq->req;
+}
+
+/****************************************************************************
+ * Name: khci_epfreereq
+ ****************************************************************************/
+
+static void khci_epfreereq(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
+{
+  struct khci_req_s *privreq = (struct khci_req_s *)req;
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!ep || !req)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
+      return;
+    }
+#endif
+
+  usbtrace(TRACE_EPFREEREQ, USB_EPNO(ep->eplog));
+
+  kmm_free(privreq);
+}
+
+/****************************************************************************
+ * Name: khci_epsubmit
+ ****************************************************************************/
+
+static int khci_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
+{
+  struct khci_req_s *privreq = (struct khci_req_s *)req;
+  struct khci_ep_s *privep = (struct khci_ep_s *)ep;
+  struct khci_usbdev_s *priv;
+  irqstate_t flags;
+  uint8_t epno;
+  int ret = OK;
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!req || !req->callback || !req->buf || !ep)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
+      uerr("ERROR: req=%p callback=%p buf=%p ep=%p\n",
+           req, req->callback, req->buf, ep);
+      return -EINVAL;
+    }
+#endif
+
+  usbtrace(TRACE_EPSUBMIT, USB_EPNO(ep->eplog));
+  priv = privep->dev;
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!priv->driver)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_NOTCONFIGURED), priv->usbdev.speed);
+      uerr("ERROR: driver=%p\n", priv->driver);
+      return -ESHUTDOWN;
+    }
+#endif
+
+  /* Handle the request from the class driver */
+
+  epno                 = USB_EPNO(ep->eplog);
+  req->result          = -EINPROGRESS;
+  req->xfrd            = 0;
+  privreq->inflight[0] = 0;
+#ifndef CONFIG_USBDEV_NOWRITEAHEAD
+  privreq->inflight[1] = 0;
+#endif
+  flags                = enter_critical_section();
+
+  /* Add the new request to the request queue for the OUT endpoint */
+
+  khci_addlast(&privep->pend, privreq);
+
+  /* Handle IN (device-to-host) requests.  NOTE:  If the class device is
+   * using the bi-directional EP0, then we assume that they intend the EP0
+   * IN functionality.
+   */
+
+  if (USB_ISEPIN(ep->eplog) || epno == EP0)
+    {
+      usbtrace(TRACE_INREQQUEUED(epno), req->len);
+
+      /* If the endpoint is not stalled and an IN endpoint BDT is available,
+       * then transfer the data now.
+       */
+
+      if (!privep->stalled)
+        {
+          (void)khci_wrrequest(priv, privep);
+        }
+    }
+
+  /* Handle OUT (host-to-device) requests */
+
+  else
+    {
+      usbtrace(TRACE_OUTREQQUEUED(epno), req->len);
+
+      /* Set up the read operation (unless the endpoint is stalled).  Because
+       * the KHCI supports ping-pong* buffering.  There may be two pending
+       * read requests.  The following call will attempt to setup a read
+       * using this request for this endpoint.  It is not harmful if this
+       * fails.
+       */
+
+      if (!privep->stalled)
+        {
+          (void)khci_rdrequest(priv, privep);
+        }
+    }
+
+  leave_critical_section(flags);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: khci_epcancel
+ ****************************************************************************/
+
+static int khci_epcancel(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
+{
+  struct khci_ep_s *privep = (struct khci_ep_s *)ep;
+  irqstate_t flags;
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!ep || !req)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
+      return -EINVAL;
+    }
+#endif
+
+  usbtrace(TRACE_EPCANCEL, USB_EPNO(ep->eplog));
+
+  flags = enter_critical_section();
+  khci_cancelrequests(privep, -EAGAIN);
+  leave_critical_section(flags);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: khci_epbdtstall
+ ****************************************************************************/
+
+static int khci_epbdtstall(struct usbdev_ep_s *ep, bool resume, bool epin)
+{
+  struct khci_ep_s *privep;
+  struct khci_usbdev_s *priv;
+  volatile struct usbotg_bdtentry_s *bdt;
+  volatile struct usbotg_bdtentry_s *otherbdt;
+  uint32_t regaddr;
+  uint32_t regval;
+  uint8_t epno;
+
+  /* Recover pointers */
+
+  privep = (struct khci_ep_s *)ep;
+  priv   = (struct khci_usbdev_s *)privep->dev;
+  epno   = USB_EPNO(ep->eplog);
+
+  /* Check for an IN endpoint */
+
+  if (epin)
+    {
+      /* Get a pointer to the current IN BDT */
+
+      bdt = privep->bdtin;
+
+      /* Get the other BDT */
+
+      otherbdt = &g_bdt[EP(epno, EP_DIR_IN, EP_PP_EVEN)];
+      if (otherbdt == bdt)
+        {
+          otherbdt++;
+        }
+
+      /* Reset the data toggle */
+
+      privep->txdata1 = false;
+    }
+
+  /* Otherwise it is an an OUT endpoint. */
+
+  else
+    {
+      /* Get a pointer to the current OUT BDT */
+
+      bdt = privep->bdtout;
+
+      /* Get a pointer to the other BDT */
+
+      otherbdt = &g_bdt[EP(epno, EP_DIR_OUT, EP_PP_EVEN)];
+      if (otherbdt == bdt)
+        {
+          otherbdt++;
+        }
+
+      /* Reset the data toggle */
+
+      privep->rxdata1 = false;
+    }
+
+  /* Handle the resume condition */
+
+  if (resume)
+    {
+      /* Resuming a stalled endpoint */
+
+      usbtrace(TRACE_EPRESUME, epno);
+
+      /* Point to the appropriate EP register */
+
+      regaddr = KINETIS_USB0_ENDPT(epno);
+
+      /* Clear the STALL bit in the UEP register */
+
+      regval  = khci_getreg(regaddr);
+      regval &= ~USB_ENDPT_EPSTALL;
+      khci_putreg(regval, regaddr);
+
+      /* Check for the EP0 OUT endpoint.  This is a special case because we
+       * need to set it up to receive the next setup packet (Hmmm... what
+       * if there are queued outgoing reponses.  We need to revisit this.)
+       */
+
+      if (epno == 0 && !epin)
+        {
+          uint32_t bytecount = (USB_SIZEOF_CTRLREQ << USB_BDT_BYTECOUNT_SHIFT);
+          uint32_t physaddr  = (uint32_t)&priv->ctrl;
+
+          /* Configure the other BDT to receive a SETUP command. */
+
+          otherbdt->addr     = (uint8_t *)physaddr;
+          otherbdt->status   = (USB_BDT_UOWN | bytecount);
+
+          /* Configure the current BDT to receive a SETUP command. */
+
+          bdt->addr          = (uint8_t *)physaddr;
+          bdt->status        = (USB_BDT_UOWN | bytecount);
+
+          bdtinfo("EP0 BDT IN [%p] {%08x, %08x}\n",
+                  bdt, bdt->status, bdt->addr);
+          bdtinfo("EP0 BDT IN [%p] {%08x, %08x}\n",
+                  otherbdt, otherbdt->status, otherbdt->addr);
+        }
+      else
+        {
+          /* Return the other BDT to the CPU. */
+
+          otherbdt->addr   = 0;
+          otherbdt->status = 0;
+
+          /* Return the current BDT to the CPU. */
+
+          bdt->addr        = 0;
+          bdt->status      = 0;
+
+          bdtinfo("EP%d BDT %s [%p] {%08x, %08x}\n",
+                  epno, epin ? "IN" : "OUT", bdt, bdt->status, bdt->addr);
+          bdtinfo("EP%d BDT %s [%p] {%08x, %08x}\n",
+                  epno, epin ? "IN" : "OUT", otherbdt, otherbdt->status, otherbdt->addr);
+
+          /* Restart any queued requests (after a delay so that we can be assured
+           * that the hardware has recovered from the stall -- I don't know of any
+           * other way to assure this.).
+           */
+
+          khci_delayedrestart(priv, epno);
+        }
+    }
+
+  /* Handle the stall condition */
+
+  else
+    {
+      usbtrace(TRACE_EPSTALL, epno);
+      privep->stalled  = true;
+
+      /* Stall the other BDT. */
+
+      otherbdt->status = (USB_BDT_UOWN | USB_BDT_BSTALL);
+      otherbdt->addr   = 0;
+
+      /* Stall the current BDT. */
+
+      bdt->status      = (USB_BDT_UOWN | USB_BDT_BSTALL);
+      bdt->addr        = 0;
+
+      /* Stop any queued requests.  Hmmm.. is there a race condition here? */
+
+      khci_rqstop(privep);
+
+      bdtinfo("EP%d BDT %s [%p] {%08x, %08x}\n",
+              epno, epin ? "IN" : "OUT", bdt, bdt->status, bdt->addr);
+      bdtinfo("EP%d BDT %s [%p] {%08x, %08x}\n",
+              epno, epin ? "IN" : "OUT", otherbdt, otherbdt->status, otherbdt->addr);
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: khci_epstall
+ ****************************************************************************/
+
+static int khci_epstall(struct usbdev_ep_s *ep, bool resume)
+{
+  struct khci_ep_s *privep;
+  irqstate_t flags;
+  int ret;
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!ep)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
+      return -EINVAL;
+    }
+#endif
+
+  /* Recover pointers */
+
+  privep = (struct khci_ep_s *)ep;
+
+  /* STALL or RESUME the endpoint */
+
+  flags = enter_critical_section();
+
+  /* Special case EP0.  When we stall EP0 we have to stall both the IN and
+   * OUT BDTs.
+   */
+
+  if (USB_EPNO(ep->eplog) == 0)
+    {
+      ret = khci_epbdtstall(ep, resume, true);
+      if (ret == OK)
+        {
+          ret = khci_epbdtstall(ep, resume, false);
+        }
+
+      /* Set the EP0 control state appropriately */
+
+      privep->dev->ctrlstate = resume ? CTRLSTATE_WAITSETUP : CTRLSTATE_STALLED;
+    }
+
+  /* Otherwise, select the BDT for the endpoint direction */
+
+  else
+    {
+      /* It is a unidirectional endpoint */
+
+      ret = khci_epbdtstall(ep, resume, USB_ISEPIN(ep->eplog));
+    }
+
+  leave_critical_section(flags);
+  return ret;
+}
+
+/****************************************************************************
+ * Device Controller Operations
+ ****************************************************************************/
+/****************************************************************************
+ * Name: khci_allocep
+ ****************************************************************************/
+
+static struct usbdev_ep_s *khci_allocep(struct usbdev_s *dev, uint8_t epno,
+                                           bool epin, uint8_t eptype)
+{
+  struct khci_usbdev_s *priv = (struct khci_usbdev_s *)dev;
+  struct khci_ep_s *privep = NULL;
+  uint16_t epset = KHCI_ENDP_ALLSET;
+
+  usbtrace(TRACE_DEVALLOCEP, (uint16_t)epno);
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!dev)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
+      return NULL;
+    }
+#endif
+
+  /* Ignore any direction bits in the logical address */
+
+  epno = USB_EPNO(epno);
+
+  /* A logical address of 0 means that any endpoint will do */
+
+  if (epno > 0)
+    {
+      /* Otherwise, we will return the endpoint structure only for the requested
+       * 'logical' endpoint.  All of the other checks will still be performed.
+       *
+       * First, verify that the logical endpoint is in the range supported by
+       * by the hardware.
+       */
+
+      if (epno >= KHCI_NENDPOINTS)
+        {
+          usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADEPNO), (uint16_t)epno);
+          return NULL;
+        }
+
+      /* Convert the logical address to a physical OUT endpoint address and
+       * remove all of the candidate endpoints from the bitset except for the
+       * the IN/OUT pair for this logical address.
+       */
+
+      epset = KHCI_ENDP_BIT(epno);
+    }
+
+  /* Check if the selected endpoint number is available */
+
+  privep = khci_epreserve(priv, epset);
+  if (!privep)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_EPRESERVE), (uint16_t)epset);
+      return NULL;
+    }
+
+  return &privep->ep;
+}
+
+/****************************************************************************
+ * Name: khci_freeep
+ ****************************************************************************/
+
+static void khci_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep)
+{
+  struct khci_usbdev_s *priv;
+  struct khci_ep_s *privep;
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!dev || !ep)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
+      return;
+    }
+#endif
+
+  priv   = (struct khci_usbdev_s *)dev;
+  privep = (struct khci_ep_s *)ep;
+  usbtrace(TRACE_DEVFREEEP, (uint16_t)USB_EPNO(ep->eplog));
+  DEBUGASSERT(priv && privep);
+
+  /* Disable the endpoint */
+
+  (void)khci_epdisable(ep);
+
+  /* Mark the endpoint as available */
+
+  khci_epunreserve(priv, privep);
+}
+
+/****************************************************************************
+ * Name: khci_getframe
+ ****************************************************************************/
+
+static int khci_getframe(struct usbdev_s *dev)
+{
+  uint16_t frml;
+  uint16_t frmh;
+  uint16_t tmp;
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!dev)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
+      return -EINVAL;
+    }
+#endif
+
+  /* Return the last frame number detected by the hardware.  Thr FRMH/L
+   * registers are updated with the current frame number whenever a SOF
+   * TOKEN is received.
+   */
+
+  do
+    {
+      /* Loop until we can be sure that there was no wrap from the FRML
+       * to the FRMH register.
+       */
+
+      frmh = khci_getreg(KINETIS_USB0_FRMNUMH) & USB_FRMNUMH_MASK;
+      frml = khci_getreg(KINETIS_USB0_FRMNUML) & USB_FRMNUML_MASK;
+      tmp  = khci_getreg(KINETIS_USB0_FRMNUMH) & USB_FRMNUMH_MASK;
+    }
+  while (frmh != tmp);
+
+  /* Combine to for the full 11-bit value */
+
+  tmp = (frmh) << 8 | frml;
+  usbtrace(TRACE_DEVGETFRAME, tmp);
+  return tmp;
+}
+
+/****************************************************************************
+ * Name: khci_wakeup
+ ****************************************************************************/
+
+static int khci_wakeup(struct usbdev_s *dev)
+{
+  struct khci_usbdev_s *priv = (struct khci_usbdev_s *)dev;
+
+  usbtrace(TRACE_DEVWAKEUP, 0);
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!dev)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
+      return -EINVAL;
+    }
+#endif
+
+  /* Resume normal operation. */
+
+  khci_resume(priv);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: khci_selfpowered
+ ****************************************************************************/
+
+static int khci_selfpowered(struct usbdev_s *dev, bool selfpowered)
+{
+  struct khci_usbdev_s *priv = (struct khci_usbdev_s *)dev;
+
+  usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!dev)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
+      return -ENODEV;
+    }
+#endif
+
+  priv->selfpowered = selfpowered;
+  return OK;
+}
+
+/****************************************************************************
+ * Initialization/Reset
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: khci_reset
+ *
+ * Description:
+ *   Reset the software and hardware states.  If the USB controller has been
+ *   attached to a host, then connect to the bus as well.  At the end of
+ *   this reset, the hardware should be in the full up, ready-to-run state.
+ *
+ ****************************************************************************/
+
+static void khci_reset(struct khci_usbdev_s *priv)
+{
+  /* Reset the software configuration */
+
+  khci_swreset(priv);
+
+  /* Re-configure the USB controller in its initial, unconnected state */
+
+  khci_hwreset(priv);
+
+  /* khci_attach() was called, then the attach flag will be set and we
+   * should also attach to the USB bus.
+   */
+
+  if (priv->attached)
+   {
+      /* usbdev_attach() has already been called.. attach to the bus
+       * now
+       */
+
+      khci_attach(priv);
+    }
+}
+
+/****************************************************************************
+ * Name: khci_attach
+ ****************************************************************************/
+
+static void khci_attach(struct khci_usbdev_s *priv)
+{
+  uint32_t regval;
+
+  /* Check if we are in the detached state */
+
+  if (priv->devstate == DEVSTATE_DETACHED)
+    {
+      /* Disable USB interrupts at the interrupt controller */
+
+      up_disable_irq(KINETIS_IRQ_USBOTG);
+
+      /* Initialize registers to known states. */
+
+#if 1
+      khci_putreg(0x1,KINETIS_USB0_CTL);
+      khci_putreg(0,KINETIS_USB0_USBCTRL);
+#endif
+
+      /* Enable interrupts at the USB controller */
+
+      khci_putreg(ERROR_INTERRUPTS, KINETIS_USB0_ERREN);
+      khci_putreg(NORMAL_INTERRUPTS, KINETIS_USB0_INTEN);
+
+      /* Configure EP0 */
+
+      khci_ep0configure(priv);
+
+      /* Flush any pending transactions */
+#if 1
+      while ((khci_getreg(KINETIS_USB0_ISTAT) & USB_INT_TOKDNE) != 0)
+        {
+          khci_putreg(USB_INT_TOKDNE, KINETIS_USB0_ISTAT);
+        }
+
+      /* Make sure packet processing is enabled */
+
+      regval = khci_getreg(KINETIS_USB0_CTL);
+      regval &= ~USB_CTL_TXSUSPENDTOKENBUSY;
+      khci_putreg(regval, KINETIS_USB0_CTL);
+
+      /* Enable the USB module and attach to bus */
+
+      do
+        {
+          regval = khci_getreg(KINETIS_USB0_CTL);
+          if ((regval & USB_CTL_USBENSOFEN) == 0)
+            {
+              khci_putreg(regval | USB_CTL_USBENSOFEN, KINETIS_USB0_CTL);
+            }
+        }
+      while ((regval & USB_CTL_USBENSOFEN) == 0);
+
+      /* Enable OTG */
+
+#ifdef CONFIG_USBOTG
+      regval  = khci_getreg(KINETIS_USB0_OTGCTL);
+      regval |= (USBOTG_CON_DPPULUP | USBOTG_CON_OTGEN);
+      khci_putreg(regval, KINETIS_USB0_OTGCTL);
+#endif
+
+      /* Transition to the attached state */
+
+      priv->devstate     = DEVSTATE_ATTACHED;
+      priv->usbdev.speed = USB_SPEED_FULL;
+
+      /* Clear all pending USB interrupts */
+
+      khci_putreg(USB_EINT_ALL, KINETIS_USB0_ERRSTAT);
+      khci_putreg(USB_INT_ALL, KINETIS_USB0_ISTAT);
+#endif
+
+      /* Enable USB interrupts at the interrupt controller */
+
+      up_enable_irq(KINETIS_IRQ_USBOTG);
+
+      /* Enable pull-up to connect the device.  The host should enumerate us
+       * some time after this
+       */
+
+      kinetis_usbpullup(&priv->usbdev, true);
+    }
+}
+
+/****************************************************************************
+ * Name: khci_detach
+ ****************************************************************************/
+
+static void khci_detach(struct khci_usbdev_s *priv)
+{
+#ifdef CONFIG_USBOTG
+  uint32_t regval;
+#endif
+
+  /* Disable USB interrupts at the interrupt controller */
+
+  up_disable_irq(KINETIS_IRQ_USBOTG);
+
+  /* Disable the USB controller and detach from the bus. */
+
+  khci_putreg(0, KINETIS_USB0_CTL);
+
+  /* Mask all USB interrupts */
+
+  khci_putreg(0, KINETIS_USB0_INTEN);
+
+  /* We are now in the detached state  */
+
+  priv->attached = 0;
+  priv->devstate = DEVSTATE_DETACHED;
+
+#ifdef CONFIG_USBOTG
+  /* Disable the D+ Pullup */
+
+  regval  = khci_getreg(KINETIS_USB0_OTGCTL);
+  regval &= ~USBOTG_CON_DPPULUP;
+  khci_putreg(regval, KINETIS_USB0_OTGCTL);
+
+  /* Disable and deactivate HNP */
+#warning Missing Logic
+
+  /* Check if the ID Pin Changed State */
+
+  if ((khci_getreg(KINETIS_USB0_ISTAT) & khci_getreg(KINETIS_USB0_OTGICR) & USBOTG_INT_ID) != 0)
+    {
+      /* Re-detect & Initialize */
+#warning "Missing logic"
+
+      /* Clear ID Interrupt Flag */
+
+      khci_putreg(USBOTG_INT_ID, KINETIS_USB0_ISTAT);
+    }
+#endif
+}
+
+/****************************************************************************
+ * Name: khci_swreset
+ ****************************************************************************/
+
+static void khci_swreset(struct khci_usbdev_s *priv)
+{
+  int epno;
+
+  /* Tell the class driver that we are disconnected.  The class driver
+   * should then accept any new configurations.
+   */
+
+  if (priv->driver)
+    {
+      CLASS_DISCONNECT(priv->driver, &priv->usbdev);
+    }
+
+  /* Flush and reset endpoint states (except EP0) */
+
+  for (epno = 1; epno < KHCI_NENDPOINTS; epno++)
+    {
+      struct khci_ep_s *privep = &priv->eplist[epno];
+
+      /* Cancel any queued requests.  Since they are canceled
+       * with status -ESHUTDOWN, then will not be requeued
+       * until the configuration is reset.  NOTE:  This should
+       * not be necessary... the CLASS_DISCONNECT above should
+       * result in the class implementation calling khci_epdisable
+       * for each of its configured endpoints.
+       */
+
+      khci_cancelrequests(privep, -EAGAIN);
+
+      /* Reset endpoint status */
+
+      privep->stalled   = false;
+      privep->halted    = false;
+      privep->txnullpkt = false;
+    }
+
+  /* Reset to the default address */
+
+  khci_putreg(0, KINETIS_USB0_ADDR);
+
+  /* Unconfigure each endpoint by clearing the endpoint control registers
+   * (except EP0)
+   */
+
+  for (epno = 1; epno < KHCI_NENDPOINTS; epno++)
+    {
+      khci_putreg(0, KINETIS_USB0_ENDPT(epno));
+    }
+
+  /* Reset the control state */
+
+  priv->ctrlstate = CTRLSTATE_WAITSETUP;
+  priv->rxbusy    = 0;
+}
+
+/****************************************************************************
+ * Name: khci_hwreset
+ *
+ * Description:
+ *   Reset the hardware and leave it in a known, unready state.
+ *
+ ****************************************************************************/
+
+static void khci_hwreset(struct khci_usbdev_s *priv)
+{
+  uint32_t regval;
+
+#define USB_FLASH_ACCESS
+#ifdef USB_FLASH_ACCESS
+  /* Allow USBOTG-FS Controller to Read from FLASH */
+
+  regval = getreg32(KINETIS_FMC_PFAPR);
+  regval &= ~(FMC_PFAPR_M4AP_MASK);
+  regval |= (FMC_PFAPR_RDONLY << FMC_PFAPR_M4AP_SHIFT);
+  putreg32(regval, KINETIS_FMC_PFAPR);
+#endif
+
+  /* Clear all of the buffer descriptor table (BDT) entries */
+
+  memset((void *)g_bdt, 0, sizeof(g_bdt));
+
+  /* Soft reset the USB Module */
+
+  regval = khci_getreg(KINETIS_USB0_USBTRC0);
+  regval |= USB_USBTRC0_USBRESET;
+  khci_putreg(regval,KINETIS_USB0_USBTRC0);
+
+  /* Is this really necessary? */
+
+  while (khci_getreg(KINETIS_USB0_USBTRC0) & USB_USBTRC0_USBRESET);
+
+  /* Set the address of the buffer descriptor table (BDT)
+   *
+   * BDTP1: Bit 1-7: Bits 9-15 of the BDT base address
+   * BDTP2: Bit 0-7: Bits 16-23 of the BDT base address
+   * BDTP3: Bit 0-7: Bits 24-31 of the BDT base address
+   */
+
+  khci_putreg((uint8_t)((uint32_t)g_bdt >> 24), KINETIS_USB0_BDTPAGE3);
+  khci_putreg((uint8_t)((uint32_t)g_bdt >> 16), KINETIS_USB0_BDTPAGE2);
+  khci_putreg((uint8_t)(((uint32_t)g_bdt >>  8) & USB_BDTPAGE1_MASK), KINETIS_USB0_BDTPAGE1);
+
+  uinfo("BDT Address %hhx \n" ,&g_bdt);
+  uinfo("BDTPAGE3 %hhx\n",khci_getreg(KINETIS_USB0_BDTPAGE3));
+  uinfo("BDTPAGE2 %hhx\n",khci_getreg(KINETIS_USB0_BDTPAGE2));
+  uinfo("BDTPAGE1 %hhx\n",khci_getreg(KINETIS_USB0_BDTPAGE1));
+
+  /* Clear any pending interrupts */
+
+  khci_putreg(0xFF, KINETIS_USB0_ERRSTAT);
+  khci_putreg(0xFF, KINETIS_USB0_ISTAT);
+  khci_putreg(0xFF,KINETIS_USB0_OTGISTAT);
+
+#if 1
+  /* Assert reset request to all of the Ping Pong buffer pointers.  This
+   * will reset all Even/Odd buffer pointers to the EVEN BD banks.
+   */
+
+  regval  = khci_getreg(KINETIS_USB0_CTL);
+  regval |= USB_CTL_ODDRST;
+  khci_putreg(regval, KINETIS_USB0_CTL);
+
+  /* Bring the ping pong buffer pointers out of reset */
+
+  regval &= ~USB_CTL_ODDRST;
+  khci_putreg(regval, KINETIS_USB0_CTL);
+#endif
+
+#if 1
+  /* Undocumented bit */
+
+  regval = khci_getreg(KINETIS_USB0_USBTRC0);
+  regval |= 0x40;
+  khci_putreg(regval,KINETIS_USB0_USBTRC0);
+#endif
+
+  priv->devstate = DEVSTATE_DETACHED;
+}
+
+/****************************************************************************
+ * Name: khci_stateinit
+ ****************************************************************************/
+
+static void khci_stateinit(struct khci_usbdev_s *priv)
+{
+  int epno;
+
+  /* Disconnect the device / disable the pull-up.  We don't want the
+   * host to enumerate us until the class driver is registered.
+   */
+
+  kinetis_usbpullup(&priv->usbdev, false);
+
+  /* Initialize the device state structure.  NOTE: many fields
+   * have the initial value of zero and, hence, are not explicitly
+   * initialized here.
+   */
+
+  memset(priv, 0, sizeof(struct khci_usbdev_s));
+  priv->usbdev.ops   = &g_devops;
+  priv->usbdev.ep0   = &priv->eplist[EP0].ep;
+  priv->epavail      = KHCI_ENDP_ALLSET & ~KHCI_ENDP_BIT(EP0);
+  priv->rwakeup      = 1;
+
+  /* Initialize the endpoint list */
+
+  for (epno = 0; epno < KHCI_NENDPOINTS; epno++)
+    {
+      struct khci_ep_s *privep = &priv->eplist[epno];
+
+      /* Set endpoint operations, reference to driver structure (not
+       * really necessary because there is only one controller), and
+       * the (physical) endpoint number which is just the index to the
+       * endpoint.
+       */
+
+      privep->ep.ops           = &g_epops;
+      privep->dev              = priv;
+      privep->ep.eplog         = epno;
+
+      /* We will use a fixed maxpacket size for all endpoints (perhaps
+       * ISOC endpoints could have larger maxpacket???).  A smaller
+       * packet size can be selected when the endpoint is configured.
+       */
+
+      privep->ep.maxpacket     = KHCI_MAXPACKET_SIZE;
+    }
+
+  /* Select a smaller endpoint size for EP0 */
+
+#if KHCI_EP0MAXPACKET < KHCI_MAXPACKET_SIZE
+  priv->eplist[EP0].ep.maxpacket = KHCI_EP0MAXPACKET;
+#endif
+}
+
+/****************************************************************************
+ * Name: khci_hwshutdown
+ ****************************************************************************/
+
+static void khci_hwshutdown(struct khci_usbdev_s *priv)
+{
+#if 0
+  uint32_t regval;
+#endif
+
+  /* Put the hardware and driver in its initial, unconnected state */
+
+  khci_swreset(priv);
+  khci_hwreset(priv);
+  priv->usbdev.speed = USB_SPEED_UNKNOWN;
+
+  /* Disable all interrupts and force the USB controller into reset */
+
+  khci_putreg(0, KINETIS_USB0_ERREN);
+  khci_putreg(0, KINETIS_USB0_INTEN);
+
+  /* Clear any pending interrupts */
+
+  khci_putreg(USB_EINT_ALL, KINETIS_USB0_ERRSTAT);
+  khci_putreg(USB_INT_ALL, KINETIS_USB0_ISTAT);
+
+  /* Disconnect the device / disable the pull-up */
+
+  kinetis_usbpullup(&priv->usbdev, false);
+
+  /* Power down the USB controller */
+#warning FIXME powerdown USB Controller
+
+#if 0
+  regval  = khci_getreg(KHCI_USB_PWRC);
+  regval &= ~USB_PWRC_USBPWR;
+  khci_putreg(regval, KHCI_USB_PWRC);
+#endif
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_usbinitialize
+ *
+ * Description:
+ *   Initialize the USB driver
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void up_usbinitialize(void)
+{
+  struct khci_usbdev_s *priv = &g_usbdev;
+  uint32_t regval;
+
+  /* For now there is only one USB controller, but we will always refer to
+   * it using a pointer to make any future ports to multiple USB controllers
+   * easier.
+   */
+
+  /* Select clock source:
+   * SIM_SOPT2[PLLFLLSEL] and SIM_CLKDIV2[USBFRAC, USBDIV] will have been
+   * configured in kinetis_pllconfig. So here we select between USB_CLKIN
+   * or the output of SIM_CLKDIV2[USBFRAC, USBDIV]
+   */
+
+  regval = getreg32(KINETIS_SIM_SOPT2);
+  regval &= ~(SIM_SOPT2_USBSRC);
+  regval |= BOARD_USB_CLKSRC;
+  putreg32(regval, KINETIS_SIM_SOPT2);
+
+  /* 2: Gate USB clock */
+
+  regval = getreg32(KINETIS_SIM_SCGC4);
+  regval |= SIM_SCGC4_USBOTG;
+  putreg32(regval, KINETIS_SIM_SCGC4);
+
+  usbtrace(TRACE_DEVINIT, 0);
+
+  /* Initialize the driver state structure */
+
+  khci_stateinit(priv);
+
+  /* Then perform a few one-time initialization operstions.  First, initialize
+   * the watchdog timer that is used to perform a delayed queue restart
+   * after recovering from a stall.
+   */
+
+  priv->epstalled = 0;
+  priv->wdog      = wd_create();
+
+  /* Attach USB controller interrupt handler.  The hardware will not be
+   * initialized and interrupts will not be enabled until the class device
+   * driver is bound.  Getting the IRQs here only makes sure that we have
+   * them when we need them later.
+   */
+
+  if (irq_attach(KINETIS_IRQ_USBOTG, khci_interrupt, NULL) != 0)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_IRQREGISTRATION),
+               (uint16_t)KINETIS_IRQ_USBOTG);
+      up_usbuninitialize();
+    }
+
+#ifdef CONFIG_ARCH_IRQPRIO
+  /* Set the interrupt priority */
+
+  up_prioritize_irq(KINETIS_IRQ_USBOTG, 112);
+#endif
+}
+
+/****************************************************************************
+ * Name: up_usbuninitialize
+ * Description:
+ *   Initialize the USB driver
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void up_usbuninitialize(void)
+{
+  /* For now there is only one USB controller, but we will always refer to
+   * it using a pointer to make any future ports to multiple USB controllers
+   * easier.
+   */
+
+  struct khci_usbdev_s *priv = &g_usbdev;
+  irqstate_t flags;
+
+  flags = enter_critical_section();
+  usbtrace(TRACE_DEVUNINIT, 0);
+
+  /* Disable and detach the USB IRQs */
+
+  up_disable_irq(KINETIS_IRQ_USBOTG);
+  irq_detach(KINETIS_IRQ_USBOTG);
+
+  if (priv->driver)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_DRIVERREGISTERED), 0);
+      usbdev_unregister(priv->driver);
+    }
+
+  /* Put the hardware in an inactive state */
+
+  khci_hwshutdown(priv);
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: usbdev_register
+ *
+ * Description:
+ *   Register a USB device class driver. The class driver's bind() method
+ *   will be called to bind it to a USB device driver.
+ *
+ ****************************************************************************/
+
+int usbdev_register(struct usbdevclass_driver_s *driver)
+{
+  /* For now there is only one USB controller, but we will always refer to
+   * it using a pointer to make any future ports to multiple USB controllers
+   * easier.
+   */
+
+  struct khci_usbdev_s *priv = &g_usbdev;
+  int ret;
+
+  usbtrace(TRACE_DEVREGISTER, 0);
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!driver || !driver->ops->bind || !driver->ops->unbind ||
+      !driver->ops->disconnect || !driver->ops->setup)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
+      return -EINVAL;
+    }
+
+  if (priv->driver)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_DRIVER), 0);
+      return -EBUSY;
+    }
+#endif
+
+  /* First hook up the driver */
+
+  priv->driver = driver;
+
+  /* Then bind the class driver */
+
+  ret = CLASS_BIND(driver, &priv->usbdev);
+  if (ret)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BINDFAILED), (uint16_t)-ret);
+      priv->driver = NULL;
+    }
+
+  /* The class driver has been successfully bound. */
+
+  else
+    {
+      /* Setup the USB controller in it initial ready-to-run state (might
+       * be connected or unconnected, depending on usbdev_attach() has
+       * been called).
+       */
+
+      DEBUGASSERT(priv->devstate == DEVSTATE_DETACHED);
+      khci_reset(priv);
+   }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: usbdev_unregister
+ *
+ * Description:
+ *   Un-register usbdev class driver. If the USB device is connected to a
+ *   USB host, it will first disconnect().  The driver is also requested to
+ *   unbind() and clean up any device state, before this procedure finally
+ *   returns.
+ *
+ ****************************************************************************/
+
+int usbdev_unregister(struct usbdevclass_driver_s *driver)
+{
+  /* For now there is only one USB controller, but we will always refer to
+   * it using a pointer to make any future ports to multiple USB controllers
+   * easier.
+   */
+
+  struct khci_usbdev_s *priv = &g_usbdev;
+  irqstate_t flags;
+
+  usbtrace(TRACE_DEVUNREGISTER, 0);
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (driver != priv->driver)
+    {
+      usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
+      return -EINVAL;
+    }
+#endif
+
+  /* Reset the hardware and cancel all requests.  All requests must be
+   * canceled while the class driver is still bound.  This will put
+   * the hardware back into its initial, unconnected state.
+   */
+
+  flags = enter_critical_section();
+  khci_swreset(priv);
+  khci_hwreset(priv);
+
+  /* Unbind the class driver */
+
+  CLASS_UNBIND(driver, &priv->usbdev);
+
+  /* Disable USB controller interrupts (but keep them attached) */
+
+  up_disable_irq(KINETIS_IRQ_USBOTG);
+
+  /* Put the hardware in an inactive state.  Then bring the hardware back up
+   * in the reset state (this is probably not necessary, the khci_hwreset()
+   * call above was probably sufficient).
+   */
+
+  khci_hwshutdown(priv);
+  khci_stateinit(priv);
+
+  /* Unhook the driver */
+
+  priv->driver = NULL;
+  leave_critical_section(flags);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: khci_usbattach and khci_usbdetach
+ *
+ * Description:
+ *   The USB stack must be notified when the device is attached or detached
+ *   by calling one of these functions.
+ *
+ ****************************************************************************/
+
+void khci_usbattach(void)
+{
+  /* For now there is only one USB controller, but we will always refer to
+   * it using a pointer to make any future ports to multiple USB controllers
+   * easier.
+   */
+
+  struct khci_usbdev_s *priv = &g_usbdev;
+
+  /* Mark that we are attached */
+
+  priv->attached = 1;
+
+  /* This API may be called asynchronously from other initialization
+   * interfaces.  In particular, we may not want to attach the bus yet...
+   * that should only be done when the class driver is attached.  Has
+   * the class driver been attached?
+   */
+
+  if (priv->driver)
+    {
+      /* Yes.. then attach to the bus */
+
+      khci_attach(priv);
+    }
+}
+
+void khci_usbdetach(void)
+{
+  /* For now there is only one USB controller, but we will always refer to
+   * it using a pointer to make any future ports to multiple USB controllers
+   * easier.
+   */
+
+  struct khci_usbdev_s *priv = &g_usbdev;
+
+  /* Detach from the bus */
+
+  khci_detach(priv);
+}
+
+#endif /* CONFIG_USBDEV && CONFIG_KHCI_USB */
diff --git a/arch/arm/src/kinetis/kinetis_usbotg.h b/arch/arm/src/kinetis/kinetis_usbotg.h
index 127c718312d629bc98bd5c45cb983f650a53f6e8..655c7ccee9c622e1aaa6a4cb4528f52c43b7c054 100644
--- a/arch/arm/src/kinetis/kinetis_usbotg.h
+++ b/arch/arm/src/kinetis/kinetis_usbotg.h
@@ -1,7 +1,7 @@
 /********************************************************************************************
  * arch/arm/src/kinetis/kinetis_usbotg.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,287 +42,30 @@
 
 #include 
 
-#include "chip.h"
+#include "chip/kinetis_usbotg.h"
 
-/********************************************************************************************
- * Pre-processor Definitions
- ********************************************************************************************/
-
-/* Register Offsets *************************************************************************/
-
-#define KINETIS_USB_PERID_OFFSET    0x0000 /* Peripheral ID Register */
-#define KINETIS_USB_IDCOMP_OFFSET   0x0004 /* Peripheral ID Complement Register */
-#define KINETIS_USB_REV_OFFSET      0x0008 /* Peripheral Revision Register */
-#define KINETIS_USB_ADDINFO_OFFSET  0x000c /* Peripheral Additional Info Register */
-#define KINETIS_USB_OTGISTAT_OFFSET 0x0010 /* OTG Interrupt Status Register */
-#define KINETIS_USB_OTGICR_OFFSET   0x0014 /* OTG Interrupt Control Register */
-#define KINETIS_USB_OTGSTAT_OFFSET  0x0018 /* OTG Status Register */
-#define KINETIS_USB_OTGCTL_OFFSET   0x001c /* OTG Control Register */
-#define KINETIS_USB_ISTAT_OFFSET    0x0080 /* Interrupt Status Register */
-#define KINETIS_USB_INTEN_OFFSET    0x0084 /* Interrupt Enable Register */
-#define KINETIS_USB_ERRSTAT_OFFSET  0x0088 /* Error Interrupt Status Register */
-#define KINETIS_USB_ERREN_OFFSET    0x008c /* Error Interrupt Enable Register */
-#define KINETIS_USB_STAT_OFFSET     0x0090 /* Status Register */
-#define KINETIS_USB_CTL_OFFSET      0x0094 /* Control Register */
-#define KINETIS_USB_ADDR_OFFSET     0x0098 /* Address Register */
-#define KINETIS_USB_BDTPAGE1_OFFSET 0x009c /* BDT Page Register 1 */
-#define KINETIS_USB_FRMNUML_OFFSET  0x00a0 /* Frame Number Register Low */
-#define KINETIS_USB_FRMNUMH_OFFSET  0x00a4 /* Frame Number Register High */
-#define KINETIS_USB_TOKEN_OFFSET    0x00a8 /* Token Register */
-#define KINETIS_USB_SOFTHLD_OFFSET  0x00ac /* SOF Threshold Register */
-#define KINETIS_USB_BDTPAGE2_OFFSET 0x00b0 /* BDT Page Register 2 */
-#define KINETIS_USB_BDTPAGE3_OFFSET 0x00b4 /* BDT Page Register 3 */
-
-#define KINETIS_USB_ENDPT_OFFSET(n) (0x00c0+((n)<<2)) /* Endpoint n Control Register */
-#define KINETIS_USB_ENDPT0_OFFSET   0x00c0 /* Endpoint 0 Control Register */
-#define KINETIS_USB_ENDPT1_OFFSET   0x00c4 /* Endpoint 1 Control Register */
-#define KINETIS_USB_ENDPT2_OFFSET   0x00c8 /* Endpoint 2 Control Register */
-#define KINETIS_USB_ENDPT3_OFFSET   0x00cc /* Endpoint 3 Control Register */
-#define KINETIS_USB_ENDPT4_OFFSET   0x00d0 /* Endpoint 4 Control Register */
-#define KINETIS_USB_ENDPT5_OFFSET   0x00d4 /* Endpoint 5 Control Register */
-#define KINETIS_USB_ENDPT6_OFFSET   0x00d8 /* Endpoint 6 Control Register */
-#define KINETIS_USB_ENDPT7_OFFSET   0x00dc /* Endpoint 7 Control Register */
-#define KINETIS_USB_ENDPT8_OFFSET   0x00e0 /* Endpoint 8 Control Register */
-#define KINETIS_USB_ENDPT9_OFFSET   0x00e4 /* Endpoint 9 Control Register */
-#define KINETIS_USB_ENDPT10_OFFSET  0x00e8 /* Endpoint 10 Control Register */
-#define KINETIS_USB_ENDPT11_OFFSET  0x00ec /* Endpoint 11 Control Register */
-#define KINETIS_USB_ENDPT12_OFFSET  0x00f0 /* Endpoint 12 Control Register */
-#define KINETIS_USB_ENDPT13_OFFSET  0x00f4 /* Endpoint 13 Control Register */
-#define KINETIS_USB_ENDPT14_OFFSET  0x00f8 /* Endpoint 14 Control Register */
-#define KINETIS_USB_ENDPT15_OFFSET  0x00fc /* Endpoint 15 Control Register */
-
-#define KINETIS_USB_USBCTRL_OFFSET  0x0100 /* USB Control Register */
-#define KINETIS_USB_OBSERVE_OFFSET  0x0104 /* USB OTG Observe Register */
-#define KINETIS_USB_CONTROL_OFFSET  0x0108 /* USB OTG Control Register */
-#define KINETIS_USB_USBTRC0_OFFSET  0x010c /* USB Transceiver Control Register 0 */
-
-/* Register Addresses ***********************************************************************/
-
-#define KINETIS_USB0_PERID          (KINETIS_USB0_BASE+KINETIS_USB_PERID_OFFSET)
-#define KINETIS_USB0_IDCOMP         (KINETIS_USB0_BASE+KINETIS_USB_IDCOMP_OFFSET)
-#define KINETIS_USB0_REV            (KINETIS_USB0_BASE+KINETIS_USB_REV_OFFSET)
-#define KINETIS_USB0_ADDINFO        (KINETIS_USB0_BASE+KINETIS_USB_ADDINFO_OFFSET)
-#define KINETIS_USB0_OTGISTAT       (KINETIS_USB0_BASE+KINETIS_USB_OTGISTAT_OFFSET)
-#define KINETIS_USB0_OTGICR         (KINETIS_USB0_BASE+KINETIS_USB_OTGICR_OFFSET)
-#define KINETIS_USB0_OTGSTAT        (KINETIS_USB0_BASE+KINETIS_USB_OTGSTAT_OFFSET)
-#define KINETIS_USB0_OTGCTL         (KINETIS_USB0_BASE+KINETIS_USB_OTGCTL_OFFSET)
-#define KINETIS_USB0_ISTAT          (KINETIS_USB0_BASE+KINETIS_USB_ISTAT_OFFSET)
-#define KINETIS_USB0_INTEN          (KINETIS_USB0_BASE+KINETIS_USB_INTEN_OFFSET)
-#define KINETIS_USB0_ERRSTAT        (KINETIS_USB0_BASE+KINETIS_USB_ERRSTAT_OFFSET)
-#define KINETIS_USB0_ERREN          (KINETIS_USB0_BASE+KINETIS_USB_ERREN_OFFSET)
-#define KINETIS_USB0_STAT           (KINETIS_USB0_BASE+KINETIS_USB_STAT_OFFSET)
-#define KINETIS_USB0_CTL            (KINETIS_USB0_BASE+KINETIS_USB_CTL_OFFSET)
-#define KINETIS_USB0_ADDR           (KINETIS_USB0_BASE+KINETIS_USB_ADDR_OFFSET)
-#define KINETIS_USB0_BDTPAGE1       (KINETIS_USB0_BASE+KINETIS_USB_BDTPAGE1_OFFSET)
-#define KINETIS_USB0_FRMNUML        (KINETIS_USB0_BASE+KINETIS_USB_FRMNUML_OFFSET)
-#define KINETIS_USB0_FRMNUMH        (KINETIS_USB0_BASE+KINETIS_USB_FRMNUMH_OFFSET)
-#define KINETIS_USB0_TOKEN          (KINETIS_USB0_BASE+KINETIS_USB_TOKEN_OFFSET)
-#define KINETIS_USB0_SOFTHLD        (KINETIS_USB0_BASE+KINETIS_USB_SOFTHLD_OFFSET)
-#define KINETIS_USB0_BDTPAGE2       (KINETIS_USB0_BASE+KINETIS_USB_BDTPAGE2_OFFSET)
-#define KINETIS_USB0_BDTPAGE3       (KINETIS_USB0_BASE+KINETIS_USB_BDTPAGE3_OFFSET)
-
-#define KINETIS_USB0_ENDPT(n)       (KINETIS_USB0_BASE+KINETIS_USB_ENDPT_OFFSET(n))
-#define KINETIS_USB0_ENDPT0         (KINETIS_USB0_BASE+KINETIS_USB_ENDPT0_OFFSET)
-#define KINETIS_USB0_ENDPT1         (KINETIS_USB0_BASE+KINETIS_USB_ENDPT1_OFFSET)
-#define KINETIS_USB0_ENDPT2         (KINETIS_USB0_BASE+KINETIS_USB_ENDPT2_OFFSET)
-#define KINETIS_USB0_ENDPT3         (KINETIS_USB0_BASE+KINETIS_USB_ENDPT3_OFFSET)
-#define KINETIS_USB0_ENDPT4         (KINETIS_USB0_BASE+KINETIS_USB_ENDPT4_OFFSET)
-#define KINETIS_USB0_ENDPT5         (KINETIS_USB0_BASE+KINETIS_USB_ENDPT5_OFFSET)
-#define KINETIS_USB0_ENDPT6         (KINETIS_USB0_BASE+KINETIS_USB_ENDPT6_OFFSET)
-#define KINETIS_USB0_ENDPT7         (KINETIS_USB0_BASE+KINETIS_USB_ENDPT7_OFFSET)
-#define KINETIS_USB0_ENDPT8         (KINETIS_USB0_BASE+KINETIS_USB_ENDPT8_OFFSET)
-#define KINETIS_USB0_ENDPT9         (KINETIS_USB0_BASE+KINETIS_USB_ENDPT9_OFFSET)
-#define KINETIS_USB0_ENDPT10        (KINETIS_USB0_BASE+KINETIS_USB_ENDPT10_OFFSET)
-#define KINETIS_USB0_ENDPT11        (KINETIS_USB0_BASE+KINETIS_USB_ENDPT11_OFFSET)
-#define KINETIS_USB0_ENDPT12        (KINETIS_USB0_BASE+KINETIS_USB_ENDPT12_OFFSET)
-#define KINETIS_USB0_ENDPT13        (KINETIS_USB0_BASE+KINETIS_USB_ENDPT13_OFFSET)
-#define KINETIS_USB0_ENDPT14        (KINETIS_USB0_BASE+KINETIS_USB_ENDPT14_OFFSET)
-#define KINETIS_USB0_ENDPT15        (KINETIS_USB0_BASE+KINETIS_USB_ENDPT15_OFFSET)
-
-#define KINETIS_USB0_USBCTRL        (KINETIS_USB0_BASE+KINETIS_USB_USBCTRL_OFFSET)
-#define KINETIS_USB0_OBSERVE        (KINETIS_USB0_BASE+KINETIS_USB_OBSERVE_OFFSET)
-#define KINETIS_USB0_CONTROL        (KINETIS_USB0_BASE+KINETIS_USB_CONTROL_OFFSET)
-#define KINETIS_USB0_USBTRC0        (KINETIS_USB0_BASE+KINETIS_USB_USBTRC0_OFFSET)
-
-/* Register Bit Definitions *****************************************************************/
-
-/* Peripheral ID Register (8-bit) */
-                                              /* Bits 6-7: Reserved */
-#define USB_PERID_MASK              (0x3f)    /* Bits 0-5: Peripheral identification bits */
-
-/* Peripheral ID Complement Register (8-bit) */
-#define USB_IDCOMP_
-                                              /* Bits 6-7: Reserved */
-#define USB_IDCOMP_MASK             (0x3f)    /* Bits 0-5: Ones complement of peripheral identification bits */
-
-/* Peripheral Revision Register (8-bit revision number) */
-
-/* Peripheral Additional Info Register (8-bit) */
-
-#define USB_ADDINFO_IEHOST          (1 << 0)  /* Bit 0:  This bit is set if host mode is enabled */
-                                              /* Bits 1-2: Reserved */
-#define USB_ADDINFO_IRQNUM_SHIFT    (3)       /* Bits 3-7: Assigned Interrupt Request Number */
-#define USB_ADDINFO_IRQNUM_MASK     (31 << USB_ADDINFO_IRQNUM_SHIFT)
-
-/* OTG Interrupt Status Register(8-bit)  */
-
-#define USB_OTGISTAT_AVBUSCHG       (1 << 0)  /* Bit 0:  Change in VBUS is detected on an A device */
-                                              /* Bit 1:  Reserved */
-#define USB_OTGISTAT_B_SESS_CHG     (1 << 2)  /* Bit 2:  Change in VBUS is detected on a B device */
-#define USB_OTGISTAT_SESSVLDCHG     (1 << 3)  /* Bit 3:  Change in VBUS is detected */
-                                              /* Bit 4:  Reserved */
-#define USB_OTGISTAT_LINE_STATE_CHG (1 << 5)  /* Bit 5:  Change USB line state */
-#define USB_OTGISTAT_ONEMSEC        (1 << 6)  /* Bit 6:  Set when the 1 millisecond timer expires */
-#define USB_OTGISTAT_IDCHG          (1 << 7)  /* Bit 7:  Change in ID Signal from the USB connector */
-
-/* OTG Interrupt Control Register (8-bit) */
-
-#define USB_OTGICR_AVBUSEN          (1 << 0)  /* Bit 0:  A VBUS Valid interrupt enable */
-                                              /* Bit 1:  Reserved */
-#define USB_OTGICR_BSESSEN          (1 << 2)  /* Bit 2:  B Session END interrupt enable */
-#define USB_OTGICR_SESSVLDEN        (1 << 3)  /* Bit 3:  Session valid interrupt enable */
-                                              /* Bit 4:  Reserved */
-#define USB_OTGICR_LINESTATEEN      (1 << 5)  /* Bit 5:  Line State change interrupt enable */
-#define USB_OTGICR_ONEMSECEN        (1 << 6)  /* Bit 6:  1 millisecond interrupt enable */
-#define USB_OTGICR_IDEN             (1 << 7)  /* Bit 7:  ID interrupt enable */
-
-/* OTG Status Register (8-bit) */
-
-#define USB_OTGSTAT_AVBUSVLD        (1 << 0)  /* Bit 0:  A VBUS Valid */
-                                              /* Bit 1:  Reserved */
-#define USB_OTGSTAT_BSESSEND        (1 << 2)  /* Bit 2:  B Session END */
-#define USB_OTGSTAT_SESS_VLD        (1 << 3)  /* Bit 3:  Session valid */
-                                              /* Bit 4:  Reserved */
-#define USB_OTGSTAT_LINESTATESTABLE (1 << 5)  /* Bit 5:  OTGISTAT LINE_STATE_CHG bit stable */
-#define USB_OTGSTAT_ONEMSECEN       (1 << 6)  /* Bit 6:  Reserved for the 1msec count */
-#define USB_OTGSTAT_ID              (1 << 7)  /* Bit 7:  Current state of the ID pin on the USB connector */
-
-/* OTG Control Register (8-bit) */
-                                              /* Bits 0-1:  Reserved */
-#define USB_OTGCTL_OTGEN            (1 << 2)  /* Bit 2:  On-The-Go pullup/pulldown resistor enable */
-                                              /* Bit 3:  Reserved */
-#define USB_OTGCTL_DMLOW            (1 << 4)  /* Bit 4:  D- Data Line pull-down resistor enable */
-#define USB_OTGCTL_DPLOW            (1 << 5)  /* Bit 5:  D+ Data Line pull-down resistor enable */
-                                              /* Bit 6:  Reserved */
-#define USB_OTGCTL_DPHIGH           (1 << 7)  /* Bit 7: D+ Data Line pullup resistor enable */
-
-/* Interrupt Status Register Interrupt Enable Register (8-bit) */
-
-#define USB_INT_USBRST              (1 << 0)  /* Bit 0:  USB Module has decoded a valid USB reset */
-#define USB_INT_ERROR               (1 << 1)  /* Bit 1:  Any of the error conditions within the ERRSTAT register */
-#define USB_INT_SOFTOK              (1 << 2)  /* Bit 2:  USB Module received a Start Of Frame (SOF) token */
-#define USB_INT_TOKDNE              (1 << 3)  /* Bit 3:  Current token being processed has completed */
-#define USB_INT_SLEEP               (1 << 4)  /* Bit 4:  Constant idle on the USB bus for 3 milliseconds */
-#define USB_INT_RESUME              (1 << 5)  /* Bit 5:  Signal remote wake-up signaling */
-#define USB_INT_ATTACH              (1 << 6)  /* Bit 6:  Attach Interrupt */
-#define USB_INT_STALL               (1 << 7)  /* Bit 7:  Stall Interrupt */
-
-/* Error Interrupt Status Register and Error Interrupt Enable Register (8-bit) */
-
-#define USB_ERRSTAT_PIDERR          (1 << 0)  /* Bit 0:  This bit is set when the PID check field fails */
-#define USB_ERRSTAT_CRC5EOF         (1 << 1)  /* Bit 1:  Host data CRC error or End of frame errors */
-#define USB_ERRSTAT_CRC16           (1 << 2)  /* Bit 2:  Data packet is rejected due to a CRC16 error */
-#define USB_ERRSTAT_DFN8            (1 << 3)  /* Bit 3:  Data field received was not 8 bits in length */
-#define USB_ERRSTAT_BTOERR          (1 << 4)  /* Bit 4:  Bus turnaround timeout error occurred */
-#define USB_ERRSTAT_DMAERR          (1 << 5)  /* Bit 5:  DMA error */
-                                              /* Bit 6:  Reserved */
-#define USB_ERRSTAT_BTSERR          (1 << 7)  /* Bit 7:  Bit stuff error is detected */
-
-/* Status Register (8-bit) */
-
-                                              /* Bits 0-1:  Reserved */
-#define USB_STAT_ODD                (1 << 2)  /* Bit 2:  Last Buffer Descriptor was in the odd bank of the BDT */
-#define USB_STAT_TX                 (1 << 3)  /* Bit 3:  Transmit Indicator */
-#define USB_STAT_ENDP_SHIFT         (4)       /* Bits 4-7: Endpoint address that received or transmitted the token */
-#define USB_STAT_ENDP_MASK          (15 << USB_STAT_ENDP_SHIFT)
-
-/* Control Register (8-bit) */
-
-#define USB_CTL_USBENSOFEN          (1 << 0)  /* Bit 0:  USB Enable */
-#define USB_CTL_ODDRST              (1 << 1)  /* Bit 1:  Resets all the BDT ODD ping/pong bits to 0 */
-#define USB_CTL_RESUME              (1 << 2)  /* Bit 2:  Enables the USB Module to execute resume signaling */
-#define USB_CTL_HOSTMODEEN          (1 << 3)  /* Bit 3:  Enables the USB Module to operate in Host mode */
-#define USB_CTL_RESET               (1 << 4)  /* Bit 4:  Enables the USB Module to generate USB reset signaling */
-#define USB_CTL_TXSUSPENDTOKENBUSY  (1 << 5)  /* Bit 5:  USB Module is busy executing a USB token */
-#define USB_CTL_SE0                 (1 << 6)  /* Bit 6:  Live USB Single Ended Zero signal */
-#define USB_CTL_JSTATE              (1 << 7)  /* Bit 7:  Live USB differential receiver JSTATE signal */
-
-/* Address Register (8-bit) */
-
-#define USB_ADDR_LSEN               (1 << 7)  /* Bit 7:  Low Speed Enable bit */
-#define USB_ADDR_SHIFT              (0)       /* Bits 0-6: USB address */
-#define USB_ADDR_MASK               (0x7f << USB_ADDR_SHIFT)
-
-/* BDT Page Register 1 (8-bit) */
-                                              /* Bit 0:  Reserved */
-#define USB_BDTPAGE1_SHIFT          (1)       /* Bits 1-7: Address bits 9-15 of the BDT base address */
-#define USB_BDTPAGE1_MASK           (0x7f << USB_BDTPAGE1_SHIFT)
-
-/* Frame Number Register Low (8-bit, bits 0-7 of the 11 bit frame number) */
-/* Frame Number Register High (8-bit) */
-                                              /* Bits 3-7:  Reserved */
-#define USB_FRMNUMH_SHIFT           (0)       /* Bits 0-2: Bits 8-10 of the 11-bit frame number */
-#define USB_FRMNUMH_MASK            (7 << USB_FRMNUMH_SHIFT)
-
-/* Token Register (8-bit) */
-
-#define USB_TOKEN_ENDPT_SHIFT       (0)       /* Bits 0-3: Endpoint address for the token command */
-#define USB_TOKEN_ENDPT_MASK        (15 << USB_TOKEN_ENDPT_SHIFT)
-#define USB_TOKEN_PID_SHIFT         (4)       /* Bits 4-7: Token type executed by the USB Module */
-#define USB_TOKEN_PID_MASK          (15 << USB_TOKEN_PID_SHIFT)
-#  define USB_TOKEN_PID_OUT         (1 << USB_TOKEN_PID_SHIFT)  /* OUT Token */
-#  define USB_TOKEN_PID_IN          (9 << USB_TOKEN_PID_SHIFT)  /* IN Token */
-#  define USB_TOKEN_PID_SETUP       (13 << USB_TOKEN_PID_SHIFT) /* SETUP Token */
-
-/* SOF Threshold Register (8-bit count value) */
-/* BDT Page Register 2/3 (16 bit address in two 8-bit registers) */
-
-/* Endpoint n Control Register (8-bit) */
-
-#define USB_ENDPT_EPHSHK            (1 << 0)  /* Bit 0:  Enable handshaking during a transaction to the endpoint */
-#define USB_ENDPT_EPSTALL           (1 << 1)  /* Bit 1:  Endpoint is stalled */
-#define USB_ENDPT_EPTXEN            (1 << 2)  /* Bit 2:  Enable the endpoint for TX transfers */
-#define USB_ENDPT_EPRXEN            (1 << 3)  /* Bit 3:  Enable the endpoint for RX transfers */
-#define USB_ENDPT_EPCTLDIS          (1 << 4)  /* Bit 4:  Disable control (SETUP) transfers */
-                                              /* Bit 5:  Reserved */
-#define USB_ENDPT_RETRYDIS          (1 << 6)  /* Bit 6:  Disable host retry NAK'ed transactions (host EP0) */
-#define USB_ENDPT_HOSTWOHUB         (1 << 7)  /* Bit 7:  Allows the host to communicate to a low speed device (host EP0) */
-
-/* USB Control Register (8-bit) */
-                                              /* Bits 0-5:  Reserved */
-#define USB_USBCTRL_PDE             (1 << 6)  /* Bit 6:  Enables the weak pulldowns on the USB transceiver */
-#define USB_USBCTRL_SUSP            (1 << 7)  /* Bit 7:  Places the USB transceiver into the suspend state */
-
-/* USB OTG Observe Register (8-bit) */
-                                              /* Bits 0-3:  Reserved */
-#define USB_OBSERVE_DMPD            (1 << 4)  /* Bit 4:  D- Pull Down signal output from the USB OTG module */
-                                              /* Bit 5:  Reserved */
-#define USB_OBSERVE_DPPD            (1 << 6)  /* Bit 6:  D+ Pull Down signal output from the USB OTG module */
-#define USB_OBSERVE_DPPU            (1 << 7)  /* Bit 7:  D+ Pull Up signal output from the USB OTG module */
-
-/* USB OTG Control Register (8-bit) */
-                                              /* Bits 0-3:  Reserved */
-#define USB_CONTROL_DPPULLUPNONOTG  (1 << 4)  /* Bit 4:  Controls of the DP PULLUP in the USB OTG module */
-                                              /* Bits 5-7:  Reserved */
-/* USB Transceiver Control Register 0 (8-bit) */
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
 
-#define USB_USBTRC0_USBRESET        (1 << 7)  /* Bit 7:  USB reset */
-                                              /* Bit 6:  Reserved */
-#define USB_USBTRC0_USBRESMEN       (1 << 5)  /* Bit 5:  Asynchronous Resume Interrupt Enable */
-                                              /* Bits 2-4:  Reserved */
-#define USB_USBTRC0_SYNC_DET        (1 << 1)  /* Bit 1:  Synchronous USB Interrupt Detect */
-#define USB_USBTRC0_RESUME_INT      (1 << 0)  /* Bit 0:  USB Asynchronous Interrupt */
+#ifndef __ASSEMBLY__
 
-/********************************************************************************************
- * Public Types
- ********************************************************************************************/
+/* Buffer Descriptor Status Register layout. */
 
-/********************************************************************************************
- * Public Data
- ********************************************************************************************/
+struct usbotg_bdtentry_s
+{
+  uint32_t status;  /* Status, byte count, and PID */
+  uint8_t *addr;    /* Buffer address */
+};
+#endif
 
 /********************************************************************************************
  * Public Functions
  ********************************************************************************************/
 
+struct usbdev_s;
+int kinetis_usbpullup(FAR struct usbdev_s *dev,  bool enable);
+void kinetis_usbsuspend(FAR struct usbdev_s *dev, bool resume);
+void khci_usbattach(void);
+
 #endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_USBOTG_H */
diff --git a/arch/arm/src/kinetis/kinetis_vectors.S b/arch/arm/src/kinetis/kinetis_vectors.S
index 75c295ae033342bc25f0f64c80aa99beee7e3372..48c74c705974668caf40465d773cd2fa91daebd1 100644
--- a/arch/arm/src/kinetis/kinetis_vectors.S
+++ b/arch/arm/src/kinetis/kinetis_vectors.S
@@ -1,9 +1,9 @@
-/************************************************************************************************
+/*****************************************************************************
  * arch/arm/src/kinetis/kinetis_vectors.S
- * arch/arm/src/chip/kinetis_vectors.S
  *
- *   Copyright (C) 2011, 2013-2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2011, 2013-2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -32,35 +32,38 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ************************************************************************************************/
+ ****************************************************************************/
 
-/************************************************************************************************
+/*****************************************************************************
  * Included Files
- ************************************************************************************************/
+ ****************************************************************************/
 
 #include 
 
 #include 
 
+#include "chip.h"
 #include "exc_return.h"
 
-/************************************************************************************************
+/*****************************************************************************
  * Pre-processor Definitions
- ************************************************************************************************/
-/* Configuration ********************************************************************************/
+ ****************************************************************************/
+/* Configuration ************************************************************/
 
 #ifdef CONFIG_ARCH_HIPRI_INTERRUPT
-  /* In kernel mode without an interrupt stack, this interrupt handler will set the MSP to the
-   * stack pointer of the interrupted thread.  If the interrupted thread was a privileged
-   * thread, that will be the MSP otherwise it will be the PSP.  If the PSP is used, then the
-   * value of the MSP will be invalid when the interrupt handler returns because it will be a
-   * pointer to an old position in the unprivileged stack.  Then when the high priority
-   * interrupt occurs and uses this stale MSP, there will most likely be a system failure.
+  /* In kernel mode without an interrupt stack, this interrupt handler will set the
+   * MSP to the stack pointer of the interrupted thread.  If the interrupted thread
+   * was a privileged thread, that will be the MSP otherwise it will be the PSP.  If
+   * the PSP is used, then the value of the MSP will be invalid when the interrupt
+   * handler returns because it will be a pointer to an old position in the
+   * unprivileged stack.  Then when the high priority interrupt occurs and uses this
+   * stale MSP, there will most likely be a system failure.
    *
-   * If the interrupt stack is selected, on the other hand, then the interrupt handler will
-   * always set the the MSP to the interrupt stack.  So when the high priority interrupt occurs,
-   * it will either use the MSP of the last privileged thread to run or, in the case of the
-   * nested interrupt, the interrupt stack if no privileged task has run.
+   * If the interrupt stack is selected, on the other hand, then the interrupt
+   * handler will always set the the MSP to the interrupt stack.  So when the high
+   * priority interrupt occurs, it will either use the MSP of the last privileged
+   * thread to run or, in the case of the nested interrupt, the interrupt stack if
+   * no privileged task has run.
    */
 
 #  if defined(CONFIG_BUILD_PROTECTED) && CONFIG_ARCH_INTERRUPTSTACK < 4
@@ -76,7 +79,7 @@
 #  endif
 #endif
 
-/* Memory Map ***********************************************************************************/
+/* Memory Map ***********************************************************************/
 /*
  * 0x0000:0000 - Beginning of FLASH. Address of vectors
  * 0x1800:0000 - Start of CPU SRAM and start of .data (_sdata)
@@ -91,9 +94,9 @@
 #define IDLE_STACK		(_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
 #define HEAP_BASE		(_ebss+CONFIG_IDLETHREAD_STACKSIZE)
 
-/************************************************************************************************
+/************************************************************************************
  * Public Symbols
- ************************************************************************************************/
+ ************************************************************************************/
 
 	.syntax		unified
 	.thumb
@@ -105,9 +108,9 @@
 
 	.globl		__start
 
-/************************************************************************************************
+/************************************************************************************
  * Macros
- ************************************************************************************************/
+ ************************************************************************************/
 
 /* On entry into an IRQ, the hardware automatically saves the xPSR, PC, LR, R12, R0-R3
  * registers on the stack, then branches to an instantantiation of the following
@@ -122,9 +125,9 @@
 	b		exception_common
 	.endm
 
-/************************************************************************************************
+/************************************************************************************
  * Vectors
- ************************************************************************************************/
+ ************************************************************************************/
 
 	.section	.vectors, "ax"
 	.code		16
@@ -134,7 +137,7 @@
 
 _vectors:
 
-/* Processor Exceptions *************************************************************************/
+/* Processor Exceptions */
 
 	.word	IDLE_STACK			/* Vector  0: Reset stack pointer */
 	.word	__start				/* Vector  1: Reset vector */
@@ -153,346 +156,38 @@ _vectors:
 	.word	kinetis_pendsv		/* Vector 14: Pendable system service request */
 	.word	kinetis_systick		/* Vector 15: System tick */
 
-/* External Interrupts **************************************************************************/
-/* K20 Family ***********************************************************************************
- *
- * The interrupt vectors  for the following parts is defined in Freescale document
- * K20P64M72SF1RM
- */
-
-#if defined(CONFIG_ARCH_CHIP_MK20DX256VLH7)
-	.word	kinetis_dmach0		/* Vector 16: DMA channel 0 transfer complete */
-	.word	kinetis_dmach1		/* Vector 17: DMA channel 1 transfer complete */
-	.word	kinetis_dmach2		/* Vector 18: DMA channel 2 transfer complete */
-	.word	kinetis_dmach3		/* Vector 19: DMA channel 3 transfer complete */
-	.word	kinetis_dmach4		/* Vector 20: DMA channel 4 transfer complete */
-	.word	kinetis_dmach5		/* Vector 21: DMA channel 5 transfer complete */
-	.word	kinetis_dmach6		/* Vector 22: DMA channel 6 transfer complete */
-	.word	kinetis_dmach7		/* Vector 23: DMA channel 7 transfer complete */
-	.word	kinetis_dmach8		/* Vector 24: DMA channel 8 transfer complete */
-	.word	kinetis_dmach9		/* Vector 25: DMA channel 9 transfer complete */
-	.word	kinetis_dmach10		/* Vector 26: DMA channel 10 transfer complete */
-	.word	kinetis_dmach11		/* Vector 27: DMA channel 11 transfer complete */
-	.word	kinetis_dmach12		/* Vector 28: DMA channel 12 transfer complete */
-	.word	kinetis_dmach13		/* Vector 29: DMA channel 13 transfer complete */
-	.word	kinetis_dmach14		/* Vector 30: DMA channel 14 transfer complete */
-	.word	kinetis_dmach15		/* Vector 31: DMA channel 15 transfer complete */
-	.word	kinetis_dmaerr		/* Vector 32: DMA error interrupt channels 0-15 */
-	.word	kinetis_reserved	/* Vector 33: Reserved */
-	.word	kinetis_flashcc		/* Vector 34: Flash memory command complete */
-	.word	kinetis_flashrc		/* Vector 35: Flash memory read collision */
-	.word	kinetis_smclvd		/* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
-	.word	kinetis_llwu		/* Vector 37: LLWU Normal Low Leakage Wakeup */
-	.word	kinetis_wdog		/* Vector 38: Watchdog */
-	.word	kinetis_reserved	/* Vector 39: Reserved */
-	.word	kinetis_i2c0		/* Vector 40: I2C0 */
-	.word	kinetis_i2c1		/* Vector 41: I2C1 */
-	.word	kinetis_spi0		/* Vector 42: SPI0 all sources */
-	.word	kinetis_spi1		/* Vector 43: SPI1 all sources */
-	.word	kinetis_reserved	/* Vector 44: Reserved */
-	.word	kinetis_can0mb		/* Vector 45: CAN0 OR'ed Message buffer (0-15) */
-	.word	kinetis_can0bo		/* Vector 46: CAN0 Bus Off */
-	.word	kinetis_can0err		/* Vector 47: CAN0 Error */
-	.word	kinetis_can0tw		/* Vector 48: CAN0 Transmit Warning */
-	.word	kinetis_can0rw		/* Vector 49: CAN0 Receive Warning */
-	.word	kinetis_can0wu		/* Vector 50: CAN0 Wake UP */
-	.word	kinetis_reserved	/* Vector 51: Reserved */
-	.word	kinetis_reserved	/* Vector 52: Reserved */
-	.word	kinetis_reserved	/* Vector 53: Reserved */
-	.word	kinetis_reserved	/* Vector 54: Reserved */
-	.word	kinetis_reserved	/* Vector 55: Reserved */
-	.word	kinetis_reserved	/* Vector 56: Reserved */
-	.word	kinetis_reserved	/* Vector 57: Reserved */
-	.word	kinetis_reserved	/* Vector 58: Reserved */
-	.word	kinetis_reserved	/* Vector 59: Reserved */
-	.word	kinetis_reserved	/* Vector 60: Reserved */
-	.word	kinetis_uart0s		/* Vector 61: UART0 status */
-	.word	kinetis_uart0e		/* Vector 62: UART0 error */
-	.word	kinetis_uart1s		/* Vector 63: UART1 status */
-	.word	kinetis_uart1e		/* Vector 64: UART1 error */
-	.word	kinetis_uart2s		/* Vector 65: UART2 status */
-	.word	kinetis_uart2e		/* Vector 66: UART2 error */
-	.word	kinetis_reserved	/* Vector 67: Reserved */
-	.word	kinetis_reserved	/* Vector 68: Reserved */
-	.word	kinetis_reserved	/* Vector 69: Reserved */
-	.word	kinetis_reserved	/* Vector 70: Reserved */
-	.word	kinetis_reserved	/* Vector 71: Reserved */
-	.word	kinetis_reserved	/* Vector 72: Reserved */
-	.word	kinetis_adc0		/* Vector 73: ADC0 */
-	.word	kinetis_adc1		/* Vector 74: ADC1 */
-	.word	kinetis_cmp0		/* Vector 75: CMP0 */
-	.word	kinetis_cmp1		/* Vector 76: CMP1 */
-	.word	kinetis_cmp2		/* Vector 77: CMP2 */
-	.word	kinetis_ftm0		/* Vector 78: FTM0 all sources */
-	.word	kinetis_ftm1		/* Vector 79: FTM1 all sources */
-	.word	kinetis_ftm2		/* Vector 80: FTM2 all sources */
-	.word	kinetis_cmt			/* Vector 81: CMT */
-	.word	kinetis_rtc			/* Vector 82: RTC alarm interrupt */
-	.word	kinetis_reserved	/* Vector 83: Reserved */
-	.word	kinetis_pitch0		/* Vector 84: PIT channel 0 */
-	.word	kinetis_pitch1		/* Vector 85: PIT channel 1 */
-	.word	kinetis_pitch2		/* Vector 86: PIT channel 2 */
-	.word	kinetis_pitch3		/* Vector 87: PIT channel 3 */
-	.word	kinetis_pdb			/* Vector 88: PDB */
-	.word	kinetis_usbotg		/* Vector 88: USB OTG */
-	.word	kinetis_usbcd		/* Vector 90: USB charger detect */
-	.word	kinetis_reserved	/* Vector 91: Reserved */
-	.word	kinetis_reserved	/* Vector 92: Reserved */
-	.word	kinetis_reserved	/* Vector 93: Reserved */
-	.word	kinetis_reserved	/* Vector 94: Reserved */
-	.word	kinetis_reserved	/* Vector 95: Reserved */
-	.word	kinetis_reserved	/* Vector 96: Reserved */
-	.word	kinetis_dac0		/* Vector 97: DAC0 */
-	.word	kinetis_reserved	/* Vector 98: Reserved */
-	.word	kinetis_tsi			/* Vector 99: TSI all sources */
-	.word	kinetis_mcg			/* Vector 100: MCG */
-	.word	kinetis_lpt			/* Vector 101: Low power timer */
-	.word	kinetis_reserved	/* Vector 102: Reserved */
-	.word	kinetis_porta		/* Vector 103: Pin detect port A */
-	.word	kinetis_portb		/* Vector 104: Pin detect port B */
-	.word	kinetis_portc		/* Vector 105: Pin detect port C */
-	.word	kinetis_portd		/* Vector 106: Pin detect port D */
-	.word	kinetis_porte		/* Vector 107: Pin detect port E */
-	.word	kinetis_reserved	/* Vector 108: Reserved */
-	.word	kinetis_reserved	/* Vector 109: Reserved */
-	.word	kinetis_swi			/* Vector 110: Software interrupt */
-
-/* K40 Family ***********************************************************************************
- *
- * The interrupt vectors  for the following parts is defined in Freescale document
- * K40P144M100SF2RM
- */
-
-#elif defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100) || \
-    defined(CONFIG_ARCH_CHIP_MK40X256VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X256VMD100) || \
-    defined(CONFIG_ARCH_CHIP_MK40N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK40N512VMD100)
-
-	.word	kinetis_dmach0		/* Vector 16: DMA channel 0 transfer complete */
-	.word	kinetis_dmach1		/* Vector 17: DMA channel 1 transfer complete */
-	.word	kinetis_dmach2		/* Vector 18: DMA channel 2 transfer complete */
-	.word	kinetis_dmach3		/* Vector 19: DMA channel 3 transfer complete */
-	.word	kinetis_dmach4		/* Vector 20: DMA channel 4 transfer complete */
-	.word	kinetis_dmach5		/* Vector 21: DMA channel 5 transfer complete */
-	.word	kinetis_dmach6		/* Vector 22: DMA channel 6 transfer complete */
-	.word	kinetis_dmach7		/* Vector 23: DMA channel 7 transfer complete */
-	.word	kinetis_dmach8		/* Vector 24: DMA channel 8 transfer complete */
-	.word	kinetis_dmach9		/* Vector 25: DMA channel 9 transfer complete */
-	.word	kinetis_dmach10		/* Vector 26: DMA channel 10 transfer complete */
-	.word	kinetis_dmach11		/* Vector 27: DMA channel 11 transfer complete */
-	.word	kinetis_dmach12		/* Vector 28: DMA channel 12 transfer complete */
-	.word	kinetis_dmach13		/* Vector 29: DMA channel 13 transfer complete */
-	.word	kinetis_dmach14		/* Vector 30: DMA channel 14 transfer complete */
-	.word	kinetis_dmach15		/* Vector 31: DMA channel 15 transfer complete */
-	.word	kinetis_dmaerr		/* Vector 32: DMA error interrupt channels 0-15 */
-	.word	kinetis_mcm			/* Vector 33: MCM Normal interrupt */
-	.word	kinetis_flashcc		/* Vector 34: Flash memory command complete */
-	.word	kinetis_flashrc		/* Vector 35: Flash memory read collision */
-	.word	kinetis_smclvd		/* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
-	.word	kinetis_llwu		/* Vector 37: LLWU Normal Low Leakage Wakeup */
-	.word	kinetis_wdog		/* Vector 38: Watchdog */
-	.word	kinetis_reserved	/* Vector 39: Reserved */
-	.word	kinetis_i2c0		/* Vector 40: I2C0 */
-	.word	kinetis_i2c1		/* Vector 41: I2C1 */
-	.word	kinetis_spi0		/* Vector 42: SPI0 all sources */
-	.word	kinetis_spi1		/* Vector 43: SPI1 all sources */
-	.word	kinetis_spi2		/* Vector 44: SPI2 all sources */
-	.word	kinetis_can0mb		/* Vector 45: CAN0 OR'ed Message buffer (0-15) */
-	.word	kinetis_can0bo		/* Vector 46: CAN0 Bus Off */
-	.word	kinetis_can0err		/* Vector 47: CAN0 Error */
-	.word	kinetis_can0tw		/* Vector 48: CAN0 Transmit Warning */
-	.word	kinetis_can0rw		/* Vector 49: CAN0 Receive Warning */
-	.word	kinetis_can0wu		/* Vector 50: CAN0 Wake UP */
-	.word	kinetis_reserved	/* Vector 51: Reserved */
-	.word	kinetis_reserved	/* Vector 52: Reserved */
-	.word	kinetis_can1mb		/* Vector 53: CAN1 OR'ed Message buffer (0-15) */
-	.word	kinetis_can1bo		/* Vector 54: CAN1 Bus Off */
-	.word	kinetis_can1err		/* Vector 55: CAN1 Error */
-	.word	kinetis_can1tw		/* Vector 56: CAN1 Transmit Warning */
-	.word	kinetis_can1rw		/* Vector 57: CAN1 Receive Warning */
-	.word	kinetis_can1wu		/* Vector 58: CAN1 Wake UP */
-	.word	kinetis_reserved	/* Vector 59: Reserved */
-	.word	kinetis_reserved	/* Vector 60: Reserved */
-	.word	kinetis_uart0s		/* Vector 61: UART0 status */
-	.word	kinetis_uart0e		/* Vector 62: UART0 error */
-	.word	kinetis_uart1s		/* Vector 63: UART1 status */
-	.word	kinetis_uart1e		/* Vector 64: UART1 error */
-	.word	kinetis_uart2s		/* Vector 65: UART2 status */
-	.word	kinetis_uart2e		/* Vector 66: UART2 error */
-	.word	kinetis_uart3s		/* Vector 67: UART3 status */
-	.word	kinetis_uart3e		/* Vector 68: UART3 error */
-	.word	kinetis_uart4s		/* Vector 69: UART4 status */
-	.word	kinetis_uart4e		/* Vector 70: UART4 error */
-	.word	kinetis_uart5s		/* Vector 71: UART5 status */
-	.word	kinetis_uart5e		/* Vector 72: UART5 error */
-	.word	kinetis_adc0		/* Vector 73: ADC0 */
-	.word	kinetis_adc1		/* Vector 74: ADC1 */
-	.word	kinetis_cmp0		/* Vector 75: CMP0 */
-	.word	kinetis_cmp1		/* Vector 76: CMP1 */
-	.word	kinetis_cmp2		/* Vector 77: CMP2 */
-	.word	kinetis_ftm0		/* Vector 78: FTM0 all sources */
-	.word	kinetis_ftm1		/* Vector 79: FTM1 all sources */
-	.word	kinetis_ftm2		/* Vector 80: FTM2 all sources */
-	.word	kinetis_cmt			/* Vector 81: CMT */
-	.word	kinetis_rtc			/* Vector 82: RTC alarm interrupt */
-	.word	kinetis_reserved	/* Vector 83: Reserved */
-	.word	kinetis_pitch0		/* Vector 84: PIT channel 0 */
-	.word	kinetis_pitch1		/* Vector 85: PIT channel 1 */
-	.word	kinetis_pitch2		/* Vector 86: PIT channel 2 */
-	.word	kinetis_pitch3		/* Vector 87: PIT channel 3 */
-	.word	kinetis_pdb			/* Vector 88: PDB */
-	.word	kinetis_usbotg		/* Vector 88: USB OTG */
-	.word	kinetis_usbcd		/* Vector 90: USB charger detect */
-	.word	kinetis_reserved	/* Vector 91: Reserved */
-	.word	kinetis_reserved	/* Vector 92: Reserved */
-	.word	kinetis_reserved	/* Vector 93: Reserved */
-	.word	kinetis_reserved	/* Vector 94: Reserved */
-	.word	kinetis_i2s0		/* Vector 95: I2S0 */
-	.word	kinetis_sdhc		/* Vector 96: SDHC */
-	.word	kinetis_dac0		/* Vector 97: DAC0 */
-	.word	kinetis_dac1		/* Vector 98: DAC1 */
-	.word	kinetis_tsi			/* Vector 97: TSI all sources */
-	.word	kinetis_mcg			/* Vector 100: MCG */
-	.word	kinetis_lpt			/* Vector 101: Low power timer */
-	.word	kinetis_slcd		/* Vector 102: Segment LCD all sources */
-	.word	kinetis_porta		/* Vector 103: Pin detect port A */
-	.word	kinetis_portb		/* Vector 104: Pin detect port B */
-	.word	kinetis_portc		/* Vector 105: Pin detect port C */
-	.word	kinetis_portd		/* Vector 106: Pin detect port D */
-	.word	kinetis_porte		/* Vector 107: Pin detect port E */
-	.word	kinetis_reserved	/* Vector 108: Reserved */
-	.word	kinetis_reserved	/* Vector 109: Reserved */
-	.word	kinetis_swi			/* Vector 110: Software interrupt */
-
-/* K60 Family ***********************************************************************************
- *
- * The memory map for the following parts is defined in Freescale document
- * K60P144M100SF2RM
- */
-
-#elif defined(CONFIG_ARCH_CHIP_MK60N256VLQ100) || defined(CONFIG_ARCH_CHIP_MK60X256VLQ100) || \
-      defined(CONFIG_ARCH_CHIP_MK60N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK60N256VMD100) || \
-      defined(CONFIG_ARCH_CHIP_MK60X256VMD100) || defined(CONFIG_ARCH_CHIP_MK60N512VMD100) || \
-      defined(CONFIG_ARCH_CHIP_MK60N512VLL100)
-
-	.word	kinetis_dmach0		/* Vector 16: DMA channel 0 transfer complete */
-	.word	kinetis_dmach1		/* Vector 17: DMA channel 1 transfer complete */
-	.word	kinetis_dmach2		/* Vector 18: DMA channel 2 transfer complete */
-	.word	kinetis_dmach3		/* Vector 19: DMA channel 3 transfer complete */
-	.word	kinetis_dmach4		/* Vector 20: DMA channel 4 transfer complete */
-	.word	kinetis_dmach5		/* Vector 21: DMA channel 5 transfer complete */
-	.word	kinetis_dmach6		/* Vector 22: DMA channel 6 transfer complete */
-	.word	kinetis_dmach7		/* Vector 23: DMA channel 7 transfer complete */
-	.word	kinetis_dmach8		/* Vector 24: DMA channel 8 transfer complete */
-	.word	kinetis_dmach9		/* Vector 25: DMA channel 9 transfer complete */
-	.word	kinetis_dmach10		/* Vector 26: DMA channel 10 transfer complete */
-	.word	kinetis_dmach11		/* Vector 27: DMA channel 11 transfer complete */
-	.word	kinetis_dmach12		/* Vector 28: DMA channel 12 transfer complete */
-	.word	kinetis_dmach13		/* Vector 29: DMA channel 13 transfer complete */
-	.word	kinetis_dmach14		/* Vector 30: DMA channel 14 transfer complete */
-	.word	kinetis_dmach15		/* Vector 31: DMA channel 15 transfer complete */
-	.word	kinetis_dmaerr		/* Vector 32: DMA error interrupt channels 0-15 */
-	.word	kinetis_mcm			/* Vector 33: MCM Normal interrupt */
-	.word	kinetis_flashcc		/* Vector 34: Flash memory command complete */
-	.word	kinetis_flashrc		/* Vector 35: Flash memory read collision */
-	.word	kinetis_smclvd		/* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
-	.word	kinetis_llwu		/* Vector 37: LLWU Normal Low Leakage Wakeup */
-	.word	kinetis_wdog		/* Vector 38: Watchdog */
-	.word	kinetis_rngb		/* Vector 39: Random number generator */
-	.word	kinetis_i2c0		/* Vector 40: I2C0 */
-	.word	kinetis_i2c1		/* Vector 41: I2C1 */
-	.word	kinetis_spi0		/* Vector 42: SPI0 all sources */
-	.word	kinetis_spi1		/* Vector 43: SPI1 all sources */
-	.word	kinetis_spi2		/* Vector 44: SPI2 all sources */
-	.word	kinetis_can0mb		/* Vector 45: CAN0 OR'ed Message buffer (0-15) */
-	.word	kinetis_can0bo		/* Vector 46: CAN0 Bus Off */
-	.word	kinetis_can0err		/* Vector 47: CAN0 Error */
-	.word	kinetis_can0tw		/* Vector 48: CAN0 Transmit Warning */
-	.word	kinetis_can0rw		/* Vector 49: CAN0 Receive Warning */
-	.word	kinetis_can0wu		/* Vector 50: CAN0 Wake UP */
-	.word	kinetis_reserved	/* Vector 51: Reserved */
-	.word	kinetis_reserved	/* Vector 52: Reserved */
-	.word	kinetis_can1mb		/* Vector 53: CAN1 OR'ed Message buffer (0-15) */
-	.word	kinetis_can1bo		/* Vector 54: CAN1 Bus Off */
-	.word	kinetis_can1err		/* Vector 55: CAN1 Error */
-	.word	kinetis_can1tw		/* Vector 56: CAN1 Transmit Warning */
-	.word	kinetis_can1rw		/* Vector 57: CAN1 Receive Warning */
-	.word	kinetis_can1wu		/* Vector 58: CAN1 Wake UP */
-	.word	kinetis_reserved	/* Vector 59: Reserved */
-	.word	kinetis_reserved	/* Vector 60: Reserved */
-	.word	kinetis_uart0s		/* Vector 61: UART0 status */
-	.word	kinetis_uart0e		/* Vector 62: UART0 error */
-	.word	kinetis_uart1s		/* Vector 63: UART1 status */
-	.word	kinetis_uart1e		/* Vector 64: UART1 error */
-	.word	kinetis_uart2s		/* Vector 65: UART2 status */
-	.word	kinetis_uart2e		/* Vector 66: UART2 error */
-	.word	kinetis_uart3s		/* Vector 67: UART3 status */
-	.word	kinetis_uart3e		/* Vector 68: UART3 error */
-	.word	kinetis_uart4s		/* Vector 69: UART4 status */
-	.word	kinetis_uart4e		/* Vector 70: UART4 error */
-	.word	kinetis_uart5s		/* Vector 71: UART5 status */
-	.word	kinetis_uart5e		/* Vector 72: UART5 error */
-	.word	kinetis_adc0		/* Vector 73: ADC0 */
-	.word	kinetis_adc1		/* Vector 74: ADC1 */
-	.word	kinetis_cmp0		/* Vector 75: CMP0 */
-	.word	kinetis_cmp1		/* Vector 76: CMP1 */
-	.word	kinetis_cmp2		/* Vector 77: CMP2 */
-	.word	kinetis_ftm0		/* Vector 78: FTM0 all sources */
-	.word	kinetis_ftm1		/* Vector 79: FTM1 all sources */
-	.word	kinetis_ftm2		/* Vector 80: FTM2 all sources */
-	.word	kinetis_cmt			/* Vector 81: CMT */
-	.word	kinetis_rtc			/* Vector 82: RTC alarm interrupt */
-	.word	kinetis_reserved	/* Vector 83: Reserved */
-	.word	kinetis_pitch0		/* Vector 84: PIT channel 0 */
-	.word	kinetis_pitch1		/* Vector 85: PIT channel 1 */
-	.word	kinetis_pitch2		/* Vector 86: PIT channel 2 */
-	.word	kinetis_pitch3		/* Vector 87: PIT channel 3 */
-	.word	kinetis_pdb			/* Vector 88: PDB */
-	.word	kinetis_usbotg		/* Vector 88: USB OTG */
-	.word	kinetis_usbcd		/* Vector 90: USB charger detect */
-	.word	kinetis_emactmr		/* Vector 91: Ethernet MAC IEEE 1588 timer interrupt */
-	.word	kinetis_emactx		/* Vector 92: Ethernet MAC transmit interrupt */
-	.word	kinetis_emacrx		/* Vector 93: Ethernet MAC receive interrupt */
-	.word	kinetis_emacmisc	/* Vector 94: Ethernet MAC error and misc interrupt */
-	.word	kinetis_i2s0		/* Vector 95: I2S0 */
-	.word	kinetis_sdhc		/* Vector 96: SDHC */
-	.word	kinetis_dac0		/* Vector 97: DAC0 */
-	.word	kinetis_dac1		/* Vector 98: DAC1 */
-	.word	kinetis_tsi			/* Vector 97: TSI all sources */
-	.word	kinetis_mcg			/* Vector 100: MCG */
-	.word	kinetis_lpt			/* Vector 101: Low power timer */
-	.word	kinetis_reserved	/* Vector 102: Reserved */
-	.word	kinetis_porta		/* Vector 103: Pin detect port A */
-	.word	kinetis_portb		/* Vector 104: Pin detect port B */
-	.word	kinetis_portc		/* Vector 105: Pin detect port C */
-	.word	kinetis_portd		/* Vector 106: Pin detect port D */
-	.word	kinetis_porte		/* Vector 107: Pin detect port E */
-	.word	kinetis_reserved	/* Vector 108: Reserved */
-	.word	kinetis_reserved	/* Vector 109: Reserved */
-	.word	kinetis_reserved	/* Vector 110: Reserved */
-	.word	kinetis_reserved	/* Vector 111: Reserved */
-	.word	kinetis_reserved	/* Vector 112: Reserved */
-	.word	kinetis_reserved	/* Vector 113: Reserved */
-	.word	kinetis_reserved	/* Vector 114: Reserved */
-	.word	kinetis_reserved	/* Vector 115: Reserved */
-	.word	kinetis_reserved	/* Vector 116: Reserved */
-	.word	kinetis_reserved	/* Vector 117: Reserved */
-	.word	kinetis_reserved	/* Vector 118: Reserved */
-	.word	kinetis_reserved	/* Vector 119: Reserved */
+/* External Interrupts */
+
+#if !defined(CONFIG_KINETIS_NOEXT_VECTORS)
+#undef VECTOR
+#define VECTOR(l,i) .word l
+
+#undef UNUSED
+#define UNUSED(i) .word kinetis_reserved
+
+#if defined(CONFIG_ARCH_FAMILY_K20)
+#  include "chip/kinetis_k20vectors.h"
+#elif defined(CONFIG_ARCH_FAMILY_K40)
+#  include "chip/kinetis_k40vectors.h"
+#elif defined(CONFIG_ARCH_FAMILY_K60)
+#  include "chip/kinetis_k60vectors.h"
+#elif defined(CONFIG_ARCH_FAMILY_K64)
+#  include "chip/kinetis_k64vectors.h"
+#elif defined(CONFIG_ARCH_FAMILY_K66)
+#  include "chip/kinetis_k66vectors.h"
 #else
-#  error "No vectors for this Kinetis part"
+#  error "No vectors for Kinetis K chip"
 #endif
+#endif /* CONFIG_KINETIS_NOEXT_VECTORS */
+	.size	_vectors, .-_vectors
 
-/************************************************************************************************
+/************************************************************************************
  * .text
- ************************************************************************************************/
-
+ ************************************************************************************/
 	.text
 	.type	handlers, function
 	.thumb_func
 handlers:
-
-/* Processor Exceptions *************************************************************************/
-
 	HANDLER	kinetis_reserved, KINETIS_IRQ_RESERVED		/* Unexpected/reserved vector */
 	HANDLER	kinetis_nmi, KINETIS_IRQ_NMI				/* Vector  2: Non-Maskable Interrupt (NMI) */
 	HANDLER	kinetis_hardfault, KINETIS_IRQ_HARDFAULT	/* Vector  3: Hard fault */
@@ -504,277 +199,30 @@ handlers:
 	HANDLER	kinetis_pendsv, KINETIS_IRQ_PENDSV			/* Vector 14: Penable system service request */
 	HANDLER	kinetis_systick, KINETIS_IRQ_SYSTICK		/* Vector 15: System tick */
 
-/* External Interrupts **************************************************************************/
-/* K40 Family ***********************************************************************************
- *
- * The interrupt vectors  for the following parts is defined in Freescale document
- * K20P64M72SF1RM
- */
+#if !defined(CONFIG_KINETIS_NOEXT_VECTORS)
 
-#if defined(CONFIG_ARCH_CHIP_MK20DX256VLH7)
-
-	HANDLER kinetis_dmach0, KINETIS_IRQ_DMACH0		/* Vector 16: DMA channel 0 transfer complete */
-	HANDLER kinetis_dmach1, KINETIS_IRQ_DMACH1		/* Vector 17: DMA channel 1 transfer complete */
-	HANDLER kinetis_dmach2, KINETIS_IRQ_DMACH2		/* Vector 18: DMA channel 2 transfer complete */
-	HANDLER kinetis_dmach3, KINETIS_IRQ_DMACH3		/* Vector 19: DMA channel 3 transfer complete */
-	HANDLER kinetis_dmach4, KINETIS_IRQ_DMACH4		/* Vector 20: DMA channel 4 transfer complete */
-	HANDLER kinetis_dmach5, KINETIS_IRQ_DMACH5		/* Vector 21: DMA channel 5 transfer complete */
-	HANDLER kinetis_dmach6, KINETIS_IRQ_DMACH6		/* Vector 22: DMA channel 6 transfer complete */
-	HANDLER kinetis_dmach7, KINETIS_IRQ_DMACH7		/* Vector 23: DMA channel 7 transfer complete */
-	HANDLER kinetis_dmach8, KINETIS_IRQ_DMACH8		/* Vector 24: DMA channel 8 transfer complete */
-	HANDLER kinetis_dmach9, KINETIS_IRQ_DMACH9		/* Vector 25: DMA channel 9 transfer complete */
-	HANDLER kinetis_dmach10, KINETIS_IRQ_DMACH10	/* Vector 26: DMA channel 10 transfer complete */
-	HANDLER kinetis_dmach11, KINETIS_IRQ_DMACH11	/* Vector 27: DMA channel 11 transfer complete */
-	HANDLER kinetis_dmach12, KINETIS_IRQ_DMACH12	/* Vector 28: DMA channel 12 transfer complete */
-	HANDLER kinetis_dmach13, KINETIS_IRQ_DMACH13	/* Vector 29: DMA channel 13 transfer complete */
-	HANDLER kinetis_dmach14, KINETIS_IRQ_DMACH14	/* Vector 30: DMA channel 14 transfer complete */
-	HANDLER kinetis_dmach15, KINETIS_IRQ_DMACH15	/* Vector 31: DMA channel 15 transfer complete */
-	HANDLER kinetis_dmaerr, KINETIS_IRQ_DMAERR		/* Vector 32: DMA error interrupt channels 0-15 */
-	HANDLER kinetis_flashcc, KINETIS_IRQ_FLASHCC	/* Vector 34: Flash memory command complete */
-	HANDLER kinetis_flashrc, KINETIS_IRQ_FLASHRC	/* Vector 35: Flash memory read collision */
-	HANDLER kinetis_smclvd, KINETIS_IRQ_SMCLVD		/* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
-	HANDLER kinetis_llwu, KINETIS_IRQ_LLWU			/* Vector 37: LLWU Normal Low Leakage Wakeup */
-	HANDLER kinetis_wdog, KINETIS_IRQ_WDOG			/* Vector 38: Watchdog */
-	HANDLER kinetis_i2c0, KINETIS_IRQ_I2C0			/* Vector 40: I2C0 */
-	HANDLER kinetis_i2c1, KINETIS_IRQ_I2C1			/* Vector 41: I2C1 */
-	HANDLER kinetis_spi0, KINETIS_IRQ_SPI0			/* Vector 42: SPI0 all sources */
-	HANDLER kinetis_spi1, KINETIS_IRQ_SPI1			/* Vector 43: SPI1 all sources */
-	HANDLER kinetis_can0mb, KINETIS_IRQ_CAN0MB		/* Vector 45: CAN0 OR'ed Message buffer (0-15) */
-	HANDLER kinetis_can0bo, KINETIS_IRQ_CAN0BO		/* Vector 46: CAN0 Bus Off */
-	HANDLER kinetis_can0err, KINETIS_IRQ_CAN0ERR	/* Vector 47: CAN0 Error */
-	HANDLER kinetis_can0tw, KINETIS_IRQ_CAN0TW		/* Vector 48: CAN0 Transmit Warning */
-	HANDLER kinetis_can0rw, KINETIS_IRQ_CAN0RW		/* Vector 49: CAN0 Receive Warning */
-	HANDLER kinetis_can0wu, KINETIS_IRQ_CAN0WU		/* Vector 50: CAN0 Wake UP */
-	HANDLER kinetis_uart0s, KINETIS_IRQ_UART0S		/* Vector 61: UART0 status */
-	HANDLER kinetis_uart0e, KINETIS_IRQ_UART0E		/* Vector 62: UART0 error */
-	HANDLER kinetis_uart1s, KINETIS_IRQ_UART1S		/* Vector 63: UART1 status */
-	HANDLER kinetis_uart1e, KINETIS_IRQ_UART1E		/* Vector 64: UART1 error */
-	HANDLER kinetis_uart2s, KINETIS_IRQ_UART2S		/* Vector 65: UART2 status */
-	HANDLER kinetis_uart2e, KINETIS_IRQ_UART2E		/* Vector 66: UART2 error */
-	HANDLER kinetis_adc0, KINETIS_IRQ_ADC0			/* Vector 73: ADC0 */
-	HANDLER kinetis_adc1, KINETIS_IRQ_ADC1			/* Vector 74: ADC1 */
-	HANDLER kinetis_cmp0, KINETIS_IRQ_CMP0			/* Vector 75: CMP0 */
-	HANDLER kinetis_cmp1, KINETIS_IRQ_CMP1			/* Vector 76: CMP1 */
-	HANDLER kinetis_cmp2, KINETIS_IRQ_CMP2			/* Vector 77: CMP2 */
-	HANDLER kinetis_ftm0, KINETIS_IRQ_FTM0			/* Vector 78: FTM0 all sources */
-	HANDLER kinetis_ftm1, KINETIS_IRQ_FTM1			/* Vector 79: FTM1 all sources */
-	HANDLER kinetis_ftm2, KINETIS_IRQ_FTM2			/* Vector 80: FTM2 all sources */
-	HANDLER kinetis_cmt, KINETIS_IRQ_CMT			/* Vector 81: CMT */
-	HANDLER kinetis_rtc, KINETIS_IRQ_RTC			/* Vector 82: RTC alarm interrupt */
-	HANDLER kinetis_pitch0, KINETIS_IRQ_PITCH0		/* Vector 84: PIT channel 0 */
-	HANDLER kinetis_pitch1, KINETIS_IRQ_PITCH1		/* Vector 85: PIT channel 1 */
-	HANDLER kinetis_pitch2, KINETIS_IRQ_PITCH2		/* Vector 86: PIT channel 2 */
-	HANDLER kinetis_pitch3, KINETIS_IRQ_PITCH3		/* Vector 87: PIT channel 3 */
-	HANDLER kinetis_pdb, KINETIS_IRQ_PDB			/* Vector 88: PDB */
-	HANDLER kinetis_usbotg, KINETIS_IRQ_USBOTG		/* Vector 88: USB OTG */
-	HANDLER kinetis_usbcd, KINETIS_IRQ_USBCD		/* Vector 90: USB charger detect */
-	HANDLER kinetis_dac0, KINETIS_IRQ_DAC0			/* Vector 97: DAC0 */
-	HANDLER kinetis_tsi, KINETIS_IRQ_TSI			/* Vector 97: TSI all sources */
-	HANDLER kinetis_mcg, KINETIS_IRQ_MCG			/* Vector 100: MCG */
-	HANDLER kinetis_lpt, KINETIS_IRQ_LPT			/* Vector 101: Low power timer */
-	HANDLER kinetis_porta, KINETIS_IRQ_PORTA		/* Vector 103: Pin detect port A */
-	HANDLER kinetis_portb, KINETIS_IRQ_PORTB		/* Vector 104: Pin detect port B */
-	HANDLER kinetis_portc, KINETIS_IRQ_PORTC		/* Vector 105: Pin detect port C */
-	HANDLER kinetis_portd, KINETIS_IRQ_PORTD		/* Vector 106: Pin detect port D */
-	HANDLER kinetis_porte, KINETIS_IRQ_PORTE		/* Vector 107: Pin detect port E */
-	HANDLER kinetis_swi, KINETIS_IRQ_SWI			/* Vector 110: Software interrupt */
-
-/* K40 Family ***********************************************************************************
- *
- * The interrupt vectors  for the following parts is defined in Freescale document
- * K40P144M100SF2RM
- */
+#undef VECTOR
+#define VECTOR(l,i) HANDLER l, i
 
-#elif defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100) || \
-    defined(CONFIG_ARCH_CHIP_MK40X256VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X256VMD100) || \
-    defined(CONFIG_ARCH_CHIP_MK40N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK40N512VMD100)
-
-	HANDLER kinetis_dmach0, KINETIS_IRQ_DMACH0		/* Vector 16: DMA channel 0 transfer complete */
-	HANDLER kinetis_dmach1, KINETIS_IRQ_DMACH1		/* Vector 17: DMA channel 1 transfer complete */
-	HANDLER kinetis_dmach2, KINETIS_IRQ_DMACH2		/* Vector 18: DMA channel 2 transfer complete */
-	HANDLER kinetis_dmach3, KINETIS_IRQ_DMACH3		/* Vector 19: DMA channel 3 transfer complete */
-	HANDLER kinetis_dmach4, KINETIS_IRQ_DMACH4		/* Vector 20: DMA channel 4 transfer complete */
-	HANDLER kinetis_dmach5, KINETIS_IRQ_DMACH5		/* Vector 21: DMA channel 5 transfer complete */
-	HANDLER kinetis_dmach6, KINETIS_IRQ_DMACH6		/* Vector 22: DMA channel 6 transfer complete */
-	HANDLER kinetis_dmach7, KINETIS_IRQ_DMACH7		/* Vector 23: DMA channel 7 transfer complete */
-	HANDLER kinetis_dmach8, KINETIS_IRQ_DMACH8		/* Vector 24: DMA channel 8 transfer complete */
-	HANDLER kinetis_dmach9, KINETIS_IRQ_DMACH9		/* Vector 25: DMA channel 9 transfer complete */
-	HANDLER kinetis_dmach10, KINETIS_IRQ_DMACH10	/* Vector 26: DMA channel 10 transfer complete */
-	HANDLER kinetis_dmach11, KINETIS_IRQ_DMACH11	/* Vector 27: DMA channel 11 transfer complete */
-	HANDLER kinetis_dmach12, KINETIS_IRQ_DMACH12	/* Vector 28: DMA channel 12 transfer complete */
-	HANDLER kinetis_dmach13, KINETIS_IRQ_DMACH13	/* Vector 29: DMA channel 13 transfer complete */
-	HANDLER kinetis_dmach14, KINETIS_IRQ_DMACH14	/* Vector 30: DMA channel 14 transfer complete */
-	HANDLER kinetis_dmach15, KINETIS_IRQ_DMACH15	/* Vector 31: DMA channel 15 transfer complete */
-	HANDLER kinetis_dmaerr, KINETIS_IRQ_DMAERR		/* Vector 32: DMA error interrupt channels 0-15 */
-	HANDLER kinetis_mcm, KINETIS_IRQ_MCM			/* Vector 33: MCM Normal interrupt */
-	HANDLER kinetis_flashcc, KINETIS_IRQ_FLASHCC	/* Vector 34: Flash memory command complete */
-	HANDLER kinetis_flashrc, KINETIS_IRQ_FLASHRC	/* Vector 35: Flash memory read collision */
-	HANDLER kinetis_smclvd, KINETIS_IRQ_SMCLVD		/* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
-	HANDLER kinetis_llwu, KINETIS_IRQ_LLWU			/* Vector 37: LLWU Normal Low Leakage Wakeup */
-	HANDLER kinetis_wdog, KINETIS_IRQ_WDOG			/* Vector 38: Watchdog */
-	HANDLER kinetis_i2c0, KINETIS_IRQ_I2C0			/* Vector 40: I2C0 */
-	HANDLER kinetis_i2c1, KINETIS_IRQ_I2C1			/* Vector 41: I2C1 */
-	HANDLER kinetis_spi0, KINETIS_IRQ_SPI0			/* Vector 42: SPI0 all sources */
-	HANDLER kinetis_spi1, KINETIS_IRQ_SPI1			/* Vector 43: SPI1 all sources */
-	HANDLER kinetis_spi2, KINETIS_IRQ_SPI2			/* Vector 44: SPI2 all sources */
-	HANDLER kinetis_can0mb, KINETIS_IRQ_CAN0MB		/* Vector 45: CAN0 OR'ed Message buffer (0-15) */
-	HANDLER kinetis_can0bo, KINETIS_IRQ_CAN0BO		/* Vector 46: CAN0 Bus Off */
-	HANDLER kinetis_can0err, KINETIS_IRQ_CAN0ERR	/* Vector 47: CAN0 Error */
-	HANDLER kinetis_can0tw, KINETIS_IRQ_CAN0TW		/* Vector 48: CAN0 Transmit Warning */
-	HANDLER kinetis_can0rw, KINETIS_IRQ_CAN0RW		/* Vector 49: CAN0 Receive Warning */
-	HANDLER kinetis_can0wu, KINETIS_IRQ_CAN0WU		/* Vector 50: CAN0 Wake UP */
-	HANDLER kinetis_can1mb, KINETIS_IRQ_CAN1MB		/* Vector 53: CAN1 OR'ed Message buffer (0-15) */
-	HANDLER kinetis_can1bo, KINETIS_IRQ_CAN1BO		/* Vector 54: CAN1 Bus Off */
-	HANDLER kinetis_can1err, KINETIS_IRQ_CAN1ERR	/* Vector 55: CAN1 Error */
-	HANDLER kinetis_can1tw, KINETIS_IRQ_CAN1TW		/* Vector 56: CAN1 Transmit Warning */
-	HANDLER kinetis_can1rw, KINETIS_IRQ_CAN1RW		/* Vector 57: CAN1 Receive Warning */
-	HANDLER kinetis_can1wu, KINETIS_IRQ_CAN1WU		/* Vector 58: CAN1 Wake UP */
-	HANDLER kinetis_uart0s, KINETIS_IRQ_UART0S		/* Vector 61: UART0 status */
-	HANDLER kinetis_uart0e, KINETIS_IRQ_UART0E		/* Vector 62: UART0 error */
-	HANDLER kinetis_uart1s, KINETIS_IRQ_UART1S		/* Vector 63: UART1 status */
-	HANDLER kinetis_uart1e, KINETIS_IRQ_UART1E		/* Vector 64: UART1 error */
-	HANDLER kinetis_uart2s, KINETIS_IRQ_UART2S		/* Vector 65: UART2 status */
-	HANDLER kinetis_uart2e, KINETIS_IRQ_UART2E		/* Vector 66: UART2 error */
-	HANDLER kinetis_uart3s, KINETIS_IRQ_UART3S		/* Vector 67: UART3 status */
-	HANDLER kinetis_uart3e, KINETIS_IRQ_UART3E		/* Vector 68: UART3 error */
-	HANDLER kinetis_uart4s, KINETIS_IRQ_UART4S		/* Vector 69: UART4 status */
-	HANDLER kinetis_uart4e, KINETIS_IRQ_UART4E		/* Vector 70: UART4 error */
-	HANDLER kinetis_uart5s, KINETIS_IRQ_UART5S		/* Vector 71: UART5 status */
-	HANDLER kinetis_uart5e, KINETIS_IRQ_UART5E		/* Vector 72: UART5 error */
-	HANDLER kinetis_adc0, KINETIS_IRQ_ADC0			/* Vector 73: ADC0 */
-	HANDLER kinetis_adc1, KINETIS_IRQ_ADC1			/* Vector 74: ADC1 */
-	HANDLER kinetis_cmp0, KINETIS_IRQ_CMP0			/* Vector 75: CMP0 */
-	HANDLER kinetis_cmp1, KINETIS_IRQ_CMP1			/* Vector 76: CMP1 */
-	HANDLER kinetis_cmp2, KINETIS_IRQ_CMP2			/* Vector 77: CMP2 */
-	HANDLER kinetis_ftm0, KINETIS_IRQ_FTM0			/* Vector 78: FTM0 all sources */
-	HANDLER kinetis_ftm1, KINETIS_IRQ_FTM1			/* Vector 79: FTM1 all sources */
-	HANDLER kinetis_ftm2, KINETIS_IRQ_FTM2			/* Vector 80: FTM2 all sources */
-	HANDLER kinetis_cmt, KINETIS_IRQ_CMT			/* Vector 81: CMT */
-	HANDLER kinetis_rtc, KINETIS_IRQ_RTC			/* Vector 82: RTC alarm interrupt */
-	HANDLER kinetis_pitch0, KINETIS_IRQ_PITCH0		/* Vector 84: PIT channel 0 */
-	HANDLER kinetis_pitch1, KINETIS_IRQ_PITCH1		/* Vector 85: PIT channel 1 */
-	HANDLER kinetis_pitch2, KINETIS_IRQ_PITCH2		/* Vector 86: PIT channel 2 */
-	HANDLER kinetis_pitch3, KINETIS_IRQ_PITCH3		/* Vector 87: PIT channel 3 */
-	HANDLER kinetis_pdb, KINETIS_IRQ_PDB			/* Vector 88: PDB */
-	HANDLER kinetis_usbotg, KINETIS_IRQ_USBOTG		/* Vector 88: USB OTG */
-	HANDLER kinetis_usbcd, KINETIS_IRQ_USBCD		/* Vector 90: USB charger detect */
-	HANDLER kinetis_i2s0, KINETIS_IRQ_I2S0			/* Vector 95: I2S0 */
-	HANDLER kinetis_sdhc, KINETIS_IRQ_SDHC			/* Vector 96: SDHC */
-	HANDLER kinetis_dac0, KINETIS_IRQ_DAC0			/* Vector 97: DAC0 */
-	HANDLER kinetis_dac1, KINETIS_IRQ_DAC1			/* Vector 98: DAC1 */
-	HANDLER kinetis_tsi, KINETIS_IRQ_TSI			/* Vector 97: TSI all sources */
-	HANDLER kinetis_mcg, KINETIS_IRQ_MCG			/* Vector 100: MCG */
-	HANDLER kinetis_lpt, KINETIS_IRQ_LPT			/* Vector 101: Low power timer */
-	HANDLER kinetis_slcd, KINETIS_IRQ_SLCD			/* Vector 102: Segment LCD all sources */
-	HANDLER kinetis_porta, KINETIS_IRQ_PORTA		/* Vector 103: Pin detect port A */
-	HANDLER kinetis_portb, KINETIS_IRQ_PORTB		/* Vector 104: Pin detect port B */
-	HANDLER kinetis_portc, KINETIS_IRQ_PORTC		/* Vector 105: Pin detect port C */
-	HANDLER kinetis_portd, KINETIS_IRQ_PORTD		/* Vector 106: Pin detect port D */
-	HANDLER kinetis_porte, KINETIS_IRQ_PORTE		/* Vector 107: Pin detect port E */
-	HANDLER kinetis_swi, KINETIS_IRQ_SWI			/* Vector 110: Software interrupt */
-
-/* K60 Family ***********************************************************************************
- *
- * The memory map for the following parts is defined in Freescale document
- * K60P144M100SF2RM
- */
-
-#elif defined(CONFIG_ARCH_CHIP_MK60N256VLQ100) || defined(CONFIG_ARCH_CHIP_MK60X256VLQ100) || \
-      defined(CONFIG_ARCH_CHIP_MK60N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK60N256VMD100) || \
-      defined(CONFIG_ARCH_CHIP_MK60X256VMD100) || defined(CONFIG_ARCH_CHIP_MK60N512VMD100) || \
-      defined(CONFIG_ARCH_CHIP_MK60N512VLL100)
-
-	HANDLER kinetis_dmach0, KINETIS_IRQ_DMACH0		/* Vector 16: DMA channel 0 transfer complete */
-	HANDLER kinetis_dmach1, KINETIS_IRQ_DMACH1		/* Vector 17: DMA channel 1 transfer complete */
-	HANDLER kinetis_dmach2, KINETIS_IRQ_DMACH2		/* Vector 18: DMA channel 2 transfer complete */
-	HANDLER kinetis_dmach3, KINETIS_IRQ_DMACH3		/* Vector 19: DMA channel 3 transfer complete */
-	HANDLER kinetis_dmach4, KINETIS_IRQ_DMACH4		/* Vector 20: DMA channel 4 transfer complete */
-	HANDLER kinetis_dmach5, KINETIS_IRQ_DMACH5		/* Vector 21: DMA channel 5 transfer complete */
-	HANDLER kinetis_dmach6, KINETIS_IRQ_DMACH6		/* Vector 22: DMA channel 6 transfer complete */
-	HANDLER kinetis_dmach7, KINETIS_IRQ_DMACH7		/* Vector 23: DMA channel 7 transfer complete */
-	HANDLER kinetis_dmach8, KINETIS_IRQ_DMACH8		/* Vector 24: DMA channel 8 transfer complete */
-	HANDLER kinetis_dmach9, KINETIS_IRQ_DMACH9		/* Vector 25: DMA channel 9 transfer complete */
-	HANDLER kinetis_dmach10, KINETIS_IRQ_DMACH10	/* Vector 26: DMA channel 10 transfer complete */
-	HANDLER kinetis_dmach11, KINETIS_IRQ_DMACH11	/* Vector 27: DMA channel 11 transfer complete */
-	HANDLER kinetis_dmach12, KINETIS_IRQ_DMACH12	/* Vector 28: DMA channel 12 transfer complete */
-	HANDLER kinetis_dmach13, KINETIS_IRQ_DMACH13	/* Vector 29: DMA channel 13 transfer complete */
-	HANDLER kinetis_dmach14, KINETIS_IRQ_DMACH14	/* Vector 30: DMA channel 14 transfer complete */
-	HANDLER kinetis_dmach15, KINETIS_IRQ_DMACH15	/* Vector 31: DMA channel 15 transfer complete */
-	HANDLER kinetis_dmaerr, KINETIS_IRQ_DMAERR		/* Vector 32: DMA error interrupt channels 0-15 */
-	HANDLER kinetis_mcm, KINETIS_IRQ_MCM			/* Vector 33: MCM Normal interrupt */
-	HANDLER kinetis_flashcc, KINETIS_IRQ_FLASHCC	/* Vector 34: Flash memory command complete */
-	HANDLER kinetis_flashrc, KINETIS_IRQ_FLASHRC	/* Vector 35: Flash memory read collision */
-	HANDLER kinetis_smclvd, KINETIS_IRQ_SMCLVD		/* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
-	HANDLER kinetis_llwu, KINETIS_IRQ_LLWU			/* Vector 37: LLWU Normal Low Leakage Wakeup */
-	HANDLER kinetis_wdog, KINETIS_IRQ_WDOG			/* Vector 38: Watchdog */
-	HANDLER kinetis_rngb, KINETIS_IRQ_RNGB			/* Vector 39: Random number generator */
-	HANDLER kinetis_i2c0, KINETIS_IRQ_I2C0			/* Vector 40: I2C0 */
-	HANDLER kinetis_i2c1, KINETIS_IRQ_I2C1			/* Vector 41: I2C1 */
-	HANDLER kinetis_spi0, KINETIS_IRQ_SPI0			/* Vector 42: SPI0 all sources */
-	HANDLER kinetis_spi1, KINETIS_IRQ_SPI1			/* Vector 43: SPI1 all sources */
-	HANDLER kinetis_spi2, KINETIS_IRQ_SPI2			/* Vector 44: SPI2 all sources */
-	HANDLER kinetis_can0mb, KINETIS_IRQ_CAN0MB		/* Vector 45: CAN0 OR'ed Message buffer (0-15) */
-	HANDLER kinetis_can0bo, KINETIS_IRQ_CAN0BO		/* Vector 46: CAN0 Bus Off */
-	HANDLER kinetis_can0err, KINETIS_IRQ_CAN0ERR	/* Vector 47: CAN0 Error */
-	HANDLER kinetis_can0tw, KINETIS_IRQ_CAN0TW		/* Vector 48: CAN0 Transmit Warning */
-	HANDLER kinetis_can0rw, KINETIS_IRQ_CAN0RW		/* Vector 49: CAN0 Receive Warning */
-	HANDLER kinetis_can0wu, KINETIS_IRQ_CAN0WU		/* Vector 50: CAN0 Wake UP */
-	HANDLER kinetis_can1mb, KINETIS_IRQ_CAN1MB		/* Vector 53: CAN1 OR'ed Message buffer (0-15) */
-	HANDLER kinetis_can1bo, KINETIS_IRQ_CAN1BO		/* Vector 54: CAN1 Bus Off */
-	HANDLER kinetis_can1err, KINETIS_IRQ_CAN1ERR	/* Vector 55: CAN1 Error */
-	HANDLER kinetis_can1tw, KINETIS_IRQ_CAN1TW		/* Vector 56: CAN1 Transmit Warning */
-	HANDLER kinetis_can1rw, KINETIS_IRQ_CAN1RW		/* Vector 57: CAN1 Receive Warning */
-	HANDLER kinetis_can1wu, KINETIS_IRQ_CAN1WU		/* Vector 58: CAN1 Wake UP */
-	HANDLER kinetis_uart0s, KINETIS_IRQ_UART0S		/* Vector 61: UART0 status */
-	HANDLER kinetis_uart0e, KINETIS_IRQ_UART0E		/* Vector 62: UART0 error */
-	HANDLER kinetis_uart1s, KINETIS_IRQ_UART1S		/* Vector 63: UART1 status */
-	HANDLER kinetis_uart1e, KINETIS_IRQ_UART1E		/* Vector 64: UART1 error */
-	HANDLER kinetis_uart2s, KINETIS_IRQ_UART2S		/* Vector 65: UART2 status */
-	HANDLER kinetis_uart2e, KINETIS_IRQ_UART2E		/* Vector 66: UART2 error */
-	HANDLER kinetis_uart3s, KINETIS_IRQ_UART3S		/* Vector 67: UART3 status */
-	HANDLER kinetis_uart3e, KINETIS_IRQ_UART3E		/* Vector 68: UART3 error */
-	HANDLER kinetis_uart4s, KINETIS_IRQ_UART4S		/* Vector 69: UART4 status */
-	HANDLER kinetis_uart4e, KINETIS_IRQ_UART4E		/* Vector 70: UART4 error */
-	HANDLER kinetis_uart5s, KINETIS_IRQ_UART5S		/* Vector 71: UART5 status */
-	HANDLER kinetis_uart5e, KINETIS_IRQ_UART5E		/* Vector 72: UART5 error */
-	HANDLER kinetis_adc0, KINETIS_IRQ_ADC0			/* Vector 73: ADC0 */
-	HANDLER kinetis_adc1, KINETIS_IRQ_ADC1			/* Vector 74: ADC1 */
-	HANDLER kinetis_cmp0, KINETIS_IRQ_CMP0			/* Vector 75: CMP0 */
-	HANDLER kinetis_cmp1, KINETIS_IRQ_CMP1			/* Vector 76: CMP1 */
-	HANDLER kinetis_cmp2, KINETIS_IRQ_CMP2			/* Vector 77: CMP2 */
-	HANDLER kinetis_ftm0, KINETIS_IRQ_FTM0			/* Vector 78: FTM0 all sources */
-	HANDLER kinetis_ftm1, KINETIS_IRQ_FTM1			/* Vector 79: FTM1 all sources */
-	HANDLER kinetis_ftm2, KINETIS_IRQ_FTM2			/* Vector 80: FTM2 all sources */
-	HANDLER kinetis_cmt, KINETIS_IRQ_CMT			/* Vector 81: CMT */
-	HANDLER kinetis_rtc, KINETIS_IRQ_RTC			/* Vector 82: RTC alarm interrupt */
-	HANDLER kinetis_pitch0, KINETIS_IRQ_PITCH0		/* Vector 84: PIT channel 0 */
-	HANDLER kinetis_pitch1, KINETIS_IRQ_PITCH1		/* Vector 85: PIT channel 1 */
-	HANDLER kinetis_pitch2, KINETIS_IRQ_PITCH2		/* Vector 86: PIT channel 2 */
-	HANDLER kinetis_pitch3, KINETIS_IRQ_PITCH3		/* Vector 87: PIT channel 3 */
-	HANDLER kinetis_pdb, KINETIS_IRQ_PDB			/* Vector 88: PDB */
-	HANDLER kinetis_usbotg, KINETIS_IRQ_USBOTG		/* Vector 88: USB OTG */
-	HANDLER kinetis_usbcd, KINETIS_IRQ_USBCD		/* Vector 90: USB charger detect */
-	HANDLER kinetis_emactmr, KINETIS_IRQ_EMACTMR	/* Vector 91: Ethernet MAC IEEE 1588 timer interrupt */
-	HANDLER kinetis_emactx, KINETIS_IRQ_EMACTX		/* Vector 92: Ethernet MAC transmit interrupt */
-	HANDLER kinetis_emacrx, KINETIS_IRQ_EMACRX		/* Vector 93: Ethernet MAC receive interrupt */
-	HANDLER kinetis_emacmisc, KINETIS_IRQ_EMACMISC	/* Vector 94: Ethernet MAC error and misc interrupt */
-	HANDLER kinetis_i2s0, KINETIS_IRQ_I2S0			/* Vector 95: I2S0 */
-	HANDLER kinetis_sdhc, KINETIS_IRQ_SDHC			/* Vector 96: SDHC */
-	HANDLER kinetis_dac0, KINETIS_IRQ_DAC0			/* Vector 97: DAC0 */
-	HANDLER kinetis_dac1, KINETIS_IRQ_DAC1			/* Vector 98: DAC1 */
-	HANDLER kinetis_tsi, KINETIS_IRQ_TSI			/* Vector 97: TSI all sources */
-	HANDLER kinetis_mcg, KINETIS_IRQ_MCG			/* Vector 100: MCG */
-	HANDLER kinetis_lpt, KINETIS_IRQ_LPT			/* Vector 101: Low power timer */
-	HANDLER kinetis_porta, KINETIS_IRQ_PORTA		/* Vector 103: Pin detect port A */
-	HANDLER kinetis_portb, KINETIS_IRQ_PORTB		/* Vector 104: Pin detect port B */
-	HANDLER kinetis_portc, KINETIS_IRQ_PORTC		/* Vector 105: Pin detect port C */
-	HANDLER kinetis_portd, KINETIS_IRQ_PORTD		/* Vector 106: Pin detect port D */
-	HANDLER kinetis_porte, KINETIS_IRQ_PORTE		/* Vector 107: Pin detect port E */
+#undef UNUSED
+#define UNUSED(i)
 
+#if defined(CONFIG_ARCH_FAMILY_K20)
+#  include "chip/kinetis_k20vectors.h"
+#elif defined(CONFIG_ARCH_FAMILY_K40)
+#  include "chip/kinetis_k40vectors.h"
+#elif defined(CONFIG_ARCH_FAMILY_K60)
+#  include "chip/kinetis_k60vectors.h"
+#elif defined(CONFIG_ARCH_FAMILY_K64)
+#  include "chip/kinetis_k64vectors.h"
+#elif defined(CONFIG_ARCH_FAMILY_K66)
+#  include "chip/kinetis_k66vectors.h"
 #else
-#  error "No handlers for this Kinetis part"
+#  error "No vectors for Kinetis K chip"
 #endif
 
+#endif /* CONFIG_KINETIS_NOEXT_VECTORS */
+
 /* Common IRQ handling logic.  On entry here, the return stack is on either
  * the PSP or the MSP and looks like the following:
  *
@@ -916,7 +364,7 @@ exception_common:
 	 *
 	 * Here:
 	 *   r0 = Address of the register save area
-	
+	 *
 	 * NOTE: It is a requirement that up_restorefpu() preserve the value of
 	 * r0!
 	 */
@@ -1003,7 +451,7 @@ exception_common:
 	ldr		r14, =EXC_RETURN_PRIVTHR	/* Load the special value */
 #endif
 
-    /* Restore the interrupt state */
+	/* Restore the interrupt state */
 
 #ifdef CONFIG_ARMV7M_USEBASEPRI
 	msr		basepri, r3				/* Restore interrupts priority masking */
@@ -1022,13 +470,13 @@ exception_common:
 	bx		r14						/* And return */
 	.size	handlers, .-handlers
 
-/************************************************************************************************
+/************************************************************************************
  *  Name: g_intstackalloc/g_intstackbase
  *
  * Description:
  *   Shouldn't happen
  *
- ************************************************************************************************/
+ ************************************************************************************/
 
 #if CONFIG_ARCH_INTERRUPTSTACK > 7
 	.bss
@@ -1040,11 +488,12 @@ g_intstackalloc:
 g_intstackbase:
 	.size	g_intstackalloc, .-g_intstackalloc
 #endif
+
 #endif /* CONFIG_ARMV7M_CMNVECTOR */
 
-/************************************************************************************************
+/************************************************************************************
  * .rodata
- ************************************************************************************************/
+ ************************************************************************************/
 
 	.section	.rodata, "a"
 
diff --git a/arch/arm/src/kinetis/kinetis_wdog.c b/arch/arm/src/kinetis/kinetis_wdog.c
index 9dc29b80d8963576c400758580b4fa4edecb5945..3beaad8d4bce5d1e0db6153578fe1d9290903f67 100644
--- a/arch/arm/src/kinetis/kinetis_wdog.c
+++ b/arch/arm/src/kinetis/kinetis_wdog.c
@@ -1,6 +1,5 @@
 /****************************************************************************
  * arch/arm/src/kinetis/kinetis_wdog.c
- * arch/arm/src/chip/kinetis_wdog.c
  *
  *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -44,19 +43,7 @@
 
 #include "up_arch.h"
 #include "kinetis.h"
-#include "kinetis_wdog.h"
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
+#include "chip/kinetis_wdog.h"
 
 /****************************************************************************
  * Private Functions
diff --git a/arch/arm/src/kl/Kconfig b/arch/arm/src/kl/Kconfig
index bfa40491538f8c3300f45d1023645450989ce28e..7dd13a686b9b4dd29e0f28529411e52c40cb07f9 100644
--- a/arch/arm/src/kl/Kconfig
+++ b/arch/arm/src/kl/Kconfig
@@ -345,12 +345,12 @@ config KL_TPM2_CHANNEL
 
 comment "Kinetis GPIO Interrupt Configuration"
 
-config GPIO_IRQ
+config KL_GPIOIRQ
 	bool "GPIO pin interrupts"
 	---help---
 		Enable support for interrupting GPIO pins
 
-if GPIO_IRQ
+if KL_GPIOIRQ
 
 config KL_PORTAINTS
 	bool "GPIOA interrupts"
diff --git a/arch/arm/src/kl/Make.defs b/arch/arm/src/kl/Make.defs
index 68c58af802e470f8a565a0b55728c4d57087bfa1..e2d0046208452db71770dd256ace320e02a2fb32 100644
--- a/arch/arm/src/kl/Make.defs
+++ b/arch/arm/src/kl/Make.defs
@@ -59,18 +59,12 @@ ifeq ($(CONFIG_STACK_COLORATION),y)
 CMN_CSRCS += up_checkstack.c
 endif
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c
-endif
-
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
 CMN_CSRCS += up_dumpnvic.c
 endif
 
 CHIP_ASRCS  =
-CHIP_CSRCS  = kl_clockconfig.c kl_gpio.c kl_idle.c kl_irq.c kl_lowgetc.c
+CHIP_CSRCS  = kl_clockconfig.c kl_gpio.c kl_idle.c kl_irq.c
 CHIP_CSRCS += kl_lowputc.c kl_serial.c kl_start.c kl_cfmconfig.c
 
 ifneq ($(CONFIG_SCHED_TICKLESS),y)
@@ -81,7 +75,7 @@ ifeq ($(CONFIG_BUILD_PROTECTED),y)
 CHIP_CSRCS += kl_userspace.c
 endif
 
-ifeq ($(CONFIG_GPIO_IRQ),y)
+ifeq ($(CONFIG_KL_GPIOIRQ),y)
 CHIP_CSRCS += kl_gpioirq.c
 endif
 
@@ -101,6 +95,6 @@ ifeq ($(CONFIG_PWM),y)
 CHIP_CSRCS += kl_pwm.c
 endif
 
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
 CHIP_CSRCS += kl_dumpgpio.c
 endif
diff --git a/arch/arm/src/kl/kl_dumpgpio.c b/arch/arm/src/kl/kl_dumpgpio.c
index b6ea6de628318495dd17d2f5a53cd459290b736d..0e6dadfd8ef0cdacd35a067bfe759828ece1a0e4 100644
--- a/arch/arm/src/kl/kl_dumpgpio.c
+++ b/arch/arm/src/kl/kl_dumpgpio.c
@@ -39,6 +39,11 @@
 
 #include 
 
+/* Output debug info even if debug output is not selected. */
+
+#undef  CONFIG_DEBUG_INFO
+#define CONFIG_DEBUG_INFO 1
+
 #include 
 #include 
 
@@ -48,14 +53,13 @@
 #include "chip.h"
 #include "kl_gpio.h"
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 /* Port letters for prettier debug output */
 
-#ifdef CONFIG_DEBUG
 static const char g_portchar[KL_GPIO_NPORTS] =
 {
 #if KL_GPIO_NPORTS > 9
@@ -82,15 +86,6 @@ static const char g_portchar[KL_GPIO_NPORTS] =
 #  error "Bad number of GPIOs"
 #endif
 };
-#endif
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
 
 /****************************************************************************
  * Public Functions
@@ -123,14 +118,14 @@ void kl_dumpgpio(gpio_cfgset_t pinset, const char *msg)
 
   flags = enter_critical_section();
 
-  lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
-        g_portchar[port], pinset, base, msg);
-  lldbg("  PDOR: %08x  PDIR: %08x  PDDR: %08x\n",
-        getreg32(base + KL_GPIO_PDOR_OFFSET),
-        getreg32(base + KL_GPIO_PDIR_OFFSET),
-        getreg32(base + KL_GPIO_PDDR_OFFSET));
+  _info("GPIO%c pinset: %08x base: %08x -- %s\n",
+       g_portchar[port], pinset, base, msg);
+  _info("  PDOR: %08x  PDIR: %08x  PDDR: %08x\n",
+       getreg32(base + KL_GPIO_PDOR_OFFSET),
+       getreg32(base + KL_GPIO_PDIR_OFFSET),
+       getreg32(base + KL_GPIO_PDDR_OFFSET));
 
   leave_critical_section(flags);
 }
 
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_FEATURES */
diff --git a/arch/arm/src/kl/kl_gpio.h b/arch/arm/src/kl/kl_gpio.h
index fc2cd7f37e99e6972ba01504f43146b3fd1f8d90..4a81acd27e46ce2c5f8f00d050c307fa7e96140c 100644
--- a/arch/arm/src/kl/kl_gpio.h
+++ b/arch/arm/src/kl/kl_gpio.h
@@ -355,7 +355,7 @@ void kl_gpiowrite(uint32_t pinset, bool value);
 bool kl_gpioread(uint32_t pinset);
 
 /************************************************************************************
- * Name: kl_pinirqattach
+ * Name: kl_gpioirqattach
  *
  * Description:
  *   Attach a pin interrupt handler.  The normal initalization sequence is:
@@ -368,15 +368,15 @@ bool kl_gpioread(uint32_t pinset);
  * Parameters:
  *  - pinset:  Pin configuration
  *  - pinisr:  Pin interrupt service routine
+ *  - pinarg:  The argument that will accompany the pin interrupt
  *
  * Returns:
- *   The previous value of the interrupt handler function pointer.  This value may,
- *   for example, be used to restore the previous handler when multiple handlers are
- *   used.
+ *   Zero (OK) is returned on success; On any failure, a negated errno value is
+ *   returned to indicate the nature of the failure.
  *
  ************************************************************************************/
 
-xcpt_t kl_gpioirqattach(uint32_t pinset, xcpt_t pinisr);
+int kl_gpioirqattach(uint32_t pinset, xcpt_t pinisr, void *pinarg);
 
 /************************************************************************************
  * Name: kl_gpioirqenable
@@ -386,7 +386,7 @@ xcpt_t kl_gpioirqattach(uint32_t pinset, xcpt_t pinisr);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_KL_GPIOIRQ
 void kl_gpioirqenable(uint32_t pinset);
 #else
 #  define kl_gpioirqenable(pinset)
@@ -400,7 +400,7 @@ void kl_gpioirqenable(uint32_t pinset);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_KL_GPIOIRQ
 void kl_gpioirqdisable(uint32_t pinset);
 #else
 #  define kl_gpioirqdisable(pinset)
diff --git a/arch/arm/src/kl/kl_gpioirq.c b/arch/arm/src/kl/kl_gpioirq.c
index 2b481bce3a22b7a58fe29266fafb824de1ed92f9..38f30c0870f1e9f29895ef9744e6e1b1460a75d3 100644
--- a/arch/arm/src/kl/kl_gpioirq.c
+++ b/arch/arm/src/kl/kl_gpioirq.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  *  arch/arm/src/kl/kl_gpioirq.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -51,7 +51,7 @@
 #include "chip/kl_port.h"
 #include "kl_gpio.h"
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_KL_GPIOIRQ
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -68,7 +68,7 @@
 #endif
 
 #if defined(CONFIG_KL_PORTBINTS) || defined(CONFIG_KL_PORTCINTS) || \
-    defined(CONFIG_KL_PORTEINTS) 
+    defined(CONFIG_KL_PORTEINTS)
 #  error Kinetis KL25 only supports interrupt on PORTA or PORTD
 #endif
 
@@ -76,6 +76,12 @@
  * Private Types
  ****************************************************************************/
 
+struct g_portisrs_s
+{
+  xcpt_t handler;   /* Interrupt handler entry point */
+  void  *arg;       /* The argument that accompanies the interrupt handler */
+};
+
 /****************************************************************************
  * Private Data
  ****************************************************************************/
@@ -87,11 +93,11 @@
  */
 
 #ifdef CONFIG_KL_PORTAINTS
-static xcpt_t g_portaisrs[32];
+static struct g_portisrs_s g_portaisrs[32];
 #endif
 
 #ifdef CONFIG_KL_PORTDINTS
-static xcpt_t g_portdisrs[32];
+static struct g_portisrs_s g_portdisrs[32];
 #endif
 
 /****************************************************************************
@@ -131,11 +137,14 @@ static int kl_portinterrupt(int irq, FAR void *context,
            * interrupt handler for the pin.
            */
 
-          if (isrtab[i])
+          if (isrtab[i].handler != NULL)
             {
+              xcpt_t handler = irstab[i].handler;
+              void  *arg     = irstab[i].arg;
+
               /* There is a registered interrupt handler... invoke it */
 
-              (void)isrtab[i](irq, context);
+              (void)handler(irq, context, arg);
             }
 
           /* Writing a one to the ISFR register will clear the pending
@@ -164,14 +173,14 @@ static int kl_portinterrupt(int irq, FAR void *context,
  ****************************************************************************/
 
 #ifdef CONFIG_KL_PORTAINTS
-static int kl_portainterrupt(int irq, FAR void *context)
+static int kl_portainterrupt(int irq, FAR void *context, FAR void *arg)
 {
   return kl_portinterrupt(irq, context, KL_PORTA_ISFR, g_portaisrs);
 }
 #endif
 
 #ifdef CONFIG_KL_PORTDINTS
-static int kl_portdinterrupt(int irq, FAR void *context)
+static int kl_portdinterrupt(int irq, FAR void *context, FAR void *arg)
 {
   return kl_portinterrupt(irq, context, KL_PORTD_ISFR, g_portdisrs);
 }
@@ -193,13 +202,13 @@ static int kl_portdinterrupt(int irq, FAR void *context)
 void kl_gpioirqinitialize(void)
 {
 #ifdef CONFIG_KL_PORTAINTS
-  (void)irq_attach(KL_IRQ_PORTA, kl_portainterrupt);
+  (void)irq_attach(KL_IRQ_PORTA, kl_portainterrupt, NULL);
   putreg32(0xffffffff, KL_PORTA_ISFR);
   up_enable_irq(KL_IRQ_PORTA);
 #endif
 
 #ifdef CONFIG_KL_PORTDINTS
-  (void)irq_attach(KL_IRQ_PORTD, kl_portdinterrupt);
+  (void)irq_attach(KL_IRQ_PORTD, kl_portdinterrupt, NULL);
   putreg32(0xffffffff, KL_PORTD_ISFR);
   up_enable_irq(KL_IRQ_PORTD);
 #endif
@@ -219,20 +228,20 @@ void kl_gpioirqinitialize(void)
  * Parameters:
  *  - pinset:  Pin configuration
  *  - pinisr:  Pin interrupt service routine
+ *  - pinarg:  The argument that will accompany the pin interrupt
  *
  * Returns:
- *   The previous value of the interrupt handler function pointer.  This
- *   value may, for example, be used to restore the previous handler when
- *   multiple handlers are used.
+ * Returns:
+ *   Zero (OK) is returned on success; On any failure, a negated errno value is
+ *   returned to indicate the nature of the failure.
  *
- ****************************************************************************/
+ ************************************************************************************/
 
-xcpt_t kl_gpioirqattach(uint32_t pinset, xcpt_t pinisr)
+int kl_gpioirqattach(uint32_t pinset, xcpt_t pinisr, void *pinarg)
 {
 #ifdef HAVE_PORTINTS
-  xcpt_t      *isrtab;
-  xcpt_t       oldisr;
-  irqstate_t   flags;
+  struct g_portisrs_s *isrtab;
+  irqstate_t flags;
   unsigned int port;
   unsigned int pin;
 
@@ -271,16 +280,16 @@ xcpt_t kl_gpioirqattach(uint32_t pinset, xcpt_t pinisr)
 
    /* Get the old PIN ISR and set the new PIN ISR */
 
-   oldisr      = isrtab[pin];
-   isrtab[pin] = pinisr;
+   isrtab[pin].handler = pinisr;
+   isrtab[pin].arg     = pinarg;
 
    /* And return the old PIN isr address */
 
    leave_critical_section(flags);
-   return oldisr;
+   return OK;
 
 #else
-   return NULL;
+   return -ENOSYS;
 #endif /* HAVE_PORTINTS */
 }
 
@@ -396,4 +405,4 @@ void kl_gpioirqdisable(uint32_t pinset)
     }
 #endif /* HAVE_PORTINTS */
 }
-#endif /* CONFIG_GPIO_IRQ */
+#endif /* CONFIG_KL_GPIOIRQ */
diff --git a/arch/arm/src/kl/kl_idle.c b/arch/arm/src/kl/kl_idle.c
index e711b39e3c51d92765be3de3576e98aa29e5364e..f7db42f276cc89e8a4d64f6ae9c6a08e5db869de 100644
--- a/arch/arm/src/kl/kl_idle.c
+++ b/arch/arm/src/kl/kl_idle.c
@@ -103,7 +103,7 @@ static void up_idlepm(void)
 
       /* Perform board-specific, state-dependent logic here */
 
-      llvdbg("newstate= %d oldstate=%d\n", newstate, oldstate);
+      _info("newstate= %d oldstate=%d\n", newstate, oldstate);
 
       /* Then force the global state change */
 
diff --git a/arch/arm/src/kl/kl_irq.c b/arch/arm/src/kl/kl_irq.c
index 87d47ab35c0d9f2ce06874e42bdc131730332cde..f8466ac4f50738b014d8f1282c7a55ea621c5644 100644
--- a/arch/arm/src/kl/kl_irq.c
+++ b/arch/arm/src/kl/kl_irq.c
@@ -90,34 +90,34 @@ volatile uint32_t *g_current_regs[1];
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_IRQ)
+#if defined(CONFIG_DEBUG_IRQ_INFO)
 static void kl_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = enter_critical_section();
 
-  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  lldbg("  ISER:       %08x ICER:   %08x\n",
-        getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER));
-  lldbg("  ISPR:       %08x ICPR:   %08x\n",
-        getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
-  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
-        getreg32(ARMV6M_NVIC_IPR0), getreg32(ARMV6M_NVIC_IPR1),
-        getreg32(ARMV6M_NVIC_IPR2), getreg32(ARMV6M_NVIC_IPR3));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(ARMV6M_NVIC_IPR4), getreg32(ARMV6M_NVIC_IPR5),
-        getreg32(ARMV6M_NVIC_IPR6), getreg32(ARMV6M_NVIC_IPR7));
-
-  lldbg("SYSCON:\n");
-  lldbg("  CPUID:      %08x\n",
-        getreg32(ARMV6M_SYSCON_CPUID));
-  lldbg("  ICSR:       %08x AIRCR:  %08x\n",
-        getreg32(ARMV6M_SYSCON_ICSR), getreg32(ARMV6M_SYSCON_AIRCR));
-  lldbg("  SCR:        %08x CCR:    %08x\n",
-        getreg32(ARMV6M_SYSCON_SCR), getreg32(ARMV6M_SYSCON_CCR));
-  lldbg("  SHPR2:      %08x SHPR3:  %08x\n",
-        getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
+  irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
+  irqinfo("  ISER:       %08x ICER:   %08x\n",
+          getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER));
+  irqinfo("  ISPR:       %08x ICPR:   %08x\n",
+          getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
+  irqinfo("  IRQ PRIO:   %08x %08x %08x %08x\n",
+          getreg32(ARMV6M_NVIC_IPR0), getreg32(ARMV6M_NVIC_IPR1),
+          getreg32(ARMV6M_NVIC_IPR2), getreg32(ARMV6M_NVIC_IPR3));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(ARMV6M_NVIC_IPR4), getreg32(ARMV6M_NVIC_IPR5),
+          getreg32(ARMV6M_NVIC_IPR6), getreg32(ARMV6M_NVIC_IPR7));
+
+  irqinfo("SYSCON:\n");
+  irqinfo("  CPUID:      %08x\n",
+          getreg32(ARMV6M_SYSCON_CPUID));
+  irqinfo("  ICSR:       %08x AIRCR:  %08x\n",
+          getreg32(ARMV6M_SYSCON_ICSR), getreg32(ARMV6M_SYSCON_AIRCR));
+  irqinfo("  SCR:        %08x CCR:    %08x\n",
+          getreg32(ARMV6M_SYSCON_SCR), getreg32(ARMV6M_SYSCON_CCR));
+  irqinfo("  SHPR2:      %08x SHPR3:  %08x\n",
+         getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
 
   leave_critical_section(flags);
 }
@@ -137,27 +137,27 @@ static void kl_dumpnvic(const char *msg, int irq)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
-static int kl_nmi(int irq, FAR void *context)
+#ifdef CONFIG_DEBUG_FEATURES
+static int kl_nmi(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! NMI received\n");
+  _err("PANIC!!! NMI received\n");
   PANIC();
   return 0;
 }
 
-static int kl_pendsv(int irq, FAR void *context)
+static int kl_pendsv(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! PendSV received\n");
+  _err("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
 }
 
-static int kl_reserved(int irq, FAR void *context)
+static int kl_reserved(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Reserved interrupt\n");
+  _err("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;
 }
@@ -231,15 +231,15 @@ void up_irqinitialize(void)
    * under certain conditions.
    */
 
-  irq_attach(KL_IRQ_SVCALL, up_svcall);
-  irq_attach(KL_IRQ_HARDFAULT, up_hardfault);
+  irq_attach(KL_IRQ_SVCALL, up_svcall, NULL);
+  irq_attach(KL_IRQ_HARDFAULT, up_hardfault, NULL);
 
   /* Attach all other processor exceptions (except reset and sys tick) */
 
-#ifdef CONFIG_DEBUG
-  irq_attach(KL_IRQ_NMI, kl_nmi);
-  irq_attach(KL_IRQ_PENDSV, kl_pendsv);
-  irq_attach(KL_IRQ_RESERVED, kl_reserved);
+#ifdef CONFIG_DEBUG_FEATURES
+  irq_attach(KL_IRQ_NMI, kl_nmi, NULL);
+  irq_attach(KL_IRQ_PENDSV, kl_pendsv, NULL);
+  irq_attach(KL_IRQ_RESERVED, kl_reserved, NULL);
 #endif
 
   kl_dumpnvic("initial", NR_IRQS);
@@ -248,7 +248,7 @@ void up_irqinitialize(void)
    * configured pin interrupts.
    */
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_KL_GPIOIRQ
   kl_gpioirqinitialize();
 #endif
 
diff --git a/arch/arm/src/kl/kl_pwm.c b/arch/arm/src/kl/kl_pwm.c
index c4714178e4cb03dd65a17c42946ea661cf1b283b..a34aa0f8175b08e9130051208edd70ce36301a19 100644
--- a/arch/arm/src/kl/kl_pwm.c
+++ b/arch/arm/src/kl/kl_pwm.c
@@ -48,7 +48,7 @@
 
 #include 
 #include 
-#include 
+#include 
 #include 
 
 #include "up_internal.h"
@@ -73,29 +73,10 @@
 /* PWM/Timer Definitions ****************************************************/
 
 /* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing PWM */
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_PWM
-#endif
-
-#ifdef CONFIG_DEBUG_PWM
-#  define pwmdbg              dbg
-#  define pwmlldbg            lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define pwmvdbg           vdbg
-#    define pwmllvdbg         llvdbg
-#    define pwm_dumpgpio(p,m) kl_dumpgpio(p,m)
-#  else
-#    define pwmlldbg(x...)
-#    define pwmllvdbg(x...)
-#    define pwm_dumpgpio(p,m)
-#  endif
+#ifdef CONFIG_DEBUG_PWM_INFO
+#  define pwm_dumpgpio(p,m) kl_dumpgpio(p,m)
 #else
-#  define pwmdbg(x...)
-#  define pwmlldbg(x...)
-#  define pwmvdbg(x...)
-#  define pwmllvdbg(x...)
 #  define pwm_dumpgpio(p,m)
 #endif
 
@@ -122,7 +103,7 @@ struct kl_pwmtimer_s
 static uint32_t pwm_getreg(struct kl_pwmtimer_s *priv, int offset);
 static void pwm_putreg(struct kl_pwmtimer_s *priv, int offset, uint32_t value);
 
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_PWM_INFO
 static void pwm_dumpregs(struct kl_pwmtimer_s *priv, FAR const char *msg);
 #else
 #  define pwm_dumpregs(priv,msg)
@@ -253,30 +234,30 @@ static void pwm_putreg(struct kl_pwmtimer_s *priv, int offset, uint32_t value)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_PWM_INFO
 static void pwm_dumpregs(struct kl_pwmtimer_s *priv, FAR const char *msg)
 {
   int nchannels = (priv->tpmid == 0) ? 6 : 2;
 
-  pwmvdbg("%s:\n", msg);
-  pwmvdbg("  TPM%d_SC:     %04x   TPM%d_CNT:  %04x     TPM%d_MOD:  %04x\n",
+  pwminfo("%s:\n", msg);
+  pwminfo("  TPM%d_SC:     %04x   TPM%d_CNT:  %04x     TPM%d_MOD:  %04x\n",
           priv->tpmid,
           pwm_getreg(priv, TPM_SC_OFFSET),
           priv->tpmid,
           pwm_getreg(priv, TPM_CNT_OFFSET),
           priv->tpmid,
           pwm_getreg(priv, TPM_MOD_OFFSET));
-  pwmvdbg("  TPM%d_STATUS: %04x   TPM%d_CONF: %04x\n",
+  pwminfo("  TPM%d_STATUS: %04x   TPM%d_CONF: %04x\n",
           priv->tpmid,
           pwm_getreg(priv, TPM_STATUS_OFFSET),
           priv->tpmid,
           pwm_getreg(priv, TPM_CONF_OFFSET));
-  pwmvdbg("   TPM%d_C0SC:  %04x   TPM%d_C0V:  %04x\n",
+  pwminfo("   TPM%d_C0SC:  %04x   TPM%d_C0V:  %04x\n",
           priv->tpmid,
           pwm_getreg(priv, TPM_C0SC_OFFSET),
           priv->tpmid,
           pwm_getreg(priv, TPM_C0V_OFFSET));
-  pwmvdbg("   TPM%d_C1SC:  %04x   TPM%d_C1V:  %04x\n",
+  pwminfo("   TPM%d_C1SC:  %04x   TPM%d_C1V:  %04x\n",
           priv->tpmid,
           pwm_getreg(priv, TPM_C1SC_OFFSET),
           priv->tpmid,
@@ -284,7 +265,7 @@ static void pwm_dumpregs(struct kl_pwmtimer_s *priv, FAR const char *msg)
 
   if (nchannels >= 3)
     {
-      pwmvdbg("   TPM%d_C2SC:  %04x   TPM%d_C2V:  %04x\n",
+      pwminfo("   TPM%d_C2SC:  %04x   TPM%d_C2V:  %04x\n",
               priv->tpmid,
               pwm_getreg(priv, TPM_C2SC_OFFSET),
               priv->tpmid,
@@ -293,7 +274,7 @@ static void pwm_dumpregs(struct kl_pwmtimer_s *priv, FAR const char *msg)
 
   if (nchannels >= 4)
     {
-      pwmvdbg("   TPM%d_C3SC:  %04x   TPM%d_C3V:  %04x\n",
+      pwminfo("   TPM%d_C3SC:  %04x   TPM%d_C3V:  %04x\n",
               priv->tpmid,
               pwm_getreg(priv, TPM_C3SC_OFFSET),
               priv->tpmid,
@@ -302,7 +283,7 @@ static void pwm_dumpregs(struct kl_pwmtimer_s *priv, FAR const char *msg)
 
   if (nchannels >= 5)
     {
-      pwmvdbg("   TPM%d_C4SC:  %04x   TPM%d_C4V:  %04x\n",
+      pwminfo("   TPM%d_C4SC:  %04x   TPM%d_C4V:  %04x\n",
               priv->tpmid,
               pwm_getreg(priv, TPM_C4SC_OFFSET),
               priv->tpmid,
@@ -311,7 +292,7 @@ static void pwm_dumpregs(struct kl_pwmtimer_s *priv, FAR const char *msg)
 
   if (nchannels >= 6)
     {
-      pwmvdbg("   TPM%d_C5SC:  %04x   TPM%d_C5V:  %04x\n",
+      pwminfo("   TPM%d_C5SC:  %04x   TPM%d_C5V:  %04x\n",
               priv->tpmid,
               pwm_getreg(priv, TPM_C5SC_OFFSET),
               priv->tpmid,
@@ -353,7 +334,7 @@ static int pwm_timer(FAR struct kl_pwmtimer_s *priv,
 
   DEBUGASSERT(priv != NULL && info != NULL);
 
-  pwmvdbg("TPM%d channel: %d frequency: %d duty: %08x\n",
+  pwminfo("TPM%d channel: %d frequency: %d duty: %08x\n",
           priv->tpmid, priv->channel, info->frequency, info->duty);
 
   DEBUGASSERT(info->frequency > 0 && info->duty > 0 &&
@@ -423,7 +404,7 @@ static int pwm_timer(FAR struct kl_pwmtimer_s *priv,
 
   cv = b16toi(info->duty * modulo + b16HALF);
 
-  pwmvdbg("TPM%d PCLK: %d frequency: %d TPMCLK: %d prescaler: %d modulo: %d c0v: %d\n",
+  pwminfo("TPM%d PCLK: %d frequency: %d TPMCLK: %d prescaler: %d modulo: %d c0v: %d\n",
           priv->tpmid, priv->pclk, info->frequency, tpmclk,
           presc_values[prescaler], modulo, cv);
 
@@ -483,7 +464,7 @@ static int pwm_timer(FAR struct kl_pwmtimer_s *priv,
         break;
 
       default:
-        pwmdbg("No such channel: %d\n", priv->channel);
+        pwmerr("ERROR: No such channel: %d\n", priv->channel);
         return -EINVAL;
     }
 
@@ -530,7 +511,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
   regval |= SIM_SCGC6_TPM0 | SIM_SCGC6_TPM1 | SIM_SCGC6_TPM2;
   putreg32(regval, KL_SIM_SCGC6);
 
-  pwmvdbg("TPM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
+  pwminfo("TPM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
   pwm_dumpregs(priv, "Initially");
 
   /* Configure the PWM output pin, but do not start the timer yet */
@@ -561,7 +542,7 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
   FAR struct kl_pwmtimer_s *priv = (FAR struct kl_pwmtimer_s *)dev;
   uint32_t pincfg;
 
-  pwmvdbg("TPM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
+  pwminfo("TPM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
 
   /* Make sure that the output has been stopped */
 
@@ -621,7 +602,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
   FAR struct kl_pwmtimer_s *priv = (FAR struct kl_pwmtimer_s *)dev;
   irqstate_t flags;
 
-  pwmvdbg("TPM%d\n", priv->tpmid);
+  pwminfo("TPM%d\n", priv->tpmid);
 
   /* Disable interrupts momentary to stop any ongoing timer processing and
    * to prevent any concurrent access to the reset register.
@@ -663,7 +644,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
         break;
 
       default:
-        pwmdbg("No such channel: %d\n", priv->channel);
+        pwmerr("ERROR: No such channel: %d\n", priv->channel);
         return -EINVAL;
     }
 
@@ -691,12 +672,12 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
 
 static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg)
 {
-#ifdef CONFIG_DEBUG_PWM
+#ifdef CONFIG_DEBUG_PWM_INFO
   FAR struct kl_pwmtimer_s *priv = (FAR struct kl_pwmtimer_s *)dev;
 
   /* There are no platform-specific ioctl commands */
 
-  pwmvdbg("TPM%d\n", priv->tpmid);
+  pwminfo("TPM%d\n", priv->tpmid);
 #endif
   return -ENOTTY;
 }
@@ -724,7 +705,7 @@ FAR struct pwm_lowerhalf_s *kl_pwminitialize(int timer)
 {
   FAR struct kl_pwmtimer_s *lower;
 
-  pwmvdbg("TPM%d\n", timer);
+  pwminfo("TPM%d\n", timer);
 
   switch (timer)
     {
@@ -750,7 +731,7 @@ FAR struct pwm_lowerhalf_s *kl_pwminitialize(int timer)
 #endif
 
       default:
-        pwmdbg("No such timer configured\n");
+        pwmerr("ERROR: No such timer configured\n");
         return NULL;
     }
 
diff --git a/arch/arm/src/kl/kl_pwm.h b/arch/arm/src/kl/kl_pwm.h
index f9afbcd7800e602b7c695fcdb67992d71cff7d5d..5b64e40967be318f3e3e8e639766e9cfac1e1a71 100644
--- a/arch/arm/src/kl/kl_pwm.h
+++ b/arch/arm/src/kl/kl_pwm.h
@@ -90,13 +90,13 @@
 #  elif CONFIG_KL_TPM0_CHANNEL == 1
 #    define PWM_TPM0_PINCFG GPIO_TPM0_CH1OUT
 #  elif CONFIG_KL_TPM0_CHANNEL == 2
-#    define PWM_TPM0_PINCFG GPIO_TPM1_CH2OUT
+#    define PWM_TPM0_PINCFG GPIO_TPM0_CH2OUT
 #  elif CONFIG_KL_TPM0_CHANNEL == 3
-#    define PWM_TPM0_PINCFG GPIO_TPM1_CH3OUT
+#    define PWM_TPM0_PINCFG GPIO_TPM0_CH3OUT
 #  elif CONFIG_KL_TPM0_CHANNEL == 4
-#    define PWM_TPM0_PINCFG GPIO_TPM1_CH4OUT
+#    define PWM_TPM0_PINCFG GPIO_TPM0_CH4OUT
 #  elif CONFIG_KL_TPM0_CHANNEL == 5
-#    define PWM_TPM0_PINCFG GPIO_TPM1_CH5OUT
+#    define PWM_TPM0_PINCFG GPIO_TPM0_CH5OUT
 #  else
 #    error "Unsupported value of CONFIG_KL_TPM1_CHANNEL"
 #  endif
diff --git a/arch/arm/src/kl/kl_serial.c b/arch/arm/src/kl/kl_serial.c
index fb135ca79557b979872f8868c6bcc95db781a421..a35328345ee43e5e5544936b1984d619ed1b7e9b 100644
--- a/arch/arm/src/kl/kl_serial.c
+++ b/arch/arm/src/kl/kl_serial.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/kl/kl_serial.c
  *
- *   Copyright (C) 2013-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013-2012, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -59,15 +59,14 @@
 
 #include "kl_config.h"
 #include "kl_lowputc.h"
-#include "kl_lowgetc.h"
 #include "chip.h"
 #include "kl_gpio.h"
 #include "chip/kl_uart.h"
 
-
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
 /* Some sanity checks *******************************************************/
 /* Is there at least one UART enabled and configured as a RS-232 device? */
 
@@ -172,7 +171,7 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-static int  up_interrupts(int irq, void *context);
+static int  up_interrupts(int irq, void *context, void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  up_receive(struct uart_dev_s *dev, uint32_t *status);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
@@ -456,7 +455,7 @@ static int up_attach(struct uart_dev_s *dev)
    * disabled in the C2 register.
    */
 
-  ret = irq_attach(priv->irq, up_interrupts);
+  ret = irq_attach(priv->irq, up_interrupts, dev);
   if (ret == OK)
     {
       up_enable_irq(priv->irq);
@@ -501,40 +500,16 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_interrupts(int irq, void *context)
+static int up_interrupts(int irq, void *context, void *arg)
 {
-  struct uart_dev_s *dev = NULL;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct up_dev_s   *priv;
   int                passes;
   uint8_t            s1;
   bool               handled;
 
-#ifdef CONFIG_KL_UART0
-  if (g_uart0priv.irq == irq)
-    {
-      dev = &g_uart0port;
-    }
-  else
-#endif
-#ifdef CONFIG_KL_UART1
-  if (g_uart1priv.irq == irq)
-    {
-      dev = &g_uart1port;
-    }
-  else
-#endif
-#ifdef CONFIG_KL_UART2
-  if (g_uart2priv.irq == irq)
-    {
-      dev = &g_uart2port;
-    }
-  else
-#endif
-    {
-      PANIC();
-    }
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct up_dev_s *)dev->priv;
-  DEBUGASSERT(priv);
 
   /* Loop until there are no characters to be transferred or,
    * until we have been looping for a long time.
@@ -958,18 +933,4 @@ int up_putc(int ch)
   return ch;
 }
 
-/****************************************************************************
- * Name: up_getc
- *
- * Description:
- *   Provide priority, low-level access to support OS debug writes
- *
- ****************************************************************************/
-
-int up_getc(void)
-{
-  /* Check for LF */
-
-  return kl_lowgetc();
-}
 #endif /* USE_SERIALDRIVER */
diff --git a/arch/arm/src/kl/kl_spi.c b/arch/arm/src/kl/kl_spi.c
index 0b738aedf5ea7f135d36c638cd8959fe050ecff8..e9fb9947cd48b643006189d6f0bb32da1e230cd9 100644
--- a/arch/arm/src/kl/kl_spi.c
+++ b/arch/arm/src/kl/kl_spi.c
@@ -59,29 +59,6 @@
 
 #if defined(CONFIG_KL_SPI0) || defined(CONFIG_KL_SPI1)
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-/* Debug ********************************************************************/
-/* The following enable debug output from this file:
- *
- * CONFIG_DEBUG         - Define to enable general debug features
- * CONFIG_DEBUG_SPI     - Define to enable basic SSP debug (needs CONFIG_DEBUG)
- * CONFIG_DEBUG_VERBOSE - Define to enable verbose SSP debug
- */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -364,7 +341,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
   priv->frequency = frequency;
   priv->actual    = actual;
 
-  spidbg("Frequency %d->%d\n", frequency, actual);
+  spiinfo("Frequency %d->%d\n", frequency, actual);
   return actual;
 }
 
@@ -388,7 +365,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
   FAR struct kl_spidev_s *priv = (FAR struct kl_spidev_s *)dev;
   uint8_t regval;
 
-  spivdbg("mode=%d\n", mode);
+  spiinfo("mode=%d\n", mode);
 
   /* Has the mode changed? */
 
@@ -519,7 +496,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
   FAR uint8_t *txptr = (FAR uint8_t *)txbuffer;
   uint8_t data;
 
-  spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+  spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
 
   /* Loop, sending each word in the user-provied data buffer. */
 
@@ -585,7 +562,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
 static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
                          size_t nwords)
 {
-  spivdbg("txbuffer=%p nwords=%d\n", txbuffer, nwords);
+  spiinfo("txbuffer=%p nwords=%d\n", txbuffer, nwords);
   return spi_exchange(dev, txbuffer, NULL, nwords);
 }
 #endif
@@ -612,7 +589,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
 #ifndef CONFIG_SPI_EXCHANGE
 static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *rxbuffer, size_t nwords)
 {
-  spivdbg("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
+  spiinfo("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
   return spi_exchange(dev, NULL, rxbuffer, nwords);
 }
 #endif
@@ -687,7 +664,7 @@ FAR struct spi_dev_s *kl_spibus_initialize(int port)
   else
 #endif
     {
-      spidbg("ERROR: Port %d not configured\n", port);
+      spierr("ERROR: Port %d not configured\n", port);
       return NULL;
     }
 
diff --git a/arch/arm/src/kl/kl_spi.h b/arch/arm/src/kl/kl_spi.h
index 466ab832f8ed50b70eedd17442011e3e88ab89e9..227ab9e6c5de91173367631ef02a9c999f742fa8 100644
--- a/arch/arm/src/kl/kl_spi.h
+++ b/arch/arm/src/kl/kl_spi.h
@@ -126,6 +126,11 @@ int kl_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
 #endif
 #endif
 
+#if defined(__cplusplus)
+}
+#endif
+#undef EXTERN
+
 #endif /* __ASSEMBLY__ */
 #endif /* CONFIG_KL_SPI0 || CONFIG_KL_SPI1 */
 #endif /* __ARCH_ARM_SRC_KL_KL_SPI_H */
diff --git a/arch/arm/src/kl/kl_start.c b/arch/arm/src/kl/kl_start.c
index 63491ac74d70503d749dfb32f01c9d59e55f0173..6e9970517f57854eb7cc18986237dccbd6bd50b7 100644
--- a/arch/arm/src/kl/kl_start.c
+++ b/arch/arm/src/kl/kl_start.c
@@ -94,7 +94,7 @@ const uint32_t g_idle_topstack = IDLE_STACK;
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES)
 #  define showprogress(c) kl_lowputc((uint32_t)c)
 #else
 #  define showprogress(c)
diff --git a/arch/arm/src/kl/kl_timerisr.c b/arch/arm/src/kl/kl_timerisr.c
index bcd17b0648527103b02094af8ef7070cfe45887f..eed3f5d9bafcbd92bdfeb697a1f7565577e75e49 100644
--- a/arch/arm/src/kl/kl_timerisr.c
+++ b/arch/arm/src/kl/kl_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/kl/kl_timerisr.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -93,19 +93,11 @@
 #endif
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  kl_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -113,7 +105,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int kl_timerisr(int irq, uint32_t *regs, FAR void *arg)
 {
   /* Process timer interrupt */
 
@@ -122,7 +114,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -130,7 +126,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t regval;
 
@@ -147,7 +143,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(KL_IRQ_SYSTICK, (xcpt_t)up_timerisr);
+  (void)irq_attach(KL_IRQ_SYSTICK, (xcpt_t)kl_timerisr, NULL);
 
   /* Enable SysTick interrupts.  "The CLKSOURCE bit in SysTick Control and
    * Status register selects either the core clock (when CLKSOURCE = 1) or
diff --git a/arch/arm/src/lpc11xx/Kconfig b/arch/arm/src/lpc11xx/Kconfig
index 45bb842a302f9c4706c1b9986899e4b4ba73fc81..46b01ab6e9e10fb6463280948fbfd525f0c58741 100644
--- a/arch/arm/src/lpc11xx/Kconfig
+++ b/arch/arm/src/lpc11xx/Kconfig
@@ -122,8 +122,8 @@ config ADC0_AVERAGE
 	default 200
 
 config ADC0_MASK
-	int "ADC0 mask"
-	default 1
+	hex "ADC0 mask"
+	default 0x01
 
 config ADC0_SPS
 	int "ADC0 SPS"
@@ -229,14 +229,15 @@ config CAN_LOOPBACK
 
 config CAN_REGDEBUG
 	bool "Register level debug"
-	depends on DEBUG
+	depends on DEBUG_CAN_INFO
 	default n
 	---help---
-		Output detailed register-level CAN debug information.  Requires also DEBUG and DEBUG_CAN.
+		Output detailed register-level CAN debug information.  Requires also
+		CONFIG_DEBUG_CAN_INFO.
 
 endmenu
 
-config GPIO_IRQ
+config LPC11_GPIOIRQ
 	bool "GPIO interrupt support"
 	default n
 	---help---
diff --git a/arch/arm/src/lpc11xx/Make.defs b/arch/arm/src/lpc11xx/Make.defs
index a40c14354551c34726aea625a64d500731fd607f..e45cd3e1a061b723f596b82e974c3ce42b786cd2 100644
--- a/arch/arm/src/lpc11xx/Make.defs
+++ b/arch/arm/src/lpc11xx/Make.defs
@@ -59,19 +59,13 @@ ifeq ($(CONFIG_STACK_COLORATION),y)
 CMN_CSRCS += up_checkstack.c
 endif
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c
-endif
-
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
 CMN_CSRCS += up_dumpnvic.c
 endif
 
 CHIP_ASRCS  =
 CHIP_CSRCS  = lpc11_clockconfig.c lpc11_gpio.c lpc11_i2c.c lpc11_idle.c
-CHIP_CSRCS += lpc11_irq.c lpc11_lowputc.c lpc11_lowgetc.c lpc11_serial.c
+CHIP_CSRCS += lpc11_irq.c lpc11_lowputc.c lpc11_serial.c
 CHIP_CSRCS += lpc11_spi.c lpc11_ssp.c lpc11_start.c
 
 # Configuration-dependent LPC11xx files
@@ -84,7 +78,7 @@ ifeq ($(CONFIG_BUILD_PROTECTED),y)
 CHIP_CSRCS += lpc11_userspace.c
 endif
 
-ifeq ($(CONFIG_GPIO_IRQ),y)
+ifeq ($(CONFIG_LPC11_GPIOIRQ),y)
 CHIP_CSRCS += lpc11_gpioint.c
 endif
 
diff --git a/arch/arm/src/lpc11xx/lpc111x_gpio.c b/arch/arm/src/lpc11xx/lpc111x_gpio.c
index 6a0718e11d7c176a2a1e08736acf3d4d15746052..cba1ee717349fbb25aa3fce1b712011182aecccc 100644
--- a/arch/arm/src/lpc11xx/lpc111x_gpio.c
+++ b/arch/arm/src/lpc11xx/lpc111x_gpio.c
@@ -79,7 +79,7 @@
  * actually set up to interrupt until the interrupt is enabled.
  */
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC11_GPIOIRQ
 uint64_t g_intedge0;
 uint64_t g_intedge2;
 #endif
@@ -295,7 +295,7 @@ static int lpc11_pullup(lpc11_pinset_t cfgset, unsigned int port,
  *
  ****************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC11_GPIOIRQ
 static void lpc11_setintedge(unsigned int port, unsigned int pin,
                              unsigned int value)
 {
@@ -323,7 +323,7 @@ static void lpc11_setintedge(unsigned int port, unsigned int pin,
   *intedge &= ~((uint64_t)3     << shift);
   *intedge |=  ((uint64_t)value << shift);
 }
-#endif /* CONFIG_GPIO_IRQ */
+#endif /* CONFIG_LPC11_GPIOIRQ */
 
 /****************************************************************************
  * Name: lpc11_setopendrain
@@ -453,7 +453,7 @@ static inline int lpc11_configinput(lpc11_pinset_t cfgset, unsigned int port,
 
       /* Forget about any falling/rising edge interrupt enabled */
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC11_GPIOIRQ
       lpc11_setintedge(port, pin, 0);
 #endif
     }
@@ -495,7 +495,7 @@ static inline int lpc11_configinterrupt(lpc11_pinset_t cfgset, unsigned int port
   /* Then just remember the rising/falling edge interrupt enabled */
 
   DEBUGASSERT(port == 0 || port == 2);
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC11_GPIOIRQ
   lpc11_setintedge(port, pin, (cfgset & GPIO_EDGE_MASK) >> GPIO_EDGE_SHIFT);
 #endif
   return OK;
diff --git a/arch/arm/src/lpc11xx/lpc11_gpio.h b/arch/arm/src/lpc11xx/lpc11_gpio.h
index 3bff062e073d7b4a1c89b0a8e3917223daaf6b5f..f77b748613e938975321bb827c82ad6a7af9c13f 100644
--- a/arch/arm/src/lpc11xx/lpc11_gpio.h
+++ b/arch/arm/src/lpc11xx/lpc11_gpio.h
@@ -88,7 +88,7 @@ extern "C"
  * lpc11_gpioint.c, and lpc11_gpiodbg.c
  */
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC11_GPIOIRQ
 EXTERN uint64_t g_intedge0;
 EXTERN uint64_t g_intedge2;
 #endif
@@ -108,7 +108,7 @@ EXTERN const uint32_t g_intbase[GPIO_NPORTS];
  *
  ************************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC11_GPIOIRQ
 void lpc11_gpioirqinitialize(void);
 #else
 #  define lpc11_gpioirqinitialize()
@@ -152,7 +152,7 @@ bool lpc11_gpioread(lpc11_pinset_t pinset);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC11_GPIOIRQ
 void lpc11_gpioirqenable(int irq);
 #else
 #  define lpc11_gpioirqenable(irq)
@@ -166,7 +166,7 @@ void lpc11_gpioirqenable(int irq);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC11_GPIOIRQ
 void lpc11_gpioirqdisable(int irq);
 #else
 #  define lpc11_gpioirqdisable(irq)
@@ -180,7 +180,7 @@ void lpc11_gpioirqdisable(int irq);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 int lpc11_dumpgpio(lpc11_pinset_t pinset, const char *msg);
 #else
 #  define lpc11_dumpgpio(p,m)
diff --git a/arch/arm/src/lpc11xx/lpc11_gpiodbg.c b/arch/arm/src/lpc11xx/lpc11_gpiodbg.c
index 6be8d9c55fee4b6b11c0177cc31cdf6c17cf08f2..86b3098dcda3f98a01bc9460811cf1784982c91d 100644
--- a/arch/arm/src/lpc11xx/lpc11_gpiodbg.c
+++ b/arch/arm/src/lpc11xx/lpc11_gpiodbg.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/lpc11xx/lpc11_gpiodbg.c
  *
- *   Copyright (C) 2010-2011, 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010-2011, 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,6 +39,11 @@
 
 #include 
 
+/* Output debug info even if debug output is not selected. */
+
+#undef  CONFIG_DEBUG_INFO
+#define CONFIG_DEBUG_INFO 1
+
 #include 
 #include 
 #include 
@@ -49,23 +54,7 @@
 #include "chip.h"
 #include "lpc11_gpio.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_GPIO
-#endif
-
-#ifdef CONFIG_DEBUG_GPIO
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
+#ifdef CONFIG_DEBUG_GPIO_INFO
 
 /****************************************************************************
  * Private Functions
@@ -157,34 +146,34 @@ int lpc11_dumpgpio(lpc11_pinset_t pinset, const char *msg)
   /* The following requires exclusive access to the GPIO registers */
 
   flags = enter_critical_section();
-  lldbg("GPIO%c pin%d (pinset: %08x) -- %s\n",
-        port + '0', pin, pinset, msg);
+  gpioinfo("GPIO%c pin%d (pinset: %08x) -- %s\n",
+           port + '0', pin, pinset, msg);
 
 #if defined(LPC176x)
-  lldbg("  PINSEL[%08x]: %08x PINMODE[%08x]: %08x ODMODE[%08x]: %08x\n",
-        pinsel,  pinsel  ? getreg32(pinsel) : 0,
-        pinmode, pinmode ? getreg32(pinmode) : 0,
-        g_odmode[port],    getreg32(g_odmode[port]));
+  gpioinfo("  PINSEL[%08x]: %08x PINMODE[%08x]: %08x ODMODE[%08x]: %08x\n",
+           pinsel,  pinsel  ? getreg32(pinsel) : 0,
+           pinmode, pinmode ? getreg32(pinmode) : 0,
+           g_odmode[port],    getreg32(g_odmode[port]));
 #elif defined(LPC178x)
-  lldbg("  IOCON[%08x]: %08x\n", iocon, getreg32(iocon));
+  gpioinfo("  IOCON[%08x]: %08x\n", iocon, getreg32(iocon));
 #endif
 
   base = g_fiobase[port];
-  lldbg("  FIODIR[%08x]: %08x FIOMASK[%08x]: %08x FIOPIN[%08x]: %08x\n",
-        base+LPC11_FIO_DIR_OFFSET,  getreg32(base+LPC11_FIO_DIR_OFFSET),
-        base+LPC11_FIO_MASK_OFFSET, getreg32(base+LPC11_FIO_MASK_OFFSET),
-        base+LPC11_FIO_PIN_OFFSET,  getreg32(base+LPC11_FIO_PIN_OFFSET));
+  gpioinfo("  FIODIR[%08x]: %08x FIOMASK[%08x]: %08x FIOPIN[%08x]: %08x\n",
+           base+LPC11_FIO_DIR_OFFSET,  getreg32(base+LPC11_FIO_DIR_OFFSET),
+           base+LPC11_FIO_MASK_OFFSET, getreg32(base+LPC11_FIO_MASK_OFFSET),
+           base+LPC11_FIO_PIN_OFFSET,  getreg32(base+LPC11_FIO_PIN_OFFSET));
 
   base = g_intbase[port];
-  lldbg("  IOINTSTATUS[%08x]: %08x INTSTATR[%08x]: %08x INSTATF[%08x]: %08x\n",
-        LPC11_GPIOINT_IOINTSTATUS,          getreg32(LPC11_GPIOINT_IOINTSTATUS),
-        base+LPC11_GPIOINT_INTSTATR_OFFSET, getreg32(base+LPC11_GPIOINT_INTSTATR_OFFSET),
-        base+LPC11_GPIOINT_INTSTATF_OFFSET, getreg32(base+LPC11_GPIOINT_INTSTATF_OFFSET));
-  lldbg("  INTENR[%08x]: %08x INTENF[%08x]: %08x\n",
-        base+LPC11_GPIOINT_INTENR_OFFSET,   getreg32(base+LPC11_GPIOINT_INTENR_OFFSET),
-        base+LPC11_GPIOINT_INTENF_OFFSET,   getreg32(base+LPC11_GPIOINT_INTENF_OFFSET));
+  gpioinfo("  IOINTSTATUS[%08x]: %08x INTSTATR[%08x]: %08x INSTATF[%08x]: %08x\n",
+           LPC11_GPIOINT_IOINTSTATUS,          getreg32(LPC11_GPIOINT_IOINTSTATUS),
+           base+LPC11_GPIOINT_INTSTATR_OFFSET, getreg32(base+LPC11_GPIOINT_INTSTATR_OFFSET),
+           base+LPC11_GPIOINT_INTSTATF_OFFSET, getreg32(base+LPC11_GPIOINT_INTSTATF_OFFSET));
+  gpioinfo("  INTENR[%08x]: %08x INTENF[%08x]: %08x\n",
+           base+LPC11_GPIOINT_INTENR_OFFSET,   getreg32(base+LPC11_GPIOINT_INTENR_OFFSET),
+           base+LPC11_GPIOINT_INTENF_OFFSET,   getreg32(base+LPC11_GPIOINT_INTENF_OFFSET));
+
   leave_critical_section(flags);
   return OK;
 }
-#endif /* CONFIG_DEBUG_GPIO */
-
+#endif /* CONFIG_DEBUG_GPIO_INFO */
diff --git a/arch/arm/src/lpc11xx/lpc11_gpioint.c b/arch/arm/src/lpc11xx/lpc11_gpioint.c
index 4ce6b48c9ed376f9f95b7b47fcbe1cd2a634bba7..5327b9e9ff8c1a064328e7da38bcced7c66c2d8b 100644
--- a/arch/arm/src/lpc11xx/lpc11_gpioint.c
+++ b/arch/arm/src/lpc11xx/lpc11_gpioint.c
@@ -51,7 +51,7 @@
 #include "chip.h"
 #include "lpc11_gpio.h"
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC11_GPIOIRQ
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -402,7 +402,7 @@ static void lpc11_gpiodemux(uint32_t intbase, uint32_t intmask,
  *
  ****************************************************************************/
 
-static int lpc11_gpiointerrupt(int irq, void *context)
+static int lpc11_gpiointerrupt(int irq, void *context, FAR void *arg)
 {
   /* Get the GPIO interrupt status */
 
@@ -468,7 +468,7 @@ void lpc11_gpioirqinitialize(void)
    * position in the NVIC with External Interrupt 3
    */
 
-  (void)irq_attach(LPC11_IRQ_EINT3, lpc11_gpiointerrupt);
+  (void)irq_attach(LPC11_IRQ_EINT3, lpc11_gpiointerrupt, NULL);
   up_enable_irq(LPC11_IRQ_EINT3);
 
 #elif defined(LPC178x)
@@ -476,7 +476,7 @@ void lpc11_gpioirqinitialize(void)
    * GPIO2.
    */
 
-  (void)irq_attach(LPC11_IRQ_GPIO, lpc11_gpiointerrupt);
+  (void)irq_attach(LPC11_IRQ_GPIO, lpc11_gpiointerrupt, NULL);
   up_enable_irq(LPC11_IRQ_GPIO);
 
 #endif
@@ -543,5 +543,5 @@ void lpc11_gpioirqdisable(int irq)
     }
 }
 
-#endif /* CONFIG_GPIO_IRQ */
+#endif /* CONFIG_LPC11_GPIOIRQ */
 
diff --git a/arch/arm/src/lpc11xx/lpc11_i2c.c b/arch/arm/src/lpc11xx/lpc11_i2c.c
index f838629fb2e50c6c217eac3f6cec0a44d4b88128..b9d2d107434463813edd4686f3d028a0977838a6 100644
--- a/arch/arm/src/lpc11xx/lpc11_i2c.c
+++ b/arch/arm/src/lpc11xx/lpc11_i2c.c
@@ -59,6 +59,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -128,7 +129,7 @@ struct lpc11_i2cdev_s
 
 static int  lpc11_i2c_start(struct lpc11_i2cdev_s *priv);
 static void lpc11_i2c_stop(struct lpc11_i2cdev_s *priv);
-static int  lpc11_i2c_interrupt(int irq, FAR void *context);
+static int  lpc11_i2c_interrupt(int irq, FAR void *context, void *arg);
 static void lpc11_i2c_timeout(int argc, uint32_t arg, ...);
 static void lpc11_i2c_setfrequency(struct lpc11_i2cdev_s *priv,
               uint32_t frequency);
@@ -303,7 +304,7 @@ static int lpc11_i2c_transfer(FAR struct i2c_master_s *dev,
 }
 
 /****************************************************************************
- * Name: lpc11_i2c_interrupt
+ * Name: lpc11_stopnext
  *
  * Description:
  *   Check if we need to issue STOP at the next message
@@ -333,36 +334,13 @@ static void lpc11_stopnext(struct lpc11_i2cdev_s *priv)
  *
  ****************************************************************************/
 
-static int lpc11_i2c_interrupt(int irq, FAR void *context)
+static int lpc11_i2c_interrupt(int irq, FAR void *context, void *arg)
 {
-  struct lpc11_i2cdev_s *priv;
+  struct lpc11_i2cdev_s *priv = (struct lpc11_i2cdev_s *)arg;
   struct i2c_msg_s *msg;
   uint32_t state;
 
-#ifdef CONFIG_LPC11_I2C0
-  if (irq == LPC11_IRQ_I2C0)
-    {
-      priv = &g_i2c0dev;
-    }
-  else
-#endif
-#ifdef CONFIG_LPC11_I2C1
-  if (irq == LPC11_IRQ_I2C1)
-    {
-      priv = &g_i2c1dev;
-    }
-  else
-#endif
-#ifdef CONFIG_LPC11_I2C2
-  if (irq == LPC11_IRQ_I2C2)
-    {
-      priv = &g_i2c2dev;
-    }
-  else
-#endif
-    {
-      PANIC();
-    }
+  DEBUGASSERT(priv != NULL);
 
   /* Reference UM10360 19.10.5 */
 
@@ -485,7 +463,7 @@ struct i2c_master_s *lpc11_i2cbus_initialize(int port)
 
   if (port > 1)
     {
-      dbg("lpc I2C Only support 0,1\n");
+      i2cerr("ERROR: LPC I2C only supports ports 0 and 1\n");
       return NULL;
     }
 
@@ -584,9 +562,17 @@ struct i2c_master_s *lpc11_i2cbus_initialize(int port)
 
   putreg32(I2C_CONSET_I2EN, priv->base + LPC11_I2C_CONSET_OFFSET);
 
+  /* Initialize semaphores */
+
   sem_init(&priv->mutex, 0, 1);
   sem_init(&priv->wait, 0, 0);
 
+  /* The wait semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->wait, SEM_PRIO_NONE);
+
   /* Allocate a watchdog timer */
 
   priv->timeout = wd_create();
@@ -594,7 +580,7 @@ struct i2c_master_s *lpc11_i2cbus_initialize(int port)
 
   /* Attach Interrupt Handler */
 
-  irq_attach(priv->irqid, lpc11_i2c_interrupt);
+  irq_attach(priv->irqid, lpc11_i2c_interrupt, priv);
 
   /* Enable Interrupt Handler */
 
diff --git a/arch/arm/src/lpc11xx/lpc11_irq.c b/arch/arm/src/lpc11xx/lpc11_irq.c
index c6daaba380de3f4595ce7c7e7b304648c8746578..df2fde8405ce37f798fef9a115eb25e3d7b042a3 100644
--- a/arch/arm/src/lpc11xx/lpc11_irq.c
+++ b/arch/arm/src/lpc11xx/lpc11_irq.c
@@ -86,34 +86,34 @@ volatile uint32_t *g_current_regs[1];
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_IRQ)
+#if defined(CONFIG_DEBUG_IRQ_INFO)
 static void lpc11_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = enter_critical_section();
 
-  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  lldbg("  ISER:       %08x ICER:   %08x\n",
-        getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER));
-  lldbg("  ISPR:       %08x ICPR:   %08x\n",
-        getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
-  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
-        getreg32(ARMV6M_NVIC_IPR0), getreg32(ARMV6M_NVIC_IPR1),
-        getreg32(ARMV6M_NVIC_IPR2), getreg32(ARMV6M_NVIC_IPR3));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(ARMV6M_NVIC_IPR4), getreg32(ARMV6M_NVIC_IPR5),
-        getreg32(ARMV6M_NVIC_IPR6), getreg32(ARMV6M_NVIC_IPR7));
-
-  lldbg("SYSCON:\n");
-  lldbg("  CPUID:      %08x\n",
-        getreg32(ARMV6M_SYSCON_CPUID));
-  lldbg("  ICSR:       %08x AIRCR:  %08x\n",
-        getreg32(ARMV6M_SYSCON_ICSR), getreg32(ARMV6M_SYSCON_AIRCR));
-  lldbg("  SCR:        %08x CCR:    %08x\n",
-        getreg32(ARMV6M_SYSCON_SCR), getreg32(ARMV6M_SYSCON_CCR));
-  lldbg("  SHPR2:      %08x SHPR3:  %08x\n",
-        getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
+  irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
+  irqinfo("  ISER:       %08x ICER:   %08x\n",
+          getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER));
+  irqinfo("  ISPR:       %08x ICPR:   %08x\n",
+          getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
+  irqinfo("  IRQ PRIO:   %08x %08x %08x %08x\n",
+          getreg32(ARMV6M_NVIC_IPR0), getreg32(ARMV6M_NVIC_IPR1),
+          getreg32(ARMV6M_NVIC_IPR2), getreg32(ARMV6M_NVIC_IPR3));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(ARMV6M_NVIC_IPR4), getreg32(ARMV6M_NVIC_IPR5),
+          getreg32(ARMV6M_NVIC_IPR6), getreg32(ARMV6M_NVIC_IPR7));
+
+  irqinfo("SYSCON:\n");
+  irqinfo("  CPUID:      %08x\n",
+          getreg32(ARMV6M_SYSCON_CPUID));
+  irqinfo("  ICSR:       %08x AIRCR:  %08x\n",
+          getreg32(ARMV6M_SYSCON_ICSR), getreg32(ARMV6M_SYSCON_AIRCR));
+  irqinfo("  SCR:        %08x CCR:    %08x\n",
+          getreg32(ARMV6M_SYSCON_SCR), getreg32(ARMV6M_SYSCON_CCR));
+  irqinfo("  SHPR2:      %08x SHPR3:  %08x\n",
+          getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
 
   leave_critical_section(flags);
 }
@@ -133,27 +133,27 @@ static void lpc11_dumpnvic(const char *msg, int irq)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
-static int lpc11_nmi(int irq, FAR void *context)
+#ifdef CONFIG_DEBUG_FEATURES
+static int lpc11_nmi(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! NMI received\n");
+  _err("PANIC!!! NMI received\n");
   PANIC();
   return 0;
 }
 
-static int lpc11_pendsv(int irq, FAR void *context)
+static int lpc11_pendsv(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! PendSV received\n");
+  _err("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
 }
 
-static int lpc11_reserved(int irq, FAR void *context)
+static int lpc11_reserved(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Reserved interrupt\n");
+  _err("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;
 }
@@ -227,15 +227,15 @@ void up_irqinitialize(void)
    * under certain conditions.
    */
 
-  irq_attach(LPC11_IRQ_SVCALL, up_svcall);
-  irq_attach(LPC11_IRQ_HARDFAULT, up_hardfault);
+  irq_attach(LPC11_IRQ_SVCALL, up_svcall, NULL);
+  irq_attach(LPC11_IRQ_HARDFAULT, up_hardfault, NULL);
 
   /* Attach all other processor exceptions (except reset and sys tick) */
 
-#ifdef CONFIG_DEBUG
-  irq_attach(LPC11_IRQ_NMI, lpc11_nmi);
-  irq_attach(LPC11_IRQ_PENDSV, lpc11_pendsv);
-  irq_attach(LPC11_IRQ_RESERVED, lpc11_reserved);
+#ifdef CONFIG_DEBUG_FEATURES
+  irq_attach(LPC11_IRQ_NMI, lpc11_nmi, NULL);
+  irq_attach(LPC11_IRQ_PENDSV, lpc11_pendsv, NULL);
+  irq_attach(LPC11_IRQ_RESERVED, lpc11_reserved, NULL);
 #endif
 
   lpc11_dumpnvic("initial", NR_IRQS);
@@ -244,7 +244,7 @@ void up_irqinitialize(void)
    * configured pin interrupts.
    */
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC11_GPIOIRQ
   lpc11_gpioirqinitialize();
 #endif
 
diff --git a/arch/arm/src/lpc11xx/lpc11_serial.c b/arch/arm/src/lpc11xx/lpc11_serial.c
index 6bbd488a3eeda0442442d4ff86c8410c9acf0077..cbef799afe9d434f097f70d0412e602db196dc75 100644
--- a/arch/arm/src/lpc11xx/lpc11_serial.c
+++ b/arch/arm/src/lpc11xx/lpc11_serial.c
@@ -64,7 +64,6 @@
 #include "chip.h"
 #include "chip/lpc11_uart.h"
 #include "lpc11_gpio.h"
-#include "lpc11_lowgetc.h"
 #include "lpc11_serial.h"
 
 /****************************************************************************
@@ -105,7 +104,7 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-static int  up_interrupt(int irq, void *context);
+static int  up_interrupt(int irq, void *context, void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  up_receive(struct uart_dev_s *dev, uint32_t *status);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
@@ -516,7 +515,7 @@ static int up_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, up_interrupt);
+  ret = irq_attach(priv->irq, up_interrupt, dev);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
@@ -558,24 +557,14 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_interrupt(int irq, void *context)
+static int up_interrupt(int irq, void *context, void *arg)
 {
-  struct uart_dev_s *dev = NULL;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct up_dev_s   *priv;
   uint32_t           status;
   int                passes;
 
-#ifdef CONFIG_LPC11_UART0
-  if (g_uart0priv.irq == irq)
-    {
-      dev = &g_uart0port;
-    }
-  else
-#endif
-    {
-      PANIC();
-    }
-
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct up_dev_s *)dev->priv;
 
   /* Loop until there are no characters to be transferred or,
@@ -631,7 +620,7 @@ static int up_interrupt(int irq, void *context)
               /* Read the line status register (LSR) to clear */
 
               status = up_serialin(priv, LPC11_UART_LSR_OFFSET);
-              vdbg("LSR: %02x\n", status);
+              _info("LSR: %02x\n", status);
               break;
             }
 
@@ -639,7 +628,7 @@ static int up_interrupt(int irq, void *context)
 
           default:
             {
-              dbg("Unexpected IIR: %02x\n", status);
+              _err("ERROR: Unexpected IIR: %02x\n", status);
               break;
             }
         }
@@ -1041,19 +1030,4 @@ int up_putc(int ch)
   return ch;
 }
 
-/****************************************************************************
- * Name: up_getc
- *
- * Description:
- *   Provide priority, low-level access to support OS debug writes
- *
- ****************************************************************************/
-
-int up_getc(void)
-{
-  /* Check for LF */
-
-  return lpc11_lowgetc();
-}
-
 #endif /* USE_SERIALDRIVER */
diff --git a/arch/arm/src/lpc11xx/lpc11_spi.c b/arch/arm/src/lpc11xx/lpc11_spi.c
index 178bd77c3604f635383b8c4647f2e0150db39ff6..c3f9157fe5246fe8eb1d4ef8077d9503a96d629f 100644
--- a/arch/arm/src/lpc11xx/lpc11_spi.c
+++ b/arch/arm/src/lpc11xx/lpc11_spi.c
@@ -71,26 +71,6 @@
 #  error "CONFIG_SPI_EXCHANGE must not be defined in the configuration"
 #endif
 
-/* Debug ********************************************************************/
-/* The following enable debug output from this file:
- *
- * CONFIG_DEBUG         - Define to enable general debug features
- * CONFIG_DEBUG_SPI     - Define to enable basic SSP debug (needs CONFIG_DEBUG)
- * CONFIG_DEBUG_VERBOSE - Define to enable verbose SSP debug
- */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /* SSP Clocking *************************************************************/
 /* The CPU clock by 1, 2, 4, or 8 to get the SPI peripheral clock (SPI_CLOCK).
  * SPI_CLOCK may be further divided by 8-254 to get the SPI clock.  If we
@@ -292,7 +272,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev,
   priv->frequency = frequency;
   priv->actual    = actual;
 
-  spidbg("Frequency %d->%d\n", frequency, actual);
+  spiinfo("Frequency %d->%d\n", frequency, actual);
   return actual;
 }
 
@@ -456,7 +436,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
   FAR uint8_t *ptr = (FAR uint8_t *)buffer;
   uint8_t data;
 
-  spidbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
   while (nwords)
     {
       /* Write the data to transmitted to the SPI Data Register */
@@ -503,7 +483,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
 {
   FAR uint8_t *ptr = (FAR uint8_t *)buffer;
 
-  spidbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
   while (nwords)
     {
       /* Write some dummy data to the SPI Data Register in order to clock the
diff --git a/arch/arm/src/lpc11xx/lpc11_ssp.c b/arch/arm/src/lpc11xx/lpc11_ssp.c
index c94eac7692d0198ff318afb9fbc950c2d9466331..a5a66d862a975c104b95b478642aff3778a87ca5 100644
--- a/arch/arm/src/lpc11xx/lpc11_ssp.c
+++ b/arch/arm/src/lpc11xx/lpc11_ssp.c
@@ -72,26 +72,6 @@
 #  error "CONFIG_SPI_EXCHANGE must not be defined in the configuration"
 #endif
 
-/* Debug ********************************************************************/
-/* The following enable debug output from this file:
- *
- * CONFIG_DEBUG         - Define to enable general debug features
- * CONFIG_DEBUG_SPI     - Define to enable basic SSP debug (needs CONFIG_DEBUG)
- * CONFIG_DEBUG_VERBOSE - Define to enable verbose SSP debug
- */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define sspdbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define sspdbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /* SSP Clocking *************************************************************/
 
 #if defined(LPC111x)
@@ -474,7 +454,7 @@ static uint32_t ssp_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
   priv->frequency = frequency;
   priv->actual    = actual;
 
-  sspdbg("Frequency %d->%d\n", frequency, actual);
+  spiinfo("Frequency %d->%d\n", frequency, actual);
   return actual;
 }
 
@@ -525,7 +505,7 @@ static void ssp_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
           break;
 
         default:
-          sspdbg("Bad mode: %d\n", mode);
+          spierr("ERROR: Bad mode: %d\n", mode);
           DEBUGASSERT(FALSE);
           return;
         }
@@ -613,7 +593,7 @@ static uint16_t ssp_send(FAR struct spi_dev_s *dev, uint16_t wd)
   /* Get the value from the RX FIFO and return it */
 
   regval = ssp_getreg(priv, LPC11_SSP_DR_OFFSET);
-  sspdbg("%04x->%04x\n", wd, regval);
+  spiinfo("%04x->%04x\n", wd, regval);
   return (uint16_t)regval;
 }
 
@@ -651,7 +631,7 @@ static void ssp_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
 
   /* Loop while thre are bytes remaining to be sent */
 
-  sspdbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
   u.pv = buffer;
   while (nwords > 0)
     {
@@ -679,7 +659,7 @@ static void ssp_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
 
   /* Then discard all card responses until the RX & TX FIFOs are emptied. */
 
-  sspdbg("discarding\n");
+  spiinfo("discarding\n");
   do
     {
       /* Is there anything in the RX fifo? */
@@ -744,7 +724,7 @@ static void ssp_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
    * occurred).
    */
 
-  sspdbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
   u.pv = buffer;
   while (nwords || rxpending)
     {
@@ -754,7 +734,7 @@ static void ssp_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
        * and (3) there are more bytes to be sent.
        */
 
-      spivdbg("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
+      spiinfo("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
       while ((ssp_getreg(priv, LPC11_SSP_SR_OFFSET) & SSP_SR_TNF) &&
              (rxpending < LPC11_SSP_FIFOSZ) && nwords)
         {
@@ -767,7 +747,7 @@ static void ssp_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
        * empty.
        */
 
-      spivdbg("RX: rxpending: %d\n", rxpending);
+      spiinfo("RX: rxpending: %d\n", rxpending);
       while (ssp_getreg(priv, LPC11_SSP_SR_OFFSET) & SSP_SR_RNE)
         {
           data = (uint8_t)ssp_getreg(priv, LPC11_SSP_DR_OFFSET);
diff --git a/arch/arm/src/lpc11xx/lpc11_start.c b/arch/arm/src/lpc11xx/lpc11_start.c
index 78429691490d69c6284c9e1adb74fb1133fff331..917cdeae275e6a5ef705a3e14e67293309b684c6 100644
--- a/arch/arm/src/lpc11xx/lpc11_start.c
+++ b/arch/arm/src/lpc11xx/lpc11_start.c
@@ -86,7 +86,7 @@ const uint32_t g_idle_topstack = IDLE_STACK;
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 #  define showprogress(c) up_lowputc(c)
 #else
 #  define showprogress(c)
diff --git a/arch/arm/src/lpc11xx/lpc11_timer.c b/arch/arm/src/lpc11xx/lpc11_timer.c
index b9106becbcc016f8f4cd7876b470546d85746389..a9ce65a073a57645e8953559dbad8e060657a096 100644
--- a/arch/arm/src/lpc11xx/lpc11_timer.c
+++ b/arch/arm/src/lpc11xx/lpc11_timer.c
@@ -47,7 +47,7 @@
 
 #include 
 #include 
-#include 
+#include 
 #include 
 
 #include "up_internal.h"
@@ -80,31 +80,11 @@
 
 #define TIMTYPE_TIM1       TIMTYPE_ADVANCED
 
-
 /* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing PWM */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_PWM
-#endif
 
-#ifdef CONFIG_DEBUG_PWM
-#  define pwmdbg              dbg
-#  define pwmlldbg            lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define pwmvdbg           vdbg
-#    define pwmllvdbg         llvdbg
-#    define pwm_dumpgpio(p,m) stm32_dumpgpio(p,m)
-#  else
-#    define pwmlldbg(x...)
-#    define pwmllvdbg(x...)
-#    define pwm_dumpgpio(p,m)
-#  endif
+#ifdef CONFIG_DEBUG_PWM_INFO
+#  define pwm_dumpgpio(p,m) stm32_dumpgpio(p,m)
 #else
-#  define pwmdbg(x...)
-#  define pwmlldbg(x...)
-#  define pwmvdbg(x...)
-#  define pwmllvdbg(x...)
 #  define pwm_dumpgpio(p,m)
 #endif
 
@@ -133,7 +113,7 @@ struct lpc11_timer_s
 static uint32_t timer_getreg(struct lpc11_timer_s *priv, int offset);
 static void timer_putreg(struct lpc11_timer_s *priv, int offset, uint32_t value);
 
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_PWM_INFO
 static void timer_dumpregs(struct lpc11_timer_s *priv, FAR const char *msg);
 #else
 #  define timer_dumpregs(priv,msg)
@@ -242,11 +222,11 @@ static void timer_putreg(struct lpc11_timer_s *priv, int offset,
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_PWM_INFO
 static void timer_dumpregs(struct lpc11_timer_s *priv, FAR const char *msg)
 {
-  pwmdbg("%s:\n", msg);
-  pwmdbg("  CR1: %04x CR2:  %04x SMCR:  %04x DIER:  %04x\n",
+  pwminfo("%s:\n", msg);
+  pwminfo("  CR1: %04x CR2:  %04x SMCR:  %04x DIER:  %04x\n",
           timer_getreg(priv, LPC11_PWM_MR0_OFFSET),
           timer_getreg(priv, LPC11_PWM_MR1_OFFSET),
           timer_getreg(priv, LPC11_PWM_MR2_OFFSET),
@@ -254,7 +234,7 @@ static void timer_dumpregs(struct lpc11_timer_s *priv, FAR const char *msg)
 #if defined(CONFIG_LPC11_TMR0)
   if (priv->timtype == TIMTYPE_ADVANCED)
     {
-      pwmdbg("  RCR: %04x BDTR: %04x DCR:   %04x DMAR:  %04x\n",
+      pwminfo("  RCR: %04x BDTR: %04x DCR:   %04x DMAR:  %04x\n",
               timer_getreg(priv, LPC11_PWM_MR0_OFFSET),
               timer_getreg(priv, LPC11_PWM_MR1_OFFSET),
               timer_getreg(priv, LPC11_PWM_MR2_OFFSET),
@@ -263,7 +243,7 @@ static void timer_dumpregs(struct lpc11_timer_s *priv, FAR const char *msg)
   else
 #endif
     {
-      pwmdbg("  DCR: %04x DMAR: %04x\n",
+      pwminfo("  DCR: %04x DMAR: %04x\n",
               timer_getreg(priv, LPC11_PWM_MR2_OFFSET),
               timer_getreg(priv, LPC11_PWM_MR3_OFFSET));
     }
@@ -469,7 +449,7 @@ static int timer_shutdown(FAR struct pwm_lowerhalf_s *dev)
   FAR struct lpc11_timer_s *priv = (FAR struct lpc11_timer_s *)dev;
   uint32_t pincfg;
 
-  pwmdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
+  pwminfo("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
 
   /* Make sure that the output has been stopped */
 
@@ -525,7 +505,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
   uint32_t regval;
   irqstate_t flags;
 
-  pwmdbg("TIM%d\n", priv->timid);
+  pwminfo("TIM%d\n", priv->timid);
 
   /* Disable interrupts momentary to stop any ongoing timer processing and
    * to prevent any concurrent access to the reset register.
@@ -551,7 +531,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
 
   leave_critical_section(flags);
 
-  pwmdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
+  pwminfo("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
   timer_dumpregs(priv, "After stop");
   return OK;
 }
@@ -575,12 +555,12 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
 static int timer_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd,
                        unsigned long arg)
 {
-#ifdef CONFIG_DEBUG_TIMER
+#ifdef CONFIG_DEBUG_PWM_INFO
   FAR struct lpc11_timer_s *priv = (FAR struct lpc11_timer_s *)dev;
 
   /* There are no platform-specific ioctl commands */
 
-  pwmdbg("TIM%d\n", priv->timid);
+  pwminfo("TIM%d\n", priv->timid);
 #endif
   return -ENOTTY;
 }
@@ -610,7 +590,7 @@ FAR struct pwm_lowerhalf_s *lpc11_timerinitialize(int timer)
 {
   FAR struct lpc11_timer_s *lower;
 
-  pwmdbg("TIM%d\n", timer);
+  pwminfo("TIM%d\n", timer);
 
   switch (timer)
     {
@@ -624,7 +604,7 @@ FAR struct pwm_lowerhalf_s *lpc11_timerinitialize(int timer)
 #endif
 
       default:
-        pwmdbg("No such timer configured\n");
+        pwmerr("ERROR: No such timer configured\n");
         return NULL;
     }
 
diff --git a/arch/arm/src/lpc11xx/lpc11_timerisr.c b/arch/arm/src/lpc11xx/lpc11_timerisr.c
index 6bbd6e0878d48b629d80a4644cb71a019eece7c2..f334b625820cb4a8c3fe26cb2f4804c127255469 100644
--- a/arch/arm/src/lpc11xx/lpc11_timerisr.c
+++ b/arch/arm/src/lpc11xx/lpc11_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/lpc11xx/lpc11_timerisr.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -93,19 +93,11 @@
 #endif
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  lpc11_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -113,7 +105,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int lpc11_timerisr(int irq, uint32_t *regs, FAR void *arg)
 {
   /* Process timer interrupt */
 
@@ -122,7 +114,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -130,7 +126,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t regval;
 
@@ -147,7 +143,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(LPC11_IRQ_SYSTICK, (xcpt_t)up_timerisr);
+  (void)irq_attach(LPC11_IRQ_SYSTICK, (xcpt_t)lpc11_timerisr, NULL);
 
   /* Enable SysTick interrupts.  "The CLKSOURCE bit in SysTick Control and
    * Status register selects either the core clock (when CLKSOURCE = 1) or
diff --git a/arch/arm/src/lpc17xx/Kconfig b/arch/arm/src/lpc17xx/Kconfig
index 4bb53068bb687b6213aad7464bb4451b31479cfb..f8f95f8c5dff1fabfb6f99fc3b39cc2c0bdc5223 100644
--- a/arch/arm/src/lpc17xx/Kconfig
+++ b/arch/arm/src/lpc17xx/Kconfig
@@ -489,8 +489,8 @@ config ADC0_AVERAGE
 	default 200
 
 config ADC0_MASK
-	int "ADC0 mask"
-	default 1
+	hex "ADC0 mask"
+	default 0x01
 
 config ADC0_SPS
 	int "ADC0 SPS"
@@ -594,16 +594,17 @@ config CAN_LOOPBACK
 	---help---
 		Enable CAN loopback mode
 
-config CAN_REGDEBUG
+config LPC17_CAN_REGDEBUG
 	bool "Register level debug"
-	depends on DEBUG
+	depends on DEBUG_CAN_INFO
 	default n
 	---help---
-		Output detailed register-level CAN debug information.  Requires also DEBUG and DEBUG_CAN.
+		Output detailed register-level CAN debug information.  Requires also
+		CONFIG_DEBUG_CAN_INFO.
 
 endmenu
 
-config GPIO_IRQ
+config LPC17_GPIOIRQ
 	bool "GPIO interrupt support"
 	default n
 	---help---
@@ -629,20 +630,21 @@ config LPC17_I2C2_FREQUENCY
 
 endmenu
 
-menu "SDIO Configuration"
+menu "SDCARD Configuration"
 	depends on LPC17_SDCARD
 
-config SDIO_DMA
+config LPC17_SDCARD_DMA
 	bool "Support DMA data transfers"
 	default y if LPC17_GPDMA
+	select SDIO_DMA
 	depends on LPC17_GPDMA
 	---help---
 		Support DMA data transfers.
-		Enable SD card DMA data transfers.  This is a marginally optional.
+		Enable SD card DMA data transfers.  This is marginally optional.
 		For most usages, SD accesses will cause data overruns if used without
-		DMA.  Requires LPC17_SDCARD and config LPC17_GPDMA.
+		DMA.
 
-config SDIO_WIDTH_D1_ONLY
+config LPC17_SDCARD_WIDTH_D1_ONLY
 	bool "Use D1 only"
 	default n
 	---help---
@@ -703,12 +705,12 @@ config NET_WOL
 	---help---
 		Enable Wake-up on Lan (not fully implemented).
 
-config NET_REGDEBUG
+config LPC17_NET_REGDEBUG
 	bool "Ethernet register-level debug"
-	depends on DEBUG
+	depends on DEBUG_NET_INFO
 	default n
 	---help---
-		Enable low level register debug.  Also needs DEBUG.
+		Enable low level register debug.  Also needs CONFIG_DEBUG_NET_INFO.
 
 config NET_HASH
 	bool "Hashing"
@@ -723,6 +725,26 @@ config LPC17_MULTICAST
 	---help---
 		Enable receipt of multicast (and unicast) frames. Automatically set
 		if NET_IGMP is selected.
+
+choice
+	prompt "Work queue"
+	default LPC17_ETHERNET_LPWORK if SCHED_LPWORK
+	default LPC17_ETHERNET_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the Ethernet driver.  If the
+		low priority work queue is available, then it should be used by the
+		driver.
+
+config LPC17_ETHERNET_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
+
+config LPC17_ETHERNET_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
+
+endchoice # Work queue
 endmenu
 
 menu "LCD device driver options"
@@ -900,10 +922,11 @@ config LPC17_USBDEV_NOLED
 
 config LPC17_USBDEV_REGDEBUG
 	bool "Register level debug"
-	depends on DEBUG
+	depends on DEBUG_USB_INFO
 	default n
 	---help---
-		Output detailed register-level USB device debug information.  Requires also DEBUG.
+		Output detailed register-level USB device debug information.  Requires
+		also CONFIG_DEBUG_USB_INFO.
 
 endmenu
 
@@ -976,9 +999,10 @@ config USBHOST_ISOC_DISABLE
 
 config LPC17_USBHOST_REGDEBUG
 	bool "Register level debug"
-	depends on DEBUG
+	depends on DEBUG_USB_INFO
 	default n
 	---help---
-		Output detailed register-level USB host debug information.  Requires also DEBUG.
+		Output detailed register-level USB host debug information.  Requires
+		also CONFIG_DEBUG_USB_INFO.
 
 endmenu
diff --git a/arch/arm/src/lpc17xx/Make.defs b/arch/arm/src/lpc17xx/Make.defs
index 2d6193a41d7625b116086e1e7d91e808fd4059ac..115a3222a2b19fba204dac39bef454b796b03e02 100644
--- a/arch/arm/src/lpc17xx/Make.defs
+++ b/arch/arm/src/lpc17xx/Make.defs
@@ -70,10 +70,6 @@ ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
 CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
 endif
 
-ifeq ($(CONFIG_ARCH_MEMCPY),y)
-CMN_ASRCS += up_memcpy.S
-endif
-
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
 CMN_CSRCS += up_mpu.c up_task_start.c up_pthread_start.c
 ifneq ($(CONFIG_DISABLE_SIGNALS),y)
@@ -92,12 +88,6 @@ CMN_CSRCS += up_etherstub.c
 endif
 endif
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c
-endif
-
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += up_fpu.S
 ifneq ($(CONFIG_ARMV7M_CMNVECTOR),y)
@@ -133,11 +123,11 @@ ifeq ($(CONFIG_LPC17_EMC),y)
 CHIP_CSRCS += lpc17_emc.c
 endif
 
-ifeq ($(CONFIG_GPIO_IRQ),y)
+ifeq ($(CONFIG_LPC17_GPIOIRQ),y)
 CHIP_CSRCS += lpc17_gpioint.c
 endif
 
-ifeq ($(CONFIG_DEBUG_GPIO),y)
+ifeq ($(CONFIG_DEBUG_GPIO_INFO),y)
 CHIP_CSRCS += lpc17_gpiodbg.c
 endif
 
diff --git a/arch/arm/src/lpc17xx/lpc176x_gpio.c b/arch/arm/src/lpc17xx/lpc176x_gpio.c
index 7de2fd04bcce93b7001a1a16e54951537170fd97..b2b8e9805ab5cae6da35de2a75d27e61b802e7f4 100644
--- a/arch/arm/src/lpc17xx/lpc176x_gpio.c
+++ b/arch/arm/src/lpc17xx/lpc176x_gpio.c
@@ -78,7 +78,7 @@
  * actually set up to interrupt until the interrupt is enabled.
  */
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
 uint64_t g_intedge0;
 uint64_t g_intedge2;
 #endif
@@ -300,7 +300,7 @@ static int lpc17_pullup(lpc17_pinset_t cfgset, unsigned int port,
  *
  ****************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
 static void lpc17_setintedge(unsigned int port, unsigned int pin,
                              unsigned int value)
 {
@@ -328,7 +328,7 @@ static void lpc17_setintedge(unsigned int port, unsigned int pin,
   *intedge &= ~((uint64_t)3     << shift);
   *intedge |=  ((uint64_t)value << shift);
 }
-#endif /* CONFIG_GPIO_IRQ */
+#endif /* CONFIG_LPC17_GPIOIRQ */
 
 /****************************************************************************
  * Name: lpc17_setopendrain
@@ -412,7 +412,7 @@ static inline int lpc17_configinput(lpc17_pinset_t cfgset, unsigned int port, un
 
       /* Forget about any falling/rising edge interrupt enabled */
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
       lpc17_setintedge(port, pin, 0);
 #endif
     }
@@ -453,7 +453,7 @@ static inline int lpc17_configinterrupt(lpc17_pinset_t cfgset, unsigned int port
   /* Then just remember the rising/falling edge interrupt enabled */
 
   DEBUGASSERT(port == 0 || port == 2);
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
   lpc17_setintedge(port, pin, (cfgset & GPIO_EDGE_MASK) >> GPIO_EDGE_SHIFT);
 #endif
   return OK;
diff --git a/arch/arm/src/lpc17xx/lpc176x_rtc.c b/arch/arm/src/lpc17xx/lpc176x_rtc.c
index a0aa525ff736ccd5d172ef4e8d5ac111a781014c..825491596851371e7492dd6b2380a2a3dcd711a4 100644
--- a/arch/arm/src/lpc17xx/lpc176x_rtc.c
+++ b/arch/arm/src/lpc17xx/lpc176x_rtc.c
@@ -72,30 +72,6 @@
 #  error "CONFIG_RTC_HIRES must NOT be set with this driver"
 #endif
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_RTC
-#endif
-
-/* Constants ************************************************************************/
-
-/* Debug ****************************************************************************/
-
-#ifdef CONFIG_DEBUG_RTC
-#  define rtcdbg    dbg
-#  define rtcvdbg   vdbg
-#  define rtclldbg  lldbg
-#  define rtcllvdbg llvdbg
-#else
-#  define rtcdbg(x...)
-#  define rtcvdbg(x...)
-#  define rtclldbg(x...)
-#  define rtcllvdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Types
- ************************************************************************************/
-
 /************************************************************************************
  * Private Data
  ************************************************************************************/
@@ -131,12 +107,12 @@ volatile bool g_rtc_enabled = false;
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_RTC
+#ifdef CONFIG_DEBUG_RTC_INFO
 static void rtc_dumpregs(FAR const char *msg)
 {
-  rtclldbg("%s:\n", msg);
-  rtclldbg("  DOM : %08x\n", (getreg32(LPC17_RTC_DOM) & RTC_DOM_MASK));
-  rtclldbg("  DOW : %08x\n", (getreg32(LPC17_RTC_DOW) & RTC_DOW_MASK));
+  rtcinfo("%s:\n", msg);
+  rtcinfo("  DOM : %08x\n", (getreg32(LPC17_RTC_DOM) & RTC_DOM_MASK));
+  rtcinfo("  DOW : %08x\n", (getreg32(LPC17_RTC_DOW) & RTC_DOW_MASK));
 }
 #else
 #  define rtc_dumpregs(msg)
@@ -156,16 +132,16 @@ static void rtc_dumpregs(FAR const char *msg)
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_RTC
+#ifdef CONFIG_DEBUG_RTC_INFO
 static void rtc_dumptime(FAR struct tm *tp, FAR const char *msg)
 {
-  rtclldbg("%s:\n", msg);
-  rtclldbg("  tm_sec: %08x\n", tp->tm_sec);
-  rtclldbg("  tm_min: %08x\n", tp->tm_min);
-  rtclldbg(" tm_hour: %08x\n", tp->tm_hour);
-  rtclldbg(" tm_mday: %08x\n", tp->tm_mday);
-  rtclldbg("  tm_mon: %08x\n", tp->tm_mon);
-  rtclldbg(" tm_year: %08x\n", tp->tm_year);
+  rtcinfo("%s:\n", msg);
+  rtcinfo("  tm_sec: %08x\n", tp->tm_sec);
+  rtcinfo("  tm_min: %08x\n", tp->tm_min);
+  rtcinfo(" tm_hour: %08x\n", tp->tm_hour);
+  rtcinfo(" tm_mday: %08x\n", tp->tm_mday);
+  rtcinfo("  tm_mon: %08x\n", tp->tm_mon);
+  rtcinfo(" tm_year: %08x\n", tp->tm_year);
 }
 #else
 #  define rtc_dumptime(tp, msg)
@@ -251,7 +227,7 @@ static int rtc_resume(void)
  ************************************************************************************/
 
 #ifdef CONFIG_RTC_ALARM
-static int rtc_interrupt(int irq, void *context)
+static int rtc_interrupt(int irq, void *context, FAR void *arg)
 {
 #warning "Missing logic"
   return OK;
@@ -286,7 +262,7 @@ int up_rtc_initialize(void)
   /* Attach the RTC interrupt handler */
 
 #ifdef CONFIG_RTC_ALARM
-  ret = irq_attach(LPC17_IRQ_RTC, rtc_interrupt);
+  ret = irq_attach(LPC17_IRQ_RTC, rtc_interrupt, NULL);
   if (ret == OK)
     {
       up_enable_irq(LPC17_IRQ_RTC);
diff --git a/arch/arm/src/lpc17xx/lpc178x_gpio.c b/arch/arm/src/lpc17xx/lpc178x_gpio.c
index a30b7d425583a47695c00a8dcecb5b6f0cae56e9..a6892d597f6c3be9db6d6bb18156c94d61561159 100644
--- a/arch/arm/src/lpc17xx/lpc178x_gpio.c
+++ b/arch/arm/src/lpc17xx/lpc178x_gpio.c
@@ -79,7 +79,7 @@
  * actually set up to interrupt until the interrupt is enabled.
  */
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
 uint64_t g_intedge0;
 uint64_t g_intedge2;
 #endif
@@ -526,7 +526,7 @@ static void lpc17_setpullup(lpc17_pinset_t cfgset, unsigned int port,
  *
  ****************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
 static void lpc17_setintedge(unsigned int port, unsigned int pin,
                              unsigned int value)
 {
@@ -554,7 +554,7 @@ static void lpc17_setintedge(unsigned int port, unsigned int pin,
   *intedge &= ~((uint64_t)3     << shift);
   *intedge |=  ((uint64_t)value << shift);
 }
-#endif /* CONFIG_GPIO_IRQ */
+#endif /* CONFIG_LPC17_GPIOIRQ */
 
 /****************************************************************************
  * Name: lpc17_configinput
@@ -601,7 +601,7 @@ static inline int lpc17_configinput(lpc17_pinset_t cfgset, unsigned int port,
 
       /* Forget about any falling/rising edge interrupt enabled */
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
       lpc17_setintedge(port, pin, 0);
 #endif
     }
@@ -656,7 +656,7 @@ static inline int lpc17_configinterrupt(lpc17_pinset_t cfgset, unsigned int port
   /* Then just remember the rising/falling edge interrupt enabled */
 
   DEBUGASSERT(port == 0 || port == 2);
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
   lpc17_setintedge(port, pin, (cfgset & GPIO_EDGE_MASK) >> GPIO_EDGE_SHIFT);
 #endif
   return OK;
diff --git a/arch/arm/src/lpc17xx/lpc17_adc.c b/arch/arm/src/lpc17xx/lpc17_adc.c
index 490b25bf800cf0a19656b759ff0225f18f1a1e98..54d059331524e2793c4070f3d39514f80c045551 100644
--- a/arch/arm/src/lpc17xx/lpc17_adc.c
+++ b/arch/arm/src/lpc17xx/lpc17_adc.c
@@ -112,7 +112,7 @@ static int  adc_setup(FAR struct adc_dev_s *dev);
 static void adc_shutdown(FAR struct adc_dev_s *dev);
 static void adc_rxint(FAR struct adc_dev_s *dev, bool enable);
 static int  adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg);
-static int  adc_interrupt(int irq, void *context);
+static int  adc_interrupt(int irq, void *context, FAR void *arg);
 
 /****************************************************************************
  * Private Data
@@ -304,7 +304,7 @@ static int adc_setup(FAR struct adc_dev_s *dev)
   FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
   int i;
 
-  int ret = irq_attach(priv->irq, adc_interrupt);
+  int ret = irq_attach(priv->irq, adc_interrupt, NULL);
   if (ret == OK)
     {
       for (i = 0; i < 8; i++)
@@ -406,7 +406,7 @@ static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg)
  *
  ****************************************************************************/
 
-static int adc_interrupt(int irq, void *context)
+static int adc_interrupt(int irq, void *context, FAR void *arg)
 {
 #ifndef CONFIG_ADC_BURSTMODE
 #ifdef CONFIG_ADC_CHANLIST
diff --git a/arch/arm/src/lpc17xx/lpc17_allocateheap.c b/arch/arm/src/lpc17xx/lpc17_allocateheap.c
index 20568f0457f7efa62315da17bca90be2222b56dc..dd1652bf18d4dcb9db9fb52b97880d13dc838606 100644
--- a/arch/arm/src/lpc17xx/lpc17_allocateheap.c
+++ b/arch/arm/src/lpc17xx/lpc17_allocateheap.c
@@ -136,7 +136,7 @@
 #    endif /* LPC17_HAVE_BANK1 && LPC17_BANK1_HEAPSIZE */
 #  else /* !LPC17_BANK0_HEAPSIZE */
 
-     /* We have Bnak 0, but no memory is available for the heap there.
+     /* We have Bank 0, but no memory is available for the heap there.
       * Do we have Bank 1? Is any heap memory available in Bank 1?
       */
 
diff --git a/arch/arm/src/lpc17xx/lpc17_can.c b/arch/arm/src/lpc17xx/lpc17_can.c
index c3949f2778e0427b0de7aae20582dd6e5ccf223f..11ac88cc04debf2557f3aee6b5276a6d2e157001 100644
--- a/arch/arm/src/lpc17xx/lpc17_can.c
+++ b/arch/arm/src/lpc17xx/lpc17_can.c
@@ -57,7 +57,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 #include "up_internal.h"
 #include "up_arch.h"
@@ -160,25 +160,8 @@
 /* Debug ********************************************************************/
 /* Non-standard debug that may be enabled just for testing CAN */
 
-#if !defined(CONFIG_DEBUG) || !defined(CONFIG_DEBUG_CAN)
-#  undef CONFIG_CAN_REGDEBUG
-#endif
-
-#ifdef CONFIG_DEBUG_CAN
-#  ifdef CONFIG_CAN_REGDEBUG
-#    define candbg  lldbg
-#    define canvdbg llvdbg
-#  else
-#    define candbg  dbg
-#    define canvdbg vdbg
-#  endif
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
-#else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
+#ifndef CONFIG_DEBUG_CAN_INFO
+#  undef CONFIG_LPC17_CAN_REGDEBUG
 #endif
 
 /* Timing *******************************************************************/
@@ -203,14 +186,14 @@ struct up_dev_s
  ****************************************************************************/
 /* CAN Register access */
 
-#ifdef CONFIG_CAN_REGDEBUG
+#ifdef CONFIG_LPC17_CAN_REGDEBUG
 static void can_printreg(uint32_t addr, uint32_t value);
 #endif
 
 static uint32_t can_getreg(struct up_dev_s *priv, int offset);
 static void can_putreg(struct up_dev_s *priv, int offset, uint32_t value);
 
-#ifdef CONFIG_CAN_REGDEBUG
+#ifdef CONFIG_LPC17_CAN_REGDEBUG
 static uint32_t can_getcommon(uint32_t addr);
 static void can_putcommon(uint32_t addr, uint32_t value);
 #else
@@ -234,7 +217,7 @@ static bool can_txempty(FAR struct can_dev_s *dev);
 /* CAN interrupts */
 
 static void can_interrupt(FAR struct can_dev_s *dev);
-static int  can12_interrupt(int irq, void *context);
+static int  can12_interrupt(int irq, void *context, FAR void *arg);
 
 /* Initialization */
 
@@ -308,7 +291,7 @@ static struct can_dev_s g_can2dev =
  *
  ****************************************************************************/
 
-#ifdef CONFIG_CAN_REGDEBUG
+#ifdef CONFIG_LPC17_CAN_REGDEBUG
 static void can_printreg(uint32_t addr, uint32_t value)
 {
   static uint32_t prevaddr = 0;
@@ -325,7 +308,7 @@ static void can_printreg(uint32_t addr, uint32_t value)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              caninfo("...\n");
             }
 
           return;
@@ -342,7 +325,7 @@ static void can_printreg(uint32_t addr, uint32_t value)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          caninfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -354,7 +337,7 @@ static void can_printreg(uint32_t addr, uint32_t value)
 
   /* Show the register value read */
 
-  lldbg("%08x->%08x\n", addr, value);
+  caninfo("%08x->%08x\n", addr, value);
 }
 #endif
 
@@ -372,7 +355,7 @@ static void can_printreg(uint32_t addr, uint32_t value)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_CAN_REGDEBUG
+#ifdef CONFIG_LPC17_CAN_REGDEBUG
 static uint32_t can_getreg(struct up_dev_s *priv, int offset)
 {
   uint32_t addr;
@@ -408,14 +391,14 @@ static uint32_t can_getreg(struct up_dev_s *priv, int offset)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_CAN_REGDEBUG
+#ifdef CONFIG_LPC17_CAN_REGDEBUG
 static void can_putreg(struct up_dev_s *priv, int offset, uint32_t value)
 {
   uint32_t addr = priv->base + offset;
 
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", addr, value);
+  caninfo("%08x<-%08x\n", addr, value);
 
   /* Write the value */
 
@@ -442,7 +425,7 @@ static void can_putreg(struct up_dev_s *priv, int offset, uint32_t value)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_CAN_REGDEBUG
+#ifdef CONFIG_LPC17_CAN_REGDEBUG
 static uint32_t can_getcommon(uint32_t addr)
 {
   uint32_t value;
@@ -470,12 +453,12 @@ static uint32_t can_getcommon(uint32_t addr)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_CAN_REGDEBUG
+#ifdef CONFIG_LPC17_CAN_REGDEBUG
 static void can_putcommon(uint32_t addr, uint32_t value)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", addr, value);
+  caninfo("%08x<-%08x\n", addr, value);
 
   /* Write the value */
 
@@ -504,7 +487,7 @@ static void can_reset(FAR struct can_dev_s *dev)
   irqstate_t flags;
   int ret;
 
-  canvdbg("CAN%d\n", priv->port);
+  caninfo("CAN%d\n", priv->port);
 
   flags = enter_critical_section();
 
@@ -520,7 +503,7 @@ static void can_reset(FAR struct can_dev_s *dev)
   ret = can_bittiming(priv);
   if (ret != OK)
     {
-      candbg("ERROR: Failed to set bit timing: %d\n", ret);
+      canerr("ERROR: Failed to set bit timing: %d\n", ret);
     }
 
   /* Restart the CAN */
@@ -553,18 +536,19 @@ static void can_reset(FAR struct can_dev_s *dev)
 
 static int can_setup(FAR struct can_dev_s *dev)
 {
-#ifdef CONFIG_DEBUG_CAN
+#ifdef CONFIG_DEBUG_CAN_INFO
   FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->cd_priv;
 #endif
   int ret;
 
-  canvdbg("CAN%d\n", priv->port);
+  caninfo("CAN%d\n", priv->port);
 
-  ret = irq_attach(LPC17_IRQ_CAN, can12_interrupt);
+  ret = irq_attach(LPC17_IRQ_CAN, can12_interrupt, NULL);
   if (ret == OK)
     {
       up_enable_irq(LPC17_IRQ_CAN);
     }
+
   return ret;
 }
 
@@ -585,10 +569,10 @@ static int can_setup(FAR struct can_dev_s *dev)
 
 static void can_shutdown(FAR struct can_dev_s *dev)
 {
-#ifdef CONFIG_DEBUG_CAN
+#ifdef CONFIG_DEBUG_CAN_INFO
   FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->cd_priv;
 
-  canvdbg("CAN%d\n", priv->port);
+  caninfo("CAN%d\n", priv->port);
 #endif
 
   up_disable_irq(LPC17_IRQ_CAN);
@@ -615,7 +599,7 @@ static void can_rxint(FAR struct can_dev_s *dev, bool enable)
   uint32_t regval;
   irqstate_t flags;
 
-  canvdbg("CAN%d enable: %d\n", priv->port, enable);
+  caninfo("CAN%d enable: %d\n", priv->port, enable);
 
   /* The EIR register is also modifed from the interrupt handler, so we have
    * to protect this code section.
@@ -656,7 +640,7 @@ static void can_txint(FAR struct can_dev_s *dev, bool enable)
   uint32_t regval;
   irqstate_t flags;
 
-  canvdbg("CAN%d enable: %d\n", priv->port, enable);
+  caninfo("CAN%d enable: %d\n", priv->port, enable);
 
   /* Only disabling of the TX interrupt is supported here.  The TX interrupt
    * is automatically enabled just before a message is sent in order to avoid
@@ -697,7 +681,7 @@ static void can_txint(FAR struct can_dev_s *dev, bool enable)
 
 static int can_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg)
 {
-  dbg("Fix me:Not Implemented\n");
+  canerr("ERROR: Fix me -- Not Implemented\n");
   return 0;
 }
 
@@ -717,7 +701,7 @@ static int can_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg)
 
 static int can_remoterequest(FAR struct can_dev_s *dev, uint16_t id)
 {
-  dbg("Fix me:Not Implemented\n");
+  canerr("ERROR: Fix me -- Not Implemented\n");
   return 0;
 }
 
@@ -753,7 +737,7 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
   irqstate_t flags;
   int ret = OK;
 
-  canvdbg("CAN%d ID: %d DLC: %d\n",
+  caninfo("CAN%d ID: %d DLC: %d\n",
           priv->port, msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc);
 
   if (msg->cm_hdr.ch_rtr)
@@ -878,7 +862,7 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
     }
   else
     {
-      candbg("No available transmission buffer, SR: %08x\n", regval);
+      canerr("ERROR: No available transmission buffer, SR: %08x\n", regval);
       ret = -EBUSY;
     }
 
@@ -958,7 +942,7 @@ static void can_interrupt(FAR struct can_dev_s *dev)
   /* Read the interrupt and capture register (also clearing most status bits) */
 
   regval = can_getreg(priv, LPC17_CAN_ICR_OFFSET);
-  canllvdbg("CAN%d ICR: %08x\n",  priv->port, regval);
+  caninfo("CAN%d ICR: %08x\n",  priv->port, regval);
 
   /* Check for a receive interrupt */
 
@@ -988,7 +972,7 @@ static void can_interrupt(FAR struct can_dev_s *dev)
 
       if ((rfs & CAN_RFS_FF) != 0)
         {
-          canlldbg("ERROR: Received message with extended identifier.  Dropped\n");
+          canerr("ERROR: Received message with extended identifier.  Dropped\n");
         }
       else
 #endif
@@ -1061,11 +1045,11 @@ static void can_interrupt(FAR struct can_dev_s *dev)
  *
  ****************************************************************************/
 
-static int can12_interrupt(int irq, void *context)
+static int can12_interrupt(int irq, void *context, FAR void *arg)
 {
   /* Handle CAN1/2 interrupts */
 
-  canllvdbg("irq: %d\n",  irq);
+  caninfo("irq: %d\n",  irq);
 
 #ifdef CONFIG_LPC17_CAN1
   can_interrupt(&g_can1dev);
@@ -1142,8 +1126,8 @@ static int can_bittiming(struct up_dev_s *priv)
   uint32_t ts2;
   uint32_t sjw;
 
-  canllvdbg("CAN%d PCLK: %d baud: %d\n", priv->port,
-            CAN_CLOCK_FREQUENCY(priv->divisor), priv->baud);
+  caninfo("CAN%d PCLK: %d baud: %d\n", priv->port,
+          CAN_CLOCK_FREQUENCY(priv->divisor), priv->baud);
 
   /* Try to get CAN_BIT_QUANTA quanta in one bit_time.
    *
@@ -1195,7 +1179,7 @@ static int can_bittiming(struct up_dev_s *priv)
 
   sjw = 1;
 
-  canllvdbg("TS1: %d TS2: %d BRP: %d SJW= %d\n", ts1, ts2, brp, sjw);
+  caninfo("TS1: %d TS2: %d BRP: %d SJW= %d\n", ts1, ts2, brp, sjw);
 
   /* Configure bit timing */
 
@@ -1212,7 +1196,7 @@ static int can_bittiming(struct up_dev_s *priv)
   btr |= CAN_BTR_SAM;
 #endif
 
-  canllvdbg("Setting CANxBTR= 0x%08x\n", btr);
+  caninfo("Setting CANxBTR= 0x%08x\n", btr);
   can_putreg(priv, LPC17_CAN_BTR_OFFSET, btr);        /* Set bit timing */
   return OK;
 }
@@ -1240,7 +1224,7 @@ FAR struct can_dev_s *lpc17_caninitialize(int port)
   irqstate_t flags;
   uint32_t regval;
 
-  canllvdbg("CAN%d\n",  port);
+  caninfo("CAN%d\n",  port);
 
   flags = enter_critical_section();
 
@@ -1299,7 +1283,7 @@ FAR struct can_dev_s *lpc17_caninitialize(int port)
   else
 #endif
     {
-      candbg("Unsupported port: %d\n", port);
+      canerr("ERROR: Unsupported port: %d\n", port);
       leave_critical_section(flags);
       return NULL;
     }
diff --git a/arch/arm/src/lpc17xx/lpc17_dac.c b/arch/arm/src/lpc17xx/lpc17_dac.c
index d5100c5e50a443eacd766e4b5508980de71201e3..003d6092664620401d2d9356ef201b915b0024ce 100644
--- a/arch/arm/src/lpc17xx/lpc17_dac.c
+++ b/arch/arm/src/lpc17xx/lpc17_dac.c
@@ -170,9 +170,9 @@ static int  dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg)
 
 /* All ioctl calls will be routed through this method */
 
-static int  dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg)
+static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg)
 {
-  dbg("Fix me:Not Implemented\n");
+  aerr("ERROR: Fix me -- Not Implemented\n");
   return 0;
 }
 
diff --git a/arch/arm/src/lpc17xx/lpc17_ethernet.c b/arch/arm/src/lpc17xx/lpc17_ethernet.c
index 4bc992d2ce9cf440c3a38deeb694361a504ba149..42e046aea1cacd1d4ec680c3b93f5482e70f57f0 100644
--- a/arch/arm/src/lpc17xx/lpc17_ethernet.c
+++ b/arch/arm/src/lpc17xx/lpc17_ethernet.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/lpc17xx/lpc17_ethernet.c
  *
- *   Copyright (C) 2010-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -52,15 +52,12 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
 
-#ifdef CONFIG_NET_NOINTS
-#  include 
-#endif
-
 #ifdef CONFIG_NET_PKT
 #  include 
 #endif
@@ -83,12 +80,23 @@
  * Pre-processor Definitions
  ****************************************************************************/
 /* Configuration ************************************************************/
-/* If processing is not done at the interrupt level, then high priority
- * work queue support is required.
+/* If processing is not done at the interrupt level, then work queue support
+ * is required.
  */
 
-#if defined(CONFIG_NET_NOINTS) && !defined(CONFIG_SCHED_HPWORK)
-#  error High priority work queue support is required
+#if !defined(CONFIG_SCHED_WORKQUEUE)
+#  error Work queue support is required
+#else
+
+  /* Select work queue */
+
+#  if defined(CONFIG_LPC17_ETHERNET_HPWORK)
+#    define ETHWORK HPWORK
+#  elif defined(CONFIG_LPC17_ETHERNET_LPWORK)
+#    define ETHWORK LPWORK
+#  else
+#    error Neither CONFIG_LPC17_ETHERNET_HPWORK nor CONFIG_LPC17_ETHERNET_LPWORK defined
+#  endif
 #endif
 
 /* CONFIG_LPC17_NINTERFACES determines the number of physical interfaces
@@ -126,18 +134,20 @@
 #  define CONFIG_NET_PRIORITY NVIC_SYSH_PRIORITY_DEFAULT
 #endif
 
+#define PKTBUF_SIZE (MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE)
+
 /* Debug Configuration *****************************************************/
-/* Register debug -- can only happen of CONFIG_DEBUG is selected */
+/* Register debug -- can only happen of CONFIG_DEBUG_NET_INFO is selected */
 
-#ifndef CONFIG_DEBUG
-#  undef  CONFIG_NET_REGDEBUG
+#ifndef CONFIG_DEBUG_NET_INFO
+#  undef  CONFIG_LPC17_NET_REGDEBUG
 #endif
 
 /* CONFIG_NET_DUMPPACKET will dump the contents of each packet to the
  * console.
  */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_NET_INFO
 #  undef  CONFIG_NET_DUMPPACKET
 #endif
 
@@ -262,12 +272,10 @@ struct lpc17_driver_s
   WDOG_ID  lp_txpoll;           /* TX poll timer */
   WDOG_ID  lp_txtimeout;        /* TX timeout timer */
 
-#ifdef CONFIG_NET_NOINTS
   struct work_s lp_txwork;      /* TX work continuation */
   struct work_s lp_rxwork;      /* RX work continuation */
   struct work_s lp_pollwork;    /* Poll work continuation */
   uint32_t status;
-#endif /* CONFIG_NET_NOINTS */
 
   /* This holds the information visible to the NuttX networking layer */
 
@@ -278,6 +286,10 @@ struct lpc17_driver_s
  * Private Data
  ****************************************************************************/
 
+/* A single packet buffer per interface is used */
+
+static uint8_t g_pktbuf[PKTBUF_SIZE * CONFIG_LPC17_NINTERFACES];
+
 /* Array of ethernet driver status structures */
 
 static struct lpc17_driver_s g_ethdrvr[CONFIG_LPC17_NINTERFACES];
@@ -301,7 +313,7 @@ static const uint16_t g_enetpins[GPIO_NENET_PINS] =
 
 /* Register operations */
 
-#ifdef CONFIG_NET_REGDEBUG
+#ifdef CONFIG_LPC17_NET_REGDEBUG
 static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite);
 static void lpc17_checkreg(uint32_t addr, uint32_t val, bool iswrite);
 static uint32_t lpc17_getreg(uint32_t addr);
@@ -320,26 +332,17 @@ static int  lpc17_txpoll(struct net_driver_s *dev);
 /* Interrupt handling */
 
 static void lpc17_response(struct lpc17_driver_s *priv);
-static void lpc17_rxdone_process(struct lpc17_driver_s *priv);
-static void lpc17_txdone_process(struct lpc17_driver_s *priv);
-#ifdef CONFIG_NET_NOINTS
+
 static void lpc17_txdone_work(FAR void *arg);
 static void lpc17_rxdone_work(FAR void *arg);
-#endif /* CONFIG_NET_NOINTS */
-static int  lpc17_interrupt(int irq, void *context);
+static int  lpc17_interrupt(int irq, void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
-static void lpc17_txtimeout_process(FAR struct lpc17_driver_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void lpc17_txtimeout_work(FAR void *arg);
-#endif /* CONFIG_NET_NOINTS */
 static void lpc17_txtimeout_expiry(int argc, uint32_t arg, ...);
 
-static void lpc17_poll_process(FAR struct lpc17_driver_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void lpc17_poll_work(FAR void *arg);
-#endif /* CONFIG_NET_NOINTS */
 static void lpc17_poll_expiry(int argc, uint32_t arg, ...);
 
 /* NuttX callback functions */
@@ -350,11 +353,9 @@ static void lpc17_ipv6multicast(FAR struct lpc17_driver_s *priv);
 static int lpc17_ifup(struct net_driver_s *dev);
 static int lpc17_ifdown(struct net_driver_s *dev);
 
-static void lpc17_txavail_process(FAR struct lpc17_driver_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void lpc17_txavail_work(FAR void *arg);
-#endif
 static int lpc17_txavail(struct net_driver_s *dev);
+
 #if defined(CONFIG_NET_IGMP) || defined(CONFIG_NET_ICMPv6)
 static uint32_t lpc17_calcethcrc(const uint8_t *data, size_t length);
 static int lpc17_addmac(struct net_driver_s *dev, const uint8_t *mac);
@@ -365,7 +366,7 @@ static int lpc17_rmmac(struct net_driver_s *dev, const uint8_t *mac);
 
 /* Initialization functions */
 
-#if defined(CONFIG_NET_REGDEBUG) && defined(CONFIG_DEBUG_GPIO)
+#if defined(CONFIG_LPC17_NET_REGDEBUG) && defined(CONFIG_DEBUG_GPIO_INFO)
 static void lpc17_showpins(void);
 #else
 #  define lpc17_showpins()
@@ -374,7 +375,7 @@ static void lpc17_showpins(void);
 /* PHY initialization functions */
 
 #ifdef LPC17_HAVE_PHY
-#  ifdef CONFIG_NET_REGDEBUG
+#  ifdef CONFIG_LPC17_NET_REGDEBUG
 static void lpc17_showmii(uint8_t phyaddr, const char *msg);
 #  else
 #    define lpc17_showmii(phyaddr,msg)
@@ -412,10 +413,10 @@ static void lpc17_ethreset(struct lpc17_driver_s *priv);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_NET_REGDEBUG
+#ifdef CONFIG_LPC17_NET_REGDEBUG
 static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite)
 {
-  dbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
+  ninfo("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
 }
 #endif
 
@@ -427,7 +428,7 @@ static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_NET_REGDEBUG
+#ifdef CONFIG_LPC17_NET_REGDEBUG
 static void lpc17_checkreg(uint32_t addr, uint32_t val, bool iswrite)
 {
   static uint32_t prevaddr = 0;
@@ -465,7 +466,7 @@ static void lpc17_checkreg(uint32_t addr, uint32_t val, bool iswrite)
             {
               /* No.. More than one. */
 
-              dbg("[repeats %d more times]\n", count);
+              ninfo("[repeats %d more times]\n", count);
             }
         }
 
@@ -491,7 +492,7 @@ static void lpc17_checkreg(uint32_t addr, uint32_t val, bool iswrite)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_NET_REGDEBUG
+#ifdef CONFIG_LPC17_NET_REGDEBUG
 static uint32_t lpc17_getreg(uint32_t addr)
 {
   /* Read the value from the register */
@@ -513,7 +514,7 @@ static uint32_t lpc17_getreg(uint32_t addr)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_NET_REGDEBUG
+#ifdef CONFIG_LPC17_NET_REGDEBUG
 static void lpc17_putreg(uint32_t val, uint32_t addr)
 {
   /* Check if we need to print this value */
@@ -642,6 +643,7 @@ static int lpc17_transmit(struct lpc17_driver_s *priv)
 
       prodidx = 0;
     }
+
   lpc17_putreg(prodidx, LPC17_ETH_TXPRODIDX);
 
   /* Enable Tx interrupts */
@@ -786,30 +788,40 @@ static void lpc17_response(struct lpc17_driver_s *priv)
 }
 
 /****************************************************************************
- * Function: lpc17_rxdone_process
+ * Function: lpc17_rxdone_work
  *
  * Description:
- *   An interrupt was received indicating the availability of a new RX packet
+ *   Perform Rx interrupt handling logic outside of the interrupt handler (on
+ *   the work queue thread).
  *
  * Parameters:
- *   priv  - Reference to the driver state structure
+ *   arg - The reference to the driver structure (case to void*)
  *
  * Returned Value:
  *   None
  *
  * Assumptions:
- *   Global interrupts are disabled by interrupt handling logic.
  *
  ****************************************************************************/
 
-static void lpc17_rxdone_process(struct lpc17_driver_s *priv)
+static void lpc17_rxdone_work(FAR void *arg)
 {
-  uint32_t    *rxstat;
-  bool         fragment;
+  FAR struct lpc17_driver_s *priv = (FAR struct lpc17_driver_s *)arg;
+  irqstate_t flags;
+  uint32_t *rxstat;
+  bool fragment;
   unsigned int prodidx;
   unsigned int considx;
   unsigned int pktlen;
 
+  DEBUGASSERT(priv);
+
+  /* Perform pending RX work.  RX interrupts were disabled prior to
+   * scheduling this work to prevent work queue overruns.
+   */
+
+  net_lock();
+
   /* Get the current producer and consumer indices */
 
   considx = lpc17_getreg(LPC17_ETH_RXCONSIDX) & ETH_RXCONSIDX_MASK;
@@ -832,13 +844,13 @@ static void lpc17_rxdone_process(struct lpc17_driver_s *priv)
       pktlen   = (*rxstat & RXSTAT_INFO_RXSIZE_MASK) - 3;
 
       /* Check for errors.  NOTE:  The DMA engine reports bogus length errors,
-       * making this a pretty useless check.
+       * making this a pretty useless (as well as annoying) check.
        */
 
       if ((*rxstat & RXSTAT_INFO_ERROR) != 0)
         {
-          nlldbg("Error. considx: %08x prodidx: %08x rxstat: %08x\n",
-                 considx, prodidx, *rxstat);
+          nerr("ERROR: considx: %08x prodidx: %08x rxstat: %08x\n",
+               considx, prodidx, *rxstat);
           NETDEV_RXERRORS(&priv->lp_dev);
         }
 
@@ -850,21 +862,21 @@ static void lpc17_rxdone_process(struct lpc17_driver_s *priv)
 
       /* else */ if (pktlen > CONFIG_NET_ETH_MTU + CONFIG_NET_GUARDSIZE)
         {
-          nlldbg("Too big. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
-                 considx, prodidx, pktlen, *rxstat);
+          nwarn("WARNING: Too big. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
+                considx, prodidx, pktlen, *rxstat);
           NETDEV_RXERRORS(&priv->lp_dev);
         }
       else if ((*rxstat & RXSTAT_INFO_LASTFLAG) == 0)
         {
-          nlldbg("Fragment. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
-                 considx, prodidx, pktlen, *rxstat);
+          ninfo("Fragment. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
+                considx, prodidx, pktlen, *rxstat);
           NETDEV_RXFRAGMENTS(&priv->lp_dev);
           fragment = true;
         }
       else if (fragment)
         {
-          nlldbg("Last fragment. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
-                 considx, prodidx, pktlen, *rxstat);
+          ninfo("Last fragment. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
+                considx, prodidx, pktlen, *rxstat);
           NETDEV_RXFRAGMENTS(&priv->lp_dev);
           fragment = false;
         }
@@ -906,7 +918,7 @@ static void lpc17_rxdone_process(struct lpc17_driver_s *priv)
 #ifdef CONFIG_NET_IPv4
           if (BUF->type == HTONS(ETHTYPE_IP))
             {
-              nllvdbg("IPv4 frame\n");
+              ninfo("IPv4 frame\n");
               NETDEV_RXIPV4(&priv->lp_dev);
 
               /* Handle ARP on input then give the IPv4 packet to the
@@ -948,7 +960,7 @@ static void lpc17_rxdone_process(struct lpc17_driver_s *priv)
 #ifdef CONFIG_NET_IPv6
           if (BUF->type == HTONS(ETHTYPE_IP6))
             {
-              nllvdbg("Iv6 frame\n");
+              ninfo("Iv6 frame\n");
               NETDEV_RXIPV6(&priv->lp_dev);
 
               /* Give the IPv6 packet to the network layer */
@@ -1023,37 +1035,55 @@ static void lpc17_rxdone_process(struct lpc17_driver_s *priv)
       lpc17_putreg(considx, LPC17_ETH_RXCONSIDX);
       prodidx = lpc17_getreg(LPC17_ETH_RXPRODIDX) & ETH_RXPRODIDX_MASK;
     }
+
+  net_unlock();
+
+  /* Re-enable RX interrupts (this must be atomic).  Skip this step if the
+   * lp-txpending TX underrun state is in effect.
+   */
+
+  flags = enter_critical_section();
+  if (!priv->lp_txpending)
+    {
+      priv->lp_inten |= ETH_RXINTS;
+      lpc17_putreg(priv->lp_inten, LPC17_ETH_INTEN);
+    }
+
+  leave_critical_section(flags);
 }
 
+
 /****************************************************************************
- * Function: lpc17_txdone_process
+ * Function: lpc17_txdone_work
  *
  * Description:
- *   An interrupt was received indicating that the last TX packet(s) is done
+ *   Perform Tx interrupt handling logic outside of the interrupt handler (on
+ *   the work queue thread).
  *
  * Parameters:
- *   priv  - Reference to the driver state structure
+ *   arg - The reference to the driver structure (case to void*)
  *
  * Returned Value:
  *   None
  *
- * Assumptions:
- *   Global interrupts are disabled by interrupt handling logic.
- *
  ****************************************************************************/
 
-static void lpc17_txdone_process(struct lpc17_driver_s *priv)
+static void lpc17_txdone_work(FAR void *arg)
 {
+  FAR struct lpc17_driver_s *priv = (FAR struct lpc17_driver_s *)arg;
+
   /* Verify that the hardware is ready to send another packet.  Since a Tx
    * just completed, this must be the case.
    */
 
+  DEBUGASSERT(priv);
   DEBUGASSERT(lpc17_txdesc(priv) == OK);
 
   /* Check if there is a pending Tx transfer that was scheduled by Rx handling
    * while the Tx logic was busy.  If so, processing that pending Tx now.
    */
 
+  net_lock();
   if (priv->lp_txpending)
     {
       /* Clear the pending condition, send the packet, and restore Rx interrupts */
@@ -1072,73 +1102,9 @@ static void lpc17_txdone_process(struct lpc17_driver_s *priv)
     {
       (void)devif_poll(&priv->lp_dev, lpc17_txpoll);
     }
-}
-
-/****************************************************************************
- * Function: lpc17_txdone_work and lpc17_rxdone_work
- *
- * Description:
- *   Perform interrupt handling logic outside of the interrupt handler (on
- *   the work queue thread).
- *
- * Parameters:
- *   arg - The reference to the driver structure (case to void*)
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void lpc17_txdone_work(FAR void *arg)
-{
-  FAR struct lpc17_driver_s *priv = (FAR struct lpc17_driver_s *)arg;
-  net_lock_t state;
-
-  DEBUGASSERT(priv);
-
-  /* Perform pending TX work.  At this point TX interrupts are disable but
-   * may be re-enabled again depending on the actions of
-   * lpc17_txdone_process().
-   */
-
-  state = net_lock();
-  lpc17_txdone_process(priv);
-  net_unlock(state);
-}
-
-static void lpc17_rxdone_work(FAR void *arg)
-{
-  FAR struct lpc17_driver_s *priv = (FAR struct lpc17_driver_s *)arg;
-  irqstate_t flags;
-  net_lock_t state;
-
-  DEBUGASSERT(priv);
-
-  /* Perform pending RX work.  RX interrupts were disabled prior to
-   * scheduling this work to prevent work queue overruns.
-   */
-
-  state = net_lock();
-  lpc17_rxdone_process(priv);
-  net_unlock(state);
-
-  /* Re-enable RX interrupts (this must be atomic).  Skip this step if the
-   * lp-txpending TX underrun state is in effect.
-   */
-
-  flags = enter_critical_section();
-  if (!priv->lp_txpending)
-    {
-      priv->lp_inten |= ETH_RXINTS;
-      lpc17_putreg(priv->lp_inten, LPC17_ETH_INTEN);
-    }
 
-  leave_critical_section(flags);
+  net_unlock();
 }
-#endif /* CONFIG_NET_NOINTS */
 
 /****************************************************************************
  * Function: lpc17_interrupt
@@ -1157,7 +1123,7 @@ static void lpc17_rxdone_work(FAR void *arg)
  *
  ****************************************************************************/
 
-static int lpc17_interrupt(int irq, void *context)
+static int lpc17_interrupt(int irq, void *context, FAR void *arg)
 {
   register struct lpc17_driver_s *priv;
   uint32_t status;
@@ -1202,13 +1168,13 @@ static int lpc17_interrupt(int irq, void *context)
         {
           if ((status & ETH_INT_RXOVR) != 0)
             {
-              nlldbg("RX Overrun. status: %08x\n", status);
+              nerr("ERROR: RX Overrun. status: %08x\n", status);
               NETDEV_RXERRORS(&priv->lp_dev);
             }
 
           if ((status & ETH_INT_TXUNR) != 0)
             {
-              nlldbg("TX Underrun. status: %08x\n", status);
+              nerr("ERROR: TX Underrun. status: %08x\n", status);
               NETDEV_TXERRORS(&priv->lp_dev);
             }
 
@@ -1224,12 +1190,12 @@ static int lpc17_interrupt(int irq, void *context)
            * or Overrun.  NOTE:  (1) We will still need to call lpc17_rxdone_process
            * on RX errors to bump the considx over the bad packet.  (2) The
            * DMA engine reports bogus length errors, making this a pretty
-           * useless check anyway.
+           * useless (as well as annoying) check anyway.
            */
 
           if ((status & ETH_INT_RXERR) != 0)
             {
-              nlldbg("RX Error. status: %08x\n", status);
+              nerr("ERROR: RX ERROR: status: %08x\n", status);
               NETDEV_RXERRORS(&priv->lp_dev);
             }
 
@@ -1248,8 +1214,6 @@ static int lpc17_interrupt(int irq, void *context)
           if ((status & ETH_INT_RXFIN) != 0 || (status & ETH_INT_RXDONE) != 0)
             {
               /* We have received at least one new incoming packet. */
-
-#ifdef CONFIG_NET_NOINTS
               /* Disable further TX interrupts for now.  TX interrupts will
                * be re-enabled after the work has been processed.
                */
@@ -1257,19 +1221,12 @@ static int lpc17_interrupt(int irq, void *context)
               priv->lp_inten &= ~ETH_RXINTS;
               lpc17_putreg(priv->lp_inten, LPC17_ETH_INTEN);
 
-              /* Cancel any pending RX done work */
-
-              work_cancel(HPWORK, &priv->lp_rxwork);
-
-              /* Schedule RX-related work to be performed on the work thread */
+              /* Schedule RX-related work to be performed on the work thread,
+               * perhaps cancelling any pending RX work.
+               */
 
-              work_queue(HPWORK, &priv->lp_rxwork, (worker_t)lpc17_rxdone_work,
+              work_queue(ETHWORK, &priv->lp_rxwork, (worker_t)lpc17_rxdone_work,
                          priv, 0);
-
-#else /* CONFIG_NET_NOINTS */
-              lpc17_rxdone_process(priv);
-
-#endif /* CONFIG_NET_NOINTS */
             }
 
           /* Check for Tx events ********************************************/
@@ -1281,7 +1238,7 @@ static int lpc17_interrupt(int irq, void *context)
 
           if ((status & ETH_INT_TXERR) != 0)
             {
-              nlldbg("TX Error. status: %08x\n", status);
+              nerr("ERROR: TX ERROR: status: %08x\n", status);
               NETDEV_TXERRORS(&priv->lp_dev);
             }
 
@@ -1318,33 +1275,18 @@ static int lpc17_interrupt(int irq, void *context)
               priv->lp_inten &= ~ETH_TXINTS;
               lpc17_putreg(priv->lp_inten, LPC17_ETH_INTEN);
 
-#ifdef CONFIG_NET_NOINTS
               /* Cancel any pending TX done work (to prevent overruns and also
                * to avoid race conditions with the TX timeout work)
                */
 
-              work_cancel(HPWORK, &priv->lp_txwork);
+              work_cancel(ETHWORK, &priv->lp_txwork);
 
-              /* Then make sure that the TX poll timer is running (if it is
-               * already running, the following would restart it).  This is
-               * necessary to avoid certain race conditions where the polling
-               * sequence can be interrupted.
+              /* Schedule TX-related work to be performed on the work thread,
+               * perhaps cancelling any pending TX work.
                */
 
-              (void)wd_start(priv->lp_txpoll, LPC17_WDDELAY, lpc17_poll_expiry,
-                             1, priv);
-
-              /* Schedule TX-related work to be performed on the work thread */
-
-              work_queue(HPWORK, &priv->lp_txwork, (worker_t)lpc17_txdone_work,
+              work_queue(ETHWORK, &priv->lp_txwork, (worker_t)lpc17_txdone_work,
                          priv, 0);
-
-#else /* CONFIG_NET_NOINTS */
-              /* Perform the TX work at the interrupt level */
-
-              lpc17_txdone_process(priv);
-
-#endif /* CONFIG_NET_NOINTS */
             }
         }
     }
@@ -1363,26 +1305,29 @@ static int lpc17_interrupt(int irq, void *context)
 }
 
 /****************************************************************************
- * Function: lpc17_txtimeout_process
+ * Function: lpc17_txtimeout_work
  *
  * Description:
- *   Process a TX timeout.  Called from the either the watchdog timer
- *   expiration logic or from the worker thread, depending upon the
- *   configuration.  The timeout means that the last TX never completed.
- *   Reset the hardware and start again.
+ *   Perform TX timeout related work from the worker thread
  *
  * Parameters:
- *   priv - Reference to the driver state structure
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
- *   None
+ *   OK on success
+ *
+ * Assumptions:
+ *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static void lpc17_txtimeout_process(FAR struct lpc17_driver_s *priv)
+static void lpc17_txtimeout_work(FAR void *arg)
 {
+  FAR struct lpc17_driver_s *priv = (FAR struct lpc17_driver_s *)arg;
+
   /* Increment statistics and dump debug info */
 
+  net_lock();
   NETDEV_TXTIMEOUTS(&priv->lp_dev);
   if (priv->lp_ifup)
     {
@@ -1396,38 +1341,9 @@ static void lpc17_txtimeout_process(FAR struct lpc17_driver_s *priv)
 
       (void)devif_poll(&priv->lp_dev, lpc17_txpoll);
     }
-}
 
-/****************************************************************************
- * Function: lpc17_txtimeout_work
- *
- * Description:
- *   Perform TX timeout related work from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() as called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void lpc17_txtimeout_work(FAR void *arg)
-{
-  FAR struct lpc17_driver_s *priv = (FAR struct lpc17_driver_s *)arg;
-  net_lock_t state;
-
-  /* Process pending Ethernet interrupts */
-
-  state = net_lock();
-  lpc17_txtimeout_process(priv);
-  net_unlock(state);
+  net_unlock();
 }
-#endif
 
 /****************************************************************************
  * Function: lpc17_txtimeout_expiry
@@ -1459,7 +1375,6 @@ static void lpc17_txtimeout_expiry(int argc, uint32_t arg, ...)
   priv->lp_inten &= ~ETH_TXINTS;
   lpc17_putreg(priv->lp_inten, LPC17_ETH_INTEN);
 
-#ifdef CONFIG_NET_NOINTS
   /* Is the single TX work structure available?  If not, then there is
    * pending TX work to be done this must be a false alarm TX timeout.
    */
@@ -1468,35 +1383,30 @@ static void lpc17_txtimeout_expiry(int argc, uint32_t arg, ...)
     {
       /* Schedule to perform the interrupt processing on the worker thread. */
 
-      work_queue(HPWORK, &priv->lp_txwork, lpc17_txtimeout_work, priv, 0);
+      work_queue(ETHWORK, &priv->lp_txwork, lpc17_txtimeout_work, priv, 0);
     }
-
-#else
-  /* Process the timeout now */
-
-  lpc17_txtimeout_process(priv);
-#endif
 }
 
 /****************************************************************************
- * Function: lpc17_poll_process
+ * Function: lpc17_poll_work
  *
  * Description:
- *   Perform the periodic poll.  This may be called either from watchdog
- *   timer logic or from the worker thread, depending upon the configuration.
+ *   Perform periodic polling from the worker thread
  *
  * Parameters:
- *   priv - Reference to the driver state structure
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
+ *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static void lpc17_poll_process(FAR struct lpc17_driver_s *priv)
+static void lpc17_poll_work(FAR void *arg)
 {
+  FAR struct lpc17_driver_s *priv = (FAR struct lpc17_driver_s *)arg;
   unsigned int prodidx;
   unsigned int considx;
 
@@ -1504,6 +1414,7 @@ static void lpc17_poll_process(FAR struct lpc17_driver_s *priv)
    * the TX poll if he are unable to accept another packet for transmission.
    */
 
+  net_lock();
   if (lpc17_txdesc(priv) == OK)
     {
       /* If so, update TCP timing states and poll the network layer for new
@@ -1525,54 +1436,17 @@ static void lpc17_poll_process(FAR struct lpc17_driver_s *priv)
 
   if (considx != prodidx)
     {
-#ifdef CONFIG_NET_NOINTS
-      work_queue(HPWORK, &priv->lp_rxwork, (worker_t)lpc17_rxdone_work,
+      work_queue(ETHWORK, &priv->lp_rxwork, (worker_t)lpc17_rxdone_work,
                  priv, 0);
-
-#else /* CONFIG_NET_NOINTS */
-      lpc17_rxdone_process(priv);
-
-#endif /* CONFIG_NET_NOINTS */
     }
 
   /* Setup the watchdog poll timer again */
 
   (void)wd_start(priv->lp_txpoll, LPC17_WDDELAY, lpc17_poll_expiry,
                 1, priv);
+  net_unlock();
 }
 
-/****************************************************************************
- * Function: lpc17_poll_work
- *
- * Description:
- *   Perform periodic polling from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() as called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void lpc17_poll_work(FAR void *arg)
-{
-  FAR struct lpc17_driver_s *priv = (FAR struct lpc17_driver_s *)arg;
-  net_lock_t state;
-
-  /* Perform the poll */
-
-  state = net_lock();
-  lpc17_poll_process(priv);
-  net_unlock(state);
-}
-#endif
-
-
 /****************************************************************************
  * Function: lpc17_poll_expiry
  *
@@ -1597,31 +1471,9 @@ static void lpc17_poll_expiry(int argc, uint32_t arg, ...)
 
   DEBUGASSERT(arg);
 
-#ifdef CONFIG_NET_NOINTS
-  /* Is our single work structure available?  It may not be if there are
-   * pending interrupt actions.
-   */
-
-  if (work_available(&priv->lp_pollwork))
-    {
-      /* Schedule to perform the interrupt processing on the worker thread. */
-
-      work_queue(HPWORK, &priv->lp_pollwork, lpc17_poll_work, priv, 0);
-    }
-  else
-    {
-      /* No.. Just re-start the watchdog poll timer, missing one polling
-       * cycle.
-       */
-
-      (void)wd_start(priv->lp_txpoll, LPC17_WDDELAY, lpc17_poll_expiry, 1, arg);
-    }
+  /* Schedule to perform the interrupt processing on the worker thread. */
 
-#else
-  /* Process the interrupt now */
-
-  lpc17_poll_process(priv);
-#endif
+  work_queue(ETHWORK, &priv->lp_pollwork, lpc17_poll_work, priv, 0);
 }
 
 /****************************************************************************
@@ -1671,7 +1523,7 @@ static void lpc17_ipv6multicast(FAR struct lpc17_driver_s *priv)
   mac[4] = tmp16 & 0xff;
   mac[5] = tmp16 >> 8;
 
-  nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+  ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
         mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   (void)lpc17_addmac(dev, mac);
@@ -1720,9 +1572,9 @@ static int lpc17_ifup(struct net_driver_s *dev)
   uint32_t regval;
   int ret;
 
-  ndbg("Bringing up: %d.%d.%d.%d\n",
-       dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-       (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 
   /* Reset the Ethernet controller (again) */
 
@@ -1733,7 +1585,7 @@ static int lpc17_ifup(struct net_driver_s *dev)
   ret = lpc17_phyinit(priv);
   if (ret != 0)
     {
-      ndbg("lpc17_phyinit failed: %d\n", ret);
+      nerr("ERROR: lpc17_phyinit failed: %d\n", ret);
       return ret;
     }
 
@@ -1913,29 +1765,29 @@ static int lpc17_ifdown(struct net_driver_s *dev)
 }
 
 /****************************************************************************
- * Function: lpc17_txavail_process
+ * Function: lpc17_txavail_work
  *
  * Description:
- *   Perform an out-of-cycle poll.
+ *   Perform an out-of-cycle poll on the worker thread.
  *
  * Parameters:
- *   dev - Reference to the NuttX driver state structure
+ *   arg - Reference to the NuttX driver state structure (cast to void*)
  *
  * Returned Value:
  *   None
  *
  * Assumptions:
- *   Called in normal user mode
+ *   Called on the higher priority worker thread.
  *
  ****************************************************************************/
 
-static inline void lpc17_txavail_process(FAR struct lpc17_driver_s *priv)
+static void lpc17_txavail_work(FAR void *arg)
 {
-  net_lock_t state;
+  FAR struct lpc17_driver_s *priv = (FAR struct lpc17_driver_s *)arg;
 
   /* Ignore the notification if the interface is not yet up */
 
-  state = net_lock();
+  net_lock();
   if (priv->lp_ifup)
     {
       /* Check if there is room in the hardware to hold another outgoing packet. */
@@ -1948,37 +1800,9 @@ static inline void lpc17_txavail_process(FAR struct lpc17_driver_s *priv)
         }
     }
 
-  net_unlock(state);
+  net_unlock();
 }
 
-/****************************************************************************
- * Function: lpc17_txavail_work
- *
- * Description:
- *   Perform an out-of-cycle poll on the worker thread.
- *
- * Parameters:
- *   arg - Reference to the NuttX driver state structure (cast to void*)
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Called on the higher priority worker thread.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void lpc17_txavail_work(FAR void *arg)
-{
-  FAR struct lpc17_driver_s *priv = (FAR struct lpc17_driver_s *)arg;
-
-  /* Perform the poll */
-
-  lpc17_txavail_process(priv);
-}
-#endif
-
 /****************************************************************************
  * Function: lpc17_txavail
  *
@@ -2002,7 +1826,6 @@ static int lpc17_txavail(struct net_driver_s *dev)
 {
   FAR struct lpc17_driver_s *priv = (FAR struct lpc17_driver_s *)dev->d_private;
 
-#ifdef CONFIG_NET_NOINTS
   /* Is our single poll work structure available?  It may not be if there
    * are pending polling actions and we will have to ignore the Tx
    * availability action (which is okay because all poll actions have,
@@ -2013,16 +1836,9 @@ static int lpc17_txavail(struct net_driver_s *dev)
     {
       /* Schedule to serialize the poll on the worker thread. */
 
-      work_queue(HPWORK, &priv->lp_pollwork, lpc17_txavail_work, priv, 0);
+      work_queue(ETHWORK, &priv->lp_pollwork, lpc17_txavail_work, priv, 0);
     }
 
-#else
-
-  /* Perform the out-of-cycle poll now */
-
-  lpc17_txavail_process(priv);
-#endif
-
   return OK;
 }
 
@@ -2145,8 +1961,8 @@ static int lpc17_addmac(struct net_driver_s *dev, const uint8_t *mac)
   uint32_t crc;
   unsigned int ndx;
 
-  nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Hash function:
    *
@@ -2221,8 +2037,8 @@ static int lpc17_rmmac(struct net_driver_s *dev, const uint8_t *mac)
   uint32_t crc;
   unsigned int ndx;
 
-  nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Hash function:
    *
@@ -2292,7 +2108,7 @@ static int lpc17_rmmac(struct net_driver_s *dev, const uint8_t *mac)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_NET_REGDEBUG) && defined(CONFIG_DEBUG_GPIO)
+#if defined(CONFIG_LPC17_NET_REGDEBUG) && defined(CONFIG_DEBUG_GPIO_INFO)
 static void lpc17_showpins(void)
 {
   lpc17_dumpgpio(GPIO_PORT1 | GPIO_PIN0, "P1[1-15]");
@@ -2316,17 +2132,17 @@ static void lpc17_showpins(void)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_NET_REGDEBUG) && defined(LPC17_HAVE_PHY)
+#if defined(CONFIG_LPC17_NET_REGDEBUG) && defined(LPC17_HAVE_PHY)
 static void lpc17_showmii(uint8_t phyaddr, const char *msg)
 {
-  dbg("PHY " LPC17_PHYNAME ": %s\n", msg);
-  dbg("  MCR:       %04x\n", lpc17_phyread(phyaddr, MII_MCR));
-  dbg("  MSR:       %04x\n", lpc17_phyread(phyaddr, MII_MSR));
-  dbg("  ADVERTISE: %04x\n", lpc17_phyread(phyaddr, MII_ADVERTISE));
-  dbg("  LPA:       %04x\n", lpc17_phyread(phyaddr, MII_LPA));
-  dbg("  EXPANSION: %04x\n", lpc17_phyread(phyaddr, MII_EXPANSION));
+  ninfo("PHY " LPC17_PHYNAME ": %s\n", msg);
+  ninfo("  MCR:       %04x\n", lpc17_phyread(phyaddr, MII_MCR));
+  ninfo("  MSR:       %04x\n", lpc17_phyread(phyaddr, MII_MSR));
+  ninfo("  ADVERTISE: %04x\n", lpc17_phyread(phyaddr, MII_ADVERTISE));
+  ninfo("  LPA:       %04x\n", lpc17_phyread(phyaddr, MII_LPA));
+  ninfo("  EXPANSION: %04x\n", lpc17_phyread(phyaddr, MII_EXPANSION));
 #ifdef CONFIG_ETH0_PHY_KS8721
-  dbg("  10BTCR:    %04x\n", lpc17_phyread(phyaddr, MII_KS8721_10BTCR));
+  ninfo("  10BTCR:    %04x\n", lpc17_phyread(phyaddr, MII_KS8721_10BTCR));
 #endif
 }
 #endif
@@ -2462,7 +2278,7 @@ static inline int lpc17_phyreset(uint8_t phyaddr)
         }
     }
 
-  ndbg("Reset failed. MCR: %04x\n", phyreg);
+  nerr("ERROR: Reset failed. MCR: %04x\n", phyreg);
   return -ETIMEDOUT;
 }
 #endif
@@ -2509,7 +2325,7 @@ static inline int lpc17_phyautoneg(uint8_t phyaddr)
         }
     }
 
-  ndbg("Auto-negotiation failed. MSR: %04x\n", phyreg);
+  nerr("ERROR: Auto-negotiation failed. MSR: %04x\n", phyreg);
   return -ETIMEDOUT;
 }
 #endif
@@ -2593,7 +2409,7 @@ static int lpc17_phymode(uint8_t phyaddr, uint8_t mode)
 #endif
     }
 
-  ndbg("Link failed. MSR: %04x\n", phyreg);
+  nerr("ERROR: Link failed. MSR: %04x\n", phyreg);
   return -ETIMEDOUT;
 }
 #endif
@@ -2647,20 +2463,20 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
        */
 
       phyreg = (unsigned int)lpc17_phyread(phyaddr, MII_PHYID1);
-      nvdbg("Addr: %d PHY ID1: %04x\n", phyaddr, phyreg);
+      ninfo("Addr: %d PHY ID1: %04x\n", phyaddr, phyreg);
 
       /* Compare OUI bits 3-18 */
 
       if (phyreg == LPC17_PHYID1)
         {
           phyreg = lpc17_phyread(phyaddr, MII_PHYID2);
-          nvdbg("Addr: %d PHY ID2: %04x\n", phyaddr, phyreg);
+          ninfo("Addr: %d PHY ID2: %04x\n", phyaddr, phyreg);
 
           /* Compare OUI bits 19-24 and the 6-bit model number (ignoring the
            * 4-bit revision number).
            */
 
-          if ((phyreg & 0xfff0) == LPC17_PHYID2)
+          if ((phyreg & 0xfff0) == (LPC17_PHYID2 & 0xfff0))
             {
               break;
             }
@@ -2673,10 +2489,10 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
     {
       /* Failed to find PHY at any location */
 
-      ndbg("No PHY detected\n");
+      nerr("ERROR: No PHY detected\n");
       return -ENODEV;
     }
-  nvdbg("phyaddr: %d\n", phyaddr);
+  ninfo("phyaddr: %d\n", phyaddr);
 
   /* Save the discovered PHY device address */
 
@@ -2760,7 +2576,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
         break;
 
       default:
-        ndbg("Unrecognized mode: %04x\n", phyreg);
+        nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
         return -ENODEV;
     }
 
@@ -2788,7 +2604,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
         break;
 
       default:
-        ndbg("Unrecognized mode: %04x\n", phyreg);
+        nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
         return -ENODEV;
     }
 
@@ -2816,7 +2632,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
         break;
 
       default:
-        ndbg("Unrecognized mode: %04x\n", phyreg);
+        nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
         return -ENODEV;
     }
 
@@ -2862,7 +2678,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
       }
     else
       {
-        ndbg("Unrecognized mode: %04x\n", phyreg);
+        nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
         return -ENODEV;
       }
   }
@@ -2871,9 +2687,9 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
 #  warning "PHY Unknown: speed and duplex are bogus"
 #endif
 
-  ndbg("%dBase-T %s duplex\n",
-       (priv->lp_mode & LPC17_SPEED_MASK) ==  LPC17_SPEED_100 ? 100 : 10,
-       (priv->lp_mode & LPC17_DUPLEX_MASK) == LPC17_DUPLEX_FULL ?"full" : "half");
+  ninfo("%dBase-T %s duplex\n",
+        (priv->lp_mode & LPC17_SPEED_MASK) ==  LPC17_SPEED_100 ? 100 : 10,
+        (priv->lp_mode & LPC17_DUPLEX_MASK) == LPC17_DUPLEX_FULL ?"full" : "half");
 
   /* Disable auto-configuration.  Set the fixed speed/duplex mode.
    * (probably more than little redundant).
@@ -3194,6 +3010,7 @@ static inline int lpc17_ethinitialize(int intf)
 #endif
 {
   struct lpc17_driver_s *priv;
+  uint8_t *pktbuf;
   uint32_t regval;
   int ret;
   int i;
@@ -3213,11 +3030,17 @@ static inline int lpc17_ethinitialize(int intf)
     {
       (void)lpc17_configgpio(g_enetpins[i]);
     }
+
   lpc17_showpins();
 
+  /* Select the packet buffer */
+
+  pktbuf = &g_pktbuf[PKTBUF_SIZE * intf];
+
   /* Initialize the driver structure */
 
   memset(priv, 0, sizeof(struct lpc17_driver_s));
+  priv->lp_dev.d_buf     = pktbuf;        /* Single packet buffer */
   priv->lp_dev.d_ifup    = lpc17_ifup;    /* I/F down callback */
   priv->lp_dev.d_ifdown  = lpc17_ifdown;  /* I/F up (new IP address) callback */
   priv->lp_dev.d_txavail = lpc17_txavail; /* New TX data callback */
@@ -3225,7 +3048,7 @@ static inline int lpc17_ethinitialize(int intf)
   priv->lp_dev.d_addmac  = lpc17_addmac;  /* Add multicast MAC address */
   priv->lp_dev.d_rmmac   = lpc17_rmmac;   /* Remove multicast MAC address */
 #endif
-  priv->lp_dev.d_private = (void *)priv;   /* Used to recover private state from dev */
+  priv->lp_dev.d_private = (void *)priv;  /* Used to recover private state from dev */
 
 #if CONFIG_LPC17_NINTERFACES > 1
 # error "A mechanism to associate base address an IRQ with an interface is needed"
@@ -3248,9 +3071,9 @@ static inline int lpc17_ethinitialize(int intf)
   /* Attach the IRQ to the driver */
 
 #if CONFIG_LPC17_NINTERFACES > 1
-  ret = irq_attach(priv->irq, lpc17_interrupt);
+  ret = irq_attach(priv->irq, lpc17_interrupt, NULL);
 #else
-  ret = irq_attach(LPC17_IRQ_ETH, lpc17_interrupt);
+  ret = irq_attach(LPC17_IRQ_ETH, lpc17_interrupt, NULL);
 #endif
   if (ret != 0)
     {
diff --git a/arch/arm/src/lpc17xx/lpc17_gpdma.c b/arch/arm/src/lpc17xx/lpc17_gpdma.c
index 4a93267718d60943963442a9b5722f2aad35327b..8fba6cbaad4f2fa3b82e40639387683e7d553ca7 100644
--- a/arch/arm/src/lpc17xx/lpc17_gpdma.c
+++ b/arch/arm/src/lpc17xx/lpc17_gpdma.c
@@ -190,7 +190,7 @@ static void lpc17_dmadone(struct lpc17_dmach_s *dmach)
  *
  ****************************************************************************/
 
-static int gpdma_interrupt(int irq, FAR void *context)
+static int gpdma_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   struct lpc17_dmach_s *dmach;
   uint32_t regval;
@@ -315,7 +315,7 @@ void weak_function up_dmainitialize(void)
 
   /* Attach and enable the common interrupt handler */
 
-  ret = irq_attach(LPC17_IRQ_GPDMA, gpdma_interrupt);
+  ret = irq_attach(LPC17_IRQ_GPDMA, gpdma_interrupt, NULL);
   if (ret == OK)
     {
       up_enable_irq(LPC17_IRQ_GPDMA);
@@ -654,7 +654,7 @@ void lpc17_dmastop(DMA_HANDLE handle)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG__DEBUG_DMA_INFO
 void lpc17_dmasample(DMA_HANDLE handle, struct lpc17_dmaregs_s *regs)
 {
   struct lpc17_dmach_s *dmach = (DMA_HANDLE)handle;
@@ -686,7 +686,7 @@ void lpc17_dmasample(DMA_HANDLE handle, struct lpc17_dmaregs_s *regs)
   regs->ch.control      = getreg32(base + LPC17_DMACH_CONTROL_OFFSET);
   regs->ch.config       = getreg32(base + LPC17_DMACH_CONFIG_OFFSET);
 }
-#endif /* CONFIG_DEBUG_DMA */
+#endif /* CONFIG__DEBUG_DMA_INFO */
 
 /****************************************************************************
  * Name: lpc17_dmadump
@@ -696,7 +696,7 @@ void lpc17_dmasample(DMA_HANDLE handle, struct lpc17_dmaregs_s *regs)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG__DEBUG_DMA_INFO
 void lpc17_dmadump(DMA_HANDLE handle, const struct lpc17_dmaregs_s *regs,
                    const char *msg)
 {
@@ -707,49 +707,49 @@ void lpc17_dmadump(DMA_HANDLE handle, const struct lpc17_dmaregs_s *regs,
 
   /* Dump the sampled global DMA registers */
 
-  dmadbg("Global GPDMA Registers: %s\n", msg);
-  dmadbg("       INTST[%08x]: %08x\n",
-         LPC17_DMA_INTST, regs->gbl.intst);
-  dmadbg("     INTTCST[%08x]: %08x\n",
-         LPC17_DMA_INTTCST, regs->gbl.inttcst);
-  dmadbg("    INTERRST[%08x]: %08x\n",
-         LPC17_DMA_INTERRST, regs->gbl.interrst);
-  dmadbg("  RAWINTTCST[%08x]: %08x\n",
-         LPC17_DMA_RAWINTTCST, regs->gbl.rawinttcst);
-  dmadbg(" RAWINTERRST[%08x]: %08x\n",
-         LPC17_DMA_RAWINTERRST, regs->gbl.rawinterrst);
-  dmadbg("   ENBLDCHNS[%08x]: %08x\n",
-         LPC17_DMA_ENBLDCHNS, regs->gbl.enbldchns);
-  dmadbg("    SOFTBREQ[%08x]: %08x\n",
-         LPC17_DMA_SOFTBREQ, regs->gbl.softbreq);
-  dmadbg("    SOFTSREQ[%08x]: %08x\n",
-         LPC17_DMA_SOFTSREQ, regs->gbl.softsreq);
-  dmadbg("   SOFTLBREQ[%08x]: %08x\n",
-         LPC17_DMA_SOFTLBREQ, regs->gbl.softlbreq);
-  dmadbg("   SOFTLSREQ[%08x]: %08x\n",
-         LPC17_DMA_SOFTLSREQ, regs->gbl.softlsreq);
-  dmadbg("      CONFIG[%08x]: %08x\n",
-         LPC17_DMA_CONFIG, regs->gbl.config);
-  dmadbg("        SYNC[%08x]: %08x\n",
-         LPC17_DMA_SYNC, regs->gbl.sync);
+  dmainfo("Global GPDMA Registers: %s\n", msg);
+  dmainfo("       INTST[%08x]: %08x\n",
+          LPC17_DMA_INTST, regs->gbl.intst);
+  dmainfo("     INTTCST[%08x]: %08x\n",
+          LPC17_DMA_INTTCST, regs->gbl.inttcst);
+  dmainfo("    INTERRST[%08x]: %08x\n",
+          LPC17_DMA_INTERRST, regs->gbl.interrst);
+  dmainfo("  RAWINTTCST[%08x]: %08x\n",
+          LPC17_DMA_RAWINTTCST, regs->gbl.rawinttcst);
+  dmainfo(" RAWINTERRST[%08x]: %08x\n",
+          LPC17_DMA_RAWINTERRST, regs->gbl.rawinterrst);
+  dmainfo("   ENBLDCHNS[%08x]: %08x\n",
+          LPC17_DMA_ENBLDCHNS, regs->gbl.enbldchns);
+  dmainfo("    SOFTBREQ[%08x]: %08x\n",
+          LPC17_DMA_SOFTBREQ, regs->gbl.softbreq);
+  dmainfo("    SOFTSREQ[%08x]: %08x\n",
+          LPC17_DMA_SOFTSREQ, regs->gbl.softsreq);
+  dmainfo("   SOFTLBREQ[%08x]: %08x\n",
+          LPC17_DMA_SOFTLBREQ, regs->gbl.softlbreq);
+  dmainfo("   SOFTLSREQ[%08x]: %08x\n",
+          LPC17_DMA_SOFTLSREQ, regs->gbl.softlsreq);
+  dmainfo("      CONFIG[%08x]: %08x\n",
+          LPC17_DMA_CONFIG, regs->gbl.config);
+  dmainfo("        SYNC[%08x]: %08x\n",
+          LPC17_DMA_SYNC, regs->gbl.sync);
 
   /* Dump the DMA channel registers */
 
   base = LPC17_DMACH_BASE((uint32_t)dmach->chn);
 
-  dmadbg("Channel GPDMA Registers: %d\n", dmach->chn);
-
-  dmadbg("     SRCADDR[%08x]: %08x\n",
-         base + LPC17_DMACH_SRCADDR_OFFSET, regs->ch.srcaddr);
-  dmadbg("    DESTADDR[%08x]: %08x\n",
-         base + LPC17_DMACH_DESTADDR_OFFSET, regs->ch.destaddr);
-  dmadbg("         LLI[%08x]: %08x\n",
-         base + LPC17_DMACH_LLI_OFFSET, regs->ch.lli);
-  dmadbg("     CONTROL[%08x]: %08x\n",
-         base + LPC17_DMACH_CONTROL_OFFSET, regs->ch.control);
-  dmadbg("      CONFIG[%08x]: %08x\n",
-         base + LPC17_DMACH_CONFIG_OFFSET, regs->ch.config);
+  dmainfo("Channel GPDMA Registers: %d\n", dmach->chn);
+
+  dmainfo("     SRCADDR[%08x]: %08x\n",
+          base + LPC17_DMACH_SRCADDR_OFFSET, regs->ch.srcaddr);
+  dmainfo("    DESTADDR[%08x]: %08x\n",
+          base + LPC17_DMACH_DESTADDR_OFFSET, regs->ch.destaddr);
+  dmainfo("         LLI[%08x]: %08x\n",
+          base + LPC17_DMACH_LLI_OFFSET, regs->ch.lli);
+  dmainfo("     CONTROL[%08x]: %08x\n",
+          base + LPC17_DMACH_CONTROL_OFFSET, regs->ch.control);
+  dmainfo("      CONFIG[%08x]: %08x\n",
+          base + LPC17_DMACH_CONFIG_OFFSET, regs->ch.config);
 }
-#endif /* CONFIG_DEBUG_DMA */
+#endif /* CONFIG__DEBUG_DMA_INFO */
 
 #endif /* CONFIG_LPC17_GPDMA */
diff --git a/arch/arm/src/lpc17xx/lpc17_gpdma.h b/arch/arm/src/lpc17xx/lpc17_gpdma.h
index 4e1e499eb1c5e220e6083f40fe011e703c840ab1..a7c0d7009ccbdef0d522665bd9540cf6e3f25091 100644
--- a/arch/arm/src/lpc17xx/lpc17_gpdma.h
+++ b/arch/arm/src/lpc17xx/lpc17_gpdma.h
@@ -68,7 +68,7 @@ typedef void (*dma_callback_t)(DMA_HANDLE handle, void *arg, int result);
 
 /* The following is used for sampling DMA registers when CONFIG DEBUG_DMA is selected */
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG__DEBUG_DMA_INFO
 struct lpc17_dmaglobalregs_s
 {
   /* Global Registers */
@@ -109,7 +109,7 @@ struct lpc17_dmaregs_s
   struct lpc17_dmachanregs_s   ch;
 };
 
-#endif /* CONFIG_DEBUG_DMA */
+#endif /* CONFIG__DEBUG_DMA_INFO */
 
 /****************************************************************************
  * Public Data
@@ -239,7 +239,7 @@ void lpc17_dmastop(DMA_HANDLE handle);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG__DEBUG_DMA_INFO
 void lpc17_dmasample(DMA_HANDLE handle, struct lpc17_dmaregs_s *regs);
 #else
 #  define lpc17_dmasample(handle,regs)
@@ -253,7 +253,7 @@ void lpc17_dmasample(DMA_HANDLE handle, struct lpc17_dmaregs_s *regs);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG__DEBUG_DMA_INFO
 void lpc17_dmadump(DMA_HANDLE handle, const struct lpc17_dmaregs_s *regs,
                    const char *msg);
 #else
diff --git a/arch/arm/src/lpc17xx/lpc17_gpio.h b/arch/arm/src/lpc17xx/lpc17_gpio.h
index e8ec13378992886ae53292bf0862d14e27274d23..6aab5b9f84c114afd50c6fef04b83aa69419e475 100644
--- a/arch/arm/src/lpc17xx/lpc17_gpio.h
+++ b/arch/arm/src/lpc17xx/lpc17_gpio.h
@@ -89,7 +89,7 @@ extern "C"
  * lpc17_gpioint.c, and lpc17_gpiodbg.c
  */
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
 EXTERN uint64_t g_intedge0;
 EXTERN uint64_t g_intedge2;
 #endif
@@ -109,7 +109,7 @@ EXTERN const uint32_t g_intbase[GPIO_NPORTS];
  *
  ************************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
 void lpc17_gpioirqinitialize(void);
 #else
 #  define lpc17_gpioirqinitialize()
@@ -153,7 +153,7 @@ bool lpc17_gpioread(lpc17_pinset_t pinset);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
 void lpc17_gpioirqenable(int irq);
 #else
 #  define lpc17_gpioirqenable(irq)
@@ -167,7 +167,7 @@ void lpc17_gpioirqenable(int irq);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
 void lpc17_gpioirqdisable(int irq);
 #else
 #  define lpc17_gpioirqdisable(irq)
@@ -181,7 +181,7 @@ void lpc17_gpioirqdisable(int irq);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 int lpc17_dumpgpio(lpc17_pinset_t pinset, const char *msg);
 #else
 #  define lpc17_dumpgpio(p,m)
diff --git a/arch/arm/src/lpc17xx/lpc17_gpiodbg.c b/arch/arm/src/lpc17xx/lpc17_gpiodbg.c
index fc6ce33162bee1d163bfc36700c33bd38b848b74..00d0f8fade2c8fc1ad70203fcadbe6ad9754944f 100644
--- a/arch/arm/src/lpc17xx/lpc17_gpiodbg.c
+++ b/arch/arm/src/lpc17xx/lpc17_gpiodbg.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/lpc17xx/lpc17_gpiodbg.c
  *
- *   Copyright (C) 2010-2011, 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010-2011, 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,6 +39,11 @@
 
 #include 
 
+/* Output debug info even if debug output is not selected. */
+
+#undef  CONFIG_DEBUG_INFO
+#define CONFIG_DEBUG_INFO 1
+
 #include 
 #include 
 #include 
@@ -49,23 +54,7 @@
 #include "chip.h"
 #include "lpc17_gpio.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_GPIO
-#endif
-
-#ifdef CONFIG_DEBUG_GPIO
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
+#ifdef CONFIG_DEBUG_GPIO_INFO
 
 /****************************************************************************
  * Private Functions
@@ -157,34 +146,36 @@ int lpc17_dumpgpio(lpc17_pinset_t pinset, const char *msg)
   /* The following requires exclusive access to the GPIO registers */
 
   flags = enter_critical_section();
-  lldbg("GPIO%c pin%d (pinset: %08x) -- %s\n",
-        port + '0', pin, pinset, msg);
+
+  gpioinfo("GPIO%c pin%d (pinset: %08x) -- %s\n",
+           port + '0', pin, pinset, msg);
 
 #if defined(LPC176x)
-  lldbg("  PINSEL[%08x]: %08x PINMODE[%08x]: %08x ODMODE[%08x]: %08x\n",
-        pinsel,  pinsel  ? getreg32(pinsel) : 0,
-        pinmode, pinmode ? getreg32(pinmode) : 0,
-        g_odmode[port],    getreg32(g_odmode[port]));
+  gpioinfo("  PINSEL[%08x]: %08x PINMODE[%08x]: %08x ODMODE[%08x]: %08x\n",
+           pinsel,  pinsel  ? getreg32(pinsel) : 0,
+           pinmode, pinmode ? getreg32(pinmode) : 0,
+           g_odmode[port],    getreg32(g_odmode[port]));
 #elif defined(LPC178x)
-  lldbg("  IOCON[%08x]: %08x\n", iocon, getreg32(iocon));
+  gpioinfo("  IOCON[%08x]: %08x\n", iocon, getreg32(iocon));
 #endif
 
   base = g_fiobase[port];
-  lldbg("  FIODIR[%08x]: %08x FIOMASK[%08x]: %08x FIOPIN[%08x]: %08x\n",
-        base+LPC17_FIO_DIR_OFFSET,  getreg32(base+LPC17_FIO_DIR_OFFSET),
-        base+LPC17_FIO_MASK_OFFSET, getreg32(base+LPC17_FIO_MASK_OFFSET),
-        base+LPC17_FIO_PIN_OFFSET,  getreg32(base+LPC17_FIO_PIN_OFFSET));
+  gpioinfo("  FIODIR[%08x]: %08x FIOMASK[%08x]: %08x FIOPIN[%08x]: %08x\n",
+           base+LPC17_FIO_DIR_OFFSET,  getreg32(base+LPC17_FIO_DIR_OFFSET),
+           base+LPC17_FIO_MASK_OFFSET, getreg32(base+LPC17_FIO_MASK_OFFSET),
+           base+LPC17_FIO_PIN_OFFSET,  getreg32(base+LPC17_FIO_PIN_OFFSET));
 
   base = g_intbase[port];
-  lldbg("  IOINTSTATUS[%08x]: %08x INTSTATR[%08x]: %08x INSTATF[%08x]: %08x\n",
-        LPC17_GPIOINT_IOINTSTATUS,          getreg32(LPC17_GPIOINT_IOINTSTATUS),
-        base+LPC17_GPIOINT_INTSTATR_OFFSET, getreg32(base+LPC17_GPIOINT_INTSTATR_OFFSET),
-        base+LPC17_GPIOINT_INTSTATF_OFFSET, getreg32(base+LPC17_GPIOINT_INTSTATF_OFFSET));
-  lldbg("  INTENR[%08x]: %08x INTENF[%08x]: %08x\n",
-        base+LPC17_GPIOINT_INTENR_OFFSET,   getreg32(base+LPC17_GPIOINT_INTENR_OFFSET),
-        base+LPC17_GPIOINT_INTENF_OFFSET,   getreg32(base+LPC17_GPIOINT_INTENF_OFFSET));
+  gpioinfo("  IOINTSTATUS[%08x]: %08x INTSTATR[%08x]: %08x INSTATF[%08x]: %08x\n",
+           LPC17_GPIOINT_IOINTSTATUS,          getreg32(LPC17_GPIOINT_IOINTSTATUS),
+           base+LPC17_GPIOINT_INTSTATR_OFFSET, getreg32(base+LPC17_GPIOINT_INTSTATR_OFFSET),
+           base+LPC17_GPIOINT_INTSTATF_OFFSET, getreg32(base+LPC17_GPIOINT_INTSTATF_OFFSET));
+  gpioinfo("  INTENR[%08x]: %08x INTENF[%08x]: %08x\n",
+           base+LPC17_GPIOINT_INTENR_OFFSET,   getreg32(base+LPC17_GPIOINT_INTENR_OFFSET),
+           base+LPC17_GPIOINT_INTENF_OFFSET,   getreg32(base+LPC17_GPIOINT_INTENF_OFFSET));
+
   leave_critical_section(flags);
   return OK;
 }
-#endif /* CONFIG_DEBUG_GPIO */
+#endif /* CONFIG_DEBUG_GPIO_INFO */
 
diff --git a/arch/arm/src/lpc17xx/lpc17_gpioint.c b/arch/arm/src/lpc17xx/lpc17_gpioint.c
index 46acb05e6fa41ed16932e1b230f216fa449f0d0c..fded5b5b51c88d2dd96b758a966645ae3befff01 100644
--- a/arch/arm/src/lpc17xx/lpc17_gpioint.c
+++ b/arch/arm/src/lpc17xx/lpc17_gpioint.c
@@ -51,7 +51,7 @@
 #include "chip.h"
 #include "lpc17_gpio.h"
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -402,7 +402,7 @@ static void lpc17_gpiodemux(uint32_t intbase, uint32_t intmask,
  *
  ****************************************************************************/
 
-static int lpc17_gpiointerrupt(int irq, void *context)
+static int lpc17_gpiointerrupt(int irq, void *context, FAR void *arg)
 {
   /* Get the GPIO interrupt status */
 
@@ -468,7 +468,7 @@ void lpc17_gpioirqinitialize(void)
    * position in the NVIC with External Interrupt 3
    */
 
-  (void)irq_attach(LPC17_IRQ_EINT3, lpc17_gpiointerrupt);
+  (void)irq_attach(LPC17_IRQ_EINT3, lpc17_gpiointerrupt, NULL);
   up_enable_irq(LPC17_IRQ_EINT3);
 
 #elif defined(LPC178x)
@@ -476,7 +476,7 @@ void lpc17_gpioirqinitialize(void)
    * GPIO2.
    */
 
-  (void)irq_attach(LPC17_IRQ_GPIO, lpc17_gpiointerrupt);
+  (void)irq_attach(LPC17_IRQ_GPIO, lpc17_gpiointerrupt, NULL);
   up_enable_irq(LPC17_IRQ_GPIO);
 
 #endif
@@ -543,4 +543,4 @@ void lpc17_gpioirqdisable(int irq)
     }
 }
 
-#endif /* CONFIG_GPIO_IRQ */
+#endif /* CONFIG_LPC17_GPIOIRQ */
diff --git a/arch/arm/src/lpc17xx/lpc17_i2c.c b/arch/arm/src/lpc17xx/lpc17_i2c.c
index 9b106fdda4e813e2c237fdb1f4f491befa1fc228..30763fe177ac27c2fdfd1af72807fbb0c4b8978b 100644
--- a/arch/arm/src/lpc17xx/lpc17_i2c.c
+++ b/arch/arm/src/lpc17xx/lpc17_i2c.c
@@ -59,6 +59,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -128,7 +129,7 @@ struct lpc17_i2cdev_s
 
 static int  lpc17_i2c_start(struct lpc17_i2cdev_s *priv);
 static void lpc17_i2c_stop(struct lpc17_i2cdev_s *priv);
-static int  lpc17_i2c_interrupt(int irq, FAR void *context);
+static int  lpc17_i2c_interrupt(int irq, FAR void *context, void *arg);
 static void lpc17_i2c_timeout(int argc, uint32_t arg, ...);
 static void lpc17_i2c_setfrequency(struct lpc17_i2cdev_s *priv,
               uint32_t frequency);
@@ -303,7 +304,7 @@ static int lpc17_i2c_transfer(FAR struct i2c_master_s *dev,
 }
 
 /****************************************************************************
- * Name: lpc17_i2c_interrupt
+ * Name: lpc17_stopnext
  *
  * Description:
  *   Check if we need to issue STOP at the next message
@@ -333,36 +334,13 @@ static void lpc17_stopnext(struct lpc17_i2cdev_s *priv)
  *
  ****************************************************************************/
 
-static int lpc17_i2c_interrupt(int irq, FAR void *context)
+static int lpc17_i2c_interrupt(int irq, FAR void *context, void *arg)
 {
-  struct lpc17_i2cdev_s *priv;
+  struct lpc17_i2cdev_s *priv = (struct lpc17_i2cdev_s *)arg;
   struct i2c_msg_s *msg;
   uint32_t state;
 
-#ifdef CONFIG_LPC17_I2C0
-  if (irq == LPC17_IRQ_I2C0)
-    {
-      priv = &g_i2c0dev;
-    }
-  else
-#endif
-#ifdef CONFIG_LPC17_I2C1
-  if (irq == LPC17_IRQ_I2C1)
-    {
-      priv = &g_i2c1dev;
-    }
-  else
-#endif
-#ifdef CONFIG_LPC17_I2C2
-  if (irq == LPC17_IRQ_I2C2)
-    {
-      priv = &g_i2c2dev;
-    }
-  else
-#endif
-    {
-      PANIC();
-    }
+  DEBUGASSERT(priv != NULL);
 
   /* Reference UM10360 19.10.5 */
 
@@ -485,7 +463,7 @@ struct i2c_master_s *lpc17_i2cbus_initialize(int port)
 
   if (port > 1)
     {
-      dbg("lpc I2C Only support 0,1\n");
+      i2cerr("ERROR: LPC I2C Only supports ports 0 and 1\n");
       return NULL;
     }
 
@@ -589,9 +567,17 @@ struct i2c_master_s *lpc17_i2cbus_initialize(int port)
 
   putreg32(I2C_CONSET_I2EN, priv->base + LPC17_I2C_CONSET_OFFSET);
 
+  /* Initialize semaphores */
+
   sem_init(&priv->mutex, 0, 1);
   sem_init(&priv->wait, 0, 0);
 
+  /* The wait semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->wait, SEM_PRIO_NONE);
+
   /* Allocate a watchdog timer */
 
   priv->timeout = wd_create();
@@ -599,7 +585,7 @@ struct i2c_master_s *lpc17_i2cbus_initialize(int port)
 
   /* Attach Interrupt Handler */
 
-  irq_attach(priv->irqid, lpc17_i2c_interrupt);
+  irq_attach(priv->irqid, lpc17_i2c_interrupt, priv);
 
   /* Enable Interrupt Handler */
 
diff --git a/arch/arm/src/lpc17xx/lpc17_irq.c b/arch/arm/src/lpc17xx/lpc17_irq.c
index d1f72be399a9bdd1a7c93424e19fe7e50eca7ed1..01475fe57224ce9c5dde67f04d241cc7efe01f31 100644
--- a/arch/arm/src/lpc17xx/lpc17_irq.c
+++ b/arch/arm/src/lpc17xx/lpc17_irq.c
@@ -102,33 +102,35 @@ extern uint32_t _vectors[];
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_IRQ)
+#if defined(CONFIG_DEBUG_IRQ_INFO)
 static void lpc17_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = enter_critical_section();
-  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  lldbg("  INTCTRL:    %08x VECTAB: %08x\n",
-        getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
+
+  irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
+  irqinfo("  INTCTRL:    %08x VECTAB: %08x\n",
+          getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
 #if 0
-  lldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
-        getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
-        getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+  irqinfo("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+          getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
+          getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
 #endif
-  lldbg("  IRQ ENABLE: %08x\n", getreg32(NVIC_IRQ0_31_ENABLE));
-  lldbg("  SYSH_PRIO:  %08x %08x %08x\n",
-        getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
-        getreg32(NVIC_SYSH12_15_PRIORITY));
-  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
-        getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
-        getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
-        getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+  irqinfo("  IRQ ENABLE: %08x\n", getreg32(NVIC_IRQ0_31_ENABLE));
+  irqinfo("  SYSH_PRIO:  %08x %08x %08x\n",
+          getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+          getreg32(NVIC_SYSH12_15_PRIORITY));
+  irqinfo("  IRQ PRIO:   %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
+          getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
+          getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
+          getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+
   leave_critical_section(flags);
 }
 #else
@@ -146,51 +148,51 @@ static void lpc17_dumpnvic(const char *msg, int irq)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
-static int lpc17_nmi(int irq, FAR void *context)
+#ifdef CONFIG_DEBUG_FEATURES
+static int lpc17_nmi(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! NMI received\n");
+  _err("PANIC!!! NMI received\n");
   PANIC();
   return 0;
 }
 
-static int lpc17_busfault(int irq, FAR void *context)
+static int lpc17_busfault(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Bus fault recived\n");
+  _err("PANIC!!! Bus fault recived\n");
   PANIC();
   return 0;
 }
 
-static int lpc17_usagefault(int irq, FAR void *context)
+static int lpc17_usagefault(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Usage fault received\n");
+  _err("PANIC!!! Usage fault received\n");
   PANIC();
   return 0;
 }
 
-static int lpc17_pendsv(int irq, FAR void *context)
+static int lpc17_pendsv(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! PendSV received\n");
+  _err("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
 }
 
-static int lpc17_dbgmonitor(int irq, FAR void *context)
+static int lpc17_dbgmonitor(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Debug Monitor received\n");
+  _err("PANIC!!! Debug Monitor received\n");
   PANIC();
   return 0;
 }
 
-static int lpc17_reserved(int irq, FAR void *context)
+static int lpc17_reserved(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Reserved interrupt\n");
+  _err("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;
 }
@@ -369,8 +371,8 @@ void up_irqinitialize(void)
    * under certain conditions.
    */
 
-  irq_attach(LPC17_IRQ_SVCALL, up_svcall);
-  irq_attach(LPC17_IRQ_HARDFAULT, up_hardfault);
+  irq_attach(LPC17_IRQ_SVCALL, up_svcall, NULL);
+  irq_attach(LPC17_IRQ_HARDFAULT, up_hardfault, NULL);
 
   /* Set the priority of the SVCall interrupt */
 
@@ -386,22 +388,22 @@ void up_irqinitialize(void)
    */
 
 #ifdef CONFIG_ARM_MPU
-  irq_attach(LPC17_IRQ_MEMFAULT, up_memfault);
+  irq_attach(LPC17_IRQ_MEMFAULT, up_memfault, NULL);
   up_enable_irq(LPC17_IRQ_MEMFAULT);
 #endif
 
   /* Attach all other processor exceptions (except reset and sys tick) */
 
-#ifdef CONFIG_DEBUG
-  irq_attach(LPC17_IRQ_NMI, lpc17_nmi);
+#ifdef CONFIG_DEBUG_FEATURES
+  irq_attach(LPC17_IRQ_NMI, lpc17_nmi, NULL);
 #ifndef CONFIG_ARM_MPU
-  irq_attach(LPC17_IRQ_MEMFAULT, up_memfault);
+  irq_attach(LPC17_IRQ_MEMFAULT, up_memfault, NULL);
 #endif
-  irq_attach(LPC17_IRQ_BUSFAULT, lpc17_busfault);
-  irq_attach(LPC17_IRQ_USAGEFAULT, lpc17_usagefault);
-  irq_attach(LPC17_IRQ_PENDSV, lpc17_pendsv);
-  irq_attach(LPC17_IRQ_DBGMONITOR, lpc17_dbgmonitor);
-  irq_attach(LPC17_IRQ_RESERVED, lpc17_reserved);
+  irq_attach(LPC17_IRQ_BUSFAULT, lpc17_busfault, NULL);
+  irq_attach(LPC17_IRQ_USAGEFAULT, lpc17_usagefault, NULL);
+  irq_attach(LPC17_IRQ_PENDSV, lpc17_pendsv, NULL);
+  irq_attach(LPC17_IRQ_DBGMONITOR, lpc17_dbgmonitor, NULL);
+  irq_attach(LPC17_IRQ_RESERVED, lpc17_reserved, NULL);
 #endif
 
   lpc17_dumpnvic("initial", LPC17_IRQ_NIRQS);
@@ -410,7 +412,7 @@ void up_irqinitialize(void)
    * GPIO pins.
    */
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
   lpc17_gpioirqinitialize();
 #endif
 
@@ -454,7 +456,7 @@ void up_disable_irq(int irq)
           putreg32(regval, regaddr);
         }
     }
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
   else if (irq >= LPC17_VALID_FIRST0L)
     {
       /* Maybe it is a (derived) GPIO IRQ */
@@ -499,7 +501,7 @@ void up_enable_irq(int irq)
           putreg32(regval, regaddr);
         }
     }
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
   else if (irq >= LPC17_VALID_FIRST0L)
     {
       /* Maybe it is a (derived) GPIO IRQ */
diff --git a/arch/arm/src/lpc17xx/lpc17_lcd.c b/arch/arm/src/lpc17xx/lpc17_lcd.c
index 79be36191caab688dfce9ed204fdd0bb85dcfbf6..f8a6c6db6c9d6d6ed72a4759249132c2b9655498 100644
--- a/arch/arm/src/lpc17xx/lpc17_lcd.c
+++ b/arch/arm/src/lpc17xx/lpc17_lcd.c
@@ -202,14 +202,14 @@ struct fb_vtable_s g_fbobject =
 static int lpc17_getvideoinfo(FAR struct fb_vtable_s *vtable,
                               FAR struct fb_videoinfo_s *vinfo)
 {
-  gvdbg("vtable=%p vinfo=%p\n", vtable, vinfo);
+  lcdinfo("vtable=%p vinfo=%p\n", vtable, vinfo);
   if (vtable && vinfo)
     {
       memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -220,14 +220,14 @@ static int lpc17_getvideoinfo(FAR struct fb_vtable_s *vtable,
 static int lpc17_getplaneinfo(FAR struct fb_vtable_s *vtable, int planeno,
                               FAR struct fb_planeinfo_s *pinfo)
 {
-  gvdbg("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
+  lcdinfo("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
   if (vtable && planeno == 0 && pinfo)
     {
       memcpy(pinfo, &g_planeinfo, sizeof(struct fb_planeinfo_s));
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -244,8 +244,8 @@ static int lpc17_getcmap(FAR struct fb_vtable_s *vtable,
   int last;
   int i;
 
-  gvdbg("vtable=%p cmap=%p first=%d len=%d\n",
-        vtable, cmap, cmap->first, cmap->len);
+  lcdinfo("vtable=%p cmap=%p first=%d len=%d\n",
+          vtable, cmap, cmap->first, cmap->len);
 
   DEBUGASSERT(vtable && cmap &&
               cmap->first < 256 && (cmap->first + cmap->len) < 256);
@@ -319,8 +319,8 @@ static int lpc17_putcmap(FAR struct fb_vtable_s *vtable,
   int last;
   int i;
 
-  gvdbg("vtable=%p cmap=%p first=%d len=%d\n",
-        vtable, cmap, cmap->first, cmap->len);
+  lcdinfo("vtable=%p cmap=%p first=%d len=%d\n",
+          vtable, cmap, cmap->first, cmap->len);
 
   DEBUGASSERT(vtable && cmap);
 
@@ -383,27 +383,27 @@ static int lpc17_putcmap(FAR struct fb_vtable_s *vtable,
 static int lpc17_getcursor(FAR struct fb_vtable_s *vtable,
                         FAR struct fb_cursorattrib_s *attrib)
 {
-  gvdbg("vtable=%p attrib=%p\n", vtable, attrib);
+  lcdinfo("vtable=%p attrib=%p\n", vtable, attrib);
   if (vtable && attrib)
     {
 #ifdef CONFIG_FB_HWCURSORIMAGE
       attrib->fmt = LPC17_COLOR_FMT;
 #endif
 
-      gvdbg("pos: (x=%d, y=%d)\n", g_cpos.x, g_cpos.y);
+      lcdinfo("pos: (x=%d, y=%d)\n", g_cpos.x, g_cpos.y);
       attrib->pos = g_cpos;
 
 #ifdef CONFIG_FB_HWCURSORSIZE
       attrib->mxsize.h = CONFIG_LPC17_LCD_VHEIGHT;
       attrib->mxsize.w = CONFIG_LPC17_LCD_HWIDTH;
 
-      gvdbg("size: (h=%d, w=%d)\n", g_csize.h, g_csize.w);
+      lcdinfo("size: (h=%d, w=%d)\n", g_csize.h, g_csize.w);
       attrib->size = g_csize;
 #endif
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 #endif
@@ -416,34 +416,34 @@ static int lpc17_getcursor(FAR struct fb_vtable_s *vtable,
 static int lpc17_setcursor(FAR struct fb_vtable_s *vtable,
                        FAR struct fb_setcursor_s *setttings)
 {
-  gvdbg("vtable=%p setttings=%p\n", vtable, setttings);
+  lcdinfo("vtable=%p setttings=%p\n", vtable, setttings);
   if (vtable && setttings)
     {
-      gvdbg("flags: %02x\n", settings->flags);
+      lcdinfo("flags: %02x\n", settings->flags);
       if ((flags & FB_CUR_SETPOSITION) != 0)
         {
           g_cpos = settings->pos;
-          gvdbg("pos: (h:%d, w:%d)\n", g_cpos.x, g_cpos.y);
+          lcdinfo("pos: (h:%d, w:%d)\n", g_cpos.x, g_cpos.y);
         }
 #ifdef CONFIG_FB_HWCURSORSIZE
       if ((flags & FB_CUR_SETSIZE) != 0)
         {
           g_csize = settings->size;
-          gvdbg("size: (h:%d, w:%d)\n", g_csize.h, g_csize.w);
+          lcdinfo("size: (h:%d, w:%d)\n", g_csize.h, g_csize.w);
         }
 #endif
 #ifdef CONFIG_FB_HWCURSORIMAGE
       if ((flags & FB_CUR_SETIMAGE) != 0)
         {
-          gvdbg("image: (h:%d, w:%d) @ %p\n",
-                settings->img.height, settings->img.width,
-                settings->img.image);
+          lcdinfo("image: (h:%d, w:%d) @ %p\n",
+                  settings->img.height, settings->img.width,
+                  settings->img.image);
         }
 #endif
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 #endif
@@ -473,7 +473,7 @@ int up_fbinitialize(int display)
   uint32_t regval;
   int i;
 
-  gvdbg("Entry\n");
+  lcdinfo("Entry\n");
 
   /* Give LCD bus priority */
 
@@ -485,7 +485,7 @@ int up_fbinitialize(int display)
   /* Configure pins */
   /* Video data */
 
-  gvdbg("Configuring pins\n");
+  lcdinfo("Configuring pins\n");
 
   lpc17_configgpio(GPIO_LCD_VD0);
   lpc17_configgpio(GPIO_LCD_VD1);
@@ -528,7 +528,7 @@ int up_fbinitialize(int display)
 
   modifyreg32(LPC17_SYSCON_PCONP, 0, SYSCON_PCONP_PCLCD);
 
-  gvdbg("Configuring the LCD controller\n");
+  lcdinfo("Configuring the LCD controller\n");
 
   /* Disable the cursor */
 
@@ -686,7 +686,7 @@ int up_fbinitialize(int display)
 #endif
 
   putreg32(0, LPC17_LCD_INTMSK);
-  gvdbg("Enabling the display\n");
+  lcdinfo("Enabling the display\n");
 
   for (i = LPC17_LCD_PWREN_DELAY; i; i--);
 
@@ -727,7 +727,7 @@ int up_fbinitialize(int display)
 
 FAR struct fb_vtable_s *up_fbgetvplane(int display, int vplane)
 {
-  gvdbg("vplane: %d\n", vplane);
+  lcdinfo("vplane: %d\n", vplane);
   if (vplane == 0)
     {
       return &g_fbobject;
@@ -801,16 +801,16 @@ void lpc17_lcdclear(nxgl_mxpixel_t color)
 #if LPC17_BPP > 16
   uint32_t *dest = (uint32_t *)CONFIG_LPC17_LCD_VRAMBASE;
 
-  gvdbg("Clearing display: color=%08x VRAM=%08x size=%d\n",
-        color, CONFIG_LPC17_LCD_VRAMBASE,
-        CONFIG_LPC17_LCD_HWIDTH * CONFIG_LPC17_LCD_VHEIGHT * sizeof(uint32_t));
+  lcdinfo("Clearing display: color=%08x VRAM=%08x size=%d\n",
+          color, CONFIG_LPC17_LCD_VRAMBASE,
+          CONFIG_LPC17_LCD_HWIDTH * CONFIG_LPC17_LCD_VHEIGHT * sizeof(uint32_t));
 
 #else
   uint16_t *dest = (uint16_t *)CONFIG_LPC17_LCD_VRAMBASE;
 
-  gvdbg("Clearing display: color=%08x VRAM=%08x size=%d\n",
-        color, CONFIG_LPC17_LCD_VRAMBASE,
-        CONFIG_LPC17_LCD_HWIDTH * CONFIG_LPC17_LCD_VHEIGHT * sizeof(uint16_t));
+  lcdinfo("Clearing display: color=%08x VRAM=%08x size=%d\n",
+          color, CONFIG_LPC17_LCD_VRAMBASE,
+          CONFIG_LPC17_LCD_HWIDTH * CONFIG_LPC17_LCD_VHEIGHT * sizeof(uint16_t));
 #endif
 
   for (i = 0; i < (CONFIG_LPC17_LCD_HWIDTH * CONFIG_LPC17_LCD_VHEIGHT); i++)
diff --git a/arch/arm/src/lpc17xx/lpc17_mcpwm.c b/arch/arm/src/lpc17xx/lpc17_mcpwm.c
index f8d552941b04a34992b0d2a9898ad0c1b16b08f0..db0d1a9d67de95932697df6894bc0a8bc6e6ff23 100644
--- a/arch/arm/src/lpc17xx/lpc17_mcpwm.c
+++ b/arch/arm/src/lpc17xx/lpc17_mcpwm.c
@@ -47,7 +47,7 @@
 
 #include 
 #include 
-#include 
+#include 
 #include 
 
 #include "up_internal.h"
@@ -81,29 +81,10 @@
 #define TIMTYPE_TIM1       TIMTYPE_ADVANCED
 
 /* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing PWM */
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_PWM
-#endif
-
-#ifdef CONFIG_DEBUG_PWM
-#  define pwmdbg              dbg
-#  define pwmlldbg            lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define pwmvdbg           vdbg
-#    define pwmllvdbg         llvdbg
-#    define pwm_dumpgpio(p,m) stm32_dumpgpio(p,m)
-#  else
-#    define pwmlldbg(x...)
-#    define pwmllvdbg(x...)
-#    define pwm_dumpgpio(p,m)
-#  endif
+#ifdef CONFIG_DEBUG_PWM_INFO
+#  define pwm_dumpgpio(p,m) stm32_dumpgpio(p,m)
 #else
-#  define pwmdbg(x...)
-#  define pwmlldbg(x...)
-#  define pwmvdbg(x...)
-#  define pwmllvdbg(x...)
 #  define pwm_dumpgpio(p,m)
 #endif
 
@@ -132,7 +113,7 @@ struct lpc17_mcpwmtimer_s
 static uint32_t mcpwm_getreg(struct lpc17_mcpwmtimer_s *priv, int offset);
 static void mcpwm_putreg(struct lpc17_mcpwmtimer_s *priv, int offset, uint32_t value);
 
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_PWM_INFO
 static void mcpwm_dumpregs(struct lpc17_mcpwmtimer_s *priv, FAR const char *msg);
 #else
 #  define mcpwm_dumpregs(priv,msg)
@@ -242,12 +223,12 @@ static void mcpwm_putreg(struct lpc17_mcpwmtimer_s *priv, int offset, uint32_t v
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_PWM_INFO
 static void mcpwm_dumpregs(FAR struct lpc17_mcpwmtimer_s *priv,
                            FAR const char *msg)
 {
-  pwmvdbg("%s:\n", msg);
-  pwmvdbg("  CR1: %04x CR2:  %04x SMCR:  %04x DIER:  %04x\n",
+  pwminfo("%s:\n", msg);
+  pwminfo("  CR1: %04x CR2:  %04x SMCR:  %04x DIER:  %04x\n",
           mcpwm_getreg(priv, LPC17_PWM_MR0_OFFSET),
           mcpwm_getreg(priv, LPC17_PWM_MR1_OFFSET),
           mcpwm_getreg(priv, LPC17_PWM_MR2_OFFSET),
@@ -255,7 +236,7 @@ static void mcpwm_dumpregs(FAR struct lpc17_mcpwmtimer_s *priv,
 #if defined(CONFIG_LPC17_MCPWM)
   if (priv->timtype == TIMTYPE_ADVANCED)
     {
-      pwmvdbg("  RCR: %04x BDTR: %04x DCR:   %04x DMAR:  %04x\n",
+      pwminfo("  RCR: %04x BDTR: %04x DCR:   %04x DMAR:  %04x\n",
               mcpwm_getreg(priv, LPC17_PWM_MR0_OFFSET),
               mcpwm_getreg(priv, LPC17_PWM_MR1_OFFSET),
               mcpwm_getreg(priv, LPC17_PWM_MR2_OFFSET),
@@ -264,7 +245,7 @@ static void mcpwm_dumpregs(FAR struct lpc17_mcpwmtimer_s *priv,
   else
 #endif
     {
-      pwmvdbg("  DCR: %04x DMAR: %04x\n",
+      pwminfo("  DCR: %04x DMAR: %04x\n",
               mcpwm_getreg(priv, LPC17_PWM_MR2_OFFSET),
               mcpwm_getreg(priv, LPC17_PWM_MR3_OFFSET));
     }
@@ -520,7 +501,7 @@ static int mcpwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
   FAR struct lpc17_mcpwmtimer_s *priv = (FAR struct lpc17_mcpwmtimer_s *)dev;
   uint32_t pincfg;
 
-  pwmvdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
+  pwminfo("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
 
   /* Make sure that the output has been stopped */
 
@@ -576,7 +557,7 @@ static int mcpwm_stop(FAR struct pwm_lowerhalf_s *dev)
   uint32_t regval;
   irqstate_t flags;
 
-  pwmvdbg("TIM%d\n", priv->timid);
+  pwminfo("TIM%d\n", priv->timid);
 
   /* Disable interrupts momentary to stop any ongoing timer processing and
    * to prevent any concurrent access to the reset register.
@@ -602,7 +583,7 @@ static int mcpwm_stop(FAR struct pwm_lowerhalf_s *dev)
 
   leave_critical_section(flags);
 
-  pwmvdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
+  pwminfo("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
   mcpwm_dumpregs(priv, "After stop");
   return OK;
 }
@@ -625,12 +606,12 @@ static int mcpwm_stop(FAR struct pwm_lowerhalf_s *dev)
 
 static int mcpwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg)
 {
-#ifdef CONFIG_DEBUG_PWM
+#ifdef CONFIG_DEBUG_PWM_INFO
   FAR struct lpc17_mcpwmtimer_s *priv = (FAR struct lpc17_mcpwmtimer_s *)dev;
 
   /* There are no platform-specific ioctl commands */
 
-  pwmvdbg("TIM%d\n", priv->timid);
+  pwminfo("TIM%d\n", priv->timid);
 #endif
   return -ENOTTY;
 }
@@ -660,7 +641,7 @@ FAR struct pwm_lowerhalf_s *lpc17_mcpwminitialize(int timer)
 {
   FAR struct lpc17_mcpwmtimer_s *lower;
 
-  pwmvdbg("TIM%d\n", timer);
+  pwminfo("TIM%d\n", timer);
 
   switch (timer)
     {
@@ -674,7 +655,7 @@ FAR struct pwm_lowerhalf_s *lpc17_mcpwminitialize(int timer)
 #endif
 
       default:
-        pwmdbg("No such timer configured\n");
+        pwmerr("ERROR: No such timer configured\n");
         return NULL;
     }
 
diff --git a/arch/arm/src/lpc17xx/lpc17_pwm.c b/arch/arm/src/lpc17xx/lpc17_pwm.c
index 4f8c79315c607a6735ed60a78c710389a909f2fb..df3be30a74a95a79911ea2983c238f66a6764b7a 100644
--- a/arch/arm/src/lpc17xx/lpc17_pwm.c
+++ b/arch/arm/src/lpc17xx/lpc17_pwm.c
@@ -47,7 +47,7 @@
 
 #include 
 #include 
-#include 
+#include 
 #include 
 
 #include "up_internal.h"
@@ -99,29 +99,10 @@
 #define TCR_PWM_EN         (0x00000008)
 
 /* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing PWM */
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_PWM
-#endif
-
-#ifdef CONFIG_DEBUG_PWM
-#  define pwmdbg              dbg
-#  define pwmlldbg            lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define pwmvdbg           vdbg
-#    define pwmllvdbg         llvdbg
-#    define pwm_dumpgpio(p,m) stm32_dumpgpio(p,m)
-#  else
-#    define pwmlldbg(x...)
-#    define pwmllvdbg(x...)
-#    define pwm_dumpgpio(p,m)
-#  endif
+#ifdef CONFIG_DEBUG_PWM_INFO
+#  define pwm_dumpgpio(p,m) stm32_dumpgpio(p,m)
 #else
-#  define pwmdbg(x...)
-#  define pwmlldbg(x...)
-#  define pwmvdbg(x...)
-#  define pwmllvdbg(x...)
 #  define pwm_dumpgpio(p,m)
 #endif
 
@@ -150,7 +131,7 @@ struct lpc17_pwmtimer_s
 static uint32_t pwm_getreg(struct lpc17_pwmtimer_s *priv, int offset);
 static void pwm_putreg(struct lpc17_pwmtimer_s *priv, int offset, uint32_t value);
 
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_PWM_INFO
 static void pwm_dumpregs(struct lpc17_pwmtimer_s *priv, FAR const char *msg);
 #else
 #  define pwm_dumpregs(priv,msg)
@@ -258,11 +239,11 @@ static void pwm_putreg(struct lpc17_pwmtimer_s *priv, int offset, uint32_t value
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_PWM_INFO
 static void pwm_dumpregs(struct lpc17_pwmtimer_s *priv, FAR const char *msg)
 {
-  pwmvdbg("%s:\n", msg);
-  pwmvdbg("  CR1: %04x CR2:  %04x SMCR:  %04x DIER:  %04x\n",
+  pwminfo("%s:\n", msg);
+  pwminfo("  CR1: %04x CR2:  %04x SMCR:  %04x DIER:  %04x\n",
           pwm_getreg(priv, LPC17_PWM_MR0_OFFSET),
           pwm_getreg(priv, LPC17_PWM_MR1_OFFSET),
           pwm_getreg(priv, LPC17_PWM_MR2_OFFSET),
@@ -270,7 +251,7 @@ static void pwm_dumpregs(struct lpc17_pwmtimer_s *priv, FAR const char *msg)
 #if defined(CONFIG_LPC17_PWM1)
   if (priv->timtype == TIMTYPE_ADVANCED)
     {
-      pwmvdbg("  RCR: %04x BDTR: %04x DCR:   %04x DMAR:  %04x\n",
+      pwminfo("  RCR: %04x BDTR: %04x DCR:   %04x DMAR:  %04x\n",
               pwm_getreg(priv, LPC17_PWM_MR0_OFFSET),
               pwm_getreg(priv, LPC17_PWM_MR1_OFFSET),
               pwm_getreg(priv, LPC17_PWM_MR2_OFFSET),
@@ -279,7 +260,7 @@ static void pwm_dumpregs(struct lpc17_pwmtimer_s *priv, FAR const char *msg)
   else
 #endif
     {
-      pwmvdbg("  DCR: %04x DMAR: %04x\n",
+      pwminfo("  DCR: %04x DMAR: %04x\n",
               pwm_getreg(priv, LPC17_PWM_MR2_OFFSET),
               pwm_getreg(priv, LPC17_PWM_MR3_OFFSET));
     }
@@ -369,7 +350,7 @@ static int pwm_interrupt(struct lpc17_pwmtimer_s *priv)
  *
  ****************************************************************************/
 
-static int pwm_tim1interrupt(int irq, void *context)
+static int pwm_tim1interrupt(int irq, void *context, FAR void *arg)
 {
   return pwm_interrupt(&g_pwm1dev);
 }
@@ -491,7 +472,7 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
   FAR struct lpc17_pwmtimer_s *priv = (FAR struct lpc17_pwmtimer_s *)dev;
   uint32_t pincfg;
 
-  pwmvdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
+  pwminfo("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
 
   /* Make sure that the output has been stopped */
 
@@ -547,7 +528,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
   uint32_t regval;
   irqstate_t flags;
 
-  pwmvdbg("TIM%d\n", priv->timid);
+  pwminfo("TIM%d\n", priv->timid);
 
   /* Disable interrupts momentary to stop any ongoing timer processing and
    * to prevent any concurrent access to the reset register.
@@ -573,7 +554,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
 
   leave_critical_section(flags);
 
-  pwmvdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
+  pwminfo("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
   pwm_dumpregs(priv, "After stop");
   return OK;
 }
@@ -596,12 +577,12 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
 
 static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg)
 {
-#ifdef CONFIG_DEBUG_PWM
+#ifdef CONFIG_DEBUG_PWM_INFO
   FAR struct lpc17_pwmtimer_s *priv = (FAR struct lpc17_pwmtimer_s *)dev;
 
   /* There are no platform-specific ioctl commands */
 
-  pwmvdbg("TIM%d\n", priv->timid);
+  pwminfo("TIM%d\n", priv->timid);
 #endif
   return -ENOTTY;
 }
@@ -631,7 +612,7 @@ FAR struct pwm_lowerhalf_s *lpc17_pwminitialize(int timer)
 {
   FAR struct lpc17_pwmtimer_s *lower;
 
-  pwmvdbg("TIM%d\n", timer);
+  pwminfo("TIM%d\n", timer);
 
   switch (timer)
     {
@@ -645,7 +626,7 @@ FAR struct pwm_lowerhalf_s *lpc17_pwminitialize(int timer)
 #endif
 
       default:
-        pwmdbg("No such timer configured\n");
+        pwmerr("ERROR: No such timer configured\n");
         return NULL;
     }
 
diff --git a/arch/arm/src/lpc17xx/lpc17_sdcard.c b/arch/arm/src/lpc17xx/lpc17_sdcard.c
index e6cb9fafd7e117537fe3b192aa14db5255c3601b..56ab0965780cbb8992d69b855a7c5289ca62ad04 100644
--- a/arch/arm/src/lpc17xx/lpc17_sdcard.c
+++ b/arch/arm/src/lpc17xx/lpc17_sdcard.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/lpc17xx/lpc17_sdcard.c
  *
- *   Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013-2014, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -52,6 +52,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -77,9 +78,9 @@
 /* Required system configuration options:
  *
  *   CONFIG_ARCH_DMA - Enable architecture-specific DMA subsystem
- *     initialization.  Required if CONFIG_SDIO_DMA is enabled.
+ *     initialization.  Required if CONFIG_LPC17_SDCARD_DMA is enabled.
  *   CONFIG_LPC17_GPDMA - Enable LPC17XX GPDMA support.  Required if
- *     CONFIG_SDIO_DMA is enabled
+ *     CONFIG_LPC17_SDCARD_DMA is enabled
  *   CONFIG_SCHED_WORKQUEUE -- Callback support requires work queue support.
  *
  * Driver-specific configuration options:
@@ -87,32 +88,31 @@
  *   CONFIG_SDIO_MUXBUS - Setting this configuration enables some locking
  *     APIs to manage concurrent accesses on the SD card bus.  This is not
  *     needed for the simple case of a single SD card, for example.
- *   CONFIG_SDIO_DMA - Enable SD card DMA.  This is a marginally optional.
+ *   CONFIG_LPC17_SDCARD_DMA - Enable SD card DMA.  This is a marginally optional.
  *     For most usages, SD accesses will cause data overruns if used without DMA.
  *     NOTE the above system DMA configuration options.
- *   CONFIG_SDIO_WIDTH_D1_ONLY - This may be selected to force the driver
- *     operate with only a single data line (the default is to use all
- *     4 SD data lines).
- *   CONFIG_DEBUG_SDIO - Enables some very low-level debug output
- *     This also requires CONFIG_DEBUG_FS and CONFIG_DEBUG_VERBOSE
+ *   CONFIG_LPC17_SDCARD_WIDTH_D1_ONLY - This may be selected to force the
+ *     driver operate with only a single data line (the default is to use
+ *     all 4 SD data lines).
+ *   CONFIG_DEBUG_MEMCARD_* - Enables some very low-level debug output
+ *     This also requires CONFIG_DEBUG_FS and CONFIG_DEBUG_INFO
  */
 
-#if defined(CONFIG_SDIO_DMA) && !defined(CONFIG_LPC17_GPDMA)
-#  warning "CONFIG_SDIO_DMA support requires CONFIG_LPC17_GPDMA"
-#endif
-
-#ifndef CONFIG_SDIO_DMA
+#ifndef CONFIG_LPC17_SDCARD_DMA
 #  warning "Large Non-DMA transfer may result in RX overrun failures"
+#else
+#  ifndef CONFIG_LPC17_GPDMA
+#    error "CONFIG_LPC17_SDCARD_DMA support requires CONFIG_LPC17_GPDMA"
+#  endif
+#  ifndef CONFIG_SDIO_DMA
+#    error CONFIG_SDIO_DMA must be defined with CONFIG_LPC17_SDCARD_DMA
+#  endif
 #endif
 
 #ifndef CONFIG_SCHED_WORKQUEUE
 #  error "Callback support requires CONFIG_SCHED_WORKQUEUE"
 #endif
 
-#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG)
-#  undef CONFIG_DEBUG_SDIO
-#endif
-
 /* Friendly CLKCR bit re-definitions ****************************************/
 
 /* Mode dependent settings.  These depend on clock devisor settings that must
@@ -213,8 +213,8 @@
 
 /* Register logging support */
 
-#ifdef CONFIG_DEBUG_SDIO
-#  ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_DEBUG_MEMCARD_INFO
+#  ifdef CONFIG_LPC17_SDCARD_DMA
 #    define SAMPLENDX_BEFORE_SETUP  0
 #    define SAMPLENDX_BEFORE_ENABLE 1
 #    define SAMPLENDX_AFTER_SETUP   2
@@ -250,7 +250,7 @@ struct lpc17_dev_s
 
   /* Callback support */
 
-  uint8_t            cdstatus;   /* Card status */
+  sdio_statset_t     cdstatus;   /* Card status */
   sdio_eventset_t    cbevents;   /* Set of events to be cause callbacks */
   worker_t           callback;   /* Registered callback function */
   void              *cbarg;      /* Registered callback argument */
@@ -265,7 +265,7 @@ struct lpc17_dev_s
   /* DMA data transfer support */
 
   bool               widebus;    /* Required for DMA support */
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_LPC17_SDCARD_DMA
   volatile uint8_t   xfrflags;   /* Used to synchronize SD card and DMA completion events */
   bool               dmamode;    /* true: DMA mode transfer */
   DMA_HANDLE         dma;        /* Handle for DMA channel */
@@ -274,7 +274,7 @@ struct lpc17_dev_s
 
 /* Register logging support */
 
-#ifdef CONFIG_DEBUG_SDIO
+#ifdef CONFIG_DEBUG_MEMCARD_INFO
 struct lpc17_sdcard_regs_s
 {
   uint8_t  pwr;
@@ -291,7 +291,7 @@ struct lpc17_sdcard_regs_s
 struct lpc17_sampleregs_s
 {
   struct lpc17_sdcard_regs_s sdcard;
-#if defined(CONFIG_DEBUG_DMA) && defined(CONFIG_SDIO_DMA)
+#if defined(CONFIG_DEBUG_DMA) && defined(CONFIG_LPC17_SDCARD_DMA)
   struct lpc17_dmaregs_s  dma;
 #endif
 };
@@ -314,7 +314,7 @@ static inline uint32_t lpc17_getpwrctrl(void);
 
 /* DMA Helpers **************************************************************/
 
-#ifdef CONFIG_DEBUG_SDIO
+#ifdef CONFIG_DEBUG_MEMCARD_INFO
 static void lpc17_sampleinit(void);
 static void lpc17_sdcard_sample(struct lpc17_sdcard_regs_s *regs);
 static void lpc17_sample(struct lpc17_dev_s *priv, int index);
@@ -328,7 +328,7 @@ static void lpc17_dumpsamples(struct lpc17_dev_s *priv);
 #  define   lpc17_dumpsamples(priv)
 #endif
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_LPC17_SDCARD_DMA
 static void lpc17_dmacallback(DMA_HANDLE handle, void *arg, int status);
 #endif
 
@@ -345,7 +345,7 @@ static void lpc17_endtransfer(struct lpc17_dev_s *priv, sdio_eventset_t wkupeven
 
 /* Interrupt Handling *******************************************************/
 
-static int  lpc17_interrupt(int irq, void *context);
+static int  lpc17_interrupt(int irq, void *context, FAR void *arg);
 
 /* SD Card Interface Methods ************************************************/
 
@@ -358,6 +358,7 @@ static int lpc17_lock(FAR struct sdio_dev_s *dev, bool lock);
 /* Initialization/setup */
 
 static void lpc17_reset(FAR struct sdio_dev_s *dev);
+static sdio_capset_t lpc17_capabilities(FAR struct sdio_dev_s *dev);
 static uint8_t lpc17_status(FAR struct sdio_dev_s *dev);
 static void lpc17_widebus(FAR struct sdio_dev_s *dev, bool enable);
 static void lpc17_clock(FAR struct sdio_dev_s *dev,
@@ -397,8 +398,7 @@ static int  lpc17_registercallback(FAR struct sdio_dev_s *dev,
 
 /* DMA */
 
-#ifdef CONFIG_SDIO_DMA
-static bool lpc17_dmasupported(FAR struct sdio_dev_s *dev);
+#ifdef CONFIG_LPC17_SDCARD_DMA
 static int  lpc17_dmarecvsetup(FAR struct sdio_dev_s *dev,
               FAR uint8_t *buffer, size_t buflen);
 static int  lpc17_dmasendsetup(FAR struct sdio_dev_s *dev,
@@ -422,6 +422,7 @@ struct lpc17_dev_s g_scard_dev =
     .lock             = lpc17_lock,
 #endif
     .reset            = lpc17_reset,
+    .capabilities     = lpc17_capabilities,
     .status           = lpc17_status,
     .widebus          = lpc17_widebus,
     .clock            = lpc17_clock,
@@ -443,16 +444,20 @@ struct lpc17_dev_s g_scard_dev =
     .callbackenable   = lpc17_callbackenable,
     .registercallback = lpc17_registercallback,
 #ifdef CONFIG_SDIO_DMA
-    .dmasupported     = lpc17_dmasupported,
+#ifdef CONFIG_LPC17_SDCARD_DMA
     .dmarecvsetup     = lpc17_dmarecvsetup,
     .dmasendsetup     = lpc17_dmasendsetup,
+#else
+    .dmarecvsetup     = lpc17_recvsetup,
+    .dmasendsetup     = lpc17_sendsetup,
+#endif
 #endif
   },
 };
 
 /* Register logging support */
 
-#ifdef CONFIG_DEBUG_SDIO
+#ifdef CONFIG_DEBUG_MEMCARD_INFO
 static struct lpc17_sampleregs_s g_sampleregs[DEBUG_NSAMPLES];
 #endif
 
@@ -529,8 +534,8 @@ static inline void lpc17_setclock(uint32_t clkcr)
   regval |=  clkcr;
   putreg32(regval, LPC17_SDCARD_CLOCK);
 
-  fvdbg("CLKCR: %08x PWR: %08x\n",
-        getreg32(LPC17_SDCARD_CLOCK), getreg32(LPC17_SDCARD_PWR));
+  mcinfo("CLKCR: %08x PWR: %08x\n",
+         getreg32(LPC17_SDCARD_CLOCK), getreg32(LPC17_SDCARD_PWR));
 }
 
 /****************************************************************************
@@ -564,7 +569,7 @@ static void lpc17_configwaitints(struct lpc17_dev_s *priv, uint32_t waitmask,
   priv->waitevents = waitevents;
   priv->wkupevent  = wkupevent;
   priv->waitmask   = waitmask;
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_LPC17_SDCARD_DMA
   priv->xfrflags   = 0;
 #endif
   putreg32(priv->xfrmask | priv->waitmask, LPC17_SDCARD_MASK0);
@@ -659,7 +664,7 @@ static inline uint32_t lpc17_getpwrctrl(void)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_SDIO
+#ifdef CONFIG_DEBUG_MEMCARD_INFO
 static void lpc17_sampleinit(void)
 {
   memset(g_sampleregs, 0xff, DEBUG_NSAMPLES * sizeof(struct lpc17_sampleregs_s));
@@ -674,7 +679,7 @@ static void lpc17_sampleinit(void)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_SDIO
+#ifdef CONFIG_DEBUG_MEMCARD_INFO
 static void lpc17_sdcard_sample(struct lpc17_sdcard_regs_s *regs)
 {
   regs->pwr     = (uint8_t)getreg32(LPC17_SDCARD_PWR);
@@ -697,16 +702,17 @@ static void lpc17_sdcard_sample(struct lpc17_sdcard_regs_s *regs)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_SDIO
+#ifdef CONFIG_DEBUG_MEMCARD_INFO
 static void lpc17_sample(struct lpc17_dev_s *priv, int index)
 {
   struct lpc17_sampleregs_s *regs = &g_sampleregs[index];
-#if defined(CONFIG_DEBUG_DMA) && defined(CONFIG_SDIO_DMA)
+#if defined(CONFIG_DEBUG_DMA) && defined(CONFIG_LPC17_SDCARD_DMA)
   if (priv->dmamode)
     {
       lpc17_dmasample(priv->dma, ®s->dma);
     }
 #endif
+
   lpc17_sdcard_sample(®s->sdcard);
 }
 #endif
@@ -719,19 +725,19 @@ static void lpc17_sample(struct lpc17_dev_s *priv, int index)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_SDIO
+#ifdef CONFIG_DEBUG_MEMCARD_INFO
 static void lpc17_sdcard_dump(struct lpc17_sdcard_regs_s *regs, const char *msg)
 {
-  fdbg("SD Card Registers: %s\n", msg);
-  fdbg("  POWER[%08x]: %08x\n", LPC17_SDCARD_PWR,     regs->pwr);
-  fdbg("  CLKCR[%08x]: %08x\n", LPC17_SDCARD_CLOCK,   regs->clkcr);
-  fdbg("  DCTRL[%08x]: %08x\n", LPC17_SDCARD_DCTRL,   regs->dctrl);
-  fdbg(" DTIMER[%08x]: %08x\n", LPC17_SDCARD_DTIMER,  regs->dtimer);
-  fdbg("   DLEN[%08x]: %08x\n", LPC17_SDCARD_DLEN,    regs->dlen);
-  fdbg(" DCOUNT[%08x]: %08x\n", LPC17_SDCARD_DCOUNT,  regs->dcount);
-  fdbg("    STA[%08x]: %08x\n", LPC17_SDCARD_STATUS,  regs->sta);
-  fdbg("   MASK[%08x]: %08x\n", LPC17_SDCARD_MASK0,   regs->mask);
-  fdbg("FIFOCNT[%08x]: %08x\n", LPC17_SDCARD_FIFOCNT, regs->fifocnt);
+  mcinfo("SD Card Registers: %s\n", msg);
+  mcinfo("  POWER[%08x]: %08x\n", LPC17_SDCARD_PWR,     regs->pwr);
+  mcinfo("  CLKCR[%08x]: %08x\n", LPC17_SDCARD_CLOCK,   regs->clkcr);
+  mcinfo("  DCTRL[%08x]: %08x\n", LPC17_SDCARD_DCTRL,   regs->dctrl);
+  mcinfo(" DTIMER[%08x]: %08x\n", LPC17_SDCARD_DTIMER,  regs->dtimer);
+  mcinfo("   DLEN[%08x]: %08x\n", LPC17_SDCARD_DLEN,    regs->dlen);
+  mcinfo(" DCOUNT[%08x]: %08x\n", LPC17_SDCARD_DCOUNT,  regs->dcount);
+  mcinfo("    STA[%08x]: %08x\n", LPC17_SDCARD_STATUS,  regs->sta);
+  mcinfo("   MASK[%08x]: %08x\n", LPC17_SDCARD_MASK0,   regs->mask);
+  mcinfo("FIFOCNT[%08x]: %08x\n", LPC17_SDCARD_FIFOCNT, regs->fifocnt);
 }
 #endif
 
@@ -743,11 +749,11 @@ static void lpc17_sdcard_dump(struct lpc17_sdcard_regs_s *regs, const char *msg)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_SDIO
+#ifdef CONFIG_DEBUG_MEMCARD_INFO
 static void lpc17_dumpsample(struct lpc17_dev_s *priv,
                              struct lpc17_sampleregs_s *regs, const char *msg)
 {
-#if defined(CONFIG_DEBUG_DMA) && defined(CONFIG_SDIO_DMA)
+#if defined(CONFIG_DEBUG_DMA) && defined(CONFIG_LPC17_SDCARD_DMA)
   if (priv->dmamode)
     {
       lpc17_dmadump(priv->dma, ®s->dma, msg);
@@ -765,11 +771,11 @@ static void lpc17_dumpsample(struct lpc17_dev_s *priv,
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_SDIO
+#ifdef CONFIG_DEBUG_MEMCARD_INFO
 static void lpc17_dumpsamples(struct lpc17_dev_s *priv)
 {
   lpc17_dumpsample(priv, &g_sampleregs[SAMPLENDX_BEFORE_SETUP], "Before setup");
-#if defined(CONFIG_DEBUG_DMA) && defined(CONFIG_SDIO_DMA)
+#if defined(CONFIG_DEBUG_DMA) && defined(CONFIG_LPC17_SDCARD_DMA)
   if (priv->dmamode)
     {
       lpc17_dumpsample(priv, &g_sampleregs[SAMPLENDX_BEFORE_ENABLE], "Before DMA enable");
@@ -777,7 +783,7 @@ static void lpc17_dumpsamples(struct lpc17_dev_s *priv)
 #endif
   lpc17_dumpsample(priv, &g_sampleregs[SAMPLENDX_AFTER_SETUP], "After setup");
   lpc17_dumpsample(priv, &g_sampleregs[SAMPLENDX_END_TRANSFER], "End of transfer");
-#if defined(CONFIG_DEBUG_DMA) && defined(CONFIG_SDIO_DMA)
+#if defined(CONFIG_DEBUG_DMA) && defined(CONFIG_LPC17_SDCARD_DMA)
   if (priv->dmamode)
     {
       lpc17_dumpsample(priv, &g_sampleregs[SAMPLENDX_DMA_CALLBACK], "DMA Callback");
@@ -794,7 +800,7 @@ static void lpc17_dumpsamples(struct lpc17_dev_s *priv)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_LPC17_SDCARD_DMA
 static void lpc17_dmacallback(DMA_HANDLE handle, void *arg, int status)
 {
   FAR struct lpc17_dev_s *priv = (FAR struct lpc17_dev_s *)arg;
@@ -813,7 +819,7 @@ static void lpc17_dmacallback(DMA_HANDLE handle, void *arg, int status)
 
   if (status < 0)
     {
-      flldbg("DMA error %d, remaining: %d\n", status, priv->remaining);
+      dmaerr("ERROR: DMA error %d, remaining: %d\n", status, priv->remaining);
       result = SDIOWAIT_ERROR;
     }
   else
@@ -1080,7 +1086,7 @@ static void lpc17_eventtimeout(int argc, uint32_t arg)
       /* Yes.. wake up any waiting threads */
 
       lpc17_endwait(priv, SDIOWAIT_TIMEOUT);
-      flldbg("Timeout: remaining: %d\n", priv->remaining);
+      mcerr("ERROR: Timeout: remaining: %d\n", priv->remaining);
     }
 }
 
@@ -1149,7 +1155,7 @@ static void lpc17_endtransfer(struct lpc17_dev_s *priv, sdio_eventset_t wkupeven
 
   /* If this was a DMA transfer, make sure that DMA is stopped */
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_LPC17_SDCARD_DMA
   if (priv->dmamode)
     {
       /* DMA debug instrumentation */
@@ -1197,7 +1203,7 @@ static void lpc17_endtransfer(struct lpc17_dev_s *priv, sdio_eventset_t wkupeven
  *
  ****************************************************************************/
 
-static int lpc17_interrupt(int irq, void *context)
+static int lpc17_interrupt(int irq, void *context, FAR void *arg)
 {
   struct lpc17_dev_s *priv = &g_scard_dev;
   uint32_t enabled;
@@ -1217,7 +1223,7 @@ static int lpc17_interrupt(int irq, void *context)
       pending  = enabled & priv->xfrmask;
       if (pending != 0)
         {
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_LPC17_SDCARD_DMA
           if (!priv->dmamode)
 #endif
             {
@@ -1256,7 +1262,7 @@ static int lpc17_interrupt(int irq, void *context)
 
               /* Was this transfer performed in DMA mode? */
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_LPC17_SDCARD_DMA
               if (priv->dmamode)
                 {
                   /* Yes.. Terminate the transfers only if the DMA has also
@@ -1297,7 +1303,7 @@ static int lpc17_interrupt(int irq, void *context)
             {
               /* Terminate the transfer with an error */
 
-              flldbg("ERROR: Data block CRC failure, remaining: %d\n", priv->remaining);
+              mcerr("ERROR: Data block CRC failure, remaining: %d\n", priv->remaining);
               lpc17_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
             }
 
@@ -1307,7 +1313,7 @@ static int lpc17_interrupt(int irq, void *context)
             {
               /* Terminate the transfer with an error */
 
-              flldbg("ERROR: Data timeout, remaining: %d\n", priv->remaining);
+              mcerr("ERROR: Data timeout, remaining: %d\n", priv->remaining);
               lpc17_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT);
             }
 
@@ -1317,7 +1323,7 @@ static int lpc17_interrupt(int irq, void *context)
             {
               /* Terminate the transfer with an error */
 
-              flldbg("ERROR: RX FIFO overrun, remaining: %d\n", priv->remaining);
+              mcerr("ERROR: RX FIFO overrun, remaining: %d\n", priv->remaining);
               lpc17_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
             }
 
@@ -1327,7 +1333,7 @@ static int lpc17_interrupt(int irq, void *context)
             {
               /* Terminate the transfer with an error */
 
-              flldbg("ERROR: TX FIFO underrun, remaining: %d\n", priv->remaining);
+              mcerr("ERROR: TX FIFO underrun, remaining: %d\n", priv->remaining);
               lpc17_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
             }
 
@@ -1337,7 +1343,7 @@ static int lpc17_interrupt(int irq, void *context)
             {
               /* Terminate the transfer with an error */
 
-              flldbg("ERROR: Start bit, remaining: %d\n", priv->remaining);
+              mcerr("ERROR: Start bit, remaining: %d\n", priv->remaining);
               lpc17_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
             }
         }
@@ -1455,7 +1461,7 @@ static void lpc17_reset(FAR struct sdio_dev_s *dev)
   priv->waitevents = 0;      /* Set of events to be waited for */
   priv->waitmask   = 0;      /* Interrupt enables for event waiting */
   priv->wkupevent  = 0;      /* The event that caused the wakeup */
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_LPC17_SDCARD_DMA
   priv->xfrflags   = 0;      /* Used to synchronize SD card and DMA completion events */
 #endif
 
@@ -1470,7 +1476,7 @@ static void lpc17_reset(FAR struct sdio_dev_s *dev)
   /* DMA data transfer support */
 
   priv->widebus    = false;  /* Required for DMA support */
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_LPC17_SDCARD_DMA
   priv->dmamode    = false;  /* true: DMA mode transfer */
 #endif
 
@@ -1480,8 +1486,36 @@ static void lpc17_reset(FAR struct sdio_dev_s *dev)
   lpc17_setpwrctrl(SDCARD_PWR_CTRL_ON);
   leave_critical_section(flags);
 
-  fvdbg("CLCKR: %08x POWER: %08x\n",
-        getreg32(LPC17_SDCARD_CLOCK), getreg32(LPC17_SDCARD_PWR));
+  mcinfo("CLCKR: %08x POWER: %08x\n",
+         getreg32(LPC17_SDCARD_CLOCK), getreg32(LPC17_SDCARD_PWR));
+}
+
+/****************************************************************************
+ * Name: lpc17_capabilities
+ *
+ * Description:
+ *   Get capabilities (and limitations) of the SDIO driver (optional)
+ *
+ * Input Parameters:
+ *   dev   - Device-specific state data
+ *
+ * Returned Value:
+ *   Returns a bitset of status values (see SDIO_CAPS_* defines)
+ *
+ ****************************************************************************/
+
+static sdio_capset_t lpc17_capabilities(FAR struct sdio_dev_s *dev)
+{
+  sdio_capset_t caps = 0;
+
+#ifdef CONFIG_LPC17_SDCARD_WIDTH_D1_ONLY
+  caps |= SDIO_CAPS_1BIT_ONLY;
+#endif
+#ifdef CONFIG_LPC17_SDCARD_DMA
+  caps |= SDIO_CAPS_DMASUPPORTED;
+#endif
+
+  return caps;
 }
 
 /****************************************************************************
@@ -1498,7 +1532,7 @@ static void lpc17_reset(FAR struct sdio_dev_s *dev)
  *
  ****************************************************************************/
 
-static uint8_t lpc17_status(FAR struct sdio_dev_s *dev)
+static sdio_statset_t lpc17_status(FAR struct sdio_dev_s *dev)
 {
   struct lpc17_dev_s *priv = (struct lpc17_dev_s *)dev;
   return priv->cdstatus;
@@ -1571,7 +1605,7 @@ static void lpc17_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
       /* SD normal operation clocking (wide 4-bit mode) */
 
       case CLOCK_SD_TRANSFER_4BIT:
-#ifndef CONFIG_SDIO_WIDTH_D1_ONLY
+#ifndef CONFIG_LPC17_SDCARD_WIDTH_D1_ONLY
         clkcr = (SDCARD_CLOCK_SDWIDEXFR | SDCARD_CLOCK_CLKEN);
         break;
 #endif
@@ -1608,7 +1642,7 @@ static int lpc17_attach(FAR struct sdio_dev_s *dev)
 
   /* Attach the SD card interrupt handler */
 
-  ret = irq_attach(LPC17_IRQ_MCI, lpc17_interrupt);
+  ret = irq_attach(LPC17_IRQ_MCI, lpc17_interrupt, NULL);
   if (ret == OK)
     {
 
@@ -1689,7 +1723,7 @@ static int lpc17_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t arg)
   cmdidx  = (cmd & MMCSD_CMDIDX_MASK) >> MMCSD_CMDIDX_SHIFT;
   regval |= cmdidx | SDCARD_CMD_CPSMEN;
 
-  fvdbg("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
+  mcinfo("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
 
   /* Write the SD card CMD */
 
@@ -1738,7 +1772,7 @@ static int lpc17_recvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
 
   priv->buffer    = (uint32_t *)buffer;
   priv->remaining = nbytes;
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_LPC17_SDCARD_DMA
   priv->dmamode   = false;
 #endif
 
@@ -1793,7 +1827,7 @@ static int lpc17_sendsetup(FAR struct sdio_dev_s *dev, FAR const uint8_t *buffer
 
   priv->buffer    = (uint32_t *)buffer;
   priv->remaining = nbytes;
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_LPC17_SDCARD_DMA
   priv->dmamode   = false;
 #endif
 
@@ -1847,7 +1881,7 @@ static int lpc17_cancel(FAR struct sdio_dev_s *dev)
 
   /* If this was a DMA transfer, make sure that DMA is stopped */
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_LPC17_SDCARD_DMA
   if (priv->dmamode)
     {
       /* Make sure that the DMA is stopped (it will be stopped automatically
@@ -1920,7 +1954,7 @@ static int lpc17_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
     {
       if (--timeout <= 0)
         {
-          fdbg("ERROR: Timeout cmd: %08x events: %08x STA: %08x\n",
+          mcerr("ERROR: Timeout cmd: %08x events: %08x STA: %08x\n",
                cmd, events, getreg32(LPC17_SDCARD_STATUS));
 
           return -ETIMEDOUT;
@@ -1955,7 +1989,7 @@ static int lpc17_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
 
 static int lpc17_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *rshort)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   uint32_t respcmd;
 #endif
   uint32_t regval;
@@ -1984,10 +2018,10 @@ static int lpc17_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
    */
 
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!rshort)
     {
-      fdbg("ERROR: rshort=NULL\n");
+      mcerr("ERROR: rshort=NULL\n");
       ret = -EINVAL;
     }
 
@@ -1997,7 +2031,7 @@ static int lpc17_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
            (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R1B_RESPONSE &&
            (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R6_RESPONSE)
     {
-      fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+      mcerr("ERROR: Wrong response CMD=%08x\n", cmd);
       ret = -EINVAL;
     }
   else
@@ -2008,15 +2042,15 @@ static int lpc17_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
       regval = getreg32(LPC17_SDCARD_STATUS);
       if ((regval & SDCARD_STATUS_CTIMEOUT) != 0)
         {
-          fdbg("ERROR: Command timeout: %08x\n", regval);
+          mcerr("ERROR: Command timeout: %08x\n", regval);
           ret = -ETIMEDOUT;
         }
       else if ((regval & SDCARD_STATUS_CCRCFAIL) != 0)
         {
-          fdbg("ERROR: CRC failure: %08x\n", regval);
+          mcerr("ERROR: CRC failure: %08x\n", regval);
           ret = -EIO;
         }
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       else
         {
           /* Check response received is of desired command */
@@ -2024,7 +2058,7 @@ static int lpc17_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
           respcmd = getreg32(LPC17_SDCARD_RESPCMD);
           if ((uint8_t)(respcmd & SDCARD_RESPCMD_MASK) != (cmd & MMCSD_CMDIDX_MASK))
             {
-              fdbg("ERROR: RESCMD=%02x CMD=%08x\n", respcmd, cmd);
+              mcerr("ERROR: RESCMD=%02x CMD=%08x\n", respcmd, cmd);
               ret = -EINVAL;
             }
         }
@@ -2052,12 +2086,12 @@ static int lpc17_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t rlo
    *     0         1               End bit
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   /* Check that R1 is the correct response to this command */
 
   if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R2_RESPONSE)
     {
-      fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+      mcerr("ERROR: Wrong response CMD=%08x\n", cmd);
       ret = -EINVAL;
     }
   else
@@ -2068,12 +2102,12 @@ static int lpc17_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t rlo
       regval = getreg32(LPC17_SDCARD_STATUS);
       if (regval & SDCARD_STATUS_CTIMEOUT)
         {
-          fdbg("ERROR: Timeout STA: %08x\n", regval);
+          mcerr("ERROR: Timeout STA: %08x\n", regval);
           ret = -ETIMEDOUT;
         }
       else if (regval & SDCARD_STATUS_CCRCFAIL)
         {
-          fdbg("ERROR: CRC fail STA: %08x\n", regval);
+          mcerr("ERROR: CRC fail STA: %08x\n", regval);
           ret = -EIO;
         }
     }
@@ -2088,6 +2122,7 @@ static int lpc17_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t rlo
       rlong[2] = getreg32(LPC17_SDCARD_RESP2);
       rlong[3] = getreg32(LPC17_SDCARD_RESP3);
     }
+
   return ret;
 }
 
@@ -2107,11 +2142,11 @@ static int lpc17_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *r
 
   /* Check that this is the correct response to this command */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R3_RESPONSE &&
       (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R7_RESPONSE)
     {
-      fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+      mcerr("ERROR: Wrong response CMD=%08x\n", cmd);
       ret = -EINVAL;
     }
   else
@@ -2124,7 +2159,7 @@ static int lpc17_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *r
       regval = getreg32(LPC17_SDCARD_STATUS);
       if (regval & SDCARD_STATUS_CTIMEOUT)
         {
-          fdbg("ERROR: Timeout STA: %08x\n", regval);
+          mcerr("ERROR: Timeout STA: %08x\n", regval);
           ret = -ETIMEDOUT;
         }
     }
@@ -2269,7 +2304,7 @@ static sdio_eventset_t lpc17_eventwait(FAR struct sdio_dev_s *dev,
                        1, (uint32_t)priv);
       if (ret != OK)
         {
-          fdbg("ERROR: wd_start failed: %d\n", ret);
+          mcerr("ERROR: wd_start failed: %d\n", ret);
         }
     }
 
@@ -2304,7 +2339,7 @@ static sdio_eventset_t lpc17_eventwait(FAR struct sdio_dev_s *dev,
   /* Disable event-related interrupts */
 
   lpc17_configwaitints(priv, 0, 0, 0);
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_LPC17_SDCARD_DMA
   priv->xfrflags   = 0;
 #endif
 
@@ -2341,7 +2376,7 @@ static void lpc17_callbackenable(FAR struct sdio_dev_s *dev,
 {
   struct lpc17_dev_s *priv = (struct lpc17_dev_s *)dev;
 
-  fvdbg("eventset: %02x\n", eventset);
+  mcinfo("eventset: %02x\n", eventset);
   DEBUGASSERT(priv != NULL);
 
   priv->cbevents = eventset;
@@ -2377,7 +2412,7 @@ static int lpc17_registercallback(FAR struct sdio_dev_s *dev,
 
   /* Disable callbacks and register this callback and is argument */
 
-  fvdbg("Register %p(%p)\n", callback, arg);
+  mcinfo("Register %p(%p)\n", callback, arg);
   DEBUGASSERT(priv != NULL);
 
   priv->cbevents = 0;
@@ -2386,27 +2421,6 @@ static int lpc17_registercallback(FAR struct sdio_dev_s *dev,
   return OK;
 }
 
-/****************************************************************************
- * Name: lpc17_dmasupported
- *
- * Description:
- *   Return true if the hardware can support DMA
- *
- * Input Parameters:
- *   dev - An instance of the SD card device interface
- *
- * Returned Value:
- *   true if DMA is supported.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_SDIO_DMA
-static bool lpc17_dmasupported(FAR struct sdio_dev_s *dev)
-{
-  return true;
-}
-#endif
-
 /****************************************************************************
  * Name: lpc17_dmarecvsetup
  *
@@ -2426,7 +2440,7 @@ static bool lpc17_dmasupported(FAR struct sdio_dev_s *dev)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_LPC17_SDCARD_DMA
 static int lpc17_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
                               size_t buflen)
 {
@@ -2505,7 +2519,7 @@ static int lpc17_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
  *
  ****************************************************************************/
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_LPC17_SDCARD_DMA
 static int lpc17_dmasendsetup(FAR struct sdio_dev_s *dev,
                               FAR const uint8_t *buffer, size_t buflen)
 {
@@ -2590,8 +2604,8 @@ static void lpc17_callback(void *arg)
   /* Is a callback registered? */
 
   DEBUGASSERT(priv != NULL);
-  fvdbg("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
-        priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus);
+  mcinfo("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
+         priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus);
 
   if (priv->callback)
     {
@@ -2635,14 +2649,14 @@ static void lpc17_callback(void *arg)
         {
           /* Yes.. queue it */
 
-           fvdbg("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
+           mcinfo("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
           (void)work_queue(HPWORK, &priv->cbwork, (worker_t)priv->callback, priv->cbarg, 0);
         }
       else
         {
           /* No.. then just call the callback here */
 
-          fvdbg("Callback to %p(%p)\n", priv->callback, priv->cbarg);
+          mcinfo("Callback to %p(%p)\n", priv->callback, priv->cbarg);
           priv->callback(priv->cbarg);
         }
     }
@@ -2702,12 +2716,22 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
   putreg32(regval, LPC17_SYSCON_PCONP);
 
   /* Initialize the SD card slot structure */
+  /* Initialize semaphores */
 
   sem_init(&priv->waitsem, 0, 0);
+
+  /* The waitsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
+
+  /* Create a watchdog timer */
+
   priv->waitwdog = wd_create();
   DEBUGASSERT(priv->waitwdog);
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_LPC17_SDCARD_DMA
   /* Configure the SDCARD DMA request */
 
   lpc17_dmaconfigure(DMA_REQ_SDCARD, DMA_DMASEL_SDCARD);
@@ -2726,7 +2750,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
 
 #ifndef CONFIG_SDIO_MUXBUS
   lpc17_configgpio(GPIO_SD_DAT0);
-#ifndef CONFIG_SDIO_WIDTH_D1_ONLY
+#ifndef CONFIG_LPC17_SDCARD_WIDTH_D1_ONLY
   lpc17_configgpio(GPIO_SD_DAT1);
   lpc17_configgpio(GPIO_SD_DAT2);
   lpc17_configgpio(GPIO_SD_DAT3);
@@ -2766,7 +2790,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
 void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
 {
   struct lpc17_dev_s *priv = (struct lpc17_dev_s *)dev;
-  uint8_t cdstatus;
+  sdio_statset_t cdstatus;
   irqstate_t flags;
 
   /* Update card status */
@@ -2781,7 +2805,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
     {
       priv->cdstatus &= ~SDIO_STATUS_PRESENT;
     }
-  fvdbg("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
+  mcinfo("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
 
   /* Perform any requested callback if the status has changed */
 
@@ -2789,6 +2813,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
     {
       lpc17_callback(priv);
     }
+
   leave_critical_section(flags);
 }
 
@@ -2824,7 +2849,8 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
     {
       priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED;
     }
-  fvdbg("cdstatus: %02x\n", priv->cdstatus);
+
+  mcinfo("cdstatus: %02x\n", priv->cdstatus);
   leave_critical_section(flags);
 }
 #endif /* CONFIG_LPC17_SDCARD */
diff --git a/arch/arm/src/lpc17xx/lpc17_serial.c b/arch/arm/src/lpc17xx/lpc17_serial.c
index d0e2ceeecf93c6379e7850339d11e8d4ee0dccac..9c13a06d4a1986fdb323619b63eac69945ed8724 100644
--- a/arch/arm/src/lpc17xx/lpc17_serial.c
+++ b/arch/arm/src/lpc17xx/lpc17_serial.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/lpc17xx/lpc17_serial.c
  *
- *   Copyright (C) 2010-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010-2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -104,7 +104,7 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-static int  up_interrupt(int irq, void *context);
+static int  up_interrupt(int irq, void *context, void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  up_receive(struct uart_dev_s *dev, uint32_t *status);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
@@ -999,7 +999,7 @@ static int up_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, up_interrupt);
+  ret = irq_attach(priv->irq, up_interrupt, dev);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
@@ -1041,44 +1041,14 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_interrupt(int irq, void *context)
+static int up_interrupt(int irq, void *context, void *arg)
 {
-  struct uart_dev_s *dev = NULL;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct up_dev_s   *priv;
   uint32_t           status;
   int                passes;
 
-#ifdef CONFIG_LPC17_UART0
-  if (g_uart0priv.irq == irq)
-    {
-      dev = &g_uart0port;
-    }
-  else
-#endif
-#ifdef CONFIG_LPC17_UART1
-  if (g_uart1priv.irq == irq)
-    {
-      dev = &g_uart1port;
-    }
-  else
-#endif
-#ifdef CONFIG_LPC17_UART2
-  if (g_uart2priv.irq == irq)
-    {
-      dev = &g_uart2port;
-    }
-  else
-#endif
-#ifdef CONFIG_LPC17_UART3
-  if (g_uart3priv.irq == irq)
-    {
-      dev = &g_uart3port;
-    }
-  else
-#endif
-    {
-      PANIC();
-    }
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct up_dev_s *)dev->priv;
 
   /* Loop until there are no characters to be transferred or,
@@ -1134,7 +1104,7 @@ static int up_interrupt(int irq, void *context)
               /* Read the modem status register (MSR) to clear */
 
               status = up_serialin(priv, LPC17_UART_MSR_OFFSET);
-              vdbg("MSR: %02x\n", status);
+              _info("MSR: %02x\n", status);
               break;
             }
 
@@ -1145,7 +1115,7 @@ static int up_interrupt(int irq, void *context)
               /* Read the line status register (LSR) to clear */
 
               status = up_serialin(priv, LPC17_UART_LSR_OFFSET);
-              vdbg("LSR: %02x\n", status);
+              _info("LSR: %02x\n", status);
               break;
             }
 
@@ -1153,7 +1123,7 @@ static int up_interrupt(int irq, void *context)
 
           default:
             {
-              dbg("Unexpected IIR: %02x\n", status);
+              _err("ERROR: Unexpected IIR: %02x\n", status);
               break;
             }
         }
diff --git a/arch/arm/src/lpc17xx/lpc17_spi.c b/arch/arm/src/lpc17xx/lpc17_spi.c
index c915d1dfc2328944b2967d684523ff9c35abf9d2..6ddef3951fc28d26cce59ca4172516f3f3a7d219 100644
--- a/arch/arm/src/lpc17xx/lpc17_spi.c
+++ b/arch/arm/src/lpc17xx/lpc17_spi.c
@@ -71,26 +71,6 @@
 #  error "CONFIG_SPI_EXCHANGE must not be defined in the configuration"
 #endif
 
-/* Debug ********************************************************************/
-/* The following enable debug output from this file:
- *
- * CONFIG_DEBUG         - Define to enable general debug features
- * CONFIG_DEBUG_SPI     - Define to enable basic SSP debug (needs CONFIG_DEBUG)
- * CONFIG_DEBUG_VERBOSE - Define to enable verbose SSP debug
- */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /* SSP Clocking *************************************************************/
 /* The CPU clock by 1, 2, 4, or 8 to get the SPI peripheral clock (SPI_CLOCK).
  * SPI_CLOCK may be further divided by 8-254 to get the SPI clock.  If we
@@ -287,7 +267,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
   priv->frequency = frequency;
   priv->actual    = actual;
 
-  spidbg("Frequency %d->%d\n", frequency, actual);
+  spiinfo("Frequency %d->%d\n", frequency, actual);
   return actual;
 }
 
@@ -449,7 +429,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
   FAR uint8_t *ptr = (FAR uint8_t *)buffer;
   uint8_t data;
 
-  spidbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
   while (nwords)
     {
       /* Write the data to transmitted to the SPI Data Register */
@@ -494,7 +474,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
 {
   FAR uint8_t *ptr = (FAR uint8_t *)buffer;
 
-  spidbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
   while (nwords)
     {
       /* Write some dummy data to the SPI Data Register in order to clock the
diff --git a/arch/arm/src/lpc17xx/lpc17_ssp.c b/arch/arm/src/lpc17xx/lpc17_ssp.c
index 9cdee092423c8c8320d84242a56a8b5c8f7d5b58..d66abf4d9d7e6a2753ac1bbae8edbc2a789388bf 100644
--- a/arch/arm/src/lpc17xx/lpc17_ssp.c
+++ b/arch/arm/src/lpc17xx/lpc17_ssp.c
@@ -72,26 +72,6 @@
 #  error "CONFIG_SPI_EXCHANGE must not be defined in the configuration"
 #endif
 
-/* Debug ********************************************************************/
-/* The following enable debug output from this file:
- *
- * CONFIG_DEBUG         - Define to enable general debug features
- * CONFIG_DEBUG_SPI     - Define to enable basic SSP debug (needs CONFIG_DEBUG)
- * CONFIG_DEBUG_VERBOSE - Define to enable verbose SSP debug
- */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define sspdbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define sspdbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /* SSP Clocking *************************************************************/
 
 #if defined(LPC176x)
@@ -470,7 +450,7 @@ static uint32_t ssp_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
   priv->frequency = frequency;
   priv->actual    = actual;
 
-  sspdbg("Frequency %d->%d\n", frequency, actual);
+  spiinfo("Frequency %d->%d\n", frequency, actual);
   return actual;
 }
 
@@ -521,7 +501,7 @@ static void ssp_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
           break;
 
         default:
-          sspdbg("Bad mode: %d\n", mode);
+          spierr("ERROR: Bad mode: %d\n", mode);
           DEBUGASSERT(FALSE);
           return;
         }
@@ -609,7 +589,7 @@ static uint16_t ssp_send(FAR struct spi_dev_s *dev, uint16_t wd)
   /* Get the value from the RX FIFO and return it */
 
   regval = ssp_getreg(priv, LPC17_SSP_DR_OFFSET);
-  sspdbg("%04x->%04x\n", wd, regval);
+  spiinfo("%04x->%04x\n", wd, regval);
   return (uint16_t)regval;
 }
 
@@ -646,7 +626,7 @@ static void ssp_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
 
   /* Loop while thre are bytes remaining to be sent */
 
-  sspdbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
   u.pv = buffer;
   while (nwords > 0)
     {
@@ -674,7 +654,7 @@ static void ssp_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
 
   /* Then discard all card responses until the RX & TX FIFOs are emptied. */
 
-  sspdbg("discarding\n");
+  spiinfo("discarding\n");
   do
     {
       /* Is there anything in the RX fifo? */
@@ -735,7 +715,7 @@ static void ssp_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
 
   /* While there is remaining to be sent (and no synchronization error has occurred) */
 
-  sspdbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
   u.pv = buffer;
   while (nwords || rxpending)
     {
@@ -745,7 +725,7 @@ static void ssp_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
        * and (3) there are more bytes to be sent.
        */
 
-      spivdbg("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
+      spiinfo("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
       while ((ssp_getreg(priv, LPC17_SSP_SR_OFFSET) & SSP_SR_TNF) &&
              (rxpending < LPC17_SSP_FIFOSZ) && nwords)
         {
@@ -756,7 +736,7 @@ static void ssp_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
 
       /* Now, read the RX data from the RX FIFO while the RX FIFO is not empty */
 
-      spivdbg("RX: rxpending: %d\n", rxpending);
+      spiinfo("RX: rxpending: %d\n", rxpending);
       while (ssp_getreg(priv, LPC17_SSP_SR_OFFSET) & SSP_SR_RNE)
         {
           data = (uint8_t)ssp_getreg(priv, LPC17_SSP_DR_OFFSET);
diff --git a/arch/arm/src/lpc17xx/lpc17_start.c b/arch/arm/src/lpc17xx/lpc17_start.c
index 8d95518d02d3db2e930b93ff0e956cb4e8eba1e2..3a0ae1d70554331623ad0447b8a4df2949941ed5 100644
--- a/arch/arm/src/lpc17xx/lpc17_start.c
+++ b/arch/arm/src/lpc17xx/lpc17_start.c
@@ -82,7 +82,7 @@
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 #  define showprogress(c) up_lowputc(c)
 #else
 #  define showprogress(c)
diff --git a/arch/arm/src/lpc17xx/lpc17_timer.c b/arch/arm/src/lpc17xx/lpc17_timer.c
index b4a821ffc0b97e507b807ef877fc715e54b22249..434f416021ffaa6775ce31183ba8ba23eb94528f 100644
--- a/arch/arm/src/lpc17xx/lpc17_timer.c
+++ b/arch/arm/src/lpc17xx/lpc17_timer.c
@@ -47,7 +47,7 @@
 
 #include 
 #include 
-#include 
+#include 
 #include 
 
 #include "up_internal.h"
@@ -82,29 +82,10 @@
 
 
 /* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing PWM */
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_PWM
-#endif
-
-#ifdef CONFIG_DEBUG_PWM
-#  define pwmdbg              dbg
-#  define pwmlldbg            lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define pwmvdbg           vdbg
-#    define pwmllvdbg         llvdbg
-#    define pwm_dumpgpio(p,m) stm32_dumpgpio(p,m)
-#  else
-#    define pwmlldbg(x...)
-#    define pwmllvdbg(x...)
-#    define pwm_dumpgpio(p,m)
-#  endif
+#ifdef CONFIG_DEBUG_PWM_INFO
+#  define pwm_dumpgpio(p,m) stm32_dumpgpio(p,m)
 #else
-#  define pwmdbg(x...)
-#  define pwmlldbg(x...)
-#  define pwmvdbg(x...)
-#  define pwmllvdbg(x...)
 #  define pwm_dumpgpio(p,m)
 #endif
 
@@ -133,7 +114,7 @@ struct lpc17_timer_s
 static uint32_t timer_getreg(struct lpc17_timer_s *priv, int offset);
 static void timer_putreg(struct lpc17_timer_s *priv, int offset, uint32_t value);
 
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_PWM_INFO
 static void timer_dumpregs(struct lpc17_timer_s *priv, FAR const char *msg);
 #else
 #  define timer_dumpregs(priv,msg)
@@ -242,11 +223,11 @@ static void timer_putreg(struct lpc17_timer_s *priv, int offset,
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_PWM_INFO
 static void timer_dumpregs(struct lpc17_timer_s *priv, FAR const char *msg)
 {
-  pwmdbg("%s:\n", msg);
-  pwmdbg("  CR1: %04x CR2:  %04x SMCR:  %04x DIER:  %04x\n",
+  pwminfo("%s:\n", msg);
+  pwminfo("  CR1: %04x CR2:  %04x SMCR:  %04x DIER:  %04x\n",
           timer_getreg(priv, LPC17_PWM_MR0_OFFSET),
           timer_getreg(priv, LPC17_PWM_MR1_OFFSET),
           timer_getreg(priv, LPC17_PWM_MR2_OFFSET),
@@ -254,7 +235,7 @@ static void timer_dumpregs(struct lpc17_timer_s *priv, FAR const char *msg)
 #if defined(CONFIG_LPC17_TMR0)
   if (priv->timtype == TIMTYPE_ADVANCED)
     {
-      pwmdbg("  RCR: %04x BDTR: %04x DCR:   %04x DMAR:  %04x\n",
+      pwminfo("  RCR: %04x BDTR: %04x DCR:   %04x DMAR:  %04x\n",
               timer_getreg(priv, LPC17_PWM_MR0_OFFSET),
               timer_getreg(priv, LPC17_PWM_MR1_OFFSET),
               timer_getreg(priv, LPC17_PWM_MR2_OFFSET),
@@ -263,7 +244,7 @@ static void timer_dumpregs(struct lpc17_timer_s *priv, FAR const char *msg)
   else
 #endif
     {
-      pwmdbg("  DCR: %04x DMAR: %04x\n",
+      pwminfo("  DCR: %04x DMAR: %04x\n",
               timer_getreg(priv, LPC17_PWM_MR2_OFFSET),
               timer_getreg(priv, LPC17_PWM_MR3_OFFSET));
     }
@@ -469,7 +450,7 @@ static int timer_shutdown(FAR struct pwm_lowerhalf_s *dev)
   FAR struct lpc17_timer_s *priv = (FAR struct lpc17_timer_s *)dev;
   uint32_t pincfg;
 
-  pwmdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
+  pwminfo("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
 
   /* Make sure that the output has been stopped */
 
@@ -525,7 +506,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
   uint32_t regval;
   irqstate_t flags;
 
-  pwmdbg("TIM%d\n", priv->timid);
+  pwminfo("TIM%d\n", priv->timid);
 
   /* Disable interrupts momentary to stop any ongoing timer processing and
    * to prevent any concurrent access to the reset register.
@@ -551,7 +532,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
 
   leave_critical_section(flags);
 
-  pwmdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
+  pwminfo("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
   timer_dumpregs(priv, "After stop");
   return OK;
 }
@@ -574,12 +555,12 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
 
 static int timer_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg)
 {
-#ifdef CONFIG_DEBUG_TIMER
+#ifdef CONFIG_DEBUG_PWM_INFO
   FAR struct lpc17_timer_s *priv = (FAR struct lpc17_timer_s *)dev;
 
   /* There are no platform-specific ioctl commands */
 
-  pwmdbg("TIM%d\n", priv->timid);
+  pwminfo("TIM%d\n", priv->timid);
 #endif
   return -ENOTTY;
 }
@@ -609,7 +590,7 @@ FAR struct pwm_lowerhalf_s *lpc17_timerinitialize(int timer)
 {
   FAR struct lpc17_timer_s *lower;
 
-  pwmdbg("TIM%d\n", timer);
+  pwminfo("TIM%d\n", timer);
 
   switch (timer)
     {
@@ -623,7 +604,7 @@ FAR struct pwm_lowerhalf_s *lpc17_timerinitialize(int timer)
 #endif
 
       default:
-        pwmdbg("No such timer configured\n");
+        pwmerr("ERROR: No such timer configured\n");
         return NULL;
     }
 
diff --git a/arch/arm/src/lpc17xx/lpc17_timerisr.c b/arch/arm/src/lpc17xx/lpc17_timerisr.c
index d0f48a57d1d2ce63d76eb9bfeae9457a53533eb3..bb98e712ae302f33a56811bb5bd83a772a009a8e 100644
--- a/arch/arm/src/lpc17xx/lpc17_timerisr.c
+++ b/arch/arm/src/lpc17xx/lpc17_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/lpc17xx/lpc17_timerisr.c
  *
- *   Copyright (C) 2010 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -79,19 +79,11 @@
 #endif
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  lpc17_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -99,7 +91,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int lpc17_timerisr(int irq, uint32_t *regs, void *arg)
 {
   /* Process timer interrupt */
 
@@ -108,7 +100,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -116,7 +112,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t regval;
 
@@ -139,7 +135,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(LPC17_IRQ_SYSTICK, (xcpt_t)up_timerisr);
+  (void)irq_attach(LPC17_IRQ_SYSTICK, (xcpt_t)lpc17_timerisr, NULL);
 
   /* Enable SysTick interrupts */
 
diff --git a/arch/arm/src/lpc17xx/lpc17_usbdev.c b/arch/arm/src/lpc17xx/lpc17_usbdev.c
index 9995e03cdaddbe25fae2b6051b41edeb0fe8cfc9..5bcf3735b705e93fa72865d2b5884b8bf5530d61 100644
--- a/arch/arm/src/lpc17xx/lpc17_usbdev.c
+++ b/arch/arm/src/lpc17xx/lpc17_usbdev.c
@@ -99,20 +99,23 @@
 #  define USB_FRAME_INT 0
 #endif
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
 #  define USB_ERROR_INT USBDEV_INT_ERRINT
 #else
-#  undef  CONFIG_LPC17_USBDEV_REGDEBUG
 #  define USB_ERROR_INT 0
 #endif
 
+#ifndef CONFIG_DEBUG_USB_INFO
+#  undef  CONFIG_LPC17_USBDEV_REGDEBUG
+#endif
+
 /* CLKCTRL enable bits */
 
 #define LPC17_CLKCTRL_ENABLES (USBDEV_CLK_DEVCLK|USBDEV_CLK_AHBCLK)
 
 /* Dump GPIO registers */
 
-#if defined(CONFIG_LPC17_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_GPIO)
+#if defined(CONFIG_LPC17_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_GPIO_INFO)
 #  define usbdev_dumpgpio() \
    do { \
      lpc17_dumpgpio(GPIO_USB_DP, "D+ P0.29; D- P0.30"); \
@@ -418,7 +421,7 @@ static void lpc17_dispatchrequest(struct lpc17_usbdev_s *priv,
 static inline void lpc17_ep0setup(struct lpc17_usbdev_s *priv);
 static inline void lpc17_ep0dataoutinterrupt(struct lpc17_usbdev_s *priv);
 static inline void lpc17_ep0dataininterrupt(struct lpc17_usbdev_s *priv);
-static int lpc17_usbinterrupt(int irq, FAR void *context);
+static int lpc17_usbinterrupt(int irq, FAR void *context, FAR void *arg);
 
 #ifdef CONFIG_LPC17_USBDEV_DMA
 static int  lpc17_dmasetup(struct lpc17_usbdev_s *priv, uint8_t epphy,
@@ -531,7 +534,7 @@ static struct lpc17_dmadesc_s  g_usbddesc[CONFIG_LPC17_USBDEV_NDMADESCRIPTORS];
 #ifdef CONFIG_LPC17_USBDEV_REGDEBUG
 static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite)
 {
-  lldbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
+  uinfo("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
 }
 #endif
 
@@ -581,7 +584,7 @@ static void lpc17_checkreg(uint32_t addr, uint32_t val, bool iswrite)
             {
               /* No.. More than one. */
 
-              lldbg("[repeats %d more times]\n", count);
+              uinfo("[repeats %d more times]\n", count);
             }
         }
 
@@ -1076,8 +1079,9 @@ static int lpc17_wrrequest(struct lpc17_ep_s *privep)
       return OK;
     }
 
-  ullvdbg("epphy=%d req=%p: len=%d xfrd=%d nullpkt=%d\n",
-          privep->epphy, privreq, privreq->req.len, privreq->req.xfrd, privep->txnullpkt);
+  uinfo("epphy=%d req=%p: len=%d xfrd=%d nullpkt=%d\n",
+        privep->epphy, privreq, privreq->req.len, privreq->req.xfrd,
+        privep->txnullpkt);
 
   /* Ignore any attempt to send a zero length packet on anything but EP0IN */
 
@@ -1185,8 +1189,8 @@ static int lpc17_rdrequest(struct lpc17_ep_s *privep)
       return OK;
     }
 
-  ullvdbg("len=%d xfrd=%d nullpkt=%d\n",
-          privreq->req.len, privreq->req.xfrd, privep->txnullpkt);
+  uinfo("len=%d xfrd=%d nullpkt=%d\n",
+        privreq->req.len, privreq->req.xfrd, privep->txnullpkt);
 
   /* Ignore any attempt to receive a zero length packet */
 
@@ -1593,8 +1597,8 @@ static inline void lpc17_ep0setup(struct lpc17_usbdev_s *priv)
   index = GETUINT16(ctrl.index);
   len   = GETUINT16(ctrl.len);
 
-  ullvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
-          ctrl.type, ctrl.req, value, index, len);
+  uinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+        ctrl.type, ctrl.req, value, index, len);
 
   /* Dispatch any non-standard requests */
 
@@ -1739,7 +1743,7 @@ static inline void lpc17_ep0setup(struct lpc17_usbdev_s *priv)
         if (((ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE) &&
             value == USB_FEATURE_TESTMODE)
           {
-            ullvdbg("test mode: %d\n", index);
+            uinfo("test mode: %d\n", index);
           }
         else if ((ctrl.type & USB_REQ_RECIPIENT_MASK) != USB_REQ_RECIPIENT_ENDPOINT)
           {
@@ -2047,7 +2051,7 @@ static inline void lpc17_ep0dataininterrupt(struct lpc17_usbdev_s *priv)
  *
  ****************************************************************************/
 
-static int lpc17_usbinterrupt(int irq, FAR void *context)
+static int lpc17_usbinterrupt(int irq, FAR void *context, FAR void *arg)
 {
   struct lpc17_usbdev_s *priv = &g_usbdev;
   struct lpc17_ep_s *privep ;
@@ -2090,7 +2094,7 @@ static int lpc17_usbinterrupt(int irq, FAR void *context)
 
 #endif
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
       /* USB engine error interrupt */
 
       if ((devintstatus & USBDEV_INT_ERRINT) != 0)
@@ -2321,7 +2325,7 @@ static int lpc17_usbinterrupt(int irq, FAR void *context)
                                 }
                               else
                                 {
-                                  ullvdbg("Pending data on OUT endpoint\n");
+                                  uinfo("Pending data on OUT endpoint\n");
                                   priv->rxpending = 1;
                                 }
                             }
@@ -2412,7 +2416,7 @@ static int lpc17_dmasetup(struct lpc17_usbdev_s *priv, uint8_t epphy,
   struct lpc17_dmadesc_s *dmadesc = priv;
   uint32_t regval;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!priv || epphy < 2)
     {
       usbtrace(TRACE_DEVERROR(LPC17_TRACEERR_INVALIDPARMS), 0);
@@ -2611,13 +2615,14 @@ static int lpc17_epdisable(FAR struct usbdev_ep_s *ep)
   uint32_t mask = (1 << privep->epphy);
   uint32_t regval;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(LPC17_TRACEERR_INVALIDPARMS), 0);
       return -EINVAL;
     }
 #endif
+
   usbtrace(TRACE_EPDISABLE, privep->epphy);
 
   /* Cancel any ongoing activity */
@@ -2653,13 +2658,14 @@ static FAR struct usbdev_req_s *lpc17_epallocreq(FAR struct usbdev_ep_s *ep)
 {
   FAR struct lpc17_req_s *privreq;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(LPC17_TRACEERR_INVALIDPARMS), 0);
       return NULL;
     }
 #endif
+
   usbtrace(TRACE_EPALLOCREQ, ((FAR struct lpc17_ep_s *)ep)->epphy);
 
   privreq = (FAR struct lpc17_req_s *)kmm_malloc(sizeof(struct lpc17_req_s));
@@ -2685,13 +2691,14 @@ static void lpc17_epfreereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
 {
   FAR struct lpc17_req_s *privreq = (FAR struct lpc17_req_s *)req;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(LPC17_TRACEERR_INVALIDPARMS), 0);
       return;
     }
 #endif
+
   usbtrace(TRACE_EPFREEREQ, ((FAR struct lpc17_ep_s *)ep)->epphy);
 
   kmm_free(privreq);
@@ -2793,11 +2800,12 @@ static int lpc17_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
   irqstate_t flags;
   int ret = OK;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!req || !req->callback || !req->buf || !ep)
     {
       usbtrace(TRACE_DEVERROR(LPC17_TRACEERR_INVALIDPARMS), 0);
-      ullvdbg("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+      uinfo("req=%p callback=%p buf=%p ep=%p\n",
+            req, req->callback, req->buf, ep);
       return -EINVAL;
     }
 #endif
@@ -2878,7 +2886,7 @@ static int lpc17_epcancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
   FAR struct lpc17_ep_s *privep = (FAR struct lpc17_ep_s *)ep;
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(LPC17_TRACEERR_INVALIDPARMS), 0);
@@ -3142,7 +3150,7 @@ static int lpc17_selfpowered(struct usbdev_s *dev, bool selfpowered)
 
   usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(LPC17_TRACEERR_INVALIDPARMS), 0);
@@ -3313,7 +3321,7 @@ void up_usbinitialize(void)
 
   /* Attach USB controller interrupt handler */
 
-  if (irq_attach(LPC17_IRQ_USB, lpc17_usbinterrupt) != 0)
+  if (irq_attach(LPC17_IRQ_USB, lpc17_usbinterrupt, NULL) != 0)
     {
       usbtrace(TRACE_DEVERROR(LPC17_TRACEERR_IRQREGISTRATION),
                (uint16_t)LPC17_IRQ_USB);
@@ -3406,7 +3414,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
 
   usbtrace(TRACE_DEVREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!driver || !driver->ops->bind || !driver->ops->unbind ||
       !driver->ops->disconnect || !driver->ops->setup)
     {
@@ -3456,7 +3464,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
 {
   usbtrace(TRACE_DEVUNREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (driver != g_usbdev.driver)
     {
       usbtrace(TRACE_DEVERROR(LPC17_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/lpc17xx/lpc17_usbhost.c b/arch/arm/src/lpc17xx/lpc17_usbhost.c
index 94003be06d79178b5eb5ebb2299039e2c9e15713..42825b021322c652e1a14814994ac8ab7cabe2ce 100644
--- a/arch/arm/src/lpc17xx/lpc17_usbhost.c
+++ b/arch/arm/src/lpc17xx/lpc17_usbhost.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/lpc17xx/lpc17_usbhost.c
  *
- *   Copyright (C) 2010-2012, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010-2012, 2014-2016 Gregory Nutt. All rights reserved.
  *   Authors: Rafael Noronha 
  *            Gregory Nutt 
  *
@@ -51,6 +51,7 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -88,6 +89,10 @@
 #  define CONFIG_LPC17_USBHOST_NPREALLOC 8
 #endif
 
+#ifndef CONFIG_DEBUG_USB_INFO
+#  undef CONFIG_LPC17_USBHOST_REGDEBUG
+#endif
+
 /* OHCI Setup ******************************************************************/
 /* Frame Interval / Periodic Start */
 
@@ -114,7 +119,7 @@
 
 /* Dump GPIO registers */
 
-#if defined(CONFIG_LPC17_USBHOST_REGDEBUG) && defined(CONFIG_DEBUG_GPIO)
+#ifdef CONFIG_LPC17_USBHOST_REGDEBUG
 #  define usbhost_dumpgpio() \
    do { \
      lpc17_dumpgpio(GPIO_USB_DP, "D+ P0.29; D- P0.30"); \
@@ -342,7 +347,7 @@ static int lpc17_ctrltd(struct lpc17_usbhost_s *priv, struct lpc17_ed_s *ed,
 
 /* Interrupt handling **********************************************************/
 
-static int lpc17_usbinterrupt(int irq, void *context);
+static int lpc17_usbinterrupt(int irq, void *context, FAR void *arg);
 
 /* USB host controller operations **********************************************/
 
@@ -456,7 +461,7 @@ static struct lpc17_xfrinfo_s g_xfrbuffers[CONFIG_LPC17_USBHOST_NPREALLOC];
 #ifdef CONFIG_LPC17_USBHOST_REGDEBUG
 static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite)
 {
-  lldbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
+  uinfo("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
 }
 #endif
 
@@ -506,7 +511,7 @@ static void lpc17_checkreg(uint32_t addr, uint32_t val, bool iswrite)
             {
               /* No.. More than one. */
 
-              lldbg("[repeats %d more times]\n", count);
+              uinfo("[repeats %d more times]\n", count);
             }
         }
 
@@ -1192,7 +1197,7 @@ static inline int lpc17_addinted(struct lpc17_usbhost_s *priv,
 
   interval     = lpc17_getinterval(epdesc->interval);
   ed->interval = interval;
-  uvdbg("interval: %d->%d\n", epdesc->interval, interval);
+  uinfo("interval: %d->%d\n", epdesc->interval, interval);
 
   /* Get the offset associated with the ED direction. IN EDs get the even
    * entries, OUT EDs get the odd entries.
@@ -1225,7 +1230,7 @@ static inline int lpc17_addinted(struct lpc17_usbhost_s *priv,
           interval = priv->outinterval;
         }
     }
-  uvdbg("min interval: %d offset: %d\n", interval, offset);
+  uinfo("min interval: %d offset: %d\n", interval, offset);
 
   /* Get the head of the first of the duplicated entries.  The first offset
    * entry is always guaranteed to contain the common ED list head.
@@ -1244,7 +1249,7 @@ static inline int lpc17_addinted(struct lpc17_usbhost_s *priv,
 
   ed->hw.nexted = head;
   lpc17_setinttab((uint32_t)ed, interval, offset);
-  uvdbg("head: %08x next: %08x\n", ed, head);
+  uinfo("head: %08x next: %08x\n", ed, head);
 
   /* Re-enabled periodic list processing */
 
@@ -1314,7 +1319,7 @@ static inline int lpc17_reminted(struct lpc17_usbhost_s *priv,
    */
 
   head = (struct lpc17_ed_s *)HCCA->inttbl[offset];
-  uvdbg("ed: %08x head: %08x next: %08x offset: %d\n",
+  uinfo("ed: %08x head: %08x next: %08x offset: %d\n",
         ed, head, head ? head->hw.nexted : 0, offset);
 
   /* Find the ED to be removed in the ED list */
@@ -1349,7 +1354,7 @@ static inline int lpc17_reminted(struct lpc17_usbhost_s *priv,
           prev->hw.nexted = ed->hw.nexted;
         }
 
-        uvdbg("ed: %08x head: %08x next: %08x\n",
+        uinfo("ed: %08x head: %08x next: %08x\n",
               ed, head, head ? head->hw.nexted : 0);
 
       /* Calculate the new minimum interval for this list */
@@ -1363,7 +1368,7 @@ static inline int lpc17_reminted(struct lpc17_usbhost_s *priv,
             }
         }
 
-      uvdbg("min interval: %d offset: %d\n", interval, offset);
+      uinfo("min interval: %d offset: %d\n", interval, offset);
 
       /* Save the new minimum interval */
 
@@ -1547,7 +1552,7 @@ static int lpc17_ctrltd(struct lpc17_usbhost_s *priv, struct lpc17_ed_s *ed,
   xfrinfo = lpc17_alloc_xfrinfo();
   if (xfrinfo == NULL)
     {
-      udbg("ERROR: lpc17_alloc_xfrinfo failed\n");
+      uerr("ERROR: lpc17_alloc_xfrinfo failed\n");
       return -ENOMEM;
     }
 
@@ -1566,7 +1571,7 @@ static int lpc17_ctrltd(struct lpc17_usbhost_s *priv, struct lpc17_ed_s *ed,
   ret = lpc17_wdhwait(priv, ed);
   if (ret < 0)
     {
-      udbg("ERROR: Device disconnected\n");
+      uerr("ERROR: Device disconnected\n");
       goto errout_with_xfrinfo;
     }
 
@@ -1607,7 +1612,7 @@ static int lpc17_ctrltd(struct lpc17_usbhost_s *priv, struct lpc17_ed_s *ed,
         }
       else
         {
-          udbg("ERROR: Bad TD completion status: %d\n", xfrinfo->tdstatus);
+          uerr("ERROR: Bad TD completion status: %d\n", xfrinfo->tdstatus);
           ret = xfrinfo->tdstatus == TD_CC_STALL ? -EPERM : -EIO;
         }
     }
@@ -1628,7 +1633,7 @@ errout_with_xfrinfo:
  *
  ****************************************************************************/
 
-static int lpc17_usbinterrupt(int irq, void *context)
+static int lpc17_usbinterrupt(int irq, void *context, FAR void *arg)
 {
   struct lpc17_usbhost_s *priv = &g_usbhost;
   struct lpc17_ed_s *ed;
@@ -1642,7 +1647,7 @@ static int lpc17_usbinterrupt(int irq, void *context)
 
   intst  = lpc17_getreg(LPC17_USBHOST_INTST);
   regval = lpc17_getreg(LPC17_USBHOST_INTEN);
-  ullvdbg("INST: %08x INTEN: %08x\n", intst, regval);
+  uinfo("INST: %08x INTEN: %08x\n", intst, regval);
 
   pending = intst & regval;
   if (pending != 0)
@@ -1652,18 +1657,18 @@ static int lpc17_usbinterrupt(int irq, void *context)
       if ((pending & OHCI_INT_RHSC) != 0)
         {
           uint32_t rhportst1 = lpc17_getreg(LPC17_USBHOST_RHPORTST1);
-          ullvdbg("Root Hub Status Change, RHPORTST1: %08x\n", rhportst1);
+          uinfo("Root Hub Status Change, RHPORTST1: %08x\n", rhportst1);
 
           if ((rhportst1 & OHCI_RHPORTST_CSC) != 0)
             {
               uint32_t rhstatus = lpc17_getreg(LPC17_USBHOST_RHSTATUS);
-              ullvdbg("Connect Status Change, RHSTATUS: %08x\n", rhstatus);
+              uinfo("Connect Status Change, RHSTATUS: %08x\n", rhstatus);
 
               /* If DRWE is set, Connect Status Change indicates a remote wake-up event */
 
               if (rhstatus & OHCI_RHSTATUS_DRWE)
                 {
-                  ullvdbg("DRWE: Remote wake-up\n");
+                  uinfo("DRWE: Remote wake-up\n");
                 }
 
               /* Otherwise... Not a remote wake-up event */
@@ -1680,7 +1685,7 @@ static int lpc17_usbinterrupt(int irq, void *context)
                         {
                           /* Yes.. connected. */
 
-                          ullvdbg("Connected\n");
+                          uinfo("Connected\n");
                           priv->connected = true;
                           priv->change    = true;
 
@@ -1694,7 +1699,7 @@ static int lpc17_usbinterrupt(int irq, void *context)
                         }
                       else
                         {
-                          ulldbg("Spurious status change (connected)\n");
+                          uwarn("WARNING: Spurious status change (connected)\n");
                         }
 
                       /* The LSDA (Low speed device attached) bit is valid
@@ -1710,7 +1715,7 @@ static int lpc17_usbinterrupt(int irq, void *context)
                           priv->rhport.hport.speed = USB_SPEED_FULL;
                         }
 
-                      ullvdbg("Speed:%d\n", priv->rhport.hport.speed);
+                      uinfo("Speed:%d\n", priv->rhport.hport.speed);
                     }
 
                   /* Check if we are now disconnected */
@@ -1719,7 +1724,7 @@ static int lpc17_usbinterrupt(int irq, void *context)
                     {
                       /* Yes.. disconnect the device */
 
-                      ullvdbg("Disconnected\n");
+                      uinfo("Disconnected\n");
                       priv->connected = false;
                       priv->change    = true;
 
@@ -1750,7 +1755,7 @@ static int lpc17_usbinterrupt(int irq, void *context)
                     }
                   else
                     {
-                       ulldbg("Spurious status change (disconnected)\n");
+                       uwarn("WARNING: Spurious status change (disconnected)\n");
                     }
                 }
 
@@ -1830,9 +1835,9 @@ static int lpc17_usbinterrupt(int irq, void *context)
                     {
                       /* The transfer failed for some reason... dump some diagnostic info. */
 
-                      ulldbg("ERROR: ED xfrtype:%d TD CTRL:%08x/CC:%d RHPORTST1:%08x\n",
-                             ed->xfrtype, td->hw.ctrl, xfrinfo->tdstatus,
-                             lpc17_getreg(LPC17_USBHOST_RHPORTST1));
+                      uerr("ERROR: ED xfrtype:%d TD CTRL:%08x/CC:%d RHPORTST1:%08x\n",
+                           ed->xfrtype, td->hw.ctrl, xfrinfo->tdstatus,
+                           lpc17_getreg(LPC17_USBHOST_RHPORTST1));
                     }
 #endif
 
@@ -1894,7 +1899,7 @@ static int lpc17_usbinterrupt(int irq, void *context)
 #ifdef CONFIG_DEBUG_USB
       if ((pending & LPC17_DEBUG_INTS) != 0)
         {
-          ulldbg("ERROR: Unhandled interrupts INTST:%08x\n", intst);
+          uerr("ERROR: Unhandled interrupts INTST:%08x\n", intst);
         }
 #endif
 
@@ -1967,8 +1972,8 @@ static int lpc17_wait(struct usbhost_connection_s *conn,
               *hport = connport;
               leave_critical_section(flags);
 
-              udbg("RHport Connected: %s\n",
-                   connport->connected ? "YES" : "NO");
+              uinfo("RHport Connected: %s\n",
+                    connport->connected ? "YES" : "NO");
 
               return OK;
             }
@@ -1987,7 +1992,7 @@ static int lpc17_wait(struct usbhost_connection_s *conn,
           *hport = connport;
           leave_critical_section(flags);
 
-          udbg("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
+          uinfo("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
           return OK;
         }
 #endif
@@ -2041,7 +2046,7 @@ static int lpc17_rh_enumerate(struct usbhost_connection_s *conn,
     {
       /* No, return an error */
 
-      udbg("Not connected\n");
+      uwarn("WARNING: Not connected\n");
       return -ENODEV;
     }
 
@@ -2089,11 +2094,11 @@ static int lpc17_enumerate(FAR struct usbhost_connection_s *conn,
 
   /* Then let the common usbhost_enumerate do the real enumeration. */
 
-  uvdbg("Enumerate the device\n");
+  uinfo("Enumerate the device\n");
   ret = usbhost_enumerate(hport, &hport->devclass);
   if (ret < 0)
     {
-      udbg("ERROR: Enumeration failed: %d\n", ret);
+      uerr("ERROR: Enumeration failed: %d\n", ret);
     }
 
   return ret;
@@ -2155,7 +2160,7 @@ static int lpc17_ep0configure(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
 
   lpc17_givesem(&priv->exclsem);
 
-  uvdbg("EP0 CTRL:%08x\n", ed->hw.ctrl);
+  uinfo("EP0 CTRL:%08x\n", ed->hw.ctrl);
   return OK;
 }
 
@@ -2255,13 +2260,15 @@ static int lpc17_epalloc(struct usbhost_driver_s *drvr,
           ed->hw.ctrl |= ED_CONTROL_F;
         }
 #endif
-      uvdbg("EP%d CTRL:%08x\n", epdesc->addr, ed->hw.ctrl);
+      uinfo("EP%d CTRL:%08x\n", epdesc->addr, ed->hw.ctrl);
 
       /* Initialize the semaphore that is used to wait for the endpoint
-       * WDH event.
+       * WDH event. The wdhsem semaphore is used for signaling and, hence,
+       * should not have priority inheritance enabled.
        */
 
       sem_init(&ed->wdhsem, 0, 0);
+      sem_setprotocol(&ed->wdhsem, SEM_PRIO_NONE);
 
       /* Link the common tail TD to the ED's TD list */
 
@@ -2299,7 +2306,7 @@ static int lpc17_epalloc(struct usbhost_driver_s *drvr,
         {
           /* No.. destroy it and report the error */
 
-          udbg("ERROR: Failed to queue ED for transfer type: %d\n", ed->xfrtype);
+          uerr("ERROR: Failed to queue ED for transfer type: %d\n", ed->xfrtype);
           sem_destroy(&ed->wdhsem);
           lpc17_edfree(ed);
         }
@@ -2608,7 +2615,7 @@ static int lpc17_ctrlin(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
 
   DEBUGASSERT(priv != NULL && ed != NULL && req != NULL);
 
-  uvdbg("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
+  uinfo("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
         req->type, req->req, req->value[1], req->value[0],
         req->index[1], req->index[0], req->len[1], req->len[0]);
 
@@ -2646,7 +2653,7 @@ static int lpc17_ctrlout(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
 
   DEBUGASSERT(priv != NULL && ed != NULL && req != NULL);
 
-  uvdbg("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
+  uinfo("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
         req->type, req->req, req->value[1], req->value[0],
         req->index[1], req->index[0], req->len[1], req->len[0]);
 
@@ -2712,7 +2719,7 @@ static int lpc17_transfer_common(struct lpc17_usbhost_s *priv,
   xfrinfo = ed->xfrinfo;
   in      = (ed->hw.ctrl & ED_CONTROL_D_MASK) == ED_CONTROL_D_IN;
 
-  uvdbg("EP%u %s toggle:%u maxpacket:%u buflen:%lu\n",
+  uinfo("EP%u %s toggle:%u maxpacket:%u buflen:%lu\n",
         (ed->hw.ctrl  & ED_CONTROL_EN_MASK) >> ED_CONTROL_EN_SHIFT,
         in ? "IN" : "OUT",
         (ed->hw.headp & ED_HEADP_C) != 0 ? 1 : 0,
@@ -2790,7 +2797,7 @@ static int lpc17_dma_alloc(struct lpc17_usbhost_s *priv,
 
       if (buflen > CONFIG_USBHOST_IOBUFSIZE)
         {
-          uvdbg("buflen (%d) > IO buffer size (%d)\n",
+          uinfo("buflen (%d) > IO buffer size (%d)\n",
                  buflen, CONFIG_USBHOST_IOBUFSIZE);
           return -ENOMEM;
         }
@@ -2800,7 +2807,7 @@ static int lpc17_dma_alloc(struct lpc17_usbhost_s *priv,
       newbuffer = lpc17_allocio();
       if (!newbuffer)
         {
-          uvdbg("IO buffer allocation failed\n");
+          uinfo("IO buffer allocation failed\n");
           return -ENOMEM;
         }
 
@@ -2947,7 +2954,7 @@ static ssize_t lpc17_transfer(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
   xfrinfo = lpc17_alloc_xfrinfo();
   if (xfrinfo == NULL)
     {
-      udbg("ERROR: lpc17_alloc_xfrinfo failed\n");
+      uerr("ERROR: lpc17_alloc_xfrinfo failed\n");
       nbytes = -ENOMEM;
       goto errout_with_sem;
     }
@@ -2966,7 +2973,7 @@ static ssize_t lpc17_transfer(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
   ret = lpc17_dma_alloc(priv, ed, buffer, buflen, &alloc);
   if (ret < 0)
     {
-      udbg("ERROR: lpc17_dma_alloc failed: %d\n", ret);
+      uerr("ERROR: lpc17_dma_alloc failed: %d\n", ret);
       nbytes = (ssize_t)ret;
       goto errout_with_xfrinfo;
     }
@@ -2987,7 +2994,7 @@ static ssize_t lpc17_transfer(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
   ret = lpc17_wdhwait(priv, ed);
   if (ret < 0)
     {
-      udbg("ERROR: Device disconnected\n");
+      uerr("ERROR: Device disconnected\n");
       nbytes = (ssize_t)ret;
       goto errout_with_buffers;
     }
@@ -2997,7 +3004,7 @@ static ssize_t lpc17_transfer(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
   ret = lpc17_transfer_common(priv, ed, buffer, buflen);
   if (ret < 0)
     {
-      udbg("ERROR: lpc17_transfer_common failed: %d\n", ret);
+      uerr("ERROR: lpc17_transfer_common failed: %d\n", ret);
       nbytes = (ssize_t)ret;
       goto errout_with_wdhwait;
     }
@@ -3021,7 +3028,7 @@ static ssize_t lpc17_transfer(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
        * might understand.
        */
 
-      udbg("ERROR: Bad TD completion status: %d\n", xfrinfo->tdstatus);
+      uerr("ERROR: Bad TD completion status: %d\n", xfrinfo->tdstatus);
 
       switch (xfrinfo->tdstatus)
         {
@@ -3111,7 +3118,7 @@ static void lpc17_asynch_completion(struct lpc17_usbhost_s *priv,
        * might understand.
        */
 
-      udbg("ERROR: Bad TD completion status: %d\n", xfrinfo->tdstatus);
+      uerr("ERROR: Bad TD completion status: %d\n", xfrinfo->tdstatus);
 
       switch (xfrinfo->tdstatus)
         {
@@ -3213,7 +3220,7 @@ static int lpc17_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
   xfrinfo = lpc17_alloc_xfrinfo();
   if (xfrinfo == NULL)
     {
-      udbg("ERROR: lpc17_alloc_xfrinfo failed\n");
+      uerr("ERROR: lpc17_alloc_xfrinfo failed\n");
       ret = -ENOMEM;
       goto errout_with_sem;
     }
@@ -3234,7 +3241,7 @@ static int lpc17_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
   ret = lpc17_dma_alloc(priv, ed, buffer, buflen, &xfrinfo->alloc);
   if (ret < 0)
     {
-      udbg("ERROR: lpc17_dma_alloc failed: %d\n", ret);
+      uerr("ERROR: lpc17_dma_alloc failed: %d\n", ret);
       goto errout_with_sem;
     }
 
@@ -3251,7 +3258,7 @@ static int lpc17_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
   ret = lpc17_transfer_common(priv, ed, buffer, buflen);
   if (ret < 0)
     {
-      udbg("ERROR: lpc17_transfer_common failed: %d\n", ret);
+      uerr("ERROR: lpc17_transfer_common failed: %d\n", ret);
       goto errout_with_asynch;
     }
 
@@ -3301,7 +3308,9 @@ errout_with_sem:
 
 static int lpc17_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
 {
+#ifdef CONFIG_USBHOST_ASYNCH
   struct lpc17_usbhost_s *priv = (struct lpc17_usbhost_s *)drvr;
+#endif
   struct lpc17_ed_s *ed = (struct lpc17_ed_s *)ep;
   struct lpc17_gtd_s *td;
   struct lpc17_gtd_s *next;
@@ -3309,7 +3318,7 @@ static int lpc17_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
   uint32_t ctrl;
   irqstate_t flags;
 
-  DEBUGASSERT(priv != NULL && ed != NULL);
+  DEBUGASSERT(drvr != NULL && ed != NULL);
 
   /* These first steps must be atomic as possible */
 
@@ -3454,7 +3463,7 @@ static int lpc17_connect(FAR struct usbhost_driver_s *drvr,
   /* Set the connected/disconnected flag */
 
   hport->connected = connected;
-  ullvdbg("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
+  uinfo("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
 
   /* Report the connection event */
 
@@ -3635,6 +3644,12 @@ struct usbhost_connection_s *lpc17_usbhost_initialize(int controller)
   sem_init(&priv->pscsem,  0, 0);
   sem_init(&priv->exclsem, 0, 1);
 
+  /* The pscsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->pscsem, SEM_PRIO_NONE);
+
 #ifndef CONFIG_USBHOST_INT_DISABLE
   priv->ininterval  = MAX_PERINTERVAL;
   priv->outinterval = MAX_PERINTERVAL;
@@ -3695,19 +3710,19 @@ struct usbhost_connection_s *lpc17_usbhost_initialize(int controller)
   lpc17_configgpio(GPIO_USB_OVRCR);   /* USB port Over-Current status */
   usbhost_dumpgpio();
 
-  udbg("Initializing Host Stack\n");
+  uinfo("Initializing Host Stack\n");
 
   /* Show AHB SRAM memory map */
 
 #if 0 /* Useful if you have doubts about the layout */
-  uvdbg("AHB SRAM:\n");
-  uvdbg("  HCCA:   %08x %d\n", LPC17_HCCA_BASE,   LPC17_HCCA_SIZE);
-  uvdbg("  TDTAIL: %08x %d\n", LPC17_TDTAIL_ADDR, LPC17_TD_SIZE);
-  uvdbg("  EDCTRL: %08x %d\n", LPC17_EDCTRL_ADDR, LPC17_ED_SIZE);
-  uvdbg("  EDFREE: %08x %d\n", LPC17_EDFREE_BASE, LPC17_ED_SIZE);
-  uvdbg("  TDFREE: %08x %d\n", LPC17_TDFREE_BASE, LPC17_EDFREE_SIZE);
-  uvdbg("  TBFREE: %08x %d\n", LPC17_TBFREE_BASE, LPC17_TBFREE_SIZE);
-  uvdbg("  IOFREE: %08x %d\n", LPC17_IOFREE_BASE, LPC17_IOBUFFERS * CONFIG_USBHOST_IOBUFSIZE);
+  uinfo("AHB SRAM:\n");
+  uinfo("  HCCA:   %08x %d\n", LPC17_HCCA_BASE,   LPC17_HCCA_SIZE);
+  uinfo("  TDTAIL: %08x %d\n", LPC17_TDTAIL_ADDR, LPC17_TD_SIZE);
+  uinfo("  EDCTRL: %08x %d\n", LPC17_EDCTRL_ADDR, LPC17_ED_SIZE);
+  uinfo("  EDFREE: %08x %d\n", LPC17_EDFREE_BASE, LPC17_ED_SIZE);
+  uinfo("  TDFREE: %08x %d\n", LPC17_TDFREE_BASE, LPC17_EDFREE_SIZE);
+  uinfo("  TBFREE: %08x %d\n", LPC17_TBFREE_BASE, LPC17_TBFREE_SIZE);
+  uinfo("  IOFREE: %08x %d\n", LPC17_IOFREE_BASE, LPC17_IOBUFFERS * CONFIG_USBHOST_IOBUFSIZE);
 #endif
 
   /* Initialize all the TDs, EDs and HCCA to 0 */
@@ -3715,7 +3730,13 @@ struct usbhost_connection_s *lpc17_usbhost_initialize(int controller)
   memset((void *)HCCA,   0, sizeof(struct ohci_hcca_s));
   memset((void *)TDTAIL, 0, sizeof(struct ohci_gtd_s));
   memset((void *)EDCTRL, 0, sizeof(struct lpc17_ed_s));
+
+  /* The EDCTRL wdhsem semaphore is used for signaling and, hence, should
+   * not have priority inheritance enabled.
+   */
+
   sem_init(&EDCTRL->wdhsem, 0, 0);
+  sem_setprotocol(&EDCTRL->wdhsem, SEM_PRIO_NONE);
 
   /* Initialize user-configurable EDs */
 
@@ -3823,9 +3844,9 @@ struct usbhost_connection_s *lpc17_usbhost_initialize(int controller)
 
   /* Attach USB host controller interrupt handler */
 
-  if (irq_attach(LPC17_IRQ_USB, lpc17_usbinterrupt) != 0)
+  if (irq_attach(LPC17_IRQ_USB, lpc17_usbinterrupt, NULL) != 0)
     {
-      udbg("Failed to attach IRQ\n");
+      uerr("ERROR: Failed to attach IRQ\n");
       return NULL;
     }
 
@@ -3850,8 +3871,8 @@ struct usbhost_connection_s *lpc17_usbhost_initialize(int controller)
   /* Enable interrupts at the interrupt controller */
 
   up_enable_irq(LPC17_IRQ_USB); /* enable USB interrupt */
-  udbg("USB host Initialized, Device connected:%s\n",
-       priv->connected ? "YES" : "NO");
+  uinfo("USB host Initialized, Device connected:%s\n",
+        priv->connected ? "YES" : "NO");
 
   return &g_usbconn;
 }
diff --git a/arch/arm/src/lpc214x/Kconfig b/arch/arm/src/lpc214x/Kconfig
index 68926095cf0deb8d235805575f08c988e03c1c74..a9fc00c245e5beaa0baba9e763fbcf451da98d93 100644
--- a/arch/arm/src/lpc214x/Kconfig
+++ b/arch/arm/src/lpc214x/Kconfig
@@ -140,7 +140,7 @@ config LPC214X_USBDEV_FRAME_INTERRUPT
 config LPC214X_USBDEV_REGDEBUG
 	bool "USB Device Register-Level Debug Output"
 	default n
-	depends on DEBUG
+	depends on DEBUG_FEATURES
 
 endmenu
 endif
diff --git a/arch/arm/src/lpc214x/Make.defs b/arch/arm/src/lpc214x/Make.defs
index ea9bc404490995922f052d84e9bd094fe85f0e76..d29207e9273000b9e9129c0940243d514a441224 100644
--- a/arch/arm/src/lpc214x/Make.defs
+++ b/arch/arm/src/lpc214x/Make.defs
@@ -50,12 +50,6 @@ ifneq ($(CONFIG_DISABLE_SIGNALS),y)
 CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c
 endif
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c
-endif
-
 ifeq ($(CONFIG_STACK_COLORATION),y)
 CMN_CSRCS += up_checkstack.c
 endif
diff --git a/arch/arm/src/lpc214x/chip.h b/arch/arm/src/lpc214x/chip.h
index c0af01c4475e4fe62e74a518da5bb37f1c0f1031..1e7c8b219bc4890ce1ebb4ff8bb89718c507e57d 100644
--- a/arch/arm/src/lpc214x/chip.h
+++ b/arch/arm/src/lpc214x/chip.h
@@ -33,8 +33,8 @@
  *
  ****************************************************************************************************/
 
-#ifndef __LPC214X_CHIP_H
-#define __LPC214X_CHIP_H
+#ifndef __ARCH_ARM_SRC_LPC214X_CHIP_H
+#define __ARCH_ARM_SRC_LPC214X_CHIP_H
 
 /****************************************************************************************************
  * Included Files
@@ -346,4 +346,4 @@
  * Public Function Prototypes
  ****************************************************************************************************/
 
-#endif  /* __LPC214X_CHIP_H */
+#endif  /* __ARCH_ARM_SRC_LPC214X_CHIP_H */
diff --git a/arch/arm/src/lpc214x/lpc214x_apb.h b/arch/arm/src/lpc214x/lpc214x_apb.h
index e76fa5754a635b8604bafe0fcc1459aa6361ee48..93f9ebdf7aed3e2383e44ecc377e411fbd151f07 100644
--- a/arch/arm/src/lpc214x/lpc214x_apb.h
+++ b/arch/arm/src/lpc214x/lpc214x_apb.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef _ARCH_ARM_SRC_LPC214X_APB_H
-#define _ARCH_ARM_SRC_LPC214X_APB_H
+#ifndef __ARCH_ARM_SRC_LPC214X_LPC214X_APB_H
+#define __ARCH_ARM_SRC_LPC214X_LPC214X_APB_H
 
 /************************************************************************************
  * Included Files
@@ -69,4 +69,4 @@
  * Public Function Prototypes
  ************************************************************************************/
 
-#endif  /* _ARCH_ARM_SRC_LPC214X_APB_H */
+#endif  /* __ARCH_ARM_SRC_LPC214X_LPC214X_APB_H */
diff --git a/arch/arm/src/lpc214x/lpc214x_decodeirq.c b/arch/arm/src/lpc214x/lpc214x_decodeirq.c
index 382c0bba022a949b9b37ce894b4073f13d821580..331fea560ebcdf2e9434806fc8a4c86d1f1c3bf6 100644
--- a/arch/arm/src/lpc214x/lpc214x_decodeirq.c
+++ b/arch/arm/src/lpc214x/lpc214x_decodeirq.c
@@ -111,8 +111,8 @@ static void lpc214x_decodeirq(uint32_t *regs)
 #endif
 {
 #ifdef CONFIG_SUPPRESS_INTERRUPTS
-  lowsyslog(LOG_ERR, "Unexpected IRQ\n");
   CURRENT_REGS = regs;
+  err("ERROR: Unexpected IRQ\n");
   PANIC();
 #else
 
diff --git a/arch/arm/src/lpc214x/lpc214x_head.S b/arch/arm/src/lpc214x/lpc214x_head.S
index 8db27f29ebde0131b6debe98baf61c91b2c28949..c0d6c7651005064685c3af454ee3866ac941e9d1 100644
--- a/arch/arm/src/lpc214x/lpc214x_head.S
+++ b/arch/arm/src/lpc214x/lpc214x_head.S
@@ -280,7 +280,7 @@
  */
 
 	.macro	showprogress, code
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 	mov	r0, #\code
 	bl	up_lowputc
 #endif
diff --git a/arch/arm/src/lpc214x/lpc214x_i2c.h b/arch/arm/src/lpc214x/lpc214x_i2c.h
index 35fcc00f7ea4e900473ee44c5533fb06f7df4b10..d12f1ff4eec5a0505d63c83228fbd941e0591050 100644
--- a/arch/arm/src/lpc214x/lpc214x_i2c.h
+++ b/arch/arm/src/lpc214x/lpc214x_i2c.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef _ARCH_ARM_SRC_LPC214X_I2C_H
-#define _ARCH_ARM_SRC_LPC214X_I2C_H
+#ifndef __ARCH_ARM_SRC_LPC214X_LPC214X_I2C_H
+#define __ARCH_ARM_SRC_LPC214X_LPC214X_I2C_H
 
 /************************************************************************************
  * Included Files
@@ -138,4 +138,4 @@
  * Public Function Prototypes
  ************************************************************************************/
 
-#endif  /* _ARCH_ARM_SRC_LPC214X_I2C_H */
+#endif  /* __ARCH_ARM_SRC_LPC214X_LPC214X_I2C_H */
diff --git a/arch/arm/src/lpc214x/lpc214x_pinsel.h b/arch/arm/src/lpc214x/lpc214x_pinsel.h
index 21c6c2f9db58fed41931f2087fd67d02605853d5..0cb2c58f9bf1ee67fe4c1f6128ee08739008b6aa 100644
--- a/arch/arm/src/lpc214x/lpc214x_pinsel.h
+++ b/arch/arm/src/lpc214x/lpc214x_pinsel.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef _ARCH_ARM_SRC_LPC214X_PINSEL_H
-#define _ARCH_ARM_SRC_LPC214X_PINSEL_H
+#ifndef __ARCH_ARM_SRC_LPC214X_LPC214X_PINSEL_H
+#define __ARCH_ARM_SRC_LPC214X_LPC214X_PINSEL_H
 
 /************************************************************************************
  * Included Files
@@ -256,4 +256,4 @@
  * Public Function Prototypes
  ************************************************************************************/
 
-#endif  /* _ARCH_ARM_SRC_LPC214X_PINSEL_H */
+#endif  /* __ARCH_ARM_SRC_LPC214X_LPC214X_PINSEL_H */
diff --git a/arch/arm/src/lpc214x/lpc214x_pll.h b/arch/arm/src/lpc214x/lpc214x_pll.h
index 4e19bcdc11c05a89df0bbff9bc798181fa48a18d..f8f9a25ad8ee44d797c0b3853a0bc9ce5cbb05f0 100644
--- a/arch/arm/src/lpc214x/lpc214x_pll.h
+++ b/arch/arm/src/lpc214x/lpc214x_pll.h
@@ -33,8 +33,8 @@
  *
  ****************************************************************************************************/
 
-#ifndef _ARCH_ARM_SRC_LPC214X_PLL_H
-#define _ARCH_ARM_SRC_LPC214X_PLL_H
+#ifndef __ARCH_ARM_SRC_LPC214X_LPC214X_PLL_H
+#define __ARCH_ARM_SRC_LPC214X_LPC214X_PLL_H
 
 /****************************************************************************************************
  * Included Files
@@ -102,4 +102,4 @@
  * Public Function Prototypes
  ****************************************************************************************************/
 
-#endif  /* _ARCH_ARM_SRC_LPC214X_PLL_H */
+#endif  /* __ARCH_ARM_SRC_LPC214X_LPC214X_PLL_H */
diff --git a/arch/arm/src/lpc214x/lpc214x_power.h b/arch/arm/src/lpc214x/lpc214x_power.h
index 699af8d59053d3551edfc0467fc732343238f61b..09d89c92ceaa215e2e09b1b6c00aeca15ec39868 100644
--- a/arch/arm/src/lpc214x/lpc214x_power.h
+++ b/arch/arm/src/lpc214x/lpc214x_power.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef _ARCH_ARM_SRC_LPC214X_POWER_H
-#define _ARCH_ARM_SRC_LPC214X_POWER_H
+#ifndef __ARCH_ARM_SRC_LPC214X_LPC214X_POWER_H
+#define __ARCH_ARM_SRC_LPC214X_LPC214X_POWER_H
 
 /************************************************************************************
  * Included Files
@@ -87,4 +87,4 @@
  * Public Function Prototypes
  ************************************************************************************/
 
-#endif  /* _ARCH_ARM_SRC_LPC214X_POWER_H */
+#endif  /* __ARCH_ARM_SRC_LPC214X_LPC214X_POWER_H */
diff --git a/arch/arm/src/lpc214x/lpc214x_serial.c b/arch/arm/src/lpc214x/lpc214x_serial.c
index 62b18ecfe35d4a89935de94b3c94922b961673a8..92675a538be971ee9c5731128b1bfbcd2e4d3ecd 100644
--- a/arch/arm/src/lpc214x/lpc214x_serial.c
+++ b/arch/arm/src/lpc214x/lpc214x_serial.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/lpc214x/lpc214x_serial.c
  *
- *   Copyright (C) 2007-2009, 2012-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2012-2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -88,7 +88,7 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-static int  up_interrupt(int irq, void *context);
+static int  up_interrupt(int irq, void *context, void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  up_receive(struct uart_dev_s *dev, uint32_t *status);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
@@ -413,7 +413,7 @@ static int up_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, up_interrupt);
+  ret = irq_attach(priv->irq, up_interrupt, dev);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
@@ -456,25 +456,14 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_interrupt(int irq, void *context)
+static int up_interrupt(int irq, void *context, void *arg)
 {
-  struct uart_dev_s *dev = NULL;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct up_dev_s   *priv;
   uint8_t            status;
   int                passes;
 
-  if (g_uart1priv.irq == irq)
-    {
-      dev = &g_uart1port;
-    }
-  else if (g_uart0priv.irq == irq)
-    {
-      dev = &g_uart0port;
-    }
-  else
-    {
-      PANIC();
-    }
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct up_dev_s *)dev->priv;
 
   /* Loop until there are no characters to be transferred or,
@@ -530,7 +519,7 @@ static int up_interrupt(int irq, void *context)
               /* Read the modem status register (MSR) to clear */
 
               status = up_serialin(priv, LPC214X_UART_MSR_OFFSET);
-              vdbg("MSR: %02x\n", status);
+              _info("MSR: %02x\n", status);
               break;
             }
 
@@ -541,7 +530,7 @@ static int up_interrupt(int irq, void *context)
               /* Read the line status register (LSR) to clear */
 
               status = up_serialin(priv, LPC214X_UART_LSR_OFFSET);
-              vdbg("LSR: %02x\n", status);
+              _info("LSR: %02x\n", status);
               break;
             }
 
@@ -549,7 +538,7 @@ static int up_interrupt(int irq, void *context)
 
           default:
             {
-              dbg("Unexpected IIR: %02x\n", status);
+              _err("ERROR: Unexpected IIR: %02x\n", status);
               break;
             }
         }
diff --git a/arch/arm/src/lpc214x/lpc214x_spi.h b/arch/arm/src/lpc214x/lpc214x_spi.h
index 97e2fc7a58fce645de655604c7fef40cf0aede53..69c94d89c0fc782290a96290d4c434e7fe0bbbb2 100644
--- a/arch/arm/src/lpc214x/lpc214x_spi.h
+++ b/arch/arm/src/lpc214x/lpc214x_spi.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef _ARCH_ARM_SRC_LPC214X_SPI_H
-#define _ARCH_ARM_SRC_LPC214X_SPI_H
+#ifndef __ARCH_ARM_SRC_LPC214X_LPC214X_SPI_H
+#define __ARCH_ARM_SRC_LPC214X_LPC214X_SPI_H
 
 /************************************************************************************
  * Included Files
@@ -181,4 +181,4 @@ struct spi_dev_s; /* Forward reference */
 
 FAR struct spi_dev_s *lpc214x_spibus_initialize(int port);
 
-#endif  /* _ARCH_ARM_SRC_LPC214X_SPI_H */
+#endif  /* __ARCH_ARM_SRC_LPC214X_LPC214X_SPI_H */
diff --git a/arch/arm/src/lpc214x/lpc214x_timer.h b/arch/arm/src/lpc214x/lpc214x_timer.h
index 224e608f3e96948a1e402a03ae03df9691411ceb..df0287d4495362da0b75b8b5fd9388b6a613a670 100644
--- a/arch/arm/src/lpc214x/lpc214x_timer.h
+++ b/arch/arm/src/lpc214x/lpc214x_timer.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __LPC214X_TIMER_H
-#define __LPC214X_TIMER_H
+#ifndef __ARCH_ARM_SRC_LPC214X_LPC214X_TIMER_H
+#define __ARCH_ARM_SRC_LPC214X_LPC214X_TIMER_H
 
 /************************************************************************************
  * Included Files
@@ -149,4 +149,4 @@
  * Public Function Prototypes
  ************************************************************************************/
 
-#endif  /* __LPC214X_TIMER_H */
+#endif  /* __ARCH_ARM_SRC_LPC214X_LPC214X_TIMER_H */
diff --git a/arch/arm/src/lpc214x/lpc214x_timerisr.c b/arch/arm/src/lpc214x/lpc214x_timerisr.c
index 24defd5a52db90233cf812e9b051bece1ef5ba1f..1d756d37d64ce3c6d972fb3f725d373ec9d7bf5e 100644
--- a/arch/arm/src/lpc214x/lpc214x_timerisr.c
+++ b/arch/arm/src/lpc214x/lpc214x_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/lpc214x/lpc214x_timerisr.c
  *
- *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -72,19 +72,11 @@
 #define tmr_putreg32(v,o) putreg32((v), LPC214X_TMR0_BASE+(o))
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  lpc214x_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for
@@ -93,9 +85,9 @@
  ****************************************************************************/
 
 #ifdef CONFIG_VECTORED_INTERRUPTS
-int up_timerisr(uint32_t *regs)
+static int lpc214x_timerisr(uint32_t *regs)
 #else
-int up_timerisr(int irq, uint32_t *regs)
+static int lpc214x_timerisr(int irq, uint32_t *regs, void *arg)
 #endif
 {
   /* Process timer interrupt */
@@ -115,7 +107,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -123,7 +119,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint16_t mcr;
 
@@ -158,9 +154,10 @@ void up_timer_initialize(void)
   /* Attach the timer interrupt vector */
 
 #ifdef CONFIG_VECTORED_INTERRUPTS
-  up_attach_vector(LPC214X_IRQ_SYSTIMER, LPC214X_SYSTIMER_VEC, (vic_vector_t)up_timerisr);
+  up_attach_vector(LPC214X_IRQ_SYSTIMER, LPC214X_SYSTIMER_VEC,
+                   (vic_vector_t)lpc214x_timerisr);
 #else
-  (void)irq_attach(LPC214X_IRQ_SYSTIMER, (xcpt_t)up_timerisr);
+  (void)irq_attach(LPC214X_IRQ_SYSTIMER, (xcpt_t)lpc214x_timerisr, NULL);
 #endif
 
   /* And enable the timer interrupt */
diff --git a/arch/arm/src/lpc214x/lpc214x_uart.h b/arch/arm/src/lpc214x/lpc214x_uart.h
index c4c90c166926ef02998d8128b0d3865ab17d2b6d..3c85c3a065af885bf26e2b7108e56a4825a7fc97 100644
--- a/arch/arm/src/lpc214x/lpc214x_uart.h
+++ b/arch/arm/src/lpc214x/lpc214x_uart.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __LPC214X_UART_H
-#define __LPC214X_UART_H
+#ifndef __ARCH_ARM_SRC_LPC214X_LPC214X_UART_H
+#define __ARCH_ARM_SRC_LPC214X_LPC214X_UART_H
 
 /************************************************************************************
  * Included Files
@@ -139,4 +139,4 @@
  * Public Function Prototypes
  ************************************************************************************/
 
-#endif  /* __LPC214X_UART_H */
+#endif  /* __ARCH_ARM_SRC_LPC214X_LPC214X_UART_H */
diff --git a/arch/arm/src/lpc214x/lpc214x_usbdev.c b/arch/arm/src/lpc214x/lpc214x_usbdev.c
index 5c058a6bc3b297353ab3cfd76311a76ca3ca6b98..c39324dc5ae7c0610d8823ccfee11aae4c313c1a 100644
--- a/arch/arm/src/lpc214x/lpc214x_usbdev.c
+++ b/arch/arm/src/lpc214x/lpc214x_usbdev.c
@@ -104,7 +104,7 @@
 #  define USB_FRAME_INT 0
 #endif
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 #  define USB_ERROR_INT USBDEV_DEVINT_EPRINT
 #else
 #  define USB_ERROR_INT 0
@@ -382,7 +382,7 @@ struct lpc214x_usbdev_s
 
 /* Register operations ********************************************************/
 
-#if defined(CONFIG_LPC214X_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_LPC214X_USBDEV_REGDEBUG
 static uint32_t lpc214x_getreg(uint32_t addr);
 static void lpc214x_putreg(uint32_t val, uint32_t addr);
 #else
@@ -428,7 +428,7 @@ static void lpc214x_dispatchrequest(struct lpc214x_usbdev_s *priv,
 static inline void lpc214x_ep0setup(struct lpc214x_usbdev_s *priv);
 static inline void lpc214x_ep0dataoutinterrupt(struct lpc214x_usbdev_s *priv);
 static inline void lpc214x_ep0dataininterrupt(struct lpc214x_usbdev_s *priv);
-static int lpc214x_usbinterrupt(int irq, FAR void *context);
+static int lpc214x_usbinterrupt(int irq, FAR void *context, FAR void *arg);
 
 #ifdef CONFIG_LPC214X_USBDEV_DMA
 static int  lpc214x_dmasetup(struct lpc214x_usbdev_s *priv, uint8_t epphy,
@@ -518,7 +518,7 @@ static const struct usbdev_ops_s g_devops =
  *
  ****************************************************************************/
 
-#if defined(CONFIG_LPC214X_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_LPC214X_USBDEV_REGDEBUG
 static uint32_t lpc214x_getreg(uint32_t addr)
 {
   static uint32_t prevaddr = 0;
@@ -539,7 +539,7 @@ static uint32_t lpc214x_getreg(uint32_t addr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              uinfo("...\n");
             }
 
           return val;
@@ -556,7 +556,7 @@ static uint32_t lpc214x_getreg(uint32_t addr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          uinfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -568,7 +568,7 @@ static uint32_t lpc214x_getreg(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%08x\n", addr, val);
+  uinfo("%08x->%08x\n", addr, val);
   return val;
 }
 #endif
@@ -581,12 +581,12 @@ static uint32_t lpc214x_getreg(uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_LPC214X_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_LPC214X_USBDEV_REGDEBUG
 static void lpc214x_putreg(uint32_t val, uint32_t addr)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", addr, val);
+  uinfo("%08x<-%08x\n", addr, val);
 
   /* Write the value */
 
@@ -1021,8 +1021,9 @@ static int lpc214x_wrrequest(struct lpc214x_ep_s *privep)
       return OK;
     }
 
-  ullvdbg("epphy=%d req=%p: len=%d xfrd=%d nullpkt=%d\n",
-          privep->epphy, privreq, privreq->req.len, privreq->req.xfrd, privep->txnullpkt);
+  uinfo("epphy=%d req=%p: len=%d xfrd=%d nullpkt=%d\n",
+        privep->epphy, privreq, privreq->req.len, privreq->req.xfrd,
+        privep->txnullpkt);
 
   /* Ignore any attempt to send a zero length packet on anything but EP0IN */
 
@@ -1130,8 +1131,8 @@ static int lpc214x_rdrequest(struct lpc214x_ep_s *privep)
       return OK;
     }
 
-  ullvdbg("len=%d xfrd=%d nullpkt=%d\n",
-          privreq->req.len, privreq->req.xfrd, privep->txnullpkt);
+  uinfo("len=%d xfrd=%d nullpkt=%d\n",
+        privreq->req.len, privreq->req.xfrd, privep->txnullpkt);
 
   /* Ignore any attempt to receive a zero length packet */
 
@@ -1552,8 +1553,8 @@ static inline void lpc214x_ep0setup(struct lpc214x_usbdev_s *priv)
   index = GETUINT16(ctrl.index);
   len   = GETUINT16(ctrl.len);
 
-  ullvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
-          ctrl.type, ctrl.req, value, index, len);
+  uinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+        ctrl.type, ctrl.req, value, index, len);
 
   /* Dispatch any non-standard requests */
 
@@ -1697,7 +1698,7 @@ static inline void lpc214x_ep0setup(struct lpc214x_usbdev_s *priv)
         if (((ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE) &&
             value == USB_FEATURE_TESTMODE)
           {
-            ullvdbg("test mode: %d\n", index);
+            uinfo("test mode: %d\n", index);
           }
         else if ((ctrl.type & USB_REQ_RECIPIENT_MASK) != USB_REQ_RECIPIENT_ENDPOINT)
           {
@@ -2013,7 +2014,7 @@ static inline void lpc214x_ep0dataininterrupt(struct lpc214x_usbdev_s *priv)
  *
  ****************************************************************************/
 
-static int lpc214x_usbinterrupt(int irq, FAR void *context)
+static int lpc214x_usbinterrupt(int irq, FAR void *context, FAR void *arg)
 {
   struct lpc214x_usbdev_s *priv = &g_usbdev;
   struct lpc214x_ep_s *privep ;
@@ -2055,7 +2056,7 @@ static int lpc214x_usbinterrupt(int irq, FAR void *context)
 
 #endif
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       /* USB engine error interrupt */
 
       if ((devintstatus & USBDEV_DEVINT_EPRINT))
@@ -2287,7 +2288,7 @@ static int lpc214x_usbinterrupt(int irq, FAR void *context)
                                 }
                               else
                                 {
-                                  ullvdbg("Pending data on OUT endpoint\n");
+                                  uinfo("Pending data on OUT endpoint\n");
                                   priv->rxpending = 1;
                                 }
                             }
@@ -2378,7 +2379,7 @@ static int lpc214x_dmasetup(struct lpc214x_usbdev_s *priv, uint8_t epphy,
   struct lpc214x_dmadesc_s *dmadesc = priv;
   uint32_t reg;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv || epphy < 2)
     {
       usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_INVALIDPARMS), 0);
@@ -2577,7 +2578,7 @@ static int lpc214x_epdisable(FAR struct usbdev_ep_s *ep)
   uint32_t mask = (1 << privep->epphy);
   uint32_t reg;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_INVALIDPARMS), 0);
@@ -2619,7 +2620,7 @@ static FAR struct usbdev_req_s *lpc214x_epallocreq(FAR struct usbdev_ep_s *ep)
 {
   FAR struct lpc214x_req_s *privreq;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_INVALIDPARMS), 0);
@@ -2651,7 +2652,7 @@ static void lpc214x_epfreereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_
 {
   FAR struct lpc214x_req_s *privreq = (FAR struct lpc214x_req_s *)req;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_INVALIDPARMS), 0);
@@ -2759,11 +2760,12 @@ static int lpc214x_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
   irqstate_t flags;
   int ret = OK;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!req || !req->callback || !req->buf || !ep)
     {
       usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_INVALIDPARMS), 0);
-      ullvdbg("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+      uinfo("req=%p callback=%p buf=%p ep=%p\n",
+            req, req->callback, req->buf, ep);
       return -EINVAL;
     }
 #endif
@@ -2844,7 +2846,7 @@ static int lpc214x_epcancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
   FAR struct lpc214x_ep_s *privep = (FAR struct lpc214x_ep_s *)ep;
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_INVALIDPARMS), 0);
@@ -3107,7 +3109,7 @@ static int lpc214x_selfpowered(struct usbdev_s *dev, bool selfpowered)
 
   usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_INVALIDPARMS), 0);
@@ -3233,7 +3235,7 @@ void up_usbinitialize(void)
 
   /* Attach USB controller interrupt handler */
 
-  if (irq_attach(LPC214X_USB_IRQ, lpc214x_usbinterrupt) != 0)
+  if (irq_attach(LPC214X_USB_IRQ, lpc214x_usbinterrupt, NULL) != 0)
     {
       usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_IRQREGISTRATION),
                (uint16_t)LPC214X_USB_IRQ);
@@ -3322,7 +3324,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
 
   usbtrace(TRACE_DEVREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !driver->ops->bind || !driver->ops->unbind ||
       !driver->ops->disconnect || !driver->ops->setup)
     {
@@ -3372,7 +3374,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
 {
   usbtrace(TRACE_DEVUNREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (driver != g_usbdev.driver)
     {
       usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/lpc214x/lpc214x_vic.h b/arch/arm/src/lpc214x/lpc214x_vic.h
index 89a5f7b13f8200175d115bacd5e8fdd71d2528e9..4f3b821a8414c74e9b266e1a77974d74de3f88e5 100644
--- a/arch/arm/src/lpc214x/lpc214x_vic.h
+++ b/arch/arm/src/lpc214x/lpc214x_vic.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __LPC214X_VIC_H
-#define __LPC214X_VIC_H
+#ifndef __ARCH_ARM_SRC_LPC214X_LPC214X_VIC_H
+#define __ARCH_ARM_SRC_LPC214X_LPC214X_VIC_H
 
 /************************************************************************************
  * Included Files
@@ -67,4 +67,4 @@
  * Public Function Prototypes
  ************************************************************************************/
 
-#endif  /* __LPC214X_VIC_H */
+#endif  /* __ARCH_ARM_SRC_LPC214X_LPC214X_VIC_H */
diff --git a/arch/arm/src/lpc2378/Kconfig b/arch/arm/src/lpc2378/Kconfig
index 08197970c66441ba32757d370888ef34abbf7406..eb9cba75701bf43af424c84e4c63e2ca32329783 100644
--- a/arch/arm/src/lpc2378/Kconfig
+++ b/arch/arm/src/lpc2378/Kconfig
@@ -185,7 +185,7 @@ config LPC2378_USBDEV_FRAME_INTERRUPT
 config LPC2378_USBDEV_REGDEBUG
 	bool "USB Device Register-Level Debug Output"
 	default n
-	depends on DEBUG
+	depends on DEBUG_FEATURES
 
 endmenu
 endif
diff --git a/arch/arm/src/lpc2378/Make.defs b/arch/arm/src/lpc2378/Make.defs
index a79ce91ddd92c3b2e9797118277d5d1ed796249a..4926d02c74c1b75a7bf013a8ac82e2e48f58f9ea 100644
--- a/arch/arm/src/lpc2378/Make.defs
+++ b/arch/arm/src/lpc2378/Make.defs
@@ -54,12 +54,6 @@ ifneq ($(CONFIG_DISABLE_SIGNALS),y)
 CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c
 endif
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c
-endif
-
 ifeq ($(CONFIG_STACK_COLORATION),y)
 CMN_CSRCS += up_checkstack.c
 endif
diff --git a/arch/arm/src/lpc2378/chip.h b/arch/arm/src/lpc2378/chip.h
index b8b8b70c85a38bf51a1d98602ca31f0aad4806d7..1f213eaeabd749d4ae6975860f3047738fcb2ac3 100644
--- a/arch/arm/src/lpc2378/chip.h
+++ b/arch/arm/src/lpc2378/chip.h
@@ -38,8 +38,8 @@
  *
  ****************************************************************************************************/
 
-#ifndef _ARCH_ARM_SRC_LPC2378_CHIP_H
-#define _ARCH_ARM_SRC_LPC2378_CHIP_H
+#ifndef __ARCH_ARM_SRC_LPC2378_CHIP_H
+#define __ARCH_ARM_SRC_LPC2378_CHIP_H
 
 /****************************************************************************************************
  * Included Files
@@ -1003,4 +1003,4 @@ are for LPC24xx only. */
  * Public Function Prototypes
  ****************************************************************************************************/
 
-#endif  /* _ARCH_ARM_SRC_LPC2378_CHIP_H */
+#endif  /* __ARCH_ARM_SRC_LPC2378_CHIP_H */
diff --git a/arch/arm/src/lpc2378/lpc2378.h b/arch/arm/src/lpc2378/lpc2378.h
index 0c7fccede9152d9922905f75ec11ac6ddc87c918..1e40b228d0d591d598f2bb6411ad156b5fc8ce47 100644
--- a/arch/arm/src/lpc2378/lpc2378.h
+++ b/arch/arm/src/lpc2378/lpc2378.h
@@ -38,8 +38,8 @@
  *
  ****************************************************************************************************/
 
-#ifndef _ARCH_ARM_SRC_LPC2378_INTERNAL_H
-#define _ARCH_ARM_SRC_LPC2378_INTERNAL_H
+#ifndef __ARCH_ARM_SRC_LPC2378_LPC23XX_H
+#define __ARCH_ARM_SRC_LPC2378_LPC23XX_H
 
 /****************************************************************************************************
  * Included Files
@@ -67,4 +67,4 @@ void lpc2378_statledon(void);
 
 #endif
 
-#endif /* _ARCH_ARM_SRC_LPC2378_INTERNAL_H */
+#endif /* __ARCH_ARM_SRC_LPC2378_LPC23XX_H */
diff --git a/arch/arm/src/lpc2378/lpc23xx_decodeirq.c b/arch/arm/src/lpc2378/lpc23xx_decodeirq.c
index aca536e6651cbfdc90d61faea9ef5ff466d99a69..9c0e0b5b76454b495414eede55a329769e396493 100644
--- a/arch/arm/src/lpc2378/lpc23xx_decodeirq.c
+++ b/arch/arm/src/lpc2378/lpc23xx_decodeirq.c
@@ -110,9 +110,9 @@ static void lpc23xx_decodeirq(uint32_t *regs)
 #endif
 {
 #ifdef CONFIG_SUPPRESS_INTERRUPTS
-  lowsyslog(LOG_ERR, "Unexpected IRQ\n");
-  CURRENT_REGS = regs;
   PANIC();
+  err("ERROR: Unexpected IRQ\n");
+  CURRENT_REGS = regs;
 #else
 
   /* Check which IRQ fires */
diff --git a/arch/arm/src/lpc2378/lpc23xx_gpio.h b/arch/arm/src/lpc2378/lpc23xx_gpio.h
index fc920be4e96528bb6de16c59f8d0d61f8618b05a..b8be69660954a5844efc4b0ce785878db5b3080b 100644
--- a/arch/arm/src/lpc2378/lpc23xx_gpio.h
+++ b/arch/arm/src/lpc2378/lpc23xx_gpio.h
@@ -38,8 +38,8 @@
  *
  ************************************************************************************/
 
-#ifndef _ARCH_ARM_SRC_LPC2378_LPC23XX_GPIO_H
-#define _ARCH_ARM_SRC_LPC2378_LPC23XX_GPIO_H
+#ifndef __ARCH_ARM_SRC_LPC2378_LPC23XX_GPIO_H
+#define __ARCH_ARM_SRC_LPC2378_LPC23XX_GPIO_H
 
 /************************************************************************************
  * Included Files
@@ -68,4 +68,4 @@
  * Public Function Prototypes
  ************************************************************************************/
 
-#endif  /* _ARCH_ARM_SRC_LPC2378_LPC23XX_GPIO_H */
+#endif  /* __ARCH_ARM_SRC_LPC2378_LPC23XX_GPIO_H */
diff --git a/arch/arm/src/lpc2378/lpc23xx_head.S b/arch/arm/src/lpc2378/lpc23xx_head.S
index 179b390271c02226308150de9ae423983f223189..551f2d240e7275403bfeeb92b84c81f90bfe93ac 100644
--- a/arch/arm/src/lpc2378/lpc23xx_head.S
+++ b/arch/arm/src/lpc2378/lpc23xx_head.S
@@ -60,7 +60,7 @@
  * modify r0, r1, r2 and r14
  */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 	.macro	showprogress, code
 	mov	r0, #\code
 	bl	up_lowputc
diff --git a/arch/arm/src/lpc2378/lpc23xx_i2c.c b/arch/arm/src/lpc2378/lpc23xx_i2c.c
index 54efbc52c00e04c480665578692c786d0a6521c5..8191179f110eaa411de90fcb3dfc7fd99dc6bbbb 100644
--- a/arch/arm/src/lpc2378/lpc23xx_i2c.c
+++ b/arch/arm/src/lpc2378/lpc23xx_i2c.c
@@ -64,6 +64,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -133,7 +134,7 @@ struct lpc2378_i2cdev_s
 
 static int  lpc2378_i2c_start(struct lpc2378_i2cdev_s *priv);
 static void lpc2378_i2c_stop(struct lpc2378_i2cdev_s *priv);
-static int  lpc2378_i2c_interrupt(int irq, FAR void *context);
+static int  lpc2378_i2c_interrupt(int irq, FAR void *context, FAR void *arg);
 static void lpc2378_i2c_timeout(int argc, uint32_t arg, ...);
 static void lpc2378_i2c_setfrequency(struct lpc2378_i2cdev_s *priv,
               uint32_t frequency);
@@ -295,36 +296,13 @@ static void lpc2378_stopnext(struct lpc2378_i2cdev_s *priv)
  *
  ****************************************************************************/
 
-static int lpc2378_i2c_interrupt(int irq, FAR void *context)
+static int lpc2378_i2c_interrupt(int irq, FAR void *context, FAR void *arg)
 {
-  struct lpc2378_i2cdev_s *priv;
+  struct lpc2378_i2cdev_s *priv = (struct lpc2378_i2cdev_s *)arg;
   struct i2c_msg_s *msg;
   uint32_t state;
 
-#ifdef CONFIG_LPC2378_I2C0
-  if (irq == I2C0_IRQ)
-    {
-      priv = &g_i2c0dev;
-    }
-  else
-#endif
-#ifdef CONFIG_LPC2378_I2C1
-  if (irq == I2C1_IRQ)
-    {
-      priv = &g_i2c1dev;
-    }
-  else
-#endif
-#ifdef CONFIG_LPC2378_I2C2
-  if (irq == I2C2_IRQ)
-    {
-      priv = &g_i2c2dev;
-    }
-  else
-#endif
-    {
-      PANIC();
-    }
+  DEBUGASSERT(priv != NULL);
 
   /* Reference UM10360 19.10.5 */
 
@@ -490,7 +468,7 @@ struct i2c_master_s *lpc2378_i2cbus_initialize(int port)
 
   if (port > 1)
     {
-      dbg("lpc I2C Only support 0,1\n");
+      l2cerr("ERROR: lpc I2C Only support 0,1\n");
       return NULL;
     }
 
@@ -600,9 +578,17 @@ struct i2c_master_s *lpc2378_i2cbus_initialize(int port)
 
   putreg32(I2C_CONSET_I2EN, priv->base + I2C_CONSET_OFFSET);
 
+  /* Initialize semaphores */
+
   sem_init(&priv->mutex, 0, 1);
   sem_init(&priv->wait, 0, 0);
 
+  /* The wait semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->wait, SEM_PRIO_NONE);
+
   /* Allocate a watchdog timer */
 
   priv->timeout = wd_create();
@@ -610,7 +596,7 @@ struct i2c_master_s *lpc2378_i2cbus_initialize(int port)
 
   /* Attach Interrupt Handler */
 
-  irq_attach(priv->irqid, lpc2378_i2c_interrupt);
+  irq_attach(priv->irqid, lpc2378_i2c_interrupt, priv);
 
   /* Enable Interrupt Handler */
 
diff --git a/arch/arm/src/lpc2378/lpc23xx_pinsel.h b/arch/arm/src/lpc2378/lpc23xx_pinsel.h
index 69ad1b749042405b9db94895a2ea233874740ad2..be34810fdc906f6f208a22f93c6365aed16b4138 100644
--- a/arch/arm/src/lpc2378/lpc23xx_pinsel.h
+++ b/arch/arm/src/lpc2378/lpc23xx_pinsel.h
@@ -38,8 +38,8 @@
  *
  ************************************************************************************/
 
-#ifndef _ARCH_ARM_SRC_LPC23XX_PINSEL_H
-#define _ARCH_ARM_SRC_LPC23XX_PINSEL_H
+#ifndef __ARCH_ARM_SRC_LPC2378_LPC23XX_PINSEL_H
+#define __ARCH_ARM_SRC_LPC2378_LPC23XX_PINSEL_H
 
 /************************************************************************************
  * Included Files
@@ -789,4 +789,4 @@
  * Public Function Prototypes
  ************************************************************************************/
 
-#endif  /* _ARCH_ARM_SRC_LPC23XX_PINSEL_H */
+#endif  /* __ARCH_ARM_SRC_LPC2378_LPC23XX_PINSEL_H */
diff --git a/arch/arm/src/lpc2378/lpc23xx_serial.c b/arch/arm/src/lpc2378/lpc23xx_serial.c
index 9650a0827a3b21f490a9977af901f9166cb090b4..c927b07a2c0f6a5827817f6f01c643f87d3bd537 100644
--- a/arch/arm/src/lpc2378/lpc23xx_serial.c
+++ b/arch/arm/src/lpc2378/lpc23xx_serial.c
@@ -96,7 +96,7 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-static int  up_interrupt(int irq, void *context);
+static int  up_interrupt(int irq, void *context, void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  up_receive(struct uart_dev_s *dev, uint32_t * status);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
@@ -320,14 +320,14 @@ static inline void up_configbaud(struct up_dev_s *priv)
   /* Test values calculated for every multiplier/divisor combination */
 
   uint32_t tdiv;
-  uint32_t terr;
+  uint32_t tmperr;
   int tmulval;
   int tdivaddval;
 
   /* Optimal multiplier/divider values */
 
   uint32_t div = 0;
-  uint32_t err = 100000;
+  uint32_t errval = 100000;
   int mulval = 1;
   int divaddval = 0;
 
@@ -350,13 +350,13 @@ static inline void up_configbaud(struct up_dev_s *priv)
 
   /* Try every valid multiplier, tmulval (or until a perfect match is found). */
 
-  for (tmulval = 1; tmulval <= 15 && err > 0; tmulval++)
+  for (tmulval = 1; tmulval <= 15 && errval > 0; tmulval++)
     {
       /* Try every valid pre-scale div, tdivaddval (or until a perfect match is
        * found).
        */
 
-      for (tdivaddval = 0; tdivaddval <= 15 && err > 0; tdivaddval++)
+      for (tdivaddval = 0; tdivaddval <= 15 && errval > 0; tdivaddval++)
         {
           /* Calculate the divisor with these fractional divider settings */
 
@@ -373,16 +373,16 @@ static inline void up_configbaud(struct up_dev_s *priv)
 
               if (actualbaud <= priv->baud)
                 {
-                  terr = priv->baud - actualbaud;
+                  tmperr = priv->baud - actualbaud;
                 }
               else
                 {
-                  terr = actualbaud - priv->baud;
+                  tmperr = actualbaud - priv->baud;
                 }
 
               /* Is this the smallest error we have encountered? */
 
-              if (terr < err)
+              if (tmperr < errval)
                 {
                   /* Yes, save these settings as the new, candidate optimal
                    * settings
@@ -391,7 +391,7 @@ static inline void up_configbaud(struct up_dev_s *priv)
                   mulval = tmulval;
                   divaddval = tdivaddval;
                   div = tdiv;
-                  err = terr;
+                  errval = tmperr;
                 }
             }
         }
@@ -533,7 +533,7 @@ static int up_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, up_interrupt);
+  ret = irq_attach(priv->irq, up_interrupt, dev);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled in the
@@ -581,25 +581,14 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_interrupt(int irq, void *context)
+static int up_interrupt(int irq, void *context, void *arg)
 {
-  struct uart_dev_s *dev = NULL;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct up_dev_s *priv;
   uint8_t status;
   int passes;
 
-  if (g_uart0priv.irq == irq)
-    {
-      dev = &g_uart0port;
-    }
-  else if (g_uart2priv.irq == irq)
-    {
-      dev = &g_uart2port;
-    }
-  else
-    {
-      PANIC();
-    }
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct up_dev_s *)dev->priv;
 
   /* Loop until there are no characters to be transferred or, until we have
@@ -648,7 +637,7 @@ static int up_interrupt(int irq, void *context)
             /* Read the modem status register (MSR) to clear */
 
             status = up_serialin(priv, UART_MSR_OFFSET);
-            vdbg("MSR: %02x\n", status);
+            _info("MSR: %02x\n", status);
             break;
           }
 
@@ -659,7 +648,7 @@ static int up_interrupt(int irq, void *context)
             /* Read the line status register (LSR) to clear */
 
             status = up_serialin(priv, UART_LSR_OFFSET);
-            vdbg("LSR: %02x\n", status);
+            _info("LSR: %02x\n", status);
             break;
           }
 
@@ -667,7 +656,7 @@ static int up_interrupt(int irq, void *context)
 
         default:
           {
-            dbg("Unexpected IIR: %02x\n", status);
+            _err("ERROR: Unexpected IIR: %02x\n", status);
             break;
           }
         }
diff --git a/arch/arm/src/lpc2378/lpc23xx_spi.c b/arch/arm/src/lpc2378/lpc23xx_spi.c
index 42c951c9540eafdca16df6aaef7c56be38da5ab6..cf95f63a8bcdbf4797864ce7d66b0c737160d41e 100644
--- a/arch/arm/src/lpc2378/lpc23xx_spi.c
+++ b/arch/arm/src/lpc2378/lpc23xx_spi.c
@@ -75,21 +75,6 @@
 #  error CONFIG_SPI_EXCHANGE is not supported by this driver
 #endif
 
-/* Debug ********************************************************************/
-/* CONFIG_DEBUG_SPI enables debug output from this file */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /* SPI Clocking.
  *
  * The CPU clock is divided by by 1, 2, 4, or 8 to get the SPI peripheral
@@ -289,7 +274,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
   priv->frequency = frequency;
   priv->actual    = actual;
 
-  spidbg("Frequency %d->%d\n", frequency, actual);
+  spiinfo("Frequency %d->%d\n", frequency, actual);
   return actual;
 }
 
@@ -453,7 +438,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
   FAR uint8_t *ptr = (FAR uint8_t *)buffer;
   uint8_t data;
 
-  spidbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
   while (nwords)
     {
       /* Write the data to transmitted to the SPI Data Register */
@@ -498,7 +483,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
 {
   FAR uint8_t *ptr = (FAR uint8_t *)buffer;
 
-  spidbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
   while (nwords)
     {
       /* Write some dummy data to the SPI Data Register in order to clock the
diff --git a/arch/arm/src/lpc2378/lpc23xx_timerisr.c b/arch/arm/src/lpc2378/lpc23xx_timerisr.c
index 9ff6cf862a03e8113221f5ce7e9c3acf348c87ee..1cbd4b650de545d249097912745128286cc4ece2 100644
--- a/arch/arm/src/lpc2378/lpc23xx_timerisr.c
+++ b/arch/arm/src/lpc2378/lpc23xx_timerisr.c
@@ -81,19 +81,11 @@
 #define T0_TICKS_COUNT      ((CCLK / T0_PCLK_DIV) / TICK_PER_SEC)
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  lpc23xx_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for
@@ -102,9 +94,9 @@
  ****************************************************************************/
 
 #ifdef CONFIG_VECTORED_INTERRUPTS
-int up_timerisr(uint32_t * regs)
+static int lpc23xx_timerisr(uint32_t * regs)
 #else
-int up_timerisr(int irq, uint32_t * regs)
+static int lpc23xx_timerisr(int irq, uint32_t * regs, FAR void *arg)
 #endif
 {
   static uint32_t tick;
@@ -138,7 +130,11 @@ int up_timerisr(int irq, uint32_t * regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -146,7 +142,7 @@ int up_timerisr(int irq, uint32_t * regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint16_t mcr;
 
@@ -191,9 +187,9 @@ void up_timer_initialize(void)
   /* Attach the timer interrupt vector */
 
 #ifdef CONFIG_VECTORED_INTERRUPTS
-  up_attach_vector(IRQ_SYSTIMER, ???, (vic_vector_t) up_timerisr);
+  up_attach_vector(IRQ_SYSTIMER, ???, (vic_vector_t) lpc23xx_timerisr);
 #else
-  (void)irq_attach(IRQ_SYSTIMER, (xcpt_t) up_timerisr);
+  (void)irq_attach(IRQ_SYSTIMER, (xcpt_t)lpc23xx_timerisr, NULL);
 #ifdef CONFIG_ARCH_IRQPRIO
   up_prioritize_irq(IRQ_SYSTIMER, PRIORITY_HIGHEST);
 #endif
diff --git a/arch/arm/src/lpc31xx/Kconfig b/arch/arm/src/lpc31xx/Kconfig
index ffdaa81146074f8e13b6a2ae858a5931459c397b..addeaf16e423c3ed1f96a91d02bda779c014078c 100644
--- a/arch/arm/src/lpc31xx/Kconfig
+++ b/arch/arm/src/lpc31xx/Kconfig
@@ -243,10 +243,11 @@ config LPC31_USBDEV_DMA
 
 config LPC31_USBDEV_REGDEBUG
 	bool "Register level debug"
-	depends on DEBUG
+	depends on DEBUG_USB_INFO
 	default n
 	---help---
-		Output detailed register-level USB device debug information.  Requires also DEBUG.
+		Output detailed register-level USB device debug information.  Requires
+		also CONFIG_DEBUG_USB_INFO.
 
 endmenu # USB device driver controller (DCD) options
 endif # LPC31_USBOTG && USBDEV
@@ -300,7 +301,7 @@ config LPC31_EHCI_PREALLOCATE
 config LPC31_EHCI_REGDEBUG
 	bool "Enable low-level EHCI register debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_USB_INFO
 
 endmenu # USB host controller driver (HCD) options
 endif # LPC31_USBOTG && USBHOST
@@ -309,9 +310,9 @@ menu "SPI device driver options"
 
 config LPC31_SPI_REGDEBUG
 	bool "SPI Register level debug"
-	depends on LPC31_SPI && DEBUG
+	depends on LPC31_SPI && DEBUG_SPI_INFO
 	default n
 	---help---
-		Output detailed register-level SPI device debug information.  Requires also DEBUG.
+		Output detailed register-level SPI device debug information.  Requires also CONFIG_DEBUG_SPI_INFO.
 
 endmenu # SPI device driver options
diff --git a/arch/arm/src/lpc31xx/Make.defs b/arch/arm/src/lpc31xx/Make.defs
index 03c6c0bef6ed87f7a8133cc1e6750d68afd2e82f..0077b22a35b4ba7249d2c3bf34dddcab97e1e2c5 100644
--- a/arch/arm/src/lpc31xx/Make.defs
+++ b/arch/arm/src/lpc31xx/Make.defs
@@ -51,12 +51,6 @@ ifeq ($(CONFIG_PAGING),y)
 CMN_CSRCS += up_pginitialize.c up_checkmapping.c up_allocpage.c up_va2pte.c
 endif
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c
-endif
-
 ifeq ($(CONFIG_STACK_COLORATION),y)
 CMN_CSRCS += up_checkstack.c
 endif
diff --git a/arch/arm/src/lpc31xx/lpc31_cgudrvr.h b/arch/arm/src/lpc31xx/lpc31_cgudrvr.h
index 47a2e3917facff4cc17035eed122866235f42b70..8fbe96b88bf2b09fea47e9750f4c0472be2d921c 100644
--- a/arch/arm/src/lpc31xx/lpc31_cgudrvr.h
+++ b/arch/arm/src/lpc31xx/lpc31_cgudrvr.h
@@ -672,7 +672,7 @@ void lpc31_setfdiv(enum lpc31_domainid_e dmnid, enum lpc31_clockid_e clkid,
  *
  **************************************************************************************************/
 
-void lpc31_pllconfig(const struct lpc31_pllconfig_s * const cfg);
+void lpc31_pllconfig(const struct lpc31_pllconfig_s *const cfg);
 
 /**********************************************************************************************
  * Name: lpc31_hp0pllconfig
diff --git a/arch/arm/src/lpc31xx/lpc31_decodeirq.c b/arch/arm/src/lpc31xx/lpc31_decodeirq.c
index 9cfcd3f44353ad25f65f716c4265b823d89e7134..a4f7a11628fa92fc452f77eec4e382c3148e2004 100644
--- a/arch/arm/src/lpc31xx/lpc31_decodeirq.c
+++ b/arch/arm/src/lpc31xx/lpc31_decodeirq.c
@@ -76,8 +76,8 @@
 void up_decodeirq(uint32_t *regs)
 {
 #ifdef CONFIG_SUPPRESS_INTERRUPTS
-  lowsyslog(LOG_ERR, "Unexpected IRQ\n");
   CURRENT_REGS = regs;
+  err("ERROR: Unexpected IRQ\n");
   PANIC();
 #else
   int index;
diff --git a/arch/arm/src/lpc31xx/lpc31_ehci.c b/arch/arm/src/lpc31xx/lpc31_ehci.c
index 67ef095f2d39e3ba0267c926646f284587319c97..475c4dea89d25df97bdeaf4aa8817e6e2f9dbebe 100644
--- a/arch/arm/src/lpc31xx/lpc31_ehci.c
+++ b/arch/arm/src/lpc31xx/lpc31_ehci.c
@@ -52,6 +52,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -113,7 +114,7 @@
 
 /* Debug options */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_USB_INFO
 #  undef CONFIG_LPC31_EHCI_REGDEBUG
 #endif
 
@@ -122,13 +123,6 @@
 #undef CONFIG_USBHOST_ISOC_DISABLE
 #define CONFIG_USBHOST_ISOC_DISABLE 1
 
-/* Simplify DEBUG checks */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_USB
-#endif
-
 /* Registers *******************************************************************/
 /* Traditionally, NuttX specifies register locations using individual
  * register offsets from a base address.  That tradition is broken here and,
@@ -520,7 +514,7 @@ static inline void lpc31_portsc_bottomhalf(void);
 static inline void lpc31_syserr_bottomhalf(void);
 static inline void lpc31_async_advance_bottomhalf(void);
 static void lpc31_ehci_bottomhalf(FAR void *arg);
-static int lpc31_ehci_interrupt(int irq, FAR void *context);
+static int lpc31_ehci_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /* USB Host Controller Operations **********************************************/
 
@@ -833,7 +827,7 @@ static uint32_t lpc31_swap32(uint32_t value)
 static void lpc31_printreg(volatile uint32_t *regaddr, uint32_t regval,
                           bool iswrite)
 {
-  lldbg("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval);
+  uinfo("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval);
 }
 #endif
 
@@ -884,7 +878,7 @@ static void lpc31_checkreg(volatile uint32_t *regaddr, uint32_t regval, bool isw
             {
               /* No.. More than one. */
 
-              lldbg("[repeats %d more times]\n", count);
+              uinfo("[repeats %d more times]\n", count);
             }
         }
 
@@ -1463,13 +1457,13 @@ static int lpc31_qh_flush(struct lpc31_qh_s *qh)
 #ifdef CONFIG_LPC31_EHCI_REGDEBUG
 static void lpc31_qtd_print(struct lpc31_qtd_s *qtd)
 {
-  udbg("  QTD[%p]:\n", qtd);
-  udbg("    hw:\n");
-  udbg("      nqp: %08x alt: %08x token: %08x\n",
-       qtd->hw.nqp, qtd->hw.alt, qtd->hw.token);
-  udbg("      bpl: %08x %08x %08x %08x %08x\n",
-       qtd->hw.bpl[0], qtd->hw.bpl[1], qtd->hw.bpl[2],
-       qtd->hw.bpl[3], qtd->hw.bpl[4]);
+  uinfo("  QTD[%p]:\n", qtd);
+  uinfo("    hw:\n");
+  uinfo("      nqp: %08x alt: %08x token: %08x\n",
+        qtd->hw.nqp, qtd->hw.alt, qtd->hw.token);
+  uinfo("      bpl: %08x %08x %08x %08x %08x\n",
+        qtd->hw.bpl[0], qtd->hw.bpl[1], qtd->hw.bpl[2],
+        qtd->hw.bpl[3], qtd->hw.bpl[4]);
 }
 #endif
 
@@ -1487,30 +1481,30 @@ static void lpc31_qh_print(struct lpc31_qh_s *qh)
   struct lpc31_epinfo_s *epinfo;
   struct ehci_overlay_s *overlay;
 
-  udbg("QH[%p]:\n", qh);
-  udbg("  hw:\n");
-  udbg("    hlp: %08x epchar: %08x epcaps: %08x cqp: %08x\n",
-       qh->hw.hlp, qh->hw.epchar, qh->hw.epcaps, qh->hw.cqp);
+  uinfo("QH[%p]:\n", qh);
+  uinfo("  hw:\n");
+  uinfo("    hlp: %08x epchar: %08x epcaps: %08x cqp: %08x\n",
+        qh->hw.hlp, qh->hw.epchar, qh->hw.epcaps, qh->hw.cqp);
 
   overlay = &qh->hw.overlay;
-  udbg("  overlay:\n");
-  udbg("    nqp: %08x alt: %08x token: %08x\n",
-       overlay->nqp, overlay->alt, overlay->token);
-  udbg("    bpl: %08x %08x %08x %08x %08x\n",
-       overlay->bpl[0], overlay->bpl[1], overlay->bpl[2],
-       overlay->bpl[3], overlay->bpl[4]);
+  uinfo("  overlay:\n");
+  uinfo("    nqp: %08x alt: %08x token: %08x\n",
+        overlay->nqp, overlay->alt, overlay->token);
+  uinfo("    bpl: %08x %08x %08x %08x %08x\n",
+        overlay->bpl[0], overlay->bpl[1], overlay->bpl[2],
+        overlay->bpl[3], overlay->bpl[4]);
 
-  udbg("  fqp:\n", qh->fqp);
+  uinfo("  fqp:\n", qh->fqp);
 
   epinfo = qh->epinfo;
-  udbg("  epinfo[%p]:\n", epinfo);
+  uinfo("  epinfo[%p]:\n", epinfo);
   if (epinfo)
     {
-      udbg("    EP%d DIR=%s FA=%08x TYPE=%d MaxPacket=%d\n",
-           epinfo->epno, epinfo->dirin ? "IN" : "OUT", epinfo->devaddr,
-           epinfo->xfrtype, epinfo->maxpacket);
-      udbg("    Toggle=%d iocwait=%d speed=%d result=%d\n",
-           epinfo->toggle, epinfo->iocwait, epinfo->speed, epinfo->result);
+      uinfo("    EP%d DIR=%s FA=%08x TYPE=%d MaxPacket=%d\n",
+            epinfo->epno, epinfo->dirin ? "IN" : "OUT", epinfo->devaddr,
+            epinfo->xfrtype, epinfo->maxpacket);
+      uinfo("    Toggle=%d iocwait=%d speed=%d result=%d\n",
+            epinfo->toggle, epinfo->iocwait, epinfo->speed, epinfo->result);
     }
 }
 #endif
@@ -2113,7 +2107,7 @@ static int lpc31_async_setup(struct lpc31_rhport_s *rhport,
 #ifdef CONFIG_USBHOST_TRACE
   usbhost_vtrace2(EHCI_VTRACE2_ASYNCXFR, epinfo->epno, buflen);
 #else
-  uvdbg("RHport%d EP%d: buffer=%p, buflen=%d, req=%p\n",
+  uinfo("RHport%d EP%d: buffer=%p, buflen=%d, req=%p\n",
         RHPORT(rhport), epinfo->epno, buffer, buflen, req);
 #endif
 
@@ -2391,7 +2385,7 @@ static int lpc31_intr_setup(struct lpc31_rhport_s *rhport,
 #ifdef CONFIG_USBHOST_TRACE
   usbhost_vtrace2(EHCI_VTRACE2_INTRXFR, epinfo->epno, buflen);
 #else
-  uvdbg("RHport%d EP%d: buffer=%p, buflen=%d\n",
+  uinfo("RHport%d EP%d: buffer=%p, buflen=%d\n",
         RHPORT(rhport), epinfo->epno, buffer, buflen);
 #endif
 
@@ -3363,7 +3357,7 @@ static void lpc31_ehci_bottomhalf(FAR void *arg)
  *
  ****************************************************************************/
 
-static int lpc31_ehci_interrupt(int irq, FAR void *context)
+static int lpc31_ehci_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   uint32_t usbsts;
   uint32_t pending;
@@ -3377,7 +3371,7 @@ static int lpc31_ehci_interrupt(int irq, FAR void *context)
 #ifdef CONFIG_USBHOST_TRACE
   usbhost_vtrace1(EHCI_VTRACE1_TOPHALF, usbsts & regval);
 #else
-  ullvdbg("USBSTS: %08x USBINTR: %08x\n", usbsts, regval);
+  uinfo("USBSTS: %08x USBINTR: %08x\n", usbsts, regval);
 #endif
 
   /* Handle all unmasked interrupt sources */
@@ -3909,7 +3903,7 @@ static int lpc31_epalloc(FAR struct usbhost_driver_s *drvr,
 #ifdef CONFIG_USBHOST_TRACE
   usbhost_vtrace2(EHCI_VTRACE2_EPALLOC, epdesc->addr, epdesc->xfrtype);
 #else
-  uvdbg("EP%d DIR=%s FA=%08x TYPE=%d Interval=%d MaxPacket=%d\n",
+  uinfo("EP%d DIR=%s FA=%08x TYPE=%d Interval=%d MaxPacket=%d\n",
         epdesc->addr, epdesc->in ? "IN" : "OUT", hport->funcaddr,
         epdesc->xfrtype, epdesc->interval, epdesc->mxpacketsize);
 #endif
@@ -3938,7 +3932,13 @@ static int lpc31_epalloc(FAR struct usbhost_driver_s *drvr,
   epinfo->maxpacket = epdesc->mxpacketsize;
   epinfo->xfrtype   = epdesc->xfrtype;
   epinfo->speed     = hport->speed;
+
+  /* The iocsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   sem_init(&epinfo->iocsem, 0, 0);
+  sem_setprotocol(&epinfo->iocsem, SEM_PRIO_NONE);
 
   /* Success.. return an opaque reference to the endpoint information structure
    * instance
@@ -4199,7 +4199,7 @@ static int lpc31_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
 #ifdef CONFIG_USBHOST_TRACE
   usbhost_vtrace2(EHCI_VTRACE2_CTRLINOUT, RHPORT(rhport), req->req);
 #else
-  uvdbg("RHPort%d type: %02x req: %02x value: %02x%02x index: %02x%02x len: %04x\n",
+  uinfo("RHPort%d type: %02x req: %02x value: %02x%02x index: %02x%02x len: %04x\n",
         RHPORT(rhport), req->type, req->req, req->value[1], req->value[0],
         req->index[1], req->index[0], len);
 #endif
@@ -4222,7 +4222,7 @@ static int lpc31_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
   ret = lpc31_async_setup(rhport, ep0info, req, buffer, len);
   if (ret < 0)
     {
-      udbg("ERROR: lpc31_async_setup failed: %d\n", ret);
+      uerr("ERROR: lpc31_async_setup failed: %d\n", ret);
       goto errout_with_iocwait;
     }
 
@@ -4687,7 +4687,7 @@ static int lpc31_connect(FAR struct usbhost_driver_s *drvr,
   /* Set the connected/disconnected flag */
 
   hport->connected = connected;
-  ullvdbg("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
+  uinfo("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
 
   /* Report the connection event */
 
@@ -4887,7 +4887,7 @@ FAR struct usbhost_connection_s *lpc31_ehci_initialize(int controller)
 {
   FAR struct usbhost_hubport_s *hport;
   uint32_t regval;
-#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_ASSERTIONS)
   uint16_t regval16;
   unsigned int nports;
 #endif
@@ -4923,6 +4923,12 @@ FAR struct usbhost_connection_s *lpc31_ehci_initialize(int controller)
   sem_init(&g_ehci.exclsem, 0, 1);
   sem_init(&g_ehci.pscsem,  0, 0);
 
+  /* The pscsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&g_ehci.pscsem, SEM_PRIO_NONE);
+
   /* Initialize EP0 */
 
   sem_init(&g_ehci.ep0.iocsem, 0, 1);
@@ -4959,7 +4965,13 @@ FAR struct usbhost_connection_s *lpc31_ehci_initialize(int controller)
       rhport->ep0.xfrtype         = USB_EP_ATTR_XFER_CONTROL;
       rhport->ep0.speed           = USB_SPEED_FULL;
       rhport->ep0.maxpacket       = 8;
+
+      /* The port iocsem semaphore is used for signaling and, hence,
+       * should not have priority inheritance enabled.
+       */
+
       sem_init(&rhport->ep0.iocsem, 0, 0);
+      sem_setprotocol(&rhport->iocsem, SEM_PRIO_NONE);
 
       /* Initialize the public port representation */
 
@@ -5140,7 +5152,7 @@ FAR struct usbhost_connection_s *lpc31_ehci_initialize(int controller)
 
   lpc31_putreg(EHCI_INT_ALLINTS, &HCOR->usbsts);
 
-#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_ASSERTIONS)
   /* Show the EHCI version */
 
   regval16 = lpc31_swap16(HCCR->hciversion);
@@ -5270,7 +5282,7 @@ FAR struct usbhost_connection_s *lpc31_ehci_initialize(int controller)
 
   /* Interrupt Configuration ***************************************************/
 
-  ret = irq_attach(LPC31_IRQ_USBOTG, lpc31_ehci_interrupt);
+  ret = irq_attach(LPC31_IRQ_USBOTG, lpc31_ehci_interrupt, NULL);
   if (ret != 0)
     {
       usbhost_trace1(EHCI_TRACE1_IRQATTACH_FAILED, LPC31_IRQ_USBOTG);
diff --git a/arch/arm/src/lpc31xx/lpc31_i2c.c b/arch/arm/src/lpc31xx/lpc31_i2c.c
index 79d9667a9df9a96a4d3b23fcdef6eefc7f5983c1..8d79ac56e3d2b3906913480ac8c3fb9c9d9f96aa 100644
--- a/arch/arm/src/lpc31xx/lpc31_i2c.c
+++ b/arch/arm/src/lpc31xx/lpc31_i2c.c
@@ -3,7 +3,7 @@
  *
  *   Author: David Hewson
  *
- *   Copyright (C) 2010-2011, 2014, 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010-2011, 2014, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -51,6 +51,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -111,7 +112,7 @@ static struct lpc31_i2cdev_s i2cdevices[2];
  * Private Function Prototypes
  ****************************************************************************/
 
-static int  i2c_interrupt(int irq, FAR void *context);
+static int  i2c_interrupt(int irq, FAR void *context, FAR void *arg);
 static void i2c_progress(struct lpc31_i2cdev_s *priv);
 static void i2c_timeout(int argc, uint32_t arg, ...);
 static void i2c_hwreset(struct lpc31_i2cdev_s *priv);
@@ -183,18 +184,12 @@ static void i2c_setfrequency(struct lpc31_i2cdev_s *priv, uint32_t frequency)
  *
  ****************************************************************************/
 
-static int i2c_interrupt(int irq, FAR void *context)
+static int i2c_interrupt(int irq, FAR void *context, FAR void *arg)
 {
-  if (irq == LPC31_IRQ_I2C0)
-    {
-      i2c_progress(&i2cdevices[0]);
-    }
-
-  if (irq == LPC31_IRQ_I2C1)
-    {
-      i2c_progress(&i2cdevices[1]);
-    }
+  struct lpc31_i2cdev_s *priv = (struct lpc31_i2cdev_s *)arg;
 
+  DEBUGASSERT(priv != NULL);
+  i2c_progress(priv);
   return OK;
 }
 
@@ -554,9 +549,17 @@ struct i2c_master_s *lpc31_i2cbus_initialize(int port)
   priv->rstid = (port == 0) ? RESETID_I2C0RST  : RESETID_I2C1RST;
   priv->irqid = (port == 0) ? LPC31_IRQ_I2C0   : LPC31_IRQ_I2C1;
 
+  /* Initialize semaphores */
+
   sem_init(&priv->mutex, 0, 1);
   sem_init(&priv->wait, 0, 0);
 
+  /* The wait semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->wait, SEM_PRIO_NONE);
+
   /* Enable I2C system clocks */
 
   lpc31_enableclock(priv->clkid);
@@ -576,7 +579,7 @@ struct i2c_master_s *lpc31_i2cbus_initialize(int port)
 
   /* Attach Interrupt Handler */
 
-  irq_attach(priv->irqid, i2c_interrupt);
+  irq_attach(priv->irqid, i2c_interrupt, priv);
 
   /* Enable Interrupt Handler */
 
diff --git a/arch/arm/src/lpc31xx/lpc31_lowputc.c b/arch/arm/src/lpc31xx/lpc31_lowputc.c
index 3e3213927f14b5c804598dc66bd9584febb54f27..7d1335fd5ad91605e993234f426c05fb00a656e7 100644
--- a/arch/arm/src/lpc31xx/lpc31_lowputc.c
+++ b/arch/arm/src/lpc31xx/lpc31_lowputc.c
@@ -144,14 +144,14 @@ static inline void up_configbaud(void)
   /* Test values calculated for every multiplier/divisor combination */
 
   uint32_t tdiv;
-  uint32_t terr;
+  uint32_t tmperr;
   int      tmulval;
   int      tdivaddval;
 
   /* Optimal multiplier/divider values */
 
   uint32_t div       = 0;
-  uint32_t err       = 100000;
+  uint32_t errval    = 100000;
   int      mulval    = 1;
   int      divaddval = 0;
 
@@ -176,13 +176,13 @@ static inline void up_configbaud(void)
    * match is found).
    */
 
-  for (tmulval = 1 ; tmulval <= 15 && err > 0; tmulval++)
+  for (tmulval = 1 ; tmulval <= 15 && errval > 0; tmulval++)
     {
       /* Try every valid pre-scale div, tdivaddval (or until a perfect
        * match is found).
        */
 
-      for (tdivaddval = 0 ; tdivaddval <= 15 && err > 0; tdivaddval++)
+      for (tdivaddval = 0 ; tdivaddval <= 15 && errval > 0; tdivaddval++)
         {
           /* Calculate the divisor with these fractional divider settings */
 
@@ -199,23 +199,23 @@ static inline void up_configbaud(void)
 
               if (actualbaud <= CONFIG_UART_BAUD)
                 {
-                  terr = CONFIG_UART_BAUD - actualbaud;
+                  tmperr = CONFIG_UART_BAUD - actualbaud;
                 }
               else
                 {
-                  terr = actualbaud - CONFIG_UART_BAUD;
+                  tmperr = actualbaud - CONFIG_UART_BAUD;
                 }
 
               /* Is this the smallest error we have encountered? */
 
-              if (terr < err)
+              if (tmperr < errval)
                 {
                   /* Yes, save these settings as the new, candidate optimal settings */
 
-                  mulval     = tmulval ;
+                  mulval    = tmulval ;
                   divaddval = tdivaddval;
                   div       = tdiv;
-                  err       = terr;
+                  errval    = tmperr;
                 }
             }
         }
diff --git a/arch/arm/src/lpc31xx/lpc31_serial.c b/arch/arm/src/lpc31xx/lpc31_serial.c
index 6567ce267e15179d51e23a4e16265e876d27c61d..fa5f3b4563fcd8d4dc10eebddbda04f2f9defb1a 100644
--- a/arch/arm/src/lpc31xx/lpc31_serial.c
+++ b/arch/arm/src/lpc31xx/lpc31_serial.c
@@ -88,7 +88,7 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-static int  up_interrupt(int irq, void *context);
+static int  up_interrupt(int irq, void *context, FAR void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  up_receive(struct uart_dev_s *dev, uint32_t *status);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
@@ -215,14 +215,14 @@ static inline void up_configbaud(void)
   /* Test values calculated for every multiplier/divisor combination */
 
   uint32_t tdiv;
-  uint32_t terr;
+  uint32_t tmperr;
   int      tmulval;
   int      tdivaddval;
 
   /* Optimal multiplier/divider values */
 
   uint32_t div       = 0;
-  uint32_t err       = 100000;
+  uint32_t errval    = 100000;
   int      mulval    = 1;
   int      divaddval = 0;
 
@@ -247,13 +247,13 @@ static inline void up_configbaud(void)
    * match is found).
    */
 
-  for (tmulval = 1 ; tmulval <= 15 && err > 0; tmulval++)
+  for (tmulval = 1 ; tmulval <= 15 && errval > 0; tmulval++)
     {
       /* Try every valid pre-scale div, tdivaddval (or until a perfect
        * match is found).
        */
 
-      for (tdivaddval = 0 ; tdivaddval <= 15 && err > 0; tdivaddval++)
+      for (tdivaddval = 0 ; tdivaddval <= 15 && errval > 0; tdivaddval++)
         {
           /* Calculate the divisor with these fractional divider settings */
 
@@ -270,23 +270,23 @@ static inline void up_configbaud(void)
 
               if (actualbaud <= CONFIG_UART_BAUD)
                 {
-                  terr = CONFIG_UART_BAUD - actualbaud;
+                  tmperr = CONFIG_UART_BAUD - actualbaud;
                 }
               else
                 {
-                  terr = actualbaud - CONFIG_UART_BAUD;
+                  tmperr = actualbaud - CONFIG_UART_BAUD;
                 }
 
               /* Is this the smallest error we have encountered? */
 
-              if (terr < err)
+              if (tmperr < errval)
                 {
                   /* Yes, save these settings as the new, candidate optimal settings */
 
-                  mulval     = tmulval ;
+                  mulval    = tmulval ;
                   divaddval = tdivaddval;
                   div       = tdiv;
-                  err       = terr;
+                  errval    = tmperr;
                 }
             }
         }
@@ -444,7 +444,7 @@ static int up_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(LPC31_IRQ_UART, up_interrupt);
+  ret = irq_attach(LPC31_IRQ_UART, up_interrupt, NULL);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
@@ -482,7 +482,7 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_interrupt(int irq, void *context)
+static int up_interrupt(int irq, void *context, FAR void *arg)
 {
   struct uart_dev_s *dev   = &g_uartport;
   uint8_t            status;
@@ -541,7 +541,7 @@ static int up_interrupt(int irq, void *context)
               /* Read the modem status register (MSR) to clear */
 
               status = getreg32(LPC31_UART_MSR);
-              fvdbg("MSR: %02x\n", status);
+              finfo("MSR: %02x\n", status);
               break;
             }
 
@@ -552,7 +552,7 @@ static int up_interrupt(int irq, void *context)
               /* Read the line status register (LSR) to clear */
 
               status = getreg32(LPC31_UART_LSR);
-              fvdbg("LSR: %02x\n", status);
+              finfo("LSR: %02x\n", status);
               break;
             }
 
@@ -560,7 +560,7 @@ static int up_interrupt(int irq, void *context)
 
           default:
             {
-              dbg("Unexpected IIR: %02x\n", status);
+              _err("ERROR: Unexpected IIR: %02x\n", status);
               break;
             }
         }
diff --git a/arch/arm/src/lpc31xx/lpc31_spi.c b/arch/arm/src/lpc31xx/lpc31_spi.c
index f750ca0792db960e6025838e5975bacabfb70076..ca2544bc2654d65966bf372cdb66992fdd0bd178 100644
--- a/arch/arm/src/lpc31xx/lpc31_spi.c
+++ b/arch/arm/src/lpc31xx/lpc31_spi.c
@@ -63,10 +63,10 @@
 
 /* Debug ****************************************************************************/
 /* CONFIG_LPC31_SPI_REGDEBUG enabled very low, register-level debug output.
- * CONFIG_DEBUG must also be defined
+ * CONFIG_DEBUG_FEATURES must also be defined
  */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_SPI_INFO
 #  undef CONFIG_LPC31_SPI_REGDEBUG
 #endif
 
@@ -207,7 +207,7 @@ static bool spi_checkreg(bool wr, uint32_t value, uint32_t address)
     {
       if (g_ntimes > 0)
         {
-          lldbg("...[Repeats %d times]...\n", g_ntimes);
+          spiinfo("...[Repeats %d times]...\n", g_ntimes);
         }
 
       g_wrlast      = wr;
@@ -239,7 +239,7 @@ static void spi_putreg(uint32_t value, uint32_t address)
 {
   if (spi_checkreg(true, value, address))
     {
-      lldbg("%08x<-%08x\n", address, value);
+      spiinfo("%08x<-%08x\n", address, value);
     }
   putreg32(value, address);
 }
@@ -265,7 +265,7 @@ static uint32_t spi_getreg(uint32_t address)
   uint32_t value = getreg32(address);
   if (spi_checkreg(false, value, address))
     {
-      lldbg("%08x->%08x\n", address, value);
+      spiinfo("%08x->%08x\n", address, value);
     }
   return value;
 }
@@ -921,10 +921,10 @@ FAR struct spi_dev_s *lpc31_spibus_initialize(int port)
    */
 
 #ifdef CONFIG_LPC31_SPI_REGDEBUG
-  lldbg("PINS: %08x MODE0: %08x MODE1: %08x\n",
-        spi_getreg(LPC31_IOCONFIG_SPI_PINS),
-        spi_getreg(LPC31_IOCONFIG_SPI_MODE0),
-        spi_getreg(LPC31_IOCONFIG_SPI_MODE1));
+  spiinfo("PINS: %08x MODE0: %08x MODE1: %08x\n",
+          spi_getreg(LPC31_IOCONFIG_SPI_PINS),
+          spi_getreg(LPC31_IOCONFIG_SPI_MODE0),
+          spi_getreg(LPC31_IOCONFIG_SPI_MODE1));
 #endif
 
   /* Enable SPI clocks */
diff --git a/arch/arm/src/lpc31xx/lpc31_timerisr.c b/arch/arm/src/lpc31xx/lpc31_timerisr.c
index a2607f626683bcc13035866d50d1cabfd143ebee..9a4932b7a6901b2d45e2863a7afb7fbf5a21467f 100644
--- a/arch/arm/src/lpc31xx/lpc31_timerisr.c
+++ b/arch/arm/src/lpc31xx/lpc31_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/lpc31xx/lpc31_timerisr.c
  *
- *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -54,23 +54,11 @@
 #include "lpc31.h"
 
 /****************************************************************************
- * Pre-processor Definitions
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  lpc31_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -78,7 +66,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int lpc31_timerisr(int irq, uint32_t *regs, void *arg)
 {
   /* Clear the lattched timer interrupt (Writing any value to the CLEAR register
    * clears the interrupt generated by the counter timer
@@ -93,7 +81,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -101,7 +93,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t regval;
   uint64_t load;
@@ -143,7 +135,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(LPC31_IRQ_TMR0, (xcpt_t)up_timerisr);
+  (void)irq_attach(LPC31_IRQ_TMR0, (xcpt_t)lpc31_timerisr, NULL);
 
   /* Clear any latched timer interrupt (Writing any value to the CLEAR register
    * clears the latched interrupt generated by the counter timer)
diff --git a/arch/arm/src/lpc31xx/lpc31_usbdev.c b/arch/arm/src/lpc31xx/lpc31_usbdev.c
index c1ece00bf6f37f36e4293690ca5bfcb640f5d61e..90f877a1897769ec715b8d1b060b73a548213321 100644
--- a/arch/arm/src/lpc31xx/lpc31_usbdev.c
+++ b/arch/arm/src/lpc31xx/lpc31_usbdev.c
@@ -100,7 +100,7 @@
 #  define USB_FRAME_INT 0
 #endif
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 #  define USB_ERROR_INT USBDEV_USBINTR_UEE
 #else
 #  define USB_ERROR_INT 0
@@ -343,7 +343,7 @@ struct lpc31_usbdev_s
 
 /* Register operations ********************************************************/
 
-#if defined(CONFIG_LPC31_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_LPC31_USBDEV_REGDEBUG
 static uint32_t lpc31_getreg(uint32_t addr);
 static void lpc31_putreg(uint32_t val, uint32_t addr);
 #else
@@ -396,7 +396,7 @@ static void        lpc31_ep0complete(struct lpc31_usbdev_s *priv, uint8_t epphy)
 static void        lpc31_ep0nak(struct lpc31_usbdev_s *priv, uint8_t epphy);
 static bool        lpc31_epcomplete(struct lpc31_usbdev_s *priv, uint8_t epphy);
 
-static int         lpc31_usbinterrupt(int irq, FAR void *context);
+static int         lpc31_usbinterrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Endpoint operations *********************************************************/
 
@@ -480,7 +480,7 @@ static const struct usbdev_ops_s g_devops =
  *
  ****************************************************************************/
 
-#if defined(CONFIG_LPC31_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_LPC31_USBDEV_REGDEBUG
 static uint32_t lpc31_getreg(uint32_t addr)
 {
   static uint32_t prevaddr = 0;
@@ -501,7 +501,7 @@ static uint32_t lpc31_getreg(uint32_t addr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              uinfo("...\n");
             }
 
           return val;
@@ -518,7 +518,7 @@ static uint32_t lpc31_getreg(uint32_t addr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          uinfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -530,7 +530,7 @@ static uint32_t lpc31_getreg(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%08x\n", addr, val);
+  uinfo("%08x->%08x\n", addr, val);
   return val;
 }
 #endif
@@ -543,12 +543,12 @@ static uint32_t lpc31_getreg(uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_LPC31_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_LPC31_USBDEV_REGDEBUG
 static void lpc31_putreg(uint32_t val, uint32_t addr)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", addr, val);
+  uinfo("%08x<-%08x\n", addr, val);
 
   /* Write the value */
 
@@ -1183,8 +1183,8 @@ static inline void lpc31_ep0setup(struct lpc31_usbdev_s *priv)
   index = GETUINT16(ctrl.index);
   len   = GETUINT16(ctrl.len);
 
-  ullvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
-          ctrl.type, ctrl.req, value, index, len);
+  uinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+        ctrl.type, ctrl.req, value, index, len);
 
   /* Dispatch any non-standard requests */
   if ((ctrl.type & USB_REQ_TYPE_MASK) != USB_REQ_TYPE_STANDARD)
@@ -1323,7 +1323,7 @@ static inline void lpc31_ep0setup(struct lpc31_usbdev_s *priv)
           if (((ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE) &&
               value == USB_FEATURE_TESTMODE)
             {
-              ullvdbg("test mode: %d\n", index);
+              uinfo("test mode: %d\n", index);
             }
           else if ((ctrl.type & USB_REQ_RECIPIENT_MASK) != USB_REQ_RECIPIENT_ENDPOINT)
             {
@@ -1536,7 +1536,7 @@ static void lpc31_ep0complete(struct lpc31_usbdev_s *priv, uint8_t epphy)
       break;
 
     default:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       DEBUGASSERT(priv->ep0state != EP0STATE_DATA_IN &&
           priv->ep0state != EP0STATE_DATA_OUT        &&
           priv->ep0state != EP0STATE_SHORTWRITE      &&
@@ -1578,7 +1578,7 @@ static void lpc31_ep0nak(struct lpc31_usbdev_s *priv, uint8_t epphy)
       lpc31_ep0state (priv, EP0STATE_WAIT_STATUS_OUT);
       break;
     default:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       DEBUGASSERT(priv->ep0state != EP0STATE_WAIT_NAK_IN &&
           priv->ep0state != EP0STATE_WAIT_NAK_OUT);
 #endif
@@ -1677,7 +1677,7 @@ bool lpc31_epcomplete(struct lpc31_usbdev_s *priv, uint8_t epphy)
  *
  ****************************************************************************/
 
-static int lpc31_usbinterrupt(int irq, FAR void *context)
+static int lpc31_usbinterrupt(int irq, FAR void *context, FAR void *arg)
 {
   struct lpc31_usbdev_s *priv = &g_usbdev;
   uint32_t disr, portsc1, n;
@@ -1939,7 +1939,7 @@ static int lpc31_epdisable(FAR struct usbdev_ep_s *ep)
   FAR struct lpc31_ep_s *privep = (FAR struct lpc31_ep_s *)ep;
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(LPC31_TRACEERR_INVALIDPARMS), 0);
@@ -1977,7 +1977,7 @@ static FAR struct usbdev_req_s *lpc31_epallocreq(FAR struct usbdev_ep_s *ep)
 {
   FAR struct lpc31_req_s *privreq;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(LPC31_TRACEERR_INVALIDPARMS), 0);
@@ -2009,7 +2009,7 @@ static void lpc31_epfreereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
 {
   FAR struct lpc31_req_s *privreq = (FAR struct lpc31_req_s *)req;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(LPC31_TRACEERR_INVALIDPARMS), 0);
@@ -2079,11 +2079,11 @@ static int lpc31_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
   irqstate_t flags;
   int ret = OK;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!req || !req->callback || !req->buf || !ep)
     {
       usbtrace(TRACE_DEVERROR(LPC31_TRACEERR_INVALIDPARMS), 0);
-      ullvdbg("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+      uinfo("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
       return -EINVAL;
     }
 #endif
@@ -2144,7 +2144,7 @@ static int lpc31_epcancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
   FAR struct lpc31_ep_s *privep = (FAR struct lpc31_ep_s *)ep;
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(LPC31_TRACEERR_INVALIDPARMS), 0);
@@ -2423,7 +2423,7 @@ static int lpc31_selfpowered(struct usbdev_s *dev, bool selfpowered)
 
   usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(LPC31_TRACEERR_INVALIDPARMS), 0);
@@ -2572,7 +2572,7 @@ void up_usbinitialize(void)
 
   /* Attach USB controller interrupt handler */
 
-  if (irq_attach(LPC31_IRQ_USBOTG, lpc31_usbinterrupt) != 0)
+  if (irq_attach(LPC31_IRQ_USBOTG, lpc31_usbinterrupt, NULL) != 0)
     {
       usbtrace(TRACE_DEVERROR(LPC31_TRACEERR_IRQREGISTRATION),
                (uint16_t)LPC31_IRQ_USBOTG);
@@ -2655,7 +2655,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
 
   usbtrace(TRACE_DEVREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !driver->ops->bind || !driver->ops->unbind ||
       !driver->ops->disconnect || !driver->ops->setup)
     {
@@ -2716,7 +2716,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
 {
   usbtrace(TRACE_DEVUNREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (driver != g_usbdev.driver)
     {
       usbtrace(TRACE_DEVERROR(LPC31_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/lpc43xx/Kconfig b/arch/arm/src/lpc43xx/Kconfig
index 5b7d730151e58a4a9065a7a03a0edd4664c4e5ac..db16b30626ab41c2ac25027fe47e645344c36db0 100644
--- a/arch/arm/src/lpc43xx/Kconfig
+++ b/arch/arm/src/lpc43xx/Kconfig
@@ -40,6 +40,9 @@ config ARCH_CHIP_LPC4337JBD144
 config ARCH_CHIP_LPC4337JET100
 	bool "LPC4337JET100"
 
+config ARCH_CHIP_LPC4337FET256
+	bool "LPC4337FET256"
+
 config ARCH_CHIP_LPC4350FBD208
 	bool "LPC4350FBD208"
 
@@ -81,36 +84,43 @@ config ARCH_FAMILY_LPC4320
 	bool
 	default y if ARCH_CHIP_LPC4320FBD144 || ARCH_CHIP_LPC4320FET100
 	select ARCH_HAVE_TICKLESS
+	select ARCH_HAVE_AHB_SRAM_BANK1
 
 config ARCH_FAMILY_LPC4330
 	bool
 	default y if ARCH_CHIP_LPC4330FBD144 || ARCH_CHIP_LPC4330FET100 || ARCH_CHIP_LPC4330FET180 || ARCH_CHIP_LPC4330FET256 || ARCH_CHIP_LPC4337JET100
 	select ARCH_HAVE_TICKLESS
+	select ARCH_HAVE_AHB_SRAM_BANK1
 
 config ARCH_FAMILY_LPC4337
 	bool
-	default y if ARCH_CHIP_LPC4337JBD144
+	default y if ARCH_CHIP_LPC4337JBD144 || ARCH_CHIP_LPC4337FET256
 	select ARCH_HAVE_TICKLESS
+	select ARCH_HAVE_AHB_SRAM_BANK1
 
 config ARCH_FAMILY_LPC4350
 	bool
 	default y if ARCH_CHIP_LPC4350FBD208 || ARCH_CHIP_LPC4350FET180 || ARCH_CHIP_LPC4350FET256
 	select ARCH_HAVE_TICKLESS
+	select ARCH_HAVE_AHB_SRAM_BANK1
 
 config ARCH_FAMILY_LPC4353
 	bool
 	default y if ARCH_CHIP_LPC4353FBD208 || ARCH_CHIP_LPC4353FET180 || ARCH_CHIP_LPC4353FET256
 	select ARCH_HAVE_TICKLESS
+	select ARCH_HAVE_AHB_SRAM_BANK1
 
 config ARCH_FAMILY_LPC4357
 	bool
 	default y if ARCH_CHIP_LPC4357FET180 || ARCH_CHIP_LPC4357FBD208 || ARCH_CHIP_LPC4357FET256
 	select ARCH_HAVE_TICKLESS
+	select ARCH_HAVE_AHB_SRAM_BANK1
 
 config ARCH_FAMILY_LPC4370
 	bool
 	default y if ARCH_CHIP_LPC4370FET100
 	select ARCH_HAVE_TICKLESS
+	select ARCH_HAVE_AHB_SRAM_BANK1
 
 choice
 	prompt "LPC43XX Boot Configuration"
@@ -177,9 +187,15 @@ config LPC43_DAC
 config LPC43_EMC
 	bool "External Memory Controller (EMC)"
 	default n
+	select ARCH_HAVE_EXTSDRAM0
+	select ARCH_HAVE_EXTSDRAM1
+	select ARCH_HAVE_EXTSDRAM2
+	select ARCH_HAVE_EXTSDRAM3
 
 config LPC43_ETHERNET
 	bool "Ethernet"
+	select NETDEVICES
+	select ARCH_HAVE_PHY
 	default n
 
 config LPC43_EVNTMNTR
@@ -256,8 +272,9 @@ config LPC43_SSP1
 	default n
 
 config LPC43_TMR0
-	bool "ADC1"
+	bool "Timer 0"
 	default n
+	select LPC43_TIMER
 
 config LPC43_TMR1
 	bool "Timer 1"
@@ -266,10 +283,17 @@ config LPC43_TMR1
 config LPC43_TMR2
 	bool "Timer 2"
 	default n
+	select LPC43_TIMER
 
 config LPC43_TMR3
 	bool "Timer 3"
 	default n
+	select LPC43_TIMER
+
+config LPC43_TIMER
+        bool
+        default n
+        select ARCH_HAVE_EXTCLK
 
 config LPC43_USART0
 	bool "USART0"
@@ -314,8 +338,179 @@ config LPC43_WWDT
 
 endmenu # LPC43xx Peripheral Support
 
-if LPC43_ETHERNET
+menu "ADC driver options"
+	depends on LPC43_ADC0 || LPC43_ADC1
+
+config ADC0_MASK
+	hex "ADC0 mask"
+	default 0x01
+
+config ADC0_FREQ
+	int "ADC0 frequency"
+	default 4500000
+
+endmenu # ADC driver options
+
+config LPC43_GPIO_IRQ
+	bool "GPIO interrupt support"
+	default n
+	---help---
+		Enable support for GPIO interrupts
+
+menu "Internal Memory Configuration"
+
+config ARCH_HAVE_AHB_SRAM_BANK1
+	bool
+
+if !LPC43_BOOT_SRAM
+
+config LPC43_USE_LOCSRAM_BANK1
+	bool "Use local SRAM bank 1 memory region"
+	default n
+	---help---
+		Add local SRAM bank 1 memory region.
+
+endif # LPC43_BOOT_SRAM
+
+config LPC43_USE_AHBSRAM_BANK0
+	bool "Use AHB SRAM bank 0 memory region"
+	default n
+	---help---
+		Add local AHB SRAM bank 0 memory region.
+
+config LPC43_USE_AHBSRAM_BANK1
+	bool "Use AHB SRAM bank 1 memory region"
+	default n
+	depends on ARCH_HAVE_AHB_SRAM_BANK1
+	---help---
+		Add local AHB SRAM bank 1 memory region.
+
+config LPC43_HEAP_AHBSRAM_BANK2
+	bool "Use AHB SRAM bank 2 (ETB SRAM) memory region"
+	default n
+	---help---
+		Add local AHB SRAM bank 2 (ETB SRAM) memory region.
+
+endmenu # LPC43xx Internal Memory Configuration
+
+menu "External Memory Configuration"
+
+config ARCH_HAVE_EXTSDRAM0
+	bool
+
+config ARCH_HAVE_EXTSDRAM1
+	bool
+
+config ARCH_HAVE_EXTSDRAM2
+	bool
+
+config ARCH_HAVE_EXTSDRAM3
+	bool
+
+config LPC43_EXTSDRAM0
+	bool "Configure external SDRAM0 (on DYNCS0)"
+	default n
+	depends on ARCH_HAVE_EXTSDRAM0
+	select ARCH_HAVE_EXTSDRAM
+	---help---
+		Configure external SDRAM memory and, if applicable, map then external
+		SDRAM into the memory map.
+
+if LPC43_EXTSDRAM0
+
+config LPC43_EXTSDRAM0_SIZE
+	int "External SDRAM0 size"
+	default 0
+	---help---
+		Size of the external SDRAM on DYNCS0 in bytes.
+
+config LPC43_EXTSDRAM0_HEAP
+	bool "Add external SDRAM on DYNCS0 to the heap"
+	default y
+	---help---
+		Add the external SDRAM on DYNCS0 into the heap.
+
+endif # LCP43_EXTSDRAM0
+
+config LPC43_EXTSDRAM1
+	bool "Configure external SDRAM1 (on DYNCS1)"
+	default n
+	depends on ARCH_HAVE_EXTSDRAM1
+	select ARCH_HAVE_EXTSDRAM
+	---help---
+		Configure external SDRAM memoryand, if applicable, map then external
+		SDRAM into the memory map.
+
+if LPC43_EXTSDRAM1
+
+config LPC43_EXTSDRAM1_SIZE
+	int "External SDRAM1 size"
+	default 0
+	---help---
+		Size of the external SDRAM on DYNCS1 in bytes.
+
+config LPC43_EXTSDRAM1_HEAP
+	bool "Add external SDRAM on DYNCS1 to the heap"
+	default y
+	---help---
+		Add the external SDRAM on DYNCS1 into the heap.
+
+endif # LCP43_EXTSDRAM1
+
+config LPC43_EXTSDRAM2
+	bool "Configure external SDRAM2 (on DYNCS2)"
+	default n
+	depends on ARCH_HAVE_EXTSDRAM2
+	select ARCH_HAVE_EXTSDRAM
+	---help---
+		Configure external SDRAM memoryand, if applicable, map then external
+		SDRAM into the memory map.
+
+if LPC43_EXTSDRAM2
+
+config LPC43_EXTSDRAM2_SIZE
+	int "External SDRAM2 size"
+	default 0
+	---help---
+		Size of the external SDRAM on DYNCS2 in bytes.
+
+config LPC43_EXTSDRAM2_HEAP
+    bool "Add external SDRAM on DYNCS2 to the heap"
+	default y
+	---help---
+	    Add the external SDRAM on DYNCS2 into the heap.
+
+endif # LCP43_EXTSDRAM2
+
+config LPC43_EXTSDRAM3
+	bool "Configure external SDRAM3 (on DYNCS3)"
+	default n
+	depends on ARCH_HAVE_EXTSDRAM3
+	select ARCH_HAVE_EXTSDRAM
+	---help---
+		Configure external SDRAM memoryand, if applicable, map then external
+		SDRAM into the memory map.
+
+if LPC43_EXTSDRAM3
+
+config LPC43_EXTSDRAM3_SIZE
+	int "External SDRAM3 size"
+	default 0
+	---help---
+		Size of the external SDRAM in bytes.
+
+config LPC43_EXTSDRAM3_HEAP
+	bool "Add external SDRAM on DYNCS3 to the heap"
+	default y
+	---help---
+		Add the external SDRAM on DYNCS3 into the heap.
+
+endif # LCP43_EXTSDRAM3
+
+endmenu # External Memory Configuration
+
 menu "Ethernet MAC configuration"
+	depends on LPC43_ETHERNET
 
 config LPC43_PHYADDR
 	int "PHY address"
@@ -448,15 +643,34 @@ config LPC43_RMII
 	bool
 	default y if !LPC43_MII
 
+choice
+	prompt "Work queue"
+	default LPC43_ETHERNET_LPWORK if SCHED_LPWORK
+	default LPC43_ETHERNET_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the Ethernet driver.  If the
+		low priority work queue is available, then it should be used by the
+		driver.
+
+config LPC43_ETHERNET_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
+
+config LPC43_ETHERNET_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
+
+endchoice # Work queue
+
 config LPC43_ETHERNET_REGDEBUG
 	bool "Register-Level Debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_NET_INFO
 	---help---
-		Enable very low-level register access debug.  Depends on DEBUG.
+		Enable very low-level register access debug.  Depends on CONFIG_DEBUG_NET_INFO.
 
 endmenu # Ethernet MAC configuration
-endif # LPC43_ETHERNET
 
 menu "RS-485 Configuration"
 if LPC43_USART0
@@ -467,11 +681,16 @@ config USART0_RS485MODE
 	---help---
 		Enable RS-485 interface on USART0.
 
-config USART0_RS485_DTRDIR
-	bool "USART0 DTR for DIR"
+if USART0_RS485_MODE
+	config USART0_RS485DIROIN
+	bool "Invert direction control pin polarity"
 	default n
 	---help---
-		Use the USART DTR pin for the DIR pin
+		If disabled, control pin will be driven to logic 0 when the
+		transmitter has data to be sent.  It will be driven to logic 1 after
+		the last bit of data has been transmitted.
+
+endif # USART0_RS485MODE
 
 endif # LPC43_USART0
 
@@ -499,11 +718,15 @@ config USART2_RS485MODE
 	---help---
 		Enable RS-485 interface on USART2.
 
-config USART2_RS485_DTRDIR
-	bool "USART2 DTR for DIR"
+if USART2_RS485MODE
+	config USART0_RS485DIROIN
+	bool "Invert direction control pin polarity"
 	default n
 	---help---
-		Use the USART DTR pin for the DIR pin
+		If disabled, control pin will be driven to logic 0 when the transmitter has data to be sent.
+		It will be driven to logic 1 after the last bit of data has been transmitted.
+
+endif # USART2_RS485MODE
 
 endif # LPC43_USART2
 
@@ -515,11 +738,15 @@ config USART3_RS485MODE
 	---help---
 		Enable RS-485 interface on USART3.
 
-config USART3_RS485_DTRDIR
-	bool "USART3 DTR for DIR"
+if USART3_RS485MODE
+config USART3_RS485DIROIN
+	bool "Invert direction control pin polarity"
 	default n
 	---help---
-		Use the USART DTR pin for the DIR pin
+		If disabled, control pin will be driven to logic 0 when the transmitter has data to be sent.
+		It will be driven to logic 1 after the last bit of data has been transmitted.
+
+endif # USART3_RS485MODE
 
 endif # LPC43_USART3
 endmenu # RS-485 Configuration
diff --git a/arch/arm/src/lpc43xx/Make.defs b/arch/arm/src/lpc43xx/Make.defs
index 018b929d4d42044b823d084fc37cc14c2a8a5609..d68a19635b31dea6de0fe4bfdb26dddbf2ebfc30 100644
--- a/arch/arm/src/lpc43xx/Make.defs
+++ b/arch/arm/src/lpc43xx/Make.defs
@@ -60,10 +60,6 @@ ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
 CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
 endif
 
-ifeq ($(CONFIG_ARCH_MEMCPY),y)
-CMN_ASRCS += up_memcpy.S
-endif
-
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
 CMN_CSRCS += up_mpu.c up_task_start.c up_pthread_start.c
 ifneq ($(CONFIG_DISABLE_SIGNALS),y)
@@ -76,12 +72,6 @@ ifeq ($(CONFIG_STACK_COLORATION),y)
 CMN_CSRCS += up_checkstack.c
 endif
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c
-endif
-
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += up_fpu.S
 ifneq ($(CONFIG_ARMV7M_CMNVECTOR),y)
@@ -110,7 +100,7 @@ ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
 CHIP_CSRCS += lpc43_idle.c
 endif
 
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
 CHIP_CSRCS += lpc43_debug.c
 endif
 
@@ -118,7 +108,7 @@ ifeq ($(CONFIG_LPC43_GPDMA),y)
 CHIP_CSRCS += lpc43_gpdma.c
 endif
 
-ifeq ($(CONFIG_GPIO_IRQ),y)
+ifeq ($(CONFIG_LPC43_GPIO_IRQ),y)
 CHIP_CSRCS += lpc43_gpioint.c
 endif
 
@@ -126,6 +116,10 @@ ifeq ($(CONFIG_LPC43_ETHERNET),y)
 CHIP_CSRCS += lpc43_ethernet.c
 endif
 
+ifeq ($(CONFIG_LPC43_EMC),y)
+CHIP_CSRCS += lpc43_emc.c
+endif
+
 ifeq ($(CONFIG_LPC43_SPI),y)
 CHIP_CSRCS += lpc43_spi.c
 else
@@ -150,6 +144,10 @@ CHIP_CSRCS += lpc43_ssp.c
 endif
 endif
 
+ifeq ($(CONFIG_LPC43_TIMER),y)
+CHIP_CSRCS += lpc43_timer.c
+endif
+
 ifeq ($(CONFIG_LPC43_RIT),y)
 CHIP_CSRCS += lpc43_rit.c
 endif
@@ -192,4 +190,4 @@ CHIP_CSRCS += lpc43_usb0dev.c
 endif
 endif
 
--include chip/spifi/src/Make.defs
\ No newline at end of file
+-include chip/spifi/src/Make.defs
diff --git a/arch/arm/src/lpc43xx/chip.h b/arch/arm/src/lpc43xx/chip.h
index 630bdcb1909934cb8962fed14f3de75cb9a0b197..59702c79484a200659c86560a767798fe323c93c 100644
--- a/arch/arm/src/lpc43xx/chip.h
+++ b/arch/arm/src/lpc43xx/chip.h
@@ -101,6 +101,10 @@
 #  define  ARMV7M_PERIPHERAL_INTERRUPTS 53
 #  include "chip/lpc435357_memorymap.h"
 #  include "chip/lpc4357fet256_pinconfig.h"
+#elif defined(CONFIG_ARCH_CHIP_LPC4337FET256)
+#  define  ARMV7M_PERIPHERAL_INTERRUPTS 53
+#  include "chip/lpc435357_memorymap.h"
+#  include "chip/lpc4310203050_pinconfig.h"
 #elif defined(CONFIG_ARCH_CHIP_LPC4350FBD208)
 #  define  ARMV7M_PERIPHERAL_INTERRUPTS 53
 #  include "chip/lpc4310203050_memorymap.h"
diff --git a/arch/arm/src/lpc43xx/chip/lpc4310203050_pinconfig.h b/arch/arm/src/lpc43xx/chip/lpc4310203050_pinconfig.h
index 708ecfa8624c05f05d5485d019e9de28691828c0..0139dfa4209410fae4463b3c6919cd5368996c55 100644
--- a/arch/arm/src/lpc43xx/chip/lpc4310203050_pinconfig.h
+++ b/arch/arm/src/lpc43xx/chip/lpc4310203050_pinconfig.h
@@ -473,10 +473,10 @@
 #define PINCONF_GP_CLKIN_2       (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_0)
 #define PINCONF_GP_CLKIN_3       (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_4)
 
-#define PINCONF_I2C1_SCL_1       (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_4)
-#define PINCONF_I2C1_SCL_2       (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_15)
-#define PINCONF_I2C1_SDA_1       (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_3)
-#define PINCONF_I2C1_SDA_2       (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_13)
+#define PINCONF_I2C1_SCL_1       (PINCONF_FUNC1|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_4)
+#define PINCONF_I2C1_SCL_2       (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_15)
+#define PINCONF_I2C1_SDA_1       (PINCONF_FUNC1|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_3)
+#define PINCONF_I2C1_SDA_2       (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_13)
 
 #define PINCONF_I2S0_RX_MCLK_1   (PINCONF_FUNC1|PINCONF_PINS3|PINCONF_PIN_0)
 #define PINCONF_I2S0_RX_MCLK_2   (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_0)
@@ -603,23 +603,23 @@
 #define PINCONF_QEI_PHA          (PINCONF_FUNC1|PINCONF_PINSA|PINCONF_PIN_3)
 #define PINCONF_QEI_PHB          (PINCONF_FUNC1|PINCONF_PINSA|PINCONF_PIN_2)
 
-#define PINCONF_SD_CD_1          (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_13)
-#define PINCONF_SD_CD_2          (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_8)
-#define PINCONF_SD_CLK           (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_0)
-#define PINCONF_SD_CMD_1         (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_6)
-#define PINCONF_SD_CMD_2         (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_10)
-#define PINCONF_SD_DAT0_1        (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_9)
-#define PINCONF_SD_DAT0_2        (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_4)
-#define PINCONF_SD_DAT1_1        (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_10)
-#define PINCONF_SD_DAT1_2        (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_5)
-#define PINCONF_SD_DAT2_1        (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_11)
-#define PINCONF_SD_DAT2_2        (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_6)
-#define PINCONF_SD_DAT3_1        (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_12)
-#define PINCONF_SD_DAT3_2        (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_7)
-#define PINCONF_SD_DAT4          (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_11)
-#define PINCONF_SD_DAT5          (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_12)
-#define PINCONF_SD_DAT6          (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_13)
-#define PINCONF_SD_DAT7          (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_14)
+#define PINCONF_SD_CD_1          (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_13)
+#define PINCONF_SD_CD_2          (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_8)
+#define PINCONF_SD_CLK           (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_0)
+#define PINCONF_SD_CMD_1         (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_6)
+#define PINCONF_SD_CMD_2         (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_10)
+#define PINCONF_SD_DAT0_1        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_9)
+#define PINCONF_SD_DAT0_2        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_4)
+#define PINCONF_SD_DAT1_1        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_10)
+#define PINCONF_SD_DAT1_2        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_5)
+#define PINCONF_SD_DAT2_1        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_11)
+#define PINCONF_SD_DAT2_2        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_6)
+#define PINCONF_SD_DAT3_1        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_12)
+#define PINCONF_SD_DAT3_2        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_7)
+#define PINCONF_SD_DAT4          (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_11)
+#define PINCONF_SD_DAT5          (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_12)
+#define PINCONF_SD_DAT6          (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_13)
+#define PINCONF_SD_DAT7          (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_14)
 #define PINCONF_SD_POW_1         (PINCONF_FUNC5|PINCONF_PINSD|PINCONF_PIN_1)
 #define PINCONF_SD_POW_2         (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_5)
 #define PINCONF_SD_POW_3         (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_9)
@@ -634,78 +634,78 @@
 #define PINCONF_SD_WP_1          (PINCONF_FUNC5|PINCONF_PINSD|PINCONF_PIN_15)
 #define PINCONF_SD_WP_2          (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_10)
 
-#define PINCONF_SGPIO0_1         (PINCONF_FUNC3|PINCONF_PINS0|PINCONF_PIN_0)
-#define PINCONF_SGPIO0_2         (PINCONF_FUNC6|PINCONF_PINS9|PINCONF_PIN_0)
-#define PINCONF_SGPIO0_3         (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_1)
-#define PINCONF_SGPIO1_1         (PINCONF_FUNC3|PINCONF_PINS0|PINCONF_PIN_1)
-#define PINCONF_SGPIO1_2         (PINCONF_FUNC6|PINCONF_PINS9|PINCONF_PIN_1)
-#define PINCONF_SGPIO1_3         (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_2)
-#define PINCONF_SGPIO2_1         (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_15)
-#define PINCONF_SGPIO2_2         (PINCONF_FUNC6|PINCONF_PINS9|PINCONF_PIN_2)
-#define PINCONF_SGPIO2_3         (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_3)
-#define PINCONF_SGPIO3_1         (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_16)
-#define PINCONF_SGPIO3_2         (PINCONF_FUNC6|PINCONF_PINS9|PINCONF_PIN_5)
-#define PINCONF_SGPIO3_3         (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_9)
-#define PINCONF_SGPIO4_1         (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_0)
-#define PINCONF_SGPIO4_2         (PINCONF_FUNC2|PINCONF_PINS6|PINCONF_PIN_3)
-#define PINCONF_SGPIO4_3         (PINCONF_FUNC6|PINCONF_PINS9|PINCONF_PIN_4)
-#define PINCONF_SGPIO4_4         (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_5)
-#define PINCONF_SGPIO4_5         (PINCONF_FUNC7|PINCONF_PINS7|PINCONF_PIN_0)
-#define PINCONF_SGPIO4_6         (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_0)
-#define PINCONF_SGPIO5_1         (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_1)
-#define PINCONF_SGPIO5_2         (PINCONF_FUNC2|PINCONF_PINS6|PINCONF_PIN_6)
-#define PINCONF_SGPIO5_3         (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_6)
-#define PINCONF_SGPIO5_4         (PINCONF_FUNC7|PINCONF_PINS7|PINCONF_PIN_1)
-#define PINCONF_SGPIO5_5         (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_1)
-#define PINCONF_SGPIO6_1         (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_2)
-#define PINCONF_SGPIO6_2         (PINCONF_FUNC2|PINCONF_PINS6|PINCONF_PIN_7)
-#define PINCONF_SGPIO6_3         (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_7)
-#define PINCONF_SGPIO6_4         (PINCONF_FUNC7|PINCONF_PINS7|PINCONF_PIN_2)
-#define PINCONF_SGPIO6_5         (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_2)
-#define PINCONF_SGPIO7_1         (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_6)
-#define PINCONF_SGPIO7_2         (PINCONF_FUNC2|PINCONF_PINS6|PINCONF_PIN_8)
-#define PINCONF_SGPIO7_3         (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_0)
-#define PINCONF_SGPIO7_4         (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_8)
-#define PINCONF_SGPIO7_5         (PINCONF_FUNC7|PINCONF_PINS7|PINCONF_PIN_7)
-#define PINCONF_SGPIO7_6         (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_3)
-#define PINCONF_SGPIO8_1         (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_1)
-#define PINCONF_SGPIO8_2         (PINCONF_FUNC4|PINCONF_PINS8|PINCONF_PIN_0)
-#define PINCONF_SGPIO8_3         (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_12)
-#define PINCONF_SGPIO8_4         (PINCONF_FUNC6|PINCONF_PINS9|PINCONF_PIN_6)
-#define PINCONF_SGPIO8_5         (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_2)
-#define PINCONF_SGPIO8_6         (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_4)
-#define PINCONF_SGPIO9_1         (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_2)
-#define PINCONF_SGPIO9_2         (PINCONF_FUNC4|PINCONF_PINS8|PINCONF_PIN_1)
-#define PINCONF_SGPIO9_3         (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_13)
-#define PINCONF_SGPIO9_4         (PINCONF_FUNC6|PINCONF_PINS9|PINCONF_PIN_3)
-#define PINCONF_SGPIO9_5         (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_3)
-#define PINCONF_SGPIO9_6         (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_5)
-#define PINCONF_SGPIO10_1        (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_3)
-#define PINCONF_SGPIO10_2        (PINCONF_FUNC4|PINCONF_PINS8|PINCONF_PIN_2)
-#define PINCONF_SGPIO10_3        (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_14)
-#define PINCONF_SGPIO10_4        (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_4)
-#define PINCONF_SGPIO10_5        (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_6)
-#define PINCONF_SGPIO11_1        (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_4)
-#define PINCONF_SGPIO11_2        (PINCONF_FUNC5|PINCONF_PINSC|PINCONF_PIN_12)
-#define PINCONF_SGPIO11_3        (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_17)
-#define PINCONF_SGPIO11_4        (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_5)
-#define PINCONF_SGPIO11_5        (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_7)
-#define PINCONF_SGPIO12_1        (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_3)
-#define PINCONF_SGPIO12_2        (PINCONF_FUNC5|PINCONF_PINSC|PINCONF_PIN_13)
-#define PINCONF_SGPIO12_3        (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_18)
-#define PINCONF_SGPIO12_4        (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_6)
-#define PINCONF_SGPIO12_5        (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_8)
-#define PINCONF_SGPIO13_1        (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_4)
-#define PINCONF_SGPIO13_2        (PINCONF_FUNC5|PINCONF_PINSC|PINCONF_PIN_14)
-#define PINCONF_SGPIO13_3        (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_20)
-#define PINCONF_SGPIO13_4        (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_8)
-#define PINCONF_SGPIO13_5        (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_9)
-#define PINCONF_SGPIO14_1        (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_5)
-#define PINCONF_SGPIO14_2        (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_6)
-#define PINCONF_SGPIO14_3        (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_9)
-#define PINCONF_SGPIO15_1        (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_8)
-#define PINCONF_SGPIO15_2        (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_5)
-#define PINCONF_SGPIO15_3        (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_10)
+#define PINCONF_SGPIO0_1         (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS0|PINCONF_PIN_0)
+#define PINCONF_SGPIO0_2         (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_0)
+#define PINCONF_SGPIO0_3         (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_1)
+#define PINCONF_SGPIO1_1         (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS0|PINCONF_PIN_1)
+#define PINCONF_SGPIO1_2         (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_1)
+#define PINCONF_SGPIO1_3         (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_2)
+#define PINCONF_SGPIO2_1         (PINCONF_FUNC2|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_15)
+#define PINCONF_SGPIO2_2         (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_2)
+#define PINCONF_SGPIO2_3         (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_3)
+#define PINCONF_SGPIO3_1         (PINCONF_FUNC2|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_16)
+#define PINCONF_SGPIO3_2         (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_5)
+#define PINCONF_SGPIO3_3         (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_9)
+#define PINCONF_SGPIO4_1         (PINCONF_FUNC0|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_0)
+#define PINCONF_SGPIO4_2         (PINCONF_FUNC2|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_3)
+#define PINCONF_SGPIO4_3         (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_4)
+#define PINCONF_SGPIO4_4         (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_5)
+#define PINCONF_SGPIO4_5         (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS7|PINCONF_PIN_0)
+#define PINCONF_SGPIO4_6         (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_0)
+#define PINCONF_SGPIO5_1         (PINCONF_FUNC0|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_1)
+#define PINCONF_SGPIO5_2         (PINCONF_FUNC2|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_6)
+#define PINCONF_SGPIO5_3         (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_6)
+#define PINCONF_SGPIO5_4         (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS7|PINCONF_PIN_1)
+#define PINCONF_SGPIO5_5         (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_1)
+#define PINCONF_SGPIO6_1         (PINCONF_FUNC0|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_2)
+#define PINCONF_SGPIO6_2         (PINCONF_FUNC2|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_7)
+#define PINCONF_SGPIO6_3         (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_7)
+#define PINCONF_SGPIO6_4         (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS7|PINCONF_PIN_2)
+#define PINCONF_SGPIO6_5         (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_2)
+#define PINCONF_SGPIO7_1         (PINCONF_FUNC0|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_6)
+#define PINCONF_SGPIO7_2         (PINCONF_FUNC2|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_8)
+#define PINCONF_SGPIO7_3         (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_0)
+#define PINCONF_SGPIO7_4         (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_8)
+#define PINCONF_SGPIO7_5         (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS7|PINCONF_PIN_7)
+#define PINCONF_SGPIO7_6         (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_3)
+#define PINCONF_SGPIO8_1         (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_1)
+#define PINCONF_SGPIO8_2         (PINCONF_FUNC4|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS8|PINCONF_PIN_0)
+#define PINCONF_SGPIO8_3         (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_12)
+#define PINCONF_SGPIO8_4         (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_6)
+#define PINCONF_SGPIO8_5         (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_2)
+#define PINCONF_SGPIO8_6         (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_4)
+#define PINCONF_SGPIO9_1         (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_2)
+#define PINCONF_SGPIO9_2         (PINCONF_FUNC4|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS8|PINCONF_PIN_1)
+#define PINCONF_SGPIO9_3         (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_13)
+#define PINCONF_SGPIO9_4         (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_3)
+#define PINCONF_SGPIO9_5         (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_3)
+#define PINCONF_SGPIO9_6         (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_5)
+#define PINCONF_SGPIO10_1        (PINCONF_FUNC2|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_3)
+#define PINCONF_SGPIO10_2        (PINCONF_FUNC4|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS8|PINCONF_PIN_2)
+#define PINCONF_SGPIO10_3        (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_14)
+#define PINCONF_SGPIO10_4        (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_4)
+#define PINCONF_SGPIO10_5        (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_6)
+#define PINCONF_SGPIO11_1        (PINCONF_FUNC2|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_4)
+#define PINCONF_SGPIO11_2        (PINCONF_FUNC5|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_12)
+#define PINCONF_SGPIO11_3        (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_17)
+#define PINCONF_SGPIO11_4        (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_5)
+#define PINCONF_SGPIO11_5        (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_7)
+#define PINCONF_SGPIO12_1        (PINCONF_FUNC0|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_3)
+#define PINCONF_SGPIO12_2        (PINCONF_FUNC5|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_13)
+#define PINCONF_SGPIO12_3        (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_18)
+#define PINCONF_SGPIO12_4        (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_6)
+#define PINCONF_SGPIO12_5        (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_8)
+#define PINCONF_SGPIO13_1        (PINCONF_FUNC0|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_4)
+#define PINCONF_SGPIO13_2        (PINCONF_FUNC5|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_14)
+#define PINCONF_SGPIO13_3        (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_20)
+#define PINCONF_SGPIO13_4        (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_8)
+#define PINCONF_SGPIO13_5        (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_9)
+#define PINCONF_SGPIO14_1        (PINCONF_FUNC0|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_5)
+#define PINCONF_SGPIO14_2        (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_6)
+#define PINCONF_SGPIO14_3        (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_9)
+#define PINCONF_SGPIO15_1        (PINCONF_FUNC0|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_8)
+#define PINCONF_SGPIO15_2        (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_5)
+#define PINCONF_SGPIO15_3        (PINCONF_FUNC7|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_10)
 
 #define PINCONF_SPIFI_CS         (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_PINS3|PINCONF_PIN_8)
 #define PINCONF_SPIFI_MISO       (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_PINS3|PINCONF_PIN_6)
@@ -719,11 +719,11 @@
 #define PINCONF_SPI_SCK          (PINCONF_FUNC1|PINCONF_PINS3|PINCONF_PIN_3)
 #define PINCONF_SPI_SSEL         (PINCONF_FUNC1|PINCONF_PINS3|PINCONF_PIN_8)
 
-#define PINCONF_SSP0_MISO_1      (PINCONF_FUNC2|PINCONF_PINS3|PINCONF_PIN_7)
-#define PINCONF_SSP0_MISO_2      (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_2)
-#define PINCONF_SSP0_MISO_3      (PINCONF_FUNC5|PINCONF_PINS1|PINCONF_PIN_1)
-#define PINCONF_SSP0_MISO_4      (PINCONF_FUNC5|PINCONF_PINS3|PINCONF_PIN_6)
-#define PINCONF_SSP0_MISO_5      (PINCONF_FUNC7|PINCONF_PINS9|PINCONF_PIN_1)
+#define PINCONF_SSP0_MISO_1      (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_7)
+#define PINCONF_SSP0_MISO_2      (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_2)
+#define PINCONF_SSP0_MISO_3      (PINCONF_FUNC5|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_1)
+#define PINCONF_SSP0_MISO_4      (PINCONF_FUNC5|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_6)
+#define PINCONF_SSP0_MISO_5      (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_1)
 #define PINCONF_SSP0_MOSI_1      (PINCONF_FUNC2|PINCONF_PINS3|PINCONF_PIN_8)
 #define PINCONF_SSP0_MOSI_2      (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_3)
 #define PINCONF_SSP0_MOSI_3      (PINCONF_FUNC5|PINCONF_PINS1|PINCONF_PIN_2)
@@ -738,9 +738,9 @@
 #define PINCONF_SSP0_SSEL_4      (PINCONF_FUNC5|PINCONF_PINS3|PINCONF_PIN_8)
 #define PINCONF_SSP0_SSEL_5      (PINCONF_FUNC7|PINCONF_PINS9|PINCONF_PIN_0)
 
-#define PINCONF_SSP1_MISO_1      (PINCONF_FUNC1|PINCONF_PINS0|PINCONF_PIN_0)
-#define PINCONF_SSP1_MISO_2      (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_6)
-#define PINCONF_SSP1_MISO_3      (PINCONF_FUNC5|PINCONF_PINS1|PINCONF_PIN_3)
+#define PINCONF_SSP1_MISO_1      (PINCONF_FUNC1|PINCONF_INBUFFER|PINCONF_PINS0|PINCONF_PIN_0)
+#define PINCONF_SSP1_MISO_2      (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_6)
+#define PINCONF_SSP1_MISO_3      (PINCONF_FUNC5|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_3)
 #define PINCONF_SSP1_MOSI_1      (PINCONF_FUNC1|PINCONF_PINS0|PINCONF_PIN_1)
 #define PINCONF_SSP1_MOSI_2      (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_7)
 #define PINCONF_SSP1_MOSI_3      (PINCONF_FUNC5|PINCONF_PINS1|PINCONF_PIN_4)
@@ -866,10 +866,10 @@
 
 #define PINCONF_U2_DIR_1         (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_18)
 #define PINCONF_U2_DIR_2         (PINCONF_FUNC7|PINCONF_PINS2|PINCONF_PIN_13)
-#define PINCONF_U2_RXD_1         (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_16)
-#define PINCONF_U2_RXD_2         (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_11)
-#define PINCONF_U2_RXD_3         (PINCONF_FUNC3|PINCONF_PINSA|PINCONF_PIN_2)
-#define PINCONF_U2_RXD_4         (PINCONF_FUNC6|PINCONF_PINS7|PINCONF_PIN_2)
+#define PINCONF_U2_RXD_1         (PINCONF_FUNC1|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_16)
+#define PINCONF_U2_RXD_2         (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_11)
+#define PINCONF_U2_RXD_3         (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_PINSA|PINCONF_PIN_2)
+#define PINCONF_U2_RXD_4         (PINCONF_FUNC6|PINCONF_INBUFFER|PINCONF_PINS7|PINCONF_PIN_2)
 #define PINCONF_U2_TXD_1         (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_15)
 #define PINCONF_U2_TXD_2         (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_10)
 #define PINCONF_U2_TXD_3         (PINCONF_FUNC3|PINCONF_PINSA|PINCONF_PIN_1)
@@ -883,10 +883,10 @@
 #define PINCONF_U3_DIR_1         (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_6)
 #define PINCONF_U3_DIR_2         (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_8)
 #define PINCONF_U3_DIR_3         (PINCONF_FUNC6|PINCONF_PINS4|PINCONF_PIN_4)
-#define PINCONF_U3_RXD_1         (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_3)
-#define PINCONF_U3_RXD_2         (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_4)
-#define PINCONF_U3_RXD_3         (PINCONF_FUNC6|PINCONF_PINS4|PINCONF_PIN_2)
-#define PINCONF_U3_RXD_4         (PINCONF_FUNC7|PINCONF_PINS9|PINCONF_PIN_4)
+#define PINCONF_U3_RXD_1         (PINCONF_FUNC1|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_3)
+#define PINCONF_U3_RXD_2         (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_4)
+#define PINCONF_U3_RXD_3         (PINCONF_FUNC6|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_2)
+#define PINCONF_U3_RXD_4         (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_4)
 #define PINCONF_U3_TXD_1         (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_2)
 #define PINCONF_U3_TXD_2         (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_3)
 #define PINCONF_U3_TXD_3         (PINCONF_FUNC6|PINCONF_PINS4|PINCONF_PIN_1)
@@ -947,27 +947,32 @@
 #define PINCONF_USB1_ULPI_STP_2  (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_10)
 #define PINCONF_USB1_VBUS        (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_5)
 
-#define CLKCONF_CGU_OUT0         (PINCONFIG_DIGITAL|PINCONF_FUNC5|PINCONF_CLK1)
-#define CLKCONF_CGU_OUT1         (PINCONFIG_DIGITAL|PINCONF_FUNC5|PINCONF_CLK3)
-#define CLKCONF_CLKOUT_1         (PINCONFIG_DIGITAL|PINCONF_FUNC1|PINCONF_CLK0)
-#define CLKCONF_CLKOUT_2         (PINCONFIG_DIGITAL|PINCONF_FUNC1|PINCONF_CLK1)
-#define CLKCONF_CLKOUT_3         (PINCONFIG_DIGITAL|PINCONF_FUNC1|PINCONF_CLK2)
-#define CLKCONF_CLKOUT_4         (PINCONFIG_DIGITAL|PINCONF_FUNC1|PINCONF_CLK3)
-#define CLKCONF_EMC_CLK0         (PINCONFIG_DIGITAL|PINCONF_FUNC0|PINCONF_CLK0)
-#define CLKCONF_EMC_CLK01        (PINCONFIG_DIGITAL|PINCONF_FUNC5|PINCONF_CLK0)
-#define CLKCONF_EMC_CLK1         (PINCONFIG_DIGITAL|PINCONF_FUNC0|PINCONF_CLK1)
-#define CLKCONF_EMC_CLK2         (PINCONFIG_DIGITAL|PINCONF_FUNC0|PINCONF_CLK3)
-#define CLKCONF_EMC_CLK23        (PINCONFIG_DIGITAL|PINCONF_FUNC5|PINCONF_CLK2)
-#define CLKCONF_EMC_CLK3         (PINCONFIG_DIGITAL|PINCONF_FUNC0|PINCONF_CLK2)
-#define CLKCONF_ENET_REF_CLK     (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK0)
-#define CLKCONF_ENET_TX_CLK      (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK0)
-#define CLKCONF_I2S0_TX_MCLK     (PINCONFIG_DIGITAL|PINCONF_FUNC6|PINCONF_CLK2)
-#define CLKCONF_I2S1_RX_SCK_1    (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK2)
-#define CLKCONF_I2S1_RX_SCK_2    (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK3)
-#define CLKCONF_I2S1_TX_MCLK     (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK1)
-#define CLKCONF_SD_CLK_1         (PINCONFIG_DIGITAL|PINCONF_FUNC4|PINCONF_CLK0)
-#define CLKCONF_SD_CLK_2         (PINCONFIG_DIGITAL|PINCONF_FUNC4|PINCONF_CLK2)
-#define CLKCONF_SSP1_SCK         (PINCONFIG_DIGITAL|PINCONF_FUNC6|PINCONF_CLK0)
+#define PINCONF_CLK0             (PINCONF_PINSO|PINCONF_PIN_0)
+#define PINCONF_CLK1             (PINCONF_PINSO|PINCONF_PIN_1)
+#define PINCONF_CLK2             (PINCONF_PINSO|PINCONF_PIN_2)
+#define PINCONF_CLK3             (PINCONF_PINSO|PINCONF_PIN_3)
+
+#define CLKCONF_CGU_OUT0         (PINCONF_FUNC5|PINCONF_CLK1)
+#define CLKCONF_CGU_OUT1         (PINCONF_FUNC5|PINCONF_CLK3)
+#define CLKCONF_CLKOUT_1         (PINCONF_FUNC1|PINCONF_CLK0)
+#define CLKCONF_CLKOUT_2         (PINCONF_FUNC1|PINCONF_CLK1)
+#define CLKCONF_CLKOUT_3         (PINCONF_FUNC1|PINCONF_CLK2)
+#define CLKCONF_CLKOUT_4         (PINCONF_FUNC1|PINCONF_CLK3)
+#define CLKCONF_EMC_CLK0         (PINCONF_FUNC0|PINCONF_CLK0)
+#define CLKCONF_EMC_CLK01        (PINCONF_FUNC5|PINCONF_CLK0)
+#define CLKCONF_EMC_CLK1         (PINCONF_FUNC0|PINCONF_CLK1)
+#define CLKCONF_EMC_CLK2         (PINCONF_FUNC0|PINCONF_CLK3)
+#define CLKCONF_EMC_CLK23        (PINCONF_FUNC5|PINCONF_CLK2)
+#define CLKCONF_EMC_CLK3         (PINCONF_FUNC0|PINCONF_CLK2)
+#define CLKCONF_ENET_REF_CLK     (PINCONF_FUNC7|PINCONF_CLK0)
+#define CLKCONF_ENET_TX_CLK      (PINCONF_FUNC7|PINCONF_CLK0)
+#define CLKCONF_I2S0_TX_MCLK     (PINCONF_FUNC6|PINCONF_CLK2)
+#define CLKCONF_I2S1_RX_SCK_1    (PINCONF_FUNC7|PINCONF_CLK2)
+#define CLKCONF_I2S1_RX_SCK_2    (PINCONF_FUNC7|PINCONF_CLK3)
+#define CLKCONF_I2S1_TX_MCLK     (PINCONF_FUNC7|PINCONF_CLK1)
+#define CLKCONF_SD_CLK_1         (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_CLK0)
+#define CLKCONF_SD_CLK_2         (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_CLK2)
+#define CLKCONF_SSP1_SCK         (PINCONF_FUNC6|PINCONF_CLK0)
 
 /****************************************************************************************************
  * Public Types
diff --git a/arch/arm/src/lpc43xx/chip/lpc4337jet100_pinconfig.h b/arch/arm/src/lpc43xx/chip/lpc4337jet100_pinconfig.h
index cf3fcd221325321521d584de99d4d509e601b548..38a951e5e6319b81222027ca3175e511fd1d3708 100644
--- a/arch/arm/src/lpc43xx/chip/lpc4337jet100_pinconfig.h
+++ b/arch/arm/src/lpc43xx/chip/lpc4337jet100_pinconfig.h
@@ -603,23 +603,23 @@
 #define PINCONF_QEI_PHA          (PINCONF_FUNC1|PINCONF_PINSA|PINCONF_PIN_3)
 #define PINCONF_QEI_PHB          (PINCONF_FUNC1|PINCONF_PINSA|PINCONF_PIN_2)
 
-#define PINCONF_SD_CD_1          (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_13)
-#define PINCONF_SD_CD_2          (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_8)
-#define PINCONF_SD_CLK           (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_0)
-#define PINCONF_SD_CMD_1         (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_6)
-#define PINCONF_SD_CMD_2         (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_10)
-#define PINCONF_SD_DAT0_1        (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_9)
-#define PINCONF_SD_DAT0_2        (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_4)
-#define PINCONF_SD_DAT1_1        (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_10)
-#define PINCONF_SD_DAT1_2        (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_5)
-#define PINCONF_SD_DAT2_1        (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_11)
-#define PINCONF_SD_DAT2_2        (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_6)
-#define PINCONF_SD_DAT3_1        (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_12)
-#define PINCONF_SD_DAT3_2        (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_7)
-#define PINCONF_SD_DAT4          (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_11)
-#define PINCONF_SD_DAT5          (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_12)
-#define PINCONF_SD_DAT6          (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_13)
-#define PINCONF_SD_DAT7          (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_14)
+#define PINCONF_SD_CD_1          (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_13)
+#define PINCONF_SD_CD_2          (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_8)
+#define PINCONF_SD_CLK           (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_0)
+#define PINCONF_SD_CMD_1         (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_6)
+#define PINCONF_SD_CMD_2         (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_10)
+#define PINCONF_SD_DAT0_1        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_9)
+#define PINCONF_SD_DAT0_2        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_4)
+#define PINCONF_SD_DAT1_1        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_10)
+#define PINCONF_SD_DAT1_2        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_5)
+#define PINCONF_SD_DAT2_1        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_11)
+#define PINCONF_SD_DAT2_2        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_6)
+#define PINCONF_SD_DAT3_1        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_12)
+#define PINCONF_SD_DAT3_2        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_7)
+#define PINCONF_SD_DAT4          (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_11)
+#define PINCONF_SD_DAT5          (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_12)
+#define PINCONF_SD_DAT6          (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_13)
+#define PINCONF_SD_DAT7          (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_14)
 #define PINCONF_SD_POW_1         (PINCONF_FUNC5|PINCONF_PINSD|PINCONF_PIN_1)
 #define PINCONF_SD_POW_2         (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_5)
 #define PINCONF_SD_POW_3         (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_9)
@@ -945,27 +945,32 @@
 #define PINCONF_USB1_ULPI_STP_2  (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_10)
 #define PINCONF_USB1_VBUS        (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_5)
 
-#define CLKCONF_CGU_OUT0         (PINCONFIG_DIGITAL|PINCONF_FUNC5|PINCONF_CLK1)
-#define CLKCONF_CGU_OUT1         (PINCONFIG_DIGITAL|PINCONF_FUNC5|PINCONF_CLK3)
-#define CLKCONF_CLKOUT_1         (PINCONFIG_DIGITAL|PINCONF_FUNC1|PINCONF_CLK0)
-#define CLKCONF_CLKOUT_2         (PINCONFIG_DIGITAL|PINCONF_FUNC1|PINCONF_CLK1)
-#define CLKCONF_CLKOUT_3         (PINCONFIG_DIGITAL|PINCONF_FUNC1|PINCONF_CLK2)
-#define CLKCONF_CLKOUT_4         (PINCONFIG_DIGITAL|PINCONF_FUNC1|PINCONF_CLK3)
-#define CLKCONF_EMC_CLK0         (PINCONFIG_DIGITAL|PINCONF_FUNC0|PINCONF_CLK0)
-#define CLKCONF_EMC_CLK01        (PINCONFIG_DIGITAL|PINCONF_FUNC5|PINCONF_CLK0)
-#define CLKCONF_EMC_CLK1         (PINCONFIG_DIGITAL|PINCONF_FUNC0|PINCONF_CLK1)
-#define CLKCONF_EMC_CLK2         (PINCONFIG_DIGITAL|PINCONF_FUNC0|PINCONF_CLK3)
-#define CLKCONF_EMC_CLK23        (PINCONFIG_DIGITAL|PINCONF_FUNC5|PINCONF_CLK2)
-#define CLKCONF_EMC_CLK3         (PINCONFIG_DIGITAL|PINCONF_FUNC0|PINCONF_CLK2)
-#define CLKCONF_ENET_REF_CLK     (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK0)
-#define CLKCONF_ENET_TX_CLK      (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK0)
-#define CLKCONF_I2S0_TX_MCLK     (PINCONFIG_DIGITAL|PINCONF_FUNC6|PINCONF_CLK2)
-#define CLKCONF_I2S1_RX_SCK_1    (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK2)
-#define CLKCONF_I2S1_RX_SCK_2    (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK3)
-#define CLKCONF_I2S1_TX_MCLK     (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK1)
-#define CLKCONF_SD_CLK_1         (PINCONFIG_DIGITAL|PINCONF_FUNC4|PINCONF_CLK0)
-#define CLKCONF_SD_CLK_2         (PINCONFIG_DIGITAL|PINCONF_FUNC4|PINCONF_CLK2)
-#define CLKCONF_SSP1_SCK         (PINCONFIG_DIGITAL|PINCONF_FUNC6|PINCONF_CLK0)
+#define PINCONF_CLK0             (PINCONF_PINSO|PINCONF_PIN_0)
+#define PINCONF_CLK1             (PINCONF_PINSO|PINCONF_PIN_1)
+#define PINCONF_CLK2             (PINCONF_PINSO|PINCONF_PIN_2)
+#define PINCONF_CLK3             (PINCONF_PINSO|PINCONF_PIN_3)
+
+#define CLKCONF_CGU_OUT0         (PINCONF_FUNC5|PINCONF_CLK1)
+#define CLKCONF_CGU_OUT1         (PINCONF_FUNC5|PINCONF_CLK3)
+#define CLKCONF_CLKOUT_1         (PINCONF_FUNC1|PINCONF_CLK0)
+#define CLKCONF_CLKOUT_2         (PINCONF_FUNC1|PINCONF_CLK1)
+#define CLKCONF_CLKOUT_3         (PINCONF_FUNC1|PINCONF_CLK2)
+#define CLKCONF_CLKOUT_4         (PINCONF_FUNC1|PINCONF_CLK3)
+#define CLKCONF_EMC_CLK0         (PINCONF_FUNC0|PINCONF_CLK0)
+#define CLKCONF_EMC_CLK01        (PINCONF_FUNC5|PINCONF_CLK0)
+#define CLKCONF_EMC_CLK1         (PINCONF_FUNC0|PINCONF_CLK1)
+#define CLKCONF_EMC_CLK2         (PINCONF_FUNC0|PINCONF_CLK3)
+#define CLKCONF_EMC_CLK23        (PINCONF_FUNC5|PINCONF_CLK2)
+#define CLKCONF_EMC_CLK3         (PINCONF_FUNC0|PINCONF_CLK2)
+#define CLKCONF_ENET_REF_CLK     (PINCONF_FUNC7|PINCONF_CLK0)
+#define CLKCONF_ENET_TX_CLK      (PINCONF_FUNC7|PINCONF_CLK0)
+#define CLKCONF_I2S0_TX_MCLK     (PINCONF_FUNC6|PINCONF_CLK2)
+#define CLKCONF_I2S1_RX_SCK_1    (PINCONF_FUNC7|PINCONF_CLK2)
+#define CLKCONF_I2S1_RX_SCK_2    (PINCONF_FUNC7|PINCONF_CLK3)
+#define CLKCONF_I2S1_TX_MCLK     (PINCONF_FUNC7|PINCONF_CLK1)
+#define CLKCONF_SD_CLK_1         (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_CLK0)
+#define CLKCONF_SD_CLK_2         (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_CLK2)
+#define CLKCONF_SSP1_SCK         (PINCONF_FUNC6|PINCONF_CLK0)
 
 /****************************************************************************************************
  * Public Types
diff --git a/arch/arm/src/lpc43xx/chip/lpc435357_memorymap.h b/arch/arm/src/lpc43xx/chip/lpc435357_memorymap.h
index 1b8312c965f79e505f4d7313be9d4b3f84074e89..852bd2a862e63c7a39c8454ae7a50a988d249307 100644
--- a/arch/arm/src/lpc43xx/chip/lpc435357_memorymap.h
+++ b/arch/arm/src/lpc43xx/chip/lpc435357_memorymap.h
@@ -90,6 +90,8 @@
 /* AHB SRAM */
 
 #define LPC43_AHBSRAM_BANK0_BASE   (LPC43_AHBSRAM_BASE)
+#define LPC43_AHBSRAM_BANK1_BASE   (LPC43_AHBSRAM_BASE + 0x00008000)
+#define LPC43_AHBSRAM_BANK2_BASE   (LPC43_AHBSRAM_BASE + 0x0000c000)
 #define LPC43_EEPROM_BASE          (LPC43_AHBSRAM_BASE + 0x00004000)
 #define LPC43_AHBSRAM_BITBAND_BASE (LPC43_AHBSRAM_BASE + 0x02000000)
 
diff --git a/arch/arm/src/lpc43xx/chip/lpc4357fet256_pinconfig.h b/arch/arm/src/lpc43xx/chip/lpc4357fet256_pinconfig.h
index b29722479a33984a1788f0feddd6a04815aa59fa..ad3a401d20cc16c5a697c08c459be4ca77c64afb 100644
--- a/arch/arm/src/lpc43xx/chip/lpc4357fet256_pinconfig.h
+++ b/arch/arm/src/lpc43xx/chip/lpc4357fet256_pinconfig.h
@@ -190,86 +190,86 @@
 #define PINCONF_CTOUT15_2        (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_0)
 #define PINCONF_CTOUT15_3        (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_11)
 
-#define PINCONF_EMC_A0           (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_9)
-#define PINCONF_EMC_A1           (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_10)
-#define PINCONF_EMC_A2           (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_11)
-#define PINCONF_EMC_A3           (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_12)
-#define PINCONF_EMC_A4           (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_13)
-#define PINCONF_EMC_A5           (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_0)
-#define PINCONF_EMC_A6           (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_1)
-#define PINCONF_EMC_A7           (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_2)
-#define PINCONF_EMC_A8           (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_8)
-#define PINCONF_EMC_A9           (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_7)
-#define PINCONF_EMC_A10          (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_6)
-#define PINCONF_EMC_A11          (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_2)
-#define PINCONF_EMC_A12          (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_1)
-#define PINCONF_EMC_A13          (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_0)
-#define PINCONF_EMC_A14          (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_8)
-#define PINCONF_EMC_A15          (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_7)
-#define PINCONF_EMC_A16          (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_16)
-#define PINCONF_EMC_A17          (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_15)
-#define PINCONF_EMC_A18          (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_0)
-#define PINCONF_EMC_A19          (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_1)
-#define PINCONF_EMC_A20          (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_2)
-#define PINCONF_EMC_A21          (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_3)
-#define PINCONF_EMC_A22          (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_4)
-#define PINCONF_EMC_A23          (PINCONF_FUNC3|PINCONF_PINSA|PINCONF_PIN_4)
-#define PINCONF_EMC_BLS0         (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_4)
-#define PINCONF_EMC_BLS1         (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_6)
-#define PINCONF_EMC_BLS2         (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_13)
-#define PINCONF_EMC_BLS3         (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_10)
-#define PINCONF_EMC_CAS          (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_4)
-#define PINCONF_EMC_CKEOUT0      (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_11)
-#define PINCONF_EMC_CKEOUT1      (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_2)
-#define PINCONF_EMC_CKEOUT2      (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_1)
-#define PINCONF_EMC_CKEOUT3      (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_15)
-#define PINCONF_EMC_CS0          (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_5)
-#define PINCONF_EMC_CS1          (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_3)
-#define PINCONF_EMC_CS2          (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_12)
-#define PINCONF_EMC_CS3          (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_11)
-#define PINCONF_EMC_D0           (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_7)
-#define PINCONF_EMC_D1           (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_8)
-#define PINCONF_EMC_D2           (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_9)
-#define PINCONF_EMC_D3           (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_10)
-#define PINCONF_EMC_D4           (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_11)
-#define PINCONF_EMC_D5           (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_12)
-#define PINCONF_EMC_D6           (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_13)
-#define PINCONF_EMC_D7           (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_14)
-#define PINCONF_EMC_D8           (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_4)
-#define PINCONF_EMC_D9           (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_5)
-#define PINCONF_EMC_D10          (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_6)
-#define PINCONF_EMC_D11          (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_7)
-#define PINCONF_EMC_D12          (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_0)
-#define PINCONF_EMC_D13          (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_1)
-#define PINCONF_EMC_D14          (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_2)
-#define PINCONF_EMC_D15          (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_3)
-#define PINCONF_EMC_D16          (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_2)
-#define PINCONF_EMC_D17          (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_3)
-#define PINCONF_EMC_D18          (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_4)
-#define PINCONF_EMC_D19          (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_5)
-#define PINCONF_EMC_D20          (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_6)
-#define PINCONF_EMC_D21          (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_7)
-#define PINCONF_EMC_D22          (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_8)
-#define PINCONF_EMC_D23          (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_9)
-#define PINCONF_EMC_D24          (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_5)
-#define PINCONF_EMC_D25          (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_6)
-#define PINCONF_EMC_D26          (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_7)
-#define PINCONF_EMC_D27          (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_8)
-#define PINCONF_EMC_D28          (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_9)
-#define PINCONF_EMC_D29          (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_10)
-#define PINCONF_EMC_D30          (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_11)
-#define PINCONF_EMC_D31          (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_12)
-#define PINCONF_EMC_DQMOUT0      (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_12)
-#define PINCONF_EMC_DQMOUT1      (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_10)
-#define PINCONF_EMC_DQMOUT2      (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_0)
-#define PINCONF_EMC_DQMOUT3      (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_13)
-#define PINCONF_EMC_DYCS0        (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_9)
-#define PINCONF_EMC_DYCS1        (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_1)
-#define PINCONF_EMC_DYCS2        (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_14)
-#define PINCONF_EMC_DYCS3        (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_14)
-#define PINCONF_EMC_OE           (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_3)
-#define PINCONF_EMC_RAS          (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_5)
-#define PINCONF_EMC_WE           (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_6)
+#define PINCONF_EMC_A0           (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_9)
+#define PINCONF_EMC_A1           (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_10)
+#define PINCONF_EMC_A2           (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_11)
+#define PINCONF_EMC_A3           (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_12)
+#define PINCONF_EMC_A4           (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_13)
+#define PINCONF_EMC_A5           (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_0)
+#define PINCONF_EMC_A6           (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_1)
+#define PINCONF_EMC_A7           (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_2)
+#define PINCONF_EMC_A8           (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_8)
+#define PINCONF_EMC_A9           (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_7)
+#define PINCONF_EMC_A10          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_6)
+#define PINCONF_EMC_A11          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_2)
+#define PINCONF_EMC_A12          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_1)
+#define PINCONF_EMC_A13          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_0)
+#define PINCONF_EMC_A14          (PINCONF_FUNC1|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_8)
+#define PINCONF_EMC_A15          (PINCONF_FUNC1|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_7)
+#define PINCONF_EMC_A16          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_16)
+#define PINCONF_EMC_A17          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_15)
+#define PINCONF_EMC_A18          (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_0)
+#define PINCONF_EMC_A19          (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_1)
+#define PINCONF_EMC_A20          (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_2)
+#define PINCONF_EMC_A21          (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_3)
+#define PINCONF_EMC_A22          (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_4)
+#define PINCONF_EMC_A23          (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSA|PINCONF_PIN_4)
+#define PINCONF_EMC_BLS0         (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_4)
+#define PINCONF_EMC_BLS1         (PINCONF_FUNC1|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_6)
+#define PINCONF_EMC_BLS2         (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_13)
+#define PINCONF_EMC_BLS3         (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_10)
+#define PINCONF_EMC_CAS          (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_4)
+#define PINCONF_EMC_CKEOUT0      (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_11)
+#define PINCONF_EMC_CKEOUT1      (PINCONF_FUNC1|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_2)
+#define PINCONF_EMC_CKEOUT2      (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_1)
+#define PINCONF_EMC_CKEOUT3      (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_15)
+#define PINCONF_EMC_CS0          (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_5)
+#define PINCONF_EMC_CS1          (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_3)
+#define PINCONF_EMC_CS2          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_12)
+#define PINCONF_EMC_CS3          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_11)
+#define PINCONF_EMC_D0           (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_7)
+#define PINCONF_EMC_D1           (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_8)
+#define PINCONF_EMC_D2           (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_9)
+#define PINCONF_EMC_D3           (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_10)
+#define PINCONF_EMC_D4           (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_11)
+#define PINCONF_EMC_D5           (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_12)
+#define PINCONF_EMC_D6           (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_13)
+#define PINCONF_EMC_D7           (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_14)
+#define PINCONF_EMC_D8           (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS5|PINCONF_PIN_4)
+#define PINCONF_EMC_D9           (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS5|PINCONF_PIN_5)
+#define PINCONF_EMC_D10          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS5|PINCONF_PIN_6)
+#define PINCONF_EMC_D11          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS5|PINCONF_PIN_7)
+#define PINCONF_EMC_D12          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS5|PINCONF_PIN_0)
+#define PINCONF_EMC_D13          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS5|PINCONF_PIN_1)
+#define PINCONF_EMC_D14          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS5|PINCONF_PIN_2)
+#define PINCONF_EMC_D15          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS5|PINCONF_PIN_3)
+#define PINCONF_EMC_D16          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_2)
+#define PINCONF_EMC_D17          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_3)
+#define PINCONF_EMC_D18          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_4)
+#define PINCONF_EMC_D19          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_5)
+#define PINCONF_EMC_D20          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_6)
+#define PINCONF_EMC_D21          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_7)
+#define PINCONF_EMC_D22          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_8)
+#define PINCONF_EMC_D23          (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_9)
+#define PINCONF_EMC_D24          (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_5)
+#define PINCONF_EMC_D25          (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_6)
+#define PINCONF_EMC_D26          (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_7)
+#define PINCONF_EMC_D27          (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_8)
+#define PINCONF_EMC_D28          (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_9)
+#define PINCONF_EMC_D29          (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_10)
+#define PINCONF_EMC_D30          (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_11)
+#define PINCONF_EMC_D31          (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_12)
+#define PINCONF_EMC_DQMOUT0      (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_12)
+#define PINCONF_EMC_DQMOUT1      (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_10)
+#define PINCONF_EMC_DQMOUT2      (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_0)
+#define PINCONF_EMC_DQMOUT3      (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_13)
+#define PINCONF_EMC_DYCS0        (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_9)
+#define PINCONF_EMC_DYCS1        (PINCONF_FUNC1|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_1)
+#define PINCONF_EMC_DYCS2        (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_14)
+#define PINCONF_EMC_DYCS3        (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_14)
+#define PINCONF_EMC_OE           (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_3)
+#define PINCONF_EMC_RAS          (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_5)
+#define PINCONF_EMC_WE           (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_6)
 
 #define PINCONF_ENET_COL_1       (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_SLEW_FAST|PINCONF_PINS0|PINCONF_PIN_1)
 #define PINCONF_ENET_COL_2       (PINCONF_FUNC5|PINCONF_INBUFFER|PINCONF_SLEW_FAST|PINCONF_PINS9|PINCONF_PIN_6)
@@ -603,23 +603,23 @@
 #define PINCONF_QEI_PHA          (PINCONF_FUNC1|PINCONF_PINSA|PINCONF_PIN_3)
 #define PINCONF_QEI_PHB          (PINCONF_FUNC1|PINCONF_PINSA|PINCONF_PIN_2)
 
-#define PINCONF_SD_CD_1          (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_13)
-#define PINCONF_SD_CD_2          (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_8)
-#define PINCONF_SD_CLK           (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_0)
-#define PINCONF_SD_CMD_1         (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_6)
-#define PINCONF_SD_CMD_2         (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_10)
-#define PINCONF_SD_DAT0_1        (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_9)
-#define PINCONF_SD_DAT0_2        (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_4)
-#define PINCONF_SD_DAT1_1        (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_10)
-#define PINCONF_SD_DAT1_2        (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_5)
-#define PINCONF_SD_DAT2_1        (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_11)
-#define PINCONF_SD_DAT2_2        (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_6)
-#define PINCONF_SD_DAT3_1        (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_12)
-#define PINCONF_SD_DAT3_2        (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_7)
-#define PINCONF_SD_DAT4          (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_11)
-#define PINCONF_SD_DAT5          (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_12)
-#define PINCONF_SD_DAT6          (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_13)
-#define PINCONF_SD_DAT7          (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_14)
+#define PINCONF_SD_CD_1          (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_13)
+#define PINCONF_SD_CD_2          (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_8)
+#define PINCONF_SD_CLK           (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_0)
+#define PINCONF_SD_CMD_1         (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_6)
+#define PINCONF_SD_CMD_2         (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_10)
+#define PINCONF_SD_DAT0_1        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_9)
+#define PINCONF_SD_DAT0_2        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_4)
+#define PINCONF_SD_DAT1_1        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_10)
+#define PINCONF_SD_DAT1_2        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_5)
+#define PINCONF_SD_DAT2_1        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_11)
+#define PINCONF_SD_DAT2_2        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_6)
+#define PINCONF_SD_DAT3_1        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_12)
+#define PINCONF_SD_DAT3_2        (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_7)
+#define PINCONF_SD_DAT4          (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_11)
+#define PINCONF_SD_DAT5          (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_12)
+#define PINCONF_SD_DAT6          (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_13)
+#define PINCONF_SD_DAT7          (PINCONF_FUNC7|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_14)
 #define PINCONF_SD_POW_1         (PINCONF_FUNC5|PINCONF_PINSD|PINCONF_PIN_1)
 #define PINCONF_SD_POW_2         (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_5)
 #define PINCONF_SD_POW_3         (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_9)
@@ -945,27 +945,32 @@
 #define PINCONF_USB1_ULPI_STP_2  (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_10)
 #define PINCONF_USB1_VBUS        (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_5)
 
-#define CLKCONF_CGU_OUT0         (PINCONFIG_DIGITAL|PINCONF_FUNC5|PINCONF_CLK1)
-#define CLKCONF_CGU_OUT1         (PINCONFIG_DIGITAL|PINCONF_FUNC5|PINCONF_CLK3)
-#define CLKCONF_CLKOUT_1         (PINCONFIG_DIGITAL|PINCONF_FUNC1|PINCONF_CLK0)
-#define CLKCONF_CLKOUT_2         (PINCONFIG_DIGITAL|PINCONF_FUNC1|PINCONF_CLK1)
-#define CLKCONF_CLKOUT_3         (PINCONFIG_DIGITAL|PINCONF_FUNC1|PINCONF_CLK2)
-#define CLKCONF_CLKOUT_4         (PINCONFIG_DIGITAL|PINCONF_FUNC1|PINCONF_CLK3)
-#define CLKCONF_EMC_CLK0         (PINCONFIG_DIGITAL|PINCONF_FUNC0|PINCONF_CLK0)
-#define CLKCONF_EMC_CLK01        (PINCONFIG_DIGITAL|PINCONF_FUNC5|PINCONF_CLK0)
-#define CLKCONF_EMC_CLK1         (PINCONFIG_DIGITAL|PINCONF_FUNC0|PINCONF_CLK1)
-#define CLKCONF_EMC_CLK2         (PINCONFIG_DIGITAL|PINCONF_FUNC0|PINCONF_CLK3)
-#define CLKCONF_EMC_CLK23        (PINCONFIG_DIGITAL|PINCONF_FUNC5|PINCONF_CLK2)
-#define CLKCONF_EMC_CLK3         (PINCONFIG_DIGITAL|PINCONF_FUNC0|PINCONF_CLK2)
-#define CLKCONF_ENET_REF_CLK     (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK0)
-#define CLKCONF_ENET_TX_CLK      (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK0)
-#define CLKCONF_I2S0_TX_MCLK     (PINCONFIG_DIGITAL|PINCONF_FUNC6|PINCONF_CLK2)
-#define CLKCONF_I2S1_RX_SCK_1    (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK2)
-#define CLKCONF_I2S1_RX_SCK_2    (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK3)
-#define CLKCONF_I2S1_TX_MCLK     (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK1)
-#define CLKCONF_SD_CLK_1         (PINCONFIG_DIGITAL|PINCONF_FUNC4|PINCONF_CLK0)
-#define CLKCONF_SD_CLK_2         (PINCONFIG_DIGITAL|PINCONF_FUNC4|PINCONF_CLK2)
-#define CLKCONF_SSP1_SCK         (PINCONFIG_DIGITAL|PINCONF_FUNC6|PINCONF_CLK0)
+#define PINCONF_CLK0             (PINCONF_PINSO|PINCONF_PIN_0)
+#define PINCONF_CLK1             (PINCONF_PINSO|PINCONF_PIN_1)
+#define PINCONF_CLK2             (PINCONF_PINSO|PINCONF_PIN_2)
+#define PINCONF_CLK3             (PINCONF_PINSO|PINCONF_PIN_3)
+
+#define CLKCONF_CGU_OUT0         (PINCONF_FUNC5|PINCONF_CLK1)
+#define CLKCONF_CGU_OUT1         (PINCONF_FUNC5|PINCONF_CLK3)
+#define CLKCONF_CLKOUT_1         (PINCONF_FUNC1|PINCONF_CLK0)
+#define CLKCONF_CLKOUT_2         (PINCONF_FUNC1|PINCONF_CLK1)
+#define CLKCONF_CLKOUT_3         (PINCONF_FUNC1|PINCONF_CLK2)
+#define CLKCONF_CLKOUT_4         (PINCONF_FUNC1|PINCONF_CLK3)
+#define CLKCONF_EMC_CLK0         (PINCONF_FUNC0|PINCONF_CLK0)
+#define CLKCONF_EMC_CLK01        (PINCONF_FUNC5|PINCONF_CLK0)
+#define CLKCONF_EMC_CLK1         (PINCONF_FUNC0|PINCONF_CLK1)
+#define CLKCONF_EMC_CLK2         (PINCONF_FUNC0|PINCONF_CLK3)
+#define CLKCONF_EMC_CLK23        (PINCONF_FUNC5|PINCONF_CLK2)
+#define CLKCONF_EMC_CLK3         (PINCONF_FUNC0|PINCONF_CLK2)
+#define CLKCONF_ENET_REF_CLK     (PINCONF_FUNC7|PINCONF_CLK0)
+#define CLKCONF_ENET_TX_CLK      (PINCONF_FUNC7|PINCONF_CLK0)
+#define CLKCONF_I2S0_TX_MCLK     (PINCONF_FUNC6|PINCONF_CLK2)
+#define CLKCONF_I2S1_RX_SCK_1    (PINCONF_FUNC7|PINCONF_CLK2)
+#define CLKCONF_I2S1_RX_SCK_2    (PINCONF_FUNC7|PINCONF_CLK3)
+#define CLKCONF_I2S1_TX_MCLK     (PINCONF_FUNC7|PINCONF_CLK1)
+#define CLKCONF_SD_CLK_1         (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_CLK0)
+#define CLKCONF_SD_CLK_2         (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_CLK2)
+#define CLKCONF_SSP1_SCK         (PINCONF_FUNC6|PINCONF_CLK0)
 
 /****************************************************************************************************
  * Public Types
diff --git a/arch/arm/src/lpc43xx/chip/lpc43_ccu.h b/arch/arm/src/lpc43xx/chip/lpc43_ccu.h
index a2cb20ca62f67d823682ab60232c816dea209923..51cdcdb9fc90230b1a37901b80f9bdc2b2e91a4b 100644
--- a/arch/arm/src/lpc43xx/chip/lpc43_ccu.h
+++ b/arch/arm/src/lpc43xx/chip/lpc43_ccu.h
@@ -1,7 +1,7 @@
 /****************************************************************************************************
  * arch/arm/src/lpc43xx/chip/lpc43_ccu.h
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -45,6 +45,7 @@
 /****************************************************************************************************
  * Pre-processor Definitions
  ****************************************************************************************************/
+
 /* Register Offsets *********************************************************************************/
 
 #define LPC43_CCU1_PM_OFFSET                 0x0000 /* CCU1 power mode register */
@@ -343,6 +344,23 @@
 #define CCU_CLK_STAT_WAKEUP                  (1 << 2)  /* Bit 2:  Wake-up mechanism enable status */
                                                        /* Bits 3-31:  Reserved */
 
+/* CCU1 Branch Clock EMCDIV Configuration Registers */
+
+#define CCU_CLK_EMCDIV_CFG_RUN               (1 << 0)  /* Bit 0: Run enable */
+#define CCU_CLK_EMCDIV_CFG_AUTO              (1 << 1)  /* Bit 1: Auto (AHB disable mechanism) enable */
+#define CCU_CLK_EMCDIV_CFG_WAKEUP            (1 << 2)  /* Bit 2: Wake-up mechanism enable */
+                                                       /* Bits 3-4: Reserved */
+#define CCU_CLK_EMCDIV_CLOCK_DIV_SHIFT       (5)                                         /* Bits 5-7: Clock divider */
+#define CCU_CLK_EMCDIV_CLOCK_DIV_MASK        (7 << CCU_CLK_EMCDIV_CLOCK_DIV_SHIFT)
+#  define CCU_CLK_EMCDIV_CFG_DIV_FUNC(n)     ((n) << CCU_CLK_EMCDIV_CLOCK_DIV_SHIFT)
+#  define CCU_CLK_EMCDIV_CFG_DIV_NODIV       (0 << CCU_CLK_EMCDIV_CLOCK_DIV_SHIFT) /* Bit 5-7: No division */
+#  define CCU_CLK_EMCDIV_CFG_DIV_BY2         (1 << CCU_CLK_EMCDIV_CLOCK_DIV_SHIFT) /* Bit 5-7: Division by 2 */
+                                                       /* Bits 8-26: Reserved */
+#define CCU_CLK_EMCDIV_CLOCK_DIVSTAT_SHIFT   (27)                                        /* Bits 27-29: Clock divider status */
+#define CCU_CLK_EMCDIV_CLOCK_DIVSTAT_MASK    (7 << CCU_CLK_EMCDIV_CLOCK_DIVSTAT_SHIFT)
+#  define CCU_CLK_EMCDIV_CFG_DIVSTAT_NODIV   (0 << CCU_CLK_EMCDIV_CLOCK_DIVSTAT_SHIFT) /* Bit 27-29: No division */
+#  define CCU_CLK_EMCDIV_CFG_DIVSTAT_BY2     (1 << CCU_CLK_EMCDIV_CLOCK_DIVSTAT_MASK)  /* Bit 26-29: Divistion by 2 */
+
 /****************************************************************************************************
  * Public Types
  ****************************************************************************************************/
diff --git a/arch/arm/src/lpc43xx/chip/lpc43_emc.h b/arch/arm/src/lpc43xx/chip/lpc43_emc.h
index 4fb3ae38be61f47a15f3a0fae38a11550dbb4bc9..b61cbcbc58523f27b75dc428cd83c4bb55eeb20f 100644
--- a/arch/arm/src/lpc43xx/chip/lpc43_emc.h
+++ b/arch/arm/src/lpc43xx/chip/lpc43_emc.h
@@ -1,7 +1,7 @@
 /****************************************************************************************************
  * arch/arm/src/lpc43xx/chip/lpc43_emc.h
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -45,6 +45,7 @@
 /****************************************************************************************************
  * Pre-processor Definitions
  ****************************************************************************************************/
+
 /* Register Offsets *********************************************************************************/
 
 #define LPC43_EMC_CONTROL_OFFSET          0x0000 /* EMC Control register */
@@ -213,6 +214,7 @@
 #define EMC_CONTROL_LOWPOWER              (1 << 2)  /* Bit 2:  Low-power mode */
                                                     /* Bits 3-31: Reserved */
 /* EMC Status register */
+
 #define EMC__
 #define EMC_STATUS_BUSY                   (1 << 0)  /* Bit 0:  Busy */
 #define EMC_STATUS_WB                     (1 << 1)  /* Bit 1:  Write buffer status */
@@ -333,13 +335,64 @@
 #  define EMC_DYNCONFIG_MD_SDRAM           (0 << EMC_DYNCONFIG_MD_SHIFT) /* SDRAM (POR reset value) */
                                                      /* Bits 5-6: Reserved */
 #define EMC_DYNCONFIG_AM0_SHIFT            (7)       /* Bits 7-12: AM0 Address mapping (see user manual) */
-#define EMC_DYNCONFIG_AM0_MASK             (0x3f << EMC_DYNCONFIG_AM0_SHIFT)
+#define EMC_DYNCONFIG_AM0_MASK             (0x3F << EMC_DYNCONFIG_AM0_SHIFT)
                                                      /* Bit 13: Reserved */
 #define EMC_DYNCONFIG_AM1                  (1 << 14) /* Bit 14: AM1 Address mapping (see user manual) */
                                                      /* Bits 15-18: Reserved */
-#define EMC_DYNCONFIG_BENA                 (1 << 10) /* Bit 19: Buffer enable */
+#define EMC_DYNCONFIG_BENA                 (1 << 19) /* Bit 19: Buffer enable */
 #define EMC_DYNCONFIG_WP                   (1 << 20) /* Bit 20: Write protect. */
                                                      /* Bits 21-31: Reserved */
+
+/* Dynamic Memory Configuration register  Memory Configuration Values */
+/* TODO: complete configuration */
+
+/* Data Bus Width Value in LPC43_EMC_DYNCONFIG register (bit 14) */
+
+#define EMC_DYNCONFIG_DATA_BUS_16          (0 << 14) /* Data bus width 16 bit */
+#define EMC_DYNCONFIG_DATA_BUS_32          (1 << 14) /* Data bus width 32 bit */
+
+/* Low power SDRAM value in LPC43_EMC_DYNCONFIG register (bit 12) */
+
+#define EMC_DYNCONFIG_LPSDRAM              (1 << 12) /* Low power SDRAM value (Bank, Row, Column)*/
+#define EMC_DYNCONFIG_HPSDRAM              (0 << 12) /* High performance SDRAM value (Row, Bank, Column)*/
+
+/* Address mapping table for LPC43_EMC_DYNCONFIG register (bits 7-11) */
+
+/* Device size bits in LPC43_EMC_DYNCONFIG register (bits 9-11) */
+
+#define EMC_DYNCONFIG_DEV_SIZE_SHIFT       (9)
+#define EMC_DYNCONFIG_DEV_SIZE_MASK        (0x7)
+#  define EMC_DYNCONFIG_DEV_SIZE_16Mb      (0x00 << EMC_DYNCONFIG_DEV_SIZE_SHIFT)
+#  define EMC_DYNCONFIG_DEV_SIZE_64Mb      (0x01 << EMC_DYNCONFIG_DEV_SIZE_SHIFT)
+#  define EMC_DYNCONFIG_DEV_SIZE_128Mb     (0x02 << EMC_DYNCONFIG_DEV_SIZE_SHIFT)
+#  define EMC_DYNCONFIG_DEV_SIZE_256Mb     (0x03 << EMC_DYNCONFIG_DEV_SIZE_SHIFT)
+#  define EMC_DYNCONFIG_DEV_SIZE_512Mb     (0x04 << EMC_DYNCONFIG_DEV_SIZE_SHIFT)
+
+/* Bus width bits in LPC43_EMC_DYNCONFIG register (bits 7-8) */
+
+#define EMC_DYNCONFIG_DEV_BUS_SHIFT        (7)
+#define EMC_DYNCONFIG_DEV_BUS_MASK         (0x3)
+#  define EMC_DYNCONFIG_DEV_BUS_8          (0x00 << EMC_DYNCONFIG_DEV_BUS_SHIFT)
+#  define EMC_DYNCONFIG_DEV_BUS_16         (0x01 << EMC_DYNCONFIG_DEV_BUS_SHIFT)
+#  define EMC_DYNCONFIG_DEV_BUS_32         (0x02 << EMC_DYNCONFIG_DEV_BUS_SHIFT)
+
+#define EMC_DYNCONFIG_2Mx8_2BANKS_11ROWS_9COLS    ((0x0 << 9) | (0x0 << 7))  /* 16Mb  (2Mx8),   2 banks, row length = 11, column length = 9  */
+#define EMC_DYNCONFIG_1Mx16_2BANKS_11ROWS_8COLS   ((0x0 << 9) | (0x1 << 7))  /* 16Mb  (1Mx16),  2 banks, row length = 11, column length = 8  */
+#define EMC_DYNCONFIG_8Mx8_4BANKS_12ROWS_9COLS    ((0x1 << 9) | (0x0 << 7))  /* 64Mb  (8Mx8),   4 banks, row length = 12, column length = 9  */
+#define EMC_DYNCONFIG_4Mx16_4BANKS_12ROWS_8COLS   ((0x1 << 9) | (0x1 << 7))  /* 64Mb  (4Mx16),  4 banks, row length = 12, column length = 8  */
+#define EMC_DYNCONFIG_2Mx32_4BANKS_11ROWS_8COLS   ((0x1 << 9) | (0x2 << 7))  /* 64Mb  (2Mx32),  4 banks, row length = 11, column length = 8, 32 bit bus only */
+#define EMC_DYNCONFIG_16Mx8_4BANKS_12ROWS_10COLS  ((0x2 << 9) | (0x0 << 7))  /* 128Mb (16Mx8),  4 banks, row length = 12, column length = 10 */
+#define EMC_DYNCONFIG_8Mx16_4BANKS_12ROWS_9COLS   ((0x2 << 9) | (0x1 << 7))  /* 128Mb (8Mx16),  4 banks, row length = 12, column length = 9  */
+#define EMC_DYNCONFIG_4Mx32_4BANKS_12ROWS_8COLS   ((0x2 << 9) | (0x2 << 7))  /* 128Mb (4Mx32),  4 banks, row length = 12, column length = 8  */
+#define EMC_DYNCONFIG_32Mx8_4BANKS_13ROWS_10COLS  ((0x3 << 9) | (0x0 << 7))  /* 256Mb (32Mx8),  4 banks, row length = 13, column length = 10, 32 bit bus only */
+#define EMC_DYNCONFIG_16Mx16_4BANKS_13ROWS_9COLS  ((0x3 << 9) | (0x1 << 7))  /* 256Mb (16Mx16), 4 banks, row length = 13, column length = 9  */
+#define EMC_DYNCONFIG_8Mx32_4BANKS_13ROWS_8COLS   ((0x3 << 9) | (0x2 << 7))  /* 256Mb (8Mx32),  4 banks, row length = 13, column length = 8, 32 bit bus only  */
+#define EMC_DYNCONFIG_8Mx32_4BANKS_12ROWS_9COLS   ((0x2 << 9) | (0x1 << 7))  /* 256Mb (8Mx32),  4 banks, row length = 12, column length = 9, 32 bit bus only  */
+#define EMC_DYNCONFIG_64Mx8_4BANKS_13ROWS_10COLS  ((0x4 << 9) | (0x0 << 7))  /* 512Mb (64Mx8),  4 banks, row length = 13, column length = 11 */
+#define EMC_DYNCONFIG_32Mx16_4BANKS_13ROWS_10COLS ((0x4 << 9) | (0x1 << 7))  /* 512Mb (32Mx16), 4 banks, row length = 13, column length = 10 */
+#define EMC_DYNCONFIG_16Mx32_4BANKS_13ROWS_9COLS  ((0x3 << 9) | (0x1 << 7))  /* 512Mb (16Mx32), 4 banks, row length = 13, column length = 9, 32 bit bus only  */
+#define EMC_DYNCONFIG_32Mx32_4BANKS_13ROWS_10COLS ((0x4 << 9) | (0x1 << 7))  /* 1Gb   (32Mx32), 4 banks, row length = 13, column length = 10,32 bit bus only  */
+
 /* Dynamic Memory RAS & CAS Delay registers */
 
 #define EMC_DYNRASCAS_RAS_SHIFT            (0)       /* Bits 0-1: RAS latency (active to read/write delay) */
@@ -354,6 +407,35 @@
 #  define EMC_DYNRASCAS_CAS_2CCLK          (2 << EMC_DYNRASCAS_CAS_SHIFT) /* Two CCLK cycles */
 #  define EMC_DYNRASCAS_CAS_3CCLK          (3 << EMC_DYNRASCAS_CAS_SHIFT) /* Three CCLK cycles (POR reset value) */
                                                      /* Bits 10-31: Reserved */
+
+/* Dynamic SDRAM mode register definitions */
+
+                                                     /* Bits 0-2: Burst length. All other values are reserved. */
+#define EMC_DYNMODE_BURST_LENGTH_SHIFT     (0)
+#define EMC_DYNMODE_BURST_LENGTH_MASK      (0x7)
+#  define EMC_DYNMODE_BURST_LENGTH_1       (0 << EMC_DYNMODE_BURST_LENGTH_SHIFT)
+#  define EMC_DYNMODE_BURST_LENGTH_2       (1 << EMC_DYNMODE_BURST_LENGTH_SHIFT)
+#  define EMC_DYNMODE_BURST_LENGTH_4       (2 << EMC_DYNMODE_BURST_LENGTH_SHIFT)
+#  define EMC_DYNMODE_BURST_LENGTH_8       (3 << EMC_DYNMODE_BURST_LENGTH_SHIFT)
+                                                     /* Bit 3: Burst mode type */
+#define EMC_DYNMODE_BURST_TYPE_SHIFT            (3)
+#  define EMC_DYNMODE_BURST_TYPE_SEQUENTIAL     (0 << EMC_DYNMODE_BURST_TYPE_SHIFT)       /* burst type sequential */
+#  define EMC_DYNMODE_BURST_TYPE_INTERLEAVED    (1 << EMC_DYNMODE_BURST_TYPE_INTERLEAVED) /* burst type interleaved */
+                                                     /* Bits 4-6: Latency mode. All other values are reserved. */
+#define EMC_DYNMODE_CAS_SHIFT              (4)
+#define EMC_DYNMODE_CAS_MASK               (0x7)
+#  define EMC_DYNMODE_CAS_2                (2 << EMC_DYNMODE_CAS_SHIFT) /* CAS latency of 2 cycles */
+#  define EMC_DYNMODE_CAS_3                (3 << EMC_DYNMODE_CAS_SHIFT) /* CAS latency of 3 cycles */
+                                                     /* Bits 7-8: Operating mode. All other values are reserved. */
+#define EMC_DYNMODE_OPMODE_SHIFT           (7)
+#define EMC_DYNMODE_OPMODE_MASK            (0x3)
+#  define EMC_DYNMODE_OPMODE_STANDARD      (0 << EMC_DYNMODE_OPMODE_SHIFT) /* dynamic standard operation mode */
+                                                    /* Bit 9: Write burst mode */
+#define EMC_DYNMODE_WBMODE_SHIFT           (9)
+#  define EMC_DYNMODE_WBMODE_PROGRAMMED    (0 << EMC_DYNMODE_WBMODE_SHIFT) /* write burst mode programmed */
+#  define EMC_DYNMODE_WBMODE_SINGLE_LOC    (1 << EMC_DYNMODE_WBMODE_SHIFT) /* write burst mode single loc */
+                                                    /* Bits 10-11: Reserved */
+
 /* Static Memory Configuration registers */
 
 #define EMC_STATCONFIG_MW_SHIFT            (0)       /* Bits 0-1: Memory width */
diff --git a/arch/arm/src/lpc43xx/chip/lpc43_ethernet.h b/arch/arm/src/lpc43xx/chip/lpc43_ethernet.h
index 6da125a6fee22b81277562c9892efb9eaa4022f6..d03ed7123b0f551b34bd7e94f07d4fbd3b4d8c76 100644
--- a/arch/arm/src/lpc43xx/chip/lpc43_ethernet.h
+++ b/arch/arm/src/lpc43xx/chip/lpc43_ethernet.h
@@ -653,15 +653,5 @@ struct eth_rxdesc_s
  * Public Functions
  ****************************************************************************************************/
 
-#undef EXTERN
-#if defined(__cplusplus)
-#define EXTERN extern "C"
-extern "C"
-{
-#else
-#define EXTERN extern
-#endif
-
 #endif /* __ASSEMBLY__ */
 #endif /* __ARCH_ARM_SRC_LPC43XX_CHIP_LPC43_ETHERNET_H */
-
diff --git a/arch/arm/src/lpc43xx/chip/lpc43_gpdma.h b/arch/arm/src/lpc43xx/chip/lpc43_gpdma.h
index 2139e09766f17c545223e04560c080ded3305eb3..6becfe92223d3a55cc69d5e90002087f830c3b9a 100644
--- a/arch/arm/src/lpc43xx/chip/lpc43_gpdma.h
+++ b/arch/arm/src/lpc43xx/chip/lpc43_gpdma.h
@@ -59,7 +59,7 @@
 #define LPC43_GPDMA_SOFTSREQ_OFFSET       0x0024 /* DMA Software Single Request Register */
 #define LPC43_GPDMA_SOFTLBREQ_OFFSET      0x0028 /* DMA Software Last Burst Request Register */
 #define LPC43_GPDMA_SOFTLSREQ_OFFSET      0x002c /* DMA Software Last Single Request Register */
-#define LPC43_GPDMA_CONFIG_OFFSET         0x0030 /* DMA Configuration Register */
+#define LPC43_GPDMA_GLOBAL_CONFIG_OFFSET  0x0030 /* DMA Configuration Register */
 #define LPC43_GPDMA_SYNC_OFFSET           0x0034 /* DMA Synchronization Register */
 
 /* Channel registers */
@@ -70,12 +70,12 @@
 #define LPC43_GPDMA_CONTROL_CHOFFSET      0x000c /* DMA Channel Control Register */
 #define LPC43_GPDMA_CONFIG_CHOFFSET       0x0010 /* DMA Channel Configuration Register */
 
-#define LPC43_GPDMA_CHOFFSET(n)           (0x0100 ((n) << 5))
+#define LPC43_GPDMA_CHOFFSET(n)           (0x0100 + ((n) << 5))
 #define LPC43_GPDMA_SRCADDR_OFFSET(n)     (LPC43_GPDMA_CHOFFSET(n)+LPC43_GPDMA_SRCADDR_CHOFFSET)
 #define LPC43_GPDMA_DESTADDR_OFFSET(n)    (LPC43_GPDMA_CHOFFSET(n)+LPC43_GPDMA_DESTADDR_CHOFFSET)
 #define LPC43_GPDMA_LLI_OFFSET(n)         (LPC43_GPDMA_CHOFFSET(n)+LPC43_GPDMA_LLI_CHOFFSET)
 #define LPC43_GPDMA_CONTROL_OFFSET(n)     (LPC43_GPDMA_CHOFFSET(n)+LPC43_GPDMA_CONTROL_CHOFFSET)
-#define LPC43_GPDMA_CONFIG_OFFSET(n)      (LPC43_GPDMA_CHOFFSET(n)+LPC43_GPDMA_CONFIG_CHOFFSET)
+#define LPC43_GPDMA_CONFIG_OFFSET_(n)     (LPC43_GPDMA_CHOFFSET(n)+LPC43_GPDMA_CONFIG_CHOFFSET)
 
 #define LPC43_GPDMA_SRCADDR0_OFFSET       0x0100 /* DMA Channel 0 Source Address Register */
 #define LPC43_GPDMA_DESTADDR0_OFFSET      0x0104 /* DMA Channel 0 Destination Address Register */
@@ -139,7 +139,7 @@
 #define LPC43_GPDMA_SOFTSREQ              (LPC43_DMA_BASE+LPC43_GPDMA_SOFTSREQ_OFFSET)
 #define LPC43_GPDMA_SOFTLBREQ             (LPC43_DMA_BASE+LPC43_GPDMA_SOFTLBREQ_OFFSET)
 #define LPC43_GPDMA_SOFTLSREQ             (LPC43_DMA_BASE+LPC43_GPDMA_SOFTLSREQ_OFFSET)
-#define LPC43_GPDMA_CONFIG                (LPC43_DMA_BASE+LPC43_GPDMA_CONFIG_OFFSET)
+#define LPC43_GPDMA_GLOBAL_CONFIG         (LPC43_DMA_BASE+LPC43_GPDMA_GLOBAL_CONFIG_OFFSET)
 #define LPC43_GPDMA_SYNC                  (LPC43_DMA_BASE+LPC43_GPDMA_SYNC_OFFSET)
 
 /* Channel registers */
@@ -149,7 +149,7 @@
 #define LPC43_GPDMA_DESTADDR(n)           (LPC43_DMA_BASE+LPC43_GPDMA_DESTADDR_OFFSET(n))
 #define LPC43_GPDMA_LLI(n)                (LPC43_DMA_BASE+LPC43_GPDMA_LLI_OFFSET(n))
 #define LPC43_GPDMA_CONTROL(n)            (LPC43_DMA_BASE+LPC43_GPDMA_CONTROL_OFFSET(n))
-#define LPC43_GPDMA_CONFIG(n)             (LPC43_DMA_BASE+LPC43_GPDMA_CONFIG_OFFSET(n))
+#define LPC43_GPDMA_CONFIG_(n)            (LPC43_DMA_BASE+LPC43_GPDMA_CONFIG_OFFSET_(n))
 
 #define LPC43_GPDMA_SRCADDR0              (LPC43_DMA_BASE+LPC43_GPDMA_SRCADDR0_OFFSET)
 #define LPC43_GPDMA_DESTADDR0             (LPC43_DMA_BASE+LPC43_GPDMA_DESTADDR0_OFFSET)
@@ -203,6 +203,9 @@
 
 /* Common macros for DMA channel and source bit settings */
 
+#define DMACH_ALL                         (0xff)
+#define LPC43_NDMACH                      8          /* Eight DMA channels */
+#define LPC43_NDMAREQ                     (16)       /* The number of DMA requests */
 #define GPDMA_CHANNEL(n)                  (1 << (n)) /* Bits 0-7 correspond to DMA channel 0-7 */
 #define GPDMA_SOURCE(n)                   (1 << (n)) /* Bits 0-15 correspond to DMA source 0-15 */
 #define GPDMA_REQUEST(n)                  (1 << (n)) /* Bits 0-15 correspond to DMA request 0-15 */
@@ -258,9 +261,9 @@
                                                      /* Bits 16-31: Reserved */
 /* DMA Configuration Register */
 
-#define GPDMA_CONFIG_ENA                  (1 << 0)  /* Bit 0:  DMA Controller enable */
-#define GPDMA_CONFIG_M0                   (1 << 1)  /* Bit 1:  AHB Master 0 endianness configuration */
-#define GPDMA_CONFIG_M1                   (1 << 2)  /* Bit 2:  M1 AHB Master 1 endianness configuration */
+#define GPDMA_GLOBAL_CONFIG_ENA           (1 << 0)  /* Bit 0:  DMA Controller enable */
+#define GPDMA_GLOBAL_CONFIG_M0            (1 << 1)  /* Bit 1:  AHB Master 0 endianness configuration */
+#define GPDMA_GLOBAL_CONFIG_M1            (1 << 2)  /* Bit 2:  M1 AHB Master 1 endianness configuration */
                                                     /* Bits 3-31: Reserved */
 /* DMA Synchronization Register */
 
@@ -280,15 +283,15 @@
 #define GPDMA_CONTROL_XFRSIZE_SHIFT      (0)       /* Bits 0-11: Transfer size in number of transfers */
 #define GPDMA_CONTROL_XFRSIZE_MASK       (0xfff << GPDMA_CONTROL_XFRSIZE_SHIFT)
 #define GPDMA_CONTROL_SBSIZE_SHIFT       (12)      /* Bits 12-14: Source burst size */
-#define GPDMA_CONTROL_SBSIZE_MASK        (7 << GPDMA_CONTROL_XFRSIZE_MASK)
-#  define GPDMA_CONTROL_SBSIZE_1         (0 << GPDMA_CONTROL_XFRSIZE_MASK) /* Source burst size = 1 */
-#  define GPDMA_CONTROL_SBSIZE_4         (1 << GPDMA_CONTROL_XFRSIZE_MASK) /* Source burst size = 4 */
-#  define GPDMA_CONTROL_SBSIZE_8         (2 << GPDMA_CONTROL_XFRSIZE_MASK) /* Source burst size = 8 */
-#  define GPDMA_CONTROL_SBSIZE_16        (3 << GPDMA_CONTROL_XFRSIZE_MASK) /* Source burst size = 16 */
-#  define GPDMA_CONTROL_SBSIZE_32        (4 << GPDMA_CONTROL_XFRSIZE_MASK) /* Source burst size = 32 */
-#  define GPDMA_CONTROL_SBSIZE_64        (5 << GPDMA_CONTROL_XFRSIZE_MASK) /* Source burst size = 64 */
-#  define GPDMA_CONTROL_SBSIZE_128       (6 << GPDMA_CONTROL_XFRSIZE_MASK) /* Source burst size = 128 */
-#  define GPDMA_CONTROL_SBSIZE_256       (7 << GPDMA_CONTROL_XFRSIZE_MASK) /* Source burst size = 256 */
+#define GPDMA_CONTROL_SBSIZE_MASK        (7 << GPDMA_CONTROL_SBSIZE_SHIFT)
+#  define GPDMA_CONTROL_SBSIZE_1         (0 << GPDMA_CONTROL_SBSIZE_SHIFT) /* Source burst size = 1 */
+#  define GPDMA_CONTROL_SBSIZE_4         (1 << GPDMA_CONTROL_SBSIZE_SHIFT) /* Source burst size = 4 */
+#  define GPDMA_CONTROL_SBSIZE_8         (2 << GPDMA_CONTROL_SBSIZE_SHIFT) /* Source burst size = 8 */
+#  define GPDMA_CONTROL_SBSIZE_16        (3 << GPDMA_CONTROL_SBSIZE_SHIFT) /* Source burst size = 16 */
+#  define GPDMA_CONTROL_SBSIZE_32        (4 << GPDMA_CONTROL_SBSIZE_SHIFT) /* Source burst size = 32 */
+#  define GPDMA_CONTROL_SBSIZE_64        (5 << GPDMA_CONTROL_SBSIZE_SHIFT) /* Source burst size = 64 */
+#  define GPDMA_CONTROL_SBSIZE_128       (6 << GPDMA_CONTROL_SBSIZE_SHIFT) /* Source burst size = 128 */
+#  define GPDMA_CONTROL_SBSIZE_256       (7 << GPDMA_CONTROL_SBSIZE_SHIFT) /* Source burst size = 256 */
 #define GPDMA_CONTROL_DBSIZE_SHIFT       (15)      /* Bits 15-17: Destination burst size */
 #define GPDMA_CONTROL_DBSIZE_MASK        (7 << GPDMA_CONTROL_DBSIZE_SHIFT)
 #  define GPDMA_CONTROL_DBSIZE_1         (0 << GPDMA_CONTROL_DBSIZE_SHIFT) /* Destination burst size = 1 */
@@ -309,8 +312,12 @@
 #  define GPDMA_CONTROL_DWIDTH_BYTE      (0 << GPDMA_CONTROL_DWIDTH_SHIFT) /* Byte (8-bit) */
 #  define GPDMA_CONTROL_DWIDTH_HWORD     (1 << GPDMA_CONTROL_DWIDTH_SHIFT) /* Halfword (16-bit) */
 #  define GPDMA_CONTROL_DWIDTH_WORD      (2 << GPDMA_CONTROL_DWIDTH_SHIFT) /* Word (32-bit) */
-#define GPDMA_CONTROL_SS                 (1 << 24) /* Bit 24: Source AHB master select */
-#define GPDMA_CONTROL_DS                 (1 << 25) /* Bit 25: Destination AHB master select */
+#define GPDMA_CONTROL_S_SHIFT            (24) /* Bit 24: Source AHB master select */
+# define GPDMA_CONTROL_S0                (0 << GPDMA_CONTROL_S_SHIFT) /* AHB Master 0 selected for source transfer. */
+# define GPDMA_CONTROL_S1                (1 << GPDMA_CONTROL_S_SHIFT) /* AHB Master 1 selected for source transfer. */
+#define GPDMA_CONTROL_D_SHIFT            (25) /* Bit 25: Destination AHB master select */
+# define GPDMA_CONTROL_D0                (0 << GPDMA_CONTROL_D_SHIFT) /* AHB Master 0 selected for destination transfer. */
+# define GPDMA_CONTROL_D1                (1 << GPDMA_CONTROL_D_SHIFT) /* AHB Master 1 selected for destination transfer. */
 #define GPDMA_CONTROL_SI                 (1 << 26) /* Bit 26: Source increment */
 #define GPDMA_CONTROL_DI                 (1 << 27) /* Bit 27: Destination increment */
 #define GPDMA_CONTROL_PROT1              (1 << 28) /* Bit 28: Privileged mode */
diff --git a/arch/arm/src/lpc43xx/chip/lpc43_sct.h b/arch/arm/src/lpc43xx/chip/lpc43_sct.h
index d93db28349df2698fb4a0adaf839562fc855e5b6..4393d2cc417177da6455a0765d4027e5ffb02147 100644
--- a/arch/arm/src/lpc43xx/chip/lpc43_sct.h
+++ b/arch/arm/src/lpc43xx/chip/lpc43_sct.h
@@ -85,7 +85,7 @@
 #define LPC43_SCT_CONEN_OFFSET      0x00f8 /* SCT conflict enable register */
 #define LPC43_SCT_CONFLAG_OFFSET    0x00fC /* SCT conflict flag register */
 
-#define LPC43_SCT_MATCH_OFFSET(n)   (0x0100 + ((n) << 4)) /* n = 0..15 */
+#define LPC43_SCT_MATCH_OFFSET(n)   (0x0100 + ((n) << 2)) /* n = 0..15 */
 #define LPC43_SCT_MATCH0_OFFSET     0x0100 /* SCT match value register of match channel 0 */
 #define LPC43_SCT_MATCH1_OFFSET     0x0104 /* SCT match value register of match channel 1 */
 #define LPC43_SCT_MATCH2_OFFSET     0x0108 /* SCT match value register of match channel 2 */
@@ -103,43 +103,43 @@
 #define LPC43_SCT_MATCH14_OFFSET    0x0138 /* SCT match value register of match channel 14 */
 #define LPC43_SCT_MATCH15_OFFSET    0x013c /* SCT match value register of match channel 15 */
 
-#define LPC43_SCT_MATCHL_OFFSET(n) (0x0100 + ((n) << 4)) /* n = 0..15 */
-#define LPC43_SCT_MATCH0L_OFFSET    0x0100 /* SCT match value register of match channel 0; low 16-bit */
-#define LPC43_SCT_MATCH1L_OFFSET    0x0104 /* SCT match value register of match channel 1; low 16-bit */
-#define LPC43_SCT_MATCH2L_OFFSET    0x0108 /* SCT match value register of match channel 2; low 16-bit */
-#define LPC43_SCT_MATCH3L_OFFSET    0x010c /* SCT match value register of match channel 3; low 16-bit */
-#define LPC43_SCT_MATCH4L_OFFSET    0x0110 /* SCT match value register of match channel 4; low 16-bit */
-#define LPC43_SCT_MATCH5L_OFFSET    0x0114 /* SCT match value register of match channel 5; low 16-bit */
-#define LPC43_SCT_MATCH6L_OFFSET    0x0118 /* SCT match value register of match channel 6; low 16-bit */
-#define LPC43_SCT_MATCH7L_OFFSET    0x011c /* SCT match value register of match channel 7; low 16-bit */
-#define LPC43_SCT_MATCH8L_OFFSET    0x0120 /* SCT match value register of match channel 8; low 16-bit */
-#define LPC43_SCT_MATCH9L_OFFSET    0x0124 /* SCT match value register of match channel 9; low 16-bit */
-#define LPC43_SCT_MATCH10L_OFFSET   0x0128 /* SCT match value register of match channel 10; low 16-bit */
-#define LPC43_SCT_MATCH11L_OFFSET   0x012c /* SCT match value register of match channel 11; low 16-bit */
-#define LPC43_SCT_MATCH12L_OFFSET   0x0130 /* SCT match value register of match channel 12; low 16-bit */
-#define LPC43_SCT_MATCH13L_OFFSET   0x0134 /* SCT match value register of match channel 13; low 16-bit */
-#define LPC43_SCT_MATCH14L_OFFSET   0x0138 /* SCT match value register of match channel 14; low 16-bit */
-#define LPC43_SCT_MATCH15L_OFFSET   0x013c /* SCT match value register of match channel 15; low 16-bit */
-
-#define LPC43_SCT_MATCHH_OFFSET(n)  (0x0102 + ((n) << 4)) /* n = 0..15 */
-#define LPC43_SCT_MATCH0H_OFFSET    0x0102 /* SCT match value register of match channel 0; high 16-bit */
-#define LPC43_SCT_MATCH1H_OFFSET    0x0106 /* SCT match value register of match channel 1; high 16-bit */
-#define LPC43_SCT_MATCH2H_OFFSET    0x010a /* SCT match value register of match channel 2; high 16-bit */
-#define LPC43_SCT_MATCH3H_OFFSET    0x010e /* SCT match value register of match channel 3; high 16-bit */
-#define LPC43_SCT_MATCH4H_OFFSET    0x0112 /* SCT match value register of match channel 4; high 16-bit */
-#define LPC43_SCT_MATCH5H_OFFSET    0x0116 /* SCT match value register of match channel 5; high 16-bit */
-#define LPC43_SCT_MATCH6H_OFFSET    0x011a /* SCT match value register of match channel 6; high 16-bit */
-#define LPC43_SCT_MATCH7H_OFFSET    0x011e /* SCT match value register of match channel 7; high 16-bit */
-#define LPC43_SCT_MATCH8H_OFFSET    0x0122 /* SCT match value register of match channel 8; high 16-bit */
-#define LPC43_SCT_MATCH9H_OFFSET    0x0126 /* SCT match value register of match channel 9; high 16-bit */
-#define LPC43_SCT_MATCH10H_OFFSET   0x012a /* SCT match value register of match channel 10; high 16-bit */
-#define LPC43_SCT_MATCH11H_OFFSET   0x012e /* SCT match value register of match channel 11; high 16-bit */
-#define LPC43_SCT_MATCH12H_OFFSET   0x0132 /* SCT match value register of match channel 12; high 16-bit */
-#define LPC43_SCT_MATCH13H_OFFSET   0x0136 /* SCT match value register of match channel 13; high 16-bit */
-#define LPC43_SCT_MATCH14H_OFFSET   0x013a /* SCT match value register of match channel 14; high 16-bit */
-#define LPC43_SCT_MATCH15H_OFFSET   0x013e /* SCT match value register of match channel 15; high 16-bit */
-
-#define LPC43_SCT_CAP_OFFSET(n)     (0x0100 + ((n) << 4)) /* n = 0..15 */
+#define LPC43_SCT_MATCHL_OFFSET(n) (0x0100 + ((n) << 2)) /* n = 0..15 */
+#define LPC43_SCT_MATCHL0_OFFSET    0x0100 /* SCT match value register of match channel 0; low 16-bit */
+#define LPC43_SCT_MATCHL1_OFFSET    0x0104 /* SCT match value register of match channel 1; low 16-bit */
+#define LPC43_SCT_MATCHL2_OFFSET    0x0108 /* SCT match value register of match channel 2; low 16-bit */
+#define LPC43_SCT_MATCHL3_OFFSET    0x010c /* SCT match value register of match channel 3; low 16-bit */
+#define LPC43_SCT_MATCHL4_OFFSET    0x0110 /* SCT match value register of match channel 4; low 16-bit */
+#define LPC43_SCT_MATCHL5_OFFSET    0x0114 /* SCT match value register of match channel 5; low 16-bit */
+#define LPC43_SCT_MATCHL6_OFFSET    0x0118 /* SCT match value register of match channel 6; low 16-bit */
+#define LPC43_SCT_MATCHL7_OFFSET    0x011c /* SCT match value register of match channel 7; low 16-bit */
+#define LPC43_SCT_MATCHL8_OFFSET    0x0120 /* SCT match value register of match channel 8; low 16-bit */
+#define LPC43_SCT_MATCHL9_OFFSET    0x0124 /* SCT match value register of match channel 9; low 16-bit */
+#define LPC43_SCT_MATCHL10_OFFSET   0x0128 /* SCT match value register of match channel 10; low 16-bit */
+#define LPC43_SCT_MATCHL11_OFFSET   0x012c /* SCT match value register of match channel 11; low 16-bit */
+#define LPC43_SCT_MATCHL12_OFFSET   0x0130 /* SCT match value register of match channel 12; low 16-bit */
+#define LPC43_SCT_MATCHL13_OFFSET   0x0134 /* SCT match value register of match channel 13; low 16-bit */
+#define LPC43_SCT_MATCHL14_OFFSET   0x0138 /* SCT match value register of match channel 14; low 16-bit */
+#define LPC43_SCT_MATCHL15_OFFSET   0x013c /* SCT match value register of match channel 15; low 16-bit */
+
+#define LPC43_SCT_MATCHH_OFFSET(n)  (0x0102 + ((n) << 2)) /* n = 0..15 */
+#define LPC43_SCT_MATCHH0_OFFSET    0x0102 /* SCT match value register of match channel 0; high 16-bit */
+#define LPC43_SCT_MATCHH1_OFFSET    0x0106 /* SCT match value register of match channel 1; high 16-bit */
+#define LPC43_SCT_MATCHH2_OFFSET    0x010a /* SCT match value register of match channel 2; high 16-bit */
+#define LPC43_SCT_MATCHH3_OFFSET    0x010e /* SCT match value register of match channel 3; high 16-bit */
+#define LPC43_SCT_MATCHH4_OFFSET    0x0112 /* SCT match value register of match channel 4; high 16-bit */
+#define LPC43_SCT_MATCHH5_OFFSET    0x0116 /* SCT match value register of match channel 5; high 16-bit */
+#define LPC43_SCT_MATCHH6_OFFSET    0x011a /* SCT match value register of match channel 6; high 16-bit */
+#define LPC43_SCT_MATCHH7_OFFSET    0x011e /* SCT match value register of match channel 7; high 16-bit */
+#define LPC43_SCT_MATCHH8_OFFSET    0x0122 /* SCT match value register of match channel 8; high 16-bit */
+#define LPC43_SCT_MATCHH9_OFFSET    0x0126 /* SCT match value register of match channel 9; high 16-bit */
+#define LPC43_SCT_MATCHH10_OFFSET   0x012a /* SCT match value register of match channel 10; high 16-bit */
+#define LPC43_SCT_MATCHH11_OFFSET   0x012e /* SCT match value register of match channel 11; high 16-bit */
+#define LPC43_SCT_MATCHH12_OFFSET   0x0132 /* SCT match value register of match channel 12; high 16-bit */
+#define LPC43_SCT_MATCHH13_OFFSET   0x0136 /* SCT match value register of match channel 13; high 16-bit */
+#define LPC43_SCT_MATCHH14_OFFSET   0x013a /* SCT match value register of match channel 14; high 16-bit */
+#define LPC43_SCT_MATCHH15_OFFSET   0x013e /* SCT match value register of match channel 15; high 16-bit */
+
+#define LPC43_SCT_CAP_OFFSET(n)     (0x0100 + ((n) << 2)) /* n = 0..15 */
 #define LPC43_SCT_CAP0_OFFSET       0x0100 /* SCT capture value register Ch0 */
 #define LPC43_SCT_CAP1_OFFSET       0x0104 /* SCT capture value register Ch1 */
 #define LPC43_SCT_CAP2_OFFSET       0x0108 /* SCT capture value register Ch2 */
@@ -157,151 +157,115 @@
 #define LPC43_SCT_CAP14_OFFSET      0x0138 /* SCT capture value register Ch14 */
 #define LPC43_SCT_CAP15_OFFSET      0x013c /* SCT capture value register Ch15 */
 
-#define LPC43_SCT_CAPL_OFFSET(n)    (0x0100 + ((n) << 4)) /* n = 0..15 */
-#define LPC43_SCT_CAP0L_OFFSET      0x0100 /* SCT capture value register Ch0; low 16-bit */
-#define LPC43_SCT_CAP1L_OFFSET      0x0104 /* SCT capture value register Ch1; low 16-bit */
-#define LPC43_SCT_CAP2L_OFFSET      0x0108 /* SCT capture value register Ch2; low 16-bit */
-#define LPC43_SCT_CAP3L_OFFSET      0x010c /* SCT capture value register Ch3; low 16-bit */
-#define LPC43_SCT_CAP4L_OFFSET      0x0110 /* SCT capture value register Ch4; low 16-bit */
-#define LPC43_SCT_CAP5L_OFFSET      0x0114 /* SCT capture value register Ch5; low 16-bit */
-#define LPC43_SCT_CAP6L_OFFSET      0x0118 /* SCT capture value register Ch6; low 16-bit */
-#define LPC43_SCT_CAP7L_OFFSET      0x011c /* SCT capture value register Ch7; low 16-bit */
-#define LPC43_SCT_CAP8L_OFFSET      0x0120 /* SCT capture value register Ch8; low 16-bit */
-#define LPC43_SCT_CAP9L_OFFSET      0x0124 /* SCT capture value register Ch9; low 16-bit */
-#define LPC43_SCT_CAP10L_OFFSET     0x0128 /* SCT capture value register Ch10; low 16-bit */
-#define LPC43_SCT_CAP11L_OFFSET     0x012c /* SCT capture value register Ch11; low 16-bit */
-#define LPC43_SCT_CAP12L_OFFSET     0x0130 /* SCT capture value register Ch12; low 16-bit */
-#define LPC43_SCT_CAP13L_OFFSET     0x0134 /* SCT capture value register Ch13; low 16-bit */
-#define LPC43_SCT_CAP14L_OFFSET     0x0138 /* SCT capture value register Ch14; low 16-bit */
-#define LPC43_SCT_CAP15L_OFFSET     0x013c /* SCT capture value register Ch15; low 16-bit */
-
-#define LPC43_SCT_CAPH_OFFSET(n)    (0x0102 + ((n) << 4)) /* n = 0..15 */
-#define LPC43_SCT_CAP0H_OFFSET      0x0102 /* SCT capture value register Ch0; high 16-bit */
-#define LPC43_SCT_CAP1H_OFFSET      0x0106 /* SCT capture value register Ch1; high 16-bit */
-#define LPC43_SCT_CAP2H_OFFSET      0x010a /* SCT capture value register Ch2; high 16-bit */
-#define LPC43_SCT_CAP3H_OFFSET      0x010e /* SCT capture value register Ch3; high 16-bit */
-#define LPC43_SCT_CAP4H_OFFSET      0x0112 /* SCT capture value register Ch4; high 16-bit */
-#define LPC43_SCT_CAP5H_OFFSET      0x0116 /* SCT capture value register Ch5; high 16-bit */
-#define LPC43_SCT_CAP6H_OFFSET      0x011a /* SCT capture value register Ch6; high 16-bit */
-#define LPC43_SCT_CAP7H_OFFSET      0x011e /* SCT capture value register Ch7; high 16-bit */
-#define LPC43_SCT_CAP8H_OFFSET      0x0122 /* SCT capture value register Ch8; high 16-bit */
-#define LPC43_SCT_CAP9H_OFFSET      0x0126 /* SCT capture value register Ch9; high 16-bit */
-#define LPC43_SCT_CAP10H_OFFSET     0x012a /* SCT capture value register Ch10; high 16-bit */
-#define LPC43_SCT_CAP11H_OFFSET     0x012e /* SCT capture value register Ch11; high 16-bit */
-#define LPC43_SCT_CAP12H_OFFSET     0x0132 /* SCT capture value register Ch12; high 16-bit */
-#define LPC43_SCT_CAP13H_OFFSET     0x0136 /* SCT capture value register Ch13; high 16-bit */
-#define LPC43_SCT_CAP14H_OFFSET     0x013a /* SCT capture value register Ch14; high 16-bit */
-#define LPC43_SCT_CAP15H_OFFSET     0x013e /* SCT capture value register Ch15; high 16-bit */
-
-#define LPC43_SCT_MATCHA_OFFSET(n)  (0x0180 + ((n) << 4)) /* n = 0..15 */
-#define LPC43_SCT_MATCH0A_OFFSET    0x0180 /* SCT match alias register of match channel 0 */
-#define LPC43_SCT_MATCH1A_OFFSET    0x0184 /* SCT match alias register of match channel 1 */
-#define LPC43_SCT_MATCH2A_OFFSET    0x0188 /* SCT match alias register of match channel 2 */
-#define LPC43_SCT_MATCH3A_OFFSET    0x018c /* SCT match alias register of match channel 3 */
-#define LPC43_SCT_MATCH4A_OFFSET    0x0190 /* SCT match alias register of match channel 4 */
-#define LPC43_SCT_MATCH5A_OFFSET    0x0194 /* SCT match alias register of match channel 5 */
-#define LPC43_SCT_MATCH6A_OFFSET    0x0198 /* SCT match alias register of match channel 6 */
-#define LPC43_SCT_MATCH7A_OFFSET    0x019c /* SCT match alias register of match channel 7 */
-#define LPC43_SCT_MATCH8A_OFFSET    0x01a0 /* SCT match alias register of match channel 8 */
-#define LPC43_SCT_MATCH9A_OFFSET    0x01a4 /* SCT match alias register of match channel 9 */
-#define LPC43_SCT_MATCH10A_OFFSET   0x01a8 /* SCT match alias register of match channel 10 */
-#define LPC43_SCT_MATCH11A_OFFSET   0x01ac /* SCT match alias register of match channel 11 */
-#define LPC43_SCT_MATCH12A_OFFSET   0x01b0 /* SCT match alias register of match channel 12 */
-#define LPC43_SCT_MATCH13A_OFFSET   0x01b4 /* SCT match alias register of match channel 13 */
-#define LPC43_SCT_MATCH14A_OFFSET   0x01b8 /* SCT match alias register of match channel 14 */
-#define LPC43_SCT_MATCH15A_OFFSET   0x01bc /* SCT match alias register of match channel 15 */
-
-#define LPC43_SCT_MATCHLA_OFFSET(n) (0x0180 + ((n) << 4)) /* n = 0..15 */
-#define LPC43_SCT_MATCH0LA_OFFSET   0x0180 /* SCT match alias register of match channel 0; low 16-bit */
-#define LPC43_SCT_MATCH1LA_OFFSET   0x0184 /* SCT match alias register of match channel 1; low 16-bit */
-#define LPC43_SCT_MATCH2LA_OFFSET   0x0188 /* SCT match alias register of match channel 2; low 16-bit */
-#define LPC43_SCT_MATCH3LA_OFFSET   0x018c /* SCT match alias register of match channel 3; low 16-bit */
-#define LPC43_SCT_MATCH4LA_OFFSET   0x0190 /* SCT match alias register of match channel 4; low 16-bit */
-#define LPC43_SCT_MATCH5LA_OFFSET   0x0194 /* SCT match alias register of match channel 5; low 16-bit */
-#define LPC43_SCT_MATCH6LA_OFFSET   0x0198 /* SCT match alias register of match channel 6; low 16-bit */
-#define LPC43_SCT_MATCH7LA_OFFSET   0x019c /* SCT match alias register of match channel 7; low 16-bit */
-#define LPC43_SCT_MATCH8LA_OFFSET   0x01a0 /* SCT match alias register of match channel 8; low 16-bit */
-#define LPC43_SCT_MATCH9LA_OFFSET   0x01a4 /* SCT match alias register of match channel 9; low 16-bit */
-#define LPC43_SCT_MATCH10LA_OFFSET  0x01a8 /* SCT match alias register of match channel 10; low 16-bit */
-#define LPC43_SCT_MATCH11LA_OFFSET  0x01ac /* SCT match alias register of match channel 11; low 16-bit */
-#define LPC43_SCT_MATCH12LA_OFFSET  0x01b0 /* SCT match alias register of match channel 12; low 16-bit */
-#define LPC43_SCT_MATCH13LA_OFFSET  0x01b4 /* SCT match alias register of match channel 13; low 16-bit */
-#define LPC43_SCT_MATCH14LA_OFFSET  0x01b8 /* SCT match alias register of match channel 14; low 16-bit */
-#define LPC43_SCT_MATCH15LA_OFFSET  0x01bc /* SCT match alias register of match channel 15; low 16-bit */
-
-#define LPC43_SCT_MATCHHA_OFFSET(n) (0x0182 + ((n) << 4)) /* n = 0..15 */
-#define LPC43_SCT_MATCH0HA_OFFSET   0x0182 /* SCT match alias register of match channel 0; high 16-bit */
-#define LPC43_SCT_MATCH1HA_OFFSET   0x0186 /* SCT match alias register of match channel 1; high 16-bit */
-#define LPC43_SCT_MATCH2HA_OFFSET   0x018a /* SCT match alias register of match channel 2; high 16-bit */
-#define LPC43_SCT_MATCH3HA_OFFSET   0x018e /* SCT match alias register of match channel 3; high 16-bit */
-#define LPC43_SCT_MATCH4HA_OFFSET   0x0192 /* SCT match alias register of match channel 4; high 16-bit */
-#define LPC43_SCT_MATCH5HA_OFFSET   0x0196 /* SCT match alias register of match channel 5; high 16-bit */
-#define LPC43_SCT_MATCH6HA_OFFSET   0x019a /* SCT match alias register of match channel 6; high 16-bit */
-#define LPC43_SCT_MATCH7HA_OFFSET   0x019e /* SCT match alias register of match channel 7; high 16-bit */
-#define LPC43_SCT_MATCH8HA_OFFSET   0x01a2 /* SCT match alias register of match channel 8; high 16-bit */
-#define LPC43_SCT_MATCH9HA_OFFSET   0x01a6 /* SCT match alias register of match channel 9; high 16-bit */
-#define LPC43_SCT_MATCH10HA_OFFSET  0x01aa /* SCT match alias register of match channel 10; high 16-bit */
-#define LPC43_SCT_MATCH11HA_OFFSET  0x01ae /* SCT match alias register of match channel 11; high 16-bit */
-#define LPC43_SCT_MATCH12HA_OFFSET  0x01b2 /* SCT match alias register of match channel 12; high 16-bit */
-#define LPC43_SCT_MATCH13HA_OFFSET  0x01b6 /* SCT match alias register of match channel 13; high 16-bit */
-#define LPC43_SCT_MATCH14HA_OFFSET  0x01ba /* SCT match alias register of match channel 14; high 16-bit */
-#define LPC43_SCT_MATCH15HA_OFFSET  0x01be /* SCT match alias register of match channel 15; high 16-bit */
-
-#define LPC43_SCT_CAPA_OFFSET(n)    (0x0180 + ((n) << 4)) /* n = 0..15 */
-#define LPC43_SCT_CAP0A_OFFSET      0x0180 /* SCT capture alias register Ch0 */
-#define LPC43_SCT_CAP1A_OFFSET      0x0184 /* SCT capture alias register Ch1 */
-#define LPC43_SCT_CAP2A_OFFSET      0x0188 /* SCT capture alias register Ch2 */
-#define LPC43_SCT_CAP3A_OFFSET      0x018c /* SCT capture alias register Ch3 */
-#define LPC43_SCT_CAP4A_OFFSET      0x0190 /* SCT capture alias register Ch4 */
-#define LPC43_SCT_CAP5A_OFFSET      0x0194 /* SCT capture alias register Ch5 */
-#define LPC43_SCT_CAP6A_OFFSET      0x0198 /* SCT capture alias register Ch6 */
-#define LPC43_SCT_CAP7A_OFFSET      0x019c /* SCT capture alias register Ch7 */
-#define LPC43_SCT_CAP8A_OFFSET      0x01a0 /* SCT capture alias register Ch8 */
-#define LPC43_SCT_CAP9A_OFFSET      0x01a4 /* SCT capture alias register Ch9 */
-#define LPC43_SCT_CAP10A_OFFSET     0x01a8 /* SCT capture alias register Ch10 */
-#define LPC43_SCT_CAP11A_OFFSET     0x01ac /* SCT capture alias register Ch11 */
-#define LPC43_SCT_CAP12A_OFFSET     0x01b0 /* SCT capture alias register Ch12 */
-#define LPC43_SCT_CAP13A_OFFSET     0x01b4 /* SCT capture alias register Ch13 */
-#define LPC43_SCT_CAP14A_OFFSET     0x01b8 /* SCT capture alias register Ch14 */
-#define LPC43_SCT_CAP15A_OFFSET     0x01bc /* SCT capture alias register Ch15 */
-
-#define LPC43_SCT_CAPLA_OFFSET(n)   (0x0180 + ((n) << 4)) /* n = 0..15 */
-#define LPC43_SCT_CAP0LA_OFFSET     0x0180 /* SCT capture alias register Ch0; low 16-bit */
-#define LPC43_SCT_CAP1LA_OFFSET     0x0184 /* SCT capture alias register Ch1; low 16-bit */
-#define LPC43_SCT_CAP2LA_OFFSET     0x0188 /* SCT capture alias register Ch2; low 16-bit */
-#define LPC43_SCT_CAP3LA_OFFSET     0x018c /* SCT capture alias register Ch3; low 16-bit */
-#define LPC43_SCT_CAP4LA_OFFSET     0x0190 /* SCT capture alias register Ch4; low 16-bit */
-#define LPC43_SCT_CAP5LA_OFFSET     0x0194 /* SCT capture alias register Ch5; low 16-bit */
-#define LPC43_SCT_CAP6LA_OFFSET     0x0198 /* SCT capture alias register Ch6; low 16-bit */
-#define LPC43_SCT_CAP7LA_OFFSET     0x019c /* SCT capture alias register Ch7; low 16-bit */
-#define LPC43_SCT_CAP8LA_OFFSET     0x01a0 /* SCT capture alias register Ch8; low 16-bit */
-#define LPC43_SCT_CAP9LA_OFFSET     0x01a4 /* SCT capture alias register Ch9; low 16-bit */
-#define LPC43_SCT_CAP10LA_OFFSET    0x01a8 /* SCT capture alias register Ch10; low 16-bit */
-#define LPC43_SCT_CAP11LA_OFFSET    0x01ac /* SCT capture alias register Ch11; low 16-bit */
-#define LPC43_SCT_CAP12LA_OFFSET    0x01b0 /* SCT capture alias register Ch12; low 16-bit */
-#define LPC43_SCT_CAP13LA_OFFSET    0x01b4 /* SCT capture alias register Ch13; low 16-bit */
-#define LPC43_SCT_CAP14LA_OFFSET    0x01b8 /* SCT capture alias register Ch14; low 16-bit */
-#define LPC43_SCT_CAP15LA_OFFSET    0x01bc /* SCT capture alias register Ch15; low 16-bit */
-
-#define LPC43_SCT_CAPHA_OFFSET(n)   (0x0182 + ((n) << 4)) /* n = 0..15 */
-#define LPC43_SCT_CAP0HA_OFFSET     0x0182 /* SCT capture alias register Ch0; high 16-bit */
-#define LPC43_SCT_CAP1HA_OFFSET     0x0186 /* SCT capture alias register Ch1; high 16-bit */
-#define LPC43_SCT_CAP2HA_OFFSET     0x018a /* SCT capture alias register Ch2; high 16-bit */
-#define LPC43_SCT_CAP3HA_OFFSET     0x018e /* SCT capture alias register Ch3; high 16-bit */
-#define LPC43_SCT_CAP4HA_OFFSET     0x0192 /* SCT capture alias register Ch4; high 16-bit */
-#define LPC43_SCT_CAP5HA_OFFSET     0x0196 /* SCT capture alias register Ch5; high 16-bit */
-#define LPC43_SCT_CAP6HA_OFFSET     0x019a /* SCT capture alias register Ch6; high 16-bit */
-#define LPC43_SCT_CAP7HA_OFFSET     0x019e /* SCT capture alias register Ch7; high 16-bit */
-#define LPC43_SCT_CAP8HA_OFFSET     0x01a2 /* SCT capture alias register Ch8; high 16-bit */
-#define LPC43_SCT_CAP9HA_OFFSET     0x01a6 /* SCT capture alias register Ch9; high 16-bit */
-#define LPC43_SCT_CAP10HA_OFFSET    0x01aa /* SCT capture alias register Ch10; high 16-bit */
-#define LPC43_SCT_CAP11HA_OFFSET    0x01ae /* SCT capture alias register Ch11; high 16-bit */
-#define LPC43_SCT_CAP12HA_OFFSET    0x01b2 /* SCT capture alias register Ch12; high 16-bit */
-#define LPC43_SCT_CAP13HA_OFFSET    0x01b6 /* SCT capture alias register Ch13; high 16-bit */
-#define LPC43_SCT_CAP14HA_OFFSET    0x01ba /* SCT capture alias register Ch14; high 16-bit */
-#define LPC43_SCT_CAP15HA_OFFSET    0x01be /* SCT capture alias register Ch15; high 16-bit */
-
-#define LPC43_SCT_MATCHR_OFFSET(n)  (0x0200 + ((n) << 4)) /* n = 0..15 */
+#define LPC43_SCT_CAPL_OFFSET(n)    (0x0100 + ((n) << 2)) /* n = 0..15 */
+#define LPC43_SCT_CAPL0_OFFSET      0x0100 /* SCT capture value register Ch0; low 16-bit */
+#define LPC43_SCT_CAPL1_OFFSET      0x0104 /* SCT capture value register Ch1; low 16-bit */
+#define LPC43_SCT_CAPL2_OFFSET      0x0108 /* SCT capture value register Ch2; low 16-bit */
+#define LPC43_SCT_CAPL3_OFFSET      0x010c /* SCT capture value register Ch3; low 16-bit */
+#define LPC43_SCT_CAPL4_OFFSET      0x0110 /* SCT capture value register Ch4; low 16-bit */
+#define LPC43_SCT_CAPL5_OFFSET      0x0114 /* SCT capture value register Ch5; low 16-bit */
+#define LPC43_SCT_CAPL6_OFFSET      0x0118 /* SCT capture value register Ch6; low 16-bit */
+#define LPC43_SCT_CAPL7_OFFSET      0x011c /* SCT capture value register Ch7; low 16-bit */
+#define LPC43_SCT_CAPL8_OFFSET      0x0120 /* SCT capture value register Ch8; low 16-bit */
+#define LPC43_SCT_CAPL9_OFFSET      0x0124 /* SCT capture value register Ch9; low 16-bit */
+#define LPC43_SCT_CAPL10_OFFSET     0x0128 /* SCT capture value register Ch10; low 16-bit */
+#define LPC43_SCT_CAPL11_OFFSET     0x012c /* SCT capture value register Ch11; low 16-bit */
+#define LPC43_SCT_CAPL12_OFFSET     0x0130 /* SCT capture value register Ch12; low 16-bit */
+#define LPC43_SCT_CAPL13_OFFSET     0x0134 /* SCT capture value register Ch13; low 16-bit */
+#define LPC43_SCT_CAPL14_OFFSET     0x0138 /* SCT capture value register Ch14; low 16-bit */
+#define LPC43_SCT_CAPL15_OFFSET     0x013c /* SCT capture value register Ch15; low 16-bit */
+
+#define LPC43_SCT_CAPH_OFFSET(n)    (0x0102 + ((n) << 2)) /* n = 0..15 */
+#define LPC43_SCT_CAPH0_OFFSET      0x0102 /* SCT capture value register Ch0; high 16-bit */
+#define LPC43_SCT_CAPH1_OFFSET      0x0106 /* SCT capture value register Ch1; high 16-bit */
+#define LPC43_SCT_CAPH2_OFFSET      0x010a /* SCT capture value register Ch2; high 16-bit */
+#define LPC43_SCT_CAPH3_OFFSET      0x010e /* SCT capture value register Ch3; high 16-bit */
+#define LPC43_SCT_CAPH4_OFFSET      0x0112 /* SCT capture value register Ch4; high 16-bit */
+#define LPC43_SCT_CAPH5_OFFSET      0x0116 /* SCT capture value register Ch5; high 16-bit */
+#define LPC43_SCT_CAPH6_OFFSET      0x011a /* SCT capture value register Ch6; high 16-bit */
+#define LPC43_SCT_CAPH7_OFFSET      0x011e /* SCT capture value register Ch7; high 16-bit */
+#define LPC43_SCT_CAPH8_OFFSET      0x0122 /* SCT capture value register Ch8; high 16-bit */
+#define LPC43_SCT_CAPH9_OFFSET      0x0126 /* SCT capture value register Ch9; high 16-bit */
+#define LPC43_SCT_CAPH10_OFFSET     0x012a /* SCT capture value register Ch10; high 16-bit */
+#define LPC43_SCT_CAPH11_OFFSET     0x012e /* SCT capture value register Ch11; high 16-bit */
+#define LPC43_SCT_CAPH12_OFFSET     0x0132 /* SCT capture value register Ch12; high 16-bit */
+#define LPC43_SCT_CAPH13_OFFSET     0x0136 /* SCT capture value register Ch13; high 16-bit */
+#define LPC43_SCT_CAPH14_OFFSET     0x013a /* SCT capture value register Ch14; high 16-bit */
+#define LPC43_SCT_CAPH15_OFFSET     0x013e /* SCT capture value register Ch15; high 16-bit */
+
+#define LPC43_SCT_MATCHLA_OFFSET(n) (0x0180 + ((n) << 1)) /* n = 0..15 */
+#define LPC43_SCT_MATCHLA0_OFFSET   0x0180 /* SCT match alias register of match channel 0; low 16-bit */
+#define LPC43_SCT_MATCHLA1_OFFSET   0x0182 /* SCT match alias register of match channel 1; low 16-bit */
+#define LPC43_SCT_MATCHLA2_OFFSET   0x0184 /* SCT match alias register of match channel 2; low 16-bit */
+#define LPC43_SCT_MATCHLA3_OFFSET   0x0186 /* SCT match alias register of match channel 3; low 16-bit */
+#define LPC43_SCT_MATCHLA4_OFFSET   0x0188 /* SCT match alias register of match channel 4; low 16-bit */
+#define LPC43_SCT_MATCHLA5_OFFSET   0x018a /* SCT match alias register of match channel 5; low 16-bit */
+#define LPC43_SCT_MATCHLA6_OFFSET   0x018c /* SCT match alias register of match channel 6; low 16-bit */
+#define LPC43_SCT_MATCHLA7_OFFSET   0x018e /* SCT match alias register of match channel 7; low 16-bit */
+#define LPC43_SCT_MATCHLA8_OFFSET   0x0190 /* SCT match alias register of match channel 8; low 16-bit */
+#define LPC43_SCT_MATCHLA9_OFFSET   0x0192 /* SCT match alias register of match channel 9; low 16-bit */
+#define LPC43_SCT_MATCHLA10_OFFSET  0x0194 /* SCT match alias register of match channel 10; low 16-bit */
+#define LPC43_SCT_MATCHLA11_OFFSET  0x0196 /* SCT match alias register of match channel 11; low 16-bit */
+#define LPC43_SCT_MATCHLA12_OFFSET  0x0198 /* SCT match alias register of match channel 12; low 16-bit */
+#define LPC43_SCT_MATCHLA13_OFFSET  0x019a /* SCT match alias register of match channel 13; low 16-bit */
+#define LPC43_SCT_MATCHLA14_OFFSET  0x019c /* SCT match alias register of match channel 14; low 16-bit */
+#define LPC43_SCT_MATCHLA15_OFFSET  0x019e /* SCT match alias register of match channel 15; low 16-bit */
+
+#define LPC43_SCT_MATCHHA_OFFSET(n) (0x01c0 + ((n) << 1)) /* n = 0..15 */
+#define LPC43_SCT_MATCHHA0_OFFSET   0x01c0 /* SCT match alias register of match channel 0; high 16-bit */
+#define LPC43_SCT_MATCHHA1_OFFSET   0x01c2 /* SCT match alias register of match channel 1; high 16-bit */
+#define LPC43_SCT_MATCHHA2_OFFSET   0x01c4 /* SCT match alias register of match channel 2; high 16-bit */
+#define LPC43_SCT_MATCHHA3_OFFSET   0x01c6 /* SCT match alias register of match channel 3; high 16-bit */
+#define LPC43_SCT_MATCHHA4_OFFSET   0x01c8 /* SCT match alias register of match channel 4; high 16-bit */
+#define LPC43_SCT_MATCHHA5_OFFSET   0x01ca /* SCT match alias register of match channel 5; high 16-bit */
+#define LPC43_SCT_MATCHHA6_OFFSET   0x01cc /* SCT match alias register of match channel 6; high 16-bit */
+#define LPC43_SCT_MATCHHA7_OFFSET   0x01ce /* SCT match alias register of match channel 7; high 16-bit */
+#define LPC43_SCT_MATCHHA8_OFFSET   0x01d0 /* SCT match alias register of match channel 8; high 16-bit */
+#define LPC43_SCT_MATCHHA9_OFFSET   0x01d2 /* SCT match alias register of match channel 9; high 16-bit */
+#define LPC43_SCT_MATCHHA10_OFFSET  0x01d4 /* SCT match alias register of match channel 10; high 16-bit */
+#define LPC43_SCT_MATCHHA11_OFFSET  0x01d6 /* SCT match alias register of match channel 11; high 16-bit */
+#define LPC43_SCT_MATCHHA12_OFFSET  0x01d8 /* SCT match alias register of match channel 12; high 16-bit */
+#define LPC43_SCT_MATCHHA13_OFFSET  0x01da /* SCT match alias register of match channel 13; high 16-bit */
+#define LPC43_SCT_MATCHHA14_OFFSET  0x01dc /* SCT match alias register of match channel 14; high 16-bit */
+#define LPC43_SCT_MATCHHA15_OFFSET  0x01de /* SCT match alias register of match channel 15; high 16-bit */
+
+#define LPC43_SCT_CAPLA_OFFSET(n)   (0x0180 + ((n) << 1)) /* n = 0..15 */
+#define LPC43_SCT_CAPLA0_OFFSET     0x0180 /* SCT capture alias register Ch0; low 16-bit */
+#define LPC43_SCT_CAPLA1_OFFSET     0x0182 /* SCT capture alias register Ch1; low 16-bit */
+#define LPC43_SCT_CAPLA2_OFFSET     0x0184 /* SCT capture alias register Ch2; low 16-bit */
+#define LPC43_SCT_CAPLA3_OFFSET     0x0186 /* SCT capture alias register Ch3; low 16-bit */
+#define LPC43_SCT_CAPLA4_OFFSET     0x0188 /* SCT capture alias register Ch4; low 16-bit */
+#define LPC43_SCT_CAPLA5_OFFSET     0x018a /* SCT capture alias register Ch5; low 16-bit */
+#define LPC43_SCT_CAPLA6_OFFSET     0x018c /* SCT capture alias register Ch6; low 16-bit */
+#define LPC43_SCT_CAPLA7_OFFSET     0x018e /* SCT capture alias register Ch7; low 16-bit */
+#define LPC43_SCT_CAPLA8_OFFSET     0x0190 /* SCT capture alias register Ch8; low 16-bit */
+#define LPC43_SCT_CAPLA9_OFFSET     0x0192 /* SCT capture alias register Ch9; low 16-bit */
+#define LPC43_SCT_CAPLA10_OFFSET    0x0194 /* SCT capture alias register Ch10; low 16-bit */
+#define LPC43_SCT_CAPLA11_OFFSET    0x0196 /* SCT capture alias register Ch11; low 16-bit */
+#define LPC43_SCT_CAPLA12_OFFSET    0x0198 /* SCT capture alias register Ch12; low 16-bit */
+#define LPC43_SCT_CAPLA13_OFFSET    0x019a /* SCT capture alias register Ch13; low 16-bit */
+#define LPC43_SCT_CAPLA14_OFFSET    0x019c /* SCT capture alias register Ch14; low 16-bit */
+#define LPC43_SCT_CAPLA15_OFFSET    0x019e /* SCT capture alias register Ch15; low 16-bit */
+
+#define LPC43_SCT_CAPHA_OFFSET(n)   (0x01c0 + ((n) << 1)) /* n = 0..15 */
+#define LPC43_SCT_CAPHA0_OFFSET     0x01c0 /* SCT capture alias register Ch0; high 16-bit */
+#define LPC43_SCT_CAPHA1_OFFSET     0x01c2 /* SCT capture alias register Ch1; high 16-bit */
+#define LPC43_SCT_CAPHA2_OFFSET     0x01c4 /* SCT capture alias register Ch2; high 16-bit */
+#define LPC43_SCT_CAPHA3_OFFSET     0x01c6 /* SCT capture alias register Ch3; high 16-bit */
+#define LPC43_SCT_CAPHA4_OFFSET     0x01c8 /* SCT capture alias register Ch4; high 16-bit */
+#define LPC43_SCT_CAPHA5_OFFSET     0x01ca /* SCT capture alias register Ch5; high 16-bit */
+#define LPC43_SCT_CAPHA6_OFFSET     0x01cc /* SCT capture alias register Ch6; high 16-bit */
+#define LPC43_SCT_CAPHA7_OFFSET     0x01ce /* SCT capture alias register Ch7; high 16-bit */
+#define LPC43_SCT_CAPHA8_OFFSET     0x01d0 /* SCT capture alias register Ch8; high 16-bit */
+#define LPC43_SCT_CAPHA9_OFFSET     0x01d2 /* SCT capture alias register Ch9; high 16-bit */
+#define LPC43_SCT_CAPHA10_OFFSET    0x01d4 /* SCT capture alias register Ch10; high 16-bit */
+#define LPC43_SCT_CAPHA11_OFFSET    0x01d6 /* SCT capture alias register Ch11; high 16-bit */
+#define LPC43_SCT_CAPHA12_OFFSET    0x01d8 /* SCT capture alias register Ch12; high 16-bit */
+#define LPC43_SCT_CAPHA13_OFFSET    0x01da /* SCT capture alias register Ch13; high 16-bit */
+#define LPC43_SCT_CAPHA14_OFFSET    0x01dc /* SCT capture alias register Ch14; high 16-bit */
+#define LPC43_SCT_CAPHA15_OFFSET    0x01de /* SCT capture alias register Ch15; high 16-bit */
+
+#define LPC43_SCT_MATCHR_OFFSET(n)  (0x0200 + ((n) << 2)) /* n = 0..15 */
 #define LPC43_SCT_MATCHR0_OFFSET    0x0200 /* SCT match reload register of match channel 0 */
 #define LPC43_SCT_MATCHR1_OFFSET    0x0204 /* SCT match reload register of match channel 1 */
 #define LPC43_SCT_MATCHR2_OFFSET    0x0208 /* SCT match reload register of match channel 2 */
@@ -319,43 +283,43 @@
 #define LPC43_SCT_MATCHR14_OFFSET   0x0238 /* SCT match reload register of match channel 14 */
 #define LPC43_SCT_MATCHR15_OFFSET   0x023c /* SCT match reload register of match channel 15 */
 
-#define LPC43_SCT_MATCHRL_OFFSET(n) (0x0200 + ((n) << 4)) /* n = 0..15 */
-#define LPC43_SCT_MATCHR0L_OFFSET   0x0200 /* SCT match reload register of match channel 0; low 16-bit */
-#define LPC43_SCT_MATCHR1L_OFFSET   0x0204 /* SCT match reload register of match channel 1; low 16-bit */
-#define LPC43_SCT_MATCHR2L_OFFSET   0x0208 /* SCT match reload register of match channel 2; low 16-bit */
-#define LPC43_SCT_MATCHR3L_OFFSET   0x020c /* SCT match reload register of match channel 3; low 16-bit */
-#define LPC43_SCT_MATCHR4L_OFFSET   0x0210 /* SCT match reload register of match channel 4; low 16-bit */
-#define LPC43_SCT_MATCHR5L_OFFSET   0x0214 /* SCT match reload register of match channel 5; low 16-bit */
-#define LPC43_SCT_MATCHR6L_OFFSET   0x0218 /* SCT match reload register of match channel 6; low 16-bit */
-#define LPC43_SCT_MATCHR7L_OFFSET   0x021c /* SCT match reload register of match channel 7; low 16-bit */
-#define LPC43_SCT_MATCHR8L_OFFSET   0x0220 /* SCT match reload register of match channel 8; low 16-bit */
-#define LPC43_SCT_MATCHR9L_OFFSET   0x0224 /* SCT match reload register of match channel 9; low 16-bit */
-#define LPC43_SCT_MATCHR10L_OFFSET  0x0228 /* SCT match reload register of match channel 10; low 16-bit */
-#define LPC43_SCT_MATCHR11L_OFFSET  0x022c /* SCT match reload register of match channel 11; low 16-bit */
-#define LPC43_SCT_MATCHR12L_OFFSET  0x0230 /* SCT match reload register of match channel 12; low 16-bit */
-#define LPC43_SCT_MATCHR13L_OFFSET  0x0234 /* SCT match reload register of match channel 13; low 16-bit */
-#define LPC43_SCT_MATCHR14L_OFFSET  0x0238 /* SCT match reload register of match channel 14; low 16-bit */
-#define LPC43_SCT_MATCHR15L_OFFSET  0x023c /* SCT match reload register of match channel 15; low 16-bit */
-
-#define LPC43_SCT_MATCHRH_OFFSET(n) (0x0202 + ((n) << 4)) /* n = 0..15 */
-#define LPC43_SCT_MATCHR0H_OFFSET   0x0202 /* SCT match reload register of match channel 0; high 16-bit */
-#define LPC43_SCT_MATCHR1H_OFFSET   0x0206 /* SCT match reload register of match channel 1; high 16-bit */
-#define LPC43_SCT_MATCHR2H_OFFSET   0x020a /* SCT match reload register of match channel 2; high 16-bit */
-#define LPC43_SCT_MATCHR3H_OFFSET   0x020e /* SCT match reload register of match channel 3; high 16-bit */
-#define LPC43_SCT_MATCHR4H_OFFSET   0x0212 /* SCT match reload register of match channel 4; high 16-bit */
-#define LPC43_SCT_MATCHR5H_OFFSET   0x0216 /* SCT match reload register of match channel 5; high 16-bit */
-#define LPC43_SCT_MATCHR6H_OFFSET   0x021a /* SCT match reload register of match channel 6; high 16-bit */
-#define LPC43_SCT_MATCHR7H_OFFSET   0x021e /* SCT match reload register of match channel 7; high 16-bit */
-#define LPC43_SCT_MATCHR8H_OFFSET   0x0222 /* SCT match reload register of match channel 8; high 16-bit */
-#define LPC43_SCT_MATCHR9H_OFFSET   0x0226 /* SCT match reload register of match channel 9; high 16-bit */
-#define LPC43_SCT_MATCHR10H_OFFSET  0x022a /* SCT match reload register of match channel 10; high 16-bit */
-#define LPC43_SCT_MATCHR11H_OFFSET  0x022e /* SCT match reload register of match channel 11; high 16-bit */
-#define LPC43_SCT_MATCHR12H_OFFSET  0x0232 /* SCT match reload register of match channel 12; high 16-bit */
-#define LPC43_SCT_MATCHR13H_OFFSET  0x0236 /* SCT match reload register of match channel 13; high 16-bit */
-#define LPC43_SCT_MATCHR14H_OFFSET  0x023a /* SCT match reload register of match channel 14; high 16-bit */
-#define LPC43_SCT_MATCHR15H_OFFSET  0x023e /* SCT match reload register of match channel 15; high 16-bit */
-
-#define LPC43_SCT_CAPC_OFFSET(n)    (0x0200 + ((n) << 4)) /* n = 0..15 */
+#define LPC43_SCT_MATCHRL_OFFSET(n) (0x0200 + ((n) << 2)) /* n = 0..15 */
+#define LPC43_SCT_MATCHRL0_OFFSET   0x0200 /* SCT match reload register of match channel 0; low 16-bit */
+#define LPC43_SCT_MATCHRL1_OFFSET   0x0204 /* SCT match reload register of match channel 1; low 16-bit */
+#define LPC43_SCT_MATCHRL2_OFFSET   0x0208 /* SCT match reload register of match channel 2; low 16-bit */
+#define LPC43_SCT_MATCHRL3_OFFSET   0x020c /* SCT match reload register of match channel 3; low 16-bit */
+#define LPC43_SCT_MATCHRL4_OFFSET   0x0210 /* SCT match reload register of match channel 4; low 16-bit */
+#define LPC43_SCT_MATCHRL5_OFFSET   0x0214 /* SCT match reload register of match channel 5; low 16-bit */
+#define LPC43_SCT_MATCHRL6_OFFSET   0x0218 /* SCT match reload register of match channel 6; low 16-bit */
+#define LPC43_SCT_MATCHRL7_OFFSET   0x021c /* SCT match reload register of match channel 7; low 16-bit */
+#define LPC43_SCT_MATCHRL8_OFFSET   0x0220 /* SCT match reload register of match channel 8; low 16-bit */
+#define LPC43_SCT_MATCHRL9_OFFSET   0x0224 /* SCT match reload register of match channel 9; low 16-bit */
+#define LPC43_SCT_MATCHRL10_OFFSET  0x0228 /* SCT match reload register of match channel 10; low 16-bit */
+#define LPC43_SCT_MATCHRL11_OFFSET  0x022c /* SCT match reload register of match channel 11; low 16-bit */
+#define LPC43_SCT_MATCHRL12_OFFSET  0x0230 /* SCT match reload register of match channel 12; low 16-bit */
+#define LPC43_SCT_MATCHRL13_OFFSET  0x0234 /* SCT match reload register of match channel 13; low 16-bit */
+#define LPC43_SCT_MATCHRL14_OFFSET  0x0238 /* SCT match reload register of match channel 14; low 16-bit */
+#define LPC43_SCT_MATCHRL15_OFFSET  0x023c /* SCT match reload register of match channel 15; low 16-bit */
+
+#define LPC43_SCT_MATCHRH_OFFSET(n) (0x0202 + ((n) << 2)) /* n = 0..15 */
+#define LPC43_SCT_MATCHRH0_OFFSET   0x0202 /* SCT match reload register of match channel 0; high 16-bit */
+#define LPC43_SCT_MATCHRH1_OFFSET   0x0206 /* SCT match reload register of match channel 1; high 16-bit */
+#define LPC43_SCT_MATCHRH2_OFFSET   0x020a /* SCT match reload register of match channel 2; high 16-bit */
+#define LPC43_SCT_MATCHRH3_OFFSET   0x020e /* SCT match reload register of match channel 3; high 16-bit */
+#define LPC43_SCT_MATCHRH4_OFFSET   0x0212 /* SCT match reload register of match channel 4; high 16-bit */
+#define LPC43_SCT_MATCHRH5_OFFSET   0x0216 /* SCT match reload register of match channel 5; high 16-bit */
+#define LPC43_SCT_MATCHRH6_OFFSET   0x021a /* SCT match reload register of match channel 6; high 16-bit */
+#define LPC43_SCT_MATCHRH7_OFFSET   0x021e /* SCT match reload register of match channel 7; high 16-bit */
+#define LPC43_SCT_MATCHRH8_OFFSET   0x0222 /* SCT match reload register of match channel 8; high 16-bit */
+#define LPC43_SCT_MATCHRH9_OFFSET   0x0226 /* SCT match reload register of match channel 9; high 16-bit */
+#define LPC43_SCT_MATCHRH10_OFFSET  0x022a /* SCT match reload register of match channel 10; high 16-bit */
+#define LPC43_SCT_MATCHRH11_OFFSET  0x022e /* SCT match reload register of match channel 11; high 16-bit */
+#define LPC43_SCT_MATCHRH12_OFFSET  0x0232 /* SCT match reload register of match channel 12; high 16-bit */
+#define LPC43_SCT_MATCHRH13_OFFSET  0x0236 /* SCT match reload register of match channel 13; high 16-bit */
+#define LPC43_SCT_MATCHRH14_OFFSET  0x023a /* SCT match reload register of match channel 14; high 16-bit */
+#define LPC43_SCT_MATCHRH15_OFFSET  0x023e /* SCT match reload register of match channel 15; high 16-bit */
+
+#define LPC43_SCT_CAPC_OFFSET(n)    (0x0200 + ((n) << 2)) /* n = 0..15 */
 #define LPC43_SCT_CAPC0_OFFSET      0x0200 /* SCT capture control register Ch0 */
 #define LPC43_SCT_CAPC1_OFFSET      0x0204 /* SCT capture control register Ch1 */
 #define LPC43_SCT_CAPC2_OFFSET      0x0208 /* SCT capture control register Ch2 */
@@ -373,149 +337,113 @@
 #define LPC43_SCT_CAPC14_OFFSET     0x0238 /* SCT capture control register Ch14 */
 #define LPC43_SCT_CAPC15_OFFSET     0x023c /* SCT capture control register Ch15 */
 
-#define LPC43_SCT_CAPCL_OFFSET(n)   (0x0200 + ((n) << 4)) /* n = 0..15 */
-#define LPC43_SCT_CAPC0L_OFFSET     0x0200 /* SCT capture control register Ch0; low 16-bit */
-#define LPC43_SCT_CAPC1L_OFFSET     0x0204 /* SCT capture control register Ch1; low 16-bit */
-#define LPC43_SCT_CAPC2L_OFFSET     0x0208 /* SCT capture control register Ch2; low 16-bit */
-#define LPC43_SCT_CAPC3L_OFFSET     0x020c /* SCT capture control register Ch3; low 16-bit */
-#define LPC43_SCT_CAPC4L_OFFSET     0x0210 /* SCT capture control register Ch4; low 16-bit */
-#define LPC43_SCT_CAPC5L_OFFSET     0x0214 /* SCT capture control register Ch5; low 16-bit */
-#define LPC43_SCT_CAPC6L_OFFSET     0x0218 /* SCT capture control register Ch6; low 16-bit */
-#define LPC43_SCT_CAPC7L_OFFSET     0x021c /* SCT capture control register Ch7; low 16-bit */
-#define LPC43_SCT_CAPC8L_OFFSET     0x0220 /* SCT capture control register Ch8; low 16-bit */
-#define LPC43_SCT_CAPC9L_OFFSET     0x0224 /* SCT capture control register Ch9; low 16-bit */
-#define LPC43_SCT_CAPC10L_OFFSET    0x0228 /* SCT capture control register Ch10; low 16-bit */
-#define LPC43_SCT_CAPC11L_OFFSET    0x022c /* SCT capture control register Ch11; low 16-bit */
-#define LPC43_SCT_CAPC12L_OFFSET    0x0230 /* SCT capture control register Ch12; low 16-bit */
-#define LPC43_SCT_CAPC13L_OFFSET    0x0234 /* SCT capture control register Ch13; low 16-bit */
-#define LPC43_SCT_CAPC14L_OFFSET    0x0238 /* SCT capture control register Ch14; low 16-bit */
-#define LPC43_SCT_CAPC15L_OFFSET    0x023c /* SCT capture control register Ch15; low 16-bit */
-
-#define LPC43_SCT_CAPCH_OFFSET(n)   (0x0202 + ((n) << 4)) /* n = 0..15 */
-#define LPC43_SCT_CAPC0H_OFFSET     0x0202 /* SCT capture control register Ch0; high 16-bit */
-#define LPC43_SCT_CAPC1H_OFFSET     0x0206 /* SCT capture control register Ch1; high 16-bit */
-#define LPC43_SCT_CAPC2H_OFFSET     0x020a /* SCT capture control register Ch2; high 16-bit */
-#define LPC43_SCT_CAPC3H_OFFSET     0x020e /* SCT capture control register Ch3; high 16-bit */
-#define LPC43_SCT_CAPC4H_OFFSET     0x0212 /* SCT capture control register Ch4; high 16-bit */
-#define LPC43_SCT_CAPC5H_OFFSET     0x0216 /* SCT capture control register Ch5; high 16-bit */
-#define LPC43_SCT_CAPC6H_OFFSET     0x021a /* SCT capture control register Ch6; high 16-bit */
-#define LPC43_SCT_CAPC7H_OFFSET     0x021e /* SCT capture control register Ch7; high 16-bit */
-#define LPC43_SCT_CAPC8H_OFFSET     0x0222 /* SCT capture control register Ch8; high 16-bit */
-#define LPC43_SCT_CAPC9H_OFFSET     0x0226 /* SCT capture control register Ch9; high 16-bit */
-#define LPC43_SCT_CAPC10H_OFFSET    0x022a /* SCT capture control register Ch10; high 16-bit */
-#define LPC43_SCT_CAPC11H_OFFSET    0x022e /* SCT capture control register Ch11; high 16-bit */
-#define LPC43_SCT_CAPC12H_OFFSET    0x0232 /* SCT capture control register Ch12; high 16-bit */
-#define LPC43_SCT_CAPC13H_OFFSET    0x0236 /* SCT capture control register Ch13; high 16-bit */
-#define LPC43_SCT_CAPC14H_OFFSET    0x023a /* SCT capture control register Ch14; high 16-bit */
-#define LPC43_SCT_CAPC15H_OFFSET    0x023e /* SCT capture control register Ch15; high 16-bit */
-
-#define LPC43_SCT_MATCHRA_OFFSET(n) (0x0280 + ((n) << 4)) /* n = 0..15 */
-#define LPC43_SCT_MATCHR0A_OFFSET   0x0280 /* SCT match reload alias register of match channel 0 */
-#define LPC43_SCT_MATCHR1A_OFFSET   0x0284 /* SCT match reload alias register of match channel 1 */
-#define LPC43_SCT_MATCHR2A_OFFSET   0x0288 /* SCT match reload alias register of match channel 2 */
-#define LPC43_SCT_MATCHR3A_OFFSET   0x028c /* SCT match reload alias register of match channel 3 */
-#define LPC43_SCT_MATCHR4A_OFFSET   0x0290 /* SCT match reload alias register of match channel 4 */
-#define LPC43_SCT_MATCHR5A_OFFSET   0x0294 /* SCT match reload alias register of match channel 5 */
-#define LPC43_SCT_MATCHR6A_OFFSET   0x0298 /* SCT match reload alias register of match channel 6 */
-#define LPC43_SCT_MATCHR7A_OFFSET   0x029c /* SCT match reload alias register of match channel 7 */
-#define LPC43_SCT_MATCHR8A_OFFSET   0x02a0 /* SCT match reload alias register of match channel 8 */
-#define LPC43_SCT_MATCHR9A_OFFSET   0x02a4 /* SCT match reload alias register of match channel 9 */
-#define LPC43_SCT_MATCHR10A_OFFSET  0x02a8 /* SCT match reload alias register of match channel 10 */
-#define LPC43_SCT_MATCHR11A_OFFSET  0x02ac /* SCT match reload alias register of match channel 11 */
-#define LPC43_SCT_MATCHR12A_OFFSET  0x02b0 /* SCT match reload alias register of match channel 12 */
-#define LPC43_SCT_MATCHR13A_OFFSET  0x02b4 /* SCT match reload alias register of match channel 13 */
-#define LPC43_SCT_MATCHR14A_OFFSET  0x02b8 /* SCT match reload alias register of match channel 14 */
-#define LPC43_SCT_MATCHR15A_OFFSET  0x02bc /* SCT match reload alias register of match channel 15 */
-
-#define LPC43_SCT_MATCHRLA_OFFSET(n) (0x0280 + ((n) << 4)) /* n = 0..15 */
-#define LPC43_SCT_MATCHR0LA_OFFSET  0x0280 /* SCT match reload alias register of match channel 0; low 16-bit */
-#define LPC43_SCT_MATCHR1LA_OFFSET  0x0284 /* SCT match reload alias register of match channel 1; low 16-bit */
-#define LPC43_SCT_MATCHR2LA_OFFSET  0x0288 /* SCT match reload alias register of match channel 2; low 16-bit */
-#define LPC43_SCT_MATCHR3LA_OFFSET  0x028c /* SCT match reload alias register of match channel 3; low 16-bit */
-#define LPC43_SCT_MATCHR4LA_OFFSET  0x0290 /* SCT match reload alias register of match channel 4; low 16-bit */
-#define LPC43_SCT_MATCHR5LA_OFFSET  0x0294 /* SCT match reload alias register of match channel 5; low 16-bit */
-#define LPC43_SCT_MATCHR6LA_OFFSET  0x0298 /* SCT match reload alias register of match channel 6; low 16-bit */
-#define LPC43_SCT_MATCHR7LA_OFFSET  0x029c /* SCT match reload alias register of match channel 7; low 16-bit */
-#define LPC43_SCT_MATCHR8LA_OFFSET  0x02a0 /* SCT match reload alias register of match channel 8; low 16-bit */
-#define LPC43_SCT_MATCHR9LA_OFFSET  0x02a4 /* SCT match reload alias register of match channel 9; low 16-bit */
-#define LPC43_SCT_MATCHR10LA_OFFSET 0x02a8 /* SCT match reload alias register of match channel 10; low 16-bit */
-#define LPC43_SCT_MATCHR11LA_OFFSET 0x02ac /* SCT match reload alias register of match channel 11; low 16-bit */
-#define LPC43_SCT_MATCHR12LA_OFFSET 0x02b0 /* SCT match reload alias register of match channel 12; low 16-bit */
-#define LPC43_SCT_MATCHR13LA_OFFSET 0x02b4 /* SCT match reload alias register of match channel 13; low 16-bit */
-#define LPC43_SCT_MATCHR14LA_OFFSET 0x02b8 /* SCT match reload alias register of match channel 14; low 16-bit */
-#define LPC43_SCT_MATCHR15LA_OFFSET 0x02bc /* SCT match reload alias register of match channel 15; low 16-bit */
-
-#define LPC43_SCT_MATCHRHA_OFFSET(n) (0x0282 + ((n) << 4)) /* n = 0..15 */
-#define LPC43_SCT_MATCHR0HA_OFFSET  0x0282 /* SCT match reload alias register of match channel 0; high 16-bit */
-#define LPC43_SCT_MATCHR1HA_OFFSET  0x0286 /* SCT match reload alias register of match channel 1; high 16-bit */
-#define LPC43_SCT_MATCHR2HA_OFFSET  0x028a /* SCT match reload alias register of match channel 2; high 16-bit */
-#define LPC43_SCT_MATCHR3HA_OFFSET  0x028e /* SCT match reload alias register of match channel 3; high 16-bit */
-#define LPC43_SCT_MATCHR4HA_OFFSET  0x0292 /* SCT match reload alias register of match channel 4; high 16-bit */
-#define LPC43_SCT_MATCHR5HA_OFFSET  0x0296 /* SCT match reload alias register of match channel 5; high 16-bit */
-#define LPC43_SCT_MATCHR6HA_OFFSET  0x029a /* SCT match reload alias register of match channel 6; high 16-bit */
-#define LPC43_SCT_MATCHR7HA_OFFSET  0x029e /* SCT match reload alias register of match channel 7; high 16-bit */
-#define LPC43_SCT_MATCHR8HA_OFFSET  0x02a2 /* SCT match reload alias register of match channel 8; high 16-bit */
-#define LPC43_SCT_MATCHR9HA_OFFSET  0x02a6 /* SCT match reload alias register of match channel 9; high 16-bit */
-#define LPC43_SCT_MATCHR10HA_OFFSET 0x02aa /* SCT match reload alias register of match channel 10; high 16-bit */
-#define LPC43_SCT_MATCHR11HA_OFFSET 0x02ae /* SCT match reload alias register of match channel 11; high 16-bit */
-#define LPC43_SCT_MATCHR12HA_OFFSET 0x02b2 /* SCT match reload alias register of match channel 12; high 16-bit */
-#define LPC43_SCT_MATCHR13HA_OFFSET 0x02b6 /* SCT match reload alias register of match channel 13; high 16-bit */
-#define LPC43_SCT_MATCHR14HA_OFFSET 0x02ba /* SCT match reload alias register of match channel 14; high 16-bit */
-#define LPC43_SCT_MATCHR15HA_OFFSET 0x02be /* SCT match reload alias register of match channel 15; high 16-bit */
-
-#define LPC43_SCT_CAPCA_OFFSET(n)   (0x0280 + ((n) << 4)) /* n = 0..15 */
-#define LPC43_SCT_CAPC0A_OFFSET     0x0280 /* SCT capture control alias register Ch0 */
-#define LPC43_SCT_CAPC1A_OFFSET     0x0284 /* SCT capture control alias register Ch1 */
-#define LPC43_SCT_CAPC2A_OFFSET     0x0288 /* SCT capture control alias register Ch2 */
-#define LPC43_SCT_CAPC3A_OFFSET     0x028c /* SCT capture control alias register Ch3 */
-#define LPC43_SCT_CAPC4A_OFFSET     0x0290 /* SCT capture control alias register Ch4 */
-#define LPC43_SCT_CAPC5A_OFFSET     0x0294 /* SCT capture control alias register Ch5 */
-#define LPC43_SCT_CAPC6A_OFFSET     0x0298 /* SCT capture control alias register Ch6 */
-#define LPC43_SCT_CAPC7A_OFFSET     0x029c /* SCT capture control alias register Ch7 */
-#define LPC43_SCT_CAPC8A_OFFSET     0x02a0 /* SCT capture control alias register Ch8 */
-#define LPC43_SCT_CAPC9A_OFFSET     0x02a4 /* SCT capture control alias register Ch9 */
-#define LPC43_SCT_CAPC10A_OFFSET    0x02a8 /* SCT capture control alias register Ch10 */
-#define LPC43_SCT_CAPC11A_OFFSET    0x02ac /* SCT capture control alias register Ch11 */
-#define LPC43_SCT_CAPC12A_OFFSET    0x02b0 /* SCT capture control alias register Ch12 */
-#define LPC43_SCT_CAPC13A_OFFSET    0x02b4 /* SCT capture control alias register Ch13 */
-#define LPC43_SCT_CAPC14A_OFFSET    0x02b8 /* SCT capture control alias register Ch14 */
-#define LPC43_SCT_CAPC15A_OFFSET    0x02bc /* SCT capture control alias register Ch15 */
-
-#define LPC43_SCT_CAPCLA_OFFSET(n)  (0x0280 + ((n) << 4)) /* n = 0..15 */
+#define LPC43_SCT_CAPCL_OFFSET(n)   (0x0200 + ((n) << 2)) /* n = 0..15 */
+#define LPC43_SCT_CAPCL0_OFFSET     0x0200 /* SCT capture control register Ch0; low 16-bit */
+#define LPC43_SCT_CAPCL1_OFFSET     0x0204 /* SCT capture control register Ch1; low 16-bit */
+#define LPC43_SCT_CAPCL2_OFFSET     0x0208 /* SCT capture control register Ch2; low 16-bit */
+#define LPC43_SCT_CAPCL3_OFFSET     0x020c /* SCT capture control register Ch3; low 16-bit */
+#define LPC43_SCT_CAPCL4_OFFSET     0x0210 /* SCT capture control register Ch4; low 16-bit */
+#define LPC43_SCT_CAPCL5_OFFSET     0x0214 /* SCT capture control register Ch5; low 16-bit */
+#define LPC43_SCT_CAPCL6_OFFSET     0x0218 /* SCT capture control register Ch6; low 16-bit */
+#define LPC43_SCT_CAPCL7_OFFSET     0x021c /* SCT capture control register Ch7; low 16-bit */
+#define LPC43_SCT_CAPCL8_OFFSET     0x0220 /* SCT capture control register Ch8; low 16-bit */
+#define LPC43_SCT_CAPCL9_OFFSET     0x0224 /* SCT capture control register Ch9; low 16-bit */
+#define LPC43_SCT_CAPCL10_OFFSET    0x0228 /* SCT capture control register Ch10; low 16-bit */
+#define LPC43_SCT_CAPCL11_OFFSET    0x022c /* SCT capture control register Ch11; low 16-bit */
+#define LPC43_SCT_CAPCL12_OFFSET    0x0230 /* SCT capture control register Ch12; low 16-bit */
+#define LPC43_SCT_CAPCL13_OFFSET    0x0234 /* SCT capture control register Ch13; low 16-bit */
+#define LPC43_SCT_CAPCL14_OFFSET    0x0238 /* SCT capture control register Ch14; low 16-bit */
+#define LPC43_SCT_CAPCL15_OFFSET    0x023c /* SCT capture control register Ch15; low 16-bit */
+
+#define LPC43_SCT_CAPCH_OFFSET(n)   (0x0202 + ((n) << 2)) /* n = 0..15 */
+#define LPC43_SCT_CAPCH0_OFFSET     0x0202 /* SCT capture control register Ch0; high 16-bit */
+#define LPC43_SCT_CAPCH1_OFFSET     0x0206 /* SCT capture control register Ch1; high 16-bit */
+#define LPC43_SCT_CAPCH2_OFFSET     0x020a /* SCT capture control register Ch2; high 16-bit */
+#define LPC43_SCT_CAPCH3_OFFSET     0x020e /* SCT capture control register Ch3; high 16-bit */
+#define LPC43_SCT_CAPCH4_OFFSET     0x0212 /* SCT capture control register Ch4; high 16-bit */
+#define LPC43_SCT_CAPCH5_OFFSET     0x0216 /* SCT capture control register Ch5; high 16-bit */
+#define LPC43_SCT_CAPCH6_OFFSET     0x021a /* SCT capture control register Ch6; high 16-bit */
+#define LPC43_SCT_CAPCH7_OFFSET     0x021e /* SCT capture control register Ch7; high 16-bit */
+#define LPC43_SCT_CAPCH8_OFFSET     0x0222 /* SCT capture control register Ch8; high 16-bit */
+#define LPC43_SCT_CAPCH9_OFFSET     0x0226 /* SCT capture control register Ch9; high 16-bit */
+#define LPC43_SCT_CAPCH10_OFFSET    0x022a /* SCT capture control register Ch10; high 16-bit */
+#define LPC43_SCT_CAPCH11_OFFSET    0x022e /* SCT capture control register Ch11; high 16-bit */
+#define LPC43_SCT_CAPCH12_OFFSET    0x0232 /* SCT capture control register Ch12; high 16-bit */
+#define LPC43_SCT_CAPCH13_OFFSET    0x0236 /* SCT capture control register Ch13; high 16-bit */
+#define LPC43_SCT_CAPCH14_OFFSET    0x023a /* SCT capture control register Ch14; high 16-bit */
+#define LPC43_SCT_CAPCH15_OFFSET    0x023e /* SCT capture control register Ch15; high 16-bit */
+
+#define LPC43_SCT_MATCHRLA_OFFSET(n) (0x0280 + ((n) << 1)) /* n = 0..15 */
+#define LPC43_SCT_MATCHRLA0_OFFSET  0x0280 /* SCT match reload alias register of match channel 0; low 16-bit */
+#define LPC43_SCT_MATCHRLA1_OFFSET  0x0282 /* SCT match reload alias register of match channel 1; low 16-bit */
+#define LPC43_SCT_MATCHRLA2_OFFSET  0x0284 /* SCT match reload alias register of match channel 2; low 16-bit */
+#define LPC43_SCT_MATCHRLA3_OFFSET  0x0286 /* SCT match reload alias register of match channel 3; low 16-bit */
+#define LPC43_SCT_MATCHRLA4_OFFSET  0x0288 /* SCT match reload alias register of match channel 4; low 16-bit */
+#define LPC43_SCT_MATCHRLA5_OFFSET  0x028a /* SCT match reload alias register of match channel 5; low 16-bit */
+#define LPC43_SCT_MATCHRLA6_OFFSET  0x028c /* SCT match reload alias register of match channel 6; low 16-bit */
+#define LPC43_SCT_MATCHRLA7_OFFSET  0x028e /* SCT match reload alias register of match channel 7; low 16-bit */
+#define LPC43_SCT_MATCHRLA8_OFFSET  0x0290 /* SCT match reload alias register of match channel 8; low 16-bit */
+#define LPC43_SCT_MATCHRLA9_OFFSET  0x0292 /* SCT match reload alias register of match channel 9; low 16-bit */
+#define LPC43_SCT_MATCHRLA10_OFFSET 0x0294 /* SCT match reload alias register of match channel 10; low 16-bit */
+#define LPC43_SCT_MATCHRLA11_OFFSET 0x0296 /* SCT match reload alias register of match channel 11; low 16-bit */
+#define LPC43_SCT_MATCHRLA12_OFFSET 0x0298 /* SCT match reload alias register of match channel 12; low 16-bit */
+#define LPC43_SCT_MATCHRLA13_OFFSET 0x029a /* SCT match reload alias register of match channel 13; low 16-bit */
+#define LPC43_SCT_MATCHRLA14_OFFSET 0x029c /* SCT match reload alias register of match channel 14; low 16-bit */
+#define LPC43_SCT_MATCHRLA15_OFFSET 0x029e /* SCT match reload alias register of match channel 15; low 16-bit */
+
+#define LPC43_SCT_MATCHRHA_OFFSET(n) (0x02c0 + ((n) << 1)) /* n = 0..15 */
+#define LPC43_SCT_MATCHRHA0_OFFSET  0x02c0 /* SCT match reload alias register of match channel 0; high 16-bit */
+#define LPC43_SCT_MATCHRHA1_OFFSET  0x02c2 /* SCT match reload alias register of match channel 1; high 16-bit */
+#define LPC43_SCT_MATCHRHA2_OFFSET  0x02c4 /* SCT match reload alias register of match channel 2; high 16-bit */
+#define LPC43_SCT_MATCHRHA3_OFFSET  0x02c6 /* SCT match reload alias register of match channel 3; high 16-bit */
+#define LPC43_SCT_MATCHRHA4_OFFSET  0x02c8 /* SCT match reload alias register of match channel 4; high 16-bit */
+#define LPC43_SCT_MATCHRHA5_OFFSET  0x02ca /* SCT match reload alias register of match channel 5; high 16-bit */
+#define LPC43_SCT_MATCHRHA6_OFFSET  0x02cc /* SCT match reload alias register of match channel 6; high 16-bit */
+#define LPC43_SCT_MATCHRHA7_OFFSET  0x02ce /* SCT match reload alias register of match channel 7; high 16-bit */
+#define LPC43_SCT_MATCHRHA8_OFFSET  0x02d0 /* SCT match reload alias register of match channel 8; high 16-bit */
+#define LPC43_SCT_MATCHRHA9_OFFSET  0x02d2 /* SCT match reload alias register of match channel 9; high 16-bit */
+#define LPC43_SCT_MATCHRHA10_OFFSET 0x02d4 /* SCT match reload alias register of match channel 10; high 16-bit */
+#define LPC43_SCT_MATCHRHA11_OFFSET 0x02d6 /* SCT match reload alias register of match channel 11; high 16-bit */
+#define LPC43_SCT_MATCHRHA12_OFFSET 0x02d8 /* SCT match reload alias register of match channel 12; high 16-bit */
+#define LPC43_SCT_MATCHRHA13_OFFSET 0x02da /* SCT match reload alias register of match channel 13; high 16-bit */
+#define LPC43_SCT_MATCHRHA14_OFFSET 0x02dc /* SCT match reload alias register of match channel 14; high 16-bit */
+#define LPC43_SCT_MATCHRHA15_OFFSET 0x02de /* SCT match reload alias register of match channel 15; high 16-bit */
+
+#define LPC43_SCT_CAPCLA_OFFSET(n)  (0x0280 + ((n) << 1)) /* n = 0..15 */
 #define LPC43_SCT_CAPC0LA_OFFSET    0x0280 /* SCT capture control alias register Ch0; low 16-bit */
-#define LPC43_SCT_CAPC1LA_OFFSET    0x0284 /* SCT capture control alias register Ch1; low 16-bit */
-#define LPC43_SCT_CAPC2LA_OFFSET    0x0288 /* SCT capture control alias register Ch2; low 16-bit */
-#define LPC43_SCT_CAPC3LA_OFFSET    0x028c /* SCT capture control alias register Ch3; low 16-bit */
-#define LPC43_SCT_CAPC4LA_OFFSET    0x0290 /* SCT capture control alias register Ch4; low 16-bit */
-#define LPC43_SCT_CAPC5LA_OFFSET    0x0294 /* SCT capture control alias register Ch5; low 16-bit */
-#define LPC43_SCT_CAPC6LA_OFFSET    0x0298 /* SCT capture control alias register Ch6; low 16-bit */
-#define LPC43_SCT_CAPC7LA_OFFSET    0x029c /* SCT capture control alias register Ch7; low 16-bit */
-#define LPC43_SCT_CAPC8LA_OFFSET    0x02a0 /* SCT capture control alias register Ch8; low 16-bit */
-#define LPC43_SCT_CAPC9LA_OFFSET    0x02a4 /* SCT capture control alias register Ch9; low 16-bit */
-#define LPC43_SCT_CAPC10LA_OFFSET   0x02a8 /* SCT capture control alias register Ch10; low 16-bit */
-#define LPC43_SCT_CAPC11LA_OFFSET   0x02ac /* SCT capture control alias register Ch11; low 16-bit */
-#define LPC43_SCT_CAPC12LA_OFFSET   0x02b0 /* SCT capture control alias register Ch12; low 16-bit */
-#define LPC43_SCT_CAPC13LA_OFFSET   0x02b4 /* SCT capture control alias register Ch13; low 16-bit */
-#define LPC43_SCT_CAPC14LA_OFFSET   0x02b8 /* SCT capture control alias register Ch14; low 16-bit */
-#define LPC43_SCT_CAPC15LA_OFFSET   0x02bc /* SCT capture control alias register Ch15; low 16-bit */
-
-#define LPC43_SCT_CAPCHA_OFFSET(n)  (0x0282 + ((n) << 4)) /* n = 0..15 */
-#define LPC43_SCT_CAPC0HA_OFFSET    0x0282 /* SCT capture control alias register Ch0; high 16-bit */
-#define LPC43_SCT_CAPC1HA_OFFSET    0x0286 /* SCT capture control alias register Ch1; high 16-bit */
-#define LPC43_SCT_CAPC2HA_OFFSET    0x028a /* SCT capture control alias register Ch2; high 16-bit */
-#define LPC43_SCT_CAPC3HA_OFFSET    0x028e /* SCT capture control alias register Ch3; high 16-bit */
-#define LPC43_SCT_CAPC4HA_OFFSET    0x0292 /* SCT capture control alias register Ch4; high 16-bit */
-#define LPC43_SCT_CAPC5HA_OFFSET    0x0296 /* SCT capture control alias register Ch5; high 16-bit */
-#define LPC43_SCT_CAPC6HA_OFFSET    0x029a /* SCT capture control alias register Ch6; high 16-bit */
-#define LPC43_SCT_CAPC7HA_OFFSET    0x029e /* SCT capture control alias register Ch7; high 16-bit */
-#define LPC43_SCT_CAPC8HA_OFFSET    0x02a2 /* SCT capture control alias register Ch8; high 16-bit */
-#define LPC43_SCT_CAPC9HA_OFFSET    0x02a6 /* SCT capture control alias register Ch9; high 16-bit */
-#define LPC43_SCT_CAPC10HA_OFFSET   0x02aa /* SCT capture control alias register Ch10; high 16-bit */
-#define LPC43_SCT_CAPC11HA_OFFSET   0x02ae /* SCT capture control alias register Ch11; high 16-bit */
-#define LPC43_SCT_CAPC12HA_OFFSET   0x02b2 /* SCT capture control alias register Ch12; high 16-bit */
-#define LPC43_SCT_CAPC13HA_OFFSET   0x02b6 /* SCT capture control alias register Ch13; high 16-bit */
-#define LPC43_SCT_CAPC14HA_OFFSET   0x02ba /* SCT capture control alias register Ch14; high 16-bit */
-#define LPC43_SCT_CAPC15HA_OFFSET   0x02be /* SCT capture control alias register Ch15; high 16-bit */
+#define LPC43_SCT_CAPC1LA_OFFSET    0x0282 /* SCT capture control alias register Ch1; low 16-bit */
+#define LPC43_SCT_CAPC2LA_OFFSET    0x0284 /* SCT capture control alias register Ch2; low 16-bit */
+#define LPC43_SCT_CAPC3LA_OFFSET    0x0286 /* SCT capture control alias register Ch3; low 16-bit */
+#define LPC43_SCT_CAPC4LA_OFFSET    0x0288 /* SCT capture control alias register Ch4; low 16-bit */
+#define LPC43_SCT_CAPC5LA_OFFSET    0x028a /* SCT capture control alias register Ch5; low 16-bit */
+#define LPC43_SCT_CAPC6LA_OFFSET    0x028c /* SCT capture control alias register Ch6; low 16-bit */
+#define LPC43_SCT_CAPC7LA_OFFSET    0x028e /* SCT capture control alias register Ch7; low 16-bit */
+#define LPC43_SCT_CAPC8LA_OFFSET    0x0290 /* SCT capture control alias register Ch8; low 16-bit */
+#define LPC43_SCT_CAPC9LA_OFFSET    0x0292 /* SCT capture control alias register Ch9; low 16-bit */
+#define LPC43_SCT_CAPC10LA_OFFSET   0x0294 /* SCT capture control alias register Ch10; low 16-bit */
+#define LPC43_SCT_CAPC11LA_OFFSET   0x0296 /* SCT capture control alias register Ch11; low 16-bit */
+#define LPC43_SCT_CAPC12LA_OFFSET   0x0298 /* SCT capture control alias register Ch12; low 16-bit */
+#define LPC43_SCT_CAPC13LA_OFFSET   0x029a /* SCT capture control alias register Ch13; low 16-bit */
+#define LPC43_SCT_CAPC14LA_OFFSET   0x029c /* SCT capture control alias register Ch14; low 16-bit */
+#define LPC43_SCT_CAPC15LA_OFFSET   0x029e /* SCT capture control alias register Ch15; low 16-bit */
+
+#define LPC43_SCT_CAPCHA_OFFSET(n)  (0x02c0 + ((n) << 1)) /* n = 0..15 */
+#define LPC43_SCT_CAPC0HA_OFFSET    0x02c0 /* SCT capture control alias register Ch0; high 16-bit */
+#define LPC43_SCT_CAPC1HA_OFFSET    0x02c2 /* SCT capture control alias register Ch1; high 16-bit */
+#define LPC43_SCT_CAPC2HA_OFFSET    0x02c4 /* SCT capture control alias register Ch2; high 16-bit */
+#define LPC43_SCT_CAPC3HA_OFFSET    0x02c6 /* SCT capture control alias register Ch3; high 16-bit */
+#define LPC43_SCT_CAPC4HA_OFFSET    0x02c8 /* SCT capture control alias register Ch4; high 16-bit */
+#define LPC43_SCT_CAPC5HA_OFFSET    0x02ca /* SCT capture control alias register Ch5; high 16-bit */
+#define LPC43_SCT_CAPC6HA_OFFSET    0x02cc /* SCT capture control alias register Ch6; high 16-bit */
+#define LPC43_SCT_CAPC7HA_OFFSET    0x02ce /* SCT capture control alias register Ch7; high 16-bit */
+#define LPC43_SCT_CAPC8HA_OFFSET    0x02d0 /* SCT capture control alias register Ch8; high 16-bit */
+#define LPC43_SCT_CAPC9HA_OFFSET    0x02d2 /* SCT capture control alias register Ch9; high 16-bit */
+#define LPC43_SCT_CAPC10HA_OFFSET   0x02d4 /* SCT capture control alias register Ch10; high 16-bit */
+#define LPC43_SCT_CAPC11HA_OFFSET   0x02d6 /* SCT capture control alias register Ch11; high 16-bit */
+#define LPC43_SCT_CAPC12HA_OFFSET   0x02d8 /* SCT capture control alias register Ch12; high 16-bit */
+#define LPC43_SCT_CAPC13HA_OFFSET   0x02da /* SCT capture control alias register Ch13; high 16-bit */
+#define LPC43_SCT_CAPC14HA_OFFSET   0x02dc /* SCT capture control alias register Ch14; high 16-bit */
+#define LPC43_SCT_CAPC15HA_OFFSET   0x02de /* SCT capture control alias register Ch15; high 16-bit */
 
 #define LPC43_SCT_EVSM_OFFSET(n)    (0x0300 + ((n) << 3))
 #define LPC43_SCT_EVC_OFFSET(n)     (0x0304 + ((n) << 3))
@@ -1168,7 +1096,12 @@
 #define SCT_CONFIG_INSYNC_SHIFT     (9)       /* Bits 9-16: Synchronization for input n=1..7 */
 #define SCT_CONFIG_INSYNC_MASK      (0xff << SCT_CONFIG_INSYNC_SHIFT)
 #  define SCT_CONFIG_INSYNC(n)      (1 << (SCT_CONFIG_INSYNC_SHIFT+(n)))
-                                              /* Bits 17-31: Reserved */
+#define SCT_CONFIG_AUTOLIMITL       (1 << 17) /* Bit 17: Only available on flash-based parts that contain a SCT with dither engine.
+                                                         Causes a match on match register 0 to be treated as a de-facto
+                                                         LIMIT condition without the need to define an associated event. */
+
+#define SCT_CONFIG_AUTOLIMITH       (1 << 18) /* Bit 18: See Bit 17, but for high timer */
+                                              /* Bits 19-31: Reserved */
 /* SCT control register */
 
 #define SCT_CTRL_DOWNU              (1 << 0)  /* Bit 0:  Unified counter counts down */
@@ -1328,7 +1261,7 @@
 #define SCT_OUTDIRC_REVH            (2)        /* Reversed when H counter is counting down */
 
 #define SCT_OUTDIRC_SETCLR_SHIFT(c) ((c) << 1)
-#define SCT_OUTDIRC_SETCLR_SHIFT(c) (3 << SCT_OUTDIRC_SETCLR_SHIFT(c))
+#define SCT_OUTDIRC_SETCLR_MASK(c)  (3 << SCT_OUTDIRC_SETCLR_SHIFT(c))
 #  define SCT_OUTDIRC_SETCLR(c,n)   ((n) << SCT_OUTDIRC_SETCLR_SHIFT(c))
 
 #define SCT_OUTDIRC_SETCLR0_SHIFT   (0)       /* Bits 0-1: Set/clear operation on output 0 */
@@ -1388,7 +1321,7 @@
 #define SCT_RES_TOGGLE              (2)        /* Toggle output */
 
 #define SCT_RES_OUT_SHIFT(c)        ((c) << 1)
-#define SCT_RES_OUT_SHIFT(c)        (3 << SCT_RES_OUT_SHIFT(c))
+#define SCT_RES_OUT_MASK(c)         (3 << SCT_RES_OUT_SHIFT(c))
 #  define SCT_RES_OUT(c,n)          ((n) << SCT_RES_OUT_SHIFT(c))
 
 #define SCT_RES_OUT0_SHIFT          (0)       /* Bits 0-1: Effect of simultaneous set and clear on output 0 */
@@ -1540,15 +1473,17 @@
 /* SCT event state mask registers 0 to 15 */
 
 #define SCT_EVSM(n)                 (1 << (n))
+#define SCT_EVSM_ALL_STATES         0xFFFFFFFF
 
 /* SCT event control registers 0 to 15 */
 
 #define SCT_EVC_MATCHSEL_SHIFT      (0)       /* Bits 0-3: Selects Match register associated event */
-#define SCT_EVC_MATCHSEL_MASK       (15 << SCT_EVC_MATCHSEL_SHIFT)
+#define SCT_EVC_MATCHSEL_MASK       (0xf << SCT_EVC_MATCHSEL_SHIFT)
+#define SCT_EVC_MATCHSEL(m)         ((m) << SCT_EVC_MATCHSEL_SHIFT)
 #define SCT_EVC_HEVENT              (1 << 4)  /* Bit 4:  Select L/H counter */
 #define SCT_EVC_OUTSEL              (1 << 5)  /* Bit 5:  Input/output select*/
 #define SCT_EVC_IOSEL_SHIFT         (6)       /* Bits 6-9: Selects input or output signal associated event */
-#define SCT_EVC_IOSEL_MASK          (15 << SCT_EVC_IOSEL_SHIFT)
+#define SCT_EVC_IOSEL_MASK          (0xf << SCT_EVC_IOSEL_SHIFT)
 #define SCT_EVC_IOCOND_SHIFT        (10)      /* Bits 10-11: Selects I/O condition for event n */
 #define SCT_EVC_IOCOND_MASK         (3 << SCT_EVC_IOCOND_SHIFT)
 #  define SCT_EVC_IOCOND_LOW        (0 << SCT_EVC_IOCOND_SHIFT)
@@ -1563,19 +1498,19 @@
 #  define SCT_EVC_COMBMODE_AND      (3 << SCT_EVC_COMBMODE_SHIFT)
 #define SCT_EVC_STATELD             (1 << 14)  /* Bit 14:  STATEV control */
 #define SCT_EVC_STATEV_SHIFT        (15)       /* Bits 15-19: State value */
-#define SCT_EVC_STATEV_MASK         (31 << SCT_EVC_STATEV_SHIFT)
+#define SCT_EVC_STATEV_MASK         (0x1f << SCT_EVC_STATEV_SHIFT)
                                                /* Bits 20-31: Reserved */
 /* SCT output set registers 0 to 15 */
 
 #define SCT_OUTSET_SHIFT            (0)        /* Bits 0-15: Bit m selects event m to set output n */
 #define SCT_OUTSET_MASK             (0xffff << SCT_OUTSET_SHIFT)
-#  define SCT_OUTSET_MASK(m)        (1 << ((n)SCT_OUTSET_SHIFT))
+#  define SCT_OUTSET(m)             (1 << ((n)SCT_OUTSET_SHIFT))
                                                /* Bits 16-31: Reserved */
 /* SCT output clear registers 0 to 15 */
 
 #define SCT_OUTCLR_SHIFT            (0)        /* Bits 0-15: Bit m selects event m to clear output n */
 #define SCT_OUTCLR_MASK             (0xffff << SCT_OUTCLR_SHIFT)
-#  define SCT_OUTCLR_MASK(m)        (1 << ((n)SCT_OUTCLR_SHIFT))
+#  define SCT_OUTCLR(m)             (1 << ((n)SCT_OUTCLR_SHIFT))
                                                /* Bits 16-31: Reserved */
 
 /****************************************************************************************************
diff --git a/arch/arm/src/lpc43xx/chip/lpc43_sdmmc.h b/arch/arm/src/lpc43xx/chip/lpc43_sdmmc.h
index 1236d82f31c886e49a05955fb308388b999cd12f..05a51178fb24852294c8290ea145ac081cef7b82 100644
--- a/arch/arm/src/lpc43xx/chip/lpc43_sdmmc.h
+++ b/arch/arm/src/lpc43xx/chip/lpc43_sdmmc.h
@@ -143,10 +143,11 @@
 #define SDMMC_CTRL_CEATAINT              (1 << 11) /* Bit 11: CE-ATA device interrupts enabled */
                                                    /* Bits 12-15:  Reserved */
 #define SDMMC_CTRL_CDVA0                 (1 << 16) /* Bit 16: Controls SD_VOLT0 pin */
-#define SDMMC_CTRL_CDVA0                 (1 << 17) /* Bit 17: Controls SD_VOLT1 pin */
-#define SDMMC_CTRL_CDVA0                 (1 << 18) /* Bit 18: Controls SD_VOLT2 pin */
+#define SDMMC_CTRL_CDVA1                 (1 << 17) /* Bit 17: Controls SD_VOLT1 pin */
+#define SDMMC_CTRL_CDVA2                 (1 << 18) /* Bit 18: Controls SD_VOLT2 pin */
                                                    /* Bits 19-23:  Reserved */
-#define SDMMC_CTRL_INTDMA                (1 << 25) /* Bit 24: SD/MMC DMA use */
+                                                   /* Bit 24: Reserved - always write it as 0 */
+#define SDMMC_CTRL_INTDMA                (1 << 25) /* Bit 25: SD/MMC DMA use */
                                                    /* Bits 26-31:  Reserved */
 /* Power Enable Register (PWREN) */
 
diff --git a/arch/arm/src/lpc43xx/chip/lpc43_sgpio.h b/arch/arm/src/lpc43xx/chip/lpc43_sgpio.h
index bd3d2df39d2595716891e4fa12a06a9058b2fafd..bb68b872a02af5262693a56da6284fe5ca916677 100644
--- a/arch/arm/src/lpc43xx/chip/lpc43_sgpio.h
+++ b/arch/arm/src/lpc43xx/chip/lpc43_sgpio.h
@@ -45,9 +45,13 @@
 /****************************************************************************************************
  * Pre-processor Definitions
  ****************************************************************************************************/
+
+#define LPC43_SGPIO_SLICES_MASK 0x0000FFFF
+#define LPC43_SGPIO_NUM_SLICES 16
+
 /* Register Offsets *********************************************************************************/
 
-#define LPC43_SGPIO_OUT_MUXCFG_OFFSET(n)   (0x0000 + ((n) << 2)
+#define LPC43_SGPIO_OUT_MUXCFG_OFFSET(n)   (0x0000 + ((n) << 2))
 #define LPC43_SGPIO_OUT_MUXCFG0_OFFSET     0x0000 /* Pin multiplexer configuration register 0 */
 #define LPC43_SGPIO_OUT_MUXCFG1_OFFSET     0x0004 /* Pin multiplexer configuration register 1 */
 #define LPC43_SGPIO_OUT_MUXCFG2_OFFSET     0x0008 /* Pin multiplexer configuration register 2 */
@@ -65,7 +69,7 @@
 #define LPC43_SGPIO_OUT_MUXCFG14_OFFSET    0x0038 /* Pin multiplexer configuration register 14 */
 #define LPC43_SGPIO_OUT_MUXCFG15_OFFSET    0x003c /* Pin multiplexer configuration register 15 */
 
-#define LPC43_SGPIO_MUXCFG_OFFSET(n)       (0x0040 + ((n) << 2)
+#define LPC43_SGPIO_MUXCFG_OFFSET(n)       (0x0040 + ((n) << 2))
 #define LPC43_SGPIO_MUXCFG0_OFFSET         0x0040 /* SGPIO multiplexer configuration register 0 */
 #define LPC43_SGPIO_MUXCFG1_OFFSET         0x0044 /* SGPIO multiplexer configuration register 1 */
 #define LPC43_SGPIO_MUXCFG2_OFFSET         0x0048 /* SGPIO multiplexer configuration register 2 */
@@ -83,7 +87,7 @@
 #define LPC43_SGPIO_MUXCFG14_OFFSET        0x0078 /* SGPIO multiplexer configuration register 14 */
 #define LPC43_SGPIO_MUXCFG15_OFFSET        0x007c /* SGPIO multiplexer configuration register 15 */
 
-#define LPC43_SGPIO_SLICE_MUXCFG_OFFSET(n) (0x0080 + ((n) << 2)
+#define LPC43_SGPIO_SLICE_MUXCFG_OFFSET(n) (0x0080 + ((n) << 2))
 #define LPC43_SGPIO_SLICE_MUXCFG0_OFFSET   0x0080 /* Slice multiplexer configuration register 0 */
 #define LPC43_SGPIO_SLICE_MUXCFG1_OFFSET   0x0084 /* Slice multiplexer configuration register 1 */
 #define LPC43_SGPIO_SLICE_MUXCFG2_OFFSET   0x0088 /* Slice multiplexer configuration register 2 */
@@ -101,7 +105,7 @@
 #define LPC43_SGPIO_SLICE_MUXCFG14_OFFSET  0x00b8 /* Slice multiplexer configuration register 14 */
 #define LPC43_SGPIO_SLICE_MUXCFG15_OFFSET  0x00bc /* Slice multiplexer configuration register 15 */
 
-#define LPC43_SGPIO_REG_OFFSET(n)          (0x00c0 + ((n) << 2)
+#define LPC43_SGPIO_REG_OFFSET(n)          (0x00c0 + ((n) << 2))
 #define LPC43_SGPIO_REG0_OFFSET            0x00c0 /* Slice data register 0 */
 #define LPC43_SGPIO_REG1_OFFSET            0x00c4 /* Slice data register 1 */
 #define LPC43_SGPIO_REG2_OFFSET            0x00c8 /* Slice data register 2 */
@@ -119,7 +123,7 @@
 #define LPC43_SGPIO_REG14_OFFSET           0x00f8 /* Slice data register 14 */
 #define LPC43_SGPIO_REG15_OFFSET           0x00fc /* Slice data register 15 */
 
-#define LPC43_SGPIO_REG_SS_OFFSET(n)       (0x0100 + ((n) << 2)
+#define LPC43_SGPIO_REG_SS_OFFSET(n)       (0x0100 + ((n) << 2))
 #define LPC43_SGPIO_REG_SS0_OFFSET         0x0100 /* Slice data shadow register 0 */
 #define LPC43_SGPIO_REG_SS1_OFFSET         0x0104 /* Slice data shadow register 1 */
 #define LPC43_SGPIO_REG_SS2_OFFSET         0x0108 /* Slice data shadow register 2 */
@@ -137,7 +141,7 @@
 #define LPC43_SGPIO_REG_SS14_OFFSET        0x0138 /* Slice data shadow register 14 */
 #define LPC43_SGPIO_REG_SS15_OFFSET        0x013c /* Slice data shadow register 15 */
 
-#define LPC43_SGPIO_PRESET_OFFSET(n)       (0x0140 + ((n) << 2)
+#define LPC43_SGPIO_PRESET_OFFSET(n)       (0x0140 + ((n) << 2))
 #define LPC43_SGPIO_PRESET0_OFFSET         0x0140 /* COUNT0 reload value */
 #define LPC43_SGPIO_PRESET1_OFFSET         0x0144 /* COUNT1 reload value */
 #define LPC43_SGPIO_PRESET2_OFFSET         0x0148 /* COUNT2 reload value */
@@ -155,7 +159,7 @@
 #define LPC43_SGPIO_PRESET14_OFFSET        0x0178 /* COUNT14 reload value */
 #define LPC43_SGPIO_PRESET15_OFFSET        0x017c /* COUNT15 reload value */
 
-#define LPC43_SGPIO_COUNT_OFFSET(n)        (0x0180 + ((n) << 2)
+#define LPC43_SGPIO_COUNT_OFFSET(n)        (0x0180 + ((n) << 2))
 #define LPC43_SGPIO_COUNT0_OFFSET          0x0180 /* Down counter 0 */
 #define LPC43_SGPIO_COUNT1_OFFSET          0x0184 /* Down counter 1 */
 #define LPC43_SGPIO_COUNT2_OFFSET          0x0188 /* Down counter 2 */
@@ -173,7 +177,7 @@
 #define LPC43_SGPIO_COUNT14_OFFSET         0x01b8 /* Down counter 14 */
 #define LPC43_SGPIO_COUNT15_OFFSET         0x01bc /* Down counter 15 */
 
-#define LPC43_SGPIO_POS_OFFSET(n)          (0x01c0 + ((n) << 2)
+#define LPC43_SGPIO_POS_OFFSET(n)          (0x01c0 + ((n) << 2))
 #define LPC43_SGPIO_POS0_OFFSET            0x01c0 /* Position register 0 */
 #define LPC43_SGPIO_POS1_OFFSET            0x01c4 /* Position register 1 */
 #define LPC43_SGPIO_POS2_OFFSET            0x01c8 /* Position register 2 */
@@ -443,7 +447,7 @@
 #define SGPIO_OUT_MUXCFG_OUTCFG_SHIFT      (0)       /* Bits 0-3: P_OUT_CFG Output control SGPIOn */
 #define SGPIO_OUT_MUXCFG_OUTCFG_MASK       (15 << SGPIO_OUT_MUXCFG_OUTCFG_SHIFT)
 #  define SGPIO_OUT_MUXCFG_OUTCFG_DOUTM1   (0 << SGPIO_OUT_MUXCFG_OUTCFG_SHIFT)  /* dout_doutm1 (1-bit mode) */
-#  define SGPIO_OUT_MUXCFG_OUTCFG_ DOUTM2A (1 << SGPIO_OUT_MUXCFG_OUTCFG_SHIFT)  /* dout_doutm2a (2-bit mode 2a) */
+#  define SGPIO_OUT_MUXCFG_OUTCFG_DOUTM2A  (1 << SGPIO_OUT_MUXCFG_OUTCFG_SHIFT)  /* dout_doutm2a (2-bit mode 2a) */
 #  define SGPIO_OUT_MUXCFG_OUTCFG_DOUTM2B  (2 << SGPIO_OUT_MUXCFG_OUTCFG_SHIFT)  /* dout_doutm2b (2-bit mode 2b) */
 #  define SGPIO_OUT_MUXCFG_OUTCFG_DOUTM2C  (3 << SGPIO_OUT_MUXCFG_OUTCFG_SHIFT)  /* dout_doutm2c (2-bit mode 2c) */
 #  define SGPIO_OUT_MUXCFG_OUTCFG_GPIOOUT  (4 << SGPIO_OUT_MUXCFG_OUTCFG_SHIFT)  /* gpio_out (level set by GPIO_OUTREG) */
@@ -557,14 +561,17 @@
 /* GPIO output control register */
 
 #define SGPIO_GPIO_OUTREG(n)               (1 << (n)) /* Bits 0-15: Bit i sets the output of SGPIO pin i */
+#define SGPIO_GPIO_OUTREG_SHIFT(n)         (n)
                                                       /* Bits 16-31: Reserved */
 /* GPIO output enable register */
 
 #define SGPIO_GPIO_OENREG(n)               (1 << (n)) /* Bits 0-15: Bit i selects the output enable state of SGPIO pin i */
+#define SGPIO_GPIO_OENREG_SHIFT(n)         (n)
                                                       /* Bits 16-31: Reserved */
 /* Slice count enable register */
 
 #define SGPIO_CTRL_ENABLE(n)               (1 << (n)) /* Bits 0-15: Bit n controls slice n */
+#define SGPIO_CTRL_ENABLE_SHIFT(n)         (n)
                                                       /* Bits 16-31: Reserved */
 /* Slice count disable register */
 
diff --git a/arch/arm/src/lpc43xx/chip/lpc43_timer.h b/arch/arm/src/lpc43xx/chip/lpc43_timer.h
index 109b8c8b7fad03587f1608b37ca6fb25b8645f68..b62f1352a301a3af3366a8342362f42c0c992241 100644
--- a/arch/arm/src/lpc43xx/chip/lpc43_timer.h
+++ b/arch/arm/src/lpc43xx/chip/lpc43_timer.h
@@ -42,10 +42,14 @@
 
 #include 
 
+#include "chip.h"
+
 /************************************************************************************
  * Pre-processor Definitions
  ************************************************************************************/
 
+#define TMR_RVALUE_MASK            (0xffffffff)
+
 /* Register offsets *****************************************************************/
 
 #define LPC43_TMR_IR_OFFSET       0x0000 /* Interrupt Register */
diff --git a/arch/arm/src/lpc43xx/chip/lpc43_uart.h b/arch/arm/src/lpc43xx/chip/lpc43_uart.h
index a0ea29718ab1282b73e264b67254968b7f400e11..de6944030ebb585f58a2765dd4df7b18a2b2460b 100644
--- a/arch/arm/src/lpc43xx/chip/lpc43_uart.h
+++ b/arch/arm/src/lpc43xx/chip/lpc43_uart.h
@@ -168,6 +168,28 @@
 #define LPC43_USART2_SYNCCTRL        (LPC43_USART2_BASE+LPC43_USART_SYNCCTRL_OFFSET)
 #define LPC43_USART2_TER             (LPC43_USART2_BASE+LPC43_USART_TER_OFFSET)
 
+#define LPC43_USART3_RBR             (LPC43_USART3_BASE+LPC43_UART_RBR_OFFSET)
+#define LPC43_USART3_THR             (LPC43_USART3_BASE+LPC43_UART_THR_OFFSET)
+#define LPC43_USART3_DLL             (LPC43_USART3_BASE+LPC43_UART_DLL_OFFSET)
+#define LPC43_USART3_DLM             (LPC43_USART3_BASE+LPC43_UART_DLM_OFFSET)
+#define LPC43_USART3_IER             (LPC43_USART3_BASE+LPC43_UART_IER_OFFSET)
+#define LPC43_USART3_IIR             (LPC43_USART3_BASE+LPC43_UART_IIR_OFFSET)
+#define LPC43_USART3_FCR             (LPC43_USART3_BASE+LPC43_UART_FCR_OFFSET)
+#define LPC43_USART3_LCR             (LPC43_USART3_BASE+LPC43_UART_LCR_OFFSET)
+#define LPC43_USART3_LSR             (LPC43_USART3_BASE+LPC43_UART_LSR_OFFSET)
+#define LPC43_USART3_SCR             (LPC43_USART3_BASE+LPC43_UART_SCR_OFFSET)
+#define LPC43_USART3_ACR             (LPC43_USART3_BASE+LPC43_UART_ACR_OFFSET)
+#define LPC43_USART3_ICR             (LPC43_USART3_BASE+LPC43_USART_ICR_OFFSET)
+#define LPC43_USART3_FDR             (LPC43_USART3_BASE+LPC43_UART_FDR_OFFSET)
+#define LPC43_USART3_OSR             (LPC43_USART3_BASE+LPC43_USART_OSR_OFFSET)
+#define LPC43_USART3_HDEM            (LPC43_USART3_BASE+LPC43_USART_HDEN_OFFSET)
+#define LPC43_USART3_SCICTRL         (LPC43_USART3_BASE+LPC43_USART_SCICTRL_OFFSET)
+#define LPC43_USART3_RS485CTRL       (LPC43_USART3_BASE+LPC43_UART_RS485CTRL_OFFSET)
+#define LPC43_USART3_ADRMATCH        (LPC43_USART3_BASE+LPC43_UART_ADRMATCH_OFFSET)
+#define LPC43_USART3_RS485DLY        (LPC43_USART3_BASE+LPC43_UART_RS485DLY_OFFSET)
+#define LPC43_USART3_SYNCCTRL        (LPC43_USART3_BASE+LPC43_USART_SYNCCTRL_OFFSET)
+#define LPC43_USART3_TER             (LPC43_USART3_BASE+LPC43_USART_TER_OFFSET)
+
 /* Register bit definitions *****************************************************************/
 
 /* RBR (DLAB =0) Receiver Buffer Register */
diff --git a/arch/arm/src/lpc43xx/lpc43_adc.c b/arch/arm/src/lpc43xx/lpc43_adc.c
index 4286451f11eec9ad60f6691680509b807adcc8c1..1aa78f233bf5c9be0c23523685d020c86096d107 100644
--- a/arch/arm/src/lpc43xx/lpc43_adc.c
+++ b/arch/arm/src/lpc43xx/lpc43_adc.c
@@ -59,7 +59,6 @@
 #include 
 #include 
 
-#include 
 #include 
 #include 
 #include 
@@ -80,6 +79,12 @@
 
 #include "lpc43_pinconfig.h"
 
+/* board.h should be included last because it depends on the previous
+ * inclusions and may need to modify other definitions.
+ */
+
+#include 
+
 #if defined(CONFIG_LPC43_ADC0) /* TODO ADC1 */
 
 /****************************************************************************
@@ -136,7 +141,7 @@ static int  adc_setup(FAR struct adc_dev_s *dev);
 static void adc_shutdown(FAR struct adc_dev_s *dev);
 static void adc_rxint(FAR struct adc_dev_s *dev, bool enable);
 static int  adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg);
-static int  adc_interrupt(int irq, void *context);
+static int  adc_interrupt(int irq, void *context, FAR void *arg);
 
 /****************************************************************************
  * Private Data
@@ -346,7 +351,7 @@ static int adc_setup(FAR struct adc_dev_s *dev)
 {
   FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
 
-  int ret = irq_attach(priv->irq, adc_interrupt);
+  int ret = irq_attach(priv->irq, adc_interrupt, NULL);
   if (ret == OK)
     {
       up_enable_irq(priv->irq);
@@ -452,7 +457,7 @@ static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg)
  *
  ****************************************************************************/
 
-static int adc_interrupt(int irq, void *context)
+static int adc_interrupt(int irq, void *context, FAR void *arg)
 {
 
   FAR struct up_dev_s *priv = (FAR struct up_dev_s *)g_adcdev.ad_priv;
@@ -465,7 +470,7 @@ static int adc_interrupt(int irq, void *context)
     }
   else
     {
-      if (priv->freq == 0 && priv->m_ch) /* clear burst mode */
+      if (priv->freq == 0 && !priv->m_ch) /* clear burst mode */
         {
           regval = getreg32(LPC43_ADC0_CR);
           regval &= ~ADC_CR_BURST;
diff --git a/arch/arm/src/lpc43xx/lpc43_allocateheap.c b/arch/arm/src/lpc43xx/lpc43_allocateheap.c
index 70a0bbe5873f4078c5df98f609165d68cb605ac6..b7a947b668ff7550ab8e4c279f6dc51d792006f5 100644
--- a/arch/arm/src/lpc43xx/lpc43_allocateheap.c
+++ b/arch/arm/src/lpc43xx/lpc43_allocateheap.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/lpc43xx/lpc43_allocateheap.c
  *
- *   Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012-2013, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -61,6 +61,7 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
 /* Get customizations for each supported chip.
  *
  * SRAM Resources
@@ -95,6 +96,25 @@
  * NOTE 1: The 64Kb of AHB of SRAM on the LPC4350/30/20 span all AHB SRAM
  * banks but are treated as two banks of 48 an 16Kb by the NuttX memory
  * manager.  This gives some symmetry to all of the members of the family.
+ *
+ * ----------------------------------------------------------------------
+ * EMC SDRAM
+ * ----------------------------------------------------------------------
+ * LPC43xx may have dynamic RAM connected on EMC bus. Up to 4 chips can be
+ * connected.
+ *
+ * DYCS0 (0x2800 0000) up to 128MB
+ * DYCS1 (0x3000 0000) up to 256MB
+ * DYCS2 (0x6000 0000) up to 256MB
+ * DYCS3 (0x7000 0000) up to 256MB
+ *
+ * LPC43xx may have static RAM connected on EMC bus.
+ *
+ * CS0 (0x1C00 0000) up to 16MB
+ * CS1 (0x1D00 0000) up to 16MB
+ * CS2 (0x1E00 0000) up to 16MB
+ * CS3 (0x1F00 0000) up to 16MB
+ *
  */
 
 /* Configuration ************************************************************/
@@ -136,58 +156,89 @@
  *
  *    CONFIG_RAM_START = The start of the data RAM region which may be
  *      either local SRAM bank 0 (Configuration A) or 1 (Configuration B).
- *    CONFIG_RAM_START = The size of the data RAM region.
- *    CONFIG_RAM_END   = The sum of the above
+ *    CONFIG_RAM_SIZE  = The size of the data RAM region.
+ *    CONFIG_RAM_END   = The sum of the above.
+ */
+
+/* External Memory Configuration
+ *
+ * Dynamic memory configuration
+ *   For dynamic memory configuration at least one of LPC43_EXTSDRAMx
+ *   should by defined.
+ * Also, together with LPC43_EXTSDRAMx should be defined:
+ *   LPC43_EXTSDRAMxSIZE = External RAM size in bytes.
+ *   LPC43_EXTSDRAMxHEAP = Should this RAM be use as heap space?
  */
 
 /* Check for Configuration A. */
 
+#undef MM_USE_LOCSRAM_BANK0
+#undef MM_USE_LOCSRAM_BANK1
+#undef MM_USE_AHBSRAM_BANK0
+#undef MM_USE_AHBSRAM_BANK1
+#undef MM_USE_AHBSRAM_BANK2
+#undef MM_USE_EXTSDRAM0
+#undef MM_USE_EXTSDRAM1
+#undef MM_USE_EXTSDRAM2
+#undef MM_USE_EXTSDRAM3
+#undef MM_HAVE_REGION
+
 #ifndef CONFIG_LPC43_BOOT_SRAM
 
 /* Configuration A */
-/* CONFIG_RAM_START should be set to the base of AHB SRAM, local 0. */
+/* CONFIG_RAM_START shoudl be set to the base of local SRAM, Bank 0. */
 
 #  if CONFIG_RAM_START != LPC43_LOCSRAM_BANK0_BASE
-#    error "CONFIG_RAM_START must be set to the base address of RAM Bank 0"
+#    error "CONFIG_RAM_START must be set to the base address of RAM bank 0"
 #  endif
 
-/* The configured RAM size should be equal to the size of local SRAM Bank 0 */
+/* The configured RAM size should be equal to the size of local SRAM Bank 0. */
 
 #  if CONFIG_RAM_SIZE != LPC43_LOCSRAM_BANK0_SIZE
-#    error "CONFIG_RAM_SIZE must be set to size of AHB SRAM Bank 0"
+#    error "CONFIG_RAM_SIZE must be set to size of local SRAM Bank 0"
 #  endif
 
-/* Now we can assign all of the memory regions for configuration A */
+/* Local SRAM Bank 0 will be used as main memory region */
+
+#  define MM_USE_LOCSRAM_BANK0 0
+
+/* Use local SRAM Bank 1 if configured */
+
+#  ifdef CONFIG_LPC43_USE_LOCSRAM_BANK1
+#    define MM_USE_LOCSRAM_BANK1 1
+#  endif
 
-#  define MM_REGION1_BASE  LPC43_LOCSRAM_BANK0_BASE
-#  define MM_REGION1_SIZE  LPC43_LOCSRAM_BANK0_SIZE
-#  define MM_REGION2_BASE  LPC43_LOCSRAM_BANK1_BASE
-#  define MM_REGION2_SIZE  LPC43_LOCSRAM_BANK1_SIZE
-#  define MM_REGION3_BASE  LPC43_AHBSRAM_BANK0_BASE
-#  define MM_REGION3_SIZE  LPC43_AHBSRAM_BANK0_SIZE
-#else
+#else /* CONFIG_LPC43_BOOT_SRAM */
 
 /* Configuration B */
-/* CONFIG_RAM_START should be set to the base of local SRAM, bank 1. */
+/* CONFIG_RAM_START should be set to the base of local SRAM, Bank 1. */
 
 #  if CONFIG_RAM_START != LPC43_LOCSRAM_BANK1_BASE
-#    error "CONFIG_RAM_START must be set to the base address of SRAM Bank 1"
+#    error "CONFIG_RAM_START must be set to the base address of RAM bank 1"
 #  endif
 
-/* The configured RAM size should be equal to the size of local SRAM Bank 1 */
+/* The configured RAM size should be equal to the size of local SRAM Bank 1. */
 
 #  if CONFIG_RAM_SIZE != LPC43_LOCSRAM_BANK1_SIZE
-#    error "CONFIG_RAM_SIZE must be set to size of AHB SRAM Bank 1"
+#    error "CONFIG_RAM_SIZE must be set to size of local SRAM Bank 1"
 #  endif
 
-/* Now we can assign all of the memory regions for configuration B */
+/* Shouldn't use Local SRAM Bank 0 as system use it for code.
+ * Local SRAM Bank1 is used as main memory region.
+ */
+
+#  define MM_USE_LOCSRAM_BANK1 0
+
+#endif /* CONFIG_LPC43_BOOT_SRAM */
+
+/* Configure other memory banks */
+
+#ifdef CONFIG_LPC43_AHBSRAM_BANK0
+#  define MM_USE_AHBSRAM_BANK0 1
+#endif
 
-#  define MM_REGION1_BASE  LPC43_LOCSRAM_BANK1_BASE
-#  define MM_REGION1_SIZE  LPC43_LOCSRAM_BANK1_SIZE
-#  define MM_REGION2_BASE  LPC43_AHBSRAM_BANK0_BASE
-#  define MM_REGION2_SIZE  LPC43_AHBSRAM_BANK0_SIZE
-#  undef  MM_REGION3_BASE
-#  undef  MM_REGION3_SIZE
+#ifdef CONFIG_LPC43_AHBSRAM_BANK1
+#  define MM_USE_AHBSRAM_BANK1 1
 #endif
 
 #define MM_DMAREGION_BASE  LPC43_AHBSRAM_BANK2_BASE
@@ -199,8 +250,69 @@
 
 #warning "Missing Logic"
 
-#define MM_DMAHEAP_BASE MM_DMAREGION_BASE /* For now... use it all */
-#define MM_DMAHEAP_SIZE MM_DMAREGION_SIZE
+#ifdef CONFIG_LPC43_AHBSRAM_BANK2
+#  define MM_USE_AHBSRAM_BANK2 1
+#  define MM_DMAHEAP_BASE MM_DMAREGION_BASE /* For now... use it all */
+#  define MM_DMAHEAP_SIZE MM_DMAREGION_SIZE
+#endif
+
+/* External RAM configuration */
+
+/* Check if external SDRAM is supported and, if so, it is intended to be used
+ * used as heap.
+ */
+
+#if !defined(CONFIG_LPC43_EXTSDRAM0) || !defined(CONFIG_LPC43_EXTSDRAM0_HEAP)
+#  undef CONFIG_LPC43_EXTSDRAM0_SIZE
+#  define CONFIG_LPC43_EXTSDRAM0_SIZE 0
+#endif
+
+#if !defined(CONFIG_LPC43_EXTSDRAM1) || !defined(CONFIG_LPC43_EXTSDRAM1_HEAP)
+#  undef CONFIG_LPC43_EXTSDRAM1_SIZE
+#  define CONFIG_LPC43_EXTSDRAM1_SIZE 0
+#endif
+
+#if !defined(CONFIG_LPC43_EXTSDRAM2) || !defined(CONFIG_LPC43_EXTSDRAM2_HEAP)
+#  undef CONFIG_LPC43_EXTSDRAM2_SIZE
+#  define CONFIG_LPC43_EXTSDRAM2_SIZE 0
+#endif
+
+#if !defined(CONFIG_LPC43_EXTSDRAM3) || !defined(CONFIG_LPC43_EXTSDRAM3_HEAP)
+#  undef CONFIG_LPC43_EXTSDRAM3_SIZE
+#  define CONFIG_LPC43_EXTSDRAM3_SIZE 0
+#endif
+
+#if CONFIG_LPC43_EXTSDRAM0_SIZE > 0
+#  define MM_USE_EXTSDRAM0 1
+#  define MM_EXTSDRAM0_REGION LPC43_DYCS0_BASE
+#  define MM_EXTSDRAM0_SIZE   CONFIG_LPC43_EXTSDRAM0_SIZE
+#endif /* CONFIG_LPC43_EXTSDRAM0_SIZE */
+
+#if CONFIG_LPC43_EXTSDRAM1_SIZE > 0
+#  define MM_USE_EXTSDRAM1 1
+#  define MM_EXTSDRAM1_REGION LPC43_DYCS1_BASE
+#  define MM_EXTSDRAM1_SIZE   CONFIG_LPC43_EXTSDRAM1_SIZE
+#endif /* CONFIG_LPC43_EXTSDRAM1_SIZE */
+
+#if CONFIG_LPC43_EXTSDRAM2_SIZE > 0
+#  define MM_USE_EXTSDRAM2 1
+#  define MM_EXTSDRAM2_REGION LPC43_DYCS2_BASE
+#  define MM_EXTSDRAM2_SIZE   CONFIG_LPC43_EXTSDRAM2_SIZE
+#endif /* CONFIG_LPC43_EXTSDRAM1_SIZE */
+
+#if CONFIG_LPC43_EXTSDRAM3_SIZE > 0
+#  define HAVE_EXTSDRAM3_REGION 1
+#  define MM_EXTSDRAM3_REGION LPC43_DYCS3_BASE
+#  define MM_EXTSDRAM3_SIZE   CONFIG_LPC43_EXTSDRAM3_SIZE
+#endif /* CONFIG_LPC43_EXTSDRAM3_SIZE */
+
+#if CONFIG_MM_REGIONS > 1 && \
+    (defined(MM_USE_LOCSRAM_BANK1) || defined(MM_USE_AHBSRAM_BANK0) || \
+     defined(MM_USE_AHBSRAM_BANK1) || defined(MM_USE_AHBSRAM_BANK2) || \
+     defined(MM_USE_EXTSDRAM0)     || defined(MM_USE_EXTSDRAM1) || \
+     defined(MM_USE_EXTSDRAM2)     || defined(MM_USE_EXTSDRAM3))
+#  define MM_HAVE_REGION 1
+#endif
 
 /****************************************************************************
  * Private Data
@@ -216,15 +328,31 @@
  * thread is the thread that the system boots on and, eventually, becomes the
  * idle, do nothing task that runs only when there is nothing else to run.
  * The heap continues from there until the configured end of memory.
- * g_idle_topstack is the beginning of this heap region (not necessarily aligned).
+ * g_idle_topstack is the beginning of this heap region (not necessarily
+ * aligned).
  */
 
 const uint32_t g_idle_topstack = (uint32_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE;
 
+#ifdef MM_HAVE_REGION
+static uint8_t g_mem_region_next = 0;
+#endif
+
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
 
+#ifdef MM_HAVE_REGION
+static void mem_addregion(FAR void *region_start, size_t region_size)
+{
+  if (g_mem_region_next <= CONFIG_MM_REGIONS)
+    {
+      kmm_addregion(region_start, region_size);
+      g_mem_region_next++;
+    }
+}
+#endif
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -265,35 +393,42 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
 #if CONFIG_MM_REGIONS > 1
 void up_addregion(void)
 {
-#if CONFIG_MM_REGIONS > 1
-  /* Add the next SRAM region (which should exist) */
-
-  kmm_addregion((FAR void *)MM_REGION2_BASE, MM_REGION2_SIZE);
+#ifdef MM_HAVE_REGION
+  /* start from second region */
 
-#ifdef MM_REGION3_BASE
-  /* Add the third SRAM region (which will not exist in configuration B) */
+  g_mem_region_next = 2;
 
-#if CONFIG_MM_REGIONS > 2
-  /* Add the third SRAM region (which may not exist) */
+#  ifdef MM_USE_LOCSRAM_BANK1
+  mem_addregion((FAR void *)LPC43_LOCSRAM_BANK1_BASE, LPC43_LOCSRAM_BANK1_SIZE);
+#  endif
 
-  kmm_addregion((FAR void *)MM_REGION3_BASE, MM_REGION3_SIZE);
+#  ifdef MM_USE_AHBSRAM_BANK0
+  mem_addregion((FAR void *)LPC43_AHBSRAM_BANK0_BASE, LPC43_AHBSRAM_BANK0_SIZE);
+#  endif
 
-#if CONFIG_MM_REGIONS > 3 && defined(MM_DMAHEAP_BASE)
-  /* Add the DMA region (which may not be available) */
+#  ifdef MM_USE_AHBSRAM_BANK1
+  mem_addregion((FAR void *)LPC43_AHBSRAM_BANK1_BASE, LPC43_AHBSRAM_BANK1_SIZE);
+#  endif
 
-  kmm_addregion((FAR void *)MM_DMAHEAP_BASE, MM_DMAHEAP_SIZE);
+#  ifdef MM_USE_AHBSRAM_BANK2
+  mem_addregion((FAR void *)MM_DMAREGION_BASE, MM_DMAREGION_SIZE);
+#  endif
 
-#endif /* CONFIG_MM_REGIONS > 3 && defined(MM_DMAHEAP_BASE) */
-#endif /* CONFIG_MM_REGIONS > 2 */
-#else  /* MM_REGION3_BASE */
+#  ifdef MM_USE_EXTSDRAM0
+  mem_addregion((FAR void *)MM_EXTSDRAM0_REGION, MM_EXTSDRAM0_SIZE);
+#  endif
 
-#if CONFIG_MM_REGIONS > 2 && defined(MM_DMAHEAP_BASE)
-  /* Add the DMA region (which may not be available) */
+#  ifdef MM_USE_EXTSDRAM1
+  mem_addregion((FAR void *)MM_EXTSDRAM1_REGION, MM_EXTSDRAM1_SIZE);
+#  endif
 
-  kmm_addregion((FAR void *)MM_DMAHEAP_BASE, MM_DMAHEAP_SIZE);
+#  ifdef MM_USE_EXTSDRAM2
+  mem_addregion((FAR void *)MM_EXTSDRAM2_REGION, MM_EXTSDRAM2_SIZE);
+#  endif
 
-#endif /* CONFIG_MM_REGIONS > 3 && defined(MM_DMAHEAP_BASE) */
-#endif /* MM_REGION3_BASE */
-#endif /* CONFIG_MM_REGIONS > 1 */
+#  ifdef MM_USE_EXTSDRAM3
+  mem_addregion((FAR void *)MM_EXTSDRAM3_REGION, MM_EXTSDRAM3_SIZE);
+#  endif
+#endif
 }
 #endif
diff --git a/arch/arm/src/lpc43xx/lpc43_config.h b/arch/arm/src/lpc43xx/lpc43_config.h
index 8a4509b8f049e6ffc9936ebdb2e5564ee86a72a4..2d62045acf8a86b9fe46e2c3deee17dcb1b2fbc9 100644
--- a/arch/arm/src/lpc43xx/lpc43_config.h
+++ b/arch/arm/src/lpc43xx/lpc43_config.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * arch/arm/src/lpc43xx/lpc43_config.h
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -73,7 +73,6 @@
 #ifndef CONFIG_LPC43_USART0
 #  undef CONFIG_USART0_SERIAL_CONSOLE
 #  undef CONFIG_USART0_RS485MODE
-#  undef CONFIG_USART0_RS485_DTRDIR
 #endif
 
 #ifndef CONFIG_LPC43_UART1
@@ -85,13 +84,11 @@
 #ifndef CONFIG_LPC43_USART2
 #  undef CONFIG_USART2_SERIAL_CONSOLE
 #  undef CONFIG_USART2_RS485MODE
-#  undef CONFIG_USART2_RS485_DTRDIR
 #endif
 
 #ifndef CONFIG_LPC43_USART3
 #  undef CONFIG_USART3_SERIAL_CONSOLE
 #  undef CONFIG_USART3_RS485MODE
-#  undef CONFIG_USART3_RS485_DTRDIR
 #endif
 
 /* Is there a serial console? There should be at most one defined.  It could be on
@@ -102,28 +99,28 @@
 #  undef CONFIG_UART1_SERIAL_CONSOLE
 #  undef CONFIG_USART2_SERIAL_CONSOLE
 #  undef CONFIG_USART3_SERIAL_CONSOLE
-#  define HAVE_CONSOLE 1
+#  define HAVE_SERIAL_CONSOLE 1
 #elif defined(CONFIG_UART1_SERIAL_CONSOLE)
 #  undef CONFIG_USART0_SERIAL_CONSOLE
 #  undef CONFIG_USART2_SERIAL_CONSOLE
 #  undef CONFIG_USART3_SERIAL_CONSOLE
-#  define HAVE_CONSOLE 1
+#  define HAVE_SERIAL_CONSOLE 1
 #elif defined(CONFIG_USART2_SERIAL_CONSOLE)
 #  undef CONFIG_USART0_SERIAL_CONSOLE
 #  undef CONFIG_UART1_SERIAL_CONSOLE
 #  undef CONFIG_USART3_SERIAL_CONSOLE
-#  define HAVE_CONSOLE 1
+#  define HAVE_SERIAL_CONSOLE 1
 #elif defined(CONFIG_USART3_SERIAL_CONSOLE)
 #  undef CONFIG_USART0_SERIAL_CONSOLE
 #  undef CONFIG_UART1_SERIAL_CONSOLE
 #  undef CONFIG_USART2_SERIAL_CONSOLE
-#  define HAVE_CONSOLE 1
+#  define HAVE_SERIAL_CONSOLE 1
 #else
 #  undef CONFIG_USART0_SERIAL_CONSOLE
 #  undef CONFIG_UART1_SERIAL_CONSOLE
 #  undef CONFIG_USART2_SERIAL_CONSOLE
 #  undef CONFIG_USART3_SERIAL_CONSOLE
-#  undef HAVE_CONSOLE
+#  undef HAVE_SERIAL_CONSOLE
 #endif
 
 /* Check UART flow control (Only supported by UART1) */
diff --git a/arch/arm/src/lpc43xx/lpc43_dac.c b/arch/arm/src/lpc43xx/lpc43_dac.c
index 16fa92a36547167452602bb8142ac73d9a7cb2c5..0a81e41b2c5f49f82155e01f9743072994e6a9ec 100644
--- a/arch/arm/src/lpc43xx/lpc43_dac.c
+++ b/arch/arm/src/lpc43xx/lpc43_dac.c
@@ -89,7 +89,7 @@ static void dac_shutdown(FAR struct dac_dev_s *dev);
 static void dac_txint(FAR struct dac_dev_s *dev, bool enable);
 static int  dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg);
 static int  dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg);
-static int  dac_interrupt(int irq, void *context);
+static int  dac_interrupt(int irq, void *context, FAR void *arg);
 
 /****************************************************************************
  * Private Data
@@ -173,11 +173,11 @@ static int  dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg)
 
 static int  dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg)
 {
-  dbg("Fix me:Not Implemented\n");
+  aerr("ERROR: Fix me:Not Implemented\n");
   return 0;
 }
 
-static int  dac_interrupt(int irq, void *context)
+static int  dac_interrupt(int irq, void *context, FAR void *arg)
 {
 }
 
diff --git a/arch/arm/src/lpc43xx/lpc43_debug.c b/arch/arm/src/lpc43xx/lpc43_debug.c
index 51cf9470672601f15904c445e435afdcbd7c058a..3b20bc63e74116d6d44f7fbb99003b4093b4d132 100644
--- a/arch/arm/src/lpc43xx/lpc43_debug.c
+++ b/arch/arm/src/lpc43xx/lpc43_debug.c
@@ -47,23 +47,12 @@
 #include "lpc43_pinconfig.h"
 #include "lpc43_gpio.h"
 
-#ifdef CONFIG_DEBUG
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
+#ifdef CONFIG_DEBUG_FEATURES
 
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
+
 /****************************************************************************
  * Function:  lpc43_pin_dump
  *
@@ -93,4 +82,4 @@ int lpc43_gpio_dump(uint16_t gpiocfg, const char *msg)
   return -ENOSYS;
 }
 
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_FEATURES */
diff --git a/arch/arm/src/lpc43xx/lpc43_ehci.c b/arch/arm/src/lpc43xx/lpc43_ehci.c
index 08b2ae8e0f99344819224fcb2735b9bb03d59f40..5af61fa9394394de44212814d05ce3621bfa6e46 100644
--- a/arch/arm/src/lpc43xx/lpc43_ehci.c
+++ b/arch/arm/src/lpc43xx/lpc43_ehci.c
@@ -51,6 +51,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -105,7 +106,7 @@
 
 /* Debug options */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_USB_INFO
 #  undef CONFIG_LPC43_EHCI_REGDEBUG
 #endif
 
@@ -116,8 +117,8 @@
 
 /* Simplify DEBUG checks */
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_FEATURES
+#  undef CONFIG_DEBUG_INFO
 #  undef CONFIG_DEBUG_USB
 #endif
 
@@ -504,7 +505,7 @@ static inline void lpc43_portsc_bottomhalf(void);
 static inline void lpc43_syserr_bottomhalf(void);
 static inline void lpc43_async_advance_bottomhalf(void);
 static void lpc43_ehci_bottomhalf(FAR void *arg);
-static int lpc43_ehci_interrupt(int irq, FAR void *context);
+static int lpc43_ehci_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /* USB Host Controller Operations **********************************************/
 
@@ -817,7 +818,7 @@ static uint32_t lpc43_swap32(uint32_t value)
 static void lpc43_printreg(volatile uint32_t *regaddr, uint32_t regval,
                           bool iswrite)
 {
-  lldbg("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval);
+  uinfo("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval);
 }
 #endif
 
@@ -868,7 +869,7 @@ static void lpc43_checkreg(volatile uint32_t *regaddr, uint32_t regval, bool isw
             {
               /* No.. More than one. */
 
-              lldbg("[repeats %d more times]\n", count);
+              uinfo("[repeats %d more times]\n", count);
             }
         }
 
@@ -1350,13 +1351,13 @@ static int lpc43_qh_discard(struct lpc43_qh_s *qh)
 #ifdef CONFIG_LPC43_EHCI_REGDEBUG
 static void lpc43_qtd_print(struct lpc43_qtd_s *qtd)
 {
-  udbg("  QTD[%p]:\n", qtd);
-  udbg("    hw:\n");
-  udbg("      nqp: %08x alt: %08x token: %08x\n",
-       qtd->hw.nqp, qtd->hw.alt, qtd->hw.token);
-  udbg("      bpl: %08x %08x %08x %08x %08x\n",
-       qtd->hw.bpl[0], qtd->hw.bpl[1], qtd->hw.bpl[2],
-       qtd->hw.bpl[3], qtd->hw.bpl[4]);
+  uinfo("  QTD[%p]:\n", qtd);
+  uinfo("    hw:\n");
+  uinfo("      nqp: %08x alt: %08x token: %08x\n",
+        qtd->hw.nqp, qtd->hw.alt, qtd->hw.token);
+  uinfo("      bpl: %08x %08x %08x %08x %08x\n",
+        qtd->hw.bpl[0], qtd->hw.bpl[1], qtd->hw.bpl[2],
+        qtd->hw.bpl[3], qtd->hw.bpl[4]);
 }
 #endif
 
@@ -1374,30 +1375,30 @@ static void lpc43_qh_print(struct lpc43_qh_s *qh)
   struct lpc43_epinfo_s *epinfo;
   struct ehci_overlay_s *overlay;
 
-  udbg("QH[%p]:\n", qh);
-  udbg("  hw:\n");
-  udbg("    hlp: %08x epchar: %08x epcaps: %08x cqp: %08x\n",
-       qh->hw.hlp, qh->hw.epchar, qh->hw.epcaps, qh->hw.cqp);
+  uinfo("QH[%p]:\n", qh);
+  uinfo("  hw:\n");
+  uinfo("    hlp: %08x epchar: %08x epcaps: %08x cqp: %08x\n",
+        qh->hw.hlp, qh->hw.epchar, qh->hw.epcaps, qh->hw.cqp);
 
   overlay = &qh->hw.overlay;
-  udbg("  overlay:\n");
-  udbg("    nqp: %08x alt: %08x token: %08x\n",
-       overlay->nqp, overlay->alt, overlay->token);
-  udbg("    bpl: %08x %08x %08x %08x %08x\n",
-       overlay->bpl[0], overlay->bpl[1], overlay->bpl[2],
-       overlay->bpl[3], overlay->bpl[4]);
+  uinfo("  overlay:\n");
+  uinfo("    nqp: %08x alt: %08x token: %08x\n",
+        overlay->nqp, overlay->alt, overlay->token);
+  uinfo("    bpl: %08x %08x %08x %08x %08x\n",
+        overlay->bpl[0], overlay->bpl[1], overlay->bpl[2],
+        overlay->bpl[3], overlay->bpl[4]);
 
-  udbg("  fqp:\n", qh->fqp);
+  uinfo("  fqp:\n", qh->fqp);
 
   epinfo = qh->epinfo;
-  udbg("  epinfo[%p]:\n", epinfo);
+  uinfo("  epinfo[%p]:\n", epinfo);
   if (epinfo)
     {
-      udbg("    EP%d DIR=%s FA=%08x TYPE=%d MaxPacket=%d\n",
-           epinfo->epno, epinfo->dirin ? "IN" : "OUT", epinfo->devaddr,
-           epinfo->xfrtype, epinfo->maxpacket);
-      udbg("    Toggle=%d iocwait=%d speed=%d result=%d\n",
-           epinfo->toggle, epinfo->iocwait, epinfo->speed, epinfo->result);
+      uinfo("    EP%d DIR=%s FA=%08x TYPE=%d MaxPacket=%d\n",
+            epinfo->epno, epinfo->dirin ? "IN" : "OUT", epinfo->devaddr,
+            epinfo->xfrtype, epinfo->maxpacket);
+      uinfo("    Toggle=%d iocwait=%d speed=%d result=%d\n",
+            epinfo->toggle, epinfo->iocwait, epinfo->speed, epinfo->result);
     }
 }
 #endif
@@ -1989,7 +1990,7 @@ static int lpc43_async_setup(struct lpc43_rhport_s *rhport,
 #ifdef CONFIG_USBHOST_TRACE
   usbhost_vtrace2(EHCI_VTRACE2_ASYNCXFR, epinfo->epno, buflen);
 #else
-  uvdbg("RHport%d EP%d: buffer=%p, buflen=%d, req=%p\n",
+  uinfo("RHport%d EP%d: buffer=%p, buflen=%d, req=%p\n",
         RHPORT(rhport), epinfo->epno, buffer, buflen, req);
 #endif
 
@@ -2267,7 +2268,7 @@ static int lpc43_intr_setup(struct lpc43_rhport_s *rhport,
 #ifdef CONFIG_USBHOST_TRACE
   usbhost_vtrace2(EHCI_VTRACE2_INTRXFR, epinfo->epno, buflen);
 #else
-  uvdbg("RHport%d EP%d: buffer=%p, buflen=%d\n",
+  uinfo("RHport%d EP%d: buffer=%p, buflen=%d\n",
         RHPORT(rhport), epinfo->epno, buffer, buflen);
 #endif
 
@@ -3193,7 +3194,7 @@ static void lpc43_ehci_bottomhalf(FAR void *arg)
  *
  ****************************************************************************/
 
-static int lpc43_ehci_interrupt(int irq, FAR void *context)
+static int lpc43_ehci_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   uint32_t usbsts;
   uint32_t pending;
@@ -3207,7 +3208,7 @@ static int lpc43_ehci_interrupt(int irq, FAR void *context)
 #ifdef CONFIG_USBHOST_TRACE
   usbhost_vtrace1(EHCI_VTRACE1_TOPHALF, usbsts & regval);
 #else
-  ullvdbg("USBSTS: %08x USBINTR: %08x\n", usbsts, regval);
+  uinfo("USBSTS: %08x USBINTR: %08x\n", usbsts, regval);
 #endif
 
   /* Handle all unmasked interrupt sources */
@@ -3739,7 +3740,7 @@ static int lpc43_epalloc(FAR struct usbhost_driver_s *drvr,
 #ifdef CONFIG_USBHOST_TRACE
   usbhost_vtrace2(EHCI_VTRACE2_EPALLOC, epdesc->addr, epdesc->xfrtype);
 #else
-  uvdbg("EP%d DIR=%s FA=%08x TYPE=%d Interval=%d MaxPacket=%d\n",
+  uinfo("EP%d DIR=%s FA=%08x TYPE=%d Interval=%d MaxPacket=%d\n",
         epdesc->addr, epdesc->in ? "IN" : "OUT", hport->funcaddr,
         epdesc->xfrtype, epdesc->interval, epdesc->mxpacketsize);
 #endif
@@ -3768,7 +3769,13 @@ static int lpc43_epalloc(FAR struct usbhost_driver_s *drvr,
   epinfo->maxpacket = epdesc->mxpacketsize;
   epinfo->xfrtype   = epdesc->xfrtype;
   epinfo->speed     = hport->speed;
+
+  /* The endpoint iocsem semaphore is used for signaling and, hence,
+   * should not have priority inheritance enabled.
+   */
+
   sem_init(&epinfo->iocsem, 0, 0);
+  sem_setprotocol(&epinfo->iocsem, SEM_PRIO_NONE);
 
   /* Success.. return an opaque reference to the endpoint information structure
    * instance
@@ -4023,7 +4030,7 @@ static int lpc43_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
 #ifdef CONFIG_USBHOST_TRACE
   usbhost_vtrace2(EHCI_VTRACE2_CTRLINOUT, RHPORT(rhport), req->req);
 #else
-  uvdbg("RHPort%d type: %02x req: %02x value: %02x%02x index: %02x%02x len: %04x\n",
+  uinfo("RHPort%d type: %02x req: %02x value: %02x%02x index: %02x%02x len: %04x\n",
         RHPORT(rhport), req->type, req->req, req->value[1], req->value[0],
         req->index[1], req->index[0], len);
 #endif
@@ -4046,7 +4053,7 @@ static int lpc43_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
   ret = lpc43_async_setup(rhport, ep0info, req, buffer, len);
   if (ret < 0)
     {
-      udbg("ERROR: lpc43_async_setup failed: %d\n", ret);
+      uerr("ERROR: lpc43_async_setup failed: %d\n", ret);
       goto errout_with_iocwait;
     }
 
@@ -4511,7 +4518,7 @@ static int lpc43_connect(FAR struct usbhost_driver_s *drvr,
   /* Set the connected/disconnected flag */
 
   hport->connected = connected;
-  ullvdbg("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
+  uinfo("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
 
   /* Report the connection event */
 
@@ -4711,7 +4718,7 @@ FAR struct usbhost_connection_s *lpc43_ehci_initialize(int controller)
 {
   FAR struct usbhost_hubport_s *hport;
   uint32_t regval;
-#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_INFO)
   uint16_t regval16;
   unsigned int nports;
 #endif
@@ -4747,6 +4754,12 @@ FAR struct usbhost_connection_s *lpc43_ehci_initialize(int controller)
   sem_init(&g_ehci.exclsem, 0, 1);
   sem_init(&g_ehci.pscsem,  0, 0);
 
+  /* The pscsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&g_ehci.pscsem, SEM_PRIO_NONE);
+
   /* Initialize EP0 */
 
   sem_init(&g_ehci.ep0.iocsem, 0, 1);
@@ -4783,7 +4796,13 @@ FAR struct usbhost_connection_s *lpc43_ehci_initialize(int controller)
       rhport->ep0.xfrtype         = USB_EP_ATTR_XFER_CONTROL;
       rhport->ep0.speed           = USB_SPEED_FULL;
       rhport->ep0.maxpacket       = 8;
+
+      /* The EP0 iocsem semaphore is used for signaling and, hence, should
+       * not have priority inheritance enabled.
+       */
+
       sem_init(&rhport->ep0.iocsem, 0, 0);
+      sem_setprotocol(&rhport->ep0.iocsem, SEM_PRIO_NONE);
 
       /* Initialize the public port representation */
 
@@ -4948,7 +4967,7 @@ FAR struct usbhost_connection_s *lpc43_ehci_initialize(int controller)
 
   lpc43_putreg(EHCI_INT_ALLINTS, &HCOR->usbsts);
 
-#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_INFO)
   /* Show the EHCI version */
 
   regval16 = lpc43_swap16(HCCR->hciversion);
@@ -5070,7 +5089,7 @@ FAR struct usbhost_connection_s *lpc43_ehci_initialize(int controller)
 
   /* Interrupt Configuration ***************************************************/
 
-  ret = irq_attach(LPC43M4_IRQ_USB0, lpc43_ehci_interrupt);
+  ret = irq_attach(LPC43M4_IRQ_USB0, lpc43_ehci_interrupt, NULL);
   if (ret != 0)
     {
       usbhost_trace1(EHCI_TRACE1_IRQATTACH_FAILED, LPC43M4_IRQ_USB0);
diff --git a/arch/arm/src/lpc43xx/lpc43_emc.c b/arch/arm/src/lpc43xx/lpc43_emc.c
new file mode 100644
index 0000000000000000000000000000000000000000..a15ecb5610daccc0bf0641fd37cb3c00f6a5a5b7
--- /dev/null
+++ b/arch/arm/src/lpc43xx/lpc43_emc.c
@@ -0,0 +1,141 @@
+/****************************************************************************
+ * arch/arm/src/lpc43xx/lpc43_emc.c
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+
+/* TODO: add #if defined(CONFIG_LPC43_EMC) */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+
+#include 
+#include 
+#include 
+
+#include "up_internal.h"
+
+#include "chip.h"
+#include "lpc43_pinconfig.h"
+#include "lpc43_emc.h"
+#include "chip/lpc43_creg.h"
+#include "chip/lpc43_cgu.h"
+#include "chip/lpc43_ccu.h"
+#include "lpc43_rgu.h"
+#include "lpc43_gpio.h"
+#include "up_arch.h"
+#include 
+
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lpc43_emcinit
+ *
+ * Description:
+ *   Initialize EMC controller. Start in full power
+ *   mode.
+ *
+ ****************************************************************************/
+void lpc43_emcinit(uint32_t enable, uint32_t clock_ratio, uint32_t endian_mode)
+{
+  uint32_t regval;
+
+  /* Enable clock for EMC controller. */
+
+  regval = getreg32(LPC43_CCU1_M4_EMC_CFG);
+  regval |= CCU_CLK_CFG_RUN;
+  putreg32(regval, LPC43_CCU1_M4_EMC_CFG);
+
+  /* Configure endian mode and clock ratio. */
+
+  regval = 0;
+  if (endian_mode)
+    regval |= EMC_CONFIG_EM;
+  if (clock_ratio)
+    regval |= EMC_CONFIG_CR;
+
+  putreg32(regval, LPC43_EMC_CONFIG);
+
+  /* Enable EMC 001 normal memory map, no low power mode. */
+
+  putreg32(EMC_CONTROL_ENA, LPC43_EMC_CONTROL);
+}
+
+/****************************************************************************
+ * Name: lpc43_lowpowermode
+ *
+ * Description:
+ *   Set EMC lowpower mode.
+ *
+ ****************************************************************************/
+void lpc43_lowpowermode(uint8_t enable)
+{
+  uint32_t regval;
+
+  regval = getreg32(LPC43_EMC_CONTROL);
+  if (enable)
+    {
+      regval |= EMC_CONTROL_LOWPOWER;
+      putreg32(regval, LPC43_EMC_CONTROL);
+    }
+  else
+    {
+      regval &= ~EMC_CONTROL_LOWPOWER;
+      putreg32(regval, LPC43_EMC_CONTROL);
+    }
+}
+
+/****************************************************************************
+ * Name: lpc43_emcenable
+ *
+ * Description:
+ *   Enable or disable EMC controller.
+ *
+ ****************************************************************************/
+void lpc43_emcenable(uint8_t enable)
+{
+  uint32_t regval;
+
+  regval = getreg32(LPC43_EMC_CONTROL);
+  if (enable)
+    {
+      regval |= EMC_CONTROL_ENA;
+      putreg32(regval, LPC43_EMC_CONTROL);
+    }
+  else
+    {
+      regval &= ~EMC_CONTROL_ENA;
+      putreg32(regval, LPC43_EMC_CONTROL);
+    }
+}
diff --git a/arch/arm/src/lpc43xx/lpc43_emc.h b/arch/arm/src/lpc43xx/lpc43_emc.h
index 3c2bd2496feacbafc3be8299f70383c2c0ae6324..77b71d8612048818ff88d7a7fe83f190e8df4cd6 100644
--- a/arch/arm/src/lpc43xx/lpc43_emc.h
+++ b/arch/arm/src/lpc43xx/lpc43_emc.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * arch/arm/src/lpc43xx/lpc43_emc.h
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -48,16 +48,22 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/************************************************************************************
- * Public Types
- ************************************************************************************/
+/* Chip select Definitions **********************************************************/
 
-/************************************************************************************
- * Public Data
- ************************************************************************************/
+#define EMC_CS0    0
+#define EMC_CS1    1
+#define EMC_CS2    2
+#define EMC_CS3    3
+
+#define EMC_DYNCS0 0
+#define EMC_DYNCS1 1
+#define EMC_DYNCS2 2
+#define EMC_DYNCS3 3
 
 /************************************************************************************
- * Public Functions
+ * Public Function Prototypes
  ************************************************************************************/
 
+void lpc43_emcinit(uint32_t enable, uint32_t clock_ratio, uint32_t endian_mode);
+
 #endif /* __ARCH_ARM_SRC_LPC43XX_LPC43_EMC_H */
diff --git a/arch/arm/src/lpc43xx/lpc43_ethernet.c b/arch/arm/src/lpc43xx/lpc43_ethernet.c
index cca1e897666bafecb8c3d2a5f9c53d7455d81036..1aeca91d89e8413f983758c0d10f37be5da07e91 100644
--- a/arch/arm/src/lpc43xx/lpc43_ethernet.c
+++ b/arch/arm/src/lpc43xx/lpc43_ethernet.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/lpc43/lpc43_eth.c
  *
- *   Copyright (C) 2011-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -53,11 +53,7 @@
 #include 
 #include 
 #include 
-
-#ifdef CONFIG_NET_NOINTS
-#  include 
-#endif
-
+#include 
 #include 
 #include 
 #include 
@@ -83,12 +79,23 @@
  ****************************************************************************/
 /* Configuration ************************************************************/
 
-/* If processing is not done at the interrupt level, then high priority
- * work queue support is required.
+/* If processing is not done at the interrupt level, then work queue support
+ * is required.
  */
 
-#if defined(CONFIG_NET_NOINTS) && !defined(CONFIG_SCHED_HPWORK)
-#  error High priority work queue support is required
+#if !defined(CONFIG_SCHED_WORKQUEUE)
+#  error Work queue support is required
+#else
+
+  /* Select work queue */
+
+#  if defined(CONFIG_LPC43_ETHERNET_HPWORK)
+#    define ETHWORK HPWORK
+#  elif defined(CONFIG_LPC43_ETHERNET_LPWORK)
+#    define ETHWORK LPWORK
+#  else
+#    error Neither CONFIG_LPC43_ETHERNET_HPWORK nor CONFIG_LPC43_ETHERNET_LPWORK defined
+#  endif
 #endif
 
 #ifndef CONFIG_LPC43_PHYADDR
@@ -103,11 +110,10 @@
 #  error "Both CONFIG_LPC43_MII and CONFIG_LPC43_RMII defined"
 #endif
 
+#ifdef CONFIG_LPC43_AUTONEG
 #  ifndef CONFIG_LPC43_PHYSR
 #    error "CONFIG_LPC43_PHYSR must be defined in the NuttX configuration"
 #  endif
-
-#ifndef CONFIG_LPC43_AUTONEG
 #  ifdef CONFIG_LPC43_PHYSR_ALTCONFIG
 #    ifndef CONFIG_LPC43_PHYSR_ALTMODE
 #      error "CONFIG_LPC43_PHYSR_ALTMODE must be defined in the NuttX configuration"
@@ -152,12 +158,6 @@
 #undef CONFIG_LPC43_ETH_ENHANCEDDESC
 #undef CONFIG_LPC43_ETH_HWCHECKSUM
 
-/* Ethernet buffer sizes, number of buffers, and number of descriptors */
-
-#ifndef CONFIG_NET_MULTIBUFFER
-#  error "CONFIG_NET_MULTIBUFFER is required"
-#endif
-
 /* Add 4 to the configured buffer size to account for the 2 byte checksum
  * memory needed at the end of the maximum size packet.  Buffer sizes must
  * be an even multiple of 4, 8, or 16 bytes (depending on buswidth).  We
@@ -197,7 +197,7 @@
  * enabled.
  */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_NET_INFO
 #  undef CONFIG_LPC43_ETHMAC_REGDEBUG
 #endif
 
@@ -518,9 +518,8 @@ struct lpc43_ethmac_s
   uint8_t              fduplex : 1; /* Full (vs. half) duplex */
   WDOG_ID              txpoll;      /* TX poll timer */
   WDOG_ID              txtimeout;   /* TX timeout timer */
-#ifdef CONFIG_NET_NOINTS
-  struct work_s        work;        /* For deferring work to the work queue */
-#endif
+  struct work_s        irqwork;     /* For deferring work to the work queue */
+  struct work_s        pollwork;    /* For deferring work to the work queue */
 
   /* This holds the information visible to the NuttX network */
 
@@ -559,7 +558,7 @@ static struct lpc43_ethmac_s g_lpc43ethmac;
  ****************************************************************************/
 /* Register operations ******************************************************/
 
-#if defined(CONFIG_LPC43_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_LPC43_ETHMAC_REGDEBUG
 static uint32_t lpc43_getreg(uint32_t addr);
 static void lpc43_putreg(uint32_t val, uint32_t addr);
 static void lpc43_checksetup(void);
@@ -593,34 +592,26 @@ static int  lpc43_recvframe(FAR struct lpc43_ethmac_s *priv);
 static void lpc43_receive(FAR struct lpc43_ethmac_s *priv);
 static void lpc43_freeframe(FAR struct lpc43_ethmac_s *priv);
 static void lpc43_txdone(FAR struct lpc43_ethmac_s *priv);
-#ifdef CONFIG_NET_NOINTS
+
 static void lpc43_interrupt_work(FAR void *arg);
-#endif
-static int  lpc43_interrupt(int irq, FAR void *context);
+static int  lpc43_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
-static inline void lpc43_txtimeout_process(FAR struct lpc43_ethmac_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void lpc43_txtimeout_work(FAR void *arg);
-#endif
 static void lpc43_txtimeout_expiry(int argc, uint32_t arg, ...);
 
-static inline void lpc43_poll_process(FAR struct lpc43_ethmac_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void lpc43_poll_work(FAR void *arg);
-#endif
 static void lpc43_poll_expiry(int argc, uint32_t arg, ...);
 
 /* NuttX callback functions */
 
 static int  lpc43_ifup(struct net_driver_s *dev);
 static int  lpc43_ifdown(struct net_driver_s *dev);
-static inline void lpc43_txavail_process(FAR struct lpc43_ethmac_s *priv);
-#ifdef CONFIG_NET_NOINTS
+
 static void lpc43_txavail_work(FAR void *arg);
-#endif
 static int  lpc43_txavail(struct net_driver_s *dev);
+
 #if defined(CONFIG_NET_IGMP) || defined(CONFIG_NET_ICMPv6)
 static int  lpc43_addmac(struct net_driver_s *dev, FAR const uint8_t *mac);
 #endif
@@ -683,7 +674,7 @@ static int  lpc43_ethconfig(FAR struct lpc43_ethmac_s *priv);
  *
  ****************************************************************************/
 
-#if defined(CONFIG_LPC43_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_LPC43_ETHMAC_REGDEBUG
 static uint32_t lpc43_getreg(uint32_t addr)
 {
   static uint32_t prevaddr = 0;
@@ -704,7 +695,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              ninfo("...\n");
             }
 
           return val;
@@ -721,7 +712,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          ninfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -733,7 +724,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%08x\n", addr, val);
+  ninfo("%08x->%08x\n", addr, val);
   return val;
 }
 #endif
@@ -755,12 +746,12 @@ static uint32_t lpc43_getreg(uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_LPC43_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_LPC43_ETHMAC_REGDEBUG
 static void lpc43_putreg(uint32_t val, uint32_t addr)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", addr, val);
+  ninfo("%08x<-%08x\n", addr, val);
 
   /* Write the value */
 
@@ -782,7 +773,7 @@ static void lpc43_putreg(uint32_t val, uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_LPC43_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_LPC43_ETHMAC_REGDEBUG
 static void lpc43_checksetup(void)
 {
 }
@@ -947,8 +938,8 @@ static int lpc43_transmit(FAR struct lpc43_ethmac_s *priv)
   txdesc  = priv->txhead;
   txfirst = txdesc;
 
-  nllvdbg("d_len: %d d_buf: %p txhead: %p tdes0: %08x\n",
-          priv->dev.d_len, priv->dev.d_buf, txdesc, txdesc->tdes0);
+  ninfo("d_len: %d d_buf: %p txhead: %p tdes0: %08x\n",
+        priv->dev.d_len, priv->dev.d_buf, txdesc, txdesc->tdes0);
 
   DEBUGASSERT(txdesc && (txdesc->tdes0 & ETH_TDES0_OWN) == 0);
 
@@ -964,7 +955,7 @@ static int lpc43_transmit(FAR struct lpc43_ethmac_s *priv)
       bufcount = (priv->dev.d_len + (CONFIG_LPC43_ETH_BUFSIZE-1)) / CONFIG_LPC43_ETH_BUFSIZE;
       lastsize = priv->dev.d_len - (bufcount - 1) * CONFIG_LPC43_ETH_BUFSIZE;
 
-      nllvdbg("bufcount: %d lastsize: %d\n", bufcount, lastsize);
+      ninfo("bufcount: %d lastsize: %d\n", bufcount, lastsize);
 
       /* Set the first segment bit in the first TX descriptor */
 
@@ -1074,8 +1065,8 @@ static int lpc43_transmit(FAR struct lpc43_ethmac_s *priv)
 
   priv->inflight++;
 
-  nllvdbg("txhead: %p txtail: %p inflight: %d\n",
-          priv->txhead, priv->txtail, priv->inflight);
+  ninfo("txhead: %p txtail: %p inflight: %d\n",
+        priv->txhead, priv->txtail, priv->inflight);
 
   /* If all TX descriptors are in-flight, then we have to disable receive interrupts
    * too.  This is because receive events can trigger more un-stoppable transmit
@@ -1373,7 +1364,7 @@ static void lpc43_freesegment(FAR struct lpc43_ethmac_s *priv,
   struct eth_rxdesc_s *rxdesc;
   int i;
 
-  nllvdbg("rxfirst: %p segments: %d\n", rxfirst, segments);
+  ninfo("rxfirst: %p segments: %d\n", rxfirst, segments);
 
   /* Set OWN bit in RX descriptors.  This gives the buffers back to DMA */
 
@@ -1431,8 +1422,8 @@ static int lpc43_recvframe(FAR struct lpc43_ethmac_s *priv)
   uint8_t *buffer;
   int i;
 
-  nllvdbg("rxhead: %p rxcurr: %p segments: %d\n",
-          priv->rxhead, priv->rxcurr, priv->segments);
+  ninfo("rxhead: %p rxcurr: %p segments: %d\n",
+        priv->rxhead, priv->rxcurr, priv->segments);
 
   /* Check if there are free buffers.  We cannot receive new frames in this
    * design unless there is at least one free buffer.
@@ -1440,7 +1431,7 @@ static int lpc43_recvframe(FAR struct lpc43_ethmac_s *priv)
 
   if (!lpc43_isfreebuffer(priv))
     {
-      nlldbg("No free buffers\n");
+      nerr("ERROR: No free buffers\n");
       return -ENOMEM;
     }
 
@@ -1497,7 +1488,7 @@ static int lpc43_recvframe(FAR struct lpc43_ethmac_s *priv)
               rxcurr = priv->rxcurr;
             }
 
-          nllvdbg("rxhead: %p rxcurr: %p segments: %d\n",
+          ninfo("rxhead: %p rxcurr: %p segments: %d\n",
               priv->rxhead, priv->rxcurr, priv->segments);
 
           /* Check if any errors are reported in the frame */
@@ -1536,8 +1527,8 @@ static int lpc43_recvframe(FAR struct lpc43_ethmac_s *priv)
               priv->rxhead   = (struct eth_rxdesc_s *)rxdesc->rdes3;
               lpc43_freesegment(priv, rxcurr, priv->segments);
 
-              nllvdbg("rxhead: %p d_buf: %p d_len: %d\n",
-                      priv->rxhead, dev->d_buf, dev->d_len);
+              ninfo("rxhead: %p d_buf: %p d_len: %d\n",
+                    priv->rxhead, dev->d_buf, dev->d_len);
 
               return OK;
             }
@@ -1547,7 +1538,7 @@ static int lpc43_recvframe(FAR struct lpc43_ethmac_s *priv)
                * scanning logic, and continue scanning with the next frame.
                */
 
-              nlldbg("DROPPED: RX descriptor errors: %08x\n", rxdesc->rdes0);
+              nwarn("WARNING: Dropped, RX descriptor errors: %08x\n", rxdesc->rdes0);
               lpc43_freesegment(priv, rxcurr, priv->segments);
             }
         }
@@ -1563,8 +1554,8 @@ static int lpc43_recvframe(FAR struct lpc43_ethmac_s *priv)
 
   priv->rxhead = rxdesc;
 
-  nllvdbg("rxhead: %p rxcurr: %p segments: %d\n",
-          priv->rxhead, priv->rxcurr, priv->segments);
+  ninfo("rxhead: %p rxcurr: %p segments: %d\n",
+        priv->rxhead, priv->rxcurr, priv->segments);
 
   return -EAGAIN;
 }
@@ -1608,7 +1599,7 @@ static void lpc43_receive(FAR struct lpc43_ethmac_s *priv)
 
       if (dev->d_len > CONFIG_NET_ETH_MTU)
         {
-          nlldbg("DROPPED: Too big: %d\n", dev->d_len);
+          nwarn("WARNING: Dropped, Too big: %d\n", dev->d_len);
           /* Free dropped packet buffer */
 
           if (dev->d_buf)
@@ -1632,7 +1623,7 @@ static void lpc43_receive(FAR struct lpc43_ethmac_s *priv)
 #ifdef CONFIG_NET_IPv4
       if (BUF->type == HTONS(ETHTYPE_IP))
         {
-          nllvdbg("IPv4 frame\n");
+          ninfo("IPv4 frame\n");
 
           /* Handle ARP on input then give the IPv4 packet to the network
            * layer
@@ -1668,11 +1659,11 @@ static void lpc43_receive(FAR struct lpc43_ethmac_s *priv)
             }
         }
       else
-#endif
+#endif /* CONFIG_NET_IPv4 */
 #ifdef CONFIG_NET_IPv6
       if (BUF->type == HTONS(ETHTYPE_IP6))
         {
-          nllvdbg("Iv6 frame\n");
+          ninfo("Iv6 frame\n");
 
           /* Give the IPv6 packet to the network layer */
 
@@ -1705,11 +1696,11 @@ static void lpc43_receive(FAR struct lpc43_ethmac_s *priv)
             }
         }
       else
-#endif
+#endif /* CONFIG_NET_IPv6 */
 #ifdef CONFIG_NET_ARP
       if (BUF->type == htons(ETHTYPE_ARP))
         {
-          nllvdbg("ARP frame\n");
+          ninfo("ARP frame\n");
 
           /* Handle ARP packet */
 
@@ -1727,7 +1718,7 @@ static void lpc43_receive(FAR struct lpc43_ethmac_s *priv)
       else
 #endif
         {
-          nlldbg("DROPPED: Unknown type: %04x\n", BUF->type);
+          nwarn("WARNING: Dropped, Unknown type: %04x\n", BUF->type);
         }
 
       /* We are finished with the RX buffer.  NOTE:  If the buffer is
@@ -1768,8 +1759,8 @@ static void lpc43_freeframe(FAR struct lpc43_ethmac_s *priv)
   struct eth_txdesc_s *txdesc;
   int i;
 
-  nllvdbg("txhead: %p txtail: %p inflight: %d\n",
-          priv->txhead, priv->txtail, priv->inflight);
+  ninfo("txhead: %p txtail: %p inflight: %d\n",
+        priv->txhead, priv->txtail, priv->inflight);
 
   /* Scan for "in-flight" descriptors owned by the CPU */
 
@@ -1784,8 +1775,8 @@ static void lpc43_freeframe(FAR struct lpc43_ethmac_s *priv)
            * TX descriptors.
            */
 
-          nllvdbg("txtail: %p tdes0: %08x tdes2: %08x tdes3: %08x\n",
-                  txdesc, txdesc->tdes0, txdesc->tdes2, txdesc->tdes3);
+          ninfo("txtail: %p tdes0: %08x tdes2: %08x tdes3: %08x\n",
+                txdesc, txdesc->tdes0, txdesc->tdes2, txdesc->tdes3);
 
           DEBUGASSERT(txdesc->tdes2 != 0);
 
@@ -1837,8 +1828,8 @@ static void lpc43_freeframe(FAR struct lpc43_ethmac_s *priv)
 
       priv->txtail = txdesc;
 
-      nllvdbg("txhead: %p txtail: %p inflight: %d\n",
-              priv->txhead, priv->txtail, priv->inflight);
+      ninfo("txhead: %p txtail: %p inflight: %d\n",
+            priv->txhead, priv->txtail, priv->inflight);
     }
 }
 
@@ -1875,14 +1866,6 @@ static void lpc43_txdone(FAR struct lpc43_ethmac_s *priv)
 
       wd_cancel(priv->txtimeout);
 
-      /* Then make sure that the TX poll timer is running (if it is already
-       * running, the following would restart it).  This is necessary to
-       * avoid certain race conditions where the polling sequence can be
-       * interrupted.
-       */
-
-      (void)wd_start(priv->txpoll, LPC43_WDDELAY, lpc43_poll_expiry, 1, priv);
-
       /* And disable further TX interrupts. */
 
       lpc43_disableint(priv, ETH_DMAINT_TI);
@@ -1894,29 +1877,32 @@ static void lpc43_txdone(FAR struct lpc43_ethmac_s *priv)
 }
 
 /****************************************************************************
- * Function: lpc43_interrupt_process
+ * Function: lpc43_interrupt_work
  *
  * Description:
- *   Interrupt processing.  This may be performed either within the interrupt
- *   handler or on the worker thread, depending upon the configuration
+ *   Perform interrupt related work from the worker thread
  *
  * Parameters:
- *   priv  - Reference to the driver state structure
+ *   arg - The argument passed when work_queue() was called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
  *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static inline void lpc43_interrupt_process(FAR struct lpc43_ethmac_s *priv)
+static void lpc43_interrupt_work(FAR void *arg)
 {
+  FAR struct lpc43_ethmac_s *priv = (FAR struct lpc43_ethmac_s *)arg;
   uint32_t dmasr;
 
+  DEBUGASSERT(priv);
+
   /* Get the DMA interrupt status bits (no MAC interrupts are expected) */
 
+  net_lock();
   dmasr = lpc43_getreg(LPC43_ETH_DMASTAT);
 
   /* Mask only enabled interrupts.  This depends on the fact that the interrupt
@@ -1968,14 +1954,13 @@ static inline void lpc43_interrupt_process(FAR struct lpc43_ethmac_s *priv)
   /* Handle error interrupt only if CONFIG_DEBUG_NET is eanbled */
 
 #ifdef CONFIG_DEBUG_NET
-
   /* Check if there are pending "abnormal" interrupts */
 
   if ((dmasr & ETH_DMAINT_AIS) != 0)
     {
       /* Just let the user know what happened */
 
-      nlldbg("Abnormal event(s): %08x\n", dmasr);
+      nerr("ERROR: Abnormal event(s): %08x\n", dmasr);
 
       /* Clear all pending abnormal events */
 
@@ -1985,45 +1970,14 @@ static inline void lpc43_interrupt_process(FAR struct lpc43_ethmac_s *priv)
 
       lpc43_putreg(ETH_DMAINT_AIS, LPC43_ETH_DMASTAT);
     }
-#endif
-}
+#endif /* CONFIG_DEBUG_NET */
 
-/****************************************************************************
- * Function: lpc43_interrupt_work
- *
- * Description:
- *   Perform interrupt related work from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() was called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void lpc43_interrupt_work(FAR void *arg)
-{
-  FAR struct lpc43_ethmac_s *priv = (FAR struct lpc43_ethmac_s *)arg;
-  net_lock_t state;
-
-  DEBUGASSERT(priv);
-
-  /* Process pending Ethernet interrupts */
-
-  state = net_lock();
-  lpc43_interrupt_process(priv);
-  net_unlock(state);
+  net_unlock();
 
   /* Re-enable Ethernet interrupts at the NVIC */
 
   up_enable_irq(LPC43M4_IRQ_ETHERNET);
 }
-#endif
 
 /****************************************************************************
  * Function: lpc43_interrupt
@@ -2042,11 +1996,9 @@ static void lpc43_interrupt_work(FAR void *arg)
  *
  ****************************************************************************/
 
-static int lpc43_interrupt(int irq, FAR void *context)
+static int lpc43_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   FAR struct lpc43_ethmac_s *priv = &g_lpc43ethmac;
-
-#ifdef CONFIG_NET_NOINTS
   uint32_t dmasr;
 
   /* Get the DMA interrupt status bits (no MAC interrupts are expected) */
@@ -2073,89 +2025,49 @@ static int lpc43_interrupt(int irq, FAR void *context)
            wd_cancel(priv->txtimeout);
         }
 
-      /* Cancel any pending poll work */
-
-      work_cancel(HPWORK, &priv->work);
-
       /* Schedule to perform the interrupt processing on the worker thread. */
 
-      work_queue(HPWORK, &priv->work, lpc43_interrupt_work, priv, 0);
+      work_queue(ETHWORK, &priv->irqwork, lpc43_interrupt_work, priv, 0);
     }
 
-#else
-  /* Process the interrupt now */
-
-  lpc43_interrupt_process(priv);
-#endif
-
   return OK;
 }
 
 /****************************************************************************
- * Function: lpc43_txtimeout_process
+ * Function: lpc43_txtimeout_work
  *
  * Description:
- *   Process a TX timeout.  Called from the either the watchdog timer
- *   expiration logic or from the worker thread, depending upon the
- *   configuration.  The timeout means that the last TX never completed.
- *   Reset the hardware and start again.
+ *   Perform TX timeout related work from the worker thread
  *
  * Parameters:
- *   priv  - Reference to the driver state structure
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
- *   Global interrupts are disabled by the watchdog logic.
+ *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static inline void lpc43_txtimeout_process(FAR struct lpc43_ethmac_s *priv)
+static void lpc43_txtimeout_work(FAR void *arg)
 {
+  FAR struct lpc43_ethmac_s *priv = (FAR struct lpc43_ethmac_s *)arg;
+
   /* Then reset the hardware.  Just take the interface down, then back
    * up again.
    */
 
+  net_lock();
   lpc43_ifdown(&priv->dev);
   lpc43_ifup(&priv->dev);
 
   /* Then poll the network for new XMIT data */
 
   lpc43_dopoll(priv);
+  net_unlock();
 }
 
-/****************************************************************************
- * Function: lpc43_txtimeout_work
- *
- * Description:
- *   Perform TX timeout related work from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() as called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void lpc43_txtimeout_work(FAR void *arg)
-{
-  FAR struct lpc43_ethmac_s *priv = (FAR struct lpc43_ethmac_s *)arg;
-  net_lock_t state;
-
-  /* Process pending Ethernet interrupts */
-
-  state = net_lock();
-  lpc43_txtimeout_process(priv);
-  net_unlock(state);
-}
-#endif
-
 /****************************************************************************
  * Function: lpc43_txtimeout_expiry
  *
@@ -2179,9 +2091,8 @@ static void lpc43_txtimeout_expiry(int argc, uint32_t arg, ...)
 {
   FAR struct lpc43_ethmac_s *priv = (FAR struct lpc43_ethmac_s *)arg;
 
-  nlldbg("Timeout!\n");
+  ninfo("Timeout!\n");
 
-#ifdef CONFIG_NET_NOINTS
   /* Disable further Ethernet interrupts.  This will prevent some race
    * conditions with interrupt work.  There is still a potential race
    * condition with interrupt work that is already queued and in progress.
@@ -2191,42 +2102,33 @@ static void lpc43_txtimeout_expiry(int argc, uint32_t arg, ...)
 
   up_disable_irq(LPC43M4_IRQ_ETHERNET);
 
-  /* Cancel any pending poll or interrupt work.  This will have no effect
-   * on work that has already been started.
+  /* Schedule to perform the TX timeout processing on the worker thread,
+   * perhaps cancelling any pending IRQ processing.
    */
 
-  work_cancel(HPWORK, &priv->work);
-
-  /* Schedule to perform the TX timeout processing on the worker thread. */
-
-  work_queue(HPWORK, &priv->work, lpc43_txtimeout_work, priv, 0);
-
-#else
-  /* Process the timeout now */
-
-  lpc43_txtimeout_process(priv);
-#endif
+  work_queue(ETHWORK, &priv->irqwork, lpc43_txtimeout_work, priv, 0);
 }
 
 /****************************************************************************
- * Function: lpc43_poll_process
+ * Function: lpc43_poll_work
  *
  * Description:
- *   Perform the periodic poll.  This may be called either from watchdog
- *   timer logic or from the worker thread, depending upon the configuration.
+ *   Perform periodic polling from the worker thread
  *
  * Parameters:
- *   priv  - Reference to the driver state structure
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
+ *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static inline void lpc43_poll_process(FAR struct lpc43_ethmac_s *priv)
+static void lpc43_poll_work(FAR void *arg)
 {
+  FAR struct lpc43_ethmac_s *priv = (FAR struct lpc43_ethmac_s *)arg;
   FAR struct net_driver_s   *dev  = &priv->dev;
 
   /* Check if the next TX descriptor is owned by the Ethernet DMA or CPU.  We
@@ -2240,6 +2142,7 @@ static inline void lpc43_poll_process(FAR struct lpc43_ethmac_s *priv)
    * CONFIG_LPC43_ETH_NTXDESC).
    */
 
+  net_lock();
   if ((priv->txhead->tdes0 & ETH_TDES0_OWN) == 0 &&
        priv->txhead->tdes2 == 0)
     {
@@ -2275,39 +2178,9 @@ static inline void lpc43_poll_process(FAR struct lpc43_ethmac_s *priv)
   /* Setup the watchdog poll timer again */
 
   (void)wd_start(priv->txpoll, LPC43_WDDELAY, lpc43_poll_expiry, 1, priv);
+  net_unlock();
 }
 
-/****************************************************************************
- * Function: lpc43_poll_work
- *
- * Description:
- *   Perform periodic polling from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() as called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void lpc43_poll_work(FAR void *arg)
-{
-  FAR struct lpc43_ethmac_s *priv = (FAR struct lpc43_ethmac_s *)arg;
-  net_lock_t state;
-
-  /* Perform the poll */
-
-  state = net_lock();
-  lpc43_poll_process(priv);
-  net_unlock(state);
-}
-#endif
-
 /****************************************************************************
  * Function: lpc43_poll_expiry
  *
@@ -2330,32 +2203,9 @@ static void lpc43_poll_expiry(int argc, uint32_t arg, ...)
 {
   FAR struct lpc43_ethmac_s *priv = (FAR struct lpc43_ethmac_s *)arg;
 
-#ifdef CONFIG_NET_NOINTS
-  /* Is our single work structure available?  It may not be if there are
-   * pending interrupt actions.
-   */
-
-  if (work_available(&priv->work))
-    {
-      /* Schedule to perform the interrupt processing on the worker thread. */
-
-      work_queue(HPWORK, &priv->work, lpc43_poll_work, priv, 0);
-    }
-  else
-    {
-      /* No.. Just re-start the watchdog poll timer, missing one polling
-       * cycle.
-       */
-
-      (void)wd_start(priv->txpoll, LPC43_WDDELAY, lpc43_poll_expiry, 1,
-                     (uint32_t)priv);
-    }
-
-#else
-  /* Process the interrupt now */
+  /* Schedule to perform the interrupt processing on the worker thread. */
 
-  lpc43_poll_process(priv);
-#endif
+  work_queue(ETHWORK, &priv->pollwork, lpc43_poll_work, priv, 0);
 }
 
 /****************************************************************************
@@ -2381,15 +2231,15 @@ static int lpc43_ifup(struct net_driver_s *dev)
   int ret;
 
 #ifdef CONFIG_NET_IPv4
-  ndbg("Bringing up: %d.%d.%d.%d\n",
-       dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-       (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 #endif
 #ifdef CONFIG_NET_IPv6
-  ndbg("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
-       dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
-       dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
-       dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
+  ninfo("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+        dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
+        dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
+        dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
 #endif
 
   /* Configure the Ethernet interface for DMA operation. */
@@ -2435,7 +2285,7 @@ static int lpc43_ifdown(struct net_driver_s *dev)
   FAR struct lpc43_ethmac_s *priv = (FAR struct lpc43_ethmac_s *)dev->d_private;
   irqstate_t flags;
 
-  ndbg("Taking the network down\n");
+  ninfo("Taking the network down\n");
 
   /* Disable the Ethernet interrupt */
 
@@ -2462,66 +2312,39 @@ static int lpc43_ifdown(struct net_driver_s *dev)
 }
 
 /****************************************************************************
- * Function: lpc43_txavail_process
+ * Function: lpc43_txavail_work
  *
  * Description:
- *   Perform an out-of-cycle poll.
+ *   Perform an out-of-cycle poll on the worker thread.
  *
  * Parameters:
- *   priv - Reference to the NuttX driver state structure
+ *   arg  - Reference to the NuttX driver state structure (cast to void*)
  *
  * Returned Value:
  *   None
  *
  * Assumptions:
- *   Called in normal user mode
+ *   Called on the higher priority worker thread.
  *
  ****************************************************************************/
 
-static inline void lpc43_txavail_process(FAR struct lpc43_ethmac_s *priv)
+static void lpc43_txavail_work(FAR void *arg)
 {
-  nvdbg("ifup: %d\n", priv->ifup);
+  FAR struct lpc43_ethmac_s *priv = (FAR struct lpc43_ethmac_s *)arg;
 
   /* Ignore the notification if the interface is not yet up */
 
+  net_lock();
+  ninfo("ifup: %d\n", priv->ifup);
   if (priv->ifup)
     {
       /* Poll for new XMIT data */
 
       lpc43_dopoll(priv);
     }
-}
 
-/****************************************************************************
- * Function: lpc43_txavail_work
- *
- * Description:
- *   Perform an out-of-cycle poll on the worker thread.
- *
- * Parameters:
- *   arg  - Reference to the NuttX driver state structure (cast to void*)
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Called on the higher priority worker thread.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void lpc43_txavail_work(FAR void *arg)
-{
-  FAR struct lpc43_ethmac_s *priv = (FAR struct lpc43_ethmac_s *)arg;
-  net_lock_t state;
-
-  /* Perform the poll */
-
-  state = net_lock();
-  lpc43_txavail_process(priv);
-  net_unlock(state);
+  net_unlock();
 }
-#endif
 
 /****************************************************************************
  * Function: lpc43_txavail
@@ -2546,34 +2369,18 @@ static int lpc43_txavail(struct net_driver_s *dev)
 {
   FAR struct lpc43_ethmac_s *priv = (FAR struct lpc43_ethmac_s *)dev->d_private;
 
-#ifdef CONFIG_NET_NOINTS
   /* Is our single work structure available?  It may not be if there are
    * pending interrupt actions and we will have to ignore the Tx
    * availability action.
    */
 
-  if (work_available(&priv->work))
+  if (work_available(&priv->pollwork))
     {
       /* Schedule to serialize the poll on the worker thread. */
 
-      work_queue(HPWORK, &priv->work, lpc43_txavail_work, priv, 0);
+      work_queue(ETHWORK, &priv->pollwork, lpc43_txavail_work, priv, 0);
     }
 
-#else
-  irqstate_t flags;
-
-  /* Disable interrupts because this function may be called from interrupt
-   * level processing.
-   */
-
-  flags = enter_critical_section();
-
-  /* Perform the out-of-cycle poll now */
-
-  lpc43_txavail_process(priv);
-  leave_critical_section(flags);
-#endif
-
   return OK;
 }
 
@@ -2647,8 +2454,8 @@ static int lpc43_addmac(struct net_driver_s *dev, FAR const uint8_t *mac)
   uint32_t temp;
   uint32_t registeraddress;
 
-  nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Add the MAC address to the hardware multicast hash table */
 
@@ -2704,8 +2511,8 @@ static int lpc43_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac)
   uint32_t temp;
   uint32_t registeraddress;
 
-  nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Remove the MAC address to the hardware multicast hash table */
 
@@ -3065,7 +2872,7 @@ static int lpc43_phyread(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t *val
         }
     }
 
-  ndbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n",
+  nerr("ERROR: MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n",
        phydevaddr, phyregaddr);
 
   return -ETIMEDOUT;
@@ -3124,7 +2931,7 @@ static int lpc43_phywrite(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t val
         }
     }
 
-  ndbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n",
+  nerr("ERROR: MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n",
        phydevaddr, phyregaddr, value);
 
   return -ETIMEDOUT;
@@ -3161,7 +2968,7 @@ static inline int lpc43_dm9161(FAR struct lpc43_ethmac_s *priv)
   ret = lpc43_phyread(CONFIG_LPC43_PHYADDR, MII_PHYID1, &phyval);
   if (ret < 0)
     {
-      ndbg("Failed to read the PHY ID1: %d\n", ret);
+      nerr("ERROR: Failed to read the PHY ID1: %d\n", ret);
       return ret;
     }
 
@@ -3172,14 +2979,14 @@ static inline int lpc43_dm9161(FAR struct lpc43_ethmac_s *priv)
       up_systemreset();
     }
 
-  nvdbg("PHY ID1: 0x%04X\n", phyval);
+  ninfo("PHY ID1: 0x%04X\n", phyval);
 
   /* Now check the "DAVICOM Specified Configuration Register (DSCR)", Register 16 */
 
   ret = lpc43_phyread(CONFIG_LPC43_PHYADDR, 16, &phyval);
   if (ret < 0)
     {
-      ndbg("Failed to read the PHY Register 0x10: %d\n", ret);
+      nerr("ERROR: Failed to read the PHY Register 0x10: %d\n", ret);
       return ret;
     }
 
@@ -3236,7 +3043,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
   ret = lpc43_phywrite(CONFIG_LPC43_PHYADDR, MII_MCR, MII_MCR_RESET);
   if (ret < 0)
     {
-      ndbg("Failed to reset the PHY: %d\n", ret);
+      nerr("ERROR: Failed to reset the PHY: %d\n", ret);
       return ret;
     }
 
@@ -3248,7 +3055,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
   ret = lpc43_phy_boardinitialize(0);
   if (ret < 0)
     {
-      ndbg("Failed to initialize the PHY: %d\n", ret);
+      nerr("ERROR: Failed to initialize the PHY: %d\n", ret);
       return ret;
     }
 #endif
@@ -3273,7 +3080,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
       ret = lpc43_phyread(CONFIG_LPC43_PHYADDR, MII_MSR, &phyval);
       if (ret < 0)
         {
-          ndbg("Failed to read the PHY MSR: %d\n", ret);
+          nerr("ERROR: Failed to read the PHY MSR: %d\n", ret);
           return ret;
         }
       else if ((phyval & MII_MSR_LINKSTATUS) != 0)
@@ -3284,7 +3091,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
 
   if (timeout >= PHY_RETRY_TIMEOUT)
     {
-      ndbg("Timed out waiting for link status: %04x\n", phyval);
+      nerr("ERROR: Timed out waiting for link status: %04x\n", phyval);
       return -ETIMEDOUT;
     }
 
@@ -3293,7 +3100,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
   ret = lpc43_phywrite(CONFIG_LPC43_PHYADDR, MII_MCR, MII_MCR_ANENABLE);
   if (ret < 0)
     {
-      ndbg("Failed to enable auto-negotiation: %d\n", ret);
+      nerr("ERROR: Failed to enable auto-negotiation: %d\n", ret);
       return ret;
     }
 
@@ -3304,7 +3111,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
       ret = lpc43_phyread(CONFIG_LPC43_PHYADDR, MII_MSR, &phyval);
       if (ret < 0)
         {
-          ndbg("Failed to read the PHY MSR: %d\n", ret);
+          nerr("ERROR: Failed to read the PHY MSR: %d\n", ret);
           return ret;
         }
       else if ((phyval & MII_MSR_ANEGCOMPLETE) != 0)
@@ -3315,7 +3122,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
 
   if (timeout >= PHY_RETRY_TIMEOUT)
     {
-      ndbg("Timed out waiting for auto-negotiation\n");
+      nerr("ERROR: Timed out waiting for auto-negotiation\n");
       return -ETIMEDOUT;
     }
 
@@ -3324,13 +3131,13 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
   ret = lpc43_phyread(CONFIG_LPC43_PHYADDR, CONFIG_LPC43_PHYSR, &phyval);
   if (ret < 0)
     {
-      ndbg("Failed to read PHY status register\n");
+      nerr("ERROR: Failed to read PHY status register\n");
       return ret;
     }
 
   /* Remember the selected speed and duplex modes */
 
-  nvdbg("PHYSR[%d]: %04x\n", CONFIG_LPC43_PHYSR, phyval);
+  ninfo("PHYSR[%d]: %04x\n", CONFIG_LPC43_PHYSR, phyval);
 
 #ifdef CONFIG_ETH0_PHY_LAN8720
   if ((phyval & (MII_MSR_100BASETXHALF | MII_MSR_100BASETXFULL)) != 0)
@@ -3392,6 +3199,9 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
       priv->mbps100 = 1;
     }
 #endif
+#endif
+
+#else /* Auto-negotion not selected */
 
 #ifdef CONFIG_LPC43_ETHFD
   priv->mbps100 = 1;
@@ -3400,11 +3210,9 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
 #ifdef CONFIG_LPC43_ETH100MBPS
   priv->fduplex = 1;
 #endif
-#endif
-
-  /* However we got here, commit to the hardware */
 
   phyval = 0;
+
   if (priv->mbps100)
     {
       phyval |= MII_MCR_FULLDPLX;
@@ -3418,7 +3226,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
   ret = lpc43_phywrite(CONFIG_LPC43_PHYADDR, MII_MCR, phyval);
   if (ret < 0)
     {
-     ndbg("Failed to write the PHY MCR: %d\n", ret);
+     nerr("ERROR: Failed to write the PHY MCR: %d\n", ret);
       return ret;
     }
 
@@ -3434,9 +3242,9 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
 #endif
 #endif
 
-  ndbg("Duplex: %s Speed: %d MBps\n",
-       priv->fduplex ? "FULL" : "HALF",
-       priv->mbps100 ? 100 : 10);
+  ninfo("Duplex: %s Speed: %d MBps\n",
+        priv->fduplex ? "FULL" : "HALF",
+        priv->mbps100 ? 100 : 10);
 
   return OK;
 }
@@ -3528,21 +3336,22 @@ static inline void lpc43_ethgpioconfig(FAR struct lpc43_ethmac_s *priv)
    * MII_RX_DV, MII_CRS, MII_COL, MDC, MDIO
    */
 
-  lpc43_pin_config(GPIO_ETH_MII_COL);
-  lpc43_pin_config(GPIO_ETH_MII_CRS);
-  lpc43_pin_config(GPIO_ETH_MII_RXD0);
-  lpc43_pin_config(GPIO_ETH_MII_RXD1);
-  lpc43_pin_config(GPIO_ETH_MII_RXD2);
-  lpc43_pin_config(GPIO_ETH_MII_RXD3);
-  lpc43_pin_config(GPIO_ETH_MII_RX_CLK);
-  lpc43_pin_config(GPIO_ETH_MII_RX_DV);
-  lpc43_pin_config(GPIO_ETH_MII_RX_ER);
-  lpc43_pin_config(GPIO_ETH_MII_TXD0);
-  lpc43_pin_config(GPIO_ETH_MII_TXD1);
-  lpc43_pin_config(GPIO_ETH_MII_TXD2);
-  lpc43_pin_config(GPIO_ETH_MII_TXD3);
-  lpc43_pin_config(GPIO_ETH_MII_TX_CLK);
-  lpc43_pin_config(GPIO_ETH_MII_TX_EN);
+  lpc43_pin_config(PINCONF_ENET_MII_COL);
+  lpc43_pin_config(PINCONF_ENET_MII_CRS);
+  lpc43_pin_config(PINCONF_ENET_MII_RXD0);
+  lpc43_pin_config(PINCONF_ENET_MII_RXD1);
+  lpc43_pin_config(PINCONF_ENET_MII_RXD2);
+  lpc43_pin_config(PINCONF_ENET_MII_RXD3);
+  lpc43_pin_config(PINCONF_ENET_MII_RX_CLK);
+  lpc43_pin_config(PINCONF_ENET_MII_RX_DV);
+  lpc43_pin_config(PINCONF_ENET_MII_RX_ER);
+  lpc43_pin_config(PINCONF_ENET_MII_TXD0);
+  lpc43_pin_config(PINCONF_ENET_MII_TXD1);
+  lpc43_pin_config(PINCONF_ENET_MII_TXD2);
+  lpc43_pin_config(PINCONF_ENET_MII_TXD3);
+  lpc43_pin_config(PINCONF_ENET_MII_TX_CLK);
+  lpc43_pin_config(PINCONF_ENET_MII_TX_EN);
+  lpc43_pin_config(PINCONF_ENET_MII_TX_ER);
 
   /* Set up the RMII interface. */
 
@@ -3718,11 +3527,11 @@ static void lpc43_macaddress(FAR struct lpc43_ethmac_s *priv)
   FAR struct net_driver_s *dev = &priv->dev;
   uint32_t regval;
 
-  nllvdbg("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          dev->d_ifname,
-          dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
-          dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
-          dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
+  ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        dev->d_ifname,
+        dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
+        dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
+        dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
 
   /* Set the MAC address high register */
 
@@ -3786,7 +3595,7 @@ static void lpc43_ipv6multicast(FAR struct lpc43_ethmac_s *priv)
   mac[4] = tmp16 & 0xff;
   mac[5] = tmp16 >> 8;
 
-  nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+  ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
         mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   (void)lpc43_addmac(dev, mac);
@@ -3925,12 +3734,12 @@ static int lpc43_ethconfig(FAR struct lpc43_ethmac_s *priv)
 
   /* Reset the Ethernet block */
 
-  nllvdbg("Reset the Ethernet block\n");
+  ninfo("Reset the Ethernet block\n");
   lpc43_ethreset(priv);
 
   /* Initialize the PHY */
 
-  nllvdbg("Initialize the PHY\n");
+  ninfo("Initialize the PHY\n");
   ret = lpc43_phyinit(priv);
   if (ret < 0)
     {
@@ -3945,7 +3754,7 @@ static int lpc43_ethconfig(FAR struct lpc43_ethmac_s *priv)
 
   /* Initialize the MAC and DMA */
 
-  nllvdbg("Initialize the MAC and DMA\n");
+  ninfo("Initialize the MAC and DMA\n");
   ret = lpc43_macconfig(priv);
   if (ret < 0)
     {
@@ -3966,7 +3775,7 @@ static int lpc43_ethconfig(FAR struct lpc43_ethmac_s *priv)
 
   /* Enable normal MAC operation */
 
-  nllvdbg("Enable normal operation\n");
+  ninfo("Enable normal operation\n");
   return lpc43_macenable(priv);
 }
 
@@ -4021,7 +3830,7 @@ static inline int lpc43_ethinitialize(void)
 
   /* Attach the IRQ to the driver */
 
-  if (irq_attach(LPC43M4_IRQ_ETHERNET, lpc43_interrupt))
+  if (irq_attach(LPC43M4_IRQ_ETHERNET, lpc43_interrupt, NULL))
     {
       /* We could not attach the ISR to the interrupt */
 
diff --git a/arch/arm/src/lpc43xx/lpc43_ethernet.h b/arch/arm/src/lpc43xx/lpc43_ethernet.h
index 55888fc7270aa0722ecd2b110038b053fb65d990..7d60a43697b5795e55aa6612d491cd3149cf71c4 100644
--- a/arch/arm/src/lpc43xx/lpc43_ethernet.h
+++ b/arch/arm/src/lpc43xx/lpc43_ethernet.h
@@ -55,7 +55,8 @@
 #undef EXTERN
 #if defined(__cplusplus)
 #define EXTERN extern "C"
-extern "C" {
+extern "C"
+{
 #else
 #define EXTERN extern
 #endif
diff --git a/arch/arm/src/lpc43xx/lpc43_gpdma.c b/arch/arm/src/lpc43xx/lpc43_gpdma.c
index 991f80a1cfd74590c4d603727c6ef909b4b581ab..585bdb9db390351aefad01350545c697caa9b542 100644
--- a/arch/arm/src/lpc43xx/lpc43_gpdma.c
+++ b/arch/arm/src/lpc43xx/lpc43_gpdma.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/lpc43xx/lpc43_gpdma.c
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -52,7 +52,8 @@
 
 #include "chip.h"
 
-#include "lpc43_syscon.h"
+#include "lpc43_ccu.h"
+#include "lpc43_creg.h"
 #include "lpc43_gpdma.h"
 
 #ifdef CONFIG_LPC43_GPDMA
@@ -61,28 +62,33 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef DMA_DEBUG     /* Define to enable debug */
-#undef DMA_VERBOSE   /* Define to enable verbose debug */
-
-#ifdef DMA_DEBUG
-#  define dmadbg  lldbg
-#  ifdef DMA_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef DMA_VERBOSE
-#  define dmadbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
 
+/* This structure represents the state of one DMA channel */
+
+struct lpc43_dmach_s
+{
+  uint8_t chn;             /* The DMA channel number */
+  bool inuse;              /* True: The channel is in use */
+  bool inprogress;         /* True: DMA is in progress on this channel */
+  uint16_t nxfrs;          /* Number of bytes to transfers */
+  dma_callback_t callback; /* DMA completion callback function */
+  void *arg;               /* Argument to pass to the callback function */
+};
+
+/* This structure represents the state of the LPC43 DMA block */
+
+struct lpc43_gpdma_s
+{
+  sem_t exclsem;           /* For exclusive access to the DMA channel list */
+
+  /* This is the state of each DMA channel */
+
+  struct lpc43_dmach_s dmach[LPC43_NDMACH];
+};
+
 /****************************************************************************
  * Private Function Prototypes
  ****************************************************************************/
@@ -91,14 +97,173 @@
  * Private Data
  ****************************************************************************/
 
+/* The state of the LPC43 DMA block */
+
+static struct lpc43_gpdma_s g_gpdma;
+
 /****************************************************************************
  * Public Data
  ****************************************************************************/
 
+/* If the following value is zero, then there is no DMA in progress. This
+ * value is needed in the IDLE loop to determine if the IDLE loop should
+ * go into lower power power consumption modes.  According to the LPC43xx
+ * User Manual: "The DMA controller can continue to work in Sleep mode, and
+ * has access to the peripheral SRAMs and all peripheral registers. The
+ * flash memory and the Main SRAM are not available in Sleep mode, they are
+ * disabled in order to save power."
+ */
+
+volatile uint8_t g_dma_inprogress;
+
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
 
+/****************************************************************************
+ * Name: lpc43_dmainprogress
+ *
+ * Description:
+ *   Another DMA has started. Increment the g_dma_inprogress counter.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void lpc43_dmainprogress(struct lpc43_dmach_s *dmach)
+{
+  irqstate_t flags;
+
+  /* Increment the DMA in progress counter */
+
+  flags = enter_critical_section();
+  DEBUGASSERT(!dmach->inprogress && g_dma_inprogress < LPC43_NDMACH);
+  g_dma_inprogress++;
+  dmach->inprogress = true;
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: lpc43_dmadone
+ *
+ * Description:
+ *   A DMA has completed. Decrement the g_dma_inprogress counter.
+ *
+ *   This function is called only from lpc43_dmastop which, in turn, will be
+ *   called either by the user directly, by the user indirectly via
+ *   lpc43_dmafree(), or from gpdma_interrupt when the transfer completes.
+ *
+ *   NOTE: In the first two cases, we must be able to handle the case where
+ *   there is no DMA in progress and gracefully ignore the call.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void lpc43_dmadone(struct lpc43_dmach_s *dmach)
+{
+  irqstate_t flags;
+
+  /* Increment the DMA in progress counter */
+
+  flags = enter_critical_section();
+  if (dmach->inprogress)
+    {
+      DEBUGASSERT(g_dma_inprogress > 0);
+      dmach->inprogress = false;
+      g_dma_inprogress--;
+    }
+
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: gpdma_interrupt
+ *
+ * Description:
+ *   The common GPDMA interrupt handler.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static int gpdma_interrupt(int irq, FAR void *context, FAR void *arg)
+{
+  struct lpc43_dmach_s *dmach;
+  uint32_t regval;
+  uint32_t chbit;
+  int result;
+  int i;
+
+  /* Check each DMA channel */
+
+  for (i = 0; i < LPC43_NDMACH; i++)
+    {
+      chbit = GPDMA_CHANNEL((uint32_t)i);
+
+      /* Is there an interrupt pending for this channel?  If the bit for
+       * this channel is set, that indicates that a specific DMA channel
+       * interrupt request is active. The request can be generated from
+       * either the error or terminal count interrupt requests.
+       */
+
+      regval = getreg32(LPC43_GPDMA_INTSTAT);
+      if ((regval & chbit) != 0)
+        {
+          /* Yes.. Is this channel assigned? Is there a callback function? */
+
+          dmach = &g_gpdma.dmach[i];
+          if (dmach->inuse && dmach->callback)
+            {
+              /* Yes.. did an error occur? */
+
+              regval = getreg32(LPC43_GPDMA_INTERRSTAT);
+              if ((regval & chbit) != 0)
+                {
+                  /* Yes.. report error status */
+
+                  result = -EIO;
+                }
+
+              /* Then this must be a terminal transfer event */
+
+              else
+                {
+                  /* Let's make sure it is the terminal transfer event. */
+
+                  regval = getreg32(LPC43_GPDMA_INTTCSTAT);
+                  if ((regval & chbit) != 0)
+                    {
+                      result = OK;
+                    }
+
+                  /* This should not happen */
+
+                  else
+                    {
+                      result = -EINVAL;
+                    }
+                }
+
+              /* Perform the callback */
+
+              dmach->callback((DMA_HANDLE)dmach, dmach->arg, result);
+            }
+
+          /* Disable this channel, mask any further interrupts for
+           * this channel, and clear any pending interrupts.
+           */
+
+          lpc43_dmastop((DMA_HANDLE)dmach);
+        }
+    }
+
+  return OK;
+}
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -110,12 +275,101 @@
  *   Initialize the GPDMA subsystem.
  *
  * Returned Value:
+ *   Zero on success; A negated errno value on failure.
+ *
+ ****************************************************************************/
+
+void weak_function up_dmainitialize(void)
+{
+  uint32_t regval;
+  int ret;
+  int i;
+
+  /* Enable clocking to the GPDMA block */
+
+  regval  = getreg32(LPC43_CCU1_M4_DMA_CFG);
+  regval |= CCU_CLK_CFG_RUN;
+  putreg32(regval, LPC43_CCU1_M4_DMA_CFG);
+
+  /* Reset all channel configurations */
+
+  for (i = 0; i < LPC43_NDMACH; i++)
+    {
+      putreg32(0, LPC43_GPDMA_CONFIG_(i));
+    }
+
+  /* Clear all DMA interrupts */
+
+  putreg32(DMACH_ALL, LPC43_GPDMA_INTTCCLEAR);
+  putreg32(DMACH_ALL, LPC43_GPDMA_INTERRCLR);
+
+  /* Initialize the DMA state structure */
+
+  sem_init(&g_gpdma.exclsem, 0, 1);
+
+  for (i = 0; i < LPC43_NDMACH; i++)
+    {
+      g_gpdma.dmach[i].chn   = i;      /* Channel number */
+      g_gpdma.dmach[i].inuse = false;  /* Channel is not in-use */
+    }
+
+  /* Attach and enable the common interrupt handler */
+
+  ret = irq_attach(LPC43M4_IRQ_DMA, gpdma_interrupt, NULL);
+  if (ret == OK)
+    {
+      up_enable_irq(LPC43M4_IRQ_DMA);
+    }
+
+  /* Enable the DMA controller (for little endian operation) */
+
+  putreg32(GPDMA_CONFIG_ENA, LPC43_GPDMA_GLOBAL_CONFIG);
+}
+
+/****************************************************************************
+ * Name: lpc43_dmaconfigure
+ *
+ * Description:
+ *   Configure a DMA request.  Each DMA request may have four different DMA
+ *   request sources.  This associates one of the sources with a DMA request.
+ *
+ * Returned Value:
  *   None
  *
  ****************************************************************************/
 
-void lpc43_dmainitilaize(void)
+void lpc43_dmaconfigure(uint8_t dmarequest, uint8_t dmasrc)
 {
+  uint32_t regval;
+
+  DEBUGASSERT(dmarequest < LPC43_NDMAREQ);
+
+  /* Set or clear the DMASEL bit corresponding to the request number */
+
+  regval = getreg32(LPC43_CREG_DMAMUX);
+
+  switch (dmasrc)
+    {
+      case 0:
+        regval &= ~(3 << dmarequest);
+        break;
+
+      case 1:
+        regval &= ~(3 << dmarequest);
+        regval |= (1 << dmarequest);
+        break;
+
+      case 2:
+        regval &= ~(3 << dmarequest);
+        regval |= (2 << dmarequest);
+        break;
+
+      case 3:
+        regval |= (3 << dmarequest);
+        break;
+    }
+
+  putreg32(regval, LPC43_CREG_DMAMUX);
 }
 
 /****************************************************************************
@@ -134,7 +388,37 @@ void lpc43_dmainitilaize(void)
 
 DMA_HANDLE lpc43_dmachannel(void)
 {
-  return NULL;
+  struct lpc43_dmach_s *dmach = NULL;
+  int ret;
+  int i;
+
+  /* Get exclusive access to the GPDMA state structure */
+
+  do
+    {
+      ret = sem_wait(&g_gpdma.exclsem);
+      DEBUGASSERT(ret == 0 || errno == EINTR);
+    }
+  while (ret < 0);
+
+  /* Find an available DMA channel */
+
+  for (i = 0; i < LPC43_NDMACH; i++)
+    {
+      if (!g_gpdma.dmach[i].inuse)
+        {
+          /* Found one! */
+
+          dmach = &g_gpdma.dmach[i];
+          g_gpdma.dmach[i].inuse = true;
+          break;
+        }
+    }
+
+  /* Return what we found (or not) */
+
+  sem_post(&g_gpdma.exclsem);
+  return (DMA_HANDLE)dmach;
 }
 
 /****************************************************************************
@@ -152,6 +436,19 @@ DMA_HANDLE lpc43_dmachannel(void)
 
 void lpc43_dmafree(DMA_HANDLE handle)
 {
+  struct lpc43_dmach_s *dmach = (DMA_HANDLE)handle;
+
+  DEBUGASSERT(dmach && dmach->inuse);
+
+  /* Make sure that the DMA channel was properly stopped */
+
+  lpc43_dmastop(handle);
+
+  /* Mark the channel available.  This is an atomic operation and needs no
+   * special protection.
+   */
+
+  dmach->inuse = false;
 }
 
 /****************************************************************************
@@ -165,7 +462,87 @@ void lpc43_dmafree(DMA_HANDLE handle)
 int lpc43_dmarxsetup(DMA_HANDLE handle, uint32_t control, uint32_t config,
                      uint32_t srcaddr, uint32_t destaddr, size_t nbytes)
 {
-  return -ENOSYS;
+  struct lpc43_dmach_s *dmach = (DMA_HANDLE)handle;
+  uint32_t chbit;
+  uint32_t regval;
+  uint32_t base;
+
+  DEBUGASSERT(dmach && dmach->inuse && nbytes < 4096);
+
+  chbit = GPDMA_CHANNEL((uint32_t)dmach->chn);
+  base  = LPC43_GPDMA_CHANNEL((uint32_t)dmach->chn);
+
+  /* Put the channel in a known state.  Zero disables everything */
+
+  putreg32(0, base + LPC43_GPDMA_CONTROL_CHOFFSET);
+  putreg32(0, base + LPC43_GPDMA_CONFIG_CHOFFSET);
+
+  /* "Programming a DMA channel
+   *
+   * 1. "Choose a free DMA channel with the priority needed. DMA channel 0
+   *     has the highest priority and DMA channel 7 the lowest priority.
+   */
+
+  regval = getreg32(LPC43_GPDMA_ENBLDCHNS);
+  if ((regval & chbit) != 0)
+    {
+      /* There is an active DMA on this channel! */
+
+      return -EBUSY;
+    }
+
+  /* 2. "Clear any pending interrupts on the channel to be used by writing
+   *     to the DMACIntTCClear and DMACIntErrClear register. The previous
+   *     channel operation might have left interrupt active.
+   */
+
+  putreg32(chbit, LPC43_GPDMA_INTTCCLEAR);
+  putreg32(chbit, LPC43_GPDMA_INTERRCLR);
+
+  /* 3. "Write the source address into the DMACCxSrcAddr register. */
+
+  putreg32(srcaddr, base + LPC43_GPDMA_SRCADDR_CHOFFSET);
+
+  /* 4. "Write the destination address into the DMACCxDestAddr register. */
+
+  putreg32(destaddr, base + LPC43_GPDMA_DESTADDR_CHOFFSET);
+
+  /* 5. "Write the address of the next LLI into the DMACCxLLI register. If
+   *     the transfer comprises of a single packet of data then 0 must be
+   *     written into this register.
+   */
+
+  putreg32(0, base + LPC43_GPDMA_LLI_CHOFFSET);
+
+  /* 6. "Write the control information into the DMACCxControl register."
+   *
+   * The caller provides all CONTROL register fields except for the transfer
+   * size which is passed as a separate parameter and for the terminal count
+   * interrupt enable bit which is controlled by the driver.
+   */
+
+  regval  = control & ~(GPDMA_CONTROL_XFRSIZE_MASK | GPDMA_CONTROL_IE);
+  regval |= ((uint32_t)nbytes << GPDMA_CONTROL_XFRSIZE_SHIFT);
+  putreg32(regval, base + LPC43_GPDMA_CONTROL_CHOFFSET);
+
+  /* Save the number of transfer to perform for lpc43_dmastart */
+
+  dmach->nxfrs = (uint16_t)nbytes;
+
+  /* 7. "Write the channel configuration information into the DMACCxConfig
+   *     register. If the enable bit is set then the DMA channel is
+   *     automatically enabled."
+   *
+   * Only the SRCPER, DSTPER, and FCNTRL fields of the CONFIG register
+   * are provided by the caller.  Little endian is assumed.
+   */
+
+  regval = config & (GPDMA_CONFIG_SRCPER_MASK |
+                     GPDMA_CONFIG_DESTPER_MASK |
+                     GPDMA_CONFIG_FCNTRL_MASK);
+  putreg32(regval, base + LPC43_GPDMA_CONFIG_CHOFFSET);
+
+  return OK;
 }
 
 /****************************************************************************
@@ -178,7 +555,53 @@ int lpc43_dmarxsetup(DMA_HANDLE handle, uint32_t control, uint32_t config,
 
 int lpc43_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
 {
-  return -ENOSYS;
+  struct lpc43_dmach_s *dmach = (DMA_HANDLE)handle;
+  uint32_t regval;
+  uint32_t chbit;
+  uint32_t base;
+
+  DEBUGASSERT(dmach && dmach->inuse && callback);
+
+  /* Save the callback information */
+
+  dmach->callback = callback;
+  dmach->arg      = arg;
+
+  /* Increment the count of DMAs in-progress.  This count will be
+   * decremented when lpc43_dmastop() is called, either by the user,
+   * indirectly via lpc43_dmafree(), or from gpdma_interrupt when the
+   * transfer completes.
+   */
+
+  lpc43_dmainprogress(dmach);
+
+  /* Clear any pending DMA interrupts */
+
+  chbit = GPDMA_CHANNEL((uint32_t)dmach->chn);
+  putreg32(chbit, LPC43_GPDMA_INTTCCLEAR);
+  putreg32(chbit, LPC43_GPDMA_INTERRCLR);
+
+  /* Enable terminal count interrupt.  Note that we need to restore the
+   * number transfers.  That is because the value has a different meaning
+   * when it is read.
+   */
+
+  base    = LPC43_GPDMA_CHANNEL((uint32_t)dmach->chn);
+  regval  = getreg32(base + LPC43_GPDMA_CONTROL_CHOFFSET);
+  regval &= ~GPDMA_CONTROL_XFRSIZE_MASK;
+  regval |= (GPDMA_CONTROL_IE | ((uint32_t)dmach->nxfrs << GPDMA_CONTROL_XFRSIZE_SHIFT));
+  putreg32(regval, base + LPC43_GPDMA_CONTROL_CHOFFSET);
+
+  /* Enable the channel and unmask terminal count and error interrupts.
+   * According to the user manual, zero masks and one unmasks (hence,
+   * these are really enables).
+   */
+
+  regval  = getreg32(base + LPC43_GPDMA_CONFIG_CHOFFSET);
+  regval |= (GPDMA_CONFIG_ENA | GPDMA_CONFIG_IE | GPDMA_CONFIG_ITC);
+  putreg32(regval, base + LPC43_GPDMA_CONFIG_CHOFFSET);
+
+  return OK;
 }
 
 /****************************************************************************
@@ -189,10 +612,40 @@ int lpc43_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
  *   reset and lpc43_dmasetup() must be called before lpc43_dmastart() can be
  *   called again
  *
+ *   This function will be called either by the user directly, by the user
+ *   indirectly via lpc43_dmafree(), or from gpdma_interrupt when the
+ *   transfer completes.
+ *
  ****************************************************************************/
 
 void lpc43_dmastop(DMA_HANDLE handle)
 {
+  struct lpc43_dmach_s *dmach = (DMA_HANDLE)handle;
+  uint32_t regaddr;
+  uint32_t regval;
+  uint32_t chbit;
+
+  DEBUGASSERT(dmach && dmach->inuse);
+
+  /* Disable this channel and mask any further interrupts from the channel.
+   * this channel.  The channel is disabled by clearning the channel
+   * enable bit. Any outstanding data in the FIFOs is lost.
+   */
+
+  regaddr = LPC43_GPDMA_CONFIG_((uint32_t)dmach->chn);
+  regval  = getreg32(regaddr);
+  regval &= ~(GPDMA_CONFIG_ENA | GPDMA_CONFIG_IE | GPDMA_CONFIG_ITC);
+  putreg32(regval, regaddr);
+
+  /* Clear any pending interrupts for this channel */
+
+  chbit = GPDMA_CHANNEL((uint32_t)dmach->chn);
+  putreg32(chbit, LPC43_GPDMA_INTTCCLEAR);
+  putreg32(chbit, LPC43_GPDMA_INTERRCLR);
+
+  /* Decrement the count of DMAs in progress */
+
+  lpc43_dmadone(dmach);
 }
 
 /****************************************************************************
@@ -206,6 +659,34 @@ void lpc43_dmastop(DMA_HANDLE handle)
 #ifdef CONFIG_DEBUG_DMA
 void lpc43_dmasample(DMA_HANDLE handle, struct lpc43_dmaregs_s *regs)
 {
+  struct lpc43_dmach_s *dmach = (DMA_HANDLE)handle;
+  uint32_t base;
+
+  DEBUGASSERT(dmach);
+
+  /* Sample the global DMA registers */
+
+  regs->gbl.intst         = getreg32(LPC43_GPDMA_INTSTAT);
+  regs->gbl.inttcst       = getreg32(LPC43_GPDMA_INTTCSTAT);
+  regs->gbl.interrst      = getreg32(LPC43_GPDMA_INTERRSTAT);
+  regs->gbl.rawinttcst    = getreg32(LPC43_GPDMA_RAWINTTCSTAT);
+  regs->gbl.rawinterrst   = getreg32(LPC43_GPDMA_RAWINTERRSTAT);
+  regs->gbl.enbldchns     = getreg32(LPC43_GPDMA_ENBLDCHNS);
+  regs->gbl.softbreq      = getreg32(LPC43_GPDMA_SOFTBREQ);
+  regs->gbl.softsreq      = getreg32(LPC43_GPDMA_SOFTSREQ);
+  regs->gbl.softlbreq     = getreg32(LPC43_GPDMA_SOFTLBREQ);
+  regs->gbl.softlsreq     = getreg32(LPC43_GPDMA_SOFTLSREQ);
+  regs->gbl.config        = getreg32(LPC43_GPDMA_GLOBAL_CONFIG);
+  regs->gbl.sync          = getreg32(LPC43_GPDMA_SYNC);
+
+  /* Sample the DMA channel registers */
+
+  base                  = LPC43_GPDMA_CHANNEL((uint32_t)dmach->chn);
+  regs->ch.srcaddr      = getreg32(base + LPC43_GPDMA_SRCADDR_CHOFFSET);
+  regs->ch.destaddr     = getreg32(base + LPC43_GPDMA_DESTADDR_CHOFFSET);
+  regs->ch.lli          = getreg32(base + LPC43_GPDMA_LLI_CHOFFSET);
+  regs->ch.control      = getreg32(base + LPC43_GPDMA_CONTROL_CHOFFSET);
+  regs->ch.config       = getreg32(base + LPC43_GPDMA_CONFIG_CHOFFSET);
 }
 #endif /* CONFIG_DEBUG_DMA */
 
@@ -220,6 +701,55 @@ void lpc43_dmasample(DMA_HANDLE handle, struct lpc43_dmaregs_s *regs)
 #ifdef CONFIG_DEBUG_DMA
 void lpc43_dmadump(DMA_HANDLE handle, const struct lpc43_dmaregs_s *regs, const char *msg)
 {
+  struct lpc43_dmach_s *dmach = (DMA_HANDLE)handle;
+  uint32_t base;
+
+  DEBUGASSERT(dmach);
+
+  /* Dump the sampled global DMA registers */
+
+  dmainfo("Global GPDMA Registers: %s\n", msg);
+  dmainfo("       INTST[%08x]: %08x\n",
+          LPC43_GPDMA_INTSTAT, regs->gbl.intst);
+  dmainfo("     INTTCSTAT[%08x]: %08x\n",
+          LPC43_GPDMA_INTTCSTAT, regs->gbl.inttcst);
+  dmainfo("    INTERRSTAT[%08x]: %08x\n",
+          LPC43_GPDMA_INTERRSTAT, regs->gbl.interrst);
+  dmainfo("  RAWINTTCSTAT[%08x]: %08x\n",
+          LPC43_GPDMA_RAWINTTCSTAT, regs->gbl.rawinttcst);
+  dmainfo(" RAWINTERRSTAT[%08x]: %08x\n",
+          LPC43_GPDMA_RAWINTERRSTAT, regs->gbl.rawinterrst);
+  dmainfo("   ENBLDCHNS[%08x]: %08x\n",
+          LPC43_GPDMA_ENBLDCHNS, regs->gbl.enbldchns);
+  dmainfo("    SOFTBREQ[%08x]: %08x\n",
+          LPC43_GPDMA_SOFTBREQ, regs->gbl.softbreq);
+  dmainfo("    SOFTSREQ[%08x]: %08x\n",
+          LPC43_GPDMA_SOFTSREQ, regs->gbl.softsreq);
+  dmainfo("   SOFTLBREQ[%08x]: %08x\n",
+          LPC43_GPDMA_SOFTLBREQ, regs->gbl.softlbreq);
+  dmainfo("   SOFTLSREQ[%08x]: %08x\n",
+          LPC43_GPDMA_SOFTLSREQ, regs->gbl.softlsreq);
+  dmainfo("      CONFIG[%08x]: %08x\n",
+          LPC43_GPDMA_GLOBAL_CONFIG, regs->gbl.config);
+  dmainfo("        SYNC[%08x]: %08x\n",
+          LPC43_GPDMA_SYNC, regs->gbl.sync);
+
+  /* Dump the DMA channel registers */
+
+  base = LPC43_GPDMA_CHANNEL((uint32_t)dmach->chn);
+
+  dmainfo("Channel GPDMA Registers: %d\n", dmach->chn);
+
+  dmainfo("     SRCADDR[%08x]: %08x\n",
+          base + LPC43_GPDMA_SRCADDR_CHOFFSET, regs->ch.srcaddr);
+  dmainfo("    DESTADDR[%08x]: %08x\n",
+          base + LPC43_GPDMA_DESTADDR_CHOFFSET, regs->ch.destaddr);
+  dmainfo("         LLI[%08x]: %08x\n",
+          base + LPC43_GPDMA_LLI_CHOFFSET, regs->ch.lli);
+  dmainfo("     CONTROL[%08x]: %08x\n",
+          base + LPC43_GPDMA_CONTROL_CHOFFSET, regs->ch.control);
+  dmainfo("      CONFIG[%08x]: %08x\n",
+          base + LPC43_GPDMA_CONFIG_CHOFFSET, regs->ch.config);
 }
 #endif /* CONFIG_DEBUG_DMA */
 
diff --git a/arch/arm/src/lpc43xx/lpc43_gpio.c b/arch/arm/src/lpc43xx/lpc43_gpio.c
index 3d5db11b7e49646dad43ba004812e808f0812298..783c66c0605a2de6a99780852e2002574129abdb 100644
--- a/arch/arm/src/lpc43xx/lpc43_gpio.c
+++ b/arch/arm/src/lpc43xx/lpc43_gpio.c
@@ -49,6 +49,10 @@
 #include "up_arch.h"
 #include "lpc43_gpio.h"
 
+#ifdef CONFIG_LPC43_GPIO_IRQ
+#include "lpc43_gpioint.h"
+#endif
+
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
@@ -181,20 +185,20 @@ int lpc43_gpio_config(uint16_t gpiocfg)
 
       case GPIO_MODE_PININTR:    /* GPIO pin interrupt */
         lpc43_configinput(gpiocfg, port, pin);
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC43_GPIO_IRQ
         ret = lpc43_gpioint_pinconfig(gpiocfg);
 #endif
         break;
 
       case GPIO_MODE_GRPINTR:    /* GPIO group interrupt */
         lpc43_configinput(gpiocfg, port, pin);
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC43_GPIO_IRQ
         ret = lpc43_gpioint_grpconfig(gpiocfg);
 #endif
         break;
 
       default :
-        sdbg("ERROR: Unrecognized pin mode: %04x\n", gpiocfg);
+        serr("ERROR: Unrecognized pin mode: %04x\n", gpiocfg);
         ret = -EINVAL;
         break;
     }
diff --git a/arch/arm/src/lpc43xx/lpc43_gpio.h b/arch/arm/src/lpc43xx/lpc43_gpio.h
index 1ee14fac6395d20f41291c07e3bf0c0fa0af1523..24a492beaed8d0f3851258de97427215111ca541 100644
--- a/arch/arm/src/lpc43xx/lpc43_gpio.h
+++ b/arch/arm/src/lpc43xx/lpc43_gpio.h
@@ -143,7 +143,7 @@
  * ..CC C... .... ....
  */
 
-#define GPIO_PININT_SHIFT          (10)        /* Bits 11-13: Pin interrupt number */
+#define GPIO_PININT_SHIFT          (11)        /* Bits 11-13: Pin interrupt number */
 #define GPIO_PININT_MASK           (7 << GPIO_PININT_SHIFT)
 #  define GPIO_PININT0             (0 << GPIO_PININT_SHIFT)
 #  define GPIO_PININT1             (1 << GPIO_PININT_SHIFT)
@@ -162,9 +162,9 @@
  * .... .III .... ....
  */
 
-#define _GPIO_INT_LEVEL            (1 << 10)  /* Bit 10: 1=Level (vs edge) */
-#define _GPIO_INT_HIGH             (1 << 9)   /* Bit 9:  1=High level or rising edge */
-#define _GPIO_INT_LOW              (1 << 8)   /* Bit 8:  1=Low level or falling edge */
+#define _GPIO_INT_EDGE             (1 << 10)  /* Bit 10: 1=Edge (vs level) */
+#define _GPIO_INT_LOW              (1 << 9)   /* Bit 9:  1=Low level or falling edge */
+#define _GPIO_INT_HIGH             (1 << 8)   /* Bit 8:  1=High level or rising edge */
 
 #define GPIO_INT_SHIFT             (8)        /* Bits 8-10: Interrupt mode */
 #define GPIO_INT_MASK              (7 << GPIO_INT_SHIFT)
@@ -176,8 +176,8 @@
 
 #define GPIO_IS_ACTIVE_HI(p)       (((p) & _GPIO_INT_HIGH)  != 0)
 #define GPIO_IS_ACTIVE_LOW(p)      (((p) & _GPIO_INT_LOW)   != 0)
-#define GPIO_IS_EDGE(p)            (((p) & _GPIO_INT_LEVEL) == 0)
-#define GPIO_IS_LEVEL(p)           (((p) & _GPIO_INT_LEVEL) != 0)
+#define GPIO_IS_LEVEL(p)           (((p) & _GPIO_INT_EDGE) == 0)
+#define GPIO_IS_EDGE(p)            (((p) & _GPIO_INT_EDGE) != 0)
 
 /* GPIO Port Number:
  *
@@ -310,7 +310,7 @@ bool lpc43_gpio_read(uint16_t gpiocfg);
  *
  ********************************************************************************************/
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 int lpc43_gpio_dump(uint16_t gpiocfg, const char *msg);
 #else
 #  define lpc43_gpio_dump(p,m)
diff --git a/arch/arm/src/lpc43xx/lpc43_gpioint.c b/arch/arm/src/lpc43xx/lpc43_gpioint.c
index 51e010ba33042ae3349628df7f6000fe27cf55fe..e8726420c15118fa2309e9d6dbc82e866e3ded57 100644
--- a/arch/arm/src/lpc43xx/lpc43_gpioint.c
+++ b/arch/arm/src/lpc43xx/lpc43_gpioint.c
@@ -57,6 +57,7 @@
 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -70,7 +71,7 @@
 #include "lpc43_gpio.h"
 #include "lpc43_gpioint.h"
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC43_GPIO_IRQ
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -176,10 +177,13 @@ int lpc43_gpioint_grpinitialize(int group, bool anded, bool level)
 int lpc43_gpioint_pinconfig(uint16_t gpiocfg)
 {
   unsigned int port    = ((gpiocfg & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT);
-  unsigned int pin     = ((gpiocfg & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT);
+  unsigned int pin     = ((gpiocfg & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT);
   unsigned int pinint  = ((gpiocfg & GPIO_PININT_MASK) >> GPIO_PININT_SHIFT);
   uint32_t     bitmask = (1 << pinint);
-  uint32_t     regval;
+  uint32_t     pinsel;
+  uint32_t     isel;
+  uint32_t     einr;
+  uint32_t     einf;
 
   DEBUGASSERT(port < NUM_GPIO_PORTS && pin < NUM_GPIO_PINS && GPIO_IS_PININT(gpiocfg));
 
@@ -196,62 +200,69 @@ int lpc43_gpioint_pinconfig(uint16_t gpiocfg)
 
   if (pinint < 4)
     {
-      regval = getreg32(LPC43_SCU_PINTSEL0);
-      regval &= ~SCU_PINTSEL0_MASK(pinint);
-      regval |= ((pin  << SCU_PINTSEL0_INTPIN_SHIFT(pinint)) |
+      pinsel  = getreg32(LPC43_SCU_PINTSEL0);
+      pinsel &= ~SCU_PINTSEL0_MASK(pinint);
+      pinsel |= ((pin  << SCU_PINTSEL0_INTPIN_SHIFT(pinint)) |
                  (port << SCU_PINTSEL0_PORTSEL_SHIFT(pinint)));
-      putreg32(regval, LPC43_SCU_PINTSEL0);
+      putreg32(pinsel, LPC43_SCU_PINTSEL0);
     }
   else
     {
-      regval = getreg32(LPC43_SCU_PINTSEL1);
-      regval &= ~SCU_PINTSEL1_MASK(pinint);
-      regval |= ((pin  << SCU_PINTSEL1_INTPIN_SHIFT(pinint)) |
+      pinsel  = getreg32(LPC43_SCU_PINTSEL1);
+      pinsel &= ~SCU_PINTSEL1_MASK(pinint);
+      pinsel |= ((pin  << SCU_PINTSEL1_INTPIN_SHIFT(pinint)) |
                  (port << SCU_PINTSEL1_PORTSEL_SHIFT(pinint)));
-      putreg32(regval, LPC43_SCU_PINTSEL1);
-    }
-
-  /* Set level or edge sensitive */
-
-  regval = getreg32(LPC43_GPIOINT_ISEL);
-  if (GPIO_IS_LEVEL(gpiocfg))
-    {
-      regval |= bitmask;
-    }
-  else
-    {
-      regval &= ~bitmask;
+      putreg32(pinsel, LPC43_SCU_PINTSEL1);
     }
 
-  putreg32(regval, LPC43_GPIOINT_ISEL);
+  /* Configure the active level or rising/falling edge
+   *
+   *   ISEL
+   *     0 = Edge sensitive
+   *     1 = Level sensitive
+   *   EINR 0-7:
+   *     0 = Disable rising edge or level interrupt.
+   *     1 = Enable rising edge or level interrupt.
+   *   EINF 0-7:
+   *     0 = Disable falling edge interrupt or set active interrupt level
+   *         LOW.
+   *     1 = Enable falling edge interrupt enabled or set active interrupt
+   *         level HIGH
+   */
 
-  /* Configure the active high level or rising edge */
+  isel  = getreg32(LPC43_GPIOINT_ISEL) & ~bitmask;
+  einr  = getreg32(LPC43_GPIOINT_IENR) & ~bitmask;
+  einf  = getreg32(LPC43_GPIOINT_IENF) & ~bitmask;
 
-  regval = getreg32(LPC43_GPIOINT_IENR);
-  if (GPIO_IS_ACTIVE_HI(gpiocfg))
-    {
-      regval |= bitmask;
-    }
-  else
+  switch (gpiocfg & GPIO_INT_MASK)
     {
-      regval &= ~bitmask;
+      case GPIO_INT_LEVEL_HI:
+        einf |= bitmask;  /* Enable active level HI */
+      case GPIO_INT_LEVEL_LOW:
+        isel |= bitmask;  /* Level sensitive */
+        einr |= bitmask;  /* Enable level interrupt */
+        break;
+
+      case GPIO_INT_EDGE_RISING:
+        einr |= bitmask;  /* Enable rising edge interrupt */
+        break;
+
+      case GPIO_INT_EDGE_BOTH:
+        einr |= bitmask;  /* Enable rising edge interrupt */
+      case GPIO_INT_EDGE_FALLING:
+        einf |= bitmask;  /* Enable falling edge interrupt */
+        break;
+
+      /* Default is edge sensitive but with both edges disabled. */
+
+      default:
+        break;
     }
 
-  putreg32(regval, LPC43_GPIOINT_IENR);
-
-  /* Configure the active high low or falling edge */
-
-  regval = getreg32(LPC43_GPIOINT_IENF);
-  if (GPIO_IS_ACTIVE_LOW(gpiocfg))
-    {
-      regval |= bitmask;
-    }
-  else
-    {
-      regval &= ~bitmask;
-    }
+  putreg32(isel, LPC43_GPIOINT_ISEL);
+  putreg32(einr, LPC43_GPIOINT_IENR);
+  putreg32(einf, LPC43_GPIOINT_IENF);
 
-  putreg32(regval, LPC43_GPIOINT_IENF);
   return OK;
 }
 
@@ -321,4 +332,29 @@ int lpc43_gpioint_grpconfig(uint16_t gpiocfg)
   return OK;
 }
 
-#endif /* CONFIG_GPIO_IRQ */
+/****************************************************************************
+ * Name: lpc43_gpioint_ack
+ *
+ * Description:
+ *   Acknowledge the interrupt for a given pint interrupt number. Call this
+ *   inside the interrupt handler. For edge sensitive interrupts, the interrupt
+ *   status is cleared. For level sensitive interrupts, the active-high/-low
+ *   sensitivity is inverted.
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int lpc43_gpioint_ack(uint8_t intnumber)
+{
+  uint32_t regval;
+
+  regval  = getreg32(LPC43_GPIOINT_IST);
+  regval |= (1 << intnumber);
+  putreg32(regval, LPC43_GPIOINT_IST);
+
+  return OK;
+}
+
+#endif /* CONFIG_LPC43_GPIO_IRQ */
diff --git a/arch/arm/src/lpc43xx/lpc43_gpioint.h b/arch/arm/src/lpc43xx/lpc43_gpioint.h
index 35b22f7c7f27abd6e150a1e552bf1787308c184d..ae479f83c67a2e74e75dc7d4fe1f14b9975b20a7 100644
--- a/arch/arm/src/lpc43xx/lpc43_gpioint.h
+++ b/arch/arm/src/lpc43xx/lpc43_gpioint.h
@@ -1,7 +1,7 @@
-/************************************************************************************
+/****************************************************************************
  * arch/arm/src/lpc43xx/lpc43_gpioint.h
  *
- *   Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -31,7 +31,8 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ************************************************************************************/
+ ****************************************************************************/
+
 /* GPIO pin interrupts
  *
  * From all available GPIO pins, up to eight pins can be selected in the system
@@ -52,31 +53,19 @@
 #ifndef __ARCH_ARM_SRC_LPC43XX_LPC43_GPIOINT_H
 #define __ARCH_ARM_SRC_LPC43XX_LPC43_GPIOINT_H
 
-/************************************************************************************
+/****************************************************************************
  * Included Files
- ************************************************************************************/
+ ****************************************************************************/
 
 #include 
 #include "chip.h"
 #include "chip/lpc43_gpio.h"
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC43_GPIO_IRQ
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/************************************************************************************
- * Public Types
- ************************************************************************************/
-
-/************************************************************************************
- * Public Data
- ************************************************************************************/
-
-/************************************************************************************
- * Public Functions
- ************************************************************************************/
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
 
 /****************************************************************************
  * Name: lpc43_gpioint_grpinitialize
@@ -136,5 +125,21 @@ int lpc43_gpioint_pinconfig(uint16_t gpiocfg);
 
 int lpc43_gpioint_grpconfig(uint16_t gpiocfg);
 
-#endif /* CONFIG_GPIO_IRQ */
+/****************************************************************************
+ * Name: lpc43_gpioint_ack
+ *
+ * Description:
+ *   Acknowledge the interrupt for a given pint interrupt number. Call this
+ *   inside the interrupt handler. For edge sensitive interrupts, the interrupt
+ *   status is cleared. For level sensitive interrupts, the active-high/-low
+ *   sensitivity is inverted.
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int lpc43_gpioint_ack(uint8_t intnumber);
+
+#endif /* CONFIG_LPC43_GPIO_IRQ */
 #endif /* __ARCH_ARM_SRC_LPC43XX_LPC43_GPIOINT_H */
diff --git a/arch/arm/src/lpc43xx/lpc43_i2c.c b/arch/arm/src/lpc43xx/lpc43_i2c.c
index a7ddfa4726cbf0f43a9aa4137269b2d353c8c87d..fc0a25d1f154c36ffb2980e939be53eb010d8c3d 100644
--- a/arch/arm/src/lpc43xx/lpc43_i2c.c
+++ b/arch/arm/src/lpc43xx/lpc43_i2c.c
@@ -62,6 +62,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -129,7 +130,7 @@ static struct lpc43_i2cdev_s g_i2c1dev;
 
 static int  lpc43_i2c_start(struct lpc43_i2cdev_s *priv);
 static void lpc43_i2c_stop(struct lpc43_i2cdev_s *priv);
-static int  lpc43_i2c_interrupt(int irq, FAR void *context);
+static int  lpc43_i2c_interrupt(int irq, FAR void *context, FAR void *arg);
 static void lpc43_i2c_timeout(int argc, uint32_t arg, ...);
 static void lpc43_i2c_setfrequency(struct lpc43_i2cdev_s *priv,
               uint32_t frequency);
@@ -276,29 +277,13 @@ void lpc32_i2c_nextmsg(struct lpc43_i2cdev_s *priv)
  *
  ****************************************************************************/
 
-static int lpc43_i2c_interrupt(int irq, FAR void *context)
+static int lpc43_i2c_interrupt(int irq, FAR void *context, FAR void *arg)
 {
-  struct lpc43_i2cdev_s *priv;
+  struct lpc43_i2cdev_s *priv = (struct lpc43_i2cdev_s *)arg;
   struct i2c_msg_s *msg;
   uint32_t state;
 
-#ifdef CONFIG_LPC43_I2C0
-  if (irq == LPC43M0_IRQ_I2C0)
-    {
-      priv = &g_i2c0dev;
-    }
-  else
-#endif
-#ifdef CONFIG_LPC43_I2C1
-  if (irq == LPC43_IRQ_I2C1)
-    {
-      priv = &g_i2c1dev;
-    }
-    else
-#endif
-    {
-      PANIC();
-    }
+  DEBUGASSERT(priv != NULL);
 
   /* Reference UM10360 19.10.5 */
 
@@ -464,7 +449,7 @@ struct i2c_master_s *lpc43_i2cbus_initialize(int port)
 
   if (port > 1)
     {
-      dbg("lpc I2C Only support 0,1\n");
+      i2cerr("ERROR: lpc I2C Only suppors ports 0 and 1\n");
       return NULL;
     }
 
@@ -478,7 +463,7 @@ struct i2c_master_s *lpc43_i2cbus_initialize(int port)
     {
       priv           = &g_i2c0dev;
       priv->base     = LPC43_I2C0_BASE;
-      priv->irqid    = LPC43M0_IRQ_I2C0;
+      priv->irqid    = LPC43M4_IRQ_I2C0;
       priv->baseFreq = BOARD_ABP1_FREQUENCY;
 
       /* Enable, set mode */
@@ -511,7 +496,7 @@ struct i2c_master_s *lpc43_i2cbus_initialize(int port)
     {
       priv        = &g_i2c1dev;
       priv->base  = LPC43_I2C1_BASE;
-      priv->irqid = LPC43M0_IRQ_I2C1;
+      priv->irqid = LPC43M4_IRQ_I2C1;
       priv->baseFreq = BOARD_ABP3_FREQUENCY;
 
       /* No need to enable */
@@ -539,9 +524,17 @@ struct i2c_master_s *lpc43_i2cbus_initialize(int port)
 
   putreg32(I2C_CONSET_I2EN, priv->base + LPC43_I2C_CONSET_OFFSET);
 
+  /* Initialize semaphores */
+
   sem_init(&priv->mutex, 0, 1);
   sem_init(&priv->wait, 0, 0);
 
+  /* The wait semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->wait, SEM_PRIO_NONE);
+
   /* Allocate a watchdog timer */
 
   priv->timeout = wd_create();
@@ -549,7 +542,7 @@ struct i2c_master_s *lpc43_i2cbus_initialize(int port)
 
   /* Attach Interrupt Handler */
 
-  irq_attach(priv->irqid, lpc43_i2c_interrupt);
+  irq_attach(priv->irqid, lpc43_i2c_interrupt, priv);
 
   /* Enable Interrupt Handler */
 
diff --git a/arch/arm/src/lpc43xx/lpc43_idle.c b/arch/arm/src/lpc43xx/lpc43_idle.c
index 62f665495e01bd3c1fddad91f2278912e347b362..5cc38b16f5facbdea98eef7a1e239bb284f4de52 100644
--- a/arch/arm/src/lpc43xx/lpc43_idle.c
+++ b/arch/arm/src/lpc43xx/lpc43_idle.c
@@ -98,7 +98,7 @@ static void up_idlepm(void)
 
       /* Perform board-specific, state-dependent logic here */
 
-      llvdbg("newstate= %d oldstate=%d\n", newstate, oldstate);
+      _info("newstate= %d oldstate=%d\n", newstate, oldstate);
 
       /* Then force the global state change */
 
diff --git a/arch/arm/src/lpc43xx/lpc43_irq.c b/arch/arm/src/lpc43xx/lpc43_irq.c
index a6e54b51f04c12ac917dcc400325d1e8d4ca8fd8..d51a8e48f71eaf0b54cfb13493519e2e906ccd67 100644
--- a/arch/arm/src/lpc43xx/lpc43_irq.c
+++ b/arch/arm/src/lpc43xx/lpc43_irq.c
@@ -91,10 +91,6 @@ volatile uint32_t *g_current_regs[1];
 
 extern uint32_t _vectors[];
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -107,37 +103,39 @@ extern uint32_t _vectors[];
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_IRQ)
+#if defined(CONFIG_DEBUG_IRQ_INFO)
 static void lpc43_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = enter_critical_section();
-  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  lldbg("  INTCTRL:    %08x VECTAB: %08x\n",
-        getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
+
+  irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
+  irqinfo("  INTCTRL:    %08x VECTAB: %08x\n",
+          getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
 #if 0
-  lldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
-        getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
-        getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+  irqinfo("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+          getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
+          getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
 #endif
-  lldbg("  IRQ ENABLE: %08x %08x\n",
-        getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE));
-  lldbg("  SYSH_PRIO:  %08x %08x %08x\n",
-        getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
-        getreg32(NVIC_SYSH12_15_PRIORITY));
-  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
-        getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
-        getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
-        getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
-  lldbg("              %08x %08x %08x\n",
-        getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
-        getreg32(NVIC_IRQ56_59_PRIORITY));
+  irqinfo("  IRQ ENABLE: %08x %08x\n",
+          getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE));
+  irqinfo("  SYSH_PRIO:  %08x %08x %08x\n",
+          getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+          getreg32(NVIC_SYSH12_15_PRIORITY));
+  irqinfo("  IRQ PRIO:   %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
+          getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
+          getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
+          getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+  irqinfo("              %08x %08x %08x\n",
+          getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
+          getreg32(NVIC_IRQ56_59_PRIORITY));
+
   leave_critical_section(flags);
 }
 #else
@@ -155,51 +153,51 @@ static void lpc43_dumpnvic(const char *msg, int irq)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
-static int lpc43_nmi(int irq, FAR void *context)
+#ifdef CONFIG_DEBUG_FEATURES
+static int lpc43_nmi(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! NMI received\n");
+  _err("PANIC!!! NMI received\n");
   PANIC();
   return 0;
 }
 
-static int lpc43_busfault(int irq, FAR void *context)
+static int lpc43_busfault(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Bus fault recived\n");
+  _err("PANIC!!! Bus fault recived\n");
   PANIC();
   return 0;
 }
 
-static int lpc43_usagefault(int irq, FAR void *context)
+static int lpc43_usagefault(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Usage fault received\n");
+  _err("PANIC!!! Usage fault received\n");
   PANIC();
   return 0;
 }
 
-static int lpc43_pendsv(int irq, FAR void *context)
+static int lpc43_pendsv(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! PendSV received\n");
+  _err("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
 }
 
-static int lpc43_dbgmonitor(int irq, FAR void *context)
+static int lpc43_dbgmonitor(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Debug Monitor received\n");
+  _err("PANIC!!! Debug Monitor received\n");
   PANIC();
   return 0;
 }
 
-static int lpc43_reserved(int irq, FAR void *context)
+static int lpc43_reserved(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Reserved interrupt\n");
+  _err("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;
 }
@@ -240,53 +238,17 @@ static inline void lpc43_prioritize_syscall(int priority)
 static int lpc43_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
                          uintptr_t offset)
 {
+  int n;
+
   DEBUGASSERT(irq >= LPC43_IRQ_NMI && irq < NR_IRQS);
 
   /* Check for external interrupt */
 
   if (irq >= LPC43_IRQ_EXTINT)
     {
-      /* NOTE: We assume that there are at least 32 interrupts */
-
-      if (irq < (LPC43_IRQ_EXTINT + 32))
-        {
-           /* Interrupt in range {0-31} */
-
-           *regaddr = (NVIC_IRQ0_31_ENABLE + offset);
-           *bit     = 1 << (irq - LPC43_IRQ_EXTINT);
-        }
-#if LPC43M4_IRQ_NEXTINT > 95
-#  error Extension to interrupt logic needed
-#elif LPC43M4_IRQ_NEXTINT > 63
-      else if (irq < (LPC43_IRQ_EXTINT + 64))
-        {
-           /* Interrupt in range {32-63} */
-
-           *regaddr = (NVIC_IRQ32_63_ENABLE + offset);
-           *bit     = 1 << (irq - LPC43_IRQ_EXTINT - 32);
-        }
-      else if (irq < LPC43M4_IRQ_NIRQS)
-        {
-           /* Interrupt in range {64-LPC43M4_IRQ_NIRQS}, LPC43M4_IRQ_NIRQS <= 95 */
-
-           *regaddr = (NVIC_IRQ64_95_ENABLE + offset);
-           *bit     = 1 << (irq - LPC43_IRQ_EXTINT - 64);
-        }
-#else /* if LPC43M4_IRQ_NEXTINT > 31 */
-      else if (irq < LPC43M4_IRQ_NIRQS)
-        {
-           /* Interrupt in range {32-LPC43M4_IRQ_NIRQS}, LPC43M4_IRQ_NIRQS <= 63 */
-
-           *regaddr = (NVIC_IRQ32_63_ENABLE + offset);
-           *bit     = 1 << (irq - LPC43_IRQ_EXTINT - 32);
-        }
-#endif
-      else
-        {
-           /* Interrupt >= LPC43M4_IRQ_NIRQS */
-
-          return ERROR; /* Invalid interrupt */
-        }
+      n        = irq - LPC43_IRQ_EXTINT;
+      *regaddr = NVIC_IRQ_ENABLE(n) + offset;
+      *bit     = (uint32_t)1 << (n & 0x1f);
     }
 
   /* Handle processor exceptions.  Only a few can be disabled */
@@ -336,20 +298,18 @@ static int lpc43_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
 void up_irqinitialize(void)
 {
   uint32_t regaddr;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   uint32_t regval;
 #endif
   int num_priority_registers;
+  int i;
 
   /* Disable all interrupts */
 
-  putreg32(0, NVIC_IRQ0_31_ENABLE);
-#if LPC43M4_IRQ_NEXTINT > 31
-  putreg32(0, NVIC_IRQ32_63_ENABLE);
-#if LPC43M4_IRQ_NEXTINT > 63
-  putreg32(0, NVIC_IRQ64_95_ENABLE);
-#endif
-#endif
+  for (i = 0; i < LPC43M4_IRQ_NEXTINT; i += 32)
+    {
+      putreg32(0xffffffff, NVIC_IRQ_CLEAR(i));
+    }
 
   /* Make sure that we are using the correct vector table.  The default
    * vector address is 0x0000:0000 but if we are executing code that is
@@ -404,8 +364,8 @@ void up_irqinitialize(void)
    * under certain conditions.
    */
 
-  irq_attach(LPC43_IRQ_SVCALL, up_svcall);
-  irq_attach(LPC43_IRQ_HARDFAULT, up_hardfault);
+  irq_attach(LPC43_IRQ_SVCALL, up_svcall, NULL);
+  irq_attach(LPC43_IRQ_HARDFAULT, up_hardfault, NULL);
 
   /* Set the priority of the SVCall interrupt */
 
@@ -421,22 +381,22 @@ void up_irqinitialize(void)
    */
 
 #ifdef CONFIG_ARM_MPU
-  irq_attach(LPC43_IRQ_MEMFAULT, up_memfault);
+  irq_attach(LPC43_IRQ_MEMFAULT, up_memfault, NULL);
   up_enable_irq(LPC43_IRQ_MEMFAULT);
 #endif
 
   /* Attach all other processor exceptions (except reset and sys tick) */
 
-#ifdef CONFIG_DEBUG
-  irq_attach(LPC43_IRQ_NMI, lpc43_nmi);
+#ifdef CONFIG_DEBUG_FEATURES
+  irq_attach(LPC43_IRQ_NMI, lpc43_nmi, NULL);
 #ifndef CONFIG_ARM_MPU
-  irq_attach(LPC43_IRQ_MEMFAULT, up_memfault);
+  irq_attach(LPC43_IRQ_MEMFAULT, up_memfault, NULL);
 #endif
-  irq_attach(LPC43_IRQ_BUSFAULT, lpc43_busfault);
-  irq_attach(LPC43_IRQ_USAGEFAULT, lpc43_usagefault);
-  irq_attach(LPC43_IRQ_PENDSV, lpc43_pendsv);
-  irq_attach(LPC43_IRQ_DBGMONITOR, lpc43_dbgmonitor);
-  irq_attach(LPC43_IRQ_RESERVED, lpc43_reserved);
+  irq_attach(LPC43_IRQ_BUSFAULT, lpc43_busfault, NULL);
+  irq_attach(LPC43_IRQ_USAGEFAULT, lpc43_usagefault, NULL);
+  irq_attach(LPC43_IRQ_PENDSV, lpc43_pendsv, NULL);
+  irq_attach(LPC43_IRQ_DBGMONITOR, lpc43_dbgmonitor, NULL);
+  irq_attach(LPC43_IRQ_RESERVED, lpc43_reserved, NULL);
 #endif
 
   lpc43_dumpnvic("initial", LPC43M4_IRQ_NIRQS);
@@ -446,7 +406,7 @@ void up_irqinitialize(void)
    * operation.
    */
 
-#if defined(CONFIG_DEBUG) && !defined(CONFIG_ARMV7M_USEBASEPRI)
+#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV7M_USEBASEPRI)
   regval  = getreg32(NVIC_DEMCR);
   regval &= ~NVIC_DEMCR_VCHARDERR;
   putreg32(regval, NVIC_DEMCR);
diff --git a/arch/arm/src/lpc43xx/lpc43_pinconfig.h b/arch/arm/src/lpc43xx/lpc43_pinconfig.h
index dad885d86bd52050605ed24abd7df00322dde0e7..d3a8a822a6a0d70e11621cfdf5bf9e78872c5bdb 100644
--- a/arch/arm/src/lpc43xx/lpc43_pinconfig.h
+++ b/arch/arm/src/lpc43xx/lpc43_pinconfig.h
@@ -54,11 +54,11 @@
  * following definitions provide the bit encoding that is used to define a pin configuration.
  * Note that these pins do not corresponding GPIO ports and pins.
  *
- * 20-bit Encoding:
+ * 21-bit Encoding:
  * 1111 1111 1100 0000 0000
  * 9876 5432 1098 7654 3210
  * ---- ---- ---- ---- ----
- * .FFF UUDD IGWS SSSP PPPP
+ * FFFU UDDI GWSS SSSP PPPP
  */
 
 /* Alternate function number:
@@ -66,10 +66,10 @@
  * 1111 1111 1100 0000 0000
  * 9876 5432 1098 7654 3210
  * ---- ---- ---- ---- ----
- * .FFF .... .... .... ....
+ * FFF. .... .... .... ....
  */
 
-#define PINCONF_FUNC_SHIFT            (16)       /* Bits 16-18: Alternate function number */
+#define PINCONF_FUNC_SHIFT            (17)       /* Bits 16-18: Alternate function number */
 #define PINCONF_FUNC_MASK             (7 << PINCONF_FUNC_SHIFT)
 #  define PINCONF_FUNC(n)             ((n) << PINCONF_FUNC_SHIFT)
 #  define PINCONF_FUNC0               (0 << PINCONF_FUNC_SHIFT)
@@ -87,12 +87,12 @@
  * 1111 1111 1100 0000 0000
  * 9876 5432 1098 7654 3210
  * ---- ---- ---- ---- ----
- * .... UU.. .... .... ....
+ * ...U U... .... .... ....
  */
 
-#define PINCONF_PULLUP                (1 << 15) /* Bit 15: 1=Pull-up */
-#define PINCONF_PULLDOWN              (1 << 14) /* Bit 14: 1=Pull-down */
-#define PINCONF_FLOAT                 (0)       /* Bit 14-15=0 if neither */
+#define PINCONF_PULLUP                (1 << 16) /* Bit 16: 1=Pull-up */
+#define PINCONF_PULLDOWN              (1 << 15) /* Bit 15: 1=Pull-down */
+#define PINCONF_FLOAT                 (0)       /* Bit 15-16=0 if neither */
 
 #define PINCONF_IS_PULLUP(p)          (((p) & PINCONF_PULLUP) != 0)
 #define PINCONF_IS_PULLDOWN(p)        (((p) & PINCONF_PULLDOWN) != 0)
@@ -103,10 +103,10 @@
  * 1111 1111 1100 0000 0000
  * 9876 5432 1098 7654 3210
  * ---- ---- ---- ---- ----
- * .... ..DD .... .... ....
+ * .... .DD. .... .... ....
  */
 
-#define PINCONF_DRIVE_SHIFT           (12)       /* Bits 12-13 = Pin drive strength */
+#define PINCONF_DRIVE_SHIFT           (13)       /* Bits 12-13 = Pin drive strength */
 #define PINCONF_DRIVE_MASK            (3 << PINCONF_DRIVE_SHIFT)
 #  define PINCONF_DRIVE_NORMAL        (0 << PINCONF_DRIVE_SHIFT)
 #  define PINCONF_DRIVE_MEDIUM        (1 << PINCONF_DRIVE_SHIFT)
@@ -118,10 +118,10 @@
  * 1111 1111 1100 0000 0000
  * 9876 5432 1098 7654 3210
  * ---- ---- ---- ---- ----
- * .... .... I... .... ....
+ * .... ...I .... .... ....
  */
 
-#define PINCONF_INBUFFER              (1 << 11)  /* Bit 11: 1=Enabled input buffer */
+#define PINCONF_INBUFFER              (1 << 12)  /* Bit 11: 1=Enabled input buffer */
 #define PINCONF_INBUFFER_ENABLED(p)   (((p) & PINCONF_INBUFFER) != 0)
 
 /* Glitch filter enable
@@ -129,10 +129,10 @@
  * 1111 1111 1100 0000 0000
  * 9876 5432 1098 7654 3210
  * ---- ---- ---- ---- ----
- * .... .... .G.. .... ....
+ * .... .... G... .... ....
  */
 
-#define PINCONF_GLITCH                (1 << 10)  /* Bit 10: 1=Glitch filter enable */
+#define PINCONF_GLITCH                (1 << 11)  /* Bit 10: 1=Glitch filter enable */
 #define PINCONF_GLITCH_ENABLE(p)      (((p) & PINCONF_GLITCH) == 0)
 
 /* Slew rate
@@ -140,10 +140,10 @@
  * 1111 1111 1100 0000 0000
  * 9876 5432 1098 7654 3210
  * ---- ---- ---- ---- ----
- * .... .... ..W. .... ....
+ * .... .... .W.. .... ....
  */
 
-#define PINCONF_SLEW_FAST             (1 << 9)   /* Bit 9: 1=Alternate function */
+#define PINCONF_SLEW_FAST             (1 << 10)   /* Bit 9: 1=Alternate function */
 #define PINCONF_SLEW_SLOW             (0)        /* Bit 9: 0=Normal function */
 
 #define PINCONF_IS_SLEW_FAST(p)       (((p) & PINCONF_SLEW_FAST) != 0)
@@ -154,11 +154,11 @@
  * 1111 1111 1100 0000 0000
  * 9876 5432 1098 7654 3210
  * ---- ---- ---- ---- ----
- * .... .... ...S SSS. ....
+ * .... .... ..SS SSS. ....
  */
 
-#define PINCONF_PINS_SHIFT            (5)        /* Bits 5-8: Pin set */
-#define PINCONF_PINS_MASK             (15 << PINCONF_PINS_SHIFT)
+#define PINCONF_PINS_SHIFT            (5)        /* Bits 5-9: Pin set */
+#define PINCONF_PINS_MASK             (31 << PINCONF_PINS_SHIFT)
 #  define PINCONF_PINS0               (0 << PINCONF_PINS_SHIFT)
 #  define PINCONF_PINS1               (1 << PINCONF_PINS_SHIFT)
 #  define PINCONF_PINS2               (2 << PINCONF_PINS_SHIFT)
@@ -175,6 +175,22 @@
 #  define PINCONF_PINSD               (13 << PINCONF_PINS_SHIFT)
 #  define PINCONF_PINSE               (14 << PINCONF_PINS_SHIFT)
 #  define PINCONF_PINSF               (15 << PINCONF_PINS_SHIFT)
+#  define PINCONF_PINSG               (16 << PINCONF_PINS_SHIFT) /* Reserved */
+#  define PINCONF_PINSH               (17 << PINCONF_PINS_SHIFT) /* Reserved */
+#  define PINCONF_PINSI               (18 << PINCONF_PINS_SHIFT) /* Reserved */
+#  define PINCONF_PINSJ               (19 << PINCONF_PINS_SHIFT) /* Reserved */
+#  define PINCONF_PINSK               (20 << PINCONF_PINS_SHIFT) /* Reserved */
+#  define PINCONF_PINSL               (21 << PINCONF_PINS_SHIFT) /* Reserved */
+#  define PINCONF_PINSM               (22 << PINCONF_PINS_SHIFT) /* Reserved */
+#  define PINCONF_PINSN               (23 << PINCONF_PINS_SHIFT) /* Reserved */
+#  define PINCONF_PINSO               (24 << PINCONF_PINS_SHIFT) /* SFSCLK0 - SFSCLK3 */
+#  define PINCONF_PINSP               (25 << PINCONF_PINS_SHIFT) /* Reserved */
+#  define PINCONF_PINSQ               (26 << PINCONF_PINS_SHIFT) /* Reserved */
+#  define PINCONF_PINSR               (27 << PINCONF_PINS_SHIFT) /* Reserved */
+#  define PINCONF_PINSS               (28 << PINCONF_PINS_SHIFT) /* Reserved */
+#  define PINCONF_PINST               (29 << PINCONF_PINS_SHIFT) /* Reserved */
+#  define PINCONF_PINSU               (30 << PINCONF_PINS_SHIFT) /* Reserved */
+#  define PINCONF_PINSV               (31 << PINCONF_PINS_SHIFT) /* Reserved */
 
 /* Pin numbers:
  *
@@ -264,7 +280,7 @@ int lpc43_pin_config(uint32_t pinconf);
  *
  ********************************************************************************************/
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 int lpc43_pin_dump(uint32_t pinconf, const char *msg);
 #else
 #  define lpc43_pin_dump(p,m)
diff --git a/arch/arm/src/lpc43xx/lpc43_rgu.c b/arch/arm/src/lpc43xx/lpc43_rgu.c
index 9671a4f8a59709f3b672240eeeaa33acb1f5c4f6..799e3c21e65dc5cc79a0d2b548cd9b27d2765cf0 100644
--- a/arch/arm/src/lpc43xx/lpc43_rgu.c
+++ b/arch/arm/src/lpc43xx/lpc43_rgu.c
@@ -75,7 +75,7 @@
  * Description:
  *   Reset as many of the LPC43 peripherals as possible. This is necessary
  *   because the LPC43 does not provide any way of performing a full system
- *   reset under debugger control.  So, if CONFIG_DEBUG is set (indicating
+ *   reset under debugger control.  So, if CONFIG_DEBUG_FEATURES is set (indicating
  *   that a debugger is being used?), the boot logic will call this
  *   function on all restarts.
  *
diff --git a/arch/arm/src/lpc43xx/lpc43_rgu.h b/arch/arm/src/lpc43xx/lpc43_rgu.h
index 2d1604d23a4c3a9b44ce09773c587b1a6c47e75f..f283a9aaf3611d083652eefa8c6c70309cced9fb 100644
--- a/arch/arm/src/lpc43xx/lpc43_rgu.h
+++ b/arch/arm/src/lpc43xx/lpc43_rgu.h
@@ -76,7 +76,7 @@ extern "C"
  * Description:
  *   Reset as many of the LPC43 peripherals as possible. This is necessary
  *   because the LPC43 does not provide any way of performing a full system
- *   reset under debugger control.  So, if CONFIG_DEBUG is set (indicating
+ *   reset under debugger control.  So, if CONFIG_DEBUG_FEATURES is set (indicating
  *   that a debugger is being used?), the boot logic will call this
  *   function on all restarts.
  *
diff --git a/arch/arm/src/lpc43xx/lpc43_rit.c b/arch/arm/src/lpc43xx/lpc43_rit.c
index f80cd550ac052725e44155c8ba45c918c1e5003a..c39e4b7a3830850657be26460f77095de8a53bc1 100644
--- a/arch/arm/src/lpc43xx/lpc43_rit.c
+++ b/arch/arm/src/lpc43xx/lpc43_rit.c
@@ -86,7 +86,7 @@ struct timespec g_ts;
  * Private Functions
  ****************************************************************************/
 
-static int lpc43_RIT_isr(int irq, FAR void *context)
+static int lpc43_RIT_isr(int irq, FAR void *context, FAR void *arg)
 {
   irqstate_t flags;
 
@@ -154,7 +154,7 @@ static inline void lpc43_RIT_timer_stop(void)
  * Public Functions
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t ticks_per_int;
   uint32_t mask_bits = 0;
@@ -166,7 +166,7 @@ void up_timer_initialize(void)
 
   /* Set up the IRQ here */
 
-  irq_attach(LPC43M4_IRQ_RITIMER, lpc43_RIT_isr);
+  irq_attach(LPC43M4_IRQ_RITIMER, lpc43_RIT_isr, NULL);
 
   /* Compute how many seconds per tick we have on the main clock.  If it is
    * 204MHz for example, then there should be about 4.90ns per tick
@@ -201,8 +201,8 @@ void up_timer_initialize(void)
       mask_bits++;
     }
 
-  lldbg("mask_bits = %d, mask = %X, ticks_per_int = %d\r\n",
-        mask_bits, (0xffffffff << (32 - mask_bits)), ticks_per_int);
+  tmrinfo("mask_bits = %d, mask = %X, ticks_per_int = %d\r\n",
+          mask_bits, (0xffffffff << (32 - mask_bits)), ticks_per_int);
 
   /* Set the mask and compare value so we get interrupts every
    * RIT_TIMER_RESOLUTION cycles.
diff --git a/arch/arm/src/lpc43xx/lpc43_rit.h b/arch/arm/src/lpc43xx/lpc43_rit.h
index 3088b8fe115766a99eaef843823e2182d71fd4c0..d8d1fa1e06a0069190cfa86bb8aec3f7992fdb5b 100644
--- a/arch/arm/src/lpc43xx/lpc43_rit.h
+++ b/arch/arm/src/lpc43xx/lpc43_rit.h
@@ -58,8 +58,6 @@
  * Public Functions
  ****************************************************************************/
 
-void up_timer_initialize(void);
-int up_timer_gettime(FAR struct timespec *ts);
 int up_alarm_cancel(FAR struct timespec *ts);
 int up_alarm_start(FAR const struct timespec *ts);
 int up_timer_cancel(FAR struct timespec *ts);
diff --git a/arch/arm/src/lpc43xx/lpc43_serial.c b/arch/arm/src/lpc43xx/lpc43_serial.c
index c12d65597b1b2e7df3709df5f75fe79df6bc052d..bf3e9613bfbd36eefa73e0d12692add61740611c 100644
--- a/arch/arm/src/lpc43xx/lpc43_serial.c
+++ b/arch/arm/src/lpc43xx/lpc43_serial.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/lpc43xx/lpc43_serial.c
  *
- *   Copyright (C) 2012-2013, 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012-2013, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -92,6 +92,8 @@ struct up_dev_s
   uint8_t   bits;      /* Number of bits (7 or 8) */
   bool      stopbits2; /* true: Configure with 2 stop bits instead of 1 */
 #ifdef HAVE_RS485
+  bool      dctrl;     /* Hardware RS485 direction control */
+  bool      diroinv;   /* Direction pin polarity invert */
   bool      dtrdir;    /* DTR pin is the direction bit */
 #endif
 };
@@ -104,8 +106,15 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-static int  up_interrupt(int irq, void *context);
+static int  up_interrupt(int irq, void *context, void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
+#ifdef HAVE_RS485
+static inline int up_set_rs485_mode(struct up_dev_s *priv,
+                                    const struct serial_rs485 *mode);
+
+static inline int up_get_rs485_mode(struct up_dev_s *priv,
+                                    struct serial_rs485 *mode);
+#endif
 static int  up_receive(struct uart_dev_s *dev, uint32_t *status);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
 static bool up_rxavailable(struct uart_dev_s *dev);
@@ -140,26 +149,26 @@ static const struct uart_ops_s g_uart_ops =
 /* I/O buffers */
 
 #ifdef CONFIG_LPC43_USART0
-static char g_uart0rxbuffer[CONFIG_USART0_RXBUFSIZE];
-static char g_uart0txbuffer[CONFIG_USART0_TXBUFSIZE];
+static char g_usart0rxbuffer[CONFIG_USART0_RXBUFSIZE];
+static char g_usart0txbuffer[CONFIG_USART0_TXBUFSIZE];
 #endif
 #ifdef CONFIG_LPC43_UART1
 static char g_uart1rxbuffer[CONFIG_UART1_RXBUFSIZE];
 static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE];
 #endif
 #ifdef CONFIG_LPC43_USART2
-static char g_uart2rxbuffer[CONFIG_USART2_RXBUFSIZE];
-static char g_uart2txbuffer[CONFIG_USART2_TXBUFSIZE];
+static char g_usart2rxbuffer[CONFIG_USART2_RXBUFSIZE];
+static char g_usart2txbuffer[CONFIG_USART2_TXBUFSIZE];
 #endif
 #ifdef CONFIG_LPC43_USART3
-static char g_uart3rxbuffer[CONFIG_USART3_RXBUFSIZE];
-static char g_uart3txbuffer[CONFIG_USART3_TXBUFSIZE];
+static char g_usart3rxbuffer[CONFIG_USART3_RXBUFSIZE];
+static char g_usart3txbuffer[CONFIG_USART3_TXBUFSIZE];
 #endif
 
 /* This describes the state of the LPC43xx uart0 port. */
 
 #ifdef CONFIG_LPC43_USART0
-static struct up_dev_s g_uart0priv =
+static struct up_dev_s g_usart0priv =
 {
   .uartbase       = LPC43_USART0_BASE,
   .basefreq       = BOARD_USART0_BASEFREQ,
@@ -169,25 +178,32 @@ static struct up_dev_s g_uart0priv =
   .parity         = CONFIG_USART0_PARITY,
   .bits           = CONFIG_USART0_BITS,
   .stopbits2      = CONFIG_USART0_2STOP,
-#if defined(CONFIG_USART0_RS485MODE) && defined(CONFIG_USART0_RS485_DTRDIR)
-  .dtrdir         = true;
+#if defined(CONFIG_USART0_RS485MODE)
+  .dctrl          = true,
+#  if defined(CONFIG_USART0_RS485DIROIN)
+  .diroinv        = true,
+#  else
+  .diroinv        = false,
+#  endif
+#elif defined(HAVE_RS485) /* RS485 supported, but not on USART0 */
+  .dctrl          = false,
 #endif
 };
 
-static uart_dev_t g_uart0port =
+static uart_dev_t g_usart0port =
 {
   .recv     =
   {
     .size   = CONFIG_USART0_RXBUFSIZE,
-    .buffer = g_uart0rxbuffer,
+    .buffer = g_usart0rxbuffer,
   },
   .xmit     =
   {
     .size   = CONFIG_USART0_TXBUFSIZE,
-    .buffer = g_uart0txbuffer,
+    .buffer = g_usart0txbuffer,
   },
   .ops      = &g_uart_ops,
-  .priv     = &g_uart0priv,
+  .priv     = &g_usart0priv,
 };
 #endif
 
@@ -205,7 +221,7 @@ static struct up_dev_s g_uart1priv =
   .bits           = CONFIG_UART1_BITS,
   .stopbits2      = CONFIG_UART1_2STOP,
 #if defined(CONFIG_UART1_RS485MODE) && defined(CONFIG_UART1_RS485_DTRDIR)
-  .dtrdir         = true;
+  .dtrdir         = true,
 #endif
 };
 
@@ -229,7 +245,7 @@ static uart_dev_t g_uart1port =
 /* This describes the state of the LPC43xx uart1 port. */
 
 #ifdef CONFIG_LPC43_USART2
-static struct up_dev_s g_uart2priv =
+static struct up_dev_s g_usart2priv =
 {
   .uartbase       = LPC43_USART2_BASE,
   .basefreq       = BOARD_USART2_BASEFREQ,
@@ -239,32 +255,39 @@ static struct up_dev_s g_uart2priv =
   .parity         = CONFIG_USART2_PARITY,
   .bits           = CONFIG_USART2_BITS,
   .stopbits2      = CONFIG_USART2_2STOP,
-#if defined(CONFIG_USART2_RS485MODE) && defined(CONFIG_USART2_RS485_DTRDIR)
-  .dtrdir         = true;
+#if defined(CONFIG_USART2_RS485MODE)
+  .dctrl          = true,
+#  if defined(CONFIG_USART2_RS485DIROIN)
+  .diroinv        = true,
+#  else
+  .diroinv        = false,
+#  endif
+#elif defined(HAVE_RS485) /* RS485 supported, but not on USART2 */
+  .dctrl          = false,
 #endif
 };
 
-static uart_dev_t g_uart2port =
+static uart_dev_t g_usart2port =
 {
   .recv     =
   {
     .size   = CONFIG_USART2_RXBUFSIZE,
-    .buffer = g_uart2rxbuffer,
+    .buffer = g_usart2rxbuffer,
   },
   .xmit     =
   {
     .size   = CONFIG_USART2_TXBUFSIZE,
-    .buffer = g_uart2txbuffer,
+    .buffer = g_usart2txbuffer,
   },
   .ops      = &g_uart_ops,
-  .priv     = &g_uart2priv,
+  .priv     = &g_usart2priv,
 };
 #endif
 
 /* This describes the state of the LPC43xx uart1 port. */
 
 #ifdef CONFIG_LPC43_USART3
-static struct up_dev_s g_uart3priv =
+static struct up_dev_s g_usart3priv =
 {
   .uartbase       = LPC43_USART3_BASE,
   .basefreq       = BOARD_USART3_BASEFREQ,
@@ -274,228 +297,125 @@ static struct up_dev_s g_uart3priv =
   .parity         = CONFIG_USART3_PARITY,
   .bits           = CONFIG_USART3_BITS,
   .stopbits2      = CONFIG_USART3_2STOP,
-#if defined(CONFIG_USART3_RS485MODE) && defined(CONFIG_USART3_RS485_DTRDIR)
-  .dtrdir         = true;
+#if defined(CONFIG_USART3_RS485MODE)
+  .dctrl          = true,
+#  if defined(CONFIG_USART3_RS485DIROIN)
+  .diroinv        = true,
+#  else
+  .diroinv        = false,
+#  endif
+#elif defined(HAVE_RS485) /* RS485 supported, but not on USART3 */
+  .dctrl          = false,
 #endif
 };
 
-static uart_dev_t g_uart3port =
+static uart_dev_t g_usart3port =
 {
   .recv     =
   {
     .size   = CONFIG_USART3_RXBUFSIZE,
-    .buffer = g_uart3rxbuffer,
+    .buffer = g_usart3rxbuffer,
   },
   .xmit     =
   {
     .size   = CONFIG_USART3_TXBUFSIZE,
-    .buffer = g_uart3txbuffer,
+    .buffer = g_usart3txbuffer,
   },
   .ops      = &g_uart_ops,
-  .priv     = &g_uart3priv,
+  .priv     = &g_usart3priv,
 };
 #endif
 
 /* Which UART with be tty0/console and which tty1? tty2? tty3? */
 
-#ifdef HAVE_CONSOLE
+#undef CONSOLE_DEV                          /* Assume no console */
+#undef TTYS0_DEV                            /* Assume no ttyS0 */
+#undef TTYS1_DEV                            /* Assume no ttyS1 */
+#undef TTYS2_DEV                            /* Assume no ttyS2 */
+#undef TTYS3_DEV                            /* Assume no ttyS3 */
+#undef USART0_ASSIGNED                      /* USART0 has not been assigned */
+#undef UART1_ASSIGNED                       /* UART1 has not been assigned */
+#undef USART2_ASSIGNED                      /* USART2 has not been assigned */
+#undef USART3_ASSIGNED                      /* USART3 has not been assigned */
+
+/* Assign the console device and ttyS0 */
+
+#ifdef HAVE_SERIAL_CONSOLE
 #  if defined(CONFIG_USART0_SERIAL_CONSOLE)
-#    define CONSOLE_DEV     g_uart0port      /* USART0=console */
-#    define TTYS0_DEV       g_uart0port      /* USART0=ttyS0 */
-#    ifdef CONFIG_LPC43_UART1
-#      define TTYS1_DEV     g_uart1port      /* USART0=ttyS0;UART1=ttyS1 */
-#      ifdef CONFIG_LPC43_USART2
-#        define TTYS2_DEV   g_uart2port      /* USART0=ttyS0;UART1=ttyS1;USART2=ttyS2 */
-#        ifdef CONFIG_LPC43_USART3
-#          define TTYS3_DEV g_uart3port      /* USART0=ttyS0;UART1=ttyS1;USART2=ttyS2;USART3=ttyS3 */
-#        else
-#          undef TTYS3_DEV                   /* USART0=ttyS0;UART1=ttyS1;USART2=ttyS;No ttyS3 */
-#        endif
-#      else
-#        ifdef CONFIG_LPC43_USART3
-#          define TTYS2_DEV g_uart3port     /* USART0=ttyS0;UART1=ttyS1;USART3=ttys2;No ttyS3 */
-#        else
-#          undef TTYS2_DEV                  /* USART0=ttyS0;UART1=ttyS1;No ttyS2;No ttyS3 */
-#        endif
-#        undef TTYS3_DEV                    /* No ttyS3 */
-#      endif
-#    else
-#      ifdef CONFIG_LPC43_USART2
-#        define TTYS1_DEV   g_uart2port    /* USART0=ttyS0;USART2=ttyS1;No ttyS3 */
-#        ifdef CONFIG_LPC43_USART3
-#          define TTYS2_DEV g_uart3port    /* USART0=ttyS0;USART2=ttyS1;USART3=ttyS2;No ttyS3 */
-#        else
-#          undef TTYS2_DEV                 /* USART0=ttyS0;USART2=ttyS1;No ttyS2;No ttyS3 */
-#        endif
-#        undef TTYS3_DEV                   /* No ttyS3 */
-#      else
-#        ifdef CONFIG_LPC43_USART3
-#          define TTYS1_DEV g_uart3port    /* USART0=ttyS0;USART3=ttyS1;No ttyS2;No ttyS3 */
-#        else
-#          undef TTYS1_DEV                 /* USART0=ttyS0;No ttyS1;No ttyS2;No ttyS3 */
-#        endif
-#          undef TTYS2_DEV                  /* No ttyS2 */
-#        undef TTYS3_DEV                    /* No ttyS3 */
-#      endif
-#    endif
+#    define CONSOLE_DEV     g_usart0port    /* USART0=console */
+#    define TTYS0_DEV       g_usart0port    /* USART0=ttyS0 */
+#    define USART0_ASSIGNED 1
 #  elif defined(CONFIG_UART1_SERIAL_CONSOLE)
 #    define CONSOLE_DEV     g_uart1port     /* UART1=console */
 #    define TTYS0_DEV       g_uart1port     /* UART1=ttyS0 */
-#    ifdef CONFIG_LPC43_USART0
-#      define TTYS1_DEV     g_uart0port     /* UART1=ttyS0;USART0=ttyS1 */
-#      ifdef CONFIG_LPC43_USART2
-#        define TTYS2_DEV   g_uart2port     /* UART1=ttyS0;USART0=ttyS1;USART2=ttyS2 */
-#        ifdef CONFIG_LPC43_USART3
-#          define TTYS3_DEV g_uart3port     /* UART1=ttyS0;USART0=ttyS1;USART2=ttyS2;USART3=ttyS3 */
-#        else
-#          undef TTYS3_DEV                  /* UART1=ttyS0;USART0=ttyS1;USART2=ttyS;No ttyS3 */
-#        endif
-#      else
-#        ifdef CONFIG_LPC43_USART3
-#          define TTYS2_DEV g_uart3port     /* UART1=ttyS0;USART0=ttyS1;USART3=ttys2;No ttyS3 */
-#        else
-#          undef TTYS2_DEV                  /* UART1=ttyS0;USART0=ttyS1;No ttyS2;No ttyS3 */
-#        endif
-#        undef TTYS3_DEV                    /* No ttyS3 */
-#      endif
-#    else
-#      ifdef CONFIG_LPC43_USART2
-#        define TTYS1_DEV   g_uart2port     /* UART1=ttyS0;USART2=ttyS1 */
-#        ifdef CONFIG_LPC43_USART3
-#          define TTYS2_DEV g_uart3port     /* UART1=ttyS0;USART2=ttyS1;USART3=ttyS2;No ttyS3 */
-#        else
-#          undef TTYS2_DEV                  /* UART1=ttyS0;USART2=ttyS1;No ttyS2;No ttyS3 */
-#        endif
-#        undef TTYS3_DEV                    /* No ttyS3 */
-#      else
-#        ifdef CONFIG_LPC43_USART3
-#          define TTYS1_DEV   g_uart3port   /* UART1=ttyS0;USART3=ttyS1;No ttyS2;No ttyS3 */
-#        else
-#          undef TTYS1_DEV                  /* UART1=ttyS0;No ttyS1;No ttyS2;No ttyS3 */
-#        endif
-#        undef TTYS2_DEV                    /* No ttyS2 */
-#        undef TTYS3_DEV                    /* No ttyS3 */
-#      endif
-#    endif
+#    define UART1_ASSIGNED  1
 #  elif defined(CONFIG_USART2_SERIAL_CONSOLE)
-#    define CONSOLE_DEV     g_uart2port     /* USART2=console */
-#    define TTYS0_DEV       g_uart2port     /* USART2=ttyS0 */
-#    ifdef CONFIG_LPC43_USART0
-#      define TTYS1_DEV     g_uart0port     /* USART2=ttyS0;USART0=ttyS1 */
-#      ifdef CONFIG_LPC43_UART1
-#        define TTYS2_DEV   g_uart1port     /* USART2=ttyS0;USART0=ttyS1;UART1=ttyS2 */
-#        ifdef CONFIG_LPC43_USART3
-#          define TTYS3_DEV g_uart3port     /* USART2=ttyS0;USART0=ttyS1;UART1=ttyS2;USART3=ttyS3 */
-#        else
-#          undef TTYS3_DEV                  /* USART2=ttyS0;USART0=ttyS1;UART1=ttyS;No ttyS3 */
-#        endif
-#      else
-#        ifdef CONFIG_LPC43_USART3
-#          define TTYS2_DEV g_uart3port     /* USART2=ttyS0;USART0=ttyS1;USART3=ttys2;No ttyS3 */
-#        else
-#          undef TTYS2_DEV                  /* USART2=ttyS0;USART0=ttyS1;No ttyS2;No ttyS3 */
-#        endif
-#        undef TTYS3_DEV                    /* No ttyS3 */
-#      endif
-#    else
-#      ifdef CONFIG_LPC43_UART1
-#        define TTYS1_DEV   g_uart1port    /* USART2=ttyS0;UART1=ttyS1 */
-#        ifdef CONFIG_LPC43_USART3
-#          define TTYS2_DEV g_uart3port    /* USART2=ttyS0;UART1=ttyS1;USART3=ttyS2 */
-#        else
-#          undef TTYS2_DEV                 /* USART2=ttyS0;UART1=ttyS1;No ttyS2;No ttyS3 */
-#        endif
-#        undef TTYS3_DEV                   /* No ttyS3 */
-#      else
-#        ifdef CONFIG_LPC43_USART3
-#          define TTYS1_DEV g_uart3port    /* USART2=ttyS0;USART3=ttyS1;No ttyS3 */
-#        else
-#          undef TTYS1_DEV                 /* USART2=ttyS0;No ttyS1;No ttyS2;No ttyS3 */
-#        endif
-#        undef TTYS2_DEV                   /* No ttyS2 */
-#        undef TTYS3_DEV                   /* No ttyS3 */
-#      endif
-#    endif
-#  elif defined(CONFIG_USART3_SERIAL_CONSOLE)
-#    define CONSOLE_DEV     g_uart3port    /* USART3=console */
-#    define TTYS0_DEV       g_uart3port    /* USART3=ttyS0 */
-#    ifdef CONFIG_LPC43_USART0
-#      define TTYS1_DEV     g_uart0port    /* USART3=ttyS0;USART0=ttyS1 */
-#      ifdef CONFIG_LPC43_UART1
-#        define TTYS2_DEV   g_uart1port    /* USART3=ttyS0;USART0=ttyS1;UART1=ttyS2 */
-#        ifdef CONFIG_LPC43_USART2
-#          define TTYS3_DEV g_uart2port    /* USART3=ttyS0;USART0=ttyS1;UART1=ttyS2;USART2=ttyS3 */
-#        else
-#          undef TTYS3_DEV                 /* USART3=ttyS0;USART0=ttyS1;UART1=ttyS;No ttyS3 */
-#        endif
-#      else
-#        ifdef CONFIG_LPC43_USART2
-#          define TTYS2_DEV g_uart2port    /* USART3=ttyS0;USART0=ttyS1;USART2=ttys2;No ttyS3 */
-#        else
-#          undef TTYS2_DEV                 /* USART3=ttyS0;USART0=ttyS1;No ttyS2;No ttyS3 */
-#        endif
-#          undef TTYS3_DEV                 /* No ttyS3 */
-#      endif
-#    else
-#      ifdef CONFIG_LPC43_UART1
-#        define TTYS1_DEV   g_uart1port    /* USART3=ttyS0;UART1=ttyS1 */
-#        ifdef CONFIG_LPC43_USART2
-#          define TTYS2_DEV g_uart2port    /* USART3=ttyS0;UART1=ttyS1;USART2=ttyS2;No ttyS3 */
-#        else
-#          undef TTYS2_DEV                 /* USART3=ttyS0;UART1=ttyS1;No ttyS2;No ttyS3 */
-#        endif
-#        undef TTYS3_DEV                   /* No ttyS3 */
-#      else
-#        ifdef CONFIG_LPC43_USART2
-#          define TTYS1_DEV   g_uart2port  /* USART3=ttyS0;USART2=ttyS1;No ttyS3;No ttyS3 */
-#          undef TTYS3_DEV                 /* USART3=ttyS0;USART2=ttyS1;No ttyS2;No ttyS3 */
-#        else
-#          undef TTYS1_DEV                 /* USART3=ttyS0;No ttyS1;No ttyS2;No ttyS3 */
-#        endif
-#        undef TTYS2_DEV                   /* No ttyS2 */
-#        undef TTYS3_DEV                   /* No ttyS3 */
-#      endif
-#    endif
-#  endif
-#else /* No console */
-#  define TTYS0_DEV       g_uart0port      /* USART0=ttyS0 */
-#  ifdef CONFIG_LPC43_UART1
-#    define TTYS1_DEV     g_uart1port      /* USART0=ttyS0;UART1=ttyS1 */
-#    ifdef CONFIG_LPC43_USART2
-#      define TTYS2_DEV   g_uart2port      /* USART0=ttyS0;UART1=ttyS1;USART2=ttyS2 */
-#      ifdef CONFIG_LPC43_USART3
-#        define TTYS3_DEV g_uart3port      /* USART0=ttyS0;UART1=ttyS1;USART2=ttyS2;USART3=ttyS3 */
-#      else
-#        undef TTYS3_DEV                   /* USART0=ttyS0;UART1=ttyS1;USART2=ttyS;No ttyS3 */
-#      endif
-#    else
-#      ifdef CONFIG_LPC43_USART3
-#        define TTYS2_DEV g_uart3port      /* USART0=ttyS0;UART1=ttyS1;USART3=ttys2;No ttyS3 */
-#      else
-#        undef TTYS2_DEV                   /* USART0=ttyS0;UART1=ttyS1;No ttyS2;No ttyS3 */
-#      endif
-#      undef TTYS3_DEV                     /* No ttyS3 */
-#    endif
-#  else
-#    ifdef CONFIG_LPC43_USART2
-#      define TTYS1_DEV   g_uart2port     /* USART0=ttyS0;USART2=ttyS1;No ttyS3 */
-#      ifdef CONFIG_LPC43_USART3
-#        define TTYS2_DEV g_uart3port     /* USART0=ttyS0;USART2=ttyS1;USART3=ttyS2;No ttyS3 */
-#      else
-#        undef TTYS2_DEV                  /* USART0=ttyS0;USART2=ttyS1;No ttyS2;No ttyS3 */
-#      endif
-#      undef TTYS3_DEV                    /* No ttyS3 */
-#    else
-#      ifdef CONFIG_LPC43_USART3
-#        define TTYS1_DEV g_uart3port     /* USART0=ttyS0;USART3=ttyS1;No ttyS2;No ttyS3 */
-#      else
-#        undef TTYS1_DEV                  /* USART0=ttyS0;No ttyS1;No ttyS2;No ttyS3 */
-#      endif
-#        undef TTYS2_DEV                  /* No ttyS2 */
-#      undef TTYS3_DEV                    /* No ttyS3 */
-#    endif
-#  endif
-#endif /* HAVE_CONSOLE */
+#    define CONSOLE_DEV     g_usart2port    /* USART2=console */
+#    define TTYS0_DEV       g_usart2port    /* USART2=ttyS0 */
+#    define USART2_ASSIGNED 1
+#  else /* elif defined(CONFIG_USART3_SERIAL_CONSOLE) */
+#    define CONSOLE_DEV     g_usart3port    /* USART3=console */
+#    define TTYS0_DEV       g_usart3port    /* USART3=ttyS0 */
+#    define USART3_ASSIGNED 1
+# endif
+#else
+/* No console, assign only ttyS0 */
+
+#  if defined(CONFIG_LPC43_USART0)
+#    define TTYS0_DEV       g_usart0port    /* USART0=ttyS0 */
+#    define USART0_ASSIGNED 1
+#  elif defined(CONFIG_LPC43_UART1)
+#    define TTYS0_DEV       g_uart1port     /* UART1=ttyS0 */
+#    define UART1_ASSIGNED  1
+#  elif defined(CONFIG_LPC43_USART2)
+#    define TTYS0_DEV       g_usart2port    /* USART2=ttyS0 */
+#    define USART2_ASSIGNED 1
+#  else /* elif defined(CONFIG_LPC43_USART3) */
+#    define TTYS0_DEV       g_usart3port    /* USART3=ttyS0 */
+#    define USART3_ASSIGNED 1
+# endif
+#endif
+
+/* Assign ttyS1 */
+
+#if defined(CONFIG_LPC43_USART0) && !defined(USART0_ASSIGNED)
+#  define TTYS1_DEV         g_usart0port    /* USART0=ttyS1 */
+#  define USART0_ASSIGNED 1
+#elif defined(CONFIG_LPC43_UART1) && !defined(UART1_ASSIGNED)
+#  define TTYS1_DEV         g_usart1port    /* USART1=ttyS1 */
+#  define UART1_ASSIGNED 1
+#elif defined(CONFIG_LPC43_USART2) && !defined(USART2_ASSIGNED)
+#  define TTYS1_DEV         g_usart2port    /* USART2=ttyS1 */
+#  define USART2_ASSIGNED 1
+#elif defined(CONFIG_LPC43_USART3) && !defined(USART3_ASSIGNED)
+#  define TTYS1_DEV         g_usart3port    /* USART3=ttyS1 */
+#  define USART3_ASSIGNED 1
+#endif
+
+/* Assign ttyS2.  USART0 has already been assigned if it was configured. */
+
+#if defined(CONFIG_LPC43_UART1) && !defined(UART1_ASSIGNED)
+#  define TTYS2_DEV         g_usart1port    /* USART1=ttyS2 */
+#  define UART1_ASSIGNED 1
+#elif defined(CONFIG_LPC43_USART2) && !defined(USART2_ASSIGNED)
+#  define TTYS2_DEV         g_usart2port    /* USART2=ttyS2 */
+#  define USART2_ASSIGNED 1
+#elif defined(CONFIG_LPC43_USART3) && !defined(USART3_ASSIGNED)
+#  define TTYS2_DEV         g_usart3port    /* USART3=ttyS2 */
+#  define USART3_ASSIGNED 1
+#endif
+
+/* Assign ttyS3.  USART0 and UART1 have already been assigned if they were
+ * configured.
+ */
+
+#if defined(CONFIG_LPC43_USART2) && !defined(USART2_ASSIGNED)
+#  define TTYS3_DEV         g_usart2port    /* USART2=ttyS3 */
+#  define USART2_ASSIGNED 1
+#elif defined(CONFIG_LPC43_USART3) && !defined(USART3_ASSIGNED)
+#  define TTYS3_DEV         g_usart3port    /* USART3=ttyS3 */
+#  define USART3_ASSIGNED 1
+#endif
 
 /****************************************************************************
  * Inline Functions
@@ -581,6 +501,9 @@ static int up_setup(struct uart_dev_s *dev)
 {
 #ifndef CONFIG_SUPPRESS_UART_CONFIG
   struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+#ifdef HAVE_RS485
+  struct serial_rs485 rs485mode;
+#endif
   uint32_t lcr;
 
   /* Clear fifos */
@@ -645,6 +568,24 @@ static int up_setup(struct uart_dev_s *dev)
     }
 #endif
 
+  /* Setup initial RS485 settings */
+
+#ifdef HAVE_RS485
+  if (priv->dctrl)
+    {
+      rs485mode.flags                 = SER_RS485_ENABLED;
+      rs485mode.delay_rts_after_send  = 0;
+      rs485mode.delay_rts_before_send = 0;
+
+      if (priv->diroinv)
+        {
+          rs485mode.flags |= SER_RS485_RTS_ON_SEND;
+        }
+
+      up_set_rs485_mode(priv, &rs485mode);
+    }
+#endif
+
 #endif
   return OK;
 }
@@ -720,7 +661,7 @@ static int up_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, up_interrupt);
+  ret = irq_attach(priv->irq, up_interrupt, dev);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
@@ -761,44 +702,14 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_interrupt(int irq, void *context)
+static int up_interrupt(int irq, void *context, void *arg)
 {
-  struct uart_dev_s *dev = NULL;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct up_dev_s   *priv;
   uint32_t           status;
   int                passes;
 
-#ifdef CONFIG_LPC43_USART0
-  if (g_uart0priv.irq == irq)
-    {
-      dev = &g_uart0port;
-    }
-  else
-#endif
-#ifdef CONFIG_LPC43_UART1
-  if (g_uart1priv.irq == irq)
-    {
-      dev = &g_uart1port;
-    }
-  else
-#endif
-#ifdef CONFIG_LPC43_USART2
-  if (g_uart2priv.irq == irq)
-    {
-      dev = &g_uart2port;
-    }
-  else
-#endif
-#ifdef CONFIG_LPC43_USART3
-  if (g_uart3priv.irq == irq)
-    {
-      dev = &g_uart3port;
-    }
-  else
-#endif
-    {
-      PANIC();
-    }
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct up_dev_s *)dev->priv;
 
   /* Loop until there are no characters to be transferred or,
@@ -854,7 +765,7 @@ static int up_interrupt(int irq, void *context)
               /* Read the modem status register (MSR) to clear */
 
               status = up_serialin(priv, LPC43_UART_MSR_OFFSET);
-              vdbg("MSR: %02x\n", status);
+              _info("MSR: %02x\n", status);
               break;
             }
 
@@ -865,7 +776,7 @@ static int up_interrupt(int irq, void *context)
               /* Read the line status register (LSR) to clear */
 
               status = up_serialin(priv, LPC43_UART_LSR_OFFSET);
-              vdbg("LSR: %02x\n", status);
+              _info("LSR: %02x\n", status);
               break;
             }
 
@@ -873,7 +784,7 @@ static int up_interrupt(int irq, void *context)
 
           default:
             {
-              dbg("Unexpected IIR: %02x\n", status);
+              _err("ERROR: Unexpected IIR: %02x\n", status);
               break;
             }
         }
@@ -942,7 +853,7 @@ static inline int up_set_rs485_mode(struct up_dev_s *priv,
 
   /* Are we enabling or disabling RS-485 support? */
 
-  if ((mode->flags && SER_RS485_RTS_ON_SEND) != 0)
+  if ((mode->flags & SER_RS485_ENABLED) == 0)
     {
       /* Disable all RS-485 features */
 
@@ -970,7 +881,7 @@ static inline int up_set_rs485_mode(struct up_dev_s *priv,
        * be inverted.
        */
 
-      if ((mode->flags && SER_RS485_RTS_ON_SEND) != 0)
+      if ((mode->flags & SER_RS485_RTS_ON_SEND) != 0)
         {
           regval |= UART_RS485CTRL_OINV;
         }
@@ -1372,7 +1283,7 @@ void up_earlyserialinit(void)
 #ifndef CONFIG_USART0_SERIAL_CONSOLE
   lpc43_usart0_setup();
 #endif
-  up_disableuartint(&g_uart0priv, NULL);
+  up_disableuartint(&g_usart0priv, NULL);
 #endif
 
 #ifdef CONFIG_LPC43_UART1
@@ -1386,14 +1297,14 @@ void up_earlyserialinit(void)
 #ifndef CONFIG_USART2_SERIAL_CONSOLE
   lpc43_usart2_setup();
 #endif
-  up_disableuartint(&g_uart2priv, NULL);
+  up_disableuartint(&g_usart2priv, NULL);
 #endif
 
 #ifdef CONFIG_LPC43_USART3
 #ifndef CONFIG_USART3_SERIAL_CONSOLE
   lpc43_usart3_setup();
 #endif
-  up_disableuartint(&g_uart3priv, NULL);
+  up_disableuartint(&g_usart3priv, NULL);
 #endif
 
   /* Configuration whichever one is the console */
@@ -1443,7 +1354,7 @@ void up_serialinit(void)
 
 int up_putc(int ch)
 {
-#ifdef HAVE_CONSOLE
+#ifdef HAVE_SERIAL_CONSOLE
   struct up_dev_s *priv = (struct up_dev_s *)CONSOLE_DEV.priv;
   uint32_t ier;
   up_disableuartint(priv, &ier);
@@ -1459,7 +1370,7 @@ int up_putc(int ch)
     }
 
   up_lowputc(ch);
-#ifdef HAVE_CONSOLE
+#ifdef HAVE_SERIAL_CONSOLE
   up_restoreuartint(priv, ier);
 #endif
 
diff --git a/arch/arm/src/lpc43xx/lpc43_spi.c b/arch/arm/src/lpc43xx/lpc43_spi.c
index 32b5a45913188bb7bc0d1f39dbfafdf51f41bc01..e30b39bf25980e8df1c4dc679bf709a1c1afcc33 100644
--- a/arch/arm/src/lpc43xx/lpc43_spi.c
+++ b/arch/arm/src/lpc43xx/lpc43_spi.c
@@ -64,21 +64,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef CONFIG_DEBUG_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /* SPI Clocking.
  *
  * The CPU clock by 1, 2, 4, or 8 to get the SPI peripheral clock (SPI_CLOCK).
@@ -274,7 +259,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
   priv->frequency = frequency;
   priv->actual    = actual;
 
-  spidbg("Frequency %d->%d\n", frequency, actual);
+  spiinfo("Frequency %d->%d\n", frequency, actual);
   return actual;
 }
 
@@ -436,7 +421,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
   FAR uint8_t *ptr = (FAR uint8_t *)buffer;
   uint8_t data;
 
-  spidbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
   while (nwords)
     {
       /* Write the data to transmitted to the SPI Data Register */
@@ -481,7 +466,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
 {
   FAR uint8_t *ptr = (FAR uint8_t *)buffer;
 
-  spidbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
   while (nwords)
     {
       /* Write some dummy data to the SPI Data Register in order to clock the
diff --git a/arch/arm/src/lpc43xx/lpc43_spifi.c b/arch/arm/src/lpc43xx/lpc43_spifi.c
index 0d90ea9fceb15b162652c9a627e1888c160ef990..57349370c027b401854c2703903c8f09631a79c0 100644
--- a/arch/arm/src/lpc43xx/lpc43_spifi.c
+++ b/arch/arm/src/lpc43xx/lpc43_spifi.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  *  arch/arm/src/lpc43/lpc43_spifi.c
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -92,7 +92,7 @@
  *   from the SPI address space after each write.
  * CONFIG_DEBUG_SPIFI_DUMP - Debug option to dump read/write buffers.  You
  *   probably do not want to enable this unless you want to dig through a
- *   *lot* of debug output!  Also required CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE,
+ *   *lot* of debug output!  Also required CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO,
  *   and CONFIG_DEBUG_FS,
  */
 
@@ -263,7 +263,7 @@
  * enable this unless you want to dig through a *lot* of debug output!
  */
 
-#if !defined(CONFIG_DEBUG) || !defined(CONFIG_DEBUG_VERBOSE) || !defined(CONFIG_DEBUG_FS)
+#if !defined(CONFIG_DEBUG_FEATURES) || !defined(CONFIG_DEBUG_INFO) || !defined(CONFIG_DEBUG_FS)
 #  undef CONFIG_DEBUG_SPIFI_DUMP
 #endif
 
@@ -382,13 +382,13 @@ static void lpc43_blockerase(struct lpc43_dev_s *priv, off_t sector)
   priv->operands.dest   = SPIFI_BASE + (sector << SPIFI_BLKSHIFT);
   priv->operands.length = SPIFI_BLKSIZE;
 
-  fvdbg("SPIFI_ERASE: dest=%p length=%d\n",
+  finfo("SPIFI_ERASE: dest=%p length=%d\n",
         priv->operands.dest, priv->operands.length);
 
   result = SPIFI_ERASE(priv, &priv->rom, &priv->operands);
   if (result != 0)
     {
-      fdbg("ERROR: SPIFI_ERASE failed: %05x\n", result);
+      ferr("ERROR: SPIFI_ERASE failed: %05x\n", result);
     }
 }
 
@@ -411,13 +411,13 @@ static inline int lpc43_chiperase(struct lpc43_dev_s *priv)
   priv->operands.dest   = SPIFI_BASE;
   priv->operands.length = SPIFI_BLKSIZE * priv->nblocks;
 
-  fvdbg("SPIFI_ERASE: dest=%p length=%d\n",
+  finfo("SPIFI_ERASE: dest=%p length=%d\n",
         priv->operands.dest, priv->operands.length);
 
   result = SPIFI_ERASE(priv, &priv->rom, &priv->operands);
   if (result != 0)
     {
-      fdbg("ERROR: SPIFI_ERASE failed: %05x\n", result);
+      ferr("ERROR: SPIFI_ERASE failed: %05x\n", result);
       return -EIO;
     }
 
@@ -457,13 +457,13 @@ static int lpc43_pagewrite(FAR struct lpc43_dev_s *priv, FAR uint8_t *dest,
   priv->operands.dest   = dest;
   priv->operands.length = nbytes;
 
-  fvdbg("SPIFI_PROGRAM: src=%p dest=%p length=%d\n",
+  finfo("SPIFI_PROGRAM: src=%p dest=%p length=%d\n",
         src, priv->operands.dest, priv->operands.length);
 
   result = SPIFI_PROGRAM(priv, &priv->rom, src, &priv->operands);
   if (result != 0)
     {
-      fdbg("ERROR: SPIFI_PROGRAM failed: %05x\n", result);
+      ferr("ERROR: SPIFI_PROGRAM failed: %05x\n", result);
       return -EIO;
     }
 
@@ -475,7 +475,7 @@ static int lpc43_pagewrite(FAR struct lpc43_dev_s *priv, FAR uint8_t *dest,
   result = lpc43_verify(priv, dest, src, nbytes);
   if (result != 0)
     {
-      fdbg("ERROR: lpc43_verify failed: %05x\n", result);
+      ferr("ERROR: lpc43_verify failed: %05x\n", result);
       return -EIO;
     }
 #endif
@@ -492,7 +492,7 @@ static inline void lpc43_pageread(FAR struct lpc43_dev_s *priv,
                                   FAR uint8_t *dest, FAR const uint8_t *src,
                                   size_t nbytes)
 {
-  fvdbg("src=%p dest=%p length=%d\n", src, dest, nbytes);
+  finfo("src=%p dest=%p length=%d\n", src, dest, nbytes);
   memcpy(dest, src, nbytes);
 }
 
@@ -511,7 +511,7 @@ static void lpc43_cacheflush(struct lpc43_dev_s *priv)
    * the cached erase block to FLASH.
    */
 
-  fvdbg("flags: %02x blkno: %d\n", priv->flags, priv->blkno);
+  finfo("flags: %02x blkno: %d\n", priv->flags, priv->blkno);
   if (IS_DIRTY(priv) || IS_ERASED(priv))
     {
       /* Get the SPIFI address corresponding to the cached erase block */
@@ -523,7 +523,7 @@ static void lpc43_cacheflush(struct lpc43_dev_s *priv)
       ret = lpc43_pagewrite(priv, dest, priv->cache, SPIFI_BLKSIZE);
       if (ret < 0)
         {
-          fdbg("ERROR: lpc43_pagewrite failed: %d\n", ret);
+          ferr("ERROR: lpc43_pagewrite failed: %d\n", ret);
         }
 
       /* The case is no long dirty and the FLASH is no longer erased */
@@ -551,7 +551,7 @@ static FAR uint8_t *lpc43_cacheread(struct lpc43_dev_s *priv, off_t sector)
    */
 
   blkno = sector >> (SPIFI_BLKSHIFT - SPIFI_512SHIFT);
-  fvdbg("sector: %ld blkno: %d\n", sector, blkno);
+  finfo("sector: %ld blkno: %d\n", sector, blkno);
 
   /* Check if the requested erase block is already in the cache */
 
@@ -612,7 +612,7 @@ static void lpc43_cacheerase(struct lpc43_dev_s *priv, off_t sector)
   if (!IS_ERASED(priv))
     {
       off_t blkno  = sector >> (SPIFI_BLKSHIFT - SPIFI_512SHIFT);
-      fvdbg("sector: %ld blkno: %d\n", sector, blkno);
+      finfo("sector: %ld blkno: %d\n", sector, blkno);
 
       lpc43_blockerase(priv, blkno);
       SET_ERASED(priv);
@@ -646,7 +646,7 @@ static void lpc43_cachewrite(FAR struct lpc43_dev_s *priv, FAR const uint8_t *bu
 
       dest = lpc43_cacheread(priv, sector);
 
-      fvdbg("dest=%p src=%p sector: %ld flags: %02x\n",
+      finfo("dest=%p src=%p sector: %ld flags: %02x\n",
             dest, buffer, sector, priv->flags);
 
       /* Erase the block containing this sector if it is not already erased.
@@ -657,7 +657,7 @@ static void lpc43_cachewrite(FAR struct lpc43_dev_s *priv, FAR const uint8_t *bu
       if (!IS_ERASED(priv))
         {
           off_t blkno  = sector >> (SPIFI_BLKSHIFT - SPIFI_512SHIFT);
-          fvdbg("sector: %ld blkno: %d\n", sector, blkno);
+          finfo("sector: %ld blkno: %d\n", sector, blkno);
 
           lpc43_blockerase(priv, blkno);
           SET_ERASED(priv);
@@ -692,7 +692,7 @@ static int lpc43_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nbloc
   FAR struct lpc43_dev_s *priv = (FAR struct lpc43_dev_s *)dev;
   size_t blocksleft = nblocks;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   while (blocksleft-- > 0)
     {
@@ -726,7 +726,7 @@ static ssize_t lpc43_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t n
 #ifdef CONFIG_SPIFI_SECTOR512
   ssize_t nbytes;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* On this device, we can handle the block read just like the byte-oriented read */
 
@@ -743,7 +743,7 @@ static ssize_t lpc43_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t n
   FAR struct lpc43_dev_s *priv = (FAR struct lpc43_dev_s *)dev;
   ssize_t nbytes;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* On this device, we can handle the block read just like the byte-oriented read */
 
@@ -774,37 +774,36 @@ static ssize_t lpc43_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t
 
   FAR struct lpc43_dev_s *priv = (FAR struct lpc43_dev_s *)dev;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   lpc43_cachewrite(priv, buffer, startblock, nblocks);
 
   lpc43_dumpbuffer(__func__, buffer, nblocks << SPIFI_512SHIFT)
-  return nblocks;
+  return (ssize_t)nblocks;
 
 #else
 
   FAR struct lpc43_dev_s *priv = (FAR struct lpc43_dev_s *)dev;
   FAR uint8_t *dest;
+  int ret;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* Get the SPIFI address corresponding to the erase block */
 
   dest = SPIFI_BASE + (startblock << SPIFI_BLKSHIFT);
 
-#if defined(CONFIG_SPIFI_SECTOR512)
   /* Write all of the erase blocks to FLASH */
 
-  ret = lpc43_pagewrite(priv, dest, buffer, nblocks << SPIFI_512SHIFT);
+  ret = lpc43_pagewrite(priv, dest, buffer, nblocks << SPIFI_BLKSHIFT);
   if (ret < 0)
     {
-      fdbg("ERROR: lpc43_pagewrite failed: %d\n", ret);
+      ferr("ERROR: lpc43_pagewrite failed: %d\n", ret);
       return ret;
     }
-#endif
 
-  lpc43_dumpbuffer(__func__, buffer, nblocks << SPIFI_BLKSHIFT)
-  return nblocks;
+  lpc43_dumpbuffer(__func__, buffer, nblocks << SPIFI_BLKSHIFT);
+  return (ssize_t)nblocks;
 
 #endif
 }
@@ -819,7 +818,7 @@ static ssize_t lpc43_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes
   FAR struct lpc43_dev_s *priv = (FAR struct lpc43_dev_s *)dev;
   FAR const uint8_t *src;
 
-  fvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+  finfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
 
   /* Get the SPIFI address corresponding sector */
 
@@ -829,7 +828,7 @@ static ssize_t lpc43_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes
 
   lpc43_pageread(priv, buffer, src, nbytes);
 
-  fvdbg("return nbytes: %d\n", (int)nbytes);
+  finfo("return nbytes: %d\n", (int)nbytes);
   return nbytes;
 }
 
@@ -842,7 +841,7 @@ static int lpc43_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
   FAR struct lpc43_dev_s *priv = (FAR struct lpc43_dev_s *)dev;
   int ret = -EINVAL; /* Assume good command with bad parameters */
 
-  fvdbg("cmd: %d \n", cmd);
+  finfo("cmd: %d \n", cmd);
 
   switch (cmd)
     {
@@ -871,7 +870,7 @@ static int lpc43_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
 #endif
               ret               = OK;
 
-              fvdbg("blocksize: %d erasesize: %d neraseblocks: %d\n",
+              finfo("blocksize: %d erasesize: %d neraseblocks: %d\n",
                     geo->blocksize, geo->erasesize, geo->neraseblocks);
             }
         }
@@ -891,7 +890,7 @@ static int lpc43_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
         break;
     }
 
-  fvdbg("return %d\n", ret);
+  finfo("return %d\n", ret);
   return ret;
 }
 
@@ -1025,7 +1024,7 @@ static inline int lpc43_rominit(FAR struct lpc43_dev_s *priv)
                       S_RCVCLK | S_FULLCLK, SCLK_MHZ);
   if (result != 0)
     {
-      fdbg("ERROR: SPIFI_INIT failed: %05x\n", result);
+      ferr("ERROR: SPIFI_INIT failed: %05x\n", result);
 
       /* Try again */
 
@@ -1033,29 +1032,29 @@ static inline int lpc43_rominit(FAR struct lpc43_dev_s *priv)
                           S_RCVCLK | S_FULLCLK, SCLK_MHZ);
       if (result != 0)
         {
-          fdbg("ERROR: SPIFI_INIT failed: %05x\n", result);
+          ferr("ERROR: SPIFI_INIT failed: %05x\n", result);
           return -ENODEV;
         }
     }
 
-  fvdbg("SPFI:\n");
-  fvdbg("      base: %08x\n", priv->rom.base);
-  fvdbg("   regbase: %08x\n", priv->rom.regbase);
-  fvdbg("   devsize: %08x\n", priv->rom.devsize);
-  fvdbg("   memsize: %08x\n", priv->rom.memsize);
-  fvdbg("     mfger: %02x\n", priv->rom.mfger);
-  fvdbg("   devtype: %02x\n", priv->rom.devtype);
-  fvdbg("     devid: %02x\n", priv->rom.devid);
-  fvdbg("      busy: %02x\n", priv->rom.busy);
-  fvdbg("      stat: %04x\n", priv->rom.stat.h);
-  fvdbg("   setprot: %04x\n", priv->rom.setprot);
-  fvdbg(" writeprot: %04x\n", priv->rom.writeprot);
-  fvdbg("    memcmd: %08x\n", priv->rom.memcmd);
-  fvdbg("   progcmd: %08x\n", priv->rom.progcmd);
-  fvdbg("   sectors: %04x\n", priv->rom.sectors);
-  fvdbg(" protbytes: %04x\n", priv->rom.protbytes);
-  fvdbg("      opts: %08x\n", priv->rom.opts);
-  fvdbg("  errcheck: %08x\n", priv->rom.errcheck);
+  finfo("SPFI:\n");
+  finfo("      base: %08x\n", priv->rom.base);
+  finfo("   regbase: %08x\n", priv->rom.regbase);
+  finfo("   devsize: %08x\n", priv->rom.devsize);
+  finfo("   memsize: %08x\n", priv->rom.memsize);
+  finfo("     mfger: %02x\n", priv->rom.mfger);
+  finfo("   devtype: %02x\n", priv->rom.devtype);
+  finfo("     devid: %02x\n", priv->rom.devid);
+  finfo("      busy: %02x\n", priv->rom.busy);
+  finfo("      stat: %04x\n", priv->rom.stat.h);
+  finfo("   setprot: %04x\n", priv->rom.setprot);
+  finfo(" writeprot: %04x\n", priv->rom.writeprot);
+  finfo("    memcmd: %08x\n", priv->rom.memcmd);
+  finfo("   progcmd: %08x\n", priv->rom.progcmd);
+  finfo("   sectors: %04x\n", priv->rom.sectors);
+  finfo(" protbytes: %04x\n", priv->rom.protbytes);
+  finfo("      opts: %08x\n", priv->rom.opts);
+  finfo("  errcheck: %08x\n", priv->rom.errcheck);
 
   /* Get the largest erase block size */
 
@@ -1065,11 +1064,11 @@ static inline int lpc43_rominit(FAR struct lpc43_dev_s *priv)
   sectors = priv->rom.sectors;
   log2    = 0;
 
-  fvdbg("FLASH Geometry:\n");
+  finfo("FLASH Geometry:\n");
 
   while (sectors > 0)
     {
-      fvdbg("  log2: %d rept: %d\n", desc->log2, desc->rept);
+      finfo("  log2: %d rept: %d\n", desc->log2, desc->rept);
 
       /* Check if this is the largest erase block size seen */
 
@@ -1091,10 +1090,10 @@ static inline int lpc43_rominit(FAR struct lpc43_dev_s *priv)
   priv->blksize  = (1 << log2);
   priv->nblocks  = (priv->rom.memsize - CONFIG_SPIFI_OFFSET) / priv->blksize;
 
-  fvdbg("Driver FLASH Geometry:\n");
-  fvdbg("  blkshift: %d\n", priv->blkshift);
-  fvdbg("   blksize: %08x\n", priv->blksize);
-  fvdbg("   nblocks: %d\n", priv->nblocks);
+  finfo("Driver FLASH Geometry:\n");
+  finfo("  blkshift: %d\n", priv->blkshift);
+  finfo("   blksize: %08x\n", priv->blksize);
+  finfo("   nblocks: %d\n", priv->nblocks);
 
 #ifdef CONFIG_SPIFI_SECTOR512
   DEBUGASSERT(log2 > 9);
@@ -1106,10 +1105,10 @@ static inline int lpc43_rominit(FAR struct lpc43_dev_s *priv)
 
   priv->nblocks  = ((priv->rom.memsize  - CONFIG_SPIFI_OFFSET) >> SPIFI_BLKSHIFT);
 
-  fvdbg("Driver FLASH Geometry:\n");
-  fvdbg("  blkshift: %d\n", SPIFI_BLKSHIFT);
-  fvdbg("   blksize: %08x\n", SPIFI_BLKSIZE);
-  fvdbg("   nblocks: %d\n", priv->nblocks);
+  finfo("Driver FLASH Geometry:\n");
+  finfo("  blkshift: %d\n", SPIFI_BLKSHIFT);
+  finfo("   blksize: %08x\n", SPIFI_BLKSIZE);
+  finfo("   nblocks: %d\n", priv->nblocks);
 #endif
 
   return OK;
@@ -1201,14 +1200,14 @@ FAR struct mtd_dev_s *lpc43_spifi_initialize(void)
     {
       /* Allocation failed! Discard all of that work we just did and return NULL */
 
-      fdbg("ERROR: Allocation failed\n");
+      ferr("ERROR: Allocation failed\n");
       return NULL;
     }
 #endif
 
   /* Return the implementation-specific state structure as the MTD device */
 
-  fvdbg("Return %p\n", priv);
+  finfo("Return %p\n", priv);
   return (FAR struct mtd_dev_s *)priv;
 }
 
diff --git a/arch/arm/src/lpc43xx/lpc43_ssp.c b/arch/arm/src/lpc43xx/lpc43_ssp.c
index 0d227fa8fa57e3ff7f808a366d78870eb564d22f..c5af6124d569455e7c32751f1e607456ac5905c4 100644
--- a/arch/arm/src/lpc43xx/lpc43_ssp.c
+++ b/arch/arm/src/lpc43xx/lpc43_ssp.c
@@ -62,34 +62,8 @@
 #include "lpc43_ccu.h"
 #include "lpc43_pinconfig.h"
 
-
 #if defined(CONFIG_LPC43_SSP0) || defined(CONFIG_LPC43_SSP1)
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* The following enable debug output from this file (needs CONFIG_DEBUG too).
- *
- * CONFIG_SSP_DEBUG - Define to enable basic SSP debug
- * CONFIG_SSP_VERBOSE - Define to enable verbose SSP debug
- */
-
-#ifdef CONFIG_SSP_DEBUG
-#  define sspdbg  lldbg
-#  ifdef CONFIG_SSP_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef CONFIG_SSP_VERBOSE
-#  define sspdbg(x...)
-#  define spivdbg(x...)
-#endif
-
-
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -378,7 +352,7 @@ static uint32_t ssp_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
   priv->frequency = frequency;
   priv->actual    = actual;
 
-  sspdbg("Frequency %d->%d\n", frequency, actual);
+  spiinfo("Frequency %d->%d\n", frequency, actual);
   return actual;
 }
 
@@ -406,6 +380,8 @@ static void ssp_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
 
   if (mode != priv->mode)
     {
+      spiinfo("Setting mode to %d.\n", mode);
+
       /* Yes... Set CR0 appropriately */
 
       regval = ssp_getreg(priv, LPC43_SSP_CR0_OFFSET);
@@ -429,7 +405,7 @@ static void ssp_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
           break;
 
         default:
-          sspdbg("Bad mode: %d\n", mode);
+          spierr("ERROR: Bad mode: %d\n", mode);
           DEBUGASSERT(FALSE);
           return;
         }
@@ -468,12 +444,15 @@ static void ssp_setbits(FAR struct spi_dev_s *dev, int nbits)
 
   if (nbits != priv->nbits)
     {
+      spiinfo("Setting bits per word to %d.\n", nbits);
+
       /* Yes... Set CR1 appropriately */
 
       regval = ssp_getreg(priv, LPC43_SSP_CR0_OFFSET);
       regval &= ~SSP_CR0_DSS_MASK;
       regval |= ((nbits - 1) << SSP_CR0_DSS_SHIFT);
-      regval = ssp_getreg(priv, LPC43_SSP_CR0_OFFSET);
+      ssp_putreg(priv, LPC43_SSP_CR0_OFFSET, regval);
+      spiinfo("SSP Control Register 0 (CR0) after setting DSS: 0x%08X.\n", regval);
 
       /* Save the selection so the subsequence re-configurations will be faster */
 
@@ -517,7 +496,7 @@ static uint16_t ssp_send(FAR struct spi_dev_s *dev, uint16_t wd)
   /* Get the value from the RX FIFO and return it */
 
   regval = ssp_getreg(priv, LPC43_SSP_DR_OFFSET);
-  sspdbg("%04x->%04x\n", wd, regval);
+  spiinfo("%04x->%04x\n", wd, regval);
   return (uint16_t)regval;
 }
 
@@ -564,7 +543,7 @@ static void ssp_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
 
   /* While there is remaining to be sent (and no synchronization error has occurred) */
 
-  sspdbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
 
   tx.pv = txbuffer;
   rx.pv = rxbuffer;
@@ -576,7 +555,7 @@ static void ssp_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
        * and (3) there are more bytes to be sent.
        */
 
-      spivdbg("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
+      spiinfo("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
       while ((ssp_getreg(priv, LPC43_SSP_SR_OFFSET) & SSP_SR_TNF) &&
              (rxpending < LPC43_SSP_FIFOSZ) && nwords)
         {
@@ -599,7 +578,7 @@ static void ssp_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
 
       /* Now, read the RX data from the RX FIFO while the RX FIFO is not empty */
 
-      spivdbg("RX: rxpending: %d\n", rxpending);
+      spiinfo("RX: rxpending: %d\n", rxpending);
       while (ssp_getreg(priv, LPC43_SSP_SR_OFFSET) & SSP_SR_RNE)
         {
           data = ssp_getreg(priv, LPC43_SSP_DR_OFFSET);
diff --git a/arch/arm/src/lpc43xx/lpc43_start.c b/arch/arm/src/lpc43xx/lpc43_start.c
index 80ffb581ee8fb978e3f69d84435504b2a4493890..e3fe5c552e8b37ff2f652875cd35027fdac61b51 100644
--- a/arch/arm/src/lpc43xx/lpc43_start.c
+++ b/arch/arm/src/lpc43xx/lpc43_start.c
@@ -87,7 +87,7 @@
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 #  define showprogress(c) up_lowputc(c)
 #else
 #  define showprogress(c)
@@ -271,12 +271,12 @@ void __start(void)
 
   /* Reset as many of the LPC43 peripherals as possible. This is necessary
    * because the LPC43 does not provide any way of performing a full system
-   * reset under debugger control.  So, if CONFIG_DEBUG is set (indicating
+   * reset under debugger control.  So, if CONFIG_DEBUG_FEATURES is set (indicating
    * that a debugger is being used?), the boot logic will call this
    * function on all restarts.
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   lpc43_softreset();
 #endif
 
diff --git a/arch/arm/src/lpc43xx/lpc43_tickless_rit.c b/arch/arm/src/lpc43xx/lpc43_tickless_rit.c
index f7c94d3a6e581be80ca45c289fe643bc88ff2af4..cacfb47c91b0a6a3c955dda7b7cc0c7f34b09968 100644
--- a/arch/arm/src/lpc43xx/lpc43_tickless_rit.c
+++ b/arch/arm/src/lpc43xx/lpc43_tickless_rit.c
@@ -536,7 +536,7 @@ static inline void lpc43_tl_alarm(uint32_t curr)
 
 /* Interrupt handler */
 
-static int lpc43_tl_isr(int irq, FAR void *context)
+static int lpc43_tl_isr(int irq, FAR void *context, FAR void *arg)
 {
   lpc43_tl_sync_up();
 
@@ -595,7 +595,7 @@ static int lpc43_tl_isr(int irq, FAR void *context)
  * Public Functions
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   irqstate_t flags;
   flags = enter_critical_section();
@@ -624,7 +624,7 @@ void up_timer_initialize(void)
   lpc43_tl_set_reset_on_match(false);
   lpc43_tl_clear_interrupt();
 
-  irq_attach(LPC43M4_IRQ_RITIMER, lpc43_tl_isr);
+  irq_attach(LPC43M4_IRQ_RITIMER, lpc43_tl_isr, NULL);
   up_enable_irq(LPC43M4_IRQ_RITIMER);
 
   lpc43_tl_init_timer_vars();
diff --git a/arch/arm/src/lpc43xx/lpc43_timer.c b/arch/arm/src/lpc43xx/lpc43_timer.c
new file mode 100644
index 0000000000000000000000000000000000000000..decc110dd49998f13405d6b8e049fe1497d5e766
--- /dev/null
+++ b/arch/arm/src/lpc43xx/lpc43_timer.c
@@ -0,0 +1,771 @@
+/****************************************************************************
+ * arch/arm/src/lpc43/lpc43_timer.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            Alan Carvalho de Assis 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "up_arch.h"
+#include "lpc43_timer.h"
+
+#if defined(CONFIG_TIMER) && (defined(CONFIG_LPC43_TMR0) || \
+    defined(CONFIG_LPC43_TMR1) || defined(CONFIG_LPC43_TMR2) || \
+    defined(CONFIG_LPC43_TMR3) )
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* Configuration ************************************************************/
+
+#ifndef CONFIG_DEBUG_TIMER_INFO
+#  undef CONFIG_LPC43_TMR_REGDEBUG
+#endif
+
+/* Clocking *****************************************************************/
+
+/* TODO: Allow selection of any of the input clocks */
+
+#define TMR_FCLK        (BOARD_FCLKOUT_FREQUENCY)
+#define TMR_MAXTIMEOUT  ((1000000ULL * (1ULL + TMR_RVALUE_MASK)) / TMR_FCLK)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+/* This structure provides the private representation of the "lower-half"
+ * driver state structure.  This structure must be cast-compatible with the
+ * timer_lowerhalf_s structure.
+ */
+
+struct lpc43_lowerhalf_s
+{
+  FAR const struct timer_ops_s  *ops;  /* Lower half operations */
+
+  /* Private data */
+
+  uint32_t base;            /* Base address of the timer */
+  tccb_t   callback;        /* Current user interrupt callback */
+  FAR void *arg;            /* Argument passed to the callback function */
+  uint32_t timeout;         /* The current timeout value (us) */
+  uint32_t adjustment;      /* time lost due to clock resolution truncation (us) */
+  uint32_t clkticks;        /* actual clock ticks for current interval */
+  bool     started;         /* The timer has been started */
+  uint16_t tmrid;           /* Timer id */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+/* Register operations ******************************************************/
+
+#ifdef CONFIG_LPC43_TMR_REGDEBUG
+static uint32_t lpc43_getreg(uint32_t addr);
+static void     lpc43_putreg(uint32_t val, uint32_t addr);
+#else
+# define        lpc43_getreg(addr)     getreg32(addr)
+# define        lpc43_putreg(val,addr) putreg32(val,addr)
+#endif
+
+/* Interrupt handling *******************************************************/
+
+static int      lpc43_interrupt(int irq, FAR void *context, FAR void *arg);
+
+/* "Lower half" driver methods **********************************************/
+
+static int      lpc43_start(FAR struct timer_lowerhalf_s *lower);
+static int      lpc43_stop(FAR struct timer_lowerhalf_s *lower);
+static int      lpc43_getstatus(FAR struct timer_lowerhalf_s *lower,
+                  FAR struct timer_status_s *status);
+static int      lpc43_settimeout(FAR struct timer_lowerhalf_s *lower,
+                  uint32_t timeout);
+static void     lpc43_setcallback(FAR struct timer_lowerhalf_s *lower,
+                  tccb_t callback, FAR void *arg);
+static int      lpc43_ioctl(FAR struct timer_lowerhalf_s *lower, int cmd,
+                  unsigned long arg);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* "Lower half" driver methods */
+
+static const struct timer_ops_s g_tmrops =
+{
+  .start      = lpc43_start,
+  .stop       = lpc43_stop,
+  .getstatus  = lpc43_getstatus,
+  .settimeout = lpc43_settimeout,
+  .setcallback = lpc43_setcallback,
+  .ioctl      = lpc43_ioctl,
+};
+
+/* "Lower half" driver state */
+
+/* TODO - allocating all 6 now, even though we might not need them.
+ *        May want to allocate the right number to not be wasteful.
+ */
+
+static struct lpc43_lowerhalf_s g_tmrdevs[4];
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lpc43_getreg
+ *
+ * Description:
+ *   Get the contents of a register
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_LPC43_TMR_REGDEBUG
+static uint32_t lpc43_getreg(uint32_t addr)
+{
+  static uint32_t prevaddr = 0;
+  static uint32_t count = 0;
+  static uint32_t preval = 0;
+
+  /* Read the value from the register */
+
+  uint32_t val = getreg32(addr);
+
+  /* Is this the same value that we read from the same registe last time?
+   * Are we polling the register?  If so, suppress some of the output.
+   */
+
+  if (addr == prevaddr && val == preval)
+    {
+      if (count == 0xffffffff || ++count > 3)
+        {
+          if (count == 4)
+            {
+              tmrinfo("...\n");
+            }
+
+          return val;
+        }
+    }
+
+  /* No this is a new address or value */
+
+  else
+    {
+      /* Did we print "..." for the previous value? */
+
+      if (count > 3)
+        {
+          /* Yes.. then show how many times the value repeated */
+
+          tmrinfo("[repeats %d more times]\n", count-3);
+        }
+
+      /* Save the new address, value, and count */
+
+      prevaddr = addr;
+      preval   = val;
+      count    = 1;
+    }
+
+  /* Show the register value read */
+
+  tmrinfo("%08lx->%08lx\n", addr, val);
+  return val;
+}
+#endif
+
+/****************************************************************************
+ * Name: lpc43_putreg
+ *
+ * Description:
+ *   Set the contents of an LPC43 register to a value
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_LPC43_TMR_REGDEBUG
+static void lpc43_putreg(uint32_t val, uint32_t addr)
+{
+  /* Show the register value being written */
+
+  tmrinfo("%08lx<-%08lx\n", addr, val);
+
+  /* Write the value */
+
+  putreg32(val, addr);
+}
+#endif
+
+void tmr_clk_enable(uint16_t tmrid)
+{
+  uint32_t regval;
+
+  /* Enable Timer 0 */
+
+  if (tmrid == 0)
+    {
+      regval  = getreg32(LPC43_CCU1_M4_TIMER0_CFG);
+      regval |= CCU_CLK_CFG_RUN;
+      putreg32(regval, LPC43_CCU1_M4_TIMER0_CFG);
+    }
+
+  /* Enable Timer 1 */
+
+  if (tmrid == 1)
+    {
+      regval  = getreg32(LPC43_CCU1_M4_TIMER1_CFG);
+      regval |= CCU_CLK_CFG_RUN;
+      putreg32(regval, LPC43_CCU1_M4_TIMER1_CFG);
+    }
+
+  /* Enable Timer 2 */
+
+  if (tmrid == 2)
+    {
+      regval  = getreg32(LPC43_CCU1_M4_TIMER2_CFG);
+      regval |= CCU_CLK_CFG_RUN;
+      putreg32(regval, LPC43_CCU1_M4_TIMER2_CFG);
+    }
+
+  /* Enable Timer 3 */
+
+  if (tmrid == 3)
+    {
+      regval  = getreg32(LPC43_CCU1_M4_TIMER3_CFG);
+      regval |= CCU_CLK_CFG_RUN;
+      putreg32(regval, LPC43_CCU1_M4_TIMER3_CFG);
+    }
+}
+
+void tmr_clk_disable(uint16_t tmrid)
+{
+  uint32_t regval;
+
+  /* Enable Timer 0 */
+
+  if (tmrid == 0)
+    {
+      regval  = getreg32(LPC43_CCU1_M4_TIMER0_CFG);
+      regval &= ~CCU_CLK_CFG_RUN;
+      putreg32(regval, LPC43_CCU1_M4_TIMER0_CFG);
+    }
+
+  /* Enable Timer 1 */
+
+  if (tmrid == 1)
+    {
+      regval  = getreg32(LPC43_CCU1_M4_TIMER1_CFG);
+      regval &= ~CCU_CLK_CFG_RUN;
+      putreg32(regval, LPC43_CCU1_M4_TIMER1_CFG);
+    }
+
+  /* Enable Timer 2 */
+
+  if (tmrid == 2)
+    {
+      regval  = getreg32(LPC43_CCU1_M4_TIMER2_CFG);
+      regval &= ~CCU_CLK_CFG_RUN;
+      putreg32(regval, LPC43_CCU1_M4_TIMER2_CFG);
+    }
+
+  /* Enable Timer 3 */
+
+  if (tmrid == 3)
+    {
+      regval  = getreg32(LPC43_CCU1_M4_TIMER3_CFG);
+      regval &= ~CCU_CLK_CFG_RUN;
+      putreg32(regval, LPC43_CCU1_M4_TIMER3_CFG);
+    }
+}
+
+/****************************************************************************
+ * Name: lpc43_interrupt
+ *
+ * Description:
+ *   TC interrupt
+ *
+ * Input Parameters:
+ *   Usual interrupt callback arguments.
+ *
+ * Returned Values:
+ *   Always returns OK.
+ *
+ ****************************************************************************/
+
+static int lpc43_interrupt(int irq, FAR void *context, FAR void *arg)
+{
+  uint8_t chan_int = 0x0f;
+  FAR struct lpc43_lowerhalf_s *priv = &g_tmrdevs[irq-LPC43M4_IRQ_TIMER0];
+
+  tmrinfo("Entry\n");
+  DEBUGASSERT((irq >= LPC43M4_IRQ_TIMER0) && (irq <= LPC43M4_IRQ_TIMER3));
+
+  /* Check if the interrupt is really pending */
+
+  if ((lpc43_getreg(priv->base + LPC43_TMR_IR_OFFSET) & chan_int) != 0)
+    {
+      uint32_t timeout;
+
+      /* Is there a registered callback?  If the callback has been
+       * nullified, the timer will be stopped.
+       */
+
+      if (priv->callback && priv->callback(&priv->timeout, priv->arg))
+        {
+          /* Calculate new ticks / dither adjustment */
+
+          priv->clkticks =((uint64_t)(priv->adjustment + priv->timeout)) *
+            TMR_FCLK / 1000000;
+
+          /* Set next interval interval. TODO: make sure the interval is not
+           * so soon it will be missed!
+           */
+
+          lpc43_putreg(priv->clkticks, priv->base + LPC43_TMR_PR_OFFSET);
+
+          /* Truncated timeout */
+
+          timeout = (1000000ULL * priv->clkticks) / TMR_FCLK;
+
+          /* Truncated time to be added to next interval (dither) */
+
+          priv->adjustment = (priv->adjustment + priv->timeout) - timeout;
+        }
+      else
+        {
+          /* No callback or the callback returned false.. stop the timer */
+
+          lpc43_stop((FAR struct timer_lowerhalf_s *)priv);
+          tmrinfo("Stopped\n");
+        }
+
+      /* Clear the interrupts */
+
+      lpc43_putreg(chan_int, priv->base + LPC43_TMR_IR_OFFSET);
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: lpc43_start
+ *
+ * Description:
+ *   Start the timer, resetting the time to the current timeout,
+ *
+ * Input Parameters:
+ *   lower - A pointer the publicly visible representation of the "lower-half"
+ *           driver state structure.
+ *
+ * Returned Values:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+static int lpc43_start(FAR struct timer_lowerhalf_s *lower)
+{
+  FAR struct lpc43_lowerhalf_s *priv = (FAR struct lpc43_lowerhalf_s *)lower;
+  uint32_t presc_val;
+
+  tmrinfo("Entry\n");
+  DEBUGASSERT(priv);
+
+  if (priv->started)
+    {
+      return -EINVAL;
+    }
+
+  /* Enable timer clock */
+
+  tmr_clk_enable(priv->tmrid);
+
+  /* Set it to Timer Mode */
+
+  lpc43_putreg(0, priv->base + LPC43_TMR_CTCR_OFFSET);
+
+  /* Disable the timer */
+
+  lpc43_putreg(0, priv->base + LPC43_TMR_TCR_OFFSET);
+
+  /* Set prescaler to increase TC each 1 us */
+
+  presc_val = TMR_FCLK / 1000000;
+  lpc43_putreg(presc_val - 1, priv->base + LPC43_TMR_PR_OFFSET);
+
+  /* Set MR0 with a large enough initial value */
+
+  lpc43_putreg(10000000, priv->base + LPC43_TMR_MR0_OFFSET);
+
+  if (priv->callback)
+    {
+      /* Enable Match on MR0 generate interrupt and auto-restart */
+
+      lpc43_putreg(3, priv->base + LPC43_TMR_MCR_OFFSET);
+    }
+
+  /* Enable the timer */
+
+  lpc43_putreg(TMR_TCR_EN, priv->base + LPC43_TMR_TCR_OFFSET);
+
+  priv->started = true;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: lpc43_stop
+ *
+ * Description:
+ *   Stop the timer
+ *
+ * Input Parameters:
+ *   lower - A pointer the publicly visible representation of the "lower-half"
+ *           driver state structure.
+ *
+ * Returned Values:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+static int lpc43_stop(FAR struct timer_lowerhalf_s *lower)
+{
+  FAR struct lpc43_lowerhalf_s *priv = (FAR struct lpc43_lowerhalf_s *)lower;
+  tmrinfo("Entry\n");
+  DEBUGASSERT(priv);
+
+  if (!priv->started)
+    {
+      return -EINVAL;
+    }
+
+  /* Disable timer */
+
+  lpc43_putreg(0, priv->base + LPC43_TMR_TCR_OFFSET);
+
+  /* Disable interrupt */
+
+  lpc43_putreg(0, priv->base + LPC43_TMR_MCR_OFFSET);
+
+  /* Disable timer clock */
+
+  tmr_clk_disable(priv->tmrid);
+
+  priv->started = false;
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: lpc43_getstatus
+ *
+ * Description:
+ *   Get the current timer status
+ *
+ * Input Parameters:
+ *   lower  - A pointer the publicly visible representation of the "lower-
+ *            half" driver state structure.
+ *   status - The location to return the status information.
+ *
+ * Returned Values:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+static int lpc43_getstatus(FAR struct timer_lowerhalf_s *lower,
+                           FAR struct timer_status_s *status)
+{
+  FAR struct lpc43_lowerhalf_s *priv = (FAR struct lpc43_lowerhalf_s *)lower;
+  uint32_t elapsed;
+
+  tmrinfo("Entry\n");
+  DEBUGASSERT(priv);
+
+  /* Return the status bit */
+
+  status->flags = 0;
+  if (priv->started)
+    {
+      status->flags |= TCFLAGS_ACTIVE;
+    }
+
+  if (priv->callback)
+    {
+      status->flags |= TCFLAGS_HANDLER;
+    }
+
+  /* Return the actual timeout is milliseconds */
+
+  status->timeout = priv->timeout;
+
+  /* Get the time remaining until the timer expires (in microseconds) */
+  /* TODO - check on the +1 in the time left calculation */
+
+  elapsed = lpc43_getreg(priv->base + LPC43_TMR_TC_OFFSET);
+  status->timeleft = ((uint64_t)priv->timeout * elapsed) /
+    (priv->clkticks + 1);
+
+  tmrinfo("  flags    : %08x\n", status->flags);
+  tmrinfo("  timeout  : %d\n", status->timeout);
+  tmrinfo("  timeleft : %d\n", status->timeleft);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: lpc43_settimeout
+ *
+ * Description:
+ *   Set a new timeout value (and reset the timer)
+ *
+ * Input Parameters:
+ *   lower   - A pointer the publicly visible representation of the "lower
+ *             half" driver state structure.
+ *   timeout - The new timeout value in milliseconds.
+ *
+ * Returned Values:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+static int lpc43_settimeout(FAR struct timer_lowerhalf_s *lower,
+                            uint32_t timeout)
+{
+  FAR struct lpc43_lowerhalf_s *priv = (FAR struct lpc43_lowerhalf_s *)lower;
+
+  DEBUGASSERT(priv);
+
+  if (priv->started)
+    {
+      return -EPERM;
+    }
+
+  tmrinfo("Entry: timeout=%d\n", timeout);
+
+  /* Can this timeout be represented? */
+
+  if (timeout < 1 || timeout > TMR_MAXTIMEOUT)
+    {
+      tmrerr("ERROR: Cannot represent timeout=%lu > %lu\n",
+             timeout, TMR_MAXTIMEOUT);
+      return -ERANGE;
+    }
+
+  /* Intended timeout */
+
+  priv->timeout = timeout;
+
+  /* Actual clock ticks */
+
+  priv->clkticks = (((uint64_t)timeout * TMR_FCLK) / 1000000);
+
+  /* Truncated timeout */
+
+  timeout = (1000000ULL * priv->clkticks) / TMR_FCLK;
+
+  /* Truncated time to be added to next interval (dither) */
+
+  priv->adjustment = priv->timeout - timeout;
+
+  tmrinfo("fclk=%d clkticks=%d timout=%d, adjustment=%d\n",
+          TMR_FCLK, priv->clkticks, priv->timeout, priv->adjustment);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: lpc43_setcallback
+ *
+ * Description:
+ *   Call this user provided timeout callback.
+ *
+ * Input Parameters:
+ *   lower      - A pointer the publicly visible representation of the "lower-half"
+ *                driver state structure.
+ *   newcallback - The new timer expiration function pointer.  If this
+ *                function pointer is NULL, then the reset-on-expiration
+ *                behavior is restored,
+ *
+ * Returned Values:
+ *   The previous timer expiration function pointer or NULL is there was
+ *   no previous function pointer.
+ *
+ ****************************************************************************/
+
+static void lpc43_setcallback(FAR struct timer_lowerhalf_s *lower,
+                               tccb_t callback, FAR void *arg)
+{
+  FAR struct lpc43_lowerhalf_s *priv = (FAR struct lpc43_lowerhalf_s *)lower;
+  irqstate_t flags;
+
+  flags = enter_critical_section();
+
+  DEBUGASSERT(priv);
+  tmrinfo("Entry: callback=%p\n", callback);
+
+  /* Save the new callback and its argument */
+
+   priv->callback = callback;
+   priv->arg      = arg;
+
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: lpc43_ioctl
+ *
+ * Description:
+ *   Any ioctl commands that are not recognized by the "upper-half" driver
+ *   are forwarded to the lower half driver through this method.
+ *
+ * Input Parameters:
+ *   lower - A pointer the publicly visible representation of the "lower-half"
+ *           driver state structure.
+ *   cmd   - The ioctl command value
+ *   arg   - The optional argument that accompanies the 'cmd'.  The
+ *           interpretation of this argument depends on the particular
+ *           command.
+ *
+ * Returned Values:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+static int lpc43_ioctl(FAR struct timer_lowerhalf_s *lower, int cmd,
+                    unsigned long arg)
+{
+  FAR struct lpc43_lowerhalf_s *priv = (FAR struct lpc43_lowerhalf_s *)lower;
+  int ret = -ENOTTY;
+
+  DEBUGASSERT(priv);
+  tmrinfo("Entry: cmd=%d arg=%ld\n", cmd, arg);
+  UNUSED(priv);
+
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lpc43_tmrinitialize
+ *
+ * Description:
+ *   Initialize the timer.  The timer is initialized and
+ *   registers as 'devpath'.
+ *
+ * Input Parameters:
+ *   devpath - The full path to the timer.  This should be of the form
+ *     /dev/tmr0
+ *
+ * Returned Values:
+ *   None
+ *
+ ****************************************************************************/
+
+void lpc43_tmrinitialize(FAR const char *devpath, int irq)
+{
+  FAR struct lpc43_lowerhalf_s *priv = &g_tmrdevs[irq-LPC43M4_IRQ_TIMER0];
+
+  tmrinfo("Entry: devpath=%s\n", devpath);
+  DEBUGASSERT((irq >= LPC43M4_IRQ_TIMER0) && (irq <= LPC43M4_IRQ_TIMER3));
+
+  /* Initialize the driver state structure.  Here we assume: (1) the state
+   * structure lies in .bss and was zeroed at reset time.  (2) This function
+   * is only called once so it is never necessary to re-zero the structure.
+   */
+
+  switch (irq)
+    {
+#if defined(CONFIG_LPC43_TMR0)
+    case LPC43M4_IRQ_TIMER0:
+      priv->base = LPC43_TIMER0_BASE;
+      priv->tmrid = 0;
+      tmrinfo("Using: Timer 0");
+      break;
+#endif
+
+#if defined(CONFIG_LPC43_TMR1)
+    case LPC43M4_IRQ_TIMER1:
+      priv->base = LPC43_TIMER1_BASE;
+      priv->tmrid = 1;
+      tmrinfo("Using: Timer 1");
+      break;
+#endif
+
+#if defined(CONFIG_LPC43_TMR2)
+    case LPC43M4_IRQ_TIMER2:
+      priv->base = LPC43_TIMER2_BASE;
+      priv->tmrid = 2;
+      tmrinfo("Using: Timer 2");
+      break;
+#endif
+
+#if defined(CONFIG_LPC43_TMR3)
+    case LPC43M4_IRQ_TIMER3:
+      priv->base = LPC43_TIMER3_BASE;
+      priv->tmrid = 3;
+      tmrinfo("Using: Timer 3");
+      break;
+#endif
+
+    default:
+      ASSERT(0);
+    }
+
+  priv->ops = &g_tmrops;
+
+  (void)irq_attach(irq, lpc43_interrupt, NULL);
+
+  /* Enable NVIC interrupt. */
+
+  up_enable_irq(irq);
+
+  /* Register the timer driver as /dev/timerX */
+
+  (void)timer_register(devpath, (FAR struct timer_lowerhalf_s *)priv);
+}
+
+#endif /* CONFIG_TIMER && CONFIG_LPC43_TMRx */
diff --git a/arch/arm/src/lpc43xx/lpc43_timer.h b/arch/arm/src/lpc43xx/lpc43_timer.h
new file mode 100644
index 0000000000000000000000000000000000000000..194d917c3179d58837af19a93a1d6fc95043f9dd
--- /dev/null
+++ b/arch/arm/src/lpc43xx/lpc43_timer.h
@@ -0,0 +1,100 @@
+/****************************************************************************
+ * arch/arm/src/sam34/lpc43_tc.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            Alan Carvalho de Assis 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_LPC43_TMR_H
+#define __ARCH_ARM_SRC_LPC43_TMR_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include "chip.h"
+#include "chip/lpc43_timer.h"
+#include "chip/lpc43_ccu.h"
+
+#ifdef CONFIG_TIMER
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lpc43_tmrinitialize
+ *
+ * Description:
+ *   Initialize the timer.  The timer is initialized and
+ *   registers as 'devpath.  The initial state of the timer is
+ *   disabled.
+ *
+ * Input Parameters:
+ *   devpath - The full path to the timer.  This should be of the form
+ *     /dev/timer0
+ *   irq - irq associated with the timer
+ * Returned Values:
+ *   None
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_LPC43_TMR0) || defined(CONFIG_LPC43_TMR1) || \
+    defined(CONFIG_LPC43_TMR2) || defined(CONFIG_LPC43_TMR3)
+void lpc43_tmrinitialize(FAR const char *devpath, int irq);
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* CONFIG_TIMER */
+#endif /* __ARCH_ARM_SRC_LPC43_TMR_H */
diff --git a/arch/arm/src/lpc43xx/lpc43_timerisr.c b/arch/arm/src/lpc43xx/lpc43_timerisr.c
index 2b728f7fb4316d717ed218e72026a1baec698d98..a76cd54dc362f9cc994b23952e4c436ad5690e2a 100644
--- a/arch/arm/src/lpc43xx/lpc43_timerisr.c
+++ b/arch/arm/src/lpc43xx/lpc43_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/lpc43xx/lpc43_timerisr.c
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -78,19 +78,11 @@
 #endif
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  lpc43_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -98,7 +90,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int lpc43_timerisr(int irq, uint32_t *regs, void *arg)
 {
   /* Process timer interrupt */
 
@@ -107,7 +99,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -115,7 +111,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t regval;
 
@@ -138,7 +134,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(LPC43_IRQ_SYSTICK, (xcpt_t)up_timerisr);
+  (void)irq_attach(LPC43_IRQ_SYSTICK, (xcpt_t)lpc43_timerisr, NULL);
 
   /* Enable SysTick interrupts */
 
diff --git a/arch/arm/src/lpc43xx/lpc43_uart.c b/arch/arm/src/lpc43xx/lpc43_uart.c
index 88d7950e6ac1eb8423d883f1476981fc9b47cd83..64f1ec32e285cca246df3e8f31e58b34d9d5d17a 100644
--- a/arch/arm/src/lpc43xx/lpc43_uart.c
+++ b/arch/arm/src/lpc43xx/lpc43_uart.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/lpc43xx/lpc43_uart.c
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -60,104 +60,87 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* Select UART parameters for the selected console */
-
-#if defined(CONFIG_USART0_SERIAL_CONSOLE)
-#  define CONSOLE_BASE     LPC43_USART0_BASE
-#  define CONSOLE_BASEFREQ BOARD_USART0_BASEFREQ
-#  define CONSOLE_BAUD     CONFIG_USART0_BAUD
-#  define CONSOLE_BITS     CONFIG_USART0_BITS
-#  define CONSOLE_PARITY   CONFIG_USART0_PARITY
-#  define CONSOLE_2STOP    CONFIG_USART0_2STOP
-#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
-#  define CONSOLE_BASE     LPC43_UART1_BASE
-#  define CONSOLE_BASEFREQ BOARD_UART1_BASEFREQ
-#  define CONSOLE_BAUD     CONFIG_UART1_BAUD
-#  define CONSOLE_BITS     CONFIG_UART1_BITS
-#  define CONSOLE_PARITY   CONFIG_UART1_PARITY
-#  define CONSOLE_2STOP    CONFIG_UART1_2STOP
-#elif defined(CONFIG_USART2_SERIAL_CONSOLE)
-#  define CONSOLE_BASE     LPC43_USART2_BASE
-#  define CONSOLE_BASEFREQ BOARD_USART2_BASEFREQ
-#  define CONSOLE_BAUD     CONFIG_USART2_BAUD
-#  define CONSOLE_BITS     CONFIG_USART2_BITS
-#  define CONSOLE_PARITY   CONFIG_USART2_PARITY
-#  define CONSOLE_2STOP    CONFIG_USART2_2STOP
-#elif defined(CONFIG_USART3_SERIAL_CONSOLE)
-#  define CONSOLE_BASE     LPC43_USART3_BASE
-#  define CONSOLE_BASEFREQ BOARD_USART3_BASEFREQ
-#  define CONSOLE_BAUD     CONFIG_USART3_BAUD
-#  define CONSOLE_BITS     CONFIG_USART3_BITS
-#  define CONSOLE_PARITY   CONFIG_USART3_PARITY
-#  define CONSOLE_2STOP    CONFIG_USART3_2STOP
-#elif defined(HAVE_CONSOLE)
-#  error "No CONFIG_UARTn_SERIAL_CONSOLE Setting"
-#endif
-
-/* Get word length setting for the console */
-
-#if CONSOLE_BITS == 5
-#  define CONSOLE_LCR_WLS UART_LCR_WLS_5BIT
-#elif CONSOLE_BITS == 6
-#  define CONSOLE_LCR_WLS UART_LCR_WLS_6BIT
-#elif CONSOLE_BITS == 7
-#  define CONSOLE_LCR_WLS UART_LCR_WLS_7BIT
-#elif CONSOLE_BITS == 8
-#  define CONSOLE_LCR_WLS UART_LCR_WLS_8BIT
-#elif defined(HAVE_CONSOLE)
-#  error "Invalid CONFIG_UARTn_BITS setting for console "
-#endif
-
-/* Get parity setting for the console */
-
-#if CONSOLE_PARITY == 0
-#  define CONSOLE_LCR_PAR 0
-#elif CONSOLE_PARITY == 1
-#  define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_ODD)
-#elif CONSOLE_PARITY == 2
-#  define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_EVEN)
-#elif CONSOLE_PARITY == 3
-#  define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_STICK1)
-#elif CONSOLE_PARITY == 4
-#  define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_STICK0)
-#elif defined(HAVE_CONSOLE)
+#ifdef HAVE_SERIAL_CONSOLE
+  /* Select UART parameters for the selected console */
+
+#  if defined(CONFIG_USART0_SERIAL_CONSOLE)
+#    define CONSOLE_BASE     LPC43_USART0_BASE
+#    define CONSOLE_BASEFREQ BOARD_USART0_BASEFREQ
+#    define CONSOLE_BAUD     CONFIG_USART0_BAUD
+#    define CONSOLE_BITS     CONFIG_USART0_BITS
+#    define CONSOLE_PARITY   CONFIG_USART0_PARITY
+#    define CONSOLE_2STOP    CONFIG_USART0_2STOP
+#  elif defined(CONFIG_UART1_SERIAL_CONSOLE)
+#    define CONSOLE_BASE     LPC43_UART1_BASE
+#    define CONSOLE_BASEFREQ BOARD_UART1_BASEFREQ
+#    define CONSOLE_BAUD     CONFIG_UART1_BAUD
+#    define CONSOLE_BITS     CONFIG_UART1_BITS
+#    define CONSOLE_PARITY   CONFIG_UART1_PARITY
+#    define CONSOLE_2STOP    CONFIG_UART1_2STOP
+#  elif defined(CONFIG_USART2_SERIAL_CONSOLE)
+#    define CONSOLE_BASE     LPC43_USART2_BASE
+#    define CONSOLE_BASEFREQ BOARD_USART2_BASEFREQ
+#    define CONSOLE_BAUD     CONFIG_USART2_BAUD
+#    define CONSOLE_BITS     CONFIG_USART2_BITS
+#    define CONSOLE_PARITY   CONFIG_USART2_PARITY
+#    define CONSOLE_2STOP    CONFIG_USART2_2STOP
+#  elif defined(CONFIG_USART3_SERIAL_CONSOLE)
+#    define CONSOLE_BASE     LPC43_USART3_BASE
+#    define CONSOLE_BASEFREQ BOARD_USART3_BASEFREQ
+#    define CONSOLE_BAUD     CONFIG_USART3_BAUD
+#    define CONSOLE_BITS     CONFIG_USART3_BITS
+#    define CONSOLE_PARITY   CONFIG_USART3_PARITY
+#    define CONSOLE_2STOP    CONFIG_USART3_2STOP
+#  elif defined(HAVE_SERIAL_CONSOLE)
+#    error "No CONFIG_UARTn_SERIAL_CONSOLE Setting"
+#  endif
+
+  /* Get word length setting for the console */
+
+#  if CONSOLE_BITS == 5
+#    define CONSOLE_LCR_WLS UART_LCR_WLS_5BIT
+#  elif CONSOLE_BITS == 6
+#    define CONSOLE_LCR_WLS UART_LCR_WLS_6BIT
+#  elif CONSOLE_BITS == 7
+#    define CONSOLE_LCR_WLS UART_LCR_WLS_7BIT
+#  elif CONSOLE_BITS == 8
+#    define CONSOLE_LCR_WLS UART_LCR_WLS_8BIT
+#  elif defined(HAVE_SERIAL_CONSOLE)
+#    error "Invalid CONFIG_UARTn_BITS setting for console "
+#  endif
+
+  /* Get parity setting for the console */
+
+#  if CONSOLE_PARITY == 0
+#    define CONSOLE_LCR_PAR 0
+#  elif CONSOLE_PARITY == 1
+#    define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_ODD)
+#  elif CONSOLE_PARITY == 2
+#    define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_EVEN)
+#  elif CONSOLE_PARITY == 3
+#    define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_STICK1)
+#  elif CONSOLE_PARITY == 4
+#    define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_STICK0)
+#  elif defined(HAVE_SERIAL_CONSOLE)
 #    error "Invalid CONFIG_UARTn_PARITY setting for CONSOLE"
-#endif
-
-/* Get stop-bit setting for the console and USART0/2/3, UART1 */
-
-#if CONSOLE_2STOP != 0
-#  define CONSOLE_LCR_STOP UART_LCR_STOP
-#else
-#  define CONSOLE_LCR_STOP 0
-#endif
-
-/* LCR and FCR values for the console */
+#  endif
 
-#define CONSOLE_LCR_VALUE (CONSOLE_LCR_WLS | CONSOLE_LCR_PAR | \
-                           CONSOLE_LCR_STOP)
-#define CONSOLE_FCR_VALUE (UART_FCR_RXTRIGGER_8 | UART_FCR_TXRST |\
-                           UART_FCR_RXRST | UART_FCR_FIFOEN)
+  /* Get stop-bit setting for the console and USART0/2/3, UART1 */
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
+#  if CONSOLE_2STOP != 0
+#    define CONSOLE_LCR_STOP UART_LCR_STOP
+#  else
+#    define CONSOLE_LCR_STOP 0
+#  endif
 
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
+  /* LCR and FCR values for the console */
 
-/****************************************************************************
- * Public Data
- ****************************************************************************/
+#  define CONSOLE_LCR_VALUE (CONSOLE_LCR_WLS | CONSOLE_LCR_PAR | \
+                             CONSOLE_LCR_STOP)
+#  define CONSOLE_FCR_VALUE (UART_FCR_RXTRIGGER_8 | UART_FCR_TXRST |\
+                             UART_FCR_RXRST | UART_FCR_FIFOEN)
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
+#endif
 
 /****************************************************************************
  * Public Functions
@@ -173,7 +156,7 @@
 
 void up_lowputc(char ch)
 {
-#if defined HAVE_UART && defined HAVE_CONSOLE
+#ifdef HAVE_SERIAL_CONSOLE
   /* Wait for the transmitter to be available */
 
   while ((getreg32(CONSOLE_BASE+LPC43_UART_LSR_OFFSET) & UART_LSR_THRE) == 0);
@@ -228,7 +211,7 @@ void lpc43_lowsetup(void)
 
   /* Configure the console (only) */
 
-#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
+#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
 
   /* Clear fifos */
 
@@ -364,7 +347,31 @@ void lpc43_usart0_setup(void)
 
 #ifdef CONFIG_USART0_RS485MODE
   lpc43_pin_config(PINCONF_U0_DIR);
-#endif
+
+  /* Enable direction output pin */
+
+  regval = getreg32(LPC43_USART0_RS485CTRL);
+  regval |= UART_RS485CTRL_DCTRL;
+  putreg32(regval, LPC43_USART0_RS485CTRL);
+
+#ifdef CONFIG_USART0_RS485DIROIN
+
+  /* Invert direction control output pin polarity */
+
+  regval = getreg32(LPC43_USART0_RS485CTRL);
+  regval |= UART_RS485CTRL_OINV;
+  putreg32(regval, LPC43_USART0_RS485CTRL);
+
+#else
+
+  /* Do not invert direction countrol output pin polarity */
+
+  regval = getreg32(LPC43_USART0_RS485CTRL);
+  regval &= ~(UART_RS485CTRL_OINV);
+  putreg32(regval, LPC43_USART0_RS485CTRL);
+
+#endif /* CONFIG_USART0_RS485DIROIN */
+#endif /* CONFIG_USART0_RS485MODE */
 
   leave_critical_section(flags);
 };
@@ -467,7 +474,31 @@ void lpc43_usart2_setup(void)
 
 #ifdef CONFIG_USART2_RS485MODE
   lpc43_pin_config(PINCONF_U2_DIR);
-#endif
+
+  /* Enable direction output pin */
+
+  regval = getreg32(LPC43_USART2_RS485CTRL);
+  regval |= UART_RS485CTRL_DCTRL;
+  putreg32(regval, LPC43_USART2_RS485CTRL);
+
+#ifdef CONFIG_USART2_RS485DIROIN
+
+  /* Invert direction control output pin polarity */
+
+  regval = getreg32(LPC43_USART2_RS485CTRL);
+  regval |= UART_RS485CTRL_OINV;
+  putreg32(regval, LPC43_USART2_RS485CTRL);
+
+#else
+
+  /* Do not invert direction countrol output pin polarity */
+
+  regval = getreg32(LPC43_USART2_RS485CTRL);
+  regval &= ~(UART_RS485CTRL_OINV);
+  putreg32(regval, LPC43_USART2_RS485CTRL);
+
+#endif /* CONFIG_USART2_RS485DIROIN */
+#endif /* CONFIG_USART2_RS485MODE */
 
   leave_critical_section(flags);
 };
@@ -516,7 +547,31 @@ void lpc43_usart3_setup(void)
 
 #ifdef CONFIG_USART3_RS485MODE
   lpc43_pin_config(PINCONF_U3_DIR);
-#endif
+
+  /* Enable direction output pin */
+
+  regval = getreg32(LPC43_USART3_RS485CTRL);
+  regval |= UART_RS485CTRL_DCTRL;
+  putreg32(regval, LPC43_USART3_RS485CTRL);
+
+#ifdef CONFIG_USART3_RS485DIROIN
+
+  /* Invert direction control output pin polarity */
+
+  regval = getreg32(LPC43_USART3_RS485CTRL);
+  regval |= UART_RS485CTRL_OINV;
+  putreg32(regval, LPC43_USART3_RS485CTRL);
+
+#else
+
+  /* Do not invert direction countrol output pin polarity */
+
+  regval = getreg32(LPC43_USART3_RS485CTRL);
+  regval &= ~(UART_RS485CTRL_OINV);
+  putreg32(regval, LPC43_USART3_RS485CTRL);
+
+#endif /* CONFIG_USART3_RS485DIROIN */
+#endif /* CONFIG_USART3_RS485MODE */
 
   leave_critical_section(flags);
 };
diff --git a/arch/arm/src/lpc43xx/lpc43_usb0dev.c b/arch/arm/src/lpc43xx/lpc43_usb0dev.c
index 57e3ef2c8ce7a934c7e606182a53b1ab49403721..26bb600270b1c726c68ff0a11d1cef867da44438 100644
--- a/arch/arm/src/lpc43xx/lpc43_usb0dev.c
+++ b/arch/arm/src/lpc43xx/lpc43_usb0dev.c
@@ -107,7 +107,7 @@
 #  define USB_FRAME_INT 0
 #endif
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 #  define USB_ERROR_INT USBDEV_USBINTR_UEE
 #else
 #  define USB_ERROR_INT 0
@@ -361,7 +361,7 @@ struct lpc43_usbdev_s
 
 /* Register operations ********************************************************/
 
-#if defined(CONFIG_LPC43_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_LPC43_USBDEV_REGDEBUG
 static uint32_t lpc43_getreg(uint32_t addr);
 static void lpc43_putreg(uint32_t val, uint32_t addr);
 #else
@@ -415,7 +415,7 @@ static void        lpc43_ep0complete(struct lpc43_usbdev_s *priv, uint8_t epphy)
 static void        lpc43_ep0nak(struct lpc43_usbdev_s *priv, uint8_t epphy);
 static bool        lpc43_epcomplete(struct lpc43_usbdev_s *priv, uint8_t epphy);
 
-static int         lpc43_usbinterrupt(int irq, FAR void *context);
+static int         lpc43_usbinterrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Endpoint operations *********************************************************/
 
@@ -501,7 +501,7 @@ static const struct usbdev_ops_s g_devops =
  *
  ****************************************************************************/
 
-#if defined(CONFIG_LPC43_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_LPC43_USBDEV_REGDEBUG
 static uint32_t lpc43_getreg(uint32_t addr)
 {
   static uint32_t prevaddr = 0;
@@ -522,7 +522,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              usbinfo("...\n");
             }
 
           return val;
@@ -539,7 +539,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          usbinfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -551,7 +551,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%08x\n", addr, val);
+  usbinfo("%08x->%08x\n", addr, val);
   return val;
 }
 #endif
@@ -564,12 +564,12 @@ static uint32_t lpc43_getreg(uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_LPC43_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_LPC43_USBDEV_REGDEBUG
 static void lpc43_putreg(uint32_t val, uint32_t addr)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", addr, val);
+  usbinfo("%08x<-%08x\n", addr, val);
 
   /* Write the value */
 
@@ -1228,8 +1228,8 @@ static inline void lpc43_ep0setup(struct lpc43_usbdev_s *priv)
 
   priv->ep0buf_len = len;
 
-  ullvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
-          ctrl->type, ctrl->req, value, index, len);
+  uinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+        ctrl->type, ctrl->req, value, index, len);
 
   /* Starting a control request - update state */
 
@@ -1393,7 +1393,7 @@ static inline void lpc43_ep0setup(struct lpc43_usbdev_s *priv)
           if (((ctrl->type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE) &&
               value == USB_FEATURE_TESTMODE)
             {
-              ullvdbg("test mode: %d\n", index);
+              uinfo("test mode: %d\n", index);
             }
           else if ((ctrl->type & USB_REQ_RECIPIENT_MASK) != USB_REQ_RECIPIENT_ENDPOINT)
             {
@@ -1623,7 +1623,7 @@ static void lpc43_ep0complete(struct lpc43_usbdev_s *priv, uint8_t epphy)
       break;
 
     default:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       DEBUGASSERT(priv->ep0state != EP0STATE_DATA_IN &&
           priv->ep0state != EP0STATE_DATA_OUT        &&
           priv->ep0state != EP0STATE_SHORTWRITE      &&
@@ -1667,7 +1667,7 @@ static void lpc43_ep0nak(struct lpc43_usbdev_s *priv, uint8_t epphy)
       break;
 
     default:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       DEBUGASSERT(priv->ep0state != EP0STATE_WAIT_NAK_IN &&
                   priv->ep0state != EP0STATE_WAIT_NAK_OUT);
 #endif
@@ -1766,7 +1766,7 @@ bool lpc43_epcomplete(struct lpc43_usbdev_s *priv, uint8_t epphy)
  *
  ****************************************************************************/
 
-static int lpc43_usbinterrupt(int irq, FAR void *context)
+static int lpc43_usbinterrupt(int irq, FAR void *context, FAR void *arg)
 {
   struct lpc43_usbdev_s *priv = &g_usbdev;
   uint32_t disr, portsc1, n;
@@ -2056,7 +2056,7 @@ static int lpc43_epdisable(FAR struct usbdev_ep_s *ep)
   FAR struct lpc43_ep_s *privep = (FAR struct lpc43_ep_s *)ep;
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(LPC43_TRACEERR_INVALIDPARMS), 0);
@@ -2100,7 +2100,7 @@ static FAR struct usbdev_req_s *lpc43_epallocreq(FAR struct usbdev_ep_s *ep)
 {
   FAR struct lpc43_req_s *privreq;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(LPC43_TRACEERR_INVALIDPARMS), 0);
@@ -2132,7 +2132,7 @@ static void lpc43_epfreereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
 {
   FAR struct lpc43_req_s *privreq = (FAR struct lpc43_req_s *)req;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(LPC43_TRACEERR_INVALIDPARMS), 0);
@@ -2202,11 +2202,11 @@ static int lpc43_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
   irqstate_t flags;
   int ret = OK;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!req || !req->callback || !req->buf || !ep)
     {
       usbtrace(TRACE_DEVERROR(LPC43_TRACEERR_INVALIDPARMS), 0);
-      ullvdbg("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+      uinfo("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
       return -EINVAL;
     }
 #endif
@@ -2271,7 +2271,7 @@ static int lpc43_epcancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
   FAR struct lpc43_ep_s *privep = (FAR struct lpc43_ep_s *)ep;
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(LPC43_TRACEERR_INVALIDPARMS), 0);
@@ -2554,7 +2554,7 @@ static int lpc43_selfpowered(struct usbdev_s *dev, bool selfpowered)
 
   usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(LPC43_TRACEERR_INVALIDPARMS), 0);
@@ -2722,7 +2722,7 @@ void up_usbinitialize(void)
 
   /* Attach USB controller interrupt handler */
 
-  irq_attach(LPC43M4_IRQ_USB0, lpc43_usbinterrupt);
+  irq_attach(LPC43M4_IRQ_USB0, lpc43_usbinterrupt, NULL);
   up_enable_irq(LPC43M4_IRQ_USB0);
 
   leave_critical_section(flags);
@@ -2790,7 +2790,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
 
   usbtrace(TRACE_DEVREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !driver->ops->bind || !driver->ops->unbind ||
       !driver->ops->disconnect || !driver->ops->setup)
     {
@@ -2851,7 +2851,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
 {
   usbtrace(TRACE_DEVUNREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (driver != g_usbdev.driver)
     {
       usbtrace(TRACE_DEVERROR(LPC43_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/lpc43xx/spifi/src/spifilib_dev_common.c b/arch/arm/src/lpc43xx/spifi/src/spifilib_dev_common.c
index 8adc8f762b30af84b5ef7cfa5691bf07b03dbe88..c3e0a7b53bb6962b59e405be075183af275a8834 100644
--- a/arch/arm/src/lpc43xx/spifi/src/spifilib_dev_common.c
+++ b/arch/arm/src/lpc43xx/spifi/src/spifilib_dev_common.c
@@ -785,50 +785,50 @@ uint32_t spifiGetSubBlockFromBlock(const SPIFI_HANDLE_T *pHandle, uint32_t block
 SPIFI_ERR_T spifiProgram(const SPIFI_HANDLE_T *pHandle, uint32_t addr, const uint32_t *writeBuff, uint32_t bytes)
 {
 	uint32_t sendBytes;
-	SPIFI_ERR_T err = SPIFI_ERR_NONE;
+	SPIFI_ERR_T errcode = SPIFI_ERR_NONE;
 
 	/* Program using up to page size */
-	while ((bytes > 0) && (err == SPIFI_ERR_NONE)) {
+	while ((bytes > 0) && (errcode == SPIFI_ERR_NONE)) {
 		sendBytes = bytes;
 		if (sendBytes > pHandle->pInfoData->pageSize) {
 			sendBytes = pHandle->pInfoData->pageSize;
 		}
 
-		err = pHandle->pFamFx->pageProgram(pHandle, addr, writeBuff, sendBytes);
+		errcode = pHandle->pFamFx->pageProgram(pHandle, addr, writeBuff, sendBytes);
 		addr += sendBytes;
 		writeBuff += (sendBytes >> 2);
 		bytes -= sendBytes;
 	}
 
-	return err;
+	return errcode;
 }
 
 /* Read the device into the passed buffer */
 SPIFI_ERR_T spifiRead(const SPIFI_HANDLE_T *pHandle, uint32_t addr, uint32_t *readBuff, uint32_t bytes)
 {
 	uint32_t readBytes;
-	SPIFI_ERR_T err = SPIFI_ERR_NONE;
+	SPIFI_ERR_T errcode = SPIFI_ERR_NONE;
 
 	/* Read using up to the maximum read size */
-	while ((bytes > 0) && (err == SPIFI_ERR_NONE)) {
+	while ((bytes > 0) && (errcode == SPIFI_ERR_NONE)) {
 		readBytes = bytes;
 		if (readBytes > pHandle->pInfoData->maxReadSize) {
 			readBytes = pHandle->pInfoData->maxReadSize;
 		}
 
-		err = pHandle->pFamFx->read(pHandle, addr, readBuff, readBytes);
+		errcode = pHandle->pFamFx->read(pHandle, addr, readBuff, readBytes);
 		addr += readBytes;
 		readBuff += (readBytes / sizeof(uint32_t));
 		bytes -= readBytes;
 	}
 
-	return err;
+	return errcode;
 }
 
 /* Erase multiple blocks */
 SPIFI_ERR_T spifiErase(const SPIFI_HANDLE_T *pHandle, uint32_t firstBlock, uint32_t numBlocks)
 {
-	SPIFI_ERR_T err = SPIFI_ERR_NONE;
+	SPIFI_ERR_T errcode = SPIFI_ERR_NONE;
 
 	if ((firstBlock + numBlocks) > pHandle->pInfoData->numBlocks) {
 		return SPIFI_ERR_RANGE;
@@ -836,20 +836,20 @@ SPIFI_ERR_T spifiErase(const SPIFI_HANDLE_T *pHandle, uint32_t firstBlock, uint3
 
 	/* Only perform erase if numBlocks is != 0 */
 	for (; (numBlocks); ++firstBlock, --numBlocks) {
-		err = pHandle->pFamFx->eraseBlock(pHandle, firstBlock);
-		if (err != SPIFI_ERR_NONE) {
+		errcode = pHandle->pFamFx->eraseBlock(pHandle, firstBlock);
+		if (errcode != SPIFI_ERR_NONE) {
 			break;
 		}
 	}
 
-	return err;
+	return errcode;
 }
 
 /* Erase multiple blocks by address range */
 SPIFI_ERR_T spifiEraseByAddr(const SPIFI_HANDLE_T *pHandle, uint32_t firstAddr, uint32_t lastAddr)
 {
 	uint32_t firstBlock, lastBlock;
-	SPIFI_ERR_T err = SPIFI_ERR_RANGE;
+	SPIFI_ERR_T errcode = SPIFI_ERR_RANGE;
 
 	/* Get block numbers for addresses */
 	firstBlock = spifiGetBlockFromAddr(pHandle, firstAddr);
@@ -857,8 +857,8 @@ SPIFI_ERR_T spifiEraseByAddr(const SPIFI_HANDLE_T *pHandle, uint32_t firstAddr,
 
 	/* Limit to legal address range */
 	if ((firstBlock != ~0UL) && (lastBlock != ~0UL)) {
-		err = spifiErase(pHandle, firstBlock, ((lastBlock - firstBlock) + 1));
+		errcode = spifiErase(pHandle, firstBlock, ((lastBlock - firstBlock) + 1));
 	}
 
-	return err;
+	return errcode;
 }
diff --git a/arch/arm/src/moxart/Make.defs b/arch/arm/src/moxart/Make.defs
index 48b9a21fa08d4588b5c052d5ab0b06e25e94d7f8..f76a29cb0b78bc9cf28c1a3d874c4bfce4c304fb 100644
--- a/arch/arm/src/moxart/Make.defs
+++ b/arch/arm/src/moxart/Make.defs
@@ -48,12 +48,6 @@ CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c
 CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_syscall.c up_unblocktask.c
 CMN_CSRCS += up_undefinedinsn.c up_usestack.c up_vfork.c up_etherstub.c
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c
-endif
-
 CHIP_ASRCS  = moxart_lowputc.S
 
 CHIP_CSRCS  = moxart_16550.c moxart_irq.c moxart_timer.c moxart_idle.c
diff --git a/arch/arm/src/moxart/moxart_irq.c b/arch/arm/src/moxart/moxart_irq.c
index 8d2b07cc22011c5136622e354ed77009d09ff99a..b81baeab21bf5c67bb464cc2243d30bfa6ac2be0 100644
--- a/arch/arm/src/moxart/moxart_irq.c
+++ b/arch/arm/src/moxart/moxart_irq.c
@@ -138,23 +138,20 @@ void up_irqinitialize(void)
 
   /* Setup UART shared interrupt */
 
-  irq_attach(CONFIG_UART_MOXA_SHARED_IRQ, uart_decodeirq);
+  irq_attach(CONFIG_UART_MOXA_SHARED_IRQ, uart_decodeirq, NULL);
   up_enable_irq(CONFIG_UART_MOXA_SHARED_IRQ);
 
   /* And finally, enable interrupts */
 
-#if 1
-#define REG(x) (*(volatile uint32_t *)(x))
-  lldbg("\n=============================================================\n");
-  lldbg("TM CNTL=%08x INTRS=%08x MASK=%08x LOAD=%08x COUNT=%08x M1=%08x\n",
-        REG(0x98400030), REG(0x98400034), REG(0x98400038), REG(0x98400004),
-        REG(0x98400000), REG(0x98400008));
-  lldbg("IRQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n",
-        REG(0x98800014), REG(0x98800004), REG(0x9880000C), REG(0x98800010));
-  lldbg("FIQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n",
-        REG(0x98800034), REG(0x98800024), REG(0x9880002C), REG(0x98800020));
-  lldbg("=============================================================\n");
-#endif
+  irqinfo("TM CNTL=%08x INTRS=%08x MASK=%08x LOAD=%08x COUNT=%08x M1=%08x\n",
+          getreg32(0x98400030), getreg32(0x98400034), getreg32(0x98400038),
+          getreg32(0x98400004), getreg32(0x98400000), getreg32(0x98400008));
+  irqinfo("IRQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n",
+          getreg32(0x98800014), getreg32(0x98800004), getreg32(0x9880000C),
+          getreg32(0x98800010));
+  irqinfo("FIQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n",
+          getreg32(0x98800034), getreg32(0x98800024), getreg32(0x9880002C),
+          getreg32(0x98800020));
 
 #ifndef CONFIG_SUPPRESS_INTERRUPTS
   up_irq_restore(SVC_MODE | PSR_F_BIT);
diff --git a/arch/arm/src/moxart/moxart_timer.c b/arch/arm/src/moxart/moxart_timer.c
index e2c115bee8ac0f358fbf156034b7bfe9e3490bc3..afc79e4d513405f9bbaff026f5d8bfd5211c325b 100644
--- a/arch/arm/src/moxart/moxart_timer.c
+++ b/arch/arm/src/moxart/moxart_timer.c
@@ -2,7 +2,7 @@
  * arch/arm/src/moxart/moxart_timer.c
  * MoxaRT internal Timer Driver
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Anton D. Kachalov 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -90,7 +90,7 @@ static uint32_t cmp = BOARD_32KOSC_FREQUENCY / 100;
  ****************************************************************************/
 
 /****************************************************************************
- * Function:  up_timerisr
+ * Function:  moxart_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -98,7 +98,7 @@ static uint32_t cmp = BOARD_32KOSC_FREQUENCY / 100;
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int moxart_timerisr(int irq, uint32_t *regs, void *arg)
 {
   uint32_t state;
 
@@ -117,7 +117,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   Setup MoxaRT timer 0 to cause system ticks.
@@ -127,7 +131,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t tmp;
 
@@ -144,7 +148,7 @@ void up_timer_initialize(void)
 
   /* Attach and enable the timer interrupt */
 
-  irq_attach(IRQ_SYSTIMER, (xcpt_t)up_timerisr);
+  irq_attach(IRQ_SYSTIMER, (xcpt_t)moxart_timerisr, NULL);
   up_enable_irq(IRQ_SYSTIMER);
   ftintc010_set_trig_mode(IRQ_SYSTIMER, 1);
   ftintc010_set_trig_level(IRQ_SYSTIMER, 0);
diff --git a/arch/arm/src/nuc1xx/Make.defs b/arch/arm/src/nuc1xx/Make.defs
index 3a9f06519125e649d5395e84056e24f1ec2bd0e6..4a2164a838bd561899bae051bc22fc329d095827 100644
--- a/arch/arm/src/nuc1xx/Make.defs
+++ b/arch/arm/src/nuc1xx/Make.defs
@@ -59,13 +59,7 @@ ifeq ($(CONFIG_STACK_COLORATION),y)
 CMN_CSRCS += up_checkstack.c
 endif
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c
-endif
-
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
 CMN_CSRCS += up_dumpnvic.c
 endif
 
@@ -81,6 +75,6 @@ ifeq ($(CONFIG_BUILD_PROTECTED),y)
 CHIP_CSRCS += nuc_userspace.c
 endif
 
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
 CHIP_CSRCS += nuc_dumpgpio.c
 endif
diff --git a/arch/arm/src/nuc1xx/nuc_dumpgpio.c b/arch/arm/src/nuc1xx/nuc_dumpgpio.c
index 480bb4f588d3d96e51bbf284e81488dda38ff8ad..82db651a69b96c1f4a8a3f09d6bcbd4fbe02c8e3 100644
--- a/arch/arm/src/nuc1xx/nuc_dumpgpio.c
+++ b/arch/arm/src/nuc1xx/nuc_dumpgpio.c
@@ -49,14 +49,13 @@
 #include "chip.h"
 #include "nuc_gpio.h"
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_GPIO_INFO
 
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 /* Port letters for prettier debug output */
 
-#ifdef CONFIG_DEBUG
 static const char g_portchar[NUC_GPIO_NPORTS] =
 {
 #if NUC_GPIO_NPORTS > 9
@@ -83,15 +82,6 @@ static const char g_portchar[NUC_GPIO_NPORTS] =
 #  error "Bad number of GPIOs"
 #endif
 };
-#endif
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
 
 /****************************************************************************
  * Public Functions
@@ -124,22 +114,22 @@ void nuc_dumpgpio(gpio_cfgset_t pinset, const char *msg)
 
   flags = enter_critical_section();
 
-  lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
-        g_portchar[port], pinset, base, msg);
-  lldbg("  PMD: %08x  OFFD: %08x  DOUT: %08x DMASK: %08x\n",
-        getreg32(base + NUC_GPIO_PMD_OFFSET),
-        getreg32(base + NUC_GPIO_OFFD_OFFSET),
-        getreg32(base + NUC_GPIO_DOUT_OFFSET),
-        getreg32(base + NUC_GPIO_DMASK_OFFSET));
-  lldbg("  PIN: %08x  DBEN: %08x   IMD: %08x   IEN: %08x\n",
-        getreg32(base + NUC_GPIO_PIN_OFFSET),
-        getreg32(base + NUC_GPIO_DBEN_OFFSET),
-        getreg32(base + NUC_GPIO_IMD_OFFSET),
-        getreg32(base + NUC_GPIO_IEN_OFFSET));
-  lldbg(" ISRC: %08x\n",
-        getreg32(base + NUC_GPIO_ISRC_OFFSET));
+  gpioinfo("GPIO%c pinset: %08x base: %08x -- %s\n",
+           g_portchar[port], pinset, base, msg);
+  gpioinfo("  PMD: %08x  OFFD: %08x  DOUT: %08x DMASK: %08x\n",
+           getreg32(base + NUC_GPIO_PMD_OFFSET),
+           getreg32(base + NUC_GPIO_OFFD_OFFSET),
+           getreg32(base + NUC_GPIO_DOUT_OFFSET),
+           getreg32(base + NUC_GPIO_DMASK_OFFSET));
+  gpioinfo("  PIN: %08x  DBEN: %08x   IMD: %08x   IEN: %08x\n",
+           getreg32(base + NUC_GPIO_PIN_OFFSET),
+           getreg32(base + NUC_GPIO_DBEN_OFFSET),
+           getreg32(base + NUC_GPIO_IMD_OFFSET),
+           getreg32(base + NUC_GPIO_IEN_OFFSET));
+  gpioinfo(" ISRC: %08x\n",
+           getreg32(base + NUC_GPIO_ISRC_OFFSET));
 
   leave_critical_section(flags);
 }
 
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_GPIO_INFO */
diff --git a/arch/arm/src/nuc1xx/nuc_gpio.h b/arch/arm/src/nuc1xx/nuc_gpio.h
index 52e9dd209506eb1c68801ffdd5a13b21ef635864..1fca1dc0e50933c0ae6f6a1142c67d8f7f6cac5a 100644
--- a/arch/arm/src/nuc1xx/nuc_gpio.h
+++ b/arch/arm/src/nuc1xx/nuc_gpio.h
@@ -245,7 +245,7 @@ bool nuc_gpioread(gpio_cfgset_t pinset);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 void nuc_dumpgpio(gpio_cfgset_t pinset, const char *msg);
 #else
 #  define nuc_dumpgpio(p,m)
diff --git a/arch/arm/src/nuc1xx/nuc_idle.c b/arch/arm/src/nuc1xx/nuc_idle.c
index 9dd225313f948d8c90e4e62fb2466fb4f373d43c..791ce2f09188b40822f8a32d8da2b619d9476242 100644
--- a/arch/arm/src/nuc1xx/nuc_idle.c
+++ b/arch/arm/src/nuc1xx/nuc_idle.c
@@ -99,7 +99,7 @@ static void up_idlepm(void)
 
       /* Perform board-specific, state-dependent logic here */
 
-      llvdbg("newstate= %d oldstate=%d\n", newstate, oldstate);
+      _info("newstate= %d oldstate=%d\n", newstate, oldstate);
 
       /* Then force the global state change */
 
diff --git a/arch/arm/src/nuc1xx/nuc_irq.c b/arch/arm/src/nuc1xx/nuc_irq.c
index 0bdb86a8ee91758b9abe40595dc4197cf239cce5..6fc6db1d2f5629ada2e7a8b44b8ba2465b2ebe92 100644
--- a/arch/arm/src/nuc1xx/nuc_irq.c
+++ b/arch/arm/src/nuc1xx/nuc_irq.c
@@ -90,34 +90,34 @@ volatile uint32_t *g_current_regs[1];
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_IRQ)
+#if defined(CONFIG_DEBUG_IRQ_INFO)
 static void nuc_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = enter_critical_section();
 
-  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  lldbg("  ISER:       %08x ICER:   %08x\n",
-        getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER));
-  lldbg("  ISPR:       %08x ICPR:   %08x\n",
-        getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
-  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
-        getreg32(ARMV6M_NVIC_IPR0), getreg32(ARMV6M_NVIC_IPR1),
-        getreg32(ARMV6M_NVIC_IPR2), getreg32(ARMV6M_NVIC_IPR3));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(ARMV6M_NVIC_IPR4), getreg32(ARMV6M_NVIC_IPR5),
-        getreg32(ARMV6M_NVIC_IPR6), getreg32(ARMV6M_NVIC_IPR7));
-
-  lldbg("SYSCON:\n");
-  lldbg("  CPUID:      %08x\n",
-        getreg32(ARMV6M_SYSCON_CPUID));
-  lldbg("  ICSR:       %08x AIRCR:  %08x\n",
-        getreg32(ARMV6M_SYSCON_ICSR), getreg32(ARMV6M_SYSCON_AIRCR));
-  lldbg("  SCR:        %08x CCR:    %08x\n",
-        getreg32(ARMV6M_SYSCON_SCR), getreg32(ARMV6M_SYSCON_CCR));
-  lldbg("  SHPR2:      %08x SHPR3:  %08x\n",
-        getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
+  irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
+  irqinfo("  ISER:       %08x ICER:   %08x\n",
+          getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER));
+  irqinfo("  ISPR:       %08x ICPR:   %08x\n",
+          getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
+  irqinfo("  IRQ PRIO:   %08x %08x %08x %08x\n",
+          getreg32(ARMV6M_NVIC_IPR0), getreg32(ARMV6M_NVIC_IPR1),
+          getreg32(ARMV6M_NVIC_IPR2), getreg32(ARMV6M_NVIC_IPR3));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(ARMV6M_NVIC_IPR4), getreg32(ARMV6M_NVIC_IPR5),
+          getreg32(ARMV6M_NVIC_IPR6), getreg32(ARMV6M_NVIC_IPR7));
+
+  irqinfo("SYSCON:\n");
+  irqinfo("  CPUID:      %08x\n",
+          getreg32(ARMV6M_SYSCON_CPUID));
+  irqinfo("  ICSR:       %08x AIRCR:  %08x\n",
+          getreg32(ARMV6M_SYSCON_ICSR), getreg32(ARMV6M_SYSCON_AIRCR));
+  irqinfo("  SCR:        %08x CCR:    %08x\n",
+          getreg32(ARMV6M_SYSCON_SCR), getreg32(ARMV6M_SYSCON_CCR));
+  irqinfo("  SHPR2:      %08x SHPR3:  %08x\n",
+          getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
 
   leave_critical_section(flags);
 }
@@ -137,27 +137,27 @@ static void nuc_dumpnvic(const char *msg, int irq)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
-static int nuc_nmi(int irq, FAR void *context)
+#ifdef CONFIG_DEBUG_FEATURES
+static int nuc_nmi(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! NMI received\n");
+  _err("PANIC!!! NMI received\n");
   PANIC();
   return 0;
 }
 
-static int nuc_pendsv(int irq, FAR void *context)
+static int nuc_pendsv(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! PendSV received\n");
+  _err("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
 }
 
-static int nuc_reserved(int irq, FAR void *context)
+static int nuc_reserved(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Reserved interrupt\n");
+  _err("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;
 }
@@ -231,15 +231,15 @@ void up_irqinitialize(void)
    * under certain conditions.
    */
 
-  irq_attach(NUC_IRQ_SVCALL, up_svcall);
-  irq_attach(NUC_IRQ_HARDFAULT, up_hardfault);
+  irq_attach(NUC_IRQ_SVCALL, up_svcall, NULL);
+  irq_attach(NUC_IRQ_HARDFAULT, up_hardfault, NULL);
 
   /* Attach all other processor exceptions (except reset and sys tick) */
 
-#ifdef CONFIG_DEBUG
-  irq_attach(NUC_IRQ_NMI, nuc_nmi);
-  irq_attach(NUC_IRQ_PENDSV, nuc_pendsv);
-  irq_attach(NUC_IRQ_RESERVED, nuc_reserved);
+#ifdef CONFIG_DEBUG_FEATURES
+  irq_attach(NUC_IRQ_NMI, nuc_nmi, NULL);
+  irq_attach(NUC_IRQ_PENDSV, nuc_pendsv, NULL);
+  irq_attach(NUC_IRQ_RESERVED, nuc_reserved, NULL);
 #endif
 
   nuc_dumpnvic("initial", NR_IRQS);
diff --git a/arch/arm/src/nuc1xx/nuc_serial.c b/arch/arm/src/nuc1xx/nuc_serial.c
index a098db77ce35c7cb69b9d561db051121a1da4f73..0932cfaf99d3dbc155b5220f8aafe6cdcf399494 100644
--- a/arch/arm/src/nuc1xx/nuc_serial.c
+++ b/arch/arm/src/nuc1xx/nuc_serial.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/nuc1xx/nuc_serial.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -101,7 +101,7 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-static int  up_interrupt(int irq, void *context);
+static int  up_interrupt(int irq, void *context, void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  up_receive(struct uart_dev_s *dev, uint32_t *status);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
@@ -568,7 +568,7 @@ static int up_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, up_interrupt);
+  ret = irq_attach(priv->irq, up_interrupt, dev);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
@@ -610,9 +610,9 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_interrupt(int irq, void *context)
+static int up_interrupt(int irq, void *context,  void *arg)
 {
-  struct uart_dev_s *dev = NULL;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct nuc_dev_s   *priv;
   uint32_t           isr;
   uint32_t           regval;
@@ -620,30 +620,7 @@ static int up_interrupt(int irq, void *context)
   bool               rxto;
   bool               rxfe;
 
-#ifdef CONFIG_NUC_UART0
-  if (g_uart0priv.irq == irq)
-    {
-      dev = &g_uart0port;
-    }
-  else
-#endif
-#ifdef CONFIG_NUC_UART1
-  if (g_uart1priv.irq == irq)
-    {
-      dev = &g_uart1port;
-    }
-  else
-#endif
-#ifdef CONFIG_NUC_UART2
-  if (g_uart2priv.irq == irq)
-    {
-      dev = &g_uart2port;
-    }
-  else
-#endif
-    {
-      PANIC();
-    }
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct nuc_dev_s *)dev->priv;
 
   /* Loop until there are no characters to be transferred or,
diff --git a/arch/arm/src/nuc1xx/nuc_start.c b/arch/arm/src/nuc1xx/nuc_start.c
index 3cbb5becdeefd337815e90a32aef0a00dea9d778..80c01077ae817643421d210c4bab4ba6e52c60ca 100644
--- a/arch/arm/src/nuc1xx/nuc_start.c
+++ b/arch/arm/src/nuc1xx/nuc_start.c
@@ -92,7 +92,7 @@ const uint32_t g_idle_topstack = IDLE_STACK;
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG) && defined(HAVE_SERIAL_CONSOLE)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(HAVE_SERIAL_CONSOLE)
 #  define showprogress(c) nuc_lowputc((uint32_t)c)
 #else
 #  define showprogress(c)
diff --git a/arch/arm/src/nuc1xx/nuc_timerisr.c b/arch/arm/src/nuc1xx/nuc_timerisr.c
index d30e81b85caad5bfaf9cae7ab6df9e8558853f56..02b99ba9ae7d68784e3cba30753e6d0bcf1bce2b 100644
--- a/arch/arm/src/nuc1xx/nuc_timerisr.c
+++ b/arch/arm/src/nuc1xx/nuc_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/nuc1xx/nuc_timerisr.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -100,11 +100,7 @@
 #endif
 
 /****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
@@ -152,11 +148,7 @@ static inline void nuc_lock(void)
 #endif
 
 /****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  nuc_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -164,7 +156,7 @@ static inline void nuc_lock(void)
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int nuc_timerisr(int irq, uint32_t *regs, void *arg)
 {
   /* Process timer interrupt */
 
@@ -173,7 +165,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -181,7 +177,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t regval;
 
@@ -230,7 +226,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(NUC_IRQ_SYSTICK, (xcpt_t)up_timerisr);
+  (void)irq_attach(NUC_IRQ_SYSTICK, (xcpt_t)nuc_timerisr, NULL);
 
   /* Enable SysTick interrupts.  We need to select the core clock here if
    * we are not using one of the alternative clock sources above.
diff --git a/arch/arm/src/sam34/Kconfig b/arch/arm/src/sam34/Kconfig
index b704da5674f8f1729b3fb05d6d2ef86d627661c3..e9d3a7aece43617403adaf4614e1609bd446a9b0 100644
--- a/arch/arm/src/sam34/Kconfig
+++ b/arch/arm/src/sam34/Kconfig
@@ -193,6 +193,11 @@ config ARCH_CHIP_ATSAM4S8B
 	select ARCH_CORTEXM4
 	select ARCH_CHIP_SAM4S
 
+config ARCH_CHIP_ATSAM4S4C
+	bool "ATSAM4S4C"
+	select ARCH_CORTEXM4
+	select ARCH_CHIP_SAM4S
+
 config ARCH_CHIP_ATSAM4E16E
 	bool "ATSAM4E16E"
 	select ARCH_CORTEXM4
@@ -240,6 +245,7 @@ config ARCH_CHIP_SAM3A
 config ARCH_CHIP_SAM4CM
 	bool
 	default n
+	select ARCH_HAVE_MULTICPU
 	select ARCH_HAVE_TICKLESS
 
 config ARCH_CHIP_SAM4L
@@ -1060,7 +1066,6 @@ config SAM34_TC5_TIOB
 
 config SAM34_ONESHOT
 	bool "TC one-shot wrapper"
-	depends on SAM34_FREERUN
 	default n if !SCHED_TICKLESS
 	default y if SCHED_TICKLESS
 	---help---
@@ -1118,7 +1123,7 @@ config SAM34_SPI_DMATHRESHOLD
 
 config SAM34_SPI_DMADEBUG
 	bool "SPI DMA transfer debug"
-	depends on SAM34_SPI_DMA && DEBUG && DEBUG_DMA
+	depends on SAM34_SPI_DMA && DEBUG_FEATURES && DEBUG_DMA
 	default n
 	---help---
 		Enable special debug instrumentation analyze SPI DMA data transfers.
@@ -1128,18 +1133,17 @@ config SAM34_SPI_DMADEBUG
 
 config SAM34_SPI_REGDEBUG
 	bool "SPI Register level debug"
-	depends on DEBUG
+	depends on DEBUG_SPI_INFO
 	default n
 	---help---
 		Output detailed register-level SPI device debug information.
-		Requires also DEBUG.
+		Requires also CONFIG_SPI_INFO.
 
 endmenu # AT91SAM3/4 SPI device driver options
 endif # SAM34_SPI0 || SAM34_SPI1
 
-if SAM34_EMAC
-
 menu "AT91SAM3/4 EMAC device driver options"
+	depends on SAM34_EMAC
 
 config SAM34_EMAC_NRXBUFFERS
 	int "Number of RX buffers"
@@ -1333,24 +1337,53 @@ config SAM34_EMAC_PHYSR_100FD
 		This must be provided if SAM34_EMAC_AUTONEG is defined.  This is the value
 		under the bit mask that represents the 100Mbps, full duplex setting.
 
+config SAM34_EMAC_ISETH0
+	bool
+	default y
+
+choice
+	prompt "Work queue"
+	default SAM34_EMAC_LPWORK if SCHED_LPWORK
+	default SAM34_EMAC_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the Ethernet driver.  If the
+		low priority work queue is available, then it should be used by the
+		driver.
+
+config SAM34_EMAC_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
+
+config SAM34_EMAC_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
+
+endchoice # Work queue
+
 config SAM34_EMAC_REGDEBUG
 	bool "Register-Level Debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_NET_INFO
 	---help---
-		Enable very low-level register access debug.  Depends on DEBUG.
-
-config SAM34_EMAC_ISETH0
-	bool
-	default y if !SAM34_EMAC || !SAM34_GMAC_ISETH0
-	default n if SAM34_EMAC && SAM34_GMAC_ISETH0
+		Enable very low-level register access debug.  Depends on CONFIG_DEBUG_NET_INFO.
 
 endmenu # EMAC device driver options
-endif # SAM34_EMAC
 
 if SAM34_HSMCI
+
 menu "AT91SAM3/4 HSMCI device driver options"
 
+config SAM34_HSMCI_DMA
+	bool "Support DMA data transfers"
+	default y
+	select SDIO_DMA
+	---help---
+		Support DMA data transfers.
+		Enable SD card DMA data transfers.  This is marginally optional.
+		For most usages, SD accesses will cause data overruns if used without
+		DMA.
+
 config SAM34_HSMCI_RDPROOF
 	bool "Read Proof Enable"
 	default n
@@ -1369,7 +1402,7 @@ config SAM34_HSMCI_WRPROOF
 
 config SAM34_HSMCI_XFRDEBUG
 	bool "HSMCI transfer debug"
-	depends on DEBUG_FS && DEBUG_VERBOSE
+	depends on DEBUG_FS_INFO
 	default n
 	---help---
 		Enable special debug instrumentation analyze HSMCI data transfers.
@@ -1377,11 +1410,11 @@ config SAM34_HSMCI_XFRDEBUG
 		registers at key points in the data transfer and then dumps all of
 		the registers at the end of the transfer.  If DEBUG_DMA is also
 		enabled, then DMA register will be collected as well.  Requires also
-		DEBUG_FS and DEBUG_VERBOSE.
+		DEBUG_FS and CONFIG_DEBUG_INFO.
 
 config SAM34_HSMCI_CMDDEBUG
 	bool "HSMCI command debug"
-	depends on DEBUG_FS && DEBUG_VERBOSE
+	depends on DEBUG_FS_INFO
 	default n
 	---help---
 		Enable special debug instrumentation analyze HSMCI commands. This
@@ -1389,7 +1422,7 @@ config SAM34_HSMCI_CMDDEBUG
 		key points in the data transfer and then dumps all of the registers
 		at the end of the transfer.  If DEBUG_DMA is also enabled, then DMA
 		register will be collected as well.  Requires also DEBUG_FS and
-		DEBUG_VERBOSE.
+		CONFIG_DEBUG_INFO.
 
 endmenu # HSMCI device driver options
 endif # SAM34_HSMCI
@@ -1400,7 +1433,7 @@ menu "AT91SAM3/4 USB Full Speed Device Controller driver (DCD) options"
 config SAM34_UDP_REGDEBUG
 	bool "Enable low-level UDP register debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_USB_INFO
 
 endmenu # USB Full Speed Device Controller driver (DCD) options
 
@@ -1415,7 +1448,7 @@ menu "AT91SAM3/4 Timer/Counter options"
 config SAM34_TC_REGDEBUG
 	bool "Enable low-level timer/counter register debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_TIMER_INFO
 
 endmenu # USB Full Speed Device Controller driver (DCD) options
 
diff --git a/arch/arm/src/sam34/Make.defs b/arch/arm/src/sam34/Make.defs
index 48c751799ceb2df9e75552386a21ff6c05917eb9..9ca94574306d696ca27d16a144a7133241852442 100644
--- a/arch/arm/src/sam34/Make.defs
+++ b/arch/arm/src/sam34/Make.defs
@@ -50,13 +50,17 @@ CMN_ASRCS  = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
 CMN_ASRCS += up_testset.S vfork.S
 
 CMN_CSRCS  = up_assert.c up_blocktask.c up_copyfullstate.c up_createstack.c
-CMN_CSRCS += up_mdelay.c up_udelay.c up_exit.c up_idle.c up_initialize.c
+CMN_CSRCS += up_mdelay.c up_udelay.c up_exit.c up_initialize.c
 CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_memfault.c up_modifyreg8.c
 CMN_CSRCS += up_modifyreg16.c up_modifyreg32.c up_releasepending.c
 CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c
 CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_unblocktask.c up_usestack.c
 CMN_CSRCS += up_doirq.c up_hardfault.c up_svcall.c up_vfork.c
 
+ifneq ($(CONFIG_SMP),y)
+CMN_CSRCS += up_idle.c
+endif
+
 # Configuration-dependent common files
 
 ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
@@ -72,10 +76,6 @@ ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
 CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
 endif
 
-ifeq ($(CONFIG_ARCH_MEMCPY),y)
-CMN_ASRCS += up_memcpy.S
-endif
-
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
 CMN_CSRCS += up_mpu.c up_task_start.c up_pthread_start.c
 ifneq ($(CONFIG_DISABLE_SIGNALS),y)
@@ -84,12 +84,6 @@ CMN_UASRCS += up_signal_handler.S
 endif
 endif
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c
-endif
-
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += up_fpu.S
 ifneq ($(CONFIG_ARMV7M_CMNVECTOR),y)
@@ -198,14 +192,22 @@ endif
 ifeq ($(CONFIG_ARCH_CHIP_SAM4CM),y)
 ifeq ($(CONFIG_SAM34_TC),y)
 CHIP_CSRCS += sam4cm_tc.c
+
 ifeq ($(CONFIG_SAM34_ONESHOT),y)
-CHIP_CSRCS += sam4cm_oneshot.c
-endif
+CHIP_CSRCS += sam4cm_oneshot.c sam4cm_oneshot_lowerhalf.c
+endif # CONFIG_SAM34_ONESHOT
+
 ifeq ($(CONFIG_SAM34_FREERUN),y)
 CHIP_CSRCS += sam4cm_freerun.c
-endif
+endif # CONFIG_SAM34_FREERUN
+
 ifeq ($(CONFIG_SCHED_TICKLESS),y)
 CHIP_CSRCS += sam4cm_tickless.c
-endif
-endif
-endif
+endif # CONFIG_SCHED_TICKLESS
+endif # CONFIG_SAM34_TC
+
+ifeq ($(CONFIG_SMP),y)
+CHIP_CSRCS += sam4cm_cpuindex.c sam4cm_cpuidlestack.c
+CHIP_CSRCS += sam4cm_cpupause.c sam4cm_cpustart.c sam4cm_idle.c
+endif # CONFIG_SMP
+endif # CONFIG_ARCH_CHIP_SAM4CM
diff --git a/arch/arm/src/sam34/chip/sam3x_memorymap.h b/arch/arm/src/sam34/chip/sam3x_memorymap.h
index e32e6ec226e60cd99928514b628ca2b945a006e7..ba053d3c3538f4dbe291cf9f34da4100bfd752e5 100644
--- a/arch/arm/src/sam34/chip/sam3x_memorymap.h
+++ b/arch/arm/src/sam34/chip/sam3x_memorymap.h
@@ -91,6 +91,7 @@
 #  define SAM_TC8_BASE         0x40088080 /* 0x40088080-0x400880bf:   Timer Counter 5 */
                                           /* 0x400880c0-0x4008ffff    Reserved */
 #define SAM_TWI_BASE           0x4008c000 /* 0x4008c000-0x4001ffff: Two-Wire Interface */
+#  define SAM_TWIN_BASE(n)     (SAM_TWI_BASE + ((n) << 14))
 #  define SAM_TWI0_BASE        0x4008c000 /* 0x4008c000-0x4008ffff:   Two-Wire Interface 0 */
 #  define SAM_TWI1_BASE        0x40090000 /* 0x40090000-0x40093fff:   Two-Wire Interface 1 */
 #define SAM_PWM_BASE           0x40094000 /* 0x40020000-0x4003ffff: Pulse Width Modulation */
diff --git a/arch/arm/src/sam34/chip/sam4cm_memorymap.h b/arch/arm/src/sam34/chip/sam4cm_memorymap.h
index 155052388455e3cf26bd1eb135a91006e34323ca..d719e268c010a54ed50f5e2d90b1b2ff64f16677 100644
--- a/arch/arm/src/sam34/chip/sam4cm_memorymap.h
+++ b/arch/arm/src/sam34/chip/sam4cm_memorymap.h
@@ -65,6 +65,7 @@
 /* Internal SRAM memory region */
 
 #define SAM_INTSRAM0_BASE      0x20000000 /* For SAM3U compatibility */
+#define SAM_INTSRAM1_BASE      0x20080000 /* 0x20080000-0x200fffff: Internal SRAM 1 */
 #define SAM_BBSRAM_BASE        0x22000000 /* 0x22000000-0x23ffffff: 32MB bit-band region */
                                           /* 0x24000000-0x3fffffff: Undefined */
 /* Peripherals address region */
@@ -77,8 +78,12 @@
 #define SAM_TC3_BASE           0x40014000
 #define SAM_TC4_BASE           0x40014040
 #define SAM_TC5_BASE           0x40014080
+
+#define SAM_TWI_BASE           0x40018000
+#define SAM_TWIN_BASE(n)       (SAM_TWI_BASE + ((n) << 14))
 #define SAM_TWI0_BASE          0x40018000
 #define SAM_TWI1_BASE          0x4001C000
+
 #define SAM_USART0_BASE        0x40024000
 #define SAM_USART1_BASE        0x40028000
 #define SAM_USART2_BASE        0x4002C000
diff --git a/arch/arm/src/sam34/chip/sam4e_memorymap.h b/arch/arm/src/sam34/chip/sam4e_memorymap.h
index 95bfdef2eb719fadef4816b4282709db19742b4d..1cf95993996151bd66fb5d935ec47b5adfcc8a97 100644
--- a/arch/arm/src/sam34/chip/sam4e_memorymap.h
+++ b/arch/arm/src/sam34/chip/sam4e_memorymap.h
@@ -108,6 +108,7 @@
 #  define SAM_USART0_BASE      0x400a0000 /* 0x400a0000-0x400a3fff:   USART0 */
 #  define SAM_USART1_BASE      0x400a4000 /* 0x400a4000-0x400abfff:   USART1 */
 #define SAM_TWI_BASE           0x400a8000 /* 0x400a8000-0x400affff: Two-Wire Interface */
+#  define SAM_TWIN_BASE(n)     (SAM_TWI_BASE + ((n) << 14))
 #  define SAM_TWI0_BASE        0x400a8000 /* 0x400a8000-0x400abfff:   Two-Wire Interface 0 */
 #  define SAM_TWI1_BASE        0x400ac000 /* 0x400ac000-0x400affff:   Two-Wire Interface 1 */
 #define SAM_AFEC_BASE          0x400b0000 /* 0x400b0000-0x400b7fff: Analog Front End */
diff --git a/arch/arm/src/sam34/chip/sam4l_memorymap.h b/arch/arm/src/sam34/chip/sam4l_memorymap.h
index 56810fe442cde2fdf5045573e44ba0e5389243c9..62a8c6a0c5c1635f4314d6a2d831c0abb35c8e0f 100644
--- a/arch/arm/src/sam34/chip/sam4l_memorymap.h
+++ b/arch/arm/src/sam34/chip/sam4l_memorymap.h
@@ -82,6 +82,9 @@
                                         /* 0x4000c000-0x4000ffff: Reserved */
 #define SAM_TC0_BASE         0x40100000 /* 0x40100000-0x4013ffff: Timer Counter 0 */
 #define SAM_TC1_BASE         0x40140000 /* 0x40180000-0x4017ffff: Timer Counter 1 */
+
+#define SAM_TWIMS_BASE       0x40180000 /* 0x40180000-0x401fffff: Two-wire Master/Slave */
+#define SAM_TWIN_BASE(n)     (SAM_TWIMS_BASE + ((n) << 14))
 #define SAM_TWIMS0_BASE      0x40180000 /* 0x40180000-0x401bffff: Two-wire Master/Slave Interface 0 */
 #define SAM_TWIMS1_BASE      0x401c0000 /* 0x401c0000-0x401fffff: Two-wire Master/Slave Interface 1 */
                                         /* 0x40020000-0x40023fff: Reserved */
diff --git a/arch/arm/src/sam34/chip/sam4s_memorymap.h b/arch/arm/src/sam34/chip/sam4s_memorymap.h
index 0ebf658866cc71050d88fd44a62a333f387767ac..45e8a97a3f65644733785ebeba32bd0f0b959f15 100644
--- a/arch/arm/src/sam34/chip/sam4s_memorymap.h
+++ b/arch/arm/src/sam34/chip/sam4s_memorymap.h
@@ -84,6 +84,7 @@
 #  define SAM_TC5_BASE         0x40014080 /* 0x40014080-0x400140bf:   Timer Counter 5 */
 
 #define SAM_TWI_BASE           0x40018000 /* 0x40018000-0x4001ffff: Two-Wire Interface */
+#  define SAM_TWIN_BASE(n)     (SAM_TWI_BASE + ((n) << 14))
 #  define SAM_TWI0_BASE        0x40018000 /* 0x40018000-0x4001bfff:   Two-Wire Interface 0 */
 #  define SAM_TWI1_BASE        0x4001c000 /* 0x4001c000-0x4001ffff:   Two-Wire Interface 1 */
 #define SAM_PWM_BASE           0x40020000 /* 0x40020000-0x4003ffff: Pulse Width Modulation */
diff --git a/arch/arm/src/sam34/chip/sam_afec.h b/arch/arm/src/sam34/chip/sam_afec.h
index 9e779a1e4c16f5ce9dc1f4d12e39cc0eeb51cd81..d5a8be44ab94786cc901f8e7b7fa664d9bf6e830 100644
--- a/arch/arm/src/sam34/chip/sam_afec.h
+++ b/arch/arm/src/sam34/chip/sam_afec.h
@@ -205,57 +205,57 @@
 
 /* Extended Mode Register */
 
-#define AFEC_EMR_CMPMODE_SHIFT      (0)      /* Bit 0-1: Comparison Mode */
-#define AFEC_EMR_CMPMODE_MASK       (3 << AFEC_EMR_CMPMODE_SHIFT)
-#  define AFEC_EMR_CMPMODE_LOW      (0 << AFEC_EMR_CMPMODE_SHIFT) /* Event when lower than low window threshold */
-#  define AFEC_EMR_CMPMODE_HIGH     (1 << AFEC_EMR_CMPMODE_SHIFT) /* Event when higher than high window threshold */
-#  define AFEC_EMR_CMPMODE_IN       (2 << AFEC_EMR_CMPMODE_SHIFT) /* Event when in comparison window */
-#  define AFEC_EMR_CMPMODE_OUT      (3 << AFEC_EMR_CMPMODE_SHIFT) /* Event when out of comparison window */
-#define AFEC_EMR_CMPSEL_SHIFT       (4)       /* Bit 4-7: Comparison Selected Channel */
-#define AFEC_EMR_CMPSEL_MASK        (15 << AFEC_EMR_CMPSEL_SHIFT)
-#  define AFEC_EMR_CMPSEL(n)        ((uint32_t)(n) << AFEC_EMR_CMPSEL_SHIFT)
-#define AFEC_EMR_CMPALL             (1 << 9)  /* Bit 9:  Compare All Channels */
-#define AFEC_EMR_CMPFILTER_SHIFT    (12)      /* Bits 12-13: Compare Event Filtering */
-#define AFEC_EMR_CMPFILTER_MASK     (3 << AFEC_EMR_CMPFILTER_SHIFT)
-#  define AFEC_EMR_CMPFILTER(n)     ((uint32_t)(n) << AFEC_EMR_CMPFILTER_SHIFT)
-#define AFEC_EMR_RES_SHIFT          (16)      /* Bits 16-18: Resolution */
-#define AFEC_EMR_RES_MASK           (7 << AFEC_EMR_RES_SHIFT)
-# define AFEC_EMR_RES_NOAVG         (0 << AFEC_EMR_RES_SHIFT) /* 12-bit resolution, AFEC sample rate is maximum (no averaging) */
-# define AFEC_EMR_RES_LOWRES        (1 << AFEC_EMR_RES_SHIFT) /* 10-bit resolution, AFEC sample rate is maximum (no averaging) */
-# define AFEC_EMR_RES_OSR4          (2 << AFEC_EMR_RES_SHIFT) /* 13-bit resolution, AFEC sample rate divided by 4 (averaging) */
-# define AFEC_EMR_RES_OSR16         (3 << AFEC_EMR_RES_SHIFT) /* 14-bit resolution, AFEC sample rate divided by 16 (averaging) */
-# define AFEC_EMR_RES_OSR64         (4 << AFEC_EMR_RES_SHIFT) /* 15-bit resolution, AFEC sample rate divided by 64 (averaging) */
-# define AFEC_EMR_RES_OSR256        (5 << AFEC_EMR_RES_SHIFT) /* 16-bit resolution, AFEC sample rate divided by 256 (averaging) */
-#define AFEC_EMR_TAG                (1 << 24) /* Bit 24: TAG of the AFEC_LDCR register */
-#define AFEC_EMR_STM                (1 << 25) /* Bit 25: Single Trigger Mode */
+#define AFEC_EMR_CMPMODE_SHIFT       (0)       /* Bit 0-1: Comparison Mode */
+#define AFEC_EMR_CMPMODE_MASK        (3 << AFEC_EMR_CMPMODE_SHIFT)
+#  define AFEC_EMR_CMPMODE_LOW       (0 << AFEC_EMR_CMPMODE_SHIFT) /* Event when lower than low window threshold */
+#  define AFEC_EMR_CMPMODE_HIGH      (1 << AFEC_EMR_CMPMODE_SHIFT) /* Event when higher than high window threshold */
+#  define AFEC_EMR_CMPMODE_IN        (2 << AFEC_EMR_CMPMODE_SHIFT) /* Event when in comparison window */
+#  define AFEC_EMR_CMPMODE_OUT       (3 << AFEC_EMR_CMPMODE_SHIFT) /* Event when out of comparison window */
+#define AFEC_EMR_CMPSEL_SHIFT        (3)       /* Bit 3-7: Comparison Selected Channel */
+#define AFEC_EMR_CMPSEL_MASK         (31 << AFEC_EMR_CMPSEL_SHIFT)
+#  define AFEC_EMR_CMPSEL(n)         ((uint32_t)(n) << AFEC_EMR_CMPSEL_SHIFT)
+#define AFEC_EMR_CMPALL              (1 << 9)  /* Bit 9:  Compare All Channels */
+#define AFEC_EMR_CMPFILTER_SHIFT     (12)      /* Bits 12-13: Compare Event Filtering */
+#define AFEC_EMR_CMPFILTER_MASK      (3 << AFEC_EMR_CMPFILTER_SHIFT)
+#  define AFEC_EMR_CMPFILTER(n)      ((uint32_t)(n) << AFEC_EMR_CMPFILTER_SHIFT)
+#define AFEC_EMR_RES_SHIFT           (16)      /* Bits 16-18: Resolution */
+#define AFEC_EMR_RES_MASK            (7 << AFEC_EMR_RES_SHIFT)
+# define AFEC_EMR_RES_NOAVG          (0 << AFEC_EMR_RES_SHIFT) /* 12-bit resolution, AFEC sample rate is maximum (no averaging) */
+# define AFEC_EMR_RES_LOWRES         (1 << AFEC_EMR_RES_SHIFT) /* 10-bit resolution, AFEC sample rate is maximum (no averaging) */
+# define AFEC_EMR_RES_OSR4           (2 << AFEC_EMR_RES_SHIFT) /* 13-bit resolution, AFEC sample rate divided by 4 (averaging) */
+# define AFEC_EMR_RES_OSR16          (3 << AFEC_EMR_RES_SHIFT) /* 14-bit resolution, AFEC sample rate divided by 16 (averaging) */
+# define AFEC_EMR_RES_OSR64          (4 << AFEC_EMR_RES_SHIFT) /* 15-bit resolution, AFEC sample rate divided by 64 (averaging) */
+# define AFEC_EMR_RES_OSR256         (5 << AFEC_EMR_RES_SHIFT) /* 16-bit resolution, AFEC sample rate divided by 256 (averaging) */
+#define AFEC_EMR_TAG                 (1 << 24) /* Bit 24: TAG of the AFEC_LDCR register */
+#define AFEC_EMR_STM                 (1 << 25) /* Bit 25: Single Trigger Mode */
 
 /* Channel Sequence 1 Register */
 
 #define AFEC_SEQ1R_USCH_SHIFT(n)     ((n) << 2) /* n=0..7 */
 #define AFEC_SEQ1R_USCH_MASK(n)      (15 << AFEC_SEQ1R_USCH_SHIFT(n))
 #  define AFEC_SEQ1R_USCH(n,v)       ((uint32_t)(v) << AFEC_SEQ1R_USCH_SHIFT(n))
-#define AFEC_SEQ1R_USCH0_SHIFT       (0) /* Bits 0-3: User sequence number 0 */
+#define AFEC_SEQ1R_USCH0_SHIFT       (0)       /* Bits 0-3: User sequence number 0 */
 #define AFEC_SEQ1R_USCH0_MASK        (15 << AFEC_SEQ1R_USCH0_SHIFT)
 #  define AFEC_SEQ1R_USCH0(v)        ((uint32_t)(v) << AFEC_SEQ1R_USCH0_SHIFT)
-#define AFEC_SEQ1R_USCH1_SHIFT       (4) /* Bits 4-7: User sequence number 1 */
+#define AFEC_SEQ1R_USCH1_SHIFT       (4)       /* Bits 4-7: User sequence number 1 */
 #define AFEC_SEQ1R_USCH1_MASK        (15 << AFEC_SEQ1R_USCH1_SHIFT)
 #  define AFEC_SEQ1R_USCH1(v)        ((uint32_t)(v) << AFEC_SEQ1R_USCH1_SHIFT)
-#define AFEC_SEQ1R_USCH2_SHIFT       (8) /* Bits 8-11: User sequence number 2 */
+#define AFEC_SEQ1R_USCH2_SHIFT       (8)       /* Bits 8-11: User sequence number 2 */
 #define AFEC_SEQ1R_USCH2_MASK        (15 << AFEC_SEQ1R_USCH2_SHIFT)
 #  define AFEC_SEQ1R_USCH2(v)        ((uint32_t)(v) << AFEC_SEQ1R_USCH2_SHIFT)
-#define AFEC_SEQ1R_USCH3_SHIFT       (12) /* Bits 12-15: User sequence number 3 */
+#define AFEC_SEQ1R_USCH3_SHIFT       (12)      /* Bits 12-15: User sequence number 3 */
 #define AFEC_SEQ1R_USCH3_MASK        (15 << AFEC_SEQ1R_USCH3_SHIFT)
 #  define AFEC_SEQ1R_USCH3(v)        ((uint32_t)(v) << AFEC_SEQ1R_USCH3_SHIFT)
-#define AFEC_SEQ1R_USCH4_SHIFT       (16) /* Bits 16-19: User sequence number 4 */
+#define AFEC_SEQ1R_USCH4_SHIFT       (16)      /* Bits 16-19: User sequence number 4 */
 #define AFEC_SEQ1R_USCH4_MASK        (15 << AFEC_SEQ1R_USCH4_SHIFT)
 #  define AFEC_SEQ1R_USCH4(v)        ((uint32_t)(v) << AFEC_SEQ1R_USCH4_SHIFT)
-#define AFEC_SEQ1R_USCH5_SHIFT       (20) /* Bits 20-23: User sequence number 5 */
+#define AFEC_SEQ1R_USCH5_SHIFT       (20)      /* Bits 20-23: User sequence number 5 */
 #define AFEC_SEQ1R_USCH5_MASK        (15 << AFEC_SEQ1R_USCH5_SHIFT)
 #  define AFEC_SEQ1R_USCH5(v)        ((uint32_t)(v) << AFEC_SEQ1R_USCH5_SHIFT)
-#define AFEC_SEQ1R_USCH6_SHIFT       (24) /* Bits 24-27: User sequence number 6 */
+#define AFEC_SEQ1R_USCH6_SHIFT       (24)      /* Bits 24-27: User sequence number 6 */
 #define AFEC_SEQ1R_USCH6_MASK        (15 << AFEC_SEQ1R_USCH6_SHIFT)
 #  define AFEC_SEQ1R_USCH6(v)        ((uint32_t)(v) << AFEC_SEQ1R_USCH6_SHIFT)
-#define AFEC_SEQ1R_USCH7_SHIFT       (28) /* Bits 28-31: User sequence number 7 */
+#define AFEC_SEQ1R_USCH7_SHIFT       (28)      /* Bits 28-31: User sequence number 7 */
 #define AFEC_SEQ1R_USCH7_MASK        (15 << AFEC_SEQ1R_USCH7_SHIFT)
 #  define AFEC_SEQ1R_USCH7(v)        ((uint32_t)(v) << AFEC_SEQ1R_USCH7_SHIFT)
 
@@ -264,28 +264,28 @@
 #define AFEC_SEQ2R_USCH_SHIFT(n)     (((n)-8) << 2) /* n=8..15 */
 #define AFEC_SEQ2R_USCH_MASK(n)      (15 << AFEC_SEQ2R_USCH_SHIFT(n))
 #  define AFEC_SEQ2R_USCH(n,v)       ((uint32_t)(v) << AFEC_SEQ2R_USCH_SHIFT(n))
-#define AFEC_SEQ2R_USCH8_SHIFT       (0) /* Bits 0-3: User sequence number 8 */
+#define AFEC_SEQ2R_USCH8_SHIFT       (0)       /* Bits 0-3: User sequence number 8 */
 #define AFEC_SEQ2R_USCH8_MASK        (15 << AFEC_SEQ2R_USCH8_SHIFT)
 #  define AFEC_SEQ2R_USCH8(v)        ((uint32_t)(v) << AFEC_SEQ2R_USCH8_SHIFT)
-#define AFEC_SEQ2R_USCH9_SHIFT       (4) /* Bits 4-7: User sequence number 9 */
+#define AFEC_SEQ2R_USCH9_SHIFT       (4)       /* Bits 4-7: User sequence number 9 */
 #define AFEC_SEQ2R_USCH9_MASK        (15 << AFEC_SEQ2R_USCH9_SHIFT)
 #  define AFEC_SEQ2R_USCH9(v)        ((uint32_t)(v) << AFEC_SEQ2R_USCH9_SHIFT)
-#define AFEC_SEQ2R_USCH10_SHIFT      (8) /* Bits 8-11: User sequence number 10 */
+#define AFEC_SEQ2R_USCH10_SHIFT      (8)       /* Bits 8-11: User sequence number 10 */
 #define AFEC_SEQ2R_USCH10_MASK       (15 << AFEC_SEQ2R_USCH10_SHIFT)
 #  define AFEC_SEQ2R_USCH10(v)       ((uint32_t)(v) << AFEC_SEQ2R_USCH10_SHIFT)
-#define AFEC_SEQ2R_USCH11_SHIFT      (12) /* Bits 12-15: User sequence number 11 */
+#define AFEC_SEQ2R_USCH11_SHIFT      (12)      /* Bits 12-15: User sequence number 11 */
 #define AFEC_SEQ2R_USCH11_MASK       (15 << AFEC_SEQ2R_USCH11_SHIFT)
 #  define AFEC_SEQ2R_USCH11(v)       ((uint32_t)(v) << AFEC_SEQ2R_USCH11_SHIFT)
-#define AFEC_SEQ2R_USCH12_SHIFT      (16) /* Bits 16-19: User sequence number 12 */
+#define AFEC_SEQ2R_USCH12_SHIFT      (16)      /* Bits 16-19: User sequence number 12 */
 #define AFEC_SEQ2R_USCH12_MASK       (15 << AFEC_SEQ2R_USCH12_SHIFT)
 #  define AFEC_SEQ2R_USCH12(v)       ((uint32_t)(v) << AFEC_SEQ2R_USCH12_SHIFT)
-#define AFEC_SEQ2R_USCH13_SHIFT      (20) /* Bits 20-23: User sequence number 13 */
+#define AFEC_SEQ2R_USCH13_SHIFT      (20)      /* Bits 20-23: User sequence number 13 */
 #define AFEC_SEQ2R_USCH13_MASK       (15 << AFEC_SEQ2R_USCH13_SHIFT)
 #  define AFEC_SEQ2R_USCH13(v)       ((uint32_t)(v) << AFEC_SEQ2R_USCH13_SHIFT)
-#define AFEC_SEQ2R_USCH14_SHIFT      (24) /* Bits 24-27: User sequence number 14 */
+#define AFEC_SEQ2R_USCH14_SHIFT      (24)      /* Bits 24-27: User sequence number 14 */
 #define AFEC_SEQ2R_USCH14_MASK       (15 << AFEC_SEQ2R_USCH14_SHIFT)
 #  define AFEC_SEQ2R_USCH14(v)       ((uint32_t)(v) << AFEC_SEQ2R_USCH14_SHIFT)
-#define AFEC_SEQ2R_USCH15_SHIFT      (28) /* Bits 28-31: User sequence number 15 */
+#define AFEC_SEQ2R_USCH15_SHIFT      (28)      /* Bits 28-31: User sequence number 15 */
 #define AFEC_SEQ2R_USCH15_MASK       (15 << AFEC_SEQ2R_USCH15_SHIFT)
 #  define AFEC_SEQ2R_USCH15(v)       ((uint32_t)(v) << AFEC_SEQ2R_USCH15_SHIFT)
 
@@ -375,59 +375,59 @@
 #  define AFEC_CWR_LOWTHRES(n)       ((uint32_t)(n) << AFEC_CWR_LOWTHRES_SHIFT)
 #define AFEC_CWR_HIGHTHRES_SHIFT     (16)      /* Bits 16-27: High Threshold */
 #define AFEC_CWR_HIGHTHRES_MASK      (0xfff << AFEC_CWR_LOWTHRES_SHIFT)
-#  define AFEC_CWR_HIGHTHRES(n)K     ((uint32_t)(n) << AFEC_CWR_LOWTHRES_SHIFT)
+#  define AFEC_CWR_HIGHTHRES(n)      ((uint32_t)(n) << AFEC_CWR_LOWTHRES_SHIFT)
 
 /* Channel Gain Register */
 
 #define AFEC_CGR_GAIN_SHIFT(n)       ((n) << 1) /* n=0..15 */
 #define AFEC_CGR_GAIN_MASK(n)        (3 << AFEC_CGR_GAIN_SHIFT(n))
 #  define AFEC_CGR_GAIN(n,v)         ((uint32_t)(v) << AFEC_CGR_GAIN_SHIFT(n))
-#define AFEC_CGR_GAIN0_SHIFT         (0)        /* Bits 0-1: Gain for channel 0 */
+#define AFEC_CGR_GAIN0_SHIFT         (0)       /* Bits 0-1: Gain for channel 0 */
 #define AFEC_CGR_GAIN0_MASK          (3 << AFEC_CGR_GAIN0_SHIFT)
 #  define AFEC_CGR_GAIN0(v)          ((uint32_t)(v) << AFEC_CGR_GAIN0_SHIFT)
-#define AFEC_CGR_GAIN1_SHIFT         (2)        /* Bits 2-3: Gain for channel 1 */
+#define AFEC_CGR_GAIN1_SHIFT         (2)       /* Bits 2-3: Gain for channel 1 */
 #define AFEC_CGR_GAIN1_MASK          (3 << AFEC_CGR_GAIN1_SHIFT)
 #  define AFEC_CGR_GAIN1(v)          ((uint32_t)(v) << AFEC_CGR_GAIN1_SHIFT)
-#define AFEC_CGR_GAIN2_SHIFT         (4)        /* Bits 4-5: Gain for channel 2 */
+#define AFEC_CGR_GAIN2_SHIFT         (4)       /* Bits 4-5: Gain for channel 2 */
 #define AFEC_CGR_GAIN2_MASK          (3 << AFEC_CGR_GAIN2_SHIFT)
 #  define AFEC_CGR_GAIN2(v)          ((uint32_t)(v) << AFEC_CGR_GAIN2_SHIFT)
-#define AFEC_CGR_GAIN3_SHIFT         (6)        /* Bits 6-7: Gain for channel 3 */
+#define AFEC_CGR_GAIN3_SHIFT         (6)       /* Bits 6-7: Gain for channel 3 */
 #define AFEC_CGR_GAIN3_MASK          (3 << AFEC_CGR_GAIN3_SHIFT)
 #  define AFEC_CGR_GAIN3(v)          ((uint32_t)(v) << AFEC_CGR_GAIN3_SHIFT)
-#define AFEC_CGR_GAIN4_SHIFT         (8)        /* Bits 8-9: Gain for channel 4 */
+#define AFEC_CGR_GAIN4_SHIFT         (8)       /* Bits 8-9: Gain for channel 4 */
 #define AFEC_CGR_GAIN4_MASK          (3 << AFEC_CGR_GAIN4_SHIFT)
 #  define AFEC_CGR_GAIN4(v)          ((uint32_t)(v) << AFEC_CGR_GAIN4_SHIFT)
-#define AFEC_CGR_GAIN5_SHIFT         (10)       /* Bits 10-11: Gain for channel 5 */
+#define AFEC_CGR_GAIN5_SHIFT         (10)      /* Bits 10-11: Gain for channel 5 */
 #define AFEC_CGR_GAIN5_MASK          (3 << AFEC_CGR_GAIN5_SHIFT)
 #  define AFEC_CGR_GAIN5(v)          ((uint32_t)(v) << AFEC_CGR_GAIN5_SHIFT)
-#define AFEC_CGR_GAIN6_SHIFT         (12)       /* Bits 12-13: Gain for channel 6 */
+#define AFEC_CGR_GAIN6_SHIFT         (12)      /* Bits 12-13: Gain for channel 6 */
 #define AFEC_CGR_GAIN6_MASK          (3 << AFEC_CGR_GAIN6_SHIFT)
 #  define AFEC_CGR_GAIN6(v)          ((uint32_t)(v) << AFEC_CGR_GAIN6_SHIFT)
-#define AFEC_CGR_GAIN7_SHIFT         (14)       /* Bits 14-15: Gain for channel 7 */
+#define AFEC_CGR_GAIN7_SHIFT         (14)      /* Bits 14-15: Gain for channel 7 */
 #define AFEC_CGR_GAIN7_MASK          (3 << AFEC_CGR_GAIN7_SHIFT)
 #  define AFEC_CGR_GAIN7(v)          ((uint32_t)(v) << AFEC_CGR_GAIN7_SHIFT)
-#define AFEC_CGR_GAIN8_SHIFT         (16)       /* Bits 16-17: Gain for channel 8 */
+#define AFEC_CGR_GAIN8_SHIFT         (16)      /* Bits 16-17: Gain for channel 8 */
 #define AFEC_CGR_GAIN8_MASK          (3 << AFEC_CGR_GAIN8_SHIFT)
 #  define AFEC_CGR_GAIN8(v)          ((uint32_t)(v) << AFEC_CGR_GAIN8_SHIFT)
-#define AFEC_CGR_GAIN9_SHIFT         (18)       /* Bits 18-19: Gain for channel 9 */
+#define AFEC_CGR_GAIN9_SHIFT         (18)      /* Bits 18-19: Gain for channel 9 */
 #define AFEC_CGR_GAIN9_MASK          (3 << AFEC_CGR_GAIN9_SHIFT)
 #  define AFEC_CGR_GAIN9(v)          ((uint32_t)(v) << AFEC_CGR_GAIN9_SHIFT)
-#define AFEC_CGR_GAIN10_SHIFT        (20)       /* Bits 20-21: Gain for channel 10 */
+#define AFEC_CGR_GAIN10_SHIFT        (20)      /* Bits 20-21: Gain for channel 10 */
 #define AFEC_CGR_GAIN10_MASK         (3 << AFEC_CGR_GAIN10_SHIFT)
 #  define AFEC_CGR_GAIN10(v)         ((uint32_t)(v) << AFEC_CGR_GAIN10_SHIFT)
-#define AFEC_CGR_GAIN11_SHIFT        (22)       /* Bits 22-23: Gain for channel 11 */
+#define AFEC_CGR_GAIN11_SHIFT        (22)      /* Bits 22-23: Gain for channel 11 */
 #define AFEC_CGR_GAIN11_MASK         (3 << AFEC_CGR_GAIN11_SHIFT)
 #  define AFEC_CGR_GAIN11(v)         ((uint32_t)(v) << AFEC_CGR_GAIN11_SHIFT)
-#define AFEC_CGR_GAIN12_SHIFT        (24)       /* Bits 24-25: Gain for channel 12 */
+#define AFEC_CGR_GAIN12_SHIFT        (24)      /* Bits 24-25: Gain for channel 12 */
 #define AFEC_CGR_GAIN12_MASK         (3 << AFEC_CGR_GAIN12_SHIFT)
 #  define AFEC_CGR_GAIN12(v)         ((uint32_t)(v) << AFEC_CGR_GAIN12_SHIFT)
-#define AFEC_CGR_GAIN13_SHIFT        (26)       /* Bits 26-27: Gain for channel 13 */
+#define AFEC_CGR_GAIN13_SHIFT        (26)      /* Bits 26-27: Gain for channel 13 */
 #define AFEC_CGR_GAIN13_MASK         (3 << AFEC_CGR_GAIN13_SHIFT)
 #  define AFEC_CGR_GAIN13(v)         ((uint32_t)(v) << AFEC_CGR_GAIN13_SHIFT)
-#define AFEC_CGR_GAIN14_SHIFT        (28)       /* Bits 28-29: Gain for channel 14 */
+#define AFEC_CGR_GAIN14_SHIFT        (28)      /* Bits 28-29: Gain for channel 14 */
 #define AFEC_CGR_GAIN14_MASK         (3 << AFEC_CGR_GAIN14_SHIFT)
 #  define AFEC_CGR_GAIN14(v)         ((uint32_t)(v) << AFEC_CGR_GAIN14_SHIFT)
-#define AFEC_CGR_GAIN15_SHIFT        (30)       /* Bits 30-31: Gain for channel 15 */
+#define AFEC_CGR_GAIN15_SHIFT        (30)      /* Bits 30-31: Gain for channel 15 */
 #define AFEC_CGR_GAIN15_MASK         (3 << AFEC_CGR_GAIN15_SHIFT)
 #  define AFEC_CGR_GAIN15(v)         ((uint32_t)(v) << AFEC_CGR_GAIN15_SHIFT)
 
@@ -487,8 +487,8 @@
 
 /* Temperature Sensor Mode Register */
 
-#define AFEC_TEMPMR_RTCT              (1 << 0)  /* Bit 0:  Temperature Sensor RTC Trigger mode */
-#define AFEC_TEMPMR_TEMPCMPMOD_SHIFT  (4)       /* Bits 4-5: Temperature Comparison Mode */
+#define AFEC_TEMPMR_RTCT              (1 << 0) /* Bit 0:  Temperature Sensor RTC Trigger mode */
+#define AFEC_TEMPMR_TEMPCMPMOD_SHIFT  (4)      /* Bits 4-5: Temperature Comparison Mode */
 #define AFEC_TEMPMR_TEMPCMPMOD_MASK   (3 << AFEC_TEMPMR_TEMPCMPMOD_SHIFT)
 #  define AFEC_TEMPMR_TEMPCMPMOD_LOW  (0 << AFEC_TEMPMR_TEMPCMPMOD_SHIFT) /* Event when data is lower than low threshold */
 #  define AFEC_TEMPMR_TEMPCMPMOD_HIGH (1 << AFEC_TEMPMR_TEMPCMPMOD_SHIFT) /* Event when data is higher than high threshold */
diff --git a/arch/arm/src/sam34/chip/sam_dacc.h b/arch/arm/src/sam34/chip/sam_dacc.h
index 4581289edae6b27b4a6f78da6a3868b6718fbf4f..80a61d874a7a20d37ca6ec65aef0813165f8b0eb 100644
--- a/arch/arm/src/sam34/chip/sam_dacc.h
+++ b/arch/arm/src/sam34/chip/sam_dacc.h
@@ -209,7 +209,7 @@
 #define DACC_WPMR_WPEN             (1 << 0)  /* Bit 0:  Write Protect Enable */
 #define DACC_WPMR_WPKEY_SHIFT      (8)       /* Bits 8-31: Write Protect KEY */
 #define DACC_WPMR_WPKEY_MASK       (0x00ffffff << DACC_WPMR_WPKEY_SHIFT)
-#  define DACC_WPMR_WPKEY_MASK     (0x00444143 << DACC_WPMR_WPKEY_SHIFT)
+#  define DACC_WPMR_WPKEY          (0x00444143 << DACC_WPMR_WPKEY_SHIFT)
 
 /* Write Protect Status register */
 
diff --git a/arch/arm/src/sam34/chip/sam_pmc.h b/arch/arm/src/sam34/chip/sam_pmc.h
index 6514d1f42e433ec1e55021276330afbd159b8e90..d7a75f6b0383d97191e4a9bbe2e75668d78722cd 100644
--- a/arch/arm/src/sam34/chip/sam_pmc.h
+++ b/arch/arm/src/sam34/chip/sam_pmc.h
@@ -402,10 +402,10 @@
 #  define PMC_MCKR_CPCSS_SHIFT           (16)
 #  define PMC_MCKR_CPCSS_MASK            (0x7 << PMC_MCKR_CPCSS_SHIFT)
 #    define PMC_MCKR_CPCSS_SLOW          (0 << PMC_MCKR_CPCSS_SHIFT) /* Slow Clock */
-#    define PMC_MCKR_CCPSS_MAIN          (1 << PMC_MCKR_CPCSS_SHIFT) /* Main Clock */
-#    define PMC_MCKR_CCPSS_PLLA          (2 << PMC_MCKR_CPCSS_SHIFT) /* PLLA Clock */
-#    define PMC_MCKR_CCPSS_PLLB          (3 << PMC_MCKR_CPCSS_SHIFT) /* PLLB Clock */
-#    define PMC_MCKR_CCPSS_MCK           (4 << PMC_MCKR_CPCSS_SHIFT) /* Master Clock */
+#    define PMC_MCKR_CPCSS_MAIN          (1 << PMC_MCKR_CPCSS_SHIFT) /* Main Clock */
+#    define PMC_MCKR_CPCSS_PLLA          (2 << PMC_MCKR_CPCSS_SHIFT) /* PLLA Clock */
+#    define PMC_MCKR_CPCSS_PLLB          (3 << PMC_MCKR_CPCSS_SHIFT) /* PLLB Clock */
+#    define PMC_MCKR_CPCSS_MCK           (4 << PMC_MCKR_CPCSS_SHIFT) /* Master Clock */
 #  define PMC_MCKR_CPPRES_SHIFT          (20)
 #  define PMC_MCKR_CPPRES_MASK           (0xF << PMC_MCKR_CPPRES_SHIFT)
 #    define PMC_MCKR_CPPRES(D)           (((D) - 1) << PMC_MCKR_CPPRES_SHIFT)
@@ -547,13 +547,14 @@
 /* Peripheral Clock Status Register 1 */
 
 #if defined(CONFIG_ARCH_CHIP_SAM3X) || defined(CONFIG_ARCH_CHIP_SAM3X) || \
-    defined(CONFIG_ARCH_CHIP_SAM4S) || defined(CONFIG_ARCH_CHIP_SAM4E)
+    defined(CONFIG_ARCH_CHIP_SAM4S) || defined(CONFIG_ARCH_CHIP_SAM4E) || \
+    defined(CONFIG_ARCH_CHIP_SAM4CM)
 #  define PMC_PIDH(n)                    (1 << ((n) - 32))
 #  define PMC_PID32                      (1 << 0)  /* Bit 0:  PID32 */
 #  define PMC_PID33                      (1 << 1)  /* Bit 1:  PID33 */
 #  define PMC_PID34                      (1 << 2)  /* Bit 2:  PID34 */
 #  if defined(CONFIG_ARCH_CHIP_SAM3X) || defined(CONFIG_ARCH_CHIP_SAM3X) || \
-   defined(CONFIG_ARCH_CHIP_SAM4E)
+    defined(CONFIG_ARCH_CHIP_SAM4E) || defined(CONFIG_ARCH_CHIP_SAM4CM)
 #    define PMC_PID35                    (1 << 3)  /* Bit 3:  PID35 */
 #    define PMC_PID36                    (1 << 4)  /* Bit 4:  PID36 */
 #    define PMC_PID37                    (1 << 5)  /* Bit 5:  PID37 */
diff --git a/arch/arm/src/sam34/chip/sam_tc.h b/arch/arm/src/sam34/chip/sam_tc.h
index bb1bd15f0c132d277837a8dedd659e37fbcd6fa1..e5951fcdc9a5c440e63418952b3465a4776491e9 100644
--- a/arch/arm/src/sam34/chip/sam_tc.h
+++ b/arch/arm/src/sam34/chip/sam_tc.h
@@ -2,7 +2,7 @@
  * arch/arm/src/sam34/chip/sam_tc.h
  * Timer Counter (TC) definitions for the SAM3U, SAM4E, and SAM4S
  *
- *   Copyright (C) 2009, 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2013-2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -537,16 +537,10 @@
 #  define TC_BMR_TC1XC1S_TIOA2       (3 << TC_BMR_TC1XC1S_SHIFT)
 #define TC_BMR_TC2XC2S_SHIFT         (4)       /* Bits 4-5: External Clock Signal 2 Selection */
 #define TC_BMR_TC2XC2S_MASK          (3 << TC_BMR_TC2XC2S_SHIFT)
-#if defined(CONFIG_ARCH_CHIP_SAM4s) || defined(CONFIG_ARCH_CHIP_SAM4E)
-#  define TC_BMR_TC2XC2S_TCLK2       (0 << TC_BMR_TC2XC2S_SHIFT)
-#  define TC_BMR_TC2XC2S_TIOA1       (2 << TC_BMR_TC2XC2S_SHIFT)
-#  define TC_BMR_TC2XC2S_TIOA2       (3 << TC_BMR_TC2XC2S_SHIFT)
-#else
 #  define TC_BMR_TC2XC2S_TCLK2       (0 << TC_BMR_TC2XC2S_SHIFT)
 #  define TC_BMR_TC2XC2S_NONE        (1 << TC_BMR_TC2XC2S_SHIFT)
 #  define TC_BMR_TC2XC2S_TIOA0       (2 << TC_BMR_TC2XC2S_SHIFT)
 #  define TC_BMR_TC2XC2S_TIOA1       (3 << TC_BMR_TC2XC2S_SHIFT)
-#endif
 #define TC_BMR_QDEN                  (1 << 8)  /* Bit 8:  Quadrature Decoder Enabled */
 #define TC_BMR_POSEN                 (1 << 9)  /* Bit 9:  Position Enabled */
 #define TC_BMR_SPEEDEN               (1 << 10) /* Bit 10: Speed Enabled */
diff --git a/arch/arm/src/sam34/chip/sam_twi.h b/arch/arm/src/sam34/chip/sam_twi.h
index 8ad5a0f8aeb79aa5c0e84c090f08515f2d7d8c73..2f843dd07c338655e170de211fcc971e56b84957 100644
--- a/arch/arm/src/sam34/chip/sam_twi.h
+++ b/arch/arm/src/sam34/chip/sam_twi.h
@@ -143,6 +143,7 @@
 #define TWI_MMR_MREAD              (1 << 12) /* Bit 12: Master Read Direction */
 #define TWI_MMR_DADR_SHIFT         (16)      /* Bits 16-22:  Device Address */
 #define TWI_MMR_DADR_MASK          (0x7f << TWI_MMR_DADR_SHIFT)
+#  define TWI_MMR_DADR(n)          ((uint32_t)(n) << TWI_MMR_DADR_SHIFT)
 
 /* TWI Slave Mode Register */
 
@@ -186,6 +187,9 @@
 #define TWI_INT_RXBUFF             (1 << 14) /* Bit 14: RX Buffer */
 #define TWI_INT_TXBUFE             (1 << 15) /* Bit 15: TX Buffer Empty */
 
+#define TWI_INT_ERRORS             (0x00000340)
+#define TWI_INT_ALL                (0x0000ffff)
+
 /* TWI Receive Holding Register */
 
 #define TWI_RHR_RXDATA_SHIFT       (0)       /* Bits 0-7:  Master or Slave Receive Holding Data */
diff --git a/arch/arm/src/sam34/sam4cm_cpuidlestack.c b/arch/arm/src/sam34/sam4cm_cpuidlestack.c
new file mode 100644
index 0000000000000000000000000000000000000000..411ebfaad77efb449d82af9a9b3ac502aface7a6
--- /dev/null
+++ b/arch/arm/src/sam34/sam4cm_cpuidlestack.c
@@ -0,0 +1,136 @@
+/****************************************************************************
+ * arch/arm/src/sam34/sam4cm_cpuidlestack.c
+ *
+ *   Copyright (C) 2016 Masayuki Ishikawa. All rights reserved.
+ *   Author: Masayuki Ishikawa 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+
+#include "up_internal.h"
+
+#ifdef CONFIG_SMP
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_idle
+ *
+ * Description:
+ *   up_idle() is the logic that will be executed when their is no other
+ *   ready-to-run task.  This is processor idle time and will continue until
+ *   some interrupt occurs to cause a context switch from the idle task.
+ *
+ *   Processing in this state may be processor-specific. e.g., this is where
+ *   power management operations might be performed.
+ *
+ ****************************************************************************/
+
+void up_idle(void)
+{
+#if defined(CONFIG_SUPPRESS_INTERRUPTS) || defined(CONFIG_SUPPRESS_TIMER_INTS)
+  /* If the system is idle and there are no timer interrupts, then process
+   * "fake" timer interrupts. Hopefully, something will wake up.
+   */
+
+  sched_process_timer();
+#else
+
+  /* Sleep until an interrupt occurs to save power */
+
+  asm("WFI");
+
+#endif
+}
+
+/****************************************************************************
+ * Name: up_cpu_idlestack
+ *
+ * Description:
+ *   Allocate a stack for the CPU[n] IDLE task (n > 0) if appropriate and
+ *   setup up stack-related information in the IDLE task's TCB.  This
+ *   function is always called before up_cpu_start().  This function is
+ *   only called for the CPU's initial IDLE task; up_create_task is used for
+ *   all normal tasks, pthreads, and kernel threads for all CPUs.
+ *
+ *   The initial IDLE task is a special case because the CPUs can be started
+ *   in different wans in different environments:
+ *
+ *   1. The CPU may already have been started and waiting in a low power
+ *      state for up_cpu_start().  In this case, the IDLE thread's stack
+ *      has already been allocated and is already in use.  Here
+ *      up_cpu_idlestack() only has to provide information about the
+ *      already allocated stack.
+ *
+ *   2. The CPU may be disabled but started when up_cpu_start() is called.
+ *      In this case, a new stack will need to be created for the IDLE
+ *      thread and this function is then equivalent to:
+ *
+ *      return up_create_stack(tcb, stack_size, TCB_FLAG_TTYPE_KERNEL);
+ *
+ *   The following TCB fields must be initialized by this function:
+ *
+ *   - adj_stack_size: Stack size after adjustment for hardware, processor,
+ *     etc.  This value is retained only for debug purposes.
+ *   - stack_alloc_ptr: Pointer to allocated stack
+ *   - adj_stack_ptr: Adjusted stack_alloc_ptr for HW.  The initial value of
+ *     the stack pointer.
+ *
+ * Inputs:
+ *   - cpu:         CPU index that indicates which CPU the IDLE task is
+ *                  being created for.
+ *   - tcb:         The TCB of new CPU IDLE task
+ *   - stack_size:  The requested stack size for the IDLE task.  At least
+ *                  this much must be allocated.  This should be
+ *                  CONFIG_SMP_STACK_SIZE.
+ *
+ ****************************************************************************/
+
+int up_cpu_idlestack(int cpu, FAR struct tcb_s *tcb, size_t stack_size)
+{
+#if CONFIG_SMP_NCPUS > 1
+  (void)up_create_stack(tcb, stack_size, TCB_FLAG_TTYPE_KERNEL);
+#endif
+  return OK;
+}
+
+#endif /* CONFIG_SMP */
diff --git a/arch/arm/src/sam34/sam4cm_cpuindex.c b/arch/arm/src/sam34/sam4cm_cpuindex.c
new file mode 100644
index 0000000000000000000000000000000000000000..867d36e5c1b5628bf9bdaad2150a319ffea00584
--- /dev/null
+++ b/arch/arm/src/sam34/sam4cm_cpuindex.c
@@ -0,0 +1,77 @@
+/****************************************************************************
+ * arch/arm/src/sam34/sam4cm_cpuindex.c
+ *
+ *   Copyright (C) 2016 Masayuki Ishikawa. All rights reserved.
+ *   Author: Masayuki Ishikawa 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+#include "mpu.h"
+
+#ifdef CONFIG_SMP
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_cpu_index
+ *
+ * Description:
+ *   Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ *   corresponds to the currently executing CPU.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ *   corresponds to the currently executing CPU.
+ *
+ ****************************************************************************/
+
+int up_cpu_index(void)
+{
+  /* MPU is not supported on CM4P1 */
+
+  return (getreg32(MPU_TYPE) == 0) ? 1 : 0;
+}
+
+#endif /* CONFIG_SMP */
+
+
diff --git a/arch/arm/src/sam34/sam4cm_cpupause.c b/arch/arm/src/sam34/sam4cm_cpupause.c
new file mode 100644
index 0000000000000000000000000000000000000000..f2587811276144e520be94c6a9baad5aa5af40f1
--- /dev/null
+++ b/arch/arm/src/sam34/sam4cm_cpupause.c
@@ -0,0 +1,351 @@
+/****************************************************************************
+ * arch/arm/src/sam34/sam4cm_cpupause.c
+ *
+ *   Copyright (C) 2016 Masayuki Ishikawa. All rights reserved.
+ *   Author: Masayuki Ishikawa 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "up_arch.h"
+#include "sched/sched.h"
+#include "up_internal.h"
+#include "chip/sam4cm_ipc.h"
+
+#ifdef CONFIG_SMP
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if 0
+#  define DPRINTF(fmt, args...) _err(fmt, ##args)
+#else
+#  define DPRINTF(fmt, args...) do {} while (0)
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* These spinlocks are used in the SMP configuration in order to implement
+ * up_cpu_pause().  The protocol for CPUn to pause CPUm is as follows
+ *
+ * 1. The up_cpu_pause() implementation on CPUn locks both g_cpu_wait[m]
+ *    and g_cpu_paused[m].  CPUn then waits spinning on g_cpu_paused[m].
+ * 2. CPUm receives the interrupt it (1) unlocks g_cpu_paused[m] and
+ *    (2) locks g_cpu_wait[m].  The first unblocks CPUn and the second
+ *    blocks CPUm in the interrupt handler.
+ *
+ * When CPUm resumes, CPUn unlocks g_cpu_wait[m] and the interrupt handler
+ * on CPUm continues.  CPUm must, of course, also then unlock g_cpu_wait[m]
+ * so that it will be ready for the next pause operation.
+ */
+
+static volatile spinlock_t g_cpu_wait[CONFIG_SMP_NCPUS];
+static volatile spinlock_t g_cpu_paused[CONFIG_SMP_NCPUS];
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_cpu_pausereq
+ *
+ * Description:
+ *   Return true if a pause request is pending for this CPU.
+ *
+ * Input Parameters:
+ *   cpu - The index of the CPU to be queried
+ *
+ * Returned Value:
+ *   true   = a pause request is pending.
+ *   false = no pasue request is pending.
+ *
+ ****************************************************************************/
+
+bool up_cpu_pausereq(int cpu)
+{
+  return spin_islocked(&g_cpu_paused[cpu]);
+}
+
+/****************************************************************************
+ * Name: up_cpu_paused
+ *
+ * Description:
+ *   Handle a pause request from another CPU.  Normally, this logic is
+ *   executed from interrupt handling logic within the architecture-specific
+ *   However, it is sometimes necessary necessary to perform the pending
+ *   pause operation in other contexts where the interrupt cannot be taken
+ *   in order to avoid deadlocks.
+ *
+ *   This function performs the following operations:
+ *
+ *   1. It saves the current task state at the head of the current assigned
+ *      task list.
+ *   2. It waits on a spinlock, then
+ *   3. Returns from interrupt, restoring the state of the new task at the
+ *      head of the ready to run list.
+ *
+ * Input Parameters:
+ *   cpu - The index of the CPU to be paused
+ *
+ * Returned Value:
+ *   On success, OK is returned.  Otherwise, a negated errno value indicating
+ *   the nature of the failure is returned.
+ *
+ ****************************************************************************/
+
+int up_cpu_paused(int cpu)
+{
+  FAR struct tcb_s *tcb = this_task();
+
+  /* Update scheduler parameters */
+
+  sched_suspend_scheduler(tcb);
+
+#ifdef CONFIG_SCHED_INSTRUMENTATION
+  /* Notify that we are paused */
+
+  sched_note_cpu_paused(tcb);
+#endif
+
+  /* Save the current context at CURRENT_REGS into the TCB at the head
+   * of the assigned task list for this CPU.
+   */
+
+  up_savestate(tcb->xcp.regs);
+
+  /* Wait for the spinlock to be released */
+
+  spin_unlock(&g_cpu_paused[cpu]);
+  spin_lock(&g_cpu_wait[cpu]);
+
+  /* Restore the exception context of the tcb at the (new) head of the
+   * assigned task list.
+   */
+
+  tcb = this_task();
+
+#ifdef CONFIG_SCHED_INSTRUMENTATION
+  /* Notify that we have resumed */
+
+  sched_note_cpu_resumed(tcb);
+#endif
+
+  /* Reset scheduler parameters */
+
+  sched_resume_scheduler(tcb);
+
+  /* Then switch contexts.  Any necessary address environment changes
+   * will be made when the interrupt returns.
+   */
+
+  up_restorestate(tcb->xcp.regs);
+  spin_unlock(&g_cpu_wait[cpu]);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: arm_pause_handler
+ *
+ * Description:
+ *   Inter-CPU interrupt handler
+ *
+ * Input Parameters:
+ *   Standard interrupt handler inputs
+ *
+ * Returned Value:
+ *   Should always return OK
+ *
+ ****************************************************************************/
+
+int arm_pause_handler(int irq, void *c, FAR void *arg)
+{
+  int cpu = up_cpu_index();
+
+  /* Clear : Pause IRQ */
+  /* IPC Interrupt Clear Command Register (write-only) */
+
+  if (1 == cpu)
+    {
+      DPRINTF("CPU0 -> CPU1\n");
+      putreg32(0x1, SAM_IPC1_ICCR);
+    }
+  else
+    {
+      DPRINTF("CPU1 -> CPU0\n");
+      putreg32(0x1, SAM_IPC0_ICCR);
+    }
+
+  /* Check for false alarms.  Such false could occur as a consequence of
+   * some deadlock breaking logic that might have already serviced the SG2
+   * interrupt by calling up_cpu_paused.
+   */
+
+  if (spin_islocked(&g_cpu_paused[cpu]))
+    {
+      return up_cpu_paused(cpu);
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: up_cpu_pause
+ *
+ * Description:
+ *   Save the state of the current task at the head of the
+ *   g_assignedtasks[cpu] task list and then pause task execution on the
+ *   CPU.
+ *
+ *   This function is called by the OS when the logic executing on one CPU
+ *   needs to modify the state of the g_assignedtasks[cpu] list for another
+ *   CPU.
+ *
+ * Input Parameters:
+ *   cpu - The index of the CPU to be stopped/
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int up_cpu_pause(int cpu)
+{
+  DPRINTF("cpu=%d\n",cpu);
+
+  DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu());
+
+#ifdef CONFIG_SCHED_INSTRUMENTATION
+  /* Notify of the pause event */
+
+  sched_note_cpu_pause(this_task(), cpu);
+#endif
+
+  /* Take the both spinlocks.  The g_cpu_wait spinlock will prevent the interrupt
+   * handler from returning until up_cpu_resume() is called; g_cpu_paused
+   * is a handshake that will prefent this function from returning until
+   * the CPU is actually paused.
+   */
+
+  DEBUGASSERT(!spin_islocked(&g_cpu_wait[cpu]) &&
+              !spin_islocked(&g_cpu_paused[cpu]));
+
+  spin_lock(&g_cpu_wait[cpu]);
+  spin_lock(&g_cpu_paused[cpu]);
+
+  /* Execute Pause IRQ to CPU(cpu) */
+  /* Set IPC Interrupt (IRQ0) (write-only) */
+
+  if (cpu == 1)
+    {
+      putreg32(0x1, SAM_IPC1_ISCR);
+    }
+  else
+    {
+      putreg32(0x1, SAM_IPC0_ISCR);
+    }
+
+  /* Wait for the other CPU to unlock g_cpu_paused meaning that
+   * it is fully paused and ready for up_cpu_resume();
+   */
+
+  spin_lock(&g_cpu_paused[cpu]);
+  spin_unlock(&g_cpu_paused[cpu]);
+
+  /* On successful return g_cpu_wait will be locked, the other CPU will be
+   * spinninf on g_cpu_wait and will not continue until g_cpu_resume() is
+   * called.  g_cpu_paused will be unlocked in any case.
+   */
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: up_cpu_resume
+ *
+ * Description:
+ *   Restart the cpu after it was paused via up_cpu_pause(), restoring the
+ *   state of the task at the head of the g_assignedtasks[cpu] list, and
+ *   resume normal tasking.
+ *
+ *   This function is called after up_cpu_pause in order resume operation of
+ *   the CPU after modifying its g_assignedtasks[cpu] list.
+ *
+ * Input Parameters:
+ *   cpu - The index of the CPU being re-started.
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int up_cpu_resume(int cpu)
+{
+  DPRINTF("cpu=%d\n",cpu);
+
+  DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu());
+
+#ifdef CONFIG_SCHED_INSTRUMENTATION
+  /* Notify of the resume event */
+
+  sched_note_cpu_resume(this_task(), cpu);
+#endif
+
+  /* Release the spinlock.  Releasing the spinlock will cause the SGI2
+   * handler on 'cpu' to continue and return from interrupt to the newly
+   * established thread.
+   */
+
+  DEBUGASSERT(spin_islocked(&g_cpu_wait[cpu]) &&
+              !spin_islocked(&g_cpu_paused[cpu]));
+
+  spin_unlock(&g_cpu_wait[cpu]);
+  return OK;
+}
+
+#endif /* CONFIG_SMP */
diff --git a/arch/arm/src/sam34/sam4cm_cpustart.c b/arch/arm/src/sam34/sam4cm_cpustart.c
new file mode 100644
index 0000000000000000000000000000000000000000..3f6a4c6a19473dbdc6e592c763837b76d228dbc3
--- /dev/null
+++ b/arch/arm/src/sam34/sam4cm_cpustart.c
@@ -0,0 +1,244 @@
+/****************************************************************************
+ * arch/arm/src/sam34/sam4cm_cpustart.c
+ *
+ *   Copyright (C) 2016 Masayuki Ishikawa. All rights reserved.
+ *   Author: Masayuki Ishikawa 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "nvic.h"
+#include "up_arch.h"
+#include "sched/sched.h"
+#include "init/init.h"
+#include "up_internal.h"
+#include "chip/sam_pmc.h"
+#include "chip/sam_rstc.h"
+#include "chip/sam4cm_ipc.h"
+#include "sam4cm_periphclks.h"
+
+#ifdef CONFIG_SMP
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if 0
+#  define DPRINTF(fmt, args...) _err(fmt, ##args)
+#else
+#  define DPRINTF(fmt, args...) do {} while (0)
+#endif
+
+#define CPU1_VECTOR_RESETV  (SAM_INTSRAM1_BASE)
+#define CPU1_VECTOR_ISTACK  (SAM_INTSRAM1_BASE + 4)
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+volatile static spinlock_t g_cpu1_boot;
+extern int arm_pause_handler(int irq, void *c, FAR void *arg);
+
+/****************************************************************************
+ * Name: cpu1_boot
+ *
+ * Description:
+ *   This is the boot vector for CM4P1
+ *
+ * Input Parameters:
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+static void cpu1_boot(void)
+{
+  int cpu;
+
+  /* Disable CMCC1 */
+
+  putreg32(0, 0x48018008);
+  while ((getreg32(0x4801800c) & 0x01) != 0);
+
+  cpu = up_cpu_index();
+  DPRINTF("cpu = %d\n", cpu);
+
+  if (cpu == 1)
+    {
+      /* Use CPU0 vectors */
+
+      putreg32((uint32_t)&_stext, NVIC_VECTAB);
+      sam_ipc1_enableclk();
+
+      /* Clear : write-only */
+
+      putreg32(0x1, SAM_IPC1_ICCR);
+
+      /* Enable : write-only */
+
+      putreg32(0x1, SAM_IPC1_IECR);
+      irq_attach(SAM_IRQ_IPC1, arm_pause_handler, NULL);
+      up_enable_irq(SAM_IRQ_IPC1);
+    }
+
+  spin_unlock(&g_cpu1_boot);
+
+#ifdef CONFIG_SCHED_INSTRUMENTATION
+  /* Notify that this CPU has started */
+
+  sched_note_cpu_started(this_task());
+#endif
+
+  /* Then transfer control to the IDLE task */
+
+  (void)os_idle_task(0, NULL);
+}
+
+/****************************************************************************
+ * Name: up_cpu_start
+ *
+ * Description:
+ *   In an SMP configution, only one CPU is initially active (CPU 0). System
+ *   initialization occurs on that single thread. At the completion of the
+ *   initialization of the OS, just before beginning normal multitasking,
+ *   the additional CPUs would be started by calling this function.
+ *
+ *   Each CPU is provided the entry point to is IDLE task when started.  A
+ *   TCB for each CPU's IDLE task has been initialized and placed in the
+ *   CPU's g_assignedtasks[cpu] list.  Not stack has been alloced or
+ *   initialized.
+ *
+ *   The OS initialization logic calls this function repeatedly until each
+ *   CPU has been started, 1 through (CONFIG_SMP_NCPUS-1).
+ *
+ * Input Parameters:
+ *   cpu - The index of the CPU being started.  This will be a numeric
+ *         value in the range of from one to (CONFIG_SMP_NCPUS-1).  (CPU
+ *         0 is already active)
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int up_cpu_start(int cpu)
+{
+  struct tcb_s *tcb = current_task(cpu);
+
+  DPRINTF("cpu=%d\n",cpu);
+
+  if (cpu != 1)
+    {
+      return -EINVAL;
+    }
+
+#ifdef CONFIG_SCHED_INSTRUMENTATION
+  /* Notify of the start event */
+
+  sched_note_cpu_start(this_task(), cpu);
+#endif
+
+  /* Reset coprocessor */
+
+  putreg32(0x5a000000, SAM_RSTC_CPMR);
+
+  /* Enable Coprocessor Bus Master Clock (write-only) */
+
+  putreg32(PMC_CPKEY | PMC_CPBMCK, SAM_PMC_SCER);
+
+  /* Enable Coprocessor Clock (write-only) */
+
+  putreg32(PMC_CPKEY | PMC_CPCK, SAM_PMC_SCER);
+
+  /* Set Coprocessor Clock Prescalar */
+
+  modifyreg32(SAM_PMC_MCKR, PMC_MCKR_CPPRES_MASK, 0);
+
+  /* Set Coprocessor Clock Source */
+
+  modifyreg32(SAM_PMC_MCKR, PMC_MCKR_CPCSS_MASK, PMC_MCKR_CPCSS_PLLB);
+
+  /* Unreset coprocessor pheripheral */
+
+  putreg32(0x5a000010, SAM_RSTC_CPMR);
+
+  /* Enable clock for SRAM1 where CPU1 starts (write-only) */
+
+  putreg32(PMC_PID42, SAM_PMC_PCER1);
+
+  /* Clear SRAM1 */
+
+  memset((void *)SAM_INTSRAM1_BASE, 0, 16 * 1024);
+
+  /* Copy initial vectors for CPU1 */
+
+  putreg32((uint32_t)tcb->adj_stack_ptr, CPU1_VECTOR_RESETV);
+  putreg32((uint32_t)cpu1_boot, CPU1_VECTOR_ISTACK);
+
+  spin_lock(&g_cpu1_boot);
+
+  /* Unreset coprocessor */
+
+  putreg32(0x5a000011, SAM_RSTC_CPMR);
+
+  /* IRQ setup CPU1->CPU0 */
+
+  sam_ipc0_enableclk();
+  putreg32(0x1, SAM_IPC0_ICCR); /* clear : write-only */
+  putreg32(0x1, SAM_IPC0_IECR); /* enable : write-only */
+  irq_attach(SAM_IRQ_IPC0, arm_pause_handler, NULL);
+  up_enable_irq(SAM_IRQ_IPC0);
+  
+  spin_lock(&g_cpu1_boot);
+
+  /* CPU1 boot done */
+
+  spin_unlock(&g_cpu1_boot);
+
+  return 0;
+}
+
+#endif /* CONFIG_SMP */
diff --git a/arch/arm/src/sam34/sam4cm_freerun.c b/arch/arm/src/sam34/sam4cm_freerun.c
index 63bcea20315f4e43701f461926d6a376ee1f2bc0..4b09e1d5e6678cd690abe7fe75aaf3212d782c5d 100644
--- a/arch/arm/src/sam34/sam4cm_freerun.c
+++ b/arch/arm/src/sam34/sam4cm_freerun.c
@@ -59,7 +59,7 @@
 
 #include "sam4cm_freerun.h"
 
-#ifdef CONFIG_SAM34_ONESHOT
+#ifdef CONFIG_SAM34_FREERUN
 
 /****************************************************************************
  * Private Functions
@@ -121,7 +121,7 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
   uint32_t cmr;
   int ret;
 
-  tcvdbg("chan=%d resolution=%d usec\n", chan, resolution);
+  tmrinfo("chan=%d resolution=%d usec\n", chan, resolution);
   DEBUGASSERT(freerun && resolution > 0);
 
   /* Get the TC frequency the corresponds to the requested resolution */
@@ -133,13 +133,13 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
   ret = sam_tc_divisor(frequency, &divisor, &cmr);
   if (ret < 0)
     {
-      tcdbg("ERROR: sam_tc_divisor failed: %d\n", ret);
+      tmrerr("ERROR: sam_tc_divisor failed: %d\n", ret);
       return ret;
     }
 
-  tcvdbg("frequency=%lu, divisor=%u, cmr=%08lx\n",
-         (unsigned long)frequency, (unsigned long)divisor,
-         (unsigned long)cmr);
+  tmrinfo("frequency=%lu, divisor=%u, cmr=%08lx\n",
+          (unsigned long)frequency, (unsigned long)divisor,
+          (unsigned long)cmr);
 
   /* Allocate the timer/counter and select its mode of operation
    *
@@ -172,7 +172,7 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
   freerun->tch = sam_tc_allocate(chan, cmr);
   if (!freerun->tch)
     {
-      tcdbg("ERROR: Failed to allocate timer channel %d\n", chan);
+      tmrerr("ERROR: Failed to allocate timer channel %d\n", chan);
       return -EBUSY;
     }
 
@@ -257,9 +257,9 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts)
 
   leave_critical_section(flags);
 
-  tcvdbg("counter=%lu (%lu) overflow=%lu, sr=%08lx\n",
-         (unsigned long)counter,  (unsigned long)verify,
-         (unsigned long)overflow, (unsigned long)sr);
+  tmrinfo("counter=%lu (%lu) overflow=%lu, sr=%08lx\n",
+          (unsigned long)counter,  (unsigned long)verify,
+          (unsigned long)overflow, (unsigned long)sr);
 
   /* Convert the whole thing to units of microseconds.
    *
@@ -277,7 +277,7 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts)
   ts->tv_sec  = sec;
   ts->tv_nsec = (usec - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
 
-  tcvdbg("usec=%llu ts=(%lu, %lu)\n",
+  tmrinfo("usec=%llu ts=(%lu, %lu)\n",
           usec, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
 
   return OK;
@@ -316,4 +316,4 @@ int sam_freerun_uninitialize(struct sam_freerun_s *freerun)
   return OK;
 }
 
-#endif /* CONFIG_SAM34_ONESHOT */
+#endif /* CONFIG_SAM34_FREERUN */
diff --git a/arch/arm/src/sam34/sam4cm_idle.c b/arch/arm/src/sam34/sam4cm_idle.c
new file mode 100644
index 0000000000000000000000000000000000000000..9c3810136cfe096dc68431d67f3e11fca947a17d
--- /dev/null
+++ b/arch/arm/src/sam34/sam4cm_idle.c
@@ -0,0 +1,77 @@
+/****************************************************************************
+ *  arch/arm/src/sam34/sam4cm_idle.c
+ *
+ *   Copyright (C) 2016 Masayuki Ishikawa. All rights reserved.
+ *   Author: Masayuki Ishikawa 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include "up_internal.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_idle
+ *
+ * Description:
+ *   up_idle() is the logic that will be executed when their is no other
+ *   ready-to-run task.  This is processor idle time and will continue until
+ *   some interrupt occurs to cause a context switch from the idle task.
+ *
+ *   Processing in this state may be processor-specific. e.g., this is where
+ *   power management operations might be performed.
+ *
+ ****************************************************************************/
+
+void up_idle(void)
+{
+#if defined(CONFIG_SUPPRESS_INTERRUPTS) || defined(CONFIG_SUPPRESS_TIMER_INTS)
+  /* If the system is idle and there are no timer interrupts, then process
+   * "fake" timer interrupts. Hopefully, something will wake up.
+   */
+
+  sched_process_timer();
+#else
+
+  /* Sleep until an interrupt occurs to save power */
+
+  asm("WFI");
+
+#endif
+}
diff --git a/arch/arm/src/sam34/sam4cm_oneshot.c b/arch/arm/src/sam34/sam4cm_oneshot.c
index eeda41bc8ee98ad77dc48ae420fd3e45a0bba428..0bf92d1fea01d48d008b56978390592b1bb50a19 100644
--- a/arch/arm/src/sam34/sam4cm_oneshot.c
+++ b/arch/arm/src/sam34/sam4cm_oneshot.c
@@ -91,7 +91,7 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr)
   oneshot_handler_t oneshot_handler;
   void *oneshot_arg;
 
-  tcllvdbg("Expired...\n");
+  tmrinfo("Expired...\n");
   DEBUGASSERT(oneshot && oneshot->handler);
 
   /* The clock was stopped, but not disabled when the RC match occurred.
@@ -111,7 +111,9 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr)
   oneshot->handler     = NULL;
   oneshot_arg          = (void *)oneshot->arg;
   oneshot->arg         = NULL;
+#ifdef CONFIG_SAM34_FREERUN
   oneshot->start_count = 0;
+#endif
 
   oneshot_handler(oneshot_arg);
 }
@@ -148,7 +150,7 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
   uint32_t cmr;
   int ret;
 
-  tcvdbg("chan=%d resolution=%d usec\n", chan, resolution);
+  tmrinfo("chan=%d resolution=%d usec\n", chan, resolution);
   DEBUGASSERT(oneshot && resolution > 0);
 
   /* Get the TC frequency the corresponds to the requested resolution */
@@ -160,13 +162,13 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
   ret = sam_tc_divisor(frequency, &divisor, &cmr);
   if (ret < 0)
     {
-      tcdbg("ERROR: sam_tc_divisor failed: %d\n", ret);
+      tmrerr("ERROR: sam_tc_divisor failed: %d\n", ret);
       return ret;
     }
 
-  tcvdbg("frequency=%lu, divisor=%lu, cmr=%08lx\n",
-         (unsigned long)frequency, (unsigned long)divisor,
-         (unsigned long)cmr);
+  tmrinfo("frequency=%lu, divisor=%lu, cmr=%08lx\n",
+          (unsigned long)frequency, (unsigned long)divisor,
+          (unsigned long)cmr);
 
   /* Allocate the timer/counter and select its mode of operation
    *
@@ -200,7 +202,7 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
   oneshot->tch = sam_tc_allocate(chan, cmr);
   if (!oneshot->tch)
     {
-      tcdbg("ERROR: Failed to allocate timer channel %d\n", chan);
+      tmrerr("ERROR: Failed to allocate timer channel %d\n", chan);
       return -EBUSY;
     }
 
@@ -212,7 +214,10 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
   oneshot->running     = false;
   oneshot->handler     = NULL;
   oneshot->arg         = NULL;
+#ifdef CONFIG_SAM34_FREERUN
   oneshot->start_count = 0;
+#endif
+
   return OK;
 }
 
@@ -251,15 +256,17 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec)
  *
  ****************************************************************************/
 
-int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
-                      oneshot_handler_t handler, void *arg, const struct timespec *ts)
+int sam_oneshot_start(struct sam_oneshot_s *oneshot,
+                      struct sam_freerun_s *freerun,
+                      oneshot_handler_t handler, void *arg,
+                      const struct timespec *ts)
 {
   uint64_t usec;
   uint64_t regval;
   irqstate_t flags;
 
-  tcvdbg("handler=%p arg=%p, ts=(%lu, %lu)\n",
-         handler, arg, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
+  tmrinfo("handler=%p arg=%p, ts=(%lu, %lu)\n",
+          handler, arg, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
   DEBUGASSERT(oneshot && handler && ts);
 
   /* Was the oneshot already running? */
@@ -269,7 +276,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
     {
       /* Yes.. then cancel it */
 
-      tcvdbg("Already running... cancelling\n");
+      tmrinfo("Already running... cancelling\n");
       (void)sam_oneshot_cancel(oneshot, freerun, NULL);
     }
 
@@ -291,7 +298,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
 
   regval = (usec * (uint64_t)sam_tc_divfreq(oneshot->tch)) / USEC_PER_SEC;
 
-  tcvdbg("usec=%llu regval=%08llx\n", usec, regval);
+  tmrinfo("usec=%llu regval=%08llx\n", usec, regval);
   DEBUGASSERT(regval <= UINT16_MAX);
 
   /* Set up to receive the callback when the interrupt occurs */
@@ -309,6 +316,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
 
   sam_tc_start(oneshot->tch);
 
+#ifdef CONFIG_SAM34_FREERUN
   /* The function sam_tc_start() starts the timer/counter by setting the
    * bits TC_CCR_CLKEN and TC_CCR_SWTRG in the channel control register.
    * The first one enables the timer/counter the latter performs an
@@ -327,7 +335,11 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
    * vanishes at least if compiled with no optimisation.
    */
 
-  oneshot->start_count = sam_tc_getcounter(freerun->tch);
+  if (freerun != NULL)
+    {
+      oneshot->start_count = sam_tc_getcounter(freerun->tch);
+    }
+#endif
 
   /* Enable interrupts.  We should get the callback when the interrupt
    * occurs.
@@ -363,8 +375,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
  *
  ****************************************************************************/
 
-int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
-                       struct timespec *ts)
+int sam_oneshot_cancel(struct sam_oneshot_s *oneshot,
+                       struct sam_freerun_s *freerun, struct timespec *ts)
 {
   irqstate_t flags;
   uint64_t usec;
@@ -400,21 +412,24 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
    * REVISIT:  This does not appear to be the case.
    */
 
-  tcvdbg("Cancelling...\n");
+  tmrinfo("Cancelling...\n");
 
   count = sam_tc_getcounter(oneshot->tch);
   rc    = sam_tc_getregister(oneshot->tch, TC_REGC);
 
+#ifdef CONFIG_SAM34_FREERUN
   /* In the case the timer/counter was canceled very short after its start,
    * the counter register can hold the wrong value (the value of the last
    * run). To prevent this the counter value is set to zero if not at
    * least on tick passed since the start of the timer/counter.
    */
 
-  if (count > 0 && sam_tc_getcounter(freerun->tch) == oneshot->start_count)
+  if (count > 0 && freerun != NULL &&
+      sam_tc_getcounter(freerun->tch) == oneshot->start_count)
     {
       count = 0;
     }
+#endif
 
   /* Now we can disable the interrupt and stop the timer. */
 
@@ -436,8 +451,8 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
        * oneshot timer.
        */
 
-      tcvdbg("rc=%lu count=%lu usec=%lu\n",
-             (unsigned long)rc, (unsigned long)count, (unsigned long)usec);
+      tmrinfo("rc=%lu count=%lu usec=%lu\n",
+              (unsigned long)rc, (unsigned long)count, (unsigned long)usec);
 
       /* REVISIT: I am not certain why the timer counter value sometimes
        * exceeds RC.  Might be a bug, or perhaps the counter does not stop
@@ -481,8 +496,8 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
           ts->tv_nsec = (unsigned long)nsec;
         }
 
-      tcvdbg("remaining (%lu, %lu)\n",
-             (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
+      tmrinfo("remaining (%lu, %lu)\n",
+              (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
     }
 
   return OK;
diff --git a/arch/arm/src/sam34/sam4cm_oneshot.h b/arch/arm/src/sam34/sam4cm_oneshot.h
index d7dc7a18ee040968f61a73d09fe908a1859fad8f..d46b67b4211d9de78de1f4411eaf815097d1b174 100644
--- a/arch/arm/src/sam34/sam4cm_oneshot.h
+++ b/arch/arm/src/sam34/sam4cm_oneshot.h
@@ -46,7 +46,6 @@
 #include 
 
 #include "sam4cm_tc.h"
-#include "sam4cm_freerun.h"
 
 #ifdef CONFIG_SAM34_ONESHOT
 
@@ -83,11 +82,13 @@ struct sam_oneshot_s
   volatile oneshot_handler_t handler; /* Oneshot expiration callback */
   volatile void *arg;                 /* The argument that will accompany
                                        * the callback */
+#ifdef CONFIG_SAM34_FREERUN
   volatile uint32_t start_count;      /* Stores the value of the freerun counter,
                                        * at each start of the onshot timer. Is neccesary
                                        * to find out if the onshot counter was updated
                                        * correctly at the time of the call to
                                        * sam_oneshot_cancel or not. */
+#endif
 };
 
 /****************************************************************************
@@ -130,6 +131,14 @@ extern "C"
 int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
                            uint16_t resolution);
 
+/****************************************************************************
+ * Name: sam_oneshot_max_delay
+ *
+ * Description:
+ *   Determine the maximum delay of the one-shot timer (in microseconds)
+ *
+ ****************************************************************************/
+
 int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec);
 
 /****************************************************************************
@@ -144,7 +153,8 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec);
  *           sam_oneshot_initialize();
  *   freerun Caller allocated instance of the freerun state structure. This
  *           structure must have been previously initialized via a call to
- *           sam_freerun_initialize();
+ *           sam_freerun_initialize().  May be NULL if there is no matching
+ *           free-running timer.
  *   handler The function to call when when the oneshot timer expires.
  *   arg     An opaque argument that will accompany the callback.
  *   ts      Provides the duration of the one shot timer.
@@ -155,8 +165,11 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec);
  *
  ****************************************************************************/
 
-int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
-                      oneshot_handler_t handler, void *arg, const struct timespec *ts);
+struct sam_freerun_s;
+int sam_oneshot_start(struct sam_oneshot_s *oneshot,
+                      struct sam_freerun_s *freerun,
+                      oneshot_handler_t handler, void *arg,
+                      const struct timespec *ts);
 
 /****************************************************************************
  * Name: sam_oneshot_cancel
@@ -173,7 +186,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
  *           sam_oneshot_initialize();
  *   freerun Caller allocated instance of the freerun state structure. This
  *           structure must have been previously initialized via a call to
- *           sam_freerun_initialize();
+ *           sam_freerun_initialize().  May be NULL if there is no matching
+ *           free-running timer.
  *   ts      The location in which to return the time remaining on the
  *           oneshot timer.  A time of zero is returned if the timer is
  *           not running.
@@ -185,8 +199,9 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
  *
  ****************************************************************************/
 
-int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
-                       struct timespec *ts);
+struct sam_freerun_s;
+int sam_oneshot_cancel(struct sam_oneshot_s *oneshot,
+                       struct sam_freerun_s *freerun, struct timespec *ts);
 
 #undef EXTERN
 #ifdef __cplusplus
diff --git a/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c b/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c
new file mode 100644
index 0000000000000000000000000000000000000000..cdab331d93ab2cce41169ca8eabf12076bbfdfe9
--- /dev/null
+++ b/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c
@@ -0,0 +1,345 @@
+/****************************************************************************
+ *  arch/arm/src/sam/sam_oneshot_lowerhalf.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "sam_oneshot.h"
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* This structure describes the state of the oneshot timer lower-half driver */
+
+struct sam_oneshot_lowerhalf_s
+{
+  /* This is the part of the lower half driver that is visible to the upper-
+   * half client of the driver.  This must be the first thing in this
+   * structure so that pointers to struct oneshot_lowerhalf_s are cast
+   * compatible to struct sam_oneshot_lowerhalf_s and vice versa.
+   */
+
+  struct oneshot_lowerhalf_s lh;  /* Common lower-half driver fields */
+
+  /* Private lower half data follows */
+
+  struct sam_oneshot_s oneshot;   /* SAM-specific oneshot state */
+  oneshot_callback_t callback;    /* internal handler that receives callback */
+  FAR void *arg;                  /* Argument that is passed to the handler */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static void sam_oneshot_handler(void *arg);
+
+static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower,
+                         FAR struct timespec *ts);
+static int sam_start(FAR struct oneshot_lowerhalf_s *lower,
+                     oneshot_callback_t callback, FAR void *arg,
+                     FAR const struct timespec *ts);
+static int sam_cancel(FAR struct oneshot_lowerhalf_s *lower,
+                      FAR struct timespec *ts);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Lower half operations */
+
+static const struct oneshot_operations_s g_oneshot_ops =
+{
+  .max_delay = sam_max_delay,
+  .start     = sam_start,
+  .cancel    = sam_cancel,
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sam_oneshot_handler
+ *
+ * Description:
+ *   Timer expiration handler
+ *
+ * Input Parameters:
+ *   arg - Should be the same argument provided when sam_oneshot_start()
+ *         was called.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void sam_oneshot_handler(void *arg)
+{
+  FAR struct sam_oneshot_lowerhalf_s *priv =
+    (FAR struct sam_oneshot_lowerhalf_s *)arg;
+  oneshot_callback_t callback;
+  FAR void *cbarg;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Perhaps the callback was nullified in a race condition with
+   * sam_cancel?
+   */
+
+  if (priv->callback)
+    {
+      /* Sample and nullify BEFORE executing callback (in case the callback
+       * restarts the oneshot).
+       */
+
+      callback       = priv->callback;
+      cbarg          = priv->arg;
+      priv->callback = NULL;
+      priv->arg      = NULL;
+
+      /* Then perform the callback */
+
+      callback(&priv->lh, cbarg);
+    }
+}
+
+/****************************************************************************
+ * Name: sam_max_delay
+ *
+ * Description:
+ *   Determine the maximum delay of the one-shot timer (in microseconds)
+ *
+ * Input Parameters:
+ *   lower   An instance of the lower-half oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           oneshot_initialize();
+ *   ts      The location in which to return the maxumum delay.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower,
+                         FAR struct timespec *ts)
+{
+  FAR struct sam_oneshot_lowerhalf_s *priv =
+    (FAR struct sam_oneshot_lowerhalf_s *)lower;
+  uint64_t usecs;
+  int ret;
+
+  DEBUGASSERT(priv != NULL && ts != NULL);
+  ret = sam_oneshot_max_delay(&priv->oneshot, &usecs);
+  if (ret >= 0)
+    {
+      uint64_t sec = usecs / 1000000;
+      usecs -= 1000000 * sec;
+
+      ts->tv_sec  = (time_t)sec;
+      ts->tv_nsec = (long)(usecs * 1000);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sam_start
+ *
+ * Description:
+ *   Start the oneshot timer
+ *
+ * Input Parameters:
+ *   lower   An instance of the lower-half oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           oneshot_initialize();
+ *   handler The function to call when when the oneshot timer expires.
+ *   arg     An opaque argument that will accompany the callback.
+ *   ts      Provides the duration of the one shot timer.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+static int sam_start(FAR struct oneshot_lowerhalf_s *lower,
+                     oneshot_callback_t callback, FAR void *arg,
+                     FAR const struct timespec *ts)
+{
+  FAR struct sam_oneshot_lowerhalf_s *priv =
+    (FAR struct sam_oneshot_lowerhalf_s *)lower;
+  irqstate_t flags;
+  int ret;
+
+  DEBUGASSERT(priv != NULL && callback != NULL && ts != NULL);
+
+  /* Save the callback information and start the timer */
+
+  flags          = enter_critical_section();
+  priv->callback = callback;
+  priv->arg      = arg;
+  ret            = sam_oneshot_start(&priv->oneshot, NULL,
+                                     sam_oneshot_handler, priv, ts);
+  leave_critical_section(flags);
+
+  if (ret < 0)
+    {
+      tmrerr("ERROR: sam_oneshot_start failed: %d\n", flags);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sam_cancel
+ *
+ * Description:
+ *   Cancel the oneshot timer and return the time remaining on the timer.
+ *
+ *   NOTE: This function may execute at a high rate with no timer running (as
+ *   when pre-emption is enabled and disabled).
+ *
+ * Input Parameters:
+ *   lower   Caller allocated instance of the oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           oneshot_initialize();
+ *   ts      The location in which to return the time remaining on the
+ *           oneshot timer.  A time of zero is returned if the timer is
+ *           not running.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success.  A call to up_timer_cancel() when
+ *   the timer is not active should also return success; a negated errno
+ *   value is returned on any failure.
+ *
+ ****************************************************************************/
+
+static int sam_cancel(FAR struct oneshot_lowerhalf_s *lower,
+                        FAR struct timespec *ts)
+{
+  FAR struct sam_oneshot_lowerhalf_s *priv =
+    (FAR struct sam_oneshot_lowerhalf_s *)lower;
+  irqstate_t flags;
+  int ret;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Cancel the timer */
+
+  flags          = enter_critical_section();
+  ret            = sam_oneshot_cancel(&priv->oneshot, NULL, ts);
+  priv->callback = NULL;
+  priv->arg      = NULL;
+  leave_critical_section(flags);
+
+  if (ret < 0)
+    {
+      tmrerr("ERROR: sam_oneshot_cancel failed: %d\n", flags);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: oneshot_initialize
+ *
+ * Description:
+ *   Initialize the oneshot timer and return a oneshot lower half driver
+ *   instance.
+ *
+ * Input Parameters:
+ *   chan       Timer counter channel to be used.
+ *   resolution The required resolution of the timer in units of
+ *              microseconds.  NOTE that the range is restricted to the
+ *              range of uint16_t (excluding zero).
+ *
+ * Returned Value:
+ *   On success, a non-NULL instance of the oneshot lower-half driver is
+ *   returned.  NULL is return on any failure.
+ *
+ ****************************************************************************/
+
+FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan,
+                                                   uint16_t resolution)
+{
+  FAR struct sam_oneshot_lowerhalf_s *priv;
+  int ret;
+
+  /* Allocate an instance of the lower half driver */
+
+  priv = (FAR struct sam_oneshot_lowerhalf_s *)
+    kmm_zalloc(sizeof(struct sam_oneshot_lowerhalf_s));
+
+  if (priv == NULL)
+    {
+      tmrerr("ERROR: Failed to initialized state structure\n");
+      return NULL;
+    }
+
+  /* Initialize the lower-half driver structure */
+
+  priv->lh.ops = &g_oneshot_ops;
+
+  /* Initialize the contained SAM oneshot timer */
+
+  ret = sam_oneshot_initialize(&priv->oneshot, chan, resolution);
+  if (ret < 0)
+    {
+      tmrerr("ERROR: sam_oneshot_initialize failed: %d\n", ret);
+      kmm_free(priv);
+      return NULL;
+    }
+
+  return &priv->lh;
+}
\ No newline at end of file
diff --git a/arch/arm/src/sam34/sam4cm_tc.c b/arch/arm/src/sam34/sam4cm_tc.c
index 91ab9c3ca2e86957eb10d6108be31127a1e12b57..c366118f4d02a56397a2a45c1a6ec27912de1cab 100644
--- a/arch/arm/src/sam34/sam4cm_tc.c
+++ b/arch/arm/src/sam34/sam4cm_tc.c
@@ -77,6 +77,10 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
+#ifndef CONFIG_DEBUG_TIMER_INFO
+#  undef CONFIG_SAM34_TC_REGDEBUG
+#endif
+
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -143,8 +147,7 @@ static inline void sam_chan_putreg(struct sam_chan_s *chan,
 
 /* Interrupt Handling *******************************************************/
 
-static int sam_tc_interrupt(struct sam_chan_s *tc);
-static int sam_raw_interrupt(int irq, void *context);
+static int sam_tc_interrupt(int irq, void *context, FAR void *arg);
 
 /* Initialization ***********************************************************/
 
@@ -390,21 +393,21 @@ static void sam_regdump(struct sam_chan_s *chan, const char *msg)
   uintptr_t base;
 
   base = chan->base;
-  lldbg("TC%d [%08x]: %s\n", chan->chan, (int)base, msg);
-  lldbg("  BMR: %08x QIMR: %08x QISR: %08x WPMR: %08x\n",
-        getreg32(base+SAM_TC_BMR_OFFSET), getreg32(base+SAM_TC_QIMR_OFFSET),
-        getreg32(base+SAM_TC_QISR_OFFSET), getreg32(base+SAM_TC_WPMR_OFFSET));
+  tmrinfo("TC%d [%08x]: %s\n", chan->chan, (int)base, msg);
+  tmrinfo("  BMR: %08x QIMR: %08x QISR: %08x WPMR: %08x\n",
+          getreg32(base+SAM_TC_BMR_OFFSET), getreg32(base+SAM_TC_QIMR_OFFSET),
+          getreg32(base+SAM_TC_QISR_OFFSET), getreg32(base+SAM_TC_WPMR_OFFSET));
 
   base = chan->base;
-  lldbg("TC%d Channel %d [%08x]: %s\n", chan->chan, chan->chan, (int)base, msg);
-  lldbg("  CMR: %08x SSMR: %08x  RAB: %08x   CV: %08x\n",
-        getreg32(base+SAM_TC_CMR_OFFSET), getreg32(base+SAM_TC_SMMR_OFFSET),
-        getreg32(base+SAM_TC_RAB_OFFSET), getreg32(base+SAM_TC_CV_OFFSET));
-  lldbg("   RA: %08x   RB: %08x   RC: %08x   SR: %08x\n",
-        getreg32(base+SAM_TC_RA_OFFSET), getreg32(base+SAM_TC_RB_OFFSET),
-        getreg32(base+SAM_TC_RC_OFFSET), getreg32(base+SAM_TC_SR_OFFSET));
-  lldbg("  IMR: %08x\n",
-        getreg32(base+SAM_TC_IMR_OFFSET));
+  tmrinfo("TC%d Channel %d [%08x]: %s\n", chan->chan, chan->chan, (int)base, msg);
+  tmrinfo("  CMR: %08x SSMR: %08x  RAB: %08x   CV: %08x\n",
+          getreg32(base+SAM_TC_CMR_OFFSET), getreg32(base+SAM_TC_SMMR_OFFSET),
+          getreg32(base+SAM_TC_RAB_OFFSET), getreg32(base+SAM_TC_CV_OFFSET));
+  tmrinfo("   RA: %08x   RB: %08x   RC: %08x   SR: %08x\n",
+          getreg32(base+SAM_TC_RA_OFFSET), getreg32(base+SAM_TC_RB_OFFSET),
+          getreg32(base+SAM_TC_RC_OFFSET), getreg32(base+SAM_TC_SR_OFFSET));
+  tmrinfo("  IMR: %08x\n",
+          getreg32(base+SAM_TC_IMR_OFFSET));
 }
 #endif
 
@@ -447,7 +450,7 @@ static bool sam_checkreg(struct sam_chan_s *chan, bool wr, uint32_t regaddr,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", chan->ntimes);
+          tmrinfo("...[Repeats %d times]...\n", chan->ntimes);
         }
 
       /* Save information about the new access */
@@ -481,7 +484,7 @@ static inline uint32_t sam_chan_getreg(struct sam_chan_s *chan,
 #ifdef CONFIG_SAM34_TC_REGDEBUG
   if (sam_checkreg(chan, false, regaddr, regval))
     {
-      lldbg("%08x->%08x\n", regaddr, regval);
+      tmrinfo("%08x->%08x\n", regaddr, regval);
     }
 #endif
 
@@ -504,7 +507,7 @@ static inline void sam_chan_putreg(struct sam_chan_s *chan, unsigned int offset,
 #ifdef CONFIG_SAM34_TC_REGDEBUG
   if (sam_checkreg(chan, true, regaddr, regval))
     {
-      lldbg("%08x<-%08x\n", regaddr, regval);
+      tmrinfo("%08x<-%08x\n", regaddr, regval);
     }
 #endif
 
@@ -531,14 +534,17 @@ static inline void sam_chan_putreg(struct sam_chan_s *chan, unsigned int offset,
  *
  ****************************************************************************/
 
-static int sam_tc_interrupt(struct sam_chan_s *chan)
+static int sam_tc_interrupt(int irq, void *context, FAR void *arg)
 {
+  struct sam_chan_s *chan = (struct sam_chan_s *)arg;
   uint32_t sr;
   uint32_t imr;
   uint32_t pending;
 
   /* Process interrupts */
 
+  DEBUGASSERT(chan != NULL);
+
   /* Get the interrupt status for this channel */
 
   sr      = sam_chan_getreg(chan, SAM_TC_SR_OFFSET);
@@ -571,41 +577,10 @@ static int sam_tc_interrupt(struct sam_chan_s *chan)
   return OK;
 }
 
-/****************************************************************************
- * Name: sam_raw_interrupt
- *
- * Description:
- *  Timer block interrupt handlers
- *
- * Input Parameters:
- *   irq
- *   context
- *
- * Returned Value:
- *
- ****************************************************************************/
-
-static int sam_raw_interrupt(int irq, void *context)
-{
-  int i;
-  struct sam_chan_s *chan;
-
-  for (i = 0; i < ENABLED_CHANNELS; i++)
-    {
-      chan = &g_channels[i];
-
-      if (chan->irq == irq)
-        {
-          return sam_tc_interrupt(chan);
-        }
-    }
-
-  return OK;
-}
-
 /****************************************************************************
  * Initialization
  ****************************************************************************/
+
 /****************************************************************************
  * Name: sam_tc_mckdivider
  *
@@ -757,7 +732,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
     {
       /* Timer/counter is not invalid or not enabled */
 
-      tcdbg("ERROR: Bad channel number: %d\n", channel);
+      tmrerr("ERROR: Bad channel number: %d\n", channel);
       return NULL;
     }
 
@@ -770,7 +745,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
     {
       /* Initialize the channel. */
 
-      tcdbg("Initializing TC%d\n", chconfig->chan);
+      tmrerr("ERROR: Initializing TC%d\n", chconfig->chan);
 
       memset(chan, 0, sizeof(struct sam_chan_s));
       sem_init(&chan->exclsem, 0, 1);
@@ -812,7 +787,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
 
       /* Attach the timer interrupt handler and enable the timer interrupts */
 
-      (void)irq_attach(chan->irq, sam_raw_interrupt);
+      (void)irq_attach(chan->irq, sam_tc_interrupt, chan);
       up_enable_irq(chan->irq);
 
       /* Now the channel is initialized */
@@ -831,7 +806,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
     {
       /* No.. return a failure */
 
-      tcdbg("Channel %d is in-used\n", channel);
+      tmrerr("ERROR: Channel %d is in-use\n", channel);
       sam_givesem(chan);
       return NULL;
     }
@@ -876,7 +851,7 @@ TC_HANDLE sam_tc_allocate(int channel, int mode)
    * access to the requested channel.
    */
 
-  tcvdbg("channel=%d mode=%08x\n", channel, mode);
+  tmrinfo("channel=%d mode=%08x\n", channel, mode);
 
   chan = sam_tc_initialize(channel);
   if (chan)
@@ -902,7 +877,7 @@ TC_HANDLE sam_tc_allocate(int channel, int mode)
 
   /* Return an opaque reference to the channel */
 
-  tcvdbg("Returning %p\n", chan);
+  tmrinfo("Returning %p\n", chan);
   return (TC_HANDLE)chan;
 }
 
@@ -924,7 +899,7 @@ void sam_tc_free(TC_HANDLE handle)
 {
   struct sam_chan_s *chan = (struct sam_chan_s *)handle;
 
-  tcvdbg("Freeing %p channel=%d inuse=%d\n", chan, chan->chan, chan->inuse);
+  tmrinfo("Freeing %p channel=%d inuse=%d\n", chan, chan->chan, chan->inuse);
   DEBUGASSERT(chan && chan->inuse);
 
   /* Make sure that interrupts are detached and disabled and that the channel
@@ -957,7 +932,7 @@ void sam_tc_start(TC_HANDLE handle)
 {
   struct sam_chan_s *chan = (struct sam_chan_s *)handle;
 
-  tcvdbg("Starting channel %d inuse=%d\n", chan->chan, chan->inuse);
+  tmrinfo("Starting channel %d inuse=%d\n", chan->chan, chan->inuse);
   DEBUGASSERT(chan && chan->inuse);
 
   /* Read the SR to clear any pending interrupts on this channel */
@@ -989,7 +964,7 @@ void sam_tc_stop(TC_HANDLE handle)
 {
   struct sam_chan_s *chan = (struct sam_chan_s *)handle;
 
-  tcvdbg("Stopping channel %d inuse=%d\n", chan->chan, chan->inuse);
+  tmrinfo("Stopping channel %d inuse=%d\n", chan->chan, chan->inuse);
   DEBUGASSERT(chan && chan->inuse);
 
   sam_chan_putreg(chan, SAM_TC_CCR_OFFSET, TC_CCR_CLKDIS);
@@ -1096,8 +1071,8 @@ void sam_tc_setregister(TC_HANDLE handle, int regid, uint32_t regval)
 
   DEBUGASSERT(chan && regid < TC_NREGISTERS);
 
-  tcvdbg("Channel %d: Set register RC%d to %08lx\n",
-         chan->chan, regid, (unsigned long)regval);
+  tmrinfo("Channel %d: Set register RC%d to %08lx\n",
+          chan->chan, regid, (unsigned long)regval);
 
   sam_chan_putreg(chan, g_regoffset[regid], regval);
   sam_regdump(chan, "Set register");
@@ -1233,7 +1208,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
   uint32_t ftcin = sam_tc_infreq();
   int ndx = 0;
 
-  tcvdbg("frequency=%d\n", frequency);
+  tmrinfo("frequency=%d\n", frequency);
 
   /* Satisfy lower bound.  That is, the value of the divider such that:
    *
@@ -1246,7 +1221,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
         {
           /* If no divisor can be found, return -ERANGE */
 
-          tcdbg("Lower bound search failed\n");
+          tmrerr("ERROR: Lower bound search failed\n");
           return -ERANGE;
         }
     }
@@ -1270,7 +1245,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
   if (div)
     {
       uint32_t value = sam_tc_freqdiv_lookup(ftcin, ndx);
-      tcvdbg("return div=%lu\n", (unsigned long)value);
+      tmrinfo("return div=%lu\n", (unsigned long)value);
       *div = value;
     }
 
@@ -1278,7 +1253,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
 
   if (tcclks)
     {
-      tcvdbg("return tcclks=%08lx\n", (unsigned long)TC_CMR_TCCLKS(ndx));
+      tmrinfo("return tcclks=%08lx\n", (unsigned long)TC_CMR_TCCLKS(ndx));
       *tcclks = TC_CMR_TCCLKS(ndx);
     }
 
diff --git a/arch/arm/src/sam34/sam4cm_tc.h b/arch/arm/src/sam34/sam4cm_tc.h
index 85520d84d935c7b89e3ccc52166ea976351c4397..e474f2bc6666b6cea451cc2626b4ab5aa4764803 100644
--- a/arch/arm/src/sam34/sam4cm_tc.h
+++ b/arch/arm/src/sam34/sam4cm_tc.h
@@ -71,8 +71,7 @@
 
 /* Timer debug is enabled if any timer client is enabled */
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_ANALOG
+#ifndef CONFIG_DEBUG_TIMER_INFO
 #  undef CONFIG_SAMA5_TC_REGDEBUG
 #endif
 
@@ -80,20 +79,6 @@
 #  define CONFIG_SAM34_TC_DEBUG 1
 #endif
 
-/* Timer/counter debug output */
-
-#ifdef CONFIG_SAM34_TC_DEBUG
-#  define tcdbg    dbg
-#  define tcvdbg   vdbg
-#  define tclldbg  lldbg
-#  define tcllvdbg llvdbg
-#else
-#  define tcdbg(x...)
-#  define tcvdbg(x...)
-#  define tclldbg(x...)
-#  define tcllvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Types
  ****************************************************************************/
diff --git a/arch/arm/src/sam34/sam4cm_tickless.c b/arch/arm/src/sam34/sam4cm_tickless.c
index 7d13e8756ef10502e1c9043d983c4510918597c6..8f3ee17509e4289ad0e229c5080abcdeaa19c6f8 100644
--- a/arch/arm/src/sam34/sam4cm_tickless.c
+++ b/arch/arm/src/sam34/sam4cm_tickless.c
@@ -39,7 +39,7 @@
  * is suppressed and the platform specific code is expected to provide the
  * following custom functions.
  *
- *   void up_timer_initialize(void): Initializes the timer facilities.  Called
+ *   void arm_timer_initialize(void): Initializes the timer facilities.  Called
  *     early in the initialization sequence (by up_intialize()).
  *   int up_timer_gettime(FAR struct timespec *ts):  Returns the current
  *     time from the platform specific time source.
@@ -197,7 +197,7 @@ static struct sam_tickless_s g_tickless;
 
 static void sam_oneshot_handler(void *arg)
 {
-  tcllvdbg("Expired...\n");
+  tmrinfo("Expired...\n");
   sched_timer_expiration();
 }
 
@@ -206,7 +206,7 @@ static void sam_oneshot_handler(void *arg)
  ****************************************************************************/
 
 /****************************************************************************
- * Name: up_timer_initialize
+ * Name: arm_timer_initialize
  *
  * Description:
  *   Initializes all platform-specific timer facilities.  This function is
@@ -230,7 +230,7 @@ static void sam_oneshot_handler(void *arg)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
 #ifdef CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP
   uint64_t max_delay;
@@ -244,7 +244,7 @@ void up_timer_initialize(void)
                                CONFIG_USEC_PER_TICK);
   if (ret < 0)
     {
-      tclldbg("ERROR: sam_oneshot_initialize failed\n");
+      tmrerr("ERROR: sam_oneshot_initialize failed\n");
       PANIC();
     }
 
@@ -256,7 +256,7 @@ void up_timer_initialize(void)
   ret = sam_oneshot_max_delay(&g_tickless.oneshot, &max_delay);
   if (ret < 0)
     {
-      tclldbg("ERROR: sam_oneshot_max_delay failed\n");
+      tmrerr("ERROR: sam_oneshot_max_delay failed\n");
       PANIC();
     }
 
@@ -280,7 +280,7 @@ void up_timer_initialize(void)
                                CONFIG_USEC_PER_TICK);
   if (ret < 0)
     {
-      tclldbg("ERROR: sam_freerun_initialize failed\n");
+      tmrerr("ERROR: sam_freerun_initialize failed\n");
       PANIC();
     }
 
@@ -292,7 +292,7 @@ void up_timer_initialize(void)
  *
  * Description:
  *   Return the elapsed time since power-up (or, more correctly, since
- *   up_timer_initialize() was called).  This function is functionally
+ *   arm_timer_initialize() was called).  This function is functionally
  *   equivalent to:
  *
  *      int clock_gettime(clockid_t clockid, FAR struct timespec *ts);
diff --git a/arch/arm/src/sam34/sam4l_gpio.c b/arch/arm/src/sam34/sam4l_gpio.c
index 4dcefcef55e1a5e3ee8e3fe614a674829377d7b9..02394a543faeb63f0b01050a689030aca0f76301 100644
--- a/arch/arm/src/sam34/sam4l_gpio.c
+++ b/arch/arm/src/sam34/sam4l_gpio.c
@@ -59,7 +59,7 @@
  * Private Data
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 static const char g_portchar[4]   = { 'A', 'B', 'C', 'D' };
 #endif
 
@@ -522,7 +522,7 @@ bool sam_gpioread(gpio_pinset_t pinset)
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 int sam_dumpgpio(uint32_t pinset, const char *msg)
 {
   irqstate_t    flags;
@@ -539,23 +539,25 @@ int sam_dumpgpio(uint32_t pinset, const char *msg)
   /* The following requires exclusive access to the GPIO registers */
 
   flags = enter_critical_section();
-  lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
-        g_portchar[port], pinset, base, msg);
-  lldbg("    GPER: %08x  PMR0: %08x  PMR1: %08x  PMR2: %08x\n",
-        getreg32(base + SAM_GPIO_GPER_OFFSET), getreg32(base + SAM_GPIO_PMR0_OFFSET),
-        getreg32(base + SAM_GPIO_PMR1_OFFSET), getreg32(base + SAM_GPIO_PMR2_OFFSET));
-  lldbg("   ODER: %08x   OVR: %08x   PVR:  %08x  PUER: %08x\n",
-        getreg32(base + SAM_GPIO_ODER_OFFSET), getreg32(base + SAM_GPIO_OVR_OFFSET),
-        getreg32(base + SAM_GPIO_PVR_OFFSET), getreg32(base + SAM_GPIO_PUER_OFFSET));
-  lldbg("   PDER: %08x    IER: %08x  IMR0: %08x  IMR1: %08x\n",
-        getreg32(base + SAM_GPIO_PDER_OFFSET), getreg32(base + SAM_GPIO_IER_OFFSET),
-        getreg32(base + SAM_GPIO_IMR0_OFFSET), getreg32(base + SAM_GPIO_IMR1_OFFSET));
-  lldbg("   GFER: %08x    IFR: %08x ODCR0: %08x ODCR1: %08x\n",
-        getreg32(base + SAM_GPIO_GFER_OFFSET), getreg32(base + SAM_GPIO_IFR_OFFSET),
-        getreg32(base + SAM_GPIO_ODCR0_OFFSET), getreg32(base + SAM_GPIO_ODCR1_OFFSET));
-  lldbg("  OSRR0: %08x   EVER: %08x PARAM: %08x  VERS: %08x\n",
-        getreg32(base + SAM_GPIO_OSRR0_OFFSET), getreg32(base + SAM_GPIO_EVER_OFFSET),
-        getreg32(base + SAM_GPIO_PARAMETER_OFFSET), getreg32(base + SAM_GPIO_VERSION_OFFSET));
+
+  gpioinfo("GPIO%c pinset: %08x base: %08x -- %s\n",
+           g_portchar[port], pinset, base, msg);
+  gpioinfo("    GPER: %08x  PMR0: %08x  PMR1: %08x  PMR2: %08x\n",
+           getreg32(base + SAM_GPIO_GPER_OFFSET), getreg32(base + SAM_GPIO_PMR0_OFFSET),
+           getreg32(base + SAM_GPIO_PMR1_OFFSET), getreg32(base + SAM_GPIO_PMR2_OFFSET));
+  gpioinfo("   ODER: %08x   OVR: %08x   PVR:  %08x  PUER: %08x\n",
+           getreg32(base + SAM_GPIO_ODER_OFFSET), getreg32(base + SAM_GPIO_OVR_OFFSET),
+           getreg32(base + SAM_GPIO_PVR_OFFSET), getreg32(base + SAM_GPIO_PUER_OFFSET));
+  gpioinfo("   PDER: %08x    IER: %08x  IMR0: %08x  IMR1: %08x\n",
+           getreg32(base + SAM_GPIO_PDER_OFFSET), getreg32(base + SAM_GPIO_IER_OFFSET),
+           getreg32(base + SAM_GPIO_IMR0_OFFSET), getreg32(base + SAM_GPIO_IMR1_OFFSET));
+  gpioinfo("   GFER: %08x    IFR: %08x ODCR0: %08x ODCR1: %08x\n",
+           getreg32(base + SAM_GPIO_GFER_OFFSET), getreg32(base + SAM_GPIO_IFR_OFFSET),
+           getreg32(base + SAM_GPIO_ODCR0_OFFSET), getreg32(base + SAM_GPIO_ODCR1_OFFSET));
+  gpioinfo("  OSRR0: %08x   EVER: %08x PARAM: %08x  VERS: %08x\n",
+           getreg32(base + SAM_GPIO_OSRR0_OFFSET), getreg32(base + SAM_GPIO_EVER_OFFSET),
+           getreg32(base + SAM_GPIO_PARAMETER_OFFSET), getreg32(base + SAM_GPIO_VERSION_OFFSET));
+
   leave_critical_section(flags);
   return OK;
 }
diff --git a/arch/arm/src/sam34/sam4s_gpio.h b/arch/arm/src/sam34/sam4s_gpio.h
index 34ffc0aa314f3156917846a1279b53219304ee67..082fad42a997809e39a0fa809ac2098c612d6be4 100644
--- a/arch/arm/src/sam34/sam4s_gpio.h
+++ b/arch/arm/src/sam34/sam4s_gpio.h
@@ -83,11 +83,11 @@
 #define GPIO_CFG_SHIFT             (12)        /* Bits 12-16: GPIO configuration bits */
 #define GPIO_CFG_MASK              (31 << GPIO_CFG_SHIFT)
 #  define GPIO_CFG_DEFAULT         (0  << GPIO_CFG_SHIFT) /* Default, no attribute */
-#  define GPIO_CFG_PULLUP          (1  << GPIO_CFG_SHIFT) /* Bit 11: Internal pull-up */
-#  define GPIO_CFG_PULLDOWN        (2  << GPIO_CFG_SHIFT) /* Bit 11: Internal pull-down */
-#  define GPIO_CFG_DEGLITCH        (4  << GPIO_CFG_SHIFT) /* Bit 12: Internal glitch filter */
-#  define GPIO_CFG_OPENDRAIN       (8  << GPIO_CFG_SHIFT) /* Bit 13: Open drain */
-#  define GPIO_CFG_SCHMITT         (16 << GPIO_CFG_SHIFT) /* Bit 13: Schmitt trigger */
+#  define GPIO_CFG_PULLUP          (1  << GPIO_CFG_SHIFT) /* Bit 12: Internal pull-up */
+#  define GPIO_CFG_PULLDOWN        (2  << GPIO_CFG_SHIFT) /* Bit 13: Internal pull-down */
+#  define GPIO_CFG_DEGLITCH        (4  << GPIO_CFG_SHIFT) /* Bit 14: Internal glitch filter */
+#  define GPIO_CFG_OPENDRAIN       (8  << GPIO_CFG_SHIFT) /* Bit 15: Open drain */
+#  define GPIO_CFG_SCHMITT         (16 << GPIO_CFG_SHIFT) /* Bit 16: Schmitt trigger */
 
 /* Additional interrupt modes:
  *
@@ -99,7 +99,7 @@
 #  define _GIO_INT_AIM             (1 << 10)   /* Bit 10: Additional Interrupt modes */
 #  define _GPIO_INT_LEVEL          (1 << 9)    /* Bit 9: Level detection interrupt */
 #  define _GPIO_INT_EDGE           (0)         /*        (vs. Edge detection interrupt) */
-#  define _GPIO_INT_RH             (1 << 8)    /* Bit 9: Rising edge/High level detection interrupt */
+#  define _GPIO_INT_RH             (1 << 8)    /* Bit 8: Rising edge/High level detection interrupt */
 #  define _GPIO_INT_FL             (0)         /*        (vs. Falling edge/Low level detection interrupt) */
 
 #  define GPIO_INT_HIGHLEVEL       (_GIO_INT_AIM | _GPIO_INT_LEVEL | _GPIO_INT_RH)
diff --git a/arch/arm/src/sam34/sam_dmac.c b/arch/arm/src/sam34/sam_dmac.c
index bcc8fb03f0726e14c8c3b0176437beba35c26adf..6cd36cacf820bdb5b7413c093fc8379f6e7388f2 100644
--- a/arch/arm/src/sam34/sam_dmac.c
+++ b/arch/arm/src/sam34/sam_dmac.c
@@ -889,7 +889,7 @@ sam_allocdesc(struct sam_dma_s *dmach, struct dma_linklist_s *prev,
    * Obviously setting it to zero would break that usage.
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (src != 0)
 #endif
     {
@@ -1276,7 +1276,7 @@ static void sam_dmaterminate(struct sam_dma_s *dmach, int result)
  *
  ****************************************************************************/
 
-static int sam_dmainterrupt(int irq, void *context)
+static int sam_dmainterrupt(int irq, void *context, FAR void *arg)
 {
   struct sam_dma_s *dmach;
   unsigned int chndx;
@@ -1354,7 +1354,7 @@ static int sam_dmainterrupt(int irq, void *context)
 
 void weak_function up_dmainitialize(void)
 {
-  dmallvdbg("Initialize DMAC0\n");
+  dmainfo("Initialize DMAC0\n");
 
   /* Enable peripheral clock */
 
@@ -1370,7 +1370,7 @@ void weak_function up_dmainitialize(void)
 
   /* Attach DMA interrupt vector */
 
-  (void)irq_attach(SAM_IRQ_DMAC, sam_dmainterrupt);
+  (void)irq_attach(SAM_IRQ_DMAC, sam_dmainterrupt, NULL);
 
   /* Enable the IRQ at the NVIC (still disabled at the DMA controller) */
 
@@ -1460,7 +1460,7 @@ DMA_HANDLE sam_dmachannel(uint32_t chflags)
 
   sam_givechsem();
 
-  dmavdbg("chflags: %08x returning dmach: %p\n",  (int)chflags, dmach);
+  dmainfo("chflags: %08x returning dmach: %p\n",  (int)chflags, dmach);
   return (DMA_HANDLE)dmach;
 }
 
@@ -1486,7 +1486,7 @@ void sam_dmaconfig(DMA_HANDLE handle, uint32_t chflags)
 
   /* Set the new DMA channel flags. */
 
-  dmavdbg("chflags: %08x\n",  (int)chflags);
+  dmainfo("chflags: %08x\n",  (int)chflags);
   dmach->flags = chflags;
 }
 
@@ -1507,7 +1507,7 @@ void sam_dmafree(DMA_HANDLE handle)
 {
   struct sam_dma_s *dmach = (struct sam_dma_s *)handle;
 
-  dmavdbg("dmach: %p\n", dmach);
+  dmainfo("dmach: %p\n", dmach);
   DEBUGASSERT((dmach != NULL) && (dmach->inuse));
 
   /* Mark the channel no longer in use.  Clearing the inuse flag is an atomic
@@ -1536,10 +1536,10 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr, size_t nby
   size_t maxtransfer;
   int ret = OK;
 
-  dmavdbg("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
+  dmainfo("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
           dmach, (int)paddr, (int)maddr, (int)nbytes);
   DEBUGASSERT(dmach);
-  dmavdbg("llhead: %p lltail: %p\n", dmach->llhead, dmach->lltail);
+  dmainfo("llhead: %p lltail: %p\n", dmach->llhead, dmach->lltail);
 
   /* The maximum transfer size in bytes depends upon the maximum number of
    * transfers and the number of bytes per transfer.
@@ -1604,10 +1604,10 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr, size_t nby
   size_t maxtransfer;
   int ret = OK;
 
-  dmavdbg("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
+  dmainfo("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
           dmach, (int)paddr, (int)maddr, (int)nbytes);
   DEBUGASSERT(dmach);
-  dmavdbg("llhead: %p lltail: %p\n", dmach->llhead, dmach->lltail);
+  dmainfo("llhead: %p lltail: %p\n", dmach->llhead, dmach->lltail);
 
   /* The maximum transfer size in bytes depends upon the maximum number of
    * transfers and the number of bytes per transfer.
@@ -1667,7 +1667,7 @@ int sam_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
   struct sam_dma_s *dmach = (struct sam_dma_s *)handle;
   int ret = -EINVAL;
 
-  dmavdbg("dmach: %p callback: %p arg: %p\n", dmach, callback, arg);
+  dmainfo("dmach: %p callback: %p arg: %p\n", dmach, callback, arg);
   DEBUGASSERT(dmach != NULL);
 
   /* Verify that the DMA has been setup (i.e., at least one entry in the
@@ -1711,7 +1711,7 @@ void sam_dmastop(DMA_HANDLE handle)
   struct sam_dma_s *dmach = (struct sam_dma_s *)handle;
   irqstate_t flags;
 
-  dmavdbg("dmach: %p\n", dmach);
+  dmainfo("dmach: %p\n", dmach);
   DEBUGASSERT(dmach != NULL);
 
   flags = enter_critical_section();
@@ -1730,7 +1730,7 @@ void sam_dmastop(DMA_HANDLE handle)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs)
 {
   struct sam_dma_s *dmach = (struct sam_dma_s *)handle;
@@ -1761,7 +1761,7 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs)
   regs->cfg    = getreg32(dmach->base + SAM_DMACHAN_CFG_OFFSET);
   leave_critical_section(flags);
 }
-#endif /* CONFIG_DEBUG_DMA */
+#endif /* CONFIG_DEBUG_DMA_INFO */
 
 /****************************************************************************
  * Name: sam_dmadump
@@ -1774,28 +1774,28 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void sam_dmadump(DMA_HANDLE handle, const struct sam_dmaregs_s *regs,
                  const char *msg)
 {
   struct sam_dma_s *dmach = (struct sam_dma_s *)handle;
 
-  dmadbg("%s\n", msg);
-  dmadbg("  DMA Global Registers:\n");
-  dmadbg("      GCFG[%08x]: %08x\n", SAM_DMAC_GCFG, regs->gcfg);
-  dmadbg("        EN[%08x]: %08x\n", SAM_DMAC_EN, regs->en);
-  dmadbg("      SREQ[%08x]: %08x\n", SAM_DMAC_SREQ, regs->sreq);
-  dmadbg("      CREQ[%08x]: %08x\n", SAM_DMAC_CREQ, regs->creq);
-  dmadbg("      LAST[%08x]: %08x\n", SAM_DMAC_LAST, regs->last);
-  dmadbg("    EBCIMR[%08x]: %08x\n", SAM_DMAC_EBCIMR, regs->ebcimr);
-  dmadbg("      CHSR[%08x]: %08x\n", SAM_DMAC_CHSR, regs->chsr);
-  dmadbg("  DMA Channel Registers:\n");
-  dmadbg("     SADDR[%08x]: %08x\n", dmach->base + SAM_DMACHAN_SADDR_OFFSET, regs->saddr);
-  dmadbg("     DADDR[%08x]: %08x\n", dmach->base + SAM_DMACHAN_DADDR_OFFSET, regs->daddr);
-  dmadbg("      DSCR[%08x]: %08x\n", dmach->base + SAM_DMACHAN_DSCR_OFFSET, regs->dscr);
-  dmadbg("     CTRLA[%08x]: %08x\n", dmach->base + SAM_DMACHAN_CTRLA_OFFSET, regs->ctrla);
-  dmadbg("     CTRLB[%08x]: %08x\n", dmach->base + SAM_DMACHAN_CTRLB_OFFSET, regs->ctrlb);
-  dmadbg("       CFG[%08x]: %08x\n", dmach->base + SAM_DMACHAN_CFG_OFFSET, regs->cfg);
+  dmainfo("%s\n", msg);
+  dmainfo("  DMA Global Registers:\n");
+  dmainfo("      GCFG[%08x]: %08x\n", SAM_DMAC_GCFG, regs->gcfg);
+  dmainfo("        EN[%08x]: %08x\n", SAM_DMAC_EN, regs->en);
+  dmainfo("      SREQ[%08x]: %08x\n", SAM_DMAC_SREQ, regs->sreq);
+  dmainfo("      CREQ[%08x]: %08x\n", SAM_DMAC_CREQ, regs->creq);
+  dmainfo("      LAST[%08x]: %08x\n", SAM_DMAC_LAST, regs->last);
+  dmainfo("    EBCIMR[%08x]: %08x\n", SAM_DMAC_EBCIMR, regs->ebcimr);
+  dmainfo("      CHSR[%08x]: %08x\n", SAM_DMAC_CHSR, regs->chsr);
+  dmainfo("  DMA Channel Registers:\n");
+  dmainfo("     SADDR[%08x]: %08x\n", dmach->base + SAM_DMACHAN_SADDR_OFFSET, regs->saddr);
+  dmainfo("     DADDR[%08x]: %08x\n", dmach->base + SAM_DMACHAN_DADDR_OFFSET, regs->daddr);
+  dmainfo("      DSCR[%08x]: %08x\n", dmach->base + SAM_DMACHAN_DSCR_OFFSET, regs->dscr);
+  dmainfo("     CTRLA[%08x]: %08x\n", dmach->base + SAM_DMACHAN_CTRLA_OFFSET, regs->ctrla);
+  dmainfo("     CTRLB[%08x]: %08x\n", dmach->base + SAM_DMACHAN_CTRLB_OFFSET, regs->ctrlb);
+  dmainfo("       CFG[%08x]: %08x\n", dmach->base + SAM_DMACHAN_CFG_OFFSET, regs->cfg);
 }
-#endif /* CONFIG_DEBUG_DMA */
+#endif /* CONFIG_DEBUG_DMA_INFO */
 #endif /* CONFIG_SAM34_DMAC0 */
diff --git a/arch/arm/src/sam34/sam_dmac.h b/arch/arm/src/sam34/sam_dmac.h
index 0ff4f2e14485f92635e190cf0fab525f7ad3f973..58e7e68eb80d1e8732f6964a11a27ce5e859f5d2 100644
--- a/arch/arm/src/sam34/sam_dmac.h
+++ b/arch/arm/src/sam34/sam_dmac.h
@@ -50,12 +50,6 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* Configuration ********************************************************************/
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_DMA
-#endif
-
 /* DMA ******************************************************************************/
 
 /* Flags used to characterize the desired DMA channel.  The naming convention is that
@@ -125,7 +119,7 @@ typedef void (*dma_callback_t)(DMA_HANDLE handle, void *arg, int result);
 
 /* The following is used for sampling DMA registers when CONFIG DEBUG_DMA is selected */
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 struct sam_dmaregs_s
 {
   /* Global Registers */
@@ -285,7 +279,7 @@ void sam_dmastop(DMA_HANDLE handle);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs);
 #else
 #  define sam_dmasample(handle,regs)
@@ -299,7 +293,7 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void sam_dmadump(DMA_HANDLE handle, const struct sam_dmaregs_s *regs,
                  const char *msg);
 #else
diff --git a/arch/arm/src/sam34/sam_emac.c b/arch/arm/src/sam34/sam_emac.c
index c11332586ae6ba31061ec7ab028bf0a57d5330a9..c5db8c01a441abe4babecd138ea7e3a1dbc42205 100644
--- a/arch/arm/src/sam34/sam_emac.c
+++ b/arch/arm/src/sam34/sam_emac.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/sam34/sam_emac.c
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * This logic derives from the SAM34D3 Ethernet driver.
@@ -64,11 +64,7 @@
 #include 
 #include 
 #include 
-
-#ifdef CONFIG_NET_NOINTS
-#  include 
-#endif
-
+#include 
 #include 
 #include 
 #include 
@@ -97,12 +93,23 @@
  ****************************************************************************/
 /* Configuration ************************************************************/
 
-/* If processing is not done at the interrupt level, then high priority
- * work queue support is required.
+/* If processing is not done at the interrupt level, then work queue support
+ * is required.
  */
 
-#if defined(CONFIG_NET_NOINTS) && !defined(CONFIG_SCHED_HPWORK)
-#  error High priority work queue support is required
+#if !defined(CONFIG_SCHED_WORKQUEUE)
+#  error Work queue support is required
+#else
+
+  /* Select work queue */
+
+#  if defined(CONFIG_SAM34_EMAC_HPWORK)
+#    define ETHWORK HPWORK
+#  elif defined(CONFIG_SAM34_EMAC_LPWORK)
+#    define ETHWORK LPWORK
+#  else
+#    error Neither CONFIG_SAM34_EMAC_HPWORK nor CONFIG_SAM34_EMAC_LPWORK defined
+#  endif
 #endif
 
 /* Number of buffer for RX */
@@ -207,18 +214,7 @@
 
 #endif
 
-/* EMAC buffer sizes, number of buffers, and number of descriptors.
- *
- * REVISIT: The CONFIG_NET_MULTIBUFFER might be useful.  It might be possible
- * to use this option to send and receive messages directly into the DMA
- * buffers, saving a copy.  There might be complications on the receiving
- * side, however, where buffers may wrap and where the size of the received
- * frame will typically be smaller than a full packet.
- */
-
-#ifdef CONFIG_NET_MULTIBUFFER
-#  error CONFIG_NET_MULTIBUFFER must not be set
-#endif
+/* EMAC buffer sizes, number of buffers, and number of descriptors. *********/
 
 #define EMAC_RX_UNITSIZE 128                 /* Fixed size for RX buffer  */
 #define EMAC_TX_UNITSIZE CONFIG_NET_ETH_MTU  /* MAX size for Ethernet packet */
@@ -231,7 +227,7 @@
  * enabled.
  */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_NET_INFO
 #  undef CONFIG_SAM34_EMAC_REGDEBUG
 #endif
 
@@ -274,9 +270,8 @@ struct sam_emac_s
   uint8_t               ifup    : 1; /* true:ifup false:ifdown */
   WDOG_ID               txpoll;      /* TX poll timer */
   WDOG_ID               txtimeout;   /* TX timeout timer */
-#ifdef CONFIG_NET_NOINTS
-  struct work_s         work;        /* For deferring work to the work queue */
-#endif
+  struct work_s         irqwork;     /* For deferring interrupt work to the work queue */
+  struct work_s         pollwork;    /* For deferring poll work to the work queue */
 
   /* This holds the information visible to the NuttX network */
 
@@ -312,6 +307,17 @@ struct sam_emac_s
 
 static struct sam_emac_s g_emac;
 
+/* A single packet buffer is used
+ *
+ * REVISIT:  It might be possible to use this option to send and receive
+ * messages directly into the DMA buffers, saving a copy.  There might be
+ * complications on the receiving side, however, where buffers may wrap
+ * and where the size of the received frame will typically be smaller than
+ * a full packet.
+ */
+
+static uint8_t g_pktbuf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
+
 #ifdef CONFIG_SAM34_EMAC_PREALLOCATE
 /* Preallocated data */
 /* TX descriptors list */
@@ -346,7 +352,7 @@ static uint8_t g_rxbuffer[CONFIG_SAM34_EMAC_NRXBUFFERS * EMAC_RX_UNITSIZE]
  ****************************************************************************/
 /* Register operations ******************************************************/
 
-#if defined(CONFIG_SAM34_EMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAM34_EMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
 static bool sam_checkreg(struct sam_emac_s *priv, bool wr,
                          uint32_t regval, uintptr_t address);
 static uint32_t sam_getreg(struct sam_emac_s *priv, uintptr_t addr);
@@ -374,24 +380,16 @@ static void sam_dopoll(struct sam_emac_s *priv);
 static int  sam_recvframe(struct sam_emac_s *priv);
 static void sam_receive(struct sam_emac_s *priv);
 static void sam_txdone(struct sam_emac_s *priv);
-static inline void sam_interrupt_process(FAR struct sam_emac_s *priv);
-#ifdef CONFIG_NET_NOINTS
+
 static void sam_interrupt_work(FAR void *arg);
-#endif
-static int  sam_emac_interrupt(int irq, void *context);
+static int  sam_emac_interrupt(int irq, void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
-static inline void sam_txtimeout_process(FAR struct sam_emac_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void sam_txtimeout_work(FAR void *arg);
-#endif
 static void sam_txtimeout_expiry(int argc, uint32_t arg, ...);
 
-static inline void sam_poll_process(FAR struct sam_emac_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void sam_poll_work(FAR void *arg);
-#endif
 static void sam_poll_expiry(int argc, uint32_t arg, ...);
 
 /* NuttX callback functions */
@@ -399,10 +397,7 @@ static void sam_poll_expiry(int argc, uint32_t arg, ...);
 static int  sam_ifup(struct net_driver_s *dev);
 static int  sam_ifdown(struct net_driver_s *dev);
 
-static inline void sam_txavail_process(FAR struct sam_emac_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void sam_txavail_work(FAR void *arg);
-#endif
 static int  sam_txavail(struct net_driver_s *dev);
 
 #if defined(CONFIG_NET_IGMP) || defined(CONFIG_NET_ICMPv6)
@@ -419,7 +414,7 @@ static int  sam_ioctl(struct net_driver_s *dev, int cmd, long arg);
 
 /* PHY Initialization */
 
-#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_INFO)
 static void sam_phydump(struct sam_emac_s *priv);
 #else
 #  define sam_phydump(priv)
@@ -453,6 +448,7 @@ static int  sam_emac_configure(struct sam_emac_s *priv);
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
+
 /****************************************************************************
  * Name: sam_checkreg
  *
@@ -490,7 +486,7 @@ static bool sam_checkreg(struct sam_emac_s *priv, bool wr, uint32_t regval,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", priv->ntimes);
+          ninfo("...[Repeats %d times]...\n", priv->ntimes);
         }
 
       /* Save information about the new access */
@@ -522,7 +518,7 @@ static uint32_t sam_getreg(struct sam_emac_s *priv, uintptr_t address)
 
   if (sam_checkreg(priv, false, regval, address))
     {
-      lldbg("%08x->%08x\n", address, regval);
+      ninfo("%08x->%08x\n", address, regval);
     }
 
   return regval;
@@ -543,7 +539,7 @@ static void sam_putreg(struct sam_emac_s *priv, uintptr_t address,
 {
   if (sam_checkreg(priv, true, regval, address))
     {
-      lldbg("%08x<-%08x\n", address, regval);
+      ninfo("%08x<-%08x\n", address, regval);
     }
 
   putreg32(regval, address);
@@ -636,7 +632,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
   priv->txdesc = (struct emac_txdesc_s *)kmm_memalign(8, allocsize);
   if (!priv->txdesc)
     {
-      nlldbg("ERROR: Failed to allocate TX descriptors\n");
+      nerr("ERROR: Failed to allocate TX descriptors\n");
       return -ENOMEM;
     }
 
@@ -646,7 +642,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
   priv->rxdesc = (struct emac_rxdesc_s *)kmm_memalign(8, allocsize);
   if (!priv->rxdesc)
     {
-      nlldbg("ERROR: Failed to allocate RX descriptors\n");
+      nerr("ERROR: Failed to allocate RX descriptors\n");
       sam_buffer_free(priv);
       return -ENOMEM;
     }
@@ -657,7 +653,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
   priv->txbuffer = (uint8_t *)kmm_memalign(8, allocsize);
   if (!priv->txbuffer)
     {
-      nlldbg("ERROR: Failed to allocate TX buffer\n");
+      nerr("ERROR: Failed to allocate TX buffer\n");
       sam_buffer_free(priv);
       return -ENOMEM;
     }
@@ -666,7 +662,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
   priv->rxbuffer = (uint8_t *)kmm_memalign(8, allocsize);
   if (!priv->rxbuffer)
     {
-      nlldbg("ERROR: Failed to allocate RX buffer\n");
+      nerr("ERROR: Failed to allocate RX buffer\n");
       sam_buffer_free(priv);
       return -ENOMEM;
     }
@@ -753,14 +749,14 @@ static int sam_transmit(struct sam_emac_s *priv)
   uint32_t regval;
   uint32_t status;
 
-  nllvdbg("d_len: %d txhead: %d\n",  dev->d_len, priv->txhead);
+  ninfo("d_len: %d txhead: %d\n",  dev->d_len, priv->txhead);
   sam_dumppacket("Transmit packet", dev->d_buf, dev->d_len);
 
   /* Check parameter */
 
   if (dev->d_len > EMAC_TX_UNITSIZE)
     {
-      nlldbg("ERROR: Packet too big: %d\n", dev->d_len);
+      nerr("ERROR: Packet too big: %d\n", dev->d_len);
       return -EINVAL;
     }
 
@@ -772,7 +768,7 @@ static int sam_transmit(struct sam_emac_s *priv)
 
   if (sam_txfree(priv) < 1)
     {
-      nlldbg("ERROR: No free TX descriptors\n");
+      nerr("ERROR: No free TX descriptors\n");
       return -EBUSY;
     }
 
@@ -830,7 +826,7 @@ static int sam_transmit(struct sam_emac_s *priv)
 
   if (sam_txfree(priv) < 1)
     {
-      nllvdbg("Disabling RX interrupts\n");
+      ninfo("Disabling RX interrupts\n");
       sam_putreg(priv, SAM_EMAC_IDR, EMAC_INT_RCOMP);
     }
 
@@ -1010,7 +1006,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
   sam_cmcc_invalidate((uintptr_t)rxdesc,
                       (uintptr_t)rxdesc + sizeof(struct emac_rxdesc_s));
 
-  nllvdbg("rxndx: %d\n", rxndx);
+  ninfo("rxndx: %d\n", rxndx);
 
   while ((rxdesc->addr & EMACRXD_ADDR_OWNER) != 0)
     {
@@ -1060,7 +1056,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
         {
           if (rxndx == priv->rxndx)
             {
-              nllvdbg("ERROR: No EOF (Invalid of buffers too small)\n");
+              nerr("ERROR: No EOF (Invalid of buffers too small)\n");
               do
                 {
                   /* Give ownership back to the EMAC */
@@ -1107,7 +1103,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
               /* Frame size from the EMAC */
 
               dev->d_len = (rxdesc->status & EMACRXD_STA_FRLEN_MASK);
-              nllvdbg("packet %d-%d (%d)\n", priv->rxndx, rxndx, dev->d_len);
+              ninfo("packet %d-%d (%d)\n", priv->rxndx, rxndx, dev->d_len);
 
               /* All data have been copied in the application frame buffer,
                * release the RX descriptor
@@ -1132,11 +1128,11 @@ static int sam_recvframe(struct sam_emac_s *priv)
                * all of the data.
                */
 
-              nllvdbg("rxndx: %d d_len: %d\n", priv->rxndx, dev->d_len);
+              ninfo("rxndx: %d d_len: %d\n", priv->rxndx, dev->d_len);
 
               if (pktlen < dev->d_len)
                 {
-                  nlldbg("ERROR: Buffer size %d; frame size %d\n", dev->d_len, pktlen);
+                  nerr("ERROR: Buffer size %d; frame size %d\n", dev->d_len, pktlen);
                   return -E2BIG;
                 }
 
@@ -1167,7 +1163,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
   /* No packet was found */
 
   priv->rxndx = rxndx;
-  nllvdbg("rxndx: %d\n", priv->rxndx);
+  ninfo("rxndx: %d\n", priv->rxndx);
   return -EAGAIN;
 }
 
@@ -1207,7 +1203,7 @@ static void sam_receive(struct sam_emac_s *priv)
 
       if (dev->d_len > CONFIG_NET_ETH_MTU)
         {
-          nlldbg("DROPPED: Too big: %d\n", dev->d_len);
+          nwarn("WARNING: Dropped, Too big: %d\n", dev->d_len);
           continue;
         }
 
@@ -1222,7 +1218,7 @@ static void sam_receive(struct sam_emac_s *priv)
 #ifdef CONFIG_NET_IPv4
       if (BUF->type == HTONS(ETHTYPE_IP))
         {
-          nllvdbg("IPv4 frame\n");
+          ninfo("IPv4 frame\n");
 
           /* Handle ARP on input then give the IPv4 packet to the network
            * layer
@@ -1262,7 +1258,7 @@ static void sam_receive(struct sam_emac_s *priv)
 #ifdef CONFIG_NET_IPv6
       if (BUF->type == HTONS(ETHTYPE_IP6))
         {
-          nllvdbg("Iv6 frame\n");
+          ninfo("Iv6 frame\n");
 
           /* Give the IPv6 packet to the network layer */
 
@@ -1299,7 +1295,7 @@ static void sam_receive(struct sam_emac_s *priv)
 #ifdef CONFIG_NET_ARP
       if (BUF->type == htons(ETHTYPE_ARP))
         {
-          nllvdbg("ARP frame\n");
+          ninfo("ARP frame\n");
 
           /* Handle ARP packet */
 
@@ -1317,7 +1313,7 @@ static void sam_receive(struct sam_emac_s *priv)
       else
 #endif
         {
-          nlldbg("DROPPED: Unknown type: %04x\n", BUF->type);
+          nwarn("WARNING: Dropped, Unknown type: %04x\n", BUF->type);
         }
     }
 }
@@ -1409,25 +1405,25 @@ static void sam_txdone(struct sam_emac_s *priv)
 }
 
 /****************************************************************************
- * Function: sam_interrupt_process
+ * Function: sam_interrupt_work
  *
  * Description:
- *   Interrupt processing.  This may be performed either within the interrupt
- *   handler or on the worker thread, depending upon the configuration
+ *   Perform interrupt related work from the worker thread
  *
  * Parameters:
- *   priv - Reference to the driver state structure
+ *   arg - The argument passed when work_queue() was called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
  *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
+static void sam_interrupt_work(FAR void *arg)
 {
+  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
   uint32_t isr;
   uint32_t rsr;
   uint32_t tsr;
@@ -1436,13 +1432,16 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
   uint32_t pending;
   uint32_t clrbits;
 
+  /* Process pending Ethernet interrupts */
+
+  net_lock();
   isr = sam_getreg(priv, SAM_EMAC_ISR);
   rsr = sam_getreg(priv, SAM_EMAC_RSR);
   tsr = sam_getreg(priv, SAM_EMAC_TSR);
   imr = sam_getreg(priv, SAM_EMAC_IMR);
 
   pending = isr & ~(imr | EMAC_INT_UNUSED);
-  nllvdbg("isr: %08x pending: %08x\n", isr, pending);
+  ninfo("isr: %08x pending: %08x\n", isr, pending);
 
   /* Check for the completion of a transmission.  This should be done before
    * checking for received data (because receiving can cause another transmission
@@ -1468,7 +1467,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
           clrbits = EMAC_TSR_RLE | sam_txinuse(priv);
           sam_txreset(priv);
 
-          nlldbg("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
+          nerr("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
 
           regval = sam_getreg(priv, SAM_EMAC_NCR);
           regval |= EMAC_NCR_TXEN;
@@ -1479,7 +1478,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
 
       if ((tsr & EMAC_TSR_COL) != 0)
         {
-          nlldbg("ERROR: Collision occurred TSR: %08x\n", tsr);
+          nerr("ERROR: Collision occurred TSR: %08x\n", tsr);
           clrbits |= EMAC_TSR_COL;
         }
 
@@ -1487,7 +1486,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
 
       if ((tsr & EMAC_TSR_TFC) != 0)
         {
-          nlldbg("ERROR: Transmit Frame Corruption due to AHB error: %08x\n", tsr);
+          nerr("ERROR: Transmit Frame Corruption due to AHB error: %08x\n", tsr);
           clrbits |= EMAC_TSR_TFC;
         }
 
@@ -1502,7 +1501,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
 
       if ((tsr & EMAC_TSR_UND) != 0)
         {
-          nlldbg("ERROR: Transmit Underrun TSR: %08x\n", tsr);
+          nerr("ERROR: Transmit Underrun TSR: %08x\n", tsr);
           clrbits |= EMAC_TSR_UND;
         }
 
@@ -1539,7 +1538,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
 
       if ((rsr & EMAC_RSR_RXOVR) != 0)
         {
-          nlldbg("ERROR: Receiver overrun RSR: %08x\n", rsr);
+          nerr("ERROR: Receiver overrun RSR: %08x\n", rsr);
           clrbits |= EMAC_RSR_RXOVR;
         }
 
@@ -1556,7 +1555,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
 
       if ((rsr & EMAC_RSR_BNA) != 0)
         {
-          nlldbg("ERROR: Buffer not available RSR: %08x\n", rsr);
+          nerr("ERROR: Buffer not available RSR: %08x\n", rsr);
           clrbits |= EMAC_RSR_BNA;
         }
 
@@ -1578,7 +1577,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
 
   if ((pending & EMAC_INT_PFNZ) != 0)
     {
-      nlldbg("Pause frame received\n");
+      nwarn("WARNING: Pause frame received\n");
     }
 
   /* Check for Pause Time Zero (PTZ)
@@ -1588,45 +1587,16 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
 
   if ((pending & EMAC_INT_PTZ) != 0)
     {
-      nlldbg("Pause TO!\n");
+      nwarn("WARNING: Pause TO!\n");
     }
 #endif
-}
 
-/****************************************************************************
- * Function: sam_interrupt_work
- *
- * Description:
- *   Perform interrupt related work from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() was called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void sam_interrupt_work(FAR void *arg)
-{
-  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
-  net_lock_t state;
-
-  /* Process pending Ethernet interrupts */
-
-  state = net_lock();
-  sam_interrupt_process(priv);
-  net_unlock(state);
+  net_unlock();
 
   /* Re-enable Ethernet interrupts */
 
   up_enable_irq(SAM_IRQ_EMAC);
 }
-#endif
 
 /****************************************************************************
  * Function: sam_emac_interrupt
@@ -1645,11 +1615,10 @@ static void sam_interrupt_work(FAR void *arg)
  *
  ****************************************************************************/
 
-static int sam_emac_interrupt(int irq, void *context)
+static int sam_emac_interrupt(int irq, void *context, FAR void *arg)
 {
   struct sam_emac_s *priv = &g_emac;
 
-#ifdef CONFIG_NET_NOINTS
   uint32_t tsr;
 
   /* Disable further Ethernet interrupts.  Because Ethernet interrupts are
@@ -1675,101 +1644,52 @@ static int sam_emac_interrupt(int irq, void *context)
        * expiration and the deferred interrupt processing.
        */
 
-       wd_cancel(priv->txtimeout);
-
-      /* Make sure that the TX poll timer is running (if it is already
-       * running, the following would restart it).  This is necessary to
-       * avoid certain race conditions where the polling sequence can be
-       * interrupted.
-       */
-
-      (void)wd_start(priv->txpoll, SAM_WDDELAY, sam_poll_expiry, 1, priv);
+      wd_cancel(priv->txtimeout);
     }
 
-  /* Cancel any pending poll work */
-
-  work_cancel(HPWORK, &priv->work);
-
   /* Schedule to perform the interrupt processing on the worker thread. */
 
-  work_queue(HPWORK, &priv->work, sam_interrupt_work, priv, 0);
-
-#else
-  /* Process the interrupt now */
-
-  sam_interrupt_process(priv);
-#endif
-
+  work_queue(ETHWORK, &priv->irqwork, sam_interrupt_work, priv, 0);
   return OK;
 }
 
 /****************************************************************************
- * Function: sam_txtimeout_process
+ * Function: sam_txtimeout_work
  *
  * Description:
- *   Process a TX timeout.  Called from the either the watchdog timer
- *   expiration logic or from the worker thread, depending upon the
- *   configuration.  The timeout means that the last TX never completed.
- *   Reset the hardware and start again.
+ *   Perform TX timeout related work from the worker thread
  *
  * Parameters:
- *   priv - Reference to the driver state structure
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
- *   Global interrupts are disabled by the watchdog logic.
+ *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static inline void sam_txtimeout_process(FAR struct sam_emac_s *priv)
+static void sam_txtimeout_work(FAR void *arg)
 {
-  nlldbg("Timeout!\n");
+  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
+
+  nerr("ERROR: Timeout!\n");
 
   /* Then reset the hardware.  Just take the interface down, then back
    * up again.
    */
 
+  net_lock();
   sam_ifdown(&priv->dev);
   sam_ifup(&priv->dev);
 
   /* Then poll the network for new XMIT data */
 
   sam_dopoll(priv);
+  net_unlock();
 }
 
-/****************************************************************************
- * Function: sam_txtimeout_work
- *
- * Description:
- *   Perform TX timeout related work from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() as called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void sam_txtimeout_work(FAR void *arg)
-{
-  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
-  net_lock_t state;
-
-  /* Process pending Ethernet interrupts */
-
-  state = net_lock();
-  sam_txtimeout_process(priv);
-  net_unlock(state);
-}
-#endif
-
 /****************************************************************************
  * Function: sam_txtimeout_expiry
  *
@@ -1793,7 +1713,6 @@ static void sam_txtimeout_expiry(int argc, uint32_t arg, ...)
 {
   FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
 
-#ifdef CONFIG_NET_NOINTS
   /* Disable further Ethernet interrupts.  This will prevent some race
    * conditions with interrupt work.  There is still a potential race
    * condition with interrupt work that is already queued and in progress.
@@ -1801,47 +1720,38 @@ static void sam_txtimeout_expiry(int argc, uint32_t arg, ...)
 
   up_disable_irq(SAM_IRQ_EMAC);
 
-  /* Cancel any pending poll or interrupt work.  This will have no effect
-   * on work that has already been started.
-   */
-
-  work_cancel(HPWORK, &priv->work);
-
   /* Schedule to perform the TX timeout processing on the worker thread. */
 
-  work_queue(HPWORK, &priv->work, sam_txtimeout_work, priv, 0);
-#else
-  /* Process the timeout now */
-
-  sam_txtimeout_process(priv);
-#endif
+  work_queue(ETHWORK, &priv->irqwork, sam_txtimeout_work, priv, 0);
 }
 
 /****************************************************************************
- * Function: sam_poll_process
+ * Function: sam_poll_work
  *
  * Description:
- *   Perform the periodic poll.  This may be called either from watchdog
- *   timer logic or from the worker thread, depending upon the configuration.
+ *   Perform periodic polling from the worker thread
  *
  * Parameters:
- *   priv - Reference to the driver state structure
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
+ *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static inline void sam_poll_process(FAR struct sam_emac_s *priv)
+static void sam_poll_work(FAR void *arg)
 {
+  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
   struct net_driver_s *dev  = &priv->dev;
 
   /* Check if the there are any free TX descriptors.  We cannot perform the
    * TX poll if we do not have buffering for another packet.
    */
 
+  net_lock();
   if (sam_txfree(priv) > 0)
     {
       /* Update TCP timing states and poll the network for new XMIT data. */
@@ -1852,39 +1762,9 @@ static inline void sam_poll_process(FAR struct sam_emac_s *priv)
   /* Setup the watchdog poll timer again */
 
   (void)wd_start(priv->txpoll, SAM_WDDELAY, sam_poll_expiry, 1, priv);
+  net_unlock();
 }
 
-/****************************************************************************
- * Function: sam_poll_work
- *
- * Description:
- *   Perform periodic polling from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() as called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void sam_poll_work(FAR void *arg)
-{
-  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
-  net_lock_t state;
-
-  /* Perform the poll */
-
-  state = net_lock();
-  sam_poll_process(priv);
-  net_unlock(state);
-}
-#endif
-
 /****************************************************************************
  * Function: sam_poll_expiry
  *
@@ -1907,31 +1787,9 @@ static void sam_poll_expiry(int argc, uint32_t arg, ...)
 {
   FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
 
-#ifdef CONFIG_NET_NOINTS
-  /* Is our single work structure available?  It may not be if there are
-   * pending interrupt actions.
-   */
-
-  if (work_available(&priv->work))
-    {
-      /* Schedule to perform the interrupt processing on the worker thread. */
-
-      work_queue(HPWORK, &priv->work, sam_poll_work, priv, 0);
-    }
-  else
-    {
-      /* No.. Just re-start the watchdog poll timer, missing one polling
-       * cycle.
-       */
-
-      (void)wd_start(priv->txpoll, SAM_WDDELAY, sam_poll_expiry, 1, arg);
-    }
-
-#else
-  /* Process the interrupt now */
+  /* Schedule to perform the interrupt processing on the worker thread. */
 
-  sam_poll_process(priv);
-#endif
+  work_queue(ETHWORK, &priv->pollwork, sam_poll_work, priv, 0);
 }
 
 /****************************************************************************
@@ -1956,13 +1814,13 @@ static int sam_ifup(struct net_driver_s *dev)
   struct sam_emac_s *priv = (struct sam_emac_s *)dev->d_private;
   int ret;
 
-  nlldbg("Bringing up: %d.%d.%d.%d\n",
-         dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-         (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 
   /* Configure the EMAC interface for normal operation. */
 
-  nllvdbg("Initialize the EMAC\n");
+  ninfo("Initialize the EMAC\n");
   sam_emac_configure(priv);
 
   /* Set the MAC address (should have been configured while we were down) */
@@ -1980,7 +1838,7 @@ static int sam_ifup(struct net_driver_s *dev)
   ret = sam_phyinit(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phyinit failed: %d\n", ret);
+      nerr("ERROR: sam_phyinit failed: %d\n", ret);
       return ret;
     }
 
@@ -1989,16 +1847,16 @@ static int sam_ifup(struct net_driver_s *dev)
   ret = sam_autonegotiate(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_autonegotiate failed: %d\n", ret);
+      nerr("ERROR: sam_autonegotiate failed: %d\n", ret);
       return ret;
     }
 
   while (sam_linkup(priv) == 0);
-  nllvdbg("Link detected \n");
+  ninfo("Link detected \n");
 
   /* Enable normal MAC operation */
 
-  nllvdbg("Enable normal operation\n");
+  ninfo("Enable normal operation\n");
 
   /* Set and activate a timer process */
 
@@ -2032,7 +1890,7 @@ static int sam_ifdown(struct net_driver_s *dev)
   struct sam_emac_s *priv = (struct sam_emac_s *)dev->d_private;
   irqstate_t flags;
 
-  nlldbg("Taking the network down\n");
+  ninfo("Taking the network down\n");
 
   /* Disable the EMAC interrupt */
 
@@ -2059,66 +1917,40 @@ static int sam_ifdown(struct net_driver_s *dev)
 }
 
 /****************************************************************************
- * Function: sam_txavail_process
+ * Function: sam_txavail_work
  *
  * Description:
- *   Perform an out-of-cycle poll.
+ *   Perform an out-of-cycle poll on the worker thread.
  *
  * Parameters:
- *   dev - Reference to the NuttX driver state structure
+ *   arg - Reference to the NuttX driver state structure (cast to void*)
  *
  * Returned Value:
  *   None
  *
  * Assumptions:
- *   Called in normal user mode
+ *   Called on the higher priority worker thread.
  *
  ****************************************************************************/
 
-static inline void sam_txavail_process(FAR struct sam_emac_s *priv)
+static void sam_txavail_work(FAR void *arg)
 {
-  nllvdbg("ifup: %d\n", priv->ifup);
+  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
+
+  ninfo("ifup: %d\n", priv->ifup);
 
   /* Ignore the notification if the interface is not yet up */
 
+  net_lock();
   if (priv->ifup)
     {
       /* Poll the network for new XMIT data */
 
       sam_dopoll(priv);
     }
-}
 
-/****************************************************************************
- * Function: sam_txavail_work
- *
- * Description:
- *   Perform an out-of-cycle poll on the worker thread.
- *
- * Parameters:
- *   arg - Reference to the NuttX driver state structure (cast to void*)
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Called on the higher priority worker thread.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void sam_txavail_work(FAR void *arg)
-{
-  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
-  net_lock_t state;
-
-  /* Perform the poll */
-
-  state = net_lock();
-  sam_txavail_process(priv);
-  net_unlock(state);
+  net_unlock();
 }
-#endif
 
 /****************************************************************************
  * Function: sam_txavail
@@ -2143,34 +1975,18 @@ static int sam_txavail(struct net_driver_s *dev)
 {
   FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)dev->d_private;
 
-#ifdef CONFIG_NET_NOINTS
   /* Is our single work structure available?  It may not be if there are
    * pending interrupt actions and we will have to ignore the Tx
    * availability action.
    */
 
-  if (work_available(&priv->work))
+  if (work_available(&priv->pollwork))
     {
       /* Schedule to serialize the poll on the worker thread. */
 
-      work_queue(HPWORK, &priv->work, sam_txavail_work, priv, 0);
+      work_queue(ETHWORK, &priv->pollwork, sam_txavail_work, priv, 0);
     }
 
-#else
-  irqstate_t flags;
-
-  /* Disable interrupts because this function may be called from interrupt
-   * level processing.
-   */
-
-  flags = enter_critical_section();
-
-  /* Perform the out-of-cycle poll now */
-
-  sam_txavail_process(priv);
-  leave_critical_section(flags);
-#endif
-
   return OK;
 }
 
@@ -2331,8 +2147,8 @@ static int sam_addmac(struct net_driver_s *dev, const uint8_t *mac)
   unsigned int bit;
 
   UNUSED(priv);
-  nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Calculate the 6-bit has table index */
 
@@ -2405,8 +2221,8 @@ static int sam_rmmac(struct net_driver_s *dev, const uint8_t *mac)
   unsigned int bit;
 
   UNUSED(priv);
-  nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Calculate the 6-bit has table index */
 
@@ -2588,7 +2404,7 @@ static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_INFO)
 static void sam_phydump(struct sam_emac_s *priv)
 {
   uint32_t regval;
@@ -2601,21 +2417,21 @@ static void sam_phydump(struct sam_emac_s *priv)
   sam_putreg(priv, SAM_EMAC_NCR, regval);
 
 #ifdef CONFIG_SAM34_EMAC_RMII
-  nllvdbg("RMII Registers (Address %02x)\n", priv->phyaddr);
+  ninfo("RMII Registers (Address %02x)\n", priv->phyaddr);
 #else /* defined(CONFIG_SAM34_EMAC_MII) */
-  nllvdbg("MII Registers (Address %02x)\n", priv->phyaddr);
+  ninfo("MII Registers (Address %02x)\n", priv->phyaddr);
 #endif
 
   sam_phyread(priv, priv->phyaddr, MII_MCR, &phyval);
-  nllvdbg("  MCR:       %04x\n", phyval);
+  ninfo("  MCR:       %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, MII_MSR, &phyval);
-  nllvdbg("  MSR:       %04x\n", phyval);
+  ninfo("  MSR:       %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, MII_ADVERTISE, &phyval);
-  nllvdbg("  ADVERTISE: %04x\n", phyval);
+  ninfo("  ADVERTISE: %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, MII_LPA, &phyval);
-  nllvdbg("  LPR:       %04x\n", phyval);
+  ninfo("  LPR:       %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, CONFIG_SAM34_EMAC_PHYSR, &phyval);
-  nllvdbg("  PHYSR:     %04x\n", phyval);
+  ninfo("  PHYSR:     %04x\n", phyval);
 
   /* Disable management port */
 
@@ -2738,7 +2554,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
   int timeout;
   int ret;
 
-  nllvdbg(" sam_phyreset\n");
+  ninfo(" sam_phyreset\n");
 
   /* Enable management port */
 
@@ -2751,7 +2567,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, MII_MCR_RESET);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywrite failed: %d\n", ret);
+      nerr("ERROR: sam_phywrite failed: %d\n", ret);
     }
 
   /* Wait for the PHY reset to complete */
@@ -2763,7 +2579,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
       int result = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
       if (result < 0)
         {
-          nlldbg("ERROR: Failed to read the MCR register: %d\n", ret);
+          nerr("ERROR: Failed to read the MCR register: %d\n", ret);
           ret = result;
         }
       else if ((mcr & MII_MCR_RESET) == 0)
@@ -2805,7 +2621,7 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
   unsigned int offset;
   int ret = -ESRCH;
 
-  nllvdbg("Find a valid PHY address\n");
+  ninfo("Find a valid PHY address\n");
 
   /* Enable management port */
 
@@ -2828,8 +2644,8 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
 
   else
     {
-      nlldbg("ERROR: sam_phyread failed for PHY address %02x: %d\n",
-             candidate, ret);
+      nerr("ERROR: sam_phyread failed for PHY address %02x: %d\n",
+           candidate, ret);
 
       for (offset = 0; offset < 32; offset++)
         {
@@ -2850,10 +2666,10 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
 
   if (ret == OK)
     {
-      nllvdbg("  PHYID1: %04x PHY addr: %d\n", phyval, candidate);
+      ninfo("  PHYID1: %04x PHY addr: %d\n", phyval, candidate);
       *phyaddr = candidate;
       sam_phyread(priv, candidate, CONFIG_SAM34_EMAC_PHYSR, &phyval);
-      nllvdbg("  PHYSR:  %04x PHY addr: %d\n", phyval, candidate);
+      ninfo("  PHYSR:  %04x PHY addr: %d\n", phyval, candidate);
     }
 
   /* Disable management port */
@@ -2894,7 +2710,7 @@ static int sam_phyread(struct sam_emac_s *priv, uint8_t phyaddr,
   ret = sam_phywait(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+      nerr("ERROR: sam_phywait failed: %d\n", ret);
       return ret;
     }
 
@@ -2918,7 +2734,7 @@ static int sam_phyread(struct sam_emac_s *priv, uint8_t phyaddr,
   ret = sam_phywait(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+      nerr("ERROR: sam_phywait failed: %d\n", ret);
       return ret;
     }
 
@@ -2958,7 +2774,7 @@ static int sam_phywrite(struct sam_emac_s *priv, uint8_t phyaddr,
   ret = sam_phywait(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+      nerr("ERROR: sam_phywait failed: %d\n", ret);
       return ret;
     }
 
@@ -2982,7 +2798,7 @@ static int sam_phywrite(struct sam_emac_s *priv, uint8_t phyaddr,
   ret = sam_phywait(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+      nerr("ERROR: sam_phywait failed: %d\n", ret);
       return ret;
     }
 
@@ -3026,32 +2842,32 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, MII_PHYID1, &phyid1);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read PHYID1\n");
+      nerr("ERROR: Failed to read PHYID1\n");
       goto errout;
     }
 
-  nllvdbg("PHYID1: %04x PHY address: %02x\n", phyid1, priv->phyaddr);
+  ninfo("PHYID1: %04x PHY address: %02x\n", phyid1, priv->phyaddr);
 
   ret = sam_phyread(priv, priv->phyaddr, MII_PHYID2, &phyid2);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read PHYID2\n");
+      nerr("ERROR: Failed to read PHYID2\n");
       goto errout;
     }
 
-  nllvdbg("PHYID2: %04x PHY address: %02x\n", phyid2, priv->phyaddr);
+  ninfo("PHYID2: %04x PHY address: %02x\n", phyid2, priv->phyaddr);
 
   if (phyid1 == MII_OUI_MSB &&
      ((phyid2 & MII_PHYID2_OUI_MASK) >> MII_PHYID2_OUI_SHIFT) == MII_OUI_LSB)
     {
-      nllvdbg("  Vendor Model Number:   %04x\n",
-             (phyid2 & MII_PHYID2_MODEL_MASK) >> MII_PHYID2_MODEL_SHIFT);
-      nllvdbg("  Model Revision Number: %04x\n",
-             (phyid2 & MII_PHYID2_REV_MASK) >> MII_PHYID2_REV_SHIFT);
+      ninfo("  Vendor Model Number:   %04x\n",
+           (phyid2 & MII_PHYID2_MODEL_MASK) >> MII_PHYID2_MODEL_SHIFT);
+      ninfo("  Model Revision Number: %04x\n",
+           (phyid2 & MII_PHYID2_REV_MASK) >> MII_PHYID2_REV_SHIFT);
     }
   else
     {
-      nlldbg("ERROR: PHY not recognized\n");
+      nerr("ERROR: PHY not recognized\n");
     }
 
   /* Setup control register */
@@ -3059,7 +2875,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read MCR\n");
+      nerr("ERROR: Failed to read MCR\n");
       goto errout;
     }
 
@@ -3070,7 +2886,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to write MCR\n");
+      nerr("ERROR: Failed to write MCR\n");
       goto errout;
     }
 
@@ -3085,7 +2901,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, MII_ADVERTISE, advertise);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to write ANAR\n");
+      nerr("ERROR: Failed to write ANAR\n");
       goto errout;
     }
 
@@ -3094,7 +2910,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read MCR\n");
+      nerr("ERROR: Failed to read MCR\n");
       goto errout;
     }
 
@@ -3102,7 +2918,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to write MCR\n");
+      nerr("ERROR: Failed to write MCR\n");
       goto errout;
     }
 
@@ -3114,11 +2930,11 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to write MCR\n");
+      nerr("ERROR: Failed to write MCR\n");
       goto errout;
     }
 
-  nllvdbg("  MCR: %04x\n", mcr);
+  ninfo("  MCR: %04x\n", mcr);
 
   /* Check AutoNegotiate complete */
 
@@ -3128,7 +2944,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
       ret = sam_phyread(priv, priv->phyaddr, MII_MSR, &msr);
       if (ret < 0)
         {
-          nlldbg("ERROR: Failed to read MSR\n");
+          nerr("ERROR: Failed to read MSR\n");
           goto errout;
         }
 
@@ -3138,7 +2954,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
         {
           /* Yes.. break out of the loop */
 
-          nllvdbg("AutoNegotiate complete\n");
+          ninfo("AutoNegotiate complete\n");
           break;
         }
 
@@ -3146,7 +2962,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
 
       if (++timeout >= PHY_RETRY_MAX)
         {
-          nlldbg("ERROR: TimeOut\n");
+          nerr("ERROR: TimeOut\n");
           sam_phydump(priv);
           ret = -ETIMEDOUT;
           goto errout;
@@ -3158,7 +2974,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, MII_LPA, &lpa);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read ANLPAR\n");
+      nerr("ERROR: Failed to read ANLPAR\n");
       goto errout;
     }
 
@@ -3244,13 +3060,13 @@ static bool sam_linkup(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, MII_MSR, &msr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read MSR: %d\n", ret);
+      nerr("ERROR: Failed to read MSR: %d\n", ret);
       goto errout;
     }
 
   if ((msr & MII_MSR_LINKSTATUS) == 0)
     {
-      nlldbg("ERROR: MSR LinkStatus: %04x\n", msr);
+      nerr("ERROR: MSR LinkStatus: %04x\n", msr);
       goto errout;
     }
 
@@ -3259,7 +3075,7 @@ static bool sam_linkup(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, CONFIG_SAM34_EMAC_PHYSR, &physr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read PHYSR: %d\n", ret);
+      nerr("ERROR: Failed to read PHYSR: %d\n", ret);
       goto errout;
     }
 
@@ -3297,7 +3113,7 @@ static bool sam_linkup(struct sam_emac_s *priv)
 
   /* Start the EMAC transfers */
 
-  nllvdbg("Link is up\n");
+  ninfo("Link is up\n");
   linkup = true;
 
 errout:
@@ -3354,7 +3170,7 @@ static int sam_phyinit(struct sam_emac_s *priv)
   ret = sam_phyfind(priv, &priv->phyaddr);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phyfind failed: %d\n", ret);
+      nerr("ERROR: sam_phyfind failed: %d\n", ret);
       return ret;
     }
 
@@ -3598,11 +3414,11 @@ static void sam_macaddress(struct sam_emac_s *priv)
   struct net_driver_s *dev = &priv->dev;
   uint32_t regval;
 
-  nllvdbg("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          dev->d_ifname,
-          dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
-          dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
-          dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
+  ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        dev->d_ifname,
+        dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
+        dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
+        dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
 
   /* Set the MAC address */
 
@@ -3664,7 +3480,7 @@ static void sam_ipv6multicast(struct sam_emac_s *priv)
   mac[4] = tmp16 & 0xff;
   mac[5] = tmp16 >> 8;
 
-  nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+  ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
         mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   (void)sam_addmac(dev, mac);
@@ -3710,7 +3526,7 @@ static int sam_emac_configure(struct sam_emac_s *priv)
 {
   uint32_t regval;
 
-  nllvdbg("Entry\n");
+  ninfo("Entry\n");
 
   /* Enable clocking to the EMAC peripheral */
 
@@ -3806,6 +3622,7 @@ void up_netinitialize(void)
   /* Initialize the driver structure */
 
   memset(priv, 0, sizeof(struct sam_emac_s));
+  priv->dev.d_buf     = g_pktbuf;        /* Single packet buffer */
   priv->dev.d_ifup    = sam_ifup;        /* I/F up (new IP address) callback */
   priv->dev.d_ifdown  = sam_ifdown;      /* I/F down callback */
   priv->dev.d_txavail = sam_txavail;     /* New TX data callback */
@@ -3823,14 +3640,14 @@ void up_netinitialize(void)
   priv->txpoll = wd_create();
   if (!priv->txpoll)
     {
-      nlldbg("ERROR: Failed to create periodic poll timer\n");
+      nerr("ERROR: Failed to create periodic poll timer\n");
       return;
     }
 
   priv->txtimeout = wd_create();         /* Create TX timeout timer */
   if (!priv->txtimeout)
     {
-      nlldbg("ERROR: Failed to create periodic poll timer\n");
+      nerr("ERROR: Failed to create periodic poll timer\n");
       goto errout_with_txpoll;
     }
 
@@ -3843,7 +3660,7 @@ void up_netinitialize(void)
   ret = sam_buffer_initialize(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_buffer_initialize failed: %d\n", ret);
+      nerr("ERROR: sam_buffer_initialize failed: %d\n", ret);
       goto errout_with_txtimeout;
     }
 
@@ -3851,10 +3668,10 @@ void up_netinitialize(void)
    * the interface is in the 'up' state.
    */
 
-  ret = irq_attach(SAM_IRQ_EMAC, sam_emac_interrupt);
+  ret = irq_attach(SAM_IRQ_EMAC, sam_emac_interrupt, NULL);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to attach the handler to the IRQ%d\n", SAM_IRQ_EMAC);
+      nerr("ERROR: Failed to attach the handler to the IRQ%d\n", SAM_IRQ_EMAC);
       goto errout_with_buffers;
     }
 
@@ -3867,7 +3684,7 @@ void up_netinitialize(void)
   ret = sam_ifdown(&priv->dev);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to put the interface in the down state: %d\n", ret);
+      nerr("ERROR: Failed to put the interface in the down state: %d\n", ret);
       goto errout_with_buffers;
     }
 
@@ -3879,7 +3696,7 @@ void up_netinitialize(void)
       return;
     }
 
-  nlldbg("ERROR: netdev_register() failed: %d\n", ret);
+  nerr("ERROR: netdev_register() failed: %d\n", ret);
 
 errout_with_buffers:
   sam_buffer_free(priv);
diff --git a/arch/arm/src/sam34/sam_gpio.c b/arch/arm/src/sam34/sam_gpio.c
index b0f45e89e7ba95b4baa96feceb1b4dd55e19e124..d1dc1ef64bdb6d9ef2dbd19e1407f1d7711a1f26 100644
--- a/arch/arm/src/sam34/sam_gpio.c
+++ b/arch/arm/src/sam34/sam_gpio.c
@@ -54,6 +54,7 @@
 
 #include "chip.h"
 #include "sam_gpio.h"
+#include "sam_periphclks.h"
 
 #if defined(CONFIG_ARCH_CHIP_SAM3U) || defined(CONFIG_ARCH_CHIP_SAM3X) || \
     defined(CONFIG_ARCH_CHIP_SAM3A)
@@ -70,7 +71,7 @@
  * Private Data
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 static const char g_portchar[4]   = { 'A', 'B', 'C', 'D' };
 #endif
 
@@ -96,7 +97,7 @@ static inline uintptr_t sam_gpiobase(gpio_pinset_t cfgset)
  * Name: sam_gpiopin
  *
  * Description:
- *   Returun the base address of the GPIO register set
+ *   Return the base address of the GPIO register set
  *
  ****************************************************************************/
 
@@ -105,6 +106,67 @@ static inline int sam_gpiopin(gpio_pinset_t cfgset)
   return 1 << ((cfgset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT);
 }
 
+/****************************************************************************
+ * Name: sam_gpio_enableclk
+ *
+ * Description:
+ *   Enable clocking on the PIO port.  Port clocking is required in the
+ *   following cases:
+ *
+ *     - In order to read values in input pins from the port
+ *     - If the port supports interrupting pins
+ *     - If glitch filtering is enabled
+ *     - If necessary to read the input value on an open drain output (this
+ *       may be done in TWI logic to detect hangs on the I2C bus).
+ *     - If necessary to read the input value on peripheral pins.
+ *
+ ****************************************************************************/
+
+static inline int sam_gpio_enableclk(gpio_pinset_t cfgset)
+{
+  /* Enable the peripheral clock for the GPIO's port controller. */
+
+  switch (cfgset & GPIO_PORT_MASK)
+    {
+      case GPIO_PORT_PIOA:
+        sam_pioa_enableclk();
+        break;
+
+      case GPIO_PORT_PIOB:
+        sam_piob_enableclk();
+        break;
+
+#ifdef GPIO_PORT_PIOC
+      case GPIO_PORT_PIOC:
+        sam_pioc_enableclk();
+        break;
+#endif
+
+#ifdef GPIO_PORT_PIOD
+      case GPIO_PORT_PIOD:
+        sam_piod_enableclk();
+        break;
+#endif
+
+#ifdef GPIO_PORT_PIOE
+      case GPIO_PORT_PIOE:
+        sam_pioe_enableclk();
+        break;
+#endif
+
+#ifdef GPIO_PORT_PIOF
+      case GPIO_PORT_PIOF:
+        sam_piof_enableclk();
+        break;
+#endif
+
+      default:
+        return -EINVAL;
+    }
+
+  return OK;
+}
+
 /****************************************************************************
  * Name: sam_configinput
  *
@@ -128,6 +190,14 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin,
 
   if ((cfgset & GPIO_CFG_PULLUP) != 0)
     {
+#ifdef GPIO_HAVE_PULLDOWN
+      /* The pull-up on a pin can not be enabled if its pull-down is still
+       * active. Therefore, we need to disable the pull-down first before
+       * enabling the pull-up.
+       */
+
+      putreg32(pin, base + SAM_PIO_PPDDR_OFFSET);
+#endif
       putreg32(pin, base + SAM_PIO_PUER_OFFSET);
     }
   else
@@ -140,6 +210,12 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin,
 
   if ((cfgset & GPIO_CFG_PULLDOWN) != 0)
     {
+      /* The pull-down on a pin can not be enabled if its pull-up is still
+       * active. Therefore, we need to disable the pull-up first before
+       * enabling the pull-down.
+       */
+
+      putreg32(pin, base + SAM_PIO_PUDR_OFFSET);
       putreg32(pin, base + SAM_PIO_PPDER_OFFSET);
     }
   else
@@ -171,6 +247,7 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin,
     {
       regval &= ~pin;
     }
+
   putreg32(regval, base + SAM_PIO_SCHMITT_OFFSET);
 #endif
 
@@ -184,7 +261,12 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin,
    *         another, new API... perhaps sam_configfilter()
    */
 
-  return OK;
+  /* Enable the peripheral clock for the GPIO's port controller.
+   * A GPIO input value is only sampled if the peripheral clock for its
+   * controller is enabled.
+   */
+
+  return sam_gpio_enableclk(cfgset);
 }
 
 /****************************************************************************
@@ -206,6 +288,14 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin,
 
   if ((cfgset & GPIO_CFG_PULLUP) != 0)
     {
+#ifdef GPIO_HAVE_PULLDOWN
+      /* The pull-up on a pin can not be enabled if its pull-down is still
+       * active. Therefore, we need to disable the pull-down first before
+       * enabling the pull-up.
+       */
+
+      putreg32(pin, base + SAM_PIO_PPDDR_OFFSET);
+#endif
       putreg32(pin, base + SAM_PIO_PUER_OFFSET);
     }
   else
@@ -218,6 +308,12 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin,
 
   if ((cfgset & GPIO_CFG_PULLDOWN) != 0)
     {
+      /* The pull-down on a pin can not be enabled if its pull-up is still
+       * active. Therefore, we need to disable the pull-up first before
+       * enabling the pull-down.
+       */
+
+      putreg32(pin, base + SAM_PIO_PUDR_OFFSET);
       putreg32(pin, base + SAM_PIO_PPDER_OFFSET);
     }
   else
@@ -277,6 +373,14 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin,
 
   if ((cfgset & GPIO_CFG_PULLUP) != 0)
     {
+#ifdef GPIO_HAVE_PULLDOWN
+      /* The pull-up on a pin can not be enabled if its pull-down is still
+       * active. Therefore, we need to disable the pull-down first before
+       * enabling the pull-up.
+       */
+
+      putreg32(pin, base + SAM_PIO_PPDDR_OFFSET);
+#endif
       putreg32(pin, base + SAM_PIO_PUER_OFFSET);
     }
   else
@@ -289,6 +393,12 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin,
 
   if ((cfgset & GPIO_CFG_PULLDOWN) != 0)
     {
+      /* The pull-down on a pin can not be enabled if its pull-up is still
+       * active. Therefore, we need to disable the pull-up first before
+       * enabling the pull-down.
+       */
+
+      putreg32(pin, base + SAM_PIO_PUDR_OFFSET);
       putreg32(pin, base + SAM_PIO_PPDER_OFFSET);
     }
   else
@@ -473,7 +583,7 @@ bool sam_gpioread(gpio_pinset_t pinset)
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 int sam_dumpgpio(uint32_t pinset, const char *msg)
 {
   irqstate_t    flags;
@@ -488,44 +598,46 @@ int sam_dumpgpio(uint32_t pinset, const char *msg)
   /* The following requires exclusive access to the GPIO registers */
 
   flags = enter_critical_section();
-  lldbg("PIO%c pinset: %08x base: %08x -- %s\n",
+
+  gpioinfo("PIO%c pinset: %08x base: %08x -- %s\n",
         g_portchar[port], pinset, base, msg);
-  lldbg("    PSR: %08x    OSR: %08x   IFSR: %08x   ODSR: %08x\n",
-        getreg32(base + SAM_PIO_PSR_OFFSET), getreg32(base + SAM_PIO_OSR_OFFSET),
-        getreg32(base + SAM_PIO_IFSR_OFFSET), getreg32(base + SAM_PIO_ODSR_OFFSET));
-  lldbg("   PDSR: %08x    IMR: %08x    ISR: %08x   MDSR: %08x\n",
-        getreg32(base + SAM_PIO_PDSR_OFFSET), getreg32(base + SAM_PIO_IMR_OFFSET),
-        getreg32(base + SAM_PIO_ISR_OFFSET), getreg32(base + SAM_PIO_MDSR_OFFSET));
+  gpioinfo("    PSR: %08x    OSR: %08x   IFSR: %08x   ODSR: %08x\n",
+           getreg32(base + SAM_PIO_PSR_OFFSET), getreg32(base + SAM_PIO_OSR_OFFSET),
+           getreg32(base + SAM_PIO_IFSR_OFFSET), getreg32(base + SAM_PIO_ODSR_OFFSET));
+  gpioinfo("   PDSR: %08x    IMR: %08x    ISR: %08x   MDSR: %08x\n",
+           getreg32(base + SAM_PIO_PDSR_OFFSET), getreg32(base + SAM_PIO_IMR_OFFSET),
+           getreg32(base + SAM_PIO_ISR_OFFSET), getreg32(base + SAM_PIO_MDSR_OFFSET));
 #if defined(CONFIG_ARCH_CHIP_SAM3U)
-  lldbg("   ABSR: %08x SCIFSR: %08x  DIFSR: %08x IFDGSR: %08x\n",
-        getreg32(base + SAM_PIO_ABSR_OFFSET), getreg32(base + SAM_PIO_SCIFSR_OFFSET),
-        getreg32(base + SAM_PIO_DIFSR_OFFSET), getreg32(base + SAM_PIO_IFDGSR_OFFSET));
+  gpioinfo("   ABSR: %08x SCIFSR: %08x  DIFSR: %08x IFDGSR: %08x\n",
+           getreg32(base + SAM_PIO_ABSR_OFFSET), getreg32(base + SAM_PIO_SCIFSR_OFFSET),
+           getreg32(base + SAM_PIO_DIFSR_OFFSET), getreg32(base + SAM_PIO_IFDGSR_OFFSET));
 #elif defined(CONFIG_ARCH_CHIP_SAM4S) || defined(CONFIG_ARCH_CHIP_SAM4E)
-  lldbg(" ABCDSR: %08x %08x         IFSCSR: %08x  PPDSR: %08x\n",
-        getreg32(base + SAM_PIO_ABCDSR1_OFFSET), getreg32(base + SAM_PIO_ABCDSR2_OFFSET),
-        getreg32(base + SAM_PIO_IFSCSR_OFFSET), getreg32(base + SAM_PIO_PPDSR_OFFSET));
+  gpioinfo(" ABCDSR: %08x %08x         IFSCSR: %08x  PPDSR: %08x\n",
+           getreg32(base + SAM_PIO_ABCDSR1_OFFSET), getreg32(base + SAM_PIO_ABCDSR2_OFFSET),
+           getreg32(base + SAM_PIO_IFSCSR_OFFSET), getreg32(base + SAM_PIO_PPDSR_OFFSET));
 #endif
-  lldbg("   PUSR: %08x   SCDR: %08x   OWSR: %08x  AIMMR: %08x\n",
-        getreg32(base + SAM_PIO_PUSR_OFFSET), getreg32(base + SAM_PIO_SCDR_OFFSET),
-        getreg32(base + SAM_PIO_OWSR_OFFSET), getreg32(base + SAM_PIO_AIMMR_OFFSET));
-  lldbg("    ESR: %08x    LSR: %08x   ELSR: %08x FELLSR: %08x\n",
-        getreg32(base + SAM_PIO_ESR_OFFSET), getreg32(base + SAM_PIO_LSR_OFFSET),
-        getreg32(base + SAM_PIO_ELSR_OFFSET), getreg32(base + SAM_PIO_FELLSR_OFFSET));
-  lldbg(" FRLHSR: %08x LOCKSR: %08x   WPMR: %08x   WPSR: %08x\n",
-        getreg32(base + SAM_PIO_FRLHSR_OFFSET), getreg32(base + SAM_PIO_LOCKSR_OFFSET),
-        getreg32(base + SAM_PIO_WPMR_OFFSET), getreg32(base + SAM_PIO_WPSR_OFFSET));
+  gpioinfo("   PUSR: %08x   SCDR: %08x   OWSR: %08x  AIMMR: %08x\n",
+           getreg32(base + SAM_PIO_PUSR_OFFSET), getreg32(base + SAM_PIO_SCDR_OFFSET),
+           getreg32(base + SAM_PIO_OWSR_OFFSET), getreg32(base + SAM_PIO_AIMMR_OFFSET));
+  gpioinfo("    ESR: %08x    LSR: %08x   ELSR: %08x FELLSR: %08x\n",
+           getreg32(base + SAM_PIO_ESR_OFFSET), getreg32(base + SAM_PIO_LSR_OFFSET),
+           getreg32(base + SAM_PIO_ELSR_OFFSET), getreg32(base + SAM_PIO_FELLSR_OFFSET));
+  gpioinfo(" FRLHSR: %08x LOCKSR: %08x   WPMR: %08x   WPSR: %08x\n",
+           getreg32(base + SAM_PIO_FRLHSR_OFFSET), getreg32(base + SAM_PIO_LOCKSR_OFFSET),
+           getreg32(base + SAM_PIO_WPMR_OFFSET), getreg32(base + SAM_PIO_WPSR_OFFSET));
 #if defined(CONFIG_ARCH_CHIP_SAM4S) || defined(CONFIG_ARCH_CHIP_SAM4E)
-  lldbg("   PCMR: %08x  PCIMR: %08x  PCISR: %08x   PCRHR: %08x\n",
-        getreg32(base + SAM_PIO_PCMR_OFFSET), getreg32(base + SAM_PIO_PCIMR_OFFSET),
-        getreg32(base + SAM_PIO_PCISR_OFFSET), getreg32(base + SAM_PIO_PCRHR_OFFSET));
+  gpioinfo("   PCMR: %08x  PCIMR: %08x  PCISR: %08x   PCRHR: %08x\n",
+           getreg32(base + SAM_PIO_PCMR_OFFSET), getreg32(base + SAM_PIO_PCIMR_OFFSET),
+           getreg32(base + SAM_PIO_PCISR_OFFSET), getreg32(base + SAM_PIO_PCRHR_OFFSET));
 #ifdef CONFIG_ARCH_CHIP_SAM4E
-  lldbg("SCHMITT: %08x DELAYR:%08x\n",
-        getreg32(base + SAM_PIO_SCHMITT_OFFSET), getreg32(base + SAM_PIO_DELAYR_OFFSET));
+  gpioinfo("SCHMITT: %08x DELAYR:%08x\n",
+           getreg32(base + SAM_PIO_SCHMITT_OFFSET), getreg32(base + SAM_PIO_DELAYR_OFFSET));
 #else
-  lldbg("SCHMITT: %08x\n",
-        getreg32(base + SAM_PIO_SCHMITT_OFFSET));
+  gpioinfo("SCHMITT: %08x\n",
+           getreg32(base + SAM_PIO_SCHMITT_OFFSET));
 #endif
 #endif
+
   leave_critical_section(flags);
   return OK;
 }
diff --git a/arch/arm/src/sam34/sam_gpio.h b/arch/arm/src/sam34/sam_gpio.h
index f8f267ef5e39a95025affce1248a5e82c06d9707..a5cbe6e3e3fdc606624aa519d29674a608fa7a49 100644
--- a/arch/arm/src/sam34/sam_gpio.h
+++ b/arch/arm/src/sam34/sam_gpio.h
@@ -77,24 +77,12 @@
 #  undef CONFIG_SAM34_GPIO_IRQ
 #endif
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_GPIO
-#endif
-
 /************************************************************************************
- * Public Types
- ************************************************************************************/
-
-/************************************************************************************
- * Inline Functions
+ * Public Function Prototypes
  ************************************************************************************/
 
 #ifndef __ASSEMBLY__
 
-/************************************************************************************
- * Public Data
- ************************************************************************************/
-
 #undef EXTERN
 #if defined(__cplusplus)
 #define EXTERN extern "C"
@@ -104,10 +92,6 @@ extern "C"
 #define EXTERN extern
 #endif
 
-/************************************************************************************
- * Public Function Prototypes
- ************************************************************************************/
-
 /************************************************************************************
  * Name: sam_gpioirqinitialize
  *
@@ -202,7 +186,7 @@ void sam_gpioirqdisable(int irq);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 int sam_dumpgpio(uint32_t pinset, const char *msg);
 #else
 #  define sam_dumpgpio(p,m)
diff --git a/arch/arm/src/sam34/sam_gpioirq.c b/arch/arm/src/sam34/sam_gpioirq.c
index 4367e81463498a37a2076a7f32e595e8073a9cf3..e6091ee511075aafae89da0a14056db427ef5b66 100644
--- a/arch/arm/src/sam34/sam_gpioirq.c
+++ b/arch/arm/src/sam34/sam_gpioirq.c
@@ -210,42 +210,42 @@ static int sam_gpiointerrupt(uint32_t base, int irq0, void *context)
 }
 
 #ifdef CONFIG_SAM34_GPIOA_IRQ
-static int sam_gpioainterrupt(int irq, void *context)
+static int sam_gpioainterrupt(int irq, void *context, FAR void *arg)
 {
   return sam_gpiointerrupt(SAM_PIOA_BASE, SAM_IRQ_PA0, context);
 }
 #endif
 
 #ifdef CONFIG_SAM34_GPIOB_IRQ
-static int sam_gpiobinterrupt(int irq, void *context)
+static int sam_gpiobinterrupt(int irq, void *context, FAR void *arg)
 {
   return sam_gpiointerrupt(SAM_PIOB_BASE, SAM_IRQ_PB0, context);
 }
 #endif
 
 #ifdef CONFIG_SAM34_GPIOC_IRQ
-static int sam_gpiocinterrupt(int irq, void *context)
+static int sam_gpiocinterrupt(int irq, void *context, FAR void *arg)
 {
   return sam_gpiointerrupt(SAM_PIOC_BASE, SAM_IRQ_PC0, context);
 }
 #endif
 
 #ifdef CONFIG_SAM34_GPIOD_IRQ
-static int sam_gpiodinterrupt(int irq, void *context)
+static int sam_gpiodinterrupt(int irq, void *context, FAR void *arg)
 {
   return sam_gpiointerrupt(SAM_PIOD_BASE, SAM_IRQ_PD0, context);
 }
 #endif
 
 #ifdef CONFIG_SAM34_GPIOE_IRQ
-static int sam_gpioeinterrupt(int irq, void *context)
+static int sam_gpioeinterrupt(int irq, void *context, FAR void *arg)
 {
   return sam_gpiointerrupt(SAM_PIOE_BASE, SAM_IRQ_PE0, context);
 }
 #endif
 
 #ifdef CONFIG_SAM34_GPIOF_IRQ
-static int sam_gpiofinterrupt(int irq, void *context)
+static int sam_gpiofinterrupt(int irq, void *context, FAR void *arg)
 {
   return sam_gpiointerrupt(SAM_PIOF_BASE, SAM_IRQ_PF0, context);
 }
@@ -280,7 +280,7 @@ void sam_gpioirqinitialize(void)
 
   /* Attach and enable the GPIOA IRQ */
 
-  (void)irq_attach(SAM_IRQ_PIOA, sam_gpioainterrupt);
+  (void)irq_attach(SAM_IRQ_PIOA, sam_gpioainterrupt, NULL);
   up_enable_irq(SAM_IRQ_PIOA);
 #endif
 
@@ -298,7 +298,7 @@ void sam_gpioirqinitialize(void)
 
   /* Attach and enable the GPIOB IRQ */
 
-  (void)irq_attach(SAM_IRQ_PIOB, sam_gpiobinterrupt);
+  (void)irq_attach(SAM_IRQ_PIOB, sam_gpiobinterrupt, NULL);
   up_enable_irq(SAM_IRQ_PIOB);
 #endif
 
@@ -316,7 +316,7 @@ void sam_gpioirqinitialize(void)
 
   /* Attach and enable the GPIOC IRQ */
 
-  (void)irq_attach(SAM_IRQ_PIOC, sam_gpiocinterrupt);
+  (void)irq_attach(SAM_IRQ_PIOC, sam_gpiocinterrupt, NULL);
   up_enable_irq(SAM_IRQ_PIOC);
 #endif
 
@@ -334,7 +334,7 @@ void sam_gpioirqinitialize(void)
 
   /* Attach and enable the GPIOC IRQ */
 
-  (void)irq_attach(SAM_IRQ_PIOD, sam_gpiodinterrupt);
+  (void)irq_attach(SAM_IRQ_PIOD, sam_gpiodinterrupt, NULL);
   up_enable_irq(SAM_IRQ_PIOD);
 #endif
 
@@ -352,7 +352,7 @@ void sam_gpioirqinitialize(void)
 
   /* Attach and enable the GPIOE IRQ */
 
-  (void)irq_attach(SAM_IRQ_PIOE, sam_gpioeinterrupt);
+  (void)irq_attach(SAM_IRQ_PIOE, sam_gpioeinterrupt, NULL);
   up_enable_irq(SAM_IRQ_PIOE);
 #endif
 
@@ -370,7 +370,7 @@ void sam_gpioirqinitialize(void)
 
   /* Attach and enable the GPIOF IRQ */
 
-  (void)irq_attach(SAM_IRQ_PIOF, sam_gpiofinterrupt);
+  (void)irq_attach(SAM_IRQ_PIOF, sam_gpiofinterrupt, NULL);
   up_enable_irq(SAM_IRQ_PIOF);
 #endif
 }
diff --git a/arch/arm/src/sam34/sam_hsmci.c b/arch/arm/src/sam34/sam_hsmci.c
index 21e9098cd5aecc3804eab568f5d86e75a9424c4a..e59d558fe4e40bdc6fd715dd17a105a8a0edba35 100644
--- a/arch/arm/src/sam34/sam_hsmci.c
+++ b/arch/arm/src/sam34/sam_hsmci.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/sam34/sam_hsmci.c
  *
- *   Copyright (C) 2010, 2012-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010, 2012-2014, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -52,6 +52,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -88,6 +89,12 @@
 
 /* Configuration ************************************************************/
 
+#if !defined(CONFIG_SAM34_HSMCI_DMA)
+#  warning "Large Non-DMA transfer may result in RX overrun failures"
+#elif !defined(CONFIG_SDIO_DMA)
+#  warning CONFIG_SDIO_DMA should be defined with CONFIG_SAM34_HSMCI_DMA
+#endif
+
 #if !(defined(CONFIG_SAM34_DMAC0) || defined(CONFIG_SAM34_PDCA))
 #  warning "HSMCI driver requires CONFIG_SAM34_DMAC0 or CONFIG_SAM34_PDCA"
 #endif
@@ -104,7 +111,7 @@
 
 #define SAM34_HSMCI_PRIO NVIC_SYSH_PRIORITY_DEFAULT
 
-#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG_VERBOSE)
+#ifndef CONFIG_DEBUG_MEMCARD_INFO
 #  undef CONFIG_SAM34_HSMCI_CMDDEBUG
 #  undef CONFIG_SAM34_HSMCI_XFRDEBUG
 #endif
@@ -324,7 +331,7 @@ struct sam_dev_s
 
   /* Callback support */
 
-  uint8_t            cdstatus;   /* Card status */
+  sdio_statset_t     cdstatus;   /* Card status */
   sdio_eventset_t    cbevents;   /* Set of events to be cause callbacks */
   worker_t           callback;   /* Registered callback function */
   void              *cbarg;      /* Registered callback argument */
@@ -456,14 +463,15 @@ static void sam_notransfer(struct sam_dev_s *priv);
 
 /* Interrupt Handling *******************************************************/
 
-static int  sam_interrupt(int irq, void *context);
+static int  sam_interrupt(int irq, void *context, FAR void *arg);
 
 /* SDIO interface methods ***************************************************/
 
 /* Initialization/setup */
 
 static void sam_reset(FAR struct sdio_dev_s *dev);
-static uint8_t sam_status(FAR struct sdio_dev_s *dev);
+static sdio_capset_t sam_capabilities(FAR struct sdio_dev_s *dev);
+static sdio_statset_t sam_status(FAR struct sdio_dev_s *dev);
 static void sam_widebus(FAR struct sdio_dev_s *dev, bool enable);
 static void sam_clock(FAR struct sdio_dev_s *dev,
               enum sdio_clock_e rate);
@@ -497,13 +505,12 @@ static int  sam_registercallback(FAR struct sdio_dev_s *dev,
 
 /* DMA */
 
-#ifdef CONFIG_SDIO_DMA
-static bool sam_dmasupported(FAR struct sdio_dev_s *dev);
-#endif
+#ifdef CONFIG_SAM34_HSMCI_DMA
 static int  sam_dmarecvsetup(FAR struct sdio_dev_s *dev,
               FAR uint8_t *buffer, size_t buflen);
 static int  sam_dmasendsetup(FAR struct sdio_dev_s *dev,
               FAR const uint8_t *buffer, size_t buflen);
+#endif
 
 /* Initialization/uninitialization/reset ************************************/
 
@@ -518,6 +525,7 @@ struct sam_dev_s g_sdiodev =
   .dev =
   {
     .reset            = sam_reset,
+    .capabilities     = sam_capabilities,
     .status           = sam_status,
     .widebus          = sam_widebus,
     .clock            = sam_clock,
@@ -540,7 +548,6 @@ struct sam_dev_s g_sdiodev =
     .callbackenable   = sam_callbackenable,
     .registercallback = sam_registercallback,
 #ifdef CONFIG_SDIO_DMA
-    .dmasupported     = sam_dmasupported,
     .dmarecvsetup     = sam_dmarecvsetup,
     .dmasendsetup     = sam_dmasendsetup,
 #endif
@@ -831,38 +838,38 @@ static void sam_hsmcisample(struct sam_hsmciregs_s *regs)
 #if defined(CONFIG_SAM34_HSMCI_XFRDEBUG) || defined(CONFIG_SAM34_HSMCI_CMDDEBUG)
 static void sam_hsmcidump(struct sam_hsmciregs_s *regs, const char *msg)
 {
-  fdbg("HSMCI Registers: %s\n", msg);
-  fdbg("     MR[%08x]: %08x\n", SAM_HSMCI_MR,       regs->mr);
-  fdbg("   DTOR[%08x]: %08x\n", SAM_HSMCI_DTOR,     regs->dtor);
-  fdbg("   SDCR[%08x]: %08x\n", SAM_HSMCI_SDCR,     regs->sdcr);
-  fdbg("   ARGR[%08x]: %08x\n", SAM_HSMCI_ARGR,     regs->argr);
-  fdbg("   BLKR[%08x]: %08x\n", SAM_HSMCI_BLKR,     regs->blkr);
-  fdbg("  CSTOR[%08x]: %08x\n", SAM_HSMCI_CSTOR,    regs->cstor);
-  fdbg("  RSPR0[%08x]: %08x\n", SAM_HSMCI_RSPR0,    regs->rsp0);
-  fdbg("  RSPR1[%08x]: %08x\n", SAM_HSMCI_RSPR1,    regs->rsp1);
-  fdbg("  RSPR2[%08x]: %08x\n", SAM_HSMCI_RSPR2,    regs->rsp2);
-  fdbg("  RSPR3[%08x]: %08x\n", SAM_HSMCI_RSPR3,    regs->rsp3);
-  fdbg("     SR[%08x]: %08x\n", SAM_HSMCI_SR,       regs->sr);
-  fdbg("    IMR[%08x]: %08x\n", SAM_HSMCI_IMR,      regs->imr);
+  mcinfo("HSMCI Registers: %s\n", msg);
+  mcinfo("     MR[%08x]: %08x\n", SAM_HSMCI_MR,       regs->mr);
+  mcinfo("   DTOR[%08x]: %08x\n", SAM_HSMCI_DTOR,     regs->dtor);
+  mcinfo("   SDCR[%08x]: %08x\n", SAM_HSMCI_SDCR,     regs->sdcr);
+  mcinfo("   ARGR[%08x]: %08x\n", SAM_HSMCI_ARGR,     regs->argr);
+  mcinfo("   BLKR[%08x]: %08x\n", SAM_HSMCI_BLKR,     regs->blkr);
+  mcinfo("  CSTOR[%08x]: %08x\n", SAM_HSMCI_CSTOR,    regs->cstor);
+  mcinfo("  RSPR0[%08x]: %08x\n", SAM_HSMCI_RSPR0,    regs->rsp0);
+  mcinfo("  RSPR1[%08x]: %08x\n", SAM_HSMCI_RSPR1,    regs->rsp1);
+  mcinfo("  RSPR2[%08x]: %08x\n", SAM_HSMCI_RSPR2,    regs->rsp2);
+  mcinfo("  RSPR3[%08x]: %08x\n", SAM_HSMCI_RSPR3,    regs->rsp3);
+  mcinfo("     SR[%08x]: %08x\n", SAM_HSMCI_SR,       regs->sr);
+  mcinfo("    IMR[%08x]: %08x\n", SAM_HSMCI_IMR,      regs->imr);
 #if defined(CONFIG_ARCH_CHIP_SAM3U)
-  fdbg("    DMA[%08x]: %08x\n", SAM_HSMCI_DMA,      regs->dma);
+  mcinfo("    DMA[%08x]: %08x\n", SAM_HSMCI_DMA,      regs->dma);
 #endif
-  fdbg("    CFG[%08x]: %08x\n", SAM_HSMCI_CFG,      regs->cfg);
-  fdbg("   WPMR[%08x]: %08x\n", SAM_HSMCI_WPMR,     regs->wpmr);
-  fdbg("   WPSR[%08x]: %08x\n", SAM_HSMCI_WPSR,     regs->wpsr);
+  mcinfo("    CFG[%08x]: %08x\n", SAM_HSMCI_CFG,      regs->cfg);
+  mcinfo("   WPMR[%08x]: %08x\n", SAM_HSMCI_WPMR,     regs->wpmr);
+  mcinfo("   WPSR[%08x]: %08x\n", SAM_HSMCI_WPSR,     regs->wpsr);
 
 #ifdef CONFIG_SAM34_PDCA
-  fdbg("HSMCI PDC Registers:\n");
-  fdbg("    RPR[%08x]: %08x\n", SAM_HSMCI_PDC_RPR,  regs->pdc_rpr);
-  fdbg("    RCR[%08x]: %08x\n", SAM_HSMCI_PDC_RCR,  regs->pdc_rcr);
-  fdbg("    TPR[%08x]: %08x\n", SAM_HSMCI_PDC_TPR,  regs->pdc_tpr);
-  fdbg("    TCR[%08x]: %08x\n", SAM_HSMCI_PDC_TCR,  regs->pdc_tcr);
-  fdbg("   RNPR[%08x]: %08x\n", SAM_HSMCI_PDC_RNPR, regs->pdc_rnpr);
-  fdbg("   RNCR[%08x]: %08x\n", SAM_HSMCI_PDC_RNCR, regs->pdc_rncr);
-  fdbg("   TNPR[%08x]: %08x\n", SAM_HSMCI_PDC_TNPR, regs->pdc_tnpr);
-  fdbg("   TNCR[%08x]: %08x\n", SAM_HSMCI_PDC_TNCR, regs->pdc_tncr);
-//fdbg("    TCR[%08x]: %08x\n", SAM_HSMCI_PDC_PTCR, regs->pdc_ptcr);
-  fdbg("   PTSR[%08x]: %08x\n", SAM_HSMCI_PDC_PTSR, regs->pdc_ptsr);
+  mcinfo("HSMCI PDC Registers:\n");
+  mcinfo("    RPR[%08x]: %08x\n", SAM_HSMCI_PDC_RPR,  regs->pdc_rpr);
+  mcinfo("    RCR[%08x]: %08x\n", SAM_HSMCI_PDC_RCR,  regs->pdc_rcr);
+  mcinfo("    TPR[%08x]: %08x\n", SAM_HSMCI_PDC_TPR,  regs->pdc_tpr);
+  mcinfo("    TCR[%08x]: %08x\n", SAM_HSMCI_PDC_TCR,  regs->pdc_tcr);
+  mcinfo("   RNPR[%08x]: %08x\n", SAM_HSMCI_PDC_RNPR, regs->pdc_rnpr);
+  mcinfo("   RNCR[%08x]: %08x\n", SAM_HSMCI_PDC_RNCR, regs->pdc_rncr);
+  mcinfo("   TNPR[%08x]: %08x\n", SAM_HSMCI_PDC_TNPR, regs->pdc_tnpr);
+  mcinfo("   TNCR[%08x]: %08x\n", SAM_HSMCI_PDC_TNCR, regs->pdc_tncr);
+//mcinfo("    TCR[%08x]: %08x\n", SAM_HSMCI_PDC_PTCR, regs->pdc_ptcr);
+  mcinfo("   PTSR[%08x]: %08x\n", SAM_HSMCI_PDC_PTSR, regs->pdc_ptsr);
 #endif
 }
 #endif
@@ -1083,7 +1090,7 @@ static void sam_eventtimeout(int argc, uint32_t arg)
       /* Yes.. wake up any waiting threads */
 
       sam_endwait(priv, SDIOWAIT_TIMEOUT);
-      flldbg("Timeout\n");
+      mcerr("ERROR: Timeout\n");
     }
 }
 
@@ -1241,7 +1248,7 @@ static void sam_notransfer(struct sam_dev_s *priv)
  *
  ****************************************************************************/
 
-static int sam_interrupt(int irq, void *context)
+static int sam_interrupt(int irq, void *context, FAR void *arg)
 {
   struct sam_dev_s *priv = &g_sdiodev;
   uint32_t sr;
@@ -1278,7 +1285,7 @@ static int sam_interrupt(int irq, void *context)
             {
               /* Yes.. Was it some kind of timeout error? */
 
-              flldbg("ERROR: enabled: %08x pending: %08x\n", enabled, pending);
+              mcerr("ERROR: enabled: %08x pending: %08x\n", enabled, pending);
               if ((pending & HSMCI_DATA_TIMEOUT_ERRORS) != 0)
                 {
                   /* Yes.. Terminate with a timeout. */
@@ -1320,8 +1327,8 @@ static int sam_interrupt(int irq, void *context)
                 {
                   /* Yes.. Was the error some kind of timeout? */
 
-                  fllvdbg("ERROR: events: %08x SR: %08x\n",
-                          priv->cmdrmask, enabled);
+                  mcerr("ERROR: events: %08x SR: %08x\n",
+                        priv->cmdrmask, enabled);
 
                   if ((pending & HSMCI_RESPONSE_TIMEOUT_ERRORS) != 0)
                     {
@@ -1455,6 +1462,31 @@ static void sam_reset(FAR struct sdio_dev_s *dev)
   leave_critical_section(flags);
 }
 
+/****************************************************************************
+ * Name: sam_capabilities
+ *
+ * Description:
+ *   Get capabilities (and limitations) of the SDIO driver (optional)
+ *
+ * Input Parameters:
+ *   dev   - Device-specific state data
+ *
+ * Returned Value:
+ *   Returns a bitset of status values (see SDIO_CAPS_* defines)
+ *
+ ****************************************************************************/
+
+static sdio_capset_t sam_capabilities(FAR struct sdio_dev_s *dev)
+{
+  sdio_capset_t caps = 0;
+
+#ifdef CONFIG_SAM34_HSMCI_DMA
+  caps |= SDIO_CAPS_DMASUPPORTED;
+#endif
+
+  return caps;
+}
+
 /****************************************************************************
  * Name: sam_status
  *
@@ -1469,7 +1501,7 @@ static void sam_reset(FAR struct sdio_dev_s *dev)
  *
  ****************************************************************************/
 
-static uint8_t sam_status(FAR struct sdio_dev_s *dev)
+static sdio_statset_t sam_status(FAR struct sdio_dev_s *dev)
 {
   struct sam_dev_s *priv = (struct sam_dev_s *)dev;
   return priv->cdstatus;
@@ -1606,7 +1638,7 @@ static int sam_attach(FAR struct sdio_dev_s *dev)
 
   /* Attach the HSMCI interrupt handler */
 
-  ret = irq_attach(SAM_IRQ_HSMCI, sam_interrupt);
+  ret = irq_attach(SAM_IRQ_HSMCI, sam_interrupt, NULL);
   if (ret == OK)
     {
 
@@ -1754,7 +1786,7 @@ static int sam_sendcmd(FAR struct sdio_dev_s *dev,
 
   /* Write the fully decorated command to CMDR */
 
-  fvdbg("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
+  mcinfo("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
   putreg32(regval, SAM_HSMCI_CMDR);
   sam_cmdsample1(SAMPLENDX_AFTER_CMDR);
   return OK;
@@ -1933,7 +1965,7 @@ static int sam_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
             {
               /* Yes.. Was the error some kind of timeout? */
 
-              fdbg("ERROR: cmd: %08x events: %08x SR: %08x\n",
+              mcerr("ERROR: cmd: %08x events: %08x SR: %08x\n",
                    cmd, priv->cmdrmask, sr);
 
               if ((pending & HSMCI_RESPONSE_TIMEOUT_ERRORS) != 0)
@@ -1963,7 +1995,7 @@ static int sam_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
        }
       else if (--timeout <= 0)
         {
-          fdbg("ERROR: Timeout cmd: %08x events: %08x SR: %08x\n",
+          mcerr("ERROR: Timeout cmd: %08x events: %08x SR: %08x\n",
                cmd, priv->cmdrmask, sr);
 
           priv->wkupevent = SDIOWAIT_TIMEOUT;
@@ -2035,10 +2067,10 @@ static int sam_recvshort(FAR struct sdio_dev_s *dev,
    *     0         1               End bit
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!rshort)
     {
-      fdbg("ERROR: rshort=NULL\n");
+      mcerr("ERROR: rshort=NULL\n");
       ret = -EINVAL;
     }
 
@@ -2050,7 +2082,7 @@ static int sam_recvshort(FAR struct sdio_dev_s *dev,
            (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R3_RESPONSE &&
            (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R7_RESPONSE)
     {
-      fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+      mcerr("ERROR: Wrong response CMD=%08x\n", cmd);
       ret = -EINVAL;
     }
   else
@@ -2095,12 +2127,12 @@ static int sam_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t rlong
    *     0         1               End bit
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   /* Check that R1 is the correct response to this command */
 
   if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R2_RESPONSE)
     {
-      fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+      mcerr("ERROR: Wrong response CMD=%08x\n", cmd);
       ret = -EINVAL;
     }
   else
@@ -2282,7 +2314,7 @@ static sdio_eventset_t sam_eventwait(FAR struct sdio_dev_s *dev,
                        1, (uint32_t)priv);
       if (ret != OK)
         {
-          fdbg("ERROR: wd_start failed: %d\n", ret);
+          mcerr("ERROR: wd_start failed: %d\n", ret);
         }
     }
 
@@ -2348,7 +2380,7 @@ static void sam_callbackenable(FAR struct sdio_dev_s *dev,
 {
   struct sam_dev_s *priv = (struct sam_dev_s *)dev;
 
-  fvdbg("eventset: %02x\n", eventset);
+  mcinfo("eventset: %02x\n", eventset);
   DEBUGASSERT(priv != NULL);
 
   priv->cbevents = eventset;
@@ -2384,7 +2416,7 @@ static int sam_registercallback(FAR struct sdio_dev_s *dev,
 
   /* Disable callbacks and register this callback and is argument */
 
-  fvdbg("Register %p(%p)\n", callback, arg);
+  mcinfo("Register %p(%p)\n", callback, arg);
   DEBUGASSERT(priv != NULL);
 
   priv->cbevents = 0;
@@ -2393,27 +2425,6 @@ static int sam_registercallback(FAR struct sdio_dev_s *dev,
   return OK;
 }
 
-/****************************************************************************
- * Name: sam_dmasupported
- *
- * Description:
- *   Return true if the hardware can support DMA
- *
- * Input Parameters:
- *   dev - An instance of the SDIO device interface
- *
- * Returned Value:
- *   true if DMA is supported.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_SDIO_DMA
-static bool sam_dmasupported(FAR struct sdio_dev_s *dev)
-{
-  return true;
-}
-#endif
-
 /****************************************************************************
  * Name: sam_dmarecvsetup
  *
@@ -2472,7 +2483,8 @@ static int sam_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
 
 #ifdef CONFIG_SAM34_PDCA
   modifyreg32(SAM_HSMCI_MR, 0, HSMCI_MR_PDCMODE);
-  fdbg("SAM_HSMCI_MR = 0x%08X\n", getreg32(SAM_HSMCI_MR));
+  mcinfo("SAM_HSMCI_MR = 0x%08X\n", getreg32(SAM_HSMCI_MR));
+
   putreg32((uint32_t)buffer, SAM_HSMCI_PDC_RPR);
   putreg32(buflen/4, SAM_HSMCI_PDC_RCR);
   putreg32(PDC_PTCR_RXTEN, SAM_HSMCI_PDC_PTCR);
@@ -2541,7 +2553,8 @@ static int sam_dmasendsetup(FAR struct sdio_dev_s *dev,
 
 #ifdef CONFIG_SAM34_PDCA
   modifyreg32(SAM_HSMCI_MR, 0, HSMCI_MR_PDCMODE);
-  fdbg("SAM_HSMCI_MR = 0x%08X\n", getreg32(SAM_HSMCI_MR));
+  mcinfo("SAM_HSMCI_MR = 0x%08X\n", getreg32(SAM_HSMCI_MR));
+
   putreg32((uint32_t)buffer, SAM_HSMCI_PDC_TPR);
   putreg32(buflen/4, SAM_HSMCI_PDC_TCR);
   putreg32(PDC_PTCR_TXTEN, SAM_HSMCI_PDC_PTCR);
@@ -2581,7 +2594,7 @@ static void sam_callback(void *arg)
   /* Is a callback registered? */
 
   DEBUGASSERT(priv != NULL);
-  fvdbg("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
+  mcinfo("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
         priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus);
 
   if (priv->callback)
@@ -2626,14 +2639,14 @@ static void sam_callback(void *arg)
         {
           /* Yes.. queue it */
 
-           fllvdbg("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
+           mcinfo("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
           (void)work_queue(LPWORK, &priv->cbwork, (worker_t)priv->callback, priv->cbarg, 0);
         }
       else
         {
           /* No.. then just call the callback here */
 
-          fvdbg("Callback to %p(%p)\n", priv->callback, priv->cbarg);
+          mcinfo("Callback to %p(%p)\n", priv->callback, priv->cbarg);
           priv->callback(priv->cbarg);
         }
     }
@@ -2663,11 +2676,21 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
 
   struct sam_dev_s *priv = &g_sdiodev;
 
-  fdbg("slotno: %d\n", slotno);
+  mcinfo("slotno: %d\n", slotno);
 
   /* Initialize the HSMCI slot structure */
+  /* Initialize semaphores */
 
   sem_init(&priv->waitsem, 0, 0);
+
+  /* The waitsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
+
+  /* Create a watchdog timer */
+
   priv->waitwdog = wd_create();
   DEBUGASSERT(priv->waitwdog);
 
@@ -2725,7 +2748,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
 void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
 {
   struct sam_dev_s *priv = (struct sam_dev_s *)dev;
-  uint8_t cdstatus;
+  sdio_statset_t cdstatus;
   irqstate_t flags;
 
   /* Update card status */
@@ -2741,7 +2764,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
       priv->cdstatus &= ~SDIO_STATUS_PRESENT;
     }
 
-  fllvdbg("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
+  mcinfo("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
 
   /* Perform any requested callback if the status has changed */
 
@@ -2786,7 +2809,7 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
       priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED;
     }
 
-  fvdbg("cdstatus: %02x\n", priv->cdstatus);
+  mcinfo("cdstatus: %02x\n", priv->cdstatus);
   leave_critical_section(flags);
 }
 #endif /* CONFIG_SAM34_HSMCI */
diff --git a/arch/arm/src/sam34/sam_irq.c b/arch/arm/src/sam34/sam_irq.c
index 2a8b2f990ed4c6b582a9dca47e5d907927e4e606..eb6b174705990c95184462f0a59fc926ab79e8f7 100644
--- a/arch/arm/src/sam34/sam_irq.c
+++ b/arch/arm/src/sam34/sam_irq.c
@@ -84,7 +84,11 @@
  * CURRENT_REGS for portability.
  */
 
+#ifdef CONFIG_SMP
+volatile uint32_t *g_current_regs[CONFIG_SMP_NCPUS];
+#else
 volatile uint32_t *g_current_regs[1];
+#endif
 
 /* This is the address of the  exception vector table (determined by the
  * linker script).
@@ -108,52 +112,54 @@ extern uint32_t _vectors[];
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_IRQ)
+#if defined(CONFIG_DEBUG_IRQ_INFO)
 static void sam_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = enter_critical_section();
-  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  lldbg("  INTCTRL:    %08x VECTAB:  %08x\n",
-        getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
+
+  irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
+  irqinfo("  INTCTRL:    %08x VECTAB:  %08x\n",
+          getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
 #if 0
-  lldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
-        getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
-        getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+  irqinfo("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+          getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
+          getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
 #endif
-  lldbg("  IRQ ENABLE: %08x %08x %08x\n",
-        getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
-        getreg32(NVIC_IRQ64_95_ENABLE));
-  lldbg("  SYSH_PRIO:  %08x %08x %08x\n",
-        getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
-        getreg32(NVIC_SYSH12_15_PRIORITY));
-  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
-        getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+  irqinfo("  IRQ ENABLE: %08x %08x %08x\n",
+          getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
+          getreg32(NVIC_IRQ64_95_ENABLE));
+  irqinfo("  SYSH_PRIO:  %08x %08x %08x\n",
+          getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+          getreg32(NVIC_SYSH12_15_PRIORITY));
+  irqinfo("  IRQ PRIO:   %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
+          getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
 #if SAM_IRQ_NEXTINT > 15
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
-        getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
+          getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
 #endif
 #if SAM_IRQ_NEXTINT > 31
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
-        getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
+          getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
 #endif
 #if SAM_IRQ_NEXTINT > 47
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
-        getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
+          getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
 #endif
 #if SAM_IRQ_NEXTINT > 63
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
-        getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
+          getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
 #endif
 #if SAM_IRQ_NEXTINT > 79
 #  warning Missing logic
 #endif
+
   leave_critical_section(flags);
 }
 #else
@@ -171,51 +177,51 @@ static void sam_dumpnvic(const char *msg, int irq)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
-static int sam_nmi(int irq, FAR void *context)
+#ifdef CONFIG_DEBUG_FEATURES
+static int sam_nmi(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! NMI received\n");
+  _err("PANIC!!! NMI received\n");
   PANIC();
   return 0;
 }
 
-static int sam_busfault(int irq, FAR void *context)
+static int sam_busfault(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
+  _err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
   PANIC();
   return 0;
 }
 
-static int sam_usagefault(int irq, FAR void *context)
+static int sam_usagefault(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
+  _err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
   PANIC();
   return 0;
 }
 
-static int sam_pendsv(int irq, FAR void *context)
+static int sam_pendsv(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! PendSV received\n");
+  _err("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
 }
 
-static int sam_dbgmonitor(int irq, FAR void *context)
+static int sam_dbgmonitor(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Debug Monitor received\n");
+  _err("PANIC!!! Debug Monitor received\n");
   PANIC();
   return 0;
 }
 
-static int sam_reserved(int irq, FAR void *context)
+static int sam_reserved(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Reserved interrupt\n");
+  _err("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;
 }
@@ -433,8 +439,8 @@ void up_irqinitialize(void)
    * under certain conditions.
    */
 
-  irq_attach(SAM_IRQ_SVCALL, up_svcall);
-  irq_attach(SAM_IRQ_HARDFAULT, up_hardfault);
+  irq_attach(SAM_IRQ_SVCALL, up_svcall, NULL);
+  irq_attach(SAM_IRQ_HARDFAULT, up_hardfault, NULL);
 
   /* Set the priority of the SVCall interrupt */
 
@@ -450,22 +456,22 @@ void up_irqinitialize(void)
    */
 
 #ifdef CONFIG_ARM_MPU
-  irq_attach(SAM_IRQ_MEMFAULT, up_memfault);
+  irq_attach(SAM_IRQ_MEMFAULT, up_memfault, NULL);
   up_enable_irq(SAM_IRQ_MEMFAULT);
 #endif
 
   /* Attach all other processor exceptions (except reset and sys tick) */
 
-#ifdef CONFIG_DEBUG
-  irq_attach(SAM_IRQ_NMI, sam_nmi);
+#ifdef CONFIG_DEBUG_FEATURES
+  irq_attach(SAM_IRQ_NMI, sam_nmi, NULL);
 #ifndef CONFIG_ARM_MPU
-  irq_attach(SAM_IRQ_MEMFAULT, up_memfault);
+  irq_attach(SAM_IRQ_MEMFAULT, up_memfault, NULL);
 #endif
-  irq_attach(SAM_IRQ_BUSFAULT, sam_busfault);
-  irq_attach(SAM_IRQ_USAGEFAULT, sam_usagefault);
-  irq_attach(SAM_IRQ_PENDSV, sam_pendsv);
-  irq_attach(SAM_IRQ_DBGMONITOR, sam_dbgmonitor);
-  irq_attach(SAM_IRQ_RESERVED, sam_reserved);
+  irq_attach(SAM_IRQ_BUSFAULT, sam_busfault, NULL);
+  irq_attach(SAM_IRQ_USAGEFAULT, sam_usagefault, NULL);
+  irq_attach(SAM_IRQ_PENDSV, sam_pendsv, NULL);
+  irq_attach(SAM_IRQ_DBGMONITOR, sam_dbgmonitor, NULL);
+  irq_attach(SAM_IRQ_RESERVED, sam_reserved, NULL);
 #endif
 
   sam_dumpnvic("initial", SAM_IRQ_NIRQS);
diff --git a/arch/arm/src/sam34/sam_rtc.c b/arch/arm/src/sam34/sam_rtc.c
index 8dbe4e9e1af6602dddee528887cabf0772b44745..83739923ce81e731c59aebcc7946ecc73066eaba 100644
--- a/arch/arm/src/sam34/sam_rtc.c
+++ b/arch/arm/src/sam34/sam_rtc.c
@@ -80,30 +80,6 @@
 
 #define RTC_MAGIC 0xdeadbeef
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_RTC
-#endif
-
-/* Constants ************************************************************************/
-
-/* Debug ****************************************************************************/
-
-#ifdef CONFIG_DEBUG_RTC
-#  define rtcdbg    dbg
-#  define rtcvdbg   vdbg
-#  define rtclldbg  lldbg
-#  define rtcllvdbg llvdbg
-#else
-#  define rtcdbg(x...)
-#  define rtcvdbg(x...)
-#  define rtclldbg(x...)
-#  define rtcllvdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Types
- ************************************************************************************/
-
 /************************************************************************************
  * Private Data
  ************************************************************************************/
@@ -146,19 +122,19 @@ uint32_t g_rtt_offset = 0;
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_RTC
+#ifdef CONFIG_DEBUG_RTC_INFO
 static void rtc_dumpregs(FAR const char *msg)
 {
-  rtclldbg("%s:\n", msg);
-  rtclldbg("      CR: %08x\n", getreg32(SAM_RTC_CR));
-  rtclldbg("      MR: %08x\n", getreg32(SAM_RTC_MR));
-  rtclldbg("    TIMR: %08x\n", getreg32(SAM_RTC_TIMR));
-  rtclldbg("    CALR: %08x\n", getreg32(SAM_RTC_CALR));
-  rtclldbg("  TIMALR: %08x\n", getreg32(SAM_RTC_TIMALR));
-  rtclldbg("  CALALR: %08x\n", getreg32(SAM_RTC_CALALR));
-  rtclldbg("      SR: %08x\n", getreg32(SAM_RTC_SR));
-  rtclldbg("     IMR: %08x\n", getreg32(SAM_RTC_IMR));
-  rtclldbg("     VER: %08x\n", getreg32(SAM_RTC_VER));
+  rtcinfo("%s:\n", msg);
+  rtcinfo("      CR: %08x\n", getreg32(SAM_RTC_CR));
+  rtcinfo("      MR: %08x\n", getreg32(SAM_RTC_MR));
+  rtcinfo("    TIMR: %08x\n", getreg32(SAM_RTC_TIMR));
+  rtcinfo("    CALR: %08x\n", getreg32(SAM_RTC_CALR));
+  rtcinfo("  TIMALR: %08x\n", getreg32(SAM_RTC_TIMALR));
+  rtcinfo("  CALALR: %08x\n", getreg32(SAM_RTC_CALALR));
+  rtcinfo("      SR: %08x\n", getreg32(SAM_RTC_SR));
+  rtcinfo("     IMR: %08x\n", getreg32(SAM_RTC_IMR));
+  rtcinfo("     VER: %08x\n", getreg32(SAM_RTC_VER));
 }
 #else
 #  define rtc_dumpregs(msg)
@@ -178,16 +154,16 @@ static void rtc_dumpregs(FAR const char *msg)
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_RTC
+#ifdef CONFIG_DEBUG_RTC_INFO
 static void rtc_dumptime(FAR struct tm *tp, FAR const char *msg)
 {
-  rtclldbg("%s:\n", msg);
-  rtclldbg("  tm_sec: %08x\n", tp->tm_sec);
-  rtclldbg("  tm_min: %08x\n", tp->tm_min);
-  rtclldbg(" tm_hour: %08x\n", tp->tm_hour);
-  rtclldbg(" tm_mday: %08x\n", tp->tm_mday);
-  rtclldbg("  tm_mon: %08x\n", tp->tm_mon);
-  rtclldbg(" tm_year: %08x\n", tp->tm_year);
+  rtcinfo("%s:\n", msg);
+  rtcinfo("  tm_sec: %08x\n", tp->tm_sec);
+  rtcinfo("  tm_min: %08x\n", tp->tm_min);
+  rtcinfo(" tm_hour: %08x\n", tp->tm_hour);
+  rtcinfo(" tm_mday: %08x\n", tp->tm_mday);
+  rtcinfo("  tm_mon: %08x\n", tp->tm_mon);
+  rtcinfo(" tm_year: %08x\n", tp->tm_year);
 }
 #else
 #  define rtc_dumptime(tp, msg)
@@ -288,7 +264,7 @@ static void rtc_worker(FAR void *arg)
  ************************************************************************************/
 
 #ifdef CONFIG_RTC_ALARM
-static int rtc_interrupt(int irq, void *context)
+static int rtc_interrupt(int irq, void *context, FAR void *arg)
 {
   int ret;
 
@@ -298,7 +274,7 @@ static int rtc_interrupt(int irq, void *context)
   ret = work_queue(LPWORK, &g_alarmwork, rtc_worker, NULL, 0);
   if (ret < 0)
     {
-      rtclldbg("ERRPR: work_queue failed: %d\n", ret);
+      rtcerr("ERROR: work_queue failed: %d\n", ret);
     }
 
   /* Disable any further alarm interrupts */
@@ -388,7 +364,7 @@ int up_rtc_initialize(void)
 #ifdef CONFIG_RTC_ALARM
   /* Then attach the ALARM interrupt handler */
 
-  irq_attach(SAM_IRQ_RTC, rtc_interrupt);
+  irq_attach(SAM_IRQ_RTC, rtc_interrupt, NULL);
 
   /* Should RTC alarm interrupt be enabled at the peripheral?  Let's assume so
    * for now.  Let's say yes if the time is valid and a valid alarm has been
diff --git a/arch/arm/src/sam34/sam_rtt.c b/arch/arm/src/sam34/sam_rtt.c
index a0c94f7ef77e0323eafb6009fec459100fa06603..7978b01bf38467eb798dea642ecf91f37766eb12 100644
--- a/arch/arm/src/sam34/sam_rtt.c
+++ b/arch/arm/src/sam34/sam_rtt.c
@@ -74,18 +74,8 @@
 
 /* Configuration ************************************************************/
 
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing the timer
- * driver.  NOTE: that only lldbg types are used so that the output is
- * immediately available.
- */
-
-#ifdef CONFIG_DEBUG_RTT
-#  define rttdbg    lldbg
-#  define rttvdbg   llvdbg
-#else
-#  define rttdbg(x...)
-#  define rttvdbg(x...)
+#ifndef CONFIG_DEBUG_TIMER_INFO
+#  undef CONFIG_SAM34_RTT_REGDEBUG
 #endif
 
 /****************************************************************************
@@ -102,12 +92,13 @@ struct sam34_lowerhalf_s
 
   /* Private data */
 
-  tccb_t   handler;         /* Current user interrupt handler */
-  uint32_t timeout;         /* The current timeout value (us) */
-  uint32_t clkticks;        /* actual clock ticks for current interval */
-  uint32_t val;             /* rtt value of current timeout */
-  uint32_t adjustment;      /* time lost due to clock resolution truncation (us) */
-  bool     started;         /* The timer has been started */
+  tccb_t    callback;        /* Current user interrupt callback */
+  FAR void *arg;             /* Argument that accompanies the callback */
+  uint32_t  timeout;         /* The current timeout value (us) */
+  uint32_t  clkticks;        /* Actual clock ticks for current interval */
+  uint32_t  val;             /* rtt value of current timeout */
+  uint32_t  adjustment;      /* Time lost due to clock resolution truncation (us) */
+  bool      started;         /* The timer has been started */
 };
 
 /****************************************************************************
@@ -115,7 +106,7 @@ struct sam34_lowerhalf_s
  ****************************************************************************/
 /* Register operations ******************************************************/
 
-#if defined(CONFIG_SAM34_RTT_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAM34_RTT_REGDEBUG
 static uint32_t sam34_getreg(uint32_t addr);
 static void     sam34_putreg(uint32_t val, uint32_t addr);
 #else
@@ -125,7 +116,7 @@ static void     sam34_putreg(uint32_t val, uint32_t addr);
 
 /* Interrupt handling *******************************************************/
 
-static int      sam34_interrupt(int irq, FAR void *context);
+static int      sam34_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /* "Lower half" driver methods **********************************************/
 
@@ -135,8 +126,8 @@ static int      sam34_getstatus(FAR struct timer_lowerhalf_s *lower,
                   FAR struct timer_status_s *status);
 static int      sam34_settimeout(FAR struct timer_lowerhalf_s *lower,
                   uint32_t timeout);
-static tccb_t   sam34_sethandler(FAR struct timer_lowerhalf_s *lower,
-                  tccb_t handler);
+static void    sam34_setcallback(FAR struct timer_lowerhalf_s *lower,
+                  tccb_t callback, FAR void *arg);
 static int      sam34_ioctl(FAR struct timer_lowerhalf_s *lower, int cmd,
                   unsigned long arg);
 
@@ -147,12 +138,12 @@ static int      sam34_ioctl(FAR struct timer_lowerhalf_s *lower, int cmd,
 
 static const struct timer_ops_s g_tcops =
 {
-  .start      = sam34_start,
-  .stop       = sam34_stop,
-  .getstatus  = sam34_getstatus,
-  .settimeout = sam34_settimeout,
-  .sethandler = sam34_sethandler,
-  .ioctl      = sam34_ioctl,
+  .start       = sam34_start,
+  .stop        = sam34_stop,
+  .getstatus   = sam34_getstatus,
+  .settimeout  = sam34_settimeout,
+  .setcallback = sam34_setcallback,
+  .ioctl       = sam34_ioctl,
 };
 
 /* "Lower half" driver state */
@@ -170,6 +161,7 @@ static struct sam34_lowerhalf_s g_tcdev;
  *   Get the contents of the value register.
  *
  ****************************************************************************/
+
 static inline uint32_t sam34_readvr(void)
 {
   register uint32_t v;
@@ -193,7 +185,7 @@ static inline uint32_t sam34_readvr(void)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_SAM34_RTT_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAM34_RTT_REGDEBUG
 static uint32_t sam34_getreg(uint32_t addr)
 {
   static uint32_t prevaddr = 0;
@@ -214,7 +206,7 @@ static uint32_t sam34_getreg(uint32_t addr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              tmrinfo("...\n");
             }
 
           return val;
@@ -231,7 +223,7 @@ static uint32_t sam34_getreg(uint32_t addr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          tmrinfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -243,7 +235,7 @@ static uint32_t sam34_getreg(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08lx->%08lx\n", addr, val);
+  tmrinfo("%08lx->%08lx\n", addr, val);
   return val;
 }
 #endif
@@ -256,12 +248,12 @@ static uint32_t sam34_getreg(uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_SAM34_RTT_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAM34_RTT_REGDEBUG
 static void sam34_putreg(uint32_t val, uint32_t addr)
 {
   /* Show the register value being written */
 
-  lldbg("%08lx<-%08lx\n", addr, val);
+  tmrinfo("%08lx<-%08lx\n", addr, val);
 
   /* Write the value */
 
@@ -283,12 +275,12 @@ static void sam34_putreg(uint32_t val, uint32_t addr)
  *
  ****************************************************************************/
 
-static int sam34_interrupt(int irq, FAR void *context)
+static int sam34_interrupt(int irq, FAR void *context, FAR void *arg)
 {
-  FAR struct sam34_lowerhalf_s *priv = &g_tcdev;
+  FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)arg;
 
-  rttvdbg("Entry\n");
-  DEBUGASSERT(irq == SAM_IRQ_RTT);
+  tmrinfo("Entry\n");
+  DEBUGASSERT(priv != NULL);
 
   /* Check if the interrupt is really pending */
 
@@ -299,9 +291,9 @@ static int sam34_interrupt(int irq, FAR void *context)
       uint32_t vr;
       uint32_t lateticks;
 
-      /* Is there a registered handler? */
+      /* Is there a registered callback? */
 
-      if (priv->handler && priv->handler(&priv->timeout))
+      if (priv->callback && priv->callback(&priv->timeout, priv->arg))
         {
           /* Disable int before writing new alarm */
 
@@ -373,7 +365,7 @@ static int sam34_start(FAR struct timer_lowerhalf_s *lower)
   uint32_t mr;
   uint32_t vr;
 
-  rttvdbg("Entry\n");
+  tmrinfo("Entry\n");
   DEBUGASSERT(priv);
 
   if (priv->started)
@@ -398,7 +390,7 @@ static int sam34_start(FAR struct timer_lowerhalf_s *lower)
   priv->val = vr + priv->clkticks;       /* value at end of interval */
   sam34_putreg(priv->val-1, SAM_RTT_AR); /* Set interval */
 
-  if (priv->handler)
+  if (priv->callback)
     {
       /* Clear status and enable interrupt */
 
@@ -433,7 +425,7 @@ static int sam34_start(FAR struct timer_lowerhalf_s *lower)
 static int sam34_stop(FAR struct timer_lowerhalf_s *lower)
 {
   FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
-  rttvdbg("Entry\n");
+  tmrinfo("Entry\n");
   DEBUGASSERT(priv);
 
   if (!priv->started)
@@ -474,7 +466,7 @@ static int sam34_getstatus(FAR struct timer_lowerhalf_s *lower,
 {
   FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
 
-  rttvdbg("Entry\n");
+  tmrinfo("Entry\n");
   DEBUGASSERT(priv);
 
   /* Return the status bit */
@@ -485,7 +477,7 @@ static int sam34_getstatus(FAR struct timer_lowerhalf_s *lower,
       status->flags |= TCFLAGS_ACTIVE;
     }
 
-  if (priv->handler)
+  if (priv->callback)
     {
       status->flags |= TCFLAGS_HANDLER;
     }
@@ -498,9 +490,9 @@ static int sam34_getstatus(FAR struct timer_lowerhalf_s *lower,
 
   status->timeleft = 1000000ULL*(sam34_getreg(SAM_RTT_AR) - sam34_readvr())/RTT_FCLK;
 
-  rttvdbg("  flags    : %08x\n", status->flags);
-  rttvdbg("  timeout  : %d\n", status->timeout);
-  rttvdbg("  timeleft : %d\n", status->timeleft);
+  tmrinfo("  flags    : %08x\n", status->flags);
+  tmrinfo("  timeout  : %d\n", status->timeout);
+  tmrinfo("  timeleft : %d\n", status->timeleft);
   return OK;
 }
 
@@ -526,7 +518,7 @@ static int sam34_settimeout(FAR struct timer_lowerhalf_s *lower,
   FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
 
   DEBUGASSERT(priv);
-  rttvdbg("Entry: timeout=%d\n", timeout);
+  tmrinfo("Entry: timeout=%d\n", timeout);
 
   if (priv->started)
     {
@@ -537,7 +529,7 @@ static int sam34_settimeout(FAR struct timer_lowerhalf_s *lower,
 
   if (timeout < 1 || timeout > RTT_MAXTIMEOUT)
     {
-      rttdbg("Cannot represent timeout=%lu > %lu\n",
+      tmrerr("ERROR: Cannot represent timeout=%lu > %lu\n",
             timeout, RTT_MAXTIMEOUT);
       return -ERANGE;
     }
@@ -547,24 +539,25 @@ static int sam34_settimeout(FAR struct timer_lowerhalf_s *lower,
   timeout = (1000000ULL * priv->clkticks) / RTT_FCLK;          /* Truncated timeout */
   priv->adjustment = priv->timeout - timeout;                  /* Truncated time to be added to next interval (dither) */
 
-  rttvdbg("fclk=%d clkticks=%d timout=%d, adjustment=%d\n",
+  tmrinfo("fclk=%d clkticks=%d timout=%d, adjustment=%d\n",
          RTT_FCLK, priv->clkticks, priv->timeout, priv->adjustment);
 
   return OK;
 }
 
 /****************************************************************************
- * Name: sam34_sethandler
+ * Name: sam34_setcallback
  *
  * Description:
- *   Call this user provided timeout handler.
+ *   Call this user provided timeout callback.
  *
  * Input Parameters:
- *   lower      - A pointer the publicly visible representation of the "lower-half"
- *                driver state structure.
- *   newhandler - The new timer expiration function pointer.  If this
- *                function pointer is NULL, then the reset-on-expiration
- *                behavior is restored,
+ *   lower    - A pointer the publicly visible representation of the "lower-half"
+ *              driver state structure.
+ *   callback - The new timer expiration function pointer.  If this
+ *              function pointer is NULL, then the reset-on-expiration
+ *              behavior is restored,
+ *   arg      - Argument that will be provided in the callback
  *
  * Returned Values:
  *   The previous timer expiration function pointer or NULL is there was
@@ -572,28 +565,23 @@ static int sam34_settimeout(FAR struct timer_lowerhalf_s *lower,
  *
  ****************************************************************************/
 
-static tccb_t sam34_sethandler(FAR struct timer_lowerhalf_s *lower,
-                               tccb_t handler)
+static void sam34_setcallback(FAR struct timer_lowerhalf_s *lower,
+                              tccb_t callback, FAR void *arg)
 {
   FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
   irqstate_t flags;
-  tccb_t oldhandler;
 
   flags = enter_critical_section();
 
   DEBUGASSERT(priv);
-  rttvdbg("Entry: handler=%p\n", handler);
-
-  /* Get the old handler return value */
-
-  oldhandler = priv->handler;
+  tmrinfo("Entry: callback=%p\n", callback);
 
-  /* Save the new handler */
+  /* Save the new callback and argument */
 
-   priv->handler = handler;
+  priv->callback = callback;
+  priv->arg      = arg;
 
   leave_critical_section(flags);
-  return oldhandler;
 }
 
 /****************************************************************************
@@ -623,7 +611,7 @@ static int sam34_ioctl(FAR struct timer_lowerhalf_s *lower, int cmd,
   int ret = -ENOTTY;
 
   DEBUGASSERT(priv);
-  rttvdbg("Entry: cmd=%d arg=%ld\n", cmd, arg);
+  tmrinfo("Entry: cmd=%d arg=%ld\n", cmd, arg);
   UNUSED(priv);
 
   return ret;
@@ -653,7 +641,7 @@ void sam_rttinitialize(FAR const char *devpath)
 {
   FAR struct sam34_lowerhalf_s *priv = &g_tcdev;
 
-  rttvdbg("Entry: devpath=%s\n", devpath);
+  tmrinfo("Entry: devpath=%s\n", devpath);
 
   /* Initialize the driver state structure.  Here we assume: (1) the state
    * structure lies in .bss and was zeroed at reset time.  (2) This function
@@ -662,7 +650,7 @@ void sam_rttinitialize(FAR const char *devpath)
 
   priv->ops = &g_tcops;
 
-  (void)irq_attach(SAM_IRQ_RTT, sam34_interrupt);
+  (void)irq_attach(SAM_IRQ_RTT, sam34_interrupt, priv);
 
   /* Enable NVIC interrupt. */
 
diff --git a/arch/arm/src/sam34/sam_serial.c b/arch/arm/src/sam34/sam_serial.c
index 46df27954a1a3066572132ffbd48397af92b818c..60f074dbf537483859eca789a153b646ecc1e5a0 100644
--- a/arch/arm/src/sam34/sam_serial.c
+++ b/arch/arm/src/sam34/sam_serial.c
@@ -370,7 +370,7 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-static int  up_interrupt(int irq, void *context);
+static int  up_interrupt(int irq, void *context, void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  up_receive(struct uart_dev_s *dev, uint32_t *status);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
@@ -692,8 +692,8 @@ static void up_disableallints(struct up_dev_s *priv, uint32_t *imr)
 
 static int up_setup(struct uart_dev_s *dev)
 {
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
 #ifndef CONFIG_SUPPRESS_UART_CONFIG
+  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
   uint32_t regval;
   uint32_t imr;
 
@@ -872,7 +872,7 @@ static int up_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, up_interrupt);
+  ret = irq_attach(priv->irq, up_interrupt, dev);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
@@ -913,61 +913,16 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_interrupt(int irq, void *context)
+static int up_interrupt(int irq, void *context, void *arg)
 {
-  struct uart_dev_s *dev = NULL;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct up_dev_s   *priv;
   uint32_t           pending;
   uint32_t           imr;
   int                passes;
   bool               handled;
 
-#ifdef CONFIG_SAM34_UART0
-  if (g_uart0priv.irq == irq)
-    {
-      dev = &g_uart0port;
-    }
-  else
-#endif
-#ifdef CONFIG_SAM34_UART1
-  if (g_uart1priv.irq == irq)
-    {
-      dev = &g_uart1port;
-    }
-  else
-#endif
-#ifdef CONFIG_SAM34_USART0
-  if (g_usart0priv.irq == irq)
-    {
-      dev = &g_usart0port;
-    }
-  else
-#endif
-#ifdef CONFIG_SAM34_USART1
-  if (g_usart1priv.irq == irq)
-    {
-      dev = &g_usart1port;
-    }
-  else
-#endif
-#ifdef CONFIG_SAM34_USART2
-  if (g_usart2priv.irq == irq)
-    {
-      dev = &g_usart2port;
-    }
-  else
-#endif
-#ifdef CONFIG_SAM34_USART3
-  if (g_usart3priv.irq == irq)
-    {
-      dev = &g_usart3port;
-    }
-  else
-#endif
-    {
-      PANIC();
-    }
-
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct up_dev_s *)dev->priv;
 
   /* Loop until there are no characters to be transferred or, until we have
diff --git a/arch/arm/src/sam34/sam_spi.c b/arch/arm/src/sam34/sam_spi.c
index 424d9218449e6f8185d098442a54e03398f7c69c..2cbe3614b65817511aef2860741fc7c54c301baa 100644
--- a/arch/arm/src/sam34/sam_spi.c
+++ b/arch/arm/src/sam34/sam_spi.c
@@ -56,6 +56,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include "up_internal.h"
@@ -102,7 +103,11 @@
 #  endif
 #endif
 
-#ifndef CONFIG_SAM34_SPI_DMA
+#ifndef CONFIG_DEBUG_SPI_INFO
+#  undef CONFIG_SAM34_SPI_REGDEBUG
+#endif
+
+#ifndef CONFIG_DEBUG_DMA_INFO
 #  undef CONFIG_SAM34_SPI_DMADEBUG
 #endif
 
@@ -132,31 +137,10 @@
 #define DMA_TIMEOUT_TICKS MSEC2TICK(DMA_TIMEOUT_MS)
 
 /* Debug *******************************************************************/
-/* Check if SPI debut is enabled (non-standard.. no support in
- * include/debug.h
- */
+/* Check if SPI debut is enabled */
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_SPI
+#ifndef CONFIG_DEBUG_DMA_INFO
 #  undef CONFIG_SAM34_SPI_DMADEBUG
-#  undef CONFIG_SAM34_SPI_REGDEBUG
-#endif
-
-#ifndef CONFIG_DEBUG_DMA
-#  undef CONFIG_SAM34_SPI_DMADEBUG
-#endif
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
 #endif
 
 #define DMA_INITIAL      0
@@ -252,7 +236,7 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
                   unsigned int offset);
 static inline struct sam_spidev_s *spi_device(struct sam_spics_s *spics);
 
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_SPI_INFO
 static void     spi_dumpregs(struct sam_spidev_s *spi, const char *msg);
 #else
 # define        spi_dumpregs(spi,msg)
@@ -441,7 +425,7 @@ static bool spi_checkreg(struct sam_spidev_s *spi, bool wr, uint32_t value,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", spi->ntimes);
+          spiinfo("...[Repeats %d times]...\n", spi->ntimes);
         }
 
       /* Save information about the new access */
@@ -475,7 +459,7 @@ static inline uint32_t spi_getreg(struct sam_spidev_s *spi,
 #ifdef CONFIG_SAM34_SPI_REGDEBUG
   if (spi_checkreg(spi, false, value, address))
     {
-      lldbg("%08x->%08x\n", address, value);
+      spiinfo("%08x->%08x\n", address, value);
     }
 #endif
 
@@ -498,7 +482,7 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
 #ifdef CONFIG_SAM34_SPI_REGDEBUG
   if (spi_checkreg(spi, true, value, address))
     {
-      lldbg("%08x<-%08x\n", address, value);
+      spiinfo("%08x<-%08x\n", address, value);
     }
 #endif
 
@@ -520,20 +504,20 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_SPI_INFO
 static void spi_dumpregs(struct sam_spidev_s *spi, const char *msg)
 {
-  spivdbg("%s:\n", msg);
-  spivdbg("    MR:%08x   SR:%08x  IMR:%08x\n",
+  spiinfo("%s:\n", msg);
+  spiinfo("    MR:%08x   SR:%08x  IMR:%08x\n",
           getreg32(spi->base + SAM_SPI_MR_OFFSET),
           getreg32(spi->base + SAM_SPI_SR_OFFSET),
           getreg32(spi->base + SAM_SPI_IMR_OFFSET));
-  spivdbg("  CSR0:%08x CSR1:%08x CSR2:%08x CSR3:%08x\n",
+  spiinfo("  CSR0:%08x CSR1:%08x CSR2:%08x CSR3:%08x\n",
           getreg32(spi->base + SAM_SPI_CSR0_OFFSET),
           getreg32(spi->base + SAM_SPI_CSR1_OFFSET),
           getreg32(spi->base + SAM_SPI_CSR2_OFFSET),
           getreg32(spi->base + SAM_SPI_CSR3_OFFSET));
-  spivdbg("  WPCR:%08x WPSR:%08x\n",
+  spiinfo("  WPCR:%08x WPSR:%08x\n",
           getreg32(spi->base + SAM_SPI_WPCR_OFFSET),
           getreg32(spi->base + SAM_SPI_WPSR_OFFSET));
 }
@@ -893,7 +877,7 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
   struct sam_spics_s *spics = (struct sam_spics_s *)dev;
   struct sam_spidev_s *spi = spi_device(spics);
 
-  spivdbg("lock=%d\n", lock);
+  spiinfo("lock=%d\n", lock);
   if (lock)
     {
       /* Take the semaphore (perhaps waiting) */
@@ -941,10 +925,10 @@ static void spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
 
   /* Are we selecting or de-selecting the device? */
 
-  spivdbg("selected=%d\n", selected);
+  spiinfo("selected=%d\n", selected);
   if (selected)
     {
-      spivdbg("cs=%d\n", spics->cs);
+      spiinfo("cs=%d\n", spics->cs);
 
       /* Before writing the TDR, the PCS field in the SPI_MR register must be set
        * in order to select a slave.
@@ -999,7 +983,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
   uint32_t regval;
   unsigned int offset;
 
-  spivdbg("cs=%d frequency=%d\n", spics->cs, frequency);
+  spiinfo("cs=%d frequency=%d\n", spics->cs, frequency);
 
   /* Check if the requested frequency is the same as the frequency selection */
 
@@ -1069,14 +1053,14 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
   /* Calculate the new actual frequency */
 
   actual = SAM_SPI_CLOCK / scbr;
-  spivdbg("csr[offset=%02x]=%08x actual=%d\n", offset, regval, actual);
+  spiinfo("csr[offset=%02x]=%08x actual=%d\n", offset, regval, actual);
 
   /* Save the frequency setting */
 
   spics->frequency = frequency;
   spics->actual    = actual;
 
-  spidbg("Frequency %d->%d\n", frequency, actual);
+  spiinfo("Frequency %d->%d\n", frequency, actual);
   return actual;
 }
 
@@ -1102,7 +1086,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
   uint32_t regval;
   unsigned int offset;
 
-  spivdbg("cs=%d mode=%d\n", spics->cs, mode);
+  spiinfo("cs=%d mode=%d\n", spics->cs, mode);
 
   /* Has the mode changed? */
 
@@ -1145,7 +1129,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
         }
 
       spi_putreg(spi, regval, offset);
-      spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
+      spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
 
       /* Save the mode so that subsequent re-configurations will be faster */
 
@@ -1175,7 +1159,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
   uint32_t regval;
   unsigned int offset;
 
-  spivdbg("cs=%d nbits=%d\n", spics->cs, nbits);
+  spiinfo("cs=%d nbits=%d\n", spics->cs, nbits);
   DEBUGASSERT(spics && nbits > 7 && nbits < 17);
 
   /* Has the number of bits changed? */
@@ -1190,7 +1174,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
       regval |= SPI_CSR_BITS(nbits);
       spi_putreg(spi, regval, offset);
 
-      spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
+      spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
 
       /* Save the selection so the subsequence re-configurations will be faster */
 
@@ -1228,7 +1212,7 @@ static uint16_t spi_send(struct spi_dev_s *dev, uint16_t wd)
   rxbyte = (uint8_t)0;
   spi_exchange(dev, &txbyte, &rxbyte, 1);
 
-  spivdbg("Sent %02x received %02x\n", txbyte, rxbyte);
+  spiinfo("Sent %02x received %02x\n", txbyte, rxbyte);
   return (uint16_t)rxbyte;
 }
 
@@ -1276,7 +1260,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
   uint8_t *rxptr8;
   uint8_t *txptr8;
 
-  spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+  spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
 
   /* Set up PCS bits */
 
@@ -1422,7 +1406,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
       return;
     }
 
-  spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+  spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
 
   spics = (struct sam_spics_s *)dev;
   spi = spi_device(spics);
@@ -1543,7 +1527,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
   ret = sam_dmarxsetup(spics->rxdma, regaddr, memaddr, nwords);
   if (ret < 0)
     {
-      dmadbg("ERROR: sam_dmarxsetup failed: %d\n", ret);
+      dmaerr("ERROR: sam_dmarxsetup failed: %d\n", ret);
       return;
     }
 
@@ -1557,7 +1541,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
   ret = sam_dmatxsetup(spics->txdma, regaddr, memaddr, nwords);
   if (ret < 0)
     {
-      dmadbg("ERROR: sam_dmatxsetup failed: %d\n", ret);
+      dmaerr("ERROR: sam_dmatxsetup failed: %d\n", ret);
       return;
     }
 
@@ -1569,7 +1553,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
   ret = sam_dmastart(spics->rxdma, spi_rxcallback, (void *)spics);
   if (ret < 0)
     {
-      dmadbg("ERROR: RX sam_dmastart failed: %d\n", ret);
+      dmaerr("ERROR: RX sam_dmastart failed: %d\n", ret);
       return;
     }
 
@@ -1578,7 +1562,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
   ret = sam_dmastart(spics->txdma, spi_txcallback, (void *)spics);
   if (ret < 0)
     {
-      dmadbg("ERROR: RX sam_dmastart failed: %d\n", ret);
+      dmaerr("ERROR: RX sam_dmastart failed: %d\n", ret);
       sam_dmastop(spics->rxdma);
       return;
     }
@@ -1600,7 +1584,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
                      (wdentry_t)spi_dmatimeout, 1, (uint32_t)spics);
       if (ret != OK)
         {
-           spidbg("ERROR: wd_start failed: %d\n", ret);
+           spierr("ERROR: wd_start failed: %d\n", ret);
         }
 
       /* Wait for the DMA complete */
@@ -1651,7 +1635,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
 
   if (spics->result)
     {
-      spidbg("ERROR: DMA failed with result: %d\n", spics->result);
+      spierr("ERROR: DMA failed with result: %d\n", spics->result);
     }
 }
 #endif /* CONFIG_SAM34_SPI_DMA */
@@ -1745,7 +1729,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
 
   /* The support SAM parts have only a single SPI port */
 
-  spivdbg("port: %d csno: %d spino: %d\n", port, csno, spino);
+  spiinfo("port: %d csno: %d spino: %d\n", port, csno, spino);
   DEBUGASSERT(csno >= 0 && csno <= SAM_SPI_NCS);
 
 #if defined(CONFIG_SAM34_SPI0) && defined(CONFIG_SAM34_SPI1)
@@ -1764,7 +1748,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
   spics = (struct sam_spics_s *)zalloc(sizeof(struct sam_spics_s));
   if (!spics)
     {
-      spidbg("ERROR: Failed to allocate a chip select structure\n");
+      spierr("ERROR: Failed to allocate a chip select structure\n");
       return NULL;
     }
 
@@ -1787,7 +1771,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
       spics->rxdma = sam_dmachannel(0);
       if (!spics->rxdma)
         {
-          spidbg("ERROR: Failed to allocate the RX DMA channel\n");
+          spierr("ERROR: Failed to allocate the RX DMA channel\n");
           spics->candma = false;
         }
     }
@@ -1797,7 +1781,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
       spics->txdma = sam_dmachannel(0);
       if (!spics->txdma)
         {
-          spidbg("ERROR: Failed to allocate the TX DMA channel\n");
+          spierr("ERROR: Failed to allocate the TX DMA channel\n");
           sam_dmafree(spics->rxdma);
           spics->rxdma  = NULL;
           spics->candma = false;
@@ -1899,10 +1883,12 @@ struct spi_dev_s *sam_spibus_initialize(int port)
 
 #ifdef CONFIG_SAM34_SPI_DMA
       /* Initialize the SPI semaphore that is used to wake up the waiting
-       * thread when the DMA transfer completes.
+       * thread when the DMA transfer completes.  This semaphore is used for
+       * signaling and, hence, should not have priority inheritance enabled.
        */
 
       sem_init(&spics->dmawait, 0, 0);
+      sem_setprotocol(&spics->dmawait, SEM_PRIO_NONE);
 
       /* Create a watchdog time to catch DMA timeouts */
 
@@ -1924,7 +1910,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
   spi_putreg(spi, regval, offset);
 
   spics->nbits = 8;
-  spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
+  spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
 
   return &spics->spidev;
 }
diff --git a/arch/arm/src/sam34/sam_start.c b/arch/arm/src/sam34/sam_start.c
index dc1d449808ab653ad2d43a1d5730a745c740451b..71537f1c38b4507c8854eebbe2b4d21264393f11 100644
--- a/arch/arm/src/sam34/sam_start.c
+++ b/arch/arm/src/sam34/sam_start.c
@@ -88,7 +88,7 @@ void __start(void) __attribute__ ((no_instrument_function));
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 #  define showprogress(c) up_lowputc(c)
 #else
 #  define showprogress(c)
@@ -241,6 +241,13 @@ void __start(void)
   const uint32_t *src;
   uint32_t *dest;
 
+#ifdef CONFIG_SMP
+  /* Disable CMCC0 */
+
+  putreg32(0, 0x4007c008);
+  while ((getreg32(0x4007c00c) & 0x01) != 0);
+#endif
+
 #ifdef CONFIG_ARMV7M_STACKCHECK
   /* Set the stack limit before we attempt to call any functions */
 
diff --git a/arch/arm/src/sam34/sam_tc.c b/arch/arm/src/sam34/sam_tc.c
index a95fa495273d1f392a2491705ea48ec45f254790..1faab8b159f170cdff8b24429ca733d0c0c16917 100644
--- a/arch/arm/src/sam34/sam_tc.c
+++ b/arch/arm/src/sam34/sam_tc.c
@@ -63,6 +63,12 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+/* Configuration ************************************************************/
+
+#ifndef CONFIG_DEBUG_TIMER_INFO
+#  undef CONFIG_SAM34_TC_REGDEBUG
+#endif
+
 /* Clocking *****************************************************************/
 
 /* TODO: Allow selection of any of the input clocks */
@@ -70,22 +76,6 @@
 #define TC_FCLK        (BOARD_SCLK_FREQUENCY)
 #define TC_MAXTIMEOUT  ((1000000ULL * (1ULL + TC_RVALUE_MASK)) / TC_FCLK)
 
-/* Configuration ************************************************************/
-
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing the timer
- * driver.  NOTE: that only lldbg types are used so that the output is
- * immediately available.
- */
-
-#ifdef CONFIG_DEBUG_TIMER
-#  define tcdbg    lldbg
-#  define tcvdbg   llvdbg
-#else
-#  define tcdbg(x...)
-#  define tcvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -100,13 +90,14 @@ struct sam34_lowerhalf_s
 
   /* Private data */
 
-  uint32_t base;            /* Base address of the timer */
-  tccb_t   handler;         /* Current user interrupt handler */
-  uint32_t timeout;         /* The current timeout value (us) */
-  uint32_t adjustment;      /* time lost due to clock resolution truncation (us) */
-  uint32_t clkticks;        /* actual clock ticks for current interval */
-  bool     started;         /* The timer has been started */
-  uint16_t periphid;        /* peripheral id */
+  uint32_t  base;           /* Base address of the timer */
+  tccb_t    callback;       /* Current user interrupt callback */
+  FAR void *arg;            /* Argument passed to the callback function */
+  uint32_t  timeout;        /* The current timeout value (us) */
+  uint32_t  adjustment;     /* time lost due to clock resolution truncation (us) */
+  uint32_t  clkticks;       /* actual clock ticks for current interval */
+  bool      started;        /* The timer has been started */
+  uint16_t  periphid;       /* peripheral id */
 };
 
 /****************************************************************************
@@ -114,7 +105,7 @@ struct sam34_lowerhalf_s
  ****************************************************************************/
 /* Register operations ******************************************************/
 
-#if defined(CONFIG_SAM34_TC_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAM34_TC_REGDEBUG
 static uint32_t sam34_getreg(uint32_t addr);
 static void     sam34_putreg(uint32_t val, uint32_t addr);
 #else
@@ -124,7 +115,7 @@ static void     sam34_putreg(uint32_t val, uint32_t addr);
 
 /* Interrupt handling *******************************************************/
 
-static int      sam34_interrupt(int irq, FAR void *context);
+static int      sam34_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /* "Lower half" driver methods **********************************************/
 
@@ -134,8 +125,8 @@ static int      sam34_getstatus(FAR struct timer_lowerhalf_s *lower,
                   FAR struct timer_status_s *status);
 static int      sam34_settimeout(FAR struct timer_lowerhalf_s *lower,
                   uint32_t timeout);
-static tccb_t   sam34_sethandler(FAR struct timer_lowerhalf_s *lower,
-                  tccb_t handler);
+static void     sam34_setcallback(FAR struct timer_lowerhalf_s *lower,
+                  tccb_t callback, FAR void *arg);
 static int      sam34_ioctl(FAR struct timer_lowerhalf_s *lower, int cmd,
                   unsigned long arg);
 
@@ -146,12 +137,12 @@ static int      sam34_ioctl(FAR struct timer_lowerhalf_s *lower, int cmd,
 
 static const struct timer_ops_s g_tcops =
 {
-  .start      = sam34_start,
-  .stop       = sam34_stop,
-  .getstatus  = sam34_getstatus,
-  .settimeout = sam34_settimeout,
-  .sethandler = sam34_sethandler,
-  .ioctl      = sam34_ioctl,
+  .start       = sam34_start,
+  .stop        = sam34_stop,
+  .getstatus   = sam34_getstatus,
+  .settimeout  = sam34_settimeout,
+  .setcallback = sam34_setcallback,
+  .ioctl       = sam34_ioctl,
 };
 
 /* "Lower half" driver state */
@@ -174,7 +165,7 @@ static struct sam34_lowerhalf_s g_tcdevs[6];
  *
  ****************************************************************************/
 
-#if defined(CONFIG_SAM34_TC_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAM34_TC_REGDEBUG
 static uint32_t sam34_getreg(uint32_t addr)
 {
   static uint32_t prevaddr = 0;
@@ -195,7 +186,7 @@ static uint32_t sam34_getreg(uint32_t addr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              tmrinfo("...\n");
             }
 
           return val;
@@ -212,7 +203,7 @@ static uint32_t sam34_getreg(uint32_t addr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          tmrinfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -224,7 +215,7 @@ static uint32_t sam34_getreg(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08lx->%08lx\n", addr, val);
+  tmrinfo("%08lx->%08lx\n", addr, val);
   return val;
 }
 #endif
@@ -237,12 +228,12 @@ static uint32_t sam34_getreg(uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_SAM34_TC_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAM34_TC_REGDEBUG
 static void sam34_putreg(uint32_t val, uint32_t addr)
 {
   /* Show the register value being written */
 
-  lldbg("%08lx<-%08lx\n", addr, val);
+  tmrinfo("%08lx<-%08lx\n", addr, val);
 
   /* Write the value */
 
@@ -264,11 +255,11 @@ static void sam34_putreg(uint32_t val, uint32_t addr)
  *
  ****************************************************************************/
 
-static int sam34_interrupt(int irq, FAR void *context)
+static int sam34_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   FAR struct sam34_lowerhalf_s *priv = &g_tcdevs[irq-SAM_IRQ_TC0];
 
-  tcvdbg("Entry\n");
+  tmrinfo("Entry\n");
   DEBUGASSERT((irq >= SAM_IRQ_TC0) && (irq <= SAM_IRQ_TC5));
 
   /* Check if the interrupt is really pending */
@@ -277,11 +268,11 @@ static int sam34_interrupt(int irq, FAR void *context)
     {
       uint32_t timeout;
 
-      /* Is there a registered handler?  If the handler has been nullified,
+      /* Is there a registered callback?  If the callback has been nullified,
        * the timer will be stopped.
        */
 
-      if (priv->handler && priv->handler(&priv->timeout))
+      if (priv->callback && priv->callback(&priv->timeout, priv->arg))
         {
           /* Calculate new ticks / dither adjustment */
 
@@ -296,10 +287,10 @@ static int sam34_interrupt(int irq, FAR void *context)
         }
       else
         {
-          /* No handler or the handler returned false.. stop the timer */
+          /* No callback or the callback returned false.. stop the timer */
 
           sam34_stop((FAR struct timer_lowerhalf_s *)priv);
-          tcvdbg("Stopped\n");
+          tmrinfo("Stopped\n");
         }
 
       /* TC_INT_CPCS is cleared by reading SAM_TCx_SR */
@@ -328,7 +319,7 @@ static int sam34_start(FAR struct timer_lowerhalf_s *lower)
   FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
   uint32_t mr_val;
 
-  tcvdbg("Entry\n");
+  tmrinfo("Entry\n");
   DEBUGASSERT(priv);
 
   if (priv->started)
@@ -350,7 +341,7 @@ static int sam34_start(FAR struct timer_lowerhalf_s *lower)
 
   sam34_putreg(priv->clkticks, priv->base + SAM_TC_RC_OFFSET);   /* Set interval */
 
-  if (priv->handler)
+  if (priv->callback)
     {
       /* Clear status and enable interrupt */
 
@@ -382,7 +373,7 @@ static int sam34_start(FAR struct timer_lowerhalf_s *lower)
 static int sam34_stop(FAR struct timer_lowerhalf_s *lower)
 {
   FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
-  tcvdbg("Entry\n");
+  tmrinfo("Entry\n");
   DEBUGASSERT(priv);
 
   if (!priv->started)
@@ -421,7 +412,7 @@ static int sam34_getstatus(FAR struct timer_lowerhalf_s *lower,
   FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
   uint32_t elapsed;
 
-  tcvdbg("Entry\n");
+  tmrinfo("Entry\n");
   DEBUGASSERT(priv);
 
   /* Return the status bit */
@@ -432,7 +423,7 @@ static int sam34_getstatus(FAR struct timer_lowerhalf_s *lower,
       status->flags |= TCFLAGS_ACTIVE;
     }
 
-  if (priv->handler)
+  if (priv->callback)
     {
       status->flags |= TCFLAGS_HANDLER;
     }
@@ -446,9 +437,9 @@ static int sam34_getstatus(FAR struct timer_lowerhalf_s *lower,
   elapsed = sam34_getreg(priv->base + SAM_TC_CV_OFFSET);
   status->timeleft = ((uint64_t)priv->timeout * elapsed) / (priv->clkticks + 1); /* TODO - check on this +1 */
 
-  tcvdbg("  flags    : %08x\n", status->flags);
-  tcvdbg("  timeout  : %d\n", status->timeout);
-  tcvdbg("  timeleft : %d\n", status->timeleft);
+  tmrinfo("  flags    : %08x\n", status->flags);
+  tmrinfo("  timeout  : %d\n", status->timeout);
+  tmrinfo("  timeleft : %d\n", status->timeleft);
   return OK;
 }
 
@@ -480,14 +471,14 @@ static int sam34_settimeout(FAR struct timer_lowerhalf_s *lower,
       return -EPERM;
     }
 
-  tcvdbg("Entry: timeout=%d\n", timeout);
+  tmrinfo("Entry: timeout=%d\n", timeout);
 
   /* Can this timeout be represented? */
 
   if (timeout < 1 || timeout > TC_MAXTIMEOUT)
     {
-      tcdbg("Cannot represent timeout=%lu > %lu\n",
-            timeout, TC_MAXTIMEOUT);
+      tmrerr("ERROR: Cannot represent timeout=%lu > %lu\n",
+             timeout, TC_MAXTIMEOUT);
       return -ERANGE;
     }
 
@@ -496,24 +487,25 @@ static int sam34_settimeout(FAR struct timer_lowerhalf_s *lower,
   timeout = (1000000ULL * priv->clkticks) / TC_FCLK;          /* Truncated timeout */
   priv->adjustment = priv->timeout - timeout;                 /* Truncated time to be added to next interval (dither) */
 
-  tcvdbg("fclk=%d clkticks=%d timout=%d, adjustment=%d\n",
-         TC_FCLK, priv->clkticks, priv->timeout, priv->adjustment);
+  tmrinfo("fclk=%d clkticks=%d timout=%d, adjustment=%d\n",
+          TC_FCLK, priv->clkticks, priv->timeout, priv->adjustment);
 
   return OK;
 }
 
 /****************************************************************************
- * Name: sam34_sethandler
+ * Name: sam34_setcallback
  *
  * Description:
- *   Call this user provided timeout handler.
+ *   Call this user provided timeout callback.
  *
  * Input Parameters:
- *   lower      - A pointer the publicly visible representation of the "lower-half"
- *                driver state structure.
- *   newhandler - The new timer expiration function pointer.  If this
- *                function pointer is NULL, then the reset-on-expiration
- *                behavior is restored,
+ *   lower    - A pointer the publicly visible representation of the "lower-half"
+ *              driver state structure.
+ *   callback - The new timer expiration function pointer.  If this
+ *              function pointer is NULL, then the reset-on-expiration
+ *              behavior is restored,
+ *   arg      - Argument to be provided with the callback.
  *
  * Returned Values:
  *   The previous timer expiration function pointer or NULL is there was
@@ -521,28 +513,23 @@ static int sam34_settimeout(FAR struct timer_lowerhalf_s *lower,
  *
  ****************************************************************************/
 
-static tccb_t sam34_sethandler(FAR struct timer_lowerhalf_s *lower,
-                               tccb_t handler)
+static void sam34_setcallback(FAR struct timer_lowerhalf_s *lower,
+                              tccb_t callback, FAR void *arg)
 {
   FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
   irqstate_t flags;
-  tccb_t oldhandler;
 
   flags = enter_critical_section();
 
   DEBUGASSERT(priv);
-  tcvdbg("Entry: handler=%p\n", handler);
-
-  /* Get the old handler return value */
-
-  oldhandler = priv->handler;
+  tmrinfo("Entry: callback=%p\n", callback);
 
-  /* Save the new handler */
+  /* Save the new callback and its argument */
 
-   priv->handler = handler;
+   priv->callback = callback;
+   priv->arg      = arg;
 
   leave_critical_section(flags);
-  return oldhandler;
 }
 
 /****************************************************************************
@@ -572,7 +559,7 @@ static int sam34_ioctl(FAR struct timer_lowerhalf_s *lower, int cmd,
   int ret = -ENOTTY;
 
   DEBUGASSERT(priv);
-  tcvdbg("Entry: cmd=%d arg=%ld\n", cmd, arg);
+  tmrinfo("Entry: cmd=%d arg=%ld\n", cmd, arg);
   UNUSED(priv);
 
   return ret;
@@ -602,7 +589,7 @@ void sam_tcinitialize(FAR const char *devpath, int irq)
 {
   FAR struct sam34_lowerhalf_s *priv = &g_tcdevs[irq-SAM_IRQ_TC0];
 
-  tcvdbg("Entry: devpath=%s\n", devpath);
+  tmrinfo("Entry: devpath=%s\n", devpath);
   DEBUGASSERT((irq >= SAM_IRQ_TC0) && (irq <= SAM_IRQ_TC5));
 
   /* Initialize the driver state structure.  Here we assume: (1) the state
@@ -660,7 +647,7 @@ void sam_tcinitialize(FAR const char *devpath, int irq)
 
   priv->ops = &g_tcops;
 
-  (void)irq_attach(irq, sam34_interrupt);
+  (void)irq_attach(irq, sam34_interrupt, NULL);
 
   /* Enable NVIC interrupt. */
 
diff --git a/arch/arm/src/sam34/sam_timerisr.c b/arch/arm/src/sam34/sam_timerisr.c
index 6ebdc2ffd4c09393ebffb23647f88d16e685b576..46661de57b556d35ace8c3e18f166404c7292bc6 100644
--- a/arch/arm/src/sam34/sam_timerisr.c
+++ b/arch/arm/src/sam34/sam_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/sam34/sam_timerisr.c
  *
- *   Copyright (C) 2010, 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010, 2013-2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -100,19 +100,11 @@
 #endif
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  sam_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -120,7 +112,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int sam_timerisr(int irq, uint32_t *regs, void *arg)
 {
   /* Process timer interrupt */
 
@@ -129,7 +121,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize the timer
@@ -137,7 +133,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t regval;
 
@@ -167,7 +163,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(SAM_IRQ_SYSTICK, (xcpt_t)up_timerisr);
+  (void)irq_attach(SAM_IRQ_SYSTICK, (xcpt_t)sam_timerisr, NULL);
 
   /* Enable SysTick interrupts */
 
diff --git a/arch/arm/src/sam34/sam_twi.c b/arch/arm/src/sam34/sam_twi.c
index f8c2f7f7caf6af014b1f80c981bcf5eea08b9752..7242f4744d63ef691b1e78a39f39c44fb264fc45 100644
--- a/arch/arm/src/sam34/sam_twi.c
+++ b/arch/arm/src/sam34/sam_twi.c
@@ -56,6 +56,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -85,6 +86,10 @@
 #  define CONFIG_SAM34_TWI1_FREQUENCY 100000
 #endif
 
+#ifndef CONFIG_DEBUG_I2C_INFO
+#  undef CONFIG_SAM34_TWI_REGDEBUG
+#endif
+
 /* Driver internal definitions *************************************************/
 
 #define TWI_TIMEOUT ((100 * CLK_TCK) / 1000) /* 100 mS */
@@ -95,21 +100,6 @@
 
 #define TWI_MAX_FREQUENCY 66000000   /* Maximum TWI frequency */
 
-/* Debug ***********************************************************************/
-/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
-
-#ifdef CONFIG_DEBUG_I2C
-#  define i2cdbg    dbg
-#  define i2cvdbg   vdbg
-#  define i2clldbg  lldbg
-#  define i2cllvdbg llvdbg
-#else
-#  define i2cdbg(x...)
-#  define i2cvdbg(x...)
-#  define i2clldbg(x...)
-#  define i2cllvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -172,13 +162,7 @@ static inline void twi_putrel(struct twi_dev_s *priv, unsigned int offset,
 
 static int  twi_wait(struct twi_dev_s *priv);
 static void twi_wakeup(struct twi_dev_s *priv, int result);
-static int  twi_interrupt(struct twi_dev_s *priv);
-#ifdef CONFIG_SAM34_TWI0
-static int  twi0_interrupt(int irq, FAR void *context);
-#endif
-#ifdef CONFIG_SAM34_TWI1
-static int  twi1_interrupt(int irq, FAR void *context);
-#endif
+static int  twi_interrupt(int irq, FAR void *context, FAR void *arg);
 static void twi_timeout(int argc, uint32_t arg, ...);
 
 static void twi_startread(struct twi_dev_s *priv, struct i2c_msg_s *msg);
@@ -288,7 +272,7 @@ static bool twi_checkreg(struct twi_dev_s *priv, bool wr, uint32_t value,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", priv->ntimes);
+          i2cinfo("...[Repeats %d times]...\n", priv->ntimes);
         }
 
       /* Save information about the new access */
@@ -320,7 +304,7 @@ static uint32_t twi_getabs(struct twi_dev_s *priv, uintptr_t address)
 
   if (twi_checkreg(priv, false, value, address))
     {
-      lldbg("%08x->%08x\n", address, value);
+      i2cinfo("%08x->%08x\n", address, value);
     }
 
   return value;
@@ -341,7 +325,7 @@ static void twi_putabs(struct twi_dev_s *priv, uintptr_t address,
 {
   if (twi_checkreg(priv, true, value, address))
     {
-      lldbg("%08x<-%08x\n", address, value);
+      i2cinfo("%08x<-%08x\n", address, value);
     }
 
   putreg32(value, address);
@@ -401,9 +385,9 @@ static int twi_wait(struct twi_dev_s *priv)
 
   do
     {
-      i2clldbg("TWI%d Waiting...\n", priv->twi);
+      i2cinfo("TWI%d Waiting...\n", priv->twi);
       twi_takesem(&priv->waitsem);
-      i2clldbg("TWI%d Awakened with result: %d\n", priv->twi, priv->result);
+      i2cinfo("TWI%d Awakened with result: %d\n", priv->twi, priv->result);
     }
   while (priv->result == -EBUSY);
 
@@ -446,21 +430,24 @@ static void twi_wakeup(struct twi_dev_s *priv, int result)
  *
  ****************************************************************************/
 
-static int twi_interrupt(struct twi_dev_s *priv)
+static int twi_interrupt(int irq, FAR void *context, FAR void *arg);
 {
+  struct twi_dev_s *priv = (struct twi_dev_s *)arg;
   struct i2c_msg_s *msg;
   uint32_t sr;
   uint32_t imr;
   uint32_t pending;
   uint32_t regval;
 
+  DEBUGASSERT(priv != NULL);
+
   /* Retrieve masked interrupt status */
 
   sr      = twi_getrel(priv, SAM_TWI_SR_OFFSET);
   imr     = twi_getrel(priv, SAM_TWI_IMR_OFFSET);
   pending = sr & imr;
 
-  i2cllvdbg("TWI%d pending: %08x\n", priv->twi, pending);
+  i2cinfo("TWI%d pending: %08x\n", priv->twi, pending);
 
   msg = priv->msg;
 
@@ -470,7 +457,7 @@ static int twi_interrupt(struct twi_dev_s *priv)
     {
       /* Wake up the thread with an I/O error indication */
 
-      i2clldbg("ERROR: TWI%d pending: %08x\n", priv->twi, pending);
+      i2cerr("ERROR: TWI%d pending: %08x\n", priv->twi, pending);
       twi_wakeup(priv, -EIO);
     }
 
@@ -564,20 +551,6 @@ static int twi_interrupt(struct twi_dev_s *priv)
   return OK;
 }
 
-#ifdef CONFIG_SAM34_TWI0
-static int twi0_interrupt(int irq, FAR void *context)
-{
-  return twi_interrupt(&g_twi0);
-}
-#endif
-
-#ifdef CONFIG_SAM34_TWI1
-static int twi1_interrupt(int irq, FAR void *context)
-{
-  return twi_interrupt(&g_twi1);
-}
-#endif
-
 /****************************************************************************
  * Name: twi_timeout
  *
@@ -593,7 +566,7 @@ static void twi_timeout(int argc, uint32_t arg, ...)
 {
   struct twi_dev_s *priv = (struct twi_dev_s *)arg;
 
-  i2clldbg("TWI%d Timeout!\n", priv->twi);
+  i2cerr("ERROR: TWI%d Timeout!\n", priv->twi);
   twi_wakeup(priv, -ETIMEDOUT);
 }
 
@@ -677,7 +650,7 @@ static void twi_startwrite(struct twi_dev_s *priv, struct i2c_msg_s *msg)
 
 static void twi_startmessage(struct twi_dev_s *priv, struct i2c_msg_s *msg)
 {
-  if ((msg->flags & I2C_M_READ) == 0)
+  if ((msg->flags & I2C_M_READ) != 0)
     {
       twi_startread(priv, msg);
     }
@@ -708,7 +681,7 @@ static int twi_transfer(FAR struct i2c_master_s *dev,
   int ret;
 
   DEBUGASSERT(dev != NULL);
-  i2cvdbg("TWI%d count: %d\n", priv->twi, count);
+  i2cinfo("TWI%d count: %d\n", priv->twi, count);
 
   /* Get exclusive access to the device */
 
@@ -742,7 +715,7 @@ static int twi_transfer(FAR struct i2c_master_s *dev,
   ret = twi_wait(priv);
   if (ret < 0)
     {
-      i2cdbg("ERROR: Transfer failed: %d\n", ret);
+      i2cerr("ERROR: Transfer failed: %d\n", ret);
     }
 
   leave_critical_section(flags);
@@ -842,7 +815,7 @@ static void twi_hw_initialize(struct twi_dev_s *priv, unsigned int pid,
   uint32_t mck;
 #endif
 
-  i2cvdbg("TWI%d Initializing\n", priv->twi);
+  i2cinfo("TWI%d Initializing\n", priv->twi);
 
   /* SVEN: TWI Slave Mode Enabled */
 
@@ -920,12 +893,11 @@ static void twi_hw_initialize(struct twi_dev_s *priv, unsigned int pid,
 struct i2c_master_s *sam_i2cbus_initialize(int bus)
 {
   struct twi_dev_s *priv;
-  xcpt_t handler;
   irqstate_t flags;
   uint32_t frequency;
   unsigned int pid;
 
-  i2cvdbg("Initializing TWI%d\n", bus);
+  i2cinfo("Initializing TWI%d\n", bus);
 
   flags = enter_critical_section();
 
@@ -948,9 +920,8 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
       sam_configgpio(GPIO_TWI0_CK);
       sam_configgpio(GPIO_TWI0_D);
 
-      /* Select the interrupt handler, TWI frequency, and peripheral ID */
+      /* Select the TWI frequency, and peripheral ID */
 
-      handler    = twi0_interrupt;
       frequency  = CONFIG_SAM34_TWI0_FREQUENCY;
       pid        = SAM_PID_TWI0;
     }
@@ -975,9 +946,8 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
       sam_configgpio(GPIO_TWI1_CK);
       sam_configgpio(GPIO_TWI1_D);
 
-      /* Select the interrupt handler, TWI frequency, and peripheral ID */
+      /* Select the TWI frequency, and peripheral ID */
 
-      handler    = twi1_interrupt;
       frequency  = CONFIG_SAMA5_TWI1_FREQUENCY;
       pid        = SAM_PID_TWI1;
     }
@@ -985,7 +955,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
 #endif
     {
       leave_critical_section(flags);
-      i2cdbg("ERROR: Unsupported bus: TWI%d\n", bus);
+      i2cerr("ERROR: Unsupported bus: TWI%d\n", bus);
       return NULL;
     }
 
@@ -993,9 +963,17 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
 
   priv->dev.ops = &g_twiops;
 
+  /* Initialize semaphores */
+
   sem_init(&priv->exclsem, 0, 1);
   sem_init(&priv->waitsem, 0, 0);
 
+  /* The waitsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
+
   /* Allocate a watchdog timer */
 
   priv->timeout = wd_create();
@@ -1008,7 +986,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
 
   /* Attach Interrupt Handler */
 
-  irq_attach(priv->irq, handler);
+  irq_attach(priv->irq, twi_interrupt, priv);
 
   /* Enable Interrupts */
 
@@ -1029,7 +1007,7 @@ int sam_i2cbus_uninitialize(FAR struct i2c_master_s * dev)
 {
   struct twi_dev_s *priv = (struct twi_dev_s *) dev;
 
-  i2cvdbg("TWI%d Un-initializing\n", priv->twi);
+  i2cinfo("TWI%d Un-initializing\n", priv->twi);
 
   /* Disable interrupts */
 
diff --git a/arch/arm/src/sam34/sam_udp.c b/arch/arm/src/sam34/sam_udp.c
index 0a74f5ba243bdaaddb41da57dc7ac2d50296e472..839a7bfdbad5d016cbc0d06d561843038de685e1 100644
--- a/arch/arm/src/sam34/sam_udp.c
+++ b/arch/arm/src/sam34/sam_udp.c
@@ -90,7 +90,7 @@
  * enabled.
  */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_USB
 #  undef CONFIG_SAM34_UDP_REGDEBUG
 #endif
 
@@ -299,12 +299,11 @@ struct sam_ep_s
   struct sam_rqhead_s  reqq;         /* Read/write request queue */
   struct sam_rqhead_s  pendq;        /* Write requests pending stall sent */
   volatile uint8_t     epstate;      /* State of the endpoint (see enum sam_epstate_e) */
-  uint8_t              stalled:1;    /* true: Endpoint is stalled */
   uint8_t              pending:1;    /* true: IN Endpoint stall is pending */
-  uint8_t              halted:1;     /* true: Endpoint feature halted */
   uint8_t              zlpneeded:1;  /* Zero length packet needed at end of transfer */
   uint8_t              zlpsent:1;    /* Zero length packet has been sent */
   uint8_t              txbusy:1;     /* Write request queue is busy (recursion avoidance kludge) */
+  uint8_t              lastbank:1;   /* Last bank we read data from */
 };
 
 struct sam_usbdev_s
@@ -396,7 +395,7 @@ static void   sam_ep0_setup(struct sam_usbdev_s *priv);
 static void   sam_ep_bankinterrupt(struct sam_usbdev_s *priv,
                 struct sam_ep_s *privep, uint32_t csr, int bank);
 static void   sam_ep_interrupt(struct sam_usbdev_s *priv, int epno);
-static int    sam_udp_interrupt(int irq, void *context);
+static int    sam_udp_interrupt(int irq, void *context, FAR void *arg);
 
 /* Endpoint helpers *********************************************************/
 
@@ -606,7 +605,7 @@ const struct trace_msg_t g_usb_trace_strings_intdecode[] =
 #ifdef CONFIG_SAM34_UDP_REGDEBUG
 static void sam_printreg(uintptr_t regaddr, uint32_t regval, bool iswrite)
 {
-  lldbg("%p%s%08x\n", regaddr, iswrite ? "<-" : "->", regval);
+  _info("%p%s%08x\n", regaddr, iswrite ? "<-" : "->", regval);
 }
 #endif
 
@@ -657,7 +656,7 @@ static void sam_checkreg(uintptr_t regaddr, uint32_t regval, bool iswrite)
             {
               /* No.. More than one. */
 
-              lldbg("[repeats %d more times]\n", count);
+              _info("[repeats %d more times]\n", count);
             }
         }
 
@@ -732,20 +731,20 @@ static inline void sam_putreg(uint32_t regval, uint32_t regaddr)
  * Name: sam_dumpep
  ****************************************************************************/
 
-#if defined(CONFIG_SAM34_UDP_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAM34_UDP_REGDEBUG) && defined(CONFIG_DEBUG_USB)
 static void sam_dumpep(struct sam_usbdev_s *priv, uint8_t epno)
 {
   /* Global Registers */
 
-  lldbg("Global Registers:\n");
-  lldbg(" FRMNUM:    %08x\n", sam_getreg(SAM_UDP_FRMNUM));
-  lldbg("GLBSTAT:    %08x\n", sam_getreg(SAM_UDP_GLBSTAT));
-  lldbg("  FADDR:    %08x\n", sam_getreg(SAM_UDP_FADDR));
-  lldbg("    IMR:    %08x\n", sam_getreg(SAM_UDP_IMR));
-  lldbg("    ISR:    %08x\n", sam_getreg(SAM_UDP_ISR));
-  lldbg("  RSTEP:    %08x\n", sam_getreg(SAM_UDP_RSTEP));
-  lldbg("   TXVC:    %08x\n", sam_getreg(SAM_UDP_TXVC));
-  lldbg(" CSR[%d]:    %08x\n", epno, sam_getreg(SAM_UDPEP_CSR(epno)));
+  _info("Global Registers:\n");
+  _info(" FRMNUM:    %08x\n", sam_getreg(SAM_UDP_FRMNUM));
+  _info("GLBSTAT:    %08x\n", sam_getreg(SAM_UDP_GLBSTAT));
+  _info("  FADDR:    %08x\n", sam_getreg(SAM_UDP_FADDR));
+  _info("    IMR:    %08x\n", sam_getreg(SAM_UDP_IMR));
+  _info("    ISR:    %08x\n", sam_getreg(SAM_UDP_ISR));
+  _info("  RSTEP:    %08x\n", sam_getreg(SAM_UDP_RSTEP));
+  _info("   TXVC:    %08x\n", sam_getreg(SAM_UDP_TXVC));
+  _info(" CSR[%d]:    %08x\n", epno, sam_getreg(SAM_UDPEP_CSR(epno)));
 }
 #endif
 
@@ -819,7 +818,7 @@ static void sam_req_complete(struct sam_ep_s *privep, int16_t result)
       privreq->flink = NULL;
       privreq->req.callback(&privep->ep, &privreq->req);
 
-      /* Reset the endpoint state and restore the stalled indication */
+      /* Reset the endpoint state */
 
       privep->epstate   = UDP_EPSTATE_IDLE;
       privep->zlpneeded = false;
@@ -894,8 +893,8 @@ static void sam_req_wrsetup(struct sam_usbdev_s *priv,
   privep->epstate = UDP_EPSTATE_SENDING;
 
   /* Set TXPKTRDY to notify the USB hardware that there is TX data in the
-   * endpoint FIFO.  We will be notified that the endpoints FIFO has been
-   * released by the USB device when TXCOMP in the endpoints UDPEP_CSRx
+   * endpoint FIFO.  We will be notified that the endpoint's FIFO has been
+   * released by the USB device when TXCOMP in the endpoint's UDPEP_CSRx
    * register has been set.
    */
 
@@ -968,9 +967,9 @@ static int sam_req_write(struct sam_usbdev_s *priv, struct sam_ep_s *privep)
           return -ENOENT;
         }
 
-      ullvdbg("epno=%d req=%p: len=%d xfrd=%d inflight=%d zlpneeded=%d\n",
-              epno, privreq, privreq->req.len, privreq->req.xfrd,
-              privreq->inflight, privep->zlpneeded);
+      uinfo("epno=%d req=%p: len=%d xfrd=%d inflight=%d zlpneeded=%d\n",
+            epno, privreq, privreq->req.len, privreq->req.xfrd,
+            privreq->inflight, privep->zlpneeded);
 
       /* Handle any bytes in flight. */
 
@@ -1139,8 +1138,8 @@ static int sam_req_read(struct sam_usbdev_s *priv, struct sam_ep_s *privep,
           return -ENOENT;
         }
 
-      ullvdbg("EP%d: len=%d xfrd=%d\n",
-              epno, privreq->req.len, privreq->req.xfrd);
+      uinfo("EP%d: len=%d xfrd=%d\n",
+            epno, privreq->req.len, privreq->req.xfrd);
 
       /* Ignore any attempt to receive a zero length packet */
 
@@ -1188,9 +1187,14 @@ static int sam_req_read(struct sam_usbdev_s *priv, struct sam_ep_s *privep,
 
   /* We get here when an RXDATABK0/1 interrupt occurs.  That interrupt
    * cannot be cleared until all of the data has been taken from the RX
-   * FIFO.  But we can
+   * FIFO.
+   *
+   * Also, we need to remember which bank we read last so the interrupt handler
+   * can determine the correct bank read sequence for future reads.
    */
 
+  privep->lastbank = bank;
+
   sam_csr_clrbits(epno, bank ? UDPEP_CSR_RXDATABK1 : UDPEP_CSR_RXDATABK0);
 
   /* Complete the transfer immediately and give the data to the class
@@ -1398,7 +1402,6 @@ static void sam_ep0_setup(struct sam_usbdev_s *priv)
 
   /* Assume NOT stalled; no TX in progress */
 
-  ep0->stalled  = false;
   ep0->pending  = false;
   ep0->epstate  = UDP_EPSTATE_IDLE;
 
@@ -1408,8 +1411,8 @@ static void sam_ep0_setup(struct sam_usbdev_s *priv)
   index.w = GETUINT16(priv->ctrl.index);
   len.w   = GETUINT16(priv->ctrl.len);
 
-  ullvdbg("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
-          priv->ctrl.type, priv->ctrl.req, value.w, index.w, len.w);
+  uinfo("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+        priv->ctrl.type, priv->ctrl.req, value.w, index.w, len.w);
 
   /* Dispatch any non-standard requests */
 
@@ -1464,7 +1467,7 @@ static void sam_ep0_setup(struct sam_usbdev_s *priv)
                       response.w = 0; /* Not stalled */
                       nbytes     = 2; /* Response size: 2 bytes */
 
-                      if (privep->stalled)
+                      if (privep->epstate == UDP_EPSTATE_STALLED)
                         {
                           /* Endpoint stalled */
 
@@ -1541,7 +1544,6 @@ static void sam_ep0_setup(struct sam_usbdev_s *priv)
                 value.w == USB_FEATURE_ENDPOINTHALT && len.w == 0)
               {
                 privep         = &priv->eplist[epno];
-                privep->halted = false;
 
                 ret = sam_ep_resume(privep);
                 if (ret < 0)
@@ -1572,7 +1574,7 @@ static void sam_ep0_setup(struct sam_usbdev_s *priv)
           {
             /* Special case recipient=device test mode */
 
-            ullvdbg("test mode: %d\n", index.w);
+            uinfo("test mode: %d\n", index.w);
           }
         else if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) != USB_REQ_RECIPIENT_ENDPOINT)
           {
@@ -1590,7 +1592,6 @@ static void sam_ep0_setup(struct sam_usbdev_s *priv)
                 value.w == USB_FEATURE_ENDPOINTHALT && len.w == 0)
               {
                 privep         = &priv->eplist[epno];
-                privep->halted = true;
 
                 ret = sam_ep_stall(privep);
                 if (ret < 0)
@@ -1873,7 +1874,6 @@ static void sam_ep_bankinterrupt(struct sam_usbdev_s *priv,
        * transferred from the FIFO.
        */
 
-      privep->epstate = UDP_EPSTATE_IDLE;
       (void)sam_req_read(priv, privep, pktsize, bank);
     }
 
@@ -1959,6 +1959,8 @@ static void sam_ep_interrupt(struct sam_usbdev_s *priv, int epno)
   struct sam_ep_s *privep;
   uintptr_t regaddr;
   uint32_t csr;
+  bool bk0;
+  bool bk1;
 
   DEBUGASSERT((unsigned)epno < SAM_UDP_NENDPOINTS);
 
@@ -2020,33 +2022,81 @@ static void sam_ep_interrupt(struct sam_usbdev_s *priv, int epno)
         }
     }
 
-  /* OUT packet received in data bank 0 */
 
-  if ((csr & UDPEP_CSR_RXDATABK0) != 0)
-    {
-      usbtrace(TRACE_INTDECODE(SAM_TRACEINTID_RXDATABK0), (uint16_t)csr);
+  /* OUT packet received.
+   *
+   * OUT packets are received in two banks. The hardware does not provide
+   * information about which bank has been filled last. Therefore we need to
+   * keep track about which bank we read last to figure out which bank(s) we
+   * need to read next.
+   *
+   * When we get here either none, one or both banks can be filled with data.
+   * Depending on which bank we read last and which bank(s) contain data we
+   * need to correctly sequence the FIFO reads:
+   *
+   * case  lastbank      bk0    bk1     read sequence
+   *  1.      0           0      0      No data to read
+   *  2.      0           1      0      Only read bank 0
+   *  3.      0           0      1      Only read bank 1
+   *  4.      0           1      1      Read bank 1, then read bank 0
+   *
+   *  5.      1           0      0      No data to read
+   *  6.      1           1      0      Only read bank 0
+   *  7.      1           0      1      Only read bank 1 (should not happen)
+   *  8.      1           1      1      Read bank 0, then read bank 1
+   *
+   * lastbank will be updated in sam_req_read() after the FIFO has been read
+   * and clear RXDATABKx.
+   */
 
-      /* Handle data received on Bank 0.  sam_ep_bankinterrupt will
-       * clear the  RXDATABK0 interrupt once that data has been
-       * transferred from the FIFO.
-       */
+  bk0 = (csr & UDPEP_CSR_RXDATABK0) != 0;
+  bk1 = (csr & UDPEP_CSR_RXDATABK1) != 0;
 
+  /* 2. and 6. - Only read bank 0 */
+
+  if (bk0 && !bk1)
+    {
+      usbtrace(TRACE_INTDECODE(SAM_TRACEINTID_RXDATABK0), (uint16_t)csr);
       sam_ep_bankinterrupt(priv, privep, csr, 0);
     }
 
-  /* OUT packet received in data bank 1 */
+  /* 3. and 7. - Only read bank 1*/
 
-  else if ((csr & UDPEP_CSR_RXDATABK1) != 0)
+  else if (!bk0 && bk1)
     {
+#ifdef CONFIG_DEBUG_USB_WARN
+      if (privep->lastbank == 1)
+        {
+          uwarn("WARNING: Unexpected USB RX case.\n");
+        }
+#endif
+
       usbtrace(TRACE_INTDECODE(SAM_TRACEINTID_RXDATABK1), (uint16_t)csr);
-      DEBUGASSERT(SAM_UDP_NBANKS(epno) > 1);
+      sam_ep_bankinterrupt(priv, privep, csr, 1);
+    }
+  else if (bk0 && bk1)
+    {
+      /* 4. - Read bank 1, then read bank 0 */
 
-      /* Handle data received on Bank 1.  sam_ep_bankinterrupt will
-       * clear the  RXDATABK1 interrupt once that data has been
-       * transferred from the FIFO.
-       */
+      if (privep->lastbank == 0)
+        {
+          usbtrace(TRACE_INTDECODE(SAM_TRACEINTID_RXDATABK1), (uint16_t)csr);
+          sam_ep_bankinterrupt(priv, privep, csr, 1);
 
-      sam_ep_bankinterrupt(priv, privep, csr, 1);
+          usbtrace(TRACE_INTDECODE(SAM_TRACEINTID_RXDATABK0), (uint16_t)csr);
+          sam_ep_bankinterrupt(priv, privep, csr, 0);
+        }
+
+      /* 8. - Read bank 0, then read bank 1 */
+
+      else
+        {
+          usbtrace(TRACE_INTDECODE(SAM_TRACEINTID_RXDATABK0), (uint16_t)csr);
+          sam_ep_bankinterrupt(priv, privep, csr, 0);
+
+          usbtrace(TRACE_INTDECODE(SAM_TRACEINTID_RXDATABK1), (uint16_t)csr);
+          sam_ep_bankinterrupt(priv, privep, csr, 1);
+        }
     }
 
   /* STALL sent */
@@ -2168,7 +2218,7 @@ static void sam_ep_interrupt(struct sam_usbdev_s *priv, int epno)
  *
  ****************************************************************************/
 
-static int sam_udp_interrupt(int irq, void *context)
+static int sam_udp_interrupt(int irq, void *context, FAR void *arg)
 {
   /* For now there is only one USB controller, but we will always refer to
    * it using a pointer to make any future ports to multiple UDP controllers
@@ -2504,12 +2554,11 @@ static void sam_ep_reset(struct sam_usbdev_s *priv, uint8_t epno)
   /* Reset endpoint status */
 
   privep->epstate   = UDP_EPSTATE_DISABLED;
-  privep->stalled   = false;
   privep->pending   = false;
-  privep->halted    = false;
   privep->zlpneeded = false;
   privep->zlpsent   = false;
   privep->txbusy    = false;
+  privep->lastbank  = 1;
 }
 
 /****************************************************************************
@@ -2577,7 +2626,6 @@ static int sam_ep_stall(struct sam_ep_s *privep)
       /* Put endpoint into stalled state */
 
       privep->epstate = UDP_EPSTATE_STALLED;
-      privep->stalled = true;
       privep->pending = false;
 
       sam_csr_setbits(epno, UDPEP_CSR_FORCESTALL);
@@ -2615,7 +2663,6 @@ static int sam_ep_resume(struct sam_ep_s *privep)
 
       /* Return endpoint to Idle state */
 
-      privep->stalled = false;
       privep->pending = false;
       privep->epstate = UDP_EPSTATE_IDLE;
 
@@ -2626,8 +2673,23 @@ static int sam_ep_resume(struct sam_ep_s *privep)
       /* Reset the endpoint FIFO */
 
       sam_putreg(UDP_RSTEP(epno), SAM_UDP_RSTEP);
+
+      /* We need to add a delay between setting and clearing the endpoint reset
+       * bit in SAM_UDP_RSTEP. Without the delay the USB controller will (may?)
+       * not reset the endpoint.
+       *
+       * If the endpoint is not being reset, the Data Toggle (DTGLE) bit will
+       * not to be cleared which will cause the next transaction to fail if
+       * DTGLE is 1. If that happens the host will time-out and reset the bus.
+       *
+       * Adding this delay may also fix the USBMSC_STALL_RACEWAR in
+       * usbmsc_scsi.c, however this has not been verified yet.
+       */
+
+      up_udelay(10);
       sam_putreg(0, SAM_UDP_RSTEP);
 
+
       /* Copy any requests in the pending request queue to the working
        * request queue.
        */
@@ -2749,7 +2811,7 @@ static int sam_ep_configure_internal(struct sam_ep_s *privep,
 
   DEBUGASSERT(privep && privep->dev && desc);
 
-  uvdbg("len: %02x type: %02x addr: %02x attr: %02x "
+  uinfo("len: %02x type: %02x addr: %02x attr: %02x "
         "maxpacketsize: %02x %02x interval: %02x\n",
         desc->len, desc->type, desc->addr, desc->attr,
         desc->mxpacketsize[0],  desc->mxpacketsize[1],
@@ -2891,7 +2953,7 @@ static int sam_ep_configure(struct usbdev_ep_s *ep,
 
   /* Verify parameters.  Endpoint 0 is not available at this interface */
 
-#if defined(CONFIG_DEBUG) || defined(CONFIG_USBDEV_TRACE)
+#if defined(CONFIG_DEBUG_USB) || defined(CONFIG_USBDEV_TRACE)
   uint8_t epno = USB_EPNO(desc->addr);
   usbtrace(TRACE_EPCONFIGURE, (uint16_t)epno);
 
@@ -2942,11 +3004,11 @@ static int sam_ep_disable(struct usbdev_ep_s *ep)
   irqstate_t flags;
   uint8_t epno;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
-      ulldbg("ERROR: ep=%p\n", ep);
+      uerr("ERROR: ep=%p\n", ep);
       return -EINVAL;
     }
 #endif
@@ -2979,13 +3041,14 @@ static struct usbdev_req_s *sam_ep_allocreq(struct usbdev_ep_s *ep)
 {
   struct sam_req_s *privreq;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
       return NULL;
     }
 #endif
+
   usbtrace(TRACE_EPALLOCREQ, USB_EPNO(ep->eplog));
 
   privreq = (struct sam_req_s *)kmm_malloc(sizeof(struct sam_req_s));
@@ -3011,7 +3074,7 @@ static void sam_ep_freereq(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
 {
   struct sam_req_s *privreq = (struct sam_req_s *)req;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3074,11 +3137,12 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
   uint8_t epno;
   int ret = OK;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!req || !req->callback || !req->buf || !ep)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
-      ulldbg("ERROR: req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+      uerr("ERROR: req=%p callback=%p buf=%p ep=%p\n",
+           req, req->callback, req->buf, ep);
       return -EINVAL;
     }
 #endif
@@ -3086,11 +3150,11 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
   usbtrace(TRACE_EPSUBMIT, USB_EPNO(ep->eplog));
   priv = privep->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!priv->driver)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_NOTCONFIGURED), priv->usbdev.speed);
-      ulldbg("ERROR: driver=%p\n", priv->driver);
+      uerr("ERROR: driver=%p\n", priv->driver);
       return -ESHUTDOWN;
     }
 #endif
@@ -3112,13 +3176,13 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
     {
       /* Check if the endpoint is stalled (or there is a stall pending) */
 
-      if (privep->stalled || privep->pending)
+      if ((privep->epstate == UDP_EPSTATE_STALLED) || privep->pending)
         {
-          /* Yes.. in this case, save the new they will get in a special
-           * "pending" they will get queue until the stall is cleared.
+          /* Yes.. in this case, save the request in a special "pending"
+           * queue. They will stay queued until the stall is cleared.
            */
 
-          ulldbg("Pending stall clear\n");
+          uinfo("Pending stall clear\n");
           sam_req_enqueue(&privep->pendq, privreq);
           usbtrace(TRACE_INREQQUEUED(epno), req->len);
           ret = OK;
@@ -3182,13 +3246,14 @@ static int sam_ep_cancel(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
   struct sam_ep_s *privep = (struct sam_ep_s *)ep;
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
       return -EINVAL;
     }
 #endif
+
   usbtrace(TRACE_EPCANCEL, USB_EPNO(ep->eplog));
 
   flags = enter_critical_section();
@@ -3208,7 +3273,7 @@ static int sam_ep_stallresume(struct usbdev_ep_s *ep, bool resume)
   irqstate_t flags;
   int ret;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3283,7 +3348,8 @@ static struct usbdev_ep_s *sam_allocep(struct usbdev_s *dev, uint8_t epno,
   uint16_t epset = SAM_EPSET_NOTEP0;
 
   usbtrace(TRACE_DEVALLOCEP, (uint16_t)epno);
-#ifdef CONFIG_DEBUG
+
+#ifdef CONFIG_DEBUG_USB
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3345,13 +3411,14 @@ static void sam_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep)
   struct sam_usbdev_s *priv;
   struct sam_ep_s *privep;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!dev || !ep)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
       return;
     }
 #endif
+
   priv   = (struct sam_usbdev_s *)dev;
   privep = (struct sam_ep_s *)ep;
   usbtrace(TRACE_DEVFREEEP, (uint16_t)USB_EPNO(ep->eplog));
@@ -3377,7 +3444,7 @@ static int sam_getframe(struct usbdev_s *dev)
   uint32_t regval;
   uint16_t frameno;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3409,7 +3476,8 @@ static int sam_wakeup(struct usbdev_s *dev)
   uint32_t regval;
 
   usbtrace(TRACE_DEVWAKEUP, 0);
-#ifdef CONFIG_DEBUG
+
+#ifdef CONFIG_DEBUG_USB
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3480,7 +3548,7 @@ static int sam_selfpowered(struct usbdev_s *dev, bool selfpowered)
 
   usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3588,9 +3656,7 @@ static void sam_reset(struct sam_usbdev_s *priv)
 
       /* Reset endpoint status */
 
-      privep->stalled   = false;
       privep->pending   = false;
-      privep->halted    = false;
       privep->zlpneeded = false;
       privep->zlpsent   = false;
       privep->txbusy    = false;
@@ -3849,7 +3915,7 @@ void up_usbinitialize(void)
    * them when we need them later.
    */
 
-  if (irq_attach(SAM_IRQ_UDP, sam_udp_interrupt) != 0)
+  if (irq_attach(SAM_IRQ_UDP, sam_udp_interrupt, NULL) != 0)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_IRQREGISTRATION),
                (uint16_t)SAM_IRQ_UDP);
@@ -3926,7 +3992,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
 
   usbtrace(TRACE_DEVREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!driver || !driver->ops->bind || !driver->ops->unbind ||
       !driver->ops->disconnect || !driver->ops->setup)
     {
@@ -4000,7 +4066,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
 
   usbtrace(TRACE_DEVUNREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (driver != priv->driver)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/sam34/sam_wdt.c b/arch/arm/src/sam34/sam_wdt.c
index dbb3f6f895ec5136cc1aa17dea21a364840dc9da..cf88b37fec1e515a2865e2eccbc152c6ded95302 100644
--- a/arch/arm/src/sam34/sam_wdt.c
+++ b/arch/arm/src/sam34/sam_wdt.c
@@ -81,18 +81,8 @@
 #  define CONFIG_SAM34_WDT_DEFTIMOUT WDT_MAXTIMEOUT
 #endif
 
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing the watchdog
- * driver.  NOTE: that only lldbg types are used so that the output is
- * immediately available.
- */
-
-#ifdef CONFIG_DEBUG_WATCHDOG
-#  define wddbg    lldbg
-#  define wdvdbg   llvdbg
-#else
-#  define wddbg(x...)
-#  define wdvdbg(x...)
+#ifndef CONFIG_DEBUG_WATCHDOG_INFO
+#  undef CONFIG_SAM34_WDT_REGDEBUG
 #endif
 
 /****************************************************************************
@@ -118,7 +108,7 @@ struct sam34_lowerhalf_s
  ****************************************************************************/
 /* Register operations ******************************************************/
 
-#if defined(CONFIG_SAM34_WDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAM34_WDT_REGDEBUG
 static uint32_t sam34_getreg(uint32_t addr);
 static void     sam34_putreg(uint32_t val, uint32_t addr);
 #else
@@ -128,7 +118,7 @@ static void     sam34_putreg(uint32_t val, uint32_t addr);
 
 /* Interrupt handling *******************************************************/
 
-static int      sam34_interrupt(int irq, FAR void *context);
+static int      sam34_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /* "Lower half" driver methods **********************************************/
 
@@ -176,7 +166,7 @@ static struct sam34_lowerhalf_s g_wdgdev;
  *
  ****************************************************************************/
 
-#if defined(CONFIG_SAM34_WDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAM34_WDT_REGDEBUG
 static uint32_t sam34_getreg(uint32_t addr)
 {
   static uint32_t prevaddr = 0;
@@ -197,7 +187,7 @@ static uint32_t sam34_getreg(uint32_t addr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              wdinfo("...\n");
             }
 
           return val;
@@ -214,7 +204,7 @@ static uint32_t sam34_getreg(uint32_t addr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          wdinfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -226,7 +216,7 @@ static uint32_t sam34_getreg(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%08x\n", addr, val);
+  wdinfo("%08x->%08x\n", addr, val);
   return val;
 }
 #endif
@@ -239,12 +229,12 @@ static uint32_t sam34_getreg(uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_SAM34_WDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAM34_WDT_REGDEBUG
 static void sam34_putreg(uint32_t val, uint32_t addr)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", addr, val);
+  wdinfo("%08x<-%08x\n", addr, val);
 
   /* Write the value */
 
@@ -266,7 +256,7 @@ static void sam34_putreg(uint32_t val, uint32_t addr)
  *
  ****************************************************************************/
 
-static int sam34_interrupt(int irq, FAR void *context)
+static int sam34_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   FAR struct sam34_lowerhalf_s *priv = &g_wdgdev;
   uint16_t regval;
@@ -285,7 +275,7 @@ static int sam34_interrupt(int irq, FAR void *context)
            * upon return.
            */
 
-          priv->handler(irq, context);
+          priv->handler(irq, context, NULL);
         }
 
       /* The EWI interrupt is cleared by the WDT_SR register. */
@@ -314,7 +304,7 @@ static int sam34_start(FAR struct watchdog_lowerhalf_s *lower)
   FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
   uint32_t mr_val = 0;
 
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
   DEBUGASSERT(priv);
 
   /* The watchdog is always disabled after a reset. It is enabled by setting
@@ -360,7 +350,7 @@ static int sam34_stop(FAR struct watchdog_lowerhalf_s *lower)
    * except by a reset.
    */
 
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
   return -ENOSYS;
 }
 
@@ -386,7 +376,7 @@ static int sam34_stop(FAR struct watchdog_lowerhalf_s *lower)
 
 static int sam34_keepalive(FAR struct watchdog_lowerhalf_s *lower)
 {
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
 
   sam34_putreg((WDT_CR_KEY | WDT_CR_WDRSTT), SAM_WDT_CR);
   return OK;
@@ -414,7 +404,7 @@ static int sam34_getstatus(FAR struct watchdog_lowerhalf_s *lower,
   FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
   uint32_t elapsed;
 
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
   DEBUGASSERT(priv);
 
   /* Return the status bit */
@@ -441,10 +431,10 @@ static int sam34_getstatus(FAR struct watchdog_lowerhalf_s *lower,
 
   status->timeleft = (priv->timeout * elapsed) / (priv->reload + 1);
 
-  wdvdbg("Status     : %08x\n", sam34_getreg(SAM_WDT_SR));
-  wdvdbg("  flags    : %08x\n", status->flags);
-  wdvdbg("  timeout  : %d\n", status->timeout);
-  wdvdbg("  timeleft : %d\n", status->timeleft);
+  wdinfo("Status     : %08x\n", sam34_getreg(SAM_WDT_SR));
+  wdinfo("  flags    : %08x\n", status->flags);
+  wdinfo("  timeout  : %d\n", status->timeout);
+  wdinfo("  timeleft : %d\n", status->timeleft);
   return OK;
 }
 
@@ -471,13 +461,13 @@ static int sam34_settimeout(FAR struct watchdog_lowerhalf_s *lower,
   uint32_t reload;
 
   DEBUGASSERT(priv);
-  wdvdbg("Entry: timeout=%d\n", timeout);
+  wdinfo("Entry: timeout=%d\n", timeout);
 
   /* Can this timeout be represented? */
 
   if (timeout < 1 || timeout > WDT_MAXTIMEOUT)
     {
-      wddbg("Cannot represent timeout=%d > %d\n",
+      wderr("ERROR: Cannot represent timeout=%d > %d\n",
             timeout, WDT_MAXTIMEOUT);
       return -ERANGE;
     }
@@ -503,7 +493,7 @@ static int sam34_settimeout(FAR struct watchdog_lowerhalf_s *lower,
 
   priv->reload = reload;
 
-  wdvdbg("fwdt=%d reload=%d timout=%d\n",
+  wdinfo("fwdt=%d reload=%d timout=%d\n",
          WDT_FCLK, reload, priv->timeout);
 
   /* Don't commit to MR register until started! */
@@ -543,7 +533,7 @@ static xcpt_t sam34_capture(FAR struct watchdog_lowerhalf_s *lower,
   uint16_t regval;
 
   DEBUGASSERT(priv);
-  wdvdbg("Entry: handler=%p\n", handler);
+  wdinfo("Entry: handler=%p\n", handler);
 
   /* Get the old handler return value */
 
@@ -564,7 +554,7 @@ static xcpt_t sam34_capture(FAR struct watchdog_lowerhalf_s *lower,
       regval |= WWDG_CFR_EWI;
       sam34_putreg(regval, SAM_WDT_CFR);
 
-      up_enable_irq(STM32_IRQ_WWDG);
+      up_enable_irq(SAM_IRQ_WWDG);
     }
   else
     {
@@ -573,7 +563,7 @@ static xcpt_t sam34_capture(FAR struct watchdog_lowerhalf_s *lower,
       regval &= ~WWDG_CFR_EWI;
       sam34_putreg(regval, SAM_WDT_CFR);
 
-      up_disable_irq(STM32_IRQ_WWDG);
+      up_disable_irq(SAM_IRQ_WWDG);
     }
 
   leave_critical_section(flags);
@@ -611,7 +601,7 @@ static int sam34_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd,
   int ret = -ENOTTY;
 
   DEBUGASSERT(priv);
-  wdvdbg("Entry: cmd=%d arg=%ld\n", cmd, arg);
+  wdinfo("Entry: cmd=%d arg=%ld\n", cmd, arg);
 
   /* WDIOC_MINTIME: Set the minimum ping time.  If two keepalive ioctls
    * are received within this time, a reset event will be generated.
@@ -676,7 +666,7 @@ void sam_wdtinitialize(FAR const char *devpath)
            WDT_MR_WDRSTEN);
   sam34_putreg(mr_val, SAM_WDT_MR);
 
-  wdvdbg("Entry: devpath=%s\n", devpath);
+  wdinfo("Entry: devpath=%s\n", devpath);
 
   /* NOTE we assume that clocking to the IWDG has already been provided by
    * the RCC initialization logic.
@@ -691,7 +681,7 @@ void sam_wdtinitialize(FAR const char *devpath)
 
   /* Attach our EWI interrupt handler (But don't enable it yet) */
 
-  (void)irq_attach(SAM_IRQ_WDT, sam34_interrupt);
+  (void)irq_attach(SAM_IRQ_WDT, sam34_interrupt, NULL);
 
   /* Select an arbitrary initial timeout value.  But don't start the watchdog
    * yet. NOTE: If the "Hardware watchdog" feature is enabled through the
@@ -705,7 +695,9 @@ void sam_wdtinitialize(FAR const char *devpath)
 
   priv->window = priv->reload;
 
-  /* Register the watchdog driver as /dev/watchdog0 */
+  /* Register the watchdog driver, usually at CONFIG_WATCHDOG_DEVPATH
+   * (default /dev/watchdog0).
+   */
 
   (void)watchdog_register(devpath, (FAR struct watchdog_lowerhalf_s *)priv);
 
diff --git a/arch/arm/src/sam34/sam_wdt.h b/arch/arm/src/sam34/sam_wdt.h
index 234f4e25204273d54d7344673331afe12e1a3634..77a1fbab40e3dd684031c8ab1e7a459c427cf83c 100644
--- a/arch/arm/src/sam34/sam_wdt.h
+++ b/arch/arm/src/sam34/sam_wdt.h
@@ -95,4 +95,4 @@ void sam_wdtinitialize(FAR const char *devpath);
 
 #endif /* __ASSEMBLY__ */
 #endif /* CONFIG_WATCHDOG */
-#endif /* __ARCH_ARM_SRC_STM32_STM32_WDG_H */
+#endif /* __ARCH_ARM_SRC_SAM34_WDT_H */
diff --git a/arch/arm/src/sama5/Kconfig b/arch/arm/src/sama5/Kconfig
index b2701131bc292e0907c39aac351af9aa5d87d5c3..280894d84e2e8f739887a92ca0815a398a0873e9 100644
--- a/arch/arm/src/sama5/Kconfig
+++ b/arch/arm/src/sama5/Kconfig
@@ -1393,9 +1393,9 @@ endif # SAMA5_LCDC_HCR
 config SAMA5_LCDC_REGDEBUG
 	bool "Register-Level Debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_LCD_INFO
 	---help---
-		Enable very low-level register access debug.  Depends on DEBUG.
+		Enable very low-level register access debug.  Depends on CONFIG_DEBUG_LCD_INFO.
 
 endmenu # LCDC configuration
 endif # SAMA5_LCDC
@@ -1437,6 +1437,26 @@ config SAMA5_GMAC_NBC
 	---help---
 		Select to disable receipt of broadcast packets.
 
+choice
+	prompt "Work queue"
+	default SAMA5_GMAC_LPWORK if SCHED_LPWORK
+	default SAMA5_GMAC_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the Ethernet driver.  If the
+		low priority work queue is available, then it should be used by the
+		driver.
+
+config SAMA5_GMAC_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
+
+config SAMA5_GMAC_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
+
+endchoice # Work queue
+
 config SAMA5_GMAC_PHYADDR
 	int "PHY address"
 	default 1
@@ -1499,9 +1519,9 @@ endif # !SAMA5_GMAC_AUTONEG
 config SAMA5_GMAC_REGDEBUG
 	bool "Register-Level Debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_NET_INFO
 	---help---
-		Enable very low-level register access debug.  Depends on DEBUG.
+		Enable very low-level register access debug.  Depends on CONFIG_DEBUG_NET_INFO.
 
 endmenu # GMAC device driver options
 endif # SAMA5_GMAC
@@ -1675,23 +1695,41 @@ config SAMA5_EMACA_NBC
 	---help---
 		Select to disable receipt of broadcast packets.
 
+choice
+	prompt "Work queue"
+	default SAMA5_EMACA_LPWORK if SCHED_LPWORK
+	default SAMA5_EMACA_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the Ethernet driver.  If the
+		low priority work queue is available, then it should be used by the
+		driver.
+
+config SAMA5_EMACA_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
+
+config SAMA5_EMACA_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
+
+endchoice # Work queue
+
 config SAMA5_EMACA_REGDEBUG
 	bool "Register-Level Debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_NET_FEATURES
 	---help---
-		Enable very low-level register access debug.  Depends on DEBUG.
+		Enable very low-level register access debug.  Depends on CONFIG_DEBUG_NET_FEATURES.
 
 endmenu # EMAC device driver options
 endif # SAMA5_EMACA
 
-if SAMA5_EMACB
-
 menu "EMAC device driver options"
-
-if SAMA5_EMAC0
+	depends on SAMA5_EMACB
 
 menu "EMAC0 device driver options"
+	depends on SAMA5_EMAC0
 
 config SAMA5_EMAC0_NRXBUFFERS
 	int "Number of RX buffers"
@@ -1871,11 +1909,9 @@ config SAMA5_EMAC0_PHYSR_FULLDUPLEX
 endif # !SAMA5_EMAC0_PHYSR_ALTCONFIG
 endif # SAMA5_EMAC0_AUTONEG
 endmenu # EMAC0 device driver options
-endif # SAMA5_EMAC0
-
-if SAMA5_EMAC1
 
 menu "EMAC1 device driver options"
+	depends on SAMA5_EMAC1
 
 config SAMA5_EMAC1_NRXBUFFERS
 	int "Number of RX buffers"
@@ -2055,7 +2091,6 @@ config SAMA5_EMAC1_PHYSR_FULLDUPLEX
 endif # !SAMA5_EMAC1_PHYSR_ALTCONFIG
 endif # SAMA5_EMAC1_AUTONEG
 endmenu # EMAC1 device driver options
-endif # SAMA5_EMAC1
 
 # These apply to both EMAC0 and EMAC1
 
@@ -2073,10 +2108,30 @@ config SAMA5_EMACB_NBC
 	---help---
 		Select to disable receipt of broadcast packets.
 
+choice
+	prompt "Work queue"
+	default SAMA5_EMACB_LPWORK if SCHED_LPWORK
+	default SAMA5_EMACB_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the Ethernet driver.  If the
+		low priority work queue is available, then it should be used by the
+		driver.
+
+config SAMA5_EMACB_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
+
+config SAMA5_EMACB_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
+
+endchoice # Work queue
+
 config SAMA5_EMACB_DEBUG
 	bool "Force EMAC0/1 DEBUG"
 	default n
-	depends on DEBUG && !DEBUG_NET
+	depends on DEBUG_FEATURES && !DEBUG_NET
 	---help---
 		This option will force debug output from EMAC driver even without
 		network debug output enabled.  This is not normally something
@@ -2087,12 +2142,11 @@ config SAMA5_EMACB_DEBUG
 config SAMA5_EMACB_REGDEBUG
 	bool "Register-Level Debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_NET_INFO
 	---help---
-		Enable very low-level register access debug.  Depends on DEBUG.
+		Enable very low-level register access debug.  Depends on CONFIG_DEBUG_NET_INFO.
 
 endmenu # EMAC device driver options
-endif # SAMA5_EMACB
 
 if SAMA5_EMACA || SAMA5_EMAC0 || SAMA5_EMAC1 || SAMA5_GMAC
 choice
@@ -2323,11 +2377,11 @@ config SAMA5_CAN_AUTOBAUD
 
 config SAMA5_CAN_REGDEBUG
 	bool "CAN Register level debug"
-	depends on DEBUG
+	depends on DEBUG_CAN_INFO
 	default n
 	---help---
 		Output detailed register-level CAN device debug information.
-		Requires also DEBUG.
+		Requires also CONFIG_DEBUG_CAN_INFO.
 
 endmenu # CAN device driver options
 endif # SAMA5_CAN0 || SAMA5_CAN1
@@ -2354,7 +2408,7 @@ config SAMA5_SPI_DMATHRESHOLD
 
 config SAMA5_SPI_DMADEBUG
 	bool "SPI DMA transfer debug"
-	depends on SAMA5_SPI_DMA && DEBUG && DEBUG_DMA
+	depends on SAMA5_SPI_DMA && DEBUG_FEATURES && DEBUG_DMA
 	default n
 	---help---
 		Enable special debug instrumentation analyze SPI DMA data transfers.
@@ -2364,11 +2418,11 @@ config SAMA5_SPI_DMADEBUG
 
 config SAMA5_SPI_REGDEBUG
 	bool "SPI Register level debug"
-	depends on DEBUG
+	depends on DEBUG_SPI_INFO
 	default n
 	---help---
 		Output detailed register-level SPI device debug information.
-		Requires also DEBUG.
+		Requires also CONFIG_DEBUG_SPI_INFO.
 
 endmenu # SPI device driver options
 endif # SAMA5_SPI0 || SAMA5_SPI1
@@ -2399,11 +2453,11 @@ config SAMA5_TWI3_FREQUENCY
 
 config SAMA5_TWI_REGDEBUG
 	bool "TWI register level debug"
-	depends on DEBUG
+	depends on DEBUG_I2C_INFO
 	default n
 	---help---
 		Output detailed register-level TWI device debug information.
-		Very invasive! Requires also DEBUG.
+		Very invasive! Requires also CONFIG_DEBUG_I2C_INFO.
 
 endmenu # TWI device driver options
 endif # SAMA5_TWI0 || SAMA5_TWI1 || SAMA5_TWI2 || SAMA5_TWI3
@@ -2766,7 +2820,7 @@ endif # SAMA5_SSC1
 
 config SAMA5_SSC_DMADEBUG
 	bool "SSC DMA transfer debug"
-	depends on DEBUG && DEBUG_DMA
+	depends on DEBUG_FEATURES && DEBUG_DMA
 	default n
 	---help---
 		Enable special debug instrumentation analyze SSC DMA data transfers.
@@ -2776,11 +2830,11 @@ config SAMA5_SSC_DMADEBUG
 
 config SAMA5_SSC_REGDEBUG
 	bool "SSC Register level debug"
-	depends on DEBUG
+	depends on DEBUG_I2S_INFO
 	default n
 	---help---
 		Output detailed register-level SSC device debug information.
-		Very invasive! Requires also DEBUG.
+		Very invasive! Requires also CONFIG_DEBUG_I2S_INFO.
 
 config SAMA5_SSC_QDEBUG
 	bool "SSC Queue debug"
@@ -2839,6 +2893,16 @@ endchoice # HSMCI1 XDMAC Selection
 # There is no HSMCI2 on the platforms that support XDMAC
 endif # SAMA5_XDMAC0 || SAMA5_XDMAC1
 
+config SAMA5_HSMCI_DMA
+	bool "Support DMA data transfers"
+	default y
+	select SDIO_DMA
+	---help---
+		Support DMA data transfers.
+		Enable SD card DMA data transfers.  This is marginally optional.
+		For most usages, SD accesses will cause data overruns if used without
+		DMA.
+
 config SAMA5_HSMCI_RDPROOF
 	bool "Read Proof Enable"
 	default n
@@ -2857,7 +2921,7 @@ config SAMA5_HSMCI_WRPROOF
 
 config SAMA5_HSMCI_XFRDEBUG
 	bool "HSMCI transfer debug"
-	depends on DEBUG_FS && DEBUG_VERBOSE
+	depends on DEBUG_FS_INFO
 	default n
 	---help---
 		Enable special debug instrumentation analyze HSMCI data transfers.
@@ -2865,11 +2929,11 @@ config SAMA5_HSMCI_XFRDEBUG
 		registers at key points in the data transfer and then dumps all of
 		the registers at the end of the transfer.  If DEBUG_DMA is also
 		enabled, then DMA register will be collected as well.  Requires also
-		DEBUG_FS and DEBUG_VERBOSE.
+		DEBUG_FS and CONFIG_DEBUG_INFO.
 
 config SAMA5_HSMCI_CMDDEBUG
 	bool "HSMCI command debug"
-	depends on DEBUG_FS && DEBUG_VERBOSE
+	depends on DEBUG_FS_INFO
 	default n
 	---help---
 		Enable special debug instrumentation analyze HSMCI commands. This
@@ -2877,15 +2941,15 @@ config SAMA5_HSMCI_CMDDEBUG
 		key points in the data transfer and then dumps all of the registers
 		at the end of the transfer.  If DEBUG_DMA is also enabled, then DMA
 		register will be collected as well.  Requires also DEBUG_FS and
-		DEBUG_VERBOSE.
+		CONFIG_DEBUG_INFO.
 
 config SAMA5_HSMCI_REGDEBUG
 	bool "HSMCI Register level debug"
-	depends on DEBUG
+	depends on DEBUG_MEMCARD_INFO
 	default n
 	---help---
 		Output detailed register-level HSCMI device debug information.
-		Very invasive! Requires also DEBUG.
+		Very invasive! Requires also CONFIG_DEBUG_MEMCARD_INFO.
 
 endmenu # HSMCI device driver options
 endif # SAMA5_HSMCI0 || SAMA5_HSMCI1 || SAMA5_HSMCI2
@@ -2920,7 +2984,7 @@ config SAMA5_UDPHS_PREALLOCATE
 config SAMA5_UDPHS_REGDEBUG
 	bool "Enable low-level UDPHS register debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_USB_INFO
 
 endmenu # USB High Speed Device Controller driver (DCD) options
 endif # SAMA5_UDPHS
@@ -2960,7 +3024,7 @@ config SAMA5_OHCI_TDBUFSIZE
 config SAMA5_OHCI_REGDEBUG
 	bool "Enable low-level OHCI register debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_USB_INFO
 
 endif # SAMA5_OHCI
 
@@ -3009,7 +3073,7 @@ config SAMA5_EHCI_PREALLOCATE
 config SAMA5_EHCI_REGDEBUG
 	bool "Enable low-level EHCI register debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_USB_INFO
 
 endif # SAMA5_EHCI
 
@@ -3661,7 +3725,7 @@ endif # SAMA5_ADC_HAVE_CHAN
 config SAMA5_ADC_REGDEBUG
 	bool "Enable register-level ADC/touchscreen debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_ANALOG_INFO
 	---help---
 		Enable very low register-level debug output.
 
@@ -3866,7 +3930,6 @@ endif # SAMA5_TC2
 
 config SAMA5_ONESHOT
 	bool "TC one-shot wrapper"
-	depends on SAMA5_FREERUN
 	default n if !SCHED_TICKLESS
 	default y if SCHED_TICKLESS
 	---help---
@@ -3903,23 +3966,23 @@ endif
 
 config SAMA5_TC_DEBUG
 	bool "TC debug"
-	depends on DEBUG
+	depends on DEBUG_FEATURES
 	default n
 	---help---
 		Output high level Timer/Counter device debug information.
-		Requires also DEBUG.  If this option AND DEBUG_VERBOSE are
+		Requires also CONFIG_DEBUG_FEATURES.  If this option AND CONFIG_DEBUG_INFO are
 		enabled, then the system will be overwhelmed the timer debug
-		output.  If DEBUG_VERBOSE is disabled, then debug output will
+		output.  If CONFIG_DEBUG_INFO is disabled, then debug output will
 		only indicate if/when timer-related errors occur.  This
 		latter mode is completely usable.
 
 config SAMA5_TC_REGDEBUG
 	bool "TC register level debug"
-	depends on DEBUG
+	depends on DEBUG_TIMER_INFO
 	default n
 	---help---
 		Output detailed register-level Timer/Counter device debug
-		information. Very invasive! Requires also DEBUG.
+		information. Very invasive! Requires also CONFIG_DEBUG_TIMER_INFO.
 
 endmenu # Timer/counter Configuration
 endif # SAMA5_HAVE_TC
@@ -4150,7 +4213,7 @@ endif # SAMA5_PWM_CHAN3
 config SAMA5_PWM_REGDEBUG
 	bool "Enable register-level PWM debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_PWM_INFO
 	---help---
 		Enable very low register-level debug output.
 
@@ -4171,8 +4234,8 @@ config SAMA5_WDT_INTERRUPT
 
 config SAMA5_WDT_DEBUGHALT
 	bool "Halt on DEBUG"
-	default y if DEBUG
-	default n if !DEBUG
+	default y if DEBUG_FEATURES
+	default n if !DEBUG_FEATURES
 	---help---
 		Halt the watchdog timer in the debug state
 
@@ -4185,7 +4248,7 @@ config SAMA5_WDT_IDLEHALT
 config SAMA5_WDT_REGDEBUG
 	bool "Register level debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_WATCHDOG_INFO
 	---help---
 		Enable low-level register debug output
 
@@ -4688,7 +4751,7 @@ endif # SAMA5_HAVE_PMECC
 
 config SAMA5_NAND_DMADEBUG
 	bool "NAND DMA transfer debug"
-	depends on SAMA5_NAND_DMA && DEBUG && DEBUG_DMA
+	depends on SAMA5_NAND_DMA && DEBUG_FEATURES && DEBUG_DMA
 	default n
 	---help---
 		Enable special debug instrumentation analyze NAND DMA data transfers.
@@ -4699,18 +4762,17 @@ config SAMA5_NAND_DMADEBUG
 config SAMA5_NAND_REGDEBUG
 	bool "Register-Level NAND Debug"
 	default n
-	depends on DEBUG && DEBUG_FS
+	depends on DEBUG_FS_INFO
 	---help---
-		Enable very low-level register access debug.  Depends on DEBUG and
-		DEBUG_FS.
+		Enable very low-level register access debug.  Depends on CONFIG_DEBUG_FS_INFO.
 
 config SAMA5_NAND_DUMP
 	bool "NAND data dump"
 	default n
-	depends on DEBUG && DEBUG_FS
+	depends on DEBUG_FEATURES && DEBUG_FS
 	---help---
 		Dump the contents of all data read and written to FLAH.  Depends on
-		DEBUG and DEBUG_FS.
+		CONFIG_DEBUG_FEATURES and DEBUG_FS.
 
 endif # SAMA5_HAVE_NAND
 endmenu # External Memory Configuration
diff --git a/arch/arm/src/sama5/Make.defs b/arch/arm/src/sama5/Make.defs
index cfe0d0a3deaf21e098f85003c2fa7aec1d0c25ea..716f5581d25d17655f8e012cef89f81a459aa451 100644
--- a/arch/arm/src/sama5/Make.defs
+++ b/arch/arm/src/sama5/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # arch/arm/sama5/Make.defs
 #
-#   Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2013-2014, 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -61,10 +61,6 @@ CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S cp15_invalidate_dcache_all.
 
 # Configuration dependent assembly language files
 
-ifeq ($(CONFIG_ARCH_MEMCPY),y)
-CMN_ASRCS += arm_memcpy.S
-endif
-
 # Common C source files
 
 CMN_CSRCS  = up_initialize.c up_idle.c up_interruptcontext.c up_exit.c
@@ -114,9 +110,9 @@ endif
 endif
 
 ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += arm_elf.c arm_coherent_dcache.c
+CMN_CSRCS += arm_coherent_dcache.c
 else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += arm_elf.c arm_coherent_dcache.c
+CMN_CSRCS += arm_coherent_dcache.c
 endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)
@@ -292,7 +288,7 @@ endif
 ifeq ($(CONFIG_SAMA5_HAVE_TC),y)
 CHIP_CSRCS += sam_tc.c
 ifeq ($(CONFIG_SAMA5_ONESHOT),y)
-CHIP_CSRCS += sam_oneshot.c
+CHIP_CSRCS += sam_oneshot.c sam_oneshot_lowerhalf.c
 endif
 ifeq ($(CONFIG_SAMA5_FREERUN),y)
 CHIP_CSRCS += sam_freerun.c
diff --git a/arch/arm/src/sama5/chip/sam_pwm.h b/arch/arm/src/sama5/chip/sam_pwm.h
index aa5ca2ed0ff70f6cb327b825cea9d9f6804c85dc..8aef808f2934904036211211b853d889e317eafc 100644
--- a/arch/arm/src/sama5/chip/sam_pwm.h
+++ b/arch/arm/src/sama5/chip/sam_pwm.h
@@ -286,6 +286,7 @@
 #  define PWM_CLK_DIVA(n)          ((uint32_t)(n) << PWM_CLK_DIVA_SHIFT) /* CLKA clock = clock selected by PREA / DIVA */
 #define PWM_CLK_PREA_SHIFT         (8)       /* Bits 8-11: CLKA Source Clock Selection */
 #define PWM_CLK_PREA_MASK          (15 << PWM_CLK_PREA_SHIFT)
+#  define PWM_CLK_PREA_DIV(n)      ((uint32_t)(n) << PWM_CLK_PREA_SHIFT)
 #  define PWM_CLK_PREA_DIV1        (0 << PWM_CLK_PREA_SHIFT)  /* MCK */
 #  define PWM_CLK_PREA_DIV2        (1 << PWM_CLK_PREA_SHIFT)  /* MCK/2 */
 #  define PWM_CLK_PREA_DIV4        (2 << PWM_CLK_PREA_SHIFT)  /* MCK/4 */
@@ -298,11 +299,13 @@
 #  define PWM_CLK_PREA_DIV512      (9 << PWM_CLK_PREA_SHIFT)  /* MCK/512 */
 #  define PWM_CLK_PREA_DIV1024     (10 << PWM_CLK_PREA_SHIFT) /* MCK/1024 */
 #define PWM_CLK_DIVB_SHIFT         (16)      /* Bits 16-23: CLKB Divide Factor */
+#define PWM_CLK_DIVB_MASK          (0xff << PWM_CLK_DIVB_SHIFT)
 #  define PWM_CLK_DIVB_OFF         (0 << PWM_CLK_DIVB_SHIFT)             /* CLKB clock = off */
 #  define PWM_CLK_DIVB_PREB        (1 << PWM_CLK_DIVB_SHIFT)             /* CLKB clock = clock selected by PREB  */
 #  define PWM_CLK_DIVB(n)          ((uint32_t)(n) << PWM_CLK_DIVB_SHIFT) /* CLKB clock = clock selected by PREB / DIVB */
 #define PWM_CLK_PREB_SHIFT         (24)      /* Bits 24-27: CLKB Source Clock Selection */
 #define PWM_CLK_PREB_MASK          (15 << PWM_CLK_PREB_SHIFT)
+#  define PWM_CLK_PREB_DIV(n)      ((uint32_t)(n) << PWM_CLK_PREB_SHIFT)
 #  define PWM_CLK_PREB_DIV1        (0 << PWM_CLK_PREB_SHIFT)  /* MCK */
 #  define PWM_CLK_PREB_DIV2        (1 << PWM_CLK_PREB_SHIFT)  /* MCK/2 */
 #  define PWM_CLK_PREB_DIV4        (2 << PWM_CLK_PREB_SHIFT)  /* MCK/4 */
diff --git a/arch/arm/src/sama5/sam_adc.c b/arch/arm/src/sama5/sam_adc.c
index 68565bc502fa80f0f5a5fc69253aac04151b7789..2f9e4ee406efe1bbdbc1bdf5e9db0319dfa74c3d 100644
--- a/arch/arm/src/sama5/sam_adc.c
+++ b/arch/arm/src/sama5/sam_adc.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * arch/arm/src/sama5/sam_adc.c
  *
- *   Copyright (C) 2013, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * References:
@@ -65,6 +65,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "up_internal.h"
 #include "up_arch.h"
@@ -371,6 +372,10 @@
 
 #define SAMA5_ADC_SAMPLES (CONFIG_SAMA5_ADC_DMASAMPLES * SAMA5_NCHANNELS)
 
+#ifndef CONFIG_DEBUG_ANALOG_INFO
+#  undef CONFIG_SAMA5_ADC_REGDEBUG
+#endif
+
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -423,7 +428,7 @@ struct sam_adc_s
  ****************************************************************************/
 /* Register operations ******************************************************/
 
-#if defined(CONFIG_SAMA5_ADC_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAMA5_ADC_REGDEBUG
 static bool sam_adc_checkreg(struct sam_adc_s *priv, bool wr,
                              uint32_t regval, uintptr_t address);
 #endif
@@ -443,7 +448,7 @@ static void sam_adc_dmastart(struct sam_adc_s *priv);
 
 static void sam_adc_endconversion(void *arg);
 #endif
-static int  sam_adc_interrupt(int irq, void *context);
+static int  sam_adc_interrupt(int irq, void *context, FAR void *arg);
 
 /* ADC methods */
 
@@ -544,7 +549,7 @@ static bool sam_adc_checkreg(struct sam_adc_s *priv, bool wr,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", priv->ntimes);
+          ainfo("...[Repeats %d times]...\n", priv->ntimes);
         }
 
       /* Save information about the new access */
@@ -604,7 +609,7 @@ static void sam_adc_dmadone(void *arg)
   int chan;
   int i;
 
-  avdbg("ready=%d enabled=%d\n", priv->enabled, priv->ready);
+  ainfo("ready=%d enabled=%d\n", priv->enabled, priv->ready);
   ASSERT(priv != NULL && !priv->ready);
 
   /* If the DMA transfer is not enabled, just ignore the data (and do not start
@@ -725,7 +730,7 @@ static void sam_adc_dmacallback(DMA_HANDLE handle, void *arg, int result)
   struct sam_adc_s *priv = (struct sam_adc_s *)arg;
   int ret;
 
-  allvdbg("ready=%d enabled=%d\n", priv->enabled, priv->ready);
+  ainfo("ready=%d enabled=%d\n", priv->enabled, priv->ready);
   DEBUGASSERT(priv->ready);
 
   /* Check of the bottom half is keeping up with us.
@@ -751,7 +756,7 @@ static void sam_adc_dmacallback(DMA_HANDLE handle, void *arg, int result)
       ret = work_queue(HPWORK, &priv->work, sam_adc_dmadone, priv, 0);
       if (ret != 0)
         {
-          alldbg("ERROR: Failed to queue work: %d\n", ret);
+          aerr("ERROR: Failed to queue work: %d\n", ret);
         }
     }
 
@@ -798,7 +803,7 @@ static int sam_adc_dmasetup(FAR struct sam_adc_s *priv, FAR uint8_t *buffer,
   uint32_t paddr;
   uint32_t maddr;
 
-  avdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+  ainfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
   DEBUGASSERT(priv != NULL && buffer != NULL && buflen > 0);
   DEBUGASSERT(((uint32_t)buffer & 3) == 0);
 
@@ -849,7 +854,7 @@ static void sam_adc_endconversion(void *arg)
   int chan;
 
   ASSERT(priv != NULL);
-  avdbg("pending=%08x\n", priv->pending);
+  ainfo("pending=%08x\n", priv->pending);
 
   /* Get the set of unmasked, pending ADC interrupts */
 
@@ -902,7 +907,7 @@ static void sam_adc_endconversion(void *arg)
  *
  ****************************************************************************/
 
-static int sam_adc_interrupt(int irq, void *context)
+static int sam_adc_interrupt(int irq, void *context, FAR void *arg)
 {
   struct sam_adc_s *priv = &g_adcpriv;
   uint32_t isr;
@@ -957,7 +962,7 @@ static int sam_adc_interrupt(int irq, void *context)
       ret = work_queue(HPWORK, &priv->work, sam_adc_endconversion, priv, 0);
       if (ret != 0)
         {
-          alldbg("ERROR: Failed to queue work: %d\n", ret);
+          aerr("ERROR: Failed to queue work: %d\n", ret);
         }
 
       pending &= ~ADC_INT_EOCALL;
@@ -1011,7 +1016,7 @@ static void sam_adc_reset(struct adc_dev_s *dev)
 #endif
   uint32_t regval;
 
-  avdbg("Resetting..\n");
+  ainfo("Resetting..\n");
 
   /* NOTE: We can't really reset the ADC hardware without losing the
    * touchscreen configuration.
@@ -1081,7 +1086,7 @@ static int sam_adc_setup(struct adc_dev_s *dev)
   struct sam_adc_s *priv = (struct sam_adc_s *)dev->ad_priv;
   uint32_t regval;
 
-  avdbg("Setup\n");
+  ainfo("Setup\n");
 
   /* Enable channel number tag.  This bit will force the channel number (CHNB)
    * to be included in the LDCR register content.
@@ -1152,7 +1157,7 @@ static void sam_adc_shutdown(struct adc_dev_s *dev)
   struct sam_adc_s *priv = (struct sam_adc_s *)dev->ad_priv;
 #endif
 
-  avdbg("Shutdown\n");
+  ainfo("Shutdown\n");
 
   /* Reset the ADC peripheral */
 
@@ -1181,7 +1186,7 @@ static void sam_adc_rxint(struct adc_dev_s *dev, bool enable)
   struct sam_adc_s *priv = (struct sam_adc_s *)dev->ad_priv;
 #endif
 
-  avdbg("enable=%d\n", enable);
+  ainfo("enable=%d\n", enable);
 
 #ifdef CONFIG_SAMA5_ADC_DMA
   /* Ignore redundant requests */
@@ -1232,7 +1237,7 @@ static int sam_adc_ioctl(struct adc_dev_s *dev, int cmd, unsigned long arg)
 #endif
   int ret = OK;
 
-  avdbg("cmd=%d arg=%ld\n", cmd, arg);
+  ainfo("cmd=%d arg=%ld\n", cmd, arg);
 
   switch (cmd)
     {
@@ -1277,7 +1282,7 @@ static int sam_adc_settimer(struct sam_adc_s *priv, uint32_t frequency,
   uint32_t regval;
   int ret;
 
-  avdbg("frequency=%ld channel=%d\n", (long)frequency, channel);
+  ainfo("frequency=%ld channel=%d\n", (long)frequency, channel);
   DEBUGASSERT(priv && frequency > 0);
 
   /* Configure TC for a 1Hz frequency and trigger on RC compare. */
@@ -1285,7 +1290,7 @@ static int sam_adc_settimer(struct sam_adc_s *priv, uint32_t frequency,
   ret = sam_tc_divisor(frequency, &div, &tcclks);
   if (ret < 0)
     {
-      adbg("ERROR: sam_tc_divisor failed: %d\n", ret);
+      aerr("ERROR: sam_tc_divisor failed: %d\n", ret);
       return ret;
     }
 
@@ -1304,7 +1309,7 @@ static int sam_adc_settimer(struct sam_adc_s *priv, uint32_t frequency,
   priv->tc = sam_tc_allocate(channel, mode);
   if (!priv->tc)
     {
-      adbg("ERROR: Failed to allocate channel %d mode %08x\n", channel, mode);
+      aerr("ERROR: Failed to allocate channel %d mode %08x\n", channel, mode);
       return -EINVAL;
     }
 
@@ -1350,7 +1355,7 @@ static void sam_adc_freetimer(struct sam_adc_s *priv)
 {
   /* Is a timer allocated? */
 
-  avdbg("tc=%p\n", priv->tc);
+  ainfo("tc=%p\n", priv->tc);
 
   if (priv->tc)
     {
@@ -1377,7 +1382,7 @@ static int sam_adc_trigger(struct sam_adc_s *priv)
   int ret = OK;
 
 #if defined(CONFIG_SAMA5_ADC_SWTRIG)
-  avdbg("Setup software trigger\n");
+  ainfo("Setup software trigger\n");
 
   /* Configure the software trigger */
 
@@ -1393,7 +1398,7 @@ static int sam_adc_trigger(struct sam_adc_s *priv)
   sam_adc_putreg(priv, SAM_ADC_TRGR, regval);
 
 #elif defined(CONFIG_SAMA5_ADC_ADTRG)
-  avdbg("Setup ADTRG trigger\n");
+  ainfo("Setup ADTRG trigger\n");
 
   /* Configure the trigger via the external ADTRG signal */
 
@@ -1420,7 +1425,7 @@ static int sam_adc_trigger(struct sam_adc_s *priv)
   sam_adc_putreg(priv, SAM_ADC_TRGR, regval);
 
 #elif defined(CONFIG_SAMA5_ADC_TIOATRIG)
-  avdbg("Setup timer/counter trigger\n");
+  ainfo("Setup timer/counter trigger\n");
 
   /* Start the timer */
 
@@ -1436,7 +1441,7 @@ static int sam_adc_trigger(struct sam_adc_s *priv)
 #endif
   if (ret < 0)
     {
-      adbg("ERROR: sam_adc_settimer failed: %d\n", ret);
+      aerr("ERROR: sam_adc_settimer failed: %d\n", ret);
       return ret;
     }
 
@@ -1500,7 +1505,7 @@ static void sam_adc_autocalibrate(struct sam_adc_s *priv)
 #ifdef CONFIG_SAMA5_ADC_AUTOCALIB
   uint32_t regval;
 
-  avdbg("Entry\n");
+  ainfo("Entry\n");
 
   /* Launch an automatic calibration of the ADC cell on next sequence */
 
@@ -1527,7 +1532,7 @@ static void sam_adc_offset(struct sam_adc_s *priv)
 {
   uint32_t regval = 0;
 
-  avdbg("Entry\n");
+  ainfo("Entry\n");
 
 #ifdef CONFIG_SAMA5_ADC_ANARCH
   /* Set the offset for each enabled channel.  This centers the analog signal
@@ -1644,7 +1649,7 @@ static void sam_adc_gain(struct sam_adc_s *priv)
 #ifdef CONFIG_SAMA5_ADC_ANARCH
   uint32_t regval;
 
-  avdbg("Entry\n");
+  ainfo("Entry\n");
 
   /* Set the gain for each enabled channel */
 
@@ -1690,7 +1695,7 @@ static void sam_adc_gain(struct sam_adc_s *priv)
   sam_adc_putreg(priv, SAM_ADC_CGR, regval);
 
 #else
-  avdbg("Gain=%d\n", CONFIG_SAMA5_ADC_GAIN);
+  ainfo("Gain=%d\n", CONFIG_SAMA5_ADC_GAIN);
 
   /* Set GAIN0 only.  GAIN0 will be used for all channels. */
 
@@ -1711,7 +1716,7 @@ static void sam_adc_analogchange(struct sam_adc_s *priv)
 {
   uint32_t regval;
 
-  avdbg("Entry\n");
+  ainfo("Entry\n");
 
   /* Enable/disable the analog change feature */
 
@@ -1754,7 +1759,7 @@ static void sam_adc_setseqr(int chan, uint32_t *seqr1, uint32_t *seqr2, int seq)
       *seqr1 |= ADC_SEQR1_USCH(seq, chan);
     }
 
-  avdbg("chan=%d seqr1=%08x seqr2=%08x seq=%d\n", chan, *seqr1, *seqr2, seq);
+  ainfo("chan=%d seqr1=%08x seqr2=%08x seq=%d\n", chan, *seqr1, *seqr2, seq);
 }
 #endif
 
@@ -1766,7 +1771,7 @@ static void sam_adc_sequencer(struct sam_adc_s *priv)
   uint32_t seqr2;
   int seq;
 
-  avdbg("Setup sequencer\n");
+  ainfo("Setup sequencer\n");
 
   /* Set user configured channel sequence */
 
@@ -1855,7 +1860,7 @@ static void sam_adc_sequencer(struct sam_adc_s *priv)
 #else
   uint32_t regval;
 
-  avdbg("Disable sequencer\n");
+  ainfo("Disable sequencer\n");
 
   /* Disable the sequencer */
 
@@ -1878,7 +1883,7 @@ static void sam_adc_channels(struct sam_adc_s *priv)
 {
   uint32_t regval;
 
-  avdbg("Entry\n");
+  ainfo("Entry\n");
 
   /* Enable channels. */
 
@@ -1964,7 +1969,7 @@ struct adc_dev_s *sam_adc_initialize(void)
 
   if (!priv->initialized)
     {
-      avdbg("Initializing...\n");
+      ainfo("Initializing...\n");
 
       /* Disable ADC peripheral clock */
 
@@ -2056,7 +2061,7 @@ struct adc_dev_s *sam_adc_initialize(void)
         }
       else
         {
-          adbg("ERROR: Cannot realize ADC input frequency\n");
+          aerr("ERROR: Cannot realize ADC input frequency\n");
           return NULL;
         }
 
@@ -2105,10 +2110,10 @@ struct adc_dev_s *sam_adc_initialize(void)
 
       /* Attach the ADC interrupt */
 
-      ret = irq_attach(SAM_IRQ_ADC, sam_adc_interrupt);
+      ret = irq_attach(SAM_IRQ_ADC, sam_adc_interrupt, NULL);
       if (ret < 0)
         {
-          adbg("ERROR: Failed to attach IRQ %d: %d\n", SAM_IRQ_ADC, ret);
+          aerr("ERROR: Failed to attach IRQ %d: %d\n", SAM_IRQ_ADC, ret);
           return NULL;
         }
 
@@ -2127,7 +2132,7 @@ struct adc_dev_s *sam_adc_initialize(void)
 
   /* Return a pointer to the device structure */
 
-  avdbg("Returning %p\n", &g_adcdev);
+  ainfo("Returning %p\n", &g_adcdev);
   return &g_adcdev;
 }
 
@@ -2143,7 +2148,7 @@ void sam_adc_lock(FAR struct sam_adc_s *priv)
 {
   int ret;
 
-  avdbg("Locking\n");
+  ainfo("Locking\n");
 
   do
     {
@@ -2168,7 +2173,7 @@ void sam_adc_lock(FAR struct sam_adc_s *priv)
 
 void sam_adc_unlock(FAR struct sam_adc_s *priv)
 {
-  avdbg("Unlocking\n");
+  ainfo("Unlocking\n");
   sem_post(&priv->exclsem);
 }
 
@@ -2187,7 +2192,7 @@ uint32_t sam_adc_getreg(struct sam_adc_s *priv, uintptr_t address)
 
   if (sam_adc_checkreg(priv, false, regval, address))
     {
-      lldbg("%08x->%08x\n", address, regval);
+      ainfo("%08x->%08x\n", address, regval);
     }
 
   return regval;
@@ -2207,7 +2212,7 @@ void sam_adc_putreg(struct sam_adc_s *priv, uintptr_t address, uint32_t regval)
 {
   if (sam_adc_checkreg(priv, true, regval, address))
     {
-      lldbg("%08x<-%08x\n", address, regval);
+      ainfo("%08x<-%08x\n", address, regval);
     }
 
   putreg32(regval, address);
diff --git a/arch/arm/src/sama5/sam_adc.h b/arch/arm/src/sama5/sam_adc.h
index f8ba29f157636ed0913b530aca1cf3c069bd6d32..f84a45a65d027e675a4b59417c1d83d04c090b51 100644
--- a/arch/arm/src/sama5/sam_adc.h
+++ b/arch/arm/src/sama5/sam_adc.h
@@ -57,7 +57,7 @@
 #  error Work queue support is required (CONFIG_SCHED_WORKQUEUE)
 #endif
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
 #  undef CONFIG_SAMA5_ADC_REGDEBUG
 #endif
 
diff --git a/arch/arm/src/sama5/sam_allocateheap.c b/arch/arm/src/sama5/sam_allocateheap.c
index 14388795f984bcd3b72bd4b7835ea6da662b7411..29dcf728f6f6ee0084b9911c3afe81211720e33e 100644
--- a/arch/arm/src/sama5/sam_allocateheap.c
+++ b/arch/arm/src/sama5/sam_allocateheap.c
@@ -312,9 +312,9 @@ void up_addregion(void)
     }
   else
     {
-      lldbg("ERROR: SDRAM memory not added to heap.  CONFIG_MM_NREGIONS=%d\n",
-            CONFIG_MM_REGIONS);
-      lldbg("       Increase the size of CONFIG_MM_NREGIONS\n");
+      serr("ERROR: SDRAM memory not added to heap.  CONFIG_MM_NREGIONS=%d\n",
+           CONFIG_MM_REGIONS);
+      serr("       Increase the size of CONFIG_MM_NREGIONS\n");
     }
 #endif
 
@@ -331,9 +331,9 @@ void up_addregion(void)
     }
   else
     {
-      lldbg("ERROR: CS0 memory not added to heap.  CONFIG_MM_NREGIONS=%d\n",
-            CONFIG_MM_REGIONS);
-      lldbg("       Increase the size of CONFIG_MM_NREGIONS\n");
+      serr("ERROR: CS0 memory not added to heap.  CONFIG_MM_NREGIONS=%d\n",
+           CONFIG_MM_REGIONS);
+      serr("       Increase the size of CONFIG_MM_NREGIONS\n");
     }
 #endif
 
@@ -350,9 +350,9 @@ void up_addregion(void)
     }
   else
     {
-      lldbg("ERROR: CS1 memory not added to heap.  CONFIG_MM_NREGIONS=%d\n",
-            CONFIG_MM_REGIONS);
-      lldbg("       Increase the size of CONFIG_MM_NREGIONS\n");
+      serr("ERROR: CS1 memory not added to heap.  CONFIG_MM_NREGIONS=%d\n",
+           CONFIG_MM_REGIONS);
+      serr("       Increase the size of CONFIG_MM_NREGIONS\n");
     }
 #endif
 
@@ -369,9 +369,9 @@ void up_addregion(void)
     }
   else
     {
-      lldbg("ERROR: CS2 memory not added to heap.  CONFIG_MM_NREGIONS=%d\n",
-            CONFIG_MM_REGIONS);
-      lldbg("       Increase the size of CONFIG_MM_NREGIONS\n");
+      serr("ERROR: CS2 memory not added to heap.  CONFIG_MM_NREGIONS=%d\n",
+           CONFIG_MM_REGIONS);
+      serr("       Increase the size of CONFIG_MM_NREGIONS\n");
     }
 #endif
 
@@ -388,9 +388,9 @@ void up_addregion(void)
     }
   else
     {
-      lldbg("ERROR: CS3 memory not added to heap.  CONFIG_MM_NREGIONS=%d\n",
-            CONFIG_MM_REGIONS);
-      lldbg("       Increase the size of CONFIG_MM_NREGIONS\n");
+      serr("ERROR: CS3 memory not added to heap.  CONFIG_MM_NREGIONS=%d\n",
+           CONFIG_MM_REGIONS);
+      serr("       Increase the size of CONFIG_MM_NREGIONS\n");
     }
 #endif
 
@@ -398,9 +398,9 @@ void up_addregion(void)
 
   if (nregions > 0)
     {
-      lldbg("ERROR: Not all regions added to heap: %d added, but CONFIG_MM_NREGIONS=%d\n",
-            CONFIG_MM_REGIONS - nregions, CONFIG_MM_REGIONS);
-      lldbg("       Decrease the size of CONFIG_MM_NREGIONS\n");
+      serr("ERROR: Not all regions added to heap: %d added, but CONFIG_MM_NREGIONS=%d\n",
+           CONFIG_MM_REGIONS - nregions, CONFIG_MM_REGIONS);
+      serr("       Decrease the size of CONFIG_MM_NREGIONS\n");
     }
 }
 #endif
diff --git a/arch/arm/src/sama5/sam_can.c b/arch/arm/src/sama5/sam_can.c
index ac9e93cc08a6e2474498c12ed062702e89892e1c..4020055e89a5f1c5609f27fd6215bdb2b0f1e40f 100644
--- a/arch/arm/src/sama5/sam_can.c
+++ b/arch/arm/src/sama5/sam_can.c
@@ -60,7 +60,7 @@
 
 #include 
 #include 
-#include 
+#include 
 
 #include "up_internal.h"
 #include "up_arch.h"
@@ -123,22 +123,7 @@
 #define CAN_DEBUG_INTS (CAN_INT_ERRA | CAN_INT_WARN | CAN_INT_CERR | \
                         CAN_INT_SERR | CAN_INT_FERR | CAN_INT_BERR)
 
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
-
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
-#else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
-#endif
-
-#if !defined(CONFIG_DEBUG) || !defined(CONFIG_DEBUG_CAN)
+#ifndef CONFIG_DEBUG_CAN_INFO
 #  undef CONFIG_SAMA5_CAN_REGDEBUG
 #endif
 
@@ -165,7 +150,6 @@ struct sam_config_s
   uint8_t port;             /* CAN port number (1 or 2) */
   uint8_t pid;              /* CAN periperal ID/IRQ number */
   uint8_t nrecvmb;          /* Number of receive mailboxes */
-  xcpt_t handler;           /* CAN interrupt handler */
   uintptr_t base;           /* Base address of the CAN control registers */
   uint32_t baud;            /* Configured baud */
   pio_pinset_t rxpinset;    /* RX pin configuration */
@@ -240,13 +224,7 @@ static inline void can_rxinterrupt(FAR struct can_dev_s *dev, int mbndx,
                                    uint32_t msr);
 static inline void can_txinterrupt(FAR struct can_dev_s *dev, int mbndx);
 static inline void can_mbinterrupt(FAR struct can_dev_s *dev, int mbndx);
-static void can_interrupt(FAR struct can_dev_s *dev);
-#ifdef CONFIG_SAMA5_CAN0
-static int  can0_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_SAMA5_CAN1
-static int  can1_interrupt(int irq, void *context);
-#endif
+static void can_interrupt(int irq, void *context, FAR void *arg);
 
 /* Hardware initialization */
 
@@ -280,7 +258,6 @@ static const struct sam_config_s g_can0const =
   .port             = 0,
   .pid              = SAM_PID_CAN0,
   .nrecvmb          = CONFIG_SAMA5_CAN0_NRECVMB,
-  .handler          = can0_interrupt,
   .base             = SAM_CAN0_VBASE,
   .baud             = CONFIG_SAMA5_CAN0_BAUD,
   .rxpinset         = PIO_CAN0_RX,
@@ -316,7 +293,6 @@ static const struct sam_config_s g_can1const =
   .port             = 1,
   .pid              = SAM_PID_CAN1,
   .nrecvmb          = CONFIG_SAMA5_CAN1_NRECVMB,
-  .handler          = can1_interrupt,
   .base             = SAM_CAN1_VBASE,
   .baud             = CONFIG_SAMA5_CAN1_BAUD,
   .rxpinset         = PIO_CAN1_RX,
@@ -386,7 +362,7 @@ static uint32_t can_getreg(FAR struct sam_can_s *priv, int offset)
         {
           if (priv->count == 4)
             {
-              lldbg("...\n");
+              caninfo("...\n");
             }
 
           return regval;
@@ -403,7 +379,7 @@ static uint32_t can_getreg(FAR struct sam_can_s *priv, int offset)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", priv->count - 3);
+          caninfo("[repeats %d more times]\n", priv->count - 3);
         }
 
       /* Save the new address, value, and count */
@@ -415,7 +391,7 @@ static uint32_t can_getreg(FAR struct sam_can_s *priv, int offset)
 
   /* Show the register value read */
 
-  lldbg("%08x->%08x\n", regaddr, regval);
+  caninfo("%08x->%08x\n", regaddr, regval);
   return regval;
 }
 
@@ -452,7 +428,7 @@ static void can_putreg(FAR struct sam_can_s *priv, int offset, uint32_t regval)
 
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", regaddr, regval);
+  caninfo("%08x<-%08x\n", regaddr, regval);
 
   /* Write the value */
 
@@ -489,29 +465,29 @@ static void can_dumpctrlregs(FAR struct sam_can_s *priv, FAR const char *msg)
 
   if (msg)
     {
-      canlldbg("Control Registers: %s\n", msg);
+      caninfo("Control Registers: %s\n", msg);
     }
   else
     {
-      canlldbg("Control Registers:\n");
+      caninfo("Control Registers:\n");
     }
 
   /* CAN control and status registers */
 
-  lldbg("   MR: %08x      IMR: %08x      SR: %08x\n",
-        getreg32(config->base + SAM_CAN_MR_OFFSET),
-        getreg32(config->base + SAM_CAN_IMR_OFFSET),
-        getreg32(config->base + SAM_CAN_SR_OFFSET));
+  caninfo("   MR: %08x      IMR: %08x      SR: %08x\n",
+          getreg32(config->base + SAM_CAN_MR_OFFSET),
+          getreg32(config->base + SAM_CAN_IMR_OFFSET),
+          getreg32(config->base + SAM_CAN_SR_OFFSET));
 
-  lldbg("   BR: %08x      TIM: %08x TIMESTP: %08x\n",
-        getreg32(config->base + SAM_CAN_BR_OFFSET),
-        getreg32(config->base + SAM_CAN_TIM_OFFSET),
-        getreg32(config->base + SAM_CAN_TIMESTP_OFFSET));
+  caninfo("   BR: %08x      TIM: %08x TIMESTP: %08x\n",
+          getreg32(config->base + SAM_CAN_BR_OFFSET),
+          getreg32(config->base + SAM_CAN_TIM_OFFSET),
+          getreg32(config->base + SAM_CAN_TIMESTP_OFFSET));
 
-  lldbg("  ECR: %08x     WPMR: %08x    WPSR: %08x\n",
-        getreg32(config->base + SAM_CAN_ECR_OFFSET),
-        getreg32(config->base + SAM_CAN_TCR_OFFSET),
-        getreg32(config->base + SAM_CAN_ACR_OFFSET));
+  caninfo("  ECR: %08x     WPMR: %08x    WPSR: %08x\n",
+          getreg32(config->base + SAM_CAN_ECR_OFFSET),
+          getreg32(config->base + SAM_CAN_TCR_OFFSET),
+          getreg32(config->base + SAM_CAN_ACR_OFFSET));
 }
 #endif
 
@@ -538,30 +514,30 @@ static void can_dumpmbregs(FAR struct sam_can_s *priv, FAR const char *msg)
 
   if (msg)
     {
-      canlldbg("Mailbox Registers: %s\n", msg);
+      caninfo("Mailbox Registers: %s\n", msg);
     }
   else
     {
-      canlldbg("Mailbox Registers:\n");
+      caninfo("Mailbox Registers:\n");
     }
 
   for (i = 0; i < SAM_CAN_NMAILBOXES; i++)
     {
       mbbase = config->base + SAM_CAN_MBn_OFFSET(i);
-      lldbg("  MB%d:\n", i);
+      caninfo("  MB%d:\n", i);
 
       /* CAN mailbox registers */
 
-      lldbg("    MMR: %08x MAM: %08x MID: %08x MFID: %08x\n",
-            getreg32(mbbase + SAM_CAN_MMR_OFFSET),
-            getreg32(mbbase + SAM_CAN_MAM_OFFSET),
-            getreg32(mbbase + SAM_CAN_MID_OFFSET),
-            getreg32(mbbase + SAM_CAN_MFID_OFFSET));
+      caninfo("    MMR: %08x MAM: %08x MID: %08x MFID: %08x\n",
+              getreg32(mbbase + SAM_CAN_MMR_OFFSET),
+              getreg32(mbbase + SAM_CAN_MAM_OFFSET),
+              getreg32(mbbase + SAM_CAN_MID_OFFSET),
+              getreg32(mbbase + SAM_CAN_MFID_OFFSET));
 
-      lldbg("    MSR: %08x MDL: %08x MDH: %08x\n",
-            getreg32(mbbase + SAM_CAN_MSR_OFFSET),
-            getreg32(mbbase + SAM_CAN_MDL_OFFSET),
-            getreg32(mbbase + SAM_CAN_MDH_OFFSET));
+      caninfo("    MSR: %08x MDL: %08x MDH: %08x\n",
+              getreg32(mbbase + SAM_CAN_MSR_OFFSET),
+              getreg32(mbbase + SAM_CAN_MDL_OFFSET),
+              getreg32(mbbase + SAM_CAN_MDH_OFFSET));
     }
 }
 #endif
@@ -722,7 +698,7 @@ static int can_recvsetup(FAR struct sam_can_s *priv)
       mbndx = can_mballoc(priv);
       if (mbndx < 0)
         {
-          candbg("ERROR: Failed to allocate mailbox %d: %d\n", mbno, mbndx);
+          canerr("ERROR: Failed to allocate mailbox %d: %d\n", mbno, mbndx);
           return mbndx;
         }
 
@@ -730,7 +706,7 @@ static int can_recvsetup(FAR struct sam_can_s *priv)
 
       priv->rxmbset |= (1 << mbndx);
 
-      canvdbg("CAN%d Mailbox %d: Index=%d rxmbset=%02x\n",
+      caninfo("CAN%d Mailbox %d: Index=%d rxmbset=%02x\n",
               config->port, mbno, mbndx, priv->rxmbset);
 
       /* Set up the message ID and filter mask
@@ -798,7 +774,7 @@ static void can_reset(FAR struct can_dev_s *dev)
   config = priv->config;
   DEBUGASSERT(config);
 
-  canllvdbg("CAN%d\n", config->port);
+  caninfo("CAN%d\n", config->port);
   UNUSED(config);
 
   /* Get exclusive access to the CAN peripheral */
@@ -855,7 +831,7 @@ static int can_setup(FAR struct can_dev_s *dev)
   config = priv->config;
   DEBUGASSERT(config);
 
-  canllvdbg("CAN%d pid: %d\n", config->port, config->pid);
+  caninfo("CAN%d pid: %d\n", config->port, config->pid);
 
   /* Get exclusive access to the CAN peripheral */
 
@@ -866,7 +842,7 @@ static int can_setup(FAR struct can_dev_s *dev)
   ret = can_hwinitialize(priv);
   if (ret < 0)
     {
-      canlldbg("CAN%d H/W initialization failed: %d\n", config->port, ret);
+      canerr("ERROR: CAN%d H/W initialization failed: %d\n", config->port, ret);
       return ret;
     }
 
@@ -875,10 +851,10 @@ static int can_setup(FAR struct can_dev_s *dev)
 
   /* Attach the CAN interrupt handler */
 
-  ret = irq_attach(config->pid, config->handler);
+  ret = irq_attach(config->pid, can_interrupt, dev);
   if (ret < 0)
     {
-      canlldbg("Failed to attach CAN%d IRQ (%d)", config->port, config->pid);
+      canerr("ERROR: Failed to attach CAN%d IRQ (%d)", config->port, config->pid);
       return ret;
     }
 
@@ -887,13 +863,13 @@ static int can_setup(FAR struct can_dev_s *dev)
   ret = can_recvsetup(priv);
   if (ret < 0)
     {
-      canlldbg("CAN%d H/W initialization failed: %d\n", config->port, ret);
+      canerr("ERROR: CAN%d H/W initialization failed: %d\n", config->port, ret);
       return ret;
     }
 
   /* Enable all error interrupts */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   can_putreg(priv, SAM_CAN_IER_OFFSET, CAN_DEBUG_INTS);
 #endif
 
@@ -933,7 +909,7 @@ static void can_shutdown(FAR struct can_dev_s *dev)
   config = priv->config;
   DEBUGASSERT(config);
 
-  canllvdbg("CAN%d\n", config->port);
+  caninfo("CAN%d\n", config->port);
 
   /* Get exclusive access to the CAN peripheral */
 
@@ -972,7 +948,7 @@ static void can_rxint(FAR struct can_dev_s *dev, bool enable)
   FAR struct sam_can_s *priv = dev->cd_priv;
   DEBUGASSERT(priv && priv->config);
 
-  canllvdbg("CAN%d enable: %d\n", priv->config->port, enable);
+  caninfo("CAN%d enable: %d\n", priv->config->port, enable);
 
   /* Enable/disable the mailbox interrupts from all receive mailboxes */
 
@@ -1005,7 +981,7 @@ static void can_txint(FAR struct can_dev_s *dev, bool enable)
   FAR struct sam_can_s *priv = dev->cd_priv;
   DEBUGASSERT(priv && priv->config);
 
-  canllvdbg("CAN%d enable: %d\n", priv->config->port, enable);
+  caninfo("CAN%d enable: %d\n", priv->config->port, enable);
 
   /* Get exclusive access to the CAN peripheral */
 
@@ -1106,9 +1082,9 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
   priv = dev->cd_priv;
   DEBUGASSERT(priv && priv->config);
 
-  canllvdbg("CAN%d\n", priv->config->port);
-  canllvdbg("CAN%d ID: %d DLC: %d\n",
-            priv->config->port, msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc);
+  caninfo("CAN%d\n", priv->config->port);
+  caninfo("CAN%d ID: %d DLC: %d\n",
+          priv->config->port, msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc);
 
   /* Get exclusive access to the CAN peripheral */
 
@@ -1119,14 +1095,14 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
   mbndx = can_mballoc(priv);
   if (mbndx < 0)
     {
-      candbg("ERROR: CAN%d failed to allocate a mailbox: %d\n",
+      canerr("ERROR: CAN%d failed to allocate a mailbox: %d\n",
              priv->config->port, mbndx);
       return mbndx;
     }
 
   priv->txmbset |= (1 << mbndx);
 
-  canvdbg("Mailbox Index=%d txmbset=%02x\n", mbndx, priv->txmbset);
+  caninfo("Mailbox Index=%d txmbset=%02x\n", mbndx, priv->txmbset);
 
   /* Set up the ID and mask, standard 11-bit or extended 29-bit.
    * REVISIT: This logic should be capable of sending standard messages
@@ -1342,7 +1318,7 @@ static inline void can_rxinterrupt(FAR struct can_dev_s *dev, int mbndx,
   ret = can_receive(dev, &hdr, (FAR uint8_t *)md);
   if (ret < 0)
     {
-      canlldbg("ERROR: can_receive failed: %d\n", ret);
+      canerr("ERROR: can_receive failed: %d\n", ret);
     }
 
   /* Set the MTCR flag in the CAN_MCRx register.  This clears the
@@ -1437,9 +1413,9 @@ static inline void can_mbinterrupt(FAR struct can_dev_s *dev, int mbndx)
           case CAN_MMR_MOT_CONSUMER: /* Consumer Mailbox */
           case CAN_MMR_MOT_PRODUCER: /* Producer Mailbox */
           case CAN_MMR_MOT_DISABLED: /* Mailbox is disabled */
-            canlldbg("ERROR: CAN%d MB%d: Unsupported or invalid mailbox type\n",
-                     priv->config->port, mbndx);
-            canlldbg("       MSR: %08x MMR: %08x\n", msr, mmr);
+            canerr("ERROR: CAN%d MB%d: Unsupported or invalid mailbox type\n",
+                   priv->config->port, mbndx);
+            canerr("       MSR: %08x MMR: %08x\n", msr, mmr);
             break;
         }
     }
@@ -1452,21 +1428,24 @@ static inline void can_mbinterrupt(FAR struct can_dev_s *dev, int mbndx)
  *   Common CAN interrupt handler
  *
  * Input Parameters:
- *   priv - CAN-specific private data
+ *   Standard interrupt handler inputs
  *
  * Returned Value:
  *   None
  *
  ****************************************************************************/
 
-static void can_interrupt(FAR struct can_dev_s *dev)
+static void can_interrupt(int irq, void *context, FAR void *arg)
 {
-  FAR struct sam_can_s *priv = dev->cd_priv;
+  FAR struct can_dev_s *dev = (FAR struct can_dev_s *)arg;
+  FAR struct sam_can_s *priv;
   uint32_t sr;
   uint32_t imr;
   uint32_t pending;
 
-  DEBUGASSERT(priv && priv->config);
+  DEBUGASSERT(dev != NULL);
+  FAR struct sam_can_s *priv = dev->cd_priv;
+  DEBUGASSERT(priv != NULL && priv->config != NULL);
 
   /* Get the set of pending interrupts.
    *
@@ -1530,57 +1509,11 @@ static void can_interrupt(FAR struct can_dev_s *dev)
 
   if ((pending & ~CAN_INT_MBALL) != 0)
     {
-      canlldbg("ERROR: CAN%d system interrupt, SR=%08x IMR=%08x\n",
-               priv->config->port, sr, imr);
+      canerr("ERROR: CAN%d system interrupt, SR=%08x IMR=%08x\n",
+             priv->config->port, sr, imr);
     }
 }
 
-/****************************************************************************
- * Name: can0_interrupt
- *
- * Description:
- *   CAN0 interrupt handler
- *
- * Input Parameters:
- *   irq - The IRQ number of the interrupt.
- *   context - The register state save array at the time of the interrupt.
- *
- * Returned Value:
- *   Zero on success; a negated errno on failure
- *
- ****************************************************************************/
-
-#ifdef CONFIG_SAMA5_CAN0
-static int can0_interrupt(int irq, void *context)
-{
-  can_interrupt(&g_can0dev);
-  return OK;
-}
-#endif
-
-/****************************************************************************
- * Name: can0_interrupt
- *
- * Description:
- *   CAN0 interrupt handler
- *
- * Input Parameters:
- *   irq - The IRQ number of the interrupt.
- *   context - The register state save array at the time of the interrupt.
- *
- * Returned Value:
- *   Zero on success; a negated errno on failure
- *
- ****************************************************************************/
-
-#ifdef CONFIG_SAMA5_CAN1
-static int can1_interrupt(int irq, void *context)
-{
-  can_interrupt(&g_can1dev);
-  return OK;
-}
-#endif
-
 /****************************************************************************
  * Name: can_bittiming
  *
@@ -1708,7 +1641,7 @@ static int can_bittiming(struct sam_can_s *priv)
     {
       /* The BRP field must be within the range 1 - 0x7f */
 
-      candbg("CAN%d: baud %d too high\n", config->port, config->baud);
+      canerr("CAN%d ERROR: baud %d too high\n", config->port, config->baud);
       return -EINVAL;
     }
 
@@ -1756,7 +1689,7 @@ static int can_bittiming(struct sam_can_s *priv)
 
   if ((propag + phase1 + phase2) != (uint32_t)(tq - 4))
     {
-      candbg("CAN%d: Could not realize baud %d\n", config->port, config->baud);
+      canerr("CAN%d ERROR: Could not realize baud %d\n", config->port, config->baud);
       return -EINVAL;
     }
 
@@ -1788,7 +1721,7 @@ static int can_autobaud(struct sam_can_s *priv)
   uint32_t regval;
   int ret;
 
-  canllvdbg("CAN%d\n", config->port);
+  caninfo("CAN%d\n", config->port);
 
   /* The CAN controller can start listening to the network in Autobaud Mode.
    * In this case, the error counters are locked and a mailbox may be
@@ -1858,7 +1791,7 @@ static int can_hwinitialize(struct sam_can_s *priv)
   uint32_t mck;
   int ret;
 
-  canllvdbg("CAN%d\n", config->port);
+  caninfo("CAN%d\n", config->port);
 
   /* Configure CAN pins */
 
@@ -1890,7 +1823,7 @@ static int can_hwinitialize(struct sam_can_s *priv)
     }
   else
     {
-      candbg("ERROR: Cannot realize CAN input frequency\n");
+      canerr("ERROR: Cannot realize CAN input frequency\n");
       return -EINVAL;
     }
 
@@ -1912,7 +1845,7 @@ static int can_hwinitialize(struct sam_can_s *priv)
   ret = can_bittiming(priv);
   if (ret < 0)
     {
-      candbg("ERROR: Failed to set bit timing: %d\n", ret);
+      canerr("ERROR: Failed to set bit timing: %d\n", ret);
       return ret;
     }
 
@@ -1922,7 +1855,7 @@ static int can_hwinitialize(struct sam_can_s *priv)
   ret = can_autobaud(priv);
   if (ret < 0)
     {
-      candbg("ERROR: can_autobaud failed: %d\n", ret);
+      canerr("ERROR: can_autobaud failed: %d\n", ret);
       return ret;
     }
 #endif
@@ -1970,7 +1903,7 @@ FAR struct can_dev_s *sam_caninitialize(int port)
   FAR struct sam_can_s *priv;
   FAR const struct sam_config_s *config;
 
-  canvdbg("CAN%d\n", port);
+  caninfo("CAN%d\n", port);
 
   /* NOTE:  Peripherical clocking for CAN0 and/or CAN1 was already provided
    * by sam_clockconfig() early in the reset sequence.
@@ -1999,7 +1932,7 @@ FAR struct can_dev_s *sam_caninitialize(int port)
   else
 #endif
     {
-      candbg("ERROR: Unsupported port %d\n", port);
+      canerr("ERROR: Unsupported port %d\n", port);
       return NULL;
     }
 
diff --git a/arch/arm/src/sama5/sam_can.h b/arch/arm/src/sama5/sam_can.h
index c18361533f28bfeb54112d83bcc786395f8c00b2..5a26fe83143cd6fa19b78377cf23b1c165253cf4 100644
--- a/arch/arm/src/sama5/sam_can.h
+++ b/arch/arm/src/sama5/sam_can.h
@@ -45,7 +45,7 @@
 #include "chip.h"
 #include "chip/sam_can.h"
 
-#include 
+#include 
 
 #if defined(CONFIG_CAN) && (defined(CONFIG_SAMA5_CAN0) || defined(CONFIG_SAMA5_CAN1))
 
diff --git a/arch/arm/src/sama5/sam_dbgu.c b/arch/arm/src/sama5/sam_dbgu.c
index 877e1db82dce5213477c9586ff01442147245b35..65242b88188d1df2962fcad90868565203ae3cf5 100644
--- a/arch/arm/src/sama5/sam_dbgu.c
+++ b/arch/arm/src/sama5/sam_dbgu.c
@@ -91,7 +91,7 @@ static int  dbgu_setup(struct uart_dev_s *dev);
 static void dbgu_shutdown(struct uart_dev_s *dev);
 static int  dbgu_attach(struct uart_dev_s *dev);
 static void dbgu_detach(struct uart_dev_s *dev);
-static int  dbgu_interrupt(int irq, void *context);
+static int  dbgu_interrupt(int irq, void *context, FAR void *arg);
 static int  dbgu_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  dbgu_receive(struct uart_dev_s *dev, uint32_t *status);
 static void dbgu_rxint(struct uart_dev_s *dev, bool enable);
@@ -287,7 +287,7 @@ static int dbgu_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(SAM_IRQ_DBGU, dbgu_interrupt);
+  ret = irq_attach(SAM_IRQ_DBGU, dbgu_interrupt, NULL);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
@@ -328,7 +328,7 @@ static void dbgu_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int dbgu_interrupt(int irq, void *context)
+static int dbgu_interrupt(int irq, void *context, FAR void *arg)
 {
   struct uart_dev_s *dev = &g_dbgu_port;
   struct dbgu_dev_s *priv = (struct dbgu_dev_s *)dev->priv;
diff --git a/arch/arm/src/sama5/sam_dmac.c b/arch/arm/src/sama5/sam_dmac.c
index bf3f1481684dc365848620542012ee4aac424e42..a1002395db985a3a994726f7dfd870f01c9f8afd 100644
--- a/arch/arm/src/sama5/sam_dmac.c
+++ b/arch/arm/src/sama5/sam_dmac.c
@@ -657,7 +657,7 @@ static uint8_t sam_channel(uint8_t pid, const struct sam_pidmap_s *table,
         }
     }
 
-  dmadbg("No channel found for pid %d\n", pid);
+  dmaerr("ERROR: No channel found for pid %d\n", pid);
   DEBUGPANIC();
   return 0x3f;
 }
@@ -1364,7 +1364,7 @@ sam_allocdesc(struct sam_dmach_s *dmach, struct dma_linklist_s *prev,
    * Obviously setting it to zero would break that usage.
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (saddr != 0)
 #endif
     {
@@ -1785,12 +1785,15 @@ static void sam_dmaterminate(struct sam_dmach_s *dmach, int result)
  *
  ****************************************************************************/
 
-static int sam_dmac_interrupt(struct sam_dmac_s *dmac)
+static int sam_dmac_interrupt(int irq, void *context, FAR void *arg)
 {
+  struct sam_dmac_s *dmac = (struct sam_dmac_s *)arg;
   struct sam_dmach_s *dmach;
   unsigned int chndx;
   uint32_t regval;
 
+  DEBUGASSERT(dmac != NULL);
+
   /* Get the DMAC status register value.  Ignore all masked interrupt
    * status bits.
    */
@@ -1818,7 +1821,7 @@ static int sam_dmac_interrupt(struct sam_dmac_s *dmac)
                 {
                    /* Yes... Terminate the transfer with an error? */
 
-                   dmalldbg("ERROR: DMA failed: %08x\n", regval);
+                   dmaerr("ERROR: DMA failed: %08x\n", regval);
                    sam_dmaterminate(dmach, -EIO);
                 }
 
@@ -1849,28 +1852,6 @@ static int sam_dmac_interrupt(struct sam_dmac_s *dmac)
   return OK;
 }
 
-/****************************************************************************
- * Name: sam_dmac0_interrupt and sam_dmac1_interrupt
- *
- * Description:
- *  DMA interrupt handler
- *
- ****************************************************************************/
-
-#ifdef CONFIG_SAMA5_DMAC0
-static int sam_dmac0_interrupt(int irq, void *context)
-{
-  return sam_dmac_interrupt(&g_dmac0);
-}
-#endif
-
-#ifdef CONFIG_SAMA5_DMAC1
-static int sam_dmac1_interrupt(int irq, void *context)
-{
-  return sam_dmac_interrupt(&g_dmac1);
-}
-#endif
-
 /****************************************************************************
  * Name: sam_dmainitialize
  *
@@ -1920,7 +1901,7 @@ void sam_dmainitialize(struct sam_dmac_s *dmac)
 void weak_function up_dmainitialize(void)
 {
 #ifdef CONFIG_SAMA5_DMAC0
-  dmallvdbg("Initialize DMAC0\n");
+  dmainfo("Initialize DMAC0\n");
 
   /* Enable peripheral clock */
 
@@ -1928,7 +1909,7 @@ void weak_function up_dmainitialize(void)
 
   /* Attach DMA interrupt vector */
 
-  (void)irq_attach(SAM_IRQ_DMAC0, sam_dmac0_interrupt);
+  (void)irq_attach(SAM_IRQ_DMAC0, sam_dmac_interrupt, &g_dmac0);
 
   /* Initialize the controller */
 
@@ -1940,7 +1921,7 @@ void weak_function up_dmainitialize(void)
 #endif
 
 #ifdef CONFIG_SAMA5_DMAC1
-  dmallvdbg("Initialize DMAC1\n");
+  dmainfo("Initialize DMAC1\n");
 
   /* Enable peripheral clock */
 
@@ -1948,7 +1929,7 @@ void weak_function up_dmainitialize(void)
 
   /* Attach DMA interrupt vector */
 
-  (void)irq_attach(SAM_IRQ_DMAC1, sam_dmac1_interrupt);
+  (void)irq_attach(SAM_IRQ_DMAC1, sam_dmac_interrupt, &g_dmac1);
 
   /* Initialize the controller */
 
@@ -2002,7 +1983,7 @@ DMA_HANDLE sam_dmachannel(uint8_t dmacno, uint32_t chflags)
 #endif
 
     {
-      dmadbg("ERROR: Bad DMAC number: %d\n", dmacno);
+      dmaerr("ERROR: Bad DMAC number: %d\n", dmacno);
       DEBUGPANIC();
       return (DMA_HANDLE)NULL;
     }
@@ -2046,12 +2027,12 @@ DMA_HANDLE sam_dmachannel(uint8_t dmacno, uint32_t chflags)
 
   if (dmach)
     {
-      dmavdbg("DMAC%d CH%d: chflags: %08x returning dmach: %p\n",
+      dmainfo("DMAC%d CH%d: chflags: %08x returning dmach: %p\n",
               (int)dmacno, dmach->chan, (int)chflags, dmach);
     }
   else
     {
-      dmadbg("ERROR: Failed allocate DMAC%d channel\n", (int)dmacno);
+      dmaerr("ERROR: Failed allocate DMAC%d channel\n", (int)dmacno);
     }
 
   return (DMA_HANDLE)dmach;
@@ -2082,13 +2063,13 @@ void sam_dmaconfig(DMA_HANDLE handle, uint32_t chflags)
   dmach->flags = chflags;
 
 #if defined(CONFIG_SAMA5_DMAC0) && defined(CONFIG_SAMA5_DMAC1)
-  dmavdbg("DMAC%d CH%d: chflags: %08x\n",
+  dmainfo("DMAC%d CH%d: chflags: %08x\n",
           dmach->dmac, dmach->chan, (int)chflags);
 #elif defined(CONFIG_SAMA5_DMAC0)
-  dmavdbg("DMAC0 CH%d: chflags: %08x\n",
+  dmainfo("DMAC0 CH%d: chflags: %08x\n",
           dmach->chan, (int)chflags);
 #else
-  dmavdbg("DMAC1 CH%d: chflags: %08x\n",
+  dmainfo("DMAC1 CH%d: chflags: %08x\n",
           dmach->chan, (int)chflags);
 #endif
 }
@@ -2110,7 +2091,7 @@ void sam_dmafree(DMA_HANDLE handle)
 {
   struct sam_dmach_s *dmach = (struct sam_dmach_s *)handle;
 
-  dmavdbg("dmach: %p\n", dmach);
+  dmainfo("dmach: %p\n", dmach);
   DEBUGASSERT((dmach != NULL) && (dmach->inuse));
 
   /* Mark the channel no longer in use.  Clearing the inuse flag is an atomic
@@ -2140,10 +2121,10 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
   size_t remaining;
   int ret = OK;
 
-  dmavdbg("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
+  dmainfo("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
           dmach, (int)paddr, (int)maddr, (int)nbytes);
   DEBUGASSERT(dmach);
-  dmavdbg("llhead: %p lltail: %p\n", dmach->llhead, dmach->lltail);
+  dmainfo("llhead: %p lltail: %p\n", dmach->llhead, dmach->lltail);
 
   /* The maximum transfer size in bytes depends upon the maximum number of
    * transfers and the number of bytes per transfer.
@@ -2219,10 +2200,10 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
   size_t remaining;
   int ret = OK;
 
-  dmavdbg("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
+  dmainfo("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
           dmach, (int)paddr, (int)maddr, (int)nbytes);
   DEBUGASSERT(dmach);
-  dmavdbg("llhead: %p lltail: %p\n", dmach->llhead, dmach->lltail);
+  dmainfo("llhead: %p lltail: %p\n", dmach->llhead, dmach->lltail);
 
   /* The maximum transfer size in bytes depends upon the maximum number of
    * transfers and the number of bytes per transfer.
@@ -2294,7 +2275,7 @@ int sam_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
   struct sam_dmach_s *dmach = (struct sam_dmach_s *)handle;
   int ret = -EINVAL;
 
-  dmavdbg("dmach: %p callback: %p arg: %p\n", dmach, callback, arg);
+  dmainfo("dmach: %p callback: %p arg: %p\n", dmach, callback, arg);
   DEBUGASSERT(dmach != NULL);
 
   /* Verify that the DMA has been setup (i.e., at least one entry in the
@@ -2338,7 +2319,7 @@ void sam_dmastop(DMA_HANDLE handle)
   struct sam_dmach_s *dmach = (struct sam_dmach_s *)handle;
   irqstate_t flags;
 
-  dmavdbg("dmach: %p\n", dmach);
+  dmainfo("dmach: %p\n", dmach);
   DEBUGASSERT(dmach != NULL);
 
   flags = enter_critical_section();
@@ -2414,27 +2395,27 @@ void sam_dmadump(DMA_HANDLE handle, const struct sam_dmaregs_s *regs,
   struct sam_dmach_s *dmach = (struct sam_dmach_s *)handle;
   struct sam_dmac_s *dmac = sam_controller(dmach);
 
-  dmadbg("%s\n", msg);
-  dmadbg("  DMA Global Registers:\n");
-  dmadbg("      GCFG[%08x]: %08x\n", dmac->base + SAM_DMAC_GCFG_OFFSET, regs->gcfg);
-  dmadbg("        EN[%08x]: %08x\n", dmac->base + SAM_DMAC_EN_OFFSET, regs->en);
-  dmadbg("      SREQ[%08x]: %08x\n", dmac->base + SAM_DMAC_SREQ_OFFSET, regs->sreq);
-  dmadbg("      CREQ[%08x]: %08x\n", dmac->base + SAM_DMAC_CREQ_OFFSET, regs->creq);
-  dmadbg("      LAST[%08x]: %08x\n", dmac->base + SAM_DMAC_LAST_OFFSET, regs->last);
-  dmadbg("    EBCIMR[%08x]: %08x\n", dmac->base + SAM_DMAC_EBCIMR_OFFSET, regs->ebcimr);
-  dmadbg("    EBCISR[%08x]: %08x\n", dmac->base + SAM_DMAC_EBCISR_OFFSET, regs->ebcisr);
-  dmadbg("      CHSR[%08x]: %08x\n", dmac->base + SAM_DMAC_CHSR_OFFSET, regs->chsr);
-  dmadbg("      WPMR[%08x]: %08x\n", dmac->base + SAM_DMAC_WPMR_OFFSET, regs->wpmr);
-  dmadbg("      WPSR[%08x]: %08x\n", dmac->base + SAM_DMAC_WPSR_OFFSET, regs->wpsr);
-  dmadbg("  DMA Channel Registers:\n");
-  dmadbg("     SADDR[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_SADDR_OFFSET, regs->saddr);
-  dmadbg("     DADDR[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_DADDR_OFFSET, regs->daddr);
-  dmadbg("      DSCR[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_DSCR_OFFSET, regs->dscr);
-  dmadbg("     CTRLA[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_CTRLA_OFFSET, regs->ctrla);
-  dmadbg("     CTRLB[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_CTRLB_OFFSET, regs->ctrlb);
-  dmadbg("       CFG[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_CFG_OFFSET, regs->cfg);
-  dmadbg("      SPIP[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_SPIP_OFFSET, regs->spip);
-  dmadbg("      DPIP[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_DPIP_OFFSET, regs->dpip);
+  dmainfo("%s\n", msg);
+  dmainfo("  DMA Global Registers:\n");
+  dmainfo("      GCFG[%08x]: %08x\n", dmac->base + SAM_DMAC_GCFG_OFFSET, regs->gcfg);
+  dmainfo("        EN[%08x]: %08x\n", dmac->base + SAM_DMAC_EN_OFFSET, regs->en);
+  dmainfo("      SREQ[%08x]: %08x\n", dmac->base + SAM_DMAC_SREQ_OFFSET, regs->sreq);
+  dmainfo("      CREQ[%08x]: %08x\n", dmac->base + SAM_DMAC_CREQ_OFFSET, regs->creq);
+  dmainfo("      LAST[%08x]: %08x\n", dmac->base + SAM_DMAC_LAST_OFFSET, regs->last);
+  dmainfo("    EBCIMR[%08x]: %08x\n", dmac->base + SAM_DMAC_EBCIMR_OFFSET, regs->ebcimr);
+  dmainfo("    EBCISR[%08x]: %08x\n", dmac->base + SAM_DMAC_EBCISR_OFFSET, regs->ebcisr);
+  dmainfo("      CHSR[%08x]: %08x\n", dmac->base + SAM_DMAC_CHSR_OFFSET, regs->chsr);
+  dmainfo("      WPMR[%08x]: %08x\n", dmac->base + SAM_DMAC_WPMR_OFFSET, regs->wpmr);
+  dmainfo("      WPSR[%08x]: %08x\n", dmac->base + SAM_DMAC_WPSR_OFFSET, regs->wpsr);
+  dmainfo("  DMA Channel Registers:\n");
+  dmainfo("     SADDR[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_SADDR_OFFSET, regs->saddr);
+  dmainfo("     DADDR[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_DADDR_OFFSET, regs->daddr);
+  dmainfo("      DSCR[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_DSCR_OFFSET, regs->dscr);
+  dmainfo("     CTRLA[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_CTRLA_OFFSET, regs->ctrla);
+  dmainfo("     CTRLB[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_CTRLB_OFFSET, regs->ctrlb);
+  dmainfo("       CFG[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_CFG_OFFSET, regs->cfg);
+  dmainfo("      SPIP[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_SPIP_OFFSET, regs->spip);
+  dmainfo("      DPIP[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_DPIP_OFFSET, regs->dpip);
 }
 #endif /* CONFIG_DEBUG_DMA */
 #endif /* CONFIG_SAMA5_DMAC0 || CONFIG_SAMA5_DMAC1 */
diff --git a/arch/arm/src/sama5/sam_dmac.h b/arch/arm/src/sama5/sam_dmac.h
index c9fc885369db4f1e689ebc442b2b638cf47c2a0c..b6ba92c23f1f60f55796ff8def881c5e9e5e9dd2 100644
--- a/arch/arm/src/sama5/sam_dmac.h
+++ b/arch/arm/src/sama5/sam_dmac.h
@@ -52,7 +52,7 @@
 
 /* Configuration ********************************************************************/
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
 #  undef CONFIG_DEBUG_DMA
 #endif
 
diff --git a/arch/arm/src/sama5/sam_ehci.c b/arch/arm/src/sama5/sam_ehci.c
index a6cb3d0d7aacbf46ccdd5113dbde8a7e349a461c..d84f1c2dbc41f50e1c26c63c190f35c574a94bcf 100644
--- a/arch/arm/src/sama5/sam_ehci.c
+++ b/arch/arm/src/sama5/sam_ehci.c
@@ -51,6 +51,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -112,7 +113,7 @@
 
 /* Debug options */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_USB_INFO
 #  undef CONFIG_SAMA5_EHCI_REGDEBUG
 #endif
 
@@ -127,13 +128,6 @@
 #  undef CONFIG_SAMA5_UHPHS_RHPORT1
 #endif
 
-/* Simplify DEBUG checks */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_USB
-#endif
-
 /* For now, suppress use of PORTA in any event.  I use that for SAM-BA and
  * would prefer that the board not try to drive VBUS on that port!
  */
@@ -394,7 +388,7 @@ static inline void sam_portsc_bottomhalf(void);
 static inline void sam_syserr_bottomhalf(void);
 static inline void sam_async_advance_bottomhalf(void);
 static void sam_ehci_bottomhalf(FAR void *arg);
-static int sam_ehci_tophalf(int irq, FAR void *context);
+static int sam_ehci_tophalf(int irq, FAR void *context, FAR void *arg);
 
 /* USB Host Controller Operations **********************************************/
 
@@ -635,7 +629,7 @@ static uint32_t sam_swap32(uint32_t value)
 static void sam_printreg(volatile uint32_t *regaddr, uint32_t regval,
                           bool iswrite)
 {
-  lldbg("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval);
+  uinfo("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval);
 }
 #endif
 
@@ -686,7 +680,7 @@ static void sam_checkreg(volatile uint32_t *regaddr, uint32_t regval, bool iswri
             {
               /* No.. More than one. */
 
-              lldbg("[repeats %d more times]\n", count);
+              uinfo("[repeats %d more times]\n", count);
             }
         }
 
@@ -1275,13 +1269,13 @@ static int sam_qh_flush(struct sam_qh_s *qh)
 #ifdef CONFIG_SAMA5_EHCI_REGDEBUG
 static void sam_qtd_print(struct sam_qtd_s *qtd)
 {
-  udbg("  QTD[%p]:\n", qtd);
-  udbg("    hw:\n");
-  udbg("      nqp: %08x alt: %08x token: %08x\n",
-       qtd->hw.nqp, qtd->hw.alt, qtd->hw.token);
-  udbg("      bpl: %08x %08x %08x %08x %08x\n",
-       qtd->hw.bpl[0], qtd->hw.bpl[1], qtd->hw.bpl[2],
-       qtd->hw.bpl[3], qtd->hw.bpl[4]);
+  uinfo("  QTD[%p]:\n", qtd);
+  uinfo("    hw:\n");
+  uinfo("      nqp: %08x alt: %08x token: %08x\n",
+        qtd->hw.nqp, qtd->hw.alt, qtd->hw.token);
+  uinfo("      bpl: %08x %08x %08x %08x %08x\n",
+        qtd->hw.bpl[0], qtd->hw.bpl[1], qtd->hw.bpl[2],
+        qtd->hw.bpl[3], qtd->hw.bpl[4]);
 }
 #endif
 
@@ -1299,30 +1293,30 @@ static void sam_qh_print(struct sam_qh_s *qh)
   struct sam_epinfo_s *epinfo;
   struct ehci_overlay_s *overlay;
 
-  udbg("QH[%p]:\n", qh);
-  udbg("  hw:\n");
-  udbg("    hlp: %08x epchar: %08x epcaps: %08x cqp: %08x\n",
-       qh->hw.hlp, qh->hw.epchar, qh->hw.epcaps, qh->hw.cqp);
+  uinfo("QH[%p]:\n", qh);
+  uinfo("  hw:\n");
+  uinfo("    hlp: %08x epchar: %08x epcaps: %08x cqp: %08x\n",
+        qh->hw.hlp, qh->hw.epchar, qh->hw.epcaps, qh->hw.cqp);
 
   overlay = &qh->hw.overlay;
-  udbg("  overlay:\n");
-  udbg("    nqp: %08x alt: %08x token: %08x\n",
-       overlay->nqp, overlay->alt, overlay->token);
-  udbg("    bpl: %08x %08x %08x %08x %08x\n",
-       overlay->bpl[0], overlay->bpl[1], overlay->bpl[2],
-       overlay->bpl[3], overlay->bpl[4]);
+  uinfo("  overlay:\n");
+  uinfo("    nqp: %08x alt: %08x token: %08x\n",
+        overlay->nqp, overlay->alt, overlay->token);
+  uinfo("    bpl: %08x %08x %08x %08x %08x\n",
+        overlay->bpl[0], overlay->bpl[1], overlay->bpl[2],
+        overlay->bpl[3], overlay->bpl[4]);
 
-  udbg("  fqp:\n", qh->fqp);
+  uinfo("  fqp:\n", qh->fqp);
 
   epinfo = qh->epinfo;
-  udbg("  epinfo[%p]:\n", epinfo);
+  uinfo("  epinfo[%p]:\n", epinfo);
   if (epinfo)
     {
-      udbg("    EP%d DIR=%s FA=%08x TYPE=%d MaxPacket=%d\n",
-           epinfo->epno, epinfo->dirin ? "IN" : "OUT", epinfo->devaddr,
-           epinfo->xfrtype, epinfo->maxpacket);
-      udbg("    Toggle=%d iocwait=%d speed=%d result=%d\n",
-           epinfo->toggle, epinfo->iocwait, epinfo->speed, epinfo->result);
+      uinfo("    EP%d DIR=%s FA=%08x TYPE=%d MaxPacket=%d\n",
+            epinfo->epno, epinfo->dirin ? "IN" : "OUT", epinfo->devaddr,
+            epinfo->xfrtype, epinfo->maxpacket);
+      uinfo("    Toggle=%d iocwait=%d speed=%d result=%d\n",
+            epinfo->toggle, epinfo->iocwait, epinfo->speed, epinfo->result);
     }
 }
 #endif
@@ -1928,7 +1922,7 @@ static int sam_async_setup(struct sam_rhport_s *rhport,
 #ifdef CONFIG_USBHOST_TRACE
   usbhost_vtrace2(EHCI_VTRACE2_ASYNCXFR, epinfo->epno, buflen);
 #else
-  uvdbg("RHport%d EP%d: buffer=%p, buflen=%d, req=%p\n",
+  uinfo("RHport%d EP%d: buffer=%p, buflen=%d, req=%p\n",
         RHPORT(rhport), epinfo->epno, buffer, buflen, req);
 #endif
 
@@ -2206,7 +2200,7 @@ static int sam_intr_setup(struct sam_rhport_s *rhport,
 #ifdef CONFIG_USBHOST_TRACE
   usbhost_vtrace2(EHCI_VTRACE2_INTRXFR, epinfo->epno, buflen);
 #else
-  uvdbg("RHport%d EP%d: buffer=%p, buflen=%d\n",
+  uinfo("RHport%d EP%d: buffer=%p, buflen=%d\n",
         RHPORT(rhport), epinfo->epno, buffer, buflen);
 #endif
 
@@ -3173,7 +3167,7 @@ static void sam_ehci_bottomhalf(FAR void *arg)
  *
  ****************************************************************************/
 
-static int sam_ehci_tophalf(int irq, FAR void *context)
+static int sam_ehci_tophalf(int irq, FAR void *context, FAR void *arg)
 {
   uint32_t usbsts;
   uint32_t pending;
@@ -3187,7 +3181,7 @@ static int sam_ehci_tophalf(int irq, FAR void *context)
 #ifdef CONFIG_USBHOST_TRACE
   usbhost_vtrace1(EHCI_VTRACE1_TOPHALF, usbsts & regval);
 #else
-  ullvdbg("USBSTS: %08x USBINTR: %08x\n", usbsts, regval);
+  uinfo("USBSTS: %08x USBINTR: %08x\n", usbsts, regval);
 #endif
 
   /* Handle all unmasked interrupt sources */
@@ -3234,15 +3228,15 @@ static int sam_ehci_tophalf(int irq, FAR void *context)
  ****************************************************************************/
 
 #ifdef CONFIG_SAMA5_OHCI
-static int sam_uhphs_interrupt(int irq, FAR void *context)
+static int sam_uhphs_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   int ohci;
   int ehci;
 
   /* Provide the interrupting event to both the EHCI and OHCI top half */
 
-  ohci = sam_ohci_tophalf(irq, context);
-  ehci = sam_ehci_tophalf(irq, context);
+  ohci = sam_ohci_tophalf(irq, context, arg);
+  ehci = sam_ehci_tophalf(irq, context, arg);
 
   /* Return OK only if both handlers returned OK */
 
@@ -3730,7 +3724,7 @@ static int sam_epalloc(FAR struct usbhost_driver_s *drvr,
 #ifdef CONFIG_USBHOST_TRACE
   usbhost_vtrace2(EHCI_VTRACE2_EPALLOC, epdesc->addr, epdesc->xfrtype);
 #else
-  uvdbg("EP%d DIR=%s FA=%08x TYPE=%d Interval=%d MaxPacket=%d\n",
+  uinfo("EP%d DIR=%s FA=%08x TYPE=%d Interval=%d MaxPacket=%d\n",
         epdesc->addr, epdesc->in ? "IN" : "OUT", hport->funcaddr,
         epdesc->xfrtype, epdesc->interval, epdesc->mxpacketsize);
 #endif
@@ -3759,7 +3753,13 @@ static int sam_epalloc(FAR struct usbhost_driver_s *drvr,
   epinfo->maxpacket = epdesc->mxpacketsize;
   epinfo->xfrtype   = epdesc->xfrtype;
   epinfo->speed     = hport->speed;
+
+  /* The endpoint iocsem semaphore is used for signaling and, hence,
+   * should not have priority inheritance enabled.
+   */
+
   sem_init(&epinfo->iocsem, 0, 0);
+  sem_setprotocol(&epinfo->iocsem, SEM_PRIO_NONE);
 
   /* Success.. return an opaque reference to the endpoint information structure
    * instance
@@ -4019,7 +4019,7 @@ static int sam_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
 #ifdef CONFIG_USBHOST_TRACE
   usbhost_vtrace2(EHCI_VTRACE2_CTRLINOUT, RHPORT(rhport), req->req);
 #else
-  uvdbg("RHPort%d type: %02x req: %02x value: %02x%02x index: %02x%02x len: %04x\n",
+  uinfo("RHPort%d type: %02x req: %02x value: %02x%02x index: %02x%02x len: %04x\n",
         RHPORT(rhport), req->type, req->req, req->value[1], req->value[0],
         req->index[1], req->index[0], len);
 #endif
@@ -4042,7 +4042,7 @@ static int sam_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
   ret = sam_async_setup(rhport, ep0info, req, buffer, len);
   if (ret < 0)
     {
-      udbg("ERROR: sam_async_setup failed: %d\n", ret);
+      uerr("ERROR: sam_async_setup failed: %d\n", ret);
       goto errout_with_iocwait;
     }
 
@@ -4160,7 +4160,7 @@ static ssize_t sam_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep,
 
   if (ret < 0)
     {
-      udbg("ERROR: Transfer setup failed: %d\n", ret);
+      uerr("ERROR: Transfer setup failed: %d\n", ret);
       goto errout_with_iocwait;
     }
 
@@ -4500,7 +4500,7 @@ static int sam_connect(FAR struct usbhost_driver_s *drvr,
   /* Set the connected/disconnected flag */
 
   hport->connected = connected;
-  ullvdbg("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
+  uinfo("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
 
   /* Report the connection event */
 
@@ -4701,7 +4701,7 @@ FAR struct usbhost_connection_s *sam_ehci_initialize(int controller)
   FAR struct usbhost_hubport_s *hport;
   irqstate_t flags;
   uint32_t regval;
-#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_ASSERTIONS)
   uint16_t regval16;
   unsigned int nports;
 #endif
@@ -4794,6 +4794,12 @@ FAR struct usbhost_connection_s *sam_ehci_initialize(int controller)
   sem_init(&g_ehci.exclsem, 0, 1);
   sem_init(&g_ehci.pscsem,  0, 0);
 
+  /* The pscsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&g_ehci.pscsem, SEM_PRIO_NONE);
+
   /* Initialize EP0 */
 
   sem_init(&g_ehci.ep0.iocsem, 0, 1);
@@ -4830,7 +4836,13 @@ FAR struct usbhost_connection_s *sam_ehci_initialize(int controller)
       rhport->ep0.xfrtype         = USB_EP_ATTR_XFER_CONTROL;
       rhport->ep0.speed           = USB_SPEED_FULL;
       rhport->ep0.maxpacket       = 8;
+
+      /* The endpoint 0 iocsem semaphore is used for signaling and, hence,
+       * should not have priority inheritance enabled.
+       */
+
       sem_init(&rhport->ep0.iocsem, 0, 0);
+      sem_setprotocol(&rhport->ep0.iocsem, SEM_PRIO_NONE);
 
       /* Initialize the public port representation */
 
@@ -4952,7 +4964,7 @@ FAR struct usbhost_connection_s *sam_ehci_initialize(int controller)
 
   sam_putreg(EHCI_INT_ALLINTS, &HCOR->usbsts);
 
-#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_ASSERTIONS)
   /* Show the EHCI version */
 
   regval16 = sam_swap16(HCCR->hciversion);
@@ -5086,9 +5098,9 @@ FAR struct usbhost_connection_s *sam_ehci_initialize(int controller)
    */
 
 #ifdef CONFIG_SAMA5_OHCI
-  ret = irq_attach(SAM_IRQ_UHPHS, sam_uhphs_interrupt);
+  ret = irq_attach(SAM_IRQ_UHPHS, sam_uhphs_interrupt, NULL);
 #else
-  ret = irq_attach(SAM_IRQ_UHPHS, sam_ehci_tophalf);
+  ret = irq_attach(SAM_IRQ_UHPHS, sam_ehci_tophalf, NULL);
 #endif
   if (ret != 0)
     {
diff --git a/arch/arm/src/sama5/sam_emaca.c b/arch/arm/src/sama5/sam_emaca.c
index a4f895760d18a255e7e7b64fa8a16b06f5bd72d6..92e18b160ae1126bf66cfa4ea77f928b42f86305 100644
--- a/arch/arm/src/sama5/sam_emaca.c
+++ b/arch/arm/src/sama5/sam_emaca.c
@@ -4,7 +4,7 @@
  * 10/100 Base-T Ethernet driver for the SAMA5D3.  Denoted as 'A' to
  * distinguish it from the SAMA5D4 EMAC driver.
  *
- *   Copyright (C) 2013-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * References:
@@ -65,6 +65,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -94,6 +95,25 @@
  ****************************************************************************/
 /* Configuration ************************************************************/
 
+/* If processing is not done at the interrupt level, then work queue support
+ * is required.
+ */
+
+#if !defined(CONFIG_SCHED_WORKQUEUE)
+#  error Work queue support is required
+#else
+
+  /* Select work queue */
+
+#  if defined(CONFIG_SAMA5_EMACA_HPWORK)
+#    define ETHWORK HPWORK
+#  elif defined(CONFIG_SAMA5_EMACA_LPWORK)
+#    define ETHWORK LPWORK
+#  else
+#    error Neither CONFIG_SAMA5_EMACA_HPWORK nor CONFIG_SAMA5_EMACA_LPWORK defined
+#  endif
+#endif
+
 /* Number of buffers for RX */
 
 #ifndef CONFIG_SAMA5_EMAC_NRXBUFFERS
@@ -199,18 +219,7 @@
 
 #endif
 
-/* EMAC buffer sizes, number of buffers, and number of descriptors.
- *
- * REVISIT: The CONFIG_NET_MULTIBUFFER might be useful.  It might be possible
- * to use this option to send and receive messages directly into the DMA
- * buffers, saving a copy.  There might be complications on the receiving
- * side, however, where buffers may wrap and where the size of the received
- * frame will typically be smaller than a full packet.
- */
-
-#ifdef CONFIG_NET_MULTIBUFFER
-#  error CONFIG_NET_MULTIBUFFER must not be set
-#endif
+/* EMAC buffer sizes, number of buffers, and number of descriptors. *********/
 
 #define EMAC_RX_UNITSIZE 128                 /* Fixed size for RX buffer  */
 #define EMAC_TX_UNITSIZE CONFIG_NET_ETH_MTU  /* MAX size for Ethernet packet */
@@ -223,7 +232,7 @@
  * enabled.
  */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_NET_INFO
 #  undef CONFIG_SAMA5_EMACA_REGDEBUG
 #endif
 
@@ -266,6 +275,8 @@ struct sam_emac_s
   uint8_t               ifup    : 1; /* true:ifup false:ifdown */
   WDOG_ID               txpoll;      /* TX poll timer */
   WDOG_ID               txtimeout;   /* TX timeout timer */
+  struct work_s         irqwork;     /* For deferring interrupt work to the work queue */
+  struct work_s         pollwork;    /* For deferring poll work to the work queue */
 
   /* This holds the information visible to the NuttX network */
 
@@ -301,6 +312,17 @@ struct sam_emac_s
 
 static struct sam_emac_s g_emac;
 
+/* A single packet buffer is used
+ *
+ * REVISIT:  It might be possible to use this option to send and receive
+ * messages directly into the DMA buffers, saving a copy.  There might be
+ * complications on the receiving side, however, where buffers may wrap
+ * and where the size of the received frame will typically be smaller than
+ * a full packet.
+ */
+
+static uint8_t g_pktbuf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
+
 #ifdef CONFIG_SAMA5_EMACA_PREALLOCATE
 /* Preallocated data */
 /* TX descriptors list */
@@ -335,7 +357,7 @@ static uint8_t g_rxbuffer[CONFIG_SAMA5_EMAC_NRXBUFFERS * EMAC_RX_UNITSIZE]
  ****************************************************************************/
 /* Register operations ******************************************************/
 
-#if defined(CONFIG_SAMA5_EMACA_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAMA5_EMACA_REGDEBUG
 static bool sam_checkreg(struct sam_emac_s *priv, bool wr,
                          uint32_t regval, uintptr_t address);
 static uint32_t sam_getreg(struct sam_emac_s *priv, uintptr_t addr);
@@ -363,17 +385,24 @@ static void sam_dopoll(struct sam_emac_s *priv);
 static int  sam_recvframe(struct sam_emac_s *priv);
 static void sam_receive(struct sam_emac_s *priv);
 static void sam_txdone(struct sam_emac_s *priv);
-static int  sam_emac_interrupt(int irq, void *context);
+
+static void sam_interrupt_work(FAR void *arg);
+static int  sam_emac_interrupt(int irq, void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
-static void sam_polltimer(int argc, uint32_t arg, ...);
-static void sam_txtimeout(int argc, uint32_t arg, ...);
+static void sam_txtimeout_work(FAR void *arg);
+static void sam_txtimeout_expiry(int argc, uint32_t arg, ...);
+
+static void sam_poll_work(FAR void *arg);
+static void sam_poll_expiry(int argc, uint32_t arg, ...);
 
 /* NuttX callback functions */
 
 static int  sam_ifup(struct net_driver_s *dev);
 static int  sam_ifdown(struct net_driver_s *dev);
+
+static void sam_txavail_work(FAR void *arg);
 static int  sam_txavail(struct net_driver_s *dev);
 
 #if defined(CONFIG_NET_IGMP) || defined(CONFIG_NET_ICMPv6)
@@ -390,7 +419,7 @@ static int  sam_ioctl(struct net_driver_s *dev, int cmd, long arg);
 
 /* PHY Initialization */
 
-#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_INFO)
 static void sam_phydump(struct sam_emac_s *priv);
 #else
 #  define sam_phydump(priv)
@@ -461,7 +490,7 @@ static bool sam_checkreg(struct sam_emac_s *priv, bool wr, uint32_t regval,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", priv->ntimes);
+          ninfo("...[Repeats %d times]...\n", priv->ntimes);
         }
 
       /* Save information about the new access */
@@ -493,7 +522,7 @@ static uint32_t sam_getreg(struct sam_emac_s *priv, uintptr_t address)
 
   if (sam_checkreg(priv, false, regval, address))
     {
-      lldbg("%08x->%08x\n", address, regval);
+      ninfo("%08x->%08x\n", address, regval);
     }
 
   return regval;
@@ -514,7 +543,7 @@ static void sam_putreg(struct sam_emac_s *priv, uintptr_t address,
 {
   if (sam_checkreg(priv, true, regval, address))
     {
-      lldbg("%08x<-%08x\n", address, regval);
+      ninfo("%08x<-%08x\n", address, regval);
     }
 
   putreg32(regval, address);
@@ -607,7 +636,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
   priv->txdesc = (struct emac_txdesc_s *)kmm_memalign(8, allocsize);
   if (!priv->txdesc)
     {
-      nlldbg("ERROR: Failed to allocate TX descriptors\n");
+      nerr("ERROR: Failed to allocate TX descriptors\n");
       return -ENOMEM;
     }
 
@@ -617,7 +646,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
   priv->rxdesc = (struct emac_rxdesc_s *)kmm_memalign(8, allocsize);
   if (!priv->rxdesc)
     {
-      nlldbg("ERROR: Failed to allocate RX descriptors\n");
+      nerr("ERROR: Failed to allocate RX descriptors\n");
       sam_buffer_free(priv);
       return -ENOMEM;
     }
@@ -628,7 +657,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
   priv->txbuffer = (uint8_t *)kmm_memalign(8, allocsize);
   if (!priv->txbuffer)
     {
-      nlldbg("ERROR: Failed to allocate TX buffer\n");
+      nerr("ERROR: Failed to allocate TX buffer\n");
       sam_buffer_free(priv);
       return -ENOMEM;
     }
@@ -637,7 +666,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
   priv->rxbuffer = (uint8_t *)kmm_memalign(8, allocsize);
   if (!priv->rxbuffer)
     {
-      nlldbg("ERROR: Failed to allocate RX buffer\n");
+      nerr("ERROR: Failed to allocate RX buffer\n");
       sam_buffer_free(priv);
       return -ENOMEM;
     }
@@ -725,14 +754,14 @@ static int sam_transmit(struct sam_emac_s *priv)
   uint32_t regval;
   uint32_t status;
 
-  nllvdbg("d_len: %d txhead: %d\n",  dev->d_len, priv->txhead);
+  ninfo("d_len: %d txhead: %d\n",  dev->d_len, priv->txhead);
   sam_dumppacket("Transmit packet", dev->d_buf, dev->d_len);
 
   /* Check parameter */
 
   if (dev->d_len > EMAC_TX_UNITSIZE)
     {
-      nlldbg("ERROR: Packet too big: %d\n", dev->d_len);
+      nerr("ERROR: Packet too big: %d\n", dev->d_len);
       return -EINVAL;
     }
 
@@ -744,7 +773,7 @@ static int sam_transmit(struct sam_emac_s *priv)
 
   if (sam_txfree(priv) < 1)
     {
-      nlldbg("ERROR: No free TX descriptors\n");
+      nerr("ERROR: No free TX descriptors\n");
       return -EBUSY;
     }
 
@@ -788,7 +817,7 @@ static int sam_transmit(struct sam_emac_s *priv)
 
   /* Setup the TX timeout watchdog (perhaps restarting the timer) */
 
-  (void)wd_start(priv->txtimeout, SAM_TXTIMEOUT, sam_txtimeout, 1,
+  (void)wd_start(priv->txtimeout, SAM_TXTIMEOUT, sam_txtimeout_expiry, 1,
                  (uint32_t)priv);
 
   /* Set d_len to zero meaning that the d_buf[] packet buffer is again
@@ -806,7 +835,7 @@ static int sam_transmit(struct sam_emac_s *priv)
 
   if (sam_txfree(priv) < 1)
     {
-      nllvdbg("Disabling RX interrupts\n");
+      ninfo("Disabling RX interrupts\n");
       sam_putreg(priv, SAM_EMAC_IDR, EMAC_INT_RCOMP);
     }
 
@@ -903,7 +932,7 @@ static int sam_txpoll(struct net_driver_s *dev)
  *
  *   1. After completion of a transmission (sam_txdone),
  *   2. When new TX data is available (sam_txavail), and
- *   3. After a TX timeout to restart the sending process (sam_txtimeout).
+ *   3. After a TX timeout to restart the sending process (sam_txtimeout_expiry).
  *
  * Parameters:
  *   priv - Reference to the driver state structure
@@ -986,7 +1015,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
   arch_invalidate_dcache((uintptr_t)rxdesc,
                          (uintptr_t)rxdesc + sizeof(struct emac_rxdesc_s));
 
-  nllvdbg("rxndx: %d\n", rxndx);
+  ninfo("rxndx: %d\n", rxndx);
 
   while ((rxdesc->addr & EMACRXD_ADDR_OWNER) != 0)
     {
@@ -1042,7 +1071,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
         {
           if (rxndx == priv->rxndx)
             {
-              nllvdbg("ERROR: No EOF (Invalid of buffers too small)\n");
+              nerr("ERROR: No EOF (Invalid of buffers too small)\n");
               do
                 {
                   /* Give ownership back to the EMAC */
@@ -1097,7 +1126,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
               /* Frame size from the EMAC */
 
               dev->d_len = (rxdesc->status & EMACRXD_STA_FRLEN_MASK);
-              nllvdbg("packet %d-%d (%d)\n", priv->rxndx, rxndx, dev->d_len);
+              ninfo("packet %d-%d (%d)\n", priv->rxndx, rxndx, dev->d_len);
 
               /* All data have been copied in the application frame buffer,
                * release the RX descriptor
@@ -1128,11 +1157,11 @@ static int sam_recvframe(struct sam_emac_s *priv)
                * all of the data.
                */
 
-              nllvdbg("rxndx: %d d_len: %d\n", priv->rxndx, dev->d_len);
+              ninfo("rxndx: %d d_len: %d\n", priv->rxndx, dev->d_len);
 
               if (pktlen < dev->d_len)
                 {
-                  nlldbg("ERROR: Buffer size %d; frame size %d\n", dev->d_len, pktlen);
+                  nerr("ERROR: Buffer size %d; frame size %d\n", dev->d_len, pktlen);
                   return -E2BIG;
                 }
 
@@ -1172,7 +1201,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
   /* No packet was found */
 
   priv->rxndx = rxndx;
-  nllvdbg("rxndx: %d\n", priv->rxndx);
+  ninfo("rxndx: %d\n", priv->rxndx);
   return -EAGAIN;
 }
 
@@ -1212,7 +1241,7 @@ static void sam_receive(struct sam_emac_s *priv)
 
       if (dev->d_len > CONFIG_NET_ETH_MTU)
         {
-          nlldbg("DROPPED: Too big: %d\n", dev->d_len);
+          nwarn("WARNING: Dropped, Too big: %d\n", dev->d_len);
           continue;
         }
 
@@ -1227,7 +1256,7 @@ static void sam_receive(struct sam_emac_s *priv)
 #ifdef CONFIG_NET_IPv4
       if (BUF->type == HTONS(ETHTYPE_IP))
         {
-          nllvdbg("IPv4 frame\n");
+          ninfo("IPv4 frame\n");
 
           /* Handle ARP on input then give the IPv4 packet to the network
            * layer
@@ -1267,7 +1296,7 @@ static void sam_receive(struct sam_emac_s *priv)
 #ifdef CONFIG_NET_IPv6
       if (BUF->type == HTONS(ETHTYPE_IP6))
         {
-          nllvdbg("Iv6 frame\n");
+          ninfo("Iv6 frame\n");
 
           /* Give the IPv6 packet to the network layer */
 
@@ -1304,7 +1333,7 @@ static void sam_receive(struct sam_emac_s *priv)
 #ifdef CONFIG_NET_ARP
       if (BUF->type == htons(ETHTYPE_ARP))
         {
-          nllvdbg("ARP frame\n");
+          ninfo("ARP frame\n");
 
           /* Handle ARP packet */
 
@@ -1322,7 +1351,7 @@ static void sam_receive(struct sam_emac_s *priv)
       else
 #endif
         {
-          nlldbg("DROPPED: Unknown type: %04x\n", BUF->type);
+          nwarn("WARNING: Dropped, Unknown type: %04x\n", BUF->type);
         }
     }
 }
@@ -1416,25 +1445,25 @@ static void sam_txdone(struct sam_emac_s *priv)
 }
 
 /****************************************************************************
- * Function: sam_emac_interrupt
+ * Function: sam_interrupt_work
  *
  * Description:
- *   Hardware interrupt handler
+ *   Perform interrupt related work from the worker thread
  *
  * Parameters:
- *   irq     - Number of the IRQ that generated the interrupt
- *   context - Interrupt register state save info (architecture-specific)
+ *   arg - The argument passed when work_queue() was called.
  *
  * Returned Value:
  *   OK on success
  *
  * Assumptions:
+ *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static int sam_emac_interrupt(int irq, void *context)
+static void sam_interrupt_work(FAR void *arg)
 {
-  struct sam_emac_s *priv = &g_emac;
+  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
   uint32_t isr;
   uint32_t rsr;
   uint32_t tsr;
@@ -1443,13 +1472,16 @@ static int sam_emac_interrupt(int irq, void *context)
   uint32_t pending;
   uint32_t clrbits;
 
+  /* Process pending Ethernet interrupts */
+
+  net_lock();
   isr = sam_getreg(priv, SAM_EMAC_ISR);
   rsr = sam_getreg(priv, SAM_EMAC_RSR);
   tsr = sam_getreg(priv, SAM_EMAC_TSR);
   imr = sam_getreg(priv, SAM_EMAC_IMR);
 
   pending = isr & ~(imr | EMAC_INT_UNUSED);
-  nllvdbg("isr: %08x pending: %08x\n", isr, pending);
+  ninfo("isr: %08x pending: %08x\n", isr, pending);
 
   /* Check for the completion of a transmission.  This should be done before
    * checking for received data (because receiving can cause another transmission
@@ -1475,7 +1507,7 @@ static int sam_emac_interrupt(int irq, void *context)
           clrbits = EMAC_TSR_RLES | sam_txinuse(priv);
           sam_txreset(priv);
 
-          nlldbg("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
+          nerr("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
 
           regval = sam_getreg(priv, SAM_EMAC_NCR);
           regval |= EMAC_NCR_TE;
@@ -1486,7 +1518,7 @@ static int sam_emac_interrupt(int irq, void *context)
 
       if ((tsr & EMAC_TSR_COL) != 0)
         {
-          nlldbg("ERROR: Collision occurred TSR: %08x\n", tsr);
+          nerr("ERROR: Collision occurred TSR: %08x\n", tsr);
           clrbits |= EMAC_TSR_COL;
         }
 
@@ -1494,7 +1526,7 @@ static int sam_emac_interrupt(int irq, void *context)
 
       if ((tsr & EMAC_TSR_BEX) != 0)
         {
-          nlldbg("ERROR: Buffers exhausted mid-frame TSR: %08x\n", tsr);
+          nerr("ERROR: Buffers exhausted mid-frame TSR: %08x\n", tsr);
           clrbits |= EMAC_TSR_BEX;
         }
 
@@ -1509,7 +1541,7 @@ static int sam_emac_interrupt(int irq, void *context)
 
       if ((tsr & EMAC_TSR_UND) != 0)
         {
-          nlldbg("ERROR: Transmit Underrun TSR: %08x\n", tsr);
+          nerr("ERROR: Transmit Underrun TSR: %08x\n", tsr);
           clrbits |= EMAC_TSR_UND;
         }
 
@@ -1546,7 +1578,7 @@ static int sam_emac_interrupt(int irq, void *context)
 
       if ((rsr & EMAC_RSR_OVR) != 0)
         {
-          nlldbg("ERROR: Receiver overrun RSR: %08x\n", rsr);
+          nerr("ERROR: Receiver overrun RSR: %08x\n", rsr);
           clrbits |= EMAC_RSR_OVR;
         }
 
@@ -1563,7 +1595,7 @@ static int sam_emac_interrupt(int irq, void *context)
 
       if ((rsr & EMAC_RSR_BNA) != 0)
         {
-          nlldbg("ERROR: Buffer not available RSR: %08x\n", rsr);
+          nerr("ERROR: Buffer not available RSR: %08x\n", rsr);
           clrbits |= EMAC_RSR_BNA;
         }
 
@@ -1584,7 +1616,7 @@ static int sam_emac_interrupt(int irq, void *context)
 
   if ((pending & EMAC_INT_PFR) != 0)
     {
-      nlldbg("Pause frame received\n");
+      nwarn("WARNING: Pause frame received\n");
     }
 
   /* Check for Pause Time Zero (PTZ)
@@ -1594,55 +1626,112 @@ static int sam_emac_interrupt(int irq, void *context)
 
   if ((pending & EMAC_INT_PTZ) != 0)
     {
-      nlldbg("Pause TO!\n");
+      nwarn("WARNING: Pause TO!\n");
     }
 #endif
 
-  return OK;
+  net_unlock();
+
+  /* Re-enable Ethernet interrupts */
+
+  up_enable_irq(SAM_IRQ_EMAC);
 }
 
 /****************************************************************************
- * Function: sam_txtimeout
+ * Function: sam_emac_interrupt
  *
  * Description:
- *   Our TX watchdog timed out.  Called from the timer interrupt handler.
- *   The last TX never completed.  Reset the hardware and start again.
+ *   Hardware interrupt handler
  *
  * Parameters:
- *   argc - The number of available arguments
- *   arg  - The first argument
+ *   irq     - Number of the IRQ that generated the interrupt
+ *   context - Interrupt register state save info (architecture-specific)
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
- *   Global interrupts are disabled by the watchdog logic.
  *
  ****************************************************************************/
 
-static void sam_txtimeout(int argc, uint32_t arg, ...)
+static int sam_emac_interrupt(int irq, void *context, FAR void *arg)
 {
-  struct sam_emac_s *priv = (struct sam_emac_s *)arg;
+  struct sam_emac_s *priv = &g_emac;
+  uint32_t tsr;
 
-  nlldbg("Timeout!\n");
+  /* Disable further Ethernet interrupts.  Because Ethernet interrupts are
+   * also disabled if the TX timeout event occurs, there can be no race
+   * condition here.
+   */
+
+  up_disable_irq(SAM_IRQ_EMAC);
 
-  /* Then reset the hardware.  Just take the interface down, then back
-   * up again.
+  /* Check for the completion of a transmission.  Careful:
+   *
+   * ISR:TCOMP is set when a frame has been transmitted. Cleared on read (so
+   *   we cannot read it here).
+   * TSR:TXCOMP is set when a frame has been transmitted. Cleared by writing a
+   *   one to this bit.
    */
 
+  tsr = sam_getreg(priv, SAM_EMAC_TSR_OFFSET);
+  if ((tsr & EMAC_TSR_COMP) != 0)
+    {
+      /* If a TX transfer just completed, then cancel the TX timeout so
+       * there will be do race condition between any subsequent timeout
+       * expiration and the deferred interrupt processing.
+       */
+
+      wd_cancel(priv->txtimeout);
+    }
+
+  /* Schedule to perform the interrupt processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->irqwork, sam_interrupt_work, priv, 0);
+  return OK;
+}
+
+/****************************************************************************
+ * Function: sam_txtimeout_work
+ *
+ * Description:
+ *   Perform TX timeout related work from the worker thread
+ *
+ * Parameters:
+ *   arg - The argument passed when work_queue() as called.
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *   Ethernet interrupts are disabled
+ *
+ ****************************************************************************/
+
+static void sam_txtimeout_work(FAR void *arg)
+{
+  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
+
+  nerr("ERROR: Timeout!\n");
+
+  /* Reset the hardware.  Just take the interface down, then back up again. */
+
+  net_lock();
   sam_ifdown(&priv->dev);
   sam_ifup(&priv->dev);
 
   /* Then poll the network for new XMIT data */
 
   sam_dopoll(priv);
+  net_unlock();
 }
 
 /****************************************************************************
- * Function: sam_polltimer
+ * Function: sam_txtimeout_expiry
  *
  * Description:
- *   Periodic timer handler.  Called from the timer interrupt handler.
+ *   Our TX watchdog timed out.  Called from the timer interrupt handler.
+ *   The last TX never completed.  Reset the hardware and start again.
  *
  * Parameters:
  *   argc - The number of available arguments
@@ -1656,15 +1745,49 @@ static void sam_txtimeout(int argc, uint32_t arg, ...)
  *
  ****************************************************************************/
 
-static void sam_polltimer(int argc, uint32_t arg, ...)
+static void sam_txtimeout_expiry(int argc, uint32_t arg, ...)
 {
-  struct sam_emac_s *priv = (struct sam_emac_s *)arg;
-  struct net_driver_s   *dev  = &priv->dev;
+  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
+
+  /* Disable further Ethernet interrupts.  This will prevent some race
+   * conditions with interrupt work.  There is still a potential race
+   * condition with interrupt work that is already queued and in progress.
+   */
+
+  up_disable_irq(SAM_IRQ_EMAC);
+
+  /* Schedule to perform the TX timeout processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->irqwork, sam_txtimeout_work, priv, 0);
+}
+
+/****************************************************************************
+ * Function: sam_poll_work
+ *
+ * Description:
+ *   Perform periodic polling from the worker thread
+ *
+ * Parameters:
+ *   arg - The argument passed when work_queue() as called.
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *   Ethernet interrupts are disabled
+ *
+ ****************************************************************************/
+
+static void sam_poll_work(FAR void *arg)
+{
+  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
+  struct net_driver_s *dev  = &priv->dev;
 
   /* Check if the there are any free TX descriptors.  We cannot perform the
    * TX poll if we do not have buffering for another packet.
    */
 
+  net_lock();
   if (sam_txfree(priv) > 0)
     {
       /* Update TCP timing states and poll the network for new XMIT data. */
@@ -1674,7 +1797,35 @@ static void sam_polltimer(int argc, uint32_t arg, ...)
 
   /* Setup the watchdog poll timer again */
 
-  (void)wd_start(priv->txpoll, SAM_WDDELAY, sam_polltimer, 1, arg);
+  (void)wd_start(priv->txpoll, SAM_WDDELAY, sam_poll_expiry, 1, priv);
+  net_unlock();
+}
+
+/****************************************************************************
+ * Function: sam_poll_expiry
+ *
+ * Description:
+ *   Periodic timer handler.  Called from the timer interrupt handler.
+ *
+ * Parameters:
+ *   argc - The number of available arguments
+ *   arg  - The first argument
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Global interrupts are disabled by the watchdog logic.
+ *
+ ****************************************************************************/
+
+static void sam_poll_expiry(int argc, uint32_t arg, ...)
+{
+  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
+
+  /* Schedule to perform the interrupt processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->pollwork, sam_poll_work, priv, 0);
 }
 
 /****************************************************************************
@@ -1699,13 +1850,13 @@ static int sam_ifup(struct net_driver_s *dev)
   struct sam_emac_s *priv = (struct sam_emac_s *)dev->d_private;
   int ret;
 
-  nlldbg("Bringing up: %d.%d.%d.%d\n",
-         dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-         (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 
   /* Configure the EMAC interface for normal operation. */
 
-  nllvdbg("Initialize the EMAC\n");
+  ninfo("Initialize the EMAC\n");
   sam_emac_configure(priv);
 
   /* Set the MAC address (should have been configured while we were down) */
@@ -1723,7 +1874,7 @@ static int sam_ifup(struct net_driver_s *dev)
   ret = sam_phyinit(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phyinit failed: %d\n", ret);
+      nerr("ERROR: sam_phyinit failed: %d\n", ret);
       return ret;
     }
 
@@ -1732,20 +1883,20 @@ static int sam_ifup(struct net_driver_s *dev)
   ret = sam_autonegotiate(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_autonegotiate failed: %d\n", ret);
+      nerr("ERROR: sam_autonegotiate failed: %d\n", ret);
       return ret;
     }
 
   while (sam_linkup(priv) == 0);
-  nllvdbg("Link detected \n");
+  ninfo("Link detected \n");
 
   /* Enable normal MAC operation */
 
-  nllvdbg("Enable normal operation\n");
+  ninfo("Enable normal operation\n");
 
   /* Set and activate a timer process */
 
-  (void)wd_start(priv->txpoll, SAM_WDDELAY, sam_polltimer, 1, (uint32_t)priv);
+  (void)wd_start(priv->txpoll, SAM_WDDELAY, sam_poll_expiry, 1, (uint32_t)priv);
 
   /* Enable the EMAC interrupt */
 
@@ -1775,7 +1926,7 @@ static int sam_ifdown(struct net_driver_s *dev)
   struct sam_emac_s *priv = (struct sam_emac_s *)dev->d_private;
   irqstate_t flags;
 
-  nlldbg("Taking the network down\n");
+  ninfo("Taking the network down\n");
 
   /* Disable the EMAC interrupt */
 
@@ -1801,6 +1952,42 @@ static int sam_ifdown(struct net_driver_s *dev)
   return OK;
 }
 
+/****************************************************************************
+ * Function: sam_txavail_work
+ *
+ * Description:
+ *   Perform an out-of-cycle poll on the worker thread.
+ *
+ * Parameters:
+ *   arg - Reference to the NuttX driver state structure (cast to void*)
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Called on the higher priority worker thread.
+ *
+ ****************************************************************************/
+
+static void sam_txavail_work(FAR void *arg)
+{
+  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
+
+  ninfo("ifup: %d\n", priv->ifup);
+
+  /* Ignore the notification if the interface is not yet up */
+
+  net_lock();
+  if (priv->ifup)
+    {
+      /* Poll the network for new XMIT data */
+
+      sam_dopoll(priv);
+    }
+
+  net_unlock();
+}
+
 /****************************************************************************
  * Function: sam_txavail
  *
@@ -1810,7 +1997,7 @@ static int sam_ifdown(struct net_driver_s *dev)
  *   latency.
  *
  * Parameters:
- *   dev  - Reference to the NuttX driver state structure
+ *   dev - Reference to the NuttX driver state structure
  *
  * Returned Value:
  *   None
@@ -1822,27 +2009,20 @@ static int sam_ifdown(struct net_driver_s *dev)
 
 static int sam_txavail(struct net_driver_s *dev)
 {
-  struct sam_emac_s *priv = (struct sam_emac_s *)dev->d_private;
-  irqstate_t flags;
-
-  nllvdbg("ifup: %d\n", priv->ifup);
+  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)dev->d_private;
 
-  /* Disable interrupts because this function may be called from interrupt
-   * level processing.
+  /* Is our single work structure available?  It may not be if there are
+   * pending interrupt actions and we will have to ignore the Tx
+   * availability action.
    */
 
-  flags = enter_critical_section();
-
-  /* Ignore the notification if the interface is not yet up */
-
-  if (priv->ifup)
+  if (work_available(&priv->pollwork))
     {
-      /* Poll the network for new XMIT data */
+      /* Schedule to serialize the poll on the worker thread. */
 
-      sam_dopoll(priv);
+      work_queue(ETHWORK, &priv->pollwork, sam_txavail_work, priv, 0);
     }
 
-  leave_critical_section(flags);
   return OK;
 }
 
@@ -2003,8 +2183,8 @@ static int sam_addmac(struct net_driver_s *dev, const uint8_t *mac)
   unsigned int bit;
   UNUSED(priv);
 
-  nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Calculate the 6-bit has table index */
 
@@ -2077,8 +2257,8 @@ static int sam_rmmac(struct net_driver_s *dev, const uint8_t *mac)
   unsigned int bit;
   UNUSED(priv);
 
-  nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Calculate the 6-bit has table index */
 
@@ -2260,7 +2440,7 @@ static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_INFO)
 static void sam_phydump(struct sam_emac_s *priv)
 {
   uint32_t regval;
@@ -2273,21 +2453,21 @@ static void sam_phydump(struct sam_emac_s *priv)
   sam_putreg(priv, SAM_EMAC_NCR, regval);
 
 #ifdef CONFIG_SAMA5_EMAC_RMII
-  nllvdbg("RMII Registers (Address %02x)\n", priv->phyaddr);
+  ninfo("RMII Registers (Address %02x)\n", priv->phyaddr);
 #else /* defined(CONFIG_SAMA5_EMAC_MII) */
-  nllvdbg("MII Registers (Address %02x)\n", priv->phyaddr);
+  ninfo("MII Registers (Address %02x)\n", priv->phyaddr);
 #endif
 
   sam_phyread(priv, priv->phyaddr, MII_MCR, &phyval);
-  nllvdbg("  MCR:       %04x\n", phyval);
+  ninfo("  MCR:       %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, MII_MSR, &phyval);
-  nllvdbg("  MSR:       %04x\n", phyval);
+  ninfo("  MSR:       %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, MII_ADVERTISE, &phyval);
-  nllvdbg("  ADVERTISE: %04x\n", phyval);
+  ninfo("  ADVERTISE: %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, MII_LPA, &phyval);
-  nllvdbg("  LPR:       %04x\n", phyval);
+  ninfo("  LPR:       %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, CONFIG_SAMA5_EMAC_PHYSR, &phyval);
-  nllvdbg("  PHYSR:     %04x\n", phyval);
+  ninfo("  PHYSR:     %04x\n", phyval);
 
   /* Disable management port */
 
@@ -2410,7 +2590,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
   int timeout;
   int ret;
 
-  nllvdbg(" sam_phyreset\n");
+  ninfo(" sam_phyreset\n");
 
   /* Enable management port */
 
@@ -2423,7 +2603,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, MII_MCR_RESET);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywrite failed: %d\n", ret);
+      nerr("ERROR: sam_phywrite failed: %d\n", ret);
     }
 
   /* Wait for the PHY reset to complete */
@@ -2435,7 +2615,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
       int result = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
       if (result < 0)
         {
-          nlldbg("ERROR: Failed to read the MCR register: %d\n", ret);
+          nerr("ERROR: Failed to read the MCR register: %d\n", ret);
           ret = result;
         }
       else if ((mcr & MII_MCR_RESET) == 0)
@@ -2477,7 +2657,7 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
   unsigned int offset;
   int ret = -ESRCH;
 
-  nllvdbg("Find a valid PHY address\n");
+  ninfo("Find a valid PHY address\n");
 
   /* Enable management port */
 
@@ -2500,8 +2680,8 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
 
   else
     {
-      nlldbg("ERROR: sam_phyread failed for PHY address %02x: %d\n",
-             candidate, ret);
+      nerr("ERROR: sam_phyread failed for PHY address %02x: %d\n",
+           candidate, ret);
 
       for (offset = 0; offset < 32; offset++)
         {
@@ -2522,10 +2702,10 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
 
   if (ret == OK)
     {
-      nllvdbg("  PHYID1: %04x PHY addr: %d\n", phyval, candidate);
+      ninfo("  PHYID1: %04x PHY addr: %d\n", phyval, candidate);
       *phyaddr = candidate;
       sam_phyread(priv, candidate, CONFIG_SAMA5_EMAC_PHYSR, &phyval);
-      nllvdbg("  PHYSR:  %04x PHY addr: %d\n", phyval, candidate);
+      ninfo("  PHYSR:  %04x PHY addr: %d\n", phyval, candidate);
     }
 
   /* Disable management port */
@@ -2566,7 +2746,7 @@ static int sam_phyread(struct sam_emac_s *priv, uint8_t phyaddr,
   ret = sam_phywait(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+      nerr("ERROR: sam_phywait failed: %d\n", ret);
       return ret;
     }
 
@@ -2581,7 +2761,7 @@ static int sam_phyread(struct sam_emac_s *priv, uint8_t phyaddr,
   ret = sam_phywait(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+      nerr("ERROR: sam_phywait failed: %d\n", ret);
       return ret;
     }
 
@@ -2621,7 +2801,7 @@ static int sam_phywrite(struct sam_emac_s *priv, uint8_t phyaddr,
   ret = sam_phywait(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+      nerr("ERROR: sam_phywait failed: %d\n", ret);
       return ret;
     }
 
@@ -2636,7 +2816,7 @@ static int sam_phywrite(struct sam_emac_s *priv, uint8_t phyaddr,
   ret = sam_phywait(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+      nerr("ERROR: sam_phywait failed: %d\n", ret);
       return ret;
     }
 
@@ -2680,32 +2860,32 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, MII_PHYID1, &phyid1);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read PHYID1\n");
+      nerr("ERROR: Failed to read PHYID1\n");
       goto errout;
     }
 
-  nllvdbg("PHYID1: %04x PHY address: %02x\n", phyid1, priv->phyaddr);
+  ninfo("PHYID1: %04x PHY address: %02x\n", phyid1, priv->phyaddr);
 
   ret = sam_phyread(priv, priv->phyaddr, MII_PHYID2, &phyid2);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read PHYID2\n");
+      nerr("ERROR: Failed to read PHYID2\n");
       goto errout;
     }
 
-  nllvdbg("PHYID2: %04x PHY address: %02x\n", phyid2, priv->phyaddr);
+  ninfo("PHYID2: %04x PHY address: %02x\n", phyid2, priv->phyaddr);
 
   if (phyid1 == MII_OUI_MSB &&
      ((phyid2 & MII_PHYID2_OUI_MASK) >> MII_PHYID2_OUI_SHIFT) == MII_OUI_LSB)
     {
-      nllvdbg("  Vendor Model Number:   %04x\n",
-             (phyid2 & MII_PHYID2_MODEL_MASK) >> MII_PHYID2_MODEL_SHIFT);
-      nllvdbg("  Model Revision Number: %04x\n",
-             (phyid2 & MII_PHYID2_REV_MASK) >> MII_PHYID2_REV_SHIFT);
+      ninfo("  Vendor Model Number:   %04x\n",
+           (phyid2 & MII_PHYID2_MODEL_MASK) >> MII_PHYID2_MODEL_SHIFT);
+      ninfo("  Model Revision Number: %04x\n",
+           (phyid2 & MII_PHYID2_REV_MASK) >> MII_PHYID2_REV_SHIFT);
     }
   else
     {
-      nlldbg("ERROR: PHY not recognized\n");
+      nerr("ERROR: PHY not recognized\n");
     }
 
   /* Setup control register */
@@ -2713,7 +2893,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read MCR\n");
+      nerr("ERROR: Failed to read MCR\n");
       goto errout;
     }
 
@@ -2724,7 +2904,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to write MCR\n");
+      nerr("ERROR: Failed to write MCR\n");
       goto errout;
     }
 
@@ -2739,7 +2919,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, MII_ADVERTISE, advertise);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to write ANAR\n");
+      nerr("ERROR: Failed to write ANAR\n");
       goto errout;
     }
 
@@ -2748,7 +2928,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read MCR\n");
+      nerr("ERROR: Failed to read MCR\n");
       goto errout;
     }
 
@@ -2756,7 +2936,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to write MCR\n");
+      nerr("ERROR: Failed to write MCR\n");
       goto errout;
     }
 
@@ -2768,11 +2948,11 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to write MCR\n");
+      nerr("ERROR: Failed to write MCR\n");
       goto errout;
     }
 
-  nllvdbg("  MCR: %04x\n", mcr);
+  ninfo("  MCR: %04x\n", mcr);
 
   /* Check AutoNegotiate complete */
 
@@ -2782,7 +2962,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
       ret = sam_phyread(priv, priv->phyaddr, MII_MSR, &msr);
       if (ret < 0)
         {
-          nlldbg("ERROR: Failed to read MSR\n");
+          nerr("ERROR: Failed to read MSR\n");
           goto errout;
         }
 
@@ -2792,7 +2972,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
         {
           /* Yes.. break out of the loop */
 
-          nllvdbg("AutoNegotiate complete\n");
+          ninfo("AutoNegotiate complete\n");
           break;
         }
 
@@ -2800,7 +2980,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
 
       if (++timeout >= PHY_RETRY_MAX)
         {
-          nlldbg("ERROR: TimeOut\n");
+          nerr("ERROR: TimeOut\n");
           sam_phydump(priv);
           ret = -ETIMEDOUT;
           goto errout;
@@ -2812,7 +2992,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, MII_LPA, &lpa);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read ANLPAR\n");
+      nerr("ERROR: Failed to read ANLPAR\n");
       goto errout;
     }
 
@@ -2902,13 +3082,13 @@ static bool sam_linkup(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, MII_MSR, &msr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read MSR: %d\n", ret);
+      nerr("ERROR: Failed to read MSR: %d\n", ret);
       goto errout;
     }
 
   if ((msr & MII_MSR_LINKSTATUS) == 0)
     {
-      nlldbg("ERROR: MSR LinkStatus: %04x\n", msr);
+      nerr("ERROR: MSR LinkStatus: %04x\n", msr);
       goto errout;
     }
 
@@ -2917,7 +3097,7 @@ static bool sam_linkup(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, CONFIG_SAMA5_EMAC_PHYSR, &physr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read PHYSR: %d\n", ret);
+      nerr("ERROR: Failed to read PHYSR: %d\n", ret);
       goto errout;
     }
 
@@ -2955,7 +3135,7 @@ static bool sam_linkup(struct sam_emac_s *priv)
 
   /* Start the EMAC transfers */
 
-  nllvdbg("Link is up\n");
+  ninfo("Link is up\n");
   linkup = true;
 
 errout:
@@ -2996,7 +3176,7 @@ static int sam_phyinit(struct sam_emac_s *priv)
   mck = BOARD_MCK_FREQUENCY;
   if (mck > (160*1000*1000))
     {
-      ndbg("ERROR: Cannot realize PHY clock\n");
+      nerr("ERROR: Cannot realize PHY clock\n");
       return -EINVAL;
     }
   else if (mck > (80*1000*1000))
@@ -3024,7 +3204,7 @@ static int sam_phyinit(struct sam_emac_s *priv)
   ret = sam_phyfind(priv, &priv->phyaddr);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phyfind failed: %d\n", ret);
+      nerr("ERROR: sam_phyfind failed: %d\n", ret);
       return ret;
     }
 
@@ -3276,11 +3456,11 @@ static void sam_macaddress(struct sam_emac_s *priv)
   struct net_driver_s *dev = &priv->dev;
   uint32_t regval;
 
-  nllvdbg("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          dev->d_ifname,
-          dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
-          dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
-          dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
+  ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        dev->d_ifname,
+        dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
+        dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
+        dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
 
   /* Set the MAC address */
 
@@ -3342,7 +3522,7 @@ static void sam_ipv6multicast(struct sam_emac_s *priv)
   mac[4] = tmp16 & 0xff;
   mac[5] = tmp16 >> 8;
 
-  nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+  ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
         mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   (void)sam_addmac(dev, mac);
@@ -3388,7 +3568,7 @@ static int sam_emac_configure(struct sam_emac_s *priv)
 {
   uint32_t regval;
 
-  nllvdbg("Entry\n");
+  ninfo("Entry\n");
 
   /* Enable clocking to the EMAC peripheral */
 
@@ -3484,6 +3664,7 @@ int sam_emac_initialize(void)
   /* Initialize the driver structure */
 
   memset(priv, 0, sizeof(struct sam_emac_s));
+  priv->dev.d_buf     = g_pktbuf;        /* Single packet buffer */
   priv->dev.d_ifup    = sam_ifup;        /* I/F up (new IP address) callback */
   priv->dev.d_ifdown  = sam_ifdown;      /* I/F down callback */
   priv->dev.d_txavail = sam_txavail;     /* New TX data callback */
@@ -3501,7 +3682,7 @@ int sam_emac_initialize(void)
   priv->txpoll = wd_create();
   if (!priv->txpoll)
     {
-      ndbg("ERROR: Failed to create periodic poll timer\n");
+      nerr("ERROR: Failed to create periodic poll timer\n");
       ret = -EAGAIN;
       goto errout;
     }
@@ -3509,7 +3690,7 @@ int sam_emac_initialize(void)
   priv->txtimeout = wd_create();         /* Create TX timeout timer */
   if (!priv->txtimeout)
     {
-      ndbg("ERROR: Failed to create periodic poll timer\n");
+      nerr("ERROR: Failed to create periodic poll timer\n");
       ret = -EAGAIN;
       goto errout_with_txpoll;
     }
@@ -3523,7 +3704,7 @@ int sam_emac_initialize(void)
   ret = sam_buffer_initialize(priv);
   if (ret < 0)
     {
-      ndbg("ERROR: sam_buffer_initialize failed: %d\n", ret);
+      nerr("ERROR: sam_buffer_initialize failed: %d\n", ret);
       goto errout_with_txtimeout;
     }
 
@@ -3531,10 +3712,10 @@ int sam_emac_initialize(void)
    * the interface is in the 'up' state.
    */
 
-  ret = irq_attach(SAM_IRQ_EMAC, sam_emac_interrupt);
+  ret = irq_attach(SAM_IRQ_EMAC, sam_emac_interrupt, NULL);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to attach the handler to the IRQ%d\n", SAM_IRQ_EMAC);
+      nerr("ERROR: Failed to attach the handler to the IRQ%d\n", SAM_IRQ_EMAC);
       goto errout_with_buffers;
     }
 
@@ -3547,7 +3728,7 @@ int sam_emac_initialize(void)
   ret = sam_ifdown(&priv->dev);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to put the interface in the down state: %d\n", ret);
+      nerr("ERROR: Failed to put the interface in the down state: %d\n", ret);
       goto errout_with_buffers;
     }
 
@@ -3559,7 +3740,7 @@ int sam_emac_initialize(void)
       return ret;
     }
 
-  ndbg("ERROR: netdev_register() failed: %d\n", ret);
+  nerr("ERROR: netdev_register() failed: %d\n", ret);
 
 errout_with_buffers:
   sam_buffer_free(priv);
diff --git a/arch/arm/src/sama5/sam_emacb.c b/arch/arm/src/sama5/sam_emacb.c
index 270acd635b5b42f994028e602ae44e28d524ab5f..3fd2f903fbbafc705b5f55db426e730875a946c1 100644
--- a/arch/arm/src/sama5/sam_emacb.c
+++ b/arch/arm/src/sama5/sam_emacb.c
@@ -8,7 +8,7 @@
  * separate (mostly because the 'B' driver needs to support two EMAC blocks.
  * But the 'B' driver should replace the 'A' driver someday.
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * This logic derives from the SAM4E Ethernet driver which, in turn, derived
@@ -58,7 +58,7 @@
 
 #include 
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_SAMA5_EMACB_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_SAMA5_EMACB_DEBUG)
   /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
@@ -79,11 +79,7 @@
 #include 
 #include 
 #include 
-
-#ifdef CONFIG_NET_NOINTS
-#  include 
-#endif
-
+#include 
 #include 
 #include 
 #include 
@@ -113,12 +109,23 @@
  ****************************************************************************/
 /* Configuration ************************************************************/
 
-/* If processing is not done at the interrupt level, then high priority
- * work queue support is required.
+/* If processing is not done at the interrupt level, then work queue support
+ * is required.
  */
 
-#if defined(CONFIG_NET_NOINTS) && !defined(CONFIG_SCHED_HPWORK)
-#  error High priority work queue support is required
+#if !defined(CONFIG_SCHED_WORKQUEUE)
+#  error Work queue support is required
+#else
+
+  /* Select work queue */
+
+#  if defined(CONFIG_SAMA5_EMACB_HPWORK)
+#    define ETHWORK HPWORK
+#  elif defined(CONFIG_SAMA5_EMACB_LPWORK)
+#    define ETHWORK LPWORK
+#  else
+#    error Neither CONFIG_SAMA5_EMACB_HPWORK nor CONFIG_SAMA5_EMACB_LPWORK defined
+#  endif
 #endif
 
 /* EMAC0 Configuration ******************************************************/
@@ -295,7 +302,7 @@
  * enabled.
  */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_NET_INFO
 #  undef CONFIG_SAMA5_EMACB_REGDEBUG
 #endif
 
@@ -305,18 +312,7 @@
 #  define sam_dumppacket(m,a,n)
 #endif
 
-/* EMAC buffer sizes, number of buffers, and number of descriptors **********
- *
- * REVISIT: The CONFIG_NET_MULTIBUFFER might be useful.  It might be possible
- * to use this option to send and receive messages directly into the DMA
- * buffers, saving a copy.  There might be complications on the receiving
- * side, however, where buffers may wrap and where the size of the received
- * frame will typically be smaller than a full packet.
- */
-
-#ifdef CONFIG_NET_MULTIBUFFER
-#  error CONFIG_NET_MULTIBUFFER must not be set
-#endif
+/* EMAC buffer sizes, number of buffers, and number of descriptors **********/
 
 #define EMAC_RX_UNITSIZE 128                 /* Fixed size for RX buffer  */
 #define EMAC_TX_UNITSIZE CONFIG_NET_ETH_MTU  /* MAX size for Ethernet packet */
@@ -353,7 +349,6 @@ struct sam_emacattr_s
   /* Basic hardware information */
 
   uint32_t             base;         /* EMAC Register base address */
-  xcpt_t               handler;      /* EMAC interrupt handler */
   uint8_t              emac;         /* EMACn, n=0 or 1 */
   uint8_t              irq;          /* EMAC interrupt number */
 
@@ -417,9 +412,8 @@ struct sam_emac_s
   uint8_t               ifup    : 1; /* true:ifup false:ifdown */
   WDOG_ID               txpoll;      /* TX poll timer */
   WDOG_ID               txtimeout;   /* TX timeout timer */
-#ifdef CONFIG_NET_NOINTS
-  struct work_s         work;        /* For deferring work to the work queue */
-#endif
+  struct work_s         irqwork;     /* For deferring interrupt work to the work queue */
+  struct work_s         pollwork;    /* For deferring poll work to the work queue */
 
   /* This holds the information visible to the NuttX network */
 
@@ -459,7 +453,7 @@ struct sam_emac_s
  ****************************************************************************/
 /* Register operations ******************************************************/
 
-#if defined(CONFIG_SAMA5_EMACB_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAMA5_EMACB_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
 static bool sam_checkreg(struct sam_emac_s *priv, bool wr,
                          uint32_t regval, uintptr_t address);
 #endif
@@ -485,30 +479,16 @@ static void sam_dopoll(struct sam_emac_s *priv);
 static int  sam_recvframe(struct sam_emac_s *priv);
 static void sam_receive(struct sam_emac_s *priv);
 static void sam_txdone(struct sam_emac_s *priv);
-static inline void sam_interrupt_process(FAR struct sam_emac_s *priv);
-#ifdef CONFIG_NET_NOINTS
+
 static void sam_interrupt_work(FAR void *arg);
-#endif
-static int  sam_emac_interrupt(struct sam_emac_s *priv);
-#ifdef CONFIG_SAMA5_EMAC0
-static int sam_emac0_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_SAMA5_EMAC1
-static int sam_emac1_interrupt(int irq, void *context);
-#endif
+static int  sam_emac_interrupt(int irq, void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
-static inline void sam_txtimeout_process(FAR struct sam_emac_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void sam_txtimeout_work(FAR void *arg);
-#endif
 static void sam_txtimeout_expiry(int argc, uint32_t arg, ...);
 
-static inline void sam_poll_process(FAR struct sam_emac_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void sam_poll_work(FAR void *arg);
-#endif
 static void sam_poll_expiry(int argc, uint32_t arg, ...);
 
 /* NuttX callback functions */
@@ -516,10 +496,7 @@ static void sam_poll_expiry(int argc, uint32_t arg, ...);
 static int  sam_ifup(struct net_driver_s *dev);
 static int  sam_ifdown(struct net_driver_s *dev);
 
-static inline void sam_txavail_process(FAR struct sam_emac_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void sam_txavail_work(FAR void *arg);
-#endif
 static int  sam_txavail(struct net_driver_s *dev);
 
 #if defined(CONFIG_NET_IGMP) || defined(CONFIG_NET_ICMPv6)
@@ -536,7 +513,7 @@ static int  sam_ioctl(struct net_driver_s *dev, int cmd, long arg);
 
 /* PHY Initialization */
 
-#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_INFO)
 static void sam_phydump(struct sam_emac_s *priv);
 #else
 #  define sam_phydump(priv)
@@ -650,7 +627,6 @@ static const struct sam_emacattr_s g_emac0_attr =
   /* Basic hardware information */
 
   .base         = SAM_EMAC0_VBASE,
-  .handler      = sam_emac0_interrupt,
   .emac         = EMAC0_INTF,
   .irq          = SAM_IRQ_EMAC0,
 
@@ -709,6 +685,19 @@ static const struct sam_emacattr_s g_emac0_attr =
 #endif
 };
 
+/* A single packet buffer is used
+ *
+ * REVISIT:  It might be possible to use this option to send and receive
+ * messages directly into the DMA buffers, saving a copy.  There might be
+ * complications on the receiving side, however, where buffers may wrap
+ * and where the size of the received frame will typically be smaller than
+ * a full packet.
+ */
+
+static uint8_t g_pktbuf0[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
+
+/* EMAC0 peripheral state */
+
 static struct sam_emac_s g_emac0;
 #endif
 
@@ -718,7 +707,6 @@ static const struct sam_emacattr_s g_emac1_attr =
   /* Basic hardware information */
 
   .base         = SAM_EMAC1_VBASE,
-  .handler      = sam_emac1_interrupt,
   .emac         = EMAC1_INTF,
   .irq          = SAM_IRQ_EMAC1,
 
@@ -777,6 +765,19 @@ static const struct sam_emacattr_s g_emac1_attr =
 #endif
 };
 
+/* A single packet buffer is used
+ *
+ * REVISIT:  It might be possible to use this option to send and receive
+ * messages directly into the DMA buffers, saving a copy.  There might be
+ * complications on the receiving side, however, where buffers may wrap
+ * and where the size of the received frame will typically be smaller than
+ * a full packet.
+ */
+
+static uint8_t g_pktbuf1[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
+
+/* EMAC1 peripheral state */
+
 static struct sam_emac_s g_emac1;
 #endif
 
@@ -820,7 +821,7 @@ static bool sam_checkreg(struct sam_emac_s *priv, bool wr, uint32_t regval,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", priv->ntimes);
+          ninfo("...[Repeats %d times]...\n", priv->ntimes);
         }
 
       /* Save information about the new access */
@@ -853,7 +854,7 @@ static uint32_t sam_getreg(struct sam_emac_s *priv, uint16_t offset)
 #ifdef CONFIG_SAMA5_EMACB_REGDEBUG
   if (sam_checkreg(priv, false, regval, regaddr))
     {
-      lldbg("%08x->%08x\n", regaddr, regval);
+      ninfo("%08x->%08x\n", regaddr, regval);
     }
 #endif
 
@@ -877,7 +878,7 @@ static void sam_putreg(struct sam_emac_s *priv, uint16_t offset,
 #ifdef CONFIG_SAMA5_EMACB_REGDEBUG
   if (sam_checkreg(priv, true, regval, regaddr))
     {
-      lldbg("%08x<-%08x\n", regaddr, regval);
+      ninfo("%08x<-%08x\n", regaddr, regval);
     }
 #endif
 
@@ -970,7 +971,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
   priv->txdesc = (struct emac_txdesc_s *)kmm_memalign(8, allocsize);
   if (!priv->txdesc)
     {
-      nlldbg("ERROR: Failed to allocate TX descriptors\n");
+      nerr("ERROR: Failed to allocate TX descriptors\n");
       return -ENOMEM;
     }
 
@@ -980,7 +981,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
   priv->rxdesc = (struct emac_rxdesc_s *)kmm_memalign(8, allocsize);
   if (!priv->rxdesc)
     {
-      nlldbg("ERROR: Failed to allocate RX descriptors\n");
+      nerr("ERROR: Failed to allocate RX descriptors\n");
       sam_buffer_free(priv);
       return -ENOMEM;
     }
@@ -991,7 +992,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
   priv->txbuffer = (uint8_t *)kmm_memalign(8, allocsize);
   if (!priv->txbuffer)
     {
-      nlldbg("ERROR: Failed to allocate TX buffer\n");
+      nerr("ERROR: Failed to allocate TX buffer\n");
       sam_buffer_free(priv);
       return -ENOMEM;
     }
@@ -1000,7 +1001,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
   priv->rxbuffer = (uint8_t *)kmm_memalign(8, allocsize);
   if (!priv->rxbuffer)
     {
-      nlldbg("ERROR: Failed to allocate RX buffer\n");
+      nerr("ERROR: Failed to allocate RX buffer\n");
       sam_buffer_free(priv);
       return -ENOMEM;
     }
@@ -1088,14 +1089,14 @@ static int sam_transmit(struct sam_emac_s *priv)
   uint32_t regval;
   uint32_t status;
 
-  nllvdbg("d_len: %d txhead: %d\n",  dev->d_len, priv->txhead);
+  ninfo("d_len: %d txhead: %d\n",  dev->d_len, priv->txhead);
   sam_dumppacket("Transmit packet", dev->d_buf, dev->d_len);
 
   /* Check parameter */
 
   if (dev->d_len > EMAC_TX_UNITSIZE)
     {
-      nlldbg("ERROR: Packet too big: %d\n", dev->d_len);
+      nerr("ERROR: Packet too big: %d\n", dev->d_len);
       return -EINVAL;
     }
 
@@ -1107,7 +1108,7 @@ static int sam_transmit(struct sam_emac_s *priv)
 
   if (sam_txfree(priv) < 1)
     {
-      nlldbg("ERROR: No free TX descriptors\n");
+      nerr("ERROR: No free TX descriptors\n");
       return -EBUSY;
     }
 
@@ -1169,7 +1170,7 @@ static int sam_transmit(struct sam_emac_s *priv)
 
   if (sam_txfree(priv) < 1)
     {
-      nllvdbg("Disabling RX interrupts\n");
+      ninfo("Disabling RX interrupts\n");
       sam_putreg(priv, SAM_EMAC_IDR_OFFSET, EMAC_INT_RCOMP);
     }
 
@@ -1349,7 +1350,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
 
   arch_invalidate_dcache((uintptr_t)rxdesc,
                          (uintptr_t)rxdesc + sizeof(struct emac_rxdesc_s));
-  nllvdbg("rxndx: %d\n", rxndx);
+  ninfo("rxndx: %d\n", rxndx);
 
   while ((rxdesc->addr & EMACRXD_ADDR_OWNER) != 0)
     {
@@ -1405,7 +1406,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
         {
           if (rxndx == priv->rxndx)
             {
-              nllvdbg("ERROR: No EOF (Invalid of buffers too small)\n");
+              nerr("ERROR: No EOF (Invalid of buffers too small)\n");
               do
                 {
                   /* Give ownership back to the EMAC */
@@ -1460,7 +1461,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
               /* Frame size from the EMAC */
 
               dev->d_len = (rxdesc->status & EMACRXD_STA_FRLEN_MASK);
-              nllvdbg("packet %d-%d (%d)\n", priv->rxndx, rxndx, dev->d_len);
+              ninfo("packet %d-%d (%d)\n", priv->rxndx, rxndx, dev->d_len);
 
               /* All data have been copied in the application frame buffer,
                * release the RX descriptor
@@ -1491,11 +1492,11 @@ static int sam_recvframe(struct sam_emac_s *priv)
                * all of the data.
                */
 
-              nllvdbg("rxndx: %d d_len: %d\n", priv->rxndx, dev->d_len);
+              ninfo("rxndx: %d d_len: %d\n", priv->rxndx, dev->d_len);
               if (pktlen < dev->d_len)
                 {
-                  nlldbg("ERROR: Buffer size %d; frame size %d\n",
-                         dev->d_len, pktlen);
+                  nerr("ERROR: Buffer size %d; frame size %d\n",
+                       dev->d_len, pktlen);
                   return -E2BIG;
                 }
 
@@ -1535,7 +1536,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
   /* No packet was found */
 
   priv->rxndx = rxndx;
-  nllvdbg("rxndx: %d\n", priv->rxndx);
+  ninfo("rxndx: %d\n", priv->rxndx);
   return -EAGAIN;
 }
 
@@ -1575,7 +1576,7 @@ static void sam_receive(struct sam_emac_s *priv)
 
       if (dev->d_len > CONFIG_NET_ETH_MTU)
         {
-          nlldbg("DROPPED: Too big: %d\n", dev->d_len);
+          nwarn("WARNING: Dropped, Too big: %d\n", dev->d_len);
           continue;
         }
 
@@ -1590,7 +1591,7 @@ static void sam_receive(struct sam_emac_s *priv)
 #ifdef CONFIG_NET_IPv4
       if (BUF->type == HTONS(ETHTYPE_IP))
         {
-          nllvdbg("IPv4 frame\n");
+          ninfo("IPv4 frame\n");
 
           /* Handle ARP on input then give the IPv4 packet to the network
            * layer
@@ -1630,7 +1631,7 @@ static void sam_receive(struct sam_emac_s *priv)
 #ifdef CONFIG_NET_IPv6
       if (BUF->type == HTONS(ETHTYPE_IP6))
         {
-          nllvdbg("Iv6 frame\n");
+          ninfo("Iv6 frame\n");
 
           /* Give the IPv6 packet to the network layer */
 
@@ -1667,7 +1668,7 @@ static void sam_receive(struct sam_emac_s *priv)
 #ifdef CONFIG_NET_ARP
       if (BUF->type == htons(ETHTYPE_ARP))
         {
-          nllvdbg("ARP frame\n");
+          ninfo("ARP frame\n");
 
           /* Handle ARP packet */
 
@@ -1685,7 +1686,7 @@ static void sam_receive(struct sam_emac_s *priv)
       else
 #endif
         {
-          nlldbg("DROPPED: Unknown type: %04x\n", BUF->type);
+          nwarn("WARNING: Dropped, Unknown type: %04x\n", BUF->type);
         }
     }
 }
@@ -1803,25 +1804,25 @@ static void sam_txdone(struct sam_emac_s *priv)
 }
 
 /****************************************************************************
- * Function: sam_interrupt_process
+ * Function: sam_interrupt_work
  *
  * Description:
- *   Interrupt processing.  This may be performed either within the interrupt
- *   handler or on the worker thread, depending upon the configuration
+ *   Perform interrupt related work from the worker thread
  *
  * Parameters:
- *   priv - Reference to the driver state structure
+ *   arg - The argument passed when work_queue() was called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
  *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
+static void sam_interrupt_work(FAR void *arg)
 {
+  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
   uint32_t isr;
   uint32_t rsr;
   uint32_t tsr;
@@ -1830,13 +1831,16 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
   uint32_t pending;
   uint32_t clrbits;
 
+  /* Process pending Ethernet interrupts */
+
+  net_lock();
   isr = sam_getreg(priv, SAM_EMAC_ISR_OFFSET);
   rsr = sam_getreg(priv, SAM_EMAC_RSR_OFFSET);
   tsr = sam_getreg(priv, SAM_EMAC_TSR_OFFSET);
   imr = sam_getreg(priv, SAM_EMAC_IMR_OFFSET);
 
   pending = isr & ~(imr | EMAC_INT_UNUSED);
-  nllvdbg("isr: %08x pending: %08x\n", isr, pending);
+  ninfo("isr: %08x pending: %08x\n", isr, pending);
 
   /* Check for the completion of a transmission.  This should be done before
    * checking for received data (because receiving can cause another transmission
@@ -1862,7 +1866,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
           clrbits = EMAC_TSR_RLE | sam_txinuse(priv);
           sam_txreset(priv);
 
-          nlldbg("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
+          nerr("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
 
           regval = sam_getreg(priv, SAM_EMAC_NCR_OFFSET);
           regval |= EMAC_NCR_TXEN;
@@ -1873,7 +1877,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
 
       if ((tsr & EMAC_TSR_COL) != 0)
         {
-          nlldbg("ERROR: Collision occurred TSR: %08x\n", tsr);
+          nerr("ERROR: Collision occurred TSR: %08x\n", tsr);
           clrbits |= EMAC_TSR_COL;
         }
 
@@ -1881,7 +1885,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
 
       if ((tsr & EMAC_TSR_TFC) != 0)
         {
-          nlldbg("ERROR: Transmit Frame Corruption due to AHB error: %08x\n", tsr);
+          nerr("ERROR: Transmit Frame Corruption due to AHB error: %08x\n", tsr);
           clrbits |= EMAC_TSR_TFC;
         }
 
@@ -1896,7 +1900,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
 
       if ((tsr & EMAC_TSR_UND) != 0)
         {
-          nlldbg("ERROR: Transmit Underrun TSR: %08x\n", tsr);
+          nerr("ERROR: Transmit Underrun TSR: %08x\n", tsr);
           clrbits |= EMAC_TSR_UND;
         }
 
@@ -1933,7 +1937,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
 
       if ((rsr & EMAC_RSR_RXOVR) != 0)
         {
-          nlldbg("ERROR: Receiver overrun RSR: %08x\n", rsr);
+          nerr("ERROR: Receiver overrun RSR: %08x\n", rsr);
           clrbits |= EMAC_RSR_RXOVR;
         }
 
@@ -1950,7 +1954,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
 
       if ((rsr & EMAC_RSR_BNA) != 0)
         {
-          nlldbg("ERROR: Buffer not available RSR: %08x\n", rsr);
+          nerr("ERROR: Buffer not available RSR: %08x\n", rsr);
           clrbits |= EMAC_RSR_BNA;
         }
 
@@ -1972,7 +1976,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
 
   if ((pending & EMAC_INT_PFNZ) != 0)
     {
-      nlldbg("Pause frame received\n");
+      nwarn("WARNING: Pause frame received\n");
     }
 
   /* Check for Pause Time Zero (PTZ)
@@ -1982,45 +1986,16 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
 
   if ((pending & EMAC_INT_PTZ) != 0)
     {
-      nlldbg("Pause TO!\n");
+      nwarn("WARNING: Pause TO!\n");
     }
 #endif
-}
-
-/****************************************************************************
- * Function: sam_interrupt_work
- *
- * Description:
- *   Perform interrupt related work from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() was called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void sam_interrupt_work(FAR void *arg)
-{
-  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
-  net_lock_t state;
-
-  /* Process pending Ethernet interrupts */
 
-  state = net_lock();
-  sam_interrupt_process(priv);
-  net_unlock(state);
+  net_unlock();
 
   /* Re-enable Ethernet interrupts */
 
   up_enable_irq(priv->attr->irq);
 }
-#endif
 
 /****************************************************************************
  * Function: sam_emac_interrupt
@@ -2029,7 +2004,7 @@ static void sam_interrupt_work(FAR void *arg)
  *   Common hardware interrupt handler
  *
  * Parameters:
- *   priv    - Reference to the EMAC private state structure
+ *   Standard interrupt handler inputs
  *
  * Returned Value:
  *   OK on success
@@ -2038,11 +2013,13 @@ static void sam_interrupt_work(FAR void *arg)
  *
  ****************************************************************************/
 
-static int sam_emac_interrupt(struct sam_emac_s *priv)
+static int sam_emac_interrupt(int irq, void *context, FAR void *arg)
 {
-#ifdef CONFIG_NET_NOINTS
+  struct sam_emac_s *priv = (struct sam_emac_s *)arg;
   uint32_t tsr;
 
+  DEBUGASSERT(priv != NULL);
+
   /* Disable further Ethernet interrupts.  Because Ethernet interrupts are
    * also disabled if the TX timeout event occurs, there can be no race
    * condition here.
@@ -2066,130 +2043,50 @@ static int sam_emac_interrupt(struct sam_emac_s *priv)
        * expiration and the deferred interrupt processing.
        */
 
-       wd_cancel(priv->txtimeout);
-
-      /* Make sure that the TX poll timer is running (if it is already
-       * running, the following would restart it).  This is necessary to
-       * avoid certain race conditions where the polling sequence can be
-       * interrupted.
-       */
-
-      (void)wd_start(priv->txpoll, SAM_WDDELAY, sam_poll_expiry, 1, priv);
+      wd_cancel(priv->txtimeout);
     }
 
-  /* Cancel any pending poll work */
-
-  work_cancel(HPWORK, &priv->work);
-
   /* Schedule to perform the interrupt processing on the worker thread. */
 
-  work_queue(HPWORK, &priv->work, sam_interrupt_work, priv, 0);
-
-#else
-  /* Process the interrupt now */
-
-  sam_interrupt_process(priv);
-#endif
-
+  work_queue(ETHWORK, &priv->irqwork, sam_interrupt_work, priv, 0);
   return OK;
 }
 
 /****************************************************************************
- * Function: sam_emac0/1_interrupt
+ * Function: sam_txtimeout_work
  *
  * Description:
- *   EMAC hardware interrupt handler
+ *   Perform TX timeout related work from the worker thread
  *
  * Parameters:
- *   irq     - Number of the IRQ that generated the interrupt
- *   context - Interrupt register state save info (architecture-specific)
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
  *   OK on success
  *
  * Assumptions:
+ *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-#ifdef CONFIG_SAMA5_EMAC0
-static int sam_emac0_interrupt(int irq, void *context)
-{
-  return sam_emac_interrupt(&g_emac0);
-}
-#endif
-
-#ifdef CONFIG_SAMA5_EMAC1
-static int sam_emac1_interrupt(int irq, void *context)
+static void sam_txtimeout_work(FAR void *arg)
 {
-  return sam_emac_interrupt(&g_emac1);
-}
-#endif
-
-/****************************************************************************
- * Function: sam_txtimeout_process
- *
- * Description:
- *   Process a TX timeout.  Called from the either the watchdog timer
- *   expiration logic or from the worker thread, depending upon the
- *   configuration.  The timeout means that the last TX never completed.
- *   Reset the hardware and start again.
- *
- * Parameters:
- *   priv - Reference to the driver state structure
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Global interrupts are disabled by the watchdog logic.
- *
- ****************************************************************************/
+  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
 
-static inline void sam_txtimeout_process(FAR struct sam_emac_s *priv)
-{
-  nlldbg("Timeout!\n");
+  nerr("ERROR: Timeout!\n");
 
   /* Reset the hardware.  Just take the interface down, then back up again. */
 
+  net_lock();
   sam_ifdown(&priv->dev);
   sam_ifup(&priv->dev);
 
   /* Then poll the network for new XMIT data */
 
   sam_dopoll(priv);
+  net_unlock();
 }
 
-/****************************************************************************
- * Function: sam_txtimeout_work
- *
- * Description:
- *   Perform TX timeout related work from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() as called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void sam_txtimeout_work(FAR void *arg)
-{
-  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
-  net_lock_t state;
-
-  /* Process pending Ethernet interrupts */
-
-  state = net_lock();
-  sam_txtimeout_process(priv);
-  net_unlock(state);
-}
-#endif
-
 /****************************************************************************
  * Function: sam_txtimeout_expiry
  *
@@ -2213,7 +2110,6 @@ static void sam_txtimeout_expiry(int argc, uint32_t arg, ...)
 {
   FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
 
-#ifdef CONFIG_NET_NOINTS
   /* Disable further Ethernet interrupts.  This will prevent some race
    * conditions with interrupt work.  There is still a potential race
    * condition with interrupt work that is already queued and in progress.
@@ -2221,47 +2117,38 @@ static void sam_txtimeout_expiry(int argc, uint32_t arg, ...)
 
   up_disable_irq(priv->attr->irq);
 
-  /* Cancel any pending poll or interrupt work.  This will have no effect
-   * on work that has already been started.
-   */
-
-  work_cancel(HPWORK, &priv->work);
-
   /* Schedule to perform the TX timeout processing on the worker thread. */
 
-  work_queue(HPWORK, &priv->work, sam_txtimeout_work, priv, 0);
-#else
-  /* Process the timeout now */
-
-  sam_txtimeout_process(priv);
-#endif
+  work_queue(ETHWORK, &priv->irqwork, sam_txtimeout_work, priv, 0);
 }
 
 /****************************************************************************
- * Function: sam_poll_process
+ * Function: sam_poll_work
  *
  * Description:
- *   Perform the periodic poll.  This may be called either from watchdog
- *   timer logic or from the worker thread, depending upon the configuration.
+ *   Perform periodic polling from the worker thread
  *
  * Parameters:
- *   priv - Reference to the driver state structure
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
+ *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static inline void sam_poll_process(FAR struct sam_emac_s *priv)
+static void sam_poll_work(FAR void *arg)
 {
+  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
   struct net_driver_s *dev  = &priv->dev;
 
   /* Check if the there are any free TX descriptors.  We cannot perform the
    * TX poll if we do not have buffering for another packet.
    */
 
+  net_lock();
   if (sam_txfree(priv) > 0)
     {
       /* Update TCP timing states and poll the network for new XMIT data. */
@@ -2272,39 +2159,9 @@ static inline void sam_poll_process(FAR struct sam_emac_s *priv)
   /* Setup the watchdog poll timer again */
 
   (void)wd_start(priv->txpoll, SAM_WDDELAY, sam_poll_expiry, 1, priv);
+  net_unlock();
 }
 
-/****************************************************************************
- * Function: sam_poll_work
- *
- * Description:
- *   Perform periodic polling from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() as called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void sam_poll_work(FAR void *arg)
-{
-  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
-  net_lock_t state;
-
-  /* Perform the poll */
-
-  state = net_lock();
-  sam_poll_process(priv);
-  net_unlock(state);
-}
-#endif
-
 /****************************************************************************
  * Function: sam_poll_expiry
  *
@@ -2327,31 +2184,9 @@ static void sam_poll_expiry(int argc, uint32_t arg, ...)
 {
   FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
 
-#ifdef CONFIG_NET_NOINTS
-  /* Is our single work structure available?  It may not be if there are
-   * pending interrupt actions.
-   */
-
-  if (work_available(&priv->work))
-    {
-      /* Schedule to perform the interrupt processing on the worker thread. */
-
-      work_queue(HPWORK, &priv->work, sam_poll_work, priv, 0);
-    }
-  else
-    {
-      /* No.. Just re-start the watchdog poll timer, missing one polling
-       * cycle.
-       */
-
-      (void)wd_start(priv->txpoll, SAM_WDDELAY, sam_poll_expiry, 1, arg);
-    }
-
-#else
-  /* Process the interrupt now */
+  /* Schedule to perform the interrupt processing on the worker thread. */
 
-  sam_poll_process(priv);
-#endif
+  work_queue(ETHWORK, &priv->pollwork, sam_poll_work, priv, 0);
 }
 
 /****************************************************************************
@@ -2377,20 +2212,20 @@ static int sam_ifup(struct net_driver_s *dev)
   int ret;
 
 #ifdef CONFIG_NET_IPv4
-  ndbg("Bringing up: %d.%d.%d.%d\n",
-       dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-       (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 #endif
 #ifdef CONFIG_NET_IPv6
-  ndbg("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
-       dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
-       dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
-       dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
+  ninfo("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+        dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
+        dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
+        dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
 #endif
 
   /* Configure the EMAC interface for normal operation. */
 
-  nllvdbg("Initialize the EMAC\n");
+  ninfo("Initialize the EMAC\n");
   sam_emac_configure(priv);
 
   /* Set the MAC address (should have been configured while we were down) */
@@ -2408,7 +2243,7 @@ static int sam_ifup(struct net_driver_s *dev)
   ret = sam_phyinit(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phyinit failed: %d\n", ret);
+      nerr("ERROR: sam_phyinit failed: %d\n", ret);
       return ret;
     }
 
@@ -2417,16 +2252,16 @@ static int sam_ifup(struct net_driver_s *dev)
   ret = sam_autonegotiate(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_autonegotiate failed: %d\n", ret);
+      nerr("ERROR: sam_autonegotiate failed: %d\n", ret);
       return ret;
     }
 
   while (sam_linkup(priv) == 0);
-  nllvdbg("Link detected \n");
+  ninfo("Link detected \n");
 
   /* Enable normal MAC operation */
 
-  nllvdbg("Enable normal operation\n");
+  ninfo("Enable normal operation\n");
 
   /* Set and activate a timer process */
 
@@ -2460,7 +2295,7 @@ static int sam_ifdown(struct net_driver_s *dev)
   struct sam_emac_s *priv = (struct sam_emac_s *)dev->d_private;
   irqstate_t flags;
 
-  nlldbg("Taking the network down\n");
+  ninfo("Taking the network down\n");
 
   /* Disable the EMAC interrupt */
 
@@ -2487,66 +2322,40 @@ static int sam_ifdown(struct net_driver_s *dev)
 }
 
 /****************************************************************************
- * Function: sam_txavail_process
+ * Function: sam_txavail_work
  *
  * Description:
- *   Perform an out-of-cycle poll.
+ *   Perform an out-of-cycle poll on the worker thread.
  *
  * Parameters:
- *   dev - Reference to the NuttX driver state structure
+ *   arg - Reference to the NuttX driver state structure (cast to void*)
  *
  * Returned Value:
  *   None
  *
  * Assumptions:
- *   Called in normal user mode
+ *   Called on the higher priority worker thread.
  *
  ****************************************************************************/
 
-static inline void sam_txavail_process(FAR struct sam_emac_s *priv)
+static void sam_txavail_work(FAR void *arg)
 {
-  nllvdbg("ifup: %d\n", priv->ifup);
+  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
+
+  ninfo("ifup: %d\n", priv->ifup);
 
   /* Ignore the notification if the interface is not yet up */
 
+  net_lock();
   if (priv->ifup)
     {
       /* Poll the network for new XMIT data */
 
       sam_dopoll(priv);
     }
-}
-
-/****************************************************************************
- * Function: sam_txavail_work
- *
- * Description:
- *   Perform an out-of-cycle poll on the worker thread.
- *
- * Parameters:
- *   arg - Reference to the NuttX driver state structure (cast to void*)
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Called on the higher priority worker thread.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void sam_txavail_work(FAR void *arg)
-{
-  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
-  net_lock_t state;
-
-  /* Perform the poll */
 
-  state = net_lock();
-  sam_txavail_process(priv);
-  net_unlock(state);
+  net_unlock();
 }
-#endif
 
 /****************************************************************************
  * Function: sam_txavail
@@ -2571,34 +2380,18 @@ static int sam_txavail(struct net_driver_s *dev)
 {
   FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)dev->d_private;
 
-#ifdef CONFIG_NET_NOINTS
   /* Is our single work structure available?  It may not be if there are
    * pending interrupt actions and we will have to ignore the Tx
    * availability action.
    */
 
-  if (work_available(&priv->work))
+  if (work_available(&priv->pollwork))
     {
       /* Schedule to serialize the poll on the worker thread. */
 
-      work_queue(HPWORK, &priv->work, sam_txavail_work, priv, 0);
+      work_queue(ETHWORK, &priv->pollwork, sam_txavail_work, priv, 0);
     }
 
-#else
-  irqstate_t flags;
-
-  /* Disable interrupts because this function may be called from interrupt
-   * level processing.
-   */
-
-  flags = enter_critical_section();
-
-  /* Perform the out-of-cycle poll now */
-
-  sam_txavail_process(priv);
-  leave_critical_section(flags);
-#endif
-
   return OK;
 }
 
@@ -2758,8 +2551,8 @@ static int sam_addmac(struct net_driver_s *dev, const uint8_t *mac)
   unsigned int ndx;
   unsigned int bit;
 
-  nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Calculate the 6-bit has table index */
 
@@ -2831,8 +2624,8 @@ static int sam_rmmac(struct net_driver_s *dev, const uint8_t *mac)
   unsigned int ndx;
   unsigned int bit;
 
-  nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Calculate the 6-bit has table index */
 
@@ -3014,7 +2807,7 @@ static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_INFO)
 static void sam_phydump(struct sam_emac_s *priv)
 {
   uint32_t regval;
@@ -3026,19 +2819,19 @@ static void sam_phydump(struct sam_emac_s *priv)
   regval |= EMAC_NCR_MPE;
   sam_putreg(priv, SAM_EMAC_NCR_OFFSET, regval);
 
-  nllvdbg("%s Registers (Address %02x)\n",
-          priv->attr->rmii ? "RMII" : "MII", priv->phyaddr);
+  ninfo("%s Registers (Address %02x)\n",
+        priv->attr->rmii ? "RMII" : "MII", priv->phyaddr);
 
   sam_phyread(priv, priv->phyaddr, MII_MCR, &phyval);
-  nllvdbg("  MCR:       %04x\n", phyval);
+  ninfo("  MCR:       %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, MII_MSR, &phyval);
-  nllvdbg("  MSR:       %04x\n", phyval);
+  ninfo("  MSR:       %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, MII_ADVERTISE, &phyval);
-  nllvdbg("  ADVERTISE: %04x\n", phyval);
+  ninfo("  ADVERTISE: %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, MII_LPA, &phyval);
-  nllvdbg("  LPR:       %04x\n", phyval);
+  ninfo("  LPR:       %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, priv->attr->physr, &phyval);
-  nllvdbg("  PHYSR:     %04x\n", phyval);
+  ninfo("  PHYSR:     %04x\n", phyval);
 
   /* Disable management port */
 
@@ -3198,7 +2991,7 @@ static int sam_phyintenable(struct sam_emac_s *priv)
   else
 #endif
     {
-      ndbg("ERROR: Unsupported PHY type: %d\n", priv->phytype);
+      nerr("ERROR: Unsupported PHY type: %d\n", priv->phytype);
       ret = -ENOSYS;
     }
 
@@ -3262,7 +3055,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
   int timeout;
   int ret;
 
-  nllvdbg(" sam_phyreset\n");
+  ninfo(" sam_phyreset\n");
 
   /* Enable management port */
 
@@ -3275,7 +3068,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, MII_MCR_RESET);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywrite failed: %d\n", ret);
+      nerr("ERROR: sam_phywrite failed: %d\n", ret);
     }
 
   /* Wait for the PHY reset to complete */
@@ -3287,7 +3080,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
       int result = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
       if (result < 0)
         {
-          nlldbg("ERROR: Failed to read the MCR register: %d\n", ret);
+          nerr("ERROR: Failed to read the MCR register: %d\n", ret);
           ret = result;
         }
       else if ((mcr & MII_MCR_RESET) == 0)
@@ -3329,7 +3122,7 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
   unsigned int offset;
   int ret = -ESRCH;
 
-  nllvdbg("Find a valid PHY address\n");
+  ninfo("Find a valid PHY address\n");
 
   /* Enable management port */
 
@@ -3352,8 +3145,8 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
 
   else
     {
-      nlldbg("ERROR: sam_phyread failed for PHY address %02x: %d\n",
-             candidate, ret);
+      nerr("ERROR: sam_phyread failed for PHY address %02x: %d\n",
+           candidate, ret);
 
       for (offset = 0; offset < 32; offset++)
         {
@@ -3374,10 +3167,10 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
 
   if (ret == OK)
     {
-      nllvdbg("  PHYID1: %04x PHY addr: %d\n", phyval, candidate);
+      ninfo("  PHYID1: %04x PHY addr: %d\n", phyval, candidate);
       *phyaddr = candidate;
       sam_phyread(priv, candidate, priv->attr->physr, &phyval);
-      nllvdbg("  PHYSR:  %04x PHY addr: %d\n", phyval, candidate);
+      ninfo("  PHYSR:  %04x PHY addr: %d\n", phyval, candidate);
     }
 
   /* Disable management port */
@@ -3418,7 +3211,7 @@ static int sam_phyread(struct sam_emac_s *priv, uint8_t phyaddr,
   ret = sam_phywait(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+      nerr("ERROR: sam_phywait failed: %d\n", ret);
       return ret;
     }
 
@@ -3443,7 +3236,7 @@ static int sam_phyread(struct sam_emac_s *priv, uint8_t phyaddr,
   ret = sam_phywait(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+      nerr("ERROR: sam_phywait failed: %d\n", ret);
       return ret;
     }
 
@@ -3483,7 +3276,7 @@ static int sam_phywrite(struct sam_emac_s *priv, uint8_t phyaddr,
   ret = sam_phywait(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+      nerr("ERROR: sam_phywait failed: %d\n", ret);
       return ret;
     }
 
@@ -3508,7 +3301,7 @@ static int sam_phywrite(struct sam_emac_s *priv, uint8_t phyaddr,
   ret = sam_phywait(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+      nerr("ERROR: sam_phywait failed: %d\n", ret);
       return ret;
     }
 
@@ -3552,33 +3345,33 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, MII_PHYID1, &phyid1);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read PHYID1\n");
+      nerr("ERROR: Failed to read PHYID1\n");
       goto errout;
     }
 
-  nllvdbg("PHYID1: %04x PHY address: %02x\n", phyid1, priv->phyaddr);
+  ninfo("PHYID1: %04x PHY address: %02x\n", phyid1, priv->phyaddr);
 
   ret = sam_phyread(priv, priv->phyaddr, MII_PHYID2, &phyid2);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read PHYID2\n");
+      nerr("ERROR: Failed to read PHYID2\n");
       goto errout;
     }
 
-  nllvdbg("PHYID2: %04x PHY address: %02x\n", phyid2, priv->phyaddr);
+  ninfo("PHYID2: %04x PHY address: %02x\n", phyid2, priv->phyaddr);
 
   if (phyid1 == priv->attr->msoui &&
      ((phyid2 & MII_PHYID2_OUI_MASK) >> MII_PHYID2_OUI_SHIFT) ==
       (uint16_t)priv->attr->lsoui)
     {
-      nllvdbg("  Vendor Model Number:   %04x\n",
-             (phyid2 & MII_PHYID2_MODEL_MASK) >> MII_PHYID2_MODEL_SHIFT);
-      nllvdbg("  Model Revision Number: %04x\n",
-             (phyid2 & MII_PHYID2_REV_MASK) >> MII_PHYID2_REV_SHIFT);
+      ninfo("  Vendor Model Number:   %04x\n",
+           (phyid2 & MII_PHYID2_MODEL_MASK) >> MII_PHYID2_MODEL_SHIFT);
+      ninfo("  Model Revision Number: %04x\n",
+           (phyid2 & MII_PHYID2_REV_MASK) >> MII_PHYID2_REV_SHIFT);
     }
   else
     {
-      nlldbg("ERROR: PHY not recognized\n");
+      nerr("ERROR: PHY not recognized\n");
     }
 
   /* Setup control register */
@@ -3586,7 +3379,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read MCR\n");
+      nerr("ERROR: Failed to read MCR\n");
       goto errout;
     }
 
@@ -3597,7 +3390,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to write MCR\n");
+      nerr("ERROR: Failed to write MCR\n");
       goto errout;
     }
 
@@ -3612,7 +3405,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, MII_ADVERTISE, advertise);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to write ANAR\n");
+      nerr("ERROR: Failed to write ANAR\n");
       goto errout;
     }
 
@@ -3621,7 +3414,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read MCR\n");
+      nerr("ERROR: Failed to read MCR\n");
       goto errout;
     }
 
@@ -3629,7 +3422,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to write MCR\n");
+      nerr("ERROR: Failed to write MCR\n");
       goto errout;
     }
 
@@ -3641,11 +3434,11 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to write MCR\n");
+      nerr("ERROR: Failed to write MCR\n");
       goto errout;
     }
 
-  nllvdbg("  MCR: %04x\n", mcr);
+  ninfo("  MCR: %04x\n", mcr);
 
   /* Check AutoNegotiate complete */
 
@@ -3655,7 +3448,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
       ret = sam_phyread(priv, priv->phyaddr, MII_MSR, &msr);
       if (ret < 0)
         {
-          nlldbg("ERROR: Failed to read MSR\n");
+          nerr("ERROR: Failed to read MSR\n");
           goto errout;
         }
 
@@ -3665,7 +3458,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
         {
           /* Yes.. break out of the loop */
 
-          nllvdbg("AutoNegotiate complete\n");
+          ninfo("AutoNegotiate complete\n");
           break;
         }
 
@@ -3673,7 +3466,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
 
       if (++timeout >= PHY_RETRY_MAX)
         {
-          nlldbg("ERROR: TimeOut\n");
+          nerr("ERROR: TimeOut\n");
           sam_phydump(priv);
           ret = -ETIMEDOUT;
           goto errout;
@@ -3685,7 +3478,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, MII_LPA, &lpa);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read ANLPAR\n");
+      nerr("ERROR: Failed to read ANLPAR\n");
       goto errout;
     }
 
@@ -3775,13 +3568,13 @@ static bool sam_linkup(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, MII_MSR, &msr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read MSR: %d\n", ret);
+      nerr("ERROR: Failed to read MSR: %d\n", ret);
       goto errout;
     }
 
   if ((msr & MII_MSR_LINKSTATUS) == 0)
     {
-      nlldbg("ERROR: MSR LinkStatus: %04x\n", msr);
+      nerr("ERROR: MSR LinkStatus: %04x\n", msr);
       goto errout;
     }
 
@@ -3790,7 +3583,7 @@ static bool sam_linkup(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, priv->attr->physr, &physr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read PHYSR: %d\n", ret);
+      nerr("ERROR: Failed to read PHYSR: %d\n", ret);
       goto errout;
     }
 
@@ -3828,7 +3621,7 @@ static bool sam_linkup(struct sam_emac_s *priv)
 
   /* Start the EMAC transfers */
 
-  nllvdbg("Link is up\n");
+  ninfo("Link is up\n");
   linkup = true;
 
 errout:
@@ -3869,7 +3662,7 @@ static int sam_phyinit(struct sam_emac_s *priv)
   mck = BOARD_MCK_FREQUENCY;
   if (mck > (160*1000*1000))
     {
-      ndbg("ERROR: Cannot realize PHY clock\n");
+      nerr("ERROR: Cannot realize PHY clock\n");
       return -EINVAL;
     }
   else if (mck > (80*1000*1000))
@@ -3897,7 +3690,7 @@ static int sam_phyinit(struct sam_emac_s *priv)
   ret = sam_phyfind(priv, &priv->phyaddr);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phyfind failed: %d\n", ret);
+      nerr("ERROR: sam_phyfind failed: %d\n", ret);
       return ret;
     }
 
@@ -4012,7 +3805,7 @@ static inline void sam_ethgpioconfig(struct sam_emac_s *priv)
   else
 #endif
     {
-      nvdbg("ERROR: emac=%d\n", priv->attr->emac);
+      nerr("ERROR: emac=%d\n", priv->attr->emac);
     }
 }
 
@@ -4311,11 +4104,11 @@ static void sam_macaddress(struct sam_emac_s *priv)
   struct net_driver_s *dev = &priv->dev;
   uint32_t regval;
 
-  nllvdbg("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          dev->d_ifname,
-          dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
-          dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
-          dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
+  ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        dev->d_ifname,
+        dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
+        dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
+        dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
 
   /* Set the MAC address */
 
@@ -4377,7 +4170,7 @@ static void sam_ipv6multicast(struct sam_emac_s *priv)
   mac[4] = tmp16 & 0xff;
   mac[5] = tmp16 >> 8;
 
-  nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+  ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
         mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   (void)sam_addmac(dev, mac);
@@ -4423,7 +4216,7 @@ static int sam_emac_configure(struct sam_emac_s *priv)
 {
   uint32_t regval;
 
-  nllvdbg("Entry\n");
+  ninfo("Entry\n");
 
   /* Enable clocking to the EMAC peripheral */
 
@@ -4515,6 +4308,7 @@ int sam_emac_initialize(int intf)
 {
   struct sam_emac_s *priv;
   const struct sam_emacattr_s *attr;
+  uint8_t *pktbuf;
 #if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
   uint8_t phytype;
 #endif
@@ -4525,6 +4319,7 @@ int sam_emac_initialize(int intf)
     {
       priv    = &g_emac0;
       attr    = &g_emac0_attr;
+      pktbuf  = g_pktbuf0;
 
 #if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
       phytype = SAMA5_EMAC0_PHY_TYPE;
@@ -4537,6 +4332,7 @@ int sam_emac_initialize(int intf)
     {
       priv    = &g_emac1;
       attr    = &g_emac1_attr;
+      pktbuf  = g_pktbuf1;
 
 #if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
       phytype = SAMA5_EMAC1_PHY_TYPE;
@@ -4545,7 +4341,7 @@ int sam_emac_initialize(int intf)
   else
 #endif
     {
-      ndbg("ERROR:  Interface %d not supported\n", intf);
+      nerr("ERROR:  Interface %d not supported\n", intf);
       return -EINVAL;
     }
 
@@ -4553,6 +4349,7 @@ int sam_emac_initialize(int intf)
 
   memset(priv, 0, sizeof(struct sam_emac_s));
   priv->attr          = attr;           /* Save the constant attributes */
+  priv->dev.d_buf     = pktbuf;         /* Single packet buffer */
   priv->dev.d_ifup    = sam_ifup;       /* I/F up (new IP address) callback */
   priv->dev.d_ifdown  = sam_ifdown;     /* I/F down callback */
   priv->dev.d_txavail = sam_txavail;    /* New TX data callback */
@@ -4574,7 +4371,7 @@ int sam_emac_initialize(int intf)
   priv->txpoll = wd_create();
   if (!priv->txpoll)
     {
-      ndbg("ERROR: Failed to create periodic poll timer\n");
+      nerr("ERROR: Failed to create periodic poll timer\n");
       ret = -EAGAIN;
       goto errout;
     }
@@ -4582,7 +4379,7 @@ int sam_emac_initialize(int intf)
   priv->txtimeout = wd_create();     /* Create TX timeout timer */
   if (!priv->txtimeout)
     {
-      ndbg("ERROR: Failed to create periodic poll timer\n");
+      nerr("ERROR: Failed to create periodic poll timer\n");
       ret = -EAGAIN;
       goto errout_with_txpoll;
     }
@@ -4596,7 +4393,7 @@ int sam_emac_initialize(int intf)
   ret = sam_buffer_initialize(priv);
   if (ret < 0)
     {
-      ndbg("ERROR: sam_buffer_initialize failed: %d\n", ret);
+      nerr("ERROR: sam_buffer_initialize failed: %d\n", ret);
       goto errout_with_txtimeout;
     }
 
@@ -4604,10 +4401,10 @@ int sam_emac_initialize(int intf)
    * the interface is in the 'up' state.
    */
 
-  ret = irq_attach(priv->attr->irq, priv->attr->handler);
+  ret = irq_attach(priv->attr->irq, sam_emac_interrupt, priv);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to attach the handler to the IRQ%d\n", priv->attr->irq);
+      nerr("ERROR: Failed to attach the handler to the IRQ%d\n", priv->attr->irq);
       goto errout_with_buffers;
     }
 
@@ -4620,7 +4417,7 @@ int sam_emac_initialize(int intf)
   ret = sam_ifdown(&priv->dev);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to put the interface in the down state: %d\n", ret);
+      nerr("ERROR: Failed to put the interface in the down state: %d\n", ret);
       goto errout_with_buffers;
     }
 
@@ -4632,7 +4429,7 @@ int sam_emac_initialize(int intf)
       return ret;
     }
 
-  ndbg("ERROR: netdev_register() failed: %d\n", ret);
+  nerr("ERROR: netdev_register() failed: %d\n", ret);
 
 errout_with_buffers:
   sam_buffer_free(priv);
diff --git a/arch/arm/src/sama5/sam_ethernet.c b/arch/arm/src/sama5/sam_ethernet.c
index 409db45535d2c4867b6fbea900d5e82f64ea1d1c..206af9fc6724e29217516bb54d12c4d3ce0a0f73 100644
--- a/arch/arm/src/sama5/sam_ethernet.c
+++ b/arch/arm/src/sama5/sam_ethernet.c
@@ -88,7 +88,7 @@ static inline void up_gmac_initialize(void)
   ret = sam_gmac_initialize();
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_gmac_initialize failed: %d\n", ret);
+      nerr("ERROR: sam_gmac_initialize failed: %d\n", ret);
     }
 }
 #else
@@ -119,7 +119,7 @@ static inline void up_emac_initialize(void)
   ret = sam_emac_initialize();
   if (ret < 0)
     {
-      nlldbg("ERROR: up_emac_initialize failed: %d\n", ret);
+      nerr("ERROR: up_emac_initialize failed: %d\n", ret);
     }
 }
 #elif defined(CONFIG_SAMA5_EMACB)
@@ -133,7 +133,7 @@ static inline void up_emac_initialize(void)
   ret = sam_emac_initialize(EMAC0_INTF);
   if (ret < 0)
     {
-      nlldbg("ERROR: up_emac_initialize(EMAC0) failed: %d\n", ret);
+      nerr("ERROR: up_emac_initialize(EMAC0) failed: %d\n", ret);
     }
 #endif
 
@@ -143,7 +143,7 @@ static inline void up_emac_initialize(void)
   ret = sam_emac_initialize(EMAC1_INTF);
   if (ret < 0)
     {
-      nlldbg("ERROR: up_emac_initialize(EMAC1) failed: %d\n", ret);
+      nerr("ERROR: up_emac_initialize(EMAC1) failed: %d\n", ret);
     }
 #endif
 }
diff --git a/arch/arm/src/sama5/sam_flexcom_serial.c b/arch/arm/src/sama5/sam_flexcom_serial.c
index c0d4693ac86cdfcb076126102063cf38b8fd60f4..b476b931143ebc19d55f81a898605346e3fe31a5 100644
--- a/arch/arm/src/sama5/sam_flexcom_serial.c
+++ b/arch/arm/src/sama5/sam_flexcom_serial.c
@@ -216,7 +216,6 @@
 
 struct flexus_dev_s
 {
-  xcpt_t   handler;   /* Interrupt handler */
   uint32_t usartbase; /* Base address of USART registers */
   uint32_t baud;      /* Configured baud */
   uint32_t sr;        /* Saved status bits */
@@ -233,23 +232,7 @@ struct flexus_dev_s
  * Private Function Prototypes
  ****************************************************************************/
 
-static int  flexus_interrupt(struct uart_dev_s *dev);
-#ifdef CONFIG_USART0_SERIALDRIVER
-static int  flexus0_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_USART1_SERIALDRIVER
-static int  flexus1_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_USART2_SERIALDRIVER
-static int  flexus2_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_USART3_SERIALDRIVER
-static int  flexus3_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_USART4_SERIALDRIVER
-static int  flexus4_interrupt(int irq, void *context);
-#endif
-
+static int  flexus_interrupt(int irq, void *context, FAR void *arg);
 static int  flexus_setup(struct uart_dev_s *dev);
 static void flexus_shutdown(struct uart_dev_s *dev);
 static int  flexus_attach(struct uart_dev_s *dev);
@@ -314,7 +297,6 @@ static char g_flexus4txbuffer[CONFIG_USART4_TXBUFSIZE];
 #ifdef CONFIG_USART0_SERIALDRIVER
 static struct flexus_dev_s g_flexus0priv =
 {
-  .handler        = flexus0_interrupt,
   .usartbase      = SAM_FLEXCOM0_VBASE,
   .baud           = CONFIG_USART0_BAUD,
   .irq            = SAM_IRQ_FLEXCOM0,
@@ -348,7 +330,6 @@ static uart_dev_t g_flexus0port =
 #ifdef CONFIG_USART1_SERIALDRIVER
 static struct flexus_dev_s g_flexus1priv =
 {
-  .handler        = flexus1_interrupt,
   .usartbase      = SAM_FLEXCOM1_VBASE,
   .baud           = CONFIG_USART1_BAUD,
   .irq            = SAM_IRQ_FLEXCOM1,
@@ -382,7 +363,6 @@ static uart_dev_t g_flexus1port =
 #ifdef CONFIG_USART2_SERIALDRIVER
 static struct flexus_dev_s g_flexus2priv =
 {
-  .handler        = flexus2_interrupt,
   .usartbase      = SAM_FLEXCOM2_VBASE,
   .baud           = CONFIG_USART2_BAUD,
   .irq            = SAM_IRQ_FLEXCOM2,
@@ -416,7 +396,6 @@ static uart_dev_t g_flexus2port =
 #ifdef CONFIG_USART3_SERIALDRIVER
 static struct flexus_dev_s g_flexus3priv =
 {
-  .handler        = flexus3_interrupt,
   .usartbase      = SAM_FLEXCOM3_VBASE,
   .baud           = CONFIG_USART3_BAUD,
   .irq            = SAM_IRQ_FLEXCOM3,
@@ -450,7 +429,6 @@ static uart_dev_t g_flexus3port =
 #ifdef CONFIG_USART4_SERIALDRIVER
 static struct flexus_dev_s g_flexus4priv =
 {
-  .handler        = flexus4_interrupt,
   .usartbase      = SAM_FLEXCOM4_VBASE,
   .baud           = CONFIG_USART4_BAUD,
   .irq            = SAM_IRQ_FLEXCOM4,
@@ -549,13 +527,14 @@ static void flexus_disableallints(struct flexus_dev_s *priv, uint32_t *imr)
  *
  ****************************************************************************/
 
-static int flexus_interrupt(struct uart_dev_s *dev)
+static int flexus_interrupt(int irq, void *context, FAR void *arg)
 {
-  struct flexus_dev_s   *priv;
-  uint32_t           pending;
-  uint32_t           imr;
-  int                passes;
-  bool               handled;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
+  struct flexus_dev_s *priv;
+  uint32_t pending;
+  uint32_t imr;
+  int passes;
+  bool handled;
 
   DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct flexus_dev_s *)dev->priv;
@@ -603,47 +582,6 @@ static int flexus_interrupt(struct uart_dev_s *dev)
   return OK;
 }
 
-/****************************************************************************
- * Name: flexus*_interrupt
- *
- * Description:
- *   This is the specific UART/USART interrupt handler.  These simply map
- *   the interrupt to the device-specific data and passes control to the
- *   common interrupt handler.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_USART0_SERIALDRIVER
-static int  flexus0_interrupt(int irq, void *context)
-{
-  return flexus_interrupt(&g_flexus0port);
-}
-#endif
-#ifdef CONFIG_USART1_SERIALDRIVER
-static int  flexus1_interrupt(int irq, void *context)
-{
-  return flexus_interrupt(&g_flexus1port);
-}
-#endif
-#ifdef CONFIG_USART2_SERIALDRIVER
-static int  flexus2_interrupt(int irq, void *context)
-{
-  return flexus_interrupt(&g_flexus2port);
-}
-#endif
-#ifdef CONFIG_USART3_SERIALDRIVER
-static int  flexus3_interrupt(int irq, void *context)
-{
-  return flexus_interrupt(&g_flexus3port);
-}
-#endif
-#ifdef CONFIG_USART4_SERIALDRIVER
-static int  flexus4_interrupt(int irq, void *context)
-{
-  return flexus_interrupt(&g_flexus4port);
-}
-#endif
-
 /****************************************************************************
  * Name: flexus_setup
  *
@@ -803,7 +741,7 @@ static int flexus_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, priv->handler);
+  ret = irq_attach(priv->irq, flexus_interrupt, dev);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
diff --git a/arch/arm/src/sama5/sam_freerun.c b/arch/arm/src/sama5/sam_freerun.c
index 18d2556bbf5d07e8c27833ac9f6af1c4fa1064da..088cb10a6e82a5e9ad02d84edbbf0b2b107f5508 100644
--- a/arch/arm/src/sama5/sam_freerun.c
+++ b/arch/arm/src/sama5/sam_freerun.c
@@ -60,27 +60,12 @@
 
 #include "sam_freerun.h"
 
-#ifdef CONFIG_SAMA5_ONESHOT
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
+#ifdef CONFIG_SAMA5_FREERUN
 
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
+
 /****************************************************************************
  * Name: sam_freerun_handler
  *
@@ -138,7 +123,7 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
   uint32_t cmr;
   int ret;
 
-  tcvdbg("chan=%d resolution=%d usec\n", chan, resolution);
+  tmrinfo("chan=%d resolution=%d usec\n", chan, resolution);
   DEBUGASSERT(freerun && resolution > 0);
 
   /* Get the TC frequency the corresponds to the requested resolution */
@@ -150,13 +135,13 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
   ret = sam_tc_divisor(frequency, &divisor, &cmr);
   if (ret < 0)
     {
-      tcdbg("ERROR: sam_tc_divisor failed: %d\n", ret);
+      tmrerr("ERROR: sam_tc_divisor failed: %d\n", ret);
       return ret;
     }
 
-  tcvdbg("frequency=%lu, divisor=%u, cmr=%08lx\n",
-         (unsigned long)frequency, (unsigned long)divisor,
-         (unsigned long)cmr);
+  tmrinfo("frequency=%lu, divisor=%u, cmr=%08lx\n",
+          (unsigned long)frequency, (unsigned long)divisor,
+          (unsigned long)cmr);
 
   /* Allocate the timer/counter and select its mode of operation
    *
@@ -189,7 +174,7 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
   freerun->tch = sam_tc_allocate(chan, cmr);
   if (!freerun->tch)
     {
-      tcdbg("ERROR: Failed to allocate timer channel %d\n", chan);
+      tmrerr("ERROR: Failed to allocate timer channel %d\n", chan);
       return -EBUSY;
     }
 
@@ -274,9 +259,9 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts)
 
   leave_critical_section(flags);
 
-  tcvdbg("counter=%lu (%lu) overflow=%lu, sr=%08lx\n",
-         (unsigned long)counter,  (unsigned long)verify,
-         (unsigned long)overflow, (unsigned long)sr);
+  tmrinfo("counter=%lu (%lu) overflow=%lu, sr=%08lx\n",
+          (unsigned long)counter,  (unsigned long)verify,
+          (unsigned long)overflow, (unsigned long)sr);
 
   /* Convert the whole thing to units of microseconds.
    *
@@ -294,7 +279,7 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts)
   ts->tv_sec  = sec;
   ts->tv_nsec = (usec - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
 
-  tcvdbg("usec=%llu ts=(%lu, %lu)\n",
+  tmrinfo("usec=%llu ts=(%lu, %lu)\n",
           usec, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
 
   return OK;
@@ -333,4 +318,4 @@ int sam_freerun_uninitialize(struct sam_freerun_s *freerun)
   return OK;
 }
 
-#endif /* CONFIG_SAMA5_ONESHOT */
+#endif /* CONFIG_SAMA5_FREERUN */
diff --git a/arch/arm/src/sama5/sam_gmac.c b/arch/arm/src/sama5/sam_gmac.c
index 7db62d10dbaeb66ffcd61c56f5df8178525dc06b..a3d296b349515c9ae0a2c4dfa79095d67a59c045 100644
--- a/arch/arm/src/sama5/sam_gmac.c
+++ b/arch/arm/src/sama5/sam_gmac.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/sama5/sam_gmac.c
  *
- *   Copyright (C) 2013-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * References:
@@ -62,6 +62,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -91,6 +92,25 @@
  ****************************************************************************/
 /* Configuration ************************************************************/
 
+/* If processing is not done at the interrupt level, then work queue support
+ * is required.
+ */
+
+#if !defined(CONFIG_SCHED_WORKQUEUE)
+#  error Work queue support is required
+#else
+
+  /* Select work queue */
+
+#  if defined(CONFIG_SAMA5_GMAC_HPWORK)
+#    define ETHWORK HPWORK
+#  elif defined(CONFIG_SAMA5_GMAC_LPWORK)
+#    define ETHWORK LPWORK
+#  else
+#    error Neither CONFIG_SAMA5_GMAC_HPWORK nor CONFIG_SAMA5_GMAC_LPWORK defined
+#  endif
+#endif
+
 /* Number of buffer for RX */
 
 #ifndef CONFIG_SAMA5_GMAC_NRXBUFFERS
@@ -118,18 +138,7 @@
 #  error Unknown PHY
 #endif
 
-/* GMAC buffer sizes, number of buffers, and number of descriptors.
- *
- * REVISIT: The CONFIG_NET_MULTIBUFFER might be useful.  It might be possible
- * to use this option to send and receive messages directly into the DMA
- * buffers, saving a copy.  There might be complications on the receiving
- * side, however, where buffers may wrap and where the size of the received
- * frame will typically be smaller than a full packet.
- */
-
-#ifdef CONFIG_NET_MULTIBUFFER
-#  error CONFIG_NET_MULTIBUFFER must not be set
-#endif
+/* GMAC buffer sizes, number of buffers, and number of descriptors. *********/
 
 #define GMAC_RX_UNITSIZE 128                 /* Fixed size for RX buffer  */
 #define GMAC_TX_UNITSIZE CONFIG_NET_ETH_MTU  /* MAX size for Ethernet packet */
@@ -149,7 +158,7 @@
  * enabled.
  */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_NET_INFO
 #  undef CONFIG_SAMA5_GMAC_REGDEBUG
 #endif
 
@@ -192,6 +201,8 @@ struct sam_gmac_s
   uint8_t               ifup    : 1; /* true:ifup false:ifdown */
   WDOG_ID               txpoll;      /* TX poll timer */
   WDOG_ID               txtimeout;   /* TX timeout timer */
+  struct work_s         irqwork;     /* For deferring interrupt work to the work queue */
+  struct work_s         pollwork;    /* For deferring poll work to the work queue */
 
   /* This holds the information visible to the NuttX network */
 
@@ -227,6 +238,17 @@ struct sam_gmac_s
 
 static struct sam_gmac_s g_gmac;
 
+/* A single packet buffer is used
+ *
+ * REVISIT:  It might be possible to use this option to send and receive
+ * messages directly into the DMA buffers, saving a copy.  There might be
+ * complications on the receiving side, however, where buffers may wrap
+ * and where the size of the received frame will typically be smaller than
+ * a full packet.
+ */
+
+static uint8_t g_pktbuf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
+
 #ifdef CONFIG_SAMA5_GMAC_PREALLOCATE
 /* Preallocated data */
 /* TX descriptors list */
@@ -260,7 +282,7 @@ static uint8_t g_rxbuffer[CONFIG_SAMA5_GMAC_NRXBUFFERS * GMAC_RX_UNITSIZE]
  ****************************************************************************/
 /* Register operations ******************************************************/
 
-#if defined(CONFIG_SAMA5_GMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAMA5_GMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
 static bool sam_checkreg(struct sam_gmac_s *priv, bool wr,
                          uint32_t regval, uintptr_t address);
 static uint32_t sam_getreg(struct sam_gmac_s *priv, uintptr_t addr);
@@ -288,17 +310,24 @@ static void sam_dopoll(struct sam_gmac_s *priv);
 static int  sam_recvframe(struct sam_gmac_s *priv);
 static void sam_receive(struct sam_gmac_s *priv);
 static void sam_txdone(struct sam_gmac_s *priv);
-static int  sam_gmac_interrupt(int irq, void *context);
+
+static void sam_interrupt_work(FAR void *arg);
+static int  sam_gmac_interrupt(int irq, void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
-static void sam_polltimer(int argc, uint32_t arg, ...);
-static void sam_txtimeout(int argc, uint32_t arg, ...);
+static void sam_txtimeout_work(FAR void *arg);
+static void sam_txtimeout_expiry(int argc, uint32_t arg, ...);
+
+static void sam_poll_work(FAR void *arg);
+static void sam_poll_expiry(int argc, uint32_t arg, ...);
 
 /* NuttX callback functions */
 
 static int  sam_ifup(struct net_driver_s *dev);
 static int  sam_ifdown(struct net_driver_s *dev);
+
+static void sam_txavail_work(FAR void *arg);
 static int  sam_txavail(struct net_driver_s *dev);
 
 #if defined(CONFIG_NET_IGMP) || defined(CONFIG_NET_ICMPv6)
@@ -315,7 +344,7 @@ static int  sam_ioctl(struct net_driver_s *dev, int cmd, long arg);
 
 /* PHY Initialization */
 
-#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_INFO)
 static void sam_phydump(struct sam_gmac_s *priv);
 #else
 #  define sam_phydump(priv)
@@ -392,7 +421,7 @@ static bool sam_checkreg(struct sam_gmac_s *priv, bool wr, uint32_t regval,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", priv->ntimes);
+          ninfo("...[Repeats %d times]...\n", priv->ntimes);
         }
 
       /* Save information about the new access */
@@ -424,7 +453,7 @@ static uint32_t sam_getreg(struct sam_gmac_s *priv, uintptr_t address)
 
   if (sam_checkreg(priv, false, regval, address))
     {
-      lldbg("%08x->%08x\n", address, regval);
+      ninfo("%08x->%08x\n", address, regval);
     }
 
   return regval;
@@ -445,7 +474,7 @@ static void sam_putreg(struct sam_gmac_s *priv, uintptr_t address,
 {
   if (sam_checkreg(priv, true, regval, address))
     {
-      lldbg("%08x<-%08x\n", address, regval);
+      ninfo("%08x<-%08x\n", address, regval);
     }
 
   putreg32(regval, address);
@@ -538,7 +567,7 @@ static int sam_buffer_initialize(struct sam_gmac_s *priv)
   priv->txdesc = (struct gmac_txdesc_s *)kmm_memalign(8, allocsize);
   if (!priv->txdesc)
     {
-      nlldbg("ERROR: Failed to allocate TX descriptors\n");
+      nerr("ERROR: Failed to allocate TX descriptors\n");
       return -ENOMEM;
     }
 
@@ -548,7 +577,7 @@ static int sam_buffer_initialize(struct sam_gmac_s *priv)
   priv->rxdesc = (struct gmac_rxdesc_s *)kmm_memalign(8, allocsize);
   if (!priv->rxdesc)
     {
-      nlldbg("ERROR: Failed to allocate RX descriptors\n");
+      nerr("ERROR: Failed to allocate RX descriptors\n");
       sam_buffer_free(priv);
       return -ENOMEM;
     }
@@ -559,7 +588,7 @@ static int sam_buffer_initialize(struct sam_gmac_s *priv)
   priv->txbuffer = (uint8_t *)kmm_memalign(8, allocsize);
   if (!priv->txbuffer)
     {
-      nlldbg("ERROR: Failed to allocate TX buffer\n");
+      nerr("ERROR: Failed to allocate TX buffer\n");
       sam_buffer_free(priv);
       return -ENOMEM;
     }
@@ -568,7 +597,7 @@ static int sam_buffer_initialize(struct sam_gmac_s *priv)
   priv->rxbuffer = (uint8_t *)kmm_memalign(8, allocsize);
   if (!priv->rxbuffer)
     {
-      nlldbg("ERROR: Failed to allocate RX buffer\n");
+      nerr("ERROR: Failed to allocate RX buffer\n");
       sam_buffer_free(priv);
       return -ENOMEM;
     }
@@ -656,15 +685,15 @@ static int sam_transmit(struct sam_gmac_s *priv)
   uint32_t regval;
   uint32_t status;
 
-  nllvdbg("d_len: %d txhead: %d txtail: %d\n",
-          dev->d_len, priv->txhead, priv->txtail);
+  ninfo("d_len: %d txhead: %d txtail: %d\n",
+        dev->d_len, priv->txhead, priv->txtail);
   sam_dumppacket("Transmit packet", dev->d_buf, dev->d_len);
 
   /* Check parameter */
 
   if (dev->d_len > GMAC_TX_UNITSIZE)
     {
-      nlldbg("ERROR: Packet too big: %d\n", dev->d_len);
+      nerr("ERROR: Packet too big: %d\n", dev->d_len);
       return -EINVAL;
     }
 
@@ -676,7 +705,7 @@ static int sam_transmit(struct sam_gmac_s *priv)
 
   if (sam_txfree(priv) < 1)
     {
-      nlldbg("ERROR: No free TX descriptors\n");
+      nerr("ERROR: No free TX descriptors\n");
       return -EBUSY;
     }
 
@@ -720,7 +749,7 @@ static int sam_transmit(struct sam_gmac_s *priv)
 
   /* Setup the TX timeout watchdog (perhaps restarting the timer) */
 
-  (void)wd_start(priv->txtimeout, SAM_TXTIMEOUT, sam_txtimeout, 1,
+  (void)wd_start(priv->txtimeout, SAM_TXTIMEOUT, sam_txtimeout_expiry, 1,
                  (uint32_t)priv);
 
   /* Set d_len to zero meaning that the d_buf[] packet buffer is again
@@ -738,7 +767,7 @@ static int sam_transmit(struct sam_gmac_s *priv)
 
   if (sam_txfree(priv) < 1)
     {
-      nllvdbg("Disabling RX interrupts\n");
+      ninfo("Disabling RX interrupts\n");
       sam_putreg(priv, SAM_GMAC_IDR, GMAC_INT_RCOMP);
     }
 
@@ -835,7 +864,7 @@ static int sam_txpoll(struct net_driver_s *dev)
  *
  *   1. After completion of a transmission (sam_txdone),
  *   2. When new TX data is available (sam_txavail), and
- *   3. After a TX timeout to restart the sending process (sam_txtimeout).
+ *   3. After a TX timeout to restart the sending process (sam_txtimeout_expiry).
  *
  * Parameters:
  *   priv - Reference to the driver state structure
@@ -918,7 +947,7 @@ static int sam_recvframe(struct sam_gmac_s *priv)
   arch_invalidate_dcache((uintptr_t)rxdesc,
                          (uintptr_t)rxdesc + sizeof(struct gmac_rxdesc_s));
 
-  nllvdbg("rxndx: %d\n", rxndx);
+  ninfo("rxndx: %d\n", rxndx);
 
   while ((rxdesc->addr & GMACRXD_ADDR_OWNER) != 0)
     {
@@ -974,7 +1003,7 @@ static int sam_recvframe(struct sam_gmac_s *priv)
         {
           if (rxndx == priv->rxndx)
             {
-              nllvdbg("ERROR: No EOF (Invalid of buffers too small)\n");
+              nerr("ERROR: No EOF (Invalid of buffers too small)\n");
               do
                 {
                   /* Give ownership back to the GMAC */
@@ -1029,7 +1058,7 @@ static int sam_recvframe(struct sam_gmac_s *priv)
               /* Frame size from the GMAC */
 
               dev->d_len = (rxdesc->status & GMACRXD_STA_FRLEN_MASK);
-              nllvdbg("packet %d-%d (%d)\n", priv->rxndx, rxndx, dev->d_len);
+              ninfo("packet %d-%d (%d)\n", priv->rxndx, rxndx, dev->d_len);
 
               /* All data have been copied in the application frame buffer,
                * release the RX descriptor
@@ -1060,11 +1089,11 @@ static int sam_recvframe(struct sam_gmac_s *priv)
                * all of the data.
                */
 
-              nllvdbg("rxndx: %d d_len: %d\n", priv->rxndx, dev->d_len);
+              ninfo("rxndx: %d d_len: %d\n", priv->rxndx, dev->d_len);
 
               if (pktlen < dev->d_len)
                 {
-                  nlldbg("ERROR: Buffer size %d; frame size %d\n", dev->d_len, pktlen);
+                  nerr("ERROR: Buffer size %d; frame size %d\n", dev->d_len, pktlen);
                   return -E2BIG;
                 }
 
@@ -1102,7 +1131,7 @@ static int sam_recvframe(struct sam_gmac_s *priv)
   /* No packet was found */
 
   priv->rxndx = rxndx;
-  nllvdbg("rxndx: %d\n", priv->rxndx);
+  ninfo("rxndx: %d\n", priv->rxndx);
   return -EAGAIN;
 }
 
@@ -1142,7 +1171,7 @@ static void sam_receive(struct sam_gmac_s *priv)
 
       if (dev->d_len > CONFIG_NET_ETH_MTU)
         {
-          nlldbg("DROPPED: Too big: %d\n", dev->d_len);
+          nwarn("WARNING: Dropped, Too big: %d\n", dev->d_len);
           continue;
         }
 
@@ -1157,7 +1186,7 @@ static void sam_receive(struct sam_gmac_s *priv)
 #ifdef CONFIG_NET_IPv4
       if (BUF->type == HTONS(ETHTYPE_IP))
         {
-          nllvdbg("IPv4 frame\n");
+          ninfo("IPv4 frame\n");
 
           /* Handle ARP on input then give the IPv4 packet to the network
            * layer
@@ -1197,7 +1226,7 @@ static void sam_receive(struct sam_gmac_s *priv)
 #ifdef CONFIG_NET_IPv6
       if (BUF->type == HTONS(ETHTYPE_IP6))
         {
-          nllvdbg("Iv6 frame\n");
+          ninfo("Iv6 frame\n");
 
           /* Give the IPv6 packet to the network layer */
 
@@ -1234,7 +1263,7 @@ static void sam_receive(struct sam_gmac_s *priv)
 #ifdef CONFIG_NET_ARP
       if (BUF->type == htons(ETHTYPE_ARP))
         {
-          nllvdbg("ARP frame\n");
+          ninfo("ARP frame\n");
 
           /* Handle ARP packet */
 
@@ -1252,7 +1281,7 @@ static void sam_receive(struct sam_gmac_s *priv)
       else
 #endif
         {
-          nlldbg("DROPPED: Unknown type: %04x\n", BUF->type);
+          nwarn("WARNING: Dropped, Unknown type: %04x\n", BUF->type);
         }
     }
 }
@@ -1344,25 +1373,25 @@ static void sam_txdone(struct sam_gmac_s *priv)
 }
 
 /****************************************************************************
- * Function: sam_gmac_interrupt
+ * Function: sam_interrupt_work
  *
  * Description:
- *   Hardware interrupt handler
+ *   Perform interrupt related work from the worker thread
  *
  * Parameters:
- *   irq     - Number of the IRQ that generated the interrupt
- *   context - Interrupt register state save info (architecture-specific)
+ *   arg - The argument passed when work_queue() was called.
  *
  * Returned Value:
  *   OK on success
  *
  * Assumptions:
+ *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static int sam_gmac_interrupt(int irq, void *context)
+static void sam_interrupt_work(FAR void *arg)
 {
-  struct sam_gmac_s *priv = &g_gmac;
+  FAR struct sam_gmac_s *priv = (FAR struct sam_gmac_s *)arg;
   uint32_t isr;
   uint32_t rsr;
   uint32_t tsr;
@@ -1371,13 +1400,16 @@ static int sam_gmac_interrupt(int irq, void *context)
   uint32_t pending;
   uint32_t clrbits;
 
+  /* Process pending Ethernet interrupts */
+
+  net_lock();
   isr = sam_getreg(priv, SAM_GMAC_ISR);
   rsr = sam_getreg(priv, SAM_GMAC_RSR);
   tsr = sam_getreg(priv, SAM_GMAC_TSR);
   imr = sam_getreg(priv, SAM_GMAC_IMR);
 
   pending = isr & ~(imr | GMAC_INT_UNUSED);
-  nllvdbg("isr: %08x pending: %08x\n", isr, pending);
+  ninfo("isr: %08x pending: %08x\n", isr, pending);
 
   /* Check for the completion of a transmission.  This should be done before
    * checking for received data (because receiving can cause another transmission
@@ -1403,7 +1435,7 @@ static int sam_gmac_interrupt(int irq, void *context)
           clrbits = GMAC_TSR_RLE | sam_txinuse(priv);
           sam_txreset(priv);
 
-          nlldbg("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
+          nerr("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
 
           regval = sam_getreg(priv, SAM_GMAC_NCR);
           regval |= GMAC_NCR_TXEN;
@@ -1414,7 +1446,7 @@ static int sam_gmac_interrupt(int irq, void *context)
 
       if ((tsr & GMAC_TSR_COL) != 0)
         {
-          nlldbg("ERROR: Collision occurred TSR: %08x\n", tsr);
+          nerr("ERROR: Collision occurred TSR: %08x\n", tsr);
           clrbits |= GMAC_TSR_COL;
         }
 
@@ -1422,7 +1454,7 @@ static int sam_gmac_interrupt(int irq, void *context)
 
       if ((tsr & GMAC_TSR_TFC) != 0)
         {
-          nlldbg("ERROR: Buffers exhausted mid-frame TSR: %08x\n", tsr);
+          nerr("ERROR: Buffers exhausted mid-frame TSR: %08x\n", tsr);
           clrbits |= GMAC_TSR_TFC;
         }
 
@@ -1437,7 +1469,7 @@ static int sam_gmac_interrupt(int irq, void *context)
 
       if ((tsr & GMAC_TSR_UND) != 0)
         {
-          nlldbg("ERROR: Transmit Underrun TSR: %08x\n", tsr);
+          nerr("ERROR: Transmit Underrun TSR: %08x\n", tsr);
           clrbits |= GMAC_TSR_UND;
         }
 
@@ -1445,7 +1477,7 @@ static int sam_gmac_interrupt(int irq, void *context)
 
       if ((tsr & GMAC_TSR_HRESP) != 0)
         {
-          nlldbg("ERROR: HRESP not OK: %08x\n", tsr);
+          nerr("ERROR: HRESP not OK: %08x\n", tsr);
           clrbits |= GMAC_TSR_HRESP;
         }
 
@@ -1453,7 +1485,7 @@ static int sam_gmac_interrupt(int irq, void *context)
 
       if ((tsr & GMAC_TSR_LCO) != 0)
         {
-          nlldbg("ERROR: Late collision: %08x\n", tsr);
+          nerr("ERROR: Late collision: %08x\n", tsr);
           clrbits |= GMAC_TSR_LCO;
         }
 
@@ -1490,7 +1522,7 @@ static int sam_gmac_interrupt(int irq, void *context)
 
       if ((rsr & GMAC_RSR_RXOVR) != 0)
         {
-          nlldbg("ERROR: Receiver overrun RSR: %08x\n", rsr);
+          nerr("ERROR: Receiver overrun RSR: %08x\n", rsr);
           clrbits |= GMAC_RSR_RXOVR;
         }
 
@@ -1507,7 +1539,7 @@ static int sam_gmac_interrupt(int irq, void *context)
 
       if ((rsr & GMAC_RSR_BNA) != 0)
         {
-          nlldbg("ERROR: Buffer not available RSR: %08x\n", rsr);
+          nerr("ERROR: Buffer not available RSR: %08x\n", rsr);
           clrbits |= GMAC_RSR_BNA;
         }
 
@@ -1515,7 +1547,7 @@ static int sam_gmac_interrupt(int irq, void *context)
 
       if ((rsr & GMAC_RSR_HNO) != 0)
         {
-          nlldbg("ERROR: HRESP not OK: %08x\n", rsr);
+          nerr("ERROR: HRESP not OK: %08x\n", rsr);
           clrbits |= GMAC_RSR_HNO;
         }
 
@@ -1536,7 +1568,7 @@ static int sam_gmac_interrupt(int irq, void *context)
 
   if ((pending & GMAC_INT_PFNZ) != 0)
     {
-      nlldbg("Pause frame received\n");
+      nwarn("WARNING: Pause frame received\n");
     }
 
   /* Check for Pause Time Zero (PTZ)
@@ -1546,55 +1578,112 @@ static int sam_gmac_interrupt(int irq, void *context)
 
   if ((pending & GMAC_INT_PTZ) != 0)
     {
-      nlldbg("Pause TO!\n");
+      nwarn("WARNING: Pause TO!\n");
     }
 #endif
 
-  return OK;
+  net_unlock();
+
+  /* Re-enable Ethernet interrupts */
+
+  up_enable_irq(SAM_IRQ_GMAC);
 }
 
 /****************************************************************************
- * Function: sam_txtimeout
+ * Function: sam_gmac_interrupt
  *
  * Description:
- *   Our TX watchdog timed out.  Called from the timer interrupt handler.
- *   The last TX never completed.  Reset the hardware and start again.
+ *   Hardware interrupt handler
  *
  * Parameters:
- *   argc - The number of available arguments
- *   arg  - The first argument
+ *   irq     - Number of the IRQ that generated the interrupt
+ *   context - Interrupt register state save info (architecture-specific)
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
- *   Global interrupts are disabled by the watchdog logic.
  *
  ****************************************************************************/
 
-static void sam_txtimeout(int argc, uint32_t arg, ...)
+static int sam_gmac_interrupt(int irq, void *context, FAR void *arg)
 {
-  struct sam_gmac_s *priv = (struct sam_gmac_s *)arg;
+  struct sam_gmac_s *priv = &g_gmac;
+  uint32_t tsr;
 
-  nlldbg("Timeout!\n");
+  /* Disable further Ethernet interrupts.  Because Ethernet interrupts are
+   * also disabled if the TX timeout event occurs, there can be no race
+   * condition here.
+   */
 
-  /* Then reset the hardware.  Just take the interface down, then back
-   * up again.
+  up_disable_irq(SAM_IRQ_GMAC);
+
+  /* Check for the completion of a transmission.  Careful:
+   *
+   * ISR:TCOMP is set when a frame has been transmitted. Cleared on read (so
+   *   we cannot read it here).
+   * TSR:TXCOMP is set when a frame has been transmitted. Cleared by writing a
+   *   one to this bit.
    */
 
+  tsr = sam_getreg(priv, SAM_GMAC_TSR_OFFSET);
+  if ((tsr & GMAC_TSR_TXCOMP) != 0)
+    {
+      /* If a TX transfer just completed, then cancel the TX timeout so
+       * there will be do race condition between any subsequent timeout
+       * expiration and the deferred interrupt processing.
+       */
+
+      wd_cancel(priv->txtimeout);
+    }
+
+  /* Schedule to perform the interrupt processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->irqwork, sam_interrupt_work, priv, 0);
+  return OK;
+}
+
+/****************************************************************************
+ * Function: sam_txtimeout_work
+ *
+ * Description:
+ *   Perform TX timeout related work from the worker thread
+ *
+ * Parameters:
+ *   arg - The argument passed when work_queue() as called.
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *   Ethernet interrupts are disabled
+ *
+ ****************************************************************************/
+
+static void sam_txtimeout_work(FAR void *arg)
+{
+  FAR struct sam_gmac_s *priv = (FAR struct sam_gmac_s *)arg;
+
+  nerr("ERROR: Timeout!\n");
+
+  /* Reset the hardware.  Just take the interface down, then back up again. */
+
+  net_lock();
   sam_ifdown(&priv->dev);
   sam_ifup(&priv->dev);
 
   /* Then poll the network for new XMIT data */
 
   sam_dopoll(priv);
+  net_unlock();
 }
 
 /****************************************************************************
- * Function: sam_polltimer
+ * Function: sam_txtimeout_expiry
  *
  * Description:
- *   Periodic timer handler.  Called from the timer interrupt handler.
+ *   Our TX watchdog timed out.  Called from the timer interrupt handler.
+ *   The last TX never completed.  Reset the hardware and start again.
  *
  * Parameters:
  *   argc - The number of available arguments
@@ -1608,15 +1697,49 @@ static void sam_txtimeout(int argc, uint32_t arg, ...)
  *
  ****************************************************************************/
 
-static void sam_polltimer(int argc, uint32_t arg, ...)
+static void sam_txtimeout_expiry(int argc, uint32_t arg, ...)
+{
+  FAR struct sam_gmac_s *priv = (FAR struct sam_gmac_s *)arg;
+
+  /* Disable further Ethernet interrupts.  This will prevent some race
+   * conditions with interrupt work.  There is still a potential race
+   * condition with interrupt work that is already queued and in progress.
+   */
+
+  up_disable_irq(SAM_IRQ_GMAC);
+
+  /* Schedule to perform the TX timeout processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->irqwork, sam_txtimeout_work, priv, 0);
+}
+
+/****************************************************************************
+ * Function: sam_poll_work
+ *
+ * Description:
+ *   Perform periodic polling from the worker thread
+ *
+ * Parameters:
+ *   arg - The argument passed when work_queue() as called.
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *   Ethernet interrupts are disabled
+ *
+ ****************************************************************************/
+
+static void sam_poll_work(FAR void *arg)
 {
-  struct sam_gmac_s *priv = (struct sam_gmac_s *)arg;
-  struct net_driver_s   *dev  = &priv->dev;
+  FAR struct sam_gmac_s *priv = (FAR struct sam_gmac_s *)arg;
+  struct net_driver_s *dev  = &priv->dev;
 
   /* Check if the there are any free TX descriptors.  We cannot perform the
    * TX poll if we do not have buffering for another packet.
    */
 
+  net_lock();
   if (sam_txfree(priv) > 0)
     {
       /* Update TCP timing states and poll the network for new XMIT data. */
@@ -1626,7 +1749,35 @@ static void sam_polltimer(int argc, uint32_t arg, ...)
 
   /* Setup the watchdog poll timer again */
 
-  (void)wd_start(priv->txpoll, SAM_WDDELAY, sam_polltimer, 1, arg);
+  (void)wd_start(priv->txpoll, SAM_WDDELAY, sam_poll_expiry, 1, priv);
+  net_unlock();
+}
+
+/****************************************************************************
+ * Function: sam_poll_expiry
+ *
+ * Description:
+ *   Periodic timer handler.  Called from the timer interrupt handler.
+ *
+ * Parameters:
+ *   argc - The number of available arguments
+ *   arg  - The first argument
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Global interrupts are disabled by the watchdog logic.
+ *
+ ****************************************************************************/
+
+static void sam_poll_expiry(int argc, uint32_t arg, ...)
+{
+  FAR struct sam_gmac_s *priv = (FAR struct sam_gmac_s *)arg;
+
+  /* Schedule to perform the interrupt processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->pollwork, sam_poll_work, priv, 0);
 }
 
 /****************************************************************************
@@ -1651,13 +1802,13 @@ static int sam_ifup(struct net_driver_s *dev)
   struct sam_gmac_s *priv = (struct sam_gmac_s *)dev->d_private;
   int ret;
 
-  nlldbg("Bringing up: %d.%d.%d.%d\n",
-         dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-         (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 
   /* Configure the GMAC interface for normal operation. */
 
-  nllvdbg("Initialize the GMAC\n");
+  ninfo("Initialize the GMAC\n");
   sam_gmac_configure(priv);
 
   /* Set the MAC address (should have been configured while we were down) */
@@ -1675,7 +1826,7 @@ static int sam_ifup(struct net_driver_s *dev)
   ret = sam_phyinit(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phyinit failed: %d\n", ret);
+      nerr("ERROR: sam_phyinit failed: %d\n", ret);
       return ret;
     }
 
@@ -1685,7 +1836,7 @@ static int sam_ifup(struct net_driver_s *dev)
   ret = sam_autonegotiate(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_autonegotiate failed: %d\n", ret);
+      nerr("ERROR: sam_autonegotiate failed: %d\n", ret);
       return ret;
     }
 #else
@@ -1696,11 +1847,11 @@ static int sam_ifup(struct net_driver_s *dev)
 
   /* Enable normal MAC operation */
 
-  nllvdbg("Enable normal operation\n");
+  ninfo("Enable normal operation\n");
 
   /* Set and activate a timer process */
 
-  (void)wd_start(priv->txpoll, SAM_WDDELAY, sam_polltimer, 1, (uint32_t)priv);
+  (void)wd_start(priv->txpoll, SAM_WDDELAY, sam_poll_expiry, 1, (uint32_t)priv);
 
   /* Enable the GMAC interrupt */
 
@@ -1730,7 +1881,7 @@ static int sam_ifdown(struct net_driver_s *dev)
   struct sam_gmac_s *priv = (struct sam_gmac_s *)dev->d_private;
   irqstate_t flags;
 
-  nlldbg("Taking the network down\n");
+  ninfo("Taking the network down\n");
 
   /* Disable the GMAC interrupt */
 
@@ -1756,6 +1907,42 @@ static int sam_ifdown(struct net_driver_s *dev)
   return OK;
 }
 
+/****************************************************************************
+ * Function: sam_txavail_work
+ *
+ * Description:
+ *   Perform an out-of-cycle poll on the worker thread.
+ *
+ * Parameters:
+ *   arg - Reference to the NuttX driver state structure (cast to void*)
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Called on the higher priority worker thread.
+ *
+ ****************************************************************************/
+
+static void sam_txavail_work(FAR void *arg)
+{
+  FAR struct sam_gmac_s *priv = (FAR struct sam_gmac_s *)arg;
+
+  ninfo("ifup: %d\n", priv->ifup);
+
+  /* Ignore the notification if the interface is not yet up */
+
+  net_lock();
+  if (priv->ifup)
+    {
+      /* Poll the network for new XMIT data */
+
+      sam_dopoll(priv);
+    }
+
+  net_unlock();
+}
+
 /****************************************************************************
  * Function: sam_txavail
  *
@@ -1765,7 +1952,7 @@ static int sam_ifdown(struct net_driver_s *dev)
  *   latency.
  *
  * Parameters:
- *   dev  - Reference to the NuttX driver state structure
+ *   dev - Reference to the NuttX driver state structure
  *
  * Returned Value:
  *   None
@@ -1777,27 +1964,20 @@ static int sam_ifdown(struct net_driver_s *dev)
 
 static int sam_txavail(struct net_driver_s *dev)
 {
-  struct sam_gmac_s *priv = (struct sam_gmac_s *)dev->d_private;
-  irqstate_t flags;
-
-  nllvdbg("ifup: %d\n", priv->ifup);
+  FAR struct sam_gmac_s *priv = (FAR struct sam_gmac_s *)dev->d_private;
 
-  /* Disable interrupts because this function may be called from interrupt
-   * level processing.
+  /* Is our single work structure available?  It may not be if there are
+   * pending interrupt actions and we will have to ignore the Tx
+   * availability action.
    */
 
-  flags = enter_critical_section();
-
-  /* Ignore the notification if the interface is not yet up */
-
-  if (priv->ifup)
+  if (work_available(&priv->pollwork))
     {
-      /* Poll the network for new XMIT data */
+      /* Schedule to serialize the poll on the worker thread. */
 
-      sam_dopoll(priv);
+      work_queue(ETHWORK, &priv->pollwork, sam_txavail_work, priv, 0);
     }
 
-  leave_critical_section(flags);
   return OK;
 }
 
@@ -1958,8 +2138,8 @@ static int sam_addmac(struct net_driver_s *dev, const uint8_t *mac)
   unsigned int bit;
   UNUSED(priv);
 
-  nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Calculate the 6-bit has table index */
 
@@ -2032,8 +2212,8 @@ static int sam_rmmac(struct net_driver_s *dev, const uint8_t *mac)
   unsigned int bit;
   UNUSED(priv);
 
-  nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Calculate the 6-bit has table index */
 
@@ -2211,7 +2391,7 @@ static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_INFO)
 static void sam_phydump(struct sam_gmac_s *priv)
 {
   uint16_t phyval;
@@ -2220,21 +2400,21 @@ static void sam_phydump(struct sam_gmac_s *priv)
 
   sam_enablemdio(priv);
 
-  nllvdbg("GMII Registers (Address %02x)\n", priv->phyaddr);
+  ninfo("GMII Registers (Address %02x)\n", priv->phyaddr);
   sam_phyread(priv, priv->phyaddr, GMII_MCR, &phyval);
-  nllvdbg("       MCR: %04x\n", phyval);
+  ninfo("       MCR: %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, GMII_MSR, &phyval);
-  nllvdbg("       MSR: %04x\n", phyval);
+  ninfo("       MSR: %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, GMII_ADVERTISE, &phyval);
-  nllvdbg(" ADVERTISE: %04x\n", phyval);
+  ninfo(" ADVERTISE: %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, GMII_LPA, &phyval);
-  nllvdbg("       LPR: %04x\n", phyval);
+  ninfo("       LPR: %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, GMII_1000BTCR, &phyval);
-  nllvdbg("  1000BTCR: %04x\n", phyval);
+  ninfo("  1000BTCR: %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, GMII_1000BTSR, &phyval);
-  nllvdbg("  1000BTSR: %04x\n", phyval);
+  ninfo("  1000BTSR: %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, GMII_ESTATUS, &phyval);
-  nllvdbg("   ESTATUS: %04x\n", phyval);
+  ninfo("   ESTATUS: %04x\n", phyval);
 
   /* Disable management port */
 
@@ -2418,7 +2598,7 @@ static int sam_phyreset(struct sam_gmac_s *priv)
   int timeout;
   int ret;
 
-  nllvdbg(" sam_phyreset\n");
+  ninfo(" sam_phyreset\n");
 
   /* Enable management port */
 
@@ -2429,7 +2609,7 @@ static int sam_phyreset(struct sam_gmac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, GMII_MCR, GMII_MCR_RESET);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywrite failed: %d\n", ret);
+      nerr("ERROR: sam_phywrite failed: %d\n", ret);
     }
 
   /* Wait for the PHY reset to complete */
@@ -2441,7 +2621,7 @@ static int sam_phyreset(struct sam_gmac_s *priv)
       int result = sam_phyread(priv, priv->phyaddr, GMII_MCR, &mcr);
       if (result < 0)
         {
-          nlldbg("ERROR: Failed to read the MCR register: %d\n", ret);
+          nerr("ERROR: Failed to read the MCR register: %d\n", ret);
           ret = result;
         }
       else if ((mcr & GMII_MCR_RESET) == 0)
@@ -2480,7 +2660,7 @@ static int sam_phyfind(struct sam_gmac_s *priv, uint8_t *phyaddr)
   unsigned int offset;
   int ret = -ESRCH;
 
-  nllvdbg("Find a valid PHY address\n");
+  ninfo("Find a valid PHY address\n");
 
   /* Enable management port */
 
@@ -2501,8 +2681,8 @@ static int sam_phyfind(struct sam_gmac_s *priv, uint8_t *phyaddr)
 
   else
     {
-      nlldbg("ERROR: sam_phyread failed for PHY address %02x: %d\n",
-             candidate, ret);
+      nerr("ERROR: sam_phyread failed for PHY address %02x: %d\n",
+           candidate, ret);
 
       for (offset = 0; offset < 32; offset++)
         {
@@ -2523,7 +2703,7 @@ static int sam_phyfind(struct sam_gmac_s *priv, uint8_t *phyaddr)
 
   if (ret == OK)
     {
-      nllvdbg("  PHYID1: %04x PHY addr: %d\n", phyval, candidate);
+      ninfo("  PHYID1: %04x PHY addr: %d\n", phyval, candidate);
       *phyaddr = candidate;
     }
 
@@ -2563,7 +2743,7 @@ static int sam_phyread(struct sam_gmac_s *priv, uint8_t phyaddr,
   ret = sam_phywait(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+      nerr("ERROR: sam_phywait failed: %d\n", ret);
       return ret;
     }
 
@@ -2578,7 +2758,7 @@ static int sam_phyread(struct sam_gmac_s *priv, uint8_t phyaddr,
   ret = sam_phywait(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+      nerr("ERROR: sam_phywait failed: %d\n", ret);
       return ret;
     }
 
@@ -2618,7 +2798,7 @@ static int sam_phywrite(struct sam_gmac_s *priv, uint8_t phyaddr,
   ret = sam_phywait(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+      nerr("ERROR: sam_phywait failed: %d\n", ret);
       return ret;
     }
 
@@ -2633,7 +2813,7 @@ static int sam_phywrite(struct sam_gmac_s *priv, uint8_t phyaddr,
   ret = sam_phywait(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+      nerr("ERROR: sam_phywait failed: %d\n", ret);
       return ret;
     }
 
@@ -2679,35 +2859,35 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, GMII_PHYID1, &phyid1);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read PHYID1 register\n");
+      nerr("ERROR: Failed to read PHYID1 register\n");
       goto errout;
     }
 
-  nllvdbg("PHYID1: %04x PHY address: %02x\n", phyid1, priv->phyaddr);
+  ninfo("PHYID1: %04x PHY address: %02x\n", phyid1, priv->phyaddr);
 
   /* Read the LS bits of the OUI from Pthe PHYID2 register */
 
   ret = sam_phyread(priv, priv->phyaddr, GMII_PHYID2, &phyid2);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read PHYID2 register\n");
+      nerr("ERROR: Failed to read PHYID2 register\n");
       goto errout;
     }
 
-  nllvdbg("PHYID2: %04x PHY address: %02x\n", phyid2, priv->phyaddr);
+  ninfo("PHYID2: %04x PHY address: %02x\n", phyid2, priv->phyaddr);
 
   if (phyid1 == GMII_OUI_MSB &&
      (phyid2 & GMII_PHYID2_OUI_MASK) == GMII_OUI_LSB)
     {
-      nllvdbg("  Vendor Model Number:   %04x\n",
-             (phyid2 & GMII_PHYID2_MODEL_MASK) >> GMII_PHYID2_MODEL_SHIFT);
-      nllvdbg("  Model Revision Number: %04x\n",
-             (phyid2 & GMII_PHYID2_REV_MASK) >> GMII_PHYID2_REV_SHIFT);
+      ninfo("  Vendor Model Number:   %04x\n",
+           (phyid2 & GMII_PHYID2_MODEL_MASK) >> GMII_PHYID2_MODEL_SHIFT);
+      ninfo("  Model Revision Number: %04x\n",
+           (phyid2 & GMII_PHYID2_REV_MASK) >> GMII_PHYID2_REV_SHIFT);
     }
   else
     {
-      nlldbg("ERROR: PHY not recognized: PHYID1=%04x PHYID2=%04x\n",
-              phyid1, phyid2);
+      nerr("ERROR: PHY not recognized: PHYID1=%04x PHYID2=%04x\n",
+            phyid1, phyid2);
     }
 
 #ifdef SAMA5_GMAC_PHY_KSZ90x1
@@ -2735,7 +2915,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, GMII_ADVERTISE, advertise);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to write ADVERTISE register\n");
+      nerr("ERROR: Failed to write ADVERTISE register\n");
       goto errout;
     }
 
@@ -2746,7 +2926,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, GMII_1000BTCR, &btcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read 1000BTCR register: %d\n", ret);
+      nerr("ERROR: Failed to read 1000BTCR register: %d\n", ret);
       goto errout;
     }
 
@@ -2755,7 +2935,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, GMII_1000BTCR, btcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to write 1000BTCR register: %d\n", ret);
+      nerr("ERROR: Failed to write 1000BTCR register: %d\n", ret);
       goto errout;
     }
 
@@ -2764,7 +2944,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
   ret  = sam_phyread(priv, priv->phyaddr, GMII_MCR, &phyval);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read MCR register: %d\n", ret);
+      nerr("ERROR: Failed to read MCR register: %d\n", ret);
       goto errout;
     }
 
@@ -2773,11 +2953,11 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, GMII_MCR, phyval);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to write MCR register: %d\n", ret);
+      nerr("ERROR: Failed to write MCR register: %d\n", ret);
       goto errout;
     }
 
-  nllvdbg(" MCR: 0x%X\n", phyval);
+  ninfo(" MCR: 0x%X\n", phyval);
 
   /* Wait for autonegotion to complete */
 
@@ -2787,7 +2967,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
       ret  = sam_phyread(priv, priv->phyaddr, GMII_MSR, &phyval);
       if (ret < 0)
         {
-          nlldbg("ERROR: Failed to read MSR register: %d\n", ret);
+          nerr("ERROR: Failed to read MSR register: %d\n", ret);
           goto errout;
         }
 
@@ -2797,7 +2977,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
         {
           /* Yes.. break out of the loop */
 
-          nllvdbg("AutoNegotiate complete\n");
+          ninfo("AutoNegotiate complete\n");
           break;
         }
 
@@ -2805,7 +2985,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
 
       if (++timeout >= PHY_RETRY_MAX)
         {
-          nlldbg("ERROR: TimeOut\n");
+          nerr("ERROR: TimeOut\n");
           sam_phydump(priv);
           ret = -ETIMEDOUT;
           goto errout;
@@ -2822,7 +3002,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
       ret  = sam_phyread(priv, priv->phyaddr, GMII_1000BTSR, &btsr);
       if (ret < 0)
         {
-          nlldbg("ERROR: Failed to read 1000BTSR register: %d\n", ret);
+          nerr("ERROR: Failed to read 1000BTSR register: %d\n", ret);
           goto errout;
         }
 
@@ -2850,7 +3030,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
       ret  = sam_phyread(priv, priv->phyaddr, GMII_LPA, &lpa);
       if (ret < 0)
         {
-          nlldbg("ERROR: Failed to read LPA register: %d\n", ret);
+          nerr("ERROR: Failed to read LPA register: %d\n", ret);
           goto errout;
         }
 
@@ -2892,7 +3072,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
 
       if (++timeout >= PHY_RETRY_MAX)
         {
-          nlldbg("ERROR: TimeOut\n");
+          nerr("ERROR: TimeOut\n");
           sam_phydump(priv);
           ret = -ETIMEDOUT;
           goto errout;
@@ -3065,7 +3245,7 @@ static int sam_phyinit(struct sam_gmac_s *priv)
   ret = sam_phyfind(priv, &priv->phyaddr);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phyfind failed: %d\n", ret);
+      nerr("ERROR: sam_phyfind failed: %d\n", ret);
       return ret;
     }
 
@@ -3324,11 +3504,11 @@ static void sam_macaddress(struct sam_gmac_s *priv)
   struct net_driver_s *dev = &priv->dev;
   uint32_t regval;
 
-  nllvdbg("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          dev->d_ifname,
-          dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
-          dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
-          dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
+  ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        dev->d_ifname,
+        dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
+        dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
+        dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
 
   /* Set the MAC address */
 
@@ -3390,7 +3570,7 @@ static void sam_ipv6multicast(struct sam_gmac_s *priv)
   mac[4] = tmp16 & 0xff;
   mac[5] = tmp16 >> 8;
 
-  nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+  ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
         mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   (void)sam_addmac(dev, mac);
@@ -3436,7 +3616,7 @@ static int sam_gmac_configure(struct sam_gmac_s *priv)
 {
   uint32_t regval;
 
-  nllvdbg("Entry\n");
+  ninfo("Entry\n");
 
   /* Enable clocking to the GMAC peripheral */
 
@@ -3556,6 +3736,7 @@ int sam_gmac_initialize(void)
   /* Initialize the driver structure */
 
   memset(priv, 0, sizeof(struct sam_gmac_s));
+  priv->dev.d_buf     = g_pktbuf;        /* Single packet buffer */
   priv->dev.d_ifup    = sam_ifup;        /* I/F up (new IP address) callback */
   priv->dev.d_ifdown  = sam_ifdown;      /* I/F down callback */
   priv->dev.d_txavail = sam_txavail;     /* New TX data callback */
@@ -3573,7 +3754,7 @@ int sam_gmac_initialize(void)
   priv->txpoll = wd_create();
   if (!priv->txpoll)
     {
-      nlldbg("ERROR: Failed to create periodic poll timer\n");
+      nerr("ERROR: Failed to create periodic poll timer\n");
       ret = -EAGAIN;
       goto errout;
     }
@@ -3581,7 +3762,7 @@ int sam_gmac_initialize(void)
   priv->txtimeout = wd_create();         /* Create TX timeout timer */
   if (!priv->txtimeout)
     {
-      nlldbg("ERROR: Failed to create periodic poll timer\n");
+      nerr("ERROR: Failed to create periodic poll timer\n");
       ret = -EAGAIN;
       goto errout_with_txpoll;
     }
@@ -3595,7 +3776,7 @@ int sam_gmac_initialize(void)
   ret = sam_buffer_initialize(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_buffer_initialize failed: %d\n", ret);
+      nerr("ERROR: sam_buffer_initialize failed: %d\n", ret);
       goto errout_with_txtimeout;
     }
 
@@ -3603,10 +3784,10 @@ int sam_gmac_initialize(void)
    * the interface is in the 'up' state.
    */
 
-  ret = irq_attach(SAM_IRQ_GMAC, sam_gmac_interrupt);
+  ret = irq_attach(SAM_IRQ_GMAC, sam_gmac_interrupt, NULL);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to attach the handler to the IRQ%d\n", SAM_IRQ_GMAC);
+      nerr("ERROR: Failed to attach the handler to the IRQ%d\n", SAM_IRQ_GMAC);
       goto errout_with_buffers;
     }
 
@@ -3619,7 +3800,7 @@ int sam_gmac_initialize(void)
   ret = sam_ifdown(&priv->dev);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to put the interface in the down state: %d\n", ret);
+      nerr("ERROR: Failed to put the interface in the down state: %d\n", ret);
       goto errout_with_buffers;
     }
 
@@ -3631,7 +3812,7 @@ int sam_gmac_initialize(void)
       return ret;
     }
 
-  nlldbg("ERROR: netdev_register() failed: %d\n", ret);
+  nerr("ERROR: netdev_register() failed: %d\n", ret);
 
 errout_with_buffers:
   sam_buffer_free(priv);
diff --git a/arch/arm/src/sama5/sam_hsmci.c b/arch/arm/src/sama5/sam_hsmci.c
index 54a7e34d9a5cc1ea69bf190ad6d3f65f6dae6431..3aa006d87227119ae15e9bbd91b948cb599272ad 100644
--- a/arch/arm/src/sama5/sam_hsmci.c
+++ b/arch/arm/src/sama5/sam_hsmci.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/sama5/sam_hsmci.c
  *
- *   Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013-2014, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -52,6 +52,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -79,6 +80,16 @@
 
 /* Configuration ************************************************************/
 
+#if !defined(CONFIG_SAMA5_HSMCI_DMA)
+#  warning "Large Non-DMA transfer may result in RX overrun failures"
+#elif !defined(CONFIG_SDIO_DMA)
+#  warning CONFIG_SDIO_DMA should be defined with CONFIG_SAMA5_HSMCI_DMA
+#endif
+
+#ifndef CONFIG_DEBUG_MEMCARD_INFO
+#  undef CONFIG_SAMA5_HSMCI_REGDEBUG
+#endif
+
 #if defined(ATSAMA5D3)
   /* The SAMA5D3 has three HSMCI blocks: HSMCI0-2.  HSMCI0 requires DMAC0
    * support, HSMCI1-2 require DMAC1 support.
@@ -162,7 +173,7 @@
 #  error "This driver requires CONFIG_SDIO_BLOCKSETUP"
 #endif
 
-#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG_VERBOSE)
+#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG_INFO)
 #  undef CONFIG_SAMA5_HSMCI_CMDDEBUG
 #  undef CONFIG_SAMA5_HSMCI_XFRDEBUG
 #endif
@@ -402,7 +413,7 @@ struct sam_dev_s
 
   /* Callback support */
 
-  uint8_t            cdstatus;   /* Card status */
+  sdio_statset_t     cdstatus;   /* Card status */
   sdio_eventset_t    cbevents;   /* Set of events to be cause callbacks */
   worker_t           callback;   /* Registered callback function */
   void              *cbarg;      /* Registered callback argument */
@@ -425,17 +436,17 @@ struct sam_dev_s
   /* Debug stuff */
 
 #ifdef CONFIG_SAMA5_HSMCI_REGDEBUG
-   bool              wrlast;     /* Last was a write */
-   uint32_t          addrlast;   /* Last address */
-   uint32_t          vallast;    /* Last value */
-   int               ntimes;     /* Number of times */
+  bool               wrlast;     /* Last was a write */
+  uint32_t           addrlast;   /* Last address */
+  uint32_t           vallast;    /* Last value */
+  int                ntimes;     /* Number of times */
 #endif
 
   /* Register logging support */
 
 #if defined(CONFIG_SAMA5_HSMCI_CMDDEBUG) && defined(CONFIG_SAMA5_HSMCI_XFRDEBUG)
-   bool              xfrinitialized;
-   bool              cmdinitialized;
+  bool               xfrinitialized;
+  bool               cmdinitialized;
 #endif
 #ifdef CONFIG_SAMA5_HSMCI_XFRDEBUG
   uint8_t            smplset;
@@ -526,23 +537,15 @@ static void sam_notransfer(struct sam_dev_s *priv);
 
 /* Interrupt Handling *******************************************************/
 
-static int  sam_hsmci_interrupt(struct sam_dev_s *priv);
-#ifdef CONFIG_SAMA5_HSMCI0
-static int  sam_hsmci0_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_SAMA5_HSMCI1
-static int  sam_hsmci1_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_SAMA5_HSMCI2
-static int  sam_hsmci2_interrupt(int irq, void *context);
-#endif
+static int  sam_hsmci_interrupt(int irq, void *context, void *arg);
 
 /* SDIO interface methods ***************************************************/
 
 /* Initialization/setup */
 
 static void sam_reset(FAR struct sdio_dev_s *dev);
-static uint8_t sam_status(FAR struct sdio_dev_s *dev);
+static sdio_capset_t sam_capabilities(FAR struct sdio_dev_s *dev);
+static sdio_statset_t sam_status(FAR struct sdio_dev_s *dev);
 static void sam_widebus(FAR struct sdio_dev_s *dev, bool enable);
 static void sam_clock(FAR struct sdio_dev_s *dev,
               enum sdio_clock_e rate);
@@ -580,9 +583,7 @@ static int  sam_registercallback(FAR struct sdio_dev_s *dev,
 
 /* DMA */
 
-#ifdef CONFIG_SDIO_DMA
-static bool sam_dmasupported(FAR struct sdio_dev_s *dev);
-#endif
+#ifdef CONFIG_SAMA5_HSMCI_DMA
 #ifndef HSCMI_NORXDMA
 static int  sam_dmarecvsetup(FAR struct sdio_dev_s *dev,
               FAR uint8_t *buffer, size_t buflen);
@@ -591,6 +592,7 @@ static int  sam_dmarecvsetup(FAR struct sdio_dev_s *dev,
 static int  sam_dmasendsetup(FAR struct sdio_dev_s *dev,
               FAR const uint8_t *buffer, size_t buflen);
 #endif
+#endif
 
 /* Initialization/uninitialization/reset ************************************/
 
@@ -604,6 +606,7 @@ static void sam_callback(void *arg);
 static const struct sdio_dev_s g_callbacks =
 {
   .reset            = sam_reset,
+  .capabilities     = sam_capabilities,
   .status           = sam_status,
   .widebus          = sam_widebus,
   .clock            = sam_clock,
@@ -626,7 +629,6 @@ static const struct sdio_dev_s g_callbacks =
   .callbackenable   = sam_callbackenable,
   .registercallback = sam_registercallback,
 #ifdef CONFIG_SDIO_DMA
-  .dmasupported     = sam_dmasupported,
 #ifndef HSCMI_NORXDMA
   .dmarecvsetup     = sam_dmarecvsetup,
 #else
@@ -725,7 +727,7 @@ static bool sam_checkreg(struct sam_dev_s *priv, bool wr, uint32_t value,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", priv->ntimes);
+          mcinfo("...[Repeats %d times]...\n", priv->ntimes);
         }
 
       /* Save information about the new access */
@@ -758,7 +760,7 @@ static inline uint32_t sam_getreg(struct sam_dev_s *priv, unsigned int offset)
 #ifdef CONFIG_SAMA5_HSMCI_REGDEBUG
   if (sam_checkreg(priv, false, value, address))
     {
-      lldbg("%08x->%08x\n", address, value);
+      mcinfo("%08x->%08x\n", address, value);
     }
 #endif
 
@@ -781,7 +783,7 @@ static inline void sam_putreg(struct sam_dev_s *priv, uint32_t value,
 #ifdef CONFIG_SAMA5_HSMCI_REGDEBUG
   if (sam_checkreg(priv, true, value, address))
     {
-      lldbg("%08x<-%08x\n", address, value);
+      mcinfo("%08x<-%08x\n", address, value);
     }
 #endif
 
@@ -1003,23 +1005,23 @@ static void sam_hsmcisample(struct sam_dev_s *priv,
 static void sam_hsmcidump(struct sam_dev_s *priv,
                           struct sam_hsmciregs_s *regs, const char *msg)
 {
-  fdbg("HSMCI Registers: %s\n", msg);
-  fdbg("      MR[%08x]: %08x\n", priv->base + SAM_HSMCI_MR_OFFSET,    regs->mr);
-  fdbg("    DTOR[%08x]: %08x\n", priv->base + SAM_HSMCI_DTOR_OFFSET,  regs->dtor);
-  fdbg("    SDCR[%08x]: %08x\n", priv->base + SAM_HSMCI_SDCR_OFFSET,  regs->sdcr);
-  fdbg("    ARGR[%08x]: %08x\n", priv->base + SAM_HSMCI_ARGR_OFFSET,  regs->argr);
-  fdbg("    BLKR[%08x]: %08x\n", priv->base + SAM_HSMCI_BLKR_OFFSET,  regs->blkr);
-  fdbg("   CSTOR[%08x]: %08x\n", priv->base + SAM_HSMCI_CSTOR_OFFSET, regs->cstor);
-  fdbg("   RSPR0[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR0_OFFSET, regs->rsp0);
-  fdbg("   RSPR1[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR1_OFFSET, regs->rsp1);
-  fdbg("   RSPR2[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR2_OFFSET, regs->rsp2);
-  fdbg("   RSPR3[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR3_OFFSET, regs->rsp3);
-  fdbg("      SR[%08x]: %08x\n", priv->base + SAM_HSMCI_SR_OFFSET,    regs->sr);
-  fdbg("     IMR[%08x]: %08x\n", priv->base + SAM_HSMCI_IMR_OFFSET,   regs->imr);
-  fdbg("     DMA[%08x]: %08x\n", priv->base + SAM_HSMCI_DMA_OFFSET,   regs->dma);
-  fdbg("     CFG[%08x]: %08x\n", priv->base + SAM_HSMCI_CFG_OFFSET,   regs->cfg);
-  fdbg("    WPMR[%08x]: %08x\n", priv->base + SAM_HSMCI_WPMR_OFFSET,  regs->wpmr);
-  fdbg("    WPSR[%08x]: %08x\n", priv->base + SAM_HSMCI_WPSR_OFFSET,  regs->wpsr);
+  lcdinfo("HSMCI Registers: %s\n", msg);
+  lcdinfo("      MR[%08x]: %08x\n", priv->base + SAM_HSMCI_MR_OFFSET,    regs->mr);
+  lcdinfo("    DTOR[%08x]: %08x\n", priv->base + SAM_HSMCI_DTOR_OFFSET,  regs->dtor);
+  lcdinfo("    SDCR[%08x]: %08x\n", priv->base + SAM_HSMCI_SDCR_OFFSET,  regs->sdcr);
+  lcdinfo("    ARGR[%08x]: %08x\n", priv->base + SAM_HSMCI_ARGR_OFFSET,  regs->argr);
+  lcdinfo("    BLKR[%08x]: %08x\n", priv->base + SAM_HSMCI_BLKR_OFFSET,  regs->blkr);
+  lcdinfo("   CSTOR[%08x]: %08x\n", priv->base + SAM_HSMCI_CSTOR_OFFSET, regs->cstor);
+  lcdinfo("   RSPR0[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR0_OFFSET, regs->rsp0);
+  lcdinfo("   RSPR1[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR1_OFFSET, regs->rsp1);
+  lcdinfo("   RSPR2[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR2_OFFSET, regs->rsp2);
+  lcdinfo("   RSPR3[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR3_OFFSET, regs->rsp3);
+  lcdinfo("      SR[%08x]: %08x\n", priv->base + SAM_HSMCI_SR_OFFSET,    regs->sr);
+  lcdinfo("     IMR[%08x]: %08x\n", priv->base + SAM_HSMCI_IMR_OFFSET,   regs->imr);
+  lcdinfo("     DMA[%08x]: %08x\n", priv->base + SAM_HSMCI_DMA_OFFSET,   regs->dma);
+  lcdinfo("     CFG[%08x]: %08x\n", priv->base + SAM_HSMCI_CFG_OFFSET,   regs->cfg);
+  lcdinfo("    WPMR[%08x]: %08x\n", priv->base + SAM_HSMCI_WPMR_OFFSET,  regs->wpmr);
+  lcdinfo("    WPSR[%08x]: %08x\n", priv->base + SAM_HSMCI_WPSR_OFFSET,  regs->wpsr);
 }
 #endif
 
@@ -1093,7 +1095,7 @@ static void sam_xfrdumpone(struct sam_dev_s *priv, int index,
     }
   else
     {
-      fdbg("%s: Not collected\n", msg);
+      lcdinfo("%s: Not collected\n", msg);
     }
 }
 #endif
@@ -1237,7 +1239,7 @@ static void sam_dmacallback(DMA_HANDLE handle, void *arg, int result)
       if (result < 0)
         {
           wkupevent = (result == -ETIMEDOUT ? SDIOWAIT_TIMEOUT : SDIOWAIT_ERROR);
-          flldbg("ERROR: DMA failed: result=%d wkupevent=%04x\n", result, wkupevent);
+          mcerr("ERROR: DMA failed: result=%d wkupevent=%04x\n", result, wkupevent);
 
           /* sam_endtransfer will terminate the transfer and wait up the waiting
            * client in this case.
@@ -1337,7 +1339,7 @@ static void sam_eventtimeout(int argc, uint32_t arg)
       /* Yes.. wake up any waiting threads */
 
       sam_endwait(priv, SDIOWAIT_TIMEOUT);
-      flldbg("ERROR: Timeout\n");
+      mcerr("ERROR: Timeout\n");
     }
 }
 
@@ -1501,12 +1503,15 @@ static void sam_notransfer(struct sam_dev_s *priv)
  *
  ****************************************************************************/
 
-static int sam_hsmci_interrupt(struct sam_dev_s *priv)
+static int sam_hsmci_interrupt(int irq, void *context, void *arg)
 {
+  struct sam_dev_s *priv = (struct sam_dev_s *)arg;
   uint32_t sr;
   uint32_t enabled;
   uint32_t pending;
 
+  DEBUGASSERT(priv != NULL);
+
   /* Loop while there are pending interrupts. */
 
   for (; ; )
@@ -1537,7 +1542,7 @@ static int sam_hsmci_interrupt(struct sam_dev_s *priv)
             {
               /* Yes.. Was it some kind of timeout error? */
 
-              flldbg("ERROR: enabled: %08x pending: %08x\n", enabled, pending);
+              mcerr("ERROR: enabled: %08x pending: %08x\n", enabled, pending);
               if ((pending & HSMCI_DATA_TIMEOUT_ERRORS) != 0)
                 {
                   /* Yes.. Terminate with a timeout. */
@@ -1609,8 +1614,8 @@ static int sam_hsmci_interrupt(struct sam_dev_s *priv)
                 {
                   /* Yes.. Was the error some kind of timeout? */
 
-                  fllvdbg("ERROR: events: %08x SR: %08x\n",
-                          priv->cmdrmask, enabled);
+                  mcerr("ERROR: events: %08x SR: %08x\n",
+                        priv->cmdrmask, enabled);
 
                   if ((pending & HSMCI_RESPONSE_TIMEOUT_ERRORS) != 0)
                     {
@@ -1650,42 +1655,6 @@ static int sam_hsmci_interrupt(struct sam_dev_s *priv)
   return OK;
 }
 
-/****************************************************************************
- * Name: sam_hsmci0_interrupt, sam_hsmci1_interrupt, and sam_hsmci2_interrupt
- *
- * Description:
- *   HSMCI interrupt handler
- *
- * Input Parameters:
- *   irq - IRQ number of the interrupts
- *   context - Saved machine context at the time of the interrupt
- *
- * Returned Value:
- *   None
- *
- ****************************************************************************/
-
-#ifdef CONFIG_SAMA5_HSMCI0
-static int sam_hsmci0_interrupt(int irq, void *context)
-{
-  return sam_hsmci_interrupt(&g_hsmci0);
-}
-#endif
-
-#ifdef CONFIG_SAMA5_HSMCI1
-static int sam_hsmci1_interrupt(int irq, void *context)
-{
-  return sam_hsmci_interrupt(&g_hsmci1);
-}
-#endif
-
-#ifdef CONFIG_SAMA5_HSMCI2
-static int sam_hsmci2_interrupt(int irq, void *context)
-{
-  return sam_hsmci_interrupt(&g_hsmci2);
-}
-#endif
-
 /****************************************************************************
  * SDIO Interface Methods
  ****************************************************************************/
@@ -1769,6 +1738,31 @@ static void sam_reset(FAR struct sdio_dev_s *dev)
   leave_critical_section(flags);
 }
 
+/****************************************************************************
+ * Name: sam_capabilities
+ *
+ * Description:
+ *   Get capabilities (and limitations) of the SDIO driver (optional)
+ *
+ * Input Parameters:
+ *   dev   - Device-specific state data
+ *
+ * Returned Value:
+ *   Returns a bitset of status values (see SDIO_CAPS_* defines)
+ *
+ ****************************************************************************/
+
+static sdio_capset_t sam_capabilities(FAR struct sdio_dev_s *dev)
+{
+  sdio_capset_t caps = 0;
+
+#ifdef CONFIG_SAMA5_HSMCI_DMA
+  caps |= SDIO_CAPS_DMASUPPORTED;
+#endif
+
+  return caps;
+}
+
 /****************************************************************************
  * Name: sam_status
  *
@@ -1783,7 +1777,7 @@ static void sam_reset(FAR struct sdio_dev_s *dev)
  *
  ****************************************************************************/
 
-static uint8_t sam_status(FAR struct sdio_dev_s *dev)
+static sdio_statset_t sam_status(FAR struct sdio_dev_s *dev)
 {
   struct sam_dev_s *priv = (struct sam_dev_s *)dev;
   return priv->cdstatus;
@@ -1911,7 +1905,6 @@ static void sam_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
 static int sam_attach(FAR struct sdio_dev_s *dev)
 {
   struct sam_dev_s *priv = (struct sam_dev_s *)dev;
-  xcpt_t handler;
   int irq;
   int ret;
 
@@ -1920,24 +1913,21 @@ static int sam_attach(FAR struct sdio_dev_s *dev)
 #ifdef CONFIG_SAMA5_HSMCI0
   if (priv->hsmci == 0)
     {
-      handler = sam_hsmci0_interrupt;
-      irq     = SAM_IRQ_HSMCI0;
+      irq = SAM_IRQ_HSMCI0;
     }
   else
 #endif
 #ifdef CONFIG_SAMA5_HSMCI1
   if (priv->hsmci == 1)
     {
-      handler = sam_hsmci1_interrupt;
-      irq     = SAM_IRQ_HSMCI1;
+      irq = SAM_IRQ_HSMCI1;
     }
   else
 #endif
 #ifdef CONFIG_SAMA5_HSMCI2
   if (priv->hsmci == 2)
     {
-      handler = sam_hsmci2_interrupt;
-      irq     = SAM_IRQ_HSMCI2;
+      irq = SAM_IRQ_HSMCI2;
     }
   else
 #endif
@@ -1948,7 +1938,7 @@ static int sam_attach(FAR struct sdio_dev_s *dev)
 
   /* Attach the HSMCI interrupt handler */
 
-  ret = irq_attach(irq, handler);
+  ret = irq_attach(irq, sam_hsmci_interrupt, priv);
   if (ret == OK)
     {
 
@@ -2090,7 +2080,7 @@ static int sam_sendcmd(FAR struct sdio_dev_s *dev,
 
   /* Write the fully decorated command to CMDR */
 
-  fvdbg("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
+  mcinfo("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
   sam_putreg(priv, regval, SAM_HSMCI_CMDR_OFFSET);
   sam_cmdsample1(priv, SAMPLENDX_AFTER_CMDR);
   return OK;
@@ -2253,7 +2243,7 @@ static int sam_sendsetup(FAR struct sdio_dev_s *dev, FAR const uint8_t *buffer,
         {
           /* Some fatal error has occurred */
 
-          fdbg("ERROR: sr %08x\n", sr);
+          lcderr("ERROR: sr %08x\n", sr);
           return -EIO;
         }
       else if ((sr & HSMCI_INT_TXRDY) != 0)
@@ -2388,7 +2378,7 @@ static int sam_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
             {
               /* Yes.. Was the error some kind of timeout? */
 
-              fdbg("ERROR: cmd: %08x events: %08x SR: %08x\n",
+              lcderr("ERROR: cmd: %08x events: %08x SR: %08x\n",
                    cmd, priv->cmdrmask, sr);
 
               if ((pending & HSMCI_RESPONSE_TIMEOUT_ERRORS) != 0)
@@ -2418,8 +2408,8 @@ static int sam_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
        }
       else if (--timeout <= 0)
         {
-          fdbg("ERROR: Timeout cmd: %08x events: %08x SR: %08x\n",
-               cmd, priv->cmdrmask, sr);
+          lcderr("ERROR: Timeout cmd: %08x events: %08x SR: %08x\n",
+                 cmd, priv->cmdrmask, sr);
 
           priv->wkupevent = SDIOWAIT_TIMEOUT;
           return -ETIMEDOUT;
@@ -2490,10 +2480,10 @@ static int sam_recvshort(FAR struct sdio_dev_s *dev,
    *     0         1               End bit
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!rshort)
     {
-      fdbg("ERROR: rshort=NULL\n");
+      lcderr("ERROR: rshort=NULL\n");
       ret = -EINVAL;
     }
 
@@ -2505,7 +2495,7 @@ static int sam_recvshort(FAR struct sdio_dev_s *dev,
            (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R3_RESPONSE &&
            (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R7_RESPONSE)
     {
-      fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+      lcderr("ERROR: Wrong response CMD=%08x\n", cmd);
       ret = -EINVAL;
     }
   else
@@ -2550,12 +2540,12 @@ static int sam_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t rlong
    *     0         1               End bit
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   /* Check that R1 is the correct response to this command */
 
   if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R2_RESPONSE)
     {
-      fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+      lcderr("ERROR: Wrong response CMD=%08x\n", cmd);
       ret = -EINVAL;
     }
   else
@@ -2746,7 +2736,7 @@ static sdio_eventset_t sam_eventwait(FAR struct sdio_dev_s *dev,
                        1, (uint32_t)priv);
       if (ret != OK)
         {
-           fdbg("ERROR: wd_start failed: %d\n", ret);
+           lcderr("ERROR: wd_start failed: %d\n", ret);
         }
     }
 
@@ -2812,7 +2802,7 @@ static void sam_callbackenable(FAR struct sdio_dev_s *dev,
 {
   struct sam_dev_s *priv = (struct sam_dev_s *)dev;
 
-  fvdbg("eventset: %02x\n", eventset);
+  mcinfo("eventset: %02x\n", eventset);
   DEBUGASSERT(priv != NULL);
 
   priv->cbevents = eventset;
@@ -2848,7 +2838,7 @@ static int sam_registercallback(FAR struct sdio_dev_s *dev,
 
   /* Disable callbacks and register this callback and is argument */
 
-  fvdbg("Register %p(%p)\n", callback, arg);
+  mcinfo("Register %p(%p)\n", callback, arg);
   DEBUGASSERT(priv != NULL);
 
   priv->cbevents = 0;
@@ -2857,27 +2847,6 @@ static int sam_registercallback(FAR struct sdio_dev_s *dev,
   return OK;
 }
 
-/****************************************************************************
- * Name: sam_dmasupported
- *
- * Description:
- *   Return true if the hardware can support DMA
- *
- * Input Parameters:
- *   dev - An instance of the SDIO device interface
- *
- * Returned Value:
- *   true if DMA is supported.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_SDIO_DMA
-static bool sam_dmasupported(FAR struct sdio_dev_s *dev)
-{
-  return true;
-}
-#endif
-
 /****************************************************************************
  * Name: sam_dmarecvsetup
  *
@@ -3095,8 +3064,8 @@ static void sam_callback(void *arg)
   /* Is a callback registered? */
 
   DEBUGASSERT(priv != NULL);
-  fvdbg("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
-        priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus);
+  mcinfo("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
+         priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus);
 
   flags = enter_critical_section();
   if (priv->callback)
@@ -3150,17 +3119,17 @@ static void sam_callback(void *arg)
         {
           /* NOTE: Currently, work_cancel only returns success */
 
-          fdbg("ERROR: Failed to cancel work: %d\n", ret);
+          lcderr("ERROR: Failed to cancel work: %d\n", ret);
         }
 
-      fllvdbg("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
+      mcinfo("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
       ret = work_queue(LPWORK, &priv->cbwork, (worker_t)priv->callback,
                        priv->cbarg, 0);
       if (ret < 0)
         {
           /* NOTE: Currently, work_queue only returns success */
 
-          fdbg("ERROR: Failed to schedule work: %d\n", ret);
+          lcderr("ERROR: Failed to schedule work: %d\n", ret);
         }
     }
 
@@ -3199,7 +3168,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
    * for now, an* HSMCI peripheral does correspond to a slot.
    */
 
-  fdbg("slotno: %d\n", slotno);
+  lcdinfo("slotno: %d\n", slotno);
 
 #ifdef CONFIG_SAMA5_HSMCI0
   if (slotno == 0)
@@ -3323,12 +3292,22 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
       return NULL;
     }
 
-  fvdbg("priv: %p base: %08x hsmci: %d dmac: %d pid: %d\n",
-        priv, priv->base, priv->hsmci, dmac, pid);
+  mcinfo("priv: %p base: %08x hsmci: %d dmac: %d pid: %d\n",
+         priv, priv->base, priv->hsmci, dmac, pid);
 
   /* Initialize the HSMCI slot structure */
+  /* Initialize semaphores */
 
   sem_init(&priv->waitsem, 0, 0);
+
+  /* The waitsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
+
+  /* Create a watchdog timer */
+
   priv->waitwdog = wd_create();
   DEBUGASSERT(priv->waitwdog);
 
@@ -3374,7 +3353,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
 void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
 {
   struct sam_dev_s *priv = (struct sam_dev_s *)dev;
-  uint8_t cdstatus;
+  sdio_statset_t cdstatus;
   irqstate_t flags;
 
   /* Update card status.  Interrupts are disabled here because if we are
@@ -3393,7 +3372,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
       priv->cdstatus &= ~SDIO_STATUS_PRESENT;
     }
 
-  fllvdbg("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
+  mcinfo("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
 
   /* Perform any requested callback if the status has changed */
 
@@ -3438,7 +3417,7 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
       priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED;
     }
 
-  fvdbg("cdstatus: %02x\n", priv->cdstatus);
+  mcinfo("cdstatus: %02x\n", priv->cdstatus);
   leave_critical_section(flags);
 }
 
diff --git a/arch/arm/src/sama5/sam_irq.c b/arch/arm/src/sama5/sam_irq.c
index 21ce68ff236dbe29458a80cc8d4ba9fde796d940..c8cf1f5cd5495f50c47b3c76605a7414c68b6f25 100644
--- a/arch/arm/src/sama5/sam_irq.c
+++ b/arch/arm/src/sama5/sam_irq.c
@@ -125,13 +125,13 @@ static const uint32_t g_h64mxpids[3] =
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_IRQ)
+#if defined(CONFIG_DEBUG_IRQ_INFO)
 static void sam_dumpaic(const char *msg, uintptr_t base, int irq)
 {
   irqstate_t flags;
 
   flags = enter_critical_section();
-  lldbg("AIC (%s, base=%08x irq=%d):\n", msg, base, irq);
+  irqinfo("AIC (%s, base=%08x irq=%d):\n", msg, base, irq);
 
   /* Select the register set associated with this irq */
 
@@ -139,39 +139,39 @@ static void sam_dumpaic(const char *msg, uintptr_t base, int irq)
 
   /* Then dump all of the (readable) register contents */
 
-  lldbg("  SSR: %08x  SMR: %08x  SVR: %08x  IVR: %08x\n",
-        getreg32(base + SAM_AIC_SSR_OFFSET),
-        getreg32(base + SAM_AIC_SMR_OFFSET),
-        getreg32(base + SAM_AIC_SVR_OFFSET),
-        getreg32(base + SAM_AIC_IVR_OFFSET));
-  lldbg("  FVR: %08x  ISR: %08x\n",
-        getreg32(base + SAM_AIC_FVR_OFFSET),
-        getreg32(base + SAM_AIC_ISR_OFFSET));
-  lldbg("  IPR: %08x       %08x       %08x       %08x\n",
-        getreg32(base + SAM_AIC_IPR0_OFFSET),
-        getreg32(base + SAM_AIC_IPR1_OFFSET),
-        getreg32(base + SAM_AIC_IPR2_OFFSET),
-        getreg32(base + SAM_AIC_IPR3_OFFSET));
+  irqinfo("  SSR: %08x  SMR: %08x  SVR: %08x  IVR: %08x\n",
+          getreg32(base + SAM_AIC_SSR_OFFSET),
+          getreg32(base + SAM_AIC_SMR_OFFSET),
+          getreg32(base + SAM_AIC_SVR_OFFSET),
+          getreg32(base + SAM_AIC_IVR_OFFSET));
+  irqinfo("  FVR: %08x  ISR: %08x\n",
+          getreg32(base + SAM_AIC_FVR_OFFSET),
+          getreg32(base + SAM_AIC_ISR_OFFSET));
+  irqinfo("  IPR: %08x       %08x       %08x       %08x\n",
+          getreg32(base + SAM_AIC_IPR0_OFFSET),
+          getreg32(base + SAM_AIC_IPR1_OFFSET),
+          getreg32(base + SAM_AIC_IPR2_OFFSET),
+          getreg32(base + SAM_AIC_IPR3_OFFSET));
 
   /* SAMA5D4 does not have the FFSR register */
 
 #if defined(SAM_AIC_FFSR)
-  lldbg("  IMR: %08x CISR: %08x  SPU: %08x FFSR: %08x\n",
-        getreg32(base + SAM_AIC_IMR_OFFSET),
-        getreg32(base + SAM_AIC_CISR_OFFSET),
-        getreg32(base + SAM_AIC_SPU_OFFSET),
-        getreg32(base + SAM_AIC_FFSR_OFFSET));
+  irqinfo("  IMR: %08x CISR: %08x  SPU: %08x FFSR: %08x\n",
+          getreg32(base + SAM_AIC_IMR_OFFSET),
+          getreg32(base + SAM_AIC_CISR_OFFSET),
+          getreg32(base + SAM_AIC_SPU_OFFSET),
+          getreg32(base + SAM_AIC_FFSR_OFFSET));
 #else
-  lldbg("  IMR: %08x CISR: %08x  SPU: %08x\n",
-        getreg32(base + SAM_AIC_IMR_OFFSET),
-        getreg32(base + SAM_AIC_CISR_OFFSET),
-        getreg32(base + SAM_AIC_SPU_OFFSET));
+  irqinfo("  IMR: %08x CISR: %08x  SPU: %08x\n",
+          getreg32(base + SAM_AIC_IMR_OFFSET),
+          getreg32(base + SAM_AIC_CISR_OFFSET),
+          getreg32(base + SAM_AIC_SPU_OFFSET));
 #endif
 
-  lldbg("  DCR: %08x WPMR: %08x WPSR: %08x\n",
-        getreg32(base + SAM_AIC_DCR_OFFSET),
-        getreg32(base + SAM_AIC_WPMR_OFFSET),
-        getreg32(base + SAM_AIC_WPSR_OFFSET));
+  irqinfo("  DCR: %08x WPMR: %08x WPSR: %08x\n",
+          getreg32(base + SAM_AIC_DCR_OFFSET),
+          getreg32(base + SAM_AIC_WPMR_OFFSET),
+          getreg32(base + SAM_AIC_WPSR_OFFSET));
 
   leave_critical_section(flags);
 }
@@ -234,8 +234,8 @@ static uint32_t *sam_spurious(int irq, uint32_t *regs)
    * in this implementation.  The value of AIC_IVR is ignored.
    */
 
-#if defined(CONFIG_DEBUG_IRQ)
-  lldbg("Spurious interrupt: IRQ %d\n", irq);
+#if defined(CONFIG_DEBUG_IRQ_INFO)
+  irqinfo("Spurious interrupt: IRQ %d\n", irq);
 #endif
   return regs;
 }
@@ -327,12 +327,12 @@ static void sam_aic_redirection(void)
       regval |= SFR_AICREDIR_ENABLE;
       putreg32(regval, SAM_SFR_AICREDIR);
 
-#if defined(CONFIG_DEBUG_IRQ)
+#if defined(CONFIG_DEBUG_IRQ_INFO)
       /* Check if redirection was successfully enabled */
 
       regval = getreg32(SAM_SFR_AICREDIR);
-      lldbg("Interrupts %s redirected to the AIC\n",
-           (regval & SFR_AICREDIR_ENABLE) != 0 ? "ARE" : "NOT");
+      irqinfo("Interrupts %s redirected to the AIC\n",
+              (regval & SFR_AICREDIR_ENABLE) != 0 ? "ARE" : "NOT");
 #endif
     }
 }
diff --git a/arch/arm/src/sama5/sam_isi.c b/arch/arm/src/sama5/sam_isi.c
index 124734a416cc389bcd6b6871659a14512b41d5b2..86fa8e0dad8d7393a0f32735577d25117b27657f 100644
--- a/arch/arm/src/sama5/sam_isi.c
+++ b/arch/arm/src/sama5/sam_isi.c
@@ -160,7 +160,7 @@ int sam_isi_initialize(void)
    */
 
   g_isi.actual = sam_pck_configure(ISI_PCKID, PCKSRC_MCK, CONFIG_ISI_MCKFREQ);
-  gvdbg("PCK%d frequency=%d actual=%d\n",
+  ginfo("PCK%d frequency=%d actual=%d\n",
         ISI_PCKID, CONFIG_ISI_MCKFREQ, g_isi.actual);
 
   /* Enable the MCK (output) */
diff --git a/arch/arm/src/sama5/sam_lcd.c b/arch/arm/src/sama5/sam_lcd.c
index 8032bb04f46620ecca0d016172e76035870e1046..3befc8fec63fa02f620af99e424a71674826a461 100644
--- a/arch/arm/src/sama5/sam_lcd.c
+++ b/arch/arm/src/sama5/sam_lcd.c
@@ -492,7 +492,7 @@
 
 /* Debug */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_LCD_INFO
 #  undef CONFIG_SAMA5_LCDC_REGDEBUG
 #endif
 
@@ -666,7 +666,7 @@ struct sam_lcdc_s
  ****************************************************************************/
 /* Register operations ******************************************************/
 
-#if defined(CONFIG_SAMA5_LCDC_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAMA5_LCDC_REGDEBUG
 static bool sam_checkreg(bool wr, uint32_t regval, uintptr_t address);
 static uint32_t sam_getreg(uintptr_t addr);
 static void sam_putreg(uintptr_t addr, uint32_t val);
@@ -977,10 +977,6 @@ static const uintptr_t g_layerclut[LCDC_NLAYERS] =
 };
 #endif
 
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -1021,7 +1017,7 @@ static bool sam_checkreg(bool wr, uint32_t regval, uintptr_t address)
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", g_lcdc.ntimes);
+          lcdinfo("...[Repeats %d times]...\n", g_lcdc.ntimes);
         }
 
       /* Save information about the new access */
@@ -1053,7 +1049,7 @@ static uint32_t sam_getreg(uintptr_t address)
 
   if (sam_checkreg(false, regval, address))
     {
-      lldbg("%08x->%08x\n", address, regval);
+      lcdinfo("%08x->%08x\n", address, regval);
     }
 
   return regval;
@@ -1073,7 +1069,7 @@ static void sam_putreg(uintptr_t address, uint32_t regval)
 {
   if (sam_checkreg(true, regval, address))
     {
-      lldbg("%08x<-%08x\n", address, regval);
+      lcdinfo("%08x<-%08x\n", address, regval);
     }
 
   putreg32(regval, address);
@@ -1101,14 +1097,14 @@ static void sam_wait_lcdstatus(uint32_t mask, uint32_t value)
 static int sam_base_getvideoinfo(struct fb_vtable_s *vtable,
                                  struct fb_videoinfo_s *vinfo)
 {
-  gvdbg("vtable=%p vinfo=%p\n", vtable, vinfo);
+  lcdinfo("vtable=%p vinfo=%p\n", vtable, vinfo);
   if (vtable && vinfo)
     {
       memcpy(vinfo, &g_base_videoinfo, sizeof(struct fb_videoinfo_s));
       return OK;
     }
 
-  gdbg("ERROR: Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -1119,7 +1115,7 @@ static int sam_base_getvideoinfo(struct fb_vtable_s *vtable,
 static int sam_base_getplaneinfo(struct fb_vtable_s *vtable, int planeno,
                                  struct fb_planeinfo_s *pinfo)
 {
-  gvdbg("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
+  lcdinfo("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
   if (vtable && planeno == 0 && pinfo)
     {
       pinfo->fbmem   = (void *)LAYER_BASE.framebuffer;
@@ -1130,7 +1126,7 @@ static int sam_base_getplaneinfo(struct fb_vtable_s *vtable, int planeno,
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -1166,27 +1162,27 @@ static int sam_base_putcmap(struct fb_vtable_s *vtable,
 static int sam_hcr_getcursor(struct fb_vtable_s *vtable,
                              struct fb_cursorattrib_s *attrib)
 {
-  gvdbg("vtable=%p attrib=%p\n", vtable, attrib);
+  lcdinfo("vtable=%p attrib=%p\n", vtable, attrib);
   if (vtable && attrib)
     {
 #ifdef CONFIG_FB_HWCURSORIMAGE
       attrib->fmt = SAMA5_HCR_COLOR_FMT;
 #endif
 
-      gvdbg("pos: (x=%d, y=%d)\n", g_lcdc.cpos.x, g_lcdc.cpos.y);
+      lcdinfo("pos: (x=%d, y=%d)\n", g_lcdc.cpos.x, g_lcdc.cpos.y);
       attrib->pos = g_lcdc.cpos;
 
 #ifdef CONFIG_FB_HWCURSORSIZE
       attrib->mxsize.h = CONFIG_SAMA5_LCDC_HCR_HEIGHT;
       attrib->mxsize.w = CONFIG_SAMA5_LCDC_HCR_WIDTH;
 
-      gvdbg("size: (h=%d, w=%d)\n", g_lcdc.csize.h, g_lcdc.csize.w);
+      lcdinfo("size: (h=%d, w=%d)\n", g_lcdc.csize.h, g_lcdc.csize.w);
       attrib->size = g_lcdc.csize;
 #endif
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 #endif
@@ -1199,26 +1195,26 @@ static int sam_hcr_getcursor(struct fb_vtable_s *vtable,
 static int sam_hcr_setcursor(struct fb_vtable_s *vtable,
                              struct fb_setcursor_s *setttings)
 {
-  gvdbg("vtable=%p setttings=%p\n", vtable, setttings);
+  lcdinfo("vtable=%p setttings=%p\n", vtable, setttings);
   if (vtable && setttings)
     {
-      gvdbg("flags: %02x\n", settings->flags);
+      lcdinfo("flags: %02x\n", settings->flags);
       if ((flags & FB_CUR_SETPOSITION) != 0)
         {
           g_lcdc.cpos = settings->pos;
-          gvdbg("pos: (h:%d, w:%d)\n", g_lcdc.cpos.x, g_lcdc.cpos.y);
+          lcdinfo("pos: (h:%d, w:%d)\n", g_lcdc.cpos.x, g_lcdc.cpos.y);
         }
 #ifdef CONFIG_FB_HWCURSORSIZE
       if ((flags & FB_CUR_SETSIZE) != 0)
         {
           g_lcdc.csize = settings->size;
-          gvdbg("size: (h:%d, w:%d)\n", g_lcdc.csize.h, g_lcdc.csize.w);
+          lcdinfo("size: (h:%d, w:%d)\n", g_lcdc.csize.h, g_lcdc.csize.w);
         }
 #endif
 #ifdef CONFIG_FB_HWCURSORIMAGE
       if ((flags & FB_CUR_SETIMAGE) != 0)
         {
-          gvdbg("image: (h:%d, w:%d) @ %p\n",
+          lcdinfo("image: (h:%d, w:%d) @ %p\n",
                 settings->img.height, settings->img.width,
                 settings->img.image);
         }
@@ -1226,7 +1222,7 @@ static int sam_hcr_setcursor(struct fb_vtable_s *vtable,
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 #endif
@@ -1291,14 +1287,14 @@ static void sam_dmasetup(int lid, struct sam_dscr_s *dscr, uint8_t *buffer)
       sam_putreg(g_layernext[lid], physdscr);
     }
 
-#if defined(CONFIG_DEBUG_GRAPHICS) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_GRAPHICS) && defined(CONFIG_DEBUG_INFO)
   /* Dump the DMA setup */
 
-  gvdbg("DMA descriptor:   addr=%08x ctrl=%08x next=%08x\n",
-        dscr->addr, dscr->ctrl, dscr->next);
-  gvdbg("DMA registers[%d]: head=%08x addr=%08x ctrl=%08x next=%08x\n",
-        lid, sam_getreg(g_layerhead[lid]), sam_getreg(g_layeraddr[lid]),
-        sam_getreg(g_layerctrl[lid]), sam_getreg(g_layernext[lid]));
+  lcdinfo("DMA descriptor:   addr=%08x ctrl=%08x next=%08x\n",
+          dscr->addr, dscr->ctrl, dscr->next);
+  lcdinfo("DMA registers[%d]: head=%08x addr=%08x ctrl=%08x next=%08x\n",
+          lid, sam_getreg(g_layerhead[lid]), sam_getreg(g_layeraddr[lid]),
+          sam_getreg(g_layerctrl[lid]), sam_getreg(g_layernext[lid]));
 #endif
 }
 
@@ -1379,8 +1375,8 @@ static int sam_setclut(struct sam_layer_s *layer,
   unsigned int end;
   int i;
 
-  gvdbg("layer=%d cmap=%p first=%d len=%d\n",
-        layer->lid, cmap, cmap->first, cmap->len);
+  lcdinfo("layer=%d cmap=%p first=%d len=%d\n",
+          layer->lid, cmap, cmap->first, cmap->len);
 
   DEBUGASSERT(layer && cmap);
 
@@ -1391,7 +1387,7 @@ static int sam_setclut(struct sam_layer_s *layer,
 
   if (offset >= SAM_LCDC_NCLUT)
     {
-      gdbg("ERROR: CLUT offset is out of range: %d\n", offset);
+      lcderr("ERROR: CLUT offset is out of range: %d\n", offset);
       return -EINVAL;
     }
 
@@ -1460,7 +1456,7 @@ static int sam_getclut(struct sam_layer_s *layer,
   uintptr_t regval;
   int i;
 
-  gvdbg("layer=%d cmap=%p first=%d len=%d\n",
+  lcdinfo("layer=%d cmap=%p first=%d len=%d\n",
         layer->lid, cmap, layer->offset, layer->nclut);
 
   DEBUGASSERT(layer && cmap);
@@ -1514,7 +1510,7 @@ static void sam_pio_config(void)
 {
   int i;
 
-  gvdbg("Configuring pins\n");
+  lcdinfo("Configuring pins\n");
 
   /* Configure each pin */
 
@@ -2915,7 +2911,7 @@ int up_fbinitialize(int display)
   uint32_t regval;
 #endif
 
-  gvdbg("Entry\n");
+  lcdinfo("Entry\n");
 
   /* Configure layer layer structures, DMA descriptor memory, and
    * framebuffers
@@ -2931,7 +2927,7 @@ int up_fbinitialize(int display)
 
   sam_pio_config();
 
-  gvdbg("Configuring the LCD controller\n");
+  lcdinfo("Configuring the LCD controller\n");
 
   /* Enable the LCD peripheral clock */
 
@@ -2959,7 +2955,7 @@ int up_fbinitialize(int display)
 
   /* And turn the LCD on */
 
-  gvdbg("Enabling the display\n");
+  lcdinfo("Enabling the display\n");
   sam_lcd_enable();
 
   /* Display base layer */
@@ -3012,7 +3008,7 @@ int up_fbinitialize(int display)
 
 FAR struct fb_vtable_s *up_fbgetvplane(int display, int vplane)
 {
-  gvdbg("vplane: %d\n", vplane);
+  lcdinfo("vplane: %d\n", vplane);
   if (vplane == 0)
     {
       return (struct fb_vtable_s *)&g_base_vtable;
@@ -3062,8 +3058,8 @@ void sam_lcdclear(nxgl_mxpixel_t color)
   uint16_t *dest = (uint16_t *)LAYER_BASE.framebuffer;
   int i;
 
-  gvdbg("Clearing display: BPP=16 color=%04x framebuffer=%08x size=%d\n",
-        color, LAYER_BASE.framebuffer, SAMA5_BASE_FBSIZE);
+  lcdinfo("Clearing display: BPP=16 color=%04x framebuffer=%08x size=%d\n",
+          color, LAYER_BASE.framebuffer, SAMA5_BASE_FBSIZE);
 
   for (i = 0; i < SAMA5_BASE_FBSIZE; i += sizeof(uint16_t))
     {
@@ -3076,8 +3072,8 @@ void sam_lcdclear(nxgl_mxpixel_t color)
   uint8_t b;
   int i;
 
-  gvdbg("Clearing display: BPP=24 color=%06x framebuffer=%08x size=%d\n",
-        color, LAYER_BASE.framebuffer, SAMA5_BASE_FBSIZE);
+  lcdinfo("Clearing display: BPP=24 color=%06x framebuffer=%08x size=%d\n",
+          color, LAYER_BASE.framebuffer, SAMA5_BASE_FBSIZE);
 
   b =  color        & 0xff;
   g = (color >> 8)  & 0xff;
@@ -3093,8 +3089,8 @@ void sam_lcdclear(nxgl_mxpixel_t color)
   uint32_t *dest = (uint32_t *)LAYER_BASE.framebuffer;
   int i;
 
-  gvdbg("Clearing display: BPP=32 color=%08x framebuffer=%08x size=%d\n",
-        color, LAYER_BASE.framebuffer, SAMA5_BASE_FBSIZE);
+  lcdinfo("Clearing display: BPP=32 color=%08x framebuffer=%08x size=%d\n",
+          color, LAYER_BASE.framebuffer, SAMA5_BASE_FBSIZE);
 
   for (i = 0; i < SAMA5_BASE_FBSIZE; i += sizeof(uint32_t))
     {
diff --git a/arch/arm/src/sama5/sam_memories.c b/arch/arm/src/sama5/sam_memories.c
index 231545ed55928a05a83286315d8c69ebcb21805f..54c8e65b5616e9d2c8d904caafd46685cc541af3 100644
--- a/arch/arm/src/sama5/sam_memories.c
+++ b/arch/arm/src/sama5/sam_memories.c
@@ -766,7 +766,7 @@ uintptr_t sam_physregaddr(uintptr_t virtregaddr)
    * address
    */
 
-  dbg("Bad virtual address: %08lx\n", virtregaddr);
+  serr("ERROR: Bad virtual address: %08lx\n", virtregaddr);
   DEBUGPANIC();
   return virtregaddr;
 }
@@ -925,7 +925,7 @@ uintptr_t sam_physramaddr(uintptr_t virtramaddr)
 
   if (virtramaddr != 0)
     {
-      dbg("Bad virtual address: %08lx\n", virtramaddr);
+      serr("ERROR: Bad virtual address: %08lx\n", virtramaddr);
       DEBUGPANIC();
     }
 
@@ -1058,7 +1058,7 @@ uintptr_t sam_virtramaddr(uintptr_t physramaddr)
 
   if (physramaddr != 0)
     {
-      dbg("Bad physical address: %08lx\n|", physramaddr);
+      serr("ERROR: Bad physical address: %08lx\n|", physramaddr);
       DEBUGPANIC();
     }
 
diff --git a/arch/arm/src/sama5/sam_nand.c b/arch/arm/src/sama5/sam_nand.c
index d5d235d21685c828b942afc4098d483a6a9dec6a..05182120d93c847bf86a8654395e460cf0e5ba07 100644
--- a/arch/arm/src/sama5/sam_nand.c
+++ b/arch/arm/src/sama5/sam_nand.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/sama5/sam_nand.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * References:
@@ -58,6 +58,7 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -180,7 +181,7 @@ static void     nand_wait_nfcbusy(struct sam_nandcs_s *priv);
 #endif
 static uint32_t nand_nfc_poll(void);
 #ifdef CONFIG_SAMA5_NAND_HSMCINTERRUPTS
-static int      hsmc_interrupt(int irq, void *context);
+static int      hsmc_interrupt(int irq, void *context, FAR void *arg);
 #endif
 
 /* DMA Helpers */
@@ -999,7 +1000,7 @@ static uint32_t nand_nfc_poll(void)
   sr = nand_getreg(SAM_HSMC_SR);
 
 #ifndef CONFIG_SAMA5_NAND_REGDEBUG
-  // fllvdbg("sr=%08x\n", sr);
+  // finfo("sr=%08x\n", sr);
 #endif
 
   /* When set to one, this XFRDONE indicates that the NFC has terminated
@@ -1058,14 +1059,14 @@ static uint32_t nand_nfc_poll(void)
  ****************************************************************************/
 
 #ifdef CONFIG_SAMA5_NAND_HSMCINTERRUPTS
-static int hsmc_interrupt(int irq, void *context)
+static int hsmc_interrupt(int irq, void *context, FAR void *arg)
 {
   uint32_t sr      = nand_nfc_poll();
   uint32_t imr     = nand_getreg(SAM_HSMC_IMR);
   uint32_t pending = sr & imr;
 
 #ifndef CONFIG_SAMA5_NAND_REGDEBUG
-  fllvdbg("sr=%08x imr=%08x\n", sr, imr);
+  finfo("sr=%08x imr=%08x\n", sr, imr);
 #endif
 
   /* When set to one, this XFRDONE indicates that the NFC has terminated
@@ -1163,7 +1164,7 @@ static void nand_dma_sampleinit(struct sam_nandcs_s *priv)
 #ifdef CONFIG_SAMA5_NAND_DMADEBUG
 static void nand_dma_sampledone(struct sam_nandcs_s *priv, int result)
 {
-  lldbg("result: %d\n", result);
+  finfo("result: %d\n", result);
 
   /* Sample the final registers */
 
@@ -1233,7 +1234,7 @@ static int nand_wait_dma(struct sam_nandcs_s *priv)
         }
     }
 
-  fvdbg("Awakened: result=%d\n", priv->result);
+  finfo("Awakened: result=%d\n", priv->result);
   priv->dmadone = false;
   return priv->result;
 }
@@ -1293,7 +1294,7 @@ static int nand_dma_read(struct sam_nandcs_s *priv,
 
   DEBUGASSERT(priv->dma);
 
-  fvdbg("vsrc=%08x vdest=%08x nbytes=%d\n",
+  finfo("vsrc=%08x vdest=%08x nbytes=%d\n",
         (int)vsrc, (int)vdest, (int)nbytes);
 
   /* Initialize sampling */
@@ -1325,7 +1326,7 @@ static int nand_dma_read(struct sam_nandcs_s *priv,
   ret = sam_dmarxsetup(priv->dma, psrc, pdest, nbytes);
   if (ret < 0)
     {
-      fdbg("ERROR: sam_dmarxsetup failed: %d\n", ret);
+      ferr("ERROR: sam_dmarxsetup failed: %d\n", ret);
       return ret;
     }
 
@@ -1344,7 +1345,7 @@ static int nand_dma_read(struct sam_nandcs_s *priv,
   ret = nand_wait_dma(priv);
   if (ret < 0)
     {
-      fdbg("ERROR: DMA failed: %d\n", ret);
+      ferr("ERROR: DMA failed: %d\n", ret);
     }
 
   nand_dma_sample(priv, DMA_END_TRANSFER);
@@ -1410,7 +1411,7 @@ static int nand_dma_write(struct sam_nandcs_s *priv,
   ret = sam_dmatxsetup(priv->dma, pdest, psrc, nbytes);
   if (ret < 0)
     {
-      fdbg("ERROR: sam_dmatxsetup failed: %d\n", ret);
+      ferr("ERROR: sam_dmatxsetup failed: %d\n", ret);
       return ret;
     }
 
@@ -1429,7 +1430,7 @@ static int nand_dma_write(struct sam_nandcs_s *priv,
   ret = nand_wait_dma(priv);
   if (ret < 0)
     {
-      fdbg("ERROR: DMA failed: %d\n", ret);
+      ferr("ERROR: DMA failed: %d\n", ret);
     }
 
   nand_dma_sample(priv, DMA_END_TRANSFER);
@@ -1463,7 +1464,7 @@ static int nand_nfcsram_read(struct sam_nandcs_s *priv, uint8_t *buffer,
   int remaining;
   int ret;
 
-  fvdbg("buffer=%p buflen=%d\n", buffer, buflen);
+  finfo("buffer=%p buflen=%d\n", buffer, buflen);
 
   /* Get the offset data source address */
 
@@ -1530,7 +1531,7 @@ static int nand_read(struct sam_nandcs_s *priv, uint8_t *buffer,
   int buswidth;
   int ret;
 
-  fvdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+  finfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
 
   /* Get the buswidth */
 
@@ -1622,7 +1623,7 @@ static int nand_read_pmecc(struct sam_nandcs_s *priv, off_t block,
   uint16_t sparesize;
   int ret;
 
-  fvdbg("block=%d page=%d data=%p\n", (int)block, page, data);
+  finfo("block=%d page=%d data=%p\n", (int)block, page, data);
   DEBUGASSERT(priv && data);
 
   /* Get page and spare sizes */
@@ -1655,7 +1656,7 @@ static int nand_read_pmecc(struct sam_nandcs_s *priv, off_t block,
       break;
 
     default:
-      fdbg("ERROR:  Unsupported page size: %d\n", pagesize);
+      ferr("ERROR:  Unsupported page size: %d\n", pagesize);
       return -EINVAL;
     }
 
@@ -1719,7 +1720,7 @@ static int nand_read_pmecc(struct sam_nandcs_s *priv, off_t block,
 #endif
   if (ret < 0)
     {
-      fdbg("ERROR: nand_read for data region failed: %d\n", ret);
+      ferr("ERROR: nand_read for data region failed: %d\n", ret);
       return ret;
     }
 
@@ -1732,7 +1733,7 @@ static int nand_read_pmecc(struct sam_nandcs_s *priv, off_t block,
 #endif
   if (ret < 0)
     {
-      fdbg("ERROR: nand_read for spare region failed: %d\n", ret);
+      ferr("ERROR: nand_read for spare region failed: %d\n", ret);
       return ret;
     }
 
@@ -1765,7 +1766,7 @@ static int nand_nfcsram_write(struct sam_nandcs_s *priv, uint8_t *buffer,
   uintptr_t dest;
   int ret;
 
-  fvdbg("buffer=%p buflen=%d offset=%d\n", buffer, buflen, offset);
+  finfo("buffer=%p buflen=%d offset=%d\n", buffer, buflen, offset);
   nand_dump("NFC SRAM Write", buffer, buflen);
 
   /* Apply the offset to the destination address */
@@ -1829,7 +1830,7 @@ static int nand_write(struct sam_nandcs_s *priv, uint8_t *buffer,
   int buswidth;
   int ret;
 
-  fvdbg("buffer=%p buflen=%d offset=%d\n", buffer, buflen, offset);
+  finfo("buffer=%p buflen=%d offset=%d\n", buffer, buflen, offset);
   nand_dump("NAND Write", buffer, buflen);
 
   /* Apply the offset to the destination address */
@@ -1924,7 +1925,7 @@ static int nand_readpage_noecc(struct sam_nandcs_s *priv, off_t block,
   off_t coladdr;
   int ret;
 
-  fvdbg("block=%d page=%d data=%p spare=%p\n", (int)block, page, data, spare);
+  finfo("block=%d page=%d data=%p spare=%p\n", (int)block, page, data, spare);
   DEBUGASSERT(priv && (data || spare));
 
   /* Get page and spare sizes */
@@ -1957,7 +1958,7 @@ static int nand_readpage_noecc(struct sam_nandcs_s *priv, off_t block,
       break;
 
     default:
-      fdbg("ERROR:  Unsupported page size: %d\n", pagesize);
+      ferr("ERROR:  Unsupported page size: %d\n", pagesize);
       return -EINVAL;
     }
 
@@ -1987,7 +1988,7 @@ static int nand_readpage_noecc(struct sam_nandcs_s *priv, off_t block,
       ret = nand_nfcsram_read(priv, (uint8_t *)data, pagesize, 0);
       if (ret < 0)
         {
-          fdbg("ERROR: nand_nfcsram_read for data region failed: %d\n", ret);
+          ferr("ERROR: nand_nfcsram_read for data region failed: %d\n", ret);
           return ret;
         }
     }
@@ -2003,7 +2004,7 @@ static int nand_readpage_noecc(struct sam_nandcs_s *priv, off_t block,
       ret = nand_nfcsram_read(priv, (uint8_t *)spare, sparesize, offset);
       if (ret < 0)
         {
-          fdbg("ERROR: nand_nfcsram_read for spare region failed: %d\n", ret);
+          ferr("ERROR: nand_nfcsram_read for spare region failed: %d\n", ret);
           return ret;
         }
     }
@@ -2038,7 +2039,7 @@ static int nand_readpage_pmecc(struct sam_nandcs_s *priv, off_t block,
   int ret;
   int i;
 
-  fvdbg("block=%d page=%d data=%p\n", (int)block, page, data);
+  finfo("block=%d page=%d data=%p\n", (int)block, page, data);
   DEBUGASSERT(priv && data);
 
   /* Make sure that we have exclusive access to the PMECC and that the PMECC
@@ -2049,7 +2050,7 @@ static int nand_readpage_pmecc(struct sam_nandcs_s *priv, off_t block,
   ret = pmecc_configure(priv, false);
   if (ret < 0)
     {
-      fdbg("ERROR: pmecc_configure failed: %d\n", ret);
+      ferr("ERROR: pmecc_configure failed: %d\n", ret);
       goto errout;
     }
 
@@ -2060,7 +2061,7 @@ static int nand_readpage_pmecc(struct sam_nandcs_s *priv, off_t block,
   ret = nand_read_pmecc(priv, block, page, data);
   if (ret < 0)
     {
-      fdbg("ERROR: Block %d page %d Failed to read page\n",
+      ferr("ERROR: Block %d page %d Failed to read page\n",
            block, page, ret);
       goto errout;
     }
@@ -2076,7 +2077,7 @@ static int nand_readpage_pmecc(struct sam_nandcs_s *priv, off_t block,
       ret = nand_readpage_noecc(priv, block, page, NULL, priv->raw.spare);
       if (ret < 0)
         {
-          fdbg("ERROR: Block %d page %d Failed to re-read spare area: %d\n",
+          ferr("ERROR: Block %d page %d Failed to re-read spare area: %d\n",
                block, page, ret);
           goto errout;
         }
@@ -2098,13 +2099,13 @@ static int nand_readpage_pmecc(struct sam_nandcs_s *priv, off_t block,
         {
           /* Yes.. clear sector errors */
 
-          fdbg("Block=%d page=%d has been erased: %08x\n",
+          finfo("Block=%d page=%d has been erased: %08x\n",
                block, page, regval);
           regval = 0;
         }
       else
         {
-          fdbg("ERROR: block=%d page=%d Corrupted sectors: %08x\n",
+          ferr("ERROR: block=%d page=%d Corrupted sectors: %08x\n",
                block, page, regval);
         }
     }
@@ -2114,7 +2115,7 @@ static int nand_readpage_pmecc(struct sam_nandcs_s *priv, off_t block,
   ret = pmecc_correction(regval, (uintptr_t)data);
   if (ret < 0)
     {
-      fdbg("ERROR: block=%d page=%d Unrecoverable data error: %d\n",
+      ferr("ERROR: block=%d page=%d Unrecoverable data error: %d\n",
            block, page, ret);
     }
 
@@ -2159,7 +2160,7 @@ static int nand_writepage_noecc(struct sam_nandcs_s *priv, off_t block,
   off_t rowaddr;
   int ret = OK;
 
-  fvdbg("block=%d page=%d data=%p spare=%p\n", (int)block, page, data, spare);
+  finfo("block=%d page=%d data=%p spare=%p\n", (int)block, page, data, spare);
 
   /* Get page and spare sizes */
 
@@ -2191,7 +2192,7 @@ static int nand_writepage_noecc(struct sam_nandcs_s *priv, off_t block,
       break;
 
     default:
-      fdbg("ERROR:  Unsupported page size: %d\n", pagesize);
+      ferr("ERROR:  Unsupported page size: %d\n", pagesize);
       return -EINVAL;
     }
 
@@ -2220,7 +2221,7 @@ static int nand_writepage_noecc(struct sam_nandcs_s *priv, off_t block,
       ret = nand_nfcsram_write(priv, (uint8_t *)data, pagesize, 0);
       if (ret < 0)
         {
-          fdbg("ERROR: nand_nfcsram_write for data region failed: %d\n", ret);
+          ferr("ERROR: nand_nfcsram_write for data region failed: %d\n", ret);
           return ret;
         }
 
@@ -2229,7 +2230,7 @@ static int nand_writepage_noecc(struct sam_nandcs_s *priv, off_t block,
           ret = nand_nfcsram_write(priv, (uint8_t *)spare, sparesize, pagesize);
           if (ret < 0)
             {
-              fdbg("ERROR: nand_nfcsram_write for data region failed: %d\n", ret);
+              ferr("ERROR: nand_nfcsram_write for data region failed: %d\n", ret);
               return ret;
             }
         }
@@ -2257,7 +2258,7 @@ static int nand_writepage_noecc(struct sam_nandcs_s *priv, off_t block,
       ret = nand_operation_complete(priv);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed writing data area: %d\n", ret);
+          ferr("ERROR: Failed writing data area: %d\n", ret);
         }
     }
 
@@ -2272,7 +2273,7 @@ static int nand_writepage_noecc(struct sam_nandcs_s *priv, off_t block,
       ret = nand_write(priv, (uint8_t *)spare, sparesize, 0);
       if (ret < 0)
         {
-          fdbg("ERROR: nand_write for spare region failed: %d\n", ret);
+          ferr("ERROR: nand_write for spare region failed: %d\n", ret);
           ret = -EPERM;
         }
 
@@ -2320,7 +2321,7 @@ static int nand_writepage_pmecc(struct sam_nandcs_s *priv, off_t block,
   unsigned int i;
   int ret = 0;
 
-  fvdbg("block=%d page=%d data=%p\n", (int)block, page, data);
+  finfo("block=%d page=%d data=%p\n", (int)block, page, data);
   DEBUGASSERT(priv && data);
 
   /* Make sure that we have exclusive access to the PMECC and that the PMECC
@@ -2331,7 +2332,7 @@ static int nand_writepage_pmecc(struct sam_nandcs_s *priv, off_t block,
   ret = pmecc_configure(priv, false);
   if (ret < 0)
     {
-      fdbg("ERROR: pmecc_configure failed: %d\n", ret);
+      ferr("ERROR: pmecc_configure failed: %d\n", ret);
       goto errout;
     }
 
@@ -2344,7 +2345,7 @@ static int nand_writepage_pmecc(struct sam_nandcs_s *priv, off_t block,
   /* Calculate physical address of the page */
 
   rowaddr = block * nandmodel_pagesperblock(&priv->raw.model) + page;
-  fvdbg("pagesize=%d eccsaddr=%d rowaddr=%d\n", pagesize, eccsaddr, rowaddr);
+  finfo("pagesize=%d eccsaddr=%d rowaddr=%d\n", pagesize, eccsaddr, rowaddr);
 
 #if 1 /* Use NFC SRAM */
   /* Write the data area to NFC SRAM */
@@ -2352,7 +2353,7 @@ static int nand_writepage_pmecc(struct sam_nandcs_s *priv, off_t block,
   ret = nand_nfcsram_write(priv, (uint8_t *)data, pagesize, 0);
   if (ret < 0)
     {
-      fdbg("ERROR: Block %d page %d nand_nfcsram_write for data region failed: %d\n",
+      ferr("ERROR: Block %d page %d nand_nfcsram_write for data region failed: %d\n",
            block, page, ret);
       goto errout;
     }
@@ -2417,7 +2418,7 @@ static int nand_writepage_pmecc(struct sam_nandcs_s *priv, off_t block,
   ret = nand_write(priv, (uint8_t *)data, pagesize, 0);
   if (ret < 0)
     {
-      fdbg("ERROR: Block %d page %d nand_write for data region failed: %d\n",
+      ferr("ERROR: Block %d page %d nand_write for data region failed: %d\n",
            block, page, ret);
       goto errout;
     }
@@ -2437,7 +2438,7 @@ static int nand_writepage_pmecc(struct sam_nandcs_s *priv, off_t block,
   eccpersector = (pmecc_get_eccsize()) / sectersperpage;
   eccsize      = sectersperpage * eccpersector;
 
-  fvdbg("sectersperpage=%d eccpersector=%d eccsize=%d\n",
+  finfo("sectersperpage=%d eccpersector=%d eccsize=%d\n",
         sectersperpage, eccpersector, eccsize);
 
 #ifdef CONFIG_SAMA5_PMECC_TRIMPAGE
@@ -2474,7 +2475,7 @@ static int nand_writepage_pmecc(struct sam_nandcs_s *priv, off_t block,
   ret = nand_write(priv, (uint8_t *)g_nand.ecctab, eccsize, 0);
   if (ret < 0)
     {
-      fdbg("ERROR: Block %d page %d nand_write for spare region failed: %d\n",
+      ferr("ERROR: Block %d page %d nand_write for spare region failed: %d\n",
            block, page, ret);
       goto errout;
     }
@@ -2487,7 +2488,7 @@ static int nand_writepage_pmecc(struct sam_nandcs_s *priv, off_t block,
   ret = nand_operation_complete(priv);
   if (ret < 0)
     {
-      fdbg("ERROR: Block %d page %d Failed writing data area: %d\n",
+      ferr("ERROR: Block %d page %d Failed writing data area: %d\n",
            block, page, ret);
     }
 
@@ -2536,7 +2537,7 @@ static inline int nand_tryeraseblock(struct sam_nandcs_s *priv, off_t block)
   ret = nand_operation_complete(priv);
   if (ret < 0)
     {
-      fdbg("ERROR: Block %d Could not erase: %d\n", block, ret);
+      ferr("ERROR: Block %d Could not erase: %d\n", block, ret);
     }
 
   return ret;
@@ -2550,7 +2551,7 @@ static int nand_eraseblock(struct nand_raw_s *raw, off_t block)
 
   DEBUGASSERT(priv);
 
-  fvdbg("block=%d\n", (int)block);
+  finfo("block=%d\n", (int)block);
 
   /* Get exclusvie access to the HSMC hardware.
    * REVISIT:  The scope of this exclusivity is just NAND.
@@ -2572,7 +2573,7 @@ static int nand_eraseblock(struct nand_raw_s *raw, off_t block)
       retries--;
     }
 
-  fdbg("ERROR: Block %d Failed to erase after %d tries\n",
+  ferr("ERROR: Block %d Failed to erase after %d tries\n",
        (int)block, NAND_ERASE_NRETRIES);
 
   nand_unlock();
@@ -2796,7 +2797,7 @@ static int nand_writepage(struct nand_raw_s *raw, off_t block,
 
 static void nand_reset(struct sam_nandcs_s *priv)
 {
-  fvdbg("Resetting\n");
+  finfo("Resetting\n");
   nand_nfc_cleale(priv, 0, COMMAND_RESET, 0, 0, 0);
   nand_wait_ready(priv);
 }
@@ -2834,7 +2835,7 @@ struct mtd_dev_s *sam_nand_initialize(int cs)
   uint8_t ecctype;
   int ret;
 
-  fvdbg("CS%d\n", cs);
+  finfo("CS%d\n", cs);
 
   /* Select the device structure (In SAMA5D3, NAND is only supported on CS3). */
 
@@ -2923,7 +2924,7 @@ struct mtd_dev_s *sam_nand_initialize(int cs)
   else
 #endif
     {
-      fdbg("ERROR: CS%d unsupported or invalid\n", cs);
+      ferr("ERROR: CS%d unsupported or invalid\n", cs);
       return NULL;
     }
 
@@ -2944,7 +2945,12 @@ struct mtd_dev_s *sam_nand_initialize(int cs)
   priv->cs             = cs;
 
 #ifdef CONFIG_SAMA5_NAND_DMA
+  /* The waitsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   sem_init(&priv->waitsem, 0, 0);
+  sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
 #endif
 
   /* Perform one-time, global NFC/PMECC initialization */
@@ -2956,8 +2962,14 @@ struct mtd_dev_s *sam_nand_initialize(int cs)
 #if NAND_NBANKS > 1
       sem_init(&g_nand.exclsem, 0, 1);
 #endif
+
 #ifdef CONFIG_SAMA5_NAND_HSMCINTERRUPTS
+      /* The waitsem semaphore is used for signaling and, hence, should not
+       * have priority inheritance enabled.
+       */
+
       sem_init(&g_nand.waitsem, 0, 0);
+      sem_setprotocol(&g_nand.waitsem, SEM_PRIO_NONE);
 #endif
 
       /* Enable the NAND FLASH Controller (The NFC is always used) */
@@ -2980,10 +2992,10 @@ struct mtd_dev_s *sam_nand_initialize(int cs)
 #ifdef CONFIG_SAMA5_NAND_HSMCINTERRUPTS
       /* Attach the CAN interrupt handler */
 
-      ret = irq_attach(SAM_IRQ_HSMC, hsmc_interrupt);
+      ret = irq_attach(SAM_IRQ_HSMC, hsmc_interrupt, NULL);
       if (ret < 0)
         {
-          fdbg("Failed to attach HSMC IRQ (%d)", SAM_IRQ_HSMC);
+          ferr("ERROR: Failed to attach HSMC IRQ (%d)", SAM_IRQ_HSMC);
           return NULL;
         }
 #endif
@@ -3013,7 +3025,7 @@ struct mtd_dev_s *sam_nand_initialize(int cs)
   ret = board_nandflash_config(cs);
   if (ret < 0)
     {
-      fdbg("ERROR: board_nandflash_config failed for CS%d: %d\n",
+      ferr("ERROR: board_nandflash_config failed for CS%d: %d\n",
            cs, ret);
       return NULL;
     }
@@ -3029,7 +3041,7 @@ struct mtd_dev_s *sam_nand_initialize(int cs)
   mtd = nand_initialize(&priv->raw);
   if (!mtd)
     {
-      fdbg("ERROR: CS%d nand_initialize failed %d\n", cs);
+      ferr("ERROR: CS%d nand_initialize failed %d\n", cs);
       return NULL;
     }
 
@@ -3043,7 +3055,7 @@ struct mtd_dev_s *sam_nand_initialize(int cs)
   priv->dma = sam_dmachannel(NAND_DMAC, 0);
   if (!priv->dma)
     {
-      fdbg("ERROR: Failed to allocate the DMA channel for CS%d\n", cs);
+      ferr("ERROR: Failed to allocate the DMA channel for CS%d\n", cs);
     }
 #endif
 
@@ -3088,7 +3100,7 @@ bool nand_checkreg(bool wr, uintptr_t regaddr, uint32_t regval)
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", g_nand.ntimes);
+          finfo("...[Repeats %d times]...\n", g_nand.ntimes);
         }
 
       /* Save information about the new access */
diff --git a/arch/arm/src/sama5/sam_nand.h b/arch/arm/src/sama5/sam_nand.h
index f4229b8d6c0f4075e183cd8b038b632452bd4b9f..808b719aa52d3a94462fb81a64b8a56afec7e64f 100644
--- a/arch/arm/src/sama5/sam_nand.h
+++ b/arch/arm/src/sama5/sam_nand.h
@@ -259,14 +259,13 @@
 
 /* Debug */
 
-#if !defined(CONFIG_DEBUG) || !defined(CONFIG_DEBUG_FS)
-#  undef CONFIG_DEBUG_FS
+#ifndef defined(CONFIG_DEBUG_FS_INFO
 #  undef CONFIG_SAMA5_NAND_DMADEBUG
 #  undef CONFIG_SAMA5_NAND_REGDEBUG
 #  undef CONFIG_SAMA5_NAND_DUMP
 #endif
 
-#if !defined(CONFIG_SAMA5_NAND_DMA) || !defined(CONFIG_DEBUG_DMA)
+#if !defined(CONFIG_SAMA5_NAND_DMA) || !defined(CONFIG_DEBUG_DMA_INFO)
 #  undef CONFIG_SAMA5_NAND_DMADEBUG
 #endif
 
@@ -518,7 +517,7 @@ static inline uint32_t nand_getreg(uintptr_t regaddr)
 #ifdef CONFIG_SAMA5_NAND_REGDEBUG
   if (nand_checkreg(false, regaddr, regval))
     {
-      lldbg("%08x->%08x\n", regaddr, regval);
+      sinfo("%08x->%08x\n", regaddr, regval);
     }
 #endif
 
@@ -538,7 +537,7 @@ static inline void nand_putreg(uintptr_t regaddr, uint32_t regval)
 #ifdef CONFIG_SAMA5_NAND_REGDEBUG
   if (nand_checkreg(true, regaddr, regval))
     {
-      lldbg("%08x<-%08x\n", regaddr, regval);
+      sinfo("%08x<-%08x\n", regaddr, regval);
     }
 #endif
 
diff --git a/arch/arm/src/sama5/sam_ohci.c b/arch/arm/src/sama5/sam_ohci.c
index 5dbad089e961cb9040a5e5cf9ec72db4a0a66404..f6907d1b0f2274602b25f65898566be20edd3b92 100644
--- a/arch/arm/src/sama5/sam_ohci.c
+++ b/arch/arm/src/sama5/sam_ohci.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/sama5/sam_ohci.c
  *
- *   Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2015-2016 Gregory Nutt. All rights reserved.
  *   Authors: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -51,6 +51,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -151,7 +152,7 @@
 
 /* Debug */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_USB_INFO
 #  undef CONFIG_SAMA5_OHCI_REGDEBUG
 #endif
 
@@ -505,10 +506,6 @@ static struct sam_gtd_s   g_tdalloc[SAMA5_OHCI_NTDS]
 static uint8_t            g_bufalloc[SAM_BUFALLOC]
                           __attribute__ ((aligned (SAMA5_DMA_ALIGN)));
 
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -524,7 +521,7 @@ static uint8_t            g_bufalloc[SAM_BUFALLOC]
 #ifdef CONFIG_SAMA5_OHCI_REGDEBUG
 static void sam_printreg(uint32_t addr, uint32_t val, bool iswrite)
 {
-  lldbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
+  uinfo("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
 }
 #endif
 
@@ -574,7 +571,7 @@ static void sam_checkreg(uint32_t addr, uint32_t val, bool iswrite)
             {
               /* No.. More than one. */
 
-              lldbg("[repeats %d more times]\n", count);
+              uinfo("[repeats %d more times]\n", count);
             }
         }
 
@@ -1318,7 +1315,7 @@ static inline int sam_reminted(struct sam_ed_s *ed)
 #ifdef CONFIG_USBHOST_TRACE
   usbhost_vtrace1(OHCI_VTRACE1_VIRTED, (uintptr_t)ed);
 #else
-  uvdbg("ed: %08x head: %08x next: %08x offset: %d\n",
+  uinfo("ed: %08x head: %08x next: %08x offset: %d\n",
         ed, physhead, head ? head->hw.nexted : 0, offset);
 #endif
 
@@ -1358,7 +1355,7 @@ static inline int sam_reminted(struct sam_ed_s *ed)
 #ifdef CONFIG_USBHOST_TRACE
       usbhost_vtrace1(OHCI_VTRACE1_VIRTED, (uintptr_t)ed);
 #else
-      uvdbg("ed: %08x head: %08x next: %08x\n",
+      uinfo("ed: %08x head: %08x next: %08x\n",
             ed, physhead, head ? head->hw.nexted : 0);
 #endif
 
@@ -2668,6 +2665,12 @@ static int sam_epalloc(struct usbhost_driver_s *drvr,
 
   sem_init(&eplist->wdhsem, 0, 0);
 
+  /* The wdhsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&eplist->wdhsem, SEM_PRIO_NONE);
+
   /* We must have exclusive access to the ED pool, the bulk list, the periodic list
    * and the interrupt table.
    */
@@ -2835,7 +2838,7 @@ errout:
 
 static int sam_epfree(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ASSERTIONS
   struct sam_rhport_s *rhport = (struct sam_rhport_s *)drvr;
 #endif
   struct sam_eplist_s *eplist = (struct sam_eplist_s *)ep;
@@ -3103,7 +3106,7 @@ static int sam_ctrlin(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
 #ifdef CONFIG_USBHOST_TRACE
   usbhost_vtrace2(OHCI_VTRACE2_CTRLIN, RHPORT(rhport), req->req);
 #else
-  uvdbg("RHPort%d type: %02x req: %02x value: %02x%02x index: %02x%02x len: %02x%02x\n",
+  uinfo("RHPort%d type: %02x req: %02x value: %02x%02x index: %02x%02x len: %02x%02x\n",
         RHPORT(rhport), req->type, req->req, req->value[1],
         req->value[0], req->index[1], req->index[0], req->len[1],
         req->len[0]);
@@ -3152,7 +3155,7 @@ static int sam_ctrlout(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
 #ifdef CONFIG_USBHOST_TRACE
   usbhost_vtrace2(OHCI_VTRACE2_CTRLOUT, RHPORT(rhport), req->req);
 #else
-  uvdbg("RHPort%d type: %02x req: %02x value: %02x%02x index: %02x%02x len: %02x%02x\n",
+  uinfo("RHPort%d type: %02x req: %02x value: %02x%02x index: %02x%02x len: %02x%02x\n",
         RHPORT(rhport), req->type, req->req, req->value[1],
         req->value[0], req->index[1], req->index[0], req->len[1],
         req->len[0]);
@@ -3227,7 +3230,7 @@ static int sam_transfer_common(struct sam_rhport_s *rhport,
                   (ed->hw.ctrl  & ED_CONTROL_EN_MASK) >> ED_CONTROL_EN_SHIFT,
                   (uint16_t)buflen);
 #else
-  uvdbg("EP%d %s toggle: %d maxpacket: %d buflen: %d\n",
+  uinfo("EP%d %s toggle: %d maxpacket: %d buflen: %d\n",
         (ed->hw.ctrl  & ED_CONTROL_EN_MASK) >> ED_CONTROL_EN_SHIFT,
         in ? "IN" : "OUT",
         (ed->hw.headp & ED_HEADP_C) != 0 ? 1 : 0,
@@ -3342,7 +3345,7 @@ static ssize_t sam_transfer(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
   ret = sam_transfer_common(rhport, eplist, buffer, buflen);
   if (ret < 0)
     {
-      udbg("ERROR: sam_transfer_common failed: %d\n", ret);
+      uerr("ERROR: sam_transfer_common failed: %d\n", ret);
       goto errout;
     }
 
@@ -3593,7 +3596,7 @@ static int sam_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
   ret = sam_transfer_common(rhport, eplist, buffer, buflen);
   if (ret < 0)
     {
-      udbg("ERROR: sam_transfer_common failed: %d\n", ret);
+      uerr("ERROR: sam_transfer_common failed: %d\n", ret);
       goto errout;
     }
 
@@ -3788,7 +3791,7 @@ static int sam_connect(struct usbhost_driver_s *drvr,
   /* Set the connected/disconnected flag */
 
   hport->connected = connected;
-  ullvdbg("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
+  uinfo("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
 
   /* Report the connection event */
 
@@ -3907,6 +3910,12 @@ struct usbhost_connection_s *sam_ohci_initialize(int controller)
   sem_init(&g_ohci.pscsem,  0, 0);
   sem_init(&g_ohci.exclsem, 0, 1);
 
+  /* The pscsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&g_ohci.pscsem, SEM_PRIO_NONE);
+
 #ifndef CONFIG_USBHOST_INT_DISABLE
   g_ohci.ininterval  = MAX_PERINTERVAL;
   g_ohci.outinterval = MAX_PERINTERVAL;
@@ -4100,7 +4109,7 @@ struct usbhost_connection_s *sam_ohci_initialize(int controller)
    * then it will manage the shared interrupt.
    */
 
-  if (irq_attach(SAM_IRQ_UHPHS, sam_ohci_tophalf) != 0)
+  if (irq_attach(SAM_IRQ_UHPHS, sam_ohci_tophalf, NULL) != 0)
     {
       usbhost_trace1(OHCI_TRACE1_IRQATTACH, SAM_IRQ_UHPHS);
       return NULL;
@@ -4167,7 +4176,7 @@ struct usbhost_connection_s *sam_ohci_initialize(int controller)
  *
  ****************************************************************************/
 
-int sam_ohci_tophalf(int irq, void *context)
+int sam_ohci_tophalf(int irq, void *context, FAR void *arg)
 {
   uint32_t intst;
   uint32_t inten;
diff --git a/arch/arm/src/sama5/sam_oneshot.c b/arch/arm/src/sama5/sam_oneshot.c
index c6d0a79ef58ea3575941fbfc5084a9685c1d4959..b883606982378068bcae46c1b6532106d5f88713 100644
--- a/arch/arm/src/sama5/sam_oneshot.c
+++ b/arch/arm/src/sama5/sam_oneshot.c
@@ -63,22 +63,6 @@
 
 #ifdef CONFIG_SAMA5_ONESHOT
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -108,7 +92,7 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr)
   oneshot_handler_t oneshot_handler;
   void *oneshot_arg;
 
-  tcllvdbg("Expired...\n");
+  tmrinfo("Expired...\n");
   DEBUGASSERT(oneshot && oneshot->handler);
 
   /* The clock was stopped, but not disabled when the RC match occurred.
@@ -128,7 +112,9 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr)
   oneshot->handler     = NULL;
   oneshot_arg          = (void *)oneshot->arg;
   oneshot->arg         = NULL;
+#ifdef CONFIG_SAMA5_FREERUN
   oneshot->start_count = 0;
+#endif
 
   oneshot_handler(oneshot_arg);
 }
@@ -165,7 +151,7 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
   uint32_t cmr;
   int ret;
 
-  tcvdbg("chan=%d resolution=%d usec\n", chan, resolution);
+  tmrinfo("chan=%d resolution=%d usec\n", chan, resolution);
   DEBUGASSERT(oneshot && resolution > 0);
 
   /* Get the TC frequency the corresponds to the requested resolution */
@@ -177,13 +163,13 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
   ret = sam_tc_divisor(frequency, &divisor, &cmr);
   if (ret < 0)
     {
-      tcdbg("ERROR: sam_tc_divisor failed: %d\n", ret);
+      tmrerr("ERROR: sam_tc_divisor failed: %d\n", ret);
       return ret;
     }
 
-  tcvdbg("frequency=%lu, divisor=%lu, cmr=%08lx\n",
-         (unsigned long)frequency, (unsigned long)divisor,
-         (unsigned long)cmr);
+  tmrinfo("frequency=%lu, divisor=%lu, cmr=%08lx\n",
+          (unsigned long)frequency, (unsigned long)divisor,
+          (unsigned long)cmr);
 
   /* Allocate the timer/counter and select its mode of operation
    *
@@ -217,7 +203,7 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
   oneshot->tch = sam_tc_allocate(chan, cmr);
   if (!oneshot->tch)
     {
-      tcdbg("ERROR: Failed to allocate timer channel %d\n", chan);
+      tmrerr("ERROR: Failed to allocate timer channel %d\n", chan);
       return -EBUSY;
     }
 
@@ -229,7 +215,36 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
   oneshot->running     = false;
   oneshot->handler     = NULL;
   oneshot->arg         = NULL;
+#ifdef CONFIG_SAMA5_FREERUN
   oneshot->start_count = 0;
+#endif
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: sam_oneshot_max_delay
+ *
+ * Description:
+ *   Return the maximum delay supported by the one shot timer (in
+ *   microseconds).
+ *
+ * Input Parameters:
+ *   oneshot Caller allocated instance of the oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           sam_oneshot_initialize();
+ *   usec    The location in which to return the maximum delay.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec)
+{
+  DEBUGASSERT(oneshot != NULL && usec != NULL);
+  *usec = (0xffffull * USEC_PER_SEC) / (uint64_t)sam_tc_divfreq(oneshot->tch);
   return OK;
 }
 
@@ -253,15 +268,17 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
  *
  ****************************************************************************/
 
-int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
-                      oneshot_handler_t handler, void *arg, const struct timespec *ts)
+int sam_oneshot_start(struct sam_oneshot_s *oneshot,
+                      struct sam_freerun_s *freerun,
+                      oneshot_handler_t handler, void *arg,
+                      const struct timespec *ts)
 {
   uint64_t usec;
   uint64_t regval;
   irqstate_t flags;
 
-  tcvdbg("handler=%p arg=%p, ts=(%lu, %lu)\n",
-         handler, arg, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
+  tmrinfo("handler=%p arg=%p, ts=(%lu, %lu)\n",
+          handler, arg, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
   DEBUGASSERT(oneshot && handler && ts);
 
   /* Was the oneshot already running? */
@@ -271,7 +288,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
     {
       /* Yes.. then cancel it */
 
-      tcvdbg("Already running... cancelling\n");
+      tmrinfo("Already running... cancelling\n");
       (void)sam_oneshot_cancel(oneshot, freerun, NULL);
     }
 
@@ -293,7 +310,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
 
   regval = (usec * (uint64_t)sam_tc_divfreq(oneshot->tch)) / USEC_PER_SEC;
 
-  tcvdbg("usec=%llu regval=%08llx\n", usec, regval);
+  tmrinfo("usec=%llu regval=%08llx\n", usec, regval);
   DEBUGASSERT(regval <= UINT32_MAX);
 
   /* Set up to receive the callback when the interrupt occurs */
@@ -311,6 +328,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
 
   sam_tc_start(oneshot->tch);
 
+#ifdef CONFIG_SAMA5_FREERUN
   /* The function sam_tc_start() starts the timer/counter by setting the
    * bits TC_CCR_CLKEN and TC_CCR_SWTRG in the channel control register.
    * The first one enables the timer/counter the latter performs an
@@ -329,7 +347,11 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
    * vanishes at least if compiled with no optimisation.
    */
 
-  oneshot->start_count = sam_tc_getcounter(freerun->tch);
+  if (freerun != NULL)
+    {
+      oneshot->start_count = sam_tc_getcounter(freerun->tch);
+    }
+#endif
 
   /* Enable interrupts.  We should get the callback when the interrupt
    * occurs.
@@ -365,8 +387,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
  *
  ****************************************************************************/
 
-int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
-                       struct timespec *ts)
+int sam_oneshot_cancel(struct sam_oneshot_s *oneshot,
+                       struct sam_freerun_s *freerun, struct timespec *ts)
 {
   irqstate_t flags;
   uint64_t usec;
@@ -402,21 +424,24 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
    * REVISIT:  This does not appear to be the case.
    */
 
-  tcvdbg("Cancelling...\n");
+  tmrinfo("Cancelling...\n");
 
   count = sam_tc_getcounter(oneshot->tch);
   rc    = sam_tc_getregister(oneshot->tch, TC_REGC);
 
+#ifdef CONFIG_SAMA5_FREERUN
   /* In the case the timer/counter was canceled very short after its start,
    * the counter register can hold the wrong value (the value of the last
    * run). To prevent this the counter value is set to zero if not at
    * least on tick passed since the start of the timer/counter.
    */
 
-  if (count > 0 && sam_tc_getcounter(freerun->tch) == oneshot->start_count)
+  if (count > 0 && freerun != NULL &&
+      sam_tc_getcounter(freerun->tch) == oneshot->start_count)
     {
       count = 0;
     }
+#endif
 
   /* Now we can disable the interrupt and stop the timer. */
 
@@ -438,8 +463,8 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
        * oneshot timer.
        */
 
-      tcvdbg("rc=%lu count=%lu usec=%lu\n",
-             (unsigned long)rc, (unsigned long)count, (unsigned long)usec);
+      tmrinfo("rc=%lu count=%lu usec=%lu\n",
+              (unsigned long)rc, (unsigned long)count, (unsigned long)usec);
 
       /* REVISIT: I am not certain why the timer counter value sometimes
        * exceeds RC.  Might be a bug, or perhaps the counter does not stop
@@ -483,8 +508,8 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
           ts->tv_nsec = (unsigned long)nsec;
         }
 
-      tcvdbg("remaining (%lu, %lu)\n",
-             (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
+      tmrinfo("remaining (%lu, %lu)\n",
+              (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
     }
 
   return OK;
diff --git a/arch/arm/src/sama5/sam_oneshot.h b/arch/arm/src/sama5/sam_oneshot.h
index 0443fcd693dbf62592dec20575d66466b814c502..15431882fc048fedb7e228f889d13fb0f5603156 100644
--- a/arch/arm/src/sama5/sam_oneshot.h
+++ b/arch/arm/src/sama5/sam_oneshot.h
@@ -46,7 +46,6 @@
 #include 
 
 #include "sam_tc.h"
-#include "sam_freerun.h"
 
 #ifdef CONFIG_SAMA5_ONESHOT
 
@@ -83,11 +82,13 @@ struct sam_oneshot_s
   volatile oneshot_handler_t handler; /* Oneshot expiration callback */
   volatile void *arg;                 /* The argument that will accompany
                                        * the callback */
+#ifdef CONFIG_SAMA5_FREERUN
   volatile uint32_t start_count;      /* Stores the value of the freerun counter,
                                        * at each start of the onshot timer. Is neccesary
                                        * to find out if the onshot counter was updated
                                        * correctly at the time of the call to
                                        * sam_oneshot_cancel or not. */
+#endif
 };
 
 /****************************************************************************
@@ -130,6 +131,27 @@ extern "C"
 int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
                            uint16_t resolution);
 
+/****************************************************************************
+ * Name: sam_oneshot_max_delay
+ *
+ * Description:
+ *   Return the maximum delay supported by the one shot timer (in
+ *   microseconds).
+ *
+ * Input Parameters:
+ *   oneshot Caller allocated instance of the oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           sam_oneshot_initialize();
+ *   usec    The location in which to return the maximum delay.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec);
+
 /****************************************************************************
  * Name: sam_oneshot_start
  *
@@ -142,7 +164,8 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
  *           sam_oneshot_initialize();
  *   freerun Caller allocated instance of the freerun state structure. This
  *           structure must have been previously initialized via a call to
- *           sam_freerun_initialize();
+ *           sam_freerun_initialize().  May be NULL if there is no matching
+ *           free-running timer.
  *   handler The function to call when when the oneshot timer expires.
  *   arg     An opaque argument that will accompany the callback.
  *   ts      Provides the duration of the one shot timer.
@@ -153,8 +176,11 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
  *
  ****************************************************************************/
 
-int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
-                      oneshot_handler_t handler, void *arg, const struct timespec *ts);
+struct sam_freerun_s;
+int sam_oneshot_start(struct sam_oneshot_s *oneshot,
+                      struct sam_freerun_s *freerun,
+                      oneshot_handler_t handler, void *arg,
+                      const struct timespec *ts);
 
 /****************************************************************************
  * Name: sam_oneshot_cancel
@@ -171,7 +197,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
  *           sam_oneshot_initialize();
  *   freerun Caller allocated instance of the freerun state structure. This
  *           structure must have been previously initialized via a call to
- *           sam_freerun_initialize();
+ *           sam_freerun_initialize().  May be NULL if there is no matching
+ *           free-running timer.
  *   ts      The location in which to return the time remaining on the
  *           oneshot timer.  A time of zero is returned if the timer is
  *           not running.
@@ -183,8 +210,9 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
  *
  ****************************************************************************/
 
-int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
-                       struct timespec *ts);
+struct sam_freerun_s;
+int sam_oneshot_cancel(struct sam_oneshot_s *oneshot,
+                       struct sam_freerun_s *freerun, struct timespec *ts);
 
 #undef EXTERN
 #ifdef __cplusplus
diff --git a/arch/arm/src/sama5/sam_oneshot_lowerhalf.c b/arch/arm/src/sama5/sam_oneshot_lowerhalf.c
new file mode 100644
index 0000000000000000000000000000000000000000..e9737ea167d0c5a42c18ef5435fce5a9caaf7a14
--- /dev/null
+++ b/arch/arm/src/sama5/sam_oneshot_lowerhalf.c
@@ -0,0 +1,347 @@
+/****************************************************************************
+ *  arch/arm/src/sam/sam_oneshot_lowerhalf.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "sam_oneshot.h"
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* This structure describes the state of the oneshot timer lower-half driver */
+
+struct sam_oneshot_lowerhalf_s
+{
+  /* This is the part of the lower half driver that is visible to the upper-
+   * half client of the driver.  This must be the first thing in this
+   * structure so that pointers to struct oneshot_lowerhalf_s are cast
+   * compatible to struct sam_oneshot_lowerhalf_s and vice versa.
+   */
+
+  struct oneshot_lowerhalf_s lh;  /* Common lower-half driver fields */
+
+  /* Private lower half data follows */
+
+  struct sam_oneshot_s oneshot;   /* SAM-specific oneshot state */
+  oneshot_callback_t callback;    /* internal handler that receives callback */
+  FAR void *arg;                  /* Argument that is passed to the handler */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static void sam_oneshot_handler(void *arg);
+
+static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower,
+                         FAR struct timespec *ts);
+static int sam_start(FAR struct oneshot_lowerhalf_s *lower,
+                     oneshot_callback_t callback, FAR void *arg,
+                     FAR const struct timespec *ts);
+static int sam_cancel(FAR struct oneshot_lowerhalf_s *lower,
+                      FAR struct timespec *ts);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Lower half operations */
+
+static const struct oneshot_operations_s g_oneshot_ops =
+{
+  .max_delay = sam_max_delay,
+  .start     = sam_start,
+  .cancel    = sam_cancel,
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sam_oneshot_handler
+ *
+ * Description:
+ *   Timer expiration handler
+ *
+ * Input Parameters:
+ *   arg - Should be the same argument provided when sam_oneshot_start()
+ *         was called.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void sam_oneshot_handler(void *arg)
+{
+  FAR struct sam_oneshot_lowerhalf_s *priv =
+    (FAR struct sam_oneshot_lowerhalf_s *)arg;
+  oneshot_callback_t callback;
+  FAR void *cbarg;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Perhaps the callback was nullified in a race condition with
+   * sam_cancel?
+   */
+
+  if (priv->callback)
+    {
+      /* Sample and nullify BEFORE executing callback (in case the callback
+       * restarts the oneshot).
+       */
+
+      callback       = priv->callback;
+      cbarg          = priv->arg;
+      priv->callback = NULL;
+      priv->arg      = NULL;
+
+      /* Then perform the callback */
+
+      callback(&priv->lh, cbarg);
+    }
+}
+
+/****************************************************************************
+ * Name: sam_max_delay
+ *
+ * Description:
+ *   Determine the maximum delay of the one-shot timer (in microseconds)
+ *
+ * Input Parameters:
+ *   lower   An instance of the lower-half oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           oneshot_initialize();
+ *   ts      The location in which to return the maxumum delay.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower,
+                         FAR struct timespec *ts)
+{
+  FAR struct sam_oneshot_lowerhalf_s *priv =
+    (FAR struct sam_oneshot_lowerhalf_s *)lower;
+  uint64_t usecs;
+  int ret;
+
+  DEBUGASSERT(priv != NULL && ts != NULL);
+  ret = sam_oneshot_max_delay(&priv->oneshot, &usecs);
+  if (ret >= 0)
+    {
+      uint64_t sec = usecs / 1000000;
+      usecs -= 1000000 * sec;
+
+      ts->tv_sec  = (time_t)sec;
+      ts->tv_nsec = (long)(usecs * 1000);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sam_start
+ *
+ * Description:
+ *   Start the oneshot timer
+ *
+ * Input Parameters:
+ *   lower   An instance of the lower-half oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           oneshot_initialize();
+ *   handler The function to call when when the oneshot timer expires.
+ *   arg     An opaque argument that will accompany the callback.
+ *   ts      Provides the duration of the one shot timer.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+static int sam_start(FAR struct oneshot_lowerhalf_s *lower,
+                     oneshot_callback_t callback, FAR void *arg,
+                     FAR const struct timespec *ts)
+{
+  FAR struct sam_oneshot_lowerhalf_s *priv =
+    (FAR struct sam_oneshot_lowerhalf_s *)lower;
+  irqstate_t flags;
+  int ret;
+
+  DEBUGASSERT(priv != NULL && callback != NULL && ts != NULL);
+
+  /* Save the callback information and start the timer */
+
+  flags          = enter_critical_section();
+  priv->callback = callback;
+  priv->arg      = arg;
+  ret            = sam_oneshot_start(&priv->oneshot, NULL,
+                                       sam_oneshot_handler, priv, ts);
+  leave_critical_section(flags);
+
+  if (ret < 0)
+    {
+      tmrerr("ERROR: sam_oneshot_start failed: %d\n", flags);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sam_cancel
+ *
+ * Description:
+ *   Cancel the oneshot timer and return the time remaining on the timer.
+ *
+ *   NOTE: This function may execute at a high rate with no timer running (as
+ *   when pre-emption is enabled and disabled).
+ *
+ * Input Parameters:
+ *   lower   Caller allocated instance of the oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           oneshot_initialize();
+ *   ts      The location in which to return the time remaining on the
+ *           oneshot timer.  A time of zero is returned if the timer is
+ *           not running.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success.  A call to up_timer_cancel() when
+ *   the timer is not active should also return success; a negated errno
+ *   value is returned on any failure.
+ *
+ ****************************************************************************/
+
+static int sam_cancel(FAR struct oneshot_lowerhalf_s *lower,
+                      FAR struct timespec *ts)
+{
+  FAR struct sam_oneshot_lowerhalf_s *priv =
+    (FAR struct sam_oneshot_lowerhalf_s *)lower;
+  irqstate_t flags;
+  int ret;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Cancel the timer */
+
+  flags          = enter_critical_section();
+  ret            = sam_oneshot_cancel(&priv->oneshot, NULL, ts);
+  priv->callback = NULL;
+  priv->arg      = NULL;
+  leave_critical_section(flags);
+
+  if (ret < 0)
+    {
+      tmrerr("ERROR: sam_oneshot_cancel failed: %d\n", flags);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: oneshot_initialize
+ *
+ * Description:
+ *   Initialize the oneshot timer and return a oneshot lower half driver
+ *   instance.
+ *
+ * Input Parameters:
+ *   chan       Timer counter channel to be used.
+ *   resolution The required resolution of the timer in units of
+ *              microseconds.  NOTE that the range is restricted to the
+ *              range of uint16_t (excluding zero).
+ *
+ * Returned Value:
+ *   On success, a non-NULL instance of the oneshot lower-half driver is
+ *   returned.  NULL is return on any failure.
+ *
+ ****************************************************************************/
+
+FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan,
+                                                   uint16_t resolution)
+{
+  FAR struct sam_oneshot_lowerhalf_s *priv;
+  int ret;
+
+  /* Allocate an instance of the lower half driver */
+
+  priv = (FAR struct sam_oneshot_lowerhalf_s *)
+    kmm_zalloc(sizeof(struct sam_oneshot_lowerhalf_s));
+
+  if (priv == NULL)
+    {
+      tmrerr("ERROR: Failed to initialized state structure\n");
+      return NULL;
+    }
+
+  /* Initialize the lower-half driver structure */
+
+  priv->lh.ops = &g_oneshot_ops;
+
+  /* Initialize the contained SAM oneshot timer */
+
+  ret = sam_oneshot_initialize(&priv->oneshot, chan, resolution);
+  if (ret < 0)
+    {
+      tmrerr("ERROR: sam_oneshot_initialize failed: %d\n", ret);
+      kmm_free(priv);
+      return NULL;
+    }
+
+  return &priv->lh;
+}
diff --git a/arch/arm/src/sama5/sam_pck.c b/arch/arm/src/sama5/sam_pck.c
index 11202c5d5653709afcfd613443c222ea493b554a..dc96ab678c7df7e2970d369f2abce55bbbefc610 100644
--- a/arch/arm/src/sama5/sam_pck.c
+++ b/arch/arm/src/sama5/sam_pck.c
@@ -151,7 +151,7 @@ uint32_t sam_pck_configure(enum pckid_e pckid, enum pckid_clksrc_e clksrc,
       break;
 
     default:
-      dbg("ERROR: Unknown clock source\n");
+      _err("ERROR: Unknown clock source\n");
       return 0;
     }
 
@@ -213,8 +213,8 @@ uint32_t sam_pck_configure(enum pckid_e pckid, enum pckid_clksrc_e clksrc,
     }
   else
     {
-      sdbg("ERROR: frequency cannot be realized.\n");
-      sdbg("       frequency=%lu clkin=%lu\n",
+      serr("ERROR: frequency cannot be realized.\n");
+      serr("       frequency=%lu clkin=%lu\n",
            (unsigned long)frequency, (unsigned long)clkin);
       return 0;
     }
diff --git a/arch/arm/src/sama5/sam_pio.h b/arch/arm/src/sama5/sam_pio.h
index 2b867ea05a9748339b5b43e0e07a7947cc6b7b24..fbcf94d034085072b163c6fb241248befbc16972 100644
--- a/arch/arm/src/sama5/sam_pio.h
+++ b/arch/arm/src/sama5/sam_pio.h
@@ -214,7 +214,7 @@ void sam_pio_forceclk(pio_pinset_t pinset, bool enable);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 int sam_dumppio(uint32_t pinset, const char *msg);
 #else
 #  define sam_dumppio(p,m)
diff --git a/arch/arm/src/sama5/sam_pioirq.c b/arch/arm/src/sama5/sam_pioirq.c
index 2d9950168ed167b52abd7cb4f2f12a11fe47be46..97aef6a0bce21afb7a27580b30a689808890d3d1 100644
--- a/arch/arm/src/sama5/sam_pioirq.c
+++ b/arch/arm/src/sama5/sam_pioirq.c
@@ -202,42 +202,42 @@ static int sam_piointerrupt(uint32_t base, int irq0, void *context)
 }
 
 #ifdef CONFIG_SAMA5_PIOA_IRQ
-static int sam_pioainterrupt(int irq, void *context)
+static int sam_pioainterrupt(int irq, void *context, FAR void *arg)
 {
   return sam_piointerrupt(SAM_PIOA_VBASE, SAM_IRQ_PA0, context);
 }
 #endif
 
 #ifdef CONFIG_SAMA5_PIOB_IRQ
-static int sam_piobinterrupt(int irq, void *context)
+static int sam_piobinterrupt(int irq, void *context, FAR void *arg)
 {
   return sam_piointerrupt(SAM_PIOB_VBASE, SAM_IRQ_PB0, context);
 }
 #endif
 
 #ifdef CONFIG_SAMA5_PIOC_IRQ
-static int sam_piocinterrupt(int irq, void *context)
+static int sam_piocinterrupt(int irq, void *context, FAR void *arg)
 {
   return sam_piointerrupt(SAM_PIOC_VBASE, SAM_IRQ_PC0, context);
 }
 #endif
 
 #ifdef CONFIG_SAMA5_PIOD_IRQ
-static int sam_piodinterrupt(int irq, void *context)
+static int sam_piodinterrupt(int irq, void *context, FAR void *arg)
 {
   return sam_piointerrupt(SAM_PIOD_VBASE, SAM_IRQ_PD0, context);
 }
 #endif
 
 #ifdef CONFIG_SAMA5_PIOE_IRQ
-static int sam_pioeinterrupt(int irq, void *context)
+static int sam_pioeinterrupt(int irq, void *context, FAR void *arg)
 {
   return sam_piointerrupt(SAM_PIOE_VBASE, SAM_IRQ_PE0, context);
 }
 #endif
 
 #ifdef CONFIG_SAMA5_PIOF_IRQ
-static int sam_piofinterrupt(int irq, void *context)
+static int sam_piofinterrupt(int irq, void *context, FAR void *arg)
 {
   return sam_piointerrupt(SAM_PIOF_VBASE, SAM_IRQ_PF0, context);
 }
@@ -272,7 +272,7 @@ void sam_pioirqinitialize(void)
 
   /* Attach and enable the PIOA IRQ */
 
-  (void)irq_attach(SAM_IRQ_PIOA, sam_pioainterrupt);
+  (void)irq_attach(SAM_IRQ_PIOA, sam_pioainterrupt, NULL);
   up_enable_irq(SAM_IRQ_PIOA);
 #endif
 
@@ -290,7 +290,7 @@ void sam_pioirqinitialize(void)
 
   /* Attach and enable the PIOB IRQ */
 
-  (void)irq_attach(SAM_IRQ_PIOB, sam_piobinterrupt);
+  (void)irq_attach(SAM_IRQ_PIOB, sam_piobinterrupt, NULL);
   up_enable_irq(SAM_IRQ_PIOB);
 #endif
 
@@ -308,7 +308,7 @@ void sam_pioirqinitialize(void)
 
   /* Attach and enable the PIOC IRQ */
 
-  (void)irq_attach(SAM_IRQ_PIOC, sam_piocinterrupt);
+  (void)irq_attach(SAM_IRQ_PIOC, sam_piocinterrupt, NULL);
   up_enable_irq(SAM_IRQ_PIOC);
 #endif
 
@@ -326,7 +326,7 @@ void sam_pioirqinitialize(void)
 
   /* Attach and enable the PIOC IRQ */
 
-  (void)irq_attach(SAM_IRQ_PIOD, sam_piodinterrupt);
+  (void)irq_attach(SAM_IRQ_PIOD, sam_piodinterrupt, NULL);
   up_enable_irq(SAM_IRQ_PIOD);
 #endif
 
@@ -344,7 +344,7 @@ void sam_pioirqinitialize(void)
 
   /* Attach and enable the PIOE IRQ */
 
-  (void)irq_attach(SAM_IRQ_PIOE, sam_pioeinterrupt);
+  (void)irq_attach(SAM_IRQ_PIOE, sam_pioeinterrupt, NULL);
   up_enable_irq(SAM_IRQ_PIOE);
 #endif
 
@@ -362,7 +362,7 @@ void sam_pioirqinitialize(void)
 
   /* Attach and enable the PIOF IRQ */
 
-  (void)irq_attach(SAM_IRQ_PIOF, sam_piofinterrupt);
+  (void)irq_attach(SAM_IRQ_PIOF, sam_piofinterrupt, NULL);
   up_enable_irq(SAM_IRQ_PIOF);
 #endif
 }
diff --git a/arch/arm/src/sama5/sam_pmecc.c b/arch/arm/src/sama5/sam_pmecc.c
index 8dfee40e3a6286472294bc37162ac0b5ba84093d..0339068c4fc0729b3ccab1dd6a4da7b52c1f8ec6 100644
--- a/arch/arm/src/sama5/sam_pmecc.c
+++ b/arch/arm/src/sama5/sam_pmecc.c
@@ -632,7 +632,7 @@ static uint32_t pmecc_errorcorrection(uintptr_t sectorbase,
 
           if (bytepos < sectorsz + nand_getreg(SAM_HSMC_PMECCSADDR))
             {
-              fdbg("Correct error bit @[Byte %d, Bit %d]\n",
+              fwarn("WARNING: Correct error bit @[Byte %d, Bit %d]\n",
                       (int)bytepos, (int)bitpos);
 
               if (*(uint8_t *)(sectorbase + bytepos) & (1 << bitpos))
@@ -858,7 +858,7 @@ static int pmecc_pagelayout(uint16_t datasize, uint16_t eccsize)
   int bcherr1k;
   int selector;
 
-  fvdbg("datasize=%d eccsize=%d\n", datasize, eccsize);
+  finfo("datasize=%d eccsize=%d\n", datasize, eccsize);
   DEBUGASSERT(datasize > 0 && eccsize > 0);
 
   /* Try for 512 byte sectors */
@@ -870,14 +870,14 @@ static int pmecc_pagelayout(uint16_t datasize, uint16_t eccsize)
   bcherr512   = pmecc_bcherr512(nsectors512, eccsize);
   if (bcherr512 < 0)
     {
-      fdbg("WARNING: Cannot realize 512B sectors\n");
+      fwarn("WARNING: Cannot realize 512B sectors\n");
     }
   else
     {
       selector = 1;
     }
 
-  fvdbg("nsectors512=%d bcherr512=%d selector=%d\n",
+  finfo("nsectors512=%d bcherr512=%d selector=%d\n",
         nsectors512, bcherr512, selector);
 
   /* Try for 1024 byte sectors */
@@ -895,14 +895,14 @@ static int pmecc_pagelayout(uint16_t datasize, uint16_t eccsize)
 
   if (bcherr1k < 0)
     {
-      fdbg("WARNING: Cannot realize 1KB sectors\n");
+      fwarn("WARNING: Cannot realize 1KB sectors\n");
     }
   else
     {
       selector |= 2;
     }
 
-  fvdbg("nsectors1k=%d bcherr1k=%d selector=%d\n",
+  finfo("nsectors1k=%d bcherr1k=%d selector=%d\n",
         nsectors1k, bcherr1k, selector);
 
   /* Now pick the best (most likely 1024) */
@@ -960,7 +960,7 @@ static int pmecc_pagelayout(uint16_t datasize, uint16_t eccsize)
 
   g_pmecc.desc.bcherr = ((uint32_t)bcherr << HSMC_PMECCFG_BCHERR_SHIFT);
 
-  fvdbg("sector1k=%d nsectors=%d bcherr=%d correctability=%d\n",
+  finfo("sector1k=%d nsectors=%d bcherr=%d correctability=%d\n",
         g_pmecc.sector1k, g_pmecc.nsectors, bcherr, g_pmecc.correctability);
 
   return OK;
@@ -1018,7 +1018,7 @@ int pmecc_configure(struct sam_nandcs_s *priv, bool protected)
   uint32_t regval;
   int ret;
 
-  fvdbg("protected=%d configured=%d\n", protected, g_pmecc.configured);
+  finfo("protected=%d configured=%d\n", protected, g_pmecc.configured);
 
   /* Check if we need to re-configure */
 
@@ -1030,7 +1030,7 @@ int pmecc_configure(struct sam_nandcs_s *priv, bool protected)
     {
       /* No, we are already configured */
 
-      fvdbg("Already configured\n");
+      finfo("Already configured\n");
       return OK;
     }
 
@@ -1059,7 +1059,7 @@ int pmecc_configure(struct sam_nandcs_s *priv, bool protected)
   ret = pmecc_pagelayout(priv->raw.model.pagesize, eccsize);
   if (ret < 0)
     {
-      fdbg("ERROR: pmecc_pagelayout failed: %d\n", ret);
+      ferr("ERROR: pmecc_pagelayout failed: %d\n", ret);
       return ret;
     }
 
@@ -1096,7 +1096,7 @@ int pmecc_configure(struct sam_nandcs_s *priv, bool protected)
 #endif
     }
 
-  fvdbg("sectorsz=%08x sectorsperpage=%d mm=%d\n",
+  finfo("sectorsz=%08x sectorsperpage=%d mm=%d\n",
         g_pmecc.desc.sectorsz, sectorsperpage, g_pmecc.desc.mm);
 
   switch (sectorsperpage)
@@ -1114,13 +1114,13 @@ int pmecc_configure(struct sam_nandcs_s *priv, bool protected)
           g_pmecc.desc.pagesize = HSMC_PMECCFG_PAGESIZE_8SEC;
           break;
       default:
-        fdbg("ERROR: Unsupported sectors per page: %d\n", sectorsperpage);
+        ferr("ERROR: Unsupported sectors per page: %d\n", sectorsperpage);
         return -EINVAL;
     }
 
   g_pmecc.desc.nn = (1 << g_pmecc.desc.mm) - 1;
 
-  fvdbg("pagesize=%08x nn=%d\n", g_pmecc.desc.pagesize, g_pmecc.desc.nn);
+  finfo("pagesize=%08x nn=%d\n", g_pmecc.desc.pagesize, g_pmecc.desc.nn);
 
   /* Real value of ECC bit number correction (2, 4, 8, 12, 24) */
 
@@ -1136,19 +1136,19 @@ int pmecc_configure(struct sam_nandcs_s *priv, bool protected)
         (((g_pmecc.desc.mm * g_pmecc.correctability) >> 3) + 1) * sectorsperpage;
     }
 
-  fvdbg("mm=%d correctability=%d eccsize=%d\n",
+  finfo("mm=%d correctability=%d eccsize=%d\n",
         g_pmecc.desc.mm, g_pmecc.correctability, g_pmecc.desc.eccsize);
 
   g_pmecc.desc.eccstart = eccoffset;
   g_pmecc.desc.eccend   = eccoffset + g_pmecc.desc.eccsize;
 
-  fvdbg("eccstart=%d eccend=%d sparesize=%d\n",
+  finfo("eccstart=%d eccend=%d sparesize=%d\n",
         g_pmecc.desc.eccstart, g_pmecc.desc.eccend,
         priv->raw.model.sparesize);
 
   if (g_pmecc.desc.eccend > priv->raw.model.sparesize)
     {
-      fdbg("ERROR: No room for ECC in spare bytes %d > %d\n",
+      ferr("ERROR: No room for ECC in spare bytes %d > %d\n",
            g_pmecc.desc.eccend, priv->raw.model.sparesize);
 
       return -ENOSPC;
diff --git a/arch/arm/src/sama5/sam_pwm.c b/arch/arm/src/sama5/sam_pwm.c
index c83764d50c5df86d708db534fa566bf2f9f853d1..90b204eac30c03d958419e8b082d309dfb90de64 100644
--- a/arch/arm/src/sama5/sam_pwm.c
+++ b/arch/arm/src/sama5/sam_pwm.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/sama5/sam_pwm.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -47,7 +47,7 @@
 #include 
 
 #include 
-#include 
+#include 
 
 #include "chip/sam_pinmap.h"
 #include 
@@ -65,6 +65,11 @@
  * Pre-processor Definitions
  ****************************************************************************/
 /* Configuration ************************************************************/
+
+#ifndef CONFIG_DEBUG_PWM_INFO
+#  undef CONFIG_SAMA5_PWM_REGDEBUG
+#endif
+
 /* Currently, we support only a single PWM peripheral.  However, the hooks
  * are in place to support multiple PWM peripherals.
  */
@@ -77,154 +82,14 @@
 #  warning CONFIG_PWM_PULSECOUNT no supported by this driver.
 #endif
 
-/* Are we using CLKA? CLKB?  If so, what frequency?  Select the prescaler
- * value that allows the largest, valid divider value.  This may not be
- * optimal in all cases, but in general should provide a reasonable frequency
- * value.
- *
- *   frequency = MCK / prescaler / div
- *
- * Pick smallest prescaler such that:
- *
- *   prescaler = MCK / frequency / div < 256
- *
- * Then:
- *
- *   div = MCK / prescaler / frequency
- *
- * Calulcated Values
- *
- *   CLKn_PRE       = CLKn prescaler value
- *   PWM_CLK_PREn   = CLKn prescaler register setting
- *   CLKn_DIV       = CLKn divider value
- *   PWM_CLK_DIVn   = CLKn divider register setting
- *   CLKn_FREQUENCY = Actual resulting CLKn frequency
- */
+/* Are we using CLKA? CLKB?  If so, at what frequency? */
 
-#ifdef CONFIG_SAMA5_PWM_CLKA
-
-#  if !defined(CONFIG_SAMA5_PWM_CLKA_FREQUENCY)
+#if defined(CONFIG_SAMA5_PWM_CLKA) && !defined(CONFIG_SAMA5_PWM_CLKA_FREQUENCY)
 #    error CONFIG_SAMA5_PWM_CLKA_FREQUENCY is not defined
-
-#  elif (BOARD_MCK_FREQUENCY / CONFIG_SAMA5_PWM_CLKA_FREQUENCY) < 256
-#    define CLKA_PRE_BITS PWM_CLK_PREA_DIV1
-#    define CLKA_PRE      1
-
-#  elif (BOARD_MCK_FREQUENCY / 2 / CONFIG_SAMA5_PWM_CLKA_FREQUENCY) < 256
-#    define CLKA_PRE_BITS PWM_CLK_PREA_DIV2
-#    define CLKA_PRE      2
-
-#  elif (BOARD_MCK_FREQUENCY / 4 / CONFIG_SAMA5_PWM_CLKA_FREQUENCY) < 256
-#    define CLKA_PRE_BITS PWM_CLK_PREA_DIV4
-#    define CLKA_PRE      4
-
-#  elif (BOARD_MCK_FREQUENCY / 8 / CONFIG_SAMA5_PWM_CLKA_FREQUENCY) < 256
-#    define CLKA_PRE_BITS PWM_CLK_PREA_DIV8
-#    define CLKA_PRE      8
-
-#  elif (BOARD_MCK_FREQUENCY / 16 / CONFIG_SAMA5_PWM_CLKA_FREQUENCY) < 256
-#    define CLKA_PRE_BITS PWM_CLK_PREA_DIV16
-#    define CLKA_PRE      16
-
-#  elif (BOARD_MCK_FREQUENCY / 32 / CONFIG_SAMA5_PWM_CLKA_FREQUENCY) < 256
-#    define CLKA_PRE_BITS PWM_CLK_PREA_DIV32
-#    define CLKA_PRE      32
-
-#  elif (BOARD_MCK_FREQUENCY / 64 / CONFIG_SAMA5_PWM_CLKA_FREQUENCY) < 256
-#    define CLKA_PRE_BITS PWM_CLK_PREA_DIV64
-#    define CLKA_PRE      64
-
-#  elif (BOARD_MCK_FREQUENCY / 128 / CONFIG_SAMA5_PWM_CLKA_FREQUENCY) < 256
-#    define CLKA_PRE_BITS PWM_CLK_PREA_DIV128
-#    define CLKA_PRE      128
-
-#  elif (BOARD_MCK_FREQUENCY / 256 / CONFIG_SAMA5_PWM_CLKA_FREQUENCY) < 256
-#    define CLKA_PRE_BITS PWM_CLK_PREA_DIV256
-#    define CLKA_PRE      256
-
-#  elif (BOARD_MCK_FREQUENCY / 512 / CONFIG_SAMA5_PWM_CLKA_FREQUENCY) < 256
-#    define CLKA_PRE_BITS PWM_CLK_PREA_DIV512
-#    define CLKA_PRE      512
-
-#  elif (BOARD_MCK_FREQUENCY / 1024 / CONFIG_SAMA5_PWM_CLKA_FREQUENCY) < 256
-#    define CLKA_PRE_BITS PWM_CLK_PREA_DIV1024
-#    define CLKA_PRE      1024
-
-#  else
-#    error Cannot realize CONFIG_SAMA5_PWM_CLKA_FREQUENCY
-#  endif
-
-#  define CLKA_DIV       (BOARD_MCK_FREQUENCY / CLKA_PRE / CONFIG_SAMA5_PWM_CLKA_FREQUENCY)
-#  define CLKA_FREQUENCY (BOARD_MCK_FREQUENCY / CLKA_PRE / CLKA_DIV)
-#  define CLKA_DIV_BITS   PWM_CLK_DIVA(CLKA_DIV)
-
-#else
-#  undef  CONFIG_SAMA5_PWM_CLKA_FREQUENCY
-#  define CLKA_PRE_BITS PWM_CLK_PREA_DIV1
-#  define CLKA_DIV_BITS PWM_CLK_DIVA_OFF
 #endif
 
-#ifdef CONFIG_SAMA5_PWM_CLKB
-
-#  if !defined(CONFIG_SAMA5_PWM_CLKB_FREQUENCY)
+#if defined(CONFIG_SAMA5_PWM_CLKB) && !defined(CONFIG_SAMA5_PWM_CLKB_FREQUENCY)
 #    error CONFIG_SAMA5_PWM_CLKB_FREQUENCY is not defined
-
-#  elif (BOARD_MCK_FREQUENCY / CONFIG_SAMA5_PWM_CLKB_FREQUENCY) < 256
-#    define CLKB_PRE_BITS PWM_CLK_PREB_DIV1
-#    define CLKB_PRE      1
-
-#  elif (BOARD_MCK_FREQUENCY / 2 / CONFIG_SAMA5_PWM_CLKB_FREQUENCY) < 256
-#    define CLKB_PRE_BITS PWM_CLK_PREB_DIV2
-#    define CLKB_PRE      2
-
-#  elif (BOARD_MCK_FREQUENCY / 4 / CONFIG_SAMA5_PWM_CLKB_FREQUENCY) < 256
-#    define CLKB_PRE_BITS PWM_CLK_PREB_DIV4
-#    define CLKB_PRE      4
-
-#  elif (BOARD_MCK_FREQUENCY / 8 / CONFIG_SAMA5_PWM_CLKB_FREQUENCY) < 256
-#    define CLKB_PRE_BITS PWM_CLK_PREB_DIV8
-#    define CLKB_PRE      8
-
-#  elif (BOARD_MCK_FREQUENCY / 16 / CONFIG_SAMA5_PWM_CLKB_FREQUENCY) < 256
-#    define CLKB_PRE_BITS PWM_CLK_PREB_DIV16
-#    define CLKB_PRE      16
-
-#  elif (BOARD_MCK_FREQUENCY / 32 / CONFIG_SAMA5_PWM_CLKB_FREQUENCY) < 256
-#    define CLKB_PRE_BITS PWM_CLK_PREB_DIV32
-#    define CLKB_PRE      32
-
-#  elif (BOARD_MCK_FREQUENCY / 64 / CONFIG_SAMA5_PWM_CLKB_FREQUENCY) < 256
-#    define CLKB_PRE_BITS PWM_CLK_PREB_DIV64
-#    define CLKB_PRE      64
-
-#  elif (BOARD_MCK_FREQUENCY / 128 / CONFIG_SAMA5_PWM_CLKB_FREQUENCY) < 256
-#    define CLKB_PRE_BITS PWM_CLK_PREB_DIV128
-#    define CLKB_PRE      128
-
-#  elif (BOARD_MCK_FREQUENCY / 256 / CONFIG_SAMA5_PWM_CLKB_FREQUENCY) < 256
-#    define CLKB_PRE_BITS PWM_CLK_PREB_DIV256
-#    define CLKB_PRE      256
-
-#  elif (BOARD_MCK_FREQUENCY / 512 / CONFIG_SAMA5_PWM_CLKB_FREQUENCY) < 256
-#    define CLKB_PRE_BITS PWM_CLK_PREB_DIV512
-#    define CLKB_PRE      512
-
-#  elif (BOARD_MCK_FREQUENCY / 1024 / CONFIG_SAMA5_PWM_CLKB_FREQUENCY) < 256
-#    define CLKB_PRE_BITS PWM_CLK_PREB_DIV1024
-#    define CLKB_PRE      1024
-
-#  else
-#    error Cannot realize CONFIG_SAMA5_PWM_CLKB_FREQUENCY
-#  endif
-
-#  define CLKB_DIV       (BOARD_MCK_FREQUENCY / CLKB_PRE / CONFIG_SAMA5_PWM_CLKB_FREQUENCY)
-#  define CLKB_FREQUENCY (BOARD_MCK_FREQUENCY / CLKB_PRE / CLKB_DIV)
-#  define CLKB_DIV_BITS   PWM_CLK_DIVB(CLKB_DIV)
-
-#else
-#  undef  CONFIG_SAMA5_PWM_CLKB_FREQUENCY
-#  define CLKB_PRE_BITS PWM_CLK_PREB_DIV1
-#  define CLKB_DIV_BITS PWM_CLK_DIVB_OFF
 #endif
 
 #ifdef CONFIG_SAMA5_PWM_CHAN0
@@ -232,27 +97,27 @@
 #    undef CONFIG_SAMA5_PWM_CHAN0_CLKA
 #    undef CONFIG_SAMA5_PWM_CHAN0_CLKB
 #    if CONFIG_SAMA5_PWM_CHAN0_MCKDIV == 1
-#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2 = 0
+#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2  0
 #    elif CONFIG_SAMA5_PWM_CHAN0_MCKDIV == 2
-#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2 = 1
+#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2  1
 #    elif CONFIG_SAMA5_PWM_CHAN0_MCKDIV == 4
-#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2 = 2
+#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2  2
 #    elif CONFIG_SAMA5_PWM_CHAN0_MCKDIV == 8
-#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2 = 3
+#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2  3
 #    elif CONFIG_SAMA5_PWM_CHAN0_MCKDIV == 16
-#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2 = 4
+#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2  4
 #    elif CONFIG_SAMA5_PWM_CHAN0_MCKDIV == 32
-#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2 = 5
+#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2  5
 #    elif CONFIG_SAMA5_PWM_CHAN0_MCKDIV == 64
-#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2 = 6
+#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2  6
 #    elif CONFIG_SAMA5_PWM_CHAN0_MCKDIV == 128
-#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2 = 7
+#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2  7
 #    elif CONFIG_SAMA5_PWM_CHAN0_MCKDIV == 256
-#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2 = 8
+#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2  8
 #    elif CONFIG_SAMA5_PWM_CHAN0_MCKDIV == 512
-#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2 = 9
+#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2  9
 #    elif CONFIG_SAMA5_PWM_CHAN0_MCKDIV == 1024
-#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2 = 10
+#      define SAMA5_PWM_CHAN0_MCKDIV_LOG2  10
 #    else
 #      error Unsupported MCK divider value
 #    endif
@@ -393,30 +258,6 @@
 #define PWM_PINMASK      (PIO_PORT_MASK | PIO_PIN_MASK)
 #define PWM_MKINPUT(cfg) (((cfg) & PWM_PINMASK) | PWM_INPUTCFG)
 
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing PWM */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_PWM
-#endif
-
-#ifdef CONFIG_DEBUG_PWM
-#  define pwmdbg              dbg
-#  define pwmlldbg            lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define pwmvdbg           vdbg
-#    define pwmllvdbg         llvdbg
-#  else
-#    define pwmlldbg(x...)
-#    define pwmllvdbg(x...)
-#  endif
-#else
-#  define pwmdbg(x...)
-#  define pwmlldbg(x...)
-#  define pwmvdbg(x...)
-#  define pwmllvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -480,7 +321,7 @@ static bool pwm_checkreg(FAR struct sam_pwm_s *chan, bool wr, uint32_t regval,
 static uint32_t pwm_getreg(FAR struct sam_pwm_chan_s *chan, int offset);
 static void pwm_putreg(FAR struct sam_pwm_chan_s *chan, int offset, uint32_t regval);
 
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_PWM_INFO
 static void pwm_dumpregs(FAR struct sam_pwm_chan_s *chan, FAR const char *msg);
 #else
 #  define pwm_dumpregs(chan,msg)
@@ -489,7 +330,7 @@ static void pwm_dumpregs(FAR struct sam_pwm_chan_s *chan, FAR const char *msg);
 /* PWM Interrupts */
 
 #ifdef PWM_INTERRUPTS
-static int pwm_interrupt(int irq, void *context);
+static int pwm_interrupt(int irq, void *context, FAR void *arg);
 #endif
 
 /* PWM driver methods */
@@ -504,6 +345,11 @@ static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev,
 
 /* Initialization */
 
+static unsigned int pwm_clk_prescaler_log2(uint32_t mck, uint32_t fclk);
+static unsigned int pwm_clk_divider(uint32_t mck, uint32_t fclk,
+                                    unsigned int prelog2);
+static uint32_t pwm_clk_frequency(uint32_t mck, unsigned int prelog2,
+                                  unsigned int div);
 static void pwm_resetpins(FAR struct sam_pwm_chan_s *chan);
 
 /****************************************************************************
@@ -713,7 +559,7 @@ static bool pwm_checkreg(FAR struct sam_pwm_s *pwm, bool wr, uint32_t regval,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", pwm->count);
+          pwminfo("...[Repeats %d times]...\n", pwm->count);
         }
 
       /* Save information about the new access */
@@ -757,7 +603,7 @@ static uint32_t pwm_getreg(struct sam_pwm_chan_s *chan, int offset)
 #ifdef CONFIG_SAMA5_PWM_REGDEBUG
   if (pwm_checkreg(&g_pwm, false, regval, regaddr))
     {
-      lldbg("%08x->%08x\n", regaddr, regval);
+      pwminfo("%08x->%08x\n", regaddr, regval);
     }
 #endif
 
@@ -774,7 +620,7 @@ static uint32_t pwm_getreg(struct sam_pwm_chan_s *chan, int offset)
 #ifdef CONFIG_SAMA5_PWM_REGDEBUG
   if (pwm_checkreg(pwm, false, regval, regaddr))
     {
-      lldbg("%08x->%08x\n", regaddr, regval);
+      pwminfo("%08x->%08x\n", regaddr, regval);
     }
 #endif
 
@@ -798,6 +644,7 @@ static uint32_t pwm_getreg(struct sam_pwm_chan_s *chan, int offset)
  *
  ****************************************************************************/
 
+#ifdef CONFIG_DEBUG_PWM_INFO /* Currently only used for debug output */
 static uint32_t pwm_chan_getreg(struct sam_pwm_chan_s *chan, int offset)
 {
   uintptr_t regaddr;
@@ -813,12 +660,13 @@ static uint32_t pwm_chan_getreg(struct sam_pwm_chan_s *chan, int offset)
   if (pwm_checkreg(chan->pwm, false, regval, regaddr))
 #endif
     {
-      lldbg("%08x->%08x\n", regaddr, regval);
+      pwminfo("%08x->%08x\n", regaddr, regval);
     }
 #endif
 
   return regval;
 }
+#endif
 
 /****************************************************************************
  * Name: pwm_putreg
@@ -844,7 +692,7 @@ static void pwm_putreg(struct sam_pwm_chan_s *chan, int offset,
 #ifdef CONFIG_SAMA5_PWM_REGDEBUG
   if (pwm_checkreg(&g_pwm, true, regval, regaddr))
     {
-      lldbg("%08x<-%08x\n", regaddr, regval);
+      pwminfo("%08x<-%08x\n", regaddr, regval);
     }
 #endif
 
@@ -857,7 +705,7 @@ static void pwm_putreg(struct sam_pwm_chan_s *chan, int offset,
 #ifdef CONFIG_SAMA5_PWM_REGDEBUG
   if (pwm_checkreg(pwm, true, regval, regaddr))
     {
-      lldbg("%08x<-%08x\n", regaddr, regval);
+      pwminfo("%08x<-%08x\n", regaddr, regval);
     }
 #endif
 
@@ -893,7 +741,7 @@ static void pwm_chan_putreg(struct sam_pwm_chan_s *chan, int offset,
   if (pwm_checkreg(chan->pwm, true, regval, regaddr))
 #endif
     {
-      lldbg("%08x<-%08x\n", regaddr, regval);
+      pwminfo("%08x<-%08x\n", regaddr, regval);
     }
 #endif
 
@@ -914,61 +762,61 @@ static void pwm_chan_putreg(struct sam_pwm_chan_s *chan, int offset,
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_PWM_INFO
 static void pwm_dumpregs(struct sam_pwm_chan_s *chan, FAR const char *msg)
 {
-  pwmvdbg("PWM: %s\n", msg);
-  pwmvdbg("   CLK: %08x    SR: %08x  IMR1: %08x  ISR1: %08x\n",
+  pwminfo("PWM: %s\n", msg);
+  pwminfo("   CLK: %08x    SR: %08x  IMR1: %08x  ISR1: %08x\n",
           pwm_getreg(chan, SAM_PWM_CLK_OFFSET),
           pwm_getreg(chan, SAM_PWM_SR_OFFSET),
           pwm_getreg(chan, SAM_PWM_IMR1_OFFSET),
           pwm_getreg(chan, SAM_PWM_ISR1_OFFSET));
-  pwmvdbg("   SCM: %08x  SCUC: %08x  SCUP: %08x  IMR2: %08x\n",
+  pwminfo("   SCM: %08x  SCUC: %08x  SCUP: %08x  IMR2: %08x\n",
           pwm_getreg(chan, SAM_PWM_SCM_OFFSET),
           pwm_getreg(chan, SAM_PWM_SCUC_OFFSET),
           pwm_getreg(chan, SAM_PWM_SCUP_OFFSET),
           pwm_getreg(chan, SAM_PWM_IMR2_OFFSET));
-  pwmvdbg("  ISR2: %08x   OOV: %08x    OS: %08x   FMR: %08x\n",
+  pwminfo("  ISR2: %08x   OOV: %08x    OS: %08x   FMR: %08x\n",
           pwm_getreg(chan, SAM_PWM_ISR2_OFFSET),
           pwm_getreg(chan, SAM_PWM_OOV_OFFSET),
           pwm_getreg(chan, SAM_PWM_OS_OFFSET),
           pwm_getreg(chan, SAM_PWM_FMR_OFFSET));
-  pwmvdbg("   FSR: %08x   FPV: %08x   FPE: %08x ELMR0: %08x\n",
+  pwminfo("   FSR: %08x   FPV: %08x   FPE: %08x ELMR0: %08x\n",
           pwm_getreg(chan, SAM_PWM_FSR_OFFSET),
           pwm_getreg(chan, SAM_PWM_FPV_OFFSET),
           pwm_getreg(chan, SAM_PWM_FPE_OFFSET),
           pwm_getreg(chan, SAM_PWM_ELMR0_OFFSET));
-  pwmvdbg(" ELMR1: %08x  SMMR: %08x  WPSR: %08x\n",
+  pwminfo(" ELMR1: %08x  SMMR: %08x  WPSR: %08x\n",
           pwm_getreg(chan, SAM_PWM_ELMR1_OFFSET),
           pwm_getreg(chan, SAM_PWM_SMMR_OFFSET),
           pwm_getreg(chan, SAM_PWM_WPSR_OFFSET));
-  pwmvdbg(" CMPV0: %08x CMPM0: %08x CMPV1: %08x CMPM1: %08x\n",
+  pwminfo(" CMPV0: %08x CMPM0: %08x CMPV1: %08x CMPM1: %08x\n",
           pwm_getreg(chan, SAM_PWM_CMPV0_OFFSET),
           pwm_getreg(chan, SAM_PWM_CMPM0_OFFSET),
           pwm_getreg(chan, SAM_PWM_CMPV1_OFFSET),
           pwm_getreg(chan, SAM_PWM_CMPM1_OFFSET));
-  pwmvdbg(" CMPV2: %08x CMPM2: %08x CMPV3: %08x CMPM3: %08x\n",
+  pwminfo(" CMPV2: %08x CMPM2: %08x CMPV3: %08x CMPM3: %08x\n",
           pwm_getreg(chan, SAM_PWM_CMPV2_OFFSET),
           pwm_getreg(chan, SAM_PWM_CMPM2_OFFSET),
           pwm_getreg(chan, SAM_PWM_CMPV3_OFFSET),
           pwm_getreg(chan, SAM_PWM_CMPM3_OFFSET));
-  pwmvdbg(" CMPV4: %08x CMPM4: %08x CMPV5: %08x CMPM5: %08x\n",
+  pwminfo(" CMPV4: %08x CMPM4: %08x CMPV5: %08x CMPM5: %08x\n",
           pwm_getreg(chan, SAM_PWM_CMPV4_OFFSET),
           pwm_getreg(chan, SAM_PWM_CMPM4_OFFSET),
           pwm_getreg(chan, SAM_PWM_CMPV5_OFFSET),
           pwm_getreg(chan, SAM_PWM_CMPM5_OFFSET));
-  pwmvdbg(" CMPV6: %08x CMPM6: %08x CMPV7: %08x CMPM7: %08x\n",
+  pwminfo(" CMPV6: %08x CMPM6: %08x CMPV7: %08x CMPM7: %08x\n",
           pwm_getreg(chan, SAM_PWM_CMPV6_OFFSET),
           pwm_getreg(chan, SAM_PWM_CMPM6_OFFSET),
           pwm_getreg(chan, SAM_PWM_CMPV7_OFFSET),
           pwm_getreg(chan, SAM_PWM_CMPM7_OFFSET));
-  pwmvdbg("Channel %d: %s\n", chan->channel, msg);
-  pwmvdbg("   CMR: %08x  CDTY: %08x  CPRD: %08x  CCNT: %08x\n",
+  pwminfo("Channel %d: %s\n", chan->channel, msg);
+  pwminfo("   CMR: %08x  CDTY: %08x  CPRD: %08x  CCNT: %08x\n",
           pwm_chan_getreg(chan, SAM_PWM_CMR_OFFSET),
           pwm_chan_getreg(chan, SAM_PWM_CDTY_OFFSET),
           pwm_chan_getreg(chan, SAM_PWM_CPRD_OFFSET),
           pwm_chan_getreg(chan, SAM_PWM_CCNT_OFFSET));
-  pwmvdbg("    CT: %08x\n",
+  pwminfo("    CT: %08x\n",
           pwm_chan_getreg(chan, SAM_PWM_DT_OFFSET));
 }
 #endif
@@ -988,7 +836,7 @@ static void pwm_dumpregs(struct sam_pwm_chan_s *chan, FAR const char *msg)
  ****************************************************************************/
 
 #ifdef PWM_INTERRUPTS
-static int pwm_interrupt(int irq, void *context)
+static int pwm_interrupt(int irq, void *context, FAR void *arg)
 {
   /* No PWM interrupts are used in the current design */
 
@@ -1018,7 +866,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
 {
   FAR struct sam_pwm_chan_s *chan = (FAR struct sam_pwm_chan_s *)dev;
 
-  pwmvdbg("Channel %d: H=%08x L=%08x FI=%08x\n",
+  pwminfo("Channel %d: H=%08x L=%08x FI=%08x\n",
           chan->channel, chan->ohpincfg, chan->olpincfg, chan->fipincfg);
 
   /* Configure selected PWM pins */
@@ -1061,7 +909,7 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
 {
   FAR struct sam_pwm_chan_s *chan = (FAR struct sam_pwm_chan_s *)dev;
 
-  pwmvdbg("Channel %d\n", chan->channel);
+  pwminfo("Channel %d\n", chan->channel);
 
   /* Make sure that the output has been stopped */
 
@@ -1092,6 +940,11 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
                      FAR const struct pwm_info_s *info)
 {
   FAR struct sam_pwm_chan_s *chan = (FAR struct sam_pwm_chan_s *)dev;
+#if defined(CONFIG_SAMA5_PWM_CLKA) || defined(CONFIG_SAMA5_PWM_CLKB)
+  unsigned int prelog2;
+  unsigned int div;
+  uint32_t mck;
+#endif
   uint32_t regval;
   uint32_t cprd;
   uint32_t fsrc;
@@ -1105,26 +958,40 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
   switch (chan->clksrc)
     {
     case PWM_CLKSRC_MCK:
-      regval = PWM_CMR_CPRE_MCKDIV(chan->divlog2);
-      fsrc   = BOARD_MCK_FREQUENCY >> chan->divlog2;
+      {
+        regval = PWM_CMR_CPRE_MCKDIV(chan->divlog2);
+        fsrc   = BOARD_MCK_FREQUENCY >> chan->divlog2;
+      }
       break;
 
 #ifdef CONFIG_SAMA5_PWM_CLKA
     case PWM_CLKSRC_CLKA:
-      regval = PWM_CMR_CPRE_CLKA;
-      fsrc   = CLKA_FREQUENCY;
+      {
+        regval  = pwm_getreg(chan, SAM_PWM_CLK_OFFSET);
+        prelog2 = (unsigned int)((regval & PWM_CLK_PREA_MASK) >> PWM_CLK_PREA_SHIFT);
+        div     = (unsigned int)((regval & PWM_CLK_DIVA_MASK) >> PWM_CLK_DIVA_SHIFT);
+        mck     = BOARD_MCK_FREQUENCY;
+        fsrc    = pwm_clk_frequency(mck, prelog2, div);
+        regval  = PWM_CMR_CPRE_CLKA;
+      }
       break;
 #endif
 
 #ifdef CONFIG_SAMA5_PWM_CLKB
     case PWM_CLKSRC_CLKB:
-      regval = PWM_CMR_CPRE_CLKB;
-      fsrc   = CLKB_FREQUENCY;
+      {
+        regval  = pwm_getreg(chan, SAM_PWM_CLK_OFFSET);
+        prelog2 = (unsigned int)((regval & PWM_CLK_PREB_MASK) >> PWM_CLK_PREB_SHIFT);
+        div     = (unsigned int)((regval & PWM_CLK_DIVB_MASK) >> PWM_CLK_DIVB_SHIFT);
+        mck     = BOARD_MCK_FREQUENCY;
+        fsrc    = pwm_clk_frequency(mck, prelog2, div);
+        regval  = PWM_CMR_CPRE_CLKB;
+      }
       break;
 #endif
 
     default:
-      pwmdbg("ERROR: Invalid or unsupported clock source value: %d\n", chan->clksrc);
+      pwmerr("ERROR: Invalid or unsupported clock source value: %d\n", chan->clksrc);
       return -EINVAL;
     }
 
@@ -1167,7 +1034,7 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
     }
 
   pwm_chan_putreg(chan, SAM_PWM_CDTY_OFFSET, regval);
-  pwmvdbg("Fsrc=%d cprd=%d cdty=%d\n", fsrc, cprd, regval);
+  pwminfo("Fsrc=%d cprd=%d cdty=%d\n", fsrc, cprd, regval);
 
   /* Enable the channel */
 
@@ -1199,7 +1066,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
 {
   FAR struct sam_pwm_chan_s *chan = (FAR struct sam_pwm_chan_s *)dev;
 
-  pwmvdbg("Channel %d\n", chan->channel);
+  pwminfo("Channel %d\n", chan->channel);
 
   /* Disable further PWM interrupts from this channel */
 
@@ -1231,29 +1098,168 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
 
 static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg)
 {
-#ifdef CONFIG_DEBUG_PWM
+#ifdef CONFIG_DEBUG_PWM_INFO
   FAR struct sam_pwm_chan_s *chan = (FAR struct sam_pwm_chan_s *)dev;
 
   /* There are no platform-specific ioctl commands */
 
-  pwmvdbg("Channel %d\n", chan->channel);
+  pwminfo("Channel %d\n", chan->channel);
 #endif
   return -ENOTTY;
 }
 
 /****************************************************************************
- * Name: pwm_ioctl
+ * Name: pwm_clk_prescaler_log2
+ *
+ * Description:
+ *   Return log2 of the clock prescaler value.  The PWM clock divisor
+ *   register fields use this kind of value.  The return value of this
+ *   function can be converted into a PWM clock register value or an absolute
+ *   prescaler value by applying the following operations (macros defined in
+ *   chip/sam_pwm.h):
+ *
+ *   This function selects the prescaler value that allows the largest, valid
+ *   divider value.  This may not be optimal in all cases, but in general
+ *   should provide a reasonable frequency value.  The frequency is given by:
+ *
+ *     frequency = MCK / prescaler / div
+ *
+ *   The divider has a range of 1-255.  Pick smallest prescaler such that:
+ *
+ *     prescaler = MCK / frequency / div < 256
+ *
+ *   Example usage given:
+ *     unsigned int prelog2;
+ *     unsigned int prescaler;
+ *     uint32_t regbits;
+ *
+ *   For clock A:
+ *     prelog2   = pwm_clk_prescaler_log2(BOARD_MCK_FREQUENCY,
+ *                                    CONFIG_SAMA5_PWM_CLKA_FREQUENCY )
+ *     regbits   = PWM_CLK_PREA_DIV(prelog2);
+ *     prescaler = (1 << prelog2)
+ *
+ *   For clock B:
+ *     prelog2   = pwm_clk_prescaler_log2(BOARD_MCK_FREQUENCY,
+ *                                    CONFIG_SAMA5_PWM_CLKB_FREQUENCY )
+ *     regbits   = PWM_CLK_PREB_DIV(prelog2);
+ *     prescaler = (1 << prelog2)
+ *
+ * Input parameters:
+ *     mck  - The main clock frequency
+ *     fclk - The desired clock A or B frequency
+ *
+ * Returned Value:
+ *   The select value of log2(prescaler) in the range 0-10 corresponding to
+ *   the actual prescaler value in the range 1-1024.
+ *
+ ****************************************************************************/
+
+static unsigned int pwm_clk_prescaler_log2(uint32_t mck, uint32_t fclk)
+{
+  uint32_t unscaled;
+  unsigned int prelog2;
+
+  unscaled = mck / fclk;
+  prelog2  = 0;
+
+  /* Loop, incrementing the log2(prescaler) value.  Exit with either:
+   *
+   *   1) unscaled < 256 and prelog2 <= 10, or with
+   *   2) unscaled >= 256 and prelog2 == 10
+   */
+
+  while (unscaled >= 256 && prelog2 < 10)
+    {
+      unscaled >>= 1;
+      prelog2++;
+    }
+
+  DEBUGASSERT(unscaled < 256);
+  return prelog2;
+}
+
+/****************************************************************************
+ * Name: pwm_clk_divider
+ *
+ * Description:
+ *   Given that we have already selected the prescaler value, select the
+ *   divider in the range of 1 through 255.  The CLKA/B frequency is
+ *   determined by both the prescaler and divider valuess:
+ *
+ *   frequency = MCK / prescaler / div
+ *
+ * Then:
+ *
+ *   div = MCK / prescaler / frequency
+ *
+ * Input parameters:
+ *     mck     - The main clock frequency
+ *     fclk    - The desired clock A or B frequency
+ *     prelog2 - The log2(prescaler) value previously selected by
+ *               pwm_prescale_log2().
+ *
+ * Returned Value:
+ *   The select value of log2(prescaler) in the range 0-10 corresponding to
+ *   the actual prescaler value in the range 1-1024.
+ *
+ ****************************************************************************/
+
+static unsigned int pwm_clk_divider(uint32_t mck, uint32_t fclk,
+                                    unsigned int prelog2)
+{
+  uint32_t div = (mck >> prelog2) / fclk;
+
+  if (div < 1)
+    {
+      div = 1;
+    }
+  else if (div > 255)
+    {
+      div = 255;
+    }
+
+  return div;
+}
+
+/****************************************************************************
+ * Name: pwm_clk_frequency
+ *
+ * Description:
+ *   Given that we have already selected the prescaler value and cacluated
+ *   the corresponding divider, the result clock frequency is give by:
+ *
+ *   frequency = MCK / prescaler / div
+ *
+ * Input parameters:
+ *     mck     - The main clock frequency
+ *     prelog2 - The log2(prescaler) value previously selected by
+ *               pwm_prescale_log2().
+ *     div     - The divider previously calculated from pwm_clk_divider().
+ *
+ * Returned Value:
+ *   The select value of log2(prescaler) in the range 0-10 corresponding to
+ *   the actual prescaler value in the range 1-1024.
+ *
+ ****************************************************************************/
+
+static uint32_t pwm_clk_frequency(uint32_t mck, unsigned int prelog2,
+                                  unsigned int div)
+{
+  return (mck >> prelog2) / div;
+}
+
+/****************************************************************************
+ * Name: pwm_resetpins
  *
  * Description:
  *   Lower-half logic may support platform-specific ioctl commands
  *
  * Input parameters:
- *   dev - A reference to the lower half PWM driver state structure
- *   cmd - The ioctl command
- *   arg - The argument accompanying the ioctl command
+ *   chan - A reference to the PWM channel instance
  *
  * Returned Value:
- *   Zero on success; a negated errno value on failure
+ *   None
  *
  ****************************************************************************/
 
@@ -1299,7 +1305,7 @@ FAR struct pwm_lowerhalf_s *sam_pwminitialize(int channel)
   FAR struct sam_pwm_chan_s *chan;
   uint32_t regval;
 
-  pwmvdbg("Channel %d\n", channel);
+  pwminfo("Channel %d\n", channel);
 
   switch (channel)
     {
@@ -1336,7 +1342,7 @@ FAR struct pwm_lowerhalf_s *sam_pwminitialize(int channel)
 #endif
 
       default:
-        pwmdbg("ERROR: Channel invalid or not configured: %d\n", channel);
+        pwmerr("ERROR: Channel invalid or not configured: %d\n", channel);
         return NULL;
     }
 
@@ -1346,13 +1352,37 @@ FAR struct pwm_lowerhalf_s *sam_pwminitialize(int channel)
 
   if (!g_pwm.initialized)
     {
+#if defined(CONFIG_SAMA5_PWM_CLKA) || defined(CONFIG_SAMA5_PWM_CLKB)
+      uint32_t mck;
+      unsigned int prelog2;
+      unsigned int div;
+#endif
+
       /* Enable the PWM peripheral clock */
 
       sam_pwm_enableclk();
 
-      /* Set clock A and clock B */
+#if defined(CONFIG_SAMA5_PWM_CLKA) || defined(CONFIG_SAMA5_PWM_CLKB)
+      mck      = BOARD_MCK_FREQUENCY;
+#endif
+#ifdef CONFIG_SAMA5_PWM_CLKA
+      /* Set clock A configuration */
+
+      prelog2  = pwm_clk_prescaler_log2(mck, CONFIG_SAMA5_PWM_CLKA_FREQUENCY);
+      div      = pwm_clk_divider(mck, CONFIG_SAMA5_PWM_CLKA_FREQUENCY, prelog2);
+      regval   = (PWM_CLK_DIVA(div) | PWM_CLK_PREA_DIV(prelog2));
+#else
+      regval   = 0;
+#endif
+
+#ifdef CONFIG_SAMA5_PWM_CLKB
+      /* Set clock B configuration */
+
+      prelog2  = pwm_clk_prescaler_log2(mck, CONFIG_SAMA5_PWM_CLKB_FREQUENCY);
+      div      = pwm_clk_divider(mck, CONFIG_SAMA5_PWM_CLKA_FREQUENCY, prelog2);
+      regval  |= (PWM_CLK_DIVB(div) | PWM_CLK_PREB_DIV(prelog2));
+#endif
 
-      regval = (CLKA_PRE_BITS | CLKA_DIV_BITS | CLKB_PRE_BITS | CLKB_DIV_BITS);
       pwm_putreg(chan, SAM_PWM_CLK_OFFSET, regval);
 
       /* Disable all PWM interrupts at the PWM peripheral */
@@ -1363,10 +1393,10 @@ FAR struct pwm_lowerhalf_s *sam_pwminitialize(int channel)
       /* Attach the PWM interrupt handler */
 
 #ifdef PWM_INTERRUPTS
-      ret = irq_attach(SAM_IRQ_PWM, pwm_interrupt);
+      ret = irq_attach(SAM_IRQ_PWM, pwm_interrupt, NULL);
       if (ret < 0)
         {
-          pwmdbg("ERROR: Failed to attach IRQ%d\n", channel);
+          pwmerr("ERROR: Failed to attach IRQ%d\n", channel);
           return NULL;
 
         }
diff --git a/arch/arm/src/sama5/sam_rtc.c b/arch/arm/src/sama5/sam_rtc.c
index 94bca9114246b1a0f894c4de41712667bb7aab86..b5a893b361658cdb11306b3abbd6a712875cfda0 100644
--- a/arch/arm/src/sama5/sam_rtc.c
+++ b/arch/arm/src/sama5/sam_rtc.c
@@ -77,30 +77,6 @@
 
 #define RTC_MAGIC 0xdeadbeef
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_RTC
-#endif
-
-/* Constants ************************************************************************/
-
-/* Debug ****************************************************************************/
-
-#ifdef CONFIG_DEBUG_RTC
-#  define rtcdbg    dbg
-#  define rtcvdbg   vdbg
-#  define rtclldbg  lldbg
-#  define rtcllvdbg llvdbg
-#else
-#  define rtcdbg(x...)
-#  define rtcvdbg(x...)
-#  define rtclldbg(x...)
-#  define rtcllvdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Types
- ************************************************************************************/
-
 /************************************************************************************
  * Private Data
  ************************************************************************************/
@@ -137,19 +113,19 @@ volatile bool g_rtc_enabled = false;
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_RTC
+#ifdef CONFIG_DEBUG_RTC_INFO
 static void rtc_dumpregs(FAR const char *msg)
 {
-  rtclldbg("%s:\n", msg);
-  rtclldbg("      CR: %08x\n", getreg32(SAM_RTC_CR));
-  rtclldbg("      MR: %08x\n", getreg32(SAM_RTC_MR));
-  rtclldbg("    TIMR: %08x\n", getreg32(SAM_RTC_TIMR));
-  rtclldbg("    CALR: %08x\n", getreg32(SAM_RTC_CALR));
-  rtclldbg("  TIMALR: %08x\n", getreg32(SAM_RTC_TIMALR));
-  rtclldbg("  CALALR: %08x\n", getreg32(SAM_RTC_CALALR));
-  rtclldbg("      SR: %08x\n", getreg32(SAM_RTC_SR));
-  rtclldbg("     IMR: %08x\n", getreg32(SAM_RTC_IMR));
-  rtclldbg("     VER: %08x\n", getreg32(SAM_RTC_VER));
+  rtcinfo("%s:\n", msg);
+  rtcinfo("      CR: %08x\n", getreg32(SAM_RTC_CR));
+  rtcinfo("      MR: %08x\n", getreg32(SAM_RTC_MR));
+  rtcinfo("    TIMR: %08x\n", getreg32(SAM_RTC_TIMR));
+  rtcinfo("    CALR: %08x\n", getreg32(SAM_RTC_CALR));
+  rtcinfo("  TIMALR: %08x\n", getreg32(SAM_RTC_TIMALR));
+  rtcinfo("  CALALR: %08x\n", getreg32(SAM_RTC_CALALR));
+  rtcinfo("      SR: %08x\n", getreg32(SAM_RTC_SR));
+  rtcinfo("     IMR: %08x\n", getreg32(SAM_RTC_IMR));
+  rtcinfo("     VER: %08x\n", getreg32(SAM_RTC_VER));
 }
 #else
 #  define rtc_dumpregs(msg)
@@ -169,16 +145,16 @@ static void rtc_dumpregs(FAR const char *msg)
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_RTC
+#ifdef CONFIG_DEBUG_RTC_INFO
 static void rtc_dumptime(FAR struct tm *tp, FAR const char *msg)
 {
-  rtclldbg("%s:\n", msg);
-  rtclldbg("  tm_sec: %08x\n", tp->tm_sec);
-  rtclldbg("  tm_min: %08x\n", tp->tm_min);
-  rtclldbg(" tm_hour: %08x\n", tp->tm_hour);
-  rtclldbg(" tm_mday: %08x\n", tp->tm_mday);
-  rtclldbg("  tm_mon: %08x\n", tp->tm_mon);
-  rtclldbg(" tm_year: %08x\n", tp->tm_year);
+  rtcinfo("%s:\n", msg);
+  rtcinfo("  tm_sec: %08x\n", tp->tm_sec);
+  rtcinfo("  tm_min: %08x\n", tp->tm_min);
+  rtcinfo(" tm_hour: %08x\n", tp->tm_hour);
+  rtcinfo(" tm_mday: %08x\n", tp->tm_mday);
+  rtcinfo("  tm_mon: %08x\n", tp->tm_mon);
+  rtcinfo(" tm_year: %08x\n", tp->tm_year);
 }
 #else
 #  define rtc_dumptime(tp, msg)
@@ -279,7 +255,7 @@ static void rtc_worker(FAR void *arg)
  ************************************************************************************/
 
 #ifdef CONFIG_RTC_ALARM
-static int rtc_interrupt(int irq, void *context)
+static int rtc_interrupt(int irq, void *context, FAR void *arg)
 {
   int ret;
 
@@ -289,7 +265,7 @@ static int rtc_interrupt(int irq, void *context)
   ret = work_queue(LPWORK, &g_alarmwork, rtc_worker, NULL, 0);
   if (ret < 0)
     {
-      rtclldbg("ERRPR: work_queue failed: %d\n", ret);
+      rtcerr("ERROR: work_queue failed: %d\n", ret);
     }
 
   /* Disable any further alarm interrupts */
@@ -345,7 +321,7 @@ int up_rtc_initialize(void)
 #ifdef CONFIG_RTC_ALARM
   /* Then attach the ALARM interrupt handler */
 
-  irq_attach(SAM_PID_SYS, rtc_interrupt);
+  irq_attach(SAM_PID_SYS, rtc_interrupt, NULL);
 
   /* Should RTC alarm interrupt be enabled at the peripheral?  Let's assume so
    * for now.  Let's say yes if the time is valid and a valid alarm has been
diff --git a/arch/arm/src/sama5/sam_serial.c b/arch/arm/src/sama5/sam_serial.c
index a73ac33cd24f3b190db4fe9e4032544ca5e1f3c6..b9da00d8555bbc86d9e46b630be1364d454e2dc0 100644
--- a/arch/arm/src/sama5/sam_serial.c
+++ b/arch/arm/src/sama5/sam_serial.c
@@ -418,7 +418,6 @@
 
 struct up_dev_s
 {
-  xcpt_t   handler;   /* Interrupt handler */
   uint32_t usartbase; /* Base address of USART registers */
   uint32_t baud;      /* Configured baud */
   uint32_t sr;        /* Saved status bits */
@@ -435,38 +434,7 @@ struct up_dev_s
  * Private Function Prototypes
  ****************************************************************************/
 
-static int  up_interrupt(struct uart_dev_s *dev);
-#ifdef CONFIG_SAMA5_UART0
-static int  up_uart0_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_SAMA5_UART1
-static int  up_uart1_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_SAMA5_UART2
-static int  up_uart2_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_SAMA5_UART3
-static int  up_uart3_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_SAMA5_UART4
-static int  up_uart4_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_USART0_SERIALDRIVER
-static int  up_usart0_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_USART1_SERIALDRIVER
-static int  up_usart1_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_USART2_SERIALDRIVER
-static int  up_usart2_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_USART3_SERIALDRIVER
-static int  up_usart3_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_USART4_SERIALDRIVER
-static int  up_usart4_interrupt(int irq, void *context);
-#endif
-
+static int  up_interrupt(int irq, void *context, FAR void *arg);
 static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
@@ -561,7 +529,6 @@ static char g_usart4txbuffer[CONFIG_USART4_TXBUFSIZE];
 
 static struct up_dev_s g_uart0priv =
 {
-  .handler        = up_uart0_interrupt,
   .usartbase      = SAM_UART0_VBASE,
   .baud           = CONFIG_UART0_BAUD,
   .irq            = SAM_IRQ_UART0,
@@ -602,7 +569,6 @@ static uart_dev_t g_uart0port =
 
 static struct up_dev_s g_uart1priv =
 {
-  .handler        = up_uart1_interrupt,
   .usartbase      = SAM_UART1_VBASE,
   .baud           = CONFIG_UART1_BAUD,
   .irq            = SAM_IRQ_UART1,
@@ -643,7 +609,6 @@ static uart_dev_t g_uart1port =
 
 static struct up_dev_s g_uart2priv =
 {
-  .handler        = up_uart2_interrupt,
   .usartbase      = SAM_UART2_VBASE,
   .baud           = CONFIG_UART2_BAUD,
   .irq            = SAM_IRQ_UART2,
@@ -684,7 +649,6 @@ static uart_dev_t g_uart2port =
 
 static struct up_dev_s g_uart3priv =
 {
-  .handler        = up_uart3_interrupt,
   .usartbase      = SAM_UART3_VBASE,
   .baud           = CONFIG_UART3_BAUD,
   .irq            = SAM_IRQ_UART3,
@@ -725,7 +689,6 @@ static uart_dev_t g_uart3port =
 
 static struct up_dev_s g_uart4priv =
 {
-  .handler        = up_uart4_interrupt,
   .usartbase      = SAM_UART4_VBASE,
   .baud           = CONFIG_UART4_BAUD,
   .irq            = SAM_IRQ_UART4,
@@ -756,7 +719,6 @@ static uart_dev_t g_uart4port =
 #ifdef CONFIG_USART0_SERIALDRIVER
 static struct up_dev_s g_usart0priv =
 {
-  .handler        = up_usart0_interrupt,
   .usartbase      = SAM_USART0_VBASE,
   .baud           = CONFIG_USART0_BAUD,
   .irq            = SAM_IRQ_USART0,
@@ -790,7 +752,6 @@ static uart_dev_t g_usart0port =
 #ifdef CONFIG_USART1_SERIALDRIVER
 static struct up_dev_s g_usart1priv =
 {
-  .handler        = up_usart1_interrupt,
   .usartbase      = SAM_USART1_VBASE,
   .baud           = CONFIG_USART1_BAUD,
   .irq            = SAM_IRQ_USART1,
@@ -824,7 +785,6 @@ static uart_dev_t g_usart1port =
 #ifdef CONFIG_USART2_SERIALDRIVER
 static struct up_dev_s g_usart2priv =
 {
-  .handler        = up_usart2_interrupt,
   .usartbase      = SAM_USART2_VBASE,
   .baud           = CONFIG_USART2_BAUD,
   .irq            = SAM_IRQ_USART2,
@@ -858,7 +818,6 @@ static uart_dev_t g_usart2port =
 #ifdef CONFIG_USART3_SERIALDRIVER
 static struct up_dev_s g_usart3priv =
 {
-  .handler        = up_usart3_interrupt,
   .usartbase      = SAM_USART3_VBASE,
   .baud           = CONFIG_USART3_BAUD,
   .irq            = SAM_IRQ_USART3,
@@ -892,7 +851,6 @@ static uart_dev_t g_usart3port =
 #ifdef CONFIG_USART4_SERIALDRIVER
 static struct up_dev_s g_usart4priv =
 {
-  .handler        = up_usart4_interrupt,
   .usartbase      = SAM_USART4_VBASE,
   .baud           = CONFIG_USART4_BAUD,
   .irq            = SAM_IRQ_USART4,
@@ -989,8 +947,9 @@ static void up_disableallints(struct up_dev_s *priv, uint32_t *imr)
  *
  ****************************************************************************/
 
-static int up_interrupt(struct uart_dev_s *dev)
+static int up_interrupt(int irq, void *context, FAR void *arg)
 {
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct up_dev_s   *priv;
   uint32_t           pending;
   uint32_t           imr;
@@ -1043,67 +1002,6 @@ static int up_interrupt(struct uart_dev_s *dev)
   return OK;
 }
 
-#ifdef CONFIG_SAMA5_UART0
-static int  up_uart0_interrupt(int irq, void *context)
-{
-  return up_interrupt(&g_uart0port);
-}
-#endif
-#ifdef CONFIG_SAMA5_UART1
-static int  up_uart1_interrupt(int irq, void *context)
-{
-  return up_interrupt(&g_uart1port);
-}
-#endif
-#ifdef CONFIG_SAMA5_UART2
-static int  up_uart2_interrupt(int irq, void *context)
-{
-  return up_interrupt(&g_uart2port);
-}
-#endif
-#ifdef CONFIG_SAMA5_UART3
-static int  up_uart3_interrupt(int irq, void *context)
-{
-  return up_interrupt(&g_uart3port);
-}
-#endif
-#ifdef CONFIG_SAMA5_UART4
-static int  up_uart4_interrupt(int irq, void *context)
-{
-  return up_interrupt(&g_uart4port);
-}
-#endif
-#ifdef CONFIG_USART0_SERIALDRIVER
-static int  up_usart0_interrupt(int irq, void *context)
-{
-  return up_interrupt(&g_usart0port);
-}
-#endif
-#ifdef CONFIG_USART1_SERIALDRIVER
-static int  up_usart1_interrupt(int irq, void *context)
-{
-  return up_interrupt(&g_usart1port);
-}
-#endif
-#ifdef CONFIG_USART2_SERIALDRIVER
-static int  up_usart2_interrupt(int irq, void *context)
-{
-  return up_interrupt(&g_usart2port);
-}
-#endif
-#ifdef CONFIG_USART3_SERIALDRIVER
-static int  up_usart3_interrupt(int irq, void *context)
-{
-  return up_interrupt(&g_usart3port);
-}
-#endif
-#ifdef CONFIG_USART4_SERIALDRIVER
-static int  up_usart4_interrupt(int irq, void *context)
-{
-  return up_interrupt(&g_usart4port);
-}
-#endif
-
 /****************************************************************************
  * Name: up_setup
  *
@@ -1294,7 +1192,7 @@ static int up_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, priv->handler);
+  ret = irq_attach(priv->irq, up_interrupt, dev);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
diff --git a/arch/arm/src/sama5/sam_spi.c b/arch/arm/src/sama5/sam_spi.c
index 2d370fe7a94175451a6f61cf4d598c9e92d360ab..459e949cad79300e8c4ac1363b9e5c6283bdf3e1 100644
--- a/arch/arm/src/sama5/sam_spi.c
+++ b/arch/arm/src/sama5/sam_spi.c
@@ -60,6 +60,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include "up_internal.h"
@@ -90,6 +91,10 @@
 #  define CONFIG_SAMA5_SPI_DMATHRESHOLD 4
 #endif
 
+#ifndef CONFIG_DEBUG_SPI_INFO
+#  undef CONFIG_SAMA5_SPI_REGDEBUG
+#endif
+
 #ifdef CONFIG_SAMA5_SPI_DMA
 
 #  if defined(CONFIG_SAMA5_SPI0) && defined(CONFIG_SAMA5_DMAC0)
@@ -125,33 +130,12 @@
 #define DMA_TIMEOUT_TICKS MSEC2TICK(DMA_TIMEOUT_MS)
 
 /* Debug *******************************************************************/
-/* Check if SPI debut is enabled (non-standard.. no support in
- * include/debug.h
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_SPI
-#  undef CONFIG_SAMA5_SPI_DMADEBUG
-#  undef CONFIG_SAMA5_SPI_REGDEBUG
-#endif
+/* Check if SPI debug is enabled */
 
 #ifndef CONFIG_DEBUG_DMA
 #  undef CONFIG_SAMA5_SPI_DMADEBUG
 #endif
 
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 #define DMA_INITIAL      0
 #define DMA_AFTER_SETUP  1
 #define DMA_AFTER_START  2
@@ -243,7 +227,7 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
                   unsigned int offset);
 static inline struct sam_spidev_s *spi_device(struct sam_spics_s *spics);
 
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_SPI_INFO
 static void     spi_dumpregs(struct sam_spidev_s *spi, const char *msg);
 #else
 # define        spi_dumpregs(spi,msg)
@@ -430,7 +414,7 @@ static bool spi_checkreg(struct sam_spidev_s *spi, bool wr, uint32_t value,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", spi->ntimes);
+          spiinfo("...[Repeats %d times]...\n", spi->ntimes);
         }
 
       /* Save information about the new access */
@@ -464,7 +448,7 @@ static inline uint32_t spi_getreg(struct sam_spidev_s *spi,
 #ifdef CONFIG_SAMA5_SPI_REGDEBUG
   if (spi_checkreg(spi, false, value, address))
     {
-      lldbg("%08x->%08x\n", address, value);
+      spiinfo("%08x->%08x\n", address, value);
     }
 #endif
 
@@ -487,7 +471,7 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
 #ifdef CONFIG_SAMA5_SPI_REGDEBUG
   if (spi_checkreg(spi, true, value, address))
     {
-      lldbg("%08x<-%08x\n", address, value);
+      spiinfo("%08x<-%08x\n", address, value);
     }
 #endif
 
@@ -509,20 +493,20 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_SPI_INFO
 static void spi_dumpregs(struct sam_spidev_s *spi, const char *msg)
 {
-  spivdbg("%s:\n", msg);
-  spivdbg("    MR:%08x   SR:%08x  IMR:%08x\n",
+  spiinfo("%s:\n", msg);
+  spiinfo("    MR:%08x   SR:%08x  IMR:%08x\n",
           getreg32(spi->base + SAM_SPI_MR_OFFSET),
           getreg32(spi->base + SAM_SPI_SR_OFFSET),
           getreg32(spi->base + SAM_SPI_IMR_OFFSET));
-  spivdbg("  CSR0:%08x CSR1:%08x CSR2:%08x CSR3:%08x\n",
+  spiinfo("  CSR0:%08x CSR1:%08x CSR2:%08x CSR3:%08x\n",
           getreg32(spi->base + SAM_SPI_CSR0_OFFSET),
           getreg32(spi->base + SAM_SPI_CSR1_OFFSET),
           getreg32(spi->base + SAM_SPI_CSR2_OFFSET),
           getreg32(spi->base + SAM_SPI_CSR3_OFFSET));
-  spivdbg("  WPCR:%08x WPSR:%08x\n",
+  spiinfo("  WPCR:%08x WPSR:%08x\n",
           getreg32(spi->base + SAM_SPI_WPCR_OFFSET),
           getreg32(spi->base + SAM_SPI_WPSR_OFFSET));
 }
@@ -882,7 +866,7 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
   struct sam_spics_s *spics = (struct sam_spics_s *)dev;
   struct sam_spidev_s *spi = spi_device(spics);
 
-  spivdbg("lock=%d\n", lock);
+  spiinfo("lock=%d\n", lock);
   if (lock)
     {
       /* Take the semaphore (perhaps waiting) */
@@ -930,10 +914,10 @@ static void spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
 
   /* Are we selecting or de-selecting the device? */
 
-  spivdbg("selected=%d\n", selected);
+  spiinfo("selected=%d\n", selected);
   if (selected)
     {
-      spivdbg("cs=%d\n", spics->cs);
+      spiinfo("cs=%d\n", spics->cs);
 
       /* Before writing the TDR, the PCS field in the SPI_MR register must be set
        * in order to select a slave.
@@ -988,7 +972,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
   uint32_t regval;
   unsigned int offset;
 
-  spivdbg("cs=%d frequency=%d\n", spics->cs, frequency);
+  spiinfo("cs=%d frequency=%d\n", spics->cs, frequency);
 
   /* Check if the requested frequency is the same as the frequency selection */
 
@@ -1058,14 +1042,14 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
   /* Calculate the new actual frequency */
 
   actual = SAM_SPI_CLOCK / scbr;
-  spivdbg("csr[offset=%02x]=%08x actual=%d\n", offset, regval, actual);
+  spiinfo("csr[offset=%02x]=%08x actual=%d\n", offset, regval, actual);
 
   /* Save the frequency setting */
 
   spics->frequency = frequency;
   spics->actual    = actual;
 
-  spidbg("Frequency %d->%d\n", frequency, actual);
+  spiinfo("Frequency %d->%d\n", frequency, actual);
   return actual;
 }
 
@@ -1091,7 +1075,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
   uint32_t regval;
   unsigned int offset;
 
-  spivdbg("cs=%d mode=%d\n", spics->cs, mode);
+  spiinfo("cs=%d mode=%d\n", spics->cs, mode);
 
   /* Has the mode changed? */
 
@@ -1134,7 +1118,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
         }
 
       spi_putreg(spi, regval, offset);
-      spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
+      spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
 
       /* Save the mode so that subsequent re-configurations will be faster */
 
@@ -1164,7 +1148,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
   uint32_t regval;
   unsigned int offset;
 
-  spivdbg("cs=%d nbits=%d\n", spics->cs, nbits);
+  spiinfo("cs=%d nbits=%d\n", spics->cs, nbits);
   DEBUGASSERT(spics && nbits > 7 && nbits < 17);
 
   /* NOTE:  The logic in spi_send and in spi_exchange only handles 8-bit
@@ -1186,7 +1170,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
       regval |= SPI_CSR_BITS(nbits);
       spi_putreg(spi, regval, offset);
 
-      spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
+      spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
 
       /* Save the selection so the subsequence re-configurations will be faster */
 
@@ -1224,7 +1208,7 @@ static uint16_t spi_send(struct spi_dev_s *dev, uint16_t wd)
   rxbyte = (uint8_t)0;
   spi_exchange(dev, &txbyte, &rxbyte, 1);
 
-  spivdbg("Sent %02x received %02x\n", txbyte, rxbyte);
+  spiinfo("Sent %02x received %02x\n", txbyte, rxbyte);
   return (uint16_t)rxbyte;
 }
 
@@ -1270,7 +1254,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
   uint32_t pcs;
   uint32_t data;
 
-  spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+  spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
 
   /* Set up PCS bits */
 
@@ -1390,7 +1374,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
       return;
     }
 
-  spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+  spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
 
   spics = (struct sam_spics_s *)dev;
   spi = spi_device(spics);
@@ -1476,7 +1460,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
   ret = sam_dmarxsetup(spics->rxdma, paddr, maddr, nwords);
   if (ret < 0)
     {
-      dmadbg("ERROR: sam_dmarxsetup failed: %d\n", ret);
+      dmaerr("ERROR: sam_dmarxsetup failed: %d\n", ret);
       return;
     }
 
@@ -1488,7 +1472,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
   ret = sam_dmatxsetup(spics->txdma, paddr, maddr, nwords);
   if (ret < 0)
     {
-      dmadbg("ERROR: sam_dmatxsetup failed: %d\n", ret);
+      dmaerr("ERROR: sam_dmatxsetup failed: %d\n", ret);
       return;
     }
 
@@ -1500,7 +1484,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
   ret = sam_dmastart(spics->rxdma, spi_rxcallback, (void *)spics);
   if (ret < 0)
     {
-      dmadbg("ERROR: RX sam_dmastart failed: %d\n", ret);
+      dmaerr("ERROR: RX sam_dmastart failed: %d\n", ret);
       return;
     }
 
@@ -1509,7 +1493,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
   ret = sam_dmastart(spics->txdma, spi_txcallback, (void *)spics);
   if (ret < 0)
     {
-      dmadbg("ERROR: RX sam_dmastart failed: %d\n", ret);
+      dmaerr("ERROR: RX sam_dmastart failed: %d\n", ret);
       sam_dmastop(spics->rxdma);
       return;
     }
@@ -1531,7 +1515,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
                      (wdentry_t)spi_dmatimeout, 1, (uint32_t)spics);
       if (ret != OK)
         {
-           spidbg("ERROR: wd_start failed: %d\n", ret);
+           spierr("ERROR: wd_start failed: %d\n", ret);
         }
 
       /* Wait for the DMA complete */
@@ -1582,7 +1566,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
 
   if (spics->result)
     {
-      spidbg("ERROR: DMA failed with result: %d\n", spics->result);
+      spierr("ERROR: DMA failed with result: %d\n", spics->result);
     }
 }
 #endif /* CONFIG_SAMA5_SPI_DMA */
@@ -1673,7 +1657,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
 
   /* The support SAM parts have only a single SPI port */
 
-  spivdbg("port: %d csno: %d spino: %d\n", port, csno, spino);
+  spiinfo("port: %d csno: %d spino: %d\n", port, csno, spino);
   DEBUGASSERT(csno >= 0 && csno <= SAM_SPI_NCS);
 
 #if defined(CONFIG_SAMA5_SPI0) && defined(CONFIG_SAMA5_SPI1)
@@ -1692,7 +1676,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
   spics = (struct sam_spics_s *)zalloc(sizeof(struct sam_spics_s));
   if (!spics)
     {
-      spidbg("ERROR: Failed to allocate a chip select structure\n");
+      spierr("ERROR: Failed to allocate a chip select structure\n");
       return NULL;
     }
 
@@ -1715,7 +1699,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
       spics->rxdma = sam_dmachannel(spino, 0);
       if (!spics->rxdma)
         {
-          spidbg("ERROR: Failed to allocate the RX DMA channel\n");
+          spierr("ERROR: Failed to allocate the RX DMA channel\n");
           spics->candma = false;
         }
     }
@@ -1725,7 +1709,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
       spics->txdma = sam_dmachannel(spino, 0);
       if (!spics->txdma)
         {
-          spidbg("ERROR: Failed to allocate the TX DMA channel\n");
+          spierr("ERROR: Failed to allocate the TX DMA channel\n");
           sam_dmafree(spics->rxdma);
           spics->rxdma  = NULL;
           spics->candma = false;
@@ -1827,10 +1811,12 @@ struct spi_dev_s *sam_spibus_initialize(int port)
 
 #ifdef CONFIG_SAMA5_SPI_DMA
       /* Initialize the SPI semaphore that is used to wake up the waiting
-       * thread when the DMA transfer completes.
+       * thread when the DMA transfer completes.  This semaphore is used for
+       * signaling and, hence, should not have priority inheritance enabled.
        */
 
       sem_init(&spics->dmawait, 0, 0);
+      sem_setprotocol(&spics->dmawait, SEM_PRIO_NONE);
 
       /* Create a watchdog time to catch DMA timeouts */
 
@@ -1852,7 +1838,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
   spi_putreg(spi, regval, offset);
 
   spics->nbits = 8;
-  spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
+  spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
 
   return &spics->spidev;
 }
diff --git a/arch/arm/src/sama5/sam_ssc.c b/arch/arm/src/sama5/sam_ssc.c
index 52aac74b17d7d96efb53a35814c04000b94527d8..8e4e66a03272ccbd8b076de16787f4f286b75cba 100644
--- a/arch/arm/src/sama5/sam_ssc.c
+++ b/arch/arm/src/sama5/sam_ssc.c
@@ -397,12 +397,7 @@
  * include/debug.h
  */
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_I2S
-#endif
-
-#ifndef CONFIG_DEBUG_I2S
+#ifndef CONFIG_DEBUG_I2S_INFO
 #  undef CONFIG_SAMA5_SSC_DMADEBUG
 #  undef CONFIG_SAMA5_SSC_REGDEBUG
 #  undef CONFIG_SAMA5_SSC_QDEBUG
@@ -413,22 +408,6 @@
 #  undef CONFIG_SAMA5_SSC_DMADEBUG
 #endif
 
-#ifdef CONFIG_DEBUG_I2S
-#  define i2sdbg         dbg
-#  define i2slldbg       lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define i2svdbg      dbg
-#    define i2sllvdbg    lldbg
-#  else
-#    define i2svdbg(x...)
-#  endif
-#else
-#  define i2sdbg(x...)
-#  define i2slldbg(x...)
-#  define i2svdbg(x...)
-#  define i2sllvdbg(x...)
-#endif
-
 #define DMA_INITIAL      0
 #define DMA_AFTER_SETUP  1
 #define DMA_AFTER_START  2
@@ -476,7 +455,7 @@ struct sam_ssc_s
   uintptr_t base;              /* SSC controller register base address */
   sem_t exclsem;               /* Assures mutually exclusive acess to SSC */
   uint8_t datalen;             /* Data width (8, 16, or 32) */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   uint8_t align;               /* Log2 of data width (0, 1, or 3) */
 #endif
   uint8_t pid;                 /* Peripheral ID */
@@ -539,7 +518,7 @@ static inline void ssc_putreg(struct sam_ssc_s *priv, unsigned int offset,
 static inline uintptr_t ssc_physregaddr(struct sam_ssc_s *priv,
                   unsigned int offset);
 
-#if defined(CONFIG_DEBUG_I2S) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_I2S_INFO
 static void     scc_dump_regs(struct sam_ssc_s *priv, const char *msg);
 #else
 #  define       scc_dump_regs(s,m)
@@ -724,7 +703,7 @@ static bool ssc_checkreg(struct sam_ssc_s *priv, bool wr, uint32_t regval,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", priv->count);
+          i2sinfo("...[Repeats %d times]...\n", priv->count);
         }
 
       /* Save information about the new access */
@@ -758,7 +737,7 @@ static inline uint32_t ssc_getreg(struct sam_ssc_s *priv,
 #ifdef CONFIG_SAMA5_SSC_REGDEBUG
   if (ssc_checkreg(priv, false, regval, regaddr))
     {
-      lldbg("%08x->%08x\n", regaddr, regval);
+      i2sinfo("%08x->%08x\n", regaddr, regval);
     }
 #endif
 
@@ -781,7 +760,7 @@ static inline void ssc_putreg(struct sam_ssc_s *priv, unsigned int offset,
 #ifdef CONFIG_SAMA5_SSC_REGDEBUG
   if (ssc_checkreg(priv, true, regval, regaddr))
     {
-      lldbg("%08x<-%08x\n", regaddr, regval);
+      i2sinfo("%08x<-%08x\n", regaddr, regval);
     }
 #endif
 
@@ -817,21 +796,21 @@ static inline uintptr_t ssc_physregaddr(struct sam_ssc_s *priv,
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_I2S) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_I2S_INFO
 static void scc_dump_regs(struct sam_ssc_s *priv, const char *msg)
 {
-  i2svdbg("SSC%d: %s\n", priv->sscno, msg);
-  i2svdbg("   CMR:%08x RCMR:%08x RFMR:%08x TCMR:%08x\n",
+  i2sinfo("SSC%d: %s\n", priv->sscno, msg);
+  i2sinfo("   CMR:%08x RCMR:%08x RFMR:%08x TCMR:%08x\n",
           getreg32(priv->base + SAM_SSC_CMR_OFFSET),
           getreg32(priv->base + SAM_SSC_RCMR_OFFSET),
           getreg32(priv->base + SAM_SSC_RFMR_OFFSET),
           getreg32(priv->base + SAM_SSC_TCMR_OFFSET));
-  i2svdbg("  TFMR:%08x RC0R:%08x RC1R:%08x   SR:%08x\n",
+  i2sinfo("  TFMR:%08x RC0R:%08x RC1R:%08x   SR:%08x\n",
           getreg32(priv->base + SAM_SSC_TFMR_OFFSET),
           getreg32(priv->base + SAM_SSC_RC0R_OFFSET),
           getreg32(priv->base + SAM_SSC_RC1R_OFFSET),
           getreg32(priv->base + SAM_SSC_SR_OFFSET));
-  i2svdbg("   IMR:%08x WPMR:%08x WPSR:%08x\n",
+  i2sinfo("   IMR:%08x WPMR:%08x WPSR:%08x\n",
           getreg32(priv->base + SAM_SSC_IMR_OFFSET),
           getreg32(priv->base + SAM_SSC_WPMR_OFFSET),
           getreg32(priv->base + SAM_SSC_WPSR_OFFSET));
@@ -868,12 +847,12 @@ static void ssc_dump_queue(sq_queue_t *queue)
 
       if (!apb)
         {
-          i2sllvdbg("    %p: No buffer\n", bfcontainer);
+          i2sinfo("    %p: No buffer\n", bfcontainer);
         }
       else
         {
-          i2sllvdbg("    %p: buffer=%p nmaxbytes=%d nbytes=%d\n",
-                    bfcontainer, apb, apb->nmaxbytes, apb->nbytes);
+          i2sinfo("    %p: buffer=%p nmaxbytes=%d nbytes=%d\n",
+                  bfcontainer, apb, apb->nmaxbytes, apb->nbytes);
         }
     }
 }
@@ -883,12 +862,12 @@ static void ssc_dump_queues(struct sam_transport_s *xpt, const char *msg)
   irqstate_t flags;
 
   flags = enter_critical_section();
-  i2sllvdbg("%s\n", msg);
-  i2sllvdbg("  Pending:\n");
+  i2sinfo("%s\n", msg);
+  i2sinfo("  Pending:\n");
   ssc_dump_queue(&xpt->pend);
-  i2sllvdbg("  Active:\n");
+  i2sinfo("  Active:\n");
   ssc_dump_queue(&xpt->act);
-  i2sllvdbg("  Done:\n");
+  i2sinfo("  Done:\n");
   ssc_dump_queue(&xpt->done);
   leave_critical_section(flags);
 }
@@ -1111,7 +1090,7 @@ static void ssc_dma_sampleinit(struct sam_ssc_s *priv,
 #if defined(CONFIG_SAMA5_SSC_DMADEBUG) && defined(SSC_HAVE_RX)
 static void ssc_rxdma_sampledone(struct sam_ssc_s *priv, int result)
 {
-  lldbg("result: %d\n", result);
+  i2sinfo("result: %d\n", result);
 
   /* Sample the final registers */
 
@@ -1176,7 +1155,7 @@ static void ssc_rxdma_sampledone(struct sam_ssc_s *priv, int result)
 #if defined(CONFIG_SAMA5_SSC_DMADEBUG) && defined(SSC_HAVE_TX)
 static void ssc_txdma_sampledone(struct sam_ssc_s *priv, int result)
 {
-  lldbg("result: %d\n", result);
+  i2sinfo("result: %d\n", result);
 
   /* Sample the final registers */
 
@@ -1398,7 +1377,7 @@ static int ssc_rxdma_setup(struct sam_ssc_s *priv)
 
       if (ret < 0)
         {
-          i2slldbg("ERROR: wd_start failed: %d\n", errno);
+          i2serr("ERROR: wd_start failed: %d\n", errno);
         }
     }
 
@@ -1447,7 +1426,7 @@ static void ssc_rx_worker(void *arg)
    * So we have to start the next DMA here.
    */
 
-  i2svdbg("rx.act.head=%p rx.done.head=%p\n",
+  i2sinfo("rx.act.head=%p rx.done.head=%p\n",
           priv->rx.act.head, priv->rx.done.head);
   ssc_dump_rxqueues(priv, "RX worker start");
 
@@ -1586,7 +1565,7 @@ static void ssc_rx_schedule(struct sam_ssc_s *priv, int result)
       ret = work_queue(HPWORK, &priv->rx.work, ssc_rx_worker, priv, 0);
       if (ret != 0)
         {
-          i2slldbg("ERROR: Failed to queue RX work: %d\n", ret);
+          i2serr("ERROR: Failed to queue RX work: %d\n", ret);
         }
     }
 }
@@ -1811,7 +1790,7 @@ static int ssc_txdma_setup(struct sam_ssc_s *priv)
 
       if (ret < 0)
         {
-          i2slldbg("ERROR: wd_start failed: %d\n", errno);
+          i2serr("ERROR: wd_start failed: %d\n", errno);
         }
     }
 
@@ -1859,7 +1838,7 @@ static void ssc_tx_worker(void *arg)
    * So we have to start the next DMA here.
    */
 
-  i2svdbg("tx.act.head=%p tx.done.head=%p\n",
+  i2sinfo("tx.act.head=%p tx.done.head=%p\n",
            priv->tx.act.head, priv->tx.done.head);
   ssc_dump_txqueues(priv, "TX worker start");
 
@@ -1986,7 +1965,7 @@ static void ssc_tx_schedule(struct sam_ssc_s *priv, int result)
       ret = work_queue(HPWORK, &priv->tx.work, ssc_tx_worker, priv, 0);
       if (ret != 0)
         {
-          i2slldbg("ERROR: Failed to queue TX work: %d\n", ret);
+          i2serr("ERROR: Failed to queue TX work: %d\n", ret);
         }
     }
 }
@@ -2059,25 +2038,25 @@ static int ssc_checkwidth(struct sam_ssc_s *priv, int bits)
   switch (bits)
     {
     case 8:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       priv->align = 0;
 #endif
       break;
 
     case 16:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       priv->align = 1;
 #endif
       break;
 
     case 32:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       priv->align = 3;
 #endif
       break;
 
     default:
-      i2sdbg("ERROR: Unsupported or invalid data width: %d\n", bits);
+      i2serr("ERROR: Unsupported or invalid data width: %d\n", bits);
       return (bits < 2 || bits > 32) ? -EINVAL : -ENOSYS;
     }
 
@@ -2155,7 +2134,7 @@ static uint32_t ssc_rxdatawidth(struct i2s_dev_s *dev, int bits)
   ret = ssc_checkwidth(priv, bits);
   if (ret < 0)
     {
-      i2sdbg("ERROR: ssc_checkwidth failed: %d\n", ret);
+      i2serr("ERROR: ssc_checkwidth failed: %d\n", ret);
       return 0;
     }
 
@@ -2164,7 +2143,7 @@ static uint32_t ssc_rxdatawidth(struct i2s_dev_s *dev, int bits)
   ret = ssc_dma_flags(priv, &dmaflags);
   if (ret < 0)
     {
-      i2sdbg("ERROR: ssc_dma_flags failed: %d\n", ret);
+      i2serr("ERROR: ssc_dma_flags failed: %d\n", ret);
       return 0;
     }
 
@@ -2234,7 +2213,7 @@ static int ssc_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
 #endif
 
   DEBUGASSERT(priv && apb && ((uintptr_t)apb->samp & priv->align) == 0);
-  i2svdbg("apb=%p nmaxbytes=%d arg=%p timeout=%d\n",
+  i2sinfo("apb=%p nmaxbytes=%d arg=%p timeout=%d\n",
           apb, apb->nmaxbytes, arg, timeout);
 
   ssc_init_buffer(apb->samp, apb->nmaxbytes);
@@ -2253,7 +2232,7 @@ static int ssc_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
 
   if (!priv->rxenab)
     {
-      i2sdbg("ERROR: SSC%d has no receiver\n", priv->sscno);
+      i2serr("ERROR: SSC%d has no receiver\n", priv->sscno);
       ret = -EAGAIN;
       goto errout_with_exclsem;
     }
@@ -2292,7 +2271,7 @@ errout_with_exclsem:
   return ret;
 
 #else
-  i2sdbg("ERROR: SSC%d has no receiver\n", priv->sscno);
+  i2serr("ERROR: SSC%d has no receiver\n", priv->sscno);
   UNUSED(priv);
   return -ENOSYS;
 #endif
@@ -2366,7 +2345,7 @@ static uint32_t ssc_txdatawidth(struct i2s_dev_s *dev, int bits)
   ret = ssc_checkwidth(priv, bits);
   if (ret < 0)
     {
-      i2sdbg("ERROR: ssc_checkwidth failed: %d\n", ret);
+      i2serr("ERROR: ssc_checkwidth failed: %d\n", ret);
       return 0;
     }
 
@@ -2375,7 +2354,7 @@ static uint32_t ssc_txdatawidth(struct i2s_dev_s *dev, int bits)
   ret = ssc_dma_flags(priv, &dmaflags);
   if (ret < 0)
     {
-      i2sdbg("ERROR: ssc_dma_flags failed: %d\n", ret);
+      i2serr("ERROR: ssc_dma_flags failed: %d\n", ret);
       return 0;
     }
 
@@ -2449,7 +2428,7 @@ static int ssc_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
    */
 
   DEBUGASSERT(priv && apb);
-  i2svdbg("apb=%p nbytes=%d arg=%p timeout=%d\n",
+  i2sinfo("apb=%p nbytes=%d arg=%p timeout=%d\n",
           apb, apb->nbytes - apb->curbyte, arg, timeout);
 
   ssc_dump_buffer("Sending", &apb->samp[apb->curbyte],
@@ -2470,7 +2449,7 @@ static int ssc_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
 
   if (!priv->txenab)
     {
-      i2sdbg("ERROR: SSC%d has no transmitter\n", priv->sscno);
+      i2serr("ERROR: SSC%d has no transmitter\n", priv->sscno);
       ret = -EAGAIN;
       goto errout_with_exclsem;
     }
@@ -2509,7 +2488,7 @@ errout_with_exclsem:
   return ret;
 
 #else
-  i2sdbg("ERROR: SSC%d has no transmitter\n", priv->sscno);
+  i2serr("ERROR: SSC%d has no transmitter\n", priv->sscno);
   UNUSED(priv);
   return -ENOSYS;
 #endif
@@ -2563,7 +2542,7 @@ static int ssc_rx_configure(struct sam_ssc_s *priv)
 
     case SSC_CLKSRC_NONE: /* No clock */
     default:
-      i2sdbg("ERROR:  No receiver clock\n");
+      i2serr("ERROR:  No receiver clock\n");
       return -EINVAL;
     }
 
@@ -2584,7 +2563,7 @@ static int ssc_rx_configure(struct sam_ssc_s *priv)
       break;
 
     default:
-      i2sdbg("ERROR: Invalid clock output selection\n");
+      i2serr("ERROR: Invalid clock output selection\n");
       return -EINVAL;
     }
 
@@ -2688,7 +2667,7 @@ static int ssc_tx_configure(struct sam_ssc_s *priv)
 
     case SSC_CLKSRC_NONE: /* No clock */
     default:
-      i2sdbg("ERROR:  No transmitter clock\n");
+      i2serr("ERROR:  No transmitter clock\n");
       return -EINVAL;
     }
 
@@ -2709,7 +2688,7 @@ static int ssc_tx_configure(struct sam_ssc_s *priv)
       break;
 
     default:
-      i2sdbg("ERROR: Invalid clock output selection\n");
+      i2serr("ERROR: Invalid clock output selection\n");
       return -EINVAL;
     }
 
@@ -2929,7 +2908,7 @@ static void ssc_clocking(struct sam_ssc_s *priv)
 
   sam_enableperiph1(priv->pid);
 
-  i2svdbg("PCSR1=%08x PCR=%08x CMR=%08x\n",
+  i2sinfo("PCSR1=%08x PCR=%08x CMR=%08x\n",
           getreg32(SAM_PMC_PCSR1), regval,
           ssc_getreg(priv, SAM_SSC_CMR_OFFSET));
 }
@@ -2968,7 +2947,7 @@ static int ssc_dma_flags(struct sam_ssc_s *priv, uint32_t *dmaflags)
       break;
 
     default:
-      i2sdbg("ERROR: Unsupported data width: %d\n", priv->datalen);
+      i2serr("ERROR: Unsupported data width: %d\n", priv->datalen);
       return -ENOSYS;
     }
 
@@ -3001,7 +2980,7 @@ static int ssc_dma_allocate(struct sam_ssc_s *priv)
   ret = ssc_dma_flags(priv, &dmaflags);
   if (ret < 0)
     {
-      i2sdbg("ERROR: ssc_dma_flags failed: %d\n", ret);
+      i2serr("ERROR: ssc_dma_flags failed: %d\n", ret);
       return ret;
     }
 
@@ -3018,7 +2997,7 @@ static int ssc_dma_allocate(struct sam_ssc_s *priv)
       priv->rx.dma = sam_dmachannel(priv->sscno, dmaflags);
       if (!priv->rx.dma)
         {
-          i2sdbg("ERROR: Failed to allocate the RX DMA channel\n");
+          i2serr("ERROR: Failed to allocate the RX DMA channel\n");
           goto errout;
         }
 
@@ -3027,7 +3006,7 @@ static int ssc_dma_allocate(struct sam_ssc_s *priv)
       priv->rx.dog = wd_create();
       if (!priv->rx.dog)
         {
-          i2sdbg("ERROR: Failed to create the RX DMA watchdog\n");
+          i2serr("ERROR: Failed to create the RX DMA watchdog\n");
           goto errout;
         }
     }
@@ -3041,7 +3020,7 @@ static int ssc_dma_allocate(struct sam_ssc_s *priv)
       priv->tx.dma = sam_dmachannel(priv->sscno, dmaflags);
       if (!priv->tx.dma)
         {
-          i2sdbg("ERROR: Failed to allocate the TX DMA channel\n");
+          i2serr("ERROR: Failed to allocate the TX DMA channel\n");
           goto errout;
         }
 
@@ -3050,7 +3029,7 @@ static int ssc_dma_allocate(struct sam_ssc_s *priv)
       priv->tx.dog = wd_create();
       if (!priv->tx.dog)
         {
-          i2sdbg("ERROR: Failed to create the TX DMA watchdog\n");
+          i2serr("ERROR: Failed to create the TX DMA watchdog\n");
           goto errout;
         }
     }
@@ -3257,7 +3236,7 @@ static void ssc0_configure(struct sam_ssc_s *priv)
 
   priv->base    = SAM_SSC0_VBASE;
   priv->datalen = CONFIG_SAMA5_SSC0_DATALEN;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   priv->align   = SAMA5_SSC0_DATAMASK;
 #endif
   priv->pid     = SAM_PID_SSC0;
@@ -3398,7 +3377,7 @@ static void ssc1_configure(struct sam_ssc_s *priv)
 
   priv->base    = SAM_SSC1_VBASE;
   priv->datalen = CONFIG_SAMA5_SSC1_DATALEN;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   priv->align   = SAMA5_SSC1_DATAMASK;
 #endif
   priv->pid     = SAM_PID_SSC1;
@@ -3431,7 +3410,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port)
 
   /* The support SAM parts have only a single SSC port */
 
-  i2svdbg("port: %d\n", port);
+  i2sinfo("port: %d\n", port);
 
   /* Allocate a new state structure for this chip select.  NOTE that there
    * is no protection if the same chip select is used in two different
@@ -3441,7 +3420,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port)
   priv = (struct sam_ssc_s *)zalloc(sizeof(struct sam_ssc_s));
   if (!priv)
     {
-      i2sdbg("ERROR: Failed to allocate a chip select structure\n");
+      i2serr("ERROR: Failed to allocate a chip select structure\n");
       return NULL;
     }
 
@@ -3475,7 +3454,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port)
   else
 #endif /* CONFIG_SAMA5_SSC1 */
     {
-      i2sdbg("ERROR:  Unsupported I2S port: %d\n", port);
+      i2serr("ERROR:  Unsupported I2S port: %d\n", port);
       goto errout_with_alloc;
     }
 
@@ -3496,7 +3475,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port)
   ret = ssc_rx_configure(priv);
   if (ret < 0)
     {
-      i2sdbg("ERROR: Failed to configure the receiver: %d\n", ret);
+      i2serr("ERROR: Failed to configure the receiver: %d\n", ret);
       goto errout_with_clocking;
     }
 
@@ -3505,7 +3484,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port)
   ret = ssc_tx_configure(priv);
   if (ret < 0)
     {
-      i2sdbg("ERROR: Failed to configure the transmitter: %d\n", ret);
+      i2serr("ERROR: Failed to configure the transmitter: %d\n", ret);
       goto errout_with_clocking;
     }
 
diff --git a/arch/arm/src/sama5/sam_tc.c b/arch/arm/src/sama5/sam_tc.c
index 54cf71242c3205afb57c264d3779d9cf94fb3cfe..015d6bc96a5958a97d4a79b96de254631bf1fa5b 100644
--- a/arch/arm/src/sama5/sam_tc.c
+++ b/arch/arm/src/sama5/sam_tc.c
@@ -75,6 +75,10 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
+#ifndef CONFIG_DEBUG_TIMER_INFO
+#  undef CONFIG_SAMA5_TC_REGDEBUG
+#endif
+
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -171,13 +175,13 @@ static inline void sam_chan_putreg(struct sam_chan_s *chan,
 
 static int sam_tc_interrupt(struct sam_tc_s *tc);
 #ifdef CONFIG_SAMA5_TC0
-static int sam_tc012_interrupt(int irq, void *context);
+static int sam_tc012_interrupt(int irq, void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_SAMA5_TC1
-static int sam_tc345_interrupt(int irq, void *context);
+static int sam_tc345_interrupt(int irq, void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_SAMA5_TC2
-static int sam_tc678_interrupt(int irq, void *context);
+static int sam_tc678_interrupt(int irq, void *context, FAR void *arg);
 #endif
 
 /* Initialization ***********************************************************/
@@ -501,20 +505,20 @@ static void sam_regdump(struct sam_chan_s *chan, const char *msg)
   uintptr_t base;
 
   base = tc->base;
-  lldbg("TC%d [%08x]: %s\n", tc->tc, (int)base, msg);
-  lldbg("  BMR: %08x QIMR: %08x QISR: %08x WPMR: %08x\n",
+  tminfo("TC%d [%08x]: %s\n", tc->tc, (int)base, msg);
+  tminfo("  BMR: %08x QIMR: %08x QISR: %08x WPMR: %08x\n",
         getreg32(base+SAM_TC_BMR_OFFSET), getreg32(base+SAM_TC_QIMR_OFFSET),
         getreg32(base+SAM_TC_QISR_OFFSET), getreg32(base+SAM_TC_WPMR_OFFSET));
 
   base = chan->base;
-  lldbg("TC%d Channel %d [%08x]: %s\n", tc->tc, chan->chan, (int)base, msg);
-  lldbg("  CMR: %08x SSMR: %08x  RAB: %08x   CV: %08x\n",
+  tminfo("TC%d Channel %d [%08x]: %s\n", tc->tc, chan->chan, (int)base, msg);
+  tminfo("  CMR: %08x SSMR: %08x  RAB: %08x   CV: %08x\n",
         getreg32(base+SAM_TC_CMR_OFFSET), getreg32(base+SAM_TC_SMMR_OFFSET),
         getreg32(base+SAM_TC_RAB_OFFSET), getreg32(base+SAM_TC_CV_OFFSET));
-  lldbg("   RA: %08x   RB: %08x   RC: %08x   SR: %08x\n",
+  tminfo("   RA: %08x   RB: %08x   RC: %08x   SR: %08x\n",
         getreg32(base+SAM_TC_RA_OFFSET), getreg32(base+SAM_TC_RB_OFFSET),
         getreg32(base+SAM_TC_RC_OFFSET), getreg32(base+SAM_TC_SR_OFFSET));
-  lldbg("  IMR: %08x\n",
+  tminfo("  IMR: %08x\n",
         getreg32(base+SAM_TC_IMR_OFFSET));
 }
 #endif
@@ -558,7 +562,7 @@ static bool sam_checkreg(struct sam_tc_s *tc, bool wr, uint32_t regaddr,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", tc->ntimes);
+          tmrinfo("...[Repeats %d times]...\n", tc->ntimes);
         }
 
       /* Save information about the new access */
@@ -593,7 +597,7 @@ static inline uint32_t sam_tc_getreg(struct sam_chan_s *chan,
 #ifdef CONFIG_SAMA5_TC_REGDEBUG
   if (sam_checkreg(tc, false, regaddr, regval))
     {
-      lldbg("%08x->%08x\n", regaddr, regval);
+      tmrinfo("%08x->%08x\n", regaddr, regval);
     }
 #endif
 
@@ -617,7 +621,7 @@ static inline void sam_tc_putreg(struct sam_chan_s *chan, uint32_t regval,
 #ifdef CONFIG_SAMA5_TC_REGDEBUG
   if (sam_checkreg(tc, true, regaddr, regval))
     {
-      lldbg("%08x<-%08x\n", regaddr, regval);
+      tmrinfo("%08x<-%08x\n", regaddr, regval);
     }
 #endif
 
@@ -641,7 +645,7 @@ static inline uint32_t sam_chan_getreg(struct sam_chan_s *chan,
 #ifdef CONFIG_SAMA5_TC_REGDEBUG
   if (sam_checkreg(chan->tc, false, regaddr, regval))
     {
-      lldbg("%08x->%08x\n", regaddr, regval);
+      tmrinfo("%08x->%08x\n", regaddr, regval);
     }
 #endif
 
@@ -664,7 +668,7 @@ static inline void sam_chan_putreg(struct sam_chan_s *chan, unsigned int offset,
 #ifdef CONFIG_SAMA5_TC_REGDEBUG
   if (sam_checkreg(chan->tc, true, regaddr, regval))
     {
-      lldbg("%08x<-%08x\n", regaddr, regval);
+      tmrinfo("%08x<-%08x\n", regaddr, regval);
     }
 #endif
 
@@ -759,21 +763,21 @@ static int sam_tc_interrupt(struct sam_tc_s *tc)
  ****************************************************************************/
 
 #ifdef CONFIG_SAMA5_TC0
-static int sam_tc012_interrupt(int irq, void *context)
+static int sam_tc012_interrupt(int irq, void *context, void *arg)
 {
   return sam_tc_interrupt(&g_tc012);
 }
 #endif
 
 #ifdef CONFIG_SAMA5_TC1
-static int sam_tc345_interrupt(int irq, void *context)
+static int sam_tc345_interrupt(int irq, void *context, FAR void *arg)
 {
   return sam_tc_interrupt(&g_tc345);
 }
 #endif
 
 #ifdef CONFIG_SAMA5_TC2
-static int sam_tc678_interrupt(int irq, void *context)
+static int sam_tc678_interrupt(int irq, void *context, FAR void *arg)
 {
   return sam_tc_interrupt(&g_tc678);
 }
@@ -953,7 +957,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
     {
       /* Timer/counter is not invalid or not enabled */
 
-      tcdbg("ERROR: Bad channel number: %d\n", channel);
+      tmrerr("ERROR: Bad channel number: %d\n", channel);
       return NULL;
     }
 
@@ -976,7 +980,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
 
       for (i = 0, ch = tcconfig->chfirst; i < SAM_TC_NCHANNELS; i++)
         {
-          tcdbg("Initializing TC%d channel %d\n", tcconfig->tc, ch);
+          tmrerr("ERROR: Initializing TC%d channel %d\n", tcconfig->tc, ch);
 
           /* Initialize the channel data structure */
 
@@ -1034,7 +1038,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
 
       /* Attach the timer interrupt handler and enable the timer interrupts */
 
-      (void)irq_attach(tc->pid, handler);
+      (void)irq_attach(tc->pid, handler, NULL);
       up_enable_irq(tc->pid);
 
       /* Now the channel is initialized */
@@ -1057,7 +1061,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
     {
       /* No.. return a failure */
 
-      tcdbg("Channel %d is in-used\n", channel);
+      tmrerr("ERROR: Channel %d is in-use\n", channel);
       sam_givesem(tc);
       return NULL;
     }
@@ -1102,7 +1106,7 @@ TC_HANDLE sam_tc_allocate(int channel, int mode)
    * access to the requested channel.
    */
 
-  tcvdbg("channel=%d mode=%08x\n", channel, mode);
+  tmrinfo("channel=%d mode=%08x\n", channel, mode);
 
   chan = sam_tc_initialize(channel);
   if (chan)
@@ -1128,7 +1132,7 @@ TC_HANDLE sam_tc_allocate(int channel, int mode)
 
   /* Return an opaque reference to the channel */
 
-  tcvdbg("Returning %p\n", chan);
+  tmrinfo("Returning %p\n", chan);
   return (TC_HANDLE)chan;
 }
 
@@ -1150,7 +1154,7 @@ void sam_tc_free(TC_HANDLE handle)
 {
   struct sam_chan_s *chan = (struct sam_chan_s *)handle;
 
-  tcvdbg("Freeing %p channel=%d inuse=%d\n", chan, chan->chan, chan->inuse);
+  tmrinfo("Freeing %p channel=%d inuse=%d\n", chan, chan->chan, chan->inuse);
   DEBUGASSERT(chan && chan->inuse);
 
   /* Make sure that interrupts are detached and disabled and that the channel
@@ -1183,7 +1187,7 @@ void sam_tc_start(TC_HANDLE handle)
 {
   struct sam_chan_s *chan = (struct sam_chan_s *)handle;
 
-  tcvdbg("Starting channel %d inuse=%d\n", chan->chan, chan->inuse);
+  tmrinfo("Starting channel %d inuse=%d\n", chan->chan, chan->inuse);
   DEBUGASSERT(chan && chan->inuse);
 
   /* Read the SR to clear any pending interrupts on this channel */
@@ -1215,7 +1219,7 @@ void sam_tc_stop(TC_HANDLE handle)
 {
   struct sam_chan_s *chan = (struct sam_chan_s *)handle;
 
-  tcvdbg("Stopping channel %d inuse=%d\n", chan->chan, chan->inuse);
+  tmrinfo("Stopping channel %d inuse=%d\n", chan->chan, chan->inuse);
   DEBUGASSERT(chan && chan->inuse);
 
   sam_chan_putreg(chan, SAM_TC_CCR_OFFSET, TC_CCR_CLKDIS);
@@ -1322,8 +1326,8 @@ void sam_tc_setregister(TC_HANDLE handle, int regid, uint32_t regval)
 
   DEBUGASSERT(chan && regid < TC_NREGISTERS);
 
-  tcvdbg("Channel %d: Set register RC%d to %08lx\n",
-         chan->chan, regid, (unsigned long)regval);
+  tmrinfo("Channel %d: Set register RC%d to %08lx\n",
+          chan->chan, regid, (unsigned long)regval);
 
   sam_chan_putreg(chan, g_regoffset[regid], regval);
   sam_regdump(chan, "Set register");
@@ -1465,7 +1469,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
   uint32_t ftcin = sam_tc_infreq();
   int ndx = 0;
 
-  tcvdbg("frequency=%d\n", frequency);
+  tmrinfo("frequency=%d\n", frequency);
 
   /* Satisfy lower bound.  That is, the value of the divider such that:
    *
@@ -1478,7 +1482,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
         {
           /* If no divisor can be found, return -ERANGE */
 
-          tcdbg("Lower bound search failed\n");
+          tmrerr("ERROR: Lower bound search failed\n");
           return -ERANGE;
         }
     }
@@ -1502,7 +1506,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
   if (div)
     {
       uint32_t value = sam_tc_freqdiv_lookup(ftcin, ndx);
-      tcvdbg("return div=%lu\n", (unsigned long)value);
+      tmrinfo("return div=%lu\n", (unsigned long)value);
       *div = value;
     }
 
@@ -1510,7 +1514,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
 
   if (tcclks)
     {
-      tcvdbg("return tcclks=%08lx\n", (unsigned long)TC_CMR_TCCLKS(ndx));
+      tmrinfo("return tcclks=%08lx\n", (unsigned long)TC_CMR_TCCLKS(ndx));
       *tcclks = TC_CMR_TCCLKS(ndx);
     }
 
diff --git a/arch/arm/src/sama5/sam_tc.h b/arch/arm/src/sama5/sam_tc.h
index 311f6d329f2d459a15c7e69c4764bc758bbc3fbf..4cf53f9cc801fb86d767bf1c127948a538cd8c79 100644
--- a/arch/arm/src/sama5/sam_tc.h
+++ b/arch/arm/src/sama5/sam_tc.h
@@ -74,8 +74,7 @@
 
 /* Timer debug is enabled if any timer client is enabled */
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_ANALOG
+#ifndef CONFIG_DEBUG_TIMER_INFO
 #  undef CONFIG_SAMA5_TC_REGDEBUG
 #endif
 
@@ -83,20 +82,6 @@
 #  define CONFIG_SAMA5_TC_DEBUG 1
 #endif
 
-/* Timer/counter debug output */
-
-#ifdef CONFIG_SAMA5_TC_DEBUG
-#  define tcdbg    dbg
-#  define tcvdbg   vdbg
-#  define tclldbg  lldbg
-#  define tcllvdbg llvdbg
-#else
-#  define tcdbg(x...)
-#  define tcvdbg(x...)
-#  define tclldbg(x...)
-#  define tcllvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Types
  ****************************************************************************/
diff --git a/arch/arm/src/sama5/sam_tickless.c b/arch/arm/src/sama5/sam_tickless.c
index 70cecb1217a24f80f2c51579f16b1d9c6518663c..bb3c6785613bb8c038372f177862ce408a1737df 100644
--- a/arch/arm/src/sama5/sam_tickless.c
+++ b/arch/arm/src/sama5/sam_tickless.c
@@ -39,7 +39,7 @@
  * is suppressed and the platform specific code is expected to provide the
  * following custom functions.
  *
- *   void up_timer_initialize(void): Initializes the timer facilities.  Called
+ *   void arm_timer_initialize(void): Initializes the timer facilities.  Called
  *     early in the initialization sequence (by up_intialize()).
  *   int up_timer_gettime(FAR struct timespec *ts):  Returns the current
  *     time from the platform specific time source.
@@ -209,7 +209,7 @@ static struct sam_tickless_s g_tickless;
 
 static void sam_oneshot_handler(void *arg)
 {
-  tcllvdbg("Expired...\n");
+  tmrinfo("Expired...\n");
   sched_timer_expiration();
 }
 
@@ -218,7 +218,7 @@ static void sam_oneshot_handler(void *arg)
  ****************************************************************************/
 
 /****************************************************************************
- * Name: up_timer_initialize
+ * Name: arm_timer_initialize
  *
  * Description:
  *   Initializes all platform-specific timer facilities.  This function is
@@ -242,7 +242,7 @@ static void sam_oneshot_handler(void *arg)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
 #ifdef CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP
   uint64_t max_delay;
@@ -256,7 +256,7 @@ void up_timer_initialize(void)
                                CONFIG_USEC_PER_TICK);
   if (ret < 0)
     {
-      tclldbg("ERROR: sam_oneshot_initialize failed\n");
+      tmrerr("ERROR: sam_oneshot_initialize failed\n");
       PANIC();
     }
 
@@ -268,7 +268,7 @@ void up_timer_initialize(void)
   ret = sam_oneshot_max_delay(&g_tickless.oneshot, &max_delay);
   if (ret < 0)
     {
-      tclldbg("ERROR: sam_oneshot_max_delay failed\n");
+      tmrerr("ERROR: sam_oneshot_max_delay failed\n");
       PANIC();
     }
 
@@ -292,7 +292,7 @@ void up_timer_initialize(void)
                                CONFIG_USEC_PER_TICK);
   if (ret < 0)
     {
-      tclldbg("ERROR: sam_freerun_initialize failed\n");
+      tmrerr("ERROR: sam_freerun_initialize failed\n");
       PANIC();
     }
 
@@ -304,7 +304,7 @@ void up_timer_initialize(void)
  *
  * Description:
  *   Return the elapsed time since power-up (or, more correctly, since
- *   up_timer_initialize() was called).  This function is functionally
+ *   arm_timer_initialize() was called).  This function is functionally
  *   equivalent to:
  *
  *      int clock_gettime(clockid_t clockid, FAR struct timespec *ts);
diff --git a/arch/arm/src/sama5/sam_timerisr.c b/arch/arm/src/sama5/sam_timerisr.c
index 3861b1217a3c71999d567b466c7418e1673fa12f..957c4efad2463147e77e4a399f1be8e4d4bc1f90 100644
--- a/arch/arm/src/sama5/sam_timerisr.c
+++ b/arch/arm/src/sama5/sam_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/sama5/sam_timerisr.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -76,19 +76,11 @@
 #define PIT_PIV ((PIT_CLOCK + (CLK_TCK >> 1)) / CLK_TCK)
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  sam_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -96,7 +88,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int sam_timerisr(int irq, uint32_t *regs, void *arg)
 {
   /* "When CPIV and PICNT values are obtained by reading the Periodic
    *  Interval Value Register (PIT_PIVR), the overflow counter (PICNT) is
@@ -118,7 +110,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -126,7 +122,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t regval;
 
@@ -140,7 +136,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(SAM_IRQ_PIT, (xcpt_t)up_timerisr);
+  (void)irq_attach(SAM_IRQ_PIT, (xcpt_t)sam_timerisr, NULL);
 
   /* Set the PIT overflow value (PIV), enable the PIT, and enable
    * interrupts from the PIT.
diff --git a/arch/arm/src/sama5/sam_trng.c b/arch/arm/src/sama5/sam_trng.c
index 1be5585bc4ba8f2eb22a1c90a58c59edb5e61f0e..fed9a347acfa3f90d9ece8a09b0e04ce9f372003 100644
--- a/arch/arm/src/sama5/sam_trng.c
+++ b/arch/arm/src/sama5/sam_trng.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/sama5/sam_trng.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Derives, in part, from Max Holtzberg's STM32 RNG Nuttx driver:
@@ -52,6 +52,9 @@
 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 #include "up_arch.h"
 #include "up_internal.h"
@@ -59,13 +62,16 @@
 #include "sam_periphclks.h"
 #include "sam_trng.h"
 
+#if defined(CONFIG_SAMA5_TRNG)
+#if defined(CONFIG_DEV_RANDOM) || defined(CONFIG_DEV_URANDOM_ARCH)
+
 /****************************************************************************
  * Private Function Prototypes
  ****************************************************************************/
 
 /* Interrupts */
 
-static int sam_interrupt(int irq, void *context);
+static int sam_interrupt(int irq, void *context, FAR void *arg);
 
 /* Character driver methods */
 
@@ -121,7 +127,7 @@ static const struct file_operations g_trngops =
  *
  ****************************************************************************/
 
-static int sam_interrupt(int irq, void *context)
+static int sam_interrupt(int irq, void *context, FAR void *arg)
 {
   uint32_t odata;
 
@@ -243,7 +249,7 @@ static ssize_t sam_read(struct file *filep, char *buffer, size_t buflen)
   ssize_t retval;
   int ret;
 
-  fvdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+  finfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
 
   /* Get exclusive access to the TRNG harware */
 
@@ -283,7 +289,7 @@ static ssize_t sam_read(struct file *filep, char *buffer, size_t buflen)
     {
       ret = sem_wait(&g_trngdev.waitsem);
 
-      fvdbg("Awakened: nsamples=%d maxsamples=%d ret=%d\n",
+      finfo("Awakened: nsamples=%d maxsamples=%d ret=%d\n",
             g_trngdev.nsamples, g_trngdev.maxsamples, ret);
 
       if (ret < 0)
@@ -320,19 +326,15 @@ errout:
 
   sem_post(&g_trngdev.exclsem);
 
-  fvdbg("Return %d\n", (int)retval);
+  finfo("Return %d\n", (int)retval);
   return retval;
 }
 
 /****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_rnginitialize
+ * Name: sam_rng_initialize
  *
  * Description:
- *   Initialize the TRNG hardware and register the /dev/randome driver.
+ *   Initialize the TRNG hardware.
  *
  * Input Parameters:
  *   None
@@ -342,28 +344,38 @@ errout:
  *
  ****************************************************************************/
 
-void up_rnginitialize(void)
+static int sam_rng_initialize(void)
 {
   int ret;
 
-  fvdbg("Initializing TRNG hardware\n");
+  finfo("Initializing TRNG hardware\n");
 
   /* Initialize the device structure */
 
   memset(&g_trngdev, 0, sizeof(struct trng_dev_s));
+
+  /* Initialize semphores */
+
   sem_init(&g_trngdev.exclsem, 0, 1);
   sem_init(&g_trngdev.waitsem, 0, 0);
 
+  /* The waitsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&g_trngdev.waitsem, SEM_PRIO_NONE);
+
   /* Enable clocking to the TRNG */
 
   sam_trng_enableclk();
 
   /* Initialize the TRNG interrupt */
 
-  if (irq_attach(SAM_IRQ_TRNG, sam_interrupt))
+  ret = irq_attach(SAM_IRQ_TRNG, sam_interrupt, NULL);
+  if (ret < 0)
     {
-      fdbg("ERROR: Failed to attach to IRQ%d\n", SAM_IRQ_TRNG);
-      return;
+      ferr("ERROR: Failed to attach to IRQ%d\n", SAM_IRQ_TRNG);
+      return ret;
     }
 
   /* Disable the interrupts at the TRNG */
@@ -374,16 +386,80 @@ void up_rnginitialize(void)
 
   putreg32(TRNG_CR_DISABLE | TRNG_CR_KEY, SAM_TRNG_CR);
 
-  /* Register the character driver */
+  /* Enable the TRNG interrupt at the AIC */
+
+  up_enable_irq(SAM_IRQ_TRNG);
+  return OK;
+}
 
-  ret = register_driver("/dev/random", &g_trngops, 0644, NULL);
-  if (ret < 0)
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: devrandom_register
+ *
+ * Description:
+ *   Initialize the TRNG hardware and register the /dev/random driver.
+ *   Must be called BEFORE devurandom_register.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEV_RANDOM
+void devrandom_register(void)
+{
+  int ret;
+
+  ret = sam_rng_initialize();
+  if (ret >= 0)
     {
-      fdbg("ERROR: Failed to register /dev/random\n");
-      return;
+      ret = register_driver("/dev/random", &g_trngops, 0644, NULL);
+      if (ret < 0)
+        {
+          ferr("ERROR: Failed to register /dev/random\n");
+        }
     }
+}
+#endif
 
-  /* Enable the TRNG interrupt at the AIC */
+/****************************************************************************
+ * Name: devurandom_register
+ *
+ * Description:
+ *   Register /dev/urandom
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
 
-  up_enable_irq(SAM_IRQ_TRNG);
+#ifdef CONFIG_DEV_URANDOM_ARCH
+void devurandom_register(void)
+{
+  int ret;
+
+#ifndef CONFIG_DEV_RANDOM
+  ret = sam_rng_initialize();
+  if (ret >= 0)
+#endif
+    {
+      ret = register_driver("/dev/urandom", &g_trngops, 0644, NULL);
+      if (ret < 0)
+        {
+          ferr("ERROR: Failed to register /dev/urandom\n");
+        }
+    }
 }
+#endif
+
+#endif /* CONFIG_DEV_RANDOM || CONFIG_DEV_URANDOM_ARCH */
+#endif /* CONFIG_SAMA5_TRNG */
diff --git a/arch/arm/src/sama5/sam_tsd.c b/arch/arm/src/sama5/sam_tsd.c
index 3bed567508bc02d54d2d4394da586eb8c1988697..403aa93f75186c09efa06203867ee842568877f2 100644
--- a/arch/arm/src/sama5/sam_tsd.c
+++ b/arch/arm/src/sama5/sam_tsd.c
@@ -66,6 +66,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -285,7 +286,7 @@ static void sam_tsd_notify(struct sam_tsd_s *priv)
       if (fds)
         {
           fds->revents |= POLLIN;
-          ivdbg("Report events: %02x\n", fds->revents);
+          iinfo("Report events: %02x\n", fds->revents);
           sem_post(fds->sem);
         }
     }
@@ -380,7 +381,7 @@ static int sam_tsd_waitsample(struct sam_tsd_s *priv, struct sam_sample_s *sampl
     {
       /* Wait for a sample data */
 
-      ivdbg("Waiting..\n");
+      iinfo("Waiting..\n");
       priv->nwaiters++;
       ret = sem_wait(&priv->waitsem);
       priv->nwaiters--;
@@ -391,14 +392,14 @@ static int sam_tsd_waitsample(struct sam_tsd_s *priv, struct sam_sample_s *sampl
            * the failure now.
            */
 
-          idbg("ERROR: sem_wait: %d\n", errno);
+          ierr("ERROR: sem_wait: %d\n", errno);
           DEBUGASSERT(errno == EINTR);
           ret = -EINTR;
           goto errout;
         }
     }
 
-  ivdbg("Sampled\n");
+  iinfo("Sampled\n");
 
   /* Re-acquire the semaphore that manages mutually exclusive access to
    * the device structure.  We may have to wait here.  But we have our sample.
@@ -538,7 +539,7 @@ static void sam_tsd_bottomhalf(void *arg)
 
   /* Handle the change from pen down to pen up */
 
-  ivdbg("pending: %08x pendown: %d contact: %d\n",
+  iinfo("pending: %08x pendown: %d contact: %d\n",
         pending, pendown, priv->sample.contact);
 
   if (!pendown)
@@ -644,7 +645,7 @@ static void sam_tsd_bottomhalf(void *arg)
 
       if (xraw == 0 || xraw >= xscale || yraw == 0 || yraw > yscale)
         {
-          idbg("Discarding: x %d:%d y %d:%d\n", xraw, xscale);
+          iwarn("WARNING: Discarding: x %d:%d y %d:%d\n", xraw, xscale);
           goto ignored;
         }
 
@@ -799,7 +800,7 @@ static int sam_tsd_schedule(struct sam_tsd_s *priv)
   ret = work_queue(HPWORK, &priv->work, sam_tsd_bottomhalf, priv, 0);
   if (ret != 0)
     {
-      illdbg("Failed to queue work: %d\n", ret);
+      ierr("ERROR: Failed to queue work: %d\n", ret);
     }
 
   return OK;
@@ -834,7 +835,7 @@ static int sam_tsd_open(struct file *filep)
   uint8_t tmp;
   int ret;
 
-  ivdbg("crefs: %d\n", priv->crefs);
+  iinfo("crefs: %d\n", priv->crefs);
 
   /* Get exclusive access to the device structures */
 
@@ -883,7 +884,7 @@ static int sam_tsd_close(struct file *filep)
   FAR struct inode *inode = filep->f_inode;
   FAR struct sam_tsd_s *priv = inode->i_private;
 
-  ivdbg("crefs: %d\n", priv->crefs);
+  iinfo("crefs: %d\n", priv->crefs);
 
   /* Get exclusive access to the ADC device */
 
@@ -919,7 +920,7 @@ static ssize_t sam_tsd_read(struct file *filep, char *buffer, size_t len)
   struct sam_sample_s sample;
   int ret;
 
-  ivdbg("buffer:%p len:%d\n", buffer, len);
+  iinfo("buffer:%p len:%d\n", buffer, len);
   DEBUGASSERT(filep);
   inode = filep->f_inode;
 
@@ -936,7 +937,7 @@ static ssize_t sam_tsd_read(struct file *filep, char *buffer, size_t len)
        * handle smaller reads... but why?
        */
 
-      idbg("ERROR: Unsupported read size: %d\n", len);
+      ierr("ERROR: Unsupported read size: %d\n", len);
       return -ENOSYS;
     }
 
@@ -954,7 +955,7 @@ static ssize_t sam_tsd_read(struct file *filep, char *buffer, size_t len)
        * option, then just return an error.
        */
 
-      ivdbg("Sample data is not available\n");
+      iinfo("Sample data is not available\n");
       if (filep->f_oflags & O_NONBLOCK)
         {
           ret = -EAGAIN;
@@ -968,7 +969,7 @@ static ssize_t sam_tsd_read(struct file *filep, char *buffer, size_t len)
         {
           /* We might have been awakened by a signal */
 
-          idbg("ERROR: sam_tsd_waitsample: %d\n", ret);
+          ierr("ERROR: sam_tsd_waitsample: %d\n", ret);
           goto errout;
         }
     }
@@ -1018,16 +1019,16 @@ static ssize_t sam_tsd_read(struct file *filep, char *buffer, size_t len)
       report->point[0].flags  = TSD_PENMOVE;
     }
 
-  ivdbg("  id:      %d\n", report->point[0].id);
-  ivdbg("  flags:   %02x\n", report->point[0].flags);
-  ivdbg("  x:       %d\n", report->point[0].x);
-  ivdbg("  y:       %d\n", report->point[0].y);
+  iinfo("  id:      %d\n", report->point[0].id);
+  iinfo("  flags:   %02x\n", report->point[0].flags);
+  iinfo("  x:       %d\n", report->point[0].x);
+  iinfo("  y:       %d\n", report->point[0].y);
 
   ret = SIZEOF_TOUCH_SAMPLE_S(1);
 
 errout:
   sam_adc_unlock(priv->adc);
-  ivdbg("Returning: %d\n", ret);
+  iinfo("Returning: %d\n", ret);
   return (ssize_t)ret;
 }
 
@@ -1041,7 +1042,7 @@ static int sam_tsd_ioctl(struct file *filep, int cmd, unsigned long arg)
   struct sam_tsd_s *priv;
   int ret;
 
-  ivdbg("cmd: %d arg: %ld\n", cmd, arg);
+  iinfo("cmd: %d arg: %ld\n", cmd, arg);
   DEBUGASSERT(filep);
   inode = filep->f_inode;
 
@@ -1077,7 +1078,7 @@ static int sam_tsd_poll(struct file *filep, struct pollfd *fds, bool setup)
   int ret = OK;
   int i;
 
-  ivdbg("setup: %d\n", (int)setup);
+  iinfo("setup: %d\n", (int)setup);
   DEBUGASSERT(filep && fds);
   inode = filep->f_inode;
 
@@ -1655,7 +1656,7 @@ int sam_tsd_register(struct sam_adc_s *adc, int minor)
   char devname[DEV_NAMELEN];
   int ret;
 
-  ivdbg("minor: %d\n", minor);
+  iinfo("minor: %d\n", minor);
 
   /* Debug-only sanity checks */
 
@@ -1669,17 +1670,22 @@ int sam_tsd_register(struct sam_adc_s *adc, int minor)
   priv->threshx = INVALID_THRESHOLD; /* Initialize thresholding logic */
   priv->threshy = INVALID_THRESHOLD; /* Initialize thresholding logic */
 
-  sem_init(&priv->waitsem, 0, 0);    /* Initialize pen event wait semaphore */
+  /* Initialize pen event wait semaphore.  This semaphore is used for
+   * signaling and, hence, should not have priority inheritance enabled.
+   */
+
+  sem_init(&priv->waitsem, 0, 0);
+  sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
 
   /* Register the device as an input device */
 
   (void)snprintf(devname, DEV_NAMELEN, DEV_FORMAT, minor);
-  ivdbg("Registering %s\n", devname);
+  iinfo("Registering %s\n", devname);
 
   ret = register_driver(devname, &g_tsdops, 0666, priv);
   if (ret < 0)
     {
-      idbg("ERROR: register_driver() failed: %d\n", ret);
+      ierr("ERROR: register_driver() failed: %d\n", ret);
       goto errout_with_priv;
     }
 
@@ -1724,7 +1730,7 @@ void sam_tsd_interrupt(uint32_t pending)
       ret = sam_tsd_schedule(priv);
       if (ret < 0)
         {
-          idbg("ERROR: sam_tsd_schedule failed: %d\n", ret);
+          ierr("ERROR: sam_tsd_schedule failed: %d\n", ret);
         }
     }
 }
diff --git a/arch/arm/src/sama5/sam_twi.c b/arch/arm/src/sama5/sam_twi.c
index 14df0f62a4219d3256436e87d7e80bd7eef11761..117f29b44516263c2761db8c14f5ba5844582dd4 100644
--- a/arch/arm/src/sama5/sam_twi.c
+++ b/arch/arm/src/sama5/sam_twi.c
@@ -57,6 +57,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -95,15 +96,19 @@
 #  define CONFIG_SAMA5_TWI3_FREQUENCY 100000
 #endif
 
+#ifndef CONFIG_DEBUG_I2C_INFO
+#  undef CONFIG_SAMA5_TWI_REGDEBUG
+#endif
+
 /* Driver internal definitions *************************************************/
-/* If verbose I2C debug output is enable, then allow more time before we declare
+/* If verbose I2C debug output is enabled, then allow more time before we declare
  * a timeout.  The debug output from twi_interrupt will really slow things down!
  *
  * With a very slow clock (say 100,000 Hz), less than 100 usec would be required
  * to transfer on byte.  So these define a "long" timeout.
  */
 
-#if defined(CONFIG_DEBUG_I2C) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_I2C_INFO
 #  define TWI_TIMEOUT_MSPB (50)  /* 50 msec/byte */
 #else
 #  define TWI_TIMEOUT_MSPB (5)   /* 5 msec/byte */
@@ -123,21 +128,6 @@
 #define MKI2C_INPUT(p)  (((p) & (PIO_PORT_MASK | PIO_PIN_MASK)) | I2C_INPUT)
 #define MKI2C_OUTPUT(p) (((p) & (PIO_PORT_MASK | PIO_PIN_MASK)) | I2C_OUTPUT)
 
-/* Debug ***********************************************************************/
-/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
-
-#ifdef CONFIG_DEBUG_I2C
-#  define i2cdbg    dbg
-#  define i2cvdbg   vdbg
-#  define i2clldbg  lldbg
-#  define i2cllvdbg llvdbg
-#else
-#  define i2cdbg(x...)
-#  define i2cvdbg(x...)
-#  define i2clldbg(x...)
-#  define i2cllvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -209,21 +199,9 @@ static inline void twi_putrel(struct twi_dev_s *priv, unsigned int offset,
 
 /* I2C transfer helper functions */
 
-static int twi_wait(struct twi_dev_s *priv, unsigned int size);
+static int  twi_wait(struct twi_dev_s *priv, unsigned int size);
 static void twi_wakeup(struct twi_dev_s *priv, int result);
-static int twi_interrupt(struct twi_dev_s *priv);
-#ifdef CONFIG_SAMA5_TWI0
-static int twi0_interrupt(int irq, FAR void *context);
-#endif
-#ifdef CONFIG_SAMA5_TWI1
-static int twi1_interrupt(int irq, FAR void *context);
-#endif
-#ifdef CONFIG_SAMA5_TWI2
-static int twi2_interrupt(int irq, FAR void *context);
-#endif
-#ifdef CONFIG_SAMA5_TWI3
-static int twi3_interrupt(int irq, FAR void *context);
-#endif
+static int  twi_interrupt(int irq, FAR void *context, FAR void *arg);
 static void twi_timeout(int argc, uint32_t arg, ...);
 
 static void twi_startread(struct twi_dev_s *priv, struct i2c_msg_s *msg);
@@ -256,7 +234,6 @@ static const struct twi_attr_s g_twi0attr =
   .sclcfg  = PIO_TWI0_CK,
   .sdacfg  = PIO_TWI0_D,
   .base    = SAM_TWI0_VBASE,
-  .handler = twi0_interrupt,
 };
 
 static struct twi_dev_s g_twi0;
@@ -271,7 +248,6 @@ static const struct twi_attr_s g_twi1attr =
   .sclcfg  = PIO_TWI1_CK,
   .sdacfg  = PIO_TWI1_D,
   .base    = SAM_TWI1_VBASE,
-  .handler = twi1_interrupt,
 };
 
 static struct twi_dev_s g_twi1;
@@ -286,7 +262,6 @@ static const struct twi_attr_s g_twi2attr =
   .sclcfg  = PIO_TWI2_CK,
   .sdacfg  = PIO_TWI2_D,
   .base    = SAM_TWI2_VBASE,
-  .handler = twi2_interrupt,
 };
 
 static struct twi_dev_s g_twi2;
@@ -301,7 +276,6 @@ static const struct twi_attr_s g_twi3attr =
   .sclcfg  = PIO_TWI3_CK,
   .sdacfg  = PIO_TWI3_D,
   .base    = SAM_TWI3_VBASE,
-  .handler = twi3_interrupt,
 };
 
 static struct twi_dev_s g_twi3;
@@ -384,7 +358,7 @@ static bool twi_checkreg(struct twi_dev_s *priv, bool wr, uint32_t value,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", priv->ntimes);
+          i2cinfo("...[Repeats %d times]...\n", priv->ntimes);
         }
 
       /* Save information about the new access */
@@ -416,7 +390,7 @@ static uint32_t twi_getabs(struct twi_dev_s *priv, uintptr_t address)
 
   if (twi_checkreg(priv, false, value, address))
     {
-      lldbg("%08x->%08x\n", address, value);
+      i2cinfo("%08x->%08x\n", address, value);
     }
 
   return value;
@@ -437,7 +411,7 @@ static void twi_putabs(struct twi_dev_s *priv, uintptr_t address,
 {
   if (twi_checkreg(priv, true, value, address))
     {
-      lldbg("%08x<-%08x\n", address, value);
+      i2cinfo("%08x<-%08x\n", address, value);
     }
 
   putreg32(value, address);
@@ -514,9 +488,9 @@ static int twi_wait(struct twi_dev_s *priv, unsigned int size)
 
   do
     {
-      i2cvdbg("TWI%d Waiting...\n", priv->attr->twi);
+      i2cinfo("TWI%d Waiting...\n", priv->attr->twi);
       twi_takesem(&priv->waitsem);
-      i2cvdbg("TWI%d Awakened with result: %d\n",
+      i2cinfo("TWI%d Awakened with result: %d\n",
               priv->attr->twi, priv->result);
     }
   while (priv->result == -EBUSY);
@@ -560,21 +534,24 @@ static void twi_wakeup(struct twi_dev_s *priv, int result)
  *
  ****************************************************************************/
 
-static int twi_interrupt(struct twi_dev_s *priv)
+static int twi_interrupt(int irq, FAR void *context, FAR void *arg)
 {
+  struct twi_dev_s *priv = (struct twi_dev_s *)arg;
   struct i2c_msg_s *msg;
   uint32_t sr;
   uint32_t imr;
   uint32_t pending;
   uint32_t regval;
 
+  DEBUGASSERT(priv != NULL);
+
   /* Retrieve masked interrupt status */
 
   sr      = twi_getrel(priv, SAM_TWI_SR_OFFSET);
   imr     = twi_getrel(priv, SAM_TWI_IMR_OFFSET);
   pending = sr & imr;
 
-  i2cllvdbg("TWI%d pending: %08x\n", priv->attr->twi, pending);
+  i2cinfo("TWI%d pending: %08x\n", priv->attr->twi, pending);
 
   /* Byte received */
 
@@ -670,41 +647,13 @@ static int twi_interrupt(struct twi_dev_s *priv)
     {
       /* Wake up the thread with an I/O error indication */
 
-      i2clldbg("ERROR: TWI%d pending: %08x\n", priv->attr->twi, pending);
+      i2cerr("ERROR: TWI%d pending: %08x\n", priv->attr->twi, pending);
       twi_wakeup(priv, -EIO);
     }
 
   return OK;
 }
 
-#ifdef CONFIG_SAMA5_TWI0
-static int twi0_interrupt(int irq, FAR void *context)
-{
-  return twi_interrupt(&g_twi0);
-}
-#endif
-
-#ifdef CONFIG_SAMA5_TWI1
-static int twi1_interrupt(int irq, FAR void *context)
-{
-  return twi_interrupt(&g_twi1);
-}
-#endif
-
-#ifdef CONFIG_SAMA5_TWI2
-static int twi2_interrupt(int irq, FAR void *context)
-{
-  return twi_interrupt(&g_twi2);
-}
-#endif
-
-#ifdef CONFIG_SAMA5_TWI3
-static int twi3_interrupt(int irq, FAR void *context)
-{
-  return twi_interrupt(&g_twi3);
-}
-#endif
-
 /****************************************************************************
  * Name: twi_timeout
  *
@@ -720,7 +669,7 @@ static void twi_timeout(int argc, uint32_t arg, ...)
 {
   struct twi_dev_s *priv = (struct twi_dev_s *)arg;
 
-  i2clldbg("ERROR: TWI%d Timeout!\n", priv->attr->twi);
+  i2cerr("ERROR: TWI%d Timeout!\n", priv->attr->twi);
   twi_wakeup(priv, -ETIMEDOUT);
 }
 
@@ -841,7 +790,7 @@ static int twi_transfer(FAR struct i2c_master_s *dev,
   int ret;
 
   DEBUGASSERT(dev != NULL && msgs != NULL && count > 0);
-  i2cvdbg("TWI%d count: %d\n", priv->attr->twi, count);
+  i2cinfo("TWI%d count: %d\n", priv->attr->twi, count);
 
   /* Calculate the total transfer size so that we can calculate a reasonable
    * timeout value.
@@ -887,7 +836,7 @@ static int twi_transfer(FAR struct i2c_master_s *dev,
   ret = twi_wait(priv, size);
   if (ret < 0)
     {
-      i2cdbg("ERROR: Transfer failed: %d\n", ret);
+      i2cerr("ERROR: Transfer failed: %d\n", ret);
     }
 
   leave_critical_section(flags);
@@ -1127,7 +1076,7 @@ static void twi_hw_initialize(struct twi_dev_s *priv, uint32_t frequency)
   uint32_t regval;
   uint32_t mck;
 
-  i2cvdbg("TWI%d Initializing\n", priv->attr->twi);
+  i2cinfo("TWI%d Initializing\n", priv->attr->twi);
 
   /* Configure PIO pins */
 
@@ -1228,7 +1177,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
   irqstate_t flags;
   int ret;
 
-  i2cvdbg("Initializing TWI%d\n", bus);
+  i2cinfo("Initializing TWI%d\n", bus);
 
 #ifdef CONFIG_SAMA5_TWI0
   if (bus == 0)
@@ -1287,7 +1236,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
   else
 #endif
     {
-      i2cdbg("ERROR: Unsupported bus: TWI%d\n", bus);
+      i2cerr("ERROR: Unsupported bus: TWI%d\n", bus);
       return NULL;
     }
 
@@ -1300,16 +1249,16 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
   priv->timeout = wd_create();
   if (priv->timeout == NULL)
     {
-      idbg("ERROR: Failed to allocate a timer\n");
+      ierr("ERROR: Failed to allocate a timer\n");
       goto errout_with_irq;
     }
 
   /* Attach Interrupt Handler */
 
-  ret = irq_attach(priv->attr->irq, priv->attr->handler);
+  ret = irq_attach(priv->attr->irq, twi_interrupt, priv);
   if (ret < 0)
     {
-      idbg("ERROR: Failed to attach irq %d\n", priv->attr->irq);
+      ierr("ERROR: Failed to attach irq %d\n", priv->attr->irq);
       goto errout_with_wdog;
     }
 
@@ -1317,9 +1266,17 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
 
   priv->dev.ops = &g_twiops;
 
+  /* Initialize semaphores */
+
   (void)sem_init(&priv->exclsem, 0, 1);
   (void)sem_init(&priv->waitsem, 0, 0);
 
+  /* The waitsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
+
   /* Perform repeatable TWI hardware initialization */
 
   twi_hw_initialize(priv, frequency);
@@ -1347,7 +1304,7 @@ int sam_i2cbus_uninitialize(FAR struct i2c_master_s *dev)
 {
   struct twi_dev_s *priv = (struct twi_dev_s *) dev;
 
-  i2cvdbg("TWI%d Un-initializing\n", priv->attr->twi);
+  i2cinfo("TWI%d Un-initializing\n", priv->attr->twi);
 
   /* Disable TWI interrupts */
 
diff --git a/arch/arm/src/sama5/sam_udphs.c b/arch/arm/src/sama5/sam_udphs.c
index 06c2cf2fed41d8f79cf8df99275d26d87b62238e..3f27bd311224c04f2f47e31e2c84549779486c9f 100644
--- a/arch/arm/src/sama5/sam_udphs.c
+++ b/arch/arm/src/sama5/sam_udphs.c
@@ -91,11 +91,7 @@
 #  define CONFIG_SAMA5_UDPHS_NDTDS 8
 #endif
 
-/* Extremely detailed register debug that you would normally never want
- * enabled.
- */
-
-#ifndef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB_INFO
 #  undef CONFIG_SAMA5_UDPHS_REGDEBUG
 #endif
 
@@ -452,7 +448,7 @@ static void   sam_setdevaddr(struct sam_usbdev_s *priv, uint8_t value);
 static void   sam_ep0_setup(struct sam_usbdev_s *priv);
 static void   sam_dma_interrupt(struct sam_usbdev_s *priv, int chan);
 static void   sam_ep_interrupt(struct sam_usbdev_s *priv, int epno);
-static int    sam_udphs_interrupt(int irq, void *context);
+static int    sam_udphs_interrupt(int irq, void *context, FAR void *arg);
 
 /* Endpoint helpers *********************************************************/
 
@@ -671,7 +667,7 @@ const struct trace_msg_t g_usb_trace_strings_intdecode[] =
 #ifdef CONFIG_SAMA5_UDPHS_REGDEBUG
 static void sam_printreg(uintptr_t regaddr, uint32_t regval, bool iswrite)
 {
-  lldbg("%p%s%08x\n", regaddr, iswrite ? "<-" : "->", regval);
+  uinfo("%p%s%08x\n", regaddr, iswrite ? "<-" : "->", regval);
 }
 #endif
 
@@ -722,7 +718,7 @@ static void sam_checkreg(uintptr_t regaddr, uint32_t regval, bool iswrite)
             {
               /* No.. More than one. */
 
-              lldbg("[repeats %d more times]\n", count);
+              uinfo("[repeats %d more times]\n", count);
             }
         }
 
@@ -797,36 +793,36 @@ static inline void sam_putreg(uint32_t regval, uint32_t regaddr)
  * Name: sam_dumpep
  ****************************************************************************/
 
-#if defined(CONFIG_SAMA5_UDPHS_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAMA5_UDPHS_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
 static void sam_dumpep(struct sam_usbdev_s *priv, int epno)
 {
   /* Global Registers */
 
-  lldbg("Global Register:\n");
-  lldbg("  CTRL:    %04x\n", sam_getreg(SAM_UDPHS_CTRL));
-  lldbg("  FNUM:    %04x\n", sam_getreg(SAM_UDPHS_FNUM));
-  lldbg("  IEN:     %04x\n", sam_getreg(SAM_UDPHS_IEN));
-  lldbg("  INSTA:   %04x\n", sam_getreg(SAM_UDPHS_INTSTA));
-  lldbg("  TST:     %04x\n", sam_getreg(SAM_UDPHS_TST));
+  uinfo("Global Register:\n");
+  uinfo("  CTRL:    %04x\n", sam_getreg(SAM_UDPHS_CTRL));
+  uinfo("  FNUM:    %04x\n", sam_getreg(SAM_UDPHS_FNUM));
+  uinfo("  IEN:     %04x\n", sam_getreg(SAM_UDPHS_IEN));
+  uinfo("  INSTA:   %04x\n", sam_getreg(SAM_UDPHS_INTSTA));
+  uinfo("  TST:     %04x\n", sam_getreg(SAM_UDPHS_TST));
 
   /* Endpoint registers */
 
-  lldbg("Endpoint %d Register:\n", epno);
-  lldbg("  CFG:     %04x\n", sam_getreg(SAM_UDPHS_EPTCFG(epno)));
-  lldbg("  CTL:     %04x\n", sam_getreg(SAM_UDPHS_EPTCTL(epno)));
-  lldbg("  STA:     %04x\n", sam_getreg(SAM_UDPHS_EPTSTA(epno)));
+  uinfo("Endpoint %d Register:\n", epno);
+  uinfo("  CFG:     %04x\n", sam_getreg(SAM_UDPHS_EPTCFG(epno)));
+  uinfo("  CTL:     %04x\n", sam_getreg(SAM_UDPHS_EPTCTL(epno)));
+  uinfo("  STA:     %04x\n", sam_getreg(SAM_UDPHS_EPTSTA(epno)));
 
-  lldbg("DMA %d Register:\n", epno);
+  uinfo("DMA %d Register:\n", epno);
   if ((SAM_EPSET_DMA & SAM_EP_BIT(epno)) != 0)
     {
-      lldbg("  NXTDSC:  %04x\n", sam_getreg(SAM_UDPHS_DMANXTDSC(epno)));
-      lldbg("  ADDRESS: %04x\n", sam_getreg(SAM_UDPHS_DMAADDRESS(epno)));
-      lldbg("  CONTROL: %04x\n", sam_getreg(SAM_UDPHS_DMACONTROL(epno)));
-      lldbg("  STATUS:  %04x\n", sam_getreg(SAM_UDPHS_DMASTATUS(epno)));
+      uinfo("  NXTDSC:  %04x\n", sam_getreg(SAM_UDPHS_DMANXTDSC(epno)));
+      uinfo("  ADDRESS: %04x\n", sam_getreg(SAM_UDPHS_DMAADDRESS(epno)));
+      uinfo("  CONTROL: %04x\n", sam_getreg(SAM_UDPHS_DMACONTROL(epno)));
+      uinfo("  STATUS:  %04x\n", sam_getreg(SAM_UDPHS_DMASTATUS(epno)));
     }
   else
     {
-      lldbg("  None\n");
+      uinfo("  None\n");
     }
 }
 #endif
@@ -1357,9 +1353,9 @@ static int sam_req_write(struct sam_usbdev_s *priv, struct sam_ep_s *privep)
           return -ENOENT;
         }
 
-      ullvdbg("epno=%d req=%p: len=%d xfrd=%d inflight=%d zlpneeded=%d\n",
-              epno, privreq, privreq->req.len, privreq->req.xfrd,
-              privreq->inflight, privep->zlpneeded);
+      uinfo("epno=%d req=%p: len=%d xfrd=%d inflight=%d zlpneeded=%d\n",
+            epno, privreq, privreq->req.len, privreq->req.xfrd,
+            privreq->inflight, privep->zlpneeded);
 
       /* Handle any bytes in flight. */
 
@@ -1600,8 +1596,8 @@ static int sam_req_read(struct sam_usbdev_s *priv, struct sam_ep_s *privep,
           return -ENOENT;
         }
 
-      ullvdbg("EP%d: len=%d xfrd=%d\n",
-              epno, privreq->req.len, privreq->req.xfrd);
+      uinfo("EP%d: len=%d xfrd=%d\n",
+            epno, privreq->req.len, privreq->req.xfrd);
 
       /* Ignore any attempt to receive a zero length packet */
 
@@ -1885,8 +1881,8 @@ static void sam_ep0_setup(struct sam_usbdev_s *priv)
   index.w = GETUINT16(priv->ctrl.index);
   len.w   = GETUINT16(priv->ctrl.len);
 
-  ullvdbg("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
-          priv->ctrl.type, priv->ctrl.req, value.w, index.w, len.w);
+  uinfo("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+        priv->ctrl.type, priv->ctrl.req, value.w, index.w, len.w);
 
   /* Dispatch any non-standard requests */
 
@@ -2049,7 +2045,7 @@ static void sam_ep0_setup(struct sam_usbdev_s *priv)
           {
             /* Special case recipient=device test mode */
 
-            ullvdbg("test mode: %d\n", index.w);
+            uinfo("test mode: %d\n", index.w);
           }
         else if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) != USB_REQ_RECIPIENT_ENDPOINT)
           {
@@ -2349,7 +2345,7 @@ static void sam_dma_interrupt(struct sam_usbdev_s *priv, int epno)
   /* Get the result of the DMA operation */
 
   dmastatus = sam_getreg(SAM_UDPHS_DMASTATUS(epno));
-  uvdbg("DMA%d DMASTATUS: %08x\n", epno, dmastatus);
+  uinfo("DMA%d DMASTATUS: %08x\n", epno, dmastatus);
 
   /* Disable DMA interrupt to avoid receiving 2 (B_EN and TR_EN) */
 
@@ -2774,7 +2770,7 @@ static void sam_ep_interrupt(struct sam_usbdev_s *priv, int epno)
  *
  ****************************************************************************/
 
-static int sam_udphs_interrupt(int irq, void *context)
+static int sam_udphs_interrupt(int irq, void *context, FAR void *arg)
 {
   /* For now there is only one USB controller, but we will always refer to
    * it using a pointer to make any future ports to multiple UDPHS controllers
@@ -3220,7 +3216,7 @@ static int sam_ep_configure_internal(struct sam_ep_s *privep,
   uint8_t nbtrans;
   bool dirin;
 
-  uvdbg("len: %02x type: %02x addr: %02x attr: %02x "
+  uinfo("len: %02x type: %02x addr: %02x attr: %02x "
         "maxpacketsize: %02x %02x interval: %02x\n",
         desc->len, desc->type, desc->addr, desc->attr,
         desc->mxpacketsize[0],  desc->mxpacketsize[1],
@@ -3397,7 +3393,7 @@ static int sam_ep_configure(struct usbdev_ep_s *ep,
 
   /* Verify parameters.  Endpoint 0 is not available at this interface */
 
-#if defined(CONFIG_DEBUG) || defined(CONFIG_USBDEV_TRACE)
+#if defined(CONFIG_DEBUG_FEATURES) || defined(CONFIG_USBDEV_TRACE)
   uint8_t epno = USB_EPNO(desc->addr);
   usbtrace(TRACE_EPCONFIGURE, (uint16_t)epno);
 
@@ -3436,11 +3432,11 @@ static int sam_ep_disable(struct usbdev_ep_s *ep)
   irqstate_t flags;
   uint8_t epno;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
-      ulldbg("ERROR: ep=%p\n", ep);
+      uerr("ERROR: ep=%p\n", ep);
       return -EINVAL;
     }
 #endif
@@ -3473,7 +3469,7 @@ static struct usbdev_req_s *sam_ep_allocreq(struct usbdev_ep_s *ep)
 {
   struct sam_req_s *privreq;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3505,7 +3501,7 @@ static void sam_ep_freereq(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
 {
   struct sam_req_s *privreq = (struct sam_req_s *)req;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3568,11 +3564,12 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
   uint8_t epno;
   int ret = OK;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!req || !req->callback || !req->buf || !ep)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
-      ulldbg("ERROR: req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+      uerr("ERROR: req=%p callback=%p buf=%p ep=%p\n",
+           req, req->callback, req->buf, ep);
       return -EINVAL;
     }
 #endif
@@ -3580,11 +3577,11 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
   usbtrace(TRACE_EPSUBMIT, USB_EPNO(ep->eplog));
   priv = privep->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv->driver)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_NOTCONFIGURED), priv->usbdev.speed);
-      ulldbg("ERROR: driver=%p\n", priv->driver);
+      uerr("ERROR: driver=%p\n", priv->driver);
       return -ESHUTDOWN;
     }
 #endif
@@ -3611,7 +3608,7 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
       if (privep->stalled)
         {
           sam_req_abort(privep, privreq, -EBUSY);
-          ulldbg("ERROR: stalled\n");
+          uerr("ERROR: stalled\n");
           ret = -EPERM;
         }
       else
@@ -3660,7 +3657,7 @@ static int sam_ep_cancel(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
   struct sam_ep_s *privep = (struct sam_ep_s *)ep;
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3687,7 +3684,7 @@ static int sam_ep_stall(struct usbdev_ep_s *ep, bool resume)
   uint32_t regval;
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3826,7 +3823,7 @@ static struct usbdev_ep_s *sam_allocep(struct usbdev_s *dev, uint8_t epno,
   uint16_t epset = SAM_EPSET_NOTEP0;
 
   usbtrace(TRACE_DEVALLOCEP, (uint16_t)epno);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3888,7 +3885,7 @@ static void sam_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep)
   struct sam_usbdev_s *priv;
   struct sam_ep_s *privep;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev || !ep)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3920,7 +3917,7 @@ static int sam_getframe(struct usbdev_s *dev)
   uint32_t regval;
   uint16_t frameno;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3952,7 +3949,7 @@ static int sam_wakeup(struct usbdev_s *dev)
   uint32_t regval;
 
   usbtrace(TRACE_DEVWAKEUP, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3998,7 +3995,7 @@ static int sam_selfpowered(struct usbdev_s *dev, bool selfpowered)
 
   usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -4300,7 +4297,7 @@ static void sam_sw_setup(struct sam_usbdev_s *priv)
     kmm_memalign(16, CONFIG_SAMA5_UDPHS_NDTDS * sizeof(struct sam_dtd_s));
   if (!priv->dtdpool)
     {
-      udbg("ERROR: Failed to allocate the DMA transfer descriptor pool\n");
+      uerr("ERROR: Failed to allocate the DMA transfer descriptor pool\n");
       return NULL;
     }
 
@@ -4440,7 +4437,7 @@ void up_usbinitialize(void)
    * them when we need them later.
    */
 
-  if (irq_attach(SAM_IRQ_UDPHS, sam_udphs_interrupt) != 0)
+  if (irq_attach(SAM_IRQ_UDPHS, sam_udphs_interrupt, NULL) != 0)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_IRQREGISTRATION),
                (uint16_t)SAM_IRQ_UDPHS);
@@ -4517,7 +4514,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
 
   usbtrace(TRACE_DEVREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !driver->ops->bind || !driver->ops->unbind ||
       !driver->ops->disconnect || !driver->ops->setup)
     {
@@ -4591,7 +4588,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
 
   usbtrace(TRACE_DEVUNREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (driver != priv->driver)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/sama5/sam_usbhost.h b/arch/arm/src/sama5/sam_usbhost.h
index a67a0a42ddc71c6292ec9cefd279a6df6f9aeb74..90e2b81a5909504dc11047968c0adb3cf34f98d6 100644
--- a/arch/arm/src/sama5/sam_usbhost.h
+++ b/arch/arm/src/sama5/sam_usbhost.h
@@ -271,7 +271,7 @@ FAR struct usbhost_connection_s *sam_ohci_initialize(int controller);
  ************************************************************************************/
 
 #ifdef CONFIG_SAMA5_OHCI
-int sam_ohci_tophalf(int irq, FAR void *context);
+int sam_ohci_tophalf(int irq, FAR void *context, FAR void *arg);
 #endif
 
 /************************************************************************************
diff --git a/arch/arm/src/sama5/sam_wdt.c b/arch/arm/src/sama5/sam_wdt.c
index d14f45c1983e1786b94ca680d4948577bb65c1a6..9d3f7dd61eaed194699b3e485a7712664a01b036 100644
--- a/arch/arm/src/sama5/sam_wdt.c
+++ b/arch/arm/src/sama5/sam_wdt.c
@@ -57,6 +57,11 @@
  * Pre-processor Definitions
  ****************************************************************************/
 /* Configuration ************************************************************/
+
+#ifndef CONFIG_DEBUG_WATCHDOG_INFO
+#  undef CONFIG_SAMA5_WDT_REGDEBUG
+#endif
+
 /* The Watchdog Timer uses the Slow Clock divided by 128 to establish the
  * maximum Watchdog period to be 16 seconds (with a typical Slow Clock of
  * 32768 kHz).
@@ -80,20 +85,6 @@
 #define WDT_MINTIMEOUT ((1000 + WDT_FREQUENCY - 1) / WDT_FREQUENCY)
 #define WDT_MAXTIMEOUT ((4096 * 1000) / WDT_FREQUENCY)
 
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing the watchdog
- * driver.  NOTE: that only lldbg types are used so that the output is
- * immediately available.
- */
-
-#ifdef CONFIG_DEBUG_WATCHDOG
-#  define wddbg    lldbg
-#  define wdvdbg   llvdbg
-#else
-#  define wddbg(x...)
-#  define wdvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -118,7 +109,7 @@ struct sam_lowerhalf_s
  ****************************************************************************/
 /* Register operations ******************************************************/
 
-#if defined(CONFIG_SAMA5_WDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAMA5_WDT_REGDEBUG
 static uint32_t sam_getreg(uintptr_t regaddr);
 static void     sam_putreg(uint32_t regval, uintptr_t regaddr);
 #else
@@ -129,7 +120,7 @@ static void     sam_putreg(uint32_t regval, uintptr_t regaddr);
 /* Interrupt hanlding *******************************************************/
 
 #ifdef CONFIG_SAMA5_WDT_INTERRUPT
-static int      sam_interrupt(int irq, FAR void *context);
+static int      sam_interrupt(int irq, FAR void *context, FAR void *arg);
 #endif
 
 /* "Lower half" driver methods **********************************************/
@@ -178,7 +169,7 @@ static struct sam_lowerhalf_s g_wdtdev;
  *
  ****************************************************************************/
 
-#if defined(CONFIG_SAMA5_WDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAMA5_WDT_REGDEBUG
 static uint32_t sam_getreg(uintptr_t regaddr)
 {
   static uint32_t prevaddr = 0;
@@ -199,7 +190,7 @@ static uint32_t sam_getreg(uintptr_t regaddr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              wdinfo("...\n");
             }
 
           return regval;
@@ -216,7 +207,7 @@ static uint32_t sam_getreg(uintptr_t regaddr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          wdinfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -228,7 +219,7 @@ static uint32_t sam_getreg(uintptr_t regaddr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%048\n", regaddr, regval);
+  wdinfo("%08x->%048\n", regaddr, regval);
   return regval;
 }
 #endif
@@ -241,12 +232,12 @@ static uint32_t sam_getreg(uintptr_t regaddr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_SAMA5_WDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAMA5_WDT_REGDEBUG
 static void sam_putreg(uint32_t regval, uintptr_t regaddr)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", regaddr, regval);
+  wdinfo("%08x<-%08x\n", regaddr, regval);
 
   /* Write the value */
 
@@ -269,7 +260,7 @@ static void sam_putreg(uint32_t regval, uintptr_t regaddr)
  ****************************************************************************/
 
 #ifdef CONFIG_SAMA5_WDT_INTERRUPT
-static int sam_interrupt(int irq, FAR void *context)
+static int sam_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   FAR struct sam_lowerhalf_s *priv = &g_wdtdev;
 
@@ -315,7 +306,7 @@ static int sam_start(FAR struct watchdog_lowerhalf_s *lower)
    * timer with the newly programmed mode parameters.
    */
 
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
   return priv->started ? OK : -ENOSYS;
 }
 
@@ -343,7 +334,7 @@ static int sam_stop(FAR struct watchdog_lowerhalf_s *lower)
    * timer with the newly programmed mode parameters.
    */
 
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
   return -ENOSYS;
 }
 
@@ -366,7 +357,7 @@ static int sam_stop(FAR struct watchdog_lowerhalf_s *lower)
 
 static int sam_keepalive(FAR struct watchdog_lowerhalf_s *lower)
 {
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
 
   /* Write WDT_CR_WDRSTT to the WDT CR regiser (along with the KEY value)
    * will restart the watchdog timer.
@@ -397,7 +388,7 @@ static int sam_getstatus(FAR struct watchdog_lowerhalf_s *lower,
 {
   FAR struct sam_lowerhalf_s *priv = (FAR struct sam_lowerhalf_s *)lower;
 
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
   DEBUGASSERT(priv);
 
   /* Return the status bit */
@@ -426,10 +417,10 @@ static int sam_getstatus(FAR struct watchdog_lowerhalf_s *lower,
 
   status->timeleft = 0;
 
-  wdvdbg("Status     :\n");
-  wdvdbg("  flags    : %08x\n", status->flags);
-  wdvdbg("  timeout  : %d\n", status->timeout);
-  wdvdbg("  timeleft : %d\n", status->timeleft);
+  wdinfo("Status     :\n");
+  wdinfo("  flags    : %08x\n", status->flags);
+  wdinfo("  timeout  : %d\n", status->timeout);
+  wdinfo("  timeleft : %d\n", status->timeleft);
   return OK;
 }
 
@@ -457,13 +448,13 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower,
   uint32_t regval;
 
   DEBUGASSERT(priv);
-  wdvdbg("Entry: timeout=%d\n", timeout);
+  wdinfo("Entry: timeout=%d\n", timeout);
 
   /* Can this timeout be represented? */
 
   if (timeout < WDT_MINTIMEOUT || timeout >= WDT_MAXTIMEOUT)
     {
-      wddbg("Cannot represent timeout: %d < %d > %d\n",
+      wderr("ERROR: Cannot represent timeout: %d < %d > %d\n",
             WDT_MINTIMEOUT, timeout, WDT_MAXTIMEOUT);
       return -ERANGE;
     }
@@ -496,7 +487,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower,
 
   priv->reload = reload;
 
-  wdvdbg("reload=%d timout: %d->%d\n",
+  wdinfo("reload=%d timout: %d->%d\n",
          reload, timeout, priv->timeout);
 
   /* Set the WDT_MR according to calculated value
@@ -541,7 +532,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower,
 
   priv->started = true;
 
-  wdvdbg("Setup: CR: %08x MR: %08x SR: %08x\n",
+  wdinfo("Setup: CR: %08x MR: %08x SR: %08x\n",
          sam_getreg(SAM_WDT_CR), sam_getreg(SAM_WDT_MR),
          sam_getreg(SAM_WDT_SR));
 
@@ -574,7 +565,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower,
                             xcpt_t handler)
 {
 #ifndef CONFIG_SAMA5_WDT_INTERRUPT
-  wddbg("ERROR: Not configured for this mode\n");
+  wderr("ERROR: Not configured for this mode\n");
   return NULL;
 #else
   FAR struct sam_lowerhalf_s *priv = (FAR struct sam_lowerhalf_s *)lower;
@@ -582,7 +573,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower,
   xcpt_t oldhandler;
 
   DEBUGASSERT(priv);
-  wdvdbg("Entry: handler=%p\n", handler);
+  wdinfo("Entry: handler=%p\n", handler);
 
   /* Get the old handler return value */
 
@@ -636,7 +627,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower,
 static int sam_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd,
                     unsigned long arg)
 {
-  wdvdbg("cmd=%d arg=%ld\n", cmd, arg);
+  wdinfo("cmd=%d arg=%ld\n", cmd, arg);
 
   /* No ioctls are supported */
 
@@ -667,7 +658,7 @@ int sam_wdt_initialize(void)
 {
   FAR struct sam_lowerhalf_s *priv = &g_wdtdev;
 
-  wdvdbg("Entry: CR: %08x MR: %08x SR: %08x\n",
+  wdinfo("Entry: CR: %08x MR: %08x SR: %08x\n",
          sam_getreg(SAM_WDT_CR), sam_getreg(SAM_WDT_MR),
          sam_getreg(SAM_WDT_SR));
 
@@ -693,12 +684,14 @@ int sam_wdt_initialize(void)
 #ifdef CONFIG_SAMA5_WDT_INTERRUPT
   /* Attach our WDT interrupt handler (But don't enable it yet) */
 
-  (void)irq_attach(SAM_IRQ_WDT, sam_interrupt);
+  (void)irq_attach(SAM_IRQ_WDT, sam_interrupt, NULL);
 #endif
 
-  /* Register the watchdog driver as /dev/watchdog0 */
+  /* Register the watchdog driver at the configured location (default
+   * /dev/watchdog0).
+   */
 
-  (void)watchdog_register("/dev/watchdog0",
+  (void)watchdog_register(CONFIG_WATCHDOG_DEVPATH,
                          (FAR struct watchdog_lowerhalf_s *)priv);
   return OK;
 }
diff --git a/arch/arm/src/sama5/sam_xdmac.c b/arch/arm/src/sama5/sam_xdmac.c
index bb4ce4e1ddcb54165a3fede40c35bdc35981a657..54386d92e197975f0605e885d6fc5c105cf6b6ff 100644
--- a/arch/arm/src/sama5/sam_xdmac.c
+++ b/arch/arm/src/sama5/sam_xdmac.c
@@ -807,7 +807,7 @@ static uint8_t sam_channel(uint8_t pid, const struct sam_pidmap_s *table,
         }
     }
 
-  dmadbg("No channel found for pid %d\n", pid);
+  dmaerr("ERROR: No channel found for pid %d\n", pid);
   DEBUGPANIC();
   return 0x3f;
 }
@@ -1330,7 +1330,7 @@ sam_allocdesc(struct sam_xdmach_s *xdmach, struct chnext_view1_s *prev,
    * Obviously setting it to zero would break that usage.
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (csa != 0)
 #endif
     {
@@ -1650,7 +1650,7 @@ static inline int sam_single(struct sam_xdmach_s *xdmach)
 static inline int sam_multiple(struct sam_xdmach_s *xdmach)
 {
   struct sam_xdmac_s *xdmac = sam_controller(xdmach);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ASSERTIONS
   struct chnext_view1_s *llhead = xdmach->llhead;
 #endif
   uintptr_t paddr;
@@ -1825,14 +1825,17 @@ static void sam_dmaterminate(struct sam_xdmach_s *xdmach, int result)
  *
  ****************************************************************************/
 
-static int sam_xdmac_interrupt(struct sam_xdmac_s *xdmac)
+static int sam_xdmac_interrupt(int irq, void *context, FAR void *arg)
 {
+  struct sam_xdmac_s *xdmac = (struct sam_xdmac_s *)arg;
   struct sam_xdmach_s *xdmach;
   unsigned int chndx;
   uint32_t gpending;
   uint32_t chpending;
   uint32_t bit;
 
+  DEBUGASSERT(xdmac != NULL);
+
   /* Get the set of pending, unmasked global XDMAC interrupts */
 
   gpending = sam_getdmac(xdmac, SAM_XDMAC_GIS_OFFSET) &
@@ -1860,7 +1863,7 @@ static int sam_xdmac_interrupt(struct sam_xdmac_s *xdmac)
             {
               /* Yes... Terminate the transfer with an error? */
 
-              dmalldbg("ERROR: DMA failed: %08x\n", chpending);
+              dmaerr("ERROR: DMA failed: %08x\n", chpending);
               sam_dmaterminate(xdmach, -EIO);
             }
 
@@ -1877,7 +1880,7 @@ static int sam_xdmac_interrupt(struct sam_xdmac_s *xdmac)
 
           else
             {
-              dmalldbg("ERROR: Unexpected interrupt: %08x\n", chpending);
+              dmaerr("ERROR: Unexpected interrupt: %08x\n", chpending);
               DEBUGPANIC();
             }
 
@@ -1890,28 +1893,6 @@ static int sam_xdmac_interrupt(struct sam_xdmac_s *xdmac)
   return OK;
 }
 
-/****************************************************************************
- * Name: sam_xdmac0_interrupt and sam_xdmac1_interrupt
- *
- * Description:
- *  DMA interrupt handler
- *
- ****************************************************************************/
-
-#ifdef CONFIG_SAMA5_XDMAC0
-static int sam_xdmac0_interrupt(int irq, void *context)
-{
-  return sam_xdmac_interrupt(&g_xdmac0);
-}
-#endif
-
-#ifdef CONFIG_SAMA5_XDMAC1
-static int sam_xdmac1_interrupt(int irq, void *context)
-{
-  return sam_xdmac_interrupt(&g_xdmac1);
-}
-#endif
-
 /****************************************************************************
  * Name: sam_dmainitialize
  *
@@ -1957,7 +1938,7 @@ void sam_dmainitialize(struct sam_xdmac_s *xdmac)
 void weak_function up_dmainitialize(void)
 {
 #ifdef CONFIG_SAMA5_XDMAC0
-  dmallvdbg("Initialize XDMAC0\n");
+  dmainfo("Initialize XDMAC0\n");
 
   /* Enable peripheral clock */
 
@@ -1965,7 +1946,7 @@ void weak_function up_dmainitialize(void)
 
   /* Attach DMA interrupt vector */
 
-  (void)irq_attach(SAM_IRQ_XDMAC0, sam_xdmac0_interrupt);
+  (void)irq_attach(SAM_IRQ_XDMAC0, sam_xdmac_interrupt, &g_xdmac0);
 
   /* Initialize the controller */
 
@@ -1977,7 +1958,7 @@ void weak_function up_dmainitialize(void)
 #endif
 
 #ifdef CONFIG_SAMA5_XDMAC1
-  dmallvdbg("Initialize XDMAC1\n");
+  dmainfo("Initialize XDMAC1\n");
 
   /* Enable peripheral clock */
 
@@ -1985,7 +1966,7 @@ void weak_function up_dmainitialize(void)
 
   /* Attach DMA interrupt vector */
 
-  (void)irq_attach(SAM_IRQ_XDMAC1, sam_xdmac1_interrupt);
+  (void)irq_attach(SAM_IRQ_XDMAC1, sam_xdmac_interrupt, &g_xdmac1);
 
   /* Initialize the controller */
 
@@ -2039,7 +2020,7 @@ DMA_HANDLE sam_dmachannel(uint8_t dmacno, uint32_t chflags)
 #endif
 
     {
-      dmadbg("ERROR: Bad XDMAC number: %d\n", dmacno);
+      dmaerr("ERROR: Bad XDMAC number: %d\n", dmacno);
       DEBUGPANIC();
       return (DMA_HANDLE)NULL;
     }
@@ -2083,12 +2064,12 @@ DMA_HANDLE sam_dmachannel(uint8_t dmacno, uint32_t chflags)
 
   if (xdmach)
     {
-      dmavdbg("XDMAC%d CH%d: chflags: %08x returning xdmach: %p\n",
+      dmainfo("XDMAC%d CH%d: chflags: %08x returning xdmach: %p\n",
               (int)dmacno, xdmach->chan, (int)chflags, xdmach);
     }
   else
     {
-      dmadbg("ERROR: Failed allocate XDMAC%d channel\n", (int)dmacno);
+      dmaerr("ERROR: Failed allocate XDMAC%d channel\n", (int)dmacno);
     }
 
   return (DMA_HANDLE)xdmach;
@@ -2119,13 +2100,13 @@ void sam_dmaconfig(DMA_HANDLE handle, uint32_t chflags)
   xdmach->flags = chflags;
 
 #if defined(CONFIG_SAMA5_XDMAC0) && defined(CONFIG_SAMA5_XDMAC1)
-  dmavdbg("XDMAC%d CH%d: chflags: %08x\n",
+  dmainfo("XDMAC%d CH%d: chflags: %08x\n",
           xdmach->xdmac, xdmach->chan, (int)chflags);
 #elif defined(CONFIG_SAMA5_XDMAC0)
-  dmavdbg("XDMAC0 CH%d: chflags: %08x\n",
+  dmainfo("XDMAC0 CH%d: chflags: %08x\n",
           xdmach->chan, (int)chflags);
 #else
-  dmavdbg("XDMAC1 CH%d: chflags: %08x\n",
+  dmainfo("XDMAC1 CH%d: chflags: %08x\n",
           xdmach->chan, (int)chflags);
 #endif
 }
@@ -2148,7 +2129,7 @@ void sam_dmafree(DMA_HANDLE handle)
   struct sam_xdmach_s *xdmach = (struct sam_xdmach_s *)handle;
   struct sam_xdmac_s *xdmac;
 
-  dmavdbg("xdmach: %p\n", xdmach);
+  dmainfo("xdmach: %p\n", xdmach);
   DEBUGASSERT((xdmach != NULL) && (xdmach->inuse));
 
   xdmac = sam_controller(xdmach);
@@ -2186,10 +2167,10 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
   size_t remaining;
   int ret = OK;
 
-  dmavdbg("xdmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
+  dmainfo("xdmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
           xdmach, (int)paddr, (int)maddr, (int)nbytes);
   DEBUGASSERT(xdmach);
-  dmavdbg("llhead: %p lltail: %p\n", xdmach->llhead, xdmach->lltail);
+  dmainfo("llhead: %p lltail: %p\n", xdmach->llhead, xdmach->lltail);
 
   /* The maximum transfer size in bytes depends upon the maximum number of
    * transfers and the number of bytes per transfer.
@@ -2265,10 +2246,10 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
   size_t remaining;
   int ret = OK;
 
-  dmavdbg("xdmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
+  dmainfo("xdmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
           xdmach, (int)paddr, (int)maddr, (int)nbytes);
   DEBUGASSERT(xdmach);
-  dmavdbg("llhead: %p lltail: %p\n", xdmach->llhead, xdmach->lltail);
+  dmainfo("llhead: %p lltail: %p\n", xdmach->llhead, xdmach->lltail);
 
   /* The maximum transfer size in bytes depends upon the maximum number of
    * transfers and the number of bytes per transfer.
@@ -2340,7 +2321,7 @@ int sam_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
   struct sam_xdmach_s *xdmach = (struct sam_xdmach_s *)handle;
   int ret = -EINVAL;
 
-  dmavdbg("xdmach: %p callback: %p arg: %p\n", xdmach, callback, arg);
+  dmainfo("xdmach: %p callback: %p arg: %p\n", xdmach, callback, arg);
   DEBUGASSERT(xdmach != NULL);
 
   /* Verify that the DMA has been setup (i.e., at least one entry in the
@@ -2384,7 +2365,7 @@ void sam_dmastop(DMA_HANDLE handle)
   struct sam_xdmach_s *xdmach = (struct sam_xdmach_s *)handle;
   irqstate_t flags;
 
-  dmavdbg("xdmach: %p\n", xdmach);
+  dmainfo("xdmach: %p\n", xdmach);
   DEBUGASSERT(xdmach != NULL);
 
   flags = enter_critical_section();
@@ -2403,7 +2384,7 @@ void sam_dmastop(DMA_HANDLE handle)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs)
 {
   struct sam_xdmach_s *xdmach = (struct sam_xdmach_s *)handle;
@@ -2445,7 +2426,7 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs)
 
   leave_critical_section(flags);
 }
-#endif /* CONFIG_DEBUG_DMA */
+#endif /* CONFIG_DEBUG_DMA_INFO */
 
 /****************************************************************************
  * Name: sam_dmadump
@@ -2458,37 +2439,37 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void sam_dmadump(DMA_HANDLE handle, const struct sam_dmaregs_s *regs,
                  const char *msg)
 {
   struct sam_xdmach_s *xdmach = (struct sam_xdmach_s *)handle;
   struct sam_xdmac_s *xdmac = sam_controller(xdmach);
 
-  dmadbg("%s\n", msg);
-  dmadbg("  DMA Global Registers:\n");
-  dmadbg("     GTYPE[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GTYPE_OFFSET, regs->gtype);
-  dmadbg("      GCFG[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GCFG_OFFSET, regs->gcfg);
-  dmadbg("      GWAC[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GWAC_OFFSET, regs->gwac);
-  dmadbg("       GIM[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GIM_OFFSET, regs->gim);
-  dmadbg("       GIS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GIS_OFFSET, regs->gis);
-  dmadbg("        GS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GS_OFFSET, regs->gs);
-  dmadbg("       GRS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GRS_OFFSET, regs->grs);
-  dmadbg("       GWS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GWS_OFFSET, regs->gws);
-  dmadbg("      GSWS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GSWS_OFFSET, regs->gsws);
-  dmadbg("  DMA Channel Registers:\n");
-  dmadbg("       CIM[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CIM_OFFSET, regs->cim);
-  dmadbg("       CIS[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CIS_OFFSET, regs->cis);
-  dmadbg("       CSA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CSA_OFFSET, regs->csa);
-  dmadbg("       CDA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDA_OFFSET, regs->cda);
-  dmadbg("      CNDA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CNDA_OFFSET, regs->cnda);
-  dmadbg("      CNDC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CNDC_OFFSET, regs->cndc);
-  dmadbg("      CUBC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CUBC_OFFSET, regs->cubc);
-  dmadbg("       CBC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CBC_OFFSET, regs->cbc);
-  dmadbg("        CC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CC_OFFSET, regs->cc);
-  dmadbg("    CDSMSP[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDSMSP_OFFSET, regs->cdsmsp);
-  dmadbg("      CSUS[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CSUS_OFFSET, regs->csus);
-  dmadbg("      CDUS[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDUS_OFFSET, regs->cdus);
+  dmainfo("%s\n", msg);
+  dmainfo("  DMA Global Registers:\n");
+  dmainfo("     GTYPE[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GTYPE_OFFSET, regs->gtype);
+  dmainfo("      GCFG[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GCFG_OFFSET, regs->gcfg);
+  dmainfo("      GWAC[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GWAC_OFFSET, regs->gwac);
+  dmainfo("       GIM[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GIM_OFFSET, regs->gim);
+  dmainfo("       GIS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GIS_OFFSET, regs->gis);
+  dmainfo("        GS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GS_OFFSET, regs->gs);
+  dmainfo("       GRS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GRS_OFFSET, regs->grs);
+  dmainfo("       GWS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GWS_OFFSET, regs->gws);
+  dmainfo("      GSWS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GSWS_OFFSET, regs->gsws);
+  dmainfo("  DMA Channel Registers:\n");
+  dmainfo("       CIM[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CIM_OFFSET, regs->cim);
+  dmainfo("       CIS[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CIS_OFFSET, regs->cis);
+  dmainfo("       CSA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CSA_OFFSET, regs->csa);
+  dmainfo("       CDA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDA_OFFSET, regs->cda);
+  dmainfo("      CNDA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CNDA_OFFSET, regs->cnda);
+  dmainfo("      CNDC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CNDC_OFFSET, regs->cndc);
+  dmainfo("      CUBC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CUBC_OFFSET, regs->cubc);
+  dmainfo("       CBC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CBC_OFFSET, regs->cbc);
+  dmainfo("        CC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CC_OFFSET, regs->cc);
+  dmainfo("    CDSMSP[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDSMSP_OFFSET, regs->cdsmsp);
+  dmainfo("      CSUS[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CSUS_OFFSET, regs->csus);
+  dmainfo("      CDUS[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDUS_OFFSET, regs->cdus);
 }
-#endif /* CONFIG_DEBUG_DMA */
+#endif /* CONFIG_DEBUG_DMA_INFO */
 #endif /* CONFIG_SAMA5_XDMAC0 || CONFIG_SAMA5_XDMAC1 */
diff --git a/arch/arm/src/sama5/sama5d2x_pio.c b/arch/arm/src/sama5/sama5d2x_pio.c
index d6daf15a82003fb57987c21d863e362e8988481d..3a87d3da666e42ca6ee64ef1f0ce96cf0420254b 100644
--- a/arch/arm/src/sama5/sama5d2x_pio.c
+++ b/arch/arm/src/sama5/sama5d2x_pio.c
@@ -118,7 +118,7 @@ const uintptr_t g_spiobase[SAM_NPIO] =
  ****************************************************************************/
 /* Maps a port number to the standard port character */
 
-#if defined(CONFIG_DEBUG_GPIO) && SAM_NPIO > 0
+#if defined(CONFIG_DEBUG_GPIO_INFO) && SAM_NPIO > 0
 static const char g_portchar[SAM_NPIO] =
 {
   'A'
@@ -610,7 +610,7 @@ void sam_pio_forceclk(pio_pinset_t pinset, bool enable)
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 int sam_dumppio(uint32_t pinset, const char *msg)
 {
   irqstate_t    flags;
@@ -630,32 +630,32 @@ int sam_dumppio(uint32_t pinset, const char *msg)
 
   if (secure)
     {
-      lldbg("SPIO%c pinset: %08x base: %08x -- %s\n",
+      gpioinfo("SPIO%c pinset: %08x base: %08x -- %s\n",
              g_portchar[port], pinset, base, msg);
     }
   else
     {
-      lldbg("PIO%c pinset: %08x base: %08x -- %s\n",
+      gpioinfo("PIO%c pinset: %08x base: %08x -- %s\n",
              g_portchar[port], pinset, base, msg);
     }
 
-  lldbg("   MSKR: %08x   CFGR: %08x   PDSR: %08x LOCKSR: %08x\n",
-        getreg32(base + SAM_PIO_MSKR_OFFSET), getreg32(base + SAM_PIO_CFGR_OFFSET),
-        getreg32(base + SAM_PIO_PDSR_OFFSET), getreg32(base + SAM_PIO_LOCKSR_OFFSET));
-  lldbg("   ODSR: %08x    IMR: %08x    ISR: %08x\n",
-        getreg32(base + SAM_PIO_ODSR_OFFSET), getreg32(base + SAM_PIO_IMR_OFFSET),
-        getreg32(base + SAM_PIO_ISR_OFFSET));
+  gpioinfo("   MSKR: %08x   CFGR: %08x   PDSR: %08x LOCKSR: %08x\n",
+          getreg32(base + SAM_PIO_MSKR_OFFSET), getreg32(base + SAM_PIO_CFGR_OFFSET),
+          getreg32(base + SAM_PIO_PDSR_OFFSET), getreg32(base + SAM_PIO_LOCKSR_OFFSET));
+  gpioinfo("   ODSR: %08x    IMR: %08x    ISR: %08x\n",
+          getreg32(base + SAM_PIO_ODSR_OFFSET), getreg32(base + SAM_PIO_IMR_OFFSET),
+          getreg32(base + SAM_PIO_ISR_OFFSET));
 
   if (secure)
     {
-      lldbg("   SCDR: %08x   WPMR: %08x   WPSR: %08x  IOSSR: %08x\n",
-            getreg32(SAM_SPIO_SCDR), getreg32(SAM_SPIO_WPMR),
-            getreg32(SAM_SPIO_WPSR), getreg32(base + SAM_SPIO_IOSSR_OFFSET));
+      gpioinfo("   SCDR: %08x   WPMR: %08x   WPSR: %08x  IOSSR: %08x\n",
+              getreg32(SAM_SPIO_SCDR), getreg32(SAM_SPIO_WPMR),
+              getreg32(SAM_SPIO_WPSR), getreg32(base + SAM_SPIO_IOSSR_OFFSET));
     }
   else
     {
-      lldbg("   WPMR: %08x   WPSR: %08x\n",
-            getreg32(SAM_PIO_WPMR), getreg32(SAM_PIO_WPSR));
+      gpioinfo("   WPMR: %08x   WPSR: %08x\n",
+              getreg32(SAM_PIO_WPMR), getreg32(SAM_PIO_WPSR));
     }
 
   leave_critical_section(flags);
diff --git a/arch/arm/src/sama5/sama5d2x_pio.h b/arch/arm/src/sama5/sama5d2x_pio.h
index 4b37166d4b3f0a65870dfe31a7eaea17835f8cd7..4b0324dc96317b3c7c7ffa9a52b7c5645ba2660b 100644
--- a/arch/arm/src/sama5/sama5d2x_pio.h
+++ b/arch/arm/src/sama5/sama5d2x_pio.h
@@ -58,10 +58,6 @@
 #  undef CONFIG_SAMA5_PIO_IRQ
 #endif
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_GPIO
-#endif
-
 #define PIO_HAVE_PULLDOWN         1
 #define PIO_HAVE_PERIPHCD         1
 #define PIO_HAVE_SCHMITT          1
diff --git a/arch/arm/src/sama5/sama5d3x4x_pio.c b/arch/arm/src/sama5/sama5d3x4x_pio.c
index b9379ad868c734f96e427f7711c0ae5c11d69e7b..806fb9fc089a43db8f153621f0b6da10bedfde0e 100644
--- a/arch/arm/src/sama5/sama5d3x4x_pio.c
+++ b/arch/arm/src/sama5/sama5d3x4x_pio.c
@@ -67,10 +67,6 @@
 #define PIO_INPUT_BITS (PIO_INPUT | PIO_CFG_DEFAULT)
 #define MK_INPUT(p)    (((p) & (PIO_PORT_MASK | PIO_PIN_MASK)) | PIO_INPUT_BITS)
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
 /****************************************************************************
  * Public Data
  ****************************************************************************/
@@ -99,7 +95,7 @@ const uintptr_t g_piobase[SAM_NPIO] =
  ****************************************************************************/
 /* Maps a port number to the standard port character */
 
-#if defined(CONFIG_DEBUG_GPIO) && SAM_NPIO > 0
+#if defined(CONFIG_DEBUG_GPIO_INFO) && SAM_NPIO > 0
 static const char g_portchar[SAM_NPIO] =
 {
   'A'
@@ -353,6 +349,14 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin,
 
   if ((cfgset & PIO_CFG_PULLUP) != 0)
     {
+#ifdef PIO_HAVE_PULLDOWN
+      /* The pull-up on a pin can not be enabled if its pull-down is still
+       * active. Therefore, we need to disable the pull-down first before
+       * enabling the pull-up.
+       */
+
+      putreg32(pin, base + SAM_PIO_PPDDR_OFFSET);
+#endif
       putreg32(pin, base + SAM_PIO_PUER_OFFSET);
     }
   else
@@ -365,6 +369,12 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin,
 
   if ((cfgset & PIO_CFG_PULLDOWN) != 0)
     {
+      /* The pull-down on a pin can not be enabled if its pull-up is still
+       * active. Therefore, we need to disable the pull-up first before
+       * enabling the pull-down.
+       */
+
+      putreg32(pin, base + SAM_PIO_PUDR_OFFSET);
       putreg32(pin, base + SAM_PIO_PPDER_OFFSET);
     }
   else
@@ -468,6 +478,14 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin,
 
   if ((cfgset & PIO_CFG_PULLUP) != 0)
     {
+#ifdef PIO_HAVE_PULLDOWN
+      /* The pull-up on a pin can not be enabled if its pull-down is still
+       * active. Therefore, we need to disable the pull-down first before
+       * enabling the pull-up.
+       */
+
+      putreg32(pin, base + SAM_PIO_PPDDR_OFFSET);
+#endif
       putreg32(pin, base + SAM_PIO_PUER_OFFSET);
     }
   else
@@ -480,6 +498,12 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin,
 
   if ((cfgset & PIO_CFG_PULLDOWN) != 0)
     {
+      /* The pull-down on a pin can not be enabled if its pull-up is still
+       * active. Therefore, we need to disable the pull-up first before
+       * enabling the pull-down.
+       */
+
+      putreg32(pin, base + SAM_PIO_PUDR_OFFSET);
       putreg32(pin, base + SAM_PIO_PPDER_OFFSET);
     }
   else
@@ -550,6 +574,14 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin,
 
   if ((cfgset & PIO_CFG_PULLUP) != 0)
     {
+#ifdef PIO_HAVE_PULLDOWN
+      /* The pull-up on a pin can not be enabled if its pull-down is still
+       * active. Therefore, we need to disable the pull-down first before
+       * enabling the pull-up.
+       */
+
+      putreg32(pin, base + SAM_PIO_PPDDR_OFFSET);
+#endif
       putreg32(pin, base + SAM_PIO_PUER_OFFSET);
     }
   else
@@ -562,6 +594,12 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin,
 
   if ((cfgset & PIO_CFG_PULLDOWN) != 0)
     {
+      /* The pull-down on a pin can not be enabled if its pull-up is still
+       * active. Therefore, we need to disable the pull-up first before
+       * enabling the pull-down.
+       */
+
+      putreg32(pin, base + SAM_PIO_PUDR_OFFSET);
       putreg32(pin, base + SAM_PIO_PPDER_OFFSET);
     }
   else
@@ -854,7 +892,7 @@ void sam_pio_forceclk(pio_pinset_t pinset, bool enable)
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 int sam_dumppio(uint32_t pinset, const char *msg)
 {
   irqstate_t    flags;
@@ -869,41 +907,42 @@ int sam_dumppio(uint32_t pinset, const char *msg)
   /* The following requires exclusive access to the PIO registers */
 
   flags = enter_critical_section();
-  lldbg("PIO%c pinset: %08x base: %08x -- %s\n",
-        g_portchar[port], pinset, base, msg);
+
+  gpioinfo("PIO%c pinset: %08x base: %08x -- %s\n",
+         g_portchar[port], pinset, base, msg);
 
 #ifdef SAM_PIO_ISLR_OFFSET
-  lldbg("    PSR: %08x   ISLR: %08x    OSR: %08x   IFSR: %08x\n",
-        getreg32(base + SAM_PIO_PSR_OFFSET), getreg32(base + SAM_PIO_ISLR_OFFSET),
-        getreg32(base + SAM_PIO_OSR_OFFSET), getreg32(base + SAM_PIO_IFSR_OFFSET));
+  gpioinfo("    PSR: %08x   ISLR: %08x    OSR: %08x   IFSR: %08x\n",
+           getreg32(base + SAM_PIO_PSR_OFFSET), getreg32(base + SAM_PIO_ISLR_OFFSET),
+           getreg32(base + SAM_PIO_OSR_OFFSET), getreg32(base + SAM_PIO_IFSR_OFFSET));
 #else
-  lldbg("    PSR: %08x    OSR: %08x   IFSR: %08x\n",
-        getreg32(base + SAM_PIO_PSR_OFFSET), getreg32(base + SAM_PIO_OSR_OFFSET),
-        getreg32(base + SAM_PIO_IFSR_OFFSET));
-#endif
-  lldbg("   ODSR: %08x   PDSR: %08x    IMR: %08x    ISR: %08x\n",
-        getreg32(base + SAM_PIO_ODSR_OFFSET), getreg32(base + SAM_PIO_PDSR_OFFSET),
-        getreg32(base + SAM_PIO_IMR_OFFSET), getreg32(base + SAM_PIO_ISR_OFFSET));
-  lldbg("   MDSR: %08x   PUSR: %08x ABDCSR: %08x %08x\n",
-        getreg32(base + SAM_PIO_MDSR_OFFSET), getreg32(base + SAM_PIO_PUSR_OFFSET),
-        getreg32(base + SAM_PIO_ABCDSR1_OFFSET), getreg32(base + SAM_PIO_ABCDSR2_OFFSET));
-  lldbg(" IFSCSR: %08x   SCDR: %08x  PPDSR: %08x   OWSR: %08x\n",
-        getreg32(base + SAM_PIO_IFSCSR_OFFSET), getreg32(base + SAM_PIO_SCDR_OFFSET),
-        getreg32(base + SAM_PIO_PPDSR_OFFSET), getreg32(base + SAM_PIO_OWSR_OFFSET));
+  gpioinfo("    PSR: %08x    OSR: %08x   IFSR: %08x\n",
+           getreg32(base + SAM_PIO_PSR_OFFSET), getreg32(base + SAM_PIO_OSR_OFFSET),
+           getreg32(base + SAM_PIO_IFSR_OFFSET));
+#endif
+  gpioinfo("   ODSR: %08x   PDSR: %08x    IMR: %08x    ISR: %08x\n",
+           getreg32(base + SAM_PIO_ODSR_OFFSET), getreg32(base + SAM_PIO_PDSR_OFFSET),
+           getreg32(base + SAM_PIO_IMR_OFFSET), getreg32(base + SAM_PIO_ISR_OFFSET));
+  gpioinfo("   MDSR: %08x   PUSR: %08x ABDCSR: %08x %08x\n",
+           getreg32(base + SAM_PIO_MDSR_OFFSET), getreg32(base + SAM_PIO_PUSR_OFFSET),
+           getreg32(base + SAM_PIO_ABCDSR1_OFFSET), getreg32(base + SAM_PIO_ABCDSR2_OFFSET));
+  gpioinfo(" IFSCSR: %08x   SCDR: %08x  PPDSR: %08x   OWSR: %08x\n",
+           getreg32(base + SAM_PIO_IFSCSR_OFFSET), getreg32(base + SAM_PIO_SCDR_OFFSET),
+           getreg32(base + SAM_PIO_PPDSR_OFFSET), getreg32(base + SAM_PIO_OWSR_OFFSET));
 #ifdef SAM_PIO_LOCKSR_OFFSET
-  lldbg("  AIMMR: %08x   ELSR: %08x FRLHSR: %08x LOCKSR: %08x\n",
-        getreg32(base + SAM_PIO_AIMMR_OFFSET), getreg32(base + SAM_PIO_ELSR_OFFSET),
-        getreg32(base + SAM_PIO_FRLHSR_OFFSET), getreg32(base + SAM_PIO_LOCKSR_OFFSET));
+  gpioinfo("  AIMMR: %08x   ELSR: %08x FRLHSR: %08x LOCKSR: %08x\n",
+           getreg32(base + SAM_PIO_AIMMR_OFFSET), getreg32(base + SAM_PIO_ELSR_OFFSET),
+           getreg32(base + SAM_PIO_FRLHSR_OFFSET), getreg32(base + SAM_PIO_LOCKSR_OFFSET));
 #else
-  lldbg("  AIMMR: %08x   ELSR: %08x FRLHSR: %08x\n",
-        getreg32(base + SAM_PIO_AIMMR_OFFSET), getreg32(base + SAM_PIO_ELSR_OFFSET),
-        getreg32(base + SAM_PIO_FRLHSR_OFFSET));
-#endif
-  lldbg("SCHMITT: %08x DRIVER: %08x %08x\n",
-        getreg32(base + SAM_PIO_SCHMITT_OFFSET), getreg32(base + SAM_PIO_DRIVER1_OFFSET),
-        getreg32(base + SAM_PIO_DRIVER2_OFFSET));
-  lldbg("   WPMR: %08x   WPSR: %08x\n",
-        getreg32(base + SAM_PIO_WPMR_OFFSET), getreg32(base + SAM_PIO_WPSR_OFFSET));
+  gpioinfo("  AIMMR: %08x   ELSR: %08x FRLHSR: %08x\n",
+           getreg32(base + SAM_PIO_AIMMR_OFFSET), getreg32(base + SAM_PIO_ELSR_OFFSET),
+           getreg32(base + SAM_PIO_FRLHSR_OFFSET));
+#endif
+  gpioinfo("SCHMITT: %08x DRIVER: %08x %08x\n",
+           getreg32(base + SAM_PIO_SCHMITT_OFFSET), getreg32(base + SAM_PIO_DRIVER1_OFFSET),
+           getreg32(base + SAM_PIO_DRIVER2_OFFSET));
+  gpioinfo("   WPMR: %08x   WPSR: %08x\n",
+           getreg32(base + SAM_PIO_WPMR_OFFSET), getreg32(base + SAM_PIO_WPSR_OFFSET));
 
   leave_critical_section(flags);
   return OK;
diff --git a/arch/arm/src/sama5/sama5d3x4x_pio.h b/arch/arm/src/sama5/sama5d3x4x_pio.h
index 63b6615b556955465ba7f093342c3fb3e7fa4b13..cd5f1d3a59816ac04ba1be6535c980062485e520 100644
--- a/arch/arm/src/sama5/sama5d3x4x_pio.h
+++ b/arch/arm/src/sama5/sama5d3x4x_pio.h
@@ -52,10 +52,6 @@
 #  undef CONFIG_SAMA5_PIO_IRQ
 #endif
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_GPIO
-#endif
-
 #define PIO_HAVE_PULLDOWN         1
 #define PIO_HAVE_PERIPHCD         1
 #define PIO_HAVE_SCHMITT          1
diff --git a/arch/arm/src/samdl/Kconfig b/arch/arm/src/samdl/Kconfig
index a890db6a0fdd8dcbc14ac478ebe8bf8ad2febefc..28ca29c90c342f2b9ecb851bbfd635554d768c20 100644
--- a/arch/arm/src/samdl/Kconfig
+++ b/arch/arm/src/samdl/Kconfig
@@ -711,7 +711,7 @@ if SAMDL_HAVE_SPI
 config SAMDL_SPI_REGDEBUG
 	bool "SPI register-Level Debug"
 	default n
-	depends on DEBUG_SPI
+	depends on DEBUG_SPI_INFO
 	---help---
 		Enable very low-level register access debug.  Depends on DEBUG_SPI.
 
diff --git a/arch/arm/src/samdl/Make.defs b/arch/arm/src/samdl/Make.defs
index d9a82f959e592953e0732a5e8c066feda4e9fc7c..6d177f26511f11a4a2c7dcd5a45e81bfa72e1f75 100644
--- a/arch/arm/src/samdl/Make.defs
+++ b/arch/arm/src/samdl/Make.defs
@@ -59,13 +59,7 @@ ifeq ($(CONFIG_STACK_COLORATION),y)
 CMN_CSRCS += up_checkstack.c
 endif
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c
-endif
-
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
 CMN_CSRCS += up_dumpnvic.c
 endif
 
diff --git a/arch/arm/src/samdl/sam_dmac.c b/arch/arm/src/samdl/sam_dmac.c
index de5004f2d74a5c5195076e76ae3616b16c1a3997..20501ecc0eda381377ae7d2e0013a39967ef3e58 100644
--- a/arch/arm/src/samdl/sam_dmac.c
+++ b/arch/arm/src/samdl/sam_dmac.c
@@ -117,7 +117,7 @@ static void   sam_takedsem(void);
 static inline void sam_givedsem(void);
 #endif
 static void   sam_dmaterminate(struct sam_dmach_s *dmach, int result);
-static int    sam_dmainterrupt(int irq, void *context);
+static int    sam_dmainterrupt(int irq, void *context, FAR void *arg);
 static struct dma_desc_s *sam_alloc_desc(struct sam_dmach_s *dmach);
 static struct dma_desc_s *sam_append_desc(struct sam_dmach_s *dmach,
                 uint16_t btctrl, uint16_t btcnt,
@@ -275,7 +275,7 @@ static void sam_dmaterminate(struct sam_dmach_s *dmach, int result)
  *
  ****************************************************************************/
 
-static int sam_dmainterrupt(int irq, void *context)
+static int sam_dmainterrupt(int irq, void *context, FAR void *arg)
 {
   struct sam_dmach_s *dmach;
   unsigned int chndx;
@@ -769,7 +769,7 @@ static int sam_rxbuffer(struct sam_dmach_s *dmach, uint32_t paddr,
 
 void weak_function up_dmainitialize(void)
 {
-  dmallvdbg("Initialize DMAC\n");
+  dmainfo("Initialize DMAC\n");
   int i;
 
   /* Initialize global semaphores */
@@ -807,7 +807,7 @@ void weak_function up_dmainitialize(void)
 
   /* Attach DMA interrupt vector */
 
-  (void)irq_attach(SAM_IRQ_DMAC, sam_dmainterrupt);
+  (void)irq_attach(SAM_IRQ_DMAC, sam_dmainterrupt, NULL);
 
   /* Set the LPRAM DMA descriptor table addresses.  These can only be
    * written when the DMAC is disabled.
@@ -888,7 +888,7 @@ DMA_HANDLE sam_dmachannel(uint32_t chflags)
 
   sam_givechsem();
 
-  dmavdbg("chflags: %08x returning dmach: %p\n",  (int)chflags, dmach);
+  dmainfo("chflags: %08x returning dmach: %p\n",  (int)chflags, dmach);
   return (DMA_HANDLE)dmach;
 }
 
@@ -914,7 +914,7 @@ void sam_dmaconfig(DMA_HANDLE handle, uint32_t chflags)
 
   /* Set the new DMA channel flags. */
 
-  dmavdbg("chflags: %08x\n",  (int)chflags);
+  dmainfo("chflags: %08x\n",  (int)chflags);
   dmach->dc_flags = chflags;
 }
 
@@ -935,7 +935,7 @@ void sam_dmafree(DMA_HANDLE handle)
 {
   struct sam_dmach_s *dmach = (struct sam_dmach_s *)handle;
 
-  dmavdbg("dmach: %p\n", dmach);
+  dmainfo("dmach: %p\n", dmach);
   DEBUGASSERT((dmach != NULL) && (dmach->dc_inuse));
 
   /* Mark the channel no longer in use.  Clearing the inuse flag is an atomic
@@ -965,12 +965,12 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
   size_t maxtransfer;
   int ret = OK;
 
-  dmavdbg("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
+  dmainfo("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
           dmach, (int)paddr, (int)maddr, (int)nbytes);
   DEBUGASSERT(dmach);
 
 #if CONFIG_SAMDL_DMAC_NDESC > 0
-  dmavdbg("dc_head: %p dc_tail: %p\n", dmach->dc_head, dmach->dc_tail);
+  dmainfo("dc_head: %p dc_tail: %p\n", dmach->dc_head, dmach->dc_tail);
 #endif
 
   /* The maximum transfer size in bytes depends upon the maximum number of
@@ -1039,12 +1039,12 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
   size_t maxtransfer;
   int ret = OK;
 
-  dmavdbg("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
+  dmainfo("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
           dmach, (int)paddr, (int)maddr, (int)nbytes);
   DEBUGASSERT(dmach);
 
 #if CONFIG_SAMDL_DMAC_NDESC > 0
-  dmavdbg("dc_head: %p dc_tail: %p\n", dmach->dc_head, dmach->dc_tail);
+  dmainfo("dc_head: %p dc_tail: %p\n", dmach->dc_head, dmach->dc_tail);
 #endif
 
   /* The maximum transfer size in bytes depends upon the maximum number of
@@ -1115,7 +1115,7 @@ int sam_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
   uint8_t memqos;
   int ret = -EINVAL;
 
-  dmavdbg("dmach: %p callback: %p arg: %p\n", dmach, callback, arg);
+  dmainfo("dmach: %p callback: %p arg: %p\n", dmach, callback, arg);
   DEBUGASSERT(dmach != NULL && dmach->dc_chan < SAMDL_NDMACHAN);
   head = &g_base_desc[dmach->dc_chan];
 
@@ -1240,7 +1240,7 @@ void sam_dmastop(DMA_HANDLE handle)
   struct sam_dmach_s *dmach = (struct sam_dmach_s *)handle;
   irqstate_t flags;
 
-  dmavdbg("dmach: %p\n", dmach);
+  dmainfo("dmach: %p\n", dmach);
   DEBUGASSERT(dmach != NULL);
 
   flags = enter_critical_section();
@@ -1259,7 +1259,7 @@ void sam_dmastop(DMA_HANDLE handle)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs)
 {
   struct sam_dmach_s *dmach = (struct sam_dmach_s *)handle;
@@ -1274,7 +1274,7 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs)
   regs->crcdatain  = getreg32(SAM_DMAC_CRCDATAIN);  /* CRC Data Input Register */
   regs->crcchksum  = getreg32(SAM_DMAC_CRCCHKSUM);  /* CRC Checksum Register */
   regs->crcstatus  = getreg8(SAM_DMAC_CRCSTATUS);   /* CRC Status Register */
-  regs->dbgctrl    = getreg8(SAM_DMAC_DBGCTRL);     /* Debug Control Register */
+  regs->errctrl    = getreg8(SAM_DMAC_DBGCTRL);     /* Debug Control Register */
   regs->qosctrl    = getreg8(SAM_DMAC_QOSCTRL);     /* Quality of Service Control Register */
   regs->swtrigctrl = getreg32(SAM_DMAC_SWTRIGCTRL); /* Software Trigger Control Register */
   regs->prictrl0   = getreg32(SAM_DMAC_PRICTRL0);   /* Priority Control 0 Register */
@@ -1291,7 +1291,7 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs)
   regs->chintflag  = getreg8(SAM_DMAC_CHINTFLAG);   /* Channel Interrupt Flag Status and Clear Register */
   regs->chstatus   = getreg8(SAM_DMAC_CHSTATUS);    /* Channel Status Register */
 }
-#endif /* CONFIG_DEBUG_DMA */
+#endif /* CONFIG_DEBUG_DMA_INFO */
 
 /****************************************************************************
  * Name: sam_dmadump
@@ -1304,26 +1304,26 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void sam_dmadump(DMA_HANDLE handle, const struct sam_dmaregs_s *regs,
                  const char *msg)
 {
   struct sam_dmach_s *dmach = (struct sam_dmach_s *)handle;
 
-  dmadbg("%s\n", msg);
-  dmadbg("  DMAC Registers:\n");
-  dmadbg("         CTRL: %04x      CRCCTRL: %04x      CRCDATAIN: %08x  CRCCHKSUM: %08x\n",
-         regs->ctrl, regs->crcctrl, regs->crcdatain, regs->crcchksum);
-  dmadbg("    CRCSTATUS: %02x        DBGCTRL: %02x          QOSCTRL: %02x       SWTRIGCTRL: %08x\n",
-         regs->crcstatus, regs->dbgctrl, regs->qosctrl, regs->swtrigctrl);
-  dmadbg("     PRICTRL0: %08x  INTPEND: %04x     INSTSTATUS: %08x     BUSYCH: %08x\n",
-         regs->prictrl0, regs->intpend, regs->intstatus, regs->busych);
-  dmadbg("       PENDCH: %08x   ACTIVE: %08x   BASEADDR: %08x    WRBADDR: %08x\n",
-         regs->pendch, regs->active, regs->baseaddr, regs->wrbaddr);
-  dmadbg("         CHID: %02x       CHCRTRLA: %02x         CHCRTRLB: %08x   CHINFLAG: %02x\n",
-         regs->chid, regs->chctrla, regs->chctrlb, regs->chintflag,
-  dmadbg("     CHSTATUS: %02x\n",
-         regs->chstatus);
+  dmainfo("%s\n", msg);
+  dmainfo("  DMAC Registers:\n");
+  dmainfo("         CTRL: %04x      CRCCTRL: %04x      CRCDATAIN: %08x  CRCCHKSUM: %08x\n",
+          regs->ctrl, regs->crcctrl, regs->crcdatain, regs->crcchksum);
+  dmainfo("    CRCSTATUS: %02x        DBGCTRL: %02x          QOSCTRL: %02x       SWTRIGCTRL: %08x\n",
+          regs->crcstatus, regs->errctrl, regs->qosctrl, regs->swtrigctrl);
+  dmainfo("     PRICTRL0: %08x  INTPEND: %04x     INSTSTATUS: %08x     BUSYCH: %08x\n",
+          regs->prictrl0, regs->intpend, regs->intstatus, regs->busych);
+  dmainfo("       PENDCH: %08x   ACTIVE: %08x   BASEADDR: %08x    WRBADDR: %08x\n",
+          regs->pendch, regs->active, regs->baseaddr, regs->wrbaddr);
+  dmainfo("         CHID: %02x       CHCRTRLA: %02x         CHCRTRLB: %08x   CHINFLAG: %02x\n",
+          regs->chid, regs->chctrla, regs->chctrlb, regs->chintflag,
+  dmainfo("     CHSTATUS: %02x\n",
+          regs->chstatus);
 }
-#endif /* CONFIG_DEBUG_DMA */
+#endif /* CONFIG_DEBUG_DMA_INFO */
 #endif /* CONFIG_SAMDL_DMAC */
diff --git a/arch/arm/src/samdl/sam_dmac.h b/arch/arm/src/samdl/sam_dmac.h
index cc1c60e7a0cd781d2d37aed06b533b53428ccd0b..2a6937dd6820014c626c3a88d8c86b2655b26471 100644
--- a/arch/arm/src/samdl/sam_dmac.h
+++ b/arch/arm/src/samdl/sam_dmac.h
@@ -62,12 +62,6 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* Configuration ********************************************************************/
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_DMA
-#endif
-
 /* DMA ******************************************************************************/
 
 /* Flags used to characterize the desired DMA channel.  The naming convention is that
@@ -157,7 +151,7 @@ typedef void (*dma_callback_t)(DMA_HANDLE handle, void *arg, int result);
 
 /* The following is used for sampling DMA registers when CONFIG DEBUG_DMA is selected */
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 struct sam_dmaregs_s
 {
   /* DMAC Registers */
@@ -321,7 +315,7 @@ void sam_dmastop(DMA_HANDLE handle);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs);
 #else
 #  define sam_dmasample(handle,regs)
@@ -335,7 +329,7 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void sam_dmadump(DMA_HANDLE handle, const struct sam_dmaregs_s *regs,
                  const char *msg);
 #else
diff --git a/arch/arm/src/samdl/sam_idle.c b/arch/arm/src/samdl/sam_idle.c
index be58de12be6351cf9b21f970441e583dcb33a8f0..b791f991191802b2f40b21a88efa6d431d23476c 100644
--- a/arch/arm/src/samdl/sam_idle.c
+++ b/arch/arm/src/samdl/sam_idle.c
@@ -99,7 +99,7 @@ static void up_idlepm(void)
 
       /* Perform board-specific, state-dependent logic here */
 
-      llvdbg("newstate= %d oldstate=%d\n", newstate, oldstate);
+      _info("newstate= %d oldstate=%d\n", newstate, oldstate);
 
       /* Then force the global state change */
 
diff --git a/arch/arm/src/samdl/sam_irq.c b/arch/arm/src/samdl/sam_irq.c
index 3f12b9943ac58f79823e36f3b285fd8f5b8c9834..6d3deeb2e8379f613a62989e575af35c3bad8f4e 100644
--- a/arch/arm/src/samdl/sam_irq.c
+++ b/arch/arm/src/samdl/sam_irq.c
@@ -93,27 +93,27 @@ volatile uint32_t *g_current_regs[1];
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
-static int sam_nmi(int irq, FAR void *context)
+#ifdef CONFIG_DEBUG_FEATURES
+static int sam_nmi(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! NMI received\n");
+  _err("PANIC!!! NMI received\n");
   PANIC();
   return 0;
 }
 
-static int sam_pendsv(int irq, FAR void *context)
+static int sam_pendsv(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! PendSV received\n");
+  _err("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
 }
 
-static int sam_reserved(int irq, FAR void *context)
+static int sam_reserved(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Reserved interrupt\n");
+  _err("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;
 }
@@ -187,15 +187,15 @@ void up_irqinitialize(void)
    * under certain conditions.
    */
 
-  irq_attach(SAM_IRQ_SVCALL, up_svcall);
-  irq_attach(SAM_IRQ_HARDFAULT, up_hardfault);
+  irq_attach(SAM_IRQ_SVCALL, up_svcall, NULL);
+  irq_attach(SAM_IRQ_HARDFAULT, up_hardfault, NULL);
 
   /* Attach all other processor exceptions (except reset and sys tick) */
 
-#ifdef CONFIG_DEBUG
-  irq_attach(SAM_IRQ_NMI, sam_nmi);
-  irq_attach(SAM_IRQ_PENDSV, sam_pendsv);
-  irq_attach(SAM_IRQ_RESERVED, sam_reserved);
+#ifdef CONFIG_DEBUG_FEATURES
+  irq_attach(SAM_IRQ_NMI, sam_nmi, NULL);
+  irq_attach(SAM_IRQ_PENDSV, sam_pendsv, NULL);
+  irq_attach(SAM_IRQ_RESERVED, sam_reserved, NULL);
 #endif
 
   sam_dumpnvic("initial", NR_IRQS);
@@ -299,34 +299,34 @@ void up_ack_irq(int irq)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_IRQ
+#ifdef CONFIG_DEBUG_IRQ_INFO
 void sam_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = enter_critical_section();
 
-  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  lldbg("  ISER:       %08x ICER:   %08x\n",
-        getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER));
-  lldbg("  ISPR:       %08x ICPR:   %08x\n",
-        getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
-  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
-        getreg32(ARMV6M_NVIC_IPR0), getreg32(ARMV6M_NVIC_IPR1),
-        getreg32(ARMV6M_NVIC_IPR2), getreg32(ARMV6M_NVIC_IPR3));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(ARMV6M_NVIC_IPR4), getreg32(ARMV6M_NVIC_IPR5),
-        getreg32(ARMV6M_NVIC_IPR6), getreg32(ARMV6M_NVIC_IPR7));
-
-  lldbg("SYSCON:\n");
-  lldbg("  CPUID:      %08x\n",
-        getreg32(ARMV6M_SYSCON_CPUID));
-  lldbg("  ICSR:       %08x AIRCR:  %08x\n",
-        getreg32(ARMV6M_SYSCON_ICSR), getreg32(ARMV6M_SYSCON_AIRCR));
-  lldbg("  SCR:        %08x CCR:    %08x\n",
-        getreg32(ARMV6M_SYSCON_SCR), getreg32(ARMV6M_SYSCON_CCR));
-  lldbg("  SHPR2:      %08x SHPR3:  %08x\n",
-        getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
+  irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
+  irqinfo("  ISER:       %08x ICER:   %08x\n",
+          getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER));
+  irqinfo("  ISPR:       %08x ICPR:   %08x\n",
+          getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
+  irqinfo("  IRQ PRIO:   %08x %08x %08x %08x\n",
+          getreg32(ARMV6M_NVIC_IPR0), getreg32(ARMV6M_NVIC_IPR1),
+          getreg32(ARMV6M_NVIC_IPR2), getreg32(ARMV6M_NVIC_IPR3));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(ARMV6M_NVIC_IPR4), getreg32(ARMV6M_NVIC_IPR5),
+          getreg32(ARMV6M_NVIC_IPR6), getreg32(ARMV6M_NVIC_IPR7));
+
+  irqinfo("SYSCON:\n");
+  irqinfo("  CPUID:      %08x\n",
+          getreg32(ARMV6M_SYSCON_CPUID));
+  irqinfo("  ICSR:       %08x AIRCR:  %08x\n",
+          getreg32(ARMV6M_SYSCON_ICSR), getreg32(ARMV6M_SYSCON_AIRCR));
+  irqinfo("  SCR:        %08x CCR:    %08x\n",
+          getreg32(ARMV6M_SYSCON_SCR), getreg32(ARMV6M_SYSCON_CCR));
+  irqinfo("  SHPR2:      %08x SHPR3:  %08x\n",
+          getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
 
   leave_critical_section(flags);
 }
diff --git a/arch/arm/src/samdl/sam_irq.h b/arch/arm/src/samdl/sam_irq.h
index ddc5a7ada5204f9a5a3bd116b68f513aaf567f3a..ea26cbd159364058cf0582e2a614b279bb0e7b1f 100644
--- a/arch/arm/src/samdl/sam_irq.h
+++ b/arch/arm/src/samdl/sam_irq.h
@@ -43,23 +43,7 @@
 #include 
 
 /************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/************************************************************************************
- * Public Types
- ************************************************************************************/
-
-/************************************************************************************
- * Public Data
- ************************************************************************************/
-
-/************************************************************************************
- * Inline Functions
- ************************************************************************************/
-
-/************************************************************************************
- * Public Functions
+ * Public Function Prototypes
  ************************************************************************************/
 
 /****************************************************************************
@@ -70,7 +54,7 @@
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_IRQ
+#ifdef CONFIG_DEBUG_IRQ_INFO
 void sam_dumpnvic(const char *msg, int irq);
 #else
 #  define sam_dumpnvic(msg, irq)
diff --git a/arch/arm/src/samdl/sam_port.c b/arch/arm/src/samdl/sam_port.c
index 53c8664efdf97d96710f7312521b6c14b2cfb472..8ba1e1f88cb94bdb5fa1ff81b79dcf034c9abe91 100644
--- a/arch/arm/src/samdl/sam_port.c
+++ b/arch/arm/src/samdl/sam_port.c
@@ -62,7 +62,7 @@
  * Private Data
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_PORT
+#ifdef CONFIG_DEBUG_GPIO_INFO
 static const char g_portchar[2]   = { 'A', 'B' };
 #endif
 
@@ -521,7 +521,7 @@ bool sam_portread(port_pinset_t pinset)
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_PORT
+#ifdef CONFIG_DEBUG_GPIO_INFO
 int sam_dumpport(uint32_t pinset, const char *msg)
 {
   irqstate_t    flags;
@@ -538,20 +538,20 @@ int sam_dumpport(uint32_t pinset, const char *msg)
   /* The following requires exclusive access to the PORT registers */
 
   flags = enter_critical_section();
-  lldbg("PORT%c pin: %d pinset: %08x base: %08x -- %s\n",
-        g_portchar[port], pin, pinset, base, msg);
-  lldbg("  DIR: %08x OUT: %08x IN: %08x\n",
-        getreg32(base + SAM_PORT_DIR_OFFSET),
-        getreg32(base + SAM_PORT_OUT_OFFSET),
-        getreg32(base + SAM_PORT_IN_OFFSET));
-  lldbg("  CTRL: %08x WRCONFIG: %08x\n",
-        getreg32(base + SAM_PORT_CTRL_OFFSET),
-        getreg32(base + SAM_PORT_WRCONFIG_OFFSET));
-  lldbg("  PMUX[%08x]: %02x PINCFG[%08x]: %02x\n",
-        base + SAM_PORT_PMUX_OFFSET(pin),
-        getreg8(base + SAM_PORT_PMUX_OFFSET(pin)),
-        base + SAM_PORT_PINCFG_OFFSET(pin),
-        getreg8(base + SAM_PORT_PINCFG_OFFSET(pin)));
+  gpioinfo("PORT%c pin: %d pinset: %08x base: %08x -- %s\n",
+           g_portchar[port], pin, pinset, base, msg);
+  gpioinfo("  DIR: %08x OUT: %08x IN: %08x\n",
+           getreg32(base + SAM_PORT_DIR_OFFSET),
+           getreg32(base + SAM_PORT_OUT_OFFSET),
+           getreg32(base + SAM_PORT_IN_OFFSET));
+  gpioinfo("  CTRL: %08x WRCONFIG: %08x\n",
+           getreg32(base + SAM_PORT_CTRL_OFFSET),
+           getreg32(base + SAM_PORT_WRCONFIG_OFFSET));
+  gpioinfo("  PMUX[%08x]: %02x PINCFG[%08x]: %02x\n",
+           base + SAM_PORT_PMUX_OFFSET(pin),
+           getreg8(base + SAM_PORT_PMUX_OFFSET(pin)),
+           base + SAM_PORT_PINCFG_OFFSET(pin),
+           getreg8(base + SAM_PORT_PINCFG_OFFSET(pin)));
 
   leave_critical_section(flags);
   return OK;
diff --git a/arch/arm/src/samdl/sam_port.h b/arch/arm/src/samdl/sam_port.h
index 26ba8bcb5d3562617a54ab2552d2cc20cba4a2f1..3e9704cd141fe23b4c71e1c76e90b1a336b9c78b 100644
--- a/arch/arm/src/samdl/sam_port.h
+++ b/arch/arm/src/samdl/sam_port.h
@@ -379,7 +379,7 @@ bool sam_portread(port_pinset_t pinset);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 int sam_dumpport(port_pinset_t pinset, const char *msg);
 #else
 #  define sam_dumpport(p,m)
diff --git a/arch/arm/src/samdl/sam_sercom.c b/arch/arm/src/samdl/sam_sercom.c
index ae50ca39c1e3a779a2d481782f713a60517951ea..779db03738fff4175e4f97ba20d3277d9a41859c 100644
--- a/arch/arm/src/samdl/sam_sercom.c
+++ b/arch/arm/src/samdl/sam_sercom.c
@@ -68,14 +68,6 @@
 #  define HAVE_SERCOM0_4
 #endif
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -162,9 +154,9 @@ void sercom_slowclk_configure(int sercom, int gclkgen)
 #ifdef CONFIG_SAMDL_SERCOM5
   static bool configured5 = false;
 #endif
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ASSERTIONS
 #ifdef HAVE_SERCOM0_4
-  static uint8_t slowgen  = 0xff;
+  static uint8_t slowgen04  = 0xff;
 #endif
 #ifdef CONFIG_SAMDL_SERCOM5
   static uint8_t slowgen5 = 0xff;
@@ -205,19 +197,19 @@ void sercom_slowclk_configure(int sercom, int gclkgen)
            */
 
           configured = true;
-#ifdef CONFIG_DEBUG
-          slowgen    = (uint8_t)gclkgen;
+#ifdef CONFIG_DEBUG_ASSERTIONS
+          slowgen04  = (uint8_t)gclkgen;
 #endif
         }
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ASSERTIONS
       /* Already configured.  This is okay provided that the same GCLK
        * generator is being used.  Otherwise, there is a problem.
        */
 
       else
         {
-          DEBUGASSERT((int)slowgen == gclkgen);
+          DEBUGASSERT((int)slowgen04 == gclkgen);
         }
 #endif
       break;
@@ -236,12 +228,12 @@ void sercom_slowclk_configure(int sercom, int gclkgen)
            */
 
           configured5 = true;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ASSERTIONS
           slowgen5    = (uint8_t)gclkgen;
 #endif
         }
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ASSERTIONS
       /* Already configured.  This is okay provided that the same GCLK
        * generator is being used.  Otherwise, there is a problem.
        */
diff --git a/arch/arm/src/samdl/sam_serial.c b/arch/arm/src/samdl/sam_serial.c
index ac94f694acf05153a44f7be1e754f071983f453c..8c88850acc6f80c20025f8271d58aeada12c4ccf 100644
--- a/arch/arm/src/samdl/sam_serial.c
+++ b/arch/arm/src/samdl/sam_serial.c
@@ -228,8 +228,6 @@ struct sam_dev_s
   const struct sam_usart_config_s * const config;
 
   /* Information unique to the serial driver */
-
-  xcpt_t handler;        /* Interrupt handler */
 };
 
 /****************************************************************************
@@ -249,26 +247,7 @@ static inline void
             sam_serialout16(struct sam_dev_s *priv, int offset,
               uint16_t regval);
 static void sam_disableallints(struct sam_dev_s *priv);
-static int  sam_interrupt(struct uart_dev_s *dev);
-
-#ifdef SAMDL_HAVE_USART0
-static int  sam_usart0_interrupt(int irq, void *context);
-#endif
-#ifdef SAMDL_HAVE_USART1
-static int  sam_usart1_interrupt(int irq, void *context);
-#endif
-#ifdef SAMDL_HAVE_USART2
-static int  sam_usart2_interrupt(int irq, void *context);
-#endif
-#ifdef SAMDL_HAVE_USART3
-static int  sam_usart3_interrupt(int irq, void *context);
-#endif
-#ifdef SAMDL_HAVE_USART4
-static int  sam_usart4_interrupt(int irq, void *context);
-#endif
-#ifdef SAMDL_HAVE_USART5
-static int  sam_usart5_interrupt(int irq, void *context);
-#endif
+static int  sam_interrupt(int irq, void *context, FAR void *arg);
 
 /* UART methods */
 
@@ -340,7 +319,6 @@ static char g_usart5txbuffer[CONFIG_USART5_TXBUFSIZE];
 static struct sam_dev_s g_usart0priv =
 {
   .config   = &g_usart0config,
-  .handler  = sam_usart0_interrupt,
 };
 
 static uart_dev_t g_usart0port =
@@ -366,7 +344,6 @@ static uart_dev_t g_usart0port =
 static struct sam_dev_s g_usart1priv =
 {
   .config   = &g_usart1config,
-  .handler  = sam_usart1_interrupt,
 };
 
 static uart_dev_t g_usart1port =
@@ -392,7 +369,6 @@ static uart_dev_t g_usart1port =
 static struct sam_dev_s g_usart2priv =
 {
   .config   = &g_usart2config,
-  .handler  = sam_usart2_interrupt,
 };
 
 static uart_dev_t g_usart2port =
@@ -418,7 +394,6 @@ static uart_dev_t g_usart2port =
 static struct sam_dev_s g_usart3priv =
 {
   .config   = &g_usart3config,
-  .handler  = sam_usart3_interrupt,
 };
 
 static uart_dev_t g_usart3port =
@@ -444,7 +419,6 @@ static uart_dev_t g_usart3port =
 static struct sam_dev_s g_usart4priv =
 {
   .config   = &g_usart4config,
-  .handler  = sam_usart4_interrupt,
 };
 
 static uart_dev_t g_usart4port =
@@ -470,7 +444,6 @@ static uart_dev_t g_usart4port =
 static struct sam_dev_s g_usart5priv =
 {
   .config   = &g_usart5config,
-  .handler  = sam_usart5_interrupt,
 };
 
 static uart_dev_t g_usart5port =
@@ -555,13 +528,17 @@ static void sam_disableallints(struct sam_dev_s *priv)
  *
  ****************************************************************************/
 
-static int sam_interrupt(struct uart_dev_s *dev)
+static int sam_interrupt(int irq, void *context, FAR void *arg)
 {
-  struct sam_dev_s *priv = (struct sam_dev_s *)dev->priv;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
+  struct sam_dev_s *priv;
   uint8_t pending;
   uint8_t intflag;
   uint8_t inten;
 
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
+  priv = (struct sam_dev_s *)dev->priv;
+
   /* Get the set of pending USART interrupts (we are only interested in the
    * unmasked interrupts).
    */
@@ -599,57 +576,6 @@ static int sam_interrupt(struct uart_dev_s *dev)
   return OK;
 }
 
-/****************************************************************************
- * Name: sam_usartN_interrupt
- *
- * Description:
- *   Handle each SERCOM USART interrupt by calling the common interrupt
- *   handling logic with the USART-specific state.
- *
- ****************************************************************************/
-
-#ifdef SAMDL_HAVE_USART0
-static int  sam_usart0_interrupt(int irq, void *context)
-{
-  return sam_interrupt(&g_usart0port);
-}
-#endif
-
-#ifdef SAMDL_HAVE_USART1
-static int  sam_usart1_interrupt(int irq, void *context)
-{
-  return sam_interrupt(&g_usart1port);
-}
-#endif
-
-#ifdef SAMDL_HAVE_USART2
-static int  sam_usart2_interrupt(int irq, void *context)
-{
-  return sam_interrupt(&g_usart2port);
-}
-#endif
-
-#ifdef SAMDL_HAVE_USART3
-static int  sam_usart3_interrupt(int irq, void *context)
-{
-  return sam_interrupt(&g_usart3port);
-}
-#endif
-
-#ifdef SAMDL_HAVE_USART4
-static int  sam_usart4_interrupt(int irq, void *context)
-{
-  return sam_interrupt(&g_usart4port);
-}
-#endif
-
-#ifdef SAMDL_HAVE_USART5
-static int  sam_usart5_interrupt(int irq, void *context)
-{
-  return sam_interrupt(&g_usart5port);
-}
-#endif
-
 /****************************************************************************
  * Name: sam_setup
  *
@@ -726,7 +652,7 @@ static int sam_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(config->irq, priv->handler);
+  ret = irq_attach(config->irq, sam_interrupt, dev);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
diff --git a/arch/arm/src/samdl/sam_spi.c b/arch/arm/src/samdl/sam_spi.c
index 2a7df796bac1498d4ada4b8e47f25eb67f556605..cc17758d86af129ae6bea2304fb6c300419bdbfc 100644
--- a/arch/arm/src/samdl/sam_spi.c
+++ b/arch/arm/src/samdl/sam_spi.c
@@ -74,34 +74,13 @@
 #ifdef SAMDL_HAVE_SPI
 
 /****************************************************************************
- * Pre-processor Definitions
+ * Pre-process Definitions
  ****************************************************************************/
 
-/* Clocking *****************************************************************/
-
-/* Debug *******************************************************************/
-/* Check if SPI debug is enabled (non-standard.. no support in
- * include/debug.h
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_SPI
+#ifndef CONFIG_DEBUG_SPI_INFO
 #  undef CONFIG_SAMDL_SPI_REGDEBUG
 #endif
 
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -175,7 +154,7 @@ static uint32_t spi_getreg32(struct sam_spidev_s *priv,
 static void     spi_putreg32(struct sam_spidev_s *priv, uint32_t regval,
                   unsigned int offset);
 
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_SPI_INFO
 static void     spi_dumpregs(struct sam_spidev_s *priv, const char *msg);
 #else
 # define        spi_dumpregs(priv,msg)
@@ -184,26 +163,7 @@ static void     spi_dumpregs(struct sam_spidev_s *priv, const char *msg);
 /* Interrupt handling */
 
 #if 0 /* Not used */
-static int  spi_interrupt(struct sam_spidev_s *dev);
-
-#ifdef SAMDL_HAVE_SPI0
-static int  spi0_interrupt(int irq, void *context);
-#endif
-#ifdef SAMDL_HAVE_SPI1
-static int  spi1_interrupt(int irq, void *context);
-#endif
-#ifdef SAMDL_HAVE_SPI2
-static int  spi2_interrupt(int irq, void *context);
-#endif
-#ifdef SAMDL_HAVE_SPI3
-static int  spi3_interrupt(int irq, void *context);
-#endif
-#ifdef SAMDL_HAVE_SPI4
-static int  spi4_interrupt(int irq, void *context);
-#endif
-#ifdef SAMDL_HAVE_SPI5
-static int  spi5_interrupt(int irq, void *context);
-#endif
+static int  spi_interrupt(int irq, void *context, FAR void *arg);
 #endif
 
 /* SPI methods */
@@ -276,9 +236,6 @@ static struct sam_spidev_s g_spi0dev =
   .muxconfig = BOARD_SERCOM0_MUXCONFIG,
   .srcfreq   = BOARD_SERCOM0_FREQUENCY,
   .base      = SAM_SERCOM0_BASE,
-#if 0 /* Not used */
-  .handler   = spi0_interrupt,
-#endif
   .spilock   = SEM_INITIALIZER(1),
 };
 #endif
@@ -325,9 +282,6 @@ static struct sam_spidev_s g_spi1dev =
   .muxconfig = BOARD_SERCOM1_MUXCONFIG,
   .srcfreq   = BOARD_SERCOM1_FREQUENCY,
   .base      = SAM_SERCOM1_BASE,
-#if 0 /* Not used */
-  .handler   = spi1_interrupt,
-#endif
   .spilock   = SEM_INITIALIZER(1),
 };
 #endif
@@ -374,9 +328,6 @@ static struct sam_spidev_s g_spi2dev =
   .muxconfig = BOARD_SERCOM2_MUXCONFIG,
   .srcfreq   = BOARD_SERCOM2_FREQUENCY,
   .base      = SAM_SERCOM2_BASE,
-#if 0 /* Not used */
-  .handler   = spi2_interrupt,
-#endif
   .spilock   = SEM_INITIALIZER(1),
 };
 #endif
@@ -423,9 +374,6 @@ static struct sam_spidev_s g_spi3dev =
   .muxconfig = BOARD_SERCOM3_MUXCONFIG,
   .srcfreq   = BOARD_SERCOM3_FREQUENCY,
   .base      = SAM_SERCOM3_BASE,
-#if 0 /* Not used */
-  .handler   = spi3_interrupt,
-#endif
   .spilock   = SEM_INITIALIZER(1),
 };
 #endif
@@ -472,9 +420,6 @@ static struct sam_spidev_s g_spi4dev =
   .muxconfig = BOARD_SERCOM4_MUXCONFIG,
   .srcfreq   = BOARD_SERCOM4_FREQUENCY,
   .base      = SAM_SERCOM4_BASE,
-#if 0 /* Not used */
-  .handler   = spi4_interrupt,
-#endif
   .spilock   = SEM_INITIALIZER(1),
 };
 #endif
@@ -521,9 +466,6 @@ static struct sam_spidev_s g_spi5dev =
   .muxconfig = BOARD_SERCOM5_MUXCONFIG,
   .srcfreq   = BOARD_SERCOM5_FREQUENCY,
   .base      = SAM_SERCOM5_BASE,
-#if 0 /* Not used */
-  .handler   = spi5_interrupt,
-#endif
   .spilock   = SEM_INITIALIZER(1),
 };
 #endif
@@ -569,7 +511,7 @@ static bool spi_checkreg(struct sam_spidev_s *priv, bool wr, uint32_t regval,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", priv->ntimes);
+          spiinfo("...[Repeats %d times]...\n", priv->ntimes);
         }
 
       /* Save information about the new access */
@@ -602,7 +544,7 @@ static uint8_t spi_getreg8(struct sam_spidev_s *priv, unsigned int offset)
 #ifdef CONFIG_SAMDL_SPI_REGDEBUG
   if (spi_checkreg(priv, false, (uint32_t)regval, regaddr))
     {
-      lldbg("%08x->%02x\n", regaddr, regval);
+      spiinfo("%08x->%02x\n", regaddr, regval);
     }
 #endif
 
@@ -625,7 +567,7 @@ static void spi_putreg8(struct sam_spidev_s *priv, uint8_t regval,
 #ifdef CONFIG_SAMDL_SPI_REGDEBUG
   if (spi_checkreg(priv, true, (uint32_t)regval, regaddr))
     {
-      lldbg("%08x<-%02x\n", regaddr, regval);
+      spiinfo("%08x<-%02x\n", regaddr, regval);
     }
 #endif
 
@@ -648,7 +590,7 @@ static uint16_t spi_getreg16(struct sam_spidev_s *priv, unsigned int offset)
 #ifdef CONFIG_SAMDL_SPI_REGDEBUG
   if (spi_checkreg(priv, false, (uint32_t)regval, regaddr))
     {
-      lldbg("%08x->%04x\n", regaddr, regval);
+      spiinfo("%08x->%04x\n", regaddr, regval);
     }
 #endif
 
@@ -671,7 +613,7 @@ static void spi_putreg16(struct sam_spidev_s *priv, uint16_t regval,
 #ifdef CONFIG_SAMDL_SPI_REGDEBUG
   if (spi_checkreg(priv, true, (uint32_t)regval, regaddr))
     {
-      lldbg("%08x<-%04x\n", regaddr, regval);
+      spiinfo("%08x<-%04x\n", regaddr, regval);
     }
 #endif
 
@@ -694,7 +636,7 @@ static uint32_t spi_getreg32(struct sam_spidev_s *priv, unsigned int offset)
 #ifdef CONFIG_SAMDL_SPI_REGDEBUG
   if (spi_checkreg(priv, false, regval, regaddr))
     {
-      lldbg("%08x->%08x\n", regaddr, regval);
+      spiinfo("%08x->%08x\n", regaddr, regval);
     }
 #endif
 
@@ -717,7 +659,7 @@ static void spi_putreg32(struct sam_spidev_s *priv, uint32_t regval,
 #ifdef CONFIG_SAMDL_SPI_REGDEBUG
   if (spi_checkreg(priv, true, regval, regaddr))
     {
-      lldbg("%08x<-%08x\n", regaddr, regval);
+      spiinfo("%08x<-%08x\n", regaddr, regval);
     }
 #endif
 
@@ -739,19 +681,19 @@ static void spi_putreg32(struct sam_spidev_s *priv, uint32_t regval,
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_SPI_INFO
 static void spi_dumpregs(struct sam_spidev_s *priv, const char *msg)
 {
-  spivdbg("%s:\n", msg);
-  spivdbg("   CTRLA:%08x CTRLB:%08x DBGCTRL:%02x\n",
+  spiinfo("%s:\n", msg);
+  spiinfo("   CTRLA:%08x CTRLB:%08x DBGCTRL:%02x\n",
           getreg32(priv->base + SAM_SPI_CTRLA_OFFSET),
           getreg32(priv->base + SAM_SPI_CTRLB_OFFSET),
           getreg8(priv->base + SAM_SPI_DBGCTRL_OFFSET));
-  spivdbg("    BAUD:%02x       INTEN:%02x       INTFLAG:%02x\n",
+  spiinfo("    BAUD:%02x       INTEN:%02x       INTFLAG:%02x\n",
           getreg8(priv->base + SAM_SPI_BAUD_OFFSET),
           getreg8(priv->base + SAM_SPI_INTENCLR_OFFSET),
           getreg8(priv->base + SAM_SPI_INTFLAG_OFFSET));
-  spivdbg("  STATUS:%04x      ADDR:%08x\n",
+  spiinfo("  STATUS:%04x      ADDR:%08x\n",
           getreg16(priv->base + SAM_SPI_STATUS_OFFSET),
           getreg32(priv->base + SAM_SPI_ADDR_OFFSET));
 }
@@ -769,13 +711,15 @@ static void spi_dumpregs(struct sam_spidev_s *priv, const char *msg)
  ****************************************************************************/
 
 #if 0 /* Not used */
-static int spi_interrupt(struct sam_spidev_s *dev)
+static int spi_interrupt(int irq, void *context, FAR void *arg)
 {
-  struct sam_dev_s *priv = (struct sam_dev_s *)dev->priv;
+  struct sam_dev_s *priv = (struct sam_dev_s *)arg
   uint8_t pending;
   uint8_t intflag;
   uint8_t inten;
 
+  DEBUGASSERT(priv != NULL);
+
   /* Get the set of pending SPI interrupts (we are only interested in the
    * unmasked interrupts).
    */
@@ -812,59 +756,6 @@ static int spi_interrupt(struct sam_spidev_s *dev)
 }
 #endif
 
-/****************************************************************************
- * Name: spiN_interrupt
- *
- * Description:
- *   Handle each SERCOM SPI interrupt by calling the common interrupt
- *   handling logic with the SPI-specific state.
- *
- ****************************************************************************/
-
-#if 0 /* Not used */
-#ifdef SAMDL_HAVE_SPI0
-static int  spi0_interrupt(int irq, void *context)
-{
-  return spi_interrupt(&g_spi0dev);
-}
-#endif
-
-#ifdef SAMDL_HAVE_SPI1
-static int  spi1_interrupt(int irq, void *context)
-{
-  return spi_interrupt(&g_spi1dev);
-}
-#endif
-
-#ifdef SAMDL_HAVE_SPI2
-static int  spi2_interrupt(int irq, void *context)
-{
-  return spi_interrupt(&g_spi2dev);
-}
-#endif
-
-#ifdef SAMDL_HAVE_SPI3
-static int  spi3_interrupt(int irq, void *context)
-{
-  return spi_interrupt(&g_spi3dev);
-}
-#endif
-
-#ifdef SAMDL_HAVE_SPI4
-static int  spi4_interrupt(int irq, void *context)
-{
-  return spi_interrupt(&g_spi4dev);
-}
-#endif
-
-#ifdef SAMDL_HAVE_SPI5
-static int  spi5_interrupt(int irq, void *context)
-{
-  return spi_interrupt(&g_spi5dev);
-}
-#endif
-#endif
-
 /****************************************************************************
  * Name: spi_lock
  *
@@ -890,7 +781,7 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
 {
   struct sam_spidev_s *priv = (struct sam_spidev_s *)dev;
 
-  spivdbg("lock=%d\n", lock);
+  spiinfo("lock=%d\n", lock);
   if (lock)
     {
       /* Take the semaphore (perhaps waiting) */
@@ -935,7 +826,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
   uint32_t baud;
   uint32_t ctrla;
 
-  spivdbg("sercom=%d frequency=%d\n", priv->sercom, frequency);
+  spiinfo("sercom=%d frequency=%d\n", priv->sercom, frequency);
 
   /* Check if the configured BAUD is within the valid range */
 
@@ -944,7 +835,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
     {
       /* Set the frequency to the maximum */
 
-      spidbg("ERROR: Cannot realize frequency: %ld\n", (long)frequency);
+      spierr("ERROR: Cannot realize frequency: %ld\n", (long)frequency);
       frequency = maxfreq;
     }
 
@@ -975,7 +866,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
 
   if (baud > 255)
     {
-      spidbg("ERROR: BAUD is out of range: %ld\n", (long)baud);
+      spierr("ERROR: BAUD is out of range: %ld\n", (long)baud);
       baud = 255;
     }
 
@@ -1016,7 +907,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
   priv->frequency = frequency;
   priv->actual    = actual;
 
-  spivdbg("Frequency %d->%d\n", frequency, actual);
+  spiinfo("Frequency %d->%d\n", frequency, actual);
   return actual;
 }
 
@@ -1040,7 +931,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
   struct sam_spidev_s *priv = (struct sam_spidev_s *)dev;
   uint32_t regval;
 
-  spivdbg("sercom=%d mode=%d\n", priv->sercom, mode);
+  spiinfo("sercom=%d mode=%d\n", priv->sercom, mode);
 
   /* Has the mode changed? */
 
@@ -1101,7 +992,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
   struct sam_spidev_s *priv = (struct sam_spidev_s *)dev;
   uint32_t regval;
 
-  spivdbg("sercom=%d nbits=%d\n", priv->sercom, nbits);
+  spiinfo("sercom=%d nbits=%d\n", priv->sercom, nbits);
   DEBUGASSERT(priv && nbits > 7 && nbits < 10);
 
   /* Has the number of bits changed? */
@@ -1156,7 +1047,7 @@ static uint16_t spi_send(struct spi_dev_s *dev, uint16_t wd)
   rxbyte = (uint8_t)0;
   spi_exchange(dev, &txbyte, &rxbyte, 1);
 
-  spivdbg("Sent %02x received %02x\n", txbyte, rxbyte);
+  spiinfo("Sent %02x received %02x\n", txbyte, rxbyte);
   return (uint16_t)rxbyte;
 }
 
@@ -1194,7 +1085,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
   uint8_t *prx8;
   uint16_t data;
 
-  spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+  spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
 
   /* Set up data receive and transmit pointers */
 
@@ -1281,7 +1172,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
       data = spi_getreg16(priv, SAM_SPI_STATUS_OFFSET);
       if ((data & SPI_STATUS_BUFOVF) != 0)
         {
-          spidbg("ERROR: Buffer overflow!\n");
+          spierr("ERROR: Buffer overflow!\n");
 
           /* Clear the buffer overflow flag */
 
@@ -1438,7 +1329,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
 
   /* Get the port state structure */
 
-  spivdbg("port: %d \n", port);
+  spiinfo("port: %d \n", port);
 
 #ifdef SAMDL_HAVE_SPI0
   if (port == 0)
@@ -1488,7 +1379,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
   else
 #endif
     {
-      spidbg("ERROR: Unsupported port: %d\n", port);
+      spierr("ERROR: Unsupported port: %d\n", port);
       return NULL;
     }
 
@@ -1567,10 +1458,10 @@ struct spi_dev_s *sam_spibus_initialize(int port)
 #if 0 /* Not used */
   /* Attach and enable the SERCOM interrupt handler */
 
-  ret = irq_attach(priv->irq, priv->handler);
+  ret = irq_attach(priv->irq, spi_interrupt, priv);
   if (ret < 0)
     {
-      spidbg("ERROR: Failed to attach interrupt: %d\n", irq);
+      spierr("ERROR: Failed to attach interrupt: %d\n", irq);
       return NULL;
     }
 
diff --git a/arch/arm/src/samdl/sam_start.c b/arch/arm/src/samdl/sam_start.c
index e31a1b274df320404f28896d39d68c8dc8ddd299..f46e114fd66e41b78858a7151ca856d5ae723a27 100644
--- a/arch/arm/src/samdl/sam_start.c
+++ b/arch/arm/src/samdl/sam_start.c
@@ -91,7 +91,7 @@ const uint32_t g_idle_topstack = IDLE_STACK;
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG) && defined(HAVE_SERIAL_CONSOLE)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(HAVE_SERIAL_CONSOLE)
 #  define showprogress(c) sam_lowputc((uint32_t)c)
 #else
 #  define showprogress(c)
diff --git a/arch/arm/src/samdl/sam_timerisr.c b/arch/arm/src/samdl/sam_timerisr.c
index 327e8b72b037421a3948037decde0be14113f2ed..abc61f355f00562dbc8cf8f764bc5e1946c06619 100644
--- a/arch/arm/src/samdl/sam_timerisr.c
+++ b/arch/arm/src/samdl/sam_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/samdl/sam_timerisr.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -83,19 +83,11 @@
 #endif
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  sam_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -103,7 +95,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int sam_timerisr(int irq, uint32_t *regs, void *arg)
 {
   /* Process timer interrupt */
 
@@ -112,7 +104,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -120,7 +116,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t regval;
 
@@ -137,7 +133,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(SAM_IRQ_SYSTICK, (xcpt_t)up_timerisr);
+  (void)irq_attach(SAM_IRQ_SYSTICK, (xcpt_t)sam_timerisr, NULL);
 
   /* Enable SysTick interrupts */
 
diff --git a/arch/arm/src/samv7/Kconfig b/arch/arm/src/samv7/Kconfig
index 7a7d75c840844a32a17dbd895af281686e6834ab..5350bc43152fe53804aed772c85c424b29dae333 100644
--- a/arch/arm/src/samv7/Kconfig
+++ b/arch/arm/src/samv7/Kconfig
@@ -102,7 +102,7 @@ config ARCH_CHIP_SAME70Q
 	default n
 	select ARCH_CHIP_SAME70
 	select SAMV7_HAVE_MCAN1
-	select SAMV7_HAVE_DAC1
+	select SAMV7_HAVE_DAC1 if !SAMV7_EMAC0
 	select SAMV7_HAVE_EBI
 	select SAMV7_HAVE_HSMCI0
 	select SAMV7_HAVE_SDRAMC
@@ -119,7 +119,7 @@ config ARCH_CHIP_SAME70N
 	default n
 	select ARCH_CHIP_SAME70
 	select SAMV7_HAVE_MCAN1
-	select SAMV7_HAVE_DAC1
+	select SAMV7_HAVE_DAC1 if !SAMV7_EMAC0
 	select SAMV7_HAVE_HSMCI0
 	select SAMV7_HAVE_SPI0
 	select SAMV7_HAVE_TWIHS2
@@ -152,7 +152,7 @@ config ARCH_CHIP_SAMV71Q
 	default n
 	select ARCH_CHIP_SAMV71
 	select SAMV7_HAVE_MCAN1
-	select SAMV7_HAVE_DAC1
+	select SAMV7_HAVE_DAC1 if !SAMV7_EMAC0
 	select SAMV7_HAVE_EBI
 	select SAMV7_HAVE_HSMCI0
 	select SAMV7_HAVE_SDRAMC
@@ -169,7 +169,7 @@ config ARCH_CHIP_SAMV71N
 	default n
 	select ARCH_CHIP_SAMV71
 	select SAMV7_HAVE_MCAN1
-	select SAMV7_HAVE_DAC1
+	select SAMV7_HAVE_DAC1 if !SAMV7_EMAC0
 	select SAMV7_HAVE_HSMCI0
 	select SAMV7_HAVE_SPI0
 	select SAMV7_HAVE_TWIHS2
@@ -196,6 +196,10 @@ config SAMV7_HAVE_MCAN1
 	bool
 	default n
 
+config SAMV7_DAC
+	bool
+	default n
+
 config SAMV7_HAVE_DAC1
 	bool
 	default n
@@ -334,10 +338,12 @@ config SAMV7_MCAN1
 config SAMV7_DAC0
 	bool "Digital To Analog Converter 0 (DAC0)"
 	default n
+	select SAMV7_DAC
 
 config SAMV7_DAC1
 	bool "Digital To Analog Converter 1 (DAC1)"
 	default n
+	select SAMV7_DAC
 	depends on SAMV7_HAVE_DAC1
 
 config SAMV7_EBI
@@ -687,8 +693,8 @@ config SAMV7_WDT_INTERRUPT
 
 config SAMV7_WDT_DEBUGHALT
 	bool "Halt on DEBUG"
-	default y if DEBUG
-	default n if !DEBUG
+	default y if DEBUG_FEATURES
+	default n if !DEBUG_FEATURES
 	---help---
 		Halt the watchdog timer in the debug state
 
@@ -701,7 +707,7 @@ config SAMV7_WDT_IDLEHALT
 config SAMV7_WDT_REGDEBUG
 	bool "Register level debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_WATCHDOG_INFO
 	---help---
 		Enable low-level register debug output
 
@@ -721,8 +727,8 @@ config SAMV7_RSWDT_INTERRUPT
 
 config SAMV7_RSWDT_DEBUGHALT
 	bool "Halt on DEBUG"
-	default y if DEBUG
-	default n if !DEBUG
+	default y if DEBUG_FEATURES
+	default n if !DEBUG_FEATURES
 	---help---
 		Halt the watchdog timer in the debug state
 
@@ -735,7 +741,7 @@ config SAMV7_RSWDT_IDLEHALT
 config SAMV7_RSWDT_REGDEBUG
 	bool "Register level debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_WATCHDOG_INFO
 	---help---
 		Enable low-level register debug output
 
@@ -835,6 +841,23 @@ config SAMV7_SPI_CS_DECODING
 	---help---
 		Use Peripheral Chip Select Decoding on SPI Master
 
+config SAMV7_SPI_VARSELECT
+	bool "SPI Variable Peripheral Select Mode"
+	default n
+	---help---
+		When enabled, the spi device is working in the "Variable Peripheral
+		Select Mode" (VARMODE) instead of the "Fixed Peripheral Select Mode"
+		(FIXEDMODE).
+
+		In FIXEDMODE the ChipSelect is set (once) with a call to spi_select and
+		stays the same value all the time. In addition an eventually signaled
+		LASTXFER has to be written to the global control register (SPI_CR).
+		Within the VARMODE, the ChipSelect can be changed with each datablock
+		transferred via spi_exchange because it is encoded by the driver
+		within the data.
+
+		The same behavior applies for the LASTXFER bit.
+
 config SAMV7_SPI_DMA
 	bool "SPI DMA"
 	default n
@@ -853,7 +876,7 @@ config SAMV7_SPI_DMATHRESHOLD
 
 config SAMV7_SPI_DMADEBUG
 	bool "SPI DMA transfer debug"
-	depends on SAMV7_SPI_DMA && DEBUG && DEBUG_DMA
+	depends on SAMV7_SPI_DMA && DEBUG_FEATURES && DEBUG_DMA
 	default n
 	---help---
 		Enable special debug instrumentation analyze SPI DMA data transfers.
@@ -877,11 +900,11 @@ endif # SAMV7_SPI_SLAVE
 
 config SAMV7_SPI_REGDEBUG
 	bool "SPI Register level debug"
-	depends on DEBUG
+	depends on DEBUG_SPI_INFO
 	default n
 	---help---
 		Output detailed register-level SPI device debug information.
-		Requires also DEBUG.
+		Requires also CONFIG_DEBUG_SPI_INFO.
 
 endmenu # SPI device driver options
 
@@ -914,7 +937,7 @@ config SAMV7_QSPI_DMATHRESHOLD
 
 config SAMV7_QSPI_DMADEBUG
 	bool "QSPI DMA transfer debug"
-	depends on SAMV7_QSPI_DMA && DEBUG && DEBUG_DMA
+	depends on SAMV7_QSPI_DMA && DEBUG_FEATURES && DEBUG_DMA
 	default n
 	---help---
 		Enable special debug instrumentation analyze QSPI DMA data transfers.
@@ -924,11 +947,11 @@ config SAMV7_QSPI_DMADEBUG
 
 config SAMV7_QSPI_REGDEBUG
 	bool "QSPI Register level debug"
-	depends on DEBUG
+	depends on DEBUG_SPI_INFO
 	default n
 	---help---
 		Output detailed register-level QSPI device debug information.
-		Requires also DEBUG.
+		Requires also CONFIG_DEBUG_SPI_INFO.
 
 endmenu # QSPI device driver options
 
@@ -940,23 +963,92 @@ config SAMV7_TWIHS0_FREQUENCY
 	default 100000
 	depends on SAMV7_TWIHS0
 
+config SAMV7_TWIHS0_GLITCH_FILTER
+	int "TWIHS0 Glitch Filter Time"
+	default 1
+	range 0 7
+	depends on SAMV7_TWIHS0
+	---help---
+		Apply filtering on TWIHS Inputs. Given number is the maximum pulse width
+		(defined in peripheral CLKs) of spikes to be suppressed by the input filter.
+		Setting this value to zero will disable glitch filtering.
+
+config SAMV7_TWIHS0_SINGLE_MASTER
+	bool "TWIHS0 Single Master Mode"
+	default y
+	depends on SAMV7_TWIHS0
+	depends on I2C_RESET
+	---help---
+		Enables a mode, where errors on the I2C-Bus (e.g. by EMC or
+		stuck slaves) are automatically handled by the driver.
+		In an error-case the I2C-Bus is reset so further communication
+		on the bus can take place.
+		This option is default on because the TWI-Driver can't handle
+		Multi-Master I2C anyways.
+
 config SAMV7_TWIHS1_FREQUENCY
 	int "TWIHS1 Frequency"
 	default 100000
 	depends on SAMV7_TWIHS1
 
+config SAMV7_TWIHS1_GLITCH_FILTER
+	int "TWIHS1 Glitch Filter Time"
+	default 1
+	range 0 7
+	depends on SAMV7_TWIHS1
+	---help---
+		Apply filtering on TWIHS Inputs. Given number is the maximum pulse width
+		(defined in peripheral CLKs) of spikes to be suppressed by the input filter.
+		Setting this value to zero will disable glitch filtering.
+
+config SAMV7_TWIHS1_SINGLE_MASTER
+	bool "TWIHS1 Single Master Mode"
+	default y
+	depends on SAMV7_TWIHS1
+	depends on I2C_RESET
+	---help---
+		Enables a mode, where errors on the I2C-Bus (e.g. by EMC or
+		stuck slaves) are automatically handled by the driver.
+		In an error-case the I2C-Bus is reset so further communication
+		on the bus can take place.
+		This option is default on because the TWI-Driver can't handle
+		Multi-Master I2C anyways.
+
 config SAMV7_TWIHS2_FREQUENCY
 	int "TWIHS2 Frequency"
 	default 100000
 	depends on SAMV7_TWIHS2
 
+config SAMV7_TWIHS2_GLITCH_FILTER
+	int "TWIHS2 Glitch Filter Time"
+	default 1
+	range 0 7
+	depends on SAMV7_TWIHS2
+	---help---
+		Apply filtering on TWIHS Inputs. Given number is the maximum pulse width
+		(defined in peripheral CLKs) of spikes to be suppressed by the input filter.
+		Setting this value to zero will disable glitch filtering.
+
+config SAMV7_TWIHS2_SINGLE_MASTER
+	bool "TWIHS2 Single Master Mode"
+	default y
+	depends on SAMV7_TWIHS2
+	depends on I2C_RESET
+	---help---
+		Enables a mode, where errors on the I2C-Bus (e.g. by EMC or
+		stuck slaves) are automatically handled by the driver.
+		In an error-case the I2C-Bus is reset so further communication
+		on the bus can take place.
+		This option is default on because the TWI-Driver can't handle
+		Multi-Master I2C anyways.
+
 config SAMV7_TWIHS_REGDEBUG
 	bool "TWIHS register level debug"
-	depends on DEBUG
+	depends on DEBUG_I2C_INFO
 	default n
 	---help---
 		Output detailed register-level TWIHS device debug information.
-		Very invasive! Requires also DEBUG.
+		Very invasive! Requires also CONFIG_DEBUG_I2C_INFO.
 
 endmenu # TWIHS device driver options
 
@@ -1318,7 +1410,7 @@ endif # SAMV7_SSC1
 
 config SAMV7_SSC_DMADEBUG
 	bool "SSC DMA transfer debug"
-	depends on DEBUG && DEBUG_DMA
+	depends on DEBUG_FEATURES && DEBUG_DMA
 	default n
 	---help---
 		Enable special debug instrumentation analyze SSC DMA data transfers.
@@ -1328,11 +1420,11 @@ config SAMV7_SSC_DMADEBUG
 
 config SAMV7_SSC_REGDEBUG
 	bool "SSC Register level debug"
-	depends on DEBUG
+	depends on DEBUG_I2S_INFO
 	default n
 	---help---
 		Output detailed register-level SSC device debug information.
-		Very invasive! Requires also DEBUG.
+		Very invasive! Requires also CONFIG_DEBUG_I2S_INFO.
 
 config SAMV7_SSC_QDEBUG
 	bool "SSC Queue debug"
@@ -1514,7 +1606,6 @@ endif # SAMV7_TC3
 
 config SAMV7_ONESHOT
 	bool "TC one-shot wrapper"
-	depends on SAMV7_FREERUN
 	default n if !SCHED_TICKLESS
 	default y if SCHED_TICKLESS
 	---help---
@@ -1551,30 +1642,96 @@ endif
 
 config SAMV7_TC_DEBUG
 	bool "TC debug"
-	depends on DEBUG
+	depends on DEBUG_FEATURES
 	default n
 	---help---
 		Output high level Timer/Counter device debug information.
-		Requires also DEBUG.  If this option AND DEBUG_VERBOSE are
+		Requires also CONFIG_DEBUG_FEATURES.  If this option AND CONFIG_DEBUG_INFO are
 		enabled, then the system will be overwhelmed the timer debug
-		output.  If DEBUG_VERBOSE is disabled, then debug output will
+		output.  If CONFIG_DEBUG_INFO is disabled, then debug output will
 		only indicate if/when timer-related errors occur.  This
 		latter mode is completely usable.
 
 config SAMV7_TC_REGDEBUG
 	bool "TC register level debug"
-	depends on DEBUG
+	depends on DEBUG_TIMER_INFO
 	default n
 	---help---
 		Output detailed register-level Timer/Counter device debug
-		information. Very invasive! Requires also DEBUG.
+		information. Very invasive! Requires also CONFIG_DEBUG_TIMER_INFO.
 
 endmenu # Timer/counter Configuration
 endif # SAMV7_HAVE_TC
 
+menu "DAC device driver configuration"
+	depends on SAMV7_DAC
+
+config SAMV7_DAC_PRESCAL
+	int "DAC MCK prescaler"
+	default 7
+	range 0 15
+	---help---
+		Define PRESCALER (Peripheral Clock to DAC Clock Ratio)
+
+		 0 -> 2 periods of DAC Clock
+		 1 -> 3 periods of DAC Clock
+		 2 -> 4 periods of DAC Clock
+		 3 -> 5 periods of DAC Clock
+		 4 -> 6 periods of DAC Clock
+		 5 -> 7 periods of DAC Clock
+		 6 -> 8 periods of DAC Clock
+		 7 -> 9 periods of DAC Clock
+		 8 -> 10 periods of DAC Clock
+		 9 -> 11 periods of DAC Clock
+		10 -> 12 periods of DAC Clock
+		11 -> 13 periods of DAC Clock
+		12 -> 14 periods of DAC Clock
+		13 -> 15 periods of DAC Clock
+		14 -> 16 periods of DAC Clock
+		15 -> 17 periods of DAC Clock
+
+config SAMV7_DAC_TRIGGER
+	bool "DAC trigger mode"
+	default n
+	---help---
+		Enable DAC trigger mode
+
+if SAMV7_DAC_TRIGGER
+
+config SAMV7_DAC_TRIGGER_FREQUENCY
+	int "DAC trigger frequency"
+	default 1000
+	---help---
+		Define DAC trigger frequency
+
+config SAMV7_DAC_TRIGGER_SELECT
+	int "DAC trigger source"
+	default 3
+	range 1 3
+	---help---
+		Define DAC trigger source.  Snly support for TC0, TC1, TC2 output is
+		currently implemented:
+
+		1 -> TC0
+		2 -> TC1
+		3 -> TC2
+
+endif # SAMV7_DAC_TRIGGER
+endmenu # DAC device driver configuration
+
 menu "HSMCI device driver options"
 	depends on SAMV7_HSMCI
 
+config SAMV7_HSMCI_DMA
+	bool "Support DMA data transfers"
+	default y
+	select SDIO_DMA
+	---help---
+		Support DMA data transfers.
+		Enable SD card DMA data transfers.  This is marginally optional.
+		For most usages, SD accesses will cause data overruns if used without
+		DMA.
+
 config SAMV7_HSMCI_RDPROOF
 	bool "Read Proof Enable"
 	default n
@@ -1617,7 +1774,7 @@ config SAMV7_HSMCI_UNALIGNED
 
 config SAMV7_HSMCI_XFRDEBUG
 	bool "HSMCI transfer debug"
-	depends on DEBUG_FS && DEBUG_VERBOSE
+	depends on DEBUG_FS_INFO
 	default n
 	---help---
 		Enable special debug instrumentation analyze HSMCI data transfers.
@@ -1625,11 +1782,11 @@ config SAMV7_HSMCI_XFRDEBUG
 		registers at key points in the data transfer and then dumps all of
 		the registers at the end of the transfer.  If DEBUG_DMA is also
 		enabled, then DMA register will be collected as well.  Requires also
-		DEBUG_FS and DEBUG_VERBOSE.
+		DEBUG_FS and CONFIG_DEBUG_INFO.
 
 config SAMV7_HSMCI_CMDDEBUG
 	bool "HSMCI command debug"
-	depends on DEBUG_FS && DEBUG_VERBOSE
+	depends on DEBUG_FS_INFO
 	default n
 	---help---
 		Enable special debug instrumentation analyze HSMCI commands. This
@@ -1637,15 +1794,15 @@ config SAMV7_HSMCI_CMDDEBUG
 		key points in the data transfer and then dumps all of the registers
 		at the end of the transfer.  If DEBUG_DMA is also enabled, then DMA
 		register will be collected as well.  Requires also DEBUG_FS and
-		DEBUG_VERBOSE.
+		CONFIG_DEBUG_INFO.
 
 config SAMV7_HSMCI_REGDEBUG
 	bool "HSMCI Register level debug"
-	depends on DEBUG
+	depends on DEBUG_MEMCARD_INFO
 	default n
 	---help---
 		Output detailed register-level HSCMI device debug information.
-		Very invasive! Requires also DEBUG.
+		Very invasive! Requires also DEBUG_MEMCARD_INFO.
 
 endmenu # HSMCI device driver options
 
@@ -1851,10 +2008,30 @@ config SAMV7_EMAC_NBC
 	---help---
 		Select to disable receipt of broadcast packets.
 
+choice
+	prompt "Work queue"
+	default SAMV7_EMAC_LPWORK if SCHED_LPWORK
+	default SAMV7_EMAC_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the Ethernet driver.  If the
+		low priority work queue is available, then it should be used by the
+		driver.
+
+config SAMV7_EMAC_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
+
+config SAMV7_EMAC_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
+
+endchoice # Work queue
+
 config SAMV7_EMAC_DEBUG
 	bool "Force EMAC0/1 DEBUG"
 	default n
-	depends on DEBUG && !DEBUG_NET
+	depends on DEBUG_FEATURES && !DEBUG_NET
 	---help---
 		This option will force debug output from EMAC driver even without
 		network debug output enabled.  This is not normally something
@@ -1865,9 +2042,9 @@ config SAMV7_EMAC_DEBUG
 config SAMV7_EMAC_REGDEBUG
 	bool "Register-Level Debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_NET_INFO
 	---help---
-		Enable very low-level register access debug.  Depends on DEBUG.
+		Enable very low-level register access debug.  Depends on CONFIG_DEBUG_NET_INFO.
 
 endmenu # EMAC0 device driver options
 
@@ -1923,7 +2100,7 @@ config SAMV7_USBHS_EP7DMA_WAR
 config SAMV7_USBHS_REGDEBUG
 	bool "Enable low-level USBHS register debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_USB_INFO
 
 endmenu # USB High Speed Device Controller driver (DCD) options
 
@@ -2598,11 +2775,11 @@ endmenu # MCAN1 device driver options
 
 config SAMV7_MCAN_REGDEBUG
 	bool "CAN Register level debug"
-	depends on DEBUG
+	depends on DEBUG_CAN_INFO
 	default n
 	---help---
 		Output detailed register-level CAN device debug information.
-		Requires also DEBUG.
+		Requires also CONFIG_DEBUG_CAN_INFO.
 
 endmenu # CAN device driver options
 endif # SAMV7_MCAN
diff --git a/arch/arm/src/samv7/Make.defs b/arch/arm/src/samv7/Make.defs
index fbd88a6e7f459ca44ecdd706a61d93a672c8689d..fe5ab20b2c6d69e2dbe483b61d9c7908766b7540 100644
--- a/arch/arm/src/samv7/Make.defs
+++ b/arch/arm/src/samv7/Make.defs
@@ -90,10 +90,6 @@ ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
 CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
 endif
 
-ifeq ($(CONFIG_ARCH_MEMCPY),y)
-CMN_ASRCS += up_memcpy.S
-endif
-
 ifeq ($(CONFIG_ARM_MPU),y)
 CMN_CSRCS += up_mpu.c
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
@@ -106,9 +102,9 @@ endif
 endif
 
 ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c up_coherent_dcache.c
+CMN_CSRCS += up_coherent_dcache.c
 else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c up_coherent_dcache.c
+CMN_CSRCS += up_coherent_dcache.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
@@ -181,7 +177,7 @@ endif
 ifeq ($(CONFIG_SAMV7_HAVE_TC),y)
 CHIP_CSRCS += sam_tc.c
 ifeq ($(CONFIG_SAMV7_ONESHOT),y)
-CHIP_CSRCS += sam_oneshot.c
+CHIP_CSRCS += sam_oneshot.c sam_oneshot_lowerhalf.c
 endif
 ifeq ($(CONFIG_SAMV7_FREERUN),y)
 CHIP_CSRCS += sam_freerun.c
@@ -214,3 +210,7 @@ endif
 ifeq ($(CONFIG_SAMV7_PROGMEM),y)
 CHIP_CSRCS += sam_progmem.c
 endif
+
+ifeq ($(CONFIG_SAMV7_DAC),y)
+CHIP_CSRCS += sam_dac.c
+endif
diff --git a/arch/arm/src/samv7/chip/sam_dacc.h b/arch/arm/src/samv7/chip/sam_dacc.h
new file mode 100644
index 0000000000000000000000000000000000000000..a40b0d09e5a608429b3d13499db4e271df9a289e
--- /dev/null
+++ b/arch/arm/src/samv7/chip/sam_dacc.h
@@ -0,0 +1,226 @@
+/****************************************************************************************
+ * arch/arm/src/samv7/chip/sam_dacc.h
+ * Digital-to-Analog Converter Controller (DACC) for the SAMV7
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_SAMV7_CHIP_SAM_DACC_H
+#define __ARCH_ARM_SRC_SAMV7_CHIP_SAM_DACC_H
+
+/****************************************************************************************
+ * Included Files
+ ****************************************************************************************/
+
+#include 
+
+#include "chip.h"
+#include "chip/sam_memorymap.h"
+
+/****************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************/
+
+/* DACC register offsets *****************************************************************/
+
+#define SAM_DACC_CR_OFFSET         0x0000 /* Control Register */
+#define SAM_DACC_MR_OFFSET         0x0004 /* Mode Register */
+#define SAM_DACC_TRIGR_OFFSET      0x0008 /* Trigger Register */
+#define SAM_DACC_CHER_OFFSET       0x0010 /* Channel Enable Register */
+#define SAM_DACC_CHDR_OFFSET       0x0014 /* Channel Disable Register */
+#define SAM_DACC_CHSR_OFFSET       0x0018 /* Channel Status Register */
+#define SAM_DACC_CDR0_OFFSET       0x001c /* Conversion Data Register 0 */
+#define SAM_DACC_CDR1_OFFSET       0x0020 /* Conversion Data Register 1 */
+#define SAM_DACC_IER_OFFSET        0x0024 /* Interrupt Enable Register */
+#define SAM_DACC_IDR_OFFSET        0x0028 /* Interrupt Disable Register */
+#define SAM_DACC_IMR_OFFSET        0x002c /* Interrupt Mask Register */
+#define SAM_DACC_ISR_OFFSET        0x0030 /* Interrupt Status Register */
+#define SAM_DACC_ACR_OFFSET        0x0094 /* Analog Current Register */
+#define SAM_DACC_WPMR_OFFSET       0x00e4 /* Write Protect Mode register */
+#define SAM_DACC_WPSR_OFFSET       0x00e8 /* Write Protect Status register */
+
+/* DACC register addresses **************************************************************/
+
+#define SAM_DACC_CR                (SAM_DACC_BASE+SAM_DACC_CR_OFFSET)
+#define SAM_DACC_MR                (SAM_DACC_BASE+SAM_DACC_MR_OFFSET)
+#define SAM_DACC_TRIGR             (SAM_DACC_BASE+SAM_DACC_TRIGR_OFFSET)
+#define SAM_DACC_CHER              (SAM_DACC_BASE+SAM_DACC_CHER_OFFSET)
+#define SAM_DACC_CHDR              (SAM_DACC_BASE+SAM_DACC_CHDR_OFFSET)
+#define SAM_DACC_CHSR              (SAM_DACC_BASE+SAM_DACC_CHSR_OFFSET)
+#define SAM_DACC_CDR0              (SAM_DACC_BASE+SAM_DACC_CDR0_OFFSET)
+#define SAM_DACC_CDR1              (SAM_DACC_BASE+SAM_DACC_CDR1_OFFSET)
+#define SAM_DACC_IER               (SAM_DACC_BASE+SAM_DACC_IER_OFFSET)
+#define SAM_DACC_IDR               (SAM_DACC_BASE+SAM_DACC_IDR_OFFSET)
+#define SAM_DACC_IMR               (SAM_DACC_BASE+SAM_DACC_IMR_OFFSET)
+#define SAM_DACC_ISR               (SAM_DACC_BASE+SAM_DACC_ISR_OFFSET)
+#define SAM_DACC_ACR               (SAM_DACC_BASE+SAM_DACC_ACR_OFFSET)
+#define SAM_DACC_WPMR              (SAM_DACC_BASE+SAM_DACC_WPMR_OFFSET)
+#define SAM_DACC_WPSR              (SAM_DACC_BASE+SAM_DACC_WPSR_OFFSET)
+
+/* DACC register bit definitions ********************************************************/
+
+/* Control Register */
+
+#define DACC_CR_SWRST               (1 << 0)  /* Bit 0:  Software reset */
+
+/* Mode Register */
+
+#define DACC_MR_MAXS0               (1 << 0) /* Max Speed Mode for Channel 0 */
+#  define DACC_MR_MAXS0_TRIG_EVENT  (0 << 0) /* External trigger mode or Free-running mode enabled */
+#  define DACC_MR_MAXS0_MAXIMUM     (1 << 0) /* Max speed mode enabled */
+#define DACC_MR_MAXS1               (1 << 1) /* Max Speed Mode for Channel 1 */
+#  define DACC_MR_MAXS1_TRIG_EVENT  (0 << 1) /* External trigger mode or Free-running mode enabled */
+#  define DACC_MR_MAXS1_MAXIMUM     (1 << 1) /* Max speed mode enabled */
+#define DACC_MR_WORD                (1 << 4) /* Word Transfer Mode */
+#  define DACC_MR_WORD_DISABLED     (0 << 4) /* One data to convert is written to the FIFO per access to DACC */
+#  define DACC_MR_WORD_ENABLED      (1 << 4) /* Two data to convert are written to the FIFO per access to DACC */
+#define DACC_MR_ZERO                (1 << 5) /* Must always be written to 0 */
+#define DACC_MR_DIFF                (1 << 23) /* Differential Mode */
+#  define DACC_MR_DIFF_DISABLED     (0 << 23) /* DAC0 and DAC1 are single-ended outputs */
+#  define DACC_MR_DIFF_ENABLED      (1 << 23) /* DACP and DACN are differential outputs. The differential level is configured by the channel 0 value. */
+#define DACC_MR_PRESCALER_SHIFT     (24)
+#define DACC_MR_PRESCALER_MASK      (0xfu << DACC_MR_PRESCALER_SHIFT) /* Peripheral Clock to DAC Clock Ratio */
+#define DACC_MR_PRESCALER(value)    ((DACC_MR_PRESCALER_MASK & ((value) << DACC_MR_PRESCALER_SHIFT)))
+#  define DACC_MR_PRESCALER_2       (0 << DACC_MR_PRESCALER_SHIFT)  /* 2 periods of DAC Clock */
+#  define DACC_MR_PRESCALER_3       (1 << DACC_MR_PRESCALER_SHIFT)  /* 3 periods of DAC Clock */
+#  define DACC_MR_PRESCALER_4       (2 << DACC_MR_PRESCALER_SHIFT)  /* 4 periods of DAC Clock */
+#  define DACC_MR_PRESCALER_5       (3 << DACC_MR_PRESCALER_SHIFT)  /* 5 periods of DAC Clock */
+#  define DACC_MR_PRESCALER_6       (4 << DACC_MR_PRESCALER_SHIFT)  /* 6 periods of DAC Clock */
+#  define DACC_MR_PRESCALER_7       (5 << DACC_MR_PRESCALER_SHIFT)  /* 7 periods of DAC Clock */
+#  define DACC_MR_PRESCALER_8       (6 << DACC_MR_PRESCALER_SHIFT)  /* 8 periods of DAC Clock */
+#  define DACC_MR_PRESCALER_9       (7 << DACC_MR_PRESCALER_SHIFT)  /* 9 periods of DAC Clock */
+#  define DACC_MR_PRESCALER_10      (8 << DACC_MR_PRESCALER_SHIFT)  /* 10 periods of DAC Clock */
+#  define DACC_MR_PRESCALER_11      (9 << DACC_MR_PRESCALER_SHIFT)  /* 11 periods of DAC Clock */
+#  define DACC_MR_PRESCALER_12      (10 << DACC_MR_PRESCALER_SHIFT) /* 12 periods of DAC Clock */
+#  define DACC_MR_PRESCALER_13      (11 << DACC_MR_PRESCALER_SHIFT) /* 13 periods of DAC Clock */
+#  define DACC_MR_PRESCALER_14      (12 << DACC_MR_PRESCALER_SHIFT) /* 14 periods of DAC Clock */
+#  define DACC_MR_PRESCALER_15      (13 << DACC_MR_PRESCALER_SHIFT) /* 15 periods of DAC Clock */
+#  define DACC_MR_PRESCALER_16      (14 << DACC_MR_PRESCALER_SHIFT) /* 16 periods of DAC Clock */
+#  define DACC_MR_PRESCALER_17      (15 << DACC_MR_PRESCALER_SHIFT) /* 17 periods of DAC Clock */
+
+/* Trigger Register */
+
+#define DACC_TRIGR_TRGEN0           (1 << 0) /* Trigger Enable of Channel 0 */
+#  define DACC_TRIGR_TRGEN0_DIS     (0 << 0) /* External trigger mode disabled. DACC is in Free-running mode or Max speed mode. */
+#  define DACC_TRIGR_TRGEN0_EN      (1 << 0) /* External trigger mode enabled. */
+#define DACC_TRIGR_TRGEN1           (1 << 1) /* Trigger Enable of Channel 1 */
+#  define DACC_TRIGR_TRGEN1_DIS     (0 << 1) /* External trigger mode disabled. DACC is in Free-running mode or Max speed mode. */
+#  define DACC_TRIGR_TRGEN1_EN      (1 << 1) /* External trigger mode enabled. */
+#define DACC_TRIGR_TRGSEL0_SHIFT    (4)
+#define DACC_TRIGR_TRGSEL0_MASK     (0x7u << DACC_TRIGR_TRGSEL0_SHIFT) /* Trigger Selection of Channel 0 */
+#define DACC_TRIGR_TRGSEL0(value)   ((DACC_TRIGR_TRGSEL0_MASK & ((value) << DACC_TRIGR_TRGSEL0_SHIFT)))
+#  define DACC_TRIGR_TRGSEL0_DATRG   (0 << 4) /* DATRG output */
+#  define DACC_TRIGR_TRGSEL0_TC0     (1 << 4) /* TC0 output */
+#  define DACC_TRIGR_TRGSEL0_TC1     (2 << 4) /* TC1 output */
+#  define DACC_TRIGR_TRGSEL0_TC2     (3 << 4) /* TC2 output */
+#  define DACC_TRIGR_TRGSEL0_PWM0EV0 (4 << 4) /* PWM0 event 0 */
+#  define DACC_TRIGR_TRGSEL0_PWM0EV1 (5 << 4) /* PWM0 event 1 */
+#  define DACC_TRIGR_TRGSEL0_PWM1EV0 (6 << 4) /* PWM1 event 0 */
+#  define DACC_TRIGR_TRGSEL0_PWM1EV1 (7 << 4) /* PWM1 event 1 */
+#define DACC_TRIGR_TRGSEL1_SHIFT    (8)
+#define DACC_TRIGR_TRGSEL1_MASK     (0x7u << DACC_TRIGR_TRGSEL1_SHIFT) /* Trigger Selection of Channel 1 */
+#define DACC_TRIGR_TRGSEL1(value)   ((DACC_TRIGR_TRGSEL1_MASK & ((value) << DACC_TRIGR_TRGSEL1_SHIFT)))
+#  define DACC_TRIGR_TRGSEL1_DATRG   (0 << 8) /* DATRG output */
+#  define DACC_TRIGR_TRGSEL1_TC0     (1 << 8) /* TC0 output */
+#  define DACC_TRIGR_TRGSEL1_TC1     (2 << 8) /* TC1 output */
+#  define DACC_TRIGR_TRGSEL1_TC2     (3 << 8) /* TC2 output */
+#  define DACC_TRIGR_TRGSEL1_PWM0EV0 (4 << 8) /* PWM0 event 0 */
+#  define DACC_TRIGR_TRGSEL1_PWM0EV1 (5 << 8) /* PWM0 event 1 */
+#  define DACC_TRIGR_TRGSEL1_PWM1EV0 (6 << 8) /* PWM1 event 0 */
+#  define DACC_TRIGR_TRGSEL1_PWM1EV1 (7 << 8) /* PWM1 event 1 */
+#define DACC_TRIGR_OSR0_SHIFT       (16)
+#define DACC_TRIGR_OSR0_MASK        (0x7u << DACC_TRIGR_OSR0_SHIFT) /* Over Sampling Ratio of Channel 0 */
+#define DACC_TRIGR_OSR0(value)      ((DACC_TRIGR_OSR0_MASK & ((value) << DACC_TRIGR_OSR0_SHIFT)))
+#  define DACC_TRIGR_OSR0_OSR_1     (0 << 16) /* OSR = 1 */
+#  define DACC_TRIGR_OSR0_OSR_2     (1 << 16) /* OSR = 2 */
+#  define DACC_TRIGR_OSR0_OSR_4     (2 << 16) /* OSR = 4 */
+#  define DACC_TRIGR_OSR0_OSR_8     (3 << 16) /* OSR = 8 */
+#  define DACC_TRIGR_OSR0_OSR_16    (4 << 16) /* OSR = 16 */
+#  define DACC_TRIGR_OSR0_OSR_32    (5 << 16) /* OSR = 32 */
+#define DACC_TRIGR_OSR1_SHIFT       (20)
+#define DACC_TRIGR_OSR1_MASK        (0x7u << DACC_TRIGR_OSR1_SHIFT) /* Over Sampling Ratio of Channel 1 */
+#define DACC_TRIGR_OSR1(value)      ((DACC_TRIGR_OSR1_MASK & ((value) << DACC_TRIGR_OSR1_SHIFT)))
+#  define DACC_TRIGR_OSR1_OSR_1     (0 << 20) /* OSR = 1 */
+#  define DACC_TRIGR_OSR1_OSR_2     (1 << 20) /* OSR = 2 */
+#  define DACC_TRIGR_OSR1_OSR_4     (2 << 20) /* OSR = 4 */
+#  define DACC_TRIGR_OSR1_OSR_8     (3 << 20) /* OSR = 8 */
+#  define DACC_TRIGR_OSR1_OSR_16    (4 << 20) /* OSR = 16 */
+#  define DACC_TRIGR_OSR1_OSR_32    (5 << 20) /* OSR = 32 */
+
+/* Channel Enable, Channel Disable, and  Channel Status Registers */
+
+#define DACC_CH0                    (1 << 0)  /* Channel 0 */
+#define DACC_CH1                    (1 << 1)  /* Channel 1 */
+#define DACC_CHSR_DACRDY0           (1 << 8)  /* DAC Ready Flag */
+#define DACC_CHSR_DACRDY1           (1 << 9)  /* DAC Ready Flag */
+
+/* Conversion Data Register -- 32-bit data */
+
+#define DACC_CDR_DATA0_SHIFT        (0)
+#define DACC_CDR_DATA0_MASK         (0xffffu << DACC_CDR_DATA0_SHIFT) /* Data to Convert for channel 0 */
+#define DACC_CDR_DATA0(value)       ((DACC_CDR_DATA0_MASK & ((value) << DACC_CDR_DATA0_SHIFT)))
+#define DACC_CDR_DATA1_SHIFT        (16)
+#define DACC_CDR_DATA1_MASK         (0xffffu << DACC_CDR_DATA1_SHIFT) /* Data to Convert for channel 1 */
+#define DACC_CDR_DATA1(value)       ((DACC_CDR_DATA1_MASK & ((value) << DACC_CDR_DATA1_SHIFT)))
+
+/* Interrupt Enable, Interrupt Disable, Interrupt Mask, and Interrupt Status Register */
+
+#define DACC_INT_TXRDY0             (1 << 0)  /* Transmit Ready Interrupt of channel 0 */
+#define DACC_INT_TXRDY1             (1 << 1)  /* Transmit Ready Interrupt of channel 1 */
+#define DACC_INT_EOC0               (1 << 4)  /* End of Conversion Interrupt of channel 0 */
+#define DACC_INT_EOC1               (1 << 5)  /* End of Conversion Interrupt of channel 1 */
+#define DACC_INT_ALL                (0xffffffffu)  /* All interrupts */
+
+/* Analog Current Register */
+
+#define DACC_ACR_IBCTLCH0_SHIFT     (0)
+#define DACC_ACR_IBCTLCH0_MASK      (0x3u << DACC_ACR_IBCTLCH0_SHIFT) /* Analog Output Current Control */
+#define DACC_ACR_IBCTLCH0(value)    ((DACC_ACR_IBCTLCH0_MASK & ((value) << DACC_ACR_IBCTLCH0_SHIFT)))
+#define DACC_ACR_IBCTLCH1_SHIFT     (2)
+#define DACC_ACR_IBCTLCH1_MASK      (0x3u << DACC_ACR_IBCTLCH1_SHIFT) /* Analog Output Current Control */
+#define DACC_ACR_IBCTLCH1(value)    ((DACC_ACR_IBCTLCH1_MASK & ((value) << DACC_ACR_IBCTLCH1_SHIFT)))
+
+/* Write Protect Mode register */
+
+#define DACC_WPMR_WPEN              (1 << 0)                     /* Write Protection Enable */
+#define DACC_WPMR_WPKEY_SHIFT       (8)
+#define DACC_WPMR_WPKEY_MASK        (0xffffffu << DACC_WPMR_WPKEY_SHIFT)  /* Write Protect Key */
+#define DACC_WPMR_WPKEY(value)      ((DACC_WPMR_WPKEY_MASK & ((value) << DACC_WPMR_WPKEY_SHIFT)))
+#  define DACC_WPMR_WPKEY_PASSWD    (0x444143u << 8)                /* Writing any other value in this field aborts the write operation of bit WPEN. Always reads as 0. */
+
+/* Write Protect Status register */
+
+#define DACC_WPSR_WPVS              (1 << 0)                     /* Write Protection Violation Status */
+#define DACC_WPSR_WPVSRC_SHIFT      (8)
+#define DACC_WPSR_WPVSRC_MASK       (0xffu << DACC_WPSR_WPVSRC_SHIFT) /* Write Protection Violation Source */
+
+#endif /* __ARCH_ARM_SRC_SAMV7_CHIP_SAM_DACC_H */
diff --git a/arch/arm/src/samv7/chip/sam_mcan.h b/arch/arm/src/samv7/chip/sam_mcan.h
index b3951aef703890ae6597eb7e2ac15516e15c774d..4212ca3c291d7877a2003488c401bbcd9e514130 100644
--- a/arch/arm/src/samv7/chip/sam_mcan.h
+++ b/arch/arm/src/samv7/chip/sam_mcan.h
@@ -747,7 +747,7 @@
 #define STDFILTER_S0_SFID1_SHIFT   (16)      /* Bits 16-26: Standard Filter ID 2 */
 #define STDFILTER_S0_SFID1_MASK    (0x3ff << STDFILTER_S0_SFID1_SHIFT)
 #  define STDFILTER_S0_SFID1(n)    ((uint32_t)(n) << STDFILTER_S0_SFID1_SHIFT)
-#define STDFILTER_S0_SFEC_SHIFT    (17)      /* Bits 27-29: Standard Filter Element Configuration */
+#define STDFILTER_S0_SFEC_SHIFT    (27)      /* Bits 27-29: Standard Filter Element Configuration */
 #define STDFILTER_S0_SFEC_MASK     (7 << STDFILTER_S0_SFEC_SHIFT)
 #  define STDFILTER_S0_SFEC_DISABLE   (0 << STDFILTER_S0_SFEC_SHIFT) /* Disable filter element */
 #  define STDFILTER_S0_SFEC_FIFO0     (1 << STDFILTER_S0_SFEC_SHIFT) /* Store in Rx FIFO 0 on match */
diff --git a/arch/arm/src/samv7/sam_dac.c b/arch/arm/src/samv7/sam_dac.c
new file mode 100644
index 0000000000000000000000000000000000000000..78a19929b5412af48185d1039f4944b4b0878f85
--- /dev/null
+++ b/arch/arm/src/samv7/sam_dac.c
@@ -0,0 +1,658 @@
+/************************************************************************************
+ * arch/arm/src/samv7/sam_dac.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include "up_internal.h"
+#include "up_arch.h"
+#include "cache.h"
+
+#include "chip/sam_dacc.h"
+#include "chip/sam_pmc.h"
+#include "chip/sam_pinmap.h"
+
+#include "sam_gpio.h"
+#include "sam_xdmac.h"
+#include "sam_periphclks.h"
+#include "sam_tc.h"
+#include "sam_dac.h"
+
+#if defined(CONFIG_SAMV7_DAC0) || defined(CONFIG_SAMV7_DAC1)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Get TC channel number from Trigger Selection value */
+
+#define SAMV7_DAC_TC_CHANNEL (CONFIG_SAMV7_DAC_TRIGGER_SELECT - 1)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* This structure represents the internal state of a single SAMV7 DAC module */
+
+struct sam_dac_s
+{
+  uint8_t   initialized : 1;       /* True, the DAC block has been initialized */
+#ifdef CONFIG_SAMV7_DAC_TRIGGER
+  TC_HANDLE tc;                    /* Timer handle */
+#endif
+};
+
+/* This structure represents the internal state of one SAMV7 DAC channel */
+
+struct sam_chan_s
+{
+  uint8_t   inuse  : 1;            /* True, the driver is in use and not available */
+  uint8_t   intf;                  /* DAC zero-based interface number (0 or 1) */
+  uint32_t  dro;                   /* Conversion Data Register */
+#ifdef CONFIG_SAMV7_DAC_TRIGGER
+  uint32_t  reg_dacc_trigr_clear;  /* channel DACC_TRIGR register clear bits */
+  uint32_t  reg_dacc_trigr_set;    /* channel DACC_TRIGR register set bits */
+#endif
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* Interrupt handler */
+
+static int  dac_interrupt(int irq, FAR void *context, FAR void *arg);
+
+/* DAC methods */
+
+static void dac_reset(FAR struct dac_dev_s *dev);
+static int  dac_setup(FAR struct dac_dev_s *dev);
+static void dac_shutdown(FAR struct dac_dev_s *dev);
+static void dac_txint(FAR struct dac_dev_s *dev, bool enable);
+static int  dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg);
+static int  dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg);
+
+/* Initialization */
+
+#ifdef CONFIG_SAMV7_DAC_TRIGGER
+static int  dac_timer_init(struct sam_dac_s *priv, uint32_t freq_required,
+                           int channel);
+static void dac_timer_free(struct sam_dac_s *priv);
+#endif
+static int  dac_channel_init(FAR struct sam_chan_s *chan);
+static int  dac_module_init(void);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct dac_ops_s g_dacops =
+{
+  .ao_reset    = dac_reset,
+  .ao_setup    = dac_setup,
+  .ao_shutdown = dac_shutdown,
+  .ao_txint    = dac_txint,
+  .ao_send     = dac_send,
+  .ao_ioctl    = dac_ioctl,
+};
+
+#ifdef CONFIG_SAMV7_DAC0
+static struct sam_chan_s g_dac1priv =
+{
+  .intf       = 0,
+  .dro        = SAM_DACC_CDR0,
+#ifdef CONFIG_SAMV7_DAC_TRIGGER
+  .reg_dacc_trigr_clear = DACC_TRIGR_TRGSEL0_MASK,
+  .reg_dacc_trigr_set   = DACC_TRIGR_TRGSEL0(CONFIG_SAMV7_DAC_TRIGGER_SELECT) | DACC_TRIGR_TRGEN0,
+#endif
+};
+
+static struct dac_dev_s g_dac1dev =
+{
+  .ad_ops  = &g_dacops,
+  .ad_priv = &g_dac1priv,
+};
+#endif
+
+#ifdef CONFIG_SAMV7_DAC1
+static struct sam_chan_s g_dac2priv =
+{
+  .intf       = 1,
+  .dro        = SAM_DACC_CDR1,
+#ifdef CONFIG_SAMV7_DAC_TRIGGER
+  .reg_dacc_trigr_clear = DACC_TRIGR_TRGSEL1_MASK,
+  .reg_dacc_trigr_set   = DACC_TRIGR_TRGSEL1(CONFIG_SAMV7_DAC_TRIGGER_SELECT) | DACC_TRIGR_TRGEN1,
+#endif
+};
+
+static struct dac_dev_s g_dac2dev =
+{
+  .ad_ops  = &g_dacops,
+  .ad_priv = &g_dac2priv,
+};
+#endif
+
+static struct sam_dac_s g_dacmodule;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: dac_interrupt
+ *
+ * Description:
+ *   DAC interrupt handler.
+ *
+ * Input Parameters:
+ *
+ * Returned Value:
+ *   OK
+ *
+ ****************************************************************************/
+
+static int dac_interrupt(int irq, FAR void *context, FAR void *arg)
+{
+#ifdef CONFIG_SAMV7_DAC1
+  uint32_t status;
+
+  status = getreg32(SAM_DACC_ISR) & getreg32(SAM_DACC_IMR);
+  if (status & DACC_INT_TXRDY1)
+    {
+      dac_txdone(&g_dac2dev);
+    }
+
+  if (status & DACC_INT_TXRDY0)
+#endif
+    {
+      dac_txdone(&g_dac1dev);
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: dac_reset
+ *
+ * Description:
+ *   Reset the DAC channel.  Called early to initialize the hardware. This
+ *   is called, before dac_setup() and on error conditions.
+ *
+ * Input Parameters:
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void dac_reset(FAR struct dac_dev_s *dev)
+{
+  irqstate_t flags;
+
+  /* Reset only the selected DAC channel; the other DAC channel must remain
+   * functional.
+   */
+
+  flags   = enter_critical_section();
+
+#warning "Missing logic"
+
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: dac_setup
+ *
+ * Description:
+ *   Configure the DAC. This method is called the first time that the DAC
+ *   device is opened.  This will occur when the port is first opened.
+ *   This setup includes configuring and attaching DAC interrupts.  Interrupts
+ *   are all disabled upon return.
+ *
+ * Input Parameters:
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+static int dac_setup(FAR struct dac_dev_s *dev)
+{
+#warning "Missing logic"
+  return OK;
+}
+
+/****************************************************************************
+ * Name: dac_shutdown
+ *
+ * Description:
+ *   Disable the DAC.  This method is called when the DAC device is closed.
+ *   This method reverses the operation the setup method.
+ *
+ * Input Parameters:
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void dac_shutdown(FAR struct dac_dev_s *dev)
+{
+#warning "Missing logic"
+}
+
+/****************************************************************************
+ * Name: dac_txint
+ *
+ * Description:
+ *   Call to enable or disable TX interrupts.
+ *
+ * Input Parameters:
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void dac_txint(FAR struct dac_dev_s *dev, bool enable)
+{
+  FAR struct sam_chan_s *chan;
+
+  chan = dev->ad_priv;
+  if (enable)
+    {
+      putreg32(DACC_INT_TXRDY0 << chan->intf, SAM_DACC_IER);
+    }
+  else
+    {
+      putreg32(DACC_INT_TXRDY0 << chan->intf, SAM_DACC_IDR);
+    }
+}
+
+/****************************************************************************
+ * Name: dac_send
+ *
+ * Description:
+ *   Set the DAC output.
+ *
+ * Input Parameters:
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg)
+{
+  FAR struct sam_chan_s *chan = dev->ad_priv;
+
+  /* Interrupt based transfer */
+
+  putreg16(msg->am_data >> 16, chan->dro);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: dac_ioctl
+ *
+ * Description:
+ *   All ioctl calls will be routed through this method.
+ *
+ * Input Parameters:
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg)
+{
+  return -ENOTTY;
+}
+
+/****************************************************************************
+ * Name: dac_timer_init
+ *
+ * Description:
+ *   Configure a timer to periodically trigger conversion. Only channels TC0,
+ *   TC1, TC2 can be used with DAC.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SAMV7_DAC_TRIGGER
+static int dac_timer_init(struct sam_dac_s *priv, uint32_t freq_required,
+                          int channel)
+{
+  uint32_t mode;
+  uint32_t regval;
+  uint32_t freq_actual;
+
+  ainfo("required frequency=%ld [Hz], channel=%d\n",
+        (long)freq_required, channel);
+
+  DEBUGASSERT(priv && (freq_required > 0) && (channel >= 0 && channel <= 2));
+
+  /* Set the timer/counter waveform mode the the clock input. Use smallest
+   * MCK divisor of 8 to have highest clock resolution thus smallest frequency
+   * error. With 32 bit counter the lowest possible frequency of 1 Hz is easily
+   * supported.
+   */
+
+  /* TODO Add support for TC_CMR_TCCLKS_PCK6 to reduce frequency error */
+
+  mode = (TC_CMR_TCCLKS_MCK8 |      /* Use MCK/8 clock signal */
+          TC_CMR_WAVSEL_UPRC |      /* UP mode w/ trigger on RC Compare */
+          TC_CMR_WAVE |             /* Wave mode */
+          TC_CMR_ACPA_CLEAR |       /* RA Compare Effect on TIOA: Clear */
+          TC_CMR_ACPC_SET);         /* RC Compare Effect on TIOA: Set */
+
+  /* Now allocate and configure the channel */
+
+  priv->tc = sam_tc_allocate(channel, mode);
+  if (!priv->tc)
+    {
+      aerr("ERROR: Failed to allocate channel %d mode %08x\n", channel, mode);
+      return -EINVAL;
+    }
+
+  /* Calculate the actual counter value from this divider and the tc input
+   * frequency.
+   */
+
+  regval = BOARD_MCK_FREQUENCY / 8 / freq_required;
+  DEBUGASSERT(regval > 0); /* Will check for integer underflow */
+
+  /* Set up TC_RA and TC_RC.  The frequency is determined by RA and RC:
+   * TIOA is cleared on RA match; TIOA is set on RC match.
+   */
+
+  sam_tc_setregister(priv->tc, TC_REGA, regval >> 1);
+  sam_tc_setregister(priv->tc, TC_REGC, regval);
+
+  freq_actual = BOARD_MCK_FREQUENCY / 8 / regval;
+  ainfo("configured frequency=%ld [Hz]\n", (long)freq_actual);
+
+  /* And start the timer */
+
+  sam_tc_start(priv->tc);
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: dac_timer_free
+ *
+ * Description:
+ *   Free the timer resource
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SAMV7_DAC_TRIGGER
+static void dac_timer_free(struct sam_dac_s *priv)
+{
+  /* Is a timer allocated? */
+
+  ainfo("tc=%p\n", priv->tc);
+
+  if (priv->tc)
+    {
+      /* Yes.. stop it and free it */
+
+      sam_tc_stop(priv->tc);
+      sam_tc_free(priv->tc);
+      priv->tc = NULL;
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: dac_channel_init
+ *
+ * Description:
+ *   Initialize the DAC channel.
+ *
+ * Input Parameters:
+ *   chan - A reference to the DAC channel state data
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+static int dac_channel_init(FAR struct sam_chan_s *chan)
+{
+  /* Is the selected channel already in-use? */
+
+  if (chan->inuse)
+    {
+      /* Yes.. then return EBUSY */
+
+      return -EBUSY;
+    }
+
+#ifdef CONFIG_SAMV7_DAC_TRIGGER
+  /* Configure trigger mode operation */
+
+  ainfo("Enabled trigger mode for DAC%d\n", chan->intf);
+
+  modifyreg32(SAM_DACC_TRIGR,
+              chan->reg_dacc_trigr_clear,
+              chan->reg_dacc_trigr_set);
+#endif
+
+  /* Enable DAC Channel */
+
+  putreg32(1 << chan->intf, SAM_DACC_CHER);
+
+  /* Mark the DAC channel "in-use" */
+
+  chan->inuse = 1;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: dac_module_init
+ *
+ * Description:
+ *   Initialize the DAC. All ioctl calls will be routed through this method.
+ *
+ * Input Parameters:
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+static int dac_module_init(void)
+{
+  uint32_t regval;
+  int ret;
+
+  /* Has the DAC block already been initialized? */
+
+  if (g_dacmodule.initialized)
+    {
+      /* Yes.. then return success  We only have to do this once */
+
+      return OK;
+    }
+
+  ainfo("Initializing...\n");
+
+  /* Disable DAC peripheral clock */
+
+  sam_dacc_disableclk();
+
+  /* Configure DAC pins */
+
+#ifdef CONFIG_SAMV7_DAC0
+  sam_configgpio(GPIO_DAC0);
+#endif
+#ifdef CONFIG_SAMV7_DAC1
+  sam_configgpio(GPIO_DAC1);
+#endif
+
+  /* Enable the DAC peripheral clock */
+
+  sam_dacc_enableclk();
+
+  /* Reset the DAC controller */
+
+  putreg32(DACC_CR_SWRST, SAM_DACC_CR);
+
+  /* Set the MCK clock prescaler: PRESCAL = (MCK / DACClock) - 2 */
+
+  regval =  DACC_MR_PRESCALER(CONFIG_SAMV7_DAC_PRESCAL);
+  putreg32(regval, SAM_DACC_MR);
+
+  /* Configure trigger mode operation */
+
+#ifdef CONFIG_SAMV7_DAC_TRIGGER
+  ret = dac_timer_init(&g_dacmodule,
+                       CONFIG_SAMV7_DAC_TRIGGER_FREQUENCY,
+                       SAMV7_DAC_TC_CHANNEL);
+  if (ret < 0)
+    {
+      aerr("ERROR: Failed to initialize the timer: %d\n", ret);
+      return ret;
+    }
+#endif
+
+  /* Configure interrupts */
+
+  ret = irq_attach(SAM_IRQ_DACC, dac_interrupt, NULL);
+  if (ret < 0)
+    {
+      aerr("irq_attach failed: %d\n", ret);
+      return ret;
+    }
+
+  ainfo("Enable the DAC interrupt: irq=%d\n", SAM_IRQ_DACC);
+  up_enable_irq(SAM_IRQ_DACC);
+
+  /* Mark the DAC module as initialized */
+
+  g_dacmodule.initialized = 1;
+  return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sam_dac_initialize
+ *
+ * Description:
+ *   Initialize the DAC.
+ *
+ * Input Parameters:
+ *   intf - The DAC interface number.
+ *
+ * Returned Value:
+ *   Valid DAC device structure reference on success, NULL on failure.
+ *
+ ****************************************************************************/
+
+FAR struct dac_dev_s *sam_dac_initialize(int intf)
+{
+  FAR struct dac_dev_s *dev;
+  FAR struct sam_chan_s *chan;
+  int ret;
+
+#ifdef CONFIG_SAMV7_DAC0
+  if (intf == 0)
+    {
+      ainfo("DAC1 Selected\n");
+      dev = &g_dac1dev;
+    }
+  else
+#endif
+#ifdef CONFIG_SAMV7_DAC1
+  if (intf == 1)
+    {
+      ainfo("DAC2 Selected\n");
+      dev = &g_dac2dev;
+    }
+  else
+#endif
+    {
+      aerr("ERROR: No such DAC interface: %d\n", intf);
+      errno = ENODEV;
+      return NULL;
+    }
+
+  /* Initialize the DAC peripheral module */
+
+  ret = dac_module_init();
+  if (ret < 0)
+    {
+      aerr("ERROR: Failed to initialize the DAC peripheral module: %d\n", ret);
+      errno = -ret;
+      return NULL;
+    }
+
+  /* Configure the selected DAC channel */
+
+  chan = dev->ad_priv;
+  ret  = dac_channel_init(chan);
+  if (ret < 0)
+    {
+      aerr("ERROR: Failed to initialize DAC channel %d: %d\n", intf, ret);
+      errno = -ret;
+      return NULL;
+    }
+
+  return dev;
+}
+
+#endif /* CONFIG_SAMV7_DAC0 || CONFIG_SAMV7_DAC1 */
diff --git a/arch/arm/src/samv7/sam_dac.h b/arch/arm/src/samv7/sam_dac.h
new file mode 100644
index 0000000000000000000000000000000000000000..616d25b486c64298bfa8ba83a6d5f4d8df7bd0ff
--- /dev/null
+++ b/arch/arm/src/samv7/sam_dac.h
@@ -0,0 +1,129 @@
+/****************************************************************************
+ * arch/arm/src/samv7/sam_dac.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_SAMV7_SAM_DAC_H
+#define __ARCH_ARM_SRC_SAMV7_SAM_DAC_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include "chip/sam_dacc.h"
+
+#if defined(CONFIG_SAMV7_DAC0) || defined(CONFIG_SAMV7_DAC1)
+
+/****************************************************************************
+ * Pre-processor definitions
+ ****************************************************************************/
+/* Default configuration settings may be overridden in the board configuration
+ * file.
+ */
+
+#if !defined(CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE)
+#  define CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE 8
+#elif CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE > 65535
+#  warning "CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE value does not fit into uint16_t, limiting it to 65535"
+#  undef  CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE
+#  define CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE (65535)
+#endif
+
+#if !defined(CONFIG_SAMV7_DAC_TRIGGER_FREQUENCY)
+#  define CONFIG_SAMV7_DAC_TRIGGER_FREQUENCY 8000
+#endif
+
+/* PRESCAL = (MCK / DACClock) - 2
+ *
+ * Given:
+ *   MCK      = 150MHz
+ *   DACClock = 16MHz
+ * Then:
+ *   PRESCAL  = 7
+ */
+
+#if !defined(CONFIG_SAMV7_DAC_PRESCAL)
+#define CONFIG_SAMV7_DAC_PRESCAL          (7)
+#elif CONFIG_SAMV7_DAC_PRESCAL > 15
+#  warning "Maximum valid CONFIG_SAMV7_DAC_PRESCAL value is 15"
+#endif
+
+#if !defined(CONFIG_SAMV7_DAC_TRIGGER_SELECT)
+#define CONFIG_SAMV7_DAC_TRIGGER_SELECT (3)
+#elif CONFIG_SAMV7_DAC_TRIGGER_SELECT < 1 || CONFIG_SAMV7_DAC_TRIGGER_SELECT > 3
+#  warning "Only CONFIG_SAMV7_DAC_TRIGGER_SELECT == [1-3] is supported"
+#endif
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: sam_dac_initialize
+ *
+ * Description:
+ *   Initialize the DAC
+ *
+ * Input Parameters:
+ *   intf - The DAC interface number.
+ *
+ * Returned Value:
+ *   Valid DAC device structure reference on success; a NULL on failure
+ *
+ ****************************************************************************/
+
+struct dac_dev_s;
+FAR struct dac_dev_s *sam_dac_initialize(int intf);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CONFIG_SAMV7_DAC0 || CONFIG_SAMV7_DAC1 */
+#endif /* __ARCH_ARM_SRC_SAMV7_SAM_DAC_H */
diff --git a/arch/arm/src/samv7/sam_emac.c b/arch/arm/src/samv7/sam_emac.c
index 39e14457dd4c56da3f2a6519b33ce04bf83e94dc..8905ee55546de9cb213cc68d9d6545028e9dd235 100644
--- a/arch/arm/src/samv7/sam_emac.c
+++ b/arch/arm/src/samv7/sam_emac.c
@@ -2,7 +2,7 @@
  * arch/arm/src/samv7/sam_emac.c
  * 10/100 Base-T Ethernet driver for the SAMV71.
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * This logic derives from the SAMA5 Ethernet driver which, in turn, derived
@@ -48,7 +48,7 @@
 
 #include 
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_SAMV7_EMAC_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_SAMV7_EMAC_DEBUG)
   /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
@@ -69,11 +69,7 @@
 #include 
 #include 
 #include 
-
-#ifdef CONFIG_NET_NOINTS
-#  include 
-#endif
-
+#include 
 #include 
 #include 
 #include 
@@ -103,12 +99,23 @@
  ****************************************************************************/
 /* Configuration ************************************************************/
 
-/* If processing is not done at the interrupt level, then high priority
- * work queue support is required.
+/* If processing is not done at the interrupt level, then work queue support
+ * is required.
  */
 
-#if defined(CONFIG_NET_NOINTS) && !defined(CONFIG_SCHED_HPWORK)
-#  error High priority work queue support is required
+#if !defined(CONFIG_SCHED_WORKQUEUE)
+#  error Work queue support is required
+#else
+
+  /* Select work queue */
+
+#  if defined(CONFIG_SAMV7_EMAC_HPWORK)
+#    define ETHWORK HPWORK
+#  elif defined(CONFIG_SAMV7_EMAC_LPWORK)
+#    define ETHWORK LPWORK
+#  else
+#    error Neither CONFIG_SAMV7_EMAC_HPWORK nor CONFIG_SAMV7_EMAC_LPWORK defined
+#  endif
 #endif
 
 /* EMAC0 Configuration ******************************************************/
@@ -307,29 +314,18 @@
  * enabled.
  */
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_SAMV7_EMAC_REGDEBUG
-#endif
-
 #ifdef CONFIG_NET_DUMPPACKET
 #  define sam_dumppacket(m,a,n) lib_dumpbuffer(m,a,n)
 #else
 #  define sam_dumppacket(m,a,n)
 #endif
 
-/* EMAC buffer sizes, number of buffers, and number of descriptors ***********
- *
- * REVISIT: The CONFIG_NET_MULTIBUFFER might be useful.  It might be possible
- * to use this option to send and receive messages directly into the DMA
- * buffers, saving a copy.  There might be complications on the receiving
- * side, however, where buffers may wrap and where the size of the received
- * frame will typically be smaller than a full packet.
- */
-
-#ifdef CONFIG_NET_MULTIBUFFER
-#  error CONFIG_NET_MULTIBUFFER must not be set
+#ifndef CONFIG_NET_INFO
+#  undef CONFIG_SAMV7_EMAC_REGDEBUG
 #endif
 
+/* EMAC buffer sizes, number of buffers, and number of descriptors **********/
+
 /* Queue identifiers/indices */
 
 #define EMAC_QUEUE_0        0
@@ -435,7 +431,6 @@ struct sam_emacattr_s
   /* Basic hardware information */
 
   uint32_t             base;         /* EMAC Register base address */
-  xcpt_t               handler;      /* EMAC interrupt handler */
   uint8_t              emac;         /* EMACn, n=0 or 1 */
   uint8_t              irq;          /* EMAC interrupt number */
 
@@ -522,9 +517,8 @@ struct sam_emac_s
   uint8_t               ifup    : 1; /* true:ifup false:ifdown */
   WDOG_ID               txpoll;      /* TX poll timer */
   WDOG_ID               txtimeout;   /* TX timeout timer */
-#ifdef CONFIG_NET_NOINTS
-  struct work_s         work;        /* For deferring work to the work queue */
-#endif
+  struct work_s         irqwork;     /* For deferring work to the work queue */
+  struct work_s         pollwork;    /* For deferring work to the work queue */
 
   /* This holds the information visible to the NuttX network */
 
@@ -560,7 +554,7 @@ struct sam_emac_s
  ****************************************************************************/
 /* Register operations ******************************************************/
 
-#if defined(CONFIG_SAMV7_EMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAMV7_EMAC_REGDEBUG
 static bool sam_checkreg(struct sam_emac_s *priv, bool wr,
                          uint32_t regval, uintptr_t address);
 #endif
@@ -587,31 +581,16 @@ static int  sam_recvframe(struct sam_emac_s *priv, int qid);
 static void sam_receive(struct sam_emac_s *priv, int qid);
 static void sam_txdone(struct sam_emac_s *priv, int qid);
 static void sam_txerr_interrupt(FAR struct sam_emac_s *priv, int qid);
-static inline void sam_interrupt_process(FAR struct sam_emac_s *priv,
-                                         int qid);
-#ifdef CONFIG_NET_NOINTS
+
 static void sam_interrupt_work(FAR void *arg);
-#endif
-static int  sam_emac_interrupt(struct sam_emac_s *priv);
-#ifdef CONFIG_SAMV7_EMAC0
-static int sam_emac0_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_SAMV7_EMAC1
-static int sam_emac1_interrupt(int irq, void *context);
-#endif
+static int  sam_emac_interrupt(int irq, void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
-static inline void sam_txtimeout_process(FAR struct sam_emac_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void sam_txtimeout_work(FAR void *arg);
-#endif
 static void sam_txtimeout_expiry(int argc, uint32_t arg, ...);
 
-static inline void sam_poll_process(FAR struct sam_emac_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void sam_poll_work(FAR void *arg);
-#endif
 static void sam_poll_expiry(int argc, uint32_t arg, ...);
 
 /* NuttX callback functions */
@@ -619,10 +598,7 @@ static void sam_poll_expiry(int argc, uint32_t arg, ...);
 static int  sam_ifup(struct net_driver_s *dev);
 static int  sam_ifdown(struct net_driver_s *dev);
 
-static inline void sam_txavail_process(FAR struct sam_emac_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void sam_txavail_work(FAR void *arg);
-#endif
 static int  sam_txavail(struct net_driver_s *dev);
 
 #if defined(CONFIG_NET_IGMP) || defined(CONFIG_NET_ICMPv6)
@@ -639,7 +615,7 @@ static int  sam_ioctl(struct net_driver_s *dev, int cmd, long arg);
 
 /* PHY Initialization */
 
-#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_INFO)
 static void sam_phydump(struct sam_emac_s *priv);
 #else
 #  define sam_phydump(priv)
@@ -796,7 +772,6 @@ static const struct sam_emacattr_s g_emac0_attr =
   /* Basic hardware information */
 
   .base         = SAM_EMAC0_BASE,
-  .handler      = sam_emac0_interrupt,
   .emac         = EMAC0_INTF,
   .irq          = SAM_IRQ_EMAC0,
 
@@ -855,6 +830,19 @@ static const struct sam_emacattr_s g_emac0_attr =
 #endif
 };
 
+/* A single packet buffer is used
+ *
+ * REVISIT:  It might be possible to use this option to send and receive
+ * messages directly into the DMA buffers, saving a copy.  There might be
+ * complications on the receiving side, however, where buffers may wrap
+ * and where the size of the received frame will typically be smaller than
+ * a full packet.
+ */
+
+static uint8_t g_pktbuf0[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
+
+/* EMAC0 peripheral state */
+
 static struct sam_emac_s g_emac0;
 #endif
 
@@ -864,7 +852,6 @@ static const struct sam_emacattr_s g_emac1_attr =
   /* Basic hardware information */
 
   .base         = SAM_EMAC1_BASE,
-  .handler      = sam_emac1_interrupt,
   .emac         = EMAC1_INTF,
   .irq          = SAM_IRQ_EMAC1,
 
@@ -923,6 +910,19 @@ static const struct sam_emacattr_s g_emac1_attr =
 #endif
 };
 
+/* A single packet buffer is used
+ *
+ * REVISIT:  It might be possible to use this option to send and receive
+ * messages directly into the DMA buffers, saving a copy.  There might be
+ * complications on the receiving side, however, where buffers may wrap
+ * and where the size of the received frame will typically be smaller than
+ * a full packet.
+ */
+
+static uint8_t g_pktbuf1[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
+
+/* EMAC1 peripheral state */
+
 static struct sam_emac_s g_emac1;
 #endif
 
@@ -966,7 +966,7 @@ static bool sam_checkreg(struct sam_emac_s *priv, bool wr, uint32_t regval,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", priv->ntimes);
+          ninfo("...[Repeats %d times]...\n", priv->ntimes);
         }
 
       /* Save information about the new access */
@@ -999,7 +999,7 @@ static uint32_t sam_getreg(struct sam_emac_s *priv, uint16_t offset)
 #ifdef CONFIG_SAMV7_EMAC_REGDEBUG
   if (sam_checkreg(priv, false, regval, regaddr))
     {
-      lldbg("%08x->%08x\n", regaddr, regval);
+      ninfo("%08x->%08x\n", regaddr, regval);
     }
 #endif
 
@@ -1023,7 +1023,7 @@ static void sam_putreg(struct sam_emac_s *priv, uint16_t offset,
 #ifdef CONFIG_SAMV7_EMAC_REGDEBUG
   if (sam_checkreg(priv, true, regval, regaddr))
     {
-      lldbg("%08x<-%08x\n", regaddr, regval);
+      ninfo("%08x<-%08x\n", regaddr, regval);
     }
 #endif
 
@@ -1147,7 +1147,7 @@ static int sam_buffer_allocate(struct sam_emac_s *priv)
   priv->xfrq[0].txdesc = (struct emac_txdesc_s *)kmm_memalign(EMAC_ALIGN, allocsize);
   if (!priv->xfrq[0].txdesc)
     {
-      nlldbg("ERROR: Failed to allocate TX descriptors\n");
+      nerr("ERROR: Failed to allocate TX descriptors\n");
       return -ENOMEM;
     }
 
@@ -1158,7 +1158,7 @@ static int sam_buffer_allocate(struct sam_emac_s *priv)
   priv->xfrq[0].rxdesc = (struct emac_rxdesc_s *)kmm_memalign(EMAC_ALIGN, allocsize);
   if (!priv->xfrq[0].rxdesc)
     {
-      nlldbg("ERROR: Failed to allocate RX descriptors\n");
+      nerr("ERROR: Failed to allocate RX descriptors\n");
       sam_buffer_free(priv);
       return -ENOMEM;
     }
@@ -1170,7 +1170,7 @@ static int sam_buffer_allocate(struct sam_emac_s *priv)
   priv->xfrq[0].txbuffer = (uint8_t *)kmm_memalign(EMAC_ALIGN, allocsize);
   if (!priv->xfrq[0].txbuffer)
     {
-      nlldbg("ERROR: Failed to allocate TX buffer\n");
+      nerr("ERROR: Failed to allocate TX buffer\n");
       sam_buffer_free(priv);
       return -ENOMEM;
     }
@@ -1181,7 +1181,7 @@ static int sam_buffer_allocate(struct sam_emac_s *priv)
   priv->xfrq[0].rxbuffer = (uint8_t *)kmm_memalign(EMAC_ALIGN, allocsize);
   if (!priv->xfrq[0].rxbuffer)
     {
-      nlldbg("ERROR: Failed to allocate RX buffer\n");
+      nerr("ERROR: Failed to allocate RX buffer\n");
       sam_buffer_free(priv);
       return -ENOMEM;
     }
@@ -1194,7 +1194,7 @@ static int sam_buffer_allocate(struct sam_emac_s *priv)
   priv->xfrq[1].txdesc = (struct emac_txdesc_s *)kmm_memalign(EMAC_ALIGN, allocsize);
   if (!priv->xfrq[1].txdesc)
     {
-      nlldbg("ERROR: Failed to allocate TX descriptors\n");
+      nerr("ERROR: Failed to allocate TX descriptors\n");
       return -ENOMEM;
     }
 
@@ -1205,7 +1205,7 @@ static int sam_buffer_allocate(struct sam_emac_s *priv)
   priv->xfrq[1].rxdesc = (struct emac_rxdesc_s *)kmm_memalign(EMAC_ALIGN, allocsize);
   if (!priv->xfrq[1].rxdesc)
     {
-      nlldbg("ERROR: Failed to allocate RX descriptors\n");
+      nerr("ERROR: Failed to allocate RX descriptors\n");
       sam_buffer_free(priv);
       return -ENOMEM;
     }
@@ -1217,7 +1217,7 @@ static int sam_buffer_allocate(struct sam_emac_s *priv)
   priv->xfrq[1].txbuffer = (uint8_t *)kmm_memalign(EMAC_ALIGN, allocsize);
   if (!priv->xfrq[1].txbuffer)
     {
-      nlldbg("ERROR: Failed to allocate TX buffer\n");
+      nerr("ERROR: Failed to allocate TX buffer\n");
       sam_buffer_free(priv);
       return -ENOMEM;
     }
@@ -1228,7 +1228,7 @@ static int sam_buffer_allocate(struct sam_emac_s *priv)
   priv->xfrq[1].rxbuffer = (uint8_t *)kmm_memalign(EMAC_ALIGN, allocsize);
   if (!priv->xfrq[1].rxbuffer)
     {
-      nlldbg("ERROR: Failed to allocate RX buffer\n");
+      nerr("ERROR: Failed to allocate RX buffer\n");
       sam_buffer_free(priv);
       return -ENOMEM;
     }
@@ -1369,7 +1369,7 @@ static int sam_transmit(struct sam_emac_s *priv, int qid)
 
   if (dev->d_len > EMAC_TX_UNITSIZE)
     {
-      nlldbg("ERROR: Packet too big: %d\n", dev->d_len);
+      nerr("ERROR: Packet too big: %d\n", dev->d_len);
       return -EINVAL;
     }
 
@@ -1379,14 +1379,14 @@ static int sam_transmit(struct sam_emac_s *priv, int qid)
   txhead = xfrq->txhead;
   txdesc = &xfrq->txdesc[txhead];
 
-  nllvdbg("d_len: %d txhead[%d]: %d\n",  dev->d_len, qid, xfrq->txhead);
+  ninfo("d_len: %d txhead[%d]: %d\n",  dev->d_len, qid, xfrq->txhead);
   sam_dumppacket("Transmit packet", dev->d_buf, dev->d_len);
 
   /* If no free TX descriptor, buffer can't be sent */
 
   if (sam_txfree(priv, qid) < 1)
     {
-      nlldbg("ERROR: No free TX descriptors\n");
+      nerr("ERROR: No free TX descriptors\n");
       return -EBUSY;
     }
 
@@ -1460,7 +1460,7 @@ static int sam_transmit(struct sam_emac_s *priv, int qid)
 
   if (sam_txfree(priv, qid) < 1)
     {
-      nllvdbg("Disabling RX interrupts\n");
+      ninfo("Disabling RX interrupts\n");
       sam_putreg(priv, SAM_EMAC_IDR_OFFSET, EMAC_INT_RCOMP);
     }
 
@@ -1646,7 +1646,7 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
   arch_invalidate_dcache((uintptr_t)rxdesc,
                          (uintptr_t)rxdesc + sizeof(struct emac_rxdesc_s));
 
-  nllvdbg("Entry rxndx[%d]: %d\n", qid, rxndx);
+  ninfo("Entry rxndx[%d]: %d\n", qid, rxndx);
 
   while ((rxdesc->addr & EMACRXD_ADDR_OWNER) != 0)
     {
@@ -1709,7 +1709,7 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
         {
           if (rxndx == xfrq->rxndx)
             {
-              nllvdbg("ERROR: No EOF (Invalid or buffers too small)\n");
+              nerr("ERROR: No EOF (Invalid or buffers too small)\n");
               do
                 {
                   /* Give ownership back to the EMAC */
@@ -1767,7 +1767,7 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
               /* Frame size from the EMAC */
 
               dev->d_len = (rxdesc->status & EMACRXD_STA_FRLEN_MASK);
-              nllvdbg("packet %d-%d (%d)\n", xfrq->rxndx, rxndx, dev->d_len);
+              ninfo("packet %d-%d (%d)\n", xfrq->rxndx, rxndx, dev->d_len);
 
               /* All data have been copied in the application frame buffer,
                * release the RX descriptor(s).  Loop until all descriptors
@@ -1801,12 +1801,12 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
                * all of the data.
                */
 
-              nllvdbg("rxndx: %d d_len: %d\n",
-                      xfrq->rxndx, dev->d_len);
+              ninfo("rxndx: %d d_len: %d\n",
+                    xfrq->rxndx, dev->d_len);
               if (pktlen < dev->d_len)
                 {
-                  nlldbg("ERROR: Buffer size %d; frame size %d\n",
-                         dev->d_len, pktlen);
+                  nerr("ERROR: Buffer size %d; frame size %d\n",
+                       dev->d_len, pktlen);
                   NETDEV_RXERRORS(&priv->dev);
                   return -E2BIG;
                 }
@@ -1854,7 +1854,7 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
   /* No packet was found */
 
   xfrq->rxndx = rxndx;
-  nllvdbg("Exit rxndx[%d]: %d\n", qid, xfrq->rxndx);
+  ninfo("Exit rxndx[%d]: %d\n", qid, xfrq->rxndx);
   return -EAGAIN;
 }
 
@@ -1896,7 +1896,7 @@ static void sam_receive(struct sam_emac_s *priv, int qid)
 
       if (dev->d_len > CONFIG_NET_ETH_MTU)
         {
-          nlldbg("DROPPED: Too big: %d\n", dev->d_len);
+          nwarn("WARNING: Dropped, Too big: %d\n", dev->d_len);
           NETDEV_RXERRORS(&priv->dev);
           continue;
         }
@@ -1912,7 +1912,7 @@ static void sam_receive(struct sam_emac_s *priv, int qid)
 #ifdef CONFIG_NET_IPv4
       if (BUF->type == HTONS(ETHTYPE_IP))
         {
-          nllvdbg("IPv4 frame\n");
+          ninfo("IPv4 frame\n");
           NETDEV_RXIPV4(&priv->dev);
 
           /* Handle ARP on input then give the IPv4 packet to the network
@@ -1953,7 +1953,7 @@ static void sam_receive(struct sam_emac_s *priv, int qid)
 #ifdef CONFIG_NET_IPv6
       if (BUF->type == HTONS(ETHTYPE_IP6))
         {
-          nllvdbg("Iv6 frame\n");
+          ninfo("Iv6 frame\n");
           NETDEV_RXIPV6(&priv->dev);
 
           /* Give the IPv6 packet to the network layer */
@@ -1991,7 +1991,7 @@ static void sam_receive(struct sam_emac_s *priv, int qid)
 #ifdef CONFIG_NET_ARP
       if (BUF->type == htons(ETHTYPE_ARP))
         {
-          nllvdbg("ARP frame\n");
+          ninfo("ARP frame\n");
           NETDEV_RXARP(&priv->dev);
 
           /* Handle ARP packet */
@@ -2010,7 +2010,7 @@ static void sam_receive(struct sam_emac_s *priv, int qid)
       else
 #endif
         {
-          nlldbg("DROPPED: Unknown type: %04x\n", BUF->type);
+          nwarn("WARNING: Dropped, Unknown type: %04x\n", BUF->type);
           NETDEV_RXDROPPED(&priv->dev);
         }
     }
@@ -2245,15 +2245,13 @@ static void sam_txerr_interrupt(FAR struct sam_emac_s *priv, int qid)
 }
 
 /****************************************************************************
- * Function: sam_interrupt_process
+ * Function: sam_interrupt_work
  *
  * Description:
- *   Interrupt processing.  This may be performed either within the interrupt
- *   handler or on the worker thread, depending upon the configuration
+ *   Perform interrupt related work from the worker thread.
  *
  * Parameters:
- *   priv - Reference to the driver state structure
- *   quid - Index of the transfer queue that generated the interrupt
+ *   arg - The argument passed when work_queue() was called.
  *
  * Returned Value:
  *   None
@@ -2263,8 +2261,9 @@ static void sam_txerr_interrupt(FAR struct sam_emac_s *priv, int qid)
  *
  ****************************************************************************/
 
-static inline void sam_interrupt_process(FAR struct sam_emac_s *priv, int qid)
+static void sam_interrupt_work(FAR void *arg)
 {
+  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
   uint32_t isr;
   uint32_t rsr;
   uint32_t tsr;
@@ -2272,6 +2271,11 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv, int qid)
   uint32_t regval;
   uint32_t pending;
   uint32_t clrbits;
+  int qid = EMAC_QUEUE_0;  /* REVISIT: Currently services on EMAC_QUEUE_0 */
+
+  /* Process pending Ethernet interrupts */
+
+  net_lock();
 
   /* Read the interrupt status, RX status, and TX status registers.
    * NOTE that the interrupt status register is cleared by this read.
@@ -2286,7 +2290,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv, int qid)
   imr = sam_getreg(priv, SAM_EMAC_IMR_OFFSET);
   pending = isr & ~(imr | EMAC_INT_UNUSED);
 
-  nllvdbg("isr: %08x pending: %08x\n", isr, pending);
+  ninfo("isr: %08x pending: %08x\n", isr, pending);
 
   /* Check for the receipt of an RX packet.
    *
@@ -2312,7 +2316,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv, int qid)
 
       if ((rsr & EMAC_RSR_RXOVR) != 0)
         {
-          nlldbg("ERROR: Receiver overrun RSR: %08x\n", rsr);
+          nerr("ERROR: Receiver overrun RSR: %08x\n", rsr);
           clrbits |= EMAC_RSR_RXOVR;
         }
 
@@ -2329,7 +2333,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv, int qid)
 
       if ((rsr & EMAC_RSR_BNA) != 0)
         {
-          nlldbg("ERROR: Buffer not available RSR: %08x\n", rsr);
+          nerr("ERROR: Buffer not available RSR: %08x\n", rsr);
           clrbits |= EMAC_RSR_BNA;
         }
 
@@ -2370,7 +2374,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv, int qid)
           clrbits = EMAC_TSR_RLE | sam_txinuse(priv, qid);
           sam_txreset(priv, qid);
 
-          nlldbg("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
+          nerr("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
 
           regval  = sam_getreg(priv, SAM_EMAC_NCR_OFFSET);
           regval |= EMAC_NCR_TXEN;
@@ -2381,7 +2385,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv, int qid)
 
       if ((tsr & EMAC_TSR_COL) != 0)
         {
-          nlldbg("ERROR: Collision occurred TSR: %08x\n", tsr);
+          nerr("ERROR: Collision occurred TSR: %08x\n", tsr);
           NETDEV_TXERRORS(&priv->dev);
         }
 
@@ -2389,7 +2393,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv, int qid)
 
       if ((tsr & EMAC_TSR_TFC) != 0)
         {
-          nlldbg("ERROR: Transmit Frame Corruption due to AHB error: %08x\n", tsr);
+          nerr("ERROR: Transmit Frame Corruption due to AHB error: %08x\n", tsr);
           NETDEV_TXERRORS(&priv->dev);
         }
 
@@ -2407,7 +2411,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv, int qid)
 
   if ((pending & EMAC_INT_HRESP) != 0)
     {
-      nlldbg("ERROR: Hresp not OK\n");
+      nerr("ERROR: Hresp not OK\n");
     }
 
   /* Check for PAUSE Frame received (PFRE).
@@ -2418,7 +2422,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv, int qid)
 
   if ((pending & EMAC_INT_PFNZ) != 0)
     {
-      nlldbg("Pause frame received\n");
+      ninfo("Pause frame received\n");
     }
 
   /* Check for Pause Time Zero (PTZ)
@@ -2428,54 +2432,25 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv, int qid)
 
   if ((pending & EMAC_INT_PTZ) != 0)
     {
-      nlldbg("Pause TO!\n");
+      ninfo("Pause TO!\n");
     }
 #endif
-}
 
-/****************************************************************************
- * Function: sam_interrupt_work
- *
- * Description:
- *   Perform interrupt related work from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() was called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void sam_interrupt_work(FAR void *arg)
-{
-  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
-  net_lock_t state;
-
-  /* Process pending Ethernet interrupts */
-
-  state = net_lock();
-  sam_interrupt_process(priv, EMAC_QUEUE_0);
-  net_unlock(state);
+  net_unlock();
 
   /* Re-enable Ethernet interrupts */
 
   up_enable_irq(priv->attr->irq);
 }
-#endif
 
 /****************************************************************************
  * Function: sam_emac_interrupt
  *
  * Description:
- *   Common hardware interrupt handler
+ *   Common hardware interrupt handler.
  *
  * Parameters:
- *   priv    - Reference to the EMAC private state structure
+ *   priv - Reference to the EMAC private state structure
  *
  * Returned Value:
  *   OK on success
@@ -2484,11 +2459,13 @@ static void sam_interrupt_work(FAR void *arg)
  *
  ****************************************************************************/
 
-static int sam_emac_interrupt(struct sam_emac_s *priv)
+static int sam_emac_interrupt(int irq, void *context, FAR void *arg)
 {
-#ifdef CONFIG_NET_NOINTS
+  struct sam_emac_s *priv = (struct sam_emac_s *)arg;
   uint32_t tsr;
 
+  DEBUGASSERT(priv != NULL);
+
   /* Disable further Ethernet interrupts.  Because Ethernet interrupts are
    * also disabled if the TX timeout event occurs, there can be no race
    * condition here.
@@ -2512,88 +2489,39 @@ static int sam_emac_interrupt(struct sam_emac_s *priv)
        * expiration and the deferred interrupt processing.
        */
 
-       wd_cancel(priv->txtimeout);
-
-      /* Make sure that the TX poll timer is running (if it is already
-       * running, the following would restart it).  This is necessary to
-       * avoid certain race conditions where the polling sequence can be
-       * interrupted.
-       */
-
-      (void)wd_start(priv->txpoll, SAM_WDDELAY, sam_poll_expiry, 1, priv);
+      wd_cancel(priv->txtimeout);
     }
 
-  /* Cancel any pending poll work */
-
-  work_cancel(HPWORK, &priv->work);
-
   /* Schedule to perform the interrupt processing on the worker thread. */
 
-  work_queue(HPWORK, &priv->work, sam_interrupt_work, priv, 0);
-
-#else
-  /* Process the interrupt now */
-
-  sam_interrupt_process(priv, EMAC_QUEUE_0);
-#endif
-
+  work_queue(ETHWORK, &priv->irqwork, sam_interrupt_work, priv, 0);
   return OK;
 }
 
 /****************************************************************************
- * Function: sam_emac0/1_interrupt
+ * Function: sam_txtimeout_work
  *
  * Description:
- *   EMAC hardware interrupt handler
+ *   Perform TX timeout related work from the worker thread
  *
  * Parameters:
- *   irq     - Number of the IRQ that generated the interrupt
- *   context - Interrupt register state save info (architecture-specific)
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
  *   OK on success
  *
  * Assumptions:
+ *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-#ifdef CONFIG_SAMV7_EMAC0
-static int sam_emac0_interrupt(int irq, void *context)
-{
-  return sam_emac_interrupt(&g_emac0);
-}
-#endif
-
-#ifdef CONFIG_SAMV7_EMAC1
-static int sam_emac1_interrupt(int irq, void *context)
+static void sam_txtimeout_work(FAR void *arg)
 {
-  return sam_emac_interrupt(&g_emac1);
-}
-#endif
+  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
 
-/****************************************************************************
- * Function: sam_txtimeout_process
- *
- * Description:
- *   Process a TX timeout.  Called from the either the watchdog timer
- *   expiration logic or from the worker thread, depending upon the
- *   configuration.  The timeout means that the last TX never completed.
- *   Reset the hardware and start again.
- *
- * Parameters:
- *   priv - Reference to the driver state structure
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Global interrupts are disabled by the watchdog logic.
- *
- ****************************************************************************/
+  nerr("ERROR: Timeout!\n");
 
-static inline void sam_txtimeout_process(FAR struct sam_emac_s *priv)
-{
-  nlldbg("Timeout!\n");
+  net_lock();
   NETDEV_TXTIMEOUTS(&priv->dev);
 
   /* Reset the hardware.  Just take the interface down, then back up again. */
@@ -2604,39 +2532,9 @@ static inline void sam_txtimeout_process(FAR struct sam_emac_s *priv)
   /* Then poll the network for new XMIT data */
 
   sam_dopoll(priv, EMAC_QUEUE_0);
+  net_unlock();
 }
 
-/****************************************************************************
- * Function: sam_txtimeout_work
- *
- * Description:
- *   Perform TX timeout related work from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() as called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void sam_txtimeout_work(FAR void *arg)
-{
-  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
-  net_lock_t state;
-
-  /* Process pending Ethernet interrupts */
-
-  state = net_lock();
-  sam_txtimeout_process(priv);
-  net_unlock(state);
-}
-#endif
-
 /****************************************************************************
  * Function: sam_txtimeout_expiry
  *
@@ -2660,7 +2558,6 @@ static void sam_txtimeout_expiry(int argc, uint32_t arg, ...)
 {
   FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
 
-#ifdef CONFIG_NET_NOINTS
   /* Disable further Ethernet interrupts.  This will prevent some race
    * conditions with interrupt work.  There is still a potential race
    * condition with interrupt work that is already queued and in progress.
@@ -2668,47 +2565,38 @@ static void sam_txtimeout_expiry(int argc, uint32_t arg, ...)
 
   up_disable_irq(priv->attr->irq);
 
-  /* Cancel any pending poll or interrupt work.  This will have no effect
-   * on work that has already been started.
-   */
-
-  work_cancel(HPWORK, &priv->work);
-
   /* Schedule to perform the TX timeout processing on the worker thread. */
 
-  work_queue(HPWORK, &priv->work, sam_txtimeout_work, priv, 0);
-#else
-  /* Process the timeout now */
-
-  sam_txtimeout_process(priv);
-#endif
+  work_queue(ETHWORK, &priv->irqwork, sam_txtimeout_work, priv, 0);
 }
 
 /****************************************************************************
- * Function: sam_poll_process
+ * Function: sam_poll_work
  *
  * Description:
- *   Perform the periodic poll.  This may be called either from watchdog
- *   timer logic or from the worker thread, depending upon the configuration.
+ *   Perform periodic polling from the worker thread
  *
  * Parameters:
- *   priv - Reference to the driver state structure
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
+ *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static inline void sam_poll_process(FAR struct sam_emac_s *priv)
+static void sam_poll_work(FAR void *arg)
 {
+  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
   struct net_driver_s *dev  = &priv->dev;
 
   /* Check if the there are any free TX descriptors.  We cannot perform the
    * TX poll if we do not have buffering for another packet.
    */
 
+  net_lock();
   if (sam_txfree(priv, EMAC_QUEUE_0) > 0)
     {
       /* Update TCP timing states and poll the network for new XMIT data. */
@@ -2719,39 +2607,9 @@ static inline void sam_poll_process(FAR struct sam_emac_s *priv)
   /* Setup the watchdog poll timer again */
 
   (void)wd_start(priv->txpoll, SAM_WDDELAY, sam_poll_expiry, 1, priv);
+  net_unlock();
 }
 
-/****************************************************************************
- * Function: sam_poll_work
- *
- * Description:
- *   Perform periodic polling from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() as called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void sam_poll_work(FAR void *arg)
-{
-  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
-  net_lock_t state;
-
-  /* Perform the poll */
-
-  state = net_lock();
-  sam_poll_process(priv);
-  net_unlock(state);
-}
-#endif
-
 /****************************************************************************
  * Function: sam_poll_expiry
  *
@@ -2774,31 +2632,9 @@ static void sam_poll_expiry(int argc, uint32_t arg, ...)
 {
   FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
 
-#ifdef CONFIG_NET_NOINTS
-  /* Is our single work structure available?  It may not be if there are
-   * pending interrupt actions.
-   */
-
-  if (work_available(&priv->work))
-    {
-      /* Schedule to perform the interrupt processing on the worker thread. */
-
-      work_queue(HPWORK, &priv->work, sam_poll_work, priv, 0);
-    }
-  else
-    {
-      /* No.. Just re-start the watchdog poll timer, missing one polling
-       * cycle.
-       */
-
-      (void)wd_start(priv->txpoll, SAM_WDDELAY, sam_poll_expiry, 1, arg);
-    }
-
-#else
-  /* Process the interrupt now */
+  /* Schedule to perform the interrupt processing on the worker thread. */
 
-  sam_poll_process(priv);
-#endif
+  work_queue(ETHWORK, &priv->pollwork, sam_poll_work, priv, 0);
 }
 
 /****************************************************************************
@@ -2824,20 +2660,20 @@ static int sam_ifup(struct net_driver_s *dev)
   int ret;
 
 #ifdef CONFIG_NET_IPv4
-  ndbg("Bringing up: %d.%d.%d.%d\n",
-       dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-       (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 #endif
 #ifdef CONFIG_NET_IPv6
-  ndbg("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
-       dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
-       dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
-       dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
+  ninfo("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+        dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
+        dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
+        dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
 #endif
 
   /* Configure the EMAC interface for normal operation. */
 
-  nllvdbg("Initialize the EMAC\n");
+  ninfo("Initialize the EMAC\n");
   sam_emac_configure(priv);
   sam_queue_configure(priv, EMAC_QUEUE_1);
   sam_queue_configure(priv, EMAC_QUEUE_2);
@@ -2858,7 +2694,7 @@ static int sam_ifup(struct net_driver_s *dev)
   ret = sam_phyinit(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phyinit failed: %d\n", ret);
+      nerr("ERROR: sam_phyinit failed: %d\n", ret);
       return ret;
     }
 
@@ -2867,16 +2703,16 @@ static int sam_ifup(struct net_driver_s *dev)
   ret = sam_autonegotiate(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_autonegotiate failed: %d\n", ret);
+      nerr("ERROR: sam_autonegotiate failed: %d\n", ret);
       return ret;
     }
 
   while (sam_linkup(priv) == 0);
-  nllvdbg("Link detected \n");
+  ninfo("Link detected \n");
 
   /* Enable normal MAC operation */
 
-  nllvdbg("Enable normal operation\n");
+  ninfo("Enable normal operation\n");
 
   /* Set and activate a timer process */
 
@@ -2910,7 +2746,7 @@ static int sam_ifdown(struct net_driver_s *dev)
   struct sam_emac_s *priv = (struct sam_emac_s *)dev->d_private;
   irqstate_t flags;
 
-  nlldbg("Taking the network down\n");
+  ninfo("Taking the network down\n");
 
   /* Disable the EMAC interrupt */
 
@@ -2937,66 +2773,40 @@ static int sam_ifdown(struct net_driver_s *dev)
 }
 
 /****************************************************************************
- * Function: sam_txavail_process
+ * Function: sam_txavail_work
  *
  * Description:
- *   Perform an out-of-cycle poll.
+ *   Perform an out-of-cycle poll on the worker thread.
  *
  * Parameters:
- *   dev - Reference to the NuttX driver state structure
+ *   arg - Reference to the NuttX driver state structure (cast to void*)
  *
  * Returned Value:
  *   None
  *
  * Assumptions:
- *   Called in normal user mode
+ *   Called on the higher priority worker thread.
  *
  ****************************************************************************/
 
-static inline void sam_txavail_process(FAR struct sam_emac_s *priv)
+static void sam_txavail_work(FAR void *arg)
 {
-  nllvdbg("ifup: %d\n", priv->ifup);
+  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
+
+  ninfo("ifup: %d\n", priv->ifup);
 
   /* Ignore the notification if the interface is not yet up */
 
+  net_lock();
   if (priv->ifup)
     {
       /* Poll the network for new XMIT data */
 
       sam_dopoll(priv, EMAC_QUEUE_0);
     }
-}
-
-/****************************************************************************
- * Function: sam_txavail_work
- *
- * Description:
- *   Perform an out-of-cycle poll on the worker thread.
- *
- * Parameters:
- *   arg - Reference to the NuttX driver state structure (cast to void*)
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Called on the higher priority worker thread.
- *
- ****************************************************************************/
 
-#ifdef CONFIG_NET_NOINTS
-static void sam_txavail_work(FAR void *arg)
-{
-  FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)arg;
-  net_lock_t state;
-
-  /* Perform the poll */
-
-  state = net_lock();
-  sam_txavail_process(priv);
-  net_unlock(state);
+  net_unlock();
 }
-#endif
 
 /****************************************************************************
  * Function: sam_txavail
@@ -3021,34 +2831,18 @@ static int sam_txavail(struct net_driver_s *dev)
 {
   FAR struct sam_emac_s *priv = (FAR struct sam_emac_s *)dev->d_private;
 
-#ifdef CONFIG_NET_NOINTS
   /* Is our single work structure available?  It may not be if there are
    * pending interrupt actions and we will have to ignore the Tx
    * availability action.
    */
 
-  if (work_available(&priv->work))
+  if (work_available(&priv->pollwork))
     {
       /* Schedule to serialize the poll on the worker thread. */
 
-      work_queue(HPWORK, &priv->work, sam_txavail_work, priv, 0);
+      work_queue(ETHWORK, &priv->pollwork, sam_txavail_work, priv, 0);
     }
 
-#else
-  irqstate_t flags;
-
-  /* Disable interrupts because this function may be called from interrupt
-   * level processing.
-   */
-
-  flags = enter_critical_section();
-
-  /* Perform the out-of-cycle poll now */
-
-  sam_txavail_process(priv);
-  leave_critical_section(flags);
-#endif
-
   return OK;
 }
 
@@ -3208,8 +3002,8 @@ static int sam_addmac(struct net_driver_s *dev, const uint8_t *mac)
   unsigned int ndx;
   unsigned int bit;
 
-  nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Calculate the 6-bit has table index */
 
@@ -3281,8 +3075,8 @@ static int sam_rmmac(struct net_driver_s *dev, const uint8_t *mac)
   unsigned int ndx;
   unsigned int bit;
 
-  nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Calculate the 6-bit has table index */
 
@@ -3464,7 +3258,7 @@ static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_INFO)
 static void sam_phydump(struct sam_emac_s *priv)
 {
   uint32_t regval;
@@ -3476,19 +3270,19 @@ static void sam_phydump(struct sam_emac_s *priv)
   regval |= EMAC_NCR_MPE;
   sam_putreg(priv, SAM_EMAC_NCR_OFFSET, regval);
 
-  nllvdbg("%s Registers (Address %02x)\n",
-          priv->attr->rmii ? "RMII" : "MII", priv->phyaddr);
+  ninfo("%s Registers (Address %02x)\n",
+        priv->attr->rmii ? "RMII" : "MII", priv->phyaddr);
 
   sam_phyread(priv, priv->phyaddr, MII_MCR, &phyval);
-  nllvdbg("  MCR:       %04x\n", phyval);
+  ninfo("  MCR:       %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, MII_MSR, &phyval);
-  nllvdbg("  MSR:       %04x\n", phyval);
+  ninfo("  MSR:       %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, MII_ADVERTISE, &phyval);
-  nllvdbg("  ADVERTISE: %04x\n", phyval);
+  ninfo("  ADVERTISE: %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, MII_LPA, &phyval);
-  nllvdbg("  LPR:       %04x\n", phyval);
+  ninfo("  LPR:       %04x\n", phyval);
   sam_phyread(priv, priv->phyaddr, priv->attr->physr, &phyval);
-  nllvdbg("  PHYSR:     %04x\n", phyval);
+  ninfo("  PHYSR:     %04x\n", phyval);
 
   /* Disable management port */
 
@@ -3652,7 +3446,7 @@ static int sam_phyintenable(struct sam_emac_s *priv)
   else
 #endif
     {
-      ndbg("ERROR: Unsupported PHY type: %d\n", priv->phytype);
+      nerr("ERROR: Unsupported PHY type: %d\n", priv->phytype);
       ret = -ENOSYS;
     }
 
@@ -3716,7 +3510,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
   int timeout;
   int ret;
 
-  nllvdbg(" sam_phyreset\n");
+  ninfo(" sam_phyreset\n");
 
   /* Enable management port */
 
@@ -3729,7 +3523,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, MII_MCR_RESET);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywrite failed: %d\n", ret);
+      nerr("ERROR: sam_phywrite failed: %d\n", ret);
     }
 
   /* Wait for the PHY reset to complete */
@@ -3741,7 +3535,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
       int result = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
       if (result < 0)
         {
-          nlldbg("ERROR: Failed to read the MCR register: %d\n", ret);
+          nerr("ERROR: Failed to read the MCR register: %d\n", ret);
           ret = result;
         }
       else if ((mcr & MII_MCR_RESET) == 0)
@@ -3783,7 +3577,7 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
   unsigned int offset;
   int ret = -ESRCH;
 
-  nllvdbg("Find a valid PHY address\n");
+  ninfo("Find a valid PHY address\n");
 
   /* Enable management port */
 
@@ -3806,8 +3600,8 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
 
   else
     {
-      nlldbg("ERROR: sam_phyread failed for PHY address %02x: %d\n",
-             candidate, ret);
+      nerr("ERROR: sam_phyread failed for PHY address %02x: %d\n",
+           candidate, ret);
 
       for (offset = 0; offset < 32; offset++)
         {
@@ -3828,10 +3622,10 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
 
   if (ret == OK)
     {
-      nllvdbg("  PHYID1: %04x PHY addr: %d\n", phyval, candidate);
+      ninfo("  PHYID1: %04x PHY addr: %d\n", phyval, candidate);
       *phyaddr = candidate;
       sam_phyread(priv, candidate, priv->attr->physr, &phyval);
-      nllvdbg("  PHYSR:  %04x PHY addr: %d\n", phyval, candidate);
+      ninfo("  PHYSR:  %04x PHY addr: %d\n", phyval, candidate);
     }
 
   /* Disable management port */
@@ -3872,7 +3666,7 @@ static int sam_phyread(struct sam_emac_s *priv, uint8_t phyaddr,
   ret = sam_phywait(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+      nerr("ERROR: sam_phywait failed: %d\n", ret);
       return ret;
     }
 
@@ -3897,7 +3691,7 @@ static int sam_phyread(struct sam_emac_s *priv, uint8_t phyaddr,
   ret = sam_phywait(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+      nerr("ERROR: sam_phywait failed: %d\n", ret);
       return ret;
     }
 
@@ -3937,7 +3731,7 @@ static int sam_phywrite(struct sam_emac_s *priv, uint8_t phyaddr,
   ret = sam_phywait(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+      nerr("ERROR: sam_phywait failed: %d\n", ret);
       return ret;
     }
 
@@ -3962,7 +3756,7 @@ static int sam_phywrite(struct sam_emac_s *priv, uint8_t phyaddr,
   ret = sam_phywait(priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+      nerr("ERROR: sam_phywait failed: %d\n", ret);
       return ret;
     }
 
@@ -4007,33 +3801,33 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, MII_PHYID1, &phyid1);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read PHYID1\n");
+      nerr("ERROR: Failed to read PHYID1\n");
       goto errout;
     }
 
-  nllvdbg("PHYID1: %04x PHY address: %02x\n", phyid1, priv->phyaddr);
+  ninfo("PHYID1: %04x PHY address: %02x\n", phyid1, priv->phyaddr);
 
   ret = sam_phyread(priv, priv->phyaddr, MII_PHYID2, &phyid2);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read PHYID2\n");
+      nerr("ERROR: Failed to read PHYID2\n");
       goto errout;
     }
 
-  nllvdbg("PHYID2: %04x PHY address: %02x\n", phyid2, priv->phyaddr);
+  ninfo("PHYID2: %04x PHY address: %02x\n", phyid2, priv->phyaddr);
 
   if (phyid1 == priv->attr->msoui &&
      ((phyid2 & MII_PHYID2_OUI_MASK) >> MII_PHYID2_OUI_SHIFT) ==
       (uint16_t)priv->attr->lsoui)
     {
-      nllvdbg("  Vendor Model Number:   %04x\n",
-             (phyid2 & MII_PHYID2_MODEL_MASK) >> MII_PHYID2_MODEL_SHIFT);
-      nllvdbg("  Model Revision Number: %04x\n",
-             (phyid2 & MII_PHYID2_REV_MASK) >> MII_PHYID2_REV_SHIFT);
+      ninfo("  Vendor Model Number:   %04x\n",
+           (phyid2 & MII_PHYID2_MODEL_MASK) >> MII_PHYID2_MODEL_SHIFT);
+      ninfo("  Model Revision Number: %04x\n",
+           (phyid2 & MII_PHYID2_REV_MASK) >> MII_PHYID2_REV_SHIFT);
     }
   else
     {
-      nlldbg("ERROR: PHY not recognized\n");
+      nerr("ERROR: PHY not recognized\n");
     }
 
   /* Setup control register */
@@ -4041,7 +3835,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read MCR\n");
+      nerr("ERROR: Failed to read MCR\n");
       goto errout;
     }
 
@@ -4052,7 +3846,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to write MCR\n");
+      nerr("ERROR: Failed to write MCR\n");
       goto errout;
     }
 
@@ -4067,7 +3861,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, MII_ADVERTISE, advertise);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to write ANAR\n");
+      nerr("ERROR: Failed to write ANAR\n");
       goto errout;
     }
 
@@ -4076,7 +3870,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read MCR\n");
+      nerr("ERROR: Failed to read MCR\n");
       goto errout;
     }
 
@@ -4084,7 +3878,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to write MCR\n");
+      nerr("ERROR: Failed to write MCR\n");
       goto errout;
     }
 
@@ -4096,11 +3890,11 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to write MCR\n");
+      nerr("ERROR: Failed to write MCR\n");
       goto errout;
     }
 
-  nllvdbg("  MCR: %04x\n", mcr);
+  ninfo("  MCR: %04x\n", mcr);
 
   /* Check AutoNegotiate complete */
 
@@ -4110,7 +3904,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
       ret = sam_phyread(priv, priv->phyaddr, MII_MSR, &msr);
       if (ret < 0)
         {
-          nlldbg("ERROR: Failed to read MSR\n");
+          nerr("ERROR: Failed to read MSR\n");
           goto errout;
         }
 
@@ -4120,7 +3914,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
         {
           /* Yes.. break out of the loop */
 
-          nllvdbg("AutoNegotiate complete\n");
+          ninfo("AutoNegotiate complete\n");
           break;
         }
 
@@ -4128,7 +3922,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
 
       if (++timeout >= PHY_RETRY_MAX)
         {
-          nlldbg("ERROR: TimeOut\n");
+          nerr("ERROR: TimeOut\n");
           sam_phydump(priv);
           ret = -ETIMEDOUT;
           goto errout;
@@ -4140,7 +3934,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, MII_LPA, &lpa);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read ANLPAR\n");
+      nerr("ERROR: Failed to read ANLPAR\n");
       goto errout;
     }
 
@@ -4235,13 +4029,13 @@ static bool sam_linkup(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, MII_MSR, &msr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read MSR: %d\n", ret);
+      nerr("ERROR: Failed to read MSR: %d\n", ret);
       goto errout;
     }
 
   if ((msr & MII_MSR_LINKSTATUS) == 0)
     {
-      nlldbg("ERROR: MSR LinkStatus: %04x\n", msr);
+      nerr("ERROR: MSR LinkStatus: %04x\n", msr);
       goto errout;
     }
 
@@ -4250,7 +4044,7 @@ static bool sam_linkup(struct sam_emac_s *priv)
   ret = sam_phyread(priv, priv->phyaddr, priv->attr->physr, &physr);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to read PHYSR: %d\n", ret);
+      nerr("ERROR: Failed to read PHYSR: %d\n", ret);
       goto errout;
     }
 
@@ -4288,7 +4082,7 @@ static bool sam_linkup(struct sam_emac_s *priv)
 
   /* Start the EMAC transfers */
 
-  nllvdbg("Link is up\n");
+  ninfo("Link is up\n");
   linkup = true;
 
 errout:
@@ -4329,7 +4123,7 @@ static int sam_phyinit(struct sam_emac_s *priv)
   mck = BOARD_MCK_FREQUENCY;
   if (mck > (240*1000*1000))
     {
-      ndbg("ERROR: Cannot realize PHY clock\n");
+      nerr("ERROR: Cannot realize PHY clock\n");
       return -EINVAL;
     }
   else if (mck > (160*1000*1000))
@@ -4365,7 +4159,7 @@ static int sam_phyinit(struct sam_emac_s *priv)
   ret = sam_phyfind(priv, &priv->phyaddr);
   if (ret < 0)
     {
-      nlldbg("ERROR: sam_phyfind failed: %d\n", ret);
+      nerr("ERROR: sam_phyfind failed: %d\n", ret);
       return ret;
     }
 
@@ -4480,7 +4274,7 @@ static inline void sam_ethgpioconfig(struct sam_emac_s *priv)
   else
 #endif
     {
-      nvdbg("ERROR: emac=%d\n", priv->attr->emac);
+      nerr("ERROR: emac=%d\n", priv->attr->emac);
     }
 }
 
@@ -4803,11 +4597,11 @@ static void sam_macaddress(struct sam_emac_s *priv)
   struct net_driver_s *dev = &priv->dev;
   uint32_t regval;
 
-  nllvdbg("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          dev->d_ifname,
-          dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
-          dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
-          dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
+  ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        dev->d_ifname,
+        dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
+        dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
+        dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
 
   /* Set the MAC address */
 
@@ -4869,7 +4663,7 @@ static void sam_ipv6multicast(struct sam_emac_s *priv)
   mac[4] = tmp16 & 0xff;
   mac[5] = tmp16 >> 8;
 
-  nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+  ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
         mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   (void)sam_addmac(dev, mac);
@@ -5006,7 +4800,7 @@ static int sam_emac_configure(struct sam_emac_s *priv)
 {
   uint32_t regval;
 
-  nllvdbg("Entry\n");
+  ninfo("Entry\n");
 
   /* Enable clocking to the EMAC peripheral */
 
@@ -5081,6 +4875,7 @@ int sam_emac_initialize(int intf)
 {
   struct sam_emac_s *priv;
   const struct sam_emacattr_s *attr;
+  uint8_t *pktbuf;
 #if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
   uint8_t phytype;
 #endif
@@ -5091,6 +4886,7 @@ int sam_emac_initialize(int intf)
     {
       priv    = &g_emac0;
       attr    = &g_emac0_attr;
+      pktbuf  = g_pktbuf0;
 
 #if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
       phytype = SAMV7_EMAC0_PHY_TYPE;
@@ -5103,6 +4899,7 @@ int sam_emac_initialize(int intf)
     {
       priv    = &g_emac1;
       attr    = &g_emac1_attr;
+      pktbuf  = g_pktbuf1;
 
 #if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
       phytype = SAMV7_EMAC1_PHY_TYPE;
@@ -5111,7 +4908,7 @@ int sam_emac_initialize(int intf)
   else
 #endif
     {
-      ndbg("ERROR:  Interface %d not supported\n", intf);
+      nerr("ERROR:  Interface %d not supported\n", intf);
       return -EINVAL;
     }
 
@@ -5119,6 +4916,7 @@ int sam_emac_initialize(int intf)
 
   memset(priv, 0, sizeof(struct sam_emac_s));
   priv->attr          = attr;           /* Save the constant attributes */
+  priv->dev.d_buf     = pktbuf;         /* Single packet buffer */
   priv->dev.d_ifup    = sam_ifup;       /* I/F up (new IP address) callback */
   priv->dev.d_ifdown  = sam_ifdown;     /* I/F down callback */
   priv->dev.d_txavail = sam_txavail;    /* New TX data callback */
@@ -5140,7 +4938,7 @@ int sam_emac_initialize(int intf)
   priv->txpoll = wd_create();
   if (!priv->txpoll)
     {
-      ndbg("ERROR: Failed to create periodic poll timer\n");
+      nerr("ERROR: Failed to create periodic poll timer\n");
       ret = -EAGAIN;
       goto errout;
     }
@@ -5148,7 +4946,7 @@ int sam_emac_initialize(int intf)
   priv->txtimeout = wd_create();     /* Create TX timeout timer */
   if (!priv->txtimeout)
     {
-      ndbg("ERROR: Failed to create periodic poll timer\n");
+      nerr("ERROR: Failed to create periodic poll timer\n");
       ret = -EAGAIN;
       goto errout_with_txpoll;
     }
@@ -5162,7 +4960,7 @@ int sam_emac_initialize(int intf)
   ret = sam_buffer_allocate(priv);
   if (ret < 0)
     {
-      ndbg("ERROR: sam_buffer_allocate failed: %d\n", ret);
+      nerr("ERROR: sam_buffer_allocate failed: %d\n", ret);
       goto errout_with_txtimeout;
     }
 
@@ -5170,10 +4968,11 @@ int sam_emac_initialize(int intf)
    * the interface is in the 'up' state.
    */
 
-  ret = irq_attach(priv->attr->irq, priv->attr->handler);
+  ret = irq_attach(priv->attr->irq, sam_emac_interrupt, priv);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to attach the handler to the IRQ%d\n", priv->attr->irq);
+      nerr("ERROR: Failed to attach the handler to the IRQ%d\n",
+           priv->attr->irq);
       goto errout_with_buffers;
     }
 
@@ -5186,7 +4985,7 @@ int sam_emac_initialize(int intf)
   ret = sam_ifdown(&priv->dev);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to put the interface in the down state: %d\n", ret);
+      nerr("ERROR: Failed to put the interface in the down state: %d\n", ret);
       goto errout_with_buffers;
     }
 
@@ -5198,7 +4997,7 @@ int sam_emac_initialize(int intf)
       return ret;
     }
 
-  ndbg("ERROR: netdev_register() failed: %d\n", ret);
+  nerr("ERROR: netdev_register() failed: %d\n", ret);
 
 errout_with_buffers:
   sam_buffer_free(priv);
@@ -5261,7 +5060,7 @@ int sam_emac_setmacaddr(int intf, uint8_t mac[6])
   else
 #endif
     {
-      ndbg("ERROR:  Interface %d not supported\n", intf);
+      nerr("ERROR:  Interface %d not supported\n", intf);
       return -EINVAL;
     }
 
@@ -5270,7 +5069,7 @@ int sam_emac_setmacaddr(int intf, uint8_t mac[6])
   dev = &priv->dev;
   memcpy(dev->d_mac.ether_addr_octet, mac, 6);
 
-  nvdbg("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+  ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
         dev->d_ifname,
         dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
         dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
diff --git a/arch/arm/src/samv7/sam_ethernet.c b/arch/arm/src/samv7/sam_ethernet.c
index 3e19d958738ce3d441328cd799771cf6636f34c1..847099fb92d3078baff4a05f554a4e5c7ef67719 100644
--- a/arch/arm/src/samv7/sam_ethernet.c
+++ b/arch/arm/src/samv7/sam_ethernet.c
@@ -44,26 +44,6 @@
 
 #ifdef CONFIG_NET
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -99,7 +79,7 @@ void up_netinitialize(void)
   ret = sam_emac_initialize(EMAC0_INTF);
   if (ret < 0)
     {
-      nlldbg("ERROR: up_emac_initialize(EMAC0) failed: %d\n", ret);
+      nerr("ERROR: up_emac_initialize(EMAC0) failed: %d\n", ret);
     }
 #endif
 
@@ -109,7 +89,7 @@ void up_netinitialize(void)
   ret = sam_emac_initialize(EMAC1_INTF);
   if (ret < 0)
     {
-      nlldbg("ERROR: up_emac_initialize(EMAC1) failed: %d\n", ret);
+      nerr("ERROR: up_emac_initialize(EMAC1) failed: %d\n", ret);
     }
 #endif
 #endif
diff --git a/arch/arm/src/samv7/sam_freerun.c b/arch/arm/src/samv7/sam_freerun.c
index c5eec516ddf7be1a4ede26d1a053f900258dc95b..4db95112182ecf4414f06ae7e88c3b5e61605ae9 100644
--- a/arch/arm/src/samv7/sam_freerun.c
+++ b/arch/arm/src/samv7/sam_freerun.c
@@ -61,7 +61,7 @@
 
 #include "sam_freerun.h"
 
-#ifdef CONFIG_SAMV7_ONESHOT
+#ifdef CONFIG_SAMV7_FREERUN
 
 /****************************************************************************
  * Private Functions
@@ -124,7 +124,7 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
   uint32_t cmr;
   int ret;
 
-  tcvdbg("chan=%d resolution=%d usec\n", chan, resolution);
+  tmrinfo("chan=%d resolution=%d usec\n", chan, resolution);
   DEBUGASSERT(freerun && resolution > 0);
 
   /* Get the TC frequency the corresponds to the requested resolution */
@@ -136,13 +136,13 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
   ret = sam_tc_clockselect(frequency, &cmr, &actual);
   if (ret < 0)
     {
-      tcdbg("ERROR: sam_tc_clockselect failed: %d\n", ret);
+      tmrerr("ERROR: sam_tc_clockselect failed: %d\n", ret);
       return ret;
     }
 
-  tcvdbg("frequency=%lu, actual=%lu, cmr=%08lx\n",
-         (unsigned long)frequency, (unsigned long)actual,
-         (unsigned long)cmr);
+  tmrinfo("frequency=%lu, actual=%lu, cmr=%08lx\n",
+          (unsigned long)frequency, (unsigned long)actual,
+          (unsigned long)cmr);
 
   /* Allocate the timer/counter and select its mode of operation
    *
@@ -175,7 +175,7 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
   freerun->tch = sam_tc_allocate(chan, cmr);
   if (!freerun->tch)
     {
-      tcdbg("ERROR: Failed to allocate timer channel %d\n", chan);
+      tmrerr("ERROR: Failed to allocate timer channel %d\n", chan);
       return -EBUSY;
     }
 
@@ -260,9 +260,9 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts)
 
   leave_critical_section(flags);
 
-  tcvdbg("counter=%lu (%lu) overflow=%lu, sr=%08lx\n",
-         (unsigned long)counter,  (unsigned long)verify,
-         (unsigned long)overflow, (unsigned long)sr);
+  tmrinfo("counter=%lu (%lu) overflow=%lu, sr=%08lx\n",
+          (unsigned long)counter,  (unsigned long)verify,
+          (unsigned long)overflow, (unsigned long)sr);
 
   /* Convert the whole thing to units of microseconds.
    *
@@ -280,7 +280,7 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts)
   ts->tv_sec  = sec;
   ts->tv_nsec = (usec - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
 
-  tcvdbg("usec=%llu ts=(%lu, %lu)\n",
+  tmrinfo("usec=%llu ts=(%lu, %lu)\n",
           usec, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
 
   return OK;
@@ -319,4 +319,4 @@ int sam_freerun_uninitialize(struct sam_freerun_s *freerun)
   return OK;
 }
 
-#endif /* CONFIG_SAMV7_ONESHOT */
+#endif /* CONFIG_SAMV7_FREERUN */
diff --git a/arch/arm/src/samv7/sam_gpio.c b/arch/arm/src/samv7/sam_gpio.c
index 32547ff1a3b060a876c3cbf0f7ce8c1c1b61e917..1eac04d5765588eb32c7d34aceca63be69e8bb88 100644
--- a/arch/arm/src/samv7/sam_gpio.c
+++ b/arch/arm/src/samv7/sam_gpio.c
@@ -86,7 +86,7 @@
  * Private Data
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 static const char g_portchar[SAMV7_NPIO] =
 {
     'A'
@@ -152,6 +152,14 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin,
 
   if ((cfgset & GPIO_CFG_PULLUP) != 0)
     {
+#ifdef GPIO_HAVE_PULLDOWN
+      /* The pull-up on a pin can not be enabled if its pull-down is still
+       * active. Therefore, we need to disable the pull-down first before
+       * enabling the pull-up.
+       */
+
+      putreg32(pin, base + SAM_PIO_PPDDR_OFFSET);
+#endif
       putreg32(pin, base + SAM_PIO_PUER_OFFSET);
     }
   else
@@ -164,6 +172,12 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin,
 
   if ((cfgset & GPIO_CFG_PULLDOWN) != 0)
     {
+      /* The pull-down on a pin can not be enabled if its pull-up is still
+       * active. Therefore, we need to disable the pull-up first before
+       * enabling the pull-down.
+       */
+
+      putreg32(pin, base + SAM_PIO_PUDR_OFFSET);
       putreg32(pin, base + SAM_PIO_PPDER_OFFSET);
     }
   else
@@ -243,6 +257,14 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin,
 
   if ((cfgset & GPIO_CFG_PULLUP) != 0)
     {
+#ifdef GPIO_HAVE_PULLDOWN
+      /* The pull-up on a pin can not be enabled if its pull-down is still
+       * active. Therefore, we need to disable the pull-down first before
+       * enabling the pull-up.
+       */
+
+      putreg32(pin, base + SAM_PIO_PPDDR_OFFSET);
+#endif
       putreg32(pin, base + SAM_PIO_PUER_OFFSET);
     }
   else
@@ -255,6 +277,12 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin,
 
   if ((cfgset & GPIO_CFG_PULLDOWN) != 0)
     {
+      /* The pull-down on a pin can not be enabled if its pull-up is still
+       * active. Therefore, we need to disable the pull-up first before
+       * enabling the pull-down.
+       */
+
+      putreg32(pin, base + SAM_PIO_PUDR_OFFSET);
       putreg32(pin, base + SAM_PIO_PPDER_OFFSET);
     }
   else
@@ -330,6 +358,14 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin,
 
   if ((cfgset & GPIO_CFG_PULLUP) != 0)
     {
+#ifdef GPIO_HAVE_PULLDOWN
+      /* The pull-up on a pin can not be enabled if its pull-down is still
+       * active. Therefore, we need to disable the pull-down first before
+       * enabling the pull-up.
+       */
+
+      putreg32(pin, base + SAM_PIO_PPDDR_OFFSET);
+#endif
       putreg32(pin, base + SAM_PIO_PUER_OFFSET);
     }
   else
@@ -342,6 +378,12 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin,
 
   if ((cfgset & GPIO_CFG_PULLDOWN) != 0)
     {
+      /* The pull-down on a pin can not be enabled if its pull-up is still
+       * active. Therefore, we need to disable the pull-up first before
+       * enabling the pull-down.
+       */
+
+      putreg32(pin, base + SAM_PIO_PUDR_OFFSET);
       putreg32(pin, base + SAM_PIO_PPDER_OFFSET);
     }
   else
@@ -543,15 +585,11 @@ bool sam_gpioread(gpio_pinset_t pinset)
   uint32_t  pin  = sam_gpio_pinmask(pinset);
   uint32_t  regval;
 
-  if ((pinset & GPIO_MODE_MASK) == GPIO_OUTPUT)
-    {
-      regval = getreg32(base + SAM_PIO_ODSR_OFFSET);
-    }
-  else
-    {
-      regval = getreg32(base + SAM_PIO_PDSR_OFFSET);
-    }
+  /* Always read the Pin Data Status Register.  Otherwise an Open-Drain
+   * Output pin will not be read back correctly.
+   */
 
+  regval = getreg32(base + SAM_PIO_PDSR_OFFSET);
   return (regval & pin) != 0;
 }
 
@@ -563,7 +601,7 @@ bool sam_gpioread(gpio_pinset_t pinset)
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 int sam_dumpgpio(uint32_t pinset, const char *msg)
 {
   irqstate_t    flags;
@@ -578,40 +616,42 @@ int sam_dumpgpio(uint32_t pinset, const char *msg)
   /* The following requires exclusive access to the GPIO registers */
 
   flags = enter_critical_section();
-  lldbg("PIO%c pinset: %08x base: %08x -- %s\n",
-        g_portchar[port], pinset, base, msg);
-  lldbg("    PSR: %08x    OSR: %08x   IFSR: %08x   ODSR: %08x\n",
-        getreg32(base + SAM_PIO_PSR_OFFSET), getreg32(base + SAM_PIO_OSR_OFFSET),
-        getreg32(base + SAM_PIO_IFSR_OFFSET), getreg32(base + SAM_PIO_ODSR_OFFSET));
-  lldbg("   PDSR: %08x    IMR: %08x    ISR: %08x   MDSR: %08x\n",
-        getreg32(base + SAM_PIO_PDSR_OFFSET), getreg32(base + SAM_PIO_IMR_OFFSET),
-        getreg32(base + SAM_PIO_ISR_OFFSET), getreg32(base + SAM_PIO_MDSR_OFFSET));
-  lldbg(" ABCDSR: %08x %08x         IFSCSR: %08x  PPDSR: %08x\n",
-        getreg32(base + SAM_PIO_ABCDSR1_OFFSET), getreg32(base + SAM_PIO_ABCDSR2_OFFSET),
-        getreg32(base + SAM_PIO_IFSCSR_OFFSET), getreg32(base + SAM_PIO_PPDSR_OFFSET));
-  lldbg("   PUSR: %08x   SCDR: %08x   OWSR: %08x  AIMMR: %08x\n",
-        getreg32(base + SAM_PIO_PUSR_OFFSET), getreg32(base + SAM_PIO_SCDR_OFFSET),
-        getreg32(base + SAM_PIO_OWSR_OFFSET), getreg32(base + SAM_PIO_AIMMR_OFFSET));
-  lldbg("    ESR: %08x    LSR: %08x   ELSR: %08x FELLSR: %08x\n",
-        getreg32(base + SAM_PIO_ESR_OFFSET), getreg32(base + SAM_PIO_LSR_OFFSET),
-        getreg32(base + SAM_PIO_ELSR_OFFSET), getreg32(base + SAM_PIO_FELLSR_OFFSET));
-  lldbg(" FRLHSR: %08x LOCKSR: %08x   WPMR: %08x   WPSR: %08x\n",
-        getreg32(base + SAM_PIO_FRLHSR_OFFSET), getreg32(base + SAM_PIO_LOCKSR_OFFSET),
-        getreg32(base + SAM_PIO_WPMR_OFFSET), getreg32(base + SAM_PIO_WPSR_OFFSET));
-  lldbg("   PCMR: %08x  PCIMR: %08x  PCISR: %08x   PCRHR: %08x\n",
-        getreg32(base + SAM_PIO_PCMR_OFFSET), getreg32(base + SAM_PIO_PCIMR_OFFSET),
-        getreg32(base + SAM_PIO_PCISR_OFFSET), getreg32(base + SAM_PIO_PCRHR_OFFSET));
-  lldbg("SCHMITT: %08x DRIVER:%08x\n",
-        getreg32(base + SAM_PIO_SCHMITT_OFFSET), getreg32(base + SAM_PIO_DRIVER_OFFSET));
-  lldbg("    KER: %08x   KRCR: %08x    KDR: %08x   KIMR: %08x\n",
-        getreg32(base + SAM_PIO_KER_OFFSET), getreg32(base + SAM_PIO_KRCR_OFFSET),
-        getreg32(base + SAM_PIO_KDR_OFFSET), getreg32(base + SAM_PIO_KIMR_OFFSET));
-  lldbg("    KSR: %08x   KKPR: %08x    KKRR: %08x\n",
-        getreg32(base + SAM_PIO_KSR_OFFSET), getreg32(base + SAM_PIO_KKPR_OFFSET),
-        getreg32(base + SAM_PIO_KKRR_OFFSET));
-  lldbg("   PCMR: %08x  PCIMR: %08x  PCISR: %08x  PCRHR: %08x\n",
-        getreg32(base + SAM_PIO_PCMR_OFFSET), getreg32(base + SAM_PIO_PCIMR_OFFSET),
-        getreg32(base + SAM_PIO_PCISR_OFFSET), getreg32(base + SAM_PIO_PCRHR_OFFSET));
+
+  gpioinfo("PIO%c pinset: %08x base: %08x -- %s\n",
+           g_portchar[port], pinset, base, msg);
+  gpioinfo("    PSR: %08x    OSR: %08x   IFSR: %08x   ODSR: %08x\n",
+           getreg32(base + SAM_PIO_PSR_OFFSET), getreg32(base + SAM_PIO_OSR_OFFSET),
+           getreg32(base + SAM_PIO_IFSR_OFFSET), getreg32(base + SAM_PIO_ODSR_OFFSET));
+  gpioinfo("   PDSR: %08x    IMR: %08x    ISR: %08x   MDSR: %08x\n",
+           getreg32(base + SAM_PIO_PDSR_OFFSET), getreg32(base + SAM_PIO_IMR_OFFSET),
+           getreg32(base + SAM_PIO_ISR_OFFSET), getreg32(base + SAM_PIO_MDSR_OFFSET));
+  gpioinfo(" ABCDSR: %08x %08x         IFSCSR: %08x  PPDSR: %08x\n",
+           getreg32(base + SAM_PIO_ABCDSR1_OFFSET), getreg32(base + SAM_PIO_ABCDSR2_OFFSET),
+           getreg32(base + SAM_PIO_IFSCSR_OFFSET), getreg32(base + SAM_PIO_PPDSR_OFFSET));
+  gpioinfo("   PUSR: %08x   SCDR: %08x   OWSR: %08x  AIMMR: %08x\n",
+           getreg32(base + SAM_PIO_PUSR_OFFSET), getreg32(base + SAM_PIO_SCDR_OFFSET),
+           getreg32(base + SAM_PIO_OWSR_OFFSET), getreg32(base + SAM_PIO_AIMMR_OFFSET));
+  gpioinfo("    ESR: %08x    LSR: %08x   ELSR: %08x FELLSR: %08x\n",
+           getreg32(base + SAM_PIO_ESR_OFFSET), getreg32(base + SAM_PIO_LSR_OFFSET),
+           getreg32(base + SAM_PIO_ELSR_OFFSET), getreg32(base + SAM_PIO_FELLSR_OFFSET));
+  gpioinfo(" FRLHSR: %08x LOCKSR: %08x   WPMR: %08x   WPSR: %08x\n",
+           getreg32(base + SAM_PIO_FRLHSR_OFFSET), getreg32(base + SAM_PIO_LOCKSR_OFFSET),
+           getreg32(base + SAM_PIO_WPMR_OFFSET), getreg32(base + SAM_PIO_WPSR_OFFSET));
+  gpioinfo("   PCMR: %08x  PCIMR: %08x  PCISR: %08x   PCRHR: %08x\n",
+           getreg32(base + SAM_PIO_PCMR_OFFSET), getreg32(base + SAM_PIO_PCIMR_OFFSET),
+           getreg32(base + SAM_PIO_PCISR_OFFSET), getreg32(base + SAM_PIO_PCRHR_OFFSET));
+  gpioinfo("SCHMITT: %08x DRIVER:%08x\n",
+           getreg32(base + SAM_PIO_SCHMITT_OFFSET), getreg32(base + SAM_PIO_DRIVER_OFFSET));
+  gpioinfo("    KER: %08x   KRCR: %08x    KDR: %08x   KIMR: %08x\n",
+           getreg32(base + SAM_PIO_KER_OFFSET), getreg32(base + SAM_PIO_KRCR_OFFSET),
+           getreg32(base + SAM_PIO_KDR_OFFSET), getreg32(base + SAM_PIO_KIMR_OFFSET));
+  gpioinfo("    KSR: %08x   KKPR: %08x    KKRR: %08x\n",
+           getreg32(base + SAM_PIO_KSR_OFFSET), getreg32(base + SAM_PIO_KKPR_OFFSET),
+           getreg32(base + SAM_PIO_KKRR_OFFSET));
+  gpioinfo("   PCMR: %08x  PCIMR: %08x  PCISR: %08x  PCRHR: %08x\n",
+           getreg32(base + SAM_PIO_PCMR_OFFSET), getreg32(base + SAM_PIO_PCIMR_OFFSET),
+           getreg32(base + SAM_PIO_PCISR_OFFSET), getreg32(base + SAM_PIO_PCRHR_OFFSET));
+
   leave_critical_section(flags);
   return OK;
 }
diff --git a/arch/arm/src/samv7/sam_gpio.h b/arch/arm/src/samv7/sam_gpio.h
index 2e564ec787ddfe80124e6f5484df0f82936e9308..e6746da3978174158ea053b53f0bdf0faf7b4ed3 100644
--- a/arch/arm/src/samv7/sam_gpio.h
+++ b/arch/arm/src/samv7/sam_gpio.h
@@ -377,7 +377,7 @@ void sam_gpioirqdisable(int irq);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 int sam_dumpgpio(uint32_t pinset, const char *msg);
 #else
 #  define sam_dumpgpio(p,m)
diff --git a/arch/arm/src/samv7/sam_gpioirq.c b/arch/arm/src/samv7/sam_gpioirq.c
index 8929d1757799f24144465196ea8f8da13aae128a..78cbc4c5ed79090e122f54e9231bd6186b94cf80 100644
--- a/arch/arm/src/samv7/sam_gpioirq.c
+++ b/arch/arm/src/samv7/sam_gpioirq.c
@@ -192,35 +192,35 @@ static int sam_gpiointerrupt(uint32_t base, int irq0, void *context)
 }
 
 #ifdef CONFIG_SAMV7_GPIOA_IRQ
-static int sam_gpioainterrupt(int irq, void *context)
+static int sam_gpioainterrupt(int irq, void *context, FAR void *arg)
 {
   return sam_gpiointerrupt(SAM_PIOA_BASE, SAM_IRQ_PA0, context);
 }
 #endif
 
 #ifdef CONFIG_SAMV7_GPIOB_IRQ
-static int sam_gpiobinterrupt(int irq, void *context)
+static int sam_gpiobinterrupt(int irq, void *context, FAR void *arg)
 {
   return sam_gpiointerrupt(SAM_PIOB_BASE, SAM_IRQ_PB0, context);
 }
 #endif
 
 #ifdef CONFIG_SAMV7_GPIOC_IRQ
-static int sam_gpiocinterrupt(int irq, void *context)
+static int sam_gpiocinterrupt(int irq, void *context, FAR void *arg)
 {
   return sam_gpiointerrupt(SAM_PIOC_BASE, SAM_IRQ_PC0, context);
 }
 #endif
 
 #ifdef CONFIG_SAMV7_GPIOD_IRQ
-static int sam_gpiodinterrupt(int irq, void *context)
+static int sam_gpiodinterrupt(int irq, void *context, FAR void *arg)
 {
   return sam_gpiointerrupt(SAM_PIOD_BASE, SAM_IRQ_PD0, context);
 }
 #endif
 
 #ifdef CONFIG_SAMV7_GPIOE_IRQ
-static int sam_gpioeinterrupt(int irq, void *context)
+static int sam_gpioeinterrupt(int irq, void *context, FAR void *arg)
 {
   return sam_gpiointerrupt(SAM_PIOE_BASE, SAM_IRQ_PE0, context);
 }
@@ -255,7 +255,7 @@ void sam_gpioirqinitialize(void)
 
   /* Attach and enable the GPIOA IRQ */
 
-  (void)irq_attach(SAM_IRQ_PIOA, sam_gpioainterrupt);
+  (void)irq_attach(SAM_IRQ_PIOA, sam_gpioainterrupt, NULL);
   up_enable_irq(SAM_IRQ_PIOA);
 #endif
 
@@ -273,7 +273,7 @@ void sam_gpioirqinitialize(void)
 
   /* Attach and enable the GPIOB IRQ */
 
-  (void)irq_attach(SAM_IRQ_PIOB, sam_gpiobinterrupt);
+  (void)irq_attach(SAM_IRQ_PIOB, sam_gpiobinterrupt, NULL);
   up_enable_irq(SAM_IRQ_PIOB);
 #endif
 
@@ -291,7 +291,7 @@ void sam_gpioirqinitialize(void)
 
   /* Attach and enable the GPIOC IRQ */
 
-  (void)irq_attach(SAM_IRQ_PIOC, sam_gpiocinterrupt);
+  (void)irq_attach(SAM_IRQ_PIOC, sam_gpiocinterrupt, NULL);
   up_enable_irq(SAM_IRQ_PIOC);
 #endif
 
@@ -309,7 +309,7 @@ void sam_gpioirqinitialize(void)
 
   /* Attach and enable the GPIOC IRQ */
 
-  (void)irq_attach(SAM_IRQ_PIOD, sam_gpiodinterrupt);
+  (void)irq_attach(SAM_IRQ_PIOD, sam_gpiodinterrupt, NULL);
   up_enable_irq(SAM_IRQ_PIOD);
 #endif
 
@@ -327,7 +327,7 @@ void sam_gpioirqinitialize(void)
 
   /* Attach and enable the GPIOE IRQ */
 
-  (void)irq_attach(SAM_IRQ_PIOE, sam_gpioeinterrupt);
+  (void)irq_attach(SAM_IRQ_PIOE, sam_gpioeinterrupt, NULL);
   up_enable_irq(SAM_IRQ_PIOE);
 #endif
 }
diff --git a/arch/arm/src/samv7/sam_hsmci.c b/arch/arm/src/samv7/sam_hsmci.c
index 89d16b37928882b6ca1639d970f18ba3dbc79a7f..a83a51ecc0b3b11e841af7ba8b1e03a73d284973 100644
--- a/arch/arm/src/samv7/sam_hsmci.c
+++ b/arch/arm/src/samv7/sam_hsmci.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/samv7/sam_hsmci.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -52,6 +52,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -77,8 +78,19 @@
 
 /* Configuration ************************************************************/
 
-#ifndef CONFIG_SAMV7_XDMAC
-#  error "HSMCI support requires CONFIG_SAMV7_XDMAC"
+#ifndef CONFIG_SAMV7_HSMCI_DMA
+#  warning "Large Non-DMA transfer may result in RX overrun failures"
+#else
+#  ifndef CONFIG_SAMV7_XDMAC
+#    error "CONFIG_SAMV7_HSMCI_DMA support requires CONFIG_SAMV7_XDMAC"
+#  endif
+#  ifndef CONFIG_SDIO_DMA
+#    error CONFIG_SDIO_DMA must be defined with CONFIG_SAMV7_HSMCI_DMA
+#  endif
+#endif
+
+#ifndef CONFIG_DEBUG_MEMCARD_INFO
+#  undef CONFIG_SAMV7_HSMCI_REGDEBUG
 #endif
 
 /* System Bus Interfaces */
@@ -98,7 +110,7 @@
 #  error "This driver requires CONFIG_SDIO_BLOCKSETUP"
 #endif
 
-#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG_VERBOSE)
+#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG_INFO)
 #  undef CONFIG_SAMV7_HSMCI_CMDDEBUG
 #  undef CONFIG_SAMV7_HSMCI_XFRDEBUG
 #endif
@@ -336,7 +348,7 @@ struct sam_dev_s
 
   /* Callback support */
 
-  uint8_t            cdstatus;   /* Card status */
+  sdio_statset_t     cdstatus;   /* Card status */
   sdio_eventset_t    cbevents;   /* Set of events to be cause callbacks */
   worker_t           callback;   /* Registered callback function */
   void              *cbarg;      /* Registered callback argument */
@@ -460,20 +472,15 @@ static void sam_notransfer(struct sam_dev_s *priv);
 
 /* Interrupt Handling *******************************************************/
 
-static int  sam_hsmci_interrupt(struct sam_dev_s *priv);
-#ifdef CONFIG_SAMV7_HSMCI0
-static int  sam_hsmci0_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_SAMV7_HSMCI1
-static int  sam_hsmci1_interrupt(int irq, void *context);
-#endif
+static int  sam_hsmci_interrupt(int irq, void *context, void *arg);
 
 /* SDIO interface methods ***************************************************/
 
 /* Initialization/setup */
 
 static void sam_reset(FAR struct sdio_dev_s *dev);
-static uint8_t sam_status(FAR struct sdio_dev_s *dev);
+static sdio_capset_t sam_capabilities(FAR struct sdio_dev_s *dev);
+static sdio_statset_t sam_status(FAR struct sdio_dev_s *dev);
 static void sam_widebus(FAR struct sdio_dev_s *dev, bool enable);
 static void sam_clock(FAR struct sdio_dev_s *dev,
               enum sdio_clock_e rate);
@@ -511,9 +518,7 @@ static int  sam_registercallback(FAR struct sdio_dev_s *dev,
 
 /* DMA */
 
-#ifdef CONFIG_SDIO_DMA
-static bool sam_dmasupported(FAR struct sdio_dev_s *dev);
-#endif
+#ifdef CONFIG_SAMV7_HSMCI_DMA
 #ifndef HSCMI_NORXDMA
 static int  sam_dmarecvsetup(FAR struct sdio_dev_s *dev,
               FAR uint8_t *buffer, size_t buflen);
@@ -522,6 +527,7 @@ static int  sam_dmarecvsetup(FAR struct sdio_dev_s *dev,
 static int  sam_dmasendsetup(FAR struct sdio_dev_s *dev,
               FAR const uint8_t *buffer, size_t buflen);
 #endif
+#endif
 
 /* Initialization/uninitialization/reset ************************************/
 
@@ -535,6 +541,7 @@ static void sam_callback(void *arg);
 static const struct sdio_dev_s g_callbacks =
 {
   .reset            = sam_reset,
+  .capabilities     = sam_capabilities,
   .status           = sam_status,
   .widebus          = sam_widebus,
   .clock            = sam_clock,
@@ -557,7 +564,6 @@ static const struct sdio_dev_s g_callbacks =
   .callbackenable   = sam_callbackenable,
   .registercallback = sam_registercallback,
 #ifdef CONFIG_SDIO_DMA
-  .dmasupported     = sam_dmasupported,
 #ifndef HSCMI_NORXDMA
   .dmarecvsetup     = sam_dmarecvsetup,
 #else
@@ -653,7 +659,7 @@ static bool sam_checkreg(struct sam_dev_s *priv, bool wr, uint32_t value,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", priv->ntimes);
+          mcinfo("...[Repeats %d times]...\n", priv->ntimes);
         }
 
       /* Save information about the new access */
@@ -686,7 +692,7 @@ static inline uint32_t sam_getreg(struct sam_dev_s *priv, unsigned int offset)
 #ifdef CONFIG_SAMV7_HSMCI_REGDEBUG
   if (sam_checkreg(priv, false, value, address))
     {
-      lldbg("%08x->%08x\n", address, value);
+      mcinfo("%08x->%08x\n", address, value);
     }
 #endif
 
@@ -709,7 +715,7 @@ static inline void sam_putreg(struct sam_dev_s *priv, uint32_t value,
 #ifdef CONFIG_SAMV7_HSMCI_REGDEBUG
   if (sam_checkreg(priv, true, value, address))
     {
-      lldbg("%08x<-%08x\n", address, value);
+      mcinfo("%08x<-%08x\n", address, value);
     }
 #endif
 
@@ -933,25 +939,25 @@ static void sam_hsmcisample(struct sam_dev_s *priv,
 static void sam_hsmcidump(struct sam_dev_s *priv,
                           struct sam_hsmciregs_s *regs, const char *msg)
 {
-  fdbg("HSMCI Registers: %s\n", msg);
-  fdbg("      MR[%08x]: %08x\n", priv->base + SAM_HSMCI_MR_OFFSET,    regs->mr);
-  fdbg("    DTOR[%08x]: %08x\n", priv->base + SAM_HSMCI_DTOR_OFFSET,  regs->dtor);
-  fdbg("    SDCR[%08x]: %08x\n", priv->base + SAM_HSMCI_SDCR_OFFSET,  regs->sdcr);
-  fdbg("    ARGR[%08x]: %08x\n", priv->base + SAM_HSMCI_ARGR_OFFSET,  regs->argr);
-  fdbg("    BLKR[%08x]: %08x\n", priv->base + SAM_HSMCI_BLKR_OFFSET,  regs->blkr);
-  fdbg("   CSTOR[%08x]: %08x\n", priv->base + SAM_HSMCI_CSTOR_OFFSET, regs->cstor);
+  mcinfo("HSMCI Registers: %s\n", msg);
+  mcinfo("      MR[%08x]: %08x\n", priv->base + SAM_HSMCI_MR_OFFSET,    regs->mr);
+  mcinfo("    DTOR[%08x]: %08x\n", priv->base + SAM_HSMCI_DTOR_OFFSET,  regs->dtor);
+  mcinfo("    SDCR[%08x]: %08x\n", priv->base + SAM_HSMCI_SDCR_OFFSET,  regs->sdcr);
+  mcinfo("    ARGR[%08x]: %08x\n", priv->base + SAM_HSMCI_ARGR_OFFSET,  regs->argr);
+  mcinfo("    BLKR[%08x]: %08x\n", priv->base + SAM_HSMCI_BLKR_OFFSET,  regs->blkr);
+  mcinfo("   CSTOR[%08x]: %08x\n", priv->base + SAM_HSMCI_CSTOR_OFFSET, regs->cstor);
 #if 0 /* Reading these can cause loss of response data */
-  fdbg("   RSPR0[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR0_OFFSET, regs->rsp0);
-  fdbg("   RSPR1[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR1_OFFSET, regs->rsp1);
-  fdbg("   RSPR2[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR2_OFFSET, regs->rsp2);
-  fdbg("   RSPR3[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR3_OFFSET, regs->rsp3);
-#endif
-  fdbg("      SR[%08x]: %08x\n", priv->base + SAM_HSMCI_SR_OFFSET,    regs->sr);
-  fdbg("     IMR[%08x]: %08x\n", priv->base + SAM_HSMCI_IMR_OFFSET,   regs->imr);
-  fdbg("     DMA[%08x]: %08x\n", priv->base + SAM_HSMCI_DMA_OFFSET,   regs->dma);
-  fdbg("     CFG[%08x]: %08x\n", priv->base + SAM_HSMCI_CFG_OFFSET,   regs->cfg);
-  fdbg("    WPMR[%08x]: %08x\n", priv->base + SAM_HSMCI_WPMR_OFFSET,  regs->wpmr);
-  fdbg("    WPSR[%08x]: %08x\n", priv->base + SAM_HSMCI_WPSR_OFFSET,  regs->wpsr);
+  mcinfo("   RSPR0[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR0_OFFSET, regs->rsp0);
+  mcinfo("   RSPR1[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR1_OFFSET, regs->rsp1);
+  mcinfo("   RSPR2[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR2_OFFSET, regs->rsp2);
+  mcinfo("   RSPR3[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR3_OFFSET, regs->rsp3);
+#endif
+  mcinfo("      SR[%08x]: %08x\n", priv->base + SAM_HSMCI_SR_OFFSET,    regs->sr);
+  mcinfo("     IMR[%08x]: %08x\n", priv->base + SAM_HSMCI_IMR_OFFSET,   regs->imr);
+  mcinfo("     DMA[%08x]: %08x\n", priv->base + SAM_HSMCI_DMA_OFFSET,   regs->dma);
+  mcinfo("     CFG[%08x]: %08x\n", priv->base + SAM_HSMCI_CFG_OFFSET,   regs->cfg);
+  mcinfo("    WPMR[%08x]: %08x\n", priv->base + SAM_HSMCI_WPMR_OFFSET,  regs->wpmr);
+  mcinfo("    WPSR[%08x]: %08x\n", priv->base + SAM_HSMCI_WPSR_OFFSET,  regs->wpsr);
 }
 #endif
 
@@ -1025,7 +1031,7 @@ static void sam_xfrdumpone(struct sam_dev_s *priv, int index,
     }
   else
     {
-      fdbg("%s: Not collected\n", msg);
+      mcerr("ERROR: %s: Not collected\n", msg);
     }
 }
 #endif
@@ -1169,7 +1175,7 @@ static void sam_dmacallback(DMA_HANDLE handle, void *arg, int result)
       if (result < 0)
         {
           wkupevent = (result == -ETIMEDOUT ? SDIOWAIT_TIMEOUT : SDIOWAIT_ERROR);
-          flldbg("ERROR: DMA failed: result=%d wkupevent=%04x\n", result, wkupevent);
+          mcerr("ERROR: DMA failed: result=%d wkupevent=%04x\n", result, wkupevent);
 
           /* sam_endtransfer will terminate the transfer and wait up the waiting
            * client in this case.
@@ -1269,7 +1275,7 @@ static void sam_eventtimeout(int argc, uint32_t arg)
       /* Yes.. wake up any waiting threads */
 
       sam_endwait(priv, SDIOWAIT_TIMEOUT);
-      flldbg("ERROR: Timeout\n");
+      mcerr("ERROR: Timeout\n");
     }
 }
 
@@ -1425,20 +1431,22 @@ static void sam_notransfer(struct sam_dev_s *priv)
  *   HSMCI interrupt handler
  *
  * Input Parameters:
- *   irq - IRQ number of the interrupts
- *   context - Saved machine context at the time of the interrupt
+ *   Standard interrupt handler arguments.
  *
  * Returned Value:
  *   None
  *
  ****************************************************************************/
 
-static int sam_hsmci_interrupt(struct sam_dev_s *priv)
+static int sam_hsmci_interrupt(int irq, void *context, void *arg)
 {
+  struct sam_dev_s *priv = (struct sam_dev_s *)arg;
   uint32_t sr;
   uint32_t enabled;
   uint32_t pending;
 
+  DEBUGASSERT(priv != NULL);
+
   /* Loop while there are pending interrupts. */
 
   for (; ; )
@@ -1469,7 +1477,7 @@ static int sam_hsmci_interrupt(struct sam_dev_s *priv)
             {
               /* Yes.. Was it some kind of timeout error? */
 
-              flldbg("ERROR: enabled: %08x pending: %08x\n", enabled, pending);
+              mcerr("ERROR: enabled: %08x pending: %08x\n", enabled, pending);
               if ((pending & HSMCI_DATA_TIMEOUT_ERRORS) != 0)
                 {
                   /* Yes.. Terminate with a timeout. */
@@ -1590,8 +1598,8 @@ static int sam_hsmci_interrupt(struct sam_dev_s *priv)
                 {
                   /* Yes.. Was the error some kind of timeout? */
 
-                  fllvdbg("ERROR: events: %08x SR: %08x\n",
-                          priv->cmdrmask, enabled);
+                  mcerr("ERROR: events: %08x SR: %08x\n",
+                         priv->cmdrmask, enabled);
 
                   if ((pending & HSMCI_RESPONSE_TIMEOUT_ERRORS) != 0)
                     {
@@ -1631,35 +1639,6 @@ static int sam_hsmci_interrupt(struct sam_dev_s *priv)
   return OK;
 }
 
-/****************************************************************************
- * Name: sam_hsmci0_interrupt, sam_hsmci1_interrupt, and sam_hsmci2_interrupt
- *
- * Description:
- *   HSMCI interrupt handler
- *
- * Input Parameters:
- *   irq - IRQ number of the interrupts
- *   context - Saved machine context at the time of the interrupt
- *
- * Returned Value:
- *   None
- *
- ****************************************************************************/
-
-#ifdef CONFIG_SAMV7_HSMCI0
-static int sam_hsmci0_interrupt(int irq, void *context)
-{
-  return sam_hsmci_interrupt(&g_hsmci0);
-}
-#endif
-
-#ifdef CONFIG_SAMV7_HSMCI1
-static int sam_hsmci1_interrupt(int irq, void *context)
-{
-  return sam_hsmci_interrupt(&g_hsmci1);
-}
-#endif
-
 /****************************************************************************
  * SDIO Interface Methods
  ****************************************************************************/
@@ -1743,6 +1722,31 @@ static void sam_reset(FAR struct sdio_dev_s *dev)
   leave_critical_section(flags);
 }
 
+/****************************************************************************
+ * Name: sam_capabilities
+ *
+ * Description:
+ *   Get capabilities (and limitations) of the SDIO driver (optional)
+ *
+ * Input Parameters:
+ *   dev   - Device-specific state data
+ *
+ * Returned Value:
+ *   Returns a bitset of status values (see SDIO_CAPS_* defines)
+ *
+ ****************************************************************************/
+
+static sdio_capset_t sam_capabilities(FAR struct sdio_dev_s *dev)
+{
+  sdio_capset_t caps = 0;
+
+#ifdef CONFIG_SAMV7_HSMCI_DMA
+  caps |= SDIO_CAPS_DMASUPPORTED;
+#endif
+
+  return caps;
+}
+
 /****************************************************************************
  * Name: sam_status
  *
@@ -1757,7 +1761,7 @@ static void sam_reset(FAR struct sdio_dev_s *dev)
  *
  ****************************************************************************/
 
-static uint8_t sam_status(FAR struct sdio_dev_s *dev)
+static sdio_statset_t sam_status(FAR struct sdio_dev_s *dev)
 {
   struct sam_dev_s *priv = (struct sam_dev_s *)dev;
   return priv->cdstatus;
@@ -1885,7 +1889,6 @@ static void sam_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
 static int sam_attach(FAR struct sdio_dev_s *dev)
 {
   struct sam_dev_s *priv = (struct sam_dev_s *)dev;
-  xcpt_t handler;
   int irq;
   int ret;
 
@@ -1894,16 +1897,14 @@ static int sam_attach(FAR struct sdio_dev_s *dev)
 #ifdef CONFIG_SAMV7_HSMCI0
   if (priv->hsmci == 0)
     {
-      handler = sam_hsmci0_interrupt;
-      irq     = SAM_IRQ_HSMCI0;
+      irq = SAM_IRQ_HSMCI0;
     }
   else
 #endif
 #ifdef CONFIG_SAMV7_HSMCI1
   if (priv->hsmci == 1)
     {
-      handler = sam_hsmci1_interrupt;
-      irq     = SAM_IRQ_HSMCI1;
+      irq = SAM_IRQ_HSMCI1;
     }
   else
 #endif
@@ -1914,7 +1915,7 @@ static int sam_attach(FAR struct sdio_dev_s *dev)
 
   /* Attach the HSMCI interrupt handler */
 
-  ret = irq_attach(irq, handler);
+  ret = irq_attach(irq, sam_hsmci_interrupt, priv);
   if (ret == OK)
     {
 
@@ -2056,7 +2057,7 @@ static int sam_sendcmd(FAR struct sdio_dev_s *dev,
 
   /* Write the fully decorated command to CMDR */
 
-  fvdbg("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
+  mcinfo("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
   sam_putreg(priv, regval, SAM_HSMCI_CMDR_OFFSET);
   sam_cmdsample1(priv, SAMPLENDX_AFTER_CMDR);
   return OK;
@@ -2239,7 +2240,7 @@ static int sam_sendsetup(FAR struct sdio_dev_s *dev, FAR const uint8_t *buffer,
         {
           /* Some fatal error has occurred */
 
-          fdbg("ERROR: sr %08x\n", sr);
+          mcerr("ERROR: sr %08x\n", sr);
           return -EIO;
         }
       else if ((sr & HSMCI_INT_TXRDY) != 0)
@@ -2419,7 +2420,7 @@ static int sam_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
             {
               /* Yes.. Was the error some kind of timeout? */
 
-              fdbg("ERROR: cmd: %08x events: %08x SR: %08x\n",
+              mcerr("ERROR: cmd: %08x events: %08x SR: %08x\n",
                    cmd, priv->cmdrmask, sr);
 
               if ((pending & HSMCI_RESPONSE_TIMEOUT_ERRORS) != 0)
@@ -2449,7 +2450,7 @@ static int sam_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
        }
       else if (--timeout <= 0)
         {
-          fdbg("ERROR: Timeout cmd: %08x events: %08x SR: %08x\n",
+          mcerr("ERROR: Timeout cmd: %08x events: %08x SR: %08x\n",
                cmd, priv->cmdrmask, sr);
 
           priv->wkupevent = SDIOWAIT_TIMEOUT;
@@ -2521,10 +2522,10 @@ static int sam_recvshort(FAR struct sdio_dev_s *dev,
    *     0         1               End bit
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!rshort)
     {
-      fdbg("ERROR: rshort=NULL\n");
+      mcerr("ERROR: rshort=NULL\n");
       ret = -EINVAL;
     }
 
@@ -2536,7 +2537,7 @@ static int sam_recvshort(FAR struct sdio_dev_s *dev,
            (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R3_RESPONSE &&
            (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R7_RESPONSE)
     {
-      fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+      mcerr("ERROR: Wrong response CMD=%08x\n", cmd);
       ret = -EINVAL;
     }
   else
@@ -2582,12 +2583,12 @@ static int sam_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd,
    *     0         1               End bit
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   /* Check that R1 is the correct response to this command */
 
   if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R2_RESPONSE)
     {
-      fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+      mcerr("ERROR: Wrong response CMD=%08x\n", cmd);
       ret = -EINVAL;
     }
   else
@@ -2597,7 +2598,7 @@ static int sam_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd,
 
   if ((priv->wkupevent & SDIOWAIT_TIMEOUT) != 0)
     {
-      fdbg("ERROR: timeout\n");
+      mcerr("ERROR: timeout\n");
       ret = -EINVAL;
     }
 
@@ -2605,7 +2606,7 @@ static int sam_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd,
 
   else if ((priv->wkupevent & SDIOWAIT_ERROR) != 0)
     {
-      fdbg("ERROR: Other error\n");
+      mcerr("ERROR: Other error\n");
       ret = -EIO;
     }
 
@@ -2781,7 +2782,7 @@ static sdio_eventset_t sam_eventwait(FAR struct sdio_dev_s *dev,
                        1, (uint32_t)priv);
       if (ret != OK)
         {
-           fdbg("ERROR: wd_start failed: %d\n", ret);
+           mcerr("ERROR: wd_start failed: %d\n", ret);
         }
     }
 
@@ -2847,7 +2848,7 @@ static void sam_callbackenable(FAR struct sdio_dev_s *dev,
 {
   struct sam_dev_s *priv = (struct sam_dev_s *)dev;
 
-  fvdbg("eventset: %02x\n", eventset);
+  mcinfo("eventset: %02x\n", eventset);
   DEBUGASSERT(priv != NULL);
 
   priv->cbevents = eventset;
@@ -2883,7 +2884,7 @@ static int sam_registercallback(FAR struct sdio_dev_s *dev,
 
   /* Disable callbacks and register this callback and is argument */
 
-  fvdbg("Register %p(%p)\n", callback, arg);
+  mcinfo("Register %p(%p)\n", callback, arg);
   DEBUGASSERT(priv != NULL);
 
   priv->cbevents = 0;
@@ -2892,27 +2893,6 @@ static int sam_registercallback(FAR struct sdio_dev_s *dev,
   return OK;
 }
 
-/****************************************************************************
- * Name: sam_dmasupported
- *
- * Description:
- *   Return true if the hardware can support DMA
- *
- * Input Parameters:
- *   dev - An instance of the SDIO device interface
- *
- * Returned Value:
- *   true if DMA is supported.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_SDIO_DMA
-static bool sam_dmasupported(FAR struct sdio_dev_s *dev)
-{
-  return true;
-}
-#endif
-
 /****************************************************************************
  * Name: sam_dmarecvsetup
  *
@@ -3158,7 +3138,7 @@ static void sam_callback(void *arg)
   /* Is a callback registered? */
 
   DEBUGASSERT(priv != NULL);
-  fvdbg("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
+  mcinfo("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
         priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus);
 
   flags = enter_critical_section();
@@ -3213,17 +3193,17 @@ static void sam_callback(void *arg)
         {
           /* NOTE: Currently, work_cancel only returns success */
 
-          fdbg("ERROR: Failed to cancel work: %d\n", ret);
+          mcerr("ERROR: Failed to cancel work: %d\n", ret);
         }
 
-      fllvdbg("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
+      mcinfo("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
       ret = work_queue(LPWORK, &priv->cbwork, (worker_t)priv->callback,
                        priv->cbarg, 0);
       if (ret < 0)
         {
           /* NOTE: Currently, work_queue only returns success */
 
-          fdbg("ERROR: Failed to schedule work: %d\n", ret);
+          mcerr("ERROR: Failed to schedule work: %d\n", ret);
         }
     }
 
@@ -3261,7 +3241,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
    * for now, an* HSMCI peripheral does correspond to a slot.
    */
 
-  fvdbg("slotno: %d\n", slotno);
+  mcinfo("slotno: %d\n", slotno);
 
 #ifdef CONFIG_SAMV7_HSMCI0
   if (slotno == 0)
@@ -3344,12 +3324,22 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
       return NULL;
     }
 
-  fvdbg("priv: %p base: %08x hsmci: %d pid: %d\n",
+  mcinfo("priv: %p base: %08x hsmci: %d pid: %d\n",
         priv, priv->base, priv->hsmci, pid);
 
   /* Initialize the HSMCI slot structure */
+  /* Initialize semaphores */
 
   sem_init(&priv->waitsem, 0, 0);
+
+  /* The waitsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
+
+  /* Create a watchdog timer */
+
   priv->waitwdog = wd_create();
   DEBUGASSERT(priv->waitwdog);
 
@@ -3395,7 +3385,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
 void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
 {
   struct sam_dev_s *priv = (struct sam_dev_s *)dev;
-  uint8_t cdstatus;
+  sdio_statset_t cdstatus;
   irqstate_t flags;
 
   /* Update card status.  Interrupts are disabled here because if we are
@@ -3414,7 +3404,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
       priv->cdstatus &= ~SDIO_STATUS_PRESENT;
     }
 
-  fllvdbg("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
+  mcinfo("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
 
   /* Perform any requested callback if the status has changed */
 
@@ -3459,7 +3449,7 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
       priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED;
     }
 
-  fvdbg("cdstatus: %02x\n", priv->cdstatus);
+  mcinfo("cdstatus: %02x\n", priv->cdstatus);
   leave_critical_section(flags);
 }
 
diff --git a/arch/arm/src/samv7/sam_irq.c b/arch/arm/src/samv7/sam_irq.c
index 963b87db1daec5e15a714b763fb355068426c2e1..f2e448932984dee2183fda3db49de3a7df6a3299 100644
--- a/arch/arm/src/samv7/sam_irq.c
+++ b/arch/arm/src/samv7/sam_irq.c
@@ -108,52 +108,54 @@ extern uint32_t _vectors[];
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_IRQ)
+#if defined(CONFIG_DEBUG_IRQ_INFO)
 static void sam_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = enter_critical_section();
-  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  lldbg("  INTCTRL:    %08x VECTAB:  %08x\n",
+
+  irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
+  irqinfo("  INTCTRL:    %08x VECTAB:  %08x\n",
         getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
 #if 0
-  lldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
-        getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
-        getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+  irqinfo("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+          getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
+          getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
 #endif
-  lldbg("  IRQ ENABLE: %08x %08x %08x\n",
-        getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
-        getreg32(NVIC_IRQ64_95_ENABLE));
-  lldbg("  SYSH_PRIO:  %08x %08x %08x\n",
-        getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
-        getreg32(NVIC_SYSH12_15_PRIORITY));
-  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
-        getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+  irqinfo("  IRQ ENABLE: %08x %08x %08x\n",
+          getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
+          getreg32(NVIC_IRQ64_95_ENABLE));
+  irqinfo("  SYSH_PRIO:  %08x %08x %08x\n",
+          getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+          getreg32(NVIC_SYSH12_15_PRIORITY));
+  irqinfo("  IRQ PRIO:   %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
+          getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
 #if SAM_IRQ_NEXTINT > 15
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
-        getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
+          getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
 #endif
 #if SAM_IRQ_NEXTINT > 31
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
-        getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
+          getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
 #endif
 #if SAM_IRQ_NEXTINT > 47
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
-        getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
+          getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
 #endif
 #if SAM_IRQ_NEXTINT > 63
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
-        getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
+          getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
 #endif
 #if SAM_IRQ_NEXTINT > 79
 #  warning Missing logic
 #endif
+
   leave_critical_section(flags);
 }
 #else
@@ -171,51 +173,51 @@ static void sam_dumpnvic(const char *msg, int irq)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
-static int sam_nmi(int irq, FAR void *context)
+#ifdef CONFIG_DEBUG_FEATURES
+static int sam_nmi(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! NMI received\n");
+  _err("PANIC!!! NMI received\n");
   PANIC();
   return 0;
 }
 
-static int sam_busfault(int irq, FAR void *context)
+static int sam_busfault(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
+  _err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
   PANIC();
   return 0;
 }
 
-static int sam_usagefault(int irq, FAR void *context)
+static int sam_usagefault(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
+  _err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
   PANIC();
   return 0;
 }
 
-static int sam_pendsv(int irq, FAR void *context)
+static int sam_pendsv(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! PendSV received\n");
+  _err("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
 }
 
-static int sam_dbgmonitor(int irq, FAR void *context)
+static int sam_dbgmonitor(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Debug Monitor received\n");
+  _err("PANIC!!! Debug Monitor received\n");
   PANIC();
   return 0;
 }
 
-static int sam_reserved(int irq, FAR void *context)
+static int sam_reserved(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Reserved interrupt\n");
+  _err("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;
 }
@@ -433,8 +435,8 @@ void up_irqinitialize(void)
    * under certain conditions.
    */
 
-  irq_attach(SAM_IRQ_SVCALL, up_svcall);
-  irq_attach(SAM_IRQ_HARDFAULT, up_hardfault);
+  irq_attach(SAM_IRQ_SVCALL, up_svcall, NULL);
+  irq_attach(SAM_IRQ_HARDFAULT, up_hardfault, NULL);
 
   /* Set the priority of the SVCall interrupt */
 
@@ -450,22 +452,22 @@ void up_irqinitialize(void)
    */
 
 #ifdef CONFIG_ARM_MPU
-  irq_attach(SAM_IRQ_MEMFAULT, up_memfault);
+  irq_attach(SAM_IRQ_MEMFAULT, up_memfault, NULL);
   up_enable_irq(SAM_IRQ_MEMFAULT);
 #endif
 
   /* Attach all other processor exceptions (except reset and sys tick) */
 
-#ifdef CONFIG_DEBUG
-  irq_attach(SAM_IRQ_NMI, sam_nmi);
+#ifdef CONFIG_DEBUG_FEATURES
+  irq_attach(SAM_IRQ_NMI, sam_nmi, NULL);
 #ifndef CONFIG_ARM_MPU
-  irq_attach(SAM_IRQ_MEMFAULT, up_memfault);
+  irq_attach(SAM_IRQ_MEMFAULT, up_memfault, NULL);
 #endif
-  irq_attach(SAM_IRQ_BUSFAULT, sam_busfault);
-  irq_attach(SAM_IRQ_USAGEFAULT, sam_usagefault);
-  irq_attach(SAM_IRQ_PENDSV, sam_pendsv);
-  irq_attach(SAM_IRQ_DBGMONITOR, sam_dbgmonitor);
-  irq_attach(SAM_IRQ_RESERVED, sam_reserved);
+  irq_attach(SAM_IRQ_BUSFAULT, sam_busfault, NULL);
+  irq_attach(SAM_IRQ_USAGEFAULT, sam_usagefault, NULL);
+  irq_attach(SAM_IRQ_PENDSV, sam_pendsv, NULL);
+  irq_attach(SAM_IRQ_DBGMONITOR, sam_dbgmonitor, NULL);
+  irq_attach(SAM_IRQ_RESERVED, sam_reserved, NULL);
 #endif
 
   sam_dumpnvic("initial", SAM_IRQ_NIRQS);
diff --git a/arch/arm/src/samv7/sam_mcan.c b/arch/arm/src/samv7/sam_mcan.c
index f1f8f788a2f3107cb946d7f666d8a8b1b1d2414c..7d16f0898df0572d7d414164d99d796848424396 100644
--- a/arch/arm/src/samv7/sam_mcan.c
+++ b/arch/arm/src/samv7/sam_mcan.c
@@ -56,7 +56,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 #include "cache.h"
 #include "up_internal.h"
@@ -789,33 +789,20 @@
 /* Debug ********************************************************************/
 /* Debug configurations that may be enabled just for testing MCAN */
 
-#if !defined(CONFIG_DEBUG) || !defined(CONFIG_DEBUG_CAN)
+#ifndef CONFIG_DEBUG_CAN_INFO
 #  undef CONFIG_SAMV7_MCAN_REGDEBUG
 #endif
 
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
-
-#  ifdef CONFIG_SAMV7_MCAN_REGDEBUG
-#    define canregdbg lldbg
-#  else
-#    define canregdbg(x...)
-#  endif
-
+#ifdef CONFIG_SAMV7_MCAN_REGDEBUG
+#  define reginfo caninfo
 #else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
-#  define canregdbg(x...)
+#  define reginfo(x...)
 #endif
 
 /****************************************************************************
  * Private Types
  ****************************************************************************/
+
 /* CAN mode of operation */
 
 enum sam_canmode_e
@@ -854,7 +841,6 @@ struct sam_config_s
 {
   gpio_pinset_t rxpinset;   /* RX pin configuration */
   gpio_pinset_t txpinset;   /* TX pin configuration */
-  xcpt_t handler;           /* MCAN common interrupt handler */
   uintptr_t base;           /* Base address of the MCAN registers */
   uint32_t baud;            /* Configured baud */
   uint32_t btp;             /* Bit timing/prescaler register setting */
@@ -986,13 +972,7 @@ static void mcan_error(FAR struct can_dev_s *dev, uint32_t status,
 #endif
 static void mcan_receive(FAR struct can_dev_s *dev,
               FAR uint32_t *rxbuffer, unsigned long nwords);
-static void mcan_interrupt(FAR struct can_dev_s *dev);
-#ifdef CONFIG_SAMV7_MCAN0
-static int  mcan0_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_SAMV7_MCAN1
-static int  mcan1_interrupt(int irq, void *context);
-#endif
+static int  mcan_interrupt(int irq, void *context, FAR void *arg);
 
 /* Hardware initialization */
 
@@ -1032,7 +1012,6 @@ static const struct sam_config_s g_mcan0const =
 {
   .rxpinset         = GPIO_MCAN0_RX,
   .txpinset         = GPIO_MCAN0_TX,
-  .handler          = mcan0_interrupt,
   .base             = SAM_MCAN0_BASE,
   .baud             = CONFIG_SAMV7_MCAN0_BITRATE,
   .btp              = MCAN_BTP_BRP(MCAN0_BRP) | MCAN_BTP_TSEG1(MCAN0_TSEG1) |
@@ -1109,7 +1088,6 @@ static const struct sam_config_s g_mcan1const =
 {
   .rxpinset         = GPIO_MCAN1_RX,
   .txpinset         = GPIO_MCAN1_TX,
-  .handler          = mcan1_interrupt,
   .base             = SAM_MCAN1_BASE,
   .baud             = CONFIG_SAMV7_MCAN1_BITRATE,
   .btp              = MCAN_BTP_BRP(MCAN1_BRP) | MCAN_BTP_TSEG1(MCAN1_TSEG1) |
@@ -1209,7 +1187,7 @@ static uint32_t mcan_getreg(FAR struct sam_mcan_s *priv, int offset)
         {
           if (priv->count == 4)
             {
-              lldbg("...\n");
+              caninfo("...\n");
             }
 
           return regval;
@@ -1226,7 +1204,7 @@ static uint32_t mcan_getreg(FAR struct sam_mcan_s *priv, int offset)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", priv->count - 3);
+          caninfo("[repeats %d more times]\n", priv->count - 3);
         }
 
       /* Save the new address, value, and count */
@@ -1238,7 +1216,7 @@ static uint32_t mcan_getreg(FAR struct sam_mcan_s *priv, int offset)
 
   /* Show the register value read */
 
-  lldbg("%08x->%08x\n", regaddr, regval);
+  caninfo("%08x->%08x\n", regaddr, regval);
   return regval;
 }
 
@@ -1275,7 +1253,7 @@ static void mcan_putreg(FAR struct sam_mcan_s *priv, int offset, uint32_t regval
 
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", regaddr, regval);
+  caninfo("%08x<-%08x\n", regaddr, regval);
 
   /* Write the value */
 
@@ -1310,74 +1288,74 @@ static void mcan_dumpregs(FAR struct sam_mcan_s *priv, FAR const char *msg)
 {
   FAR const struct sam_config_s *config = priv->config;
 
-  lldbg("MCAN%d Registers: %s\n", config->port, msg);
-  lldbg("   Base: %08x\n", config->base);
-
-  lldbg("   CUST: %08x  FBTP: %08x TEST: %08x    RWD: %08x\n",
-        getreg32(config->base + SAM_MCAN_CUST_OFFSET),
-        getreg32(config->base + SAM_MCAN_FBTP_OFFSET),
-        getreg32(config->base + SAM_MCAN_TEST_OFFSET),
-        getreg32(config->base + SAM_MCAN_RWD_OFFSET));
-
-  lldbg("  CCCR: %08x   BTP: %08x  TSCC: %08x   TSCV: %08x\n",
-        getreg32(config->base + SAM_MCAN_CCCR_OFFSET),
-        getreg32(config->base + SAM_MCAN_BTP_OFFSET),
-        getreg32(config->base + SAM_MCAN_TSCC_OFFSET),
-        getreg32(config->base + SAM_MCAN_TSCV_OFFSET));
-
-  lldbg("  TOCC: %08x  TOCV: %08x   ECR: %08x    PSR: %08x\n",
-        getreg32(config->base + SAM_MCAN_TOCC_OFFSET),
-        getreg32(config->base + SAM_MCAN_TOCV_OFFSET),
-        getreg32(config->base + SAM_MCAN_ECR_OFFSET),
-        getreg32(config->base + SAM_MCAN_PSR_OFFSET));
-
-  lldbg("    IR: %08x    IE: %08x   ILS: %08x    ILE: %08x\n",
-        getreg32(config->base + SAM_MCAN_IR_OFFSET),
-        getreg32(config->base + SAM_MCAN_IE_OFFSET),
-        getreg32(config->base + SAM_MCAN_ILS_OFFSET),
-        getreg32(config->base + SAM_MCAN_ILE_OFFSET));
-
-  lldbg("   GFC: %08x SIDFC: %08x XIDFC: %08x  XIDAM: %08x\n",
-        getreg32(config->base + SAM_MCAN_GFC_OFFSET),
-        getreg32(config->base + SAM_MCAN_SIDFC_OFFSET),
-        getreg32(config->base + SAM_MCAN_XIDFC_OFFSET),
-        getreg32(config->base + SAM_MCAN_XIDAM_OFFSET));
-
-  lldbg("  HPMS: %08x NDAT1: %08x NDAT2: %08x  RXF0C: %08x\n",
-        getreg32(config->base + SAM_MCAN_HPMS_OFFSET),
-        getreg32(config->base + SAM_MCAN_NDAT1_OFFSET),
-        getreg32(config->base + SAM_MCAN_NDAT2_OFFSET),
-        getreg32(config->base + SAM_MCAN_RXF0C_OFFSET));
-
-  lldbg(" RXF0S: %08x FXF0A: %08x  RXBC: %08x  RXF1C: %08x\n",
-        getreg32(config->base + SAM_MCAN_RXF0S_OFFSET),
-        getreg32(config->base + SAM_MCAN_RXF0A_OFFSET),
-        getreg32(config->base + SAM_MCAN_RXBC_OFFSET),
-        getreg32(config->base + SAM_MCAN_RXF1C_OFFSET));
-
-  lldbg(" RXF1S: %08x FXF1A: %08x RXESC: %08x   TXBC: %08x\n",
-        getreg32(config->base + SAM_MCAN_RXF1S_OFFSET),
-        getreg32(config->base + SAM_MCAN_RXF1A_OFFSET),
-        getreg32(config->base + SAM_MCAN_RXESC_OFFSET),
-        getreg32(config->base + SAM_MCAN_TXBC_OFFSET));
-
-  lldbg(" TXFQS: %08x TXESC: %08x TXBRP: %08x  TXBAR: %08x\n",
-        getreg32(config->base + SAM_MCAN_TXFQS_OFFSET),
-        getreg32(config->base + SAM_MCAN_TXESC_OFFSET),
-        getreg32(config->base + SAM_MCAN_TXBRP_OFFSET),
-        getreg32(config->base + SAM_MCAN_TXBAR_OFFSET));
-
-  lldbg(" TXBCR: %08x TXBTO: %08x TXBCF: %08x TXBTIE: %08x\n",
-        getreg32(config->base + SAM_MCAN_TXBCR_OFFSET),
-        getreg32(config->base + SAM_MCAN_TXBTO_OFFSET),
-        getreg32(config->base + SAM_MCAN_TXBCF_OFFSET),
-        getreg32(config->base + SAM_MCAN_TXBTIE_OFFSET));
-
-  lldbg("TXBCIE: %08x TXEFC: %08x TXEFS: %08x  TXEFA: %08x\n",
-        getreg32(config->base + SAM_MCAN_TXBCIE_OFFSET),
-        getreg32(config->base + SAM_MCAN_TXEFC_OFFSET),
-        getreg32(config->base + SAM_MCAN_TXEFS_OFFSET),
-        getreg32(config->base + SAM_MCAN_TXEFA_OFFSET));
+  caninfo("MCAN%d Registers: %s\n", config->port, msg);
+  caninfo("   Base: %08x\n", config->base);
+
+  caninfo("   CUST: %08x  FBTP: %08x TEST: %08x    RWD: %08x\n",
+          getreg32(config->base + SAM_MCAN_CUST_OFFSET),
+          getreg32(config->base + SAM_MCAN_FBTP_OFFSET),
+          getreg32(config->base + SAM_MCAN_TEST_OFFSET),
+          getreg32(config->base + SAM_MCAN_RWD_OFFSET));
+
+  caninfo("  CCCR: %08x   BTP: %08x  TSCC: %08x   TSCV: %08x\n",
+          getreg32(config->base + SAM_MCAN_CCCR_OFFSET),
+          getreg32(config->base + SAM_MCAN_BTP_OFFSET),
+          getreg32(config->base + SAM_MCAN_TSCC_OFFSET),
+          getreg32(config->base + SAM_MCAN_TSCV_OFFSET));
+
+  caninfo("  TOCC: %08x  TOCV: %08x   ECR: %08x    PSR: %08x\n",
+          getreg32(config->base + SAM_MCAN_TOCC_OFFSET),
+          getreg32(config->base + SAM_MCAN_TOCV_OFFSET),
+          getreg32(config->base + SAM_MCAN_ECR_OFFSET),
+          getreg32(config->base + SAM_MCAN_PSR_OFFSET));
+
+  caninfo("    IR: %08x    IE: %08x   ILS: %08x    ILE: %08x\n",
+          getreg32(config->base + SAM_MCAN_IR_OFFSET),
+          getreg32(config->base + SAM_MCAN_IE_OFFSET),
+          getreg32(config->base + SAM_MCAN_ILS_OFFSET),
+          getreg32(config->base + SAM_MCAN_ILE_OFFSET));
+
+  caninfo("   GFC: %08x SIDFC: %08x XIDFC: %08x  XIDAM: %08x\n",
+          getreg32(config->base + SAM_MCAN_GFC_OFFSET),
+          getreg32(config->base + SAM_MCAN_SIDFC_OFFSET),
+          getreg32(config->base + SAM_MCAN_XIDFC_OFFSET),
+          getreg32(config->base + SAM_MCAN_XIDAM_OFFSET));
+
+  caninfo("  HPMS: %08x NDAT1: %08x NDAT2: %08x  RXF0C: %08x\n",
+          getreg32(config->base + SAM_MCAN_HPMS_OFFSET),
+          getreg32(config->base + SAM_MCAN_NDAT1_OFFSET),
+          getreg32(config->base + SAM_MCAN_NDAT2_OFFSET),
+          getreg32(config->base + SAM_MCAN_RXF0C_OFFSET));
+
+  caninfo(" RXF0S: %08x FXF0A: %08x  RXBC: %08x  RXF1C: %08x\n",
+          getreg32(config->base + SAM_MCAN_RXF0S_OFFSET),
+          getreg32(config->base + SAM_MCAN_RXF0A_OFFSET),
+          getreg32(config->base + SAM_MCAN_RXBC_OFFSET),
+          getreg32(config->base + SAM_MCAN_RXF1C_OFFSET));
+
+  caninfo(" RXF1S: %08x FXF1A: %08x RXESC: %08x   TXBC: %08x\n",
+          getreg32(config->base + SAM_MCAN_RXF1S_OFFSET),
+          getreg32(config->base + SAM_MCAN_RXF1A_OFFSET),
+          getreg32(config->base + SAM_MCAN_RXESC_OFFSET),
+          getreg32(config->base + SAM_MCAN_TXBC_OFFSET));
+
+  caninfo(" TXFQS: %08x TXESC: %08x TXBRP: %08x  TXBAR: %08x\n",
+          getreg32(config->base + SAM_MCAN_TXFQS_OFFSET),
+          getreg32(config->base + SAM_MCAN_TXESC_OFFSET),
+          getreg32(config->base + SAM_MCAN_TXBRP_OFFSET),
+          getreg32(config->base + SAM_MCAN_TXBAR_OFFSET));
+
+  caninfo(" TXBCR: %08x TXBTO: %08x TXBCF: %08x TXBTIE: %08x\n",
+          getreg32(config->base + SAM_MCAN_TXBCR_OFFSET),
+          getreg32(config->base + SAM_MCAN_TXBTO_OFFSET),
+          getreg32(config->base + SAM_MCAN_TXBCF_OFFSET),
+          getreg32(config->base + SAM_MCAN_TXBTIE_OFFSET));
+
+  caninfo("TXBCIE: %08x TXEFC: %08x TXEFS: %08x  TXEFA: %08x\n",
+          getreg32(config->base + SAM_MCAN_TXBCIE_OFFSET),
+          getreg32(config->base + SAM_MCAN_TXEFC_OFFSET),
+          getreg32(config->base + SAM_MCAN_TXEFS_OFFSET),
+          getreg32(config->base + SAM_MCAN_TXEFA_OFFSET));
 }
 #endif
 
@@ -1502,7 +1480,7 @@ static void mcan_buffer_reserve(FAR struct sam_mcan_s *priv)
 
           if (sval > 0)
             {
-              candbg("ERROR: TX FIFOQ full but txfsem is %d\n", sval);
+              canerr("ERROR: TX FIFOQ full but txfsem is %d\n", sval);
               sem_reset(&priv->txfsem, 0);
             }
         }
@@ -1520,7 +1498,7 @@ static void mcan_buffer_reserve(FAR struct sam_mcan_s *priv)
 
       else if (sval <= 0)
         {
-          candbg("ERROR: TX FIFOQ not full but txfsem is %d\n", sval);
+          canerr("ERROR: TX FIFOQ not full but txfsem is %d\n", sval);
 
           /* Less than zero means that another thread is waiting */
 
@@ -1551,7 +1529,7 @@ static void mcan_buffer_reserve(FAR struct sam_mcan_s *priv)
 
       if (tffl > priv->config->ntxfifoq)
         {
-          candbg("ERROR: TX FIFO reports %d but max is %d\n",
+          canerr("ERROR: TX FIFO reports %d but max is %d\n",
                  tffl, priv->config->ntxfifoq);
           tffl = priv->config->ntxfifoq;
         }
@@ -1564,7 +1542,7 @@ static void mcan_buffer_reserve(FAR struct sam_mcan_s *priv)
 
       if (sval != tffl)
         {
-          candbg("ERROR: TX FIFO reports %d but txfsem is %d\n", tffl, sval);
+          canerr("ERROR: TX FIFO reports %d but txfsem is %d\n", tffl, sval);
 
           /* Reset the semaphore count to the Tx FIFO free level. */
 
@@ -1620,7 +1598,7 @@ static void mcan_buffer_release(FAR struct sam_mcan_s *priv)
     }
   else
     {
-      candbg("ERROR: txfsem would increment beyond %d\n",
+      canerr("ERROR: txfsem would increment beyond %d\n",
               priv->config->ntxfifoq);
     }
 }
@@ -1847,6 +1825,22 @@ static int mcan_add_extfilter(FAR struct sam_mcan_s *priv,
 
           if (priv->nextalloc == 1)
             {
+              /* Enable the Initialization state */
+
+              regval  = mcan_getreg(priv, SAM_MCAN_CCCR_OFFSET);
+              regval |= MCAN_CCCR_INIT;
+              mcan_putreg(priv, SAM_MCAN_CCCR_OFFSET, regval);
+
+              /* Wait for initialization mode to take effect */
+
+              while ((mcan_getreg(priv, SAM_MCAN_CCCR_OFFSET) & MCAN_CCCR_INIT) == 0);
+
+              /* Enable writing to configuration registers */
+
+              regval  = mcan_getreg(priv, SAM_MCAN_CCCR_OFFSET);
+              regval |= (MCAN_CCCR_INIT | MCAN_CCCR_CCE);
+              mcan_putreg(priv, SAM_MCAN_CCCR_OFFSET, regval);
+
              /* Update the Global Filter Configuration so that received
               * messages are rejected if they do not match the acceptance
               * filter.
@@ -1858,6 +1852,12 @@ static int mcan_add_extfilter(FAR struct sam_mcan_s *priv,
               regval &= ~MCAN_GFC_ANFE_MASK;
               regval |= MCAN_GFC_ANFE_REJECTED;
               mcan_putreg(priv, SAM_MCAN_GFC_OFFSET, regval);
+
+              /* Disable writing to configuration registers */
+
+              regval  = mcan_getreg(priv, SAM_MCAN_CCCR_OFFSET);
+              regval &= ~(MCAN_CCCR_INIT | MCAN_CCCR_CCE);
+              mcan_putreg(priv, SAM_MCAN_CCCR_OFFSET, regval);
             }
 
           mcan_dev_unlock(priv);
@@ -1898,16 +1898,35 @@ static int mcan_del_extfilter(FAR struct sam_mcan_s *priv, int ndx)
 
   DEBUGASSERT(priv != NULL && priv->config != NULL);
   config = priv->config;
-  DEBUGASSERT(ndx < config->nextfilters);
+
+  /* Check user Parameters */
+
+  DEBUGASSERT(ndx >= 0 || ndx < config->nextfilters);
+
+  if (ndx < 0 || ndx >= config->nextfilters)
+    {
+      return -EINVAL;
+    }
 
   /* Get exclusive excess to the MCAN hardware */
 
   mcan_dev_lock(priv);
 
-  /* Release the filter */
-
   word = ndx >> 5;
   bit  = ndx & 0x1f;
+
+  /* Check if this filter is really assigned */
+
+  if ((priv->extfilters[word] & (1 << bit)) == 0)
+    {
+      /* No, error out */
+
+      mcan_dev_unlock(priv);
+      return -ENOENT;
+    }
+
+  /* Release the filter */
+
   priv->extfilters[word] &= ~(1 << bit);
 
   DEBUGASSERT(priv->nextalloc > 0);
@@ -1917,6 +1936,22 @@ static int mcan_del_extfilter(FAR struct sam_mcan_s *priv, int ndx)
 
   if (priv->nextalloc == 0)
     {
+      /* Enable the Initialization state */
+
+      regval  = mcan_getreg(priv, SAM_MCAN_CCCR_OFFSET);
+      regval |= MCAN_CCCR_INIT;
+      mcan_putreg(priv, SAM_MCAN_CCCR_OFFSET, regval);
+
+      /* Wait for initialization mode to take effect */
+
+      while ((mcan_getreg(priv, SAM_MCAN_CCCR_OFFSET) & MCAN_CCCR_INIT) == 0);
+
+      /* Enable writing to configuration registers */
+
+      regval  = mcan_getreg(priv, SAM_MCAN_CCCR_OFFSET);
+      regval |= (MCAN_CCCR_INIT | MCAN_CCCR_CCE);
+      mcan_putreg(priv, SAM_MCAN_CCCR_OFFSET, regval);
+
       /* If there are no extended filters, then modify Global Filter
        * Configuration so that all rejected messages are places in RX
        * FIFO0.
@@ -1928,6 +1963,12 @@ static int mcan_del_extfilter(FAR struct sam_mcan_s *priv, int ndx)
       regval &= ~MCAN_GFC_ANFE_MASK;
       regval |= MCAN_GFC_ANFE_RX_FIFO0;
       mcan_putreg(priv, SAM_MCAN_GFC_OFFSET, regval);
+
+      /* Disable writing to configuration registers */
+
+      regval  = mcan_getreg(priv, SAM_MCAN_CCCR_OFFSET);
+      regval &= ~(MCAN_CCCR_INIT | MCAN_CCCR_CCE);
+      mcan_putreg(priv, SAM_MCAN_CCCR_OFFSET, regval);
     }
 
   /* Deactivate the filter last so that no messages are lost. */
@@ -2035,6 +2076,22 @@ static int mcan_add_stdfilter(FAR struct sam_mcan_s *priv,
 
           if (priv->nstdalloc == 1)
             {
+              /* Enable the Initialization state */
+
+              regval  = mcan_getreg(priv, SAM_MCAN_CCCR_OFFSET);
+              regval |= MCAN_CCCR_INIT;
+              mcan_putreg(priv, SAM_MCAN_CCCR_OFFSET, regval);
+
+              /* Wait for initialization mode to take effect */
+
+              while ((mcan_getreg(priv, SAM_MCAN_CCCR_OFFSET) & MCAN_CCCR_INIT) == 0);
+
+              /* Enable writing to configuration registers */
+
+              regval  = mcan_getreg(priv, SAM_MCAN_CCCR_OFFSET);
+              regval |= (MCAN_CCCR_INIT | MCAN_CCCR_CCE);
+              mcan_putreg(priv, SAM_MCAN_CCCR_OFFSET, regval);
+
              /* Update the Global Filter Configuration so that received
               * messages are rejected if they do not match the acceptance
               * filter.
@@ -2046,6 +2103,12 @@ static int mcan_add_stdfilter(FAR struct sam_mcan_s *priv,
               regval &= ~MCAN_GFC_ANFS_MASK;
               regval |= MCAN_GFC_ANFS_REJECTED;
               mcan_putreg(priv, SAM_MCAN_GFC_OFFSET, regval);
+
+              /* Disable writing to configuration registers */
+
+              regval  = mcan_getreg(priv, SAM_MCAN_CCCR_OFFSET);
+              regval &= ~(MCAN_CCCR_INIT | MCAN_CCCR_CCE);
+              mcan_putreg(priv, SAM_MCAN_CCCR_OFFSET, regval);
             }
 
           mcan_dev_unlock(priv);
@@ -2084,16 +2147,35 @@ static int mcan_del_stdfilter(FAR struct sam_mcan_s *priv, int ndx)
 
   DEBUGASSERT(priv != NULL && priv->config != NULL);
   config = priv->config;
-  DEBUGASSERT(ndx < config->nstdfilters);
+
+  /* Check Userspace Parameters */
+
+  DEBUGASSERT(ndx >= 0 || ndx < config->nstdfilters);
+
+  if (ndx < 0 || ndx >= config->nstdfilters)
+    {
+      return -EINVAL;
+    }
 
   /* Get exclusive excess to the MCAN hardware */
 
   mcan_dev_lock(priv);
 
-  /* Release the filter */
-
   word = ndx >> 5;
   bit  = ndx & 0x1f;
+
+  /* Check if this filter is really assigned */
+
+  if ((priv->stdfilters[word] & (1 << bit)) == 0)
+    {
+      /* No, error out */
+
+      mcan_dev_unlock(priv);
+      return -ENOENT;
+    }
+
+  /* Release the filter */
+
   priv->stdfilters[word] &= ~(1 << bit);
 
   DEBUGASSERT(priv->nstdalloc > 0);
@@ -2103,6 +2185,22 @@ static int mcan_del_stdfilter(FAR struct sam_mcan_s *priv, int ndx)
 
   if (priv->nstdalloc == 0)
     {
+      /* Enable the Initialization state */
+
+      regval  = mcan_getreg(priv, SAM_MCAN_CCCR_OFFSET);
+      regval |= MCAN_CCCR_INIT;
+      mcan_putreg(priv, SAM_MCAN_CCCR_OFFSET, regval);
+
+      /* Wait for initialization mode to take effect */
+
+      while ((mcan_getreg(priv, SAM_MCAN_CCCR_OFFSET) & MCAN_CCCR_INIT) == 0);
+
+      /* Enable writing to configuration registers */
+
+      regval  = mcan_getreg(priv, SAM_MCAN_CCCR_OFFSET);
+      regval |= (MCAN_CCCR_INIT | MCAN_CCCR_CCE);
+      mcan_putreg(priv, SAM_MCAN_CCCR_OFFSET, regval);
+
       /* If there are no standard filters, then modify Global Filter
        * Configuration so that all rejected messages are places in RX
        * FIFO0.
@@ -2114,6 +2212,12 @@ static int mcan_del_stdfilter(FAR struct sam_mcan_s *priv, int ndx)
       regval &= ~MCAN_GFC_ANFS_MASK;
       regval |= MCAN_GFC_ANFS_RX_FIFO0;
       mcan_putreg(priv, SAM_MCAN_GFC_OFFSET, regval);
+
+      /* Disable writing to configuration registers */
+
+      regval  = mcan_getreg(priv, SAM_MCAN_CCCR_OFFSET);
+      regval &= ~(MCAN_CCCR_INIT | MCAN_CCCR_CCE);
+      mcan_putreg(priv, SAM_MCAN_CCCR_OFFSET, regval);
     }
 
   /* Deactivate the filter last so that no messages are lost. */
@@ -2151,7 +2255,7 @@ static void mcan_reset(FAR struct can_dev_s *dev)
   config = priv->config;
   DEBUGASSERT(config);
 
-  canllvdbg("MCAN%d\n", config->port);
+  caninfo("MCAN%d\n", config->port);
   UNUSED(config);
 
   /* Get exclusive access to the MCAN peripheral */
@@ -2208,7 +2312,7 @@ static int mcan_setup(FAR struct can_dev_s *dev)
   config = priv->config;
   DEBUGASSERT(config);
 
-  canllvdbg("MCAN%d pid: %d\n", config->port, config->pid);
+  caninfo("MCAN%d pid: %d\n", config->port, config->pid);
 
   /* Get exclusive access to the MCAN peripheral */
 
@@ -2219,7 +2323,7 @@ static int mcan_setup(FAR struct can_dev_s *dev)
   ret = mcan_hw_initialize(priv);
   if (ret < 0)
     {
-      canlldbg("MCAN%d H/W initialization failed: %d\n", config->port, ret);
+      canerr("ERROR: MCAN%d H/W initialization failed: %d\n", config->port, ret);
       return ret;
     }
 
@@ -2227,18 +2331,18 @@ static int mcan_setup(FAR struct can_dev_s *dev)
 
   /* Attach the MCAN interrupt handlers */
 
-  ret = irq_attach(config->irq0, config->handler);
+  ret = irq_attach(config->irq0, mcan_interrupt, dev);
   if (ret < 0)
     {
-      canlldbg("Failed to attach MCAN%d line 0 IRQ (%d)",
+      canerr("ERROR: Failed to attach MCAN%d line 0 IRQ (%d)",
       config->port, config->irq0);
       return ret;
     }
 
-  ret = irq_attach(config->irq1, config->handler);
+  ret = irq_attach(config->irq1, mcan_interrupt, dev);
   if (ret < 0)
     {
-      canlldbg("Failed to attach MCAN%d line 1 IRQ (%d)",
+      canerr("ERROR: Failed to attach MCAN%d line 1 IRQ (%d)",
       config->port, config->irq1);
       return ret;
     }
@@ -2285,7 +2389,7 @@ static void mcan_shutdown(FAR struct can_dev_s *dev)
   config = priv->config;
   DEBUGASSERT(config);
 
-  canllvdbg("MCAN%d\n", config->port);
+  caninfo("MCAN%d\n", config->port);
 
   /* Get exclusive access to the MCAN peripheral */
 
@@ -2334,7 +2438,7 @@ static void mcan_rxint(FAR struct can_dev_s *dev, bool enable)
 
   DEBUGASSERT(priv && priv->config);
 
-  canllvdbg("MCAN%d enable: %d\n", priv->config->port, enable);
+  caninfo("MCAN%d enable: %d\n", priv->config->port, enable);
 
   /* Enable/disable the receive interrupts */
 
@@ -2376,7 +2480,7 @@ static void mcan_txint(FAR struct can_dev_s *dev, bool enable)
 
   DEBUGASSERT(priv && priv->config);
 
-  canllvdbg("MCAN%d enable: %d\n", priv->config->port, enable);
+  caninfo("MCAN%d enable: %d\n", priv->config->port, enable);
 
   /* Enable/disable the receive interrupts */
 
@@ -2415,7 +2519,7 @@ static int mcan_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg)
   FAR struct sam_mcan_s *priv;
   int ret = -ENOTTY;
 
-  canvdbg("cmd=%04x arg=%lu\n", cmd, arg);
+  caninfo("cmd=%04x arg=%lu\n", cmd, arg);
 
   DEBUGASSERT(dev && dev->cd_priv);
   priv = dev->cd_priv;
@@ -2612,12 +2716,10 @@ static int mcan_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg)
       /* Unsupported/unrecognized command */
 
       default:
-        candbg("ERROR: Unrecognized command: %04x\n", cmd);
+        canerr("ERROR: Unrecognized command: %04x\n", cmd);
         break;
     }
 
-  /* No CAN ioctls are supported */
-
   return ret;
 }
 
@@ -2683,9 +2785,9 @@ static int mcan_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
   DEBUGASSERT(priv && priv->config);
   config = priv->config;
 
-  canllvdbg("MCAN%d\n", config->port);
-  canllvdbg("MCAN%d ID: %d DLC: %d\n",
-            config->port, msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc);
+  caninfo("MCAN%d\n", config->port);
+  caninfo("MCAN%d ID: %d DLC: %d\n",
+          config->port, msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc);
 
   /* That that FIFO elements were configured.
    *
@@ -2756,7 +2858,7 @@ static int mcan_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
     }
 
   txbuffer[0] = regval;
-  canregdbg("T0: %08x\n", regval);
+  reginfo("T0: %08x\n", regval);
 
   /* Format word T1:
    *   Data Length Code (DLC)            - Value from message structure
@@ -2765,7 +2867,7 @@ static int mcan_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
    */
 
   txbuffer[1] = BUFFER_R1_DLC(msg->cm_hdr.ch_dlc);
-  canregdbg("T1: %08x\n", txbuffer[1]);
+  reginfo("T1: %08x\n", txbuffer[1]);
 
   /* Followed by the amount of data corresponding to the DLC (T2..) */
 
@@ -2829,7 +2931,7 @@ static bool mcan_txready(FAR struct can_dev_s *dev)
   FAR struct sam_mcan_s *priv = dev->cd_priv;
   uint32_t regval;
   bool notfull;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   int sval;
 #endif
 
@@ -2846,7 +2948,7 @@ static bool mcan_txready(FAR struct can_dev_s *dev)
   regval  = mcan_getreg(priv, SAM_MCAN_TXFQS_OFFSET);
   notfull = ((regval & MCAN_TXFQS_TFQF) == 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   /* As a sanity check, the txfsem should also track the number of elements
    * the TX FIFO/queue.  Make sure that they are consistent.
    */
@@ -2905,6 +3007,7 @@ static bool mcan_txempty(FAR struct can_dev_s *dev)
   regval = mcan_getreg(priv, SAM_MCAN_TXFQS_OFFSET);
   if (((regval & MCAN_TXFQS_TFQF) != 0))
     {
+      mcan_dev_unlock(priv);
       return false;
     }
 
@@ -3154,7 +3257,7 @@ static void mcan_error(FAR struct can_dev_s *dev, uint32_t status,
       ret = can_receive(dev, &hdr, data);
       if (ret < 0)
         {
-          canlldbg("ERROR: can_receive failed: %d\n", ret);
+          canerr("ERROR: can_receive failed: %d\n", ret);
         }
     }
 }
@@ -3193,7 +3296,7 @@ static void mcan_receive(FAR struct can_dev_s *dev, FAR uint32_t *rxbuffer,
   /* Work R0 contains the CAN ID */
 
   regval = *rxbuffer++;
-  canregdbg("R0: %08x\n", regval);
+  reginfo("R0: %08x\n", regval);
 
 #ifdef CONFIG_CAN_ERRORS
   hdr.ch_error  = 0;
@@ -3239,7 +3342,7 @@ static void mcan_receive(FAR struct can_dev_s *dev, FAR uint32_t *rxbuffer,
   /* Word R1 contains the DLC and timestamp */
 
   regval = *rxbuffer++;
-  canregdbg("R1: %08x\n", regval);
+  reginfo("R1: %08x\n", regval);
 
   hdr.ch_dlc = (regval & BUFFER_R1_DLC_MASK) >> BUFFER_R1_DLC_SHIFT;
 
@@ -3248,7 +3351,7 @@ static void mcan_receive(FAR struct can_dev_s *dev, FAR uint32_t *rxbuffer,
   ret = can_receive(dev, &hdr, (FAR uint8_t *)rxbuffer);
   if (ret < 0)
     {
-      canlldbg("ERROR: can_receive failed: %d\n", ret);
+      canerr("ERROR: can_receive failed: %d\n", ret);
     }
 }
 
@@ -3266,9 +3369,10 @@ static void mcan_receive(FAR struct can_dev_s *dev, FAR uint32_t *rxbuffer,
  *
  ****************************************************************************/
 
-static void mcan_interrupt(FAR struct can_dev_s *dev)
+static int mcan_interrupt(int irq, void *context, FAR void *arg)
 {
-  FAR struct sam_mcan_s *priv = dev->cd_priv;
+  FAR struct can_dev_s *dev = (FAR struct can_dev_s *)arg;
+  FAR struct sam_mcan_s *priv;
   FAR const struct sam_config_s *config;
   uint32_t ir;
   uint32_t ie;
@@ -3278,6 +3382,8 @@ static void mcan_interrupt(FAR struct can_dev_s *dev)
   unsigned int ndx;
   bool handled;
 
+  DEBUGASSERT(dev != NULL);
+  priv = dev->cd_priv;
   DEBUGASSERT(priv && priv->config);
   config = priv->config;
 
@@ -3301,7 +3407,7 @@ static void mcan_interrupt(FAR struct can_dev_s *dev)
 
           if ((pending & MCAN_CMNERR_INTS) != 0)
             {
-              canlldbg("ERROR: Common %08x\n", pending & MCAN_CMNERR_INTS);
+              canerr("ERROR: Common %08x\n", pending & MCAN_CMNERR_INTS);
 
               /* Clear the error indications */
 
@@ -3312,7 +3418,20 @@ static void mcan_interrupt(FAR struct can_dev_s *dev)
 
           if ((pending & MCAN_TXERR_INTS) != 0)
             {
-              canlldbg("ERROR: TX %08x\n", pending & MCAN_TXERR_INTS);
+              canerr("ERROR: TX %08x\n", pending & MCAN_TXERR_INTS);
+
+              /* An Acknowledge-Error will occur if for example the device
+               * is not connected to the bus.
+               *
+               * The CAN-Standard states that the Chip has to retry the
+               * message forever, which will produce an ACKE every time.
+               * To prevent this Interrupt-Flooding and the high CPU-Load
+               * we disable the ACKE here as long we didn't transfer at
+               * least one message successfully (see MCAN_INT_TC below).
+               */
+
+              ie &= ~MCAN_INT_ACKE;
+              mcan_putreg(priv, SAM_MCAN_IE_OFFSET, ie);
 
               /* Clear the error indications */
 
@@ -3333,7 +3452,7 @@ static void mcan_interrupt(FAR struct can_dev_s *dev)
 
           if ((pending & MCAN_RXERR_INTS) != 0)
             {
-              canlldbg("ERROR: RX %08x\n", pending & MCAN_RXERR_INTS);
+              canerr("ERROR: RX %08x\n", pending & MCAN_RXERR_INTS);
 
               /* Clear the error indications */
 
@@ -3354,7 +3473,7 @@ static void mcan_interrupt(FAR struct can_dev_s *dev)
         {
           /* All (old) errors cleared  */
 
-          canlldbg("ERROR: CLEARED\n");
+          canerr("ERROR: CLEARED\n");
 
           mcan_error(dev, 0, priv->olderrors);
 
@@ -3367,6 +3486,17 @@ static void mcan_interrupt(FAR struct can_dev_s *dev)
 
       if ((pending & MCAN_INT_TC) != 0)
         {
+          /* Check if we have disabled the ACKE in the error-handling above
+           * (see MCAN_TXERR_INTS) to prevent Interrupt-Flooding and
+           * re-enable the error interrupt here again.
+           */
+
+          if ((ie & MCAN_INT_ACKE) == 0)
+            {
+                ie |= MCAN_INT_ACKE;
+                mcan_putreg(priv, SAM_MCAN_IE_OFFSET, ie);
+            }
+
           /* Clear the pending TX completion interrupt (and all
            * other TX-related interrupts)
            */
@@ -3479,7 +3609,7 @@ static void mcan_interrupt(FAR struct can_dev_s *dev)
 
           if ((regval & MCAN_RXF0S_RF0L) != 0)
             {
-              canlldbg("ERROR: Message lost: %08x\n", regval);
+              canerr("ERROR: Message lost: %08x\n", regval);
             }
           else
             {
@@ -3513,7 +3643,7 @@ static void mcan_interrupt(FAR struct can_dev_s *dev)
 
           if ((regval & MCAN_RXF0S_RF0L) != 0)
             {
-              canlldbg("ERROR: Message lost: %08x\n", regval);
+              canerr("ERROR: Message lost: %08x\n", regval);
             }
           else
             {
@@ -3539,52 +3669,6 @@ static void mcan_interrupt(FAR struct can_dev_s *dev)
   while (handled);
 }
 
-/****************************************************************************
- * Name: mcan0_interrupt
- *
- * Description:
- *   MCAN0 interrupt handler
- *
- * Input Parameters:
- *   irq     - The IRQ number of the interrupt.
- *   context - The register state save array at the time of the interrupt.
- *
- * Returned Value:
- *   Zero on success; a negated errno on failure
- *
- ****************************************************************************/
-
-#ifdef CONFIG_SAMV7_MCAN0
-static int mcan0_interrupt(int irq, void *context)
-{
-  mcan_interrupt(&g_mcan0dev);
-  return OK;
-}
-#endif
-
-/****************************************************************************
- * Name: mcan1_interrupt
- *
- * Description:
- *   MCAN1 interrupt handler
- *
- * Input Parameters:
- *   irq     - The IRQ number of the interrupt.
- *   context - The register state save array at the time of the interrupt.
- *
- * Returned Value:
- *   Zero on success; a negated errno on failure
- *
- ****************************************************************************/
-
-#ifdef CONFIG_SAMV7_MCAN1
-static int mcan1_interrupt(int irq, void *context)
-{
-  mcan_interrupt(&g_mcan1dev);
-  return OK;
-}
-#endif
-
 /****************************************************************************
  * Name: mcan_hw_initialize
  *
@@ -3607,7 +3691,7 @@ static int mcan_hw_initialize(struct sam_mcan_s *priv)
   uint32_t cntr;
   uint32_t cmr;
 
-  canllvdbg("MCAN%d\n", config->port);
+  caninfo("MCAN%d\n", config->port);
 
   /* Configure MCAN pins */
 
@@ -3882,7 +3966,7 @@ FAR struct can_dev_s *sam_mcan_initialize(int port)
   FAR const struct sam_config_s *config;
   uint32_t regval;
 
-  canvdbg("MCAN%d\n", port);
+  caninfo("MCAN%d\n", port);
 
   /* Select PCK5 clock source and pre-scaler value.  Both MCAN controllers
    * use PCK5 to derive bit rate.
@@ -3934,7 +4018,7 @@ FAR struct can_dev_s *sam_mcan_initialize(int port)
   else
 #endif
     {
-      candbg("ERROR: Unsupported port %d\n", port);
+      canerr("ERROR: Unsupported port %d\n", port);
       return NULL;
     }
 
diff --git a/arch/arm/src/samv7/sam_mcan.h b/arch/arm/src/samv7/sam_mcan.h
index 540800b37d360678914e46f162ac454d5e6ac7f5..07ecdd71ad37be48b9c1841aa8cbb394108edec2 100644
--- a/arch/arm/src/samv7/sam_mcan.h
+++ b/arch/arm/src/samv7/sam_mcan.h
@@ -45,7 +45,7 @@
 #include "chip.h"
 #include "chip/sam_mcan.h"
 
-#include 
+#include 
 
 #if defined(CONFIG_CAN) && (defined(CONFIG_SAMV7_MCAN0) || \
     defined(CONFIG_SAMV7_MCAN1))
diff --git a/arch/arm/src/samv7/sam_oneshot.c b/arch/arm/src/samv7/sam_oneshot.c
index 76c4ee1a41b418c310ba3df047ba2413c29f9b3a..9a20ec17a76a4594a84b312d1bcf8f79b4d577fc 100644
--- a/arch/arm/src/samv7/sam_oneshot.c
+++ b/arch/arm/src/samv7/sam_oneshot.c
@@ -64,22 +64,6 @@
 
 #ifdef CONFIG_SAMV7_ONESHOT
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -109,7 +93,7 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr)
   oneshot_handler_t oneshot_handler;
   void *oneshot_arg;
 
-  tcllvdbg("Expired...\n");
+  tmrinfo("Expired...\n");
   DEBUGASSERT(oneshot && oneshot->handler);
 
   /* The clock was stopped, but not disabled when the RC match occurred.
@@ -129,7 +113,9 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr)
   oneshot->handler     = NULL;
   oneshot_arg          = (void *)oneshot->arg;
   oneshot->arg         = NULL;
+#ifdef CONFIG_SAMV7_FREERUN
   oneshot->start_count = 0;
+#endif
 
   oneshot_handler(oneshot_arg);
 }
@@ -166,7 +152,7 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
   uint32_t cmr;
   int ret;
 
-  tcvdbg("chan=%d resolution=%d usec\n", chan, resolution);
+  tmrinfo("chan=%d resolution=%d usec\n", chan, resolution);
   DEBUGASSERT(oneshot && resolution > 0);
 
   /* Get the TC frequency the corresponds to the requested resolution */
@@ -178,13 +164,13 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
   ret = sam_tc_clockselect(frequency, &cmr, &actual);
   if (ret < 0)
     {
-      tcdbg("ERROR: sam_tc_clockselect failed: %d\n", ret);
+      tmrerr("ERROR: sam_tc_clockselect failed: %d\n", ret);
       return ret;
     }
 
-  tcvdbg("frequency=%lu, actual=%lu, cmr=%08lx\n",
-         (unsigned long)frequency, (unsigned long)actual,
-         (unsigned long)cmr);
+  tmrinfo("frequency=%lu, actual=%lu, cmr=%08lx\n",
+          (unsigned long)frequency, (unsigned long)actual,
+          (unsigned long)cmr);
 
   /* Allocate the timer/counter and select its mode of operation
    *
@@ -218,7 +204,7 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
   oneshot->tch = sam_tc_allocate(chan, cmr);
   if (!oneshot->tch)
     {
-      tcdbg("ERROR: Failed to allocate timer channel %d\n", chan);
+      tmrerr("ERROR: Failed to allocate timer channel %d\n", chan);
       return -EBUSY;
     }
 
@@ -230,7 +216,36 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
   oneshot->running     = false;
   oneshot->handler     = NULL;
   oneshot->arg         = NULL;
+#ifdef CONFIG_SAMV7_FREERUN
   oneshot->start_count = 0;
+#endif
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: sam_oneshot_max_delay
+ *
+ * Description:
+ *   Return the maximum delay supported by the one shot timer (in
+ *   microseconds).
+ *
+ * Input Parameters:
+ *   oneshot Caller allocated instance of the oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           sam_oneshot_initialize();
+ *   usec    The location in which to return the maximum delay.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec)
+{
+  DEBUGASSERT(oneshot != NULL && usec != NULL);
+  *usec = (0xffffull * USEC_PER_SEC) / (uint64_t)sam_tc_divfreq(oneshot->tch);
   return OK;
 }
 
@@ -254,15 +269,17 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
  *
  ****************************************************************************/
 
-int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
-                      oneshot_handler_t handler, void *arg, const struct timespec *ts)
+int sam_oneshot_start(struct sam_oneshot_s *oneshot,
+                      struct sam_freerun_s *freerun,
+                      oneshot_handler_t handler, void *arg,
+                      const struct timespec *ts)
 {
   uint64_t usec;
   uint64_t regval;
   irqstate_t flags;
 
-  tcvdbg("handler=%p arg=%p, ts=(%lu, %lu)\n",
-         handler, arg, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
+  tmrinfo("handler=%p arg=%p, ts=(%lu, %lu)\n",
+          handler, arg, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
   DEBUGASSERT(oneshot && handler && ts);
 
   /* Was the oneshot already running? */
@@ -272,7 +289,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
     {
       /* Yes.. then cancel it */
 
-      tcvdbg("Already running... cancelling\n");
+      tmrinfo("Already running... cancelling\n");
       (void)sam_oneshot_cancel(oneshot, freerun, NULL);
     }
 
@@ -285,7 +302,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
 
   usec = (uint64_t)ts->tv_sec * USEC_PER_SEC + (uint64_t)(ts->tv_nsec / NSEC_PER_USEC);
 
-  /* Get the timer counter frequency and determine the number of counts need to achieve the requested delay.
+  /* Get the timer counter frequency and determine the number of counts
+   * needed to achieve the requested delay.
    *
    *   frequency = ticks / second
    *   ticks     = seconds * frequency
@@ -294,7 +312,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
 
   regval = (usec * (uint64_t)sam_tc_divfreq(oneshot->tch)) / USEC_PER_SEC;
 
-  tcvdbg("usec=%llu regval=%08llx\n", usec, regval);
+  tmrinfo("usec=%llu regval=%08llx\n", usec, regval);
   DEBUGASSERT(regval <= UINT16_MAX);
 
   /* Set up to receive the callback when the interrupt occurs */
@@ -312,6 +330,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
 
   sam_tc_start(oneshot->tch);
 
+#ifdef CONFIG_SAMV7_FREERUN
   /* The function sam_tc_start() starts the timer/counter by setting the
    * bits TC_CCR_CLKEN and TC_CCR_SWTRG in the channel control register.
    * The first one enables the timer/counter the latter performs an
@@ -325,12 +344,16 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
    * the counter value of the freerun timer/counter is stored at each start
    * of the oneshot timer/counter.
    *
-   * The function up_timer_gettime() could also be used for this but it takes
-   * too long. If up_timer_gettime() is called within this function the problem
-   * vanishes at least if compiled with no optimisation.
+   * The function up_timer_gettime() could also be used for this but it
+   * takes too long. If up_timer_gettime() is called within this function
+   * the problem vanishes at least if compiled with no optimisation.
    */
 
-  oneshot->start_count = sam_tc_getcounter(freerun->tch);
+  if (freerun != NULL)
+    {
+      oneshot->start_count = sam_tc_getcounter(freerun->tch);
+    }
+#endif
 
   /* Enable interrupts.  We should get the callback when the interrupt
    * occurs.
@@ -347,8 +370,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
  * Description:
  *   Cancel the oneshot timer and return the time remaining on the timer.
  *
- *   NOTE: This function may execute at a high rate with no timer running (as
- *   when pre-emption is enabled and disabled).
+ *   NOTE: This function may execute at a high rate with no timer running
+ *   (as when pre-emption is enabled and disabled).
  *
  * Input Parameters:
  *   oneshot Caller allocated instance of the oneshot state structure.  This
@@ -366,8 +389,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
  *
  ****************************************************************************/
 
-int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
-                       struct timespec *ts)
+int sam_oneshot_cancel(struct sam_oneshot_s *oneshot,
+                       struct sam_freerun_s *freerun, struct timespec *ts)
 {
   irqstate_t flags;
   uint64_t usec;
@@ -403,21 +426,24 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
    * REVISIT:  This does not appear to be the case.
    */
 
-  tcvdbg("Cancelling...\n");
+  tmrinfo("Cancelling...\n");
 
   count = sam_tc_getcounter(oneshot->tch);
   rc    = sam_tc_getregister(oneshot->tch, TC_REGC);
 
+#ifdef CONFIG_SAMV7_FREERUN
   /* In the case the timer/counter was canceled very short after its start,
    * the counter register can hold the wrong value (the value of the last
    * run). To prevent this the counter value is set to zero if not at
    * least on tick passed since the start of the timer/counter.
    */
 
-  if (count > 0 && sam_tc_getcounter(freerun->tch) == oneshot->start_count)
+  if (count > 0 && freerun != NULL &&
+      sam_tc_getcounter(freerun->tch) == oneshot->start_count)
     {
       count = 0;
     }
+#endif
 
   /* Now we can disable the interrupt and stop the timer. */
 
@@ -439,8 +465,8 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
        * oneshot timer.
        */
 
-      tcvdbg("rc=%lu count=%lu usec=%lu\n",
-             (unsigned long)rc, (unsigned long)count, (unsigned long)usec);
+      tmrinfo("rc=%lu count=%lu usec=%lu\n",
+              (unsigned long)rc, (unsigned long)count, (unsigned long)usec);
 
       /* REVISIT: I am not certain why the timer counter value sometimes
        * exceeds RC.  Might be a bug, or perhaps the counter does not stop
@@ -484,39 +510,11 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
           ts->tv_nsec = (unsigned long)nsec;
         }
 
-      tcvdbg("remaining (%lu, %lu)\n",
-             (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
+      tmrinfo("remaining (%lu, %lu)\n",
+              (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
     }
 
   return OK;
 }
 
-/****************************************************************************
- * Name: sam_oneshot_max_delay
- *
- * Description:
- *   Return the maximum delay supported by the one shot timer (in
- *   microseconds).
- *
- * Input Parameters:
- *   oneshot Caller allocated instance of the oneshot state structure.  This
- *           structure must have been previously initialized via a call to
- *           sam_oneshot_initialize();
- *   usec    The location in which to return the maximum delay.
- *
- * Returned Value:
- *   Zero (OK) is returned on success; a negated errno value is returned
- *   on failure.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP
-int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec)
-{
-  DEBUGASSERT(oneshot && usec);
-  *usec = (0xffffull * USEC_PER_SEC) / (uint64_t)sam_tc_divfreq(oneshot->tch);
-  return OK;
-}
-#endif
-
 #endif /* CONFIG_SAMV7_ONESHOT */
diff --git a/arch/arm/src/samv7/sam_oneshot.h b/arch/arm/src/samv7/sam_oneshot.h
index 6c4e42337f156b730750ffb0f83a90bbf3717abe..276698c7dda9dea0d4dc02d6058b91adc35fbef6 100644
--- a/arch/arm/src/samv7/sam_oneshot.h
+++ b/arch/arm/src/samv7/sam_oneshot.h
@@ -46,7 +46,6 @@
 #include 
 
 #include "sam_tc.h"
-#include "sam_freerun.h"
 
 #ifdef CONFIG_SAMV7_ONESHOT
 
@@ -83,11 +82,13 @@ struct sam_oneshot_s
   volatile oneshot_handler_t handler; /* Oneshot expiration callback */
   volatile void *arg;                 /* The argument that will accompany
                                        * the callback */
+#ifdef CONFIG_SAMV7_FREERUN
   volatile uint32_t start_count;      /* Stores the value of the freerun counter,
                                        * at each start of the onshot timer. Is neccesary
                                        * to find out if the onshot counter was updated
                                        * correctly at the time of the call to
                                        * sam_oneshot_cancel or not. */
+#endif
 };
 
 /****************************************************************************
@@ -149,9 +150,7 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
  *
  ****************************************************************************/
 
-#ifdef CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP
 int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec);
-#endif
 
 /****************************************************************************
  * Name: sam_oneshot_start
@@ -165,7 +164,8 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec);
  *           sam_oneshot_initialize();
  *   freerun Caller allocated instance of the freerun state structure. This
  *           structure must have been previously initialized via a call to
- *           sam_freerun_initialize();
+ *           sam_freerun_initialize().  May be NULL if there is no matching
+ *           free-running timer.
  *   handler The function to call when when the oneshot timer expires.
  *   arg     An opaque argument that will accompany the callback.
  *   ts      Provides the duration of the one shot timer.
@@ -176,8 +176,11 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec);
  *
  ****************************************************************************/
 
-int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
-                      oneshot_handler_t handler, void *arg, const struct timespec *ts);
+struct sam_freerun_s;
+int sam_oneshot_start(struct sam_oneshot_s *oneshot,
+                      struct sam_freerun_s *freerun,
+                      oneshot_handler_t handler, void *arg,
+                      const struct timespec *ts);
 
 /****************************************************************************
  * Name: sam_oneshot_cancel
@@ -194,7 +197,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
  *           sam_oneshot_initialize();
  *   freerun Caller allocated instance of the freerun state structure. This
  *           structure must have been previously initialized via a call to
- *           sam_freerun_initialize();
+ *           sam_freerun_initialize().  May be NULL if there is no matching
+ *           free-running timer.
  *   ts      The location in which to return the time remaining on the
  *           oneshot timer.  A time of zero is returned if the timer is
  *           not running.
@@ -206,8 +210,9 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
  *
  ****************************************************************************/
 
-int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
-                       struct timespec *ts);
+struct sam_freerun_s;
+int sam_oneshot_cancel(struct sam_oneshot_s *oneshot,
+                       struct sam_freerun_s *freerun, struct timespec *ts);
 
 #undef EXTERN
 #ifdef __cplusplus
diff --git a/arch/arm/src/samv7/sam_oneshot_lowerhalf.c b/arch/arm/src/samv7/sam_oneshot_lowerhalf.c
new file mode 100644
index 0000000000000000000000000000000000000000..e6154850eb3ff0ff514881b956fee21ebbdefb8c
--- /dev/null
+++ b/arch/arm/src/samv7/sam_oneshot_lowerhalf.c
@@ -0,0 +1,345 @@
+/****************************************************************************
+ *  arch/arm/src/sam/sam_oneshot_lowerhalf.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "sam_oneshot.h"
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* This structure describes the state of the oneshot timer lower-half driver */
+
+struct sam_oneshot_lowerhalf_s
+{
+  /* This is the part of the lower half driver that is visible to the upper-
+   * half client of the driver.  This must be the first thing in this
+   * structure so that pointers to struct oneshot_lowerhalf_s are cast
+   * compatible to struct sam_oneshot_lowerhalf_s and vice versa.
+   */
+
+  struct oneshot_lowerhalf_s lh;  /* Common lower-half driver fields */
+
+  /* Private lower half data follows */
+
+  struct sam_oneshot_s oneshot;   /* SAMV7-specific oneshot state */
+  oneshot_callback_t callback;    /* internal handler that receives callback */
+  FAR void *arg;                  /* Argument that is passed to the handler */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static void sam_oneshot_handler(void *arg);
+
+static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower,
+                         FAR struct timespec *ts);
+static int sam_start(FAR struct oneshot_lowerhalf_s *lower,
+                     oneshot_callback_t callback, FAR void *arg,
+                     FAR const struct timespec *ts);
+static int sam_cancel(FAR struct oneshot_lowerhalf_s *lower,
+                      FAR struct timespec *ts);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Lower half operations */
+
+static const struct oneshot_operations_s g_oneshot_ops =
+{
+  .max_delay = sam_max_delay,
+  .start     = sam_start,
+  .cancel    = sam_cancel,
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sam_oneshot_handler
+ *
+ * Description:
+ *   Timer expiration handler
+ *
+ * Input Parameters:
+ *   arg - Should be the same argument provided when sam_oneshot_start()
+ *         was called.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void sam_oneshot_handler(void *arg)
+{
+  FAR struct sam_oneshot_lowerhalf_s *priv =
+    (FAR struct sam_oneshot_lowerhalf_s *)arg;
+  oneshot_callback_t callback;
+  FAR void *cbarg;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Perhaps the callback was nullified in a race condition with
+   * sam_cancel?
+   */
+
+  if (priv->callback)
+    {
+      /* Sample and nullify BEFORE executing callback (in case the callback
+       * restarts the oneshot).
+       */
+
+      callback       = priv->callback;
+      cbarg          = priv->arg;
+      priv->callback = NULL;
+      priv->arg      = NULL;
+
+      /* Then perform the callback */
+
+      callback(&priv->lh, cbarg);
+    }
+}
+
+/****************************************************************************
+ * Name: sam_max_delay
+ *
+ * Description:
+ *   Determine the maximum delay of the one-shot timer (in microseconds)
+ *
+ * Input Parameters:
+ *   lower   An instance of the lower-half oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           oneshot_initialize();
+ *   ts      The location in which to return the maxumum delay.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower,
+                         FAR struct timespec *ts)
+{
+  FAR struct sam_oneshot_lowerhalf_s *priv =
+    (FAR struct sam_oneshot_lowerhalf_s *)lower;
+  uint64_t usecs;
+  int ret;
+
+  DEBUGASSERT(priv != NULL && ts != NULL);
+  ret = sam_oneshot_max_delay(&priv->oneshot, &usecs);
+  if (ret >= 0)
+    {
+      uint64_t sec = usecs / 1000000;
+      usecs -= 1000000 * sec;
+
+      ts->tv_sec  = (time_t)sec;
+      ts->tv_nsec = (long)(usecs * 1000);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sam_start
+ *
+ * Description:
+ *   Start the oneshot timer
+ *
+ * Input Parameters:
+ *   lower   An instance of the lower-half oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           oneshot_initialize();
+ *   handler The function to call when when the oneshot timer expires.
+ *   arg     An opaque argument that will accompany the callback.
+ *   ts      Provides the duration of the one shot timer.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+static int sam_start(FAR struct oneshot_lowerhalf_s *lower,
+                     oneshot_callback_t callback, FAR void *arg,
+                     FAR const struct timespec *ts)
+{
+  FAR struct sam_oneshot_lowerhalf_s *priv =
+    (FAR struct sam_oneshot_lowerhalf_s *)lower;
+  irqstate_t flags;
+  int ret;
+
+  DEBUGASSERT(priv != NULL && callback != NULL && ts != NULL);
+
+  /* Save the callback information and start the timer */
+
+  flags          = enter_critical_section();
+  priv->callback = callback;
+  priv->arg      = arg;
+  ret            = sam_oneshot_start(&priv->oneshot, NULL,
+                                     sam_oneshot_handler, priv, ts);
+  leave_critical_section(flags);
+
+  if (ret < 0)
+    {
+      tmrerr("ERROR: sam_oneshot_start failed: %d\n", flags);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sam_cancel
+ *
+ * Description:
+ *   Cancel the oneshot timer and return the time remaining on the timer.
+ *
+ *   NOTE: This function may execute at a high rate with no timer running (as
+ *   when pre-emption is enabled and disabled).
+ *
+ * Input Parameters:
+ *   lower   Caller allocated instance of the oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           oneshot_initialize();
+ *   ts      The location in which to return the time remaining on the
+ *           oneshot timer.  A time of zero is returned if the timer is
+ *           not running.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success.  A call to up_timer_cancel() when
+ *   the timer is not active should also return success; a negated errno
+ *   value is returned on any failure.
+ *
+ ****************************************************************************/
+
+static int sam_cancel(FAR struct oneshot_lowerhalf_s *lower,
+                      FAR struct timespec *ts)
+{
+  FAR struct sam_oneshot_lowerhalf_s *priv =
+    (FAR struct sam_oneshot_lowerhalf_s *)lower;
+  irqstate_t flags;
+  int ret;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Cancel the timer */
+
+  flags          = enter_critical_section();
+  ret            = sam_oneshot_cancel(&priv->oneshot, NULL, ts);
+  priv->callback = NULL;
+  priv->arg      = NULL;
+  leave_critical_section(flags);
+
+  if (ret < 0)
+    {
+      tmrerr("ERROR: sam_oneshot_cancel failed: %d\n", flags);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: oneshot_initialize
+ *
+ * Description:
+ *   Initialize the oneshot timer and return a oneshot lower half driver
+ *   instance.
+ *
+ * Input Parameters:
+ *   chan       Timer counter channel to be used.
+ *   resolution The required resolution of the timer in units of
+ *              microseconds.  NOTE that the range is restricted to the
+ *              range of uint16_t (excluding zero).
+ *
+ * Returned Value:
+ *   On success, a non-NULL instance of the oneshot lower-half driver is
+ *   returned.  NULL is return on any failure.
+ *
+ ****************************************************************************/
+
+FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan,
+                                                   uint16_t resolution)
+{
+  FAR struct sam_oneshot_lowerhalf_s *priv;
+  int ret;
+
+  /* Allocate an instance of the lower half driver */
+
+  priv = (FAR struct sam_oneshot_lowerhalf_s *)
+    kmm_zalloc(sizeof(struct sam_oneshot_lowerhalf_s));
+
+  if (priv == NULL)
+    {
+      tmrerr("ERROR: Failed to initialized state structure\n");
+      return NULL;
+    }
+
+  /* Initialize the lower-half driver structure */
+
+  priv->lh.ops = &g_oneshot_ops;
+
+  /* Initialize the contained SAM oneshot timer */
+
+  ret = sam_oneshot_initialize(&priv->oneshot, chan, resolution);
+  if (ret < 0)
+    {
+      tmrerr("ERROR: sam_oneshot_initialize failed: %d\n", ret);
+      kmm_free(priv);
+      return NULL;
+    }
+
+  return &priv->lh;
+}
\ No newline at end of file
diff --git a/arch/arm/src/samv7/sam_pck.c b/arch/arm/src/samv7/sam_pck.c
index c4dc27d0295f051496b6ffe238810cfce2e636a4..3511d0d9ce9c2ad7a24e9f637ab18ae5ae3e5c10 100644
--- a/arch/arm/src/samv7/sam_pck.c
+++ b/arch/arm/src/samv7/sam_pck.c
@@ -128,7 +128,7 @@ uint32_t sam_pck_configure(enum pckid_e pckid, enum pckid_clksrc_e clksrc,
       break;
 
     default:
-      dbg("ERROR: Unknown clock source\n");
+      _err("ERROR: Unknown clock source\n");
       return 0;
     }
 
@@ -272,7 +272,7 @@ uint32_t sam_pck_frequency(enum pckid_e pckid)
       break;
 
     default:
-      dbg("ERROR: Unknown clock source\n");
+      _err("ERROR: Unknown clock source\n");
       return 0;
     }
 
diff --git a/arch/arm/src/samv7/sam_qspi.c b/arch/arm/src/samv7/sam_qspi.c
index e63a6ce22b16a6419c1e71181d49e465bb260caf..3e51bee7515a2131320ed261f6f5e5e6e7363f45 100644
--- a/arch/arm/src/samv7/sam_qspi.c
+++ b/arch/arm/src/samv7/sam_qspi.c
@@ -55,6 +55,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include "up_internal.h"
@@ -85,6 +86,10 @@
 #  define CONFIG_SAMV7_QSPI_DLYBCT 0
 #endif
 
+#ifndef CONFIG_DEBUG_SPI_INFO
+#  undef CONFIG_SAMV7_QSPI_REGDEBUG
+#endif
+
 /* When QSPI DMA is enabled, small DMA transfers will still be performed by
  * polling logic.  But we need a threshold value to determine what is small.
  * That value is provided by CONFIG_SAMV7_QSPI_DMATHRESHOLD.
@@ -138,33 +143,12 @@
 #define IS_ALIGNED(n)     (((uint32_t)(n) & ALIGN_MASK) == 0)
 
 /* Debug *******************************************************************/
-/* Check if QSPI debug is enabled (non-standard.. no support in
- * include/debug.h
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_SPI
-#  undef CONFIG_SAMV7_QSPI_DMADEBUG
-#  undef CONFIG_SAMV7_QSPI_REGDEBUG
-#endif
+/* Check if QSPI debug is enabled */
 
 #ifndef CONFIG_DEBUG_DMA
 #  undef CONFIG_SAMV7_QSPI_DMADEBUG
 #endif
 
-#ifdef CONFIG_DEBUG_SPI
-#  define qspidbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define qspivdbg lldbg
-#  else
-#    define qspivdbg(x...)
-#  endif
-#else
-#  define qspidbg(x...)
-#  define qspivdbg(x...)
-#endif
-
 #define DMA_INITIAL      0
 #define DMA_AFTER_SETUP  1
 #define DMA_AFTER_START  2
@@ -243,7 +227,7 @@ static inline uint32_t qspi_getreg(struct sam_qspidev_s *priv,
 static inline void qspi_putreg(struct sam_qspidev_s *priv, uint32_t value,
                   unsigned int offset);
 
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_SPI_INFO
 static void     qspi_dumpregs(struct sam_qspidev_s *priv, const char *msg);
 #else
 # define        qspi_dumpregs(priv,msg)
@@ -286,7 +270,7 @@ static void     qspi_memcpy(uint8_t *dest, const uint8_t *src,
 #ifdef QSPI_USE_INTERRUPTS
 static int     qspi_interrupt(struct sam_qspidev_s *priv);
 #ifdef CONFIG_SAMV7_QSPI
-static int     qspi0_interrupt(int irq, void *context);
+static int     qspi0_interrupt(int irq, void *context, FAR void *arg);
 #endif
 #endif
 
@@ -395,7 +379,7 @@ static bool qspi_checkreg(struct sam_qspidev_s *priv, bool wr, uint32_t value,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", priv->ntimes);
+          spiinfo("...[Repeats %d times]...\n", priv->ntimes);
         }
 
       /* Save information about the new access */
@@ -429,7 +413,7 @@ static inline uint32_t qspi_getreg(struct sam_qspidev_s *priv,
 #ifdef CONFIG_SAMV7_QSPI_REGDEBUG
   if (qspi_checkreg(priv, false, value, address))
     {
-      lldbg("%08x->%08x\n", address, value);
+      spiinfo("%08x->%08x\n", address, value);
     }
 #endif
 
@@ -452,7 +436,7 @@ static inline void qspi_putreg(struct sam_qspidev_s *priv, uint32_t value,
 #ifdef CONFIG_SAMV7_QSPI_REGDEBUG
   if (qspi_checkreg(priv, true, value, address))
     {
-      lldbg("%08x<-%08x\n", address, value);
+      spiinfo("%08x<-%08x\n", address, value);
     }
 #endif
 
@@ -474,23 +458,23 @@ static inline void qspi_putreg(struct sam_qspidev_s *priv, uint32_t value,
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_SPI_INFO
 static void qspi_dumpregs(struct sam_qspidev_s *priv, const char *msg)
 {
-  qspivdbg("%s:\n", msg);
-  qspivdbg("    MR:%08x   SR:%08x  IMR:%08x  SCR:%08x\n",
-          getreg32(priv->base + SAM_QSPI_MR_OFFSET),
-          getreg32(priv->base + SAM_QSPI_SR_OFFSET),
-          getreg32(priv->base + SAM_QSPI_IMR_OFFSET),
-          getreg32(priv->base + SAM_QSPI_SCR_OFFSET));
-  qspivdbg("   IAR:%08x  ICR:%08x  IFR:%08x  SMR:%08x\n",
-          getreg32(priv->base + SAM_QSPI_IAR_OFFSET),
-          getreg32(priv->base + SAM_QSPI_ICR_OFFSET),
-          getreg32(priv->base + SAM_QSPI_IFR_OFFSET),
-          getreg32(priv->base + SAM_QSPI_SMR_OFFSET));
-  qspivdbg("  WPCR:%08x WPSR:%08x\n",
-          getreg32(priv->base + SAM_QSPI_WPCR_OFFSET),
-          getreg32(priv->base + SAM_QSPI_WPSR_OFFSET));
+  spiinfo("%s:\n", msg);
+  spiinfo("    MR:%08x   SR:%08x  IMR:%08x  SCR:%08x\n",
+         getreg32(priv->base + SAM_QSPI_MR_OFFSET),
+         getreg32(priv->base + SAM_QSPI_SR_OFFSET),
+         getreg32(priv->base + SAM_QSPI_IMR_OFFSET),
+         getreg32(priv->base + SAM_QSPI_SCR_OFFSET));
+  spiinfo("   IAR:%08x  ICR:%08x  IFR:%08x  SMR:%08x\n",
+         getreg32(priv->base + SAM_QSPI_IAR_OFFSET),
+         getreg32(priv->base + SAM_QSPI_ICR_OFFSET),
+         getreg32(priv->base + SAM_QSPI_IFR_OFFSET),
+         getreg32(priv->base + SAM_QSPI_SMR_OFFSET));
+  spiinfo("  WPCR:%08x WPSR:%08x\n",
+         getreg32(priv->base + SAM_QSPI_WPCR_OFFSET),
+         getreg32(priv->base + SAM_QSPI_WPSR_OFFSET));
 }
 #endif
 
@@ -866,7 +850,7 @@ static int qspi_memory_dma(struct sam_qspidev_s *priv,
 
   if (ret < 0)
     {
-      qspidbg("ERROR: DMA setup failed: %d\n", ret);
+      spierr("ERROR: DMA setup failed: %d\n", ret);
       return ret;
     }
 
@@ -882,7 +866,7 @@ static int qspi_memory_dma(struct sam_qspidev_s *priv,
   ret = sam_dmastart(priv->dmach, qspi_dma_callback, (void *)priv);
   if (ret < 0)
     {
-      qspidbg("ERROR: sam_dmastart failed: %d\n", ret);
+      spierr("ERROR: sam_dmastart failed: %d\n", ret);
       return ret;
     }
 
@@ -903,7 +887,7 @@ static int qspi_memory_dma(struct sam_qspidev_s *priv,
                      (wdentry_t)qspi_dma_timeout, 1, (uint32_t)priv);
       if (ret != OK)
         {
-           qspidbg("ERROR: wd_start failed: %d\n", ret);
+           spierr("ERROR: wd_start failed: %d\n", ret);
         }
 
       /* Wait for the DMA complete */
@@ -961,7 +945,7 @@ static int qspi_memory_dma(struct sam_qspidev_s *priv,
 
   if (priv->result)
     {
-      qspidbg("ERROR: DMA failed with result: %d\n", priv->result);
+      spierr("ERROR: DMA failed with result: %d\n", priv->result);
     }
 
   return priv->result;
@@ -1078,7 +1062,7 @@ static int qspi_lock(struct qspi_dev_s *dev, bool lock)
 {
   struct sam_qspidev_s *priv = (struct sam_qspidev_s *)dev;
 
-  qspivdbg("lock=%d\n", lock);
+  spiinfo("lock=%d\n", lock);
   if (lock)
     {
       /* Take the semaphore (perhaps waiting) */
@@ -1128,7 +1112,7 @@ static uint32_t qspi_setfrequency(struct qspi_dev_s *dev, uint32_t frequency)
 #endif
   uint32_t regval;
 
-  qspivdbg("frequency=%d\n", frequency);
+  spiinfo("frequency=%d\n", frequency);
   DEBUGASSERT(priv);
 
   /* Check if the requested frequency is the same as the frequency selection */
@@ -1215,14 +1199,14 @@ static uint32_t qspi_setfrequency(struct qspi_dev_s *dev, uint32_t frequency)
   /* Calculate the new actual frequency */
 
   actual = SAM_QSPI_CLOCK / scbr;
-  qspivdbg("SCBR=%d actual=%d\n", scbr, actual);
+  spiinfo("SCBR=%d actual=%d\n", scbr, actual);
 
   /* Save the frequency setting */
 
   priv->frequency = frequency;
   priv->actual    = actual;
 
-  qspivdbg("Frequency %d->%d\n", frequency, actual);
+  spiinfo("Frequency %d->%d\n", frequency, actual);
   return actual;
 }
 
@@ -1246,7 +1230,7 @@ static void qspi_setmode(struct qspi_dev_s *dev, enum qspi_mode_e mode)
   struct sam_qspidev_s *priv = (struct sam_qspidev_s *)dev;
   uint32_t regval;
 
-  qspivdbg("mode=%d\n", mode);
+  spiinfo("mode=%d\n", mode);
 
   /* Has the mode changed? */
 
@@ -1288,7 +1272,7 @@ static void qspi_setmode(struct qspi_dev_s *dev, enum qspi_mode_e mode)
         }
 
       qspi_putreg(priv, regval, SAM_QSPI_SCR_OFFSET);
-      qspivdbg("SCR=%08x\n", regval);
+      spiinfo("SCR=%08x\n", regval);
 
       /* Save the mode so that subsequent re-configurations will be faster */
 
@@ -1316,7 +1300,7 @@ static void qspi_setbits(struct qspi_dev_s *dev, int nbits)
   struct sam_qspidev_s *priv = (struct sam_qspidev_s *)dev;
   uint32_t regval;
 
-  qspivdbg("nbits=%d\n", nbits);
+  spiinfo("nbits=%d\n", nbits);
   DEBUGASSERT(priv != NULL);
   DEBUGASSERT(nbits >= SAM_QSPI_MINBITS && nbits <= SAM_QSPI_MAXBITS);
 
@@ -1331,7 +1315,7 @@ static void qspi_setbits(struct qspi_dev_s *dev, int nbits)
       regval |= QSPI_MR_NBBITS(nbits);
       qspi_putreg(priv, regval, SAM_QSPI_MR_OFFSET);
 
-      qspivdbg("MR=%08x\n", regval);
+      spiinfo("MR=%08x\n", regval);
 
       /* Save the selection so the subsequence re-configurations will be faster */
 
@@ -1363,21 +1347,21 @@ static int qspi_command(struct qspi_dev_s *dev,
 
   DEBUGASSERT(priv != NULL && cmdinfo != NULL);
 
-#ifdef CONFIG_DEBUG_SPI
-  qspivdbg("Transfer:\n");
-  qspivdbg("  flags: %02x\n", cmdinfo->flags);
-  qspivdbg("  cmd: %04x\n", cmdinfo->cmd);
+#ifdef CONFIG_DEBUG_SPI_INFO
+  spiinfo("Transfer:\n");
+  spiinfo("  flags: %02x\n", cmdinfo->flags);
+  spiinfo("  cmd: %04x\n", cmdinfo->cmd);
 
   if (QSPICMD_ISADDRESS(cmdinfo->flags))
     {
-      qspivdbg("  address/length: %08lx/%d\n",
+      spiinfo("  address/length: %08lx/%d\n",
               (unsigned long)cmdinfo->addr, cmdinfo->addrlen);
     }
 
   if (QSPICMD_ISDATA(cmdinfo->flags))
     {
-      qspivdbg("  %s Data:\n", QSPICMD_ISWRITE(cmdinfo->flags) ? "Write" : "Read");
-      qspivdbg("    buffer/length: %p/%d\n", cmdinfo->buffer, cmdinfo->buflen);
+      spiinfo("  %s Data:\n", QSPICMD_ISWRITE(cmdinfo->flags) ? "Write" : "Read");
+      spiinfo("    buffer/length: %p/%d\n", cmdinfo->buffer, cmdinfo->buflen);
     }
 #endif
 
@@ -1572,13 +1556,13 @@ static int qspi_memory(struct qspi_dev_s *dev,
 
   DEBUGASSERT(priv != NULL && meminfo != NULL);
 
-  qspivdbg("Transfer:\n");
-  qspivdbg("  flags: %02x\n", meminfo->flags);
-  qspivdbg("  cmd: %04x\n", meminfo->cmd);
-  qspivdbg("  address/length: %08lx/%d\n",
-          (unsigned long)meminfo->addr, meminfo->addrlen);
-  qspivdbg("  %s Data:\n", QSPIMEM_ISWRITE(meminfo->flags) ? "Write" : "Read");
-  qspivdbg("    buffer/length: %p/%d\n", meminfo->buffer, meminfo->buflen);
+  spiinfo("Transfer:\n");
+  spiinfo("  flags: %02x\n", meminfo->flags);
+  spiinfo("  cmd: %04x\n", meminfo->cmd);
+  spiinfo("  address/length: %08lx/%d\n",
+         (unsigned long)meminfo->addr, meminfo->addrlen);
+  spiinfo("  %s Data:\n", QSPIMEM_ISWRITE(meminfo->flags) ? "Write" : "Read");
+  spiinfo("    buffer/length: %p/%d\n", meminfo->buffer, meminfo->buflen);
 
 #ifdef CONFIG_SAMV7_QSPI_DMA
   /* Can we perform DMA?  Should we perform DMA? */
@@ -1746,7 +1730,7 @@ struct qspi_dev_s *sam_qspi_initialize(int intf)
 
   /* The supported SAM parts have only a single QSPI port */
 
-  qspivdbg("intf: %d\n", intf);
+  spiinfo("intf: %d\n", intf);
   DEBUGASSERT(intf >= 0 && intf < SAMV7_NQSPI);
 
   /* Select the QSPI interface */
@@ -1778,7 +1762,7 @@ struct qspi_dev_s *sam_qspi_initialize(int intf)
   else
 #endif
     {
-      qspidbg("ERROR: QSPI%d not supported\n", intf);
+      spierr("ERROR: QSPI%d not supported\n", intf);
       return NULL;
     }
 
@@ -1801,23 +1785,25 @@ struct qspi_dev_s *sam_qspi_initialize(int intf)
           priv->dmach = sam_dmachannel(0, 0);
           if (!priv->dmach)
             {
-              qspidbg("ERROR: Failed to allocate the DMA channel\n");
+              spierr("ERROR: Failed to allocate the DMA channel\n");
               priv->candma = false;
             }
         }
 
       /* Initialize the QSPI semaphore that is used to wake up the waiting
-       * thread when the DMA transfer completes.
+       * thread when the DMA transfer completes.  This semaphore is used for
+       * signaling and, hence, should not have priority inheritance enabled.
        */
 
       sem_init(&priv->dmawait, 0, 0);
+      sem_setprotocol(&priv->dmawait, SEM_PRIO_NONE);
 
       /* Create a watchdog time to catch DMA timeouts */
 
       priv->dmadog = wd_create();
       if (priv->dmadog == NULL)
         {
-          qspidbg("ERROR: Failed to create wdog\n");
+          spierr("ERROR: Failed to create wdog\n");
           goto errout_with_dmahandles;
         }
 #endif
@@ -1825,10 +1811,10 @@ struct qspi_dev_s *sam_qspi_initialize(int intf)
 #ifdef QSPI_USE_INTERRUPTS
       /* Attach the interrupt handler */
 
-      ret = irq_attach(priv->irq, priv->handler);
+      ret = irq_attach(priv->irq, priv->handler, NULL);
       if (ret < 0)
         {
-          qspidbg("ERROR: Failed to attach irq %d\n", priv->irq);
+          spierr("ERROR: Failed to attach irq %d\n", priv->irq);
           goto errout_with_dmadog;
         }
 #endif
@@ -1840,7 +1826,7 @@ struct qspi_dev_s *sam_qspi_initialize(int intf)
       ret = qspi_hw_initialize(priv);
       if (ret < 0)
         {
-          qspidbg("ERROR: Failed to initialize QSPI hardware\n");
+          spierr("ERROR: Failed to initialize QSPI hardware\n");
           goto errout_with_irq;
         }
 
diff --git a/arch/arm/src/samv7/sam_rswdt.c b/arch/arm/src/samv7/sam_rswdt.c
index 20ea3c2183402877cfabd7f1d8c22ebeb0481381..6d5add03a23ac158e16eb569deb6ed4c4e1b885b 100644
--- a/arch/arm/src/samv7/sam_rswdt.c
+++ b/arch/arm/src/samv7/sam_rswdt.c
@@ -57,6 +57,11 @@
  * Pre-processor Definitions
  ****************************************************************************/
 /* Configuration ************************************************************/
+
+#ifndef CONFIG_DEBUG_WATCHDOG_INFO
+#  undef CONFIG_SAMV7_RSWDT_REGDEBUG
+#endif
+
 /* The Watchdog Timer uses the Slow Clock divided by 128 to establish the
  * maximum Watchdog period to be 16 seconds (with a typical Slow Clock of
  * 32768 kHz).
@@ -80,20 +85,6 @@
 #define RSWDT_MINTIMEOUT ((1000 + RSWDT_FREQUENCY - 1) / RSWDT_FREQUENCY)
 #define RSWDT_MAXTIMEOUT ((4096 * 1000) / RSWDT_FREQUENCY)
 
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing the watchdog
- * driver.  NOTE: that only lldbg types are used so that the output is
- * immediately available.
- */
-
-#ifdef CONFIG_DEBUG_WATCHDOG
-#  define wddbg    lldbg
-#  define wdvdbg   llvdbg
-#else
-#  define wddbg(x...)
-#  define wdvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -118,7 +109,7 @@ struct sam_lowerhalf_s
  ****************************************************************************/
 /* Register operations ******************************************************/
 
-#if defined(CONFIG_SAMV7_RSWDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAMV7_RSWDT_REGDEBUG
 static uint32_t sam_getreg(uintptr_t regaddr);
 static void     sam_putreg(uint32_t regval, uintptr_t regaddr);
 #else
@@ -129,7 +120,7 @@ static void     sam_putreg(uint32_t regval, uintptr_t regaddr);
 /* Interrupt hanlding *******************************************************/
 
 #ifdef CONFIG_SAMV7_RSWDT_INTERRUPT
-static int      sam_interrupt(int irq, FAR void *context);
+static int      sam_interrupt(int irq, FAR void *context, FAR void *arg);
 #endif
 
 /* "Lower half" driver methods **********************************************/
@@ -178,7 +169,7 @@ static struct sam_lowerhalf_s g_wdtdev;
  *
  ****************************************************************************/
 
-#if defined(CONFIG_SAMV7_RSWDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAMV7_RSWDT_REGDEBUG
 static uint32_t sam_getreg(uintptr_t regaddr)
 {
   static uint32_t prevaddr = 0;
@@ -199,7 +190,7 @@ static uint32_t sam_getreg(uintptr_t regaddr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              wdinfo("...\n");
             }
 
           return regval;
@@ -216,7 +207,7 @@ static uint32_t sam_getreg(uintptr_t regaddr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          wdinfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -228,7 +219,7 @@ static uint32_t sam_getreg(uintptr_t regaddr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%048\n", regaddr, regval);
+  wdinfo("%08x->%048\n", regaddr, regval);
   return regval;
 }
 #endif
@@ -241,12 +232,12 @@ static uint32_t sam_getreg(uintptr_t regaddr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_SAMV7_RSWDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAMV7_RSWDT_REGDEBUG
 static void sam_putreg(uint32_t regval, uintptr_t regaddr)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", regaddr, regval);
+  wdinfo("%08x<-%08x\n", regaddr, regval);
 
   /* Write the value */
 
@@ -269,7 +260,7 @@ static void sam_putreg(uint32_t regval, uintptr_t regaddr)
  ****************************************************************************/
 
 #ifdef CONFIG_SAMV7_RSWDT_INTERRUPT
-static int sam_interrupt(int irq, FAR void *context)
+static int sam_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   FAR struct sam_lowerhalf_s *priv = &g_wdtdev;
 
@@ -315,7 +306,7 @@ static int sam_start(FAR struct watchdog_lowerhalf_s *lower)
    * timer with the newly programmed mode parameters.
    */
 
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
   return priv->started ? OK : -ENOSYS;
 }
 
@@ -343,7 +334,7 @@ static int sam_stop(FAR struct watchdog_lowerhalf_s *lower)
    * timer with the newly programmed mode parameters.
    */
 
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
   return -ENOSYS;
 }
 
@@ -366,7 +357,7 @@ static int sam_stop(FAR struct watchdog_lowerhalf_s *lower)
 
 static int sam_keepalive(FAR struct watchdog_lowerhalf_s *lower)
 {
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
 
   /* Write RSWDT_CR_WDRSTT to the RSWDT CR regiser (along with the KEY value)
    * will restart the watchdog timer.
@@ -397,7 +388,7 @@ static int sam_getstatus(FAR struct watchdog_lowerhalf_s *lower,
 {
   FAR struct sam_lowerhalf_s *priv = (FAR struct sam_lowerhalf_s *)lower;
 
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
   DEBUGASSERT(priv);
 
   /* Return the status bit */
@@ -426,10 +417,10 @@ static int sam_getstatus(FAR struct watchdog_lowerhalf_s *lower,
 
   status->timeleft = 0;
 
-  wdvdbg("Status     :\n");
-  wdvdbg("  flags    : %08x\n", status->flags);
-  wdvdbg("  timeout  : %d\n", status->timeout);
-  wdvdbg("  timeleft : %d\n", status->timeleft);
+  wdinfo("Status     :\n");
+  wdinfo("  flags    : %08x\n", status->flags);
+  wdinfo("  timeout  : %d\n", status->timeout);
+  wdinfo("  timeleft : %d\n", status->timeleft);
   return OK;
 }
 
@@ -457,13 +448,13 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower,
   uint32_t regval;
 
   DEBUGASSERT(priv);
-  wdvdbg("Entry: timeout=%d\n", timeout);
+  wdinfo("Entry: timeout=%d\n", timeout);
 
   /* Can this timeout be represented? */
 
   if (timeout < RSWDT_MINTIMEOUT || timeout >= RSWDT_MAXTIMEOUT)
     {
-      wddbg("Cannot represent timeout: %d < %d > %d\n",
+      wderr("ERROR: Cannot represent timeout: %d < %d > %d\n",
             RSWDT_MINTIMEOUT, timeout, RSWDT_MAXTIMEOUT);
       return -ERANGE;
     }
@@ -496,7 +487,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower,
 
   priv->reload = reload;
 
-  wdvdbg("reload=%d timout: %d->%d\n",
+  wdinfo("reload=%d timout: %d->%d\n",
          reload, timeout, priv->timeout);
 
   /* Set the RSWDT_MR according to calculated value
@@ -541,7 +532,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower,
 
   priv->started = true;
 
-  wdvdbg("Setup: CR: %08x MR: %08x SR: %08x\n",
+  wdinfo("Setup: CR: %08x MR: %08x SR: %08x\n",
          sam_getreg(SAM_RSWDT_CR), sam_getreg(SAM_RSWDT_MR),
          sam_getreg(SAM_RSWDT_SR));
 
@@ -574,7 +565,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower,
                             xcpt_t handler)
 {
 #ifndef CONFIG_SAMV7_RSWDT_INTERRUPT
-  wddbg("ERROR: Not configured for this mode\n");
+  wderr("ERROR: Not configured for this mode\n");
   return NULL;
 #else
   FAR struct sam_lowerhalf_s *priv = (FAR struct sam_lowerhalf_s *)lower;
@@ -582,7 +573,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower,
   xcpt_t oldhandler;
 
   DEBUGASSERT(priv);
-  wdvdbg("Entry: handler=%p\n", handler);
+  wdinfo("Entry: handler=%p\n", handler);
 
   /* Get the old handler return value */
 
@@ -636,7 +627,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower,
 static int sam_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd,
                     unsigned long arg)
 {
-  wdvdbg("cmd=%d arg=%ld\n", cmd, arg);
+  wdinfo("cmd=%d arg=%ld\n", cmd, arg);
 
   /* No ioctls are supported */
 
@@ -667,7 +658,7 @@ int sam_rswdt_initialize(void)
 {
   FAR struct sam_lowerhalf_s *priv = &g_wdtdev;
 
-  wdvdbg("Entry: CR: %08x MR: %08x SR: %08x\n",
+  wdinfo("Entry: CR: %08x MR: %08x SR: %08x\n",
          sam_getreg(SAM_RSWDT_CR), sam_getreg(SAM_RSWDT_MR),
          sam_getreg(SAM_RSWDT_SR));
 
@@ -693,7 +684,7 @@ int sam_rswdt_initialize(void)
 #ifdef CONFIG_SAMV7_RSWDT_INTERRUPT
   /* Attach our RSWDT interrupt handler (But don't enable it yet) */
 
-  (void)irq_attach(SAM_IRQ_RSWDT, sam_interrupt);
+  (void)irq_attach(SAM_IRQ_RSWDT, sam_interrupt, NULL);
 #endif
 
   /* Register the watchdog driver as /dev/rswdt */
diff --git a/arch/arm/src/samv7/sam_serial.c b/arch/arm/src/samv7/sam_serial.c
index 6744a72ce2e92a4884943a5305295fd3f27ecec2..ad81eb94765514466404409bcb93bce5204e53c2 100644
--- a/arch/arm/src/samv7/sam_serial.c
+++ b/arch/arm/src/samv7/sam_serial.c
@@ -333,7 +333,6 @@
 struct sam_dev_s
 {
   const uint32_t usartbase;     /* Base address of USART registers */
-  xcpt_t   handler;             /* Interrupt handler */
   uint32_t baud;                /* Configured baud */
   uint32_t sr;                  /* Saved status bits */
   uint8_t  irq;                 /* IRQ associated with this USART */
@@ -353,31 +352,7 @@ static int  sam_setup(struct uart_dev_s *dev);
 static void sam_shutdown(struct uart_dev_s *dev);
 static int  sam_attach(struct uart_dev_s *dev);
 static void sam_detach(struct uart_dev_s *dev);
-static int sam_interrupt(struct uart_dev_s *dev);
-#ifdef CONFIG_SAMV7_UART0
-static int  sam_uart0_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_SAMV7_UART1
-static int  sam_uart1_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_SAMV7_UART2
-static int  sam_uart2_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_SAMV7_UART3
-static int  sam_uart3_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_SAMV7_UART4
-static int  sam_uart4_interrupt(int irq, void *context);
-#endif
-#if defined(CONFIG_SAMV7_USART0) &&  defined(CONFIG_USART0_SERIALDRIVER)
-static int  sam_usart0_interrupt(int irq, void *context);
-#endif
-#if defined(CONFIG_SAMV7_USART1) &&  defined(CONFIG_USART1_SERIALDRIVER)
-static int  sam_usart1_interrupt(int irq, void *context);
-#endif
-#if defined(CONFIG_SAMV7_USART2) &&  defined(CONFIG_USART2_SERIALDRIVER)
-static int  sam_usart2_interrupt(int irq, void *context);
-#endif
+static int  sam_interrupt(int irq, void *context, FAR void *arg);
 static int  sam_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  sam_receive(struct uart_dev_s *dev, uint32_t *status);
 static void sam_rxint(struct uart_dev_s *dev, bool enable);
@@ -451,7 +426,6 @@ static char g_usart2txbuffer[CONFIG_USART2_TXBUFSIZE];
 static struct sam_dev_s g_uart0priv =
 {
   .usartbase      = SAM_UART0_BASE,
-  .handler        = sam_uart0_interrupt,
   .baud           = CONFIG_UART0_BAUD,
   .irq            = SAM_IRQ_UART0,
   .parity         = CONFIG_UART0_PARITY,
@@ -482,7 +456,6 @@ static uart_dev_t g_uart0port =
 static struct sam_dev_s g_uart1priv =
 {
   .usartbase      = SAM_UART1_BASE,
-  .handler        = sam_uart1_interrupt,
   .baud           = CONFIG_UART1_BAUD,
   .irq            = SAM_IRQ_UART1,
   .parity         = CONFIG_UART1_PARITY,
@@ -513,7 +486,6 @@ static uart_dev_t g_uart1port =
 static struct sam_dev_s g_uart2priv =
 {
   .usartbase      = SAM_UART2_BASE,
-  .handler        = sam_uart2_interrupt,
   .baud           = CONFIG_UART2_BAUD,
   .irq            = SAM_IRQ_UART2,
   .parity         = CONFIG_UART2_PARITY,
@@ -544,7 +516,6 @@ static uart_dev_t g_uart2port =
 static struct sam_dev_s g_uart3priv =
 {
   .usartbase      = SAM_UART3_BASE,
-  .handler        = sam_uart3_interrupt,
   .baud           = CONFIG_UART3_BAUD,
   .irq            = SAM_IRQ_UART3,
   .parity         = CONFIG_UART3_PARITY,
@@ -575,7 +546,6 @@ static uart_dev_t g_uart3port =
 static struct sam_dev_s g_uart4priv =
 {
   .usartbase      = SAM_UART4_BASE,
-  .handler        = sam_uart4_interrupt,
   .baud           = CONFIG_UART4_BAUD,
   .irq            = SAM_IRQ_UART4,
   .parity         = CONFIG_UART4_PARITY,
@@ -606,7 +576,6 @@ static uart_dev_t g_uart4port =
 static struct sam_dev_s g_usart0priv =
 {
   .usartbase      = SAM_USART0_BASE,
-  .handler        = sam_usart0_interrupt,
   .baud           = CONFIG_USART0_BAUD,
   .irq            = SAM_IRQ_USART0,
   .parity         = CONFIG_USART0_PARITY,
@@ -640,7 +609,6 @@ static uart_dev_t g_usart0port =
 static struct sam_dev_s g_usart1priv =
 {
   .usartbase      = SAM_USART1_BASE,
-  .handler        = sam_usart1_interrupt,
   .baud           = CONFIG_USART1_BAUD,
   .irq            = SAM_IRQ_USART1,
   .parity         = CONFIG_USART1_PARITY,
@@ -674,7 +642,6 @@ static uart_dev_t g_usart1port =
 static struct sam_dev_s g_usart2priv =
 {
   .usartbase      = SAM_USART2_BASE,
-  .handler        = sam_usart2_interrupt,
   .baud           = CONFIG_USART2_BAUD,
   .irq            = SAM_IRQ_USART2,
   .parity         = CONFIG_USART2_PARITY,
@@ -973,7 +940,7 @@ static int sam_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, priv->handler);
+  ret = irq_attach(priv->irq, sam_interrupt, dev);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
@@ -1014,15 +981,16 @@ static void sam_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int sam_interrupt(struct uart_dev_s *dev)
+static int sam_interrupt(int irq, void *context, FAR void *arg)
 {
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct sam_dev_s *priv;
-  uint32_t          pending;
-  uint32_t          imr;
-  int               passes;
-  bool              handled;
+  uint32_t pending;
+  uint32_t imr;
+  int passes;
+  bool handled;
 
-  DEBUGASSERT(dev && dev->priv);
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct sam_dev_s *)dev->priv;
 
   /* Loop until there are no characters to be transferred or, until we have
@@ -1068,72 +1036,6 @@ static int sam_interrupt(struct uart_dev_s *dev)
   return OK;
 }
 
-/****************************************************************************
- * Name: sam_uart[n]_interrupt
- *
- * Description:
- *   UART interrupt handlers
- *
- ****************************************************************************/
-
-#ifdef CONFIG_SAMV7_UART0
-static int  sam_uart0_interrupt(int irq, void *context)
-{
-  return sam_interrupt(&g_uart0port);
-}
-#endif
-#ifdef CONFIG_SAMV7_UART1
-static int  sam_uart1_interrupt(int irq, void *context)
-{
-  return sam_interrupt(&g_uart1port);
-}
-#endif
-#ifdef CONFIG_SAMV7_UART2
-static int  sam_uart2_interrupt(int irq, void *context)
-{
-  return sam_interrupt(&g_uart2port);
-}
-#endif
-#ifdef CONFIG_SAMV7_UART3
-static int  sam_uart3_interrupt(int irq, void *context)
-{
-  return sam_interrupt(&g_uart3port);
-}
-#endif
-#ifdef CONFIG_SAMV7_UART4
-static int  sam_uart4_interrupt(int irq, void *context)
-{
-  return sam_interrupt(&g_uart4port);
-}
-#endif
-
-/****************************************************************************
- * Name: sam_usart[n]_interrupt
- *
- * Description:
- *   USART interrupt handlers
- *
- ****************************************************************************/
-
-#if defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER)
-static int  sam_usart0_interrupt(int irq, void *context)
-{
-  return sam_interrupt(&g_usart0port);
-}
-#endif
-#if defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER)
-static int  sam_usart1_interrupt(int irq, void *context)
-{
-  return sam_interrupt(&g_usart1port);
-}
-#endif
-#if defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER)
-static int  sam_usart2_interrupt(int irq, void *context)
-{
-  return sam_interrupt(&g_usart2port);
-}
-#endif
-
 /****************************************************************************
  * Name: sam_ioctl
  *
diff --git a/arch/arm/src/samv7/sam_spi.c b/arch/arm/src/samv7/sam_spi.c
index 0d9f1ec32a114158e17c99b619a4323b251d4b2f..de1dec1615062afc2d96e2445739dfb397577a9d 100644
--- a/arch/arm/src/samv7/sam_spi.c
+++ b/arch/arm/src/samv7/sam_spi.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/samv7/sam_spi.c
  *
- *   Copyright (C) 2015=2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Authors: Gregory Nutt 
  *            Diego Sanchez 
  *
@@ -56,6 +56,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include "up_internal.h"
@@ -105,6 +106,14 @@
 #  undef CONFIG_SAMV7_SPI_DMADEBUG
 #endif
 
+#ifndef CONFIG_DEBUG_DMA_INFO
+#  undef CONFIG_SAMV7_SPI_DMADEBUG
+#endif
+
+#ifndef CONFIG_DEBUG_SPI_INFO
+#  undef CONFIG_SAMV7_SPI_REGDEBUG
+#endif
+
 /* Clocking *****************************************************************/
 /* The SPI Baud rate clock is generated by dividing the peripheral clock by
  * a value between 1 and 255
@@ -120,33 +129,12 @@
 #define DMA_TIMEOUT_TICKS MSEC2TICK(DMA_TIMEOUT_MS)
 
 /* Debug *******************************************************************/
-/* Check if SPI debug is enabled (non-standard.. no support in
- * include/debug.h
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_SPI
-#  undef CONFIG_SAMV7_SPI_DMADEBUG
-#  undef CONFIG_SAMV7_SPI_REGDEBUG
-#endif
+/* Check if SPI debug is enabled */
 
 #ifndef CONFIG_DEBUG_DMA
 #  undef CONFIG_SAMV7_SPI_DMADEBUG
 #endif
 
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 #define DMA_INITIAL      0
 #define DMA_AFTER_SETUP  1
 #define DMA_AFTER_START  2
@@ -205,6 +193,7 @@ struct sam_spidev_s
   sem_t spisem;                /* Assures mutually exclusive access to SPI */
   select_t select;             /* SPI select call-out */
   bool initialized;            /* TRUE: Controller has been initialized */
+  bool escape_lastxfer;        /* Dont set LASTXFER-Bit in the next transfer */
 #ifdef CONFIG_SAMV7_SPI_DMA
   uint8_t pid;                 /* SPI peripheral ID */
 #endif
@@ -238,7 +227,7 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
                   unsigned int offset);
 static inline struct sam_spidev_s *spi_device(struct sam_spics_s *spics);
 
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_SPI_INFO
 static void     spi_dumpregs(struct sam_spidev_s *spi, const char *msg);
 #else
 # define        spi_dumpregs(spi,msg)
@@ -277,6 +266,12 @@ static int      spi_lock(struct spi_dev_s *dev, bool lock);
 static void     spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
                   bool selected);
 static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency);
+#ifdef CONFIG_SPI_CS_DELAY_CONTROL
+static int      spi_setdelay(struct spi_dev_s *dev, uint32_t a, uint32_t b, uint32_t c);
+#endif
+#ifdef CONFIG_SPI_HWFEATURES
+static int      spi_hwfeatures(struct spi_dev_s *dev, uint8_t features);
+#endif
 static void     spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode);
 static void     spi_setbits(struct spi_dev_s *dev, int nbits);
 static uint16_t spi_send(struct spi_dev_s *dev, uint16_t ch);
@@ -324,10 +319,13 @@ static const struct spi_ops_s g_spi0ops =
   .lock              = spi_lock,
   .select            = spi_select,
   .setfrequency      = spi_setfrequency,
+#ifdef CONFIG_SPI_CS_DELAY_CONTROL
+  .setdelay          = spi_setdelay,
+#endif
   .setmode           = spi_setmode,
   .setbits           = spi_setbits,
 #ifdef CONFIG_SPI_HWFEATURES
-  .hwfeatures        = 0,                 /* Not supported */
+  .hwfeatures        = spi_hwfeatures,
 #endif
   .status            = sam_spi0status,
 #ifdef CONFIG_SPI_CMDDATA
@@ -363,6 +361,9 @@ static const struct spi_ops_s g_spi1ops =
   .lock              = spi_lock,
   .select            = spi_select,
   .setfrequency      = spi_setfrequency,
+#ifdef CONFIG_SPI_CS_DELAY_CONTROL
+  .setdelay          = spi_setdelay,
+#endif
   .setmode           = spi_setmode,
   .setbits           = spi_setbits,
   .status            = sam_spi1status,
@@ -436,7 +437,7 @@ static bool spi_checkreg(struct sam_spidev_s *spi, bool wr, uint32_t value,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", spi->ntimes);
+          spiinfo("...[Repeats %d times]...\n", spi->ntimes);
         }
 
       /* Save information about the new access */
@@ -470,7 +471,7 @@ static inline uint32_t spi_getreg(struct sam_spidev_s *spi,
 #ifdef CONFIG_SAMV7_SPI_REGDEBUG
   if (spi_checkreg(spi, false, value, address))
     {
-      lldbg("%08x->%08x\n", address, value);
+      spiinfo("%08x->%08x\n", address, value);
     }
 #endif
 
@@ -493,7 +494,7 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
 #ifdef CONFIG_SAMV7_SPI_REGDEBUG
   if (spi_checkreg(spi, true, value, address))
     {
-      lldbg("%08x<-%08x\n", address, value);
+      spiinfo("%08x<-%08x\n", address, value);
     }
 #endif
 
@@ -515,20 +516,20 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_SPI_INFO
 static void spi_dumpregs(struct sam_spidev_s *spi, const char *msg)
 {
-  spivdbg("%s:\n", msg);
-  spivdbg("    MR:%08x   SR:%08x  IMR:%08x\n",
+  spiinfo("%s:\n", msg);
+  spiinfo("    MR:%08x   SR:%08x  IMR:%08x\n",
           getreg32(spi->base + SAM_SPI_MR_OFFSET),
           getreg32(spi->base + SAM_SPI_SR_OFFSET),
           getreg32(spi->base + SAM_SPI_IMR_OFFSET));
-  spivdbg("  CSR0:%08x CSR1:%08x CSR2:%08x CSR3:%08x\n",
+  spiinfo("  CSR0:%08x CSR1:%08x CSR2:%08x CSR3:%08x\n",
           getreg32(spi->base + SAM_SPI_CSR0_OFFSET),
           getreg32(spi->base + SAM_SPI_CSR1_OFFSET),
           getreg32(spi->base + SAM_SPI_CSR2_OFFSET),
           getreg32(spi->base + SAM_SPI_CSR3_OFFSET));
-  spivdbg("  WPCR:%08x WPSR:%08x\n",
+  spiinfo("  WPCR:%08x WPSR:%08x\n",
           getreg32(spi->base + SAM_SPI_WPCR_OFFSET),
           getreg32(spi->base + SAM_SPI_WPSR_OFFSET));
 }
@@ -626,7 +627,7 @@ static inline uint32_t spi_cs2pcs(struct sam_spics_s *spics)
 #ifndef CONFIG_SAMV7_SPI_CS_DECODING
   return ((uint32_t)1 << (spics->cs)) - 1;
 #else
-  return spics->cs;
+  return spics->cs - 1;
 #endif
 }
 
@@ -903,7 +904,7 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
   struct sam_spics_s *spics = (struct sam_spics_s *)dev;
   struct sam_spidev_s *spi = spi_device(spics);
 
-  spivdbg("lock=%d\n", lock);
+  spiinfo("lock=%d\n", lock);
   if (lock)
     {
       /* Take the semaphore (perhaps waiting) */
@@ -951,10 +952,10 @@ static void spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
 
   /* Are we selecting or de-selecting the device? */
 
-  spivdbg("selected=%d\n", selected);
+  spiinfo("selected=%d\n", selected);
   if (selected)
     {
-      spivdbg("cs=%d\n", spics->cs);
+      spiinfo("cs=%d\n", spics->cs);
 
       /* Before writing the TDR, the PCS field in the SPI_MR register must be set
        * in order to select a slave.
@@ -962,7 +963,18 @@ static void spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
 
       regval  = spi_getreg(spi, SAM_SPI_MR_OFFSET);
       regval &= ~SPI_MR_PCS_MASK;
+
+      /* SPI_VARSELECT means, that the ChipSelect for each device is set within
+       * the transferred data (SAM_SPI_TDR) instead inside the mode register
+       * (SAM_SPI_MR).
+       * In addition, the LASTXFER flag is also set within the transferred data
+       * (SAM_SPI_TDR) instead inside the control register (SAM_SPI_CR).
+       * (see spi_exchange)
+       */
+
+#ifndef CONFIG_SAMV7_SPI_VARSELECT
       regval |= (spi_cs2pcs(spics) << SPI_MR_PCS_SHIFT);
+#endif
       spi_putreg(spi, regval, SAM_SPI_MR_OFFSET);
     }
 
@@ -1009,7 +1021,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
   uint32_t regval;
   unsigned int offset;
 
-  spivdbg("cs=%d frequency=%d\n", spics->cs, frequency);
+  spiinfo("cs=%d frequency=%d\n", spics->cs, frequency);
 
   /* Check if the requested frequency is the same as the frequency selection */
 
@@ -1027,9 +1039,9 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
 
   scbr = SAM_SPI_CLOCK / frequency;
 
-  if (scbr < 8)
+  if (scbr < 2)
     {
-      scbr = 8;
+      scbr = 2;
     }
   else if (scbr > 254)
     {
@@ -1079,17 +1091,205 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
   /* Calculate the new actual frequency */
 
   actual = SAM_SPI_CLOCK / scbr;
-  spivdbg("csr[offset=%02x]=%08x actual=%d\n", offset, regval, actual);
+  spiinfo("csr[offset=%02x]=%08x actual=%d\n", offset, regval, actual);
 
   /* Save the frequency setting */
 
   spics->frequency = frequency;
   spics->actual    = actual;
 
-  spidbg("Frequency %d->%d\n", frequency, actual);
+  spiinfo("Frequency %d->%d\n", frequency, actual);
   return actual;
 }
 
+/****************************************************************************
+ * Name: spi_setdelay
+ *
+ * Description:
+ *   Set the SPI Delays in nanoseconds. Optional.
+ *
+ * Input Parameters:
+ *   dev        - Device-specific state data
+ *   startdelay - The delay between CS active and first CLK
+ *   stopdelay  - The delay between last CLK and CS inactive
+ *   csdelay    - The delay between CS inactive and CS active again
+ *
+ * Returned Value:
+ *   Returns 0 if ok
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI_CS_DELAY_CONTROL
+static int spi_setdelay(struct spi_dev_s *dev, uint32_t startdelay,
+                        uint32_t stopdelay, uint32_t csdelay)
+{
+  struct sam_spics_s *spics = (struct sam_spics_s *)dev;
+  struct sam_spidev_s *spi = spi_device(spics);
+  uint64_t dlybs;
+  uint64_t dlybct;
+  uint64_t dlybcs;
+  uint32_t regval;
+  unsigned int offset;
+
+  spiinfo("cs=%d startdelay=%d\n", spics->cs, startdelay);
+  spiinfo("cs=%d stopdelay=%d\n", spics->cs, stopdelay);
+  spiinfo("cs=%d csdelay=%d\n", spics->cs, csdelay);
+
+  offset = (unsigned int)g_csroffset[spics->cs];
+
+  /* startdelay = DLYBS: Delay Before SPCK.
+   * This field defines the delay from NPCS valid to the first valid SPCK
+   * transition. When DLYBS equals zero, the NPCS valid to SPCK transition is
+   * 1/2 the SPCK clock period.
+   * Otherwise, the following equations determine the delay:
+   *
+   *   Delay Before SPCK = DLYBS / SPI_CLK
+   *
+   * For a 2uS delay
+   *
+   *   DLYBS = SPI_CLK * 0.000002 = SPI_CLK / 500000
+   *
+   * TODO: Check for boundaries!
+   */
+
+  dlybs   = SAM_SPI_CLOCK;
+  dlybs  *= startdelay;
+  dlybs  /= 1000000000;
+  regval  = spi_getreg(spi, offset);
+  regval &= ~SPI_CSR_DLYBS_MASK;
+  regval |= (uint32_t) dlybs << SPI_CSR_DLYBS_SHIFT;
+  spi_putreg(spi, regval, offset);
+
+  /* stopdelay = DLYBCT: Delay Between Consecutive Transfers.
+   * This field defines the delay between two consecutive transfers with the
+   * same peripheral without removing the chip select. The delay is always
+   * inserted after each transfer and before removing the chip select if
+   * needed.
+   *
+   *   Delay Between Consecutive Transfers = (32 x DLYBCT) / SPI_CLK
+   *
+   * For a 5uS delay:
+   *
+   *   DLYBCT = SPI_CLK * 0.000005 / 32 = SPI_CLK / 200000 / 32
+   */
+
+  dlybct  = SAM_SPI_CLOCK;
+  dlybct *= stopdelay;
+  dlybct /= 1000000000;
+  dlybct /= 32;
+  regval  = spi_getreg(spi, offset);
+  regval &= ~SPI_CSR_DLYBCT_MASK;
+  regval |= (uint32_t) dlybct << SPI_CSR_DLYBCT_SHIFT;
+  spi_putreg(spi, regval, offset);
+
+  /* csdelay = DLYBCS: Delay Between Chip Selects.
+   * This field defines the delay between the inactivation and the activation
+   * of NPCS. The DLYBCS time guarantees non-overlapping chip selects and
+   * solves bus contentions in case of peripherals having long data float
+   * times. If DLYBCS is lower than 6, six peripheral clock periods are
+   * inserted by default.
+   *
+   *   Delay Between Chip Selects = DLYBCS / SPI_CLK
+   *
+   *   DLYBCS = SPI_CLK * Delay
+   */
+  dlybcs  = SAM_SPI_CLOCK;
+  dlybcs *= csdelay;
+  dlybcs /= 1000000000;
+  regval  = spi_getreg(spi, SAM_SPI_MR_OFFSET);
+  regval &= ~SPI_MR_DLYBCS_MASK;
+  regval |= dlybcs << SPI_MR_DLYBCS_SHIFT;
+  spi_putreg(spi, regval, SAM_SPI_MR_OFFSET);
+
+  return 0;
+}
+#endif
+
+/****************************************************************************
+ * Name: spi_hwfeatures
+ *
+ * Description:
+ *   Use some super-special hardware Features. Optional.
+ *
+ * Input Parameters:
+ *   dev      -  Device-specific state data
+ *   features -  Bitmask of the activated features
+ *
+ * Returned Value:
+ *   Returns 0 if ok
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI_HWFEATURES
+static int spi_hwfeatures(struct spi_dev_s *dev, uint8_t features)
+{
+#ifdef CONFIG_SPI_CS_CONTROL
+  struct sam_spics_s *spics = (struct sam_spics_s *)dev;
+  struct sam_spidev_s *spi = spi_device(spics);
+  uint32_t regval;
+  unsigned int offset;
+
+  /* CS rises after every Transmission, also if we provide new data
+   * immediately.
+   */
+
+  if (features & HWFEAT_FORCE_CS_INACTIVE_AFTER_TRANSFER)
+    {
+      offset  = (unsigned int)g_csroffset[spics->cs];
+      regval  = spi_getreg(spi, offset);
+      regval |= SPI_CSR_CSNAAT; /* Chip Select Not Active After Transfer */
+      regval &= ~SPI_CSR_CSAAT; /* Chip Select Active After Transfer */
+      spi_putreg(spi, regval, offset);
+    }
+  else
+    {
+      offset  = (unsigned int)g_csroffset[spics->cs];
+      regval  = spi_getreg(spi, offset);
+      regval &= ~SPI_CSR_CSNAAT; /* Chip Select Not Active After Transfer */
+      spi_putreg(spi, regval, offset);
+    }
+
+  /* CS does not rise automatically after a transmission, also if the spi runs
+   * out of data (for a long time)
+   */
+
+  if ((features & HWFEAT_FORCE_CS_ACTIVE_AFTER_TRANSFER) != 0)
+    {
+      offset  = (unsigned int)g_csroffset[spics->cs];
+      regval  = spi_getreg(spi, offset);
+      regval &= ~SPI_CSR_CSNAAT; /* Chip Select Not Active After Transfer */
+      regval |= SPI_CSR_CSAAT; /* Chip Select Active After Transfer */
+      spi_putreg(spi, regval, offset);
+    }
+  else
+    {
+      offset  = (unsigned int)g_csroffset[spics->cs];
+      regval  = spi_getreg(spi, offset);
+      regval &= ~SPI_CSR_CSAAT; /* Chip Select Not Active After Transfer */
+      spi_putreg(spi, regval, offset);
+    }
+
+  /* Do not set the LASTXFER-Bit at the last word of the next exchange,
+   * Flag is auto-resetting after the next LASTXFER condition.
+   * (see spi_exchange)
+   */
+
+  if ((features & HWFEAT_ESCAPE_LASTXFER) != 0)
+    {
+      spi->escape_lastxfer = true;
+    }
+  else
+    {
+      spi->escape_lastxfer = false;
+    }
+
+  return ((features & ~HWFEAT_FORCE_CS_CONTROL_MASK) == 0) ? OK : -ENOSYS;
+#else
+  return -ENOSYS;
+#endif
+}
+#endif
+
 /****************************************************************************
  * Name: spi_setmode
  *
@@ -1112,7 +1312,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
   uint32_t regval;
   unsigned int offset;
 
-  spivdbg("cs=%d mode=%d\n", spics->cs, mode);
+  spiinfo("cs=%d mode=%d\n", spics->cs, mode);
 
   /* Has the mode changed? */
 
@@ -1155,7 +1355,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
         }
 
       spi_putreg(spi, regval, offset);
-      spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
+      spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
 
       /* Save the mode so that subsequent re-configurations will be faster */
 
@@ -1185,7 +1385,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
   uint32_t regval;
   unsigned int offset;
 
-  spivdbg("cs=%d nbits=%d\n", spics->cs, nbits);
+  spiinfo("cs=%d nbits=%d\n", spics->cs, nbits);
   DEBUGASSERT(spics && nbits > 7 && nbits < 17);
 
   /* Has the number of bits changed? */
@@ -1200,9 +1400,11 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
       regval |= SPI_CSR_BITS(nbits);
       spi_putreg(spi, regval, offset);
 
-      spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
+      spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
 
-      /* Save the selection so the subsequence re-configurations will be faster */
+      /* Save the selection so the subsequence re-configurations will be
+       * faster.
+       */
 
       spics->nbits = nbits;
     }
@@ -1238,7 +1440,7 @@ static uint16_t spi_send(struct spi_dev_s *dev, uint16_t wd)
   rxbyte = (uint8_t)0;
   spi_exchange(dev, &txbyte, &rxbyte, 1);
 
-  spivdbg("Sent %02x received %02x\n", txbyte, rxbyte);
+  spiinfo("Sent %02x received %02x\n", txbyte, rxbyte);
   return (uint16_t)rxbyte;
 }
 
@@ -1286,7 +1488,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
   uint8_t *rxptr8;
   uint8_t *txptr8;
 
-  spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+  spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
 
   /* Set up PCS bits */
 
@@ -1358,16 +1560,37 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
           data = 0xffff;
         }
 
+      /* SPI_VARSELECT means, that the ChipSelect for each device is set within
+       * the transferred data (SAM_SPI_TDR) instead inside the mode register
+       * (SAM_SPI_MR).
+       * In addition, the LASTXFER flag is also set within the transferred data
+       * (SAM_SPI_TDR) instead inside the control register (SAM_SPI_CR).
+       */
+
+#ifdef CONFIG_SAMV7_SPI_VARSELECT
       /* Set the PCS field in the value written to the TDR */
 
       data |= pcs;
 
       /* Do we need to set the LASTXFER bit in the TDR value too? */
 
-#ifdef CONFIG_SPI_VARSELECT
       if (nwords == 1)
         {
-          data |= SPI_TDR_LASTXFER;
+          if (spi->escape_lastxfer == false)
+            {
+              /* According the data sheet (SAME70 Rev. 2016-01) this LASTXFER
+               * bit has no effect without also setting CSAAT.
+               * (see HWFEAT_FORCE_CS_ACTIVE_AFTER_TRANSFER)
+               */
+
+               data |= SPI_TDR_LASTXFER;
+            }
+          else
+            {
+              /* the escaping should only prevent ONE last-xfer */
+
+              spi->escape_lastxfer = false;
+            }
         }
 #endif
 
@@ -1381,6 +1604,32 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
 
       spi_putreg(spi, data, SAM_SPI_TDR_OFFSET);
 
+#ifndef CONFIG_SAMV7_SPI_VARSELECT
+      /* To de-assert the chip select line at the end of the transfer, the
+       * Last Transfer (LASTXFER) bit in SPI_CR must be set after writing the
+       * last data to transmit into SPI_TDR.
+       */
+
+      if (nwords == 1)
+        {
+          if (spi->escape_lastxfer == false)
+            {
+              /* According the datasheet (SAME70 Rev. 2016-01) this LASTXFER
+               * bit has no effect without also setting CSAAT.
+               * (see HWFEAT_FORCE_CS_ACTIVE_AFTER_TRANSFER)
+               */
+
+              spi_putreg(spi, SPI_CR_LASTXFER, SAM_SPI_CR_OFFSET);
+            }
+          else
+            {
+              /* the escaping should only prevent ONE last-xfer */
+
+              spi->escape_lastxfer = false;
+            }
+        }
+#endif
+
       /* Wait for the read data to be available in the RDR.
        * TODO:  Data transfer rates would be improved using the RX FIFO
        *        (and also DMA)
@@ -1432,7 +1681,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
       return;
     }
 
-  spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+  spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
 
   spics = (struct sam_spics_s *)dev;
   spi = spi_device(spics);
@@ -1549,7 +1798,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
   ret = sam_dmarxsetup(spics->rxdma, regaddr, memaddr, nwords);
   if (ret < 0)
     {
-      dmadbg("ERROR: sam_dmarxsetup failed: %d\n", ret);
+      dmaerr("ERROR: sam_dmarxsetup failed: %d\n", ret);
       return;
     }
 
@@ -1563,7 +1812,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
   ret = sam_dmatxsetup(spics->txdma, regaddr, memaddr, nwords);
   if (ret < 0)
     {
-      dmadbg("ERROR: sam_dmatxsetup failed: %d\n", ret);
+      dmaerr("ERROR: sam_dmatxsetup failed: %d\n", ret);
       return;
     }
 
@@ -1575,7 +1824,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
   ret = sam_dmastart(spics->rxdma, spi_rxcallback, (void *)spics);
   if (ret < 0)
     {
-      dmadbg("ERROR: RX sam_dmastart failed: %d\n", ret);
+      dmaerr("ERROR: RX sam_dmastart failed: %d\n", ret);
       return;
     }
 
@@ -1584,7 +1833,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
   ret = sam_dmastart(spics->txdma, spi_txcallback, (void *)spics);
   if (ret < 0)
     {
-      dmadbg("ERROR: RX sam_dmastart failed: %d\n", ret);
+      dmaerr("ERROR: RX sam_dmastart failed: %d\n", ret);
       sam_dmastop(spics->rxdma);
       return;
     }
@@ -1606,7 +1855,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
                      (wdentry_t)spi_dmatimeout, 1, (uint32_t)spics);
       if (ret != OK)
         {
-           spidbg("ERROR: wd_start failed: %d\n", ret);
+           spierr("ERROR: wd_start failed: %d\n", ret);
         }
 
       /* Wait for the DMA complete */
@@ -1657,7 +1906,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
 
   if (spics->result)
     {
-      spidbg("ERROR: DMA failed with result: %d\n", spics->result);
+      spierr("ERROR: DMA failed with result: %d\n", spics->result);
     }
 }
 #endif /* CONFIG_SAMV7_SPI_DMA */
@@ -1751,7 +2000,7 @@ FAR struct spi_dev_s *sam_spibus_initialize(int port)
 
   /* The support SAM parts have only a single SPI port */
 
-  spivdbg("port: %d csno: %d spino: %d\n", port, csno, spino);
+  spiinfo("port: %d csno: %d spino: %d\n", port, csno, spino);
   DEBUGASSERT(csno >= 0 && csno <= SAM_SPI_NCS);
 
 #if defined(CONFIG_SAMV7_SPI0_MASTER) && defined(CONFIG_SAMV7_SPI1_MASTER)
@@ -1770,7 +2019,7 @@ FAR struct spi_dev_s *sam_spibus_initialize(int port)
   spics = (struct sam_spics_s *)zalloc(sizeof(struct sam_spics_s));
   if (!spics)
     {
-      spidbg("ERROR: Failed to allocate a chip select structure\n");
+      spierr("ERROR: Failed to allocate a chip select structure\n");
       return NULL;
     }
 
@@ -1790,7 +2039,7 @@ FAR struct spi_dev_s *sam_spibus_initialize(int port)
       spics->rxdma = sam_dmachannel(0, 0);
       if (!spics->rxdma)
         {
-          spidbg("ERROR: Failed to allocate the RX DMA channel\n");
+          spierr("ERROR: Failed to allocate the RX DMA channel\n");
           spics->candma = false;
         }
     }
@@ -1800,7 +2049,7 @@ FAR struct spi_dev_s *sam_spibus_initialize(int port)
       spics->txdma = sam_dmachannel(0, 0);
       if (!spics->txdma)
         {
-          spidbg("ERROR: Failed to allocate the TX DMA channel\n");
+          spierr("ERROR: Failed to allocate the TX DMA channel\n");
           sam_dmafree(spics->rxdma);
           spics->rxdma  = NULL;
           spics->candma = false;
@@ -1881,15 +2130,22 @@ FAR struct spi_dev_s *sam_spibus_initialize(int port)
 
       /* Configure the SPI mode register */
 
+      regval = SPI_MR_MSTR | SPI_MR_MODFDIS;
+
 #if defined(CONFIG_SAMV7_SPI_CS_DECODING)
       /* Enable Peripheral Chip Select Decoding? */
 
-      spi_putreg(spi, SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_MR_PCSDEC,
-                 SAM_SPI_MR_OFFSET);
-#else
-      spi_putreg(spi, SPI_MR_MSTR | SPI_MR_MODFDIS, SAM_SPI_MR_OFFSET);
+      regval |= SPI_MR_PCSDEC;
 #endif
 
+# ifdef CONFIG_SAMV7_SPI_VARSELECT
+      /* Enable Variable Peripheral Selection? */
+
+      regval |= SPI_MR_PS;
+#endif
+
+      spi_putreg(spi, regval, SAM_SPI_MR_OFFSET);
+
       /* And enable the SPI */
 
       spi_putreg(spi, SPI_CR_SPIEN, SAM_SPI_CR_OFFSET);
@@ -1905,14 +2161,17 @@ FAR struct spi_dev_s *sam_spibus_initialize(int port)
        */
 
       sem_init(&spi->spisem, 0, 1);
+      spi->escape_lastxfer = false;
       spi->initialized = true;
 
 #ifdef CONFIG_SAMV7_SPI_DMA
       /* Initialize the SPI semaphore that is used to wake up the waiting
-       * thread when the DMA transfer completes.
+       * thread when the DMA transfer completes.  This semaphore is used for
+       * signaling and, hence, should not have priority inheritance enabled.
        */
 
       sem_init(&spics->dmawait, 0, 0);
+      sem_setprotocol(&spics->dmawait, SEM_PRIO_NONE);
 
       /* Create a watchdog time to catch DMA timeouts */
 
@@ -1934,7 +2193,7 @@ FAR struct spi_dev_s *sam_spibus_initialize(int port)
   spi_putreg(spi, regval, offset);
 
   spics->nbits = 8;
-  spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
+  spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
 
   return &spics->spidev;
 }
diff --git a/arch/arm/src/samv7/sam_spi_slave.c b/arch/arm/src/samv7/sam_spi_slave.c
index a210541ce695f19126de993a8660928f42752629..6b68769ab87597d28b969849f5ff333c7366498f 100644
--- a/arch/arm/src/samv7/sam_spi_slave.c
+++ b/arch/arm/src/samv7/sam_spi_slave.c
@@ -74,26 +74,8 @@
 #  define CONFIG_SAMV7_SPI_SLAVE_QSIZE 8
 #endif
 
-/* Debug *******************************************************************/
-/* Check if SPI debug is enabled (non-standard.. no support in
- * include/debug.h
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_SPI
-#endif
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
+#ifndef CONFIG_DEBUG_SPI_INFO
+#  undef CONFIG_SAMV7_SPI_REGDEBUG
 #endif
 
 /****************************************************************************
@@ -153,7 +135,7 @@ static uint32_t spi_getreg(struct sam_spidev_s *priv,
 static void     spi_putreg(struct sam_spidev_s *priv, uint32_t value,
                   unsigned int offset);
 
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_SPI_INFO
 static void     spi_dumpregs(struct sam_spidev_s *priv, const char *msg);
 #else
 # define        spi_dumpregs(priv,msg)
@@ -164,13 +146,7 @@ static void     spi_semtake(struct sam_spidev_s *priv);
 
 /* Interrupt Handling */
 
-static int      spi_interrupt(struct sam_spidev_s *priv);
-#ifdef CONFIG_SAMV7_SPI0_SLAVE
-static int      spi0_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_SAMV7_SPI1_SLAVE
-static int      spi1_interrupt(int irq, void *context);
-#endif
+static int      spi_interrupt(int irq, void *context, FAR void *arg);
 
 /* SPI Helpers */
 
@@ -270,7 +246,7 @@ static bool spi_checkreg(struct sam_spidev_s *priv, bool wr, uint32_t value,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", priv->ntimes);
+          spiinfo("...[Repeats %d times]...\n", priv->ntimes);
         }
 
       /* Save information about the new access */
@@ -303,7 +279,7 @@ static uint32_t spi_getreg(struct sam_spidev_s *priv, unsigned int offset)
 #ifdef CONFIG_SAMV7_SPI_REGDEBUG
   if (spi_checkreg(priv, false, value, address))
     {
-      lldbg("%08x->%08x\n", address, value);
+      spiinfo("%08x->%08x\n", address, value);
     }
 #endif
 
@@ -326,7 +302,7 @@ static void spi_putreg(struct sam_spidev_s *priv, uint32_t value,
 #ifdef CONFIG_SAMV7_SPI_REGDEBUG
   if (spi_checkreg(priv, true, value, address))
     {
-      lldbg("%08x<-%08x\n", address, value);
+      spiinfo("%08x<-%08x\n", address, value);
     }
 #endif
 
@@ -348,20 +324,20 @@ static void spi_putreg(struct sam_spidev_s *priv, uint32_t value,
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_SPI_INFO
 static void spi_dumpregs(struct sam_spidev_s *priv, const char *msg)
 {
-  spivdbg("%s:\n", msg);
-  spivdbg("    MR:%08x   SR:%08x  IMR:%08x\n",
+  spiinfo("%s:\n", msg);
+  spiinfo("    MR:%08x   SR:%08x  IMR:%08x\n",
           getreg32(priv->base + SAM_SPI_MR_OFFSET),
           getreg32(priv->base + SAM_SPI_SR_OFFSET),
           getreg32(priv->base + SAM_SPI_IMR_OFFSET));
-  spivdbg("  CSR0:%08x CSR1:%08x CSR2:%08x CSR3:%08x\n",
+  spiinfo("  CSR0:%08x CSR1:%08x CSR2:%08x CSR3:%08x\n",
           getreg32(priv->base + SAM_SPI_CSR0_OFFSET),
           getreg32(priv->base + SAM_SPI_CSR1_OFFSET),
           getreg32(priv->base + SAM_SPI_CSR2_OFFSET),
           getreg32(priv->base + SAM_SPI_CSR3_OFFSET));
-  spivdbg("  WPCR:%08x WPSR:%08x\n",
+  spiinfo("  WPCR:%08x WPSR:%08x\n",
           getreg32(priv->base + SAM_SPI_WPCR_OFFSET),
           getreg32(priv->base + SAM_SPI_WPSR_OFFSET));
 }
@@ -413,13 +389,16 @@ static void spi_semtake(struct sam_spidev_s *priv)
  *
  ****************************************************************************/
 
-static int spi_interrupt(struct sam_spidev_s *priv)
+static int spi_interrupt(int irq, void *context, FAR void *arg)
 {
+  struct sam_spidev_s *priv = (struct sam_spidev_s *)arg;
   uint32_t sr;
   uint32_t imr;
   uint32_t pending;
   uint32_t regval;
 
+  DEBUGASSERT(priv != NULL);
+
   /* We loop because the TDRE interrupt will probably immediately follow the
    * RDRF interrupt and we might be able to catch it in this handler
    * execution.
@@ -457,14 +436,14 @@ static int spi_interrupt(struct sam_spidev_s *priv)
        * bit.
        */
 
-#ifdef CONFIG_DEBUG_SPI
+#ifdef CONFIG_DEBUG_SPI_ERROR
       /* Check the RX data overflow condition */
 
       if ((pending & SPI_INT_OVRES) != 0)
         {
           /* If debug is enabled, report any overrun errors */
 
-          spidbg("Error: Overrun (OVRES): %08x\n", pending);
+          spierr("ERROR: Overrun (OVRES): %08x\n", pending);
 
           /* OVRES was cleared by the status read. */
         }
@@ -524,14 +503,14 @@ static int spi_interrupt(struct sam_spidev_s *priv)
        * Underrun Error Status Flag (UNDES) is set in the SPI_SR.
        */
 
-#ifdef CONFIG_DEBUG_SPI
+#ifdef CONFIG_DEBUG_SPI_ERROR
       /* Check the TX data underflow condition */
 
       if ((pending & SPI_INT_UNDES) != 0)
         {
           /* If debug is enabled, report any overrun errors */
 
-          spidbg("Error: Underrun (UNDEX): %08x\n", pending);
+          spierr("ERROR: Underrun (UNDEX): %08x\n", pending);
 
           /* UNDES was cleared by the status read. */
         }
@@ -571,48 +550,6 @@ static int spi_interrupt(struct sam_spidev_s *priv)
   return OK;
 }
 
-/****************************************************************************
- * Name: spi0_interrupt
- *
- * Description:
- *   SPI0 interrupt handler
- *
- * Input Parameters:
- *   Standard interrupt input parameters
- *
- * Returned Value:
- *   Standard interrupt return value.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_SAMV7_SPI0_SLAVE
-static int spi0_interrupt(int irq, void *context)
-{
-  return spi_interrupt(&g_spi0_sctrlr);
-}
-#endif
-
-/****************************************************************************
- * Name: spi1_interrupt
- *
- * Description:
- *   SPI1 interrupt handler
- *
- * Input Parameters:
- *   Standard interrupt input parameters
- *
- * Returned Value:
- *   Standard interrupt return value.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_SAMV7_SPI1_SLAVE
-static int spi1_interrupt(int irq, void *context)
-{
-  return spi_interrupt(&g_spi1_sctrlr);
-}
-#endif
-
 /****************************************************************************
  * Name: spi_dequeue
  *
@@ -699,7 +636,7 @@ static void spi_setmode(struct sam_spidev_s *priv, enum spi_smode_e mode)
 {
   uint32_t regval;
 
-  spivdbg("mode=%d\n", mode);
+  spiinfo("mode=%d\n", mode);
 
   /* Has the mode changed? */
 
@@ -741,7 +678,7 @@ static void spi_setmode(struct sam_spidev_s *priv, enum spi_smode_e mode)
         }
 
       spi_putreg(priv, regval, SAM_SPI_CSR0_OFFSET);
-      spivdbg("csr0=%08x\n", regval);
+      spiinfo("csr0=%08x\n", regval);
 
       /* Save the mode so that subsequent re-configurations will be faster */
 
@@ -768,7 +705,7 @@ static void spi_setbits(struct sam_spidev_s *priv, int nbits)
 {
   uint32_t regval;
 
-  spivdbg("nbits=%d\n", nbits);
+  spiinfo("nbits=%d\n", nbits);
   DEBUGASSERT(priv && nbits > 7 && nbits < 17);
 
   /* Has the number of bits changed? */
@@ -782,7 +719,7 @@ static void spi_setbits(struct sam_spidev_s *priv, int nbits)
       regval |= SPI_CSR_BITS(nbits);
       spi_putreg(priv, regval, SAM_SPI_CSR0_OFFSET);
 
-      spivdbg("csr0=%08x\n", regval);
+      spiinfo("csr0=%08x\n", regval);
 
       /* Save the selection so the subsequence re-configurations will be faster */
 
@@ -819,7 +756,7 @@ static void spi_bind(struct spi_sctrlr_s *sctrlr,
   struct sam_spidev_s *priv = (struct sam_spidev_s *)sctrlr;
   uint32_t regval;
 
-  spivdbg("sdev=%p mode=%d nbits=%d\n", sdv, mode, nbits);
+  spiinfo("sdev=%p mode=%d nbits=%d\n", sdv, mode, nbits);
 
   DEBUGASSERT(priv != NULL && priv->sdev == NULL && sdev != NULL);
 
@@ -891,7 +828,7 @@ static void spi_bind(struct spi_sctrlr_s *sctrlr,
    */
 
   regval  = (SPI_INT_RDRF | SPI_INT_NSSR);
-#ifdef CONFIG_DEBUG_SPI
+#ifdef CONFIG_DEBUG_SPI_ERROR
   regval |= SPI_INT_OVRES;
 #endif
 
@@ -921,7 +858,7 @@ static void spi_unbind(struct spi_sctrlr_s *sctrlr)
   struct sam_spidev_s *priv = (struct sam_spidev_s *)sctrlr;
 
   DEBUGASSERT(priv != NULL);
-  spivdbg("Unbinding %p\n", priv->sdev);
+  spiinfo("Unbinding %p\n", priv->sdev);
 
   DEBUGASSERT(priv->sdev != NULL);
 
@@ -978,7 +915,7 @@ static int spi_enqueue(struct spi_sctrlr_s *sctrlr, uint16_t data)
   int next;
   int ret;
 
-  spivdbg("data=%04x\n", data);
+  spiinfo("data=%04x\n", data);
   DEBUGASSERT(priv != NULL && priv->sdev != NULL);
 
   /* Get exclusive access to the SPI device */
@@ -1095,7 +1032,7 @@ static void spi_qflush(struct spi_sctrlr_s *sctrlr)
   struct sam_spidev_s *priv = (struct sam_spidev_s *)sctrlr;
   irqstate_t flags;
 
-  spivdbg("data=%04x\n", data);
+  spiinfo("data=%04x\n", data);
 
   DEBUGASSERT(priv != NULL && priv->sdev != NULL);
 
@@ -1140,7 +1077,7 @@ struct spi_sctrlr_s *sam_spi_slave_initialize(int port)
 
   /* The support SAM parts have only a single SPI port */
 
-  spivdbg("port: %d spino: %d\n", port, spino);
+  spiinfo("port: %d spino: %d\n", port, spino);
 
 #if defined(CONFIG_SAMV7_SPI0_SLAVE) && defined(CONFIG_SAMV7_SPI1_SLAVE)
   DEBUGASSERT(spino >= 0 && spino <= 1);
@@ -1195,9 +1132,8 @@ struct spi_sctrlr_s *sam_spi_slave_initialize(int port)
         {
           /* Set the SPI0 register base address and interrupt information */
 
-          priv->base    = SAM_SPI0_BASE,
-          priv->irq     = SAM_IRQ_SPI0;
-          priv->handler = spi0_interrupt;
+          priv->base = SAM_SPI0_BASE,
+          priv->irq  = SAM_IRQ_SPI0;
 
           /* Enable peripheral clocking to SPI0 */
 
@@ -1218,9 +1154,8 @@ struct spi_sctrlr_s *sam_spi_slave_initialize(int port)
         {
           /* Set the SPI1 register base address and interrupt information */
 
-          priv->base    = SAM_SPI1_BASE,
-          priv->irq     = SAM_IRQ_SPI1;
-          priv->handler = spi1_interrupt;
+          priv->base = SAM_SPI1_BASE,
+          priv->irq  = SAM_IRQ_SPI1;
 
           /* Enable peripheral clocking to SPI1 */
 
@@ -1273,7 +1208,7 @@ struct spi_sctrlr_s *sam_spi_slave_initialize(int port)
 
       /* Attach and enable interrupts at the NVIC */
 
-      DEBUGVERIFY(irq_attach(priv->irq, priv->handler));
+      DEBUGVERIFY(irq_attach(priv->irq, spi_interrupt, priv));
       up_enable_irq(priv->irq);
 
       spi_dumpregs(priv, "After initialization");
@@ -1287,7 +1222,7 @@ struct spi_sctrlr_s *sam_spi_slave_initialize(int port)
   spi_putreg(priv, regval, SAM_SPI_CSR0_OFFSET);
 
   priv->nbits = 8;
-  spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
+  spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
 
   return &priv->sctrlr;
 }
diff --git a/arch/arm/src/samv7/sam_ssc.c b/arch/arm/src/samv7/sam_ssc.c
index 107d120de7a35f462f369aacc0031033b2ad31e4..11ae76c9f07bbaa678d542874ce75fa704c87a41 100644
--- a/arch/arm/src/samv7/sam_ssc.c
+++ b/arch/arm/src/samv7/sam_ssc.c
@@ -91,6 +91,10 @@
 #  define CONFIG_SAMV7_SSC_MAXINFLIGHT 16
 #endif
 
+#ifndef CONFIG_DEBUG_I2S_INFO
+#  undef CONFIG_SAMV7_SSC_REGDEBUG
+#endif
+
 /* Assume no RX/TX support until we learn better */
 
 #undef SSC_HAVE_RX
@@ -366,16 +370,9 @@
 #define DMA_TIMEOUT_TICKS MSEC2TICK(DMA_TIMEOUT_MS)
 
 /* Debug *******************************************************************/
-/* Check if SSC debug is enabled (non-standard.. no support in
- * include/debug.h
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_I2S
-#endif
+/* Check if SSC debug is enabled */
 
-#ifndef CONFIG_DEBUG_I2S
+#ifndef CONFIG_DEBUG_I2S_INFO
 #  undef CONFIG_SAMV7_SSC_DMADEBUG
 #  undef CONFIG_SAMV7_SSC_REGDEBUG
 #  undef CONFIG_SAMV7_SSC_QDEBUG
@@ -386,22 +383,6 @@
 #  undef CONFIG_SAMV7_SSC_DMADEBUG
 #endif
 
-#ifdef CONFIG_DEBUG_I2S
-#  define i2sdbg         dbg
-#  define i2slldbg       lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define i2svdbg      dbg
-#    define i2sllvdbg    lldbg
-#  else
-#    define i2svdbg(x...)
-#  endif
-#else
-#  define i2sdbg(x...)
-#  define i2slldbg(x...)
-#  define i2svdbg(x...)
-#  define i2sllvdbg(x...)
-#endif
-
 #define DMA_INITIAL      0
 #define DMA_AFTER_SETUP  1
 #define DMA_AFTER_START  2
@@ -449,7 +430,7 @@ struct sam_ssc_s
   uintptr_t base;              /* SSC controller register base address */
   sem_t exclsem;               /* Assures mutually exclusive acess to SSC */
   uint8_t datalen;             /* Data width (8, 16, or 32) */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   uint8_t align;               /* Log2 of data width (0, 1, or 3) */
 #endif
   uint8_t pid;                 /* Peripheral ID */
@@ -512,7 +493,7 @@ static inline void ssc_putreg(struct sam_ssc_s *priv, unsigned int offset,
 static inline uintptr_t ssc_regaddr(struct sam_ssc_s *priv,
                   unsigned int offset);
 
-#if defined(CONFIG_DEBUG_I2S) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_I2S_INFO
 static void     scc_dump_regs(struct sam_ssc_s *priv, const char *msg);
 #else
 #  define       scc_dump_regs(s,m)
@@ -697,7 +678,7 @@ static bool ssc_checkreg(struct sam_ssc_s *priv, bool wr, uint32_t regval,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", priv->count);
+          i2sinfo("...[Repeats %d times]...\n", priv->count);
         }
 
       /* Save information about the new access */
@@ -731,7 +712,7 @@ static inline uint32_t ssc_getreg(struct sam_ssc_s *priv,
 #ifdef CONFIG_SAMV7_SSC_REGDEBUG
   if (ssc_checkreg(priv, false, regval, regaddr))
     {
-      lldbg("%08x->%08x\n", regaddr, regval);
+      i2sinfo("%08x->%08x\n", regaddr, regval);
     }
 #endif
 
@@ -754,7 +735,7 @@ static inline void ssc_putreg(struct sam_ssc_s *priv, unsigned int offset,
 #ifdef CONFIG_SAMV7_SSC_REGDEBUG
   if (ssc_checkreg(priv, true, regval, regaddr))
     {
-      lldbg("%08x<-%08x\n", regaddr, regval);
+      i2sinfo("%08x<-%08x\n", regaddr, regval);
     }
 #endif
 
@@ -789,21 +770,21 @@ static inline uintptr_t ssc_regaddr(struct sam_ssc_s *priv, unsigned int offset)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_I2S) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_I2S_INFO
 static void scc_dump_regs(struct sam_ssc_s *priv, const char *msg)
 {
-  i2svdbg("SSC%d: %s\n", priv->sscno, msg);
-  i2svdbg("   CMR:%08x RCMR:%08x RFMR:%08x TCMR:%08x\n",
+  i2sinfo("SSC%d: %s\n", priv->sscno, msg);
+  i2sinfo("   CMR:%08x RCMR:%08x RFMR:%08x TCMR:%08x\n",
           getreg32(priv->base + SAM_SSC_CMR_OFFSET),
           getreg32(priv->base + SAM_SSC_RCMR_OFFSET),
           getreg32(priv->base + SAM_SSC_RFMR_OFFSET),
           getreg32(priv->base + SAM_SSC_TCMR_OFFSET));
-  i2svdbg("  TFMR:%08x RC0R:%08x RC1R:%08x   SR:%08x\n",
+  i2sinfo("  TFMR:%08x RC0R:%08x RC1R:%08x   SR:%08x\n",
           getreg32(priv->base + SAM_SSC_TFMR_OFFSET),
           getreg32(priv->base + SAM_SSC_RC0R_OFFSET),
           getreg32(priv->base + SAM_SSC_RC1R_OFFSET),
           getreg32(priv->base + SAM_SSC_SR_OFFSET));
-  i2svdbg("   IMR:%08x WPMR:%08x WPSR:%08x\n",
+  i2sinfo("   IMR:%08x WPMR:%08x WPSR:%08x\n",
           getreg32(priv->base + SAM_SSC_IMR_OFFSET),
           getreg32(priv->base + SAM_SSC_WPMR_OFFSET),
           getreg32(priv->base + SAM_SSC_WPSR_OFFSET));
@@ -840,12 +821,12 @@ static void ssc_dump_queue(sq_queue_t *queue)
 
       if (!apb)
         {
-          i2sllvdbg("    %p: No buffer\n", bfcontainer);
+          i2sinfo("    %p: No buffer\n", bfcontainer);
         }
       else
         {
-          i2sllvdbg("    %p: buffer=%p nmaxbytes=%d nbytes=%d\n",
-                    bfcontainer, apb, apb->nmaxbytes, apb->nbytes);
+          i2sinfo("    %p: buffer=%p nmaxbytes=%d nbytes=%d\n",
+                  bfcontainer, apb, apb->nmaxbytes, apb->nbytes);
         }
     }
 }
@@ -855,12 +836,12 @@ static void ssc_dump_queues(struct sam_transport_s *xpt, const char *msg)
   irqstate_t flags;
 
   flags = enter_critical_section();
-  i2sllvdbg("%s\n", msg);
-  i2sllvdbg("  Pending:\n");
+  i2sinfo("%s\n", msg);
+  i2sinfo("  Pending:\n");
   ssc_dump_queue(&xpt->pend);
-  i2sllvdbg("  Active:\n");
+  i2sinfo("  Active:\n");
   ssc_dump_queue(&xpt->act);
-  i2sllvdbg("  Done:\n");
+  i2sinfo("  Done:\n");
   ssc_dump_queue(&xpt->done);
   leave_critical_section(flags);
 }
@@ -1083,7 +1064,7 @@ static void ssc_dma_sampleinit(struct sam_ssc_s *priv,
 #if defined(CONFIG_SAMV7_SSC_DMADEBUG) && defined(SSC_HAVE_RX)
 static void ssc_rxdma_sampledone(struct sam_ssc_s *priv, int result)
 {
-  lldbg("result: %d\n", result);
+  i2llsinfo("result: %d\n", result);
 
   /* Sample the final registers */
 
@@ -1148,7 +1129,7 @@ static void ssc_rxdma_sampledone(struct sam_ssc_s *priv, int result)
 #if defined(CONFIG_SAMV7_SSC_DMADEBUG) && defined(SSC_HAVE_TX)
 static void ssc_txdma_sampledone(struct sam_ssc_s *priv, int result)
 {
-  lldbg("result: %d\n", result);
+  i2sinfo("result: %d\n", result);
 
   /* Sample the final registers */
 
@@ -1371,7 +1352,7 @@ static int ssc_rxdma_setup(struct sam_ssc_s *priv)
 
       if (ret < 0)
         {
-          i2slldbg("ERROR: wd_start failed: %d\n", errno);
+          i2serr("ERROR: wd_start failed: %d\n", errno);
         }
     }
 
@@ -1420,7 +1401,7 @@ static void ssc_rx_worker(void *arg)
    * So we have to start the next DMA here.
    */
 
-  i2svdbg("rx.act.head=%p rx.done.head=%p\n",
+  i2sinfo("rx.act.head=%p rx.done.head=%p\n",
           priv->rx.act.head, priv->rx.done.head);
   ssc_dump_rxqueues(priv, "RX worker start");
 
@@ -1559,7 +1540,7 @@ static void ssc_rx_schedule(struct sam_ssc_s *priv, int result)
       ret = work_queue(HPWORK, &priv->rx.work, ssc_rx_worker, priv, 0);
       if (ret != 0)
         {
-          i2slldbg("ERROR: Failed to queue RX work: %d\n", ret);
+          i2serr("ERROR: Failed to queue RX work: %d\n", ret);
         }
     }
 }
@@ -1788,7 +1769,7 @@ static int ssc_txdma_setup(struct sam_ssc_s *priv)
 
       if (ret < 0)
         {
-          i2slldbg("ERROR: wd_start failed: %d\n", errno);
+          i2serr("ERROR: wd_start failed: %d\n", errno);
         }
     }
 
@@ -1836,7 +1817,7 @@ static void ssc_tx_worker(void *arg)
    * So we have to start the next DMA here.
    */
 
-  i2svdbg("tx.act.head=%p tx.done.head=%p\n",
+  i2sinfo("tx.act.head=%p tx.done.head=%p\n",
            priv->tx.act.head, priv->tx.done.head);
   ssc_dump_txqueues(priv, "TX worker start");
 
@@ -1963,7 +1944,7 @@ static void ssc_tx_schedule(struct sam_ssc_s *priv, int result)
       ret = work_queue(HPWORK, &priv->tx.work, ssc_tx_worker, priv, 0);
       if (ret != 0)
         {
-          i2slldbg("ERROR: Failed to queue TX work: %d\n", ret);
+          i2serr("ERROR: Failed to queue TX work: %d\n", ret);
         }
     }
 }
@@ -2036,25 +2017,25 @@ static int ssc_checkwidth(struct sam_ssc_s *priv, int bits)
   switch (bits)
     {
     case 8:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       priv->align = 0;
 #endif
       break;
 
     case 16:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       priv->align = 1;
 #endif
       break;
 
     case 32:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       priv->align = 3;
 #endif
       break;
 
     default:
-      i2sdbg("ERROR: Unsupported or invalid data width: %d\n", bits);
+      i2serr("ERROR: Unsupported or invalid data width: %d\n", bits);
       return (bits < 2 || bits > 32) ? -EINVAL : -ENOSYS;
     }
 
@@ -2132,7 +2113,7 @@ static uint32_t ssc_rxdatawidth(struct i2s_dev_s *dev, int bits)
   ret = ssc_checkwidth(priv, bits);
   if (ret < 0)
     {
-      i2sdbg("ERROR: ssc_checkwidth failed: %d\n", ret);
+      i2serr("ERROR: ssc_checkwidth failed: %d\n", ret);
       return 0;
     }
 
@@ -2141,7 +2122,7 @@ static uint32_t ssc_rxdatawidth(struct i2s_dev_s *dev, int bits)
   ret = ssc_dma_flags(priv, &dmaflags);
   if (ret < 0)
     {
-      i2sdbg("ERROR: ssc_dma_flags failed: %d\n", ret);
+      i2serr("ERROR: ssc_dma_flags failed: %d\n", ret);
       return 0;
     }
 
@@ -2211,7 +2192,7 @@ static int ssc_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
 #endif
 
   DEBUGASSERT(priv && apb && ((uintptr_t)apb->samp & priv->align) == 0);
-  i2svdbg("apb=%p nmaxbytes=%d arg=%p timeout=%d\n",
+  i2sinfo("apb=%p nmaxbytes=%d arg=%p timeout=%d\n",
           apb, apb->nmaxbytes, arg, timeout);
 
   ssc_init_buffer(apb->samp, apb->nmaxbytes);
@@ -2230,7 +2211,7 @@ static int ssc_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
 
   if (!priv->rxenab)
     {
-      i2sdbg("ERROR: SSC%d has no receiver\n", priv->sscno);
+      i2serr("ERROR: SSC%d has no receiver\n", priv->sscno);
       ret = -EAGAIN;
       goto errout_with_exclsem;
     }
@@ -2269,7 +2250,7 @@ errout_with_exclsem:
   return ret;
 
 #else
-  i2sdbg("ERROR: SSC%d has no receiver\n", priv->sscno);
+  i2serr("ERROR: SSC%d has no receiver\n", priv->sscno);
   UNUSED(priv);
   return -ENOSYS;
 #endif
@@ -2343,7 +2324,7 @@ static uint32_t ssc_txdatawidth(struct i2s_dev_s *dev, int bits)
   ret = ssc_checkwidth(priv, bits);
   if (ret < 0)
     {
-      i2sdbg("ERROR: ssc_checkwidth failed: %d\n", ret);
+      i2serr("ERROR: ssc_checkwidth failed: %d\n", ret);
       return 0;
     }
 
@@ -2352,7 +2333,7 @@ static uint32_t ssc_txdatawidth(struct i2s_dev_s *dev, int bits)
   ret = ssc_dma_flags(priv, &dmaflags);
   if (ret < 0)
     {
-      i2sdbg("ERROR: ssc_dma_flags failed: %d\n", ret);
+      i2serr("ERROR: ssc_dma_flags failed: %d\n", ret);
       return 0;
     }
 
@@ -2426,7 +2407,7 @@ static int ssc_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
    */
 
   DEBUGASSERT(priv && apb);
-  i2svdbg("apb=%p nbytes=%d arg=%p timeout=%d\n",
+  i2sinfo("apb=%p nbytes=%d arg=%p timeout=%d\n",
           apb, apb->nbytes - apb->curbyte, arg, timeout);
 
   ssc_dump_buffer("Sending", &apb->samp[apb->curbyte],
@@ -2447,7 +2428,7 @@ static int ssc_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
 
   if (!priv->txenab)
     {
-      i2sdbg("ERROR: SSC%d has no transmitter\n", priv->sscno);
+      i2serr("ERROR: SSC%d has no transmitter\n", priv->sscno);
       ret = -EAGAIN;
       goto errout_with_exclsem;
     }
@@ -2486,7 +2467,7 @@ errout_with_exclsem:
   return ret;
 
 #else
-  i2sdbg("ERROR: SSC%d has no transmitter\n", priv->sscno);
+  i2serr("ERROR: SSC%d has no transmitter\n", priv->sscno);
   UNUSED(priv);
   return -ENOSYS;
 #endif
@@ -2540,7 +2521,7 @@ static int ssc_rx_configure(struct sam_ssc_s *priv)
 
     case SSC_CLKSRC_NONE: /* No clock */
     default:
-      i2sdbg("ERROR:  No receiver clock\n");
+      i2serr("ERROR:  No receiver clock\n");
       return -EINVAL;
     }
 
@@ -2561,7 +2542,7 @@ static int ssc_rx_configure(struct sam_ssc_s *priv)
       break;
 
     default:
-      i2sdbg("ERROR: Invalid clock output selection\n");
+      i2serr("ERROR: Invalid clock output selection\n");
       return -EINVAL;
     }
 
@@ -2665,7 +2646,7 @@ static int ssc_tx_configure(struct sam_ssc_s *priv)
 
     case SSC_CLKSRC_NONE: /* No clock */
     default:
-      i2sdbg("ERROR:  No transmitter clock\n");
+      i2serr("ERROR:  No transmitter clock\n");
       return -EINVAL;
     }
 
@@ -2686,7 +2667,7 @@ static int ssc_tx_configure(struct sam_ssc_s *priv)
       break;
 
     default:
-      i2sdbg("ERROR: Invalid clock output selection\n");
+      i2serr("ERROR: Invalid clock output selection\n");
       return -EINVAL;
     }
 
@@ -2906,7 +2887,7 @@ static void ssc_clocking(struct sam_ssc_s *priv)
 
   sam_enableperiph1(priv->pid);
 
-  i2svdbg("PCSR1=%08x PCR=%08x CMR=%08x\n",
+  i2sinfo("PCSR1=%08x PCR=%08x CMR=%08x\n",
           getreg32(SAM_PMC_PCSR1), regval,
           ssc_getreg(priv, SAM_SSC_CMR_OFFSET));
 }
@@ -2945,7 +2926,7 @@ static int ssc_dma_flags(struct sam_ssc_s *priv, uint32_t *dmaflags)
       break;
 
     default:
-      i2sdbg("ERROR: Unsupported data width: %d\n", priv->datalen);
+      i2serr("ERROR: Unsupported data width: %d\n", priv->datalen);
       return -ENOSYS;
     }
 
@@ -2978,7 +2959,7 @@ static int ssc_dma_allocate(struct sam_ssc_s *priv)
   ret = ssc_dma_flags(priv, &dmaflags);
   if (ret < 0)
     {
-      i2sdbg("ERROR: ssc_dma_flags failed: %d\n", ret);
+      i2serr("ERROR: ssc_dma_flags failed: %d\n", ret);
       return ret;
     }
 
@@ -2992,7 +2973,7 @@ static int ssc_dma_allocate(struct sam_ssc_s *priv)
       priv->rx.dma = sam_dmachannel(0, dmaflags);
       if (!priv->rx.dma)
         {
-          i2sdbg("ERROR: Failed to allocate the RX DMA channel\n");
+          i2serr("ERROR: Failed to allocate the RX DMA channel\n");
           goto errout;
         }
 
@@ -3001,7 +2982,7 @@ static int ssc_dma_allocate(struct sam_ssc_s *priv)
       priv->rx.dog = wd_create();
       if (!priv->rx.dog)
         {
-          i2sdbg("ERROR: Failed to create the RX DMA watchdog\n");
+          i2serr("ERROR: Failed to create the RX DMA watchdog\n");
           goto errout;
         }
     }
@@ -3015,7 +2996,7 @@ static int ssc_dma_allocate(struct sam_ssc_s *priv)
       priv->tx.dma = sam_dmachannel(0, dmaflags);
       if (!priv->tx.dma)
         {
-          i2sdbg("ERROR: Failed to allocate the TX DMA channel\n");
+          i2serr("ERROR: Failed to allocate the TX DMA channel\n");
           goto errout;
         }
 
@@ -3024,7 +3005,7 @@ static int ssc_dma_allocate(struct sam_ssc_s *priv)
       priv->tx.dog = wd_create();
       if (!priv->tx.dog)
         {
-          i2sdbg("ERROR: Failed to create the TX DMA watchdog\n");
+          i2serr("ERROR: Failed to create the TX DMA watchdog\n");
           goto errout;
         }
     }
@@ -3231,7 +3212,7 @@ static void ssc0_configure(struct sam_ssc_s *priv)
 
   priv->base    = SAM_SSC0_BASE;
   priv->datalen = CONFIG_SAMV7_SSC0_DATALEN;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   priv->align   = SAMV7_SSC0_DATAMASK;
 #endif
   priv->pid     = SAM_PID_SSC0;
@@ -3372,7 +3353,7 @@ static void ssc1_configure(struct sam_ssc_s *priv)
 
   priv->base    = SAM_SSC1_BASE;
   priv->datalen = CONFIG_SAMV7_SSC1_DATALEN;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   priv->align   = SAMV7_SSC1_DATAMASK;
 #endif
   priv->pid     = SAM_PID_SSC1;
@@ -3405,7 +3386,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port)
 
   /* The support SAM parts have only a single SSC port */
 
-  i2svdbg("port: %d\n", port);
+  i2sinfo("port: %d\n", port);
 
   /* Allocate a new state structure for this chip select.  NOTE that there
    * is no protection if the same chip select is used in two different
@@ -3415,7 +3396,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port)
   priv = (struct sam_ssc_s *)zalloc(sizeof(struct sam_ssc_s));
   if (!priv)
     {
-      i2sdbg("ERROR: Failed to allocate a chip select structure\n");
+      i2serr("ERROR: Failed to allocate a chip select structure\n");
       return NULL;
     }
 
@@ -3449,7 +3430,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port)
   else
 #endif /* CONFIG_SAMV7_SSC1 */
     {
-      i2sdbg("ERROR:  Unsupported I2S port: %d\n", port);
+      i2serr("ERROR:  Unsupported I2S port: %d\n", port);
       goto errout_with_alloc;
     }
 
@@ -3470,7 +3451,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port)
   ret = ssc_rx_configure(priv);
   if (ret < 0)
     {
-      i2sdbg("ERROR: Failed to configure the receiver: %d\n", ret);
+      i2serr("ERROR: Failed to configure the receiver: %d\n", ret);
       goto errout_with_clocking;
     }
 
@@ -3479,7 +3460,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port)
   ret = ssc_tx_configure(priv);
   if (ret < 0)
     {
-      i2sdbg("ERROR: Failed to configure the transmitter: %d\n", ret);
+      i2serr("ERROR: Failed to configure the transmitter: %d\n", ret);
       goto errout_with_clocking;
     }
 
diff --git a/arch/arm/src/samv7/sam_tc.c b/arch/arm/src/samv7/sam_tc.c
index 03569857765ab3d2f74d711f04e53c02384a0940..4b9303fd5348c23ef2bf0aeda1a40c858d3de51e 100644
--- a/arch/arm/src/samv7/sam_tc.c
+++ b/arch/arm/src/samv7/sam_tc.c
@@ -77,6 +77,10 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
+#ifndef CONFIG_DEBUG_TIMER_INFO
+#  undef CONFIG_SAMV7_TC_REGDEBUG
+#endif
+
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -182,27 +186,27 @@ static inline void sam_chan_putreg(struct sam_chan_s *chan,
 static int sam_tc_interrupt(struct sam_tc_s *tc, struct sam_chan_s *chan);
 
 #ifdef CONFIG_SAMV7_TC0
-static int sam_tc0_interrupt(int irq, void *context);
-static int sam_tc1_interrupt(int irq, void *context);
-static int sam_tc2_interrupt(int irq, void *context);
+static int sam_tc0_interrupt(int irq, void *context, FAR void *arg);
+static int sam_tc1_interrupt(int irq, void *context, FAR void *arg);
+static int sam_tc2_interrupt(int irq, void *context, FAR void *arg);
 #endif
 
 #ifdef CONFIG_SAMV7_TC1
-static int sam_tc3_interrupt(int irq, void *context);
-static int sam_tc4_interrupt(int irq, void *context);
-static int sam_tc5_interrupt(int irq, void *context);
+static int sam_tc3_interrupt(int irq, void *context, FAR void *arg);
+static int sam_tc4_interrupt(int irq, void *context, FAR void *arg);
+static int sam_tc5_interrupt(int irq, void *context, FAR void *arg);
 #endif
 
 #ifdef CONFIG_SAMV7_TC2
-static int sam_tc6_interrupt(int irq, void *context);
-static int sam_tc7_interrupt(int irq, void *context);
-static int sam_tc8_interrupt(int irq, void *context);
+static int sam_tc6_interrupt(int irq, void *context, FAR void *arg);
+static int sam_tc7_interrupt(int irq, void *context, FAR void *arg);
+static int sam_tc8_interrupt(int irq, void *context, FAR void *arg);
 #endif
 
 #ifdef CONFIG_SAMV7_TC3
-static int sam_tc9_interrupt(int irq, void *context);
-static int sam_tc10_interrupt(int irq, void *context);
-static int sam_tc11_interrupt(int irq, void *context);
+static int sam_tc9_interrupt(int irq, void *context, FAR void *arg);
+static int sam_tc10_interrupt(int irq, void *context, FAR void *arg);
+static int sam_tc11_interrupt(int irq, void *context, FAR void *arg);
 #endif
 
 /* Initialization ***********************************************************/
@@ -643,19 +647,19 @@ static void sam_regdump(struct sam_chan_s *chan, const char *msg)
   uintptr_t base;
 
   base = tc->base;
-  lldbg("TC%d [%08x]: %s\n", tc->tc, (int)base, msg);
-  lldbg("  BMR: %08x QIMR: %08x QISR: %08x WPMR: %08x\n",
-        getreg32(base+SAM_TC_BMR_OFFSET), getreg32(base+SAM_TC_QIMR_OFFSET),
-        getreg32(base+SAM_TC_QISR_OFFSET), getreg32(base+SAM_TC_WPMR_OFFSET));
+  tmrinfo("TC%d [%08x]: %s\n", tc->tc, (int)base, msg);
+  tmrinfo("  BMR: %08x QIMR: %08x QISR: %08x WPMR: %08x\n",
+          getreg32(base+SAM_TC_BMR_OFFSET), getreg32(base+SAM_TC_QIMR_OFFSET),
+          getreg32(base+SAM_TC_QISR_OFFSET), getreg32(base+SAM_TC_WPMR_OFFSET));
 
   base = chan->base;
-  lldbg("TC%d Channel %d [%08x]: %s\n", tc->tc, chan->chan, (int)base, msg);
-  lldbg("  CMR: %08x SSMR: %08x  RAB: %08x   CV: %08x\n",
-        getreg32(base+SAM_TC_CMR_OFFSET), getreg32(base+SAM_TC_SMMR_OFFSET),
-        getreg32(base+SAM_TC_RAB_OFFSET), getreg32(base+SAM_TC_CV_OFFSET));
-  lldbg("   RA: %08x   RB: %08x   RC: %08x  IMR: %08x\n",
-        getreg32(base+SAM_TC_RA_OFFSET), getreg32(base+SAM_TC_RB_OFFSET),
-        getreg32(base+SAM_TC_RC_OFFSET), getreg32(base+SAM_TC_IMR_OFFSET));
+  tmrinfo("TC%d Channel %d [%08x]: %s\n", tc->tc, chan->chan, (int)base, msg);
+  tmrinfo("  CMR: %08x SSMR: %08x  RAB: %08x   CV: %08x\n",
+          getreg32(base+SAM_TC_CMR_OFFSET), getreg32(base+SAM_TC_SMMR_OFFSET),
+          getreg32(base+SAM_TC_RAB_OFFSET), getreg32(base+SAM_TC_CV_OFFSET));
+  tmrinfo("   RA: %08x   RB: %08x   RC: %08x  IMR: %08x\n",
+          getreg32(base+SAM_TC_RA_OFFSET), getreg32(base+SAM_TC_RB_OFFSET),
+          getreg32(base+SAM_TC_RC_OFFSET), getreg32(base+SAM_TC_IMR_OFFSET));
 }
 #endif
 
@@ -698,7 +702,7 @@ static bool sam_checkreg(struct sam_tc_s *tc, bool wr, uint32_t regaddr,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", tc->ntimes);
+          tmrinfo("...[Repeats %d times]...\n", tc->ntimes);
         }
 
       /* Save information about the new access */
@@ -733,7 +737,7 @@ static inline uint32_t sam_tc_getreg(struct sam_chan_s *chan,
 #ifdef CONFIG_SAMV7_TC_REGDEBUG
   if (sam_checkreg(tc, false, regaddr, regval))
     {
-      lldbg("%08x->%08x\n", regaddr, regval);
+      tmrinfo("%08x->%08x\n", regaddr, regval);
     }
 #endif
 
@@ -757,7 +761,7 @@ static inline void sam_tc_putreg(struct sam_chan_s *chan, uint32_t regval,
 #ifdef CONFIG_SAMV7_TC_REGDEBUG
   if (sam_checkreg(tc, true, regaddr, regval))
     {
-      lldbg("%08x<-%08x\n", regaddr, regval);
+      tmrinfo("%08x<-%08x\n", regaddr, regval);
     }
 #endif
 
@@ -781,7 +785,7 @@ static inline uint32_t sam_chan_getreg(struct sam_chan_s *chan,
 #ifdef CONFIG_SAMV7_TC_REGDEBUG
   if (sam_checkreg(chan->tc, false, regaddr, regval))
     {
-      lldbg("%08x->%08x\n", regaddr, regval);
+      tmrinfo("%08x->%08x\n", regaddr, regval);
     }
 #endif
 
@@ -804,7 +808,7 @@ static inline void sam_chan_putreg(struct sam_chan_s *chan, unsigned int offset,
 #ifdef CONFIG_SAMV7_TC_REGDEBUG
   if (sam_checkreg(chan->tc, true, regaddr, regval))
     {
-      lldbg("%08x<-%08x\n", regaddr, regval);
+      tmrinfo("%08x<-%08x\n", regaddr, regval);
     }
 #endif
 
@@ -841,8 +845,8 @@ static int sam_tc_interrupt(struct sam_tc_s *tc, struct sam_chan_s *chan)
   imr     = sam_chan_getreg(chan, SAM_TC_IMR_OFFSET);
   pending = sr & imr;
 
-  tcllvdbg("TC%d Channel %d: pending=%08lx\n",
-           tc->tc, chan->chan, (unsigned long)pending);
+  tmrinfo("TC%d Channel %d: pending=%08lx\n",
+          tc->tc, chan->chan, (unsigned long)pending);
 
   /* Are there any pending interrupts for this channel? */
 
@@ -889,68 +893,68 @@ static int sam_tc_interrupt(struct sam_tc_s *tc, struct sam_chan_s *chan)
  ****************************************************************************/
 
 #ifdef CONFIG_SAMV7_TC0
-static int sam_tc0_interrupt(int irq, void *context)
+static int sam_tc0_interrupt(int irq, void *context, FAR void *arg)
 {
   return sam_tc_interrupt(&g_tc012, &g_tc012.channel[0]);
 }
 
-static int sam_tc1_interrupt(int irq, void *context)
+static int sam_tc1_interrupt(int irq, void *context, FAR void *arg)
 {
   return sam_tc_interrupt(&g_tc012, &g_tc012.channel[1]);
 }
 
-static int sam_tc2_interrupt(int irq, void *context)
+static int sam_tc2_interrupt(int irq, void *context, FAR void *arg)
 {
   return sam_tc_interrupt(&g_tc012, &g_tc012.channel[2]);
 }
 #endif
 
 #ifdef CONFIG_SAMV7_TC1
-static int sam_tc3_interrupt(int irq, void *context)
+static int sam_tc3_interrupt(int irq, void *context, FAR void *arg)
 {
   return sam_tc_interrupt(&g_tc345, &g_tc345.channel[0]);
 }
 
-static int sam_tc4_interrupt(int irq, void *context)
+static int sam_tc4_interrupt(int irq, void *context, FAR void *arg)
 {
   return sam_tc_interrupt(&g_tc345, &g_tc345.channel[1]);
 }
 
-static int sam_tc5_interrupt(int irq, void *context)
+static int sam_tc5_interrupt(int irq, void *context, FAR void *arg)
 {
   return sam_tc_interrupt(&g_tc345, &g_tc345.channel[2]);
 }
 #endif
 
 #ifdef CONFIG_SAMV7_TC2
-static int sam_tc6_interrupt(int irq, void *context)
+static int sam_tc6_interrupt(int irq, void *context, FAR void *arg)
 {
   return sam_tc_interrupt(&g_tc678, &g_tc678.channel[0]);
 }
 
-static int sam_tc7_interrupt(int irq, void *context)
+static int sam_tc7_interrupt(int irq, void *context, FAR void *arg)
 {
   return sam_tc_interrupt(&g_tc678, &g_tc678.channel[1]);
 }
 
-static int sam_tc8_interrupt(int irq, void *context)
+static int sam_tc8_interrupt(int irq, void *context, FAR void *arg)
 {
   return sam_tc_interrupt(&g_tc678, &g_tc678.channel[2]);
 }
 #endif
 
 #ifdef CONFIG_SAMV7_TC3
-static int sam_tc9_interrupt(int irq, void *context)
+static int sam_tc9_interrupt(int irq, void *context, FAR void *arg)
 {
   return sam_tc_interrupt(&g_tc901, &g_tc901.channel[0]);
 }
 
-static int sam_tc10_interrupt(int irq, void *context)
+static int sam_tc10_interrupt(int irq, void *context, FAR void *arg)
 {
   return sam_tc_interrupt(&g_tc901, &g_tc901.channel[1]);
 }
 
-static int sam_tc11_interrupt(int irq, void *context)
+static int sam_tc11_interrupt(int irq, void *context, FAR void *arg)
 {
   return sam_tc_interrupt(&g_tc901, &g_tc901.channel[2]);
 }
@@ -1046,7 +1050,7 @@ static int sam_tc_mcksrc(uint32_t frequency, uint32_t *tcclks,
   uint32_t fnext;
   int ndx = 0;
 
-  tcvdbg("frequency=%d\n", frequency);
+  tmrinfo("frequency=%d\n", frequency);
 
   /* Satisfy lower bound.  That is, the value of the divider such that:
    *
@@ -1066,7 +1070,7 @@ static int sam_tc_mcksrc(uint32_t frequency, uint32_t *tcclks,
     {
       /* If no divisor can be found, return -ERANGE */
 
-      tcdbg("Lower bound search failed\n");
+      tmrerr("ERROR: Lower bound search failed\n");
       return -ERANGE;
     }
 
@@ -1169,7 +1173,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
     {
       /* Timer/counter is not invalid or not enabled */
 
-      tcdbg("ERROR: Bad channel number: %d\n", channel);
+      tmrerr("ERROR: Bad channel number: %d\n", channel);
       return NULL;
     }
 
@@ -1225,7 +1229,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
     {
       /* Yes.. return a failure */
 
-      tcdbg("Channel %d is in-use\n", channel);
+      tmrerr("ERROR: Channel %d is in-use\n", channel);
       sam_givesem(tc);
       return NULL;
     }
@@ -1275,7 +1279,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
 
   /* Attach the timer interrupt handler and enable the timer interrupts */
 
-  (void)irq_attach(chconfig->irq, chconfig->handler);
+  (void)irq_attach(chconfig->irq, chconfig->handler, NULL);
   up_enable_irq(chconfig->irq);
 
   /* Mark the channel "inuse" */
@@ -1318,7 +1322,7 @@ TC_HANDLE sam_tc_allocate(int channel, int mode)
    * access to the requested channel.
    */
 
-  tcvdbg("channel=%d mode=%08x\n", channel, mode);
+  tmrinfo("channel=%d mode=%08x\n", channel, mode);
 
   chan = sam_tc_initialize(channel);
   if (chan)
@@ -1344,7 +1348,7 @@ TC_HANDLE sam_tc_allocate(int channel, int mode)
 
   /* Return an opaque reference to the channel */
 
-  tcvdbg("Returning %p\n", chan);
+  tmrinfo("Returning %p\n", chan);
   return (TC_HANDLE)chan;
 }
 
@@ -1366,7 +1370,7 @@ void sam_tc_free(TC_HANDLE handle)
 {
   struct sam_chan_s *chan = (struct sam_chan_s *)handle;
 
-  tcvdbg("Freeing %p channel=%d inuse=%d\n", chan, chan->chan, chan->inuse);
+  tmrinfo("Freeing %p channel=%d inuse=%d\n", chan, chan->chan, chan->inuse);
   DEBUGASSERT(chan && chan->inuse);
 
   /* Make sure that interrupts are detached and disabled and that the channel
@@ -1399,7 +1403,7 @@ void sam_tc_start(TC_HANDLE handle)
 {
   struct sam_chan_s *chan = (struct sam_chan_s *)handle;
 
-  tcvdbg("Starting channel %d inuse=%d\n", chan->chan, chan->inuse);
+  tmrinfo("Starting channel %d inuse=%d\n", chan->chan, chan->inuse);
   DEBUGASSERT(chan && chan->inuse);
 
   /* Read the SR to clear any pending interrupts on this channel */
@@ -1431,7 +1435,7 @@ void sam_tc_stop(TC_HANDLE handle)
 {
   struct sam_chan_s *chan = (struct sam_chan_s *)handle;
 
-  tcvdbg("Stopping channel %d inuse=%d\n", chan->chan, chan->inuse);
+  tmrinfo("Stopping channel %d inuse=%d\n", chan->chan, chan->inuse);
   DEBUGASSERT(chan && chan->inuse);
 
   sam_chan_putreg(chan, SAM_TC_CCR_OFFSET, TC_CCR_CLKDIS);
@@ -1538,8 +1542,8 @@ void sam_tc_setregister(TC_HANDLE handle, int regid, uint32_t regval)
 
   DEBUGASSERT(chan && regid < TC_NREGISTERS);
 
-  tcvdbg("Channel %d: Set register RC%d to %08lx\n",
-         chan->chan, regid, (unsigned long)regval);
+  tmrinfo("Channel %d: Set register RC%d to %08lx\n",
+          chan->chan, regid, (unsigned long)regval);
 
   sam_chan_putreg(chan, g_regoffset[regid], regval);
   sam_regdump(chan, "Set register");
@@ -1717,7 +1721,7 @@ int sam_tc_clockselect(uint32_t frequency, uint32_t *tcclks,
 
           if (actual)
             {
-              tcvdbg("return actual=%lu\n", (unsigned long)fselect);
+              tmrinfo("return actual=%lu\n", (unsigned long)fselect);
               *actual = pck6_actual;
             }
 
@@ -1725,7 +1729,7 @@ int sam_tc_clockselect(uint32_t frequency, uint32_t *tcclks,
 
           if (tcclks)
             {
-              tcvdbg("return tcclks=%08lx\n", (unsigned long)TC_CMR_TCCLKS_PCK6);
+              tmrinfo("return tcclks=%08lx\n", (unsigned long)TC_CMR_TCCLKS_PCK6);
               *tcclks = TC_CMR_TCCLKS_PCK6;
             }
 
@@ -1739,7 +1743,7 @@ int sam_tc_clockselect(uint32_t frequency, uint32_t *tcclks,
 
   if (actual)
     {
-      tcvdbg("return actual=%lu\n", (unsigned long)mck_actual);
+      tmrinfo("return actual=%lu\n", (unsigned long)mck_actual);
       *actual = mck_actual;
     }
 
@@ -1747,7 +1751,7 @@ int sam_tc_clockselect(uint32_t frequency, uint32_t *tcclks,
 
   if (tcclks)
     {
-      tcvdbg("return tcclks=%08lx\n", (unsigned long)mck_tcclks);
+      tmrinfo("return tcclks=%08lx\n", (unsigned long)mck_tcclks);
       *tcclks = mck_tcclks;
     }
 
diff --git a/arch/arm/src/samv7/sam_tc.h b/arch/arm/src/samv7/sam_tc.h
index 5dda45ece993f7e0f17d4b7ea323ee55b701c5b3..d62ac212520d39e890db7bf6b5d3f1fcbae31ff2 100644
--- a/arch/arm/src/samv7/sam_tc.h
+++ b/arch/arm/src/samv7/sam_tc.h
@@ -75,8 +75,7 @@
 
 /* Timer debug is enabled if any timer client is enabled */
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_ANALOG
+#ifndef CONFIG_DEBUG_TIMER_INFO
 #  undef CONFIG_SAMV7_TC_REGDEBUG
 #endif
 
@@ -84,20 +83,6 @@
 #  define CONFIG_SAMV7_TC_DEBUG 1
 #endif
 
-/* Timer/counter debug output */
-
-#ifdef CONFIG_SAMV7_TC_DEBUG
-#  define tcdbg    dbg
-#  define tcvdbg   vdbg
-#  define tclldbg  lldbg
-#  define tcllvdbg llvdbg
-#else
-#  define tcdbg(x...)
-#  define tcvdbg(x...)
-#  define tclldbg(x...)
-#  define tcllvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Types
  ****************************************************************************/
diff --git a/arch/arm/src/samv7/sam_tickless.c b/arch/arm/src/samv7/sam_tickless.c
index 3d1a7ad95ac40d32986c5593dfb1d1c37715ab9b..1cda5dcc73dd4009065b75dc2d8d939ee4354482 100644
--- a/arch/arm/src/samv7/sam_tickless.c
+++ b/arch/arm/src/samv7/sam_tickless.c
@@ -39,7 +39,7 @@
  * is suppressed and the platform specific code is expected to provide the
  * following custom functions.
  *
- *   void up_timer_initialize(void): Initializes the timer facilities.  Called
+ *   void arm_timer_initialize(void): Initializes the timer facilities.  Called
  *     early in the initialization sequence (by up_intialize()).
  *   int up_timer_gettime(FAR struct timespec *ts):  Returns the current
  *     time from the platform specific time source.
@@ -221,7 +221,7 @@ static struct sam_tickless_s g_tickless;
 
 static void sam_oneshot_handler(void *arg)
 {
-  tcllvdbg("Expired...\n");
+  tmrinfo("Expired...\n");
   sched_timer_expiration();
 }
 
@@ -230,7 +230,7 @@ static void sam_oneshot_handler(void *arg)
  ****************************************************************************/
 
 /****************************************************************************
- * Name: up_timer_initialize
+ * Name: arm_timer_initialize
  *
  * Description:
  *   Initializes all platform-specific timer facilities.  This function is
@@ -254,7 +254,7 @@ static void sam_oneshot_handler(void *arg)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   int ret;
 
@@ -265,7 +265,7 @@ void up_timer_initialize(void)
                                CONFIG_USEC_PER_TICK);
   if (ret < 0)
     {
-      tclldbg("ERROR: sam_oneshot_initialize failed\n");
+      tmrerr("ERROR: sam_oneshot_initialize failed\n");
       PANIC();
     }
 
@@ -278,7 +278,7 @@ void up_timer_initialize(void)
                                CONFIG_USEC_PER_TICK);
   if (ret < 0)
     {
-      tclldbg("ERROR: sam_freerun_initialize failed\n");
+      tmrerr("ERROR: sam_freerun_initialize failed\n");
       PANIC();
     }
 
@@ -290,7 +290,7 @@ void up_timer_initialize(void)
  *
  * Description:
  *   Return the elapsed time since power-up (or, more correctly, since
- *   up_timer_initialize() was called).  This function is functionally
+ *   arm_timer_initialize() was called).  This function is functionally
  *   equivalent to:
  *
  *      int clock_gettime(clockid_t clockid, FAR struct timespec *ts);
diff --git a/arch/arm/src/samv7/sam_timerisr.c b/arch/arm/src/samv7/sam_timerisr.c
index 9e167aeae708cbec6b41e45b91458c1bae7d3c10..751878d984313a038f7174fe1eedc50910b621e6 100644
--- a/arch/arm/src/samv7/sam_timerisr.c
+++ b/arch/arm/src/samv7/sam_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/samv7/sam_timerisr.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -86,19 +86,11 @@
 #endif
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  sam_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -106,7 +98,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int sam_timerisr(int irq, uint32_t *regs, void *arg)
 {
   /* Process timer interrupt */
 
@@ -115,7 +107,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize the timer
@@ -123,7 +119,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t regval;
 
@@ -134,7 +130,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(SAM_IRQ_SYSTICK, (xcpt_t)up_timerisr);
+  (void)irq_attach(SAM_IRQ_SYSTICK, (xcpt_t)sam_timerisr, NULL);
 
   /* Enable SysTick interrupts (no divide-by-8) */
 
diff --git a/arch/arm/src/samv7/sam_trng.c b/arch/arm/src/samv7/sam_trng.c
index 3a76b924e1fac122c4a213f013aabdaaabe02729..e8eae34f997c9dfd06f3ac4378b9cf4afddd9a5f 100644
--- a/arch/arm/src/samv7/sam_trng.c
+++ b/arch/arm/src/samv7/sam_trng.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/samv7/sam_trng.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Derives from the SAMA5D3 TRNG Nuttx driver which, in turn, derives, in
@@ -53,6 +53,9 @@
 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 #include "up_arch.h"
 #include "up_internal.h"
@@ -60,13 +63,16 @@
 #include "sam_periphclks.h"
 #include "sam_trng.h"
 
+#if defined(CONFIG_SAMV7_TRNG)
+#if defined(CONFIG_DEV_RANDOM) || defined(CONFIG_DEV_URANDOM_ARCH)
+
 /****************************************************************************
  * Private Function Prototypes
  ****************************************************************************/
 
 /* Interrupts */
 
-static int sam_interrupt(int irq, void *context);
+static int sam_interrupt(int irq, void *context, FAR void *arg);
 
 /* Character driver methods */
 
@@ -122,7 +128,7 @@ static const struct file_operations g_trngops =
  *
  ****************************************************************************/
 
-static int sam_interrupt(int irq, void *context)
+static int sam_interrupt(int irq, void *context, FAR void *arg)
 {
   uint32_t odata;
 
@@ -244,7 +250,7 @@ static ssize_t sam_read(struct file *filep, char *buffer, size_t buflen)
   ssize_t retval;
   int ret;
 
-  fvdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+  finfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
 
   /* Get exclusive access to the TRNG harware */
 
@@ -284,7 +290,7 @@ static ssize_t sam_read(struct file *filep, char *buffer, size_t buflen)
     {
       ret = sem_wait(&g_trngdev.waitsem);
 
-      fvdbg("Awakened: nsamples=%d maxsamples=%d ret=%d\n",
+      finfo("Awakened: nsamples=%d maxsamples=%d ret=%d\n",
             g_trngdev.nsamples, g_trngdev.maxsamples, ret);
 
       if (ret < 0)
@@ -321,19 +327,15 @@ errout:
 
   sem_post(&g_trngdev.exclsem);
 
-  fvdbg("Return %d\n", (int)retval);
+  finfo("Return %d\n", (int)retval);
   return retval;
 }
 
 /****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_rnginitialize
+ * Name: sam_rng_initialize
  *
  * Description:
- *   Initialize the TRNG hardware and register the /dev/randome driver.
+ *   Initialize the TRNG hardware.
  *
  * Input Parameters:
  *   None
@@ -343,28 +345,38 @@ errout:
  *
  ****************************************************************************/
 
-void up_rnginitialize(void)
+static int sam_rng_initialize(void)
 {
   int ret;
 
-  fvdbg("Initializing TRNG hardware\n");
+  finfo("Initializing TRNG hardware\n");
 
   /* Initialize the device structure */
 
   memset(&g_trngdev, 0, sizeof(struct trng_dev_s));
+
+  /* Initialize semaphores */
+
   sem_init(&g_trngdev.exclsem, 0, 1);
   sem_init(&g_trngdev.waitsem, 0, 0);
 
+  /* The waitsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&g_trngdev.waitsem, SEM_PRIO_NONE);
+
   /* Enable clocking to the TRNG */
 
   sam_trng_enableclk();
 
   /* Initialize the TRNG interrupt */
 
-  if (irq_attach(SAM_IRQ_TRNG, sam_interrupt))
+  ret = irq_attach(SAM_IRQ_TRNG, sam_interrupt, NULL);
+  if (ret < 0)
     {
-      fdbg("ERROR: Failed to attach to IRQ%d\n", SAM_IRQ_TRNG);
-      return;
+      ferr("ERROR: Failed to attach to IRQ%d\n", SAM_IRQ_TRNG);
+      return ret;
     }
 
   /* Disable the interrupts at the TRNG */
@@ -375,16 +387,80 @@ void up_rnginitialize(void)
 
   putreg32(TRNG_CR_DISABLE | TRNG_CR_KEY, SAM_TRNG_CR);
 
-  /* Register the character driver */
+  /* Enable the TRNG interrupt at the AIC */
+
+  up_enable_irq(SAM_IRQ_TRNG);
+  return OK;
+}
 
-  ret = register_driver("/dev/random", &g_trngops, 0644, NULL);
-  if (ret < 0)
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: devrandom_register
+ *
+ * Description:
+ *   Initialize the TRNG hardware and register the /dev/random driver.
+ *   Must be called BEFORE devurandom_register.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEV_RANDOM
+void devrandom_register(void)
+{
+  int ret;
+
+  ret = sam_rng_initialize();
+  if (ret >= 0)
     {
-      fdbg("ERROR: Failed to register /dev/random\n");
-      return;
+      ret = register_driver("/dev/random", &g_trngops, 0644, NULL);
+      if (ret < 0)
+        {
+          ferr("ERROR: Failed to register /dev/random\n");
+        }
     }
+}
+#endif
 
-  /* Enable the TRNG interrupt at the AIC */
+/****************************************************************************
+ * Name: devurandom_register
+ *
+ * Description:
+ *   Register /dev/urandom
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
 
-  up_enable_irq(SAM_IRQ_TRNG);
+#ifdef CONFIG_DEV_URANDOM_ARCH
+void devurandom_register(void)
+{
+  int ret;
+
+#ifndef CONFIG_DEV_RANDOM
+  ret = sam_rng_initialize();
+  if (ret >= 0)
+#endif
+    {
+      ret = register_driver("/dev/urandom", &g_trngops, 0644, NULL);
+      if (ret < 0)
+        {
+          ferr("ERROR: Failed to register /dev/urandom\n");
+        }
+    }
 }
+#endif
+
+#endif /* CONFIG_DEV_RANDOM || CONFIG_DEV_URANDOM_ARCH */
+#endif /* CONFIG_SAMV7_TRNG */
diff --git a/arch/arm/src/samv7/sam_twihs.c b/arch/arm/src/samv7/sam_twihs.c
index fa5a8b2a525665ec7b354eb8b56781c3f66c5e2b..4cbd19d396532879fcfe5af81b9835f4de9d6e01 100644
--- a/arch/arm/src/samv7/sam_twihs.c
+++ b/arch/arm/src/samv7/sam_twihs.c
@@ -57,6 +57,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -91,6 +92,10 @@
 #  define CONFIG_SAMV7_TWIHS2_FREQUENCY 100000
 #endif
 
+#ifndef CONFIG_DEBUG_I2C_INFO
+#  undef CONFIG_SAMV7_TWIHSHS_REGDEBUG
+#endif
+
 /* Driver internal definitions *************************************************/
 /* If verbose I2C debug output is enable, then allow more time before we declare
  * a timeout.  The debug output from twi_interrupt will really slow things down!
@@ -99,7 +104,7 @@
  * to transfer on byte.  So these define a "long" timeout.
  */
 
-#if defined(CONFIG_DEBUG_I2C) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_I2C_INFO
 #  define TWIHS_TIMEOUT_MSPB (50)  /* 50 msec/byte */
 #else
 #  define TWIHS_TIMEOUT_MSPB (5)   /* 5 msec/byte */
@@ -112,28 +117,13 @@
 
 #define TWIHS_MAX_FREQUENCY 66000000   /* Maximum TWIHS frequency */
 
-/* Macros to convert a I2C pin to a PIO open-drain output */
-
-#define I2C_INPUT       (PIO_INPUT | PIO_CFG_PULLUP)
-#define I2C_OUTPUT      (PIO_OUTPUT | PIO_CFG_OPENDRAIN | PIO_OUTPUT_SET)
+/* Macros to convert a I2C pin to a GPIO open-drain output */
 
-#define MKI2C_INPUT(p)  (((p) & (PIO_PORT_MASK | PIO_PIN_MASK)) | I2C_INPUT)
-#define MKI2C_OUTPUT(p) (((p) & (PIO_PORT_MASK | PIO_PIN_MASK)) | I2C_OUTPUT)
+#define I2C_INPUT       (GPIO_INPUT | GPIO_CFG_PULLUP)
+#define I2C_OUTPUT      (GPIO_OUTPUT | GPIO_CFG_OPENDRAIN | GPIO_OUTPUT_SET)
 
-/* Debug ***********************************************************************/
-/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
-
-#ifdef CONFIG_DEBUG_I2C
-#  define i2cdbg    dbg
-#  define i2cvdbg   vdbg
-#  define i2clldbg  lldbg
-#  define i2cllvdbg llvdbg
-#else
-#  define i2cdbg(x...)
-#  define i2cvdbg(x...)
-#  define i2clldbg(x...)
-#  define i2cllvdbg(x...)
-#endif
+#define MKI2C_INPUT(p)  (((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_INPUT)
+#define MKI2C_OUTPUT(p) (((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_OUTPUT)
 
 /****************************************************************************
  * Private Types
@@ -144,11 +134,12 @@ struct twi_attr_s
 {
   uint8_t             twi;        /* TWIHS device number (for debug output) */
   uint8_t             pid;        /* TWIHS peripheral ID */
+  uint8_t             glitchfltr; /* Pulse width of a glich to be suppressed by the filter */
+  bool                s_master;   /* true: Single-Master Mode active */
   uint16_t            irq;        /* IRQ number for this TWIHS bus */
   gpio_pinset_t       sclcfg;     /* TWIHS CK pin configuration (SCL in I2C-ese) */
   gpio_pinset_t       sdacfg;     /* TWIHS D pin configuration (SDA in I2C-ese) */
   uintptr_t           base;       /* Base address of TWIHS registers */
-  xcpt_t              handler;    /* TWIHS interrupt handler */
 };
 
 /* State of a TWIHS bus */
@@ -207,18 +198,9 @@ static inline void twi_putrel(struct twi_dev_s *priv, unsigned int offset,
 
 /* I2C transfer helper functions */
 
-static int twi_wait(struct twi_dev_s *priv, unsigned int size);
+static int  twi_wait(struct twi_dev_s *priv, unsigned int size);
 static void twi_wakeup(struct twi_dev_s *priv, int result);
-static int twi_interrupt(struct twi_dev_s *priv);
-#ifdef CONFIG_SAMV7_TWIHS0
-static int twi0_interrupt(int irq, FAR void *context);
-#endif
-#ifdef CONFIG_SAMV7_TWIHS1
-static int twi1_interrupt(int irq, FAR void *context);
-#endif
-#ifdef CONFIG_SAMV7_TWIHS2
-static int twi2_interrupt(int irq, FAR void *context);
-#endif
+static int  twi_interrupt(int irq, FAR void *context, FAR void *arg);
 static void twi_timeout(int argc, uint32_t arg, ...);
 
 static void twi_startread(struct twi_dev_s *priv, struct i2c_msg_s *msg);
@@ -230,6 +212,7 @@ static void twi_startmessage(struct twi_dev_s *priv, struct i2c_msg_s *msg);
 static int twi_transfer(FAR struct i2c_master_s *dev,
           FAR struct i2c_msg_s *msgs, int count);
 #ifdef CONFIG_I2C_RESET
+static int  twi_reset_internal(FAR struct i2c_master_s *dev);
 static int  twi_reset(FAR struct i2c_master_s * dev);
 #endif
 
@@ -245,13 +228,18 @@ static void twi_hw_initialize(struct twi_dev_s *priv, uint32_t frequency);
 #ifdef CONFIG_SAMV7_TWIHS0
 static const struct twi_attr_s g_twi0attr =
 {
-  .twi     = 0,
-  .pid     = SAM_PID_TWIHS0,
-  .irq     = SAM_IRQ_TWIHS0,
-  .sclcfg  = GPIO_TWIHS0_CK,
-  .sdacfg  = GPIO_TWIHS0_D,
-  .base    = SAM_TWIHS0_BASE,
-  .handler = twi0_interrupt,
+  .twi        = 0,
+  .pid        = SAM_PID_TWIHS0,
+  .irq        = SAM_IRQ_TWIHS0,
+  .glitchfltr = CONFIG_SAMV7_TWIHS0_GLITCH_FILTER,
+#ifdef CONFIG_SAMV7_TWIHS0_SINGLE_MASTER
+  .s_master   = true,
+#else
+  .s_master   = false,
+#endif
+  .sclcfg     = GPIO_TWIHS0_CK,
+  .sdacfg     = GPIO_TWIHS0_D,
+  .base       = SAM_TWIHS0_BASE,
 };
 
 static struct twi_dev_s g_twi0;
@@ -260,13 +248,18 @@ static struct twi_dev_s g_twi0;
 #ifdef CONFIG_SAMV7_TWIHS1
 static const struct twi_attr_s g_twi1attr =
 {
-  .twi     = 1,
-  .pid     = SAM_PID_TWIHS1,
-  .irq     = SAM_IRQ_TWIHS1,
-  .sclcfg  = GPIO_TWIHS1_CK,
-  .sdacfg  = GPIO_TWIHS1_D,
-  .base    = SAM_TWIHS1_BASE,
-  .handler = twi1_interrupt,
+  .twi        = 1,
+  .pid        = SAM_PID_TWIHS1,
+  .irq        = SAM_IRQ_TWIHS1,
+  .glitchfltr = CONFIG_SAMV7_TWIHS1_GLITCH_FILTER,
+#ifdef CONFIG_SAMV7_TWIHS1_SINGLE_MASTER
+  .s_master   = true,
+#else
+  .s_master   = false,
+#endif
+  .sclcfg     = GPIO_TWIHS1_CK,
+  .sdacfg     = GPIO_TWIHS1_D,
+  .base       = SAM_TWIHS1_BASE,
 };
 
 static struct twi_dev_s g_twi1;
@@ -275,13 +268,18 @@ static struct twi_dev_s g_twi1;
 #ifdef CONFIG_SAMV7_TWIHS2
 static const struct twi_attr_s g_twi2attr =
 {
-  .twi     = 2,
-  .pid     = SAM_PID_TWIHS2,
-  .irq     = SAM_IRQ_TWIHS2,
-  .sclcfg  = GPIO_TWIHS2_CK,
-  .sdacfg  = GPIO_TWIHS2_D,
-  .base    = SAM_TWIHS2_BASE,
-  .handler = twi2_interrupt,
+  .twi        = 2,
+  .pid        = SAM_PID_TWIHS2,
+  .irq        = SAM_IRQ_TWIHS2,
+  .glitchfltr = CONFIG_SAMV7_TWIHS2_GLITCH_FILTER,
+#ifdef CONFIG_SAMV7_TWIHS2_SINGLE_MASTER
+  .s_master   = true,
+#else
+  .s_master   = false,
+#endif
+  .sclcfg     = GPIO_TWIHS2_CK,
+  .sdacfg     = GPIO_TWIHS2_D,
+  .base       = SAM_TWIHS2_BASE,
 };
 
 static struct twi_dev_s g_twi2;
@@ -289,9 +287,9 @@ static struct twi_dev_s g_twi2;
 
 static const struct i2c_ops_s g_twiops =
 {
-  .transfer = twi_transfer
+  .transfer   = twi_transfer
 #ifdef CONFIG_I2C_RESET
-  , .reset  = twi_reset
+  , .reset    = twi_reset
 #endif
 };
 
@@ -323,7 +321,7 @@ static void twi_takesem(sem_t *sem)
        * awakened by a signal.
        */
 
-      ASSERT(errno == EINTR);
+      DEBUGASSERT(errno == EINTR);
     }
 }
 
@@ -364,7 +362,7 @@ static bool twi_checkreg(struct twi_dev_s *priv, bool wr, uint32_t value,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", priv->ntimes);
+          i2cinfo("...[Repeats %d times]...\n", priv->ntimes);
         }
 
       /* Save information about the new access */
@@ -396,7 +394,7 @@ static uint32_t twi_getabs(struct twi_dev_s *priv, uintptr_t address)
 
   if (twi_checkreg(priv, false, value, address))
     {
-      lldbg("%08x->%08x\n", address, value);
+      i2cinfo("%08x->%08x\n", address, value);
     }
 
   return value;
@@ -417,7 +415,7 @@ static void twi_putabs(struct twi_dev_s *priv, uintptr_t address,
 {
   if (twi_checkreg(priv, true, value, address))
     {
-      lldbg("%08x<-%08x\n", address, value);
+      i2cinfo("%08x<-%08x\n", address, value);
     }
 
   putreg32(value, address);
@@ -494,9 +492,9 @@ static int twi_wait(struct twi_dev_s *priv, unsigned int size)
 
   do
     {
-      i2cvdbg("TWIHS%d Waiting...\n", priv->attr->twi);
+      i2cinfo("TWIHS%d Waiting...\n", priv->attr->twi);
       twi_takesem(&priv->waitsem);
-      i2cvdbg("TWIHS%d Awakened with result: %d\n",
+      i2cinfo("TWIHS%d Awakened with result: %d\n",
               priv->attr->twi, priv->result);
     }
   while (priv->result == -EBUSY);
@@ -505,6 +503,26 @@ static int twi_wait(struct twi_dev_s *priv, unsigned int size)
    * all further interrupts for the TWIHS have been disabled.
    */
 
+#ifdef CONFIG_I2C_RESET
+  /* Check if an Arbitration Lost has occured */
+
+  if (priv->result == -EUSERS)
+    {
+      /* Something bad happened on the bus so force a reset */
+
+      priv->result = twi_reset_internal(&priv->dev);
+
+      /* Although the reset was successful tell the higher driver that it's
+       * transfer has failed and should be repeated.
+       */
+
+     if (priv->result == OK)
+       {
+          priv->result = -EIO;
+       }
+    }
+#endif
+
   return priv->result;
 }
 
@@ -540,21 +558,24 @@ static void twi_wakeup(struct twi_dev_s *priv, int result)
  *
  ****************************************************************************/
 
-static int twi_interrupt(struct twi_dev_s *priv)
+static int twi_interrupt(int irq, FAR void *context, FAR void *arg)
 {
+  struct twi_dev_s *priv = (struct twi_dev_s *)arg;
   struct i2c_msg_s *msg;
   uint32_t sr;
   uint32_t imr;
   uint32_t pending;
   uint32_t regval;
 
+  DEBUGASSERT(priv != NULL);
+
   /* Retrieve masked interrupt status */
 
   sr      = twi_getrel(priv, SAM_TWIHS_SR_OFFSET);
   imr     = twi_getrel(priv, SAM_TWIHS_IMR_OFFSET);
   pending = sr & imr;
 
-  i2cllvdbg("TWIHS%d pending: %08x\n", priv->attr->twi, pending);
+  i2cinfo("TWIHS%d pending: %08x\n", priv->attr->twi, pending);
 
   /* Byte received */
 
@@ -618,6 +639,22 @@ static int twi_interrupt(struct twi_dev_s *priv)
         }
     }
 
+#ifdef CONFIG_I2C_RESET
+  /* If Single-Master Mode is enabled and we lost arbitration (someone else or
+   * an EMC-Pulse did something on the bus) something went very wrong. So we end
+   * the current transfer with an EUSERS. The wait function will then reset
+   * the bus so further communication can take place.
+   */
+
+  else if ((priv->attr->s_master) && ((pending & TWIHS_INT_ARBLST) != 0))
+    {
+      /* Wake up the thread with an Arbitration Lost error indication */
+
+      i2cerr("ERROR: TWIHS%d Arbitration Lost\n");
+      twi_wakeup(priv, -EUSERS);
+    }
+#endif
+
   /* Check for errors.  We must check for errors *before* checking TXRDY or
    * TXCMP because the error can be signaled in combination with TXRDY or
    * TXCOMP.
@@ -627,7 +664,7 @@ static int twi_interrupt(struct twi_dev_s *priv)
     {
       /* Wake up the thread with an I/O error indication */
 
-      i2clldbg("ERROR: TWIHS%d pending: %08x\n", priv->attr->twi, pending);
+      i2cerr("ERROR: TWIHS%d pending: %08x\n", priv->attr->twi, pending);
       twi_wakeup(priv, -EIO);
     }
 
@@ -714,27 +751,6 @@ static int twi_interrupt(struct twi_dev_s *priv)
   return OK;
 }
 
-#ifdef CONFIG_SAMV7_TWIHS0
-static int twi0_interrupt(int irq, FAR void *context)
-{
-  return twi_interrupt(&g_twi0);
-}
-#endif
-
-#ifdef CONFIG_SAMV7_TWIHS1
-static int twi1_interrupt(int irq, FAR void *context)
-{
-  return twi_interrupt(&g_twi1);
-}
-#endif
-
-#ifdef CONFIG_SAMV7_TWIHS2
-static int twi2_interrupt(int irq, FAR void *context)
-{
-  return twi_interrupt(&g_twi2);
-}
-#endif
-
 /****************************************************************************
  * Name: twi_timeout
  *
@@ -750,7 +766,7 @@ static void twi_timeout(int argc, uint32_t arg, ...)
 {
   struct twi_dev_s *priv = (struct twi_dev_s *)arg;
 
-  i2clldbg("ERROR: TWIHS%d Timeout!\n", priv->attr->twi);
+  i2cerr("ERROR: TWIHS%d Timeout!\n", priv->attr->twi);
   twi_wakeup(priv, -ETIMEDOUT);
 }
 
@@ -867,11 +883,14 @@ static int twi_transfer(FAR struct i2c_master_s *dev,
   struct twi_dev_s *priv = (struct twi_dev_s *)dev;
   irqstate_t flags;
   unsigned int size;
+#ifdef CONFIG_I2C_RESET
+  uint32_t sr;
+#endif
   int i;
   int ret;
 
   DEBUGASSERT(dev != NULL && msgs != NULL && count > 0);
-  i2cvdbg("TWIHS%d count: %d\n", priv->attr->twi, count);
+  i2cinfo("TWIHS%d count: %d\n", priv->attr->twi, count);
 
   /* Calculate the total transfer size so that we can calculate a reasonable
    * timeout value.
@@ -902,6 +921,26 @@ static int twi_transfer(FAR struct i2c_master_s *dev,
 
   twi_setfrequency(priv, msgs->frequency);
 
+#ifdef CONFIG_I2C_RESET
+  /* When we are in Single Master Mode check if the bus is ready (no stuck
+   * DATA or CLK line).
+   * Otherwise initiate a bus reset.
+   */
+
+  if (priv->attr->s_master)
+    {
+      sr = twi_getrel(priv, SAM_TWIHS_SR_OFFSET);
+      if (((sr & TWIHS_INT_SDA) == 0) || ((sr & TWIHS_INT_SCL) == 0))
+        {
+          ret = twi_reset_internal(&priv->dev);
+          if (ret != OK)
+            {
+              goto errout;
+            }
+        }
+    }
+#endif
+
   /* Initiate the transfer.  The rest will be handled from interrupt
    * logic.  Interrupts must be disabled to prevent re-entrance from the
    * interrupt level.
@@ -915,46 +954,48 @@ static int twi_transfer(FAR struct i2c_master_s *dev,
    */
 
   ret = twi_wait(priv, size);
+  leave_critical_section(flags);
+
+#ifdef CONFIG_I2C_RESET
+errout:
+#endif
   if (ret < 0)
     {
-      i2cdbg("ERROR: Transfer failed: %d\n", ret);
+      i2cerr("ERROR: Transfer failed: %d\n", ret);
     }
 
-  leave_critical_section(flags);
   twi_givesem(&priv->exclsem);
   return ret;
 }
 
 /************************************************************************************
- * Name: twi_reset
- *
- * Description:
- *   Perform an I2C bus reset in an attempt to break loose stuck I2C devices.
- *
- * Input Parameters:
- *   dev   - Device-specific state data
- *
- * Returned Value:
- *   Zero (OK) on success; a negated errno value on failure.
- *
- ************************************************************************************/
+* Name: twi_reset_internal
+*
+* Description:
+*   Perform an I2C bus reset in an attempt to break loose stuck I2C devices.
+*   This function can be called from inside the driver while the TWIHS device is
+*   already locked, so we must not handle any semapores inside.
+*   To initiate a bus reset from outside the driver use twi_reset(dev).
+*
+* Input Parameters:
+*   dev   - Device-specific state data
+*
+* Returned Value:
+*   Zero (OK) on success; a negated errno value on failure.
+*
+************************************************************************************/
 
 #ifdef CONFIG_I2C_RESET
-static int twi_reset(FAR struct i2c_master_s *dev)
+static int twi_reset_internal(FAR struct i2c_master_s *dev)
 {
   struct twi_dev_s *priv = (struct twi_dev_s *)dev;
   unsigned int clockcnt;
   unsigned int stretchcnt;
   uint32_t sclpin;
   uint32_t sdapin;
+  uint8_t wait_us;
   int ret;
 
-  ASSERT(priv);
-
-  /* Get exclusive access to the TWIHS device */
-
-  twi_takesem(&priv->exclsem);
-
   /* Disable TWIHS interrupts */
 
   up_disable_irq(priv->attr->irq);
@@ -971,28 +1012,31 @@ static int twi_reset(FAR struct i2c_master_s *dev)
   sam_configgpio(sclpin);
   sam_configgpio(sdapin);
 
-  /* Peripheral clocking must be enabled in order to read valid data from
-   * the output pin (clocking is enabled automatically for pins configured
-   * as inputs).
-   */
-
-  sam_pio_forceclk(sclpin, true);
-  sam_pio_forceclk(sdapin, true);
-
   /* Clock the bus until any slaves currently driving it low let it float.
    * Reading from the output will return the actual sensed level on the
    * SDA pin (not the level that we wrote).
    */
 
+  /* Set the wait-time according to the TWI-Bus-Frequency */
+
+  if (priv->frequency >= 330000)
+    {
+      wait_us = 3;
+    }
+  else
+    {
+      wait_us = 10;
+    }
+
   clockcnt = 0;
-  while (sam_pioread(sdapin) == false)
+  while (sam_gpioread(sdapin) == false)
     {
       /* Give up if we have tried too hard */
 
       if (clockcnt++ > 10)
         {
           ret = -ETIMEDOUT;
-          goto errout_with_lock;
+          goto errout;
         }
 
       /* Sniff to make sure that clock stretching has finished.  SCL should
@@ -1002,55 +1046,85 @@ static int twi_reset(FAR struct i2c_master_s *dev)
        */
 
       stretchcnt = 0;
-      while (sam_pioread(sclpin) == false)
+      while (sam_gpioread(sclpin) == false)
         {
           /* Give up if we have tried too hard */
 
           if (stretchcnt++ > 10)
             {
               ret = -EAGAIN;
-              goto errout_with_lock;
+              goto errout;
             }
 
-          up_udelay(10);
+          up_udelay(wait_us);
         }
 
       /* Drive SCL low */
 
-      sam_piowrite(sclpin, false);
-      up_udelay(10);
+      sam_gpiowrite(sclpin, false);
+      up_udelay(wait_us);
 
       /* Drive SCL high (floating) again */
 
-      sam_piowrite(sclpin, true);
-      up_udelay(10);
+      sam_gpiowrite(sclpin, true);
+      up_udelay(wait_us);
     }
 
   /* Generate a start followed by a stop to reset slave
    * state machines.
    */
 
-  sam_piowrite(sdapin, false);
-  up_udelay(10);
-  sam_piowrite(sclpin, false);
-  up_udelay(10);
-
-  sam_piowrite(sclpin, true);
-  up_udelay(10);
-  sam_piowrite(sdapin, true);
-  up_udelay(10);
-
-  /* Clocking is no longer forced */
+  sam_gpiowrite(sdapin, false);
+  up_udelay(wait_us);
+  sam_gpiowrite(sclpin, false);
+  up_udelay(wait_us);
 
-  sam_pio_forceclk(sclpin, false);
-  sam_pio_forceclk(sdapin, false);
+  sam_gpiowrite(sclpin, true);
+  up_udelay(wait_us);
+  sam_gpiowrite(sdapin, true);
+  up_udelay(wait_us);
 
   /* Re-initialize the port hardware */
 
   twi_hw_initialize(priv, priv->frequency);
   ret = OK;
 
-errout_with_lock:
+errout:
+  return ret;
+}
+#endif /* CONFIG_I2C_RESET */
+
+/************************************************************************************
+ * Name: twi_reset
+ *
+ * Description:
+ *   Perform an I2C bus reset in an attempt to break loose stuck I2C devices.
+ *   This function can be called from outside the driver, so lock the TWIHS Device
+ *   and then let the internal reset function do the work.
+ *
+ * Input Parameters:
+ *   dev   - Device-specific state data
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_I2C_RESET
+static int twi_reset(FAR struct i2c_master_s *dev)
+{
+  struct twi_dev_s *priv = (struct twi_dev_s *)dev;
+  int ret;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Get exclusive access to the TWIHS device */
+
+  twi_takesem(&priv->exclsem);
+
+  /* Do the reset-procedure */
+
+  ret = twi_reset_internal(dev);
 
   /* Release our lock on the bus */
 
@@ -1157,7 +1231,7 @@ static void twi_hw_initialize(struct twi_dev_s *priv, uint32_t frequency)
   uint32_t regval;
   uint32_t mck;
 
-  i2cvdbg("TWIHS%d Initializing\n", priv->attr->twi);
+  i2cinfo("TWIHS%d Initializing\n", priv->attr->twi);
 
   /* Configure PIO pins */
 
@@ -1228,6 +1302,19 @@ static void twi_hw_initialize(struct twi_dev_s *priv, uint32_t frequency)
   regval |= PMC_PCR_PID(priv->attr->pid) | PMC_PCR_CMD | PMC_PCR_EN;
   twi_putabs(priv, SAM_PMC_PCR, regval);
 
+  /* Set the TWIHS Input Filters */
+
+  if (priv->attr->glitchfltr)
+    {
+      regval = TWIHS_FILTR_FILT | TWIHS_FILTR_THRES(priv->attr->glitchfltr);
+    }
+  else
+    {
+      regval = 0;
+    }
+
+  twi_putrel(priv, SAM_TWIHS_FILTR_OFFSET, regval);
+
   /* Set the initial TWIHS data transfer frequency */
 
   priv->frequency  = 0;
@@ -1258,7 +1345,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
   irqstate_t flags;
   int ret;
 
-  i2cvdbg("Initializing TWIHS%d\n", bus);
+  i2cinfo("Initializing TWIHS%d\n", bus);
 
 #ifdef CONFIG_SAMV7_TWIHS0
   if (bus == 0)
@@ -1303,7 +1390,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
   else
 #endif
     {
-      i2cdbg("ERROR: Unsupported bus: TWIHS%d\n", bus);
+      i2cerr("ERROR: Unsupported bus: TWIHS%d\n", bus);
       return NULL;
     }
 
@@ -1320,16 +1407,16 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
       priv->timeout = wd_create();
       if (priv->timeout == NULL)
         {
-          idbg("ERROR: Failed to allocate a timer\n");
+          ierr("ERROR: Failed to allocate a timer\n");
           goto errout_with_irq;
         }
 
       /* Attach Interrupt Handler */
 
-      ret = irq_attach(priv->attr->irq, priv->attr->handler);
+      ret = irq_attach(priv->attr->irq, twi_interrupt, priv);
       if (ret < 0)
         {
-          idbg("ERROR: Failed to attach irq %d\n", priv->attr->irq);
+          ierr("ERROR: Failed to attach irq %d\n", priv->attr->irq);
           goto errout_with_wdog;
         }
 
@@ -1337,9 +1424,17 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
 
       priv->dev.ops = &g_twiops;
 
+      /* Initialize semaphores */
+
       (void)sem_init(&priv->exclsem, 0, 1);
       (void)sem_init(&priv->waitsem, 0, 0);
 
+      /* The waitsem semaphore is used for signaling and, hence, should not
+       * have priority inheritance enabled.
+       */
+
+      sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
+
       /* Perform repeatable TWIHS hardware initialization */
 
       twi_hw_initialize(priv, frequency);
@@ -1374,7 +1469,7 @@ int sam_i2cbus_uninitialize(FAR struct i2c_master_s *dev)
   struct twi_dev_s *priv = (struct twi_dev_s *) dev;
   irqstate_t flags;
 
-  i2cvdbg("TWIHS%d Un-initializing\n", priv->attr->twi);
+  i2cinfo("TWIHS%d Un-initializing\n", priv->attr->twi);
 
   /* Disable TWIHS interrupts */
 
diff --git a/arch/arm/src/samv7/sam_usbdevhs.c b/arch/arm/src/samv7/sam_usbdevhs.c
index de6872e92ee45eae79663d37cd3e4e4d391a5154..4adfa117c11abfcbb08b0fb45ff124e8db3d5b63 100644
--- a/arch/arm/src/samv7/sam_usbdevhs.c
+++ b/arch/arm/src/samv7/sam_usbdevhs.c
@@ -90,6 +90,10 @@
 #  define CONFIG_USBDEV_EP0_MAXSIZE 64
 #endif
 
+#ifndef CONFIG_DEBUG_USB_INFO
+# undef CONFIG_SAMV7_USBHS_REGDEBUG
+#endif
+
 /* Number of DMA transfer descriptors.  Default: 8 */
 
 #ifndef CONFIG_SAMV7_USBDEVHS_NDTDS
@@ -108,14 +112,6 @@
 #  warning CONFIG_USBDEV_DUALSPEED should be defined for high speed support
 #endif
 
-/* Extremely detailed register debug that you would normally never want
- * enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_SAMV7_USBHS_REGDEBUG
-#endif
-
 /* Not yet supported */
 
 #undef CONFIG_SAMV7_USBDEVHS_SCATTERGATHER
@@ -305,6 +301,7 @@ enum sam_epstate_e
   USBHS_EPSTATE_STALLED,      /* Endpoint is stalled */
   USBHS_EPSTATE_IDLE,         /* Endpoint is idle (i.e. ready for transmission) */
   USBHS_EPSTATE_SENDING,      /* Endpoint is sending data */
+  USBHS_EPSTATE_SENDING_DMA,  /* Endpoint is sending data via DMA */
   USBHS_EPSTATE_NBUSYBK,      /* Endpoint DMA complete, waiting for NBUSYBK==0 */
   USBHS_EPSTATE_RECEIVING,    /* Endpoint is receiving data */
                               /* --- Endpoint 0 Only --- */
@@ -520,7 +517,7 @@ static void   sam_ep0_setup(struct sam_usbdev_s *priv);
 static void   sam_dma_interrupt(struct sam_usbdev_s *priv, int epno);
 #endif
 static void   sam_ep_interrupt(struct sam_usbdev_s *priv, int epno);
-static int    sam_usbhs_interrupt(int irq, void *context);
+static int    sam_usbhs_interrupt(int irq, void *context, FAR void *arg);
 
 /* Endpoint helpers *********************************************************/
 
@@ -721,10 +718,6 @@ const struct trace_msg_t g_usb_trace_strings_intdecode[] =
 };
 #endif
 
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Private Functions
  ****************************************************************************/
@@ -732,6 +725,7 @@ const struct trace_msg_t g_usb_trace_strings_intdecode[] =
 /****************************************************************************
  * Register Operations
  ****************************************************************************/
+
 /****************************************************************************
  * Name: sam_printreg
  *
@@ -743,7 +737,7 @@ const struct trace_msg_t g_usb_trace_strings_intdecode[] =
 #ifdef CONFIG_SAMV7_USBHS_REGDEBUG
 static void sam_printreg(uintptr_t regaddr, uint32_t regval, bool iswrite)
 {
-  lldbg("%p%s%08x\n", regaddr, iswrite ? "<-" : "->", regval);
+  uinfo("%p%s%08x\n", regaddr, iswrite ? "<-" : "->", regval);
 }
 #endif
 
@@ -794,7 +788,7 @@ static void sam_checkreg(uintptr_t regaddr, uint32_t regval, bool iswrite)
             {
               /* No.. More than one. */
 
-              lldbg("[repeats %d more times]\n", count);
+              uinfo("[repeats %d more times]\n", count);
             }
         }
 
@@ -869,36 +863,36 @@ static inline void sam_putreg(uint32_t regval, uint32_t regaddr)
  * Name: sam_dumpep
  ****************************************************************************/
 
-#if defined(CONFIG_SAMV7_USBHS_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAMV7_USBHS_REGDEBUG
 static void sam_dumpep(struct sam_usbdev_s *priv, int epno)
 {
   /* Global Registers */
 
-  lldbg("Global Register:\n");
-  lldbg("  CTRL:    %08x\n", sam_getreg(SAM_USBHS_DEVCTRL));
-  lldbg("  ISR:     %08x\n", sam_getreg(SAM_USBHS_DEVISR));
-  lldbg("  IMR:     %08x\n", sam_getreg(SAM_USBHS_DEVIMR));
-  lldbg("  EPT:     %08x\n", sam_getreg(SAM_USBHS_DEVEPT));
-  lldbg("  FNUM:    %08x\n", sam_getreg(SAM_USBHS_DEVFNUM));
+  uinfo("Global Register:\n");
+  uinfo("  CTRL:    %08x\n", sam_getreg(SAM_USBHS_DEVCTRL));
+  uinfo("  ISR:     %08x\n", sam_getreg(SAM_USBHS_DEVISR));
+  uinfo("  IMR:     %08x\n", sam_getreg(SAM_USBHS_DEVIMR));
+  uinfo("  EPT:     %08x\n", sam_getreg(SAM_USBHS_DEVEPT));
+  uinfo("  FNUM:    %08x\n", sam_getreg(SAM_USBHS_DEVFNUM));
 
   /* Endpoint registers */
 
-  lldbg("Endpoint %d Register:\n", epno);
-  lldbg("  CFG:     %08x\n", sam_getreg(SAM_USBHS_DEVEPTCFG(epno)));
-  lldbg("  ISR:     %08x\n", sam_getreg(SAM_USBHS_DEVEPTISR(epno)));
-  lldbg("  IMR:     %08x\n", sam_getreg(SAM_USBHS_DEVEPTIMR(epno)));
+  uinfo("Endpoint %d Register:\n", epno);
+  uinfo("  CFG:     %08x\n", sam_getreg(SAM_USBHS_DEVEPTCFG(epno)));
+  uinfo("  ISR:     %08x\n", sam_getreg(SAM_USBHS_DEVEPTISR(epno)));
+  uinfo("  IMR:     %08x\n", sam_getreg(SAM_USBHS_DEVEPTIMR(epno)));
 
-  lldbg("DMA %d Register:\n", epno);
+  uinfo("DMA %d Register:\n", epno);
   if ((SAM_EPSET_DMA & SAM_EP_BIT(epno)) != 0)
     {
-      lldbg("  NXTDSC:  %08x\n", sam_getreg(SAM_USBHS_DEVDMANXTDSC(epno)));
-      lldbg("  ADDRESS: %08x\n", sam_getreg(SAM_USBHS_DEVDMAADDR(epno)));
-      lldbg("  CONTROL: %08x\n", sam_getreg(SAM_USBHS_DEVDMACTRL(epno)));
-      lldbg("  STATUS:  %08x\n", sam_getreg(SAM_USBHS_DEVDMASTA(epno)));
+      uinfo("  NXTDSC:  %08x\n", sam_getreg(SAM_USBHS_DEVDMANXTDSC(epno)));
+      uinfo("  ADDRESS: %08x\n", sam_getreg(SAM_USBHS_DEVDMAADDR(epno)));
+      uinfo("  CONTROL: %08x\n", sam_getreg(SAM_USBHS_DEVDMACTRL(epno)));
+      uinfo("  STATUS:  %08x\n", sam_getreg(SAM_USBHS_DEVDMASTA(epno)));
     }
   else
     {
-      lldbg("  None\n");
+      uinfo("  None\n");
     }
 }
 #endif
@@ -1013,7 +1007,7 @@ static void sam_dma_wrsetup(struct sam_usbdev_s *priv, struct sam_ep_s *privep,
 
   /* Switch to the sending state */
 
-  privep->epstate   = USBHS_EPSTATE_SENDING;
+  privep->epstate   = USBHS_EPSTATE_SENDING_DMA;
   privreq->inflight = 0;
 
   /* Get the endpoint number */
@@ -1218,16 +1212,23 @@ static void sam_req_complete(struct sam_ep_s *privep, int16_t result)
 
       privreq->req.result = result;
 
-      /* Callback to the request completion handler */
-
-      privreq->flink = NULL;
-      privreq->req.callback(&privep->ep, &privreq->req);
-
-      /* Reset the endpoint state and restore the stalled indication */
+      /* Reset the endpoint state and restore the stalled indication.
+       *
+       * At least the USB class CDC/ACM calls the function sam_ep_submit within
+       * the callback. This function uses sam_req_write or sam_req_read to process
+       * the request, both functions can change the state. Therefore it is verry
+       * important to set the state to USBHS_EPSTATE_IDLE before the callback is
+       * called.
+       */
 
       privep->epstate   = USBHS_EPSTATE_IDLE;
       privep->zlpneeded = false;
       privep->zlpsent   = false;
+
+      /* Callback to the request completion handler */
+
+      privreq->flink = NULL;
+      privreq->req.callback(&privep->ep, &privreq->req);
     }
 }
 
@@ -1412,9 +1413,9 @@ static int sam_req_write(struct sam_usbdev_s *priv, struct sam_ep_s *privep)
           return -ENOENT;
         }
 
-      ullvdbg("epno=%d req=%p: len=%d xfrd=%d inflight=%d zlpneeded=%d\n",
-              epno, privreq, privreq->req.len, privreq->req.xfrd,
-              privreq->inflight, privep->zlpneeded);
+      uinfo("epno=%d req=%p: len=%d xfrd=%d inflight=%d zlpneeded=%d\n",
+            epno, privreq, privreq->req.len, privreq->req.xfrd,
+            privreq->inflight, privep->zlpneeded);
 
       /* Handle any bytes in flight. */
 
@@ -1647,8 +1648,8 @@ static int sam_req_read(struct sam_usbdev_s *priv, struct sam_ep_s *privep,
           return -ENOENT;
         }
 
-      ullvdbg("EP%d: len=%d xfrd=%d\n",
-              epno, privreq->req.len, privreq->req.xfrd);
+      uinfo("EP%d: len=%d xfrd=%d\n",
+            epno, privreq->req.len, privreq->req.xfrd);
 
       /* Ignore any attempt to receive a zero length packet */
 
@@ -1982,8 +1983,8 @@ static void sam_ep0_setup(struct sam_usbdev_s *priv)
   index.w = GETUINT16(priv->ctrl.index);
   len.w   = GETUINT16(priv->ctrl.len);
 
-  ullvdbg("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
-          priv->ctrl.type, priv->ctrl.req, value.w, index.w, len.w);
+  uinfo("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+        priv->ctrl.type, priv->ctrl.req, value.w, index.w, len.w);
 
   /* Dispatch any non-standard requests */
 
@@ -2146,7 +2147,7 @@ static void sam_ep0_setup(struct sam_usbdev_s *priv)
           {
             /* Special case recipient=device test mode */
 
-            ullvdbg("test mode: %d\n", index.w);
+            uinfo("test mode: %d\n", index.w);
           }
         else if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) != USB_REQ_RECIPIENT_ENDPOINT)
           {
@@ -2504,7 +2505,8 @@ static void sam_dma_interrupt(struct sam_usbdev_s *priv, int epno)
 
       /* Were we sending?  Or receiving? */
 
-      if (privep->epstate == USBHS_EPSTATE_SENDING)
+      if (privep->epstate == USBHS_EPSTATE_SENDING ||
+          privep->epstate == USBHS_EPSTATE_SENDING_DMA)
         {
           uint32_t nbusybk;
           uint32_t byct;
@@ -2930,7 +2932,8 @@ static void sam_ep_interrupt(struct sam_usbdev_s *priv, int epno)
        */
 
       if (privep->epstate == USBHS_EPSTATE_RECEIVING ||
-          privep->epstate == USBHS_EPSTATE_SENDING)
+          privep->epstate == USBHS_EPSTATE_SENDING ||
+          privep->epstate == USBHS_EPSTATE_SENDING_DMA)
         {
           sam_req_complete(privep, -EPROTO);
         }
@@ -2989,7 +2992,7 @@ static void sam_ep_interrupt(struct sam_usbdev_s *priv, int epno)
  *
  ****************************************************************************/
 
-static int sam_usbhs_interrupt(int irq, void *context)
+static int sam_usbhs_interrupt(int irq, void *context, FAR void *arg)
 {
   /* For now there is only one USB controller, but we will always refer to
    * it using a pointer to make any future ports to multiple USBHS controllers
@@ -3330,6 +3333,17 @@ static void sam_ep_reset(struct sam_usbdev_s *priv, uint8_t epno)
 
   sam_putreg(USBHS_DEVINT_PEP(epno), SAM_USBHS_DEVIDR);
 
+  /* Clear all pending interrupts */
+
+  sam_putreg(USBHS_DEVEPTICR_ALLINTS, SAM_USBHS_DEVEPTICR(epno));
+
+  /* Set DMA control register to a defined state */
+
+  if ((SAM_EPSET_DMA & SAM_EP_BIT(epno)) != 0)
+    {
+      sam_putreg(0, SAM_USBHS_DEVDMACTRL(epno));
+    }
+
   /* Cancel any queued requests.  Since they are cancelled with status
    * -ESHUTDOWN, then will not be requeued until the configuration is reset.
    * NOTE:  This should not be necessary... the CLASS_DISCONNECT above
@@ -3489,7 +3503,7 @@ static int sam_ep_configure_internal(struct sam_ep_s *privep,
   uint8_t nbtrans;
   bool dirin;
 
-  uvdbg("len: %02x type: %02x addr: %02x attr: %02x "
+  uinfo("len: %02x type: %02x addr: %02x attr: %02x "
         "maxpacketsize: %02x %02x interval: %02x\n",
         desc->len, desc->type, desc->addr, desc->attr,
         desc->mxpacketsize[0],  desc->mxpacketsize[1],
@@ -3730,7 +3744,7 @@ static int sam_ep_configure(struct usbdev_ep_s *ep,
 
   /* Verify parameters.  Endpoint 0 is not available at this interface */
 
-#if defined(CONFIG_DEBUG) || defined(CONFIG_USBDEV_TRACE)
+#if defined(CONFIG_DEBUG_FEATURES) || defined(CONFIG_USBDEV_TRACE)
   uint8_t epno = USB_EPNO(desc->addr);
   usbtrace(TRACE_EPCONFIGURE, (uint16_t)epno);
 
@@ -3909,7 +3923,7 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
       if (privep->stalled)
         {
           sam_req_abort(privep, privreq, -EBUSY);
-          ulldbg("ERROR: stalled\n");
+          uerr("ERROR: stalled\n");
           ret = -EPERM;
         }
       else
@@ -4692,7 +4706,7 @@ static void sam_sw_setup(struct sam_usbdev_s *priv)
     kmm_memalign(16, CONFIG_SAMV7_USBDEVHS_NDTDS * sizeof(struct sam_dtd_s));
   if (!priv->dtdpool)
      {
-      udbg("ERROR: Failed to allocate the DMA transfer descriptor pool\n");
+      uerr("ERROR: Failed to allocate the DMA transfer descriptor pool\n");
       return NULL;
     }
 
@@ -4848,7 +4862,7 @@ void up_usbinitialize(void)
    * them when we need them later.
    */
 
-  if (irq_attach(SAM_IRQ_USBHS, sam_usbhs_interrupt) != 0)
+  if (irq_attach(SAM_IRQ_USBHS, sam_usbhs_interrupt, NULL) != 0)
     {
       usbtrace(TRACE_DEVERROR(SAM_TRACEERR_IRQREGISTRATION),
                (uint16_t)SAM_IRQ_USBHS);
diff --git a/arch/arm/src/samv7/sam_wdt.c b/arch/arm/src/samv7/sam_wdt.c
index 8d638066820678e6a7bdff2ee2cf068502926975..e662146077e9ead6939446ad654ccc05a5ecc9e3 100644
--- a/arch/arm/src/samv7/sam_wdt.c
+++ b/arch/arm/src/samv7/sam_wdt.c
@@ -57,6 +57,11 @@
  * Pre-processor Definitions
  ****************************************************************************/
 /* Configuration ************************************************************/
+
+#ifndef CONFIG_DEBUG_WATCHDOG_INFO
+#  undef CONFIG_SAMV7_WDT_REGDEBUG
+#endif
+
 /* The Watchdog Timer uses the Slow Clock divided by 128 to establish the
  * maximum Watchdog period to be 16 seconds (with a typical Slow Clock of
  * 32768 kHz).
@@ -80,20 +85,6 @@
 #define WDT_MINTIMEOUT ((1000 + WDT_FREQUENCY - 1) / WDT_FREQUENCY)
 #define WDT_MAXTIMEOUT ((4096 * 1000) / WDT_FREQUENCY)
 
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing the watchdog
- * driver.  NOTE: that only lldbg types are used so that the output is
- * immediately available.
- */
-
-#ifdef CONFIG_DEBUG_WATCHDOG
-#  define wddbg    lldbg
-#  define wdvdbg   llvdbg
-#else
-#  define wddbg(x...)
-#  define wdvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -118,7 +109,7 @@ struct sam_lowerhalf_s
  ****************************************************************************/
 /* Register operations ******************************************************/
 
-#if defined(CONFIG_SAMV7_WDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAMV7_WDT_REGDEBUG
 static uint32_t sam_getreg(uintptr_t regaddr);
 static void     sam_putreg(uint32_t regval, uintptr_t regaddr);
 #else
@@ -129,7 +120,7 @@ static void     sam_putreg(uint32_t regval, uintptr_t regaddr);
 /* Interrupt hanlding *******************************************************/
 
 #ifdef CONFIG_SAMV7_WDT_INTERRUPT
-static int      sam_interrupt(int irq, FAR void *context);
+static int      sam_interrupt(int irq, FAR void *context, FAR void *arg);
 #endif
 
 /* "Lower half" driver methods **********************************************/
@@ -178,7 +169,7 @@ static struct sam_lowerhalf_s g_wdtdev;
  *
  ****************************************************************************/
 
-#if defined(CONFIG_SAMV7_WDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAMV7_WDT_REGDEBUG
 static uint32_t sam_getreg(uintptr_t regaddr)
 {
   static uint32_t prevaddr = 0;
@@ -199,7 +190,7 @@ static uint32_t sam_getreg(uintptr_t regaddr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              wdinfo("...\n");
             }
 
           return regval;
@@ -216,7 +207,7 @@ static uint32_t sam_getreg(uintptr_t regaddr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          wdinfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -228,7 +219,7 @@ static uint32_t sam_getreg(uintptr_t regaddr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%048\n", regaddr, regval);
+  wdinfo("%08x->%048\n", regaddr, regval);
   return regval;
 }
 #endif
@@ -241,12 +232,12 @@ static uint32_t sam_getreg(uintptr_t regaddr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_SAMV7_WDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_SAMV7_WDT_REGDEBUG
 static void sam_putreg(uint32_t regval, uintptr_t regaddr)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", regaddr, regval);
+  wdinfo("%08x<-%08x\n", regaddr, regval);
 
   /* Write the value */
 
@@ -269,7 +260,7 @@ static void sam_putreg(uint32_t regval, uintptr_t regaddr)
  ****************************************************************************/
 
 #ifdef CONFIG_SAMV7_WDT_INTERRUPT
-static int sam_interrupt(int irq, FAR void *context)
+static int sam_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   FAR struct sam_lowerhalf_s *priv = &g_wdtdev;
 
@@ -315,7 +306,7 @@ static int sam_start(FAR struct watchdog_lowerhalf_s *lower)
    * timer with the newly programmed mode parameters.
    */
 
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
   return priv->started ? OK : -ENOSYS;
 }
 
@@ -343,7 +334,7 @@ static int sam_stop(FAR struct watchdog_lowerhalf_s *lower)
    * timer with the newly programmed mode parameters.
    */
 
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
   return -ENOSYS;
 }
 
@@ -366,7 +357,7 @@ static int sam_stop(FAR struct watchdog_lowerhalf_s *lower)
 
 static int sam_keepalive(FAR struct watchdog_lowerhalf_s *lower)
 {
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
 
   /* Write WDT_CR_WDRSTT to the WDT CR regiser (along with the KEY value)
    * will restart the watchdog timer.
@@ -397,7 +388,7 @@ static int sam_getstatus(FAR struct watchdog_lowerhalf_s *lower,
 {
   FAR struct sam_lowerhalf_s *priv = (FAR struct sam_lowerhalf_s *)lower;
 
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
   DEBUGASSERT(priv);
 
   /* Return the status bit */
@@ -426,10 +417,10 @@ static int sam_getstatus(FAR struct watchdog_lowerhalf_s *lower,
 
   status->timeleft = 0;
 
-  wdvdbg("Status     :\n");
-  wdvdbg("  flags    : %08x\n", status->flags);
-  wdvdbg("  timeout  : %d\n", status->timeout);
-  wdvdbg("  timeleft : %d\n", status->timeleft);
+  wdinfo("Status     :\n");
+  wdinfo("  flags    : %08x\n", status->flags);
+  wdinfo("  timeout  : %d\n", status->timeout);
+  wdinfo("  timeleft : %d\n", status->timeleft);
   return OK;
 }
 
@@ -457,13 +448,13 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower,
   uint32_t regval;
 
   DEBUGASSERT(priv);
-  wdvdbg("Entry: timeout=%d\n", timeout);
+  wdinfo("Entry: timeout=%d\n", timeout);
 
   /* Can this timeout be represented? */
 
   if (timeout < WDT_MINTIMEOUT || timeout >= WDT_MAXTIMEOUT)
     {
-      wddbg("Cannot represent timeout: %d < %d > %d\n",
+      wderr("ERROR: Cannot represent timeout: %d < %d > %d\n",
             WDT_MINTIMEOUT, timeout, WDT_MAXTIMEOUT);
       return -ERANGE;
     }
@@ -496,7 +487,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower,
 
   priv->reload = reload;
 
-  wdvdbg("reload=%d timout: %d->%d\n",
+  wdinfo("reload=%d timout: %d->%d\n",
          reload, timeout, priv->timeout);
 
   /* Set the WDT_MR according to calculated value
@@ -541,7 +532,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower,
 
   priv->started = true;
 
-  wdvdbg("Setup: CR: %08x MR: %08x SR: %08x\n",
+  wdinfo("Setup: CR: %08x MR: %08x SR: %08x\n",
          sam_getreg(SAM_WDT_CR), sam_getreg(SAM_WDT_MR),
          sam_getreg(SAM_WDT_SR));
 
@@ -574,7 +565,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower,
                             xcpt_t handler)
 {
 #ifndef CONFIG_SAMV7_WDT_INTERRUPT
-  wddbg("ERROR: Not configured for this mode\n");
+  wderr("ERROR: Not configured for this mode\n");
   return NULL;
 #else
   FAR struct sam_lowerhalf_s *priv = (FAR struct sam_lowerhalf_s *)lower;
@@ -582,7 +573,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower,
   xcpt_t oldhandler;
 
   DEBUGASSERT(priv);
-  wdvdbg("Entry: handler=%p\n", handler);
+  wdinfo("Entry: handler=%p\n", handler);
 
   /* Get the old handler return value */
 
@@ -636,7 +627,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower,
 static int sam_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd,
                     unsigned long arg)
 {
-  wdvdbg("cmd=%d arg=%ld\n", cmd, arg);
+  wdinfo("cmd=%d arg=%ld\n", cmd, arg);
 
   /* No ioctls are supported */
 
@@ -667,7 +658,7 @@ int sam_wdt_initialize(void)
 {
   FAR struct sam_lowerhalf_s *priv = &g_wdtdev;
 
-  wdvdbg("Entry: CR: %08x MR: %08x SR: %08x\n",
+  wdinfo("Entry: CR: %08x MR: %08x SR: %08x\n",
          sam_getreg(SAM_WDT_CR), sam_getreg(SAM_WDT_MR),
          sam_getreg(SAM_WDT_SR));
 
@@ -693,12 +684,14 @@ int sam_wdt_initialize(void)
 #ifdef CONFIG_SAMV7_WDT_INTERRUPT
   /* Attach our WDT interrupt handler (But don't enable it yet) */
 
-  (void)irq_attach(SAM_IRQ_WDT, sam_interrupt);
+  (void)irq_attach(SAM_IRQ_WDT, sam_interrupt, NULL);
 #endif
 
-  /* Register the watchdog driver as /dev/wdt */
+  /* Register the watchdog driver as device-node configured via .config.
+   * Normally /dev/watchdog0
+   */
 
-  (void)watchdog_register("/dev/wdt",
+  (void)watchdog_register(CONFIG_WATCHDOG_DEVPATH,
                          (FAR struct watchdog_lowerhalf_s *)priv);
   return OK;
 }
diff --git a/arch/arm/src/samv7/sam_xdmac.c b/arch/arm/src/samv7/sam_xdmac.c
index 886de898fe428b8a2bdabe852861a2d887931cd0..b47617cafecdc61f0c961205bb30f9f037905996 100644
--- a/arch/arm/src/samv7/sam_xdmac.c
+++ b/arch/arm/src/samv7/sam_xdmac.c
@@ -551,7 +551,7 @@ static uint8_t sam_channel(uint8_t pid, const struct sam_pidmap_s *table,
         }
     }
 
-  dmadbg("No channel found for pid %d\n", pid);
+  dmaerr("ERROR: No channel found for pid %d\n", pid);
   DEBUGPANIC();
   return 0x3f;
 }
@@ -1020,7 +1020,7 @@ sam_allocdesc(struct sam_xdmach_s *xdmach, struct chnext_view1_s *prev,
    * Obviously setting it to zero would break that usage.
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (csa != 0)
 #endif
     {
@@ -1340,7 +1340,7 @@ static inline int sam_single(struct sam_xdmach_s *xdmach)
 static inline int sam_multiple(struct sam_xdmach_s *xdmach)
 {
   struct sam_xdmac_s *xdmac = sam_controller(xdmach);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ASSERTIONS
   struct chnext_view1_s *llhead = xdmach->llhead;
 #endif
   uintptr_t paddr;
@@ -1506,7 +1506,7 @@ static void sam_dmaterminate(struct sam_xdmach_s *xdmach, int result)
  *
  ****************************************************************************/
 
-static int sam_xdmac_interrupt(int irq, void *context)
+static int sam_xdmac_interrupt(int irq, void *context, FAR void *arg)
 {
   struct sam_xdmac_s *xdmac = &g_xdmac;
   struct sam_xdmach_s *xdmach;
@@ -1542,7 +1542,7 @@ static int sam_xdmac_interrupt(int irq, void *context)
             {
               /* Yes... Terminate the transfer with an error? */
 
-              dmalldbg("ERROR: DMA failed: %08x\n", chpending);
+              dmaerr("ERROR: DMA failed: %08x\n", chpending);
               sam_dmaterminate(xdmach, -EIO);
             }
 
@@ -1559,7 +1559,7 @@ static int sam_xdmac_interrupt(int irq, void *context)
 
           else
             {
-              dmalldbg("ERROR: Unexpected interrupt: %08x\n", chpending);
+              dmaerr("ERROR: Unexpected interrupt: %08x\n", chpending);
               DEBUGPANIC();
             }
 
@@ -1616,7 +1616,7 @@ void sam_dmainitialize(struct sam_xdmac_s *xdmac)
 
 void weak_function up_dmainitialize(void)
 {
-  dmallvdbg("Initialize XDMAC\n");
+  dmainfo("Initialize XDMAC\n");
 
   /* Enable peripheral clock */
 
@@ -1624,7 +1624,7 @@ void weak_function up_dmainitialize(void)
 
   /* Attach DMA interrupt vector */
 
-  (void)irq_attach(SAM_IRQ_XDMAC, sam_xdmac_interrupt);
+  (void)irq_attach(SAM_IRQ_XDMAC, sam_xdmac_interrupt, NULL);
 
   /* Initialize the controller */
 
@@ -1697,12 +1697,12 @@ DMA_HANDLE sam_dmachannel(uint8_t dmacno, uint32_t chflags)
 
   if (xdmach)
     {
-      dmavdbg("XDMAC%d CH%d: chflags: %08x returning xdmach: %p\n",
+      dmainfo("XDMAC%d CH%d: chflags: %08x returning xdmach: %p\n",
               (int)dmacno, xdmach->chan, (int)chflags, xdmach);
     }
   else
     {
-      dmadbg("ERROR: Failed allocate XDMAC%d channel\n", (int)dmacno);
+      dmaerr("ERROR: Failed allocate XDMAC%d channel\n", (int)dmacno);
     }
 
   return (DMA_HANDLE)xdmach;
@@ -1731,7 +1731,7 @@ void sam_dmaconfig(DMA_HANDLE handle, uint32_t chflags)
   /* Set the new DMA channel flags. */
 
   xdmach->flags = chflags;
-  dmavdbg("XDMAC CH%d: chflags: %08x\n",  xdmach->chan, (int)chflags);
+  dmainfo("XDMAC CH%d: chflags: %08x\n",  xdmach->chan, (int)chflags);
 }
 
 /****************************************************************************
@@ -1752,7 +1752,7 @@ void sam_dmafree(DMA_HANDLE handle)
   struct sam_xdmach_s *xdmach = (struct sam_xdmach_s *)handle;
   struct sam_xdmac_s *xdmac;
 
-  dmavdbg("xdmach: %p\n", xdmach);
+  dmainfo("xdmach: %p\n", xdmach);
   DEBUGASSERT((xdmach != NULL) && (xdmach->inuse));
 
   xdmac = sam_controller(xdmach);
@@ -1790,10 +1790,10 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
   size_t remaining;
   int ret = OK;
 
-  dmavdbg("xdmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
+  dmainfo("xdmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
           xdmach, (int)paddr, (int)maddr, (int)nbytes);
   DEBUGASSERT(xdmach);
-  dmavdbg("llhead: %p lltail: %p\n", xdmach->llhead, xdmach->lltail);
+  dmainfo("llhead: %p lltail: %p\n", xdmach->llhead, xdmach->lltail);
 
   /* The maximum transfer size in bytes depends upon the maximum number of
    * transfers and the number of bytes per transfer.
@@ -1869,10 +1869,10 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
   size_t remaining;
   int ret = OK;
 
-  dmavdbg("xdmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
+  dmainfo("xdmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
           xdmach, (int)paddr, (int)maddr, (int)nbytes);
   DEBUGASSERT(xdmach);
-  dmavdbg("llhead: %p lltail: %p\n", xdmach->llhead, xdmach->lltail);
+  dmainfo("llhead: %p lltail: %p\n", xdmach->llhead, xdmach->lltail);
 
   /* The maximum transfer size in bytes depends upon the maximum number of
    * transfers and the number of bytes per transfer.
@@ -1944,7 +1944,7 @@ int sam_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
   struct sam_xdmach_s *xdmach = (struct sam_xdmach_s *)handle;
   int ret = -EINVAL;
 
-  dmavdbg("xdmach: %p callback: %p arg: %p\n", xdmach, callback, arg);
+  dmainfo("xdmach: %p callback: %p arg: %p\n", xdmach, callback, arg);
   DEBUGASSERT(xdmach != NULL);
 
   /* Verify that the DMA has been setup (i.e., at least one entry in the
@@ -1998,7 +1998,7 @@ void sam_dmastop(DMA_HANDLE handle)
   struct sam_xdmach_s *xdmach = (struct sam_xdmach_s *)handle;
   irqstate_t flags;
 
-  dmavdbg("xdmach: %p\n", xdmach);
+  dmainfo("xdmach: %p\n", xdmach);
   DEBUGASSERT(xdmach != NULL);
 
   flags = enter_critical_section();
@@ -2017,7 +2017,7 @@ void sam_dmastop(DMA_HANDLE handle)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs)
 {
   struct sam_xdmach_s *xdmach = (struct sam_xdmach_s *)handle;
@@ -2057,7 +2057,7 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs)
 
   leave_critical_section(flags);
 }
-#endif /* CONFIG_DEBUG_DMA */
+#endif /* CONFIG_DEBUG_DMA_INFO */
 
 /****************************************************************************
  * Name: sam_dmadump
@@ -2070,34 +2070,34 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void sam_dmadump(DMA_HANDLE handle, const struct sam_dmaregs_s *regs,
                  const char *msg)
 {
   struct sam_xdmach_s *xdmach = (struct sam_xdmach_s *)handle;
 
-  dmadbg("%s\n", msg);
-  dmadbg("  DMA Global Registers:\n");
-  dmadbg("     GTYPE[%08x]: %08x\n", SAM_XDMAC_GTYPE, regs->gtype);
-  dmadbg("      GCFG[%08x]: %08x\n", SAM_XDMAC_GCFG, regs->gcfg);
-  dmadbg("      GWAC[%08x]: %08x\n", SAM_XDMAC_GWAC, regs->gwac);
-  dmadbg("       GIM[%08x]: %08x\n", SAM_XDMAC_GIM, regs->gim);
-  dmadbg("        GS[%08x]: %08x\n", SAM_XDMAC_GS, regs->gs);
-  dmadbg("       GRS[%08x]: %08x\n", SAM_XDMAC_GRS, regs->grs);
-  dmadbg("       GWS[%08x]: %08x\n", SAM_XDMAC_GWS, regs->gws);
-  dmadbg("      GSWS[%08x]: %08x\n", SAM_XDMAC_GSWS, regs->gsws);
-  dmadbg("  DMA Channel Registers:\n");
-  dmadbg("       CIM[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CIM_OFFSET, regs->cim);
-  dmadbg("       CSA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CSA_OFFSET, regs->csa);
-  dmadbg("       CDA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDA_OFFSET, regs->cda);
-  dmadbg("      CNDA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CNDA_OFFSET, regs->cnda);
-  dmadbg("      CNDC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CNDC_OFFSET, regs->cndc);
-  dmadbg("      CUBC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CUBC_OFFSET, regs->cubc);
-  dmadbg("       CBC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CBC_OFFSET, regs->cbc);
-  dmadbg("        CC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CC_OFFSET, regs->cc);
-  dmadbg("    CDSMSP[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDSMSP_OFFSET, regs->cdsmsp);
-  dmadbg("      CSUS[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CSUS_OFFSET, regs->csus);
-  dmadbg("      CDUS[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDUS_OFFSET, regs->cdus);
+  dmainfo("%s\n", msg);
+  dmainfo("  DMA Global Registers:\n");
+  dmainfo("     GTYPE[%08x]: %08x\n", SAM_XDMAC_GTYPE, regs->gtype);
+  dmainfo("      GCFG[%08x]: %08x\n", SAM_XDMAC_GCFG, regs->gcfg);
+  dmainfo("      GWAC[%08x]: %08x\n", SAM_XDMAC_GWAC, regs->gwac);
+  dmainfo("       GIM[%08x]: %08x\n", SAM_XDMAC_GIM, regs->gim);
+  dmainfo("        GS[%08x]: %08x\n", SAM_XDMAC_GS, regs->gs);
+  dmainfo("       GRS[%08x]: %08x\n", SAM_XDMAC_GRS, regs->grs);
+  dmainfo("       GWS[%08x]: %08x\n", SAM_XDMAC_GWS, regs->gws);
+  dmainfo("      GSWS[%08x]: %08x\n", SAM_XDMAC_GSWS, regs->gsws);
+  dmainfo("  DMA Channel Registers:\n");
+  dmainfo("       CIM[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CIM_OFFSET, regs->cim);
+  dmainfo("       CSA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CSA_OFFSET, regs->csa);
+  dmainfo("       CDA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDA_OFFSET, regs->cda);
+  dmainfo("      CNDA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CNDA_OFFSET, regs->cnda);
+  dmainfo("      CNDC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CNDC_OFFSET, regs->cndc);
+  dmainfo("      CUBC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CUBC_OFFSET, regs->cubc);
+  dmainfo("       CBC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CBC_OFFSET, regs->cbc);
+  dmainfo("        CC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CC_OFFSET, regs->cc);
+  dmainfo("    CDSMSP[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDSMSP_OFFSET, regs->cdsmsp);
+  dmainfo("      CSUS[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CSUS_OFFSET, regs->csus);
+  dmainfo("      CDUS[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDUS_OFFSET, regs->cdus);
 }
-#endif /* CONFIG_DEBUG_DMA */
+#endif /* CONFIG_DEBUG_DMA_INFO */
 #endif /* CONFIG_SAMV7_XDMAC */
diff --git a/arch/arm/src/samv7/sam_xdmac.h b/arch/arm/src/samv7/sam_xdmac.h
index fe98581d08b7ecad25863eafbd2a630f483b7456..cfbf14fe0dd002ca98cbace12f9a11d534f520eb 100644
--- a/arch/arm/src/samv7/sam_xdmac.h
+++ b/arch/arm/src/samv7/sam_xdmac.h
@@ -50,12 +50,6 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* Configuration ********************************************************************/
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_DMA
-#endif
-
 /* DMA ******************************************************************************/
 
 /* Flags used to characterize the DMA channel.  The naming convention is that one
@@ -172,7 +166,7 @@ typedef void (*dma_callback_t)(DMA_HANDLE handle, void *arg, int result);
 
 /* The following is used for sampling DMA registers when CONFIG DEBUG_DMA is selected */
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 struct sam_dmaregs_s
 {
   /* Global Registers.
@@ -210,7 +204,7 @@ struct sam_dmaregs_s
   uint32_t csus;    /* Channel Source Microblock Stride */
   uint32_t cdus;    /* Channel Destination Microblock Stride */
 };
-#endif /* CONFIG_DEBUG_DMA */
+#endif /* CONFIG_DEBUG_DMA_INFO */
 
 /************************************************************************************
  * Inline Functions
@@ -342,7 +336,7 @@ void sam_dmastop(DMA_HANDLE handle);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs);
 #else
 #  define sam_dmasample(handle,regs)
@@ -356,7 +350,7 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void sam_dmadump(DMA_HANDLE handle, const struct sam_dmaregs_s *regs, const char *msg);
 #else
 #  define sam_dmadump(handle,regs,msg)
diff --git a/arch/arm/src/stm32/Kconfig b/arch/arm/src/stm32/Kconfig
index fc5eb833b5b1bc3d9cd08ec2029f17c918440f0a..53e1513e0b3cfeef1291a27e1d799d88671a4cd9 100644
--- a/arch/arm/src/stm32/Kconfig
+++ b/arch/arm/src/stm32/Kconfig
@@ -484,6 +484,16 @@ config ARCH_CHIP_STM32F105VB
 	select STM32_HAVE_I2C2
 	select STM32_HAVE_TIM4
 
+config ARCH_CHIP_STM32F105RB
+	bool "STM32F105RB"
+	select ARCH_CORTEXM3
+	select STM32_STM32F10XX
+	select STM32_CONNECTIVITYLINE
+	select STM32_HAVE_DAC1
+	select STM32_HAVE_DAC2
+	select STM32_HAVE_I2C2
+	select STM32_HAVE_TIM4
+
 config ARCH_CHIP_STM32F107VC
 	bool "STM32F107VC"
 	select ARCH_CORTEXM3
@@ -626,6 +636,7 @@ config ARCH_CHIP_STM32F303CB
 	select STM32_STM32F303
 	select ARCH_HAVE_FPU
 	select STM32_HAVE_ADC3
+	select STM32_HAVE_ADC4
 	select STM32_HAVE_I2C2
 	select STM32_HAVE_SPI2
 	select STM32_HAVE_SPI3
@@ -641,6 +652,7 @@ config ARCH_CHIP_STM32F303CC
 	select STM32_STM32F303
 	select ARCH_HAVE_FPU
 	select STM32_HAVE_ADC3
+	select STM32_HAVE_ADC4
 	select STM32_HAVE_I2C2
 	select STM32_HAVE_SPI2
 	select STM32_HAVE_SPI3
@@ -656,6 +668,7 @@ config ARCH_CHIP_STM32F303RB
 	select STM32_STM32F303
 	select ARCH_HAVE_FPU
 	select STM32_HAVE_ADC3
+	select STM32_HAVE_ADC4
 	select STM32_HAVE_I2C2
 	select STM32_HAVE_SPI2
 	select STM32_HAVE_SPI3
@@ -673,6 +686,7 @@ config ARCH_CHIP_STM32F303RC
 	select STM32_STM32F303
 	select ARCH_HAVE_FPU
 	select STM32_HAVE_ADC3
+	select STM32_HAVE_ADC4
 	select STM32_HAVE_I2C2
 	select STM32_HAVE_SPI2
 	select STM32_HAVE_SPI3
@@ -730,6 +744,7 @@ config ARCH_CHIP_STM32F303VB
 	select STM32_STM32F303
 	select ARCH_HAVE_FPU
 	select STM32_HAVE_ADC3
+	select STM32_HAVE_ADC4
 	select STM32_HAVE_I2C2
 	select STM32_HAVE_SPI2
 	select STM32_HAVE_SPI3
@@ -747,6 +762,7 @@ config ARCH_CHIP_STM32F303VC
 	select STM32_STM32F303
 	select ARCH_HAVE_FPU
 	select STM32_HAVE_ADC3
+	select STM32_HAVE_ADC4
 	select STM32_HAVE_I2C2
 	select STM32_HAVE_SPI2
 	select STM32_HAVE_SPI3
@@ -757,6 +773,60 @@ config ARCH_CHIP_STM32F303VC
 	select STM32_HAVE_UART5
 	select STM32_HAVE_USBDEV
 
+config ARCH_CHIP_STM32F334K4
+	bool "STM32F334K4"
+	select ARCH_CORTEXM4
+	select STM32_STM32F33XX
+	select ARCH_HAVE_FPU
+
+config ARCH_CHIP_STM32F334K6
+	bool "STM32F334K6"
+	select ARCH_CORTEXM4
+	select STM32_STM32F33XX
+	select ARCH_HAVE_FPU
+
+config ARCH_CHIP_STM32F334K8
+	bool "STM32F334K8"
+	select ARCH_CORTEXM4
+	select STM32_STM32F33XX
+	select ARCH_HAVE_FPU
+
+config ARCH_CHIP_STM32F334C4
+	bool "STM32F334C4"
+	select ARCH_CORTEXM4
+	select STM32_STM32F33XX
+	select ARCH_HAVE_FPU
+
+config ARCH_CHIP_STM32F334C6
+	bool "STM32F334C6"
+	select ARCH_CORTEXM4
+	select STM32_STM32F33XX
+	select ARCH_HAVE_FPU
+
+config ARCH_CHIP_STM32F334C8
+	bool "STM32F334C8"
+	select ARCH_CORTEXM4
+	select STM32_STM32F33XX
+	select ARCH_HAVE_FPU
+
+config ARCH_CHIP_STM32F334R4
+	bool "STM32F334R4"
+	select ARCH_CORTEXM4
+	select STM32_STM32F33XX
+	select ARCH_HAVE_FPU
+
+config ARCH_CHIP_STM32F334R6
+	bool "STM32F334R6"
+	select ARCH_CORTEXM4
+	select STM32_STM32F33XX
+	select ARCH_HAVE_FPU
+
+config ARCH_CHIP_STM32F334R8
+	bool "STM32F334R8"
+	select ARCH_CORTEXM4
+	select STM32_STM32F33XX
+	select ARCH_HAVE_FPU
+
 config ARCH_CHIP_STM32F372C8
 	bool "STM32F372C8"
 	select ARCH_CORTEXM4
@@ -1196,7 +1266,6 @@ config STM32_CONNECTIVITYLINE
 	select STM32_HAVE_TIM5
 	select STM32_HAVE_TIM6
 	select STM32_HAVE_TIM7
-	select STM32_HAVE_TIM8
 	select STM32_HAVE_ADC2
 	select STM32_HAVE_CAN1
 	select STM32_HAVE_CAN2
@@ -1373,6 +1442,25 @@ config STM32_STM32F303
 	select STM32_HAVE_DAC2
 	select STM32_HAVE_TIM7
 
+config STM32_STM32F33XX
+	bool
+       	default n
+	select STM32_HAVE_HRTIM1
+	select STM32_HAVE_COMP2
+	select STM32_HAVE_COMP4
+	select STM32_HAVE_COMP6
+	select STM32_HAVE_OPAMP
+	select STM32_HAVE_CCM
+	select STM32_HAVE_TIM1
+	select STM32_HAVE_TIM15
+	select STM32_HAVE_TIM16
+	select STM32_HAVE_TIM17
+	select STM32_HAVE_ADC2
+	select STM32_HAVE_CAN1
+	select STM32_HAVE_DAC1
+	select STM32_HAVE_DAC2
+	select STM32_HAVE_USART3
+
 config STM32_STM32F37XX
 	bool
 	default n
@@ -1385,10 +1473,15 @@ config STM32_STM32F37XX
 	select STM32_HAVE_TIM15
 	select STM32_HAVE_TIM16
 	select STM32_HAVE_TIM17
+	select STM32_HAVE_SDADC1
+	select STM32_HAVE_SDADC2
+	select STM32_HAVE_SDADC3
 	select STM32_HAVE_CAN1
 	select STM32_HAVE_DAC1
 	select STM32_HAVE_DAC2
 	select STM32_HAVE_I2C2
+	select STM32_HAVE_SPI2
+	select STM32_HAVE_SPI3
 	select STM32_HAVE_USART3
 
 config STM32_STM32F40XX
@@ -1560,6 +1653,10 @@ config STM32_STM32F446
 	select STM32_HAVE_UART5
 	select STM32_HAVE_USART6
 	select STM32_HAVE_TIM1
+	select STM32_HAVE_TIM2
+	select STM32_HAVE_TIM3
+	select STM32_HAVE_TIM4
+	select STM32_HAVE_TIM5
 	select STM32_HAVE_TIM6
 	select STM32_HAVE_TIM7
 	select STM32_HAVE_TIM8
@@ -1593,6 +1690,10 @@ config STM32_STM32F469
 	select STM32_HAVE_UART7
 	select STM32_HAVE_UART8
 	select STM32_HAVE_TIM1
+	select STM32_HAVE_TIM2
+	select STM32_HAVE_TIM3
+	select STM32_HAVE_TIM4
+	select STM32_HAVE_TIM5
 	select STM32_HAVE_TIM6
 	select STM32_HAVE_TIM7
 	select STM32_HAVE_TIM8
@@ -1612,6 +1713,9 @@ config STM32_STM32F469
 	select STM32_HAVE_SPI4
 	select STM32_HAVE_SPI5
 	select STM32_HAVE_SPI6
+        select STM32_HAVE_SAIPLL
+        select STM32_HAVE_I2SPLL
+
 
 config STM32_DFU
 	bool "DFU bootloader"
@@ -1642,6 +1746,10 @@ config STM32_HAVE_FSMC
 	bool
 	default n
 
+config STM32_HAVE_HRTIM1
+	bool
+	default n
+
 config STM32_HAVE_LTDC
 	bool
 	default n
@@ -1766,6 +1874,30 @@ config STM32_HAVE_ADC4_DMA
 	bool
 	default n
 
+config STM32_HAVE_SDADC1
+	bool
+	default n
+
+config STM32_HAVE_SDADC2
+	bool
+	default n
+
+config STM32_HAVE_SDADC3
+	bool
+	default n
+
+config STM32_HAVE_SDADC1_DMA
+	bool
+	default n
+
+config STM32_HAVE_SDADC2_DMA
+	bool
+	default n
+
+config STM32_HAVE_SDADC3_DMA
+	bool
+	default n
+
 config STM32_HAVE_CAN1
 	bool
 	default n
@@ -1774,6 +1906,18 @@ config STM32_HAVE_CAN2
 	bool
 	default n
 
+config STM32_HAVE_COMP2
+       bool
+       default n
+
+config STM32_HAVE_COMP4
+       bool
+       default n
+
+config STM32_HAVE_COMP6
+       bool
+       default n
+
 config STM32_HAVE_DAC1
 	bool
 	default n
@@ -1826,6 +1970,10 @@ config STM32_HAVE_I2SPLL
 	bool
 	default n
 
+config STM32_HAVE_OPAMP
+       bool
+       default n
+
 # These are the peripheral selections proper
 
 config STM32_ADC1
@@ -1833,6 +1981,7 @@ config STM32_ADC1
 	default n
 	select STM32_ADC
 	select STM32_HAVE_ADC1_DMA if STM32_STM32F10XX && STM32_DMA1
+	select STM32_HAVE_ADC1_DMA if STM32_STM32F37XX && STM32_DMA1
 	select STM32_HAVE_ADC1_DMA if !STM32_STM32F10XX && STM32_DMA2
 
 config STM32_ADC2
@@ -1856,11 +2005,47 @@ config STM32_ADC4
 	depends on STM32_HAVE_ADC4
 	select STM32_HAVE_ADC4_DMA if STM32_DMA2
 
+config STM32_SDADC1
+	bool "SDADC1"
+	default n
+	select STM32_SDADC
+	depends on STM32_HAVE_SDADC1
+	select STM32_HAVE_SDADC1_DMA if STM32_DMA2
+
+config STM32_SDADC2
+	bool "SDADC2"
+	default n
+	select STM32_SDADC
+	depends on STM32_HAVE_SDADC2
+	select STM32_HAVE_SDADC2_DMA if STM32_DMA2
+
+config STM32_SDADC3
+	bool "SDADC3"
+	default n
+	select STM32_SDADC
+	depends on STM32_HAVE_SDADC3
+	select STM32_HAVE_SDADC3_DMA if STM32_DMA2
+
 config STM32_COMP
 	bool "COMP"
 	default n
 	depends on STM32_STM32L15XX
 
+config STM32_COMP2
+	bool "COMP2"
+	default n
+	depends on STM32_HAVE_COMP2
+
+config STM32_COMP4
+	bool "COMP4"
+	default n
+	depends on STM32_HAVE_COMP4
+
+config STM32_COMP6
+	bool "COMP6"
+	default n
+	depends on STM32_HAVE_COMP6
+
 config STM32_BKP
 	bool "BKP"
 	default n
@@ -1956,6 +2141,11 @@ config STM32_HASH
 	default n
 	depends on STM32_STM32F207 || STM32_STM32F40XX
 
+config STM32_HRTIM1
+	bool "HRTIM1"
+	default n
+	depends on STM32_HAVE_HRTIM1
+
 config STM32_I2C1
 	bool "I2C1"
 	default n
@@ -1991,6 +2181,11 @@ config STM32_DMA2D
 		The STM32 DMA2D is an Chrom-Art Accelerator for image manipulation
 		available on the STM32F429 and STM32F439 devices.
 
+config STM32_OPAMP
+	bool "OPAMP"
+	default n
+	depends on STM32_HAVE_OPAMP
+
 config STM32_OTGFS
 	bool "OTG FS"
 	default n
@@ -2065,7 +2260,7 @@ config STM32_SPI6
 config STM32_SYSCFG
 	bool "SYSCFG"
 	default y
-	depends on STM32_STM32L15XX || STM32_STM32F30XX || STM32_STM32F37XX || STM32_STM32F207 || STM32_STM32F40XX
+	depends on STM32_STM32L15XX || STM32_STM32F30XX || STM32_STM32F37XX || STM32_STM32F207 || STM32_STM32F40XX || STM32_CONNECTIVITYLINE
 
 config STM32_TIM1
 	bool "TIM1"
@@ -2228,6 +2423,9 @@ endmenu
 config STM32_ADC
 	bool
 
+config STM32_SDADC
+	bool
+
 config STM32_DAC
 	bool
 
@@ -2532,6 +2730,67 @@ config STM32_FSMC_SRAM
 	---help---
 		In addition to internal SRAM, SRAM may also be available through the FSMC.
 
+menu "Timer Configuration"
+
+if SCHED_TICKLESS
+
+config STM32_ONESHOT
+	bool
+	default y
+
+config STM32_FREERUN
+	bool
+	default y
+
+config STM32_TICKLESS_ONESHOT
+	int "Tickless one-shot timer channel"
+	default 2
+	range 1 14
+	depends on STM32_ONESHOT
+	---help---
+		If the Tickless OS feature is enabled, the one clock must be
+		assigned to provided the one-shot timer needed by the OS.
+
+config STM32_TICKLESS_FREERUN
+	int "Tickless free-running timer channel"
+	default 5
+	range 1 14
+	depends on STM32_FREERUN
+	---help---
+		If the Tickless OS feature is enabled, the one clock must be
+		assigned to provided the free-running timer needed by the OS.
+
+endif # SCHED_TICKLESS
+
+if !SCHED_TICKLESS
+
+config STM32_ONESHOT
+	bool "TIM one-shot wrapper"
+	default n
+	---help---
+		Enable a wrapper around the low level timer/counter functions to
+		support one-shot timer.
+
+config STM32_FREERUN
+	bool "TIM free-running wrapper"
+	default n
+	---help---
+		Enable a wrapper around the low level timer/counter functions to
+		support a free-running timer.
+
+endif # !SCHED_TICKLESS
+
+config STM32_ONESHOT_MAXTIMERS
+	int "Maximum number of oneshot timers"
+	default 1
+	range 1 8
+	depends on STM32_ONESHOT
+	---help---
+		Determines the maximum number of oneshot timers that can be
+		supported.  This setting pre-allocates some minimal support for each
+		of the timers and places an upper limit on the number of oneshot
+		timers that you can use.
+
 config STM32_TIM1_PWM
 	bool "TIM1 PWM"
 	default n
@@ -5299,6 +5558,8 @@ config STM32_TIM14_CAP
 		Timer devices may be used for different purposes.  One special purpose is
 		to capture input.
 
+endmenu # Timer Configuration
+
 menu "ADC Configuration"
 	depends on STM32_ADC
 
@@ -5340,6 +5601,38 @@ config STM32_ADC4_DMA
 
 endmenu
 
+menu "SDADC Configuration"
+	depends on STM32_SDADC
+
+config STM32_SDADC1_DMA
+	bool "SDADC1 DMA"
+	depends on STM32_SDADC1 && STM32_HAVE_SDADC1_DMA
+	default n
+	---help---
+		If DMA is selected, then the SDADC may be configured to support
+		DMA transfer, which is advisable if multiple channels are read
+		or if very high trigger frequencies are used.
+
+config STM32_SDADC2_DMA
+	bool "SDADC2 DMA"
+	depends on STM32_SDADC2 && STM32_HAVE_SDADC2_DMA
+	default n
+	---help---
+		If DMA is selected, then the SDADC may be configured to support
+		DMA transfer, which is advisable if multiple channels are read
+		or if very high trigger frequencies are used.
+
+config STM32_SDADC3_DMA
+	bool "SDADC3 DMA"
+	depends on STM32_SDADC3 && STM32_HAVE_SDADC3_DMA
+	default n
+	---help---
+		If DMA is selected, then the SDADC may be configured to support
+		DMA transfer, which is advisable if multiple channels are read
+		or if very high trigger frequencies are used.
+
+endmenu
+
 menu "DAC Configuration"
 	depends on STM32_DAC1 || STM32_DAC2
 
@@ -5901,21 +6194,23 @@ endmenu
 menu "SDIO Configuration"
 	depends on STM32_SDIO
 
-config SDIO_DMA
+config STM32_SDIO_DMA
 	bool "Support DMA data transfers"
 	default y if STM32_DMA2
+	default n if !STM32_DMA2
+	select SDIO_DMA
 	depends on STM32_DMA2
 	---help---
 		Support DMA data transfers.  Requires STM32_SDIO and config STM32_DMA2.
 
-config SDIO_PRI
+config STM32_SDIO_PRI
 	hex "SDIO interrupt priority"
 	default 128
 	depends on ARCH_IRQPRIO && EXPERIMENTAL
 	---help---
 		Select SDIO interrupt priority.  Default: 128.
 
-config SDIO_DMAPRIO
+config STM32_SDIO_DMAPRIO
 	hex "SDIO DMA priority"
 	default 0x00001000 if STM32_STM32F10XX
 	default 0x00010000 if !STM32_STM32F10XX
@@ -5928,7 +6223,7 @@ config SDIO_DMAPRIO
 		For other STM32's, options are: 0x00000000 low, 0x00010000 medium,
 		0x00020000 high, 0x00030000 very high.  Default: medium.
 
-config SDIO_WIDTH_D1_ONLY
+config STM32_SDIO_WIDTH_D1_ONLY
 	bool "Use D1 only"
 	default n
 	---help---
@@ -5993,8 +6288,8 @@ config RTC_HSECLOCK
 
 endchoice
 
-if STM32_ETHMAC
 menu "Ethernet MAC configuration"
+	depends on STM32_ETHMAC
 
 config STM32_PHYADDR
 	int "PHY address"
@@ -6198,15 +6493,34 @@ config STM32_RMII_EXTCLK
 
 endchoice
 
+choice
+	prompt "Work queue"
+	default STM32_ETHMAC_LPWORK if SCHED_LPWORK
+	default STM32_ETHMAC_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the Ethernet driver.  If the
+		low priority work queue is available, then it should be used by the
+		driver.
+
+config STM32_ETHMAC_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
+
+config STM32_ETHMAC_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
+
+endchoice # Work queue
+
 config STM32_ETHMAC_REGDEBUG
 	bool "Register-Level Debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_NET_INFO
 	---help---
-		Enable very low-level register access debug.  Depends on DEBUG.
+		Enable very low-level register access debug.  Depends on CONFIG_DEBUG_FEATURES.
 
-endmenu
-endif
+endmenu # Ethernet MAC configuration
 
 menu "USB FS Host Configuration"
 
@@ -6291,16 +6605,16 @@ menu "USB Host Debug Configuration"
 config STM32_USBHOST_REGDEBUG
 	bool "Register-Level Debug"
 	default n
-	depends on USBHOST && (STM32_OTGFS || STM32_OTGHS)
+	depends on USBHOST && DEBUG_USB_INFO && (STM32_OTGFS || STM32_OTGHS)
 	---help---
-		Enable very low-level register access debug.  Depends on DEBUG.
+		Enable very low-level register access debug.
 
 config STM32_USBHOST_PKTDUMP
 	bool "Packet Dump Debug"
 	default n
-	depends on USBHOST && (STM32_OTGFS || STM32_OTGHS)
+	depends on USBHOST && DEBUG_USB_INFO && (STM32_OTGFS || STM32_OTGHS)
 	---help---
-		Dump all incoming and outgoing USB packets. Depends on DEBUG.
+		Dump all incoming and outgoing USB packets.
 
 endmenu
 
@@ -6319,21 +6633,21 @@ config STM32_USB_ITRMP
 		F3 family and selects the use of the dedicated USB interrupts.
 
 menu "CAN driver configuration"
-	depends on STM32_CAN1 || STM32_CAN2
+	depends on STM32_CAN
 
 config CAN1_BAUD
 	int "CAN1 BAUD"
 	default 250000
 	depends on STM32_CAN1
 	---help---
-		CAN1 BAUD rate.  Required if STM32_CAN1 is defined.
+		CAN1 BAUD rate.  Required if CONFIG_STM32_CAN1 is defined.
 
 config CAN2_BAUD
 	int "CAN2 BAUD"
 	default 250000
 	depends on STM32_CAN2
 	---help---
-		CAN2 BAUD rate.  Required if STM32_CAN2 is defined.
+		CAN2 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
 
 config CAN_TSEG1
 	int "TSEG1 quanta"
@@ -6346,6 +6660,15 @@ config CAN_TSEG2
 	default 7
 	---help---
 		The number of CAN time quanta in segment 2. Default: 7
+
+config STM32_CAN_REGDEBUG
+	bool "CAN Register level debug"
+	depends on DEBUG_CAN_INFO
+	default n
+	---help---
+		Output detailed register-level CAN device debug information.
+		Requires also CONFIG_DEBUG_CAN_INFO.
+
 endmenu
 
 if STM32_LTDC
@@ -6563,11 +6886,12 @@ config STM32_TIM1_QE
 
 if STM32_TIM1_QE
 
-config STM32_TIM1_QECLKOUT
-	int "TIM1 output clock"
-	default 2800000
+config STM32_TIM1_QEPSC
+	int "TIM1 pulse prescaler"
+	default 1
 	---help---
-		The output clock of TIM1.
+		This prescaler divides the number of recorded encoder pulses,
+		limiting the count rate at the expense of resolution.
 
 endif
 
@@ -6580,11 +6904,12 @@ config STM32_TIM2_QE
 
 if STM32_TIM2_QE
 
-config STM32_TIM2_QECLKOUT
-	int "TIM2 output clock"
-	default 2800000
+config STM32_TIM2_QEPSC
+	int "TIM2 pulse prescaler"
+	default 1
 	---help---
-		The output clock of TIM2.
+		This prescaler divides the number of recorded encoder pulses,
+		limiting the count rate at the expense of resolution.
 
 endif
 
@@ -6597,11 +6922,12 @@ config STM32_TIM3_QE
 
 if STM32_TIM3_QE
 
-config STM32_TIM3_QECLKOUT
-	int "TIM3 output clock"
-	default 2800000
+config STM32_TIM3_QEPSC
+	int "TIM3 pulse prescaler"
+	default 1
 	---help---
-		The output clock of TIM3.
+		This prescaler divides the number of recorded encoder pulses,
+		limiting the count rate at the expense of resolution.
 
 endif
 
@@ -6614,11 +6940,12 @@ config STM32_TIM4_QE
 
 if STM32_TIM4_QE
 
-config STM32_TIM4_QECLKOUT
-	int "TIM4 output clock"
-	default 2800000
+config STM32_TIM4_QEPSC
+	int "TIM4 pulse prescaler"
+	default 1
 	---help---
-		The output clock of TIM4.
+		This prescaler divides the number of recorded encoder pulses,
+		limiting the count rate at the expense of resolution.
 
 endif
 
@@ -6631,11 +6958,12 @@ config STM32_TIM5_QE
 
 if STM32_TIM5_QE
 
-config STM32_TIM5_QECLKOUT
-	int "TIM5 output clock"
-	default 2800000
+config STM32_TIM5_QEPSC
+	int "TIM5 pulse prescaler"
+	default 1
 	---help---
-		The output clock of TIM5.
+		This prescaler divides the number of recorded encoder pulses,
+		limiting the count rate at the expense of resolution.
 
 endif
 
@@ -6648,11 +6976,12 @@ config STM32_TIM8_QE
 
 if STM32_TIM8_QE
 
-config STM32_TIM8_QECLKOUT
-	int "TIM8 output clock"
-	default 2800000
+config STM32_TIM8_QEPSC
+	int "TIM8 pulse prescaler"
+	default 1
 	---help---
-		The output clock of TIM8.
+		This prescaler divides the number of recorded encoder pulses,
+		limiting the count rate at the expense of resolution.
 
 endif
 
diff --git a/arch/arm/src/stm32/Make.defs b/arch/arm/src/stm32/Make.defs
index 98c1bad6463b166be2c28848399bb40c8b297d09..1558c8417d5c78b8713c64a0c96fa29f62e659fe 100644
--- a/arch/arm/src/stm32/Make.defs
+++ b/arch/arm/src/stm32/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # arch/arm/src/stm32/Make.defs
 #
-#   Copyright (C) 2009, 2011-2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2009, 2011-2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -71,10 +71,6 @@ ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
 CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
 endif
 
-ifeq ($(CONFIG_ARCH_MEMCPY),y)
-CMN_ASRCS += up_memcpy.S
-endif
-
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
 CMN_CSRCS += up_mpu.c up_task_start.c up_pthread_start.c
 ifneq ($(CONFIG_DISABLE_SIGNALS),y)
@@ -87,12 +83,6 @@ ifeq ($(CONFIG_STACK_COLORATION),y)
 CMN_CSRCS += up_checkstack.c
 endif
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c
-endif
-
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += up_fpu.S
 ifneq ($(CONFIG_ARMV7M_CMNVECTOR),y)
@@ -109,10 +99,10 @@ endif
 CHIP_ASRCS  =
 
 CHIP_CSRCS  = stm32_allocateheap.c stm32_start.c stm32_rcc.c stm32_lse.c
-CHIP_CSRCS += stm32_lsi.c stm32_gpio.c stm32_exti_gpio.c stm32_flash.c stm32_irq.c
-CHIP_CSRCS += stm32_dma.c stm32_lowputc.c stm32_serial.c stm32_spi.c
-CHIP_CSRCS += stm32_sdio.c stm32_tim.c stm32_waste.c stm32_ccm.c stm32_uid.c
-CHIP_CSRCS += stm32_capture.c
+CHIP_CSRCS += stm32_lsi.c stm32_gpio.c stm32_exti_gpio.c stm32_flash.c
+CHIP_CSRCS += stm32_irq.c stm32_dma.c stm32_lowputc.c
+CHIP_CSRCS += stm32_serial.c stm32_spi.c stm32_sdio.c stm32_tim.c
+CHIP_CSRCS += stm32_waste.c stm32_ccm.c stm32_uid.c stm32_capture.c
 
 ifeq ($(CONFIG_TIMER),y)
 CHIP_CSRCS += stm32_tim_lowerhalf.c
@@ -120,6 +110,16 @@ endif
 
 ifneq ($(CONFIG_SCHED_TICKLESS),y)
 CHIP_CSRCS += stm32_timerisr.c
+else
+CHIP_CSRCS += stm32_tickless.c
+endif
+
+ifeq ($(CONFIG_STM32_ONESHOT),y)
+CHIP_CSRCS += stm32_oneshot.c stm32_oneshot_lowerhalf.c
+endif
+
+ifeq ($(CONFIG_STM32_FREERUN),y)
+CHIP_CSRCS += stm32_freerun.c
 endif
 
 ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
@@ -136,13 +136,15 @@ endif
 
 ifeq ($(CONFIG_STM32_I2C_ALT),y)
 CHIP_CSRCS += stm32_i2c_alt.c
-else
-ifeq ($(CONFIG_STM32_STM32F30XX),y)
+else ifeq ($(CONFIG_STM32_STM32F30XX),y)
+CHIP_CSRCS += stm32f30xxx_i2c.c
+else ifeq ($(CONFIG_STM32_STM32F37XX),y)
 CHIP_CSRCS += stm32f30xxx_i2c.c
+else ifeq ($(CONFIG_STM32_STM32F40XX),y)
+CHIP_CSRCS += stm32f40xxx_i2c.c
 else
 CHIP_CSRCS += stm32_i2c.c
 endif
-endif
 
 ifeq ($(CONFIG_USBDEV),y)
 ifeq ($(CONFIG_STM32_USB),y)
@@ -207,6 +209,10 @@ ifeq ($(CONFIG_STM32_ADC),y)
 CHIP_CSRCS += stm32_adc.c
 endif
 
+ifeq ($(CONFIG_STM32_SDADC),y)
+CHIP_CSRCS += stm32_sdadc.c
+endif
+
 ifeq ($(CONFIG_DAC),y)
 CHIP_CSRCS += stm32_dac.c
 endif
@@ -247,7 +253,7 @@ ifeq ($(CONFIG_STM32_WWDG),y)
 CHIP_CSRCS += stm32_wwdg.c
 endif
 
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
 CHIP_CSRCS += stm32_dumpgpio.c
 endif
 
diff --git a/arch/arm/src/stm32/chip.h b/arch/arm/src/stm32/chip.h
index bba330edfaf7741f1a4d150cbefa3e63f2c1dc8f..64ec1db604977d383218b6a66d6c5d170bc584c6 100644
--- a/arch/arm/src/stm32/chip.h
+++ b/arch/arm/src/stm32/chip.h
@@ -109,6 +109,9 @@
 #  elif defined(CONFIG_ARCH_CHIP_STM32F105VB)
 #    include "chip/stm32f105v_pinmap.h"
 
+#  elif defined(CONFIG_ARCH_CHIP_STM32F105RB)
+#    include "chip/stm32f105r_pinmap.h"
+
 #  elif defined(CONFIG_ARCH_CHIP_STM32F107VC)
 #    include "chip/stm32f107v_pinmap.h"
 #  else
@@ -124,6 +127,8 @@
 
 #elif defined(CONFIG_STM32_STM32F30XX)
 #  include "chip/stm32f30xxx_pinmap.h"
+#elif defined(CONFIG_STM32_STM32F33XX)
+#  include "chip/stm32f33xxx_pinmap.h"
 #elif defined(CONFIG_STM32_STM32F37XX)
 #  include "chip/stm32f37xxx_pinmap.h"
 
@@ -148,6 +153,8 @@
 #    include "chip/stm32f20xxx_vectors.h"
 #  elif defined(CONFIG_STM32_STM32F30XX)
 #    include "chip/stm32f30xxx_vectors.h"
+#  elif defined(CONFIG_STM32_STM32F33XX)
+#    include "chip/stm32f33xxx_vectors.h"
 #  elif defined(CONFIG_STM32_STM32F37XX)
 #    include "chip/stm32f37xxx_vectors.h"
 #  elif defined(CONFIG_STM32_STM32F40XX)
diff --git a/arch/arm/src/stm32/chip/stm32_adc.h b/arch/arm/src/stm32/chip/stm32_adc.h
index 3a59ba25a8879f260bc86a38cb35f96e6dc27ba6..8a9eb956b673056b324dacac856b3f0c8315a0e7 100644
--- a/arch/arm/src/stm32/chip/stm32_adc.h
+++ b/arch/arm/src/stm32/chip/stm32_adc.h
@@ -1,7 +1,7 @@
 /****************************************************************************************************
  * arch/arm/src/stm32/chip/stm32_adc.h
  *
- *   Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -261,6 +261,7 @@
 #    define ADC_CR1_RES_8BIT         (2 << ADC_CR1_RES_SHIFT) /* 11 ADCCLK cycles. For STM32L15XX: 9 ADCCLK cycles */
 #    define ADC_CR1_RES_6BIT         (3 << ADC_CR1_RES_SHIFT) /* 9 ADCCLK cycles. For STM32L15XX: 7 ADCCLK cycles */
 #  define ADC_CR1_OVRIE              (1 << 26) /* Bit 26: Overrun interrupt enable */
+#  define ADC_CR1_RESERVED           (0xfb3f0000)
 #endif
 
 /* ADC control register 2 */
@@ -391,7 +392,7 @@
 #    define ADC_CR2_EXTEN_BOTH       (3 << ADC_CR2_EXTEN_SHIFT) /* 11: Trigger detection on both the rising and falling edges */
 
 #  define ADC_CR2_SWSTART            (1 << 30) /* Bit 30: Start Conversion of regular channels */
-
+#  define ADC_CR2_RESERVED           (0x8080f0fc)
 #else
 #  define ADC_CR2_JEXTSEL_SHIFT      (12)      /* Bits 12-14: External event select for injected group */
 #  define ADC_CR2_JEXTSEL_MASK       (7 << ADC_CR2_JEXTSEL_SHIFT)
@@ -477,7 +478,7 @@
 #  define ADC_SMPR1_SMP17_SHIFT      (21)      /* Bits 21-23: Channel 17 Sample time selection */
 #  define ADC_SMPR1_SMP17_MASK       (7 << ADC_SMPR1_SMP17_SHIFT)
 #  if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
-#    define ADC_SMPR1_SMP18_SHIFT    (21)      /* Bits 24-26: Channel 18 Sample time selection */
+#    define ADC_SMPR1_SMP18_SHIFT    (24)      /* Bits 24-26: Channel 18 Sample time selection */
 #    define ADC_SMPR1_SMP18_MASK     (7 << ADC_SMPR1_SMP17_SHIFT)
 #  endif
 #else
diff --git a/arch/arm/src/stm32/chip/stm32_can.h b/arch/arm/src/stm32/chip/stm32_can.h
index 6b4a12a855e8d442119699ee32ee9adf9581396d..c1e3500d5e68bc1217b820a5fe88435d31fe0b5a 100644
--- a/arch/arm/src/stm32/chip/stm32_can.h
+++ b/arch/arm/src/stm32/chip/stm32_can.h
@@ -360,7 +360,7 @@
 #define CAN_BTR_SJW_SHIFT         (24)      /* Bits 25-24: Resynchronization Jump Width */
 #define CAN_BTR_SJW_MASK          (3 << CAN_BTR_SJW_SHIFT)
 #define CAN_BTR_LBKM              (1 << 30) /* Bit 30: Loop Back Mode (Debug) */
-#define CAN_BTR_SILM              (1 << 31) /* Bit 31: Silent Mode (Debug) */
+#define CAN_BTR_SILM              (1ul << 31) /* Bit 31: Silent Mode (Debug) */
 
 #define CAN_BTR_BRP_MAX           (1024)    /* Maximum BTR value (without decrement) */
 #define CAN_BTR_TSEG1_MAX         (16)      /* Maximum TSEG1 value (without decrement) */
diff --git a/arch/arm/src/stm32/chip/stm32_dac.h b/arch/arm/src/stm32/chip/stm32_dac.h
index 1eadecb89492811c518acc99ef4b0433010bca43..48ea76280ec5cbe1d302e2f1cd755ef01305ac77 100644
--- a/arch/arm/src/stm32/chip/stm32_dac.h
+++ b/arch/arm/src/stm32/chip/stm32_dac.h
@@ -51,35 +51,71 @@
 
 #define STM32_DAC_CR_OFFSET       0x0000 /* DAC control register */
 #define STM32_DAC_SWTRIGR_OFFSET  0x0004 /* DAC software trigger register */
-#define STM32_DAC_DHR12R1_OFFSET  0x0008 /* DAC channel1 12-bit right-aligned data holding register */
-#define STM32_DAC_DHR12L1_OFFSET  0x000c /* DAC channel1 12-bit left aligned data holding register */
-#define STM32_DAC_DHR8R1_OFFSET   0x0010 /* DAC channel1 8-bit right aligned data holding register */
-#define STM32_DAC_DHR12R2_OFFSET  0x0014 /* DAC channel2 12-bit right aligned data holding register */
-#define STM32_DAC_DHR12L2_OFFSET  0x0018 /* DAC channel2 12-bit left aligned data holding register */
-#define STM32_DAC_DHR8R2_OFFSET   0x001c /* DAC channel2 8-bit right-aligned data holding register */
+#define STM32_DAC_DHR12R1_OFFSET  0x0008 /* DAC channel 1 12-bit right-aligned data holding register */
+#define STM32_DAC_DHR12L1_OFFSET  0x000c /* DAC channel 1 12-bit left aligned data holding register */
+#define STM32_DAC_DHR8R1_OFFSET   0x0010 /* DAC channel 1 8-bit right aligned data holding register */
+#define STM32_DAC_DHR12R2_OFFSET  0x0014 /* DAC channel 2 12-bit right aligned data holding register */
+#define STM32_DAC_DHR12L2_OFFSET  0x0018 /* DAC channel 2 12-bit left aligned data holding register */
+#define STM32_DAC_DHR8R2_OFFSET   0x001c /* DAC channel 2 8-bit right-aligned data holding register */
 #define STM32_DAC_DHR12RD_OFFSET  0x0020 /* Dual DAC 12-bit right-aligned data holding register */
 #define STM32_DAC_DHR12LD_OFFSET  0x0024 /* DUAL DAC 12-bit left aligned data holding register */
 #define STM32_DAC_DHR8RD_OFFSET   0x0028 /* DUAL DAC 8-bit right aligned data holding register */
-#define STM32_DAC_DOR1_OFFSET     0x002c /* DAC channel1 data output register */
-#define STM32_DAC_DOR2_OFFSET     0x0030 /* DAC channel2 data output register */
+#define STM32_DAC_DOR1_OFFSET     0x002c /* DAC channel 1 data output register */
+#define STM32_DAC_DOR2_OFFSET     0x0030 /* DAC channel 2 data output register */
 #define STM32_DAC_SR_OFFSET       0x0034 /* DAC status register */
 
 /* Register Addresses ***************************************************************/
 
-#define STM32_DAC_CR              (STM32_DAC_BASE+STM32_DAC_CR_OFFSET)
-#define STM32_DAC_SWTRIGR         (STM32_DAC_BASE+STM32_DAC_SWTRIGR_OFFSET)
-#define STM32_DAC_DHR12R1         (STM32_DAC_BASE+STM32_DAC_DHR12R1_OFFSET)
-#define STM32_DAC_DHR12L1         (STM32_DAC_BASE+STM32_DAC_DHR12L1_OFFSET)
-#define STM32_DAC_DHR8R1          (STM32_DAC_BASE+STM32_DAC_DHR8R1_OFFSET)
-#define STM32_DAC_DHR12R2         (STM32_DAC_BASE+STM32_DAC_DHR12R2_OFFSET)
-#define STM32_DAC_DHR12L2         (STM32_DAC_BASE+STM32_DAC_DHR12L2_OFFSET)
-#define STM32_DAC_DHR8R2          (STM32_DAC_BASE+STM32_DAC_DHR8R2_OFFSET)
-#define STM32_DAC_DHR12RD         (STM32_DAC_BASE+STM32_DAC_DHR12RD_OFFSET)
-#define STM32_DAC_DHR12LD         (STM32_DAC_BASE+STM32_DAC_DHR12LD_OFFSET)
-#define STM32_DAC_DHR8RD          (STM32_DAC_BASE+STM32_DAC_DHR8RD_OFFSET)
-#define STM32_DAC_DOR1            (STM32_DAC_BASE+STM32_DAC_DOR1_OFFSET)
-#define STM32_DAC_DOR2            (STM32_DAC_BASE+STM32_DAC_DOR2_OFFSET)
-#define STM32_DAC_SR              (STM32_DAC_BASE+STM32_DAC_SR_OFFSET)
+#if STM32_NDAC < 2
+#  define STM32_DAC_CR            (STM32_DAC_BASE+STM32_DAC_CR_OFFSET)
+#  define STM32_DAC_SWTRIGR       (STM32_DAC_BASE+STM32_DAC_SWTRIGR_OFFSET)
+#  define STM32_DAC_DHR12R1       (STM32_DAC_BASE+STM32_DAC_DHR12R1_OFFSET)
+#  define STM32_DAC_DHR12L1       (STM32_DAC_BASE+STM32_DAC_DHR12L1_OFFSET)
+#  define STM32_DAC_DHR8R1        (STM32_DAC_BASE+STM32_DAC_DHR8R1_OFFSET)
+#  define STM32_DAC_DHR12R2       (STM32_DAC_BASE+STM32_DAC_DHR12R2_OFFSET)
+#  define STM32_DAC_DHR12L2       (STM32_DAC_BASE+STM32_DAC_DHR12L2_OFFSET)
+#  define STM32_DAC_DHR8R2        (STM32_DAC_BASE+STM32_DAC_DHR8R2_OFFSET)
+#  define STM32_DAC_DHR12RD       (STM32_DAC_BASE+STM32_DAC_DHR12RD_OFFSET)
+#  define STM32_DAC_DHR12LD       (STM32_DAC_BASE+STM32_DAC_DHR12LD_OFFSET)
+#  define STM32_DAC_DHR8RD        (STM32_DAC_BASE+STM32_DAC_DHR8RD_OFFSET)
+#  define STM32_DAC_DOR1          (STM32_DAC_BASE+STM32_DAC_DOR1_OFFSET)
+#  define STM32_DAC_DOR2          (STM32_DAC_BASE+STM32_DAC_DOR2_OFFSET)
+#  define STM32_DAC_SR            (STM32_DAC_BASE+STM32_DAC_SR_OFFSET)
+#else
+/* DAC1 */
+
+#  define STM32_DAC1_CR           (STM32_DAC1_BASE+STM32_DAC_CR_OFFSET)
+#  define STM32_DAC1_SWTRIGR      (STM32_DAC1_BASE+STM32_DAC_SWTRIGR_OFFSET)
+#  define STM32_DAC1_DHR12R1      (STM32_DAC1_BASE+STM32_DAC_DHR12R1_OFFSET)
+#  define STM32_DAC1_DHR12L1      (STM32_DAC1_BASE+STM32_DAC_DHR12L1_OFFSET)
+#  define STM32_DAC1_DHR8R1       (STM32_DAC1_BASE+STM32_DAC_DHR8R1_OFFSET)
+#  define STM32_DAC1_DHR12R2      (STM32_DAC1_BASE+STM32_DAC_DHR12R2_OFFSET)
+#  define STM32_DAC1_DHR12L2      (STM32_DAC1_BASE+STM32_DAC_DHR12L2_OFFSET)
+#  define STM32_DAC1_DHR8R2       (STM32_DAC1_BASE+STM32_DAC_DHR8R2_OFFSET)
+#  define STM32_DAC1_DHR12RD      (STM32_DAC1_BASE+STM32_DAC_DHR12RD_OFFSET)
+#  define STM32_DAC1_DHR12LD      (STM32_DAC1_BASE+STM32_DAC_DHR12LD_OFFSET)
+#  define STM32_DAC1_DHR8RD       (STM32_DAC1_BASE+STM32_DAC_DHR8RD_OFFSET)
+#  define STM32_DAC1_DOR1         (STM32_DAC1_BASE+STM32_DAC_DOR1_OFFSET)
+#  define STM32_DAC1_DOR2         (STM32_DAC1_BASE+STM32_DAC_DOR2_OFFSET)
+#  define STM32_DAC1_SR           (STM32_DAC1_BASE+STM32_DAC_SR_OFFSET)
+
+/* DAC2 */
+
+#  define STM32_DAC2_CR           (STM32_DAC2_BASE+STM32_DAC_CR_OFFSET)
+#  define STM32_DAC2_SWTRIGR      (STM32_DAC2_BASE+STM32_DAC_SWTRIGR_OFFSET)
+#  define STM32_DAC2_DHR12R1      (STM32_DAC2_BASE+STM32_DAC_DHR12R1_OFFSET)
+#  define STM32_DAC2_DHR12L1      (STM32_DAC2_BASE+STM32_DAC_DHR12L1_OFFSET)
+#  define STM32_DAC2_DHR8R1       (STM32_DAC2_BASE+STM32_DAC_DHR8R1_OFFSET)
+#  define STM32_DAC2_DHR12R2      (STM32_DAC2_BASE+STM32_DAC_DHR12R2_OFFSET)
+#  define STM32_DAC2_DHR12L2      (STM32_DAC2_BASE+STM32_DAC_DHR12L2_OFFSET)
+#  define STM32_DAC2_DHR8R2       (STM32_DAC2_BASE+STM32_DAC_DHR8R2_OFFSET)
+#  define STM32_DAC2_DHR12RD      (STM32_DAC2_BASE+STM32_DAC_DHR12RD_OFFSET)
+#  define STM32_DAC2_DHR12LD      (STM32_DAC2_BASE+STM32_DAC_DHR12LD_OFFSET)
+#  define STM32_DAC2_DHR8RD       (STM32_DAC2_BASE+STM32_DAC_DHR8RD_OFFSET)
+#  define STM32_DAC2_DOR1         (STM32_DAC2_BASE+STM32_DAC_DOR1_OFFSET)
+#  define STM32_DAC2_DOR2         (STM32_DAC2_BASE+STM32_DAC_DOR2_OFFSET)
+#  define STM32_DAC2_SR           (STM32_DAC2_BASE+STM32_DAC_SR_OFFSET)
+#endif
 
 /* Register Bitfield Definitions ****************************************************/
 
@@ -128,10 +164,10 @@
 
 /* These definitions may be used with the full, 32-bit register */
 
-#define DAC_CR_EN1                (1 << 0)  /* Bit 0:  DAC channel1 enable */
-#define DAC_CR_BOFF1              (1 << 1)  /* Bit 1:  DAC channel1 output buffer disable */
-#define DAC_CR_TEN1               (1 << 2)  /* Bit 2:  DAC channel1 trigger enable */
-#define DAC_CR_TSEL1_SHIFT        (3)       /* Bits 3-5: DAC channel1 trigger selection */
+#define DAC_CR_EN1                (1 << 0)  /* Bit 0:  DAC channel 1 enable */
+#define DAC_CR_BOFF1              (1 << 1)  /* Bit 1:  DAC channel 1 output buffer disable */
+#define DAC_CR_TEN1               (1 << 2)  /* Bit 2:  DAC channel 1 trigger enable */
+#define DAC_CR_TSEL1_SHIFT        (3)       /* Bits 3-5: DAC channel 1 trigger selection */
 #define DAC_CR_TSEL1_MASK         (7 << DAC_CR_TSEL1_SHIFT)
 #  define DAC_CR_TSEL1_TIM6       (0 << DAC_CR_TSEL1_SHIFT) /* Timer 6 TRGO event */
 #  define DAC_CR_TSEL1_TIM8       (1 << DAC_CR_TSEL1_SHIFT) /* Timer 8 TRGO event */
@@ -141,12 +177,12 @@
 #  define DAC_CR_TSEL1_TIM4       (5 << DAC_CR_TSEL1_SHIFT) /* Timer 4 TRGO event */
 #  define DAC_CR_TSEL1_EXT9       (6 << DAC_CR_TSEL1_SHIFT) /* External line9 */
 #  define DAC_CR_TSEL1_SW         (7 << DAC_CR_TSEL1_SHIFT) /* Software trigger */
-#define DAC_CR_WAVE1_SHIFT        (6)       /* Bits 6-7: DAC channel1 noise/triangle wave generation  */enable
+#define DAC_CR_WAVE1_SHIFT        (6)       /* Bits 6-7: DAC channel 1 noise/triangle wave generation  */
 #define DAC_CR_WAVE1_MASK         (3 << DAC_CR_WAVE1_SHIFT)
 #  define DAC_CR_WAVE1_DISABLED   (0 << DAC_CR_WAVE1_SHIFT) /* Wave generation disabled */
 #  define DAC_CR_WAVE1_NOISE      (1 << DAC_CR_WAVE1_SHIFT) /* Noise wave generation enabled */
 #  define DAC_CR_WAVE1_TRIANGLE   (2 << DAC_CR_WAVE1_SHIFT) /* Triangle wave generation enabled */
-#define DAC_CR_MAMP1_SHIFT        (8)       /* Bits 8-11: DAC channel1 mask/amplitude selector */
+#define DAC_CR_MAMP1_SHIFT        (8)       /* Bits 8-11: DAC channel 1 mask/amplitude selector */
 #define DAC_CR_MAMP1_MASK         (15 << DAC_CR_MAMP1_SHIFT)
 #  define DAC_CR_MAMP1_AMP1       (0 << DAC_CR_MAMP1_SHIFT)  /* Unmask bit0 of LFSR/triangle amplitude=1 */
 #  define DAC_CR_MAMP1_AMP3       (1 << DAC_CR_MAMP1_SHIFT)  /* Unmask bits[1:0] of LFSR/triangle amplitude=3 */
@@ -160,13 +196,13 @@
 #  define DAC_CR_MAMP1_AMP1023    (9 << DAC_CR_MAMP1_SHIFT)  /* Unmask bits[9:0] of LFSR/triangle amplitude=1023 */
 #  define DAC_CR_MAMP1_AMP2047    (10 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[10:0] of LFSR/triangle amplitude=2047 */
 #  define DAC_CR_MAMP1_AMP4095    (11 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[11:0] of LFSR/triangle amplitude=4095 */
-#define DAC_CR_DMAEN1             (1 << 12) /* Bit 12: DAC channel1 DMA enable */
-#define DAC_CR_DMAUDRIE1          (1 << 13) /* Bit 13: DAC channel1 DMA Underrun Interrupt enable */
+#define DAC_CR_DMAEN1             (1 << 12) /* Bit 12: DAC channel 1 DMA enable */
+#define DAC_CR_DMAUDRIE1          (1 << 13) /* Bit 13: DAC channel 1 DMA Underrun Interrupt enable */
 
-#define DAC_CR_EN2                (1 << 16) /* Bit 16: DAC channel2 enable */
-#define DAC_CR_BOFF2              (1 << 17) /* Bit 17: DAC channel2 output buffer disable */
-#define DAC_CR_TEN2               (1 << 18) /* Bit 18: DAC channel2 trigger enable */
-#define DAC_CR_TSEL2_SHIFT        (19)       /* Bits 19-21: DAC channel2 trigger selection */
+#define DAC_CR_EN2                (1 << 16) /* Bit 16: DAC channel 2 enable */
+#define DAC_CR_BOFF2              (1 << 17) /* Bit 17: DAC channel 2 output buffer disable */
+#define DAC_CR_TEN2               (1 << 18) /* Bit 18: DAC channel 2 trigger enable */
+#define DAC_CR_TSEL2_SHIFT        (19)       /* Bits 19-21: DAC channel 2 trigger selection */
 #define DAC_CR_TSEL2_MASK         (7 << DAC_CR_TSEL2_SHIFT)
 #  define DAC_CR_TSEL2_TIM6       (0 << DAC_CR_TSEL2_SHIFT) /* Timer 6 TRGO event */
 #  define DAC_CR_TSEL2_TIM8       (1 << DAC_CR_TSEL2_SHIFT) /* Timer 8 TRGO event */
@@ -176,12 +212,12 @@
 #  define DAC_CR_TSEL2_TIM4       (5 << DAC_CR_TSEL2_SHIFT) /* Timer 4 TRGO event */
 #  define DAC_CR_TSEL2_EXT9       (6 << DAC_CR_TSEL2_SHIFT) /* External line9 */
 #  define DAC_CR_TSEL2_SW         (7 << DAC_CR_TSEL2_SHIFT) /* Software trigger */
-#define DAC_CR_WAVE2_SHIFT        (22)       /* Bit 22-23: DAC channel2 noise/triangle wave generation enable */
+#define DAC_CR_WAVE2_SHIFT        (22)       /* Bit 22-23: DAC channel 2 noise/triangle wave generation enable */
 #define DAC_CR_WAVE2_MASK         (3 << DAC_CR_WAVE2_SHIFT)
 #  define DAC_CR_WAVE2_DISABLED   (0 << DAC_CR_WAVE2_SHIFT) /* Wave generation disabled */
 #  define DAC_CR_WAVE2_NOISE      (1 << DAC_CR_WAVE2_SHIFT) /* Noise wave generation enabled */
 #  define DAC_CR_WAVE2_TRIANGLE   (2 << DAC_CR_WAVE2_SHIFT) /* Triangle wave generation enabled */
-#define DAC_CR_MAMP2_SHIFT        (24)      /* Bit 24-27: DAC channel2 mask/amplitude selector */
+#define DAC_CR_MAMP2_SHIFT        (24)      /* Bit 24-27: DAC channel 2 mask/amplitude selector */
 #define DAC_CR_MAMP2_MASK         (15 << DAC_CR_MAMP2_SHIFT)
 #  define DAC_CR_MAMP2_AMP1       (0 << DAC_CR_MAMP2_SHIFT)  /* Unmask bit0 of LFSR/triangle amplitude=1 */
 #  define DAC_CR_MAMP2_AMP3       (1 << DAC_CR_MAMP2_SHIFT)  /* Unmask bits[1:0] of LFSR/triangle amplitude=3 */
@@ -195,24 +231,24 @@
 #  define DAC_CR_MAMP2_AMP1023    (9 << DAC_CR_MAMP2_SHIFT)  /* Unmask bits[9:0] of LFSR/triangle amplitude=1023 */
 #  define DAC_CR_MAMP2_AMP2047    (10 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[10:0] of LFSR/triangle amplitude=2047 */
 #  define DAC_CR_MAMP2_AMP4095    (11 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[11:0] of LFSR/triangle amplitude=4095 */
-#define DAC_CR_DMAEN2             (1 << 28) /* Bit 28: DAC channel2 DMA enable */
-#define DAC_CR_DMAUDRIE2          (1 << 29) /* Bits 29: DAC channel2 DMA underrun interrupt enable */
+#define DAC_CR_DMAEN2             (1 << 28) /* Bit 28: DAC channel 2 DMA enable */
+#define DAC_CR_DMAUDRIE2          (1 << 29) /* Bits 29: DAC channel 2 DMA underrun interrupt enable */
 
 /* DAC software trigger register */
 
 #define DAC_SWTRIGR_SWTRIG(n)     (1 << ((n)-1))
-#define DAC_SWTRIGR_SWTRIG1       (1 << 0)  /* Bit 0:  DAC channel1 software trigger */
-#define DAC_SWTRIGR_SWTRIG2       (1 << 1)  /* Bit 1:  DAC channel2 software trigger */
+#define DAC_SWTRIGR_SWTRIG1       (1 << 0)  /* Bit 0:  DAC channel 1 software trigger */
+#define DAC_SWTRIGR_SWTRIG2       (1 << 1)  /* Bit 1:  DAC channel 2 software trigger */
 
-/* DAC channel1/2 12-bit right-aligned data holding register */
+/* DAC channel 1/2 12-bit right-aligned data holding register */
 
 #define DAC_DHR12R_MASK           (0x0fff)
 
-/* DAC channel1/2 12-bit left aligned data holding register */
+/* DAC channel 1/2 12-bit left aligned data holding register */
 
 #define DAC_DHR12L_MASK           (0xfff0)
 
-/* DAC channel1/2 8-bit right aligned data holding register */
+/* DAC channel 1/2 8-bit right aligned data holding register */
 
 #define DAC_DHR8R_MASK           (0x00ff)
 
@@ -221,9 +257,9 @@
 #define DAC_DHR12RD_DACC_SHIFT(n) (1 << (((n)-1) << 4))
 #define DAC_DHR12RD_DACC_MASK(n) (0xfff << DAC_DHR12RD_DACC_SHIFT(n))
 
-#define DAC_DHR12RD_DACC1_SHIFT  (0)        /* Bits 0-11: DAC channel1 12-bit right-aligned data */
+#define DAC_DHR12RD_DACC1_SHIFT  (0)        /* Bits 0-11: DAC channel 1 12-bit right-aligned data */
 #define DAC_DHR12RD_DACC1_MASK   (0xfff << DAC_DHR12RD_DACC2_SHIFT)
-#define DAC_DHR12RD_DACC2_SHIFT  (16)       /* Bits 16-27: DAC channel2 12-bit right-aligned data */
+#define DAC_DHR12RD_DACC2_SHIFT  (16)       /* Bits 16-27: DAC channel 2 12-bit right-aligned data */
 #define DAC_DHR12RD_DACC2_MASK   (0xfff << DAC_DHR12RD_DACC2_SHIFT)
 
 /* Dual DAC 12-bit left-aligned data holding register */
@@ -231,9 +267,9 @@
 #define DAC_DHR12LD_DACC_SHIFT(n) ((1 << (((n)-1) << 4)) + 4)
 #define DAC_DHR12LD_DACC_MASK(n) (0xfff << DAC_DHR12LD_DACC_SHIFT(n))
 
-#define DAC_DHR12LD_DACC1_SHIFT  (4)        /* Bits 4-15: DAC channel1 12-bit left-aligned data */
+#define DAC_DHR12LD_DACC1_SHIFT  (4)        /* Bits 4-15: DAC channel 1 12-bit left-aligned data */
 #define DAC_DHR12LD_DACC1_MASK   (0xfff << DAC_DHR12LD_DACC1_SHIFT)
-#define DAC_DHR12LD_DACC2_SHIFT  (20)       /* Bits 20-31: DAC channel2 12-bit left-aligned data */
+#define DAC_DHR12LD_DACC2_SHIFT  (20)       /* Bits 20-31: DAC channel 2 12-bit left-aligned data */
 #define DAC_DHR12LD_DACC2_MASK   (0xfff << DAC_DHR12LD_DACC2_SHIFT)
 
 /* DUAL DAC 8-bit right aligned data holding register */
@@ -241,19 +277,19 @@
 #define DAC_DHR8RD_DACC_SHIFT(n) (1 << (((n)-1) << 3))
 #define DAC_DHR8RD_DACC_MASK(n)  (0xff << DAC_DHR8RD_DACC_SHIFT(n))
 
-#define DAC_DHR8RD_DACC1_SHIFT   (0)         /* Bits 0-7: DAC channel1 8-bit right-aligned data */
+#define DAC_DHR8RD_DACC1_SHIFT   (0)         /* Bits 0-7: DAC channel 1 8-bit right-aligned data */
 #define DAC_DHR8RD_DACC1_MASK    (0xff << DAC_DHR8RD_DACC1_SHIFT)
-#define DAC_DHR8RD_DACC2_SHIFT   (8)         /* Bits 8-15: DAC channel2 8-bit right-aligned data */
+#define DAC_DHR8RD_DACC2_SHIFT   (8)         /* Bits 8-15: DAC channel 2 8-bit right-aligned data */
 #define DAC_DHR8RD_DACC2_MASK    (0xff << DAC_DHR8RD_DACC2_SHIFT)
 
-/* DAC channel1/2 data output register */
+/* DAC channel 1/2 data output register */
 
 #define DAC_DOR_MASK            (0x0fff)
 
 /* DAC status register */
 
 #define DAC_SR_DMAUDR(n)        ((1 << (((n)-1) << 4)) + 13)
-#define DAC_SR_DMAUDR1          (1 << 13)  /* Bit 13: DAC channel1 DMA underrun flag */
-#define DAC_SR_DMAUDR2          (1 << 29)  /* Bit 29: DAC channel2 DMA underrun flag */
+#define DAC_SR_DMAUDR1          (1 << 13)  /* Bit 13: DAC channel 1 DMA underrun flag */
+#define DAC_SR_DMAUDR2          (1 << 29)  /* Bit 29: DAC channel 2 DMA underrun flag */
 
 #endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32_DAC_H */
diff --git a/arch/arm/src/stm32/chip/stm32_dbgmcu.h b/arch/arm/src/stm32/chip/stm32_dbgmcu.h
index dc22cd2e7be0630e3c62150d0f8aa7793f2abf39..af80113a737eed289b5918486fe3fe7d7b9328e8 100644
--- a/arch/arm/src/stm32/chip/stm32_dbgmcu.h
+++ b/arch/arm/src/stm32/chip/stm32_dbgmcu.h
@@ -53,7 +53,8 @@
 #define STM32_DBGMCU_IDCODE       0xe0042000  /* MCU identifier */
 #define STM32_DBGMCU_CR           0xe0042004  /* MCU debug */
 #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32F40XX) || defined(CONFIG_STM32_STM32L15XX)
+    defined(CONFIG_STM32_STM32F33XX) || defined(CONFIG_STM32_STM32F40XX) || \
+    defined(CONFIG_STM32_STM32L15XX)
 #  define STM32_DBGMCU_APB1_FZ    0xe0042008  /* Debug MCU APB1 freeze register */
 #  define STM32_DBGMCU_APB2_FZ    0xe004200c  /* Debug MCU APB2 freeze register */
 #endif
@@ -118,7 +119,8 @@
 #  define DBGMCU_APB1_I2C3STOP    (1 << 23)  /* Bit 23: SMBUS timeout mode stopped when Core is halted */
 #  define DBGMCU_APB1_CAN1STOP    (1 << 25)  /* Bit 25: CAN1 stopped when core is halted */
 #  define DBGMCU_APB1_CAN2STOP    (1 << 26)  /* Bit 26: CAN2 stopped when core is halted */
-#elif defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32L15XX)
+#elif defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+      defined(CONFIG_STM32_STM32L15XX)
 #  define DBGMCU_APB1_TIM2STOP    (1 << 0)   /* Bit 0: TIM2 stopped when core is halted */
 #  define DBGMCU_APB1_TIM3STOP    (1 << 1)   /* Bit 1: TIM3 stopped when core is halted */
 #  define DBGMCU_APB1_TIM4STOP    (1 << 2)   /* Bit 2: TIM4 stopped when core is halted */
@@ -129,7 +131,7 @@
 #  define DBGMCU_APB1_IWDGSTOP    (1 << 12)  /* Bit 12: Independent Watchdog stopped when core is halted */
 #  define DBGMCU_APB1_I2C1STOP    (1 << 21)  /* Bit 21: SMBUS timeout mode stopped when Core is halted */
 #  define DBGMCU_APB1_I2C2STOP    (1 << 22)  /* Bit 22: SMBUS timeout mode stopped when Core is halted */
-#  if defined(CONFIG_STM32_STM32F30XX)
+#  if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX)
 #    define DBGMCU_APB1_CAN1STOP  (1 << 25)  /* Bit 25: CAN1 stopped when core is halted */
 #  endif
 #endif
@@ -142,7 +144,7 @@
 #  define DBGMCU_APB2_TIM9STOP    (1 << 16)  /* Bit 16: TIM9 stopped when core is halted */
 #  define DBGMCU_APB2_TIM10STOP   (1 << 17)  /* Bit 17: TIM10 stopped when core is halted */
 #  define DBGMCU_APB2_TIM11STOP   (1 << 18)  /* Bit 18: TIM11 stopped when core is halted */
-#elif defined(CONFIG_STM32_STM32F30XX)
+#elif defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX)
 #  define DBGMCU_APB2_TIM1STOP    (1 << 0)   /* Bit 0:  TIM1 stopped when core is halted */
 #  define DBGMCU_APB2_TIM8STOP    (1 << 1)   /* Bit 1:  TIM8 stopped when core is halted */
 #  define DBGMCU_APB2_TIM15STOP   (1 << 2)   /* Bit 2:  TIM15 stopped when core is halted */
diff --git a/arch/arm/src/stm32/chip/stm32_exti.h b/arch/arm/src/stm32/chip/stm32_exti.h
index a3092ca0e4295e0aa2d88bc6969e96875c9e896c..791bed1f174fe1c876eee7bb9b86133c80ccd996 100644
--- a/arch/arm/src/stm32/chip/stm32_exti.h
+++ b/arch/arm/src/stm32/chip/stm32_exti.h
@@ -55,7 +55,7 @@
 #    define STM32_NEXTI          19
 #    define STM32_EXTI_MASK      0x0007ffff
 #  endif
-#elif defined(CONFIG_STM32_STM32F30XX)
+#elif defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX)
 #    define STM32_NEXTI1         31
 #    define STM32_EXTI1_MASK     0xffffffff
 #    define STM32_NEXTI2         4
@@ -69,7 +69,7 @@
 
 /* Register Offsets *****************************************************************/
 
-#if defined(CONFIG_STM32_STM32F30XX)
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX)
 #  define STM32_EXTI1_OFFSET     0x0000  /* Offset to EXTI1 registers */
 #  define STM32_EXTI2_OFFSET     0x0018  /* Offset to EXTI2 registers */
 #endif
@@ -83,7 +83,7 @@
 
 /* Register Addresses ***************************************************************/
 
-#if defined(CONFIG_STM32_STM32F30XX)
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX)
 #  define STM32_EXTI1_BASE       (STM32_EXTI_BASE+STM32_EXTI1_OFFSET)
 #  define STM32_EXTI2_BASE       (STM32_EXTI_BASE+STM32_EXTI2_OFFSET)
 
@@ -146,7 +146,8 @@
 #  define EXTI_RTC_TAMPER        (1 << 21) /* EXTI line 21 is connected to the RTC Tamper and TimeStamp events */
 #  define EXTI_RTC_TIMESTAMP     (1 << 21) /* EXTI line 21 is connected to the RTC Tamper and TimeStamp events */
 #  define EXTI_RTC_WAKEUP        (1 << 22) /* EXTI line 22 is connected to the RTC Wakeup event */
-#elif defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+#elif defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+      defined(CONFIG_STM32_STM32F37XX)
 #  define EXTI_PVD_LINE          (1 << 16) /* EXTI line 16 is connected to the PVD output */
 #  define EXTI_RTC_ALARM         (1 << 17) /* EXTI line 17 is connected to the RTC Alarm event */
 #  define EXTI_OTGFS_WAKEUP      (1 << 18) /* EXTI line 18 is connected to the USB OTG FS Wakeup event */
@@ -193,7 +194,7 @@
 
 /* Compatibility Definitions ********************************************************/
 
-#if defined(CONFIG_STM32_STM32F30XX)
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX)
 #  define STM32_NEXTI            STM32_NEXTI1
 #  define STM32_EXTI_MASK        STM32_EXTI1_MASK
 #  define STM32_EXTI_IMR         STM32_EXTI1_IMR
diff --git a/arch/arm/src/stm32/chip/stm32_flash.h b/arch/arm/src/stm32/chip/stm32_flash.h
index c031492752724b6b63f0fa54a58d77ab14923135..218ba05fcf77323cfd689ea049f46f54965a7e29 100644
--- a/arch/arm/src/stm32/chip/stm32_flash.h
+++ b/arch/arm/src/stm32/chip/stm32_flash.h
@@ -3,7 +3,7 @@
  *
  *   Copyright (C) 2009, 2011, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
- *           David Sidrane 
+ *           David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -90,6 +90,10 @@
 #    define STM32_FLASH_NPAGES        128
 #    define STM32_FLASH_PAGESIZE      2048
 
+#  elif defined(CONFIG_STM32_STM32F33XX)
+#    define STM32_FLASH_NPAGES        32
+#    define STM32_FLASH_PAGESIZE      2048
+
 #  elif defined(CONFIG_STM32_STM32F37XX)
 #    define STM32_FLASH_NPAGES        128
 #    define STM32_FLASH_PAGESIZE      2048
@@ -212,7 +216,7 @@
 #define STM32_FLASH_CR_OFFSET      0x0010
 
 #if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32F37XX)
+    defined(CONFIG_STM32_STM32F33XX) || defined(CONFIG_STM32_STM32F37XX)
 #  define STM32_FLASH_AR_OFFSET    0x0014
 #  define STM32_FLASH_OBR_OFFSET   0x001c
 #  define STM32_FLASH_WRPR_OFFSET  0x0020
@@ -233,7 +237,7 @@
 #define STM32_FLASH_CR             (STM32_FLASHIF_BASE+STM32_FLASH_CR_OFFSET)
 
 #if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32F37XX)
+    defined(CONFIG_STM32_STM32F33XX) || defined(CONFIG_STM32_STM32F37XX)
 #  define STM32_FLASH_AR           (STM32_FLASHIF_BASE+STM32_FLASH_AR_OFFSET)
 #  define STM32_FLASH_OBR          (STM32_FLASHIF_BASE+STM32_FLASH_OBR_OFFSET)
 #  define STM32_FLASH_WRPR         (STM32_FLASHIF_BASE+STM32_FLASH_WRPR_OFFSET)
@@ -267,10 +271,11 @@
 #    define FLASH_ACR_LATENCY_7     (7 << FLASH_ACR_LATENCY_SHIFT)    /* 111: Seven wait states */
 
 #  if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX) || \
-      defined(CONFIG_STM32_STM32F37XX)
+      defined(CONFIG_STM32_STM32F33XX) || defined(CONFIG_STM32_STM32F37XX)
 #    define FLASH_ACR_HLFCYA        (1 << 3)  /* Bit 3: FLASH half cycle access */
 #    define FLASH_ACR_PRTFBE        (1 << 4)  /* Bit 4: FLASH prefetch enable */
-#    if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+#    if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+     defined(CONFIG_STM32_STM32F37XX)
 #      define FLASH_ACR_PRFTBS      (1 << 5)  /* Bit 5: FLASH prefetch buffer status */
 #    endif
 #  elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
@@ -285,7 +290,7 @@
 /* Flash Status Register (SR) */
 
 #if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32F37XX)
+    defined(CONFIG_STM32_STM32F33XX) || defined(CONFIG_STM32_STM32F37XX)
 #  define FLASH_SR_BSY              (1 << 0)  /* Busy */
 #  define FLASH_SR_PGERR            (1 << 2)  /* Programming Error */
 #  define FLASH_SR_WRPRT_ERR        (1 << 4)  /* Write Protection Error */
@@ -303,7 +308,7 @@
 /* Flash Control Register (CR) */
 
 #if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32F37XX)
+    defined(CONFIG_STM32_STM32F33XX) || defined(CONFIG_STM32_STM32F37XX)
 #  define FLASH_CR_PG               (1 << 0)  /* Bit 0: Program Page */
 #  define FLASH_CR_PER              (1 << 1)  /* Bit 1: Page Erase */
 #  define FLASH_CR_MER              (1 << 2)  /* Bit 2: Mass Erase */
@@ -314,7 +319,8 @@
 #  define FLASH_CR_OPTWRE           (1 << 9)  /* Bit 8: Option Bytes Write Enable */
 #  define FLASH_CR_ERRIE            (1 << 10) /* Bit 10: Error Interrupt Enable */
 #  define FLASH_CR_EOPIE            (1 << 12) /* Bit 12: End of Program Interrupt Enable */
-#  if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+#  if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+      defined(CONFIG_STM32_STM32F37XX)
 #    define FLASH_CR_OBL_LAUNCH     (1 << 13) /* Bit 13: Force option byte loading */
 #  endif
 #elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
diff --git a/arch/arm/src/stm32/chip/stm32_memorymap.h b/arch/arm/src/stm32/chip/stm32_memorymap.h
index 28f6590033cafb5da2b109572d8be837a2602504..3e88405ca750aea9c4a85ee90e30441a9d9d7754 100644
--- a/arch/arm/src/stm32/chip/stm32_memorymap.h
+++ b/arch/arm/src/stm32/chip/stm32_memorymap.h
@@ -51,6 +51,8 @@
 #  include "chip/stm32f20xxx_memorymap.h"
 #elif defined(CONFIG_STM32_STM32F30XX)
 #  include "chip/stm32f30xxx_memorymap.h"
+#elif defined(CONFIG_STM32_STM32F33XX)
+#  include "chip/stm32f33xxx_memorymap.h"
 #elif defined(CONFIG_STM32_STM32F37XX)
 #  include "chip/stm32f37xxx_memorymap.h"
 #elif defined(CONFIG_STM32_STM32F40XX)
diff --git a/arch/arm/src/stm32/chip/stm32_otghs.h b/arch/arm/src/stm32/chip/stm32_otghs.h
index 42b442226216a7877bb9c1b59f87104538c9033e..95b4772a37aa0c345ec4528c4eb184e127c740b9 100644
--- a/arch/arm/src/stm32/chip/stm32_otghs.h
+++ b/arch/arm/src/stm32/chip/stm32_otghs.h
@@ -59,8 +59,6 @@
 #define OTGHS_PID_MDATA                 (3) /* Non-control */
 #define OTGHS_PID_SETUP                 (3) /* Control */
 
-/* If OTGHS2 is defined (FS mode of the HS module), then remap the OTGHS base address */
-
 /* Register Offsets *********************************************************************************/
 /* Core global control and status registers */
 
diff --git a/arch/arm/src/stm32/chip/stm32_pwr.h b/arch/arm/src/stm32/chip/stm32_pwr.h
index 9c1e64e57bd09492762306770b730d18b7922aa9..20209ee12c5620c82e4371c3eb7b5226d3eecc7c 100644
--- a/arch/arm/src/stm32/chip/stm32_pwr.h
+++ b/arch/arm/src/stm32/chip/stm32_pwr.h
@@ -105,6 +105,12 @@
 #  endif
 #endif
 
+#if defined(CONFIG_STM32_STM32F37XX)
+#define PWR_CR_ENSD1           (1 << 9)   /* Bit 9: Enable SDADC1 */
+#define PWR_CR_ENSD2           (1 << 10)  /* Bit 10: Enable SDADC2 */
+#define PWR_CR_ENSD3           (1 << 11)  /* Bit 11: Enable SDADC3 */
+#endif
+
 #if defined(CONFIG_STM32_STM32L15XX)
 #  define PWR_CR_ULP           (1 << 9)  /* Ultralow power mode */
 #  define PWR_CR_FWU           (1 << 10) /* Fast wake-up */
@@ -132,7 +138,8 @@
 #define PWR_CSR_SBF            (1 << 1)  /* Bit 1:  Standby Flag */
 #define PWR_CSR_PVDO           (1 << 2)  /* Bit 2:  PVD Output */
 
-#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
+#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F37XX) || \
+    defined(CONFIG_STM32_STM32F40XX)
 #  define PWR_CSR_BRR          (1 << 3)  /* Bit 3:  Backup regulator ready */
 #elif defined(CONFIG_STM32_STM32L15XX)
 #  define PWR_CSR_VREFINTRDYF  (1 << 3)  /* Bit 3: Internal voltage reference (VREFINT) ready flag */
@@ -143,7 +150,8 @@
 #if defined(CONFIG_STM32_STM32F30XX)
 #  define PWR_CSR_EWUP1        (1 << 8)  /* Bit 8:  Enable WKUP1 pin */
 #  define PWR_CSR_EWUP2        (1 << 9)  /* Bit 9:  Enable WKUP2 pin */
-#elif defined(CONFIG_STM32_STM32L15XX)
+#elif defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F33XX) || \
+      defined(CONFIG_STM32_STM32F37XX)
 #  define PWR_CSR_EWUP1        (1 << 8)  /* Bit 8:  Enable WKUP1 pin */
 #  define PWR_CSR_EWUP2        (1 << 9)  /* Bit 9:  Enable WKUP2 pin */
 #  define PWR_CSR_EWUP3        (1 << 10) /* Bit 8:  Enable WKUP3 pin */
diff --git a/arch/arm/src/stm32/chip/stm32_spi.h b/arch/arm/src/stm32/chip/stm32_spi.h
index bdbabab33461794d0f645bbbd2c496f85e188e8b..3e0a086b63cba3bd537c19f66fe91b8d553c37bc 100644
--- a/arch/arm/src/stm32/chip/stm32_spi.h
+++ b/arch/arm/src/stm32/chip/stm32_spi.h
@@ -66,7 +66,7 @@
 #define STM32_SPI_TXCRCR_OFFSET    0x0018  /* SPI Tx CRC register (16-bit) */
 
 #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32F40XX)
+    defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX)
 #  define STM32_SPI_I2SCFGR_OFFSET 0x001c  /* I2S configuration register */
 #  define STM32_SPI_I2SPR_OFFSET   0x0020  /* I2S prescaler register */
 #endif
@@ -92,7 +92,7 @@
 #  define STM32_SPI2_RXCRCR       (STM32_SPI2_BASE+STM32_SPI_RXCRCR_OFFSET)
 #  define STM32_SPI2_TXCRCR       (STM32_SPI2_BASE+STM32_SPI_TXCRCR_OFFSET)
 #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32F40XX)
+    defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX)
 #    define STM32_SPI2_I2SCFGR    (STM32_SPI2_BASE+STM32_SPI_I2SCFGR_OFFSET)
 #    define STM32_SPI2_I2SPR      (STM32_SPI2_BASE+STM32_SPI_I2SPR_OFFSET)
 #  endif
@@ -107,7 +107,7 @@
 #  define STM32_SPI3_RXCRCR       (STM32_SPI3_BASE+STM32_SPI_RXCRCR_OFFSET)
 #  define STM32_SPI3_TXCRCR       (STM32_SPI3_BASE+STM32_SPI_TXCRCR_OFFSET)
 #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32F40XX)
+    defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX)
 #    define STM32_SPI3_I2SCFGR    (STM32_SPI3_BASE+STM32_SPI_I2SCFGR_OFFSET)
 #    define STM32_SPI3_I2SPR      (STM32_SPI3_BASE+STM32_SPI_I2SPR_OFFSET)
 #  endif
@@ -135,7 +135,11 @@
 #define SPI_CR1_SSI               (1 << 8)  /* Bit 8: Internal slave select */
 #define SPI_CR1_SSM               (1 << 9)  /* Bit 9: Software slave management */
 #define SPI_CR1_RXONLY            (1 << 10) /* Bit 10: Receive only */
-#define SPI_CR1_DFF               (1 << 11) /* Bit 11: Data Frame Format */
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+#  define SPI_CR1_CRCL            (1 << 11) /* Bit 11: CRC length */
+#else
+#  define SPI_CR1_DFF             (1 << 11) /* Bit 11: Data Frame Format */
+#endif
 #define SPI_CR1_CRCNEXT           (1 << 12) /* Bit 12: Transmit CRC next */
 #define SPI_CR1_CRCEN             (1 << 13) /* Bit 13: Hardware CRC calculation enable */
 #define SPI_CR1_BIDIOE            (1 << 14) /* Bit 14: Output enable in bidirectional mode */
@@ -148,7 +152,7 @@
 #define SPI_CR2_SSOE              (1 << 2)  /* Bit 2: SS Output Enable */
 
 #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32F40XX)
+    defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX)
 #  define SPI_CR2_FRF             (1 << 4)  /* Bit 4: Frame format */
 #endif
 
@@ -156,22 +160,23 @@
 #define SPI_CR2_RXNEIE            (1 << 6)  /* Bit 6: RX buffer not empty interrupt enable */
 #define SPI_CR2_TXEIE             (1 << 7)  /* Bit 7: Tx buffer empty interrupt enable */
 
-#ifdef CONFIG_STM32_STM32F30XX
-#define SPI_CR1_DS_SHIFT          (8)       /* Bits 8-11:  Data size */
-#define SPI_CR1_DS_MASK           (15 << SPI_CR1_DS_SHIFT)
-#  define SPI_CR1_DS_4BIT         (3 << SPI_CR1_DS_SHIFT)
-#  define SPI_CR1_DS_5BIT         (4 << SPI_CR1_DS_SHIFT)
-#  define SPI_CR1_DS_6BIT         (5 << SPI_CR1_DS_SHIFT)
-#  define SPI_CR1_DS_7BIT         (6 << SPI_CR1_DS_SHIFT)
-#  define SPI_CR1_DS_8BIT         (7 << SPI_CR1_DS_SHIFT)
-#  define SPI_CR1_DS_9BIT         (8 << SPI_CR1_DS_SHIFT)
-#  define SPI_CR1_DS_10BIT        (9 << SPI_CR1_DS_SHIFT)
-#  define SPI_CR1_DS_11BIT        (10 << SPI_CR1_DS_SHIFT)
-#  define SPI_CR1_DS_12BIT        (11 << SPI_CR1_DS_SHIFT)
-#  define SPI_CR1_DS_13BIT        (12 << SPI_CR1_DS_SHIFT)
-#  define SPI_CR1_DS_14BIT        (13 << SPI_CR1_DS_SHIFT)
-#  define SPI_CR1_DS_15BIT        (14 << SPI_CR1_DS_SHIFT)
-#  define SPI_CR1_DS_16BIT        (15 << SPI_CR1_DS_SHIFT)
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+#define SPI_CR2_DS_SHIFT          (8)       /* Bits 8-11:  Data size */
+#define SPI_CR2_DS_MASK           (15 << SPI_CR2_DS_SHIFT)
+#  define SPI_CR2_DS(n)           ((uint32_t)((n) - 1) << SPI_CR2_DS_SHIFT)
+#  define SPI_CR2_DS_4BIT         (3 << SPI_CR2_DS_SHIFT)
+#  define SPI_CR2_DS_5BIT         (4 << SPI_CR2_DS_SHIFT)
+#  define SPI_CR2_DS_6BIT         (5 << SPI_CR2_DS_SHIFT)
+#  define SPI_CR2_DS_7BIT         (6 << SPI_CR2_DS_SHIFT)
+#  define SPI_CR2_DS_8BIT         (7 << SPI_CR2_DS_SHIFT)
+#  define SPI_CR2_DS_9BIT         (8 << SPI_CR2_DS_SHIFT)
+#  define SPI_CR2_DS_10BIT        (9 << SPI_CR2_DS_SHIFT)
+#  define SPI_CR2_DS_11BIT        (10 << SPI_CR2_DS_SHIFT)
+#  define SPI_CR2_DS_12BIT        (11 << SPI_CR2_DS_SHIFT)
+#  define SPI_CR2_DS_13BIT        (12 << SPI_CR2_DS_SHIFT)
+#  define SPI_CR2_DS_14BIT        (13 << SPI_CR2_DS_SHIFT)
+#  define SPI_CR2_DS_15BIT        (14 << SPI_CR2_DS_SHIFT)
+#  define SPI_CR2_DS_16BIT        (15 << SPI_CR2_DS_SHIFT)
 #define SPI_CR2_FRXTH             (1 << 12) /* Bit 12: FIFO reception threshold */
 #define SPI_CR2_LDMARX            (1 << 13) /* Bit 13: Last DMA transfer for receptione */
 #define SPI_CR2_LDMATX            (1 << 14) /* Bit 14: Last DMA transfer for transmission */
@@ -183,7 +188,7 @@
 #define SPI_SR_TXE                (1 << 1)  /* Bit 1: Transmit buffer empty */
 
 #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32F40XX)
+    defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX)
 #  define SPI_SR_CHSIDE           (1 << 2)  /* Bit 2: Channel side */
 #  define SPI_SR_UDR              (1 << 3)  /* Bit 3: Underrun flag */
 #endif
@@ -194,29 +199,29 @@
 #define SPI_SR_BSY                (1 << 7)  /* Bit 7: Busy flag */
 
 #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32F40XX)
-#  define SPI_SR_TIFRFE           (1 << 8)  /* Bit 8: TI frame format error */
+    defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX)
+#  define SPI_SR_FRE              (1 << 8)  /* Bit 8: TI frame format error */
 #endif
 
-#ifdef CONFIG_STM32_STM32F30XX
-#define SPI_CR1_FRLVL_SHIFT       (9)       /* Bits 9-10: FIFO reception level */
-#define SPI_CR1_FRLVL_MASK        (3 << SPI_CR1_FRLVL_SHIFT)
-#  define SPI_CR1_FRLVL_EMPTY     (0 << SPI_CR1_FRLVL_SHIFT) /* FIFO empty */
-#  define SPI_CR1_FRLVL_QUARTER   (1 << SPI_CR1_FRLVL_SHIFT) /* 1/4 FIFO */
-#  define SPI_CR1_FRLVL_HALF      (2 << SPI_CR1_FRLVL_SHIFT) /* 1/2 FIFO */
-#  define SPI_CR1_FRLVL_FULL      (3 << SPI_CR1_FRLVL_SHIFT) /* FIFO full */
-#define SPI_CR1_FTLVL_SHIFT       (11)      /* Bits 11-12: FIFO transmission level */
-#define SPI_CR1_FTLVL_MASK        (3 << SPI_CR1_FTLVL_SHIFT)
-#  define SPI_CR1_FTLVL_EMPTY     (0 << SPI_CR1_FTLVL_SHIFT) /* FIFO empty */
-#  define SPI_CR1_FTLVL_QUARTER   (1 << SPI_CR1_FTLVL_SHIFT) /* 1/4 FIFO */
-#  define SPI_CR1_FTLVL_HALF      (2 << SPI_CR1_FTLVL_SHIFT) /* 1/2 FIFO */
-#  define SPI_CR1_FTLVL_FULL      (3 << SPI_CR1_FTLVL_SHIFT) /* FIFO full */
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+#define SPI_SR_FRLVL_SHIFT        (9)       /* Bits 9-10: FIFO reception level */
+#define SPI_SR_FRLVL_MASK         (3 << SPI_SR_FRLVL_SHIFT)
+#  define SPI_SR_FRLVL_EMPTY      (0 << SPI_SR_FRLVL_SHIFT) /* FIFO empty */
+#  define SPI_SR_FRLVL_QUARTER    (1 << SPI_SR_FRLVL_SHIFT) /* 1/4 FIFO */
+#  define SPI_SR_FRLVL_HALF       (2 << SPI_SR_FRLVL_SHIFT) /* 1/2 FIFO */
+#  define SPI_SR_FRLVL_FULL       (3 << SPI_SR_FRLVL_SHIFT) /* FIFO full */
+#define SPI_SR_FTLVL_SHIFT        (11)      /* Bits 11-12: FIFO transmission level */
+#define SPI_SR_FTLVL_MASK         (3 << SPI_SR_FTLVL_SHIFT)
+#  define SPI_SR_FTLVL_EMPTY      (0 << SPI_SR_FTLVL_SHIFT) /* FIFO empty */
+#  define SPI_SR_FTLVL_QUARTER    (1 << SPI_SR_FTLVL_SHIFT) /* 1/4 FIFO */
+#  define SPI_SR_FTLVL_HALF       (2 << SPI_SR_FTLVL_SHIFT) /* 1/2 FIFO */
+#  define SPI_SR_FTLVL_FULL       (3 << SPI_SR_FTLVL_SHIFT) /* FIFO full */
 #endif
 
 /* I2S configuration register */
 
 #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32F40XX)
+    defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX)
 #  define SPI_I2SCFGR_CHLEN          (1 << 0)  /* Bit 0: Channel length (number of bits per audio channel) */
 #  define SPI_I2SCFGR_DATLEN_SHIFT   (1)       /* Bit 1-2: Data length to be transferred */
 #  define SPI_I2SCFGR_DATLEN_MASK    (3 << SPI_I2SCFGR_DATLEN_SHIFT)
@@ -244,7 +249,7 @@
 /* I2S prescaler register */
 
 #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32F40XX)
+    defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX)
 #    define SPI_I2SPR_I2SDIV_SHIFT   (0)       /* Bit 0-7: I2S Linear prescaler */
 #    define SPI_I2SPR_I2SDIV_MASK    (0xff << SPI_I2SPR_I2SDIV_SHIFT)
 #    define SPI_I2SPR_ODD            (1 << 8)  /* Bit 8: Odd factor for the prescaler */
@@ -252,4 +257,3 @@
 #endif
 
 #endif /* __ARCH_ARM_STC_STM32_CHIP_STM32_SPI_H */
-
diff --git a/arch/arm/src/stm32/chip/stm32_tim.h b/arch/arm/src/stm32/chip/stm32_tim.h
index 56c748a98f46b4a98ed70feb46be41c3e0162f8c..f4113cd6ddc3ace71e7fd1a634aad70023bf05df 100644
--- a/arch/arm/src/stm32/chip/stm32_tim.h
+++ b/arch/arm/src/stm32/chip/stm32_tim.h
@@ -31,6 +31,10 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
+ * This the lower half driver for PWM and the STM32 F1 to F4 family MCUs
+ * Athough this driver does make the difference between 16/32-bit timers,
+ * it does manage all of them as 16-bit. This will have to be improved.
+ *
  ****************************************************************************************************/
 
 #ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32_TIM_H
@@ -824,7 +828,9 @@
 #define ATIM_CCER_CC4E            (1 << 12) /* Bit 12: Capture/Compare 4 output enable */
 #define ATIM_CCER_CC4P            (1 << 13) /* Bit 13: Capture/Compare 4 output Polarity */
 
-#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) || defined(CONFIG_STM32_STM32L15XX)
+#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \
+    defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX) || \
+    defined(CONFIG_STM32_STM32L15XX)
 #  define ATIM_CCER_CC4NP         (1 << 15) /* Bit 15: Capture/Compare 4 Complementary output polarity */
 #elif defined(CONFIG_STM32_STM32F30XX)
 #  define ATIM_CCER_CC4NP         (1 << 15) /* Bit 15: Capture/Compare 4 Complementary output polarity */
diff --git a/arch/arm/src/stm32/chip/stm32f102_pinmap.h b/arch/arm/src/stm32/chip/stm32f102_pinmap.h
index d2911da8645d6d3cca4c9e39851fd17b58022817..20cecf5b7ccd18c01f97d64b7c0b1915aec5bf32 100644
--- a/arch/arm/src/stm32/chip/stm32f102_pinmap.h
+++ b/arch/arm/src/stm32/chip/stm32f102_pinmap.h
@@ -198,8 +198,8 @@
 #define GPIO_USART1_RTS         (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12)
 #define GPIO_USART1_CK          (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8)
 #if defined(CONFIG_STM32_USART1_REMAP)
-#  define GPIO_USART1_TX        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN6)
-#  define GPIO_USART1_RX        (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN7)
+#  define GPIO_USART1_TX        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN6)
+#  define GPIO_USART1_RX        (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN7)
 #else
 #  define GPIO_USART1_TX        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9)
 #  define GPIO_USART1_RX        (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN10)
diff --git a/arch/arm/src/stm32/chip/stm32f103r_pinmap.h b/arch/arm/src/stm32/chip/stm32f103r_pinmap.h
index de73b1acb10e304dec845e8c7c45a2e238fc5b02..7750f67f1ac8490acd51f8b8dcbf39c713f06e96 100644
--- a/arch/arm/src/stm32/chip/stm32f103r_pinmap.h
+++ b/arch/arm/src/stm32/chip/stm32f103r_pinmap.h
@@ -237,8 +237,8 @@
 /* USART */
 
 #if defined(CONFIG_STM32_USART1_REMAP)
-#  define GPIO_USART1_TX    (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9)
-#  define GPIO_USART1_RX    (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN10)
+#  define GPIO_USART1_TX    (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN6)
+#  define GPIO_USART1_RX    (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN7)
 #else
 #  define GPIO_USART1_TX    (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9)
 #  define GPIO_USART1_RX    (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN10)
@@ -342,7 +342,7 @@
 
 #define GPIO_SDIO_D0      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN8)
 
-#ifndef CONFIG_SDIO_WIDTH_D1_ONLY
+#ifndef CONFIG_STM32_SDIO_WIDTH_D1_ONLY
 #  define GPIO_SDIO_D1    (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN9)
 #  define GPIO_SDIO_D2    (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN10)
 #  define GPIO_SDIO_D3    (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN11)
diff --git a/arch/arm/src/stm32/chip/stm32f103v_pinmap.h b/arch/arm/src/stm32/chip/stm32f103v_pinmap.h
index 61895a74e9bfe76368f1d79ad55fa373ae477168..eabf76506bd44269a962e3e0f2298c10f048eefa 100644
--- a/arch/arm/src/stm32/chip/stm32f103v_pinmap.h
+++ b/arch/arm/src/stm32/chip/stm32f103v_pinmap.h
@@ -83,7 +83,7 @@
 
 #define GPIO_SDIO_D0            (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN8)
 
-#ifndef CONFIG_SDIO_WIDTH_D1_ONLY
+#ifndef CONFIG_STM32_SDIO_WIDTH_D1_ONLY
 #  define GPIO_SDIO_D1          (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN9)
 #  define GPIO_SDIO_D2          (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN10)
 #  define GPIO_SDIO_D3          (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN11)
@@ -341,6 +341,20 @@
 #define GPIO_TIM5_CH4IN         (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3)
 #define GPIO_TIM5_CH4OUT        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN3)
 
+#define GPIO_TIM8_ETR           (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_TIM8_CH1IN         (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_TIM8_CH1OUT        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_TIM8_CH2IN         (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_TIM8_CH2OUT        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_TIM8_CH3IN         (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_TIM8_CH3OUT        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_TIM8_CH4IN         (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_TIM8_CH4OUT        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_TIM8_BKIN          (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_TIM8_CH1N          (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_TIM8_CH2N          (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_TIM8_CH3N          (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN1)
+
 #if 0 /* Needs further investigation */
 #define GPIO_TRACECK            (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTE|GPIO_PIN2)
 #define GPIO_TRACED0            (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTE|GPIO_PIN3)
@@ -356,8 +370,8 @@
 #define GPIO_USART1_RTS         (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12)
 #define GPIO_USART1_CK          (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8)
 #if defined(CONFIG_STM32_USART1_REMAP)
-#  define GPIO_USART1_TX        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN6)
-#  define GPIO_USART1_RX        (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN7)
+#  define GPIO_USART1_TX        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN6)
+#  define GPIO_USART1_RX        (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN7)
 #else
 #  define GPIO_USART1_TX        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9)
 #  define GPIO_USART1_RX        (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN10)
diff --git a/arch/arm/src/stm32/chip/stm32f103z_pinmap.h b/arch/arm/src/stm32/chip/stm32f103z_pinmap.h
index 54b09d233507d5d005f0eacb54168dea1e90df20..c0b3388ead30f1a88e952bf6eaf6009e7b0f6d7e 100644
--- a/arch/arm/src/stm32/chip/stm32f103z_pinmap.h
+++ b/arch/arm/src/stm32/chip/stm32f103z_pinmap.h
@@ -272,8 +272,8 @@
 /* USART */
 
 #if defined(CONFIG_STM32_USART1_REMAP)
-#  define GPIO_USART1_TX    (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9)
-#  define GPIO_USART1_RX    (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN10)
+#  define GPIO_USART1_TX    (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN6)
+#  define GPIO_USART1_RX    (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN7)
 #else
 #  define GPIO_USART1_TX    (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9)
 #  define GPIO_USART1_RX    (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN10)
@@ -451,7 +451,7 @@
 
 #define GPIO_SDIO_D0      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN8)
 
-#ifndef CONFIG_SDIO_WIDTH_D1_ONLY
+#ifndef CONFIG_STM32_SDIO_WIDTH_D1_ONLY
 #  define GPIO_SDIO_D1    (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN9)
 #  define GPIO_SDIO_D2    (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN10)
 #  define GPIO_SDIO_D3    (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN11)
diff --git a/arch/arm/src/stm32/chip/stm32f105r_pinmap.h b/arch/arm/src/stm32/chip/stm32f105r_pinmap.h
new file mode 100644
index 0000000000000000000000000000000000000000..0f82dc3ffd605f32eec1da183ae47353c9ecd038
--- /dev/null
+++ b/arch/arm/src/stm32/chip/stm32f105r_pinmap.h
@@ -0,0 +1,328 @@
+/************************************************************************************
+ * arch/arm/src/stm32/chip/stm32f105r_pinmap.h
+ *
+ *   Copyright (C) 2009, 2011, 2014, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32F105R_PINMAP_H
+#define __ARCH_ARM_SRC_STM32_CHIP_STM32F105R_PINMAP_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "stm32_gpio.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Alternate Pin Functions: */
+
+#define GPIO_ADC12_IN0          (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_ADC12_IN1          (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_ADC12_IN10         (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN0)
+#define GPIO_ADC12_IN11         (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN1)
+#define GPIO_ADC12_IN12         (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN2)
+#define GPIO_ADC12_IN13         (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN3)
+#define GPIO_ADC12_IN14         (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN4)
+#define GPIO_ADC12_IN15         (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN5)
+#define GPIO_ADC12_IN2          (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_ADC12_IN3          (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_ADC12_IN4          (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_ADC12_IN5          (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_ADC12_IN6          (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_ADC12_IN7          (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_ADC12_IN8          (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_ADC12_IN9          (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1)
+
+#if defined(CONFIG_STM32_CAN1_REMAP1)
+#  define GPIO_CAN1_RX          (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN8)
+#  define GPIO_CAN1_TX          (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9)
+#else
+#  define GPIO_CAN1_RX          (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN11)
+#  define GPIO_CAN1_TX          (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12)
+#endif
+
+#if defined(CONFIG_STM32_CAN2_REMAP)
+#  define GPIO_CAN2_RX          (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN5)
+#  define GPIO_CAN2_TX          (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN6)
+#else
+#  define GPIO_CAN2_RX          (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN12)
+#  define GPIO_CAN2_TX          (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13)
+#endif
+
+#if 0 /* Needs further investigation */
+#define GPIO_DAC_OUT1           (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_DAC_OUT2           (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN5)
+#endif
+
+#if defined(CONFIG_STM32_I2C1_REMAP)
+#  define GPIO_I2C1_SCL         (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8)
+#  define GPIO_I2C1_SDA         (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9)
+#else
+#  define GPIO_I2C1_SCL         (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN6)
+#  define GPIO_I2C1_SDA         (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN7)
+#endif
+#define GPIO_I2C1_SMBA          (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
+
+#define GPIO_I2C2_SCL           (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_I2C2_SDA           (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_I2C2_SMBA          (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12)
+#define GPIO_I2S2_CK            (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13)
+#define GPIO_I2S2_MCK           (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_I2S2_WS            (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12)
+
+#define GPIO_I2S3_CK            (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN3)
+#define GPIO_I2S3_MCK           (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_I2S3_SD            (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_I2S3_WS            (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN15)
+
+#define GPIO_MCO                (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8)
+
+#define GPIO_OTGFS_DM           (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_OTGFS_DP           (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12)
+#define GPIO_OTGFS_ID           (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_OTGFS_SOF          (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8)
+#define GPIO_OTGFS_VBUS         (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9)
+
+#if defined(CONFIG_STM32_SPI1_REMAP)
+#  define GPIO_SPI1_NSS         (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15)
+#  define GPIO_SPI1_SCK         (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN3)
+#  define GPIO_SPI1_MISO        (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN4)
+#  define GPIO_SPI1_MOSI        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
+#else
+#  define GPIO_SPI1_NSS         (GPIO_INPUT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN4)
+#  define GPIO_SPI1_SCK         (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN5)
+#  define GPIO_SPI1_MISO        (GPIO_INPUT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN6)
+#  define GPIO_SPI1_MOSI        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7)
+#endif
+
+#define GPIO_SPI2_NSS           (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN12)
+#define GPIO_SPI2_SCK           (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13)
+#define GPIO_SPI2_MISO          (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_SPI2_MOSI          (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN15)
+
+#if defined(CONFIG_STM32_SPI3_REMAP)
+#  define GPIO_SPI3_NSS         (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN4)
+#  define GPIO_SPI3_SCK         (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN10)
+#  define GPIO_SPI3_MISO        (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN11)
+#  define GPIO_SPI3_MOSI        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN12)
+#else
+#  define GPIO_SPI3_NSS         (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15)
+#  define GPIO_SPI3_SCK         (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN3)
+#  define GPIO_SPI3_MISO        (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN4)
+#  define GPIO_SPI3_MOSI        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
+#endif
+
+#if 0 /* Needs further investigation */
+#define GPIO_TAMPER_RTC         (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN13)
+#endif
+
+#if defined(CONFIG_STM32_TIM1_PARTIAL_REMAP)
+#  define GPIO_TIM1_ETR         (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN12)
+#  define GPIO_TIM1_CH1IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN8)
+#  define GPIO_TIM1_CH1OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8)
+#  define GPIO_TIM1_CH2IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN9)
+#  define GPIO_TIM1_CH2OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9)
+#  define GPIO_TIM1_CH3IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN10)
+#  define GPIO_TIM1_CH3OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN10)
+#  define GPIO_TIM1_CH4IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN11)
+#  define GPIO_TIM1_CH4OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN11)
+#  define GPIO_TIM1_BKIN        (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN6)
+#  define GPIO_TIM1_CH1N        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7)
+#  define GPIO_TIM1_CH2N        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN0)
+#  define GPIO_TIM1_CH3N        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN1)
+#else
+#  define GPIO_TIM1_ETR         (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN12)
+#  define GPIO_TIM1_CH1IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN8)
+#  define GPIO_TIM1_CH1OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8)
+#  define GPIO_TIM1_CH2IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN9)
+#  define GPIO_TIM1_CH2OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9)
+#  define GPIO_TIM1_CH3IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN10)
+#  define GPIO_TIM1_CH3OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN10)
+#  define GPIO_TIM1_CH4IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN11)
+#  define GPIO_TIM1_CH4OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN11)
+#  define GPIO_TIM1_BKIN        (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN12)
+#  define GPIO_TIM1_CH1N        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13)
+#  define GPIO_TIM1_CH2N        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN14)
+#  define GPIO_TIM1_CH3N        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN15)
+#endif
+
+#if defined(CONFIG_STM32_TIM2_FULL_REMAP)
+#  define GPIO_TIM2_ETR         (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15)
+#  define GPIO_TIM2_CH1IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15)
+#  define GPIO_TIM2_CH1OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN15)
+#  define GPIO_TIM2_CH2IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN3)
+#  define GPIO_TIM2_CH2OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN3)
+#  define GPIO_TIM2_CH3IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN10)
+#  define GPIO_TIM2_CH3OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10)
+#  define GPIO_TIM2_CH4IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN11)
+#  define GPIO_TIM2_CH4OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN11)
+#elif defined(CONFIG_STM32_TIM2_PARTIAL_REMAP_1)
+#  define GPIO_TIM2_ETR         (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15)
+#  define GPIO_TIM2_CH1IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15)
+#  define GPIO_TIM2_CH1OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN15)
+#  define GPIO_TIM2_CH2IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN3)
+#  define GPIO_TIM2_CH2OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN3)
+#  define GPIO_TIM2_CH3IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN2)
+#  define GPIO_TIM2_CH3OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN2)
+#  define GPIO_TIM2_CH4IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3)
+#  define GPIO_TIM2_CH4OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN3)
+#elif defined(CONFIG_STM32_TIM2_PARTIAL_REMAP_2)
+#  define GPIO_TIM2_ETR         (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0)
+#  define GPIO_TIM2_CH1IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0)
+#  define GPIO_TIM2_CH1OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN0)
+#  define GPIO_TIM2_CH2IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN1)
+#  define GPIO_TIM2_CH2OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1)
+#  define GPIO_TIM2_CH3IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN10)
+#  define GPIO_TIM2_CH3OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10)
+#  define GPIO_TIM2_CH4IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN11)
+#  define GPIO_TIM2_CH4OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN11)
+#else
+#  define GPIO_TIM2_ETR         (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0)
+#  define GPIO_TIM2_CH1IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0)
+#  define GPIO_TIM2_CH1OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN0)
+#  define GPIO_TIM2_CH2IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN1)
+#  define GPIO_TIM2_CH2OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1)
+#  define GPIO_TIM2_CH3IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN2)
+#  define GPIO_TIM2_CH3OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN2)
+#  define GPIO_TIM2_CH4IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3)
+#  define GPIO_TIM2_CH4OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN3)
+#endif
+
+#if defined(CONFIG_STM32_TIM3_FULL_REMAP)
+#  define GPIO_TIM3_CH1IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN6)
+#  define GPIO_TIM3_CH1OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN6)
+#  define GPIO_TIM3_CH2IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN7)
+#  define GPIO_TIM3_CH2OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN7)
+#  define GPIO_TIM3_CH3IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN8)
+#  define GPIO_TIM3_CH3OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN8)
+#  define GPIO_TIM3_CH4IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN9)
+#  define GPIO_TIM3_CH4OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN9)
+#elif defined(CONFIG_STM32_TIM3_PARTIAL_REMAP)
+#  define GPIO_TIM3_CH1IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN4)
+#  define GPIO_TIM3_CH1OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN4)
+#  define GPIO_TIM3_CH2IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN5)
+#  define GPIO_TIM3_CH2OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
+#  define GPIO_TIM3_CH3IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN0)
+#  define GPIO_TIM3_CH3OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN0)
+#  define GPIO_TIM3_CH4IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1)
+#  define GPIO_TIM3_CH4OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN1)
+#else
+#  define GPIO_TIM3_CH1IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN6)
+#  define GPIO_TIM3_CH1OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN6)
+#  define GPIO_TIM3_CH2IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN7)
+#  define GPIO_TIM3_CH2OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7)
+#  define GPIO_TIM3_CH3IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN0)
+#  define GPIO_TIM3_CH3OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN0)
+#  define GPIO_TIM3_CH4IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1)
+#  define GPIO_TIM3_CH4OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN1)
+#endif
+#define GPIO_TIM3_ETR           (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN2)
+
+#define GPIO_TIM4_CH1IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_TIM4_CH1OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_TIM4_CH2IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_TIM4_CH2OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_TIM4_CH3IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_TIM4_CH3OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_TIM4_CH4IN       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_TIM4_CH4OUT      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9)
+
+#define GPIO_TIM5_CH1IN         (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_TIM5_CH1OUT        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_TIM5_CH2IN         (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_TIM5_CH2OUT        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_TIM5_CH3IN         (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_TIM5_CH3OUT        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_TIM5_CH4IN         (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_TIM5_CH4OUT        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN3)
+
+#if 0 /* Needs further investigation */
+#if defined(CONFIG_STM32_TRACESWO_REMAP)
+#  define GPIO_TRACESWO         (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN3)
+#endif
+#endif
+
+#define GPIO_USART1_CTS         (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_USART1_RTS         (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12)
+#define GPIO_USART1_CK          (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8)
+#if defined(CONFIG_STM32_USART1_REMAP)
+#  define GPIO_USART1_TX        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN6)
+#  define GPIO_USART1_RX        (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN7)
+#else
+#  define GPIO_USART1_TX        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9)
+#  define GPIO_USART1_RX        (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN10)
+#endif
+
+#define GPIO_USART2_CTS       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_USART2_RTS       (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_USART2_TX        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_USART2_RX        (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_USART2_CK        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN4)
+
+#if defined(CONFIG_STM32_USART3_PARTIAL_REMAP)
+#  define GPIO_USART3_TX        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN10)
+#  define GPIO_USART3_RX        (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN11)
+#  define GPIO_USART3_CK        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN12)
+#  define GPIO_USART3_CTS       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN13)
+#  define GPIO_USART3_RTS       (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN14)
+#else
+#  define GPIO_USART3_TX        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10)
+#  define GPIO_USART3_RX        (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN11)
+#  define GPIO_USART3_CK        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12)
+#  define GPIO_USART3_CTS       (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN13)
+#  define GPIO_USART3_RTS       (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN14)
+#endif
+
+#define GPIO_UART4_RX           (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN11)
+#define GPIO_UART4_TX           (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN10)
+
+#define GPIO_UART5_RX           (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN2)
+#define GPIO_UART5_TX           (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN12)
+
+#define GPIO_WKUP               (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN0)
+
+/* Some GPIOs are accessible only as remapped, alternate functions */
+
+#if 0 /* Needs further investigation */
+#define GPIO_PA13               (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN13)
+#define GPIO_PA14               (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN14)
+#define GPIO_PA15               (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN15)
+#define GPIO_PB3                (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN3)
+#define GPIO_PB4                (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN4)
+#endif
+
+#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F105R_PINMAP_H */
diff --git a/arch/arm/src/stm32/chip/stm32f105v_pinmap.h b/arch/arm/src/stm32/chip/stm32f105v_pinmap.h
index 71ffe846487cb26032143e1d9ae69ff2cc282caa..7850a3cc359d24859c2ca14bf2fcb90f7cdfd3c4 100644
--- a/arch/arm/src/stm32/chip/stm32f105v_pinmap.h
+++ b/arch/arm/src/stm32/chip/stm32f105v_pinmap.h
@@ -91,44 +91,6 @@
 #define GPIO_DAC_OUT2           (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN5)
 #endif
 
-#if 0 /* Needs further investigation */
-#define GPIO_ETH_MDC            (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN1)
-#define GPIO_ETH_MDIO           (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN2)
-#define GPIO_ETH_MIICOL         (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN3)
-#define GPIO_ETH_MIICRSWKUP     (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN0)
-#define GPIO_ETH_MIIRXCLK       (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1)
-
-#if defined(CONFIG_STM32_ETH_REMAP)
-#  define GPIO_ETH_MIIRXD0      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN9)
-#  define GPIO_ETH_MIIRXD1      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN10)
-#  define GPIO_ETH_MIIRXD2      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN11)
-#  define GPIO_ETH_MIIRXD3      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN12)
-#  define GPIO_ETH_MIIRXDV      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN8)
-#else
-#  define GPIO_ETH_MIIRXD0      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN4)
-#  define GPIO_ETH_MIIRXD1      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN5)
-#  define GPIO_ETH_MIIRXD2      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN0)
-#  define GPIO_ETH_MIIRXD3      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN1)
-#  define GPIO_ETH_MIIRXDV      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7)
-#endif
-
-#define GPIO_ETH_MIIRXER        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10)
-#define GPIO_ETH_MIITXCLK       (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN3)
-#define GPIO_ETH_MIITXD0        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12)
-#define GPIO_ETH_MIITXD1        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13)
-#define GPIO_ETH_MIITXD2        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN2)
-#define GPIO_ETH_MIITXD3        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8)
-#define GPIO_ETH_MIITXEN        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN11)
-#define GPIO_ETH_PPSOUT         (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
-#define GPIO_ETH_RMIICRSDV      (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7)
-#define GPIO_ETH_RMIIREFCLK     (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1)
-#define GPIO_ETH_RMIIRXD0       (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN4)
-#define GPIO_ETH_RMIIRXD1       (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN5)
-#define GPIO_ETH_RMIITXD0       (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12)
-#define GPIO_ETH_RMIITXD1       (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13)
-#define GPIO_ETH_RMIITXEN       (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN11)
-#endif
-
 #if defined(CONFIG_STM32_I2C1_REMAP)
 #  define GPIO_I2C1_SCL         (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8)
 #  define GPIO_I2C1_SDA         (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9)
@@ -352,8 +314,8 @@
 #define GPIO_USART1_RTS         (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12)
 #define GPIO_USART1_CK          (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8)
 #if defined(CONFIG_STM32_USART1_REMAP)
-#  define GPIO_USART1_TX        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9)
-#  define GPIO_USART1_RX        (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN10)
+#  define GPIO_USART1_TX        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN6)
+#  define GPIO_USART1_RX        (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN7)
 #else
 #  define GPIO_USART1_TX        (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9)
 #  define GPIO_USART1_RX        (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN10)
diff --git a/arch/arm/src/stm32/chip/stm32f10xxx_dma.h b/arch/arm/src/stm32/chip/stm32f10xxx_dma.h
index a24c611a50a2b2099369a0adf2ad33ce728df9b0..673093189ac395eb181f846d6ca5041a8787d313 100644
--- a/arch/arm/src/stm32/chip/stm32f10xxx_dma.h
+++ b/arch/arm/src/stm32/chip/stm32f10xxx_dma.h
@@ -520,6 +520,75 @@
 #  define DMACHAN_UART4_TX        STM32_DMA2_CHAN5
 #  define DMACHAN_TIM8_CH2        STM32_DMA2_CHAN5
 
+#elif defined(CONFIG_STM32_STM32F33XX)
+
+#  define DMACHAN_ADC1            STM32_DMA1_CHAN1
+#  define DMACHAN_TIM2_CH3        STM32_DMA1_CHAN1
+#  define DMACHAN_TIM17_CH1_1     STM32_DMA1_CHAN1
+#  define DMACHAN_TIM17_UP_1      STM32_DMA1_CHAN1
+
+#  define DMACHAN_ADC2_1          STM32_DMA1_CHAN2
+#  define DMACHAN_SPI1_RX_1       STM32_DMA1_CHAN2
+#  define DMACHAN_USART3_TX       STM32_DMA1_CHAN2
+#  define DMACHAN_I2C1_TX_3       STM32_DMA1_CHAN4
+#  define DMACHAN_TIM1_CH1        STM32_DMA1_CHAN2
+#  define DMACHAN_TIM2_UP         STM32_DMA1_CHAN2
+#  define DMACHAN_TIM3_CH3        STM32_DMA1_CHAN2
+#  define DMACHAN_HRTIM1_M        STM32_DMA1_CHAN2
+
+#  define DMACHAN_SPI1_TX_1       STM32_DMA1_CHAN3
+#  define DMACHAN_USART3_RX       STM32_DMA1_CHAN3
+#  define DMACHAN_I2C1_RX_2       STM32_DMA1_CHAN3
+#  define DMACHAN_TIM3_CH4        STM32_DMA1_CHAN3
+#  define DMACHAN_TIM3_UP         STM32_DMA1_CHAN3
+#  define DMACHAN_TIM6_UP         STM32_DMA1_CHAN3
+#  define DMACHAN_DAC1_CH1        STM32_DMA1_CHAN3
+#  define DMACHAN_DAC16_CH1_1     STM32_DMA1_CHAN3
+#  define DMACHAN_DAC16_UP_1      STM32_DMA1_CHAN3
+#  define DMACHAN_HRTIM1_A        STM32_DMA1_CHAN3
+
+#  define DMACHAN_ADC2_2          STM32_DMA1_CHAN4
+#  define DMACHAN_SPI1_RX_2       STM32_DMA1_CHAN4
+#  define DMACHAN_USART1_TX       STM32_DMA1_CHAN4
+#  define DMACHAN_I2C1_TX_3       STM32_DMA1_CHAN4
+#  define DMACHAN_TIM1_CH4        STM32_DMA1_CHAN4
+#  define DMACHAN_TIM1_TRIG       STM32_DMA1_CHAN4
+#  define DMACHAN_TIM1_COM        STM32_DMA1_CHAN4
+#  define DMACHAN_TIM7_UP         STM32_DMA1_CHAN4
+#  define DMACHAN_DAC2_CH2        STM32_DMA1_CHAN4
+#  define DMACHAN_HRTIM1_B        STM32_DMA1_CHAN4
+
+#  define DMACHAN_SPI1_TX_2       STM32_DMA1_CHAN5
+#  define DMACHAN_USART1_RX       STM32_DMA1_CHAN5
+#  define DMACHAN_I2C1_RX_3       STM32_DMA1_CHAN5
+#  define DMACHAN_TIM1_UP         STM32_DMA1_CHAN5
+#  define DMACHAN_TIM2_CH1        STM32_DMA1_CHAN5
+#  define DMACHAN_DAC2_CH1        STM32_DMA1_CHAN5
+#  define DMACHAN_TIM15_CH1       STM32_DMA1_CHAN5
+#  define DMACHAN_TIM15_UP        STM32_DMA1_CHAN5
+#  define DMACHAN_TIM15_TRIG      STM32_DMA1_CHAN5
+#  define DMACHAN_TIM15_COM       STM32_DMA1_CHAN5
+#  define DMACHAN_HRTIM1_C        STM32_DMA1_CHAN5
+
+#  define DMACHAN_SPI1_RX_3       STM32_DMA1_CHAN6
+#  define DMACHAN_USART2_RX       STM32_DMA1_CHAN6
+#  define DMACHAN_I2C1_TX_1       STM32_DMA1_CHAN6
+#  define DMACHAN_TIM1_CH3        STM32_DMA1_CHAN6
+#  define DMACHAN_TIM3_CH1        STM32_DMA1_CHAN6
+#  define DMACHAN_TIM3_TRIG       STM32_DMA1_CHAN6
+#  define DMACHAN_TIM16_CH1_2     STM32_DMA1_CHAN6
+#  define DMACHAN_TIM16_UP_2      STM32_DMA1_CHAN6
+#  define DMACHAN_HRTIM1_D        STM32_DMA1_CHAN6
+
+#  define DMACHAN_SPI1_TX_3       STM32_DMA1_CHAN7
+#  define DMACHAN_USART2_TX       STM32_DMA1_CHAN7
+#  define DMACHAN_I2C1_RX_1       STM32_DMA1_CHAN7
+#  define DMACHAN_TIM2_CH2        STM32_DMA1_CHAN7
+#  define DMACHAN_TIM2_CH4        STM32_DMA1_CHAN7
+#  define DMACHAN_TIM17_CH1_2     STM32_DMA1_CHAN7
+#  define DMACHAN_TIM17_UP_2      STM32_DMA1_CHAN7
+#  define DMACHAN_HRTIM1_E        STM32_DMA1_CHAN7
+
 #elif defined(CONFIG_STM32_STM32F37XX)
 
 #  define DMACHAN_ADC1            STM32_DMA1_CHAN1
diff --git a/arch/arm/src/stm32/chip/stm32f10xxx_rcc.h b/arch/arm/src/stm32/chip/stm32f10xxx_rcc.h
index 35b2ad8156c2547103e02290501bcf97c4c7b96c..4318b9d9cf7a99e0ea77e595a17bc011261e4fce 100644
--- a/arch/arm/src/stm32/chip/stm32f10xxx_rcc.h
+++ b/arch/arm/src/stm32/chip/stm32f10xxx_rcc.h
@@ -148,26 +148,37 @@
 #define RCC_CFGR_PLLXTPRE           (1 << 17) /* Bit 17: HSE divider for PLL entry */
 #define RCC_CFGR_PLLMUL_SHIFT       (18)      /* Bits 21-18: PLL Multiplication Factor */
 #define RCC_CFGR_PLLMUL_MASK        (0x0f << RCC_CFGR_PLLMUL_SHIFT)
-#  define RCC_CFGR_PLLMUL_CLKx2     (0 << RCC_CFGR_PLLMUL_SHIFT)  /* 0000: PLL input clock x 2 */
-#  define RCC_CFGR_PLLMUL_CLKx3     (1 << RCC_CFGR_PLLMUL_SHIFT)  /* 0001: PLL input clock x 3 */
+#ifndef CONFIG_STM32_CONNECTIVITYLINE
+#    define RCC_CFGR_PLLMUL_CLKx2   (0 << RCC_CFGR_PLLMUL_SHIFT)  /* 0000: PLL input clock x 2 */
+#    define RCC_CFGR_PLLMUL_CLKx3   (1 << RCC_CFGR_PLLMUL_SHIFT)  /* 0001: PLL input clock x 3 */
+#endif
 #  define RCC_CFGR_PLLMUL_CLKx4     (2 << RCC_CFGR_PLLMUL_SHIFT)  /* 0010: PLL input clock x 4 */
 #  define RCC_CFGR_PLLMUL_CLKx5     (3 << RCC_CFGR_PLLMUL_SHIFT)  /* 0011: PLL input clock x 5 */
 #  define RCC_CFGR_PLLMUL_CLKx6     (4 << RCC_CFGR_PLLMUL_SHIFT)  /* 0100: PLL input clock x 6 */
 #  define RCC_CFGR_PLLMUL_CLKx7     (5 << RCC_CFGR_PLLMUL_SHIFT)  /* 0101: PLL input clock x 7 */
 #  define RCC_CFGR_PLLMUL_CLKx8     (6 << RCC_CFGR_PLLMUL_SHIFT)  /* 0110: PLL input clock x 8 */
 #  define RCC_CFGR_PLLMUL_CLKx9     (7 << RCC_CFGR_PLLMUL_SHIFT)  /* 0111: PLL input clock x 9 */
-#  define RCC_CFGR_PLLMUL_CLKx10    (8 << RCC_CFGR_PLLMUL_SHIFT)  /* 1000: PLL input clock x 10 */
-#  define RCC_CFGR_PLLMUL_CLKx11    (9 << RCC_CFGR_PLLMUL_SHIFT)  /* 1001: PLL input clock x 11 */
-#  define RCC_CFGR_PLLMUL_CLKx12    (10 << RCC_CFGR_PLLMUL_SHIFT) /* 1010: PLL input clock x 12 */
-#  define RCC_CFGR_PLLMUL_CLKx13    (11 << RCC_CFGR_PLLMUL_SHIFT) /* 1011: PLL input clock x 13 */
-#  define RCC_CFGR_PLLMUL_CLKx14    (12 << RCC_CFGR_PLLMUL_SHIFT) /* 1100: PLL input clock x 14 */
-#  define RCC_CFGR_PLLMUL_CLKx15    (13 << RCC_CFGR_PLLMUL_SHIFT) /* 1101: PLL input clock x 15 */
-#  define RCC_CFGR_PLLMUL_CLKx16    (14 << RCC_CFGR_PLLMUL_SHIFT) /* 111x: PLL input clock x 16 */
+#ifndef CONFIG_STM32_CONNECTIVITYLINE
+#    define RCC_CFGR_PLLMUL_CLKx10  (8 << RCC_CFGR_PLLMUL_SHIFT)  /* 1000: PLL input clock x 10 */
+#    define RCC_CFGR_PLLMUL_CLKx11  (9 << RCC_CFGR_PLLMUL_SHIFT)  /* 1001: PLL input clock x 11 */
+#    define RCC_CFGR_PLLMUL_CLKx12  (10 << RCC_CFGR_PLLMUL_SHIFT) /* 1010: PLL input clock x 12 */
+#    define RCC_CFGR_PLLMUL_CLKx13  (11 << RCC_CFGR_PLLMUL_SHIFT) /* 1011: PLL input clock x 13 */
+#    define RCC_CFGR_PLLMUL_CLKx14  (12 << RCC_CFGR_PLLMUL_SHIFT) /* 1100: PLL input clock x 14 */
+#    define RCC_CFGR_PLLMUL_CLKx15  (13 << RCC_CFGR_PLLMUL_SHIFT) /* 1101: PLL input clock x 15 */
+#    define RCC_CFGR_PLLMUL_CLKx16  (14 << RCC_CFGR_PLLMUL_SHIFT) /* 111x: PLL input clock x 16 */
+#else
+#    define RCC_CFGR_PLLMUL_CLKx65  (13 << RCC_CFGR_PLLMUL_SHIFT) /* 1011: PLL input clock x 6.5 */
+#endif
+
 #ifndef CONFIG_STM32_VALUELINE
 #  define RCC_CFGR_USBPRE           (1 << 22) /* Bit 22: USB FS prescaler */
+#  define RCC_CFGR_USBPREd0         (0)       /* PLLCLK / 1 */
+#  define RCC_CFGR_USBPREd15        (1)       /* PLLCLK / 1.5 */
 #endif
 #ifdef CONFIG_STM32_CONNECTIVITYLINE
 #  define RCC_CFGR_OTGFSPRE         (1 << 22) /* Bit 22: OTG FS prescaler */
+#  define RCC_CFGR_OTGFSPREd2       (1)       /* PLL_VCO (2x PLLCLK) / 2 */
+#  define RCC_CFGR_OTGFSPREd3       (0)       /* PLL_VCO (3x PLLCLK) / 3 */
 #endif
 #define RCC_CFGR_MCO_SHIFT          (24)      /* Bits 27-24: Microcontroller Clock Output */
 #define RCC_CFGR_MCO_MASK           (15 << RCC_CFGR_MCO_SHIFT)
diff --git a/arch/arm/src/stm32/chip/stm32f20xxx_pinmap.h b/arch/arm/src/stm32/chip/stm32f20xxx_pinmap.h
index b613922d8fd265630ca982cff8bb500ee101a00c..40e81354c7e667a31b1b49612ce5dbdb0f2a5716 100644
--- a/arch/arm/src/stm32/chip/stm32f20xxx_pinmap.h
+++ b/arch/arm/src/stm32/chip/stm32f20xxx_pinmap.h
@@ -230,7 +230,6 @@
 #define GPIO_ETH_RMII_TXD0_2  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN13)
 #define GPIO_ETH_RMII_TXD1_1  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13)
 #define GPIO_ETH_RMII_TXD1_2  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN14)
-#define GPIO_ETH_RMII_TX_CLK  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN3)
 #define GPIO_ETH_RMII_TX_EN_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN11)
 #define GPIO_ETH_RMII_TX_EN_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN11)
 
diff --git a/arch/arm/src/stm32/chip/stm32f30xxx_adc.h b/arch/arm/src/stm32/chip/stm32f30xxx_adc.h
index 5763260eb9ce2a079cf18513f2c7195d209d5808..7c9da24b0c15bc5595b38ad45a63ef8232004972 100644
--- a/arch/arm/src/stm32/chip/stm32f30xxx_adc.h
+++ b/arch/arm/src/stm32/chip/stm32f30xxx_adc.h
@@ -60,8 +60,8 @@
 #define STM32_ADC_SMPR1_OFFSET       0x0014  /* ADC sample time register 1 */
 #define STM32_ADC_SMPR2_OFFSET       0x0018  /* ADC sample time register 2 */
 #define STM32_ADC_TR1_OFFSET         0x0020  /* ADC watchdog threshold register 1 */
-#define STM32_ADC_TR2_OFFSET         0x0020  /* ADC watchdog threshold register 2 */
-#define STM32_ADC_TR3_OFFSET         0x0020  /* ADC watchdog threshold register 3 */
+#define STM32_ADC_TR2_OFFSET         0x0024  /* ADC watchdog threshold register 2 */
+#define STM32_ADC_TR3_OFFSET         0x0028  /* ADC watchdog threshold register 3 */
 #define STM32_ADC_SQR1_OFFSET        0x0030  /* ADC regular sequence register 1 */
 #define STM32_ADC_SQR2_OFFSET        0x0034  /* ADC regular sequence register 2 */
 #define STM32_ADC_SQR3_OFFSET        0x0038  /* ADC regular sequence register 3 */
diff --git a/arch/arm/src/stm32/chip/stm32f30xxx_memorymap.h b/arch/arm/src/stm32/chip/stm32f30xxx_memorymap.h
index 51cca40eef5b276b5c2e291f89e6c142ae05e6f3..a7cbc46117d9e8ee258a8cd0b9cdb30dd1defd0e 100644
--- a/arch/arm/src/stm32/chip/stm32f30xxx_memorymap.h
+++ b/arch/arm/src/stm32/chip/stm32f30xxx_memorymap.h
@@ -93,6 +93,7 @@
 #define STM32_TIM6_BASE      0x40001000     /* 0x40001000-0x400013ff TIM6 */
 #define STM32_TIM7_BASE      0x40001400     /* 0x40001400-0x400017ff TIM7 */
 #define STM32_RTC_BASE       0x40002800     /* 0x40002800-0x40002bff RTC */
+#define STM32_BKP_BASE       0x40002850     /* 0x40002850-0x4000288c BKP */
 #define STM32_WWDG_BASE      0x40002c00     /* 0x40002c00-0x40002fff WWDG */
 #define STM32_IWDG_BASE      0x40003000     /* 0x40003000-0x400033ff IWDG */
 #define STM32_I2S2EXT_BASE   0x40003400     /* 0x40003400-0x400037ff I2S2ext */
diff --git a/arch/arm/src/stm32/chip/stm32f33xxx_adc.h b/arch/arm/src/stm32/chip/stm32f33xxx_adc.h
new file mode 100644
index 0000000000000000000000000000000000000000..ddfbd97d1f208c104233d47d3e96cd7f7309f577
--- /dev/null
+++ b/arch/arm/src/stm32/chip/stm32f33xxx_adc.h
@@ -0,0 +1,542 @@
+/****************************************************************************************************
+ * arch/arm/src/stm32/chip/stm32f33xxx_adc.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *   Modified for STM32F334 by Mateusz Szafoni 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32F33XXX_ADC_H
+#define __ARCH_ARM_SRC_STM32_CHIP_STM32F33XXX_ADC_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+#define STM32_ADC1_BASE_OFFSET       0x0000
+#define STM32_ADC2_BASE_OFFSET       0x0100
+#define STM32_ADC12_BASE_OFFSET      0x0300
+
+#define STM32_ADC1_BASE              (STM32_ADC1_BASE_OFFSET+STM32_ADC12_BASE) /* ADC1 Master ADC */
+#define STM32_ADC2_BASE              (STM32_ADC1_BASE_OFFSET+STM32_ADC12_BASE) /* ADC2 Slave ADC */
+#define STM32_ADC12_BASE             (STM32_ADC1_BASE_OFFSET+STM32_ADC12_BASE) /* ADC1, ADC2 common */
+
+/* Register Offsets *********************************************************************************/
+
+#define STM32_ADC_ISR_OFFSET         0x0000  /* ADC interrupt and status register */
+#define STM32_ADC_IER_OFFSET         0x0004  /* ADC interrupt enable register */
+#define STM32_ADC_CR_OFFSET          0x0008  /* ADC control register */
+#define STM32_ADC_CFGR_OFFSET        0x000c  /* ADC configuration register */
+#define STM32_ADC_SMPR1_OFFSET       0x0014  /* ADC sample time register 1 */
+#define STM32_ADC_SMPR2_OFFSET       0x0018  /* ADC sample time register 2 */
+#define STM32_ADC_TR1_OFFSET         0x0020  /* ADC watchdog threshold register 1 */
+#define STM32_ADC_TR2_OFFSET         0x0024  /* ADC watchdog threshold register 2 */
+#define STM32_ADC_TR3_OFFSET         0x0028  /* ADC watchdog threshold register 3 */
+#define STM32_ADC_SQR1_OFFSET        0x0030  /* ADC regular sequence register 1 */
+#define STM32_ADC_SQR2_OFFSET        0x0034  /* ADC regular sequence register 2 */
+#define STM32_ADC_SQR3_OFFSET        0x0038  /* ADC regular sequence register 3 */
+#define STM32_ADC_SQR4_OFFSET        0x003c  /* ADC regular sequence register 4 */
+#define STM32_ADC_DR_OFFSET          0x0040  /* ADC regular data register */
+#define STM32_ADC_JSQR_OFFSET        0x004c  /* ADC injected sequence register */
+#define STM32_ADC_OFR1_OFFSET        0x0060  /* ADC offset register 1 */
+#define STM32_ADC_OFR2_OFFSET        0x0064  /* ADC offset register 2 */
+#define STM32_ADC_OFR3_OFFSET        0x0068  /* ADC offset register 3 */
+#define STM32_ADC_OFR4_OFFSET        0x006c  /* ADC data offset register 4 */
+#define STM32_ADC_JDR1_OFFSET        0x0080  /* ADC injected data register 1 */
+#define STM32_ADC_JDR2_OFFSET        0x0084  /* ADC injected data register 2 */
+#define STM32_ADC_JDR3_OFFSET        0x0088  /* ADC injected data register 3 */
+#define STM32_ADC_JDR4_OFFSET        0x008c  /* ADC injected data register 4 */
+#define STM32_ADC_AWD2CR_OFFSET      0x00a0  /* ADC analog watchdog 2 configuration register */
+#define STM32_ADC_AWD3CR_OFFSET      0x00a4  /* ADC analog watchdog 3 configuration register */
+#define STM32_ADC_DIFSEL_OFFSET      0x00b0  /* ADC differential mode selection register 2 */
+#define STM32_ADC_CALFACT_OFFSET     0x00b4  /* ADC calibration factors */
+
+/* Master and Slave ADC Common Registers */
+
+#define STM32_ADC_CSR_OFFSET         0x0000  /* Common status register */
+#define STM32_ADC_CCR_OFFSET         0x0008  /* Common control register */
+#define STM32_ADC_CDR_OFFSET         0x000c  /* Common regular data register for dual mode */
+
+/* Register Addresses *******************************************************************************/
+
+#define STM32_ADC1_ISR               (STM32_ADC1_BASE+STM32_ADC_ISR_OFFSET)
+#define STM32_ADC1_IER               (STM32_ADC1_BASE+STM32_ADC_IER_OFFSET)
+#define STM32_ADC1_CR                (STM32_ADC1_BASE+STM32_ADC_CR_OFFSET)
+#define STM32_ADC1_CFGR              (STM32_ADC1_BASE+STM32_ADC_CFGR_OFFSET)
+#define STM32_ADC1_SMPR1             (STM32_ADC1_BASE+STM32_ADC_SMPR1_OFFSET)
+#define STM32_ADC1_SMPR2             (STM32_ADC1_BASE+STM32_ADC_SMPR2_OFFSET)
+#define STM32_ADC1_TR1               (STM32_ADC1_BASE+STM32_ADC_TR1_OFFSET)
+#define STM32_ADC1_TR2               (STM32_ADC1_BASE+STM32_ADC_TR2_OFFSET)
+#define STM32_ADC1_TR3               (STM32_ADC1_BASE+STM32_ADC_TR3_OFFSET)
+#define STM32_ADC1_SQR1              (STM32_ADC1_BASE+STM32_ADC_SQR1_OFFSET)
+#define STM32_ADC1_SQR2              (STM32_ADC1_BASE+STM32_ADC_SQR2_OFFSET)
+#define STM32_ADC1_SQR3              (STM32_ADC1_BASE+STM32_ADC_SQR3_OFFSET)
+#define STM32_ADC1_SQR4              (STM32_ADC1_BASE+STM32_ADC_SQR4_OFFSET)
+#define STM32_ADC1_DR                (STM32_ADC1_BASE+STM32_ADC_DR_OFFSET)
+#define STM32_ADC1_JSQR              (STM32_ADC1_BASE+STM32_ADC_JSQR_OFFSET)
+#define STM32_ADC1_OFR1              (STM32_ADC1_BASE+STM32_ADC_OFR1_OFFSET)
+#define STM32_ADC1_OFR2              (STM32_ADC1_BASE+STM32_ADC_OFR2_OFFSET)
+#define STM32_ADC1_OFR3              (STM32_ADC1_BASE+STM32_ADC_OFR3_OFFSET)
+#define STM32_ADC1_OFR4              (STM32_ADC1_BASE+STM32_ADC_OFR4_OFFSET)
+#define STM32_ADC1_JDR1              (STM32_ADC1_BASE+STM32_ADC_JDR1_OFFSET)
+#define STM32_ADC1_JDR2              (STM32_ADC1_BASE+STM32_ADC_JDR2_OFFSET)
+#define STM32_ADC1_JDR3              (STM32_ADC1_BASE+STM32_ADC_JDR3_OFFSET)
+#define STM32_ADC1_JDR4              (STM32_ADC1_BASE+STM32_ADC_JDR4_OFFSET)
+#define STM32_ADC1_AWD2CR            (STM32_ADC1_BASE+STM32_ADC_AWD2CR_OFFSET)
+#define STM32_ADC1_AWD3CR            (STM32_ADC1_BASE+STM32_ADC_AWD3CR_OFFSET)
+#define STM32_ADC1_DIFSEL            (STM32_ADC1_BASE+STM32_ADC_DIFSEL_OFFSET)
+#define STM32_ADC1_CALFACT           (STM32_ADC1_BASE+STM32_ADC_CALFACT_OFFSET)
+
+#define STM32_ADC2_ISR               (STM32_ADC2_BASE+STM32_ADC_ISR_OFFSET)
+#define STM32_ADC2_IER               (STM32_ADC2_BASE+STM32_ADC_IER_OFFSET)
+#define STM32_ADC2_CR                (STM32_ADC2_BASE+STM32_ADC_CR_OFFSET)
+#define STM32_ADC2_CFGR              (STM32_ADC2_BASE+STM32_ADC_CFGR_OFFSET)
+#define STM32_ADC2_SMPR1             (STM32_ADC2_BASE+STM32_ADC_SMPR1_OFFSET)
+#define STM32_ADC2_SMPR2             (STM32_ADC2_BASE+STM32_ADC_SMPR2_OFFSET)
+#define STM32_ADC2_TR1               (STM32_ADC2_BASE+STM32_ADC_TR1_OFFSET)
+#define STM32_ADC2_TR2               (STM32_ADC2_BASE+STM32_ADC_TR2_OFFSET)
+#define STM32_ADC2_TR3               (STM32_ADC2_BASE+STM32_ADC_TR3_OFFSET)
+#define STM32_ADC2_SQR1              (STM32_ADC2_BASE+STM32_ADC_SQR1_OFFSET)
+#define STM32_ADC2_SQR2              (STM32_ADC2_BASE+STM32_ADC_SQR2_OFFSET)
+#define STM32_ADC2_SQR3              (STM32_ADC2_BASE+STM32_ADC_SQR3_OFFSET)
+#define STM32_ADC2_SQR4              (STM32_ADC2_BASE+STM32_ADC_SQR4_OFFSET)
+#define STM32_ADC2_DR                (STM32_ADC2_BASE+STM32_ADC_DR_OFFSET)
+#define STM32_ADC2_JSQR              (STM32_ADC2_BASE+STM32_ADC_JSQR_OFFSET)
+#define STM32_ADC2_OFR1              (STM32_ADC2_BASE+STM32_ADC_OFR1_OFFSET)
+#define STM32_ADC2_OFR2              (STM32_ADC2_BASE+STM32_ADC_OFR2_OFFSET)
+#define STM32_ADC2_OFR3              (STM32_ADC2_BASE+STM32_ADC_OFR3_OFFSET)
+#define STM32_ADC2_OFR4              (STM32_ADC2_BASE+STM32_ADC_OFR4_OFFSET)
+#define STM32_ADC2_JDR1              (STM32_ADC2_BASE+STM32_ADC_JDR1_OFFSET)
+#define STM32_ADC2_JDR2              (STM32_ADC2_BASE+STM32_ADC_JDR2_OFFSET)
+#define STM32_ADC2_JDR3              (STM32_ADC2_BASE+STM32_ADC_JDR3_OFFSET)
+#define STM32_ADC2_JDR4              (STM32_ADC2_BASE+STM32_ADC_JDR4_OFFSET)
+#define STM32_ADC2_AWD2CR            (STM32_ADC2_BASE+STM32_ADC_AWD2CR_OFFSET)
+#define STM32_ADC2_AWD3CR            (STM32_ADC2_BASE+STM32_ADC_AWD3CR_OFFSET)
+#define STM32_ADC2_DIFSEL            (STM32_ADC2_BASE+STM32_ADC_DIFSEL_OFFSET)
+#define STM32_ADC2_CALFACT           (STM32_ADC2_BASE+STM32_ADC_CALFACT_OFFSET)
+
+#define STM32_ADC12_CSR              (STM32_ADC12_BASE+STM32_ADC_CSR_OFFSET)
+#define STM32_ADC12_CCR              (STM32_ADC12_BASE+STM32_ADC_CCR_OFFSET)
+#define STM32_ADC12_CDR              (STM32_ADC12_BASE+STM32_ADC_CDR_OFFSET)
+
+/* Register Bitfield Definitions ********************************************************************/
+/* ADC interrupt and status register (ISR) and ADC interrupt enable register (IER) */
+
+#define ADC_INT_ARDY                 (1 << 0)  /* Bit 0:  ADC ready */
+#define ADC_INT_EOSMP                (1 << 1)  /* Bit 1:  End of sampling flag */
+#define ADC_INT_EOC                  (1 << 2)  /* Bit 2:  End of conversion */
+#define ADC_INT_EOS                  (1 << 3)  /* Bit 3:  End of regular sequence flag */
+#define ADC_INT_OVR                  (1 << 4)  /* Bit 4:  Overrun */
+#define ADC_INT_JEOC                 (1 << 5)  /* Bit 5:  Injected channel end of conversion */
+#define ADC_INT_JEOS                 (1 << 6)  /* Bit 6:  Injected channel end of sequence flag */
+#define ADC_INT_AWD1                 (1 << 7)  /* Bit 7:  Analog watchdog 1 flag */
+#define ADC_INT_AWD2                 (1 << 8)  /* Bit 8:  Analog watchdog 2 flag */
+#define ADC_INT_AWD3                 (1 << 9)  /* Bit 9:  Analog watchdog 3 flag */
+#define ADC_INT_JQOVF                (1 << 10) /* Bit 10: Injected context queue overflow */
+
+/* ADC control register */
+
+#define ADC_CR_ADEN                  (1 << 0)  /* Bit 0: ADC enable control */
+#define ADC_CR_ADDIS                 (1 << 1)  /* Bit 1: ADC disable command */
+#define ADC_CR_ADSTART               (1 << 2)  /* Bit 2: ADC start of regular conversion */
+#define ADC_CR_JADSTART              (1 << 3)  /* Bit 3: ADC start of injected conversion */
+#define ADC_CR_ADSTP                 (1 << 4)  /* Bit 4: ADC stop of regular conversion command */
+#define ADC_CR_JADSTP                (1 << 5)  /* Bit 5: ADC stop of injected conversion command */
+#define ADC_CR_ADVREGEN_SHIFT        (28)      /* Bits 28-29: ADC voltage regulator enable */
+#define ADC_CR_ADVREGEN_MASK         (3 << ADC_CR_ADVREGEN_SHIFT)
+#  define ADC_CR_ADVREGEN_INTER      (0 << ADC_CR_ADVREGEN_SHIFT) /* Intermediate state */
+#  define ADC_CR_ADVREGEN_ENABLED    (1 << ADC_CR_ADVREGEN_SHIFT) /* ADC Voltage regulator enabled */
+#  define ADC_CR_ADVREGEN_DISABLED   (2 << ADC_CR_ADVREGEN_SHIFT) /* ADC Voltage regulator disabled */
+#define ADC_CR_ADCALDIF              (1 << 30) /* Bit 30: Differential mode for calibration */
+#define ADC_CR_ADCAL                 (1 << 31) /* Bit 31: ADC calibration */
+
+/* ADC configuration register */
+
+#define ADC_CFGR_DMAEN               (1 << 0)  /* Bit 0:  Direct memory access enable */
+#define ADC_CFGR_DMACFG              (1 << 1)  /* Bit 1:  Direct memory access configuration */
+#define ADC_CFGR_RES_SHIFT           (3)       /* Bits 3-4: Data resolution */
+#define ADC_CFGR_RES_MASK            (3 << ADC_CFGR_RES_SHIFT)
+#  define ADC_CFGR_RES_12BIT         (0 << ADC_CFGR_RES_SHIFT) /* 15 ADCCLK clyes */
+#  define ADC_CFGR_RES_10BIT         (1 << ADC_CFGR_RES_SHIFT) /* 13 ADCCLK clyes */
+#  define ADC_CFGR_RES_8BIT          (2 << ADC_CFGR_RES_SHIFT) /* 11 ADCCLK clyes */
+#  define ADC_CFGR_RES_6BIT          (3 << ADC_CFGR_RES_SHIFT) /* 9 ADCCLK clyes */
+#define ADC_CFGR_ALIGN               (1 << 5)  /* Bit 5:  Data Alignment */
+#define ADC_CFGR_EXTSEL_SHIFT        (6)       /* Bits 6-9: External Event Select for regular group */
+#define ADC_CFGR_EXTSEL_MASK         (15 << ADC_CFGR_EXTSEL_SHIFT)
+#  define ADC12_CFGR_EXTSEL_T1CC1    (0 << ADC_CFGR_EXTSEL_SHIFT)
+#  define ADC12_CFGR_EXTSEL_T1CC2    (1 << ADC_CFGR_EXTSEL_SHIFT)
+#  define ADC12_CFGR_EXTSEL_T1CC3    (2 << ADC_CFGR_EXTSEL_SHIFT)
+#  define ADC12_CFGR_EXTSEL_T2CC2    (3 << ADC_CFGR_EXTSEL_SHIFT)
+#  define ADC12_CFGR_EXTSEL_T3TRGO   (4 << ADC_CFGR_EXTSEL_SHIFT)
+                                                                   /* 0101: Reserved */
+#  define ADC12_CFGR_EXTSEL_EXTI11   (6 << ADC_CFGR_EXTSEL_SHIFT)  /* 0110: EXTI line 11 */
+#  define ADC12_CFGR_EXTSEL_HRT1TRG1 (7 << ADC_CFGR_EXTSEL_SHIFT)  /* 0111: HRTIM1 ADCTRG1 event */
+#  define ADC12_CFGR_EXTSEL_HRT1TRG3 (8 << ADC_CFGR_EXTSEL_SHIFT)  /* 1000: HRTIM1 ADCTRG3 event */
+#  define ADC12_CFGR_EXTSEL_T1TRGO   (9 << ADC_CFGR_EXTSEL_SHIFT)
+#  define ADC12_CFGR_EXTSEL_T1TRGO2  (10 << ADC_CFGR_EXTSEL_SHIFT)
+#  define ADC12_CFGR_EXTSEL_T2TRGO   (11 << ADC_CFGR_EXTSEL_SHIFT)
+                                                                    /* 1100: Reserved */
+#  define ADC12_CFGR_EXTSEL_T6TRGO   (13 << ADC_CFGR_EXTSEL_SHIFT)
+#  define ADC12_CFGR_EXTSEL_T15TRGO  (14 << ADC_CFGR_EXTSEL_SHIFT)
+#  define ADC12_CFGR_EXTSEL_T3CC4    (15 << ADC_CFGR_EXTSEL_SHIFT)
+#define ADC_CFGR_EXTEN_SHIFT         (10)      /* Bits 10-11: External trigger/polarity selection regular channels */
+#define ADC_CFGR_EXTEN_MASK          (3 << ADC_CFGR_EXTEN_SHIFT)
+#  define ADC_CFGR_EXTEN_NONE        (0 << ADC_CFGR_EXTEN_SHIFT) /* Trigger detection disabled */
+#  define ADC_CFGR_EXTEN_RISING      (1 << ADC_CFGR_EXTEN_SHIFT) /* Trigger detection on the rising edge */
+#  define ADC_CFGR_EXTEN_FALLING     (2 << ADC_CFGR_EXTEN_SHIFT) /* Trigger detection on the falling edge */
+#  define ADC_CFGR_EXTEN_BOTH        (3 << ADC_CFGR_EXTEN_SHIFT) /* Trigger detection on both edges */
+#define ADC_CFGR_OVRMOD              (1 << 12) /* Bit 12: Overrun Mode */
+#define ADC_CFGR_CONT                (1 << 13) /* Bit 13: Continuous mode for regular conversions */
+#define ADC_CFGR_AUTDLY              (1 << 14) /* Bit 14: Delayed conversion mode */
+#define ADC_CFGR_DISCEN              (1 << 16) /* Bit 16: Discontinuous mode on regular channels */
+#define ADC_CFGR_DISCNUM_SHIFT       (17)      /* Bits 17-19: Discontinuous mode channel count */
+#define ADC_CFGR_DISCNUM_MASK        (7 << ADC_CFGR_DISCNUM_SHIFT)
+#  define ADC_CFGR_DISCNUM(n)        (((n) - 1) << ADC_CFGR_DISCNUM_SHIFT) /* n = 1..8 channels */
+#define ADC_CFGR_JDISCEN             (1 << 20) /* Bit 20: Discontinuous mode on injected channels */
+#define ADC_CFGR_JQM                 (1 << 21) /* Bit 21: JSQR queue mode */
+#define ADC_CFGR_AWD1SGL             (1 << 22) /* Bit 22: Enable watchdog on single/all channels */
+#define ADC_CFGR_AWD1EN              (1 << 23) /* Bit 23: Analog watchdog enable 1 regular channels */
+#define ADC_CFGR_JAWD1EN             (1 << 22) /* Bit 22: Analog watchdog enable 1 injected channels */
+#define ADC_CFGR_JAUTO               (1 << 25) /* Bit 25: Automatic Injected Group conversion */
+#define ADC_CFGR_AWD1CH_SHIFT        (26)      /* Bits 26-30: Analog watchdog 1 channel select bits */
+#define ADC_CFGR_AWD1CH_MASK         (31 << ADC_CFGR_AWD1CH_SHIFT)
+#  define ADC_CFGR_AWD1CH_DISABLED   (0 << ADC_CFGR_AWD1CH_SHIFT)
+
+/* ADC sample time register 1 */
+
+#define ADC_SMPR_1p5                 0         /* 000: 1.5 cycles */
+#define ADC_SMPR_2p5                 1         /* 001: 2.5 cycles */
+#define ADC_SMPR_4p5                 2         /* 010: 4.5 cycles */
+#define ADC_SMPR_7p5                 3         /* 011: 7.5 cycles */
+#define ADC_SMPR_19p5                4         /* 100: 19.5 cycles */
+#define ADC_SMPR_61p5                5         /* 101: 61.5 cycles */
+#define ADC_SMPR_181p5               6         /* 110: 181.5 cycles */
+#define ADC_SMPR_601p5               7         /* 111: 601.5 cycles */
+
+#define ADC_SMPR1_SMP1_SHIFT         (3)       /* Bits 5-3: Channel 1 Sample time selection */
+#define ADC_SMPR1_SMP1_MASK          (7 << ADC_SMPR1_SMP1_SHIFT)
+#define ADC_SMPR1_SMP2_SHIFT         (6)       /* Bits 8-6: Channel 2 Sample time selection */
+#define ADC_SMPR1_SMP2_MASK          (7 << ADC_SMPR1_SMP2_SHIFT)
+#define ADC_SMPR1_SMP3_SHIFT         (9)       /* Bits 11-9: Channel 3 Sample time selection */
+#define ADC_SMPR1_SMP3_MASK          (7 << ADC_SMPR1_SMP3_SHIFT)
+#define ADC_SMPR1_SMP4_SHIFT         (12)      /* Bits 14-12: Channel 4 Sample time selection */
+#define ADC_SMPR1_SMP4_MASK          (7 << ADC_SMPR1_SMP4_SHIFT)
+#define ADC_SMPR1_SMP5_SHIFT         (15)      /* Bits 17-15: Channel 5 Sample time selection */
+#define ADC_SMPR1_SMP5_MASK          (7 << ADC_SMPR1_SMP5_SHIFT)
+#define ADC_SMPR1_SMP6_SHIFT         (18)      /* Bits 20-18: Channel 6 Sample time selection */
+#define ADC_SMPR1_SMP6_MASK          (7 << ADC_SMPR1_SMP6_SHIFT)
+#define ADC_SMPR1_SMP7_SHIFT         (21)      /* Bits 23-21: Channel 7 Sample time selection */
+#define ADC_SMPR1_SMP7_MASK          (7 << ADC_SMPR1_SMP7_SHIFT)
+#define ADC_SMPR1_SMP8_SHIFT         (24)      /* Bits 26-24: Channel 8 Sample time selection */
+#define ADC_SMPR1_SMP8_MASK          (7 << ADC_SMPR1_SMP8_SHIFT)
+#define ADC_SMPR1_SMP9_SHIFT         (27)      /* Bits 29-27: Channel 9 Sample time selection */
+#define ADC_SMPR1_SMP9_MASK          (7 << ADC_SMPR1_SMP9_SHIFT)
+
+/* ADC sample time register 2 */
+
+#define ADC_SMPR2_SMP10_SHIFT        (0)       /* Bits 0-2: Channel 10 Sample time selection */
+#define ADC_SMPR2_SMP10_MASK         (7 << ADC_SMPR2_SMP10_SHIFT)
+#define ADC_SMPR2_SMP11_SHIFT        (3)       /* Bits 3-5: Channel 11 Sample time selection */
+#define ADC_SMPR2_SMP11_MASK         (7 << ADC_SMPR2_SMP11_SHIFT)
+#define ADC_SMPR2_SMP12_SHIFT        (6)       /* Bits 6-8: Channel 12 Sample time selection */
+#define ADC_SMPR2_SMP12_MASK         (7 << ADC_SMPR2_SMP12_SHIFT)
+#define ADC_SMPR2_SMP13_SHIFT        (9)       /* Bits 9-11: Channel 13 Sample time selection */
+#define ADC_SMPR2_SMP13_MASK         (7 << ADC_SMPR2_SMP13_SHIFT)
+#define ADC_SMPR2_SMP14_SHIFT        (12)      /* Bits 12-14: Channel 14 Sample time selection */
+#define ADC_SMPR2_SMP14_MASK         (7 << ADC_SMPR2_SMP14_SHIFT)
+#define ADC_SMPR2_SMP15_SHIFT        (15)      /* Bits 15-17: Channel 15 Sample time selection */
+#define ADC_SMPR2_SMP15_MASK         (7 << ADC_SMPR2_SMP15_SHIFT)
+#define ADC_SMPR2_SMP16_SHIFT        (18)      /* Bits 18-20: Channel 16 Sample time selection */
+#define ADC_SMPR2_SMP16_MASK         (7 << ADC_SMPR2_SMP16_SHIFT)
+#define ADC_SMPR2_SMP17_SHIFT        (21)      /* Bits 21-23: Channel 17 Sample time selection */
+#define ADC_SMPR2_SMP17_MASK         (7 << ADC_SMPR2_SMP17_SHIFT)
+#define ADC_SMPR2_SMP18_SHIFT        (21)      /* Bits 24-26: Channel 18 Sample time selection */
+#define ADC_SMPR2_SMP18_MASK         (7 << ADC_SMPR2_SMP17_SHIFT)
+
+/* ADC watchdog threshold register 1 */
+
+#define ADC_TR1_LT_SHIFT             (0)      /* Bits 0-11: Analog watchdog 1 lower threshold */
+#define ADC_TR1_LT_MASK              (0x0fff << ADC_TR1_LT_SHIFT)
+#define ADC_TR1_HT_SHIFT             (16)     /* Bits 16-27: Analog watchdog 1 higher threshold */
+#define ADC_TR1_HT_MASK              (0x0fff << ADC_TR1_HT_SHIFT)
+
+/* ADC watchdog threshold register 2 */
+
+#define ADC_TR2_LT_SHIFT             (0)      /* Bits 0-7: Analog watchdog 2 lower threshold */
+#define ADC_TR2_LT_MASK              (0xff << ADC_TR2_LT_SHIFT)
+#define ADC_TR2_HT_SHIFT             (16)     /* Bits 16-23: Analog watchdog 2 higher threshold */
+#define ADC_TR2_HT_MASK              (0xff << ADC_TR2_HT_SHIFT)
+
+/* ADC watchdog threshold register 3 */
+
+#define ADC_TR3_LT_SHIFT             (0)      /* Bits 0-7: Analog watchdog 3 lower threshold */
+#define ADC_TR3_LT_MASK              (0xff << ADC_TR3_LT_SHIFT)
+#define ADC_TR3_HT_SHIFT             (16)     /* Bits 16-23: Analog watchdog 3 higher threshold */
+#define ADC_TR3_HT_MASK              (0xff << ADC_TR3_HT_SHIFT)
+
+/* Offset between SQ bits */
+
+#define ADC_SQ_OFFSET                (6)
+
+/* ADC regular sequence register 1 */
+
+#define ADC_SQR1_L_SHIFT             (0)         /* Bits 0-3:   Regular channel sequence length */
+#define ADC_SQR1_L_MASK              (0x0f << ADC_SQR1_L_SHIFT)
+#define ADC_SQR1_SQ1_SHIFT           (6)         /* Bits 6-10:  13th conversion in regular sequence */
+#define ADC_SQR1_SQ1_MASK            (0x1f << ADC_SQR1_SQ1_SHIFT)
+#define ADC_SQR1_SQ2_SHIFT           (12)        /* Bits 12-16: 2nd conversion in regular sequence */
+#define ADC_SQR1_SQ2_MASK            (0x1f << ADC_SQR1_SQ2_SHIFT)
+#define ADC_SQR1_SQ3_SHIFT           (18)        /* Bits 18-22: 3rd conversion in regular sequence */
+#define ADC_SQR1_SQ3_MASK            (0x1f << ADC_SQR1_SQ3_SHIFT)
+#define ADC_SQR1_SQ4_SHIFT           (24)        /* Bits 24-28: 4th conversion in regular sequence */
+#define ADC_SQR1_SQ4_MASK            (0x1f << ADC_SQR1_SQ4_SHIFT)
+#define ADC_SQR1_RESERVED            (0xe0820830)
+#define ADC_SQR1_FIRST               (1)
+#define ADC_SQR1_LAST                (4)
+#define ADC_SQR1_SQ_OFFSET           (1*ADC_SQ_OFFSET)
+
+/* ADC regular sequence register 2 */
+
+#define ADC_SQR2_SQ5_SHIFT           (0)         /* Bits 4-0:   5th conversion in regular sequence */
+#define ADC_SQR2_SQ5_MASK            (0x1f << ADC_SQR2_SQ5_SHIFT)
+#define ADC_SQR2_SQ6_SHIFT           (6)         /* Bits 6-10:  6th conversion in regular sequence */
+#define ADC_SQR2_SQ6_MASK            (0x1f << ADC_SQR2_SQ6_SHIFT)
+#define ADC_SQR2_SQ7_SHIFT           (12)        /* Bits 12-16: 7th conversion in regular sequence */
+#define ADC_SQR2_SQ7_MASK            (0x1f << ADC_SQR2_SQ7_SHIFT)
+#define ADC_SQR2_SQ8_SHIFT           (18)        /* Bits 18-22: 8th conversion in regular sequence */
+#define ADC_SQR2_SQ8_MASK            (0x1f << ADC_SQR2_SQ8_SHIFT)
+#define ADC_SQR2_SQ9_SHIFT           (24)        /* Bits 24-28: 9th conversion in regular sequence */
+#define ADC_SQR2_SQ9_MASK            (0x1f << ADC_SQR2_SQ9_SHIFT)
+#define ADC_SQR2_RESERVED            (0xe0820820)
+#define ADC_SQR2_FIRST               (5)
+#define ADC_SQR2_LAST                (9)
+#define ADC_SQR2_SQ_OFFSET           (0)
+
+/* ADC regular sequence register 3 */
+
+#define ADC_SQR3_SQ10_SHIFT          (0)         /* Bits 4-0:   10th conversion in regular sequence */
+#define ADC_SQR3_SQ10_MASK           (0x1f << ADC_SQR3_SQ10_SHIFT)
+#define ADC_SQR3_SQ11_SHIFT          (6)         /* Bits 6-10:  11th conversion in regular sequence */
+#define ADC_SQR3_SQ11_MASK           (0x1f << ADC_SQR3_SQ11_SHIFT)
+#define ADC_SQR3_SQ12_SHIFT          (12)        /* Bits 12-16: 12th conversion in regular sequence */
+#define ADC_SQR3_SQ12_MASK           (0x1f << ADC_SQR3_SQ12_SHIFT)
+#define ADC_SQR3_SQ13_SHIFT          (18)        /* Bits 18-22: 13th conversion in regular sequence */
+#define ADC_SQR3_SQ13_MASK           (0x1f << ADC_SQR3_SQ13_SHIFT)
+#define ADC_SQR3_SQ14_SHIFT          (24)        /* Bits 24-28: 14th conversion in regular sequence */
+#define ADC_SQR3_SQ14_MASK           (0x1f << ADC_SQR3_SQ14_SHIFT)
+#define ADC_SQR3_RESERVED            (0xe0820820)
+#define ADC_SQR3_FIRST               (10)
+#define ADC_SQR3_LAST                (14)
+#define ADC_SQR3_SQ_OFFSET           (0)
+
+/* ADC regular sequence register 4 */
+
+#define ADC_SQR4_SQ15_SHIFT          (0)         /* Bits 4-0:   15th conversion in regular sequence */
+#define ADC_SQR4_SQ15_MASK           (0x1f << ADC_SQR4_SQ15_SHIFT)
+#define ADC_SQR4_SQ16_SHIFT          (6)         /* Bits 6-10:  16th conversion in regular sequence */
+#define ADC_SQR4_SQ16_MASK           (0x1f << ADC_SQR4_SQ16_SHIFT)
+#define ADC_SQR4_RESERVED            (0xfffff820)
+#define ADC_SQR4_FIRST               (15)
+#define ADC_SQR4_LAST                (16)
+#define ADC_SQR4_SQ_OFFSET           (0)
+
+/* ADC regular data register */
+
+#define ADC_DR_RDATA_SHIFT           (0)
+#define ADC_DR_RDATA_MASK            (0xffff << ADC_DR_RDATA_SHIFT)
+
+/* ADC injected sequence register */
+
+#define ADC_JSQR_JL_SHIFT             (0)       /* Bits 0-1: Injected Sequence length */
+#define ADC_JSQR_JL_MASK              (3 << ADC_JSQR_JL_SHIFT)
+#  define ADC_JSQR_JL(n)              (((n)-1) << ADC_JSQR_JL_SHIFT) /* n=1..4 */
+#define ADC_JSQR_JEXTSEL_SHIFT        (2)       /* Bits 2-5: External Trigger Selection for injected group */
+#define ADC_JSQR_JEXTSEL_MASK         (15 << ADC_JSQR_JEXTSEL_SHIFT)
+#  define ADC12_JSQR_JEXTSEL_T1TRGO   (0 << ADC_JSQR_JEXTSEL_SHIFT)
+#  define ADC12_JSQR_JEXTSEL_T1CC4    (1 << ADC_JSQR_JEXTSEL_SHIFT)
+#  define ADC12_JSQR_JEXTSEL_T2TRGO   (2 << ADC_JSQR_JEXTSEL_SHIFT)
+#  define ADC12_JSQR_JEXTSEL_T2CC1    (3 << ADC_JSQR_JEXTSEL_SHIFT)
+#  define ADC12_JSQR_JEXTSEL_T3CC4    (4 << ADC_JSQR_JEXTSEL_SHIFT)
+                                                                     /* 0101: Reserved */
+#  define ADC12_JSQR_JEXTSEL_EXTI15   (6 << ADC_JSQR_JEXTSEL_SHIFT)  /* 0110: EXTI line 15 */
+                                                                     /* 0111: Reserved */
+#  define ADC12_JSQR_JEXTSEL_T1TRGO2  (8 << ADC_JSQR_JEXTSEL_SHIFT)
+#  define ADC12_JSQR_JEXTSEL_HRT1TRG2 (9 << ADC_JSQR_JEXTSEL_SHIFT)  /* 1001: HRTIM1 ADCTRG2 event */
+#  define ADC12_JSQR_JEXTSEL_HRT1TRG4 (10 << ADC_JSQR_JEXTSEL_SHIFT) /* 1010: HRTIM1 ADCTRG4 event */
+#  define ADC12_JSQR_JEXTSEL_T3CC3    (11 << ADC_JSQR_JEXTSEL_SHIFT)
+#  define ADC12_JSQR_JEXTSEL_T3TRGO   (12 << ADC_JSQR_JEXTSEL_SHIFT)
+#  define ADC12_JSQR_JEXTSEL_T3CC1    (13 << ADC_JSQR_JEXTSEL_SHIFT)
+#  define ADC12_JSQR_JEXTSEL_T6TRGO   (14 << ADC_JSQR_JEXTSEL_SHIFT)
+#  define ADC12_JSQR_JEXTSEL_T15TRGO  (15 << ADC_JSQR_JEXTSEL_SHIFT)
+#  define ADC_JSQR_JEXTEN_SHIFT       (6)       /* Bits 6-7: External trigger selection for injected greoup */
+#  define ADC_JSQR_JEXTEN_MASK        (3 << ADC_JSQR_JEXTEN_SHIFT)
+#    define ADC_JSQR_JEXTEN_NONE      (0 << ADC_JSQR_JEXTEN_SHIFT) /* 00: Trigger detection disabled */
+#    define ADC_JSQR_JEXTEN_RISING    (1 << ADC_JSQR_JEXTEN_SHIFT) /* 01: Trigger detection on the rising edge */
+#    define ADC_JSQR_JEXTEN_FALLING   (2 << ADC_JSQR_JEXTEN_SHIFT) /* 10: Trigger detection on the falling edge */
+#    define ADC_JSQR_JEXTEN_BOTH      (3 << ADC_JSQR_JEXTEN_SHIFT) /* 11: Trigger detection on both the rising and falling edges */
+#define ADC_JSQR_JSQ1_SHIFT          (8)        /* Bits 8-12: 1st conversion in injected sequence */
+#define ADC_JSQR_JSQ1_MASK           (0x1f << ADC_JSQR_JSQ1_SHIFT)
+#  define ADC_JSQR_JSQ1(ch)          ((ch) << ADC_JSQR_JSQ1_SHIFT) /* Channel number 1..18 */
+#define ADC_JSQR_JSQ2_SHIFT          (14)       /* Bits 14-18: 2nd conversion in injected sequence */
+#define ADC_JSQR_JSQ2_MASK           (0x1f << ADC_JSQR_JSQ2_MASK)
+#  define ADC_JSQR_JSQ2(ch)          ((ch) << ADC_JSQR_JSQ2_MASK) /* Channel number 1..18 */
+#define ADC_JSQR_JSQ3_SHIFT          (20)       /* Bits 20-24: 3rd conversion in injected sequence */
+#define ADC_JSQR_JSQ3_MASK           (0x1f << ADC_JSQR_JSQ3_SHIFT)
+#  define ADC_JSQR_JSQ3(ch)          ((ch) << ADC_JSQR_JSQ3_SHIFT) /* Channel number 1..18 */
+#define ADC_JSQR_JSQ4_SHIFT          (26)       /* Bits 26-30: 4th conversion in injected sequence */
+#define ADC_JSQR_JSQ4_MASK           (0x1f << ADC_JSQR_JSQ4_SHIFT)
+#  define ADC_JSQR_JSQ4(ch)          ((ch) << ADC_JSQR_JSQ4_SHIFT) /* Channel number 1..18 */
+
+/* ADC offset register 1 and 2 */
+
+#define ADC_OFR_OFFSETY_SHIFT        (0)        /* Bits 0-11: Data offset y for channel OFFSETY_CH */
+#define ADC_OFR_OFFSETY_MASK         (0x0fff << ADC_OFR_OFFSETY_SHIFT)
+#  define ADC_OFR_OFFSETY(offset)    ((offset) << ADC_OFR_OFFSETY_SHIFT)
+#define ADC_OFR_OFFSETY_CH_SHIFT     (26)       /* Bits 26-30: Channel selection for data offset y */
+#define ADC_OFR_OFFSETY_CH_MASK      (31 << ADC_OFR_OFFSETY_CH_SHIFT)
+#  define ADC_OFR_OFFSETY_CH(ch)     ((ch) << ADC_OFR_OFFSETY_CH_SHIFT)
+#define ADC_OFR_OFFSETY_EN           (1 << 31)  /* Bit 31: Offset y enable */
+
+/* ADC injected data register 1 and 2 */
+
+#define ADC_JDR_JDATA_SHIFT          (0)
+#define ADC_JDR_JDATA_MASK           (0xffff << ADC_JDR_JDATA_SHIFT)
+
+/* ADC analog watchdog 2 configuration register */
+
+#define ADC_AWD2CR_CH_SHIFT          (1)        /* Bits 1-18: Analog watchdog 2 channel selection */
+#define ADC_AWD2CR_CH_MASK           (0x3ffff << ADC_AWD2CR_CH_SHIFT)
+#  define ADC_AWD2CR_CH(n)           (1 << (n)) /* Channel n=1..18 */
+
+/* ADC analog watchdog 3 configuration register */
+
+#define ADC_AWD3CR_CH_SHIFT          (1)        /* Bits 1-18: Analog watchdog 2 channel selection */
+#define ADC_AWD3CR_CH_MASK           (0x3ffff << ADC_AWD3CR_CH_SHIFT)
+#  define ADC_AWD3CR_CH(n)           (1 << (n)) /* Channel n=1..18 */
+
+/* ADC differential mode selection register 2 */
+#define ADC_DIFSEL_
+
+#define ADC_DIFSEL_CH_SHIFT          (1)        /* Bits 1-18: Analog watchdog 2 channel selection */
+#define ADC_DIFSEL_CH_MASK           (0x3ffff << ADC_DIFSEL_CH_SHIFT)
+#  define ADC_DIFSEL_CH(n)           (1 << (n)) /* Channel n=1..18 */
+
+/* ADC calibration factors */
+
+#define ADC_CALFACT_S_SHIFT          (0)        /* Bits 0-6: Calibration factors in single-ended mode */
+#define ADC_CALFACT_S_MASK           (0x7f << ADC_CALFACT_S_SHIFT)
+#define ADC_CALFACT_D_SHIFT          (16)       /* Bits 16-22: Calibration Factors indifferential mode */
+#define ADC_CALFACT_D_MASK           (0x7f << ADC_CALFACT_D_SHIFT)
+
+/* Common status register */
+
+#define ADC_CSR_ADRDY_MST            (1 << 0)  /* Bit 0: Master ADC ready */
+#define ADC_CSR_EOSMP_MST            (1 << 1)  /* Bit 1: End of Sampling phase flag (master ADC) */
+#define ADC_CSR_EOC_MST              (1 << 2)  /* Bit 2: End of regular conversion (master ADC) */
+#define ADC_CSR_EOS_MST              (1 << 3)  /* Bit 3: End of regular sequence flag (master ADC) */
+#define ADC_CSR_OVR_MST              (1 << 4)  /* Bit 4: Overrun flag (master ADC) */
+#define ADC_CSR_JEOC_MST             (1 << 5)  /* Bit 5: End of injected conversion flag (master ADC) */
+#define ADC_CSR_JEOS_MST             (1 << 6)  /* Bit 6: End of injected sequence flag (master ADC) */
+#define ADC_CSR_AWD1_MST             (1 << 7)  /* Bit 7: Analog watchdog 1 flag (master ADC) */
+#define ADC_CSR_AWD2_MST             (1 << 8)  /* Bit 8: Analog watchdog 2 flag (master ADC) */
+#define ADC_CSR_AWD3_MST             (1 << 9)  /* Bit 9: Analog watchdog 3 flag (master ADC) */
+#define ADC_CSR_JQOVF_MST            (1 << 10) /* Bit 10: Injected Context Queue Overflow flag (master ADC) */
+#define ADC_CSR_ADRDY_SLV            (1 << 16) /* Bit 16: Slave ADC ready */
+#define ADC_CSR_EOSMP_SLV            (1 << 17) /* Bit 17: End of Sampling phase flag (slave ADC) */
+#define ADC_CSR_EOC_SLV              (1 << 18) /* Bit 18: End of regular conversion (slave ADC) */
+#define ADC_CSR_EOS_SLV              (1 << 19) /* Bit 19: End of regular sequence flag (slave ADC) */
+#define ADC_CSR_OVR_SLV              (1 << 20) /* Bit 20: Overrun flag (slave ADC) */
+#define ADC_CSR_JEOC_SLV             (1 << 21) /* Bit 21: End of injected conversion flag (slave ADC) */
+#define ADC_CSR_JEOS_SLV             (1 << 22) /* Bit 22: End of injected sequence flag (slave ADC) */
+#define ADC_CSR_AWD1_SLV             (1 << 23) /* Bit 23: Analog watchdog 1 flag (slave ADC) */
+#define ADC_CSR_AWD2_SLV             (1 << 24) /* Bit 24: Analog watchdog 2 flag (slave ADC) */
+#define ADC_CSR_AWD3_SLV             (1 << 25) /* Bit 25: Analog watchdog 3 flag (slave ADC) */
+#define ADC_CSR_JQOVF_SLV            (1 << 26) /* Bit 26: Injected Context Queue Overflow flag (slave ADC) */
+
+/* Common control register */
+
+#define ADC_CCR_DUAL_SHIFT           (0)        /* Bits 0-4: Dual ADC mode selection */
+#define ADC_CCR_DUAL_MASK            (31 << ADC_CCR_DUAL_SHIFT)
+#  define ADC_CCR_DUAL_IND           (0 << ADC_CCR_DUAL_SHIFT) /* Independent mode */
+#  define ADC_CCR_DUAL_DUAL          (1 << ADC_CCR_DUAL_SHIFT) /* Dual mode, master/slave ADCs together */
+#  define ADC_CCR_DUAL_SIMINJ        (1 << ADC_CCR_DUAL_SHIFT) /* Combined regular sim. + injected sim. */
+#  define ADC_CCR_DUAL_SIMALT        (2 << ADC_CCR_DUAL_SHIFT) /* Combined regular sim. + alternate trigger */
+#  define ADC_CCR_DUAL_INJECTED      (5 << ADC_CCR_DUAL_SHIFT) /* Injected simultaneous mode only */
+#  define ADC_CCR_DUAL_SIM           (6 << ADC_CCR_DUAL_SHIFT) /* Regular simultaneous mode only */
+#  define ADC_CCR_DUAL_INTERLEAVE    (7 << ADC_CCR_DUAL_SHIFT) /* Interleaved mode only */
+#  define ADC_CCR_DUAL_ALT           (9 << ADC_CCR_DUAL_SHIFT) /* Alternate trigger mode only */
+#define ADC_CCR_DELAY_SHIFT          (8)        /* Bits 8-11: Delay between 2 sampling phases */
+#define ADC_CCR_DELAY_MASK           (15 << ADC_CCR_DELAY_SHIFT)
+#  define ADC_CCR_DELAY(n)           (((n)-1) << ADC_CCR_DELAY_SHIFT) /* n * TADCCLK, 1-13 */
+#define ADC_CCR_DMACFG               (1 << 13)  /* Bit 13: DMA configuration (for dual ADC mode) */
+#define ADC_CCR_MDMA_SHIFT           (14)       /* Bits 14-15: Direct memory access mode for dual ADC mode */
+#define ADC_CCR_MDMA_MASK            (3 << ADC_CCR_MDMA_SHIFT)
+#  define ADC_CCR_MDMA_DISABLED      (0 << ADC_CCR_MDMA_SHIFT) /* MDMA mode disabled */
+#  define ADC_CCR_MDMA_10_12         (2 << ADC_CCR_MDMA_SHIFT) /* MDMA mode enabled (12 / 10-bit) */
+#  define ADC_CCR_MDMA_6_8           (3 << ADC_CCR_MDMA_SHIFT) /* MDMA mode enabled (8 / 6-bit) */
+#define ADC_CCR_CKMODE_SHIFT         (16)       /* Bits 16-17: ADC clock mode */
+#define ADC_CCR_CKMODE_MASK          (15 << ADC_CCR_CKMODE_SHIFT)
+#  define ADC_CCR_CKMODE_ASYNCH      (0 << ADC_CCR_CKMODE_SHIFT) /* Asynchronous clock mode */
+#  define ADC_CCR_CKMODE_SYNCH_DIV1  (1 << ADC_CCR_CKMODE_SHIFT) /* Synchronous clock mode divided by 1 */
+#  define ADC_CCR_CKMODE_SYNCH_DIV2  (2 << ADC_CCR_CKMODE_SHIFT) /* Synchronous clock mode divided by 2 */
+#  define ADC_CCR_CKMODE_SYNCH_DIV4  (3 << ADC_CCR_CKMODE_SHIFT) /* Synchronous clock mode divided by 4 */
+#define ADC_CCR_VREFEN               (1 << 22)  /* Bit 22: VREFINT enable */
+#define ADC_CCR_TSEN                 (1 << 23)  /* Bit 23: Temperature sensor enable */
+#define ADC_CCR_VBATEN               (1 << 24)  /* Bit 22: VBAT enable */
+
+/* Common regular data register for dual mode */
+
+#define ADC_CDR_RDATA_MST_SHIFT      (0)        /* Bits 0-15: Regular data of the master ADC */
+#define ADC_CDR_RDATA_MST_MASK       (0xffff << ADC_CDR_RDATA_MST_SHIFT)
+#define ADC_CDR_RDATA_SLV_SHIFT      (16)       /* Bits 16-31: Regular data of the slave ADC */
+#define ADC_CDR_RDATA_SLV_MASK       (0xffff << ADC_CDR_RDATA_SLV_SHIFT)
+
+/****************************************************************************************************
+ * Public Types
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public Data
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F33XXX_ADC_H */
diff --git a/arch/arm/src/stm32/chip/stm32f33xxx_comp.h b/arch/arm/src/stm32/chip/stm32f33xxx_comp.h
new file mode 100644
index 0000000000000000000000000000000000000000..a0803ea04bf7984ecffc3e71f7aec2a3c088a76b
--- /dev/null
+++ b/arch/arm/src/stm32/chip/stm32f33xxx_comp.h
@@ -0,0 +1,124 @@
+/****************************************************************************************************
+ * arch/arm/src/stm32/chip/stm32f33xxx_comp.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Mateusz Szafoni 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32_COMP_H
+#define __ARCH_ARM_SRC_STM32_CHIP_STM32_COMP_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+/* Register Offsets *********************************************************************************/
+
+#define STM32_COMP2_CSR_OFFSET      0x0020      /* COMP2 Control register */
+#define STM32_COMP4_CSR_OFFSET      0x0028      /* COMP4 Control register */
+#define STM32_COMP6_CSR_OFFSET      0x0030      /* COMP6 Control register */
+
+/* Register Addresses *******************************************************************************/
+
+#define STM32_COMP2_CSR             (STM32_COMP_BASE+STM32_COMP2_CSR_OFFSET)
+#define STM32_COMP4_CSR             (STM32_COMP_BASE+STM32_COMP4_CSR_OFFSET)
+#define STM32_COMP6_CSR             (STM32_COMP_BASE+STM32_COMP6_CSR_OFFSET)
+
+/* Register Bitfield Definitions ****************************************************/
+
+/* COMP control and status register */
+
+#define COMP_CSR_COMPEN             (1 << 0)    /* Bit 0: Comparator enable */
+                                                /* Bits 1-3: Reserved */
+#define COMP_CSR_INMSEL_SHIFT       (4)         /* Bits 4-6: Comparator inverting input selection */
+#define COMP_CSR_INMSEL_MASK        (15 << COMP_CSR_INMSEL_SHIFT)
+#  define COMP_CSR_INMSEL_1P4VREF   (0 << COMP_CSR_INMSEL_SHIFT)  /* 0000: 1/4 of Vrefint */
+#  define COMP_CSR_INMSEL_1P2VREF   (1 << COMP_CSR_INMSEL_SHIFT)  /* 0001: 1/2 of Vrefint */
+#  define COMP_CSR_INMSEL_3P4VREF   (2 << COMP_CSR_INMSEL_SHIFT)  /* 0010: 3/4 of Vrefint */
+#  define COMP_CSR_INMSEL_VREF      (3 << COMP_CSR_INMSEL_SHIFT)  /* 0011: Vrefint */
+#  define COMP_CSR_INMSEL_PA4       (4 << COMP_CSR_INMSEL_SHIFT)  /* 0100: PA4 or DAC1_CH output if enabled */
+#  define COMP_CSR_INMSEL_DAC1CH2   (5 << COMP_CSR_INMSEL_SHIFT)  /* 0101: DAC1_CH2 output */
+#  define COMP_CSR_INMSEL_PA2       (6 << COMP_CSR_INMSEL_SHIFT)  /* 0110: PA2 (COMP2 only) */
+#  define COMP_CSR_INMSEL_PB2       (7 << COMP4_CSR_INMSEL_SHIFT) /* 0111: PB2 (COMP4 only) */
+#  define COMP_CSR_INMSEL_PB15      (7 << COMP6_CSR_INMSEL_SHIFT) /* 0110: PB15 (COMP6 only) */
+                                                                  /* 1000: DAC2_CH1 output, look at bit 22 */
+                                                /* Bits 7-9: Reserved */
+#define COMP_CSR_OUTSEL_SHIFT       (4)         /* Bits 10-13: Comparator output selection */
+#define COMP_CSR_OUTSEL_MASK        (15 << COMP_CSR_INMSEL_SHIFT)
+#  define COMP_CSR_OUTSEL_NOSEL     (0 << COMP_CSR_INMSEL_SHIFT)  /* 0000: No selection */
+#  define COMP_CSR_OUTSEL_BRKACTH   (1 << COMP_CSR_INMSEL_SHIFT)  /* 0001: Timer 1 break input */
+#  define COMP_CSR_OUTSEL_BRK2      (2 << COMP_CSR_INMSEL_SHIFT)  /* 0010: Timer 1 break input 2 */
+                                                                  /* 0011: Reserved */
+                                                                  /* 0100: Reserved */
+#  define COMP_CSR_OUTSEL_BRK2_     (5 << COMP_CSR_INMSEL_SHIFT)  /* 0101: Timer 1 break input2 */
+#  define COMP_CSR_OUTSEL_T1OCCC    (6 << COMP_CSR_INMSEL_SHIFT)  /* 0110: Timer 1 OCREF_CLR input (COMP2 only) */
+#  define COMP_CSR_OUTSEL_T3CAP3    (6 << COMP_CSR_INMSEL_SHIFT)  /* 0110: Timer 3 input apture 3 (COMP4 only) */
+#  define COMP_CSR_OUTSEL_T2CAP2    (6 << COMP_CSR_INMSEL_SHIFT)  /* 0110: Timer 2 input apture 2 (COMP6 only) */
+#  define COMP_CSR_OUTSEL_T1CAP1    (7 << COMP_CSR_INMSEL_SHIFT)  /* 0111: Timer 1 input capture 1 (COMP2 only) */
+#  define COMP_CSR_OUTSEL_T2CAP4    (8 << COMP_CSR_INMSEL_SHIFT)  /* 1000: Timer 2 input capture 4 (COMP2 only) */
+#  define COMP_CSR_OUTSEL_T15CAP2   (8 << COMP_CSR_INMSEL_SHIFT)  /* 1000: Timer 15 input capture 2 (COMP4 only) */
+#  define COMP_CSR_OUTSEL_T2OCC     (8 << COMP_CSR_INMSEL_SHIFT)  /* 1000: Timer 2 OCREF CLR input (COMP6 only) */
+#  define COMP_CSR_OUTSEL_T2OCC     (9 << COMP_CSR_INMSEL_SHIFT)  /* 1001: Timer 2 OCREF_CLR input (COMP2 only) */
+#  define COMP_CSR_OUTSEL_T16OCC    (9 << COMP_CSR_INMSEL_SHIFT)  /* 1001: Timer 16 OCREF_CLR input (COMP6 only) */
+#  define COMP_CSR_OUTSEL_T3CAP1    (10 << COMP_CSR_INMSEL_SHIFT) /* 1010: Timer 3 input capture 1 (COMP2 only) */
+#  define COMP_CSR_OUTSEL_T3CAP1    (10 << COMP_CSR_INMSEL_SHIFT) /* 1010: Timer 15 OCREF_CLR input (COMP4 only) */
+#  define COMP_CSR_OUTSEL_T3CAP1    (10 << COMP_CSR_INMSEL_SHIFT) /* 1010: Timer 16 input capture 1 (COMP6 only) */
+#  define COMP_CSR_OUTSEL_T3OCC     (11 << COMP_CSR_INMSEL_SHIFT) /* 1011: Timer 3 OCREF_CLR input (COMP2,COMP4 only) */
+                                                /* Bit 14: Reserved */
+#define COMP_CSR_POL                (1 << 15)   /* Bit 15: comparator output polarity */
+                                                /* Bits 16-17: Reserved */
+#define COMP_CSR_BLANCKING_SHIFT    (18)        /* Bit 18-20: comparator output blanking source */
+#define COMP_CSR_BLANCKING_MASK     (7 << COMP_CSR_BLANCKING_SHIFT)
+#  define COMP_CSR_BLANCKING_DIS    (0 << COMP_CSR_BLANCKING_SHIFT)  /* 000: No blanking */
+#  define COMP_CSR_BLANCKING_T1OC5  (1 << COMP_CSR_BLANCKING_SHIFT)  /* 001: TIM1 OC5 as blanking source (COMP2 only) */
+#  define COMP_CSR_BLANCKING_T3OC4  (1 << COMP_CSR_BLANCKING_SHIFT)  /* 001: TIM3 OC4 as blanking source (COMP4 only) */
+#  define COMP_CSR_BLANCKING_T2OC3  (2 << COMP_CSR_BLANCKING_SHIFT)  /* 010: TIM2 OC3 as blanking source (COMP2 only) */
+#  define COMP_CSR_BLANCKING_T3OC3  (3 << COMP_CSR_BLANCKING_SHIFT)  /* 011: TIM3 OC3 as blanking source (COMP2 only) */
+#  define COMP_CSR_BLANCKING_T15OC1 (3 << COMP_CSR_BLANCKING_SHIFT)  /* 011: TIM15 OC1 as blanking source (COMP4 only) */
+#  define COMP_CSR_BLANCKING_T2OC4  (3 << COMP_CSR_BLANCKING_SHIFT)  /* 011: TIM2 OC4 as blanking source (COMP6 only) */
+#  define COMP_CSR_BLANCKING_T15OC2 (4 << COMP_CSR_BLANCKING_SHIFT)  /* 011: TIM15 OC2 as blanking source (COMP6 only) */
+                                                /* Bit 21: Reserved  */
+#define COMP_CSR_INMSEL_DAC2CH1     (1 << 22)   /* Bit 22: used with bits 4-6, DAC2_CH1 output */
+                                                /* Bits 23-29: Reserved */
+#define COMP_CSR_OUT                (1 << 30)   /* Bit 30: comparator output */
+#define COMP_CSR_LOCK               (1 << 31)   /* Bit 31: comparator lock */
+
+
+
+#endif                          /* __ARCH_ARM_SRC_STM32_CHIP_STM32_COMP_H */
diff --git a/arch/arm/src/stm32/chip/stm32f33xxx_dac.h b/arch/arm/src/stm32/chip/stm32f33xxx_dac.h
new file mode 100644
index 0000000000000000000000000000000000000000..08b612102b0cae08c0b68743b4a26e36c98be886
--- /dev/null
+++ b/arch/arm/src/stm32/chip/stm32f33xxx_dac.h
@@ -0,0 +1,238 @@
+/************************************************************************************
+ * arch/arm/src/stm32/chip/stm32f33xxx_dac.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *   Modified for STM32F334 by Mateusz Szafoni 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32_DAC_H
+#define __ARCH_ARM_SRC_STM32_CHIP_STM32_DAC_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include "chip.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Register Offsets *****************************************************************/
+
+#define STM32_DAC_CR_OFFSET       0x0000 /* DAC control register */
+#define STM32_DAC_SWTRIGR_OFFSET  0x0004 /* DAC software trigger register */
+#define STM32_DAC_DHR12R1_OFFSET  0x0008 /* DAC channel 1 12-bit right-aligned data holding register */
+#define STM32_DAC_DHR12L1_OFFSET  0x000c /* DAC channel 1 12-bit left aligned data holding register */
+#define STM32_DAC_DHR8R1_OFFSET   0x0010 /* DAC channel 1 8-bit right aligned data holding register */
+#define STM32_DAC_DHR12L2_OFFSET  0x0018 /* DAC channel 2 12-bit left aligned data holding register */
+#define STM32_DAC_DHR8R2_OFFSET   0x001c /* DAC channel 2 8-bit right-aligned data holding register */
+#define STM32_DAC_DHR12RD_OFFSET  0x0020 /* Dual DAC 12-bit right-aligned data holding register */
+#define STM32_DAC_DHR12LD_OFFSET  0x0024 /* DUAL DAC 12-bit left aligned data holding register */
+#define STM32_DAC_DHR8RD_OFFSET   0x0028 /* DUAL DAC 8-bit right aligned data holding register */
+#define STM32_DAC_DOR1_OFFSET     0x002c /* DAC channel 1 data output register */
+#define STM32_DAC_DOR2_OFFSET     0x0030 /* DAC channel 2 data output register */
+#define STM32_DAC_SR_OFFSET       0x0034 /* DAC status register */
+
+/* Register Addresses ***************************************************************/
+
+/* DAC1 */
+
+#  define STM32_DAC1_CR           (STM32_DAC1_BASE+STM32_DAC_CR_OFFSET)
+#  define STM32_DAC1_SWTRIGR      (STM32_DAC1_BASE+STM32_DAC_SWTRIGR_OFFSET)
+#  define STM32_DAC1_DHR12R1      (STM32_DAC1_BASE+STM32_DAC_DHR12R1_OFFSET)
+#  define STM32_DAC1_DHR12L1      (STM32_DAC1_BASE+STM32_DAC_DHR12L1_OFFSET)
+#  define STM32_DAC1_DHR8R1       (STM32_DAC1_BASE+STM32_DAC_DHR8R1_OFFSET)
+#  define STM32_DAC1_DHR12R2      (STM32_DAC1_BASE+STM32_DAC_DHR12R2_OFFSET)
+#  define STM32_DAC1_DHR12L2      (STM32_DAC1_BASE+STM32_DAC_DHR12L2_OFFSET)
+#  define STM32_DAC1_DHR8R2       (STM32_DAC1_BASE+STM32_DAC_DHR8R2_OFFSET)
+#  define STM32_DAC1_DHR12RD      (STM32_DAC1_BASE+STM32_DAC_DHR12RD_OFFSET)
+#  define STM32_DAC1_DHR12LD      (STM32_DAC1_BASE+STM32_DAC_DHR12LD_OFFSET)
+#  define STM32_DAC1_DHR8RD       (STM32_DAC1_BASE+STM32_DAC_DHR8RD_OFFSET)
+#  define STM32_DAC1_DOR1         (STM32_DAC1_BASE+STM32_DAC_DOR1_OFFSET)
+#  define STM32_DAC1_DOR2         (STM32_DAC1_BASE+STM32_DAC_DOR2_OFFSET)
+#  define STM32_DAC1_SR           (STM32_DAC1_BASE+STM32_DAC_SR_OFFSET)
+
+/* DAC2 */
+
+#  define STM32_DAC2_CR           (STM32_DAC2_BASE+STM32_DAC_CR_OFFSET)
+#  define STM32_DAC2_SWTRIGR      (STM32_DAC2_BASE+STM32_DAC_SWTRIGR_OFFSET)
+#  define STM32_DAC2_DHR12R1      (STM32_DAC2_BASE+STM32_DAC_DHR12R1_OFFSET)
+#  define STM32_DAC2_DHR12L1      (STM32_DAC2_BASE+STM32_DAC_DHR12L1_OFFSET)
+#  define STM32_DAC2_DHR8R1       (STM32_DAC2_BASE+STM32_DAC_DHR8R1_OFFSET)
+#  define STM32_DAC2_DHR12R2      (STM32_DAC2_BASE+STM32_DAC_DHR12R2_OFFSET)
+#  define STM32_DAC2_DHR12L2      (STM32_DAC2_BASE+STM32_DAC_DHR12L2_OFFSET)
+#  define STM32_DAC2_DHR8R2       (STM32_DAC2_BASE+STM32_DAC_DHR8R2_OFFSET)
+#  define STM32_DAC2_DHR12RD      (STM32_DAC2_BASE+STM32_DAC_DHR12RD_OFFSET)
+#  define STM32_DAC2_DHR12LD      (STM32_DAC2_BASE+STM32_DAC_DHR12LD_OFFSET)
+#  define STM32_DAC2_DHR8RD       (STM32_DAC2_BASE+STM32_DAC_DHR8RD_OFFSET)
+#  define STM32_DAC2_DOR1         (STM32_DAC2_BASE+STM32_DAC_DOR1_OFFSET)
+#  define STM32_DAC2_DOR2         (STM32_DAC2_BASE+STM32_DAC_DOR2_OFFSET)
+#  define STM32_DAC2_SR           (STM32_DAC2_BASE+STM32_DAC_SR_OFFSET)
+
+/* Register Bitfield Definitions ****************************************************/
+
+/* DAC control register */
+/* These definitions may be used with the full, 32-bit register */
+
+#define DAC_CR_EN1                (1 << 0)  /* Bit 0:  DAC channel 1 enable */
+#define DAC_CR_BOFF1              (1 << 1)  /* Bit 1:  DAC channel 1 output buffer disable */
+#define DAC_CR_TEN1               (1 << 2)  /* Bit 2:  DAC channel 1 trigger enable */
+#define DAC_CR_TSEL1_SHIFT        (3)       /* Bits 3-5: DAC channel 1 trigger selection */
+#define DAC_CR_TSEL1_MASK         (7 << DAC_CR_TSEL1_SHIFT)
+#  define DAC_CR_TSEL1_TIM6       (0 << DAC_CR_TSEL1_SHIFT) /* Timer 6 TRGO event */
+#  define DAC_CR_TSEL1_TIM3       (1 << DAC_CR_TSEL1_SHIFT) /* Timer 3 TRGO event */
+#  define DAC_CR_TSEL1_TIM7       (2 << DAC_CR_TSEL1_SHIFT) /* Timer 7 TRGO event */
+#  define DAC_CR_TSEL1_TIM15      (3 << DAC_CR_TSEL1_SHIFT) /* Timer 15 TRGO event, or */
+#  define DAC_CR_TSEL_HRT1TRG1    (3 << DAC_CR_TSEL_SHIFT)  /* HRTIM1 DACTRG1 event (DAC1 only) */
+#  define DAC_CR_TSEL1_TIM2       (4 << DAC_CR_TSEL1_SHIFT) /* Timer 2 TRGO event */
+#  define DAC_CR_TSEL_HRT1TRG2    (5 << DAC_CR_TSEL_SHIFT)  /* HRTIM1 DACTRG2 event (DAC1), or */
+#  define DAC_CR_TSEL_HRT1TRG3    (5 << DAC_CR_TSEL_SHIFT)  /* HRTIM1 DACTRG3 event (DAC2) */
+#  define DAC_CR_TSEL1_EXT9       (6 << DAC_CR_TSEL1_SHIFT) /* External line9 */
+#  define DAC_CR_TSEL1_SW         (7 << DAC_CR_TSEL1_SHIFT) /* Software trigger */
+#define DAC_CR_WAVE1_SHIFT        (6)       /* Bits 6-7: DAC channel 1 noise/triangle wave generation  */
+#define DAC_CR_WAVE1_MASK         (3 << DAC_CR_WAVE1_SHIFT)
+#  define DAC_CR_WAVE1_DISABLED   (0 << DAC_CR_WAVE1_SHIFT) /* Wave generation disabled */
+#  define DAC_CR_WAVE1_NOISE      (1 << DAC_CR_WAVE1_SHIFT) /* Noise wave generation enabled */
+#  define DAC_CR_WAVE1_TRIANGLE   (2 << DAC_CR_WAVE1_SHIFT) /* Triangle wave generation enabled */
+#define DAC_CR_MAMP1_SHIFT        (8)       /* Bits 8-11: DAC channel 1 mask/amplitude selector */
+#define DAC_CR_MAMP1_MASK         (15 << DAC_CR_MAMP1_SHIFT)
+#  define DAC_CR_MAMP1_AMP1       (0 << DAC_CR_MAMP1_SHIFT)  /* Unmask bit0 of LFSR/triangle amplitude=1 */
+#  define DAC_CR_MAMP1_AMP3       (1 << DAC_CR_MAMP1_SHIFT)  /* Unmask bits[1:0] of LFSR/triangle amplitude=3 */
+#  define DAC_CR_MAMP1_AMP7       (2 << DAC_CR_MAMP1_SHIFT)  /* Unmask bits[2:0] of LFSR/triangle amplitude=7 */
+#  define DAC_CR_MAMP1_AMP15      (3 << DAC_CR_MAMP1_SHIFT)  /* Unmask bits[3:0] of LFSR/triangle amplitude=15 */
+#  define DAC_CR_MAMP1_AMP31      (4 << DAC_CR_MAMP1_SHIFT)  /* Unmask bits[4:0] of LFSR/triangle amplitude=31 */
+#  define DAC_CR_MAMP1_AMP63      (5 << DAC_CR_MAMP1_SHIFT)  /* Unmask bits[5:0] of LFSR/triangle amplitude=63 */
+#  define DAC_CR_MAMP1_AMP127     (6 << DAC_CR_MAMP1_SHIFT)  /* Unmask bits[6:0] of LFSR/triangle amplitude=127 */
+#  define DAC_CR_MAMP1_AMP255     (7 << DAC_CR_MAMP1_SHIFT)  /* Unmask bits[7:0] of LFSR/triangle amplitude=255 */
+#  define DAC_CR_MAMP1_AMP511     (8 << DAC_CR_MAMP1_SHIFT)  /* Unmask bits[8:0] of LFSR/triangle amplitude=511 */
+#  define DAC_CR_MAMP1_AMP1023    (9 << DAC_CR_MAMP1_SHIFT)  /* Unmask bits[9:0] of LFSR/triangle amplitude=1023 */
+#  define DAC_CR_MAMP1_AMP2047    (10 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[10:0] of LFSR/triangle amplitude=2047 */
+#  define DAC_CR_MAMP1_AMP4095    (11 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[11:0] of LFSR/triangle amplitude=4095 */
+#define DAC_CR_DMAEN1             (1 << 12) /* Bit 12: DAC channel 1 DMA enable */
+#define DAC_CR_DMAUDRIE1          (1 << 13) /* Bit 13: DAC channel 1 DMA Underrun Interrupt enable */
+
+#define DAC_CR_EN2                (1 << 16) /* Bit 16: DAC channel 2 enable */
+#define DAC_CR_BOFF2              (1 << 17) /* Bit 17: DAC channel 2 output buffer disable */
+#define DAC_CR_TEN2               (1 << 18) /* Bit 18: DAC channel 2 trigger enable */
+#define DAC_CR_TSEL2_SHIFT        (19)       /* Bits 19-21: DAC channel 2 trigger selection */
+#define DAC_CR_TSEL2_MASK         (7 << DAC_CR_TSEL2_SHIFT)
+#  define DAC_CR_TSEL2_TIM6       (0 << DAC_CR_TSEL2_SHIFT) /* Timer 6 TRGO event */
+#  define DAC_CR_TSEL2_TIM8       (1 << DAC_CR_TSEL2_SHIFT) /* Timer 8 TRGO event */
+#  define DAC_CR_TSEL2_TIM7       (2 << DAC_CR_TSEL2_SHIFT) /* Timer 7 TRGO event */
+#  define DAC_CR_TSEL2_TIM5       (3 << DAC_CR_TSEL2_SHIFT) /* Timer 5 TRGO event */
+#  define DAC_CR_TSEL2_TIM2       (4 << DAC_CR_TSEL2_SHIFT) /* Timer 2 TRGO event */
+#  define DAC_CR_TSEL2_TIM4       (5 << DAC_CR_TSEL2_SHIFT) /* Timer 4 TRGO event */
+#  define DAC_CR_TSEL2_EXT9       (6 << DAC_CR_TSEL2_SHIFT) /* External line9 */
+#  define DAC_CR_TSEL2_SW         (7 << DAC_CR_TSEL2_SHIFT) /* Software trigger */
+#define DAC_CR_WAVE2_SHIFT        (22)       /* Bit 22-23: DAC channel 2 noise/triangle wave generation enable */
+#define DAC_CR_WAVE2_MASK         (3 << DAC_CR_WAVE2_SHIFT)
+#  define DAC_CR_WAVE2_DISABLED   (0 << DAC_CR_WAVE2_SHIFT) /* Wave generation disabled */
+#  define DAC_CR_WAVE2_NOISE      (1 << DAC_CR_WAVE2_SHIFT) /* Noise wave generation enabled */
+#  define DAC_CR_WAVE2_TRIANGLE   (2 << DAC_CR_WAVE2_SHIFT) /* Triangle wave generation enabled */
+#define DAC_CR_MAMP2_SHIFT        (24)      /* Bit 24-27: DAC channel 2 mask/amplitude selector */
+#define DAC_CR_MAMP2_MASK         (15 << DAC_CR_MAMP2_SHIFT)
+#  define DAC_CR_MAMP2_AMP1       (0 << DAC_CR_MAMP2_SHIFT)  /* Unmask bit0 of LFSR/triangle amplitude=1 */
+#  define DAC_CR_MAMP2_AMP3       (1 << DAC_CR_MAMP2_SHIFT)  /* Unmask bits[1:0] of LFSR/triangle amplitude=3 */
+#  define DAC_CR_MAMP2_AMP7       (2 << DAC_CR_MAMP2_SHIFT)  /* Unmask bits[2:0] of LFSR/triangle amplitude=7 */
+#  define DAC_CR_MAMP2_AMP15      (3 << DAC_CR_MAMP2_SHIFT)  /* Unmask bits[3:0] of LFSR/triangle amplitude=15 */
+#  define DAC_CR_MAMP2_AMP31      (4 << DAC_CR_MAMP2_SHIFT)  /* Unmask bits[4:0] of LFSR/triangle amplitude=31 */
+#  define DAC_CR_MAMP2_AMP63      (5 << DAC_CR_MAMP2_SHIFT)  /* Unmask bits[5:0] of LFSR/triangle amplitude=63 */
+#  define DAC_CR_MAMP2_AMP127     (6 << DAC_CR_MAMP2_SHIFT)  /* Unmask bits[6:0] of LFSR/triangle amplitude=127 */
+#  define DAC_CR_MAMP2_AMP255     (7 << DAC_CR_MAMP2_SHIFT)  /* Unmask bits[7:0] of LFSR/triangle amplitude=255 */
+#  define DAC_CR_MAMP2_AMP511     (8 << DAC_CR_MAMP2_SHIFT)  /* Unmask bits[8:0] of LFSR/triangle amplitude=511 */
+#  define DAC_CR_MAMP2_AMP1023    (9 << DAC_CR_MAMP2_SHIFT)  /* Unmask bits[9:0] of LFSR/triangle amplitude=1023 */
+#  define DAC_CR_MAMP2_AMP2047    (10 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[10:0] of LFSR/triangle amplitude=2047 */
+#  define DAC_CR_MAMP2_AMP4095    (11 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[11:0] of LFSR/triangle amplitude=4095 */
+#define DAC_CR_DMAEN2             (1 << 28) /* Bit 28: DAC channel 2 DMA enable */
+#define DAC_CR_DMAUDRIE2          (1 << 29) /* Bits 29: DAC channel 2 DMA underrun interrupt enable */
+
+/* DAC software trigger register */
+
+#define DAC_SWTRIGR_SWTRIG(n)     (1 << ((n)-1))
+#define DAC_SWTRIGR_SWTRIG1       (1 << 0)  /* Bit 0:  DAC channel 1 software trigger */
+#define DAC_SWTRIGR_SWTRIG2       (1 << 1)  /* Bit 1:  DAC channel 2 software trigger */
+
+/* DAC channel 1/2 12-bit right-aligned data holding register */
+
+#define DAC_DHR12R_MASK           (0x0fff)
+
+/* DAC channel 1/2 12-bit left aligned data holding register */
+
+#define DAC_DHR12L_MASK           (0xfff0)
+
+/* DAC channel 1/2 8-bit right aligned data holding register */
+
+#define DAC_DHR8R_MASK            (0x00ff)
+
+/* Dual DAC 12-bit right-aligned data holding register */
+
+#define DAC_DHR12RD_DACC_SHIFT(n) (1 << (((n)-1) << 4))
+#define DAC_DHR12RD_DACC_MASK(n)  (0xfff << DAC_DHR12RD_DACC_SHIFT(n))
+
+#define DAC_DHR12RD_DACC1_SHIFT   (0)        /* Bits 0-11: DAC channel 1 12-bit right-aligned data */
+#define DAC_DHR12RD_DACC1_MASK    (0xfff << DAC_DHR12RD_DACC2_SHIFT)
+#define DAC_DHR12RD_DACC2_SHIFT   (16)       /* Bits 16-27: DAC channel 2 12-bit right-aligned data */
+#define DAC_DHR12RD_DACC2_MASK    (0xfff << DAC_DHR12RD_DACC2_SHIFT)
+
+/* Dual DAC 12-bit left-aligned data holding register */
+
+#define DAC_DHR12LD_DACC_SHIFT(n) ((1 << (((n)-1) << 4)) + 4)
+#define DAC_DHR12LD_DACC_MASK(n)  (0xfff << DAC_DHR12LD_DACC_SHIFT(n))
+
+#define DAC_DHR12LD_DACC1_SHIFT   (4)        /* Bits 4-15: DAC channel 1 12-bit left-aligned data */
+#define DAC_DHR12LD_DACC1_MASK    (0xfff << DAC_DHR12LD_DACC1_SHIFT)
+#define DAC_DHR12LD_DACC2_SHIFT   (20)       /* Bits 20-31: DAC channel 2 12-bit left-aligned data */
+#define DAC_DHR12LD_DACC2_MASK    (0xfff << DAC_DHR12LD_DACC2_SHIFT)
+
+/* DUAL DAC 8-bit right aligned data holding register */
+
+#define DAC_DHR8RD_DACC_SHIFT(n)  (1 << (((n)-1) << 3))
+#define DAC_DHR8RD_DACC_MASK(n)   (0xff << DAC_DHR8RD_DACC_SHIFT(n))
+
+#define DAC_DHR8RD_DACC1_SHIFT    (0)         /* Bits 0-7: DAC channel 1 8-bit right-aligned data */
+#define DAC_DHR8RD_DACC1_MASK     (0xff << DAC_DHR8RD_DACC1_SHIFT)
+#define DAC_DHR8RD_DACC2_SHIFT    (8)         /* Bits 8-15: DAC channel 2 8-bit right-aligned data */
+#define DAC_DHR8RD_DACC2_MASK     (0xff << DAC_DHR8RD_DACC2_SHIFT)
+
+/* DAC channel 1/2 data output register */
+
+#define DAC_DOR_MASK              (0x0fff)
+
+/* DAC status register */
+
+#define DAC_SR_DMAUDR(n)          ((1 << (((n)-1) << 4)) + 13)
+#define DAC_SR_DMAUDR1            (1 << 13)  /* Bit 13: DAC channel 1 DMA underrun flag */
+#define DAC_SR_DMAUDR2            (1 << 29)  /* Bit 29: DAC channel 2 DMA underrun flag */
+
+#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32_DAC_H */
diff --git a/arch/arm/src/stm32/chip/stm32f33xxx_hrtim.h b/arch/arm/src/stm32/chip/stm32f33xxx_hrtim.h
new file mode 100644
index 0000000000000000000000000000000000000000..fc22deeb25a612c243118a5e6a0f6e16afbd8993
--- /dev/null
+++ b/arch/arm/src/stm32/chip/stm32f33xxx_hrtim.h
@@ -0,0 +1,2063 @@
+/****************************************************************************************************
+ * arch/arm/src/stm32/chip/stm32f33xxx_hrtim.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Mateusz Szafoni 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32_HRTIM_H
+#define __ARCH_ARM_SRC_STM32_CHIP_STM32_HRTIM_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+#define STM32_HRTIM_MASTER_OFFSET       0x0000      /* HRTIM Master Timer base adress offset */
+#define STM32_HRTIM_TIMERA_OFFSET       0x0080      /* HRTIM Timer A base adress offset */
+#define STM32_HRTIM_TIMERB_OFFSET       0x0100      /* HRTIM Timer B base adress offset */
+#define STM32_HRTIM_TIMERC_OFFSET       0x0180      /* HRTIM Timer C base adress offset */
+#define STM32_HRTIM_TIMERD_OFFSET       0x0200      /* HRTIM Timer D base adress offset */
+#define STM32_HRTIM_TIMERE_OFFSET       0x0280      /* HRTIM Timer E base adress offset */
+                                                    /* 0x300-0x37F: Reserved */
+#define STM32_HRTIM_CMN_OFFSET          0x0380      /* HRTIM Common registers base adress offset */
+
+#define STM32_HRTIM1_MASTER_BASE        (STM32_HRTIM_MASTER_OFFSET+STM32_HRTIM1_BASE)
+#define STM32_HRTIM1_TIMERA_BASE        (STM32_HRTIM_TIMERA_OFFSET+STM32_HRTIM1_BASE)
+#define STM32_HRTIM1_TIMERB_BASE        (STM32_HRTIM_TIMERB_OFFSET+STM32_HRTIM1_BASE)
+#define STM32_HRTIM1_TIMERC_BASE        (STM32_HRTIM_TIMERC_OFFSET+STM32_HRTIM1_BASE)
+#define STM32_HRTIM1_TIMERD_BASE        (STM32_HRTIM_TIMERD_OFFSET+STM32_HRTIM1_BASE)
+#define STM32_HRTIM1_TIMERE_BASE        (STM32_HRTIM_TIMERE_OFFSET+STM32_HRTIM1_BASE)
+#define STM32_HRTIM1_CMN_BASE           (STM32_HRTIM_CMN_OFFSET+STM32_HRTIM1_BASE)
+
+/* Register Offsets *********************************************************************************/
+
+/* Register Offsets for HRTIM Master Timer */
+
+#define STM32_HRTIM_MASTER_MCR          0x0000 /* HRTIM Master Timer Control Register */
+#define STM32_HRTIM_MASTER_MISR         0x0004 /* HRTIM Master Timer Interrupt Status Register */
+#define STM32_HRTIM_MASTER_MICR         0x0008 /* HRTIM Master Timer Interrupt Clear Register */
+#define STM32_HRTIM_MASTER_MDIER        0x000C /* HRTIM Master Timer DMA/Interrupt Enable  Register */
+#define STM32_HRTIM_MASTER_MCNTR        0x0010 /* HRTIM Master Timer Counter Register */
+#define STM32_HRTIM_MASTER_MPER         0x0014 /* HRTIM Master Timer Period Register */
+#define STM32_HRTIM_MASTER_MREP         0x0018 /* HRTIM Master Timer Repetition Register */
+#define STM32_HRTIM_MASTER_MCMP1R       0x001C /* HRTIM Master Timer Compare 1 Register */
+#define STM32_HRTIM_MASTER_MCMP2R       0x0024 /* HRTIM Master Timer Compare 2 Register */
+#define STM32_HRTIM_MASTER_MCMP3R       0x0028 /* HRTIM Master Timer Compare 3 Register */
+#define STM32_HRTIM_MASTER_MCMP4R       0x002C /* HRTIM Master Timer Compare 4 Register */
+
+/* Register Offsets for HRTIM Timers A-E */
+
+#define STM32_HRTIM_TIMX_CR             0x0000 /* HRTIM Timer X Control Register */
+#define STM32_HRTIM_TIMX_ISR            0x0004 /* HRTIM Timer X Interrupt Status Register */
+#define STM32_HRTIM_TIMX_ICR            0x0008 /* HRTIM Timer X Interrupt Clear Register */
+#define STM32_HRTIM_TIMX_DIER           0x000C /* HRTIM Timer X DMA/Interrupt Enable Register */
+#define STM32_HRTIM_TIMX_CNTR           0x0010 /* HRTIM Timer X Counter Register */
+#define STM32_HRTIM_TIMX_PER            0x0014 /* HRTIM Timer X Period Register */
+#define STM32_HRTIM_TIMX_REP            0x0018 /* HRTIM Timer X Repetition Register */
+#define STM32_HRTIM_TIMX_CMP1R          0x001C /* HRTIM Timer X Compare 1 Register */
+#define STM32_HRTIM_TIMX_CMP1CR         0x0020 /* HRTIM Timer X Compare 1 Compound Register */
+#define STM32_HRTIM_TIMX_CMP2R          0x0024 /* HRTIM Timer X Compare 2 Register */
+#define STM32_HRTIM_TIMX_CMP3R          0x0028 /* HRTIM Timer X Compare 3 Register */
+#define STM32_HRTIM_TIMX_CMP4R          0x002C /* HRTIM Timer X Compare 4 Register */
+#define STM32_HRTIM_TIMX_CPT1R          0x0030 /* HRTIM Timer X Capture 1 Register */
+#define STM32_HRTIM_TIMX_CPT2R          0x0034 /* HRTIM Timer X Capture 2 Register */
+#define STM32_HRTIM_TIMX_DTR            0x0038 /* HRTIM Timer X Deadtime Register */
+#define STM32_HRTIM_TIMX_SET1R          0x003C /* HRTIM Timer X Output1 Set Register */
+#define STM32_HRTIM_TIMX_RST1R          0x0040 /* HRTIM Timer X Output1 Reset Register */
+#define STM32_HRTIM_TIMX_SET2R          0x0044 /* HRTIM Timer X Output2 Set Register */
+#define STM32_HRTIM_TIMX_RST2R          0x0048 /* HRTIM Timer X Output2 Reset Register */
+#define STM32_HRTIM_TIMX_EEFR1          0x004C /* HRTIM Timer X External Event Filtering Register 1 */
+#define STM32_HRTIM_TIMX_EEFR2          0x0050 /* HRTIM Timer X External Event Filtering  Register 2 */
+#define STM32_HRTIM_TIMX_RSTR           0x0054 /* HRTIM Timer X Reset Register */
+#define STM32_HRTIM_TIMX_CHPR           0x0058 /* HRTIM Timer X Chopper Register */
+#define STM32_HRTIM_TIMX_CPT1CR         0x005C /* HRTIM Timer X Capture 1 Control Register */
+#define STM32_HRTIM_TIMX_CPT2CR         0x0060 /* HRTIM Timer X Capture 2 Control Register */
+#define STM32_HRTIM_TIMX_OUTR           0x0064 /* HRTIM Timer X Output Register */
+#define STM32_HRTIM_TIMX_FLTR           0x0068 /* HRTIM Timer X Fault Register */
+
+/* Register Offset for HRTIM Common */
+
+#define STM32_HRTIM_CMN_CR1             0x0000 /* HRTIM Control Register 1 */
+#define STM32_HRTIM_CMN_CR2             0x0004 /* HRTIM Control Register 2 */
+#define STM32_HRTIM_CMN_ISR             0x0008 /* HRTIM Interrupt Status Register */
+#define STM32_HRTIM_CMN_ICR             0x000C /* HRTIM Interrupt Clear Register */
+#define STM32_HRTIM_CMN_IER             0x0010 /* HRTIM Interrupt Enable Register */
+#define STM32_HRTIM_CMN_OENR            0x0014 /* HRTIM Output Enable Register */
+#define STM32_HRTIM_CMN_DISR            0x0018 /* HRTIM Output Disable Register */
+#define STM32_HRTIM_CMN_ODSR            0x001C /* HRTIM Output Disable Status Register */
+#define STM32_HRTIM_CMN_BMCR            0x0020 /* HRTIM Burst Mode Control Register */
+#define STM32_HRTIM_CMN_BMTRGR          0x0024 /* HRTIM Burst Mode Trigger Register */
+#define STM32_HRTIM_CMN_BMCMPR          0x0028 /* HRTIM Burst Mode Compare Register */
+#define STM32_HRTIM_CMN_BMPER           0x002C /* HRTIM Burst Mode Period Register */
+#define STM32_HRTIM_CMN_EECR1           0x0030 /* HRTIM Timer External Event Control Register 1 */
+#define STM32_HRTIM_CMN_EECR2           0x0034 /* HRTIM Timer External Event Control Register 2 */
+#define STM32_HRTIM_CMN_EECR3           0x0038 /* HRTIM Timer External Event Control Register 3 */
+#define STM32_HRTIM_CMN_ADC1R           0x003C /* HRTIM ADC Trigger 1 Register */
+#define STM32_HRTIM_CMN_ADC2R           0x0040 /* HRTIM ADC Trigger 2 Register */
+#define STM32_HRTIM_CMN_ADC3R           0x0044 /* HRTIM ADC Trigger 3 Register */
+#define STM32_HRTIM_CMN_ADC4R           0x0048 /* HRTIM ADC Trigger 4 Register */
+#define STM32_HRTIM_CMN_DLLCR           0x004C /* HRTIM DLL Control Register */
+#define STM32_HRTIM_CMN_FLTINR1         0x0050 /* HRTIM Fault Input Register 1 */
+#define STM32_HRTIM_CMN_FLTINR2         0x0054 /* HRTIM Fault Input Register 2 */
+#define STM32_HRTIM_CMN_BDMUPDR         0x0058 /* HRTIM Master Timer Update Register */
+#define STM32_HRTIM_CMN_BDTAUPR         0x005C /* HRTIM Timer A Update Register */
+#define STM32_HRTIM_CMN_BDTBUPR         0x0060 /* HRTIM Timer B Update Register */
+#define STM32_HRTIM_CMN_BDTCUPR         0x0064 /* HRTIM Timer C Update Register */
+#define STM32_HRTIM_CMN_BDTDUPR         0x0068 /* HRTIM Timer D Update Register */
+#define STM32_HRTIM_CMN_BDTEUPR         0x006C /* HRTIM Timer E Update Register */
+#define STM32_HRTIM_CMN_BDMADR          0x0070 /* HRTIM DMA Data Register */
+
+/* Register Addresses *******************************************************************************/
+
+/* HRTIM1 Master Timer */
+
+#define STM32_HRTIM1_MASTER_MCR         (STM32_HRTIM_MASTER_MCR+STM32_HRTIM1_MASTER_BASE)
+#define STM32_HRTIM1_MASTER_MISR        (STM32_HRTIM_MASTER_MISR+STM32_HRTIM1_MASTER_BASE)
+#define STM32_HRTIM1_MASTER_MICR        (STM32_HRTIM_MASTER_MICR+STM32_HRTIM1_MASTER_BASE)
+#define STM32_HRTIM1_MASTER_MDIER       (STM32_HRTIM_MASTER_MDIER+STM32_HRTIM1_MASTER_BASE)
+#define STM32_HRTIM1_MASTER_MCNTR       (STM32_HRTIM_MASTER_MCNTR+STM32_HRTIM1_MASTER_BASE)
+#define STM32_HRTIM1_MASTER_MPER        (STM32_HRTIM_MASTER_MPER+STM32_HRTIM1_MASTER_BASE)
+#define STM32_HRTIM1_MASTER_MREP        (STM32_HRTIM_MASTER_MREP+STM32_HRTIM1_MASTER_BASE)
+#define STM32_HRTIM1_MASTER_MCMP1R      (STM32_HRTIM_MASTER_MCMP1R+STM32_HRTIM1_MASTER_BASE)
+#define STM32_HRTIM1_MASTER_MCMP2R      (STM32_HRTIM_MASTER_MCMP2R+STM32_HRTIM1_MASTER_BASE)
+#define STM32_HRTIM1_MASTER_MCMP3R      (STM32_HRTIM_MASTER_MCMP3R+STM32_HRTIM1_MASTER_BASE)
+#define STM32_HRTIM1_MASTER_MCMP4R      (STM32_HRTIM_MASTER_MCMP4R+STM32_HRTIM1_MASTER_BASE)
+
+/* HRTIM1 Timer A */
+
+#define STM32_HRTIM1_TIMERA_CR          (STM32_HRTIM_TIMERA_CR+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_ISR         (STM32_HRTIM_TIMERA_ISR+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_ICR         (STM32_HRTIM_TIMERA_ICR+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_DIER        (STM32_HRTIM_TIMERA_DIER+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_CNTR        (STM32_HRTIM_TIMERA_CNTR+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_PER         (STM32_HRTIM_TIMERA_PER+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_REP         (STM32_HRTIM_TIMERA_REP+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_CMP1R       (STM32_HRTIM_TIMERA_CMP1R+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_CMP1CR      (STM32_HRTIM_TIMERA_CMP1CR+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_CMP2R       (STM32_HRTIM_TIMERA_CMP2R+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_CMP3R       (STM32_HRTIM_TIMERA_CMP3R+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_CMP4R       (STM32_HRTIM_TIMERA_CMP4R+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_CPT1R       (STM32_HRTIM_TIMERA_CMPT1R+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_CPT2R       (STM32_HRTIM_TIMERA_CMPT2R+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_DTR         (STM32_HRTIM_TIMERA_DTR+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_SET1R       (STM32_HRTIM_TIMERA_SET1R+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_RST1R       (STM32_HRTIM_TIMERA_RST1R+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_SET2R       (STM32_HRTIM_TIMERA_SET2R+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_RST2R       (STM32_HRTIM_TIMERA_RST2R+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_EEFR1       (STM32_HRTIM_TIMERA_EEFR1+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_EEFR2       (STM32_HRTIM_TIMERA_EEFR2+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_RSTR        (STM32_HRTIM_TIMERA_RSTR+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_CHPR        (STM32_HRTIM_TIMERA_CHPR+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_CPT1CR      (STM32_HRTIM_TIMERA_CPT1CR+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_CPT2CR      (STM32_HRTIM_TIMERA_CPT2CR+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_OUTR        (STM32_HRTIM_TIMERA_OUTR+STM32_HRTIM1_TIMERA_BASE)
+#define STM32_HRTIM1_TIMERA_FLTR        (STM32_HRTIM_TIMERA_FLTR+STM32_HRTIM1_TIMERA_BASE)
+
+/* HRTIM1 Timer B */
+
+#define STM32_HRTIM1_TIMERB_CR          (STM32_HRTIM_TIMERB_CR+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_ISR         (STM32_HRTIM_TIMERB_ISR+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_ICR         (STM32_HRTIM_TIMERB_ICR+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_DIER        (STM32_HRTIM_TIMERB_DIER+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_CNTR        (STM32_HRTIM_TIMERB_CNTR+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_PER         (STM32_HRTIM_TIMERB_PER+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_REP         (STM32_HRTIM_TIMERB_REP+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_CMP1R       (STM32_HRTIM_TIMERB_CMP1R+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_CMP1CR      (STM32_HRTIM_TIMERB_CMP1CR+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_CMP2R       (STM32_HRTIM_TIMERB_CMP2R+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_CMP3R       (STM32_HRTIM_TIMERB_CMP3R+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_CMP4R       (STM32_HRTIM_TIMERB_CMP4R+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_CPT1R       (STM32_HRTIM_TIMERB_CMPT1R+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_CPT2R       (STM32_HRTIM_TIMERB_CMPT2R+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_DTR         (STM32_HRTIM_TIMERB_DTR+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_SET1R       (STM32_HRTIM_TIMERB_SET1R+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_RST1R       (STM32_HRTIM_TIMERB_RST1R+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_SET2R       (STM32_HRTIM_TIMERB_SET2R+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_RST2R       (STM32_HRTIM_TIMERB_RST2R+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_EEFR1       (STM32_HRTIM_TIMERB_EEFR1+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_EEFR2       (STM32_HRTIM_TIMERB_EEFR2+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_RSTR        (STM32_HRTIM_TIMERB_RSTR+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_CHPR        (STM32_HRTIM_TIMERB_CHPR+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_CPT1CR      (STM32_HRTIM_TIMERB_CPT1CR+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_CPT2CR      (STM32_HRTIM_TIMERB_CPT2CR+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_OUTR        (STM32_HRTIM_TIMERB_OUTR+STM32_HRTIM1_TIMERB_BASE)
+#define STM32_HRTIM1_TIMERB_FLTR        (STM32_HRTIM_TIMERB_FLTR+STM32_HRTIM1_TIMERB_BASE)
+
+/* HRTIM1 Timer C */
+
+#define STM32_HRTIM1_TIMERC_CR          (STM32_HRTIM_TIMERC_CR+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_ISR         (STM32_HRTIM_TIMERC_ISR+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_ICR         (STM32_HRTIM_TIMERC_ICR+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_DIER        (STM32_HRTIM_TIMERC_DIER+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_CNTR        (STM32_HRTIM_TIMERC_CNTR+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_PER         (STM32_HRTIM_TIMERC_PER+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_REP         (STM32_HRTIM_TIMERC_REP+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_CMP1R       (STM32_HRTIM_TIMERC_CMP1R+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_CMP1CR      (STM32_HRTIM_TIMERC_CMP1CR+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_CMP2R       (STM32_HRTIM_TIMERC_CMP2R+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_CMP3R       (STM32_HRTIM_TIMERC_CMP3R+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_CMP4R       (STM32_HRTIM_TIMERC_CMP4R+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_CPT1R       (STM32_HRTIM_TIMERC_CMPT1R+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_CPT2R       (STM32_HRTIM_TIMERC_CMPT2R+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_DTR         (STM32_HRTIM_TIMERC_DTR+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_SET1R       (STM32_HRTIM_TIMERC_SET1R+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_RST1R       (STM32_HRTIM_TIMERC_RST1R+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_SET2R       (STM32_HRTIM_TIMERC_SET2R+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_RST2R       (STM32_HRTIM_TIMERC_RST2R+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_EEFR1       (STM32_HRTIM_TIMERC_EEFR1+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_EEFR2       (STM32_HRTIM_TIMERC_EEFR2+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_RSTR        (STM32_HRTIM_TIMERC_RSTR+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_CHPR        (STM32_HRTIM_TIMERC_CHPR+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_CPT1CR      (STM32_HRTIM_TIMERC_CPT1CR+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_CPT2CR      (STM32_HRTIM_TIMERC_CPT2CR+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_OUTR        (STM32_HRTIM_TIMERC_OUTR+STM32_HRTIM1_TIMERC_BASE)
+#define STM32_HRTIM1_TIMERC_FLTR        (STM32_HRTIM_TIMERC_FLTR+STM32_HRTIM1_TIMERC_BASE)
+
+/* HRTIM1 Timer D */
+
+#define STM32_HRTIM1_TIMERD_CR          (STM32_HRTIM_TIMERD_CR+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_ISR         (STM32_HRTIM_TIMERD_ISR+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_ICR         (STM32_HRTIM_TIMERD_ICR+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_DIER        (STM32_HRTIM_TIMERD_DIER+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_CNTR        (STM32_HRTIM_TIMERD_CNTR+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_PER         (STM32_HRTIM_TIMERD_PER+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_REP         (STM32_HRTIM_TIMERD_REP+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_CMP1R       (STM32_HRTIM_TIMERD_CMP1R+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_CMP1CR      (STM32_HRTIM_TIMERD_CMP1CR+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_CMP2R       (STM32_HRTIM_TIMERD_CMP2R+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_CMP3R       (STM32_HRTIM_TIMERD_CMP3R+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_CMP4R       (STM32_HRTIM_TIMERD_CMP4R+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_CPT1R       (STM32_HRTIM_TIMERD_CMPT1R+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_CPT2R       (STM32_HRTIM_TIMERD_CMPT2R+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_DTR         (STM32_HRTIM_TIMERD_DTR+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_SET1R       (STM32_HRTIM_TIMERD_SET1R+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_RST1R       (STM32_HRTIM_TIMERD_RST1R+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_SET2R       (STM32_HRTIM_TIMERD_SET2R+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_RST2R       (STM32_HRTIM_TIMERD_RST2R+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_EEFR1       (STM32_HRTIM_TIMERD_EEFR1+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_EEFR2       (STM32_HRTIM_TIMERD_EEFR2+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_RSTR        (STM32_HRTIM_TIMERD_RSTR+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_CHPR        (STM32_HRTIM_TIMERD_CHPR+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_CPT1CR      (STM32_HRTIM_TIMERD_CPT1CR+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_CPT2CR      (STM32_HRTIM_TIMERD_CPT2CR+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_OUTR        (STM32_HRTIM_TIMERD_OUTR+STM32_HRTIM1_TIMERD_BASE)
+#define STM32_HRTIM1_TIMERD_FLTR        (STM32_HRTIM_TIMERD_FLTR+STM32_HRTIM1_TIMERD_BASE)
+
+/* HRTIM1 Timer E */
+
+#define STM32_HRTIM1_TIMERE_CR          (STM32_HRTIM_TIMERE_CR+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_ISR         (STM32_HRTIM_TIMERE_ISR+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_ICR         (STM32_HRTIM_TIMERE_ICR+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_DIER        (STM32_HRTIM_TIMERE_DIER+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_CNTR        (STM32_HRTIM_TIMERE_CNTR+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_PER         (STM32_HRTIM_TIMERE_PER+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_REP         (STM32_HRTIM_TIMERE_REP+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_CMP1R       (STM32_HRTIM_TIMERE_CMP1R+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_CMP1CR      (STM32_HRTIM_TIMERE_CMP1CR+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_CMP2R       (STM32_HRTIM_TIMERE_CMP2R+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_CMP3R       (STM32_HRTIM_TIMERE_CMP3R+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_CMP4R       (STM32_HRTIM_TIMERE_CMP4R+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_CPT1R       (STM32_HRTIM_TIMERE_CMPT1R+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_CPT2R       (STM32_HRTIM_TIMERE_CMPT2R+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_DTR         (STM32_HRTIM_TIMERE_DTR+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_SET1R       (STM32_HRTIM_TIMERE_SET1R+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_RST1R       (STM32_HRTIM_TIMERE_RST1R+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_SET2R       (STM32_HRTIM_TIMERE_SET2R+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_RST2R       (STM32_HRTIM_TIMERE_RST2R+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_EEFR1       (STM32_HRTIM_TIMERE_EEFR1+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_EEFR2       (STM32_HRTIM_TIMERE_EEFR2+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_RSTR        (STM32_HRTIM_TIMERE_RSTR+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_CHPR        (STM32_HRTIM_TIMERE_CHPR+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_CPT1CR      (STM32_HRTIM_TIMERE_CPT1CR+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_CPT2CR      (STM32_HRTIM_TIMERE_CPT2CR+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_OUTR        (STM32_HRTIM_TIMERE_OUTR+STM32_HRTIM1_TIMERE_BASE)
+#define STM32_HRTIM1_TIMERE_FLTR        (STM32_HRTIM_TIMERE_FLTR+STM32_HRTIM1_TIMERE_BASE)
+
+/* HRTIM1 Common Registers  */
+
+#define STM32_HRTIM_CMN_CR1             (STM32_HRTIM_CMN_CR1+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_CR2             (STM32_HRTIM_CMN_CR2+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_ISR             (STM32_HRTIM_CMN_ISR+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_ICR             (STM32_HRTIM_CMN_ICR+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_IER             (STM32_HRTIM_CMN_IER+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_OENR            (STM32_HRTIM_CMN_OENR+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_DISR            (STM32_HRTIM_CMN_DISR+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_ODSR            (STM32_HRTIM_CMN_ODSR+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_BMCR            (STM32_HRTIM_CMN_BMCR+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_BMTGR           (STM32_HRTIM_CMN_BMTGR+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_BMCMPR          (STM32_HRTIM_CMN_MBCMPR+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_BMPER           (STM32_HRTIM_CMN_BMPER+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_EECR1           (STM32_HRTIM_CMN_EECR1+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_EECR2           (STM32_HRTIM_CMN_EECR2+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_EECR3           (STM32_HRTIM_CMN_EECR3+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_ADC1R           (STM32_HRTIM_CMN_ADC1R+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_ADC2R           (STM32_HRTIM_CMN_ADC2R+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_ADC3R           (STM32_HRTIM_CMN_ADC3R+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_ADC4R           (STM32_HRTIM_CMN_ADC4R+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_DLLCR           (STM32_HRTIM_CMN_DLLCR+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_FLTINR1         (STM32_HRTIM_CMN_FTLINR1+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_FLTINR2         (STM32_HRTIM_CMN_FLTINR2+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_BDMUPDR         (STM32_HRTIM_CMN_BDMUPDR+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_BDTAUPR         (STM32_HRTIM_CMN_BDTAUPR+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_BDTBUPR         (STM32_HRTIM_CMN_BDTBUR+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_BDTCUPR         (STM32_HRTIM_CMN_BDTCUPR+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_BDTDUPR         (STM32_HRTIM_CMN_BDTDUPR+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_BDTEUPR         (STM32_HRTIM_CMN_BDTEUPR+STM32_HRTIM1_CMN_BASE)
+#define STM32_HRTIM_CMN_BDMADR          (STM32_HRTIM_CMN_BDMADR+STM32_HRTIM1_CMN_BASE)
+
+/* Register Bitfield Definitions ****************************************************/
+
+/* Master Timer Control Register */
+
+#define HRTIM_MCR_CKPSC_SHIFT      0 /* Bits 0-2: Clock prescaler */
+#define HRTIM_MCR_CKPSC_MASK       (7 << HRTIM_MCR_CKPSC_SHIFT)
+#  define HRTIM_MCR_CKPSC_NODIV    (0 << HRTIM_MCR_CKPSC_SHIFT)
+#  define HRTIM_MCR_CKPSC_d2       (1 << HRTIM_MCR_CKPSC_SHIFT)
+#  define HRTIM_MCR_CKPSC_d4       (2 << HRTIM_MCR_CKPSC_SHIFT)
+#  define HRTIM_MCR_CKPSC_d8       (3 << HRTIM_MCR_CKPSC_SHIFT)
+#  define HRTIM_MCR_CKPSC_d16      (4 << HRTIM_MCR_CKPSC_SHIFT)
+#  define HRTIM_MCR_CKPSC_d32      (5 << HRTIM_MCR_CKPSC_SHIFT)
+#  define HRTIM_MCR_CKPSC_d64      (6 << HRTIM_MCR_CKPSC_SHIFT)
+#  define HRTIM_MCR_CKPSC_d128     (7 << HRTIM_MCR_CKPSC_SHIFT)
+#define HRTIM_MCR_CONT             (1 << 3) /* Bit 3: Continuous mode */
+#define HRTIM_MCR_RETRIG           (1 << 4) /* Bit 4: Re-triggerable mode */
+#define HRTIM_MCR_HALF             (1 << 5) /* Bit 5: Half mode */
+#define HRTIM_MCR_SYNCIN_SHIFT     8 /* Bits 8-9: Synchronization input */
+#define HRTIM_MCR_SYNCIN_MASK      (3 << HRTIM_MCR_SYNCIN_SHIFT)
+#  define HRTIM_MCR_SYNCIN_DIS     (0 << HRTIM_MCR_SYNCIN_SHIFT) /* 00 disabled */
+#  define HRTIM_MCR_SYNCIN_INTE    (2 << HRTIM_MCR_SYNCIN_SHIFT) /* 10: Internal Event */
+#  define HRTIM_MCR_SYNCIN_EXTE    (3 << HRTIM_MCR_SYNCIN_SHIFT) /* 11: External Event */
+#define HRTIM_MCR_SYNCRST          (1 << 10) /* Bit 10: Synchronization Resets Master */
+#define HRTIM_MCR_SYNCSTRTM        (1 << 11) /* Bit 11: Synchronization Starts Master */
+#define HRTIM_MCR_SYNCOUT_SHIFT    12 /* Bits 12-13: Synchronization output */
+#define HRTIM_MCR_SYNCOUT_MASK     (3 << HRTIM_MCR_SYNCOUT_SHIFT)
+#  define HRTIM_MCR_SYNCOUT_DIS    (0 << HRTIM_MCR_SYNCOUT_SHIFT) /* 00: Disabled */
+#  define HRTIM_MCR_SYNCOUT_POS    (2 << HRTIM_MCR_SYNCOUT_SHIFT) /* 10: Positive pulse on SCOUT */
+#  define HRTIM_MCR_SYNCOUT_NEG    (3 << HRTIM_MCR_SYNCOUT_SHIFT) /* 11: Negative pulse on SCOUT */
+#define HRTIM_MCR_SYNCSRC_SHIFT    14 /* Bits 14-15: Synchronization source*/
+#define HRTIM_MCR_SYNCSRC_MASK     (3 << HRTIM_MCR_SYNCSRC_SHIFT)
+#  define HRTIM_MCR_SYNCSRC_MSTRT  (0 << HRTIM_MCR_SYNCSRC_SHIFT) /* 00: Master timer Start */
+#  define HRTIM_MCR_SYNCSRC_MCMP1  (1 << HRTIM_MCR_SYNCSRC_SHIFT) /* 01: Master timer Compare 1 Event */
+#  define HRTIM_MCR_SYNCSRC_TASTRT (2 << HRTIM_MCR_SYNCSRC_SHIFT) /* 10: Timer A start/reset */
+#  define HRTIM_MCR_SYNCSRC_TACMP1 (3 << HRTIM_MCR_SYNCSRC_SHIFT) /* 11: Timer A Compare 1 Event */
+#define HRTIM_MCR_MCEN             (1 << 16) /* Bit 16: Master timer counter enable */
+#define HRTIM_MCR_TACEN            (1 << 17) /* Bit 17: Timer A counter enable */
+#define HRTIM_MCR_TBCEN            (1 << 18) /* Bit 18: Timer B counter enable */
+#define HRTIM_MCR_TCCEN            (1 << 19) /* Bit 19: Timer C counter enable */
+#define HRTIM_MCR_TDCEN            (1 << 20) /* Bit 20: Timer D counter enable */
+#define HRTIM_MCR_TECEN            (1 << 21) /* Bit 21: Timer E counter enable */
+#define HRTIM_MCR_DACSYNC_SHIFT    25 /* Bits 25-26: DAC Synchronization*/
+#define HRTIM_MCR_DACSYNC_MASK     (3 << HRTIM_MCR_DACSYNC_SHIFT)
+#  define HRTIM_MCR_DACSYNC_00     (0 << HRTIM_MCR_DACSYNC_SHIFT) /* 00: */
+#  define HRTIM_MCR_DACSYNC_01     (1 << HRTIM_MCR_DACSYNC_SHIFT) /* 01: */
+#  define HRTIM_MCR_DACSYNC_10     (2 << HRTIM_MCR_DACSYNC_SHIFT) /* 10: */
+#  define HRTIM_MCR_DACSYNC_11     (3 << HRTIM_MCR_DACSYNC_SHIFT) /* 11: */
+#define HRTIM_MCR_PREEN            (1 << 27) /* Bit 27: Preload enable */
+#define HRTIM_MCR_MREPU            (1 << 29) /* Bit 29: Master Timer Repetition Update */
+#define HRTIM_MCR_BRSTDMA_SHIFT    30 /* Bits 30-31: Burs DMA Update*/
+#define HRTIM_MCR_BRSTDMA_MASK     (3 << HRTIM_MCR_BRSTDMA_SHIFT)
+#  define HRTIM_MCR_BRSTDMA_00     (0 << HRTIM_MCR_BRSTDMA_SHIFT) /* 00 */
+#  define HRTIM_MCR_BRSTDMA_01     (1 << HRTIM_MCR_BRSTDMA_SHIFT) /* 01 */
+#  define HRTIM_MCR_BRSTDMA_10     (2 << HRTIM_MCR_BRSTDMA_SHIFT) /* 10 */
+
+/* Master Timer Interrupt Status Register */
+
+#define HRTIM_MISR_MCMP1           (1 << 0) /* Bit 0: Master Compare 1 Interrupt Flag */
+#define HRTIM_MISR_MCMP2           (1 << 1) /* Bit 1: Master Compare 2 Interrupt Flag */
+#define HRTIM_MISR_MCMP3           (1 << 2) /* Bit 2: Master Compare 3 Interrupt Flag */
+#define HRTIM_MISR_MCMP4           (1 << 3) /* Bit 3: Master Compare 4 Interrupt Flag */
+#define HRTIM_MISR_MREP            (1 << 4) /* Bit 4: Master Repetition Interrupt Flag */
+#define HRTIM_MISR_SYNC            (1 << 5) /* Bit 5: Sync Input Interrupt Flag */
+#define HRTIM_MISR_MUPD            (1 << 6) /* Bit 6: Master Update Interrupt Flag */
+
+/* Master Timer Interrupt Clear Register */
+
+#define HRTIM_MICR_MCMP1C          (1 << 0) /* Bit 0: Master Compare 1 Interrupt Flag Clear */
+#define HRTIM_MICR_MCMP2C          (1 << 1) /* Bit 1: Master Compare 2 Interrupt Flag Clear  */
+#define HRTIM_MICR_MCMP3C          (1 << 2) /* Bit 2: Master Compare 3 Interrupt Flag Clear  */
+#define HRTIM_MICR_MCMP4C          (1 << 3) /* Bit 3: Master Compare 4 Interrupt Flag Clear  */
+#define HRTIM_MICR_MREPC           (1 << 4) /* Bit 4: Master Repetition Interrupt Flag Clear  */
+#define HRTIM_MICR_SYNCC           (1 << 5) /* Bit 5: Sync Input Interrupt Flag Clear  */
+#define HRTIM_MICR_MUPDC           (1 << 6) /* Bit 6: Master Update Interrupt Flag Clear  */
+
+/* Master Timer DMA/Interrupt Clear Register */
+
+#define HRTIM_MDIER_MCMP1IE        (1 << 0) /* Bit 0: Master Compare 1 Interrupt Enable */
+#define HRTIM_MDIER_MCMP2IE        (1 << 1) /* Bit 1: Master Compare 2 Interrupt Enable */
+#define HRTIM_MDIER_MCMP3IE        (1 << 2) /* Bit 2: Master Compare 3 Interrupt Enable */
+#define HRTIM_MDIER_MCMP4IE        (1 << 3) /* Bit 3: Master Compare 4 Interrupt Enable */
+#define HRTIM_MDIER_MREPIE         (1 << 4) /* Bit 4: Master Repetition Interrupt Enable */
+#define HRTIM_MDIER_SYNCIE         (1 << 5) /* Bit 5: Sync Input Interrupt Enable */
+#define HRTIM_MDIER_MUPDIE         (1 << 6) /* Bit 6: Master Update Interrupt Enable */
+#define HRTIM_MDIER_MCMP1DE        (1 << 16) /* Bit 16 */
+#define HRTIM_MDIER_MCMP2DE        (1 << 17) /* Bit 17 */
+#define HRTIM_MDIER_MCMP3DE        (1 << 18) /* Bit 18 */
+#define HRTIM_MDIER_MCMP4DE        (1 << 19) /* Bit 19 */
+#define HRTIM_MDIER_MREPDE         (1 << 20) /* Bit 20 */
+#define HRTIM_MDIER_SYNCDE         (1 << 21) /* Bit 21 */
+#define HRTIM_MDIER_MUPDDE         (1 << 22) /* Bit 22 */
+
+/* Master Timer Counter Register */
+
+#define HRTIM_MCNTR_SHIFT          0 /* Bits 0-15: Counter Value */
+#define HRTIM_MCNTR_MASK           (0xffff << HRTIM_MCNTR_SHIFT)
+
+/* Master Timer Period Register */
+
+#define HRTIM_MPER_SHIFT           0 /* Bits 0-15: Master Timer Period value */
+#define HRTIM_MPER_MASK            (0xffff << HRTIM_MPER_SHIFT)
+
+/* Master Timer Repetition Register */
+
+#define HRTIM_MREP_SHIFT           0 /* Bits 0-8: Master Timer Repetition period value */
+#define HRTIM_MREP_MASK            (0xff << HRTIM_MREP_SHIFT)
+
+/* Master Timer Compare 1 Register */
+
+#define HRTIM_MCMP1_SHIFT           0 /* Bits 0-15: Master Timer Compare 1 value */
+#define HRTIM_MCMP1_MASK            (0xffff << HRTIM_MCMP1_SHIFT)
+
+/* Master Timer Compare 2 Register */
+
+#define HRTIM_MCMP2_SHIFT           0 /* Bits 0-15: Master Timer Compare 2 value */
+#define HRTIM_MCMP2_MASK            (0xffff << HRTIM_MCMP2_SHIFT)
+
+/* Master Timer Compare 3 Register */
+
+#define HRTIM_MCMP3_SHIFT           0 /* Bits 0-15: Master Timer Compare 3 value  */
+#define HRTIM_MCMP3_MASK            (0xffff << HRTIM_MCMP3_SHIFT)
+
+/* Master Timer Compare 4 Register */
+
+#define HRTIM_MCMP4_SHIFT           0 /* Bits 0-15: Master Timer Compare 4 value  */
+#define HRTIM_MCMP4_MASK            (0xffff << HRTIM_MCMP4_SHIFT)
+
+/* Timer X Control Register */
+
+#define HRTIM_TIMCR_CKPSC_SHIFT     0 /* Bits 0-2: HRTIM Timer X Clock Prescaler */
+#define HRTIM_TIMCR_CKPSC_MASK      (7 << HRTIM_TIMCR_CKPSC_SHIFT)
+#  define HRTIM_TIMCR_CKPSC_000     (0 << HRTIM_TIMCR_CKPSC_SHIFT) /* 000: */
+#  define HRTIM_TIMCR_CKPSC_001     (1 << HRTIM_TIMCR_CKPSC_SHIFT) /* 001: */
+#  define HRTIM_TIMCR_CKPSC_010     (2 << HRTIM_TIMCR_CKPSC_SHIFT) /* 010: */
+#  define HRTIM_TIMCR_CKPSC_011     (3 << HRTIM_TIMCR_CKPSC_SHIFT) /* 011: */
+#  define HRTIM_TIMCR_CKPSC_100     (4 << HRTIM_TIMCR_CKPSC_SHIFT) /* 100: */
+#  define HRTIM_TIMCR_CKPSC_101     (5 << HRTIM_TIMCR_CKPSC_SHIFT) /* 101: */
+#  define HRTIM_TIMCR_CKPSC_110     (6 << HRTIM_TIMCR_CKPSC_SHIFT) /* 110: */
+#  define HRTIM_TIMCR_CKPSC_111     (7 << HRTIM_TIMCR_CKPSC_SHIFT) /* 111: */
+#define HRTIM_TIMCR_CONT            (1 << 3) /* Bit 3: Continuous mode */
+#define HRTIM_TIMCR_RETRIG          (1 << 4) /* Bit 4: Re-triggerable mode */
+#define HRTIM_TIMCR_HALF            (1 << 5) /* Bit 5: Half mode enable */
+#define HRTIM_TIMCR_PSHPLL          (1 << 6) /* Bit 6:Push-Pull mode enable */
+#define HRTIM_TIMCR_SYNCRS          (1 << 10) /* Bit 10: Synchronization Resets Timer X */
+#define HRTIM_TIMCR_SYNCSTR         (1 << 11) /* Bit 11: Synchronization Starts Timer X */
+#define HRTIM_TIMCR_DELCMP2_SHIFT   12        /* Bits 12-13: CMP2 auto-delayed mode */
+#define HRTIM_TIMCR_DELCMP2_MASK    (3 << HRTIM_TIMCR_DELCMP2_SHIFT)
+#  define HRTIM_TIMCR_DELCMP2_00    (0 << HRTIM_TIMCR_DELCMP2_SHIFT) /* 00: */
+#  define HRTIM_TIMCR_DELCMP2_01    (1 << HRTIM_TIMCR_DELCMP2_SHIFT) /* 01: */
+#  define HRTIM_TIMCR_DELCMP2_10    (2 << HRTIM_TIMCR_DELCMP2_SHIFT) /* 10: */
+#  define HRTIM_TIMCR_DELCMP2_11    (3 << HRTIM_TIMCR_DELCMP2_SHIFT) /* 11: */
+#define HRTIM_TIMCR_DELCMP4_SHIFT   12        /* Bits 14-15: CMP4 auto-delayed mode */
+#define HRTIM_TIMCR_DELCMP4_MASK    (3 << HRTIM_TIMCR_DELCMP4_SHIFT)
+#  define HRTIM_TIMCR_DELCMP4_00    (0 << HRTIM_TIMCR_DELCMP4_SHIFT) /* 00: */
+#  define HRTIM_TIMCR_DELCMP4_01    (1 << HRTIM_TIMCR_DELCMP4_SHIFT) /* 01: */
+#  define HRTIM_TIMCR_DELCMP4_10    (2 << HRTIM_TIMCR_DELCMP4_SHIFT) /* 10: */
+#  define HRTIM_TIMCR_DELCMP4_11    (3 << HRTIM_TIMCR_DELCMP4_SHIFT) /* 11: */
+#define HRTIM_TIMCR_REPU            (1 << 17) /* Bit 17: Timer X Repetition Update */
+#define HRTIM_TIMCR_RSTU            (1 << 18) /* Bit 18: Timer X Reset Update */
+#define HRTIM_TIMCR_TAU             (1 << 19) /* Bit 19: Timer A Update */
+#define HRTIM_TIMCR_TBU             (1 << 20) /* Bit 20: Timer B Update */
+#define HRTIM_TIMCR_TCU             (1 << 21) /* Bit 21: Timer C Update */
+#define HRTIM_TIMCR_TDU             (1 << 22) /* Bit 22: Timer D Update */
+#define HRTIM_TIMCR_TEU             (1 << 23) /* Bit 23: Timer E Update */
+#define HRTIM_TIMCR_MSTU            (1 << 24) /* Bit 24: Master Timer Update */
+#define HRTIM_TIMCR_DACSYNC_SHIFT   25        /* Bits 25-26: DAC Synchronization */
+#define HRTIM_TIMCR_DACSYNC_MASK    (3 << HRTIM_TIMCR_DACSYNC_SHIFT)
+#  define HRTIM_TIMCR_DACSYNC_00    (0 << HRTIM_TIMCR_DACSYNC_SHIFT)
+#  define HRTIM_TIMCR_DACSYNC_01    (1 << HRTIM_TIMCR_DACSYNC_SHIFT)
+#  define HRTIM_TIMCR_DACSYNC_10    (2 << HRTIM_TIMCR_DACSYNC_SHIFT)
+#  define HRTIM_TIMCR_DACSYNC_11    (3 << HRTIM_TIMCR_DACSYNC_SHIFT)
+#define HRTIM_TIMCR_PREEN           (1 << 27) /* Bit 27: Preload Enable */
+#define HRTIM_TIMCR_UPDGAT_SHIFT    28        /* Bits 28-31: Update Gating */
+#define HRTIM_TIMCR_UPDGAT_MASK     (15 << HRTIM_TIMCR_UPDGAT_SHIFT)
+#  define HRTIM_TIMCR_UPDGAT_0000   (0 << HRTIM_TIMCR_UPDGAT_SHIFT) /* 0000: */
+#  define HRTIM_TIMCR_UPDGAT_0001   (1 << HRTIM_TIMCR_UPDGAT_SHIFT) /* 0001: */
+#  define HRTIM_TIMCR_UPDGAT_0010   (2 << HRTIM_TIMCR_UPDGAT_SHIFT) /* 0010: */
+#  define HRTIM_TIMCR_UPDGAT_0011   (3 << HRTIM_TIMCR_UPDGAT_SHIFT) /* 0011: */
+#  define HRTIM_TIMCR_UPDGAT_0100   (4 << HRTIM_TIMCR_UPDGAT_SHIFT) /* 0100: */
+#  define HRTIM_TIMCR_UPDGAT_0101   (5 << HRTIM_TIMCR_UPDGAT_SHIFT) /* 0101: */
+#  define HRTIM_TIMCR_UPDGAT_0110   (6 << HRTIM_TIMCR_UPDGAT_SHIFT) /* 0110: */
+#  define HRTIM_TIMCR_UPDGAT_0111   (7 << HRTIM_TIMCR_UPDGAT_SHIFT) /* 0111: */
+#  define HRTIM_TIMCR_UPDGAT_1000   (8 << HRTIM_TIMCR_UPDGAT_SHIFT) /* 1000: */
+
+/* Timer X Interrupt Status Register */
+
+#define HRTIM_TIMISR_CMP1           (1 << 0) /* Bit 0: Compare 1 Interrupt Flag */
+#define HRTIM_TIMISR_CMP2           (1 << 1) /* Bit 1: Compare 2 Interrupt Flag */
+#define HRTIM_TIMISR_CMP3           (1 << 2) /* Bit 2: Compare 3 Interrupt Flag */
+#define HRTIM_TIMISR_CMP4           (1 << 3) /* Bit 3: Compare 4 Interrupt Flag */
+#define HRTIM_TIMISR_REP            (1 << 4) /* Bit 4: Repetition Interrupt Flag */
+#define HRTIM_TIMISR_UPD            (1 << 6) /* Bit 6: Update Interrupt Flag */
+#define HRTIM_TIMISR_CPT1           (1 << 7) /* Bit 7: Capture 1 Interrupt Flag */
+#define HRTIM_TIMISR_CPT2           (1 << 8) /* Bit 8: Capture 2 Interrupt Flag */
+#define HRTIM_TIMISR_SET1           (1 << 9) /* Bit 9: Output 1 Set Interrupt Flag */
+#define HRTIM_TIMISR_RST1           (1 << 10) /* Bit 10: Output 1 Reset Interrupt Flag  */
+#define HRTIM_TIMISR_SET2           (1 << 11) /* Bit 11: Output 2 Set Interrupt Flag  */
+#define HRTIM_TIMISR_RST2           (1 << 12) /* Bit 12: Output 2 Reset Interrupt Flag  */
+#define HRTIM_TIMISR_RST            (1 << 13) /* Bit 13: Reset and/or roll-over Interrupt Flag  */
+#define HRTIM_TIMISR_DLYPRT         (1 << 14) /* Bit 14: Delayed Protection Flag */
+#define HRTIM_TIMISR_CPPSTAT        (1 << 16) /* Bit 16: Current Push Pull Status */
+#define HRTIM_TIMISR_IPPSTAT        (1 << 17) /* Bit 17: Idle Push Pull Status */
+#define HRTIM_TIMISR_O1STAT         (1 << 18) /* Bit 18: Output 1 Status */
+#define HRTIM_TIMISR_O2STAT         (1 << 19) /* Bit 19: Output 2 Status */
+#define HRTIM_TIMISR_O1CPY          (1 << 20) /* Bit 20: Output 1 Copy */
+#define HRTIM_TIMISR_O2CPY          (1 << 21) /* Bit 21: Output 2 Copy */
+
+/* Timer X Interrupt Clear Register */
+
+#define HRTIM_TIMICR_CMP1C          (1 << 0) /* Bit 0: Compare 1 Interrupt Flag Clear */
+#define HRTIM_TIMICR_CMP2C          (1 << 1) /* Bit 1: Compare 2 Interrupt Flag Clear */
+#define HRTIM_TIMICR_CMP3C          (1 << 2) /* Bit 2: Compare 3 Interrupt Flag Clear */
+#define HRTIM_TIMICR_CMP4C          (1 << 3) /* Bit 3: Compare 4 Interrupt Flag Clear */
+#define HRTIM_TIMICR_REPC           (1 << 4) /* Bit 4: Repetition Interrupt Flag Clear */
+#define HRTIM_TIMICR_UPDC           (1 << 6) /* Bit 6: Update Interrupt Flag Clear */
+#define HRTIM_TIMICR_CPT1C          (1 << 7) /* Bit 7: Capture 1 Interrupt Flag Clear */
+#define HRTIM_TIMICR_CPT2C          (1 << 8) /* Bit 8: Capture 2 Interrupt Flag Clear */
+#define HRTIM_TIMICR_SET1C          (1 << 9) /* Bit 9: Output 1 Set Flag Clear */
+#define HRTIM_TIMICR_RST1C          (1 << 10) /* Bit 10: Output 1 Reset Flag Clear */
+#define HRTIM_TIMICR_SET2C          (1 << 11) /* Bit 11: Output 2 Set Flag Clear */
+#define HRTIM_TIMICR_RST2C          (1 << 12) /* Bit 12: Output 2 Reset Flag Clear */
+#define HRTIM_TIMICR_RSTC           (1 << 13) /* Bit 13: Reset Interrupt Flag Clear */
+#define HRTIM_TIMICR_DLYPRTC        (1 << 14) /* Bit 14: Delayed Protection Flag Clear */
+
+/* Timer X  DMA/Interrupt Enable Register */
+
+#define HRTIM_TIMDIER_CMP1IE        (1 << 0) /* Bit 0: Compare 1 Interrupt Enable */
+#define HRTIM_TIMDIER_CMP2IE        (1 << 1) /* Bit 1: Compare 2 Interrupt Enable */
+#define HRTIM_TIMDIER_CMP3IE        (1 << 2) /* Bit 2: Compare 3 Interrupt Enable */
+#define HRTIM_TIMDIER_CMP4IE        (1 << 3) /* Bit 3: Compare 4 Interrupt Enable */
+#define HRTIM_TIMDIER_REPIE         (1 << 4) /* Bit 4: Repetition Interrupt Enable */
+#define HRTIM_TIMDIER_UPDIE         (1 << 6) /* Bit 6: Update Interrupt Enable */
+#define HRTIM_TIMDIER_CPT1IE        (1 << 7) /* Bit 7: Capture 1 Interrupt Enable */
+#define HRTIM_TIMDIER_CPT2IE        (1 << 8) /* Bit 8: Capture 2 Interrupt Enable */
+#define HRTIM_TIMDIER_SET1IE        (1 << 9) /* Bit 9: Output 1 Set Interrupt Enable */
+#define HRTIM_TIMDIER_RST1IE        (1 << 10) /* Bit 10: Output 1 Reset Interrupt Enable  */
+#define HRTIM_TIMDIER_SET2IE        (1 << 11) /* Bit 11: Output 2 Set Interrupt Enable  */
+#define HRTIM_TIMDIER_RST2IE        (1 << 12) /* Bit 12: Output 2 Reset Interrupt Enable  */
+#define HRTIM_TIMDIER_RSTIE         (1 << 13) /* Bit 13: Reset/roll-over Interrupt Enable */
+#define HRTIM_TIMDIER_DLYPRTIE      (1 << 14) /* Bit 14: Delayed Protection Interrupt Enable */
+#define HRTIM_TIMDIER_CMP1DE        (1 << 16) /* Bit 16: Compare 1 DMA Request Enable */
+#define HRTIM_TIMDIER_CMP2DE        (1 << 17) /* Bit 17: Compare 2 DMA Request Enable */
+#define HRTIM_TIMDIER_CMP3DE        (1 << 18) /* Bit 18: Compare 3 DMA Request Enable */
+#define HRTIM_TIMDIER_CMP4DE        (1 << 19) /* Bit 19: Compare 4 DMA Request Enable */
+#define HRTIM_TIMDIER_REPDE         (1 << 20) /* Bit 20: Repetition DMA Request Enable */
+#define HRTIM_TIMDIER_UPDDE         (1 << 22) /* Bit 22: Update DMA Request Enable  */
+#define HRTIM_TIMDIER_CPT1DE        (1 << 23) /* Bit 23: Capture 1 DMA Request Enable */
+#define HRTIM_TIMDIER_CPT2DE        (1 << 24) /* Bit 24: Capture 2 DMA Request Enable */
+#define HRTIM_TIMDIER_SET1DE        (1 << 25) /* Bit 25: Output 1 Set DMA Request Enable */
+#define HRTIM_TIMDIER_RST1DE        (1 << 26) /* Bit 26: Output 1 Reset DMA Request Enable */
+#define HRTIM_TIMDIER_SET2DE        (1 << 27) /* Bit 27: Output 2 Set DMA Request Enable */
+#define HRTIM_TIMDIER_RST2DE        (1 << 28) /* Bit 28: Output 2 Reset DMA Request Enable */
+#define HRTIM_TIMDIER_RSTDE         (1 << 29) /* Bit 29: Reset/roll-over DMA Request Enable */
+#define HRTIM_TIMDIER_DLYPRTDE      (1 << 30) /* Bit 30: Delayed Protection DMA Request Enable */
+
+/* Timer X Counter Register */
+
+#define HRTIM_TIMCNTR_SHIFT         0 /* Bits 0-15: Timer X Counter Value */
+#define HRTIM_TIMCNTR_MASK          (0xffff << HRTIM_TIMCNTR_SHIFT)
+
+/* Timer X Period Register */
+
+#define HRTIM_TIMPER_SHIFT          0 /* Bits 0-15: Timer X Period Value */
+#define HRTIM_TIMPER_MASK           (0xffff << HRTIM_TIMPER_SHIFT)
+
+/* Timer X Repetition Register */
+
+#define HRTIM_TIMREP_SHIFT          0 /* Bits 0-8: Timer X Repetition Value */
+#define HRTIM_TIMREP_MASK           (0xff << HRTIM_TIMREP_SHIFT)
+
+/* Timer X Compare 1 Register */
+
+#define HRTIM_TIMCMP1_SHIFT         0 /* Bits 0-15: Timer X Compare 1 Value */
+#define HRTIM_TIMCMP1_MASK          (0xffff << HRTIM_TIMCMP1_SHIFT)
+
+/* Timer X Compare 1 Compound Register */
+
+#define HRTIM_TIMCMP1C_SHIFT        0 /* Bits 0-15: Timer X Compare 1 Value */
+#define HRTIM_TIMCMP1C_MASK         (0xffff << HRTIM_TIMCMP1C_SHIFT)
+#define HRTIM_TIMREPC_SHIFT         0 /* Bits 0-8: Timer X Repetition Value */
+#define HRTIM_TIMREPC_MASK          (0xff << HRTIM_TIMCMP1C_SHIFT)
+
+/* Timer X Compare 2 Register */
+
+#define HRTIM_TIMCMP2_SHIFT         0 /* Bits 0-15: Timer X Compare 2 Value */
+#define HRTIM_TIMCMP2_MASK          (0xffff << HRTIM_TIMCMP2_SHIFT)
+
+/* Timer X Compare 3 Register */
+
+#define HRTIM_TIMCMP3_SHIFT         0 /* Bits 0-15: Timer X Compare 3 Value */
+#define HRTIM_TIMCMP3_MASK          (0xffff << HRTIM_TIMCMP3_SHIFT)
+
+/* Timer X Compare 4 Register */
+
+#define HRTIM_TIMCMP4_SHIFT         0 /* Bits 0-15: Timer X Compare 4 Value */
+#define HRTIM_TIMCMP4_MASK          (0xffff << HRTIM_TIMCMP4_SHIFT)
+
+/* Timer X Capture 1 Register */
+
+#define HRTIM_TIMCPT1_SHIFT         0 /* Bits 0-15: Timer X Capture 1 Value */
+#define HRTIM_TIMCPT1_MASK          (0xffff << HRTIM_TIMCPT1_SHIFT)
+
+/* Timer X Capture 2 Register */
+
+#define HRTIM_TIMCPT2_SHIFT         0 /* Bits 0-15: Timer X Capture 2 Value */
+#define HRTIM_TIMCPT2_MASK          (0xffff << HRTIM_TIMCPT2_SHIFT)
+
+/* Timer X Deadtime Register */
+
+#define HRTIM_TIMDT_DTR_SHIFT       0 /* Bits 0-8: Deadtime Rising Value */
+#define HRTIM_TIMDT_DTR_MASK        (0xff << HRTIM_TIMDT_DTR_SHIFT)
+#define HRTIM_TIMDT_SDTR            (1 << 9) /* Bit 9: Sign Deadtime Rising Value */
+#define HRTIM_TIMDT_DTPRSC_SHIFT    10 /* Bits 10-12: Deadtime Prescaler */
+#define HRTIM_TIMDT_DTPRSC_MASK     (7 << HRTIM_TIMDT_DTPRSC_SHIFT)
+#  define HRTIM_TIMDT_DTPRSC_000    (0 << HRTIM_TIMDT_DTPRSC_SHIFT)
+#  define HRTIM_TIMDT_DTPRSC_001    (1 << HRTIM_TIMDT_DTPRSC_SHIFT)
+#  define HRTIM_TIMDT_DTPRSC_010    (2 << HRTIM_TIMDT_DTPRSC_SHIFT)
+#  define HRTIM_TIMDT_DTPRSC_011    (3 << HRTIM_TIMDT_DTPRSC_SHIFT)
+#  define HRTIM_TIMDT_DTPRSC_100    (4 << HRTIM_TIMDT_DTPRSC_SHIFT)
+#  define HRTIM_TIMDT_DTPRSC_101    (5 << HRTIM_TIMDT_DTPRSC_SHIFT)
+#  define HRTIM_TIMDT_DTPRSC_110    (6 << HRTIM_TIMDT_DTPRSC_SHIFT)
+#  define HRTIM_TIMDT_DTPRSC_111    (7 << HRTIM_TIMDT_DTPRSC_SHIFT)
+#define HRTIM_TIMDT_DTRSLK          (1 << 14) /* Bit 14: Deadtime Rising Sign Lock */
+#define HRTIM_TIMDT_DTRLK           (1 << 14) /* Bit 15: Deadtime Rising Lock */
+#define HRTIM_TIMDT_DTF_SHIFT       0 /* Bits 16-24: Deadtime Falling Value */
+#define HRTIM_TIMDT_DTF_MASK        (0x1ff << HRTIM_TIMDT_DTF_SHIFT)
+#define HRTIM_TIMDT_SDTF            (1 << 25) /* Bit 25: Sign Deadtime Falling Value */
+#define HRTIM_TIMDT_DTFSLK          (1 << 30) /* Bit 30: Deadtime Falling Sign Lock */
+#define HRTIM_TIMDT_DTFLK           (1 << 31) /* Bit 31: Deadtime Falling Lock */
+
+/* Timer X Output1 Set Register */
+
+#define HRTIM_TIMSET1_SST           (1 << 0) /* Bit 0: Software Set trigger */
+#define HRTIM_TIMSET1_RESYNC        (1 << 1) /* Bit 1: Timer A resynchronization */
+#define HRTIM_TIMSET1_PER           (1 << 2) /* Bit 2: Timer X Period */
+#define HRTIM_TIMSET1_CMP1          (1 << 3) /* Bit 3: Timer X Compare 1 */
+#define HRTIM_TIMSET1_CMP2          (1 << 4) /* Bit 4: Timer X Compare 2 */
+#define HRTIM_TIMSET1_CMP3          (1 << 5) /* Bit 5: Timer X Compare 3 */
+#define HRTIM_TIMSET1_CMP4          (1 << 6) /* Bit 6: Timer X Compare 4 */
+#define HRTIM_TIMSET1_MSTPER        (1 << 7) /* Bit 7: Master Period */
+#define HRTIM_TIMSET1_MSTCMP1       (1 << 8) /* Bit 8: Master Compare 1 */
+#define HRTIM_TIMSET1_MSTCMP2       (1 << 9) /* Bit 9: Master Compare 2 */
+#define HRTIM_TIMSET1_MSTCMP3       (1 << 10) /* Bit 10: Master Compare 3 */
+#define HRTIM_TIMSET1_MSTCMP4       (1 << 11) /* Bit 11: Master Compare 4 */
+#define HRTIM_TIMSET1_TIMEVNT1      (1 << 12) /* Bit 12: Timer Event 1 */
+#define HRTIM_TIMSET1_TIMEVNT2      (1 << 13) /* Bit 13: Timer Event 2 */
+#define HRTIM_TIMSET1_TIMEVNT3      (1 << 14) /* Bit 14: Timer Event 3 */
+#define HRTIM_TIMSET1_TIMEVNT4      (1 << 15) /* Bit 15: Timer Event 4 */
+#define HRTIM_TIMSET1_TIMEVNT5      (1 << 16) /* Bit 16: Timer Event 5 */
+#define HRTIM_TIMSET1_TIMEVNT6      (1 << 17) /* Bit 17: Timer Event 6 */
+#define HRTIM_TIMSET1_TIMEVNT7      (1 << 18) /* Bit 18: Timer Event 7 */
+#define HRTIM_TIMSET1_TIMEVNT8      (1 << 19) /* Bit 19: Timer Event 8 */
+#define HRTIM_TIMSET1_TIMEVNT9      (1 << 20) /* Bit 20: Timer Event 9 */
+#define HRTIM_TIMSET1_EXTEVNT1      (1 << 21) /* Bit 21: External Event 1 */
+#define HRTIM_TIMSET1_EXTEVNT2      (1 << 22) /* Bit 22: External Event 2 */
+#define HRTIM_TIMSET1_EXTEVNT3      (1 << 23) /* Bit 23: External Event 3 */
+#define HRTIM_TIMSET1_EXTEVNT4      (1 << 24) /* Bit 24: External Event 4 */
+#define HRTIM_TIMSET1_EXTEVNT5      (1 << 25) /* Bit 25: External Event 5 */
+#define HRTIM_TIMSET1_EXTEVNT6      (1 << 26) /* Bit 26: External Event 6 */
+#define HRTIM_TIMSET1_EXTEVNT7      (1 << 27) /* Bit 27: External Event 7 */
+#define HRTIM_TIMSET1_EXTEVNT8      (1 << 28) /* Bit 28: External Event 8 */
+#define HRTIM_TIMSET1_EXTEVNT9      (1 << 29) /* Bit 29: External Event 9 */
+#define HRTIM_TIMSET1_EXTEVNT10     (1 << 30) /* Bit 30: External Event 10 */
+#define HRTIM_TIMSET1_UPDATE        (1 << 31) /* Bit 31: Registers Update */
+
+/* Timer X Output1 Reset Register */
+
+#define HRTIM_TIMRST1_SST           (1 << 0) /* Bit 0 */
+#define HRTIM_TIMRST1_RESYNC        (1 << 1) /* Bit 1 */
+#define HRTIM_TIMRST1_PER           (1 << 2) /* Bit 2 */
+#define HRTIM_TIMRST1_CMP1          (1 << 3) /* Bit 3 */
+#define HRTIM_TIMRST1_CMP2          (1 << 4) /* Bit 4 */
+#define HRTIM_TIMRST1_CMP3          (1 << 5) /* Bit 5 */
+#define HRTIM_TIMRST1_CMP4          (1 << 6) /* Bit 6 */
+#define HRTIM_TIMRST1_MSTPER        (1 << 7) /* Bit 7 */
+#define HRTIM_TIMRST1_MSTCMP1       (1 << 8) /* Bit 8 */
+#define HRTIM_TIMRST1_MSTCMP2       (1 << 9) /* Bit 9 */
+#define HRTIM_TIMRST1_MSTCMP3       (1 << 10) /* Bit 10 */
+#define HRTIM_TIMRST1_MSTCMP4       (1 << 11) /* Bit 11 */
+#define HRTIM_TIMRST1_TIMEVNT1      (1 << 12) /* Bit 12 */
+#define HRTIM_TIMRST1_TIMEVNT2      (1 << 13) /* Bit 13 */
+#define HRTIM_TIMRST1_TIMEVNT3      (1 << 14) /* Bit 14 */
+#define HRTIM_TIMRST1_TIMEVNT4      (1 << 15) /* Bit 15 */
+#define HRTIM_TIMRST1_TIMEVNT5      (1 << 16) /* Bit 16 */
+#define HRTIM_TIMRST1_TIMEVNT6      (1 << 17) /* Bit 17 */
+#define HRTIM_TIMRST1_TIMEVNT7      (1 << 18) /* Bit 18 */
+#define HRTIM_TIMRST1_TIMEVNT8      (1 << 19) /* Bit 19 */
+#define HRTIM_TIMRST1_TIMEVNT9      (1 << 20) /* Bit 20 */
+#define HRTIM_TIMRST1_EXTEVNT1      (1 << 21) /* Bit 21 */
+#define HRTIM_TIMRST1_EXTEVNT2      (1 << 22) /* Bit 22 */
+#define HRTIM_TIMRST1_EXTEVNT3      (1 << 23) /* Bit 23 */
+#define HRTIM_TIMRST1_EXTEVNT4      (1 << 24) /* Bit 24 */
+#define HRTIM_TIMRST1_EXTEVNT5      (1 << 25) /* Bit 25 */
+#define HRTIM_TIMRST1_EXTEVNT6      (1 << 26) /* Bit 26 */
+#define HRTIM_TIMRST1_EXTEVNT7      (1 << 27) /* Bit 27 */
+#define HRTIM_TIMRST1_EXTEVNT8      (1 << 28) /* Bit 28 */
+#define HRTIM_TIMRST1_EXTEVNT9      (1 << 29) /* Bit 29 */
+#define HRTIM_TIMRST1_EXTEVNT10     (1 << 30) /* Bit 30 */
+#define HRTIM_TIMRST1_UPDATE        (1 << 31) /* Bit 31 */
+
+/* Timer X Output2 Set Register */
+
+#define HRTIM_TIMSET2_SST           (1 << 0) /* Bit 0 */
+#define HRTIM_TIMSET2_RESYNC        (1 << 1) /* Bit 1 */
+#define HRTIM_TIMSET2_PER           (1 << 2) /* Bit 2 */
+#define HRTIM_TIMSET2_CMP1          (1 << 3) /* Bit 3 */
+#define HRTIM_TIMSET2_CMP2          (1 << 4) /* Bit 4 */
+#define HRTIM_TIMSET2_CMP3          (1 << 5) /* Bit 5 */
+#define HRTIM_TIMSET2_CMP4          (1 << 6) /* Bit 6 */
+#define HRTIM_TIMSET2_MSTPER        (1 << 7) /* Bit 7 */
+#define HRTIM_TIMSET2_MSTCMP1       (1 << 8) /* Bit 8 */
+#define HRTIM_TIMSET2_MSTCMP2       (1 << 9) /* Bit 9 */
+#define HRTIM_TIMSET2_MSTCMP3       (1 << 10) /* Bit 10 */
+#define HRTIM_TIMSET2_MSTCMP4       (1 << 11) /* Bit 11 */
+#define HRTIM_TIMSET2_TIMEVNT1      (1 << 12) /* Bit 12 */
+#define HRTIM_TIMSET2_TIMEVNT2      (1 << 13) /* Bit 13 */
+#define HRTIM_TIMSET2_TIMEVNT3      (1 << 14) /* Bit 14 */
+#define HRTIM_TIMSET2_TIMEVNT4      (1 << 15) /* Bit 15 */
+#define HRTIM_TIMSET2_TIMEVNT5      (1 << 16) /* Bit 16 */
+#define HRTIM_TIMSET2_TIMEVNT6      (1 << 17) /* Bit 17 */
+#define HRTIM_TIMSET2_TIMEVNT7      (1 << 18) /* Bit 18 */
+#define HRTIM_TIMSET2_TIMEVNT8      (1 << 19) /* Bit 19 */
+#define HRTIM_TIMSET2_TIMEVNT9      (1 << 20) /* Bit 20 */
+#define HRTIM_TIMSET2_EXTEVNT1      (1 << 21) /* Bit 21 */
+#define HRTIM_TIMSET2_EXTEVNT2      (1 << 22) /* Bit 22 */
+#define HRTIM_TIMSET2_EXTEVNT3      (1 << 23) /* Bit 23 */
+#define HRTIM_TIMSET2_EXTEVNT4      (1 << 24) /* Bit 24 */
+#define HRTIM_TIMSET2_EXTEVNT5      (1 << 25) /* Bit 25 */
+#define HRTIM_TIMSET2_EXTEVNT6      (1 << 26) /* Bit 26 */
+#define HRTIM_TIMSET2_EXTEVNT7      (1 << 27) /* Bit 27 */
+#define HRTIM_TIMSET2_EXTEVNT8      (1 << 28) /* Bit 28 */
+#define HRTIM_TIMSET2_EXTEVNT9      (1 << 29) /* Bit 29 */
+#define HRTIM_TIMSET2_EXTEVNT10     (1 << 30) /* Bit 30 */
+#define HRTIM_TIMSET2_UPDATE        (1 << 31) /* Bit 31 */
+
+/* Timer X Output2 Reset Register */
+
+#define HRTIM_TIMRST2_SST           (1 << 0) /* Bit 0 */
+#define HRTIM_TIMRST2_RESYNC        (1 << 1) /* Bit 1 */
+#define HRTIM_TIMRST2_PER           (1 << 2) /* Bit 2 */
+#define HRTIM_TIMRST2_CMP1          (1 << 3) /* Bit 3 */
+#define HRTIM_TIMRST2_CMP2          (1 << 4) /* Bit 4 */
+#define HRTIM_TIMRST2_CMP3          (1 << 5) /* Bit 5 */
+#define HRTIM_TIMRST2_CMP4          (1 << 6) /* Bit 6 */
+#define HRTIM_TIMRST2_MSTPER        (1 << 7) /* Bit 7 */
+#define HRTIM_TIMRST2_MSTCMP1       (1 << 8) /* Bit 8 */
+#define HRTIM_TIMRST2_MSTCMP2       (1 << 9) /* Bit 9 */
+#define HRTIM_TIMRST2_MSTCMP3       (1 << 10) /* Bit 10 */
+#define HRTIM_TIMRST2_MSTCMP4       (1 << 11) /* Bit 11 */
+#define HRTIM_TIMRST2_TIMEVNT1      (1 << 12) /* Bit 12 */
+#define HRTIM_TIMRST2_TIMEVNT2      (1 << 13) /* Bit 13 */
+#define HRTIM_TIMRST2_TIMEVNT3      (1 << 14) /* Bit 14 */
+#define HRTIM_TIMRST2_TIMEVNT4      (1 << 15) /* Bit 15 */
+#define HRTIM_TIMRST2_TIMEVNT5      (1 << 16) /* Bit 16 */
+#define HRTIM_TIMRST2_TIMEVNT6      (1 << 17) /* Bit 17 */
+#define HRTIM_TIMRST2_TIMEVNT7      (1 << 18) /* Bit 18 */
+#define HRTIM_TIMRST2_TIMEVNT8      (1 << 19) /* Bit 19 */
+#define HRTIM_TIMRST2_TIMEVNT9      (1 << 20) /* Bit 20 */
+#define HRTIM_TIMRST2_EXTEVNT1      (1 << 21) /* Bit 21 */
+#define HRTIM_TIMRST2_EXTEVNT2      (1 << 22) /* Bit 22 */
+#define HRTIM_TIMRST2_EXTEVNT3      (1 << 23) /* Bit 23 */
+#define HRTIM_TIMRST2_EXTEVNT4      (1 << 24) /* Bit 24 */
+#define HRTIM_TIMRST2_EXTEVNT5      (1 << 25) /* Bit 25 */
+#define HRTIM_TIMRST2_EXTEVNT6      (1 << 26) /* Bit 26 */
+#define HRTIM_TIMRST2_EXTEVNT7      (1 << 27) /* Bit 27 */
+#define HRTIM_TIMRST2_EXTEVNT8      (1 << 28) /* Bit 28 */
+#define HRTIM_TIMRST2_EXTEVNT9      (1 << 29) /* Bit 29 */
+#define HRTIM_TIMRST2_EXTEVNT10     (1 << 30) /* Bit 30 */
+#define HRTIM_TIMRST2_UPDATE        (1 << 31) /* Bit 31 */
+
+/* Timer X External Event Filtering Register 1 */
+
+#define HRTIM_TIMEEF1_EE1LTCH       (1 << 0) /* Bit 0: External Event 1 Latch */
+#define HRTIM_TIMEEF1_EE1FLT_SHIFT  1        /* Bits 1-4: External Event 1 Filter */
+#define HRTIM_TIMEEF1_EE1FLT_MASK   (15 << HRTIM_TIMEEF1_EE1FLT_SHIFT)
+#  define HRTIM_TIMEEF1_EE1FLT_0    (0 << HRTIM_TIMEEF1_EE1FLT_SHIFT) /* 0000: No filtering */
+#  define HRTIM_TIMEEF1_EE1FLT_1    (1 << HRTIM_TIMEEF1_EE1FLT_SHIFT) /* 0001: Blanking from counter reset/roll-over to Compare 1 */
+#  define HRTIM_TIMEEF1_EE1FLT_2    (2 << HRTIM_TIMEEF1_EE1FLT_SHIFT) /* 0010: Blanking from counter reset/roll-over to Compare 2 */
+#  define HRTIM_TIMEEF1_EE1FLT_3    (3 << HRTIM_TIMEEF1_EE1FLT_SHIFT) /* 0011: Blanking from counter reset/roll-over to Compare 3 */
+#  define HRTIM_TIMEEF1_EE1FLT_4    (4 << HRTIM_TIMEEF1_EE1FLT_SHIFT) /* 0100: Blanking from counter reset/roll-over to Compare 4 */
+#  define HRTIM_TIMEEF1_EE1FLT_5    (5 << HRTIM_TIMEEF1_EE1FLT_SHIFT) /* 0101: Blanking from TIMFLTR1 source */
+#  define HRTIM_TIMEEF1_EE1FLT_6    (6 << HRTIM_TIMEEF1_EE1FLT_SHIFT) /* 0110: Blanking from TIMFLTR2 source */
+#  define HRTIM_TIMEEF1_EE1FLT_7    (7 << HRTIM_TIMEEF1_EE1FLT_SHIFT) /* 0111: Blanking from TIMFLTR3 source */
+#  define HRTIM_TIMEEF1_EE1FLT_8    (8 << HRTIM_TIMEEF1_EE1FLT_SHIFT) /* 1000: Blanking from TIMFLTR4 source */
+#  define HRTIM_TIMEEF1_EE1FLT_9    (9 << HRTIM_TIMEEF1_EE1FLT_SHIFT) /* 1001: Blanking from TIMFLTR5 source */
+#  define HRTIM_TIMEEF1_EE1FLT_10   (10 << HRTIM_TIMEEF1_EE1FLT_SHIFT) /* 1010: Blanking from TIMFLTR6 source */
+#  define HRTIM_TIMEEF1_EE1FLT_11   (11 << HRTIM_TIMEEF1_EE1FLT_SHIFT) /* 1011: Blanking from TIMFLTR7 source */
+#  define HRTIM_TIMEEF1_EE1FLT_12   (12 << HRTIM_TIMEEF1_EE1FLT_SHIFT) /* 1100: Blanking from TIMFLTR8 source */
+#  define HRTIM_TIMEEF1_EE1FLT_13   (13 << HRTIM_TIMEEF1_EE1FLT_SHIFT) /* 1101: Windowing from counter reset/roll-over to Compare 2 */
+#  define HRTIM_TIMEEF1_EE1FLT_14   (14 << HRTIM_TIMEEF1_EE1FLT_SHIFT) /* 1110: Windowing from counter reset/roll-over to Compare 3 */
+#  define HRTIM_TIMEEF1_EE1FLT_15   (15 << HRTIM_TIMEEF1_EE1FLT_SHIFT) /* 1111: Windowing from TIMWIN source */
+#define HRTIM_TIMEEF1_EE2LTCH       (1 << 6) /* Bit 6: External Event 2 Lack */
+#define HRTIM_TIMEEF1_EE2FLT_SHIFT  7        /* Bits 7-10: Externl Event 2 Filter */
+#define HRTIM_TIMEEF1_EE2FLT_MASK   (15 << HRTIM_TIMEEF1_EE2FLT_SHIFT)
+#  define HRTIM_TIMEEF1_EE2FLT_0    (0 << HRTIM_TIMEEF1_EE2FLT_SHIFT) /* 0000: No filtering */
+#  define HRTIM_TIMEEF1_EE2FLT_1    (1 << HRTIM_TIMEEF1_EE2FLT_SHIFT) /* 0001: Blanking from counter reset/roll-over to Compare 1 */
+#  define HRTIM_TIMEEF1_EE2FLT_2    (2 << HRTIM_TIMEEF1_EE2FLT_SHIFT) /* 0010: Blanking from counter reset/roll-over to Compare 2 */
+#  define HRTIM_TIMEEF1_EE2FLT_2    (3 << HRTIM_TIMEEF1_EE2FLT_SHIFT) /* 0011: Blanking from counter reset/roll-over to Compare 3 */
+#  define HRTIM_TIMEEF1_EE2FLT_4    (4 << HRTIM_TIMEEF1_EE2FLT_SHIFT) /* 0100: Blanking from counter reset/roll-over to Compare 4 */
+#  define HRTIM_TIMEEF1_EE2FLT_5    (5 << HRTIM_TIMEEF1_EE2FLT_SHIFT) /* 0101: Blanking from TIMFLTR1 source */
+#  define HRTIM_TIMEEF1_EE2FLT_6    (6 << HRTIM_TIMEEF1_EE2FLT_SHIFT) /* 0110: Blanking from TIMFLTR2 source */
+#  define HRTIM_TIMEEF1_EE2FLT_7    (7 << HRTIM_TIMEEF1_EE2FLT_SHIFT) /* 0111: Blanking from TIMFLTR3 source */
+#  define HRTIM_TIMEEF1_EE2FLT_8    (8 << HRTIM_TIMEEF1_EE2FLT_SHIFT) /* 1000: Blanking from TIMFLTR4 source */
+#  define HRTIM_TIMEEF1_EE2FLT_9    (9 << HRTIM_TIMEEF1_EE2FLT_SHIFT) /* 1001: Blanking from TIMFLTR5 source */
+#  define HRTIM_TIMEEF1_EE2FLT_10   (10 << HRTIM_TIMEEF1_EE2FLT_SHIFT) /* 1010: Blanking from TIMFLTR6 source */
+#  define HRTIM_TIMEEF1_EE2FLT_11   (11 << HRTIM_TIMEEF1_EE2FLT_SHIFT) /* 1011: Blanking from TIMFLTR7 source */
+#  define HRTIM_TIMEEF1_EE2FLT_12   (12 << HRTIM_TIMEEF1_EE2FLT_SHIFT) /* 1100: Blanking from TIMFLTR8 source */
+#  define HRTIM_TIMEEF1_EE2FLT_13   (13 << HRTIM_TIMEEF1_EE2FLT_SHIFT) /* 1101: Windowing from counter reset/roll-over to Compare 2 */
+#  define HRTIM_TIMEEF1_EE2FLT_14   (14 << HRTIM_TIMEEF1_EE2FLT_SHIFT) /* 1110: Windowing from counter reset/roll-over to Compare 3 */
+#  define HRTIM_TIMEEF1_EE2FLT_15   (15 << HRTIM_TIMEEF1_EE2FLT_SHIFT) /* 1111: Windowing from TIMWIN source */
+#define HRTIM_TIMEEF1_EE3LTCH       (1 << 12) /* Bit 12: External Event 3 Lack */
+#define HRTIM_TIMEEF1_EE3FLT_SHIFT  13         /* Bits 13-16: Externl Event 3 Filter */
+#define HRTIM_TIMEEF1_EE3FLT_MASK   (15 << HRTIM_TIMEEF1_EE3FLT_SHIFT)
+#  define HRTIM_TIMEEF1_EE3FLT_0    (0 << HRTIM_TIMEEF1_EE3FLT_SHIFT) /* 0000: No filtering */
+#  define HRTIM_TIMEEF1_EE3FLT_1    (1 << HRTIM_TIMEEF1_EE3FLT_SHIFT) /* 0001: Blanking from counter reset/roll-over to Compare 1 */
+#  define HRTIM_TIMEEF1_EE3FLT_2    (2 << HRTIM_TIMEEF1_EE3FLT_SHIFT) /* 0010: Blanking from counter reset/roll-over to Compare 2 */
+#  define HRTIM_TIMEEF1_EE3FLT_3    (3 << HRTIM_TIMEEF1_EE3FLT_SHIFT) /* 0011: Blanking from counter reset/roll-over to Compare 3 */
+#  define HRTIM_TIMEEF1_EE3FLT_4    (4 << HRTIM_TIMEEF1_EE3FLT_SHIFT) /* 0100: Blanking from counter reset/roll-over to Compare 4 */
+#  define HRTIM_TIMEEF1_EE3FLT_5    (5 << HRTIM_TIMEEF1_EE3FLT_SHIFT) /* 0101: Blanking from TIMFLTR1 source */
+#  define HRTIM_TIMEEF1_EE3FLT_6    (6 << HRTIM_TIMEEF1_EE3FLT_SHIFT) /* 0110: Blanking from TIMFLTR2 source */
+#  define HRTIM_TIMEEF1_EE3FLT_7    (7 << HRTIM_TIMEEF1_EE3FLT_SHIFT) /* 0111: Blanking from TIMFLTR3 source */
+#  define HRTIM_TIMEEF1_EE3FLT_8    (8 << HRTIM_TIMEEF1_EE3FLT_SHIFT) /* 1000: Blanking from TIMFLTR4 source */
+#  define HRTIM_TIMEEF1_EE3FLT_9    (9 << HRTIM_TIMEEF1_EE3FLT_SHIFT) /* 1001: Blanking from TIMFLTR5 source */
+#  define HRTIM_TIMEEF1_EE3FLT_10   (10 << HRTIM_TIMEEF1_EE3FLT_SHIFT) /* 1010: Blanking from TIMFLTR6 source */
+#  define HRTIM_TIMEEF1_EE3FLT_11   (11 << HRTIM_TIMEEF1_EE3FLT_SHIFT) /* 1011: Blanking from TIMFLTR7 source */
+#  define HRTIM_TIMEEF1_EE3FLT_12   (12 << HRTIM_TIMEEF1_EE3FLT_SHIFT) /* 1100: Blanking from TIMFLTR8 source */
+#  define HRTIM_TIMEEF1_EE3FLT_13   (13 << HRTIM_TIMEEF1_EE3FLT_SHIFT) /* 1101: Windowing from counter reset/roll-over to Compare 2 */
+#  define HRTIM_TIMEEF1_EE3FLT_14   (14 << HRTIM_TIMEEF1_EE3FLT_SHIFT) /* 1110: Windowing from counter reset/roll-over to Compare 3 */
+#  define HRTIM_TIMEEF1_EE3FLT_15   (15 << HRTIM_TIMEEF1_EE3FLT_SHIFT) /* 1111: Windowing from TIMWIN source */
+#define HRTIM_TIMEEF1_EE4LTCH       (1 << 18) /* Bit 18: External Event 4 Lack */
+#define HRTIM_TIMEEF1_EE4FLT_SHIFT  19         /* Bits 19-22: Externl Event 4 Filter */
+#define HRTIM_TIMEEF1_EE4FLT_MASK   (15 << HRTIM_TIMEEF1_EE4FLT_SHIFT)
+#  define HRTIM_TIMEEF1_EE4FLT_0    (0 << HRTIM_TIMEEF1_EE4FLT_SHIFT) /* 0000: No filtering */
+#  define HRTIM_TIMEEF1_EE4FLT_1    (1 << HRTIM_TIMEEF1_EE4FLT_SHIFT) /* 0001: Blanking from counter reset/roll-over to Compare 1 */
+#  define HRTIM_TIMEEF1_EE4FLT_2    (2 << HRTIM_TIMEEF1_EE4FLT_SHIFT) /* 0010: Blanking from counter reset/roll-over to Compare 2 */
+#  define HRTIM_TIMEEF1_EE4FLT_3    (3 << HRTIM_TIMEEF1_EE4FLT_SHIFT) /* 0011: Blanking from counter reset/roll-over to Compare 3 */
+#  define HRTIM_TIMEEF1_EE4FLT_4    (4 << HRTIM_TIMEEF1_EE4FLT_SHIFT) /* 0100: Blanking from counter reset/roll-over to Compare 4 */
+#  define HRTIM_TIMEEF1_EE4FLT_5    (5 << HRTIM_TIMEEF1_EE4FLT_SHIFT) /* 0101: Blanking from TIMFLTR1 source */
+#  define HRTIM_TIMEEF1_EE4FLT_6    (6 << HRTIM_TIMEEF1_EE4FLT_SHIFT) /* 0110: Blanking from TIMFLTR2 source */
+#  define HRTIM_TIMEEF1_EE4FLT_7    (7 << HRTIM_TIMEEF1_EE4FLT_SHIFT) /* 0111: Blanking from TIMFLTR3 source */
+#  define HRTIM_TIMEEF1_EE4FLT_8    (8 << HRTIM_TIMEEF1_EE4FLT_SHIFT) /* 1000: Blanking from TIMFLTR4 source */
+#  define HRTIM_TIMEEF1_EE4FLT_9    (9 << HRTIM_TIMEEF1_EE4FLT_SHIFT) /* 1001: Blanking from TIMFLTR5 source */
+#  define HRTIM_TIMEEF1_EE4FLT_10   (10 << HRTIM_TIMEEF1_EE4FLT_SHIFT) /* 1010: Blanking from TIMFLTR6 source */
+#  define HRTIM_TIMEEF1_EE4FLT_11   (11 << HRTIM_TIMEEF1_EE4FLT_SHIFT) /* 1011: Blanking from TIMFLTR7 source */
+#  define HRTIM_TIMEEF1_EE4FLT_12   (12 << HRTIM_TIMEEF1_EE4FLT_SHIFT) /* 1100: Blanking from TIMFLTR8 source */
+#  define HRTIM_TIMEEF1_EE4FLT_13   (13 << HRTIM_TIMEEF1_EE4FLT_SHIFT) /* 1101: Windowing from counter reset/roll-over to Compare 2 */
+#  define HRTIM_TIMEEF1_EE4FLT_14   (14 << HRTIM_TIMEEF1_EE4FLT_SHIFT) /* 1110: Windowing from counter reset/roll-over to Compare 3 */
+#  define HRTIM_TIMEEF1_EE4FLT_15   (15 << HRTIM_TIMEEF1_EE4FLT_SHIFT) /* 1111: Windowing from TIMWIN source */
+#define HRTIM_TIMEEF1_EE5LTCH       (1 << 24) /* Bit 24: External Event 5 Lack */
+#define HRTIM_TIMEEF1_EE5FLT_SHIFT  25        /* Bits 25-28: Externl Event 5 Filter */
+#define HRTIM_TIMEEF1_EE5FLT_MASK   (15 << HRTIM_TIMEEF1_EE5FLT_SHIFT)
+#  define HRTIM_TIMEEF1_EE5FLT_0    (0 << HRTIM_TIMEEF1_EE5FLT_SHIFT) /* 0000: No filtering */
+#  define HRTIM_TIMEEF1_EE5FLT_1    (1 << HRTIM_TIMEEF1_EE5FLT_SHIFT) /* 0001: Blanking from counter reset/roll-over to Compare 1 */
+#  define HRTIM_TIMEEF1_EE5FLT_2    (2 << HRTIM_TIMEEF1_EE5FLT_SHIFT) /* 0010: Blanking from counter reset/roll-over to Compare 2 */
+#  define HRTIM_TIMEEF1_EE5FLT_3    (3 << HRTIM_TIMEEF1_EE5FLT_SHIFT) /* 0011: Blanking from counter reset/roll-over to Compare 3 */
+#  define HRTIM_TIMEEF1_EE5FLT_4    (4 << HRTIM_TIMEEF1_EE5FLT_SHIFT) /* 0100: Blanking from counter reset/roll-over to Compare 4 */
+#  define HRTIM_TIMEEF1_EE5FLT_5    (5 << HRTIM_TIMEEF1_EE5FLT_SHIFT) /* 0101: Blanking from TIMFLTR1 source */
+#  define HRTIM_TIMEEF1_EE5FLT_6    (6 << HRTIM_TIMEEF1_EE5FLT_SHIFT) /* 0110: Blanking from TIMFLTR2 source */
+#  define HRTIM_TIMEEF1_EE5FLT_7    (7 << HRTIM_TIMEEF1_EE5FLT_SHIFT) /* 0111: Blanking from TIMFLTR3 source */
+#  define HRTIM_TIMEEF1_EE5FLT_8    (8 << HRTIM_TIMEEF1_EE5FLT_SHIFT) /* 1000: Blanking from TIMFLTR4 source */
+#  define HRTIM_TIMEEF1_EE5FLT_9    (9 << HRTIM_TIMEEF1_EE5FLT_SHIFT) /* 1001: Blanking from TIMFLTR5 source */
+#  define HRTIM_TIMEEF1_EE5FLT_10   (10 << HRTIM_TIMEEF1_EE5FLT_SHIFT) /* 1010: Blanking from TIMFLTR6 source */
+#  define HRTIM_TIMEEF1_EE5FLT_11   (11 << HRTIM_TIMEEF1_EE5FLT_SHIFT) /* 1011: Blanking from TIMFLTR7 source */
+#  define HRTIM_TIMEEF1_EE5FLT_12   (12 << HRTIM_TIMEEF1_EE5FLT_SHIFT) /* 1100: Blanking from TIMFLTR8 source */
+#  define HRTIM_TIMEEF1_EE5FLT_13   (13 << HRTIM_TIMEEF1_EE5FLT_SHIFT) /* 1101: Windowing from counter reset/roll-over to Compare 2 */
+#  define HRTIM_TIMEEF1_EE5FLT_14   (14 << HRTIM_TIMEEF1_EE5FLT_SHIFT) /* 1110: Windowing from counter reset/roll-over to Compare 3 */
+#  define HRTIM_TIMEEF1_EE5FLT_15   (15 << HRTIM_TIMEEF1_EE5FLT_SHIFT) /* 1111: Windowing from TIMWIN source */
+
+/* Timer X External Event Filtering Register 2 */
+
+#define HRTIM_TIMEEF2_EE6LTCH       (1 << 0) /* Bit 0 */
+#define HRTIM_TIMEEF2_EE6FLT_SHIFT  1        /* Bits 1-4 */
+#define HRTIM_TIMEEF2_EE6FLT_MASK   (15 << HRTIM_TIMEEF2_EE6FLT_SHIFT)
+#  define HRTIM_TIMEEF2_EE6FLT_0    (0 << HRTIM_TIMEEF2_EE6FLT_SHIFT) /* 0000: No filtering */
+#  define HRTIM_TIMEEF2_EE6FLT_1    (1 << HRTIM_TIMEEF2_EE6FLT_SHIFT) /* 0001: Blanking from counter reset/roll-over to Compare 1 */
+#  define HRTIM_TIMEEF2_EE6FLT_2    (2 << HRTIM_TIMEEF2_EE6FLT_SHIFT) /* 0010: Blanking from counter reset/roll-over to Compare 2 */
+#  define HRTIM_TIMEEF2_EE6FLT_3    (3 << HRTIM_TIMEEF2_EE6FLT_SHIFT) /* 0011: Blanking from counter reset/roll-over to Compare 3 */
+#  define HRTIM_TIMEEF2_EE6FLT_4    (4 << HRTIM_TIMEEF2_EE6FLT_SHIFT) /* 0100: Blanking from counter reset/roll-over to Compare 4 */
+#  define HRTIM_TIMEEF2_EE6FLT_5    (5 << HRTIM_TIMEEF2_EE6FLT_SHIFT) /* 0101: Blanking from TIMFLTR1 source */
+#  define HRTIM_TIMEEF2_EE6FLT_6    (6 << HRTIM_TIMEEF2_EE6FLT_SHIFT) /* 0110: Blanking from TIMFLTR2 source */
+#  define HRTIM_TIMEEF2_EE6FLT_7    (7 << HRTIM_TIMEEF2_EE6FLT_SHIFT) /* 0111: Blanking from TIMFLTR3 source */
+#  define HRTIM_TIMEEF2_EE6FLT_8    (8 << HRTIM_TIMEEF2_EE6FLT_SHIFT) /* 1000: Blanking from TIMFLTR4 source */
+#  define HRTIM_TIMEEF2_EE6FLT_9    (9 << HRTIM_TIMEEF2_EE6FLT_SHIFT) /* 1001: Blanking from TIMFLTR5 source */
+#  define HRTIM_TIMEEF2_EE6FLT_10   (10 << HRTIM_TIMEEF2_EE6FLT_SHIFT) /* 1010: Blanking from TIMFLTR6 source */
+#  define HRTIM_TIMEEF2_EE6FLT_11   (11 << HRTIM_TIMEEF2_EE6FLT_SHIFT) /* 1011: Blanking from TIMFLTR7 source */
+#  define HRTIM_TIMEEF2_EE6FLT_12   (12 << HRTIM_TIMEEF2_EE6FLT_SHIFT) /* 1100: Blanking from TIMFLTR8 source */
+#  define HRTIM_TIMEEF2_EE6FLT_13   (13 << HRTIM_TIMEEF2_EE6FLT_SHIFT) /* 1101: Windowing from counter reset/roll-over to Compare 2 */
+#  define HRTIM_TIMEEF2_EE6FLT_14   (14 << HRTIM_TIMEEF2_EE6FLT_SHIFT) /* 1110: Windowing from counter reset/roll-over to Compare 3 */
+#  define HRTIM_TIMEEF2_EE6FLT_15   (15 << HRTIM_TIMEEF2_EE6FLT_SHIFT) /* 1111: Windowing from TIMWIN source */
+#define HRTIM_TIMEEF2_EE7LTCH       (1 << 6) /* Bit 6 */
+#define HRTIM_TIMEEF2_EE7FLT_SHIFT  7        /* Bits 7-10 */
+#define HRTIM_TIMEEF2_EE7FLT_MASK   (15 << HRTIM_TIMEEF2_EE7FLT_SHIFT)
+#  define HRTIM_TIMEEF2_EE7FLT_0    (0 << HRTIM_TIMEEF2_EE7FLT_SHIFT) /* 0000: No filtering */
+#  define HRTIM_TIMEEF2_EE7FLT_1    (1 << HRTIM_TIMEEF2_EE7FLT_SHIFT) /* 0001: Blanking from counter reset/roll-over to Compare 1 */
+#  define HRTIM_TIMEEF2_EE7FLT_2    (2 << HRTIM_TIMEEF2_EE7FLT_SHIFT) /* 0010: Blanking from counter reset/roll-over to Compare 2 */
+#  define HRTIM_TIMEEF2_EE7FLT_3    (3 << HRTIM_TIMEEF2_EE7FLT_SHIFT) /* 0011: Blanking from counter reset/roll-over to Compare 3 */
+#  define HRTIM_TIMEEF2_EE7FLT_4    (4 << HRTIM_TIMEEF2_EE7FLT_SHIFT) /* 0100: Blanking from counter reset/roll-over to Compare 4 */
+#  define HRTIM_TIMEEF2_EE7FLT_5    (5 << HRTIM_TIMEEF2_EE7FLT_SHIFT) /* 0101: Blanking from TIMFLTR1 source */
+#  define HRTIM_TIMEEF2_EE7FLT_6    (6 << HRTIM_TIMEEF2_EE7FLT_SHIFT) /* 0110: Blanking from TIMFLTR2 source */
+#  define HRTIM_TIMEEF2_EE7FLT_7    (7 << HRTIM_TIMEEF2_EE7FLT_SHIFT) /* 0111: Blanking from TIMFLTR3 source */
+#  define HRTIM_TIMEEF2_EE7FLT_8    (8 << HRTIM_TIMEEF2_EE7FLT_SHIFT) /* 1000: Blanking from TIMFLTR4 source */
+#  define HRTIM_TIMEEF2_EE7FLT_9    (9 << HRTIM_TIMEEF2_EE7FLT_SHIFT) /* 1001: Blanking from TIMFLTR5 source */
+#  define HRTIM_TIMEEF2_EE7FLT_10   (10 << HRTIM_TIMEEF2_EE7FLT_SHIFT) /* 1010: Blanking from TIMFLTR6 source */
+#  define HRTIM_TIMEEF2_EE7FLT_11   (11 << HRTIM_TIMEEF2_EE7FLT_SHIFT) /* 1011: Blanking from TIMFLTR7 source */
+#  define HRTIM_TIMEEF2_EE7FLT_12   (12 << HRTIM_TIMEEF2_EE7FLT_SHIFT) /* 1100: Blanking from TIMFLTR8 source */
+#  define HRTIM_TIMEEF2_EE7FLT_13   (13 << HRTIM_TIMEEF2_EE7FLT_SHIFT) /* 1101: Windowing from counter reset/roll-over to Compare 2 */
+#  define HRTIM_TIMEEF2_EE7FLT_14   (14 << HRTIM_TIMEEF2_EE7FLT_SHIFT) /* 1110: Windowing from counter reset/roll-over to Compare 3 */
+#  define HRTIM_TIMEEF2_EE7FLT_15   (15 << HRTIM_TIMEEF2_EE7FLT_SHIFT) /* 1111: Windowing from TIMWIN source */
+#define HRTIM_TIMEEF2_EE8LTCH       (1 << 12) /* Bit 12 */
+#define HRTIM_TIMEEF2_EE8FLT_SHIFT  13         /* Bits 13-16 */
+#define HRTIM_TIMEEF2_EE8FLT_MASK   (15 << HRTIM_TIMEEF2_EE8FLT_SHIFT)
+#  define HRTIM_TIMEEF2_EE8FLT_0    (0 << HRTIM_TIMEEF2_EE8FLT_SHIFT) /* 0000: No filtering */
+#  define HRTIM_TIMEEF2_EE8FLT_1    (1 << HRTIM_TIMEEF2_EE8FLT_SHIFT) /* 0001: Blanking from counter reset/roll-over to Compare 1 */
+#  define HRTIM_TIMEEF2_EE8FLT_2    (2 << HRTIM_TIMEEF2_EE8FLT_SHIFT) /* 0010: Blanking from counter reset/roll-over to Compare 2 */
+#  define HRTIM_TIMEEF2_EE8FLT_3    (3 << HRTIM_TIMEEF2_EE8FLT_SHIFT) /* 0011: Blanking from counter reset/roll-over to Compare 3 */
+#  define HRTIM_TIMEEF2_EE8FLT_4    (4 << HRTIM_TIMEEF2_EE8FLT_SHIFT) /* 0100: Blanking from counter reset/roll-over to Compare 4 */
+#  define HRTIM_TIMEEF2_EE8FLT_5    (5 << HRTIM_TIMEEF2_EE8FLT_SHIFT) /* 0101: Blanking from TIMFLTR1 source */
+#  define HRTIM_TIMEEF2_EE8FLT_6    (6 << HRTIM_TIMEEF2_EE8FLT_SHIFT) /* 0110: Blanking from TIMFLTR2 source */
+#  define HRTIM_TIMEEF2_EE8FLT_7    (7 << HRTIM_TIMEEF2_EE8FLT_SHIFT) /* 0111: Blanking from TIMFLTR3 source */
+#  define HRTIM_TIMEEF2_EE8FLT_8    (8 << HRTIM_TIMEEF2_EE8FLT_SHIFT) /* 1000: Blanking from TIMFLTR4 source */
+#  define HRTIM_TIMEEF2_EE8FLT_9    (9 << HRTIM_TIMEEF2_EE8FLT_SHIFT) /* 1001: Blanking from TIMFLTR5 source */
+#  define HRTIM_TIMEEF2_EE8FLT_10   (10 << HRTIM_TIMEEF2_EE8FLT_SHIFT) /* 1010: Blanking from TIMFLTR6 source */
+#  define HRTIM_TIMEEF2_EE8FLT_11   (11 << HRTIM_TIMEEF2_EE8FLT_SHIFT) /* 1011: Blanking from TIMFLTR7 source */
+#  define HRTIM_TIMEEF2_EE8FLT_12   (12 << HRTIM_TIMEEF2_EE8FLT_SHIFT) /* 1100: Blanking from TIMFLTR8 source */
+#  define HRTIM_TIMEEF2_EE8FLT_13   (13 << HRTIM_TIMEEF2_EE8FLT_SHIFT) /* 1101: Windowing from counter reset/roll-over to Compare 2 */
+#  define HRTIM_TIMEEF2_EE8FLT_14   (14 << HRTIM_TIMEEF2_EE8FLT_SHIFT) /* 1110: Windowing from counter reset/roll-over to Compare 3 */
+#  define HRTIM_TIMEEF2_EE8FLT_15   (15 << HRTIM_TIMEEF2_EE8FLT_SHIFT) /* 1111: Windowing from TIMWIN source */
+#define HRTIM_TIMEEF2_EE9LTCH       (1 << 18) /* Bit 18 */
+#define HRTIM_TIMEEF2_EE9FLT_SHIFT  19         /* Bits 19-22 */
+#define HRTIM_TIMEEF2_EE9FLT_MASK   (15 << HRTIM_TIMEEF2_EE9FLT_SHIFT)
+#  define HRTIM_TIMEEF2_EE9FLT_0    (0 << HRTIM_TIMEEF2_EE9FLT_SHIFT) /* 0000: No filtering */
+#  define HRTIM_TIMEEF2_EE9FLT_1    (1 << HRTIM_TIMEEF2_EE9FLT_SHIFT) /* 0001: Blanking from counter reset/roll-over to Compare 1 */
+#  define HRTIM_TIMEEF2_EE9FLT_2    (2 << HRTIM_TIMEEF2_EE9FLT_SHIFT) /* 0010: Blanking from counter reset/roll-over to Compare 2 */
+#  define HRTIM_TIMEEF2_EE9FLT_3    (3 << HRTIM_TIMEEF2_EE9FLT_SHIFT) /* 0011: Blanking from counter reset/roll-over to Compare 3 */
+#  define HRTIM_TIMEEF2_EE9FLT_4    (4 << HRTIM_TIMEEF2_EE9FLT_SHIFT) /* 0100: Blanking from counter reset/roll-over to Compare 4 */
+#  define HRTIM_TIMEEF2_EE9FLT_5    (5 << HRTIM_TIMEEF2_EE9FLT_SHIFT) /* 0101: Blanking from TIMFLTR1 source */
+#  define HRTIM_TIMEEF2_EE9FLT_6    (6 << HRTIM_TIMEEF2_EE9FLT_SHIFT) /* 0110: Blanking from TIMFLTR2 source */
+#  define HRTIM_TIMEEF2_EE9FLT_7    (7 << HRTIM_TIMEEF2_EE9FLT_SHIFT) /* 0111: Blanking from TIMFLTR3 source */
+#  define HRTIM_TIMEEF2_EE9FLT_8    (8 << HRTIM_TIMEEF2_EE9FLT_SHIFT) /* 1000: Blanking from TIMFLTR4 source */
+#  define HRTIM_TIMEEF2_EE9FLT_9    (9 << HRTIM_TIMEEF2_EE9FLT_SHIFT) /* 1001: Blanking from TIMFLTR5 source */
+#  define HRTIM_TIMEEF2_EE9FLT_10   (10 << HRTIM_TIMEEF2_EE9FLT_SHIFT) /* 1010: Blanking from TIMFLTR6 source */
+#  define HRTIM_TIMEEF2_EE9FLT_11   (11 << HRTIM_TIMEEF2_EE9FLT_SHIFT) /* 1011: Blanking from TIMFLTR7 source */
+#  define HRTIM_TIMEEF2_EE9FLT_12   (12 << HRTIM_TIMEEF2_EE9FLT_SHIFT) /* 1100: Blanking from TIMFLTR8 source */
+#  define HRTIM_TIMEEF2_EE9FLT_13   (13 << HRTIM_TIMEEF2_EE9FLT_SHIFT) /* 1101: Windowing from counter reset/roll-over to Compare 2 */
+#  define HRTIM_TIMEEF2_EE9FLT_14   (14 << HRTIM_TIMEEF2_EE9FLT_SHIFT) /* 1110: Windowing from counter reset/roll-over to Compare 3 */
+#  define HRTIM_TIMEEF2_EE9FLT_15   (15 << HRTIM_TIMEEF2_EE9FLT_SHIFT) /* 1111: Windowing from TIMWIN source */
+#define HRTIM_TIMEEF2_EE10LTCH      (1 << 24) /* Bit 24 */
+#define HRTIM_TIMEEF2_EE10FLT_SHIFT 25        /* Bits 25-28 */
+#define HRTIM_TIMEEF2_EE10FLT_MASK  (15 << HRTIM_TIMEEF2_EE10FLT_SHIFT)
+#  define HRTIM_TIMEEF2_EE10FLT_0   (0 << HRTIM_TIMEEF2_EE10FLT_SHIFT) /* 0000: No filtering */
+#  define HRTIM_TIMEEF2_EE10FLT_1   (1 << HRTIM_TIMEEF2_EE10FLT_SHIFT) /* 0001: Blanking from counter reset/roll-over to Compare 1 */
+#  define HRTIM_TIMEEF2_EE10FLT_2   (2 << HRTIM_TIMEEF2_EE10FLT_SHIFT) /* 0010: Blanking from counter reset/roll-over to Compare 2 */
+#  define HRTIM_TIMEEF2_EE10FLT_3   (3 << HRTIM_TIMEEF2_EE10FLT_SHIFT) /* 0011: Blanking from counter reset/roll-over to Compare 3 */
+#  define HRTIM_TIMEEF2_EE10FLT_4   (4 << HRTIM_TIMEEF2_EE10FLT_SHIFT) /* 0100: Blanking from counter reset/roll-over to Compare 4 */
+#  define HRTIM_TIMEEF2_EE10FLT_5   (5 << HRTIM_TIMEEF2_EE10FLT_SHIFT) /* 0101: Blanking from TIMFLTR1 source */
+#  define HRTIM_TIMEEF2_EE10FLT_6   (6 << HRTIM_TIMEEF2_EE10FLT_SHIFT) /* 0110: Blanking from TIMFLTR2 source */
+#  define HRTIM_TIMEEF2_EE10FLT_7   (7 << HRTIM_TIMEEF2_EE10FLT_SHIFT) /* 0111: Blanking from TIMFLTR3 source */
+#  define HRTIM_TIMEEF2_EE10FLT_8   (8 << HRTIM_TIMEEF2_EE10FLT_SHIFT) /* 1000: Blanking from TIMFLTR4 source */
+#  define HRTIM_TIMEEF2_EE10FLT_9   (9 << HRTIM_TIMEEF2_EE10FLT_SHIFT) /* 1001: Blanking from TIMFLTR5 source */
+#  define HRTIM_TIMEEF2_EE10FLT_10  (10 << HRTIM_TIMEEF2_EE10FLT_SHIFT) /* 1010: Blanking from TIMFLTR6 source */
+#  define HRTIM_TIMEEF2_EE10FLT_11  (11 << HRTIM_TIMEEF2_EE10FLT_SHIFT) /* 1011: Blanking from TIMFLTR7 source */
+#  define HRTIM_TIMEEF2_EE10FLT_12  (12 << HRTIM_TIMEEF2_EE10FLT_SHIFT) /* 1100: Blanking from TIMFLTR8 source */
+#  define HRTIM_TIMEEF2_EE10FLT_13  (13 << HRTIM_TIMEEF2_EE10FLT_SHIFT) /* 1101: Windowing from counter reset/roll-over to Compare 2 */
+#  define HRTIM_TIMEEF2_EE10FLT_14  (14 << HRTIM_TIMEEF2_EE10FLT_SHIFT) /* 1110: Windowing from counter reset/roll-over to Compare 3 */
+#  define HRTIM_TIMEEF2_EE10FLT_15  (15 << HRTIM_TIMEEF2_EE10FLT_SHIFT) /* 1111: Windowing from TIMWIN source */
+
+/* Timer X Reset Register */
+
+#define HRTIM_TIMARST_UPDT            (1 << 1) /* Bit 1 */
+#define HRTIM_TIMARST_CMP2            (1 << 2) /* Bit 2 */
+#define HRTIM_TIMARST_CMP4            (1 << 3) /* Bit 3 */
+#define HRTIM_TIMARST_MSTPER          (1 << 4) /* Bit 4 */
+#define HRTIM_TIMARST_MSTCMP1         (1 << 5) /* Bit 5 */
+#define HRTIM_TIMARST_MSTCMP2         (1 << 6) /* Bit 6 */
+#define HRTIM_TIMARST_MSTCMP3         (1 << 7) /* Bit 7 */
+#define HRTIM_TIMARST_MSTCMP4         (1 << 8) /* Bit 8 */
+#define HRTIM_TIMARST_EXTEVNT1        (1 << 9) /* Bit 9 */
+#define HRTIM_TIMARST_EXTEVNT2        (1 << 10) /* Bit 10 */
+#define HRTIM_TIMARST_EXTEVNT3        (1 << 11) /* Bit 11 */
+#define HRTIM_TIMARST_EXTEVNT4        (1 << 12) /* Bit 12 */
+#define HRTIM_TIMARST_EXTEVNT5        (1 << 13) /* Bit 13 */
+#define HRTIM_TIMARST_EXTEVNT6        (1 << 14) /* Bit 14 */
+#define HRTIM_TIMARST_EXTEVNT7        (1 << 15) /* Bit 15 */
+#define HRTIM_TIMARST_EXTEVNT8        (1 << 16) /* Bit 16 */
+#define HRTIM_TIMARST_EXTEVNT9        (1 << 17) /* Bit 17 */
+#define HRTIM_TIMARST_EXTEVNT10       (1 << 18) /* Bit 18 */
+#define HRTIM_TIMARST_TIMBCMP1        (1 << 19) /* Bit 19 */
+#define HRTIM_TIMARST_TIMBCMP2        (1 << 20) /* Bit 20 */
+#define HRTIM_TIMARST_TIMBCMP4        (1 << 21) /* Bit 21 */
+#define HRTIM_TIMARST_TIMCCMP1        (1 << 22) /* Bit 22 */
+#define HRTIM_TIMARST_TIMCCMP2        (1 << 23) /* Bit 23 */
+#define HRTIM_TIMARST_TIMCCMP4        (1 << 24) /* Bit 24 */
+#define HRTIM_TIMARST_TIMDCMP1        (1 << 25) /* Bit 25 */
+#define HRTIM_TIMARST_TIMDCMP2        (1 << 26) /* Bit 26 */
+#define HRTIM_TIMARST_TIMDCMP3        (1 << 27) /* Bit 27 */
+#define HRTIM_TIMARST_TIMECMP1        (1 << 28) /* Bit 28 */
+#define HRTIM_TIMARST_TIMECMP2        (1 << 29) /* Bit 29 */
+#define HRTIM_TIMARST_TIMECMP4        (1 << 30) /* Bit 30 */
+
+#define HRTIM_TIMBRST_UPDT            (1 << 1) /* Bit 1 */
+#define HRTIM_TIMBRST_CMP2            (1 << 2) /* Bit 2 */
+#define HRTIM_TIMBRST_CMP4            (1 << 3) /* Bit 3 */
+#define HRTIM_TIMBRST_MSTPER          (1 << 4) /* Bit 4 */
+#define HRTIM_TIMBRST_MSTCMP1         (1 << 5) /* Bit 5 */
+#define HRTIM_TIMBRST_MSTCMP2         (1 << 6) /* Bit 6 */
+#define HRTIM_TIMBRST_MSTCMP3         (1 << 7) /* Bit 7 */
+#define HRTIM_TIMBRST_MSTCMP4         (1 << 8) /* Bit 8 */
+#define HRTIM_TIMBRST_EXTEVNT1        (1 << 9) /* Bit 9 */
+#define HRTIM_TIMBRST_EXTEVNT2        (1 << 10) /* Bit 10 */
+#define HRTIM_TIMBRST_EXTEVNT3        (1 << 11) /* Bit 11 */
+#define HRTIM_TIMBRST_EXTEVNT4        (1 << 12) /* Bit 12 */
+#define HRTIM_TIMBRST_EXTEVNT5        (1 << 13) /* Bit 13 */
+#define HRTIM_TIMBRST_EXTEVNT6        (1 << 14) /* Bit 14 */
+#define HRTIM_TIMBRST_EXTEVNT7        (1 << 15) /* Bit 15 */
+#define HRTIM_TIMBRST_EXTEVNT8        (1 << 16) /* Bit 16 */
+#define HRTIM_TIMBRST_EXTEVNT9        (1 << 17) /* Bit 17 */
+#define HRTIM_TIMBRST_EXTEVNT10       (1 << 18) /* Bit 18 */
+#define HRTIM_TIMBRST_TIMACMP1        (1 << 19) /* Bit 19 */
+#define HRTIM_TIMBRST_TIMACMP2        (1 << 20) /* Bit 20 */
+#define HRTIM_TIMBRST_TIMACMP4        (1 << 21) /* Bit 21 */
+#define HRTIM_TIMBRST_TIMCCMP1        (1 << 22) /* Bit 22 */
+#define HRTIM_TIMBRST_TIMCCMP2        (1 << 23) /* Bit 23 */
+#define HRTIM_TIMBRST_TIMCCMP4        (1 << 24) /* Bit 24 */
+#define HRTIM_TIMBRST_TIMDCMP1        (1 << 25) /* Bit 25 */
+#define HRTIM_TIMBRST_TIMDCMP2        (1 << 26) /* Bit 26 */
+#define HRTIM_TIMBRST_TIMDCMP3        (1 << 27) /* Bit 27 */
+#define HRTIM_TIMBRST_TIMECMP1        (1 << 28) /* Bit 28 */
+#define HRTIM_TIMBRST_TIMECMP2        (1 << 29) /* Bit 29 */
+#define HRTIM_TIMBRST_TIMECMP4        (1 << 30) /* Bit 30 */
+
+#define HRTIM_TIMCRST_UPDT            (1 << 1) /* Bit 1 */
+#define HRTIM_TIMCRST_CMP2            (1 << 2) /* Bit 2 */
+#define HRTIM_TIMCRST_CMP4            (1 << 3) /* Bit 3 */
+#define HRTIM_TIMCRST_MSTPER          (1 << 4) /* Bit 4 */
+#define HRTIM_TIMCRST_MSTCMP1         (1 << 5) /* Bit 5 */
+#define HRTIM_TIMCRST_MSTCMP2         (1 << 6) /* Bit 6 */
+#define HRTIM_TIMCRST_MSTCMP3         (1 << 7) /* Bit 7 */
+#define HRTIM_TIMCRST_MSTCMP4         (1 << 8) /* Bit 8 */
+#define HRTIM_TIMCRST_EXTEVNT1        (1 << 9) /* Bit 9 */
+#define HRTIM_TIMCRST_EXTEVNT2        (1 << 10) /* Bit 10 */
+#define HRTIM_TIMCRST_EXTEVNT3        (1 << 11) /* Bit 11 */
+#define HRTIM_TIMCRST_EXTEVNT4        (1 << 12) /* Bit 12 */
+#define HRTIM_TIMCRST_EXTEVNT5        (1 << 13) /* Bit 13 */
+#define HRTIM_TIMCRST_EXTEVNT6        (1 << 14) /* Bit 14 */
+#define HRTIM_TIMCRST_EXTEVNT7        (1 << 15) /* Bit 15 */
+#define HRTIM_TIMCRST_EXTEVNT8        (1 << 16) /* Bit 16 */
+#define HRTIM_TIMCRST_EXTEVNT9        (1 << 17) /* Bit 17 */
+#define HRTIM_TIMCRST_EXTEVNT10       (1 << 18) /* Bit 18 */
+#define HRTIM_TIMCRST_TIMACMP1        (1 << 19) /* Bit 19 */
+#define HRTIM_TIMCRST_TIMACMP2        (1 << 20) /* Bit 20 */
+#define HRTIM_TIMCRST_TIMACMP4        (1 << 21) /* Bit 21 */
+#define HRTIM_TIMCRST_TIMBCMP1        (1 << 22) /* Bit 22 */
+#define HRTIM_TIMCRST_TIMBCMP2        (1 << 23) /* Bit 23 */
+#define HRTIM_TIMCRST_TIMBCMP4        (1 << 24) /* Bit 24 */
+#define HRTIM_TIMCRST_TIMDCMP1        (1 << 25) /* Bit 25 */
+#define HRTIM_TIMCRST_TIMDCMP2        (1 << 26) /* Bit 26 */
+#define HRTIM_TIMCRST_TIMDCMP3        (1 << 27) /* Bit 27 */
+#define HRTIM_TIMCRST_TIMECMP1        (1 << 28) /* Bit 28 */
+#define HRTIM_TIMCRST_TIMECMP2        (1 << 29) /* Bit 29 */
+#define HRTIM_TIMCRST_TIMECMP4        (1 << 30) /* Bit 30 */
+
+#define HRTIM_TIMDRST_UPDT            (1 << 1) /* Bit 1 */
+#define HRTIM_TIMDRST_CMP2            (1 << 2) /* Bit 2 */
+#define HRTIM_TIMDRST_CMP4            (1 << 3) /* Bit 3 */
+#define HRTIM_TIMDRST_MSTPER          (1 << 4) /* Bit 4 */
+#define HRTIM_TIMDRST_MSTCMP1         (1 << 5) /* Bit 5 */
+#define HRTIM_TIMDRST_MSTCMP2         (1 << 6) /* Bit 6 */
+#define HRTIM_TIMDRST_MSTCMP3         (1 << 7) /* Bit 7 */
+#define HRTIM_TIMDRST_MSTCMP4         (1 << 8) /* Bit 8 */
+#define HRTIM_TIMDRST_EXTEVNT1        (1 << 9) /* Bit 9 */
+#define HRTIM_TIMDRST_EXTEVNT2        (1 << 10) /* Bit 10 */
+#define HRTIM_TIMDRST_EXTEVNT3        (1 << 11) /* Bit 11 */
+#define HRTIM_TIMDRST_EXTEVNT4        (1 << 12) /* Bit 12 */
+#define HRTIM_TIMDRST_EXTEVNT5        (1 << 13) /* Bit 13 */
+#define HRTIM_TIMDRST_EXTEVNT6        (1 << 14) /* Bit 14 */
+#define HRTIM_TIMDRST_EXTEVNT7        (1 << 15) /* Bit 15 */
+#define HRTIM_TIMDRST_EXTEVNT8        (1 << 16) /* Bit 16 */
+#define HRTIM_TIMDRST_EXTEVNT9        (1 << 17) /* Bit 17 */
+#define HRTIM_TIMDRST_EXTEVNT10       (1 << 18) /* Bit 18 */
+#define HRTIM_TIMDRST_TIMACMP1        (1 << 19) /* Bit 19 */
+#define HRTIM_TIMDRST_TIMACMP2        (1 << 20) /* Bit 20 */
+#define HRTIM_TIMDRST_TIMACMP4        (1 << 21) /* Bit 21 */
+#define HRTIM_TIMDRST_TIMBCMP1        (1 << 22) /* Bit 22 */
+#define HRTIM_TIMDRST_TIMBCMP2        (1 << 23) /* Bit 23 */
+#define HRTIM_TIMDRST_TIMBCMP4        (1 << 24) /* Bit 24 */
+#define HRTIM_TIMDRST_TIMCCMP1        (1 << 25) /* Bit 25 */
+#define HRTIM_TIMDRST_TIMCCMP2        (1 << 26) /* Bit 26 */
+#define HRTIM_TIMDRST_TIMCCMP3        (1 << 27) /* Bit 27 */
+#define HRTIM_TIMDRST_TIMECMP1        (1 << 28) /* Bit 28 */
+#define HRTIM_TIMDRST_TIMECMP2        (1 << 29) /* Bit 29 */
+#define HRTIM_TIMDRST_TIMECMP4        (1 << 30) /* Bit 30 */
+
+#define HRTIM_TIMERST_UPDT            (1 << 1) /* Bit 1 */
+#define HRTIM_TIMERST_CMP2            (1 << 2) /* Bit 2 */
+#define HRTIM_TIMERST_CMP4            (1 << 3) /* Bit 3 */
+#define HRTIM_TIMERST_MSTPER          (1 << 4) /* Bit 4 */
+#define HRTIM_TIMERST_MSTCMP1         (1 << 5) /* Bit 5 */
+#define HRTIM_TIMERST_MSTCMP2         (1 << 6) /* Bit 6 */
+#define HRTIM_TIMERST_MSTCMP3         (1 << 7) /* Bit 7 */
+#define HRTIM_TIMERST_MSTCMP4         (1 << 8) /* Bit 8 */
+#define HRTIM_TIMERST_EXTEVNT1        (1 << 9) /* Bit 9 */
+#define HRTIM_TIMERST_EXTEVNT2        (1 << 10) /* Bit 10 */
+#define HRTIM_TIMERST_EXTEVNT3        (1 << 11) /* Bit 11 */
+#define HRTIM_TIMERST_EXTEVNT4        (1 << 12) /* Bit 12 */
+#define HRTIM_TIMERST_EXTEVNT5        (1 << 13) /* Bit 13 */
+#define HRTIM_TIMERST_EXTEVNT6        (1 << 14) /* Bit 14 */
+#define HRTIM_TIMERST_EXTEVNT7        (1 << 15) /* Bit 15 */
+#define HRTIM_TIMERST_EXTEVNT8        (1 << 16) /* Bit 16 */
+#define HRTIM_TIMERST_EXTEVNT9        (1 << 17) /* Bit 17 */
+#define HRTIM_TIMERST_EXTEVNT10       (1 << 18) /* Bit 18 */
+#define HRTIM_TIMERST_TIMACMP1        (1 << 19) /* Bit 19 */
+#define HRTIM_TIMERST_TIMACMP2        (1 << 20) /* Bit 20 */
+#define HRTIM_TIMERST_TIMACMP4        (1 << 21) /* Bit 21 */
+#define HRTIM_TIMERST_TIMBCMP1        (1 << 22) /* Bit 22 */
+#define HRTIM_TIMERST_TIMBCMP2        (1 << 23) /* Bit 23 */
+#define HRTIM_TIMERST_TIMBCMP4        (1 << 24) /* Bit 24 */
+#define HRTIM_TIMERST_TIMCCMP1        (1 << 25) /* Bit 25 */
+#define HRTIM_TIMERST_TIMCCMP2        (1 << 26) /* Bit 26 */
+#define HRTIM_TIMERST_TIMCCMP3        (1 << 27) /* Bit 27 */
+#define HRTIM_TIMERST_TIMDCMP1        (1 << 28) /* Bit 28 */
+#define HRTIM_TIMERST_TIMDCMP2        (1 << 29) /* Bit 29 */
+#define HRTIM_TIMERST_TIMDCMP4        (1 << 30) /* Bit 30 */
+
+/* Timer X Chopper Register */
+
+#define HRTIM_TIMCHP_CARFRQ_SHIFT     0 /* Bits 0-3 */
+#define HRTIM_TIMCHP_CARFRQ_MASK      (15 << HRTIM_TIMCHP_CARFRQ_SHIFT)
+
+#define HRTIM_TIMCHP_CARDTY_SHIFT     4 /* Bits 4-6 */
+#define HRTIM_TIMCHP_CARDTY_MASK      (7 << HRTIM_TIMCHP_CARDTY_SHIFT)
+
+#define HRTIM_TIMCHP_STRTPW_SHIFT     7 /* Bits 7-10 */
+#define HRTIM_TIMCHP_STRTPW_MASK      (15 << HRTIM_TIMCHP_STRTPW_SHIFT)
+
+/* Timer X Capture 1 Control Register */
+
+#define HRTIM_TIMCPT1CR_SWCPT         (1 << 0)
+#define HRTIM_TIMCPT1CR_UPDCPT        (1 << 1)
+#define HRTIM_TIMCPT1CR_EXEV1CPT      (1 << 2)
+#define HRTIM_TIMCPT1CR_EXEV2CPT      (1 << 3)
+#define HRTIM_TIMCPT1CR_EXEV3CPT      (1 << 4)
+#define HRTIM_TIMCPT1CR_EXEV4CPT      (1 << 5)
+#define HRTIM_TIMCPT1CR_EXEV5CPT      (1 << 6)
+#define HRTIM_TIMCPT1CR_EXEV6CPT      (1 << 7)
+#define HRTIM_TIMCPT1CR_EXEV7CPT      (1 << 8)
+#define HRTIM_TIMCPT1CR_EXEV8CPT      (1 << 9)
+#define HRTIM_TIMCPT1CR_EXEV9CPT      (1 << 10)
+#define HRTIM_TIMCPT1CR_EXEV10CPT     (1 << 11)
+#define HRTIM_TIMCPT1CR_TA1SET        (1 << 12)
+#define HRTIM_TIMCPT1CR_TA1RST        (1 << 13)
+#define HRTIM_TIMCPT1CR_TACMP1        (1 << 14)
+#define HRTIM_TIMCPT1CR_TACMP2        (1 << 15)
+#define HRTIM_TIMCPT1CR_TB1SET        (1 << 16)
+#define HRTIM_TIMCPT1CR_TB1RST        (1 << 17)
+#define HRTIM_TIMCPT1CR_TBCMP1        (1 << 18)
+#define HRTIM_TIMCPT1CR_TBCMP2        (1 << 19)
+#define HRTIM_TIMCPT1CR_TC1SET        (1 << 20)
+#define HRTIM_TIMCPT1CR_TC1RST        (1 << 21)
+#define HRTIM_TIMCPT1CR_TCCMP1        (1 << 22)
+#define HRTIM_TIMCPT1CR_TCCMP2        (1 << 23)
+#define HRTIM_TIMCPT1CR_TD1SET        (1 << 24)
+#define HRTIM_TIMCPT1CR_TD1RST        (1 << 25)
+#define HRTIM_TIMCPT1CR_TDCMP1        (1 << 26)
+#define HRTIM_TIMCPT1CR_TDCMP2        (1 << 27)
+#define HRTIM_TIMCPT1CR_TE1SET        (1 << 28)
+#define HRTIM_TIMCPT1CR_TE1RST        (1 << 29)
+#define HRTIM_TIMCPT1CR_TECMP1        (1 << 30)
+#define HRTIM_TIMCPT1CR_TECMP2        (1 << 31)
+
+/* Timer X Capture 2 Control Register */
+
+#define HRTIM_TIMCPT2CR_SWCPT         (1 << 0)
+#define HRTIM_TIMCPT2CR_UPDCPT        (1 << 1)
+#define HRTIM_TIMCPT2CR_EXEV1CPT      (1 << 2)
+#define HRTIM_TIMCPT2CR_EXEV2CPT      (1 << 3)
+#define HRTIM_TIMCPT2CR_EXEV3CPT      (1 << 4)
+#define HRTIM_TIMCPT2CR_EXEV4CPT      (1 << 5)
+#define HRTIM_TIMCPT2CR_EXEV5CPT      (1 << 6)
+#define HRTIM_TIMCPT2CR_EXEV6CPT      (1 << 7)
+#define HRTIM_TIMCPT2CR_EXEV7CPT      (1 << 8)
+#define HRTIM_TIMCPT2CR_EXEV8CPT      (1 << 9)
+#define HRTIM_TIMCPT2CR_EXEV9CPT      (1 << 10)
+#define HRTIM_TIMCPT2CR_EXEV10CPT     (1 << 11)
+#define HRTIM_TIMCPT2CR_TA1SET        (1 << 12)
+#define HRTIM_TIMCPT2CR_TA1RST        (1 << 13)
+#define HRTIM_TIMCPT2CR_TACMP1        (1 << 14)
+#define HRTIM_TIMCPT2CR_TACMP2        (1 << 15)
+#define HRTIM_TIMCPT2CR_TB1SET        (1 << 16)
+#define HRTIM_TIMCPT2CR_TB1RST        (1 << 17)
+#define HRTIM_TIMCPT2CR_TBCMP1        (1 << 18)
+#define HRTIM_TIMCPT2CR_TBCMP2        (1 << 19)
+#define HRTIM_TIMCPT2CR_TC1SET        (1 << 20)
+#define HRTIM_TIMCPT2CR_TC1RST        (1 << 21)
+#define HRTIM_TIMCPT2CR_TCCMP1        (1 << 22)
+#define HRTIM_TIMCPT2CR_TCCMP2        (1 << 23)
+#define HRTIM_TIMCPT2CR_TD1SET        (1 << 24)
+#define HRTIM_TIMCPT2CR_TD1RST        (1 << 25)
+#define HRTIM_TIMCPT2CR_TDCMP1        (1 << 26)
+#define HRTIM_TIMCPT2CR_TDCMP2        (1 << 27)
+#define HRTIM_TIMCPT2CR_TE1SET        (1 << 28)
+#define HRTIM_TIMCPT2CR_TE1RST        (1 << 29)
+#define HRTIM_TIMCPT2CR_TECMP1        (1 << 30)
+#define HRTIM_TIMCPT2CR_TECMP2        (1 << 31)
+
+/* Timer X Output Register */
+
+#define HRTIM_TIMOUT_POL1             (1 << 1) /* Bit 1 */
+#define HRTIM_TIMOUT_IDLEM1           (1 << 2) /* Bit 2 */
+#define HRTIM_TIMOUT_IDLES1           (1 << 3) /* Bit 3 */
+#define HRTIM_TIMOUT_FAULT1_SHIFT     4        /* Bit 4-5 */
+#define HRTIM_TIMOUT_FAULT1_MASK      (3 << HRTIM_TIMOUT_FAULT1_SHIFT)
+#  define HRTIM_TIMOUT_FAULT1_0       (0 << HRTIM_TIMOUT_FAULT1_SHIFT)
+#  define HRTIM_TIMOUT_FAULT1_1       (1 << HRTIM_TIMOUT_FAULT1_SHIFT)
+#  define HRTIM_TIMOUT_FAULT1_2       (2 << HRTIM_TIMOUT_FAULT1_SHIFT)
+#  define HRTIM_TIMOUT_FAULT1_3       (3 << HRTIM_TIMOUT_FAULT1_SHIFT)
+#define HRTIM_TIMOUT_CHP1             (1 << 3) /* Bit 1 */
+#define HRTIM_TIMOUT_DIDL1            (1 << 3) /* Bit 1 */
+#define HRTIM_TIMOUT_DTEN             (1 << 3) /* Bit 1 */
+#define HRTIM_TIMOUT_DLYPRTEN         (1 << 3) /* Bit 1 */
+#define HRTIM_TIMOUT_DLYPRT_SHIFT     10       /* Bits 10-12*/
+#define HRTIM_TIMOUT_DLYPRT_MASK      (3 << HRTIM_TIMOUT_DLYPRT_SHIFT)
+#  define HRTIM_TIMOUT_DLYPRT_0        (0 << HRTIM_TIMOUT_DLYPRT_SHIFT)
+#  define HRTIM_TIMOUT_DLYPRT_1        (1 << HRTIM_TIMOUT_DLYPRT_SHIFT)
+#  define HRTIM_TIMOUT_DLYPRT_2        (2 << HRTIM_TIMOUT_DLYPRT_SHIFT)
+#  define HRTIM_TIMOUT_DLYPRT_3        (3 << HRTIM_TIMOUT_DLYPRT_SHIFT)
+#define HRTIM_TIMOUT_POL2             (1 << 17) /* Bit 17 */
+#define HRTIM_TIMOUT_IDLEM2           (1 << 18) /* Bit 18 */
+#define HRTIM_TIMOUT_IDLES2           (1 << 19) /* Bit 19 */
+#define HRTIM_TIMOUT_FAULT2_SHIFT     20        /* Bit 20-21 */
+#define HRTIM_TIMOUT_FAULT2_MASK      (3 << HRTIM_TIMOUT_FAULT2_SHIFT)
+#  define HRTIM_TIMOUT_FAULT2_0        (0 << HRTIM_TIMOUT_FAULT2_SHIFT)
+#  define HRTIM_TIMOUT_FAULT2_1        (1 << HRTIM_TIMOUT_FAULT2_SHIFT)
+#  define HRTIM_TIMOUT_FAULT2_2        (2 << HRTIM_TIMOUT_FAULT2_SHIFT)
+#  define HRTIM_TIMOUT_FAULT2_3        (3 << HRTIM_TIMOUT_FAULT2_SHIFT)
+#define HRTIM_TIMOUT_CHP2             (1 << 22) /* Bit 22 */
+#define HRTIM_TIMOUT_DIDL2            (1 << 23) /* Bit 23 */
+
+/* Timer X Fault Register */
+
+#define HRTIM_TIMFLT_FLT1EN           (1 << 0) /* Bit 0 */
+#define HRTIM_TIMFLT_FLT2EN           (1 << 1) /* Bit 1 */
+#define HRTIM_TIMFLT_FLT3EN           (1 << 2) /* Bit 2 */
+#define HRTIM_TIMFLT_FLT4EN           (1 << 3) /* Bit 3 */
+#define HRTIM_TIMFLT_FLT5EN           (1 << 4) /* Bit 4 */
+
+/* Common Control Register 1 */
+
+#define HRTIM_CR1_MUDIS               (1 << 0) /* Bit 0 */
+#define HRTIM_CR1_TAUDIS              (1 << 1) /* Bit 1 */
+#define HRTIM_CR1_TBUDIS              (1 << 2) /* Bit 2 */
+#define HRTIM_CR1_TCUDIS              (1 << 3) /* Bit 3 */
+#define HRTIM_CR1_TDUDIS              (1 << 4) /* Bit 4 */
+#define HRTIM_CR1_TEUDIS              (1 << 5) /* Bit 5 */
+#define HRTIM_CR1_AD1USRC_SHIFT       16 /* Bits 16-18  */
+#define HRTIM_CR1_AD1USRC_MASK        (7 << HRTIM_CR1_AD1USRC_SHIFT)
+#  define HRTIM_CR1_AD1USRC_MT        (0 << HRTIM_CR1_AD1USRC_SHIFT) /* 000: Mater Timer */
+#  define HRTIM_CR1_AD1USRC_TA        (1 << HRTIM_CR1_AD1USRC_SHIFT) /* 001: Timer A */
+#  define HRTIM_CR1_AD1USRC_TB        (2 << HRTIM_CR1_AD1USRC_SHIFT) /* 010: Timer B */
+#  define HRTIM_CR1_AD1USRC_TC        (3 << HRTIM_CR1_AD1USRC_SHIFT) /* 011: Timer C */
+#  define HRTIM_CR1_AD1USRC_TD        (4 << HRTIM_CR1_AD1USRC_SHIFT) /* 100: Timer D */
+#  define HRTIM_CR1_AD1USRC_TE        (5 << HRTIM_CR1_AD1USRC_SHIFT) /* 101: Timer A */
+#define HRTIM_CR1_AD2USRC_SHIFT       19 /* Bits 19-21  */
+#define HRTIM_CR1_AD2USRC_MASK        (7 << HRTIM_CR1_AD2USRC_SHIFT)
+#  define HRTIM_CR1_AD2USRC_MT        (0 << HRTIM_CR1_AD2USRC_SHIFT) /* 000: Mater Timer */
+#  define HRTIM_CR1_AD2USRC_TA        (1 << HRTIM_CR1_AD2USRC_SHIFT) /* 001: Timer A */
+#  define HRTIM_CR1_AD2USRC_TB        (2 << HRTIM_CR1_AD2USRC_SHIFT) /* 010: Timer B */
+#  define HRTIM_CR1_AD2USRC_TC        (3 << HRTIM_CR1_AD2USRC_SHIFT) /* 011: Timer C */
+#  define HRTIM_CR1_AD2USRC_TD        (4 << HRTIM_CR1_AD2USRC_SHIFT) /* 100: Timer D */
+#  define HRTIM_CR1_AD2USRC_TE        (5 << HRTIM_CR1_AD2USRC_SHIFT) /* 101: Timer A */
+#define HRTIM_CR1_AD3USRC_SHIFT       22 /* Bits 22-24  */
+#define HRTIM_CR1_AD3USRC_MASK        (7 << HRTIM_CR1_AD3USRC_SHIFT)
+#  define HRTIM_CR1_AD3USRC_MT        (0 << HRTIM_CR1_AD3USRC_SHIFT) /* 000: Mater Timer */
+#  define HRTIM_CR1_AD3USRC_TA        (1 << HRTIM_CR1_AD3USRC_SHIFT) /* 001: Timer A */
+#  define HRTIM_CR1_AD3USRC_TB        (2 << HRTIM_CR1_AD3USRC_SHIFT) /* 010: Timer B */
+#  define HRTIM_CR1_AD3USRC_TC        (3 << HRTIM_CR1_AD3USRC_SHIFT) /* 011: Timer C */
+#  define HRTIM_CR1_AD3USRC_TD        (4 << HRTIM_CR1_AD3USRC_SHIFT) /* 100: Timer D */
+#  define HRTIM_CR1_AD3USRC_TE        (5 << HRTIM_CR1_AD3USRC_SHIFT) /* 101: Timer A */
+#define HRTIM_CR1_AD4USRC_SHIFT       25 /* Bits 25-27  */
+#define HRTIM_CR1_AD4USRC_MASK        (7 << HRTIM_CR1_AD4USRC_SHIFT)
+#  define HRTIM_CR1_AD4USRC_MT        (0 << HRTIM_CR1_AD4USRC_SHIFT) /* 000: Mater Timer */
+#  define HRTIM_CR1_AD4USRC_TA        (1 << HRTIM_CR1_AD4USRC_SHIFT) /* 001: Timer A */
+#  define HRTIM_CR1_AD4USRC_TB        (2 << HRTIM_CR1_AD4USRC_SHIFT) /* 010: Timer B */
+#  define HRTIM_CR1_AD4USRC_TC        (3 << HRTIM_CR1_AD4USRC_SHIFT) /* 011: Timer C */
+#  define HRTIM_CR1_AD4USRC_TD        (4 << HRTIM_CR1_AD4USRC_SHIFT) /* 100: Timer D */
+#  define HRTIM_CR1_AD4USRC_TE        (5 << HRTIM_CR1_AD4USRC_SHIFT) /* 101: Timer A */
+
+/* Common Control Register 2 */
+
+#define HRTIM_CR2_MSWU                (1 << 0) /* Bit 0: Master Timer Software Update */
+#define HRTIM_CR2_TASWU               (1 << 1) /* Bit 1: Timer A Software Update */
+#define HRTIM_CR2_TBSWU               (1 << 2) /* Bit 2: Timer B Software Update */
+#define HRTIM_CR2_TCSWU               (1 << 3) /* Bit 3: Timer C Software Update */
+#define HRTIM_CR2_TDSWU               (1 << 4) /* Bit 4: Timer D Software Update */
+#define HRTIM_CR2_TESWU               (1 << 5) /* Bit 5: Timer E Software Update */
+#define HRTIM_CR2_MRST                (1 << 8) /* Bit 8: Master Counter Software Reset*/
+#define HRTIM_CR2_TARST               (1 << 9) /* Bit 9: Timer A Counter Software Reset*/
+#define HRTIM_CR2_TBRST               (1 << 10) /* Bit 10: Timer B Counter Software Reset*/
+#define HRTIM_CR2_TCRST               (1 << 11) /* Bit 11: Timer C Counter Software Reset*/
+#define HRTIM_CR2_TDRST               (1 << 12) /* Bit 12: Timer D Counter Software Reset*/
+#define HRTIM_CR2_TERST               (1 << 13) /* Bit 13: Timer E Counter Software Reset*/
+
+/* Common Interupt Status Register */
+
+#define HRTIM_ISR_FLT1                (1 << 0) /* Bit 0: Fault 1 Interrupt Flag */
+#define HRTIM_ISR_FLT2                (1 << 1) /* Bit 1: Fault 2 Interrupt Flag */
+#define HRTIM_ISR_FLT3                (1 << 2) /* Bit 2: Fault 3 Interrupt Flag */
+#define HRTIM_ISR_FLT4                (1 << 3) /* Bit 3: Fault 4 Interrupt Flag */
+#define HRTIM_ISR_FLT5                (1 << 4) /* Bit 4: Fault 5 Interrupt Flag */
+#define HRTIM_ISR_SYSFLT              (1 << 5) /* Bit 5: System Fault Interrupt Flag */
+#define HRTIM_ISR_DLLRDY              (1 << 16) /* Bit 16: DLL Ready Interrupt Flag */
+#define HRTIM_ISR_BMPER               (1 << 17) /* Bit 17: Burst mode Period Interrupt Flag */
+
+/* Common Interupt Clear Register */
+
+#define HRTIM_ICR_FLT1C                (1 << 0) /* Bit 0: Fault 1 Interrupt Flag Clear */
+#define HRTIM_ICR_FLT2C                (1 << 1) /* Bit 1: Fault 2 Interrupt Flag Clear */
+#define HRTIM_ICR_FLT3C                (1 << 2) /* Bit 2: Fault 3 Interrupt Flag Clear */
+#define HRTIM_ICR_FLT4C                (1 << 3) /* Bit 3: Fault 4 Interrupt Flag Clear */
+#define HRTIM_ICR_FLT5C                (1 << 4) /* Bit 4: Fault 5 Interrupt Flag Clear */
+#define HRTIM_ICR_SYSFLTC              (1 << 5) /* Bit 5: System Fault Interrupt Flag Clear */
+#define HRTIM_ICR_DLLRDYC              (1 << 16) /* Bit 16: DLL Ready Interrupt Flag Clear */
+#define HRTIM_ICR_BMPERC               (1 << 17) /* Bit 17: Burst mode Period Interrupt Flag Clear */
+
+/* Common Interupt Enable Register */
+
+#define HRTIM_IER_FLT1IE               (1 << 0) /* Bit 0: Fault 1 Interrupt Enable */
+#define HRTIM_IER_FLT2IE               (1 << 1) /* Bit 1: Fault 2 Interrupt Enable */
+#define HRTIM_IER_FLT3IE               (1 << 2) /* Bit 2: Fault 3 Interrupt Enable */
+#define HRTIM_IER_FLT4IE               (1 << 3) /* Bit 3: Fault 4 Interrupt Enable */
+#define HRTIM_IER_FLT5IE               (1 << 4) /* Bit 4: Fault 5 Interrupt Enable */
+#define HRTIM_IER_SYSFLTIE             (1 << 5) /* Bit 5: System Fault Interrupt Enable */
+#define HRTIM_IER_DLLRDYIE             (1 << 16) /* Bit 16: DLL Ready Interrupt Enable */
+#define HRTIM_IER_BMPERIE              (1 << 17) /* Bit 17: Burst mode Period Interrupt Enable */
+
+/* Common Output Enable Register */
+
+#define HRTIM_OENR_TA1OE                (1 << 0) /* Bit 0: Timer A Output 1 Enable */
+#define HRTIM_OENR_TA2OE                (1 << 1) /* Bit 1: Timer A Output 2 Enable */
+#define HRTIM_OENR_TB1OE                (1 << 2) /* Bit 2: Timer B Output 1 Enable */
+#define HRTIM_OENR_TB2OE                (1 << 3) /* Bit 3: Timer B Output 2 Enable */
+#define HRTIM_OENR_TC1OE                (1 << 4) /* Bit 4: Timer C Output 1 Enable */
+#define HRTIM_OENR_TC2OE                (1 << 5) /* Bit 5: Timer C Output 2 Enable */
+#define HRTIM_OENR_TD1OE                (1 << 6) /* Bit 6: Timer D Output 1 Enable */
+#define HRTIM_OENR_TD2OE                (1 << 7) /* Bit 7: Timer D Output 2 Enable */
+#define HRTIM_OENR_TE1OE                (1 << 8) /* Bit 8: Timer E Output 1 Enable */
+#define HRTIM_OENR_TE2OE                (1 << 9) /* Bit 9: Timer E Output 2 Enable */
+
+/* Common Output Disable Register */
+
+#define HRTIM_ODISR_TA1ODIS             (1 << 0) /* Bit 0: Timer A Output 1 Disable */
+#define HRTIM_ODISR_TA2ODIS             (1 << 1) /* Bit 1: Timer A Output 2 Disable */
+#define HRTIM_ODISR_TB1ODIS             (1 << 2) /* Bit 2: Timer B Output 1 Disable */
+#define HRTIM_ODISR_TB2ODIS             (1 << 3) /* Bit 3: Timer B Output 2 Disable */
+#define HRTIM_ODISR_TC1ODIS             (1 << 4) /* Bit 4: Timer C Output 1 Disable */
+#define HRTIM_ODISR_TC2ODIS             (1 << 5) /* Bit 5: Timer C Output 2 Disable */
+#define HRTIM_ODISR_TD1ODIS             (1 << 6) /* Bit 6: Timer D Output 1 Disable */
+#define HRTIM_ODISR_TD2ODIS             (1 << 7) /* Bit 7: Timer D Output 2 Disable */
+#define HRTIM_ODISR_TE1ODIS             (1 << 8) /* Bit 8: Timer E Output 1 Disable */
+#define HRTIM_ODISR_TE2ODIS             (1 << 9) /* Bit 9: Timer E Output 2 Disable */
+
+/* Common Output Disable Status Register */
+
+#define HRTIM_ODSR_TA1ODS               (1 << 0) /* Bit 0: Timer A Output 1 Disable Status */
+#define HRTIM_ODSR_TA2ODS               (1 << 1) /* Bit 1: Timer A Output 2 Disable Status */
+#define HRTIM_ODSR_TB1ODS               (1 << 2) /* Bit 2: Timer B Output 1 Disable Status */
+#define HRTIM_ODSR_TB2ODS               (1 << 3) /* Bit 3: Timer B Output 2 Disable Status */
+#define HRTIM_ODSR_TC1ODS               (1 << 4) /* Bit 4: Timer C Output 1 Disable Status */
+#define HRTIM_ODSR_TC2ODS               (1 << 5) /* Bit 5: Timer C Output 2 Disable Status */
+#define HRTIM_ODSR_TD1ODS               (1 << 6) /* Bit 6: Timer D Output 1 Disable Status */
+#define HRTIM_ODSR_TD2ODS               (1 << 7) /* Bit 7: Timer D Output 2 Disable Status */
+#define HRTIM_ODSR_TE1ODS               (1 << 8) /* Bit 8: Timer E Output 1 Disable Status */
+#define HRTIM_ODSR_TE2ODS               (1 << 9) /* Bit 9: Timer E Output 2 Disable Status */
+
+/* Common Burst Mode Control Register */
+
+#define HRTIM_BMCR_BME                  (1 << 0) /* Bit 0: Burst Mode Enable */
+#define HRTIM_BMCR_BMOM                 (1 << 0) /* Bit 1: Burst Mode Operating Mode */
+#define HRTIM_BMCR_BMCLK_SHIFT          2        /* Bits 2-5: Burst Mode Clock Source */
+#define HRTIM_BMCR_BMCLK_MASK           (15 << HRTIM_BMCR_BMCLK_SHIFT)
+#  define HRTIM_BMCR_BMCLK_0            (0 << HRTIM_BMCR_BMCLK_SHIFT) /* 0000: Master Timer Counter Reset/roll-over */
+#  define HRTIM_BMCR_BMCLK_1            (1 << HRTIM_BMCR_BMCLK_SHIFT) /* 0001: Timer A counter reset/roll-over */
+#  define HRTIM_BMCR_BMCLK_2            (2 << HRTIM_BMCR_BMCLK_SHIFT) /* 0010: Timer B counter reset/roll-over */
+#  define HRTIM_BMCR_BMCLK_3            (3 << HRTIM_BMCR_BMCLK_SHIFT) /* 0011: Timer C counter reset/roll-over */
+#  define HRTIM_BMCR_BMCLK_4            (4 << HRTIM_BMCR_BMCLK_SHIFT) /* 0100: Timer D counter reset/roll-over */
+#  define HRTIM_BMCR_BMCLK_5            (5 << HRTIM_BMCR_BMCLK_SHIFT) /* 0101: Timer E counter reset/roll-over */
+#  define HRTIM_BMCR_BMCLK_6            (6 << HRTIM_BMCR_BMCLK_SHIFT) /* 0110: On-chip Event 1 acting as a burst mode counter clock  */
+#  define HRTIM_BMCR_BMCLK_7            (7 << HRTIM_BMCR_BMCLK_SHIFT) /* 0111: On-chip Event 2 acting as a burst mode counter clock  */
+#  define HRTIM_BMCR_BMCLK_8            (8 << HRTIM_BMCR_BMCLK_SHIFT) /* 1000: On-chip Event 3 acting as a burst mode counter clock  */
+#  define HRTIM_BMCR_BMCLK_9            (9 << HRTIM_BMCR_BMCLK_SHIFT) /* 1001: On-chip Event 4 acting as a burst mode counter clock  */
+#  define HRTIM_BMCR_BMCLK_10           (10 << HRTIM_BMCR_BMCLK_SHIFT) /* 1010: Prescaled fHRTIM clock */
+#define HRTIM_BMCR_BMPRSC_SHIFT         6 /* Bits 6-9: Burst Mode Prescaler */
+#define HRTIM_BMCR_BMPRSC_MASK          (15 << HRTIM_BMCR_BMPRSC_SHIFT)
+#  define HRTIM_BMCR_BMPRSC_PSCOFF      (0 << HRTIM_BMCR_BMPRSC_SHIFT) /* 0000: Clock not divided */
+#  define HRTIM_BMCR_BMPRSC_d2          (1 << HRTIM_BMCR_BMPRSC_SHIFT) /* 0001: Division by 2 */
+#  define HRTIM_BMCR_BMPRSC_d4          (2 << HRTIM_BMCR_BMPRSC_SHIFT) /* 0010: Division by 4 */
+#  define HRTIM_BMCR_BMPRSC_d8          (3 << HRTIM_BMCR_BMPRSC_SHIFT) /* 0011: Division by 8 */
+#  define HRTIM_BMCR_BMPRSC_d16         (4 << HRTIM_BMCR_BMPRSC_SHIFT) /* 0100: Division by 16 */
+#  define HRTIM_BMCR_BMPRSC_d32         (5 << HRTIM_BMCR_BMPRSC_SHIFT) /* 0101: Division by 32 */
+#  define HRTIM_BMCR_BMPRSC_d64         (6 << HRTIM_BMCR_BMPRSC_SHIFT) /* 0110: Division by 64 */
+#  define HRTIM_BMCR_BMPRSC_d128        (7 << HRTIM_BMCR_BMPRSC_SHIFT) /* 0111: Division by 128 */
+#  define HRTIM_BMCR_BMPRSC_d256        (8 << HRTIM_BMCR_BMPRSC_SHIFT) /* 1000: Division by 256 */
+#  define HRTIM_BMCR_BMPRSC_d512        (9 << HRTIM_BMCR_BMPRSC_SHIFT) /* 1001: Division by 512 */
+#  define HRTIM_BMCR_BMPRSC_d1024       (10 << HRTIM_BMCR_BMPRSC_SHIFT) /* 1010: Division by 1024 */
+#  define HRTIM_BMCR_BMPRSC_d2048       (11 << HRTIM_BMCR_BMPRSC_SHIFT) /* 1011: Division by 2048 */
+#  define HRTIM_BMCR_BMPRSC_d4096       (12 << HRTIM_BMCR_BMPRSC_SHIFT) /* 1100: Division by 4096 */
+#  define HRTIM_BMCR_BMPRSC_d8192       (13 << HRTIM_BMCR_BMPRSC_SHIFT) /* 1101: Division by 8192 */
+#  define HRTIM_BMCR_BMPRSC_d16384      (14 << HRTIM_BMCR_BMPRSC_SHIFT) /* 1110: Division by 16384 */
+#  define HRTIM_BMCR_BMPRSC_d32769      (15 << HRTIM_BMCR_BMPRSC_SHIFT) /* 1111: Division by 32768 */
+#define HRTIM_BMCR_BMPREN               (1 << 10) /* Bit 10: Burst Mode Preload Enable */
+#define HRTIM_BMCR_MTBM                 (1 << 16) /* Bit 16: Master Timer Burst Mode */
+#define HRTIM_BMCR_TABM                 (1 << 17) /* Bit 17: Timer A Burst Mode */
+#define HRTIM_BMCR_TBBM                 (1 << 18) /* Bit 18: Timer B Burst Mode */
+#define HRTIM_BMCR_TCBM                 (1 << 19) /* Bit 19: Timer C Burst Mode */
+#define HRTIM_BMCR_TDBM                 (1 << 20) /* Bit 20: Timer D Burst Mode */
+#define HRTIM_BMCR_TEBM                 (1 << 21) /* Bit 21: Timer E Burst Mode */
+#define HRTIM_BMCR_BMSTAT               (1 << 31) /* Bit 31: Burst Mode Status */
+
+
+/* Common Burst Mode Trigger Register */
+
+#define HRTIM_BMTRGR_SW                 (1 << 0)  /* Bit 0: Software start  */
+#define HRTIM_BMTRGR_MSTRST             (1 << 1)  /* Bit 1: Master reset or roll-over */
+#define HRTIM_BMTRGR_MSTREP             (1 << 2)  /* Bit 2: Master repetition */
+#define HRTIM_BMTRGR_MSTCMP1            (1 << 3)  /* Bit 3: Master Compare 1 */
+#define HRTIM_BMTRGR_MSTCMP2            (1 << 4)  /* Bit 4: Master Compare 2 */
+#define HRTIM_BMTRGR_MSTCMP3            (1 << 5)  /* Bit 5: Master Compare 3 */
+#define HRTIM_BMTRGR_MSTCMP4            (1 << 6)  /* Bit 6: Master Compare 4 */
+#define HRTIM_BMTRGR_TARST              (1 << 7)  /* Bit 7: Timer A reset or roll-over */
+#define HRTIM_BMTRGR_TAREP              (1 << 8)  /* Bit 8: Timer A repetition */
+#define HRTIM_BMTRGR_TACMP1             (1 << 9)  /* Bit 9: Timer A Compare 1 */
+#define HRTIM_BMTRGR_TACMP2             (1 << 10) /* Bit 10: Timer A Compare 2 */
+#define HRTIM_BMTRGR_TBRST              (1 << 11) /* Bit 11: Timer B reset or roll-over */
+#define HRTIM_BMTRGR_TBREP              (1 << 12) /* Bit 12: Timer B repetition */
+#define HRTIM_BMTRGR_TBCMP1             (1 << 13) /* Bit 13: Timer B Compare 1 */
+#define HRTIM_BMTRGR_TBCMP2             (1 << 14) /* Bit 14: Timer B Compare 2 */
+#define HRTIM_BMTRGR_TCRST              (1 << 15) /* Bit 15: Timer C reset or roll-over */
+#define HRTIM_BMTRGR_TCREP              (1 << 16) /* Bit 16: Timer C repetition */
+#define HRTIM_BMTRGR_TCCMP1             (1 << 17) /* Bit 17: Timer C Compare 1 */
+#define HRTIM_BMTRGR_TCCMP2             (1 << 18) /* Bit 18: Timer C Compare 2 */
+#define HRTIM_BMTRGR_TDRST              (1 << 19) /* Bit 19: Timer D reset or roll-over */
+#define HRTIM_BMTRGR_TDREP              (1 << 20) /* Bit 20: Timer D repetition */
+#define HRTIM_BMTRGR_TDCMP1             (1 << 21) /* Bit 21: Timer D Compare 1 */
+#define HRTIM_BMTRGR_TDCMP2             (1 << 22) /* Bit 22: Timer D Compare 2 */
+#define HRTIM_BMTRGR_TERST              (1 << 23) /* Bit 23: Timer E reset or roll-over */
+#define HRTIM_BMTRGR_TEREP              (1 << 24) /* Bit 24: Timer E repetition */
+#define HRTIM_BMTRGR_TECMP1             (1 << 25) /* Bit 25: Timer E Compare 1 */
+#define HRTIM_BMTRGR_TECMP2             (1 << 26) /* Bit 26: Timer E Compare 2 */
+#define HRTIM_BMTRGR_TAEEV7             (1 << 27) /* Bit 27: Timer A period following External Event 7 */
+#define HRTIM_BMTRGR_TDEEV8             (1 << 28) /* Bit 28: Timer D period following External Event 8 */
+#define HRTIM_BMTRGR_EEV7               (1 << 29) /* Bit 29: External Event 7 */
+#define HRTIM_BMTRGR_EEV8               (1 << 30) /* Bit 30: External Event 8 */
+#define HRTIM_BMTRGR_OCHPEV             (1 << 31) /* Bit 31: On-chip Event */
+
+/* Common Burst Mode Compare Register */
+
+#define HRTIM_BMCMPR_SHIFT              0         /* Bits 0-15: Burst mode compare value */
+#define HRTIM_BMCMPR_MASK               (0xffff << HRTIM_BMCMPR_SHIFT)
+
+/* Common Burst Mode Period Register */
+
+#define HRTIM_BMPER_SHIFT              0          /* Bits 0-15: Burst mode Period */
+#define HRTIM_BMPER_MASK               (0xffff << HRTIM_BMPER_SHIFT)
+
+/* Common External Event Control Register 1 */
+
+#define HRTIM_EECR1_EE1SRC_SHIFT       0         /* Bits 0-1: External Event 1 Source */
+#define HRTIM_EECR1_EE1SRC_MASK        (3 << HRTIM_EECR1_EE1SRC_SHIFT)
+#  define HRTIM_EECR1_EE1SRC_SRC1      (0 << HRTIM_EECR1_EE1SRC_SHIFT) /* 00: EE1 Src1 */
+#  define HRTIM_EECR1_EE1SRC_SRC2      (1 << HRTIM_EECR1_EE1SRC_SHIFT) /* 00: EE1 Src2 */
+#  define HRTIM_EECR1_EE1SRC_SRC3      (2 << HRTIM_EECR1_EE1SRC_SHIFT) /* 00: EE1 Src3 */
+#  define HRTIM_EECR1_EE1SRC_SRC4      (3 << HRTIM_EECR1_EE1SRC_SHIFT) /* 00: EE1 Src4 */
+#define HRTIM_EECR1_EE1POL             (1 << 2)  /* Bit 2: External Event 1 Polarity */
+#define HRTIM_EECR1_EE1SNS_SHIFT       3         /* Bits 3-4: External Event 1 Sensitivity */
+#define HRTIM_EECR1_EE1SNS_MASK        (3 << HRTIM_EECR1_EE1SNS_SHIFT)
+#  define HRTIM_EECR1_EE1SNS_ACTIV     (0 << HRTIM_EECR1_EE1SNS_SHIFT) /* 00: On active level defined by EE1POL bit */
+#  define HRTIM_EECR1_EE1SNS_REDGE     (1 << HRTIM_EECR1_EE1SNS_SHIFT) /* 01: Rising edge, whatever EE1POL bit value */
+#  define HRTIM_EECR1_EE1SNS_FEDGE     (2 << HRTIM_EECR1_EE1SNS_SHIFT) /* 10: Falling edge, whatever EE1POL bit value */
+#  define HRTIM_EECR1_EE1SNS_BEDGE     (3 << HRTIM_EECR1_EE1SNS_SHIFT) /* 11: Both edges, whatever EE1POL bit value */
+#define HRTIM_EECR1_EE1FAST            (1 << 5)  /* Bit 5: External Event 1 Fast mode */
+#define HRTIM_EECR1_EE2SRC_SHIFT       6         /* Bits 6-7: External Event 2 Source */
+#define HRTIM_EECR1_EE2SRC_MASK        (3 << HRTIM_EECR1_EE2SRC_SHIFT)
+#  define HRTIM_EECR1_EE2SRC_SRC1      (0 << HRTIM_EECR1_EE2SRC_SHIFT) /* 00: EE2 Src1 */
+#  define HRTIM_EECR1_EE2SRC_SRC2      1 << HRTIM_EECR1_EE2SRC_SHIFT) /* 00: EE2 Src2 */
+#  define HRTIM_EECR1_EE2SRC_SRC3      (2 << HRTIM_EECR1_EE2SRC_SHIFT) /* 00: EE2 Src3 */
+#  define HRTIM_EECR1_EE2SRC_SRC4      (3 << HRTIM_EECR1_EE2SRC_SHIFT) /* 00: EE2 Src4 */
+#define HRTIM_EECR1_EE2POL             (1 << 8)  /* Bit 8: External Event 2 Polarity */
+#define HRTIM_EECR1_EE2SNS_SHIFT       9         /* Bits 9-10: External Event 2 Sensitivity */
+#define HRTIM_EECR1_EE2SNS_MASK       (3 << HRTIM_EECR1_EE2SNS_SHIFT)
+#  define HRTIM_EECR1_EE2SNS_ACTIV    (0 << HRTIM_EECR1_EE2SNS_SHIFT) /* 00: On active level defined by EE2POL bit */
+#  define HRTIM_EECR1_EE2SNS_REDGE    (1 << HRTIM_EECR1_EE2SNS_SHIFT) /* 01: Rising edge, whatever EE2POL bit value */
+#  define HRTIM_EECR1_EE2SNS_FEDGE    (2 << HRTIM_EECR1_EE2SNS_SHIFT) /* 10: Falling edge, whatever EE2POL bit value */
+#  define HRTIM_EECR1_EE2SNS_BEDGE    (3 << HRTIM_EECR1_EE2SNS_SHIFT) /* 11: Both edges, whatever EE2POL bit value */
+#define HRTIM_EECR1_EE2FAST           (1 << 11)  /* Bit 11: External Event 2 Fast mode */
+#define HRTIM_EECR1_EE3SRC_SHIFT      12         /* Bits 6-7: External Event 3 Source */
+#define HRTIM_EECR1_EE3SRC_MASK       (3 << HRTIM_EECR1_EE3SRC_SHIFT)
+#  define HRTIM_EECR1_EE3SRC_SRC1     (0 << HRTIM_EECR1_EE3SRC_SHIFT) /* 00: EE3 Src1 */
+#  define HRTIM_EECR1_EE3SRC_SRC2     (1 << HRTIM_EECR1_EE3SRC_SHIFT) /* 00: EE3 Src2 */
+#  define HRTIM_EECR1_EE3SRC_SRC3     (2 << HRTIM_EECR1_EE3SRC_SHIFT) /* 00: EE3 Src3 */
+#  define HRTIM_EECR1_EE3SRC_SRC4     (3 << HRTIM_EECR1_EE3SRC_SHIFT) /* 00: EE3 Src4 */
+#define HRTIM_EECR1_EE3POL            (1 << 14)  /* Bit 14: External Event 3 Polarity */
+#define HRTIM_EECR1_EE3SNS_SHIFT      15         /* Bits 15-16: External Event 3 Sensitivity */
+#define HRTIM_EECR1_EE3SNS_MASK       (3 << HRTIM_EECR1_EE3SNS_SHIFT)
+#  define HRTIM_EECR1_EE3SNS_ACTIV    (0 << HRTIM_EECR1_EE3SNS_SHIFT) /* 00: On active level defined by EE3POL bit */
+#  define HRTIM_EECR1_EE3SNS_REDGE    (1 << HRTIM_EECR1_EE3SNS_SHIFT) /* 01: Rising edge, whatever EE3POL bit value */
+#  define HRTIM_EECR1_EE3SNS_FEDGE    (2 << HRTIM_EECR1_EE3SNS_SHIFT) /* 10: Falling edge, whatever EE3POL bit value */
+#  define HRTIM_EECR1_EE3SNS_BEDGE    (3 << HRTIM_EECR1_EE3SNS_SHIFT) /* 11: Both edges, whatever EE3POL bit value */
+#define HRTIM_EECR1_EE3FAST           (1 << 17)  /* Bit 17: External Event 3 Fast mode */
+#define HRTIM_EECR1_EE4SRC_SHIFT      18         /* Bits 18-19: External Event 4 Source */
+#define HRTIM_EECR1_EE4SRC_MASK       (3 << HRTIM_EECR1_EE4SRC_SHIFT)
+#  define HRTIM_EECR1_EE4SRC_SRC1     (0 << HRTIM_EECR1_EE4SRC_SHIFT) /* 00: EE4 Src1 */
+#  define HRTIM_EECR1_EE4SRC_SRC2     (1 << HRTIM_EECR1_EE4SRC_SHIFT) /* 00: EE4 Src2 */
+#  define HRTIM_EECR1_EE4SRC_SRC3     (2 << HRTIM_EECR1_EE4SRC_SHIFT) /* 00: EE4 Src3 */
+#  define HRTIM_EECR1_EE4SRC_SRC4     (3 << HRTIM_EECR1_EE4SRC_SHIFT) /* 00: EE4 Src4 */
+#define HRTIM_EECR1_EE4POL            (1 << 20)  /* Bit 20: External Event 4 Polarity */
+#define HRTIM_EECR1_EE4SNS_SHIFT      21         /* Bits 21-22: External Event 4 Sensitivity */
+#define HRTIM_EECR1_EE4SNS_MASK       (3 << HRTIM_EECR1_EE4SNS_SHIFT)
+#  define HRTIM_EECR1_EE4SNS_ACTIV    (0 << HRTIM_EECR1_EE4SNS_SHIFT) /* 00: On active level defined by EE4POL bit */
+#  define HRTIM_EECR1_EE4SNS_REDGE    (1 << HRTIM_EECR1_EE4SNS_SHIFT) /* 01: Rising edge, whatever EE4POL bit value */
+#  define HRTIM_EECR1_EE4SNS_FEDGE    (2 << HRTIM_EECR1_EE4SNS_SHIFT) /* 10: Falling edge, whatever EE4POL bit value */
+#  define HRTIM_EECR1_EE4SNS_BEDGE    (3 << HRTIM_EECR1_EE4SNS_SHIFT) /* 11: Both edges, whatever EE4POL bit value */
+#define HRTIM_EECR1_EE4FAST           (1 << 23)  /* Bit 23: External Event 4 Fast mode */
+#define HRTIM_EECR1_EE5SRC_SHIFT      24         /* Bits 24-25: External Event 5 Source */
+#define HRTIM_EECR1_EE5SRC_MASK       (3 << HRTIM_EECR1_EE5SRC_SHIFT)
+#  define HRTIM_EECR1_EE5SRC_SRC1     (0 << HRTIM_EECR1_EE5SRC_SHIFT) /* 00: EE5 Src1 */
+#  define HRTIM_EECR1_EE5SRC_SRC2     (1 << HRTIM_EECR1_EE5SRC_SHIFT) /* 00: EE5 Src2 */
+#  define HRTIM_EECR1_EE5SRC_SRC3     (2 << HRTIM_EECR1_EE5SRC_SHIFT) /* 00: EE5 Src3 */
+#  define HRTIM_EECR1_EE5SRC_SRC4     (3 << HRTIM_EECR1_EE5SRC_SHIFT) /* 00: EE5 Src4 */
+#define HRTIM_EECR1_EE5POL            (1 << 26)  /* Bit 26: External Event 5 Polarity */
+#define HRTIM_EECR1_EE5SNS_SHIFT      27         /* Bits 27-28: External Event 5 Sensitivity */
+#define HRTIM_EECR1_EE5SNS_MASK       (3 << HRTIM_EECR1_EE5SNS_SHIFT)
+#  define HRTIM_EECR1_EE5SNS_ACTIV    (0 << HRTIM_EECR1_EE5SNS_SHIFT) /* 00: On active level defined by EE5POL bit */
+#  define HRTIM_EECR1_EE5SNS_REDGE    (1 << HRTIM_EECR1_EE5SNS_SHIFT) /* 01: Rising edge, whatever EE5POL bit value */
+#  define HRTIM_EECR1_EE5SNS_FEDGE    (2 << HRTIM_EECR1_EE5SNS_SHIFT) /* 10: Falling edge, whatever EE5POL bit value */
+#  define HRTIM_EECR1_EE5SNS_BEDGE    (3 << HRTIM_EECR1_EE5SNS_SHIFT) /* 11: Both edges, whatever EE5POL bit value */
+#define HRTIM_EECR1_EE5FAST           (1 << 29)  /* Bit 29: External Event 5 Fast mode */
+
+/* Common External Event Control Register 2 */
+
+#define HRTIM_EECR2_EE6SRC_SHIFT        0         /* Bits 0-1: External Event 6 Source */
+#define HRTIM_EECR2_EE6SRC_MASK         (3 << HRTIM_EECR2_EE6SRC_SHIFT)
+#  define HRTIM_EECR2_EE6SRC_SRC1       (0 << HRTIM_EECR2_EE6SRC_SHIFT) /* 00: EE6 Src1 */
+#  define HRTIM_EECR2_EE6SRC_SRC2       (1 << HRTIM_EECR2_EE6SRC_SHIFT) /* 00: EE6 Src2 */
+#  define HRTIM_EECR2_EE6SRC_SRC3       (2 << HRTIM_EECR2_EE6SRC_SHIFT) /* 00: EE6 Src3 */
+#  define HRTIM_EECR2_EE6SRC_SRC4       (3 << HRTIM_EECR2_EE6SRC_SHIFT) /* 00: EE6 Src4 */
+#define HRTIM_EECR2_EE6POL              (1 << 3)  /* Bit 3: External Event 6 Polarity */
+#define HRTIM_EECR2_EE6SNS_SHIFT        3         /* Bits 3-4: External Event 6 Sensitivity */
+#define HRTIM_EECR2_EE6SNS_MASK         (3 << HRTIM_EECR2_EE6SNS_SHIFT)
+#  define HRTIM_EECR2_EE6SNS_ACTIV      (0 << HRTIM_EECR2_EE6SNS_SHIFT) /* 00: On active level defined by EE6POL bit */
+#  define HRTIM_EECR2_EE6SNS_REDGE      (1 << HRTIM_EECR2_EE6SNS_SHIFT) /* 01: Rising edge, whatever EE6POL bit value */
+#  define HRTIM_EECR2_EE6SNS_FEDGE      (2 << HRTIM_EECR2_EE6SNS_SHIFT) /* 10: Falling edge, whatever EE6POL bit value */
+#  define HRTIM_EECR2_EE6SNS_BEDGE      (3 << HRTIM_EECR2_EE6SNS_SHIFT) /* 11: Both edges, whatever EE6POL bit value */
+#define HRTIM_EECR2_EE7SRC_SHIFT        6         /* Bits 6-7: External Event 7 Source */
+#define HRTIM_EECR2_EE7SRC_MASK         (3 << HRTIM_EECR2_EE7SRC_SHIFT)
+#  define HRTIM_EECR2_EE7SRC_SRC1       (0 << HRTIM_EECR2_EE7SRC_SHIFT) /* 00: EE7 Src1 */
+#  define HRTIM_EECR2_EE7SRC_SRC2       (1 << HRTIM_EECR2_EE7SRC_SHIFT) /* 00: EE7 Src2 */
+#  define HRTIM_EECR2_EE7SRC_SRC3       (2 << HRTIM_EECR2_EE7SRC_SHIFT) /* 00: EE7 Src3 */
+#  define HRTIM_EECR2_EE7SRC_SRC4       (3 << HRTIM_EECR2_EE7SRC_SHIFT) /* 00: EE7 Src4 */
+#define HRTIM_EECR2_EE7POL              (1 << 8)  /* Bit 8: External Event 7 Polarity */
+#define HRTIM_EECR2_EE7SNS_SHIFT        9         /* Bits 9-10: External Event 7 Sensitivity */
+#define HRTIM_EECR2_EE7SNS_MASK         (3 << HRTIM_EECR2_EE7SNS_SHIFT)
+#  define HRTIM_EECR2_EE7SNS_ACTIV      (0 << HRTIM_EECR2_EE7SNS_SHIFT) /* 00: On active level defined by EE7POL bit */
+#  define HRTIM_EECR2_EE7SNS_REDGE      (1 << HRTIM_EECR2_EE7SNS_SHIFT) /* 01: Rising edge, whatever EE7POL bit value */
+#  define HRTIM_EECR2_EE7SNS_FEDGE      (2 << HRTIM_EECR2_EE7SNS_SHIFT) /* 10: Falling edge, whatever EE7POL bit value */
+#  define HRTIM_EECR2_EE7SNS_BEDGE      (3 << HRTIM_EECR2_EE7SNS_SHIFT) /* 11: Both edges, whatever EE7POL bit value */
+#define HRTIM_EECR2_EE8SRC_SHIFT        12        /* Bits 12-13: External Event 8 Source */
+#define HRTIM_EECR2_EE8SRC_MASK         (3 << HRTIM_EECR2_EE8SRC_SHIFT)
+#  define HRTIM_EECR2_EE8SRC_SRC1       (0 << HRTIM_EECR2_EE8SRC_SHIFT) /* 00: EE8 Src1 */
+#  define HRTIM_EECR2_EE8SRC_SRC2       (1 << HRTIM_EECR2_EE8SRC_SHIFT) /* 00: EE8 Src2 */
+#  define HRTIM_EECR2_EE8SRC_SRC3       (2 << HRTIM_EECR2_EE8SRC_SHIFT) /* 00: EE8 Src3 */
+#  define HRTIM_EECR2_EE8SRC_SRC4       (3 << HRTIM_EECR2_EE8SRC_SHIFT) /* 00: EE8 Src4 */
+#define HRTIM_EECR2_EE8POL              (1 << 14) /* Bit 14: External Event 8 Polarity */
+#define HRTIM_EECR2_EE8SNS_SHIFT        15        /* Bits 15-16: External Event 8 Sensitivity */
+#define HRTIM_EECR2_EE8SNS_MASK         (3 << HRTIM_EECR2_EE8SNS_SHIFT)
+#  define HRTIM_EECR2_EE8SNS_ACTIV      (0 << HRTIM_EECR2_EE8SNS_SHIFT) /* 00: On active level defined by EE8POL bit */
+#  define HRTIM_EECR2_EE8SNS_REDGE      (1 << HRTIM_EECR2_EE8SNS_SHIFT) /* 01: Rising edge, whatever EE8POL bit value */
+#  define HRTIM_EECR2_EE8SNS_FEDGE      (2 << HRTIM_EECR2_EE8SNS_SHIFT) /* 10: Falling edge, whatever EE8POL bit value */
+#  define HRTIM_EECR2_EE8SNS_BEDGE      (3 << HRTIM_EECR2_EE8SNS_SHIFT) /* 11: Both edges, whatever EE8POL bit value */
+#define HRTIM_EECR2_EE9SRC_SHIFT        18        /* Bits 18-19: External Event 9 Source */
+#define HRTIM_EECR2_EE9SRC_MASK         (3 << HRTIM_EECR2_EE9SRC_SHIFT)
+#  define HRTIM_EECR2_EE9SRC_SRC1       (0 << HRTIM_EECR2_EE9SRC_SHIFT) /* 00: EE9 Src1 */
+#  define HRTIM_EECR2_EE9SRC_SRC2       (1 << HRTIM_EECR2_EE9SRC_SHIFT) /* 00: EE9 Src2 */
+#  define HRTIM_EECR2_EE9SRC_SRC3       (2 << HRTIM_EECR2_EE9SRC_SHIFT) /* 00: EE9 Src3 */
+#  define HRTIM_EECR2_EE9SRC_SRC4       (3 << HRTIM_EECR2_EE9SRC_SHIFT) /* 00: EE9 Src4 */
+#define HRTIM_EECR2_EE9POL              (1 << 20) /* Bit 20: External Event 9 Polarity */
+#define HRTIM_EECR2_EE9SNS_SHIFT        21        /* Bits 21-22: External Event 9 Sensitivity */
+#define HRTIM_EECR2_EE9SNS_MASK         (3 << HRTIM_EECR2_EE9SNS_SHIFT)
+#  define HRTIM_EECR2_EE9SNS_ACTIV      (0 << HRTIM_EECR2_EE9SNS_SHIFT) /* 00: On active level defined by EE9POL bit */
+#  define HRTIM_EECR2_EE9SNS_REDGE      (1 << HRTIM_EECR2_EE9SNS_SHIFT) /* 01: Rising edge, whatever EE9POL bit value */
+#  define HRTIM_EECR2_EE9SNS_FEDGE      (2 << HRTIM_EECR2_EE9SNS_SHIFT) /* 10: Falling edge, whatever EE9POL bit value */
+#  define HRTIM_EECR2_EE9SNS_BEDGE      (3 << HRTIM_EECR2_EE9SNS_SHIFT) /* 11: Both edges, whatever EE9POL bit value */
+#define HRTIM_EECR2_EE10SRC_SHIFT       24        /* Bits 24-25: External Event 10 Source */
+#define HRTIM_EECR2_EE10SRC_MASK        (3 << HRTIM_EECR2_EE10SRC_SHIFT)
+#  define HRTIM_EECR2_EE10SRC_SRC1      (0 << HRTIM_EECR2_EE10SRC_SHIFT) /* 00: EE10 Src1 */
+#  define HRTIM_EECR2_EE10SRC_SRC2      (1 << HRTIM_EECR2_EE10SRC_SHIFT) /* 00: EE10 Src2 */
+#  define HRTIM_EECR2_EE10SRC_SRC3      (2 << HRTIM_EECR2_EE10SRC_SHIFT) /* 00: EE10 Src3 */
+#  define HRTIM_EECR2_EE10SRC_SRC4      (3 << HRTIM_EECR2_EE10SRC_SHIFT) /* 00: EE10 Src4 */
+#define HRTIM_EECR2_EE10POL             (1 << 26) /* Bit 26: External Event 10 Polarity */
+#define HRTIM_EECR2_EE10SNS_SHIFT       28        /* Bits 27-28: External Event 10 Sensitivity */
+#define HRTIM_EECR2_EE10SNS_MASK        (3 << HRTIM_EECR2_EE10SNS_SHIFT)
+#  define HRTIM_EECR2_EE10SNS_ACTIV     (0 << HRTIM_EECR2_EE10SNS_SHIFT) /* 00: On active level defined by EE10POL bit */
+#  define HRTIM_EECR2_EE10SNS_REDGE     (1 << HRTIM_EECR2_EE10SNS_SHIFT) /* 01: Rising edge, whatever EE10POL bit value */
+#  define HRTIM_EECR2_EE10SNS_FEDGE     (2 << HRTIM_EECR2_EE10SNS_SHIFT) /* 10: Falling edge, whatever EE10POL bit value */
+#  define HRTIM_EECR2_EE10SNS_BEDGE     (3 << HRTIM_EECR2_EE10SNS_SHIFT) /* 11: Both edges, whatever EE10POL bit value */
+
+/* Common External Event Control Register 3 */
+
+#define HRTIM_EECR3_EE6F_SHIFT          0        /* Bits 0-3: External Event 6 Filter */
+#define HRTIM_EECR3_EE6F_MASK           (15 << HRTIM_EECR3_EE6F_SHIFT)
+#  define HRTIM_EECR3_EE6F_NOFLT        (0 << HRTIM_EECR3_EE6F_SHIFT) /* 0000: No filter, FLT5 acts asynchronously */
+#  define HRTIM_EECR3_EE6F_HRTN2        (1 << HRTIM_EECR3_EE6F_SHIFT) /* 0001: fSAMPLING = fHRTIM, N=2 */
+#  define HRTIM_EECR3_EE6F_HRTN4        (2 << HRTIM_EECR3_EE6F_SHIFT) /* 0010: fSAMPLING = fHRTIM, N=4 */
+#  define HRTIM_EECR3_EE6F_HRTN8        (3 << HRTIM_EECR3_EE6F_SHIFT) /* 0011: fSAMPLING = fHRTIM, N=8 */
+#  define HRTIM_EECR3_EE6F_EEVS2N6      (4 << HRTIM_EECR3_EE6F_SHIFT) /* 0100: fSAMPLING = fEEVS/2, N=6 */
+#  define HRTIM_EECR3_EE6F_EEVS2N8      (5 << HRTIM_EECR3_EE6F_SHIFT) /* 0101: fSAMPLING = fEEVS/2, N=8 */
+#  define HRTIM_EECR3_EE6F_EEVS4N6      (6 << HRTIM_EECR3_EE6F_SHIFT) /* 0110: fSAMPLING = fEEVS/4, N=6 */
+#  define HRTIM_EECR3_EE6F_EEVS4N8      (7 << HRTIM_EECR3_EE6F_SHIFT) /* 0111: fSAMPLING = fEEVS/4, N=8 */
+#  define HRTIM_EECR3_EE6F_EEVS8N6      (8 << HRTIM_EECR3_EE6F_SHIFT) /* 1000: fSAMPLING = fEEVS/8, N=6 */
+#  define HRTIM_EECR3_EE6F_EEVS8N8      (9 << HRTIM_EECR3_EE6F_SHIFT) /* 1001: fSAMPLING = fEEVS/8, N=8 */
+#  define HRTIM_EECR3_EE6F_EEVS16N5     (10 << HRTIM_EECR3_EE6F_SHIFT) /* 1010: fSAMPLING = fEEVS/16, N=5 */
+#  define HRTIM_EECR3_EE6F_EEVS16N6     (11 << HRTIM_EECR3_EE6F_SHIFT) /* 1011: fSAMPLING = fEEVS/16, N=6 */
+#  define HRTIM_EECR3_EE6F_EEVS16N8     (12 << HRTIM_EECR3_EE6F_SHIFT) /* 1100: fSAMPLING = fEEVS/16, N=8 */
+#  define HRTIM_EECR3_EE6F_EEVS32N5     (13 << HRTIM_EECR3_EE6F_SHIFT) /* 1101: fSAMPLING = fEEVS/32, N=5 */
+#  define HRTIM_EECR3_EE6F_EEVS32N6     (14 << HRTIM_EECR3_EE6F_SHIFT) /* 1110: fSAMPLING = fEEVS/32, N=6 */
+#  define HRTIM_EECR3_EE6F_EEVS32N8     (15 << HRTIM_EECR3_EE6F_SHIFT) /* 1111: fSAMPLING = fEEVS/32, N=8 */
+#define HRTIM_EECR3_EE7F_SHIFT          6        /* Bits 6-9: External Event 7 Filter */
+#define HRTIM_EECR3_EE7F_MASK           (15 << HRTIM_EECR3_EE7F_SHIFT)
+#  define HRTIM_EECR3_EE7F_NOFLT        (0 << HRTIM_EECR3_EE7F_SHIFT) /* 0000: No filter, FLT5 acts asynchronously */
+#  define HRTIM_EECR3_EE7F_HRTN2        (1 << HRTIM_EECR3_EE7F_SHIFT) /* 0001: fSAMPLING = fHRTIM, N=2 */
+#  define HRTIM_EECR3_EE7F_HRTN4        (2 << HRTIM_EECR3_EE7F_SHIFT) /* 0010: fSAMPLING = fHRTIM, N=4 */
+#  define HRTIM_EECR3_EE7F_HRTN8        (3 << HRTIM_EECR3_EE7F_SHIFT) /* 0011: fSAMPLING = fHRTIM, N=8 */
+#  define HRTIM_EECR3_EE7F_EEVS2N6      (4 << HRTIM_EECR3_EE7F_SHIFT) /* 0100: fSAMPLING = fEEVS/2, N=6 */
+#  define HRTIM_EECR3_EE7F_EEVS2N8      (5 << HRTIM_EECR3_EE7F_SHIFT) /* 0101: fSAMPLING = fEEVS/2, N=8 */
+#  define HRTIM_EECR3_EE7F_EEVS4N6      (6 << HRTIM_EECR3_EE7F_SHIFT) /* 0110: fSAMPLING = fEEVS/4, N=6 */
+#  define HRTIM_EECR3_EE7F_EEVS4N8      (7 << HRTIM_EECR3_EE7F_SHIFT) /* 0111: fSAMPLING = fEEVS/4, N=8 */
+#  define HRTIM_EECR3_EE7F_EEVS8N6      (8 << HRTIM_EECR3_EE7F_SHIFT) /* 1000: fSAMPLING = fEEVS/8, N=6 */
+#  define HRTIM_EECR3_EE7F_EEVS8N8      (9 << HRTIM_EECR3_EE7F_SHIFT) /* 1001: fSAMPLING = fEEVS/8, N=8 */
+#  define HRTIM_EECR3_EE7F_EEVS16N5     (10 << HRTIM_EECR3_EE7F_SHIFT) /* 1010: fSAMPLING = fEEVS/16, N=5 */
+#  define HRTIM_EECR3_EE7F_EEVS16N6     (11 << HRTIM_EECR3_EE7F_SHIFT) /* 1011: fSAMPLING = fEEVS/16, N=6 */
+#  define HRTIM_EECR3_EE7F_EEVS16N8     (12 << HRTIM_EECR3_EE7F_SHIFT) /* 1100: fSAMPLING = fEEVS/16, N=8 */
+#  define HRTIM_EECR3_EE7F_EEVS32N5     (13 << HRTIM_EECR3_EE7F_SHIFT) /* 1101: fSAMPLING = fEEVS/32, N=5 */
+#  define HRTIM_EECR3_EE7F_EEVS32N6     (14 << HRTIM_EECR3_EE7F_SHIFT) /* 1110: fSAMPLING = fEEVS/32, N=6 */
+#  define HRTIM_EECR3_EE7F_EEVS32N8     (15 << HRTIM_EECR3_EE7F_SHIFT) /* 1111: fSAMPLING = fEEVS/32, N=8 */
+#define HRTIM_EECR3_EE8F_SHIFT          12       /* Bits 12-15: External Event 8 Filter */
+#define HRTIM_EECR3_EE8F_MASK           (15 << HRTIM_EECR3_EE8F_SHIFT)
+#  define HRTIM_EECR3_EE8F_NOFLT        (0 << HRTIM_EECR3_EE8F_SHIFT) /* 0000: No filter, FLT5 acts asynchronously */
+#  define HRTIM_EECR3_EE8F_HRTN2        (1 << HRTIM_EECR3_EE8F_SHIFT) /* 0001: fSAMPLING = fHRTIM, N=2 */
+#  define HRTIM_EECR3_EE8F_HRTN4        (2 << HRTIM_EECR3_EE8F_SHIFT) /* 0010: fSAMPLING = fHRTIM, N=4 */
+#  define HRTIM_EECR3_EE8F_HRTN8        (3 << HRTIM_EECR3_EE8F_SHIFT) /* 0011: fSAMPLING = fHRTIM, N=8 */
+#  define HRTIM_EECR3_EE8F_EEVS2N6      (4 << HRTIM_EECR3_EE8F_SHIFT) /* 0100: fSAMPLING = fEEVS/2, N=6 */
+#  define HRTIM_EECR3_EE8F_EEVS2N8      (5 << HRTIM_EECR3_EE8F_SHIFT) /* 0101: fSAMPLING = fEEVS/2, N=8 */
+#  define HRTIM_EECR3_EE8F_EEVS4N6      (6 << HRTIM_EECR3_EE8F_SHIFT) /* 0110: fSAMPLING = fEEVS/4, N=6 */
+#  define HRTIM_EECR3_EE8F_EEVS4N8      (7 << HRTIM_EECR3_EE8F_SHIFT) /* 0111: fSAMPLING = fEEVS/4, N=8 */
+#  define HRTIM_EECR3_EE8F_EEVS8N6      (8 << HRTIM_EECR3_EE8F_SHIFT) /* 1000: fSAMPLING = fEEVS/8, N=6 */
+#  define HRTIM_EECR3_EE8F_EEVS8N8      (9 << HRTIM_EECR3_EE8F_SHIFT) /* 1001: fSAMPLING = fEEVS/8, N=8 */
+#  define HRTIM_EECR3_EE8F_EEVS16N5     (10 << HRTIM_EECR3_EE8F_SHIFT) /* 1010: fSAMPLING = fEEVS/16, N=5 */
+#  define HRTIM_EECR3_EE8F_EEVS16N6     (11 << HRTIM_EECR3_EE8F_SHIFT) /* 1011: fSAMPLING = fEEVS/16, N=6 */
+#  define HRTIM_EECR3_EE8F_EEVS16N8     (12 << HRTIM_EECR3_EE8F_SHIFT) /* 1100: fSAMPLING = fEEVS/16, N=8 */
+#  define HRTIM_EECR3_EE8F_EEVS32N5     (13 << HRTIM_EECR3_EE8F_SHIFT) /* 1101: fSAMPLING = fEEVS/32, N=5 */
+#  define HRTIM_EECR3_EE8F_EEVS32N6     (14 << HRTIM_EECR3_EE8F_SHIFT) /* 1110: fSAMPLING = fEEVS/32, N=6 */
+#  define HRTIM_EECR3_EE8F_EEVS32N8     (15 << HRTIM_EECR3_EE8F_SHIFT) /* 1111: fSAMPLING = fEEVS/32, N=8 */
+#define HRTIM_EECR3_EE9F_SHIFT          18       /* Bits 18-21: External Event 9 Filter */
+#define HRTIM_EECR3_EE9F_MASK           (15 << HRTIM_EECR3_EE9F_SHIFT)
+#  define HRTIM_EECR3_EE9F_NOFLT        (0 << HRTIM_EECR3_EE9F_SHIFT) /* 0000: No filter, FLT5 acts asynchronously */
+#  define HRTIM_EECR3_EE9F_HRTN2        (1 << HRTIM_EECR3_EE9F_SHIFT) /* 0001: fSAMPLING = fHRTIM, N=2 */
+#  define HRTIM_EECR3_EE9F_HRTN4        (2 << HRTIM_EECR3_EE9F_SHIFT) /* 0010: fSAMPLING = fHRTIM, N=4 */
+#  define HRTIM_EECR3_EE9F_HRTN8        (3 << HRTIM_EECR3_EE9F_SHIFT) /* 0011: fSAMPLING = fHRTIM, N=8 */
+#  define HRTIM_EECR3_EE9F_EEVS2N6      (4 << HRTIM_EECR3_EE9F_SHIFT) /* 0100: fSAMPLING = fEEVS/2, N=6 */
+#  define HRTIM_EECR3_EE9F_EEVS2N8      (5 << HRTIM_EECR3_EE9F_SHIFT) /* 0101: fSAMPLING = fEEVS/2, N=8 */
+#  define HRTIM_EECR3_EE9F_EEVS4N6      (6 << HRTIM_EECR3_EE9F_SHIFT) /* 0110: fSAMPLING = fEEVS/4, N=6 */
+#  define HRTIM_EECR3_EE9F_EEVS4N8      (7 << HRTIM_EECR3_EE9F_SHIFT) /* 0111: fSAMPLING = fEEVS/4, N=8 */
+#  define HRTIM_EECR3_EE9F_EEVS8N6      (8 << HRTIM_EECR3_EE9F_SHIFT) /* 1000: fSAMPLING = fEEVS/8, N=6 */
+#  define HRTIM_EECR3_EE9F_EEVS8N8      (9 << HRTIM_EECR3_EE9F_SHIFT) /* 1001: fSAMPLING = fEEVS/8, N=8 */
+#  define HRTIM_EECR3_EE9F_EEVS16N5     (10 << HRTIM_EECR3_EE9F_SHIFT) /* 1010: fSAMPLING = fEEVS/16, N=5 */
+#  define HRTIM_EECR3_EE9F_EEVS16N6     (11 << HRTIM_EECR3_EE9F_SHIFT) /* 1011: fSAMPLING = fEEVS/16, N=6 */
+#  define HRTIM_EECR3_EE9F_EEVS16N8     (12 << HRTIM_EECR3_EE9F_SHIFT) /* 1100: fSAMPLING = fEEVS/16, N=8 */
+#  define HRTIM_EECR3_EE9F_EEVS32N5     (13 << HRTIM_EECR3_EE9F_SHIFT) /* 1101: fSAMPLING = fEEVS/32, N=5 */
+#  define HRTIM_EECR3_EE9F_EEVS32N6     (14 << HRTIM_EECR3_EE9F_SHIFT) /* 1110: fSAMPLING = fEEVS/32, N=6 */
+#  define HRTIM_EECR3_EE9F_EEVS32N8     (15 << HRTIM_EECR3_EE9F_SHIFT) /* 1111: fSAMPLING = fEEVS/32, N=8 */
+#define HRTIM_EECR3_EE10F_SHIFT         24       /* Bits 24-27: External Event 10 Filter */
+#define HRTIM_EECR3_EE10F_MASK          (15 << HRTIM_EECR3_EE10F_SHIFT)
+#  define HRTIM_EECR3_EE10F_NOFLT       (0 << HRTIM_EECR3_EE10F_SHIFT) /* 0000: No filter, FLT5 acts asynchronously */
+#  define HRTIM_EECR3_EE10F_HRTN2       (1 << HRTIM_EECR3_EE10F_SHIFT) /* 0001: fSAMPLING = fHRTIM, N=2 */
+#  define HRTIM_EECR3_EE10F_HRTN4       (2 << HRTIM_EECR3_EE10F_SHIFT) /* 0010: fSAMPLING = fHRTIM, N=4 */
+#  define HRTIM_EECR3_EE10F_HRTN8       (3 << HRTIM_EECR3_EE10F_SHIFT) /* 0011: fSAMPLING = fHRTIM, N=8 */
+#  define HRTIM_EECR3_EE10F_EEVS2N6     (4 << HRTIM_EECR3_EE10F_SHIFT) /* 0100: fSAMPLING = fEEVS/2, N=6 */
+#  define HRTIM_EECR3_EE10F_EEVS2N8     (5 << HRTIM_EECR3_EE10F_SHIFT) /* 0101: fSAMPLING = fEEVS/2, N=8 */
+#  define HRTIM_EECR3_EE10F_EEVS4N6     (6 << HRTIM_EECR3_EE10F_SHIFT) /* 0110: fSAMPLING = fEEVS/4, N=6 */
+#  define HRTIM_EECR3_EE10F_EEVS4N8     (7 << HRTIM_EECR3_EE10F_SHIFT) /* 0111: fSAMPLING = fEEVS/4, N=8 */
+#  define HRTIM_EECR3_EE10F_EEVS8N6     (8 << HRTIM_EECR3_EE10F_SHIFT) /* 1000: fSAMPLING = fEEVS/8, N=6 */
+#  define HRTIM_EECR3_EE10F_EEVS8N8     (9 << HRTIM_EECR3_EE10F_SHIFT) /* 1001: fSAMPLING = fEEVS/8, N=8 */
+#  define HRTIM_EECR3_EE10F_EEVS16N5    (10 << HRTIM_EECR3_EE10F_SHIFT) /* 1010: fSAMPLING = fEEVS/16, N=5 */
+#  define HRTIM_EECR3_EE10F_EEVS16N6    (11 << HRTIM_EECR3_EE10F_SHIFT) /* 1011: fSAMPLING = fEEVS/16, N=6 */
+#  define HRTIM_EECR3_EE10F_EEVS16N8    (12 << HRTIM_EECR3_EE10F_SHIFT) /* 1100: fSAMPLING = fEEVS/16, N=8 */
+#  define HRTIM_EECR3_EE10F_EEVS32N5    (13 << HRTIM_EECR3_EE10F_SHIFT) /* 1101: fSAMPLING = fEEVS/32, N=5 */
+#  define HRTIM_EECR3_EE10F_EEVS32N6    (14 << HRTIM_EECR3_EE10F_SHIFT) /* 1110: fSAMPLING = fEEVS/32, N=6 */
+#  define HRTIM_EECR3_EE10F_EEVS32N8    (15 << HRTIM_EECR3_EE10F_SHIFT) /* 1111: fSAMPLING = fEEVS/32, N=8 */
+#define HRTIM_EECR3_EEVSD_SHIFT         30       /* Bits 30-31: External Event Sampling clock division */
+#define HRTIM_EECR3_EEVSD_MASK          (3 << HRTIM_EECR3_EEVSD_SHIFT)
+#define HRTIM_EECR3_EEVSD_NODIV         (0 << HRTIM_EECR3_EEVSD_SHIFT) /* 00: fEEVS=fHRTIM */
+#define HRTIM_EECR3_EEVSD_d2            (1 << HRTIM_EECR3_EEVSD_SHIFT) /* 01: fEEVS=fHRTIM/2 */
+#define HRTIM_EECR3_EEVSD_d4            (2 << HRTIM_EECR3_EEVSD_SHIFT) /* 10: fEEVS=fHRTIM/4 */
+#define HRTIM_EECR3_EEVSD_d8            (3 << HRTIM_EECR3_EEVSD_SHIFT) /* 11: fEEVS=fHRTIM/8 */
+
+/* Common ADC Trigger 1 Register */
+
+#define HRTIM_ADC1R_AD1MC1             (1 << 0)  /* Bit 0: ADC trigger 1 on Master Compare 1 */
+#define HRTIM_ADC1R_AD1MC2             (1 << 1)  /* Bit 1: ADC trigger 1 on Master Compare 2 */
+#define HRTIM_ADC1R_AD1MC3             (1 << 2)  /* Bit 2: ADC trigger 1 on Master Compare 3 */
+#define HRTIM_ADC1R_AD1MC4             (1 << 3)  /* Bit 3: ADC trigger 1 on Master Compare 4 */
+#define HRTIM_ADC1R_AD1MPER            (1 << 4)  /* Bit 4: ADC trigger 1 on Master Period*/
+#define HRTIM_ADC1R_AD1EEV1            (1 << 5)  /* Bit 5: ADC trigger 1 on External Event 1 */
+#define HRTIM_ADC1R_AD1EEV2            (1 << 6)  /* Bit 6: ADC trigger 1 on External Event 2 */
+#define HRTIM_ADC1R_AD1EEV3            (1 << 7)  /* Bit 7: ADC trigger 1 on External Event 3 */
+#define HRTIM_ADC1R_AD1EEV4            (1 << 8)  /* Bit 8: ADC trigger 1 on External Event 4 */
+#define HRTIM_ADC1R_AD1EEV5            (1 << 9)  /* Bit 9: ADC trigger 1 on External Event 5 */
+#define HRTIM_ADC1R_AD1TAC2            (1 << 10) /* Bit 10: ADC trigger 1 on Timer A Compare 2 */
+#define HRTIM_ADC1R_AD1TAC3            (1 << 11) /* Bit 11: ADC trigger 1 on Timer A Compare 3 */
+#define HRTIM_ADC1R_AD1TAC4            (1 << 12) /* Bit 12: ADC trigger 1 on Timer A Compare 4 */
+#define HRTIM_ADC1R_AD1TAPER           (1 << 13) /* Bit 13: ADC trigger 1 on Timer A Period */
+#define HRTIM_ADC1R_AD1TARST           (1 << 14) /* Bit 14: ADC trigger 1 on Timer A Reset and counter roll-over*/
+#define HRTIM_ADC1R_AD1TBC2            (1 << 15) /* Bit 15: ADC trigger 1 on Timer B Compare 2 */
+#define HRTIM_ADC1R_AD1TBC3            (1 << 16) /* Bit 16: ADC trigger 1 on Timer B Compare 3 */
+#define HRTIM_ADC1R_AD1TBC4            (1 << 17) /* Bit 17: ADC trigger 1 on Timer B Compare 4 */
+#define HRTIM_ADC1R_AD1TBPER           (1 << 18) /* Bit 18: ADC trigger 1 on Timer B Period */
+#define HRTIM_ADC1R_AD1TBRST           (1 << 19) /* Bit 19: ADC trigger 1 on Timer B Reset and counter roll-over */
+#define HRTIM_ADC1R_AD1TCC2            (1 << 20) /* Bit 20: ADC trigger 1 on Timer C Compare 2 */
+#define HRTIM_ADC1R_AD1TCC3            (1 << 21) /* Bit 21: ADC trigger 1 on Timer C Compare 3 */
+#define HRTIM_ADC1R_AD1TCC4            (1 << 22) /* Bit 22: ADC trigger 1 on Timer C Compare 4 */
+#define HRTIM_ADC1R_AD1TCPER           (1 << 23) /* Bit 23: ADC trigger 1 on Timer C Period*/
+#define HRTIM_ADC1R_AD1TDC2            (1 << 24) /* Bit 24: ADC trigger 1 on Timer D Compare 2 */
+#define HRTIM_ADC1R_AD1TDC3            (1 << 25) /* Bit 25: ADC trigger 1 on Timer D Compare 3 */
+#define HRTIM_ADC1R_AD1TDC4            (1 << 26) /* Bit 26: ADC trigger 1 on Timer D Compare 4 */
+#define HRTIM_ADC1R_AD1TDPER           (1 << 27) /* Bit 27: ADC trigger 1 on Timer D Period*/
+#define HRTIM_ADC1R_AD1TEC2            (1 << 28) /* Bit 28: ADC trigger 1 on Timer E Compare 2 */
+#define HRTIM_ADC1R_AD1TEC3            (1 << 29) /* Bit 29: ADC trigger 1 on Timer E Compare 3 */
+#define HRTIM_ADC1R_AD1TEC4            (1 << 30) /* Bit 30: ADC trigger 1 on Timer E Compare 4 */
+#define HRTIM_ADC1R_AD1TEPER           (1 << 31) /* Bit 31: ADC trigger 1 on Timer E Period */
+
+/* Common ADC Trigger 2 Register */
+
+#define HRTIM_ADC2R_AD2MC1             (1 << 0)  /* Bit 0: ADC trigger 2 on Master Compare 1 */
+#define HRTIM_ADC2R_AD2MC2             (1 << 1)  /* Bit 1: ADC trigger 2 on Master Compare 2 */
+#define HRTIM_ADC2R_AD2MC3             (1 << 2)  /* Bit 2: ADC trigger 2 on Master Compare 3 */
+#define HRTIM_ADC2R_AD2MC4             (1 << 3)  /* Bit 3: ADC trigger 2 on Master Compare 4 */
+#define HRTIM_ADC2R_AD2MPER            (1 << 4)  /* Bit 4: ADC trigger 2 on Master Period*/
+#define HRTIM_ADC2R_AD2EEV6            (1 << 5)  /* Bit 5: ADC trigger 2 on External Event 6 */
+#define HRTIM_ADC2R_AD2EEV7            (1 << 6)  /* Bit 6: ADC trigger 2 on External Event 7 */
+#define HRTIM_ADC2R_AD2EEV8            (1 << 7)  /* Bit 7: ADC trigger 2 on External Event 8 */
+#define HRTIM_ADC2R_AD2EEV9            (1 << 8)  /* Bit 8: ADC trigger 2 on External Event 9 */
+#define HRTIM_ADC2R_AD2EEV10           (1 << 9)  /* Bit 9: ADC trigger 2 on External Event 10 */
+#define HRTIM_ADC2R_AD2TAC2            (1 << 10) /* Bit 10: ADC trigger 2 on Timer A Compare 2 */
+#define HRTIM_ADC2R_AD2TAC3            (1 << 11) /* Bit 11: ADC trigger 2 on Timer A Compare 3 */
+#define HRTIM_ADC2R_AD2TAC4            (1 << 12) /* Bit 12: ADC trigger 2 on Timer A Compare 4 */
+#define HRTIM_ADC2R_AD2TAPER           (1 << 13) /* Bit 13: ADC trigger 2 on Timer A Period */
+#define HRTIM_ADC2R_AD2TBC2            (1 << 14) /* Bit 14: ADC trigger 2 on Timer B Compare 2 */
+#define HRTIM_ADC2R_AD2TBC3            (1 << 15) /* Bit 15: ADC trigger 2 on Timer B Compare 3 */
+#define HRTIM_ADC2R_AD2TBC4            (1 << 16) /* Bit 16: ADC trigger 2 on Timer B Compare 4 */
+#define HRTIM_ADC2R_AD2TBPER           (1 << 17) /* Bit 18: ADC trigger 2 on Timer B Period */
+#define HRTIM_ADC2R_AD2TCC2            (1 << 18) /* Bit 19: ADC trigger 2 on Timer C Compare 2 */
+#define HRTIM_ADC2R_AD2TCC3            (1 << 19) /* Bit 20: ADC trigger 2 on Timer C Compare 3 */
+#define HRTIM_ADC2R_AD2TCC4            (1 << 20) /* Bit 21: ADC trigger 2 on Timer C Compare 4 */
+#define HRTIM_ADC2R_AD2TCPER           (1 << 21) /* Bit 22: ADC trigger 2 on Timer C Period*/
+#define HRTIM_ADC2R_AD2TCRST           (1 << 22) /* Bit 22: ADC trigger 2 on Timer C Reset and counter roll-over*/
+#define HRTIM_ADC2R_AD2TDC2            (1 << 23) /* Bit 23: ADC trigger 2 on Timer D Compare 2 */
+#define HRTIM_ADC2R_AD2TDC3            (1 << 24) /* Bit 24: ADC trigger 2 on Timer D Compare 3 */
+#define HRTIM_ADC2R_AD2TDC4            (1 << 25) /* Bit 25: ADC trigger 2 on Timer D Compare 4 */
+#define HRTIM_ADC2R_AD2TDPER           (1 << 26) /* Bit 26: ADC trigger 2 on Timer D Period*/
+#define HRTIM_ADC2R_AD2TDRST           (1 << 27) /* Bit 27: ADC trigger 2 on Timer D Reset and counter roll-over*/
+#define HRTIM_ADC2R_AD2TEC2            (1 << 28) /* Bit 28: ADC trigger 2 on Timer E Compare 2 */
+#define HRTIM_ADC2R_AD2TEC3            (1 << 29) /* Bit 29: ADC trigger 2 on Timer E Compare 3 */
+#define HRTIM_ADC2R_AD2TEC4            (1 << 30) /* Bit 30: ADC trigger 2 on Timer E Compare 4 */
+#define HRTIM_ADC2R_AD2TERST           (1 << 31) /* Bit 31: ADC trigger 2 on Timer E Reset and counter roll-over */
+
+/* Common ADC Trigger 3 Register */
+
+#define HRTIM_ADC3R_AD3MC1             (1 << 0)  /* Bit 0: ADC trigger 3 on Master Compare 1 */
+#define HRTIM_ADC3R_AD3MC2             (1 << 1)  /* Bit 1: ADC trigger 3 on Master Compare 2 */
+#define HRTIM_ADC3R_AD3MC3             (1 << 2)  /* Bit 2: ADC trigger 3 on Master Compare 3 */
+#define HRTIM_ADC3R_AD3MC4             (1 << 3)  /* Bit 3: ADC trigger 3 on Master Compare 4 */
+#define HRTIM_ADC3R_AD3MPER            (1 << 4)  /* Bit 4: ADC trigger 3 on Master Period*/
+#define HRTIM_ADC3R_AD3EEV1            (1 << 5)  /* Bit 5: ADC trigger 3 on External Event 1 */
+#define HRTIM_ADC3R_AD3EEV2            (1 << 6)  /* Bit 6: ADC trigger 3 on External Event 2 */
+#define HRTIM_ADC3R_AD3EEV3            (1 << 7)  /* Bit 7: ADC trigger 3 on External Event 3 */
+#define HRTIM_ADC3R_AD3EEV4            (1 << 8)  /* Bit 8: ADC trigger 3 on External Event 4 */
+#define HRTIM_ADC3R_AD3EEV5            (1 << 9)  /* Bit 9: ADC trigger 3 on External Event 5 */
+#define HRTIM_ADC3R_AD3TAC2            (1 << 10) /* Bit 10: ADC trigger 3 on Timer A Compare 2 */
+#define HRTIM_ADC3R_AD3TAC3            (1 << 11) /* Bit 11: ADC trigger 3 on Timer A Compare 3 */
+#define HRTIM_ADC3R_AD3TAC4            (1 << 12) /* Bit 12: ADC trigger 3 on Timer A Compare 4 */
+#define HRTIM_ADC3R_AD3TAPER           (1 << 13) /* Bit 13: ADC trigger 3 on Timer A Period */
+#define HRTIM_ADC3R_AD3TARST           (1 << 14) /* Bit 14: ADC trigger 3 on Timer A Reset and counter roll-over*/
+#define HRTIM_ADC3R_AD3TBC2            (1 << 15) /* Bit 15: ADC trigger 3 on Timer B Compare 2 */
+#define HRTIM_ADC3R_AD3TBC3            (1 << 16) /* Bit 16: ADC trigger 3 on Timer B Compare 3 */
+#define HRTIM_ADC3R_AD3TBC4            (1 << 17) /* Bit 17: ADC trigger 3 on Timer B Compare 4 */
+#define HRTIM_ADC3R_AD3TBPER           (1 << 18) /* Bit 18: ADC trigger 3 on Timer B Period */
+#define HRTIM_ADC3R_AD3TBRST           (1 << 19) /* Bit 19: ADC trigger 3 on Timer B Reset and counter roll-over */
+#define HRTIM_ADC3R_AD3TCC2            (1 << 20) /* Bit 20: ADC trigger 3 on Timer C Compare 2 */
+#define HRTIM_ADC3R_AD3TCC3            (1 << 21) /* Bit 21: ADC trigger 3 on Timer C Compare 3 */
+#define HRTIM_ADC3R_AD3TCC4            (1 << 22) /* Bit 22: ADC trigger 3 on Timer C Compare 4 */
+#define HRTIM_ADC3R_AD3TCPER           (1 << 23) /* Bit 23: ADC trigger 3 on Timer C Period*/
+#define HRTIM_ADC3R_AD3TDC2            (1 << 24) /* Bit 24: ADC trigger 3 on Timer D Compare 2 */
+#define HRTIM_ADC3R_AD3TDC3            (1 << 25) /* Bit 25: ADC trigger 3 on Timer D Compare 3 */
+#define HRTIM_ADC3R_AD3TDC4            (1 << 26) /* Bit 26: ADC trigger 3 on Timer D Compare 4 */
+#define HRTIM_ADC3R_AD3TDPER           (1 << 27) /* Bit 27: ADC trigger 3 on Timer D Period*/
+#define HRTIM_ADC3R_AD3TEC2            (1 << 28) /* Bit 28: ADC trigger 3 on Timer E Compare 2 */
+#define HRTIM_ADC3R_AD3TEC3            (1 << 29) /* Bit 29: ADC trigger 3 on Timer E Compare 3 */
+#define HRTIM_ADC3R_AD3TEC4            (1 << 30) /* Bit 30: ADC trigger 3 on Timer E Compare 4 */
+#define HRTIM_ADC3R_AD3TEPER           (1 << 31) /* Bit 31: ADC trigger 3 on Timer E Period */
+
+/* Common ADC Trigger 4 Register */
+
+#define HRTIM_ADC4R_AD4MC1             (1 << 0)  /* Bit 0: ADC trigger 4 on Master Compare 1 */
+#define HRTIM_ADC4R_AD4MC2             (1 << 1)  /* Bit 1: ADC trigger 4 on Master Compare 2 */
+#define HRTIM_ADC4R_AD4MC3             (1 << 2)  /* Bit 2: ADC trigger 4 on Master Compare 3 */
+#define HRTIM_ADC4R_AD4MC4             (1 << 3)  /* Bit 3: ADC trigger 4 on Master Compare 4 */
+#define HRTIM_ADC4R_AD4MPER            (1 << 4)  /* Bit 4: ADC trigger 4 on Master Period*/
+#define HRTIM_ADC4R_AD4EEV6            (1 << 5)  /* Bit 5: ADC trigger 4 on External Event 6 */
+#define HRTIM_ADC4R_AD4EEV7            (1 << 6)  /* Bit 6: ADC trigger 4 on External Event 7 */
+#define HRTIM_ADC4R_AD4EEV8            (1 << 7)  /* Bit 7: ADC trigger 4 on External Event 8 */
+#define HRTIM_ADC4R_AD4EEV9            (1 << 8)  /* Bit 8: ADC trigger 4 on External Event 9 */
+#define HRTIM_ADC4R_AD4EEV10           (1 << 9)  /* Bit 9: ADC trigger 4 on External Event 10 */
+#define HRTIM_ADC4R_AD4TAC2            (1 << 10) /* Bit 10: ADC trigger 4 on Timer A Compare 2 */
+#define HRTIM_ADC4R_AD4TAC3            (1 << 11) /* Bit 11: ADC trigger 4 on Timer A Compare 3 */
+#define HRTIM_ADC4R_AD4TAC4            (1 << 12) /* Bit 12: ADC trigger 4 on Timer A Compare 4 */
+#define HRTIM_ADC4R_AD4TAPER           (1 << 13) /* Bit 13: ADC trigger 4 on Timer A Period */
+#define HRTIM_ADC4R_AD4TBC2            (1 << 14) /* Bit 14: ADC trigger 4 on Timer B Compare 2 */
+#define HRTIM_ADC4R_AD4TBC3            (1 << 15) /* Bit 15: ADC trigger 4 on Timer B Compare 3 */
+#define HRTIM_ADC4R_AD4TBC4            (1 << 16) /* Bit 16: ADC trigger 4 on Timer B Compare 4 */
+#define HRTIM_ADC4R_AD4TBPER           (1 << 17) /* Bit 18: ADC trigger 4 on Timer B Period */
+#define HRTIM_ADC4R_AD4TCC2            (1 << 18) /* Bit 19: ADC trigger 4 on Timer C Compare 2 */
+#define HRTIM_ADC4R_AD4TCC3            (1 << 19) /* Bit 20: ADC trigger 4 on Timer C Compare 3 */
+#define HRTIM_ADC4R_AD4TCC4            (1 << 20) /* Bit 21: ADC trigger 4 on Timer C Compare 4 */
+#define HRTIM_ADC4R_AD4TCPER           (1 << 21) /* Bit 22: ADC trigger 4 on Timer C Period*/
+#define HRTIM_ADC4R_AD4TCRST           (1 << 22) /* Bit 22: ADC trigger 4 on Timer C Reset and counter roll-over*/
+#define HRTIM_ADC4R_AD4TDC2            (1 << 23) /* Bit 23: ADC trigger 4 on Timer D Compare 2 */
+#define HRTIM_ADC4R_AD4TDC3            (1 << 24) /* Bit 24: ADC trigger 4 on Timer D Compare 3 */
+#define HRTIM_ADC4R_AD4TDC4            (1 << 25) /* Bit 25: ADC trigger 4 on Timer D Compare 4 */
+#define HRTIM_ADC4R_AD4TDPER           (1 << 26) /* Bit 26: ADC trigger 4 on Timer D Period*/
+#define HRTIM_ADC4R_AD4TDRST           (1 << 27) /* Bit 27: ADC trigger 4 on Timer D Reset and counter roll-over*/
+#define HRTIM_ADC4R_AD4TEC2            (1 << 28) /* Bit 28: ADC trigger 4 on Timer E Compare 2 */
+#define HRTIM_ADC4R_AD4TEC3            (1 << 29) /* Bit 29: ADC trigger 4 on Timer E Compare 3 */
+#define HRTIM_ADC4R_AD4TEC4            (1 << 30) /* Bit 30: ADC trigger 4 on Timer E Compare 4 */
+#define HRTIM_ADC4R_AD4TERST           (1 << 31) /* Bit 31: ADC trigger 4 on Timer E Reset and counter roll-over */
+
+
+/* Common DLL Control Register */
+
+#define HRTIM_DLLCR_CAL                (1 << 0)  /* Bit 0: DLL Calibration Start */
+#define HRTIM_DLLCR_CALEN              (1 << 1)  /* Bit 1: DLL Calibration Enable */
+#define HRTIM_DLLCR_CALRTE_SHIFT       2         /* Bits 2-3: DLL Calibration rate */
+#define HRTIM_DLLCR_CALRTE_MASK        (3 << HRTIM_DLLCR_CALRTE_SHIFT)
+#  define HRTIM_DLLCR_CALRTE_1048576   (0 << HRTIM_DLLCR_CALRTE_SHIFT) /* 00: 1048576 * tHRTIM */
+#  define HRTIM_DLLCR_CALRTE_131072    (1 << HRTIM_DLLCR_CALRTE_SHIFT) /* 01: 131072 * tHRTIM */
+#  define HRTIM_DLLCR_CALRTE_16384     (2 << HRTIM_DLLCR_CALRTE_SHIFT) /* 10: 16384 * tHRTIM */
+#  define HRTIM_DLLCR_CALRTE_2048      (3 << HRTIM_DLLCR_CALRTE_SHIFT) /* 11: 2048 * tHRTIM */
+
+/* Common Fault Input Register 1 */
+
+#define HRTIM_FLTINR1_FLT1E            (1 << 0) /* Bit 0: Fault 1 enable */
+#define HRTIM_FLTINR1_FLT1P            (1 << 1) /* Bit 1: Fault 1 polarity */
+#define HRTIM_FLTINR1_FLT1SRC          (1 << 2) /* Bit 2: Fault 1 source */
+#define HRTIM_FLTINR1_FLT1F_SHIFT      3        /* Bits 3-6: Fault 1 source */
+#define HRTIM_FLTINR1_FLT1F_MASK       (15 << HRTIM_FLTINR1_FLT1F_SHIFT)
+#  define HRTIM_FLTINR1_FLT1F_NOFLT    (0 << HRTIM_FLTINR1_FLT1F_SHIFT) /* 0000: No filter, FLT5 acts asynchronously */
+#  define HRTIM_FLTINR1_FLT1F_HRTN2    (1 << HRTIM_FLTINR1_FLT1F_SHIFT) /* 0001: fSAMPLING = fHRTIM, N=2 */
+#  define HRTIM_FLTINR1_FLT1F_HRTN4    (2 << HRTIM_FLTINR1_FLT1F_SHIFT) /* 0010: fSAMPLING = fHRTIM, N=4 */
+#  define HRTIM_FLTINR1_FLT1F_HRTN8    (3 << HRTIM_FLTINR1_FLT1F_SHIFT) /* 0011: fSAMPLING = fHRTIM, N=8 */
+#  define HRTIM_FLTINR1_FLT1F_FLTS2N6  (4 << HRTIM_FLTINR1_FLT1F_SHIFT) /* 0100: fSAMPLING = fFLTS/2, N=6 */
+#  define HRTIM_FLTINR1_FLT1F_FLTS2N8  (5 << HRTIM_FLTINR1_FLT1F_SHIFT) /* 0101: fSAMPLING = fFLTS/2, N=8 */
+#  define HRTIM_FLTINR1_FLT1F_FLTS4N6  (6 << HRTIM_FLTINR1_FLT1F_SHIFT) /* 0110: fSAMPLING = fFLTS/4, N=6 */
+#  define HRTIM_FLTINR1_FLT1F_FLTS4N8  (7 << HRTIM_FLTINR1_FLT1F_SHIFT) /* 0111: fSAMPLING = fFLTS/4, N=8 */
+#  define HRTIM_FLTINR1_FLT1F_FLTS8N6  (8 << HRTIM_FLTINR1_FLT1F_SHIFT) /* 1000: fSAMPLING = fFLTS/8, N=6 */
+#  define HRTIM_FLTINR1_FLT1F_FLTS8N8  (9 << HRTIM_FLTINR1_FLT1F_SHIFT) /* 1001: fSAMPLING = fFLTS/8, N=8 */
+#  define HRTIM_FLTINR1_FLT1F_FLTS16N5 (10 << HRTIM_FLTINR1_FLT1F_SHIFT) /* 1010: fSAMPLING = fFLTS/16, N=5 */
+#  define HRTIM_FLTINR1_FLT1F_FLTS16N6 (11 << HRTIM_FLTINR1_FLT1F_SHIFT) /* 1011: fSAMPLING = fFLTS/16, N=6 */
+#  define HRTIM_FLTINR1_FLT1F_FLTS16N8 (12 << HRTIM_FLTINR1_FLT1F_SHIFT) /* 1100: fSAMPLING = fFLTS/16, N=8 */
+#  define HRTIM_FLTINR1_FLT1F_FLTS32N5 (13 << HRTIM_FLTINR1_FLT1F_SHIFT) /* 1101: fSAMPLING = fFLTS/32, N=5 */
+#  define HRTIM_FLTINR1_FLT1F_FLTS32N6 (14 << HRTIM_FLTINR1_FLT1F_SHIFT) /* 1110: fSAMPLING = fFLTS/32, N=6 */
+#  define HRTIM_FLTINR1_FLT1F_FLTS32N8 (15 << HRTIM_FLTINR1_FLT1F_SHIFT) /* 1111: fSAMPLING = fFLTS/32, N=8 */
+#define HRTIM_FLTINR1_FLT1LCK          (1 << 7)  /* Bit 7: Fault 1 lock */
+#define HRTIM_FLTINR1_FLT2E            (1 << 8)  /* Bit 8: Fault 2 enable */
+#define HRTIM_FLTINR1_FLT2P            (1 << 9)  /* Bit 9: Fault 2 polarity */
+#define HRTIM_FLTINR1_FLT2SRC          (1 << 10) /* Bit 10: Fault 2 source */
+#define HRTIM_FLTINR1_FLT2F_SHIFT      11        /* Bits 11-14: Fault 2 source */
+#define HRTIM_FLTINR1_FLT2F_MASK       (15 << HRTIM_FLTINR1_FLT2F_SHIFT)
+#  define HRTIM_FLTINR1_FLT2F_NOFLT    (0 << HRTIM_FLTINR1_FLT2F_SHIFT) /* 0000: No filter, FLT5 acts asynchronously */
+#  define HRTIM_FLTINR1_FLT2F_HRTN2    (1 << HRTIM_FLTINR1_FLT2F_SHIFT) /* 0001: fSAMPLING = fHRTIM, N=2 */
+#  define HRTIM_FLTINR1_FLT2F_HRTN4    (2 << HRTIM_FLTINR1_FLT2F_SHIFT) /* 0010: fSAMPLING = fHRTIM, N=4 */
+#  define HRTIM_FLTINR1_FLT2F_HRTN8    (3 << HRTIM_FLTINR1_FLT2F_SHIFT) /* 0011: fSAMPLING = fHRTIM, N=8 */
+#  define HRTIM_FLTINR1_FLT2F_FLTS2N6  (4 << HRTIM_FLTINR1_FLT2F_SHIFT) /* 0100: fSAMPLING = fFLTS/2, N=6 */
+#  define HRTIM_FLTINR1_FLT2F_FLTS2N8  (5 << HRTIM_FLTINR1_FLT2F_SHIFT) /* 0101: fSAMPLING = fFLTS/2, N=8 */
+#  define HRTIM_FLTINR1_FLT2F_FLTS4N6  (6 << HRTIM_FLTINR1_FLT2F_SHIFT) /* 0110: fSAMPLING = fFLTS/4, N=6 */
+#  define HRTIM_FLTINR1_FLT2F_FLTS4N8  (7 << HRTIM_FLTINR1_FLT2F_SHIFT) /* 0111: fSAMPLING = fFLTS/4, N=8 */
+#  define HRTIM_FLTINR1_FLT2F_FLTS8N6  (8 << HRTIM_FLTINR1_FLT2F_SHIFT) /* 1000: fSAMPLING = fFLTS/8, N=6 */
+#  define HRTIM_FLTINR1_FLT2F_FLTS8N8  (9 << HRTIM_FLTINR1_FLT2F_SHIFT) /* 1001: fSAMPLING = fFLTS/8, N=8 */
+#  define HRTIM_FLTINR1_FLT2F_FLTS16N5 (10 << HRTIM_FLTINR1_FLT2F_SHIFT) /* 1010: fSAMPLING = fFLTS/16, N=5 */
+#  define HRTIM_FLTINR1_FLT2F_FLTS16N6 (11 << HRTIM_FLTINR1_FLT2F_SHIFT) /* 1011: fSAMPLING = fFLTS/16, N=6 */
+#  define HRTIM_FLTINR1_FLT2F_FLTS16N8 (12 << HRTIM_FLTINR1_FLT2F_SHIFT) /* 1100: fSAMPLING = fFLTS/16, N=8 */
+#  define HRTIM_FLTINR1_FLT2F_FLTS32N5 (13 << HRTIM_FLTINR1_FLT2F_SHIFT) /* 1101: fSAMPLING = fFLTS/32, N=5 */
+#  define HRTIM_FLTINR1_FLT2F_FLTS32N6 (14 << HRTIM_FLTINR1_FLT2F_SHIFT) /* 1110: fSAMPLING = fFLTS/32, N=6 */
+#  define HRTIM_FLTINR1_FLT2F_FLTS32N8 (15 << HRTIM_FLTINR1_FLT2F_SHIFT) /* 1111: fSAMPLING = fFLTS/32, N=8 */
+#define HRTIM_FLTINR1_FLT2LCK          (1 << 15) /* Bit 15: Fault 2 lock */
+#define HRTIM_FLTINR1_FLT3E            (1 << 16) /* Bit 16: Fault 3 enable */
+#define HRTIM_FLTINR1_FLT3P            (1 << 17) /* Bit 17: Fault 3 polarity */
+#define HRTIM_FLTINR1_FLT3SRC          (1 << 18) /* Bit 18: Fault 3 source */
+#define HRTIM_FLTINR1_FLT3F_SHIFT      19        /* Bits 19-22: Fault 3 source */
+#define HRTIM_FLTINR1_FLT3F_MASK       (15 << HRTIM_FLTINR1_FLT3F_SHIFT)
+#  define HRTIM_FLTINR1_FLT3F_NOFLT    (0 << HRTIM_FLTINR1_FLT3F_SHIFT) /* 0000: No filter, FLT5 acts asynchronously */
+#  define HRTIM_FLTINR1_FLT3F_HRTN2    (1 << HRTIM_FLTINR1_FLT3F_SHIFT) /* 0001: fSAMPLING = fHRTIM, N=2 */
+#  define HRTIM_FLTINR1_FLT3F_HRTN4    (2 << HRTIM_FLTINR1_FLT3F_SHIFT) /* 0010: fSAMPLING = fHRTIM, N=4 */
+#  define HRTIM_FLTINR1_FLT3F_HRTN8    (3 << HRTIM_FLTINR1_FLT3F_SHIFT) /* 0011: fSAMPLING = fHRTIM, N=8 */
+#  define HRTIM_FLTINR1_FLT3F_FLTS2N6  (4 << HRTIM_FLTINR1_FLT3F_SHIFT) /* 0100: fSAMPLING = fFLTS/2, N=6 */
+#  define HRTIM_FLTINR1_FLT3F_FLTS2N8  (5 << HRTIM_FLTINR1_FLT3F_SHIFT) /* 0101: fSAMPLING = fFLTS/2, N=8 */
+#  define HRTIM_FLTINR1_FLT3F_FLTS4N6  (6 << HRTIM_FLTINR1_FLT3F_SHIFT) /* 0110: fSAMPLING = fFLTS/4, N=6 */
+#  define HRTIM_FLTINR1_FLT3F_FLTS4N8  (7 << HRTIM_FLTINR1_FLT3F_SHIFT) /* 0111: fSAMPLING = fFLTS/4, N=8 */
+#  define HRTIM_FLTINR1_FLT3F_FLTS8N6  (8 << HRTIM_FLTINR1_FLT3F_SHIFT) /* 1000: fSAMPLING = fFLTS/8, N=6 */
+#  define HRTIM_FLTINR1_FLT3F_FLTS8N8  (9 << HRTIM_FLTINR1_FLT3F_SHIFT) /* 1001: fSAMPLING = fFLTS/8, N=8 */
+#  define HRTIM_FLTINR1_FLT3F_FLTS16N5 (10 << HRTIM_FLTINR1_FLT3F_SHIFT) /* 1010: fSAMPLING = fFLTS/16, N=5 */
+#  define HRTIM_FLTINR1_FLT3F_FLTS16N6 (11 << HRTIM_FLTINR1_FLT3F_SHIFT) /* 1011: fSAMPLING = fFLTS/16, N=6 */
+#  define HRTIM_FLTINR1_FLT3F_FLTS16N8 (12 << HRTIM_FLTINR1_FLT3F_SHIFT) /* 1100: fSAMPLING = fFLTS/16, N=8 */
+#  define HRTIM_FLTINR1_FLT3F_FLTS32N5 (13 << HRTIM_FLTINR1_FLT3F_SHIFT) /* 1101: fSAMPLING = fFLTS/32, N=5 */
+#  define HRTIM_FLTINR1_FLT3F_FLTS32N6 (14 << HRTIM_FLTINR1_FLT3F_SHIFT) /* 1110: fSAMPLING = fFLTS/32, N=6 */
+#  define HRTIM_FLTINR1_FLT3F_FLTS32N8 (15 << HRTIM_FLTINR1_FLT3F_SHIFT) /* 1111: fSAMPLING = fFLTS/32, N=8 */
+#define HRTIM_FLTINR1_FLT3LCK          (1 << 23) /* Bit 23: Fault 3 lock */
+#define HRTIM_FLTINR1_FLT4E            (1 << 24) /* Bit 24: Fault 4 enable */
+#define HRTIM_FLTINR1_FLT4P            (1 << 25) /* Bit 25: Fault 4 polarity */
+#define HRTIM_FLTINR1_FLT4SRC          (1 << 26) /* Bit 26: Fault 4 source */
+#define HRTIM_FLTINR1_FLT4F_SHIFT      27        /* Bits 27-30: Fault 4 source */
+#define HRTIM_FLTINR1_FLT4F_MASK       (15 << HRTIM_FLTINR1_FLT4F_SHIFT)
+#  define HRTIM_FLTINR1_FLT4F_NOFLT    (0 << HRTIM_FLTINR1_FLT4F_SHIFT) /* 0000: No filter, FLT5 acts asynchronously */
+#  define HRTIM_FLTINR1_FLT4F_HRTN2    (1 << HRTIM_FLTINR1_FLT4F_SHIFT) /* 0001: fSAMPLING = fHRTIM, N=2 */
+#  define HRTIM_FLTINR1_FLT4F_HRTN4    (2 << HRTIM_FLTINR1_FLT4F_SHIFT) /* 0010: fSAMPLING = fHRTIM, N=4 */
+#  define HRTIM_FLTINR1_FLT4F_HRTN8    (3 << HRTIM_FLTINR1_FLT4F_SHIFT) /* 0011: fSAMPLING = fHRTIM, N=8 */
+#  define HRTIM_FLTINR1_FLT4F_FLTS2N6  (4 << HRTIM_FLTINR1_FLT4F_SHIFT) /* 0100: fSAMPLING = fFLTS/2, N=6 */
+#  define HRTIM_FLTINR1_FLT4F_FLTS2N8  (5 << HRTIM_FLTINR1_FLT4F_SHIFT) /* 0101: fSAMPLING = fFLTS/2, N=8 */
+#  define HRTIM_FLTINR1_FLT4F_FLTS4N6  (6 << HRTIM_FLTINR1_FLT4F_SHIFT) /* 0110: fSAMPLING = fFLTS/4, N=6 */
+#  define HRTIM_FLTINR1_FLT4F_FLTS4N8  (7 << HRTIM_FLTINR1_FLT4F_SHIFT) /* 0111: fSAMPLING = fFLTS/4, N=8 */
+#  define HRTIM_FLTINR1_FLT4F_FLTS8N6  (8 << HRTIM_FLTINR1_FLT4F_SHIFT) /* 1000: fSAMPLING = fFLTS/8, N=6 */
+#  define HRTIM_FLTINR1_FLT4F_FLTS8N8  (9 << HRTIM_FLTINR1_FLT4F_SHIFT) /* 1001: fSAMPLING = fFLTS/8, N=8 */
+#  define HRTIM_FLTINR1_FLT4F_FLTS16N5 (10 << HRTIM_FLTINR1_FLT4F_SHIFT) /* 1010: fSAMPLING = fFLTS/16, N=5 */
+#  define HRTIM_FLTINR1_FLT4F_FLTS16N6 (11 << HRTIM_FLTINR1_FLT4F_SHIFT) /* 1011: fSAMPLING = fFLTS/16, N=6 */
+#  define HRTIM_FLTINR1_FLT4F_FLTS16N8 (12 << HRTIM_FLTINR1_FLT4F_SHIFT) /* 1100: fSAMPLING = fFLTS/16, N=8 */
+#  define HRTIM_FLTINR1_FLT4F_FLTS32N5 (13 << HRTIM_FLTINR1_FLT4F_SHIFT) /* 1101: fSAMPLING = fFLTS/32, N=5 */
+#  define HRTIM_FLTINR1_FLT4F_FLTS32N6 (14 << HRTIM_FLTINR1_FLT4F_SHIFT) /* 1110: fSAMPLING = fFLTS/32, N=6 */
+#  define HRTIM_FLTINR1_FLT4F_FLTS32N8 (15 << HRTIM_FLTINR1_FLT4F_SHIFT) /* 1111: fSAMPLING = fFLTS/32, N=8 */
+#define HRTIM_FLTINR1_FLT4LCK          (1 << 31) /* Bit 31: Fault 4 lock */
+
+/* Common Fault Input Register 2 */
+
+#define HRTIM_FLTINR2_FLT5E            (1 << 0) /* Bit 0: Fault 5 enable */
+#define HRTIM_FLTINR2_FLT5P            (1 << 1) /* Bit 1: Fault 5 polarity */
+#define HRTIM_FLTINR2_FLT5SRC          (1 << 2) /* Bit 2: Fault 5 source */
+#define HRTIM_FLTINR2_FLT5F_SHIFT      3        /* Bits 3-6: Fault 5 source */
+#define HRTIM_FLTINR2_FLT5F_MASK       (15 << HRTIM_FLTINR2_FLT5F_SHIFT)
+#  define HRTIM_FLTINR2_FLT5F_NOFLT    (0 << HRTIM_FLTINR2_FLT5F_SHIFT) /* 0000: No filter, FLT5 acts asynchronously */
+#  define HRTIM_FLTINR2_FLT5F_HRTN2    (1 << HRTIM_FLTINR2_FLT5F_SHIFT) /* 0001: fSAMPLING = fHRTIM, N=2 */
+#  define HRTIM_FLTINR2_FLT5F_HRTN4    (2 << HRTIM_FLTINR2_FLT5F_SHIFT) /* 0010: fSAMPLING = fHRTIM, N=4 */
+#  define HRTIM_FLTINR2_FLT5F_HRTN8    (3 << HRTIM_FLTINR2_FLT5F_SHIFT) /* 0011: fSAMPLING = fHRTIM, N=8 */
+#  define HRTIM_FLTINR2_FLT5F_FLTS2N6  (4 << HRTIM_FLTINR2_FLT5F_SHIFT) /* 0100: fSAMPLING = fFLTS/2, N=6 */
+#  define HRTIM_FLTINR2_FLT5F_FLTS2N8  (5 << HRTIM_FLTINR2_FLT5F_SHIFT) /* 0101: fSAMPLING = fFLTS/2, N=8 */
+#  define HRTIM_FLTINR2_FLT5F_FLTS4N6  (6 << HRTIM_FLTINR2_FLT5F_SHIFT) /* 0110: fSAMPLING = fFLTS/4, N=6 */
+#  define HRTIM_FLTINR2_FLT5F_FLTS4N8  (7 << HRTIM_FLTINR2_FLT5F_SHIFT) /* 0111: fSAMPLING = fFLTS/4, N=8 */
+#  define HRTIM_FLTINR2_FLT5F_FLTS8N6  (8 << HRTIM_FLTINR2_FLT5F_SHIFT) /* 1000: fSAMPLING = fFLTS/8, N=6 */
+#  define HRTIM_FLTINR2_FLT5F_FLTS8N8  (9 << HRTIM_FLTINR2_FLT5F_SHIFT) /* 1001: fSAMPLING = fFLTS/8, N=8 */
+#  define HRTIM_FLTINR2_FLT5F_FLTS16N5 (10 << HRTIM_FLTINR2_FLT5F_SHIFT) /* 1010: fSAMPLING = fFLTS/16, N=5 */
+#  define HRTIM_FLTINR2_FLT5F_FLTS16N6 (11 << HRTIM_FLTINR2_FLT5F_SHIFT) /* 1011: fSAMPLING = fFLTS/16, N=6 */
+#  define HRTIM_FLTINR2_FLT5F_FLTS16N8 (12 << HRTIM_FLTINR2_FLT5F_SHIFT) /* 1100: fSAMPLING = fFLTS/16, N=8 */
+#  define HRTIM_FLTINR2_FLT5F_FLTS32N5 (13 << HRTIM_FLTINR2_FLT5F_SHIFT) /* 1101: fSAMPLING = fFLTS/32, N=5 */
+#  define HRTIM_FLTINR2_FLT5F_FLTS32N6 (14 << HRTIM_FLTINR2_FLT5F_SHIFT) /* 1110: fSAMPLING = fFLTS/32, N=6 */
+#  define HRTIM_FLTINR2_FLT5F_FLTS32N8 (15 << HRTIM_FLTINR2_FLT5F_SHIFT) /* 1111: fSAMPLING = fFLTS/32, N=8 */
+#define HRTIM_FLTINR2_FLT5LCK          (1 << 7) /* Bit 7: Fault 5 lock */
+#define HRTIM_FLTINR2_FLTSD_SWITCH     24       /* Bits 24-25: Fault Sampling clock division */
+#define HRTIM_FLTINR2_FLTSD_MASK       (3 << HRTIM_FLTINR2_FLTSD_SWITCH)
+#  define HRTIM_FLTINR2_FLTSD_NODIV    (0 << HRTIM_FLTINR2_FLTSD_SWITCH) /* 00: fFLTS=fHRTIM */
+#  define HRTIM_FLTINR2_FLTSD_d2       (1 << HRTIM_FLTINR2_FLTSD_SWITCH) /* 01: fFLTS=fHRTIM/2 */
+#  define HRTIM_FLTINR2_FLTSD_d4       (2 << HRTIM_FLTINR2_FLTSD_SWITCH) /* 10: fFLTS=fHRTIM/4 */
+#  define HRTIM_FLTINR2_FLTSD_d8       (3 << HRTIM_FLTINR2_FLTSD_SWITCH) /* 11: fFLTS=fHRTIM/8 */
+
+/* Common Burst DMA Master Timer Update Register */
+
+#define HRTIM_BDMUPR_MCR               (1 << 0)  /* Bit 0: MCR register update enable */
+#define HRTIM_BDMUPR_MICR              (1 << 1)  /* Bit 1: MICR register update enable  */
+#define HRTIM_BDMUPR_MDIER             (1 << 2)  /* Bit 2: MDIER register update enable  */
+#define HRTIM_BDMUPR_MCNT              (1 << 3)  /* Bit 3: MCNTR register update enable */
+#define HRTIM_BDMUPR_MPER              (1 << 4)  /* Bit 4: MPER register update enable */
+#define HRTIM_BDMUPR_MREP              (1 << 5)  /* Bit 5: MREP register update enable */
+#define HRTIM_BDMUPR_MCMP1             (1 << 6)  /* Bit 6: MCMP1R register update enable */
+#define HRTIM_BDMUPR_MCMP2             (1 << 7)  /* Bit 7: MCMP2R register update enable */
+#define HRTIM_BDMUPR_MCMP3             (1 << 8)  /* Bit 8: MCMP3R register update enable */
+#define HRTIM_BDMUPR_MCMP4             (1 << 9)  /* Bit 9: MCMP4R register update enable */
+
+/* Common Burst DMA Timer X Update Register (Timer A-E)*/
+
+#define HRTIM_BDTxUPR_CR               (1 << 0)  /* Bit 0: HRTIM_TIMxCR register update enablce */
+#define HRTIM_BDTxUPR_ICR              (1 << 1)  /* Bit 1: HRTIM_TIMxICR register update enablce */
+#define HRTIM_BDTxUPR_DIER             (1 << 2)  /* Bit 2: HRTIM_TIMxDIER register update enablce */
+#define HRTIM_BDTxUPR_CNT              (1 << 3)  /* Bit 3: HRTIM_CNTxR register update enablce */
+#define HRTIM_BDTxUPR_PER              (1 << 4)  /* Bit 4: HRTIM_PERxR register update enablce */
+#define HRTIM_BDTxUPR_REP              (1 << 5)  /* Bit 5: HRTIM_REPxR register update enablce */
+#define HRTIM_BDTxUPR_CMP1             (1 << 6)  /* Bit 6: HRTIM_CMP1xR register update enablce */
+#define HRTIM_BDTxUPR_CMP2             (1 << 7)  /* Bit 7: HRTIM_CMP2xR register update enablce */
+#define HRTIM_BDTxUPR_CMP3             (1 << 8)  /* Bit 8: HRTIM_CMP3xR register update enablce */
+#define HRTIM_BDTxUPR_CMP4             (1 << 9)  /* Bit 9: HRTIM_CMP4xR register update enablce */
+#define HRTIM_BDTxUPR_DTR              (1 << 10) /* Bit 10: HRTIM_DTxR register update enablce */
+#define HRTIM_BDTxUPR_SET1R            (1 << 11) /* Bit 11: HRTIM_SET1xR register update enablce */
+#define HRTIM_BDTxUPR_RST1R            (1 << 12) /* Bit 12: HRTIM_RST1xR register update enablce */
+#define HRTIM_BDTxUPR_SET2R            (1 << 13) /* Bit 13: HRTIM_SET2xR register update enablce */
+#define HRTIM_BDTxUPR_RST2R            (1 << 14) /* Bit 14: HRTIM_RST2xR register update enablce */
+#define HRTIM_BDTxUPR_EEFR1            (1 << 15) /* Bit 15: HRTIM_EEFxR1 register update enablce */
+#define HRTIM_BDTxUPR_EEFR2            (1 << 16) /* Bit 16: HRTIM_EEFxR2 register update enablce */
+#define HRTIM_BDTxUPR_RSTR             (1 << 17) /* Bit 17: HRTIM_RSTxR register update enablce */
+#define HRTIM_BDTxUPR_CHPR             (1 << 18) /* Bit 18: HRTIM_CHRxR register update enablce */
+#define HRTIM_BDTxUPR_OUTR             (1 << 19) /* Bit 19: HRTIM_OUTxR register update enablce */
+#define HRTIM_BDTxUPR_FLTR             (1 << 20) /* Bit 20: HRTIM_FLTxR register update enablce */
+
+/* Common Burst DMA Data Register */
+
+#define HRTIM_BDMADR_SHIFT             0         /* Bits 0-31: Burst DMA Data register */
+#define HRTIM_BDMADR_MASK              (0xffffffff << HRTIM_BDMADR_SHIFT)
+
+#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32_HRTIM_H */
diff --git a/arch/arm/src/stm32/chip/stm32f33xxx_memorymap.h b/arch/arm/src/stm32/chip/stm32f33xxx_memorymap.h
new file mode 100644
index 0000000000000000000000000000000000000000..85e5ce175d615d44e0c5eabc06269bf225e962ae
--- /dev/null
+++ b/arch/arm/src/stm32/chip/stm32f33xxx_memorymap.h
@@ -0,0 +1,151 @@
+/************************************************************************************
+ * arch/arm/src/stm32/chip/stm32f33xxx_memorymap.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *   Modified for STM32F334 by Mateusz Szafoni 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32F33XXX_MEMORYMAP_H
+#define __ARCH_ARM_SRC_STM32_CHIP_STM32F33XXX_MEMORYMAP_H
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* STM32F33XXX Address Blocks *******************************************************/
+
+#define STM32_CODE_BASE      0x00000000     /* 0x00000000-0x1fffffff: 512Mb code block */
+#define STM32_SRAM_BASE      0x20000000     /* 0x20000000-0x3fffffff: 512Mb sram block */
+#define STM32_PERIPH_BASE    0x40000000     /* 0x40000000-0x5fffffff: 512Mb peripheral block */
+                                            /* 0x60000000-0xdfffffff: Reserved */
+#define STM32_CORTEX_BASE    0xe0000000     /* 0xe0000000-0xffffffff: 512Mb Cortex-M4 block */
+
+#define STM32_REGION_MASK    0xf0000000
+#define STM32_IS_SRAM(a)     ((((uint32_t)(a)) & STM32_REGION_MASK) == STM32_SRAM_BASE)
+
+/* Code Base Addresses **************************************************************/
+
+#define STM32_BOOT_BASE      0x00000000     /* 0x00000000-0x0000ffff: Aliased boot memory */
+                                            /* 0x00010000-0x07ffffff: Reserved */
+#define STM32_FLASH_BASE     0x08000000     /* 0x08000000-0x0800ffff: FLASH memory */
+                                            /* 0x08100000-0x1ffeffff: Reserved */
+#define STM32_CCMRAM_BASE    0x10000000     /* 0x10000000-0x10000fff: 4Kb CCM data RAM */
+                                            /* 0x10001000-0x1ffeffff: Reserved */
+#define STM32_SYSMEM_BASE    0x1fffd800     /* 0x1fff0000-0x1fff7a0f: System memory */
+                                            /* 0x1fff7a10-0x1fff7fff: Reserved */
+#define STM32_OPTION_BASE    0x1ffff800     /* 0x1fffc000-0x1fffc007: Option bytes */
+                                            /* 0x1fffc008-0x1fffffff: Reserved */
+
+
+/* System Memory Addresses **********************************************************/
+
+#define STM32_SYSMEM_UID     0x1ffff7ac     /* The 96-bit unique device identifier */
+#define STM32_SYSMEM_FSIZE   0x1ffff7cc     /* This bitfield indicates the size of
+                                             * the device Flash memory expressed in
+                                             * Kbytes.  Example: 0x040 corresponds
+                                             * to 64 Kbytes
+                                             */
+
+/* Peripheral Base Addresses ********************************************************/
+
+#define STM32_APB1_BASE      0x40000000     /* 0x40000000-0x40009fff: APB1 */
+                                            /* 0x4000a000-0x4000ffff: Reserved */
+#define STM32_APB2_BASE      0x40010000     /* 0x40010000-0x40006bff: APB2 */
+                                            /* 0x40016c00-0x4001ffff: Reserved */
+#define STM32_AHB1_BASE      0x40020000     /* 0x40020000-0x400243ff: APB1 */
+                                            /* 0x40024400-0x4007ffff: Reserved */
+#define STM32_AHB2_BASE      0x48000000     /* 0x48000000-0x480017ff: AHB2 */
+                                            /* 0x48001800-0x4fffffff: Reserved */
+#define STM32_AHB3_BASE      0x50000000     /* 0x50000000-0x500003ff: AHB3 */
+
+/* APB1 Base Addresses **************************************************************/
+
+#define STM32_TIM2_BASE      0x40000000     /* 0x40000000-0x400003ff TIM2 */
+#define STM32_TIM3_BASE      0x40000400     /* 0x40000400-0x400007ff TIM3 */
+#define STM32_TIM6_BASE      0x40001000     /* 0x40001000-0x400013ff TIM6 */
+#define STM32_TIM7_BASE      0x40001400     /* 0x40001400-0x400017ff TIM7 */
+#define STM32_RTC_BASE       0x40002800     /* 0x40002800-0x40002bff RTC */
+#define STM32_BKP_BASE       0x40002850     /* 0x40002850-0x400028cc BKP */
+#define STM32_WWDG_BASE      0x40002c00     /* 0x40002c00-0x40002fff WWDG */
+#define STM32_IWDG_BASE      0x40003000     /* 0x40003000-0x400033ff IWDG */
+#define STM32_USART2_BASE    0x40004400     /* 0x40004400-0x400047ff USART2 */
+#define STM32_USART3_BASE    0x40004800     /* 0x40004800-0x40004bff USART3 */
+#define STM32_I2C1_BASE      0x40005400     /* 0x40005400-0x400057ff I2C1 */
+#define STM32_CAN1_BASE      0x40006400     /* 0x40006400-0x400067ff bxCAN */
+#define STM32_PWR_BASE       0x40007000     /* 0x40007000-0x400073ff PWR */
+#define STM32_DAC1_BASE      0x40007400     /* 0x40007400-0x400077ff DAC1 */
+#define STM32_DAC2_BASE      0x40009800     /* 0x40009800-0x40009bff DAC2 */
+
+/* APB2 Base Addresses **************************************************************/
+
+#define STM32_SYSCFG_BASE    0x40010000     /* 0x40010000-0x400103FF SYSCFG, and */
+#define STM32_COMP_BASE      0x40010000     /* COMP, and */
+#define STM32_OPAMP_BASE     0x40010000     /* OPAMP */
+#define STM32_EXTI_BASE      0x40010400     /* 0x40010400-0x400107FF EXTI */
+#define STM32_TIM1_BASE      0x40012c00     /* 0x40012c00-0x40012fff TIM1 */
+#define STM32_SPI1_BASE      0x40013000     /* 0x40013000-0x400133ff SPI1 */
+#define STM32_USART1_BASE    0x40013800     /* 0x40013800-0x40013bff USART1 */
+#define STM32_TIM15_BASE     0x40014000     /* 0x40014000-0x400143ff TIM15 */
+#define STM32_TIM16_BASE     0x40014400     /* 0x40014400-0x400147ff TIM16 */
+#define STM32_TIM17_BASE     0x40014800     /* 0x40014800-0x40014bff TIM17 */
+#define STM32_HRTIM1_BASE    0x40017400     /* 0x40017400-0x400177ff HRTIM1 */
+
+/* AHB1 Base Addresses **************************************************************/
+
+#define STM32_DMA1_BASE      0x40020000     /* 0x40020000-0x400203ff: DMA1  */
+#define STM32_RCC_BASE       0x40021000     /* 0x40021000-0x400213ff: Reset and Clock control RCC */
+#define STM32_FLASHIF_BASE   0x40022000     /* 0x40022000-0x400223ff: Flash memory interface */
+#define STM32_CRC_BASE       0x40023000     /* 0x40023000-0x400233ff: CRC */
+#define STM32_TSC_BASE       0x40024000     /* 0x40024000-0x400243ff: TSC */
+
+/* AHB2 Base Addresses **************************************************************/
+
+#define STM32_GPIOA_BASE     0x48000000     /* 0x48000000-0x480003ff: GPIO Port A */
+#define STM32_GPIOB_BASE     0x48000400     /* 0x48000400-0x480007ff: GPIO Port B */
+#define STM32_GPIOC_BASE     0x48000800     /* 0x48000800-0x48000bff: GPIO Port C */
+#define STM32_GPIOD_BASE     0X48000C00     /* 0x48000c00-0x48000fff: GPIO Port D */
+#define STM32_GPIOE_BASE     0X48001000     /* 0x48001000-0x480013ff: GPIO Port E */
+#define STM32_GPIOF_BASE     0x48001400     /* 0x48001400-0x480017ff: GPIO Port F */
+
+/* AHB3 Base Addresses **************************************************************/
+
+#define STM32_ADC12_BASE      0x50000000     /* 0x50000000-0x500003ff: ADC12 */
+
+/* Cortex-M4 Base Addresses *********************************************************/
+/* Other registers -- see armv7-m/nvic.h for standard Cortex-M4 registers in this
+ * address range
+ */
+
+#define STM32_SCS_BASE      0xe000e000
+#define STM32_DEBUGMCU_BASE 0xe0042000
+
+#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F33XXX_MEMORYMAP_H */
diff --git a/arch/arm/src/stm32/chip/stm32f33xxx_opamp.h b/arch/arm/src/stm32/chip/stm32f33xxx_opamp.h
new file mode 100644
index 0000000000000000000000000000000000000000..a6940bb0550feaa2f295490e6cc450561afef149
--- /dev/null
+++ b/arch/arm/src/stm32/chip/stm32f33xxx_opamp.h
@@ -0,0 +1,117 @@
+/****************************************************************************************************
+ * arch/arm/src/stm32/chip/stm32f33xxx_opamp.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Mateusz Szafoni 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32_OPAMP_H
+#define __ARCH_ARM_SRC_STM32_CHIP_STM32_OPAMP_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+/* Register Offsets *********************************************************************************/
+
+#define STM32_OPAMP2_CSR_OFFSET     0x003C    /* OPAMP2 Control register */
+
+/* Register Addresses *******************************************************************************/
+
+#define STM32_OPAMP2_CSR            (STM32_OPAMP2_BASE+STM32_OPAMP2_CSR_OFFSET)
+
+/* Register Bitfield Definitions ****************************************************/
+
+/* OPAMP control and status register */
+
+#define OPAMP_CSR_OPAMPEN           (1 << 0)    /* Bit 0: OPAMP enable */
+#define OPAMP_CSR_FORCE_VP          (1 << 1)    /* Bit 1: Force a calibration reference voltage on non-nverting */
+                                                /* input and disables external connections */
+#define OPAMP_CSR_VPSEL_SHIFT       (3)         /* Bits 2-3: OPAMP non inverting input selection */
+#define OPAMP_CSR_VPSEL_MASK        (3 << OPAMP_CSR_VPSEL_SHIFT)
+                                                                    /* 00: Reserved  */
+#  define OPAMP_CSR_VPSEL_PB13      (1 << OPAMP_CSR_VPSEL_SHIFT)    /* 01: PB14 */
+#  define OPAMP_CSR_VPSEL_PB0       (2 << OPAMP_CSR_VPSEL_SHIFT)    /* 10: PB0 */
+#  define OPAMP_CSR_VPSEL_PA7       (3 << OPAMP_CSR_VPSEL_SHIFT)    /* 11: PA7 */
+                                                /* Bit 4: Reserved  */
+#define OPAMP_CSR_VMSEL_SHIFT       (5)         /* Bits 5-6: OPAMP inverting input selection */
+#define OPAMP_CSR_VMSEL_MASK        (3 << OPAMP_CSR_VMSEL_SHIFT)
+#  define OPAMP_CSR_VMSEL_PC5       (0 << OPAMP_CSR_VMSEL_SHIFT)    /* 00: PC5 */
+#  define OPAMP_CSR_VMSEL_PA5       (1 << OPAMP_CSR_VMSEL_SHIFT)    /* 01: PA5 */
+#  define OPAMP_CSR_VMSEL_RESISTOR  (2 << OPAMP_CSR_VMSEL_SHIFT)    /* 10: Resistor feedback output */
+#  define OPAMP_CSR_VMSEL_FOLLOWER  (3 << OPAMP_CSR_VMSEL_SHIFT)    /* 11: Follower mode */
+#define OPAMP_CSR_TCMEN             (1 << 7)    /* Bit 7: Timer controlled Mux mode enable */
+#define OPAMP_CSR_VMSSEL            (1 << 8)    /* Bit 8: OPAMP inverting input secondary selection */
+#define OPAMP_CSR_VPSSEL_SHIFT      (1 << 9)    /* Bits 9-10: OPAMP Non inverting input secondary selection */
+#define OPAMP_CSR_VPSSEL_MASK       (3 << OPAMP_CSR_VPSSEL_SHIFT)
+                                                                    /* 00: Reserved */
+#  define OPAMP_CSR_VPSSEL_PB14     (1 << OPAMP_CSR_VPSSEL_SHIFT)   /* 01: PB14 */
+#  define OPAMP_CSR_VPSSEL_PB0      (2 << OPAMP_CSR_VPSSEL_SHIFT)   /* 10: PB0 */
+#  define OPAMP_CSR_VPSSEL_PA7      (3 << OPAMP_CSR_VPSSEL_SHIFT)   /* 11: PA7 */
+#define OPAMP_CSR_CALON             (1 << 11)   /* Bit 11: Calibration mode enable */
+#define OPAMP_CSR_CALSEL_SHIFT      (12)        /* Bits 12-13: Calibration selection */
+#define OPAMP_CSR_CALSEL_MASK       (3 << OPAMP_CSR_CALSEL_SHIFT)
+#  define OPAMP_CSR_CALSEL_3P3      (0 << OPAMP_CSR_CALSEL_SHIFT)   /* 00 V_REFOPAMP = 3.3% V_DDA */
+#  define OPAMP_CSR_CALSEL_10       (1 << OPAMP_CSR_CALSEL_SHIFT)   /* 01 V_REFOPAMP = 10% V_DDA */
+#  define OPAMP_CSR_CALSEL_50       (2 << OPAMP_CSR_CALSEL_SHIFT)   /* 10 V_REFOPAMP = 50% V_DDA */
+#  define OPAMP_CSR_CALSEL_90       (3 << OPAMP_CSR_CALSEL_SHIFT)   /* 11 V_REFOPAMP = 90% V_DDA */
+#define OPAMP_CSR_PGAGAIN_SHIFT     (14)        /* Bits 14-17: Gain in PGA mode  */
+#define OPAMP_CSR_PGAGAIN_MASK      (15 << OPAMP_CSR_PGAGAIN_SHIFT)
+#  define OPAMP_CSR_PGAGAIN_2       (0 << OPAMP_CSR_PGAGAIN_SHIFT)  /* 0X00: Non-inverting gain = 2 */
+#  define OPAMP_CSR_PGAGAIN_4       (1 << OPAMP_CSR_PGAGAIN_SHIFT)  /* 0X01: Non-inverting gain = 4 */
+#  define OPAMP_CSR_PGAGAIN_8       (2 << OPAMP_CSR_PGAGAIN_SHIFT)  /* 0X1-: Non-inverting gain = 8 */
+#  define OPAMP_CSR_PGAGAIN_16      (3 << OPAMP_CSR_PGAGAIN_SHIFT)  /* 0X11: Non-inverting gain = 16 */
+#  define OPAMP_CSR_PGAGAIN_2VM0    (8 << OPAMP_CSR_PGAGAIN_SHIFT)  /* 1000: Non-inverting gain = 2 - VM0*/
+#  define OPAMP_CSR_PGAGAIN_4VM0    (9 << OPAMP_CSR_PGAGAIN_SHIFT)  /* 1001: Non-inverting gain = 4 - VM0*/
+#  define OPAMP_CSR_PGAGAIN_8VM0    (10 << OPAMP_CSR_PGAGAIN_SHIFT) /* 1010: Non-inverting gain = 8 - VM0*/
+#  define OPAMP_CSR_PGAGAIN_16VM0   (11 << OPAMP_CSR_PGAGAIN_SHIFT) /* 1011: Non-inverting gain = 16 - VM0*/
+#  define OPAMP_CSR_PGAGAIN_2VM1    (12 << OPAMP_CSR_PGAGAIN_SHIFT) /* 1100: Non-inverting gain = 2 - VM1*/
+#  define OPAMP_CSR_PGAGAIN_4VM1    (13 << OPAMP_CSR_PGAGAIN_SHIFT) /* 1101: Non-inverting gain = 4 - VM1*/
+#  define OPAMP_CSR_PGAGAIN_8VM1    (14 << OPAMP_CSR_PGAGAIN_SHIFT) /* 1110: Non-inverting gain = 8 - VM1*/
+#  define OPAMP_CSR_PGAGAIN_16VM1   (15 << OPAMP_CSR_PGAGAIN_SHIFT) /* 1111: Non-inverting gain = 16 - VM1*/
+#define OPAMP_CSR_USERTRIM          (1 << 18)   /* Bit 18: User trimming enable */
+#define OPAMP_CSR_TRIMOFFSETP_SHIFT (19)        /* Bits 19-23: Offset trimming value (PMOS)*/
+#define OPAMP_CSR_TRIMOFFSETP_MASK  (31 << OPAMP_CSR_TRIMOFFSETP_SHIFT)
+#define OPAMP_CSR_TRIMOFFSETN_SHIFT (24)        /* Bits 24-28: Offset trimming value (NMOS) */
+#define OPAMP_CSR_TRIMOFFSETN_MASK  (31 << OPAMP_CSR_TRIMOFFSETN_SHIFT)
+#define OPAMP_CSR_TSTREF            (1 << 29)   /* Bit 29:  Output the internal reference voltage */
+#define OPAMP_CSR_OUTCAL            (1 << 30)   /* Bit 30: OPAMP output status flag */
+#define OPAMP_CSR_LOCK              (1 << 31)   /* Bit 31: OPAMP 2 lock */
+
+#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32_OPAMP_H */
diff --git a/arch/arm/src/stm32/chip/stm32f33xxx_pinmap.h b/arch/arm/src/stm32/chip/stm32f33xxx_pinmap.h
new file mode 100644
index 0000000000000000000000000000000000000000..b5b97c88da098d8912e583e416cebe3ba2a17338
--- /dev/null
+++ b/arch/arm/src/stm32/chip/stm32f33xxx_pinmap.h
@@ -0,0 +1,464 @@
+/************************************************************************************
+ * arch/arm/src/stm32/chip/stm32f33xxx_pinmap.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *   Modified for STM32F334 by Mateusz Szafoni 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32F33XXX_PINMAP_H
+#define __ARCH_ARM_SRC_STM32_CHIP_STM32F33XXX_PINMAP_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "stm32_gpio.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Alternate Pin Functions.  All members of the STM32F33xxx family share the same
+ * pin multiplexing (although they may differ in the pins physically available).
+ *
+ * Alternative pin selections are provided with a numeric suffix like _1, _2, etc.
+ * Drivers, however, will use the pin selection without the numeric suffix.
+ * Additional definitions are required in the board.h file.  For example, if
+ * CAN1_RX connects vis PA11 on some board, then the following definitions should
+ * appear inthe board.h header file for that board:
+ *
+ * #define GPIO_CAN1_RX GPIO_CAN1_RX_1
+ *
+ * The driver will then automatically configre PA11 as the CAN1 RX pin.
+ */
+
+/* WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!!
+ * Additional effort is required to select specific GPIO options such as frequency,
+ * open-drain/push-pull, and pull-up/down!  Just the basics are defined for most
+ * pins in this file.
+ */
+
+/* ADC */
+
+#define GPIO_ADC1_IN1       (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_ADC1_IN2       (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_ADC1_IN3       (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_ADC1_IN4       (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN3)
+#undef GPIO_ADC1_IN5
+#define GPIO_ADC1_IN6       (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN0)
+#define GPIO_ADC1_IN7       (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN1)
+#define GPIO_ADC1_IN8       (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN2)
+#define GPIO_ADC1_IN9       (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN3)
+#undef GPIO_ADC1_IN10
+#define GPIO_ADC1_IN11      (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_ADC1_IN12      (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_ADC1_IN13      (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN13)
+
+#define GPIO_ADC2_IN1       (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_ADC2_IN2       (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_ADC2_IN3       (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_ADC2_IN4       (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_ADC2_IN5       (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN4)
+#define GPIO_ADC2_IN6       (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN0)
+#define GPIO_ADC2_IN7       (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN1)
+#define GPIO_ADC2_IN8       (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN2)
+#define GPIO_ADC2_IN9       (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN3)
+#undef GPIO_ADC2_IN10
+#define GPIO_ADC2_IN11      (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN5)
+#define GPIO_ADC2_IN12      (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN2)
+#define GPIO_ADC2_IN13      (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN12)
+#define GPIO_ADC2_IN14      (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_ADC2_IN15      (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN15)
+
+/* CAN */
+
+#define GPIO_CAN_RX_1       (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_CAN_RX_2       (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8)
+#undef GPIO_CAN_RX_3
+#define GPIO_CAN_TX_1       (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN12)
+#define GPIO_CAN_TX_2       (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9)
+#undef GPIO_CAN_TX_3
+
+
+/* Comparator Outputs */
+
+#define GPIO_COMP2_OUT_1    (GPIO_ALT|GPIO_AF8|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_COMP2_OUT_2    (GPIO_ALT|GPIO_AF8|GPIO_PORTA|GPIO_PIN12)
+#define GPIO_COMP2_OUT_3    (GPIO_ALT|GPIO_AF8|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_COMP4_OUT      (GPIO_ALT|GPIO_AF8|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_COMP6_OUT_1    (GPIO_ALT|GPIO_AF8|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_COMP6_OUT_2    (GPIO_ALT|GPIO_AF7|GPIO_PORTC|GPIO_PIN6)
+
+/* Comparator Inputs non inverting*/
+
+#define GPIO_COMP2_INP     (GPIO_ALT|GPIO_AF8|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_COMP4_INP     (GPIO_ALT|GPIO_AF8|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_COMP6_INP     (GPIO_ALT|GPIO_AF8|GPIO_PORTB|GPIO_PIN11)
+
+/* Comparator Inputs inverting*/
+
+#define GPIO_COMP2_INM      (GPIO_ALT|GPIO_AF8|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_COMP4_INM_1    (GPIO_ALT|GPIO_AF8|GPIO_PORTB|GPIO_PIN2)
+#define GPIO_COMP4_INM_2    (GPIO_ALT|GPIO_AF8|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_COMP6_INM_1    (GPIO_ALT|GPIO_AF8|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_COMP6_INM_2    (GPIO_ALT|GPIO_AF8|GPIO_PORTB|GPIO_PIN15)
+
+
+/* DAC -" Once the DAC channelx is enabled, the corresponding GPIO pin
+ * (PA4 or PA5) is automatically connected to the analog converter output
+ * (DACy_OUTx). In order to avoid parasitic consumption, the PA4 or PA5 pin
+ * should first be configured to analog (AIN)".
+ */
+
+#define GPIO_DAC1_OUT1      (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_DAC1_OUT2      (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_DAC2_OUT1      (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN6)
+
+/* I2C */
+
+#define GPIO_I2C1_SCL_1     (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN15)
+#define GPIO_I2C1_SCL_2     (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_I2C1_SCL_3     (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_I2C1_SDA_1     (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN14)
+#define GPIO_I2C1_SDA_2     (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_I2C1_SDA_3     (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_I2C1_SMBA      (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5)
+
+/* IR */
+
+#define GPIO_IR_OUT_1       (GPIO_ALT|GPIO_AF5|GPIO_PORTA|GPIO_PIN13)
+#define GPIO_IR_OUT_2       (GPIO_ALT|GPIO_AF6|GPIO_PORTB|GPIO_PIN9)
+
+/* JTAG/SWD */
+
+#define GPIO_JTDI           (GPIO_ALT|GPIO_AF0|GPIO_PORTA|GPIO_PIN15)
+#define GPIO_JTDO_TRACES_WO (GPIO_ALT|GPIO_AF0|GPIO_PORTB|GPIO_PIN3)
+#define GPIO_NJTRST         (GPIO_ALT|GPIO_AF0|GPIO_PORTB|GPIO_PIN4)
+#define GPIO_SWCLK_JTCK     (GPIO_ALT|GPIO_AF0|GPIO_PORTA|GPIO_PIN14)
+#define GPIO_SWDIO_JTMS     (GPIO_ALT|GPIO_AF0|GPIO_PORTA|GPIO_PIN13)
+
+/* MCO */
+
+#define GPIO_MCO       	     (GPIO_ALT|GPIO_AF0|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8)
+
+/* SPI */
+
+#define GPIO_SPI1_MISO_1    (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_SPI1_MISO_2    (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN4)
+#define GPIO_SPI1_MOSI_1    (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_SPI1_MOSI_2    (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_SPI1_NSS_1     (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_SPI1_NSS_2     (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN15)
+#define GPIO_SPI1_SCK_1     (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_SPI1_SCK_2     (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN3)
+
+/* Timers */
+
+#define GPIO_TIM1_BKIN_1    (GPIO_ALT|GPIO_AF12|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_TIM1_BKIN_2    (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN14)
+#define GPIO_TIM1_BKIN_3    (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_TIM1_BKIN_4    (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN12)
+#define GPIO_TIM1_BKIN2_1   (GPIO_ALT|GPIO_AF12|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_TIM1_BKIN2_2   (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN3)
+#define GPIO_TIM1_CH1IN_1   (GPIO_ALT|GPIO_FLOAT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN8)
+#define GPIO_TIM1_CH1OUT_1  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN8)
+#define GPIO_TIM1_CH1IN_2   (GPIO_ALT|GPIO_FLOAT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN0)
+#define GPIO_TIM1_CH1OUT_2  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN0)
+#define GPIO_TIM1_CH1N_1    (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN13)
+#define GPIO_TIM1_CH1N_2    (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_TIM1_CH1N_3    (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_TIM1_CH1N_4    (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN13)
+#define GPIO_TIM1_CH2IN     (GPIO_ALT|GPIO_FLOAT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN9)
+#define GPIO_TIM1_CH2OUT    (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN9)
+#define GPIO_TIM1_CH2N_1    (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN12)
+#define GPIO_TIM1_CH2N_2    (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_TIM1_CH2N_3    (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_TIM1_CH3IN_1   (GPIO_ALT|GPIO_FLOAT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_TIM1_CH3OUT_1  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_TIM1_CH3IN_2   (GPIO_ALT|GPIO_FLOAT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN2)
+#define GPIO_TIM1_CH3OUT_2  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN2)
+#define GPIO_TIM1_CH3N_1    (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN15)
+#define GPIO_TIM1_CH3N_2    (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_TIM1_CH3N_3    (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTF|GPIO_PIN0)
+#define GPIO_TIM1_CH4IN_1   (GPIO_ALT|GPIO_FLOAT|GPIO_AF11|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_TIM1_CH4OUT_1  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF11|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_TIM1_CH4IN_2   (GPIO_ALT|GPIO_FLOAT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN3)
+#define GPIO_TIM1_CH4OUT_2  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN3)
+#define GPIO_TIM1_ETR_1     (GPIO_ALT|GPIO_FLOAT|GPIO_AF11|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN12)
+#define GPIO_TIM1_ETR_2     (GPIO_ALT|GPIO_FLOAT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN4)
+
+#define GPIO_TIM2_CH1_ETR_1 (GPIO_ALT|GPIO_FLOAT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_TIM2_CH1_ETR_2 (GPIO_ALT|GPIO_FLOAT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN15)
+#define GPIO_TIM2_CH1_ETR_3 (GPIO_ALT|GPIO_FLOAT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_TIM2_CH2IN_1   (GPIO_ALT|GPIO_FLOAT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_TIM2_CH2OUT_1  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_TIM2_CH2IN_2   (GPIO_ALT|GPIO_FLOAT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN3)
+#define GPIO_TIM2_CH2OUT_2  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN3)
+#define GPIO_TIM2_CH3IN_1   (GPIO_ALT|GPIO_FLOAT|GPIO_AF10|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN9)
+#define GPIO_TIM2_CH3OUT_1  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF10|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN9)
+#define GPIO_TIM2_CH3IN_2   (GPIO_ALT|GPIO_FLOAT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_TIM2_CH3OUT_2  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_TIM2_CH3IN_3   (GPIO_ALT|GPIO_FLOAT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_TIM2_CH3OUT_3  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_TIM2_CH4IN_1   (GPIO_ALT|GPIO_FLOAT|GPIO_AF10|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_TIM2_CH4OUT_1  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF10|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_TIM2_CH4IN_2   (GPIO_ALT|GPIO_FLOAT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_TIM2_CH4OUT_2  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_TIM2_CH4IN_3   (GPIO_ALT|GPIO_FLOAT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_TIM2_CH4OUT_3  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN11)
+
+#define GPIO_TIM3_CH1IN_1   (GPIO_ALT|GPIO_FLOAT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_TIM3_CH1OUT_1  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_TIM3_CH1IN_2   (GPIO_ALT|GPIO_FLOAT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN4)
+#define GPIO_TIM3_CH1OUT_2  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN4)
+#define GPIO_TIM3_CH1IN_3   (GPIO_ALT|GPIO_FLOAT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_TIM3_CH1OUT_3  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_TIM3_CH2IN_1   (GPIO_ALT|GPIO_FLOAT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_TIM3_CH2OUT_1  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_TIM3_CH2IN_2   (GPIO_ALT|GPIO_FLOAT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_TIM3_CH2OUT_2  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_TIM3_CH2IN_3   (GPIO_ALT|GPIO_FLOAT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_TIM3_CH2OUT_3  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_TIM3_CH2IN_4   (GPIO_ALT|GPIO_FLOAT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_TIM3_CH2OUT_4  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_TIM3_CH3IN_1   (GPIO_ALT|GPIO_FLOAT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_TIM3_CH3OUT_1  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_TIM3_CH3IN_2   (GPIO_ALT|GPIO_FLOAT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_TIM3_CH3OUT_2  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_TIM3_CH4IN_1   (GPIO_ALT|GPIO_FLOAT|GPIO_AF10|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_TIM3_CH4OUT_1  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF10|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_TIM3_CH4IN_2   (GPIO_ALT|GPIO_FLOAT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_TIM3_CH4OUT_2  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_TIM3_CH4IN_3   (GPIO_ALT|GPIO_FLOAT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_TIM3_CH4OUT_3  (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_TIM3_ETR_1     (GPIO_ALT|GPIO_FLOAT|GPIO_AF10|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN3)
+#define GPIO_TIM3_ETR_2     (GPIO_ALT|GPIO_FLOAT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTD|GPIO_PIN2)
+
+#define GPIO_TIM15_BKIN     (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN9)
+#define GPIO_TIM15_CH1IN_1  (GPIO_ALT|GPIO_FLOAT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_TIM15_CH1OUT_1 (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_TIM15_CH1IN_2  (GPIO_ALT|GPIO_FLOAT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_TIM15_CH1OUT_2 (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_TIM15_CH1N_1   (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN15)
+#define GPIO_TIM15_CH1N_2   (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_TIM15_CH2IN_1  (GPIO_ALT|GPIO_FLOAT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN15)
+#define GPIO_TIM15_CH2OUT_1 (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN15)
+#define GPIO_TIM15_CH2IN_2  (GPIO_ALT|GPIO_FLOAT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_TIM15_CH2OUT_2 (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN3)
+
+#define GPIO_TIM16_BKIN     (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_TIM16_CH1IN_1  (GPIO_ALT|GPIO_FLOAT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN12)
+#define GPIO_TIM16_CH1OUT_1 (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN12)
+#define GPIO_TIM16_CH1IN_2  (GPIO_ALT|GPIO_FLOAT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_TIM16_CH1OUT_2 (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_TIM16_CH1IN_3  (GPIO_ALT|GPIO_FLOAT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN4)
+#define GPIO_TIM16_CH1OUT_3 (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN4)
+#define GPIO_TIM16_CH1IN_4  (GPIO_ALT|GPIO_FLOAT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_TIM16_CH1OUT_4 (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_TIM16_CH1N_1   (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN13)
+#define GPIO_TIM16_CH1N_2   (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN6)
+
+#define GPIO_TIM17_BKIN_1   (GPIO_ALT|GPIO_AF10|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN4)
+#define GPIO_TIM17_BKIN_2   (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_TIM17_CH1IN_1  (GPIO_ALT|GPIO_FLOAT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_TIM17_CH1OUT_1 (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_TIM17_CH1IN_2  (GPIO_ALT|GPIO_FLOAT|GPIO_AF10|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_TIM17_CH1OUT_2 (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF10|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_TIM17_CH1IN_3  (GPIO_ALT|GPIO_FLOAT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_TIM17_CH1OUT_3 (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_TIM17_CH1N     (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN7)
+
+/* HRTIM */
+
+#define GPIO_HRTIM1_SCOUT_1  (GPIO_ALT|GPIO_AF11|GPIO_PORTB|GPIO_PIN3)
+#define GPIO_HRTIM1_SCOUT_2  (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_HRTIM1_SCIN_1   (GPIO_ALT|GPIO_AF11|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_HRTIM1_SCIN_2   (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN2)
+#define GPIO_HRTIM1_CHA1     (GPIO_ALT|GPIO_AF13|GPIO_PORTA|GPIO_PIN8)
+#define GPIO_HRTIM1_CHA2     (GPIO_ALT|GPIO_AF13|GPIO_PORTA|GPIO_PIN9)
+#define GPIO_HRTIM1_CHB1     (GPIO_ALT|GPIO_AF13|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_HRTIM1_CHB2     (GPIO_ALT|GPIO_AF13|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_HRTIM1_CHC1     (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN12)
+#define GPIO_HRTIM1_CHC2     (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN13)
+#define GPIO_HRTIM1_CHD1     (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_HRTIM1_CHD2     (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN15)
+#define GPIO_HRTIM1_CHE1     (GPIO_ALT|GPIO_AF3|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_HRTIM1_CHE2     (GPIO_ALT|GPIO_AF3|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_HRTIM1_FLT1     (GPIO_ALT|GPIO_AF13|GPIO_PORTA|GPIO_PIN12)
+#define GPIO_HRTIM1_FLT2     (GPIO_ALT|GPIO_AF13|GPIO_PORTA|GPIO_PIN15)
+#define GPIO_HRTIM1_FLT3     (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_HRTIM1_FLT4     (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_HRTIM1_FLT5     (GPIO_ALT|GPIO_AF3|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_HRTIM1_EEV1     (GPIO_ALT|GPIO_AF3|GPIO_PORTC|GPIO_PIN12)
+#define GPIO_HRTIM1_EEV2     (GPIO_ALT|GPIO_AF3|GPIO_PORTC|GPIO_PIN11)
+#define GPIO_HRTIM1_EEV3     (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_HRTIM1_EEV4     (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_HRTIM1_EEV5     (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_HRTIM1_EEV6     (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_HRTIM1_EEV7     (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN4)
+#define GPIO_HRTIM1_EEV8     (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_HRTIM1_EEV9     (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN3)
+#define GPIO_HRTIM1_EEV10    (GPIO_ALT|GPIO_AF3|GPIO_PORTC|GPIO_PIN6)
+
+/* OPAMP */
+
+#define GPIO_OPAMP2_DIG      (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_OPAMP2_VINM_1   (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_OPAMP2_VINM_2   (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN5)
+#define GPIO_OPAMP2_VOUT     (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_OPAMP2_VINP_1   (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_OPAMP2_VINP_2   (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_OPAMP2_VINP_3   (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN14)
+
+/* TSC */
+
+#define GPIO_TSC_G1_IO1     (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_TSC_G1_IO2     (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_TSC_G1_IO3     (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_TSC_G1_IO4     (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_TSC_G2_IO1     (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_TSC_G2_IO2     (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_TSC_G2_IO3     (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_TSC_G2_IO4     (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_TSC_G3_IO1     (GPIO_ALT|GPIO_AF3|GPIO_PORTC|GPIO_PIN5)
+#define GPIO_TSC_G3_IO2     (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_TSC_G3_IO3     (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_TSC_G3_IO4     (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN2)
+#define GPIO_TSC_G4_IO1     (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN9)
+#define GPIO_TSC_G4_IO2     (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_TSC_G4_IO3     (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN13)
+#define GPIO_TSC_G4_IO4     (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN14)
+#define GPIO_TSC_G5_IO1     (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN3)
+#define GPIO_TSC_G5_IO2     (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN4)
+#define GPIO_TSC_G5_IO3     (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_TSC_G5_IO4     (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_TSC_G6_IO1     (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_TSC_G6_IO2     (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN12)
+#define GPIO_TSC_G6_IO3     (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN13)
+#define GPIO_TSC_G6_IO4     (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_TSC_SYNC_1     (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_TSC_SYNC_2     (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN15)
+#define GPIO_TSC_SYNC_3     (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN8)
+
+/* USARTs/UARTs */
+
+#define GPIO_USART1_CK      (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN8)
+#define GPIO_USART1_CTS     (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_USART1_RTS     (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN12)
+#define GPIO_USART1_RX_1    (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_USART1_RX_2    (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_USART1_RX_3    (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN5)
+#define GPIO_USART1_TX_1    (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN9)
+#define GPIO_USART1_TX_2    (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_USART1_TX_3    (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN4)
+
+#define GPIO_USART2_CK_1    (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_USART2_CK_2    (GPIO_ALT|GPIO_AF7|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_USART2_CTS     (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_USART2_RTS     (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_USART2_RX_1    (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_USART2_RX_2    (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN15)
+#define GPIO_USART2_RX_3    (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN4)
+#define GPIO_USART2_TX_1    (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_USART2_TX_2    (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN14)
+#define GPIO_USART2_TX_3    (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN3)
+
+#define GPIO_USART3_CK_1    (GPIO_ALT|GPIO_AF7|GPIO_PORTB|GPIO_PIN12)
+#define GPIO_USART3_CK_2    (GPIO_ALT|GPIO_AF7|GPIO_PORTC|GPIO_PIN12)
+#define GPIO_USART3_CTS_1   (GPIO_ALT|GPIO_AF7|GPIO_PORTB|GPIO_PIN13)
+#define GPIO_USART3_CTS_2   (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN13)
+#define GPIO_USART3_RTS     (GPIO_ALT|GPIO_AF7|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_USART3_RX_1    (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_USART3_RX_2    (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN11)
+#define GPIO_USART3_RX_3    (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_USART3_TX_1    (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_USART3_TX_2    (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN10)
+#define GPIO_USART3_TX_3    (GPIO_ALT|GPIO_PUSHPULL|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN9)
+
+/* Event Outputs */
+
+#define GPIO_PA0_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_PA0_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_PA0_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_PA0_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_PA1_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_PA2_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_PA3_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_PA4_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_PA5_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_PA6_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_PA7_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_PA8_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN8)
+#define GPIO_PA9_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN9)
+#define GPIO_PA10_EVENT_OUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_PA11_EVENT_OUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_PA12_EVENT_OUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN12)
+#define GPIO_PA13_EVENT_OUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN13)
+#define GPIO_PA14_EVENT_OUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN14)
+#define GPIO_PA15_EVENT_OUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN15)
+
+#define GPIO_PB0_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_PB1_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_PB2_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN2)
+#define GPIO_PB3_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN3)
+#define GPIO_PB4_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN4)
+#define GPIO_PB5_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_PB6_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_PB7_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_PB8_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_PB9_EVENT_OUT  (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_PB10_EVENT_OUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_PB11_EVENT_OUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_PB12_EVENT_OUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN12)
+#define GPIO_PB13_EVENT_OUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN13)
+#define GPIO_PB14_EVENT_OUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_PB15_EVENT_OUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN15)
+
+#define GPIO_PC0_EVENT_OUT  (GPIO_ALT|GPIO_AF1|GPIO_PORTC|GPIO_PIN0)
+#define GPIO_PC1_EVENT_OUT  (GPIO_ALT|GPIO_AF1|GPIO_PORTC|GPIO_PIN1)
+#define GPIO_PC2_EVENT_OUT  (GPIO_ALT|GPIO_AF1|GPIO_PORTC|GPIO_PIN2)
+#define GPIO_PC3_EVENT_OUT  (GPIO_ALT|GPIO_AF1|GPIO_PORTC|GPIO_PIN3)
+#define GPIO_PC4_EVENT_OUT  (GPIO_ALT|GPIO_AF1|GPIO_PORTC|GPIO_PIN4)
+#define GPIO_PC5_EVENT_OUT  (GPIO_ALT|GPIO_AF1|GPIO_PORTC|GPIO_PIN5)
+#define GPIO_PC6_EVENT_OUT  (GPIO_ALT|GPIO_AF1|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_PC7_EVENT_OUT  (GPIO_ALT|GPIO_AF1|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_PC8_EVENT_OUT  (GPIO_ALT|GPIO_AF1|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_PC9_EVENT_OUT  (GPIO_ALT|GPIO_AF1|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_PC10_EVENT_OUT (GPIO_ALT|GPIO_AF1|GPIO_PORTC|GPIO_PIN10)
+#define GPIO_PC11_EVENT_OUT (GPIO_ALT|GPIO_AF1|GPIO_PORTC|GPIO_PIN11)
+#define GPIO_PC12_EVENT_OUT (GPIO_ALT|GPIO_AF1|GPIO_PORTC|GPIO_PIN12)
+
+#define GPIO_PD2_EVENT_OUT  (GPIO_ALT|GPIO_AF1|GPIO_PORTD|GPIO_PIN2)
+
+#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F33XXX_PINMAP_H */
diff --git a/arch/arm/src/stm32/chip/stm32f33xxx_rcc.h b/arch/arm/src/stm32/chip/stm32f33xxx_rcc.h
new file mode 100644
index 0000000000000000000000000000000000000000..806b22e0502d9583899f6cc6a7778a77c9d88f08
--- /dev/null
+++ b/arch/arm/src/stm32/chip/stm32f33xxx_rcc.h
@@ -0,0 +1,361 @@
+/************************************************************************************
+ * arch/arm/src/stm32/chip/stm32f33xx_rcc.h
+ * For STM32F33xx advanced ARM-based 32-bit MCUs
+ *
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *   Modified for STM32F334 by Mateusz Szafoni 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32F33XXX_RCC_H
+#define __ARCH_ARM_SRC_STM32_CHIP_STM32F33XXX_RCC_H
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Register Offsets *****************************************************************/
+
+#define STM32_RCC_CR_OFFSET         0x0000  /* Clock control register */
+#define STM32_RCC_CFGR_OFFSET       0x0004  /* Clock configuration register */
+#define STM32_RCC_CIR_OFFSET        0x0008  /* Clock interrupt register */
+#define STM32_RCC_APB2RSTR_OFFSET   0x000c  /* APB2 Peripheral reset register */
+#define STM32_RCC_APB1RSTR_OFFSET   0x0010  /* APB1 Peripheral reset register */
+#define STM32_RCC_AHBENR_OFFSET     0x0014  /* AHB Peripheral Clock enable register */
+#define STM32_RCC_APB2ENR_OFFSET    0x0018  /* APB2 Peripheral Clock enable register */
+#define STM32_RCC_APB1ENR_OFFSET    0x001c  /* APB1 Peripheral Clock enable register */
+#define STM32_RCC_BDCR_OFFSET       0x0020  /* Backup domain control register */
+#define STM32_RCC_CSR_OFFSET        0x0024  /* Control/status register */
+#define STM32_RCC_AHBRSTR_OFFSET    0x0028  /* AHB Reset register */
+#define STM32_RCC_CFGR2_OFFSET      0x002c  /* Clock configuration register 2 */
+#define STM32_RCC_CFGR3_OFFSET      0x0030  /* Clock configuration register 3 */
+
+/* Register Addresses ***************************************************************/
+
+#define STM32_RCC_CR                (STM32_RCC_BASE+STM32_RCC_CR_OFFSET)
+#define STM32_RCC_CFGR              (STM32_RCC_BASE+STM32_RCC_CFGR_OFFSET)
+#define STM32_RCC_CIR               (STM32_RCC_BASE+STM32_RCC_CIR_OFFSET)
+#define STM32_RCC_APB2RSTR          (STM32_RCC_BASE+STM32_RCC_APB2RSTR_OFFSET)
+#define STM32_RCC_APB1RSTR          (STM32_RCC_BASE+STM32_RCC_APB1RSTR_OFFSET)
+#define STM32_RCC_AHBENR            (STM32_RCC_BASE+STM32_RCC_AHBENR_OFFSET)
+#define STM32_RCC_APB2ENR           (STM32_RCC_BASE+STM32_RCC_APB2ENR_OFFSET)
+#define STM32_RCC_APB1ENR           (STM32_RCC_BASE+STM32_RCC_APB1ENR_OFFSET)
+#define STM32_RCC_BDCR              (STM32_RCC_BASE+STM32_RCC_BDCR_OFFSET)
+#define STM32_RCC_CSR               (STM32_RCC_BASE+STM32_RCC_CSR_OFFSET)
+#define STM32_RCC_AHBRSTR           (STM32_RCC_BASE+STM32_RCC_AHBRSTR_OFFSET)
+#define STM32_RCC_CFGR2             (STM32_RCC_BASE+STM32_RCC_CFGR2_OFFSET)
+#define STM32_RCC_CFGR3             (STM32_RCC_BASE+STM32_RCC_CFGR3_OFFSET)
+
+/* Register Bitfield Definitions ****************************************************/
+
+/* Clock control register */
+
+#define RCC_CR_HSION                (1 << 0)  /* Bit 0: Internal High Speed clock enable */
+#define RCC_CR_HSIRDY               (1 << 1)  /* Bit 1: Internal High Speed clock ready flag */
+#define RCC_CR_HSITRIM_SHIFT        (3)       /* Bits 7-3: Internal High Speed clock trimming */
+#define RCC_CR_HSITRIM_MASK         (0x1f << RCC_CR_HSITRIM_SHIFT)
+#define RCC_CR_HSICAL_SHIFT         (8)       /* Bits 15-8: Internal High Speed clock Calibration */
+#define RCC_CR_HSICAL_MASK          (0xff << RCC_CR_HSICAL_SHIFT)
+#define RCC_CR_HSEON                (1 << 16) /* Bit 16: External High Speed clock enable */
+#define RCC_CR_HSERDY               (1 << 17) /* Bit 17: External High Speed clock ready flag */
+#define RCC_CR_HSEBYP               (1 << 18) /* Bit 18: External High Speed clock Bypass */
+#define RCC_CR_CSSON                (1 << 19) /* Bit 19: Clock Security System enable */
+#define RCC_CR_PLLON                (1 << 24) /* Bit 24: PLL enable */
+#define RCC_CR_PLLRDY               (1 << 25) /* Bit 25: PLL clock ready flag */
+
+/* Clock configuration register */
+
+#define RCC_CFGR_SW_SHIFT           (0)       /* Bits 1-0: System clock Switch */
+#define RCC_CFGR_SW_MASK            (3 << RCC_CFGR_SW_SHIFT)
+#  define RCC_CFGR_SW_HSI           (0 << RCC_CFGR_SW_SHIFT) /* 00: HSI selected as system clock */
+#  define RCC_CFGR_SW_HSE           (1 << RCC_CFGR_SW_SHIFT) /* 01: HSE selected as system clock */
+#  define RCC_CFGR_SW_PLL           (2 << RCC_CFGR_SW_SHIFT) /* 10: PLL selected as system clock */
+#define RCC_CFGR_SWS_SHIFT          (2)       /* Bits 3-2: System Clock Switch Status */
+#define RCC_CFGR_SWS_MASK           (3 << RCC_CFGR_SWS_SHIFT)
+#  define RCC_CFGR_SWS_HSI          (0 << RCC_CFGR_SWS_SHIFT) /* 00: HSI oscillator used as system clock */
+#  define RCC_CFGR_SWS_HSE          (1 << RCC_CFGR_SWS_SHIFT) /* 01: HSE oscillator used as system clock */
+#  define RCC_CFGR_SWS_PLL          (2 << RCC_CFGR_SWS_SHIFT) /* 10: PLL used as system clock */
+#define RCC_CFGR_HPRE_SHIFT         (4)       /* Bits 7-4: AHB prescaler */
+#define RCC_CFGR_HPRE_MASK          (0x0f << RCC_CFGR_HPRE_SHIFT)
+#  define RCC_CFGR_HPRE_SYSCLK      (0 << RCC_CFGR_HPRE_SHIFT) /* 0xxx: SYSCLK not divided */
+#  define RCC_CFGR_HPRE_SYSCLKd2    (8 << RCC_CFGR_HPRE_SHIFT) /* 1000: SYSCLK divided by 2 */
+#  define RCC_CFGR_HPRE_SYSCLKd4    (9 << RCC_CFGR_HPRE_SHIFT) /* 1001: SYSCLK divided by 4 */
+#  define RCC_CFGR_HPRE_SYSCLKd8    (10 << RCC_CFGR_HPRE_SHIFT) /* 1010: SYSCLK divided by 8 */
+#  define RCC_CFGR_HPRE_SYSCLKd16   (11 << RCC_CFGR_HPRE_SHIFT) /* 1011: SYSCLK divided by 16 */
+#  define RCC_CFGR_HPRE_SYSCLKd64   (12 << RCC_CFGR_HPRE_SHIFT) /* 1100: SYSCLK divided by 64 */
+#  define RCC_CFGR_HPRE_SYSCLKd128  (13 << RCC_CFGR_HPRE_SHIFT) /* 1101: SYSCLK divided by 128 */
+#  define RCC_CFGR_HPRE_SYSCLKd256  (14 << RCC_CFGR_HPRE_SHIFT) /* 1110: SYSCLK divided by 256 */
+#  define RCC_CFGR_HPRE_SYSCLKd512  (15 << RCC_CFGR_HPRE_SHIFT) /* 1111: SYSCLK divided by 512 */
+#define RCC_CFGR_PPRE1_SHIFT        (8)       /* Bits 10-8: APB Low speed prescaler (APB1) */
+#define RCC_CFGR_PPRE1_MASK         (7 << RCC_CFGR_PPRE1_SHIFT)
+#  define RCC_CFGR_PPRE1_HCLK       (0 << RCC_CFGR_PPRE1_SHIFT) /* 0xx: HCLK not divided */
+#  define RCC_CFGR_PPRE1_HCLKd2     (4 << RCC_CFGR_PPRE1_SHIFT) /* 100: HCLK divided by 2 */
+#  define RCC_CFGR_PPRE1_HCLKd4     (5 << RCC_CFGR_PPRE1_SHIFT) /* 101: HCLK divided by 4 */
+#  define RCC_CFGR_PPRE1_HCLKd8     (6 << RCC_CFGR_PPRE1_SHIFT) /* 110: HCLK divided by 8 */
+#  define RCC_CFGR_PPRE1_HCLKd16    (7 << RCC_CFGR_PPRE1_SHIFT) /* 111: HCLK divided by 16 */
+#define RCC_CFGR_PPRE2_SHIFT        (11)      /* Bits 13-11: APB High speed prescaler (APB2) */
+#define RCC_CFGR_PPRE2_MASK         (7 << RCC_CFGR_PPRE2_SHIFT)
+#  define RCC_CFGR_PPRE2_HCLK       (0 << RCC_CFGR_PPRE2_SHIFT) /* 0xx: HCLK not divided */
+#  define RCC_CFGR_PPRE2_HCLKd2     (4 << RCC_CFGR_PPRE2_SHIFT) /* 100: HCLK divided by 2 */
+#  define RCC_CFGR_PPRE2_HCLKd4     (5 << RCC_CFGR_PPRE2_SHIFT) /* 101: HCLK divided by 4 */
+#  define RCC_CFGR_PPRE2_HCLKd8     (6 << RCC_CFGR_PPRE2_SHIFT) /* 110: HCLK divided by 8 */
+#  define RCC_CFGR_PPRE2_HCLKd16    (7 << RCC_CFGR_PPRE2_SHIFT) /* 111: HCLK divided by 16 */
+#define RCC_CFGR_PLLSRC             (1 << 16) /* Bit 16: PLL entry clock source */
+#define RCC_CFGR_PLLXTPRE           (1 << 17) /* Bit 17: HSE divider for PLL entry */
+#define RCC_CFGR_PLLMUL_SHIFT       (18)      /* Bits 21-18: PLL Multiplication Factor */
+#define RCC_CFGR_PLLMUL_MASK        (0x0f << RCC_CFGR_PLLMUL_SHIFT)
+#  define RCC_CFGR_PLLMUL_CLKx2     (0 << RCC_CFGR_PLLMUL_SHIFT)  /* 0000: PLL input clock x 2 */
+#  define RCC_CFGR_PLLMUL_CLKx3     (1 << RCC_CFGR_PLLMUL_SHIFT)  /* 0001: PLL input clock x 3 */
+#  define RCC_CFGR_PLLMUL_CLKx4     (2 << RCC_CFGR_PLLMUL_SHIFT)  /* 0010: PLL input clock x 4 */
+#  define RCC_CFGR_PLLMUL_CLKx5     (3 << RCC_CFGR_PLLMUL_SHIFT)  /* 0011: PLL input clock x 5 */
+#  define RCC_CFGR_PLLMUL_CLKx6     (4 << RCC_CFGR_PLLMUL_SHIFT)  /* 0100: PLL input clock x 6 */
+#  define RCC_CFGR_PLLMUL_CLKx7     (5 << RCC_CFGR_PLLMUL_SHIFT)  /* 0101: PLL input clock x 7 */
+#  define RCC_CFGR_PLLMUL_CLKx8     (6 << RCC_CFGR_PLLMUL_SHIFT)  /* 0110: PLL input clock x 8 */
+#  define RCC_CFGR_PLLMUL_CLKx9     (7 << RCC_CFGR_PLLMUL_SHIFT)  /* 0111: PLL input clock x 9 */
+#  define RCC_CFGR_PLLMUL_CLKx10    (8 << RCC_CFGR_PLLMUL_SHIFT)  /* 1000: PLL input clock x 10 */
+#  define RCC_CFGR_PLLMUL_CLKx11    (9 << RCC_CFGR_PLLMUL_SHIFT)  /* 1001: PLL input clock x 11 */
+#  define RCC_CFGR_PLLMUL_CLKx12    (10 << RCC_CFGR_PLLMUL_SHIFT) /* 1010: PLL input clock x 12 */
+#  define RCC_CFGR_PLLMUL_CLKx13    (11 << RCC_CFGR_PLLMUL_SHIFT) /* 1011: PLL input clock x 13 */
+#  define RCC_CFGR_PLLMUL_CLKx14    (12 << RCC_CFGR_PLLMUL_SHIFT) /* 1100: PLL input clock x 14 */
+#  define RCC_CFGR_PLLMUL_CLKx15    (13 << RCC_CFGR_PLLMUL_SHIFT) /* 1101: PLL input clock x 15 */
+#  define RCC_CFGR_PLLMUL_CLKx16    (14 << RCC_CFGR_PLLMUL_SHIFT) /* 111x: PLL input clock x 16 */
+#define RCC_CFGR_MCO_SHIFT          (24)      /* Bits 26-24: Microcontroller Clock Output */
+#define RCC_CFGR_MCO_MASK           (3 << RCC_CFGR_MCO_SHIFT)
+#  define RCC_CFGR_MCO_DISABLED     (0 << RCC_CFGR_MCO_SHIFT)  /* 000: MCO output disabled, no clock on MCO */
+#  define RCC_CFGR_MCO_LSICLK       (2 << RCC_CFGR_MCO_SHIFT)  /* 010: LSI clock selected */
+#  define RCC_CFGR_MCO_LSECLK       (3 << RCC_CFGR_MCO_SHIFT)  /* 011: LSE clock selected */
+#  define RCC_CFGR_MCO_SYSCLK       (4 << RCC_CFGR_MCO_SHIFT)  /* 100: System clock (SYSCLK) selected */
+#  define RCC_CFGR_MCO_HSICLK       (5 << RCC_CFGR_MCO_SHIFT)  /* 101: HSI clock selected */
+#  define RCC_CFGR_MCO_HSECLK       (6 << RCC_CFGR_MCO_SHIFT)  /* 101: HSE clock selected */
+#  define RCC_CFGR_PLLCLKd2         (7 << RCC_CFGR_MCO_SHIFT)  /* 111: PLL clock divided by 2 selected */
+#define RCC_CFGR_MCOPRE_SHIFT       (28)      /* Bits 30-28: Microcontroller Clock Output */
+#define RCC_CFGR_MCOPRE_MASK        (7 << RCC_CFGR_MCOPRE_SHIFT)
+#  define RCC_CFGR_MCOPRE_MCOd1     (0 << RCC_CFGR_MCOPRE_SHIFT)  /* 000: MCO is divided by 1 */
+#  define RCC_CFGR_MCOPRE_MCOd2     (1 << RCC_CFGR_MCOPRE_SHIFT)  /* 001: MCO is divided by 2 */
+#  define RCC_CFGR_MCOPRE_MCOd4     (2 << RCC_CFGR_MCOPRE_SHIFT)  /* 010: MCO is divided by 4 */
+#  define RCC_CFGR_MCOPRE_MCOd8     (3 << RCC_CFGR_MCOPRE_SHIFT)  /* 011: MCO is divided by 8 */
+#  define RCC_CFGR_MCOPRE_MCOd16    (4 << RCC_CFGR_MCOPRE_SHIFT)  /* 100: MCO is divided by 16 */
+#  define RCC_CFGR_MCOPRE_MCOd32    (5 << RCC_CFGR_MCOPRE_SHIFT)  /* 101: MCO is divided by 32 */
+#  define RCC_CFGR_MCOPRE_MCOd64    (6 << RCC_CFGR_MCOPRE_SHIFT)  /* 110: MCO is divided by 64 */
+#  define RCC_CFGR_MCOPRE_MCOd128   (7 << RCC_CFGR_MCOPRE_SHIFT)  /* 111: MCO is divided by 128 */
+#define RCC_CFGR_PLLNODIV           (1 << 31) /* Bit 31: Do not divide PLL to MCO */
+
+/* Clock interrupt register */
+
+#define RCC_CIR_LSIRDYF             (1 << 0)  /* Bit 0: LSI Ready Interrupt flag */
+#define RCC_CIR_LSERDYF             (1 << 1)  /* Bit 1: LSE Ready Interrupt flag */
+#define RCC_CIR_HSIRDYF             (1 << 2)  /* Bit 2: HSI Ready Interrupt flag */
+#define RCC_CIR_HSERDYF             (1 << 3)  /* Bit 3: HSE Ready Interrupt flag */
+#define RCC_CIR_PLLRDYF             (1 << 4)  /* Bit 4: PLL Ready Interrupt flag */
+#define RCC_CIR_CSSF                (1 << 7)  /* Bit 7: Clock Security System Interrupt flag */
+#define RCC_CIR_LSIRDYIE            (1 << 8)  /* Bit 8: LSI Ready Interrupt Enable */
+#define RCC_CIR_LSERDYIE            (1 << 9)  /* Bit 9: LSE Ready Interrupt Enable */
+#define RCC_CIR_HSIRDYIE            (1 << 10) /* Bit 10: HSI Ready Interrupt Enable */
+#define RCC_CIR_HSERDYIE            (1 << 11) /* Bit 11: HSE Ready Interrupt Enable */
+#define RCC_CIR_PLLRDYIE            (1 << 12) /* Bit 12: PLL Ready Interrupt Enable */
+#define RCC_CIR_LSIRDYC             (1 << 16) /* Bit 16: LSI Ready Interrupt Clear */
+#define RCC_CIR_LSERDYC             (1 << 17) /* Bit 17: LSE Ready Interrupt Clear */
+#define RCC_CIR_HSIRDYC             (1 << 18) /* Bit 18: HSI Ready Interrupt Clear */
+#define RCC_CIR_HSERDYC             (1 << 19) /* Bit 19: HSE Ready Interrupt Clear */
+#define RCC_CIR_PLLRDYC             (1 << 20) /* Bit 20: PLL Ready Interrupt Clear */
+#define RCC_CIR_CSSC                (1 << 23) /* Bit 23: Clock Security System Interrupt Clear */
+
+/* APB2 Peripheral reset register */
+
+#define RCC_APB2RSTR_SYSCFGRST      (1 << 0)  /* Bit 0: SYSCFG, Comparators and operational amplifiers reset */
+#define RCC_APB2RSTR_TIM1RST        (1 << 9)  /* Bit 9: TIM1 reset */
+#define RCC_APB2RSTR_SPI1RST        (1 << 12) /* Bit 12: SPI 1 reset */
+#define RCC_APB2RSTR_USART1RST      (1 << 14) /* Bit 14: USART1 reset */
+#define RCC_APB2RSTR_TIM15RST       (1 << 16) /* Bit 16: TIM15 reset */
+#define RCC_APB2RSTR_TIM16RST       (1 << 17) /* Bit 17: TIM16 reset */
+#define RCC_APB2RSTR_TIM17RST       (1 << 18) /* Bit 18: TIM17 reset */
+#define RCC_APB2RSTR_HRTIM1RST      (1 << 26) /* Bit 29: HRTIM1 reset */
+
+/* APB1 Peripheral reset register */
+
+#define RCC_APB1RSTR_TIM2RST        (1 << 0)  /* Bit 0: Timer 2 reset */
+#define RCC_APB1RSTR_TIM3RST        (1 << 1)  /* Bit 1: Timer 3 reset */
+#define RCC_APB1RSTR_TIM6RST        (1 << 4)  /* Bit 4: Timer 6 reset */
+#define RCC_APB1RSTR_TIM7RST        (1 << 5)  /* Bit 5: Timer 7 reset */
+#define RCC_APB1RSTR_WWDGRST        (1 << 11) /* Bit 11: Window Watchdog reset */
+#define RCC_APB1RSTR_USART2RST      (1 << 17) /* Bit 17: USART 2 reset */
+#define RCC_APB1RSTR_USART3RST      (1 << 18) /* Bit 18: USART 3 reset */
+#define RCC_APB1RSTR_I2C1RST        (1 << 21) /* Bit 21: I2C 1 reset */
+#define RCC_APB1RSTR_CANRST         (1 << 25) /* Bit 25: CAN reset */
+#define RCC_APB1RSTR_CAN1RST        (1 << 25) /* Bit 25: CAN reset */
+#define RCC_APB1RSTR_DAC2RST        (1 << 26) /* Bit 26: DAC2 interface reset */
+#define RCC_APB1RSTR_PWRRST         (1 << 28) /* Bit 28: Power interface reset */
+#define RCC_APB1RSTR_DAC1RST        (1 << 29) /* Bit 29: DAC1 interface reset */
+
+/* AHB Peripheral Clock enable register */
+
+#define RCC_AHBENR_DMA1EN           (1 << 0)  /* Bit 0: DMA1 clock enable */
+#define RCC_AHBENR_SRAMEN           (1 << 2)  /* Bit 2: SRAM interface clock enable */
+#define RCC_AHBENR_FLITFEN          (1 << 4)  /* Bit 4: FLITF clock enable */
+#define RCC_AHBENR_CRCEN            (1 << 6)  /* Bit 6: CRC clock enable */
+#define RCC_AHBENR_IOPAEN           (1 << 17) /* Bit 17: I/O port A clock enable */
+#define RCC_AHBENR_IOPBEN           (1 << 18) /* Bit 17: I/O port B clock enable */
+#define RCC_AHBENR_IOPCEN           (1 << 19) /* Bit 17: I/O port C clock enable */
+#define RCC_AHBENR_IOPDEN           (1 << 20) /* Bit 17: I/O port D clock enable */
+#define RCC_AHBENR_IOPFEN           (1 << 22) /* Bit 17: I/O port F clock enable */
+#define RCC_AHBENR_TSCEN            (1 << 24) /* Bit 24: TSCEN: Touch sensing controller clock enable */
+#define RCC_AHBENR_ADC12EN          (1 << 28) /* Bit 28: ADC1/ADC2 clock enable */
+
+/* APB2 Peripheral Clock enable register */
+
+#define RCC_APB2ENR_SYSCFGEN        (1 << 0)  /* Bit 0: SYSCFG, Comparators and operational amplifiers clock enable */
+#define RCC_APB2ENR_TIM1EN          (1 << 11) /* Bit 11: TIM1 clock enable */
+#define RCC_APB2ENR_SPI1EN          (1 << 12) /* Bit 12: SPI 1 clock enable */
+#define RCC_APB2ENR_USART1EN        (1 << 14) /* Bit 14: USART1 clock enable */
+#define RCC_APB2ENR_TIM15EN         (1 << 16) /* Bit 16: TIM15 clock enable */
+#define RCC_APB2ENR_TIM16EN         (1 << 17) /* Bit 17: TIM16 clock enable */
+#define RCC_APB2ENR_TIM17EN         (1 << 18) /* Bit 18: TIM17 clock enable */
+#define RCC_APB2ENR_HRTIM1EN        (1 << 29) /* Bit 29: HRTIM1 clock enable */
+
+/* APB1 Peripheral Clock enable register */
+
+#define RCC_APB1ENR_TIM2EN          (1 << 0)  /* Bit 0: Timer 2 clock enable */
+#define RCC_APB1ENR_TIM3EN          (1 << 1)  /* Bit 1: Timer 3 clock enable */
+#define RCC_APB1ENR_TIM6EN          (1 << 4)  /* Bit 4: Timer 6 clock enable */
+#define RCC_APB1ENR_TIM7EN          (1 << 5)  /* Bit 5: Timer 7 clock enable */
+#define RCC_APB1ENR_WWDGEN          (1 << 11) /* Bit 11: Window Watchdog clock enable */
+#define RCC_APB1ENR_USART2EN        (1 << 17) /* Bit 17: USART 2 clock enable */
+#define RCC_APB1ENR_USART3EN        (1 << 18) /* Bit 18: USART 3 clock enable */
+#define RCC_APB1ENR_I2C1EN          (1 << 21) /* Bit 21: I2C 1 clock enable */
+#define RCC_APB1ENR_CANEN           (1 << 25) /* Bit 25: CAN clock enable */
+#define RCC_APB1ENR_DAC2EN          (1 << 26) /* Bit 26: DAC1 interface clock enable */
+#define RCC_APB1ENR_PWREN           (1 << 28) /* Bit 28: Power interface clock enable */
+#define RCC_APB1ENR_DAC1EN          (1 << 29) /* Bit 29: DAC1 interface clock enable */
+
+/* Backup domain control register */
+
+#define RCC_BDCR_LSEON              (1 << 0)  /* Bit 0: External Low Speed oscillator enable */
+#define RCC_BDCR_LSERDY             (1 << 1)  /* Bit 1: External Low Speed oscillator Ready */
+#define RCC_BDCR_LSEBYP             (1 << 2)  /* Bit 2: External Low Speed oscillator Bypass */
+#define RCC_BDCR_LSEDRV_SHIFT       (3)       /* Bits 4:3: LSE oscillator drive capability */
+#define RCC_BDCR_LSEDRV_MASK        (3 << RCC_BDCR_LSEDRV_SHIFT)
+#  define RCC_BDCR_LSEDRV_LOW       (0 << RCC_BDCR_LSEDRV_SHIFT) /* 'Xtal mode' lower driving capability */
+#  define RCC_BDCR_LSEDRV_MEDLOW    (1 << RCC_BDCR_LSEDRV_SHIFT) /* 'Xtal mode' medium low driving capability */
+#  define RCC_BDCR_LSEDRV_MEDHIGH   (2 << RCC_BDCR_LSEDRV_SHIFT) /* 'Xtal mode' medium high driving capability */
+#  define RCC_BDCR_LSEDRV_HIGH      (3 << RCC_BDCR_LSEDRV_SHIFT) /* 'Xtal mode' higher driving capability */
+#define RCC_BDCR_RTCSEL_SHIFT       (8)       /* Bits 9:8: RTC clock source selection */
+#define RCC_BDCR_RTCSEL_MASK        (3 << RCC_BDCR_RTCSEL_SHIFT)
+#  define RCC_BDCR_RTCSEL_NOCLK     (0 << RCC_BDCR_RTCSEL_SHIFT) /* 00: No clock */
+#  define RCC_BDCR_RTCSEL_LSE       (1 << RCC_BDCR_RTCSEL_SHIFT) /* 01: LSE oscillator clock used as RTC clock */
+#  define RCC_BDCR_RTCSEL_LSI       (2 << RCC_BDCR_RTCSEL_SHIFT) /* 10: LSI oscillator clock used as RTC clock */
+#  define RCC_BDCR_RTCSEL_HSE       (3 << RCC_BDCR_RTCSEL_SHIFT) /* 11: HSE oscillator clock divided by 128 used as RTC clock */
+#define RCC_BDCR_RTCEN              (1 << 15) /* Bit 15: RTC clock enable */
+#define RCC_BDCR_BDRST              (1 << 16) /* Bit 16: Backup domain software reset */
+
+/* Control/status register */
+
+#define RCC_CSR_LSION               (1 << 0)  /* Bit 0: Internal Low Speed oscillator enable */
+#define RCC_CSR_LSIRDY              (1 << 1)  /* Bit 1: Internal Low Speed oscillator Ready */
+#define RCC_CSR_RMVF                (1 << 24) /* Bit 24: Remove reset flag */
+#define RCC_CSR_OBLRSTF             (1 << 25) /* Bit 25: Option byte loader reset flag */
+#define RCC_CSR_PINRSTF             (1 << 26) /* Bit 26: PIN reset flag */
+#define RCC_CSR_PORRSTF             (1 << 27) /* Bit 27: POR/PDR reset flag */
+#define RCC_CSR_SFTRSTF             (1 << 28) /* Bit 28: Software Reset flag */
+#define RCC_CSR_IWDGRSTF            (1 << 29) /* Bit 29: Independent Watchdog reset flag */
+#define RCC_CSR_WWDGRSTF            (1 << 30) /* Bit 30: Window watchdog reset flag */
+#define RCC_CSR_LPWRRSTF            (1 << 31) /* Bit 31: Low-Power reset flag */
+
+/* AHB peripheral clock reset register (RCC_AHBRSTR) */
+
+#define RCC_AHBRSTR_IOPARST         (1 << 17) /* Bit 17: I/O port A reset */
+#define RCC_AHBRSTR_IOPBRST         (1 << 18) /* Bit 18: I/O port B reset */
+#define RCC_AHBRSTR_IOPCRST         (1 << 29) /* Bit 19: I/O port C reset */
+#define RCC_AHBRSTR_IOPDRST         (1 << 20) /* Bit 20: I/O port D reset */
+#define RCC_AHBRSTR_IOPFRST         (1 << 22) /* Bit 22: I/O port F reset */
+#define RCC_AHBRSTR_TSCRST          (1 << 24) /* Bit 24: Touch sensing controller reset */
+#define RCC_AHBRSTR_ADC12RST        (1 << 28) /* Bit 24: ADC1/ADC2 reset */
+
+/* Clock configuration register 2 */
+
+#define RCC_CFGR2_PREDIV_SHIFT      (0)       /* Bits 0-3: PREDIV division factor */
+#define RCC_CFGR2_PREDIV_MASK       (15 << RCC_CFGR2_PREDIV_SHIFT)
+#  define RCC_CFGR2_PREDIVd1        (0 << RCC_CFGR2_PREDIV_SHIFT)  /* 0000: HSE input to PLL not divided */
+#  define RCC_CFGR2_PREDIVd2        (1 << RCC_CFGR2_PREDIV_SHIFT)  /* 0001: HSE input to PLL divided by 2 */
+#  define RCC_CFGR2_PREDIVd3        (2 << RCC_CFGR2_PREDIV_SHIFT)  /* 0010: HSE input to PLL divided by 3 */
+#  define RCC_CFGR2_PREDIVd4        (3 << RCC_CFGR2_PREDIV_SHIFT)  /* 0011: HSE input to PLL divided by 4 */
+#  define RCC_CFGR2_PREDIVd5        (4 << RCC_CFGR2_PREDIV_SHIFT)  /* 0100: HSE input to PLL divided by 5 */
+#  define RCC_CFGR2_PREDIVd6        (5 << RCC_CFGR2_PREDIV_SHIFT)  /* 0101: HSE input to PLL divided by 6 */
+#  define RCC_CFGR2_PREDIVd7        (6 << RCC_CFGR2_PREDIV_SHIFT)  /* 0110: HSE input to PLL divided by 7 */
+#  define RCC_CFGR2_PREDIVd8        (7 << RCC_CFGR2_PREDIV_SHIFT)  /* 0111: HSE input to PLL divided by 8 */
+#  define RCC_CFGR2_PREDIVd9        (8 << RCC_CFGR2_PREDIV_SHIFT)  /* 1000: HSE input to PLL divided by 9 */
+#  define RCC_CFGR2_PREDIVd10       (9 << RCC_CFGR2_PREDIV_SHIFT)  /* 1001: HSE input to PLL divided by 10 */
+#  define RCC_CFGR2_PREDIVd11       (10 << RCC_CFGR2_PREDIV_SHIFT) /* 1010: HSE input to PLL divided by 11 */
+#  define RCC_CFGR2_PREDIVd12       (11 << RCC_CFGR2_PREDIV_SHIFT) /* 1011: HSE input to PLL divided by 12 */
+#  define RCC_CFGR2_PREDIVd13       (12 << RCC_CFGR2_PREDIV_SHIFT) /* 1100: HSE input to PLL divided by 13 */
+#  define RCC_CFGR2_PREDIVd14       (13 << RCC_CFGR2_PREDIV_SHIFT) /* 1101: HSE input to PLL divided by 14 */
+#  define RCC_CFGR2_PREDIVd15       (14 << RCC_CFGR2_PREDIV_SHIFT) /* 1110: HSE input to PLL divided by 15 */
+#  define RCC_CFGR2_PREDIVd16       (15 << RCC_CFGR2_PREDIV_SHIFT) /* 1111: HSE input to PLL divided by 16 */
+#define RCC_CFGR2_ADC12PRES_SHIFT   (4)       /* Bits 4-8: ADC12PRES division factor */
+#define RCC_CFGR2_ADC12PRES_MASK    (32 << RCC_CFGR2_ADC12PRES_SHIFT)
+#  define RCC_CFGR2_ADC12DISABLED   (0 << RCC_CFGR2_ADC12PRES_SHIFT)  /* 00000: ADC12 clock disabled  */
+#  define RCC_CFGR2_ADC12PRESd1     (16 << RCC_CFGR2_ADC12PRES_SHIFT) /* 10000: PLL clock divided by 1 */
+#  define RCC_CFGR2_ADC12PRESd2     (17 << RCC_CFGR2_ADC12PRES_SHIFT) /* 10001: PLL clock divided by 2 */
+#  define RCC_CFGR2_ADC12PRESd4     (18 << RCC_CFGR2_ADC12PRES_SHIFT) /* 10010: PLL clock divided by 4 */
+#  define RCC_CFGR2_ADC12PRESd6     (19 << RCC_CFGR2_ADC12PRES_SHIFT) /* 10011: PLL clock divided by 6 */
+#  define RCC_CFGR2_ADC12PRESd8     (20 << RCC_CFGR2_ADC12PRES_SHIFT) /* 10100: PLL clock divided by 8 */
+#  define RCC_CFGR2_ADC12PRESd10    (21 << RCC_CFGR2_ADC12PRES_SHIFT) /* 10101: PLL clock divided by 10 */
+#  define RCC_CFGR2_ADC12PRESd12    (22 << RCC_CFGR2_ADC12PRES_SHIFT) /* 10110: PLL clock divided by 12 */
+#  define RCC_CFGR2_ADC12PRESd16    (23 << RCC_CFGR2_ADC12PRES_SHIFT) /* 10111: PLL clock divided by 16 */
+#  define RCC_CFGR2_ADC12PRESd32    (24 << RCC_CFGR2_ADC12PRES_SHIFT) /* 11000: PLL clock divided by 32 */
+#  define RCC_CFGR2_ADC12PRESd64    (25 << RCC_CFGR2_ADC12PRES_SHIFT) /* 11001: PLL clock divided by 64 */
+#  define RCC_CFGR2_ADC12PRESd128   (26 << RCC_CFGR2_ADC12PRES_SHIFT) /* 11010: PLL clock divided by 128 */
+#  define RCC_CFGR2_ADC12PRESd256   (27 << RCC_CFGR2_ADC12PRES_SHIFT) /* 11011: PLL clock divided by 256 */
+
+/* Clock configuration register 3 */
+
+#define RCC_CFGR3_USART1SW_SHIFT    (0)       /* Bits 0-1: USART1 clock source selection */
+#define RCC_CFGR3_USART1SW_MASK     (3 << RCC_CFGR3_USART1SW_SHIFT)
+#  define RCC_CFGR3_USART1SW_PCLK   (0 << RCC_CFGR3_USART1SW_SHIFT) /* PCLK */
+#  define RCC_CFGR3_USART1SW_SYSCLK (1 << RCC_CFGR3_USART1SW_SHIFT) /* System clock (SYSCLK) */
+#  define RCC_CFGR3_USART1SW_LSE    (2 << RCC_CFGR3_USART1SW_SHIFT) /* LSE clock */
+#  define RCC_CFGR3_USART1SW_HSI    (0 << RCC_CFGR3_USART1SW_SHIFT) /* HSI clock */
+#define RCC_CFGR3_I2C1SW            (1 << 4)  /* Bit 4: I2C1 clock source selection */
+#define RCC_CFGR3_TIM1SW            (1 << 8)  /* Bit 8: TIM1 clock source selection */
+#define RCC_CFGR3_HRTIM1SW          (1 << 9)  /* Bit 9: HRTIM clock source selection */
+#define RCC_CFGR3_USART2SW_SHIFT    (16)      /* Bits 16-17: USART2 clock source selection */
+#define RCC_CFGR3_USART2SW_MASK     (3 << RCC_CFGR3_USART2SW_SHIFT)
+#  define RCC_CFGR3_USART2SW_PCLK   (0 << RCC_CFGR3_USART2SW_SHIFT) /* PCLK */
+#  define RCC_CFGR3_USART2SW_SYSCLK (1 << RCC_CFGR3_USART2SW_SHIFT) /* System clock (SYSCLK) */
+#  define RCC_CFGR3_USART2SW_LSE    (2 << RCC_CFGR3_USART2SW_SHIFT) /* LSE clock */
+#  define RCC_CFGR3_USART2SW_HSI    (0 << RCC_CFGR3_USART2SW_SHIFT) /* HSI clock */
+#define RCC_CFGR3_USART3SW_SHIFT    (18)      /* Bits 18-19: USART3 clock source selection */
+#define RCC_CFGR3_USART3SW_MASK     (3 << RCC_CFGR3_USART3SW_SHIFT)
+#  define RCC_CFGR3_USART3SW_PCLK   (0 << RCC_CFGR3_USART3SW_SHIFT) /* PCLK */
+#  define RCC_CFGR3_USART3SW_SYSCLK (1 << RCC_CFGR3_USART3SW_SHIFT) /* System clock (SYSCLK) */
+#  define RCC_CFGR3_USART3SW_LSE    (2 << RCC_CFGR3_USART3SW_SHIFT) /* LSE clock */
+#  define RCC_CFGR3_USART3SW_HSI    (0 << RCC_CFGR3_USART3SW_SHIFT) /* HSI clock */
+
+#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F33XXX_RCC_H */
diff --git a/arch/arm/src/stm32/chip/stm32f33xxx_syscfg.h b/arch/arm/src/stm32/chip/stm32f33xxx_syscfg.h
new file mode 100644
index 0000000000000000000000000000000000000000..6e83d0b611123e4cc30f2de1fbe204d9bd112fa8
--- /dev/null
+++ b/arch/arm/src/stm32/chip/stm32f33xxx_syscfg.h
@@ -0,0 +1,182 @@
+/****************************************************************************************************
+ * arch/arm/src/stm32/chip/stm32f33xxx_syscfg.h
+ *
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *   Modified for STM32F334 by Mateusz Szafoni 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32F33XXX_SYSCFG_H
+#define __ARCH_ARM_SRC_STM32_CHIP_STM32F33XXX_SYSCFG_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include 
+#include "chip.h"
+
+#ifdef CONFIG_STM32_STM32F33XX
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+/* Register Offsets *********************************************************************************/
+
+#define STM32_SYSCFG_CFGR1_OFFSET      0x0000 /* SYSCFG configuration register 1 */
+#define STM32_SYSCFG_RCR_OFFSET        0x0004 /* SYSCFG CCM SRAM protection register */
+
+#define STM32_SYSCFG_EXTICR_OFFSET(p)  (0x0008 + ((p) & 0x000c)) /* Registers are displaced by 4! */
+#define STM32_SYSCFG_EXTICR1_OFFSET    0x0008 /* SYSCFG external interrupt configuration register 1 */
+#define STM32_SYSCFG_EXTICR2_OFFSET    0x000c /* SYSCFG external interrupt configuration register 2 */
+#define STM32_SYSCFG_EXTICR3_OFFSET    0x0010 /* SYSCFG external interrupt configuration register 3 */
+#define STM32_SYSCFG_EXTICR4_OFFSET    0x0014 /* SYSCFG external interrupt configuration register 4 */
+
+#define STM32_SYSCFG_CFGR2_OFFSET      0x0018 /* SYSCFG configuration register 2 */
+#define STM32_SYSCFG_CFGR3_OFFSET      0x0050 /* SYSCFG configuration register 3 */
+
+/* Register Addresses *******************************************************************************/
+
+#define STM32_SYSCFG_CFGR1             (STM32_SYSCFG_BASE+STM32_SYSCFG_CFGR1_OFFSET)
+#define STM32_SYSCFG_RCR               (STM32_SYSCFG_BASE+STM32_SYSCFG_RCR_OFFSET)
+
+#define STM32_SYSCFG_EXTICR(p)         (STM32_SYSCFG_BASE+STM32_SYSCFG_EXTICR_OFFSET(p))
+#define STM32_SYSCFG_EXTICR1           (STM32_SYSCFG_BASE+STM32_SYSCFG_EXTICR1_OFFSET)
+#define STM32_SYSCFG_EXTICR2           (STM32_SYSCFG_BASE+STM32_SYSCFG_EXTICR2_OFFSET)
+#define STM32_SYSCFG_EXTICR3           (STM32_SYSCFG_BASE+STM32_SYSCFG_EXTICR3_OFFSET)
+#define STM32_SYSCFG_EXTICR4           (STM32_SYSCFG_BASE+STM32_SYSCFG_EXTICR4_OFFSET)
+
+#define STM32_SYSCFG_CFGR2             (STM32_SYSCFG_BASE+STM32_SYSCFG_CFGR2_OFFSET)
+#define STM32_SYSCFG_CFGR3             (STM32_SYSCFG_BASE+STM32_SYSCFG_CFGR3_OFFSET)
+
+/* Register Bitfield Definitions ********************************************************************/
+
+/* SYSCFG memory remap register */
+
+#define SYSCFG_CFGR1_MEMMODE_SHIFT     (0)       /* Bits 1:0 MEM_MODE: Memory mapping selection */
+#define SYSCFG_CFGR1_MEMMODE_MASK      (3 << SYSCFG_CFGR1_MEMMODE_SHIFT)
+#  define SYSCFG_CFGR1_MEMMODE_FLASH   (0 << SYSCFG_CFGR1_MEMMODE_SHIFT) /* 00: Main Flash at 0x00000000 */
+#  define SYSCFG_CFGR1_MEMMODE_SYSTEM  (1 << SYSCFG_CFGR1_MEMMODE_SHIFT) /* 01: System Flash at 0x00000000 */
+#  define SYSCFG_CFGR1_MEMMODE_SRAM    (3 << SYSCFG_CFGR1_MEMMODE_SHIFT) /* 11: Embedded SRAM at 0x00000000 */
+#define SYSCFG_CFGR1_TIM1_ITR3RMP      (1 << 6)  /* Bit 6:  Timer 1 ITR3 selection */
+#define SYSCFG_CFGR1_DAC_TRIGRMP       (1 << 7)  /* Bit 7:  DAC trigger remap (when TSEL = 001) */
+#define SYSCFG_CFGR1_TIM16_DMARMP      (1 << 11) /* Bit 11: TIM16 DMA request remapping bit */
+#define SYSCFG_CFGR1_TIM17_DMARMP      (1 << 12) /* Bit 12: TIM17 DMA request remapping bit */
+#define SYSCFG_CFGR1_TIM6_DMARMP       (1 << 13) /* Bit 13: TIM6 DMA remap, or */
+#define SYSCFG_CFGR1_DAC1_DMARMP       (1 << 13) /* Bit 13: DAC channel DMA remap */
+#define SYSCFG_CFGR1_TIM7_DMARMP       (1 << 14) /* Bit 14: TIM7 DMA remap */
+#define SYSCFG_CFGR1_DAC2CH2_DMARMP    (1 << 14) /* Bit 14: DAC channel2 DMA remap */
+#define SYSCFG_CFGR1_DAC2CH1_DMARMP    (1 << 15) /* Bit 14: DAC channel1 DMA remap */
+#define SYSCFG_CFGR1_I2C_PBXFMP_SHIFT  (0)       /* Bits 16-19: Fast Mode Plus (FM+) driving capability */
+#define SYSCFG_CFGR1_I2C_PBXFMP_MASK   (15 << SYSCFG_CFGR1_I2C_PBXFMP_SHIFT)
+#define SYSCFG_CFGR1_I2C1_FMP          (1 << 20) /* Bit 20: I2C1 fast mode Plus driving capability */
+#define SYSCFG_CFGR1_I2C2_FMP          (1 << 21) /* Bit 21: I2C2 fast mode Plus driving capability */
+#define SYSCFG_CFGR1_ENCMODE_SHIFT     (22)       /* Bits 22-23: Encoder mode */
+#define SYSCFG_CFGR1_ENCMODE_MASK      (3 << SYSCFG_CFGR1_ENCMODE_SHIFT)
+#  define SYSCFG_CFGR1_ENCMODE_NONE    (0 << SYSCFG_CFGR1_ENCMODE_SHIFT) /* No redirection */
+#  define SYSCFG_CFGR1_ENCMODE_TIM2    (1 << SYSCFG_CFGR1_ENCMODE_SHIFT) /* TIM2 I2C1-2 -> TIM15 IC1/2 */
+#  define SYSCFG_CFGR1_ENCMODE_TIM3    (2 << SYSCFG_CFGR1_ENCMODE_SHIFT) /* TIM3 I2C1-2 -> TIM15 IC1/2 */
+#  define SYSCFG_CFGR1_ENCMODE_TIM4    (3 << SYSCFG_CFGR1_ENCMODE_SHIFT) /* TIM4 I2C1-2 -> TIM15 IC1/2 */
+#define SYSCFG_CFGR1_FPUIE_SHIFT       (26)       /* Bits 26-31: Floating Point Unit interrupts enable bits */
+#define SYSCFG_CFGR1_FPUIE_MASK        (63 << SYSCFG_CFGR1_FPUIE_SHIFT)
+#  define SYSCFG_CFGR1_FPUIE_INVALIDOP (1 << SYSCFG_CFGR1_FPUIE_SHIFT)  /* Invalid operation interrupt enable */
+#  define SYSCFG_CFGR1_FPUIE_DIVZERO   (2 << SYSCFG_CFGR1_FPUIE_SHIFT)  /* Divide-by-zero interrupt enable */
+#  define SYSCFG_CFGR1_FPUIE_UNDERFLOW (4 << SYSCFG_CFGR1_FPUIE_SHIFT)  /* Underflow interrupt enable */
+#  define SYSCFG_CFGR1_FPUIE_OVERFLOW  (8 << SYSCFG_CFGR1_FPUIE_SHIFT)  /* Overflow interrupt enable */
+#  define SYSCFG_CFGR1_FPUIE_DENORMAL  (16 << SYSCFG_CFGR1_FPUIE_SHIFT) /* Input denormal interrupt enable */
+#  define SYSCFG_CFGR1_FPUIE_INEXACT   (32 << SYSCFG_CFGR1_FPUIE_SHIFT) /* Inexact interrupt enable */
+
+/* SYSCFG CCM SRAM protection register */
+
+#define SYSCFG_RCR(page)               (1 << (page)) /* Bit n: Write protection page n */
+
+/* SYSCFG external interrupt configuration register 1-4 */
+
+#define SYSCFG_EXTICR_PORTA           (0)       /* 0000: PA[x] pin */
+#define SYSCFG_EXTICR_PORTB           (1)       /* 0001: PB[x] pin */
+#define SYSCFG_EXTICR_PORTC           (2)       /* 0010: PC[x] pin */
+#define SYSCFG_EXTICR_PORTD           (3)       /* 0011: PD[x] pin */
+#define SYSCFG_EXTICR_PORTE           (4)       /* 0100: PE[x] pin */
+
+#define SYSCFG_EXTICR_PORT_MASK       (15)
+#define SYSCFG_EXTICR_EXTI_SHIFT(g)   (((g) & 3) << 2)
+#define SYSCFG_EXTICR_EXTI_MASK(g)    (SYSCFG_EXTICR_PORT_MASK << (SYSCFG_EXTICR_EXTI_SHIFT(g)))
+
+#define SYSCFG_EXTICR1_EXTI0_SHIFT    (0)       /* Bits 0-3: EXTI 0 coinfiguration */
+#define SYSCFG_EXTICR1_EXTI0_MASK     (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR1_EXTI0_SHIFT)
+#define SYSCFG_EXTICR1_EXTI1_SHIFT    (4)       /* Bits 4-7: EXTI 1 coinfiguration */
+#define SYSCFG_EXTICR1_EXTI1_MASK     (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR1_EXTI1_SHIFT)
+#define SYSCFG_EXTICR1_EXTI2_SHIFT    (8)       /* Bits 8-11: EXTI 2 coinfiguration */
+#define SYSCFG_EXTICR1_EXTI2_MASK     (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR1_EXTI2_SHIFT)
+#define SYSCFG_EXTICR1_EXTI3_SHIFT    (12)      /* Bits 12-15: EXTI 3 coinfiguration */
+#define SYSCFG_EXTICR1_EXTI3_MASK     (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR1_EXTI3_SHIFT)
+
+#define SYSCFG_EXTICR2_EXTI4_SHIFT    (0)       /* Bits 0-3: EXTI 4 coinfiguration */
+#define SYSCFG_EXTICR2_EXTI4_MASK     (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR2_EXTI4_SHIFT)
+#define SYSCFG_EXTICR2_EXTI5_SHIFT    (4)       /* Bits 4-7: EXTI 5 coinfiguration */
+#define SYSCFG_EXTICR2_EXTI5_MASK     (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR2_EXTI5_SHIFT)
+#define SYSCFG_EXTICR2_EXTI6_SHIFT    (8)       /* Bits 8-11: EXTI 6 coinfiguration */
+#define SYSCFG_EXTICR2_EXTI6_MASK     (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR2_EXTI6_SHIFT)
+#define SYSCFG_EXTICR2_EXTI7_SHIFT    (12)      /* Bits 12-15: EXTI 7 coinfiguration */
+#define SYSCFG_EXTICR2_EXTI7_MASK     (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR2_EXTI7_SHIFT)
+
+#define SYSCFG_EXTICR3_EXTI8_SHIFT    (0)       /* Bits 0-3: EXTI 8 coinfiguration */
+#define SYSCFG_EXTICR3_EXTI8_MASK     (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR3_EXTI8_SHIFT)
+#define SYSCFG_EXTICR3_EXTI9_SHIFT    (4)       /* Bits 4-7: EXTI 9 coinfiguration */
+#define SYSCFG_EXTICR3_EXTI9_MASK     (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR3_EXTI9_SHIFT)
+#define SYSCFG_EXTICR3_EXTI10_SHIFT   (8)       /* Bits 8-11: EXTI 10 coinfiguration */
+#define SYSCFG_EXTICR3_EXTI10_MASK    (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR3_EXTI10_SHIFT)
+#define SYSCFG_EXTICR3_EXTI11_SHIFT   (12)      /* Bits 12-15: EXTI 11 coinfiguration */
+#define SYSCFG_EXTICR3_EXTI11_MASK    (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR3_EXTI11_SHIFT)
+
+#define SYSCFG_EXTICR4_EXTI12_SHIFT   (0)       /* Bits 0-3: EXTI 12 coinfiguration */
+#define SYSCFG_EXTICR4_EXTI12_MASK    (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR4_EXTI12_SHIFT)
+#define SYSCFG_EXTICR4_EXTI13_SHIFT   (4)       /* Bits 4-7: EXTI 13 coinfiguration */
+#define SYSCFG_EXTICR4_EXTI13_MASK    (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR4_EXTI13_SHIFT)
+#define SYSCFG_EXTICR4_EXTI14_SHIFT   (8)       /* Bits 8-11: EXTI 14 coinfiguration */
+#define SYSCFG_EXTICR4_EXTI14_MASK    (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR4_EXTI14_SHIFT)
+#define SYSCFG_EXTICR4_EXTI15_SHIFT   (12)      /* Bits 12-15: EXTI 15 coinfiguration */
+#define SYSCFG_EXTICR4_EXTI15_MASK    (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR4_EXTI15_SHIFT)
+
+/* SYSCFG configuration register 2 */
+
+#define SYSCFG_CFGR2_LOCKUPLOCK       (1 << 0)  /* Bit 0: Cortex-M4 Hardfault output bit enable */
+#define SYSCFG_CFGR2_SRAM_PARITYLOCK  (1 << 1)  /* Bit 1: RAM parity lock */
+#define SYSCFG_CFGR2_PVDLOCK          (1 << 2)  /* Bit 2: PVD lock enable */
+#define SYSCFG_CFGR2_BYPADDPAR        (1 << 4)  /* Bit 4: Bypass address bit 29 in parity calculation */
+#define SYSCFG_CFGR2_SRAM_PEF         (1 << 8)  /* Bit 8: SRAM parity error */
+
+/* SYSCFG configuration register 3 */
+/* TODO */
+
+#endif /* CONFIG_STM32_STM32F33XX */
+#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F33XXX_SYSCFG_H */
diff --git a/arch/arm/src/stm32/chip/stm32f33xxx_vectors.h b/arch/arm/src/stm32/chip/stm32f33xxx_vectors.h
new file mode 100644
index 0000000000000000000000000000000000000000..cd1077a5e21aa2dc84c07c61686f9e0db036acaa
--- /dev/null
+++ b/arch/arm/src/stm32/chip/stm32f33xxx_vectors.h
@@ -0,0 +1,151 @@
+/************************************************************************************
+ * arch/arm/src/stm32/chip/stm32f33xxx_vectors.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *   Modified for STM32F334 by Mateusz Szafoni 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Pre-processor definitions
+ ************************************************************************************/
+/* This file is included by stm32_vectors.S.  It provides the macro VECTOR that
+ * supplies each STM32F33xxx vector in terms of a (lower-case) ISR label and an
+ * (upper-case) IRQ number as defined in arch/arm/include/stm32/stm32f33xxx_irq.h.
+ * stm32_vectors.S will defined the VECTOR in different ways in order to generate
+ * the interrupt vectors and handlers in their final form.
+ */
+
+/* If the common ARMv7-M vector handling is used, then all it needs is the following
+ * definition that provides the number of supported vectors.
+ */
+
+#ifdef CONFIG_ARMV7M_CMNVECTOR
+
+/* Reserve 82 interrupt table entries for I/O interrupts. */
+
+#  define ARMV7M_PERIPHERAL_INTERRUPTS 82
+
+#else
+
+VECTOR(stm32_wwdg, STM32_IRQ_WWDG)             /* 0:  Window Watchdog interrupt */
+VECTOR(stm32_pvd, STM32_IRQ_PVD)               /* 1:  PVD through EXTI Line detection interrupt */
+VECTOR(stm32_tamper, STM32_IRQ_TAMPER)         /* 2:  Tamper or Time stamp interrupt */
+VECTOR(stm32_rtc_wkup, STM32_IRQ_RTC_WKUP)     /* 3:  RTC global interrupt */
+VECTOR(stm32_flash, STM32_IRQ_FLASH)           /* 4:  Flash global interrupt */
+VECTOR(stm32_rcc, STM32_IRQ_RCC)               /* 5:  RCC global interrupt */
+VECTOR(stm32_exti0, STM32_IRQ_EXTI0)           /* 6:  EXTI Line 0 interrupt */
+VECTOR(stm32_exti1, STM32_IRQ_EXTI1)           /* 7:  EXTI Line 1 interrupt */
+VECTOR(stm32_exti2, STM32_IRQ_EXTI2)           /* 8:  EXTI Line 2 or TSC interrupt */
+VECTOR(stm32_exti3, STM32_IRQ_EXTI3)           /* 9:  EXTI Line 3 interrupt */
+
+VECTOR(stm32_exti4, STM32_IRQ_EXTI4)           /* 10: EXTI Line 4 interrupt */
+VECTOR(stm32_dma1ch1, STM32_IRQ_DMA1CH1)       /* 11: DMA1 channel 1 global interrupt */
+VECTOR(stm32_dma1ch2, STM32_IRQ_DMA1CH2)       /* 12: DMA1 channel 2 global interrupt */
+VECTOR(stm32_dma1ch3, STM32_IRQ_DMA1CH3)       /* 13: DMA1 channel 3 global interrupt */
+VECTOR(stm32_dma1ch4, STM32_IRQ_DMA1CH4)       /* 14: DMA1 channel 4 global interrupt */
+VECTOR(stm32_dma1ch5, STM32_IRQ_DMA1CH5)       /* 15: DMA1 channel 5 global interrupt */
+VECTOR(stm32_dma1ch6, STM32_IRQ_DMA1CH6)       /* 16: DMA1 channel 6 global interrupt */
+VECTOR(stm32_dma1ch7, STM32_IRQ_DMA1CH7)       /* 17: DMA1 channel 7 global interrupt */
+VECTOR(stm32_adc12, STM32_IRQ_ADC12)           /* 18: ADC1/ADC2 global interrupt */
+VECTOR(stm32_can1tx, STM32_IRQ_CAN1TX)         /* 19: USB High Priority or CAN1 TX interrupts */
+
+VECTOR(stm32_can1rx0, STM32_IRQ_CAN1RX0)       /* 20: USB Low Priority or CAN1 RX0 interrupts*/
+VECTOR(stm32_can1rx1, STM32_IRQ_CAN1RX1)       /* 21: CAN1 RX1 interrupt */
+VECTOR(stm32_can1sce, STM32_IRQ_CAN1SCE)       /* 22: CAN1 SCE interrupt */
+VECTOR(stm32_exti95, STM32_IRQ_EXTI95)         /* 23: EXTI Line[9:5] interrupts */
+VECTOR(stm32_tim1brk, STM32_IRQ_TIM1BRK)       /* 24: TIM1 Break or TIM15 global interrupt */
+VECTOR(stm32_tim1up, STM32_IRQ_TIM1UP)         /* 25: TIM1 Update or TIM16 global interrupt */
+VECTOR(stm32_tim1trgcom, STM32_IRQ_TIM1TRGCOM) /* 26: TIM1 Trigger or TIM17 global interrupt */
+VECTOR(stm32_tim1cc, STM32_IRQ_TIM1CC)         /* 27: TIM1 Capture Compare interrupt */
+VECTOR(stm32_tim2, STM32_IRQ_TIM2)             /* 28: TIM2 global interrupt */
+VECTOR(stm32_tim3, STM32_IRQ_TIM3)             /* 29: TIM3 global interrupt */
+
+UNUSED(STM32_IRQ_RESERVED30)                   /* 30: Reserved */
+VECTOR(stm32_i2c1ev, STM32_IRQ_I2C1EV)         /* 31: I2C1 event or EXTI Line23 interrupt */
+VECTOR(stm32_i2c1er, STM32_IRQ_I2C1ER)         /* 32: I2C1 error interrupt */
+UNUSED(STM32_IRQ_RESERVED33)                   /* 33: Reserved */
+UNUSED(STM32_IRQ_RESERVED34)                   /* 34: Reserved */
+VECTOR(stm32_spi1, STM32_IRQ_SPI1)             /* 35: SPI1 global interrupt */
+UNUSED(STM32_IRQ_RESERVED36)                   /* 36: Reserved */
+VECTOR(stm32_usart1, STM32_IRQ_USART1)         /* 37: USART1 global or EXTI Line 25 interrupt */
+VECTOR(stm32_usart2, STM32_IRQ_USART2)         /* 38: USART2 global or EXTI Line 26 interrupt */
+VECTOR(stm32_usart3, STM32_IRQ_USART3)         /* 39: USART3 global or EXTI Line 28 interrupt */
+
+VECTOR(stm32_exti1510, STM32_IRQ_EXTI1510)     /* 40: EXTI Line[15:10] interrupts */
+VECTOR(stm32_rtcalrm, STM32_IRQ_RTCALRM)       /* 41: RTC alarm through EXTI line interrupt */
+UNUSED(STM32_IRQ_RESERVED42)                   /* 42: Reserved */
+UNUSED(STM32_IRQ_RESERVED43)                   /* 43: Reserved */
+UNUSED(STM32_IRQ_RESERVED44)                   /* 44: Reserved */
+UNUSED(STM32_IRQ_RESERVED45)                   /* 45: Reserved */
+UNUSED(STM32_IRQ_RESERVED46)                   /* 46: Reserved */
+UNUSED(STM32_IRQ_RESERVED47)                   /* 47: Reserved*/
+UNUSED(STM32_IRQ_RESERVED48)                   /* 48: Reserved */
+UNUSED(STM32_IRQ_RESERVED49)                   /* 49: Reserved */
+
+UNUSED(STM32_IRQ_RESERVED50)                   /* 50: Reserved */
+UNUSED(STM32_IRQ_RESERVED51)                   /* 51: Reserved */
+UNUSED(STM32_IRQ_RESERVED51)                   /* 52: Reserved */
+UNUSED(STM32_IRQ_RESERVED52)                   /* 53: Reserved */
+VECTOR(stm32_dac1, STM32_IRQ_DAC1)             /* 54: TIM6 global or DAC1 underrun interrupts */
+VECTOR(stm32_dac2, STM32_IRQ_DAC2)             /* 55: TIM7 global or DAC2 underrun interrupt */
+UNUSED(STM32_IRQ_RESERVED56)                   /* 56: Reserved */
+UNUSED(STM32_IRQ_RESERVED57)                   /* 57: Reserved */
+UNUSED(STM32_IRQ_RESERVED58)                   /* 58: Reserved */
+UNUSED(STM32_IRQ_RESERVED59)                   /* 59: Reserved */
+
+UNUSED(STM32_IRQ_RESERVED60)                   /* 60: Reserved */
+UNUSED(STM32_IRQ_RESERVED61)                   /* 61: Reserved */
+UNUSED(STM32_IRQ_RESERVED62)                   /* 62: Reserved */
+UNUSED(STM32_IRQ_RESERVED63)                   /* 63: Reserved */
+VECTOR(stm32_comp2, STM32_IRQ_COMP2)           /* 64: COMP2 or EXTI Lines 21-2 and 29 interrupts */
+VECTOR(stm32_comp46, STM32_IRQ_COMP46)         /* 65: COMP4/COMP6 or EXTI Lines 30-2 interrupts */
+UNUSED(STM32_IRQ_RESERVED66)                   /* 66: Reserved */
+VECTOR(stm32_hrtim_tm, STM32_IRQ_HRTIMTM)      /* 67: HRTIM master timer interrutp */
+VECTOR(stm32_hrtim_ta, STM32_IRQ_HRTIMTA)      /* 68: HRTIM timer A interrutp */
+VECTOR(stm32_hrtim_tb, STM32_IRQ_HRTIMTB)      /* 69: HRTIM timer B interrutp */
+
+VECTOR(stm32_hrtim_tc, STM32_IRQ_HRTIMTC)      /* 70: HRTIM timer C interrutp */
+VECTOR(stm32_hrtim_td, STM32_IRQ_HRTIMTD)      /* 71: HRTIM timer D interrutp */
+VECTOR(stm32_hrtim_te, STM32_IRQ_HRTIMTE)      /* 72: HRTIM timer E interrutp */
+VECTOR(stm32_hrtim_flt, STM32_IRQ_HRTIMFLT)    /* 73: HRTIM fault interrutp */
+UNUSED(STM32_IRQ_RESERVED73)                   /* 74: Reserved */
+UNUSED(STM32_IRQ_RESERVED74)                   /* 75: Reserved */
+UNUSED(STM32_IRQ_RESERVED75)                   /* 76: Reserved */
+UNUSED(STM32_IRQ_RESERVED76)                   /* 77: Reserved */
+UNUSED(STM32_IRQ_RESERVED77)                   /* 78: Reserved */
+UNUSED(STM32_IRQ_RESERVED78)                   /* 79: Reserved */
+
+UNUSED(STM32_IRQ_RESERVED79)                   /* 80: Reserved */
+UNUSED(STM32_IRQ_RESERVED80)                   /* 81: Reserved */
+VECTOR(stm32_fpu, STM32_IRQ_FPU)               /* 82: FPU global interrupt */
+
+#endif /* CONFIG_ARMV7M_CMNVECTOR */
diff --git a/arch/arm/src/stm32/chip/stm32f37xxx_adc.h b/arch/arm/src/stm32/chip/stm32f37xxx_adc.h
new file mode 100644
index 0000000000000000000000000000000000000000..95a40ade448ee3e4df1911735b260e7cc5b8b926
--- /dev/null
+++ b/arch/arm/src/stm32/chip/stm32f37xxx_adc.h
@@ -0,0 +1,321 @@
+/****************************************************************************************************
+ * arch/arm/src/stm32/chip/stm32f30xxx_adc.h
+ *
+ *   Copyright (C) 2009, 2011, 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Studelec SA. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            Marc Rechté 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32F37XXX_ADC_H
+#define __ARCH_ARM_SRC_STM32_CHIP_STM32F37XXX_ADC_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+/* Register Offsets *********************************************************************************/
+
+#define STM32_ADC_SR_OFFSET          0x0000  /* ADC status register */
+#define STM32_ADC_CR1_OFFSET         0x0004  /* ADC control register 1 */
+#define STM32_ADC_CR2_OFFSET         0x0008  /* ADC control register 2 */
+#define STM32_ADC_SMPR1_OFFSET       0x000c  /* ADC sample time register 1 */
+#define STM32_ADC_SMPR2_OFFSET       0x0010  /* ADC sample time register 2 */
+#define STM32_ADC_JOFR1_OFFSET       0x0014  /* ADC injected channel data offset register 1 */
+#define STM32_ADC_JOFR2_OFFSET       0x0018  /* ADC injected channel data offset register 2 */
+#define STM32_ADC_JOFR3_OFFSET       0x001c  /* ADC injected channel data offset register 3 */
+#define STM32_ADC_JOFR4_OFFSET       0x0020  /* ADC injected channel data offset register 4 */
+#define STM32_ADC_HTR_OFFSET         0x0024  /* ADC watchdog high threshold register */
+#define STM32_ADC_LTR_OFFSET         0x0028  /* ADC watchdog low threshold register */
+#define STM32_ADC_SQR1_OFFSET        0x002c  /* ADC regular sequence register 1 */
+#define STM32_ADC_SQR2_OFFSET        0x0030  /* ADC regular sequence register 2 */
+#define STM32_ADC_SQR3_OFFSET        0x0034  /* ADC regular sequence register 3 */
+#define STM32_ADC_JSQR_OFFSET        0x0038  /* ADC injected sequence register */
+#define STM32_ADC_JDR1_OFFSET        0x003c  /* ADC injected data register 1 */
+#define STM32_ADC_JDR2_OFFSET        0x0040  /* ADC injected data register 2 */
+#define STM32_ADC_JDR3_OFFSET        0x0044  /* ADC injected data register 3 */
+#define STM32_ADC_JDR4_OFFSET        0x0048  /* ADC injected data register 4 */
+#define STM32_ADC_DR_OFFSET          0x004c  /* ADC regular data register */
+
+/* Register Addresses *******************************************************************************/
+
+#define STM32_ADC_SR                 (STM32_ADC_BASE+STM32_ADC_SR_OFFSET)
+#define STM32_ADC_CR1                (STM32_ADC_BASE+STM32_ADC_CR1_OFFSET)
+#define STM32_ADC_CR2                (STM32_ADC_BASE+STM32_ADC_CR2_OFFSET)
+#define STM32_ADC_SMPR1              (STM32_ADC_BASE+STM32_ADC_SMPR1_OFFSET)
+#define STM32_ADC_SMPR2              (STM32_ADC_BASE+STM32_ADC_SMPR2_OFFSET)
+#define STM32_ADC_JOFR1              (STM32_ADC_BASE+STM32_ADC_JOFR1_OFFSET)
+#define STM32_ADC_JOFR2              (STM32_ADC_BASE+STM32_ADC_JOFR2_OFFSET)
+#define STM32_ADC_JOFR3              (STM32_ADC_BASE+STM32_ADC_JOFR3_OFFSET)
+#define STM32_ADC_JOFR4              (STM32_ADC_BASE+STM32_ADC_JOFR4_OFFSET)
+#define STM32_ADC_HTR                (STM32_ADC_BASE+STM32_ADC_HTR_OFFSET)
+#define STM32_ADC_LTR                (STM32_ADC_BASE+STM32_ADC_LTR_OFFSET)
+#define STM32_ADC_SQR1               (STM32_ADC_BASE+STM32_ADC_SQR1_OFFSET)
+#define STM32_ADC_SQR2               (STM32_ADC_BASE+STM32_ADC_SQR2_OFFSET)
+#define STM32_ADC_SQR3               (STM32_ADC_BASE+STM32_ADC_SQR3_OFFSET)
+#define STM32_ADC_JSQR               (STM32_ADC_BASE+STM32_ADC_JSQR_OFFSET)
+#define STM32_ADC_JDR1               (STM32_ADC_BASE+STM32_ADC_JDR1_OFFSET)
+#define STM32_ADC_JDR2               (STM32_ADC_BASE+STM32_ADC_JDR2_OFFSET)
+#define STM32_ADC_JDR3               (STM32_ADC_BASE+STM32_ADC_JDR3_OFFSET)
+#define STM32_ADC_JDR4               (STM32_ADC_BASE+STM32_ADC_JDR4_OFFSET)
+#define STM32_ADC_DR                 (STM32_ADC_BASE+STM32_ADC_DR_OFFSET)
+
+/* Register Bitfield Definitions ********************************************************************/
+/* ADC status register (SR) */
+
+#define ADC_SR_AWD                   (1 << 0)  /* Bit 0:  Analog wtchdog flag */
+#define ADC_SR_EOC                   (1 << 1)  /* Bit 1:  End of conversion */
+#define ADC_SR_JEOC                  (1 << 2)  /* Bit 2:  Injected channel end of conversion */
+#define ADC_SR_JSTRT                 (1 << 3)  /* Bit 3:  Injected channel start flag */
+#define ADC_SR_RSTRT                 (1 << 4)  /* Bit 4:  Regular channel start flag */
+
+/* ADC control register 1 */
+
+#define ADC_CR1_AWDCH_SHIFT          (0)       /* Bits 0-4: Analog watchdog channel select bits */
+#define ADC_CR1_AWDCH_MASK           (0x1f << ADC_CR1_AWDCH_SHIFT)
+#define ADC_CR1_EOCIE                (1 << 5)  /* Bit 5: Interrupt enable EOC */
+#define ADC_CR1_AWDIE                (1 << 6)  /* Bit 6: Analog watchdog interrupt enable */
+#define ADC_CR1_JEOCIE               (1 << 7)  /* Bit 7: Interrupt enable for injected channels */
+#define ADC_CR1_SCAN                 (1 << 8)  /* Bit 8: Scan mode */
+#define ADC_CR1_AWDSGL               (1 << 9)  /* Bit 9: Enable the watchdog on a single channel in scan mode */
+#define ADC_CR1_JAUTO                (1 << 10) /* Bit 10: Automatic Injected Group conversion */
+#define ADC_CR1_DISCEN               (1 << 11) /* Bit 11: Discontinuous mode on regular channels */
+#define ADC_CR1_JDISCEN              (1 << 12) /* Bit 12: Discontinuous mode on injected channels */
+#define ADC_CR1_DISNUM_SHIFT         (13)      /* Bit 13-15: Discontinuous mode channel count */
+#define ADC_CR1_DISNUM_MASK          (0x7 << ADC_CR1_DISNUM_SHIFT)
+#define ADC_CR1_JAWDEN               (1 << 22) /* Bit 22: Analog watchdog enable on injected channels */
+#define ADC_CR1_AWDEN                (1 << 23) /* Bit 23: Analog watchdog enable on regular channels */
+
+/* ADC control register 2 */
+
+#define ADC_CR2_ADON                 (1 << 0)  /* Bit 0: A/D converter ON / OFF */
+#define ADC_CR2_CONT                 (1 << 1)  /* Bit 1: Continuous conversion */
+#define ADC_CR2_CAL                  (1 << 2)  /* Bit 2: A/D Calibration */
+#define ADC_CR2_RSTCAL               (1 << 3)  /* Bit 3: Reset calibration */
+#define ADC_CR2_DMA                  (1 << 8)  /* Bit 8: Direct memory access mode */
+#define ADC_CR2_ALIGN                (1 << 11) /* Bit 11: Data alignment */
+#define ADC_CR2_JEXTSEL_SHIFT        (12)      /* Bit 12-14: External event select for injected group */
+#define ADC_CR2_JEXTSEL_MASK         (0x7 << ADC_CR2_JEXTSEL_SHIFT)
+#  define ADC_CR2_JEXTSEL_TIM19_CC1  (0 << ADC_CR2_JEXTSEL_SHIFT)
+#  define ADC_CR2_JEXTSEL_TIM19_CC2  (1 << ADC_CR2_JEXTSEL_SHIFT)
+#  define ADC_CR2_JEXTSEL_TIM2_TRGO  (2 << ADC_CR2_JEXTSEL_SHIFT)
+#  define ADC_CR2_JEXTSEL_TIM2_CC1   (3 << ADC_CR2_JEXTSEL_SHIFT)
+#  define ADC_CR2_JEXTSEL_TIM3_CC4   (4 << ADC_CR2_JEXTSEL_SHIFT)
+#  define ADC_CR2_JEXTSEL_TIM4_TRGO  (5 << ADC_CR2_JEXTSEL_SHIFT)
+#  define ADC_CR2_JEXTSEL_EXTI15     (6 << ADC_CR2_JEXTSEL_SHIFT)
+#  define ADC_CR2_JEXTSEL_JSWSTART   (7 << ADC_CR2_JEXTSEL_SHIFT)
+#define ADC_CR2_JEXTTRIG             (1 << 15) /* Bit 15: External trigger conversion mode for injected channels */
+#define ADC_CR2_EXTSEL_SHIFT         (17)      /* Bit 17-19: External event select for regular group */
+#define ADC_CR2_EXTSEL_MASK          (0x7 << ADC_CR2_EXTSEL_SHIFT)
+#  define ADC_CR2_EXTSEL_TIM19_TRGO  (0 << ADC_CR2_EXTSEL_SHIFT)
+#  define ADC_CR2_EXTSEL_TIM19_CC3   (1 << ADC_CR2_EXTSEL_SHIFT)
+#  define ADC_CR2_EXTSEL_TIM19_CC4   (2 << ADC_CR2_EXTSEL_SHIFT)
+#  define ADC_CR2_EXTSEL_TIM2_CC2    (3 << ADC_CR2_EXTSEL_SHIFT)
+#  define ADC_CR2_EXTSEL_TIM3_TRGO   (4 << ADC_CR2_EXTSEL_SHIFT)
+#  define ADC_CR2_EXTSEL_TIM4_CC4    (5 << ADC_CR2_EXTSEL_SHIFT)
+#  define ADC_CR2_EXTSEL_EXTI11      (6 << ADC_CR2_EXTSEL_SHIFT)
+#  define ADC_CR2_EXTSEL_SWSTART     (7 << ADC_CR2_EXTSEL_SHIFT)
+#define ADC_CR2_EXTTRIG              (1 << 20) /* Bit 20: External trigger conversion mode for regular channels */
+#define ADC_CR2_JSWSTART             (1 << 21) /* Bit 21: Start conversion of injected channels */
+#define ADC_CR2_SWSTART              (1 << 22) /* Bit 22: Start conversion of regular channels */
+#define ADC_CR2_TSVREFE              (1 << 23) /* Bit 23: Temperature sensor and V REFINT enable */
+
+/* ADC sample time register 1 */
+
+#define ADC_SMPR_1p5                 0         /* 000: 1.5 cycles */
+#define ADC_SMPR_7p5                 1         /* 001: 7.5 cycles */
+#define ADC_SMPR_13p5                2         /* 010: 13.5 cycles */
+#define ADC_SMPR_28p5                3         /* 011: 28.5 cycles */
+#define ADC_SMPR_41p5                4         /* 100: 41.5 cycles */
+#define ADC_SMPR_55p5                5         /* 101: 55.5 cycles */
+#define ADC_SMPR_71p5                6         /* 110: 71.5 cycles */
+#define ADC_SMPR_239p5               7         /* 111: 239.5 cycles */
+
+#define ADC_SMPR1_SMP10_SHIFT        (0)       /* Bits 0-2: Channel 10 Sample time selection */
+#define ADC_SMPR1_SMP10_MASK         (7 << ADC_SMPR1_SMP10_SHIFT)
+#define ADC_SMPR1_SMP11_SHIFT        (3)       /* Bits 3-5: Channel 11 Sample time selection */
+#define ADC_SMPR1_SMP11_MASK         (7 << ADC_SMPR1_SMP11_SHIFT)
+#define ADC_SMPR1_SMP12_SHIFT        (6)       /* Bits 6-8: Channel 12 Sample time selection */
+#define ADC_SMPR1_SMP12_MASK         (7 << ADC_SMPR1_SMP12_SHIFT)
+#define ADC_SMPR1_SMP13_SHIFT        (9)       /* Bits 9-11: Channel 13 Sample time selection */
+#define ADC_SMPR1_SMP13_MASK         (7 << ADC_SMPR1_SMP13_SHIFT)
+#define ADC_SMPR1_SMP14_SHIFT        (12)      /* Bits 12-14: Channel 14 Sample time selection */
+#define ADC_SMPR1_SMP14_MASK         (7 << ADC_SMPR1_SMP14_SHIFT)
+#define ADC_SMPR1_SMP15_SHIFT        (15)      /* Bits 15-17: Channel 15 Sample time selection */
+#define ADC_SMPR1_SMP15_MASK         (7 << ADC_SMPR1_SMP15_SHIFT)
+#define ADC_SMPR1_SMP16_SHIFT        (18)      /* Bits 18-20: Channel 16 Sample time selection */
+#define ADC_SMPR1_SMP16_MASK         (7 << ADC_SMPR1_SMP16_SHIFT)
+#define ADC_SMPR1_SMP17_SHIFT        (21)      /* Bits 21-23: Channel 17 Sample time selection */
+#define ADC_SMPR1_SMP17_MASK         (7 << ADC_SMPR1_SMP17_SHIFT)
+#define ADC_SMPR1_SMP18_SHIFT        (21)      /* Bits 24-26: Channel 18 Sample time selection */
+#define ADC_SMPR1_SMP18_MASK         (7 << ADC_SMPR1_SMP17_SHIFT)
+
+/* ADC sample time register 2 */
+
+#define ADC_SMPR2_SMP0_SHIFT         (0)       /* Bits 2-0: Channel 0 Sample time selection */
+#define ADC_SMPR2_SMP0_MASK          (7 << ADC_SMPR2_SMP0_SHIFT)
+#define ADC_SMPR2_SMP1_SHIFT         (3)       /* Bits 5-3: Channel 1 Sample time selection */
+#define ADC_SMPR2_SMP1_MASK          (7 << ADC_SMPR2_SMP1_SHIFT)
+#define ADC_SMPR2_SMP2_SHIFT         (6)       /* Bits 8-6: Channel 2 Sample time selection */
+#define ADC_SMPR2_SMP2_MASK          (7 << ADC_SMPR2_SMP2_SHIFT)
+#define ADC_SMPR2_SMP3_SHIFT         (9)       /* Bits 11-9: Channel 3 Sample time selection */
+#define ADC_SMPR2_SMP3_MASK          (7 << ADC_SMPR2_SMP3_SHIFT)
+#define ADC_SMPR2_SMP4_SHIFT         (12)      /* Bits 14-12: Channel 4 Sample time selection */
+#define ADC_SMPR2_SMP4_MASK          (7 << ADC_SMPR2_SMP4_SHIFT)
+#define ADC_SMPR2_SMP5_SHIFT         (15)      /* Bits 17-15: Channel 5 Sample time selection */
+#define ADC_SMPR2_SMP5_MASK          (7 << ADC_SMPR2_SMP5_SHIFT)
+#define ADC_SMPR2_SMP6_SHIFT         (18)      /* Bits 20-18: Channel 6 Sample time selection */
+#define ADC_SMPR2_SMP6_MASK          (7 << ADC_SMPR2_SMP6_SHIFT)
+#define ADC_SMPR2_SMP7_SHIFT         (21)      /* Bits 23-21: Channel 7 Sample time selection */
+#define ADC_SMPR2_SMP7_MASK          (7 << ADC_SMPR2_SMP7_SHIFT)
+#define ADC_SMPR2_SMP8_SHIFT         (24)      /* Bits 26-24: Channel 8 Sample time selection */
+#define ADC_SMPR2_SMP8_MASK          (7 << ADC_SMPR2_SMP8_SHIFT)
+#define ADC_SMPR2_SMP9_SHIFT         (27)      /* Bits 29-27: Channel 9 Sample time selection */
+#define ADC_SMPR2_SMP9_MASK          (7 << ADC_SMPR2_SMP9_SHIFT)
+
+/* ADC injected channel data offset register 1, 2, 3, and 4 */
+
+#define ADC_JOFR_OFFSETX_SHIFT       (0)        /* Bits 0-11: Data offset for injected channel x */
+#define ADC_JOFR_OFFSETX_MASK        (0x0fff << ADC_JOFR_OFFSETX_SHIFT)
+
+/* ADC watchdog high threshold register */
+
+#define ADC_HTR_HT_SHIFT             (0)      /* Bits 0-11: Analog watchdog high threshold */
+#define ADC_HTR_HT_MASK              (0xfff << ADC_HTR_HT_SHIFT)
+
+/* ADC watchdog low threshold register */
+
+#define ADC_LTR_LT_SHIFT             (0)      /* Bits 0-11: Analog watchdog low threshold */
+#define ADC_LTR_LT_MASK              (0xfff << ADC_LTR_LT_SHIFT)
+
+/* Offset between SQ bits */
+
+#define ADC_SQ_OFFSET                (5)
+
+/* ADC regular sequence register 1 */
+
+#define ADC_SQR1_SQ13_SHIFT          (0)         /* Bits 0-4:   13th conversion in regular sequence */
+#define ADC_SQR1_SQ13_MASK           (0x1f << ADC_SQR1_SQ13_SHIFT)
+#define ADC_SQR1_SQ14_SHIFT          (5)         /* Bits 5-9:   14th conversion in regular sequence */
+#define ADC_SQR1_SQ14_MASK           (0x1f << ADC_SQR1_SQ14_SHIFT)
+#define ADC_SQR1_SQ15_SHIFT          (10)        /* Bits 10-14: 15th conversion in regular sequence */
+#define ADC_SQR1_SQ15_MASK           (0x1f << ADC_SQR1_SQ15_SHIFT)
+#define ADC_SQR1_SQ16_SHIFT          (15)        /* Bits 15-19: 16th conversion in regular sequence */
+#define ADC_SQR1_SQ16_MASK           (0x1f << ADC_SQR1_SQ16_SHIFT)
+#define ADC_SQR1_L_SHIFT             (20)        /* Bits 20-23: Regular channel sequence length */
+#define ADC_SQR1_L_MASK              (0xf << ADC_SQR1_L_SHIFT)
+#define ADC_SQR1_RESERVED            (0xff000000)
+#define ADC_SQR1_FIRST               (13)
+#define ADC_SQR1_LAST                (16)
+#define ADC_SQR1_SQ_OFFSET           (0)
+
+/* ADC regular sequence register 2 */
+
+#define ADC_SQR2_SQ7_SHIFT           (0)         /* Bits 0-4:   7th conversion in regular sequence */
+#define ADC_SQR2_SQ7_MASK            (0x1f << ADC_SQR2_SQ7_SHIFT)
+#define ADC_SQR2_SQ8_SHIFT           (5)         /* Bits 5-9:   8th conversion in regular sequence */
+#define ADC_SQR2_SQ8_MASK            (0x1f << ADC_SQR2_SQ8_SHIFT)
+#define ADC_SQR2_SQ9_SHIFT           (10)        /* Bits 10-14: 9th conversion in regular sequence */
+#define ADC_SQR2_SQ9_MASK            (0x1f << ADC_SQR2_SQ9_SHIFT)
+#define ADC_SQR2_SQ10_SHIFT          (15)       /* Bits 15-19: 10th conversion in regular sequence */
+#define ADC_SQR2_SQ10_MASK           (0x1f << ADC_SQR2_SQ10_SHIFT)
+#define ADC_SQR2_SQ11_SHIFT          (15)       /* Bits 20-24: 11th conversion in regular sequence */
+#define ADC_SQR2_SQ11_MASK           (0x1f << ADC_SQR2_SQ11_SHIFT)
+#define ADC_SQR2_SQ12_SHIFT          (15)       /* Bits 25-29: 12th conversion in regular sequence */
+#define ADC_SQR2_SQ12_MASK           (0x1f << ADC_SQR2_SQ12_SHIFT)
+#define ADC_SQR2_RESERVED            (0xc0000000)
+#define ADC_SQR2_FIRST               (7)
+#define ADC_SQR2_LAST                (12)
+#define ADC_SQR2_SQ_OFFSET           (0)
+
+/* ADC regular sequence register 3 */
+
+#define ADC_SQR3_SQ1_SHIFT           (0)         /* Bits 0-4:   1rst conversion in regular sequence */
+#define ADC_SQR3_SQ1_MASK            (0x1f << ADC_SQR3_SQ1_SHIFT)
+#define ADC_SQR3_SQ2_SHIFT           (5)         /* Bits 5-9:   2nd conversion in regular sequence */
+#define ADC_SQR3_SQ2_MASK            (0x1f << ADC_SQR3_SQ2_SHIFT)
+#define ADC_SQR3_SQ3_SHIFT           (10)        /* Bits 10-14: 3rd conversion in regular sequence */
+#define ADC_SQR3_SQ3_MASK            (0x1f << ADC_SQR3_SQ3_SHIFT)
+#define ADC_SQR3_SQ4_SHIFT           (15)       /* Bits 15-19: 4th conversion in regular sequence */
+#define ADC_SQR3_SQ4_MASK            (0x1f << ADC_SQR3_SQ4_SHIFT)
+#define ADC_SQR3_SQ5_SHIFT           (15)       /* Bits 20-24: 5th conversion in regular sequence */
+#define ADC_SQR3_SQ5_MASK            (0x1f << ADC_SQR3_SQ5_SHIFT)
+#define ADC_SQR3_SQ6_SHIFT           (15)       /* Bits 25-29: 6th conversion in regular sequence */
+#define ADC_SQR3_SQ6_MASK            (0x1f << ADC_SQR3_SQ6_SHIFT)
+#define ADC_SQR3_RESERVED            (0xc0000000)
+#define ADC_SQR3_FIRST               (1)
+#define ADC_SQR3_LAST                (6)
+#define ADC_SQR3_SQ_OFFSET           (0)
+
+/* ADC injected sequence register */
+
+#define ADC_JSQR_JSQ1_SHIFT          (0)         /* Bits 0-4:   1rst conversion in injected sequence */
+#define ADC_JSQR_JSQ1_MASK           (0x1f << ADC_JSQR_JSQ1_SHIFT)
+#define ADC_JSQR_JSQ2_SHIFT          (5)         /* Bits 5-9:   2nd conversion in injected sequence */
+#define ADC_JSQR_JSQ2_MASK           (0x1f << ADC_JSQR_JSQ2_SHIFT)
+#define ADC_JSQR_JSQ3_SHIFT          (10)        /* Bits 10-14: 3rd conversion in injected sequence */
+#define ADC_JSQR_JSQ3_MASK           (0x1f << ADC_JSQR_JSQ3_SHIFT)
+#define ADC_JSQR_JSQ4_SHIFT          (15)        /* Bits 15-19: 4th conversion in injected sequence */
+#define ADC_JSQR_JSQ4_MASK           (0x1f << ADC_JSQR_JSQ4_SHIFT)
+#define ADC_JSQR_JL_SHIFT            (20)        /* Bits 20-21: Injected sequence length */
+#define ADC_JSQR_JL_MASK             (0x3 << ADC_JSQR_JL_SHIFT)
+
+/* ADC injected data register 1, 2, 3, and 4 */
+
+#define ADC_JDR_JDATA_SHIFT          (0)
+#define ADC_JDR_JDATA_MASK           (0xffff << ADC_JDR_JDATA_SHIFT)
+
+/* ADC regular data register */
+
+#define ADC_DR_RDATA_SHIFT           (0)
+#define ADC_DR_RDATA_MASK            (0xffff << ADC_DR_RDATA_SHIFT)
+
+/****************************************************************************************************
+ * Public Types
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public Data
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F37XXX_ADC_H */
diff --git a/arch/arm/src/stm32/chip/stm32f37xxx_memorymap.h b/arch/arm/src/stm32/chip/stm32f37xxx_memorymap.h
index a9116019bfe3dbf298a9a9218468b7dccdc331c3..49bfa2ecf2ea9f9d9ecfcaa09ebc36721b343fdf 100644
--- a/arch/arm/src/stm32/chip/stm32f37xxx_memorymap.h
+++ b/arch/arm/src/stm32/chip/stm32f37xxx_memorymap.h
@@ -94,6 +94,7 @@
 #define STM32_TIM13_BASE     0x40001c00     /* 0x40001c00-0x40001fff TIM13 */
 #define STM32_TIM14_BASE     0x40002000     /* 0x40002000-0x400023ff TIM14 */
 #define STM32_RTC_BASE       0x40002800     /* 0x40002800-0x40002bff RTC */
+#define STM32_BKP_BASE       0x40002850     /* 0x40002850-0x400028cc BKP */
 #define STM32_WWDG_BASE      0x40002c00     /* 0x40002c00-0x40002fff WWDG */
 #define STM32_IWDG_BASE      0x40003000     /* 0x40003000-0x400033ff IWDG */
 #define STM32_SPI2_BASE      0x40003800     /* 0x40003800-0x40003bff SPI2, or */
@@ -117,7 +118,7 @@
 
 #define STM32_SYSCFG_BASE    0x40010000     /* 0x40010000-0x400103FF SYSCFG + COMP + OPAMP */
 #define STM32_EXTI_BASE      0x40010400     /* 0x40010400-0x400107FF EXTI */
-#define STM32_ADC1_BASE      0x40012400     /* 0x40012400-0x400127ff ADC1 */
+#define STM32_ADC_BASE       0x40012400     /* 0x40012400-0x400127ff ADC */
 #define STM32_SPI1_BASE      0x40013000     /* 0x40013000-0x400133ff SPI1 */
 #define STM32_USART1_BASE    0x40013800     /* 0x40013800-0x40013bff USART1 */
 #define STM32_TIM15_BASE     0x40014000     /* 0x40014000-0x400143ff TIM15 */
@@ -128,6 +129,8 @@
 #define STM32_SDADC2_BASE    0x40016400     /* 0x40016000-0x400167ff SDADC2 */
 #define STM32_SDADC3_BASE    0x40016800     /* 0x40016000-0x40016bff SDADC3 */
 
+#define STM32_ADC1_BASE      STM32_ADC_BASE
+
 /* AHB1 Base Addresses **************************************************************/
 
 #define STM32_DMA1_BASE      0x40020000     /* 0x40020000-0x400203ff: DMA1  */
diff --git a/arch/arm/src/stm32/chip/stm32f37xxx_pinmap.h b/arch/arm/src/stm32/chip/stm32f37xxx_pinmap.h
index 6f48b4bf1e87308d0423cceac8f97d72359c59ab..a20ae8577f3195a5e126b270d96ccf74695aa238 100644
--- a/arch/arm/src/stm32/chip/stm32f37xxx_pinmap.h
+++ b/arch/arm/src/stm32/chip/stm32f37xxx_pinmap.h
@@ -69,6 +69,71 @@
  * pins in this file.
  */
 
+/* ADC */
+
+#define GPIO_ADC_IN1        (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_ADC_IN2        (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_ADC_IN3        (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_ADC_IN4        (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_ADC_IN5        (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_ADC_IN6        (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_ADC_IN7        (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_ADC_IN8        (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_ADC_IN9        (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_ADC_IN10       (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN0)
+#define GPIO_ADC_IN11       (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN1)
+#define GPIO_ADC_IN12       (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN2)
+#define GPIO_ADC_IN13       (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN3)
+#define GPIO_ADC_IN14       (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN4)
+#define GPIO_ADC_IN15       (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN5)
+
+/* SDADC */
+
+#define GPIO_SDADC1_AIN0P   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN12)
+#define GPIO_SDADC1_AIN0M   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN13)
+#define GPIO_SDADC1_AIN1P   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN11)
+#define GPIO_SDADC1_AIN2P   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN10)
+#define GPIO_SDADC1_AIN2M   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN11)
+#define GPIO_SDADC1_AIN3P   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN7)
+#define GPIO_SDADC1_AIN4P   (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN2)
+#define GPIO_SDADC1_AIN4M   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN7)
+#define GPIO_SDADC1_AIN5P   (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_SDADC1_AIN6P   (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_SDADC1_AIN6M   (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_SDADC1_AIN7P   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN9)
+#define GPIO_SDADC1_AIN8P   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN8)
+#define GPIO_SDADC1_AIN8M   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN9)
+
+#define GPIO_SDADC2_AIN0P   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN15)
+#define GPIO_SDADC2_AIN0M   (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_SDADC2_AIN1P   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN14)
+#define GPIO_SDADC2_AIN2P   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN13)
+#define GPIO_SDADC2_AIN2M   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN14)
+#define GPIO_SDADC2_AIN3P   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN12)
+#define GPIO_SDADC2_AIN4P   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN11)
+#define GPIO_SDADC2_AIN4M   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN12)
+#define GPIO_SDADC2_AIN5P   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN7)
+#define GPIO_SDADC2_AIN6P   (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN2)
+#define GPIO_SDADC2_AIN6M   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN7)
+#define GPIO_SDADC2_AIN7P   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN9)
+#define GPIO_SDADC2_AIN8P   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN8)
+#define GPIO_SDADC2_AIN8M   (GPIO_ANALOG|GPIO_PORTE|GPIO_PIN9)
+
+#define GPIO_SDADC3_AIN0P   (GPIO_ANALOG|GPIO_PORTD|GPIO_PIN14)
+#define GPIO_SDADC3_AIN0M   (GPIO_ANALOG|GPIO_PORTD|GPIO_PIN15)
+#define GPIO_SDADC3_AIN1P   (GPIO_ANALOG|GPIO_PORTD|GPIO_PIN13)
+#define GPIO_SDADC3_AIN2P   (GPIO_ANALOG|GPIO_PORTD|GPIO_PIN12)
+#define GPIO_SDADC3_AIN2M   (GPIO_ANALOG|GPIO_PORTD|GPIO_PIN13)
+#define GPIO_SDADC3_AIN3P   (GPIO_ANALOG|GPIO_PORTD|GPIO_PIN11)
+#define GPIO_SDADC3_AIN4P   (GPIO_ANALOG|GPIO_PORTD|GPIO_PIN10)
+#define GPIO_SDADC3_AIN4M   (GPIO_ANALOG|GPIO_PORTD|GPIO_PIN11)
+#define GPIO_SDADC3_AIN5P   (GPIO_ANALOG|GPIO_PORTD|GPIO_PIN9)
+#define GPIO_SDADC3_AIN6P   (GPIO_ANALOG|GPIO_PORTD|GPIO_PIN8)
+#define GPIO_SDADC3_AIN6M   (GPIO_ANALOG|GPIO_PORTD|GPIO_PIN9)
+#define GPIO_SDADC3_AIN7P   (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN15)
+#define GPIO_SDADC3_AIN8P   (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_SDADC3_AIN8M   (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN15)
+
 /* CAN */
 
 #define GPIO_CAN_RX_1       (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11)
@@ -96,9 +161,9 @@
  * should first be configured to analog (AIN)".
  */
 
-#define GPIO_DAC1_1_OUT     (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN4)
-#define GPIO_DAC1_2_OUT     (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN5)
-#define GPIO_DAC2_1_OUT     (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_DAC1_OUT1      (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_DAC1_OUT2      (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_DAC2_OUT1      (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN6)
 
 /* I2C */
 
@@ -233,7 +298,6 @@
 #define GPIO_SPI3_SCK_2     (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN3)
 #define GPIO_SPI3_SCK_3     (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN10)
 
-
 /* Timers */
 
 #define GPIO_TIM2_CH1_ETR_1 (GPIO_ALT|GPIO_FLOAT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN0)
@@ -544,6 +608,5 @@
 #define GPIO_PF9_EVENT_OUT  (GPIO_ALT|GPIO_AF1|GPIO_PORTF|GPIO_PIN9)
 #define GPIO_PF10_EVENT_OUT (GPIO_ALT|GPIO_AF1|GPIO_PORTF|GPIO_PIN10)
 
-
 #endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F37XXX_PINMAP_H */
 
diff --git a/arch/arm/src/stm32/chip/stm32f37xxx_rcc.h b/arch/arm/src/stm32/chip/stm32f37xxx_rcc.h
index 9c48bbd5d576bfac794f26bbf743379fde2d3454..1e1f6daf6a6cd233fbdcbdd9d4d1e3d80e3a7569 100644
--- a/arch/arm/src/stm32/chip/stm32f37xxx_rcc.h
+++ b/arch/arm/src/stm32/chip/stm32f37xxx_rcc.h
@@ -128,6 +128,12 @@
 #  define RCC_CFGR_PPRE2_HCLKd4     (5 << RCC_CFGR_PPRE2_SHIFT) /* 101: HCLK divided by 4 */
 #  define RCC_CFGR_PPRE2_HCLKd8     (6 << RCC_CFGR_PPRE2_SHIFT) /* 110: HCLK divided by 8 */
 #  define RCC_CFGR_PPRE2_HCLKd16    (7 << RCC_CFGR_PPRE2_SHIFT) /* 111: HCLK divided by 16 */
+#define RCC_CFGR_ADCPRE_SHIFT       (13) /* Bits 14-15: ADC prescaler */
+#define RCC_CFGR_ADCPRE_MASK        (7 << RCC_CFGR_ADCPRE_SHIFT)
+#  define RCC_CFGR_ADCPRE_PCLKd2    (0 << RCC_CFGR_ADCPRE_SHIFT) /* 00: PCLK divided by 2 */
+#  define RCC_CFGR_ADCPRE_PCLKd4    (1 << RCC_CFGR_ADCPRE_SHIFT) /* 01: PCLK divided by 4 */
+#  define RCC_CFGR_ADCPRE_PCLKd6    (2 << RCC_CFGR_ADCPRE_SHIFT) /* 10: PCLK divided by 6 */
+#  define RCC_CFGR_ADCPRE_PCLKd8    (3 << RCC_CFGR_ADCPRE_SHIFT) /* 11: PCLK divided by 8 */
 #define RCC_CFGR_PLLSRC             (1 << 16) /* Bit 16: PLL entry clock source */
 #define RCC_CFGR_PLLXTPRE           (1 << 17) /* Bit 17: HSE divider for PLL entry */
 #define RCC_CFGR_PLLMUL_SHIFT       (18)      /* Bits 21-18: PLL Multiplication Factor */
@@ -157,24 +163,24 @@
 #  define RCC_CFGR_MCO_HSICLK       (5 << RCC_CFGR_MCO_SHIFT)  /* 101: HSI clock selected */
 #  define RCC_CFGR_MCO_HSECLK       (6 << RCC_CFGR_MCO_SHIFT)  /* 101: HSE clock selected */
 #  define RCC_CFGR_PLLCLKd2         (7 << RCC_CFGR_MCO_SHIFT)  /* 111: PLL clock divided by 2 selected */
-#define RCC_CFGR_SDADCPRE_SHIFT     (24)      /* Bits 27-31: SDADC Prescaler */
-#define RCC_CFGR_SDADCPRE_MASK      (31 << RCC_CFGR_SDADCPRE_SHIFT)
-#  define RCC_CFGR_SDADCPRE_DIV2    (0 << RCC_CFGR_SDADCPRE_SHIFT)  /* 0xxxx: System clock divided by 2 */
-#  define RCC_CFGR_SDADCPRE_DIV4    (17 << RCC_CFGR_SDADCPRE_SHIFT) /* 10001: System clock divided by 4 */
-#  define RCC_CFGR_SDADCPRE_DIV6    (18 << RCC_CFGR_SDADCPRE_SHIFT) /* 10010: System clock divided by 6 */
-#  define RCC_CFGR_SDADCPRE_DIV8    (19 << RCC_CFGR_SDADCPRE_SHIFT) /* 10011: System clock divided by 8 */
-#  define RCC_CFGR_SDADCPRE_DIV10   (20 << RCC_CFGR_SDADCPRE_SHIFT) /* 10100: System clock divided by 10 */
-#  define RCC_CFGR_SDADCPRE_DIV12   (21 << RCC_CFGR_SDADCPRE_SHIFT) /* 10101: System clock divided by 12 */
-#  define RCC_CFGR_SDADCPRE_DIV14   (22 << RCC_CFGR_SDADCPRE_SHIFT) /* 10110: System clock divided by 14 */
-#  define RCC_CFGR_SDADCPRE_DIV16   (23 << RCC_CFGR_SDADCPRE_SHIFT) /* 10111: System clock divided by 16 */
-#  define RCC_CFGR_SDADCPRE_DIV20   (24 << RCC_CFGR_SDADCPRE_SHIFT) /* 11000: System clock divided by 20 */
-#  define RCC_CFGR_SDADCPRE_DIV24   (25 << RCC_CFGR_SDADCPRE_SHIFT) /* 11001: System clock divided by 24 */
-#  define RCC_CFGR_SDADCPRE_DIV28   (26 << RCC_CFGR_SDADCPRE_SHIFT) /* 11010: System clock divided by 28 */
-#  define RCC_CFGR_SDADCPRE_DIV32   (27 << RCC_CFGR_SDADCPRE_SHIFT) /* 11011: System clock divided by 32 */
-#  define RCC_CFGR_SDADCPRE_DIV36   (28 << RCC_CFGR_SDADCPRE_SHIFT) /* 11100: System clock divided by 36 */
-#  define RCC_CFGR_SDADCPRE_DIV40   (29 << RCC_CFGR_SDADCPRE_SHIFT) /* 11101: System clock divided by 40 */
-#  define RCC_CFGR_SDADCPRE_DIV44   (30 << RCC_CFGR_SDADCPRE_SHIFT) /* 11110: System clock divided by 44 */
-#  define RCC_CFGR_SDADCPRE_DIV48   (31 << RCC_CFGR_SDADCPRE_SHIFT) /* 11111: System clock divided by 48 */
+#define RCC_CFGR_SDPRE_SHIFT        (27)      /* Bits 27-31: SDADC Prescaler */
+#define RCC_CFGR_SDPRE_MASK         (0x1f << RCC_CFGR_SDPRE_SHIFT)
+#  define RCC_CFGR_SDPRE_DIV2       (0 << RCC_CFGR_SDPRE_SHIFT)  /* 0xxxx: System clock divided by 2 */
+#  define RCC_CFGR_SDPRE_DIV4       (17 << RCC_CFGR_SDPRE_SHIFT) /* 10001: System clock divided by 4 */
+#  define RCC_CFGR_SDPRE_DIV6       (18 << RCC_CFGR_SDPRE_SHIFT) /* 10010: System clock divided by 6 */
+#  define RCC_CFGR_SDPRE_DIV8       (19 << RCC_CFGR_SDPRE_SHIFT) /* 10011: System clock divided by 8 */
+#  define RCC_CFGR_SDPRE_DIV10      (20 << RCC_CFGR_SDPRE_SHIFT) /* 10100: System clock divided by 10 */
+#  define RCC_CFGR_SDPRE_DIV12      (21 << RCC_CFGR_SDPRE_SHIFT) /* 10101: System clock divided by 12 */
+#  define RCC_CFGR_SDPRE_DIV14      (22 << RCC_CFGR_SDPRE_SHIFT) /* 10110: System clock divided by 14 */
+#  define RCC_CFGR_SDPRE_DIV16      (23 << RCC_CFGR_SDPRE_SHIFT) /* 10111: System clock divided by 16 */
+#  define RCC_CFGR_SDPRE_DIV20      (24 << RCC_CFGR_SDPRE_SHIFT) /* 11000: System clock divided by 20 */
+#  define RCC_CFGR_SDPRE_DIV24      (25 << RCC_CFGR_SDPRE_SHIFT) /* 11001: System clock divided by 24 */
+#  define RCC_CFGR_SDPRE_DIV28      (26 << RCC_CFGR_SDPRE_SHIFT) /* 11010: System clock divided by 28 */
+#  define RCC_CFGR_SDPRE_DIV32      (27 << RCC_CFGR_SDPRE_SHIFT) /* 11011: System clock divided by 32 */
+#  define RCC_CFGR_SDPRE_DIV36      (28 << RCC_CFGR_SDPRE_SHIFT) /* 11100: System clock divided by 36 */
+#  define RCC_CFGR_SDPRE_DIV40      (29 << RCC_CFGR_SDPRE_SHIFT) /* 11101: System clock divided by 40 */
+#  define RCC_CFGR_SDPRE_DIV44      (30 << RCC_CFGR_SDPRE_SHIFT) /* 11110: System clock divided by 44 */
+#  define RCC_CFGR_SDPRE_DIV48      (31 << RCC_CFGR_SDPRE_SHIFT) /* 11111: System clock divided by 48 */
 
 /* Clock interrupt register */
 
@@ -199,7 +205,7 @@
 /* APB2 Peripheral reset register */
 
 #define RCC_APB2RSTR_SYSCFGRST      (1 << 0)  /* Bit 0: SYSCFG, Comparators and operational amplifiers reset */
-#define RCC_APB2RSTR_ADC1RST        (1 << 9)  /* Bit 9: ADC1 reset */
+#define RCC_APB2RSTR_ADCRST         (1 << 9)  /* Bit 9: ADC reset */
 #define RCC_APB2RSTR_SPI1RST        (1 << 12) /* Bit 12: SPI 1 reset */
 #define RCC_APB2RSTR_USART1RST      (1 << 14) /* Bit 14: USART1 reset */
 #define RCC_APB2RSTR_TIM15RST       (1 << 16) /* Bit 16: TIM15 reset */
@@ -232,7 +238,7 @@
 #define RCC_APB1RSTR_USBRST         (1 << 23) /* Bit 23: USB reset */
 #define RCC_APB1RSTR_CANRST         (1 << 25) /* Bit 25: CAN reset */
 #define RCC_APB1RSTR_CAN1RST        (1 << 25) /* Bit 25: CAN reset */
-#define RCC_APB1RSTR_DAC2RST        (1 << 26) /* Bit 26: DAC1 interface reset */
+#define RCC_APB1RSTR_DAC2RST        (1 << 26) /* Bit 26: DAC2 interface reset */
 #define RCC_APB1RSTR_PWRRST         (1 << 28) /* Bit 28: Power interface reset */
 #define RCC_APB1RSTR_DAC1RST        (1 << 29) /* Bit 29: DAC1 interface reset */
 #define RCC_APB1RSTR_CECRST         (1 << 30) /* Bit 30: CEC reset */
diff --git a/arch/arm/src/stm32/chip/stm32f37xxx_sdadc.h b/arch/arm/src/stm32/chip/stm32f37xxx_sdadc.h
new file mode 100644
index 0000000000000000000000000000000000000000..011ab4d58fd10fa21ec23fb81911c90c08c124f8
--- /dev/null
+++ b/arch/arm/src/stm32/chip/stm32f37xxx_sdadc.h
@@ -0,0 +1,304 @@
+/****************************************************************************************************
+ * arch/arm/src/stm32/chip/stm32f37xxx_sdadc.h
+ *
+ *   Copyright (C) 2009, 2011, 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Studelec SA. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            Marc Rechté 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32F37XXX_SDADC_H
+#define __ARCH_ARM_SRC_STM32_CHIP_STM32F37XXX_SDADC_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+/* Register Offsets *********************************************************************************/
+
+#define STM32_SDADC_CR1_OFFSET       0x0000  /* SDADC control register 1 */
+#define STM32_SDADC_CR2_OFFSET       0x0004  /* SDADC control register 2 */
+#define STM32_SDADC_ISR_OFFSET       0x0008  /* SDADC interrupt and status register */
+#define STM32_SDADC_CLRISR_OFFSET    0x000c  /* SDADC interrupt and status clear register */
+#define STM32_SDADC_JCHGR_OFFSET     0x0014  /* SDADC injected channel group selection register */
+#define STM32_SDADC_CONF0R_OFFSET    0x0020  /* SDADC configuration 0 register */
+#define STM32_SDADC_CONF1R_OFFSET    0x0024  /* SDADC configuration 1 register */
+#define STM32_SDADC_CONF2R_OFFSET    0x0028  /* SDADC configuration 2 register */
+#define STM32_SDADC_CONFCHR1_OFFSET  0x0040  /* SDADC channel configuration register 1 */
+#define STM32_SDADC_CONFCHR2_OFFSET  0x0044  /* SDADC channel configuration register 2 */
+#define STM32_SDADC_JDATAR_OFFSET    0x0060  /* SDADC data register for injected group */
+#define STM32_SDADC_RDATAR_OFFSET    0x0064  /* SDADC data register for the regular channel */
+#define STM32_SDADC_JDATA12R_OFFSET  0x0070  /* SDADC1 and SDADC2 injected data register */
+#define STM32_SDADC_RDATA12R_OFFSET  0x0074  /* SDADC1 and SDADC2 regular data register */
+#define STM32_SDADC_JDATA13R_OFFSET  0x0078  /* SDADC1 and SDADC3 injected data register */
+#define STM32_SDADC_RDATA13R_OFFSET  0x007c  /* SDADC1 and SDADC3 regular data register */
+
+
+/* Register Addresses *******************************************************************************/
+
+#define STM32_SDADC1_CR1             (STM32_SDADC1_BASE+STM32_SDADC_CR1_OFFSET)
+#define STM32_SDADC1_CR2             (STM32_SDADC1_BASE+STM32_SDADC_CR2_OFFSET)
+#define STM32_SDADC1_ISR             (STM32_SDADC1_BASE+STM32_SDADC_ISR_OFFSET)
+#define STM32_SDADC1_CLRISR          (STM32_SDADC1_BASE+STM32_SDADC_CLRISR_OFFSET)
+#define STM32_SDADC1_JCHGR           (STM32_SDADC1_BASE+STM32_SDADC_JCHGR_OFFSET)
+#define STM32_SDADC1_CONF0R          (STM32_SDADC1_BASE+STM32_SDADC_CONF0R_OFFSET)
+#define STM32_SDADC1_CONF1R          (STM32_SDADC1_BASE+STM32_SDADC_CONF1R_OFFSET)
+#define STM32_SDADC1_CONF2R          (STM32_SDADC1_BASE+STM32_SDADC_CONF2R_OFFSET)
+#define STM32_SDADC1_CONFCHR1        (STM32_SDADC1_BASE+STM32_SDADC_CONFCHR1_OFFSET)
+#define STM32_SDADC1_CONFCHR2        (STM32_SDADC1_BASE+STM32_SDADC_CONFCHR2_OFFSET)
+#define STM32_SDADC1_JDATAR          (STM32_SDADC1_BASE+STM32_SDADC_JDATAR_OFFSET)
+#define STM32_SDADC1_RDATAR          (STM32_SDADC1_BASE+STM32_SDADC_RDATAR_OFFSET)
+#define STM32_SDADC1_JDATA12R        (STM32_SDADC1_BASE+STM32_SDADC_JDATA12R_OFFSET)
+#define STM32_SDADC1_RDATA12R        (STM32_SDADC1_BASE+STM32_SDADC_RDATA12R_OFFSET)
+#define STM32_SDADC1_JDATA13R        (STM32_SDADC1_BASE+STM32_SDADC_JDATA13R_OFFSET)
+#define STM32_SDADC1_RDATA13R        (STM32_SDADC1_BASE+STM32_SDADC_RDATA13R_OFFSET)
+
+#define STM32_SDADC2_CR1             (STM32_SDADC2_BASE+STM32_SDADC_CR1_OFFSET)
+#define STM32_SDADC2_CR2             (STM32_SDADC2_BASE+STM32_SDADC_CR2_OFFSET)
+#define STM32_SDADC2_ISR             (STM32_SDADC2_BASE+STM32_SDADC_ISR_OFFSET)
+#define STM32_SDADC2_CLRISR          (STM32_SDADC2_BASE+STM32_SDADC_CLRISR_OFFSET)
+#define STM32_SDADC2_JCHGR           (STM32_SDADC2_BASE+STM32_SDADC_JCHGR_OFFSET)
+#define STM32_SDADC2_CONF0R          (STM32_SDADC2_BASE+STM32_SDADC_CONF0R_OFFSET)
+#define STM32_SDADC2_CONF1R          (STM32_SDADC2_BASE+STM32_SDADC_CONF1R_OFFSET)
+#define STM32_SDADC2_CONF2R          (STM32_SDADC2_BASE+STM32_SDADC_CONF2R_OFFSET)
+#define STM32_SDADC2_CONFCHR1        (STM32_SDADC2_BASE+STM32_SDADC_CONFCHR1_OFFSET)
+#define STM32_SDADC2_CONFCHR2        (STM32_SDADC2_BASE+STM32_SDADC_CONFCHR2_OFFSET)
+#define STM32_SDADC2_JDATAR          (STM32_SDADC2_BASE+STM32_SDADC_JDATAR_OFFSET)
+#define STM32_SDADC2_RDATAR          (STM32_SDADC2_BASE+STM32_SDADC_RDATAR_OFFSET)
+
+#define STM32_SDADC3_CR1             (STM32_SDADC3_BASE+STM32_SDADC_CR1_OFFSET)
+#define STM32_SDADC3_CR2             (STM32_SDADC3_BASE+STM32_SDADC_CR2_OFFSET)
+#define STM32_SDADC3_ISR             (STM32_SDADC3_BASE+STM32_SDADC_ISR_OFFSET)
+#define STM32_SDADC3_CLRISR          (STM32_SDADC3_BASE+STM32_SDADC_CLRISR_OFFSET)
+#define STM32_SDADC3_JCHGR           (STM32_SDADC3_BASE+STM32_SDADC_JCHGR_OFFSET)
+#define STM32_SDADC3_CONF0R          (STM32_SDADC3_BASE+STM32_SDADC_CONF0R_OFFSET)
+#define STM32_SDADC3_CONF1R          (STM32_SDADC3_BASE+STM32_SDADC_CONF1R_OFFSET)
+#define STM32_SDADC3_CONF2R          (STM32_SDADC3_BASE+STM32_SDADC_CONF2R_OFFSET)
+#define STM32_SDADC3_CONFCHR1        (STM32_SDADC3_BASE+STM32_SDADC_CONFCHR1_OFFSET)
+#define STM32_SDADC3_CONFCHR2        (STM32_SDADC3_BASE+STM32_SDADC_CONFCHR2_OFFSET)
+#define STM32_SDADC3_JDATAR          (STM32_SDADC3_BASE+STM32_SDADC_JDATAR_OFFSET)
+#define STM32_SDADC3_RDATAR          (STM32_SDADC3_BASE+STM32_SDADC_RDATAR_OFFSET)
+
+
+/* Register Bitfield Definitions ********************************************************************/
+/* SDADC control register 1 */
+
+#define SDADC_CR1_EOCALIE            (1 << 0)  /* Bit 0: End of calibration interrupt enable */
+#define SDADC_CR1_JEOCIE             (1 << 1)  /* Bit 1: Injected end of conversion interrupt enable */
+#define SDADC_CR1_JOVRIE             (1 << 2)  /* Bit 2: Injected data overrun interrupt enable */
+#define SDADC_CR1_REOCIE             (1 << 3)  /* Bit 3: Regular end of conversion interrupt enable */
+#define SDADC_CR1_ROVRIE             (1 << 4)  /* Bit 4: Regular data overrun interrupt enable */
+#define SDADC_CR1_REFV_SHIFT         (8)       /* Bits 8-9: Reference voltage selection */
+#define SDADC_CR1_REFV_MASK          (0x3 << SDADC_CR1_REFV_SHIFT)
+#  define SDADC_CR1_REFV_EXT         (0 << SDADC_CR1_REFV_SHIFT)
+#  define SDADC_CR1_REFV_INT1p2      (1 << SDADC_CR1_REFV_SHIFT)
+#  define SDADC_CR1_REFV_INT1p8      (2 << SDADC_CR1_REFV_SHIFT)
+#  define SDADC_CR1_REFV_INT         (3 << SDADC_CR1_REFV_SHIFT)
+#define SDADC_CR1_SLOWCK             (1 << 10) /* Bit 10: Slow clock mode enable */
+#define SDADC_CR1_SBI                (1 << 11) /* Bit 11: Enter Standby mode when idle */
+#define SDADC_CR1_PDI                (1 << 12) /* Bit 12: Enter power down mode when idle */
+#define SDADC_CR1_JSYNC              (1 << 14) /* Bit 14: Launch a injected conversion synchronously with SDADC1 */
+#define SDADC_CR1_RSYNC              (1 << 15) /* Bit 15: Launch regular conversion synchronously with SDADC1 */
+#define SDADC_CR1_JDMAEN             (1 << 16) /* Bit 16: DMA channel enabled to read data for the injected channel group */
+#define SDADC_CR1_RDMAEN             (1 << 17) /* Bit 17: DMA channel enabled to read data for the regular channel */
+#define SDADC_CR1_INIT               (1 << 31) /* Bit 31: Initialization mode request */
+
+/* SDADC control register 2 */
+
+#define SDADC_CR2_ADON               (1 << 0)  /* Bit 0: SDADC enable */
+#define SDADC_CR2_CALIBCNT_SHIFT     (1)       /* Bit 1-2: Number of calibration sequences to be performed (number of valid configurations) */
+#define SDADC_CR2_CALIBCNT_MASK      (0x3 << SDADC_CR2_CALIBCNT_SHIFT)
+#define SDADC_CR2_STARTCALIB         (1 << 4)  /* Bit 4: Start calibration */
+#define SDADC_CR2_JCONT              (1 << 5)  /* Bit 5: Continuous mode selection for injected conversions */
+#define SDADC_CR2_JDS                (1 << 6)  /* Bit 6: Delay start of injected conversions */
+#define SDADC_CR2_JEXTSEL_SHIFT      (8)       /* Bit 8-10: Trigger signal selection for launching injected conversions */
+#define SDADC_CR2_JEXTSEL_MASK          (0x7 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC1_CR2_JEXTSEL_TIM13_CH1  (0 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC1_CR2_JEXTSEL_TIM14_CH1  (1 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC1_CR2_JEXTSEL_TIM15_CH2  (2 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC1_CR2_JEXTSEL_TIM3_CH1   (3 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC1_CR2_JEXTSEL_TIM4_CH1   (4 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC1_CR2_JEXTSEL_TIM19_CH2  (5 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC1_CR2_JEXTSEL_EXTI15     (6 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC1_CR2_JEXTSEL_EXTI11     (7 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC2_CR2_JEXTSEL_TIM17_CH1  (0 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC2_CR2_JEXTSEL_TIM12_CH1  (1 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC2_CR2_JEXTSEL_TIM2_CH3   (2 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC2_CR2_JEXTSEL_TIM3_CH2   (3 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC2_CR2_JEXTSEL_TIM4_CH2   (4 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC2_CR2_JEXTSEL_TIM19_CH3  (5 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC2_CR2_JEXTSEL_EXTI15     (6 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC2_CR2_JEXTSEL_EXTI11     (7 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC3_CR2_JEXTSEL_TIM16_CH1  (0 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC3_CR2_JEXTSEL_TIM12_CH1  (1 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC3_CR2_JEXTSEL_TIM2_CH4   (2 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC3_CR2_JEXTSEL_TIM3_CH3   (3 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC3_CR2_JEXTSEL_TIM4_CH3   (4 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC3_CR2_JEXTSEL_TIM19_CH4  (5 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC3_CR2_JEXTSEL_EXTI15     (6 << SDADC_CR2_JEXTSEL_SHIFT)
+#  define SDADC3_CR2_JEXTSEL_EXTI11     (7 << SDADC_CR2_JEXTSEL_SHIFT)
+#define SDADC_CR2_JEXTEN_SHIFT          (13)   /* Bit 13-14: Trigger enable and trigger edge selection for injected conversions */
+#define SDADC_CR2_JEXTEN_MASK        (0x3 << SDADC_CR2_JEXTEN_SHIFT)
+#  define SDADC_CR2_JEXTEN_NONE      (0 << SDADC_CR2_JEXTEN_SHIFT)
+#  define SDADC_CR2_JEXTEN_RISING    (1 << SDADC_CR2_JEXTEN_SHIFT)
+#  define SDADC_CR2_JEXTEN_FALLING   (2 << SDADC_CR2_JEXTEN_SHIFT)
+#  define SDADC_CR2_JEXTEN_BOTH      (3 << SDADC_CR2_JEXTEN_SHIFT)
+#define SDADC_CR2_JSWSTART           (1 << 15) /* Bit 15: Start a conversion of the injected group of channels */
+#define SDADC_CR2_RCH_SHIFT          (16)      /* Bit 16-19: Regular channel selection */
+#define SDADC_CR2_RCH_MASK           (0xf << SDADC_CR2_RCH_SHIFT)
+#define SDADC_CR2_RCONT              (1 << 22) /* Bit 22: Continuous mode selection for regular conversions */
+#define SDADC_CR2_RSWSTART           (1 << 23) /* Bit 23: Software start of a conversion on the regular channel */
+#define SDADC_CR2_FAST               (1 << 24) /* Bit 24: Fast conversion mode selection */
+
+/* SDADC interrupt and status register */
+
+#define SDADC_ISR_EOCALF             (1 << 0)  /* Bit 0: End of calibration flag */
+#define SDADC_ISR_JEOCF              (1 << 1)  /* Bit 1: End of injected conversion flag */
+#define SDADC_ISR_JOVRF              (1 << 2)  /* Bit 2: Injected conversion overrun flag */
+#define SDADC_ISR_REOCF              (1 << 3)  /* Bit 3: End of regular conversion flag */
+#define SDADC_ISR_ROVRF              (1 << 4)  /* Bit 4: Regular conversion overrun flag */
+#define SDADC_ISR_CALIBIP            (1 << 12) /* Bit 12: Calibration in progress status */
+#define SDADC_ISR_JCIP               (1 << 13) /* Bit 13: Injected conversion in progress status */
+#define SDADC_ISR_RCIP               (1 << 14) /* Bit 14: Regular conversion in progress status */
+#define SDADC_ISR_STABIP             (1 << 15) /* Bit 15: Stabilization in progress status */
+#define SDADC_ISR_INITRDY            (1 << 31) /* Bit 31: Initialization mode is ready */
+
+/* SDADC interrupt and status clear register */
+
+#define SDADC_CLRISR_CLREOCALF       (1 << 0)  /* Bit 0: Clear the end of calibration flag */
+#define SDADC_CLRISR_CLRJOVRF        (1 << 2)  /* Bit 2: Clear the injected conversion overrun flag */
+#define SDADC_CLRISR_CLRROVRF        (1 << 4)  /* Bit 4: Clear the regular conversion overrun flag */
+
+/* SDADC injected channel group selection register */
+
+#define SDADC_JCHGR_JCHG_SHIFT       (0)       /* Bit 0-8: Injected channel group selection */
+#define SDADC_JCHGR_JCHG_MASK        (0x1ff << SDADC_JCHGR_JCHG_SHIFT)
+#define SDADC_JCHGR_JCHG_CH(n)       (1 << (n + SDADC_JCHGR_JCHG_SHIFT))
+
+/* SDADC configuration 0-2 register */
+
+#define SDADC_CONF0R                 0
+#define SDADC_CONF1R                 1
+#define SDADC_CONF2R                 2
+
+#define SDADC_CONFR_OFFSET_SHIFT     (0)       /* Bit 0-11: Twelve-bit calibration offset for configuration 0-2 */
+#define SDADC_CONFR_OFFSET_MASK      (0xfff << SDADC_CONFR_OFFSET_SHIFT)
+#define SDADC_CONFR_GAIN_SHIFT       (20)      /* Bit 20-22: Gain setting for configuration 0-2 */
+#define SDADC_CONFR_GAIN_MASK        (0x7 << SDADC_CONFR_GAIN_SHIFT)
+#  define SDADC_CONFR_GAIN_1X        (0 << SDADC_CONFR_GAIN_SHIFT)
+#  define SDADC_CONFR_GAIN_2X        (1 << SDADC_CONFR_GAIN_SHIFT)
+#  define SDADC_CONFR_GAIN_4X        (2 << SDADC_CONFR_GAIN_SHIFT)
+#  define SDADC_CONFR_GAIN_8X        (3 << SDADC_CONFR_GAIN_SHIFT)
+#  define SDADC_CONFR_GAIN_16X       (4 << SDADC_CONFR_GAIN_SHIFT)
+#  define SDADC_CONFR_GAIN_32X       (5 << SDADC_CONFR_GAIN_SHIFT)
+#  define SDADC_CONFR_GAIN_0p5X      (7 << SDADC_CONFR_GAIN_SHIFT)
+#define SDADC_CONFR_SE_SHIFT         (26)      /* Bit 27-26: Single-ended mode for configuration 0-2 */
+#define SDADC_CONFR_SE_MASK          (0x3 << SDADC_CONFR_SE_SHIFT)
+#  define SDADC_CONFR_SE_DIF         (0 << SDADC_CONFR_SE_SHIFT)
+#  define SDADC_CONFR_SE_SE_OFFSET   (1 << SDADC_CONFR_SE_SHIFT)
+#  define SDADC_CONFR_SE_SE_ZERO     (3 << SDADC_CONFR_SE_SHIFT)
+#define SDADC_CONFR_COMMON_SHIFT     (30)      /* Bit 30-31: Common mode for configuration 0-2 */
+#define SDADC_CONFR_COMMON_MASK      (0x3 << SDADC_CONFR_COMMON_SHIFT)
+#  define SDADC_CONFR_COMMON_GND     (0 << SDADC_CONFR_COMMON_SHIFT)
+#  define SDADC_CONFR_COMMON_VCM     (1 << SDADC_CONFR_COMMON_SHIFT)
+#  define SDADC_CONFR_COMMON_VDD     (2 << SDADC_CONFR_COMMON_SHIFT)
+
+/* SDADC channel configuration register 1 */
+
+#define SDADC_CONFCHR1_CH_SHIFT(i)   (2*i) /* Bit 0-1: Channel i configuration 0-7 */
+#define SDADC_CONFCHR1_CH_MASK(i)    (0x3 << SDADC_CONFCHR1_CH_SHIFT(i))
+
+/* SDADC channel configuration register 2 */
+
+#define SDADC_CONFCHR2_CH8_SHIFT     (0)       /* Bit 0-1: Channel 8 configuration */
+#define SDADC_CONFCHR2_CH8_MASK      (0x3 << SDADC_CONFCHR2_CH8_SHIFT)
+
+/* SDADC data register for injected group */
+
+#define SDADC_JDATAR_JDATA_SHIFT     (0)       /* Bit 0-15: Injected group conversion data */
+#define SDADC_JDATAR_JDATA_MASK      (0xffff << SDADC_JDATAR_JDATA_SHIFT)
+#define SDADC_JDATAR_JDATACH_SHIFT   (24)      /* Bit 24-27: Injected channel most recently converted */
+#define SDADC_JDATAR_JDATACH_MASK    (0xf << SDADC_JDATAR_JDATACH_SHIFT)
+
+/* SDADC data register for the regular channel */
+
+#define SDADC_RDATAR_RDATA_SHIFT     (0)       /* Bit 0-15: Regular channel conversion data */
+#define SDADC_RDATAR_RDATA_MASK      (0xffff << SDADC_RDATAR_RDATA_SHIFT)
+
+/* SDADC1 and SDADC2 injected data register */
+
+#define SDADC_JDATA12R_JDATA1_SHIFT  (0)       /* Bit 0-15: Injected group conversion data for SDADC1 */
+#define SDADC_JDATA12R_JDATA1_MASK   (0xffff << SDADC_JDATA12R_JDATA1_SHIFT)
+#define SDADC_JDATA12R_JDATA2_SHIFT  (16)       /* Bit 16-31: Injected group conversion data for SDADC2 */
+#define SDADC_JDATA12R_JDATA2_MASK   (0xffff << SDADC_JDATA12R_JDATA2_SHIFT)
+
+/* SDADC1 and SDADC2 regular data register */
+
+#define SDADC_RDATA12R_RDATA1_SHIFT  (0)       /* Bit 0-15: Regular conversion data for SDADC1 */
+#define SDADC_RDATA12R_RDATA1_MASK   (0xffff << SDADC_RDATA12R_RDATA1_SHIFT)
+#define SDADC_RDATA12R_RDATA2_SHIFT  (16)       /* Bit 16-31: Regular conversion data for SDADC2 */
+#define SDADC_RDATA12R_RDATA2_MASK   (0xffff << SDADC_RDATA12R_RDATA2_SHIFT)
+
+/* SDADC1 and SDADC3 injected data register */
+
+#define SDADC_JDATA13R_JDATA1_SHIFT  (0)       /* Bit 0-15: Injected group conversion data for SDADC1 */
+#define SDADC_JDATA13R_JDATA1_MASK   (0xffff << SDADC_JDATA13R_JDATA1_SHIFT)
+#define SDADC_JDATA13R_JDATA3_SHIFT  (16)       /* Bit 16-31: Injected group conversion data for SDADC3 */
+#define SDADC_JDATA13R_JDATA3_MASK   (0xffff << SDADC_JDATA13R_JDATA3_SHIFT)
+
+/* SDADC1 and SDADC3 regular data register */
+
+#define SDADC_RDATA13R_RDATA1_SHIFT  (0)       /* Bit 0-15: Regular conversion data for SDADC1 */
+#define SDADC_RDATA13R_RDATA1_MASK   (0xffff << SDADC_RDATA13R_RDATA1_SHIFT)
+#define SDADC_RDATA13R_RDATA3_SHIFT  (16)       /* Bit 16-31: Regular conversion data for SDADC3 */
+#define SDADC_RDATA13R_RDATA3_MASK   (0xffff << SDADC_RDATA13R_RDATA3_SHIFT)
+
+/****************************************************************************************************
+ * Public Types
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public Data
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F37XXX_SDADC_H */
diff --git a/arch/arm/src/stm32/chip/stm32f37xxx_syscfg.h b/arch/arm/src/stm32/chip/stm32f37xxx_syscfg.h
index 2219009ef7da2fedd208c27d7d7bfe87ab3efafa..6b4ccd227dd39c66c1a212dc894b06f480258e63 100644
--- a/arch/arm/src/stm32/chip/stm32f37xxx_syscfg.h
+++ b/arch/arm/src/stm32/chip/stm32f37xxx_syscfg.h
@@ -113,7 +113,7 @@
 #define SYSCFG_EXTICR_PORTC           (2)       /* 0010: PC[x] pin */
 #define SYSCFG_EXTICR_PORTD           (3)       /* 0011: PD[x] pin */
 #define SYSCFG_EXTICR_PORTE           (4)       /* 0100: Reserved */
-#define SYSCFG_EXTICR_PORTE           (5)       /* 0101: PF[x] pin */
+#define SYSCFG_EXTICR_PORTF           (5)       /* 0101: PF[x] pin */
 
 #define SYSCFG_EXTICR_PORT_MASK       (15)
 #define SYSCFG_EXTICR_EXTI_SHIFT(g)   (((g) & 3) << 2)
diff --git a/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h b/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h
index c0f675aa023438995441c15d895ba3b0b6fa2da9..82fb74a44811c58b27697d1aa613635372c9b22b 100644
--- a/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h
+++ b/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h
@@ -254,7 +254,6 @@
 #  define GPIO_ETH_RMII_TXD0_2  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN13)
 #  define GPIO_ETH_RMII_TXD1_1  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13)
 #  define GPIO_ETH_RMII_TXD1_2  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN14)
-#  define GPIO_ETH_RMII_TX_CLK  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN3)
 #  define GPIO_ETH_RMII_TX_EN_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN11)
 #  define GPIO_ETH_RMII_TX_EN_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN11)
 #endif
@@ -413,6 +412,9 @@
 #define GPIO_I2C2_SMBA_1      (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN12)
 #define GPIO_I2C2_SMBA_2      (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN2)
 #define GPIO_I2C2_SMBA_3      (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN6)
+#if defined(CONFIG_STM32_STM32F411)
+#  define GPIO_I2C2_SDA_4     (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN3)
+#endif
 #if defined(CONFIG_STM32_STM32F446)
 #  define GPIO_I2C2_SDA_4     (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN3)
 #  define GPIO_I2C2_SDA_5     (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTC|GPIO_PIN12)
diff --git a/arch/arm/src/stm32/chip/stm32fxxxxx_otgfs.h b/arch/arm/src/stm32/chip/stm32fxxxxx_otgfs.h
index b0f431ab06f808bdc4a24948eeecdff090fb151a..36606382671aa5ced84bf17aa4cce798ffd98c1c 100644
--- a/arch/arm/src/stm32/chip/stm32fxxxxx_otgfs.h
+++ b/arch/arm/src/stm32/chip/stm32fxxxxx_otgfs.h
@@ -1,10 +1,11 @@
 /****************************************************************************************************
  * arch/arm/src/stm32/chip/stm32fxxxxx_otgfs.h
  *
- *   Copyright (C) 2012, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2014-2016 Gregory Nutt. All rights reserved.
  *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
- *   Author: Gregory Nutt 
- *           Paul Alexander Patience 
+ *   Authors: Gregory Nutt 
+ *            Paul Alexander Patience 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -470,44 +471,48 @@
 
 /* Core interrupt and Interrupt mask registers */
 
-#define OTGFS_GINTSTS_CMOD              (1 << 0)  /* Bit 0:  Current mode of operation */
+#define OTGFS_GINTSTS_CMOD              (1 << 0)  /* Bit 0: ro Current mode of operation */
 #  define OTGFS_GINTSTS_DEVMODE         (0)
 #  define OTGFS_GINTSTS_HOSTMODE        (OTGFS_GINTSTS_CMOD)
-#define OTGFS_GINT_MMIS                 (1 << 1)  /* Bit 1:  Mode mismatch interrupt */
-#define OTGFS_GINT_OTG                  (1 << 2)  /* Bit 2:  OTG interrupt */
-#define OTGFS_GINT_SOF                  (1 << 3)  /* Bit 3:  Start of frame */
-#define OTGFS_GINT_RXFLVL               (1 << 4)  /* Bit 4:  RxFIFO non-empty */
-#define OTGFS_GINT_NPTXFE               (1 << 5)  /* Bit 5:  Non-periodic TxFIFO empty */
-#define OTGFS_GINT_GINAKEFF             (1 << 6)  /* Bit 6:  Global IN non-periodic NAK effective */
+#define OTGFS_GINT_MMIS                 (1 << 1)  /* Bit 1:  rc_w1 Mode mismatch interrupt */
+#define OTGFS_GINT_OTG                  (1 << 2)  /* Bit 2:  ro    OTG interrupt */
+#define OTGFS_GINT_SOF                  (1 << 3)  /* Bit 3:  rc_w1 Start of frame */
+#define OTGFS_GINT_RXFLVL               (1 << 4)  /* Bit 4:  ro    RxFIFO non-empty */
+#define OTGFS_GINT_NPTXFE               (1 << 5)  /* Bit 5:  ro    Non-periodic TxFIFO empty */
+#define OTGFS_GINT_GINAKEFF             (1 << 6)  /* Bit 6:  ro    Global IN non-periodic NAK effective */
 #define OTGFS_GINT_GONAKEFF             (1 << 7)  /* Bit 7:  Global OUT NAK effective */
-                                                  /* Bits 8-9: Reserved, must be kept at reset value */
-#define OTGFS_GINT_ESUSP                (1 << 10) /* Bit 10: Early suspend */
-#define OTGFS_GINT_USBSUSP              (1 << 11) /* Bit 11: USB suspend */
-#define OTGFS_GINT_USBRST               (1 << 12) /* Bit 12: USB reset */
-#define OTGFS_GINT_ENUMDNE              (1 << 13) /* Bit 13: Enumeration done */
-#define OTGFS_GINT_ISOODRP              (1 << 14) /* Bit 14: Isochronous OUT packet dropped interrupt */
-#define OTGFS_GINT_EOPF                 (1 << 15) /* Bit 15: End of periodic frame interrupt */
-                                                  /* Bits 16 Reserved, must be kept at reset value */
-#define OTGFS_GINTMSK_EPMISM            (1 << 17) /* Bit 17: Endpoint mismatch interrupt mask */
-#define OTGFS_GINT_IEP                  (1 << 18) /* Bit 18: IN endpoint interrupt */
-#define OTGFS_GINT_OEP                  (1 << 19) /* Bit 19: OUT endpoint interrupt */
-#define OTGFS_GINT_IISOIXFR             (1 << 20) /* Bit 20: Incomplete isochronous IN transfer */
-#define OTGFS_GINT_IISOOXFR             (1 << 21) /* Bit 21: Incomplete isochronous OUT transfer (device) */
-#define OTGFS_GINT_IPXFR                (1 << 21) /* Bit 21: Incomplete periodic transfer (host) */
-                                                  /* Bit 22: Reserved, must be kept at reset value */
+#define OTGFS_GINT_RES89                (3 << 8)  /* Bits 8-9:     Reserved, must be kept at reset value */
+#define OTGFS_GINT_ESUSP                (1 << 10) /* Bit 10: rc_w1 Early suspend */
+#define OTGFS_GINT_USBSUSP              (1 << 11) /* Bit 11: rc_w1 USB suspend */
+#define OTGFS_GINT_USBRST               (1 << 12) /* Bit 12: rc_w1 USB reset */
+#define OTGFS_GINT_ENUMDNE              (1 << 13) /* Bit 13: rc_w1 Enumeration done */
+#define OTGFS_GINT_ISOODRP              (1 << 14) /* Bit 14: rc_w1 Isochronous OUT packet dropped interrupt */
+#define OTGFS_GINT_EOPF                 (1 << 15) /* Bit 15: rc_w1 End of periodic frame interrupt */
+#define OTGFS_GINT_RES16                (1 << 16) /* Bit 16        Reserved, must be kept at reset value */
+#define OTGFS_GINTMSK_EPMISM            (1 << 17) /* Bit 17:       Reserved in GINT rw Endpoint mismatch interrupt mask */
+#define OTGFS_GINT_IEP                  (1 << 18) /* Bit 18: ro    IN endpoint interrupt */
+#define OTGFS_GINT_OEP                  (1 << 19) /* Bit 19: ro    OUT endpoint interrupt */
+#define OTGFS_GINT_IISOIXFR             (1 << 20) /* Bit 20: rc_w1 Incomplete isochronous IN transfer */
+#define OTGFS_GINT_IISOOXFR             (1 << 21) /* Bit 21: rc_w1 Incomplete isochronous OUT transfer (device) */
+#define OTGFS_GINT_IPXFR                (1 << 21) /* Bit 21:       Incomplete periodic transfer (host) */
 #if defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469)
-#  define OTGFS_GINT_RSTDET             (1 << 23) /* Bit 23: Reset detected interrupt */
+#  define OTGFS_GINT_RES22              (1 << 22) /* Bits 22: Reserved, must be kept at reset value */
+#  define OTGFS_GINT_RSTDET             (1 << 23) /* Bits 23: asserted when a reset is detected on the USB in partial */
+#else
+#  define OTGFS_GINT_RES2223            (3 << 22) /* Bits 22-23: Reserved, must be kept at reset value */
 #endif
-#define OTGFS_GINT_HPRT                 (1 << 24) /* Bit 24: Host port interrupt */
-#define OTGFS_GINT_HC                   (1 << 25) /* Bit 25: Host channels interrupt */
-#define OTGFS_GINT_PTXFE                (1 << 26) /* Bit 26: Periodic TxFIFO empty */
+#define OTGFS_GINT_HPRT                 (1 << 24) /* Bit 24: ro    Host port interrupt */
+#define OTGFS_GINT_HC                   (1 << 25) /* Bit 25: ro    Host channels interrupt */
+#define OTGFS_GINT_PTXFE                (1 << 26) /* Bit 26: ro    Periodic TxFIFO empty */
 #if defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469)
-#  define OTGFS_GINT_LPMINT             (1 << 27) /* Bit 27: LPM interrupt */
+#define OTGFS_GINT_LPMINT               (1 << 27) /* Bit 27 LPM interrupt */
+#else
+#define OTGFS_GINT_RES27                (1 << 27) /* Bit 27 Reserved, must be kept at reset value */
 #endif
-#define OTGFS_GINT_CIDSCHG              (1 << 28) /* Bit 28: Connector ID status change */
-#define OTGFS_GINT_DISC                 (1 << 29) /* Bit 29: Disconnect detected interrupt */
-#define OTGFS_GINT_SRQ                  (1 << 30) /* Bit 30: Session request/new session detected interrupt */
-#define OTGFS_GINT_WKUP                 (1 << 31) /* Bit 31: Resume/remote wakeup detected interrupt */
+#define OTGFS_GINT_CIDSCHG              (1 << 28) /* Bit 28: rc_w1 Connector ID status change */
+#define OTGFS_GINT_DISC                 (1 << 29) /* Bit 29: rc_w1 Disconnect detected interrupt */
+#define OTGFS_GINT_SRQ                  (1 << 30) /* Bit 30: rc_w1 Session request/new session detected interrupt */
+#define OTGFS_GINT_WKUP                 (1 << 31) /* Bit 31: rc_w1 Resume/remote wakeup detected interrupt */
 
 /* Receive status debug read/OTG status read and pop registers (host mode) */
 
diff --git a/arch/arm/src/stm32/gnu/stm32_vectors.S b/arch/arm/src/stm32/gnu/stm32_vectors.S
index a1a39dff2f9479b633dbb09875fb173cfc12864b..31f62c8d112d2b46c96004609fdabff644755f81 100644
--- a/arch/arm/src/stm32/gnu/stm32_vectors.S
+++ b/arch/arm/src/stm32/gnu/stm32_vectors.S
@@ -177,6 +177,8 @@ _vectors:
 #  include "chip/stm32f20xxx_vectors.h"
 #elif defined(CONFIG_STM32_STM32F30XX)
 #  include "chip/stm32f30xxx_vectors.h"
+#elif defined(CONFIG_STM32_STM32F33XX)
+#  include "chip/stm32f33xxx_vectors.h"
 #elif defined(CONFIG_STM32_STM32F37XX)
 #  include "chip/stm32f37xxx_vectors.h"
 #elif defined(CONFIG_STM32_STM32F40XX)
@@ -222,6 +224,8 @@ handlers:
 #  include "chip/stm32f20xxx_vectors.h"
 #elif defined(CONFIG_STM32_STM32F30XX)
 #  include "chip/stm32f30xxx_vectors.h"
+#elif defined(CONFIG_STM32_STM32F33XX)
+#  include "chip/stm32f33xxx_vectors.h"
 #elif defined(CONFIG_STM32_STM32F37XX)
 #  include "chip/stm32f37xxx_vectors.h"
 #elif defined(CONFIG_STM32_STM32F40XX)
diff --git a/arch/arm/src/stm32/iar/stm32_vectors.S b/arch/arm/src/stm32/iar/stm32_vectors.S
index 9b2c0432ba6058885a696fc9822ac2ae04becea9..cf83e7b8bff68dc69ad11110b7ad28ac23725652 100644
--- a/arch/arm/src/stm32/iar/stm32_vectors.S
+++ b/arch/arm/src/stm32/iar/stm32_vectors.S
@@ -176,7 +176,207 @@ __vector_table:
 #if defined(CONFIG_STM32_STM32L15XX)
 #  include "chip/stm32l15xxx_vectors.h"
 #elif defined(CONFIG_STM32_STM32F10XX)
-#  include "chip/stm32f10xxx_vectors.h"
+
+#  if defined(CONFIG_STM32_VALUELINE)
+
+	DCD	stm32_wwdg        /* Vector 16+0:  Window Watchdog interrupt */
+	DCD	stm32_pvd         /* Vector 16+1:  PVD through EXTI Line detection interrupt */
+	DCD	stm32_tamper      /* Vector 16+2:  Tamper interrupt */
+	DCD	stm32_rtc         /* Vector 16+3:  RTC Wakeup through EXTI line interrupt */
+	DCD	stm32_flash       /* Vector 16+4:  Flash global interrupt */
+	DCD	stm32_rcc         /* Vector 16+5:  RCC global interrupt */
+	DCD	stm32_exti0       /* Vector 16+6:  EXTI Line 0 interrupt */
+	DCD	stm32_exti1       /* Vector 16+7:  EXTI Line 1 interrupt */
+	DCD	stm32_exti2       /* Vector 16+8:  EXTI Line 2 interrupt */
+	DCD	stm32_exti3       /* Vector 16+9:  EXTI Line 3 interrupt */
+	DCD	stm32_exti4       /* Vector 16+10: EXTI Line 4 interrupt */
+	DCD	stm32_dma1ch1     /* Vector 16+11: DMA1 Channel 1 global interrupt */
+	DCD	stm32_dma1ch2     /* Vector 16+12: DMA1 Channel 2 global interrupt */
+	DCD	stm32_dma1ch3     /* Vector 16+13: DMA1 Channel 3 global interrupt */
+	DCD	stm32_dma1ch4     /* Vector 16+14: DMA1 Channel 4 global interrupt */
+	DCD	stm32_dma1ch5     /* Vector 16+15: DMA1 Channel 5 global interrupt */
+	DCD	stm32_dma1ch6     /* Vector 16+16: DMA1 Channel 6 global interrupt */
+	DCD	stm32_dma1ch7     /* Vector 16+17: DMA1 Channel 7 global interrupt */
+	DCD	stm32_adc1        /* Vector 16+18: ADC1 global interrupt */
+	DCD	stm32_reserved    /* Vector 16+19: Reserved 0 */
+	DCD	stm32_reserved    /* Vector 16+20: Reserved 1 */
+	DCD	stm32_reserved    /* Vector 16+21: Reserved 2 */
+	DCD	stm32_reserved    /* Vector 16+22: Reserved 3 */
+	DCD	stm32_exti95      /* Vector 16+23: EXTI Line[9:5] interrupts */
+	DCD	stm32_tim1brk     /* Vector 16+24: TIM1 Break interrupt; TIM15 global interrupt */
+	DCD	stm32_tim1up      /* Vector 16+25: TIM1 Update interrupt; TIM16 global interrupt */
+	DCD	stm32_tim1trgcom  /* Vector 16+26: TIM1 Trigger and Commutation interrupts; TIM17 global interrupt */
+	DCD	stm32_tim1cc      /* Vector 16+27: TIM1 Capture Compare interrupt */
+	DCD	stm32_tim2        /* Vector 16+28: TIM2 global interrupt */
+	DCD	stm32_tim3        /* Vector 16+29: TIM3 global interrupt */
+	DCD	stm32_tim4        /* Vector 16+30: TIM4 global interrupt */
+	DCD	stm32_i2c1ev      /* Vector 16+31: I2C1 event interrupt */
+	DCD	stm32_i2c1er      /* Vector 16+32: I2C1 error interrupt */
+	DCD	stm32_i2c2ev      /* Vector 16+33: I2C2 event interrupt */
+	DCD	stm32_i2c2er      /* Vector 16+34: I2C2 error interrupt */
+	DCD	stm32_spi1        /* Vector 16+35: SPI1 global interrupt */
+	DCD	stm32_spi2        /* Vector 16+36: SPI2 global interrupt */
+	DCD	stm32_usart1      /* Vector 16+37: USART1 global interrupt */
+	DCD	stm32_usart2      /* Vector 16+38: USART2 global interrupt */
+	DCD	stm32_usart3      /* Vector 16+39: USART3 global interrupt */
+	DCD	stm32_exti1510    /* Vector 16+40: EXTI Line[15:10] interrupts */
+	DCD	stm32_rtcalr      /* Vector 16+41: RTC alarms (A and B) through EXTI line interrupt */
+	DCD	stm32_cec         /* Vector 16+42: CEC global interrupt */
+	DCD	stm32_tim12       /* Vector 16+43: TIM12 global interrupt */
+	DCD	stm32_tim13       /* Vector 16+44: TIM13 global interrupt */
+	DCD	stm32_tim14       /* Vector 16+45: TIM14 global interrupt */
+	DCD	stm32_reserved    /* Vector 16+46: Reserved 4 */
+	DCD	stm32_reserved    /* Vector 16+47: Reserved 5 */
+	DCD	stm32_fsmc        /* Vector 16+48: FSMC global interrupt */
+	DCD	stm32_reserved    /* Vector 16+49: Reserved 6 */
+	DCD	stm32_tim5        /* Vector 16+50: TIM5 global interrupt */
+	DCD	stm32_spi3        /* Vector 16+51: SPI3 global interrupt */
+	DCD	stm32_uart4       /* Vector 16+52: USART2 global interrupt */
+	DCD	stm32_uart5       /* Vector 16+53: UART5 global interrupt */
+	DCD	stm32_tim6        /* Vector 16+54: TIM6 global interrupt */
+	DCD	stm32_tim7        /* Vector 16+55: TIM7 global interrupt */
+	DCD	stm32_dma2ch1     /* Vector 16+56: DMA2 Channel 1 global interrupt */
+	DCD	stm32_dma2ch2     /* Vector 16+57: DMA2 Channel 2 global interrupt */
+	DCD	stm32_dma2ch3     /* Vector 16+58: DMA2 Channel 3 global interrupt */
+	DCD	stm32_dma2ch45    /* Vector 16+59: DMA2 Channel 4 and 5 global interrupt */
+	DCD	stm32_dma2ch5     /* Vector 16+60: DMA2 Channel 5 global interrupt */
+
+#  elif defined(CONFIG_STM32_CONNECTIVITYLINE)
+
+	DCD	stm32_wwdg        /* Vector 16+0:  Window Watchdog interrupt */
+	DCD	stm32_pvd         /* Vector 16+1:  PVD through EXTI Line detection interrupt */
+	DCD	stm32_tamper      /* Vector 16+2:  Tamper interrupt */
+	DCD	stm32_rtc         /* Vector 16+3:  RTC global interrupt */
+	DCD	stm32_flash       /* Vector 16+4:  Flash global interrupt */
+	DCD	stm32_rcc         /* Vector 16+5:  RCC global interrupt */
+	DCD	stm32_exti0       /* Vector 16+6:  EXTI Line 0 interrupt */
+	DCD	stm32_exti1       /* Vector 16+7:  EXTI Line 1 interrupt */
+	DCD	stm32_exti2       /* Vector 16+8:  EXTI Line 2 interrupt */
+	DCD	stm32_exti3       /* Vector 16+9:  EXTI Line 3 interrupt */
+	DCD	stm32_exti4       /* Vector 16+10: EXTI Line 4 interrupt */
+	DCD	stm32_dma1ch1     /* Vector 16+11: DMA1 Channel 1 global interrupt */
+	DCD	stm32_dma1ch2     /* Vector 16+12: DMA1 Channel 2 global interrupt */
+	DCD	stm32_dma1ch3     /* Vector 16+13: DMA1 Channel 3 global interrupt */
+	DCD	stm32_dma1ch4     /* Vector 16+14: DMA1 Channel 4 global interrupt */
+	DCD	stm32_dma1ch5     /* Vector 16+15: DMA1 Channel 5 global interrupt */
+	DCD	stm32_dma1ch6     /* Vector 16+16: DMA1 Channel 6 global interrupt */
+	DCD	stm32_dma1ch7     /* Vector 16+17: DMA1 Channel 7 global interrupt */
+	DCD	stm32_adc12       /* Vector 16+18: ADC1 and ADC2 global interrupt */
+	DCD	stm32_can1tx      /* Vector 16+19: CAN1 TX interrupts */
+	DCD	stm32_can1rx0     /* Vector 16+20: CAN1 RX0 interrupts */
+	DCD	stm32_can1rx      /* Vector 16+21: CAN1 RX1 interrupt */
+	DCD	stm32_can1sce     /* Vector 16+22: CAN1 SCE interrupt */
+	DCD	stm32_exti95      /* Vector 16+23: EXTI Line[9:5] interrupts */
+	DCD	stm32_tim1brk     /* Vector 16+24: TIM1 Break interrupt */
+	DCD	stm32_tim1up      /* Vector 16+25: TIM1 Update interrupt */
+	DCD	stm32_tim1trgcom  /* Vector 16+26: TIM1 Trigger and Commutation interrupts */
+	DCD	stm32_tim1cc      /* Vector 16+27: TIM1 Capture Compare interrupt */
+	DCD	stm32_tim2        /* Vector 16+28: TIM2 global interrupt */
+	DCD	stm32_tim3        /* Vector 16+29: TIM3 global interrupt */
+	DCD	stm32_tim4        /* Vector 16+30: TIM4 global interrupt */
+	DCD	stm32_i2c1ev      /* Vector 16+31: I2C1 event interrupt */
+	DCD	stm32_i2c1er      /* Vector 16+32: I2C1 error interrupt */
+	DCD	stm32_i2c2ev      /* Vector 16+33: I2C2 event interrupt */
+	DCD	stm32_i2c2er      /* Vector 16+34: I2C2 error interrupt */
+	DCD	stm32_spi1        /* Vector 16+35: SPI1 global interrupt */
+	DCD	stm32_spi2        /* Vector 16+36: SPI2 global interrupt */
+	DCD	stm32_usart1      /* Vector 16+37: USART1 global interrupt */
+	DCD	stm32_usart2      /* Vector 16+38: USART2 global interrupt */
+	DCD	stm32_usart3      /* Vector 16+39: USART3 global interrupt */
+	DCD	stm32_exti1510    /* Vector 16+40: EXTI Line[15:10] interrupts */
+	DCD	stm32_rtcalr      /* Vector 16+41: RTC alarm through EXTI line interrupt */
+	DCD	stm32_otgfswkup   /* Vector 16+42: USB On-The-Go FS Wakeup through EXTI line interrupt */
+	DCD	stm32_reserved    /* Vector 16+43: Reserved 0 */
+	DCD	stm32_reserved    /* Vector 16+44: Reserved 1 */
+	DCD	stm32_reserved    /* Vector 16+45: Reserved 2 */
+	DCD	stm32_reserved    /* Vector 16+46: Reserved 3 */
+	DCD	stm32_reserved    /* Vector 16+47: Reserved 4 */
+	DCD	stm32_reserved    /* Vector 16+48: Reserved 5 */
+	DCD	stm32_reserved    /* Vector 16+49: Reserved 6 */
+	DCD	stm32_tim5        /* Vector 16+50: TIM5 global interrupt */
+	DCD	stm32_spi3        /* Vector 16+51: SPI3 global interrupt */
+	DCD	stm32_uart4       /* Vector 16+52: UART4 global interrupt */
+	DCD	stm32_uart5       /* Vector 16+53: UART5 global interrupt */
+	DCD	stm32_tim6        /* Vector 16+54: TIM6 global interrupt */
+	DCD	stm32_tim7        /* Vector 16+55: TIM7 global interrupt */
+	DCD	stm32_dma2ch1     /* Vector 16+56: DMA2 Channel 1 global interrupt */
+	DCD	stm32_dma2ch2     /* Vector 16+57: DMA2 Channel 2 global interrupt */
+	DCD	stm32_dma2ch3     /* Vector 16+58: DMA2 Channel 3 global interrupt */
+	DCD	stm32_dma2ch4     /* Vector 16+59: DMA2 Channel 4 global interrupt */
+	DCD	stm32_dma2ch5     /* Vector 16+60: DMA2 Channel 5 global interrupt */
+	DCD	stm32_eth         /* Vector 16+61: Ethernet global interrupt */
+	DCD	stm32_ethwkup     /* Vector 16+62: Ethernet Wakeup through EXTI line interrupt */
+	DCD	stm32_can2tx      /* Vector 16+63: CAN2 TX interrupts */
+	DCD	stm32_can2rx0     /* Vector 16+64: CAN2 RX0 interrupts */
+	DCD	stm32_can2rx1     /* Vector 16+65: CAN2 RX1 interrupt */
+	DCD	stm32_can2sce     /* Vector 16+66: CAN2 SCE interrupt */
+	DCD	stm32_otgfs       /* Vector 16+67: USB On The Go FS global interrupt */
+
+#  else /* CONFIG_STM32_CONNECTIVITYLINE */
+
+	DCD	stm32_wwdg        /* Vector 16+0:  Window Watchdog interrupt */
+	DCD	stm32_pvd         /* Vector 16+1:  PVD through EXTI Line detection interrupt */
+	DCD	stm32_tamper      /* Vector 16+2:  Tamper interrupt */
+	DCD	stm32_rtc         /* Vector 16+3:  RTC global interrupt */
+	DCD	stm32_flash       /* Vector 16+4:  Flash global interrupt */
+	DCD	stm32_rcc         /* Vector 16+5:  RCC global interrupt */
+	DCD	stm32_exti0       /* Vector 16+6:  EXTI Line 0 interrupt */
+	DCD	stm32_exti1       /* Vector 16+7:  EXTI Line 1 interrupt */
+	DCD	stm32_exti2       /* Vector 16+8:  EXTI Line 2 interrupt */
+	DCD	stm32_exti3       /* Vector 16+9:  EXTI Line 3 interrupt */
+	DCD	stm32_exti4       /* Vector 16+10: EXTI Line 4 interrupt */
+	DCD	stm32_dma1ch1     /* Vector 16+11: DMA1 Channel 1 global interrupt */
+	DCD	stm32_dma1ch2     /* Vector 16+12: DMA1 Channel 2 global interrupt */
+	DCD	stm32_dma1ch3     /* Vector 16+13: DMA1 Channel 3 global interrupt */
+	DCD	stm32_dma1ch4     /* Vector 16+14: DMA1 Channel 4 global interrupt */
+	DCD	stm32_dma1ch5     /* Vector 16+15: DMA1 Channel 5 global interrupt */
+	DCD	stm32_dma1ch6     /* Vector 16+16: DMA1 Channel 6 global interrupt */
+	DCD	stm32_dma1ch7     /* Vector 16+17: DMA1 Channel 7 global interrupt */
+	DCD	stm32_adc12       /* Vector 16+18: ADC1 and ADC2 global interrupt */
+	DCD	stm32_usbhpcantx  /* Vector 16+19: USB High Priority or CAN TX interrupts*/
+	DCD	stm32_usblpcanrx0 /* Vector 16+20: USB Low Priority or CAN RX0 interrupts*/
+	DCD	stm32_can1rx1     /* Vector 16+21: CAN1 RX1 interrupt */
+	DCD	stm32_can1sce     /* Vector 16+22: CAN1 SCE interrupt */
+	DCD	stm32_exti95      /* Vector 16+23: EXTI Line[9:5] interrupts */
+	DCD	stm32_tim1brk     /* Vector 16+24: TIM1 Break interrupt */
+	DCD	stm32_tim1up      /* Vector 16+25: TIM1 Update interrupt */
+	DCD	stm32_tim1rtgcom  /* Vector 16+26: TIM1 Trigger and Commutation interrupts */
+	DCD	stm32_tim1cc      /* Vector 16+27: TIM1 Capture Compare interrupt */
+	DCD	stm32_tim2        /* Vector 16+28: TIM2 global interrupt */
+	DCD	stm32_tim3        /* Vector 16+29: TIM3 global interrupt */
+	DCD	stm32_tim4        /* Vector 16+30: TIM4 global interrupt */
+	DCD	stm32_i2c1ev      /* Vector 16+31: I2C1 event interrupt */
+	DCD	stm32_i2c1er      /* Vector 16+32: I2C1 error interrupt */
+	DCD	stm32_i2c2ev      /* Vector 16+33: I2C2 event interrupt */
+	DCD	stm32_i2c2er      /* Vector 16+34: I2C2 error interrupt */
+	DCD	stm32_spi1        /* Vector 16+35: SPI1 global interrupt */
+	DCD	stm32_spi2        /* Vector 16+36: SPI2 global interrupt */
+	DCD	stm32_usart1      /* Vector 16+37: USART1 global interrupt */
+	DCD	stm32_usart2      /* Vector 16+38: USART2 global interrupt */
+	DCD	stm32_usart3      /* Vector 16+39: USART3 global interrupt */
+	DCD	stm32_exti1510    /* Vector 16+40: EXTI Line[15:10] interrupts */
+	DCD	stm32_rtcalr      /* Vector 16+41: RTC alarm through EXTI line interrupt */
+	DCD	stm32_usbwkup     /* Vector 16+42: USB wakeup from suspend through EXTI line interrupt*/
+	DCD	stm32_tim8brk     /* Vector 16+43: TIM8 Break interrupt */
+	DCD	stm32_tim8up      /* Vector 16+44: TIM8 Update interrupt */
+	DCD	stm32_tim8trgcom  /* Vector 16+45: TIM8 Trigger and Commutation interrupts */
+	DCD	stm32_tim8cc      /* Vector 16+46: TIM8 Capture Compare interrupt */
+	DCD	stm32_adc3        /* Vector 16+47: ADC3 global interrupt */
+	DCD	stm32_fsmc        /* Vector 16+48: FSMC global interrupt */
+	DCD	stm32_sdio        /* Vector 16+49: SDIO global interrupt */
+	DCD	stm32_tim5        /* Vector 16+50: TIM5 global interrupt */
+	DCD	stm32_spi3        /* Vector 16+51: SPI3 global interrupt */
+	DCD	stm32_uart4       /* Vector 16+52: UART4 global interrupt */
+	DCD	stm32_uart5       /* Vector 16+53: UART5 global interrupt */
+	DCD	stm32_tim6        /* Vector 16+54: TIM6 global interrupt */
+	DCD	stm32_tim7        /* Vector 16+55: TIM7 global interrupt */
+	DCD	stm32_dma2ch1     /* Vector 16+56: DMA2 Channel 1 global interrupt */
+	DCD	stm32_dma2ch2     /* Vector 16+57: DMA2 Channel 2 global interrupt */
+	DCD	stm32_dma2ch3     /* Vector 16+58: DMA2 Channel 3 global interrupt */
+	DCD	stm32_dma2ch45    /* Vector 16+59: DMA2 Channel 4&5 global interrupt */
+
+#  endif /* CONFIG_STM32_CONNECTIVITYLINE */
+
 #elif defined(CONFIG_STM32_STM32F20XX)
 	DCD	stm32_wwdg        /* Vector 16+0:  Window Watchdog interrupt */
 	DCD	stm32_pvd         /* Vector 16+1:  PVD through EXTI Line detection interrupt */
@@ -261,6 +461,8 @@ __vector_table:
 	DCD	stm32_hash        /* Vector 16+80: Hash and Rng global interrupt */
 #elif defined(CONFIG_STM32_STM32F30XX)
 #  include "chip/stm32f30xxx_vectors.h"
+#elif defined(CONFIG_STM32_STM32F33XX)
+#  include "chip/stm32f33xxx_vectors.h"
 #elif defined(CONFIG_STM32_STM32F37XX)
 #  include "chip/stm32f37xxx_vectors.h"
 #elif defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429)
@@ -278,7 +480,7 @@ __vector_table:
  * .text
  ************************************************************************************/
 
-	SECTION .text:CODE:NOROOT(2)
+	SECTION .text:CODE:NOROOT(8)
 
 handlers:
 	HANDLER	stm32_reserved, STM32_IRQ_RESERVED		/* Unexpected/reserved vector */
@@ -304,8 +506,196 @@ handlers:
 #if defined(CONFIG_STM32_STM32L15XX)
 #  include "chip/stm32l15xxx_vectors.h"
 #elif defined(CONFIG_STM32_STM32F10XX)
-#  include "chip/stm32f10xxx_vectors.h"
+
+
+#  if defined(CONFIG_STM32_VALUELINE)
+
+	HANDLER	stm32_wwdg, STM32_IRQ_WWDG                 /* Vector 16+0:  Window Watchdog interrupt */
+	HANDLER	stm32_pvd, STM32_IRQ_PVD                   /* Vector 16+1:  PVD through EXTI Line detection interrupt */
+	HANDLER	stm32_tamper, STM32_IRQ_TAMPER             /* Vector 16+2:  Tamper interrupt */
+	HANDLER	stm32_rtc, STM32_IRQ_RTC                   /* Vector 16+3:  RTC Wakeup through EXTI line interrupt */
+	HANDLER	stm32_flash, STM32_IRQ_FLASH               /* Vector 16+4:  Flash global interrupt */
+	HANDLER	stm32_rcc, STM32_IRQ_RCC                   /* Vector 16+5:  RCC global interrupt */
+	HANDLER	stm32_exti0, STM32_IRQ_EXTI0               /* Vector 16+6:  EXTI Line 0 interrupt */
+	HANDLER	stm32_exti1, STM32_IRQ_EXTI1               /* Vector 16+7:  EXTI Line 1 interrupt */
+	HANDLER	stm32_exti2, STM32_IRQ_EXTI2               /* Vector 16+8:  EXTI Line 2 interrupt */
+	HANDLER	stm32_exti3, STM32_IRQ_EXTI3               /* Vector 16+9:  EXTI Line 3 interrupt */
+	HANDLER	stm32_exti4, STM32_IRQ_EXTI4               /* Vector 16+10: EXTI Line 4 interrupt */
+	HANDLER	stm32_dma1ch1, STM32_IRQ_DMA1CH1           /* Vector 16+11: DMA1 Channel 1 global interrupt */
+	HANDLER	stm32_dma1ch2, STM32_IRQ_DMA1CH2           /* Vector 16+12: DMA1 Channel 2 global interrupt */
+	HANDLER	stm32_dma1ch3, STM32_IRQ_DMA1CH3           /* Vector 16+13: DMA1 Channel 3 global interrupt */
+	HANDLER	stm32_dma1ch4, STM32_IRQ_DMA1CH4           /* Vector 16+14: DMA1 Channel 4 global interrupt */
+	HANDLER	stm32_dma1ch5, STM32_IRQ_DMA1CH5           /* Vector 16+15: DMA1 Channel 5 global interrupt */
+	HANDLER	stm32_dma1ch6, STM32_IRQ_DMA1CH6           /* Vector 16+16: DMA1 Channel 6 global interrupt */
+	HANDLER	stm32_dma1ch7, STM32_IRQ_DMA1CH7           /* Vector 16+17: DMA1 Channel 7 global interrupt */
+	HANDLER	stm32_adc1, STM32_IRQ_ADC1                 /* Vector 16+18: ADC1 global interrupt */
+	HANDLER	stm32_exti95, STM32_IRQ_EXTI95             /* Vector 16+23: EXTI Line[9:5] interrupts */
+	HANDLER	stm32_tim1brk, STM32_IRQ_TIM1BRK           /* Vector 16+24: TIM1 Break interrupt; TIM15 global interrupt */
+	HANDLER	stm32_tim1up, STM32_IRQ_TIM1UP             /* Vector 16+25: TIM1 Update interrupt; TIM16 global interrupt */
+	HANDLER	stm32_tim1trgcom, STM32_IRQ_TIM1TRGCOM     /* Vector 16+26: TIM1 Trigger and Commutation interrupts; TIM17 global interrupt */
+	HANDLER	stm32_tim1cc, STM32_IRQ_TIM1CC             /* Vector 16+27: TIM1 Capture Compare interrupt */
+	HANDLER	stm32_tim2, STM32_IRQ_TIM2                 /* Vector 16+28: TIM2 global interrupt */
+	HANDLER	stm32_tim3, STM32_IRQ_TIM3                 /* Vector 16+29: TIM3 global interrupt */
+	HANDLER	stm32_tim4, STM32_IRQ_TIM4                 /* Vector 16+30: TIM4 global interrupt */
+	HANDLER	stm32_i2c1ev, STM32_IRQ_I2C1EV             /* Vector 16+31: I2C1 event interrupt */
+	HANDLER	stm32_i2c1er, STM32_IRQ_I2C1ER             /* Vector 16+32: I2C1 error interrupt */
+	HANDLER	stm32_i2c2ev, STM32_IRQ_I2C2EV             /* Vector 16+33: I2C2 event interrupt */
+	HANDLER	stm32_i2c2er, STM32_IRQ_I2C2ER             /* Vector 16+34: I2C2 error interrupt */
+	HANDLER	stm32_spi1, STM32_IRQ_SPI1                 /* Vector 16+35: SPI1 global interrupt */
+	HANDLER	stm32_spi2, STM32_IRQ_SPI2                 /* Vector 16+36: SPI2 global interrupt */
+	HANDLER	stm32_usart1, STM32_IRQ_USART1             /* Vector 16+37: USART1 global interrupt */
+	HANDLER	stm32_usart2, STM32_IRQ_USART2             /* Vector 16+38: USART2 global interrupt */
+	HANDLER	stm32_usart3, STM32_IRQ_USART3             /* Vector 16+39: USART3 global interrupt */
+	HANDLER	stm32_exti1510, STM32_IRQ_EXTI1510         /* Vector 16+40: EXTI Line[15:10] interrupts */
+	HANDLER	stm32_rtcalr, STM32_IRQ_RTCALR             /* Vector 16+41: RTC alarms (A and B) through EXTI line interrupt */
+	HANDLER	stm32_cec, STM32_IRQ_CEC                   /* Vector 16+42: CEC global interrupt */
+	HANDLER	stm32_tim12, STM32_IRQ_TIM12               /* Vector 16+43: TIM12 global interrupt */
+	HANDLER	stm32_tim13, STM32_IRQ_TIM13               /* Vector 16+44: TIM13 global interrupt */
+	HANDLER	stm32_tim14, STM32_IRQ_TIM14               /* Vector 16+45: TIM14 global interrupt */
+	HANDLER	stm32_fsmc, STM32_IRQ_FSMC                 /* Vector 16+48: FSMC global interrupt */
+	HANDLER	stm32_tim5, STM32_IRQ_TIM5                 /* Vector 16+50: TIM5 global interrupt */
+	HANDLER	stm32_spi3, STM32_IRQ_SPI3                 /* Vector 16+51: SPI3 global interrupt */
+	HANDLER	stm32_uart4, STM32_IRQ_UART4               /* Vector 16+52: USART2 global interrupt */
+	HANDLER	stm32_uart5, STM32_IRQ_UART5               /* Vector 16+53: UART5 global interrupt */
+	HANDLER	stm32_tim6, STM32_IRQ_TIM6                 /* Vector 16+54: TIM6 global interrupt */
+	HANDLER	stm32_tim7, STM32_IRQ_TIM7                 /* Vector 16+55: TIM7 global interrupt */
+	HANDLER	stm32_dma2ch1, STM32_IRQ_DMA2CH1           /* Vector 16+56: DMA2 Channel 1 global interrupt */
+	HANDLER	stm32_dma2ch2, STM32_IRQ_DMA2CH2           /* Vector 16+57: DMA2 Channel 2 global interrupt */
+	HANDLER	stm32_dma2ch3, STM32_IRQ_DMA2CH3           /* Vector 16+58: DMA2 Channel 3 global interrupt */
+	HANDLER	stm32_dma2ch45, STM32_IRQ_DMA2CH45         /* Vector 16+59: DMA2 Channel 4 and 5 global interrupt */
+	HANDLER	stm32_dma2ch5, STM32_IRQ_DMA2CH5           /* Vector 16+60: DMA2 Channel 5 global interrupt */
+
+#  elif defined(CONFIG_STM32_CONNECTIVITYLINE)
+
+	HANDLER	stm32_wwdg, STM32_IRQ_WWDG                /* Vector 16+0:  Window Watchdog interrupt */
+	HANDLER	stm32_pvd, STM32_IRQ_PVD                  /* Vector 16+1:  PVD through EXTI Line detection interrupt */
+	HANDLER	stm32_tamper, STM32_IRQ_TAMPER            /* Vector 16+2:  Tamper interrupt */
+	HANDLER	stm32_rtc, STM32_IRQ_RTC                  /* Vector 16+3:  RTC global interrupt */
+	HANDLER	stm32_flash, STM32_IRQ_FLASH              /* Vector 16+4:  Flash global interrupt */
+	HANDLER	stm32_rcc, STM32_IRQ_RCC                  /* Vector 16+5:  RCC global interrupt */
+	HANDLER	stm32_exti0, STM32_IRQ_EXTI0              /* Vector 16+6:  EXTI Line 0 interrupt */
+	HANDLER	stm32_exti1, STM32_IRQ_EXTI1              /* Vector 16+7:  EXTI Line 1 interrupt */
+	HANDLER	stm32_exti2, STM32_IRQ_EXTI2              /* Vector 16+8:  EXTI Line 2 interrupt */
+	HANDLER	stm32_exti3, STM32_IRQ_EXTI3              /* Vector 16+9:  EXTI Line 3 interrupt */
+	HANDLER	stm32_exti4, STM32_IRQ_EXTI4              /* Vector 16+10: EXTI Line 4 interrupt */
+	HANDLER	stm32_dma1ch1, STM32_IRQ_DMA1CH1          /* Vector 16+11: DMA1 Channel 1 global interrupt */
+	HANDLER	stm32_dma1ch2, STM32_IRQ_DMA1CH2          /* Vector 16+12: DMA1 Channel 2 global interrupt */
+	HANDLER	stm32_dma1ch3, STM32_IRQ_DMA1CH3          /* Vector 16+13: DMA1 Channel 3 global interrupt */
+	HANDLER	stm32_dma1ch4, STM32_IRQ_DMA1CH4          /* Vector 16+14: DMA1 Channel 4 global interrupt */
+	HANDLER	stm32_dma1ch5, STM32_IRQ_DMA1CH5          /* Vector 16+15: DMA1 Channel 5 global interrupt */
+	HANDLER	stm32_dma1ch6, STM32_IRQ_DMA1CH6          /* Vector 16+16: DMA1 Channel 6 global interrupt */
+	HANDLER	stm32_dma1ch7, STM32_IRQ_DMA1CH7          /* Vector 16+17: DMA1 Channel 7 global interrupt */
+	HANDLER	stm32_adc12, STM32_IRQ_ADC12              /* Vector 16+18: ADC1 and ADC2 global interrupt */
+	HANDLER	stm32_can1tx, STM32_IRQ_CAN1TX            /* Vector 16+19: CAN1 TX interrupts */
+	HANDLER	stm32_can1rx0, STM32_IRQ_CAN1RX0          /* Vector 16+20: CAN1 RX0 interrupts */
+	HANDLER	stm32_can1rx, STM32_IRQ_CAN1RX1           /* Vector 16+21: CAN1 RX1 interrupt */
+	HANDLER	stm32_can1sce, STM32_IRQ_CAN1SCE          /* Vector 16+22: CAN1 SCE interrupt */
+	HANDLER	stm32_exti95, STM32_IRQ_EXTI95            /* Vector 16+23: EXTI Line[9:5] interrupts */
+	HANDLER	stm32_tim1brk, STM32_IRQ_TIM1BRK          /* Vector 16+24: TIM1 Break interrupt */
+	HANDLER	stm32_tim1up, STM32_IRQ_TIM1UP            /* Vector 16+25: TIM1 Update interrupt */
+	HANDLER	stm32_tim1trgcom, STM32_IRQ_TIM1TRGCOM    /* Vector 16+26: TIM1 Trigger and Commutation interrupts */
+	HANDLER	stm32_tim1cc, STM32_IRQ_TIM1CC            /* Vector 16+27: TIM1 Capture Compare interrupt */
+	HANDLER	stm32_tim2, STM32_IRQ_TIM2                /* Vector 16+28: TIM2 global interrupt */
+	HANDLER	stm32_tim3, STM32_IRQ_TIM3                /* Vector 16+29: TIM3 global interrupt */
+	HANDLER	stm32_tim4, STM32_IRQ_TIM4                /* Vector 16+30: TIM4 global interrupt */
+	HANDLER	stm32_i2c1ev, STM32_IRQ_I2C1EV            /* Vector 16+31: I2C1 event interrupt */
+	HANDLER	stm32_i2c1er, STM32_IRQ_I2C1ER            /* Vector 16+32: I2C1 error interrupt */
+	HANDLER	stm32_i2c2ev, STM32_IRQ_I2C2EV            /* Vector 16+33: I2C2 event interrupt */
+	HANDLER	stm32_i2c2er, STM32_IRQ_I2C2ER            /* Vector 16+34: I2C2 error interrupt */
+	HANDLER	stm32_spi1, STM32_IRQ_SPI1                /* Vector 16+35: SPI1 global interrupt */
+	HANDLER	stm32_spi2, STM32_IRQ_SPI2                /* Vector 16+36: SPI2 global interrupt */
+	HANDLER	stm32_usart1, STM32_IRQ_USART1            /* Vector 16+37: USART1 global interrupt */
+	HANDLER	stm32_usart2, STM32_IRQ_USART2            /* Vector 16+38: USART2 global interrupt */
+	HANDLER	stm32_usart3, STM32_IRQ_USART3            /* Vector 16+39: USART3 global interrupt */
+	HANDLER	stm32_exti1510, STM32_IRQ_EXTI1510        /* Vector 16+40: EXTI Line[15:10] interrupts */
+	HANDLER	stm32_rtcalr, STM32_IRQ_RTCALRM           /* Vector 16+41: RTC alarm through EXTI line interrupt */
+	HANDLER	stm32_otgfswkup, STM32_IRQ_OTGFSWKUP      /* Vector 16+42: USB On-The-Go FS Wakeup through EXTI line interrupt */
+	HANDLER	stm32_tim5, STM32_IRQ_TIM5                /* Vector 16+50: TIM5 global interrupt */
+	HANDLER	stm32_spi3, STM32_IRQ_SPI3                /* Vector 16+51: SPI3 global interrupt */
+	HANDLER	stm32_uart4 , STM32_IRQ_UART4             /* Vector 16+52: UART4 global interrupt */
+	HANDLER	stm32_uart5, STM32_IRQ_UART5              /* Vector 16+53: UART5 global interrupt */
+	HANDLER	stm32_tim6, STM32_IRQ_TIM6                /* Vector 16+54: TIM6 global interrupt */
+	HANDLER	stm32_tim7, STM32_IRQ_TIM7                /* Vector 16+55: TIM7 global interrupt */
+	HANDLER	stm32_dma2ch1, STM32_IRQ_DMA2CH1          /* Vector 16+56: DMA2 Channel 1 global interrupt */
+	HANDLER	stm32_dma2ch2, STM32_IRQ_DMA2CH2          /* Vector 16+57: DMA2 Channel 2 global interrupt */
+	HANDLER	stm32_dma2ch3, STM32_IRQ_DMA2CH3          /* Vector 16+58: DMA2 Channel 3 global interrupt */
+	HANDLER	stm32_dma2ch4, STM32_IRQ_DMA2CH4          /* Vector 16+59: DMA2 Channel 4 global interrupt */
+	HANDLER	stm32_dma2ch5, STM32_IRQ_DMA2CH5          /* Vector 16+60: DMA2 Channel 5 global interrupt */
+	HANDLER	stm32_eth, STM32_IRQ_ETH                  /* Vector 16+61: Ethernet global interrupt */
+	HANDLER	stm32_ethwkup, STM32_IRQ_ETHWKUP          /* Vector 16+62: Ethernet Wakeup through EXTI line interrupt */
+	HANDLER	stm32_can2tx, STM32_IRQ_CAN2TX            /* Vector 16+63: CAN2 TX interrupts */
+	HANDLER	stm32_can2rx0, STM32_IRQ_CAN2RX0          /* Vector 16+64: CAN2 RX0 interrupts */
+	HANDLER	stm32_can2rx1, STM32_IRQ_CAN2RX1          /* Vector 16+65: CAN2 RX1 interrupt */
+	HANDLER	stm32_can2sce, STM32_IRQ_CAN2SCE          /* Vector 16+66: CAN2 SCE interrupt */
+	HANDLER	stm32_otgfs, STM32_IRQ_OTGFS              /* Vector 16+67: USB On The Go FS global interrupt */
+
+#  else /* CONFIG_STM32_CONNECTIVITYLINE */
+
+	HANDLER	stm32_wwdg, STM32_IRQ_WWDG                /* Vector 16+0:  Window Watchdog interrupt */
+	HANDLER	stm32_pvd, STM32_IRQ_PVD                  /* Vector 16+1:  PVD through EXTI Line detection interrupt */
+	HANDLER	stm32_tamper, STM32_IRQ_TAMPER            /* Vector 16+2:  Tamper interrupt */
+	HANDLER	stm32_rtc, STM32_IRQ_RTC                  /* Vector 16+3:  RTC global interrupt */
+	HANDLER	stm32_flash, STM32_IRQ_FLASH              /* Vector 16+4:  Flash global interrupt */
+	HANDLER	stm32_rcc, STM32_IRQ_RCC                  /* Vector 16+5:  RCC global interrupt */
+	HANDLER	stm32_exti0, STM32_IRQ_EXTI0              /* Vector 16+6:  EXTI Line 0 interrupt */
+	HANDLER	stm32_exti1, STM32_IRQ_EXTI1              /* Vector 16+7:  EXTI Line 1 interrupt */
+	HANDLER	stm32_exti2, STM32_IRQ_EXTI2              /* Vector 16+8:  EXTI Line 2 interrupt */
+	HANDLER	stm32_exti3, STM32_IRQ_EXTI3              /* Vector 16+9:  EXTI Line 3 interrupt */
+	HANDLER	stm32_exti4, STM32_IRQ_EXTI4              /* Vector 16+10: EXTI Line 4 interrupt */
+	HANDLER	stm32_dma1ch1, STM32_IRQ_DMA1CH1          /* Vector 16+11: DMA1 Channel 1 global interrupt */
+	HANDLER	stm32_dma1ch2, STM32_IRQ_DMA1CH2          /* Vector 16+12: DMA1 Channel 2 global interrupt */
+	HANDLER	stm32_dma1ch3, STM32_IRQ_DMA1CH3          /* Vector 16+13: DMA1 Channel 3 global interrupt */
+	HANDLER	stm32_dma1ch4, STM32_IRQ_DMA1CH4          /* Vector 16+14: DMA1 Channel 4 global interrupt */
+	HANDLER	stm32_dma1ch5, STM32_IRQ_DMA1CH5          /* Vector 16+15: DMA1 Channel 5 global interrupt */
+	HANDLER	stm32_dma1ch6, STM32_IRQ_DMA1CH6          /* Vector 16+16: DMA1 Channel 6 global interrupt */
+	HANDLER	stm32_dma1ch7, STM32_IRQ_DMA1CH7          /* Vector 16+17: DMA1 Channel 7 global interrupt */
+	HANDLER	stm32_adc12, STM32_IRQ_ADC12              /* Vector 16+18: ADC1 and ADC2 global interrupt */
+	HANDLER	stm32_usbhpcantx, STM32_IRQ_USBHPCANTX    /* Vector 16+19: USB High Priority or CAN TX interrupts*/
+	HANDLER	stm32_usblpcanrx0, STM32_IRQ_USBLPCANRX0  /* Vector 16+20: USB Low Priority or CAN RX0 interrupts*/
+	HANDLER	stm32_can1rx1, STM32_IRQ_CAN1RX1          /* Vector 16+21: CAN1 RX1 interrupt */
+	HANDLER	stm32_can1sce, STM32_IRQ_CAN1SCE          /* Vector 16+22: CAN1 SCE interrupt */
+	HANDLER	stm32_exti95, STM32_IRQ_EXTI95            /* Vector 16+23: EXTI Line[9:5] interrupts */
+	HANDLER	stm32_tim1brk, STM32_IRQ_TIM1BRK          /* Vector 16+24: TIM1 Break interrupt */
+	HANDLER	stm32_tim1up, STM32_IRQ_TIM1UP            /* Vector 16+25: TIM1 Update interrupt */
+	HANDLER	stm32_tim1rtgcom, STM32_IRQ_TIM1TRGCOM    /* Vector 16+26: TIM1 Trigger and Commutation interrupts */
+	HANDLER	stm32_tim1cc, STM32_IRQ_TIM1CC            /* Vector 16+27: TIM1 Capture Compare interrupt */
+	HANDLER	stm32_tim2, STM32_IRQ_TIM2                /* Vector 16+28: TIM2 global interrupt */
+	HANDLER	stm32_tim3, STM32_IRQ_TIM3                /* Vector 16+29: TIM3 global interrupt */
+	HANDLER	stm32_tim4, STM32_IRQ_TIM4                /* Vector 16+30: TIM4 global interrupt */
+	HANDLER	stm32_i2c1ev, STM32_IRQ_I2C1EV            /* Vector 16+31: I2C1 event interrupt */
+	HANDLER	stm32_i2c1er, STM32_IRQ_I2C1ER            /* Vector 16+32: I2C1 error interrupt */
+	HANDLER	stm32_i2c2ev, STM32_IRQ_I2C2EV            /* Vector 16+33: I2C2 event interrupt */
+	HANDLER	stm32_i2c2er, STM32_IRQ_I2C2ER            /* Vector 16+34: I2C2 error interrupt */
+	HANDLER	stm32_spi1, STM32_IRQ_SPI1                /* Vector 16+35: SPI1 global interrupt */
+	HANDLER	stm32_spi2, STM32_IRQ_SPI2                /* Vector 16+36: SPI2 global interrupt */
+	HANDLER	stm32_usart1, STM32_IRQ_USART1            /* Vector 16+37: USART1 global interrupt */
+	HANDLER	stm32_usart2, STM32_IRQ_USART2            /* Vector 16+38: USART2 global interrupt */
+	HANDLER	stm32_usart3, STM32_IRQ_USART3            /* Vector 16+39: USART3 global interrupt */
+	HANDLER	stm32_exti1510, STM32_IRQ_EXTI1510        /* Vector 16+40: EXTI Line[15:10] interrupts */
+	HANDLER	stm32_rtcalr, STM32_IRQ_RTCALRM           /* Vector 16+41: RTC alarm through EXTI line interrupt */
+	HANDLER	stm32_usbwkup, STM32_IRQ_USBWKUP          /* Vector 16+42: USB wakeup from suspend through EXTI line interrupt*/
+	HANDLER	stm32_tim8brk, STM32_IRQ_TIM8BRK          /* Vector 16+43: TIM8 Break interrupt */
+	HANDLER	stm32_tim8up, STM32_IRQ_TIM8UP            /* Vector 16+44: TIM8 Update interrupt */
+	HANDLER	stm32_tim8trgcom, STM32_IRQ_TIM8TRGCOM    /* Vector 16+45: TIM8 Trigger and Commutation interrupts */
+	HANDLER	stm32_tim8cc, STM32_IRQ_TIM8CC            /* Vector 16+46: TIM8 Capture Compare interrupt */
+	HANDLER	stm32_adc3, STM32_IRQ_ADC3                /* Vector 16+47: ADC3 global interrupt */
+	HANDLER	stm32_fsmc, STM32_IRQ_FSMC                /* Vector 16+48: FSMC global interrupt */
+	HANDLER	stm32_sdio, STM32_IRQ_SDIO                /* Vector 16+49: SDIO global interrupt */
+	HANDLER	stm32_tim5, STM32_IRQ_TIM5                /* Vector 16+50: TIM5 global interrupt */
+	HANDLER	stm32_spi3, STM32_IRQ_SPI3                /* Vector 16+51: SPI3 global interrupt */
+	HANDLER	stm32_uart4, STM32_IRQ_UART4              /* Vector 16+52: UART4 global interrupt */
+	HANDLER	stm32_uart5, STM32_IRQ_UART5              /* Vector 16+53: UART5 global interrupt */
+	HANDLER	stm32_tim6, STM32_IRQ_TIM6                /* Vector 16+54: TIM6 global interrupt */
+	HANDLER	stm32_tim7, STM32_IRQ_TIM7                /* Vector 16+55: TIM7 global interrupt */
+	HANDLER	stm32_dma2ch1, STM32_IRQ_DMA2CH1          /* Vector 16+56: DMA2 Channel 1 global interrupt */
+	HANDLER	stm32_dma2ch2, STM32_IRQ_DMA2CH2          /* Vector 16+57: DMA2 Channel 2 global interrupt */
+	HANDLER	stm32_dma2ch3, STM32_IRQ_DMA2CH3          /* Vector 16+58: DMA2 Channel 3 global interrupt */
+	HANDLER	stm32_dma2ch45, STM32_IRQ_DMA2CH45        /* Vector 16+59: DMA2 Channel 4&5 global interrupt */
+
+#  endif /* CONFIG_STM32_CONNECTIVITYLINE */
+
 #elif defined(CONFIG_STM32_STM32F20XX)
+
 	HANDLER	stm32_wwdg, STM32_IRQ_WWDG                /* Vector 16+0:  Window Watchdog interrupt */
 	HANDLER	stm32_pvd, STM32_IRQ_PVD                  /* Vector 16+1:  PVD through EXTI Line detection interrupt */
 	HANDLER	stm32_tamper, STM32_IRQ_TAMPER            /* Vector 16+2:  Tamper and time stamp interrupts */
@@ -387,8 +777,11 @@ handlers:
 	HANDLER	stm32_dcmi, STM32_IRQ_DCMI                /* Vector 16+78: DCMI global interrupt */
 	HANDLER	stm32_cryp, STM32_IRQ_CRYP                /* Vector 16+79: CRYP crypto global interrupt */
 	HANDLER	stm32_hash, STM32_IRQ_HASH                /* Vector 16+80: Hash and Rng global interrupt */
+
 #elif defined(CONFIG_STM32_STM32F30XX)
 #  include "chip/stm32f30xxx_vectors.h"
+#elif defined(CONFIG_STM32_STM32F33XX)
+#  include "chip/stm32f33xxx_vectors.h"
 #elif defined(CONFIG_STM32_STM32F37XX)
 #  include "chip/stm32f37xxx_vectors.h"
 #elif defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429)
diff --git a/arch/arm/src/stm32/stm32.h b/arch/arm/src/stm32/stm32.h
index ee5a6497f80424894ead8d26249269bd600409e9..6680e81293f0944f42505319ae62cee9f1d3744c 100644
--- a/arch/arm/src/stm32/stm32.h
+++ b/arch/arm/src/stm32/stm32.h
@@ -53,21 +53,6 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* Additional Configuration *********************************************************/
-/* Custom debug settings used in the STM32 port.  These are managed by STM32-specific
- * logic and not the common logic in include/debug.h.  NOTE:  Some of these also
- * depend on CONFIG_DEBUG_VERBOSE
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_DMA
-#  undef CONFIG_DEBUG_RTC
-#  undef CONFIG_DEBUG_I2C
-#  undef CONFIG_DEBUG_CAN
-#  undef CONFIG_DEBUG_PWM
-#  undef CONFIG_DEBUG_SENSORS
-#endif
-
 /* Peripherals **********************************************************************/
 
 #include "chip.h"
@@ -76,6 +61,7 @@
 #include "stm32_can.h"
 #include "stm32_dbgmcu.h"
 #include "stm32_dma.h"
+#include "stm32_dac.h"
 #include "stm32_exti.h"
 #include "stm32_flash.h"
 #include "stm32_fsmc.h"
diff --git a/arch/arm/src/stm32/stm32_1wire.c b/arch/arm/src/stm32/stm32_1wire.c
index 4c0fa6c0f770bca534e163cca96cd167d2f3c0ab..b43769577a8e12f30358ae25946343e6d2f8b2bd 100644
--- a/arch/arm/src/stm32/stm32_1wire.c
+++ b/arch/arm/src/stm32/stm32_1wire.c
@@ -54,9 +54,10 @@
 
 #include 
 #include 
-#include 
 #include 
 #include 
+#include 
+#include 
 
 #include 
 
@@ -81,7 +82,11 @@
 #define WRITE_TX0       0x00
 #define WRITE_TX1       0xFF
 
-#define PIN_OPENDRAIN(GPIO) ((GPIO) | GPIO_OPENDRAIN)
+#define PIN_OPENDRAIN(GPIO) ((GPIO) | GPIO_CNF_OUTOD)
+
+#if defined(CONFIG_STM32_STM32F10XX)
+#  define USART_CR3_ONEBIT (0)
+#endif
 
 /****************************************************************************
  * Private Types
@@ -112,7 +117,6 @@ struct stm32_1wire_config_s
   const uint32_t apbclock;  /* PCLK 1 or 2 frequency */
   const uint32_t data_pin;  /* GPIO configuration for DATA */
   const uint8_t  irq;       /* IRQ associated with this USART */
-  int (*const vector)(int irq, void *context);  /* Interrupt handler */
 };
 
 /* 1-Wire device Private Data */
@@ -156,33 +160,7 @@ static inline void stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv);
 static inline void stm32_1wire_sem_post(FAR struct stm32_1wire_priv_s *priv);
 static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
                                FAR const struct stm32_1wire_msg_s *msgs, int count);
-static int stm32_1wire_isr(struct stm32_1wire_priv_s *priv);
-
-#ifdef CONFIG_STM32_USART1_1WIREDRIVER
-static int stm32_interrupt_1wire1(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32_USART2_1WIREDRIVER
-static int stm32_interrupt_1wire2(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32_USART3_1WIREDRIVER
-static int stm32_interrupt_1wire3(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32_UART4_1WIREDRIVER
-static int stm32_interrupt_1wire4(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32_UART5_1WIREDRIVER
-static int stm32_interrupt_1wire5(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32_USART6_1WIREDRIVER
-static int stm32_interrupt_1wire6(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32_UART7_1WIREDRIVER
-static int stm32_interrupt_1wire7(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32_UART8_1WIREDRIVER
-static int stm32_interrupt_1wire8(int irq, void *context);
-#endif
-
+static int stm32_1wire_isr(int irq, void *context, void *arg);
 static int stm32_1wire_reset(FAR struct onewire_dev_s *dev);
 static int stm32_1wire_write(FAR struct onewire_dev_s *dev,
                              const uint8_t *buffer, int buflen);
@@ -206,7 +184,6 @@ static const struct stm32_1wire_config_s stm32_1wire1_config =
   .apbclock   = STM32_PCLK2_FREQUENCY,
   .data_pin   = PIN_OPENDRAIN(GPIO_USART1_TX),
   .irq        = STM32_IRQ_USART1,
-  .vector     = stm32_interrupt_1wire1,
 };
 
 static struct stm32_1wire_priv_s stm32_1wire1_priv =
@@ -226,7 +203,6 @@ static const struct stm32_1wire_config_s stm32_1wire2_config =
   .apbclock   = STM32_PCLK1_FREQUENCY,
   .data_pin   = PIN_OPENDRAIN(GPIO_USART2_TX),
   .irq        = STM32_IRQ_USART2,
-  .vector     = stm32_interrupt_1wire2,
 };
 
 static struct stm32_1wire_priv_s stm32_1wire2_priv =
@@ -246,7 +222,6 @@ static const struct stm32_1wire_config_s stm32_1wire3_config =
   .apbclock   = STM32_PCLK1_FREQUENCY,
   .data_pin   = PIN_OPENDRAIN(GPIO_USART3_TX),
   .irq        = STM32_IRQ_USART3,
-  .vector     = stm32_interrupt_1wire3,
 };
 
 static struct stm32_1wire_priv_s stm32_1wire3_priv =
@@ -266,7 +241,6 @@ static const struct stm32_1wire_config_s stm32_1wire4_config =
   .apbclock   = STM32_PCLK1_FREQUENCY,
   .data_pin   = PIN_OPENDRAIN(GPIO_UART4_TX),
   .irq        = STM32_IRQ_UART4,
-  .vector     = stm32_interrupt_1wire4,
 };
 
 static struct stm32_1wire_priv_s stm32_1wire4_priv =
@@ -286,7 +260,6 @@ static const struct stm32_1wire_config_s stm32_1wire5_config =
   .apbclock   = STM32_PCLK1_FREQUENCY,
   .data_pin   = PIN_OPENDRAIN(GPIO_UART5_TX),
   .irq        = STM32_IRQ_UART5,
-  .vector     = stm32_interrupt_1wire5,
 };
 
 static struct stm32_1wire_priv_s stm32_1wire5_priv =
@@ -306,7 +279,6 @@ static const struct stm32_1wire_config_s stm32_1wire6_config =
   .apbclock   = STM32_PCLK2_FREQUENCY,
   .data_pin   = PIN_OPENDRAIN(GPIO_USART6_TX),
   .irq        = STM32_IRQ_USART6,
-  .vector     = stm32_interrupt_1wire6,
 };
 
 static struct stm32_1wire_priv_s stm32_1wire6_priv =
@@ -326,7 +298,6 @@ static const struct stm32_1wire_config_s stm32_1wire7_config =
   .apbclock   = STM32_PCLK1_FREQUENCY,
   .data_pin   = PIN_OPENDRAIN(GPIO_UART7_TX),
   .irq        = STM32_IRQ_UART7,
-  .vector     = stm32_interrupt_1wire7,
 };
 
 static struct stm32_1wire_priv_s stm32_1wire7_priv =
@@ -346,7 +317,6 @@ static const struct stm32_1wire_config_s stm32_1wire8_config =
   .apbclock   = STM32_PCLK1_FREQUENCY,
   .data_pin   = PIN_OPENDRAIN(GPIO_UART8_TX),
   .irq        = STM32_IRQ_UART8,
-  .vector     = stm32_interrupt_1wire8,
 };
 
 static struct stm32_1wire_priv_s stm32_1wire8_priv =
@@ -568,13 +538,13 @@ static void stm32_1wire_set_apb_clock(struct stm32_1wire_priv_s *priv,
       regaddr = STM32_RCC_APB1ENR;
       break;
 #endif
-#ifdef CONFIG_STM32_UART4
+#ifdef CONFIG_STM32_UART4_1WIREDRIVER
     case STM32_UART4_BASE:
       rcc_en = RCC_APB1ENR_UART4EN;
       regaddr = STM32_RCC_APB1ENR;
       break;
 #endif
-#ifdef CONFIG_STM32_UART5
+#ifdef CONFIG_STM32_UART5_1WIREDRIVER
     case STM32_UART5_BASE:
       rcc_en = RCC_APB1ENR_UART5EN;
       regaddr = STM32_RCC_APB1ENR;
@@ -586,13 +556,13 @@ static void stm32_1wire_set_apb_clock(struct stm32_1wire_priv_s *priv,
       regaddr = STM32_RCC_APB2ENR;
       break;
 #endif
-#ifdef CONFIG_STM32_UART7
+#ifdef CONFIG_STM32_UART7_1WIREDRIVER
     case STM32_UART7_BASE:
       rcc_en = RCC_APB1ENR_UART7EN;
       regaddr = STM32_RCC_APB1ENR;
       break;
 #endif
-#ifdef CONFIG_STM32_UART8
+#ifdef CONFIG_STM32_UART8_1WIREDRIVER
     case STM32_UART8_BASE:
       rcc_en = RCC_APB1ENR_UART8EN;
       regaddr = STM32_RCC_APB1ENR;
@@ -674,7 +644,7 @@ static int stm32_1wire_init(FAR struct stm32_1wire_priv_s *priv)
 
   stm32_configgpio(config->data_pin);
 
-  ret = irq_attach(config->irq, config->vector);
+  ret = irq_attach(config->irq, stm32_1wire_isr, priv);
   if (ret == OK)
     {
       up_enable_irq(config->irq);
@@ -740,6 +710,12 @@ static inline void stm32_1wire_sem_init(FAR struct stm32_1wire_priv_s *priv)
 {
   sem_init(&priv->sem_excl, 0, 1);
   sem_init(&priv->sem_isr, 0, 0);
+
+  /* The sem_isr semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->sem_isr, SEM_PRIO_NONE);
 }
 
 /****************************************************************************
@@ -906,9 +882,13 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
  *  Common Interrupt Service Routine
  ****************************************************************************/
 
-static int stm32_1wire_isr(struct stm32_1wire_priv_s *priv)
+static int stm32_1wire_isr(int irq, void *context, void *arg)
 {
-  uint32_t sr, dr;
+  struct stm32_1wire_priv_s *priv = (struct stm32_1wire_priv_s *)arg;
+  uint32_t sr;
+  uint32_t dr;
+
+  DEBUGASSERT(priv != NULL);
 
   /* Get the masked USART status word. */
 
@@ -1030,55 +1010,6 @@ static int stm32_1wire_isr(struct stm32_1wire_priv_s *priv)
   return OK;
 }
 
-#ifdef CONFIG_STM32_USART1_1WIREDRIVER
-static int stm32_interrupt_1wire1(int irq, void *context)
-{
-  return stm32_1wire_isr(&stm32_1wire1_priv);
-}
-#endif
-#ifdef CONFIG_STM32_USART2_1WIREDRIVER
-static int stm32_interrupt_1wire2(int irq, void *context)
-{
-  return stm32_1wire_isr(&stm32_1wire2_priv);
-}
-#endif
-#ifdef CONFIG_STM32_USART3_1WIREDRIVER
-static int stm32_interrupt_1wire3(int irq, void *context)
-{
-  return stm32_1wire_isr(&stm32_1wire3_priv);
-}
-#endif
-#ifdef CONFIG_STM32_UART4_1WIREDRIVER
-static int stm32_interrupt_1wire4(int irq, void *context)
-{
-  return stm32_1wire_isr(&stm32_1wire4_priv);
-}
-#endif
-#ifdef CONFIG_STM32_UART5_1WIREDRIVER
-static int stm32_interrupt_1wire5(int irq, void *context)
-{
-  return stm32_1wire_isr(&stm32_1wire5_priv);
-}
-#endif
-#ifdef CONFIG_STM32_USART6_1WIREDRIVER
-static int stm32_interrupt_1wire6(int irq, void *context)
-{
-  return stm32_1wire_isr(&stm32_1wire6_priv);
-}
-#endif
-#ifdef CONFIG_STM32_UART7_1WIREDRIVER
-static int stm32_interrupt_1wire7(int irq, void *context)
-{
-  return stm32_1wire_isr(&stm32_1wire7_priv);
-}
-#endif
-#ifdef CONFIG_STM32_UART8_1WIREDRIVER
-static int stm32_interrupt_1wire8(int irq, void *context)
-{
-  return stm32_1wire_isr(&stm32_1wire8_priv);
-}
-#endif
-
 /****************************************************************************
  * Name: stm32_1wire_reset
  *
diff --git a/arch/arm/src/stm32/stm32_adc.c b/arch/arm/src/stm32/stm32_adc.c
index 5e34110fc91b13b159fe610450bc56d934d0b7c5..ef91b77b40f3af0047ad417cc950769f260cd574 100644
--- a/arch/arm/src/stm32/stm32_adc.c
+++ b/arch/arm/src/stm32/stm32_adc.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32/stm32_adc.c
  *
- *   Copyright (C) 2011, 2013, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2013, 2015-2017 Gregory Nutt. All rights reserved.
  *   Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved.
  *   Authors: Gregory Nutt 
  *            Diego Sanchez 
@@ -58,6 +58,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "up_internal.h"
 #include "up_arch.h"
@@ -79,8 +80,8 @@
 /* This implementation is for the STM32 F1, F2, F4 and STM32L15XX only */
 
 #if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F20XX) || \
-    defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F40XX) || \
-    defined(CONFIG_STM32_STM32L15XX)
+    defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) || \
+    defined(CONFIG_STM32_STM32F40XX) || defined(CONFIG_STM32_STM32L15XX)
 
 /* At the moment there is no proper implementation for timers external
  * trigger in STM32L15XX May be added latter
@@ -107,6 +108,9 @@
 #  define RCC_RSTR_ADC2RST RCC_AHBRSTR_ADC12RST
 #  define RCC_RSTR_ADC3RST RCC_AHBRSTR_ADC34RST
 #  define RCC_RSTR_ADC4RST RCC_AHBRSTR_ADC34RST
+#elif defined(CONFIG_STM32_STM32F37XX)
+#  define STM32_RCC_RSTR   STM32_RCC_APB2RSTR
+#  define RCC_RSTR_ADC1RST RCC_APB2RSTR_ADCRST
 #elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
 #  define STM32_RCC_RSTR   STM32_RCC_APB2RSTR
 #  define RCC_RSTR_ADC1RST RCC_APB2RSTR_ADCRST
@@ -148,7 +152,7 @@
 #  define ADC_IER_AWD                ADC_CR1_AWDIE
 #  define ADC_ISR_JEOC               ADC_SR_JEOC
 #  define ADC_IER_JEOC               ADC_CR1_JEOCIE
-#  ifdef CONFIG_STM32_STM32F10XX
+#  if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F37XX)
 #    define ADC_EXTREG_EXTEN_MASK    ADC_CR2_EXTTRIG
 #    define ADC_EXTREG_EXTEN_NONE    0
 #    define ADC_EXTREG_EXTEN_DEFAULT ADC_CR2_EXTTRIG
@@ -180,7 +184,11 @@
 #ifdef ADC_HAVE_DMA
 #  define ADC_MAX_SAMPLES ADC_MAX_CHANNELS_DMA
 #else
-#  define ADC_MAX_SAMPLES ADC_MAX_CHANNELS_NODMA
+#  if defined(CONFIG_STM32_STM32F30XX)
+#    define ADC_MAX_SAMPLES ADC_MAX_CHANNELS_DMA /* Works without DMA should sampling frequency be reduced */
+#  else
+#    define ADC_MAX_SAMPLES ADC_MAX_CHANNELS_NODMA
+#  endif
 #endif
 
 #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
@@ -219,7 +227,12 @@
                                (ADC_SMPR_DEFAULT << ADC_SMPR2_SMP8_SHIFT) | \
                                (ADC_SMPR_DEFAULT << ADC_SMPR2_SMP9_SHIFT))
 #elif defined(CONFIG_STM32_STM32F30XX)
-#  define ADC_SMPR_DEFAULT    ADC_SMPR_61p5
+#  if defined(ADC_HAVE_DMA) || (ADC_MAX_SAMPLES == 1)
+#    define ADC_SMPR_DEFAULT    ADC_SMPR_61p5
+#  else /* Slow down sampling frequency */
+#    define ADC_SMPR_DEFAULT    ADC_SMPR_601p5
+#  endif
+
 #  define ADC_SMPR1_DEFAULT   ((ADC_SMPR_DEFAULT << ADC_SMPR1_SMP1_SHIFT) | \
                                (ADC_SMPR_DEFAULT << ADC_SMPR1_SMP2_SHIFT) | \
                                (ADC_SMPR_DEFAULT << ADC_SMPR1_SMP3_SHIFT) | \
@@ -238,8 +251,13 @@
                                (ADC_SMPR_DEFAULT << ADC_SMPR2_SMP16_SHIFT) | \
                                (ADC_SMPR_DEFAULT << ADC_SMPR2_SMP17_SHIFT) | \
                                (ADC_SMPR_DEFAULT << ADC_SMPR2_SMP18_SHIFT))
-#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
-#  define ADC_SMPR_DEFAULT    ADC_SMPR_112
+#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F37XX) || \
+    defined(CONFIG_STM32_STM32F40XX)
+#  if defined(CONFIG_STM32_STM32F37XX)
+#    define ADC_SMPR_DEFAULT    ADC_SMPR_239p5 /* TODO choose 1p5? */
+#  else
+#    define ADC_SMPR_DEFAULT    ADC_SMPR_112
+#  endif
 #  define ADC_SMPR1_DEFAULT   ((ADC_SMPR_DEFAULT << ADC_SMPR1_SMP10_SHIFT) | \
                                (ADC_SMPR_DEFAULT << ADC_SMPR1_SMP11_SHIFT) | \
                                (ADC_SMPR_DEFAULT << ADC_SMPR1_SMP12_SHIFT) | \
@@ -320,7 +338,8 @@ struct stm32_dev_s
 /* ADC Register access */
 
 #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32F40XX) || defined(CONFIG_STM32_STM32L15XX)
+    defined(CONFIG_STM32_STM32F37XX) ||defined(CONFIG_STM32_STM32F40XX) || \
+    defined(CONFIG_STM32_STM32L15XX)
 static void stm32_modifyreg32(unsigned int addr, uint32_t clrbits,
                               uint32_t setbits);
 #endif
@@ -345,20 +364,20 @@ static void adc_rccreset(FAR struct stm32_dev_s *priv, bool reset);
 
 static int adc_interrupt(FAR struct adc_dev_s *dev);
 #if defined(STM32_IRQ_ADC1) && defined(CONFIG_STM32_ADC1)
-static int adc1_interrupt(int irq, FAR void *context);
+static int adc1_interrupt(int irq, FAR void *context, FAR void *arg);
 #endif
 #if defined(STM32_IRQ_ADC12) && (defined(CONFIG_STM32_ADC1) || \
                                  defined(CONFIG_STM32_ADC2))
-static int adc12_interrupt(int irq, FAR void *context);
+static int adc12_interrupt(int irq, FAR void *context, FAR void *arg);
 #endif
 #if (defined(STM32_IRQ_ADC3) && defined(CONFIG_STM32_ADC3))
-static int adc3_interrupt(int irq, FAR void *context);
+static int adc3_interrupt(int irq, FAR void *context, FAR void *arg);
 #endif
 #if defined(STM32_IRQ_ADC4) && defined(CONFIG_STM32_ADC4)
-static int adc4_interrupt(int irq, FAR void *context);
+static int adc4_interrupt(int irq, FAR void *context, FAR void *arg);
 #endif
 #if defined(STM32_IRQ_ADC)
-static int adc123_interrupt(int irq, FAR void *context);
+static int adc123_interrupt(int irq, FAR void *context, FAR void *arg);
 #endif
 
 /* ADC Driver Methods */
@@ -587,7 +606,8 @@ static struct adc_dev_s g_adcdev4 =
  ****************************************************************************/
 
 #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32F40XX) || defined(CONFIG_STM32_STM32L15XX)
+    defined(CONFIG_STM32_STM32F37XX) ||defined(CONFIG_STM32_STM32F40XX) || \
+    defined(CONFIG_STM32_STM32L15XX)
 static void stm32_modifyreg32(unsigned int addr, uint32_t clrbits,
                               uint32_t setbits)
 {
@@ -748,22 +768,22 @@ static void tim_modifyreg(FAR struct stm32_dev_s *priv, int offset,
 #ifdef ADC_HAVE_TIMER
 static void tim_dumpregs(FAR struct stm32_dev_s *priv, FAR const char *msg)
 {
-  avdbg("%s:\n", msg);
-  avdbg("  CR1: %04x CR2:  %04x SMCR:  %04x DIER:  %04x\n",
+  ainfo("%s:\n", msg);
+  ainfo("  CR1: %04x CR2:  %04x SMCR:  %04x DIER:  %04x\n",
         tim_getreg(priv, STM32_GTIM_CR1_OFFSET),
         tim_getreg(priv, STM32_GTIM_CR2_OFFSET),
         tim_getreg(priv, STM32_GTIM_SMCR_OFFSET),
         tim_getreg(priv, STM32_GTIM_DIER_OFFSET));
-  avdbg("   SR: %04x EGR:  0000 CCMR1: %04x CCMR2: %04x\n",
+  ainfo("   SR: %04x EGR:  0000 CCMR1: %04x CCMR2: %04x\n",
         tim_getreg(priv, STM32_GTIM_SR_OFFSET),
         tim_getreg(priv, STM32_GTIM_CCMR1_OFFSET),
         tim_getreg(priv, STM32_GTIM_CCMR2_OFFSET));
-  avdbg(" CCER: %04x CNT:  %04x PSC:   %04x ARR:   %04x\n",
+  ainfo(" CCER: %04x CNT:  %04x PSC:   %04x ARR:   %04x\n",
         tim_getreg(priv, STM32_GTIM_CCER_OFFSET),
         tim_getreg(priv, STM32_GTIM_CNT_OFFSET),
         tim_getreg(priv, STM32_GTIM_PSC_OFFSET),
         tim_getreg(priv, STM32_GTIM_ARR_OFFSET));
-  avdbg(" CCR1: %04x CCR2: %04x CCR3:  %04x CCR4:  %04x\n",
+  ainfo(" CCR1: %04x CCR2: %04x CCR3:  %04x CCR4:  %04x\n",
         tim_getreg(priv, STM32_GTIM_CCR1_OFFSET),
         tim_getreg(priv, STM32_GTIM_CCR2_OFFSET),
         tim_getreg(priv, STM32_GTIM_CCR3_OFFSET),
@@ -771,7 +791,7 @@ static void tim_dumpregs(FAR struct stm32_dev_s *priv, FAR const char *msg)
 #ifndef CONFIG_STM32_STM32L15XX
   if (priv->tbase == STM32_TIM1_BASE || priv->tbase == STM32_TIM8_BASE)
     {
-      avdbg("  RCR: %04x BDTR: %04x DCR:   %04x DMAR:  %04x\n",
+      ainfo("  RCR: %04x BDTR: %04x DCR:   %04x DMAR:  %04x\n",
             tim_getreg(priv, STM32_ATIM_RCR_OFFSET),
             tim_getreg(priv, STM32_ATIM_BDTR_OFFSET),
             tim_getreg(priv, STM32_ATIM_DCR_OFFSET),
@@ -779,7 +799,7 @@ static void tim_dumpregs(FAR struct stm32_dev_s *priv, FAR const char *msg)
     }
   else
     {
-      avdbg("  DCR: %04x DMAR: %04x\n",
+      ainfo("  DCR: %04x DMAR: %04x\n",
             tim_getreg(priv, STM32_GTIM_DCR_OFFSET),
             tim_getreg(priv, STM32_GTIM_DMAR_OFFSET));
     }
@@ -804,7 +824,7 @@ static void tim_dumpregs(FAR struct stm32_dev_s *priv, FAR const char *msg)
 #ifdef ADC_HAVE_TIMER
 static void adc_timstart(FAR struct stm32_dev_s *priv, bool enable)
 {
-  avdbg("enable: %d\n", enable ? 1 : 0);
+  ainfo("enable: %d\n", enable ? 1 : 0);
 
   if (enable)
     {
@@ -873,7 +893,7 @@ static int adc_timinit(FAR struct stm32_dev_s *priv)
    *   position.
    */
 
-  avdbg("Initializing timers extsel = 0x%08x\n", priv->extsel);
+  ainfo("Initializing timers extsel = 0x%08x\n", priv->extsel);
 
   adc_modifyreg(priv, STM32_ADC_EXTREG_OFFSET,
                 ADC_EXTREG_EXTEN_MASK | ADC_EXTREG_EXTSEL_MASK,
@@ -906,7 +926,7 @@ static int adc_timinit(FAR struct stm32_dev_s *priv)
 
   if (prescaler < 1)
     {
-      adbg("WARNING: Prescaler underflowed.\n");
+      awarn("WARNING: Prescaler underflowed.\n");
       prescaler = 1;
     }
 
@@ -914,7 +934,7 @@ static int adc_timinit(FAR struct stm32_dev_s *priv)
 
   else if (prescaler > 65536)
     {
-      adbg("WARNING: Prescaler overflowed.\n");
+      awarn("WARNING: Prescaler overflowed.\n");
       prescaler = 65536;
     }
 
@@ -923,12 +943,12 @@ static int adc_timinit(FAR struct stm32_dev_s *priv)
   reload = timclk / priv->freq;
   if (reload < 1)
     {
-      adbg("WARNING: Reload value underflowed.\n");
+      awarn("WARNING: Reload value underflowed.\n");
       reload = 1;
     }
   else if (reload > 65535)
     {
-      adbg("WARNING: Reload value overflowed.\n");
+      awarn("WARNING: Reload value overflowed.\n");
       reload = 65535;
     }
 
@@ -1070,7 +1090,7 @@ static int adc_timinit(FAR struct stm32_dev_s *priv)
         break;
 
       default:
-        adbg("No such trigger: %d\n", priv->trigger);
+        aerr("ERROR: No such trigger: %d\n", priv->trigger);
         return -EINVAL;
     }
 
@@ -1205,7 +1225,7 @@ static int adc_timinit(FAR struct stm32_dev_s *priv)
 #if defined(CONFIG_STM32_STM32F10XX)
 static void adc_startconv(FAR struct stm32_dev_s *priv, bool enable)
 {
-  avdbg("enable: %d\n", enable ? 1 : 0);
+  ainfo("enable: %d\n", enable ? 1 : 0);
 
   if (!enable)
     {
@@ -1227,7 +1247,7 @@ static void adc_startconv(FAR struct stm32_dev_s *priv, bool enable)
 {
   uint32_t regval;
 
-  avdbg("enable: %d\n", enable ? 1 : 0);
+  ainfo("enable: %d\n", enable ? 1 : 0);
 
   if (enable)
     {
@@ -1256,7 +1276,7 @@ static void adc_startconv(FAR struct stm32_dev_s *priv, bool enable)
 #else
 static void adc_startconv(FAR struct stm32_dev_s *priv, bool enable)
 {
-  avdbg("enable: %d\n", enable ? 1 : 0);
+  ainfo("enable: %d\n", enable ? 1 : 0);
 
   if (enable)
     {
@@ -1364,7 +1384,7 @@ static void adc_power_down_idle(FAR struct stm32_dev_s *priv, bool pdi_high)
 {
   uint32_t regval;
 
-  avdbg("PDI: %d\n", pdi_high ? 1 : 0);
+  ainfo("PDI: %d\n", pdi_high ? 1 : 0);
 
   regval = adc_getreg(priv, STM32_ADC_CR1_OFFSET);
 
@@ -1405,7 +1425,7 @@ static void adc_power_down_delay(FAR struct stm32_dev_s *priv, bool pdd_high)
 {
   uint32_t regval;
 
-  avdbg("PDD: %d\n", pdd_high ? 1 : 0);
+  ainfo("PDD: %d\n", pdd_high ? 1 : 0);
 
   regval = adc_getreg(priv, STM32_ADC_CR1_OFFSET);
 
@@ -1445,7 +1465,7 @@ static void adc_power_down_delay(FAR struct stm32_dev_s *priv, bool pdd_high)
 static void adc_dels_after_conversion(FAR struct stm32_dev_s *priv,
                                       uint32_t delay)
 {
-  avdbg("Delay selected: 0x%08x\n", delay);
+  ainfo("Delay selected: 0x%08x\n", delay);
 
   adc_modifyreg(priv, STM32_ADC_CR2_OFFSET, ADC_CR2_DELS_MASK, delay);
 }
@@ -1471,7 +1491,7 @@ static void adc_dels_after_conversion(FAR struct stm32_dev_s *priv,
 static void adc_select_ch_bank(FAR struct stm32_dev_s *priv,
                                bool chb_selected)
 {
-  avdbg("Bank of channels selected: %c\n", chb_selected ? 'B' : 'A');
+  ainfo("Bank of channels selected: %c\n", chb_selected ? 'B' : 'A');
 
   if (chb_selected)
     {
@@ -1505,7 +1525,7 @@ static void adc_enable(FAR struct stm32_dev_s *priv, bool enable)
 {
   uint32_t regval;
 
-  avdbg("enable: %d\n", enable ? 1 : 0);
+  ainfo("enable: %d\n", enable ? 1 : 0);
 
   regval = adc_getreg(priv, STM32_ADC_CR_OFFSET);
 
@@ -1543,7 +1563,7 @@ static void adc_enable(FAR struct stm32_dev_s *priv, bool enable)
   bool enabled = false;
 #endif
 
-  avdbg("enable: %d\n", enable ? 1 : 0);
+  ainfo("enable: %d\n", enable ? 1 : 0);
 
   if (!enabled && enable)
     {
@@ -1626,7 +1646,7 @@ static void adc_write_sample_time_registers(FAR struct adc_dev_s *dev)
 #endif
 
 /****************************************************************************
- * Name: adc_dmacovcallback
+ * Name: adc_dmaconvcallback
  *
  * Description:
  *   Callback for DMA.  Called from the DMA transfer complete interrupt after
@@ -1657,7 +1677,7 @@ static void adc_dmaconvcallback(DMA_HANDLE handle, uint8_t isr, FAR void *arg)
 
       for (i = 0; i < priv->nchannels; i++)
         {
-          priv->cb->au_receive(dev, priv->current, priv->dmabuffer[priv->current]);
+          priv->cb->au_receive(dev, priv->chanlist[priv->current], priv->dmabuffer[priv->current]);
           priv->current++;
           if (priv->current >= priv->nchannels)
             {
@@ -1717,7 +1737,7 @@ static void adc_reset(FAR struct adc_dev_s *dev)
   int ret;
 #endif
 
-  allvdbg("intf: %d\n", priv->intf);
+  ainfo("intf: %d\n", priv->intf);
   flags = enter_critical_section();
 
 #if defined(CONFIG_STM32_STM32L15XX) && \
@@ -1850,7 +1870,7 @@ static void adc_reset(FAR struct adc_dev_s *dev)
 
   adc_modifyreg(priv, STM32_ADC_IER_OFFSET, clrbits, setbits);
 
-#else
+#else /* ifdef CONFIG_STM32_STM32F30XX */
 
   /* Enable the analog watchdog */
 
@@ -1864,7 +1884,7 @@ static void adc_reset(FAR struct adc_dev_s *dev)
   clrbits |= ADC_CR1_DUALMOD_MASK;
   setbits |= ADC_CR1_IND;
 
-#else
+#elif (! defined(CONFIG_STM32_STM32F37XX))
 
   /* Set the resolution of the conversion */
 
@@ -1880,10 +1900,16 @@ static void adc_reset(FAR struct adc_dev_s *dev)
     }
 #endif
 
-  /* Enable interrupt flags, but disable overrun interrupt */
+  /* Enable interrupt flags, but disable overrun interrupt: TODO this is
+   * done later by upper half when opening device by adc_rxint().
+   */
 
+#ifndef CONFIG_STM32_STM32F37XX
   clrbits |= ADC_IER_OVR;
   setbits |= ADC_IER_ALLINTS & ~ADC_IER_OVR;
+#else
+  /* TODO NON DMA mode */
+#endif
 
   /* Set CR1 configuration */
 
@@ -1916,6 +1942,13 @@ static void adc_reset(FAR struct adc_dev_s *dev)
   clrbits |= ADC_EXTREG_EXTEN_MASK;
   setbits |= ADC_EXTREG_EXTEN_NONE;
 
+  /* Enable software trigger for regular channels */
+
+#ifdef CONFIG_STM32_STM32F37XX
+  clrbits |= ADC_CR2_EXTSEL_MASK;
+  setbits |= ADC_CR2_EXTSEL_SWSTART | ADC_CR2_EXTTRIG; /* SW is considered as external trigger */
+#endif
+
 #ifdef ADC_HAVE_DMA
   if (priv->hasdma)
     {
@@ -2002,7 +2035,7 @@ static void adc_reset(FAR struct adc_dev_s *dev)
       ret = adc_timinit(priv);
       if (ret < 0)
         {
-          adbg("adc_timinit failed: %d\n", ret);
+          aerr("ERROR: adc_timinit failed: %d\n", ret);
         }
     }
 #ifndef CONFIG_ADC_NO_STARTUP_CONV
@@ -2018,26 +2051,26 @@ static void adc_reset(FAR struct adc_dev_s *dev)
   leave_critical_section(flags);
 
 #ifdef CONFIG_STM32_STM32F30XX
-  avdbg("ISR:  0x%08x CR:   0x%08x CFGR: 0x%08x\n",
+  ainfo("ISR:  0x%08x CR:   0x%08x CFGR: 0x%08x\n",
         adc_getreg(priv, STM32_ADC_ISR_OFFSET),
         adc_getreg(priv, STM32_ADC_CR_OFFSET),
         adc_getreg(priv, STM32_ADC_CFGR_OFFSET));
 #else
-  avdbg("SR:   0x%08x CR1:  0x%08x CR2:  0x%08x\n",
+  ainfo("SR:   0x%08x CR1:  0x%08x CR2:  0x%08x\n",
         adc_getreg(priv, STM32_ADC_SR_OFFSET),
         adc_getreg(priv, STM32_ADC_CR1_OFFSET),
         adc_getreg(priv, STM32_ADC_CR2_OFFSET));
 #endif
 
-  avdbg("SQR1: 0x%08x SQR2: 0x%08x SQR3: 0x%08x\n",
+  ainfo("SQR1: 0x%08x SQR2: 0x%08x SQR3: 0x%08x\n",
         adc_getreg(priv, STM32_ADC_SQR1_OFFSET),
         adc_getreg(priv, STM32_ADC_SQR2_OFFSET),
         adc_getreg(priv, STM32_ADC_SQR3_OFFSET));
 
 #if defined(CONFIG_STM32_STM32F30XX)
-  avdbg("SQR4: 0x%08x\n", adc_getreg(priv, STM32_ADC_SQR4_OFFSET));
+  ainfo("SQR4: 0x%08x\n", adc_getreg(priv, STM32_ADC_SQR4_OFFSET));
 #elif defined(CONFIG_STM32_STM32L15XX)
-  avdbg("SQR4: 0x%08x SQR5: 0x%08x\n",
+  ainfo("SQR4: 0x%08x SQR5: 0x%08x\n",
         adc_getreg(priv, STM32_ADC_SQR4_OFFSET)
         adc_getreg(priv, STM32_ADC_SQR5_OFFSET));
 #endif
@@ -2045,16 +2078,16 @@ static void adc_reset(FAR struct adc_dev_s *dev)
 #if defined(CONFIG_STM32_STM32F30XX)
   if (priv->base == STM32_ADC1_BASE || priv->base == STM32_ADC2_BASE)
     {
-      avdbg("CCR:  0x%08x\n", getreg32(STM32_ADC12_CCR));
+      ainfo("CCR:  0x%08x\n", getreg32(STM32_ADC12_CCR));
     }
   else
     {
-      avdbg("CCR:  0x%08x\n", getreg32(STM32_ADC34_CCR));
+      ainfo("CCR:  0x%08x\n", getreg32(STM32_ADC34_CCR));
     }
 #elif defined(CONFIG_STM32_STM32F20XX) || \
       defined(CONFIG_STM32_STM32F40XX) || \
       defined(CONFIG_STM32_STM32L15XX)
-  avdbg("CCR:  0x%08x\n", getreg32(STM32_ADC_CCR));
+  ainfo("CCR:  0x%08x\n", getreg32(STM32_ADC_CCR));
 #endif
 }
 
@@ -2104,10 +2137,10 @@ static int adc_setup(FAR struct adc_dev_s *dev)
 
   /* Attach the ADC interrupt */
 
-  ret = irq_attach(priv->irq, priv->isr);
+  ret = irq_attach(priv->irq, priv->isr, NULL);
   if (ret < 0)
     {
-      avdbg("irq_attach failed: %d\n", ret);
+      ainfo("irq_attach failed: %d\n", ret);
       return ret;
     }
 
@@ -2117,7 +2150,7 @@ static int adc_setup(FAR struct adc_dev_s *dev)
 
   /* Enable the ADC interrupt */
 
-  avdbg("Enable the ADC interrupt: irq=%d\n", priv->irq);
+  ainfo("Enable the ADC interrupt: irq=%d\n", priv->irq);
   up_enable_irq(priv->irq);
 
   return ret;
@@ -2171,14 +2204,25 @@ static void adc_shutdown(FAR struct adc_dev_s *dev)
 static void adc_rxint(FAR struct adc_dev_s *dev, bool enable)
 {
   FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
+  uint32_t regval;
 
-  avdbg("intf: %d enable: %d\n", priv->intf, enable ? 1 : 0);
+  ainfo("intf: %d enable: %d\n", priv->intf, enable ? 1 : 0);
 
   if (enable)
     {
-      /* Enable the end-of-conversion ADC and analog watchdog interrupts */
+      /* Enable the analog watchdog / overrun interrupts, and if no DMA,
+       * end-of-conversion ADC.
+       */
+
+      regval = ADC_IER_ALLINTS;
+#ifdef ADC_HAVE_DMA
+      if (priv->hasdma)
+        {
+          regval &= ~(ADC_IER_EOC | ADC_IER_JEOC);
+        }
+#endif
 
-      adc_modifyreg(priv, STM32_ADC_IER_OFFSET, 0, ADC_IER_ALLINTS);
+      adc_modifyreg(priv, STM32_ADC_IER_OFFSET, 0, regval);
     }
   else
     {
@@ -2219,7 +2263,7 @@ static void adc_ioc_enable_tvref_register(FAR struct adc_dev_s *dev,
       stm32_modifyreg32(STM32_ADC_CCR, ADC_CCR_TSVREFE, 0);
     }
 
-  avdbg("STM32_ADC_CCR value: 0x%08x\n", getreg32(STM32_ADC_CCR));
+  ainfo("STM32_ADC_CCR value: 0x%08x\n", getreg32(STM32_ADC_CCR));
 }
 #endif
 
@@ -2263,7 +2307,7 @@ static int adc_ioc_change_sleep_between_opers(FAR struct adc_dev_s *dev,
         break;
 
       default:
-        avdbg("unknown cmd: %d\n", cmd);
+        ainfo("unknown cmd: %d\n", cmd);
         break;
     }
 
@@ -2436,7 +2480,7 @@ static int adc_ioc_change_ints(FAR struct adc_dev_s *dev, int cmd, bool arg)
         break;
 
       default:
-        avdbg("unknown cmd: %d\n", cmd);
+        ainfo("unknown cmd: %d\n", cmd);
         break;
     }
 
@@ -2680,7 +2724,7 @@ static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg)
 #endif /* CONFIG_STM32_STM32L15XX */
 
       default:
-        adbg("ERROR: Unknown cmd: %d\n", cmd);
+        aerr("ERROR: Unknown cmd: %d\n", cmd);
         ret = -ENOTTY;
         break;
     }
@@ -2718,12 +2762,12 @@ static int adc_interrupt(FAR struct adc_dev_s *dev)
 
   if ((regval & ADC_ISR_AWD) != 0)
     {
-      alldbg("WARNING: Analog Watchdog, Value converted out of range!\n");
+      awarn("WARNING: Analog Watchdog, Value converted out of range!\n");
     }
 
   if ((regval & ADC_ISR_OVR) != 0)
     {
-      alldbg("WARNING: Overrun has occurred!\n");
+      awarn("WARNING: Overrun has occurred!\n");
     }
 
   /* EOC: End of conversion */
@@ -2766,8 +2810,10 @@ static int adc_interrupt(FAR struct adc_dev_s *dev)
         }
     }
 
-  regval &= ~pending;
-  adc_putreg(priv, STM32_ADC_ISR_OFFSET, regval);
+  /* by MR regval &= ~pending; */
+  /* by MR adc_putreg(priv, STM32_ADC_ISR_OFFSET, regval);
+
+  adc_putreg(priv, STM32_ADC_ISR_OFFSET, pending); */
   return OK;
 }
 
@@ -2786,7 +2832,7 @@ static int adc_interrupt(FAR struct adc_dev_s *dev)
  ****************************************************************************/
 
 #if defined(STM32_IRQ_ADC1)
-static int adc1_interrupt(int irq, FAR void *context)
+static int adc1_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   adc_interrupt(&g_adcdev1);
 
@@ -2808,7 +2854,7 @@ static int adc1_interrupt(int irq, FAR void *context)
 
 #if defined(STM32_IRQ_ADC12) && \
     (defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2))
-static int adc12_interrupt(int irq, FAR void *context)
+static int adc12_interrupt(int irq, FAR void *context, FAR void *arg)
 {
 #ifdef CONFIG_STM32_ADC1
   adc_interrupt(&g_adcdev1);
@@ -2835,7 +2881,7 @@ static int adc12_interrupt(int irq, FAR void *context)
  ****************************************************************************/
 
 #if defined(STM32_IRQ_ADC3) && defined(CONFIG_STM32_ADC3)
-static int adc3_interrupt(int irq, FAR void *context)
+static int adc3_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   adc_interrupt(&g_adcdev3);
 
@@ -2856,7 +2902,7 @@ static int adc3_interrupt(int irq, FAR void *context)
  ****************************************************************************/
 
 #if defined(STM32_IRQ_ADC4) && defined(CONFIG_STM32_ADC4)
-static int adc4_interrupt(int irq, FAR void *context)
+static int adc4_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   adc_interrupt(&g_adcdev4);
   return OK;
@@ -2876,7 +2922,7 @@ static int adc4_interrupt(int irq, FAR void *context)
  ****************************************************************************/
 
 #if defined(STM32_IRQ_ADC)
-static int adc123_interrupt(int irq, FAR void *context)
+static int adc123_interrupt(int irq, FAR void *context, FAR void *arg)
 {
 #ifdef CONFIG_STM32_ADC1
   adc_interrupt(&g_adcdev1);
@@ -2983,36 +3029,36 @@ struct adc_dev_s *stm32_adcinitialize(int intf, FAR const uint8_t *chanlist,
   FAR struct adc_dev_s   *dev;
   FAR struct stm32_dev_s *priv;
 
-  avdbg("intf: %d cchannels: %d\n", intf, cchannels);
+  ainfo("intf: %d cchannels: %d\n", intf, cchannels);
 
   switch (intf)
     {
 #ifdef CONFIG_STM32_ADC1
       case 1:
-        avdbg("ADC1 selected\n");
+        ainfo("ADC1 selected\n");
         dev = &g_adcdev1;
         break;
 #endif
 #ifdef CONFIG_STM32_ADC2
       case 2:
-        avdbg("ADC2 selected\n");
+        ainfo("ADC2 selected\n");
         dev = &g_adcdev2;
         break;
 #endif
 #ifdef CONFIG_STM32_ADC3
       case 3:
-        avdbg("ADC3 selected\n");
+        ainfo("ADC3 selected\n");
         dev = &g_adcdev3;
         break;
 #endif
 #ifdef CONFIG_STM32_ADC4
       case 4:
-        avdbg("ADC4 selected\n");
+        ainfo("ADC4 selected\n");
         dev = &g_adcdev4;
         break;
 #endif
       default:
-        adbg("No ADC interface defined\n");
+        aerr("ERROR: No ADC interface defined\n");
         return NULL;
     }
 
@@ -3039,8 +3085,8 @@ struct adc_dev_s *stm32_adcinitialize(int intf, FAR const uint8_t *chanlist,
 }
 
 #endif /* CONFIG_STM32_STM32F10XX || CONFIG_STM32_STM32F20XX ||
-        * CONFIG_STM32_STM32F30XX || CONFIG_STM32_STM32F40XX ||
-        * CONFIG_STM32_STM32L15XX
+        * CONFIG_STM32_STM32F30XX || CONFIG_STM32_STM32F47XX ||
+        * CONFIG_STM32_STM32F40XX || CONFIG_STM32_STM32L15XX
         */
 #endif /* CONFIG_STM32_ADC1 || CONFIG_STM32_ADC2 ||
         * CONFIG_STM32_ADC3 || CONFIG_STM32_ADC4
diff --git a/arch/arm/src/stm32/stm32_adc.h b/arch/arm/src/stm32/stm32_adc.h
index 25ad161b629c847de2b1f4c45504f11ef8e8a708..03ffaecbc01f2745ab22bc1f522cc9f189b0daac 100644
--- a/arch/arm/src/stm32/stm32_adc.h
+++ b/arch/arm/src/stm32/stm32_adc.h
@@ -48,6 +48,10 @@
 
 #if defined(CONFIG_STM32_STM32F30XX)
 #  include "chip/stm32f30xxx_adc.h"
+#elif defined(CONFIG_STM32_STM32F33XX)
+#  include "chip/stm32f33xxx_adc.h"
+#elif defined(CONFIG_STM32_STM32F37XX)
+#  include "chip/stm32f37xxx_adc.h"
 #else
 #  include "chip/stm32_adc.h"
 #endif
diff --git a/arch/arm/src/stm32/stm32_allocateheap.c b/arch/arm/src/stm32/stm32_allocateheap.c
index 8a844b6d22d21f7fc357f921d2bbd202ef0ade2c..3e6a73f2cd7ff4b9633da762021fd351fe172555 100644
--- a/arch/arm/src/stm32/stm32_allocateheap.c
+++ b/arch/arm/src/stm32/stm32_allocateheap.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/stm32/up_allocateheap.c
+ * arch/arm/src/stm32/stm32_allocateheap.c
  *
  *   Copyright (C) 2011-2013, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -41,6 +41,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -221,6 +222,76 @@
 #      endif
 #    endif
 
+/* All members of the STM32F33xxx families have 16 Kbi ram and 4 KB CCM SRAM.
+ * No external RAM is supported (the F3 family has no FSMC).
+ *
+ * As a complication, CCM SRAM cannot be used for DMA.  So, if STM32 DMA is
+ * enabled, CCM SRAM should probably be excluded from the heap.
+ */
+#elif defined(CONFIG_STM32_STM32F33XX)
+
+   /* Set the end of system SRAM */
+
+#  define SRAM1_END CONFIG_RAM_END
+
+/* Set the range of CCM SRAM as well (although we may not use it) */
+
+#  define SRAM2_START 0x10000000
+#  define SRAM2_END   0x10001000
+
+   /* There is no FSMC */
+
+#  undef CONFIG_STM32_FSMC_SRAM
+
+   /* There are 2 possible SRAM configurations:
+    *
+    * Configuration 1. System SRAM (only)
+    *                  CONFIG_MM_REGIONS == 1
+    *                  CONFIG_STM32_CCMEXCLUDE defined
+    * Configuration 2. System SRAM and CCM SRAM
+    *                  CONFIG_MM_REGIONS == 2
+    *                  CONFIG_STM32_CCMEXCLUDE NOT defined
+    */
+
+#    if CONFIG_MM_REGIONS < 2
+
+       /* Only one memory region.  Force Configuration 1 */
+
+#      ifndef CONFIG_STM32_CCMEXCLUDE
+#        if CONFIG_STM32_HAVE_CCM
+#          warning "CCM SRAM excluded from the heap"
+#        endif
+#        define CONFIG_STM32_CCMEXCLUDE 1
+#      endif
+
+   /* CONFIG_MM_REGIONS may be 2 if CCM SRAM is included in the head */
+
+#    elif CONFIG_MM_REGIONS >= 2
+#      if CONFIG_MM_REGIONS > 2
+#         error "No more than two memory regions can be supported (CONFIG_MM_REGIONS)"
+#         undef CONFIG_MM_REGIONS
+#         define CONFIG_MM_REGIONS 2
+#      endif
+
+     /* Two memory regions is okay if CCM SRAM is not disabled. */
+
+#      ifdef CONFIG_STM32_CCMEXCLUDE
+
+         /* Configuration 1: CONFIG_MM_REGIONS should have been 2 */
+
+#        error "CONFIG_MM_REGIONS >= 2 but but CCM SRAM is excluded (CONFIG_STM32_CCMEXCLUDE)"
+#        undef CONFIG_MM_REGIONS
+#        define CONFIG_MM_REGIONS 1
+#      else
+
+         /* Configuration 2: DMA should be disabled */
+
+#        ifdef CONFIG_ARCH_DMA
+#          warning "CCM SRAM is included in the heap AND DMA is enabled"
+#        endif
+#      endif
+#  endif
+
 /* All members of the STM32F37xxx families have 16-32 Kib ram in a single
  * bank. No external RAM is supported (the F3 family has no FSMC).
  */
@@ -245,7 +316,6 @@
 #    error "CONFIG_MM_REGIONS > 1.  The STM32L15X has only one memory region."
 #  endif
 
-
 /* Most members of both the STM32F20xxx and STM32F40xxx families have 128Kib
  * in two banks:
  *
@@ -294,6 +364,10 @@
 #    define SRAM1_END 0x20018000
 #  elif defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429)
 #    define SRAM1_END 0x20030000
+#  elif defined(CONFIG_STM32_STM32F446)
+#    define SRAM1_END 0x20020000
+#  elif defined(CONFIG_STM32_STM32F469)
+#    define SRAM1_END 0x20050000
 #  else
 #    define SRAM1_END 0x20020000
 #  endif
@@ -438,7 +512,7 @@
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_HEAP
+#ifdef CONFIG_HEAP_COLORATION
 static inline void up_heap_color(FAR void *start, size_t size)
 {
   memset(start, HEAP_COLOR, size);
diff --git a/arch/arm/src/stm32/stm32_bbsram.c b/arch/arm/src/stm32/stm32_bbsram.c
index 507f5a4d4a22b5e136fd1f3b7b1f5980b9da843d..a401feca56284f3ead3738b774fe59a67f8f376d 100644
--- a/arch/arm/src/stm32/stm32_bbsram.c
+++ b/arch/arm/src/stm32/stm32_bbsram.c
@@ -75,6 +75,10 @@
 
 #define MAX_OPENCNT           (255) /* Limit of uint8_t */
 
+#ifndef CONFIG_DEBUG_INFO
+#  undef CONFIG_BBSRAM_DEBUG
+#endif
+
 #if defined(CONFIG_BBSRAM_DEBUG)
 #  define BBSRAM_DEBUG_READ() stm32_bbsram_rd()
 #  define BBSRAM_DUMP(p,s)    stm32_bbsram_dump(p,s)
@@ -183,15 +187,15 @@ static void stm32_bbsram_rd(void)
 static void stm32_bbsram_dump(FAR struct bbsramfh_s *bbf, char *op)
 {
   BBSRAM_DEBUG_READ();
-  lldbg("%s:\n", op);
-  lldbg(" File Address:0x%8x\n", bbf);
-  lldbg("  crc:0x%8x\n", bbf->crc);
-  lldbg("  fileno:%d\n", (int) bbf->fileno);
-  lldbg("  dirty:%d\n", (int) bbf->dirty);
-  lldbg("  length:%d\n", (int) bbf->len);
-  lldbg("  time:%ld:%ld\n", bbf->lastwrite.tv_sec, bbf->lastwrite.tv_nsec);
-  lldbg("  data: 0x%2x 0x%2x 0x%2x 0x%2x 0x%2x\n",
-        bbf->data[0], bbf->data[1], bbf->data[2], bbf->data[3], bbf->data[4]);
+  _info("%s:\n", op);
+  _info(" File Address:0x%8x\n", bbf);
+  _info("  crc:0x%8x\n", bbf->crc);
+  _info("  fileno:%d\n", (int) bbf->fileno);
+  _info("  dirty:%d\n", (int) bbf->dirty);
+  _info("  length:%d\n", (int) bbf->len);
+  _info("  time:%ld:%ld\n", bbf->lastwrite.tv_sec, bbf->lastwrite.tv_nsec);
+  _info("  data: 0x%2x 0x%2x 0x%2x 0x%2x 0x%2x\n",
+       bbf->data[0], bbf->data[1], bbf->data[2], bbf->data[3], bbf->data[4]);
 }
 #endif
 
@@ -252,7 +256,7 @@ static void stm32_bbsram_semtake(FAR struct stm32_bbsram_s *priv)
 
 static inline void stm32_bbsram_unlock(void)
 {
-  (void)stm32_pwr_enablebkp(true);
+  stm32_pwr_enablebkp(true);
 }
 
 /****************************************************************************
@@ -272,7 +276,7 @@ static inline void stm32_bbsram_unlock(void)
 
 static inline void stm32_bbsram_lock(void)
 {
-  (void)stm32_pwr_enablebkp(false);
+  stm32_pwr_enablebkp(false);
 }
 
 /****************************************************************************
@@ -589,8 +593,9 @@ static int stm32_bbsram_ioctl(FAR struct file *filep, int cmd,
           bbrr->fileno = bbr->bbf->fileno;
           bbrr->lastwrite = bbr->bbf->lastwrite;
           bbrr->len = bbr->bbf->len;
-          bbrr->flags = (bbr->bbf->crc == stm32_bbsram_crc(bbr->bbf)) ? eCRCValid : 0;
-          bbrr->flags = (bbr->bbf->dirty) ? eDirty : 0;
+          bbrr->flags = ((bbr->bbf->crc == stm32_bbsram_crc(bbr->bbf))
+                          ? BBSRAM_CRC_VALID : 0);
+          bbrr->flags |= ((bbr->bbf->dirty) ? BBSRAM_DIRTY : 0);
           ret = OK;
         }
 
diff --git a/arch/arm/src/stm32/stm32_bbsram.h b/arch/arm/src/stm32/stm32_bbsram.h
index 69d0046f5cfba0136aed5c1030790ba054aa380a..bcb813d6fa1675269ffab47a3614a28d5729d6e0 100644
--- a/arch/arm/src/stm32/stm32_bbsram.h
+++ b/arch/arm/src/stm32/stm32_bbsram.h
@@ -83,9 +83,8 @@
 
 enum bbsramdf_e
 {
-  eCRCValid = 1,  /* The crc is valid */
-  eDirty    = 2,  /* The file was closed */
-
+  BBSRAM_CRC_VALID = 1,        /* The crc is valid */
+  BBSRAM_DIRTY     = 2,        /* The file was closed */
 };
 
 struct bbsramd_s
diff --git a/arch/arm/src/stm32/stm32_can.c b/arch/arm/src/stm32/stm32_can.c
index 8cb61decf14778fad1de5dd64b0803defa42196a..d90e5cd06da76fda8f9035824de0505b0d11101e 100644
--- a/arch/arm/src/stm32/stm32_can.c
+++ b/arch/arm/src/stm32/stm32_can.c
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
  * arch/arm/src/stm32/stm32_can.c
  *
  *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
@@ -34,7 +34,7 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 /****************************************************************************
  * Included Files
@@ -53,21 +53,22 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 #include "up_internal.h"
 #include "up_arch.h"
 
-
 #include "chip.h"
 #include "stm32.h"
 #include "stm32_can.h"
 
-#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2))
+#if defined(CONFIG_CAN) && \
+    (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2))
 
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
 /* Delays *******************************************************************/
 /* Time out for INAK bit */
 
@@ -81,23 +82,8 @@
 
 #define CAN_BIT_QUANTA (CONFIG_CAN_TSEG1 + CONFIG_CAN_TSEG2 + 1)
 
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
-
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
-#else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
-#endif
-
-#if !defined(CONFIG_DEBUG) || !defined(CONFIG_DEBUG_CAN)
-#  undef CONFIG_CAN_REGDEBUG
+#ifndef CONFIG_DEBUG_CAN_INFO
+#  undef CONFIG_STM32_CAN_REGDEBUG
 #endif
 
 /****************************************************************************
@@ -121,50 +107,70 @@ struct stm32_can_s
 
 /* CAN Register access */
 
-static uint32_t can_getreg(FAR struct stm32_can_s *priv, int offset);
-static uint32_t can_getfreg(FAR struct stm32_can_s *priv, int offset);
-static void can_putreg(FAR struct stm32_can_s *priv, int offset,
-                       uint32_t value);
-static void can_putfreg(FAR struct stm32_can_s *priv, int offset,
-                        uint32_t value);
-#ifdef CONFIG_CAN_REGDEBUG
-static void can_dumpctrlregs(FAR struct stm32_can_s *priv,
-                             FAR const char *msg);
-static void can_dumpmbregs(FAR struct stm32_can_s *priv,
-                           FAR const char *msg);
-static void can_dumpfiltregs(FAR struct stm32_can_s *priv,
-                             FAR const char *msg);
+static uint32_t stm32can_getreg(FAR struct stm32_can_s *priv,
+                                int offset);
+static uint32_t stm32can_getfreg(FAR struct stm32_can_s *priv,
+                                 int offset);
+static void stm32can_putreg(FAR struct stm32_can_s *priv, int offset,
+                            uint32_t value);
+static void stm32can_putfreg(FAR struct stm32_can_s *priv, int offset,
+                             uint32_t value);
+#ifdef CONFIG_STM32_CAN_REGDEBUG
+static void stm32can_dumpctrlregs(FAR struct stm32_can_s *priv,
+                                  FAR const char *msg);
+static void stm32can_dumpmbregs(FAR struct stm32_can_s *priv,
+                                FAR const char *msg);
+static void stm32can_dumpfiltregs(FAR struct stm32_can_s *priv,
+                                  FAR const char *msg);
 #else
-#  define can_dumpctrlregs(priv,msg)
-#  define can_dumpmbregs(priv,msg)
-#  define can_dumpfiltregs(priv,msg)
+#  define stm32can_dumpctrlregs(priv,msg)
+#  define stm32can_dumpmbregs(priv,msg)
+#  define stm32can_dumpfiltregs(priv,msg)
 #endif
 
+/* Filtering (todo) */
+
+#ifdef CONFIG_CAN_EXTID
+static int  stm32can_addextfilter(FAR struct stm32_can_s *priv,
+                                  FAR struct canioc_extfilter_s *arg);
+static int  stm32can_delextfilter(FAR struct stm32_can_s *priv,
+                                  int arg);
+#endif
+static int  stm32can_addstdfilter(FAR struct stm32_can_s *priv,
+                                  FAR struct canioc_stdfilter_s *arg);
+static int  stm32can_delstdfilter(FAR struct stm32_can_s *priv,
+                                  int arg);
+
 /* CAN driver methods */
 
-static void can_reset(FAR struct can_dev_s *dev);
-static int  can_setup(FAR struct can_dev_s *dev);
-static void can_shutdown(FAR struct can_dev_s *dev);
-static void can_rxint(FAR struct can_dev_s *dev, bool enable);
-static void can_txint(FAR struct can_dev_s *dev, bool enable);
-static int  can_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg);
-static int  can_remoterequest(FAR struct can_dev_s *dev, uint16_t id);
-static int  can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg);
-static bool can_txready(FAR struct can_dev_s *dev);
-static bool can_txempty(FAR struct can_dev_s *dev);
+static void stm32can_reset(FAR struct can_dev_s *dev);
+static int  stm32can_setup(FAR struct can_dev_s *dev);
+static void stm32can_shutdown(FAR struct can_dev_s *dev);
+static void stm32can_rxint(FAR struct can_dev_s *dev, bool enable);
+static void stm32can_txint(FAR struct can_dev_s *dev, bool enable);
+static int  stm32can_ioctl(FAR struct can_dev_s *dev, int cmd,
+                           unsigned long arg);
+static int  stm32can_remoterequest(FAR struct can_dev_s *dev,
+                                   uint16_t id);
+static int  stm32can_send(FAR struct can_dev_s *dev,
+                          FAR struct can_msg_s *msg);
+static bool stm32can_txready(FAR struct can_dev_s *dev);
+static bool stm32can_txempty(FAR struct can_dev_s *dev);
 
 /* CAN interrupt handling */
 
-static int  can_rxinterrupt(int irq, FAR void *context, int rxmb);
-static int  can_rx0interrupt(int irq, FAR void *context);
-static int  can_rx1interrupt(int irq, FAR void *context);
-static int  can_txinterrupt(int irq, FAR void *context);
+static int  stm32can_rxinterrupt(FAR struct can_dev_s *dev, int rxmb);
+static int  stm32can_rx0interrupt(int irq, FAR void *context, FAR void *arg);
+static int  stm32can_rx1interrupt(int irq, FAR void *context, FAR void *arg);
+static int  stm32can_txinterrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Initialization */
 
-static int  can_bittiming(FAR struct stm32_can_s *priv);
-static int  can_cellinit(FAR struct stm32_can_s *priv);
-static int  can_filterinit(FAR struct stm32_can_s *priv);
+static int  stm32can_enterinitmode(FAR struct stm32_can_s *priv);
+static int  stm32can_exitinitmode(FAR struct stm32_can_s *priv);
+static int  stm32can_bittiming(FAR struct stm32_can_s *priv);
+static int  stm32can_cellinit(FAR struct stm32_can_s *priv);
+static int  stm32can_filterinit(FAR struct stm32_can_s *priv);
 
 /****************************************************************************
  * Private Data
@@ -172,16 +178,16 @@ static int  can_filterinit(FAR struct stm32_can_s *priv);
 
 static const struct can_ops_s g_canops =
 {
-  .co_reset         = can_reset,
-  .co_setup         = can_setup,
-  .co_shutdown      = can_shutdown,
-  .co_rxint         = can_rxint,
-  .co_txint         = can_txint,
-  .co_ioctl         = can_ioctl,
-  .co_remoterequest = can_remoterequest,
-  .co_send          = can_send,
-  .co_txready       = can_txready,
-  .co_txempty       = can_txempty,
+  .co_reset         = stm32can_reset,
+  .co_setup         = stm32can_setup,
+  .co_shutdown      = stm32can_shutdown,
+  .co_rxint         = stm32can_rxint,
+  .co_txint         = stm32can_txint,
+  .co_ioctl         = stm32can_ioctl,
+  .co_remoterequest = stm32can_remoterequest,
+  .co_send          = stm32can_send,
+  .co_txready       = stm32can_txready,
+  .co_txempty       = stm32can_txempty,
 };
 
 #ifdef CONFIG_STM32_CAN1
@@ -235,8 +241,8 @@ static struct can_dev_s g_can2dev =
  ****************************************************************************/
 
 /****************************************************************************
- * Name: can_getreg
- * Name: can_getfreg
+ * Name: stm32can_getreg
+ * Name: stm32can_getfreg
  *
  * Description:
  *   Read the value of a CAN register or filter block register.
@@ -249,8 +255,8 @@ static struct can_dev_s g_can2dev =
  *
  ****************************************************************************/
 
-#ifdef CONFIG_CAN_REGDEBUG
-static uint32_t can_vgetreg(uint32_t addr)
+#ifdef CONFIG_STM32_CAN_REGDEBUG
+static uint32_t stm32can_vgetreg(uint32_t addr)
 {
   static uint32_t prevaddr = 0;
   static uint32_t preval   = 0;
@@ -270,7 +276,7 @@ static uint32_t can_vgetreg(uint32_t addr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              caninfo("...\n");
             }
 
           return val;
@@ -287,7 +293,7 @@ static uint32_t can_vgetreg(uint32_t addr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          caninfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -299,27 +305,27 @@ static uint32_t can_vgetreg(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%08x\n", addr, val);
+  caninfo("%08x->%08x\n", addr, val);
   return val;
 }
 
-static uint32_t can_getreg(FAR struct stm32_can_s *priv, int offset)
+static uint32_t stm32can_getreg(FAR struct stm32_can_s *priv, int offset)
 {
-  return can_vgetreg(priv->base + offset);
+  return stm32can_vgetreg(priv->base + offset);
 }
 
-static uint32_t can_getfreg(FAR struct stm32_can_s *priv, int offset)
+static uint32_t stm32can_getfreg(FAR struct stm32_can_s *priv, int offset)
 {
-  return can_vgetreg(priv->fbase + offset);
+  return stm32can_vgetreg(priv->fbase + offset);
 }
 
 #else
-static uint32_t can_getreg(FAR struct stm32_can_s *priv, int offset)
+static uint32_t stm32can_getreg(FAR struct stm32_can_s *priv, int offset)
 {
   return getreg32(priv->base + offset);
 }
 
-static uint32_t can_getfreg(FAR struct stm32_can_s *priv, int offset)
+static uint32_t stm32can_getfreg(FAR struct stm32_can_s *priv, int offset)
 {
   return getreg32(priv->fbase + offset);
 }
@@ -327,8 +333,8 @@ static uint32_t can_getfreg(FAR struct stm32_can_s *priv, int offset)
 #endif
 
 /****************************************************************************
- * Name: can_putreg
- * Name: can_putfreg
+ * Name: stm32can_putreg
+ * Name: stm32can_putfreg
  *
  * Description:
  *   Set the value of a CAN register or filter block register.
@@ -343,47 +349,46 @@ static uint32_t can_getfreg(FAR struct stm32_can_s *priv, int offset)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_CAN_REGDEBUG
-static void can_vputreg(uint32_t addr, uint32_t value)
+#ifdef CONFIG_STM32_CAN_REGDEBUG
+static void stm32can_vputreg(uint32_t addr, uint32_t value)
 {
-
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", addr, value);
+  caninfo("%08x<-%08x\n", addr, value);
 
   /* Write the value */
 
   putreg32(value, addr);
 }
 
-static void can_putreg(FAR struct stm32_can_s *priv, int offset,
-                       uint32_t value)
+static void stm32can_putreg(FAR struct stm32_can_s *priv, int offset,
+                            uint32_t value)
 {
-  can_vputreg(priv->base + offset, value);
+  stm32can_vputreg(priv->base + offset, value);
 }
 
-static void can_putfreg(FAR struct stm32_can_s *priv, int offset,
-                        uint32_t value)
+static void stm32can_putfreg(FAR struct stm32_can_s *priv, int offset,
+                             uint32_t value)
 {
-  can_vputreg(priv->fbase + offset, value);
+  stm32can_vputreg(priv->fbase + offset, value);
 }
 
 #else
-static void can_putreg(FAR struct stm32_can_s *priv, int offset,
-                       uint32_t value)
+static void stm32can_putreg(FAR struct stm32_can_s *priv, int offset,
+                            uint32_t value)
 {
   putreg32(value, priv->base + offset);
 }
 
-static void can_putfreg(FAR struct stm32_can_s *priv, int offset,
-                        uint32_t value)
+static void stm32can_putfreg(FAR struct stm32_can_s *priv, int offset,
+                             uint32_t value)
 {
   putreg32(value, priv->fbase + offset);
 }
 #endif
 
 /****************************************************************************
- * Name: can_dumpctrlregs
+ * Name: stm32can_dumpctrlregs
  *
  * Description:
  *   Dump the contents of all CAN control registers
@@ -396,39 +401,39 @@ static void can_putfreg(FAR struct stm32_can_s *priv, int offset,
  *
  ****************************************************************************/
 
-#ifdef CONFIG_CAN_REGDEBUG
-static void can_dumpctrlregs(FAR struct stm32_can_s *priv,
-                             FAR const char *msg)
+#ifdef CONFIG_STM32_CAN_REGDEBUG
+static void stm32can_dumpctrlregs(FAR struct stm32_can_s *priv,
+                                  FAR const char *msg)
 {
   if (msg)
     {
-      canlldbg("Control Registers: %s\n", msg);
+      caninfo("Control Registers: %s\n", msg);
     }
   else
     {
-      canlldbg("Control Registers:\n");
+      caninfo("Control Registers:\n");
     }
 
   /* CAN control and status registers */
 
-  lldbg("  MCR: %08x   MSR: %08x   TSR: %08x\n",
-        getreg32(priv->base + STM32_CAN_MCR_OFFSET),
-        getreg32(priv->base + STM32_CAN_MSR_OFFSET),
-        getreg32(priv->base + STM32_CAN_TSR_OFFSET));
+  caninfo("  MCR: %08x   MSR: %08x   TSR: %08x\n",
+          getreg32(priv->base + STM32_CAN_MCR_OFFSET),
+          getreg32(priv->base + STM32_CAN_MSR_OFFSET),
+          getreg32(priv->base + STM32_CAN_TSR_OFFSET));
 
-  lldbg(" RF0R: %08x  RF1R: %08x\n",
-        getreg32(priv->base + STM32_CAN_RF0R_OFFSET),
-        getreg32(priv->base + STM32_CAN_RF1R_OFFSET));
+  caninfo(" RF0R: %08x  RF1R: %08x\n",
+          getreg32(priv->base + STM32_CAN_RF0R_OFFSET),
+          getreg32(priv->base + STM32_CAN_RF1R_OFFSET));
 
-  lldbg("  IER: %08x   ESR: %08x   BTR: %08x\n",
-        getreg32(priv->base + STM32_CAN_IER_OFFSET),
-        getreg32(priv->base + STM32_CAN_ESR_OFFSET),
-        getreg32(priv->base + STM32_CAN_BTR_OFFSET));
+  caninfo("  IER: %08x   ESR: %08x   BTR: %08x\n",
+          getreg32(priv->base + STM32_CAN_IER_OFFSET),
+          getreg32(priv->base + STM32_CAN_ESR_OFFSET),
+          getreg32(priv->base + STM32_CAN_BTR_OFFSET));
 }
 #endif
 
 /****************************************************************************
- * Name: can_dumpmbregs
+ * Name: stm32can_dumpmbregs
  *
  * Description:
  *   Dump the contents of all CAN mailbox registers
@@ -441,55 +446,55 @@ static void can_dumpctrlregs(FAR struct stm32_can_s *priv,
  *
  ****************************************************************************/
 
-#ifdef CONFIG_CAN_REGDEBUG
-static void can_dumpmbregs(FAR struct stm32_can_s *priv,
-                           FAR const char *msg)
+#ifdef CONFIG_STM32_CAN_REGDEBUG
+static void stm32can_dumpmbregs(FAR struct stm32_can_s *priv,
+                                FAR const char *msg)
 {
   if (msg)
     {
-      canlldbg("Mailbox Registers: %s\n", msg);
+      caninfo("Mailbox Registers: %s\n", msg);
     }
   else
     {
-      canlldbg("Mailbox Registers:\n");
+      caninfo("Mailbox Registers:\n");
     }
 
   /* CAN mailbox registers (3 TX and 2 RX) */
 
-  lldbg(" TI0R: %08x TDT0R: %08x TDL0R: %08x TDH0R: %08x\n",
-        getreg32(priv->base + STM32_CAN_TI0R_OFFSET),
-        getreg32(priv->base + STM32_CAN_TDT0R_OFFSET),
-        getreg32(priv->base + STM32_CAN_TDL0R_OFFSET),
-        getreg32(priv->base + STM32_CAN_TDH0R_OFFSET));
-
-  lldbg(" TI1R: %08x TDT1R: %08x TDL1R: %08x TDH1R: %08x\n",
-        getreg32(priv->base + STM32_CAN_TI1R_OFFSET),
-        getreg32(priv->base + STM32_CAN_TDT1R_OFFSET),
-        getreg32(priv->base + STM32_CAN_TDL1R_OFFSET),
-        getreg32(priv->base + STM32_CAN_TDH1R_OFFSET));
-
-  lldbg(" TI2R: %08x TDT2R: %08x TDL2R: %08x TDH2R: %08x\n",
-        getreg32(priv->base + STM32_CAN_TI2R_OFFSET),
-        getreg32(priv->base + STM32_CAN_TDT2R_OFFSET),
-        getreg32(priv->base + STM32_CAN_TDL2R_OFFSET),
-        getreg32(priv->base + STM32_CAN_TDH2R_OFFSET));
-
-  lldbg(" RI0R: %08x RDT0R: %08x RDL0R: %08x RDH0R: %08x\n",
-        getreg32(priv->base + STM32_CAN_RI0R_OFFSET),
-        getreg32(priv->base + STM32_CAN_RDT0R_OFFSET),
-        getreg32(priv->base + STM32_CAN_RDL0R_OFFSET),
-        getreg32(priv->base + STM32_CAN_RDH0R_OFFSET));
-
-  lldbg(" RI1R: %08x RDT1R: %08x RDL1R: %08x RDH1R: %08x\n",
-        getreg32(priv->base + STM32_CAN_RI1R_OFFSET),
-        getreg32(priv->base + STM32_CAN_RDT1R_OFFSET),
-        getreg32(priv->base + STM32_CAN_RDL1R_OFFSET),
-        getreg32(priv->base + STM32_CAN_RDH1R_OFFSET));
+  caninfo(" TI0R: %08x TDT0R: %08x TDL0R: %08x TDH0R: %08x\n",
+          getreg32(priv->base + STM32_CAN_TI0R_OFFSET),
+          getreg32(priv->base + STM32_CAN_TDT0R_OFFSET),
+          getreg32(priv->base + STM32_CAN_TDL0R_OFFSET),
+          getreg32(priv->base + STM32_CAN_TDH0R_OFFSET));
+
+  caninfo(" TI1R: %08x TDT1R: %08x TDL1R: %08x TDH1R: %08x\n",
+          getreg32(priv->base + STM32_CAN_TI1R_OFFSET),
+          getreg32(priv->base + STM32_CAN_TDT1R_OFFSET),
+          getreg32(priv->base + STM32_CAN_TDL1R_OFFSET),
+          getreg32(priv->base + STM32_CAN_TDH1R_OFFSET));
+
+  caninfo(" TI2R: %08x TDT2R: %08x TDL2R: %08x TDH2R: %08x\n",
+          getreg32(priv->base + STM32_CAN_TI2R_OFFSET),
+          getreg32(priv->base + STM32_CAN_TDT2R_OFFSET),
+          getreg32(priv->base + STM32_CAN_TDL2R_OFFSET),
+          getreg32(priv->base + STM32_CAN_TDH2R_OFFSET));
+
+  caninfo(" RI0R: %08x RDT0R: %08x RDL0R: %08x RDH0R: %08x\n",
+          getreg32(priv->base + STM32_CAN_RI0R_OFFSET),
+          getreg32(priv->base + STM32_CAN_RDT0R_OFFSET),
+          getreg32(priv->base + STM32_CAN_RDL0R_OFFSET),
+          getreg32(priv->base + STM32_CAN_RDH0R_OFFSET));
+
+  caninfo(" RI1R: %08x RDT1R: %08x RDL1R: %08x RDH1R: %08x\n",
+          getreg32(priv->base + STM32_CAN_RI1R_OFFSET),
+          getreg32(priv->base + STM32_CAN_RDT1R_OFFSET),
+          getreg32(priv->base + STM32_CAN_RDL1R_OFFSET),
+          getreg32(priv->base + STM32_CAN_RDH1R_OFFSET));
 }
 #endif
 
 /****************************************************************************
- * Name: can_dumpfiltregs
+ * Name: stm32can_dumpfiltregs
  *
  * Description:
  *   Dump the contents of all CAN filter registers
@@ -502,43 +507,43 @@ static void can_dumpmbregs(FAR struct stm32_can_s *priv,
  *
  ****************************************************************************/
 
-#ifdef CONFIG_CAN_REGDEBUG
-static void can_dumpfiltregs(FAR struct stm32_can_s *priv,
-                             FAR const char *msg)
+#ifdef CONFIG_STM32_CAN_REGDEBUG
+static void stm32can_dumpfiltregs(FAR struct stm32_can_s *priv,
+                                  FAR const char *msg)
 {
   int i;
 
   if (msg)
     {
-      canlldbg("Filter Registers: %s\n", msg);
+      caninfo("Filter Registers: %s\n", msg);
     }
   else
     {
-      canlldbg("Filter Registers:\n");
+      caninfo("Filter Registers:\n");
     }
 
-  lldbg(" FMR: %08x   FM1R: %08x  FS1R: %08x FFA1R: %08x  FA1R: %08x\n",
-        getreg32(priv->base + STM32_CAN_FMR_OFFSET),
-        getreg32(priv->base + STM32_CAN_FM1R_OFFSET),
-        getreg32(priv->base + STM32_CAN_FS1R_OFFSET),
-        getreg32(priv->base + STM32_CAN_FFA1R_OFFSET),
-        getreg32(priv->base + STM32_CAN_FA1R_OFFSET));
+  caninfo(" FMR: %08x   FM1R: %08x  FS1R: %08x FFA1R: %08x  FA1R: %08x\n",
+          getreg32(priv->base + STM32_CAN_FMR_OFFSET),
+          getreg32(priv->base + STM32_CAN_FM1R_OFFSET),
+          getreg32(priv->base + STM32_CAN_FS1R_OFFSET),
+          getreg32(priv->base + STM32_CAN_FFA1R_OFFSET),
+          getreg32(priv->base + STM32_CAN_FA1R_OFFSET));
 
   for (i = 0; i < CAN_NFILTERS; i++)
     {
-      lldbg(" F%dR1: %08x F%dR2: %08x\n",
-            i, getreg32(priv->base + STM32_CAN_FIR_OFFSET(i, 1)),
-            i, getreg32(priv->base + STM32_CAN_FIR_OFFSET(i, 2)));
+      caninfo(" F%dR1: %08x F%dR2: %08x\n",
+              i, getreg32(priv->base + STM32_CAN_FIR_OFFSET(i, 1)),
+              i, getreg32(priv->base + STM32_CAN_FIR_OFFSET(i, 2)));
     }
 }
 #endif
 
 /****************************************************************************
- * Name: can_reset
+ * Name: stm32can_reset
  *
  * Description:
  *   Reset the CAN device.  Called early to initialize the hardware. This
- *   function is called, before can_setup() and on error conditions.
+ *   function is called, before stm32can_setup() and on error conditions.
  *
  * Input Parameters:
  *   dev - An instance of the "upper half" can driver state structure.
@@ -548,14 +553,14 @@ static void can_dumpfiltregs(FAR struct stm32_can_s *priv,
  *
  ****************************************************************************/
 
-static void can_reset(FAR struct can_dev_s *dev)
+static void stm32can_reset(FAR struct can_dev_s *dev)
 {
   FAR struct stm32_can_s *priv = dev->cd_priv;
   uint32_t regval;
   uint32_t regbit = 0;
   irqstate_t flags;
 
-  canllvdbg("CAN%d\n", priv->port);
+  caninfo("CAN%d\n", priv->port);
 
   /* Get the bits in the AHB1RSTR register needed to reset this CAN device */
 
@@ -574,7 +579,7 @@ static void can_reset(FAR struct can_dev_s *dev)
   else
 #endif
     {
-      canlldbg("Unsupported port %d\n", priv->port);
+      canerr("ERROR: Unsupported port %d\n", priv->port);
       return;
     }
 
@@ -596,7 +601,7 @@ static void can_reset(FAR struct can_dev_s *dev)
 }
 
 /****************************************************************************
- * Name: can_setup
+ * Name: stm32can_setup
  *
  * Description:
  *   Configure the CAN. This method is called the first time that the CAN
@@ -612,61 +617,64 @@ static void can_reset(FAR struct can_dev_s *dev)
  *
  ****************************************************************************/
 
-static int can_setup(FAR struct can_dev_s *dev)
+static int stm32can_setup(FAR struct can_dev_s *dev)
 {
   FAR struct stm32_can_s *priv = dev->cd_priv;
   int ret;
 
-  canllvdbg("CAN%d RX0 irq: %d RX1 irq: %d TX irq: %d\n",
-            priv->port, priv->canrx[0], priv->canrx[1], priv->cantx);
+  caninfo("CAN%d RX0 irq: %d RX1 irq: %d TX irq: %d\n",
+          priv->port, priv->canrx[0], priv->canrx[1], priv->cantx);
 
   /* CAN cell initialization */
 
-  ret = can_cellinit(priv);
+  ret = stm32can_cellinit(priv);
   if (ret < 0)
     {
-      canlldbg("CAN%d cell initialization failed: %d\n", priv->port, ret);
+      canerr("ERROR: CAN%d cell initialization failed: %d\n",
+             priv->port, ret);
       return ret;
     }
 
-  can_dumpctrlregs(priv, "After cell initialization");
-  can_dumpmbregs(priv, NULL);
+  stm32can_dumpctrlregs(priv, "After cell initialization");
+  stm32can_dumpmbregs(priv, NULL);
 
   /* CAN filter initialization */
 
-  ret = can_filterinit(priv);
+  ret = stm32can_filterinit(priv);
   if (ret < 0)
     {
-      canlldbg("CAN%d filter initialization failed: %d\n", priv->port, ret);
+      canerr("ERROR: CAN%d filter initialization failed: %d\n",
+             priv->port, ret);
       return ret;
     }
-  can_dumpfiltregs(priv, "After filter initialization");
+
+  stm32can_dumpfiltregs(priv, "After filter initialization");
 
   /* Attach the CAN RX FIFO 0/1 interrupts and TX interrupts.
    * The others are not used.
    */
 
-  ret = irq_attach(priv->canrx[0], can_rx0interrupt);
+  ret = irq_attach(priv->canrx[0], stm32can_rx0interrupt, dev);
   if (ret < 0)
     {
-      canlldbg("Failed to attach CAN%d RX0 IRQ (%d)",
-               priv->port, priv->canrx[0]);
+      canerr("ERROR: Failed to attach CAN%d RX0 IRQ (%d)",
+             priv->port, priv->canrx[0]);
       return ret;
     }
 
-  ret = irq_attach(priv->canrx[1], can_rx1interrupt);
+  ret = irq_attach(priv->canrx[1], stm32can_rx1interrupt, dev);
   if (ret < 0)
     {
-      canlldbg("Failed to attach CAN%d RX1 IRQ (%d)",
-               priv->port, priv->canrx[1]);
+      canerr("ERROR: Failed to attach CAN%d RX1 IRQ (%d)",
+             priv->port, priv->canrx[1]);
       return ret;
     }
 
-  ret = irq_attach(priv->cantx, can_txinterrupt);
+  ret = irq_attach(priv->cantx, stm32can_txinterrupt, dev);
   if (ret < 0)
     {
-      canlldbg("Failed to attach CAN%d TX IRQ (%d)",
-               priv->port, priv->cantx);
+      canerr("ERROR: Failed to attach CAN%d TX IRQ (%d)",
+             priv->port, priv->cantx);
       return ret;
     }
 
@@ -682,7 +690,7 @@ static int can_setup(FAR struct can_dev_s *dev)
 }
 
 /****************************************************************************
- * Name: can_shutdown
+ * Name: stm32can_shutdown
  *
  * Description:
  *   Disable the CAN.  This method is called when the CAN device is closed.
@@ -696,11 +704,11 @@ static int can_setup(FAR struct can_dev_s *dev)
  *
  ****************************************************************************/
 
-static void can_shutdown(FAR struct can_dev_s *dev)
+static void stm32can_shutdown(FAR struct can_dev_s *dev)
 {
   FAR struct stm32_can_s *priv = dev->cd_priv;
 
-  canllvdbg("CAN%d\n", priv->port);
+  caninfo("CAN%d\n", priv->port);
 
   /* Disable the RX FIFO 0/1 and TX interrupts */
 
@@ -716,11 +724,11 @@ static void can_shutdown(FAR struct can_dev_s *dev)
 
   /* And reset the hardware */
 
-  can_reset(dev);
+  stm32can_reset(dev);
 }
 
 /****************************************************************************
- * Name: can_rxint
+ * Name: stm32can_rxint
  *
  * Description:
  *   Call to enable or disable RX interrupts.
@@ -733,16 +741,16 @@ static void can_shutdown(FAR struct can_dev_s *dev)
  *
  ****************************************************************************/
 
-static void can_rxint(FAR struct can_dev_s *dev, bool enable)
+static void stm32can_rxint(FAR struct can_dev_s *dev, bool enable)
 {
   FAR struct stm32_can_s *priv = dev->cd_priv;
   uint32_t regval;
 
-  canllvdbg("CAN%d enable: %d\n", priv->port, enable);
+  caninfo("CAN%d enable: %d\n", priv->port, enable);
 
   /* Enable/disable the FIFO 0/1 message pending interrupt */
 
-  regval = can_getreg(priv, STM32_CAN_IER_OFFSET);
+  regval = stm32can_getreg(priv, STM32_CAN_IER_OFFSET);
   if (enable)
     {
       regval |= CAN_IER_FMPIE0 | CAN_IER_FMPIE1;
@@ -751,11 +759,12 @@ static void can_rxint(FAR struct can_dev_s *dev, bool enable)
     {
       regval &= ~(CAN_IER_FMPIE0 | CAN_IER_FMPIE1);
     }
-  can_putreg(priv, STM32_CAN_IER_OFFSET, regval);
+
+  stm32can_putreg(priv, STM32_CAN_IER_OFFSET, regval);
 }
 
 /****************************************************************************
- * Name: can_txint
+ * Name: stm32can_txint
  *
  * Description:
  *   Call to enable or disable TX interrupts.
@@ -768,25 +777,25 @@ static void can_rxint(FAR struct can_dev_s *dev, bool enable)
  *
  ****************************************************************************/
 
-static void can_txint(FAR struct can_dev_s *dev, bool enable)
+static void stm32can_txint(FAR struct can_dev_s *dev, bool enable)
 {
   FAR struct stm32_can_s *priv = dev->cd_priv;
   uint32_t regval;
 
-  canllvdbg("CAN%d enable: %d\n", priv->port, enable);
+  caninfo("CAN%d enable: %d\n", priv->port, enable);
 
   /* Support only disabling the transmit mailbox interrupt */
 
   if (!enable)
     {
-      regval  = can_getreg(priv, STM32_CAN_IER_OFFSET);
+      regval  = stm32can_getreg(priv, STM32_CAN_IER_OFFSET);
       regval &= ~CAN_IER_TMEIE;
-      can_putreg(priv, STM32_CAN_IER_OFFSET, regval);
+      stm32can_putreg(priv, STM32_CAN_IER_OFFSET, regval);
     }
 }
 
 /****************************************************************************
- * Name: can_ioctl
+ * Name: stm32can_ioctl
  *
  * Description:
  *   All ioctl calls will be routed through this method
@@ -799,15 +808,311 @@ static void can_txint(FAR struct can_dev_s *dev, bool enable)
  *
  ****************************************************************************/
 
-static int can_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg)
+static int stm32can_ioctl(FAR struct can_dev_s *dev, int cmd,
+                          unsigned long arg)
 {
-  /* No CAN ioctls are supported */
+  FAR struct stm32_can_s *priv;
+  int ret = -ENOTTY;
 
-  return -ENOTTY;
+  caninfo("cmd=%04x arg=%lu\n", cmd, arg);
+
+  DEBUGASSERT(dev && dev->cd_priv);
+  priv = dev->cd_priv;
+
+  /* Handle the command */
+
+  switch (cmd)
+    {
+      /* CANIOC_GET_BITTIMING:
+       *   Description:    Return the current bit timing settings
+       *   Argument:       A pointer to a write-able instance of struct
+       *                   canioc_bittiming_s in which current bit timing
+       *                   values will be returned.
+       *   Returned Value: Zero (OK) is returned on success.  Otherwise -1
+       *                   (ERROR) is returned with the errno variable set
+       *                   to indicate the nature of the error.
+       *   Dependencies:   None
+       */
+
+      case CANIOC_GET_BITTIMING:
+        {
+          FAR struct canioc_bittiming_s *bt =
+            (FAR struct canioc_bittiming_s *)arg;
+          uint32_t regval;
+          uint32_t brp;
+
+          DEBUGASSERT(bt != NULL);
+          regval       = stm32can_getreg(priv, STM32_CAN_BTR_OFFSET);
+          bt->bt_sjw   = ((regval & CAN_BTR_SJW_MASK) >> CAN_BTR_SJW_SHIFT) + 1;
+          bt->bt_tseg1 = ((regval & CAN_BTR_TS1_MASK) >> CAN_BTR_TS1_SHIFT) + 1;
+          bt->bt_tseg2 = ((regval & CAN_BTR_TS2_MASK) >> CAN_BTR_TS2_SHIFT) + 1;
+
+          brp          = ((regval & CAN_BTR_BRP_MASK) >> CAN_BTR_BRP_SHIFT) + 1;
+          bt->bt_baud  = STM32_PCLK1_FREQUENCY /
+                         (brp * (bt->bt_tseg1 + bt->bt_tseg2 + 1));
+          ret = OK;
+        }
+        break;
+
+      /* CANIOC_SET_BITTIMING:
+       *   Description:    Set new current bit timing values
+       *   Argument:       A pointer to a read-able instance of struct
+       *                   canioc_bittiming_s in which the new bit timing
+       *                   values are provided.
+       *   Returned Value: Zero (OK) is returned on success.  Otherwise -1
+       *                   (ERROR)is returned with the errno variable set
+       *                    to indicate thenature of the error.
+       *   Dependencies:   None
+       *
+       * REVISIT: There is probably a limitation here:  If there are multiple
+       * threads trying to send CAN packets, when one of these threads
+       * reconfigures the bitrate, the MCAN hardware will be reset and the
+       * context of operation will be lost.  Hence, this IOCTL can only safely
+       * be executed in quiescent time periods.
+       */
+
+      case CANIOC_SET_BITTIMING:
+        {
+          FAR const struct canioc_bittiming_s *bt =
+            (FAR const struct canioc_bittiming_s *)arg;
+          uint32_t brp;
+          uint32_t can_bit_quanta;
+          uint32_t tmp;
+          uint32_t regval;
+
+          DEBUGASSERT(bt != NULL);
+          DEBUGASSERT(bt->bt_baud < STM32_PCLK1_FREQUENCY);
+          DEBUGASSERT(bt->bt_sjw > 0 && bt->bt_sjw <= 4);
+          DEBUGASSERT(bt->bt_tseg1 > 0 && bt->bt_tseg1 <= 16);
+          DEBUGASSERT(bt->bt_tseg2 > 0 && bt->bt_tseg2 <=  8);
+
+          regval = stm32can_getreg(priv, STM32_CAN_BTR_OFFSET);
+
+          /* Extract bit timing data */
+          /* tmp is in clocks per bit time */
+
+          tmp = STM32_PCLK1_FREQUENCY / bt->bt_baud;
+
+          /* This value is dynamic as requested by user */
+
+          can_bit_quanta = bt->bt_tseg1 + bt->bt_tseg2 + 1;
+
+          if (tmp < can_bit_quanta)
+            {
+              /* This timing is not possible */
+
+              ret = -EINVAL;
+              break;
+            }
+
+          /* Otherwise, nquanta is can_bit_quanta, ts1 and ts2 are
+           * provided by the user and we calculate brp to achieve
+           * can_bit_quanta quanta in the bit times
+           */
+
+          else
+            {
+              brp = (tmp + (can_bit_quanta/2)) / can_bit_quanta;
+              DEBUGASSERT(brp >= 1 && brp <= CAN_BTR_BRP_MAX);
+            }
+
+          caninfo("TS1: %d TS2: %d BRP: %d\n",
+                  bt->bt_tseg1, bt->bt_tseg2, brp);
+
+          /* Configure bit timing. */
+
+          regval &= ~(CAN_BTR_BRP_MASK | CAN_BTR_TS1_MASK |
+                      CAN_BTR_TS2_MASK | CAN_BTR_SJW_MASK);
+          regval |= ((brp          - 1) << CAN_BTR_BRP_SHIFT) |
+                    ((bt->bt_tseg1 - 1) << CAN_BTR_TS1_SHIFT) |
+                    ((bt->bt_tseg2 - 1) << CAN_BTR_TS2_SHIFT) |
+                    ((bt->bt_sjw   - 1) << CAN_BTR_SJW_SHIFT);
+
+          /* Bit timing can only be configured in init mode. */
+
+          ret = stm32can_enterinitmode(priv);
+          if (ret < 0)
+            {
+              break;
+            }
+
+          stm32can_putreg(priv, STM32_CAN_BTR_OFFSET, regval);
+
+          ret = stm32can_exitinitmode(priv);
+          if (ret >= 0)
+            {
+              priv->baud  = STM32_PCLK1_FREQUENCY /
+                (brp * (bt->bt_tseg1 + bt->bt_tseg2 + 1));
+            }
+        }
+        break;
+
+      /* CANIOC_GET_CONNMODES:
+       *   Description:    Get the current bus connection modes
+       *   Argument:       A pointer to a write-able instance of struct
+       *                   canioc_connmodes_s in which the new bus modes will
+       *                   be returned.
+       *   Returned Value: Zero (OK) is returned on success.  Otherwise -1
+       *                   (ERROR)is returned with the errno variable set
+       *                   to indicate the nature of the error.
+       *   Dependencies:   None
+       */
+
+      case CANIOC_GET_CONNMODES:
+        {
+          FAR struct canioc_connmodes_s *bm =
+            (FAR struct canioc_connmodes_s *)arg;
+          uint32_t regval;
+
+          DEBUGASSERT(bm != NULL);
+
+          regval          = stm32can_getreg(priv, STM32_CAN_BTR_OFFSET);
+
+          bm->bm_loopback = ((regval & CAN_BTR_LBKM) == CAN_BTR_LBKM);
+          bm->bm_silent   = ((regval & CAN_BTR_SILM) == CAN_BTR_SILM);
+          ret = OK;
+          break;
+        }
+
+      /* CANIOC_SET_CONNMODES:
+       *   Description:    Set new bus connection modes values
+       *   Argument:       A pointer to a read-able instance of struct
+       *                   canioc_connmodes_s in which the new bus modes
+       *                   are provided.
+       *   Returned Value: Zero (OK) is returned on success.  Otherwise -1
+       *                   (ERROR) is returned with the errno variable set
+       *                   to indicate the nature of the error.
+       *   Dependencies:   None
+       */
+
+      case CANIOC_SET_CONNMODES:
+        {
+          FAR struct canioc_connmodes_s *bm =
+            (FAR struct canioc_connmodes_s *)arg;
+          uint32_t regval;
+
+          DEBUGASSERT(bm != NULL);
+
+          regval = stm32can_getreg(priv, STM32_CAN_BTR_OFFSET);
+
+          if (bm->bm_loopback)
+            {
+              regval |= CAN_BTR_LBKM;
+            }
+          else
+            {
+              regval &= ~CAN_BTR_LBKM;
+            }
+
+          if (bm->bm_silent)
+            {
+              regval |= CAN_BTR_SILM;
+            }
+          else
+            {
+              regval &= ~CAN_BTR_SILM;
+            }
+
+          /* This register can only be configured in init mode. */
+
+          ret = stm32can_enterinitmode(priv);
+          if (ret < 0)
+            {
+              break;
+            }
+
+          stm32can_putreg(priv, STM32_CAN_BTR_OFFSET, regval);
+
+          ret = stm32can_exitinitmode(priv);
+        }
+        break;
+
+#ifdef CONFIG_CAN_EXTID
+      /* CANIOC_ADD_EXTFILTER:
+       *   Description:    Add an address filter for a extended 29 bit
+       *                   address.
+       *   Argument:       A reference to struct canioc_extfilter_s
+       *   Returned Value: A non-negative filter ID is returned on success.
+       *                   Otherwise -1 (ERROR) is returned with the errno
+       *                   variable set to indicate the nature of the error.
+       */
+
+      case CANIOC_ADD_EXTFILTER:
+        {
+          DEBUGASSERT(arg != 0);
+          ret = stm32can_addextfilter(priv,
+                                      (FAR struct canioc_extfilter_s *)arg);
+        }
+        break;
+
+      /* CANIOC_DEL_EXTFILTER:
+       *   Description:    Remove an address filter for a standard 29 bit
+       *                   address.
+       *   Argument:       The filter index previously returned by the
+       *                   CANIOC_ADD_EXTFILTER command
+       *   Returned Value: Zero (OK) is returned on success.  Otherwise -1
+       *                   (ERROR)is returned with the errno variable set
+       *                   to indicate the nature of the error.
+       */
+
+      case CANIOC_DEL_EXTFILTER:
+        {
+#if 0 /* Unimplemented */
+          DEBUGASSERT(arg <= priv->config->nextfilters);
+#endif
+          ret = stm32can_delextfilter(priv, (int)arg);
+        }
+        break;
+#endif
+
+      /* CANIOC_ADD_STDFILTER:
+       *   Description:    Add an address filter for a standard 11 bit
+       *                   address.
+       *   Argument:       A reference to struct canioc_stdfilter_s
+       *   Returned Value: A non-negative filter ID is returned on success.
+       *                   Otherwise -1 (ERROR) is returned with the errno
+       *                   variable set to indicate the nature of the error.
+       */
+
+      case CANIOC_ADD_STDFILTER:
+        {
+          DEBUGASSERT(arg != 0);
+          ret = stm32can_addstdfilter(priv,
+                                      (FAR struct canioc_stdfilter_s *)arg);
+        }
+        break;
+
+      /* CANIOC_DEL_STDFILTER:
+       *   Description:    Remove an address filter for a standard 11 bit
+       *                   address.
+       *   Argument:       The filter index previously returned by the
+       *                   CANIOC_ADD_STDFILTER command
+       *   Returned Value: Zero (OK) is returned on success.  Otherwise -1
+       *                   (ERROR) is returned with the errno variable set
+       *                   to indicate the nature of the error.
+       */
+
+      case CANIOC_DEL_STDFILTER:
+        {
+#if 0 /* Unimplemented */
+          DEBUGASSERT(arg <= priv->config->nstdfilters);
+#endif
+          ret = stm32can_delstdfilter(priv, (int)arg);
+        }
+        break;
+
+      /* Unsupported/unrecognized command */
+
+      default:
+        canerr("ERROR: Unrecognized command: %04x\n", cmd);
+        break;
+    }
+
+  return ret;
 }
 
 /****************************************************************************
- * Name: can_remoterequest
+ * Name: stm32can_remoterequest
  *
  * Description:
  *   Send a remote request
@@ -820,14 +1125,14 @@ static int can_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg)
  *
  ****************************************************************************/
 
-static int can_remoterequest(FAR struct can_dev_s *dev, uint16_t id)
+static int stm32can_remoterequest(FAR struct can_dev_s *dev, uint16_t id)
 {
 #warning "Remote request not implemented"
   return -ENOSYS;
 }
 
 /****************************************************************************
- * Name: can_send
+ * Name: stm32can_send
  *
  * Description:
  *    Send one can message.
@@ -849,7 +1154,8 @@ static int can_remoterequest(FAR struct can_dev_s *dev, uint16_t id)
  *
  ****************************************************************************/
 
-static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
+static int stm32can_send(FAR struct can_dev_s *dev,
+                         FAR struct can_msg_s *msg)
 {
   FAR struct stm32_can_s *priv = dev->cd_priv;
   FAR uint8_t *ptr;
@@ -858,12 +1164,12 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
   int dlc;
   int txmb;
 
-  canllvdbg("CAN%d ID: %d DLC: %d\n",
-            priv->port, msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc);
+  caninfo("CAN%d ID: %d DLC: %d\n",
+          priv->port, msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc);
 
   /* Select one empty transmit mailbox */
 
-  regval = can_getreg(priv, STM32_CAN_TSR_OFFSET);
+  regval = stm32can_getreg(priv, STM32_CAN_TSR_OFFSET);
   if ((regval & CAN_TSR_TME0) != 0 && (regval & CAN_TSR_RQCP0) == 0)
     {
       txmb = 0;
@@ -878,16 +1184,16 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
     }
   else
     {
-      canlldbg("ERROR: No available mailbox\n");
+      canerr("ERROR: No available mailbox\n");
       return -EBUSY;
     }
 
   /* Clear TXRQ, RTR, IDE, EXID, and STID fields */
 
-  regval  = can_getreg(priv, STM32_CAN_TIR_OFFSET(txmb));
+  regval  = stm32can_getreg(priv, STM32_CAN_TIR_OFFSET(txmb));
   regval &= ~(CAN_TIR_TXRQ | CAN_TIR_RTR | CAN_TIR_IDE |
               CAN_TIR_EXID_MASK | CAN_TIR_STID_MASK);
-  can_putreg(priv, STM32_CAN_TIR_OFFSET(txmb), regval);
+  stm32can_putreg(priv, STM32_CAN_TIR_OFFSET(txmb), regval);
 
   /* Set up the ID, standard 11-bit or extended 29-bit. */
 
@@ -907,15 +1213,15 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
   regval &= ~CAN_TIR_STID_MASK;
   regval |= (uint32_t)msg->cm_hdr.ch_id << CAN_TIR_STID_SHIFT;
 #endif
-  can_putreg(priv, STM32_CAN_TIR_OFFSET(txmb), regval);
+  stm32can_putreg(priv, STM32_CAN_TIR_OFFSET(txmb), regval);
 
   /* Set up the DLC */
 
   dlc     = msg->cm_hdr.ch_dlc;
-  regval  = can_getreg(priv, STM32_CAN_TDTR_OFFSET(txmb));
+  regval  = stm32can_getreg(priv, STM32_CAN_TDTR_OFFSET(txmb));
   regval &= ~(CAN_TDTR_DLC_MASK | CAN_TDTR_TGT);
   regval |= (uint32_t)dlc << CAN_TDTR_DLC_SHIFT;
-  can_putreg(priv, STM32_CAN_TDTR_OFFSET(txmb), regval);
+  stm32can_putreg(priv, STM32_CAN_TDTR_OFFSET(txmb), regval);
 
   /* Set up the data fields */
 
@@ -945,7 +1251,8 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
             }
         }
     }
-  can_putreg(priv, STM32_CAN_TDLR_OFFSET(txmb), regval);
+
+  stm32can_putreg(priv, STM32_CAN_TDLR_OFFSET(txmb), regval);
 
   regval = 0;
   if (dlc > 4)
@@ -971,26 +1278,27 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
             }
         }
     }
-  can_putreg(priv, STM32_CAN_TDHR_OFFSET(txmb), regval);
+
+  stm32can_putreg(priv, STM32_CAN_TDHR_OFFSET(txmb), regval);
 
   /* Enable the transmit mailbox empty interrupt (may already be enabled) */
 
-  regval  = can_getreg(priv, STM32_CAN_IER_OFFSET);
+  regval  = stm32can_getreg(priv, STM32_CAN_IER_OFFSET);
   regval |= CAN_IER_TMEIE;
-  can_putreg(priv, STM32_CAN_IER_OFFSET, regval);
+  stm32can_putreg(priv, STM32_CAN_IER_OFFSET, regval);
 
   /* Request transmission */
 
-  regval  = can_getreg(priv, STM32_CAN_TIR_OFFSET(txmb));
+  regval  = stm32can_getreg(priv, STM32_CAN_TIR_OFFSET(txmb));
   regval |= CAN_TIR_TXRQ;  /* Transmit Mailbox Request */
-  can_putreg(priv, STM32_CAN_TIR_OFFSET(txmb), regval);
+  stm32can_putreg(priv, STM32_CAN_TIR_OFFSET(txmb), regval);
 
-  can_dumpmbregs(priv, "After send");
+  stm32can_dumpmbregs(priv, "After send");
   return OK;
 }
 
 /****************************************************************************
- * Name: can_txready
+ * Name: stm32can_txready
  *
  * Description:
  *   Return true if the CAN hardware can accept another TX message.
@@ -1003,21 +1311,21 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
  *
  ****************************************************************************/
 
-static bool can_txready(FAR struct can_dev_s *dev)
+static bool stm32can_txready(FAR struct can_dev_s *dev)
 {
   FAR struct stm32_can_s *priv = dev->cd_priv;
   uint32_t regval;
 
   /* Return true if any mailbox is available */
 
-  regval = can_getreg(priv, STM32_CAN_TSR_OFFSET);
-  canllvdbg("CAN%d TSR: %08x\n", priv->port, regval);
+  regval = stm32can_getreg(priv, STM32_CAN_TSR_OFFSET);
+  caninfo("CAN%d TSR: %08x\n", priv->port, regval);
 
   return (regval & CAN_ALL_MAILBOXES) != 0;
 }
 
 /****************************************************************************
- * Name: can_txempty
+ * Name: stm32can_txempty
  *
  * Description:
  *   Return true if all message have been sent.  If for example, the CAN
@@ -1034,21 +1342,21 @@ static bool can_txready(FAR struct can_dev_s *dev)
  *
  ****************************************************************************/
 
-static bool can_txempty(FAR struct can_dev_s *dev)
+static bool stm32can_txempty(FAR struct can_dev_s *dev)
 {
   FAR struct stm32_can_s *priv = dev->cd_priv;
   uint32_t regval;
 
   /* Return true if all mailboxes are available */
 
-  regval = can_getreg(priv, STM32_CAN_TSR_OFFSET);
-  canllvdbg("CAN%d TSR: %08x\n", priv->port, regval);
+  regval = stm32can_getreg(priv, STM32_CAN_TSR_OFFSET);
+  caninfo("CAN%d TSR: %08x\n", priv->port, regval);
 
   return (regval & CAN_ALL_MAILBOXES) == CAN_ALL_MAILBOXES;
 }
 
 /****************************************************************************
- * Name: can_rxinterrupt
+ * Name: stm32can_rxinterrupt
  *
  * Description:
  *   CAN RX FIFO 0/1 interrupt handler
@@ -1063,9 +1371,8 @@ static bool can_txempty(FAR struct can_dev_s *dev)
  *
  ****************************************************************************/
 
-static int can_rxinterrupt(int irq, FAR void *context, int rxmb)
+static int stm32can_rxinterrupt(FAR struct can_dev_s *dev, int rxmb)
 {
-  FAR struct can_dev_s *dev = NULL;
   FAR struct stm32_can_s *priv;
   struct can_hdr_s hdr;
   uint8_t data[CAN_MAXDATALEN];
@@ -1073,48 +1380,31 @@ static int can_rxinterrupt(int irq, FAR void *context, int rxmb)
   int npending;
   int ret;
 
-#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2)
-  if (g_can1priv.canrx[rxmb] == irq)
-    {
-      dev = &g_can1dev;
-    }
-  else if (g_can2priv.canrx[rxmb] == irq)
-    {
-      dev = &g_can2dev;
-    }
-  else
-    {
-      PANIC();
-    }
-#elif defined(CONFIG_STM32_CAN1)
-  dev = &g_can1dev;
-#else /* defined(CONFIG_STM32_CAN2) */
-  dev = &g_can2dev;
-#endif
+  DEBUGASSERT(dev != NULL && dev->cd_priv != NULL);
   priv = dev->cd_priv;
 
   /* Verify that a message is pending in the FIFO */
 
-  regval   = can_getreg(priv, STM32_CAN_RFR_OFFSET(rxmb));
+  regval   = stm32can_getreg(priv, STM32_CAN_RFR_OFFSET(rxmb));
   npending = (regval & CAN_RFR_FMP_MASK) >> CAN_RFR_FMP_SHIFT;
   if (npending < 1)
     {
-      canlldbg("WARNING: No messages pending\n");
+      canwarn("WARNING: No messages pending\n");
       return OK;
     }
 
   if (rxmb == 0)
     {
-      can_dumpmbregs(priv, "RX0 interrupt");
+      stm32can_dumpmbregs(priv, "RX0 interrupt");
     }
   else
     {
-      can_dumpmbregs(priv, "RX1 interrupt");
+      stm32can_dumpmbregs(priv, "RX1 interrupt");
     }
 
   /* Get the CAN identifier. */
 
-  regval = can_getreg(priv, STM32_CAN_RIR_OFFSET(rxmb));
+  regval = stm32can_getreg(priv, STM32_CAN_RIR_OFFSET(rxmb));
 
 #ifdef CONFIG_CAN_EXTID
   if ((regval & CAN_RIR_IDE) != 0)
@@ -1130,7 +1420,7 @@ static int can_rxinterrupt(int irq, FAR void *context, int rxmb)
 #else
   if ((regval & CAN_RIR_IDE) != 0)
     {
-      canlldbg("ERROR: Received message with extended identifier.  Dropped\n");
+      canerr("ERROR: Received message with extended identifier.  Dropped\n");
       ret = -ENOSYS;
       goto errout;
     }
@@ -1151,18 +1441,18 @@ static int can_rxinterrupt(int irq, FAR void *context, int rxmb)
 
   /* Get the DLC */
 
-  regval     = can_getreg(priv, STM32_CAN_RDTR_OFFSET(rxmb));
+  regval     = stm32can_getreg(priv, STM32_CAN_RDTR_OFFSET(rxmb));
   hdr.ch_dlc = (regval & CAN_RDTR_DLC_MASK) >> CAN_RDTR_DLC_SHIFT;
 
   /* Save the message data */
 
-  regval  = can_getreg(priv, STM32_CAN_RDLR_OFFSET(rxmb));
+  regval  = stm32can_getreg(priv, STM32_CAN_RDLR_OFFSET(rxmb));
   data[0] = (regval & CAN_RDLR_DATA0_MASK) >> CAN_RDLR_DATA0_SHIFT;
   data[1] = (regval & CAN_RDLR_DATA1_MASK) >> CAN_RDLR_DATA1_SHIFT;
   data[2] = (regval & CAN_RDLR_DATA2_MASK) >> CAN_RDLR_DATA2_SHIFT;
   data[3] = (regval & CAN_RDLR_DATA3_MASK) >> CAN_RDLR_DATA3_SHIFT;
 
-  regval  = can_getreg(priv, STM32_CAN_RDHR_OFFSET(rxmb));
+  regval  = stm32can_getreg(priv, STM32_CAN_RDHR_OFFSET(rxmb));
   data[4] = (regval & CAN_RDHR_DATA4_MASK) >> CAN_RDHR_DATA4_SHIFT;
   data[5] = (regval & CAN_RDHR_DATA5_MASK) >> CAN_RDHR_DATA5_SHIFT;
   data[6] = (regval & CAN_RDHR_DATA6_MASK) >> CAN_RDHR_DATA6_SHIFT;
@@ -1177,14 +1467,14 @@ static int can_rxinterrupt(int irq, FAR void *context, int rxmb)
 #ifndef CONFIG_CAN_EXTID
 errout:
 #endif
-  regval  = can_getreg(priv, STM32_CAN_RFR_OFFSET(rxmb));
+  regval  = stm32can_getreg(priv, STM32_CAN_RFR_OFFSET(rxmb));
   regval |= CAN_RFR_RFOM;
-  can_putreg(priv, STM32_CAN_RFR_OFFSET(rxmb), regval);
+  stm32can_putreg(priv, STM32_CAN_RFR_OFFSET(rxmb), regval);
   return ret;
 }
 
 /****************************************************************************
- * Name: can_rx0interrupt
+ * Name: stm32can_rx0interrupt
  *
  * Description:
  *   CAN RX FIFO 0 interrupt handler
@@ -1198,13 +1488,14 @@ errout:
  *
  ****************************************************************************/
 
-static int can_rx0interrupt(int irq, FAR void *context)
+static int stm32can_rx0interrupt(int irq, FAR void *context, FAR void *arg)
 {
-  return can_rxinterrupt(irq, context, 0);
+  FAR struct can_dev_s *dev = (FAR struct can_dev_s *)arg;
+  return stm32can_rxinterrupt(dev, 0);
 }
 
 /****************************************************************************
- * Name: can_rx1interrupt
+ * Name: stm32can_rx1interrupt
  *
  * Description:
  *   CAN RX FIFO 1 interrupt handler
@@ -1218,13 +1509,14 @@ static int can_rx0interrupt(int irq, FAR void *context)
  *
  ****************************************************************************/
 
-static int can_rx1interrupt(int irq, FAR void *context)
+static int stm32can_rx1interrupt(int irq, FAR void *context, FAR void *arg)
 {
-  return can_rxinterrupt(irq, context, 1);
+  FAR struct can_dev_s *dev = (FAR struct can_dev_s *)arg;
+  return stm32can_rxinterrupt(dev, 1);
 }
 
 /****************************************************************************
- * Name: can_txinterrupt
+ * Name: stm32can_txinterrupt
  *
  * Description:
  *   CAN TX mailbox complete interrupt handler
@@ -1238,35 +1530,18 @@ static int can_rx1interrupt(int irq, FAR void *context)
  *
  ****************************************************************************/
 
-static int can_txinterrupt(int irq, FAR void *context)
+static int stm32can_txinterrupt(int irq, FAR void *context, FAR void *arg)
 {
-  FAR struct can_dev_s *dev = NULL;
+  FAR struct can_dev_s *dev = (FAR struct can_dev_s *)arg;
   FAR struct stm32_can_s *priv;
   uint32_t regval;
 
-#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2)
-  if (g_can1priv.cantx == irq)
-    {
-      dev = &g_can1dev;
-    }
-  else if (g_can2priv.cantx == irq)
-    {
-      dev = &g_can2dev;
-    }
-  else
-    {
-      PANIC();
-    }
-#elif defined(CONFIG_STM32_CAN1)
-  dev = &g_can1dev;
-#else /* defined(CONFIG_STM32_CAN2) */
-  dev = &g_can2dev;
-#endif
+  DEBUGASSERT(dev != NULL && dev->cd_priv != NULL);
   priv = dev->cd_priv;
 
   /* Get the transmit status */
 
-  regval = can_getreg(priv, STM32_CAN_TSR_OFFSET);
+  regval = stm32can_getreg(priv, STM32_CAN_TSR_OFFSET);
 
   /* Check for RQCP0: Request completed mailbox 0 */
 
@@ -1276,7 +1551,7 @@ static int can_txinterrupt(int irq, FAR void *context)
        * ALST0 and TERR0) for Mailbox 0.
        */
 
-      can_putreg(priv, STM32_CAN_TSR_OFFSET, CAN_TSR_RQCP0);
+      stm32can_putreg(priv, STM32_CAN_TSR_OFFSET, CAN_TSR_RQCP0);
 
       /* Check for errors */
 
@@ -1296,7 +1571,7 @@ static int can_txinterrupt(int irq, FAR void *context)
        * ALST1 and TERR1) for Mailbox 1.
        */
 
-      can_putreg(priv, STM32_CAN_TSR_OFFSET, CAN_TSR_RQCP1);
+      stm32can_putreg(priv, STM32_CAN_TSR_OFFSET, CAN_TSR_RQCP1);
 
       /* Check for errors */
 
@@ -1316,7 +1591,7 @@ static int can_txinterrupt(int irq, FAR void *context)
        * ALST2 and TERR2) for Mailbox 2.
        */
 
-      can_putreg(priv, STM32_CAN_TSR_OFFSET, CAN_TSR_RQCP2);
+      stm32can_putreg(priv, STM32_CAN_TSR_OFFSET, CAN_TSR_RQCP2);
 
       /* Check for errors */
 
@@ -1332,7 +1607,7 @@ static int can_txinterrupt(int irq, FAR void *context)
 }
 
 /****************************************************************************
- * Name: can_bittiming
+ * Name: stm32can_bittiming
  *
  * Description:
  *   Set the CAN bit timing register (BTR) based on the configured BAUD.
@@ -1375,6 +1650,7 @@ static int can_txinterrupt(int irq, FAR void *context)
  *   Tbs1 = Tq * ts1
  *   Tbs2 = Tq * ts2
  *   Tq = brp * Tpclk1
+ *   baud = Fpclk1 / (brp  * (1 + ts1 + ts2))
  *
  * Where:
  *   Tpclk1 is the period of the APB1 clock (PCLK1).
@@ -1387,15 +1663,15 @@ static int can_txinterrupt(int irq, FAR void *context)
  *
  ****************************************************************************/
 
-static int can_bittiming(FAR struct stm32_can_s *priv)
+static int stm32can_bittiming(FAR struct stm32_can_s *priv)
 {
   uint32_t tmp;
   uint32_t brp;
   uint32_t ts1;
   uint32_t ts2;
 
-  canllvdbg("CAN%d PCLK1: %d baud: %d\n",
-            priv->port, STM32_PCLK1_FREQUENCY, priv->baud);
+  caninfo("CAN%d PCLK1: %d baud: %d\n",
+          priv->port, STM32_PCLK1_FREQUENCY, priv->baud);
 
   /* Try to get CAN_BIT_QUANTA quanta in one bit_time.
    *
@@ -1447,7 +1723,7 @@ static int can_bittiming(FAR struct stm32_can_s *priv)
       DEBUGASSERT(brp >= 1 && brp <= CAN_BTR_BRP_MAX);
     }
 
-  canllvdbg("TS1: %d TS2: %d BRP: %d\n", ts1, ts2, brp);
+  caninfo("TS1: %d TS2: %d BRP: %d\n", ts1, ts2, brp);
 
   /* Configure bit timing.  This also does the following, less obvious
    * things.  Unless loopback mode is enabled, it:
@@ -1466,15 +1742,17 @@ static int can_bittiming(FAR struct stm32_can_s *priv)
   tmp |= CAN_BTR_LBKM;
 #endif
 
-  can_putreg(priv, STM32_CAN_BTR_OFFSET, tmp);
+  stm32can_putreg(priv, STM32_CAN_BTR_OFFSET, tmp);
   return OK;
 }
 
 /****************************************************************************
- * Name: can_cellinit
+ * Name: stm32can_enterinitmode
  *
  * Description:
- *   CAN cell initialization
+ *   Put the CAN cell in Initialization mode. This only disconnects the CAN
+ *   peripheral, no registers are changed. The initialization mode is
+ *   required to change the baud rate.
  *
  * Input Parameter:
  *   priv - A pointer to the private data structure for this CAN block
@@ -1484,30 +1762,24 @@ static int can_bittiming(FAR struct stm32_can_s *priv)
  *
  ****************************************************************************/
 
-static int can_cellinit(FAR struct stm32_can_s *priv)
+static int stm32can_enterinitmode(FAR struct stm32_can_s *priv)
 {
-  volatile uint32_t timeout;
   uint32_t regval;
-  int ret;
-
-  canllvdbg("CAN%d\n", priv->port);
-
-  /* Exit from sleep mode */
+  volatile uint32_t timeout;
 
-  regval  = can_getreg(priv, STM32_CAN_MCR_OFFSET);
-  regval &= ~CAN_MCR_SLEEP;
-  can_putreg(priv, STM32_CAN_MCR_OFFSET, regval);
+  caninfo("CAN%d\n", priv->port);
 
   /* Enter initialization mode */
 
+  regval  = stm32can_getreg(priv, STM32_CAN_MCR_OFFSET);
   regval |= CAN_MCR_INRQ;
-  can_putreg(priv, STM32_CAN_MCR_OFFSET, regval);
+  stm32can_putreg(priv, STM32_CAN_MCR_OFFSET, regval);
 
   /* Wait until initialization mode is acknowledged */
 
   for (timeout = INAK_TIMEOUT; timeout > 0; timeout--)
     {
-      regval = can_getreg(priv, STM32_CAN_MSR_OFFSET);
+      regval = stm32can_getreg(priv, STM32_CAN_MSR_OFFSET);
       if ((regval & CAN_MSR_INAK) != 0)
         {
           /* We are in initialization mode */
@@ -1520,45 +1792,43 @@ static int can_cellinit(FAR struct stm32_can_s *priv)
 
   if (timeout < 1)
     {
-      canlldbg("ERROR: Timed out waiting to enter initialization mode\n");
+      canerr("ERROR: Timed out waiting to enter initialization mode\n");
       return -ETIMEDOUT;
     }
 
-  /* Disable the following modes:
-   *
-   *  - Time triggered communication mode
-   *  - Automatic bus-off management
-   *  - Automatic wake-up mode
-   *  - No automatic retransmission
-   *  - Receive FIFO locked mode
-   *  - Transmit FIFO priority
-   */
-
-  regval   = can_getreg(priv, STM32_CAN_MCR_OFFSET);
-  regval &= ~(CAN_MCR_TXFP | CAN_MCR_RFLM | CAN_MCR_NART |
-              CAN_MCR_AWUM | CAN_MCR_ABOM | CAN_MCR_TTCM);
-  can_putreg(priv, STM32_CAN_MCR_OFFSET, regval);
+  return OK;
+}
 
-  /* Configure bit timing. */
+/****************************************************************************
+ * Name: stm32can_exitinitmode
+ *
+ * Description:
+ *   Put the CAN cell out of the Initialization mode (to Normal mode)
+ *
+ * Input Parameter:
+ *   priv - A pointer to the private data structure for this CAN block
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
 
-  ret = can_bittiming(priv);
-  if (ret < 0)
-    {
-      canlldbg("ERROR: Failed to set bit timing: %d\n", ret);
-      return ret;
-    }
+static int stm32can_exitinitmode(FAR struct stm32_can_s *priv)
+{
+  uint32_t regval;
+  volatile uint32_t timeout;
 
-  /* Exit initialization mode */
+  /* Exit Initialization mode, enter Normal mode */
 
-  regval  = can_getreg(priv, STM32_CAN_MCR_OFFSET);
+  regval  = stm32can_getreg(priv, STM32_CAN_MCR_OFFSET);
   regval &= ~CAN_MCR_INRQ;
-  can_putreg(priv, STM32_CAN_MCR_OFFSET, regval);
+  stm32can_putreg(priv, STM32_CAN_MCR_OFFSET, regval);
 
   /* Wait until the initialization mode exit is acknowledged */
 
   for (timeout = INAK_TIMEOUT; timeout > 0; timeout--)
     {
-      regval = can_getreg(priv, STM32_CAN_MSR_OFFSET);
+      regval = stm32can_getreg(priv, STM32_CAN_MSR_OFFSET);
       if ((regval & CAN_MSR_INAK) == 0)
         {
           /* We are out of initialization mode */
@@ -1571,15 +1841,76 @@ static int can_cellinit(FAR struct stm32_can_s *priv)
 
   if (timeout < 1)
     {
-      canlldbg("ERROR: Timed out waiting to exit initialization mode: %08x\n",
-               regval);
+      canerr("ERROR: Timed out waiting to exit initialization mode: %08x\n",
+             regval);
       return -ETIMEDOUT;
     }
+
   return OK;
 }
 
 /****************************************************************************
- * Name: can_filterinit
+ * Name: stm32can_cellinit
+ *
+ * Description:
+ *   CAN cell initialization
+ *
+ * Input Parameter:
+ *   priv - A pointer to the private data structure for this CAN block
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+static int stm32can_cellinit(FAR struct stm32_can_s *priv)
+{
+  uint32_t regval;
+  int ret;
+
+  caninfo("CAN%d\n", priv->port);
+
+  /* Exit from sleep mode */
+
+  regval  = stm32can_getreg(priv, STM32_CAN_MCR_OFFSET);
+  regval &= ~CAN_MCR_SLEEP;
+  stm32can_putreg(priv, STM32_CAN_MCR_OFFSET, regval);
+
+  ret = stm32can_enterinitmode(priv);
+  if(ret != 0)
+    {
+      return ret;
+    }
+
+  /* Disable the following modes:
+   *
+   *  - Time triggered communication mode
+   *  - Automatic bus-off management
+   *  - Automatic wake-up mode
+   *  - No automatic retransmission
+   *  - Receive FIFO locked mode
+   *  - Transmit FIFO priority
+   */
+
+  regval   = stm32can_getreg(priv, STM32_CAN_MCR_OFFSET);
+  regval &= ~(CAN_MCR_TXFP | CAN_MCR_RFLM | CAN_MCR_NART |
+              CAN_MCR_AWUM | CAN_MCR_ABOM | CAN_MCR_TTCM);
+  stm32can_putreg(priv, STM32_CAN_MCR_OFFSET, regval);
+
+  /* Configure bit timing. */
+
+  ret = stm32can_bittiming(priv);
+  if (ret < 0)
+    {
+      canerr("ERROR: Failed to set bit timing: %d\n", ret);
+      return ret;
+    }
+
+  return stm32can_exitinitmode(priv);
+}
+
+/****************************************************************************
+ * Name: stm32can_filterinit
  *
  * Description:
  *   CAN filter initialization.  CAN filters are not currently used by this
@@ -1611,12 +1942,12 @@ static int can_cellinit(FAR struct stm32_can_s *priv)
  *
  ****************************************************************************/
 
-static int can_filterinit(FAR struct stm32_can_s *priv)
+static int stm32can_filterinit(FAR struct stm32_can_s *priv)
 {
   uint32_t regval;
   uint32_t bitmask;
 
-  canllvdbg("CAN%d filter: %d\n", priv->port, priv->filter);
+  caninfo("CAN%d filter: %d\n", priv->port, priv->filter);
 
   /* Get the bitmask associated with the filter used by this CAN block */
 
@@ -1624,66 +1955,162 @@ static int can_filterinit(FAR struct stm32_can_s *priv)
 
   /* Enter filter initialization mode */
 
-  regval  = can_getfreg(priv, STM32_CAN_FMR_OFFSET);
+  regval  = stm32can_getfreg(priv, STM32_CAN_FMR_OFFSET);
   regval |= CAN_FMR_FINIT;
-  can_putfreg(priv, STM32_CAN_FMR_OFFSET, regval);
+  stm32can_putfreg(priv, STM32_CAN_FMR_OFFSET, regval);
 
   /* Assign half the filters to CAN1, half to CAN2 */
 
 #if defined(CONFIG_STM32_CONNECTIVITYLINE) || \
     defined(CONFIG_STM32_STM32F20XX) || \
     defined(CONFIG_STM32_STM32F40XX)
-  regval  = can_getfreg(priv, STM32_CAN_FMR_OFFSET);
+  regval  = stm32can_getfreg(priv, STM32_CAN_FMR_OFFSET);
   regval &= CAN_FMR_CAN2SB_MASK;
   regval |= (CAN_NFILTERS / 2) << CAN_FMR_CAN2SB_SHIFT;
-  can_putfreg(priv, STM32_CAN_FMR_OFFSET, regval);
+  stm32can_putfreg(priv, STM32_CAN_FMR_OFFSET, regval);
 #endif
 
   /* Disable the filter */
 
-  regval  = can_getfreg(priv, STM32_CAN_FA1R_OFFSET);
+  regval  = stm32can_getfreg(priv, STM32_CAN_FA1R_OFFSET);
   regval &= ~bitmask;
-  can_putfreg(priv, STM32_CAN_FA1R_OFFSET, regval);
+  stm32can_putfreg(priv, STM32_CAN_FA1R_OFFSET, regval);
 
   /* Select the 32-bit scale for the filter */
 
-  regval  = can_getfreg(priv, STM32_CAN_FS1R_OFFSET);
+  regval  = stm32can_getfreg(priv, STM32_CAN_FS1R_OFFSET);
   regval |= bitmask;
-  can_putfreg(priv, STM32_CAN_FS1R_OFFSET, regval);
+  stm32can_putfreg(priv, STM32_CAN_FS1R_OFFSET, regval);
 
   /* There are 14 or 28 filter banks (depending) on the device.
    * Each filter bank is composed of two 32-bit registers, CAN_FiR:
    */
 
-  can_putfreg(priv, STM32_CAN_FIR_OFFSET(priv->filter, 1), 0);
-  can_putfreg(priv, STM32_CAN_FIR_OFFSET(priv->filter, 2), 0);
+  stm32can_putfreg(priv, STM32_CAN_FIR_OFFSET(priv->filter, 1), 0);
+  stm32can_putfreg(priv, STM32_CAN_FIR_OFFSET(priv->filter, 2), 0);
 
   /* Set Id/Mask mode for the filter */
 
-  regval  = can_getfreg(priv, STM32_CAN_FM1R_OFFSET);
+  regval  = stm32can_getfreg(priv, STM32_CAN_FM1R_OFFSET);
   regval &= ~bitmask;
-  can_putfreg(priv, STM32_CAN_FM1R_OFFSET, regval);
+  stm32can_putfreg(priv, STM32_CAN_FM1R_OFFSET, regval);
 
   /* Assign FIFO 0 for the filter */
 
-  regval  = can_getfreg(priv, STM32_CAN_FFA1R_OFFSET);
+  regval  = stm32can_getfreg(priv, STM32_CAN_FFA1R_OFFSET);
   regval &= ~bitmask;
-  can_putfreg(priv, STM32_CAN_FFA1R_OFFSET, regval);
+  stm32can_putfreg(priv, STM32_CAN_FFA1R_OFFSET, regval);
 
   /* Enable the filter */
 
-  regval  = can_getfreg(priv, STM32_CAN_FA1R_OFFSET);
+  regval  = stm32can_getfreg(priv, STM32_CAN_FA1R_OFFSET);
   regval |= bitmask;
-  can_putfreg(priv, STM32_CAN_FA1R_OFFSET, regval);
+  stm32can_putfreg(priv, STM32_CAN_FA1R_OFFSET, regval);
 
   /* Exit filter initialization mode */
 
-  regval  = can_getfreg(priv, STM32_CAN_FMR_OFFSET);
+  regval  = stm32can_getfreg(priv, STM32_CAN_FMR_OFFSET);
   regval &= ~CAN_FMR_FINIT;
-  can_putfreg(priv, STM32_CAN_FMR_OFFSET, regval);
+  stm32can_putfreg(priv, STM32_CAN_FMR_OFFSET, regval);
   return OK;
 }
 
+/****************************************************************************
+ * Name: stm32can_addextfilter
+ *
+ * Description:
+ *   Add a filter for extended CAN IDs
+ *
+ * Input Parameter:
+ *   priv - A pointer to the private data structure for this CAN block
+ *   arg  - A pointer to a structure describing the filter
+ *
+ * Returned Value:
+ *   A non-negative filter ID is returned on success.
+ *   Otherwise -1 (ERROR) is returned with the errno
+ *   set to indicate the nature of the error.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CAN_EXTID
+static int stm32can_addextfilter(FAR struct stm32_can_s *priv,
+                                 FAR struct canioc_extfilter_s *arg)
+{
+  return -ENOTTY;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32can_delextfilter
+ *
+ * Description:
+ *   Remove a filter for extended CAN IDs
+ *
+ * Input Parameter:
+ *   priv - A pointer to the private data structure for this CAN block
+ *   arg  - The filter index previously returned by the
+ *            CANIOC_ADD_EXTFILTER command
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success.  Otherwise -1 (ERROR)
+ *   returned with the errno variable set to indicate the
+ *   of the error.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CAN_EXTID
+static int stm32can_delextfilter(FAR struct stm32_can_s *priv, int arg)
+{
+  return -ENOTTY;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32can_addstdfilter
+ *
+ * Description:
+ *   Add a filter for standard CAN IDs
+ *
+ * Input Parameter:
+ *   priv - A pointer to the private data structure for this CAN block
+ *   arg  - A pointer to a structure describing the filter
+ *
+ * Returned Value:
+ *   A non-negative filter ID is returned on success.
+ *   Otherwise -1 (ERROR) is returned with the errno
+ *   set to indicate the nature of the error.
+ *
+ ****************************************************************************/
+
+static int stm32can_addstdfilter(FAR struct stm32_can_s *priv,
+                                 FAR struct canioc_stdfilter_s *arg)
+{
+  return -ENOTTY;
+}
+
+/****************************************************************************
+ * Name: stm32can_delstdfilter
+ *
+ * Description:
+ *   Remove a filter for standard CAN IDs
+ *
+ * Input Parameter:
+ *   priv - A pointer to the private data structure for this CAN block
+ *   arg  - The filter index previously returned by the
+ *            CANIOC_ADD_STDFILTER command
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success.  Otherwise -1 (ERROR)
+ *   returned with the errno variable set to indicate the
+ *   of the error.
+ *
+ ****************************************************************************/
+
+static int stm32can_delstdfilter(FAR struct stm32_can_s *priv, int arg)
+{
+  return -ENOTTY;
+}
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -1706,7 +2133,7 @@ FAR struct can_dev_s *stm32_caninitialize(int port)
 {
   FAR struct can_dev_s *dev = NULL;
 
-  canvdbg("CAN%d\n", port);
+  caninfo("CAN%d\n", port);
 
   /* NOTE:  Peripherical clocking for CAN1 and/or CAN2 was already provided
    * by stm32_clockconfig() early in the reset sequence.
@@ -1745,7 +2172,7 @@ FAR struct can_dev_s *stm32_caninitialize(int port)
   else
 #endif
     {
-      candbg("ERROR: Unsupported port %d\n", port);
+      canerr("ERROR: Unsupported port %d\n", port);
       return NULL;
     }
 
diff --git a/arch/arm/src/stm32/stm32_can.h b/arch/arm/src/stm32/stm32_can.h
index e78b3af34f7b582264c87b8484538ff0d9542575..765dc95c0ca0ed3acf645eaf64777df65831de14 100644
--- a/arch/arm/src/stm32/stm32_can.h
+++ b/arch/arm/src/stm32/stm32_can.h
@@ -45,7 +45,7 @@
 #include "chip.h"
 #include "chip/stm32_can.h"
 
-#include 
+#include 
 
 /************************************************************************************
  * Pre-processor Definitions
diff --git a/arch/arm/src/stm32/stm32_capture.c b/arch/arm/src/stm32/stm32_capture.c
index 55864281a9ccb17a1c1ecb9d7c0e7876bd1677c5..6b22ae8261ef1071fb79525c79615f1cb992ea4b 100644
--- a/arch/arm/src/stm32/stm32_capture.c
+++ b/arch/arm/src/stm32/stm32_capture.c
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arm/arm/src/stm32/stm32_capture.c
+ * arch/arm/src/stm32/stm32_capture.c
  *
  *   Copyright (C) 2015 Bouteville Pierre-Noel. All rights reserved.
  *   Author: Bouteville Pierre-Noel 
@@ -185,7 +185,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv,
 {
   switch(priv->base)
     {
-#ifdef CONFIG_STM32_TIM1
+#ifdef CONFIG_STM32_TIM1_CAP
       case STM32_TIM1_BASE:
         switch (channel)
           {
@@ -212,7 +212,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv,
           }
         break;
 #endif
-#ifdef CONFIG_STM32_TIM2
+#ifdef CONFIG_STM32_TIM2_CAP
       case STM32_TIM2_BASE:
         switch (channel)
           {
@@ -239,7 +239,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv,
           }
         break;
 #endif
-#ifdef CONFIG_STM32_TIM3
+#ifdef CONFIG_STM32_TIM3_CAP
       case STM32_TIM3_BASE:
         switch (channel)
           {
@@ -266,7 +266,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv,
           }
         break;
 #endif
-#ifdef CONFIG_STM32_TIM4
+#ifdef CONFIG_STM32_TIM4_CAP
       case STM32_TIM4_BASE:
         switch (channel)
           {
@@ -293,7 +293,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv,
           }
         break;
 #endif
-#ifdef CONFIG_STM32_TIM5
+#ifdef CONFIG_STM32_TIM5_CAP
       case STM32_TIM5_BASE:
         switch (channel)
           {
@@ -323,7 +323,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv,
 
 /* TIM6 and TIM7 cannot be used in capture */
 
-#ifdef CONFIG_STM32_TIM8
+#ifdef CONFIG_STM32_TIM8_CAP
       case STM32_TIM8_BASE:
         switch (channel)
           {
@@ -351,7 +351,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv,
         break;
 #endif
 
-#ifdef CONFIG_STM32_TIM9
+#ifdef CONFIG_STM32_TIM9_CAP
       case STM32_TIM9_BASE:
         switch (channel)
           {
@@ -379,7 +379,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv,
         break;
 #endif
 
-#ifdef CONFIG_STM32_TIM10
+#ifdef CONFIG_STM32_TIM10_CAP
       case STM32_TIM10_BASE:
         switch (channel)
           {
@@ -407,7 +407,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv,
         break;
 #endif
 
-#ifdef CONFIG_STM32_TIM11
+#ifdef CONFIG_STM32_TIM11_CAP
       case STM32_TIM11_BASE:
         switch (channel)
           {
@@ -435,7 +435,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv,
         break;
 #endif
 
-#ifdef CONFIG_STM32_TIM12
+#ifdef CONFIG_STM32_TIM12_CAP
       case STM32_TIM12_BASE:
         switch (channel)
           {
@@ -463,7 +463,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv,
         break;
 #endif
 
-#ifdef CONFIG_STM32_TIM13
+#ifdef CONFIG_STM32_TIM13_CAP
       case STM32_TIM13_BASE:
         switch (channel)
           {
@@ -491,7 +491,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv,
         break;
 #endif
 
-#ifdef CONFIG_STM32_TIM14
+#ifdef CONFIG_STM32_TIM14_CAP
       case STM32_TIM14_BASE:
         switch (channel)
           {
@@ -531,31 +531,31 @@ static inline int stm32_cap_set_rcc(FAR const struct stm32_cap_priv_s *priv,
   switch (priv->base)
     {
 #ifdef CONFIG_STM32_TIM1_CAP
-      case 1:
+      case STM32_TIM1_BASE:
         offset = STM32_RCC_APB2ENR;
         mask   = RCC_APB2ENR_TIM1EN;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM2_CAP
-      case 2:
+      case STM32_TIM2_BASE:
         offset = STM32_RCC_APB1ENR;
         mask   = RCC_APB1ENR_TIM2EN;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM3_CAP
-      case 3:
+      case STM32_TIM3_BASE:
         offset = STM32_RCC_APB1ENR;
         mask   = RCC_APB1ENR_TIM3EN;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM4_CAP
-      case 4:
+      case STM32_TIM4_BASE:
         offset = STM32_RCC_APB1ENR;
         mask   = RCC_APB1ENR_TIM4EN;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM5_CAP
-      case 5:
+      case STM32_TIM5_BASE:
         offset = STM32_RCC_APB1ENR;
         mask   = RCC_APB1ENR_TIM5EN;
         break;
@@ -564,43 +564,43 @@ static inline int stm32_cap_set_rcc(FAR const struct stm32_cap_priv_s *priv,
       /* TIM6 and TIM7 cannot be used in capture */
 
 #ifdef CONFIG_STM32_TIM8_CAP
-      case 8:
+      case STM32_TIM8_BASE:
         offset = STM32_RCC_APB2ENR;
         mask   = RCC_APB2ENR_TIM8EN;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM9_CAP
-      case 9:
+      case STM32_TIM9_BASE:
         offset = STM32_RCC_APB2ENR;
         mask   = RCC_APB2ENR_TIM9EN;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM10_CAP
-      case 10:
+      case STM32_TIM10_BASE:
         offset = STM32_RCC_APB2ENR;
         mask   = RCC_APB2ENR_TIM10EN;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM11_CAP
-      case 11:
+      case STM32_TIM11_BASE:
         offset = STM32_RCC_APB2ENR;
         mask   = RCC_APB2ENR_TIM11EN;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM12_CAP
-      case 12:
+      case STM32_TIM12_BASE:
         offset = STM32_RCC_APB1ENR;
         mask   = RCC_APB2ENR_TIM12EN;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM13_CAP
-      case 13:
+      case STM32_TIM13_BASE:
         offset = STM32_RCC_APB1ENR;
         mask   = RCC_APB2ENR_TIM13EN;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM14_CAP
-      case 14:
+      case STM32_TIM14_BASE:
         offset = STM32_RCC_APB1ENR;
         mask   = RCC_APB2ENR_TIM14EN;
         break;
@@ -702,7 +702,7 @@ static int stm32_cap_setclock(FAR struct stm32_cap_dev_s *dev, stm32_cap_clk_t c
   return prescaler;
 }
 
-static int stm32_cap_setisr(FAR struct stm32_cap_dev_s *dev, xcpt_t handler)
+static int stm32_cap_setisr(FAR struct stm32_cap_dev_s *dev, xcpt_t handler, void *arg)
 {
   const struct stm32_cap_priv_s *priv = (const struct stm32_cap_priv_s *)dev;
   int irq;
@@ -736,13 +736,13 @@ static int stm32_cap_setisr(FAR struct stm32_cap_dev_s *dev, xcpt_t handler)
 
   /* Otherwise set callback and enable interrupt */
 
-  irq_attach(irq, handler);
+  irq_attach(irq, handler, arg);
   up_enable_irq(irq);
 
 #ifdef USE_ADVENCED_TIM
   if (priv->irq_of)
     {
-      irq_attach(priv->irq_of, handler);
+      irq_attach(priv->irq_of, handler, arg);
       up_enable_irq(priv->irq_of);
     }
 #endif
@@ -1097,9 +1097,9 @@ const struct stm32_cap_priv_s stm32_tim1_priv =
 {
   .ops          = &stm32_cap_ops,
   .base         = STM32_TIM1_BASE,
-  .irq          = STM32_IRQ_TIM1,
+  .irq          = STM32_IRQ_TIM1CC,
 #ifdef USE_ADVENCED_TIM
-  .irg_of       = STM32_IRQ_TIM1UP,
+  .irq_of       = STM32_IRQ_TIM1UP,
 #endif
 };
 #endif
@@ -1111,7 +1111,7 @@ const struct stm32_cap_priv_s stm32_tim2_priv =
   .base         = STM32_TIM2_BASE,
   .irq          = STM32_IRQ_TIM2,
 #ifdef USE_ADVENCED_TIM
-  .irg_of       = 0,
+  .irq_of       = 0,
 #endif
 };
 #endif
@@ -1123,7 +1123,7 @@ const struct stm32_cap_priv_s stm32_tim3_priv =
   .base         = STM32_TIM3_BASE,
   .irq          = STM32_IRQ_TIM3,
 #ifdef USE_ADVENCED_TIM
-  .irg_of       = 0,
+  .irq_of       = 0,
 #endif
 };
 #endif
@@ -1135,7 +1135,7 @@ const struct stm32_cap_priv_s stm32_tim4_priv =
   .base         = STM32_TIM4_BASE,
   .irq          = STM32_IRQ_TIM4,
 #ifdef USE_ADVENCED_TIM
-  .irg_of       = 0,
+  .irq_of       = 0,
 #endif
 };
 #endif
@@ -1147,7 +1147,7 @@ const struct stm32_cap_priv_s stm32_tim5_priv =
   .base         = STM32_TIM5_BASE,
   .irq          = STM32_IRQ_TIM5,
 #ifdef USE_ADVENCED_TIM
-  .irg_of       = 0,
+  .irq_of       = 0,
 #endif
 };
 #endif
@@ -1159,9 +1159,9 @@ const struct stm32_cap_priv_s stm32_tim8_priv =
 {
   .ops          = &stm32_cap_ops,
   .base         = STM32_TIM8_BASE,
-  .irq          = STM32_IRQ_TIM8,
+  .irq          = STM32_IRQ_TIM8CC,
 #ifdef USE_ADVENCED_TIM
-  .irg_of       = STM32_IRQ_TIM8UP,
+  .irq_of       = STM32_IRQ_TIM8UP,
 #endif
 };
 #endif
@@ -1173,7 +1173,7 @@ const struct stm32_cap_priv_s stm32_tim9_priv =
   .base         = STM32_TIM9_BASE,
   .irq          = STM32_IRQ_TIM9,
 #ifdef USE_ADVENCED_TIM
-  .irg_of       = 0,
+  .irq_of       = 0,
 #endif
 };
 #endif
@@ -1185,7 +1185,7 @@ const struct stm32_cap_priv_s stm32_tim10_priv =
   .base         = STM32_TIM10_BASE,
   .irq          = STM32_IRQ_TIM10,
 #ifdef USE_ADVENCED_TIM
-  .irg_of       = 0,
+  .irq_of       = 0,
 #endif
 };
 #endif
@@ -1197,7 +1197,7 @@ const struct stm32_cap_priv_s stm32_tim11_priv =
   .base         = STM32_TIM11_BASE,
   .irq          = STM32_IRQ_TIM11,
 #ifdef USE_ADVENCED_TIM
-  .irg_of       = 0,
+  .irq_of       = 0,
 #endif
 };
 #endif
@@ -1209,7 +1209,7 @@ const struct stm32_cap_priv_s stm32_tim12_priv =
   .base         = STM32_TIM12_BASE,
   .irq          = STM32_IRQ_TIM12,
 #ifdef USE_ADVENCED_TIM
-  .irg_of       = 0,
+  .irq_of       = 0,
 #endif
 };
 #endif
@@ -1221,7 +1221,7 @@ const struct stm32_cap_priv_s stm32_tim13_priv =
   .base         = STM32_TIM13_BASE,
   .irq          = STM32_IRQ_TIM13,
 #ifdef USE_ADVENCED_TIM
-  .irg_of       = 0,
+  .irq_of       = 0,
 #endif
 };
 #endif
@@ -1233,7 +1233,7 @@ const struct stm32_cap_priv_s stm32_tim14_priv =
   .base         = STM32_TIM14_BASE,
   .irq          = STM32_IRQ_TIM14,
 #ifdef USE_ADVENCED_TIM
-  .irg_of       = 0,
+  .irq_of       = 0,
 #endif
 };
 #endif
diff --git a/arch/arm/src/stm32/stm32_capture.h b/arch/arm/src/stm32/stm32_capture.h
index d015c80e5622edef89c02788888c9d5bf8523464..5c81e77d9c29773685ceaf0e058892ba546287da 100644
--- a/arch/arm/src/stm32/stm32_capture.h
+++ b/arch/arm/src/stm32/stm32_capture.h
@@ -54,7 +54,7 @@
 #define STM32_CAP_SETCLOCK(d,clk_src,psc,max)   ((d)->ops->setclock(d,clk_src,psc,max))
 #define STM32_CAP_SETCHANNEL(d,ch,cfg)          ((d)->ops->setchannel(d,ch,cfg))
 #define STM32_CAP_GETCAPTURE(d,ch)              ((d)->ops->getcapture(d,ch))
-#define STM32_CAP_SETISR(d,hnd)                 ((d)->ops->setisr(d,hnd))
+#define STM32_CAP_SETISR(d,hnd,arg)             ((d)->ops->setisr(d,hnd,arg))
 #define STM32_CAP_ENABLEINT(d,s,on)             ((d)->ops->enableint(d,s,on))
 #define STM32_CAP_ACKFLAGS(d,f)                 ((d)->ops->ackflags(d,f))
 #define STM32_CAP_GETFLAGS(d)                   ((d)->ops->getflags(d))
@@ -178,7 +178,7 @@ struct stm32_cap_ops_s
   int  (*setclock)(  FAR struct stm32_cap_dev_s *dev, stm32_cap_clk_t clk, uint32_t prescaler, uint32_t max);
   int  (*setchannel)(FAR struct stm32_cap_dev_s *dev, uint8_t channel, stm32_cap_ch_cfg_t cfg);
   uint32_t (*getcapture)(FAR struct stm32_cap_dev_s *dev, uint8_t channel);
-  int  (*setisr)(    FAR struct stm32_cap_dev_s *dev, xcpt_t handler); 
+  int  (*setisr)(FAR struct stm32_cap_dev_s *dev, xcpt_t handler, void *arg);
   void (*enableint)( FAR struct stm32_cap_dev_s *dev, stm32_cap_flags_t src, bool on );
   void (*ackflags)(  FAR struct stm32_cap_dev_s *dev, int flags);
   stm32_cap_flags_t (*getflags)(FAR struct stm32_cap_dev_s *dev);
@@ -194,7 +194,7 @@ FAR struct stm32_cap_dev_s *stm32_cap_init(int timer);
 
 /* Power-down timer, mark it as unused */
 
-int stm32_cap_deinit(FAR struct stm32_cap_dev_s * dev);
+int stm32_cap_deinit(FAR struct stm32_cap_dev_s *dev);
 
 #undef EXTERN
 #if defined(__cplusplus)
diff --git a/arch/arm/src/stm32/stm32_ccm.c b/arch/arm/src/stm32/stm32_ccm.c
index c3f72a398eff6c4ed22eb34908222149df0d35cd..cdf7fb8805ba403f47ece456ac8b74bb35f6854d 100644
--- a/arch/arm/src/stm32/stm32_ccm.c
+++ b/arch/arm/src/stm32/stm32_ccm.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/common/stm32_ccm.c
+ * arch/arm/src/stm32/stm32_ccm.c
  *
  *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -62,4 +62,4 @@ struct mm_heap_s g_ccm_heap;
  * Public Function Prototypes
  ****************************************************************************/
 
-#endif /* HAVE_CCM_HEAP */
\ No newline at end of file
+#endif /* HAVE_CCM_HEAP */
diff --git a/arch/arm/src/stm32/stm32_ccm.h b/arch/arm/src/stm32/stm32_ccm.h
index ce441ff7601880e525d076f49731e05329ee8d85..20cc650eee802544468ea31ec8de9d414a268b7f 100644
--- a/arch/arm/src/stm32/stm32_ccm.h
+++ b/arch/arm/src/stm32/stm32_ccm.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/common/stm32_ccm.h
+ * arch/arm/src/stm32/stm32_ccm.h
  *
  *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -58,7 +58,8 @@
 #if defined(CONFIG_STM32_STM32F30XX)
 #  define CCM_START 0x10000000
 #  define CCM_END   0x10002000
-#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
+#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) || \
+      defined(CONFIG_STM32_STM32F33XX)
 #  define CCM_START 0x10000000
 #  define CCM_END   0x10010000
 #else
diff --git a/arch/arm/src/stm32/stm32_dac.c b/arch/arm/src/stm32/stm32_dac.c
index 77213af264971e7cc0b98e923e11f3ba3bad1634..e12c9f65c5f6eecf487e84c81714735b95ff7a17 100644
--- a/arch/arm/src/stm32/stm32_dac.c
+++ b/arch/arm/src/stm32/stm32_dac.c
@@ -94,6 +94,12 @@
 #     undef CONFIG_STM32_DAC1_DMA
 #     undef CONFIG_STM32_DAC2_DMA
 #   endif
+# elif defined(CONFIG_STM32_STM32F33XX)
+#   ifndef CONFIG_STM32_DMA1
+#     warning "STM32 F334 DAC DMA support requires CONFIG_STM32_DMA1"
+#     undef CONFIG_STM32_DAC1_DMA
+#     undef CONFIG_STM32_DAC2_DMA
+#   endif
 # elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
 #   ifndef CONFIG_STM32_DMA1
 #     warning "STM32 F4 DAC DMA support requires CONFIG_STM32_DMA1"
@@ -147,7 +153,8 @@
 #   define DAC_DMA         2
 #   define DAC1_DMA_CHAN   DMACHAN_DAC_CHAN1
 #   define DAC2_DMA_CHAN   DMACHAN_DAC_CHAN2
-# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
+# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) || \
+  defined(CONFIG_STM32_STM32F33XX)
 #   define HAVE_DMA        1
 #   define DAC_DMA         1
 #   define DAC1_DMA_CHAN   DMAMAP_DAC1
@@ -348,7 +355,9 @@ struct stm32_chan_s
   uint8_t    timer;      /* Timer number 2-8 */
 #endif
   uint8_t    intf;       /* DAC zero-based interface number (0 or 1) */
+  uint32_t   pin;        /* Pin configuration */
   uint32_t   dro;        /* Data output register */
+  uint32_t   cr;         /* Control register */
   uint32_t   tsel;       /* CR trigger select value */
 #ifdef HAVE_DMA
   uint16_t   dmachan;    /* DMA channel needed by this DAC */
@@ -373,7 +382,7 @@ static void     tim_putreg(FAR struct stm32_chan_s *chan, int offset,
 /* Interrupt handler */
 
 #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
-static int  dac_interrupt(int irq, FAR void *context);
+static int  dac_interrupt(int irq, FAR void *context, FAR void *arg);
 #endif
 
 /* DAC methods */
@@ -408,10 +417,20 @@ static const struct dac_ops_s g_dacops =
 };
 
 #ifdef CONFIG_STM32_DAC1
+/* Channel 1 */
+
 static struct stm32_chan_s g_dac1priv =
 {
   .intf       = 0,
+#if STM32_NDAC < 2
+  .pin        = GPIO_DAC1_OUT,
   .dro        = STM32_DAC_DHR12R1,
+  .cr         = STM32_DAC_CR,
+#else
+  .pin        = GPIO_DAC1_OUT1,
+  .dro        = STM32_DAC1_DHR12R1,
+  .cr         = STM32_DAC1_CR,
+#endif
 #ifdef CONFIG_STM32_DAC1_DMA
   .hasdma     = 1,
   .dmachan    = DAC1_DMA_CHAN,
@@ -427,13 +446,21 @@ static struct dac_dev_s g_dac1dev =
   .ad_ops  = &g_dacops,
   .ad_priv = &g_dac1priv,
 };
-#endif
 
-#ifdef CONFIG_STM32_DAC2
+/* Channel 2 */
+
 static struct stm32_chan_s g_dac2priv =
 {
   .intf       = 1,
+#if STM32_NDAC < 2
+  .pin        = GPIO_DAC2_OUT,
   .dro        = STM32_DAC_DHR12R2,
+  .cr         = STM32_DAC_CR,
+#else
+  .pin        = GPIO_DAC1_OUT2,
+  .dro        = STM32_DAC1_DHR12R2,
+  .cr         = STM32_DAC1_CR,
+#endif
 #ifdef CONFIG_STM32_DAC2_DMA
   .hasdma     = 1,
   .dmachan    = DAC2_DMA_CHAN,
@@ -451,6 +478,24 @@ static struct dac_dev_s g_dac2dev =
 };
 #endif
 
+#ifdef CONFIG_STM32_DAC2
+/* Channel 3 */
+
+static struct stm32_chan_s g_dac3priv =
+{
+  .intf       = 2,
+  .pin        = GPIO_DAC2_OUT1,
+  .dro        = STM32_DAC2_DHR12R1,
+  .cr         = STM32_DAC2_CR,
+};
+
+static struct dac_dev_s g_dac3dev =
+{
+  .ad_ops  = &g_dacops,
+  .ad_priv = &g_dac3priv,
+};
+#endif
+
 static struct stm32_dac_s g_dacblock;
 
 /****************************************************************************
@@ -476,10 +521,19 @@ static struct stm32_dac_s g_dacblock;
 static inline void stm32_dac_modify_cr(FAR struct stm32_chan_s *chan,
                                        uint32_t clearbits, uint32_t setbits)
 {
-  uint32_t shift;
+  unsigned int shift;
 
-  shift = chan->intf * 16;
-  modifyreg32(STM32_DAC_CR, clearbits << shift, setbits << shift);
+  /* DAC1 channels 1 and 2 share the STM32_DAC[1]_CR control register.  DAC2
+   * channel 1 (and perhaps channel 2) uses the STM32_DAC2_CR control
+   * register.  In either case, bit 0 of the interface number provides the
+   * correct shift.
+   *
+   *   Bit 0 = 0: Shift = 0
+   *   Bit 0 = 1: Shift = 16
+   */
+
+  shift = (chan->intf & 1) << 4;
+  modifyreg32(chan->cr, clearbits << shift, setbits << shift);
 }
 
 /****************************************************************************
@@ -567,7 +621,7 @@ static void tim_modifyreg(FAR struct stm32_chan_s *chan, int offset,
  ****************************************************************************/
 
 #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
-static int dac_interrupt(int irq, FAR void *context)
+static int dac_interrupt(int irq, FAR void *context, FAR void *arg)
 {
 #warning "Missing logic"
   return OK;
@@ -738,16 +792,7 @@ static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg)
       /* Non-DMA transfer */
 
       putreg16(msg->am_data, chan->dro);
-#ifdef CONFIG_STM32_DAC2
-      if (chan->intf)
-        {
-          dac_txdone(&g_dac2dev);
-        }
-      else
-#endif
-        {
-          dac_txdone(&g_dac1dev);
-        }
+      dac_txdone(dev);
     }
 
   /* Reset counters (generate an update) */
@@ -809,7 +854,6 @@ static int dac_timinit(FAR struct stm32_chan_s *chan)
    * default) will be enabled
    */
 
-  pclk    = STM32_TIM27_FREQUENCY;
   regaddr = STM32_RCC_APB1ENR;
 
   switch (chan->timer)
@@ -817,43 +861,49 @@ static int dac_timinit(FAR struct stm32_chan_s *chan)
 #ifdef NEED_TIM2
       case 2:
         setbits = RCC_APB1ENR_TIM2EN;
+        pclk    = BOARD_TIM2_FREQUENCY;
         break;
 #endif
 #ifdef NEED_TIM3
       case 3:
         setbits = RCC_APB1ENR_TIM3EN;
+        pclk    = BOARD_TIM3_FREQUENCY;
         break;
 #endif
 #ifdef NEED_TIM4
       case 4:
         setbits = RCC_APB1ENR_TIM4EN;
+        pclk    = BOARD_TIM4_FREQUENCY;
         break;
 #endif
 #ifdef NEED_TIM5
       case 5:
         setbits = RCC_APB1ENR_TIM5EN;
+        pclk    = BOARD_TIM5_FREQUENCY;
         break;
 #endif
 #ifdef NEED_TIM6
       case 6:
         setbits = RCC_APB1ENR_TIM6EN;
+        pclk    = BOARD_TIM6_FREQUENCY;
         break;
 #endif
 #ifdef NEED_TIM7
       case 7:
         setbits = RCC_APB1ENR_TIM7EN;
+        pclk    = BOARD_TIM7_FREQUENCY;
         break;
 #endif
 #ifdef NEED_TIM8
       case 8:
         regaddr = STM32_RCC_APB2ENR;
         setbits = RCC_APB2ENR_TIM8EN;
-        pclk    = STM32_TIM18_FREQUENCY;
+        pclk    = BOARD_TIM8_FREQUENCY;
         break;
 #endif
       default:
-        adbg("Could not enable timer\n");
-        break;
+        aerr("ERROR: Could not enable timer\n");
+        return -EINVAL;
     }
 
   /* Enable the timer. */
@@ -978,7 +1028,7 @@ static int dac_chaninit(FAR struct stm32_chan_s *chan)
    * should first be configured to analog (AIN)".
    */
 
-  stm32_configgpio(chan->intf ? GPIO_DAC2_OUT : GPIO_DAC1_OUT);
+  stm32_configgpio(chan->pin);
 
   /* DAC channel configuration:
    *
@@ -1016,7 +1066,7 @@ static int dac_chaninit(FAR struct stm32_chan_s *chan)
       chan->dma = stm32_dmachannel(chan->dmachan);
       if (!chan->dma)
         {
-          adbg("Failed to allocate a DMA channel\n");
+          aerr("ERROR: Failed to allocate a DMA channel\n");
           return -EBUSY;
         }
 
@@ -1025,7 +1075,7 @@ static int dac_chaninit(FAR struct stm32_chan_s *chan)
       ret = dac_timinit(chan);
       if (ret < 0)
         {
-          adbg("Failed to initialize the DMA timer: %d\n", ret);
+          aerr("ERROR: Failed to initialize the DMA timer: %d\n", ret);
           return ret;
         }
     }
@@ -1041,7 +1091,7 @@ static int dac_chaninit(FAR struct stm32_chan_s *chan)
  * Name: dac_blockinit
  *
  * Description:
- *   All ioctl calls will be routed through this method.
+ *   Initialize the DAC block.
  *
  * Input Parameters:
  *
@@ -1055,7 +1105,7 @@ static int dac_blockinit(void)
   irqstate_t flags;
   uint32_t regval;
 
-  /* Has the DMA block already been initialized? */
+  /* Has the DAC block already been initialized? */
 
   if (g_dacblock.init)
     {
@@ -1068,12 +1118,30 @@ static int dac_blockinit(void)
 
   flags   = enter_critical_section();
   regval  = getreg32(STM32_RCC_APB1RSTR);
+#if STM32_NDAC < 2
   regval |= RCC_APB1RSTR_DACRST;
+#else
+#ifdef CONFIG_STM32_DAC1
+  regval |= RCC_APB1RSTR_DAC1RST;
+#endif
+#ifdef CONFIG_STM32_DAC2
+  regval |= RCC_APB1RSTR_DAC2RST;
+#endif
+#endif
   putreg32(regval, STM32_RCC_APB1RSTR);
 
   /* Take the DAC out of reset state */
 
+#if STM32_NDAC < 2
   regval &= ~RCC_APB1RSTR_DACRST;
+#else
+#ifdef CONFIG_STM32_DAC1
+  regval &= ~RCC_APB1RSTR_DAC1RST;
+#endif
+#ifdef CONFIG_STM32_DAC2
+  regval &= ~RCC_APB1RSTR_DAC2RST;
+#endif
+#endif
   putreg32(regval, STM32_RCC_APB1RSTR);
   leave_critical_section(flags);
 
@@ -1114,21 +1182,27 @@ FAR struct dac_dev_s *stm32_dacinitialize(int intf)
 #ifdef CONFIG_STM32_DAC1
   if (intf == 1)
     {
-      avdbg("DAC1 Selected\n");
+      ainfo("DAC1-1 Selected\n");
       dev = &g_dac1dev;
     }
   else
-#endif
-#ifdef CONFIG_STM32_DAC2
   if (intf == 2)
     {
-      avdbg("DAC2 Selected\n");
+      ainfo("DAC1-2 Selected\n");
       dev = &g_dac2dev;
     }
   else
+#endif
+#ifdef CONFIG_STM32_DAC2
+  if (intf == 3)
+    {
+      ainfo("DAC2-1 Selected\n");
+      dev = &g_dac3dev;
+    }
+  else
 #endif
     {
-      adbg("No such DAC interface: %d\n", intf);
+      aerr("ERROR: No such DAC interface: %d\n", intf);
       errno = ENODEV;
       return NULL;
     }
@@ -1138,7 +1212,7 @@ FAR struct dac_dev_s *stm32_dacinitialize(int intf)
   ret = dac_blockinit();
   if (ret < 0)
     {
-      adbg("Failed to initialize the DAC block: %d\n", ret);
+      aerr("ERROR: Failed to initialize the DAC block: %d\n", ret);
       errno = -ret;
       return NULL;
     }
@@ -1149,7 +1223,7 @@ FAR struct dac_dev_s *stm32_dacinitialize(int intf)
   ret  = dac_chaninit(chan);
   if (ret < 0)
     {
-      adbg("Failed to initialize DAC channel %d: %d\n", intf, ret);
+      aerr("ERROR: Failed to initialize DAC channel %d: %d\n", intf, ret);
       errno = -ret;
       return NULL;
     }
diff --git a/arch/arm/src/stm32/stm32_dac.h b/arch/arm/src/stm32/stm32_dac.h
index 3718a245a4dce5e7dba38d9f743086e304d1f389..37ba66f0939d4f2d1c3fa09ead80903b8cb8ac85 100644
--- a/arch/arm/src/stm32/stm32_dac.h
+++ b/arch/arm/src/stm32/stm32_dac.h
@@ -43,7 +43,11 @@
 #include 
 
 #include "chip.h"
+#ifdef CONFIG_STM32_STM32F33XX
+#include "chip/stm32f33xxx_dac.h"
+#else
 #include "chip/stm32_dac.h"
+#endif
 
 #include 
 
diff --git a/arch/arm/src/stm32/stm32_dma.c b/arch/arm/src/stm32/stm32_dma.c
index ff7135840e414814c0776f2bbd761fc0974c9ea0..0de9cdcc3b8df55c4bb1985f5ea0ea42a1145367 100644
--- a/arch/arm/src/stm32/stm32_dma.c
+++ b/arch/arm/src/stm32/stm32_dma.c
@@ -56,7 +56,8 @@
  */
 
 #if defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F10XX) || \
-    defined(CONFIG_STM32_STM32F30XX)
+    defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+    defined(CONFIG_STM32_STM32F37XX)
 #  include "stm32f10xxx_dma.c"
 #elif defined(CONFIG_STM32_STM32F20XX)
 #  include "stm32f20xxx_dma.c"
diff --git a/arch/arm/src/stm32/stm32_dma.h b/arch/arm/src/stm32/stm32_dma.h
index b2f968fe1f7c0e6110b1d60cf43f342c17d14d0a..36c21f3ca60dac26256368a80d4b97a7faaa6ad5 100644
--- a/arch/arm/src/stm32/stm32_dma.h
+++ b/arch/arm/src/stm32/stm32_dma.h
@@ -48,7 +48,8 @@
 /* Include the correct DMA register definitions for this STM32 family */
 
 #if defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F10XX) || \
-    defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+    defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+    defined(CONFIG_STM32_STM32F37XX)
 #  include "chip/stm32f10xxx_dma.h"
 #elif defined(CONFIG_STM32_STM32F20XX)
 #  include "chip/stm32f20xxx_dma.h"
@@ -63,7 +64,8 @@
  */
 
 #if defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F10XX) || \
-    defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+    defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+    defined(CONFIG_STM32_STM32F37XX)
 #  define DMA_STATUS_FEIF         0                     /* (Not available in F1) */
 #  define DMA_STATUS_DMEIF        0                     /* (Not available in F1) */
 #  define DMA_STATUS_TEIF         DMA_CHAN_TEIF_BIT     /* Channel Transfer Error */
@@ -104,9 +106,10 @@ typedef FAR void *DMA_HANDLE;
 
 typedef void (*dma_callback_t)(DMA_HANDLE handle, uint8_t status, void *arg);
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 #if defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F10XX) || \
-    defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+    defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+    defined(CONFIG_STM32_STM32F37XX)
 struct stm32_dmaregs_s
 {
   uint32_t isr;
@@ -299,7 +302,7 @@ bool stm32_dmacapable(uintptr_t maddr, uint32_t count, uint32_t ccr);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs);
 #else
 #  define stm32_dmasample(handle,regs)
@@ -316,7 +319,7 @@ void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void stm32_dmadump(DMA_HANDLE handle, const struct stm32_dmaregs_s *regs,
                    const char *msg);
 #else
diff --git a/arch/arm/src/stm32/stm32_dma2d.c b/arch/arm/src/stm32/stm32_dma2d.c
index e951e8916dbeb36546b098a793d07b564ab5af4b..8611ab2c1a3e96eefcc9f9636cf2f84aaec5b094 100644
--- a/arch/arm/src/stm32/stm32_dma2d.c
+++ b/arch/arm/src/stm32/stm32_dma2d.c
@@ -49,8 +49,9 @@
 #include 
 
 #include 
-#include 
 #include 
+#include 
+#include 
 
 #include 
 #include 
@@ -137,11 +138,11 @@
 /* Debug option */
 
 #ifdef CONFIG_STM32_DMA2D_REGDEBUG
-#  define regdbg       dbg
-#  define regvdbg      vdbg
+#  define regerr       lcderr
+#  define reginfo      lcdinfo
 #else
-#  define regdbg(x...)
-#  define regvdbg(x...)
+#  define regerr(x...)
+#  define reginfo(x...)
 #endif
 
 /* check clut support */
@@ -284,7 +285,7 @@ static const uintptr_t stm32_cmar_layer_t[DMA2D_NLAYERS - 1] =
 static int stm32_dma2d_pixelformat(uint8_t fmt, uint8_t *fmtmap);
 static int stm32_dma2d_bpp(uint8_t fmt, uint8_t *bpp);
 static void stm32_dma2d_control(uint32_t setbits, uint32_t clrbits);
-static int stm32_dma2dirq(int irq, void *context);
+static int stm32_dma2dirq(int irq, void *context, FAR void *arg);
 static int stm32_dma2d_waitforirq(void);
 static int stm32_dma2d_start(void);
 #ifdef CONFIG_STM32_DMA2D_L8
@@ -408,7 +409,7 @@ static void stm32_dma2d_control(uint32_t setbits, uint32_t clrbits)
 {
   uint32_t   cr;
 
-  gvdbg("setbits=%08x, clrbits=%08x\n", setbits, clrbits);
+  lcdinfo("setbits=%08x, clrbits=%08x\n", setbits, clrbits);
 
   cr = getreg32(STM32_DMA2D_CR);
   cr &= ~clrbits;
@@ -424,12 +425,12 @@ static void stm32_dma2d_control(uint32_t setbits, uint32_t clrbits)
  *
  ****************************************************************************/
 
-static int stm32_dma2dirq(int irq, void *context)
+static int stm32_dma2dirq(int irq, void *context, FAR void *arg)
 {
   uint32_t regval = getreg32(STM32_DMA2D_ISR);
   FAR struct stm32_interrupt_s *priv = &g_interrupt;
 
-  regvdbg("irq = %d, regval = %08x\n", irq, regval);
+  reginfo("irq = %d, regval = %08x\n", irq, regval);
 
   if (regval & DMA2D_ISR_TCIF)
     {
@@ -469,7 +470,7 @@ static int stm32_dma2dirq(int irq, void *context)
 
       if (ret != OK)
         {
-          dbg("sem_post() failed\n");
+          lcderr("ERROR: sem_post() failed\n");
           return ret;
         }
     }
@@ -512,7 +513,7 @@ static int stm32_dma2d_waitforirq(void)
 
       if (ret != OK)
         {
-          dbg("sem_wait() failed\n");
+          lcderr("ERROR: sem_wait() failed\n");
           return ret;
         }
     }
@@ -558,9 +559,9 @@ static int stm32_dma2d_loadclut(uintptr_t pfcreg)
 
       regval  = getreg32(pfcreg);
       regval |= DMA2D_xGPFCCR_START;
-      regvdbg("set regval=%08x\n", regval);
+      reginfo("set regval=%08x\n", regval);
       putreg32(regval, pfcreg);
-      regvdbg("configured regval=%08x\n", getreg32(pfcreg));
+      reginfo("configured regval=%08x\n", getreg32(pfcreg));
     }
 
   leave_critical_section(flags);
@@ -632,7 +633,7 @@ static uint32_t stm32_dma2d_memaddress(FAR const struct stm32_dma2d_s *layer,
 
   offset = xpos * DMA2D_PF_BYPP(layer->pinfo.bpp) + layer->pinfo.stride * ypos;
 
-  gvdbg("%p\n", ((uint32_t) pinfo->fbmem) + offset);
+  lcdinfo("%p\n", ((uint32_t) pinfo->fbmem) + offset);
   return ((uint32_t) pinfo->fbmem) + offset;
 }
 
@@ -655,7 +656,7 @@ static fb_coord_t stm32_dma2d_lineoffset(FAR const struct stm32_dma2d_s *layer,
 {
   /* offset at the end of each line in the context to the area layer */
 
-  gvdbg("%d\n", layer->vinfo.xres - area->xres);
+  lcdinfo("%d\n", layer->vinfo.xres - area->xres);
   return layer->vinfo.xres - area->xres;
 }
 
@@ -677,7 +678,7 @@ static fb_coord_t stm32_dma2d_lineoffset(FAR const struct stm32_dma2d_s *layer,
 
 static int stm32_dma2d_pixelformat(uint8_t fmt, uint8_t *fmtmap)
 {
-  gvdbg("fmt=%d, fmtmap=%p\n", fmt, fmtmap);
+  lcdinfo("fmt=%d, fmtmap=%p\n", fmt, fmtmap);
 
   /* Map to the controller known format
    *
@@ -711,7 +712,7 @@ static int stm32_dma2d_pixelformat(uint8_t fmt, uint8_t *fmtmap)
         break;
 #endif
       default:
-        gdbg("ERROR: Returning EINVAL\n");
+        lcderr("ERROR: Returning EINVAL\n");
         return -EINVAL;
     }
 
@@ -736,7 +737,7 @@ static int stm32_dma2d_pixelformat(uint8_t fmt, uint8_t *fmtmap)
 
 static int stm32_dma2d_bpp(uint8_t fmt, uint8_t *bpp)
 {
-  gvdbg("fmt=%d, bpp=%p\n", fmt, bpp);
+  lcdinfo("fmt=%d, bpp=%p\n", fmt, bpp);
 
   switch (fmt)
     {
@@ -756,7 +757,7 @@ static int stm32_dma2d_bpp(uint8_t fmt, uint8_t *bpp)
         break;
 #endif
       default:
-        gdbg("ERROR: Returning EINVAL\n");
+        lcderr("ERROR: Returning EINVAL\n");
         return -EINVAL;
     }
 
@@ -937,7 +938,7 @@ static void stm32_dma2d_linit(FAR struct stm32_dma2d_s *layer,
 {
   FAR struct dma2d_layer_s *priv = &layer->dma2d;
 
-  gvdbg("layer=%p, lid=%d, fmt=%02x\n", layer, lid, fmt);
+  lcdinfo("layer=%p, lid=%d, fmt=%02x\n", layer, lid, fmt);
 
   /* initialize the layer interface */
 
@@ -985,8 +986,8 @@ static void stm32_dma2d_lfifo(FAR const struct stm32_dma2d_s *layer, int lid,
                               fb_coord_t xpos, fb_coord_t ypos,
                               FAR const struct ltdc_area_s *area)
 {
-  gvdbg("layer=%p, lid=%d, xpos=%d, ypos=%d, area=%p\n",
-            layer, lid, xpos, ypos, area);
+  lcdinfo("layer=%p, lid=%d, xpos=%d, ypos=%d, area=%p\n",
+           layer, lid, xpos, ypos, area);
 
   putreg32(stm32_dma2d_memaddress(layer, xpos, ypos), stm32_mar_layer_t[lid]);
   putreg32(stm32_dma2d_lineoffset(layer, area), stm32_or_layer_t[lid]);
@@ -1006,7 +1007,7 @@ static void stm32_dma2d_lfifo(FAR const struct stm32_dma2d_s *layer, int lid,
 static void stm32_dma2d_lcolor(FAR const struct stm32_dma2d_s *layer,
                                int lid, uint32_t color)
 {
-  gvdbg("layer=%p, lid=%d, color=%08x\n", layer, lid, color);
+  lcdinfo("layer=%p, lid=%d, color=%08x\n", layer, lid, color);
   putreg32(color, stm32_color_layer_t[lid]);
 }
 
@@ -1027,7 +1028,7 @@ static void stm32_dma2d_llnr(FAR struct stm32_dma2d_s *layer,
 {
   uint32_t nlrreg;
 
-  gvdbg("pixel per line: %d, number of lines: %d\n", area->xres, area->yres);
+  lcdinfo("pixel per line: %d, number of lines: %d\n", area->xres, area->yres);
 
   nlrreg = getreg32(STM32_DMA2D_NLR);
   nlrreg = (DMA2D_NLR_PL(area->xres) | DMA2D_NLR_NL(area->yres));
@@ -1047,7 +1048,7 @@ static void stm32_dma2d_llnr(FAR struct stm32_dma2d_s *layer,
 
 static int stm32_dma2d_loutpfc(FAR const struct stm32_dma2d_s *layer)
 {
-  gvdbg("layer=%p\n", layer);
+  lcdinfo("layer=%p\n", layer);
 
   /* CLUT format isn't supported by the dma2d controller */
 
@@ -1055,8 +1056,8 @@ static int stm32_dma2d_loutpfc(FAR const struct stm32_dma2d_s *layer)
     {
       /* Destination layer doesn't support CLUT output */
 
-      gdbg("ERROR: Returning ENOSYS, "
-            "output to layer with CLUT format not supported.\n");
+      lcderr("ERROR: Returning ENOSYS, "
+             "output to layer with CLUT format not supported.\n");
       return -ENOSYS;
     }
 
@@ -1083,7 +1084,7 @@ static void stm32_dma2d_lpfc(FAR const struct stm32_dma2d_s *layer,
 {
   uint32_t   pfccrreg;
 
-  gvdbg("layer=%p, lid=%d, blendmode=%08x\n", layer, lid, blendmode);
+  lcdinfo("layer=%p, lid=%d, blendmode=%08x\n", layer, lid, blendmode);
 
   /* Set color format */
 
@@ -1172,7 +1173,7 @@ static int stm32_dma2dgetvideoinfo(FAR struct dma2d_layer_s *layer,
 {
   FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer;
 
-  gvdbg("layer=%p, vinfo=%p\n", layer, vinfo);
+  lcdinfo("layer=%p, vinfo=%p\n", layer, vinfo);
 
   if (stm32_dma2d_lvalidate(priv) && vinfo)
     {
@@ -1183,7 +1184,7 @@ static int stm32_dma2dgetvideoinfo(FAR struct dma2d_layer_s *layer,
       return OK;
     }
 
-  gdbg("ERROR: Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -ENOSYS;
 }
 
@@ -1209,7 +1210,7 @@ static int stm32_dma2dgetplaneinfo(FAR struct dma2d_layer_s *layer, int planeno,
 {
   FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer;
 
-  gvdbg("layer=%p, planeno=%d, pinfo=%p\n", layer, planeno, pinfo);
+  lcdinfo("layer=%p, planeno=%d, pinfo=%p\n", layer, planeno, pinfo);
 
   if (stm32_dma2d_lvalidate(priv) && pinfo && planeno == 0)
     {
@@ -1220,7 +1221,7 @@ static int stm32_dma2dgetplaneinfo(FAR struct dma2d_layer_s *layer, int planeno,
       return OK;
     }
 
-  gdbg("ERROR: Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -1244,7 +1245,7 @@ static int stm32_dma2dgetlid(FAR struct dma2d_layer_s *layer, int *lid)
 {
   FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer;
 
-  gvdbg("layer=%p, lid=%p\n", layer, lid);
+  lcdinfo("layer=%p, lid=%p\n", layer, lid);
 
   if (stm32_dma2d_lvalidate(priv) && lid)
     {
@@ -1254,7 +1255,7 @@ static int stm32_dma2dgetlid(FAR struct dma2d_layer_s *layer, int *lid)
       return OK;
     }
 
-  gdbg("ERROR: Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -1282,7 +1283,7 @@ static int stm32_dma2dsetclut(FAR struct dma2d_layer_s *layer,
   int   ret;
   FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer;
 
-  gvdbg("layer=%p, cmap=%p\n", layer, cmap);
+  lcdinfo("layer=%p, cmap=%p\n", layer, cmap);
 
   if (stm32_dma2d_lvalidate(priv) && cmap)
     {
@@ -1320,14 +1321,14 @@ static int stm32_dma2dsetclut(FAR struct dma2d_layer_s *layer,
 
       if (priv->fmt != DMA2D_PF_L8)
         {
-          gdbg("Error: CLUT is not supported for the pixel format: %d\n",
-                    priv->vinfo.fmt);
+          lcderr("ERROR: CLUT is not supported for the pixel format: %d\n",
+                  priv->vinfo.fmt);
           ret = -EINVAL;
         }
       else if (cmap->first >= STM32_DMA2D_NCLUT)
         {
-          gdbg("Error: only %d color table entries supported\n",
-                    STM32_DMA2D_NCLUT);
+          lcderr("ERROR: only %d color table entries supported\n",
+                  STM32_DMA2D_NCLUT);
           ret = -EINVAL;
         }
       else
@@ -1349,7 +1350,7 @@ static int stm32_dma2dsetclut(FAR struct dma2d_layer_s *layer,
               clut888[offset + 1] = cmap->green[n];
               clut888[offset + 2] = cmap->red[n];
 
-              regvdbg("n=%d, red=%02x, green=%02x, blue=%02x\n", n,
+              reginfo("n=%d, red=%02x, green=%02x, blue=%02x\n", n,
                         clut888[offset], clut888[offset + 1],
                         clut888[offset + 2]);
 #else
@@ -1358,7 +1359,7 @@ static int stm32_dma2dsetclut(FAR struct dma2d_layer_s *layer,
                         (uint32_t)DMA2D_CLUT_GREEN(cmap->green[n]) |
                         (uint32_t)DMA2D_CLUT_BLUE(cmap->blue[n]);
 
-              regvdbg("n=%d, alpha=%02x, red=%02x, green=%02x, blue=%02x\n", n,
+              reginfo("n=%d, alpha=%02x, red=%02x, green=%02x, blue=%02x\n", n,
                         DMA2D_CLUT_ALPHA(cmap->alpha[n]),
                         DMA2D_CLUT_RED(cmap->red[n]),
                         DMA2D_CLUT_GREEN(cmap->green[n]),
@@ -1374,7 +1375,7 @@ static int stm32_dma2dsetclut(FAR struct dma2d_layer_s *layer,
       return ret;
     }
 
-  gdbg("ERROR: Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -1401,7 +1402,7 @@ static int stm32_dma2dgetclut(FAR struct dma2d_layer_s *layer,
   int ret;
   FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer;
 
-  gvdbg("layer=%p, cmap=%p\n", layer, cmap);
+  lcdinfo("layer=%p, cmap=%p\n", layer, cmap);
 
   if (stm32_dma2d_lvalidate(priv) && cmap)
     {
@@ -1409,14 +1410,14 @@ static int stm32_dma2dgetclut(FAR struct dma2d_layer_s *layer,
 
       if (priv->fmt != DMA2D_PF_L8)
         {
-          gdbg("Error: CLUT is not supported for the pixel format: %d\n",
-                    priv->vinfo.fmt);
+          lcderr("ERROR: CLUT is not supported for the pixel format: %d\n",
+                  priv->vinfo.fmt);
           ret = -EINVAL;
         }
       else if (cmap->first >= STM32_DMA2D_NCLUT)
         {
-          gdbg("Error: only %d color table entries supported\n",
-                    STM32_DMA2D_NCLUT);
+          lcderr("ERROR: only %d color table entries supported\n",
+                  STM32_DMA2D_NCLUT);
           ret = -EINVAL;
         }
       else
@@ -1438,7 +1439,7 @@ static int stm32_dma2dgetclut(FAR struct dma2d_layer_s *layer,
               cmap->green[n]  = clut888[offset + 1];
               cmap->red[n]    = clut888[offset + 2];
 
-              regvdbg("n=%d, red=%02x, green=%02x, blue=%02x\n", n,
+              reginfo("n=%d, red=%02x, green=%02x, blue=%02x\n", n,
                         clut888[offset], clut888[offset + 1],
                         clut888[offset + 2]);
 #else
@@ -1447,7 +1448,7 @@ static int stm32_dma2dgetclut(FAR struct dma2d_layer_s *layer,
               cmap->green[n]  = (uint8_t)DMA2D_CMAP_GREEN(clut[n]);
               cmap->blue[n]   = (uint8_t)DMA2D_CMAP_BLUE(clut[n]);
 
-              regvdbg("n=%d, alpha=%02x, red=%02x, green=%02x, blue=%02x\n", n,
+              reginfo("n=%d, alpha=%02x, red=%02x, green=%02x, blue=%02x\n", n,
                         DMA2D_CMAP_ALPHA(clut[n]), DMA2D_CMAP_RED(clut[n]),
                         DMA2D_CMAP_GREEN(clut[n]), DMA2D_CMAP_BLUE(clut[n]));
 #endif
@@ -1461,7 +1462,7 @@ static int stm32_dma2dgetclut(FAR struct dma2d_layer_s *layer,
       return ret;
     }
 
-  gdbg("ERROR: Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 #endif
@@ -1491,7 +1492,7 @@ static int stm32_dma2dsetalpha(FAR struct dma2d_layer_s *layer, uint8_t alpha)
 {
   FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer;
 
-  gvdbg("layer=%p, alpha=%02x\n", layer, alpha);
+  lcdinfo("layer=%p, alpha=%02x\n", layer, alpha);
 
   if (stm32_dma2d_lvalidate(priv))
     {
@@ -1502,7 +1503,7 @@ static int stm32_dma2dsetalpha(FAR struct dma2d_layer_s *layer, uint8_t alpha)
       return OK;
     }
 
-  gdbg("ERROR: Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -1526,7 +1527,7 @@ static int stm32_dma2dgetalpha(FAR struct dma2d_layer_s *layer, uint8_t *alpha)
 {
   FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer;
 
-  gvdbg("layer=%p, alpha=%p\n", layer, alpha);
+  lcdinfo("layer=%p, alpha=%p\n", layer, alpha);
 
   if (stm32_dma2d_lvalidate(priv))
     {
@@ -1537,7 +1538,7 @@ static int stm32_dma2dgetalpha(FAR struct dma2d_layer_s *layer, uint8_t *alpha)
       return OK;
     }
 
-  gdbg("ERROR: Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -1577,7 +1578,7 @@ static int stm32_dma2dsetblendmode(FAR struct dma2d_layer_s *layer,
 {
   FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer;
 
-  gvdbg("layer=%p, mode=%08x\n", layer, mode);
+  lcdinfo("layer=%p, mode=%08x\n", layer, mode);
 
   if (stm32_dma2d_lvalidate(priv))
     {
@@ -1588,7 +1589,7 @@ static int stm32_dma2dsetblendmode(FAR struct dma2d_layer_s *layer,
       return OK;
     }
 
-  gdbg("ERROR: Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -1613,7 +1614,7 @@ static int stm32_dma2dgetblendmode(FAR struct dma2d_layer_s *layer,
 {
   FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer;
 
-  gvdbg("layer=%p, mode=%p\n", layer, mode);
+  lcdinfo("layer=%p, mode=%p\n", layer, mode);
 
   if (stm32_dma2d_lvalidate(priv) && mode)
     {
@@ -1624,7 +1625,7 @@ static int stm32_dma2dgetblendmode(FAR struct dma2d_layer_s *layer,
       return OK;
     }
 
-  gdbg("ERROR: Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -1661,8 +1662,8 @@ static int stm32_dma2dblit(FAR struct dma2d_layer_s *dest,
   FAR struct stm32_dma2d_s * destlayer = (FAR struct stm32_dma2d_s *)dest;
   FAR struct stm32_dma2d_s * srclayer = (FAR struct stm32_dma2d_s *)src;
 
-  gvdbg("dest=%p, destxpos=%d, destypos=%d, src=%p, srcarea=%p\n",
-            dest, destxpos, destypos, src, srcarea);
+  lcdinfo("dest=%p, destxpos=%d, destypos=%d, src=%p, srcarea=%p\n",
+           dest, destxpos, destypos, src, srcarea);
 
   if (stm32_dma2d_lvalidatesize(destlayer, destxpos, destypos, srcarea) &&
         stm32_dma2d_lvalidatesize(srclayer, srcarea->xpos,
@@ -1718,7 +1719,7 @@ static int stm32_dma2dblit(FAR struct dma2d_layer_s *dest,
           if (ret != OK)
             {
               ret = -ECANCELED;
-              gdbg("ERROR: Returning ECANCELED\n");
+              lcderr("ERROR: Returning ECANCELED\n");
             }
         }
 
@@ -1727,7 +1728,7 @@ static int stm32_dma2dblit(FAR struct dma2d_layer_s *dest,
   else
     {
       ret = -EINVAL;
-      gdbg("ERROR: Returning EINVAL\n");
+      lcderr("ERROR: Returning EINVAL\n");
     }
 
   return ret;
@@ -1772,10 +1773,10 @@ static int stm32_dma2dblend(FAR struct dma2d_layer_s *dest,
   FAR struct stm32_dma2d_s * forelayer = (FAR struct stm32_dma2d_s *)fore;
   FAR struct stm32_dma2d_s * backlayer = (FAR struct stm32_dma2d_s *)back;
 
-  gvdbg("dest=%p, destxpos=%d, destypos=%d, "
-        "fore=%p, forexpos=%d, foreypos=%d, "
-        "back=%p, backarea=%p\n",
-        dest, destxpos, destypos, fore, forexpos, foreypos, back, backarea);
+  lcdinfo("dest=%p, destxpos=%d, destypos=%d, "
+          "fore=%p, forexpos=%d, foreypos=%d, "
+          "back=%p, backarea=%p\n",
+           dest, destxpos, destypos, fore, forexpos, foreypos, back, backarea);
 
   if (stm32_dma2d_lvalidatesize(destlayer, destxpos, destypos, backarea) &&
         stm32_dma2d_lvalidatesize(forelayer, forexpos, foreypos, backarea) &&
@@ -1832,7 +1833,7 @@ static int stm32_dma2dblend(FAR struct dma2d_layer_s *dest,
           if (ret != OK)
             {
               ret = -ECANCELED;
-              gdbg("ERROR: Returning ECANCELED\n");
+              lcderr("ERROR: Returning ECANCELED\n");
             }
         }
 
@@ -1841,7 +1842,7 @@ static int stm32_dma2dblend(FAR struct dma2d_layer_s *dest,
   else
     {
       ret = -EINVAL;
-      gdbg("ERROR: Returning EINVAL\n");
+      lcderr("ERROR: Returning EINVAL\n");
     }
 
   return ret;
@@ -1874,7 +1875,7 @@ static int stm32_dma2dfillarea(FAR struct dma2d_layer_s *layer,
   int ret;
   FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer;
 
-  gvdbg("layer=%p, area=%p, color=%08x\n", layer, area, color);
+  lcdinfo("layer=%p, area=%p, color=%08x\n", layer, area, color);
 
   if (stm32_dma2d_lvalidatesize(priv, area->xpos, area->ypos, area))
     {
@@ -1912,7 +1913,7 @@ static int stm32_dma2dfillarea(FAR struct dma2d_layer_s *layer,
           if (ret != OK)
             {
               ret = -ECANCELED;
-              gdbg("ERROR: Returning ECANCELED\n");
+              lcderr("ERROR: Returning ECANCELED\n");
             }
         }
 
@@ -1921,7 +1922,7 @@ static int stm32_dma2dfillarea(FAR struct dma2d_layer_s *layer,
   else
     {
       ret = -EINVAL;
-      gdbg("ERROR: Returning EINVAL\n");
+      lcderr("ERROR: Returning EINVAL\n");
     }
 
   return ret;
@@ -1954,7 +1955,7 @@ FAR struct dma2d_layer_s * up_dma2dgetlayer(int lid)
       return &priv->dma2d;
     }
 
-  gdbg("ERROR: EINVAL, Unknown layer identifier\n");
+  lcderr("ERROR: EINVAL, Unknown layer identifier\n");
   errno = EINVAL;
   return NULL;
 }
@@ -1989,7 +1990,7 @@ FAR struct dma2d_layer_s *up_dma2dcreatelayer(fb_coord_t width,
   uint8_t    bpp = 0;
   FAR struct stm32_dma2d_s *layer = NULL;
 
-  gvdbg("width=%d, height=%d, fmt=%02x \n", width, height, fmt);
+  lcdinfo("width=%d, height=%d, fmt=%02x \n", width, height, fmt);
 
   /* Validate if pixel format supported */
 
@@ -2069,19 +2070,20 @@ FAR struct dma2d_layer_s *up_dma2dcreatelayer(fb_coord_t width,
               /* free the layer struture */
 
               kmm_free(layer);
-              gdbg("ERROR: ENOMEM, Unable to allocate layer buffer\n");
+              layer = NULL;
+              lcderr("ERROR: ENOMEM, Unable to allocate layer buffer\n");
               errno = ENOMEM;
             }
         }
       else
         {
-          gdbg("ERROR: ENOMEM, unable to allocate layer structure\n");
+          lcderr("ERROR: ENOMEM, unable to allocate layer structure\n");
           errno = ENOMEM;
         }
     }
   else
     {
-      gdbg("ERROR: EINVAL, no free layer available\n");
+      lcderr("ERROR: EINVAL, no free layer available\n");
       errno = EINVAL;
     }
 
@@ -2148,7 +2150,7 @@ int up_dma2dremovelayer(FAR struct dma2d_layer_s *layer)
 
 int up_dma2dinitialize(void)
 {
-  dbg("Initialize DMA2D driver\n");
+  lcdinfo("Initialize DMA2D driver\n");
 
   if (g_initialized == false)
     {
@@ -2166,9 +2168,13 @@ int up_dma2dinitialize(void)
 
       sem_init(&g_lock, 0, 1);
 
-      /* Initialize the semaphore for interrupt handling */
+      /* Initialize the semaphore for interrupt handling.  This waitsem
+       * semaphore is used for signaling and, hence, should not have
+       * priority inheritance enabled.
+       */
 
       sem_init(g_interrupt.sem, 0, 0);
+      sem_setprotocol(g_interrupt.sem, SEM_PRIO_NONE);
 
 #ifdef CONFIG_STM32_DMA2D_L8
       /* Enable dma2d transfer and clut loading interrupts only */
@@ -2184,7 +2190,7 @@ int up_dma2dinitialize(void)
 
       /* Attach DMA2D interrupt vector */
 
-      (void)irq_attach(g_interrupt.irq, stm32_dma2dirq);
+      (void)irq_attach(g_interrupt.irq, stm32_dma2dirq, NULL);
 
       /* Enable the IRQ at the NVIC */
 
@@ -2265,15 +2271,15 @@ FAR struct dma2d_layer_s * stm32_dma2dinitltdc(FAR struct stm32_ltdc_s *layer)
   uint8_t    fmt = 0;
   FAR struct stm32_ltdc_dma2d_s *priv;
 
-  gvdbg("layer=%p\n", layer);
+  lcdinfo("layer=%p\n", layer);
   DEBUGASSERT(layer && layer->lid >= 0 && layer->lid < DMA2D_SHADOW_LAYER);
 
   ret = stm32_dma2d_pixelformat(layer->vinfo.fmt, &fmt);
 
   if (ret != OK)
     {
-      dbg("Returning -EINVAL, unsupported pixel format: %d\n",
-            layer->vinfo.fmt);
+      lcderr("ERROR: Returning -EINVAL, unsupported pixel format: %d\n",
+             layer->vinfo.fmt);
       errno = -EINVAL;
       return NULL;
     }
diff --git a/arch/arm/src/stm32/stm32_dma2d.h b/arch/arm/src/stm32/stm32_dma2d.h
index 7755ffe39d3653cc94616e0481771f8ac2b7e741..ddaeada7b20e28684c11b7b0868dcbc0bd84945d 100644
--- a/arch/arm/src/stm32/stm32_dma2d.h
+++ b/arch/arm/src/stm32/stm32_dma2d.h
@@ -83,7 +83,7 @@
  *
  ****************************************************************************/
 
-FAR struct dma2d_layer_s * stm32_dma2dinitltdc(FAR struct stm32_ltdc_s *layer);
+FAR struct dma2d_layer_s *stm32_dma2dinitltdc(FAR struct stm32_ltdc_s *layer);
 # endif /* CONFIG_STM32_LTDC_INTERFACE */
 
 #endif /* CONFIG_STM32_DMA2D */
diff --git a/arch/arm/src/stm32/stm32_dumpgpio.c b/arch/arm/src/stm32/stm32_dumpgpio.c
index 77d49ffa084d67a2ce431536d5ca47d79883e39d..2540ffdcbcc6ebcf3409505f93a47ec82366bd9c 100644
--- a/arch/arm/src/stm32/stm32_dumpgpio.c
+++ b/arch/arm/src/stm32/stm32_dumpgpio.c
@@ -39,6 +39,11 @@
 
 #include 
 
+/* Output debug info even if debug output is not selected. */
+
+#undef  CONFIG_DEBUG_INFO
+#define CONFIG_DEBUG_INFO 1
+
 #include 
 #include 
 
@@ -49,14 +54,13 @@
 #include "stm32_gpio.h"
 #include "stm32_rcc.h"
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 /* Port letters for prettier debug output */
 
-#ifdef CONFIG_DEBUG
 static const char g_portchar[STM32_NGPIO_PORTS] =
 {
 #if STM32_NGPIO_PORTS > 11
@@ -87,15 +91,6 @@ static const char g_portchar[STM32_NGPIO_PORTS] =
 #  error "Bad number of GPIOs"
 #endif
 };
-#endif
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
 
 /****************************************************************************
  * Public Functions
@@ -125,110 +120,107 @@ int stm32_dumpgpio(uint32_t pinset, const char *msg)
   flags = enter_critical_section();
 
 #if defined(CONFIG_STM32_STM32F10XX)
-
-  lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
-        g_portchar[port], pinset, base, msg);
+  _info("GPIO%c pinset: %08x base: %08x -- %s\n",
+       g_portchar[port], pinset, base, msg);
 
   if ((getreg32(STM32_RCC_APB2ENR) & RCC_APB2ENR_IOPEN(port)) != 0)
     {
-      lldbg("  CR: %08x %08x IDR: %04x ODR: %04x LCKR: %04x\n",
-            getreg32(base + STM32_GPIO_CRH_OFFSET),
-            getreg32(base + STM32_GPIO_CRL_OFFSET),
-            getreg32(base + STM32_GPIO_IDR_OFFSET),
-            getreg32(base + STM32_GPIO_ODR_OFFSET),
-            getreg32(base + STM32_GPIO_LCKR_OFFSET));
-      lldbg("  EVCR: %02x MAPR: %08x CR: %04x %04x %04x %04x\n",
-            getreg32(STM32_AFIO_EVCR), getreg32(STM32_AFIO_MAPR),
-            getreg32(STM32_AFIO_EXTICR1),
-            getreg32(STM32_AFIO_EXTICR2),
-            getreg32(STM32_AFIO_EXTICR3),
-            getreg32(STM32_AFIO_EXTICR4));
+      _info("  CR: %08x %08x IDR: %04x ODR: %04x LCKR: %04x\n",
+           getreg32(base + STM32_GPIO_CRH_OFFSET),
+           getreg32(base + STM32_GPIO_CRL_OFFSET),
+           getreg32(base + STM32_GPIO_IDR_OFFSET),
+           getreg32(base + STM32_GPIO_ODR_OFFSET),
+           getreg32(base + STM32_GPIO_LCKR_OFFSET));
+      _info("  EVCR: %02x MAPR: %08x CR: %04x %04x %04x %04x\n",
+           getreg32(STM32_AFIO_EVCR), getreg32(STM32_AFIO_MAPR),
+           getreg32(STM32_AFIO_EXTICR1),
+           getreg32(STM32_AFIO_EXTICR2),
+           getreg32(STM32_AFIO_EXTICR3),
+           getreg32(STM32_AFIO_EXTICR4));
     }
   else
     {
-      lldbg("  GPIO%c not enabled: APB2ENR: %08x\n",
-            g_portchar[port], getreg32(STM32_RCC_APB2ENR));
+      _info("  GPIO%c not enabled: APB2ENR: %08x\n",
+          g_portchar[port], getreg32(STM32_RCC_APB2ENR));
     }
 
 #elif defined(CONFIG_STM32_STM32L15XX)
-
   DEBUGASSERT(port < STM32_NGPIO_PORTS);
 
-  lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
+  _info("GPIO%c pinset: %08x base: %08x -- %s\n",
         g_portchar[port], pinset, base, msg);
 
   if ((getreg32(STM32_RCC_AHBENR) & RCC_AHBENR_GPIOEN(port)) != 0)
     {
-      lldbg(" MODE: %08x OTYPE: %04x     OSPEED: %08x PUPDR: %08x\n",
-            getreg32(base + STM32_GPIO_MODER_OFFSET),
-            getreg32(base + STM32_GPIO_OTYPER_OFFSET),
-            getreg32(base + STM32_GPIO_OSPEED_OFFSET),
-            getreg32(base + STM32_GPIO_PUPDR_OFFSET));
-      lldbg("  IDR: %04x       ODR: %04x       BSRR: %08x  LCKR: %04x\n",
-            getreg32(base + STM32_GPIO_IDR_OFFSET),
-            getreg32(base + STM32_GPIO_ODR_OFFSET),
-            getreg32(base + STM32_GPIO_BSRR_OFFSET),
-            getreg32(base + STM32_GPIO_LCKR_OFFSET));
-      lldbg(" AFRH: %08x  AFRL: %08x\n",
-            getreg32(base + STM32_GPIO_AFRH_OFFSET),
-            getreg32(base + STM32_GPIO_AFRL_OFFSET));
+      _info(" MODE: %08x OTYPE: %04x     OSPEED: %08x PUPDR: %08x\n",
+           getreg32(base + STM32_GPIO_MODER_OFFSET),
+           getreg32(base + STM32_GPIO_OTYPER_OFFSET),
+           getreg32(base + STM32_GPIO_OSPEED_OFFSET),
+           getreg32(base + STM32_GPIO_PUPDR_OFFSET));
+      _info("  IDR: %04x       ODR: %04x       BSRR: %08x  LCKR: %04x\n",
+           getreg32(base + STM32_GPIO_IDR_OFFSET),
+           getreg32(base + STM32_GPIO_ODR_OFFSET),
+           getreg32(base + STM32_GPIO_BSRR_OFFSET),
+           getreg32(base + STM32_GPIO_LCKR_OFFSET));
+      _info(" AFRH: %08x  AFRL: %08x\n",
+           getreg32(base + STM32_GPIO_AFRH_OFFSET),
+           getreg32(base + STM32_GPIO_AFRL_OFFSET));
     }
   else
     {
-      lldbg("  GPIO%c not enabled: AHBENR: %08x\n",
+      _info("  GPIO%c not enabled: AHBENR: %08x\n",
             g_portchar[port], getreg32(STM32_RCC_AHBENR));
     }
 
-#elif defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
-
+#elif defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) || \
+      defined(CONFIG_STM32_STM32F33XX)
   DEBUGASSERT(port < STM32_NGPIO_PORTS);
 
-  lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
+  _info("GPIO%c pinset: %08x base: %08x -- %s\n",
         g_portchar[port], pinset, base, msg);
 
   /* GPIOs are always enabled */
 
-  lldbg(" MODE: %08x OTYPE: %04x     OSPEED: %08x PUPDR: %08x\n",
+  _info(" MODE: %08x OTYPE: %04x     OSPEED: %08x PUPDR: %08x\n",
         getreg32(base + STM32_GPIO_MODER_OFFSET),
         getreg32(base + STM32_GPIO_OTYPER_OFFSET),
         getreg32(base + STM32_GPIO_OSPEED_OFFSET),
         getreg32(base + STM32_GPIO_PUPDR_OFFSET));
-  lldbg("  IDR: %04x       ODR: %04x       BSRR: %08x  LCKR: %04x\n",
+  _info("  IDR: %04x       ODR: %04x       BSRR: %08x  LCKR: %04x\n",
         getreg32(base + STM32_GPIO_IDR_OFFSET),
         getreg32(base + STM32_GPIO_ODR_OFFSET),
         getreg32(base + STM32_GPIO_BSRR_OFFSET),
         getreg32(base + STM32_GPIO_LCKR_OFFSET));
-  lldbg(" AFRH: %08x  AFRL: %08x   BRR: %04x\n",
+  _info(" AFRH: %08x  AFRL: %08x   BRR: %04x\n",
         getreg32(base + STM32_GPIO_AFRH_OFFSET),
         getreg32(base + STM32_GPIO_AFRL_OFFSET),
         getreg32(base + STM32_GPIO_BRR_OFFSET));
 
 #elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
-
   DEBUGASSERT(port < STM32_NGPIO_PORTS);
 
-  lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
+  _info("GPIO%c pinset: %08x base: %08x -- %s\n",
         g_portchar[port], pinset, base, msg);
 
   if ((getreg32(STM32_RCC_AHB1ENR) & RCC_AHB1ENR_GPIOEN(port)) != 0)
     {
-      lldbg(" MODE: %08x OTYPE: %04x     OSPEED: %08x PUPDR: %08x\n",
+      _info(" MODE: %08x OTYPE: %04x     OSPEED: %08x PUPDR: %08x\n",
             getreg32(base + STM32_GPIO_MODER_OFFSET),
             getreg32(base + STM32_GPIO_OTYPER_OFFSET),
             getreg32(base + STM32_GPIO_OSPEED_OFFSET),
             getreg32(base + STM32_GPIO_PUPDR_OFFSET));
-      lldbg("  IDR: %04x       ODR: %04x       BSRR: %08x  LCKR: %04x\n",
+      _info("  IDR: %04x       ODR: %04x       BSRR: %08x  LCKR: %04x\n",
             getreg32(base + STM32_GPIO_IDR_OFFSET),
             getreg32(base + STM32_GPIO_ODR_OFFSET),
             getreg32(base + STM32_GPIO_BSRR_OFFSET),
             getreg32(base + STM32_GPIO_LCKR_OFFSET));
-      lldbg(" AFRH: %08x  AFRL: %08x\n",
+      _info(" AFRH: %08x  AFRL: %08x\n",
             getreg32(base + STM32_GPIO_AFRH_OFFSET),
             getreg32(base + STM32_GPIO_AFRL_OFFSET));
     }
   else
     {
-      lldbg("  GPIO%c not enabled: AHB1ENR: %08x\n",
+      _info("  GPIO%c not enabled: AHB1ENR: %08x\n",
             g_portchar[port], getreg32(STM32_RCC_AHB1ENR));
     }
 #else
@@ -238,4 +230,4 @@ int stm32_dumpgpio(uint32_t pinset, const char *msg)
   return OK;
 }
 
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_FEATURES */
diff --git a/arch/arm/src/stm32/stm32_eth.c b/arch/arm/src/stm32/stm32_eth.c
index c7a4abc044cdbc5a61243b292e2a09308fca92f5..7703a9a745e803e3e95aafa6cdbd169c2c5195f1 100644
--- a/arch/arm/src/stm32/stm32_eth.c
+++ b/arch/arm/src/stm32/stm32_eth.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32/stm32_eth.c
  *
- *   Copyright (C) 2011-2012, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2014, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -53,14 +53,11 @@
 #include 
 #include 
 #include 
-
-#ifdef CONFIG_NET_NOINTS
-#  include 
-#endif
-
+#include 
 #include 
 #include 
 #include 
+
 #if defined(CONFIG_NET_PKT)
 #  include 
 #endif
@@ -93,12 +90,23 @@
 #  error "Logic to support multiple Ethernet interfaces is incomplete"
 #endif
 
-/* If processing is not done at the interrupt level, then high priority
- * work queue support is required.
+/* If processing is not done at the interrupt level, then work queue support
+ * is required.
  */
 
-#if defined(CONFIG_NET_NOINTS) && !defined(CONFIG_SCHED_HPWORK)
-#  error High priority work queue support is required
+#if !defined(CONFIG_SCHED_WORKQUEUE)
+#  error Work queue support is required
+#else
+
+  /* Select work queue */
+
+#  if defined(CONFIG_STM32_ETHMAC_HPWORK)
+#    define ETHWORK HPWORK
+#  elif defined(CONFIG_STM32_ETHMAC_LPWORK)
+#    define ETHWORK LPWORK
+#  else
+#    error Neither CONFIG_STM32_ETHMAC_HPWORK nor CONFIG_STM32_ETHMAC_LPWORK defined
+#  endif
 #endif
 
 #if !defined(CONFIG_STM32_SYSCFG) && !defined(CONFIG_STM32_CONNECTIVITYLINE)
@@ -195,12 +203,6 @@
 #undef CONFIG_STM32_ETH_ENHANCEDDESC
 #undef CONFIG_STM32_ETH_HWCHECKSUM
 
-/* Ethernet buffer sizes, number of buffers, and number of descriptors */
-
-#ifndef CONFIG_NET_MULTIBUFFER
-#  error "CONFIG_NET_MULTIBUFFER is required"
-#endif
-
 /* Add 4 to the configured buffer size to account for the 2 byte checksum
  * memory needed at the end of the maximum size packet.  Buffer sizes must
  * be an even multiple of 4, 8, or 16 bytes (depending on buswidth).  We
@@ -240,7 +242,7 @@
  * enabled.
  */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_NET_INFO
 #  undef CONFIG_STM32_ETHMAC_REGDEBUG
 #endif
 
@@ -581,9 +583,8 @@ struct stm32_ethmac_s
   uint8_t              fduplex : 1; /* Full (vs. half) duplex */
   WDOG_ID              txpoll;      /* TX poll timer */
   WDOG_ID              txtimeout;   /* TX timeout timer */
-#ifdef CONFIG_NET_NOINTS
-  struct work_s        work;        /* For deferring work to the work queue */
-#endif
+  struct work_s        irqwork;     /* For deferring interrupt work to the work queue */
+  struct work_s        pollwork;    /* For deferring poll work to the work queue */
 
   /* This holds the information visible to the NuttX network */
 
@@ -622,7 +623,7 @@ static struct stm32_ethmac_s g_stm32ethmac[STM32_NETHERNET];
  ****************************************************************************/
 /* Register operations ******************************************************/
 
-#if defined(CONFIG_STM32_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
 static uint32_t stm32_getreg(uint32_t addr);
 static void stm32_putreg(uint32_t val, uint32_t addr);
 static void stm32_checksetup(void);
@@ -656,34 +657,26 @@ static int  stm32_recvframe(FAR struct stm32_ethmac_s *priv);
 static void stm32_receive(FAR struct stm32_ethmac_s *priv);
 static void stm32_freeframe(FAR struct stm32_ethmac_s *priv);
 static void stm32_txdone(FAR struct stm32_ethmac_s *priv);
-#ifdef CONFIG_NET_NOINTS
+
 static void stm32_interrupt_work(FAR void *arg);
-#endif
-static int  stm32_interrupt(int irq, FAR void *context);
+static int  stm32_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
-static inline void stm32_txtimeout_process(FAR struct stm32_ethmac_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void stm32_txtimeout_work(FAR void *arg);
-#endif
 static void stm32_txtimeout_expiry(int argc, uint32_t arg, ...);
 
-static inline void stm32_poll_process(FAR struct stm32_ethmac_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void stm32_poll_work(FAR void *arg);
-#endif
 static void stm32_poll_expiry(int argc, uint32_t arg, ...);
 
 /* NuttX callback functions */
 
 static int  stm32_ifup(struct net_driver_s *dev);
 static int  stm32_ifdown(struct net_driver_s *dev);
-static inline void stm32_txavail_process(FAR struct stm32_ethmac_s *priv);
-#ifdef CONFIG_NET_NOINTS
+
 static void stm32_txavail_work(FAR void *arg);
-#endif
 static int  stm32_txavail(struct net_driver_s *dev);
+
 #if defined(CONFIG_NET_IGMP) || defined(CONFIG_NET_ICMPv6)
 static int  stm32_addmac(struct net_driver_s *dev, FAR const uint8_t *mac);
 #endif
@@ -704,7 +697,10 @@ static void stm32_rxdescinit(FAR struct stm32_ethmac_s *priv);
 #if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
 static int  stm32_phyintenable(FAR struct stm32_ethmac_s *priv);
 #endif
+#if defined(CONFIG_STM32_AUTONEG) || defined(CONFIG_NETDEV_PHY_IOCTL) || \
+    defined(CONFIG_ETH0_PHY_DM9161)
 static int  stm32_phyread(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t *value);
+#endif
 static int  stm32_phywrite(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t value);
 #ifdef CONFIG_ETH0_PHY_DM9161
 static inline int stm32_dm9161(FAR struct stm32_ethmac_s *priv);
@@ -748,7 +744,7 @@ static int  stm32_ethconfig(FAR struct stm32_ethmac_s *priv);
  *
  ****************************************************************************/
 
-#if defined(CONFIG_STM32_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32_ETHMAC_REGDEBUG
 static uint32_t stm32_getreg(uint32_t addr)
 {
   static uint32_t prevaddr = 0;
@@ -769,7 +765,7 @@ static uint32_t stm32_getreg(uint32_t addr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              ninfo("...\n");
             }
 
           return val;
@@ -786,7 +782,7 @@ static uint32_t stm32_getreg(uint32_t addr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          ninfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -798,7 +794,7 @@ static uint32_t stm32_getreg(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%08x\n", addr, val);
+  ninfo("%08x->%08x\n", addr, val);
   return val;
 }
 #endif
@@ -820,12 +816,12 @@ static uint32_t stm32_getreg(uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_STM32_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
 static void stm32_putreg(uint32_t val, uint32_t addr)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", addr, val);
+  ninfo("%08x<-%08x\n", addr, val);
 
   /* Write the value */
 
@@ -847,7 +843,7 @@ static void stm32_putreg(uint32_t val, uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_STM32_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32_ETHMAC_REGDEBUG
 static void stm32_checksetup(void)
 {
 }
@@ -1012,8 +1008,8 @@ static int stm32_transmit(FAR struct stm32_ethmac_s *priv)
   txdesc  = priv->txhead;
   txfirst = txdesc;
 
-  nllvdbg("d_len: %d d_buf: %p txhead: %p tdes0: %08x\n",
-          priv->dev.d_len, priv->dev.d_buf, txdesc, txdesc->tdes0);
+  ninfo("d_len: %d d_buf: %p txhead: %p tdes0: %08x\n",
+        priv->dev.d_len, priv->dev.d_buf, txdesc, txdesc->tdes0);
 
   DEBUGASSERT(txdesc && (txdesc->tdes0 & ETH_TDES0_OWN) == 0);
 
@@ -1029,7 +1025,7 @@ static int stm32_transmit(FAR struct stm32_ethmac_s *priv)
       bufcount = (priv->dev.d_len + (CONFIG_STM32_ETH_BUFSIZE-1)) / CONFIG_STM32_ETH_BUFSIZE;
       lastsize = priv->dev.d_len - (bufcount - 1) * CONFIG_STM32_ETH_BUFSIZE;
 
-      nllvdbg("bufcount: %d lastsize: %d\n", bufcount, lastsize);
+      ninfo("bufcount: %d lastsize: %d\n", bufcount, lastsize);
 
       /* Set the first segment bit in the first TX descriptor */
 
@@ -1139,8 +1135,8 @@ static int stm32_transmit(FAR struct stm32_ethmac_s *priv)
 
   priv->inflight++;
 
-  nllvdbg("txhead: %p txtail: %p inflight: %d\n",
-          priv->txhead, priv->txtail, priv->inflight);
+  ninfo("txhead: %p txtail: %p inflight: %d\n",
+        priv->txhead, priv->txtail, priv->inflight);
 
   /* If all TX descriptors are in-flight, then we have to disable receive interrupts
    * too.  This is because receive events can trigger more un-stoppable transmit
@@ -1438,7 +1434,7 @@ static void stm32_freesegment(FAR struct stm32_ethmac_s *priv,
   struct eth_rxdesc_s *rxdesc;
   int i;
 
-  nllvdbg("rxfirst: %p segments: %d\n", rxfirst, segments);
+  ninfo("rxfirst: %p segments: %d\n", rxfirst, segments);
 
   /* Set OWN bit in RX descriptors.  This gives the buffers back to DMA */
 
@@ -1496,8 +1492,8 @@ static int stm32_recvframe(FAR struct stm32_ethmac_s *priv)
   uint8_t *buffer;
   int i;
 
-  nllvdbg("rxhead: %p rxcurr: %p segments: %d\n",
-          priv->rxhead, priv->rxcurr, priv->segments);
+  ninfo("rxhead: %p rxcurr: %p segments: %d\n",
+        priv->rxhead, priv->rxcurr, priv->segments);
 
   /* Check if there are free buffers.  We cannot receive new frames in this
    * design unless there is at least one free buffer.
@@ -1505,7 +1501,7 @@ static int stm32_recvframe(FAR struct stm32_ethmac_s *priv)
 
   if (!stm32_isfreebuffer(priv))
     {
-      nlldbg("No free buffers\n");
+      nerr("ERROR: No free buffers\n");
       return -ENOMEM;
     }
 
@@ -1562,7 +1558,7 @@ static int stm32_recvframe(FAR struct stm32_ethmac_s *priv)
               rxcurr = priv->rxcurr;
             }
 
-          nllvdbg("rxhead: %p rxcurr: %p segments: %d\n",
+          ninfo("rxhead: %p rxcurr: %p segments: %d\n",
               priv->rxhead, priv->rxcurr, priv->segments);
 
           /* Check if any errors are reported in the frame */
@@ -1601,8 +1597,8 @@ static int stm32_recvframe(FAR struct stm32_ethmac_s *priv)
               priv->rxhead   = (struct eth_rxdesc_s *)rxdesc->rdes3;
               stm32_freesegment(priv, rxcurr, priv->segments);
 
-              nllvdbg("rxhead: %p d_buf: %p d_len: %d\n",
-                      priv->rxhead, dev->d_buf, dev->d_len);
+              ninfo("rxhead: %p d_buf: %p d_len: %d\n",
+                    priv->rxhead, dev->d_buf, dev->d_len);
 
               return OK;
             }
@@ -1612,7 +1608,7 @@ static int stm32_recvframe(FAR struct stm32_ethmac_s *priv)
                * scanning logic, and continue scanning with the next frame.
                */
 
-              nlldbg("DROPPED: RX descriptor errors: %08x\n", rxdesc->rdes0);
+              nerr("ERROR: Dropped, RX descriptor errors: %08x\n", rxdesc->rdes0);
               stm32_freesegment(priv, rxcurr, priv->segments);
             }
         }
@@ -1628,8 +1624,8 @@ static int stm32_recvframe(FAR struct stm32_ethmac_s *priv)
 
   priv->rxhead = rxdesc;
 
-  nllvdbg("rxhead: %p rxcurr: %p segments: %d\n",
-          priv->rxhead, priv->rxcurr, priv->segments);
+  ninfo("rxhead: %p rxcurr: %p segments: %d\n",
+        priv->rxhead, priv->rxcurr, priv->segments);
 
   return -EAGAIN;
 }
@@ -1673,7 +1669,7 @@ static void stm32_receive(FAR struct stm32_ethmac_s *priv)
 
       if (dev->d_len > CONFIG_NET_ETH_MTU)
         {
-          nlldbg("DROPPED: Too big: %d\n", dev->d_len);
+          nerr("ERROR: Dropped, Too big: %d\n", dev->d_len);
 
           /* Free dropped packet buffer */
 
@@ -1687,18 +1683,12 @@ static void stm32_receive(FAR struct stm32_ethmac_s *priv)
           continue;
         }
 
-#ifdef CONFIG_NET_PKT
-  /* When packet sockets are enabled, feed the frame into the packet tap */
-
-   pkt_input(&priv->dev);
-#endif
-
       /* We only accept IP packets of the configured type and ARP packets */
 
 #ifdef CONFIG_NET_IPv4
       if (BUF->type == HTONS(ETHTYPE_IP))
         {
-          nllvdbg("IPv4 frame\n");
+          ninfo("IPv4 frame\n");
 
           /* Handle ARP on input then give the IPv4 packet to the network
            * layer
@@ -1738,7 +1728,7 @@ static void stm32_receive(FAR struct stm32_ethmac_s *priv)
 #ifdef CONFIG_NET_IPv6
       if (BUF->type == HTONS(ETHTYPE_IP6))
         {
-          nllvdbg("Iv6 frame\n");
+          ninfo("Iv6 frame\n");
 
           /* Give the IPv6 packet to the network layer */
 
@@ -1775,7 +1765,7 @@ static void stm32_receive(FAR struct stm32_ethmac_s *priv)
 #ifdef CONFIG_NET_ARP
       if (BUF->type == htons(ETHTYPE_ARP))
         {
-          nllvdbg("ARP frame\n");
+          ninfo("ARP frame\n");
 
           /* Handle ARP packet */
 
@@ -1793,7 +1783,7 @@ static void stm32_receive(FAR struct stm32_ethmac_s *priv)
       else
 #endif
         {
-          nlldbg("DROPPED: Unknown type: %04x\n", BUF->type);
+          nerr("ERROR: Dropped, Unknown type: %04x\n", BUF->type);
         }
 
       /* We are finished with the RX buffer.  NOTE:  If the buffer is
@@ -1834,8 +1824,8 @@ static void stm32_freeframe(FAR struct stm32_ethmac_s *priv)
   struct eth_txdesc_s *txdesc;
   int i;
 
-  nllvdbg("txhead: %p txtail: %p inflight: %d\n",
-          priv->txhead, priv->txtail, priv->inflight);
+  ninfo("txhead: %p txtail: %p inflight: %d\n",
+        priv->txhead, priv->txtail, priv->inflight);
 
   /* Scan for "in-flight" descriptors owned by the CPU */
 
@@ -1850,8 +1840,8 @@ static void stm32_freeframe(FAR struct stm32_ethmac_s *priv)
            * TX descriptors.
            */
 
-          nllvdbg("txtail: %p tdes0: %08x tdes2: %08x tdes3: %08x\n",
-                  txdesc, txdesc->tdes0, txdesc->tdes2, txdesc->tdes3);
+          ninfo("txtail: %p tdes0: %08x tdes2: %08x tdes3: %08x\n",
+                txdesc, txdesc->tdes0, txdesc->tdes2, txdesc->tdes3);
 
           DEBUGASSERT(txdesc->tdes2 != 0);
 
@@ -1903,8 +1893,8 @@ static void stm32_freeframe(FAR struct stm32_ethmac_s *priv)
 
       priv->txtail = txdesc;
 
-      nllvdbg("txhead: %p txtail: %p inflight: %d\n",
-              priv->txhead, priv->txtail, priv->inflight);
+      ninfo("txhead: %p txtail: %p inflight: %d\n",
+            priv->txhead, priv->txtail, priv->inflight);
     }
 }
 
@@ -1942,14 +1932,6 @@ static void stm32_txdone(FAR struct stm32_ethmac_s *priv)
 
       wd_cancel(priv->txtimeout);
 
-      /* Then make sure that the TX poll timer is running (if it is already
-       * running, the following would restart it).  This is necessary to
-       * avoid certain race conditions where the polling sequence can be
-       * interrupted.
-       */
-
-      (void)wd_start(priv->txpoll, STM32_WDDELAY, stm32_poll_expiry, 1, priv);
-
       /* And disable further TX interrupts. */
 
       stm32_disableint(priv, ETH_DMAINT_TI);
@@ -1961,27 +1943,33 @@ static void stm32_txdone(FAR struct stm32_ethmac_s *priv)
 }
 
 /****************************************************************************
- * Function: stm32_interrupt_process
+ * Function: stm32_interrupt_work
  *
  * Description:
- *   Interrupt processing.  This may be performed either within the interrupt
- *   handler or on the worker thread, depending upon the configuration
+ *   Perform interrupt related work from the worker thread
  *
  * Parameters:
- *   priv  - Reference to the driver state structure
+ *   arg - The argument passed when work_queue() was called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
  *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static inline void stm32_interrupt_process(FAR struct stm32_ethmac_s *priv)
+static void stm32_interrupt_work(FAR void *arg)
 {
+  FAR struct stm32_ethmac_s *priv = (FAR struct stm32_ethmac_s *)arg;
   uint32_t dmasr;
 
+  DEBUGASSERT(priv);
+
+  /* Process pending Ethernet interrupts */
+
+  net_lock();
+
   /* Get the DMA interrupt status bits (no MAC interrupts are expected) */
 
   dmasr = stm32_getreg(STM32_ETH_DMASR);
@@ -2042,7 +2030,7 @@ static inline void stm32_interrupt_process(FAR struct stm32_ethmac_s *priv)
     {
       /* Just let the user know what happened */
 
-      nlldbg("Abormal event(s): %08x\n", dmasr);
+      nerr("ERROR: Abormal event(s): %08x\n", dmasr);
 
       /* Clear all pending abnormal events */
 
@@ -2053,44 +2041,13 @@ static inline void stm32_interrupt_process(FAR struct stm32_ethmac_s *priv)
       stm32_putreg(ETH_DMAINT_AIS, STM32_ETH_DMASR);
     }
 #endif
-}
 
-/****************************************************************************
- * Function: stm32_interrupt_work
- *
- * Description:
- *   Perform interrupt related work from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() was called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void stm32_interrupt_work(FAR void *arg)
-{
-  FAR struct stm32_ethmac_s *priv = (FAR struct stm32_ethmac_s *)arg;
-  net_lock_t state;
-
-  DEBUGASSERT(priv);
-
-  /* Process pending Ethernet interrupts */
-
-  state = net_lock();
-  stm32_interrupt_process(priv);
-  net_unlock(state);
+  net_unlock();
 
   /* Re-enable Ethernet interrupts at the NVIC */
 
   up_enable_irq(STM32_IRQ_ETH);
 }
-#endif
 
 /****************************************************************************
  * Function: stm32_interrupt
@@ -2109,11 +2066,9 @@ static void stm32_interrupt_work(FAR void *arg)
  *
  ****************************************************************************/
 
-static int stm32_interrupt(int irq, FAR void *context)
+static int stm32_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   FAR struct stm32_ethmac_s *priv = &g_stm32ethmac[0];
-
-#ifdef CONFIG_NET_NOINTS
   uint32_t dmasr;
 
   /* Get the DMA interrupt status bits (no MAC interrupts are expected) */
@@ -2140,58 +2095,14 @@ static int stm32_interrupt(int irq, FAR void *context)
            wd_cancel(priv->txtimeout);
         }
 
-      /* Cancel any pending poll work */
-
-      work_cancel(HPWORK, &priv->work);
-
       /* Schedule to perform the interrupt processing on the worker thread. */
 
-      work_queue(HPWORK, &priv->work, stm32_interrupt_work, priv, 0);
+      work_queue(ETHWORK, &priv->irqwork, stm32_interrupt_work, priv, 0);
     }
 
-#else
-  /* Process the interrupt now */
-
-  stm32_interrupt_process(priv);
-#endif
-
   return OK;
 }
 
-/****************************************************************************
- * Function: stm32_txtimeout_process
- *
- * Description:
- *   Process a TX timeout.  Called from the either the watchdog timer
- *   expiration logic or from the worker thread, depending upon the
- *   configuration.  The timeout means that the last TX never completed.
- *   Reset the hardware and start again.
- *
- * Parameters:
- *   priv  - Reference to the driver state structure
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Global interrupts are disabled by the watchdog logic.
- *
- ****************************************************************************/
-
-static inline void stm32_txtimeout_process(FAR struct stm32_ethmac_s *priv)
-{
-  /* Then reset the hardware.  Just take the interface down, then back
-   * up again.
-   */
-
-  stm32_ifdown(&priv->dev);
-  stm32_ifup(&priv->dev);
-
-  /* Then poll for new XMIT data */
-
-  stm32_dopoll(priv);
-}
-
 /****************************************************************************
  * Function: stm32_txtimeout_work
  *
@@ -2209,19 +2120,21 @@ static inline void stm32_txtimeout_process(FAR struct stm32_ethmac_s *priv)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_NET_NOINTS
 static void stm32_txtimeout_work(FAR void *arg)
 {
   FAR struct stm32_ethmac_s *priv = (FAR struct stm32_ethmac_s *)arg;
-  net_lock_t state;
 
-  /* Process pending Ethernet interrupts */
+  /* Reset the hardware.  Just take the interface down, then back up again. */
+
+  net_lock();
+  stm32_ifdown(&priv->dev);
+  stm32_ifup(&priv->dev);
+
+  /* Then poll for new XMIT data */
 
-  state = net_lock();
-  stm32_txtimeout_process(priv);
-  net_unlock(state);
+  stm32_dopoll(priv);
+  net_unlock();
 }
-#endif
 
 /****************************************************************************
  * Function: stm32_txtimeout_expiry
@@ -2246,9 +2159,8 @@ static void stm32_txtimeout_expiry(int argc, uint32_t arg, ...)
 {
   FAR struct stm32_ethmac_s *priv = (FAR struct stm32_ethmac_s *)arg;
 
-  nlldbg("Timeout!\n");
+  nerr("ERROR: Timeout!\n");
 
-#ifdef CONFIG_NET_NOINTS
   /* Disable further Ethernet interrupts.  This will prevent some race
    * conditions with interrupt work.  There is still a potential race
    * condition with interrupt work that is already queued and in progress.
@@ -2258,42 +2170,33 @@ static void stm32_txtimeout_expiry(int argc, uint32_t arg, ...)
 
   up_disable_irq(STM32_IRQ_ETH);
 
-  /* Cancel any pending poll or interrupt work.  This will have no effect
-   * on work that has already been started.
+  /* Schedule to perform the TX timeout processing on the worker thread,
+   * perhaps canceling any pending IRQ processing.
    */
 
-  work_cancel(HPWORK, &priv->work);
-
-  /* Schedule to perform the TX timeout processing on the worker thread. */
-
-  work_queue(HPWORK, &priv->work, stm32_txtimeout_work, priv, 0);
-
-#else
-  /* Process the timeout now */
-
-  stm32_txtimeout_process(priv);
-#endif
+  work_queue(ETHWORK, &priv->irqwork, stm32_txtimeout_work, priv, 0);
 }
 
 /****************************************************************************
- * Function: stm32_poll_process
+ * Function: stm32_poll_work
  *
  * Description:
- *   Perform the periodic poll.  This may be called either from watchdog
- *   timer logic or from the worker thread, depending upon the configuration.
+ *   Perform periodic polling from the worker thread
  *
  * Parameters:
- *   priv  - Reference to the driver state structure
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
+ *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static inline void stm32_poll_process(FAR struct stm32_ethmac_s *priv)
+static void stm32_poll_work(FAR void *arg)
 {
+  FAR struct stm32_ethmac_s *priv = (FAR struct stm32_ethmac_s *)arg;
   FAR struct net_driver_s *dev  = &priv->dev;
 
   /* Check if the next TX descriptor is owned by the Ethernet DMA or CPU.  We
@@ -2307,6 +2210,7 @@ static inline void stm32_poll_process(FAR struct stm32_ethmac_s *priv)
    * CONFIG_STM32_ETH_NTXDESC).
    */
 
+  net_lock();
   if ((priv->txhead->tdes0 & ETH_TDES0_OWN) == 0 &&
        priv->txhead->tdes2 == 0)
     {
@@ -2342,39 +2246,9 @@ static inline void stm32_poll_process(FAR struct stm32_ethmac_s *priv)
   /* Setup the watchdog poll timer again */
 
   (void)wd_start(priv->txpoll, STM32_WDDELAY, stm32_poll_expiry, 1, priv);
+  net_unlock();
 }
 
-/****************************************************************************
- * Function: stm32_poll_work
- *
- * Description:
- *   Perform periodic polling from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() as called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void stm32_poll_work(FAR void *arg)
-{
-  FAR struct stm32_ethmac_s *priv = (FAR struct stm32_ethmac_s *)arg;
-  net_lock_t state;
-
-  /* Perform the poll */
-
-  state = net_lock();
-  stm32_poll_process(priv);
-  net_unlock(state);
-}
-#endif
-
 /****************************************************************************
  * Function: stm32_poll_expiry
  *
@@ -2397,31 +2271,9 @@ static void stm32_poll_expiry(int argc, uint32_t arg, ...)
 {
   FAR struct stm32_ethmac_s *priv = (FAR struct stm32_ethmac_s *)arg;
 
-#ifdef CONFIG_NET_NOINTS
-  /* Is our single work structure available?  It may not be if there are
-   * pending interrupt actions.
-   */
-
-  if (work_available(&priv->work))
-    {
-      /* Schedule to perform the interrupt processing on the worker thread. */
-
-      work_queue(HPWORK, &priv->work, stm32_poll_work, priv, 0);
-    }
-  else
-    {
-      /* No.. Just re-start the watchdog poll timer, missing one polling
-       * cycle.
-       */
-
-      (void)wd_start(priv->txpoll, STM32_WDDELAY, stm32_poll_expiry, 1, (uint32_t)priv);
-    }
-
-#else
-  /* Process the interrupt now */
+  /* Schedule to perform the interrupt processing on the worker thread. */
 
-  stm32_poll_process(priv);
-#endif
+  work_queue(ETHWORK, &priv->pollwork, stm32_poll_work, priv, 0);
 }
 
 /****************************************************************************
@@ -2447,15 +2299,15 @@ static int stm32_ifup(struct net_driver_s *dev)
   int ret;
 
 #ifdef CONFIG_NET_IPv4
-  ndbg("Bringing up: %d.%d.%d.%d\n",
-       dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 #endif
 #ifdef CONFIG_NET_IPv6
-  ndbg("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
-       dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
-       dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
-       dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
+  ninfo("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+        dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
+        dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
+        dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
 #endif
 
   /* Configure the Ethernet interface for DMA operation. */
@@ -2500,7 +2352,7 @@ static int stm32_ifdown(struct net_driver_s *dev)
   FAR struct stm32_ethmac_s *priv = (FAR struct stm32_ethmac_s *)dev->d_private;
   irqstate_t flags;
 
-  ndbg("Taking the network down\n");
+  ninfo("Taking the network down\n");
 
   /* Disable the Ethernet interrupt */
 
@@ -2527,66 +2379,40 @@ static int stm32_ifdown(struct net_driver_s *dev)
 }
 
 /****************************************************************************
- * Function: stm32_txavail_process
+ * Function: stm32_txavail_work
  *
  * Description:
- *   Perform an out-of-cycle poll.
+ *   Perform an out-of-cycle poll on the worker thread.
  *
  * Parameters:
- *   priv - Reference to the NuttX driver state structure
+ *   arg  - Reference to the NuttX driver state structure (cast to void*)
  *
  * Returned Value:
  *   None
  *
  * Assumptions:
- *   Called in normal user mode
+ *   Called on the higher priority worker thread.
  *
  ****************************************************************************/
 
-static inline void stm32_txavail_process(FAR struct stm32_ethmac_s *priv)
+static void stm32_txavail_work(FAR void *arg)
 {
-  nvdbg("ifup: %d\n", priv->ifup);
+  FAR struct stm32_ethmac_s *priv = (FAR struct stm32_ethmac_s *)arg;
+
+  ninfo("ifup: %d\n", priv->ifup);
 
   /* Ignore the notification if the interface is not yet up */
 
+  net_lock();
   if (priv->ifup)
     {
       /* Poll the network for new XMIT data */
 
       stm32_dopoll(priv);
     }
-}
 
-/****************************************************************************
- * Function: stm32_txavail_work
- *
- * Description:
- *   Perform an out-of-cycle poll on the worker thread.
- *
- * Parameters:
- *   arg  - Reference to the NuttX driver state structure (cast to void*)
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Called on the higher priority worker thread.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void stm32_txavail_work(FAR void *arg)
-{
-  FAR struct stm32_ethmac_s *priv = (FAR struct stm32_ethmac_s *)arg;
-  net_lock_t state;
-
-  /* Perform the poll */
-
-  state = net_lock();
-  stm32_txavail_process(priv);
-  net_unlock(state);
+  net_unlock();
 }
-#endif
 
 /****************************************************************************
  * Function: stm32_txavail
@@ -2611,34 +2437,18 @@ static int stm32_txavail(struct net_driver_s *dev)
 {
   FAR struct stm32_ethmac_s *priv = (FAR struct stm32_ethmac_s *)dev->d_private;
 
-#ifdef CONFIG_NET_NOINTS
   /* Is our single work structure available?  It may not be if there are
    * pending interrupt actions and we will have to ignore the Tx
    * availability action.
    */
 
-  if (work_available(&priv->work))
+  if (work_available(&priv->pollwork))
     {
       /* Schedule to serialize the poll on the worker thread. */
 
-      work_queue(HPWORK, &priv->work, stm32_txavail_work, priv, 0);
+      work_queue(ETHWORK, &priv->pollwork, stm32_txavail_work, priv, 0);
     }
 
-#else
-  irqstate_t flags;
-
-  /* Disable interrupts because this function may be called from interrupt
-   * level processing.
-   */
-
-  flags = enter_critical_section();
-
-  /* Perform the out-of-cycle poll now */
-
-  stm32_txavail_process(priv);
-  leave_critical_section(flags);
-#endif
-
   return OK;
 }
 
@@ -2712,8 +2522,8 @@ static int stm32_addmac(struct net_driver_s *dev, FAR const uint8_t *mac)
   uint32_t temp;
   uint32_t registeraddress;
 
-  nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Add the MAC address to the hardware multicast hash table */
 
@@ -2769,8 +2579,8 @@ static int stm32_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac)
   uint32_t temp;
   uint32_t registeraddress;
 
-  nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Remove the MAC address to the hardware multicast hash table */
 
@@ -3098,6 +2908,8 @@ static int stm32_phyintenable(struct stm32_ethmac_s *priv)
  *
  ****************************************************************************/
 
+#if defined(CONFIG_STM32_AUTONEG) || defined(CONFIG_NETDEV_PHY_IOCTL) || \
+    defined(CONFIG_ETH0_PHY_DM9161)
 static int stm32_phyread(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t *value)
 {
   volatile uint32_t timeout;
@@ -3129,11 +2941,12 @@ static int stm32_phyread(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t *val
         }
     }
 
-  ndbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n",
+  nerr("ERROR: MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n",
        phydevaddr, phyregaddr);
 
   return -ETIMEDOUT;
 }
+#endif
 
 /****************************************************************************
  * Function: stm32_phywrite
@@ -3188,7 +3001,7 @@ static int stm32_phywrite(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t val
         }
     }
 
-  ndbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n",
+  nerr("ERROR: MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n",
        phydevaddr, phyregaddr, value);
 
   return -ETIMEDOUT;
@@ -3225,7 +3038,7 @@ static inline int stm32_dm9161(FAR struct stm32_ethmac_s *priv)
   ret = stm32_phyread(CONFIG_STM32_PHYADDR, MII_PHYID1, &phyval);
   if (ret < 0)
     {
-      ndbg("Failed to read the PHY ID1: %d\n", ret);
+      nerr("ERROR: Failed to read the PHY ID1: %d\n", ret);
       return ret;
     }
 
@@ -3236,14 +3049,14 @@ static inline int stm32_dm9161(FAR struct stm32_ethmac_s *priv)
       up_systemreset();
     }
 
-  nvdbg("PHY ID1: 0x%04X\n", phyval);
+  ninfo("PHY ID1: 0x%04X\n", phyval);
 
   /* Now check the "DAVICOM Specified Configuration Register (DSCR)", Register 16 */
 
   ret = stm32_phyread(CONFIG_STM32_PHYADDR, 16, &phyval);
   if (ret < 0)
     {
-      ndbg("Failed to read the PHY Register 0x10: %d\n", ret);
+      nerr("ERROR: Failed to read the PHY Register 0x10: %d\n", ret);
       return ret;
     }
 
@@ -3278,7 +3091,10 @@ static inline int stm32_dm9161(FAR struct stm32_ethmac_s *priv)
 
 static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
 {
+#ifdef CONFIG_STM32_AUTONEG
   volatile uint32_t timeout;
+#endif
+
   uint32_t regval;
   uint16_t phyval;
   int ret;
@@ -3300,7 +3116,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
   ret = stm32_phywrite(CONFIG_STM32_PHYADDR, MII_MCR, MII_MCR_RESET);
   if (ret < 0)
     {
-      ndbg("Failed to reset the PHY: %d\n", ret);
+      nerr("ERROR: Failed to reset the PHY: %d\n", ret);
       return ret;
     }
   up_mdelay(PHY_RESET_DELAY);
@@ -3311,7 +3127,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
   ret = stm32_phy_boardinitialize(0);
   if (ret < 0)
     {
-      ndbg("Failed to initialize the PHY: %d\n", ret);
+      nerr("ERROR: Failed to initialize the PHY: %d\n", ret);
       return ret;
     }
 #endif
@@ -3336,7 +3152,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
       ret = stm32_phyread(CONFIG_STM32_PHYADDR, MII_MSR, &phyval);
       if (ret < 0)
         {
-          ndbg("Failed to read the PHY MSR: %d\n", ret);
+          nerr("ERROR: Failed to read the PHY MSR: %d\n", ret);
           return ret;
         }
       else if ((phyval & MII_MSR_LINKSTATUS) != 0)
@@ -3347,7 +3163,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
 
   if (timeout >= PHY_RETRY_TIMEOUT)
     {
-      ndbg("Timed out waiting for link status: %04x\n", phyval);
+      nerr("ERROR: Timed out waiting for link status: %04x\n", phyval);
       return -ETIMEDOUT;
     }
 
@@ -3356,7 +3172,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
   ret = stm32_phywrite(CONFIG_STM32_PHYADDR, MII_MCR, MII_MCR_ANENABLE);
   if (ret < 0)
     {
-      ndbg("Failed to enable auto-negotiation: %d\n", ret);
+      nerr("ERROR: Failed to enable auto-negotiation: %d\n", ret);
       return ret;
     }
 
@@ -3367,7 +3183,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
       ret = stm32_phyread(CONFIG_STM32_PHYADDR, MII_MSR, &phyval);
       if (ret < 0)
         {
-          ndbg("Failed to read the PHY MSR: %d\n", ret);
+          nerr("ERROR: Failed to read the PHY MSR: %d\n", ret);
           return ret;
         }
       else if ((phyval & MII_MSR_ANEGCOMPLETE) != 0)
@@ -3378,7 +3194,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
 
   if (timeout >= PHY_RETRY_TIMEOUT)
     {
-      ndbg("Timed out waiting for auto-negotiation\n");
+      nerr("ERROR: Timed out waiting for auto-negotiation\n");
       return -ETIMEDOUT;
     }
 
@@ -3387,13 +3203,13 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
   ret = stm32_phyread(CONFIG_STM32_PHYADDR, CONFIG_STM32_PHYSR, &phyval);
   if (ret < 0)
     {
-      ndbg("Failed to read PHY status register\n");
+      nerr("ERROR: Failed to read PHY status register\n");
       return ret;
     }
 
   /* Remember the selected speed and duplex modes */
 
-  nvdbg("PHYSR[%d]: %04x\n", CONFIG_STM32_PHYSR, phyval);
+  ninfo("PHYSR[%d]: %04x\n", CONFIG_STM32_PHYSR, phyval);
 
   /* Different PHYs present speed and mode information in different ways.  IF
    * This CONFIG_STM32_PHYSR_ALTCONFIG is selected, this indicates that the PHY
@@ -3457,7 +3273,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
   ret = stm32_phywrite(CONFIG_STM32_PHYADDR, MII_MCR, phyval);
   if (ret < 0)
     {
-     ndbg("Failed to write the PHY MCR: %d\n", ret);
+     nerr("ERROR: Failed to write the PHY MCR: %d\n", ret);
       return ret;
     }
   up_mdelay(PHY_CONFIG_DELAY);
@@ -3472,9 +3288,9 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
 #endif
 #endif
 
-  ndbg("Duplex: %s Speed: %d MBps\n",
-       priv->fduplex ? "FULL" : "HALF",
-       priv->mbps100 ? 100 : 10);
+  ninfo("Duplex: %s Speed: %d MBps\n",
+        priv->fduplex ? "FULL" : "HALF",
+        priv->mbps100 ? 100 : 10);
 
   return OK;
 }
@@ -3680,7 +3496,6 @@ static inline void stm32_ethgpioconfig(FAR struct stm32_ethmac_s *priv)
   stm32_configgpio(GPIO_ETH_RMII_RXD1);
   stm32_configgpio(GPIO_ETH_RMII_TXD0);
   stm32_configgpio(GPIO_ETH_RMII_TXD1);
-  /* stm32_configgpio(GPIO_ETH_RMII_TX_CLK); not needed? */
   stm32_configgpio(GPIO_ETH_RMII_TX_EN);
 
 #endif
@@ -3853,11 +3668,11 @@ static void stm32_macaddress(FAR struct stm32_ethmac_s *priv)
   FAR struct net_driver_s *dev = &priv->dev;
   uint32_t regval;
 
-  nllvdbg("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          dev->d_ifname,
-          dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
-          dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
-          dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
+  ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        dev->d_ifname,
+        dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
+        dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
+        dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
 
   /* Set the MAC address high register */
 
@@ -3921,7 +3736,7 @@ static void stm32_ipv6multicast(FAR struct stm32_ethmac_s *priv)
   mac[4] = tmp16 & 0xff;
   mac[5] = tmp16 >> 8;
 
-  nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+  ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
         mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   (void)stm32_addmac(dev, mac);
@@ -4059,12 +3874,12 @@ static int stm32_ethconfig(FAR struct stm32_ethmac_s *priv)
 
   /* Reset the Ethernet block */
 
-  nllvdbg("Reset the Ethernet block\n");
+  ninfo("Reset the Ethernet block\n");
   stm32_ethreset(priv);
 
   /* Initialize the PHY */
 
-  nllvdbg("Initialize the PHY\n");
+  ninfo("Initialize the PHY\n");
   ret = stm32_phyinit(priv);
   if (ret < 0)
     {
@@ -4073,7 +3888,7 @@ static int stm32_ethconfig(FAR struct stm32_ethmac_s *priv)
 
   /* Initialize the MAC and DMA */
 
-  nllvdbg("Initialize the MAC and DMA\n");
+  ninfo("Initialize the MAC and DMA\n");
   ret = stm32_macconfig(priv);
   if (ret < 0)
     {
@@ -4094,7 +3909,7 @@ static int stm32_ethconfig(FAR struct stm32_ethmac_s *priv)
 
   /* Enable normal MAC operation */
 
-  nllvdbg("Enable normal operation\n");
+  ninfo("Enable normal operation\n");
   return stm32_macenable(priv);
 }
 
@@ -4130,7 +3945,7 @@ int stm32_ethinitialize(int intf)
 {
   struct stm32_ethmac_s *priv;
 
-  nvdbg("intf: %d\n", intf);
+  ninfo("intf: %d\n", intf);
 
   /* Get the interface structure associated with this interface number. */
 
@@ -4163,7 +3978,7 @@ int stm32_ethinitialize(int intf)
 
   /* Attach the IRQ to the driver */
 
-  if (irq_attach(STM32_IRQ_ETH, stm32_interrupt))
+  if (irq_attach(STM32_IRQ_ETH, stm32_interrupt, NULL))
     {
       /* We could not attach the ISR to the interrupt */
 
diff --git a/arch/arm/src/stm32/stm32_exti.h b/arch/arm/src/stm32/stm32_exti.h
index 6a34582c6763f82bfa08cfa08a63218462c1214f..9ac20798df26ab279580b21faf91433194704d65 100644
--- a/arch/arm/src/stm32/stm32_exti.h
+++ b/arch/arm/src/stm32/stm32_exti.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * arch/arm/src/stm32/stm32_exti.h
  *
- *   Copyright (C) 2009, 2012, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2012, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -72,21 +72,21 @@ extern "C"
  * Description:
  *   Sets/clears GPIO based event and interrupt triggers.
  *
- * Parameters:
+ * Input Parameters:
  *  - pinset: gpio pin configuration
  *  - rising/falling edge: enables
  *  - event:  generate event when set
  *  - func:   when non-NULL, generate interrupt
+ *  - arg:    Argument passed to the interrupt callback
  *
- * Returns:
- *  The previous value of the interrupt handler function pointer.  This value may,
- *  for example, be used to restore the previous handler when multiple handlers are
- *  used.
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure indicating the
+ *   nature of the failure.
  *
  ************************************************************************************/
 
-xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
-                          bool event, xcpt_t func);
+int stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
+                       bool event, xcpt_t func, void *arg);
 
 /************************************************************************************
  * Name: stm32_exti_alarm
@@ -94,20 +94,21 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
  * Description:
  *   Sets/clears EXTI alarm interrupt.
  *
- * Parameters:
+ * Input Parameters:
  *  - rising/falling edge: enables interrupt on rising/falling edges
  *  - event:  generate event when set
  *  - func:   when non-NULL, generate interrupt
+ *  - arg:    Argument passed to the interrupt callback
  *
- * Returns:
- *   The previous value of the interrupt handler function pointer.  This value may,
- *   for example, be used to restore the previous handler when multiple handlers are
- *   used.
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure indicating the
+ *   nature of the failure.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_RTC_ALARM
-xcpt_t stm32_exti_alarm(bool risingedge, bool fallingedge, bool event, xcpt_t func);
+int stm32_exti_alarm(bool risingedge, bool fallingedge, bool event, xcpt_t func,
+                     void *arg);
 #endif
 
 #undef EXTERN
diff --git a/arch/arm/src/stm32/stm32_exti_alarm.c b/arch/arm/src/stm32/stm32_exti_alarm.c
index f38574f2523eb8a3e58ec9b9f6a1bb621cd8fa99..12000d26af53db5f4a602f249516137376d52046 100644
--- a/arch/arm/src/stm32/stm32_exti_alarm.c
+++ b/arch/arm/src/stm32/stm32_exti_alarm.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32/stm32_exti_alarm.c
  *
- *   Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *           Diego Sanchez 
  *
@@ -53,21 +53,14 @@
 #include "stm32_gpio.h"
 #include "stm32_exti.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
 /* Interrupt handlers attached to the ALARM EXTI */
 
-static xcpt_t stm32_exti_callback;
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
+static xcpt_t g_alarm_callback;
+static void  *g_callback_arg;
 
 /****************************************************************************
  * Private Functions
@@ -81,7 +74,7 @@ static xcpt_t stm32_exti_callback;
  *
  ****************************************************************************/
 
-static int stm32_exti_alarm_isr(int irq, void *context)
+static int stm32_exti_alarm_isr(int irq, void *context, FAR void *arg)
 {
   int ret = OK;
 
@@ -91,9 +84,9 @@ static int stm32_exti_alarm_isr(int irq, void *context)
 
   /* And dispatch the interrupt to the handler */
 
-  if (stm32_exti_callback)
+  if (g_alarm_callback)
     {
-      ret = stm32_exti_callback(irq, context);
+      ret = g_alarm_callback(irq, context, g_callback_arg);
     }
 
   return ret;
@@ -113,29 +106,27 @@ static int stm32_exti_alarm_isr(int irq, void *context)
  *  - rising/falling edge: enables interrupt on rising/falling edget
  *  - event:  generate event when set
  *  - func:   when non-NULL, generate interrupt
+ *  - arg:    Argument passed to the interrupt callback
  *
  * Returns:
- *   The previous value of the interrupt handler function pointer.  This
- *   value may, for example, be used to restore the previous handler when
- *   multiple handlers are used.
+ *   Zero (OK) on success; a negated errno value on failure indicating the
+ *   nature of the failure.
  *
  ****************************************************************************/
 
-xcpt_t stm32_exti_alarm(bool risingedge, bool fallingedge, bool event,
-                        xcpt_t func)
+int stm32_exti_alarm(bool risingedge, bool fallingedge, bool event,
+                     xcpt_t func, void *arg)
 {
-  xcpt_t oldhandler;
-
   /* Get the previous GPIO IRQ handler; Save the new IRQ handler. */
 
-  oldhandler          = stm32_exti_callback;
-  stm32_exti_callback = func;
+  g_alarm_callback = func;
+  g_callback_arg   = arg;
 
   /* Install external interrupt handlers (if not already attached) */
 
   if (func)
     {
-      irq_attach(STM32_IRQ_RTCALRM, stm32_exti_alarm_isr);
+      irq_attach(STM32_IRQ_RTCALRM, stm32_exti_alarm_isr, NULL);
       up_enable_irq(STM32_IRQ_RTCALRM);
     }
   else
@@ -163,5 +154,5 @@ xcpt_t stm32_exti_alarm(bool risingedge, bool fallingedge, bool event,
 
   /* Return the old IRQ handler */
 
-  return oldhandler;
+  return OK;
 }
diff --git a/arch/arm/src/stm32/stm32_exti_gpio.c b/arch/arm/src/stm32/stm32_exti_gpio.c
index 6aa2cf4be2b0900fed3f422e7f4f2ffd7f3e4dda..663c0416b85f8608e8fbb2630f53b247469f73f1 100644
--- a/arch/arm/src/stm32/stm32_exti_gpio.c
+++ b/arch/arm/src/stm32/stm32_exti_gpio.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32/stm32_exti_gpio.c
  *
- *   Copyright (C) 2009, 2011-2012, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2011-2012, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Copyright (C) 2011 Uros Platise. All rights reserved.
  *   Author: Gregory Nutt 
  *           Uros Platise 
@@ -55,13 +55,23 @@
 #include "stm32_gpio.h"
 #include "stm32_exti.h"
 
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct gpio_callback_s
+{
+  xcpt_t callback;
+  void  *arg;
+};
+
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
 /* Interrupt handlers attached to each EXTI */
 
-static xcpt_t stm32_exti_callbacks[16];
+static struct gpio_callback_s g_gpio_callbacks[16];
 
 /****************************************************************************
  * Private Functions
@@ -71,7 +81,7 @@ static xcpt_t stm32_exti_callbacks[16];
  * Interrupt Service Routines - Dispatchers
  ****************************************************************************/
 
-static int stm32_exti0_isr(int irq, void *context)
+static int stm32_exti0_isr(int irq, void *context, void *arg)
 {
   int ret = OK;
 
@@ -81,15 +91,18 @@ static int stm32_exti0_isr(int irq, void *context)
 
   /* And dispatch the interrupt to the handler */
 
-  if (stm32_exti_callbacks[0])
+  if (g_gpio_callbacks[0].callback != NULL)
     {
-      ret = stm32_exti_callbacks[0](irq, context);
+      xcpt_t callback = g_gpio_callbacks[0].callback;
+      void  *cbarg    = g_gpio_callbacks[0].arg;
+
+      ret = callback(irq, context, cbarg);
     }
 
   return ret;
 }
 
-static int stm32_exti1_isr(int irq, void *context)
+static int stm32_exti1_isr(int irq, void *context, void *arg)
 {
   int ret = OK;
 
@@ -99,15 +112,18 @@ static int stm32_exti1_isr(int irq, void *context)
 
   /* And dispatch the interrupt to the handler */
 
-  if (stm32_exti_callbacks[1])
+  if (g_gpio_callbacks[1].callback != NULL)
     {
-      ret = stm32_exti_callbacks[1](irq, context);
+      xcpt_t callback = g_gpio_callbacks[1].callback;
+      void  *cbarg    = g_gpio_callbacks[1].arg;
+
+      ret = callback(irq, context, cbarg);
     }
 
   return ret;
 }
 
-static int stm32_exti2_isr(int irq, void *context)
+static int stm32_exti2_isr(int irq, void *context, void *arg)
 {
   int ret = OK;
 
@@ -117,15 +133,18 @@ static int stm32_exti2_isr(int irq, void *context)
 
   /* And dispatch the interrupt to the handler */
 
-  if (stm32_exti_callbacks[2])
+  if (g_gpio_callbacks[2].callback != NULL)
     {
-      ret = stm32_exti_callbacks[2](irq, context);
+      xcpt_t callback = g_gpio_callbacks[2].callback;
+      void  *cbarg    = g_gpio_callbacks[2].arg;
+
+      ret = callback(irq, context, cbarg);
     }
 
   return ret;
 }
 
-static int stm32_exti3_isr(int irq, void *context)
+static int stm32_exti3_isr(int irq, void *context, void  * arg)
 {
   int ret = OK;
 
@@ -135,15 +154,18 @@ static int stm32_exti3_isr(int irq, void *context)
 
   /* And dispatch the interrupt to the handler */
 
-  if (stm32_exti_callbacks[3])
+  if (g_gpio_callbacks[3].callback != NULL)
     {
-      ret = stm32_exti_callbacks[3](irq, context);
+      xcpt_t callback = g_gpio_callbacks[3].callback;
+      void  *cbarg    = g_gpio_callbacks[3].arg;
+
+      ret = callback(irq, context, cbarg);
     }
 
   return ret;
 }
 
-static int stm32_exti4_isr(int irq, void *context)
+static int stm32_exti4_isr(int irq, void *context, void *arg)
 {
   int ret = OK;
 
@@ -153,15 +175,19 @@ static int stm32_exti4_isr(int irq, void *context)
 
   /* And dispatch the interrupt to the handler */
 
-  if (stm32_exti_callbacks[4])
+  if (g_gpio_callbacks[4].callback != NULL)
     {
-      ret = stm32_exti_callbacks[4](irq, context);
+      xcpt_t callback = g_gpio_callbacks[4].callback;
+      void  *cbarg    = g_gpio_callbacks[4].arg;
+
+      ret = callback(irq, context, cbarg);
     }
 
   return ret;
 }
 
-static int stm32_exti_multiisr(int irq, void *context, int first, int last)
+static int stm32_exti_multiisr(int irq, void *context, void *arg,
+                               int first, int last)
 {
   uint32_t pr;
   int pin;
@@ -186,10 +212,14 @@ static int stm32_exti_multiisr(int irq, void *context, int first, int last)
 
           /* And dispatch the interrupt to the handler */
 
-          if (stm32_exti_callbacks[pin])
+          if (g_gpio_callbacks[pin].callback != NULL)
             {
-              int tmp = stm32_exti_callbacks[pin](irq, context);
-              if (tmp != OK)
+              xcpt_t callback = g_gpio_callbacks[pin].callback;
+              void  *cbarg    = g_gpio_callbacks[pin].arg;
+              int tmp;
+
+              tmp = callback(irq, context, cbarg);
+              if (tmp < 0)
                 {
                   ret = tmp;
                 }
@@ -200,14 +230,14 @@ static int stm32_exti_multiisr(int irq, void *context, int first, int last)
   return ret;
 }
 
-static int stm32_exti95_isr(int irq, void *context)
+static int stm32_exti95_isr(int irq, void *context, void *arg)
 {
-  return stm32_exti_multiisr(irq, context, 5, 9);
+  return stm32_exti_multiisr(irq, context, arg, 5, 9);
 }
 
-static int stm32_exti1510_isr(int irq, void *context)
+static int stm32_exti1510_isr(int irq, void *context, void *arg)
 {
-  return stm32_exti_multiisr(irq, context, 10, 15);
+  return stm32_exti_multiisr(irq, context, arg, 10, 15);
 }
 
 /****************************************************************************
@@ -220,30 +250,29 @@ static int stm32_exti1510_isr(int irq, void *context)
  * Description:
  *   Sets/clears GPIO based event and interrupt triggers.
  *
- * Parameters:
+ * Input Parameters:
  *  - pinset:      GPIO pin configuration
  *  - risingedge:  Enables interrupt on rising edges
  *  - fallingedge: Enables interrupt on falling edges
  *  - event:       Generate event when set
  *  - func:        When non-NULL, generate interrupt
+ *  - arg:         Argument passed to the interrupt callback
  *
- * Returns:
- *   The previous value of the interrupt handler function pointer.  This
- *   value may, for example, be used to restore the previous handler when
- *   multiple handlers are used.
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure indicating the
+ *   nature of the failure.
  *
  ****************************************************************************/
 
-xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
-                          bool event, xcpt_t func)
+int stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
+                       bool event, xcpt_t func, void *arg)
 {
+  FAR struct gpio_callback_s *shared_cbs;
   uint32_t pin = pinset & GPIO_PIN_MASK;
   uint32_t exti = STM32_EXTI_BIT(pin);
   int      irq;
   xcpt_t   handler;
-  xcpt_t   oldhandler = NULL;
   int      nshared;
-  xcpt_t  *shared_cbs;
   int      i;
 
   /* Select the interrupt handler for this EXTI pin */
@@ -252,7 +281,7 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
     {
       irq        = pin + STM32_IRQ_EXTI0;
       nshared    = 1;
-      shared_cbs = &stm32_exti_callbacks[pin];
+      shared_cbs = &g_gpio_callbacks[pin];
       switch (pin)
         {
           case 0:
@@ -280,27 +309,27 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
     {
       irq        = STM32_IRQ_EXTI95;
       handler    = stm32_exti95_isr;
-      shared_cbs = &stm32_exti_callbacks[5];
+      shared_cbs = &g_gpio_callbacks[5];
       nshared    = 5;
     }
   else
     {
       irq        = STM32_IRQ_EXTI1510;
       handler    = stm32_exti1510_isr;
-      shared_cbs = &stm32_exti_callbacks[10];
+      shared_cbs = &g_gpio_callbacks[10];
       nshared    = 6;
     }
 
   /* Get the previous GPIO IRQ handler; Save the new IRQ handler. */
 
-  oldhandler = stm32_exti_callbacks[pin];
-  stm32_exti_callbacks[pin] = func;
+  g_gpio_callbacks[pin].callback = func;
+  g_gpio_callbacks[pin].arg      = arg;
 
   /* Install external interrupt handlers */
 
   if (func)
     {
-      irq_attach(irq, handler);
+      irq_attach(irq, handler, NULL);
       up_enable_irq(irq);
     }
   else
@@ -311,7 +340,7 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
 
       for (i = 0; i < nshared; i++)
         {
-          if (shared_cbs[i] != NULL)
+          if (shared_cbs[i].callback != NULL)
             {
               break;
             }
@@ -352,7 +381,5 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
               func ? 0 : exti,
               func ? exti : 0);
 
-  /* Return the old IRQ handler */
-
-  return oldhandler;
+  return OK;
 }
diff --git a/arch/arm/src/stm32/stm32_exti_pwr.c b/arch/arm/src/stm32/stm32_exti_pwr.c
index f57e85e6ca9422c7250ece3dfb0a5f2eeddff032..5ab6138ac4bb345729b20edcb879a27804266816 100644
--- a/arch/arm/src/stm32/stm32_exti_pwr.c
+++ b/arch/arm/src/stm32/stm32_exti_pwr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32/stm32_exti_pwr.c
  *
- *   Copyright (C) 2009, 2011-2012, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2011-2012, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Copyright (C) 2015 Haltian Ltd. All rights reserved.
  *   Authors: Gregory Nutt 
  *            Dmitry Nikolaev 
@@ -65,11 +65,8 @@
 
 /* Interrupt handlers attached to the PVD EXTI */
 
-static xcpt_t stm32_exti_pvd_callback;
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
+static xcpt_t g_pvd_callback;
+static void  *g_callback_arg;
 
 /****************************************************************************
  * Private Functions
@@ -83,7 +80,7 @@ static xcpt_t stm32_exti_pvd_callback;
  *
  ****************************************************************************/
 
-static int stm32_exti_pvd_isr(int irq, void *context)
+static int stm32_exti_pvd_isr(int irq, void *context, FAR void *arg)
 {
   int ret = OK;
 
@@ -93,9 +90,9 @@ static int stm32_exti_pvd_isr(int irq, void *context)
 
   /* And dispatch the interrupt to the handler */
 
-  if (stm32_exti_pvd_callback)
+  if (g_pvd_callback != NULL)
     {
-      ret = stm32_exti_pvd_callback(irq, context);
+      ret = g_pvd_callback(irq, context, g_callback_arg);
     }
 
   return ret;
@@ -115,29 +112,27 @@ static int stm32_exti_pvd_isr(int irq, void *context)
  *  - rising/falling edge: enables interrupt on rising/falling edge
  *  - event:  generate event when set
  *  - func:   when non-NULL, generate interrupt
+ *  - arg:    Argument passed to the interrupt callback
  *
  * Returns:
- *   The previous value of the interrupt handler function pointer.  This
- *   value may, for example, be used to restore the previous handler when
- *   multiple handlers are used.
+ *   Zero (OK) returned on success; a negated errno value is returned on
+ *   failure.
  *
  ****************************************************************************/
 
-xcpt_t stm32_exti_pvd(bool risingedge, bool fallingedge, bool event,
-                      xcpt_t func)
+int stm32_exti_pvd(bool risingedge, bool fallingedge, bool event,
+                   xcpt_t func, void *arg)
 {
-  xcpt_t oldhandler;
-
   /* Get the previous GPIO IRQ handler; Save the new IRQ handler. */
 
-  oldhandler = stm32_exti_pvd_callback;
-  stm32_exti_pvd_callback = func;
+  g_pvd_callback = func;
+  g_callback_arg = arg;
 
   /* Install external interrupt handlers (if not already attached) */
 
   if (func)
     {
-      irq_attach(STM32_IRQ_PVD, stm32_exti_pvd_isr);
+      irq_attach(STM32_IRQ_PVD, stm32_exti_pvd_isr, NULL);
       up_enable_irq(STM32_IRQ_PVD);
     }
   else
@@ -163,7 +158,5 @@ xcpt_t stm32_exti_pvd(bool risingedge, bool fallingedge, bool event,
               func ? 0 : EXTI_PVD_LINE,
               func ? EXTI_PVD_LINE : 0);
 
-  /* Return the old IRQ handler */
-
-  return oldhandler;
+  return OK;
 }
diff --git a/arch/arm/src/stm32/stm32_exti_pwr.h b/arch/arm/src/stm32/stm32_exti_pwr.h
index 4955045a2f19e1695a7619147f0f30017111512f..c4841dffebe9d14c3445458e03774644a3baef27 100644
--- a/arch/arm/src/stm32/stm32_exti_pwr.h
+++ b/arch/arm/src/stm32/stm32_exti_pwr.h
@@ -57,15 +57,15 @@
  *  - rising/falling edge: enables interrupt on rising/falling edge
  *  - event:  generate event when set
  *  - func:   when non-NULL, generate interrupt
+ *  - arg:    Argument passed to the interrupt callback
  *
  * Returns:
- *   The previous value of the interrupt handler function pointer.  This
- *   value may, for example, be used to restore the previous handler when
- *   multiple handlers are used.
+ *   Zero (OK) returned on success; a negated errno value is returned on
+ *   failure.
  *
  ****************************************************************************/
 
-xcpt_t stm32_exti_pvd(bool risingedge, bool fallingedge, bool event,
-                      xcpt_t func);
+int stm32_exti_pvd(bool risingedge, bool fallingedge, bool event,
+                   xcpt_t func, void *arg);
 
 #endif /* STM32_EXTI_PWR_H_ */
diff --git a/arch/arm/src/stm32/stm32_flash.c b/arch/arm/src/stm32/stm32_flash.c
index 56aa1f75edcee80a31cd3cda5831748b8ba8c14c..9ac38a19a137f81185880877f823f862a274745a 100644
--- a/arch/arm/src/stm32/stm32_flash.c
+++ b/arch/arm/src/stm32/stm32_flash.c
@@ -231,12 +231,14 @@ ssize_t up_progmem_erasepage(size_t page)
       return -EFAULT;
     }
 
-  /* Get flash ready and begin erasing single page */
-
+#if !defined(CONFIG_STM32_STM32F40XX)
   if (!(getreg32(STM32_RCC_CR) & RCC_CR_HSION))
     {
       return -EPERM;
     }
+#endif
+
+  /* Get flash ready and begin erasing single page */
 
   stm32_flash_unlock();
 
@@ -313,17 +315,19 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t count)
       addr -= STM32_FLASH_BASE;
     }
 
-  if ((addr+count) >= STM32_FLASH_SIZE)
+  if ((addr+count) > STM32_FLASH_SIZE)
     {
       return -EFAULT;
     }
 
-  /* Get flash ready and begin flashing */
-
+#if !defined(CONFIG_STM32_STM32F40XX)
   if (!(getreg32(STM32_RCC_CR) & RCC_CR_HSION))
     {
       return -EPERM;
     }
+#endif
+
+  /* Get flash ready and begin flashing */
 
   stm32_flash_unlock();
 
diff --git a/arch/arm/src/stm32/stm32_freerun.c b/arch/arm/src/stm32/stm32_freerun.c
new file mode 100644
index 0000000000000000000000000000000000000000..673b0412d7813f64d6ce6c5caa4d9f6296bbe7eb
--- /dev/null
+++ b/arch/arm/src/stm32/stm32_freerun.c
@@ -0,0 +1,311 @@
+/****************************************************************************
+ * arch/arm/src/stm32/stm32_freerun.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the names NuttX nor Atmel nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "stm32_freerun.h"
+
+#ifdef CONFIG_STM32_FREERUN
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_freerun_handler
+ *
+ * Description:
+ *   Timer interrupt callback.  When the freerun timer counter overflows,
+ *   this interrupt will occur.  We will just increment an overflow count.
+ *
+ * Input Parameters:
+ *   tch - The handle that represents the timer state
+ *   arg - An opaque argument provided when the interrupt was registered
+ *   sr  - The value of the timer interrupt status register at the time
+ *         that the interrupt occurred.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifndef CONFIG_CLOCK_TIMEKEEPING
+static int stm32_freerun_handler(int irq, void *context, void *arg)
+{
+  struct stm32_freerun_s *freerun = (struct stm32_freerun_s *) arg;
+
+  DEBUGASSERT(freerun != NULL && freerun->overflow < UINT32_MAX);
+  freerun->overflow++;
+
+  STM32_TIM_ACKINT(freerun->tch, 0);
+  return OK;
+}
+#endif /* CONFIG_CLOCK_TIMEKEEPING */
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_freerun_initialize
+ *
+ * Description:
+ *   Initialize the freerun timer wrapper
+ *
+ * Input Parameters:
+ *   freerun    Caller allocated instance of the freerun state structure
+ *   chan       Timer counter channel to be used.
+ *   resolution The required resolution of the timer in units of
+ *              microseconds.  NOTE that the range is restricted to the
+ *              range of uint16_t (excluding zero).
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+int stm32_freerun_initialize(struct stm32_freerun_s *freerun, int chan,
+                             uint16_t resolution)
+{
+  uint32_t frequency;
+
+  tmrinfo("chan=%d resolution=%d usec\n", chan, resolution);
+  DEBUGASSERT(freerun != NULL && resolution > 0);
+
+  /* Get the TC frequency the corresponds to the requested resolution */
+
+  frequency = USEC_PER_SEC / (uint32_t)resolution;
+  freerun->frequency = frequency;
+
+  freerun->tch = stm32_tim_init(chan);
+  if (!freerun->tch)
+    {
+      tmrerr("ERROR: Failed to allocate TIM%d\n", chan);
+      return -EBUSY;
+    }
+
+  STM32_TIM_SETCLOCK(freerun->tch, frequency);
+
+  /* Initialize the remaining fields in the state structure and return
+   * success.
+   */
+
+  freerun->chan         = chan;
+  freerun->running      = false;
+
+#ifdef CONFIG_CLOCK_TIMEKEEPING
+  freerun->counter_mask = 0xffffffffull;
+#endif
+
+#ifndef CONFIG_CLOCK_TIMEKEEPING
+  freerun->overflow     = 0;
+
+  /* Set up to receive the callback when the counter overflow occurs */
+
+  STM32_TIM_SETISR(freerun->tch, stm32_freerun_handler, freerun, 0);
+#endif
+
+  /* Set timer period */
+
+  STM32_TIM_SETPERIOD(freerun->tch, UINT32_MAX);
+
+  /* Start the counter */
+
+  STM32_TIM_SETMODE(freerun->tch, STM32_TIM_MODE_UP);
+
+#ifndef CONFIG_CLOCK_TIMEKEEPING
+  STM32_TIM_ACKINT(freerun->tch, 0);
+  STM32_TIM_ENABLEINT(freerun->tch, 0);
+#endif
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_freerun_counter
+ *
+ * Description:
+ *   Read the counter register of the free-running timer.
+ *
+ * Input Parameters:
+ *   freerun Caller allocated instance of the freerun state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           stm32_freerun_initialize();
+ *   ts      The location in which to return the time from the free-running
+ *           timer.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+#ifndef CONFIG_CLOCK_TIMEKEEPING
+
+int stm32_freerun_counter(struct stm32_freerun_s *freerun,
+                          struct timespec *ts)
+{
+  uint64_t usec;
+  uint32_t counter;
+  uint32_t verify;
+  uint32_t overflow;
+  uint32_t sec;
+  int pending;
+  irqstate_t flags;
+
+  DEBUGASSERT(freerun && freerun->tch && ts);
+
+  /* Temporarily disable the overflow counter.  NOTE that we have to be
+   * careful here because  stm32_tc_getpending() will reset the pending
+   * interrupt status.  If we do not handle the overflow here then, it will
+   * be lost.
+   */
+
+  flags    = enter_critical_section();
+
+  overflow = freerun->overflow;
+  counter  = STM32_TIM_GETCOUNTER(freerun->tch);
+  pending  = STM32_TIM_CHECKINT(freerun->tch, 0);
+  verify   = STM32_TIM_GETCOUNTER(freerun->tch);
+
+  /* If an interrupt was pending before we re-enabled interrupts,
+   * then the overflow needs to be incremented.
+   */
+
+  if (pending)
+    {
+      STM32_TIM_ACKINT(freerun->tch, 0);
+
+      /* Increment the overflow count and use the value of the
+       * guaranteed to be AFTER the overflow occurred.
+       */
+
+      overflow++;
+      counter = verify;
+
+      /* Update freerun overflow counter. */
+
+      freerun->overflow = overflow;
+    }
+
+  leave_critical_section(flags);
+
+  tmrinfo("counter=%lu (%lu) overflow=%lu, pending=%i\n",
+         (unsigned long)counter,  (unsigned long)verify,
+         (unsigned long)overflow, pending);
+  tmrinfo("frequency=%u\n", freerun->frequency);
+
+  /* Convert the whole thing to units of microseconds.
+   *
+   *   frequency = ticks / second
+   *   seconds   = ticks * frequency
+   *   usecs     = (ticks * USEC_PER_SEC) / frequency;
+   */
+
+  usec = ((((uint64_t)overflow << 32) + (uint64_t)counter) * USEC_PER_SEC) /
+         freerun->frequency;
+
+  /* And return the value of the timer */
+
+  sec         = (uint32_t)(usec / USEC_PER_SEC);
+  ts->tv_sec  = sec;
+  ts->tv_nsec = (usec - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
+
+  tmrinfo("usec=%llu ts=(%u, %lu)\n",
+          usec, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
+
+  return OK;
+}
+
+#else /* CONFIG_CLOCK_TIMEKEEPING */
+
+int stm32_freerun_counter(struct stm32_freerun_s *freerun, uint64_t *counter)
+{
+  *counter = (uint64_t)STM32_TIM_GETCOUNTER(freerun->tch);
+  return OK;
+}
+
+#endif /* CONFIG_CLOCK_TIMEKEEPING */
+
+/****************************************************************************
+ * Name: stm32_freerun_uninitialize
+ *
+ * Description:
+ *   Stop the free-running timer and release all resources that it uses.
+ *
+ * Input Parameters:
+ *   freerun Caller allocated instance of the freerun state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           stm32_freerun_initialize();
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+int stm32_freerun_uninitialize(struct stm32_freerun_s *freerun)
+{
+  DEBUGASSERT(freerun && freerun->tch);
+
+  /* Now we can disable the timer interrupt and disable the timer. */
+
+  STM32_TIM_DISABLEINT(freerun->tch, 0);
+  STM32_TIM_SETMODE(freerun->tch, STM32_TIM_MODE_DISABLED);
+  STM32_TIM_SETISR(freerun->tch, NULL, NULL, 0);
+
+  /* Free the timer */
+
+  stm32_tim_deinit(freerun->tch);
+  freerun->tch = NULL;
+
+  return OK;
+}
+
+#endif /* CONFIG_STM32_ONESHOT */
diff --git a/arch/arm/src/stm32/stm32_freerun.h b/arch/arm/src/stm32/stm32_freerun.h
new file mode 100644
index 0000000000000000000000000000000000000000..bc7609666cfe40a91b2b6ad22c7f17f314b80292
--- /dev/null
+++ b/arch/arm/src/stm32/stm32_freerun.h
@@ -0,0 +1,174 @@
+/****************************************************************************
+ * arch/arm/src/stm32/stm32_freerun.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32_FREERUN_H
+#define __ARCH_ARM_SRC_STM32_FREERUN_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include "stm32_tim.h"
+
+#ifdef CONFIG_STM32_FREERUN
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* The freerun client must allocate an instance of this structure and called
+ * stm32_freerun_initialize() before using the freerun facilities.  The client
+ * should not access the contents of this structure directly since the
+ * contents are subject to change.
+ */
+
+struct stm32_freerun_s
+{
+  uint8_t chan;                    /* The timer/counter in use */
+  bool running;                    /* True: the timer is running */
+  FAR struct stm32_tim_dev_s *tch; /* Handle returned by stm32_tim_init() */
+  uint32_t frequency;
+
+#ifndef CONFIG_CLOCK_TIMEKEEPING
+  uint32_t overflow;               /* Timer counter overflow */
+#endif
+
+#ifdef CONFIG_CLOCK_TIMEKEEPING
+  uint64_t counter_mask;
+#endif
+};
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_freerun_initialize
+ *
+ * Description:
+ *   Initialize the freerun timer wrapper
+ *
+ * Input Parameters:
+ *   freerun    Caller allocated instance of the freerun state structure
+ *   chan       Timer counter channel to be used.
+ *   resolution The required resolution of the timer in units of
+ *              microseconds.  NOTE that the range is restricted to the
+ *              range of uint16_t (excluding zero).
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+int stm32_freerun_initialize(struct stm32_freerun_s *freerun, int chan,
+                             uint16_t resolution);
+
+/****************************************************************************
+ * Name: stm32_freerun_counter
+ *
+ * Description:
+ *   Read the counter register of the free-running timer.
+ *
+ * Input Parameters:
+ *   freerun Caller allocated instance of the freerun state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           stm32_freerun_initialize();
+ *   ts      The location in which to return the time remaining on the
+ *           oneshot timer.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+#ifndef CONFIG_CLOCK_TIMEKEEPING
+
+int stm32_freerun_counter(struct stm32_freerun_s *freerun,
+                          struct timespec *ts);
+
+#else /* CONFIG_CLOCK_TIMEKEEPING */
+
+int stm32_freerun_counter(struct stm32_freerun_s *freerun,
+                          uint64_t *counter);
+
+#endif /* CONFIG_CLOCK_TIMEKEEPING */
+
+/****************************************************************************
+ * Name: stm32_freerun_uninitialize
+ *
+ * Description:
+ *   Stop the free-running timer and release all resources that it uses.
+ *
+ * Input Parameters:
+ *   freerun Caller allocated instance of the freerun state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           stm32_freerun_initialize();
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+int stm32_freerun_uninitialize(struct stm32_freerun_s *freerun);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CONFIG_STM32_FREERUN */
+#endif /* __ARCH_ARM_SRC_STM32_FREERUN_H */
diff --git a/arch/arm/src/stm32/stm32_gpio.c b/arch/arm/src/stm32/stm32_gpio.c
index 6426107b3b490130526aa6cc525e9ece4114a2d8..9eb5fb9597b79c365f2b78dfe210cf809064ef4f 100644
--- a/arch/arm/src/stm32/stm32_gpio.c
+++ b/arch/arm/src/stm32/stm32_gpio.c
@@ -55,8 +55,8 @@
 #include "stm32_gpio.h"
 
 #if defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F20XX) || \
-    defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) || \
-    defined(CONFIG_STM32_STM32F40XX)
+    defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+    defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX)
 #  include "chip/stm32_syscfg.h"
 #endif
 
@@ -427,8 +427,8 @@ int stm32_configgpio(uint32_t cfgset)
  ****************************************************************************/
 
 #if defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F20XX) || \
-    defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) || \
-    defined(CONFIG_STM32_STM32F40XX)
+    defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+    defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX)
 int stm32_configgpio(uint32_t cfgset)
 {
   uintptr_t base;
@@ -469,6 +469,7 @@ int stm32_configgpio(uint32_t cfgset)
         break;
 
       case GPIO_OUTPUT:     /* General purpose output mode */
+        stm32_gpiowrite(cfgset, (cfgset & GPIO_OUTPUT_SET) != 0); /* Set the initial output value */
         pinmode = GPIO_MODER_OUTPUT;
         break;
 
@@ -584,7 +585,8 @@ int stm32_configgpio(uint32_t cfgset)
             setting = GPIO_OSPEED_50MHz;
             break;
 
-#if !defined(CONFIG_STM32_STM32F30XX) && !defined(CONFIG_STM32_STM32F37XX)
+#if !defined(CONFIG_STM32_STM32F30XX) && !defined(CONFIG_STM32_STM32F33XX) && \
+    !defined(CONFIG_STM32_STM32F37XX)
           case GPIO_SPEED_100MHz:   /* 100 MHz High speed output */
             setting = GPIO_OSPEED_100MHz;
             break;
@@ -619,17 +621,9 @@ int stm32_configgpio(uint32_t cfgset)
 
   putreg32(regval, base + STM32_GPIO_OTYPER_OFFSET);
 
-  /* If it is an output... set the pin to the correct initial state. */
-
-  if (pinmode == GPIO_MODER_OUTPUT)
-    {
-      bool value = ((cfgset & GPIO_OUTPUT_SET) != 0);
-      stm32_gpiowrite(cfgset, value);
-    }
-
   /* Otherwise, it is an input pin.  Should it configured as an EXTI interrupt? */
 
-  else if ((cfgset & GPIO_EXTI) != 0)
+  if (pinmode != GPIO_MODER_OUTPUT && (cfgset & GPIO_EXTI) != 0)
     {
       /* "In STM32 F1 the selection of the EXTI line source is performed through
        *  the EXTIx bits in the AFIO_EXTICRx registers, while in F2 series this
@@ -688,8 +682,8 @@ int stm32_unconfiggpio(uint32_t cfgset)
 #if defined(CONFIG_STM32_STM32F10XX)
   cfgset |= GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT;
 #elif defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F20XX) || \
-      defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) || \
-      defined(CONFIG_STM32_STM32F40XX)
+      defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+      defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX)
   cfgset |= GPIO_INPUT | GPIO_FLOAT;
 #else
 # error "Unsupported STM32 chip"
@@ -714,8 +708,8 @@ void stm32_gpiowrite(uint32_t pinset, bool value)
 #if defined(CONFIG_STM32_STM32F10XX)
   uint32_t offset;
 #elif defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F20XX) || \
-      defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) || \
-      defined(CONFIG_STM32_STM32F40XX)
+      defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+      defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX)
   uint32_t bit;
 #endif
   unsigned int port;
@@ -748,8 +742,8 @@ void stm32_gpiowrite(uint32_t pinset, bool value)
       putreg32((1 << pin), base + offset);
 
 #elif defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F20XX) || \
-      defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) || \
-      defined(CONFIG_STM32_STM32F40XX)
+      defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+      defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX)
 
       if (value)
         {
@@ -794,5 +788,6 @@ bool stm32_gpioread(uint32_t pinset)
       pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
       return ((getreg32(base + STM32_GPIO_IDR_OFFSET) & (1 << pin)) != 0);
     }
+
   return 0;
 }
diff --git a/arch/arm/src/stm32/stm32_gpio.h b/arch/arm/src/stm32/stm32_gpio.h
index c1790eaaaa3f8693950edbbb1a1cc68a89bb273a..0385d1e9519344cb1e0472b2049b0d2e05267121 100644
--- a/arch/arm/src/stm32/stm32_gpio.h
+++ b/arch/arm/src/stm32/stm32_gpio.h
@@ -59,7 +59,8 @@
 #  include "chip/stm32f10xxx_gpio.h"
 #elif defined(CONFIG_STM32_STM32F20XX)
 #  include "chip/stm32f20xxx_gpio.h"
-#elif defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+#elif defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+      defined(CONFIG_STM32_STM32F37XX)
 #  include "chip/stm32f30xxx_gpio.h"
 #elif defined(CONFIG_STM32_STM32F40XX)
 #  include "chip/stm32f40xxx_gpio.h"
@@ -201,8 +202,8 @@
 #define GPIO_PIN15                    (15 << GPIO_PIN_SHIFT)
 
 #elif defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F20XX) || \
-      defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) || \
-      defined(CONFIG_STM32_STM32F40XX)
+      defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+      defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX)
 
 /* Each port bit of the general-purpose I/O (GPIO) ports can be individually configured
  * by software in several modes:
@@ -431,7 +432,7 @@ EXTERN const uint32_t g_gpiobase[STM32_NGPIO_PORTS];
  *   function, it must be unconfigured with stm32_unconfiggpio() with
  *   the same cfgset first before it can be set to non-alternative function.
  *
- * Returns:
+ * Returned Value:
  *   OK on success
  *   ERROR on invalid port, or when pin is locked as ALT function.
  *
@@ -452,7 +453,7 @@ int stm32_configgpio(uint32_t cfgset);
  *   operate in PWM mode could produce excessive on-board currents and trigger
  *   over-current/alarm function.
  *
- * Returns:
+ * Returned Value:
  *  OK on success
  *  ERROR on invalid port
  *
@@ -486,21 +487,21 @@ bool stm32_gpioread(uint32_t pinset);
  * Description:
  *   Sets/clears GPIO based event and interrupt triggers.
  *
- * Parameters:
+ * Input Parameters:
  *  - pinset: gpio pin configuration
  *  - rising/falling edge: enables
  *  - event:  generate event when set
  *  - func:   when non-NULL, generate interrupt
+ *  - arg:    Argument passed to the interrupt callback
  *
- * Returns:
- *  The previous value of the interrupt handler function pointer.  This value may,
- *  for example, be used to restore the previous handler when multiple handlers are
- *  used.
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure indicating the
+ *   nature of the failure.
  *
  ************************************************************************************/
 
-xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
-                          bool event, xcpt_t func);
+int stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
+                       bool event, xcpt_t func, void *arg);
 
 /************************************************************************************
  * Function:  stm32_dumpgpio
@@ -510,7 +511,7 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 int stm32_dumpgpio(uint32_t pinset, const char *msg);
 #else
 #  define stm32_dumpgpio(p,m)
diff --git a/arch/arm/src/stm32/stm32_i2c.c b/arch/arm/src/stm32/stm32_i2c.c
index 6d06098b018b18db0785a0004d8677ac3ce499ee..f4c97eca50643ed345a91c7b379864aaa5c4ceb9 100644
--- a/arch/arm/src/stm32/stm32_i2c.c
+++ b/arch/arm/src/stm32/stm32_i2c.c
@@ -84,8 +84,9 @@
 
 #include 
 #include 
-#include 
 #include 
+#include 
+#include 
 
 #include 
 
@@ -162,15 +163,6 @@
 #define MKI2C_OUTPUT(p) (((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_OUTPUT)
 
 /* Debug ****************************************************************************/
-/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
-
-#ifdef CONFIG_DEBUG_I2C
-#  define i2cdbg dbg
-#  define i2cvdbg vdbg
-#else
-#  define i2cdbg(x...)
-#  define i2cvdbg(x...)
-#endif
 
 /* I2C event trace logic.  NOTE:  trace uses the internal, non-standard, low-level
  * debug interface syslog() but does not require that any other debug
@@ -238,7 +230,7 @@ struct stm32_i2c_config_s
   uint32_t scl_pin;           /* GPIO configuration for SCL as SCL */
   uint32_t sda_pin;           /* GPIO configuration for SDA as SDA */
 #ifndef CONFIG_I2C_POLLED
-  int (*isr)(int, void *);    /* Interrupt handler */
+  int (*isr)(int, void *, void *);    /* Interrupt handler */
   uint32_t ev_irq;            /* Event IRQ */
   uint32_t er_irq;            /* Error IRQ */
 #endif
@@ -325,13 +317,13 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s * priv);
 
 #ifndef CONFIG_I2C_POLLED
 #ifdef CONFIG_STM32_I2C1
-static int stm32_i2c1_isr(int irq, void *context);
+static int stm32_i2c1_isr(int irq, void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_STM32_I2C2
-static int stm32_i2c2_isr(int irq, void *context);
+static int stm32_i2c2_isr(int irq, void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_STM32_I2C3
-static int stm32_i2c3_isr(int irq, void *context);
+static int stm32_i2c3_isr(int irq, void *context, FAR void *arg);
 #endif
 #endif /* !CONFIG_I2C_POLLED */
 
@@ -693,7 +685,7 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
 
   while (priv->intstate != INTSTATE_DONE && elapsed < timeout);
 
-  i2cvdbg("intstate: %d elapsed: %ld threshold: %ld status: %08x\n",
+  i2cinfo("intstate: %d elapsed: %ld threshold: %ld status: %08x\n",
           priv->intstate, (long)elapsed, (long)timeout, priv->status);
 
   /* Set the interrupt state back to IDLE */
@@ -766,7 +758,7 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv)
    * still pending.
    */
 
-  i2cvdbg("Timeout with CR1: %04x SR1: %04x\n", cr1, sr1);
+  i2cinfo("Timeout with CR1: %04x SR1: %04x\n", cr1, sr1);
 }
 
 /************************************************************************************
@@ -793,8 +785,14 @@ static inline void stm32_i2c_sem_post(struct stm32_i2c_priv_s *priv)
 static inline void stm32_i2c_sem_init(FAR struct stm32_i2c_priv_s *priv)
 {
   sem_init(&priv->sem_excl, 0, 1);
+
 #ifndef CONFIG_I2C_POLLED
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   sem_init(&priv->sem_isr, 0, 0);
+  sem_setprotocol(&priv->sem_isr, SEM_PRIO_NONE);
 #endif
 }
 
@@ -859,7 +857,7 @@ static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv, uint32_t statu
 
           if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
             {
-              i2cdbg("Trace table overflow\n");
+              i2cerr("ERROR: Trace table overflow\n");
               return;
             }
 
@@ -900,7 +898,7 @@ static void stm32_i2c_traceevent(FAR struct stm32_i2c_priv_s *priv,
 
       if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
         {
-          i2cdbg("Trace table overflow\n");
+          i2cerr("ERROR: Trace table overflow\n");
           return;
         }
 
@@ -1470,7 +1468,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
 
 #ifndef CONFIG_I2C_POLLED
 #ifdef CONFIG_STM32_I2C1
-static int stm32_i2c1_isr(int irq, void *context)
+static int stm32_i2c1_isr(int irq, void *context, FAR void *arg)
 {
   return stm32_i2c_isr(&stm32_i2c1_priv);
 }
@@ -1485,7 +1483,7 @@ static int stm32_i2c1_isr(int irq, void *context)
  ************************************************************************************/
 
 #ifdef CONFIG_STM32_I2C2
-static int stm32_i2c2_isr(int irq, void *context)
+static int stm32_i2c2_isr(int irq, void *context, FAR void *arg)
 {
   return stm32_i2c_isr(&stm32_i2c2_priv);
 }
@@ -1500,7 +1498,7 @@ static int stm32_i2c2_isr(int irq, void *context)
  ************************************************************************************/
 
 #ifdef CONFIG_STM32_I2C3
-static int stm32_i2c3_isr(int irq, void *context)
+static int stm32_i2c3_isr(int irq, void *context, FAR void *arg)
 {
   return stm32_i2c_isr(&stm32_i2c3_priv);
 }
@@ -1545,8 +1543,8 @@ static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv)
   /* Attach ISRs */
 
 #ifndef CONFIG_I2C_POLLED
-  irq_attach(priv->config->ev_irq, priv->config->isr);
-  irq_attach(priv->config->er_irq, priv->config->isr);
+  irq_attach(priv->config->ev_irq, priv->config->isr, NULL);
+  irq_attach(priv->config->er_irq, priv->config->isr, NULL);
   up_enable_irq(priv->config->ev_irq);
   up_enable_irq(priv->config->er_irq);
 #endif
@@ -1695,7 +1693,7 @@ static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s
       status = stm32_i2c_getstatus(priv);
       ret = -ETIMEDOUT;
 
-      i2cdbg("Timed out: CR1: 0x%04x status: 0x%08x\n",
+      i2cerr("ERROR: Timed out: CR1: 0x%04x status: 0x%08x\n",
              stm32_i2c_getreg(priv, STM32_I2C_CR1_OFFSET), status);
 
       /* "Note: When the STOP, START or PEC bit is set, the software must
diff --git a/arch/arm/src/stm32/stm32_i2c.h b/arch/arm/src/stm32/stm32_i2c.h
index 05f57ee46fbbfaed8be71d68b4141c558ae5da26..f36ee952f55178cff12bc2a13fb95a6fb85a5182 100644
--- a/arch/arm/src/stm32/stm32_i2c.h
+++ b/arch/arm/src/stm32/stm32_i2c.h
@@ -44,7 +44,8 @@
 #include 
 
 #include "chip.h"
-#if defined(CONFIG_STM32_STM32F30XX)
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) || \
+    defined(CONFIG_STM32_STM32F33XX)
 #  include "chip/stm32f30xxx_i2c.h"
 #else
 #  include "chip/stm32_i2c.h"
diff --git a/arch/arm/src/stm32/stm32_i2c_alt.c b/arch/arm/src/stm32/stm32_i2c_alt.c
index da50a9c263508f6aa96817462596fe2e88ba2c7b..f9a2905f0e1a3f743736d484c5b4e62a47e00f6a 100644
--- a/arch/arm/src/stm32/stm32_i2c_alt.c
+++ b/arch/arm/src/stm32/stm32_i2c_alt.c
@@ -91,8 +91,9 @@
 
 #include 
 #include 
-#include 
 #include 
+#include 
+#include 
 
 #include 
 
@@ -169,15 +170,6 @@
 #define MKI2C_OUTPUT(p) (((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_OUTPUT)
 
 /* Debug ****************************************************************************/
-/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
-
-#ifdef CONFIG_DEBUG_I2C
-#  define i2cdbg dbg
-#  define i2cvdbg vdbg
-#else
-#  define i2cdbg(x...)
-#  define i2cvdbg(x...)
-#endif
 
 /* I2C event trace logic.  NOTE:  trace uses the internal, non-standard, low-level
  * debug interface syslog() but does not require that any other debug
@@ -265,7 +257,7 @@ struct stm32_i2c_config_s
   uint32_t scl_pin;            /* GPIO configuration for SCL as SCL */
   uint32_t sda_pin;            /* GPIO configuration for SDA as SDA */
 #ifndef CONFIG_I2C_POLLED
-  int (*isr)(int, void *);     /* Interrupt handler */
+  int (*isr)(int, void *, void *);     /* Interrupt handler */
   uint32_t ev_irq;             /* Event IRQ */
   uint32_t er_irq;             /* Error IRQ */
 #endif
@@ -354,13 +346,13 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s * priv);
 
 #ifndef CONFIG_I2C_POLLED
 #ifdef CONFIG_STM32_I2C1
-static int stm32_i2c1_isr(int irq, void *context);
+static int stm32_i2c1_isr(int irq, void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_STM32_I2C2
-static int stm32_i2c2_isr(int irq, void *context);
+static int stm32_i2c2_isr(int irq, void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_STM32_I2C3
-static int stm32_i2c3_isr(int irq, void *context);
+static int stm32_i2c3_isr(int irq, void *context, FAR void *arg);
 #endif
 #endif /* !CONFIG_I2C_POLLED */
 
@@ -701,7 +693,7 @@ static int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
 
   while (priv->intstate != INTSTATE_DONE && elapsed < timeout);
 
-  i2cvdbg("intstate: %d elapsed: %ld threshold: %ld status: %08x\n",
+  i2cinfo("intstate: %d elapsed: %ld threshold: %ld status: %08x\n",
           priv->intstate, (long)elapsed, (long)timeout, priv->status);
 
   /* Set the interrupt state back to IDLE */
@@ -774,7 +766,7 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv)
    * still pending.
    */
 
-  i2cvdbg("Timeout with CR1: %04x SR1: %04x\n", cr1, sr1);
+  i2cinfo("Timeout with CR1: %04x SR1: %04x\n", cr1, sr1);
 }
 
 /************************************************************************************
@@ -801,8 +793,14 @@ static inline void stm32_i2c_sem_post(FAR struct stm32_i2c_priv_s *priv)
 static inline void stm32_i2c_sem_init(FAR struct stm32_i2c_priv_s *priv)
 {
   sem_init(&priv->sem_excl, 0, 1);
+
 #ifndef CONFIG_I2C_POLLED
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   sem_init(&priv->sem_isr, 0, 0);
+  sem_setprotocol(&priv->sem_isr, SEM_PRIO_NONE);
 #endif
 }
 
@@ -867,7 +865,7 @@ static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv, uint16_t statu
 
           if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
             {
-              i2cdbg("Trace table overflow\n");
+              i2cerr("ERROR: Trace table overflow\n");
               return;
             }
 
@@ -908,7 +906,7 @@ static void stm32_i2c_traceevent(FAR struct stm32_i2c_priv_s *priv,
 
       if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
         {
-          i2cdbg("Trace table overflow\n");
+          i2cerr("ERROR: Trace table overflow\n");
           return;
         }
 
@@ -1208,7 +1206,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
 {
   uint32_t status;
 
-  i2cvdbg("I2C ISR called\n");
+  i2cinfo("I2C ISR called\n");
 
   /* Get state of the I2C controller (register SR1 only)
    *
@@ -1252,7 +1250,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
 
   if (priv->dcnt == -1 && priv->msgc > 0)
     {
-      i2cvdbg("Switch to new message\n");
+      i2cinfo("Switch to new message\n");
 
       /* Get current message to process data and copy to private structure */
 
@@ -1261,7 +1259,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
       priv->total_msg_len = priv->msgv->length;   /* Set total msg length */
       priv->flags         = priv->msgv->flags;    /* Copy flags to private struct */
 
-      i2cvdbg("Current flags %i\n", priv->flags);
+      i2cinfo("Current flags %i\n", priv->flags);
 
       /* Decrease counter to indicate the number of messages left to process */
 
@@ -1314,7 +1312,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
     {
       /* Start bit is set */
 
-      i2cvdbg("Entering address handling, status = %i\n", status);
+      i2cinfo("Entering address handling, status = %i\n", status);
 
       /* Check for empty message (for robustness) */
 
@@ -1326,7 +1324,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
 
           if (priv->total_msg_len == 1 && (priv->flags & I2C_M_READ))
             {
-              i2cvdbg("short read N=1: setting NACK\n");
+              i2cinfo("short read N=1: setting NACK\n");
 
               /* Set POS bit to zero (can be up from a previous 2 byte receive) */
 
@@ -1339,7 +1337,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
             }
           else if (priv->total_msg_len == 2 && (priv->flags & I2C_M_READ))
             {
-              i2cvdbg("short read N=2: setting POS and ACK bits\n");
+              i2cinfo("short read N=2: setting POS and ACK bits\n");
 
               stm32_i2c_modifyreg(priv, STM32_I2C_CR1_OFFSET, 0, I2C_CR1_POS);
               stm32_i2c_modifyreg(priv, STM32_I2C_CR1_OFFSET, 0, I2C_CR1_ACK);
@@ -1349,7 +1347,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
             {
               /* Enable ACK after address byte */
 
-              i2cvdbg("setting ACK\n");
+              i2cinfo("setting ACK\n");
 
               /* Set POS bit to zero (can be up from a previous 2 byte receive) */
 
@@ -1369,7 +1367,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
                            (priv->flags & I2C_M_TEN) ?
                            0 :((priv->msgv->addr << 1) | (priv->flags & I2C_M_READ)));
 
-          i2cvdbg("Address sent. Addr=%#02x Write/Read bit=%i\n",
+          i2cinfo("Address sent. Addr=%#02x Write/Read bit=%i\n",
                   priv->msgv->addr, (priv->flags & I2C_M_READ));
 
           /* Flag that address has just been sent */
@@ -1382,7 +1380,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
         {
           /* TODO: untested!! */
 
-          i2cdbg(" An empty message has been detected, ignoring and passing to next message.\n");
+          i2cwarn("WARNING:  An empty message has been detected, ignoring and passing to next message.\n");
 
           /* Trace event */
 
@@ -1428,15 +1426,15 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
 
   else if ((status & I2C_SR1_ADDR) == 0 && priv->check_addr_ACK)
     {
-      i2cvdbg("Invalid Address. Setting stop bit and clearing message\n");
-      i2cvdbg("status %i\n", status);
+      i2cinfo("Invalid Address. Setting stop bit and clearing message\n");
+      i2cinfo("status %i\n", status);
 
       /* Set condition to terminate msg chain transmission as address is invalid. */
 
       priv->dcnt = -1;
       priv->msgc = 0;
 
-      i2cvdbg("dcnt %i , msgc %i\n", priv->dcnt, priv->msgc);
+      i2cinfo("dcnt %i , msgc %i\n", priv->dcnt, priv->msgc);
 
       /* Reset flag to check for valid address */
 
@@ -1482,8 +1480,8 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
           stm32_i2c_modifyreg(priv, STM32_I2C_CR2_OFFSET, 0, I2C_CR2_ITBUFEN);
           stm32_i2c_sendstop(priv);
 
-          i2cvdbg("Address ACKed beginning data reception\n");
-          i2cvdbg("short read N=1: programming stop bit\n");
+          i2cinfo("Address ACKed beginning data reception\n");
+          i2cinfo("short read N=1: programming stop bit\n");
           priv->dcnt--;
 
           /* Trace */
@@ -1498,8 +1496,8 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
 
           stm32_i2c_modifyreg(priv, STM32_I2C_CR1_OFFSET, I2C_CR1_ACK, 0);
 
-          i2cvdbg("Address ACKed beginning data reception\n");
-          i2cvdbg("short read N=2: programming NACK\n");
+          i2cinfo("Address ACKed beginning data reception\n");
+          i2cinfo("short read N=2: programming NACK\n");
 
           /* Trace */
 
@@ -1507,7 +1505,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
         }
       else
         {
-          i2cvdbg("Address ACKed beginning data reception\n");
+          i2cinfo("Address ACKed beginning data reception\n");
 
           /* Trace */
 
@@ -1530,7 +1528,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
        * transmit the next byte.
        */
 
-      i2cvdbg("Entering write mode dcnt = %i msgc = %i\n",
+      i2cinfo("Entering write mode dcnt = %i msgc = %i\n",
               priv->dcnt, priv->msgc);
 
       /* Clear ADDR flag by reading SR2 and adding it to status */
@@ -1567,12 +1565,12 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
               /* If last message send stop bit */
 
               stm32_i2c_sendstop(priv);
-              i2cvdbg("Stop sent dcnt = %i msgc = %i\n", priv->dcnt, priv->msgc);
+              i2cinfo("Stop sent dcnt = %i msgc = %i\n", priv->dcnt, priv->msgc);
 
               /* Decrease counter to get to next message */
 
               priv->dcnt--;
-              i2cvdbg("dcnt %i\n", priv->dcnt);
+              i2cinfo("dcnt %i\n", priv->dcnt);
               stm32_i2c_traceevent(priv, I2CEVENT_WRITE_STOP, priv->dcnt);
             }
 
@@ -1586,13 +1584,13 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
             {
               stm32_i2c_sendstart(priv);
 
-              i2cvdbg("Restart detected!\n");
-              i2cvdbg("Nextflag %i\n", priv->msgv[0].flags);
+              i2cinfo("Restart detected!\n");
+              i2cinfo("Nextflag %i\n", priv->msgv[0].flags);
 
               /* Decrease counter to get to next message */
 
               priv->dcnt--;
-              i2cvdbg("dcnt %i\n", priv->dcnt);
+              i2cinfo("dcnt %i\n", priv->dcnt);
               stm32_i2c_traceevent(priv, I2CEVENT_WRITE_RESTART, priv->dcnt);
             }
 
@@ -1609,14 +1607,14 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
             }
           else
             {
-              i2cdbg("Write mode: next message has an unrecognized flag.\n");
+              i2cerr("ERROR: Write mode: next message has an unrecognized flag.\n");
               stm32_i2c_traceevent(priv, I2CEVENT_WRITE_FLAG_ERROR, priv->msgv->flags);
             }
 
         }
       else
         {
-          i2cdbg("Write mode error.\n");
+          i2cerr("ERROR: Write mode error.\n");
           stm32_i2c_traceevent(priv, I2CEVENT_WRITE_ERROR, 0);
         }
     }
@@ -1654,7 +1652,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
        * (RXNE is set) then the driver can read from the data register.
        */
 
-      i2cvdbg("Entering read mode dcnt = %i msgc = %i, status %i\n",
+      i2cinfo("Entering read mode dcnt = %i msgc = %i, status %i\n",
               priv->dcnt, priv->msgc, status);
 
       /* Implementation of method 2 for receiving data following
@@ -1665,7 +1663,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
 
       if (priv->dcnt == 0 && priv->total_msg_len == 1)
         {
-          i2cvdbg("short read N=1: Read data from data register(DR)\n");
+          i2cinfo("short read N=1: Read data from data register(DR)\n");
 
           *priv->ptr++ = stm32_i2c_getreg(priv, STM32_I2C_DR_OFFSET);
           priv->dcnt--;
@@ -1676,12 +1674,12 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
 
       else if (priv->dcnt == 2 && priv->total_msg_len == 2 && !(status & I2C_SR1_BTF))
         {
-          i2cvdbg("short read N=2: DR full, SR empty. Waiting for more bytes.\n");
+          i2cinfo("short read N=2: DR full, SR empty. Waiting for more bytes.\n");
           stm32_i2c_traceevent(priv, I2CEVENT_READ_SR_EMPTY, 0);
         }
       else if (priv->dcnt == 2 && priv->total_msg_len == 2 && (status & I2C_SR1_BTF))
         {
-          i2cvdbg("short read N=2: DR and SR full setting stop bit and reading twice\n");
+          i2cinfo("short read N=2: DR and SR full setting stop bit and reading twice\n");
 
           stm32_i2c_sendstop(priv);
           *priv->ptr++ = stm32_i2c_getreg(priv, STM32_I2C_DR_OFFSET);
@@ -1708,7 +1706,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
            * this should be able to handle it).
            */
 
-          i2cvdbg("DR full, SR empty. Waiting for more bytes.\n");
+          i2cinfo("DR full, SR empty. Waiting for more bytes.\n");
           stm32_i2c_traceevent(priv, I2CEVENT_READ_SR_EMPTY, 0);
         }
       else if (priv->dcnt >= 4 && priv->total_msg_len >= 3 && (status & I2C_SR1_BTF))
@@ -1717,7 +1715,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
            * RXNE(receive buffer not empty) flag.
            */
 
-          i2cvdbg("Read data from data register(DR)\n");
+          i2cinfo("Read data from data register(DR)\n");
           *priv->ptr++ = stm32_i2c_getreg(priv, STM32_I2C_DR_OFFSET);
 
           /* Decrease current message length */
@@ -1732,8 +1730,8 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
            * This coincides with EV7_2 in the reference manual.
            */
 
-          i2cvdbg("Program NACK\n");
-          i2cvdbg("Read data from data register(DR) dcnt=3\n");
+          i2cinfo("Program NACK\n");
+          i2cinfo("Read data from data register(DR) dcnt=3\n");
 
           stm32_i2c_traceevent(priv, I2CEVENT_READ_3, priv->dcnt);
 
@@ -1753,10 +1751,10 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
         }
       else if (priv->dcnt == 2 && (status & I2C_SR1_BTF) && priv->total_msg_len >= 3)
         {
-          i2cvdbg("Program stop\n");
-          i2cvdbg("Read data from data register(DR) dcnt=2\n");
-          i2cvdbg("Read data from data register(SR) dcnt=1\n");
-          i2cvdbg("Setting condition to stop ISR dcnt = -1\n");
+          i2cinfo("Program stop\n");
+          i2cinfo("Read data from data register(DR) dcnt=2\n");
+          i2cinfo("Read data from data register(SR) dcnt=1\n");
+          i2cinfo("Setting condition to stop ISR dcnt = -1\n");
 
           stm32_i2c_traceevent(priv, I2CEVENT_READ_3, priv->dcnt);
 
@@ -1783,8 +1781,8 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
 
       else
         {
-          i2cdbg("I2C read mode no correct state detected\n");
-          i2cdbg(" state %i, dcnt=%i\n", status, priv->dcnt);
+          i2cerr("ERROR: I2C read mode no correct state detected\n");
+          i2cerr("  state %i, dcnt=%i\n", status, priv->dcnt);
 
           /* set condition to terminate ISR and wake waiting thread */
 
@@ -1809,7 +1807,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
       /* Read rest of the state */
 
       status |= (stm32_i2c_getreg(priv, STM32_I2C_SR2_OFFSET) << 16);
-      i2cdbg("Empty call to ISR: Stopping ISR\n");
+      i2cwarn("WARNING: Empty call to ISR: Stopping ISR\n");
       stm32_i2c_traceevent(priv, I2CEVENT_ISR_EMPTY_CALL, 0);
     }
 
@@ -1833,8 +1831,8 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
 
       status |= (stm32_i2c_getreg(priv, STM32_I2C_SR2_OFFSET) << 16);
 
-      i2cdbg(" No correct state detected(start bit, read or write) \n");
-      i2cdbg(" state %i\n", status);
+      i2cerr("ERROR:  No correct state detected(start bit, read or write) \n");
+      i2cerr("   state %i\n", status);
 
       /* set condition to terminate ISR and wake waiting thread */
 
@@ -1853,7 +1851,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
 
   if (priv->dcnt == -1 && priv->msgc == 0)
     {
-      i2cvdbg("Shutting down I2C ISR\n");
+      i2cinfo("Shutting down I2C ISR\n");
 
       stm32_i2c_traceevent(priv, I2CEVENT_ISR_SHUTDOWN, 0);
 
@@ -1901,7 +1899,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
 
 #ifndef CONFIG_I2C_POLLED
 #ifdef CONFIG_STM32_I2C1
-static int stm32_i2c1_isr(int irq, void *context)
+static int stm32_i2c1_isr(int irq, void *context, FAR void *arg)
 {
   return stm32_i2c_isr(&stm32_i2c1_priv);
 }
@@ -1916,7 +1914,7 @@ static int stm32_i2c1_isr(int irq, void *context)
  ************************************************************************************/
 
 #ifdef CONFIG_STM32_I2C2
-static int stm32_i2c2_isr(int irq, void *context)
+static int stm32_i2c2_isr(int irq, void *context, FAR void *arg)
 {
   return stm32_i2c_isr(&stm32_i2c2_priv);
 }
@@ -1931,7 +1929,7 @@ static int stm32_i2c2_isr(int irq, void *context)
  ************************************************************************************/
 
 #ifdef CONFIG_STM32_I2C3
-static int stm32_i2c3_isr(int irq, void *context)
+static int stm32_i2c3_isr(int irq, void *context, FAR void *arg)
 {
   return stm32_i2c_isr(&stm32_i2c3_priv);
 }
@@ -1976,8 +1974,8 @@ static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv)
   /* Attach ISRs */
 
 #ifndef CONFIG_I2C_POLLED
-  irq_attach(priv->config->ev_irq, priv->config->isr);
-  irq_attach(priv->config->er_irq, priv->config->isr);
+  irq_attach(priv->config->ev_irq, priv->config->isr, NULL);
+  irq_attach(priv->config->er_irq, priv->config->isr, NULL);
   up_enable_irq(priv->config->ev_irq);
   up_enable_irq(priv->config->er_irq);
 #endif
@@ -2126,7 +2124,7 @@ static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s
       status = stm32_i2c_getstatus(priv);
       ret = -ETIMEDOUT;
 
-      i2cdbg("Timed out: CR1: 0x%04x status: 0x%08x\n",
+      i2cerr("ERROR: Timed out: CR1: 0x%04x status: 0x%08x\n",
              stm32_i2c_getreg(priv, STM32_I2C_CR1_OFFSET), status);
 
       /* "Note: When the STOP, START or PEC bit is set, the software must
@@ -2156,7 +2154,8 @@ static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s
        * Note: this commentary is found in both places.
        *
        */
-      i2cdbg("Check if the address was valid\n");
+
+      i2cinfo("Check if the address was valid\n");
       stm32_i2c_sendstop(priv);
 #endif
       /* Clear busy flag in case of timeout */
diff --git a/arch/arm/src/stm32/stm32_idle.c b/arch/arm/src/stm32/stm32_idle.c
index 0786f2ac99cb917bc10c9f6d7ee70a9545effb6f..648c0c1521f4576841e90dbc168a420f4eb60374 100644
--- a/arch/arm/src/stm32/stm32_idle.c
+++ b/arch/arm/src/stm32/stm32_idle.c
@@ -101,7 +101,7 @@ static void up_idlepm(void)
 
       /* Perform board-specific, state-dependent logic here */
 
-      llvdbg("newstate= %d oldstate=%d\n", newstate, oldstate);
+      _info("newstate= %d oldstate=%d\n", newstate, oldstate);
 
       /* Then force the global state change */
 
diff --git a/arch/arm/src/stm32/stm32_irq.c b/arch/arm/src/stm32/stm32_irq.c
index e6a347c00ac3e26e11c2571e81b2bd308a08769e..051c9829794730b96495714c5f918c994dfdd80e 100644
--- a/arch/arm/src/stm32/stm32_irq.c
+++ b/arch/arm/src/stm32/stm32_irq.c
@@ -107,40 +107,42 @@ extern uint32_t _vectors[];
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_IRQ)
+#if defined(CONFIG_DEBUG_IRQ_INFO)
 static void stm32_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = enter_critical_section();
-  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  lldbg("  INTCTRL:    %08x VECTAB:  %08x\n",
-        getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
+
+  irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
+  irqinfo("  INTCTRL:    %08x VECTAB:  %08x\n",
+          getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
 #if 0
-  lldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
-        getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
-        getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+  irqinfo("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+          getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
+          getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
 #endif
-  lldbg("  IRQ ENABLE: %08x %08x %08x\n",
-        getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
-        getreg32(NVIC_IRQ64_95_ENABLE));
-  lldbg("  SYSH_PRIO:  %08x %08x %08x\n",
-        getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
-        getreg32(NVIC_SYSH12_15_PRIORITY));
-  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
-        getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
-        getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
-        getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
-        getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
-  lldbg("              %08x\n",
-        getreg32(NVIC_IRQ64_67_PRIORITY));
+  irqinfo("  IRQ ENABLE: %08x %08x %08x\n",
+          getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
+          getreg32(NVIC_IRQ64_95_ENABLE));
+  irqinfo("  SYSH_PRIO:  %08x %08x %08x\n",
+          getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+          getreg32(NVIC_SYSH12_15_PRIORITY));
+  irqinfo("  IRQ PRIO:   %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
+          getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
+          getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
+          getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
+          getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+  irqinfo("              %08x\n",
+          getreg32(NVIC_IRQ64_67_PRIORITY));
+
   leave_critical_section(flags);
 }
 #else
@@ -158,51 +160,51 @@ static void stm32_dumpnvic(const char *msg, int irq)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
-static int stm32_nmi(int irq, FAR void *context)
+#ifdef CONFIG_DEBUG_FEATURES
+static int stm32_nmi(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! NMI received\n");
+  _err("PANIC!!! NMI received\n");
   PANIC();
   return 0;
 }
 
-static int stm32_busfault(int irq, FAR void *context)
+static int stm32_busfault(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
+  _err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
   PANIC();
   return 0;
 }
 
-static int stm32_usagefault(int irq, FAR void *context)
+static int stm32_usagefault(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
+  _err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
   PANIC();
   return 0;
 }
 
-static int stm32_pendsv(int irq, FAR void *context)
+static int stm32_pendsv(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! PendSV received\n");
+  _err("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
 }
 
-static int stm32_dbgmonitor(int irq, FAR void *context)
+static int stm32_dbgmonitor(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Debug Monitor received\n");
+  _err("PANIC!!! Debug Monitor received\n");
   PANIC();
   return 0;
 }
 
-static int stm32_reserved(int irq, FAR void *context)
+static int stm32_reserved(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Reserved interrupt\n");
+  _err("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;
 }
@@ -243,31 +245,17 @@ static inline void stm32_prioritize_syscall(int priority)
 static int stm32_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
                          uintptr_t offset)
 {
+  int n;
+
   DEBUGASSERT(irq >= STM32_IRQ_NMI && irq < NR_IRQS);
 
   /* Check for external interrupt */
 
   if (irq >= STM32_IRQ_FIRST)
     {
-      if (irq < STM32_IRQ_FIRST + 32)
-        {
-           *regaddr = (NVIC_IRQ0_31_ENABLE + offset);
-           *bit     = 1 << (irq - STM32_IRQ_FIRST);
-        }
-      else if (irq < STM32_IRQ_FIRST + 64)
-        {
-           *regaddr = (NVIC_IRQ32_63_ENABLE + offset);
-           *bit     = 1 << (irq - STM32_IRQ_FIRST - 32);
-        }
-      else if (irq < NR_IRQS)
-        {
-           *regaddr = (NVIC_IRQ64_95_ENABLE + offset);
-           *bit     = 1 << (irq - STM32_IRQ_FIRST - 64);
-        }
-      else
-        {
-          return ERROR; /* Invalid interrupt */
-        }
+      n        = irq - STM32_IRQ_FIRST;
+      *regaddr = NVIC_IRQ_ENABLE(n) + offset;
+      *bit     = (uint32_t)1 << (n & 0x1f);
     }
 
   /* Handle processor exceptions.  Only a few can be disabled */
@@ -313,11 +301,14 @@ void up_irqinitialize(void)
 {
   uint32_t regaddr;
   int num_priority_registers;
+  int i;
 
   /* Disable all interrupts */
 
-  putreg32(0, NVIC_IRQ0_31_ENABLE);
-  putreg32(0, NVIC_IRQ32_63_ENABLE);
+  for (i = 0; i < NR_IRQS - STM32_IRQ_FIRST; i += 32)
+    {
+      putreg32(0xffffffff, NVIC_IRQ_CLEAR(i));
+    }
 
   /* Colorize the interrupt stack for debug purposes */
 
@@ -385,8 +376,8 @@ void up_irqinitialize(void)
    * under certain conditions.
    */
 
-  irq_attach(STM32_IRQ_SVCALL, up_svcall);
-  irq_attach(STM32_IRQ_HARDFAULT, up_hardfault);
+  irq_attach(STM32_IRQ_SVCALL, up_svcall, NULL);
+  irq_attach(STM32_IRQ_HARDFAULT, up_hardfault, NULL);
 
   /* Set the priority of the SVCall interrupt */
 
@@ -402,22 +393,22 @@ void up_irqinitialize(void)
    */
 
 #ifdef CONFIG_ARM_MPU
-  irq_attach(STM32_IRQ_MEMFAULT, up_memfault);
+  irq_attach(STM32_IRQ_MEMFAULT, up_memfault, NULL);
   up_enable_irq(STM32_IRQ_MEMFAULT);
 #endif
 
   /* Attach all other processor exceptions (except reset and sys tick) */
 
-#ifdef CONFIG_DEBUG
-  irq_attach(STM32_IRQ_NMI, stm32_nmi);
+#ifdef CONFIG_DEBUG_FEATURES
+  irq_attach(STM32_IRQ_NMI, stm32_nmi, NULL);
 #ifndef CONFIG_ARM_MPU
-  irq_attach(STM32_IRQ_MEMFAULT, up_memfault);
+  irq_attach(STM32_IRQ_MEMFAULT, up_memfault, NULL);
 #endif
-  irq_attach(STM32_IRQ_BUSFAULT, stm32_busfault);
-  irq_attach(STM32_IRQ_USAGEFAULT, stm32_usagefault);
-  irq_attach(STM32_IRQ_PENDSV, stm32_pendsv);
-  irq_attach(STM32_IRQ_DBGMONITOR, stm32_dbgmonitor);
-  irq_attach(STM32_IRQ_RESERVED, stm32_reserved);
+  irq_attach(STM32_IRQ_BUSFAULT, stm32_busfault, NULL);
+  irq_attach(STM32_IRQ_USAGEFAULT, stm32_usagefault, NULL);
+  irq_attach(STM32_IRQ_PENDSV, stm32_pendsv, NULL);
+  irq_attach(STM32_IRQ_DBGMONITOR, stm32_dbgmonitor, NULL);
+  irq_attach(STM32_IRQ_RESERVED, stm32_reserved, NULL);
 #endif
 
   stm32_dumpnvic("initial", NR_IRQS);
diff --git a/arch/arm/src/stm32/stm32_iwdg.c b/arch/arm/src/stm32/stm32_iwdg.c
index 80d45be7292a4a8e9c111f6dd5ac49da2f786690..1cdf8e47bc07fc5fd68c88ae9b2917e57c6e0267 100644
--- a/arch/arm/src/stm32/stm32_iwdg.c
+++ b/arch/arm/src/stm32/stm32_iwdg.c
@@ -84,6 +84,10 @@
 #  define CONFIG_STM32_IWDG_DEFTIMOUT IWDG_MAXTIMEOUT
 #endif
 
+#ifndef CONFIG_DEBUG_WATCHDOG_INFO
+#  undef CONFIG_STM32_IWDG_REGDEBUG
+#endif
+
 /* REVISIT:  It appears that you can only setup the prescaler and reload
  * registers once.  After that, the SR register's PVU and RVU bits never go
  * to zero.  So we defer setting up these registers until the watchdog
@@ -105,20 +109,6 @@
 #  error "Both CONFIG_STM32_IWDG_ONETIMESETUP and CONFIG_STM32_IWDG_DEFERREDSETUP are defined"
 #endif
 
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing the watchdog
- * driver.  NOTE: that only lldbg types are used so that the output is
- * immediately available.
- */
-
-#ifdef CONFIG_DEBUG_WATCHDOG
-#  define wddbg    lldbg
-#  define wdvdbg   llvdbg
-#else
-#  define wddbg(x...)
-#  define wdvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -143,7 +133,7 @@ struct stm32_lowerhalf_s
  ****************************************************************************/
 /* Register operations ******************************************************/
 
-#if defined(CONFIG_STM32_IWDG_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32_IWDG_REGDEBUG
 static uint16_t stm32_getreg(uint32_t addr);
 static void     stm32_putreg(uint16_t val, uint32_t addr);
 #else
@@ -195,7 +185,7 @@ static struct stm32_lowerhalf_s g_wdgdev;
  *
  ****************************************************************************/
 
-#if defined(CONFIG_STM32_IWDG_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32_IWDG_REGDEBUG
 static uint16_t stm32_getreg(uint32_t addr)
 {
   static uint32_t prevaddr = 0;
@@ -216,7 +206,7 @@ static uint16_t stm32_getreg(uint32_t addr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              wdinfo("...\n");
             }
 
           return val;
@@ -233,7 +223,7 @@ static uint16_t stm32_getreg(uint32_t addr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          wdinfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -245,7 +235,7 @@ static uint16_t stm32_getreg(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%04x\n", addr, val);
+  wdinfo("%08x->%04x\n", addr, val);
   return val;
 }
 #endif
@@ -258,12 +248,12 @@ static uint16_t stm32_getreg(uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_STM32_IWDG_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32_IWDG_REGDEBUG
 static void stm32_putreg(uint16_t val, uint32_t addr)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%04x\n", addr, val);
+  wdinfo("%08x<-%04x\n", addr, val);
 
   /* Write the value */
 
@@ -339,7 +329,7 @@ static int stm32_start(FAR struct watchdog_lowerhalf_s *lower)
   FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
   irqstate_t flags;
 
-  wdvdbg("Entry: started=%d\n");
+  wdinfo("Entry: started=%d\n");
   DEBUGASSERT(priv);
 
   /* Have we already been started? */
@@ -394,7 +384,7 @@ static int stm32_stop(FAR struct watchdog_lowerhalf_s *lower)
 {
   /* There is no way to disable the IDWG timer once it has been started */
 
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
   return -ENOSYS;
 }
 
@@ -420,7 +410,7 @@ static int stm32_keepalive(FAR struct watchdog_lowerhalf_s *lower)
   FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
   irqstate_t flags;
 
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
 
   /* Reload the IWDG timer */
 
@@ -455,7 +445,7 @@ static int stm32_getstatus(FAR struct watchdog_lowerhalf_s *lower,
   uint32_t ticks;
   uint32_t elapsed;
 
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
   DEBUGASSERT(priv);
 
   /* Return the status bit */
@@ -484,10 +474,10 @@ static int stm32_getstatus(FAR struct watchdog_lowerhalf_s *lower,
 
   status->timeleft = priv->timeout - elapsed;
 
-  wdvdbg("Status     :\n");
-  wdvdbg("  flags    : %08x\n", status->flags);
-  wdvdbg("  timeout  : %d\n", status->timeout);
-  wdvdbg("  timeleft : %d\n", status->timeleft);
+  wdinfo("Status     :\n");
+  wdinfo("  flags    : %08x\n", status->flags);
+  wdinfo("  timeout  : %d\n", status->timeout);
+  wdinfo("  timeleft : %d\n", status->timeleft);
   return OK;
 }
 
@@ -516,14 +506,14 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower,
   int prescaler;
   int shift;
 
-  wdvdbg("Entry: timeout=%d\n", timeout);
+  wdinfo("Entry: timeout=%d\n", timeout);
   DEBUGASSERT(priv);
 
   /* Can this timeout be represented? */
 
   if (timeout < 1 || timeout > IWDG_MAXTIMEOUT)
     {
-      wddbg("Cannot represent timeout=%d > %d\n",
+      wderr("ERROR: Cannot represent timeout=%d > %d\n",
             timeout, IWDG_MAXTIMEOUT);
       return -ERANGE;
     }
@@ -536,7 +526,7 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower,
 #ifdef CONFIG_STM32_IWDG_ONETIMESETUP
   if (priv->started)
     {
-      wddbg("Timer is already started\n");
+      wdwarn("WARNING: Timer is already started\n");
       return -EBUSY;
     }
 #endif
@@ -631,7 +621,7 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower,
     }
 #endif
 
-  wdvdbg("prescaler=%d fiwdg=%d reload=%d\n", prescaler, fiwdg, reload);
+  wdinfo("prescaler=%d fiwdg=%d reload=%d\n", prescaler, fiwdg, reload);
 
   return OK;
 }
@@ -662,7 +652,7 @@ void stm32_iwdginitialize(FAR const char *devpath, uint32_t lsifreq)
 {
   FAR struct stm32_lowerhalf_s *priv = &g_wdgdev;
 
-  wdvdbg("Entry: devpath=%s lsifreq=%d\n", devpath, lsifreq);
+  wdinfo("Entry: devpath=%s lsifreq=%d\n", devpath, lsifreq);
 
   /* NOTE we assume that clocking to the IWDG has already been provided by
    * the RCC initialization logic.
@@ -682,7 +672,7 @@ void stm32_iwdginitialize(FAR const char *devpath, uint32_t lsifreq)
    */
 
   stm32_rcc_enablelsi();
-  wdvdbg("RCC CSR: %08x\n", getreg32(STM32_RCC_CSR));
+  wdinfo("RCC CSR: %08x\n", getreg32(STM32_RCC_CSR));
 
   /* Select an arbitrary initial timeout value.  But don't start the watchdog
    * yet. NOTE: If the "Hardware watchdog" feature is enabled through the
diff --git a/arch/arm/src/stm32/stm32_lowputc.c b/arch/arm/src/stm32/stm32_lowputc.c
index 0bffb74808abc06619be620f1c5fcf7583b2a5be..856879454a01aa9c78b81355f553d11ff5d6024a 100644
--- a/arch/arm/src/stm32/stm32_lowputc.c
+++ b/arch/arm/src/stm32/stm32_lowputc.c
@@ -62,7 +62,11 @@
 #ifdef HAVE_CONSOLE
 #  if defined(CONFIG_USART1_SERIAL_CONSOLE)
 #    define STM32_CONSOLE_BASE     STM32_USART1_BASE
-#    define STM32_APBCLOCK         STM32_PCLK2_FREQUENCY
+#    if defined(CONFIG_STM32_STM32F33XX)
+#      define STM32_APBCLOCK         STM32_PCLK1_FREQUENCY /* Errata 2.5.1 */
+#    else
+#      define STM32_APBCLOCK         STM32_PCLK2_FREQUENCY
+#    endif
 #    define STM32_CONSOLE_APBREG   STM32_RCC_APB2ENR
 #    define STM32_CONSOLE_APBEN    RCC_APB2ENR_USART1EN
 #    define STM32_CONSOLE_BAUD     CONFIG_USART1_BAUD
@@ -230,7 +234,8 @@
 #    define USART_CR1_PARITY_VALUE 0
 #  endif
 
-#  if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+#  if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+   defined(CONFIG_STM32_STM32F37XX)
 #    define USART_CR1_CLRBITS\
       (USART_CR1_UESM | USART_CR1_RE | USART_CR1_TE | USART_CR1_PS | \
        USART_CR1_PCE | USART_CR1_WAKE | USART_CR1_M | USART_CR1_MME | \
@@ -252,7 +257,8 @@
 #    define USART_CR2_STOP2_VALUE 0
 #  endif
 
-#  if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+#  if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+   defined(CONFIG_STM32_STM32F37XX)
 #    define USART_CR2_CLRBITS \
       (USART_CR2_ADDM7 | USART_CR2_LBDL | USART_CR2_LBDIE | USART_CR2_LBCL | \
        USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_CLKEN | USART_CR2_STOP_MASK | \
@@ -268,7 +274,8 @@
 
   /* CR3 settings */
 
-#  if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+#  if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+   defined(CONFIG_STM32_STM32F37XX)
 
 #    define USART_CR3_CLRBITS \
       (USART_CR3_EIE | USART_CR3_IREN | USART_CR3_IRLP | USART_CR3_HDSEL | \
@@ -288,7 +295,8 @@
 
   /* Calculate USART BAUD rate divider */
 
-#  if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+#  if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+   defined(CONFIG_STM32_STM32F37XX)
 
     /* Baud rate for standard USART (SPI mode included):
      *
@@ -563,8 +571,8 @@ void stm32_lowsetup(void)
 }
 
 #elif defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F20XX) || \
-      defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) || \
-      defined(CONFIG_STM32_STM32F40XX)
+      defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+      defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX)
 
 void stm32_lowsetup(void)
 {
diff --git a/arch/arm/src/stm32/stm32_lse.c b/arch/arm/src/stm32/stm32_lse.c
index 18334852ba21190aa56705866d4714cf7c8beb71..64e697976eade7b9521c591938caa18bbce5479b 100644
--- a/arch/arm/src/stm32/stm32_lse.c
+++ b/arch/arm/src/stm32/stm32_lse.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32/stm32_lse.c
  *
- *   Copyright (C) 2009, 2011, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2011, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -45,18 +45,6 @@
 #include "stm32_rcc.h"
 #include "stm32_waste.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -74,14 +62,12 @@
 
 void stm32_rcc_enablelse(void)
 {
-  bool bkpenabled;
-
   /* The LSE is in the RTC domain and write access is denied to this domain
    * after reset, you have to enable write access using DBP bit in the PWR CR
    * register before to configuring the LSE.
    */
 
-  bkpenabled = stm32_pwr_enablebkp(true);
+  stm32_pwr_enablebkp(true);
 
 #if defined(CONFIG_STM32_STM32L15XX)
   /* Enable the External Low-Speed (LSE) oscillator by setting the LSEON bit
@@ -115,8 +101,5 @@ void stm32_rcc_enablelse(void)
 
   /* Disable backup domain access if it was disabled on entry */
 
-  if (!bkpenabled)
-    {
-      (void)stm32_pwr_enablebkp(false);
-    }
+  stm32_pwr_enablebkp(false);
 }
diff --git a/arch/arm/src/stm32/stm32_ltdc.c b/arch/arm/src/stm32/stm32_ltdc.c
index 8ae8e890fdb99fe1fedfeb73f20c874e4f30b6f2..2573730172c3902b17a23815eaea7512f119d8bb 100644
--- a/arch/arm/src/stm32/stm32_ltdc.c
+++ b/arch/arm/src/stm32/stm32_ltdc.c
@@ -49,8 +49,9 @@
 #include 
 
 #include 
-#include 
 #include 
+#include 
+#include 
 
 #include 
 #include 
@@ -283,11 +284,11 @@
 /* Debug option */
 
 #ifdef CONFIG_STM32_LTDC_REGDEBUG
-#  define regdbg       dbg
-#  define regvdbg      vdbg
+#  define regerr       lcderr
+#  define reginfo      lcdinfo
 #else
-#  define regdbg(x...)
-#  define regvdbg(x...)
+#  define regerr(x...)
+#  define reginfo(x...)
 #endif
 
 /* Preallocated LTDC framebuffers */
@@ -549,7 +550,7 @@ static void stm32_ltdc_periphconfig(void);
 static void stm32_ltdc_bgcolor(uint32_t rgb);
 static void stm32_ltdc_dither(bool enable, uint8_t red,
                               uint8_t green, uint8_t blue);
-static int stm32_ltdcirq(int irq, void *context);
+static int stm32_ltdcirq(int irq, void *context, FAR void *arg);
 static int stm32_ltdc_waitforirq(void);
 static int stm32_ltdc_reload(uint8_t value, bool waitvblank);
 
@@ -942,13 +943,13 @@ static void stm32_ltdc_gpioconfig(void)
 {
   int i;
 
-  gvdbg("Configuring pins\n");
+  lcdinfo("Configuring pins\n");
 
   /* Configure each pin */
 
   for (i = 0; i < STM32_LTDC_NPINCONFIGS; i++)
     {
-      regvdbg("set gpio%d = %08x\n", i, g_ltdcpins[i]);
+      reginfo("set gpio%d = %08x\n", i, g_ltdcpins[i]);
       stm32_configgpio(g_ltdcpins[i]);
     }
 }
@@ -972,51 +973,51 @@ static void stm32_ltdc_periphconfig(void)
 
   /* Configure APB2 LTDC clock external */
 
-  regvdbg("configured RCC_APB2ENR=%08x\n", getreg32(STM32_RCC_APB2ENR));
+  reginfo("configured RCC_APB2ENR=%08x\n", getreg32(STM32_RCC_APB2ENR));
 
   /* Configure the SAI PLL external to provide the LCD_CLK */
 
-  regvdbg("configured RCC_PLLSAI=%08x\n", getreg32(STM32_RCC_PLLSAICFGR));
+  reginfo("configured RCC_PLLSAI=%08x\n", getreg32(STM32_RCC_PLLSAICFGR));
 
   /* Configure dedicated clock external */
 
-  regvdbg("configured RCC_DCKCFGR=%08x\n", getreg32(STM32_RCC_DCKCFGR));
+  reginfo("configured RCC_DCKCFGR=%08x\n", getreg32(STM32_RCC_DCKCFGR));
 
   /* Configure LTDC_SSCR */
 
   regval = (STM32_LTDC_SSCR_VSH | STM32_LTDC_SSCR_HSW);
-  regvdbg("set LTDC_SSCR=%08x\n", regval);
+  reginfo("set LTDC_SSCR=%08x\n", regval);
   putreg32(regval, STM32_LTDC_SSCR);
-  regvdbg("configured LTDC_SSCR=%08x\n", getreg32(STM32_LTDC_SSCR));
+  reginfo("configured LTDC_SSCR=%08x\n", getreg32(STM32_LTDC_SSCR));
 
   /* Configure LTDC_BPCR */
 
   regval = (STM32_LTDC_BPCR_AVBP | STM32_LTDC_BPCR_AHBP);
-  regvdbg("set LTDC_BPCR=%08x\n", regval);
+  reginfo("set LTDC_BPCR=%08x\n", regval);
   putreg32(regval, STM32_LTDC_BPCR);
-  regvdbg("configured LTDC_BPCR=%08x\n", getreg32(STM32_LTDC_BPCR));
+  reginfo("configured LTDC_BPCR=%08x\n", getreg32(STM32_LTDC_BPCR));
 
   /* Configure LTDC_AWCR */
 
   regval = (STM32_LTDC_AWCR_AAH | STM32_LTDC_AWCR_AAW);
-  regvdbg("set LTDC_AWCR=%08x\n", regval);
+  reginfo("set LTDC_AWCR=%08x\n", regval);
   putreg32(regval, STM32_LTDC_AWCR);
-  regvdbg("configured LTDC_AWCR=%08x\n", getreg32(STM32_LTDC_AWCR));
+  reginfo("configured LTDC_AWCR=%08x\n", getreg32(STM32_LTDC_AWCR));
 
   /* Configure LTDC_TWCR */
 
   regval = (STM32_LTDC_TWCR_TOTALH | STM32_LTDC_TWCR_TOTALW);
-  regvdbg("set LTDC_TWCR=%08x\n", regval);
+  reginfo("set LTDC_TWCR=%08x\n", regval);
   putreg32(regval, STM32_LTDC_TWCR);
-  regvdbg("configured LTDC_TWCR=%08x\n", getreg32(STM32_LTDC_TWCR));
+  reginfo("configured LTDC_TWCR=%08x\n", getreg32(STM32_LTDC_TWCR));
 
   /* Configure LTDC_GCR */
 
   regval = (STM32_LTDC_GCR_PCPOL | STM32_LTDC_GCR_DEPOL
            | STM32_LTDC_GCR_VSPOL | STM32_LTDC_GCR_HSPOL);
-  regvdbg("set LTDC_GCR=%08x\n", regval);
+  reginfo("set LTDC_GCR=%08x\n", regval);
   putreg32(regval, STM32_LTDC_GCR);
-  regvdbg("configured LTDC_GCR=%08x\n", getreg32(STM32_LTDC_GCR));
+  reginfo("configured LTDC_GCR=%08x\n", getreg32(STM32_LTDC_GCR));
 }
 
 /****************************************************************************
@@ -1032,9 +1033,9 @@ static void stm32_ltdc_periphconfig(void)
 
 static void stm32_ltdc_bgcolor(uint32_t rgb)
 {
-  regvdbg("set LTDC_BCCR=%08x\n", rgb);
+  reginfo("set LTDC_BCCR=%08x\n", rgb);
   putreg32(rgb, STM32_LTDC_BCCR);
-  regvdbg("configured LTDC_BCCR=%08x\n", getreg32(STM32_LTDC_BCCR));
+  reginfo("configured LTDC_BCCR=%08x\n", getreg32(STM32_LTDC_BCCR));
 }
 
 /****************************************************************************
@@ -1073,9 +1074,9 @@ static void stm32_ltdc_dither(bool enable,
                 LTDC_GCR_DGW(0) | LTDC_GCR_DBW(0));
   regval |= (LTDC_GCR_DRW(red) | LTDC_GCR_DGW(green) | LTDC_GCR_DBW(blue));
 
-  regvdbg("set LTDC_GCR=%08x\n", regval);
+  reginfo("set LTDC_GCR=%08x\n", regval);
   putreg32(regval, STM32_LTDC_GCR);
-  regvdbg("configured LTDC_GCR=%08x\n", getreg32(STM32_LTDC_GCR));
+  reginfo("configured LTDC_GCR=%08x\n", getreg32(STM32_LTDC_GCR));
 }
 
 /****************************************************************************
@@ -1090,9 +1091,9 @@ static void stm32_ltdc_linepos(void)
 {
   /* Configure LTDC_LIPCR */
 
-  regvdbg("set LTDC_LIPCR=%08x\n", STM32_LTDC_LIPCR_LIPOS);
+  reginfo("set LTDC_LIPCR=%08x\n", STM32_LTDC_LIPCR_LIPOS);
   putreg32(STM32_LTDC_LIPCR_LIPOS, STM32_LTDC_LIPCR);
-  regvdbg("configured LTDC_LIPCR=%08x\n", getreg32(STM32_LTDC_LIPCR));
+  reginfo("configured LTDC_LIPCR=%08x\n", getreg32(STM32_LTDC_LIPCR));
 }
 
 /****************************************************************************
@@ -1114,9 +1115,9 @@ static void stm32_ltdc_irqctrl(uint32_t setirqs, uint32_t clrirqs)
   regval = getreg32(STM32_LTDC_IER);
   regval &= ~clrirqs;
   regval |= setirqs;
-  regvdbg("set LTDC_IER=%08x\n", regval);
+  reginfo("set LTDC_IER=%08x\n", regval);
   putreg32(regval, STM32_LTDC_IER);
-  regvdbg("configured LTDC_IER=%08x\n", getreg32(STM32_LTDC_IER));
+  reginfo("configured LTDC_IER=%08x\n", getreg32(STM32_LTDC_IER));
 }
 
 /****************************************************************************
@@ -1127,13 +1128,13 @@ static void stm32_ltdc_irqctrl(uint32_t setirqs, uint32_t clrirqs)
  *
  ****************************************************************************/
 
-static int stm32_ltdcirq(int irq, void *context)
+static int stm32_ltdcirq(int irq, void *context, FAR void *arg)
 {
   FAR struct stm32_interrupt_s *priv = &g_interrupt;
 
   uint32_t regval = getreg32(STM32_LTDC_ISR);
 
-  regvdbg("irq = %d, regval = %08x\n", irq, regval);
+  reginfo("irq = %d, regval = %08x\n", irq, regval);
 
   if (regval & LTDC_ISR_RRIF)
     {
@@ -1155,7 +1156,7 @@ static int stm32_ltdcirq(int irq, void *context)
 
           if (ret != OK)
             {
-              dbg("sem_post() failed\n");
+              lcderr("ERROR: sem_post() failed\n");
               return ret;
             }
         }
@@ -1202,7 +1203,7 @@ static int stm32_ltdc_waitforirq(void)
 
       if (ret != OK)
         {
-          dbg("sem_wait() failed\n");
+          lcderr("ERROR: sem_wait() failed\n");
         }
     }
 
@@ -1255,9 +1256,9 @@ static int stm32_ltdc_reload(uint8_t value, bool waitvblank)
    * immediately reload is set.
    */
 
-  regvdbg("set LTDC_SRCR=%08x\n", value);
+  reginfo("set LTDC_SRCR=%08x\n", value);
   putreg32(value, STM32_LTDC_SRCR);
-  regvdbg("configured LTDC_SRCR=%08x\n", getreg32(STM32_LTDC_SRCR));
+  reginfo("configured LTDC_SRCR=%08x\n", getreg32(STM32_LTDC_SRCR));
 
   if (waitvblank & (value == LTDC_SRCR_VBR))
     {
@@ -1287,13 +1288,17 @@ static void stm32_global_configure(void)
 
   sem_init(&g_lock, 0, 1);
 
-  /* Initialize the semaphore for interrupt handling */
+  /* Initialize the semaphore for interrupt handling.  This waitsem
+   * semaphore is used for signaling and, hence, should not have priority
+   * inheritance enabled.
+   */
 
   sem_init(g_interrupt.sem, 0, 0);
+  sem_setprotocol(g_interrupt.sem, SEM_PRIO_NONE);
 
   /* Attach LTDC interrupt vector */
 
-  (void)irq_attach(g_interrupt.irq, stm32_ltdcirq);
+  (void)irq_attach(g_interrupt.irq, stm32_ltdcirq, NULL);
 
   /* Enable the IRQ at the NVIC */
 
@@ -1354,7 +1359,7 @@ static void stm32_lcd_enable(bool enable)
   uint32_t    regval;
 
   regval = getreg32(STM32_LTDC_GCR);
-  regvdbg("get LTDC_GCR=%08x\n", regval);
+  reginfo("get LTDC_GCR=%08x\n", regval);
 
   if (enable == true)
     {
@@ -1365,9 +1370,9 @@ static void stm32_lcd_enable(bool enable)
       regval &= ~LTDC_GCR_LTDCEN;
     }
 
-  regvdbg("set LTDC_GCR=%08x\n", regval);
+  reginfo("set LTDC_GCR=%08x\n", regval);
   putreg32(regval, STM32_LTDC_GCR);
-  regvdbg("configured LTDC_GCR=%08x\n", getreg32(STM32_LTDC_GCR));
+  reginfo("configured LTDC_GCR=%08x\n", getreg32(STM32_LTDC_GCR));
 }
 
 /****************************************************************************
@@ -1392,7 +1397,7 @@ static void stm32_ltdc_lclutenable(FAR struct stm32_layer_s *layer, bool enable)
   uint32_t    regval;
 
   regval = getreg32(stm32_cr_layer_t[layer->state.lid]);
-  regvdbg("get LTDC_L%dCR=%08x\n", layer->state.lid + 1, regval);
+  reginfo("get LTDC_L%dCR=%08x\n", layer->state.lid + 1, regval);
 
   /* Disable the clut support during update the color table */
 
@@ -1405,7 +1410,7 @@ static void stm32_ltdc_lclutenable(FAR struct stm32_layer_s *layer, bool enable)
       regval &= ~LTDC_LxCR_CLUTEN;
     }
 
-  regvdbg("set LTDC_L%dCR=%08x\n", layer->state.lid + 1, regval);
+  reginfo("set LTDC_L%dCR=%08x\n", layer->state.lid + 1, regval);
   putreg32(regval, stm32_cr_layer_t[layer->state.lid]);
 }
 #endif
@@ -1519,17 +1524,17 @@ static int stm32_ltdc_lvalidatearea(FAR struct stm32_layer_s *layer,
       (srcypos > ypos + yres - 1))
 
     {
-      gdbg("layer coordinates out of valid area: xpos = %d > %d, \
-           ypos = %d > %d, width = %d > %d, height = %d > %d, \
-           srcxpos = %d > %d, srcypos = %d > %d",
-           xpos, vinfo->xres - 1,
-           ypos, vinfo->yres - 1,
-           xres, vinfo->xres - xpos,
-           yres, vinfo->yres - ypos,
-           srcxpos, xpos + xres - 1,
-           srcypos, ypos + yres - 1);
-
-      gdbg("Returning EINVAL\n");
+      lcderr("ERROR: layer coordinates out of valid area: xpos = %d > %d, \
+              ypos = %d > %d, width = %d > %d, height = %d > %d, \
+              srcxpos = %d > %d, srcypos = %d > %d",
+              xpos, vinfo->xres - 1,
+              ypos, vinfo->yres - 1,
+              xres, vinfo->xres - xpos,
+              yres, vinfo->yres - ypos,
+              srcxpos, xpos + xres - 1,
+              srcypos, ypos + yres - 1);
+
+      lcderr("  Returning EINVAL\n");
       return -EINVAL;
     }
 
@@ -1615,7 +1620,7 @@ static void stm32_ltdc_larea(struct stm32_layer_s *layer)
   FAR struct stm32_ltdc_s *priv = &layer->state;
   FAR struct ltdc_area_s *area = &priv->area;
 
-  regvdbg("xpos = %d, ypos = %d, xres = %d, yres = %d\n",
+  reginfo("xpos = %d, ypos = %d, xres = %d, yres = %d\n",
         area->xpos, area->ypos, area->xres, area->yres);
 
   lxpos = area->xpos + (STM32_LTDC_LxWHPCR_WHSTPOS + 1);
@@ -1633,9 +1638,9 @@ static void stm32_ltdc_larea(struct stm32_layer_s *layer)
 
   /* Configure LxWHPCR / LxWVPCR register */
 
-  regvdbg("set LTDC_L%dWHPCR=%08x\n", priv->lid + 1, whpcr);
+  reginfo("set LTDC_L%dWHPCR=%08x\n", priv->lid + 1, whpcr);
   putreg32(whpcr, stm32_whpcr_layer_t[priv->lid]);
-  regvdbg("set LTDC_L%dWVPCR=%08x\n", priv->lid + 1, wvpcr);
+  reginfo("set LTDC_L%dWVPCR=%08x\n", priv->lid + 1, wvpcr);
   putreg32(wvpcr, stm32_wvpcr_layer_t[priv->lid]);
 
   /* Configure framebuffer */
@@ -1664,7 +1669,7 @@ static void stm32_ltdc_lpixelformat(FAR struct stm32_layer_s *layer)
 {
   /* Configure PFCR register */
 
-  regvdbg("set LTDC_L%dPFCR=%08x\n", layer->state.lid + 1,
+  reginfo("set LTDC_L%dPFCR=%08x\n", layer->state.lid + 1,
             stm32_fmt_layer_t[layer->state.lid]);
   putreg32(stm32_fmt_layer_t[layer->state.lid],
             stm32_pfcr_layer_t[layer->state.lid]);
@@ -1698,7 +1703,7 @@ static inline void stm32_ltdc_lframebuffer(FAR struct stm32_layer_s *layer)
   offset = priv->xpos * STM32_LTDC_Lx_BYPP(pinfo->bpp) +
             pinfo->stride * priv->ypos;
 
-  regvdbg("set LTDC_L%dCFBAR=%08x\n", priv->lid + 1, pinfo->fbmem + offset);
+  reginfo("set LTDC_L%dCFBAR=%08x\n", priv->lid + 1, pinfo->fbmem + offset);
   putreg32((uint32_t)pinfo->fbmem + offset, stm32_cfbar_layer_t[priv->lid]);
 
   /* Configure LxCFBLR register */
@@ -1708,12 +1713,12 @@ static inline void stm32_ltdc_lframebuffer(FAR struct stm32_layer_s *layer)
   cfblr = LTDC_LxCFBLR_CFBP(pinfo->stride) |
           LTDC_LxCFBLR_CFBLL(area->xres * STM32_LTDC_Lx_BYPP(pinfo->bpp) + 3);
 
-  regvdbg("set LTDC_L%dCFBLR=%08x\n", priv->lid + 1, cfblr);
+  reginfo("set LTDC_L%dCFBLR=%08x\n", priv->lid + 1, cfblr);
   putreg32(cfblr, stm32_cfblr_layer_t[priv->lid]);
 
   /* Configure LxCFBLNR register */
 
-  regvdbg("set LTDC_L%dCFBLNR=%08x\n", priv->lid + 1, area->yres);
+  reginfo("set LTDC_L%dCFBLNR=%08x\n", priv->lid + 1, area->yres);
   putreg32(area->yres, stm32_cfblnr_layer_t[priv->lid]);
 }
 
@@ -1733,7 +1738,7 @@ static inline void stm32_ltdc_lframebuffer(FAR struct stm32_layer_s *layer)
 static void stm32_ltdc_lalpha(FAR struct stm32_layer_s *layer)
 {
   uint8_t opac = stm32_ltdc_lgetopac(layer);
-  regvdbg("set LTDC_L%dCACR=%02x\n", layer->state.lid + 1, opac);
+  reginfo("set LTDC_L%dCACR=%02x\n", layer->state.lid + 1, opac);
   putreg32(opac, stm32_cacr_layer_t[layer->state.lid]);
 
   /* Clear the constant alpha operation flag */
@@ -1760,7 +1765,7 @@ static void stm32_ltdc_lalpha(FAR struct stm32_layer_s *layer)
 static void stm32_ltdc_lblendmode(FAR struct stm32_layer_s *layer,
                                     uint8_t bf1, uint8_t bf2)
 {
-  regvdbg("set LTDC_L%dBFCR=%08x\n", layer->state.lid + 1,
+  reginfo("set LTDC_L%dBFCR=%08x\n", layer->state.lid + 1,
           (LTDC_LxBFCR_BF1(bf1) | LTDC_LxBFCR_BF2(bf2)));
   putreg32((LTDC_LxBFCR_BF1(bf1) | LTDC_LxBFCR_BF2(bf2)),
            stm32_bfcr_layer_t[layer->state.lid]);
@@ -1785,7 +1790,7 @@ static void stm32_ltdc_lblendmode(FAR struct stm32_layer_s *layer,
 
 static void stm32_ltdc_lcolor(FAR struct stm32_layer_s *layer, uint32_t argb)
 {
-  regvdbg("set LTDC_L%dDCCR=%08x\n", layer->state.lid + 1, argb);
+  reginfo("set LTDC_L%dDCCR=%08x\n", layer->state.lid + 1, argb);
   putreg32(argb, stm32_dccr_layer_t[layer->state.lid]);
 
   /* Clear the color operation flag */
@@ -1816,7 +1821,7 @@ static void stm32_ltdc_lcolorkey(FAR struct stm32_layer_s *layer)
     {
       /* Set colorkey */
 
-      regvdbg("set LTDC_L%dCKCR=%08x\n",
+      reginfo("set LTDC_L%dCKCR=%08x\n",
             layer->state.lid + 1, layer->state.colorkey);
       putreg32(layer->state.colorkey, stm32_ckcr_layer_t[layer->state.lid]);
 
@@ -1831,7 +1836,7 @@ static void stm32_ltdc_lcolorkey(FAR struct stm32_layer_s *layer)
       regval &= ~LTDC_LxCR_COLKEN;
     }
 
-  regvdbg("set LTDC_L%dCR=%08x\n", layer->state.lid + 1, regval);
+  reginfo("set LTDC_L%dCR=%08x\n", layer->state.lid + 1, regval);
   putreg32(regval, stm32_cr_layer_t[layer->state.lid]);
 
   /* Clear the colorkey operation flag */
@@ -1903,7 +1908,7 @@ static void stm32_ltdc_lclut(FAR struct stm32_layer_s *layer,
 #endif
 
 
-      regvdbg("set LTDC_L%dCLUTWR = %08x, cmap->first = %d, cmap->len = %d\n",
+      reginfo("set LTDC_L%dCLUTWR = %08x, cmap->first = %d, cmap->len = %d\n",
              layer->state.lid + 1, regval, cmap->first, cmap->len);
       putreg32(regval, stm32_clutwr_layer_t[layer->state.lid]);
     }
@@ -1950,7 +1955,7 @@ static void stm32_ltdc_lenable(FAR struct stm32_layer_s *layer)
       regval &= ~LTDC_LxCR_LEN;
     }
 
-  regvdbg("set LTDC_L%dCR=%08x\n", layer->state.lid + 1, regval);
+  reginfo("set LTDC_L%dCR=%08x\n", layer->state.lid + 1, regval);
   putreg32(regval, stm32_cr_layer_t[layer->state.lid]);
 
   /* Clear the enable operation flag */
@@ -1985,8 +1990,8 @@ static void stm32_ltdc_lclear(FAR struct stm32_layer_s *layer,
       uint8_t *dest = (uint8_t *)priv->pinfo.fbmem;
       int i;
 
-      gvdbg("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n",
-            priv->pinfo.bpp, color, dest, priv->pinfo.fblen);
+      lcdinfo("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n",
+               priv->pinfo.bpp, color, dest, priv->pinfo.fblen);
 
       for (i = 0; i < priv->pinfo.fblen; i += sizeof(uint8_t))
         {
@@ -2003,8 +2008,8 @@ static void stm32_ltdc_lclear(FAR struct stm32_layer_s *layer,
       uint16_t *dest = (uint16_t *)priv->pinfo.fbmem;
       int i;
 
-      gvdbg("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n",
-            priv->pinfo.bpp, color, dest, priv->pinfo.fblen);
+      lcdinfo("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n",
+               priv->pinfo.bpp, color, dest, priv->pinfo.fblen);
 
       for (i = 0; i < priv->pinfo.fblen; i += sizeof(uint16_t))
         {
@@ -2024,8 +2029,8 @@ static void stm32_ltdc_lclear(FAR struct stm32_layer_s *layer,
       uint8_t b;
       int i;
 
-      gvdbg("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n",
-            priv->pinfo.bpp, color, dest, priv->pinfo.fblen);
+      lcdinfo("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n",
+               priv->pinfo.bpp, color, dest, priv->pinfo.fblen);
 
       r = (uint8_t) color;
       g = (uint8_t) (color >> 8);
@@ -2048,8 +2053,8 @@ static void stm32_ltdc_lclear(FAR struct stm32_layer_s *layer,
       uint32_t *dest = (uint32_t *)priv->pinfo.fbmem;
       int i;
 
-      gvdbg("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n",
-            priv->pinfo.bpp, color, dest, priv->pinfo.fblen);
+      lcdinfo("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n",
+               priv->pinfo.bpp, color, dest, priv->pinfo.fblen);
 
       for (i = 0; i < priv->pinfo.fblen; i += sizeof(uint32_t))
         {
@@ -2191,7 +2196,7 @@ static void stm32_ltdc_linit(int lid)
 static int stm32_getvideoinfo(struct fb_vtable_s *vtable,
                                  struct fb_videoinfo_s *vinfo)
 {
-  gvdbg("vtable=%p vinfo=%p\n", vtable, vinfo);
+  lcdinfo("vtable=%p vinfo=%p\n", vtable, vinfo);
   if (vtable)
     {
       FAR struct ltdc_layer_s *ltdc;
@@ -2203,7 +2208,7 @@ static int stm32_getvideoinfo(struct fb_vtable_s *vtable,
       return stm32_lgetvideoinfo(ltdc, vinfo);
     }
 
-  gdbg("ERROR: Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -2226,7 +2231,7 @@ static int stm32_getvideoinfo(struct fb_vtable_s *vtable,
 static int stm32_getplaneinfo(struct fb_vtable_s *vtable, int planeno,
                                  struct fb_planeinfo_s *pinfo)
 {
-  gvdbg("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
+  lcdinfo("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
   if (vtable)
     {
       FAR struct ltdc_layer_s *ltdc;
@@ -2238,7 +2243,7 @@ static int stm32_getplaneinfo(struct fb_vtable_s *vtable, int planeno,
       return stm32_lgetplaneinfo(ltdc, planeno, pinfo);
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -2315,7 +2320,7 @@ static int stm32_putcmap(struct fb_vtable_s *vtable,
 static int stm32_lgetvideoinfo(struct ltdc_layer_s *layer,
                                  struct fb_videoinfo_s *vinfo)
 {
-  gvdbg("layer=%p vinfo=%p\n", layer, vinfo);
+  lcdinfo("layer=%p vinfo=%p\n", layer, vinfo);
   FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
 
   if (stm32_ltdc_lvalidate(priv))
@@ -2325,7 +2330,7 @@ static int stm32_lgetvideoinfo(struct ltdc_layer_s *layer,
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -2349,16 +2354,16 @@ static int stm32_lgetvideoinfo(struct ltdc_layer_s *layer,
 static int stm32_lgetplaneinfo(struct ltdc_layer_s *layer, int planeno,
                                  struct fb_planeinfo_s *pinfo)
 {
-  gvdbg("layer=%p planeno=%d pinfo=%p\n", layer, planeno, pinfo);
   FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
 
+  lcdinfo("layer=%p planeno=%d pinfo=%p\n", layer, planeno, pinfo);
   if (stm32_ltdc_lvalidate(priv) && planeno == 0)
     {
       memcpy(pinfo, &priv->state.pinfo, sizeof(struct fb_planeinfo_s));
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -2384,9 +2389,10 @@ static int stm32_lgetplaneinfo(struct ltdc_layer_s *layer, int planeno,
 static int stm32_setclut(struct ltdc_layer_s *layer,
                         const struct fb_cmap_s *cmap)
 {
-  int   ret;
   FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
-  gvdbg("layer=%p cmap=%p\n", layer, cmap);
+  int ret;
+
+  lcdinfo("layer=%p cmap=%p\n", layer, cmap);
 
   if (stm32_ltdc_lvalidate(priv) && cmap)
     {
@@ -2394,14 +2400,14 @@ static int stm32_setclut(struct ltdc_layer_s *layer,
 
       if (priv->state.vinfo.fmt != FB_FMT_RGB8)
         {
-          gdbg("Error: CLUT is not supported for the pixel format: %d\n",
-                    priv->state.vinfo.fmt);
+          lcderr("ERROR: CLUT is not supported for the pixel format: %d\n",
+                  priv->state.vinfo.fmt);
           ret = -EINVAL;
         }
       else if (cmap->first >= STM32_LTDC_NCLUT)
         {
-          gdbg("Error: only %d color table entries supported\n",
-                    STM32_LTDC_NCLUT);
+          lcderr("ERROR: only %d color table entries supported\n",
+                  STM32_LTDC_NCLUT);
           ret = -EINVAL;
         }
       else
@@ -2418,7 +2424,7 @@ static int stm32_setclut(struct ltdc_layer_s *layer,
       return ret;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -2442,9 +2448,10 @@ static int stm32_setclut(struct ltdc_layer_s *layer,
 static int stm32_getclut(struct ltdc_layer_s *layer,
                          struct fb_cmap_s *cmap)
 {
-  int   ret;
   FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
-  gvdbg("layer=%p cmap=%p\n", layer, cmap);
+  int ret;
+
+  lcdinfo("layer=%p cmap=%p\n", layer, cmap);
 
   if (priv == &LAYER_L1 || priv == &LAYER_L2)
     {
@@ -2460,14 +2467,14 @@ static int stm32_getclut(struct ltdc_layer_s *layer,
 #else
       if (priv->state.vinfo.fmt != FB_FMT_RGB8)
         {
-          gdbg("Error: CLUT is not supported for the pixel format: %d\n",
-                    priv->state.vinfo.fmt);
+          lcderr("ERROR: CLUT is not supported for the pixel format: %d\n",
+                  priv->state.vinfo.fmt);
           ret = -EINVAL;
         }
       else if (cmap->first >= STM32_LTDC_NCLUT)
         {
-          gdbg("Error: only %d color table entries supported\n",
-                    STM32_LTDC_NCLUT);
+          lcderr("ERROR: only %d color table entries supported\n",
+                  STM32_LTDC_NCLUT);
           ret = -EINVAL;
         }
       else
@@ -2489,7 +2496,7 @@ static int stm32_getclut(struct ltdc_layer_s *layer,
               cmap->green[n]  = clut888[offset + 1];
               cmap->red[n]    = clut888[offset + 2];
 
-              regvdbg("n=%d, red=%02x, green=%02x, blue=%02x\n", n,
+              reginfo("n=%d, red=%02x, green=%02x, blue=%02x\n", n,
                       clut888[offset], clut888[offset + 1],
                       clut888[offset + 2]);
 # else
@@ -2498,7 +2505,7 @@ static int stm32_getclut(struct ltdc_layer_s *layer,
               cmap->green[n]  = (uint8_t)LTDC_CMAP_GREEN(clut[n]);
               cmap->blue[n]   = (uint8_t)LTDC_CMAP_BLUE(clut[n]);
 
-              regvdbg("n=%d, alpha=%02x, red=%02x, green=%02x, blue=%02x\n", n,
+              reginfo("n=%d, alpha=%02x, red=%02x, green=%02x, blue=%02x\n", n,
                       DMA2D_CMAP_ALPHA(clut[n]), DMA2D_CMAP_RED(clut[n]),
                       DMA2D_CMAP_GREEN(clut[n]), DMA2D_CMAP_BLUE(clut[n]));
 # endif
@@ -2512,7 +2519,7 @@ static int stm32_getclut(struct ltdc_layer_s *layer,
       return ret;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 #endif /* STM32_LAYER_CLUT_SIZE */
@@ -2542,7 +2549,7 @@ static int stm32_getlid(FAR struct ltdc_layer_s *layer, int *lid,
 {
   FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
 
-  gvdbg("flag = %08x\n", flag);
+  lcdinfo("flag = %08x\n", flag);
 
   if (stm32_ltdc_lvalidate(priv))
     {
@@ -2583,7 +2590,7 @@ static int stm32_getlid(FAR struct ltdc_layer_s *layer, int *lid,
 #endif
           default:
             ret = EINVAL;
-            gdbg("Returning EINVAL\n");
+            lcderr("ERROR: Returning EINVAL\n");
             break;
         }
 
@@ -2592,7 +2599,7 @@ static int stm32_getlid(FAR struct ltdc_layer_s *layer, int *lid,
       return ret;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -2617,7 +2624,8 @@ static int stm32_getlid(FAR struct ltdc_layer_s *layer, int *lid,
 static int stm32_setcolor(FAR struct ltdc_layer_s *layer, uint32_t argb)
 {
   FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
-  gvdbg("layer = %p, argb = %08x\n", layer, argb);
+
+  lcdinfo("layer = %p, argb = %08x\n", layer, argb);
 
   if (stm32_ltdc_lvalidate(priv))
     {
@@ -2629,7 +2637,7 @@ static int stm32_setcolor(FAR struct ltdc_layer_s *layer, uint32_t argb)
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -2652,7 +2660,8 @@ static int stm32_setcolor(FAR struct ltdc_layer_s *layer, uint32_t argb)
 static int stm32_getcolor(FAR struct ltdc_layer_s *layer, uint32_t *argb)
 {
   FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
-  gvdbg("layer = %p, argb = %p\n", layer, argb);
+
+  lcdinfo("layer = %p, argb = %p\n", layer, argb);
 
   if (stm32_ltdc_lvalidate(priv))
     {
@@ -2663,7 +2672,7 @@ static int stm32_getcolor(FAR struct ltdc_layer_s *layer, uint32_t *argb)
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -2688,7 +2697,8 @@ static int stm32_getcolor(FAR struct ltdc_layer_s *layer, uint32_t *argb)
 static int stm32_setcolorkey(FAR struct ltdc_layer_s *layer, uint32_t rgb)
 {
   FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
-  gvdbg("layer = %p, argb = %08x\n", layer, rgb);
+
+  lcdinfo("layer = %p, argb = %08x\n", layer, rgb);
 
   if (stm32_ltdc_lvalidate(priv))
     {
@@ -2700,7 +2710,7 @@ static int stm32_setcolorkey(FAR struct ltdc_layer_s *layer, uint32_t rgb)
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -2723,7 +2733,8 @@ static int stm32_setcolorkey(FAR struct ltdc_layer_s *layer, uint32_t rgb)
 static int stm32_getcolorkey(FAR struct ltdc_layer_s *layer, uint32_t *rgb)
 {
   FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
-  gvdbg("layer = %p, argb = %p\n", layer, rgb);
+
+  lcdinfo("layer = %p, argb = %p\n", layer, rgb);
 
   if (stm32_ltdc_lvalidate(priv))
     {
@@ -2734,7 +2745,7 @@ static int stm32_getcolorkey(FAR struct ltdc_layer_s *layer, uint32_t *rgb)
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -2763,7 +2774,8 @@ static int stm32_getcolorkey(FAR struct ltdc_layer_s *layer, uint32_t *rgb)
 static int stm32_setalpha(FAR struct ltdc_layer_s *layer, uint8_t alpha)
 {
   FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
-  gvdbg("layer = %p, alpha = %02x\n", layer, alpha);
+
+  lcdinfo("layer = %p, alpha = %02x\n", layer, alpha);
 
   if (stm32_ltdc_lvalidate(priv))
     {
@@ -2775,7 +2787,7 @@ static int stm32_setalpha(FAR struct ltdc_layer_s *layer, uint8_t alpha)
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -2798,7 +2810,8 @@ static int stm32_setalpha(FAR struct ltdc_layer_s *layer, uint8_t alpha)
 static int stm32_getalpha(FAR struct ltdc_layer_s *layer, uint8_t *alpha)
 {
   FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
-  gvdbg("layer = %p, alpha = %p\n", layer, alpha);
+
+  lcdinfo("layer = %p, alpha = %p\n", layer, alpha);
 
   if (stm32_ltdc_lvalidate(priv))
     {
@@ -2809,7 +2822,7 @@ static int stm32_getalpha(FAR struct ltdc_layer_s *layer, uint8_t *alpha)
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -2856,8 +2869,9 @@ static int stm32_getalpha(FAR struct ltdc_layer_s *layer, uint8_t *alpha)
 static int stm32_setblendmode(FAR struct ltdc_layer_s *layer, uint32_t mode)
 {
   FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
-  uint32_t   blendmode = mode;
-  gvdbg("layer = %p, mode = %08x\n", layer, mode);
+  uint32_t blendmode = mode;
+
+  lcdinfo("layer = %p, mode = %08x\n", layer, mode);
 
   if (stm32_ltdc_lvalidate(priv))
     {
@@ -2926,7 +2940,7 @@ static int stm32_setblendmode(FAR struct ltdc_layer_s *layer, uint32_t mode)
         }
       if (blendmode)
         {
-          gdbg("Unknown blendmode %02x\n", blendmode);
+          lcderr("ERROR: Unknown blendmode %02x\n", blendmode);
           ret = -EINVAL;
         }
 
@@ -2942,7 +2956,7 @@ static int stm32_setblendmode(FAR struct ltdc_layer_s *layer, uint32_t mode)
       return ret;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -2964,7 +2978,8 @@ static int stm32_setblendmode(FAR struct ltdc_layer_s *layer, uint32_t mode)
 static int stm32_getblendmode(FAR struct ltdc_layer_s *layer, uint32_t *mode)
 {
   FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
-  gvdbg("layer = %p, mode = %p\n", layer, mode);
+
+  lcdinfo("layer = %p, mode = %p\n", layer, mode);
 
   if (stm32_ltdc_lvalidate(priv))
     {
@@ -2975,7 +2990,7 @@ static int stm32_getblendmode(FAR struct ltdc_layer_s *layer, uint32_t *mode)
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -3011,8 +3026,9 @@ static int stm32_setarea(FAR struct ltdc_layer_s *layer,
                         fb_coord_t srcypos)
 {
   FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
-  gvdbg("layer = %p, area = %p, srcxpos = %d, srcypos = %d\n",
-            layer, area, srcxpos, srcypos);
+
+  lcdinfo("layer = %p, area = %p, srcxpos = %d, srcypos = %d\n",
+           layer, area, srcxpos, srcypos);
 
   if (stm32_ltdc_lvalidate(priv))
     {
@@ -3039,7 +3055,7 @@ static int stm32_setarea(FAR struct ltdc_layer_s *layer,
       return ret;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -3066,8 +3082,9 @@ static int stm32_getarea(FAR struct ltdc_layer_s *layer,
                         fb_coord_t *srcxpos, fb_coord_t *srcypos)
 {
   FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
-  gvdbg("layer = %p, area = %p, srcxpos = %p, srcypos = %p\n",
-            layer, area, srcxpos, srcypos);
+
+  lcdinfo("layer = %p, area = %p, srcxpos = %p, srcypos = %p\n",
+           layer, area, srcxpos, srcypos);
 
   if (stm32_ltdc_lvalidate(priv))
     {
@@ -3080,7 +3097,7 @@ static int stm32_getarea(FAR struct ltdc_layer_s *layer,
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -3131,7 +3148,7 @@ static int stm32_update(FAR struct ltdc_layer_s *layer, uint32_t mode)
   FAR struct stm32_layer_s *inactive = &LAYER(!g_lactive);
 #endif
 
-  gvdbg("layer = %p, mode = %08x\n", layer, mode);
+  lcdinfo("layer = %p, mode = %08x\n", layer, mode);
 
   if (stm32_ltdc_lvalidate(priv))
     {
@@ -3156,7 +3173,7 @@ static int stm32_update(FAR struct ltdc_layer_s *layer, uint32_t mode)
 
       if (stm32_ltdc_waitforirq() != OK)
         {
-          gdbg("Returning ECANCELED\n");
+          lcderr("ERROR: Returning ECANCELED\n");
           return -ECANCELED;
         }
 
@@ -3238,7 +3255,7 @@ static int stm32_update(FAR struct ltdc_layer_s *layer, uint32_t mode)
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -3272,8 +3289,8 @@ static int stm32_blit(FAR struct ltdc_layer_s *dest,
 {
   FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)dest;
 
-  gvdbg("dest = %p, destxpos = %d, destypos = %d, src = %p, srcarea = %p\n",
-        dest, destxpos, destypos, src, srcarea);
+  lcdinfo("dest = %p, destxpos = %d, destypos = %d, src = %p, srcarea = %p\n",
+           dest, destxpos, destypos, src, srcarea);
 
   if (stm32_ltdc_lvalidate(priv))
     {
@@ -3286,7 +3303,7 @@ static int stm32_blit(FAR struct ltdc_layer_s *dest,
       return ret;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -3325,10 +3342,10 @@ static int stm32_blend(FAR struct ltdc_layer_s *dest,
 {
   FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)dest;
 
-  gvdbg("dest=%p, destxpos=%d, destypos=%d, "
-        "fore=%p, forexpos=%d foreypos=%d, "
-        "back=%p, backarea=%p\n",
-        dest, destxpos, destypos, fore, forexpos, foreypos, back, backarea);
+  lcdinfo("dest=%p, destxpos=%d, destypos=%d, "
+          "fore=%p, forexpos=%d foreypos=%d, "
+          "back=%p, backarea=%p\n",
+           dest, destxpos, destypos, fore, forexpos, foreypos, back, backarea);
 
   if (stm32_ltdc_lvalidate(priv))
     {
@@ -3342,7 +3359,7 @@ static int stm32_blend(FAR struct ltdc_layer_s *dest,
       return ret;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -3370,7 +3387,8 @@ static int stm32_fillarea(FAR struct ltdc_layer_s *layer,
                             uint32_t color)
 {
   FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
-  gvdbg("layer = %p, area = %p, color = %08x\n", layer, area, color);
+
+  lcdinfo("layer = %p, area = %p, color = %08x\n", layer, area, color);
 
   if (stm32_ltdc_lvalidate(priv))
     {
@@ -3383,7 +3401,7 @@ static int stm32_fillarea(FAR struct ltdc_layer_s *layer,
       return ret;
     }
 
-  gdbg("Returning EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 #endif
@@ -3407,13 +3425,14 @@ static int stm32_fillarea(FAR struct ltdc_layer_s *layer,
 
 FAR struct ltdc_layer_s *stm32_ltdcgetlayer(int lid)
 {
-  gvdbg("lid: %d\n", lid);
+  lcdinfo("lid: %d\n", lid);
+
   if (lid == LTDC_LAYER_L1 || lid == LTDC_LAYER_L2)
     {
       return (FAR struct ltdc_layer_s *) &LAYER(lid);
     }
 
-  gdbg("EINVAL\n");
+  lcderr("ERROR: Returning EINVAL\n");
   errno = EINVAL;
   return NULL;
 }
@@ -3436,7 +3455,7 @@ int stm32_ltdcinitialize(void)
   int   ret;
 #endif
 
-  dbg("Initialize LTDC driver\n");
+  lcdinfo("Initialize LTDC driver\n");
 
   if (g_initialized == true)
     {
@@ -3447,16 +3466,16 @@ int stm32_ltdcinitialize(void)
 
   stm32_lcd_enable(false);
 
-  gvdbg("Configuring the LCD controller\n");
+  lcdinfo("Configuring the LCD controller\n");
 
   /* Configure LCD periphery */
 
-  gvdbg("Configure lcd periphery\n");
+  lcdinfo("Configure lcd periphery\n");
   stm32_ltdc_periphconfig();
 
   /* Configure global ltdc register */
 
-  gvdbg("Configure global register\n");
+  lcdinfo("Configure global register\n");
   stm32_global_configure();
 
 #ifdef CONFIG_STM32_DMA2D
@@ -3472,7 +3491,7 @@ int stm32_ltdcinitialize(void)
 
   /* Initialize ltdc layer */
 
-  gvdbg("Initialize ltdc layer\n");
+  lcdinfo("Initialize ltdc layer\n");
   stm32_ltdc_linit(LTDC_LAYER_L1);
 #ifdef CONFIG_STM32_LTDC_L2
   stm32_ltdc_linit(LTDC_LAYER_L2);
@@ -3493,12 +3512,12 @@ int stm32_ltdcinitialize(void)
 
   /* Reload shadow register */
 
-  gvdbg("Reload shadow register\n");
+  lcdinfo("Reload shadow register\n");
   stm32_ltdc_reload(LTDC_SRCR_IMR, false);
 
   /* Turn the LCD on */
 
-  gvdbg("Enabling the display\n");
+  lcdinfo("Enabling the display\n");
   stm32_lcd_enable(true);
 
   /* Set initialized state */
@@ -3524,7 +3543,7 @@ int stm32_ltdcinitialize(void)
 
 struct fb_vtable_s *stm32_ltdcgetvplane(int vplane)
 {
-  gvdbg("vplane: %d\n", vplane);
+  lcdinfo("vplane: %d\n", vplane);
 
   if (vplane == 0)
     {
@@ -3600,6 +3619,6 @@ void stm32_backlight(bool blon)
 {
   /* Set default backlight level CONFIG_STM32_LTDC_DEFBACKLIGHT */
 
-  gdbg("Not supported\n");
+  lcderr("ERROR: Not supported\n");
 }
 #endif
diff --git a/arch/arm/src/stm32/stm32_oneshot.c b/arch/arm/src/stm32/stm32_oneshot.c
new file mode 100644
index 0000000000000000000000000000000000000000..ab8d2a4034802e7437896fa1f8cf7017dd344193
--- /dev/null
+++ b/arch/arm/src/stm32/stm32_oneshot.c
@@ -0,0 +1,473 @@
+/****************************************************************************
+ * arch/arm/src/stm32/stm32_oneshot.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the names NuttX nor Atmel nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "stm32_oneshot.h"
+
+#ifdef CONFIG_STM32_ONESHOT
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int stm32_oneshot_handler(int irg_num, void * context, void *arg);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static struct stm32_oneshot_s *g_oneshot[CONFIG_STM32_ONESHOT_MAXTIMERS];
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_oneshot_handler
+ *
+ * Description:
+ *   Common timer interrupt callback.  When any oneshot timer interrupt
+ *   expires, this function will be called.  It will forward the call to
+ *   the next level up.
+ *
+ * Input Parameters:
+ *   oneshot - The state associated with the expired timer
+ *
+ * Returned Value:
+ *   Always returns OK
+ *
+ ****************************************************************************/
+
+static int stm32_oneshot_handler(int irg_num, void * context, void *arg)
+{
+  struct stm32_oneshot_s * oneshot = (struct stm32_oneshot_s *) arg;
+  oneshot_handler_t oneshot_handler;
+  void *oneshot_arg;
+
+  tmrinfo("Expired...\n");
+  DEBUGASSERT(oneshot != NULL && oneshot->handler);
+
+  /* The clock was stopped, but not disabled when the RC match occurred.
+   * Disable the TC now and disable any further interrupts.
+   */
+
+  STM32_TIM_SETISR(oneshot->tch, NULL, NULL, 0);
+  STM32_TIM_DISABLEINT(oneshot->tch, 0);
+  STM32_TIM_SETMODE(oneshot->tch, STM32_TIM_MODE_DISABLED);
+  STM32_TIM_ACKINT(oneshot->tch, 0);
+
+  /* The timer is no longer running */
+
+  oneshot->running = false;
+
+  /* Forward the event, clearing out any vestiges */
+
+  oneshot_handler  = (oneshot_handler_t)oneshot->handler;
+  oneshot->handler = NULL;
+  oneshot_arg      = (void *)oneshot->arg;
+  oneshot->arg     = NULL;
+
+  oneshot_handler(oneshot_arg);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_allocate_handler
+ *
+ * Description:
+ *   Allocate a timer callback handler for the oneshot instance.
+ *
+ * Input Parameters:
+ *   oneshot - The state instance the new oneshot timer
+ *
+ * Returned Value:
+ *   Returns zero (OK) on success.  This can only fail if the number of
+ *   timers exceeds CONFIG_STM32_ONESHOT_MAXTIMERS.
+ *
+ ****************************************************************************/
+
+static inline int stm32_allocate_handler(struct stm32_oneshot_s *oneshot)
+{
+#if CONFIG_STM32_ONESHOT_MAXTIMERS > 1
+  int ret = -EBUSY;
+  int i;
+
+  /* Search for an unused handler */
+
+  sched_lock();
+  for (i = 0; i < CONFIG_STM32_ONESHOT_MAXTIMERS; i++)
+    {
+      /* Is this handler available? */
+
+      if (g_oneshot[i] == NULL)
+        {
+          /* Yes... assign it to this oneshot */
+
+          g_oneshot[i]   = oneshot;
+          oneshot->cbndx = i;
+          ret            = OK;
+          break;
+        }
+    }
+
+  sched_unlock();
+  return ret;
+
+#else
+  if (g_oneshot[0] == NULL)
+    {
+      g_oneshot[0] = oneshot;
+      return OK;
+    }
+
+  return -EBUSY;
+#endif
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_oneshot_initialize
+ *
+ * Description:
+ *   Initialize the oneshot timer wrapper
+ *
+ * Input Parameters:
+ *   oneshot    Caller allocated instance of the oneshot state structure
+ *   chan       Timer counter channel to be used.
+ *   resolution The required resolution of the timer in units of
+ *              microseconds.  NOTE that the range is restricted to the
+ *              range of uint16_t (excluding zero).
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+int stm32_oneshot_initialize(struct stm32_oneshot_s *oneshot, int chan,
+                             uint16_t resolution)
+{
+  uint32_t frequency;
+
+  tmrinfo("chan=%d resolution=%d usec\n", chan, resolution);
+  DEBUGASSERT(oneshot && resolution > 0);
+
+  /* Get the TC frequency the corresponds to the requested resolution */
+
+  frequency = USEC_PER_SEC / (uint32_t)resolution;
+  oneshot->frequency = frequency;
+
+  oneshot->tch = stm32_tim_init(chan);
+  if (!oneshot->tch)
+    {
+      tmrerr("ERROR: Failed to allocate TIM%d\n", chan);
+      return -EBUSY;
+    }
+
+  STM32_TIM_SETCLOCK(oneshot->tch, frequency);
+
+  /* Initialize the remaining fields in the state structure. */
+
+  oneshot->chan       = chan;
+  oneshot->running    = false;
+  oneshot->handler    = NULL;
+  oneshot->arg        = NULL;
+
+  /* Assign a callback handler to the oneshot */
+
+  return stm32_allocate_handler(oneshot);
+}
+
+/****************************************************************************
+ * Name: stm32_oneshot_max_delay
+ *
+ * Description:
+ *   Determine the maximum delay of the one-shot timer (in microseconds)
+ *
+ ****************************************************************************/
+
+int stm32_oneshot_max_delay(struct stm32_oneshot_s *oneshot, uint64_t *usec)
+{
+  DEBUGASSERT(oneshot != NULL && usec != NULL);
+
+  *usec = (uint64_t)(UINT32_MAX / oneshot->frequency) *
+          (uint64_t)USEC_PER_SEC;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_oneshot_start
+ *
+ * Description:
+ *   Start the oneshot timer
+ *
+ * Input Parameters:
+ *   oneshot Caller allocated instance of the oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           stm32_oneshot_initialize();
+ *   handler The function to call when when the oneshot timer expires.
+ *   arg     An opaque argument that will accompany the callback.
+ *   ts      Provides the duration of the one shot timer.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+int stm32_oneshot_start(struct stm32_oneshot_s *oneshot,
+                        oneshot_handler_t handler, void *arg,
+                        const struct timespec *ts)
+{
+  uint64_t usec;
+  uint64_t period;
+  irqstate_t flags;
+
+  tmrinfo("handler=%p arg=%p, ts=(%lu, %lu)\n",
+         handler, arg, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
+  DEBUGASSERT(oneshot && handler && ts);
+  DEBUGASSERT(oneshot->tch);
+
+  /* Was the oneshot already running? */
+
+  flags = enter_critical_section();
+  if (oneshot->running)
+    {
+      /* Yes.. then cancel it */
+
+      tmrinfo("Already running... cancelling\n");
+      (void)stm32_oneshot_cancel(oneshot, NULL);
+    }
+
+  /* Save the new handler and its argument */
+
+  oneshot->handler = handler;
+  oneshot->arg     = arg;
+
+  /* Express the delay in microseconds */
+
+  usec = (uint64_t)ts->tv_sec * USEC_PER_SEC +
+         (uint64_t)(ts->tv_nsec / NSEC_PER_USEC);
+
+  /* Get the timer counter frequency and determine the number of counts need
+   * to achieve the requested delay.
+   *
+   *   frequency = ticks / second
+   *   ticks     = seconds * frequency
+   *             = (usecs * frequency) / USEC_PER_SEC;
+   */
+
+  period = (usec * (uint64_t)oneshot->frequency) / USEC_PER_SEC;
+
+  tmrinfo("usec=%llu period=%08llx\n", usec, period);
+  DEBUGASSERT(period <= UINT32_MAX);
+
+  /* Set up to receive the callback when the interrupt occurs */
+
+  STM32_TIM_SETISR(oneshot->tch, stm32_oneshot_handler, oneshot, 0);
+
+  /* Set timer period */
+
+  oneshot->period = (uint32_t)period;
+  STM32_TIM_SETPERIOD(oneshot->tch, (uint32_t)period);
+
+  /* Start the counter */
+
+  STM32_TIM_SETMODE(oneshot->tch, STM32_TIM_MODE_PULSE);
+
+  STM32_TIM_ACKINT(oneshot->tch, 0);
+  STM32_TIM_ENABLEINT(oneshot->tch, 0);
+
+  /* Enable interrupts.  We should get the callback when the interrupt
+   * occurs.
+   */
+
+  oneshot->running = true;
+  leave_critical_section(flags);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_oneshot_cancel
+ *
+ * Description:
+ *   Cancel the oneshot timer and return the time remaining on the timer.
+ *
+ *   NOTE: This function may execute at a high rate with no timer running (as
+ *   when pre-emption is enabled and disabled).
+ *
+ * Input Parameters:
+ *   oneshot Caller allocated instance of the oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           stm32_oneshot_initialize();
+ *   ts      The location in which to return the time remaining on the
+ *           oneshot timer.  A time of zero is returned if the timer is
+ *           not running.  ts may be zero in which case the time remaining
+ *           is not returned.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success.  A call to up_timer_cancel() when
+ *   the timer is not active should also return success; a negated errno
+ *   value is returned on any failure.
+ *
+ ****************************************************************************/
+
+int stm32_oneshot_cancel(struct stm32_oneshot_s *oneshot,
+                         struct timespec *ts)
+{
+  irqstate_t flags;
+  uint64_t usec;
+  uint64_t sec;
+  uint64_t nsec;
+  uint32_t count;
+  uint32_t period;
+
+  /* Was the timer running? */
+
+  flags = enter_critical_section();
+  if (!oneshot->running)
+    {
+      /* No.. Just return zero timer remaining and successful cancellation.
+       * This function may execute at a high rate with no timer running
+       * (as when pre-emption is enabled and disabled).
+       */
+
+      ts->tv_sec  = 0;
+      ts->tv_nsec = 0;
+      leave_critical_section(flags);
+      return OK;
+    }
+
+  /* Yes.. Get the timer counter and period registers and stop the counter.
+   * If the counter expires while we are doing this, the counter clock will
+   * be stopped, but the clock will not be disabled.
+   *
+   * The expected behavior is that the the counter register will freezes at
+   * a value equal to the RC register when the timer expires.  The counter
+   * should have values between 0 and RC in all other cased.
+   *
+   * REVISIT:  This does not appear to be the case.
+   */
+
+  tmrinfo("Cancelling...\n");
+
+  count  = STM32_TIM_GETCOUNTER(oneshot->tch);
+  period = oneshot->period;
+
+  /* Now we can disable the interrupt and stop the timer. */
+
+  STM32_TIM_DISABLEINT(oneshot->tch, 0);
+  STM32_TIM_SETISR(oneshot->tch, NULL, NULL, 0);
+  STM32_TIM_SETMODE(oneshot->tch, STM32_TIM_MODE_DISABLED);
+
+  oneshot->running = false;
+  oneshot->handler = NULL;
+  oneshot->arg     = NULL;
+  leave_critical_section(flags);
+
+  /* Did the caller provide us with a location to return the time
+   * remaining?
+   */
+
+  if (ts)
+    {
+      /* Yes.. then calculate and return the time remaining on the
+       * oneshot timer.
+       */
+
+      tmrinfo("period=%lu count=%lu\n",
+             (unsigned long)period, (unsigned long)count);
+
+      /* REVISIT: I am not certain why the timer counter value sometimes
+       * exceeds RC.  Might be a bug, or perhaps the counter does not stop
+       * in all cases.
+       */
+
+      if (count >= period)
+        {
+          /* No time remaining (?) */
+
+          ts->tv_sec  = 0;
+          ts->tv_nsec = 0;
+        }
+      else
+        {
+          /* The total time remaining is the difference.  Convert the that
+           * to units of microseconds.
+           *
+           *   frequency = ticks / second
+           *   seconds   = ticks * frequency
+           *   usecs     = (ticks * USEC_PER_SEC) / frequency;
+           */
+
+          usec        = (((uint64_t)(period - count)) * USEC_PER_SEC) /
+                        oneshot->frequency;
+
+          /* Return the time remaining in the correct form */
+
+          sec         = usec / USEC_PER_SEC;
+          nsec        = ((usec) - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
+
+          ts->tv_sec  = (time_t)sec;
+          ts->tv_nsec = (unsigned long)nsec;
+        }
+
+      tmrinfo("remaining (%lu, %lu)\n",
+             (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
+    }
+
+  return OK;
+}
+
+#endif /* CONFIG_STM32_ONESHOT */
diff --git a/arch/arm/src/stm32/stm32_oneshot.h b/arch/arm/src/stm32/stm32_oneshot.h
new file mode 100644
index 0000000000000000000000000000000000000000..d32c924a79b12a62a94b88bdafd8f9ec104a11aa
--- /dev/null
+++ b/arch/arm/src/stm32/stm32_oneshot.h
@@ -0,0 +1,210 @@
+/****************************************************************************
+ * arch/arm/src/stm32/stm32_oneshot.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32_ONESHOT_H
+#define __ARCH_ARM_SRC_STM32_ONESHOT_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include "stm32_tim.h"
+
+#ifdef CONFIG_STM32_ONESHOT
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if !defined(CONFIG_STM32_ONESHOT_MAXTIMERS) || \
+    CONFIG_STM32_ONESHOT_MAXTIMERS < 1
+#  undef CONFIG_STM32_ONESHOT_MAXTIMERS
+#  define CONFIG_STM32_ONESHOT_MAXTIMERS 1
+#endif
+
+#if CONFIG_STM32_ONESHOT_MAXTIMERS > 8
+#  warning Additional logic required to handle more than 8 timers
+#  undef CONFIG_STM32_ONESHOT_MAXTIMERS
+#  define CONFIG_STM32_ONESHOT_MAXTIMERS 8
+#endif
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* This describes the callback function that will be invoked when the oneshot
+ * timer expires.  The oneshot fires, the client will receive:
+ *
+ *   arg - The opaque argument provided when the interrupt was registered
+ */
+
+typedef void (*oneshot_handler_t)(void *arg);
+
+/* The oneshot client must allocate an instance of this structure and called
+ * stm32_oneshot_initialize() before using the oneshot facilities.  The client
+ * should not access the contents of this structure directly since the
+ * contents are subject to change.
+ */
+
+struct stm32_oneshot_s
+{
+  uint8_t chan;                       /* The timer/counter in use */
+#if CONFIG_STM32_ONESHOT_MAXTIMERS > 1
+  uint8_t cbndx;                      /* Timer callback handler index */
+#endif
+  volatile bool running;              /* True: the timer is running */
+  FAR struct stm32_tim_dev_s *tch;    /* Pointer returned by
+                                       * stm32_tim_init() */
+  volatile oneshot_handler_t handler; /* Oneshot expiration callback */
+  volatile void *arg;                 /* The argument that will accompany
+                                       * the callback */
+  uint32_t frequency;
+  uint32_t period;
+};
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_oneshot_initialize
+ *
+ * Description:
+ *   Initialize the oneshot timer wrapper
+ *
+ * Input Parameters:
+ *   oneshot    Caller allocated instance of the oneshot state structure
+ *   chan       Timer counter channel to be used.
+ *   resolution The required resolution of the timer in units of
+ *              microseconds.  NOTE that the range is restricted to the
+ *              range of uint16_t (excluding zero).
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+int stm32_oneshot_initialize(struct stm32_oneshot_s *oneshot, int chan,
+                             uint16_t resolution);
+
+/****************************************************************************
+ * Name: stm32_oneshot_max_delay
+ *
+ * Description:
+ *   Determine the maximum delay of the one-shot timer (in microseconds)
+ *
+ ****************************************************************************/
+
+int stm32_oneshot_max_delay(struct stm32_oneshot_s *oneshot, uint64_t *usec);
+
+/****************************************************************************
+ * Name: stm32_oneshot_start
+ *
+ * Description:
+ *   Start the oneshot timer
+ *
+ * Input Parameters:
+ *   oneshot Caller allocated instance of the oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           stm32_oneshot_initialize();
+ *   handler The function to call when when the oneshot timer expires.
+ *   arg     An opaque argument that will accompany the callback.
+ *   ts      Provides the duration of the one shot timer.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+int stm32_oneshot_start(struct stm32_oneshot_s *oneshot,
+                        oneshot_handler_t handler, void *arg,
+                        const struct timespec *ts);
+
+/****************************************************************************
+ * Name: stm32_oneshot_cancel
+ *
+ * Description:
+ *   Cancel the oneshot timer and return the time remaining on the timer.
+ *
+ *   NOTE: This function may execute at a high rate with no timer running (as
+ *   when pre-emption is enabled and disabled).
+ *
+ * Input Parameters:
+ *   oneshot Caller allocated instance of the oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           stm32_oneshot_initialize();
+ *   ts      The location in which to return the time remaining on the
+ *           oneshot timer.  A time of zero is returned if the timer is
+ *           not running.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success.  A call to up_timer_cancel() when
+ *   the timer is not active should also return success; a negated errno
+ *   value is returned on any failure.
+ *
+ ****************************************************************************/
+
+int stm32_oneshot_cancel(struct stm32_oneshot_s *oneshot,
+                         struct timespec *ts);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CONFIG_STM32_ONESHOT */
+#endif /* __ARCH_ARM_SRC_STM32_ONESHOT_H */
diff --git a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c
new file mode 100644
index 0000000000000000000000000000000000000000..41426958bcf20e030b7a6ffce08009031670b685
--- /dev/null
+++ b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c
@@ -0,0 +1,345 @@
+/****************************************************************************
+ *  arch/arm/src/stm32/stm32_oneshot_lowerhalf.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "stm32_oneshot.h"
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* This structure describes the state of the oneshot timer lower-half driver */
+
+struct stm32_oneshot_lowerhalf_s
+{
+  /* This is the part of the lower half driver that is visible to the upper-
+   * half client of the driver.  This must be the first thing in this
+   * structure so that pointers to struct oneshot_lowerhalf_s are cast
+   * compatible to struct stm32_oneshot_lowerhalf_s and vice versa.
+   */
+
+  struct oneshot_lowerhalf_s lh;  /* Common lower-half driver fields */
+
+  /* Private lower half data follows */
+
+  struct stm32_oneshot_s oneshot; /* STM32-specific oneshot state */
+  oneshot_callback_t callback;    /* Internal handler that receives callback */
+  FAR void *arg;                  /* Argument that is passed to the handler */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static void stm32_oneshot_handler(void *arg);
+
+static int stm32_max_delay(FAR struct oneshot_lowerhalf_s *lower,
+                           FAR struct timespec *ts);
+static int stm32_start(FAR struct oneshot_lowerhalf_s *lower,
+                       oneshot_callback_t callback, FAR void *arg,
+                       FAR const struct timespec *ts);
+static int stm32_cancel(FAR struct oneshot_lowerhalf_s *lower,
+                        FAR struct timespec *ts);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Lower half operations */
+
+static const struct oneshot_operations_s g_oneshot_ops =
+{
+  .max_delay = stm32_max_delay,
+  .start     = stm32_start,
+  .cancel    = stm32_cancel,
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_oneshot_handler
+ *
+ * Description:
+ *   Timer expiration handler
+ *
+ * Input Parameters:
+ *   arg - Should be the same argument provided when stm32_oneshot_start()
+ *         was called.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void stm32_oneshot_handler(void *arg)
+{
+  FAR struct stm32_oneshot_lowerhalf_s *priv =
+    (FAR struct stm32_oneshot_lowerhalf_s *)arg;
+  oneshot_callback_t callback;
+  FAR void *cbarg;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Perhaps the callback was nullified in a race condition with
+   * stm32_cancel?
+   */
+
+  if (priv->callback)
+    {
+      /* Sample and nullify BEFORE executing callback (in case the callback
+       * restarts the oneshot).
+       */
+
+      callback       = priv->callback;
+      cbarg          = priv->arg;
+      priv->callback = NULL;
+      priv->arg      = NULL;
+
+      /* Then perform the callback */
+
+      callback(&priv->lh, cbarg);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_max_delay
+ *
+ * Description:
+ *   Determine the maximum delay of the one-shot timer (in microseconds)
+ *
+ * Input Parameters:
+ *   lower   An instance of the lower-half oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           oneshot_initialize();
+ *   ts      The location in which to return the maxumum delay.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+static int stm32_max_delay(FAR struct oneshot_lowerhalf_s *lower,
+                           FAR struct timespec *ts)
+{
+  FAR struct stm32_oneshot_lowerhalf_s *priv =
+    (FAR struct stm32_oneshot_lowerhalf_s *)lower;
+  uint64_t usecs;
+  int ret;
+
+  DEBUGASSERT(priv != NULL && ts != NULL);
+  ret = stm32_oneshot_max_delay(&priv->oneshot, &usecs);
+  if (ret >= 0)
+    {
+      uint64_t sec = usecs / 1000000;
+      usecs -= 1000000 * sec;
+
+      ts->tv_sec  = (time_t)sec;
+      ts->tv_nsec = (long)(usecs * 1000);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32_start
+ *
+ * Description:
+ *   Start the oneshot timer
+ *
+ * Input Parameters:
+ *   lower   An instance of the lower-half oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           oneshot_initialize();
+ *   handler The function to call when when the oneshot timer expires.
+ *   arg     An opaque argument that will accompany the callback.
+ *   ts      Provides the duration of the one shot timer.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+static int stm32_start(FAR struct oneshot_lowerhalf_s *lower,
+                       oneshot_callback_t callback, FAR void *arg,
+                       FAR const struct timespec *ts)
+{
+  FAR struct stm32_oneshot_lowerhalf_s *priv =
+    (FAR struct stm32_oneshot_lowerhalf_s *)lower;
+  irqstate_t flags;
+  int ret;
+
+  DEBUGASSERT(priv != NULL && callback != NULL && ts != NULL);
+
+  /* Save the callback information and start the timer */
+
+  flags          = enter_critical_section();
+  priv->callback = callback;
+  priv->arg      = arg;
+  ret            = stm32_oneshot_start(&priv->oneshot,
+                                       stm32_oneshot_handler, priv, ts);
+  leave_critical_section(flags);
+
+  if (ret < 0)
+    {
+      tmrerr("ERROR: stm32_oneshot_start failed: %d\n", flags);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32_cancel
+ *
+ * Description:
+ *   Cancel the oneshot timer and return the time remaining on the timer.
+ *
+ *   NOTE: This function may execute at a high rate with no timer running (as
+ *   when pre-emption is enabled and disabled).
+ *
+ * Input Parameters:
+ *   lower   Caller allocated instance of the oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           oneshot_initialize();
+ *   ts      The location in which to return the time remaining on the
+ *           oneshot timer.  A time of zero is returned if the timer is
+ *           not running.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success.  A call to up_timer_cancel() when
+ *   the timer is not active should also return success; a negated errno
+ *   value is returned on any failure.
+ *
+ ****************************************************************************/
+
+static int stm32_cancel(FAR struct oneshot_lowerhalf_s *lower,
+                        FAR struct timespec *ts)
+{
+  FAR struct stm32_oneshot_lowerhalf_s *priv =
+    (FAR struct stm32_oneshot_lowerhalf_s *)lower;
+  irqstate_t flags;
+  int ret;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Cancel the timer */
+
+  flags          = enter_critical_section();
+  ret            = stm32_oneshot_cancel(&priv->oneshot, ts);
+  priv->callback = NULL;
+  priv->arg      = NULL;
+  leave_critical_section(flags);
+
+  if (ret < 0)
+    {
+      tmrerr("ERROR: stm32_oneshot_cancel failed: %d\n", flags);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: oneshot_initialize
+ *
+ * Description:
+ *   Initialize the oneshot timer and return a oneshot lower half driver
+ *   instance.
+ *
+ * Input Parameters:
+ *   chan       Timer counter channel to be used.
+ *   resolution The required resolution of the timer in units of
+ *              microseconds.  NOTE that the range is restricted to the
+ *              range of uint16_t (excluding zero).
+ *
+ * Returned Value:
+ *   On success, a non-NULL instance of the oneshot lower-half driver is
+ *   returned.  NULL is return on any failure.
+ *
+ ****************************************************************************/
+
+FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan,
+                                                   uint16_t resolution)
+{
+  FAR struct stm32_oneshot_lowerhalf_s *priv;
+  int ret;
+
+  /* Allocate an instance of the lower half driver */
+
+  priv = (FAR struct stm32_oneshot_lowerhalf_s *)
+    kmm_zalloc(sizeof(struct stm32_oneshot_lowerhalf_s));
+
+  if (priv == NULL)
+    {
+      tmrerr("ERROR: Failed to initialized state structure\n");
+      return NULL;
+    }
+
+  /* Initialize the lower-half driver structure */
+
+  priv->lh.ops = &g_oneshot_ops;
+
+  /* Initialize the contained STM32 oneshot timer */
+
+  ret = stm32_oneshot_initialize(&priv->oneshot, chan, resolution);
+  if (ret < 0)
+    {
+      tmrerr("ERROR: stm32_oneshot_initialize failed: %d\n", ret);
+      kmm_free(priv);
+      return NULL;
+    }
+
+  return &priv->lh;
+}
diff --git a/arch/arm/src/stm32/stm32_otgfsdev.c b/arch/arm/src/stm32/stm32_otgfsdev.c
index 81fb004fbce49ee81cbc050ead8cbdfba63fad59..47b212c3c289c6eb87cd136c060f756662da50ba 100644
--- a/arch/arm/src/stm32/stm32_otgfsdev.c
+++ b/arch/arm/src/stm32/stm32_otgfsdev.c
@@ -1,8 +1,9 @@
 /****************************************************************************
  * arch/arm/src/stm32/stm32_otgfsdev.c
  *
- *   Copyright (C) 2012-2014 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2012-2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -81,6 +82,10 @@
 #  define CONFIG_USBDEV_MAXPOWER 100  /* mA */
 #endif
 
+#ifndef CONFIG_DEBUG_USB_INFO
+#  undef CONFIG_STM32_USBDEV_REGDEBUG
+#endif
+
 /* There is 1.25Kb of FIFO memory.  The default partitions this memory
  * so that there is a TxFIFO allocated for each endpoint and with more
  * memory provided for the common RxFIFO.  A more knowledge-able
@@ -107,7 +112,8 @@
 #  define CONFIG_USBDEV_EP3_TXFIFO_SIZE 192
 #endif
 
-#if (CONFIG_USBDEV_RXFIFO_SIZE + CONFIG_USBDEV_EP0_TXFIFO_SIZE + \
+#if (CONFIG_USBDEV_RXFIFO_SIZE + \
+    CONFIG_USBDEV_EP0_TXFIFO_SIZE + CONFIG_USBDEV_EP1_TXFIFO_SIZE + \
      CONFIG_USBDEV_EP2_TXFIFO_SIZE + CONFIG_USBDEV_EP3_TXFIFO_SIZE) > 1280
 #  error "FIFO allocations exceed FIFO memory size"
 #endif
@@ -147,6 +153,51 @@
 #  error "CONFIG_USBDEV_EP3_TXFIFO_SIZE is out of range"
 #endif
 
+#if defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469)
+#  define OTGFS_GINT_RESETS (OTGFS_GINT_USBRST | OTGFS_GINT_RSTDET)
+#  define OTGFS_GINT_RESERVED (OTGFS_GINT_RES89 | \
+                              (OTGFS_GINT_RES16 | OTGFS_GINTMSK_EPMISM) \
+                              |OTGFS_GINT_RES22)
+
+#  define OTGFS_GINT_RC_W1 (OTGFS_GINT_MMIS     | \
+                            OTGFS_GINT_SOF      | \
+                            OTGFS_GINT_ESUSP    | \
+                            OTGFS_GINT_USBSUSP  | \
+                            OTGFS_GINT_USBRST   | \
+                            OTGFS_GINT_ENUMDNE  | \
+                            OTGFS_GINT_ISOODRP  | \
+                            OTGFS_GINT_EOPF     | \
+                            OTGFS_GINT_IISOIXFR | \
+                            OTGFS_GINT_IISOOXFR | \
+                            OTGFS_GINT_RSTDET   | \
+                            OTGFS_GINT_LPMINT   | \
+                            OTGFS_GINT_CIDSCHG  | \
+                            OTGFS_GINT_DISC     | \
+                            OTGFS_GINT_SRQ      | \
+                            OTGFS_GINT_WKUP)
+#else
+#  define OTGFS_GINT_RESETS OTGFS_GINT_USBRST
+#  define OTGFS_GINT_RESERVED (OTGFS_GINT_RES89 | \
+                              (OTGFS_GINT_RES16 | OTGFS_GINTMSK_EPMISM) \
+                              |OTGFS_GINT_RES2223 | \
+                               OTGFS_GINT_RES27)
+
+#  define OTGFS_GINT_RC_W1 (OTGFS_GINT_MMIS     | \
+                            OTGFS_GINT_SOF      | \
+                            OTGFS_GINT_ESUSP    | \
+                            OTGFS_GINT_USBSUSP  | \
+                            OTGFS_GINT_USBRST   | \
+                            OTGFS_GINT_ENUMDNE  | \
+                            OTGFS_GINT_ISOODRP  | \
+                            OTGFS_GINT_EOPF     | \
+                            OTGFS_GINT_IISOIXFR | \
+                            OTGFS_GINT_IISOOXFR | \
+                            OTGFS_GINT_CIDSCHG  | \
+                            OTGFS_GINT_DISC     | \
+                            OTGFS_GINT_SRQ      | \
+                            OTGFS_GINT_WKUP)
+#endif
+
 /* Debug ***********************************************************************/
 /* Trace error codes */
 
@@ -472,7 +523,7 @@ struct stm32_usbdev_s
 
 /* Register operations ********************************************************/
 
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32_USBDEV_REGDEBUG
 static uint32_t    stm32_getreg(uint32_t addr);
 static void        stm32_putreg(uint32_t val, uint32_t addr);
 #else
@@ -568,7 +619,7 @@ static inline void stm32_otginterrupt(FAR struct stm32_usbdev_s *priv);
 
 /* First level interrupt processing */
 
-static int         stm32_usbinterrupt(int irq, FAR void *context);
+static int         stm32_usbinterrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Endpoint operations *********************************************************/
 /* Global OUT NAK controls */
@@ -792,7 +843,7 @@ const struct trace_msg_t g_usb_trace_strings_intdecode[] =
  *
  ****************************************************************************/
 
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32_USBDEV_REGDEBUG
 static uint32_t stm32_getreg(uint32_t addr)
 {
   static uint32_t prevaddr = 0;
@@ -813,7 +864,7 @@ static uint32_t stm32_getreg(uint32_t addr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              uinfo("...\n");
             }
 
           return val;
@@ -830,7 +881,7 @@ static uint32_t stm32_getreg(uint32_t addr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          uinfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -842,7 +893,7 @@ static uint32_t stm32_getreg(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%08x\n", addr, val);
+  uinfo("%08x->%08x\n", addr, val);
   return val;
 }
 #endif
@@ -855,12 +906,12 @@ static uint32_t stm32_getreg(uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32_USBDEV_REGDEBUG
 static void stm32_putreg(uint32_t val, uint32_t addr)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", addr, val);
+  uinfo("%08x<-%08x\n", addr, val);
 
   /* Write the value */
 
@@ -1218,9 +1269,9 @@ static void stm32_epin_request(FAR struct stm32_usbdev_s *priv,
       return;
     }
 
-  ullvdbg("EP%d req=%p: len=%d xfrd=%d zlp=%d\n",
-          privep->epphy, privreq, privreq->req.len,
-          privreq->req.xfrd, privep->zlp);
+  uinfo("EP%d req=%p: len=%d xfrd=%d zlp=%d\n",
+        privep->epphy, privreq, privreq->req.len,
+        privreq->req.xfrd, privep->zlp);
 
   /* Check for a special case:  If we are just starting a request (xfrd==0) and
    * the class driver is trying to send a zero-length packet (len==0).  Then set
@@ -1484,8 +1535,8 @@ static void stm32_epout_complete(FAR struct stm32_usbdev_s *priv,
       return;
     }
 
-  ullvdbg("EP%d: len=%d xfrd=%d\n",
-          privep->epphy, privreq->req.len, privreq->req.xfrd);
+  uinfo("EP%d: len=%d xfrd=%d\n",
+        privep->epphy, privreq->req.len, privreq->req.xfrd);
 
   /* Return the completed read request to the class driver and mark the state
    * IDLE.
@@ -1519,7 +1570,7 @@ static inline void stm32_ep0out_receive(FAR struct stm32_ep_s *privep, int bcnt)
   DEBUGASSERT(privep && privep->ep.priv);
   priv = (FAR struct stm32_usbdev_s *)privep->ep.priv;
 
-  ullvdbg("EP0: bcnt=%d\n", bcnt);
+  uinfo("EP0: bcnt=%d\n", bcnt);
   usbtrace(TRACE_READ(EP0), bcnt);
 
   /* Verify that an OUT SETUP request as received before this data was
@@ -1612,7 +1663,8 @@ static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, int bcnt)
       return;
     }
 
-  ullvdbg("EP%d: len=%d xfrd=%d\n", privep->epphy, privreq->req.len, privreq->req.xfrd);
+  uinfo("EP%d: len=%d xfrd=%d\n",
+        privep->epphy, privreq->req.len, privreq->req.xfrd);
   usbtrace(TRACE_READ(privep->epphy), bcnt);
 
   /* Get the number of bytes to transfer from the RxFIFO */
@@ -1696,7 +1748,7 @@ static void stm32_epout_request(FAR struct stm32_usbdev_s *priv,
               return;
             }
 
-          ullvdbg("EP%d: len=%d\n", privep->epphy, privreq->req.len);
+          uinfo("EP%d: len=%d\n", privep->epphy, privreq->req.len);
 
           /* Ignore any attempt to receive a zero length packet (this really
            * should not happen.
@@ -2490,8 +2542,8 @@ static inline void stm32_ep0out_setup(struct stm32_usbdev_s *priv)
   ctrlreq.index = GETUINT16(priv->ctrlreq.index);
   ctrlreq.len   = GETUINT16(priv->ctrlreq.len);
 
-  ullvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
-          ctrlreq.type, ctrlreq.req, ctrlreq.value, ctrlreq.index, ctrlreq.len);
+  uinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+        ctrlreq.type, ctrlreq.req, ctrlreq.value, ctrlreq.index, ctrlreq.len);
 
   /* Check for a standard request */
 
@@ -2625,7 +2677,7 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv)
           if ((daint & 1) != 0)
             {
               regval = stm32_getreg(STM32_OTGFS_DOEPINT(epno));
-              ulldbg("DOEPINT(%d) = %08x\n", epno, regval);
+              uinfo("DOEPINT(%d) = %08x\n", epno, regval);
               stm32_putreg(0xFF, STM32_OTGFS_DOEPINT(epno));
             }
 
@@ -2855,8 +2907,8 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv)
         {
           if ((daint & 1) != 0)
             {
-              ulldbg("DIEPINT(%d) = %08x\n",
-                     epno, stm32_getreg(STM32_OTGFS_DIEPINT(epno)));
+              uinfo("DIEPINT(%d) = %08x\n",
+                    epno, stm32_getreg(STM32_OTGFS_DIEPINT(epno)));
               stm32_putreg(0xFF, STM32_OTGFS_DIEPINT(epno));
             }
 
@@ -3114,154 +3166,163 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv)
 
   /* Disable the Rx status queue level interrupt */
 
-  regval = stm32_getreg(STM32_OTGFS_GINTMSK);
-  regval &= ~OTGFS_GINT_RXFLVL;
-  stm32_putreg(regval, STM32_OTGFS_GINTMSK);
+  while(0 != (stm32_getreg(STM32_OTGFS_GINTSTS) & OTGFS_GINT_RXFLVL))
+    {
 
-  /* Get the status from the top of the FIFO */
+    /* Get the status from the top of the FIFO */
 
-  regval = stm32_getreg(STM32_OTGFS_GRXSTSP);
+    regval = stm32_getreg(STM32_OTGFS_GRXSTSP);
 
-  /* Decode status fields */
+    /* Decode status fields */
 
-  epphy  = (regval & OTGFS_GRXSTSD_EPNUM_MASK) >> OTGFS_GRXSTSD_EPNUM_SHIFT;
+    epphy  = (regval & OTGFS_GRXSTSD_EPNUM_MASK) >> OTGFS_GRXSTSD_EPNUM_SHIFT;
 
-  if (epphy < STM32_NENDPOINTS)
-    {
-      privep = &priv->epout[epphy];
+        /* Workaround for bad values read from the STM32_OTGFS_GRXSTSP register
+         * happens regval is 0xb4e48168 or 0xa80c9367 or 267E781c
+         * All of which provide out of range indexes for  epout[epphy]
+         */
 
-      /* Handle the RX event according to the packet status field */
+    if (epphy < STM32_NENDPOINTS)
+      {
+        privep = &priv->epout[epphy];
 
-      switch (regval & OTGFS_GRXSTSD_PKTSTS_MASK)
-        {
-        /* Global OUT NAK.  This indicate that the global OUT NAK bit has taken
-         * effect.
-         *
-         * PKTSTS = Global OUT NAK, BCNT = 0, EPNUM = Don't Care, DPID = Don't
-         * Care.
-         */
+        /* Handle the RX event according to the packet status field */
 
-        case OTGFS_GRXSTSD_PKTSTS_OUTNAK:
+        switch (regval & OTGFS_GRXSTSD_PKTSTS_MASK)
           {
-            usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OUTNAK), 0);
-          }
-          break;
+          /* Global OUT NAK.  This indicate that the global OUT NAK bit has taken
+           * effect.
+           *
+           * PKTSTS = Global OUT NAK, BCNT = 0, EPNUM = Don't Care, DPID = Don't
+           * Care.
+           */
 
-        /* OUT data packet received.
-         *
-         * PKTSTS = DataOUT, BCNT = size of the received data OUT packet,
-         * EPNUM = EPNUM on which the packet was received, DPID = Actual Data PID.
-         */
+          case OTGFS_GRXSTSD_PKTSTS_OUTNAK:
+            {
+              usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OUTNAK), 0);
+            }
+            break;
 
-        case OTGFS_GRXSTSD_PKTSTS_OUTRECVD:
-          {
-            usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OUTRECVD), epphy);
-            bcnt = (regval & OTGFS_GRXSTSD_BCNT_MASK) >> OTGFS_GRXSTSD_BCNT_SHIFT;
-            if (bcnt > 0)
-              {
-                stm32_epout_receive(privep, bcnt);
-              }
-          }
-          break;
+          /* OUT data packet received.
+           *
+           * PKTSTS = DataOUT, BCNT = size of the received data OUT packet,
+           * EPNUM = EPNUM on which the packet was received, DPID = Actual Data PID.
+           */
 
-        /* OUT transfer completed.  This indicates that an OUT data transfer for
-         * the specified OUT endpoint has completed. After this entry is popped
-         * from the receive FIFO, the core asserts a Transfer Completed interrupt
-         * on the specified OUT endpoint.
-         *
-         * PKTSTS = Data OUT Transfer Done, BCNT = 0, EPNUM = OUT EP Num on
-         * which the data transfer is complete, DPID = Don't Care.
-         */
+          case OTGFS_GRXSTSD_PKTSTS_OUTRECVD:
+            {
+              usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OUTRECVD), epphy);
+              bcnt = (regval & OTGFS_GRXSTSD_BCNT_MASK) >> OTGFS_GRXSTSD_BCNT_SHIFT;
+              if (bcnt > 0)
+                {
+                  stm32_epout_receive(privep, bcnt);
+                }
+            }
+            break;
 
-        case OTGFS_GRXSTSD_PKTSTS_OUTDONE:
-          {
-            usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OUTDONE), epphy);
-          }
-          break;
+          /* OUT transfer completed.  This indicates that an OUT data transfer for
+           * the specified OUT endpoint has completed. After this entry is popped
+           * from the receive FIFO, the core asserts a Transfer Completed interrupt
+           * on the specified OUT endpoint.
+           *
+           * PKTSTS = Data OUT Transfer Done, BCNT = 0, EPNUM = OUT EP Num on
+           * which the data transfer is complete, DPID = Don't Care.
+           */
 
-        /* SETUP transaction completed. This indicates that the Setup stage for
-         * the specified endpoint has completed and the Data stage has started.
-         * After this entry is popped from the receive FIFO, the core asserts a
-         * Setup interrupt on the specified control OUT endpoint (triggers an
-         * interrupt).
-         *
-         * PKTSTS = Setup Stage Done, BCNT = 0, EPNUM = Control EP Num,
-         * DPID = Don't Care.
-         */
+          case OTGFS_GRXSTSD_PKTSTS_OUTDONE:
+            {
+              usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OUTDONE), epphy);
+            }
+            break;
 
-        case OTGFS_GRXSTSD_PKTSTS_SETUPDONE:
-          {
-            usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETUPDONE), epphy);
-          }
-          break;
+          /* SETUP transaction completed. This indicates that the Setup stage for
+           * the specified endpoint has completed and the Data stage has started.
+           * After this entry is popped from the receive FIFO, the core asserts a
+           * Setup interrupt on the specified control OUT endpoint (triggers an
+           * interrupt).
+           *
+           * PKTSTS = Setup Stage Done, BCNT = 0, EPNUM = Control EP Num,
+           * DPID = Don't Care.
+           */
 
-        /* SETUP data packet received.  This indicates that a SETUP packet for the
-         * specified endpoint is now available for reading from the receive FIFO.
-         *
-         * PKTSTS = SETUP, BCNT = 8, EPNUM = Control EP Num, DPID = D0.
-         */
+          case OTGFS_GRXSTSD_PKTSTS_SETUPDONE:
+            {
+              usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETUPDONE), epphy);
 
-        case OTGFS_GRXSTSD_PKTSTS_SETUPRECVD:
-          {
-            uint16_t datlen;
+              /* Now that the Setup Phase is complete if it was an OUT enable
+               * the endpoint
+               * (Doing this here prevents the loss of the first FIFO word)
+               */
 
-            usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETUPRECVD), epphy);
+              if (priv->ep0state == EP0STATE_SETUP_OUT)
+                {
 
-            /* Read EP0 setup data.  NOTE:  If multiple SETUP packets are received,
-             * the last one overwrites the previous setup packets and only that
-             * last SETUP packet will be processed.
-             */
+                  /* Clear NAKSTS so that we can receive the data */
 
-            stm32_rxfifo_read(&priv->epout[EP0], (FAR uint8_t *)&priv->ctrlreq,
-                             USB_SIZEOF_CTRLREQ);
+                  regval  = stm32_getreg(STM32_OTGFS_DOEPCTL0);
+                  regval |= OTGFS_DOEPCTL0_CNAK;
+                  stm32_putreg(regval, STM32_OTGFS_DOEPCTL0);
 
-            /* Was this an IN or an OUT SETUP packet.  If it is an OUT SETUP,
-             * then we need to wait for the completion of the data phase to
-             * process the setup command.  If it is an IN SETUP packet, then
-             * we must processing the command BEFORE we enter the DATA phase.
-             *
-             * If the data associated with the OUT SETUP packet is zero length,
-             * then, of course, we don't need to wait.
-             */
+              }
+            }
+            break;
 
-            datlen = GETUINT16(priv->ctrlreq.len);
-            if (USB_REQ_ISOUT(priv->ctrlreq.type) && datlen > 0)
-              {
-                /* Clear NAKSTS so that we can receive the data */
+          /* SETUP data packet received.  This indicates that a SETUP packet for the
+           * specified endpoint is now available for reading from the receive FIFO.
+           *
+           * PKTSTS = SETUP, BCNT = 8, EPNUM = Control EP Num, DPID = D0.
+           */
 
-                regval  = stm32_getreg(STM32_OTGFS_DOEPCTL0);
-                regval |= OTGFS_DOEPCTL0_CNAK;
-                stm32_putreg(regval, STM32_OTGFS_DOEPCTL0);
+          case OTGFS_GRXSTSD_PKTSTS_SETUPRECVD:
+            {
+              uint16_t datlen;
 
-                /* Wait for the data phase. */
+              usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETUPRECVD), epphy);
 
-                priv->ep0state = EP0STATE_SETUP_OUT;
-              }
-            else
-              {
-                /* We can process the setup data as soon as SETUP done word is
-                 * popped of the RxFIFO.
-                 */
+              /* Read EP0 setup data.  NOTE:  If multiple SETUP packets are received,
+               * the last one overwrites the previous setup packets and only that
+               * last SETUP packet will be processed.
+               */
 
-                priv->ep0state = EP0STATE_SETUP_READY;
-              }
-          }
-          break;
+              stm32_rxfifo_read(&priv->epout[EP0], (FAR uint8_t *)&priv->ctrlreq,
+                               USB_SIZEOF_CTRLREQ);
 
-        default:
-          {
-            usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS),
-                     (regval & OTGFS_GRXSTSD_PKTSTS_MASK) >> OTGFS_GRXSTSD_PKTSTS_SHIFT);
-          }
-          break;
-        }
-    }
+              /* Was this an IN or an OUT SETUP packet.  If it is an OUT SETUP,
+               * then we need to wait for the completion of the data phase to
+               * process the setup command.  If it is an IN SETUP packet, then
+               * we must processing the command BEFORE we enter the DATA phase.
+               *
+               * If the data associated with the OUT SETUP packet is zero length,
+               * then, of course, we don't need to wait.
+               */
 
-  /* Enable the Rx Status Queue Level interrupt */
+              datlen = GETUINT16(priv->ctrlreq.len);
+              if (USB_REQ_ISOUT(priv->ctrlreq.type) && datlen > 0)
+                {
+                  /* Wait for the data phase. */
 
-  regval  = stm32_getreg(STM32_OTGFS_GINTMSK);
-  regval |= OTGFS_GINT_RXFLVL;
-  stm32_putreg(regval, STM32_OTGFS_GINTMSK);
+                  priv->ep0state = EP0STATE_SETUP_OUT;
+                }
+              else
+                {
+                  /* We can process the setup data as soon as SETUP done word is
+                   * popped of the RxFIFO.
+                   */
+
+                  priv->ep0state = EP0STATE_SETUP_READY;
+                }
+            }
+            break;
+
+          default:
+            {
+              usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS),
+                       (regval & OTGFS_GRXSTSD_PKTSTS_MASK) >> OTGFS_GRXSTSD_PKTSTS_SHIFT);
+            }
+            break;
+          }
+      }
+    }
 }
 
 /****************************************************************************
@@ -3284,7 +3345,7 @@ static inline void stm32_enuminterrupt(FAR struct stm32_usbdev_s *priv)
 
   regval  = stm32_getreg(STM32_OTGFS_GUSBCFG);
   regval &= ~OTGFS_GUSBCFG_TRDT_MASK;
-  regval |=  OTGFS_GUSBCFG_TRDT(5);
+  regval |=  OTGFS_GUSBCFG_TRDT(6);
   stm32_putreg(regval, STM32_OTGFS_GUSBCFG);
 }
 
@@ -3481,7 +3542,7 @@ static inline void stm32_otginterrupt(FAR struct stm32_usbdev_s *priv)
 
   /* Clear OTG interrupt */
 
-  stm32_putreg(retval, STM32_OTGFS_GOTGINT);
+  stm32_putreg(regval, STM32_OTGFS_GOTGINT);
 }
 #endif
 
@@ -3493,7 +3554,7 @@ static inline void stm32_otginterrupt(FAR struct stm32_usbdev_s *priv)
  *
  ****************************************************************************/
 
-static int stm32_usbinterrupt(int irq, FAR void *context)
+static int stm32_usbinterrupt(int irq, FAR void *context, FAR void *arg)
 {
   /* At present, there is only a single OTG FS device support. Hence it is
    * pre-allocated as g_otgfsdev.  However, in most code, the private data
@@ -3503,6 +3564,7 @@ static int stm32_usbinterrupt(int irq, FAR void *context)
 
   FAR struct stm32_usbdev_s *priv = &g_otgfsdev;
   uint32_t regval;
+  uint32_t reserved;
 
   usbtrace(TRACE_INTENTRY(STM32_TRACEINTID_USB), 0);
 
@@ -3514,14 +3576,21 @@ static int stm32_usbinterrupt(int irq, FAR void *context)
    * some interrupts (like RXFLVL) will generate additional interrupting
    * events.
    */
-
   for (; ; )
     {
       /* Get the set of pending, un-masked interrupts */
 
       regval  = stm32_getreg(STM32_OTGFS_GINTSTS);
+      reserved = (regval & OTGFS_GINT_RESERVED);
       regval &= stm32_getreg(STM32_OTGFS_GINTMSK);
 
+      /* With out modifying the reserved bits, acknowledge all
+       * **Writable** pending irqs we will service below
+       */
+
+      stm32_putreg(((regval | reserved) & OTGFS_GINT_RC_W1), STM32_OTGFS_GINTSTS);
+
+
       /* Break out of the loop when there are no further pending (and
        * unmasked) interrupts to be processes.
        */
@@ -3540,7 +3609,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context)
         {
           usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUT), (uint16_t)regval);
           stm32_epout_interrupt(priv);
-          stm32_putreg(OTGFS_GINT_OEP, STM32_OTGFS_GINTSTS);
         }
 
       /* IN endpoint interrupt.  The core sets this bit to indicate that
@@ -3551,7 +3619,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context)
         {
           usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN), (uint16_t)regval);
           stm32_epin_interrupt(priv);
-          stm32_putreg(OTGFS_GINT_IEP, STM32_OTGFS_GINTSTS);
         }
 
       /* Host/device mode mismatch error interrupt */
@@ -3560,7 +3627,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context)
       if ((regval & OTGFS_GINT_MMIS) != 0)
         {
           usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_MISMATCH), (uint16_t)regval);
-          stm32_putreg(OTGFS_GINT_MMIS, STM32_OTGFS_GINTSTS);
         }
 #endif
 
@@ -3570,7 +3636,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context)
         {
           usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_WAKEUP), (uint16_t)regval);
           stm32_resumeinterrupt(priv);
-          stm32_putreg(OTGFS_GINT_WKUP, STM32_OTGFS_GINTSTS);
         }
 
       /* USB suspend interrupt */
@@ -3579,7 +3644,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context)
         {
           usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SUSPEND), (uint16_t)regval);
           stm32_suspendinterrupt(priv);
-          stm32_putreg(OTGFS_GINT_USBSUSP, STM32_OTGFS_GINTSTS);
         }
 
       /* Start of frame interrupt */
@@ -3588,7 +3652,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context)
       if ((regval & OTGFS_GINT_SOF) != 0)
         {
           usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SOF), (uint16_t)regval);
-          stm32_putreg(OTGFS_GINT_SOF, STM32_OTGFS_GINTSTS);
         }
 #endif
 
@@ -3600,12 +3663,11 @@ static int stm32_usbinterrupt(int irq, FAR void *context)
         {
           usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_RXFIFO), (uint16_t)regval);
           stm32_rxinterrupt(priv);
-          stm32_putreg(OTGFS_GINT_RXFLVL, STM32_OTGFS_GINTSTS);
         }
 
       /* USB reset interrupt */
 
-      if ((regval & OTGFS_GINT_USBRST) != 0)
+      if ((regval & OTGFS_GINT_RESETS) != 0)
         {
           usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_DEVRESET), (uint16_t)regval);
 
@@ -3613,7 +3675,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context)
 
           stm32_usbreset(priv);
           usbtrace(TRACE_INTEXIT(STM32_TRACEINTID_USB), 0);
-          stm32_putreg(OTGFS_GINT_USBRST, STM32_OTGFS_GINTSTS);
           return OK;
         }
 
@@ -3623,7 +3684,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context)
         {
           usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_ENUMDNE), (uint16_t)regval);
           stm32_enuminterrupt(priv);
-          stm32_putreg(OTGFS_GINT_ENUMDNE, STM32_OTGFS_GINTSTS);
         }
 
       /* Incomplete isochronous IN transfer interrupt.  When the core finds
@@ -3637,7 +3697,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context)
         {
           usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_IISOIXFR), (uint16_t)regval);
           stm32_isocininterrupt(priv);
-          stm32_putreg(OTGFS_GINT_IISOIXFR, STM32_OTGFS_GINTSTS);
         }
 
       /* Incomplete isochronous OUT transfer.  For isochronous OUT
@@ -3654,7 +3713,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context)
         {
           usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_IISOOXFR), (uint16_t)regval);
           stm32_isocoutinterrupt(priv);
-          stm32_putreg(OTGFS_GINT_IISOOXFR, STM32_OTGFS_GINTSTS);
         }
 #endif
 
@@ -3665,7 +3723,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context)
         {
           usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SRQ), (uint16_t)regval);
           stm32_sessioninterrupt(priv);
-          stm32_putreg(OTGFS_GINT_SRQ, STM32_OTGFS_GINTSTS);
         }
 
       /* OTG interrupt */
@@ -3674,7 +3731,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context)
         {
           usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OTG), (uint16_t)regval);
           stm32_otginterrupt(priv);
-          stm32_putreg(OTGFS_GINT_OTG, STM32_OTGFS_GINTSTS);
         }
 #endif
     }
@@ -3801,7 +3857,7 @@ static int stm32_epout_configure(FAR struct stm32_ep_s *privep, uint8_t eptype,
             break;
 
           default:
-            udbg("Unsupported maxpacket: %d\n", maxpacket);
+            uerr("ERROR: Unsupported maxpacket: %d\n", maxpacket);
             return -EINVAL;
         }
     }
@@ -3896,7 +3952,7 @@ static int stm32_epin_configure(FAR struct stm32_ep_s *privep, uint8_t eptype,
             break;
 
           default:
-            udbg("Unsupported maxpacket: %d\n", maxpacket);
+            uerr("ERROR: Unsupported maxpacket: %d\n", maxpacket);
             return -EINVAL;
         }
     }
@@ -4185,7 +4241,7 @@ static int stm32_ep_disable(FAR struct usbdev_ep_s *ep)
 {
   FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -4225,7 +4281,7 @@ static FAR struct usbdev_req_s *stm32_ep_allocreq(FAR struct usbdev_ep_s *ep)
 {
   FAR struct stm32_req_s *privreq;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -4258,7 +4314,7 @@ static void stm32_ep_freereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
 {
   FAR struct stm32_req_s *privreq = (FAR struct stm32_req_s *)req;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -4330,11 +4386,11 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
 
   /* Some sanity checking */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!req || !req->callback || !req->buf || !ep)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
-      ullvdbg("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+      uinfo("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
       return -EINVAL;
     }
 #endif
@@ -4342,7 +4398,7 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
   usbtrace(TRACE_EPSUBMIT, privep->epphy);
   priv = privep->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv->driver)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_NOTCONFIGURED), priv->usbdev.speed);
@@ -4419,7 +4475,7 @@ static int stm32_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
   FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep;
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -4877,7 +4933,7 @@ static int stm32_selfpowered(struct usbdev_s *dev, bool selfpowered)
 
   usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -5170,9 +5226,9 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv)
 
   /* Deactivate the power down */
 
-#if defined(CONFIG_STM32_STM32F446)
-  /* In the case of the STM32F446 the meaning of the bit has changed to VBUS
-   * Detection Enable when set
+#if defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469)
+  /* In the case of the STM32F446 or STM32F469 the meaning of the bit
+   * has changed to VBUS Detection Enable when set
    */
 
   regval  = OTGFS_GCCFG_PWRDWN;
@@ -5197,11 +5253,11 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv)
   stm32_putreg(regval, STM32_OTGFS_GCCFG);
   up_mdelay(20);
 
-  /* For the new OTG controller in the F446 when VBUS sensing is not used we
+  /* For the new OTG controller in the F446, F469 when VBUS sensing is not used we
    * need to force the B session valid
    */
 
-#if defined(CONFIG_STM32_STM32F446)
+#if defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469)
 # ifndef CONFIG_USBDEV_VBUSSENSING
   regval  =  stm32_getreg(STM32_OTGFS_GOTGCTL);
   regval |= (OTGFS_GOTGCTL_BVALOEN | OTGFS_GOTGCTL_BVALOVAL);
@@ -5333,7 +5389,9 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv)
 
   /* Clear any pending interrupts */
 
-  stm32_putreg(0xbfffffff, STM32_OTGFS_GINTSTS);
+  regval = stm32_getreg(STM32_OTGFS_GINTSTS);
+  regval &=  OTGFS_GINT_RESERVED;
+  stm32_putreg(regval | OTGFS_GINT_RC_W1, STM32_OTGFS_GINTSTS);
 
   /* Enable the interrupts in the INTMSK */
 
@@ -5444,10 +5502,10 @@ void up_usbinitialize(void)
 
   /* Attach the OTG FS interrupt handler */
 
-  ret = irq_attach(STM32_IRQ_OTGFS, stm32_usbinterrupt);
+  ret = irq_attach(STM32_IRQ_OTGFS, stm32_usbinterrupt, NULL);
   if (ret < 0)
     {
-      udbg("irq_attach failed\n", ret);
+      uerr("ERROR: irq_attach failed\n", ret);
       goto errout;
     }
 
@@ -5560,7 +5618,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
 
   usbtrace(TRACE_DEVREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !driver->ops->bind || !driver->ops->unbind ||
       !driver->ops->disconnect || !driver->ops->setup)
     {
@@ -5631,7 +5689,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
 
   usbtrace(TRACE_DEVUNREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (driver != priv->driver)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/stm32/stm32_otgfshost.c b/arch/arm/src/stm32/stm32_otgfshost.c
index 81f6ded2697d4c576038b7bc699d319771118fb8..6d66203dcf4df4a8591f606e82ec0fe2ebbda072 100644
--- a/arch/arm/src/stm32/stm32_otgfshost.c
+++ b/arch/arm/src/stm32/stm32_otgfshost.c
@@ -52,6 +52,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -93,9 +94,9 @@
  *  CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts.  Why would you ever
  *    want to do that?
  *  CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
- *    debug.  Depends on CONFIG_DEBUG.
+ *    debug.  Depends on CONFIG_DEBUG_FEATURES.
  *  CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
- *    packets. Depends on CONFIG_DEBUG.
+ *    packets. Depends on CONFIG_DEBUG_FEATURES.
  */
 
 /* Pre-requisites (partial) */
@@ -128,9 +129,9 @@
 #  define CONFIG_STM32_OTGFS_DESCSIZE 128
 #endif
 
-/* Register/packet debug depends on CONFIG_DEBUG */
+/* Register/packet debug depends on CONFIG_DEBUG_FEATURES */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_USB_INFO
 #  undef CONFIG_STM32_USBHOST_REGDEBUG
 #  undef CONFIG_STM32_USBHOST_PKTDUMP
 #endif
@@ -403,7 +404,7 @@ static inline void stm32_gint_ipxfrisr(FAR struct stm32_usbhost_s *priv);
 
 /* First level, global interrupt handler */
 
-static int stm32_gint_isr(int irq, FAR void *context);
+static int stm32_gint_isr(int irq, FAR void *context, FAR void *arg);
 
 /* Interrupt controls */
 
@@ -506,7 +507,7 @@ static struct usbhost_connection_s g_usbconn =
 #ifdef CONFIG_STM32_USBHOST_REGDEBUG
 static void stm32_printreg(uint32_t addr, uint32_t val, bool iswrite)
 {
-  lldbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
+  uinfo("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
 }
 #endif
 
@@ -556,7 +557,7 @@ static void stm32_checkreg(uint32_t addr, uint32_t val, bool iswrite)
             {
               /* No.. More than one. */
 
-              lldbg("[repeats %d more times]\n", count);
+              uinfo("[repeats %d more times]\n", count);
             }
         }
 
@@ -1284,7 +1285,7 @@ static int stm32_ctrlep_alloc(FAR struct stm32_usbhost_s *priv,
   ctrlep = (FAR struct stm32_ctrlinfo_s *)kmm_malloc(sizeof(struct stm32_ctrlinfo_s));
   if (ctrlep == NULL)
     {
-      udbg("ERROR: Failed to allocate control endpoint container\n");
+      uerr("ERROR: Failed to allocate control endpoint container\n");
       return -ENOMEM;
     }
 
@@ -1294,7 +1295,7 @@ static int stm32_ctrlep_alloc(FAR struct stm32_usbhost_s *priv,
                              hport->funcaddr, hport->speed, ctrlep);
   if (ret < 0)
     {
-      udbg("ERROR: stm32_ctrlchan_alloc failed: %d\n", ret);
+      uerr("ERROR: stm32_ctrlchan_alloc failed: %d\n", ret);
       kmm_free(ctrlep);
       return ret;
     }
@@ -1346,7 +1347,7 @@ static int stm32_xfrep_alloc(FAR struct stm32_usbhost_s *priv,
   chidx = stm32_chan_alloc(priv);
   if (chidx < 0)
     {
-      udbg("ERROR: Failed to allocate a host channel\n");
+      uerr("ERROR: Failed to allocate a host channel\n");
       return -ENOMEM;
     }
 
@@ -1826,20 +1827,20 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
                                  FAR uint8_t *buffer, size_t buflen)
 {
   FAR struct stm32_chan_s *chan;
-  systime_t start;
-  systime_t elapsed;
+  ssize_t xfrd;
   int ret;
 
   /* Loop until the transfer completes (i.e., buflen is decremented to zero)
-   * or a fatal error occurs (any error other than a simple NAK)
+   * or a fatal error occurs any error other than a simple NAK.  NAK would
+   * simply indicate the end of the transfer (short-transfer).
    */
 
   chan         = &priv->chan[chidx];
   chan->buffer = buffer;
   chan->buflen = buflen;
   chan->xfrd   = 0;
+  xfrd         = 0;
 
-  start = clock_systimer();
   while (chan->xfrd < chan->buflen)
     {
       /* Set up for the wait BEFORE starting the transfer */
@@ -1856,7 +1857,7 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
       ret = stm32_in_setup(priv, chidx);
       if (ret < 0)
         {
-          udbg("ERROR: stm32_in_setup failed: %d\n", ret);
+          uerr("ERROR: stm32_in_setup failed: %d\n", ret);
           return (ssize_t)ret;
         }
 
@@ -1864,36 +1865,48 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
 
       ret = stm32_chan_wait(priv, chan);
 
-      /* EAGAIN indicates that the device NAKed the transfer and we need
-       * do try again.  Anything else (success or other errors) will
-       * cause use to return
+      /* EAGAIN indicates that the device NAKed the transfer.  In the case
+       * of a NAK, we do not retry but rather assume that the transfer is
+       * commplete and return the data that we have received.  Retry could
+       * be handled in class driver.
        */
 
       if (ret < 0)
         {
-          usbhost_trace1(OTGFS_TRACE1_TRNSFRFAILED, ret);
-
-          /* Check for a special case:  If (1) the transfer was NAKed and (2)
-           * no Tx FIFO empty or Rx FIFO not-empty event occurred, then we
-           * should be able to just flush the Rx and Tx FIFOs and try again.
-           * We can detect this latter case because the then the transfer
-           * buffer pointer and buffer size will be unaltered.
+          /* The transfer failed.  If we received a NAK, return all data
+           * buffered so far (if any).
            */
 
-          elapsed = clock_systimer() - start;
-          if (ret != -EAGAIN ||                  /* Not a NAK condition OR */
-              elapsed >= STM32_DATANAK_DELAY ||  /* Timeout has elapsed OR */
-              chan->xfrd > 0)                    /* Data has been partially transferred */
+          if (ret == -EAGAIN)
             {
-              /* Break out and return the error */
+              /* Was data buffered prior to the NAK? */
 
-              udbg("ERROR: stm32_chan_wait failed: %d\n", ret);
-              return (ssize_t)ret;
+              if (xfrd > 0)
+                {
+                  /* Yes, return the amount of data received */
+
+                  return xfrd;
+                }
+              else
+                {
+                  /* No... Break out and return the NAK */
+
+                  return (ssize_t)ret;
+                }
             }
+
+          usbhost_trace1(OTGFS_TRACE1_TRNSFRFAILED, ret);
+
+          /* Break out and return the error */
+
+          uerr("ERROR: stm32_chan_wait failed: %d\n", ret);
+          return (ssize_t)ret;
         }
+
+      xfrd += chan->xfrd;
     }
 
-  return (ssize_t)chan->xfrd;
+  return xfrd;
 }
 
 /****************************************************************************
@@ -1932,13 +1945,13 @@ static void stm32_in_next(FAR struct stm32_usbhost_s *priv,
           return;
         }
 
-      udbg("ERROR: stm32_in_setup failed: %d\n", ret);
+      uerr("ERROR: stm32_in_setup failed: %d\n", ret);
       result = ret;
     }
 
   /* The transfer is complete, with or without an error */
 
-  uvdbg("Transfer complete:  %d\n", result);
+  uinfo("Transfer complete:  %d\n", result);
 
   /* Extract the callback information */
 
@@ -1990,7 +2003,7 @@ static int stm32_in_asynch(FAR struct stm32_usbhost_s *priv, int chidx,
   ret = stm32_chan_asynchsetup(priv, chan, callback, arg);
   if (ret < 0)
     {
-      udbg("ERROR: stm32_chan_asynchsetup failed: %d\n", ret);
+      uerr("ERROR: stm32_chan_asynchsetup failed: %d\n", ret);
       return ret;
     }
 
@@ -1999,7 +2012,7 @@ static int stm32_in_asynch(FAR struct stm32_usbhost_s *priv, int chidx,
   ret = stm32_in_setup(priv, chidx);
   if (ret < 0)
     {
-      udbg("ERROR: stm32_in_setup failed: %d\n", ret);
+      uerr("ERROR: stm32_in_setup failed: %d\n", ret);
     }
 
   /* And return with the transfer pending */
@@ -2125,7 +2138,7 @@ static ssize_t stm32_out_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
       ret = stm32_out_setup(priv, chidx);
       if (ret < 0)
         {
-          udbg("ERROR: stm32_out_setup failed: %d\n", ret);
+          uerr("ERROR: stm32_out_setup failed: %d\n", ret);
           return (ssize_t)ret;
         }
 
@@ -2153,7 +2166,7 @@ static ssize_t stm32_out_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
             {
               /* Break out and return the error */
 
-              udbg("ERROR: stm32_chan_wait failed: %d\n", ret);
+              uerr("ERROR: stm32_chan_wait failed: %d\n", ret);
               return (ssize_t)ret;
             }
 
@@ -2218,13 +2231,13 @@ static void stm32_out_next(FAR struct stm32_usbhost_s *priv,
           return;
         }
 
-      udbg("ERROR: stm32_out_setup failed: %d\n", ret);
+      uerr("ERROR: stm32_out_setup failed: %d\n", ret);
       result = ret;
     }
 
   /* The transfer is complete, with or without an error */
 
-  uvdbg("Transfer complete:  %d\n", result);
+  uinfo("Transfer complete:  %d\n", result);
 
   /* Extract the callback information */
 
@@ -2276,7 +2289,7 @@ static int stm32_out_asynch(FAR struct stm32_usbhost_s *priv, int chidx,
   ret = stm32_chan_asynchsetup(priv, chan, callback, arg);
   if (ret < 0)
     {
-      udbg("ERROR: stm32_chan_asynchsetup failed: %d\n", ret);
+      uerr("ERROR: stm32_chan_asynchsetup failed: %d\n", ret);
       return ret;
     }
 
@@ -2285,7 +2298,7 @@ static int stm32_out_asynch(FAR struct stm32_usbhost_s *priv, int chidx,
   ret = stm32_out_setup(priv, chidx);
   if (ret < 0)
     {
-      udbg("ERROR: stm32_out_setup failed: %d\n", ret);
+      uerr("ERROR: stm32_out_setup failed: %d\n", ret);
     }
 
   /* And return with the transfer pending */
@@ -2370,7 +2383,7 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv,
   /* AND the two to get the set of enabled, pending HC interrupts */
 
   pending &= regval;
-  ullvdbg("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
+  uinfo("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
 
   /* Check for a pending ACK response received/transmitted (ACK) interrupt */
 
@@ -2556,7 +2569,8 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv,
 #if 1
       /* Halt the interrupt channel */
 
-      if (chan->eptype == OTGFS_EPTYPE_INTR)
+      if (chan->eptype == OTGFS_EPTYPE_INTR ||
+          chan->eptype == OTGFS_EPTYPE_BULK)
         {
           /* Halt the channel -- the CHH interrupt is expected next */
 
@@ -2567,11 +2581,13 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv,
        * REVISIT: This can cause a lot of interrupts!
        */
 
-      else if (chan->eptype == OTGFS_EPTYPE_CTRL ||
-               chan->eptype == OTGFS_EPTYPE_BULK)
+      else if (chan->eptype == OTGFS_EPTYPE_CTRL /*||
+               chan->eptype == OTGFS_EPTYPE_BULK*/)
         {
           /* Re-activate the channel by clearing CHDIS and assuring that
            * CHENA is set
+           *
+           * TODO: set channel reason to NACK?
            */
 
           regval  = stm32_getreg(STM32_OTGFS_HCCHAR(chidx));
@@ -2579,6 +2595,7 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv,
           regval &= ~OTGFS_HCCHAR_CHDIS;
           stm32_putreg(STM32_OTGFS_HCCHAR(chidx), regval);
         }
+
 #else
       /* Halt all transfers on the NAK -- the CHH interrupt is expected next */
 
@@ -2631,7 +2648,7 @@ static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv,
   /* AND the two to get the set of enabled, pending HC interrupts */
 
   pending &= regval;
-  ullvdbg("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
+  uinfo("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
 
   /* Check for a pending ACK response received/transmitted (ACK) interrupt */
 
@@ -2888,6 +2905,7 @@ static void stm32_gint_disconnected(FAR struct stm32_usbhost_s *priv)
       stm32_chan_freeall(priv);
 
       priv->rhport.hport.speed = USB_SPEED_FULL;
+      priv->rhport.hport.funcaddr = 0;
 
       /* Notify any waiters that there is a change in the connection state */
 
@@ -2949,7 +2967,7 @@ static inline void stm32_gint_rxflvlisr(FAR struct stm32_usbhost_s *priv)
   /* Read and pop the next status from the Rx FIFO */
 
   grxsts = stm32_getreg(STM32_OTGFS_GRXSTSP);
-  ullvdbg("GRXSTS: %08x\n", grxsts);
+  uinfo("GRXSTS: %08x\n", grxsts);
 
   /* Isolate the channel number/index in the status word */
 
@@ -3102,8 +3120,8 @@ static inline void stm32_gint_nptxfeisr(FAR struct stm32_usbhost_s *priv)
 
   /* Write the next group of packets into the Tx FIFO */
 
-  ullvdbg("HNPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
-           regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
+  uinfo("HNPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
+         regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
 
   stm32_gint_wrpacket(priv, chan->buffer, chidx, wrsize);
 }
@@ -3190,8 +3208,8 @@ static inline void stm32_gint_ptxfeisr(FAR struct stm32_usbhost_s *priv)
 
   /* Write the next group of packets into the Tx FIFO */
 
-  ullvdbg("HPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
-           regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
+  uinfo("HPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
+         regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
 
   stm32_gint_wrpacket(priv, chan->buffer, chidx, wrsize);
 }
@@ -3429,7 +3447,7 @@ static inline void stm32_gint_ipxfrisr(FAR struct stm32_usbhost_s *priv)
  *
  ****************************************************************************/
 
-static int stm32_gint_isr(int irq, FAR void *context)
+static int stm32_gint_isr(int irq, FAR void *context, FAR void *arg)
 {
   /* At present, there is only support for a single OTG FS host. Hence it is
    * pre-allocated as g_usbhost.  However, in most code, the private data
@@ -3760,7 +3778,7 @@ static int stm32_wait(FAR struct usbhost_connection_s *conn,
           *hport = connport;
           leave_critical_section(flags);
 
-          uvdbg("RHport Connected: %s\n", connport->connected ? "YES" : "NO");
+          uinfo("RHport Connected: %s\n", connport->connected ? "YES" : "NO");
           return OK;
         }
 
@@ -3777,7 +3795,7 @@ static int stm32_wait(FAR struct usbhost_connection_s *conn,
           *hport = connport;
           leave_critical_section(flags);
 
-          uvdbg("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
+          uinfo("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
           return OK;
         }
 #endif
@@ -3865,7 +3883,7 @@ static int stm32_rh_enumerate(FAR struct stm32_usbhost_s *priv,
   ret = stm32_ctrlchan_alloc(priv, 0, 0, priv->rhport.hport.speed, &priv->ep0);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to allocate a control endpoint: %d\n", ret);
+      uerr("ERROR: Failed to allocate a control endpoint: %d\n", ret);
     }
 
   return ret;
@@ -3897,7 +3915,7 @@ static int stm32_enumerate(FAR struct usbhost_connection_s *conn,
 
   /* Then let the common usbhost_enumerate do the real enumeration. */
 
-  uvdbg("Enumerate the device\n");
+  uinfo("Enumerate the device\n");
   priv->smstate = SMSTATE_ENUM;
   ret = usbhost_enumerate(hport, &hport->devclass);
 
@@ -3911,7 +3929,7 @@ static int stm32_enumerate(FAR struct usbhost_connection_s *conn,
     {
       /* Return to the disconnected state */
 
-      udbg("ERROR: Enumeration failed: %d\n", ret);
+      uerr("ERROR: Enumeration failed: %d\n", ret);
       stm32_gint_disconnected(priv);
     }
 
@@ -4312,7 +4330,7 @@ static int stm32_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
 
   DEBUGASSERT(priv != NULL && ep0info != NULL && req != NULL);
   usbhost_vtrace2(OTGFS_VTRACE2_CTRLIN, req->type, req->req);
-  uvdbg("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
+  uinfo("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
         req->type, req->req, req->value[1], req->value[0],
         req->index[1], req->index[0], req->len[1], req->len[0]);
 
@@ -4397,7 +4415,7 @@ static int stm32_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
 
   DEBUGASSERT(priv != NULL && ep0info != NULL && req != NULL);
   usbhost_vtrace2(OTGFS_VTRACE2_CTRLOUT, req->type, req->req);
-  uvdbg("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
+  uinfo("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
         req->type, req->req, req->value[1], req->value[0],
         req->index[1], req->index[0], req->len[1], req->len[0]);
 
@@ -4515,7 +4533,7 @@ static ssize_t stm32_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep
   unsigned int chidx = (unsigned int)ep;
   ssize_t nbytes;
 
-  uvdbg("chidx: %d buflen: %d\n",  (unsigned int)ep, buflen);
+  uinfo("chidx: %d buflen: %d\n",  (unsigned int)ep, buflen);
 
   DEBUGASSERT(priv && buffer && chidx < STM32_MAX_TX_FIFOS && buflen > 0);
 
@@ -4582,7 +4600,7 @@ static int stm32_asynch(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep,
   unsigned int chidx = (unsigned int)ep;
   int ret;
 
-  uvdbg("chidx: %d buflen: %d\n",  (unsigned int)ep, buflen);
+  uinfo("chidx: %d buflen: %d\n",  (unsigned int)ep, buflen);
 
   DEBUGASSERT(priv && buffer && chidx < STM32_MAX_TX_FIFOS && buflen > 0);
 
@@ -4632,7 +4650,7 @@ static int stm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
   unsigned int chidx = (unsigned int)ep;
   irqstate_t flags;
 
-  uvdbg("chidx: %u: %d\n",  chidx);
+  uinfo("chidx: %u: %d\n",  chidx);
 
   DEBUGASSERT(priv && chidx < STM32_MAX_TX_FIFOS);
   chan = &priv->chan[chidx];
@@ -4727,7 +4745,7 @@ static int stm32_connect(FAR struct usbhost_driver_s *drvr,
   /* Set the connected/disconnected flag */
 
   hport->connected = connected;
-  ullvdbg("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
+  uinfo("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
 
   /* Report the connection event */
 
@@ -5090,6 +5108,12 @@ static inline void stm32_sw_initialize(FAR struct stm32_usbhost_s *priv)
   sem_init(&priv->pscsem,  0, 0);
   sem_init(&priv->exclsem, 0, 1);
 
+  /* The pscsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->pscsem, SEM_PRIO_NONE);
+
   /* Initialize the driver state data */
 
   priv->smstate   = SMSTATE_DETACHED;
@@ -5105,8 +5129,15 @@ static inline void stm32_sw_initialize(FAR struct stm32_usbhost_s *priv)
   for (i = 0; i < STM32_MAX_TX_FIFOS; i++)
     {
       FAR struct stm32_chan_s *chan = &priv->chan[i];
+
       chan->chidx = i;
+
+      /* The waitsem semaphore is used for signaling and, hence, should not
+       * have priority inheritance enabled.
+       */
+
       sem_init(&chan->waitsem,  0, 0);
+      sem_setprotocol(&chan->waitsem, SEM_PRIO_NONE);
     }
 }
 
@@ -5287,7 +5318,7 @@ FAR struct usbhost_connection_s *stm32_otgfshost_initialize(int controller)
 
   /* Attach USB host controller interrupt handler */
 
-  if (irq_attach(STM32_IRQ_OTGFS, stm32_gint_isr) != 0)
+  if (irq_attach(STM32_IRQ_OTGFS, stm32_gint_isr, NULL) != 0)
     {
       usbhost_trace1(OTGFS_TRACE1_IRQATTACH, 0);
       return NULL;
diff --git a/arch/arm/src/stm32/stm32_otghsdev.c b/arch/arm/src/stm32/stm32_otghsdev.c
index 07e9f0af1ca694661d14f28d6947f6dde2ce3628..97474f2f435b6f908bb86a38a73232da9e1a2a5f 100644
--- a/arch/arm/src/stm32/stm32_otghsdev.c
+++ b/arch/arm/src/stm32/stm32_otghsdev.c
@@ -81,6 +81,10 @@
 #  define CONFIG_USBDEV_MAXPOWER 100  /* mA */
 #endif
 
+#ifndef CONFIG_DEBUG_USB_INFO
+#  undef CONFIG_STM32_USBDEV_REGDEBUG
+#endif
+
 /* There is 1.25Kb of FIFO memory.  The default partitions this memory
  * so that there is a TxFIFO allocated for each endpoint and with more
  * memory provided for the common RxFIFO.  A more knowledge-able
@@ -472,7 +476,7 @@ struct stm32_usbdev_s
 
 /* Register operations ********************************************************/
 
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32_USBDEV_REGDEBUG
 static uint32_t    stm32_getreg(uint32_t addr);
 static void        stm32_putreg(uint32_t val, uint32_t addr);
 #else
@@ -568,7 +572,7 @@ static inline void stm32_otginterrupt(FAR struct stm32_usbdev_s *priv);
 
 /* First level interrupt processing */
 
-static int         stm32_usbinterrupt(int irq, FAR void *context);
+static int         stm32_usbinterrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Endpoint operations *********************************************************/
 /* Global OUT NAK controls */
@@ -792,7 +796,7 @@ const struct trace_msg_t g_usb_trace_strings_intdecode[] =
  *
  ****************************************************************************/
 
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32_USBDEV_REGDEBUG
 static uint32_t stm32_getreg(uint32_t addr)
 {
   static uint32_t prevaddr = 0;
@@ -813,7 +817,7 @@ static uint32_t stm32_getreg(uint32_t addr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              uinfo("...\n");
             }
 
           return val;
@@ -830,7 +834,7 @@ static uint32_t stm32_getreg(uint32_t addr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          uinfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -842,7 +846,7 @@ static uint32_t stm32_getreg(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%08x\n", addr, val);
+  uinfo("%08x->%08x\n", addr, val);
   return val;
 }
 #endif
@@ -855,12 +859,12 @@ static uint32_t stm32_getreg(uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32_USBDEV_REGDEBUG
 static void stm32_putreg(uint32_t val, uint32_t addr)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", addr, val);
+  uinfo("%08x<-%08x\n", addr, val);
 
   /* Write the value */
 
@@ -1218,9 +1222,9 @@ static void stm32_epin_request(FAR struct stm32_usbdev_s *priv,
       return;
     }
 
-  ullvdbg("EP%d req=%p: len=%d xfrd=%d zlp=%d\n",
-          privep->epphy, privreq, privreq->req.len,
-          privreq->req.xfrd, privep->zlp);
+  uinfo("EP%d req=%p: len=%d xfrd=%d zlp=%d\n",
+        privep->epphy, privreq, privreq->req.len,
+        privreq->req.xfrd, privep->zlp);
 
   /* Check for a special case:  If we are just starting a request (xfrd==0) and
    * the class driver is trying to send a zero-length packet (len==0).  Then set
@@ -1484,8 +1488,8 @@ static void stm32_epout_complete(FAR struct stm32_usbdev_s *priv,
       return;
     }
 
-  ullvdbg("EP%d: len=%d xfrd=%d\n",
-          privep->epphy, privreq->req.len, privreq->req.xfrd);
+  uinfo("EP%d: len=%d xfrd=%d\n",
+        privep->epphy, privreq->req.len, privreq->req.xfrd);
 
   /* Return the completed read request to the class driver and mark the state
    * IDLE.
@@ -1519,7 +1523,7 @@ static inline void stm32_ep0out_receive(FAR struct stm32_ep_s *privep, int bcnt)
   DEBUGASSERT(privep && privep->ep.priv);
   priv = (FAR struct stm32_usbdev_s *)privep->ep.priv;
 
-  ullvdbg("EP0: bcnt=%d\n", bcnt);
+  uinfo("EP0: bcnt=%d\n", bcnt);
   usbtrace(TRACE_READ(EP0), bcnt);
 
   /* Verify that an OUT SETUP request as received before this data was
@@ -1612,7 +1616,8 @@ static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, int bcnt)
       return;
     }
 
-  ullvdbg("EP%d: len=%d xfrd=%d\n", privep->epphy, privreq->req.len, privreq->req.xfrd);
+  uinfo("EP%d: len=%d xfrd=%d\n",
+        privep->epphy, privreq->req.len, privreq->req.xfrd);
   usbtrace(TRACE_READ(privep->epphy), bcnt);
 
   /* Get the number of bytes to transfer from the RxFIFO */
@@ -1696,7 +1701,7 @@ static void stm32_epout_request(FAR struct stm32_usbdev_s *priv,
               return;
             }
 
-          ullvdbg("EP%d: len=%d\n", privep->epphy, privreq->req.len);
+          uinfo("EP%d: len=%d\n", privep->epphy, privreq->req.len);
 
           /* Ignore any attempt to receive a zero length packet (this really
            * should not happen.
@@ -2490,8 +2495,8 @@ static inline void stm32_ep0out_setup(struct stm32_usbdev_s *priv)
   ctrlreq.index = GETUINT16(priv->ctrlreq.index);
   ctrlreq.len   = GETUINT16(priv->ctrlreq.len);
 
-  ullvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
-          ctrlreq.type, ctrlreq.req, ctrlreq.value, ctrlreq.index, ctrlreq.len);
+  uinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+        ctrlreq.type, ctrlreq.req, ctrlreq.value, ctrlreq.index, ctrlreq.len);
 
   /* Check for a standard request */
 
@@ -2625,7 +2630,7 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv)
           if ((daint & 1) != 0)
             {
               regval = stm32_getreg(STM32_OTGHS_DOEPINT(epno));
-              ulldbg("DOEPINT(%d) = %08x\n", epno, regval);
+              uinfo("DOEPINT(%d) = %08x\n", epno, regval);
               stm32_putreg(0xFF, STM32_OTGHS_DOEPINT(epno));
             }
 
@@ -2855,8 +2860,8 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv)
         {
           if ((daint & 1) != 0)
             {
-              ulldbg("DIEPINT(%d) = %08x\n",
-                     epno, stm32_getreg(STM32_OTGHS_DIEPINT(epno)));
+              uinfo("DIEPINT(%d) = %08x\n",
+                    epno, stm32_getreg(STM32_OTGHS_DIEPINT(epno)));
               stm32_putreg(0xFF, STM32_OTGHS_DIEPINT(epno));
             }
 
@@ -3493,7 +3498,7 @@ static inline void stm32_otginterrupt(FAR struct stm32_usbdev_s *priv)
  *
  ****************************************************************************/
 
-static int stm32_usbinterrupt(int irq, FAR void *context)
+static int stm32_usbinterrupt(int irq, FAR void *context, FAR void *arg)
 {
   /* At present, there is only a single OTG HS device support. Hence it is
    * pre-allocated as g_otghsdev.  However, in most code, the private data
@@ -3801,7 +3806,7 @@ static int stm32_epout_configure(FAR struct stm32_ep_s *privep, uint8_t eptype,
             break;
 
           default:
-            udbg("Unsupported maxpacket: %d\n", maxpacket);
+            uerr("ERROR: Unsupported maxpacket: %d\n", maxpacket);
             return -EINVAL;
         }
     }
@@ -3896,7 +3901,7 @@ static int stm32_epin_configure(FAR struct stm32_ep_s *privep, uint8_t eptype,
             break;
 
           default:
-            udbg("Unsupported maxpacket: %d\n", maxpacket);
+            uerr("ERROR: Unsupported maxpacket: %d\n", maxpacket);
             return -EINVAL;
         }
     }
@@ -4185,7 +4190,7 @@ static int stm32_ep_disable(FAR struct usbdev_ep_s *ep)
 {
   FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -4225,7 +4230,7 @@ static FAR struct usbdev_req_s *stm32_ep_allocreq(FAR struct usbdev_ep_s *ep)
 {
   FAR struct stm32_req_s *privreq;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -4258,7 +4263,7 @@ static void stm32_ep_freereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
 {
   FAR struct stm32_req_s *privreq = (FAR struct stm32_req_s *)req;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -4330,11 +4335,11 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
 
   /* Some sanity checking */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!req || !req->callback || !req->buf || !ep)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
-      ullvdbg("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+      uinfo("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
       return -EINVAL;
     }
 #endif
@@ -4342,7 +4347,7 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
   usbtrace(TRACE_EPSUBMIT, privep->epphy);
   priv = privep->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv->driver)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_NOTCONFIGURED), priv->usbdev.speed);
@@ -4419,7 +4424,7 @@ static int stm32_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
   FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep;
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -4877,7 +4882,7 @@ static int stm32_selfpowered(struct usbdev_s *dev, bool selfpowered)
 
   usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -5433,10 +5438,10 @@ void up_usbinitialize(void)
 
   /* Attach the OTG HS interrupt handler */
 
-  ret = irq_attach(STM32_IRQ_OTGHS, stm32_usbinterrupt);
+  ret = irq_attach(STM32_IRQ_OTGHS, stm32_usbinterrupt, NULL);
   if (ret < 0)
     {
-      udbg("irq_attach failed\n", ret);
+      uerr("ERROR: irq_attach failed\n", ret);
       goto errout;
     }
 
@@ -5549,7 +5554,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
 
   usbtrace(TRACE_DEVREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !driver->ops->bind || !driver->ops->unbind ||
       !driver->ops->disconnect || !driver->ops->setup)
     {
@@ -5620,7 +5625,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
 
   usbtrace(TRACE_DEVUNREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (driver != priv->driver)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/stm32/stm32_otghshost.c b/arch/arm/src/stm32/stm32_otghshost.c
index 4c6252a0291e9d5b05404c052bbaca26b15e2862..2b5411cf0457d40753877d8f78828c362b10e130 100644
--- a/arch/arm/src/stm32/stm32_otghshost.c
+++ b/arch/arm/src/stm32/stm32_otghshost.c
@@ -52,6 +52,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -93,9 +94,9 @@
  *  CONFIG_STM32_OTGHS_SOFINTR - Enable SOF interrupts.  Why would you ever
  *    want to do that?
  *  CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
- *    debug.  Depends on CONFIG_DEBUG.
+ *    debug.  Depends on CONFIG_DEBUG_FEATURES.
  *  CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
- *    packets. Depends on CONFIG_DEBUG.
+ *    packets. Depends on CONFIG_DEBUG_FEATURES.
  */
 
 /* Pre-requisites (partial) */
@@ -128,9 +129,9 @@
 #  define CONFIG_STM32_OTGHS_DESCSIZE 128
 #endif
 
-/* Register/packet debug depends on CONFIG_DEBUG */
+/* Register/packet debug depends on CONFIG_DEBUG_FEATURES */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_USB_INFO
 #  undef CONFIG_STM32_USBHOST_REGDEBUG
 #  undef CONFIG_STM32_USBHOST_PKTDUMP
 #endif
@@ -138,11 +139,16 @@
 /* HCD Setup *******************************************************************/
 /* Hardware capabilities */
 
-#define STM32_NHOST_CHANNELS      12  /* Number of host channels */
+#if defined(CONFIG_STM32_STM32F446)
+#  define STM32_NHOST_CHANNELS    16  /* Number of host channels */
+#  define STM32_MAX_TX_FIFOS      16  /* Max number of TX FIFOs */
+#else
+#  define STM32_NHOST_CHANNELS    12  /* Number of host channels */
+#  define STM32_MAX_TX_FIFOS      12  /* Max number of TX FIFOs */
+#endif
 #define STM32_MAX_PACKET_SIZE     64  /* Full speed max packet size */
 #define STM32_EP0_DEF_PACKET_SIZE 8   /* EP0 default packet size */
 #define STM32_EP0_MAX_PACKET_SIZE 64  /* EP0 HS max packet size */
-#define STM32_MAX_TX_FIFOS        12  /* Max number of TX FIFOs */
 #define STM32_MAX_PKTCOUNT        256 /* Max packet count */
 #define STM32_RETRY_COUNT         3   /* Number of ctrl transfer retries */
 
@@ -403,7 +409,7 @@ static inline void stm32_gint_ipxfrisr(FAR struct stm32_usbhost_s *priv);
 
 /* First level, global interrupt handler */
 
-static int stm32_gint_isr(int irq, FAR void *context);
+static int stm32_gint_isr(int irq, FAR void *context, FAR void *arg);
 
 /* Interrupt controls */
 
@@ -506,7 +512,7 @@ static struct usbhost_connection_s g_usbconn =
 #ifdef CONFIG_STM32_USBHOST_REGDEBUG
 static void stm32_printreg(uint32_t addr, uint32_t val, bool iswrite)
 {
-  lldbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
+  uinfo("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
 }
 #endif
 
@@ -556,7 +562,7 @@ static void stm32_checkreg(uint32_t addr, uint32_t val, bool iswrite)
             {
               /* No.. More than one. */
 
-              lldbg("[repeats %d more times]\n", count);
+              uinfo("[repeats %d more times]\n", count);
             }
         }
 
@@ -1284,7 +1290,7 @@ static int stm32_ctrlep_alloc(FAR struct stm32_usbhost_s *priv,
   ctrlep = (FAR struct stm32_ctrlinfo_s *)kmm_malloc(sizeof(struct stm32_ctrlinfo_s));
   if (ctrlep == NULL)
     {
-      udbg("ERROR: Failed to allocate control endpoint container\n");
+      uerr("ERROR: Failed to allocate control endpoint container\n");
       return -ENOMEM;
     }
 
@@ -1294,7 +1300,7 @@ static int stm32_ctrlep_alloc(FAR struct stm32_usbhost_s *priv,
                              hport->funcaddr, hport->speed, ctrlep);
   if (ret < 0)
     {
-      udbg("ERROR: stm32_ctrlchan_alloc failed: %d\n", ret);
+      uerr("ERROR: stm32_ctrlchan_alloc failed: %d\n", ret);
       kmm_free(ctrlep);
       return ret;
     }
@@ -1346,7 +1352,7 @@ static int stm32_xfrep_alloc(FAR struct stm32_usbhost_s *priv,
   chidx = stm32_chan_alloc(priv);
   if (chidx < 0)
     {
-      udbg("ERROR: Failed to allocate a host channel\n");
+      uerr("ERROR: Failed to allocate a host channel\n");
       return -ENOMEM;
     }
 
@@ -1826,20 +1832,20 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
                                  FAR uint8_t *buffer, size_t buflen)
 {
   FAR struct stm32_chan_s *chan;
-  systime_t start;
-  systime_t elapsed;
+  ssize_t xfrd;
   int ret;
 
   /* Loop until the transfer completes (i.e., buflen is decremented to zero)
-   * or a fatal error occurs (any error other than a simple NAK)
+   * or a fatal error occurs any error other than a simple NAK.  NAK would
+   * simply indicate the end of the transfer (short-transfer).
    */
 
   chan         = &priv->chan[chidx];
   chan->buffer = buffer;
   chan->buflen = buflen;
   chan->xfrd   = 0;
+  xfrd         = 0;
 
-  start = clock_systimer();
   while (chan->xfrd < chan->buflen)
     {
       /* Set up for the wait BEFORE starting the transfer */
@@ -1856,7 +1862,7 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
       ret = stm32_in_setup(priv, chidx);
       if (ret < 0)
         {
-          udbg("ERROR: stm32_in_setup failed: %d\n", ret);
+          uerr("ERROR: stm32_in_setup failed: %d\n", ret);
           return (ssize_t)ret;
         }
 
@@ -1864,36 +1870,48 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
 
       ret = stm32_chan_wait(priv, chan);
 
-      /* EAGAIN indicates that the device NAKed the transfer and we need
-       * do try again.  Anything else (success or other errors) will
-       * cause use to return
+      /* EAGAIN indicates that the device NAKed the transfer.  In the case
+       * of a NAK, we do not retry but rather assume that the transfer is
+       * commplete and return the data that we have received.  Retry could
+       * be handled in class driver.
        */
 
       if (ret < 0)
         {
-          usbhost_trace1(OTGHS_TRACE1_TRNSFRFAILED, ret);
-
-          /* Check for a special case:  If (1) the transfer was NAKed and (2)
-           * no Tx FIFO empty or Rx FIFO not-empty event occurred, then we
-           * should be able to just flush the Rx and Tx FIFOs and try again.
-           * We can detect this latter case because the then the transfer
-           * buffer pointer and buffer size will be unaltered.
+          /* The transfer failed.  If we received a NAK, return all data
+           * buffered so far (if any).
            */
 
-          elapsed = clock_systimer() - start;
-          if (ret != -EAGAIN ||                  /* Not a NAK condition OR */
-              elapsed >= STM32_DATANAK_DELAY ||  /* Timeout has elapsed OR */
-              chan->xfrd > 0)                    /* Data has been partially transferred */
+          if (ret == -EAGAIN)
             {
-              /* Break out and return the error */
+              /* Was data buffered prior to the NAK? */
 
-              udbg("ERROR: stm32_chan_wait failed: %d\n", ret);
-              return (ssize_t)ret;
+              if (xfrd > 0)
+                {
+                  /* Yes, return the amount of data received */
+
+                  return xfrd;
+                }
+              else
+                {
+                  /* No... Break out and return the NAK */
+
+                  return (ssize_t)ret;
+                }
             }
+
+          usbhost_trace1(OTGHS_TRACE1_TRNSFRFAILED, ret);
+
+          /* Break out and return the error */
+
+          uerr("ERROR: stm32_chan_wait failed: %d\n", ret);
+          return (ssize_t)ret;
         }
+
+      xfrd += chan->xfrd;
     }
 
-  return (ssize_t)chan->xfrd;
+  return xfrd;
 }
 
 /****************************************************************************
@@ -1932,13 +1950,13 @@ static void stm32_in_next(FAR struct stm32_usbhost_s *priv,
           return;
         }
 
-      udbg("ERROR: stm32_in_setup failed: %d\n", ret);
+      uerr("ERROR: stm32_in_setup failed: %d\n", ret);
       result = ret;
     }
 
   /* The transfer is complete, with or without an error */
 
-  uvdbg("Transfer complete:  %d\n", result);
+  uinfo("Transfer complete:  %d\n", result);
 
   /* Extract the callback information */
 
@@ -1990,7 +2008,7 @@ static int stm32_in_asynch(FAR struct stm32_usbhost_s *priv, int chidx,
   ret = stm32_chan_asynchsetup(priv, chan, callback, arg);
   if (ret < 0)
     {
-      udbg("ERROR: stm32_chan_asynchsetup failed: %d\n", ret);
+      uerr("ERROR: stm32_chan_asynchsetup failed: %d\n", ret);
       return ret;
     }
 
@@ -1999,7 +2017,7 @@ static int stm32_in_asynch(FAR struct stm32_usbhost_s *priv, int chidx,
   ret = stm32_in_setup(priv, chidx);
   if (ret < 0)
     {
-      udbg("ERROR: stm32_in_setup failed: %d\n", ret);
+      uerr("ERROR: stm32_in_setup failed: %d\n", ret);
     }
 
   /* And return with the transfer pending */
@@ -2125,7 +2143,7 @@ static ssize_t stm32_out_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
       ret = stm32_out_setup(priv, chidx);
       if (ret < 0)
         {
-          udbg("ERROR: stm32_out_setup failed: %d\n", ret);
+          uerr("ERROR: stm32_out_setup failed: %d\n", ret);
           return (ssize_t)ret;
         }
 
@@ -2153,7 +2171,7 @@ static ssize_t stm32_out_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
             {
               /* Break out and return the error */
 
-              udbg("ERROR: stm32_chan_wait failed: %d\n", ret);
+              uerr("ERROR: stm32_chan_wait failed: %d\n", ret);
               return (ssize_t)ret;
             }
 
@@ -2218,13 +2236,13 @@ static void stm32_out_next(FAR struct stm32_usbhost_s *priv,
           return;
         }
 
-      udbg("ERROR: stm32_out_setup failed: %d\n", ret);
+      uerr("ERROR: stm32_out_setup failed: %d\n", ret);
       result = ret;
     }
 
   /* The transfer is complete, with or without an error */
 
-  uvdbg("Transfer complete:  %d\n", result);
+  uinfo("Transfer complete:  %d\n", result);
 
   /* Extract the callback information */
 
@@ -2276,7 +2294,7 @@ static int stm32_out_asynch(FAR struct stm32_usbhost_s *priv, int chidx,
   ret = stm32_chan_asynchsetup(priv, chan, callback, arg);
   if (ret < 0)
     {
-      udbg("ERROR: stm32_chan_asynchsetup failed: %d\n", ret);
+      uerr("ERROR: stm32_chan_asynchsetup failed: %d\n", ret);
       return ret;
     }
 
@@ -2285,7 +2303,7 @@ static int stm32_out_asynch(FAR struct stm32_usbhost_s *priv, int chidx,
   ret = stm32_out_setup(priv, chidx);
   if (ret < 0)
     {
-      udbg("ERROR: stm32_out_setup failed: %d\n", ret);
+      uerr("ERROR: stm32_out_setup failed: %d\n", ret);
     }
 
   /* And return with the transfer pending */
@@ -2370,7 +2388,7 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv,
   /* AND the two to get the set of enabled, pending HC interrupts */
 
   pending &= regval;
-  ullvdbg("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
+  uinfo("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
 
   /* Check for a pending ACK response received/transmitted (ACK) interrupt */
 
@@ -2556,7 +2574,8 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv,
 #if 1
       /* Halt the interrupt channel */
 
-      if (chan->eptype == OTGHS_EPTYPE_INTR)
+      if (chan->eptype == OTGHS_EPTYPE_INTR ||
+          chan->eptype == OTGHS_EPTYPE_BULK)
         {
           /* Halt the channel -- the CHH interrupt is expected next */
 
@@ -2567,11 +2586,13 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv,
        * REVISIT: This can cause a lot of interrupts!
        */
 
-      else if (chan->eptype == OTGHS_EPTYPE_CTRL ||
-               chan->eptype == OTGHS_EPTYPE_BULK)
+      else if (chan->eptype == OTGHS_EPTYPE_CTRL /*||
+               chan->eptype == OTGHS_EPTYPE_BULK*/)
         {
           /* Re-activate the channel by clearing CHDIS and assuring that
            * CHENA is set
+           *
+           * TODO: set channel reason to NACK?
            */
 
           regval  = stm32_getreg(STM32_OTGHS_HCCHAR(chidx));
@@ -2579,6 +2600,7 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv,
           regval &= ~OTGHS_HCCHAR_CHDIS;
           stm32_putreg(STM32_OTGHS_HCCHAR(chidx), regval);
         }
+
 #else
       /* Halt all transfers on the NAK -- the CHH interrupt is expected next */
 
@@ -2631,7 +2653,7 @@ static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv,
   /* AND the two to get the set of enabled, pending HC interrupts */
 
   pending &= regval;
-  ullvdbg("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
+  uinfo("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
 
   /* Check for a pending ACK response received/transmitted (ACK) interrupt */
 
@@ -2888,6 +2910,7 @@ static void stm32_gint_disconnected(FAR struct stm32_usbhost_s *priv)
       stm32_chan_freeall(priv);
 
       priv->rhport.hport.speed = USB_SPEED_FULL;
+      priv->rhport.hport.funcaddr = 0;
 
       /* Notify any waiters that there is a change in the connection state */
 
@@ -2949,7 +2972,7 @@ static inline void stm32_gint_rxflvlisr(FAR struct stm32_usbhost_s *priv)
   /* Read and pop the next status from the Rx FIFO */
 
   grxsts = stm32_getreg(STM32_OTGHS_GRXSTSP);
-  ullvdbg("GRXSTS: %08x\n", grxsts);
+  uinfo("GRXSTS: %08x\n", grxsts);
 
   /* Isolate the channel number/index in the status word */
 
@@ -3102,8 +3125,8 @@ static inline void stm32_gint_nptxfeisr(FAR struct stm32_usbhost_s *priv)
 
   /* Write the next group of packets into the Tx FIFO */
 
-  ullvdbg("HNPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %dwrsize: %d\n",
-           regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
+  uinfo("HNPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %dwrsize: %d\n",
+         regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
 
   stm32_gint_wrpacket(priv, chan->buffer, chidx, wrsize);
 }
@@ -3190,8 +3213,8 @@ static inline void stm32_gint_ptxfeisr(FAR struct stm32_usbhost_s *priv)
 
   /* Write the next group of packets into the Tx FIFO */
 
-  ullvdbg("HPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
-           regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
+  uinfo("HPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
+         regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
 
   stm32_gint_wrpacket(priv, chan->buffer, chidx, wrsize);
 }
@@ -3429,7 +3452,7 @@ static inline void stm32_gint_ipxfrisr(FAR struct stm32_usbhost_s *priv)
  *
  ****************************************************************************/
 
-static int stm32_gint_isr(int irq, FAR void *context)
+static int stm32_gint_isr(int irq, FAR void *context, FAR void *arg)
 {
   /* At present, there is only support for a single OTG HS host. Hence it is
    * pre-allocated as g_usbhost.  However, in most code, the private data
@@ -3760,7 +3783,7 @@ static int stm32_wait(FAR struct usbhost_connection_s *conn,
           *hport = connport;
           leave_critical_section(flags);
 
-          uvdbg("RHport Connected: %s\n", connport->connected ? "YES" : "NO");
+          uinfo("RHport Connected: %s\n", connport->connected ? "YES" : "NO");
           return OK;
         }
 
@@ -3777,7 +3800,7 @@ static int stm32_wait(FAR struct usbhost_connection_s *conn,
           *hport = connport;
           leave_critical_section(flags);
 
-          uvdbg("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
+          uinfo("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
           return OK;
         }
 #endif
@@ -3865,7 +3888,7 @@ static int stm32_rh_enumerate(FAR struct stm32_usbhost_s *priv,
   ret = stm32_ctrlchan_alloc(priv, 0, 0, priv->rhport.hport.speed, &priv->ep0);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to allocate a control endpoint: %d\n", ret);
+      uerr("ERROR: Failed to allocate a control endpoint: %d\n", ret);
     }
 
   return ret;
@@ -3897,7 +3920,7 @@ static int stm32_enumerate(FAR struct usbhost_connection_s *conn,
 
   /* Then let the common usbhost_enumerate do the real enumeration. */
 
-  uvdbg("Enumerate the device\n");
+  uinfo("Enumerate the device\n");
   priv->smstate = SMSTATE_ENUM;
   ret = usbhost_enumerate(hport, &hport->devclass);
 
@@ -3911,7 +3934,7 @@ static int stm32_enumerate(FAR struct usbhost_connection_s *conn,
     {
       /* Return to the disconnected state */
 
-      udbg("ERROR: Enumeration failed: %d\n", ret);
+      uerr("ERROR: Enumeration failed: %d\n", ret);
       stm32_gint_disconnected(priv);
     }
 
@@ -4312,7 +4335,7 @@ static int stm32_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
 
   DEBUGASSERT(priv != NULL && ep0info != NULL && req != NULL);
   usbhost_vtrace2(OTGHS_VTRACE2_CTRLIN, req->type, req->req);
-  uvdbg("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
+  uinfo("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
         req->type, req->req, req->value[1], req->value[0],
         req->index[1], req->index[0], req->len[1], req->len[0]);
 
@@ -4397,7 +4420,7 @@ static int stm32_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
 
   DEBUGASSERT(priv != NULL && ep0info != NULL && req != NULL);
   usbhost_vtrace2(OTGHS_VTRACE2_CTRLOUT, req->type, req->req);
-  uvdbg("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
+  uinfo("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
         req->type, req->req, req->value[1], req->value[0],
         req->index[1], req->index[0], req->len[1], req->len[0]);
 
@@ -4515,7 +4538,7 @@ static ssize_t stm32_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep
   unsigned int chidx = (unsigned int)ep;
   ssize_t nbytes;
 
-  uvdbg("chidx: %d buflen: %d\n",  (unsigned int)ep, buflen);
+  uinfo("chidx: %d buflen: %d\n",  (unsigned int)ep, buflen);
 
   DEBUGASSERT(priv && buffer && chidx < STM32_MAX_TX_FIFOS && buflen > 0);
 
@@ -4582,7 +4605,7 @@ static int stm32_asynch(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep,
   unsigned int chidx = (unsigned int)ep;
   int ret;
 
-  uvdbg("chidx: %d buflen: %d\n",  (unsigned int)ep, buflen);
+  uinfo("chidx: %d buflen: %d\n",  (unsigned int)ep, buflen);
 
   DEBUGASSERT(priv && buffer && chidx < STM32_MAX_TX_FIFOS && buflen > 0);
 
@@ -4632,7 +4655,7 @@ static int stm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
   unsigned int chidx = (unsigned int)ep;
   irqstate_t flags;
 
-  uvdbg("chidx: %u: %d\n",  chidx);
+  uinfo("chidx: %u: %d\n",  chidx);
 
   DEBUGASSERT(priv && chidx < STM32_MAX_TX_FIFOS);
   chan = &priv->chan[chidx];
@@ -4727,7 +4750,7 @@ static int stm32_connect(FAR struct usbhost_driver_s *drvr,
   /* Set the connected/disconnected flag */
 
   hport->connected = connected;
-  ullvdbg("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
+  uinfo("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
 
   /* Report the connection event */
 
@@ -5090,6 +5113,12 @@ static inline void stm32_sw_initialize(FAR struct stm32_usbhost_s *priv)
   sem_init(&priv->pscsem,  0, 0);
   sem_init(&priv->exclsem, 0, 1);
 
+  /* The pscsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+ sem_setprotocol(&priv->pscsem, SEM_PRIO_NONE);
+
   /* Initialize the driver state data */
 
   priv->smstate   = SMSTATE_DETACHED;
@@ -5105,8 +5134,15 @@ static inline void stm32_sw_initialize(FAR struct stm32_usbhost_s *priv)
   for (i = 0; i < STM32_MAX_TX_FIFOS; i++)
     {
       FAR struct stm32_chan_s *chan = &priv->chan[i];
+
       chan->chidx = i;
+
+      /* The waitsem semaphore is used for signaling and, hence, should not
+       * have priority inheritance enabled.
+       */
+
       sem_init(&chan->waitsem,  0, 0);
+      sem_setprotocol(&chan->waitsem, SEM_PRIO_NONE);
     }
 }
 
@@ -5287,7 +5323,7 @@ FAR struct usbhost_connection_s *stm32_otghshost_initialize(int controller)
 
   /* Attach USB host controller interrupt handler */
 
-  if (irq_attach(STM32_IRQ_OTGHS, stm32_gint_isr) != 0)
+  if (irq_attach(STM32_IRQ_OTGHS, stm32_gint_isr, NULL) != 0)
     {
       usbhost_trace1(OTGHS_TRACE1_IRQATTACH, 0);
       return NULL;
diff --git a/arch/arm/src/stm32/stm32_procfs_ccm.c b/arch/arm/src/stm32/stm32_procfs_ccm.c
index 231f37dd9c4c7fe7c9108edf9d3e3cfd364f1089..51d1022146dce79d7246673ec378d5ee82dc5abd 100644
--- a/arch/arm/src/stm32/stm32_procfs_ccm.c
+++ b/arch/arm/src/stm32/stm32_procfs_ccm.c
@@ -142,7 +142,7 @@ static int ccm_open(FAR struct file *filep, FAR const char *relpath,
 {
   FAR struct ccm_file_s *priv;
 
-  fvdbg("Open '%s'\n", relpath);
+  finfo("Open '%s'\n", relpath);
 
   /* PROCFS is read-only.  Any attempt to open with any kind of write
    * access is not permitted.
@@ -152,7 +152,7 @@ static int ccm_open(FAR struct file *filep, FAR const char *relpath,
 
   if ((oflags & O_WRONLY) != 0 || (oflags & O_RDONLY) == 0)
     {
-      fdbg("ERROR: Only O_RDONLY supported\n");
+      ferr("ERROR: Only O_RDONLY supported\n");
       return -EACCES;
     }
 
@@ -160,7 +160,7 @@ static int ccm_open(FAR struct file *filep, FAR const char *relpath,
 
   if (strcmp(relpath, "ccm") != 0)
     {
-      fdbg("ERROR: relpath is '%s'\n", relpath);
+      ferr("ERROR: relpath is '%s'\n", relpath);
       return -ENOENT;
     }
 
@@ -169,7 +169,7 @@ static int ccm_open(FAR struct file *filep, FAR const char *relpath,
   priv = (FAR struct ccm_file_s *)kmm_zalloc(sizeof(struct ccm_file_s));
   if (!priv)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
@@ -214,7 +214,7 @@ static ssize_t ccm_read(FAR struct file *filep, FAR char *buffer,
   struct mallinfo mem;
   off_t offset = filep->f_pos;
 
-  fvdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+  finfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
 
   /* Recover our private data from the struct file instance */
 
@@ -273,7 +273,7 @@ static int ccm_dup(FAR const struct file *oldp, FAR struct file *newp)
   FAR struct ccm_file_s *oldpriv;
   FAR struct ccm_file_s *newpriv;
 
-  fvdbg("Dup %p->%p\n", oldp, newp);
+  finfo("Dup %p->%p\n", oldp, newp);
 
   /* Recover our private data from the old struct file instance */
 
@@ -285,7 +285,7 @@ static int ccm_dup(FAR const struct file *oldp, FAR struct file *newp)
   newpriv = (FAR struct ccm_file_s *)kmm_zalloc(sizeof(struct ccm_file_s));
   if (!newpriv)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
@@ -303,7 +303,7 @@ static int ccm_stat(const char *relpath, struct stat *buf)
 {
   if (strcmp(relpath, "ccm") != 0)
     {
-      fdbg("ERROR: relpath is '%s'\n", relpath);
+      ferr("ERROR: relpath is '%s'\n", relpath);
       return -ENOENT;
     }
 
diff --git a/arch/arm/src/stm32/stm32_pwm.c b/arch/arm/src/stm32/stm32_pwm.c
index 76783804ea407849f80e6b0e3947a63e89033370..85ed3554fc956e29017bc57454536ab1512c5500 100644
--- a/arch/arm/src/stm32/stm32_pwm.c
+++ b/arch/arm/src/stm32/stm32_pwm.c
@@ -48,7 +48,7 @@
 #include 
 
 #include 
-#include 
+#include 
 #include 
 
 #include "up_internal.h"
@@ -114,30 +114,164 @@
 #define TIMTYPE_TIM16      TIMTYPE_COUNTUP16
 #define TIMTYPE_TIM17      TIMTYPE_COUNTUP16
 
+/* Timer clock source, RCC EN offset, enable bit,
+ * RCC RST offset, reset bit to use
+ */
+
+#if defined(CONFIG_STM32_STM32F37XX)
+#  define TIMCLK_TIM2      STM32_APB1_TIM2_CLKIN
+#  define TIMRCCEN_TIM2    STM32_RCC_APB1ENR
+#  define TIMEN_TIM2       RCC_APB1ENR_TIM2EN
+#  define TIMRCCRST_TIM2   STM32_RCC_APB1RSTR
+#  define TIMRST_TIM2      RCC_APB1RSTR_TIM2RST
+#  define TIMCLK_TIM3      STM32_APB1_TIM3_CLKIN
+#  define TIMRCCEN_TIM3    STM32_RCC_APB1ENR
+#  define TIMEN_TIM3       RCC_APB1ENR_TIM3EN
+#  define TIMRCCRST_TIM3   STM32_RCC_APB1RSTR
+#  define TIMRST_TIM3      RCC_APB1RSTR_TIM3RST
+#  define TIMCLK_TIM4      STM32_APB1_TIM4_CLKIN
+#  define TIMRCCEN_TIM4    STM32_RCC_APB1ENR
+#  define TIMEN_TIM4       RCC_APB1ENR_TIM4EN
+#  define TIMRCCRST_TIM4   STM32_RCC_APB1RSTR
+#  define TIMRST_TIM4      RCC_APB1RSTR_TIM4RST
+#  define TIMCLK_TIM5      STM32_APB1_TIM5_CLKIN
+#  define TIMRCCEN_TIM5    STM32_RCC_APB1ENR
+#  define TIMEN_TIM5       RCC_APB1ENR_TIM5EN
+#  define TIMRCCRST_TIM5   STM32_RCC_APB1RSTR
+#  define TIMRST_TIM5      RCC_APB1RSTR_TIM5RST
+#  define TIMCLK_TIM6      STM32_APB1_TIM6_CLKIN
+#  define TIMRCCEN_TIM6    STM32_RCC_APB1ENR
+#  define TIMEN_TIM6       RCC_APB1ENR_TIM6EN
+#  define TIMRCCRST_TIM6   STM32_RCC_APB1RSTR
+#  define TIMRST_TIM6      RCC_APB1RSTR_TIM6RST
+#  define TIMCLK_TIM7      STM32_APB1_TIM7_CLKIN
+#  define TIMRCCEN_TIM7    STM32_RCC_APB1ENR
+#  define TIMEN_TIM7       RCC_APB1ENR_TIM7EN
+#  define TIMRCCRST_TIM7   STM32_RCC_APB1RSTR
+#  define TIMRST_TIM7      RCC_APB1RSTR_TIM7RST
+#  define TIMCLK_TIM12     STM32_APB1_TIM12_CLKIN
+#  define TIMRCCEN_TIM12   STM32_RCC_APB1ENR
+#  define TIMEN_TIM12      RCC_APB1ENR_TIM12EN
+#  define TIMRCCRST_TIM12  STM32_RCC_APB1RSTR
+#  define TIMRST_TIM12     RCC_APB1RSTR_TIM12RST
+#  define TIMCLK_TIM13     STM32_APB1_TIM13_CLKIN
+#  define TIMRCCEN_TIM13   STM32_RCC_APB1ENR
+#  define TIMEN_TIM13      RCC_APB1ENR_TIM13EN
+#  define TIMRCCRST_TIM13  STM32_RCC_APB1RSTR
+#  define TIMRST_TIM13     RCC_APB1RSTR_TIM13RST
+#  define TIMCLK_TIM14     STM32_APB1_TIM14_CLKIN
+#  define TIMRCCEN_TIM14   STM32_RCC_APB1ENR
+#  define TIMEN_TIM14      RCC_APB1ENR_TIM14EN
+#  define TIMRCCRST_TIM14  STM32_RCC_APB1RSTR
+#  define TIMRST_TIM14     RCC_APB1RSTR_TIM14RST
+#  define TIMCLK_TIM15     STM32_APB2_TIM15_CLKIN
+#  define TIMRCCEN_TIM15   STM32_RCC_APB2ENR
+#  define TIMEN_TIM15      RCC_APB2ENR_TIM15EN
+#  define TIMRCCRST_TIM15  STM32_RCC_APB2RSTR
+#  define TIMRST_TIM15     RCC_APB2RSTR_TIM15RST
+#  define TIMCLK_TIM16     STM32_APB2_TIM16_CLKIN
+#  define TIMRCCEN_TIM16   STM32_RCC_APB2ENR
+#  define TIMEN_TIM16      RCC_APB2ENR_TIM16EN
+#  define TIMRCCRST_TIM16  STM32_RCC_APB2RSTR
+#  define TIMRST_TIM16     RCC_APB2RSTR_TIM16RST
+#  define TIMCLK_TIM17     STM32_APB2_TIM17_CLKIN
+#  define TIMRCCEN_TIM17   STM32_RCC_APB2ENR
+#  define TIMEN_TIM17      RCC_APB2ENR_TIM17EN
+#  define TIMRCCRST_TIM17  STM32_RCC_APB2RSTR
+#  define TIMRST_TIM17     RCC_APB2RSTR_TIM17RST
+#  define TIMCLK_TIM18     STM32_APB1_TIM18_CLKIN
+#  define TIMRCCEN_TIM18   STM32_RCC_APB1ENR
+#  define TIMEN_TIM18      RCC_APB1ENR_TIM18EN
+#  define TIMRCCRST_TIM18  STM32_RCC_APB1RSTR
+#  define TIMRST_TIM18     RCC_APB1RSTR_TIM18RST
+#  define TIMCLK_TIM19     STM32_APB2_TIM19_CLKIN
+#  define TIMRCCEN_TIM19   STM32_RCC_APB2ENR
+#  define TIMEN_TIM19      RCC_APB2ENR_TIM19EN
+#  define TIMRCCRST_TIM19  STM32_RCC_APB2RSTR
+#  define TIMRST_TIM19     RCC_APB2RSTR_TIM19RST
+#else
+#  define TIMCLK_TIM1      STM32_APB2_TIM1_CLKIN
+#  define TIMRCCEN_TIM1    STM32_RCC_APB2ENR
+#  define TIMEN_TIM1       RCC_APB2ENR_TIM1EN
+#  define TIMRCCRST_TIM1   STM32_RCC_APB2RSTR
+#  define TIMRST_TIM1      RCC_APB2RSTR_TIM1RST
+#  define TIMCLK_TIM2      STM32_APB1_TIM2_CLKIN
+#  define TIMRCCEN_TIM2    STM32_RCC_APB1ENR
+#  define TIMEN_TIM2       RCC_APB1ENR_TIM2EN
+#  define TIMRCCRST_TIM2   STM32_RCC_APB1RSTR
+#  define TIMRST_TIM2      RCC_APB1RSTR_TIM2RST
+#  define TIMCLK_TIM3      STM32_APB1_TIM3_CLKIN
+#  define TIMRCCEN_TIM3    STM32_RCC_APB1ENR
+#  define TIMEN_TIM3       RCC_APB1ENR_TIM3EN
+#  define TIMRCCRST_TIM3   STM32_RCC_APB1RSTR
+#  define TIMRST_TIM3      RCC_APB1RSTR_TIM3RST
+#  define TIMCLK_TIM4      STM32_APB1_TIM4_CLKIN
+#  define TIMRCCEN_TIM4    STM32_RCC_APB1ENR
+#  define TIMEN_TIM4       RCC_APB1ENR_TIM4EN
+#  define TIMRCCRST_TIM4   STM32_RCC_APB1RSTR
+#  define TIMRST_TIM4      RCC_APB1RSTR_TIM4RST
+#  define TIMCLK_TIM5      STM32_APB1_TIM5_CLKIN
+#  define TIMRCCEN_TIM5    STM32_RCC_APB1ENR
+#  define TIMEN_TIM5       RCC_APB1ENR_TIM5EN
+#  define TIMRCCRST_TIM5   STM32_RCC_APB1RSTR
+#  define TIMRST_TIM5      RCC_APB1RSTR_TIM5RST
+#  define TIMCLK_TIM8      STM32_APB2_TIM8_CLKIN
+#  define TIMRCCEN_TIM8    STM32_RCC_APB2ENR
+#  define TIMEN_TIM8       RCC_APB2ENR_TIM8EN
+#  define TIMRCCRST_TIM8   STM32_RCC_APB2RSTR
+#  define TIMRST_TIM8      RCC_APB2RSTR_TIM8RST
+#  define TIMCLK_TIM9      STM32_APB2_TIM9_CLKIN
+#  define TIMRCCEN_TIM9    STM32_RCC_APB2ENR
+#  define TIMEN_TIM9       RCC_APB2ENR_TIM9EN
+#  define TIMRCCRST_TIM9   STM32_RCC_APB2RSTR
+#  define TIMRST_TIM9      RCC_APB2RSTR_TIM9RST
+#  define TIMCLK_TIM10     STM32_APB2_TIM10_CLKIN
+#  define TIMRCCEN_TIM10   STM32_RCC_APB2ENR
+#  define TIMEN_TIM10      RCC_APB2ENR_TIM10EN
+#  define TIMRCCRST_TIM10  STM32_RCC_APB2RSTR
+#  define TIMRST_TIM10     RCC_APB2RSTR_TIM10RST
+#  define TIMCLK_TIM11     STM32_APB2_TIM11_CLKIN
+#  define TIMRCCEN_TIM11   STM32_RCC_APB2ENR
+#  define TIMEN_TIM11      RCC_APB2ENR_TIM11EN
+#  define TIMRCCRST_TIM11  STM32_RCC_APB2RSTR
+#  define TIMRST_TIM11     RCC_APB2RSTR_TIM11RST
+#  define TIMCLK_TIM12     STM32_APB1_TIM12_CLKIN
+#  define TIMRCCEN_TIM12   STM32_RCC_APB1ENR
+#  define TIMEN_TIM12      RCC_APB1ENR_TIM12EN
+#  define TIMRCCRST_TIM12  STM32_RCC_APB1RSTR
+#  define TIMRST_TIM12     RCC_APB1RSTR_TIM12RST
+#  define TIMCLK_TIM13     STM32_APB1_TIM13_CLKIN
+#  define TIMRCCEN_TIM13   STM32_RCC_APB1ENR
+#  define TIMEN_TIM13      RCC_APB1ENR_TIM13EN
+#  define TIMRCCRST_TIM13  STM32_RCC_APB1RSTR
+#  define TIMRST_TIM13     RCC_APB1RSTR_TIM13RST
+#  define TIMCLK_TIM14     STM32_APB1_TIM14_CLKIN
+#  define TIMRCCEN_TIM14   STM32_RCC_APB1ENR
+#  define TIMEN_TIM14      RCC_APB1ENR_TIM14EN
+#  define TIMRCCRST_TIM14  STM32_RCC_APB1RSTR
+#  define TIMRST_TIM14     RCC_APB1RSTR_TIM14RST
+#  define TIMCLK_TIM15     STM32_APB1_TIM15_CLKIN
+#  define TIMRCCEN_TIM15   STM32_RCC_APB1ENR
+#  define TIMEN_TIM15      RCC_APB1ENR_TIM15EN
+#  define TIMRCCRST_TIM15  STM32_RCC_APB1RSTR
+#  define TIMRST_TIM15     RCC_APB1RSTR_TIM15RST
+#  define TIMCLK_TIM16     STM32_APB1_TIM16_CLKIN
+#  define TIMRCCEN_TIM16   STM32_RCC_APB1ENR
+#  define TIMEN_TIM16      RCC_APB1ENR_TIM16EN
+#  define TIMRCCRST_TIM16  STM32_RCC_APB1RSTR
+#  define TIMRST_TIM16     RCC_APB1RSTR_TIM16RST
+#  define TIMCLK_TIM17     STM32_APB1_TIM17_CLKIN
+#  define TIMRCCEN_TIM17   STM32_RCC_APB1ENR
+#  define TIMEN_TIM17      RCC_APB1ENR_TIM71EN
+#  define TIMRCCRST_TIM17  STM32_RCC_APB1RSTR
+#  define TIMRST_TIM17     RCC_APB1RSTR_TIM17RST
+#endif
+
 /* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing PWM */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_PWM
-#endif
-
-#ifdef CONFIG_DEBUG_PWM
-#  define pwmdbg              dbg
-#  define pwmlldbg            lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define pwmvdbg           vdbg
-#    define pwmllvdbg         llvdbg
-#    define pwm_dumpgpio(p,m) stm32_dumpgpio(p,m)
-#  else
-#    define pwmlldbg(x...)
-#    define pwmllvdbg(x...)
-#    define pwm_dumpgpio(p,m)
-#  endif
+
+#ifdef CONFIG_DEBUG_PWM_INFO
+#  define pwm_dumpgpio(p,m) stm32_dumpgpio(p,m)
 #else
-#  define pwmdbg(x...)
-#  define pwmlldbg(x...)
-#  define pwmvdbg(x...)
-#  define pwmllvdbg(x...)
 #  define pwm_dumpgpio(p,m)
 #endif
 
@@ -166,8 +300,8 @@ enum stm32_chanmode_e
 
 struct stm32_pwmchan_s
 {
-  uint8_t               channel; /* Timer output channel: {1,..4} */
-  uint32_t              pincfg;  /* Output pin configuration */
+  uint8_t channel;                     /* Timer output channel: {1,..4} */
+  uint32_t pincfg;                     /* Output pin configuration */
   enum stm32_chanmode_e mode;
 };
 
@@ -176,21 +310,23 @@ struct stm32_pwmchan_s
 struct stm32_pwmtimer_s
 {
   FAR const struct pwm_ops_s *ops;     /* PWM operations */
-  uint8_t                     timid;   /* Timer ID {1,...,17} */
-  struct stm32_pwmchan_s      channels[PWM_NCHANNELS];
-  uint8_t                     timtype; /* See the TIMTYPE_* definitions */
-  enum stm32_timmode_e        mode;
+  uint8_t timid;                       /* Timer ID {1,...,17} */
+  struct stm32_pwmchan_s channels[PWM_NCHANNELS];
+  uint8_t timtype;                     /* See the TIMTYPE_* definitions */
+  enum stm32_timmode_e mode;
 #ifdef CONFIG_PWM_PULSECOUNT
-  uint8_t                     irq;     /* Timer update IRQ */
-  uint8_t                     prev;    /* The previous value of the RCR (pre-loaded) */
-  uint8_t                     curr;    /* The current value of the RCR (pre-loaded) */
-  uint32_t                    count;   /* Remaining pluse count */
+  uint8_t irq;                         /* Timer update IRQ */
+  uint8_t prev;                        /* The previous value of the RCR (pre-loaded) */
+  uint8_t curr;                        /* The current value of the RCR (pre-loaded) */
+  uint32_t count;                      /* Remaining pluse count */
+#else
+  uint32_t frequency;                  /* Current frequency setting */
 #endif
-  uint32_t                    base;    /* The base address of the timer */
-  uint32_t                    pclk;    /* The frequency of the peripheral clock
+  uint32_t base;                       /* The base address of the timer */
+  uint32_t pclk;                       /* The frequency of the peripheral clock
                                         * that drives the timer module. */
 #ifdef CONFIG_PWM_PULSECOUNT
-  FAR void                   *handle;  /* Handle used for upper-half callback */
+  FAR void *handle;                    /* Handle used for upper-half callback */
 #endif
 };
 
@@ -202,7 +338,7 @@ struct stm32_pwmtimer_s
 static uint16_t pwm_getreg(struct stm32_pwmtimer_s *priv, int offset);
 static void pwm_putreg(struct stm32_pwmtimer_s *priv, int offset, uint16_t value);
 
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_PWM_INFO
 static void pwm_dumpregs(struct stm32_pwmtimer_s *priv, FAR const char *msg);
 #else
 #  define pwm_dumpregs(priv,msg)
@@ -216,10 +352,10 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
 #if defined(CONFIG_PWM_PULSECOUNT) && (defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM))
 static int pwm_interrupt(struct stm32_pwmtimer_s *priv);
 #if defined(CONFIG_STM32_TIM1_PWM)
-static int pwm_tim1interrupt(int irq, void *context);
+static int pwm_tim1interrupt(int irq, void *context, FAR void *arg);
 #endif
 #if defined(CONFIG_STM32_TIM8_PWM)
-static int pwm_tim8interrupt(int irq, void *context);
+static int pwm_tim8interrupt(int irq, void *context, FAR void *arg);
 #endif
 static uint8_t pwm_pulsecount(uint32_t count);
 #endif
@@ -298,7 +434,7 @@ static struct stm32_pwmtimer_s g_pwm1dev =
   .irq         = STM32_IRQ_TIM1UP,
 #endif
   .base        = STM32_TIM1_BASE,
-  .pclk        = STM32_APB2_TIM1_CLKIN,
+  .pclk        = TIMCLK_TIM1,
 };
 #endif
 
@@ -344,7 +480,7 @@ static struct stm32_pwmtimer_s g_pwm2dev =
   .irq         = STM32_IRQ_TIM2,
 #endif
   .base        = STM32_TIM2_BASE,
-  .pclk        = STM32_APB1_TIM2_CLKIN,
+  .pclk        = TIMCLK_TIM2,
 };
 #endif
 
@@ -390,7 +526,7 @@ static struct stm32_pwmtimer_s g_pwm3dev =
   .irq         = STM32_IRQ_TIM3,
 #endif
   .base        = STM32_TIM3_BASE,
-  .pclk        = STM32_APB1_TIM3_CLKIN,
+  .pclk        = TIMCLK_TIM3,
 };
 #endif
 
@@ -436,7 +572,7 @@ static struct stm32_pwmtimer_s g_pwm4dev =
   .irq         = STM32_IRQ_TIM4,
 #endif
   .base        = STM32_TIM4_BASE,
-  .pclk        = STM32_APB1_TIM4_CLKIN,
+  .pclk        = TIMCLK_TIM4,
 };
 #endif
 
@@ -482,7 +618,7 @@ static struct stm32_pwmtimer_s g_pwm5dev =
   .irq         = STM32_IRQ_TIM5,
 #endif
   .base        = STM32_TIM5_BASE,
-  .pclk        = STM32_APB1_TIM5_CLKIN,
+  .pclk        = TIMCLK_TIM5,
 };
 #endif
 
@@ -528,7 +664,7 @@ static struct stm32_pwmtimer_s g_pwm8dev =
   .irq         = STM32_IRQ_TIM8UP,
 #endif
   .base        = STM32_TIM8_BASE,
-  .pclk        = STM32_APB2_TIM8_CLKIN,
+  .pclk        = TIMCLK_TIM8,
 };
 #endif
 
@@ -574,7 +710,7 @@ static struct stm32_pwmtimer_s g_pwm9dev =
   .irq         = STM32_IRQ_TIM9,
 #endif
   .base        = STM32_TIM9_BASE,
-  .pclk        = STM32_APB2_TIM9_CLKIN,
+  .pclk        = TIMCLK_TIM9,
 };
 #endif
 
@@ -620,7 +756,7 @@ static struct stm32_pwmtimer_s g_pwm10dev =
   .irq         = STM32_IRQ_TIM10,
 #endif
   .base        = STM32_TIM10_BASE,
-  .pclk        = STM32_APB2_TIM10_CLKIN,
+  .pclk        = TIMCLK_TIM10,
 };
 #endif
 
@@ -666,7 +802,7 @@ static struct stm32_pwmtimer_s g_pwm11dev =
   .irq         = STM32_IRQ_TIM11,
 #endif
   .base        = STM32_TIM11_BASE,
-  .pclk        = STM32_APB2_TIM11_CLKIN,
+  .pclk        = TIMCLK_TIM11,
 };
 #endif
 
@@ -712,7 +848,7 @@ static struct stm32_pwmtimer_s g_pwm12dev =
   .irq         = STM32_IRQ_TIM12,
 #endif
   .base        = STM32_TIM12_BASE,
-  .pclk        = STM32_APB1_TIM12_CLKIN,
+  .pclk        = TIMCLK_TIM12,
 };
 #endif
 
@@ -758,7 +894,7 @@ static struct stm32_pwmtimer_s g_pwm13dev =
   .irq         = STM32_IRQ_TIM13,
 #endif
   .base        = STM32_TIM13_BASE,
-  .pclk       = STM32_APB1_TIM13_CLKIN,
+  .pclk        = TIMCLK_TIM13,
 };
 #endif
 
@@ -804,7 +940,7 @@ static struct stm32_pwmtimer_s g_pwm14dev =
   .irq         = STM32_IRQ_TIM14,
 #endif
   .base        = STM32_TIM14_BASE,
-  .pclk        = STM32_APB1_TIM14_CLKIN,
+  .pclk        = TIMCLK_TIM14,
 };
 #endif
 
@@ -836,7 +972,7 @@ static struct stm32_pwmtimer_s g_pwm15dev =
   .irq         = STM32_IRQ_TIM15,
 #endif
   .base        = STM32_TIM15_BASE,
-  .pclk        = STM32_APB1_TIM15_CLKIN,
+  .pclk        = TIMCLK_TIM15,
 };
 #endif
 
@@ -861,7 +997,7 @@ static struct stm32_pwmtimer_s g_pwm16dev =
   .irq         = STM32_IRQ_TIM16,
 #endif
   .base        = STM32_TIM16_BASE,
-  .pclk        = STM32_APB1_TIM16_CLKIN,
+  .pclk        = TIMCLK_TIM16,
 };
 #endif
 
@@ -886,7 +1022,7 @@ static struct stm32_pwmtimer_s g_pwm17dev =
   .irq         = STM32_IRQ_TIM17,
 #endif
   .base        = STM32_TIM17_BASE,
-  .pclk        = STM32_APB1_TIM17_CLKIN,
+  .pclk        = TIMCLK_TIM17,
 };
 #endif
 
@@ -967,46 +1103,76 @@ static void pwm_putreg(struct stm32_pwmtimer_s *priv, int offset, uint16_t value
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_PWM_INFO
 static void pwm_dumpregs(struct stm32_pwmtimer_s *priv, FAR const char *msg)
 {
-  pwmvdbg("%s:\n", msg);
-  pwmvdbg("  CR1: %04x CR2:  %04x SMCR:  %04x DIER:  %04x\n",
-          pwm_getreg(priv, STM32_GTIM_CR1_OFFSET),
-          pwm_getreg(priv, STM32_GTIM_CR2_OFFSET),
-          pwm_getreg(priv, STM32_GTIM_SMCR_OFFSET),
-          pwm_getreg(priv, STM32_GTIM_DIER_OFFSET));
-  pwmvdbg("   SR: %04x EGR:  %04x CCMR1: %04x CCMR2: %04x\n",
-          pwm_getreg(priv, STM32_GTIM_SR_OFFSET),
-          pwm_getreg(priv, STM32_GTIM_EGR_OFFSET),
-          pwm_getreg(priv, STM32_GTIM_CCMR1_OFFSET),
-          pwm_getreg(priv, STM32_GTIM_CCMR2_OFFSET));
-  pwmvdbg(" CCER: %04x CNT:  %04x PSC:   %04x ARR:   %04x\n",
+  pwminfo("%s:\n", msg);
+  if (priv->timid == 16 || priv->timid == 17)
+    {
+      pwminfo("  CR1: %04x CR2:  %04x DIER:  %04x\n",
+              pwm_getreg(priv, STM32_GTIM_CR1_OFFSET),
+              pwm_getreg(priv, STM32_GTIM_CR2_OFFSET),
+              pwm_getreg(priv, STM32_GTIM_DIER_OFFSET));
+    }
+  else
+    {
+      pwminfo("  CR1: %04x CR2:  %04x SMCR:  %04x DIER:  %04x\n",
+              pwm_getreg(priv, STM32_GTIM_CR1_OFFSET),
+              pwm_getreg(priv, STM32_GTIM_CR2_OFFSET),
+              pwm_getreg(priv, STM32_GTIM_SMCR_OFFSET),
+              pwm_getreg(priv, STM32_GTIM_DIER_OFFSET));
+    }
+
+  if (priv->timid >= 15 || priv->timid <= 17)
+    {
+      pwminfo("   SR: %04x EGR:  %04x CCMR1: %04x\n",
+              pwm_getreg(priv, STM32_GTIM_SR_OFFSET),
+              pwm_getreg(priv, STM32_GTIM_EGR_OFFSET),
+              pwm_getreg(priv, STM32_GTIM_CCMR1_OFFSET));
+    }
+   else
+    {
+      pwminfo("   SR: %04x EGR:  %04x CCMR1: %04x CCMR2: %04x\n",
+              pwm_getreg(priv, STM32_GTIM_SR_OFFSET),
+              pwm_getreg(priv, STM32_GTIM_EGR_OFFSET),
+              pwm_getreg(priv, STM32_GTIM_CCMR1_OFFSET),
+              pwm_getreg(priv, STM32_GTIM_CCMR2_OFFSET));
+    }
+
+  /* REVISIT: CNT and ARR may be 32-bits wide */
+
+  pwminfo(" CCER: %04x CNT:  %04x PSC:   %04x ARR:   %04x\n",
           pwm_getreg(priv, STM32_GTIM_CCER_OFFSET),
           pwm_getreg(priv, STM32_GTIM_CNT_OFFSET),
           pwm_getreg(priv, STM32_GTIM_PSC_OFFSET),
           pwm_getreg(priv, STM32_GTIM_ARR_OFFSET));
-  pwmvdbg(" CCR1: %04x CCR2: %04x CCR3:  %04x CCR4:  %04x\n",
-          pwm_getreg(priv, STM32_GTIM_CCR1_OFFSET),
-          pwm_getreg(priv, STM32_GTIM_CCR2_OFFSET),
-          pwm_getreg(priv, STM32_GTIM_CCR3_OFFSET),
-          pwm_getreg(priv, STM32_GTIM_CCR4_OFFSET));
-#if defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM)
-  if (priv->timtype == TIMTYPE_ADVANCED)
+
+  if (priv->timid >= 15 || priv->timid <= 17)
     {
-      pwmvdbg("  RCR: %04x BDTR: %04x DCR:   %04x DMAR:  %04x\n",
+      pwminfo("  RCR: %04x BDTR: %04x\n",
           pwm_getreg(priv, STM32_ATIM_RCR_OFFSET),
-          pwm_getreg(priv, STM32_ATIM_BDTR_OFFSET),
-          pwm_getreg(priv, STM32_ATIM_DCR_OFFSET),
-          pwm_getreg(priv, STM32_ATIM_DMAR_OFFSET));
+          pwm_getreg(priv, STM32_ATIM_BDTR_OFFSET));
+    }
+
+  /* REVISIT: CCR1-CCR4 may be 32-bits wide */
+
+  if (priv->timid == 16 || priv->timid == 17)
+    {
+      pwminfo(" CCR1: %04x\n",
+              pwm_getreg(priv, STM32_GTIM_CCR1_OFFSET));
     }
   else
-#endif
     {
-      pwmvdbg("  DCR: %04x DMAR: %04x\n",
-          pwm_getreg(priv, STM32_GTIM_DCR_OFFSET),
-          pwm_getreg(priv, STM32_GTIM_DMAR_OFFSET));
+      pwminfo(" CCR1: %04x CCR2: %04x CCR3:  %04x CCR4:  %04x\n",
+              pwm_getreg(priv, STM32_GTIM_CCR1_OFFSET),
+              pwm_getreg(priv, STM32_GTIM_CCR2_OFFSET),
+              pwm_getreg(priv, STM32_GTIM_CCR3_OFFSET),
+              pwm_getreg(priv, STM32_GTIM_CCR4_OFFSET));
     }
+
+  pwminfo("  DCR: %04x DMAR: %04x\n",
+      pwm_getreg(priv, STM32_GTIM_DCR_OFFSET),
+      pwm_getreg(priv, STM32_GTIM_DMAR_OFFSET));
 }
 #endif
 
@@ -1066,15 +1232,15 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
   DEBUGASSERT(priv != NULL && info != NULL);
 
 #if defined(CONFIG_PWM_MULTICHAN)
-  pwmvdbg("TIM%d frequency: %d\n",
+  pwminfo("TIM%u frequency: %u\n",
           priv->timid, info->frequency);
 #elif defined(CONFIG_PWM_PULSECOUNT)
-  pwmvdbg("TIM%d channel: %d frequency: %d duty: %08x count: %d\n",
-          priv->timid, priv->channel, info->frequency,
+  pwminfo("TIM%u channel: %u frequency: %u duty: %08x count: %u\n",
+          priv->timid, priv->channels[0].channel, info->frequency,
           info->duty, info->count);
 #else
-  pwmvdbg("TIM%d channel: %d frequency: %d duty: %08x\n",
-          priv->timid, priv->channel, info->frequency, info->duty);
+  pwminfo("TIM%u channel: %u frequency: %u duty: %08x\n",
+          priv->timid, priv->channels[0].channel, info->frequency, info->duty);
 #endif
 
   DEBUGASSERT(info->frequency > 0);
@@ -1144,7 +1310,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
       reload = 65535;
     }
 
-  pwmvdbg("TIM%d PCLK: %d frequency: %d TIMCLK: %d prescaler: %d reload: %d\n",
+  pwminfo("TIM%u PCLK: %u frequency: %u TIMCLK: %u prescaler: %u reload: %u\n",
           priv->timid, priv->pclk, info->frequency, timclk, prescaler, reload);
 
   /* Set up the timer CR1 register:
@@ -1207,7 +1373,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
             break;
 
           default:
-            pwmdbg("No such timer mode: %d\n", (int)priv->mode);
+            pwmerr("ERROR: No such timer mode: %u\n", (unsigned int)priv->mode);
             return -EINVAL;
         }
     }
@@ -1334,7 +1500,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
 
       if (j >= PWM_NCHANNELS)
         {
-          pwmdbg("No such channel: %d\n", channel);
+          pwmerr("ERROR: No such channel: %u\n", channel);
           return -EINVAL;
         }
 #else
@@ -1350,7 +1516,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
 
       ccr = b16toi(duty * reload + b16HALF);
 
-      pwmvdbg("ccr: %d\n", ccr);
+      pwminfo("ccr: %u\n", ccr);
 
       switch (mode)
         {
@@ -1385,7 +1551,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
 #endif
 
           default:
-            pwmdbg("No such mode: %d\n", (int)mode);
+            pwmerr("ERROR: No such mode: %u\n", (unsigned int)mode);
             return -EINVAL;
         }
 
@@ -1492,7 +1658,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
             break;
 
           default:
-            pwmdbg("No such channel: %d\n", channel);
+            pwmerr("ERROR: No such channel: %u\n", channel);
             return -EINVAL;
         }
     }
@@ -1537,8 +1703,10 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
 
   /* Some special setup for advanced timers */
 
-#if defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM)
-  if (priv->timtype == TIMTYPE_ADVANCED)
+#if defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM) || \
+    defined(CONFIG_STM32_TIM15_PWM) || defined(CONFIG_STM32_TIM16_PWM) || \
+    defined(CONFIG_STM32_TIM17_PWM)
+  if (priv->timtype == TIMTYPE_ADVANCED || priv->timtype == TIMTYPE_COUNTUP16)
     {
       uint16_t bdtr;
 
@@ -1547,7 +1715,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
        */
 
 #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32F40XX)
+    defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX)
       ccer &= ~(ATIM_CCER_CC1NE | ATIM_CCER_CC1NP | ATIM_CCER_CC2NE | ATIM_CCER_CC2NP |
                 ATIM_CCER_CC3NE | ATIM_CCER_CC3NP | ATIM_CCER_CC4NP);
 #else
@@ -1570,14 +1738,16 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
       pwm_putreg(priv, STM32_ATIM_BDTR_OFFSET, bdtr);
     }
 #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32F40XX)
+    defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX)
   else
 #endif
 #endif
 #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32F40XX)
+    defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX)
     {
-      ccer &= ~(GTIM_CCER_CC1NP | GTIM_CCER_CC2NP | GTIM_CCER_CC3NP);
+      /* CCxNP must be cleared in any case */
+
+      ccer &= ~(GTIM_CCER_CC1NP | GTIM_CCER_CC2NP | GTIM_CCER_CC3NP | GTIM_CCER_CC4NP);
     }
 #endif
 
@@ -1634,6 +1804,89 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
   return OK;
 }
 
+#ifndef CONFIG_PWM_PULSECOUNT
+/****************************************************************************
+ * Name: pwm_update_duty
+ *
+ * Description:
+ *   Try to change only channel duty.
+ *
+ * Input parameters:
+ *   priv    - A reference to the lower half PWM driver state structure
+ *   channel - Channel to by updated
+ *   duty    - New duty.
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static  int pwm_update_duty(FAR struct stm32_pwmtimer_s *priv, uint8_t channel,
+                            ub16_t duty)
+{
+  /* Register offset */
+
+  int ccr_offset;
+
+  /* Calculated values */
+
+  uint32_t reload;
+  uint32_t ccr;
+
+  DEBUGASSERT(priv != NULL);
+
+  pwminfo("TIM%u channel: %u duty: %08x\n",
+          priv->timid, channel, duty);
+
+#ifndef CONFIG_PWM_MULTICHAN
+  DEBUGASSERT(channel == priv->channels[0].channel);
+  DEBUGASSERT(duty >= 0 && duty < uitoub16(100));
+#endif
+
+  /* Get the reload values */
+
+  reload = pwm_getreg(priv, STM32_GTIM_ARR_OFFSET);
+
+  /* Duty cycle:
+   *
+   * duty cycle = ccr / reload (fractional value)
+   */
+
+  ccr = b16toi(duty * reload + b16HALF);
+
+  pwminfo("ccr: %u\n", ccr);
+
+  switch (channel)
+    {
+      case 1:  /* Register offset for Channel 1 */
+        ccr_offset = STM32_GTIM_CCR1_OFFSET;
+        break;
+
+      case 2:  /* Register offset for Channel 2 */
+        ccr_offset = STM32_GTIM_CCR2_OFFSET;
+        break;
+
+      case 3:  /* Register offset for Channel 3 */
+        ccr_offset = STM32_GTIM_CCR3_OFFSET;
+        break;
+
+      case 4:  /* Register offset for Channel 4 */
+        ccr_offset = STM32_GTIM_CCR4_OFFSET;
+        break;
+
+      default:
+        pwmerr("ERROR: No such channel: %u\n", channel);
+        return -EINVAL;
+    }
+
+  /* Set the duty cycle by writing to the CCR register for this channel */
+
+  pwm_putreg(priv, ccr_offset, (uint16_t)ccr);
+
+  return OK;
+}
+#endif
+
 /****************************************************************************
  * Name: pwm_interrupt
  *
@@ -1710,8 +1963,8 @@ static int pwm_interrupt(struct stm32_pwmtimer_s *priv)
 
   /* Now all of the time critical stuff is done so we can do some debug output */
 
-  pwmllvdbg("Update interrupt SR: %04x prev: %d curr: %d count: %d\n",
-            regval, priv->prev, priv->curr, priv->count);
+  pwminfo("Update interrupt SR: %04x prev: %u curr: %u count: %u\n",
+          regval, priv->prev, priv->curr, priv->count);
 
   return OK;
 }
@@ -1732,14 +1985,14 @@ static int pwm_interrupt(struct stm32_pwmtimer_s *priv)
  ****************************************************************************/
 
 #if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_STM32_TIM1_PWM)
-static int pwm_tim1interrupt(int irq, void *context)
+static int pwm_tim1interrupt(int irq, void *context, FAR void *arg)
 {
   return pwm_interrupt(&g_pwm1dev);
 }
 #endif
 
 #if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_STM32_TIM8_PWM)
-static int pwm_tim8interrupt(int irq, void *context)
+static int pwm_tim8interrupt(int irq, void *context, FAR void *arg)
 {
   return pwm_interrupt(&g_pwm8dev);
 }
@@ -1809,104 +2062,110 @@ static void pwm_set_apb_clock(FAR struct stm32_pwmtimer_s *priv, bool on)
   uint32_t en_bit;
   uint32_t regaddr;
 
+  pwminfo("timer %d clock enable: %d\n", priv->timid, on ? 1 : 0);
+
   /* Determine which timer to configure */
 
   switch (priv->timid)
     {
 #ifdef CONFIG_STM32_TIM1_PWM
       case 1:
-        regaddr  = STM32_RCC_APB2ENR;
-        en_bit   = RCC_APB2ENR_TIM1EN;
+        regaddr  = TIMRCCEN_TIM1;
+        en_bit   = TIMEN_TIM1;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM2_PWM
       case 2:
-        regaddr  = STM32_RCC_APB1ENR;
-        en_bit   = RCC_APB1ENR_TIM2EN;
+        regaddr  = TIMRCCEN_TIM2;
+        en_bit   = TIMEN_TIM2;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM3_PWM
       case 3:
-        regaddr  = STM32_RCC_APB1ENR;
-        en_bit   = RCC_APB1ENR_TIM3EN;
+        regaddr  = TIMRCCEN_TIM3;
+        en_bit   = TIMEN_TIM3;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM4_PWM
       case 4:
-        regaddr  = STM32_RCC_APB1ENR;
-        en_bit   = RCC_APB1ENR_TIM4EN;
+        regaddr  = TIMRCCEN_TIM4;
+        en_bit   = TIMEN_TIM4;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM5_PWM
       case 5:
-        regaddr  = STM32_RCC_APB1ENR;
-        en_bit   = RCC_APB1ENR_TIM5EN;
+        regaddr  = TIMRCCEN_TIM5;
+        en_bit   = TIMEN_TIM5;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM8_PWM
       case 8:
-        regaddr  = STM32_RCC_APB2ENR;
-        en_bit   = RCC_APB2ENR_TIM8EN;
+        regaddr  = TIMRCCEN_TIM8;
+        en_bit   = TIMEN_TIM8;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM9_PWM
       case 9:
-        regaddr  = STM32_RCC_APB2ENR;
-        en_bit   = RCC_APB2ENR_TIM9EN;
+        regaddr  = TIMRCCEN_TIM9;
+        en_bit   = TIMEN_TIM9;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM10_PWM
       case 10:
-        regaddr  = STM32_RCC_APB2ENR;
-        en_bit   = RCC_APB2ENR_TIM10EN;
+        regaddr  = TIMRCCEN_TIM10;
+        en_bit   = TIMEN_TIM10;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM11_PWM
       case 11:
-        regaddr  = STM32_RCC_APB2ENR;
-        en_bit   = RCC_APB2ENR_TIM11EN;
+        regaddr  = TIMRCCEN_TIM11;
+        en_bit   = TIMEN_TIM11;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM12_PWM
       case 12:
-        regaddr  = STM32_RCC_APB1ENR;
-        en_bit   = RCC_APB1ENR_TIM12EN;
+        regaddr  = TIMRCCEN_TIM12;
+        en_bit   = TIMEN_TIM12;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM13_PWM
       case 13:
-        regaddr  = STM32_RCC_APB1ENR;
-        en_bit   = RCC_APB1ENR_TIM13EN;
+        regaddr  = TIMRCCEN_TIM13;
+        en_bit   = TIMEN_TIM13;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM14_PWM
       case 14:
-        regaddr  = STM32_RCC_APB1ENR;
-        en_bit   = RCC_APB1ENR_TIM14EN;
+        regaddr  = TIMRCCEN_TIM14;
+        en_bit   = TIMEN_TIM14;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM15_PWM
       case 15:
-        regaddr  = STM32_RCC_APB2ENR;
-        en_bit   = RCC_APB2ENR_TIM15EN;
+        regaddr  = TIMRCCEN_TIM15;
+        en_bit   = TIMEN_TIM15;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM16_PWM
       case 16:
-        regaddr  = STM32_RCC_APB2ENR;
-        en_bit   = RCC_APB2ENR_TIM16EN;
+        regaddr  = TIMRCCEN_TIM16;
+        en_bit   = TIMEN_TIM16;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM17_PWM
       case 17:
-        regaddr  = STM32_RCC_APB2ENR;
-        en_bit   = RCC_APB2ENR_TIM17EN;
+        regaddr  = TIMRCCEN_TIM17;
+        en_bit   = TIMEN_TIM17;
         break;
 #endif
+      default:
+        return;
     }
 
   /* Enable/disable APB 1/2 clock for timer */
 
+  pwminfo("RCC_APBxENR base: %08x  bits: %04x\n", regaddr, en_bit);
+
   if (on)
     {
       modifyreg32(regaddr, 0, en_bit);
@@ -1943,13 +2202,14 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
   uint32_t pincfg;
   int i;
 
-  pwmvdbg("TIM%d\n", priv->timid);
-  pwm_dumpregs(priv, "Initially");
+  pwminfo("TIM%u\n", priv->timid);
 
   /* Enable APB1/2 clocking for timer. */
 
   pwm_set_apb_clock(priv, true);
 
+  pwm_dumpregs(priv, "Initially");
+
   /* Configure the PWM output pins, but do not start the timer yet */
 
   for (i = 0; i < PWM_NCHANNELS; i++)
@@ -1960,7 +2220,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
           continue;
         }
 
-      pwmvdbg("pincfg: %08x\n", pincfg);
+      pwminfo("pincfg: %08x\n", pincfg);
 
       stm32_configgpio(pincfg);
       pwm_dumpgpio(pincfg, "PWM setup");
@@ -1991,7 +2251,7 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
   uint32_t pincfg;
   int i;
 
-  pwmvdbg("TIM%d\n", priv->timid);
+  pwminfo("TIM%u\n", priv->timid);
 
   /* Make sure that the output has been stopped */
 
@@ -2011,7 +2271,7 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
           continue;
         }
 
-      pwmvdbg("pincfg: %08x\n", pincfg);
+      pwminfo("pincfg: %08x\n", pincfg);
 
       pincfg &= (GPIO_PORT_MASK | GPIO_PIN_MASK);
 
@@ -2019,6 +2279,7 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
       pincfg |= GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT;
 #elif defined(CONFIG_STM32_STM32F20XX) || \
       defined(CONFIG_STM32_STM32F30XX) || \
+      defined(CONFIG_STM32_STM32F37XX) || \
       defined(CONFIG_STM32_STM32F40XX) || \
       defined(CONFIG_STM32_STM32L15XX)
       pincfg |= GPIO_INPUT | GPIO_FLOAT;
@@ -2062,7 +2323,7 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
 
       if (priv->timtype != TIMTYPE_ADVANCED)
         {
-          pwmdbg("ERROR: TIM%d cannot support pulse count: %d\n",
+          pwmerr("ERROR: TIM%u cannot support pulse count: %u\n",
                  priv->timid, info->count);
           return -EPERM;
         }
@@ -2080,8 +2341,42 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
 static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
                      FAR const struct pwm_info_s *info)
 {
+  int ret = OK;
   FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
-  return pwm_timer(priv, info);
+
+#ifndef CONFIG_PWM_PULSECOUNT
+  /* if frequency has not changed we just update duty */
+
+  if (info->frequency == priv->frequency)
+    {
+#ifdef CONFIG_PWM_MULTICHAN
+      int i;
+
+      for (i = 0; ret == OK && i < CONFIG_PWM_NCHANNELS; i++)
+        {
+          ret = pwm_update_duty(priv,info->channels[i].channel,
+                                info->channels[i].duty);
+        }
+#else
+      ret = pwm_update_duty(priv,priv->channels[0].channel,info->duty);
+#endif
+    }
+  else
+#endif
+    {
+      ret = pwm_timer(priv, info);
+
+#ifndef CONFIG_PWM_PULSECOUNT
+      /* Save current frequency */
+
+      if (ret == OK)
+        {
+          priv->frequency = info->frequency;
+        }
+#endif
+    }
+
+  return ret;
 }
 #endif
 
@@ -2112,18 +2407,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
   uint32_t regval;
   irqstate_t flags;
 
-  pwmvdbg("TIM%d\n", priv->timid);
-
-  /* Disable interrupts momentary to stop any ongoing timer processing and
-   * to prevent any concurrent access to the reset register.
-   */
-
-  flags = enter_critical_section();
-
-  /* Disable further interrupts and stop the timer */
-
-  pwm_putreg(priv, STM32_GTIM_DIER_OFFSET, 0);
-  pwm_putreg(priv, STM32_GTIM_SR_OFFSET, 0);
+  pwminfo("TIM%u\n", priv->timid);
 
   /* Determine which timer to reset */
 
@@ -2131,96 +2415,113 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
     {
 #ifdef CONFIG_STM32_TIM1_PWM
       case 1:
-        regaddr  = STM32_RCC_APB2RSTR;
-        resetbit = RCC_APB2RSTR_TIM1RST;
+        regaddr  = TIMRCCRST_TIM1;
+        resetbit = TIMRST_TIM1;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM2_PWM
       case 2:
-        regaddr  = STM32_RCC_APB1RSTR;
-        resetbit = RCC_APB1RSTR_TIM2RST;
+        regaddr  = TIMRCCRST_TIM2;
+        resetbit = TIMRST_TIM2;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM3_PWM
       case 3:
-        regaddr  = STM32_RCC_APB1RSTR;
-        resetbit = RCC_APB1RSTR_TIM3RST;
+        regaddr  = TIMRCCRST_TIM3;
+        resetbit = TIMRST_TIM3;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM4_PWM
       case 4:
-        regaddr  = STM32_RCC_APB1RSTR;
-        resetbit = RCC_APB1RSTR_TIM4RST;
+        regaddr  = TIMRCCRST_TIM4;
+        resetbit = TIMRST_TIM4;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM5_PWM
       case 5:
-        regaddr  = STM32_RCC_APB1RSTR;
-        resetbit = RCC_APB1RSTR_TIM5RST;
+        regaddr  = TIMRCCRST_TIM5;
+        resetbit = TIMRST_TIM5;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM8_PWM
       case 8:
-        regaddr  = STM32_RCC_APB2RSTR;
-        resetbit = RCC_APB2RSTR_TIM8RST;
+        regaddr  = TIMRCCRST_TIM8;
+        resetbit = TIMRST_TIM8;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM9_PWM
       case 9:
-        regaddr  = STM32_RCC_APB2RSTR;
-        resetbit = RCC_APB2RSTR_TIM9RST;
+        regaddr  = TIMRCCRST_TIM9;
+        resetbit = TIMRST_TIM9;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM10_PWM
       case 10:
-        regaddr  = STM32_RCC_APB2RSTR;
-        resetbit = RCC_APB2RSTR_TIM10RST;
+        regaddr  = TIMRCCRST_TIM10;
+        resetbit = TIMRST_TIM10;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM11_PWM
       case 11:
-        regaddr  = STM32_RCC_APB2RSTR;
-        resetbit = RCC_APB2RSTR_TIM11RST;
+        regaddr  = TIMRCCRST_TIM11;
+        resetbit = TIMRST_TIM11;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM12_PWM
       case 12:
-        regaddr  = STM32_RCC_APB1RSTR;
-        resetbit = RCC_APB1RSTR_TIM12RST;
+        regaddr  = TIMRCCRST_TIM12;
+        resetbit = TIMRST_TIM12;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM13_PWM
       case 13:
-        regaddr  = STM32_RCC_APB1RSTR;
-        resetbit = RCC_APB1RSTR_TIM13RST;
+        regaddr  = TIMRCCRST_TIM13;
+        resetbit = TIMRST_TIM13;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM14_PWM
       case 14:
-        regaddr  = STM32_RCC_APB1RSTR;
-        resetbit = RCC_APB1RSTR_TIM14RST;
+        regaddr  = TIMRCCRST_TIM14;
+        resetbit = TIMRST_TIM14;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM15_PWM
       case 15:
-        regaddr  = STM32_RCC_APB2RSTR;
-        resetbit = RCC_APB2RSTR_TIM15RST;
+        regaddr  = TIMRCCRST_TIM15;
+        resetbit = TIMRST_TIM15;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM16_PWM
       case 16:
-        regaddr  = STM32_RCC_APB2RSTR;
-        resetbit = RCC_APB2RSTR_TIM16RST;
+        regaddr  = TIMRCCRST_TIM16;
+        resetbit = TIMRST_TIM16;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM17_PWM
       case 17:
-        regaddr  = STM32_RCC_APB2RSTR;
-        resetbit = RCC_APB2RSTR_TIM17RST;
+        regaddr  = TIMRCCRST_TIM17;
+        resetbit = TIMRST_TIM17;
         break;
 #endif
+      default:
+        return -EINVAL;
     }
 
+  /* Disable interrupts momentary to stop any ongoing timer processing and
+   * to prevent any concurrent access to the reset register.
+   */
+
+  flags = enter_critical_section();
+
+  /* Stopped so frequency is zero */
+
+  priv->frequency = 0;
+
+  /* Disable further interrupts and stop the timer */
+
+  pwm_putreg(priv, STM32_GTIM_DIER_OFFSET, 0);
+  pwm_putreg(priv, STM32_GTIM_SR_OFFSET, 0);
+
   /* Reset the timer - stopping the output and putting the timer back
    * into a state where pwm_start() can be called.
    */
@@ -2233,7 +2534,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
   putreg32(regval, regaddr);
   leave_critical_section(flags);
 
-  pwmvdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
+  pwminfo("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
   pwm_dumpregs(priv, "After stop");
   return OK;
 }
@@ -2256,12 +2557,12 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
 
 static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg)
 {
-#ifdef CONFIG_DEBUG_PWM
+#ifdef CONFIG_DEBUG_PWM_INFO
   FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
 
   /* There are no platform-specific ioctl commands */
 
-  pwmvdbg("TIM%d\n", priv->timid);
+  pwminfo("TIM%u\n", priv->timid);
 #endif
   return -ENOTTY;
 }
@@ -2291,7 +2592,7 @@ FAR struct pwm_lowerhalf_s *stm32_pwminitialize(int timer)
 {
   FAR struct stm32_pwmtimer_s *lower;
 
-  pwmvdbg("TIM%d\n", timer);
+  pwminfo("TIM%u\n", timer);
 
   switch (timer)
     {
@@ -2302,7 +2603,7 @@ FAR struct pwm_lowerhalf_s *stm32_pwminitialize(int timer)
         /* Attach but disable the TIM1 update interrupt */
 
 #ifdef CONFIG_PWM_PULSECOUNT
-        irq_attach(lower->irq, pwm_tim1interrupt);
+        irq_attach(lower->irq, pwm_tim1interrupt, NULL);
         up_disable_irq(lower->irq);
 #endif
         break;
@@ -2339,7 +2640,7 @@ FAR struct pwm_lowerhalf_s *stm32_pwminitialize(int timer)
         /* Attach but disable the TIM8 update interrupt */
 
 #ifdef CONFIG_PWM_PULSECOUNT
-        irq_attach(lower->irq, pwm_tim8interrupt);
+        irq_attach(lower->irq, pwm_tim8interrupt, NULL);
         up_disable_irq(lower->irq);
 #endif
         break;
@@ -2400,7 +2701,7 @@ FAR struct pwm_lowerhalf_s *stm32_pwminitialize(int timer)
 #endif
 
       default:
-        pwmdbg("No such timer configured\n");
+        pwmerr("ERROR: No such timer configured\n");
         return NULL;
     }
 
diff --git a/arch/arm/src/stm32/stm32_pwm.h b/arch/arm/src/stm32/stm32_pwm.h
index e636ead3a37b447e5864845ce7ca3581976ad6f2..1321389046e1fcc48b3bda0eef94bd3d37c443ce 100644
--- a/arch/arm/src/stm32/stm32_pwm.h
+++ b/arch/arm/src/stm32/stm32_pwm.h
@@ -41,7 +41,7 @@
 /* The STM32 does not have dedicated PWM hardware.  Rather, pulsed output control
  * is a capabilitiy of the STM32 timers.  The logic in this file implements the
  * lower half of the standard, NuttX PWM interface using the STM32 timers.  That
- * interface is described in include/nuttx/pwm.h.
+ * interface is described in include/nuttx/drivers/pwm.h.
  */
 
 /************************************************************************************
diff --git a/arch/arm/src/stm32/stm32_pwr.c b/arch/arm/src/stm32/stm32_pwr.c
index a32caaea517529f63c486b208e37ac3ffa638186..b2aee60177dfb495a51eb89b6a814cdd015d6304 100644
--- a/arch/arm/src/stm32/stm32_pwr.c
+++ b/arch/arm/src/stm32/stm32_pwr.c
@@ -2,9 +2,10 @@
  * arch/arm/src/stm32/stm32_pwr.c
  *
  *   Copyright (C) 2011 Uros Platise. All rights reserved.
- *   Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2015-2017 Gregory Nutt. All rights reserved.
  *   Authors: Uros Platise 
  *            Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -40,21 +41,25 @@
  ************************************************************************************/
 
 #include 
-#include 
 
 #include 
 #include 
 #include 
 
+#include 
+#include 
+
 #include "up_arch.h"
 #include "stm32_pwr.h"
 
 #if defined(CONFIG_STM32_PWR)
 
 /************************************************************************************
- * Pre-processor Definitions
+ * Private Data
  ************************************************************************************/
 
+static uint16_t g_bkp_writable_counter = 0;
+
 /************************************************************************************
  * Private Functions
  ************************************************************************************/
@@ -78,6 +83,79 @@ static inline void stm32_pwr_modifyreg(uint8_t offset, uint16_t clearbits, uint1
  * Public Functions
  ************************************************************************************/
 
+/************************************************************************************
+ * Name: stm32_pwr_enablesdadc
+ *
+ * Description:
+ *   Enables SDADC power
+ *
+ * Input Parameters:
+ *   sdadc - SDADC number 1-3
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+#if defined(CONFIG_STM32_STM32F37XX)
+void stm32_pwr_enablesdadc(uint8_t sdadc)
+{
+  uint32_t setbits = 0;
+
+  switch (sdadc)
+    {
+      case 1:
+        setbits = PWR_CR_ENSD1;
+        break;
+
+      case 2:
+        setbits = PWR_CR_ENSD2;
+        break;
+
+      case 3:
+        setbits = PWR_CR_ENSD3;
+        break;
+    }
+
+  stm32_pwr_modifyreg(STM32_PWR_CR_OFFSET, 0, setbits);
+
+}
+#endif
+
+/************************************************************************************
+ * Name: stm32_pwr_initbkp
+ *
+ * Description:
+ *   Insures the referenced count access to the backup domain (RTC registers,
+ *   RTC backup data registers and backup SRAM is consistent with the HW state
+ *   without relying on a variable.
+ *
+ *   NOTE: This function should only be called by SoC Start up code.
+ *
+ * Input Parameters:
+ *   writable - True: enable ability to write to backup domain registers
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+void stm32_pwr_initbkp(bool writable)
+{
+  uint16_t regval;
+
+  /* Make the HW not writable */
+
+  regval = stm32_pwr_getreg(STM32_PWR_CR_OFFSET);
+  regval &= ~PWR_CR_DBP;
+  stm32_pwr_putreg(STM32_PWR_CR_OFFSET, regval);
+
+  /* Make the reference count agree */
+
+  g_bkp_writable_counter =  0;
+  stm32_pwr_enablebkp(writable);
+}
+
 /************************************************************************************
  * Name: stm32_pwr_enablebkp
  *
@@ -85,46 +163,69 @@ static inline void stm32_pwr_modifyreg(uint8_t offset, uint16_t clearbits, uint1
  *   Enables access to the backup domain (RTC registers, RTC backup data registers
  *   and backup SRAM).
  *
+ *   NOTE: Reference counting is used in order to supported nested calls to this
+ *   function.  As a consequence, every call to stm32_pwr_enablebkp(true) must
+ *   be followed by a matching call to stm32_pwr_enablebkp(false).
+ *
  * Input Parameters:
  *   writable - True: enable ability to write to backup domain registers
  *
  * Returned Value:
- *   True: The backup domain was previously writable.
+ *   None
  *
  ************************************************************************************/
 
-bool stm32_pwr_enablebkp(bool writable)
+void stm32_pwr_enablebkp(bool writable)
 {
+  irqstate_t flags;
   uint16_t regval;
   bool waswritable;
+  bool wait = false;
+
+  flags = enter_critical_section();
 
   /* Get the current state of the STM32 PWR control register */
 
   regval      = stm32_pwr_getreg(STM32_PWR_CR_OFFSET);
   waswritable = ((regval & PWR_CR_DBP) != 0);
 
+  if (writable)
+    {
+      DEBUGASSERT(g_bkp_writable_counter < UINT16_MAX);
+      g_bkp_writable_counter++;
+    }
+  else if (g_bkp_writable_counter > 0)
+    {
+      g_bkp_writable_counter--;
+    }
+
   /* Enable or disable the ability to write */
 
-  if (waswritable && !writable)
+  if (waswritable && g_bkp_writable_counter == 0)
     {
       /* Disable backup domain access */
 
       regval &= ~PWR_CR_DBP;
       stm32_pwr_putreg(STM32_PWR_CR_OFFSET, regval);
     }
-  else if (!waswritable && writable)
+  else if (!waswritable && g_bkp_writable_counter > 0)
     {
       /* Enable backup domain access */
 
       regval |= PWR_CR_DBP;
       stm32_pwr_putreg(STM32_PWR_CR_OFFSET, regval);
 
+      wait = true;
+    }
+
+  leave_critical_section(flags);
+
+  if (wait)
+    {
       /* Enable does not happen right away */
 
       up_udelay(4);
     }
-
-  return waswritable;
 }
 
 /************************************************************************************
diff --git a/arch/arm/src/stm32/stm32_pwr.h b/arch/arm/src/stm32/stm32_pwr.h
index 49e0657f552b68a1085d1576fb714b592d491592..ab33eb9b2cda6c95461cbfedfd174d456d1a9116 100644
--- a/arch/arm/src/stm32/stm32_pwr.h
+++ b/arch/arm/src/stm32/stm32_pwr.h
@@ -1,8 +1,9 @@
 /************************************************************************************
  * arch/arm/src/stm32/stm32_pwr.h
  *
- *   Copyright (C) 2009, 2013, 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2009, 2013, 2015, 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -66,6 +67,45 @@ extern "C"
  * Public Functions
  ************************************************************************************/
 
+/************************************************************************************
+ * Name: stm32_pwr_enablesdadc
+ *
+ * Description:
+ *   Enables SDADC power
+ *
+ * Input Parameters:
+ *   sdadc - SDADC number 1-3
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+#if defined(CONFIG_STM32_STM32F37XX)
+void stm32_pwr_enablesdadc(uint8_t sdadc);
+#endif
+
+/************************************************************************************
+ * Name: stm32_pwr_initbkp
+ *
+ * Description:
+ *   Insures the referenced count access to the backup domain (RTC registers,
+ *   RTC backup data registers and backup SRAM is consistent with the HW state
+ *   without relying on a variable.
+ *
+ *   NOTE: This function should only be called by SoC Start up code.
+ *
+ * Input Parameters:
+ *   writable - set the initial state of the enable and the
+ *              bkp_writable_counter
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+void stm32_pwr_initbkp(bool writable);
+
 /************************************************************************************
  * Name: stm32_pwr_enablebkp
  *
@@ -73,15 +113,19 @@ extern "C"
  *   Enables access to the backup domain (RTC registers, RTC backup data registers
  *   and backup SRAM).
  *
+ *   NOTE: Reference counting is used in order to supported nested calls to this
+ *   function.  As a consequence, every call to stm32_pwr_enablebkp(true) must
+ *   be followed by a matching call to stm32_pwr_enablebkp(false).
+ *
  * Input Parameters:
  *   writable - True: enable ability to write to backup domain registers
  *
  * Returned Value:
- *   True: The backup domain was previously writable.
+ *   None
  *
  ************************************************************************************/
 
-bool stm32_pwr_enablebkp(bool writable);
+void stm32_pwr_enablebkp(bool writable);
 
 /************************************************************************************
  * Name: stm32_pwr_enablebreg
diff --git a/arch/arm/src/stm32/stm32_qencoder.c b/arch/arm/src/stm32/stm32_qencoder.c
index 5cec5e0874d2fdac8bb23999a7173059e3197853..e2245075b9142e0ca7f1815e02f4e64f73cb7f38 100644
--- a/arch/arm/src/stm32/stm32_qencoder.c
+++ b/arch/arm/src/stm32/stm32_qencoder.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * arch/arm/src/stm32/stm32_qencoder.c
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
  *   Authors: Gregory Nutt 
  *            Diego Sanchez 
  *
@@ -65,32 +65,6 @@
 /************************************************************************************
  * Pre-processor Definitions
  ************************************************************************************/
-/* Clocking *************************************************************************/
-/* The CLKOUT value should not exceed the CLKIN value */
-
-#if defined(CONFIG_STM32_TIM1_QE) && CONFIG_STM32_TIM1_QECLKOUT > STM32_APB2_TIM1_CLKIN
-#  warning "CONFIG_STM32_TIM1_QECLKOUT exceeds STM32_APB2_TIM1_CLKIN"
-#endif
-
-#if defined(CONFIG_STM32_TIM2_QE) && CONFIG_STM32_TIM2_QECLKOUT > STM32_APB1_TIM2_CLKIN
-#  warning "CONFIG_STM32_TIM2_QECLKOUT exceeds STM32_APB2_TIM2_CLKIN"
-#endif
-
-#if defined(CONFIG_STM32_TIM3_QE) && CONFIG_STM32_TIM3_QECLKOUT >  STM32_APB1_TIM3_CLKIN
-#  warning "CONFIG_STM32_TIM3_QECLKOUT exceeds STM32_APB2_TIM3_CLKIN"
-#endif
-
-#if defined(CONFIG_STM32_TIM4_QE) && CONFIG_STM32_TIM4_QECLKOUT > STM32_APB1_TIM4_CLKIN
-#  warning "CONFIG_STM32_TIM4_QECLKOUT exceeds STM32_APB2_TIM4_CLKIN"
-#endif
-
-#if defined(CONFIG_STM32_TIM5_QE) && CONFIG_STM32_TIM5_QECLKOUT > STM32_APB1_TIM5_CLKIN
-#  warning "CONFIG_STM32_TIM5_QECLKOUT exceeds STM32_APB2_TIM5_CLKIN"
-#endif
-
-#if defined(CONFIG_STM32_TIM8_QE) && CONFIG_STM32_TIM8_QECLKOUT > STM32_APB2_TIM8_CLKIN
-#  warning "CONFIG_STM32_TIM8_QECLKOUT exceeds STM32_APB2_TIM8_CLKIN"
-#endif
 
 /* Timers ***************************************************************************/
 
@@ -247,12 +221,12 @@
 /* Debug ****************************************************************************/
 /* Non-standard debug that may be enabled just for testing the quadrature encoder */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
 #  undef CONFIG_DEBUG_SENSORS
 #endif
 
 #ifdef CONFIG_DEBUG_SENSORS
-#  ifdef CONFIG_DEBUG_VERBOSE
+#  ifdef CONFIG_DEBUG_INFO
 #    define qe_dumpgpio(p,m)    stm32_dumpgpio(p,m)
 #  else
 #    define qe_dumpgpio(p,m)
@@ -269,21 +243,22 @@
 
 struct stm32_qeconfig_s
 {
-  uint8_t  timid;   /* Timer ID {1,2,3,4,5,8} */
-  uint8_t  irq;     /* Timer update IRQ */
+  uint8_t   timid;   /* Timer ID {1,2,3,4,5,8} */
+  uint8_t   irq;     /* Timer update IRQ */
 #ifdef HAVE_MIXEDWIDTH_TIMERS
-  uint8_t  width;   /* Timer width (16- or 32-bits) */
+  uint8_t   width;   /* Timer width (16- or 32-bits) */
 #endif
 #ifdef CONFIG_STM32_STM32F10XX
-  uint16_t ti1cfg;  /* TI1 input pin configuration (16-bit encoding) */
-  uint16_t ti2cfg;  /* TI2 input pin configuration (16-bit encoding) */
+  uint16_t  ti1cfg;  /* TI1 input pin configuration (16-bit encoding) */
+  uint16_t  ti2cfg;  /* TI2 input pin configuration (16-bit encoding) */
 #else
-  uint32_t ti1cfg;  /* TI1 input pin configuration (20-bit encoding) */
-  uint32_t ti2cfg;  /* TI2 input pin configuration (20-bit encoding) */
+  uint32_t  ti1cfg;  /* TI1 input pin configuration (20-bit encoding) */
+  uint32_t  ti2cfg;  /* TI2 input pin configuration (20-bit encoding) */
 #endif
-  uint32_t base;    /* Register base address */
-  uint32_t psc;     /* Timer input clock prescaler */
-  xcpt_t   handler; /* Interrupt handler for this IRQ */
+  uintptr_t regaddr; /* RCC clock enable register address */
+  uint32_t  enable;  /* RCC clock enable bit */
+  uint32_t  base;    /* Register base address */
+  uint32_t  psc;     /* Timer input clock prescaler */
 };
 
 /* Overall, RAM-based state structure */
@@ -317,7 +292,7 @@ static void stm32_putreg16(FAR struct stm32_lowerhalf_s *priv, int offset, uint1
 static uint32_t stm32_getreg32(FAR struct stm32_lowerhalf_s *priv, int offset);
 static void stm32_putreg32(FAR struct stm32_lowerhalf_s *priv, int offset, uint32_t value);
 
-#if defined(CONFIG_DEBUG_SENSORS) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_SENSORS) && defined(CONFIG_DEBUG_INFO)
 static void stm32_dumpregs(FAR struct stm32_lowerhalf_s *priv, FAR const char *msg);
 #else
 #  define stm32_dumpregs(priv,msg)
@@ -328,25 +303,7 @@ static FAR struct stm32_lowerhalf_s *stm32_tim2lower(int tim);
 /* Interrupt handling */
 
 #ifdef HAVE_16BIT_TIMERS
-static int stm32_interrupt(FAR struct stm32_lowerhalf_s *priv);
-#if defined(CONFIG_STM32_TIM1_QE) && TIM1_BITWIDTH == 16
-static int stm32_tim1interrupt(int irq, FAR void *context);
-#endif
-#if defined(CONFIG_STM32_TIM2_QE) && TIM2_BITWIDTH == 16
-static int stm32_tim2interrupt(int irq, FAR void *context);
-#endif
-#if defined(CONFIG_STM32_TIM3_QE) && TIM3_BITWIDTH == 16
-static int stm32_tim3interrupt(int irq, FAR void *context);
-#endif
-#if defined(CONFIG_STM32_TIM4_QE) && TIM4_BITWIDTH == 16
-static int stm32_tim4interrupt(int irq, FAR void *context);
-#endif
-#if defined(CONFIG_STM32_TIM5_QE) && TIM5_BITWIDTH == 16
-static int stm32_tim5interrupt(int irq, FAR void *context);
-#endif
-#if defined(CONFIG_STM32_TIM8_QE) && TIM8_BITWIDTH == 16
-static int stm32_tim8interrupt(int irq, FAR void *context);
-#endif
+static int stm32_interrupt(int irq, FAR void *context, FAR void *arg);
 #endif
 
 /* Lower-half Quadrature Encoder Driver Methods */
@@ -381,13 +338,12 @@ static const struct stm32_qeconfig_s g_tim1config =
 #ifdef HAVE_MIXEDWIDTH_TIMERS
   .width    = TIM1_BITWIDTH,
 #endif
+  .regaddr  = STM32_RCC_APB2ENR,
+  .enable   = RCC_APB2ENR_TIM1EN,
   .base     = STM32_TIM1_BASE,
-  .psc      = (STM32_APB2_TIM1_CLKIN / CONFIG_STM32_TIM1_QECLKOUT) - 1,
+  .psc      = CONFIG_STM32_TIM1_QEPSC,
   .ti1cfg   = GPIO_TIM1_CH1IN,
   .ti2cfg   = GPIO_TIM1_CH2IN,
-#if TIM1_BITWIDTH == 16
-  .handler  = stm32_tim1interrupt,
-#endif
 };
 
 static struct stm32_lowerhalf_s g_tim1lower =
@@ -407,13 +363,12 @@ static const struct stm32_qeconfig_s g_tim2config =
 #ifdef HAVE_MIXEDWIDTH_TIMERS
   .width    = TIM2_BITWIDTH,
 #endif
+  .regaddr  = STM32_RCC_APB1ENR,
+  .enable   = RCC_APB1ENR_TIM2EN,
   .base     = STM32_TIM2_BASE,
-  .psc      = (STM32_APB1_TIM2_CLKIN / CONFIG_STM32_TIM2_QECLKOUT) - 1,
+  .psc      = CONFIG_STM32_TIM2_QEPSC,
   .ti1cfg   = GPIO_TIM2_CH1IN,
   .ti2cfg   = GPIO_TIM2_CH2IN,
-#if TIM2_BITWIDTH == 16
-  .handler  = stm32_tim2interrupt,
-#endif
 };
 
 static struct stm32_lowerhalf_s g_tim2lower =
@@ -433,13 +388,12 @@ static const struct stm32_qeconfig_s g_tim3config =
 #ifdef HAVE_MIXEDWIDTH_TIMERS
   .width    = TIM3_BITWIDTH,
 #endif
+  .regaddr  = STM32_RCC_APB1ENR,
+  .enable   = RCC_APB1ENR_TIM3EN,
   .base     = STM32_TIM3_BASE,
-  .psc      = (STM32_APB1_TIM3_CLKIN / CONFIG_STM32_TIM3_QECLKOUT) - 1,
+  .psc      = CONFIG_STM32_TIM3_QEPSC,
   .ti1cfg   = GPIO_TIM3_CH1IN,
   .ti2cfg   = GPIO_TIM3_CH2IN,
-#if TIM3_BITWIDTH == 16
-  .handler  = stm32_tim3interrupt,
-#endif
 };
 
 static struct stm32_lowerhalf_s g_tim3lower =
@@ -459,13 +413,12 @@ static const struct stm32_qeconfig_s g_tim4config =
 #ifdef HAVE_MIXEDWIDTH_TIMERS
   .width    = TIM4_BITWIDTH,
 #endif
+  .regaddr  = STM32_RCC_APB1ENR,
+  .enable   = RCC_APB1ENR_TIM4EN,
   .base     = STM32_TIM4_BASE,
-  .psc      = (STM32_APB1_TIM4_CLKIN / CONFIG_STM32_TIM4_QECLKOUT) - 1,
+  .psc      = CONFIG_STM32_TIM4_QEPSC,
   .ti1cfg   = GPIO_TIM4_CH1IN,
   .ti2cfg   = GPIO_TIM4_CH2IN,
-#if TIM4_BITWIDTH == 16
-  .handler  = stm32_tim4interrupt,
-#endif
 };
 
 static struct stm32_lowerhalf_s g_tim4lower =
@@ -485,13 +438,12 @@ static const struct stm32_qeconfig_s g_tim5config =
 #ifdef HAVE_MIXEDWIDTH_TIMERS
   .width    = TIM5_BITWIDTH,
 #endif
+  .regaddr  = STM32_RCC_APB1ENR,
+  .enable   = RCC_APB1ENR_TIM5EN,
   .base     = STM32_TIM5_BASE,
-  .psc      = (STM32_APB1_TIM5_CLKIN / CONFIG_STM32_TIM5_QECLKOUT) - 1,
+  .psc      = CONFIG_STM32_TIM5_QEPSC,
   .ti1cfg   = GPIO_TIM5_CH1IN,
   .ti2cfg   = GPIO_TIM5_CH2IN,
-#if TIM5_BITWIDTH == 16
-  .handler  = stm32_tim5interrupt,
-#endif
 };
 
 static struct stm32_lowerhalf_s g_tim5lower =
@@ -511,13 +463,12 @@ static const struct stm32_qeconfig_s g_tim8config =
 #ifdef HAVE_MIXEDWIDTH_TIMERS
   .width    = TIM8_BITWIDTH,
 #endif
+  .regaddr  = STM32_RCC_APB2ENR,
+  .enable   = RCC_APB2ENR_TIM8EN,
   .base     = STM32_TIM8_BASE,
-  .psc      = (STM32_APB2_TIM8_CLKIN / CONFIG_STM32_TIM8_QECLKOUT) - 1,
+  .psc      = CONFIG_STM32_TIM8_QEPSC,
   .ti1cfg   = GPIO_TIM8_CH1IN,
   .ti2cfg   = GPIO_TIM8_CH2IN,
-#if TIM8_BITWIDTH == 16
-  .handler  = stm32_tim8interrupt,
-#endif
 };
 
 static struct stm32_lowerhalf_s g_tim8lower =
@@ -631,26 +582,26 @@ static void stm32_putreg32(FAR struct stm32_lowerhalf_s *priv, int offset, uint3
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_SENSORS) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_SENSORS) && defined(CONFIG_DEBUG_INFO)
 static void stm32_dumpregs(FAR struct stm32_lowerhalf_s *priv, FAR const char *msg)
 {
-  snvdbg("%s:\n", msg);
-  snvdbg("  CR1: %04x CR2:  %04x SMCR:  %04x DIER:  %04x\n",
+  sninfo("%s:\n", msg);
+  sninfo("  CR1: %04x CR2:  %04x SMCR:  %04x DIER:  %04x\n",
          stm32_getreg16(priv, STM32_GTIM_CR1_OFFSET),
          stm32_getreg16(priv, STM32_GTIM_CR2_OFFSET),
          stm32_getreg16(priv, STM32_GTIM_SMCR_OFFSET),
          stm32_getreg16(priv, STM32_GTIM_DIER_OFFSET));
-  snvdbg("   SR: %04x EGR:  %04x CCMR1: %04x CCMR2: %04x\n",
+  sninfo("   SR: %04x EGR:  %04x CCMR1: %04x CCMR2: %04x\n",
          stm32_getreg16(priv, STM32_GTIM_SR_OFFSET),
          stm32_getreg16(priv, STM32_GTIM_EGR_OFFSET),
          stm32_getreg16(priv, STM32_GTIM_CCMR1_OFFSET),
          stm32_getreg16(priv, STM32_GTIM_CCMR2_OFFSET));
-  snvdbg(" CCER: %04x CNT:  %04x PSC:   %04x ARR:   %04x\n",
+  sninfo(" CCER: %04x CNT:  %04x PSC:   %04x ARR:   %04x\n",
          stm32_getreg16(priv, STM32_GTIM_CCER_OFFSET),
          stm32_getreg16(priv, STM32_GTIM_CNT_OFFSET),
          stm32_getreg16(priv, STM32_GTIM_PSC_OFFSET),
          stm32_getreg16(priv, STM32_GTIM_ARR_OFFSET));
-  snvdbg(" CCR1: %04x CCR2: %04x CCR3:  %04x CCR4:  %04x\n",
+  sninfo(" CCR1: %04x CCR2: %04x CCR3:  %04x CCR4:  %04x\n",
          stm32_getreg16(priv, STM32_GTIM_CCR1_OFFSET),
          stm32_getreg16(priv, STM32_GTIM_CCR2_OFFSET),
          stm32_getreg16(priv, STM32_GTIM_CCR3_OFFSET),
@@ -658,7 +609,7 @@ static void stm32_dumpregs(FAR struct stm32_lowerhalf_s *priv, FAR const char *m
 #if defined(CONFIG_STM32_TIM1_QE) || defined(CONFIG_STM32_TIM8_QE)
   if (priv->config->timid == 1 || priv->config->timid == 8)
     {
-      snvdbg("  RCR: %04x BDTR: %04x DCR:   %04x DMAR:  %04x\n",
+      sninfo("  RCR: %04x BDTR: %04x DCR:   %04x DMAR:  %04x\n",
              stm32_getreg16(priv, STM32_ATIM_RCR_OFFSET),
              stm32_getreg16(priv, STM32_ATIM_BDTR_OFFSET),
              stm32_getreg16(priv, STM32_ATIM_DCR_OFFSET),
@@ -667,7 +618,7 @@ static void stm32_dumpregs(FAR struct stm32_lowerhalf_s *priv, FAR const char *m
   else
 #endif
     {
-      snvdbg("  DCR: %04x DMAR: %04x\n",
+      sninfo("  DCR: %04x DMAR: %04x\n",
              stm32_getreg16(priv, STM32_GTIM_DCR_OFFSET),
              stm32_getreg16(priv, STM32_GTIM_DMAR_OFFSET));
     }
@@ -725,10 +676,13 @@ static FAR struct stm32_lowerhalf_s *stm32_tim2lower(int tim)
  ************************************************************************************/
 
 #ifdef HAVE_16BIT_TIMERS
-static int stm32_interrupt(FAR struct stm32_lowerhalf_s *priv)
+static int stm32_interrupt(int irq, FAR void *context, FAR void *arg)
 {
+  FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)arg;
   uint16_t regval;
 
+  DEBUGASSERT(priv != NULL);
+
   /* Verify that this is an update interrupt.  Nothing else is expected. */
 
   regval = stm32_getreg16(priv, STM32_GTIM_SR_OFFSET);
@@ -756,56 +710,6 @@ static int stm32_interrupt(FAR struct stm32_lowerhalf_s *priv)
 }
 #endif
 
-/************************************************************************************
- * Name: stm32_intNinterrupt
- *
- * Description:
- *   TIMN interrupt handler
- *
- ************************************************************************************/
-
-#if defined(CONFIG_STM32_TIM1_QE) && TIM1_BITWIDTH == 16
-static int stm32_tim1interrupt(int irq, FAR void *context)
-{
-  return stm32_interrupt(&g_tim1lower);
-}
-#endif
-
-#if defined(CONFIG_STM32_TIM2_QE) && TIM2_BITWIDTH == 16
-static int stm32_tim2interrupt(int irq, FAR void *context)
-{
-  return stm32_interrupt(&g_tim2lower);
-}
-#endif
-
-#if defined(CONFIG_STM32_TIM3_QE) && TIM3_BITWIDTH == 16
-static int stm32_tim3interrupt(int irq, FAR void *context)
-{
-  return stm32_interrupt(&g_tim3lower);
-}
-#endif
-
-#if defined(CONFIG_STM32_TIM4_QE) && TIM4_BITWIDTH == 16
-static int stm32_tim4interrupt(int irq, FAR void *context)
-{
-  return stm32_interrupt(&g_tim4lower);
-}
-#endif
-
-#if defined(CONFIG_STM32_TIM5_QE) && TIM5_BITWIDTH == 16
-static int stm32_tim5interrupt(int irq, FAR void *context)
-{
-  return stm32_interrupt(&g_tim5lower);
-}
-#endif
-
-#if defined(CONFIG_STM32_TIM8_QE) && TIM8_BITWIDTH == 16
-static int stm32_tim8interrupt(int irq, FAR void *context)
-{
-  return stm32_interrupt(&g_tim8lower);
-}
-#endif
-
 /************************************************************************************
  * Name: stm32_setup
  *
@@ -820,8 +724,8 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
 {
   FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
   uint16_t dier;
-  uint16_t smcr;
-  uint16_t ccmr1;
+  uint32_t smcr;
+  uint32_t ccmr1;
   uint16_t ccer;
   uint16_t cr1;
 #ifdef HAVE_16BIT_TIMERS
@@ -829,7 +733,9 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
   int ret;
 #endif
 
-  /* NOTE: Clocking should have been enabled in the low-level RCC logic at boot-up */
+  /* Enable clocking to the timer */
+
+  modifyreg32(priv->config->regaddr, 0, priv->config->enable);
 
   /* Timer base configuration */
 
@@ -859,10 +765,14 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
   stm32_putreg16(priv, STM32_GTIM_ARR_OFFSET, 0xffff);
 #endif
 
-  /* Set the timer prescaler value.  The clock input value (CLKIN) is based on the
-   * peripheral clock (PCLK) and a multiplier.  These CLKIN values are provided in
-   * the board.h file.  The prescaler value is then that CLKIN value divided by the
-   * configured CLKOUT value (minus one)
+  /* Set the timer prescaler value.
+   *
+   * If we are doing precise shaft positioning, each qe pulse is important.
+   * So the STM32 has direct config control on the pulse count prescaler.
+   * This input clock just limits the incoming pulse rate, which should be
+   * lower than the peripheral clock due to resynchronization, but it is the
+   * responsibility of the system designer to decide the correct prescaler
+   * value, because it has a direct influence on the encoder resolution.
    */
 
   stm32_putreg16(priv, STM32_GTIM_PSC_OFFSET, (uint16_t)priv->config->psc);
@@ -889,10 +799,10 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
 
   /* Set the encoder Mode 3 */
 
-  smcr = stm32_getreg16(priv, STM32_GTIM_SMCR_OFFSET);
+  smcr  = stm32_getreg32(priv, STM32_GTIM_SMCR_OFFSET);
   smcr &= ~GTIM_SMCR_SMS_MASK;
   smcr |= GTIM_SMCR_ENCMD3;
-  stm32_putreg16(priv, STM32_GTIM_SMCR_OFFSET, smcr);
+  stm32_putreg32(priv, STM32_GTIM_SMCR_OFFSET, smcr);
 
   /* TI1 Channel Configuration */
   /* Disable the Channel 1: Reset the CC1E Bit */
@@ -901,8 +811,8 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
   ccer &= ~GTIM_CCER_CC1E;
   stm32_putreg16(priv, STM32_GTIM_CCER_OFFSET, ccer);
 
-  ccmr1 = stm32_getreg16(priv, STM32_GTIM_CCMR1_OFFSET);
-  ccer = stm32_getreg16(priv, STM32_GTIM_CCER_OFFSET);
+  ccmr1 = stm32_getreg32(priv, STM32_GTIM_CCMR1_OFFSET);
+  ccer  = stm32_getreg16(priv, STM32_GTIM_CCER_OFFSET);
 
   /* Select the Input IC1=TI1 and set the filter fSAMPLING=fDTS/4, N=6 */
 
@@ -917,17 +827,17 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
 
   /* Write to TIM CCMR1 and CCER registers */
 
-  stm32_putreg16(priv, STM32_GTIM_CCMR1_OFFSET, ccmr1);
+  stm32_putreg32(priv, STM32_GTIM_CCMR1_OFFSET, ccmr1);
   stm32_putreg16(priv, STM32_GTIM_CCER_OFFSET, ccer);
 
   /* Set the Input Capture Prescaler value: Capture performed each time an
    * edge is detected on the capture input.
    */
 
-  ccmr1  = stm32_getreg16(priv, STM32_GTIM_CCMR1_OFFSET);
+  ccmr1  = stm32_getreg32(priv, STM32_GTIM_CCMR1_OFFSET);
   ccmr1 &= ~GTIM_CCMR1_IC1PSC_MASK;
   ccmr1 |= (GTIM_CCMR_ICPSC_NOPSC << GTIM_CCMR1_IC1PSC_SHIFT);
-  stm32_putreg16(priv, STM32_GTIM_CCMR1_OFFSET, ccmr1);
+  stm32_putreg32(priv, STM32_GTIM_CCMR1_OFFSET, ccmr1);
 
   /* TI2 Channel Configuration */
   /* Disable the Channel 2: Reset the CC2E Bit */
@@ -936,7 +846,7 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
   ccer &= ~GTIM_CCER_CC2E;
   stm32_putreg16(priv, STM32_GTIM_CCER_OFFSET, ccer);
 
-  ccmr1 = stm32_getreg16(priv, STM32_GTIM_CCMR1_OFFSET);
+  ccmr1 = stm32_getreg32(priv, STM32_GTIM_CCMR1_OFFSET);
   ccer  = stm32_getreg16(priv, STM32_GTIM_CCER_OFFSET);
 
   /* Select the Input IC2=TI2 and set the filter fSAMPLING=fDTS/4, N=6 */
@@ -952,21 +862,21 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
 
   /* Write to TIM CCMR1 and CCER registers */
 
-  stm32_putreg16(priv, STM32_GTIM_CCMR1_OFFSET, ccmr1);
+  stm32_putreg32(priv, STM32_GTIM_CCMR1_OFFSET, ccmr1);
   stm32_putreg16(priv, STM32_GTIM_CCER_OFFSET, ccer);
 
   /* Set the Input Capture Prescaler value: Capture performed each time an
    * edge is detected on the capture input.
    */
 
-  ccmr1  = stm32_getreg16(priv, STM32_GTIM_CCMR1_OFFSET);
+  ccmr1  = stm32_getreg32(priv, STM32_GTIM_CCMR1_OFFSET);
   ccmr1 &= ~GTIM_CCMR1_IC2PSC_MASK;
   ccmr1 |= (GTIM_CCMR_ICPSC_NOPSC << GTIM_CCMR1_IC2PSC_SHIFT);
-  stm32_putreg16(priv, STM32_GTIM_CCMR1_OFFSET, ccmr1);
+  stm32_putreg32(priv, STM32_GTIM_CCMR1_OFFSET, ccmr1);
 
   /* Disable the update interrupt */
 
-  dier = stm32_getreg16(priv, STM32_GTIM_DIER_OFFSET);
+  dier  = stm32_getreg16(priv, STM32_GTIM_DIER_OFFSET);
   dier &= ~GTIM_DIER_UIE;
   stm32_putreg16(priv, STM32_GTIM_DIER_OFFSET, dier);
 
@@ -979,7 +889,7 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
     {
       /* Attach the interrupt handler */
 
-      ret = irq_attach(priv->config->irq, priv->config->handler);
+      ret = irq_attach(priv->config->irq, stm32_interrupt, priv);
       if (ret < 0)
         {
           stm32_shutdown(lower);
@@ -1029,6 +939,8 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
   cr1 |= GTIM_CR1_CEN;
   stm32_putreg16(priv, STM32_GTIM_CR1_OFFSET, cr1);
 
+  stm32_dumpregs(priv, "After setup");
+
   return OK;
 }
 
@@ -1125,9 +1037,13 @@ static int stm32_shutdown(FAR struct qe_lowerhalf_s *lower)
   putreg32(regval, regaddr);
   leave_critical_section(flags);
 
-  snvdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
+  sninfo("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
   stm32_dumpregs(priv, "After stop");
 
+  /* Disable clocking to the timer */
+
+  modifyreg32(priv->config->regaddr, priv->config->enable, 0);
+
   /* Put the TI1 GPIO pin back to its default state */
 
   pincfg  = priv->config->ti1cfg & (GPIO_PORT_MASK | GPIO_PIN_MASK);
@@ -1203,7 +1119,7 @@ static int stm32_reset(FAR struct qe_lowerhalf_s *lower)
 #ifdef HAVE_16BIT_TIMERS
   irqstate_t flags;
 
-  snvdbg("Resetting position to zero\n");
+  sninfo("Resetting position to zero\n");
   DEBUGASSERT(lower && priv->inuse);
 
   /* Reset the timer and the counter.  Interrupts are disabled to make this atomic
@@ -1215,7 +1131,7 @@ static int stm32_reset(FAR struct qe_lowerhalf_s *lower)
   priv->position = 0;
   leave_critical_section(flags);
 #else
-  snvdbg("Resetting position to zero\n");
+  sninfo("Resetting position to zero\n");
   DEBUGASSERT(lower && priv->inuse);
 
   /* Reset the counter to zero */
@@ -1237,6 +1153,8 @@ static int stm32_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, unsigned long
 {
   /* No ioctl commands supported */
 
+  /* TODO add an IOCTL to control the encoder pulse count prescaler */
+
   return -ENOTTY;
 }
 
@@ -1270,7 +1188,7 @@ int stm32_qeinitialize(FAR const char *devpath, int tim)
   priv = stm32_tim2lower(tim);
   if (!priv)
     {
-      sndbg("TIM%d support not configured\n", tim);
+      snerr("ERROR: TIM%d support not configured\n", tim);
       return -ENXIO;
     }
 
@@ -1278,16 +1196,16 @@ int stm32_qeinitialize(FAR const char *devpath, int tim)
 
   if (priv->inuse)
     {
-      sndbg("TIM%d is in-used\n", tim);
+      snerr("ERROR: TIM%d is in-use\n", tim);
       return -EBUSY;
     }
 
-  /* Register the priv-half driver */
+  /* Register the upper-half driver */
 
   ret = qe_register(devpath, (FAR struct qe_lowerhalf_s *)priv);
   if (ret < 0)
     {
-      sndbg("qe_register failed: %d\n", ret);
+      snerr("ERROR: qe_register failed: %d\n", ret);
       return ret;
     }
 
diff --git a/arch/arm/src/stm32/stm32_rcc.c b/arch/arm/src/stm32/stm32_rcc.c
index 8040af9e1e6b0b1ff04a19637ce2f888c31d66cc..3cb57ae6a0e26c91c8c368a4f23c52c9c7c47cf0 100644
--- a/arch/arm/src/stm32/stm32_rcc.c
+++ b/arch/arm/src/stm32/stm32_rcc.c
@@ -1,8 +1,9 @@
 /****************************************************************************
  * arch/arm/src/stm32/stm32_rcc.c
  *
- *   Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2009, 2011-2012, 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -51,6 +52,7 @@
 
 #include "chip.h"
 #include "stm32_rcc.h"
+#include "stm32_rtc.h"
 #include "stm32_flash.h"
 #include "stm32.h"
 #include "stm32_waste.h"
@@ -66,10 +68,6 @@
 
 #define HSERDY_TIMEOUT (100 * CONFIG_BOARD_LOOPSPERMSEC)
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -84,6 +82,8 @@
 #  include "stm32f20xxx_rcc.c"
 #elif defined(CONFIG_STM32_STM32F30XX)
 #  include "stm32f30xxx_rcc.c"
+#elif defined(CONFIG_STM32_STM32F33XX)
+#  include "stm32f33xxx_rcc.c"
 #elif defined(CONFIG_STM32_STM32F37XX)
 #  include "stm32f37xxx_rcc.c"
 #elif defined(CONFIG_STM32_STM32F40XX)
@@ -92,21 +92,78 @@
 #  error "Unsupported STM32 chip"
 #endif
 
+#if defined(CONFIG_STM32_STM32L15XX)
+# define STM32_RCC_XXX       STM32_RCC_CSR
+# define RCC_XXX_YYYRST      RCC_CSR_RTCRST
+#else
+# define STM32_RCC_XXX       STM32_RCC_BDCR
+# define RCC_XXX_YYYRST      RCC_BDCR_BDRST
+#endif
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
-/************************************************************************************
+/****************************************************************************
+ * Name: rcc_resetbkp
+ *
+ * Description:
+ *   The RTC needs to reset the Backup Domain to change RTCSEL and resetting
+ *   the Backup Domain renders to disabling the LSE as consequence.   In order
+ *   to avoid resetting the Backup Domain when we already configured LSE we
+ *   will reset the Backup Domain early (here).
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_RTC) && defined(CONFIG_STM32_PWR) && !defined(CONFIG_STM32_STM32F10XX)
+static inline void rcc_resetbkp(void)
+{
+  uint32_t regval;
+
+  /* Check if the RTC is already configured */
+
+  stm32_pwr_initbkp(false);
+
+  regval = getreg32(RTC_MAGIC_REG);
+  if (regval != RTC_MAGIC)
+    {
+      stm32_pwr_enablebkp(true);
+
+      /* We might be changing RTCSEL - to ensure such changes work, we must
+       * reset the backup domain (having backed up the RTC_MAGIC token)
+       */
+
+      modifyreg32(STM32_RCC_XXX, 0, RCC_XXX_YYYRST);
+      modifyreg32(STM32_RCC_XXX, RCC_XXX_YYYRST, 0);
+
+      stm32_pwr_enablebkp(false);
+    }
+}
+#else
+#  define rcc_resetbkp()
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
  * Name: stm32_clockconfig
  *
  * Description:
- *   Called to establish the clock settings based on the values in board.h.  This
- *   function (by default) will reset most everything, enable the PLL, and enable
- *   peripheral clocking for all periperipherals enabled in the NuttX configuration
- *   file.
+ *   Called to establish the clock settings based on the values in board.h.
+ *   This function (by default) will reset most everything, enable the PLL,
+ *   and enable peripheral clocking for all peripherals enabled in the NuttX
+ *   configuration file.
  *
- *   If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then clocking will
- *   be enabled by an externally provided, board-specific function called
+ *   If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then clocking
+ *   will be enabled by an externally provided, board-specific function called
  *   stm32_board_clockconfig().
  *
  * Input Parameters:
@@ -115,7 +172,7 @@
  * Returned Value:
  *   None
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 void stm32_clockconfig(void)
 {
@@ -123,6 +180,10 @@ void stm32_clockconfig(void)
 
   rcc_reset();
 
+  /* Reset backup domain if appropriate */
+
+  rcc_resetbkp();
+
 #if defined(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG)
 
   /* Invoke Board Custom Clock Configuration */
@@ -185,4 +246,3 @@ void stm32_clockenable(void)
 #endif
 }
 #endif
-
diff --git a/arch/arm/src/stm32/stm32_rcc.h b/arch/arm/src/stm32/stm32_rcc.h
index a4939221e8f2e1c2a138e1be4792c40f1df1f38a..d331ab90b6429525f38a03ca46990bc2a621588b 100644
--- a/arch/arm/src/stm32/stm32_rcc.h
+++ b/arch/arm/src/stm32/stm32_rcc.h
@@ -53,6 +53,8 @@
 #  include "chip/stm32f20xxx_rcc.h"
 #elif defined(CONFIG_STM32_STM32F30XX)
 #  include "chip/stm32f30xxx_rcc.h"
+#elif defined(CONFIG_STM32_STM32F33XX)
+#  include "chip/stm32f33xxx_rcc.h"
 #elif defined(CONFIG_STM32_STM32F37XX)
 #  include "chip/stm32f37xxx_rcc.h"
 #elif defined(CONFIG_STM32_STM32F40XX)
diff --git a/arch/arm/src/stm32/stm32_rng.c b/arch/arm/src/stm32/stm32_rng.c
index 5726f43ef9c83dd3b0e10dd886e92ae40518e369..ccbbd96dd72ce689895e499919cf0a8f9b1aca5a 100644
--- a/arch/arm/src/stm32/stm32_rng.c
+++ b/arch/arm/src/stm32/stm32_rng.c
@@ -46,17 +46,22 @@
 
 #include 
 #include 
+#include 
+#include 
 
 #include "up_arch.h"
 #include "chip/stm32_rng.h"
 #include "up_internal.h"
 
+#if defined(CONFIG_STM32_RNG)
+#if defined(CONFIG_DEV_RANDOM) || defined(CONFIG_DEV_URANDOM_ARCH)
+
 /****************************************************************************
  * Private Function Prototypes
  ****************************************************************************/
 
-static int stm32_rnginitialize(void);
-static int stm32_interrupt(int irq, void *context);
+static int stm32_rng_initialize(void);
+static int stm32_interrupt(int irq, void *context, FAR void *arg);
 static void stm32_enable(void);
 static void stm32_disable(void);
 static ssize_t stm32_read(struct file *filep, char *buffer, size_t);
@@ -98,21 +103,21 @@ static const struct file_operations g_rngops =
  * Private functions
  ****************************************************************************/
 
-static int stm32_rnginitialize()
+static int stm32_rng_initialize()
 {
   uint32_t regval;
 
-  vdbg("Initializing RNG\n");
+  _info("Initializing RNG\n");
 
   memset(&g_rngdev, 0, sizeof(struct rng_dev_s));
 
   sem_init(&g_rngdev.rd_devsem, 0, 1);
 
-  if (irq_attach(STM32_IRQ_RNG, stm32_interrupt))
+  if (irq_attach(STM32_IRQ_RNG, stm32_interrupt, NULL))
     {
       /* We could not attach the ISR to the interrupt */
 
-      vdbg("Could not attach IRQ.\n");
+      _info("Could not attach IRQ.\n");
 
       return -EAGAIN;
     }
@@ -147,7 +152,7 @@ static void stm32_disable()
   putreg32(regval, STM32_RNG_CR);
 }
 
-static int stm32_interrupt(int irq, void *context)
+static int stm32_interrupt(int irq, void *context, FAR void *arg)
 {
   uint32_t rngsr;
   uint32_t data;
@@ -258,8 +263,52 @@ static ssize_t stm32_read(struct file *filep, char *buffer, size_t buflen)
  * Public Functions
  ****************************************************************************/
 
-void up_rnginitialize()
+/****************************************************************************
+ * Name: devrandom_register
+ *
+ * Description:
+ *   Initialize the RNG hardware and register the /dev/random driver.
+ *   Must be called BEFORE devurandom_register.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEV_RANDOM
+void devrandom_register(void)
+{
+  stm32_rng_initialize();
+  (void)register_driver("/dev/random", &g_rngops, 0444, NULL);
+}
+#endif
+
+/****************************************************************************
+ * Name: devurandom_register
+ *
+ * Description:
+ *   Register /dev/urandom
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEV_URANDOM_ARCH
+void devurandom_register(void)
 {
-  stm32_rnginitialize();
-  register_driver("/dev/random", &g_rngops, 0444, NULL);
+#ifndef CONFIG_DEV_RANDOM
+  stm32_rng_initialize();
+#endif
+  (void)register_driver("/dev/urandom", &g_rngops, 0444, NULL);
 }
+#endif
+
+#endif /* CONFIG_DEV_RANDOM || CONFIG_DEV_URANDOM_ARCH */
+#endif /* CONFIG_STM32_RNG */
diff --git a/arch/arm/src/stm32/stm32_rtc.c b/arch/arm/src/stm32/stm32_rtc.c
index 0080b78cd24e869bce115ee4ddb3e590c5d7d989..3e8dc0b0d78a7307ef170d810670cd6eb13cbda6 100644
--- a/arch/arm/src/stm32/stm32_rtc.c
+++ b/arch/arm/src/stm32/stm32_rtc.c
@@ -41,22 +41,6 @@
 
 #include "chip.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/arch/arm/src/stm32/stm32_rtc.h b/arch/arm/src/stm32/stm32_rtc.h
index 731cc2d3b8410b33b1bb67ccf664139535696456..119e5e54dfce5466d294e4a30e108faf69ebae1b 100644
--- a/arch/arm/src/stm32/stm32_rtc.h
+++ b/arch/arm/src/stm32/stm32_rtc.h
@@ -79,6 +79,17 @@
 #define STM32_RTC_PRESCALER_SECOND  32767  /* Default prescaler to get a second base */
 #define STM32_RTC_PRESCALER_MIN         1  /* Maximum speed of 16384 Hz */
 
+#if !defined(CONFIG_RTC_MAGIC)
+# define CONFIG_RTC_MAGIC           (0xfacefeee)
+#endif
+
+#if !defined(CONFIG_RTC_MAGIC_REG)
+# define CONFIG_RTC_MAGIC_REG       (0)
+#endif
+
+#define RTC_MAGIC                   CONFIG_RTC_MAGIC
+#define RTC_MAGIC_REG               STM32_RTC_BKR(CONFIG_RTC_MAGIC_REG)
+
 /****************************************************************************
  * Public Types
  ****************************************************************************/
diff --git a/arch/arm/src/stm32/stm32_rtcc.c b/arch/arm/src/stm32/stm32_rtcc.c
index 7d403ba50415f10e1c1081030fabb645b5558372..b7155854965cb572de63fc65e3209937c3253782 100644
--- a/arch/arm/src/stm32/stm32_rtcc.c
+++ b/arch/arm/src/stm32/stm32_rtcc.c
@@ -76,10 +76,6 @@
 #  error "CONFIG_STM32_PWR must selected to use this driver"
 #endif
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_RTC
-#endif
-
 #ifdef CONFIG_STM32_STM32L15XX
 #  if defined(CONFIG_RTC_HSECLOCK)
 #    error "RTC with HSE clock not yet implemented for STM32L15XXX"
@@ -88,20 +84,10 @@
 #  endif
 #endif
 
-#if !defined(CONFIG_RTC_MAGIC)
-# define CONFIG_RTC_MAGIC (0xfacefeee)
-#endif
-
-#if !defined(CONFIG_RTC_MAGIC_REG)
-# define CONFIG_RTC_MAGIC_REG (0)
-#endif
-
 /* Constants ************************************************************************/
 
 #define SYNCHRO_TIMEOUT  (0x00020000)
 #define INITMODE_TIMEOUT (0x00010000)
-#define RTC_MAGIC        CONFIG_RTC_MAGIC
-#define RTC_MAGIC_REG    STM32_RTC_BKR(CONFIG_RTC_MAGIC_REG)
 
 /* Proxy definitions to make the same code work for all the STM32 series ************/
 
@@ -123,24 +109,6 @@
 # define RCC_XXX_RTCSEL_HSE  RCC_BDCR_RTCSEL_HSE
 #endif
 
-/* Debug ****************************************************************************/
-
-#ifdef CONFIG_DEBUG_RTC
-#  define rtcdbg    dbg
-#  define rtcvdbg   vdbg
-#  define rtclldbg  lldbg
-#  define rtcllvdbg llvdbg
-#else
-#  define rtcdbg(x...)
-#  define rtcvdbg(x...)
-#  define rtclldbg(x...)
-#  define rtcllvdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Types
- ************************************************************************************/
-
 /************************************************************************************
  * Private Data
  ************************************************************************************/
@@ -176,30 +144,30 @@ volatile bool g_rtc_enabled = false;
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_RTC
+#ifdef CONFIG_DEBUG_RTC_INFO
 static void rtc_dumpregs(FAR const char *msg)
 {
-  rtclldbg("%s:\n", msg);
-  rtclldbg("      TR: %08x\n", getreg32(STM32_RTC_TR));
-  rtclldbg("      DR: %08x\n", getreg32(STM32_RTC_DR));
-  rtclldbg("      CR: %08x\n", getreg32(STM32_RTC_CR));
-  rtclldbg("     ISR: %08x\n", getreg32(STM32_RTC_ISR));
-  rtclldbg("    PRER: %08x\n", getreg32(STM32_RTC_PRER));
-  rtclldbg("    WUTR: %08x\n", getreg32(STM32_RTC_WUTR));
+  rtcinfo("%s:\n", msg);
+  rtcinfo("      TR: %08x\n", getreg32(STM32_RTC_TR));
+  rtcinfo("      DR: %08x\n", getreg32(STM32_RTC_DR));
+  rtcinfo("      CR: %08x\n", getreg32(STM32_RTC_CR));
+  rtcinfo("     ISR: %08x\n", getreg32(STM32_RTC_ISR));
+  rtcinfo("    PRER: %08x\n", getreg32(STM32_RTC_PRER));
+  rtcinfo("    WUTR: %08x\n", getreg32(STM32_RTC_WUTR));
 #ifndef CONFIG_STM32_STM32F30XX
-  rtclldbg("  CALIBR: %08x\n", getreg32(STM32_RTC_CALIBR));
+  rtcinfo("  CALIBR: %08x\n", getreg32(STM32_RTC_CALIBR));
 #endif
-  rtclldbg("  ALRMAR: %08x\n", getreg32(STM32_RTC_ALRMAR));
-  rtclldbg("  ALRMBR: %08x\n", getreg32(STM32_RTC_ALRMBR));
-  rtclldbg("  SHIFTR: %08x\n", getreg32(STM32_RTC_SHIFTR));
-  rtclldbg("    TSTR: %08x\n", getreg32(STM32_RTC_TSTR));
-  rtclldbg("    TSDR: %08x\n", getreg32(STM32_RTC_TSDR));
-  rtclldbg("   TSSSR: %08x\n", getreg32(STM32_RTC_TSSSR));
-  rtclldbg("    CALR: %08x\n", getreg32(STM32_RTC_CALR));
-  rtclldbg("   TAFCR: %08x\n", getreg32(STM32_RTC_TAFCR));
-  rtclldbg("ALRMASSR: %08x\n", getreg32(STM32_RTC_ALRMASSR));
-  rtclldbg("ALRMBSSR: %08x\n", getreg32(STM32_RTC_ALRMBSSR));
-  rtclldbg("MAGICREG: %08x\n", getreg32(RTC_MAGIC_REG));
+  rtcinfo("  ALRMAR: %08x\n", getreg32(STM32_RTC_ALRMAR));
+  rtcinfo("  ALRMBR: %08x\n", getreg32(STM32_RTC_ALRMBR));
+  rtcinfo("  SHIFTR: %08x\n", getreg32(STM32_RTC_SHIFTR));
+  rtcinfo("    TSTR: %08x\n", getreg32(STM32_RTC_TSTR));
+  rtcinfo("    TSDR: %08x\n", getreg32(STM32_RTC_TSDR));
+  rtcinfo("   TSSSR: %08x\n", getreg32(STM32_RTC_TSSSR));
+  rtcinfo("    CALR: %08x\n", getreg32(STM32_RTC_CALR));
+  rtcinfo("   TAFCR: %08x\n", getreg32(STM32_RTC_TAFCR));
+  rtcinfo("ALRMASSR: %08x\n", getreg32(STM32_RTC_ALRMASSR));
+  rtcinfo("ALRMBSSR: %08x\n", getreg32(STM32_RTC_ALRMBSSR));
+  rtcinfo("MAGICREG: %08x\n", getreg32(RTC_MAGIC_REG));
 }
 #else
 #  define rtc_dumpregs(msg)
@@ -219,16 +187,16 @@ static void rtc_dumpregs(FAR const char *msg)
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_RTC
+#ifdef CONFIG_DEBUG_RTC_INFO
 static void rtc_dumptime(FAR struct tm *tp, FAR const char *msg)
 {
-  rtclldbg("%s:\n", msg);
-  rtclldbg("  tm_sec: %08x\n", tp->tm_sec);
-  rtclldbg("  tm_min: %08x\n", tp->tm_min);
-  rtclldbg(" tm_hour: %08x\n", tp->tm_hour);
-  rtclldbg(" tm_mday: %08x\n", tp->tm_mday);
-  rtclldbg("  tm_mon: %08x\n", tp->tm_mon);
-  rtclldbg(" tm_year: %08x\n", tp->tm_year);
+  rtcinfo("%s:\n", msg);
+  rtcinfo("  tm_sec: %08x\n", tp->tm_sec);
+  rtcinfo("  tm_min: %08x\n", tp->tm_min);
+  rtcinfo(" tm_hour: %08x\n", tp->tm_hour);
+  rtcinfo(" tm_mday: %08x\n", tp->tm_mday);
+  rtcinfo("  tm_mon: %08x\n", tp->tm_mon);
+  rtcinfo(" tm_year: %08x\n", tp->tm_year);
 }
 #else
 #  define rtc_dumptime(tp, msg)
@@ -254,7 +222,7 @@ static void rtc_wprunlock(void)
    * registers and backup SRAM).
    */
 
-  (void)stm32_pwr_enablebkp(true);
+  stm32_pwr_enablebkp(true);
 
   /* The following steps are required to unlock the write protection on all the
    * RTC registers (except for RTC_ISR[13:8], RTC_TAFCR, and RTC_BKPxR).
@@ -293,7 +261,7 @@ static inline void rtc_wprlock(void)
    * registers and backup SRAM).
    */
 
-  (void)stm32_pwr_enablebkp(false);
+  stm32_pwr_enablebkp(false);
 }
 
 /************************************************************************************
@@ -630,17 +598,10 @@ int up_rtc_initialize(void)
 
   regval = getreg32(RTC_MAGIC_REG);
 
-  (void)stm32_pwr_enablebkp(true);
+  stm32_pwr_enablebkp(true);
 
   if (regval != RTC_MAGIC)
     {
-      /* We might be changing RTCSEL - to ensure such changes work, we must reset the
-       * backup domain (having backed up the RTC_MAGIC token)
-       */
-
-      modifyreg32(STM32_RCC_XXX, 0, RCC_XXX_YYYRST);
-      modifyreg32(STM32_RCC_XXX, RCC_XXX_YYYRST, 0);
-
       /* Some boards do not have the external 32khz oscillator installed, for those
        * boards we must fallback to the crummy internal RC clock or the external high
        * rate clock
@@ -712,7 +673,7 @@ int up_rtc_initialize(void)
         }
     }
 
-  (void)stm32_pwr_enablebkp(false);
+  stm32_pwr_enablebkp(false);
 
   /* Loop, attempting to initialize/resume the RTC.  This loop is necessary
    * because it seems that occasionally it takes longer to initialize the RTC
@@ -733,13 +694,13 @@ int up_rtc_initialize(void)
         {
           case OK:
             {
-              rtclldbg("rtc_syncwait() okay\n");
+              rtcinfo("rtc_syncwait() okay\n");
               break;
             }
 
           default:
             {
-              rtclldbg("rtc_syncwait() failed (%d)\n", ret);
+              rtcerr("ERROR: rtc_syncwait() failed (%d)\n", ret);
               break;
             }
         }
@@ -753,7 +714,7 @@ int up_rtc_initialize(void)
 
   if (regval != RTC_MAGIC)
     {
-      rtclldbg("Do setup\n");
+      rtcinfo("Do setup\n");
 
       /* Perform the one-time setup of the LSE clocking to the RTC */
 
@@ -763,15 +724,21 @@ int up_rtc_initialize(void)
        * backup data registers and backup SRAM).
        */
 
-      (void)stm32_pwr_enablebkp(true);
+      stm32_pwr_enablebkp(true);
 
       /* Remember that the RTC is initialized */
 
       putreg32(RTC_MAGIC, RTC_MAGIC_REG);
+
+      /* Disable write access to the backup domain (RTC registers, RTC
+       * backup data registers and backup SRAM).
+       */
+
+      stm32_pwr_enablebkp(false);
     }
   else
     {
-      rtclldbg("Do resume\n");
+      rtcinfo("Do resume\n");
 
       /* RTC already set-up, just resume normal operation */
 
@@ -779,16 +746,10 @@ int up_rtc_initialize(void)
       rtc_dumpregs("Did resume");
     }
 
-  /* Disable write access to the backup domain (RTC registers, RTC backup
-   * data registers and backup SRAM).
-   */
-
-  (void)stm32_pwr_enablebkp(false);
-
   if (ret != OK && nretry > 0)
     {
-      rtclldbg("setup/resume ran %d times and failed with %d\n",
-                nretry, ret);
+      rtcinfo("setup/resume ran %d times and failed with %d\n",
+              nretry, ret);
       return -ETIMEDOUT;
     }
 
@@ -807,7 +768,7 @@ int up_rtc_initialize(void)
 
   /* Then attach the ALARM interrupt handler */
 
-  irq_attach(STM32_IRQ_RTC_WKUP, rtc_interrupt);
+  irq_attach(STM32_IRQ_RTC_WKUP, rtc_interrupt, NULL);
   up_enable_irq(STM32_IRQ_RTC_WKUP);
 #endif
 
diff --git a/arch/arm/src/stm32/stm32_rtcounter.c b/arch/arm/src/stm32/stm32_rtcounter.c
index 8156de0a6041fdc32623c7d0347a584a8dc3acd7..9a046f8318c7cbb0d01b73724bd4ceee64bdd950 100644
--- a/arch/arm/src/stm32/stm32_rtcounter.c
+++ b/arch/arm/src/stm32/stm32_rtcounter.c
@@ -324,7 +324,7 @@ static inline void stm32_rtc_breakout(FAR const struct timespec *tp,
  ************************************************************************************/
 
 #if defined(CONFIG_RTC_HIRES) || defined(CONFIG_RTC_ALARM)
-static int stm32_rtc_interrupt(int irq, void *context)
+static int stm32_rtc_interrupt(int irq, void *context, FAR void *arg)
 {
   uint16_t source = getreg16(STM32_RTC_CRL);
 
@@ -377,14 +377,13 @@ int up_rtc_initialize(void)
    * registers and backup SRAM).
    */
 
-  (void)stm32_pwr_enablebkp(true);
-
-  /* Set access to the peripheral, enable the backup domain (BKP) and the lower
-   * power external 32,768Hz (Low-Speed External, LSE) oscillator.  Configure the
-   * LSE to drive the RTC.
-   */
-
-  stm32_rcc_enablelse();
+  stm32_pwr_enablebkp(true);
+  
+  /* Select the lower power external 32,768Hz (Low-Speed External, LSE) oscillator
+   * as RTC Clock Source and enable the Clock */
+  
+  modifyreg16(STM32_RCC_BDCR, RCC_BDCR_RTCSEL_MASK, RCC_BDCR_RTCSEL_LSE);
+  modifyreg16(STM32_RCC_BDCR, 0, RCC_BDCR_RTCEN);
 
   /* TODO: Get state from this function, if everything is
    *   okay and whether it is already enabled (if it was disabled
@@ -407,7 +406,7 @@ int up_rtc_initialize(void)
   /* Configure RTC interrupt to catch overflow and alarm interrupts. */
 
 #if defined(CONFIG_RTC_HIRES) || defined(CONFIG_RTC_ALARM)
-  irq_attach(STM32_IRQ_RTC, stm32_rtc_interrupt);
+  irq_attach(STM32_IRQ_RTC, stm32_rtc_interrupt, NULL);
   up_enable_irq(STM32_IRQ_RTC);
 #endif
 
@@ -428,7 +427,7 @@ int up_rtc_initialize(void)
    * registers and backup SRAM).
    */
 
-  (void)stm32_pwr_enablebkp(false);
+  stm32_pwr_enablebkp(false);
 
   return OK;
 }
@@ -605,7 +604,7 @@ int up_rtc_settime(FAR const struct timespec *tp)
   /* Enable write access to the backup domain */
 
   flags = enter_critical_section();
-  (void)stm32_pwr_enablebkp(true);
+  stm32_pwr_enablebkp(true);
 
   /* Then write the broken out values to the RTC counter and BKP overflow register
    * (hi-res mode only)
@@ -625,7 +624,7 @@ int up_rtc_settime(FAR const struct timespec *tp)
   putreg16(regvals.ovf, RTC_TIMEMSB_REG);
 #endif
 
-  (void)stm32_pwr_enablebkp(false);
+  stm32_pwr_enablebkp(false);
   leave_critical_section(flags);
   return OK;
 }
diff --git a/arch/arm/src/stm32/stm32_sdadc.c b/arch/arm/src/stm32/stm32_sdadc.c
new file mode 100644
index 0000000000000000000000000000000000000000..67a769801bbeb2557fae1b29488822bae8d5166f
--- /dev/null
+++ b/arch/arm/src/stm32/stm32_sdadc.c
@@ -0,0 +1,1378 @@
+/****************************************************************************
+ * arch/arm/src/stm32/stm32_sdadc.c
+ *
+ *   Copyright (C) 2011, 2013, 2015-2017 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Studelec. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            Marc Rechté 
+ *
+ * derived from arch/arm/src/stm32/stm32_adc.c
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "up_internal.h"
+#include "up_arch.h"
+
+#include "chip.h"
+#include "stm32.h"
+#include "stm32_dma.h"
+#include "stm32_pwr.h"
+#include "stm32_sdadc.h"
+
+#ifdef CONFIG_STM32_SDADC
+
+/* Some SDADC peripheral must be enabled */
+
+#if defined(CONFIG_STM32_SDADC1) || defined(CONFIG_STM32_SDADC2) || \
+    defined(CONFIG_STM32_SDADC3)
+
+/* This implementation is for the STM32F37XX only */
+
+#ifndef CONFIG_STM32_STM32F37XX
+#  error "This chip is not yet supported"
+#endif
+
+/* TODO: At the moment there is no implementation 
+   for timer and external triggers */
+
+#if defined(SDADC_HAVE_TIMER)
+#  error "There is no proper implementation for TIMER TRIGGERS at the moment"
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* RCC reset ****************************************************************/
+
+#define STM32_RCC_RSTR   STM32_RCC_APB2RSTR
+#define RCC_RSTR_SDADC1RST RCC_APB2RSTR_SDADC1RST
+#define RCC_RSTR_SDADC2RST RCC_APB2RSTR_SDADC2RST
+#define RCC_RSTR_SDADC3RST RCC_APB2RSTR_SDADC3RST
+
+/* SDADC interrupts *********************************************************/
+
+#define SDADC_ISR_ALLINTS (SDADC_ISR_JEOCF | SDADC_ISR_JOVRF)
+
+/* SDADC Channels/DMA *******************************************************/
+
+
+#define SDADC_DMA_CONTROL_WORD (DMA_CCR_MSIZE_16BITS | \
+                                DMA_CCR_PSIZE_16BITS | \
+                                DMA_CCR_MINC | \
+                                DMA_CCR_CIRC)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* This structure describes the state of one SDADC block */
+
+struct stm32_dev_s
+{
+  FAR const struct adc_callback_s *cb;
+  uint8_t irq;          /* Interrupt generated by this SDADC block */
+  uint8_t nchannels;    /* Number of channels */
+  uint8_t cchannels;    /* Number of configured channels */
+  uint8_t intf;         /* SDADC interface number */
+  uint8_t current;      /* Current SDADC channel being converted */
+  uint8_t refv;         /* Reference voltage selection */
+#ifdef SDADC_HAVE_DMA
+  uint8_t dmachan;      /* DMA channel needed by this SDADC */
+  bool    hasdma;       /* True: This channel supports DMA */
+#endif
+#ifdef SDADC_HAVE_TIMER
+  uint8_t trigger;      /* Timer trigger selection: see SDADCx_JEXTSEL_TIMxx */
+#endif
+  uint32_t base;        /* Base address of registers unique to this SDADC
+                         * block */
+#ifdef SDADC_HAVE_TIMER
+  uint32_t tbase;       /* Base address of timer used by this SDADC block */
+  uint32_t jextsel      /* JEXTSEL value used by this SDADC block */
+  uint32_t pclck;       /* The PCLK frequency that drives this timer */
+  uint32_t freq;        /* The desired frequency of conversions */
+#endif
+#ifdef SDADC_HAVE_DMA
+  DMA_HANDLE dma;       /* Allocated DMA channel */
+
+  /* DMA transfer buffer */
+
+  int16_t dmabuffer[SDADC_MAX_SAMPLES];
+#endif
+
+  /* List of selected SDADC injected channels to sample */
+
+  uint8_t  chanlist[SDADC_MAX_SAMPLES];
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* ADC Register access */
+
+static uint32_t sdadc_getreg(FAR struct stm32_dev_s *priv, int offset);
+static void     sdadc_putreg(FAR struct stm32_dev_s *priv, int offset,
+                             uint32_t value);
+static void     sdadc_modifyreg(FAR struct stm32_dev_s *priv, int offset,
+                                uint32_t clrbits, uint32_t setbits);
+#ifdef ADC_HAVE_TIMER
+static uint16_t tim_getreg(FAR struct stm32_dev_s *priv, int offset);
+static void     tim_putreg(FAR struct stm32_dev_s *priv, int offset,
+                           uint16_t value);
+static void     tim_modifyreg(FAR struct stm32_dev_s *priv, int offset,
+                              uint16_t clrbits, uint16_t setbits);
+static void     tim_dumpregs(FAR struct stm32_dev_s *priv,
+                             FAR const char *msg);
+#endif
+
+static void sdadc_rccreset(FAR struct stm32_dev_s *priv, bool reset);
+
+/* ADC Interrupt Handler */
+
+static int  sdadc_interrupt(int irq, FAR void *context, FAR void *arg);
+
+/* ADC Driver Methods */
+
+static int  sdadc_bind(FAR struct adc_dev_s *dev,
+                       FAR const struct adc_callback_s *callback);
+static void sdadc_reset(FAR struct adc_dev_s *dev);
+static int  sdadc_setup(FAR struct adc_dev_s *dev);
+static void sdadc_shutdown(FAR struct adc_dev_s *dev);
+static void sdadc_rxint(FAR struct adc_dev_s *dev, bool enable);
+static int  sdadc_ioctl(FAR struct adc_dev_s *dev, int cmd,
+                        unsigned long arg);
+static void sdadc_enable(FAR struct stm32_dev_s *priv, bool enable);
+
+static int  sdadc_set_ch(FAR struct adc_dev_s *dev, uint8_t ch);
+
+#ifdef ADC_HAVE_TIMER
+static void sdadc_timstart(FAR struct stm32_dev_s *priv, bool enable);
+static int  sdadc_timinit(FAR struct stm32_dev_s *priv);
+#endif
+
+#ifdef ADC_HAVE_DMA
+static void sdadc_dmaconvcallback(DMA_HANDLE handle, uint8_t isr,
+                                  FAR void *arg);
+#endif
+
+static void sdadc_startconv(FAR struct stm32_dev_s *priv, bool enable);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* SDADC interface operations */
+
+static const struct adc_ops_s g_sdadcops =
+{
+  .ao_bind        = sdadc_bind,
+  .ao_reset       = sdadc_reset,
+  .ao_setup       = sdadc_setup,
+  .ao_shutdown    = sdadc_shutdown,
+  .ao_rxint       = sdadc_rxint,
+  .ao_ioctl       = sdadc_ioctl,
+};
+
+/* SDADC1 state */
+
+#ifdef CONFIG_STM32_SDADC1
+static struct stm32_dev_s g_sdadcpriv1 =
+{
+  .irq         = STM32_IRQ_SDADC1,
+  .intf        = 1,
+  .base        = STM32_SDADC1_BASE,
+  .refv        = SDADC1_REFV,
+#ifdef SDADC1_HAVE_TIMER
+  .trigger     = CONFIG_STM32_SDADC1_TIMTRIG,
+  .tbase       = SDADC1_TIMER_BASE,
+  .extsel      = SDADC1_EXTSEL_VALUE,
+  .pclck       = SDADC1_TIMER_PCLK_FREQUENCY,
+  .freq        = CONFIG_STM32_SDADC1_SAMPLE_FREQUENCY,
+#endif
+#ifdef SDADC1_HAVE_DMA
+  .dmachan     = DMACHAN_SDADC1,
+  .hasdma      = true,
+#endif
+};
+
+static struct adc_dev_s g_sdadcdev1 =
+{
+  .ad_ops      = &g_sdadcops,
+  .ad_priv     = &g_sdadcpriv1,
+};
+#endif
+
+/* SDADC2 state */
+
+#ifdef CONFIG_STM32_SDADC2
+static struct stm32_dev_s g_sdadcpriv2 =
+{
+  .irq         = STM32_IRQ_SDADC2,
+  .base        = STM32_SDADC2_BASE,
+  .refv        = SDADC2_REFV,
+#ifdef SDADC2_HAVE_TIMER
+  .trigger     = CONFIG_STM32_SDADC2_TIMTRIG,
+  .tbase       = SDADC2_TIMER_BASE,
+  .extsel      = SDADC2_EXTSEL_VALUE,
+  .pclck       = SDADC2_TIMER_PCLK_FREQUENCY,
+  .freq        = CONFIG_STM32_SDADC2_SAMPLE_FREQUENCY,
+#endif
+#ifdef SDADC2_HAVE_DMA
+  .dmachan     = DMACHAN_SDADC2,
+  .hasdma      = true,
+#endif
+};
+
+static struct adc_dev_s g_sdadcdev2 =
+{
+  .ad_ops      = &g_sdadcops,
+  .ad_priv     = &g_sdadcpriv2,
+};
+#endif
+
+/* SDADC3 state */
+
+#ifdef CONFIG_STM32_SDADC3
+static struct stm32_dev_s g_sdadcpriv3 =
+{
+  .irq         = STM32_IRQ_SDADC3,
+  .base        = STM32_SDADC3_BASE,
+  .refv        = SDADC3_REFV,
+#ifdef SDADC3_HAVE_TIMER
+  .trigger     = CONFIG_STM32_SDADC3_TIMTRIG,
+  .tbase       = SDADC3_TIMER_BASE,
+  .extsel      = SDADC3_EXTSEL_VALUE,
+  .pclck       = SDADC3_TIMER_PCLK_FREQUENCY,
+  .freq        = CONFIG_STM32_SDADC3_SAMPLE_FREQUENCY,
+#endif
+#ifdef SDADC3_HAVE_DMA
+  .dmachan     = DMACHAN_SDADC3,
+  .hasdma      = true,
+#endif
+};
+
+static struct adc_dev_s g_sdadcdev3 =
+{
+  .ad_ops      = &g_sdadcops,
+  .ad_priv     = &g_sdadcpriv3,
+};
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sdadc_getreg
+ *
+ * Description:
+ *   Read the value of an SDADC register.
+ *
+ * Input Parameters:
+ *   priv   - A reference to the SDADC block state
+ *   offset - The offset to the register to read
+ *
+ * Returned Value:
+ *   The current contents of the specified register
+ *
+ ****************************************************************************/
+
+static uint32_t sdadc_getreg(FAR struct stm32_dev_s *priv, int offset)
+{
+  return getreg32(priv->base + offset);
+}
+
+/****************************************************************************
+ * Name: sdadc_putreg
+ *
+ * Description:
+ *   Write a value to an SDADC register.
+ *
+ * Input Parameters:
+ *   priv   - A reference to the SDADC block state
+ *   offset - The offset to the register to write to
+ *   value  - The value to write to the register
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void sdadc_putreg(FAR struct stm32_dev_s *priv, int offset,
+                       uint32_t value)
+{
+  putreg32(value, priv->base + offset);
+}
+
+/****************************************************************************
+ * Name: sdadc_modifyreg
+ *
+ * Description:
+ *   Modify the value of an SDADC register (not atomic).
+ *
+ * Input Parameters:
+ *   priv   - A reference to the SDADC block state
+ *   offset  - The offset to the register to modify
+ *   clrbits - The bits to clear
+ *   setbits - The bits to set
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void sdadc_modifyreg(FAR struct stm32_dev_s *priv, int offset,
+                          uint32_t clrbits, uint32_t setbits)
+{
+  sdadc_putreg(priv, offset, (sdadc_getreg(priv, offset) & ~clrbits) | setbits);
+}
+
+/****************************************************************************
+ * Name: tim_getreg
+ *
+ * Description:
+ *   Read the value of an SDADC timer register.
+ *
+ * Input Parameters:
+ *   priv   - A reference to the SDADC block state
+ *   offset - The offset to the register to read
+ *
+ * Returned Value:
+ *   The current contents of the specified register
+ *
+ ****************************************************************************/
+
+#ifdef SDADC_HAVE_TIMER
+static uint16_t tim_getreg(FAR struct stm32_dev_s *priv, int offset)
+{
+  return getreg16(priv->tbase + offset);
+}
+#endif
+
+/****************************************************************************
+ * Name: tim_putreg
+ *
+ * Description:
+ *   Write a value to an SDADC timer register.
+ *
+ * Input Parameters:
+ *   priv   - A reference to the SDADC block state
+ *   offset - The offset to the register to write to
+ *   value  - The value to write to the register
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef SDADC_HAVE_TIMER
+static void tim_putreg(FAR struct stm32_dev_s *priv, int offset,
+                       uint16_t value)
+{
+  putreg16(value, priv->tbase + offset);
+}
+#endif
+
+/****************************************************************************
+ * Name: tim_modifyreg
+ *
+ * Description:
+ *   Modify the value of an SDADC timer register (not atomic).
+ *
+ * Input Parameters:
+ *   priv   - A reference to the SDADC block state
+ *   offset  - The offset to the register to modify
+ *   clrbits - The bits to clear
+ *   setbits - The bits to set
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef SDADC_HAVE_TIMER
+static void tim_modifyreg(FAR struct stm32_dev_s *priv, int offset,
+                          uint16_t clrbits, uint16_t setbits)
+{
+  tim_putreg(priv, offset, (tim_getreg(priv, offset) & ~clrbits) | setbits);
+}
+#endif
+
+/****************************************************************************
+ * Name: tim_dumpregs
+ *
+ * Description:
+ *   Dump all timer registers.
+ *
+ * Input parameters:
+ *   priv   - A reference to the SDADC block state
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef SDADC_HAVE_TIMER
+static void tim_dumpregs(FAR struct stm32_dev_s *priv, FAR const char *msg)
+{
+  ainfo("%s:\n", msg);
+
+  /* TODO */
+}
+#endif
+
+/****************************************************************************
+ * Name: sdadc_timstart
+ *
+ * Description:
+ *   Start (or stop) the timer counter
+ *
+ * Input Parameters:
+ *   priv   - A reference to the SDADC block state
+ *   enable - True: Start conversion
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+#ifdef SDADC_HAVE_TIMER
+static void sdadc_timstart(FAR struct stm32_dev_s *priv, bool enable)
+{
+  ainfo("enable: %d\n", enable ? 1 : 0);
+
+  if (enable)
+    {
+      /* Start the counter */
+
+      tim_modifyreg(priv, STM32_GTIM_CR1_OFFSET, 0, GTIM_CR1_CEN);
+    }
+  else
+    {
+      /* Disable the counter */
+
+      tim_modifyreg(priv, STM32_GTIM_CR1_OFFSET, GTIM_CR1_CEN, 0);
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: sdadc_timinit
+ *
+ * Description:
+ *   Initialize the timer that drivers the SDADC sampling for this channel
+ *   using the pre-calculated timer divider definitions.
+ *
+ * Input Parameters:
+ *   priv   - A reference to the SDADC block state
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+#ifdef SDADC_HAVE_TIMER
+static int sdadc_timinit(FAR struct stm32_dev_s *priv)
+{
+  /* TODO */
+
+  aerr("ERROR: not implemented");
+  return ERROR;
+}
+#endif
+
+/****************************************************************************
+ * Name: sdadc_startconv
+ *
+ * Description:
+ *   Start (or stop) the SDADC conversion process
+ *
+ * Input Parameters:
+ *   priv   - A reference to the SDADC block state
+ *   enable - True: Start conversion
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+static void sdadc_startconv(FAR struct stm32_dev_s *priv, bool enable)
+{
+  ainfo("enable: %d\n", enable ? 1 : 0);
+
+  if (enable)
+    {
+      /* Start the conversion of injected channels */
+
+      sdadc_modifyreg(priv, STM32_SDADC_CR2_OFFSET, 0, SDADC_CR2_JSWSTART);
+    }
+  else
+    {
+      /* Wait for a possible conversion to stop */
+
+      while ((sdadc_getreg(priv, STM32_SDADC_ISR_OFFSET) & SDADC_ISR_JCIP) != 0);
+    }
+}
+
+/****************************************************************************
+ * Name: sdadc_rccreset
+ *
+ * Description:
+ *   (De)Initializes the SDADC block registers to their default
+ *   reset values.
+ *
+ * Input Parameters:
+ *   priv   - A reference to the SDADC block state
+ *   reset  - true: to put in reset state, false: to revert to normal state
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+static void sdadc_rccreset(FAR struct stm32_dev_s *priv, bool reset)
+{
+  uint32_t adcbit;
+
+  /* Pick the appropriate bit in the APB2 reset register.
+   */
+
+  switch (priv->intf)
+    {
+#ifdef CONFIG_STM32_SDADC1
+      case 1:
+        adcbit = RCC_RSTR_SDADC1RST;
+        break;
+#endif
+#ifdef CONFIG_STM32_SDADC2
+      case 2:
+        adcbit = RCC_RSTR_SDADC2RST;
+        break;
+#endif
+#ifdef CONFIG_STM32_SDADC3
+      case 3:
+        adcbit = RCC_RSTR_SDADC3RST;
+        break;
+#endif
+      default:
+        return;
+    }
+
+  /* Set or clear the selected bit in the APB2 reset register.
+   * modifyreg32() disables interrupts.  Disabling interrupts is necessary
+   * because the APB2RSTR register is used by several different drivers.
+   */
+
+  if (reset)
+    {
+      /* Enable SDADC reset state */
+
+      modifyreg32(STM32_RCC_RSTR, 0, adcbit);
+    }
+  else
+    {
+      /* Release SDADC from reset state */
+
+      modifyreg32(STM32_RCC_RSTR, adcbit, 0);
+    }
+}
+
+/****************************************************************************
+ * Name: sdadc_power_down_idle
+ *
+ * Description    : Enables or disables power down during the idle phase.
+ *
+ * Input Parameters:
+ *   priv     - A reference to the SDADC block state
+ *   pdi_high - true:  The SDADC is powered down when waiting for a start event
+ *              false: The SDADC is powered up when waiting for a start event
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+#if 0 
+static void sdadc_power_down_idle(FAR struct stm32_dev_s *priv, bool pdi_high)
+{
+  uint32_t regval;
+
+  ainfo("PDI: %d\n", pdi_high ? 1 : 0);
+
+  regval = sdadc_getreg(priv, STM32_SDADC_CR2_OFFSET);
+
+  if ((regval & SDADC_CR2_ADON) == 0)
+    {
+      regval = sdadc_getreg(priv, STM32_SDADC_CR1_OFFSET);
+      if (pdi_high)
+        {
+          regval |= SDADC_CR1_PDI;
+        }
+      else
+        {
+          regval &= ~SDADC_CR1_PDI;
+        }
+
+      sdadc_putreg(priv, STM32_SDADC_CR1_OFFSET, regval);
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: sdadc_enable
+ *
+ * Description    : Enables or disables the specified SDADC peripheral.
+ *                  Does not start conversion unless the SDADC is
+ *                  triggered by timer
+ *
+ * Input Parameters:
+ *   priv   - A reference to the SDADC block state
+ *   enable - true:  enable SDADC conversion
+ *            false: disable SDADC conversion
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+static void sdadc_enable(FAR struct stm32_dev_s *priv, bool enable)
+{
+  uint32_t regval;
+
+  ainfo("enable: %d\n", enable ? 1 : 0);
+
+  regval = sdadc_getreg(priv, STM32_SDADC_CR2_OFFSET);
+
+  if (enable)
+    {
+      /* Enable the SDADC */
+
+      sdadc_putreg(priv, STM32_SDADC_CR2_OFFSET, regval | SDADC_CR2_ADON);
+
+      /* Wait for the SDADC to be stabilized */
+
+      while (sdadc_getreg(priv, STM32_SDADC_ISR_OFFSET) & SDADC_ISR_STABIP);
+    }
+  else if ((regval & SDADC_CR2_ADON) != 0)
+    {
+      /* Ongoing conversions will be stopped implicitly */
+
+      /* Disable the SDADC */
+
+      sdadc_putreg(priv, STM32_SDADC_CR2_OFFSET, regval & ~SDADC_CR2_ADON);
+
+    }
+}
+
+/****************************************************************************
+ * Name: sdadc_dmaconvcallback
+ *
+ * Description:
+ *   Callback for DMA.  Called from the DMA transfer complete interrupt after
+ *   all channels have been converted and transferred with DMA.
+ *
+ * Input Parameters:
+ *   handle - handle to DMA
+ *   isr -
+ *   arg - SDADC device
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+#ifdef SDADC_HAVE_DMA
+static void sdadc_dmaconvcallback(DMA_HANDLE handle, uint8_t isr, FAR void *arg)
+{
+  FAR struct adc_dev_s   *dev  = (FAR struct adc_dev_s *)arg;
+  FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
+  int i;
+
+  /* Verify that the upper-half driver has bound its callback functions */
+
+  if (priv->cb != NULL)
+    {
+      DEBUGASSERT(priv->cb->au_receive != NULL);
+
+      for (i = 0; i < priv->nchannels; i++)
+        {
+          priv->cb->au_receive(dev, priv->chanlist[priv->current],
+                               priv->dmabuffer[priv->current]);
+          priv->current++;
+          if (priv->current >= priv->nchannels)
+            {
+              /* Restart the conversion sequence from the beginning */
+
+              priv->current = 0;
+            }
+        }
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: sdadc_bind
+ *
+ * Description:
+ *   Bind the upper-half driver callbacks to the lower-half implementation.
+ *   This must be called early in order to receive SDADC event notifications.
+ *
+ ****************************************************************************/
+
+static int sdadc_bind(FAR struct adc_dev_s *dev,
+                    FAR const struct adc_callback_s *callback)
+{
+  FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
+
+  DEBUGASSERT(priv != NULL);
+  priv->cb = callback;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: sdadc_reset
+ *
+ * Description:
+ *   Reset the SDADC device.
+ *   This is firstly called whenever the SDADC device is registered by
+ *   sdadc_register()
+ *   Does mostly the SDAC register setting.
+ *   Leave the device in power down mode.
+ *   Note that SDACx clock is already enable (for all SDADC) by the 
+ *   rcc_enableapb2()
+ *
+ * Input Parameters:
+ *   dev     - pointer to the sdadc device structure
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+static void sdadc_reset(FAR struct adc_dev_s *dev)
+{
+  FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
+  irqstate_t flags;
+  uint32_t setbits = 0;
+
+  ainfo("intf: %d\n", priv->intf);
+
+  /* TODO: why critical ? */
+
+  flags = enter_critical_section();
+
+  /* Enable SDADC reset state */
+
+  sdadc_rccreset(priv, true);
+
+  /* Enable power */
+
+  stm32_pwr_enablesdadc(priv->intf);
+
+  /* Release SDADC from reset state */
+
+  sdadc_rccreset(priv, false);
+
+  /* Enable the SDADC (and wait it stabilizes) */
+
+  sdadc_enable(priv, true);
+
+  /* Put SDADC in in initialization mode */
+
+  sdadc_putreg(priv, STM32_SDADC_CR1_OFFSET, SDADC_CR1_INIT);
+
+  /* Wait for the SDADC to be ready */
+
+  while ((sdadc_getreg(priv, STM32_SDADC_ISR_OFFSET) & SDADC_ISR_INITRDY) == 0);
+
+  /* Load configurations */
+
+  sdadc_putreg(priv, STM32_SDADC_CONF0R_OFFSET, SDADC_CONF0R_DEFAULT);
+  sdadc_putreg(priv, STM32_SDADC_CONF1R_OFFSET, SDADC_CONF1R_DEFAULT);
+  sdadc_putreg(priv, STM32_SDADC_CONF2R_OFFSET, SDADC_CONF2R_DEFAULT);
+
+  sdadc_putreg(priv, STM32_SDADC_CONFCHR1_OFFSET, SDADC_CONFCHR1_DEFAULT);
+  sdadc_putreg(priv, STM32_SDADC_CONFCHR2_OFFSET, SDADC_CONFCHR2_DEFAULT);
+
+  /* Configuration of the injected channels group */
+
+  sdadc_set_ch(dev, 0);
+
+  /* CR1 ********************************************************************/
+
+  /* Enable interrupt / dma flags, is done later by upper half when opening
+   * device by calling sdadc_rxint()
+   */
+
+  setbits = SDADC_CR1_INIT; /* remains in init mode while configuring */
+
+  /* Reference voltage */
+
+  setbits |= priv->refv;
+
+  /* Set CR1 configuration */
+
+  sdadc_putreg(priv, STM32_SDADC_CR1_OFFSET, setbits);
+
+  /* CR2 ********************************************************************/
+
+  setbits = SDADC_CR2_ADON; // leave it ON !
+
+  /* TODO: JEXTEN / JEXTSEL */
+
+  /* Number of calibrations is for 3 configurations */
+  
+  setbits |= (2 << SDADC_CR2_CALIBCNT_SHIFT);
+
+  /* Set CR2 configuration */
+
+  sdadc_putreg(priv, STM32_SDADC_CR2_OFFSET, setbits);
+
+  /* Release INIT mode ******************************************************/
+
+  sdadc_modifyreg(priv, STM32_SDADC_CR1_OFFSET, SDADC_CR1_INIT, 0);
+
+  /* Calibrate the SDADC */
+
+  sdadc_modifyreg(priv, STM32_SDADC_CR2_OFFSET, 0, SDADC_CR2_STARTCALIB);
+
+  /* Wait for the calibration to complete (may take up to 5ms) */
+
+  while ((sdadc_getreg(priv, STM32_SDADC_ISR_OFFSET) & SDADC_ISR_EOCALF) == 0);
+
+  /* Clear this flag */
+
+  sdadc_modifyreg(priv, STM32_SDADC_CLRISR_OFFSET, SDADC_CLRISR_CLREOCALF, 0);
+
+#ifdef SDADC_HAVE_TIMER
+  if (priv->tbase != 0)
+    {
+      ret = sdadc_timinit(priv);
+      if (ret < 0)
+        {
+          aerr("ERROR: sdadc_timinit failed: %d\n", ret);
+        }
+    }
+#endif
+
+  /* Put the device in low power mode until it is actually used by
+   * application code.
+   */
+
+  sdadc_enable(priv, false);
+
+  leave_critical_section(flags);
+
+  ainfo("CR1:  0x%08x CR2:  0x%08x\n",
+        sdadc_getreg(priv, STM32_SDADC_CR1_OFFSET),
+        sdadc_getreg(priv, STM32_SDADC_CR2_OFFSET));
+
+  ainfo("CONF0R: 0x%08x CONF1R: 0x%08x CONF3R: 0x%08x\n",
+        sdadc_getreg(priv, STM32_SDADC_CONF0R_OFFSET),
+        sdadc_getreg(priv, STM32_SDADC_CONF1R_OFFSET),
+        sdadc_getreg(priv, STM32_SDADC_CONF2R_OFFSET));
+
+  ainfo("CONFCHR1: 0x%08x CONFCHR2: 0x%08x JCHGR: 0x%08x\n",
+        sdadc_getreg(priv, STM32_SDADC_CONFCHR1_OFFSET),
+        sdadc_getreg(priv, STM32_SDADC_CONFCHR2_OFFSET),
+        sdadc_getreg(priv, STM32_SDADC_JCHGR_OFFSET));
+}
+
+/****************************************************************************
+ * Name: sdadc_setup
+ *
+ * Description:
+ *   Configure the ADC. This method is called the first time that the SDADC
+ *   device is opened. 
+ *   This is called by the upper half driver sdadc_open().
+ *   This will occur when the port is first
+ *   opened in the application code (/dev/sdadcN). 
+ *   It would be called again after closing all references to this file and
+ *   reopening it.
+ *   This function wakes up the device and setup the DMA / IRQ
+ *
+ * Input Parameters:
+ *   dev     - pointer to the sdadc device structure
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+static int sdadc_setup(FAR struct adc_dev_s *dev)
+{
+  FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
+  int ret;
+
+  /* Wakes up the device */
+
+  sdadc_enable(priv, true);
+
+  /* Setup DMA or interrupt control. Note that either DMA or interrupt is
+   * setup not both.
+   */
+
+#ifdef SDADC_HAVE_DMA
+  if (priv->hasdma)
+    {
+      /* Setup DMA */
+      /* Stop and free DMA if it was started before */
+
+      if (priv->dma != NULL)
+        {
+          stm32_dmastop(priv->dma);
+          stm32_dmafree(priv->dma);
+        }
+
+      priv->dma = stm32_dmachannel(priv->dmachan);
+
+      stm32_dmasetup(priv->dma,
+                     priv->base + STM32_SDADC_JDATAR_OFFSET,
+                     (uint32_t)priv->dmabuffer,
+                     priv->nchannels,
+                     SDADC_DMA_CONTROL_WORD);
+
+      stm32_dmastart(priv->dma, sdadc_dmaconvcallback, dev, false);
+    }
+  else
+    {
+      /* Attach the SDADC interrupt */
+
+      ret = irq_attach(priv->irq, sdadc_interrupt, dev);
+      if (ret < 0)
+        {
+          ainfo("irq_attach failed: %d\n", ret);
+          return ret;
+        }
+    }
+#else
+  /* Attach the SDADC interrupt */
+
+  ret = irq_attach(priv->irq, sdadc_interrupt, dev);
+  if (ret < 0)
+    {
+      ainfo("irq_attach failed: %d\n", ret);
+      return ret;
+    }
+#endif
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: sdadc_shutdown
+ *
+ * Description:
+ *   Disable the ADC.  This method is called when the last instance 
+ *   of the SDADC device is closed by the user application.
+ *   This method reverses the operation the setup method.
+ *
+ * Input Parameters:
+ *   dev     - pointer to the sdadc device structure
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+static void sdadc_shutdown(FAR struct adc_dev_s *dev)
+{
+  FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
+
+  /* Put the device in low power mode */
+
+  sdadc_enable(priv, false);
+
+  /* Disable intrerrupt / dma  */
+
+  sdadc_rxint(dev, false);
+
+#ifdef SDADC_HAVE_DMA
+  if (priv->hasdma)
+    {
+      /* Stop and free DMA if it was started before */
+
+      if (priv->dma != NULL)
+        {
+          stm32_dmastop(priv->dma);
+          stm32_dmafree(priv->dma);
+        }
+    }
+  else
+    {
+      /* Disable ADC interrupts and detach the SDADC interrupt handler */
+
+      up_disable_irq(priv->irq);
+      irq_detach(priv->irq);
+    }
+#else
+      /* Disable ADC interrupts and detach the SDADC interrupt handler */
+
+      up_disable_irq(priv->irq);
+      irq_detach(priv->irq);
+#endif
+}
+
+/****************************************************************************
+ * Name: sdadc_rxint
+ *
+ * Description:
+ *   Call to enable or disable RX interrupts.
+ *
+ * Input Parameters:
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+static void sdadc_rxint(FAR struct adc_dev_s *dev, bool enable)
+{
+  FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
+  uint32_t setbits;
+
+  ainfo("intf: %d enable: %d\n", priv->intf, enable ? 1 : 0);
+
+  /* DMA mode */
+
+#ifdef SDADC_HAVE_DMA
+  if (priv->hasdma)
+    {
+      setbits = SDADC_CR1_JDMAEN; // DMA enabled for injected channels group
+    }
+  else
+    {
+      /* Interrupt enable for injected channel group overrun 
+          and end of conversion */
+      setbits = SDADC_CR1_JOVRIE | SDADC_CR1_JEOCIE; 
+    }
+#else
+  setbits = SDADC_CR1_JOVRIE | SDADC_CR1_JEOCIE; 
+#endif
+
+  if (enable)
+    {
+      /* Enable */
+
+      sdadc_modifyreg(priv, STM32_SDADC_CR1_OFFSET, 0, setbits);
+    }
+  else
+    {
+      /* Disable all ADC interrupts and DMA */
+
+      sdadc_modifyreg(priv, STM32_SDADC_CR1_OFFSET,
+                      SDADC_CR1_JOVRIE | SDADC_CR1_JEOCIE | SDADC_CR1_JDMAEN,
+                      0);
+    }
+}
+
+/****************************************************************************
+ * Name: sdadc_set_ch
+ *
+ * Description:
+ *   Sets the SDADC injected channel group.
+ *
+ * Input Parameters:
+ *   dev - pointer to device structure used by the driver
+ *   ch  - ADC channel number + 1. 0 reserved for all configured channels
+ *
+ * Returned Value:
+ *   int - errno
+ *
+ ****************************************************************************/
+
+static int sdadc_set_ch(FAR struct adc_dev_s *dev, uint8_t ch)
+{
+  FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
+  uint32_t bits = 0;
+  int i;
+
+  if (ch == 0)
+    {
+      priv->current   = 0;
+      priv->nchannels = priv->cchannels;
+    }
+  else
+    {
+      for (i = 0; i < priv->cchannels && priv->chanlist[i] != ch - 1; i++);
+
+      if (i >= priv->cchannels)
+        {
+          return -ENODEV;
+        }
+
+      priv->current   = i;
+      priv->nchannels = 1;
+    }
+
+  for (i = 0; i < priv->nchannels; i++)
+    {
+      bits |= (uint32_t)(1 << priv->chanlist[i]);
+    }
+
+  sdadc_putreg(priv, STM32_SDADC_JCHGR_OFFSET, bits);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: sdadc_ioctl
+ *
+ * Description:
+ *   All ioctl calls will be routed through this method.
+ *
+ * Input Parameters:
+ *   dev - pointer to device structure used by the driver
+ *   cmd - command
+ *   arg - arguments passed with command
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+static int sdadc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg)
+{
+  FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
+  int ret = OK;
+
+  switch (cmd)
+    {
+      case ANIOC_TRIGGER:
+        sdadc_startconv(priv, true);
+        break;
+
+      default:
+        aerr("ERROR: Unknown cmd: %d\n", cmd);
+        ret = -ENOTTY;
+        break;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sdadc_interrupt
+ *
+ * Description:
+ *   Common SDADC interrupt handler.
+ *
+ * Input Parameters:
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+static int sdadc_interrupt(int irq, FAR void *context, FAR void *arg)
+{
+  FAR struct adc_dev_s *dev = (FAR struct adc_dev_s *)arg;
+  FAR struct stm32_dev_s *priv;
+  uint32_t regval;
+  uint32_t pending;
+  int32_t  data;
+  uint8_t  chan;
+
+  DEBUGASSERT(dev != NULL && dev->ad_priv != NULL);
+  priv = (FAR struct stm32_dev_s *)dev->ad_priv;
+
+  regval  = sdadc_getreg(priv, STM32_SDADC_ISR_OFFSET);
+  pending = regval & SDADC_ISR_ALLINTS;
+  if (pending == 0)
+    {
+      return OK;
+    }
+
+  /* JOVRF: overrun flag */
+
+  if ((regval & SDADC_ISR_JOVRF) != 0)
+    {
+      awarn("WARNING: Overrun has occurred!\n");
+    }
+
+  /* JEOCF: End of conversion */
+
+  if ((regval & SDADC_ISR_JEOCF) != 0)
+    {
+      /* Read the converted value and clear JEOCF bit
+       * (It is cleared by reading the SDADC_JDATAR) */
+
+      data = sdadc_getreg(priv, STM32_SDADC_JDATAR_OFFSET) & SDADC_JDATAR_JDATA_MASK;
+      chan = sdadc_getreg(priv, STM32_SDADC_JDATAR_OFFSET) & SDADC_JDATAR_JDATACH_MASK;
+
+      DEBUGASSERT(priv->chanlist[priv->current] == chan);
+
+      /* Verify that the upper-half driver has bound its callback functions */
+
+      if (priv->cb != NULL)
+        {
+          /* Give the SDADC data to the ADC driver.  The ADC receive() method
+           * accepts 3 parameters:
+           *
+           * 1) The first is the ADC device instance for this SDADC block.
+           * 2) The second is the channel number for the data, and
+           * 3) The third is the converted data for the channel.
+           */
+
+          DEBUGASSERT(priv->cb->au_receive != NULL);
+          priv->cb->au_receive(dev, chan, data);
+        }
+
+      /* Set the channel number of the next channel that will complete
+       * conversion.
+       */
+
+      priv->current++;
+
+      if (priv->current >= priv->nchannels)
+        {
+          /* Restart the conversion sequence from the beginning */
+
+          priv->current = 0;
+        }
+
+      /* do no clear this interrupt (cleared by reading data) */
+ 
+      pending &= ~SDADC_ISR_JEOCF;
+    }
+
+  /* Clears interrupt flags, if any */
+
+  if (pending)
+    {
+      sdadc_putreg(priv, STM32_SDADC_CLRISR_OFFSET, pending);
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_sdadcinitialize
+ *
+ * Description:
+ *   Initialize one SDADC block
+ *
+ *   The logic is, save and initialize the channel list in the private driver
+ *   structure and return the corresponding adc device structure.
+ *
+ *   Each SDADC will convert the channels indicated each 
+ *   time a conversion is triggered either by sofware, timer or external event.
+ *   Channels are numbered from 0 - 8 and must be given in order (contrarily
+ *   to what says ST RM0313 doc !!!).
+ *
+ * Input Parameters:
+ *   intf      - Could be {1,2,3} for SDADC1, SDADC2, or SDADC3
+ *   chanlist  - The list of channels eg. { 0, 3, 7, 8 } 
+ *   cchannels - Number of channels
+ *
+ * Returned Value:
+ *   Valid ADC device structure reference on succcess; a NULL on failure
+ *
+ ****************************************************************************/
+
+struct adc_dev_s *stm32_sdadcinitialize(int intf, FAR const uint8_t *chanlist,
+                                        int cchannels)
+{
+  FAR struct adc_dev_s   *dev;
+  FAR struct stm32_dev_s *priv;
+  int i;
+
+  ainfo("intf: %d cchannels: %d\n", intf, cchannels);
+
+  switch (intf)
+    {
+#ifdef CONFIG_STM32_SDADC1
+      case 1:
+        ainfo("SDADC1 selected\n");
+        dev = &g_sdadcdev1;
+        break;
+#endif
+#ifdef CONFIG_STM32_SDADC2
+      case 2:
+        ainfo("SDADC2 selected\n");
+        dev = &g_sdadcdev2;
+        break;
+#endif
+#ifdef CONFIG_STM32_SDADC3
+      case 3:
+        ainfo("SDADC3 selected\n");
+        dev = &g_sdadcdev3;
+        break;
+#endif
+      default:
+        aerr("ERROR: No SDADC interface defined\n");
+        return NULL;
+    }
+
+  /* Check channel list in order */
+  
+  DEBUGASSERT((cchannels <= SDADC_MAX_SAMPLES) && (cchannels > 0));
+  for (i = 0; i < cchannels - 1; i ++)
+    {
+      if (chanlist[i] >= chanlist[i+1])
+        {
+          aerr("ERROR: SDADC channel list must be given in order\n");
+          return NULL;
+        }
+    }
+
+  /* Configure the selected SDADC */
+
+  priv = (FAR struct stm32_dev_s *)dev->ad_priv;
+
+  priv->cb        = NULL;
+  priv->cchannels = cchannels;
+
+  memcpy(priv->chanlist, chanlist, cchannels);
+
+  return dev;
+}
+
+#endif /* CONFIG_STM32_SDADC1 || CONFIG_STM32_SDADC2 ||
+        * CONFIG_STM32_SDADC3  */
+#endif /* CONFIG_STM32_SDADC */
diff --git a/arch/arm/src/stm32/stm32_sdadc.h b/arch/arm/src/stm32/stm32_sdadc.h
new file mode 100644
index 0000000000000000000000000000000000000000..b2f7ffedd9a70d02c94408b722547481a5451d88
--- /dev/null
+++ b/arch/arm/src/stm32/stm32_sdadc.h
@@ -0,0 +1,426 @@
+/************************************************************************************
+ * arch/arm/src/stm32/stm32_sdadc.h
+ *
+ *   Copyright (C) 2009, 2011, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Studelec. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            Marc Rechté 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32_STM32_SDADC_H
+#define __ARCH_ARM_SRC_STM32_STM32_SDADC_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+#if defined(CONFIG_STM32_STM32F37XX)
+#  include "chip/stm32f37xxx_sdadc.h"
+#else
+/* No generic chip/stm32_sdadc.h yet */
+
+#  error "This chip is not yet supported"
+#endif
+
+#include 
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Configuration ********************************************************************/
+/* Timer devices may be used for different purposes.  One special purpose is to
+ * control periodic SDADC sampling.  If CONFIG_STM32_TIMn is defined then
+ * CONFIG_STM32_TIMn_SDADC must also be defined to indicate that timer "n" is intended
+ * to be used for that purpose.
+ */
+
+/* For the STM32 F37XX line, timers 2-4, 12-17 an 19 may be used. */
+
+/* TODO cf. stm32_adc.h */
+
+/* Up to 3 SDADC interfaces are supported */
+
+#if STM32_NSDADC < 3
+#  undef CONFIG_STM32_SDADC3
+#endif
+
+#if STM32_NSDADC < 2
+#  undef CONFIG_STM32_SDADC2
+#endif
+
+#if STM32_NSDADC < 1
+#  undef CONFIG_STM32_SDADC1
+#endif
+
+#if defined(CONFIG_STM32_SDADC1) || defined(CONFIG_STM32_SDADC2) || \
+    defined(CONFIG_STM32_SDADC3)
+
+/* DMA support */
+
+#if defined(CONFIG_STM32_SDADC1_DMA) || defined(CONFIG_STM32_SDADC2_DMA) || \
+    defined(CONFIG_STM32_SDADC3_DMA)
+#  define SDADC_HAVE_DMA  1
+#endif
+
+#ifdef CONFIG_STM32_SDADC1_DMA
+#  define SDADC1_HAVE_DMA 1
+#else
+#  undef  SDADC1_HAVE_DMA
+#endif
+
+#ifdef CONFIG_STM32_SDADC2_DMA
+#  define SDADC2_HAVE_DMA 1
+#else
+#  undef  SDADC2_HAVE_DMA
+#endif
+
+#ifdef CONFIG_STM32_SDADC3_DMA
+#  define SDADC3_HAVE_DMA 1
+#else
+#  undef  SDADC3_HAVE_DMA
+#endif
+
+/* SDADC Channels/DMA ******************************************************
+ * The maximum number of channels that can be sampled at each scan.
+ * If DMA support is not enabled, then only a single channel 
+ * ought to be sampled. 
+ * Otherwise, unless sampling frequency is reduced,
+ * data overruns would occur.
+ */
+
+#define SDADC_MAX_CHANNELS_DMA   9
+#define SDADC_MAX_CHANNELS_NODMA 1
+
+#ifndef SDADC_MAX_SAMPLES
+#ifdef SDADC_HAVE_DMA
+#  define SDADC_MAX_SAMPLES SDADC_MAX_CHANNELS_DMA
+#else
+#  define SDADC_MAX_SAMPLES SDADC_MAX_CHANNELS_NODMA
+#endif
+#endif
+
+/* Timer configuration:  If a timer trigger is specified, then get
+ * information about the timer.
+ */
+
+#if defined(CONFIG_STM32_TIM3_SDADC1)
+#  define SDADC1_HAVE_TIMER           1
+#  define SDADC1_TIMER_BASE           STM32_TIM3_BASE
+#  define SDADC1_TIMER_PCLK_FREQUENCY STM32_APB1_TIM3_CLKIN
+#elif defined(CONFIG_STM32_TIM4_SDADC1)
+#  define SDADC1_HAVE_TIMER           1
+#  define SDADC1_TIMER_BASE           STM32_TIM4_BASE
+#  define SDADC1_TIMER_PCLK_FREQUENCY STM32_APB1_TIM4_CLKIN
+#elif defined(CONFIG_STM32_TIM13_SDADC1)
+#  define SDADC1_HAVE_TIMER           1
+#  define SDADC1_TIMER_BASE           STM32_TIM13_BASE
+#  define SDADC1_TIMER_PCLK_FREQUENCY STM32_APB1_TIM13_CLKIN
+#elif defined(CONFIG_STM32_TIM14_SDADC1)
+#  define SDADC1_HAVE_TIMER           1
+#  define SDADC1_TIMER_BASE           STM32_TIM14_BASE
+#  define SDADC1_TIMER_PCLK_FREQUENCY STM32_APB1_TIM14_CLKIN
+#elif defined(CONFIG_STM32_TIM15_SDADC1)
+#  define SDADC1_HAVE_TIMER           1
+#  define SDADC1_TIMER_BASE           STM32_TIM15_BASE
+#  define SDADC1_TIMER_PCLK_FREQUENCY STM32_APB2_TIM15_CLKIN
+#elif defined(CONFIG_STM32_TIM19_SDADC1)
+#  define SDADC1_HAVE_TIMER           1
+#  define SDADC1_TIMER_BASE           STM32_TIM19_BASE
+#  define SDADC1_TIMER_PCLK_FREQUENCY STM32_APB1_TIM19_CLKIN
+#else
+#  undef  SDADC1_HAVE_TIMER
+#endif
+
+#ifdef SDADC1_HAVE_TIMER
+#  ifndef CONFIG_STM32_SDADC1_SAMPLE_FREQUENCY
+#    error "CONFIG_STM32_SDADC1_SAMPLE_FREQUENCY not defined"
+#  endif
+#  ifndef CONFIG_STM32_SDADC1_TIMTRIG
+#    error "CONFIG_STM32_SDADC1_TIMTRIG not defined"
+#    warning "Values 0:TIM13_CH1 1:TIM14_CH1 2:TIM15_CH2 3:TIM3_CH1 4:TIM4_CH1 5:TIM19_CH2"
+#  endif
+#endif
+
+#if defined(CONFIG_STM32_TIM2_SDADC2)
+#  define SDADC2_HAVE_TIMER           1
+#  define SDADC2_TIMER_BASE           STM32_TIM2_BASE
+#  define SDADC2_TIMER_PCLK_FREQUENCY STM32_APB1_TIM2_CLKIN
+#elif defined(CONFIG_STM32_TIM3_SDADC2)
+#  define SDADC2_HAVE_TIMER           1
+#  define SDADC2_TIMER_BASE           STM32_TIM3_BASE
+#  define SDADC2_TIMER_PCLK_FREQUENCY STM32_APB1_TIM3_CLKIN
+#elif defined(CONFIG_STM32_TIM4_SDADC2)
+#  define SDADC2_HAVE_TIMER           1
+#  define SDADC2_TIMER_BASE           STM32_TIM4_BASE
+#  define SDADC2_TIMER_PCLK_FREQUENCY STM32_APB1_TIM4_CLKIN
+#elif defined(CONFIG_STM32_TIM12_SDADC2)
+#  define SDADC2_HAVE_TIMER           1
+#  define SDADC2_TIMER_BASE           STM32_TIM12_BASE
+#  define SDADC2_TIMER_PCLK_FREQUENCY STM32_APB1_TIM12_CLKIN
+#elif defined(CONFIG_STM32_TIM17_SDADC2)
+#  define SDADC2_HAVE_TIMER           1
+#  define SDADC2_TIMER_BASE           STM32_TIM17_BASE
+#  define SDADC2_TIMER_PCLK_FREQUENCY STM32_APB2_TIM17_CLKIN
+#elif defined(CONFIG_STM32_TIM19_SDADC2)
+#  define SDADC2_HAVE_TIMER           1
+#  define SDADC2_TIMER_BASE           STM32_TIM19_BASE
+#  define SDADC2_TIMER_PCLK_FREQUENCY STM32_APB1_TIM19_CLKIN
+#else
+#  undef  SDADC2_HAVE_TIMER
+#endif
+
+#ifdef SDADC2_HAVE_TIMER
+#  ifndef CONFIG_STM32_SDADC2_SAMPLE_FREQUENCY
+#    error "CONFIG_STM32_SDADC2_SAMPLE_FREQUENCY not defined"
+#  endif
+#  ifndef CONFIG_STM32_SDADC2_TIMTRIG
+#    error "CONFIG_STM32_SDADC2_TIMTRIG not defined"
+#    warning "Values 0:TIM17_CH1 1:TIM12_CH1 2:TIM2_CH3 3:TIM3_CH2 4:TIM4_CH2 5:TIM19_CH3"
+#  endif
+#endif
+
+#if defined(CONFIG_STM32_TIM2_SDADC3)
+#  define SDADC3_HAVE_TIMER           1
+#  define SDADC3_TIMER_BASE           STM32_TIM2_BASE
+#  define SDADC3_TIMER_PCLK_FREQUENCY STM32_APB1_TIM2_CLKIN
+#elif defined(CONFIG_STM32_TIM3_SDADC3)
+#  define SDADC3_HAVE_TIMER           1
+#  define SDADC3_TIMER_BASE           STM32_TIM3_BASE
+#  define SDADC3_TIMER_PCLK_FREQUENCY STM32_APB1_TIM3_CLKIN
+#elif defined(CONFIG_STM32_TIM4_SDADC3)
+#  define SDADC3_HAVE_TIMER           1
+#  define SDADC3_TIMER_BASE           STM32_TIM4_BASE
+#  define SDADC3_TIMER_PCLK_FREQUENCY STM32_APB1_TIM4_CLKIN
+#elif defined(CONFIG_STM32_TIM12_SDADC3)
+#  define SDADC3_HAVE_TIMER           1
+#  define SDADC3_TIMER_BASE           STM32_TIM12_BASE
+#  define SDADC3_TIMER_PCLK_FREQUENCY STM32_APB1_TIM12_CLKIN
+#elif defined(CONFIG_STM32_TIM16_SDADC3)
+#  define SDADC3_HAVE_TIMER           1
+#  define SDADC3_TIMER_BASE           STM32_TIM16_BASE
+#  define SDADC3_TIMER_PCLK_FREQUENCY STM32_APB2_TIM16_CLKIN
+#elif defined(CONFIG_STM32_TIM19_SDADC3)
+#  define SDADC3_HAVE_TIMER           1
+#  define SDADC3_TIMER_BASE           STM32_TIM19_BASE
+#  define SDADC3_TIMER_PCLK_FREQUENCY STM32_APB1_TIM19_CLKIN
+#else
+#  undef  SDADC3_HAVE_TIMER
+#endif
+
+#ifdef SDADC3_HAVE_TIMER
+#  ifndef CONFIG_STM32_SDADC3_SAMPLE_FREQUENCY
+#    error "CONFIG_STM32_SDADC3_SAMPLE_FREQUENCY not defined"
+#  endif
+#  ifndef CONFIG_STM32_SDADC3_TIMTRIG
+#    error "CONFIG_STM32_SDADC3_TIMTRIG not defined"
+#    warning "Values 0:TIM16_CH1 1:TIM12_CH2 2:TIM2_CH4 3:TIM3_CH3 4:TIM4_CH3 5:TIM19_CH4"
+#  endif
+#endif
+
+#if defined(SDADC1_HAVE_TIMER) || defined(SDADC2_HAVE_TIMER) || \
+    defined(SDADC3_HAVE_TIMER)
+#  define SDADC_HAVE_TIMER 1
+#  if defined(CONFIG_STM32_STM32F37XX) && !defined(CONFIG_STM32_FORCEPOWER)
+#    warning "CONFIG_STM32_FORCEPOWER must be defined to enable the timer(s)"
+#  endif
+#else
+#  undef SDADC_HAVE_TIMER
+#endif
+
+/* NOTE:  The following assumes that all possible combinations of timers and
+ * values are support JEXTSEL.  That is not so and it varies from one STM32
+ * to another.  But this (wrong) assumptions keeps the logic as simple as
+ * possible.  If unsupported combination is used, an error will show up
+ * later during compilation although it may be difficult to track it back
+ * to this simplification.
+ *
+ * STM32L37XX-family has 3 SDADC onboard
+ */
+
+#ifdef CONFIG_STM32_STM32F37XX
+#  define SDADC1_JEXTSEL_TIM13_CH1  SDADC1_CR2_JEXTSEL_TIM13_CH1
+#  define SDADC1_JEXTSEL_TIM14_CH1  SDADC1_CR2_JEXTSEL_TIM14_CH1
+#  define SDADC1_JEXTSEL_TIM15_CH2  SDADC1_CR2_JEXTSEL_TIM15_CH2
+#  define SDADC1_JEXTSEL_TIM3_CH1   SDADC1_CR2_JEXTSEL_TIM3_CH1
+#  define SDADC1_JEXTSEL_TIM4_CH1   SDADC1_CR2_JEXTSEL_TIM4_CH1
+#  define SDADC1_JEXTSEL_TIM19_CH2  SDADC1_CR2_JEXTSEL_TIM19_CH2
+#  define SDADC1_JEXTSEL_EXTI15     SDADC1_CR2_JEXTSEL_EXTI15
+#  define SDADC1_JEXTSEL_EXTI11     SDADC1_CR2_JEXTSEL_EXTI11
+#  define SDADC2_JEXTSEL_TIM17_CH1  SDADC2_CR2_JEXTSEL_TIM17_CH1
+#  define SDADC2_JEXTSEL_TIM12_CH1  SDADC2_CR2_JEXTSEL_TIM12_CH1
+#  define SDADC2_JEXTSEL_TIM2_CH3   SDADC2_CR2_JEXTSEL_TIM2_CH3
+#  define SDADC2_JEXTSEL_TIM3_CH2   SDADC2_CR2_JEXTSEL_TIM3_CH2
+#  define SDADC2_JEXTSEL_TIM4_CH2   SDADC2_CR2_JEXTSEL_TIM4_CH2
+#  define SDADC2_JEXTSEL_TIM19_CH3  SDADC2_CR2_JEXTSEL_TIM19_CH3
+#  define SDADC2_JEXTSEL_EXTI15     SDADC2_CR2_JEXTSEL_EXTI15
+#  define SDADC2_JEXTSEL_EXTI11     SDADC2_CR2_JEXTSEL_EXTI11
+#  define SDADC3_JEXTSEL_TIM16_CH1  SDADC3_CR2_JEXTSEL_TIM16_CH1
+#  define SDADC3_JEXTSEL_TIM12_CH1  SDADC3_CR2_JEXTSEL_TIM12_CH1
+#  define SDADC3_JEXTSEL_TIM2_CH4   SDADC3_CR2_JEXTSEL_TIM2_CH4
+#  define SDADC3_JEXTSEL_TIM3_CH3   SDADC3_CR2_JEXTSEL_TIM3_CH3
+#  define SDADC3_JEXTSEL_TIM4_CH3   SDADC3_CR2_JEXTSEL_TIM4_CH3
+#  define SDADC3_JEXTSEL_TIM19_CH4  SDADC3_CR2_JEXTSEL_TIM19_CH4
+#  define SDADC3_JEXTSEL_EXTI15     SDADC3_CR2_JEXTSEL_EXTI15
+#  define SDADC3_JEXTSEL_EXTI11     SDADC3_CR2_JEXTSEL_EXTI11
+#endif
+
+#if defined(CONFIG_STM32_TIM3_SDADC1)
+#  define SDADC1_JEXTSEL_VALUE 3
+#elif defined(CONFIG_STM32_TIM4_SDADC1)
+#  define SDADC1_JEXTSEL_VALUE 4
+#elif defined(CONFIG_STM32_TIM13_SDADC1)
+#  define SDADC1_JEXTSEL_VALUE 0
+#elif defined(CONFIG_STM32_TIM14_SDADC1)
+#  define SDADC1_JEXTSEL_VALUE 1
+#elif defined(CONFIG_STM32_TIM15_SDADC1)
+#  define SDADC1_JEXTSEL_VALUE 2
+#elif defined(CONFIG_STM32_TIM19_SDADC1)
+#  define SDADC1_JEXTSEL_VALUE 5
+#else
+#  undef SDADC1_JEXTSEL_VALUE
+#endif
+
+#if defined(CONFIG_STM32_TIM2_SDADC2)
+#  define SDADC2_JEXTSEL_VALUE 2
+#elif defined(CONFIG_STM32_TIM3_SDADC2)
+#  define SDADC2_JEXTSEL_VALUE 3
+#elif defined(CONFIG_STM32_TIM4_SDADC2)
+#  define SDADC2_JEXTSEL_VALUE 4
+#elif defined(CONFIG_STM32_TIM12_SDADC2)
+#  define SDADC2_JEXTSEL_VALUE 1
+#elif defined(CONFIG_STM32_TIM17_SDADC2)
+#  define SDADC2_JEXTSEL_VALUE 0
+#elif defined(CONFIG_STM32_TIM19_SDADC2)
+#  define SDADC2_JEXTSEL_VALUE 5
+#else
+#  undef SDADC2_JEXTSEL_VALUE
+#endif
+
+#if defined(CONFIG_STM32_TIM2_SDADC3)
+#  define SDADC3_JEXTSEL_VALUE 2
+#elif defined(CONFIG_STM32_TIM3_SDADC3)
+#  define SDADC3_JEXTSEL_VALUE 3
+#elif defined(CONFIG_STM32_TIM4_SDADC3)
+#  define SDADC3_JEXTSEL_VALUE 4
+#elif defined(CONFIG_STM32_TIM12_SDADC3)
+#  define SDADC3_JEXTSEL_VALUE 1
+#elif defined(CONFIG_STM32_TIM16_SDADC3)
+#  define SDADC3_JEXTSEL_VALUE 0
+#elif defined(CONFIG_STM32_TIM19_SDADC3)
+#  define SDADC3_JEXTSEL_VALUE 5
+#else
+#  undef SDADC3_JEXTSEL_VALUE
+#endif
+
+/* SDADC Configurations ********************************************************
+ * Up to 3 configuration profiles may be defined in order to define:
+ * - calibration method
+ * - SE/differential mode
+ * - input gain
+ * Each of the 9 SDADC channels is assigned to a configuration profile
+ */
+#ifndef SDADC_CONF0R_DEFAULT
+#  define SDADC_CONF0R_DEFAULT (SDADC_CONFR_GAIN_1X | SDADC_CONFR_SE_SE_OFFSET | SDADC_CONFR_COMMON_GND)
+#endif
+#ifndef SDADC_CONF1R_DEFAULT
+#  define SDADC_CONF1R_DEFAULT (SDADC_CONFR_GAIN_2X | SDADC_CONFR_SE_SE_OFFSET | SDADC_CONFR_COMMON_GND)
+#endif
+#ifndef SDADC_CONF2R_DEFAULT
+#  define SDADC_CONF2R_DEFAULT (SDADC_CONFR_GAIN_4X | SDADC_CONFR_SE_SE_OFFSET | SDADC_CONFR_COMMON_GND)
+#endif
+#ifndef SDADC_CONFCHR1_DEFAULT
+#  define SDADC_CONFCHR1_DEFAULT ((SDADC_CONF0R << SDADC_CONFCHR1_CH_SHIFT(0)) | \
+                                  (SDADC_CONF0R << SDADC_CONFCHR1_CH_SHIFT(1)) | \
+                                  (SDADC_CONF0R << SDADC_CONFCHR1_CH_SHIFT(2)) | \
+                                  (SDADC_CONF0R << SDADC_CONFCHR1_CH_SHIFT(3)) | \
+                                  (SDADC_CONF0R << SDADC_CONFCHR1_CH_SHIFT(4)) | \
+                                  (SDADC_CONF0R << SDADC_CONFCHR1_CH_SHIFT(5)) | \
+                                  (SDADC_CONF0R << SDADC_CONFCHR1_CH_SHIFT(6)) | \
+                                  (SDADC_CONF0R << SDADC_CONFCHR1_CH_SHIFT(7)))
+#endif
+#ifndef SDADC_CONFCHR2_DEFAULT
+#  define SDADC_CONFCHR2_DEFAULT (SDADC_CONF0R << SDADC_CONFCHR2_CH8_SHIFT)
+#endif
+
+/* SDADC Reference voltage selection ************************************************/
+
+#ifndef SDADC_REFV_DEFAULT
+#  define SDADC_REFV_DEFAULT  SDADC_CR1_REFV_EXT
+#endif
+#ifndef SDADC1_REFV
+#  define SDADC1_REFV  SDADC_REFV_DEFAULT
+#endif
+#ifndef SDADC2_REFV
+#  define SDADC2_REFV  SDADC_REFV_DEFAULT
+#endif
+#ifndef SDADC3_REFV
+#  define SDADC3_REFV  SDADC_REFV_DEFAULT
+#endif
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: stm32_sdadcinitialize
+ *
+ ****************************************************************************/
+
+struct adc_dev_s *stm32_sdadcinitialize(int intf, FAR const uint8_t *chanlist,
+                                        int nchannels);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif /* __ASSEMBLY__ */
+
+#endif /* CONFIG_STM32_SDADC1 || CONFIG_STM32_SDADC2 ||
+        * CONFIG_STM32_SDADC3
+        */
+#endif /* __ARCH_ARM_SRC_STM32_STM32_SDADC_H */
diff --git a/arch/arm/src/stm32/stm32_sdio.c b/arch/arm/src/stm32/stm32_sdio.c
index b9bea99351fb203f29aae8544a454fcc3434a7fa..01d533ba704c169177ddbd75b43558e18d438109 100644
--- a/arch/arm/src/stm32/stm32_sdio.c
+++ b/arch/arm/src/stm32/stm32_sdio.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32/stm32_sdio.c
  *
- *   Copyright (C) 2009, 2011-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2011-2014, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -52,6 +52,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -74,9 +75,9 @@
 /* Required system configuration options:
  *
  *   CONFIG_ARCH_DMA - Enable architecture-specific DMA subsystem
- *     initialization.  Required if CONFIG_SDIO_DMA is enabled.
+ *     initialization.  Required if CONFIG_STM32_SDIO_DMA is enabled.
  *   CONFIG_STM32_DMA2 - Enable STM32 DMA2 support.  Required if
- *     CONFIG_SDIO_DMA is enabled
+ *     CONFIG_STM32_SDIO_DMA is enabled
  *   CONFIG_SCHED_WORKQUEUE -- Callback support requires work queue support.
  *
  * Driver-specific configuration options:
@@ -84,25 +85,32 @@
  *   CONFIG_SDIO_MUXBUS - Setting this configuration enables some locking
  *     APIs to manage concurrent accesses on the SDIO bus.  This is not
  *     needed for the simple case of a single SD card, for example.
- *   CONFIG_SDIO_DMA - Enable SDIO.  This is a marginally optional.  For
+ *   CONFIG_STM32_SDIO_DMA - Enable SDIO.  This is a marginally optional.  For
  *     most usages, SDIO will cause data overruns if used without DMA.
  *     NOTE the above system DMA configuration options.
- *   CONFIG_SDIO_WIDTH_D1_ONLY - This may be selected to force the driver
- *     operate with only a single data line (the default is to use all
- *     4 SD data lines).
- *   CONFIG_SDIO_PRI - SDIO interrupt priority.  This setting is not very
+ *   CONFIG_STM32_SDIO_WIDTH_D1_ONLY - This may be selected to force the
+ *     driver operate with only a single data line (the default is to use
+ *     all 4 SD data lines).
+ *   CONFIG_STM32_SDIO_PRI - SDIO interrupt priority.  This setting is not very
  *     important since interrupt nesting is not currently supported.
  *   CONFIG_SDM_DMAPRIO - SDIO DMA priority.  This can be selecte if
- *     CONFIG_SDIO_DMA is enabled.
+ *     CONFIG_STM32_SDIO_DMA is enabled.
  *   CONFIG_SDIO_XFRDEBUG - Enables some very low-level debug output
- *     This also requires CONFIG_DEBUG_FS and CONFIG_DEBUG_VERBOSE
+ *     This also requires CONFIG_DEBUG_FS and CONFIG_DEBUG_INFO
  */
 
-#if defined(CONFIG_SDIO_DMA) && !defined(CONFIG_STM32_DMA2)
-#  warning "CONFIG_SDIO_DMA support requires CONFIG_STM32_DMA2"
+#if !defined(CONFIG_STM32_SDIO_DMA)
+#  warning "Large Non-DMA transfer may result in RX overrun failures"
+#else
+#  ifndef CONFIG_STM32_DMA2
+#    error "CONFIG_STM32_SDIO_DMA support requires CONFIG_STM32_DMA2"
+#  endif
+#  ifndef CONFIG_SDIO_DMA
+#    error CONFIG_SDIO_DMA must be defined with CONFIG_STM32_SDIO_DMA
+#  endif
 #endif
 
-#ifndef CONFIG_SDIO_DMA
+#ifndef CONFIG_STM32_SDIO_DMA
 #  warning "Large Non-DMA transfer may result in RX overrun failures"
 #endif
 
@@ -110,36 +118,36 @@
 #  error "Callback support requires CONFIG_SCHED_WORKQUEUE"
 #endif
 
-#ifndef CONFIG_SDIO_PRI
-#  define CONFIG_SDIO_PRI        NVIC_SYSH_PRIORITY_DEFAULT
+#ifndef CONFIG_STM32_SDIO_PRI
+#  define CONFIG_STM32_SDIO_PRI        NVIC_SYSH_PRIORITY_DEFAULT
 #endif
 
-#ifdef CONFIG_SDIO_DMA
-#  ifndef CONFIG_SDIO_DMAPRIO
+#ifdef CONFIG_STM32_SDIO_DMA
+#  ifndef CONFIG_STM32_SDIO_DMAPRIO
 #    if defined(CONFIG_STM32_STM32F10XX)
-#      define CONFIG_SDIO_DMAPRIO  DMA_CCR_PRIMED
+#      define CONFIG_STM32_SDIO_DMAPRIO  DMA_CCR_PRIMED
 #    elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
-#      define CONFIG_SDIO_DMAPRIO  DMA_SCR_PRIVERYHI
+#      define CONFIG_STM32_SDIO_DMAPRIO  DMA_SCR_PRIVERYHI
 #    else
 #      error "Unknown STM32 DMA"
 #    endif
 #  endif
 #  if defined(CONFIG_STM32_STM32F10XX)
-#    if (CONFIG_SDIO_DMAPRIO & ~DMA_CCR_PL_MASK) != 0
-#      error "Illegal value for CONFIG_SDIO_DMAPRIO"
+#    if (CONFIG_STM32_SDIO_DMAPRIO & ~DMA_CCR_PL_MASK) != 0
+#      error "Illegal value for CONFIG_STM32_SDIO_DMAPRIO"
 #    endif
 #  elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
-#    if (CONFIG_SDIO_DMAPRIO & ~DMA_SCR_PL_MASK) != 0
-#      error "Illegal value for CONFIG_SDIO_DMAPRIO"
+#    if (CONFIG_STM32_SDIO_DMAPRIO & ~DMA_SCR_PL_MASK) != 0
+#      error "Illegal value for CONFIG_STM32_SDIO_DMAPRIO"
 #    endif
 #  else
 #    error "Unknown STM32 DMA"
 #  endif
 #else
-#  undef CONFIG_SDIO_DMAPRIO
+#  undef CONFIG_STM32_SDIO_DMAPRIO
 #endif
 
-#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG)
+#ifndef CONFIG_DEBUG_MEMCARD_INFO
 #  undef CONFIG_SDIO_XFRDEBUG
 #endif
 
@@ -148,18 +156,27 @@
 #define SDIO_CLKCR_RISINGEDGE    (0)
 #define SDIO_CLKCR_FALLINGEDGE   SDIO_CLKCR_NEGEDGE
 
+/* Use the default of the rising edge but allow a configuration,
+ * that does not have the errata, to override the edge the SDIO
+ * command and data is changed on.
+ */
+
+#if !defined(SDIO_CLKCR_EDGE)
+#  define SDIO_CLKCR_EDGE SDIO_CLKCR_RISINGEDGE
+#endif
+
 /* Mode dependent settings.  These depend on clock devisor settings that must
  * be defined in the board-specific board.h header file: SDIO_INIT_CLKDIV,
  * SDIO_MMCXFR_CLKDIV, and SDIO_SDXFR_CLKDIV.
  */
 
-#define STM32_CLCKCR_INIT        (SDIO_INIT_CLKDIV | SDIO_CLKCR_RISINGEDGE | \
+#define STM32_CLCKCR_INIT        (SDIO_INIT_CLKDIV | SDIO_CLKCR_EDGE | \
                                   SDIO_CLKCR_WIDBUS_D1)
-#define SDIO_CLKCR_MMCXFR        (SDIO_MMCXFR_CLKDIV | SDIO_CLKCR_RISINGEDGE | \
+#define SDIO_CLKCR_MMCXFR        (SDIO_MMCXFR_CLKDIV | SDIO_CLKCR_EDGE | \
                                   SDIO_CLKCR_WIDBUS_D1)
-#define SDIO_CLCKR_SDXFR         (SDIO_SDXFR_CLKDIV | SDIO_CLKCR_RISINGEDGE | \
+#define SDIO_CLCKR_SDXFR         (SDIO_SDXFR_CLKDIV | SDIO_CLKCR_EDGE | \
                                   SDIO_CLKCR_WIDBUS_D1)
-#define SDIO_CLCKR_SDWIDEXFR     (SDIO_SDXFR_CLKDIV | SDIO_CLKCR_RISINGEDGE | \
+#define SDIO_CLCKR_SDWIDEXFR     (SDIO_SDXFR_CLKDIV | SDIO_CLKCR_EDGE | \
                                   SDIO_CLKCR_WIDBUS_D4)
 
 /* Timing */
@@ -183,9 +200,9 @@
 /* STM32 F1 channel configuration register (CCR) settings */
 
 #if defined(CONFIG_STM32_STM32F10XX)
-#  define SDIO_RXDMA32_CONFIG    (CONFIG_SDIO_DMAPRIO | DMA_CCR_MSIZE_32BITS | \
+#  define SDIO_RXDMA32_CONFIG    (CONFIG_STM32_SDIO_DMAPRIO | DMA_CCR_MSIZE_32BITS | \
                                   DMA_CCR_PSIZE_32BITS | DMA_CCR_MINC)
-#  define SDIO_TXDMA32_CONFIG    (CONFIG_SDIO_DMAPRIO | DMA_CCR_MSIZE_32BITS | \
+#  define SDIO_TXDMA32_CONFIG    (CONFIG_STM32_SDIO_DMAPRIO | DMA_CCR_MSIZE_32BITS | \
                                   DMA_CCR_PSIZE_32BITS | DMA_CCR_MINC | DMA_CCR_DIR)
 
 /* STM32 F4 stream configuration register (SCR) settings. */
@@ -193,11 +210,11 @@
 #elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
 #  define SDIO_RXDMA32_CONFIG    (DMA_SCR_PFCTRL | DMA_SCR_DIR_P2M|DMA_SCR_MINC | \
                                   DMA_SCR_PSIZE_32BITS | DMA_SCR_MSIZE_32BITS | \
-                                  CONFIG_SDIO_DMAPRIO | DMA_SCR_PBURST_INCR4 | \
+                                  CONFIG_STM32_SDIO_DMAPRIO | DMA_SCR_PBURST_INCR4 | \
                                   DMA_SCR_MBURST_INCR4)
 #  define SDIO_TXDMA32_CONFIG    (DMA_SCR_PFCTRL | DMA_SCR_DIR_M2P | DMA_SCR_MINC | \
                                   DMA_SCR_PSIZE_32BITS | DMA_SCR_MSIZE_32BITS | \
-                                  CONFIG_SDIO_DMAPRIO | DMA_SCR_PBURST_INCR4 | \
+                                  CONFIG_STM32_SDIO_DMAPRIO | DMA_SCR_PBURST_INCR4 | \
                                   DMA_SCR_MBURST_INCR4)
 #else
 #  error "Unknown STM32 DMA"
@@ -268,7 +285,7 @@
 /* Register logging support */
 
 #ifdef CONFIG_SDIO_XFRDEBUG
-#  ifdef CONFIG_SDIO_DMA
+#  ifdef CONFIG_STM32_SDIO_DMA
 #    define SAMPLENDX_BEFORE_SETUP  0
 #    define SAMPLENDX_BEFORE_ENABLE 1
 #    define SAMPLENDX_AFTER_SETUP   2
@@ -304,7 +321,7 @@ struct stm32_dev_s
 
   /* Callback support */
 
-  uint8_t            cdstatus;   /* Card status */
+  sdio_statset_t     cdstatus;   /* Card status */
   sdio_eventset_t    cbevents;   /* Set of events to be cause callbacks */
   worker_t           callback;   /* Registered callback function */
   void              *cbarg;      /* Registered callback argument */
@@ -319,7 +336,7 @@ struct stm32_dev_s
   /* DMA data transfer support */
 
   bool               widebus;    /* Required for DMA support */
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_STM32_SDIO_DMA
   volatile uint8_t   xfrflags;   /* Used to synchronize SDIO and DMA completion events */
   bool               dmamode;    /* true: DMA mode transfer */
   DMA_HANDLE         dma;        /* Handle for DMA channel */
@@ -345,7 +362,7 @@ struct stm32_sdioregs_s
 struct stm32_sampleregs_s
 {
   struct stm32_sdioregs_s sdio;
-#if defined(CONFIG_DEBUG_DMA) && defined(CONFIG_SDIO_DMA)
+#if defined(CONFIG_DEBUG_DMA_INFO) && defined(CONFIG_STM32_SDIO_DMA)
   struct stm32_dmaregs_s  dma;
 #endif
 };
@@ -382,7 +399,7 @@ static void stm32_dumpsamples(struct stm32_dev_s *priv);
 #  define   stm32_dumpsamples(priv)
 #endif
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_STM32_SDIO_DMA
 static void stm32_dmacallback(DMA_HANDLE handle, uint8_t status, void *arg);
 #endif
 
@@ -399,9 +416,9 @@ static void stm32_endtransfer(struct stm32_dev_s *priv, sdio_eventset_t wkupeven
 
 /* Interrupt Handling *******************************************************/
 
-static int  stm32_interrupt(int irq, void *context);
+static int  stm32_interrupt(int irq, void *context, void *arg);
 #ifdef CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE
-static int  stm32_rdyinterrupt(int irq, void *context);
+static int  stm32_rdyinterrupt(int irq, void *context, void *arg);
 #endif
 
 /* SDIO interface methods ***************************************************/
@@ -415,7 +432,8 @@ static int stm32_lock(FAR struct sdio_dev_s *dev, bool lock);
 /* Initialization/setup */
 
 static void stm32_reset(FAR struct sdio_dev_s *dev);
-static uint8_t stm32_status(FAR struct sdio_dev_s *dev);
+static sdio_capset_t stm32_capabilities(FAR struct sdio_dev_s *dev);
+static sdio_statset_t stm32_status(FAR struct sdio_dev_s *dev);
 static void stm32_widebus(FAR struct sdio_dev_s *dev, bool enable);
 static void stm32_clock(FAR struct sdio_dev_s *dev,
               enum sdio_clock_e rate);
@@ -454,8 +472,7 @@ static int  stm32_registercallback(FAR struct sdio_dev_s *dev,
 
 /* DMA */
 
-#ifdef CONFIG_SDIO_DMA
-static bool stm32_dmasupported(FAR struct sdio_dev_s *dev);
+#ifdef CONFIG_STM32_SDIO_DMA
 #ifdef CONFIG_SDIO_PREFLIGHT
 static int  stm32_dmapreflight(FAR struct sdio_dev_s *dev,
               FAR const uint8_t *buffer, size_t buflen);
@@ -483,6 +500,7 @@ struct stm32_dev_s g_sdiodev =
     .lock             = stm32_lock,
 #endif
     .reset            = stm32_reset,
+    .capabilities     = stm32_capabilities,
     .status           = stm32_status,
     .widebus          = stm32_widebus,
     .clock            = stm32_clock,
@@ -507,12 +525,19 @@ struct stm32_dev_s g_sdiodev =
     .callbackenable   = stm32_callbackenable,
     .registercallback = stm32_registercallback,
 #ifdef CONFIG_SDIO_DMA
-    .dmasupported     = stm32_dmasupported,
+#ifdef CONFIG_STM32_SDIO_DMA
 #ifdef CONFIG_SDIO_PREFLIGHT
     .dmapreflight     = stm32_dmapreflight,
 #endif
     .dmarecvsetup     = stm32_dmarecvsetup,
     .dmasendsetup     = stm32_dmasendsetup,
+#else
+#ifdef CONFIG_SDIO_PREFLIGHT
+    .dmapreflight     = NULL,
+#endif
+    .dmarecvsetup     = stm32_recvsetup,
+    .dmasendsetup     = stm32_sendsetup,
+#endif
 #endif
   },
 };
@@ -596,7 +621,7 @@ static inline void stm32_setclkcr(uint32_t clkcr)
   regval |=  clkcr;
   putreg32(regval, STM32_SDIO_CLKCR);
 
-  fvdbg("CLKCR: %08x PWR: %08x\n",
+  mcinfo("CLKCR: %08x PWR: %08x\n",
         getreg32(STM32_SDIO_CLKCR), getreg32(STM32_SDIO_POWER));
 }
 
@@ -643,14 +668,16 @@ static void stm32_configwaitints(struct stm32_dev_s *priv, uint32_t waitmask,
 
       /* Arm the SDIO_D Ready and install Isr */
 
-      stm32_gpiosetevent(pinset, true, false, false, stm32_rdyinterrupt);
+      (void)stm32_gpiosetevent(pinset, true, false, false,
+                               stm32_rdyinterrupt, priv);
     }
 
   /* Disarm SDIO_D ready */
 
   if ((wkupevent & SDIOWAIT_WRCOMPLETE) != 0)
     {
-      stm32_gpiosetevent(GPIO_SDIO_D0, false, false, false , NULL);
+      (void)stm32_gpiosetevent(GPIO_SDIO_D0, false, false, false,
+                               NULL, NULL);
       stm32_configgpio(GPIO_SDIO_D0);
     }
 #endif
@@ -658,7 +685,7 @@ static void stm32_configwaitints(struct stm32_dev_s *priv, uint32_t waitmask,
   priv->waitevents = waitevents;
   priv->wkupevent  = wkupevent;
   priv->waitmask   = waitmask;
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_STM32_SDIO_DMA
   priv->xfrflags   = 0;
 #endif
   putreg32(priv->xfrmask | priv->waitmask, STM32_SDIO_MASK);
@@ -789,12 +816,14 @@ static void stm32_sdiosample(struct stm32_sdioregs_s *regs)
 static void stm32_sample(struct stm32_dev_s *priv, int index)
 {
   struct stm32_sampleregs_s *regs = &g_sampleregs[index];
-#if defined(CONFIG_DEBUG_DMA) && defined(CONFIG_SDIO_DMA)
+
+#if defined(CONFIG_DEBUG_DMA_INFO) && defined(CONFIG_STM32_SDIO_DMA)
   if (priv->dmamode)
     {
       stm32_dmasample(priv->dma, ®s->dma);
     }
 #endif
+
   stm32_sdiosample(®s->sdio);
 }
 #endif
@@ -810,16 +839,16 @@ static void stm32_sample(struct stm32_dev_s *priv, int index)
 #ifdef CONFIG_SDIO_XFRDEBUG
 static void stm32_sdiodump(struct stm32_sdioregs_s *regs, const char *msg)
 {
-  fdbg("SDIO Registers: %s\n", msg);
-  fdbg("  POWER[%08x]: %08x\n", STM32_SDIO_POWER,   regs->power);
-  fdbg("  CLKCR[%08x]: %08x\n", STM32_SDIO_CLKCR,   regs->clkcr);
-  fdbg("  DCTRL[%08x]: %08x\n", STM32_SDIO_DCTRL,   regs->dctrl);
-  fdbg(" DTIMER[%08x]: %08x\n", STM32_SDIO_DTIMER,  regs->dtimer);
-  fdbg("   DLEN[%08x]: %08x\n", STM32_SDIO_DLEN,    regs->dlen);
-  fdbg(" DCOUNT[%08x]: %08x\n", STM32_SDIO_DCOUNT,  regs->dcount);
-  fdbg("    STA[%08x]: %08x\n", STM32_SDIO_STA,     regs->sta);
-  fdbg("   MASK[%08x]: %08x\n", STM32_SDIO_MASK,    regs->mask);
-  fdbg("FIFOCNT[%08x]: %08x\n", STM32_SDIO_FIFOCNT, regs->fifocnt);
+  mcinfo("SDIO Registers: %s\n", msg);
+  mcinfo("  POWER[%08x]: %08x\n", STM32_SDIO_POWER,   regs->power);
+  mcinfo("  CLKCR[%08x]: %08x\n", STM32_SDIO_CLKCR,   regs->clkcr);
+  mcinfo("  DCTRL[%08x]: %08x\n", STM32_SDIO_DCTRL,   regs->dctrl);
+  mcinfo(" DTIMER[%08x]: %08x\n", STM32_SDIO_DTIMER,  regs->dtimer);
+  mcinfo("   DLEN[%08x]: %08x\n", STM32_SDIO_DLEN,    regs->dlen);
+  mcinfo(" DCOUNT[%08x]: %08x\n", STM32_SDIO_DCOUNT,  regs->dcount);
+  mcinfo("    STA[%08x]: %08x\n", STM32_SDIO_STA,     regs->sta);
+  mcinfo("   MASK[%08x]: %08x\n", STM32_SDIO_MASK,    regs->mask);
+  mcinfo("FIFOCNT[%08x]: %08x\n", STM32_SDIO_FIFOCNT, regs->fifocnt);
 }
 #endif
 
@@ -835,12 +864,13 @@ static void stm32_sdiodump(struct stm32_sdioregs_s *regs, const char *msg)
 static void stm32_dumpsample(struct stm32_dev_s *priv,
                              struct stm32_sampleregs_s *regs, const char *msg)
 {
-#if defined(CONFIG_DEBUG_DMA) && defined(CONFIG_SDIO_DMA)
+#if defined(CONFIG_DEBUG_DMA_INFO) && defined(CONFIG_STM32_SDIO_DMA)
   if (priv->dmamode)
     {
       stm32_dmadump(priv->dma, ®s->dma, msg);
     }
 #endif
+
   stm32_sdiodump(®s->sdio, msg);
 }
 #endif
@@ -857,15 +887,18 @@ static void stm32_dumpsample(struct stm32_dev_s *priv,
 static void stm32_dumpsamples(struct stm32_dev_s *priv)
 {
   stm32_dumpsample(priv, &g_sampleregs[SAMPLENDX_BEFORE_SETUP], "Before setup");
-#if defined(CONFIG_DEBUG_DMA) && defined(CONFIG_SDIO_DMA)
+
+#if defined(CONFIG_DEBUG_DMA_INFO) && defined(CONFIG_STM32_SDIO_DMA)
   if (priv->dmamode)
     {
       stm32_dumpsample(priv, &g_sampleregs[SAMPLENDX_BEFORE_ENABLE], "Before DMA enable");
     }
 #endif
+
   stm32_dumpsample(priv, &g_sampleregs[SAMPLENDX_AFTER_SETUP], "After setup");
   stm32_dumpsample(priv, &g_sampleregs[SAMPLENDX_END_TRANSFER], "End of transfer");
-#if defined(CONFIG_DEBUG_DMA) && defined(CONFIG_SDIO_DMA)
+
+#if defined(CONFIG_DEBUG_DMA_INFO) && defined(CONFIG_STM32_SDIO_DMA)
   if (priv->dmamode)
     {
       stm32_dumpsample(priv, &g_sampleregs[SAMPLENDX_DMA_CALLBACK], "DMA Callback");
@@ -882,7 +915,7 @@ static void stm32_dumpsamples(struct stm32_dev_s *priv)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_STM32_SDIO_DMA
 static void stm32_dmacallback(DMA_HANDLE handle, uint8_t status, void *arg)
 {
   FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)arg;
@@ -901,7 +934,7 @@ static void stm32_dmacallback(DMA_HANDLE handle, uint8_t status, void *arg)
 
   if ((status & DMA_STATUS_ERROR) != 0)
     {
-      flldbg("DMA error %02x, remaining: %d\n", status, priv->remaining);
+      mcerr("ERROR: DMA error %02x, remaining: %d\n", status, priv->remaining);
       result = SDIOWAIT_ERROR;
     }
   else
@@ -1166,7 +1199,7 @@ static void stm32_eventtimeout(int argc, uint32_t arg)
       /* Yes.. wake up any waiting threads */
 
       stm32_endwait(priv, SDIOWAIT_TIMEOUT);
-      flldbg("Timeout: remaining: %d\n", priv->remaining);
+      mcerr("ERROR: Timeout, remaining: %d\n", priv->remaining);
     }
 }
 
@@ -1235,7 +1268,7 @@ static void stm32_endtransfer(struct stm32_dev_s *priv, sdio_eventset_t wkupeven
 
   /* If this was a DMA transfer, make sure that DMA is stopped */
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_STM32_SDIO_DMA
   if (priv->dmamode)
     {
       /* DMA debug instrumentation */
@@ -1284,9 +1317,9 @@ static void stm32_endtransfer(struct stm32_dev_s *priv, sdio_eventset_t wkupeven
  ****************************************************************************/
 
 #ifdef CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE
-static int stm32_rdyinterrupt(int irq, void *context)
+static int stm32_rdyinterrupt(int irq, void *context, FAR void *arg)
 {
-  struct stm32_dev_s *priv = &g_sdiodev;
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)arg;
   stm32_endwait(priv, SDIOWAIT_WRCOMPLETE);
   return OK;
 }
@@ -1306,7 +1339,7 @@ static int stm32_rdyinterrupt(int irq, void *context)
  *
  ****************************************************************************/
 
-static int stm32_interrupt(int irq, void *context)
+static int stm32_interrupt(int irq, void *context, FAR void *arg)
 {
   struct stm32_dev_s *priv = &g_sdiodev;
   uint32_t enabled;
@@ -1326,7 +1359,7 @@ static int stm32_interrupt(int irq, void *context)
       pending  = enabled & priv->xfrmask;
       if (pending != 0)
         {
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_STM32_SDIO_DMA
           if (!priv->dmamode)
 #endif
             {
@@ -1365,7 +1398,7 @@ static int stm32_interrupt(int irq, void *context)
 
               /* Was this transfer performed in DMA mode? */
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_STM32_SDIO_DMA
               if (priv->dmamode)
                 {
                   /* Yes.. Terminate the transfers only if the DMA has also
@@ -1406,7 +1439,7 @@ static int stm32_interrupt(int irq, void *context)
             {
               /* Terminate the transfer with an error */
 
-              flldbg("ERROR: Data block CRC failure, remaining: %d\n", priv->remaining);
+              mcerr("ERROR: Data block CRC failure, remaining: %d\n", priv->remaining);
               stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
             }
 
@@ -1416,7 +1449,7 @@ static int stm32_interrupt(int irq, void *context)
             {
               /* Terminate the transfer with an error */
 
-              flldbg("ERROR: Data timeout, remaining: %d\n", priv->remaining);
+              mcerr("ERROR: Data timeout, remaining: %d\n", priv->remaining);
               stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT);
             }
 
@@ -1426,7 +1459,7 @@ static int stm32_interrupt(int irq, void *context)
             {
               /* Terminate the transfer with an error */
 
-              flldbg("ERROR: RX FIFO overrun, remaining: %d\n", priv->remaining);
+              mcerr("ERROR: RX FIFO overrun, remaining: %d\n", priv->remaining);
               stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
             }
 
@@ -1436,7 +1469,7 @@ static int stm32_interrupt(int irq, void *context)
             {
               /* Terminate the transfer with an error */
 
-              flldbg("ERROR: TX FIFO underrun, remaining: %d\n", priv->remaining);
+              mcerr("ERROR: TX FIFO underrun, remaining: %d\n", priv->remaining);
               stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
             }
 
@@ -1446,7 +1479,7 @@ static int stm32_interrupt(int irq, void *context)
             {
               /* Terminate the transfer with an error */
 
-              flldbg("ERROR: Start bit, remaining: %d\n", priv->remaining);
+              mcerr("ERROR: Start bit, remaining: %d\n", priv->remaining);
               stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
             }
         }
@@ -1557,7 +1590,7 @@ static void stm32_reset(FAR struct sdio_dev_s *dev)
   priv->waitevents = 0;      /* Set of events to be waited for */
   priv->waitmask   = 0;      /* Interrupt enables for event waiting */
   priv->wkupevent  = 0;      /* The event that caused the wakeup */
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_STM32_SDIO_DMA
   priv->xfrflags   = 0;      /* Used to synchronize SDIO and DMA completion events */
 #endif
 
@@ -1572,7 +1605,7 @@ static void stm32_reset(FAR struct sdio_dev_s *dev)
   /* DMA data transfer support */
 
   priv->widebus    = false;  /* Required for DMA support */
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_STM32_SDIO_DMA
   priv->dmamode    = false;  /* true: DMA mode transfer */
 #endif
 
@@ -1582,8 +1615,36 @@ static void stm32_reset(FAR struct sdio_dev_s *dev)
   stm32_setpwrctrl(SDIO_POWER_PWRCTRL_ON);
   leave_critical_section(flags);
 
-  fvdbg("CLCKR: %08x POWER: %08x\n",
-        getreg32(STM32_SDIO_CLKCR), getreg32(STM32_SDIO_POWER));
+  mcinfo("CLCKR: %08x POWER: %08x\n",
+         getreg32(STM32_SDIO_CLKCR), getreg32(STM32_SDIO_POWER));
+}
+
+/****************************************************************************
+ * Name: stm32_capabilities
+ *
+ * Description:
+ *   Get capabilities (and limitations) of the SDIO driver (optional)
+ *
+ * Input Parameters:
+ *   dev   - Device-specific state data
+ *
+ * Returned Value:
+ *   Returns a bitset of status values (see SDIO_CAPS_* defines)
+ *
+ ****************************************************************************/
+
+static sdio_capset_t stm32_capabilities(FAR struct sdio_dev_s *dev)
+{
+  sdio_capset_t caps = 0;
+
+#ifdef CONFIG_STM32_SDIO_WIDTH_D1_ONLY
+  caps |= SDIO_CAPS_1BIT_ONLY;
+#endif
+#ifdef CONFIG_STM32_SDIO_DMA
+  caps |= SDIO_CAPS_DMASUPPORTED;
+#endif
+
+  return caps;
 }
 
 /****************************************************************************
@@ -1600,7 +1661,7 @@ static void stm32_reset(FAR struct sdio_dev_s *dev)
  *
  ****************************************************************************/
 
-static uint8_t stm32_status(FAR struct sdio_dev_s *dev)
+static sdio_statset_t stm32_status(FAR struct sdio_dev_s *dev)
 {
   struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
   return priv->cdstatus;
@@ -1672,7 +1733,7 @@ static void stm32_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
       /* SD normal operation clocking (wide 4-bit mode) */
 
       case CLOCK_SD_TRANSFER_4BIT:
-#ifndef CONFIG_SDIO_WIDTH_D1_ONLY
+#ifndef CONFIG_STM32_SDIO_WIDTH_D1_ONLY
         clckr = (SDIO_CLCKR_SDWIDEXFR | SDIO_CLKCR_CLKEN);
         break;
 #endif
@@ -1709,7 +1770,7 @@ static int stm32_attach(FAR struct sdio_dev_s *dev)
 
   /* Attach the SDIO interrupt handler */
 
-  ret = irq_attach(STM32_IRQ_SDIO, stm32_interrupt);
+  ret = irq_attach(STM32_IRQ_SDIO, stm32_interrupt, NULL);
   if (ret == OK)
     {
 
@@ -1729,7 +1790,7 @@ static int stm32_attach(FAR struct sdio_dev_s *dev)
 #ifdef CONFIG_ARCH_IRQPRIO
       /* Set the interrupt priority */
 
-      up_prioritize_irq(STM32_IRQ_SDIO, CONFIG_SDIO_PRI);
+      up_prioritize_irq(STM32_IRQ_SDIO, CONFIG_STM32_SDIO_PRI);
 #endif
     }
 
@@ -1795,7 +1856,7 @@ static int stm32_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t arg)
   cmdidx  = (cmd & MMCSD_CMDIDX_MASK) >> MMCSD_CMDIDX_SHIFT;
   regval |= cmdidx | SDIO_CMD_CPSMEN;
 
-  fvdbg("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
+  mcinfo("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
 
   /* Write the SDIO CMD */
 
@@ -1844,7 +1905,7 @@ static int stm32_recvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
 
   priv->buffer    = (uint32_t *)buffer;
   priv->remaining = nbytes;
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_STM32_STM32_SDIO_DMA
   priv->dmamode   = false;
 #endif
 
@@ -1898,7 +1959,7 @@ static int stm32_sendsetup(FAR struct sdio_dev_s *dev, FAR const uint8_t *buffer
 
   priv->buffer    = (uint32_t *)buffer;
   priv->remaining = nbytes;
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_STM32_STM32_SDIO_DMA
   priv->dmamode   = false;
 #endif
 
@@ -1952,7 +2013,7 @@ static int stm32_cancel(FAR struct sdio_dev_s *dev)
 
   /* If this was a DMA transfer, make sure that DMA is stopped */
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_STM32_SDIO_DMA
   if (priv->dmamode)
     {
       /* Make sure that the DMA is stopped (it will be stopped automatically
@@ -2025,7 +2086,7 @@ static int stm32_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
     {
       if (--timeout <= 0)
         {
-          fdbg("ERROR: Timeout cmd: %08x events: %08x STA: %08x\n",
+          mcerr("ERROR: Timeout cmd: %08x events: %08x STA: %08x\n",
                cmd, events, getreg32(STM32_SDIO_STA));
 
           return -ETIMEDOUT;
@@ -2060,7 +2121,7 @@ static int stm32_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
 
 static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *rshort)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_MEMCARD_INFO
   uint32_t respcmd;
 #endif
   uint32_t regval;
@@ -2089,10 +2150,10 @@ static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
    */
 
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_MEMCARD_INFO
   if (!rshort)
     {
-      fdbg("ERROR: rshort=NULL\n");
+      mcerr("ERROR: rshort=NULL\n");
       ret = -EINVAL;
     }
 
@@ -2102,7 +2163,7 @@ static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
            (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R1B_RESPONSE &&
            (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R6_RESPONSE)
     {
-      fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+      mcerr("ERROR: Wrong response CMD=%08x\n", cmd);
       ret = -EINVAL;
     }
   else
@@ -2113,15 +2174,15 @@ static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
       regval = getreg32(STM32_SDIO_STA);
       if ((regval & SDIO_STA_CTIMEOUT) != 0)
         {
-          fdbg("ERROR: Command timeout: %08x\n", regval);
+          mcerr("ERROR: Command timeout: %08x\n", regval);
           ret = -ETIMEDOUT;
         }
       else if ((regval & SDIO_STA_CCRCFAIL) != 0)
         {
-          fdbg("ERROR: CRC failure: %08x\n", regval);
+          mcerr("ERROR: CRC failure: %08x\n", regval);
           ret = -EIO;
         }
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_MEMCARD_INFO
       else
         {
           /* Check response received is of desired command */
@@ -2129,7 +2190,7 @@ static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
           respcmd = getreg32(STM32_SDIO_RESPCMD);
           if ((uint8_t)(respcmd & SDIO_RESPCMD_MASK) != (cmd & MMCSD_CMDIDX_MASK))
             {
-              fdbg("ERROR: RESCMD=%02x CMD=%08x\n", respcmd, cmd);
+              mcerr("ERROR: RESCMD=%02x CMD=%08x\n", respcmd, cmd);
               ret = -EINVAL;
             }
         }
@@ -2157,12 +2218,12 @@ static int stm32_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t rlo
    *     0         1               End bit
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_MEMCARD_INFO
   /* Check that R1 is the correct response to this command */
 
   if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R2_RESPONSE)
     {
-      fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+      mcerr("ERROR: Wrong response CMD=%08x\n", cmd);
       ret = -EINVAL;
     }
   else
@@ -2173,12 +2234,12 @@ static int stm32_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t rlo
       regval = getreg32(STM32_SDIO_STA);
       if (regval & SDIO_STA_CTIMEOUT)
         {
-          fdbg("ERROR: Timeout STA: %08x\n", regval);
+          mcerr("ERROR: Timeout STA: %08x\n", regval);
           ret = -ETIMEDOUT;
         }
       else if (regval & SDIO_STA_CCRCFAIL)
         {
-          fdbg("ERROR: CRC fail STA: %08x\n", regval);
+          mcerr("ERROR: CRC fail STA: %08x\n", regval);
           ret = -EIO;
         }
     }
@@ -2193,6 +2254,7 @@ static int stm32_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t rlo
       rlong[2] = getreg32(STM32_SDIO_RESP3);
       rlong[3] = getreg32(STM32_SDIO_RESP4);
     }
+
   return ret;
 }
 
@@ -2212,11 +2274,11 @@ static int stm32_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *r
 
   /* Check that this is the correct response to this command */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_MEMCARD_INFO
   if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R3_RESPONSE &&
       (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R7_RESPONSE)
     {
-      fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+      mcerr("ERROR: Wrong response CMD=%08x\n", cmd);
       ret = -EINVAL;
     }
   else
@@ -2229,7 +2291,7 @@ static int stm32_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *r
       regval = getreg32(STM32_SDIO_STA);
       if (regval & SDIO_STA_CTIMEOUT)
         {
-          fdbg("ERROR: Timeout STA: %08x\n", regval);
+          mcerr("ERROR: Timeout STA: %08x\n", regval);
           ret = -ETIMEDOUT;
         }
     }
@@ -2384,7 +2446,7 @@ static sdio_eventset_t stm32_eventwait(FAR struct sdio_dev_s *dev,
                        1, (uint32_t)priv);
       if (ret != OK)
         {
-          fdbg("ERROR: wd_start failed: %d\n", ret);
+          mcerr("ERROR: wd_start failed: %d\n", ret);
         }
     }
 
@@ -2434,7 +2496,7 @@ static sdio_eventset_t stm32_eventwait(FAR struct sdio_dev_s *dev,
   /* Disable event-related interrupts */
 
   stm32_configwaitints(priv, 0, 0, 0);
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_STM32_SDIO_DMA
   priv->xfrflags   = 0;
 #endif
 
@@ -2471,7 +2533,7 @@ static void stm32_callbackenable(FAR struct sdio_dev_s *dev,
 {
   struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
 
-  fvdbg("eventset: %02x\n", eventset);
+  mcinfo("eventset: %02x\n", eventset);
   DEBUGASSERT(priv != NULL);
 
   priv->cbevents = eventset;
@@ -2507,7 +2569,7 @@ static int stm32_registercallback(FAR struct sdio_dev_s *dev,
 
   /* Disable callbacks and register this callback and is argument */
 
-  fvdbg("Register %p(%p)\n", callback, arg);
+  mcinfo("Register %p(%p)\n", callback, arg);
   DEBUGASSERT(priv != NULL);
 
   priv->cbevents = 0;
@@ -2516,27 +2578,6 @@ static int stm32_registercallback(FAR struct sdio_dev_s *dev,
   return OK;
 }
 
-/****************************************************************************
- * Name: stm32_dmasupported
- *
- * Description:
- *   Return true if the hardware can support DMA
- *
- * Input Parameters:
- *   dev - An instance of the SDIO device interface
- *
- * Returned Value:
- *   true if DMA is supported.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_SDIO_DMA
-static bool stm32_dmasupported(FAR struct sdio_dev_s *dev)
-{
-  return true;
-}
-#endif
-
 /****************************************************************************
  * Name: stm32_dmapreflight
  *
@@ -2553,10 +2594,11 @@ static bool stm32_dmasupported(FAR struct sdio_dev_s *dev)
  *   OK on success; a negated errno on failure
  ****************************************************************************/
 
-#if defined(CONFIG_SDIO_DMA) && defined(CONFIG_SDIO_PREFLIGHT)
+#if defined(CONFIG_STM32_SDIO_DMA) && defined(CONFIG_SDIO_PREFLIGHT)
 static int stm32_dmapreflight(FAR struct sdio_dev_s *dev,
                               FAR const uint8_t *buffer, size_t buflen)
 {
+#if !defined(CONFIG_STM32_STM32F40XX)
   struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
 
   DEBUGASSERT(priv != NULL && buffer != NULL && buflen > 0);
@@ -2567,6 +2609,7 @@ static int stm32_dmapreflight(FAR struct sdio_dev_s *dev,
     {
       return -EINVAL;
     }
+#endif
 
   /* DMA must be possible to the buffer */
 
@@ -2598,7 +2641,7 @@ static int stm32_dmapreflight(FAR struct sdio_dev_s *dev,
  *
  ****************************************************************************/
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_STM32_SDIO_DMA
 static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
                               size_t buflen)
 {
@@ -2667,7 +2710,7 @@ static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
  *
  ****************************************************************************/
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_STM32_SDIO_DMA
 static int stm32_dmasendsetup(FAR struct sdio_dev_s *dev,
                               FAR const uint8_t *buffer, size_t buflen)
 {
@@ -2743,8 +2786,8 @@ static void stm32_callback(void *arg)
   /* Is a callback registered? */
 
   DEBUGASSERT(priv != NULL);
-  fvdbg("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
-        priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus);
+  mcinfo("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
+         priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus);
 
   if (priv->callback)
     {
@@ -2788,14 +2831,14 @@ static void stm32_callback(void *arg)
         {
           /* Yes.. queue it */
 
-           fvdbg("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
+           mcinfo("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
           (void)work_queue(HPWORK, &priv->cbwork, (worker_t)priv->callback, priv->cbarg, 0);
         }
       else
         {
           /* No.. then just call the callback here */
 
-          fvdbg("Callback to %p(%p)\n", priv->callback, priv->cbarg);
+          mcinfo("Callback to %p(%p)\n", priv->callback, priv->cbarg);
           priv->callback(priv->cbarg);
         }
     }
@@ -2847,14 +2890,24 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
   struct stm32_dev_s *priv = &g_sdiodev;
 
   /* Initialize the SDIO slot structure */
+  /* Initialize semaphores */
 
   sem_init(&priv->waitsem, 0, 0);
+
+  /* The waitsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
+
+  /* Create a watchdog timer */
+
   priv->waitwdog = wd_create();
   DEBUGASSERT(priv->waitwdog);
 
   /* Allocate a DMA channel */
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_STM32_SDIO_DMA
   priv->dma = stm32_dmachannel(SDIO_DMACHAN);
   DEBUGASSERT(priv->dma);
 #endif
@@ -2868,7 +2921,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
 
 #ifndef CONFIG_SDIO_MUXBUS
   stm32_configgpio(GPIO_SDIO_D0);
-#ifndef CONFIG_SDIO_WIDTH_D1_ONLY
+#ifndef CONFIG_STM32_SDIO_WIDTH_D1_ONLY
   stm32_configgpio(GPIO_SDIO_D1);
   stm32_configgpio(GPIO_SDIO_D2);
   stm32_configgpio(GPIO_SDIO_D3);
@@ -2907,7 +2960,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
 void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
 {
   struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
-  uint8_t cdstatus;
+  sdio_statset_t cdstatus;
   irqstate_t flags;
 
   /* Update card status */
@@ -2925,7 +2978,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
 
   leave_critical_section(flags);
 
-  fvdbg("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
+  mcinfo("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
 
   /* Perform any requested callback if the status has changed */
 
@@ -2967,7 +3020,8 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
     {
       priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED;
     }
-  fvdbg("cdstatus: %02x\n", priv->cdstatus);
+
+  mcinfo("cdstatus: %02x\n", priv->cdstatus);
   leave_critical_section(flags);
 }
 #endif /* CONFIG_STM32_SDIO */
diff --git a/arch/arm/src/stm32/stm32_serial.c b/arch/arm/src/stm32/stm32_serial.c
index eeb5a846a7b4f530dab70a9a356e0aaaac39589a..a6a2d07b51bb51b584b4b731f40c24a6e54e76d6 100644
--- a/arch/arm/src/stm32/stm32_serial.c
+++ b/arch/arm/src/stm32/stm32_serial.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32/stm32_serial.c
  *
- *   Copyright (C) 2009-2014, 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009-2014, 2016, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -70,6 +70,7 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
 /* Some sanity checks *******************************************************/
 /* DMA configuration */
 
@@ -150,7 +151,8 @@
 #    endif
 
 #  elif defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F10XX) || \
-        defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F30XX)
+        defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+        defined(CONFIG_STM32_STM32F37XX)
 
 #    if defined(CONFIG_USART1_RXDMA) || defined(CONFIG_USART2_RXDMA) || \
       defined(CONFIG_USART3_RXDMA)
@@ -187,7 +189,8 @@
 
 #  ifndef CONFIG_USART_DMAPRIO
 #    if defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F10XX) || \
-        defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+        defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+        defined(CONFIG_STM32_STM32F37XX)
 #      define CONFIG_USART_DMAPRIO  DMA_CCR_PRIMED
 #    elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
 #      define CONFIG_USART_DMAPRIO  DMA_SCR_PRIMED
@@ -196,7 +199,8 @@
 #    endif
 #  endif
 #    if defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F10XX) || \
-        defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+        defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+        defined(CONFIG_STM32_STM32F37XX)
 #    if (CONFIG_USART_DMAPRIO & ~DMA_CCR_PL_MASK) != 0
 #      error "Illegal value for CONFIG_USART_DMAPRIO"
 #    endif
@@ -208,7 +212,7 @@
 #    error "Unknown STM32 DMA"
 #  endif
 
-/* DMA control words */
+/* DMA control word */
 
 #  if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
 #    define SERIAL_DMA_CONTROL_WORD      \
@@ -220,16 +224,6 @@
                  CONFIG_USART_DMAPRIO  | \
                  DMA_SCR_PBURST_SINGLE | \
                  DMA_SCR_MBURST_SINGLE)
-#    ifdef CONFIG_SERIAL_IFLOWCONTROL
-#      define SERIAL_DMA_IFLOW_CONTROL_WORD \
-                (DMA_SCR_DIR_P2M       | \
-                 DMA_SCR_MINC          | \
-                 DMA_SCR_PSIZE_8BITS   | \
-                 DMA_SCR_MSIZE_8BITS   | \
-                 CONFIG_USART_DMAPRIO  | \
-                 DMA_SCR_PBURST_SINGLE | \
-                 DMA_SCR_MBURST_SINGLE)
-#    endif
 #  else
 #    define SERIAL_DMA_CONTROL_WORD      \
                 (DMA_CCR_CIRC          | \
@@ -237,13 +231,6 @@
                  DMA_CCR_PSIZE_8BITS   | \
                  DMA_CCR_MSIZE_8BITS   | \
                  CONFIG_USART_DMAPRIO)
-#    ifdef CONFIG_SERIAL_IFLOWCONTROL
-#      define SERIAL_DMA_IFLOW_CONTROL_WORD \
-                (DMA_CCR_MINC          | \
-                 DMA_CCR_PSIZE_8BITS   | \
-                 DMA_CCR_MSIZE_8BITS   | \
-                 CONFIG_USART_DMAPRIO)
-#    endif
 # endif
 
 #endif
@@ -328,8 +315,6 @@ struct up_dev_s
   const unsigned int rxdma_channel; /* DMA channel assigned */
 #endif
 
-  int (*const vector)(int irq, void *context); /* Interrupt handler */
-
   /* RX DMA state */
 
 #ifdef SERIAL_HAVE_DMA
@@ -354,7 +339,7 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-static int  up_interrupt_common(struct up_dev_s *dev);
+static int  up_interrupt(int irq, void *context, void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
 #ifndef SERIAL_HAVE_ONLY_DMA
 static int  up_receive(struct uart_dev_s *dev, unsigned int *status);
@@ -386,31 +371,6 @@ static int  up_pm_prepare(struct pm_callback_s *cb, int domain,
                           enum pm_state_e pmstate);
 #endif
 
-#ifdef CONFIG_STM32_USART1_SERIALDRIVER
-static int up_interrupt_usart1(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32_USART2_SERIALDRIVER
-static int up_interrupt_usart2(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32_USART3_SERIALDRIVER
-static int up_interrupt_usart3(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32_UART4_SERIALDRIVER
-static int up_interrupt_uart4(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32_UART5_SERIALDRIVER
-static int up_interrupt_uart5(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32_USART6_SERIALDRIVER
-static int up_interrupt_usart6(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32_UART7_SERIALDRIVER
-static int up_interrupt_uart7(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32_UART8_SERIALDRIVER
-static int up_interrupt_uart8(int irq, void *context);
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
@@ -556,7 +516,11 @@ static struct up_dev_s g_usart1priv =
   .bits          = CONFIG_USART1_BITS,
   .stopbits2     = CONFIG_USART1_2STOP,
   .baud          = CONFIG_USART1_BAUD,
+#if defined(CONFIG_STM32_STM32F33XX)
+  .apbclock      = STM32_PCLK1_FREQUENCY, /* Errata 2.5.1 */
+#else
   .apbclock      = STM32_PCLK2_FREQUENCY,
+#endif
   .usartbase     = STM32_USART1_BASE,
   .tx_gpio       = GPIO_USART1_TX,
   .rx_gpio       = GPIO_USART1_RX,
@@ -572,7 +536,6 @@ static struct up_dev_s g_usart1priv =
   .rxdma_channel = DMAMAP_USART1_RX,
   .rxfifo        = g_usart1rxfifo,
 #endif
-  .vector        = up_interrupt_usart1,
 
 #ifdef CONFIG_USART1_RS485
   .rs485_dir_gpio = GPIO_USART1_RS485_DIR,
@@ -634,7 +597,6 @@ static struct up_dev_s g_usart2priv =
   .rxdma_channel = DMAMAP_USART2_RX,
   .rxfifo        = g_usart2rxfifo,
 #endif
-  .vector        = up_interrupt_usart2,
 
 #ifdef CONFIG_USART2_RS485
   .rs485_dir_gpio = GPIO_USART2_RS485_DIR,
@@ -696,7 +658,6 @@ static struct up_dev_s g_usart3priv =
   .rxdma_channel = DMAMAP_USART3_RX,
   .rxfifo        = g_usart3rxfifo,
 #endif
-  .vector        = up_interrupt_usart3,
 
 #ifdef CONFIG_USART3_RS485
   .rs485_dir_gpio = GPIO_USART3_RS485_DIR,
@@ -762,7 +723,6 @@ static struct up_dev_s g_uart4priv =
   .rxdma_channel = DMAMAP_UART4_RX,
   .rxfifo        = g_uart4rxfifo,
 #endif
-  .vector        = up_interrupt_uart4,
 
 #ifdef CONFIG_UART4_RS485
   .rs485_dir_gpio = GPIO_UART4_RS485_DIR,
@@ -828,7 +788,6 @@ static struct up_dev_s g_uart5priv =
   .rxdma_channel = DMAMAP_UART5_RX,
   .rxfifo        = g_uart5rxfifo,
 #endif
-  .vector         = up_interrupt_uart5,
 
 #ifdef CONFIG_UART5_RS485
   .rs485_dir_gpio = GPIO_UART5_RS485_DIR,
@@ -890,7 +849,6 @@ static struct up_dev_s g_usart6priv =
   .rxdma_channel = DMAMAP_USART6_RX,
   .rxfifo        = g_usart6rxfifo,
 #endif
-  .vector         = up_interrupt_usart6,
 
 #ifdef CONFIG_USART6_RS485
   .rs485_dir_gpio = GPIO_USART6_RS485_DIR,
@@ -952,7 +910,6 @@ static struct up_dev_s g_uart7priv =
   .rxdma_channel = DMAMAP_UART7_RX,
   .rxfifo        = g_uart7rxfifo,
 #endif
-  .vector         = up_interrupt_uart7,
 
 #ifdef CONFIG_UART7_RS485
   .rs485_dir_gpio = GPIO_UART7_RS485_DIR,
@@ -1014,7 +971,6 @@ static struct up_dev_s g_uart8priv =
   .rxdma_channel = DMAMAP_UART8_RX,
   .rxfifo        = g_uart8rxfifo,
 #endif
-  .vector         = up_interrupt_uart8,
 
 #ifdef CONFIG_UART8_RS485
   .rs485_dir_gpio = GPIO_UART8_RS485_DIR,
@@ -1189,18 +1145,29 @@ static int up_dma_nextrx(struct up_dev_s *priv)
 static void up_set_format(struct uart_dev_s *dev)
 {
   struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+    defined(CONFIG_STM32_STM32F37XX)
+  uint32_t usartdiv8;
+#else
+  uint32_t usartdiv32;
+  uint32_t mantissa;
+  uint32_t fraction;
+#endif
   uint32_t regval;
+  uint32_t brr;
 
-#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
-  /* This first implementation is for U[S]ARTs that support oversampling
-   * by 8 in additional to the standard oversampling by 16.
-   */
+  /* Load CR1 */
 
-  uint32_t usartdiv8;
-  uint32_t cr1;
-  uint32_t brr;
+  regval = up_serialin(priv, STM32_USART_CR1_OFFSET);
 
-  /* In case of oversampling by 8, the equation is:
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX)|| \
+    defined(CONFIG_STM32_STM32F37XX)
+  /* This first implementation is for U[S]ARTs that support oversampling
+   * by 8 in additional to the standard oversampling by 16.
+   * With baud rate of fCK / Divider for oversampling by 16.
+   * and baud rate of  2 * fCK / Divider for oversampling by 8
+   *
+   * In case of oversampling by 8, the equation is:
    *
    *   baud      = 2 * fCK / usartdiv8
    *   usartdiv8 = 2 * fCK / baud
@@ -1214,11 +1181,10 @@ static void up_set_format(struct uart_dev_s *dev)
    *   baud       = fCK / usartdiv16
    *   usartdiv16 = fCK / baud
    *              = 2 * usartdiv8
+   *
+   * Use oversamply by 8 only if the divisor is small.  But what is small?
    */
 
-  /* Use oversamply by 8 only if the divisor is small.  But what is small? */
-
-  cr1 = up_serialin(priv, STM32_USART_CR1_OFFSET);
   if (usartdiv8 > 100)
     {
       /* Use usartdiv16 */
@@ -1227,7 +1193,7 @@ static void up_set_format(struct uart_dev_s *dev)
 
       /* Clear oversampling by 8 to enable oversampling by 16 */
 
-      cr1 &= ~USART_CR1_OVER8;
+      regval &= ~USART_CR1_OVER8;
     }
   else
     {
@@ -1239,24 +1205,14 @@ static void up_set_format(struct uart_dev_s *dev)
 
       /* Set oversampling by 8 */
 
-      cr1 |= USART_CR1_OVER8;
+      regval |= USART_CR1_OVER8;
     }
 
-   up_serialout(priv, STM32_USART_CR1_OFFSET, cr1);
-   up_serialout(priv, STM32_USART_BRR_OFFSET, brr);
-
 #else
-
   /* This second implementation is for U[S]ARTs that support fractional
    * dividers.
-   */
-
-  uint32_t usartdiv32;
-  uint32_t mantissa;
-  uint32_t fraction;
-  uint32_t brr;
-
-  /* Configure the USART Baud Rate.  The baud rate for the receiver and
+   *
+   * Configure the USART Baud Rate.  The baud rate for the receiver and
    * transmitter (Rx and Tx) are both set to the same value as programmed
    * in the Mantissa and Fraction values of USARTDIV.
    *
@@ -1272,23 +1228,55 @@ static void up_set_format(struct uart_dev_s *dev)
    *   usartdiv32 = 32 * usartdiv = fCK / (baud/2)
    */
 
-   usartdiv32 = priv->apbclock / (priv->baud >> 1);
+  usartdiv32 = priv->apbclock / (priv->baud >> 1);
 
   /* The mantissa part is then */
 
   mantissa   = usartdiv32 >> 5;
-  brr        = mantissa << USART_BRR_MANT_SHIFT;
 
   /* The fractional remainder (with rounding) */
 
   fraction   = (usartdiv32 - (mantissa << 5) + 1) >> 1;
-  brr       |= fraction << USART_BRR_FRAC_SHIFT;
-  up_serialout(priv, STM32_USART_BRR_OFFSET, brr);
+
+#if defined(CONFIG_STM32_STM32F40XX)
+  /* The F4 supports 8 X in oversampling additional to the
+   * standard oversampling by 16.
+   *
+   * With baud rate of fCK / (16 * Divider) for oversampling by 16.
+   * and baud rate of  fCK /  (8 * Divider) for oversampling by 8
+   */
+
+  /* Check if 8x oversampling is necessary */
+
+  if (mantissa == 0)
+    {
+      regval |= USART_CR1_OVER8;
+
+      /* Rescale the mantissa */
+
+      mantissa = usartdiv32 >> 4;
+
+      /* The fractional remainder (with rounding) */
+
+      fraction = (usartdiv32 - (mantissa << 4) + 1) >> 1;
+    }
+  else
+    {
+      /* Use 16x Oversampling */
+
+      regval &= ~USART_CR1_OVER8;
+    }
+#endif
+
+  brr  = mantissa << USART_BRR_MANT_SHIFT;
+  brr |= fraction << USART_BRR_FRAC_SHIFT;
 #endif
 
+  up_serialout(priv, STM32_USART_CR1_OFFSET, regval);
+  up_serialout(priv, STM32_USART_BRR_OFFSET, brr);
+
   /* Configure parity mode */
 
-  regval  = up_serialin(priv, STM32_USART_CR1_OFFSET);
   regval &= ~(USART_CR1_PCE | USART_CR1_PS | USART_CR1_M);
 
   if (priv->parity == 1)       /* Odd parity */
@@ -1334,7 +1322,8 @@ static void up_set_format(struct uart_dev_s *dev)
   regval  = up_serialin(priv, STM32_USART_CR3_OFFSET);
   regval &= ~(USART_CR3_CTSE | USART_CR3_RTSE);
 
-#if defined(CONFIG_SERIAL_IFLOWCONTROL) && !defined(CONFIG_STM32_FLOWCONTROL_BROKEN)
+#if defined(CONFIG_SERIAL_IFLOWCONTROL) && \
+   !defined(CONFIG_STM32_FLOWCONTROL_BROKEN)
   if (priv->iflow && (priv->rts_gpio != 0))
     {
       regval |= USART_CR3_RTSE;
@@ -1577,28 +1566,13 @@ static int up_dma_setup(struct uart_dev_s *dev)
 
   priv->rxdma = stm32_dmachannel(priv->rxdma_channel);
 
-#ifdef CONFIG_SERIAL_IFLOWCONTROL
-  if (priv->iflow)
-    {
-      /* Configure for non-circular DMA reception into the RX FIFO */
+  /* Configure for circular DMA reception into the RX fifo */
 
-      stm32_dmasetup(priv->rxdma,
-                     priv->usartbase + STM32_USART_RDR_OFFSET,
-                     (uint32_t)priv->rxfifo,
-                     RXDMA_BUFFER_SIZE,
-                     SERIAL_DMA_IFLOW_CONTROL_WORD);
-    }
-  else
-#endif
-    {
-      /* Configure for circular DMA reception into the RX FIFO */
-
-      stm32_dmasetup(priv->rxdma,
-                     priv->usartbase + STM32_USART_RDR_OFFSET,
-                     (uint32_t)priv->rxfifo,
-                     RXDMA_BUFFER_SIZE,
-                     SERIAL_DMA_CONTROL_WORD);
-    }
+  stm32_dmasetup(priv->rxdma,
+                 priv->usartbase + STM32_USART_RDR_OFFSET,
+                 (uint32_t)priv->rxfifo,
+                 RXDMA_BUFFER_SIZE,
+                 SERIAL_DMA_CONTROL_WORD);
 
   /* Reset our DMA shadow pointer to match the address just
    * programmed above.
@@ -1612,26 +1586,12 @@ static int up_dma_setup(struct uart_dev_s *dev)
   regval |= USART_CR3_DMAR;
   up_serialout(priv, STM32_USART_CR3_OFFSET, regval);
 
-#ifdef CONFIG_SERIAL_IFLOWCONTROL
-  if (priv->iflow)
-    {
-      /* Start the DMA channel, and arrange for callbacks at the full point
-       * in the FIFO. After buffer gets full, hardware flow-control kicks
-       * in and DMA transfer is stopped.
-       */
-
-      stm32_dmastart(priv->rxdma, up_dma_rxcallback, (void *)priv, false);
-    }
-  else
-#endif
-    {
-      /* Start the DMA channel, and arrange for callbacks at the half and
-       * full points in the FIFO.  This ensures that we have half a FIFO
-       * worth of time to claim bytes before they are overwritten.
-       */
+  /* Start the DMA channel, and arrange for callbacks at the half and
+   * full points in the FIFO.  This ensures that we have half a FIFO
+   * worth of time to claim bytes before they are overwritten.
+   */
 
-      stm32_dmastart(priv->rxdma, up_dma_rxcallback, (void *)priv, true);
-    }
+  stm32_dmastart(priv->rxdma, up_dma_rxcallback, (void *)priv, true);
 
   return OK;
 }
@@ -1749,7 +1709,7 @@ static int up_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, priv->vector);
+  ret = irq_attach(priv->irq, up_interrupt, priv);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
@@ -1758,6 +1718,7 @@ static int up_attach(struct uart_dev_s *dev)
 
       up_enable_irq(priv->irq);
     }
+
   return ret;
 }
 
@@ -1779,7 +1740,7 @@ static void up_detach(struct uart_dev_s *dev)
 }
 
 /****************************************************************************
- * Name: up_interrupt_common
+ * Name: up_interrupt
  *
  * Description:
  *   This is the USART interrupt handler.  It will be invoked when an
@@ -1790,11 +1751,14 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_interrupt_common(struct up_dev_s *priv)
+static int up_interrupt(int irq, void *context, void *arg)
 {
+  struct up_dev_s *priv = (struct up_dev_s *)arg;
   int  passes;
   bool handled;
 
+  DEBUGASSERT(priv != NULL);
+
   /* Report serial activity to the power management logic */
 
 #if defined(CONFIG_PM) && CONFIG_PM_SERIAL_ACTIVITY > 0
@@ -1869,7 +1833,8 @@ static int up_interrupt_common(struct up_dev_s *priv)
 
       else if ((priv->sr & (USART_SR_ORE | USART_SR_NE | USART_SR_FE)) != 0)
         {
-#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+    defined(CONFIG_STM32_STM32F37XX)
           /* These errors are cleared by writing the corresponding bit to the
            * interrupt clear register (ICR).
            */
@@ -1914,11 +1879,11 @@ static int up_interrupt_common(struct up_dev_s *priv)
 static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
 {
 #if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_SERIAL_TIOCSERGSTRUCT) \
-    || defined(CONFIG_STM32F7_SERIALBRK_BSDCOMPAT)
+    || defined(CONFIG_STM32_SERIALBRK_BSDCOMPAT)
   struct inode      *inode = filep->f_inode;
   struct uart_dev_s *dev   = inode->i_private;
 #endif
-#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_STM32F7_SERIALBRK_BSDCOMPAT)
+#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_STM32_SERIALBRK_BSDCOMPAT)
   struct up_dev_s   *priv  = (struct up_dev_s *)dev->priv;
 #endif
   int                ret    = OK;
@@ -2285,9 +2250,9 @@ static bool up_rxflowcontrol(struct uart_dev_s *dev,
                              unsigned int nbuffered, bool upper)
 {
   struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+  uint16_t ie;
 
-#if defined(CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS) && \
-    defined(CONFIG_STM32_FLOWCONTROL_BROKEN)
+#if defined(CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS) && defined(CONFIG_STM32_FLOWCONTROL_BROKEN)
   if (priv->iflow && (priv->rts_gpio != 0))
     {
       /* Assert/de-assert nRTS set it high resume/stop sending */
@@ -2315,7 +2280,9 @@ static bool up_rxflowcontrol(struct uart_dev_s *dev,
            * enable Rx interrupts.
            */
 
-          uart_disablerxint(dev);
+          ie = priv->ie;
+          ie &= ~USART_CR1_RXNEIE;
+          up_restoreusartint(priv, ie);
           return true;
         }
 
@@ -2328,7 +2295,7 @@ static bool up_rxflowcontrol(struct uart_dev_s *dev,
            * received.
            */
 
-          uart_enablerxint(dev);
+          up_rxint(dev, true);
         }
     }
 #endif
@@ -2360,18 +2327,7 @@ static int up_dma_receive(struct uart_dev_s *dev, unsigned int *status)
       priv->rxdmanext++;
       if (priv->rxdmanext == RXDMA_BUFFER_SIZE)
         {
-#ifdef CONFIG_SERIAL_IFLOWCONTROL
-          if (priv->iflow)
-            {
-              /* RX DMA buffer full. RX paused, RTS line pulled up to prevent
-               * more input data from other end.
-               */
-            }
-          else
-#endif
-            {
-              priv->rxdmanext = 0;
-            }
+          priv->rxdmanext = 0;
         }
     }
 
@@ -2379,40 +2335,6 @@ static int up_dma_receive(struct uart_dev_s *dev, unsigned int *status)
 }
 #endif
 
-/****************************************************************************
- * Name: up_dma_reenable
- *
- * Description:
- *   Call to re-enable RX DMA.
- *
- ****************************************************************************/
-
-#if defined(SERIAL_HAVE_DMA) && defined(CONFIG_SERIAL_IFLOWCONTROL)
-static void up_dma_reenable(struct up_dev_s *priv)
-{
-  /* Configure for non-circular DMA reception into the RX fifo */
-
-  stm32_dmasetup(priv->rxdma,
-                 priv->usartbase + STM32_USART_RDR_OFFSET,
-                 (uint32_t)priv->rxfifo,
-                 RXDMA_BUFFER_SIZE,
-                 SERIAL_DMA_IFLOW_CONTROL_WORD);
-
-  /* Reset our DMA shadow pointer to match the address just
-   * programmed above.
-   */
-
-  priv->rxdmanext = 0;
-
-  /* Start the DMA channel, and arrange for callbacks at the full point in
-   * the FIFO. After buffer gets full, hardware flow-control kicks in and
-   * DMA transfer is stopped.
-   */
-
-  stm32_dmastart(priv->rxdma, up_dma_rxcallback, (void *)priv, false);
-}
-#endif
-
 /****************************************************************************
  * Name: up_dma_rxint
  *
@@ -2435,15 +2357,6 @@ static void up_dma_rxint(struct uart_dev_s *dev, bool enable)
    */
 
   priv->rxenable = enable;
-
-#ifdef CONFIG_SERIAL_IFLOWCONTROL
-  if (priv->iflow && priv->rxenable && (priv->rxdmanext == RXDMA_BUFFER_SIZE))
-    {
-      /* Re-enable RX DMA. */
-
-      up_dma_reenable(priv);
-    }
-#endif
 }
 #endif
 
@@ -2479,14 +2392,10 @@ static bool up_dma_rxavailable(struct uart_dev_s *dev)
 static void up_send(struct uart_dev_s *dev, int ch)
 {
   struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
-
 #ifdef HAVE_RS485
   if (priv->rs485_dir_gpio != 0)
-    {
-      stm32_gpiowrite(priv->rs485_dir_gpio, priv->rs485_dir_polarity);
-    }
+    stm32_gpiowrite(priv->rs485_dir_gpio, priv->rs485_dir_polarity);
 #endif
-
   up_serialout(priv, STM32_USART_TDR_OFFSET, (uint32_t)ch);
 }
 
@@ -2571,70 +2480,6 @@ static bool up_txready(struct uart_dev_s *dev)
   return ((up_serialin(priv, STM32_USART_SR_OFFSET) & USART_SR_TXE) != 0);
 }
 
-/****************************************************************************
- * Name: up_interrupt_u[s]art[n]
- *
- * Description:
- *   Interrupt handlers for U[S]ART[n] where n=1,..,6.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_STM32_USART1_SERIALDRIVER
-static int up_interrupt_usart1(int irq, void *context)
-{
-  return up_interrupt_common(&g_usart1priv);
-}
-#endif
-
-#ifdef CONFIG_STM32_USART2_SERIALDRIVER
-static int up_interrupt_usart2(int irq, void *context)
-{
-  return up_interrupt_common(&g_usart2priv);
-}
-#endif
-
-#ifdef CONFIG_STM32_USART3_SERIALDRIVER
-static int up_interrupt_usart3(int irq, void *context)
-{
-  return up_interrupt_common(&g_usart3priv);
-}
-#endif
-
-#ifdef CONFIG_STM32_UART4_SERIALDRIVER
-static int up_interrupt_uart4(int irq, void *context)
-{
-  return up_interrupt_common(&g_uart4priv);
-}
-#endif
-
-#ifdef CONFIG_STM32_UART5_SERIALDRIVER
-static int up_interrupt_uart5(int irq, void *context)
-{
-  return up_interrupt_common(&g_uart5priv);
-}
-#endif
-
-#ifdef CONFIG_STM32_USART6_SERIALDRIVER
-static int up_interrupt_usart6(int irq, void *context)
-{
-  return up_interrupt_common(&g_usart6priv);
-}
-#endif
-
-#ifdef CONFIG_STM32_UART7_SERIALDRIVER
-static int up_interrupt_uart7(int irq, void *context)
-{
-  return up_interrupt_common(&g_uart7priv);
-}
-#endif
-
-#ifdef CONFIG_STM32_UART8_SERIALDRIVER
-static int up_interrupt_uart8(int irq, void *context)
-{
-  return up_interrupt_common(&g_uart8priv);
-}
-#endif
-
 /****************************************************************************
  * Name: up_dma_rxcallback
  *
@@ -2652,16 +2497,6 @@ static void up_dma_rxcallback(DMA_HANDLE handle, uint8_t status, void *arg)
   if (priv->rxenable && up_dma_rxavailable(&priv->dev))
     {
       uart_recvchars(&priv->dev);
-
-#ifdef CONFIG_SERIAL_IFLOWCONTROL
-      if (priv->iflow && priv->rxenable &&
-          (priv->rxdmanext == RXDMA_BUFFER_SIZE))
-        {
-          /* Re-enable RX DMA. */
-
-          up_dma_reenable(priv);
-        }
-#endif
     }
 }
 #endif
@@ -2760,6 +2595,7 @@ static void up_pm_notify(struct pm_callback_s *cb, int domain,
  *              return non-zero values when reverting back to higher power
  *              consumption modes!
  *
+ *
  ****************************************************************************/
 
 #ifdef CONFIG_PM
@@ -2975,7 +2811,7 @@ void stm32_serial_dma_poll(void)
  * Name: up_putc
  *
  * Description:
- *   Provide priority, low-level access to support OS debug  writes
+ *   Provide priority, low-level access to support OS debug writes
  *
  ****************************************************************************/
 
diff --git a/arch/arm/src/stm32/stm32_spi.c b/arch/arm/src/stm32/stm32_spi.c
index eed9ea9845b58d849bee1db75454ebed984b1e52..3a4a7c8bf98781affbe7870e31c540bfaf4ca8b6 100644
--- a/arch/arm/src/stm32/stm32_spi.c
+++ b/arch/arm/src/stm32/stm32_spi.c
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arm/arm/src/stm32/stm32_spi.c
+ * arch/arm/src/stm32/stm32_spi.c
  *
  *   Copyright (C) 2009-2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -70,6 +70,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -132,8 +133,8 @@
 
 /* DMA channel configuration */
 
-#if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32L15XX)
+#if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32L15XX) || \
+    defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
 #  define SPI_RXDMA16_CONFIG        (SPI_DMA_PRIO|DMA_CCR_MSIZE_16BITS|DMA_CCR_PSIZE_16BITS|DMA_CCR_MINC            )
 #  define SPI_RXDMA8_CONFIG         (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS |DMA_CCR_MINC            )
 #  define SPI_RXDMA16NULL_CONFIG    (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_16BITS                         )
@@ -155,27 +156,6 @@
 #  error "Unknown STM32 DMA"
 #endif
 
-
-/* Debug ****************************************************************************/
-/* Check if (non-standard) SPI debug is enabled */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_SPI
-#endif
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /************************************************************************************
  * Private Types
  ************************************************************************************/
@@ -203,7 +183,7 @@ struct stm32_spidev_s
   sem_t            exclsem;    /* Held while chip is selected for mutual exclusion */
   uint32_t         frequency;  /* Requested clock frequency */
   uint32_t         actual;     /* Actual clock frequency */
-  int8_t           nbits;      /* Width of word in bits (8 or 16) */
+  uint8_t          nbits;      /* Width of word in bits (4 through 16) */
   uint8_t          mode;       /* Mode 0,1,2,3 */
 };
 
@@ -214,8 +194,15 @@ struct stm32_spidev_s
 /* Helpers */
 
 static inline uint16_t spi_getreg(FAR struct stm32_spidev_s *priv, uint8_t offset);
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+static inline uint8_t spi_getreg8(FAR struct stm32_spidev_s *priv, uint8_t offset);
+#endif
 static inline void spi_putreg(FAR struct stm32_spidev_s *priv, uint8_t offset,
                                  uint16_t value);
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+static inline void spi_putreg8(FAR struct stm32_spidev_s *priv, uint8_t offset,
+                                 uint8_t value);
+#endif
 static inline uint16_t spi_readword(FAR struct stm32_spidev_s *priv);
 static inline void spi_writeword(FAR struct stm32_spidev_s *priv, uint16_t byte);
 static inline bool spi_16bitmode(FAR struct stm32_spidev_s *priv);
@@ -243,6 +230,10 @@ static int         spi_lock(FAR struct spi_dev_s *dev, bool lock);
 static uint32_t    spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
 static void        spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
 static void        spi_setbits(FAR struct spi_dev_s *dev, int nbits);
+#ifdef CONFIG_SPI_HWFEATURES
+static int         spi_hwfeatures(FAR struct spi_dev_s *dev,
+                                  spi_hwfeatures_t features);
+#endif
 static uint16_t    spi_send(FAR struct spi_dev_s *dev, uint16_t wd);
 static void        spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
                                 FAR void *rxbuffer, size_t nwords);
@@ -270,7 +261,7 @@ static const struct spi_ops_s g_sp1iops =
   .setmode           = spi_setmode,
   .setbits           = spi_setbits,
 #ifdef CONFIG_SPI_HWFEATURES
-  .hwfeatures        = 0,                   /* Not supported */
+  .hwfeatures        = spi_hwfeatures,
 #endif
   .status            = stm32_spi1status,
 #ifdef CONFIG_SPI_CMDDATA
@@ -313,6 +304,9 @@ static const struct spi_ops_s g_sp2iops =
   .setfrequency      = spi_setfrequency,
   .setmode           = spi_setmode,
   .setbits           = spi_setbits,
+#ifdef CONFIG_SPI_HWFEATURES
+  .hwfeatures        = spi_hwfeatures,
+#endif
   .status            = stm32_spi2status,
 #ifdef CONFIG_SPI_CMDDATA
   .cmddata           = stm32_spi2cmddata,
@@ -354,6 +348,9 @@ static const struct spi_ops_s g_sp3iops =
   .setfrequency      = spi_setfrequency,
   .setmode           = spi_setmode,
   .setbits           = spi_setbits,
+#ifdef CONFIG_SPI_HWFEATURES
+  .hwfeatures        = spi_hwfeatures,
+#endif
   .status            = stm32_spi3status,
 #ifdef CONFIG_SPI_CMDDATA
   .cmddata           = stm32_spi3cmddata,
@@ -395,6 +392,9 @@ static const struct spi_ops_s g_sp4iops =
   .setfrequency      = spi_setfrequency,
   .setmode           = spi_setmode,
   .setbits           = spi_setbits,
+#ifdef CONFIG_SPI_HWFEATURES
+  .hwfeatures        = spi_hwfeatures,
+#endif
   .status            = stm32_spi4status,
 #ifdef CONFIG_SPI_CMDDATA
   .cmddata           = stm32_spi4cmddata,
@@ -436,6 +436,9 @@ static const struct spi_ops_s g_sp5iops =
   .setfrequency      = spi_setfrequency,
   .setmode           = spi_setmode,
   .setbits           = spi_setbits,
+#ifdef CONFIG_SPI_HWFEATURES
+  .hwfeatures        = spi_hwfeatures,
+#endif
   .status            = stm32_spi5status,
 #ifdef CONFIG_SPI_CMDDATA
   .cmddata           = stm32_spi5cmddata,
@@ -477,6 +480,9 @@ static const struct spi_ops_s g_sp6iops =
   .setfrequency      = spi_setfrequency,
   .setmode           = spi_setmode,
   .setbits           = spi_setbits,
+#ifdef CONFIG_SPI_HWFEATURES
+  .hwfeatures        = spi_hwfeatures,
+#endif
   .status            = stm32_spi6status,
 #ifdef CONFIG_SPI_CMDDATA
   .cmddata           = stm32_spi3cmddata,
@@ -510,10 +516,6 @@ static struct stm32_spidev_s g_spi6dev =
 };
 #endif
 
-/************************************************************************************
- * Public Data
- ************************************************************************************/
-
 /************************************************************************************
  * Private Functions
  ************************************************************************************/
@@ -538,6 +540,28 @@ static inline uint16_t spi_getreg(FAR struct stm32_spidev_s *priv, uint8_t offse
   return getreg16(priv->spibase + offset);
 }
 
+/************************************************************************************
+ * Name: spi_getreg8
+ *
+ * Description:
+ *   Get the contents of the SPI register at offset
+ *
+ * Input Parameters:
+ *   priv   - private SPI device structure
+ *   offset - offset to the register of interest
+ *
+ * Returned Value:
+ *   The contents of the 16-bit register
+ *
+ ************************************************************************************/
+
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+static inline uint8_t spi_getreg8(FAR struct stm32_spidev_s *priv, uint8_t offset)
+{
+  return getreg8(priv->spibase + offset);
+}
+#endif
+
 /************************************************************************************
  * Name: spi_putreg
  *
@@ -559,6 +583,30 @@ static inline void spi_putreg(FAR struct stm32_spidev_s *priv, uint8_t offset, u
   putreg16(value, priv->spibase + offset);
 }
 
+/************************************************************************************
+ * Name: spi_putreg8
+ *
+ * Description:
+ *   Write an 8-bit value to the SPI register at offset
+ *
+ * Input Parameters:
+ *   priv   - private SPI device structure
+ *   offset - offset to the register of interest
+ *   value  - the 16-bit value to be written
+ *
+ * Returned Value:
+ *   The contents of the 16-bit register
+ *
+ ************************************************************************************/
+
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+static inline void spi_putreg8(FAR struct stm32_spidev_s *priv, uint8_t offset,
+                                 uint8_t value)
+{
+  putreg8(value, priv->spibase + offset);
+}
+#endif
+
 /************************************************************************************
  * Name: spi_readword
  *
@@ -581,7 +629,27 @@ static inline uint16_t spi_readword(FAR struct stm32_spidev_s *priv)
 
   /* Then return the received byte */
 
-  return spi_getreg(priv, STM32_SPI_DR_OFFSET);
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+  /* "When the data frame size fits into one byte (less than or equal to 8 bits),
+   *  data packing is used automatically when any read or write 16-bit access is
+   *  performed on the SPIx_DR register. The double data frame pattern is handled
+   *  in parallel in this case. At first, the SPI operates using the pattern
+   *  stored in the LSB of the accessed word, then with the other half stored in
+   *  the MSB.... The receiver then has to access both data frames by a single
+   *  16-bit read of SPIx_DR as a response to this single RXNE event. The RxFIFO
+   *  threshold setting and the following read access must be always kept aligned
+   *  at the receiver side, as data can be lost if it is not in line."
+   */
+
+  if (priv->nbits < 9)
+    {
+      return (uint16_t)spi_getreg8(priv, STM32_SPI_DR_OFFSET);
+    }
+  else
+#endif
+    {
+      return spi_getreg(priv, STM32_SPI_DR_OFFSET);
+    }
 }
 
 /************************************************************************************
@@ -605,9 +673,35 @@ static inline void spi_writeword(FAR struct stm32_spidev_s *priv, uint16_t word)
 
   while ((spi_getreg(priv, STM32_SPI_SR_OFFSET) & SPI_SR_TXE) == 0);
 
-  /* Then send the byte */
+  /* Then send the word */
+
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+  /* "When the data frame size fits into one byte (less than or equal to 8 bits),
+   *  data packing is used automatically when any read or write 16-bit access is
+   *  performed on the SPIx_DR register. The double data frame pattern is handled
+   *  in parallel in this case. At first, the SPI operates using the pattern
+   *  stored in the LSB of the accessed word, then with the other half stored in
+   *  the MSB...
+   *
+   *  "A specific problem appears if an odd number of such "fit into one byte"
+   *   data frames must be handled. On the transmitter side, writing the last
+   *   data frame of any odd sequence with an 8-bit access to SPIx_DR is enough.
+   *   ..."
+   *
+   * REVISIT: "...The receiver has to change the Rx_FIFO threshold level for the
+   * last data frame received in the odd sequence of frames in order to generate
+   * the RXNE event."
+   */
 
-  spi_putreg(priv, STM32_SPI_DR_OFFSET, word);
+  if (priv->nbits < 9)
+    {
+      spi_putreg8(priv, STM32_SPI_DR_OFFSET, (uint8_t)word);
+    }
+  else
+#endif
+    {
+      spi_putreg(priv, STM32_SPI_DR_OFFSET, word);
+    }
 }
 
 /************************************************************************************
@@ -626,7 +720,11 @@ static inline void spi_writeword(FAR struct stm32_spidev_s *priv, uint16_t word)
 
 static inline bool spi_16bitmode(FAR struct stm32_spidev_s *priv)
 {
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+  return (priv->nbits > 8);
+#else
   return ((spi_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_DFF) != 0);
+#endif
 }
 
 /************************************************************************************
@@ -899,7 +997,8 @@ static inline void spi_dmatxstart(FAR struct stm32_spidev_s *priv)
  *
  ************************************************************************************/
 
-static void spi_modifycr1(FAR struct stm32_spidev_s *priv, uint16_t setbits, uint16_t clrbits)
+static void spi_modifycr1(FAR struct stm32_spidev_s *priv, uint16_t setbits,
+                          uint16_t clrbits)
 {
   uint16_t cr1;
   cr1 = spi_getreg(priv, STM32_SPI_CR1_OFFSET);
@@ -908,6 +1007,35 @@ static void spi_modifycr1(FAR struct stm32_spidev_s *priv, uint16_t setbits, uin
   spi_putreg(priv, STM32_SPI_CR1_OFFSET, cr1);
 }
 
+/************************************************************************************
+ * Name: spi_modifycr2
+ *
+ * Description:
+ *   Clear and set bits in the CR2 register
+ *
+ * Input Parameters:
+ *   priv    - Device-specific state data
+ *   clrbits - The bits to clear
+ *   setbits - The bits to set
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) || \
+    defined(CONFIG_STM32_SPI_DMA)
+static void spi_modifycr2(FAR struct stm32_spidev_s *priv, uint16_t setbits,
+                          uint16_t clrbits)
+{
+  uint16_t cr2;
+  cr2  = spi_getreg(priv, STM32_SPI_CR2_OFFSET);
+  cr2 &= ~clrbits;
+  cr2 |= setbits;
+  spi_putreg(priv, STM32_SPI_CR2_OFFSET, cr2);
+}
+#endif
+
 /************************************************************************************
  * Name: spi_lock
  *
@@ -1052,7 +1180,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
        * faster.
        */
 
-      spivdbg("Frequency %d->%d\n", frequency, actual);
+      spiinfo("Frequency %d->%d\n", frequency, actual);
 
       priv->frequency = frequency;
       priv->actual    = actual;
@@ -1082,7 +1210,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
   uint16_t setbits;
   uint16_t clrbits;
 
-  spivdbg("mode=%d\n", mode);
+  spiinfo("mode=%d\n", mode);
 
   /* Has the mode changed? */
 
@@ -1147,34 +1275,54 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
   uint16_t setbits;
   uint16_t clrbits;
 
-  spivdbg("nbits=%d\n", nbits);
+  spiinfo("nbits=%d\n", nbits);
 
   /* Has the number of bits changed? */
 
   if (nbits != priv->nbits)
     {
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+      /* Yes... Set CR2 appropriately */
+      /* Set the number of bits (valid range 4-16) */
+
+      if (nbits < 4 || nbits > 16)
+        {
+          spierr("ERROR: nbits out of range: %d\n", nbits);
+          return;
+        }
+
+      clrbits = SPI_CR2_DS_MASK;
+      setbits = SPI_CR2_DS(nbits);
+
+      /* If nbits is <=8, then we are in byte mode and FRXTH must be set
+       * (else, transaction will not complete).
+       */
+
+      if (nbits < 9)
+        {
+          setbits |= SPI_CR2_FRXTH; /* RX FIFO Threshold = 1 byte */
+        }
+      else
+        {
+          clrbits |= SPI_CR2_FRXTH; /* RX FIFO Threshold = 2 bytes */
+        }
+
+      spi_modifycr1(priv, 0, SPI_CR1_SPE);
+      spi_modifycr2(priv, setbits, clrbits);
+      spi_modifycr1(priv, SPI_CR1_SPE, 0);
+#else
       /* Yes... Set CR1 appropriately */
 
       switch (nbits)
         {
-        case -8:
-          setbits = SPI_CR1_LSBFIRST;
-          clrbits = SPI_CR1_DFF;
-          break;
-
         case 8:
           setbits = 0;
-          clrbits = SPI_CR1_DFF | SPI_CR1_LSBFIRST;
-          break;
-
-        case -16:
-          setbits = SPI_CR1_DFF | SPI_CR1_LSBFIRST;
-          clrbits = 0;
+          clrbits = SPI_CR1_DFF;
           break;
 
         case 16:
           setbits = SPI_CR1_DFF;
-          clrbits = SPI_CR1_LSBFIRST;
+          clrbits = 0;
           break;
 
         default:
@@ -1184,13 +1332,65 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
       spi_modifycr1(priv, 0, SPI_CR1_SPE);
       spi_modifycr1(priv, setbits, clrbits);
       spi_modifycr1(priv, SPI_CR1_SPE, 0);
-
+#endif
       /* Save the selection so the subsequence re-configurations will be faster */
 
       priv->nbits = nbits;
     }
 }
 
+/****************************************************************************
+ * Name: spi_hwfeatures
+ *
+ * Description:
+ *   Set hardware-specific feature flags.
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   features - H/W feature flags
+ *
+ * Returned Value:
+ *   Zero (OK) if the selected H/W features are enabled; A negated errno
+ *   value if any H/W feature is not supportable.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI_HWFEATURES
+static int spi_hwfeatures(FAR struct spi_dev_s *dev, spi_hwfeatures_t features)
+{
+#ifdef CONFIG_SPI_BITORDER
+  FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev;
+  uint16_t setbits;
+  uint16_t clrbits;
+
+  spiinfo("features=%08x\n", features);
+
+  /* Transfer data LSB first? */
+
+  if ((features & HWFEAT_LSBFIRST) != 0)
+    {
+      setbits = SPI_CR1_LSBFIRST;
+      clrbits = 0;
+    }
+  else
+    {
+      setbits = 0;
+      clrbits = SPI_CR1_LSBFIRST;
+    }
+
+  spi_modifycr1(priv, 0, SPI_CR1_SPE);
+  spi_modifycr1(priv, setbits, clrbits);
+  spi_modifycr1(priv, SPI_CR1_SPE, 0);
+
+  /* Other H/W features are not supported */
+
+  return ((features & ~HWFEAT_LSBFIRST) == 0) ? OK : -ENOSYS;
+#else
+  return -ENOSYS;
+#endif
+}
+#endif
+
 /************************************************************************************
  * Name: spi_send
  *
@@ -1222,7 +1422,7 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
 
   regval = spi_getreg(priv, STM32_SPI_SR_OFFSET);
 
-  spivdbg("Sent: %04x Return: %04x Status: %02x\n", wd, ret, regval);
+  spiinfo("Sent: %04x Return: %04x Status: %02x\n", wd, ret, regval);
   UNUSED(regval);
 
   return ret;
@@ -1234,6 +1434,9 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
  * Description:
  *   Exchange a block of data on SPI without using DMA
  *
+ *   REVISIT: This function could be much more efficient by exploiting (1) RX and TX
+ *   FIFOs and (2) the STM32 F3 data packing.
+ *
  * Input Parameters:
  *   dev      - Device-specific state data
  *   txbuffer - A pointer to the buffer of data to be sent
@@ -1260,7 +1463,7 @@ static void spi_exchange_nodma(FAR struct spi_dev_s *dev, FAR const void *txbuff
   FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev;
   DEBUGASSERT(priv && priv->spibase);
 
-  spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+  spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
 
   /* 8- or 16-bit mode? */
 
@@ -1373,7 +1576,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
       static uint16_t rxdummy = 0xffff;
       static const uint16_t txdummy = 0xffff;
 
-      spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+      spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
       DEBUGASSERT(priv && priv->spibase);
 
       /* Setup DMAs */
@@ -1416,7 +1619,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
 #ifndef CONFIG_SPI_EXCHANGE
 static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer, size_t nwords)
 {
-  spivdbg("txbuffer=%p nwords=%d\n", txbuffer, nwords);
+  spiinfo("txbuffer=%p nwords=%d\n", txbuffer, nwords);
   return spi_exchange(dev, txbuffer, NULL, nwords);
 }
 #endif
@@ -1443,7 +1646,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer, si
 #ifndef CONFIG_SPI_EXCHANGE
 static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *rxbuffer, size_t nwords)
 {
-  spivdbg("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
+  spiinfo("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
   return spi_exchange(dev, NULL, rxbuffer, nwords);
 }
 #endif
@@ -1467,6 +1670,25 @@ static void spi_bus_initialize(FAR struct stm32_spidev_s *priv)
   uint16_t setbits;
   uint16_t clrbits;
 
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+  /* Configure CR1 and CR2. Default configuration:
+   *   Mode 0:                        CR1.CPHA=0 and CR1.CPOL=0
+   *   Master:                        CR1.MSTR=1
+   *   8-bit:                         CR2.DS=7
+   *   MSB tranmitted first:          CR1.LSBFIRST=0
+   *   Replace NSS with SSI & SSI=1:  CR1.SSI=1 CR1.SSM=1 (prevents MODF error)
+   *   Two lines full duplex:         CR1.BIDIMODE=0 CR1.BIDIOIE=(Don't care) and CR1.RXONLY=0
+   */
+
+  clrbits = SPI_CR1_CPHA | SPI_CR1_CPOL | SPI_CR1_BR_MASK | SPI_CR1_LSBFIRST |
+            SPI_CR1_RXONLY | SPI_CR1_CRCL | SPI_CR1_BIDIOE | SPI_CR1_BIDIMODE;
+  setbits = SPI_CR1_MSTR | SPI_CR1_SSI | SPI_CR1_SSM;
+  spi_modifycr1(priv, setbits, clrbits);
+
+  clrbits = SPI_CR2_DS_MASK;
+  setbits = SPI_CR2_DS_8BIT | SPI_CR2_FRXTH; /* FRXTH must be high in 8-bit mode */
+  spi_modifycr2(priv, setbits, clrbits);
+#else
   /* Configure CR1. Default configuration:
    *   Mode 0:                        CPHA=0 and CPOL=0
    *   Master:                        MSTR=1
@@ -1480,6 +1702,7 @@ static void spi_bus_initialize(FAR struct stm32_spidev_s *priv)
             SPI_CR1_RXONLY | SPI_CR1_DFF | SPI_CR1_BIDIOE | SPI_CR1_BIDIMODE;
   setbits = SPI_CR1_MSTR | SPI_CR1_SSI | SPI_CR1_SSM;
   spi_modifycr1(priv, setbits, clrbits);
+#endif
 
   priv->frequency = 0;
   priv->nbits     = 8;
@@ -1497,12 +1720,18 @@ static void spi_bus_initialize(FAR struct stm32_spidev_s *priv)
 
   sem_init(&priv->exclsem, 0, 1);
 
-  /* Initialize the SPI semaphores that is used to wait for DMA completion */
-
 #ifdef CONFIG_STM32_SPI_DMA
+  /* Initialize the SPI semaphores that is used to wait for DMA completion.
+   * This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   sem_init(&priv->rxsem, 0, 0);
   sem_init(&priv->txsem, 0, 0);
 
+  sem_setprotocol(&priv->rxsem, SEM_PRIO_NONE);
+  sem_setprotocol(&priv->txsem, SEM_PRIO_NONE);
+
   /* Get DMA channels.  NOTE: stm32_dmachannel() will always assign the DMA channel.
    * if the channel is not available, then stm32_dmachannel() will block and wait
    * until the channel becomes available.  WARNING: If you have another device sharing
@@ -1515,7 +1744,7 @@ static void spi_bus_initialize(FAR struct stm32_spidev_s *priv)
   priv->txdma = stm32_dmachannel(priv->txch);
   DEBUGASSERT(priv->rxdma && priv->txdma);
 
-  spi_putreg(priv, STM32_SPI_CR2_OFFSET, SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN);
+  spi_modifycr2(priv, SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN, 0);
 #endif
 
   /* Enable spi */
@@ -1692,7 +1921,7 @@ FAR struct spi_dev_s *stm32_spibus_initialize(int bus)
   else
 #endif
     {
-      spidbg("ERROR: Unsupbused SPI bus: %d\n", bus);
+      spierr("ERROR: Unsupported SPI bus: %d\n", bus);
       return NULL;
     }
 
diff --git a/arch/arm/src/stm32/stm32_start.c b/arch/arm/src/stm32/stm32_start.c
index 8e58e862a9ed94ad48523be4c9cf8cbfa5ca0b96..ac16478b3372a9f1cc55ed6acf8f9eaf35b990f4 100644
--- a/arch/arm/src/stm32/stm32_start.c
+++ b/arch/arm/src/stm32/stm32_start.c
@@ -81,7 +81,7 @@ static void go_os_start(void *pv, unsigned int nbytes)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 #  define showprogress(c) up_lowputc(c)
 #else
 #  define showprogress(c)
@@ -282,6 +282,12 @@ void __start(void)
 
   showprogress('C');
 
+#ifdef CONFIG_ARMV7M_ITMSYSLOG
+  /* Perform ARMv7-M ITM SYSLOG initialization */
+
+  itm_syslog_initialize();
+#endif
+
   /* Perform early serial initialization */
 
 #ifdef USE_EARLYSERIALINIT
diff --git a/arch/arm/src/stm32/stm32_syscfg.h b/arch/arm/src/stm32/stm32_syscfg.h
index 8098779f2a6dcc8b61141584f25d789f50a04548..9d832b0f2ea0e931fd10edae7ae395fbbf470668 100644
--- a/arch/arm/src/stm32/stm32_syscfg.h
+++ b/arch/arm/src/stm32/stm32_syscfg.h
@@ -49,6 +49,8 @@
 #  include "chip/stm32f20xxx_syscfg.h"
 #elif defined(CONFIG_STM32_STM32F30XX)
 #  include "chip/stm32f30xxx_syscfg.h"
+#elif defined(CONFIG_STM32_STM32F33XX)
+#  include "chip/stm32f33xxx_syscfg.h"
 #elif defined(CONFIG_STM32_STM32F37XX)
 #  include "chip/stm32f37xxx_syscfg.h"
 #elif defined(CONFIG_STM32_STM32F40XX)
diff --git a/arch/arm/src/stm32/stm32_tickless.c b/arch/arm/src/stm32/stm32_tickless.c
new file mode 100644
index 0000000000000000000000000000000000000000..fafa9bcadfdbcd530304779cdcddcb38e9d8b92e
--- /dev/null
+++ b/arch/arm/src/stm32/stm32_tickless.c
@@ -0,0 +1,383 @@
+/****************************************************************************
+ * arch/arm/src/stm32/stm32_tickless.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+/****************************************************************************
+ * Tickless OS Support.
+ *
+ * When CONFIG_SCHED_TICKLESS is enabled, all support for timer interrupts
+ * is suppressed and the platform specific code is expected to provide the
+ * following custom functions.
+ *
+ *   void arm_timer_initialize(void): Initializes the timer facilities.
+ *     Called early in the initialization sequence (by up_intialize()).
+ *   int up_timer_gettime(FAR struct timespec *ts):  Returns the current
+ *     time from the platform specific time source.
+ *   int up_timer_cancel(void):  Cancels the interval timer.
+ *   int up_timer_start(FAR const struct timespec *ts): Start (or re-starts)
+ *     the interval timer.
+ *
+ * The RTOS will provide the following interfaces for use by the platform-
+ * specific interval timer implementation:
+ *
+ *   void sched_timer_expiration(void):  Called by the platform-specific
+ *     logic when the interval timer expires.
+ *
+ ****************************************************************************/
+/****************************************************************************
+ * SAM34 Timer Usage
+ *
+ * This current implementation uses two timers:  A one-shot timer to provide
+ * the timed events and a free running timer to provide the current time.
+ * Since timers are a limited resource, that could be an issue on some
+ * systems.
+ *
+ * We could do the job with a single timer if we were to keep the single
+ * timer in a free-running at all times.  The STM32 timer/counters have
+ * 16-bit/32-bit counters with the capability to generate a compare interrupt
+ * when the timer matches a compare value but also to continue counting
+ * without stopping (giving another, different interrupt when the timer
+ * rolls over from 0xffffffff to zero).  So we could potentially just set
+ * the compare at the number of ticks you want PLUS the current value of
+ * timer.  Then you could have both with a single timer:  An interval timer
+ * and a free-running counter with the same timer!
+ *
+ * Patches are welcome!
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "stm32_oneshot.h"
+#include "stm32_freerun.h"
+
+#ifdef CONFIG_SCHED_TICKLESS
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef CONFIG_STM32_ONESHOT
+#  error CONFIG_STM32_ONESHOT must be selected for the Tickless OS option
+#endif
+
+#ifndef CONFIG_STM32_FREERUN
+#  error CONFIG_STM32_FREERUN must be selected for the Tickless OS option
+#endif
+
+#ifndef CONFIG_STM32_TICKLESS_FREERUN
+#  error CONFIG_STM32_TICKLESS_FREERUN must be selected for the Tickless OS option
+#endif
+
+#ifndef CONFIG_STM32_TICKLESS_ONESHOT
+#  error CONFIG_STM32_TICKLESS_ONESHOT must be selected for the Tickless OS option
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct stm32_tickless_s
+{
+  struct stm32_oneshot_s oneshot;
+  struct stm32_freerun_s freerun;
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static struct stm32_tickless_s g_tickless;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_oneshot_handler
+ *
+ * Description:
+ *   Called when the one shot timer expires
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Called early in the initialization sequence before any special
+ *   concurrency protections are required.
+ *
+ ****************************************************************************/
+
+static void stm32_oneshot_handler(void *arg)
+{
+  tmrinfo("Expired...\n");
+  sched_timer_expiration();
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: arm_timer_initialize
+ *
+ * Description:
+ *   Initializes all platform-specific timer facilities.  This function is
+ *   called early in the initialization sequence by up_intialize().
+ *   On return, the current up-time should be available from
+ *   up_timer_gettime() and the interval timer is ready for use (but not
+ *   actively timing.
+ *
+ *   Provided by platform-specific code and called from the architecture-
+ *   specific logic.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Called early in the initialization sequence before any special
+ *   concurrency protections are required.
+ *
+ ****************************************************************************/
+
+void arm_timer_initialize(void)
+{
+#ifdef CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP
+  uint64_t max_delay;
+#endif
+  int ret;
+
+  /* Initialize the one-shot timer */
+
+  ret = stm32_oneshot_initialize(&g_tickless.oneshot,
+                                 CONFIG_STM32_TICKLESS_ONESHOT,
+                                 CONFIG_USEC_PER_TICK);
+  if (ret < 0)
+    {
+      tmrerr("ERROR: stm32_oneshot_initialize failed\n");
+      PANIC();
+    }
+
+#ifdef CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP
+  /* Get the maximum delay of the one-shot timer in microseconds */
+
+  ret = stm32_oneshot_max_delay(&g_tickless.oneshot, &max_delay);
+  if (ret < 0)
+    {
+      tmrerr("ERROR: stm32_oneshot_max_delay failed\n");
+      PANIC();
+    }
+
+  /* Convert this to configured clock ticks for use by the OS timer logic */
+
+  max_delay /= CONFIG_USEC_PER_TICK;
+  if (max_delay > UINT32_MAX)
+    {
+      g_oneshot_maxticks = UINT32_MAX;
+    }
+  else
+    {
+      g_oneshot_maxticks = max_delay;
+    }
+#endif
+
+  /* Initialize the free-running timer */
+
+  ret = stm32_freerun_initialize(&g_tickless.freerun,
+                                 CONFIG_STM32_TICKLESS_FREERUN,
+                                 CONFIG_USEC_PER_TICK);
+  if (ret < 0)
+    {
+      tmrerr("ERROR: stm32_freerun_initialize failed\n");
+      PANIC();
+    }
+}
+
+/****************************************************************************
+ * Name: up_timer_gettime
+ *
+ * Description:
+ *   Return the elapsed time since power-up (or, more correctly, since
+ *   arm_timer_initialize() was called).  This function is functionally
+ *   equivalent to:
+ *
+ *      int clock_gettime(clockid_t clockid, FAR struct timespec *ts);
+ *
+ *   when clockid is CLOCK_MONOTONIC.
+ *
+ *   This function provides the basis for reporting the current time and
+ *   also is used to eliminate error build-up from small errors in interval
+ *   time calculations.
+ *
+ *   Provided by platform-specific code and called from the RTOS base code.
+ *
+ * Input Parameters:
+ *   ts - Provides the location in which to return the up-time.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure.
+ *
+ * Assumptions:
+ *   Called from the the normal tasking context.  The implementation must
+ *   provide whatever mutual exclusion is necessary for correct operation.
+ *   This can include disabling interrupts in order to assure atomic register
+ *   operations.
+ *
+ ****************************************************************************/
+
+#ifndef CONFIG_CLOCK_TIMEKEEPING
+
+int up_timer_gettime(FAR struct timespec *ts)
+{
+  return stm32_freerun_counter(&g_tickless.freerun, ts);
+}
+
+#else
+
+int up_timer_getcounter(FAR uint64_t *cycles)
+{
+  return stm32_freerun_counter(&g_tickless.freerun, cycles);
+}
+
+#endif /* CONFIG_CLOCK_TIMEKEEPING */
+
+/****************************************************************************
+ * Name: up_timer_getmask
+ *
+ * Description:
+ *   To be provided
+ *
+ * Input Parameters:
+ *   mask - Location to return the 64-bit mask
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CLOCK_TIMEKEEPING
+void up_timer_getmask(FAR uint64_t *mask)
+{
+  DEBUGASSERT(mask != NULL);
+  *mask = g_tickless.freerun.counter_mask;
+}
+#endif /* CONFIG_CLOCK_TIMEKEEPING */
+
+/****************************************************************************
+ * Name: up_timer_cancel
+ *
+ * Description:
+ *   Cancel the interval timer and return the time remaining on the timer.
+ *   These two steps need to be as nearly atomic as possible.
+ *   sched_timer_expiration() will not be called unless the timer is
+ *   restarted with up_timer_start().
+ *
+ *   If, as a race condition, the timer has already expired when this
+ *   function is called, then that pending interrupt must be cleared so
+ *   that up_timer_start() and the remaining time of zero should be
+ *   returned.
+ *
+ *   NOTE: This function may execute at a high rate with no timer running (as
+ *   when pre-emption is enabled and disabled).
+ *
+ *   Provided by platform-specific code and called from the RTOS base code.
+ *
+ * Input Parameters:
+ *   ts - Location to return the remaining time.  Zero should be returned
+ *        if the timer is not active.  ts may be zero in which case the
+ *        time remaining is not returned.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success.  A call to up_timer_cancel() when
+ *   the timer is not active should also return success; a negated errno
+ *   value is returned on any failure.
+ *
+ * Assumptions:
+ *   May be called from interrupt level handling or from the normal tasking
+ *   level.  Interrupts may need to be disabled internally to assure
+ *   non-reentrancy.
+ *
+ ****************************************************************************/
+
+int up_timer_cancel(FAR struct timespec *ts)
+{
+  return stm32_oneshot_cancel(&g_tickless.oneshot, ts);
+}
+
+/****************************************************************************
+ * Name: up_timer_start
+ *
+ * Description:
+ *   Start the interval timer.  sched_timer_expiration() will be
+ *   called at the completion of the timeout (unless up_timer_cancel
+ *   is called to stop the timing.
+ *
+ *   Provided by platform-specific code and called from the RTOS base code.
+ *
+ * Input Parameters:
+ *   ts - Provides the time interval until sched_timer_expiration() is
+ *        called.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure.
+ *
+ * Assumptions:
+ *   May be called from interrupt level handling or from the normal tasking
+ *   level.  Interrupts may need to be disabled internally to assure
+ *   non-reentrancy.
+ *
+ ****************************************************************************/
+
+int up_timer_start(FAR const struct timespec *ts)
+{
+  return stm32_oneshot_start(&g_tickless.oneshot, stm32_oneshot_handler, NULL, ts);
+}
+#endif /* CONFIG_SCHED_TICKLESS */
diff --git a/arch/arm/src/stm32/stm32_tim.c b/arch/arm/src/stm32/stm32_tim.c
index 14359625f888805236ba74b06c6beb21850c226c..5590992827056fbcd0da75eafa59f7cbeed2c5ec 100644
--- a/arch/arm/src/stm32/stm32_tim.c
+++ b/arch/arm/src/stm32/stm32_tim.c
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arm/arm/src/stm32/stm32_tim.c
+ * arch/arm/src/stm32/stm32_tim.c
  *
  *   Copyright (C) 2011 Uros Platise. All rights reserved.
  *   Author: Uros Platise 
@@ -64,8 +64,9 @@
 #include "stm32_tim.h"
 
 /************************************************************************************
- * Private Types
+ * Pre-processor Definitions
  ************************************************************************************/
+
 /* Configuration ********************************************************************/
 /* Timer devices may be used for different purposes.  Such special purposes include:
  *
@@ -144,57 +145,150 @@
     defined(CONFIG_STM32_TIM14_DAC) || defined(CONFIG_STM32_TIM14_QE)
 #  undef CONFIG_STM32_TIM14
 #endif
+#if defined(CONFIG_STM32_TIM15_PWM) || defined (CONFIG_STM32_TIM15_ADC) || \
+    defined(CONFIG_STM32_TIM15_DAC) || defined(CONFIG_STM32_TIM15_QE)
+#  undef CONFIG_STM32_TIM15
+#endif
+#if defined(CONFIG_STM32_TIM16_PWM) || defined (CONFIG_STM32_TIM16_ADC) || \
+    defined(CONFIG_STM32_TIM16_DAC) || defined(CONFIG_STM32_TIM16_QE)
+#  undef CONFIG_STM32_TIM16
+#endif
+#if defined(CONFIG_STM32_TIM17_PWM) || defined (CONFIG_STM32_TIM17_ADC) || \
+    defined(CONFIG_STM32_TIM17_DAC) || defined(CONFIG_STM32_TIM17_QE)
+#  undef CONFIG_STM32_TIM17
+#endif
 
-#if defined(CONFIG_STM32_TIM1) 
+#undef HAVE_TIM_GPIOCONFIG
+#if defined(CONFIG_STM32_TIM1)
 #  if defined(GPIO_TIM1_CH1OUT) ||defined(GPIO_TIM1_CH2OUT)||\
       defined(GPIO_TIM1_CH3OUT) ||defined(GPIO_TIM1_CH4OUT)
+#    undef  HAVE_TIM_GPIOCONFIG
+#    define HAVE_TIM_GPIOCONFIG  1
 #    define HAVE_TIM1_GPIOCONFIG 1
 #endif
 #endif
 
-#if defined(CONFIG_STM32_TIM2) 
+#if defined(CONFIG_STM32_TIM2)
 #  if defined(GPIO_TIM2_CH1OUT) ||defined(GPIO_TIM2_CH2OUT)||\
       defined(GPIO_TIM2_CH3OUT) ||defined(GPIO_TIM2_CH4OUT)
+#    undef  HAVE_TIM_GPIOCONFIG
+#    define HAVE_TIM_GPIOCONFIG  1
 #    define HAVE_TIM2_GPIOCONFIG 1
 #endif
 #endif
 
-#if defined(CONFIG_STM32_TIM3) 
+#if defined(CONFIG_STM32_TIM3)
 #  if defined(GPIO_TIM3_CH1OUT) ||defined(GPIO_TIM3_CH2OUT)||\
       defined(GPIO_TIM3_CH3OUT) ||defined(GPIO_TIM3_CH4OUT)
+#    undef  HAVE_TIM_GPIOCONFIG
+#    define HAVE_TIM_GPIOCONFIG  1
 #    define HAVE_TIM3_GPIOCONFIG 1
 #endif
 #endif
 
-#if defined(CONFIG_STM32_TIM4) 
+#if defined(CONFIG_STM32_TIM4)
 #  if defined(GPIO_TIM4_CH1OUT) ||defined(GPIO_TIM4_CH2OUT)||\
       defined(GPIO_TIM4_CH3OUT) ||defined(GPIO_TIM4_CH4OUT)
+#    undef  HAVE_TIM_GPIOCONFIG
+#    define HAVE_TIM_GPIOCONFIG  1
 #    define HAVE_TIM4_GPIOCONFIG 1
 #endif
 #endif
 
-#if defined(CONFIG_STM32_TIM5) 
+#if defined(CONFIG_STM32_TIM5)
 #  if defined(GPIO_TIM5_CH1OUT) ||defined(GPIO_TIM5_CH2OUT)||\
       defined(GPIO_TIM5_CH3OUT) ||defined(GPIO_TIM5_CH4OUT)
+#    undef  HAVE_TIM_GPIOCONFIG
+#    define HAVE_TIM_GPIOCONFIG  1
 #    define HAVE_TIM5_GPIOCONFIG 1
 #endif
 #endif
 
-#if defined(CONFIG_STM32_TIM8) 
+#if defined(CONFIG_STM32_TIM8)
 #  if defined(GPIO_TIM8_CH1OUT) ||defined(GPIO_TIM8_CH2OUT)||\
       defined(GPIO_TIM8_CH3OUT) ||defined(GPIO_TIM8_CH4OUT)
+#    undef  HAVE_TIM_GPIOCONFIG
+#    define HAVE_TIM_GPIOCONFIG  1
 #    define HAVE_TIM8_GPIOCONFIG 1
 #endif
 #endif
 
+#if defined(CONFIG_STM32_TIM9)
+#  if defined(GPIO_TIM9_CH1OUT) ||defined(GPIO_TIM9_CH2OUT)||\
+      defined(GPIO_TIM9_CH3OUT) ||defined(GPIO_TIM9_CH4OUT)
+#    define HAVE_TIM9_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32_TIM10)
+#  if defined(GPIO_TIM10_CH1OUT) ||defined(GPIO_TIM10_CH2OUT)||\
+      defined(GPIO_TIM10_CH3OUT) ||defined(GPIO_TIM10_CH4OUT)
+#    define HAVE_TIM10_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32_TIM11)
+#  if defined(GPIO_TIM11_CH1OUT) ||defined(GPIO_TIM11_CH2OUT)||\
+      defined(GPIO_TIM11_CH3OUT) ||defined(GPIO_TIM11_CH4OUT)
+#    define HAVE_TIM11_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32_TIM12)
+#  if defined(GPIO_TIM12_CH1OUT) ||defined(GPIO_TIM12_CH2OUT)||\
+      defined(GPIO_TIM12_CH3OUT) ||defined(GPIO_TIM12_CH4OUT)
+#    define HAVE_TIM12_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32_TIM13)
+#  if defined(GPIO_TIM13_CH1OUT) ||defined(GPIO_TIM13_CH2OUT)||\
+      defined(GPIO_TIM13_CH3OUT) ||defined(GPIO_TIM13_CH4OUT)
+#    define HAVE_TIM13_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32_TIM14)
+#  if defined(GPIO_TIM14_CH1OUT) ||defined(GPIO_TIM14_CH2OUT)||\
+      defined(GPIO_TIM14_CH3OUT) ||defined(GPIO_TIM14_CH4OUT)
+#    define HAVE_TIM14_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32_TIM15)
+#  if defined(GPIO_TIM15_CH1OUT) ||defined(GPIO_TIM15_CH2OUT)||\
+      defined(GPIO_TIM15_CH3OUT) ||defined(GPIO_TIM15_CH4OUT)
+#    define HAVE_TIM15_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32_TIM16)
+#  if defined(GPIO_TIM16_CH1OUT) ||defined(GPIO_TIM16_CH2OUT)||\
+      defined(GPIO_TIM16_CH3OUT) ||defined(GPIO_TIM16_CH4OUT)
+#    define HAVE_TIM16_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32_TIM17)
+#  if defined(GPIO_TIM17_CH1OUT) ||defined(GPIO_TIM17_CH2OUT)||\
+      defined(GPIO_TIM17_CH3OUT) ||defined(GPIO_TIM17_CH4OUT)
+#    define HAVE_TIM17_GPIOCONFIG 1
+#endif
+#endif
 
 /* This module then only compiles if there are enabled timers that are not intended for
  * some other purpose.
  */
 
-#if defined(CONFIG_STM32_TIM1) || defined(CONFIG_STM32_TIM2) || defined(CONFIG_STM32_TIM3) || \
-    defined(CONFIG_STM32_TIM4) || defined(CONFIG_STM32_TIM5) || defined(CONFIG_STM32_TIM6) || \
-    defined(CONFIG_STM32_TIM7) || defined(CONFIG_STM32_TIM8)
+#if defined(CONFIG_STM32_TIM1)  || defined(CONFIG_STM32_TIM2)  || \
+    defined(CONFIG_STM32_TIM3)  || defined(CONFIG_STM32_TIM4)  || \
+    defined(CONFIG_STM32_TIM5)  || defined(CONFIG_STM32_TIM6)  || \
+    defined(CONFIG_STM32_TIM7)  || defined(CONFIG_STM32_TIM8)  || \
+    defined(CONFIG_STM32_TIM9)  || defined(CONFIG_STM32_TIM10) || \
+    defined(CONFIG_STM32_TIM11) || defined(CONFIG_STM32_TIM12) || \
+    defined(CONFIG_STM32_TIM13) || defined(CONFIG_STM32_TIM14) || \
+    defined(CONFIG_STM32_TIM15) || defined(CONFIG_STM32_TIM16) || \
+    defined(CONFIG_STM32_TIM17)
 
 /************************************************************************************
  * Private Types
@@ -204,16 +298,242 @@
 
 struct stm32_tim_priv_s
 {
-  struct stm32_tim_ops_s *ops;
-  stm32_tim_mode_t        mode;
-  uint32_t                base;   /* TIMn base address */
+  const struct stm32_tim_ops_s *ops;
+  stm32_tim_mode_t mode;
+  uint32_t base;                      /* TIMn base address */
+};
+
+/************************************************************************************
+ * Private Function prototypes
+ ************************************************************************************/
+
+/* Register helpers */
+
+static inline uint16_t stm32_getreg16(FAR struct stm32_tim_dev_s *dev,
+                                      uint8_t offset);
+static inline void stm32_putreg16(FAR struct stm32_tim_dev_s *dev, uint8_t offset,
+                                  uint16_t value);
+static inline void stm32_modifyreg16(FAR struct stm32_tim_dev_s *dev,
+                                     uint8_t offset, uint16_t clearbits,
+                                     uint16_t setbits);
+static inline uint32_t stm32_getreg32(FAR struct stm32_tim_dev_s *dev,
+                                      uint8_t offset);
+static inline void stm32_putreg32(FAR struct stm32_tim_dev_s *dev, uint8_t offset,
+                                  uint32_t value);
+
+/* Timer helpers */
+
+static void stm32_tim_reload_counter(FAR struct stm32_tim_dev_s *dev);
+static void stm32_tim_enable(FAR struct stm32_tim_dev_s *dev);
+static void stm32_tim_disable(FAR struct stm32_tim_dev_s *dev);
+static void stm32_tim_reset(FAR struct stm32_tim_dev_s *dev);
+
+#ifdef HAVE_TIM_GPIOCONFIG
+static void stm32_tim_gpioconfig(uint32_t cfg, stm32_tim_channel_t mode);
+#endif
+
+/* Timer methods */
+
+static int stm32_tim_setmode(FAR struct stm32_tim_dev_s *dev, stm32_tim_mode_t mode);
+static int stm32_tim_setclock(FAR struct stm32_tim_dev_s *dev, uint32_t freq);
+static void stm32_tim_setperiod(FAR struct stm32_tim_dev_s *dev,
+                                uint32_t period);
+static uint32_t stm32_tim_getcounter(FAR struct stm32_tim_dev_s *dev);
+static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel,
+                                stm32_tim_channel_t mode);
+static int stm32_tim_setcompare(FAR struct stm32_tim_dev_s *dev, uint8_t channel,
+                                uint32_t compare);
+static int stm32_tim_getcapture(FAR struct stm32_tim_dev_s *dev, uint8_t channel);
+static int stm32_tim_setisr(FAR struct stm32_tim_dev_s *dev, xcpt_t handler,
+                            void *arg, int source);
+static void stm32_tim_enableint(FAR struct stm32_tim_dev_s *dev, int source);
+static void stm32_tim_disableint(FAR struct stm32_tim_dev_s *dev, int source);
+static void stm32_tim_ackint(FAR struct stm32_tim_dev_s *dev, int source);
+static int stm32_tim_checkint(FAR struct stm32_tim_dev_s *dev, int source);
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+static const struct stm32_tim_ops_s stm32_tim_ops =
+{
+  .setmode    = stm32_tim_setmode,
+  .setclock   = stm32_tim_setclock,
+  .setperiod  = stm32_tim_setperiod,
+  .getcounter = stm32_tim_getcounter,
+  .setchannel = stm32_tim_setchannel,
+  .setcompare = stm32_tim_setcompare,
+  .getcapture = stm32_tim_getcapture,
+  .setisr     = stm32_tim_setisr,
+  .enableint  = stm32_tim_enableint,
+  .disableint = stm32_tim_disableint,
+  .ackint     = stm32_tim_ackint,
+  .checkint   = stm32_tim_checkint,
+};
+
+#ifdef CONFIG_STM32_TIM1
+struct stm32_tim_priv_s stm32_tim1_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM1_BASE,
+};
+#endif
+#ifdef CONFIG_STM32_TIM2
+struct stm32_tim_priv_s stm32_tim2_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM2_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32_TIM3
+struct stm32_tim_priv_s stm32_tim3_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM3_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32_TIM4
+struct stm32_tim_priv_s stm32_tim4_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM4_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32_TIM5
+struct stm32_tim_priv_s stm32_tim5_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM5_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32_TIM6
+struct stm32_tim_priv_s stm32_tim6_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM6_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32_TIM7
+struct stm32_tim_priv_s stm32_tim7_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM7_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32_TIM8
+struct stm32_tim_priv_s stm32_tim8_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM8_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32_TIM9
+struct stm32_tim_priv_s stm32_tim9_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM9_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32_TIM10
+struct stm32_tim_priv_s stm32_tim10_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM10_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32_TIM11
+struct stm32_tim_priv_s stm32_tim11_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM11_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32_TIM12
+struct stm32_tim_priv_s stm32_tim12_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM12_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32_TIM13
+struct stm32_tim_priv_s stm32_tim13_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM13_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32_TIM14
+struct stm32_tim_priv_s stm32_tim14_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM14_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32_TIM15
+struct stm32_tim_priv_s stm32_tim15_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM15_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32_TIM16
+struct stm32_tim_priv_s stm32_tim16_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM16_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32_TIM17
+struct stm32_tim_priv_s stm32_tim17_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM17_BASE,
 };
+#endif
 
 /************************************************************************************
  * Private Functions
  ************************************************************************************/
 
-/* Get a 16-bit register value by offset */
+/************************************************************************************
+ * Name: stm32_getreg16
+ *
+ * Description:
+ *   Get a 16-bit register value by offset
+ *
+ ************************************************************************************/
 
 static inline uint16_t stm32_getreg16(FAR struct stm32_tim_dev_s *dev,
                                       uint8_t offset)
@@ -221,7 +541,13 @@ static inline uint16_t stm32_getreg16(FAR struct stm32_tim_dev_s *dev,
   return getreg16(((struct stm32_tim_priv_s *)dev)->base + offset);
 }
 
-/* Put a 16-bit register value by offset */
+/************************************************************************************
+ * Name: stm32_putreg16
+ *
+ * Description:
+ *   Put a 16-bit register value by offset
+ *
+ ************************************************************************************/
 
 static inline void stm32_putreg16(FAR struct stm32_tim_dev_s *dev, uint8_t offset,
                                   uint16_t value)
@@ -229,7 +555,13 @@ static inline void stm32_putreg16(FAR struct stm32_tim_dev_s *dev, uint8_t offse
   putreg16(value, ((struct stm32_tim_priv_s *)dev)->base + offset);
 }
 
-/* Modify a 16-bit register value by offset */
+/************************************************************************************
+ * Name: stm32_modifyreg16
+ *
+ * Description:
+ *   Modify a 16-bit register value by offset
+ *
+ ************************************************************************************/
 
 static inline void stm32_modifyreg16(FAR struct stm32_tim_dev_s *dev,
                                      uint8_t offset, uint16_t clearbits,
@@ -238,9 +570,14 @@ static inline void stm32_modifyreg16(FAR struct stm32_tim_dev_s *dev,
   modifyreg16(((struct stm32_tim_priv_s *)dev)->base + offset, clearbits, setbits);
 }
 
-/* Get a 32-bit register value by offset.  This applies only for the STM32 F4
- * 32-bit registers (CNT, ARR, CRR1-4) in the 32-bit timers TIM2-5.
- */
+/************************************************************************************
+ * Name: stm32_getreg32
+ *
+ * Description:
+ *   Get a 32-bit register value by offset.  This applies only for the STM32 F4
+ *   32-bit registers (CNT, ARR, CRR1-4) in the 32-bit timers TIM2-5.
+ *
+ ************************************************************************************/
 
 static inline uint32_t stm32_getreg32(FAR struct stm32_tim_dev_s *dev,
                                       uint8_t offset)
@@ -248,9 +585,14 @@ static inline uint32_t stm32_getreg32(FAR struct stm32_tim_dev_s *dev,
   return getreg32(((struct stm32_tim_priv_s *)dev)->base + offset);
 }
 
-/* Put a 32-bit register value by offset.  This applies only for the STM32 F4
- * 32-bit registers (CNT, ARR, CRR1-4) in the 32-bit timers TIM2-5.
- */
+/************************************************************************************
+ * Name: stm32_putreg32
+ *
+ * Description:
+ *   Put a 32-bit register value by offset.  This applies only for the STM32 F4
+ *   32-bit registers (CNT, ARR, CRR1-4) in the 32-bit timers TIM2-5.
+ *
+ ************************************************************************************/
 
 static inline void stm32_putreg32(FAR struct stm32_tim_dev_s *dev, uint8_t offset,
                                   uint32_t value)
@@ -258,6 +600,10 @@ static inline void stm32_putreg32(FAR struct stm32_tim_dev_s *dev, uint8_t offse
   putreg32(value, ((struct stm32_tim_priv_s *)dev)->base + offset);
 }
 
+/************************************************************************************
+ * Name: stm32_tim_reload_counter
+ ************************************************************************************/
+
 static void stm32_tim_reload_counter(FAR struct stm32_tim_dev_s *dev)
 {
   uint16_t val = stm32_getreg16(dev, STM32_BTIM_EGR_OFFSET);
@@ -265,6 +611,10 @@ static void stm32_tim_reload_counter(FAR struct stm32_tim_dev_s *dev)
   stm32_putreg16(dev, STM32_BTIM_EGR_OFFSET, val);
 }
 
+/************************************************************************************
+ * Name: stm32_tim_enable
+ ************************************************************************************/
+
 static void stm32_tim_enable(FAR struct stm32_tim_dev_s *dev)
 {
   uint16_t val = stm32_getreg16(dev, STM32_BTIM_CR1_OFFSET);
@@ -273,6 +623,10 @@ static void stm32_tim_enable(FAR struct stm32_tim_dev_s *dev)
   stm32_putreg16(dev, STM32_BTIM_CR1_OFFSET, val);
 }
 
+/************************************************************************************
+ * Name: stm32_tim_disable
+ ************************************************************************************/
+
 static void stm32_tim_disable(FAR struct stm32_tim_dev_s *dev)
 {
   uint16_t val = stm32_getreg16(dev, STM32_BTIM_CR1_OFFSET);
@@ -280,7 +634,13 @@ static void stm32_tim_disable(FAR struct stm32_tim_dev_s *dev)
   stm32_putreg16(dev, STM32_BTIM_CR1_OFFSET, val);
 }
 
-/* Reset timer into system default state, but do not affect output/input pins */
+/************************************************************************************
+ * Name: stm32_tim_reset
+ *
+ * Description:
+ *   Reset timer into system default state, but do not affect output/input pins
+ *
+ ************************************************************************************/
 
 static void stm32_tim_reset(FAR struct stm32_tim_dev_s *dev)
 {
@@ -288,9 +648,11 @@ static void stm32_tim_reset(FAR struct stm32_tim_dev_s *dev)
   stm32_tim_disable(dev);
 }
 
-#if defined(HAVE_TIM1_GPIOCONFIG)||defined(HAVE_TIM2_GPIOCONFIG)||\
-    defined(HAVE_TIM3_GPIOCONFIG)||defined(HAVE_TIM4_GPIOCONFIG)||\
-    defined(HAVE_TIM5_GPIOCONFIG)||defined(HAVE_TIM8_GPIOCONFIG)
+/************************************************************************************
+ * Name: stm32_tim_gpioconfig
+ ************************************************************************************/
+
+#ifdef HAVE_TIM_GPIOCONFIG
 static void stm32_tim_gpioconfig(uint32_t cfg, stm32_tim_channel_t mode)
 {
   /* TODO: Add support for input capture and bipolar dual outputs for TIM8 */
@@ -307,235 +669,245 @@ static void stm32_tim_gpioconfig(uint32_t cfg, stm32_tim_channel_t mode)
 #endif
 
 /************************************************************************************
- * Basic Functions
+ * Name: stm32_tim_setmode
  ************************************************************************************/
 
-static int stm32_tim_setclock(FAR struct stm32_tim_dev_s *dev, uint32_t freq)
+static int stm32_tim_setmode(FAR struct stm32_tim_dev_s *dev, stm32_tim_mode_t mode)
 {
-  int prescaler;
-
-  ASSERT(dev);
+  uint16_t val = ATIM_CR1_CEN | ATIM_CR1_ARPE;
 
-  /* Disable Timer? */
+  DEBUGASSERT(dev != NULL);
 
-  if (freq == 0)
-    {
-      stm32_tim_disable(dev);
-      return 0;
-    }
+  /* This function is not supported on basic timers. To enable or
+   * disable it, simply set its clock to valid frequency or zero.
+   */
 
-#if STM32_NATIM > 0
-  if (((struct stm32_tim_priv_s *)dev)->base == STM32_TIM1_BASE ||
-      ((struct stm32_tim_priv_s *)dev)->base == STM32_TIM8_BASE)
-    {
-      prescaler = STM32_TIM18_FREQUENCY / freq;
-    }
-  else
+#if STM32_NBTIM > 0
+  if (((struct stm32_tim_priv_s *)dev)->base == STM32_TIM6_BASE
 #endif
+#if STM32_NBTIM > 1
+      ||  ((struct stm32_tim_priv_s *)dev)->base == STM32_TIM7_BASE
+#endif
+#if STM32_NBTIM > 0
+  )
     {
-      prescaler = STM32_TIM27_FREQUENCY / freq;
+      return -EINVAL;
     }
+#endif
 
-  /* We need to decrement value for '1', but only, if we are allowed to
-   * not to cause underflow. Check for overflow.
-   */
+  /* Decode operational modes */
 
-  if (prescaler > 0)
+  switch (mode & STM32_TIM_MODE_MASK)
     {
-      prescaler--;
-    }
+      case STM32_TIM_MODE_DISABLED:
+        val = 0;
+        break;
 
-  if (prescaler > 0xffff)
-    {
-      prescaler = 0xffff;
+      case STM32_TIM_MODE_DOWN:
+        val |= ATIM_CR1_DIR;
+
+      case STM32_TIM_MODE_UP:
+        break;
+
+      case STM32_TIM_MODE_UPDOWN:
+        val |= ATIM_CR1_CENTER1;
+        // Our default: Interrupts are generated on compare, when counting down
+        break;
+
+      case STM32_TIM_MODE_PULSE:
+        val |= ATIM_CR1_OPM;
+        break;
+
+      default:
+        return -EINVAL;
     }
 
-  stm32_putreg16(dev, STM32_BTIM_PSC_OFFSET, prescaler);
-  stm32_tim_enable(dev);
+  stm32_tim_reload_counter(dev);
+  stm32_putreg16(dev, STM32_BTIM_CR1_OFFSET, val);
 
-  return prescaler;
-}
+#if STM32_NATIM > 0
+  /* Advanced registers require Main Output Enable */
 
-static void stm32_tim_setperiod(FAR struct stm32_tim_dev_s *dev,
-                                uint32_t period)
-{
-  ASSERT(dev);
-  stm32_putreg32(dev, STM32_BTIM_ARR_OFFSET, period);
+    if (((struct stm32_tim_priv_s *)dev)->base == STM32_TIM1_BASE ||
+        ((struct stm32_tim_priv_s *)dev)->base == STM32_TIM8_BASE)
+      {
+        stm32_modifyreg16(dev, STM32_ATIM_BDTR_OFFSET, 0, ATIM_BDTR_MOE);
+      }
+#endif
+
+  return OK;
 }
 
-static int stm32_tim_setisr(FAR struct stm32_tim_dev_s *dev,
-                            int (*handler)(int irq, void *context),
-                            int source)
+/************************************************************************************
+ * Name: stm32_tim_setclock
+ ************************************************************************************/
+
+static int stm32_tim_setclock(FAR struct stm32_tim_dev_s *dev, uint32_t freq)
 {
-  int vectorno;
+  uint32_t freqin;
+  int prescaler;
+
+  DEBUGASSERT(dev != NULL);
+
+  /* Disable Timer? */
+
+  if (freq == 0)
+    {
+      stm32_tim_disable(dev);
+      return 0;
+    }
 
-  ASSERT(dev);
-  ASSERT(source == 0);
+  /* Get the input clock frequency for this timer.  These vary with
+   * different timer clock sources, MCU-specific timer configuration, and
+   * board-specific clock configuration.  The correct input clock frequency
+   * must be defined in the board.h header file.
+   */
 
   switch (((struct stm32_tim_priv_s *)dev)->base)
     {
+#ifdef CONFIG_STM32_TIM1
+      case STM32_TIM1_BASE:
+        freqin = BOARD_TIM1_FREQUENCY;
+        break;
+#endif
 #ifdef CONFIG_STM32_TIM2
       case STM32_TIM2_BASE:
-        vectorno = STM32_IRQ_TIM2;
+        freqin = BOARD_TIM2_FREQUENCY;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM3
       case STM32_TIM3_BASE:
-        vectorno = STM32_IRQ_TIM3;
+        freqin = BOARD_TIM3_FREQUENCY;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM4
       case STM32_TIM4_BASE:
-        vectorno = STM32_IRQ_TIM4;
+        freqin = BOARD_TIM4_FREQUENCY;
         break;
 #endif
 #ifdef CONFIG_STM32_TIM5
       case STM32_TIM5_BASE:
-        vectorno = STM32_IRQ_TIM5;
+        freqin = BOARD_TIM5_FREQUENCY;
         break;
 #endif
-#if STM32_NBTIM > 0
 #ifdef CONFIG_STM32_TIM6
       case STM32_TIM6_BASE:
-        vectorno = STM32_IRQ_TIM6;
+        freqin = BOARD_TIM6_FREQUENCY;
         break;
 #endif
-#endif
-#if STM32_NBTIM > 1
 #ifdef CONFIG_STM32_TIM7
       case STM32_TIM7_BASE:
-        vectorno = STM32_IRQ_TIM7;
+        freqin = BOARD_TIM7_FREQUENCY;
         break;
 #endif
+#ifdef CONFIG_STM32_TIM8
+      case STM32_TIM8_BASE:
+        freqin = BOARD_TIM8_FREQUENCY;
+        break;
 #endif
-#if STM32_NATIM > 0
-      /* TODO: add support for multiple sources and callbacks */
-
-#ifdef CONFIG_STM32_TIM1
-      case STM32_TIM1_BASE:
-        vectorno = STM32_IRQ_TIM1UP;
+#ifdef CONFIG_STM32_TIM9
+      case STM32_TIM9_BASE:
+        freqin = BOARD_TIM9_FREQUENCY;
         break;
 #endif
-#ifdef CONFIG_STM32_TIM8
-      case STM32_TIM8_BASE:
-        vectorno = STM32_IRQ_TIM8UP;
+#ifdef CONFIG_STM32_TIM10
+      case STM32_TIM10_BASE:
+        freqin = BOARD_TIM10_FREQUENCY;
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM11
+      case STM32_TIM11_BASE:
+        freqin = BOARD_TIM11_FREQUENCY;
         break;
 #endif
+#ifdef CONFIG_STM32_TIM12
+      case STM32_TIM12_BASE:
+        freqin = BOARD_TIM12_FREQUENCY;
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM13
+      case STM32_TIM13_BASE:
+        freqin = BOARD_TIM13_FREQUENCY;
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM14
+      case STM32_TIM14_BASE:
+        freqin = BOARD_TIM14_FREQUENCY;
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM15
+      case STM32_TIM15_BASE:
+        freqin = BOARD_TIM15_FREQUENCY;
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM16
+      case STM32_TIM16_BASE:
+        freqin = BOARD_TIM16_FREQUENCY;
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM17
+      case STM32_TIM17_BASE:
+        freqin = BOARD_TIM17_FREQUENCY;
+        break;
 #endif
+
       default:
-        return ERROR;
+        return -EINVAL;
     }
 
-  /* Disable interrupt when callback is removed */
+  /* Select a pre-scaler value for this timer using the input clock
+   * frequency.
+   */
 
-  if (!handler)
-    {
-      up_disable_irq(vectorno);
-      irq_detach(vectorno);
-      return OK;
-    }
+  prescaler = freqin / freq;
 
-  /* Otherwise set callback and enable interrupt */
+  /* We need to decrement value for '1', but only, if that will not to
+   * cause underflow.
+   */
 
-  irq_attach(vectorno, handler);
-  up_enable_irq(vectorno);
+  if (prescaler > 0)
+    {
+      prescaler--;
+    }
 
-#ifdef CONFIG_ARCH_IRQPRIO
-  /* Set the interrupt priority */
+  /* Check for overflow as well. */
 
-  up_prioritize_irq(vectorno, NVIC_SYSH_PRIORITY_DEFAULT);
-#endif
+  if (prescaler > 0xffff)
+    {
+      prescaler = 0xffff;
+    }
 
-  return OK;
-}
+  stm32_putreg16(dev, STM32_BTIM_PSC_OFFSET, prescaler);
+  stm32_tim_enable(dev);
 
-static void stm32_tim_enableint(FAR struct stm32_tim_dev_s *dev, int source)
-{
-  ASSERT(dev);
-  stm32_modifyreg16(dev, STM32_BTIM_DIER_OFFSET, 0, ATIM_DIER_UIE);
+  return prescaler;
 }
 
-static void stm32_tim_disableint(FAR struct stm32_tim_dev_s *dev, int source)
-{
-  ASSERT(dev);
-  stm32_modifyreg16(dev, STM32_BTIM_DIER_OFFSET, ATIM_DIER_UIE, 0);
-}
+/************************************************************************************
+ * Name: stm32_tim_setperiod
+ ************************************************************************************/
 
-static void stm32_tim_ackint(FAR struct stm32_tim_dev_s *dev, int source)
+static void stm32_tim_setperiod(FAR struct stm32_tim_dev_s *dev,
+                                uint32_t period)
 {
-  stm32_putreg16(dev, STM32_BTIM_SR_OFFSET, ~ATIM_SR_UIF);
+  DEBUGASSERT(dev != NULL);
+  stm32_putreg32(dev, STM32_BTIM_ARR_OFFSET, period);
 }
 
 /************************************************************************************
- * General Functions
+ * Name: stm32_tim_getcounter
  ************************************************************************************/
 
-static int stm32_tim_setmode(FAR struct stm32_tim_dev_s *dev, stm32_tim_mode_t mode)
+static uint32_t stm32_tim_getcounter(FAR struct stm32_tim_dev_s *dev)
 {
-  uint16_t val = ATIM_CR1_CEN | ATIM_CR1_ARPE;
-
-  ASSERT(dev);
-
-  /* This function is not supported on basic timers. To enable or
-   * disable it, simply set its clock to valid frequency or zero.
-   */
-
-#if STM32_NBTIM > 0
-  if (((struct stm32_tim_priv_s *)dev)->base == STM32_TIM6_BASE
-#endif
-#if STM32_NBTIM > 1
-      ||  ((struct stm32_tim_priv_s *)dev)->base == STM32_TIM7_BASE
-#endif
-#if STM32_NBTIM > 0
-  )
-    {
-      return ERROR;
-    }
-#endif
-
-  /* Decode operational modes */
-
-  switch (mode & STM32_TIM_MODE_MASK)
-    {
-      case STM32_TIM_MODE_DISABLED:
-        val = 0;
-        break;
-
-      case STM32_TIM_MODE_DOWN:
-        val |= ATIM_CR1_DIR;
-
-      case STM32_TIM_MODE_UP:
-        break;
-
-      case STM32_TIM_MODE_UPDOWN:
-        val |= ATIM_CR1_CENTER1;
-        // Our default: Interrupts are generated on compare, when counting down
-        break;
-
-      case STM32_TIM_MODE_PULSE:
-        val |= ATIM_CR1_OPM;
-        break;
-
-      default:
-        return ERROR;
-    }
-
-  stm32_tim_reload_counter(dev);
-  stm32_putreg16(dev, STM32_BTIM_CR1_OFFSET, val);
-
-#if STM32_NATIM > 0
-  /* Advanced registers require Main Output Enable */
-
-    if (((struct stm32_tim_priv_s *)dev)->base == STM32_TIM1_BASE ||
-        ((struct stm32_tim_priv_s *)dev)->base == STM32_TIM8_BASE)
-      {
-        stm32_modifyreg16(dev, STM32_ATIM_BDTR_OFFSET, 0, ATIM_BDTR_MOE);
-      }
-#endif
-
-  return OK;
+  DEBUGASSERT(dev != NULL);
+  return stm32_getreg32(dev, STM32_BTIM_CNT_OFFSET);
 }
 
+/************************************************************************************
+ * Name: stm32_tim_setchannel
+ ************************************************************************************/
+
 static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel,
                                 stm32_tim_channel_t mode)
 {
@@ -545,13 +917,13 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel
   uint16_t ccer_val    = stm32_getreg16(dev, STM32_GTIM_CCER_OFFSET);
   uint8_t  ccmr_offset = STM32_GTIM_CCMR1_OFFSET;
 
-  ASSERT(dev);
+  DEBUGASSERT(dev != NULL);
 
   /* Further we use range as 0..3; if channel=0 it will also overflow here */
 
   if (--channel > 4)
     {
-      return ERROR;
+      return -EINVAL;
     }
 
   /* Assume that channel is disabled and polarity is active high */
@@ -571,7 +943,7 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel
 #if STM32_NBTIM > 0
   )
     {
-      return ERROR;
+      return -EINVAL;
     }
 #endif
 
@@ -588,7 +960,7 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel
         break;
 
       default:
-        return ERROR;
+        return -EINVAL;
     }
 
   /* Set polarity */
@@ -621,6 +993,31 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel
 
   switch (((struct stm32_tim_priv_s *)dev)->base)
     {
+#ifdef CONFIG_STM32_TIM1
+      case STM32_TIM1_BASE:
+        switch (channel)
+          {
+#if defined(GPIO_TIM1_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM1_CH1OUT, mode); break;
+#endif
+#if defined(GPIO_TIM1_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM1_CH2OUT, mode); break;
+#endif
+#if defined(GPIO_TIM1_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM1_CH3OUT, mode); break;
+#endif
+#if defined(GPIO_TIM1_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM1_CH4OUT, mode); break;
+#endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
 #ifdef CONFIG_STM32_TIM2
       case STM32_TIM2_BASE:
         switch (channel)
@@ -646,7 +1043,7 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel
               break;
 #endif
             default:
-              return ERROR;
+              return -EINVAL;
           }
         break;
 #endif
@@ -675,7 +1072,7 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel
               break;
 #endif
             default:
-              return ERROR;
+              return -EINVAL;
           }
         break;
 #endif
@@ -704,7 +1101,7 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel
               break;
 #endif
             default:
-              return ERROR;
+              return -EINVAL;
           }
         break;
 #endif
@@ -733,34 +1130,7 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel
               break;
 #endif
             default:
-              return ERROR;
-          }
-        break;
-#endif
-
-#if STM32_NATIM > 0
-#ifdef CONFIG_STM32_TIM1
-      case STM32_TIM1_BASE:
-        switch (channel)
-          {
-#if defined(GPIO_TIM1_CH1OUT)
-            case 0:
-              stm32_tim_gpioconfig(GPIO_TIM1_CH1OUT, mode); break;
-#endif
-#if defined(GPIO_TIM1_CH2OUT)
-            case 1:
-              stm32_tim_gpioconfig(GPIO_TIM1_CH2OUT, mode); break;
-#endif
-#if defined(GPIO_TIM1_CH3OUT)
-            case 2:
-              stm32_tim_gpioconfig(GPIO_TIM1_CH3OUT, mode); break;
-#endif
-#if defined(GPIO_TIM1_CH4OUT)
-            case 3:
-              stm32_tim_gpioconfig(GPIO_TIM1_CH4OUT, mode); break;
-#endif
-            default:
-              return ERROR;
+              return -EINVAL;
           }
         break;
 #endif
@@ -785,22 +1155,286 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel
               stm32_tim_gpioconfig(GPIO_TIM8_CH4OUT, mode); break;
 #endif
             default:
-              return ERROR;
+              return -EINVAL;
           }
         break;
 #endif
+#ifdef CONFIG_STM32_TIM9
+      case STM32_TIM9_BASE:
+        switch (channel)
+          {
+#if defined(GPIO_TIM9_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM9_CH1OUT, mode);
+              break;
 #endif
-      default:
-        return ERROR;
-    }
-
-  return OK;
-}
+#if defined(GPIO_TIM9_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM9_CH2OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM9_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM9_CH3OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM9_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM9_CH4OUT, mode);
+              break;
+#endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM10
+      case STM32_TIM10_BASE:
+        switch (channel)
+          {
+#if defined(GPIO_TIM10_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM10_CH1OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM10_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM10_CH2OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM10_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM10_CH3OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM10_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM10_CH4OUT, mode);
+              break;
+#endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM11
+      case STM32_TIM11_BASE:
+        switch (channel)
+          {
+#if defined(GPIO_TIM11_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM11_CH1OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM11_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM11_CH2OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM11_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM11_CH3OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM11_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM11_CH4OUT, mode);
+              break;
+#endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM12
+      case STM32_TIM12_BASE:
+        switch (channel)
+          {
+#if defined(GPIO_TIM12_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM12_CH1OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM12_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM12_CH2OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM12_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM12_CH3OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM12_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM12_CH4OUT, mode);
+              break;
+#endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM13
+      case STM32_TIM13_BASE:
+        switch (channel)
+          {
+#if defined(GPIO_TIM13_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM13_CH1OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM13_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM13_CH2OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM13_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM13_CH3OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM13_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM13_CH4OUT, mode);
+              break;
+#endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM14
+      case STM32_TIM14_BASE:
+        switch (channel)
+          {
+#if defined(GPIO_TIM14_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM14_CH1OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM14_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM14_CH2OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM14_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM14_CH3OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM14_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM14_CH4OUT, mode);
+              break;
+#endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM15
+      case STM32_TIM15_BASE:
+        switch (channel)
+          {
+#if defined(GPIO_TIM15_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM15_CH1OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM15_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM15_CH2OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM15_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM15_CH3OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM15_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM15_CH4OUT, mode);
+              break;
+#endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM16
+      case STM32_TIM16_BASE:
+        switch (channel)
+          {
+#if defined(GPIO_TIM16_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM16_CH1OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM16_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM16_CH2OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM16_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM16_CH3OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM16_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM16_CH4OUT, mode);
+              break;
+#endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM17
+      case STM32_TIM17_BASE:
+        switch (channel)
+          {
+#if defined(GPIO_TIM17_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM17_CH1OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM17_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM17_CH2OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM17_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM17_CH3OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM17_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM17_CH4OUT, mode);
+              break;
+#endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+      default:
+        return -EINVAL;
+    }
+
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32_tim_setcompare
+ ************************************************************************************/
 
 static int stm32_tim_setcompare(FAR struct stm32_tim_dev_s *dev, uint8_t channel,
                                 uint32_t compare)
 {
-  ASSERT(dev);
+  DEBUGASSERT(dev != NULL);
 
   switch (channel)
     {
@@ -817,14 +1451,18 @@ static int stm32_tim_setcompare(FAR struct stm32_tim_dev_s *dev, uint8_t channel
         stm32_putreg32(dev, STM32_GTIM_CCR4_OFFSET, compare);
         break;
       default:
-        return ERROR;
+        return -EINVAL;
     }
   return OK;
 }
 
+/************************************************************************************
+ * Name: stm32_tim_getcapture
+ ************************************************************************************/
+
 static int stm32_tim_getcapture(FAR struct stm32_tim_dev_s *dev, uint8_t channel)
 {
-  ASSERT(dev);
+  DEBUGASSERT(dev != NULL);
 
   switch (channel)
     {
@@ -838,115 +1476,181 @@ static int stm32_tim_getcapture(FAR struct stm32_tim_dev_s *dev, uint8_t channel
         return stm32_getreg32(dev, STM32_GTIM_CCR4_OFFSET);
     }
 
-  return ERROR;
+  return -EINVAL;
 }
 
 /************************************************************************************
- * Advanced Functions
+ * Name: stm32_tim_setisr
  ************************************************************************************/
 
-/* TODO: Advanced functions for the STM32_ATIM */
-
-/************************************************************************************
- * Device Structures, Instantiation
- ************************************************************************************/
-
-struct stm32_tim_ops_s stm32_tim_ops =
+static int stm32_tim_setisr(FAR struct stm32_tim_dev_s *dev, xcpt_t handler,
+                            void * arg, int source)
 {
-  .setmode        = &stm32_tim_setmode,
-  .setclock       = &stm32_tim_setclock,
-  .setperiod      = &stm32_tim_setperiod,
-  .setchannel     = &stm32_tim_setchannel,
-  .setcompare     = &stm32_tim_setcompare,
-  .getcapture     = &stm32_tim_getcapture,
-  .setisr         = &stm32_tim_setisr,
-  .enableint      = &stm32_tim_enableint,
-  .disableint     = &stm32_tim_disableint,
-  .ackint         = &stm32_tim_ackint
-};
+  int vectorno;
+
+  DEBUGASSERT(dev != NULL);
+  DEBUGASSERT(source == 0);
 
+  switch (((struct stm32_tim_priv_s *)dev)->base)
+    {
+#ifdef CONFIG_STM32_TIM1
+      case STM32_TIM1_BASE:
+        vectorno = STM32_IRQ_TIM1UP;
+        break;
+#endif
 #ifdef CONFIG_STM32_TIM2
-struct stm32_tim_priv_s stm32_tim2_priv =
-{
-  .ops        = &stm32_tim_ops,
-  .mode       = STM32_TIM_MODE_UNUSED,
-  .base       = STM32_TIM2_BASE,
-};
+      case STM32_TIM2_BASE:
+        vectorno = STM32_IRQ_TIM2;
+        break;
 #endif
-
 #ifdef CONFIG_STM32_TIM3
-struct stm32_tim_priv_s stm32_tim3_priv =
-{
-  .ops        = &stm32_tim_ops,
-  .mode       = STM32_TIM_MODE_UNUSED,
-  .base       = STM32_TIM3_BASE,
-};
+      case STM32_TIM3_BASE:
+        vectorno = STM32_IRQ_TIM3;
+        break;
 #endif
-
 #ifdef CONFIG_STM32_TIM4
-struct stm32_tim_priv_s stm32_tim4_priv =
-{
-  .ops        = &stm32_tim_ops,
-  .mode       = STM32_TIM_MODE_UNUSED,
-  .base       = STM32_TIM4_BASE,
-};
+      case STM32_TIM4_BASE:
+        vectorno = STM32_IRQ_TIM4;
+        break;
 #endif
-
 #ifdef CONFIG_STM32_TIM5
-struct stm32_tim_priv_s stm32_tim5_priv =
-{
-  .ops        = &stm32_tim_ops,
-  .mode       = STM32_TIM_MODE_UNUSED,
-  .base       = STM32_TIM5_BASE,
-};
+      case STM32_TIM5_BASE:
+        vectorno = STM32_IRQ_TIM5;
+        break;
 #endif
-
-#if STM32_NBTIM > 0
 #ifdef CONFIG_STM32_TIM6
-struct stm32_tim_priv_s stm32_tim6_priv =
-{
-  .ops        = &stm32_tim_ops,
-  .mode       = STM32_TIM_MODE_UNUSED,
-  .base       = STM32_TIM6_BASE,
-};
-#endif
+      case STM32_TIM6_BASE:
+        vectorno = STM32_IRQ_TIM6;
+        break;
 #endif
-
-#if STM32_NBTIM > 1
 #ifdef CONFIG_STM32_TIM7
-struct stm32_tim_priv_s stm32_tim7_priv =
-{
-  .ops        = &stm32_tim_ops,
-  .mode       = STM32_TIM_MODE_UNUSED,
-  .base       = STM32_TIM7_BASE,
-};
+      case STM32_TIM7_BASE:
+        vectorno = STM32_IRQ_TIM7;
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM8
+      case STM32_TIM8_BASE:
+        vectorno = STM32_IRQ_TIM8UP;
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM9
+      case STM32_TIM9_BASE:
+        vectorno = STM32_IRQ_TIM9;
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM10
+      case STM32_TIM10_BASE:
+        vectorno = STM32_IRQ_TIM10;
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM11
+      case STM32_TIM11_BASE:
+        vectorno = STM32_IRQ_TIM11;
+        break;
 #endif
+#ifdef CONFIG_STM32_TIM12
+      case STM32_TIM12_BASE:
+        vectorno = STM32_IRQ_TIM12;
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM13
+      case STM32_TIM13_BASE:
+        vectorno = STM32_IRQ_TIM13;
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM14
+      case STM32_TIM14_BASE:
+        vectorno = STM32_IRQ_TIM14;
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM15
+      case STM32_TIM15_BASE:
+        vectorno = STM32_IRQ_TIM15;
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM16
+      case STM32_TIM16_BASE:
+        vectorno = STM32_IRQ_TIM16;
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM17
+      case STM32_TIM17_BASE:
+        vectorno = STM32_IRQ_TIM17;
+        break;
 #endif
 
-#if STM32_NATIM > 0
+      default:
+        return -EINVAL;
+    }
 
-#ifdef CONFIG_STM32_TIM1
-struct stm32_tim_priv_s stm32_tim1_priv =
-{
-  .ops        = &stm32_tim_ops,
-  .mode       = STM32_TIM_MODE_UNUSED,
-  .base       = STM32_TIM1_BASE,
-};
+  /* Disable interrupt when callback is removed */
+
+  if (!handler)
+    {
+      up_disable_irq(vectorno);
+      irq_detach(vectorno);
+      return OK;
+    }
+
+  /* Otherwise set callback and enable interrupt */
+
+  irq_attach(vectorno, handler ,arg);
+  up_enable_irq(vectorno);
+
+#ifdef CONFIG_ARCH_IRQPRIO
+  /* Set the interrupt priority */
+
+  up_prioritize_irq(vectorno, NVIC_SYSH_PRIORITY_DEFAULT);
 #endif
 
-#ifdef CONFIG_STM32_TIM8
-struct stm32_tim_priv_s stm32_tim8_priv =
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32_tim_enableint
+ ************************************************************************************/
+
+static void stm32_tim_enableint(FAR struct stm32_tim_dev_s *dev, int source)
 {
-  .ops        = &stm32_tim_ops,
-  .mode       = STM32_TIM_MODE_UNUSED,
-  .base       = STM32_TIM8_BASE,
-};
-#endif
+  DEBUGASSERT(dev != NULL);
+  stm32_modifyreg16(dev, STM32_BTIM_DIER_OFFSET, 0, ATIM_DIER_UIE);
+}
 
-#endif
+/************************************************************************************
+ * Name: stm32_tim_disableint
+ ************************************************************************************/
+
+static void stm32_tim_disableint(FAR struct stm32_tim_dev_s *dev, int source)
+{
+  DEBUGASSERT(dev != NULL);
+  stm32_modifyreg16(dev, STM32_BTIM_DIER_OFFSET, ATIM_DIER_UIE, 0);
+}
+
+/************************************************************************************
+ * Name: stm32_tim_ackint
+ ************************************************************************************/
+
+static void stm32_tim_ackint(FAR struct stm32_tim_dev_s *dev, int source)
+{
+  stm32_putreg16(dev, STM32_BTIM_SR_OFFSET, ~ATIM_SR_UIF);
+}
 
 /************************************************************************************
- * Public Function - Initialization
+ * Name: stm32_tim_checkint
+ ************************************************************************************/
+
+static int stm32_tim_checkint(FAR struct stm32_tim_dev_s *dev, int source)
+{
+  uint16_t regval = stm32_getreg16(dev, STM32_BTIM_SR_OFFSET);
+  return (regval & ATIM_SR_UIF) ? 1 : 0;
+}
+
+/************************************************************************************
+ * Pubic Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_tim_init
  ************************************************************************************/
 
 FAR struct stm32_tim_dev_s *stm32_tim_init(int timer)
@@ -957,6 +1661,12 @@ FAR struct stm32_tim_dev_s *stm32_tim_init(int timer)
 
   switch (timer)
     {
+#ifdef CONFIG_STM32_TIM1
+      case 1:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim1_priv;
+        modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM1EN);
+        break;
+#endif
 #ifdef CONFIG_STM32_TIM2
       case 2:
         dev = (struct stm32_tim_dev_s *)&stm32_tim2_priv;
@@ -981,37 +1691,77 @@ FAR struct stm32_tim_dev_s *stm32_tim_init(int timer)
         modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM5EN);
         break;
 #endif
-
-#if STM32_NBTIM > 0
 #ifdef CONFIG_STM32_TIM6
       case 6:
         dev = (struct stm32_tim_dev_s *)&stm32_tim6_priv;
         modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM6EN);
         break;
 #endif
-#endif
-#if STM32_NBTIM > 1
 #ifdef CONFIG_STM32_TIM7
       case 7:
         dev = (struct stm32_tim_dev_s *)&stm32_tim7_priv;
         modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM7EN);
         break;
 #endif
-#endif
-
-#if STM32_NATIM > 0
-#ifdef CONFIG_STM32_TIM1
-      case 1:
-        dev = (struct stm32_tim_dev_s *)&stm32_tim1_priv;
-        modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM1EN);
-        break;
-#endif
 #ifdef CONFIG_STM32_TIM8
       case 8:
         dev = (struct stm32_tim_dev_s *)&stm32_tim8_priv;
         modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM8EN);
         break;
 #endif
+#ifdef CONFIG_STM32_TIM9
+      case 9:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim9_priv;
+        modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM9EN);
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM10
+      case 10:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim10_priv;
+        modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM10EN);
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM11
+      case 11:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim11_priv;
+        modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM11EN);
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM12
+      case 12:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim12_priv;
+        modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM12EN);
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM13
+      case 13:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim13_priv;
+        modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM13EN);
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM14
+      case 14:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim14_priv;
+        modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM14EN);
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM15
+      case 15:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim15_priv;
+        modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM15EN);
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM16
+      case 16:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim16_priv;
+        modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM16EN);
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM17
+      case 17:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim17_priv;
+        modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM17EN);
+        break;
 #endif
       default:
         return NULL;
@@ -1029,16 +1779,26 @@ FAR struct stm32_tim_dev_s *stm32_tim_init(int timer)
   return dev;
 }
 
-/* TODO: Detach interrupts, and close down all TIM Channels */
+/************************************************************************************
+ * Name: stm32_tim_deinit
+ *
+ * TODO: Detach interrupts, and close down all TIM Channels
+ *
+ ************************************************************************************/
 
 int stm32_tim_deinit(FAR struct stm32_tim_dev_s * dev)
 {
-  ASSERT(dev);
+  DEBUGASSERT(dev != NULL);
 
   /* Disable power */
 
   switch (((struct stm32_tim_priv_s *)dev)->base)
     {
+#ifdef CONFIG_STM32_TIM1
+      case STM32_TIM1_BASE:
+        modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM1EN, 0);
+        break;
+#endif
 #ifdef CONFIG_STM32_TIM2
       case STM32_TIM2_BASE:
         modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM2EN, 0);
@@ -1059,35 +1819,68 @@ int stm32_tim_deinit(FAR struct stm32_tim_dev_s * dev)
         modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM5EN, 0);
         break;
 #endif
-#if STM32_NBTIM > 0
 #ifdef CONFIG_STM32_TIM6
       case STM32_TIM6_BASE:
         modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM6EN, 0);
         break;
 #endif
-#endif
-#if STM32_NBTIM > 1
 #ifdef CONFIG_STM32_TIM7
       case STM32_TIM7_BASE:
         modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM7EN, 0);
         break;
 #endif
-#endif
-
-#if STM32_NATIM > 0
-#ifdef CONFIG_STM32_TIM1
-      case STM32_TIM1_BASE:
-        modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM1EN, 0);
-        break;
-#endif
 #ifdef CONFIG_STM32_TIM8
       case STM32_TIM8_BASE:
         modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM8EN, 0);
         break;
 #endif
+#ifdef CONFIG_STM32_TIM9
+      case STM32_TIM9_BASE:
+        modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM9EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM10
+      case STM32_TIM10_BASE:
+        modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM10EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM11
+      case STM32_TIM11_BASE:
+        modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM11EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM12
+      case STM32_TIM12_BASE:
+        modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM12EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM13
+      case STM32_TIM13_BASE:
+        modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM13EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM14
+      case STM32_TIM14_BASE:
+        modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM14EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM15
+      case STM32_TIM15_BASE:
+        modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM15EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM16
+      case STM32_TIM16_BASE:
+        modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM16EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32_TIM17
+      case STM32_TIM17_BASE:
+        modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM17EN, 0);
+        break;
 #endif
       default:
-        return ERROR;
+        return -EINVAL;
     }
 
   /* Mark it as free */
@@ -1097,4 +1890,4 @@ int stm32_tim_deinit(FAR struct stm32_tim_dev_s * dev)
   return OK;
 }
 
-#endif /* defined(CONFIG_STM32_TIM1 || ... || TIM8) */
+#endif /* defined(CONFIG_STM32_TIM1 || ... || TIM17) */
diff --git a/arch/arm/src/stm32/stm32_tim.h b/arch/arm/src/stm32/stm32_tim.h
index 2d3b01a683b71c835641b858bbed7006151e1ebe..921baebc6c34415252cac0ab516ecfb301de1d3b 100644
--- a/arch/arm/src/stm32/stm32_tim.h
+++ b/arch/arm/src/stm32/stm32_tim.h
@@ -6,7 +6,7 @@
  *
  * With modifications and updates by:
  *
- *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -50,6 +50,8 @@
 #include "chip.h"
 #include "chip/stm32_tim.h"
 
+#include 
+
 /************************************************************************************
  * Pre-processor Definitions
  ************************************************************************************/
@@ -58,13 +60,15 @@
 #define STM32_TIM_SETMODE(d,mode)       ((d)->ops->setmode(d,mode))
 #define STM32_TIM_SETCLOCK(d,freq)      ((d)->ops->setclock(d,freq))
 #define STM32_TIM_SETPERIOD(d,period)   ((d)->ops->setperiod(d,period))
+#define STM32_TIM_GETCOUNTER(d)         ((d)->ops->getcounter(d))
 #define STM32_TIM_SETCHANNEL(d,ch,mode) ((d)->ops->setchannel(d,ch,mode))
 #define STM32_TIM_SETCOMPARE(d,ch,comp) ((d)->ops->setcompare(d,ch,comp))
 #define STM32_TIM_GETCAPTURE(d,ch)      ((d)->ops->getcapture(d,ch))
-#define STM32_TIM_SETISR(d,hnd,s)       ((d)->ops->setisr(d,hnd,s))
+#define STM32_TIM_SETISR(d,hnd,arg,s)   ((d)->ops->setisr(d,hnd,arg,s))
 #define STM32_TIM_ENABLEINT(d,s)        ((d)->ops->enableint(d,s))
 #define STM32_TIM_DISABLEINT(d,s)       ((d)->ops->disableint(d,s))
 #define STM32_TIM_ACKINT(d,s)           ((d)->ops->ackint(d,s))
+#define STM32_TIM_CHECKINT(d,s)         ((d)->ops->checkint(d,s))
 
 /************************************************************************************
  * Public Types
@@ -158,19 +162,23 @@ struct stm32_tim_ops_s
   int  (*setmode)(FAR struct stm32_tim_dev_s *dev, stm32_tim_mode_t mode);
   int  (*setclock)(FAR struct stm32_tim_dev_s *dev, uint32_t freq);
   void (*setperiod)(FAR struct stm32_tim_dev_s *dev, uint32_t period);
+  uint32_t (*getcounter)(FAR struct stm32_tim_dev_s *dev);
 
   /* General and Advanced Timers Adds */
 
-  int  (*setchannel)(FAR struct stm32_tim_dev_s *dev, uint8_t channel, stm32_tim_channel_t mode);
-  int  (*setcompare)(FAR struct stm32_tim_dev_s *dev, uint8_t channel, uint32_t compare);
+  int  (*setchannel)(FAR struct stm32_tim_dev_s *dev, uint8_t channel,
+                     stm32_tim_channel_t mode);
+  int  (*setcompare)(FAR struct stm32_tim_dev_s *dev, uint8_t channel,
+                     uint32_t compare);
   int  (*getcapture)(FAR struct stm32_tim_dev_s *dev, uint8_t channel);
 
   /* Timer interrupts */
 
-  int  (*setisr)(FAR struct stm32_tim_dev_s *dev, int (*handler)(int irq, void *context), int source);
+  int  (*setisr)(FAR struct stm32_tim_dev_s *dev, xcpt_t handler, void * arg, int source);
   void (*enableint)(FAR struct stm32_tim_dev_s *dev, int source);
   void (*disableint)(FAR struct stm32_tim_dev_s *dev, int source);
   void (*ackint)(FAR struct stm32_tim_dev_s *dev, int source);
+  int  (*checkint)(FAR struct stm32_tim_dev_s *dev, int source);
 };
 
 /************************************************************************************
@@ -183,7 +191,7 @@ FAR struct stm32_tim_dev_s *stm32_tim_init(int timer);
 
 /* Power-down timer, mark it as unused */
 
-int stm32_tim_deinit(FAR struct stm32_tim_dev_s * dev);
+int stm32_tim_deinit(FAR struct stm32_tim_dev_s *dev);
 
 /****************************************************************************
  * Name: stm32_timer_initialize
diff --git a/arch/arm/src/stm32/stm32_tim_lowerhalf.c b/arch/arm/src/stm32/stm32_tim_lowerhalf.c
index 5de8549c71d65d2535323875ce337329026f618f..cea5e2c2726454b46286dd688f46d99def02a1bb 100644
--- a/arch/arm/src/stm32/stm32_tim_lowerhalf.c
+++ b/arch/arm/src/stm32/stm32_tim_lowerhalf.c
@@ -107,8 +107,8 @@ struct stm32_lowerhalf_s
 {
   FAR const struct timer_ops_s *ops;        /* Lower half operations */
   FAR struct stm32_tim_dev_s   *tim;        /* stm32 timer driver */
-  tccb_t                        usrhandler; /* Current user interrupt handler */
-  const xcpt_t                  timhandler; /* Current timer interrupt handler */
+  tccb_t                        callback;   /* Current user interrupt callback */
+  FAR void                     *arg;        /* Argument passed to upper half callback */
   bool                          started;    /* True: Timer has been started */
   const uint8_t                 resolution; /* Number of bits in the timer (16 or 32 bits) */
 };
@@ -116,53 +116,7 @@ struct stm32_lowerhalf_s
 /****************************************************************************
  * Private Function Prototypes
  ****************************************************************************/
-
-/* Interrupt handling *******************************************************/
-
-#ifdef CONFIG_STM32_TIM1
-static int stm32_tim1_interrupt(int irq, FAR void *context);
-#endif
-#ifdef CONFIG_STM32_TIM2
-static int stm32_tim2_interrupt(int irq, FAR void *context);
-#endif
-#ifdef CONFIG_STM32_TIM3
-static int stm32_tim3_interrupt(int irq, FAR void *context);
-#endif
-#ifdef CONFIG_STM32_TIM4
-static int stm32_tim4_interrupt(int irq, FAR void *context);
-#endif
-#ifdef CONFIG_STM32_TIM5
-static int stm32_tim5_interrupt(int irq, FAR void *context);
-#endif
-#ifdef CONFIG_STM32_TIM6
-static int stm32_tim6_interrupt(int irq, FAR void *context);
-#endif
-#ifdef CONFIG_STM32_TIM7
-static int stm32_tim7_interrupt(int irq, FAR void *context);
-#endif
-#ifdef CONFIG_STM32_TIM8
-static int stm32_tim8_interrupt(int irq, FAR void *context);
-#endif
-#ifdef CONFIG_STM32_TIM9
-static int stm32_tim9_interrupt(int irq, FAR void *context);
-#endif
-#ifdef CONFIG_STM32_TIM10
-static int stm32_tim10_interrupt(int irq, FAR void *context);
-#endif
-#ifdef CONFIG_STM32_TIM11
-static int stm32_tim11_interrupt(int irq, FAR void *context);
-#endif
-#ifdef CONFIG_STM32_TIM12
-static int stm32_tim12_interrupt(int irq, FAR void *context);
-#endif
-#ifdef CONFIG_STM32_TIM13
-static int stm32_tim13_interrupt(int irq, FAR void *context);
-#endif
-#ifdef CONFIG_STM32_TIM14
-static int stm32_tim14_interrupt(int irq, FAR void *context);
-#endif
-
-static int stm32_timer_handler(FAR struct stm32_lowerhalf_s *lower);
+static int stm32_timer_handler(int irq, void * context, void * arg);
 
 /* "Lower half" driver methods **********************************************/
 
@@ -170,8 +124,8 @@ static int stm32_start(FAR struct timer_lowerhalf_s *lower);
 static int stm32_stop(FAR struct timer_lowerhalf_s *lower);
 static int stm32_settimeout(FAR struct timer_lowerhalf_s *lower,
                             uint32_t timeout);
-static tccb_t stm32_sethandler(FAR struct timer_lowerhalf_s *lower,
-                               tccb_t handler);
+static void stm32_setcallback(FAR struct timer_lowerhalf_s *lower,
+                              tccb_t callback, FAR void *arg);
 
 /****************************************************************************
  * Private Data
@@ -180,137 +134,123 @@ static tccb_t stm32_sethandler(FAR struct timer_lowerhalf_s *lower,
 
 static const struct timer_ops_s g_timer_ops =
 {
-  .start      = stm32_start,
-  .stop       = stm32_stop,
-  .getstatus  = NULL,
-  .settimeout = stm32_settimeout,
-  .sethandler = stm32_sethandler,
-  .ioctl      = NULL,
+  .start       = stm32_start,
+  .stop        = stm32_stop,
+  .getstatus   = NULL,
+  .settimeout  = stm32_settimeout,
+  .setcallback = stm32_setcallback,
+  .ioctl       = NULL,
 };
 
 #ifdef CONFIG_STM32_TIM1
 static struct stm32_lowerhalf_s g_tim1_lowerhalf =
 {
-  .ops        = &g_timer_ops,
-  .timhandler = stm32_tim1_interrupt,
-  .resolution = STM32_TIM1_RES,
+  .ops         = &g_timer_ops,
+  .resolution  = STM32_TIM1_RES,
 };
 #endif
 
 #ifdef CONFIG_STM32_TIM2
 static struct stm32_lowerhalf_s g_tim2_lowerhalf =
 {
-  .ops        = &g_timer_ops,
-  .timhandler = stm32_tim2_interrupt,
-  .resolution = STM32_TIM2_RES,
+  .ops         = &g_timer_ops,
+  .resolution  = STM32_TIM2_RES,
 };
 #endif
 
 #ifdef CONFIG_STM32_TIM3
 static struct stm32_lowerhalf_s g_tim3_lowerhalf =
 {
-  .ops        = &g_timer_ops,
-  .timhandler = stm32_tim3_interrupt,
-  .resolution = STM32_TIM3_RES,
+  .ops         = &g_timer_ops,
+  .resolution  = STM32_TIM3_RES,
 };
 #endif
 
 #ifdef CONFIG_STM32_TIM4
 static struct stm32_lowerhalf_s g_tim4_lowerhalf =
 {
-  .ops        = &g_timer_ops,
-  .timhandler = stm32_tim4_interrupt,
-  .resolution = STM32_TIM4_RES,
+  .ops         = &g_timer_ops,
+  .resolution  = STM32_TIM4_RES,
 };
 #endif
 
 #ifdef CONFIG_STM32_TIM5
 static struct stm32_lowerhalf_s g_tim5_lowerhalf =
 {
-  .ops        = &g_timer_ops,
-  .timhandler = stm32_tim5_interrupt,
-  .resolution = STM32_TIM5_RES,
+  .ops         = &g_timer_ops,
+  .resolution  = STM32_TIM5_RES,
 };
 #endif
 
 #ifdef CONFIG_STM32_TIM6
 static struct stm32_lowerhalf_s g_tim6_lowerhalf =
 {
-  .ops        = &g_timer_ops,
-  .timhandler = stm32_tim6_interrupt,
-  .resolution = STM32_TIM6_RES,
+  .ops         = &g_timer_ops,
+  .resolution  = STM32_TIM6_RES,
 };
 #endif
 
 #ifdef CONFIG_STM32_TIM7
 static struct stm32_lowerhalf_s g_tim7_lowerhalf =
 {
-  .ops        = &g_timer_ops,
-  .timhandler = stm32_tim7_interrupt,
-  .resolution = STM32_TIM7_RES,
+  .ops         = &g_timer_ops,
+  .resolution  = STM32_TIM7_RES,
 };
 #endif
 
 #ifdef CONFIG_STM32_TIM8
 static struct stm32_lowerhalf_s g_tim8_lowerhalf =
 {
-  .ops        = &g_timer_ops,
-  .timhandler = stm32_tim8_interrupt,
-  .resolution = STM32_TIM8_RES,
+  .ops         = &g_timer_ops,
+  .resolution  = STM32_TIM8_RES,
 };
 #endif
 
 #ifdef CONFIG_STM32_TIM9
 static struct stm32_lowerhalf_s g_tim9_lowerhalf =
 {
-  .ops        = &g_timer_ops,
-  .timhandler = stm32_tim9_interrupt,
-  .resolution = STM32_TIM9_RES,
+  .ops         = &g_timer_ops,
+  .resolution  = STM32_TIM9_RES,
 };
 #endif
 
 #ifdef CONFIG_STM32_TIM10
 static struct stm32_lowerhalf_s g_tim10_lowerhalf =
 {
-  .ops        = &g_timer_ops,
-  .timhandler = stm32_tim10_interrupt,
-  .resolution = STM32_TIM10_RES,
+  .ops         = &g_timer_ops,
+  .resolution  = STM32_TIM10_RES,
 };
 #endif
 
 #ifdef CONFIG_STM32_TIM11
 static struct stm32_lowerhalf_s g_tim11_lowerhalf =
 {
-  .ops        = &g_timer_ops,
-  .timhandler = stm32_tim11_interrupt,
-  .resolution = STM32_TIM11_RES,
+  .ops         = &g_timer_ops,
+  .resolution  = STM32_TIM11_RES,
 };
 #endif
 
 #ifdef CONFIG_STM32_TIM12
 static struct stm32_lowerhalf_s g_tim12_lowerhalf =
 {
-  .ops        = &g_timer_ops,
-  .timhandler = stm32_tim12_interrupt,
-  .resolution = STM32_TIM12_RES,
+  .ops         = &g_timer_ops,
+  .resolution  = STM32_TIM12_RES,
 };
 #endif
 
 #ifdef CONFIG_STM32_TIM13
 static struct stm32_lowerhalf_s g_tim13_lowerhalf =
 {
-  .ops        = &g_timer_ops,
-  .timhandler = stm32_tim13_interrupt,
-  .resolution = STM32_TIM13_RES,
+  .ops         = &g_timer_ops,
+  .resolution  = STM32_TIM13_RES,
 };
 #endif
 
 #ifdef CONFIG_STM32_TIM14
 static struct stm32_lowerhalf_s g_tim14_lowerhalf =
 {
-  .ops        = &g_timer_ops,
-  .timhandler = stm32_tim14_interrupt,
-  .resolution = STM32_TIM14_RES,
+  .ops         = &g_timer_ops,
+  .resolution  = STM32_TIM14_RES,
 };
 #endif
 
@@ -318,112 +258,6 @@ static struct stm32_lowerhalf_s g_tim14_lowerhalf =
  * Private Functions
  ****************************************************************************/
 
-/****************************************************************************
- * Name: stm32_timN_interrupt, N=1..14
- *
- * Description:
- *   Individual interrupt handlers for each timer
- *
- ****************************************************************************/
-
-#ifdef CONFIG_STM32_TIM1
-static int stm32_tim1_interrupt(int irq, FAR void *context)
-{
-  return stm32_timer_handler(&g_tim1_lowerhalf);
-}
-#endif
-
-#ifdef CONFIG_STM32_TIM2
-static int stm32_tim2_interrupt(int irq, FAR void *context)
-{
-  return stm32_timer_handler(&g_tim2_lowerhalf);
-}
-#endif
-
-#ifdef CONFIG_STM32_TIM3
-static int stm32_tim3_interrupt(int irq, FAR void *context)
-{
-  return stm32_timer_handler(&g_tim3_lowerhalf);
-}
-#endif
-
-#ifdef CONFIG_STM32_TIM4
-static int stm32_tim4_interrupt(int irq, FAR void *context)
-{
-  return stm32_timer_handler(&g_tim4_lowerhalf);
-}
-#endif
-
-#ifdef CONFIG_STM32_TIM5
-static int stm32_tim5_interrupt(int irq, FAR void *context)
-{
-  return stm32_timer_handler(&g_tim5_lowerhalf);
-}
-#endif
-
-#ifdef CONFIG_STM32_TIM6
-static int stm32_tim6_interrupt(int irq, FAR void *context)
-{
-  return stm32_timer_handler(&g_tim6_lowerhalf);
-}
-#endif
-
-#ifdef CONFIG_STM32_TIM7
-static int stm32_tim7_interrupt(int irq, FAR void *context)
-{
-  return stm32_timer_handler(&g_tim7_lowerhalf);
-}
-#endif
-
-#ifdef CONFIG_STM32_TIM8
-static int stm32_tim8_interrupt(int irq, FAR void *context)
-{
-  return stm32_timer_handler(&g_tim8_lowerhalf);
-}
-#endif
-
-#ifdef CONFIG_STM32_TIM9
-static int stm32_tim9_interrupt(int irq, FAR void *context)
-{
-  return stm32_timer_handler(&g_tim9_lowerhalf);
-}
-#endif
-
-#ifdef CONFIG_STM32_TIM10
-static int stm32_tim10_interrupt(int irq, FAR void *context)
-{
-  return stm32_timer_handler(&g_tim10_lowerhalf);
-}
-#endif
-
-#ifdef CONFIG_STM32_TIM11
-static int stm32_tim11_interrupt(int irq, FAR void *context)
-{
-  return stm32_timer_handler(&g_tim11_lowerhalf);
-}
-#endif
-
-#ifdef CONFIG_STM32_TIM12
-static int stm32_tim12_interrupt(int irq, FAR void *context)
-{
-  return stm32_timer_handler(&g_tim12_lowerhalf);
-}
-#endif
-
-#ifdef CONFIG_STM32_TIM13
-static int stm32_tim13_interrupt(int irq, FAR void *context)
-{
-  return stm32_timer_handler(&g_tim13_lowerhalf);
-}
-#endif
-
-#ifdef CONFIG_STM32_TIM14
-static int stm32_tim14_interrupt(int irq, FAR void *context)
-{
-  return stm32_timer_handler(&g_tim14_lowerhalf);
-}
-#endif
-
 /****************************************************************************
  * Name: stm32_timer_handler
  *
@@ -436,13 +270,14 @@ static int stm32_tim14_interrupt(int irq, FAR void *context)
  *
  ****************************************************************************/
 
-static int stm32_timer_handler(FAR struct stm32_lowerhalf_s *lower)
+static int stm32_timer_handler(int irq, void * context, void * arg)
 {
+  FAR struct stm32_lowerhalf_s *lower = (struct stm32_lowerhalf_s *) arg;
   uint32_t next_interval_us = 0;
 
   STM32_TIM_ACKINT(lower->tim, 0);
 
-  if (lower->usrhandler(&next_interval_us))
+  if (lower->callback(&next_interval_us, lower->arg))
     {
       if (next_interval_us > 0)
         {
@@ -480,9 +315,9 @@ static int stm32_start(FAR struct timer_lowerhalf_s *lower)
     {
       STM32_TIM_SETMODE(priv->tim, STM32_TIM_MODE_UP);
 
-      if (priv->usrhandler != NULL)
+      if (priv->callback != NULL)
         {
-          STM32_TIM_SETISR(priv->tim, priv->timhandler, 0);
+          STM32_TIM_SETISR(priv->tim, stm32_timer_handler, priv, 0);
           STM32_TIM_ENABLEINT(priv->tim, 0);
         }
 
@@ -518,7 +353,7 @@ static int stm32_stop(struct timer_lowerhalf_s *lower)
     {
       STM32_TIM_SETMODE(priv->tim, STM32_TIM_MODE_DISABLED);
       STM32_TIM_DISABLEINT(priv->tim, 0);
-      STM32_TIM_SETISR(priv->tim, 0, 0);
+      STM32_TIM_SETISR(priv->tim, NULL, NULL, 0);
       priv->started = false;
       return OK;
     }
@@ -571,17 +406,18 @@ static int stm32_settimeout(FAR struct timer_lowerhalf_s *lower, uint32_t timeou
 }
 
 /****************************************************************************
- * Name: stm32_sethandler
+ * Name: stm32_setcallback
  *
  * Description:
- *   Call this user provided timeout handler.
+ *   Call this user provided timeout callback.
  *
  * Input Parameters:
  *   lower      - A pointer the publicly visible representation of the "lower-half"
  *                driver state structure.
- *   newhandler - The new timer expiration function pointer.  If this
+ *   callback - The new timer expiration function pointer.  If this
  *                function pointer is NULL, then the reset-on-expiration
  *                behavior is restored,
+ *  arg          - Argument that will be provided in the callback
  *
  * Returned Values:
  *   The previous timer expiration function pointer or NULL is there was
@@ -589,34 +425,30 @@ static int stm32_settimeout(FAR struct timer_lowerhalf_s *lower, uint32_t timeou
  *
  ****************************************************************************/
 
-static tccb_t stm32_sethandler(FAR struct timer_lowerhalf_s *lower,
-                               tccb_t newhandler)
+static void stm32_setcallback(FAR struct timer_lowerhalf_s *lower,
+                              tccb_t callback, FAR void *arg)
 {
   FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
 
   irqstate_t flags = enter_critical_section();
 
-  /* Get the old handler return value */
-
-  tccb_t oldhandler = priv->usrhandler;
-
-  /* Save the new handler */
+  /* Save the new callback */
 
-  priv->usrhandler = newhandler;
+  priv->callback = callback;
+  priv->arg      = arg;
 
-  if (newhandler != NULL && priv->started)
+  if (callback != NULL && priv->started)
     {
-      STM32_TIM_SETISR(priv->tim, priv->timhandler, 0);
+      STM32_TIM_SETISR(priv->tim, stm32_timer_handler, priv, 0);
       STM32_TIM_ENABLEINT(priv->tim, 0);
     }
   else
     {
       STM32_TIM_DISABLEINT(priv->tim, 0);
-      STM32_TIM_SETISR(priv->tim, 0, 0);
+      STM32_TIM_SETISR(priv->tim, NULL, NULL, 0);
     }
 
   leave_critical_section(flags);
-  return oldhandler;
 }
 
 /****************************************************************************
@@ -723,9 +555,9 @@ int stm32_timer_initialize(FAR const char *devpath, int timer)
 
   /* Initialize the elements of lower half state structure */
 
-  lower->started    = false;
-  lower->usrhandler = NULL;
-  lower->tim        = stm32_tim_init(timer);
+  lower->started  = false;
+  lower->callback = NULL;
+  lower->tim      = stm32_tim_init(timer);
 
   if (lower->tim == NULL)
     {
diff --git a/arch/arm/src/stm32/stm32_timerisr.c b/arch/arm/src/stm32/stm32_timerisr.c
index b9c3fa1ab3eda55e2a960282ff364a1a978b5676..ac2aaae09453929b75e77f3173d98bed4ec546b8 100644
--- a/arch/arm/src/stm32/stm32_timerisr.c
+++ b/arch/arm/src/stm32/stm32_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32/stm32_timerisr.c
  *
- *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -86,19 +86,11 @@
 #endif
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  stm32_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -106,7 +98,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int stm32_timerisr(int irq, uint32_t *regs, void *arg)
 {
   /* Process timer interrupt */
 
@@ -115,7 +107,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -123,7 +119,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t regval;
 
@@ -152,7 +148,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(STM32_IRQ_SYSTICK, (xcpt_t)up_timerisr);
+  (void)irq_attach(STM32_IRQ_SYSTICK, (xcpt_t)stm32_timerisr, NULL);
 
   /* Enable SysTick interrupts */
 
diff --git a/arch/arm/src/stm32/stm32_uart.h b/arch/arm/src/stm32/stm32_uart.h
index 76fc41e0ba07e5b71e78781c46590e349cd94ab0..fe2542cfa6948592e8eef935484ee7e071feb5ad 100644
--- a/arch/arm/src/stm32/stm32_uart.h
+++ b/arch/arm/src/stm32/stm32_uart.h
@@ -50,7 +50,8 @@
 #  include "chip/stm32f10xxx_uart.h"
 #elif defined(CONFIG_STM32_STM32F20XX)
 #  include "chip/stm32f20xxx_uart.h"
-#elif defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
+#elif defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
+    defined(CONFIG_STM32_STM32F37XX)
 #  include "chip/stm32f30xxx_uart.h"
 #elif defined(CONFIG_STM32_STM32F40XX)
 #  include "chip/stm32f40xxx_uart.h"
diff --git a/arch/arm/src/stm32/stm32_usbdev.c b/arch/arm/src/stm32/stm32_usbdev.c
index 27f75be899a0c0deba68a77eb30a55a2c33e37cb..e042f50a76e005e4854385eb5fc2b70e5a7a900b 100644
--- a/arch/arm/src/stm32/stm32_usbdev.c
+++ b/arch/arm/src/stm32/stm32_usbdev.c
@@ -103,7 +103,7 @@
  * enabled.
  */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_USB_INFO
 #  undef CONFIG_STM32_USBDEV_REGDEBUG
 #endif
 
@@ -388,7 +388,7 @@ struct stm32_usbdev_s
 
 /* Register operations ******************************************************/
 
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32_USBDEV_REGDEBUG
 static uint16_t stm32_getreg(uint32_t addr);
 static void stm32_putreg(uint16_t val, uint32_t addr);
 static void stm32_checksetup(void);
@@ -484,8 +484,8 @@ static void   stm32_ep0in(struct stm32_usbdev_s *priv);
 static inline void
               stm32_ep0done(struct stm32_usbdev_s *priv, uint16_t istr);
 static void   stm32_lptransfer(struct stm32_usbdev_s *priv);
-static int    stm32_hpinterrupt(int irq, void *context);
-static int    stm32_lpinterrupt(int irq, void *context);
+static int    stm32_hpinterrupt(int irq, void *context, FAR void *arg);
+static int    stm32_lpinterrupt(int irq, void *context, FAR void *arg);
 
 /* Endpoint helpers *********************************************************/
 
@@ -648,11 +648,12 @@ const struct trace_msg_t g_usb_trace_strings_deverror[] =
 /****************************************************************************
  * Register Operations
  ****************************************************************************/
+
 /****************************************************************************
  * Name: stm32_getreg
  ****************************************************************************/
 
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32_USBDEV_REGDEBUG
 static uint16_t stm32_getreg(uint32_t addr)
 {
   static uint32_t prevaddr = 0;
@@ -673,7 +674,7 @@ static uint16_t stm32_getreg(uint32_t addr)
         {
            if (count == 4)
              {
-               lldbg("...\n");
+               uinfo("...\n");
              }
           return val;
         }
@@ -689,7 +690,7 @@ static uint16_t stm32_getreg(uint32_t addr)
          {
            /* Yes.. then show how many times the value repeated */
 
-           lldbg("[repeats %d more times]\n", count-3);
+           uinfo("[repeats %d more times]\n", count-3);
          }
 
        /* Save the new address, value, and count */
@@ -701,7 +702,7 @@ static uint16_t stm32_getreg(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%04x\n", addr, val);
+  uinfo("%08x->%04x\n", addr, val);
   return val;
 }
 #endif
@@ -710,12 +711,12 @@ static uint16_t stm32_getreg(uint32_t addr)
  * Name: stm32_putreg
  ****************************************************************************/
 
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32_USBDEV_REGDEBUG
 static void stm32_putreg(uint16_t val, uint32_t addr)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%04x\n", addr, val);
+  uinfo("%08x<-%04x\n", addr, val);
 
   /* Write the value */
 
@@ -727,42 +728,42 @@ static void stm32_putreg(uint16_t val, uint32_t addr)
  * Name: stm32_dumpep
  ****************************************************************************/
 
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32_USBDEV_REGDEBUG
 static void stm32_dumpep(int epno)
 {
   uint32_t addr;
 
   /* Common registers */
 
-  lldbg("CNTR:   %04x\n", getreg16(STM32_USB_CNTR));
-  lldbg("ISTR:   %04x\n", getreg16(STM32_USB_ISTR));
-  lldbg("FNR:    %04x\n", getreg16(STM32_USB_FNR));
-  lldbg("DADDR:  %04x\n", getreg16(STM32_USB_DADDR));
-  lldbg("BTABLE: %04x\n", getreg16(STM32_USB_BTABLE));
+  uinfo("CNTR:   %04x\n", getreg16(STM32_USB_CNTR));
+  uinfo("ISTR:   %04x\n", getreg16(STM32_USB_ISTR));
+  uinfo("FNR:    %04x\n", getreg16(STM32_USB_FNR));
+  uinfo("DADDR:  %04x\n", getreg16(STM32_USB_DADDR));
+  uinfo("BTABLE: %04x\n", getreg16(STM32_USB_BTABLE));
 
   /* Endpoint register */
 
   addr = STM32_USB_EPR(epno);
-  lldbg("EPR%d:   [%08x] %04x\n", epno, addr, getreg16(addr));
+  uinfo("EPR%d:   [%08x] %04x\n", epno, addr, getreg16(addr));
 
   /* Endpoint descriptor */
 
   addr = STM32_USB_BTABLE_ADDR(epno, 0);
-  lldbg("DESC:   %08x\n", addr);
+  uinfo("DESC:   %08x\n", addr);
 
   /* Endpoint buffer descriptor */
 
   addr = STM32_USB_ADDR_TX(epno);
-  lldbg("  TX ADDR:  [%08x] %04x\n",  addr, getreg16(addr));
+  uinfo("  TX ADDR:  [%08x] %04x\n",  addr, getreg16(addr));
 
   addr = STM32_USB_COUNT_TX(epno);
-  lldbg("     COUNT: [%08x] %04x\n",  addr, getreg16(addr));
+  uinfo("     COUNT: [%08x] %04x\n",  addr, getreg16(addr));
 
   addr = STM32_USB_ADDR_RX(epno);
-  lldbg("  RX ADDR:  [%08x] %04x\n",  addr, getreg16(addr));
+  uinfo("  RX ADDR:  [%08x] %04x\n",  addr, getreg16(addr));
 
   addr = STM32_USB_COUNT_RX(epno);
-  lldbg("     COUNT: [%08x] %04x\n",  addr, getreg16(addr));
+  uinfo("     COUNT: [%08x] %04x\n",  addr, getreg16(addr));
 }
 #endif
 
@@ -770,19 +771,19 @@ static void stm32_dumpep(int epno)
  * Name: stm32_checksetup
  ****************************************************************************/
 
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32_USBDEV_REGDEBUG
 static void stm32_checksetup(void)
 {
   uint32_t cfgr     = getreg32(STM32_RCC_CFGR);
   uint32_t apb1rstr = getreg32(STM32_RCC_APB1RSTR);
   uint32_t apb1enr  = getreg32(STM32_RCC_APB1ENR);
 
-  lldbg("CFGR: %08x APB1RSTR: %08x APB1ENR: %08x\n", cfgr, apb1rstr, apb1enr);
+  uinfo("CFGR: %08x APB1RSTR: %08x APB1ENR: %08x\n", cfgr, apb1rstr, apb1enr);
 
   if ((apb1rstr & RCC_APB1RSTR_USBRST) != 0 ||
       (apb1enr & RCC_APB1ENR_USBEN) == 0)
     {
-      lldbg("ERROR: USB is NOT setup correctly\n");
+      uerr("ERROR: USB is NOT setup correctly\n");
     }
 }
 #endif
@@ -1367,8 +1368,8 @@ static int stm32_wrrequest(struct stm32_usbdev_s *priv, struct stm32_ep_s *prive
     }
 
   epno = USB_EPNO(privep->ep.eplog);
-  ullvdbg("epno=%d req=%p: len=%d xfrd=%d nullpkt=%d\n",
-          epno, privreq, privreq->req.len, privreq->req.xfrd, privep->txnullpkt);
+  uinfo("epno=%d req=%p: len=%d xfrd=%d nullpkt=%d\n",
+        epno, privreq, privreq->req.len, privreq->req.xfrd, privep->txnullpkt);
   UNUSED(epno);
 
   /* Get the number of bytes left to be sent in the packet */
@@ -1458,7 +1459,7 @@ static inline int stm32_ep0_rdrequest(struct stm32_usbdev_s *priv)
 
   pmalen  = stm32_geteprxcount(EP0);
 
-  ullvdbg("EP0: pmalen=%d\n", pmalen);
+  uinfo("EP0: pmalen=%d\n", pmalen);
   usbtrace(TRACE_READ(EP0), pmalen);
 
   /* Read the data into our special buffer for SETUP data */
@@ -1510,7 +1511,7 @@ static int stm32_rdrequest(struct stm32_usbdev_s *priv, struct stm32_ep_s *prive
       return -ENOENT;
     }
 
-  ullvdbg("EP%d: len=%d xfrd=%d\n", epno, privreq->req.len, privreq->req.xfrd);
+  uinfo("EP%d: len=%d xfrd=%d\n", epno, privreq->req.len, privreq->req.xfrd);
 
   /* Ignore any attempt to receive a zero length packet */
 
@@ -1768,8 +1769,8 @@ static void stm32_ep0setup(struct stm32_usbdev_s *priv)
       index.w = GETUINT16(priv->ctrl.index);
       len.w   = GETUINT16(priv->ctrl.len);
 
-      ullvdbg("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
-              priv->ctrl.type, priv->ctrl.req, value.w, index.w, len.w);
+      uinfo("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+            priv->ctrl.type, priv->ctrl.req, value.w, index.w, len.w);
 
       /* Is this an setup with OUT and data of length > 0 */
 
@@ -1959,7 +1960,7 @@ static void stm32_ep0setup(struct stm32_usbdev_s *priv)
           {
             /* Special case recipient=device test mode */
 
-            ullvdbg("test mode: %d\n", index.w);
+            uinfo("test mode: %d\n", index.w);
           }
         else if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) != USB_REQ_RECIPIENT_ENDPOINT)
           {
@@ -2412,7 +2413,7 @@ static void stm32_lptransfer(struct stm32_usbdev_s *priv)
  * Name: stm32_hpinterrupt
  ****************************************************************************/
 
-static int stm32_hpinterrupt(int irq, void *context)
+static int stm32_hpinterrupt(int irq, void *context, FAR void *arg)
 {
   /* For now there is only one USB controller, but we will always refer to
    * it using a pointer to make any future ports to multiple USB controllers
@@ -2454,7 +2455,7 @@ static int stm32_hpinterrupt(int irq, void *context)
  * Name: stm32_lpinterrupt
  ****************************************************************************/
 
-static int stm32_lpinterrupt(int irq, void *context)
+static int stm32_lpinterrupt(int irq, void *context, FAR void *arg)
 {
   /* For now there is only one USB controller, but we will always refer to
    * it using a pointer to make any future ports to multiple USB controllers
@@ -2840,11 +2841,11 @@ static int stm32_epconfigure(struct usbdev_ep_s *ep,
   uint16_t maxpacket;
   uint8_t  epno;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !desc)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
-      ulldbg("ERROR: ep=%p desc=%p\n");
+      uerr("ERROR: ep=%p desc=%p\n");
       return -EINVAL;
     }
 #endif
@@ -2936,11 +2937,11 @@ static int stm32_epdisable(struct usbdev_ep_s *ep)
   irqstate_t flags;
   uint8_t epno;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
-      ulldbg("ERROR: ep=%p\n", ep);
+      uerr("ERROR: ep=%p\n", ep);
       return -EINVAL;
     }
 #endif
@@ -2971,7 +2972,7 @@ static struct usbdev_req_s *stm32_epallocreq(struct usbdev_ep_s *ep)
 {
   struct stm32_req_s *privreq;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -2999,7 +3000,7 @@ static void stm32_epfreereq(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
 {
   struct stm32_req_s *privreq = (struct stm32_req_s *)req;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -3024,11 +3025,12 @@ static int stm32_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
   uint8_t epno;
   int ret = OK;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!req || !req->callback || !req->buf || !ep)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
-      ulldbg("ERROR: req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+      uerr("ERROR: req=%p callback=%p buf=%p ep=%p\n",
+           req, req->callback, req->buf, ep);
       return -EINVAL;
     }
 #endif
@@ -3036,11 +3038,11 @@ static int stm32_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
   usbtrace(TRACE_EPSUBMIT, USB_EPNO(ep->eplog));
   priv = privep->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv->driver)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_NOTCONFIGURED), priv->usbdev.speed);
-      ulldbg("ERROR: driver=%p\n", priv->driver);
+      uerr("ERROR: driver=%p\n", priv->driver);
       return -ESHUTDOWN;
     }
 #endif
@@ -3057,7 +3059,7 @@ static int stm32_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
   if (privep->stalled)
     {
       stm32_abortrequest(privep, privreq, -EBUSY);
-      ulldbg("ERROR: stalled\n");
+      uerr("ERROR: stalled\n");
       ret = -EBUSY;
     }
 
@@ -3136,7 +3138,7 @@ static int stm32_epcancel(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
   struct stm32_ep_s *privep = (struct stm32_ep_s *)ep;
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -3163,7 +3165,7 @@ static int stm32_epstall(struct usbdev_ep_s *ep, bool resume)
   uint16_t status;
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -3305,7 +3307,7 @@ static struct usbdev_ep_s *stm32_allocep(struct usbdev_s *dev, uint8_t epno,
   int bufno;
 
   usbtrace(TRACE_DEVALLOCEP, (uint16_t)epno);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -3379,7 +3381,7 @@ static void stm32_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep)
   struct stm32_usbdev_s *priv;
   struct stm32_ep_s *privep;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!dev || !ep)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -3410,7 +3412,7 @@ static int stm32_getframe(struct usbdev_s *dev)
 {
   uint16_t fnr;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -3435,7 +3437,7 @@ static int stm32_wakeup(struct usbdev_s *dev)
   irqstate_t flags;
 
   usbtrace(TRACE_DEVWAKEUP, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -3473,7 +3475,7 @@ static int stm32_selfpowered(struct usbdev_s *dev, bool selfpowered)
 
   usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -3750,14 +3752,14 @@ void up_usbinitialize(void)
    * them when we need them later.
    */
 
-  if (irq_attach(STM32_IRQ_USBHP, stm32_hpinterrupt) != 0)
+  if (irq_attach(STM32_IRQ_USBHP, stm32_hpinterrupt, NULL) != 0)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_IRQREGISTRATION),
                (uint16_t)STM32_IRQ_USBHP);
       goto errout;
     }
 
-  if (irq_attach(STM32_IRQ_USBLP, stm32_lpinterrupt) != 0)
+  if (irq_attach(STM32_IRQ_USBLP, stm32_lpinterrupt, NULL) != 0)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_IRQREGISTRATION),
                (uint16_t)STM32_IRQ_USBLP);
@@ -3834,7 +3836,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
 
   usbtrace(TRACE_DEVREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (!driver || !driver->ops->bind || !driver->ops->unbind ||
       !driver->ops->disconnect || !driver->ops->setup)
     {
@@ -3912,7 +3914,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
 
   usbtrace(TRACE_DEVUNREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
   if (driver != priv->driver)
     {
       usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/stm32/stm32_usbhost.h b/arch/arm/src/stm32/stm32_usbhost.h
index 2a6a7335446fe83bcd1ecd59f0952667f3cc6fed..04a64190be921c54094f72ed3f31876025b4f728 100644
--- a/arch/arm/src/stm32/stm32_usbhost.h
+++ b/arch/arm/src/stm32/stm32_usbhost.h
@@ -46,7 +46,7 @@
 #include 
 
 #include "chip.h"
-#include "chip/stm32_otgfs.h"
+#include "chip/stm32fxxxxx_otgfs.h"
 #include "chip/stm32_otghs.h"
 
 #if (defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32_OTGHS)) && defined(CONFIG_USBHOST)
@@ -236,7 +236,7 @@ enum usbhost_trace1codes_e
  *    want to do that?
  *
  *  CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
- *    debug.  Depends on CONFIG_DEBUG.
+ *    debug.  Depends on CONFIG_DEBUG_FEATURES.
  */
 
 /************************************************************************************
diff --git a/arch/arm/src/stm32/stm32_wwdg.c b/arch/arm/src/stm32/stm32_wwdg.c
index 5cab6ce92b6db5030869ce6ef0cb5e6010fcb4ec..a299de8c991461b0c44d75f7e92d389a8d7f37f5 100644
--- a/arch/arm/src/stm32/stm32_wwdg.c
+++ b/arch/arm/src/stm32/stm32_wwdg.c
@@ -81,18 +81,8 @@
 #  define CONFIG_STM32_WWDG_DEFTIMOUT WWDG_MAXTIMEOUT
 #endif
 
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing the watchdog
- * driver.  NOTE: that only lldbg types are used so that the output is
- * immediately available.
- */
-
-#ifdef CONFIG_DEBUG_WATCHDOG
-#  define wddbg    lldbg
-#  define wdvdbg   llvdbg
-#else
-#  define wddbg(x...)
-#  define wdvdbg(x...)
+#ifndef CONFIG_DEBUG_WATCHDOG_INFO
+#  undef CONFIG_STM32_WWDG_REGDEBUG
 #endif
 
 /****************************************************************************
@@ -119,7 +109,7 @@ struct stm32_lowerhalf_s
  ****************************************************************************/
 /* Register operations ******************************************************/
 
-#if defined(CONFIG_STM32_WWDG_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32_WWDG_REGDEBUG
 static uint16_t stm32_getreg(uint32_t addr);
 static void     stm32_putreg(uint16_t val, uint32_t addr);
 #else
@@ -131,7 +121,7 @@ static void     stm32_setwindow(FAR struct stm32_lowerhalf_s *priv,
 
 /* Interrupt hanlding *******************************************************/
 
-static int      stm32_interrupt(int irq, FAR void *context);
+static int      stm32_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /* "Lower half" driver methods **********************************************/
 
@@ -179,7 +169,7 @@ static struct stm32_lowerhalf_s g_wdgdev;
  *
  ****************************************************************************/
 
-#if defined(CONFIG_STM32_WWDG_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32_WWDG_REGDEBUG
 static uint16_t stm32_getreg(uint32_t addr)
 {
   static uint32_t prevaddr = 0;
@@ -200,7 +190,7 @@ static uint16_t stm32_getreg(uint32_t addr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              wdinfo("...\n");
             }
 
           return val;
@@ -217,7 +207,7 @@ static uint16_t stm32_getreg(uint32_t addr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          wdinfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -229,7 +219,7 @@ static uint16_t stm32_getreg(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%04x\n", addr, val);
+  wdinfo("%08x->%04x\n", addr, val);
   return val;
 }
 #endif
@@ -242,12 +232,12 @@ static uint16_t stm32_getreg(uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_STM32_WWDG_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32_WWDG_REGDEBUG
 static void stm32_putreg(uint16_t val, uint32_t addr)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%04x\n", addr, val);
+  wdinfo("%08x<-%04x\n", addr, val);
 
   /* Write the value */
 
@@ -296,7 +286,7 @@ static void stm32_setwindow(FAR struct stm32_lowerhalf_s *priv, uint8_t window)
  *
  ****************************************************************************/
 
-static int stm32_interrupt(int irq, FAR void *context)
+static int stm32_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   FAR struct stm32_lowerhalf_s *priv = &g_wdgdev;
   uint16_t regval;
@@ -315,7 +305,7 @@ static int stm32_interrupt(int irq, FAR void *context)
            * upon return.
            */
 
-          priv->handler(irq, context);
+          priv->handler(irq, context, arg);
         }
 
       /* The EWI interrupt is cleared by writing '0' to the EWIF bit in the
@@ -348,7 +338,7 @@ static int stm32_start(FAR struct watchdog_lowerhalf_s *lower)
 {
   FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
 
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
   DEBUGASSERT(priv);
 
   /* The watchdog is always disabled after a reset. It is enabled by setting
@@ -383,7 +373,7 @@ static int stm32_stop(FAR struct watchdog_lowerhalf_s *lower)
    * except by a reset.
    */
 
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
   return -ENOSYS;
 }
 
@@ -414,7 +404,7 @@ static int stm32_keepalive(FAR struct watchdog_lowerhalf_s *lower)
 {
   FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
 
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
   DEBUGASSERT(priv);
 
   /* Write to T[6:0] bits to configure the counter value, no need to do
@@ -448,7 +438,7 @@ static int stm32_getstatus(FAR struct watchdog_lowerhalf_s *lower,
   uint32_t elapsed;
   uint16_t reload;
 
-  wdvdbg("Entry\n");
+  wdinfo("Entry\n");
   DEBUGASSERT(priv);
 
   /* Return the status bit */
@@ -474,10 +464,10 @@ static int stm32_getstatus(FAR struct watchdog_lowerhalf_s *lower,
   elapsed = priv->reload - reload;
   status->timeleft = (priv->timeout * elapsed) / (priv->reload + 1);
 
-  wdvdbg("Status     :\n");
-  wdvdbg("  flags    : %08x\n", status->flags);
-  wdvdbg("  timeout  : %d\n", status->timeout);
-  wdvdbg("  timeleft : %d\n", status->flags);
+  wdinfo("Status     :\n");
+  wdinfo("  flags    : %08x\n", status->flags);
+  wdinfo("  timeout  : %d\n", status->timeout);
+  wdinfo("  timeleft : %d\n", status->flags);
   return OK;
 }
 
@@ -507,13 +497,13 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower,
   int wdgtb;
 
   DEBUGASSERT(priv);
-  wdvdbg("Entry: timeout=%d\n", timeout);
+  wdinfo("Entry: timeout=%d\n", timeout);
 
   /* Can this timeout be represented? */
 
   if (timeout < 1 || timeout > WWDG_MAXTIMEOUT)
     {
-      wddbg("Cannot represent timeout=%d > %d\n",
+      wderr("ERROR: Cannot represent timeout=%d > %d\n",
             timeout, WWDG_MAXTIMEOUT);
       return -ERANGE;
     }
@@ -562,7 +552,7 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower,
        */
 
 #if 0
-      wdvdbg("wdgtb=%d fwwdg=%d reload=%d timout=%d\n",
+      wdinfo("wdgtb=%d fwwdg=%d reload=%d timout=%d\n",
              wdgtb, fwwdg, reload,  1000 * (reload + 1) / fwwdg);
 #endif
       if (reload <= WWDG_CR_T_MAX || wdgtb == 3)
@@ -595,7 +585,7 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower,
   priv->fwwdg  = fwwdg;
   priv->reload = reload;
 
-  wdvdbg("wdgtb=%d fwwdg=%d reload=%d timout=%d\n",
+  wdinfo("wdgtb=%d fwwdg=%d reload=%d timout=%d\n",
          wdgtb, fwwdg, reload, priv->timeout);
 
   /* Set WDGTB[1:0] bits according to calculated value */
@@ -644,7 +634,7 @@ static xcpt_t stm32_capture(FAR struct watchdog_lowerhalf_s *lower,
   uint16_t regval;
 
   DEBUGASSERT(priv);
-  wdvdbg("Entry: handler=%p\n", handler);
+  wdinfo("Entry: handler=%p\n", handler);
 
   /* Get the old handler return value */
 
@@ -708,7 +698,7 @@ static int stm32_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd,
   int ret = -ENOTTY;
 
   DEBUGASSERT(priv);
-  wdvdbg("Entry: cmd=%d arg=%ld\n", cmd, arg);
+  wdinfo("Entry: cmd=%d arg=%ld\n", cmd, arg);
 
   /* WDIOC_MINTIME: Set the minimum ping time.  If two keepalive ioctls
    * are received within this time, a reset event will be generated.
@@ -761,7 +751,7 @@ void stm32_wwdginitialize(FAR const char *devpath)
 {
   FAR struct stm32_lowerhalf_s *priv = &g_wdgdev;
 
-  wdvdbg("Entry: devpath=%s\n", devpath);
+  wdinfo("Entry: devpath=%s\n", devpath);
 
   /* NOTE we assume that clocking to the IWDG has already been provided by
    * the RCC initialization logic.
@@ -776,7 +766,7 @@ void stm32_wwdginitialize(FAR const char *devpath)
 
   /* Attach our EWI interrupt handler (But don't enable it yet) */
 
-  (void)irq_attach(STM32_IRQ_WWDG, stm32_interrupt);
+  (void)irq_attach(STM32_IRQ_WWDG, stm32_interrupt, NULL);
 
   /* Select an arbitrary initial timeout value.  But don't start the watchdog
    * yet. NOTE: If the "Hardware watchdog" feature is enabled through the
@@ -790,7 +780,7 @@ void stm32_wwdginitialize(FAR const char *devpath)
 
   (void)watchdog_register(devpath, (FAR struct watchdog_lowerhalf_s *)priv);
 
-  /* When the microcontroller enters debug mode (Cortex-M4F core halted),
+  /* When the microcontroller enters debug mode (Cortex�-M4F core halted),
    * the WWDG counter either continues to work normally or stops, depending
    * on DBG_WWDG_STOP configuration bit in DBG module.
    */
diff --git a/arch/arm/src/stm32/stm32f10xxx_dma.c b/arch/arm/src/stm32/stm32f10xxx_dma.c
index 8c5bf161e6ae4fcd734e9d19dc38e93e7f05b17a..1e6751ee56358ed0a069e308d120a7cc66ea61b8 100644
--- a/arch/arm/src/stm32/stm32f10xxx_dma.c
+++ b/arch/arm/src/stm32/stm32f10xxx_dma.c
@@ -57,7 +57,7 @@
 
 
 #if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32L15XX)
+    defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32L15XX)
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -157,7 +157,7 @@ static struct stm32_dma_s g_dma[DMA_NCHANNELS] =
   {
     .chan     = 3,
 #if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32L15XX)
+    defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32L15XX)
     .irq      = STM32_IRQ_DMA2CH4,
 #else
     .irq      = STM32_IRQ_DMA2CH45,
@@ -167,7 +167,7 @@ static struct stm32_dma_s g_dma[DMA_NCHANNELS] =
   {
     .chan     = 4,
 #if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32L15XX)
+    defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32L15XX)
     .irq      = STM32_IRQ_DMA2CH5,
 #else
     .irq      = STM32_IRQ_DMA2CH45,
@@ -275,7 +275,7 @@ static void stm32_dmachandisable(struct stm32_dma_s *dmach)
  *
  ************************************************************************************/
 
-static int stm32_dmainterrupt(int irq, void *context)
+static int stm32_dmainterrupt(int irq, void *context, FAR void *arg)
 {
   struct stm32_dma_s *dmach;
   uint32_t isr;
@@ -290,7 +290,7 @@ static int stm32_dmainterrupt(int irq, void *context)
   else
 #if STM32_NDMA > 1
 #if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined(CONFIG_STM32_STM32L15XX)
+    defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32L15XX)
   if (irq >= STM32_IRQ_DMA2CH1 && irq <= STM32_IRQ_DMA2CH5)
 #else
   if (irq >= STM32_IRQ_DMA2CH1 && irq <= STM32_IRQ_DMA2CH45)
@@ -351,7 +351,7 @@ void weak_function up_dmainitialize(void)
 
       /* Attach DMA interrupt vectors */
 
-      (void)irq_attach(dmach->irq, stm32_dmainterrupt);
+      (void)irq_attach(dmach->irq, stm32_dmainterrupt, NULL);
 
       /* Disable the DMA channel */
 
@@ -707,7 +707,7 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs)
 {
   struct stm32_dma_s *dmach = (struct stm32_dma_s *)handle;
@@ -734,19 +734,19 @@ void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void stm32_dmadump(DMA_HANDLE handle, const struct stm32_dmaregs_s *regs,
                    const char *msg)
 {
   struct stm32_dma_s *dmach = (struct stm32_dma_s *)handle;
   uint32_t dmabase = DMA_BASE(dmach->base);
 
-  dmadbg("DMA Registers: %s\n", msg);
-  dmadbg("   ISRC[%08x]: %08x\n", dmabase + STM32_DMA_ISR_OFFSET, regs->isr);
-  dmadbg("    CCR[%08x]: %08x\n", dmach->base + STM32_DMACHAN_CCR_OFFSET, regs->ccr);
-  dmadbg("  CNDTR[%08x]: %08x\n", dmach->base + STM32_DMACHAN_CNDTR_OFFSET, regs->cndtr);
-  dmadbg("   CPAR[%08x]: %08x\n", dmach->base + STM32_DMACHAN_CPAR_OFFSET, regs->cpar);
-  dmadbg("   CMAR[%08x]: %08x\n", dmach->base + STM32_DMACHAN_CMAR_OFFSET, regs->cmar);
+  dmainfo("DMA Registers: %s\n", msg);
+  dmainfo("   ISRC[%08x]: %08x\n", dmabase + STM32_DMA_ISR_OFFSET, regs->isr);
+  dmainfo("    CCR[%08x]: %08x\n", dmach->base + STM32_DMACHAN_CCR_OFFSET, regs->ccr);
+  dmainfo("  CNDTR[%08x]: %08x\n", dmach->base + STM32_DMACHAN_CNDTR_OFFSET, regs->cndtr);
+  dmainfo("   CPAR[%08x]: %08x\n", dmach->base + STM32_DMACHAN_CPAR_OFFSET, regs->cpar);
+  dmainfo("   CMAR[%08x]: %08x\n", dmach->base + STM32_DMACHAN_CMAR_OFFSET, regs->cmar);
 }
 #endif
 
diff --git a/arch/arm/src/stm32/stm32f10xxx_rcc.c b/arch/arm/src/stm32/stm32f10xxx_rcc.c
index 736b3ee7ef80a29b221461b6c87e2bf19b60fd34..218e534e22275740666cd383b7459ae05f3a3145 100644
--- a/arch/arm/src/stm32/stm32f10xxx_rcc.c
+++ b/arch/arm/src/stm32/stm32f10xxx_rcc.c
@@ -756,12 +756,6 @@ static void stm32_stdclockconfig(void)
 
   stm32_rcc_enablelsi();
 #endif
-
-#if defined(CONFIG_RTC_LSECLOCK)
-  /* Low speed external clock source LSE */
-
-  stm32_rcc_enablelse();
-#endif
 }
 #endif
 
@@ -774,6 +768,14 @@ static inline void rcc_enableperipherals(void)
   rcc_enableahb();
   rcc_enableapb2();
   rcc_enableapb1();
+
+#if defined(CONFIG_RTC_LSECLOCK)
+  /* Low speed external clock source LSE
+   * For F1 it requires PWR and BKP from APB1
+   */
+
+  stm32_rcc_enablelse();
+#endif
 }
 
 /****************************************************************************
diff --git a/arch/arm/src/stm32/stm32f20xxx_dma.c b/arch/arm/src/stm32/stm32f20xxx_dma.c
index 39c40f59f65115ae6cb37b36d1bbfc04359eb0a0..6fb9d33cee1bd84c7c253ff4851306e5ad34a194 100644
--- a/arch/arm/src/stm32/stm32f20xxx_dma.c
+++ b/arch/arm/src/stm32/stm32f20xxx_dma.c
@@ -370,7 +370,7 @@ static void stm32_dmastreamdisable(struct stm32_dma_s *dmast)
  *
  ************************************************************************************/
 
-static int stm32_dmainterrupt(int irq, void *context)
+static int stm32_dmainterrupt(int irq, void *context, FAR void *arg)
 {
   struct stm32_dma_s *dmast;
   uint32_t status;
@@ -482,7 +482,7 @@ void weak_function up_dmainitialize(void)
 
       /* Attach DMA interrupt vectors */
 
-      (void)irq_attach(dmast->irq, stm32_dmainterrupt);
+      (void)irq_attach(dmast->irq, stm32_dmainterrupt, dmast);
 
       /* Disable the DMA stream */
 
@@ -606,8 +606,8 @@ void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
   uint32_t regoffset;
   uint32_t regval;
 
-  dmadbg("paddr: %08x maddr: %08x ntransfers: %d scr: %08x\n",
-         paddr, maddr, ntransfers, scr);
+  dmainfo("paddr: %08x maddr: %08x ntransfers: %d scr: %08x\n",
+          paddr, maddr, ntransfers, scr);
 
   /* "If the stream is enabled, disable it by resetting the EN bit in the
    * DMA_SxCR register, then read this bit in order to confirm that there is no
@@ -973,7 +973,7 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs)
 {
   struct stm32_dma_s *dmast = (struct stm32_dma_s *)handle;
@@ -1003,22 +1003,22 @@ void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void stm32_dmadump(DMA_HANDLE handle, const struct stm32_dmaregs_s *regs,
                    const char *msg)
 {
   struct stm32_dma_s *dmast = (struct stm32_dma_s *)handle;
   uint32_t dmabase = DMA_BASE(dmast->base);
 
-  dmadbg("DMA Registers: %s\n", msg);
-  dmadbg("   LISR[%08x]: %08x\n", dmabase + STM32_DMA_LISR_OFFSET, regs->lisr);
-  dmadbg("   HISR[%08x]: %08x\n", dmabase + STM32_DMA_HISR_OFFSET, regs->hisr);
-  dmadbg("    SCR[%08x]: %08x\n", dmast->base + STM32_DMA_SCR_OFFSET, regs->scr);
-  dmadbg("  SNDTR[%08x]: %08x\n", dmast->base + STM32_DMA_SNDTR_OFFSET, regs->sndtr);
-  dmadbg("   SPAR[%08x]: %08x\n", dmast->base + STM32_DMA_SPAR_OFFSET, regs->spar);
-  dmadbg("  SM0AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM0AR_OFFSET, regs->sm0ar);
-  dmadbg("  SM1AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM1AR_OFFSET, regs->sm1ar);
-  dmadbg("   SFCR[%08x]: %08x\n", dmast->base + STM32_DMA_SFCR_OFFSET, regs->sfcr);
+  dmainfo("DMA Registers: %s\n", msg);
+  dmainfo("   LISR[%08x]: %08x\n", dmabase + STM32_DMA_LISR_OFFSET, regs->lisr);
+  dmainfo("   HISR[%08x]: %08x\n", dmabase + STM32_DMA_HISR_OFFSET, regs->hisr);
+  dmainfo("    SCR[%08x]: %08x\n", dmast->base + STM32_DMA_SCR_OFFSET, regs->scr);
+  dmainfo("  SNDTR[%08x]: %08x\n", dmast->base + STM32_DMA_SNDTR_OFFSET, regs->sndtr);
+  dmainfo("   SPAR[%08x]: %08x\n", dmast->base + STM32_DMA_SPAR_OFFSET, regs->spar);
+  dmainfo("  SM0AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM0AR_OFFSET, regs->sm0ar);
+  dmainfo("  SM1AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM1AR_OFFSET, regs->sm1ar);
+  dmainfo("   SFCR[%08x]: %08x\n", dmast->base + STM32_DMA_SFCR_OFFSET, regs->sfcr);
 }
 #endif
 
diff --git a/arch/arm/src/stm32/stm32f30xxx_i2c.c b/arch/arm/src/stm32/stm32f30xxx_i2c.c
index 15b0cb63bb4f65700ac46def29585f5e6d011aaf..4a1ae02a512432a6093cbfffe37d676d42be6f8f 100644
--- a/arch/arm/src/stm32/stm32f30xxx_i2c.c
+++ b/arch/arm/src/stm32/stm32f30xxx_i2c.c
@@ -85,8 +85,9 @@
 
 #include 
 #include 
-#include 
 #include 
+#include 
+#include 
 
 #include 
 
@@ -101,7 +102,7 @@
 #if defined(CONFIG_STM32_I2C1) || defined(CONFIG_STM32_I2C2) || defined(CONFIG_STM32_I2C3)
 /* This implementation is for the STM32 F1, F2, and F4 only */
 
-#if defined(CONFIG_STM32_STM32F30XX)
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -154,15 +155,6 @@
 #define STATUS_BUSY(status)    (status & I2C_ISR_BUSY)
 
 /* Debug ****************************************************************************/
-/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
-
-#ifdef CONFIG_DEBUG_I2C
-#  define i2cdbg dbg
-#  define i2cvdbg vdbg
-#else
-#  define i2cdbg(x...)
-#  define i2cvdbg(x...)
-#endif
 
 /* I2C event trace logic.  NOTE:  trace uses the internal, non-standard, low-level
  * debug interface syslog() but does not require that any other debug
@@ -230,7 +222,7 @@ struct stm32_i2c_config_s
   uint32_t scl_pin;           /* GPIO configuration for SCL as SCL */
   uint32_t sda_pin;           /* GPIO configuration for SDA as SDA */
 #ifndef CONFIG_I2C_POLLED
-  int (*isr)(int, void *);    /* Interrupt handler */
+  int (*isr)(int, void *, void *);    /* Interrupt handler */
   uint32_t ev_irq;            /* Event IRQ */
   uint32_t er_irq;            /* Error IRQ */
 #endif
@@ -312,13 +304,13 @@ static inline uint32_t stm32_i2c_getstatus(FAR struct stm32_i2c_priv_s *priv);
 static int stm32_i2c_isr(struct stm32_i2c_priv_s * priv);
 #ifndef CONFIG_I2C_POLLED
 #ifdef CONFIG_STM32_I2C1
-static int stm32_i2c1_isr(int irq, void *context);
+static int stm32_i2c1_isr(int irq, void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_STM32_I2C2
-static int stm32_i2c2_isr(int irq, void *context);
+static int stm32_i2c2_isr(int irq, void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_STM32_I2C3
-static int stm32_i2c3_isr(int irq, void *context);
+static int stm32_i2c3_isr(int irq, void *context, FAR void *arg);
 #endif
 #endif
 static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv);
@@ -727,7 +719,7 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
 
   while (priv->intstate != INTSTATE_DONE && elapsed < timeout);
 
-  i2cvdbg("intstate: %d elapsed: %ld threshold: %ld status: %08x\n",
+  i2cinfo("intstate: %d elapsed: %ld threshold: %ld status: %08x\n",
           priv->intstate, (long)elapsed, (long)timeout, priv->status);
 
   /* Set the interrupt state back to IDLE */
@@ -881,7 +873,7 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv)
    * still pending.
    */
 
-  i2cvdbg("Timeout with CR: %04x SR: %04x\n", cr, sr);
+  i2cinfo("Timeout with CR: %04x SR: %04x\n", cr, sr);
 }
 
 /************************************************************************************
@@ -908,8 +900,14 @@ static inline void stm32_i2c_sem_post(FAR struct stm32_i2c_priv_s *priv)
 static inline void stm32_i2c_sem_init(FAR struct stm32_i2c_priv_s *priv)
 {
   sem_init(&priv->sem_excl, 0, 1);
+
 #ifndef CONFIG_I2C_POLLED
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   sem_init(&priv->sem_isr, 0, 0);
+  sem_setprotocol(&priv->sem_isr, SEM_PRIO_NONE);
 #endif
 }
 
@@ -975,7 +973,7 @@ static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv,
 
           if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
             {
-              i2cdbg("Trace table overflow\n");
+              i2cerr("ERROR: Trace table overflow\n");
               return;
             }
 
@@ -1016,7 +1014,7 @@ static void stm32_i2c_traceevent(FAR struct stm32_i2c_priv_s *priv,
 
       if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
         {
-          i2cdbg("Trace table overflow\n");
+          i2cerr("ERROR: Trace table overflow\n");
           return;
         }
 
@@ -1495,7 +1493,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
 
 #ifndef CONFIG_I2C_POLLED
 #ifdef CONFIG_STM32_I2C1
-static int stm32_i2c1_isr(int irq, void *context)
+static int stm32_i2c1_isr(int irq, void *context, FAR void *arg)
 {
   return stm32_i2c_isr(&stm32_i2c1_priv);
 }
@@ -1510,7 +1508,7 @@ static int stm32_i2c1_isr(int irq, void *context)
  ************************************************************************************/
 
 #ifdef CONFIG_STM32_I2C2
-static int stm32_i2c2_isr(int irq, void *context)
+static int stm32_i2c2_isr(int irq, void *context, FAR void *arg)
 {
   return stm32_i2c_isr(&stm32_i2c2_priv);
 }
@@ -1525,7 +1523,7 @@ static int stm32_i2c2_isr(int irq, void *context)
  ************************************************************************************/
 
 #ifdef CONFIG_STM32_I2C3
-static int stm32_i2c3_isr(int irq, void *context)
+static int stm32_i2c3_isr(int irq, void *context, FAR void *arg)
 {
   return stm32_i2c_isr(&stm32_i2c3_priv);
 }
@@ -1570,8 +1568,8 @@ static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv)
   /* Attach ISRs */
 
 #ifndef CONFIG_I2C_POLLED
-  irq_attach(priv->config->ev_irq, priv->config->isr);
-  irq_attach(priv->config->er_irq, priv->config->isr);
+  irq_attach(priv->config->ev_irq, priv->config->isr, NULL);
+  irq_attach(priv->config->er_irq, priv->config->isr, NULL);
   up_enable_irq(priv->config->ev_irq);
   up_enable_irq(priv->config->er_irq);
 #endif
@@ -1709,7 +1707,7 @@ static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s
       status = stm32_i2c_getstatus(priv);
       ret = -ETIMEDOUT;
 
-      i2cdbg("Timed out: CR1: %04x status: %08x\n",
+      i2cerr("ERROR: Timed out: CR1: %04x status: %08x\n",
              stm32_i2c_getreg(priv, STM32_I2C_CR1_OFFSET), status);
 
       /* "Note: When the STOP, START or PEC bit is set, the software must
@@ -1958,7 +1956,7 @@ out:
 FAR struct i2c_master_s *stm32_i2cbus_initialize(int port)
 {
   struct stm32_i2c_priv_s * priv = NULL;  /* private data of device with multiple instances */
-  irqtate_t flags;
+  irqstate_t flags;
 
 #if STM32_PCLK1_FREQUENCY < 4000000
 #   warning STM32_I2C_INIT: Peripheral clock must be at least 4 MHz to support 400 kHz operation.
diff --git a/arch/arm/src/stm32/stm32f33xxx_rcc.c b/arch/arm/src/stm32/stm32f33xxx_rcc.c
new file mode 100644
index 0000000000000000000000000000000000000000..82923a7ef869c6ac5e8a0aad660ba7078ca56e77
--- /dev/null
+++ b/arch/arm/src/stm32/stm32f33xxx_rcc.c
@@ -0,0 +1,628 @@
+/****************************************************************************
+ * arch/arm/src/stm32/stm32f33xxx_rcc.c
+ *
+ *   Copyright (C) 2012, 2015, 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *   Modified for STM32F334 by Mateusz Szafoni 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Allow up to 100 milliseconds for the high speed clock to become ready.
+ * that is a very long delay, but if the clock does not become ready we are
+ * hosed anyway.  Normally this is very fast, but I have seen at least one
+ * board that required this long, long timeout for the HSE to be ready.
+ */
+
+#define HSERDY_TIMEOUT (100 * CONFIG_BOARD_LOOPSPERMSEC)
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: rcc_reset
+ *
+ * Description:
+ *   Put all RCC registers in reset state
+ *
+ ****************************************************************************/
+
+static inline void rcc_reset(void)
+{
+  uint32_t regval;
+
+  putreg32(0, STM32_RCC_APB2RSTR);          /* Disable APB2 Peripheral Reset */
+  putreg32(0, STM32_RCC_APB1RSTR);          /* Disable APB1 Peripheral Reset */
+  putreg32(RCC_AHBENR_FLITFEN | RCC_AHBENR_SRAMEN, STM32_RCC_AHBENR); /* FLITF and SRAM Clock ON */
+  putreg32(0, STM32_RCC_APB2ENR);           /* Disable APB2 Peripheral Clock */
+  putreg32(0, STM32_RCC_APB1ENR);           /* Disable APB1 Peripheral Clock */
+
+  regval  = getreg32(STM32_RCC_CR);         /* Set the HSION bit */
+  regval |= RCC_CR_HSION;
+  putreg32(regval, STM32_RCC_CR);
+
+  regval  = getreg32(STM32_RCC_CFGR);       /* Reset SW, HPRE, PPRE1, PPRE2, and MCO bits */
+  regval &= ~(RCC_CFGR_SW_MASK | RCC_CFGR_HPRE_MASK | RCC_CFGR_PPRE1_MASK |
+              RCC_CFGR_PPRE2_MASK | RCC_CFGR_MCO_MASK);
+
+  putreg32(regval, STM32_RCC_CFGR);
+
+  regval  = getreg32(STM32_RCC_CFGR2);       /* Reset PREDIV, and ADC12PRE bits */
+  regval &= ~(RCC_CFGR2_PREDIV_MASK | RCC_CFGR2_ADC12PRES_MASK);
+  putreg32(regval, STM32_RCC_CFGR2);
+
+  regval  = getreg32(STM32_RCC_CFGR3);       /* Reset all U[S]ARTs, I2C1, TIM1 and HRTIM1 bits */
+  regval &= ~(RCC_CFGR3_USART1SW_MASK | RCC_CFGR3_USART2SW_MASK | RCC_CFGR3_USART3SW_MASK | \
+              RCC_CFGR3_I2C1SW | RCC_CFGR3_TIM1SW | RCC_CFGR3_HRTIM1SW);
+  putreg32(regval, STM32_RCC_CFGR3);
+
+  regval  = getreg32(STM32_RCC_CR);         /* Reset HSEON, CSSON and PLLON bits */
+  regval &= ~(RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_PLLON);
+  putreg32(regval, STM32_RCC_CR);
+
+  regval  = getreg32(STM32_RCC_CR);         /* Reset HSEBYP bit */
+  regval &= ~RCC_CR_HSEBYP;
+  putreg32(regval, STM32_RCC_CR);
+
+  regval  = getreg32(STM32_RCC_CFGR);       /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE bits */
+  regval &= ~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMUL_MASK);
+  putreg32(regval, STM32_RCC_CFGR);
+
+  putreg32(0, STM32_RCC_CIR);               /* Disable all interrupts */
+}
+
+/****************************************************************************
+ * Name: rcc_enableahb
+ *
+ * Description:
+ *   Enable selected AHB peripherals
+ *
+ ****************************************************************************/
+
+static inline void rcc_enableahb(void)
+{
+  uint32_t regval;
+
+  /* Always enable FLITF clock and SRAM clock */
+
+  regval = RCC_AHBENR_FLITFEN | RCC_AHBENR_SRAMEN;
+
+  /* Enable GPIO PORTA, PORTB, ... PORTF */
+
+  regval |= (RCC_AHBENR_IOPAEN | RCC_AHBENR_IOPBEN | RCC_AHBENR_IOPCEN |
+             RCC_AHBENR_IOPDEN | RCC_AHBENR_IOPFEN);
+
+#ifdef CONFIG_STM32_DMA1
+  /* DMA 1 clock enable */
+
+  regval |= RCC_AHBENR_DMA1EN;
+#endif
+
+#ifdef CONFIG_STM32_CRC
+  /* CRC clock enable */
+
+  regval |= RCC_AHBENR_CRCEN;
+#endif
+
+#ifdef CONFIG_STM32_TSC
+  /* CRC clock enable */
+
+  regval |= RCC_AHBENR_TSCEN;
+#endif
+
+#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2)
+  /* ADC1/ADC2 interface clock enable */
+
+  regval |= RCC_AHBENR_ADC12EN;
+#endif
+
+  putreg32(regval, STM32_RCC_AHBENR);   /* Enable peripherals */
+}
+
+/****************************************************************************
+ * Name: rcc_enableapb1
+ *
+ * Description:
+ *   Enable selected APB1 peripherals
+ *
+ ****************************************************************************/
+
+static inline void rcc_enableapb1(void)
+{
+  uint32_t regval;
+
+  /* Set the appropriate bits in the APB1ENR register to enabled the
+   * selected APB1 peripherals.
+   */
+
+  regval  = getreg32(STM32_RCC_APB1ENR);
+
+#ifdef CONFIG_STM32_TIM2
+  /* Timer 2 clock enable */
+
+#ifdef CONFIG_STM32_FORCEPOWER
+  regval |= RCC_APB1ENR_TIM2EN;
+#endif
+#endif
+
+#ifdef CONFIG_STM32_TIM3
+  /* Timer 3 clock enable */
+
+#ifdef CONFIG_STM32_FORCEPOWER
+  regval |= RCC_APB1ENR_TIM3EN;
+#endif
+#endif
+
+#ifdef CONFIG_STM32_TIM6
+  /* Timer 6 clock enable */
+
+#ifdef CONFIG_STM32_FORCEPOWER
+  regval |= RCC_APB1ENR_TIM6EN;
+#endif
+#endif
+
+#ifdef CONFIG_STM32_TIM7
+  /* Timer 7 clock enable */
+
+#ifdef CONFIG_STM32_FORCEPOWER
+  regval |= RCC_APB1ENR_TIM7EN;
+#endif
+#endif
+
+#ifdef CONFIG_STM32_WWDG
+  /* Window Watchdog clock enable */
+
+  regval |= RCC_APB1ENR_WWDGEN;
+#endif
+
+#ifdef CONFIG_STM32_USART2
+  /* USART 2 clock enable */
+
+  regval |= RCC_APB1ENR_USART2EN;
+#endif
+
+#ifdef CONFIG_STM32_USART3
+  /* USART 3 clock enable */
+
+  regval |= RCC_APB1ENR_USART3EN;
+#endif
+
+#ifdef CONFIG_STM32_I2C1
+  /* I2C 1 clock enable */
+
+#ifdef CONFIG_STM32_FORCEPOWER
+  regval |= RCC_APB1ENR_I2C1EN;
+#endif
+#endif
+
+#ifdef CONFIG_STM32_CAN1
+  /* CAN1 clock enable */
+
+  regval |= RCC_APB1ENR_CAN1EN;
+#endif
+
+#ifdef CONFIG_STM32_DAC2
+  /* DAC2 interface clock enable */
+
+  regval |= RCC_APB1ENR_DAC2EN;
+#endif
+
+#ifdef CONFIG_STM32_PWR
+  /*  Power interface clock enable */
+
+  regval |= RCC_APB1ENR_PWREN;
+#endif
+
+#ifdef CONFIG_STM32_DAC1
+  /* DAC1 interface clock enable */
+
+  regval |= RCC_APB1ENR_DAC1EN;
+#endif
+
+  putreg32(regval, STM32_RCC_APB1ENR);
+}
+
+/****************************************************************************
+ * Name: rcc_enableapb2
+ *
+ * Description:
+ *   Enable selected APB2 peripherals
+ *
+ ****************************************************************************/
+
+static inline void rcc_enableapb2(void)
+{
+  uint32_t regval;
+
+  /* Set the appropriate bits in the APB2ENR register to enabled the
+   * selected APB2 peripherals.
+   */
+
+  regval = getreg32(STM32_RCC_APB2ENR);
+
+#ifdef CONFIG_STM32_SYSCFG
+  /* SYSCFG clock */
+
+  regval |= RCC_APB2ENR_SYSCFGEN;
+#endif
+
+#ifdef CONFIG_STM32_TIM1
+  /* TIM1 Timer clock enable */
+
+#ifdef CONFIG_STM32_FORCEPOWER
+  regval |= RCC_APB2ENR_TIM1EN;
+#endif
+#endif
+
+#ifdef CONFIG_STM32_SPI1
+  /* SPI 1 clock enable */
+
+  regval |= RCC_APB2ENR_SPI1EN;
+#endif
+
+#ifdef CONFIG_STM32_USART1
+  /* USART1 clock enable */
+
+  regval |= RCC_APB2ENR_USART1EN;
+#endif
+
+#ifdef CONFIG_STM32_TIM15
+  /* TIM15 Timer clock enable */
+
+#ifdef CONFIG_STM32_FORCEPOWER
+  regval |= RCC_APB2ENR_TIM15EN;
+#endif
+#endif
+
+#ifdef CONFIG_STM32_TIM16
+  /* TIM16 Timer clock enable */
+
+#ifdef CONFIG_STM32_FORCEPOWER
+  regval |= RCC_APB2ENR_TIM16EN;
+#endif
+#endif
+
+#ifdef CONFIG_STM32_TIM17
+  /* TIM17 Timer clock enable */
+
+#ifdef CONFIG_STM32_FORCEPOWER
+  regval |= RCC_APB2ENR_TIM17EN;
+#endif
+#endif
+
+#ifdef CONFIG_STM32_HRTIM1
+  /* HRTIM1 Timer clock enable */
+
+#ifdef CONFIG_STM32_FORCEPOWER
+  regval |= RCC_APB2ENR_HRTIM1EN;
+#endif
+#endif
+
+  putreg32(regval, STM32_RCC_APB2ENR);
+}
+
+/****************************************************************************
+ * Name: stm32_stdclockconfig
+ *
+ * Description:
+ *   Called to change to new clock based on settings in board.h.  This
+ *   version is for the Connectivity Line parts.
+ *
+ *   NOTE:  This logic would need to be extended if you need to select low-
+ *   power clocking modes!
+ ****************************************************************************/
+
+#if !defined(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG) && defined(CONFIG_STM32_CONNECTIVITYLINE)
+static void stm32_stdclockconfig(void)
+{
+  uint32_t regval;
+
+  /* Enable HSE */
+
+  regval  = getreg32(STM32_RCC_CR);
+  regval &= ~RCC_CR_HSEBYP;         /* Disable HSE clock bypass */
+  regval |= RCC_CR_HSEON;           /* Enable HSE */
+  putreg32(regval, STM32_RCC_CR);
+
+  /* Set flash wait states
+   * Sysclk runs with 72MHz -> 2 waitstates.
+   * 0WS from 0-24MHz
+   * 1WS from 24-48MHz
+   * 2WS from 48-72MHz
+   */
+
+  regval  = getreg32(STM32_FLASH_ACR);
+  regval &= ~FLASH_ACR_LATENCY_MASK;
+  regval |= (FLASH_ACR_LATENCY_2 | FLASH_ACR_PRTFBE);
+  putreg32(regval, STM32_FLASH_ACR);
+
+  /* Set up PLL input scaling (with source = PLL2) */
+
+  regval = getreg32(STM32_RCC_CFGR2);
+  regval &= ~(RCC_CFGR2_PREDIV2_MASK | RCC_CFGR2_PLL2MUL_MASK |
+              RCC_CFGR2_PREDIV1SRC_MASK | RCC_CFGR2_PREDIV1_MASK);
+  regval |=  (STM32_PLL_PREDIV2 | STM32_PLL_PLL2MUL |
+              RCC_CFGR2_PREDIV1SRC_PLL2 | STM32_PLL_PREDIV1);
+  putreg32(regval, STM32_RCC_CFGR2);
+
+  /* Set the PCLK2 divider */
+
+  regval = getreg32(STM32_RCC_CFGR);
+  regval &= ~(RCC_CFGR_PPRE2_MASK | RCC_CFGR_HPRE_MASK);
+  regval |= STM32_RCC_CFGR_PPRE2;
+  regval |= RCC_CFGR_HPRE_SYSCLK;
+  putreg32(regval, STM32_RCC_CFGR);
+
+  /* Set the PCLK1 divider */
+
+  regval = getreg32(STM32_RCC_CFGR);
+  regval &= ~RCC_CFGR_PPRE1_MASK;
+  regval |= STM32_RCC_CFGR_PPRE1;
+  putreg32(regval, STM32_RCC_CFGR);
+
+  /* Enable PLL2 */
+
+  regval = getreg32(STM32_RCC_CR);
+  regval |= RCC_CR_PLL2ON;
+  putreg32(regval, STM32_RCC_CR);
+
+  /* Wait for PLL2 ready */
+
+  while ((getreg32(STM32_RCC_CR) & RCC_CR_PLL2RDY) == 0);
+
+  /* Setup PLL3 for MII/RMII clock on MCO */
+
+#if defined(CONFIG_STM32_MII_MCO) || defined(CONFIG_STM32_RMII_MCO)
+  regval = getreg32(STM32_RCC_CFGR2);
+  regval &= ~(RCC_CFGR2_PLL3MUL_MASK);
+  regval |= STM32_PLL_PLL3MUL;
+  putreg32(regval, STM32_RCC_CFGR2);
+
+  /* Switch PLL3 on */
+
+  regval = getreg32(STM32_RCC_CR);
+  regval |= RCC_CR_PLL3ON;
+  putreg32(regval, STM32_RCC_CR);
+
+  while ((getreg32(STM32_RCC_CR) & RCC_CR_PLL3RDY) == 0);
+#endif
+
+  /* Set main PLL source and multiplier */
+
+  regval = getreg32(STM32_RCC_CFGR);
+  regval &= ~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL_MASK);
+  regval |= (RCC_CFGR_PLLSRC | STM32_PLL_PLLMUL);
+  putreg32(regval, STM32_RCC_CFGR);
+
+  /* Switch main PLL on */
+
+  regval = getreg32(STM32_RCC_CR);
+  regval |= RCC_CR_PLLON;
+  putreg32(regval, STM32_RCC_CR);
+
+  while ((getreg32(STM32_RCC_CR) & RCC_CR_PLLRDY) == 0);
+
+  /* Select PLL as system clock source */
+
+  regval  = getreg32(STM32_RCC_CFGR);
+  regval &= ~RCC_CFGR_SW_MASK;
+  regval |= RCC_CFGR_SW_PLL;
+  putreg32(regval, STM32_RCC_CFGR);
+
+  /* Wait until PLL is used as the system clock source */
+
+  while ((getreg32(STM32_RCC_CFGR) & RCC_CFGR_SWS_PLL) == 0);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_stdclockconfig
+ *
+ * Description:
+ *   Called to change to new clock based on settings in board.h.  This
+ *   version is for the non-Connectivity Line parts.
+ *
+ *   NOTE:  This logic would need to be extended if you need to select low-
+ *   power clocking modes!
+ ****************************************************************************/
+
+#if !defined(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG) && \
+    !defined(CONFIG_STM32_CONNECTIVITYLINE)
+static void stm32_stdclockconfig(void)
+{
+  uint32_t regval;
+
+  /* If the PLL is using the HSE, or the HSE is the system clock */
+
+#if (STM32_CFGR_PLLSRC == RCC_CFGR_PLLSRC) || (STM32_SYSCLK_SW == RCC_CFGR_SW_HSE)
+  {
+    volatile int32_t timeout;
+
+    /* Enable External High-Speed Clock (HSE) */
+
+    regval  = getreg32(STM32_RCC_CR);
+    regval &= ~RCC_CR_HSEBYP;         /* Disable HSE clock bypass */
+    regval |= RCC_CR_HSEON;           /* Enable HSE */
+    putreg32(regval, STM32_RCC_CR);
+
+    /* Wait until the HSE is ready (or until a timeout elapsed) */
+
+    for (timeout = HSERDY_TIMEOUT; timeout > 0; timeout--)
+      {
+        /* Check if the HSERDY flag is the set in the CR */
+
+        if ((getreg32(STM32_RCC_CR) & RCC_CR_HSERDY) != 0)
+          {
+            /* If so, then break-out with timeout > 0 */
+
+            break;
+          }
+      }
+
+    if (timeout == 0)
+      {
+        /* In the case of a timeout starting the HSE, we really don't have a
+         * strategy.  This is almost always a hardware failure or
+         * misconfiguration.
+         */
+
+        return;
+      }
+  }
+
+# if defined(CONFIG_STM32_VALUELINE) && (STM32_CFGR_PLLSRC == RCC_CFGR_PLLSRC)
+  /* If this is a value-line part and we are using the HSE as the PLL */
+
+# if (STM32_CFGR_PLLXTPRE >> 17) != (STM32_CFGR2_PREDIV1 & 1)
+#  error STM32_CFGR_PLLXTPRE must match the LSB of STM32_CFGR2_PREDIV1
+# endif
+
+  /* Set the HSE prescaler */
+
+  regval = STM32_CFGR2_PREDIV1;
+  putreg32(regval, STM32_RCC_CFGR2);
+
+# endif
+#endif
+
+#ifndef CONFIG_STM32_VALUELINE
+  /* Value-line devices don't implement flash prefetch/waitstates */
+  /* Enable FLASH prefetch buffer and 2 wait states */
+
+  regval  = getreg32(STM32_FLASH_ACR);
+  regval &= ~FLASH_ACR_LATENCY_MASK;
+  regval |= (FLASH_ACR_LATENCY_2 | FLASH_ACR_PRTFBE);
+  putreg32(regval, STM32_FLASH_ACR);
+#endif
+
+  /* Set the HCLK source/divider */
+
+  regval = getreg32(STM32_RCC_CFGR);
+  regval &= ~RCC_CFGR_HPRE_MASK;
+  regval |= STM32_RCC_CFGR_HPRE;
+  putreg32(regval, STM32_RCC_CFGR);
+
+  /* Set the PCLK2 divider */
+
+  regval = getreg32(STM32_RCC_CFGR);
+  regval &= ~RCC_CFGR_PPRE2_MASK;
+  regval |= STM32_RCC_CFGR_PPRE2;
+  putreg32(regval, STM32_RCC_CFGR);
+
+  /* Set the PCLK1 divider */
+
+  regval = getreg32(STM32_RCC_CFGR);
+  regval &= ~RCC_CFGR_PPRE1_MASK;
+  regval |= STM32_RCC_CFGR_PPRE1;
+  putreg32(regval, STM32_RCC_CFGR);
+
+#if STM32_SYSCLK_SW == RCC_CFGR_SW_PLL
+  /* If we are using the PLL, configure and start it */
+  /* Set the PLL divider and multiplier */
+
+  regval = getreg32(STM32_RCC_CFGR);
+  regval &= ~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMUL_MASK);
+  regval |= (STM32_CFGR_PLLSRC | STM32_CFGR_PLLXTPRE | STM32_CFGR_PLLMUL);
+  putreg32(regval, STM32_RCC_CFGR);
+
+  /* Enable the PLL */
+
+  regval = getreg32(STM32_RCC_CR);
+  regval |= RCC_CR_PLLON;
+  putreg32(regval, STM32_RCC_CR);
+
+  /* Wait until the PLL is ready */
+
+  while ((getreg32(STM32_RCC_CR) & RCC_CR_PLLRDY) == 0);
+
+#endif
+
+  /* Select the system clock source (probably the PLL) */
+
+  regval  = getreg32(STM32_RCC_CFGR);
+  regval &= ~RCC_CFGR_SW_MASK;
+  regval |= STM32_SYSCLK_SW;
+  putreg32(regval, STM32_RCC_CFGR);
+
+  /* Wait until the selected source is used as the system clock source */
+
+  while ((getreg32(STM32_RCC_CFGR) & RCC_CFGR_SWS_MASK) != STM32_SYSCLK_SWS);
+
+#if defined(CONFIG_STM32_IWDG) || defined(CONFIG_RTC_LSICLOCK)
+  /* Low speed internal clock source LSI
+   *
+   * TODO: There is another case where the LSI needs to
+   * be enabled: if the MCO pin selects LSI as source.
+   */
+
+  stm32_rcc_enablelsi();
+#endif
+
+#if defined(CONFIG_RTC_LSECLOCK)
+  /* Low speed external clock source LSE
+   *
+   * TODO: There is another case where the LSE needs to
+   * be enabled: if the MCO pin selects LSE as source.
+   *
+   * TODO: There is another case where the LSE needs to
+   * be enabled: if USARTx selects LSE as source.
+   */
+
+  stm32_rcc_enablelse();
+#endif
+}
+#endif
+
+/****************************************************************************
+ * Name: rcc_enableperiphals
+ ****************************************************************************/
+
+static inline void rcc_enableperipherals(void)
+{
+  rcc_enableahb();
+  rcc_enableapb2();
+  rcc_enableapb1();
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
diff --git a/arch/arm/src/stm32/stm32f37xxx_rcc.c b/arch/arm/src/stm32/stm32f37xxx_rcc.c
index 02fa9fd930d3c5fe799f9c73347a44ed2b79e4ba..6b83ee316c98853b95ce7af40530b443e37fd746 100644
--- a/arch/arm/src/stm32/stm32f37xxx_rcc.c
+++ b/arch/arm/src/stm32/stm32f37xxx_rcc.c
@@ -80,7 +80,7 @@ static inline void rcc_reset(void)
   regval |= RCC_CR_HSION;
   putreg32(regval, STM32_RCC_CR);
 
-  regval  = getreg32(STM32_RCC_CFGR);       /* Reset SW, HPRE, PPRE1, PPRE2, USBPRE, and MCO bits */
+  regval  = getreg32(STM32_RCC_CFGR);       /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE, USBPRE, MCO, SDADC bits */
   regval &= ~(RCC_CFGR_SW_MASK | RCC_CFGR_HPRE_MASK | RCC_CFGR_PPRE1_MASK |
               RCC_CFGR_PPRE2_MASK | RCC_CFGR_USBPRE | RCC_CFGR_MCO_MASK);
   putreg32(regval, STM32_RCC_CFGR);
@@ -107,6 +107,7 @@ static inline void rcc_reset(void)
   putreg32(0, STM32_RCC_CIR);               /* Disable all interrupts */
 }
 
+
 /****************************************************************************
  * Name: rcc_enableahb
  *
@@ -169,7 +170,7 @@ static inline void rcc_enableapb1(void)
 
 #ifdef CONFIG_STM32_USB
   /* USB clock divider. This bit must be valid before enabling the USB
-   * clock in the RCC_APB1ENR register. This bit cant be reset if the USB
+   * clock in the RCC_APB1ENR register. This bit can't be reset if the USB
    * clock is enabled.
    */
 
@@ -356,6 +357,28 @@ static inline void rcc_enableapb2(void)
 {
   uint32_t regval;
 
+#if defined(CONFIG_STM32_SDADC) || defined(CONFIG_STM32_ADC)
+  /* Adjust clock of selected peripherals */
+
+  regval = getreg32(STM32_RCC_CFGR);
+
+#ifdef CONFIG_STM32_ADC
+  /* ADC clock divider */
+
+  regval &= ~RCC_CFGR_ADCPRE_MASK;
+  regval |= STM32_RCC_ADCPRE;
+#endif
+
+#ifdef CONFIG_STM32_SDADC
+  /* SDADC clock divider */
+
+  regval &= ~RCC_CFGR_SDPRE_MASK;
+  regval |= STM32_RCC_SDPRE;
+#endif
+
+  putreg32(regval, STM32_RCC_CFGR);
+#endif
+
   /* Set the appropriate bits in the APB2ENR register to enabled the
    * selected APB2 peripherals.
    */
@@ -368,6 +391,12 @@ static inline void rcc_enableapb2(void)
   regval |= RCC_APB2ENR_SYSCFGEN;
 #endif
 
+#ifdef CONFIG_STM32_ADC1
+  /* ADC clock enable */
+
+  regval |= RCC_APB2ENR_ADC1EN;
+#endif
+
 #ifdef CONFIG_STM32_SPI1
   /* SPI 1 clock enable */
 
@@ -412,6 +441,24 @@ static inline void rcc_enableapb2(void)
 #endif
 #endif
 
+#ifdef CONFIG_STM32_SDADC1
+  /* SDCADC1 clock enable */
+
+  regval |= RCC_APB2ENR_SDADC1EN;
+#endif
+
+#ifdef CONFIG_STM32_SDADC2
+  /* SDCADC2 clock enable */
+
+  regval |= RCC_APB2ENR_SDADC2EN;
+#endif
+
+#ifdef CONFIG_STM32_SDADC3
+  /* SDCADC3 clock enable */
+
+  regval |= RCC_APB2ENR_SDADC3EN;
+#endif
+
   putreg32(regval, STM32_RCC_APB2ENR);
 }
 
@@ -469,13 +516,13 @@ static void stm32_stdclockconfig(void)
 
   /* If this is a value-line part and we are using the HSE as the PLL */
 
-# if (STM32_CFGR_PLLXTPRE >> 17) != (STM32_CFGR2_PREDIV1 & 1)
-#  error STM32_CFGR_PLLXTPRE must match the LSB of STM32_CFGR2_PREDIV1
+# if (STM32_CFGR_PLLXTPRE >> 17) != (STM32_CFGR2_PREDIV & 1)
+#  error STM32_CFGR_PLLXTPRE must match the LSB of STM32_CFGR2_PREDIV
 # endif
 
   /* Set the HSE prescaler */
 
-  regval = STM32_CFGR2_PREDIV1;
+  regval = STM32_CFGR2_PREDIV;
   putreg32(regval, STM32_RCC_CFGR2);
 
 # endif
diff --git a/arch/arm/src/stm32/stm32f40xxx_alarm.h b/arch/arm/src/stm32/stm32f40xxx_alarm.h
index 5d8d94a197561f10c74625b95326624400463554..2c09bee31b8ba5e0e97be67d895a05bdedad5127 100644
--- a/arch/arm/src/stm32/stm32f40xxx_alarm.h
+++ b/arch/arm/src/stm32/stm32f40xxx_alarm.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/include/stm32/stm32f0xxx_alarm.h
+ * arch/arm/src/stm32/stm32f0xxx_alarm.h
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Neil hancock - delegated to Gregory Nutt Mar 30, 2016
diff --git a/arch/arm/src/stm32/stm32f40xxx_dma.c b/arch/arm/src/stm32/stm32f40xxx_dma.c
index 41d243685957832fc2581aa9c62c13174fb33e07..1824c76bf461efcf443a933d265772df84604be4 100644
--- a/arch/arm/src/stm32/stm32f40xxx_dma.c
+++ b/arch/arm/src/stm32/stm32f40xxx_dma.c
@@ -369,7 +369,7 @@ static void stm32_dmastreamdisable(struct stm32_dma_s *dmast)
  *
  ************************************************************************************/
 
-static int stm32_dmainterrupt(int irq, void *context)
+static int stm32_dmainterrupt(int irq, void *context, void *arg)
 {
   struct stm32_dma_s *dmast;
   uint32_t status;
@@ -481,7 +481,7 @@ void weak_function up_dmainitialize(void)
 
       /* Attach DMA interrupt vectors */
 
-      (void)irq_attach(dmast->irq, stm32_dmainterrupt);
+      (void)irq_attach(dmast->irq, stm32_dmainterrupt, dmast);
 
       /* Disable the DMA stream */
 
@@ -605,8 +605,8 @@ void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
   uint32_t regoffset;
   uint32_t regval;
 
-  dmadbg("paddr: %08x maddr: %08x ntransfers: %d scr: %08x\n",
-         paddr, maddr, ntransfers, scr);
+  dmainfo("paddr: %08x maddr: %08x ntransfers: %d scr: %08x\n",
+          paddr, maddr, ntransfers, scr);
 
 #ifdef CONFIG_STM32_DMACAPABLE
   DEBUGASSERT(stm32_dmacapable(maddr, ntransfers, scr));
@@ -869,7 +869,7 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
   uint32_t transfer_size, burst_length;
   uint32_t mend;
 
-  dmavdbg("stm32_dmacapable: 0x%08x/%u 0x%08x\n", maddr, count, ccr);
+  dmainfo("stm32_dmacapable: 0x%08x/%u 0x%08x\n", maddr, count, ccr);
 
   /* Verify that the address conforms to the memory transfer size.
    * Transfers to/from memory performed by the DMA controller are
@@ -899,13 +899,13 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
         break;
 
       default:
-        dmavdbg("stm32_dmacapable: bad transfer size in CCR\n");
+        dmainfo("stm32_dmacapable: bad transfer size in CCR\n");
         return false;
     }
 
   if ((maddr & (transfer_size - 1)) != 0)
     {
-      dmavdbg("stm32_dmacapable: transfer unaligned\n");
+      dmainfo("stm32_dmacapable: transfer unaligned\n");
       return false;
     }
 
@@ -937,13 +937,13 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
             break;
 
           default:
-          dmavdbg("stm32_dmacapable: bad burst size in CCR\n");
+          dmainfo("stm32_dmacapable: bad burst size in CCR\n");
             return false;
         }
 
       if ((maddr & (burst_length - 1)) != 0)
         {
-          dmavdbg("stm32_dmacapable: burst crosses 1KiB\n");
+          dmainfo("stm32_dmacapable: burst crosses 1KiB\n");
           return false;
         }
     }
@@ -952,7 +952,7 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
 
   if ((maddr & STM32_REGION_MASK) != (mend & STM32_REGION_MASK))
     {
-      dmavdbg("stm32_dmacapable: transfer crosses memory region\n");
+      dmainfo("stm32_dmacapable: transfer crosses memory region\n");
       return false;
     }
 
@@ -973,7 +973,7 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
         if (maddr >= STM32_CCMRAM_BASE &&
             (maddr - STM32_CCMRAM_BASE) < 65536)
           {
-            dmavdbg("stm32_dmacapable: transfer targets CCMRAM\n");
+            dmainfo("stm32_dmacapable: transfer targets CCMRAM\n");
             return false;
           }
         break;
@@ -981,11 +981,11 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
       default:
         /* Everything else is unsupported by DMA */
 
-        dmavdbg("stm32_dmacapable: transfer targets unknown/unsupported region\n");
+        dmainfo("stm32_dmacapable: transfer targets unknown/unsupported region\n");
         return false;
     }
 
-    dmavdbg("stm32_dmacapable: transfer OK\n");
+    dmainfo("stm32_dmacapable: transfer OK\n");
   return true;
 }
 #endif
@@ -1001,7 +1001,7 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs)
 {
   struct stm32_dma_s *dmast = (struct stm32_dma_s *)handle;
@@ -1031,22 +1031,22 @@ void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void stm32_dmadump(DMA_HANDLE handle, const struct stm32_dmaregs_s *regs,
                    const char *msg)
 {
   struct stm32_dma_s *dmast = (struct stm32_dma_s *)handle;
   uint32_t dmabase = DMA_BASE(dmast->base);
 
-  dmadbg("DMA Registers: %s\n", msg);
-  dmadbg("   LISR[%08x]: %08x\n", dmabase + STM32_DMA_LISR_OFFSET, regs->lisr);
-  dmadbg("   HISR[%08x]: %08x\n", dmabase + STM32_DMA_HISR_OFFSET, regs->hisr);
-  dmadbg("    SCR[%08x]: %08x\n", dmast->base + STM32_DMA_SCR_OFFSET, regs->scr);
-  dmadbg("  SNDTR[%08x]: %08x\n", dmast->base + STM32_DMA_SNDTR_OFFSET, regs->sndtr);
-  dmadbg("   SPAR[%08x]: %08x\n", dmast->base + STM32_DMA_SPAR_OFFSET, regs->spar);
-  dmadbg("  SM0AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM0AR_OFFSET, regs->sm0ar);
-  dmadbg("  SM1AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM1AR_OFFSET, regs->sm1ar);
-  dmadbg("   SFCR[%08x]: %08x\n", dmast->base + STM32_DMA_SFCR_OFFSET, regs->sfcr);
+  dmainfo("DMA Registers: %s\n", msg);
+  dmainfo("   LISR[%08x]: %08x\n", dmabase + STM32_DMA_LISR_OFFSET, regs->lisr);
+  dmainfo("   HISR[%08x]: %08x\n", dmabase + STM32_DMA_HISR_OFFSET, regs->hisr);
+  dmainfo("    SCR[%08x]: %08x\n", dmast->base + STM32_DMA_SCR_OFFSET, regs->scr);
+  dmainfo("  SNDTR[%08x]: %08x\n", dmast->base + STM32_DMA_SNDTR_OFFSET, regs->sndtr);
+  dmainfo("   SPAR[%08x]: %08x\n", dmast->base + STM32_DMA_SPAR_OFFSET, regs->spar);
+  dmainfo("  SM0AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM0AR_OFFSET, regs->sm0ar);
+  dmainfo("  SM1AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM1AR_OFFSET, regs->sm1ar);
+  dmainfo("   SFCR[%08x]: %08x\n", dmast->base + STM32_DMA_SFCR_OFFSET, regs->sfcr);
 }
 #endif
 
diff --git a/arch/arm/src/stm32/stm32f40xxx_i2c.c b/arch/arm/src/stm32/stm32f40xxx_i2c.c
new file mode 100644
index 0000000000000000000000000000000000000000..be15a27be0015f1ed4c1074b5c9f524f1f8ca2af
--- /dev/null
+++ b/arch/arm/src/stm32/stm32f40xxx_i2c.c
@@ -0,0 +1,2463 @@
+/************************************************************************************
+ * arch/arm/src/stm32/stm32f40xx_i2c.c
+ * STM32 I2C Hardware Layer - Device Driver
+ *
+ *   Copyright (C) 2011 Uros Platise. All rights reserved.
+ *   Author: Uros Platise 
+ *
+ * With extensions, modifications by:
+ *
+ *   Copyright (C) 2011-2014, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/* Supports:
+ *  - Master operation, 100 kHz (standard) and 400 kHz (full speed)
+ *  - Multiple instances (shared bus)
+ *  - Interrupt based operation
+ *
+ * Structure naming:
+ *  - Device: structure as defined by the nuttx/i2c/i2c.h
+ *  - Instance: represents each individual access to the I2C driver, obtained by
+ *      the i2c_init(); it extends the Device structure from the nuttx/i2c/i2c.h;
+ *      Instance points to OPS, to common I2C Hardware private data and contains
+ *      its own private data, as frequency, address, mode of operation (in the
+ *      future)
+ *  - Private: Private data of an I2C Hardware
+ *
+ * TODO
+ *  - Check for all possible deadlocks (as BUSY='1' I2C needs to be reset in HW
+ *    using the I2C_CR1_SWRST)
+ *  - SMBus support (hardware layer timings are already supported) and add SMBA
+ *    gpio pin
+ *  - Slave support with multiple addresses (on multiple instances):
+ *      - 2 x 7-bit address or
+ *      - 1 x 10 bit addresses + 1 x 7 bit address (?)
+ *      - plus the broadcast address (general call)
+ *  - Multi-master support
+ *  - DMA (to get rid of too many CPU wake-ups and interventions)
+ *  - Be ready for IPMI
+ */
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "up_arch.h"
+
+#include "stm32_rcc.h"
+#include "stm32_i2c.h"
+#include "stm32_waste.h"
+
+/* At least one I2C peripheral must be enabled */
+
+#if defined(CONFIG_STM32_I2C1) || defined(CONFIG_STM32_I2C2) || \
+    defined(CONFIG_STM32_I2C3)
+
+/* This implementation is for the STM32 F1, F2, and F4 only */
+/* Experimentally enabled for STM32L15XX */
+
+#if defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F10XX) || \
+    defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Configuration ********************************************************************/
+/* CONFIG_I2C_POLLED may be set so that I2C interrupts will not be used.  Instead,
+ * CPU-intensive polling will be used.
+ */
+
+/* Interrupt wait timeout in seconds and milliseconds */
+
+#if !defined(CONFIG_STM32_I2CTIMEOSEC) && !defined(CONFIG_STM32_I2CTIMEOMS)
+#  define CONFIG_STM32_I2CTIMEOSEC 0
+#  define CONFIG_STM32_I2CTIMEOMS  500   /* Default is 500 milliseconds */
+#elif !defined(CONFIG_STM32_I2CTIMEOSEC)
+#  define CONFIG_STM32_I2CTIMEOSEC 0     /* User provided milliseconds */
+#elif !defined(CONFIG_STM32_I2CTIMEOMS)
+#  define CONFIG_STM32_I2CTIMEOMS  0     /* User provided seconds */
+#endif
+
+/* Interrupt wait time timeout in system timer ticks */
+
+#ifndef CONFIG_STM32_I2CTIMEOTICKS
+#  define CONFIG_STM32_I2CTIMEOTICKS \
+    (SEC2TICK(CONFIG_STM32_I2CTIMEOSEC) + MSEC2TICK(CONFIG_STM32_I2CTIMEOMS))
+#endif
+
+#ifndef CONFIG_STM32_I2C_DYNTIMEO_STARTSTOP
+#  define CONFIG_STM32_I2C_DYNTIMEO_STARTSTOP TICK2USEC(CONFIG_STM32_I2CTIMEOTICKS)
+#endif
+
+/* On the STM32F103ZE, there is an internal conflict between I2C1 and FSMC.  In that
+ * case, it is necessary to disable FSMC before each I2C1 access and re-enable FSMC
+ * when the I2C access completes.
+ */
+
+#undef I2C1_FSMC_CONFLICT
+#if defined(CONFIG_STM32_STM32F10XX) && defined(CONFIG_STM32_FSMC) && defined(CONFIG_STM32_I2C1)
+#  define I2C1_FSMC_CONFLICT
+#endif
+
+/* Macros to convert a I2C pin to a GPIO output */
+
+#if defined(CONFIG_STM32_STM32L15XX)
+#  define I2C_OUTPUT (GPIO_OUTPUT | GPIO_OUTPUT_SET | GPIO_OPENDRAIN | \
+                      GPIO_SPEED_40MHz)
+#elif defined(CONFIG_STM32_STM32F10XX)
+#  define I2C_OUTPUT (GPIO_OUTPUT | GPIO_OUTPUT_SET | GPIO_CNF_OUTOD | \
+                      GPIO_MODE_50MHz)
+#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
+#  define I2C_OUTPUT (GPIO_OUTPUT | GPIO_FLOAT | GPIO_OPENDRAIN |\
+                      GPIO_SPEED_50MHz | GPIO_OUTPUT_SET)
+#endif
+
+#define MKI2C_OUTPUT(p) (((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_OUTPUT)
+
+/* Debug ****************************************************************************/
+
+/* I2C event trace logic.  NOTE:  trace uses the internal, non-standard, low-level
+ * debug interface syslog() but does not require that any other debug
+ * is enabled.
+ */
+
+#ifndef CONFIG_I2C_TRACE
+#  define stm32_i2c_tracereset(p)
+#  define stm32_i2c_tracenew(p,s)
+#  define stm32_i2c_traceevent(p,e,a)
+#  define stm32_i2c_tracedump(p)
+#endif
+
+#ifndef CONFIG_I2C_NTRACE
+#  define CONFIG_I2C_NTRACE 32
+#endif
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+/* Interrupt state */
+
+enum stm32_intstate_e
+{
+  INTSTATE_IDLE = 0,      /* No I2C activity */
+  INTSTATE_WAITING,       /* Waiting for completion of interrupt activity */
+  INTSTATE_DONE,          /* Interrupt activity complete */
+};
+
+/* Trace events */
+
+enum stm32_trace_e
+{
+  I2CEVENT_NONE = 0,      /* No events have occurred with this status */
+  I2CEVENT_SENDADDR,      /* Start/Master bit set and address sent, param = msgc */
+  I2CEVENT_SENDBYTE,      /* Send byte, param = dcnt */
+  I2CEVENT_ITBUFEN,       /* Enable buffer interrupts, param = 0 */
+  I2CEVENT_RCVBYTE,       /* Read more dta, param = dcnt */
+  I2CEVENT_REITBUFEN,     /* Re-enable buffer interrupts, param = 0 */
+  I2CEVENT_DISITBUFEN,    /* Disable buffer interrupts, param = 0 */
+  I2CEVENT_BTFNOSTART,    /* BTF on last byte with no restart, param = msgc */
+  I2CEVENT_BTFRESTART,    /* Last byte sent, re-starting, param = msgc */
+  I2CEVENT_BTFSTOP,       /* Last byte sten, send stop, param = 0 */
+  I2CEVENT_ERROR          /* Error occurred, param = 0 */
+};
+
+/* Trace data */
+
+struct stm32_trace_s
+{
+  uint32_t status;             /* I2C 32-bit SR2|SR1 status */
+  uint32_t count;              /* Interrupt count when status change */
+  enum stm32_intstate_e event; /* Last event that occurred with this status */
+  uint32_t parm;               /* Parameter associated with the event */
+  systime_t time;              /* First of event or first status */
+};
+
+/* I2C Device hardware configuration */
+
+struct stm32_i2c_config_s
+{
+  uint32_t base;              /* I2C base address */
+  uint32_t clk_bit;           /* Clock enable bit */
+  uint32_t reset_bit;         /* Reset bit */
+  uint32_t scl_pin;           /* GPIO configuration for SCL as SCL */
+  uint32_t sda_pin;           /* GPIO configuration for SDA as SDA */
+#ifndef CONFIG_I2C_POLLED
+  int (*isr)(int, void *, void *);    /* Interrupt handler */
+  uint32_t ev_irq;            /* Event IRQ */
+  uint32_t er_irq;            /* Error IRQ */
+#endif
+};
+
+/* I2C Device Private Data */
+
+struct stm32_i2c_priv_s
+{
+  const struct i2c_ops_s *ops; /* Standard I2C operations */
+  const struct stm32_i2c_config_s *config; /* Port configuration */
+  int refs;                    /* Referernce count */
+  sem_t sem_excl;              /* Mutual exclusion semaphore */
+#ifndef CONFIG_I2C_POLLED
+  sem_t sem_isr;               /* Interrupt wait semaphore */
+#endif
+  volatile uint8_t intstate;   /* Interrupt handshake (see enum stm32_intstate_e) */
+
+  uint8_t msgc;                /* Message count */
+  struct i2c_msg_s *msgv;      /* Message list */
+  uint8_t *ptr;                /* Current message buffer */
+  uint32_t frequency;          /* Current I2C frequency */
+  int dcnt;                    /* Current message length */
+  uint16_t flags;              /* Current message flags */
+  bool check_addr_ACK;         /* Flag to signal if on next interrupt address has ACKed */
+  uint8_t total_msg_len;       /* Flag to signal a short read sequence */
+
+  /* I2C trace support */
+
+#ifdef CONFIG_I2C_TRACE
+  int tndx;                    /* Trace array index */
+  systime_t start_time;        /* Time when the trace was started */
+
+  /* The actual trace data */
+
+  struct stm32_trace_s trace[CONFIG_I2C_NTRACE];
+#endif
+
+  uint32_t status;             /* End of transfer SR2|SR1 status */
+};
+
+/************************************************************************************
+ * Private Function Prototypes
+ ************************************************************************************/
+
+static inline uint16_t stm32_i2c_getreg(FAR struct stm32_i2c_priv_s *priv,
+                                        uint8_t offset);
+static inline void stm32_i2c_putreg(FAR struct stm32_i2c_priv_s *priv, uint8_t offset,
+                                    uint16_t value);
+static inline void stm32_i2c_modifyreg(FAR struct stm32_i2c_priv_s *priv,
+                                       uint8_t offset, uint16_t clearbits,
+                                       uint16_t setbits);
+static inline void stm32_i2c_sem_wait(FAR struct stm32_i2c_priv_s *priv);
+
+#ifdef CONFIG_STM32_I2C_DYNTIMEO
+static useconds_t stm32_i2c_tousecs(int msgc, FAR struct i2c_msg_s *msgs);
+#endif /* CONFIG_STM32_I2C_DYNTIMEO */
+
+static inline int  stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv);
+static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv);
+static inline void stm32_i2c_sem_post(FAR struct stm32_i2c_priv_s *priv);
+static inline void stm32_i2c_sem_init(FAR struct stm32_i2c_priv_s *priv);
+static inline void stm32_i2c_sem_destroy(FAR struct stm32_i2c_priv_s *priv);
+
+#ifdef CONFIG_I2C_TRACE
+static void stm32_i2c_tracereset(FAR struct stm32_i2c_priv_s *priv);
+static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv, uint32_t status);
+static void stm32_i2c_traceevent(FAR struct stm32_i2c_priv_s *priv,
+                                 enum stm32_trace_e event, uint32_t parm);
+static void stm32_i2c_tracedump(FAR struct stm32_i2c_priv_s *priv);
+#endif /* CONFIG_I2C_TRACE */
+
+static void stm32_i2c_setclock(FAR struct stm32_i2c_priv_s *priv,
+                               uint32_t frequency);
+static inline void stm32_i2c_sendstart(FAR struct stm32_i2c_priv_s *priv);
+static inline void stm32_i2c_clrstart(FAR struct stm32_i2c_priv_s *priv);
+static inline void stm32_i2c_sendstop(FAR struct stm32_i2c_priv_s *priv);
+static inline uint32_t stm32_i2c_getstatus(FAR struct stm32_i2c_priv_s *priv);
+
+#ifdef I2C1_FSMC_CONFLICT
+static inline uint32_t stm32_i2c_disablefsmc(FAR struct stm32_i2c_priv_s *priv);
+static inline void stm32_i2c_enablefsmc(uint32_t ahbenr);
+#endif /* I2C1_FSMC_CONFLICT */
+
+static int stm32_i2c_isr(struct stm32_i2c_priv_s * priv);
+
+#ifndef CONFIG_I2C_POLLED
+#ifdef CONFIG_STM32_I2C1
+static int stm32_i2c1_isr(int irq, void *context, FAR void *arg);
+#endif
+#ifdef CONFIG_STM32_I2C2
+static int stm32_i2c2_isr(int irq, void *context, FAR void *arg);
+#endif
+#ifdef CONFIG_STM32_I2C3
+static int stm32_i2c3_isr(int irq, void *context, FAR void *arg);
+#endif
+#endif /* !CONFIG_I2C_POLLED */
+
+static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv);
+static int stm32_i2c_deinit(FAR struct stm32_i2c_priv_s *priv);
+static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s *msgs,
+                              int count);
+#ifdef CONFIG_I2C_RESET
+static int stm32_i2c_reset(FAR struct i2c_master_s *dev);
+#endif
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+/* Trace events strings */
+
+#ifdef CONFIG_I2C_TRACE
+static const char *g_trace_names[] =
+{
+  "NONE      ",
+  "SENDADDR  ",
+  "SENDBYTE  ",
+  "ITBUFEN   ",
+  "RCVBYTE   ",
+  "REITBUFEN ",
+  "DISITBUFEN",
+  "BTFNOSTART",
+  "BTFRESTART",
+  "BTFSTOP   ",
+  "ERROR     "
+};
+#endif
+
+/* I2C interface */
+
+static const struct i2c_ops_s stm32_i2c_ops =
+{
+  .transfer = stm32_i2c_transfer
+#ifdef CONFIG_I2C_RESET
+  , .reset  = stm32_i2c_reset
+#endif
+};
+
+/* I2C device structures */
+
+#ifdef CONFIG_STM32_I2C1
+static const struct stm32_i2c_config_s stm32_i2c1_config =
+{
+  .base       = STM32_I2C1_BASE,
+  .clk_bit    = RCC_APB1ENR_I2C1EN,
+  .reset_bit  = RCC_APB1RSTR_I2C1RST,
+  .scl_pin    = GPIO_I2C1_SCL,
+  .sda_pin    = GPIO_I2C1_SDA,
+#ifndef CONFIG_I2C_POLLED
+  .isr        = stm32_i2c1_isr,
+  .ev_irq     = STM32_IRQ_I2C1EV,
+  .er_irq     = STM32_IRQ_I2C1ER
+#endif
+};
+
+static struct stm32_i2c_priv_s stm32_i2c1_priv =
+{
+  .ops        = &stm32_i2c_ops,
+  .config     = &stm32_i2c1_config,
+  .refs       = 0,
+  .intstate   = INTSTATE_IDLE,
+  .msgc       = 0,
+  .msgv       = NULL,
+  .ptr        = NULL,
+  .dcnt       = 0,
+  .flags      = 0,
+  .status     = 0
+};
+#endif
+
+#ifdef CONFIG_STM32_I2C2
+static const struct stm32_i2c_config_s stm32_i2c2_config =
+{
+  .base       = STM32_I2C2_BASE,
+  .clk_bit    = RCC_APB1ENR_I2C2EN,
+  .reset_bit  = RCC_APB1RSTR_I2C2RST,
+  .scl_pin    = GPIO_I2C2_SCL,
+  .sda_pin    = GPIO_I2C2_SDA,
+#ifndef CONFIG_I2C_POLLED
+  .isr        = stm32_i2c2_isr,
+  .ev_irq     = STM32_IRQ_I2C2EV,
+  .er_irq     = STM32_IRQ_I2C2ER
+#endif
+};
+
+static struct stm32_i2c_priv_s stm32_i2c2_priv =
+{
+  .ops        = &stm32_i2c_ops,
+  .config     = &stm32_i2c2_config,
+  .refs       = 0,
+  .intstate   = INTSTATE_IDLE,
+  .msgc       = 0,
+  .msgv       = NULL,
+  .ptr        = NULL,
+  .dcnt       = 0,
+  .flags      = 0,
+  .status     = 0
+};
+#endif
+
+#ifdef CONFIG_STM32_I2C3
+static const struct stm32_i2c_config_s stm32_i2c3_config =
+{
+  .base       = STM32_I2C3_BASE,
+  .clk_bit    = RCC_APB1ENR_I2C3EN,
+  .reset_bit  = RCC_APB1RSTR_I2C3RST,
+  .scl_pin    = GPIO_I2C3_SCL,
+  .sda_pin    = GPIO_I2C3_SDA,
+#ifndef CONFIG_I2C_POLLED
+  .isr        = stm32_i2c3_isr,
+  .ev_irq     = STM32_IRQ_I2C3EV,
+  .er_irq     = STM32_IRQ_I2C3ER
+#endif
+};
+
+static struct stm32_i2c_priv_s stm32_i2c3_priv =
+{
+  .ops        = &stm32_i2c_ops,
+  .config     = &stm32_i2c3_config,
+  .refs       = 0,
+  .intstate   = INTSTATE_IDLE,
+  .msgc       = 0,
+  .msgv       = NULL,
+  .ptr        = NULL,
+  .dcnt       = 0,
+  .flags      = 0,
+  .status     = 0
+};
+#endif
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_i2c_getreg
+ *
+ * Description:
+ *   Get a 16-bit register value by offset
+ *
+ ************************************************************************************/
+
+static inline uint16_t stm32_i2c_getreg(FAR struct stm32_i2c_priv_s *priv,
+                                        uint8_t offset)
+{
+  return getreg16(priv->config->base + offset);
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_putreg
+ *
+ * Description:
+ *  Put a 16-bit register value by offset
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_putreg(FAR struct stm32_i2c_priv_s *priv, uint8_t offset,
+                                    uint16_t value)
+{
+  putreg16(value, priv->config->base + offset);
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_modifyreg
+ *
+ * Description:
+ *   Modify a 16-bit register value by offset
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_modifyreg(FAR struct stm32_i2c_priv_s *priv,
+                                       uint8_t offset, uint16_t clearbits,
+                                       uint16_t setbits)
+{
+  modifyreg16(priv->config->base + offset, clearbits, setbits);
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_sem_wait
+ *
+ * Description:
+ *   Take the exclusive access, waiting as necessary
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_sem_wait(FAR struct stm32_i2c_priv_s *priv)
+{
+  while (sem_wait(&priv->sem_excl) != 0)
+    {
+      ASSERT(errno == EINTR);
+    }
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_tousecs
+ *
+ * Description:
+ *   Return a micro-second delay based on the number of bytes left to be processed.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32_I2C_DYNTIMEO
+static useconds_t stm32_i2c_tousecs(int msgc, FAR struct i2c_msg_s *msgs)
+{
+  size_t bytecount = 0;
+  int i;
+
+  /* Count the number of bytes left to process */
+
+  for (i = 0; i < msgc; i++)
+    {
+      bytecount += msgs[i].length;
+    }
+
+  /* Then return a number of microseconds based on a user provided scaling
+   * factor.
+   */
+
+  return (useconds_t)(CONFIG_STM32_I2C_DYNTIMEO_USECPERBYTE * bytecount);
+}
+#endif
+
+/************************************************************************************
+ * Name: stm32_i2c_sem_waitdone
+ *
+ * Description:
+ *   Wait for a transfer to complete
+ *
+ ************************************************************************************/
+
+#ifndef CONFIG_I2C_POLLED
+static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
+{
+  struct timespec abstime;
+  irqstate_t flags;
+  uint32_t regval;
+  int ret;
+
+  flags = enter_critical_section();
+
+  /* Enable I2C interrupts */
+
+  regval  = stm32_i2c_getreg(priv, STM32_I2C_CR2_OFFSET);
+  regval |= (I2C_CR2_ITERREN | I2C_CR2_ITEVFEN);
+  stm32_i2c_putreg(priv, STM32_I2C_CR2_OFFSET, regval);
+
+  /* Signal the interrupt handler that we are waiting.  NOTE:  Interrupts
+   * are currently disabled but will be temporarily re-enabled below when
+   * sem_timedwait() sleeps.
+   */
+
+  priv->intstate = INTSTATE_WAITING;
+  do
+    {
+      /* Get the current time */
+
+      (void)clock_gettime(CLOCK_REALTIME, &abstime);
+
+      /* Calculate a time in the future */
+
+#if CONFIG_STM32_I2CTIMEOSEC > 0
+      abstime.tv_sec += CONFIG_STM32_I2CTIMEOSEC;
+#endif
+
+      /* Add a value proportional to the number of bytes in the transfer */
+
+#ifdef CONFIG_STM32_I2C_DYNTIMEO
+      abstime.tv_nsec += 1000 * stm32_i2c_tousecs(priv->msgc, priv->msgv);
+      if (abstime.tv_nsec >= 1000 * 1000 * 1000)
+        {
+          abstime.tv_sec++;
+          abstime.tv_nsec -= 1000 * 1000 * 1000;
+        }
+
+#elif CONFIG_STM32_I2CTIMEOMS > 0
+      abstime.tv_nsec += CONFIG_STM32_I2CTIMEOMS * 1000 * 1000;
+      if (abstime.tv_nsec >= 1000 * 1000 * 1000)
+        {
+          abstime.tv_sec++;
+          abstime.tv_nsec -= 1000 * 1000 * 1000;
+        }
+#endif
+
+      /* Wait until either the transfer is complete or the timeout expires */
+
+      ret = sem_timedwait(&priv->sem_isr, &abstime);
+      if (ret != OK && errno != EINTR)
+        {
+          /* Break out of the loop on irrecoverable errors.  This would
+           * include timeouts and mystery errors reported by sem_timedwait.
+           * NOTE that we try again if we are awakened by a signal (EINTR).
+           */
+
+          break;
+        }
+    }
+
+  /* Loop until the interrupt level transfer is complete. */
+
+  while (priv->intstate != INTSTATE_DONE);
+
+  /* Set the interrupt state back to IDLE */
+
+  priv->intstate = INTSTATE_IDLE;
+
+  /* Disable I2C interrupts */
+
+  regval  = stm32_i2c_getreg(priv, STM32_I2C_CR2_OFFSET);
+  regval &= ~I2C_CR2_ALLINTS;
+  stm32_i2c_putreg(priv, STM32_I2C_CR2_OFFSET, regval);
+
+  leave_critical_section(flags);
+  return ret;
+}
+#else
+static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
+{
+  systime_t timeout;
+  systime_t start;
+  systime_t elapsed;
+  int ret;
+
+  /* Get the timeout value */
+
+#ifdef CONFIG_STM32_I2C_DYNTIMEO
+  timeout = USEC2TICK(stm32_i2c_tousecs(priv->msgc, priv->msgv));
+#else
+  timeout = CONFIG_STM32_I2CTIMEOTICKS;
+#endif
+
+  /* Signal the interrupt handler that we are waiting.  NOTE:  Interrupts
+   * are currently disabled but will be temporarily re-enabled below when
+   * sem_timedwait() sleeps.
+   */
+
+  priv->intstate = INTSTATE_WAITING;
+  start = clock_systimer();
+
+  do
+    {
+      /* Poll by simply calling the timer interrupt handler until it
+       * reports that it is done.
+       */
+
+      stm32_i2c_isr(priv);
+
+      /* Calculate the elapsed time */
+
+      elapsed = clock_systimer() - start;
+    }
+
+  /* Loop until the transfer is complete. */
+
+  while (priv->intstate != INTSTATE_DONE && elapsed < timeout);
+
+  i2cinfo("intstate: %d elapsed: %ld threshold: %ld status: %08x\n",
+          priv->intstate, (long)elapsed, (long)timeout, priv->status);
+
+  /* Set the interrupt state back to IDLE */
+
+  ret = priv->intstate == INTSTATE_DONE ? OK : -ETIMEDOUT;
+  priv->intstate = INTSTATE_IDLE;
+  return ret;
+}
+#endif
+
+/************************************************************************************
+ * Name: stm32_i2c_sem_waitstop
+ *
+ * Description:
+ *   Wait for a STOP to complete
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv)
+{
+  systime_t start;
+  systime_t elapsed;
+  systime_t timeout;
+  uint32_t cr1;
+  uint32_t sr1;
+
+  /* Select a timeout */
+
+#ifdef CONFIG_STM32_I2C_DYNTIMEO
+  timeout = USEC2TICK(CONFIG_STM32_I2C_DYNTIMEO_STARTSTOP);
+#else
+  timeout = CONFIG_STM32_I2CTIMEOTICKS;
+#endif
+
+  /* Wait as stop might still be in progress; but stop might also
+   * be set because of a timeout error: "The [STOP] bit is set and
+   * cleared by software, cleared by hardware when a Stop condition is
+   * detected, set by hardware when a timeout error is detected."
+   */
+
+  start = clock_systimer();
+  do
+    {
+      /* Check for STOP condition */
+
+      cr1 = stm32_i2c_getreg(priv, STM32_I2C_CR1_OFFSET);
+      if ((cr1 & I2C_CR1_STOP) == 0)
+        {
+          return;
+        }
+
+      /* Check for timeout error */
+
+      sr1 = stm32_i2c_getreg(priv, STM32_I2C_SR1_OFFSET);
+      if ((sr1 & I2C_SR1_TIMEOUT) != 0)
+        {
+          return;
+        }
+
+      /* Calculate the elapsed time */
+
+      elapsed = clock_systimer() - start;
+    }
+
+  /* Loop until the stop is complete or a timeout occurs. */
+
+  while (elapsed < timeout);
+
+  /* If we get here then a timeout occurred with the STOP condition
+   * still pending.
+   */
+
+  i2cinfo("Timeout with CR1: %04x SR1: %04x\n", cr1, sr1);
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_sem_post
+ *
+ * Description:
+ *   Release the mutual exclusion semaphore
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_sem_post(struct stm32_i2c_priv_s *priv)
+{
+  sem_post(&priv->sem_excl);
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_sem_init
+ *
+ * Description:
+ *   Initialize semaphores
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_sem_init(FAR struct stm32_i2c_priv_s *priv)
+{
+  sem_init(&priv->sem_excl, 0, 1);
+
+#ifndef CONFIG_I2C_POLLED
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_init(&priv->sem_isr, 0, 0);
+  sem_setprotocol(&priv->sem_isr, SEM_PRIO_NONE);
+#endif
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_sem_destroy
+ *
+ * Description:
+ *   Destroy semaphores.
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_sem_destroy(FAR struct stm32_i2c_priv_s *priv)
+{
+  sem_destroy(&priv->sem_excl);
+#ifndef CONFIG_I2C_POLLED
+  sem_destroy(&priv->sem_isr);
+#endif
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_trace*
+ *
+ * Description:
+ *   I2C trace instrumentation
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_I2C_TRACE
+static void stm32_i2c_traceclear(FAR struct stm32_i2c_priv_s *priv)
+{
+  struct stm32_trace_s *trace = &priv->trace[priv->tndx];
+
+  trace->status = 0;              /* I2C 32-bit SR2|SR1 status */
+  trace->count  = 0;              /* Interrupt count when status change */
+  trace->event  = I2CEVENT_NONE;  /* Last event that occurred with this status */
+  trace->parm   = 0;              /* Parameter associated with the event */
+  trace->time   = 0;              /* Time of first status or event */
+}
+
+static void stm32_i2c_tracereset(FAR struct stm32_i2c_priv_s *priv)
+{
+  /* Reset the trace info for a new data collection */
+
+  priv->tndx       = 0;
+  priv->start_time = clock_systimer();
+  stm32_i2c_traceclear(priv);
+}
+
+static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv, uint32_t status)
+{
+  struct stm32_trace_s *trace = &priv->trace[priv->tndx];
+
+  /* Is the current entry uninitialized?  Has the status changed? */
+
+  if (trace->count == 0 || status != trace->status)
+    {
+      /* Yes.. Was it the status changed?  */
+
+      if (trace->count != 0)
+        {
+          /* Yes.. bump up the trace index (unless we are out of trace entries) */
+
+          if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
+            {
+              i2cerr("ERROR: Trace table overflow\n");
+              return;
+            }
+
+          priv->tndx++;
+          trace = &priv->trace[priv->tndx];
+        }
+
+      /* Initialize the new trace entry */
+
+      stm32_i2c_traceclear(priv);
+      trace->status = status;
+      trace->count  = 1;
+      trace->time   = clock_systimer();
+    }
+  else
+    {
+      /* Just increment the count of times that we have seen this status */
+
+      trace->count++;
+    }
+}
+
+static void stm32_i2c_traceevent(FAR struct stm32_i2c_priv_s *priv,
+                                 enum stm32_trace_e event, uint32_t parm)
+{
+  struct stm32_trace_s *trace;
+
+  if (event != I2CEVENT_NONE)
+    {
+      trace = &priv->trace[priv->tndx];
+
+      /* Initialize the new trace entry */
+
+      trace->event  = event;
+      trace->parm   = parm;
+
+      /* Bump up the trace index (unless we are out of trace entries) */
+
+      if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
+        {
+          i2cerr("ERROR: Trace table overflow\n");
+          return;
+        }
+
+      priv->tndx++;
+      stm32_i2c_traceclear(priv);
+    }
+}
+
+static void stm32_i2c_tracedump(FAR struct stm32_i2c_priv_s *priv)
+{
+  struct stm32_trace_s *trace;
+  int i;
+
+  syslog(LOG_DEBUG, "Elapsed time: %ld\n",
+         (long)(clock_systimer() - priv->start_time));
+
+  for (i = 0; i <= priv->tndx; i++)
+    {
+      trace = &priv->trace[i];
+      syslog(LOG_DEBUG,
+             "%2d. STATUS: %08x COUNT: %3d EVENT: %s(%2d) PARM: %08x TIME: %d\n",
+             i+1, trace->status, trace->count, g_trace_names[trace->event],
+             trace->event, trace->parm, trace->time - priv->start_time);
+    }
+}
+#endif /* CONFIG_I2C_TRACE */
+
+/************************************************************************************
+ * Name: stm32_i2c_setclock
+ *
+ * Description:
+ *   Set the I2C clock
+ *
+ ************************************************************************************/
+
+static void stm32_i2c_setclock(FAR struct stm32_i2c_priv_s *priv, uint32_t frequency)
+{
+  uint16_t cr1;
+  uint16_t ccr;
+  uint16_t trise;
+  uint16_t freqmhz;
+  uint16_t speed;
+
+  /* Has the I2C bus frequency changed? */
+
+  if (frequency != priv->frequency)
+    {
+      /* Disable the selected I2C peripheral to configure TRISE */
+
+      cr1 = stm32_i2c_getreg(priv, STM32_I2C_CR1_OFFSET);
+      stm32_i2c_putreg(priv, STM32_I2C_CR1_OFFSET, cr1 & ~I2C_CR1_PE);
+
+      /* Update timing and control registers */
+
+      freqmhz = (uint16_t)(STM32_PCLK1_FREQUENCY / 1000000);
+      ccr = 0;
+
+      /* Configure speed in standard mode */
+
+      if (frequency <= 100000)
+        {
+          /* Standard mode speed calculation */
+
+          speed = (uint16_t)(STM32_PCLK1_FREQUENCY / (frequency << 1));
+
+          /* The CCR fault must be >= 4 */
+
+          if (speed < 4)
+            {
+              /* Set the minimum allowed value */
+
+              speed = 4;
+            }
+
+          ccr |= speed;
+
+          /* Set Maximum Rise Time for standard mode */
+
+          trise = freqmhz + 1;
+        }
+
+      /* Configure speed in fast mode */
+
+      else /* (frequency <= 400000) */
+        {
+          /* Fast mode speed calculation with Tlow/Thigh = 16/9 */
+
+#ifdef CONFIG_STM32_I2C_DUTY16_9
+          speed = (uint16_t)(STM32_PCLK1_FREQUENCY / (frequency * 25));
+
+          /* Set DUTY and fast speed bits */
+
+          ccr |= (I2C_CCR_DUTY | I2C_CCR_FS);
+#else
+          /* Fast mode speed calculation with Tlow/Thigh = 2 */
+
+          speed = (uint16_t)(STM32_PCLK1_FREQUENCY / (frequency * 3));
+
+          /* Set fast speed bit */
+
+          ccr |= I2C_CCR_FS;
+#endif
+
+          /* Verify that the CCR speed value is nonzero */
+
+          if (speed < 1)
+            {
+              /* Set the minimum allowed value */
+
+              speed = 1;
+            }
+
+          ccr |= speed;
+
+          /* Set Maximum Rise Time for fast mode */
+
+          trise = (uint16_t)(((freqmhz * 300) / 1000) + 1);
+        }
+
+      /* Write the new values of the CCR and TRISE registers */
+
+      stm32_i2c_putreg(priv, STM32_I2C_CCR_OFFSET, ccr);
+      stm32_i2c_putreg(priv, STM32_I2C_TRISE_OFFSET, trise);
+
+      /* Bit 14 of OAR1 must be configured and kept at 1 */
+
+      stm32_i2c_putreg(priv, STM32_I2C_OAR1_OFFSET, I2C_OAR1_ONE);
+
+      /* Re-enable the peripheral (or not) */
+
+      stm32_i2c_putreg(priv, STM32_I2C_CR1_OFFSET, cr1);
+
+      /* Save the new I2C frequency */
+
+      priv->frequency = frequency;
+    }
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_sendstart
+ *
+ * Description:
+ *   Send the START conditions/force Master mode
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_sendstart(FAR struct stm32_i2c_priv_s *priv)
+{
+  /* Disable ACK on receive by default and generate START */
+
+  stm32_i2c_modifyreg(priv, STM32_I2C_CR1_OFFSET, I2C_CR1_ACK, I2C_CR1_START);
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_clrstart
+ *
+ * Description:
+ *   Clear the STOP, START or PEC condition on certain error recovery steps.
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_clrstart(FAR struct stm32_i2c_priv_s *priv)
+{
+  /* "Note: When the STOP, START or PEC bit is set, the software must
+   *  not perform any write access to I2C_CR1 before this bit is
+   *  cleared by hardware. Otherwise there is a risk of setting a
+   *  second STOP, START or PEC request."
+   *
+   * "The [STOP] bit is set and cleared by software, cleared by hardware
+   *  when a Stop condition is detected, set by hardware when a timeout
+   *  error is detected.
+   *
+   * "This [START] bit is set and cleared by software and cleared by hardware
+   *  when start is sent or PE=0."  The bit must be cleared by software if the
+   *  START is never sent.
+   *
+   * "This [PEC] bit is set and cleared by software, and cleared by hardware
+   *  when PEC is transferred or by a START or Stop condition or when PE=0."
+   */
+
+  stm32_i2c_modifyreg(priv, STM32_I2C_CR1_OFFSET,
+                      I2C_CR1_START | I2C_CR1_STOP | I2C_CR1_PEC, 0);
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_sendstop
+ *
+ * Description:
+ *   Send the STOP conditions
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_sendstop(FAR struct stm32_i2c_priv_s *priv)
+{
+  stm32_i2c_modifyreg(priv, STM32_I2C_CR1_OFFSET, I2C_CR1_ACK, I2C_CR1_STOP);
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_getstatus
+ *
+ * Description:
+ *   Get 32-bit status (SR1 and SR2 combined)
+ *
+ ************************************************************************************/
+
+static inline uint32_t stm32_i2c_getstatus(FAR struct stm32_i2c_priv_s *priv)
+{
+  uint32_t status = stm32_i2c_getreg(priv, STM32_I2C_SR1_OFFSET);
+  status |= (stm32_i2c_getreg(priv, STM32_I2C_SR2_OFFSET) << 16);
+  return status;
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_disablefsmc
+ *
+ * Description:
+ *   FSMC must be disable while accessing I2C1 because it uses a common resource
+ *   (LBAR)
+ *
+ *  NOTE: This is an issue with the STM32F103ZE, but may not be an issue with other
+ *  STM32s.  You may need to experiment
+ *
+ ************************************************************************************/
+
+#ifdef I2C1_FSMC_CONFLICT
+static inline uint32_t stm32_i2c_disablefsmc(FAR struct stm32_i2c_priv_s *priv)
+{
+  uint32_t ret = 0;
+  uint32_t regval;
+
+  /* Is this I2C1 */
+
+#if defined(CONFIG_STM32_I2C2) || defined(CONFIG_STM32_I2C3)
+  if (priv->config->base == STM32_I2C1_BASE)
+#endif
+    {
+      /* Disable FSMC unconditionally */
+
+      ret    = getreg32(STM32_RCC_AHBENR);
+      regval = ret & ~RCC_AHBENR_FSMCEN;
+      putreg32(regval, STM32_RCC_AHBENR);
+    }
+
+  return ret;
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_enablefsmc
+ *
+ * Description:
+ *   Re-enable the FSMC
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_enablefsmc(uint32_t ahbenr)
+{
+  uint32_t regval;
+
+  /* Enable AHB clocking to the FSMC only if it was previously enabled. */
+
+  if ((ahbenr & RCC_AHBENR_FSMCEN) != 0)
+    {
+      regval  = getreg32(STM32_RCC_AHBENR);
+      regval |= RCC_AHBENR_FSMCEN;
+      putreg32(regval, STM32_RCC_AHBENR);
+    }
+}
+#else
+#  define stm32_i2c_disablefsmc(priv) (0)
+#  define stm32_i2c_enablefsmc(ahbenr)
+#endif /* I2C1_FSMC_CONFLICT */
+
+/************************************************************************************
+ * Name: stm32_i2c_isr
+ *
+ * Description:
+ *  Common Interrupt Service Routine
+ *
+ ************************************************************************************/
+
+static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
+{
+  uint32_t status;
+
+  i2cinfo("I2C ISR called\n");
+
+  /* Get state of the I2C controller (register SR1 only)
+   *
+   * Get control register SR1 only as reading both SR1 and SR2 clears the ADDR
+   * flag(possibly others) causing the hardware to advance to the next state
+   * without the proper action being taken.
+   */
+
+  status = stm32_i2c_getreg(priv, STM32_I2C_SR1_OFFSET);
+
+  /* Update private version of the state */
+
+  priv->status = status;
+
+  /* Check if this is a new transmission so to set up the
+   * trace table accordingly.
+   */
+
+  stm32_i2c_tracenew(priv, status);
+  stm32_i2c_traceevent(priv, I2CEVENT_ISR_CALL, 0);
+
+  /* Messages handling (1/2)
+   *
+   * Message handling should only operate when a message has been completely
+   * sent and after the ISR had the chance to run to set bits after the last
+   * written/read byte, i.e. priv->dcnt == -1. This is also the case in when
+   * the ISR is called for the first time. This can seen in stm32_i2c_process()
+   * before entering the stm32_i2c_sem_waitdone() waiting process.
+   *
+   * Message handling should only operate when:
+   *     - A message has been completely sent and there are still messages
+   *       to send(i.e. msgc > 0).
+   *     - After the ISR had the chance to run to set start bit or termination
+   *       flags after the last written/read byte(after last byte dcnt=0, msg
+   *       handling dcnt = -1).
+   *
+   * When the ISR is called for the first time the same conditions hold.
+   * This can seen in stm32_i2c_process() before entering the
+   * stm32_i2c_sem_waitdone() waiting process.
+   */
+
+  if (priv->dcnt == -1 && priv->msgc > 0)
+    {
+      i2cinfo("Switch to new message\n");
+
+      /* Get current message to process data and copy to private structure */
+
+      priv->ptr           = priv->msgv->buffer;   /* Copy buffer to private struct */
+      priv->dcnt          = priv->msgv->length;   /* Set counter of current msg length */
+      priv->total_msg_len = priv->msgv->length;   /* Set total msg length */
+      priv->flags         = priv->msgv->flags;    /* Copy flags to private struct */
+
+      i2cinfo("Current flags %i\n", priv->flags);
+
+      /* Decrease counter to indicate the number of messages left to process */
+
+      priv->msgc--;
+
+      /* Decrease message pointer. If last message set next message vector to null */
+
+      if (priv->msgc == 0)
+        {
+          /* No more messages, don't need to increment msgv. This pointer will be set
+           * to zero when reaching the termination of the ISR calls, i.e.  Messages
+           * handling(2/2).
+           */
+        }
+      else
+        {
+          /* If not last message increment to next message to process */
+
+          priv->msgv++;
+        }
+
+      /* Trace event */
+
+      stm32_i2c_traceevent(priv, I2CEVENT_MSG_HANDLING, priv->msgc);
+    }
+
+  /* Note the event where we are on the last message and after the last
+   * byte is handled at the bottom of this function, as it terminates
+   * the repeated calls to the ISR.
+   */
+
+  /* I2C protocol logic
+   *
+   * I2C protocol logic follows. It's organized in an if else chain such that
+   * only one mode of operation is executed every time the ISR is called.
+   */
+
+  /* Address Handling
+   *
+   * Check if a start bit was set and transmit address with proper format.
+   *
+   * Note:
+   * On first call the start bit has been set by stm32_i2c_waitdone()
+   * Otherwise it will be set from this ISR.
+   *
+   * Remember that after a start bit an address has always to be sent.
+   */
+
+  if ((status & I2C_SR1_SB) != 0)
+    {
+      /* Start bit is set */
+
+      i2cinfo("Entering address handling, status = %i\n", status);
+
+      /* Check for empty message (for robustness) */
+
+      if (priv->dcnt > 0)
+        {
+          /* Set POS bit to zero (can be up from a previous 2 byte receive) */
+
+          stm32_i2c_modifyreg(priv, STM32_I2C_CR1_OFFSET, I2C_CR1_POS, 0);
+
+          /* ACK is the expected answer for N>=3 reads and writes */
+
+          stm32_i2c_modifyreg(priv, STM32_I2C_CR1_OFFSET, 0, I2C_CR1_ACK);
+
+          /* Send address byte with correct 8th bit set(for writing or reading)
+           * Transmission happens after having written to the data register
+           * STM32_I2C_DR
+           */
+
+          stm32_i2c_putreg(priv, STM32_I2C_DR_OFFSET,
+                           (priv->flags & I2C_M_TEN) ?
+                           0 :((priv->msgv->addr << 1) | (priv->flags & I2C_M_READ)));
+
+          i2cinfo("Address sent. Addr=%#02x Write/Read bit=%i\n",
+                  priv->msgv->addr, (priv->flags & I2C_M_READ));
+
+          /* Flag that address has just been sent */
+
+          priv->check_addr_ACK = true;
+
+          stm32_i2c_traceevent(priv, I2CEVENT_SENDADDR, priv->msgv->addr);
+        }
+      else
+        {
+          /* TODO: untested!! */
+
+          i2cwarn(" An empty message has been detected, ignoring and passing to next message.\n");
+
+          /* Trace event */
+
+          stm32_i2c_traceevent(priv, I2CEVENT_EMPTY_MSG, 0);
+
+          /* Set condition to activate msg handling */
+
+          priv->dcnt = -1;
+
+          /* Restart ISR by setting an interrupt buffer bit */
+
+          stm32_i2c_modifyreg(priv, STM32_I2C_CR2_OFFSET, 0, I2C_CR2_ITBUFEN);
+        }
+    }
+
+  /* Address cleared event
+   *
+   * Check if the address cleared, i.e. the driver found a valid address.
+   * If a NACK was received the address is invalid, if an ACK was
+   * received the address is valid and transmission can continue.
+   */
+
+  /* Check for NACK after an address*/
+
+#ifndef CONFIG_I2C_POLLED
+  /* When polling the i2c ISR it's not possible to determine when
+   * an address has been ACKed(i.e. the address is valid).
+   *
+   * The mechanism to deal a NACKed address is to wait for the I2C
+   * call to timeout (value defined in defconfig by one of the
+   * following: CONFIG_STM32_I2C_DYNTIMEO, CONFIG_STM32_I2CTIMEOSEC,
+   * CONFIG_STM32_I2CTIMEOMS, CONFIG_STM32_I2CTIMEOTICKS).
+   *
+   * To be safe in the case of a timeout/NACKed address a stop bit
+   * is set on the bus to clear it. In POLLED operation it's done
+   * stm32_i2c_process() after the call to stm32_i2c_sem_waitdone().
+   *
+   * In ISR driven operation the stop bit in case of a NACKed address
+   * is set in the ISR itself.
+   *
+   * Note: this commentary is found in both places.
+   */
+
+  else if ((status & I2C_SR1_ADDR) == 0 && priv->check_addr_ACK)
+    {
+      i2cinfo("Invalid Address. Setting stop bit and clearing message\n");
+      i2cinfo("status %i\n", status);
+
+      /* Set condition to terminate msg chain transmission as address is invalid. */
+
+      priv->dcnt = -1;
+      priv->msgc = 0;
+
+      i2cinfo("dcnt %i , msgc %i\n", priv->dcnt, priv->msgc);
+
+      /* Reset flag to check for valid address */
+
+      priv->check_addr_ACK = false;
+
+      /* Send stop bit to clear bus */
+
+      stm32_i2c_sendstop(priv);
+
+      /* Trace event */
+
+      stm32_i2c_traceevent(priv, I2CEVENT_ADDRESS_NACKED, priv->msgv->addr);
+    }
+#endif
+
+    /* ACK in read mode, ACK in write mode is handled separately */
+
+  else if ((priv->flags & I2C_M_READ) != 0 && (status & I2C_SR1_ADDR) != 0 &&
+           priv->check_addr_ACK)
+    {
+      /* Reset check addr flag as we are handling this event */
+
+      priv->check_addr_ACK = false;
+
+      /* Enable RxNE and TxE buffers in order to receive one or multiple bytes */
+
+      stm32_i2c_modifyreg(priv, STM32_I2C_CR2_OFFSET, 0, I2C_CR2_ITBUFEN);
+
+      /* Note:
+       *
+       * When reading a single byte the stop condition has  to be set
+       * immediately after clearing the state flags, which happens
+       * when reading SR2(as SR1 has already been read).
+       *
+       * Similarly when reading 2 bytes the NACK bit has to be set as just
+       * after the clearing of the address.
+       */
+
+      if (priv->dcnt == 1 && priv->total_msg_len == 1)
+        {
+          /* this should only happen when receiving a message of length 1 */
+
+          i2cinfo("short read N=1: setting NACK\n");
+
+          /* Set POS bit to zero (can be up from a previous 2 byte receive) */
+
+          stm32_i2c_modifyreg(priv, STM32_I2C_CR1_OFFSET, I2C_CR1_POS, 0);
+
+          /* Immediately set NACK */
+
+          stm32_i2c_modifyreg(priv, STM32_I2C_CR1_OFFSET, I2C_CR1_ACK, 0);
+
+          /* Clear ADDR flag by reading SR2 and adding it to status */
+
+          status |= (stm32_i2c_getreg(priv, STM32_I2C_SR2_OFFSET) << 16);
+
+          /* Send Stop */
+
+          stm32_i2c_sendstop(priv);
+
+          i2cinfo("Address ACKed beginning data reception\n");
+          i2cinfo("short read N=1: programming stop bit\n");
+
+          /* Trace */
+
+          stm32_i2c_traceevent(priv, I2CEVENT_ADDRESS_ACKED_READ_1, 0);
+        }
+      else if (priv->dcnt == 2 && priv->total_msg_len == 2)
+        {
+          /* This should only happen when receiving a message of length 2 */
+
+          /* Set POS bit to zero (can be up from a previous 2 byte receive) */
+
+          stm32_i2c_modifyreg(priv, STM32_I2C_CR1_OFFSET, 0, I2C_CR1_POS);
+
+          /* Immediately set NACK */
+
+          stm32_i2c_modifyreg(priv, STM32_I2C_CR1_OFFSET, I2C_CR1_ACK, 0);
+
+          /* Clear ADDR flag by reading SR2 and adding it to status */
+
+          status |= (stm32_i2c_getreg(priv, STM32_I2C_SR2_OFFSET) << 16);
+
+          i2cinfo("Address ACKed beginning data reception\n");
+          i2cinfo("short read N=2: programming NACK\n");
+
+          /* Trace */
+
+          stm32_i2c_traceevent(priv, I2CEVENT_ADDRESS_ACKED_READ_2, 0);
+        }
+      else
+        {
+          i2cinfo("Address ACKed beginning data reception\n");
+
+          /* Clear ADDR flag by reading SR2 and adding it to status */
+
+          status |= (stm32_i2c_getreg(priv, STM32_I2C_SR2_OFFSET) << 16);
+
+          /* Trace */
+
+          stm32_i2c_traceevent(priv, I2CEVENT_ADDRESS_ACKED, 0);
+        }
+    }
+
+  /* Write mode
+   *
+   * Handles all write related I2C protocol logic. Also handles the
+   * ACK event after clearing the ADDR flag as the write has to
+   * begin immediately after.
+   */
+
+   else if ((priv->flags & (I2C_M_READ)) == 0 &&
+            (status & (I2C_SR1_ADDR | I2C_SR1_TXE)) != 0)
+    {
+      /* The has cleared(ADDR is set, ACK was received after the address)
+       * or the transmit buffer is empty flag has been set(TxE) then we can
+       * transmit the next byte.
+       */
+
+      i2cinfo("Entering write mode dcnt = %i msgc = %i\n",
+              priv->dcnt, priv->msgc);
+
+      /* Clear ADDR flag by reading SR2 and adding it to status */
+
+      status |= (stm32_i2c_getreg(priv, STM32_I2C_SR2_OFFSET) << 16);
+
+      /* Address has cleared so don't check on next call */
+
+      priv->check_addr_ACK = false;
+
+      /* Check if we have transmitted the whole message or we are after
+       * the last byte where the stop condition or else(according to the
+       * msg flags) has to be set.
+       */
+
+      if (priv->dcnt >= 1)
+        {
+          /* Transmitting message. Send byte == write data into write register */
+
+          stm32_i2c_putreg(priv, STM32_I2C_DR_OFFSET, *priv->ptr++);
+
+          /* Decrease current message length */
+
+          stm32_i2c_traceevent(priv, I2CEVENT_WRITE_TO_DR, priv->dcnt);
+          priv->dcnt--;
+
+        }
+      else if (priv->dcnt == 0)
+        {
+
+          /* After last byte, check what to do based on next message flags */
+
+          if (priv->msgc == 0)
+            {
+              /* If last message send stop bit */
+
+              stm32_i2c_sendstop(priv);
+              i2cinfo("Stop sent dcnt = %i msgc = %i\n", priv->dcnt, priv->msgc);
+
+              /* Decrease counter to get to next message */
+
+              priv->dcnt--;
+              i2cinfo("dcnt %i\n", priv->dcnt);
+              stm32_i2c_traceevent(priv, I2CEVENT_WRITE_STOP, priv->dcnt);
+            }
+
+          /* If there is a next message with no flags or the read flag
+           * a restart sequence has to be sent.
+           * Note msgv already points to the next message.
+           */
+
+          else if (priv->msgc > 0 &&
+                   (priv->msgv->flags == 0 || (priv->msgv[0].flags & I2C_M_READ) != 0))
+            {
+              /* ACK ISR (for some reason this is necessary even though the
+               * sendstart should clear the BTF).
+               */
+
+              stm32_i2c_getreg(priv, STM32_I2C_DR_OFFSET);
+
+              /* Send start */
+
+              stm32_i2c_sendstart(priv);
+
+              i2cinfo("Restart detected!\n");
+              i2cinfo("Nextflag %i\n", priv->msgv[0].flags);
+
+              /* Decrease counter to get to next message */
+
+              priv->dcnt--;
+              i2cinfo("dcnt %i\n", priv->dcnt);
+              stm32_i2c_traceevent(priv, I2CEVENT_WRITE_RESTART, priv->dcnt);
+            }
+
+          /* If there is a next message with the NO_RESTART flag
+           * do nothing.
+           */
+
+          else if (priv->msgc > 0 && ((priv->msgv->flags & I2C_M_NORESTART) != 0))
+            {
+              /* Set condition to get to next message */
+
+              priv->dcnt =- 1;
+              stm32_i2c_traceevent(priv, I2CEVENT_WRITE_NO_RESTART, priv->dcnt);
+            }
+          else
+            {
+              i2cinfo("Write mode: next message has an unrecognized flag.\n");
+              stm32_i2c_traceevent(priv, I2CEVENT_WRITE_FLAG_ERROR, priv->msgv->flags);
+            }
+        }
+      else
+        {
+          i2cerr("Write mode error.\n");
+          stm32_i2c_traceevent(priv, I2CEVENT_WRITE_ERROR, 0);
+        }
+    }
+
+  /* Read mode
+   *
+   * Handles all read related I2C protocol logic.
+   *
+   * * * * * * * WARNING STM32F1xx HARDWARE ERRATA * * * * * * *
+   * source: https://github.com/hikob/openlab/blob/master/drivers/stm32/i2c.c
+   *
+   * RXNE-only events should not be handled since it sometimes
+   * fails. Only BTF & RXNE events should be handled (with the
+   * consequence of slowing down the transfer).
+   *
+   * It seems that when a RXNE interrupt is handled 'around'
+   * the end of the next byte reception, the DR register read
+   * is ignored by the i2c controller: it does not flush the
+   * DR with next byte
+   *
+   * Thus we read twice the same byte and we read effectively
+   * read one byte less than expected from the i2c slave point
+   * of view.
+   *
+   * Example:
+   * + we want to receive 6 bytes (B1 to B6)
+   * + the problem appear when reading B3
+   * -> we read B1 B2 B3 B3 B4 B5(B3 twice)
+   * -> the i2c transfer was B1 B2 B3 B4 B5(B6 is not sent)
+   */
+
+  else if ((priv->flags & (I2C_M_READ)) != 0 && (status & I2C_SR1_RXNE) != 0)
+    {
+      /* When read flag is set and the receive buffer is not empty
+       *(RXNE is set) then the driver can read from the data register.
+       */
+
+      i2cinfo("Entering read mode dcnt = %i msgc = %i, status %i\n",
+              priv->dcnt, priv->msgc, status);
+
+      /* Implementation of method 2 for receiving data following
+       * the stm32f1xx reference manual.
+       */
+
+      /* Case total message length = 1 */
+
+      if (priv->dcnt == 1 && priv->total_msg_len == 1)
+        {
+          i2cinfo("short read N=1: Read data from data register(DR)\n");
+
+          *priv->ptr++ = stm32_i2c_getreg(priv, STM32_I2C_DR_OFFSET);
+          priv->dcnt = -1;
+          stm32_i2c_traceevent(priv, I2CEVENT_READ, 0);
+        }
+
+      /* Case total message length = 2 */
+
+      else if (priv->dcnt == 2 && priv->total_msg_len == 2 && !(status & I2C_SR1_BTF))
+        {
+          i2cinfo("short read N=2: DR full, SR empty. Waiting for more bytes.\n");
+          stm32_i2c_traceevent(priv, I2CEVENT_READ_SR_EMPTY, 0);
+        }
+      else if (priv->dcnt == 2 && priv->total_msg_len == 2 && (status & I2C_SR1_BTF))
+        {
+          i2cinfo("short read N=2: DR and SR full setting stop bit and reading twice\n");
+
+          stm32_i2c_sendstop(priv);
+          *priv->ptr++ = stm32_i2c_getreg(priv, STM32_I2C_DR_OFFSET);
+          priv->dcnt--;
+          *priv->ptr++ = stm32_i2c_getreg(priv, STM32_I2C_DR_OFFSET);
+          priv->dcnt--;
+
+          /* Stop request already programmed so set dcnt for next message */
+
+          priv->dcnt--;
+
+          /* Set trace */
+
+          stm32_i2c_traceevent(priv, I2CEVENT_READ_2, 0);
+        }
+
+      /* Case total message length >= 3 */
+
+      else if (priv->dcnt >= 4 && priv->total_msg_len >= 3)
+        {
+          /* Read data from data register(DR). Note this clears the
+           * RXNE(receive buffer not empty) flag.
+           */
+
+          i2cinfo("Read data from data register(DR)\n");
+          *priv->ptr++ = stm32_i2c_getreg(priv, STM32_I2C_DR_OFFSET);
+
+          /* Decrease current message length */
+
+          priv->dcnt--;
+          stm32_i2c_traceevent(priv, I2CEVENT_READ, 0);
+        }
+      else if (priv->dcnt == 3 && priv->total_msg_len >= 3 && !(status & I2C_SR1_BTF))
+        {
+          i2cinfo("short read N=3: DR full, SR empty. Waiting for more bytes.\n");
+          stm32_i2c_traceevent(priv, I2CEVENT_READ_SR_EMPTY, 0);
+        }
+      else if (priv->dcnt == 3 && (status & I2C_SR1_BTF) && priv->total_msg_len >= 3)
+        {
+          /* This means that we are reading dcnt 3 and there is already dcnt 2 in
+           * the shift register.
+           * This coincides with EV7_1 in the reference manual.
+           */
+
+          i2cinfo("Program NACK\n");
+          i2cinfo("Read data from data register(DR) dcnt=3\n");
+
+          stm32_i2c_traceevent(priv, I2CEVENT_READ_3, priv->dcnt);
+
+          /* Program NACK */
+
+          stm32_i2c_modifyreg(priv, STM32_I2C_CR1_OFFSET, I2C_CR1_ACK, 0);
+
+          /* Read dcnt = 3, to ensure a BTF event after having recieved
+           * in the shift register.
+           */
+
+          *priv->ptr++ = stm32_i2c_getreg(priv, STM32_I2C_DR_OFFSET);
+
+          /* Decrease current message length */
+
+          priv->dcnt--;
+        }
+      else if (priv->dcnt == 2 && priv->total_msg_len >= 3 && !(status & I2C_SR1_BTF))
+        {
+          i2cinfo("short read N=3: DR full, SR empty. Waiting for more bytes.\n");
+          stm32_i2c_traceevent(priv, I2CEVENT_READ_SR_EMPTY, 0);
+        }
+      else if (priv->dcnt == 2 && (status & I2C_SR1_BTF) && priv->total_msg_len >= 3)
+        {
+          i2cinfo("Program stop\n");
+          i2cinfo("Read data from data register(DR) dcnt=2\n");
+          i2cinfo("Read data from data register(SR) dcnt=1\n");
+          i2cinfo("Setting condition to stop ISR dcnt = -1\n");
+
+          stm32_i2c_traceevent(priv, I2CEVENT_READ_3, priv->dcnt);
+
+          /* Program stop */
+
+          stm32_i2c_sendstop(priv);
+
+          /* read dcnt = 2 */
+
+          *priv->ptr++ = stm32_i2c_getreg(priv, STM32_I2C_DR_OFFSET);
+
+          /* read last byte dcnt=1 */
+
+          *priv->ptr++ = stm32_i2c_getreg(priv, STM32_I2C_DR_OFFSET);
+
+          /* Stop already sent will not get another interrupt set
+           * condition to stop ISR
+           */
+
+          priv->dcnt = -1;
+        }
+
+      /* Error handling for read mode */
+
+      else
+        {
+          i2cinfo("I2C read mode no correct state detected\n");
+          i2cinfo(" state %i, dcnt=%i\n", status, priv->dcnt);
+
+          /* set condition to terminate ISR and wake waiting thread */
+          priv->dcnt = -1;
+          priv->msgc = 0;
+          stm32_i2c_traceevent(priv, I2CEVENT_READ_ERROR, 0);
+        }
+
+      /* Read rest of the state */
+
+      status |= (stm32_i2c_getreg(priv, STM32_I2C_SR2_OFFSET) << 16);
+    }
+
+  /* Empty call handler
+   *
+   * Case to handle an empty call to the ISR where it only has to
+   * Shutdown
+   */
+
+  else if (priv->dcnt == -1 && priv->msgc == 0)
+    {
+      /* Read rest of the state */
+
+      status |= (stm32_i2c_getreg(priv, STM32_I2C_SR2_OFFSET) << 16);
+      i2cinfo("Empty call to ISR: Stopping ISR\n");
+      stm32_i2c_traceevent(priv, I2CEVENT_ISR_EMPTY_CALL, 0);
+    }
+
+  /* Error handler
+   *
+   * Gets triggered if the driver does not recognize a situation(state)
+   * it can deal with.
+   * This should not happen in interrupt based operation(i.e. when
+   * CONFIG_I2C_POLLED is not set in the defconfig file).
+   * During polled operation(i.e. CONFIG_I2C_POLLED=y in defconfig)
+   * this case should do nothing but tracing the event that the
+   * device wasn't ready yet.
+   */
+
+   else
+    {
+    #ifdef CONFIG_I2C_POLLED
+      stm32_i2c_traceevent(priv, I2CEVENT_POLL_DEV_NOT_RDY, 0);
+    #else
+      /* Read rest of the state */
+
+      status |= (stm32_i2c_getreg(priv, STM32_I2C_SR2_OFFSET) << 16);
+
+      i2cinfo(" No correct state detected(start bit, read or write) \n");
+      i2cinfo(" state %i\n", status);
+
+      /* set condition to terminate ISR and wake waiting thread */
+
+      priv->dcnt = -1;
+      priv->msgc = 0;
+      stm32_i2c_traceevent(priv, I2CEVENT_STATE_ERROR, 0);
+    #endif
+    }
+
+  /* Messages handling(2/2)
+   *
+   * Transmission of the whole message chain has been completed. We have to
+   * terminate the ISR and wake up stm32_i2c_process() that is waiting for
+   * the ISR cycle to handle the sending/receiving of the messages.
+   */
+
+  if (priv->dcnt == -1 && priv->msgc == 0)
+    {
+      i2cinfo("Shutting down I2C ISR\n");
+
+      stm32_i2c_traceevent(priv, I2CEVENT_ISR_SHUTDOWN, 0);
+
+      /* Clear internal pointer to the message content.
+       * Good practice + done by last implementation when messages are finished
+       * (compatibility concerns)
+       */
+
+      priv->msgv = NULL;
+
+    #ifdef CONFIG_I2C_POLLED
+      priv->intstate = INTSTATE_DONE;
+    #else
+      /* Clear all interrupts */
+
+      uint32_t regval;
+      regval  = stm32_i2c_getreg(priv, STM32_I2C_CR2_OFFSET);
+      regval &= ~I2C_CR2_ALLINTS;
+      stm32_i2c_putreg(priv, STM32_I2C_CR2_OFFSET, regval);
+
+      /* Is there a thread waiting for this event(there should be) */
+
+      if (priv->intstate == INTSTATE_WAITING)
+        {
+          /* Yes.. inform the thread that the transfer is complete
+           * and wake it up.
+           */
+
+          sem_post(&priv->sem_isr);
+          priv->intstate = INTSTATE_DONE;
+        }
+    #endif
+    }
+
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32_i2c1_isr
+ *
+ * Description:
+ *   I2C1 interrupt service routine
+ *
+ ************************************************************************************/
+
+#ifndef CONFIG_I2C_POLLED
+#ifdef CONFIG_STM32_I2C1
+static int stm32_i2c1_isr(int irq, void *context, FAR void *arg)
+{
+  return stm32_i2c_isr(&stm32_i2c1_priv);
+}
+#endif
+
+/************************************************************************************
+ * Name: stm32_i2c2_isr
+ *
+ * Description:
+ *   I2C2 interrupt service routine
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32_I2C2
+static int stm32_i2c2_isr(int irq, void *context, FAR void *arg)
+{
+  return stm32_i2c_isr(&stm32_i2c2_priv);
+}
+#endif
+
+/************************************************************************************
+ * Name: stm32_i2c3_isr
+ *
+ * Description:
+ *   I2C2 interrupt service routine
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32_I2C3
+static int stm32_i2c3_isr(int irq, void *context, FAR void *arg)
+{
+  return stm32_i2c_isr(&stm32_i2c3_priv);
+}
+#endif
+#endif
+
+/************************************************************************************
+ * Private Initialization and Deinitialization
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_i2c_init
+ *
+ * Description:
+ *   Setup the I2C hardware, ready for operation with defaults
+ *
+ ************************************************************************************/
+
+static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv)
+{
+  /* Power-up and configure GPIOs */
+
+  /* Enable power and reset the peripheral */
+
+  modifyreg32(STM32_RCC_APB1ENR, 0, priv->config->clk_bit);
+  modifyreg32(STM32_RCC_APB1RSTR, 0, priv->config->reset_bit);
+  modifyreg32(STM32_RCC_APB1RSTR, priv->config->reset_bit, 0);
+
+  /* Configure pins */
+
+  if (stm32_configgpio(priv->config->scl_pin) < 0)
+    {
+      return ERROR;
+    }
+
+  if (stm32_configgpio(priv->config->sda_pin) < 0)
+    {
+      stm32_unconfiggpio(priv->config->scl_pin);
+      return ERROR;
+    }
+
+  /* Attach ISRs */
+
+#ifndef CONFIG_I2C_POLLED
+  irq_attach(priv->config->ev_irq, priv->config->isr, NULL);
+  irq_attach(priv->config->er_irq, priv->config->isr, NULL);
+  up_enable_irq(priv->config->ev_irq);
+  up_enable_irq(priv->config->er_irq);
+#endif
+
+  /* Set peripheral frequency, where it must be at least 2 MHz  for 100 kHz
+   * or 4 MHz for 400 kHz.  This also disables all I2C interrupts.
+   */
+
+  stm32_i2c_putreg(priv, STM32_I2C_CR2_OFFSET, (STM32_PCLK1_FREQUENCY / 1000000));
+
+  /* Force a frequency update */
+
+  priv->frequency = 0;
+
+  stm32_i2c_setclock(priv, 100000);
+
+  /* Enable I2C */
+
+  stm32_i2c_putreg(priv, STM32_I2C_CR1_OFFSET, I2C_CR1_PE);
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_deinit
+ *
+ * Description:
+ *   Shutdown the I2C hardware
+ *
+ ************************************************************************************/
+
+static int stm32_i2c_deinit(FAR struct stm32_i2c_priv_s *priv)
+{
+  /* Disable I2C */
+
+  stm32_i2c_putreg(priv, STM32_I2C_CR1_OFFSET, 0);
+
+  /* Unconfigure GPIO pins */
+
+  stm32_unconfiggpio(priv->config->scl_pin);
+  stm32_unconfiggpio(priv->config->sda_pin);
+
+  /* Disable and detach interrupts */
+
+#ifndef CONFIG_I2C_POLLED
+  up_disable_irq(priv->config->ev_irq);
+  up_disable_irq(priv->config->er_irq);
+  irq_detach(priv->config->ev_irq);
+  irq_detach(priv->config->er_irq);
+#endif
+
+  /* Disable clocking */
+
+  modifyreg32(STM32_RCC_APB1ENR, priv->config->clk_bit, 0);
+  return OK;
+}
+
+/************************************************************************************
+ * Device Driver Operations
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_i2c_transfer
+ *
+ * Description:
+ *   Generic I2C transfer function
+ *
+ ************************************************************************************/
+
+static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s *msgs,
+                              int count)
+{
+  FAR struct stm32_i2c_priv_s *priv = (struct stm32_i2c_priv_s *)dev;
+  stm32_i2c_sem_wait(priv);   /* Ensure that address or flags don't change meanwhile */
+  uint32_t status = 0;
+#ifdef I2C1_FSMC_CONFLICT
+  uint32_t ahbenr;
+#endif
+  int ret = 0;
+
+  ASSERT(count);
+
+#ifdef I2C1_FSMC_CONFLICT
+  /* Disable FSMC that shares a pin with I2C1 (LBAR) */
+
+  ahbenr = stm32_i2c_disablefsmc(priv);
+
+#else
+  /* Wait for any STOP in progress.  NOTE:  If we have to disable the FSMC
+   * then we cannot do this at the top of the loop, unfortunately.  The STOP
+   * will not complete normally if the FSMC is enabled.
+   */
+
+  stm32_i2c_sem_waitstop(priv);
+#endif
+
+  /* Clear any pending error interrupts */
+
+  stm32_i2c_putreg(priv, STM32_I2C_SR1_OFFSET, 0);
+
+  /* "Note: When the STOP, START or PEC bit is set, the software must
+   *  not perform any write access to I2C_CR1 before this bit is
+   *  cleared by hardware. Otherwise there is a risk of setting a
+   *  second STOP, START or PEC request."  However, if the bits are
+   *  not cleared by hardware, then we will have to do that from hardware.
+   */
+
+  stm32_i2c_clrstart(priv);
+
+  /* Old transfers are done */
+
+  /* Reset ptr and dcnt to ensure an unexpected data interrupt doesn't
+   * overwrite stale data.
+   */
+
+  priv->dcnt = 0;
+  priv->ptr = NULL;
+
+  priv->msgv = msgs;
+  priv->msgc = count;
+
+  /* Reset I2C trace logic */
+
+  stm32_i2c_tracereset(priv);
+
+  /* Set I2C clock frequency (on change it toggles I2C_CR1_PE !)
+   * REVISIT: Note that the frequency is set only on the first message.
+   * This could be extended to support different transfer frequencies for
+   * each message segment.
+   */
+
+  stm32_i2c_setclock(priv, msgs->frequency);
+
+  /* Trigger start condition, then the process moves into the ISR.  I2C
+   * interrupts will be enabled within stm32_i2c_waitdone().
+   */
+
+  priv->dcnt   = -1;
+  priv->status = 0;
+  stm32_i2c_sendstart(priv);
+
+  /* Wait for an ISR, if there was a timeout, fetch latest status to get
+   * the BUSY flag.
+   */
+
+  if (stm32_i2c_sem_waitdone(priv) < 0)
+    {
+      status = stm32_i2c_getstatus(priv);
+      ret = -ETIMEDOUT;
+
+      i2cerr("ERROR: Timed out: CR1: 0x%04x status: 0x%08x\n",
+             stm32_i2c_getreg(priv, STM32_I2C_CR1_OFFSET), status);
+
+      /* "Note: When the STOP, START or PEC bit is set, the software must
+       *  not perform any write access to I2C_CR1 before this bit is
+       *  cleared by hardware. Otherwise there is a risk of setting a
+       *  second STOP, START or PEC request."
+       */
+
+      stm32_i2c_clrstart(priv);
+
+      /* Clear busy flag in case of timeout */
+
+      status = priv->status & 0xffff;
+    }
+  else
+    {
+      /* clear SR2 (BUSY flag) as we've done successfully */
+
+      status = priv->status & 0xffff;
+    }
+
+  /* Check for error status conditions */
+
+  if ((status & I2C_SR1_ERRORMASK) != 0)
+    {
+      /* I2C_SR1_ERRORMASK is the 'OR' of the following individual bits: */
+
+      if (status & I2C_SR1_BERR)
+        {
+          /* Bus Error */
+
+          ret = -EIO;
+        }
+      else if (status & I2C_SR1_ARLO)
+        {
+          /* Arbitration Lost (master mode) */
+
+          ret = -EAGAIN;
+        }
+      else if (status & I2C_SR1_AF)
+        {
+          /* Acknowledge Failure */
+
+          ret = -ENXIO;
+        }
+      else if (status & I2C_SR1_OVR)
+        {
+          /* Overrun/Underrun */
+
+          ret = -EIO;
+        }
+      else if (status & I2C_SR1_PECERR)
+        {
+          /* PEC Error in reception */
+
+          ret = -EPROTO;
+        }
+      else if (status & I2C_SR1_TIMEOUT)
+        {
+          /* Timeout or Tlow Error */
+
+          ret = -ETIME;
+        }
+
+      /* This is not an error and should never happen since SMBus is not enabled */
+
+      else /* if (status & I2C_SR1_SMBALERT) */
+        {
+          /* SMBus alert is an optional signal with an interrupt line for devices
+           * that want to trade their ability to master for a pin.
+           */
+
+          ret = -EINTR;
+        }
+    }
+
+  /* This is not an error, but should not happen.  The BUSY signal can hang,
+   * however, if there are unhealthy devices on the bus that need to be reset.
+   * NOTE:  We will only see this busy indication if stm32_i2c_sem_waitdone()
+   * fails above;  Otherwise it is cleared.
+   */
+
+  else if ((status & (I2C_SR2_BUSY << 16)) != 0)
+    {
+      /* I2C Bus is for some reason busy */
+
+      ret = -EBUSY;
+    }
+
+  /* Dump the trace result */
+
+  stm32_i2c_tracedump(priv);
+
+#ifdef I2C1_FSMC_CONFLICT
+  /* Wait for any STOP in progress.  NOTE:  If we have to disable the FSMC
+   * then we cannot do this at the top of the loop, unfortunately.  The STOP
+   * will not complete normally if the FSMC is enabled.
+   */
+
+  stm32_i2c_sem_waitstop(priv);
+
+  /* Re-enable the FSMC */
+
+  stm32_i2c_enablefsmc(ahbenr);
+#endif
+
+  /* Ensure that any ISR happening after we finish can't overwrite any user data */
+
+  priv->dcnt = 0;
+  priv->ptr = NULL;
+
+  stm32_i2c_sem_post(priv);
+  return ret;
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_reset
+ *
+ * Description:
+ *   Perform an I2C bus reset in an attempt to break loose stuck I2C devices.
+ *
+ * Input Parameters:
+ *   dev   - Device-specific state data
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_I2C_RESET
+static int stm32_i2c_reset(FAR struct i2c_master_s *dev)
+{
+  FAR struct stm32_i2c_priv_s *priv = (struct stm32_i2c_priv_s *)dev;
+  unsigned int clock_count;
+  unsigned int stretch_count;
+  uint32_t scl_gpio;
+  uint32_t sda_gpio;
+  uint32_t frequency;
+  int ret = ERROR;
+
+  ASSERT(dev);
+
+  /* Our caller must own a ref */
+
+  ASSERT(priv->refs > 0);
+
+  /* Lock out other clients */
+
+  stm32_i2c_sem_wait(priv);
+
+  /* Save the current frequency */
+
+  frequency = priv->frequency;
+
+  /* De-init the port */
+
+  stm32_i2c_deinit(priv);
+
+  /* Use GPIO configuration to un-wedge the bus */
+
+  scl_gpio = MKI2C_OUTPUT(priv->config->scl_pin);
+  sda_gpio = MKI2C_OUTPUT(priv->config->sda_pin);
+
+  stm32_configgpio(scl_gpio);
+  stm32_configgpio(sda_gpio);
+
+  /* Let SDA go high */
+
+  stm32_gpiowrite(sda_gpio, 1);
+
+  /* Clock the bus until any slaves currently driving it let it go. */
+
+  clock_count = 0;
+  while (!stm32_gpioread(sda_gpio))
+    {
+      /* Give up if we have tried too hard */
+
+      if (clock_count++ > 10)
+        {
+          goto out;
+        }
+
+      /* Sniff to make sure that clock stretching has finished.
+       *
+       * If the bus never relaxes, the reset has failed.
+       */
+
+      stretch_count = 0;
+      while (!stm32_gpioread(scl_gpio))
+        {
+          /* Give up if we have tried too hard */
+
+          if (stretch_count++ > 10)
+            {
+              goto out;
+            }
+
+          up_udelay(10);
+        }
+
+      /* Drive SCL low */
+
+      stm32_gpiowrite(scl_gpio, 0);
+      up_udelay(10);
+
+      /* Drive SCL high again */
+
+      stm32_gpiowrite(scl_gpio, 1);
+      up_udelay(10);
+    }
+
+  /* Generate a start followed by a stop to reset slave
+   * state machines.
+   */
+
+  stm32_gpiowrite(sda_gpio, 0);
+  up_udelay(10);
+  stm32_gpiowrite(scl_gpio, 0);
+  up_udelay(10);
+  stm32_gpiowrite(scl_gpio, 1);
+  up_udelay(10);
+  stm32_gpiowrite(sda_gpio, 1);
+  up_udelay(10);
+
+  /* Revert the GPIO configuration. */
+
+  stm32_unconfiggpio(sda_gpio);
+  stm32_unconfiggpio(scl_gpio);
+
+  /* Re-init the port */
+
+  stm32_i2c_init(priv);
+
+  /* Restore the frequency */
+
+  stm32_i2c_setclock(priv, frequency);
+  ret = OK;
+
+out:
+
+  /* Release the port for re-use by other clients */
+
+  stm32_i2c_sem_post(priv);
+  return ret;
+}
+#endif /* CONFIG_I2C_RESET */
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_i2cbus_initialize
+ *
+ * Description:
+ *   Initialize one I2C bus
+ *
+ ************************************************************************************/
+
+FAR struct i2c_master_s *stm32_i2cbus_initialize(int port)
+{
+  struct stm32_i2c_priv_s * priv = NULL;
+  irqstate_t flags;
+
+#if STM32_PCLK1_FREQUENCY < 4000000
+#   warning STM32_I2C_INIT: Peripheral clock must be at least 4 MHz to support 400 kHz operation.
+#endif
+
+#if STM32_PCLK1_FREQUENCY < 2000000
+#   warning STM32_I2C_INIT: Peripheral clock must be at least 2 MHz to support 100 kHz operation.
+  return NULL;
+#endif
+
+  /* Get I2C private structure */
+
+  switch (port)
+    {
+#ifdef CONFIG_STM32_I2C1
+    case 1:
+      priv = (struct stm32_i2c_priv_s *)&stm32_i2c1_priv;
+      break;
+#endif
+#ifdef CONFIG_STM32_I2C2
+    case 2:
+      priv = (struct stm32_i2c_priv_s *)&stm32_i2c2_priv;
+      break;
+#endif
+#ifdef CONFIG_STM32_I2C3
+    case 3:
+      priv = (struct stm32_i2c_priv_s *)&stm32_i2c3_priv;
+      break;
+#endif
+    default:
+      return NULL;
+    }
+
+  /* Initialize private data for the first time, increment reference count,
+   * power-up hardware and configure GPIOs.
+   */
+
+  flags = enter_critical_section();
+
+  if ((volatile int)priv->refs++ == 0)
+    {
+      stm32_i2c_sem_init(priv);
+      stm32_i2c_init(priv);
+    }
+
+  leave_critical_section(flags);
+  return (struct i2c_master_s *)priv;
+}
+
+/************************************************************************************
+ * Name: stm32_i2cbus_uninitialize
+ *
+ * Description:
+ *   Uninitialize an I2C bus
+ *
+ ************************************************************************************/
+
+int stm32_i2cbus_uninitialize(FAR struct i2c_master_s *dev)
+{
+  FAR struct stm32_i2c_priv_s *priv = (struct stm32_i2c_priv_s *)dev;
+  irqstate_t flags;
+
+  ASSERT(dev);
+
+  /* Decrement reference count and check for underflow */
+
+  if (priv->refs == 0)
+    {
+      return ERROR;
+    }
+
+  flags = enter_critical_section();
+
+  if (--priv->refs)
+    {
+      leave_critical_section(flags);
+      return OK;
+    }
+
+  leave_critical_section(flags);
+
+  /* Disable power and other HW resource (GPIO's) */
+
+  stm32_i2c_deinit(priv);
+
+  /* Release unused resources */
+
+  stm32_i2c_sem_destroy(priv);
+  return OK;
+}
+
+#endif /* CONFIG_STM32_STM32F10XX || CONFIG_STM32_STM32F20XX || CONFIG_STM32_STM32F40XX */
+#endif /* CONFIG_STM32_I2C1 || CONFIG_STM32_I2C2 || CONFIG_STM32_I2C3 */
diff --git a/arch/arm/src/stm32/stm32f40xxx_rcc.c b/arch/arm/src/stm32/stm32f40xxx_rcc.c
index d431ce6df7a886fb4465328d22b185fe6cd2642b..adda863ccaee96969f0ad2c8936bc77007e3cb8a 100644
--- a/arch/arm/src/stm32/stm32f40xxx_rcc.c
+++ b/arch/arm/src/stm32/stm32f40xxx_rcc.c
@@ -95,10 +95,10 @@ static inline void rcc_reset(void)
 
   putreg32(0x00000000, STM32_RCC_CFGR);
 
-  /* Reset HSION, HSEON, CSSON and PLLON bits */
+  /* Reset HSEON, CSSON and PLLON bits */
 
   regval  = getreg32(STM32_RCC_CR);
-  regval &= ~(RCC_CR_HSION | RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_PLLON);
+  regval &= ~(RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_PLLON);
   putreg32(regval, STM32_RCC_CR);
 
   /* Reset PLLCFGR register to reset default */
@@ -619,11 +619,6 @@ static void stm32_stdclockconfig(void)
   volatile int32_t timeout;
 
 #ifdef STM32_BOARD_USEHSI
-  /* Enable Internal High-Speed Clock (HSI) */
-
-  regval  = getreg32(STM32_RCC_CR);
-  regval |= RCC_CR_HSION;           /* Enable HSI */
-  putreg32(regval, STM32_RCC_CR);
 
   /* Wait until the HSI is ready (or until a timeout elapsed) */
 
@@ -725,7 +720,7 @@ static void stm32_stdclockconfig(void)
 #else /* if STM32_BOARD_USEHSE */
                 | RCC_PLLCFG_PLLSRC_HSE
 #endif
-#if defined(CONFIG_STM32_STM32F446)
+#if defined(STM32_PLLCFG_PLLR)
                 | STM32_PLLCFG_PLLR
 #endif
                 );
@@ -743,7 +738,9 @@ static void stm32_stdclockconfig(void)
         {
         }
 
-#if defined(CONFIG_STM32_STM32F429) || defined(CONFIG_STM32_STM32F446)
+#if defined(CONFIG_STM32_STM32F429) || defined(CONFIG_STM32_STM32F446) || \
+    defined(CONFIG_STM32_STM32F469)
+
       /* Enable the Over-drive to extend the clock frequency to 180 Mhz */
 
       regval  = getreg32(STM32_PWR_CR);
@@ -783,12 +780,12 @@ static void stm32_stdclockconfig(void)
         {
         }
 
-#if defined(CONFIG_STM32_LTDC) || \
-    (defined(CONFIG_STM32_STM32F446) && defined(CONFIG_STM32_SAIPLL))
+#if defined(CONFIG_STM32_LTDC) || defined(CONFIG_STM32_SAIPLL)
+
       /* Configure PLLSAI */
 
       regval  = getreg32(STM32_RCC_PLLSAICFGR);
-#if defined(CONFIG_STM32_STM32F446)
+#  if defined(CONFIG_STM32_STM32F446)
       regval &= ~(RCC_PLLSAICFGR_PLLSAIM_MASK
                   | RCC_PLLSAICFGR_PLLSAIN_MASK
                   | RCC_PLLSAICFGR_PLLSAIP_MASK
@@ -797,35 +794,64 @@ static void stm32_stdclockconfig(void)
                  | STM32_RCC_PLLSAICFGR_PLLSAIN
                  | STM32_RCC_PLLSAICFGR_PLLSAIP
                  | STM32_RCC_PLLSAICFGR_PLLSAIQ);
-#else
+#  elif defined(CONFIG_STM32_STM32F469)
       regval &= ~(RCC_PLLSAICFGR_PLLSAIN_MASK
-                 | RCC_PLLSAICFGR_PLLSAIR_MASK
-                 | RCC_PLLSAICFGR_PLLSAIQ_MASK);
+                 | RCC_PLLSAICFGR_PLLSAIP_MASK
+                 | RCC_PLLSAICFGR_PLLSAIQ_MASK
+                 | RCC_PLLSAICFGR_PLLSAIR_MASK);
       regval |= (STM32_RCC_PLLSAICFGR_PLLSAIN
-                | STM32_RCC_PLLSAICFGR_PLLSAIR
-                | STM32_RCC_PLLSAICFGR_PLLSAIQ);
-#endif
+                | STM32_RCC_PLLSAICFGR_PLLSAIP
+                | STM32_RCC_PLLSAICFGR_PLLSAIQ
+                | STM32_RCC_PLLSAICFGR_PLLSAIR);
+#  else
+      regval &= ~(RCC_PLLSAICFGR_PLLSAIN_MASK
+                 | RCC_PLLSAICFGR_PLLSAIQ_MASK
+                 | RCC_PLLSAICFGR_PLLSAIR_MASK);
+      regval |= (STM32_RCC_PLLSAICFGR_PLLSAIN
+                | STM32_RCC_PLLSAICFGR_PLLSAIQ
+                | STM32_RCC_PLLSAICFGR_PLLSAIR);
+#  endif
       putreg32(regval, STM32_RCC_PLLSAICFGR);
 
       regval  = getreg32(STM32_RCC_DCKCFGR);
-#if defined(CONFIG_STM32_STM32F446)
+#  if defined(CONFIG_STM32_STM32F446)
       regval &= ~(RCC_DCKCFGR_PLLI2SDIVQ_MASK
-                  | RCC_DCKCFGR_PLLSAIDIVQ_MASK
-                  | RCC_DCKCFGR_SAI1SRC_MASK
-                  | RCC_DCKCFGR_SAI2SRC_MASK
-                  | RCC_DCKCFGR_I2S1SRC_MASK
-                  | RCC_DCKCFGR_I2S2SRC_MASK);
+                 | RCC_DCKCFGR_PLLSAIDIVQ_MASK
+                 | RCC_DCKCFGR_SAI1SRC_MASK
+                 | RCC_DCKCFGR_SAI2SRC_MASK
+                 | RCC_DCKCFGR_TIMPRE
+                 | RCC_DCKCFGR_I2S1SRC_MASK
+                 | RCC_DCKCFGR_I2S2SRC_MASK);
       regval |= (STM32_RCC_DCKCFGR_PLLI2SDIVQ
-                 | STM32_RCC_DCKCFGR_PLLSAIDIVQ
-                 | STM32_RCC_DCKCFGR_SAI1SRC
-                 | STM32_RCC_DCKCFGR_SAI2SRC
-                 | STM32_RCC_DCKCFGR_TIMPRE
-                 | STM32_RCC_DCKCFGR_I2S1SRC
-                 | STM32_RCC_DCKCFGR_I2S2SRC);
-#else
+                | STM32_RCC_DCKCFGR_PLLSAIDIVQ
+                | STM32_RCC_DCKCFGR_SAI1SRC
+                | STM32_RCC_DCKCFGR_SAI2SRC
+                | STM32_RCC_DCKCFGR_TIMPRE
+                | STM32_RCC_DCKCFGR_I2S1SRC
+                | STM32_RCC_DCKCFGR_I2S2SRC);
+#  elif defined(CONFIG_STM32_STM32F469)
+      regval &= ~(RCC_DCKCFGR_PLLI2SDIVQ_MASK
+                 | RCC_DCKCFGR_PLLSAIDIVQ_MASK
+                 | RCC_DCKCFGR_PLLSAIDIVR_MASK
+                 | RCC_DCKCFGR_SAI1ASRC_MASK
+                 | RCC_DCKCFGR_SAI1BSRC_MASK
+                 | RCC_DCKCFGR_TIMPRE
+                 | RCC_DCKCFGR_48MSEL_MASK
+                 | RCC_DCKCFGR_SDMMCSEL_MASK
+                 | RCC_DCKCFGR_DSISEL_MASK);
+      regval |= (STM32_RCC_DCKCFGR_PLLI2SDIVQ
+                | STM32_RCC_DCKCFGR_PLLSAIDIVQ
+                | STM32_RCC_DCKCFGR_PLLSAIDIVR
+                | STM32_RCC_DCKCFGR_SAI1ASRC
+                | STM32_RCC_DCKCFGR_SAI1BSRC
+                | STM32_RCC_DCKCFGR_TIMPRE
+                | STM32_RCC_DCKCFGR_48MSEL
+                | STM32_RCC_DCKCFGR_SDMMCSEL
+                | STM32_RCC_DCKCFGR_DSISEL);
+#  else
       regval &= ~RCC_DCKCFGR_PLLSAIDIVR_MASK;
       regval |= STM32_RCC_DCKCFGR_PLLSAIDIVR;
-#endif
+#  endif
       putreg32(regval, STM32_RCC_DCKCFGR);
 
       /* Enable PLLSAI */
@@ -841,34 +867,54 @@ static void stm32_stdclockconfig(void)
         }
 #endif
 
-#if defined(CONFIG_STM32_STM32F446) && defined(CONFIG_STM32_I2SPLL)
+#if defined(CONFIG_STM32_I2SPLL)
+
       /* Configure PLLI2S */
 
       regval  = getreg32(STM32_RCC_PLLI2SCFGR);
+
+#  if defined(CONFIG_STM32_STM32F446)
+
       regval &= ~(RCC_PLLI2SCFGR_PLLI2SM_MASK
-                  | RCC_PLLI2SCFGR_PLLI2SN_MASK
-                  | RCC_PLLI2SCFGR_PLLI2SP_MASK
-                  | RCC_PLLI2SCFGR_PLLI2SQ_MASK);
+                 | RCC_PLLI2SCFGR_PLLI2SN_MASK
+                 | RCC_PLLI2SCFGR_PLLI2SP_MASK
+                 | RCC_PLLI2SCFGR_PLLI2SQ_MASK
+                 | RCC_PLLI2SCFGR_PLLI2SR_MASK);
       regval |= (STM32_RCC_PLLI2SCFGR_PLLI2SM
-                 | STM32_RCC_PLLI2SCFGR_PLLI2SN
-                 | STM32_RCC_PLLI2SCFGR_PLLI2SP
-                 | STM32_RCC_PLLI2SCFGR_PLLI2SQ
-                 | STM32_RCC_PLLI2SCFGR_PLLI2SR);
+                | STM32_RCC_PLLI2SCFGR_PLLI2SN
+                | STM32_RCC_PLLI2SCFGR_PLLI2SP
+                | STM32_RCC_PLLI2SCFGR_PLLI2SQ
+                | STM32_RCC_PLLI2SCFGR_PLLI2SR);
+
+#  elif defined(CONFIG_STM32_STM32F469)
+
+      regval &= ~(RCC_PLLI2SCFGR_PLLI2SN_MASK
+                 | RCC_PLLI2SCFGR_PLLI2SQ_MASK
+                 | RCC_PLLI2SCFGR_PLLI2SR_MASK);
+      regval |= (STM32_RCC_PLLI2SCFGR_PLLI2SN
+                | STM32_RCC_PLLI2SCFGR_PLLI2SQ
+                | STM32_RCC_PLLI2SCFGR_PLLI2SR);
+#  endif
+
       putreg32(regval, STM32_RCC_PLLI2SCFGR);
 
+#  if defined(STM32_RCC_DCKCFGR2)
+
       regval  = getreg32(STM32_RCC_DCKCFGR2);
+
       regval &= ~(RCC_DCKCFGR2_FMPI2C1SEL_MASK
-                  | RCC_DCKCFGR2_CECSEL_MASK
-                  | RCC_DCKCFGR2_CK48MSEL_MASK
-                  | RCC_DCKCFGR2_SDIOSEL_MASK
-                  | RCC_DCKCFGR2_SPDIFRXSEL_MASK);
+                 | RCC_DCKCFGR2_CECSEL_MASK
+                 | RCC_DCKCFGR2_CK48MSEL_MASK
+                 | RCC_DCKCFGR2_SDIOSEL_MASK
+                 | RCC_DCKCFGR2_SPDIFRXSEL_MASK);
       regval |= (STM32_RCC_DCKCFGR2_FMPI2C1SEL
-                 | STM32_RCC_DCKCFGR2_CECSEL
-                 | STM32_RCC_DCKCFGR2_CK48MSEL
-                 | STM32_RCC_DCKCFGR2_SDIOSEL
-                 | STM32_RCC_DCKCFGR2_SPDIFRXSEL);
+                | STM32_RCC_DCKCFGR2_CECSEL
+                | STM32_RCC_DCKCFGR2_CK48MSEL
+                | STM32_RCC_DCKCFGR2_SDIOSEL
+                | STM32_RCC_DCKCFGR2_SPDIFRXSEL);
 
       putreg32(regval, STM32_RCC_DCKCFGR2);
+#  endif
 
       /* Enable PLLI2S */
 
@@ -911,7 +957,7 @@ static void stm32_stdclockconfig(void)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_SYSLOG) && defined(CONFIG_ARMV7M_ITMSYSLOG)
+#ifdef CONFIG_ARMV7M_ITMSYSLOG
 static inline void rcc_itm_syslog(void)
 {
   /* Enable SWO output */
@@ -919,7 +965,6 @@ static inline void rcc_itm_syslog(void)
   modifyreg32(STM32_DBGMCU_CR, DBGMCU_CR_TRACEMODE_MASK, DBGMCU_CR_ASYNCH |
               DBGMCU_CR_TRACEIOEN);
 
-  itm_syslog_initialize();
 }
 #else
 #  define rcc_itm_syslog()
diff --git a/arch/arm/src/stm32/stm32f40xxx_rtcc.c b/arch/arm/src/stm32/stm32f40xxx_rtcc.c
index a1f46513ef415ddca6b8b038867c2ab29e0d4f8b..4e8cfc773be597c0450b439fb7d83ab061d13c0a 100644
--- a/arch/arm/src/stm32/stm32f40xxx_rtcc.c
+++ b/arch/arm/src/stm32/stm32f40xxx_rtcc.c
@@ -1,7 +1,7 @@
-/************************************************************************************
+/****************************************************************************
  * arch/arm/src/stm32/stm32f40xxx_rtcc.c
  *
- *   Copyright (C) 2012-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *   Modified: Neil Hancock
  *
@@ -32,11 +32,13 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ************************************************************************************/
+ ****************************************************************************/
 
-/************************************************************************************
+/****************************************************************************
  * Included Files
- ************************************************************************************/
+ ****************************************************************************/
+
+#include 
 
 #include 
 #include 
@@ -58,10 +60,11 @@
 
 #ifdef CONFIG_RTC
 
-/************************************************************************************
+/****************************************************************************
  * Pre-processor Definitions
- ************************************************************************************/
-/* Configuration ********************************************************************/
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
 /* This RTC implementation supports
  *  - date/time RTC hardware
  *  - extended functions Alarm A and B for STM32F4xx and onwards
@@ -79,26 +82,12 @@
 #  error "CONFIG_STM32_PWR must selected to use this driver"
 #endif
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_RTC
-#endif
-
-#if !defined(CONFIG_RTC_MAGIC)
-# define CONFIG_RTC_MAGIC (0xfacefeee)
-#endif
-
-#if !defined(CONFIG_RTC_MAGIC_REG)
-# define CONFIG_RTC_MAGIC_REG (0)
-#endif
-
-/* Constants ************************************************************************/
+/* Constants ****************************************************************/
 
 #define SYNCHRO_TIMEOUT      (0x00020000)
 #define INITMODE_TIMEOUT     (0x00010000)
-#define RTC_MAGIC            CONFIG_RTC_MAGIC
-#define RTC_MAGIC_REG        STM32_RTC_BKR(CONFIG_RTC_MAGIC_REG)
 
-/* Proxy definitions to make the same code work for all the STM32 series ************/
+/* Proxy definitions to make the same code work for all the STM32 series ****/
 
 # define STM32_RCC_XXX       STM32_RCC_BDCR
 # define RCC_XXX_YYYRST      RCC_BDCR_BDRST
@@ -113,10 +102,6 @@
 #define MINUTES_IN_HOUR 60
 #define HOURS_IN_DAY 24
 
-/* Can't exceed 24hours-2min without providing extra logic for carry over for day. */
-
-#define MAX_RTC_ALARM_REL_MINUTES (24*MINUTES_IN_HOUR)-2
-
 #define hours_add(parm_hrs) \
   time->tm_hour += parm_hrs;\
   if ((HOURS_IN_DAY-1) < (time->tm_hour))\
@@ -129,23 +114,9 @@
 #define RTC_ALRMR_DIS_DATE_MASK       (RTC_ALRMR_MSK4)
 #define RTC_ALRMR_ENABLE              (0)
 
-/* Debug ****************************************************************************/
-
-#ifdef CONFIG_DEBUG_RTC
-#  define rtcdbg             dbg
-#  define rtcvdbg            vdbg
-#  define rtclldbg           lldbg
-#  define rtcllvdbg          llvdbg
-#else
-#  define rtcdbg(x...)
-#  define rtcvdbg(x...)
-#  define rtclldbg(x...)
-#  define rtcllvdbg(x...)
-#endif
-
-/************************************************************************************
+/****************************************************************************
  * Private Types
- ************************************************************************************/
+ ****************************************************************************/
 
 #ifdef CONFIG_RTC_ALARM
 typedef unsigned int rtc_alarmreg_t;
@@ -157,40 +128,44 @@ struct alm_cbinfo_s
 };
 #endif
 
-/************************************************************************************
+/****************************************************************************
  * Private Data
- ************************************************************************************/
+ ****************************************************************************/
 
 #ifdef CONFIG_RTC_ALARM
 /* Callback to use when an EXTI is activated  */
 
 static struct alm_cbinfo_s g_alarmcb[RTC_ALARM_LAST];
+static bool g_alarm_enabled;  /* True: Alarm interrupts are enabled */
 #endif
 
-/************************************************************************************
+/****************************************************************************
  * Public Data
- ************************************************************************************/
+ ****************************************************************************/
 
 /* g_rtc_enabled is set true after the RTC has successfully initialized */
 
 volatile bool g_rtc_enabled = false;
 
-/************************************************************************************
+/****************************************************************************
  * Private Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
 
 #ifdef CONFIG_RTC_ALARM
 static int rtchw_check_alrawf(void);
-static int rtchw_check_alrbwf(void);
 static int rtchw_set_alrmar(rtc_alarmreg_t alarmreg);
+#if CONFIG_RTC_NALARMS > 1
+static int rtchw_check_alrbwf(void);
 static int rtchw_set_alrmbr(rtc_alarmreg_t alarmreg);
 #endif
+static inline void rtc_enable_alarm(void);
+#endif
 
-/************************************************************************************
+/****************************************************************************
  * Private Functions
- ************************************************************************************/
+ ****************************************************************************/
 
-/************************************************************************************
+/****************************************************************************
  * Name: rtc_dumpregs
  *
  * Description:
@@ -202,47 +177,44 @@ static int rtchw_set_alrmbr(rtc_alarmreg_t alarmreg);
  * Returned Value:
  *   None
  *
- ************************************************************************************/
+ ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_RTC
+#ifdef CONFIG_DEBUG_RTC_INFO
 static void rtc_dumpregs(FAR const char *msg)
 {
   int rtc_state;
 
-  rtclldbg("%s:\n", msg);
-  rtclldbg("      TR: %08x\n", getreg32(STM32_RTC_TR));
-  rtclldbg("      DR: %08x\n", getreg32(STM32_RTC_DR));
-  rtclldbg("      CR: %08x\n", getreg32(STM32_RTC_CR));
-  rtclldbg("     ISR: %08x\n", getreg32(STM32_RTC_ISR));
-  rtclldbg("    PRER: %08x\n", getreg32(STM32_RTC_PRER));
-  rtclldbg("    WUTR: %08x\n", getreg32(STM32_RTC_WUTR));
-#ifndef CONFIG_STM32_STM32F30XX
-  rtclldbg("  CALIBR: %08x\n", getreg32(STM32_RTC_CALIBR));
-#endif
-  rtclldbg("  ALRMAR: %08x\n", getreg32(STM32_RTC_ALRMAR));
-  rtclldbg("  ALRMBR: %08x\n", getreg32(STM32_RTC_ALRMBR));
-  rtclldbg("  SHIFTR: %08x\n", getreg32(STM32_RTC_SHIFTR));
-  rtclldbg("    TSTR: %08x\n", getreg32(STM32_RTC_TSTR));
-  rtclldbg("    TSDR: %08x\n", getreg32(STM32_RTC_TSDR));
-  rtclldbg("   TSSSR: %08x\n", getreg32(STM32_RTC_TSSSR));
-  rtclldbg("    CALR: %08x\n", getreg32(STM32_RTC_CALR));
-  rtclldbg("   TAFCR: %08x\n", getreg32(STM32_RTC_TAFCR));
-  rtclldbg("ALRMASSR: %08x\n", getreg32(STM32_RTC_ALRMASSR));
-  rtclldbg("ALRMBSSR: %08x\n", getreg32(STM32_RTC_ALRMBSSR));
-  rtclldbg("MAGICREG: %08x\n", getreg32(RTC_MAGIC_REG));
+  rtcinfo("%s:\n", msg);
+  rtcinfo("      TR: %08x\n", getreg32(STM32_RTC_TR));
+  rtcinfo("      DR: %08x\n", getreg32(STM32_RTC_DR));
+  rtcinfo("      CR: %08x\n", getreg32(STM32_RTC_CR));
+  rtcinfo("     ISR: %08x\n", getreg32(STM32_RTC_ISR));
+  rtcinfo("    PRER: %08x\n", getreg32(STM32_RTC_PRER));
+  rtcinfo("    WUTR: %08x\n", getreg32(STM32_RTC_WUTR));
+  rtcinfo("  ALRMAR: %08x\n", getreg32(STM32_RTC_ALRMAR));
+  rtcinfo("  ALRMBR: %08x\n", getreg32(STM32_RTC_ALRMBR));
+  rtcinfo("  SHIFTR: %08x\n", getreg32(STM32_RTC_SHIFTR));
+  rtcinfo("    TSTR: %08x\n", getreg32(STM32_RTC_TSTR));
+  rtcinfo("    TSDR: %08x\n", getreg32(STM32_RTC_TSDR));
+  rtcinfo("   TSSSR: %08x\n", getreg32(STM32_RTC_TSSSR));
+  rtcinfo("    CALR: %08x\n", getreg32(STM32_RTC_CALR));
+  rtcinfo("   TAFCR: %08x\n", getreg32(STM32_RTC_TAFCR));
+  rtcinfo("ALRMASSR: %08x\n", getreg32(STM32_RTC_ALRMASSR));
+  rtcinfo("ALRMBSSR: %08x\n", getreg32(STM32_RTC_ALRMBSSR));
+  rtcinfo("MAGICREG: %08x\n", getreg32(RTC_MAGIC_REG));
 
   rtc_state =
     ((getreg32(STM32_EXTI_RTSR) & EXTI_RTC_ALARM) ? 0x1000 : 0) |
     ((getreg32(STM32_EXTI_FTSR) & EXTI_RTC_ALARM) ? 0x0100 : 0) |
     ((getreg32(STM32_EXTI_IMR)  & EXTI_RTC_ALARM) ? 0x0010 : 0) |
     ((getreg32(STM32_EXTI_EMR)  & EXTI_RTC_ALARM) ? 0x0001 : 0);
-  rtclldbg("EXTI (RTSR FTSR ISR EVT): %01x\n",rtc_state);
+  rtcinfo("EXTI (RTSR FTSR ISR EVT): %01x\n",rtc_state);
 }
 #else
 #  define rtc_dumpregs(msg)
 #endif
 
-/************************************************************************************
+/****************************************************************************
  * Name: rtc_dumptime
  *
  * Description:
@@ -254,24 +226,24 @@ static void rtc_dumpregs(FAR const char *msg)
  * Returned Value:
  *   None
  *
- ************************************************************************************/
+ ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_RTC
+#ifdef CONFIG_DEBUG_RTC_INFO
 static void rtc_dumptime(FAR const struct tm *tp, FAR const char *msg)
 {
-  rtclldbg("%s:\n", msg);
-  rtclldbg("  tm_sec: %08x\n", tp->tm_sec);
-  rtclldbg("  tm_min: %08x\n", tp->tm_min);
-  rtclldbg(" tm_hour: %08x\n", tp->tm_hour);
-  rtclldbg(" tm_mday: %08x\n", tp->tm_mday);
-  rtclldbg("  tm_mon: %08x\n", tp->tm_mon);
-  rtclldbg(" tm_year: %08x\n", tp->tm_year);
+  rtcinfo("%s:\n", msg);
+  rtcinfo("  tm_sec: %08x\n", tp->tm_sec);
+  rtcinfo("  tm_min: %08x\n", tp->tm_min);
+  rtcinfo(" tm_hour: %08x\n", tp->tm_hour);
+  rtcinfo(" tm_mday: %08x\n", tp->tm_mday);
+  rtcinfo("  tm_mon: %08x\n", tp->tm_mon);
+  rtcinfo(" tm_year: %08x\n", tp->tm_year);
 }
 #else
 #  define rtc_dumptime(tp, msg)
 #endif
 
-/************************************************************************************
+/****************************************************************************
  * Name: rtc_wprunlock
  *
  * Description:
@@ -283,7 +255,7 @@ static void rtc_dumptime(FAR const struct tm *tp, FAR const char *msg)
  * Returned Value:
  *   None
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 static void rtc_wprunlock(void)
 {
@@ -291,7 +263,7 @@ static void rtc_wprunlock(void)
    * registers and backup SRAM).
    */
 
-  (void)stm32_pwr_enablebkp(true);
+  stm32_pwr_enablebkp(true);
 
   /* The following steps are required to unlock the write protection on all the
    * RTC registers (except for RTC_ISR[13:8], RTC_TAFCR, and RTC_BKPxR).
@@ -306,7 +278,7 @@ static void rtc_wprunlock(void)
   putreg32(0x53, STM32_RTC_WPR);
 }
 
-/************************************************************************************
+/****************************************************************************
  * Name: rtc_wprlock
  *
  * Description:
@@ -318,7 +290,7 @@ static void rtc_wprunlock(void)
  * Returned Value:
  *   None
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 static inline void rtc_wprlock(void)
 {
@@ -326,14 +298,14 @@ static inline void rtc_wprlock(void)
 
   putreg32(0xff, STM32_RTC_WPR);
 
-  /* Disable write access to the backup domain (RTC registers, RTC backup data
-   * registers and backup SRAM).
+  /* Disable write access to the backup domain (RTC registers, RTC backup
+   * data registers and backup SRAM).
    */
 
-  (void)stm32_pwr_enablebkp(false);
+  stm32_pwr_enablebkp(false);
 }
 
-/************************************************************************************
+/****************************************************************************
  * Name: rtc_synchwait
  *
  * Description:
@@ -346,7 +318,7 @@ static inline void rtc_wprlock(void)
  * Returned Value:
  *   Zero (OK) on success; a negated errno on failure
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 static int rtc_synchwait(void)
 {
@@ -385,7 +357,7 @@ static int rtc_synchwait(void)
   return ret;
 }
 
-/************************************************************************************
+/****************************************************************************
  * Name: rtc_enterinit
  *
  * Description:
@@ -397,7 +369,7 @@ static int rtc_synchwait(void)
  * Returned Value:
  *   Zero (OK) on success; a negated errno on failure
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 static int rtc_enterinit(void)
 {
@@ -433,7 +405,7 @@ static int rtc_enterinit(void)
   return ret;
 }
 
-/************************************************************************************
+/****************************************************************************
  * Name: rtc_exitinit
  *
  * Description:
@@ -445,7 +417,7 @@ static int rtc_enterinit(void)
  * Returned Value:
  *   Zero (OK) on success; a negated errno on failure
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 static void rtc_exitinit(void)
 {
@@ -456,7 +428,7 @@ static void rtc_exitinit(void)
   putreg32(regval, STM32_RTC_ISR);
 }
 
-/************************************************************************************
+/****************************************************************************
  * Name: rtc_bin2bcd
  *
  * Description:
@@ -468,7 +440,7 @@ static void rtc_exitinit(void)
  * Returned Value:
  *   The value in BCD representation
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 static uint32_t rtc_bin2bcd(int value)
 {
@@ -483,7 +455,7 @@ static uint32_t rtc_bin2bcd(int value)
   return (msbcd << 4) | value;
 }
 
-/************************************************************************************
+/****************************************************************************
  * Name: rtc_bin2bcd
  *
  * Description:
@@ -495,7 +467,7 @@ static uint32_t rtc_bin2bcd(int value)
  * Returned Value:
  *   The value in binary representation
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 static int rtc_bcd2bin(uint32_t value)
 {
@@ -503,13 +475,13 @@ static int rtc_bcd2bin(uint32_t value)
   return (int)(tens + (value & 0x0f));
 }
 
-/************************************************************************************
+/****************************************************************************
  * Name: rtc_setup
  *
  * Description:
- *   Performs first time configuration of the RTC.  A special value written into
- *   back-up register 0 will prevent this function from being called on sub-sequent
- *   resets or power up.
+ *   Performs first time configuration of the RTC.  A special value written
+ *   into back-up register 0 will prevent this function from being called on
+ *   sub-sequent resets or power up.
  *
  * Input Parameters:
  *   None
@@ -517,7 +489,7 @@ static int rtc_bcd2bin(uint32_t value)
  * Returned Value:
  *   Zero (OK) on success; a negated errno on failure
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 static int rtc_setup(void)
 {
@@ -571,12 +543,12 @@ static int rtc_setup(void)
   return ret;
 }
 
-/************************************************************************************
+/****************************************************************************
  * Name: rtc_resume
  *
  * Description:
- *   Called when the RTC was already initialized on a previous power cycle.  This
- *   just brings the RTC back into full operation.
+ *   Called when the RTC was already initialized on a previous power cycle.
+ *   This just brings the RTC back into full operation.
  *
  * Input Parameters:
  *   None
@@ -584,7 +556,7 @@ static int rtc_setup(void)
  * Returned Value:
  *   Zero (OK) on success; a negated errno on failure
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 static void rtc_resume(void)
 {
@@ -603,7 +575,7 @@ static void rtc_resume(void)
 #endif
 }
 
-/************************************************************************************
+/****************************************************************************
  * Name: stm32_rtc_alarm_handler
  *
  * Description:
@@ -616,14 +588,14 @@ static void rtc_resume(void)
  * Returned Value:
  *   Zero (OK) on success; A negated errno value on failure.
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 #ifdef CONFIG_RTC_ALARM
-static int stm32_rtc_alarm_handler(int irq, void *context)
+static int stm32_rtc_alarm_handler(int irq, void *context, void *arg)
 {
   FAR struct alm_cbinfo_s *cbinfo;
   alm_callback_t cb;
-  FAR void *arg;
+  FAR void *cb_arg;
   uint32_t isr;
   uint32_t cr;
   int ret = OK;
@@ -643,12 +615,12 @@ static int stm32_rtc_alarm_handler(int irq, void *context)
               /* Alarm A callback */
 
               cb  = cbinfo->ac_cb;
-              arg = (FAR void *)cbinfo->ac_arg;
+              cb_arg = (FAR void *)cbinfo->ac_arg;
 
               cbinfo->ac_cb  = NULL;
               cbinfo->ac_arg = NULL;
 
-              cb(arg, RTC_ALARMA);
+              cb(cb_arg, RTC_ALARMA);
             }
 
           isr  = getreg32(STM32_RTC_ISR) & ~RTC_ISR_ALRAF;
@@ -656,6 +628,7 @@ static int stm32_rtc_alarm_handler(int irq, void *context)
         }
     }
 
+#if CONFIG_RTC_NALARMS > 1
   if ((isr & RTC_ISR_ALRBF) != 0)
     {
       cr  = getreg32(STM32_RTC_CR);
@@ -667,24 +640,25 @@ static int stm32_rtc_alarm_handler(int irq, void *context)
               /* Alarm B callback */
 
               cb  = cbinfo->ac_cb;
-              arg = (FAR void *)cbinfo->ac_arg;
+              cb_arg = (FAR void *)cbinfo->ac_arg;
 
               cbinfo->ac_cb  = NULL;
               cbinfo->ac_arg = NULL;
 
-              cb(arg, RTC_ALARMB);
+              cb(cb_arg, RTC_ALARMB);
             }
 
           isr  = getreg32(STM32_RTC_ISR) & ~RTC_ISR_ALRBF;
           putreg32(isr, STM32_RTC_CR);
         }
     }
+#endif
 
   return ret;
 }
 #endif
 
-/************************************************************************************
+/****************************************************************************
  * Name: rtchw_check_alrXwf X= a or B
  *
  * Description:
@@ -696,7 +670,7 @@ static int stm32_rtc_alarm_handler(int irq, void *context)
  * Returned Value:
  *   Zero (OK) on success; a negated errno on failure
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 #ifdef CONFIG_RTC_ALARM
 static int rtchw_check_alrawf(void)
@@ -724,7 +698,7 @@ static int rtchw_check_alrawf(void)
 }
 #endif
 
-#ifdef CONFIG_RTC_ALARM
+#if defined(CONFIG_RTC_ALARM) && CONFIG_RTC_NALARMS > 1
 static int rtchw_check_alrbwf(void)
 {
   volatile uint32_t timeout;
@@ -750,12 +724,12 @@ static int rtchw_check_alrbwf(void)
 }
 #endif
 
-/************************************************************************************
+/****************************************************************************
  * Name: stm32_rtchw_set_alrmXr X is a or b
  *
  * Description:
- *   Set the alarm (A or B) hardware registers, using the required hardware access
- *   protocol
+ *   Set the alarm (A or B) hardware registers, using the required hardware
+ *   access protocol
  *
  * Input Parameters:
  *   alarmreg - the register
@@ -763,7 +737,7 @@ static int rtchw_check_alrbwf(void)
  * Returned Value:
  *   Zero (OK) on success; a negated errno on failure
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 #ifdef CONFIG_RTC_ALARM
 static int rtchw_set_alrmar(rtc_alarmreg_t alarmreg)
@@ -789,7 +763,7 @@ static int rtchw_set_alrmar(rtc_alarmreg_t alarmreg)
   /* Set the RTC Alarm register */
 
   putreg32(alarmreg, STM32_RTC_ALRMAR);
-  rtcvdbg("  TR: %08x ALRMAR: %08x\n",
+  rtcinfo("  TR: %08x ALRMAR: %08x\n",
           getreg32(STM32_RTC_TR), getreg32(STM32_RTC_ALRMAR));
 
   /* Enable RTC alarm */
@@ -802,7 +776,7 @@ errout_with_wprunlock:
 }
 #endif
 
-#ifdef CONFIG_RTC_ALARM
+#if defined(CONFIG_RTC_ALARM) && CONFIG_RTC_NALARMS > 1
 static int rtchw_set_alrmbr(rtc_alarmreg_t alarmreg)
 {
   int ret = -EBUSY;
@@ -826,7 +800,7 @@ static int rtchw_set_alrmbr(rtc_alarmreg_t alarmreg)
   /* Set the RTC Alarm register */
 
   putreg32(alarmreg, STM32_RTC_ALRMBR);
-  rtcvdbg("  TR: %08x ALRMBR: %08x\n",
+  rtcinfo("  TR: %08x ALRMBR: %08x\n",
           getreg32(STM32_RTC_TR), getreg32(STM32_RTC_ALRMBR));
 
   /* Enable RTC alarm B */
@@ -839,16 +813,56 @@ rtchw_set_alrmbr_exit:
 }
 #endif
 
-/************************************************************************************
+/****************************************************************************
+ * Name: rtc_enable_alarm
+ *
+ * Description:
+ *   Enable ALARM interrupts
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+static inline void rtc_enable_alarm(void)
+{
+  /* Is the alarm already enabled? */
+
+  if (!g_alarm_enabled)
+    {
+      /* Configure RTC interrupt to catch alarm interrupts. All RTC
+       * interrupts are connected to the EXTI controller.  To enable the
+       * RTC Alarm interrupt, the following sequence is required:
+       *
+       * 1. Configure and enable the EXTI Line 17 RTC ALARM in interrupt
+       *    mode and select the rising edge sensitivity.
+       *    For STM32F4xx
+       *    EXTI line 21 RTC Tamper & Timestamp
+       *    EXTI line 22 RTC Wakeup
+       * 2. Configure and enable the RTC_Alarm IRQ channel in the NVIC.
+       * 3. Configure the RTC to generate RTC alarms (Alarm A or Alarm B).
+       */
+
+      (void)stm32_exti_alarm(true, false, true, stm32_rtc_alarm_handler, NULL);
+      g_alarm_enabled = true;
+    }
+}
+#endif
+
+/****************************************************************************
  * Public Functions
- ************************************************************************************/
+ ****************************************************************************/
 
-/************************************************************************************
+/****************************************************************************
  * Name: up_rtc_initialize
  *
  * Description:
- *   Initialize the hardware RTC per the selected configuration.  This function is
- *   called once during the OS initialization sequence
+ *   Initialize the hardware RTC per the selected configuration.  This
+ *   function is called once during the OS initialization sequence
  *
  * Input Parameters:
  *   None
@@ -856,7 +870,7 @@ rtchw_set_alrmbr_exit:
  * Returned Value:
  *   Zero (OK) on success; a negated errno on failure
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 int up_rtc_initialize(void)
 {
@@ -868,9 +882,9 @@ int up_rtc_initialize(void)
   int nretry = 0;
 
   /* Clocking for the PWR block must be provided.  However, this is done
-   * unconditionally in stm32f40xxx_rcc.c on power up.  This done unconditionally
-   * because the PWR block is also needed to set the internal voltage regulator for
-   * maximum performance.
+   * unconditionally in stm32f40xxx_rcc.c on power up.  This done
+   * unconditionally because the PWR block is also needed to set the
+   * internal voltage regulator for maximum performance.
    */
 
   /* Select the clock source */
@@ -878,20 +892,13 @@ int up_rtc_initialize(void)
 
   regval = getreg32(RTC_MAGIC_REG);
 
-  (void)stm32_pwr_enablebkp(true);
+  stm32_pwr_enablebkp(true);
 
   if (regval != RTC_MAGIC)
     {
-      /* We might be changing RTCSEL - to ensure such changes work, we must reset the
-       * backup domain (having backed up the RTC_MAGIC token)
-       */
-
-      modifyreg32(STM32_RCC_XXX, 0, RCC_XXX_YYYRST);
-      modifyreg32(STM32_RCC_XXX, RCC_XXX_YYYRST, 0);
-
-      /* Some boards do not have the external 32khz oscillator installed, for those
-       * boards we must fallback to the crummy internal RC clock or the external high
-       * rate clock
+      /* Some boards do not have the external 32khz oscillator installed,
+       * for those boards we must fallback to the crummy internal RC clock
+       * or the external high rate clock
        */
 
 #ifdef CONFIG_RTC_HSECLOCK
@@ -965,7 +972,7 @@ int up_rtc_initialize(void)
         }
     }
 
-  (void)stm32_pwr_enablebkp(false);
+  stm32_pwr_enablebkp(false);
 
   /* Loop, attempting to initialize/resume the RTC.  This loop is necessary
    * because it seems that occasionally it takes longer to initialize the RTC
@@ -974,8 +981,8 @@ int up_rtc_initialize(void)
 
   do
     {
-      /* Wait for the RTC Time and Date registers to be synchronized with RTC APB
-       * clock.
+      /* Wait for the RTC Time and Date registers to be synchronized with RTC
+       * APB clock.
        */
 
       ret = rtc_synchwait();
@@ -986,13 +993,13 @@ int up_rtc_initialize(void)
         {
           case OK:
             {
-              rtclldbg("rtc_syncwait() okay\n");
+              rtcinfo("rtc_syncwait() okay\n");
               break;
             }
 
           default:
             {
-              rtclldbg("rtc_syncwait() failed (%d)\n", ret);
+              rtcerr("ERROR: rtc_syncwait() failed (%d)\n", ret);
               break;
             }
         }
@@ -1006,7 +1013,7 @@ int up_rtc_initialize(void)
 
   if (regval != RTC_MAGIC)
     {
-      rtclldbg("Do setup\n");
+      rtcinfo("Do setup\n");
 
       /* Perform the one-time setup of the LSE clocking to the RTC */
 
@@ -1016,15 +1023,21 @@ int up_rtc_initialize(void)
        * backup data registers and backup SRAM).
        */
 
-      (void)stm32_pwr_enablebkp(true);
+      stm32_pwr_enablebkp(true);
 
       /* Remember that the RTC is initialized */
 
       putreg32(RTC_MAGIC, RTC_MAGIC_REG);
+
+      /* Disable write access to the backup domain (RTC registers, RTC
+       * backup data registers and backup SRAM).
+       */
+
+      stm32_pwr_enablebkp(false);
     }
   else
     {
-      rtclldbg("Do resume\n");
+      rtcinfo("Do resume\n");
 
       /* RTC already set-up, just resume normal operation */
 
@@ -1032,55 +1045,31 @@ int up_rtc_initialize(void)
       rtc_dumpregs("Did resume");
     }
 
-  /* Disable write access to the backup domain (RTC registers, RTC backup
-   * data registers and backup SRAM).
-   */
-
-  (void)stm32_pwr_enablebkp(false);
-
   if (ret != OK && nretry > 0)
     {
-      rtclldbg("setup/resume ran %d times and failed with %d\n",
-                nretry, ret);
+      rtcinfo("setup/resume ran %d times and failed with %d\n",
+              nretry, ret);
       return -ETIMEDOUT;
     }
 
-#ifdef CONFIG_RTC_ALARM
-  /* Configure RTC interrupt to catch alarm interrupts. All RTC interrupts are
-   * connected to the EXTI controller.  To enable the RTC Alarm interrupt, the
-   * following sequence is required:
-   *
-   * 1. Configure and enable the EXTI Line 17 RTC ALARM in interrupt mode and select the
-   *    rising edge sensitivity.
-   *    For STM32F4xx
-   *    EXTI line 21 RTC Tamper & Timestamp
-   *    EXTI line 22 RTC Wakeup
-   * 2. Configure and enable the RTC_Alarm IRQ channel in the NVIC.
-   * 3. Configure the RTC to generate RTC alarms (Alarm A or Alarm B).
-   */
-
-  stm32_exti_alarm(true, false, true, stm32_rtc_alarm_handler);
-  rtc_dumpregs("After InitExtiAlarm");
-#else
   rtc_dumpregs("After Initialization");
-#endif
 
   g_rtc_enabled = true;
   return OK;
 }
 
-/************************************************************************************
+/****************************************************************************
  * Name: stm32_rtc_getdatetime_with_subseconds
  *
  * Description:
  *   Get the current date and time from the date/time RTC.  This interface
  *   is only supported by the date/time RTC hardware implementation.
- *   It is used to replace the system timer.  It is only used by the RTOS during
- *   initialization to set up the system time when CONFIG_RTC and CONFIG_RTC_DATETIME
- *   are selected (and CONFIG_RTC_HIRES is not).
+ *   It is used to replace the system timer.  It is only used by the RTOS
+ *   during initialization to set up the system time when CONFIG_RTC and
+ *   CONFIG_RTC_DATETIME are selected (and CONFIG_RTC_HIRES is not).
  *
- *   NOTE: Some date/time RTC hardware is capability of sub-second accuracy.  That
- *   sub-second accuracy is returned through 'nsec'.
+ *   NOTE: Some date/time RTC hardware is capability of sub-second accuracy.
+ *   That sub-second accuracy is returned through 'nsec'.
  *
  * Input Parameters:
  *   tp - The location to return the high resolution time value.
@@ -1089,7 +1078,7 @@ int up_rtc_initialize(void)
  * Returned Value:
  *   Zero (OK) on success; a negated errno on failure
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 #ifdef CONFIG_STM32_HAVE_RTC_SUBSECONDS
 int stm32_rtc_getdatetime_with_subseconds(FAR struct tm *tp, FAR long *nsec)
@@ -1104,9 +1093,9 @@ int up_rtc_getdatetime(FAR struct tm *tp)
   uint32_t tr;
   uint32_t tmp;
 
-  /* Sample the data time registers.  There is a race condition here... If we sample
-   * the time just before midnight on December 31, the date could be wrong because
-   * the day rolled over while were sampling.
+  /* Sample the data time registers.  There is a race condition here... If
+   * we sample the time just before midnight on December 31, the date could
+   * be wrong because the day rolled over while were sampling.
    */
 
   do
@@ -1190,20 +1179,20 @@ int up_rtc_getdatetime(FAR struct tm *tp)
   return OK;
 }
 
-/************************************************************************************
+/****************************************************************************
  * Name: up_rtc_getdatetime
  *
  * Description:
  *   Get the current date and time from the date/time RTC.  This interface
  *   is only supported by the date/time RTC hardware implementation.
- *   It is used to replace the system timer.  It is only used by the RTOS during
- *   initialization to set up the system time when CONFIG_RTC and CONFIG_RTC_DATETIME
- *   are selected (and CONFIG_RTC_HIRES is not).
+ *   It is used to replace the system timer.  It is only used by the RTOS
+ *   during initialization to set up the system time when CONFIG_RTC and
+ *   CONFIG_RTC_DATETIME are selected (and CONFIG_RTC_HIRES is not).
  *
- *   NOTE: Some date/time RTC hardware is capability of sub-second accuracy.  That
- *   sub-second accuracy is lost in this interface.  However, since the system time
- *   is reinitialized on each power-up/reset, there will be no timing inaccuracy in
- *   the long run.
+ *   NOTE: Some date/time RTC hardware is capability of sub-second accuracy.
+ *   That sub-second accuracy is lost in this interface.  However, since the
+ *   system time is reinitialized on each power-up/reset, there will be no
+ *   timing inaccuracy in the long run.
  *
  * Input Parameters:
  *   tp - The location to return the high resolution time value.
@@ -1211,7 +1200,7 @@ int up_rtc_getdatetime(FAR struct tm *tp)
  * Returned Value:
  *   Zero (OK) on success; a negated errno on failure
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 #ifdef CONFIG_STM32_HAVE_RTC_SUBSECONDS
 int up_rtc_getdatetime(FAR struct tm *tp)
@@ -1220,13 +1209,13 @@ int up_rtc_getdatetime(FAR struct tm *tp)
 }
 #endif
 
-/************************************************************************************
+/****************************************************************************
  * Name: stm32_rtc_setdatetime
  *
  * Description:
  *   Set the RTC to the provided time. RTC implementations which provide
- *   up_rtc_getdatetime() (CONFIG_RTC_DATETIME is selected) should provide this
- *   function.
+ *   up_rtc_getdatetime() (CONFIG_RTC_DATETIME is selected) should provide
+ *   this function.
  *
  * Input Parameters:
  *   tp - the time to use
@@ -1234,7 +1223,7 @@ int up_rtc_getdatetime(FAR struct tm *tp)
  * Returned Value:
  *   Zero (OK) on success; a negated errno on failure
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 int stm32_rtc_setdatetime(FAR const struct tm *tp)
 {
@@ -1255,11 +1244,14 @@ int stm32_rtc_setdatetime(FAR const struct tm *tp)
        (rtc_bin2bcd(tp->tm_min)  << RTC_TR_MNU_SHIFT) |
        (rtc_bin2bcd(tp->tm_hour) << RTC_TR_HU_SHIFT);
 
-  /* Now convert the fields in struct tm format to the RTC date register fields:
-   * Days: 1-31 match in both cases.
-   * Month: STM32 is 1-12, struct tm is 0-11.
-   * Years: STM32 is 00-99, struct tm is years since 1900.
-   * WeekDay: STM32 is 1 = Mon - 7 = Sun
+  /* Now convert the fields in struct tm format to the RTC date register
+   * fields:
+   *
+   *   Days: 1-31 match in both cases.
+   *   Month: STM32 is 1-12, struct tm is 0-11.
+   *   Years: STM32 is 00-99, struct tm is years since 1900.
+   *   WeekDay: STM32 is 1 = Mon - 7 = Sun
+   *
    * Issue:  I am not sure what the STM32 years mean.  Are these the
    * years 2000-2099?  I'll assume so.
    */
@@ -1302,12 +1294,12 @@ int stm32_rtc_setdatetime(FAR const struct tm *tp)
   return ret;
 }
 
-/************************************************************************************
+/****************************************************************************
  * Name: up_rtc_settime
  *
  * Description:
- *   Set the RTC to the provided time.  All RTC implementations must be able to
- *   set their time based on a standard timespec.
+ *   Set the RTC to the provided time.  All RTC implementations must be able
+ *   to set their time based on a standard timespec.
  *
  * Input Parameters:
  *   tp - the time to use
@@ -1315,13 +1307,15 @@ int stm32_rtc_setdatetime(FAR const struct tm *tp)
  * Returned Value:
  *   Zero (OK) on success; a negated errno on failure
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 int up_rtc_settime(FAR const struct timespec *tp)
 {
   FAR struct tm newtime;
 
-  /* Break out the time values (not that the time is set only to units of seconds) */
+  /* Break out the time values (not that the time is set only to units of
+   * seconds)
+   */
 
   (void)gmtime_r(&tp->tv_sec, &newtime);
   return stm32_rtc_setdatetime(&newtime);
@@ -1351,6 +1345,10 @@ int stm32_rtc_setalarm(FAR struct alm_setalarm_s *alminfo)
   ASSERT(alminfo != NULL);
   DEBUGASSERT(RTC_ALARM_LAST > alminfo->as_id);
 
+  /* Make sure the the alarm interrupt is enabled at the NVIC */
+
+  rtc_enable_alarm();
+
   /* REVISIT:  Should test that the time is in the future */
 
   rtc_dumptime(&alminfo->as_time, "New alarm time");
@@ -1365,7 +1363,7 @@ int stm32_rtc_setalarm(FAR struct alm_setalarm_s *alminfo)
              (rtc_bin2bcd(alminfo->as_time.tm_hour) << RTC_ALRMR_HU_SHIFT) |
              (rtc_bin2bcd(alminfo->as_time.tm_mday) << RTC_ALRMR_DU_SHIFT);
  
-  /* Set the alarm in hardware and enable interrupts */
+  /* Set the alarm in hardware and enable interrupts from the RTC */
 
   switch (alminfo->as_id)
     {
@@ -1386,6 +1384,7 @@ int stm32_rtc_setalarm(FAR struct alm_setalarm_s *alminfo)
         }
         break;
 
+#if CONFIG_RTC_NALARMS > 1
       case RTC_ALARMB:
         {
           cbinfo         = &g_alarmcb[RTC_ALARMB];
@@ -1402,9 +1401,10 @@ int stm32_rtc_setalarm(FAR struct alm_setalarm_s *alminfo)
           rtc_dumpregs("Set AlarmB");
         }
         break;
+#endif
 
       default:
-        rtcvdbg("ERROR: Invalid ALARM%d\n", alminfo->as_id);
+        rtcerr("ERROR: Invalid ALARM%d\n", alminfo->as_id);
         break;
     }
 
@@ -1468,6 +1468,7 @@ int stm32_rtc_cancelalarm(enum alm_id_e alarmid)
         }
         break;
 
+#if CONFIG_RTC_NALARMS > 1
       case RTC_ALARMB:
         {
           /* Cancel the global callback function */
@@ -1498,9 +1499,10 @@ int stm32_rtc_cancelalarm(enum alm_id_e alarmid)
           ret = OK;
         }
         break;
+#endif
 
       default:
-        rtcvdbg("ERROR: Invalid ALARM%d\n", alarmid);
+        rtcerr("ERROR: Invalid ALARM%d\n", alarmid);
         break;
     }
 
diff --git a/arch/arm/src/stm32f7/Kconfig b/arch/arm/src/stm32f7/Kconfig
index e3a8d2b42cdedb30750d7f51f637e8197662b3b6..ff7dfe80cfd9e0af814a54ead237a0dfc699c18f 100644
--- a/arch/arm/src/stm32f7/Kconfig
+++ b/arch/arm/src/stm32f7/Kconfig
@@ -12,695 +12,4419 @@ choice
 	default ARCH_CHIP_STM32F746
 	depends on ARCH_CHIP_STM32F7
 
-config ARCH_CHIP_STM32F745
-	bool "STM32F745xx"
-	select STM32F7_STM32F74XX
+config ARCH_CHIP_STM32F745VG
+	bool "STM32F745VG"
+	select STM32F7_STM32F745XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_V
 	---help---
-		STM32 F7 Cortex M7, 512 or 1024Kb FLASH, 335 (240++16+54) Kb SRAM
+		STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM
 
-config ARCH_CHIP_STM32F746
-	bool "STM32F746xx"
-	select STM32F7_STM32F74XX
-	select STM32F7_HAVE_LTDC
+config ARCH_CHIP_STM32F745VE
+	bool "STM32F745VE"
+	select STM32F7_STM32F745XX
+	select STM32F7_FLASH_CONFIG_E
+	select STM32F7_IO_CONFIG_V
 	---help---
-		STM32 F7 Cortex M7, 512 or 1024Kb FLASH, 335 (240++16+54) Kb SRAM
+		STM32 F7 Cortex M7, 512 320K FLASH, 320K (240+16+64) Kb SRAM
 
-config ARCH_CHIP_STM32F756
-	bool "STM32F756xx"
-	select STM32F7_STM32F75XX
-	select STM32F7_HAVE_LTDC
+config ARCH_CHIP_STM32F745IG
+	bool "STM32F745IG"
+	select STM32F7_STM32F745XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_I
 	---help---
-		STM32 F7 Cortex M7, 512 or 1024Kb FLASH, 335 (240++16+54) Kb SRAM
+		STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM
 
-endchoice # STM32 F7 Chip Selection
+config ARCH_CHIP_STM32F745IE
+	bool "STM32F745IE"
+	select STM32F7_STM32F745XX
+	select STM32F7_FLASH_CONFIG_E
+	select STM32F7_IO_CONFIG_I
+	---help---
+		STM32 F7 Cortex M7, 512 FLASH, 320K (240+16+64) Kb SRAM
 
-config STM32F7_STM32F74XX
-	bool
-	default n
-	select ARCH_HAVE_FPU
-	select ARCH_HAVE_DPFPU # REVISIT
-	select ARMV7M_HAVE_ICACHE
-	select ARMV7M_HAVE_DCACHE
-	select ARMV7M_HAVE_ITCM
-	select ARMV7M_HAVE_DTCM
+config ARCH_CHIP_STM32F745ZE
+	bool "STM32F745ZE"
+	select STM32F7_STM32F745XX
+	select STM32F7_FLASH_CONFIG_E
+	select STM32F7_IO_CONFIG_Z
+	---help---
+		STM32 F7 Cortex M7, 512 FLASH, 320K (240+16+64) Kb SRAM
 
-config STM32F7_STM32F75XX
-	bool
-	default n
-	select ARCH_HAVE_FPU
-	select ARCH_HAVE_DPFPU # REVISIT
-	select ARMV7M_HAVE_ICACHE
-	select ARMV7M_HAVE_DCACHE
-	select ARMV7M_HAVE_ITCM
-	select ARMV7M_HAVE_DTCM
+config ARCH_CHIP_STM32F745ZG
+	bool "STM32F745ZG"
+	select STM32F7_STM32F745XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_Z
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM
 
-choice
-	prompt "Embedded FLASH size"
-	default STM32F7_FLASH_1024KB
+config ARCH_CHIP_STM32F746BG
+	bool "STM32F746BG"
+	select STM32F7_STM32F746XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_B
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM
 
-config STM32F7_FLASH_512KB
-	bool "512 KB"
+config ARCH_CHIP_STM32F746VG
+	bool "STM32F746VG"
+	select STM32F7_STM32F746XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_V
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM
 
-config STM32F7_FLASH_1024KB
-	bool "1024 KB"
+config ARCH_CHIP_STM32F746VE
+	bool "STM32F746VE"
+	select STM32F7_STM32F746XX
+	select STM32F7_FLASH_CONFIG_E
+	select STM32F7_IO_CONFIG_V
+	---help---
+		STM32 F7 Cortex M7, 512 FLASH, 320K (240+16+64) Kb SRAM
 
-endchoice # Embedded FLASH size
+config ARCH_CHIP_STM32F746BE
+	bool "STM32F746BE"
+	select STM32F7_STM32F746XX
+	select STM32F7_FLASH_CONFIG_E
+	select STM32F7_IO_CONFIG_B
+	---help---
+		STM32 F7 Cortex M7, 512 FLASH, 320K (240+16+64) Kb SRAM
 
-menu "STM32 Peripheral Support"
+config ARCH_CHIP_STM32F746ZG
+	bool "STM32F746ZG"
+	select STM32F7_STM32F746XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_Z
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM
 
-# These "hidden" settings determine is a peripheral option is available for the
-# selection MCU
+config ARCH_CHIP_STM32F746IE
+	bool "STM32F746IE"
+	select STM32F7_STM32F746XX
+	select STM32F7_FLASH_CONFIG_E
+	select STM32F7_IO_CONFIG_I
+	---help---
+		STM32 F7 Cortex M7, 512 FLASH, 320K (240+16+64) Kb SRAM
 
-config STM32F7_HAVE_LTDC
-	bool
-	default n
+config ARCH_CHIP_STM32F746NG
+	bool "STM32F746NG"
+	select STM32F7_STM32F746XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_N
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM
 
-# These "hidden" settings are the OR of individual peripheral selections
-# indicating that the general capabilitiy is required.
+config ARCH_CHIP_STM32F746NE
+	bool "STM32F746NE"
+	select STM32F7_STM32F746XX
+	select STM32F7_FLASH_CONFIG_E
+	select STM32F7_IO_CONFIG_N
+	---help---
+		STM32 F7 Cortex M7, 512 FLASH, 320K (240+16+64) Kb SRAM
 
-config STM32F7_ADC
-	bool
-	default n
+config ARCH_CHIP_STM32F746ZE
+	bool "STM32F746ZE"
+	select STM32F7_STM32F746XX
+	select STM32F7_FLASH_CONFIG_E
+	select STM32F7_IO_CONFIG_Z
+	---help---
+		STM32 F7 Cortex M7, 512 FLASH, 320K (240+16+64) Kb SRAM
 
-config STM32F7_CAN
-	bool
-	default n
+config ARCH_CHIP_STM32F746IG
+	bool "STM32F746IG"
+	select STM32F7_STM32F746XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_I
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM
 
-config STM32F7_DAC
-	bool
-	default n
+config ARCH_CHIP_STM32F756NG
+	bool "STM32F756NG"
+	select STM32F7_STM32F756XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_N
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM
 
-config STM32F7_DMA
-	bool
-	default n
+config ARCH_CHIP_STM32F756BG
+	bool "STM32F756BG"
+	select STM32F7_STM32F756XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_B
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM
 
-config STM32F7_I2C
-	bool
-	default n
+config ARCH_CHIP_STM32F756IG
+	bool "STM32F756IG"
+	select STM32F7_STM32F756XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_I
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM
 
-config STM32F7_SAI
-	bool
-	default n
+config ARCH_CHIP_STM32F756VG
+	bool "STM32F756VG"
+	select STM32F7_STM32F756XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_V
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM
 
-config STM32F7_SPI
-	bool
-	default n
+config ARCH_CHIP_STM32F756ZG
+	bool "STM32F756ZG"
+	select STM32F7_STM32F756XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_Z
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM
 
-config STM32F7_USART
-	bool
-	default n
+config ARCH_CHIP_STM32F765NI
+	bool "STM32F765NI"
+	select STM32F7_STM32F765XX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_N
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
 
-# These are the peripheral selections proper
+config ARCH_CHIP_STM32F765VI
+	bool "STM32F765VI"
+	select STM32F7_STM32F765XX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_V
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_ADC1
-	bool "ADC1"
-	default n
-	select STM32F7_ADC
+config ARCH_CHIP_STM32F765VG
+	bool "STM32F765VG"
+	select STM32F7_STM32F765XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_V
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_ADC2
-	bool "ADC2"
-	default n
-	select STM32F7_ADC
+config ARCH_CHIP_STM32F765BI
+	bool "STM32F765BI"
+	select STM32F7_STM32F765XX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_B
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_ADC3
-	bool "ADC3"
-	default n
-	select STM32F7_ADC
+config ARCH_CHIP_STM32F765NG
+	bool "STM32F765NG"
+	select STM32F7_STM32F765XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_N
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_BKPSRAM
-	bool "Enable BKP RAM Domain"
-	default n
+config ARCH_CHIP_STM32F765ZG
+	bool "STM32F765ZG"
+	select STM32F7_STM32F765XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_Z
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_CAN1
-	bool "CAN1"
-	default n
-	select CAN
-	select STM32F7_CAN
+config ARCH_CHIP_STM32F765ZI
+	bool "STM32F765ZI"
+	select STM32F7_STM32F765XX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_Z
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_CAN2
-	bool "CAN2"
-	default n
-	select CAN
-	select STM32F7_CAN
+config ARCH_CHIP_STM32F765IG
+	bool "STM32F765IG"
+	select STM32F7_STM32F765XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_I
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_CEC
-	bool "CEC"
-	default n
-	depends on STM32F7_VALUELINE
+config ARCH_CHIP_STM32F765BG
+	bool "STM32F765BG"
+	select STM32F7_STM32F765XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_B
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_CRC
-	bool "CRC"
-	default n
+config ARCH_CHIP_STM32F765II
+	bool "STM32F765II"
+	select STM32F7_STM32F765XX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_I
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_CRYP
-	bool "CRYP"
-	default n
+config ARCH_CHIP_STM32F767NG
+	bool "STM32F767NG"
+	select STM32F7_STM32F767XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_N
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_DMA1
-	bool "DMA1"
-	default n
-	select STM32F7_DMA
-	select ARCH_DMA
+config ARCH_CHIP_STM32F767IG
+	bool "STM32F767IG"
+	select STM32F7_STM32F767XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_I
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_DMA2
-	bool "DMA2"
-	default n
-	select STM32F7_DMA
-	select ARCH_DMA
+config ARCH_CHIP_STM32F767VG
+	bool "STM32F767VG"
+	select STM32F7_STM32F767XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_V
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_DAC1
-	bool "DAC1"
-	default n
-	select STM32F7_DAC
+config ARCH_CHIP_STM32F767ZG
+	bool "STM32F767ZG"
+	select STM32F7_STM32F767XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_Z
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_DAC2
-	bool "DAC2"
-	default n
-	select STM32F7_DAC
+config ARCH_CHIP_STM32F767NI
+	bool "STM32F767NI"
+	select STM32F7_STM32F767XX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_N
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_DCMI
-	bool "DCMI"
-	default n
+config ARCH_CHIP_STM32F767VI
+	bool "STM32F767VI"
+	select STM32F7_STM32F767XX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_V
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_ETHMAC
-	bool "Ethernet MAC"
-	default n
-	select NETDEVICES
-	select ARCH_HAVE_PHY
+config ARCH_CHIP_STM32F767BG
+	bool "STM32F767BG"
+	select STM32F7_STM32F767XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_B
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_FSMC
-	bool "FSMC"
-	default n
+config ARCH_CHIP_STM32F767ZI
+	bool "STM32F767ZI"
+	select STM32F7_STM32F767XX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_Z
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_I2C1
-	bool "I2C1"
-	default n
-	select STM32F7_I2C
+config ARCH_CHIP_STM32F767II
+	bool "STM32F767II"
+	select STM32F7_STM32F767XX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_I
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_CEC
-	bool "HDMI-CEC"
-	default n
+config ARCH_CHIP_STM32F769BI
+	bool "STM32F769BI"
+	select STM32F7_STM32F769XX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_B
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_I2C2
-	bool "I2C2"
-	default n
-	select STM32F7_I2C
+config ARCH_CHIP_STM32F769II
+	bool "STM32F769II"
+	select STM32F7_STM32F769XX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_I
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_I2C3
-	bool "I2C3"
-	default n
-	select STM32F7_I2C
+config ARCH_CHIP_STM32F769BG
+	bool "STM32F769BG"
+	select STM32F7_STM32F769XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_B
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_LPTIM1
-	bool "Low-power timer 1"
-	default n
+config ARCH_CHIP_STM32F769NI
+	bool "STM32F769NI"
+	select STM32F7_STM32F769XX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_N
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_LTDC
-	bool "LTDC"
-	default n
-	depends on STM32F7_HAVE_LTDC
+config ARCH_CHIP_STM32F769AI
+	bool "STM32F769AI"
+	select STM32F7_STM32F769AX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_A
 	---help---
-		The STM32 LTDC is an LCD-TFT Display Controller available on
-		the STM32F429 and STM32F439 devices.  It is a standard parallel
-		video interface (HSYNC, VSYNC, etc.) for controlling TFT
-		LCD displays.
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_DMA2D
-	bool "DMA2D"
-	default n
+config ARCH_CHIP_STM32F769NG
+	bool "STM32F769NG"
+	select STM32F7_STM32F769XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_N
 	---help---
-		The STM32 DMA2D is an Chrom-Art Accelerator for image manipulation
-		available on the STM32 F7 devices.
+		STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_OTGFS
-	bool "OTG FS"
-	default n
-	select USBHOST_HAVE_ASYNCH if USBHOST
+config ARCH_CHIP_STM32F769IG
+	bool "STM32F769IG"
+	select STM32F7_STM32F769XX
+	select STM32F7_FLASH_CONFIG_G
+	select STM32F7_IO_CONFIG_I
+	---help---
+		STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM
 
-config STM32F7_OTGHS
-	bool "OTG HS"
+config ARCH_CHIP_STM32F777ZI
+	bool "STM32F777ZI"
+	select STM32F7_STM32F777XX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_Z
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
+
+config ARCH_CHIP_STM32F777VI
+	bool "STM32F777VI"
+	select STM32F7_STM32F777XX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_V
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
+
+config ARCH_CHIP_STM32F777NI
+	bool "STM32F777NI"
+	select STM32F7_STM32F777XX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_N
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
+
+config ARCH_CHIP_STM32F777BI
+	bool "STM32F777BI"
+	select STM32F7_STM32F777XX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_B
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
+
+config ARCH_CHIP_STM32F777II
+	bool "STM32F777II"
+	select STM32F7_STM32F777XX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_I
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
+
+config ARCH_CHIP_STM32F778AI
+	bool "STM32F778AI"
+	select STM32F7_STM32F778AX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_A
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
+
+config ARCH_CHIP_STM32F779II
+	bool "STM32F779II"
+	select STM32F7_STM32F779XX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_I
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
+
+config ARCH_CHIP_STM32F779NI
+	bool "STM32F779NI"
+	select STM32F7_STM32F779XX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_N
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
+
+config ARCH_CHIP_STM32F779BI
+	bool "STM32F779BI"
+	select STM32F7_STM32F779XX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_B
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
+
+config ARCH_CHIP_STM32F779AI
+	bool "STM32F779AI"
+	select STM32F7_STM32F779XX
+	select STM32F7_FLASH_CONFIG_I
+	select STM32F7_IO_CONFIG_A
+	---help---
+		STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM
+
+endchoice # STM32 F7 Chip Selection
+
+config STM32F7_STM32F74XX
+	bool
 	default n
-	select USBHOST_HAVE_ASYNCH if USBHOST
 
-config STM32F7_QUADSPI
-	bool "QuadSPI"
+config STM32F7_STM32F75XX
+	bool
 	default n
 
-config STM32F7_SAI1
-config STM32F7_RNG
-	bool "RNG"
+config STM32F7_STM32F76XX
+	bool
 	default n
-	select ARCH_HAVE_RNG
 
-config STM32F7_SAI1
-	bool "SAI1"
+config STM32F7_STM32F77XX
+	bool
 	default n
-	select STM32F7_SAI
 
-config STM32F7_SAI2
-	bool "SAI2"
+config STM32F7_IO_CONFIG_V
+	bool
 	default n
-	select STM32F7_SAI
 
-config STM32F7_SDMMC1
-	bool "SDMMC1"
+config STM32F7_IO_CONFIG_I
+	bool
 	default n
-	select ARCH_HAVE_SDIO
 
-config STM32F7_SPDIFRX
-	bool "SPDIFRX"
+config STM32F7_IO_CONFIG_Z
+	bool
 	default n
 
-config STM32F7_SPI1
-	bool "SPI1"
+config STM32F7_IO_CONFIG_N
+	bool
 	default n
-	select SPI
-	select STM32F7_SPI
 
-config STM32F7_SPI2
-	bool "SPI2"
+config STM32F7_IO_CONFIG_B
+	bool
 	default n
-	select SPI
-	select STM32F7_SPI
 
-config STM32F7_SPI3
-	bool "SPI3"
+config STM32F7_IO_CONFIG_A
+	bool
 	default n
-	select SPI
-	select STM32F7_SPI
 
-config STM32F7_SPI4
-	bool "SPI4"
+config STM32F7_STM32F745XX
+	bool
 	default n
-	select SPI
-	select STM32F7_SPI
+	select STM32F7_STM32F74XX
+	select ARCH_HAVE_FPU
+	select ARMV7M_HAVE_ICACHE
+	select ARMV7M_HAVE_DCACHE
+	select ARMV7M_HAVE_ITCM
+	select ARMV7M_HAVE_DTCM
+	select STM32F7_HAVE_FSMC
+	select STM32F7_HAVE_ETHRNET
+	select STM32F7_HAVE_RNG
+	select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_DCMI
+	select STM32F7_HAVE_DMA2D
+
+config STM32F7_STM32F746XX
+	bool
+	default n
+	select STM32F7_STM32F74XX
+	select ARCH_HAVE_FPU
+	select ARMV7M_HAVE_ICACHE
+	select ARMV7M_HAVE_DCACHE
+	select ARMV7M_HAVE_ITCM
+	select ARMV7M_HAVE_DTCM
+	select STM32F7_HAVE_FSMC
+	select STM32F7_HAVE_ETHRNET
+	select STM32F7_HAVE_RNG
+	select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_DCMI
+	select STM32F7_HAVE_LTDC
+	select STM32F7_HAVE_DMA2D
 
-config STM32F7_SPI5
-	bool "SPI5"
+config STM32F7_STM32F756XX
+	bool
 	default n
-	select SPI
-	select STM32F7_SPI
+	select STM32F7_STM32F75XX
+	select ARCH_HAVE_FPU
+	select ARMV7M_HAVE_ICACHE
+	select ARMV7M_HAVE_DCACHE
+	select ARMV7M_HAVE_ITCM
+	select ARMV7M_HAVE_DTCM
+	select STM32F7_HAVE_FSMC
+	select STM32F7_HAVE_ETHRNET
+	select STM32F7_HAVE_RNG
+	select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_LTDC
+	select STM32F7_HAVE_DMA2D
+	select STM32F7_HAVE_CRYP
+	select STM32F7_HAVE_HASH
 
-config STM32F7_SPI6
-	bool "SPI6"
+config STM32F7_STM32F765XX
+	bool
 	default n
-	select SPI
-	select STM32F7_SPI
+	select STM32F7_STM32F76XX
+	select ARCH_HAVE_FPU
+	select ARCH_HAVE_DPFPU
+	select ARMV7M_HAVE_ICACHE
+	select ARMV7M_HAVE_DCACHE
+	select ARMV7M_HAVE_ITCM
+	select ARMV7M_HAVE_DTCM
+	select STM32F7_HAVE_FSMC
+	select STM32F7_HAVE_ETHRNET
+	select STM32F7_HAVE_RNG # data sheet says yes, Product matix says no
+	select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_SDMMC2 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_CAN3
+	select STM32F7_HAVE_DCMI
+	select STM32F7_HAVE_DMA2D
+	select STM32F7_HAVE_DFSDM1
+
+config STM32F7_STM32F767XX
+	bool
+	default n
+	select STM32F7_STM32F76XX
+	select ARCH_HAVE_FPU
+	select ARCH_HAVE_DPFPU
+	select ARMV7M_HAVE_ICACHE
+	select ARMV7M_HAVE_DCACHE
+	select ARMV7M_HAVE_ITCM
+	select ARMV7M_HAVE_DTCM
+	select STM32F7_HAVE_FSMC
+	select STM32F7_HAVE_ETHRNET
+	select STM32F7_HAVE_RNG
+	select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_SDMMC2 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_CAN3
+	select STM32F7_HAVE_DCMI
+	select STM32F7_HAVE_DSIHOST if !(STM32F7_IO_CONFIG_V || STM32F7_IO_CONFIG_Z)
+	select STM32F7_HAVE_LTDC
+	select STM32F7_HAVE_DMA2D
+	select STM32F7_HAVE_JPEG
+	select STM32F7_HAVE_DFSDM1
 
-config STM32F7_TIM1
-	bool "TIM1"
+config STM32F7_STM32F768XX # Revisit Wehn parts released
+	bool
 	default n
+	select STM32F7_STM32F76XX
+	select ARCH_HAVE_FPU
+	select ARCH_HAVE_DPFPU
+	select ARMV7M_HAVE_ICACHE
+	select ARMV7M_HAVE_DCACHE
+	select ARMV7M_HAVE_ITCM
+	select ARMV7M_HAVE_DTCM
+	select STM32F7_HAVE_FSMC
+	select STM32F7_HAVE_ETHRNET
+	select STM32F7_HAVE_RNG
+	select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_SDMMC2 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_CAN3
+	select STM32F7_HAVE_DCMI
+	select STM32F7_HAVE_DSIHOST if !(STM32F7_IO_CONFIG_V || STM32F7_IO_CONFIG_Z)
+	select STM32F7_HAVE_LTDC
+	select STM32F7_HAVE_DMA2D
+	select STM32F7_HAVE_JPEG
+	select STM32F7_HAVE_DFSDM1
 
-config STM32F7_TIM2
-	bool "TIM2"
+config STM32F7_STM32F768AX # Revisit When parts released
+	bool
 	default n
+	select STM32F7_STM32F76XX
+	select ARCH_HAVE_FPU
+	select ARCH_HAVE_DPFPU
+	select ARMV7M_HAVE_ICACHE
+	select ARMV7M_HAVE_DCACHE
+	select ARMV7M_HAVE_ITCM
+	select ARMV7M_HAVE_DTCM
+	select STM32F7_HAVE_FSMC
+	select STM32F7_HAVE_RNG
+	select STM32F7_HAVE_SPI5
+	select STM32F7_HAVE_SPI6
+	select STM32F7_HAVE_SDMMC2
+	select STM32F7_HAVE_CAN3
+	select STM32F7_HAVE_DCMI
+	select STM32F7_HAVE_DSIHOST
+	select STM32F7_HAVE_LTDC
+	select STM32F7_HAVE_DMA2D
+	select STM32F7_HAVE_JPEG
+	select STM32F7_HAVE_DFSDM1
 
-config STM32F7_TIM3
-	bool "TIM3"
+config STM32F7_STM32F769XX
+	bool
 	default n
+	select STM32F7_STM32F76XX
+	select ARCH_HAVE_FPU
+	select ARCH_HAVE_DPFPU
+	select ARMV7M_HAVE_ICACHE
+	select ARMV7M_HAVE_DCACHE
+	select ARMV7M_HAVE_ITCM
+	select ARMV7M_HAVE_DTCM
+	select STM32F7_HAVE_FSMC
+	select STM32F7_HAVE_ETHRNET
+	select STM32F7_HAVE_RNG
+	select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_SDMMC2 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_CAN3
+	select STM32F7_HAVE_DCMI
+	select STM32F7_HAVE_DSIHOST if !(STM32F7_IO_CONFIG_V || STM32F7_IO_CONFIG_Z)
+	select STM32F7_HAVE_LTDC
+	select STM32F7_HAVE_DMA2D
+	select STM32F7_HAVE_JPEG
+	select STM32F7_HAVE_DFSDM1
 
-config STM32F7_TIM4
-	bool "TIM4"
+config STM32F7_STM32F769AX # Revisit When parts released
+	bool
 	default n
+	select STM32F7_STM32F76XX
+	select ARCH_HAVE_FPU
+	select ARCH_HAVE_DPFPU
+	select ARMV7M_HAVE_ICACHE
+	select ARMV7M_HAVE_DCACHE
+	select ARMV7M_HAVE_ITCM
+	select ARMV7M_HAVE_DTCM
+	select STM32F7_HAVE_FSMC
+	select STM32F7_HAVE_RNG
+	select STM32F7_HAVE_SPI5
+	select STM32F7_HAVE_SPI6
+	select STM32F7_HAVE_SDMMC2
+	select STM32F7_HAVE_CAN3
+	select STM32F7_HAVE_DCMI
+	select STM32F7_HAVE_DSIHOST
+	select STM32F7_HAVE_LTDC
+	select STM32F7_HAVE_DMA2D
+	select STM32F7_HAVE_JPEG
+	select STM32F7_HAVE_DFSDM1
 
-config STM32F7_TIM5
-	bool "TIM5"
+config STM32F7_STM32F777XX
+	bool
 	default n
+	select STM32F7_STM32F77XX
+	select ARCH_HAVE_FPU
+	select ARCH_HAVE_DPFPU
+	select ARMV7M_HAVE_ICACHE
+	select ARMV7M_HAVE_DCACHE
+	select ARMV7M_HAVE_ITCM
+	select ARMV7M_HAVE_DTCM
+	select STM32F7_HAVE_FSMC
+	select STM32F7_HAVE_ETHRNET
+	select STM32F7_HAVE_RNG
+	select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_SDMMC2 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_CAN3
+	select STM32F7_HAVE_DCMI
+	select STM32F7_HAVE_DSIHOST if !(STM32F7_IO_CONFIG_V || STM32F7_IO_CONFIG_Z)
+	select STM32F7_HAVE_LTDC
+	select STM32F7_HAVE_DMA2D
+	select STM32F7_HAVE_JPEG
+	select STM32F7_HAVE_CRYP
+	select STM32F7_HAVE_HASH
+	select STM32F7_HAVE_DFSDM1
 
-config STM32F7_TIM6
-	bool "TIM6"
+config STM32F7_STM32F778XX # Revisit when parts released
+	bool
 	default n
+	select STM32F7_STM32F77XX
+	select ARCH_HAVE_FPU
+	select ARCH_HAVE_DPFPU
+	select ARMV7M_HAVE_ICACHE
+	select ARMV7M_HAVE_DCACHE
+	select ARMV7M_HAVE_ITCM
+	select ARMV7M_HAVE_DTCM
+	select STM32F7_HAVE_FSMC
+	select STM32F7_HAVE_ETHRNET
+	select STM32F7_HAVE_RNG
+	select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_SDMMC2 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_CAN3
+	select STM32F7_HAVE_DCMI
+	select STM32F7_HAVE_DSIHOST
+	select STM32F7_HAVE_LTDC
+	select STM32F7_HAVE_DMA2D
+	select STM32F7_HAVE_JPEG
+	select STM32F7_HAVE_CRYP
+	select STM32F7_HAVE_HASH
+	select STM32F7_HAVE_DFSDM1
 
-config STM32F7_TIM7
-	bool "TIM7"
+config STM32F7_STM32F778AX
+	bool
 	default n
+	select STM32F7_STM32F77XX
+	select ARCH_HAVE_FPU
+	select ARCH_HAVE_DPFPU
+	select ARMV7M_HAVE_ICACHE
+	select ARMV7M_HAVE_DCACHE
+	select ARMV7M_HAVE_ITCM
+	select ARMV7M_HAVE_DTCM
+	select STM32F7_HAVE_FSMC
+	select STM32F7_HAVE_RNG
+	select STM32F7_HAVE_SPI5
+	select STM32F7_HAVE_SPI6
+	select STM32F7_HAVE_SDMMC2
+	select STM32F7_HAVE_CAN3
+	select STM32F7_HAVE_DCMI
+	select STM32F7_HAVE_DSIHOST
+	select STM32F7_HAVE_LTDC
+	select STM32F7_HAVE_DMA2D
+	select STM32F7_HAVE_JPEG
+	select STM32F7_HAVE_CRYP
+	select STM32F7_HAVE_HASH
+	select STM32F7_HAVE_DFSDM1
 
-config STM32F7_TIM8
-	bool "TIM8"
+config STM32F7_STM32F779XX
+	bool
+	default n
+	select STM32F7_STM32F77XX
+	select ARCH_HAVE_FPU
+	select ARCH_HAVE_DPFPU
+	select ARMV7M_HAVE_ICACHE
+	select ARMV7M_HAVE_DCACHE
+	select ARMV7M_HAVE_ITCM
+	select ARMV7M_HAVE_DTCM
+	select STM32F7_HAVE_FSMC
+	select STM32F7_HAVE_ETHRNET
+	select STM32F7_HAVE_RNG
+	select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_SDMMC2 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_CAN3
+	select STM32F7_HAVE_DCMI
+	select STM32F7_HAVE_DSIHOST if !(STM32F7_IO_CONFIG_V || STM32F7_IO_CONFIG_Z)
+	select STM32F7_HAVE_LTDC
+	select STM32F7_HAVE_DMA2D
+	select STM32F7_HAVE_JPEG
+	select STM32F7_HAVE_CRYP
+	select STM32F7_HAVE_HASH
+	select STM32F7_HAVE_DFSDM1
+
+config STM32F7_STM32F779AX
+	bool
 	default n
+	select STM32F7_STM32F77XX
+	select ARCH_HAVE_FPU
+	select ARCH_HAVE_DPFPU
+	select ARMV7M_HAVE_ICACHE
+	select ARMV7M_HAVE_DCACHE
+	select ARMV7M_HAVE_ITCM
+	select ARMV7M_HAVE_DTCM
+	select STM32F7_HAVE_FSMC
+	select STM32F7_HAVE_RNG
+	select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_SDMMC2 if !STM32F7_IO_CONFIG_V
+	select STM32F7_HAVE_CAN3
+	select STM32F7_HAVE_DCMI
+	select STM32F7_HAVE_DSIHOST if !(STM32F7_IO_CONFIG_V || STM32F7_IO_CONFIG_Z)
+	select STM32F7_HAVE_LTDC
+	select STM32F7_HAVE_DMA2D
+	select STM32F7_HAVE_JPEG
+	select STM32F7_HAVE_CRYP
+	select STM32F7_HAVE_HASH
+	select STM32F7_HAVE_DFSDM1
 
-config STM32F7_TIM9
-	bool "TIM9"
+config STM32F7_FLASH_CONFIG_E
+	bool
 	default n
 
-config STM32F7_TIM10
-	bool "TIM10"
+config STM32F7_FLASH_CONFIG_I
+	bool
 	default n
 
-config STM32F7_TIM11
-	bool "TIM11"
+config STM32F7_FLASH_CONFIG_I
+	bool
 	default n
 
-config STM32F7_TIM12
-	bool "TIM12"
+choice
+	prompt "Overrdide Flash Size Designator"
+	depends on ARCH_CHIP_STM32F7
+	default STM32F7_FLASH_OVERRIDE_DEFAULT
+	---help---
+		STM32F7 series parts numbering (sans the package type) ends with a letter
+		that designates the FLASH size.
+
+				Designator  Size in KiB
+				   E	512
+				   G	1024
+				   I	2048
+
+		This configuration option defaults to using the configuration based on that designator
+		or the default smaller size if there is no last character designator is present in the
+		STM32 Chip Selection.
+
+		Examples:
+		   If the STM32F745VE is chosen, the Flash configuration would be 'E', if a variant of
+		   the part with a  2048 KiB Flash is released in the future one could simply select
+		   the 'I' designator here.
+
+		   If an STM32F7xxx Series parts is chosen the default Flash configuration will be set
+		   herein and can be changed.
+
+config STM32F7_FLASH_OVERRIDE_DEFAULT
+			bool "Default"
+
+config STM32F7_FLASH_OVERRIDE_E
+			bool "E 512KiB"
+
+config STM32F7_FLASH_OVERRIDE_G
+			bool "G 1024KiB"
+
+config STM32F7_FLASH_OVERRIDE_I
+			bool "I 2048KiB"
+
+endchoice # "Overrdide Flash Size Designator"
+
+menu "STM32 Peripheral Support"
+
+# These "hidden" settings determine is a peripheral option is available for the
+# selection MCU
+
+config STM32F7_HAVE_LTDC
+	bool
 	default n
 
-config STM32F7_TIM13
-	bool "TIM13"
+config STM32F7_HAVE_FSMC
+	bool
 	default n
 
-config STM32F7_TIM14
-	bool "TIM14"
+
+config STM32F7_HAVE_ETHRNET
+	bool
 	default n
 
-config STM32F7_TIM15
-	bool "TIM15"
+config STM32F7_HAVE_RNG
+	bool
 	default n
 
-config STM32F7_USART1
-	bool "USART1"
+config STM32F7_HAVE_SPI5
+	bool
 	default n
-	select USART1_SERIALDRIVER
-	select ARCH_HAVE_SERIAL_TERMIOS
-	select STM32F7_USART
 
-config STM32F7_USART2
-	bool "USART2"
+config STM32F7_HAVE_SPI6
+	bool
 	default n
-	select USART2_SERIALDRIVER
-	select ARCH_HAVE_SERIAL_TERMIOS
-	select STM32F7_USART
 
-config STM32F7_USART3
-	bool "USART3"
+config STM32F7_HAVE_SDMMC2
+	bool
 	default n
-	select ARCH_HAVE_SERIAL_TERMIOS
-	select USART3_SERIALDRIVER
-	select STM32F7_USART
 
-config STM32F7_UART4
-	bool "UART4"
+config STM32F7_HAVE_ADC1_DMA
+	bool
 	default n
-	select ARCH_HAVE_SERIAL_TERMIOS
-	select UART4_SERIALDRIVER
-	select STM32F7_USART
 
-config STM32F7_UART5
-	bool "UART5"
+config STM32F7_HAVE_ADC2_DMA
+	bool
 	default n
-	select ARCH_HAVE_SERIAL_TERMIOS
-	select UART5_SERIALDRIVER
-	select STM32F7_USART
 
-config STM32F7_USART6
-	bool "USART6"
+config STM32F7_HAVE_ADC3_DMA
+	bool
 	default n
-	select ARCH_HAVE_SERIAL_TERMIOS
-	select USART6_SERIALDRIVER
-	select STM32F7_USART
 
-config STM32F7_UART7
-	bool "UART7"
+
+config STM32F7_HAVE_CAN3
+	bool
 	default n
-	select ARCH_HAVE_SERIAL_TERMIOS
-	select UART7_SERIALDRIVER
-	select STM32F7_USART
 
-config STM32F7_UART8
-	bool "UART8"
+config STM32F7_HAVE_DCMI
+	bool
+	default n
+
+config STM32F7_HAVE_DSIHOST
+	bool
+	default n
+
+config STM32F7_HAVE_LTDC
+	bool
+	default n
+
+config STM32F7_HAVE_DMA2D
+	bool
+	default n
+
+config STM32F7_HAVE_JPEG
+	bool
+	default n
+
+config STM32F7_HAVE_CRYP
+	bool
+	default n
+
+config STM32F7_HAVE_HASH
+	bool
+	default n
+
+config STM32F7_HAVE_DFSDM1
+	bool
+	default n
+
+# These "hidden" settings are the OR of individual peripheral selections
+# indicating that the general capabilitiy is required.
+
+config STM32F7_ADC
+	bool
+	default n
+
+config STM32F7_CAN
+	bool
+	default n
+
+config STM32F7_DAC
+	bool
+	default n
+
+config STM32F7_DMA
+	bool
+	default n
+
+config STM32F7_I2C
+	bool
+	default n
+
+config STM32F7_SAI
+	bool
+	default n
+
+config STM32F7_SDMMC
+	bool
+	default n
+
+config STM32F7_SPI
+	bool
+	default n
+
+config STM32F7_TIM
+	bool
+	default n
+
+config STM32F7_USART
+	bool
+	default n
+
+# These are the peripheral selections proper
+
+config STM32F7_ADC1
+	bool "ADC1"
+	default n
+	select STM32F7_ADC
+	select STM32F7_HAVE_ADC1_DMA if STM32F7_DMA1
+	select STM32F7_HAVE_ADC1_DMA if STM32F7_DMA2
+
+config STM32F7_ADC2
+	bool "ADC2"
+	default n
+	select STM32F7_ADC
+	select STM32F7_HAVE_ADC2_DMA if STM32F7_DMA2
+
+config STM32F7_ADC3
+	bool "ADC3"
+	default n
+	select STM32F7_ADC
+	select STM32F7_HAVE_ADC1_DMA if STM32F7_DMA1
+	select STM32F7_HAVE_ADC1_DMA if STM32F7_DMA2
+
+config STM32F7_BKPSRAM
+	bool "Enable BKP RAM Domain"
+	default n
+
+config STM32F7_CAN1
+	bool "CAN1"
+	default n
+	select CAN
+	select STM32F7_CAN
+
+config STM32F7_CAN2
+	bool "CAN2"
+	default n
+	select CAN
+	select STM32F7_CAN
+
+config STM32F7_CAN3
+	bool "CAN3"
+	default n
+	select CAN
+	select STM32F7_CAN
+	depends on STM32F7_HAVE_CAN3
+
+config STM32F7_CEC
+	bool "CEC"
+	default n
+	depends on STM32F7_VALUELINE
+
+config STM32F7_CRC
+	bool "CRC"
+	default n
+
+config STM32F7_CRYP
+	bool "CRYP"
+	depends on STM32F7_HAVE_CRYP
+	default n
+
+config STM32F7_DFSDM1
+	bool "DFSDM1"
+	default n
+	depends on STM32F7_HAVE_DFSDM1
+	select ARCH_HAVE_DFSDM1
+
+config STM32F7_DMA1
+	bool "DMA1"
+	default n
+	select STM32F7_DMA
+	select ARCH_DMA
+
+config STM32F7_DMA2
+	bool "DMA2"
+	default n
+	select STM32F7_DMA
+	select ARCH_DMA
+
+config STM32F7_DAC1
+	bool "DAC1"
+	default n
+	select STM32F7_DAC
+
+config STM32F7_DAC2
+	bool "DAC2"
+	default n
+	select STM32F7_DAC
+
+config STM32F7_DCMI
+	bool "DCMI"
+	default n
+	depends on STM32F7_HAVE_DCMI
+	---help---
+		The devices embed a camera interface that can connect with camera
+		modules and CMOS sensors through an 8-bit to 14-bit parallel interface,
+		 to receive video data.
+
+config STM32F7_DSIHOST
+	bool "DSIHOST"
+	default n
+	depends on STM32F7_HAVE_DSIHOST
+	---help---
+		The DSI Host is a dedicated peripheral for interfacing with MIPI® DSI
+		 compliant displays.
+
+config STM32F7_DMA2D
+	bool "DMA2D"
+	default n
+	depends on STM32F7_HAVE_DMA2D
+	---help---
+		The STM32 DMA2D is an Chrom-Art Accelerator for image manipulation
+		available on the STM32 F7 devices.
+
+config STM32F7_JPEG
+	bool "JPEG"
+	default n
+	depends on STM32F7_HAVE_JPEG
+	---help---
+		The JPEG codec provides an fast and simple hardware compressor and
+		 decompressor of JPEG images with full management of JPEG headers.
+
+config STM32F7_ETHMAC
+	bool "Ethernet MAC"
+	default n
+	depends on STM32F7_HAVE_ETHRNET
+	select NETDEVICES
+	select ARCH_HAVE_PHY
+
+config STM32F7_FSMC
+	bool "FSMC"
+	depends on STM32F7_HAVE_FSMC
+	default n
+
+config STM32F7_HASH
+	bool "HASH"
+	default n
+	depends on STM32F7_HAVE_HASH
+	select ARCH_HAVE_HASH
+
+config STM32F7_CEC
+	bool "HDMI-CEC"
+	default n
+
+config STM32F7_I2C1
+	bool "I2C1"
+	default n
+	select STM32F7_I2C
+
+config STM32F7_I2C2
+	bool "I2C2"
+	default n
+	select STM32F7_I2C
+
+config STM32F7_I2C3
+	bool "I2C3"
+	default n
+	select STM32F7_I2C
+
+config STM32F7_I2C4
+	bool "I2C4"
+	default n
+	select STM32F7_I2C
+
+config STM32F7_LPTIM1
+	bool "Low-power timer 1"
+	default n
+
+config STM32F7_LTDC
+	bool "LTDC"
+	default n
+	depends on STM32F7_HAVE_LTDC
+	---help---
+		The STM32 LTDC is an LCD-TFT Display Controller available on
+		the STM32F429 and STM32F439 devices.  It is a standard parallel
+		video interface (HSYNC, VSYNC, etc.) for controlling TFT
+		LCD displays.
+
+config STM32F7_OTGFS
+	bool "OTG FS"
+	default n
+	select USBHOST_HAVE_ASYNCH if USBHOST
+
+config STM32F7_OTGHS
+	bool "OTG HS"
+	default n
+	select USBHOST_HAVE_ASYNCH if USBHOST
+
+config STM32F7_QUADSPI
+	bool "QuadSPI"
+	default n
+
+config STM32F7_PWR
+	bool "PWR"
+	default n
+
+config STM32F7_RNG
+	bool "RNG"
+	default n
+	depends on STM32F7_HAVE_RNG
+	select ARCH_HAVE_RNG
+
+config STM32F7_SAI1
+	bool "SAI1"
+	default n
+	select STM32F7_SAI
+
+config STM32F7_SAI2
+	bool "SAI2"
+	default n
+	select STM32F7_SAI
+
+config STM32F7_SDMMC1
+	bool "SDMMC1"
+	default n
+	select STM32F7_SDMMC
+	select ARCH_HAVE_SDIO
+	select ARCH_HAVE_SDIOWAIT_WRCOMPLETE
+	select SDIO_PREFLIGHT
+
+config STM32F7_SDMMC2
+	bool "SDMMC2"
+	default n
+	depends on STM32F7_HAVE_SDMMC2
+	select STM32F7_SDMMC
+	select ARCH_HAVE_SDIO
+	select ARCH_HAVE_SDIOWAIT_WRCOMPLETE
+	select SDIO_PREFLIGHT
+
+config STM32F7_SPDIFRX
+	bool "SPDIFRX"
+	default n
+
+config STM32F7_SPI1
+	bool "SPI1"
+	default n
+	select SPI
+	select STM32F7_SPI
+
+config STM32F7_SPI2
+	bool "SPI2"
+	default n
+	select SPI
+	select STM32F7_SPI
+
+config STM32F7_SPI3
+	bool "SPI3"
+	default n
+	select SPI
+	select STM32F7_SPI
+
+config STM32F7_SPI4
+	bool "SPI4"
+	default n
+	select SPI
+	select STM32F7_SPI
+
+config STM32F7_SPI5
+	bool "SPI5"
+	default n
+	depends on STM32F7_HAVE_SPI5
+	select SPI
+	select STM32F7_SPI
+
+config STM32F7_SPI6
+	bool "SPI6"
+	default n
+	depends on STM32F7_HAVE_SPI6
+	select SPI
+	select STM32F7_SPI
+
+config STM32F7_TIM1
+	bool "TIM1"
+	default n
+	select STM32F7_TIM
+
+config STM32F7_TIM2
+	bool "TIM2"
+	default n
+	select STM32F7_TIM
+
+config STM32F7_TIM3
+	bool "TIM3"
+	default n
+	select STM32F7_TIM
+
+config STM32F7_TIM4
+	bool "TIM4"
+	default n
+	select STM32F7_TIM
+
+config STM32F7_TIM5
+	bool "TIM5"
+	default n
+	select STM32F7_TIM
+
+config STM32F7_TIM6
+	bool "TIM6"
+	default n
+	select STM32F7_TIM
+
+config STM32F7_TIM7
+	bool "TIM7"
+	default n
+	select STM32F7_TIM
+
+config STM32F7_TIM8
+	bool "TIM8"
+	default n
+	select STM32F7_TIM
+
+config STM32F7_TIM9
+	bool "TIM9"
+	default n
+	select STM32F7_TIM
+
+config STM32F7_TIM10
+	bool "TIM10"
+	default n
+	select STM32F7_TIM
+
+config STM32F7_TIM11
+	bool "TIM11"
+	default n
+	select STM32F7_TIM
+
+config STM32F7_TIM12
+	bool "TIM12"
+	default n
+	select STM32F7_TIM
+
+config STM32F7_TIM13
+	bool "TIM13"
+	default n
+	select STM32F7_TIM
+
+config STM32F7_TIM14
+	bool "TIM14"
+	default n
+	select STM32F7_TIM
+
+config STM32F7_USART1
+	bool "USART1"
+	default n
+	select USART1_SERIALDRIVER
+	select ARCH_HAVE_SERIAL_TERMIOS
+	select STM32F7_USART
+
+config STM32F7_USART2
+	bool "USART2"
+	default n
+	select USART2_SERIALDRIVER
+	select ARCH_HAVE_SERIAL_TERMIOS
+	select STM32F7_USART
+
+config STM32F7_USART3
+	bool "USART3"
+	default n
+	select ARCH_HAVE_SERIAL_TERMIOS
+	select USART3_SERIALDRIVER
+	select STM32F7_USART
+
+config STM32F7_UART4
+	bool "UART4"
+	default n
+	select ARCH_HAVE_SERIAL_TERMIOS
+	select UART4_SERIALDRIVER
+	select STM32F7_USART
+
+config STM32F7_UART5
+	bool "UART5"
+	default n
+	select ARCH_HAVE_SERIAL_TERMIOS
+	select UART5_SERIALDRIVER
+	select STM32F7_USART
+
+config STM32F7_USART6
+	bool "USART6"
+	default n
+	select ARCH_HAVE_SERIAL_TERMIOS
+	select USART6_SERIALDRIVER
+	select STM32F7_USART
+
+config STM32F7_UART7
+	bool "UART7"
+	default n
+	select ARCH_HAVE_SERIAL_TERMIOS
+	select UART7_SERIALDRIVER
+	select STM32F7_USART
+
+config STM32F7_UART8
+	bool "UART8"
+	default n
+	select ARCH_HAVE_SERIAL_TERMIOS
+	select UART8_SERIALDRIVER
+	select STM32F7_USART
+
+config STM32F7_IWDG
+	bool "IWDG"
+	default n
+	select WATCHDOG
+
+config STM32F7_WWDG
+	bool "WWDG"
+	default n
+	select WATCHDOG
+
+endmenu
+
+menu "U[S]ART Configuration"
+	depends on STM32F7_USART
+
+config USART1_RS485
+	bool "RS-485 on USART1"
+	default n
+	depends on STM32F7_USART1
+	---help---
+		Enable RS-485 interface on USART1. Your board config will have to
+		provide GPIO_USART1_RS485_DIR pin definition. Currently it cannot be
+		used with USART1_RXDMA.
+
+config USART1_RS485_DIR_POLARITY
+	int "USART1 RS-485 DIR pin polarity"
+	default 1
+	range 0 1
+	depends on USART1_RS485
+	---help---
+		Polarity of DIR pin for RS-485 on USART1. Set to state on DIR pin which
+		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
+config USART1_RXDMA
+	bool "USART1 Rx DMA"
+	default n
+	depends on STM32F7_USART1 && STM32F7_DMA1
+	---help---
+		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+
+config USART2_RS485
+	bool "RS-485 on USART2"
+	default n
+	depends on STM32F7_USART2
+	---help---
+		Enable RS-485 interface on USART2. Your board config will have to
+		provide GPIO_USART2_RS485_DIR pin definition. Currently it cannot be
+		used with USART2_RXDMA.
+
+config USART2_RS485_DIR_POLARITY
+	int "USART2 RS-485 DIR pin polarity"
+	default 1
+	range 0 1
+	depends on USART2_RS485
+	---help---
+		Polarity of DIR pin for RS-485 on USART2. Set to state on DIR pin which
+		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
+config USART2_RXDMA
+	bool "USART2 Rx DMA"
+	default n
+	depends on STM32F7_USART2 && STM32F7_DMA1
+	---help---
+		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+
+config USART3_RS485
+	bool "RS-485 on USART3"
+	default n
+	depends on STM32F7_USART3
+	---help---
+		Enable RS-485 interface on USART3. Your board config will have to
+		provide GPIO_USART3_RS485_DIR pin definition. Currently it cannot be
+		used with USART3_RXDMA.
+
+config USART3_RS485_DIR_POLARITY
+	int "USART3 RS-485 DIR pin polarity"
+	default 1
+	range 0 1
+	depends on USART3_RS485
+	---help---
+		Polarity of DIR pin for RS-485 on USART3. Set to state on DIR pin which
+		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
+config USART3_RXDMA
+	bool "USART3 Rx DMA"
+	default n
+	depends on STM32F7_USART3 && STM32F7_DMA1
+	---help---
+		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+
+config UART4_RS485
+	bool "RS-485 on UART4"
+	default n
+	depends on STM32F7_UART4
+	---help---
+		Enable RS-485 interface on UART4. Your board config will have to
+		provide GPIO_UART4_RS485_DIR pin definition. Currently it cannot be
+		used with UART4_RXDMA.
+
+config UART4_RS485_DIR_POLARITY
+	int "UART4 RS-485 DIR pin polarity"
+	default 1
+	range 0 1
+	depends on UART4_RS485
+	---help---
+		Polarity of DIR pin for RS-485 on UART4. Set to state on DIR pin which
+		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
+config UART4_RXDMA
+	bool "UART4 Rx DMA"
+	default n
+	depends on STM32F7_UART4 && STM32F7_DMA1
+	---help---
+		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+
+config UART5_RS485
+	bool "RS-485 on UART5"
+	default n
+	depends on STM32F7_UART5
+	---help---
+		Enable RS-485 interface on UART5. Your board config will have to
+		provide GPIO_UART5_RS485_DIR pin definition. Currently it cannot be
+		used with UART5_RXDMA.
+
+config UART5_RS485_DIR_POLARITY
+	int "UART5 RS-485 DIR pin polarity"
+	default 1
+	range 0 1
+	depends on UART5_RS485
+	---help---
+		Polarity of DIR pin for RS-485 on UART5. Set to state on DIR pin which
+		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
+config UART5_RXDMA
+	bool "UART5 Rx DMA"
+	default n
+	depends on STM32F7_UART5 && STM32F7_DMA1
+	---help---
+		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+
+config USART6_RS485
+	bool "RS-485 on USART6"
+	default n
+	depends on STM32F7_USART6
+	---help---
+		Enable RS-485 interface on USART6. Your board config will have to
+		provide GPIO_USART6_RS485_DIR pin definition. Currently it cannot be
+		used with USART6_RXDMA.
+
+config USART6_RS485_DIR_POLARITY
+	int "USART6 RS-485 DIR pin polarity"
+	default 1
+	range 0 1
+	depends on USART6_RS485
+	---help---
+		Polarity of DIR pin for RS-485 on USART6. Set to state on DIR pin which
+		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
+config USART6_RXDMA
+	bool "USART6 Rx DMA"
+	default n
+	depends on STM32F7_USART6 && STM32F7_DMA2
+	---help---
+		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+
+config UART7_RS485
+	bool "RS-485 on UART7"
+	default n
+	depends on STM32F7_UART7
+	---help---
+		Enable RS-485 interface on UART7. Your board config will have to
+		provide GPIO_UART7_RS485_DIR pin definition. Currently it cannot be
+		used with UART7_RXDMA.
+
+config UART7_RS485_DIR_POLARITY
+	int "UART7 RS-485 DIR pin polarity"
+	default 1
+	range 0 1
+	depends on UART7_RS485
+	---help---
+		Polarity of DIR pin for RS-485 on UART7. Set to state on DIR pin which
+		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
+config UART7_RXDMA
+	bool "UART7 Rx DMA"
+	default n
+	depends on STM32F7_UART7 && STM32F7_DMA2
+	---help---
+		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+
+config UART8_RS485
+	bool "RS-485 on UART8"
+	default n
+	depends on STM32F7_UART8
+	---help---
+		Enable RS-485 interface on UART8. Your board config will have to
+		provide GPIO_UART8_RS485_DIR pin definition. Currently it cannot be
+		used with UART8_RXDMA.
+
+config UART8_RS485_DIR_POLARITY
+	int "UART8 RS-485 DIR pin polarity"
+	default 1
+	range 0 1
+	depends on UART8_RS485
+	---help---
+		Polarity of DIR pin for RS-485 on UART8. Set to state on DIR pin which
+		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
+config UART8_RXDMA
+	bool "UART8 Rx DMA"
+	default n
+	depends on STM32F7_UART8 && STM32F7_DMA2
+	---help---
+		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+
+config SERIAL_DISABLE_REORDERING
+	bool "Disable reordering of ttySx devices."
+	depends on STM32F7_USART1 || STM32F7_USART2 || STM32F7_USART3 || STM32F7_UART4 || STM32F7_UART5 || STM32F7_USART6 || STM32F7_UART7 || STM32F7_UART8
+	default n
+	---help---
+		NuttX per default reorders the serial ports (/dev/ttySx) so that the
+		console is always on /dev/ttyS0. If more than one UART is in use this
+		can, however, have the side-effect that all port mappings
+		(hardware USART1 -> /dev/ttyS0) change if the console is moved to another
+		UART. This is in particular relevant if a project uses the USB console
+		in some configs and a serial console in other configs, but does not
+		want the side effect of having all serial port names change when just
+		the console is moved from serial to USB.
+
+config STM32F7_FLOWCONTROL_BROKEN
+	bool "Use Software UART RTS flow control"
+	depends on STM32F7_USART
+	default n
+	---help---
+		Enable UART RTS flow control using Software. Because STM
+		Current STM32 have broken HW based RTS behavior (they assert
+		nRTS after every byte received)  Enable this setting workaround
+		this issue by useing software based management of RTS
+
+config STM32F7_USART_BREAKS
+	bool "Add TIOxSBRK to support sending Breaks"
+	depends on STM32F7_USART
+	default n
+	---help---
+		Add TIOCxBRK routines to send a line break per the STM32 manual, the
+		break will be a pulse based on the value M. This is not a BSD compatible
+		break.
+
+config STM32F7_SERIALBRK_BSDCOMPAT
+	bool "Use GPIO To send Break"
+	depends on STM32F7_USART && STM32F7_USART_BREAKS
+	default n
+	---help---
+		Enable using GPIO on the TX pin to send a BSD compatible break:
+		TIOCSBRK will start the break and TIOCCBRK will end the break.
+		The current STM32 U[S]ARTS have no way to leave the break (TX=LOW)
+		on because the SW starts the break and then the HW automatically clears
+		the break. This makes it is difficult to sent a long break.
+
+endmenu # U[S]ART Configuration
+
+menu "SPI Configuration"
+	depends on STM32F7_SPI
+
+config STM32F7_SPI_INTERRUPTS
+	bool "Interrupt driver SPI"
+	default n
+	---help---
+		Select to enable interrupt driven SPI support. Non-interrupt-driven,
+		poll-waiting is recommended if the interrupt rate would be to high in
+		the interrupt driven case.
+
+config STM32F7_SPI_DMA
+	bool "SPI DMA"
+	default n
+	---help---
+		Use DMA to improve SPI transfer performance.  Cannot be used with STM32F7_SPI_INTERRUPT.
+
+endmenu # "SPI Configuration"
+
+menu "I2C Configuration"
+	depends on STM32F7_I2C
+
+config STM32F7_I2C_DYNTIMEO
+	bool "Use dynamic timeouts"
+	default n
+	depends on STM32F7_I2C
+
+config STM32F7_I2C_DYNTIMEO_USECPERBYTE
+	int "Timeout Microseconds per Byte"
+	default 500
+	depends on STM32F7_I2C_DYNTIMEO
+
+config STM32F7_I2C_DYNTIMEO_STARTSTOP
+	int "Timeout for Start/Stop (Milliseconds)"
+	default 1000
+	depends on STM32F7_I2C_DYNTIMEO
+
+config STM32F7_I2CTIMEOSEC
+	int "Timeout seconds"
+	default 0
+	depends on STM32F7_I2C
+
+config STM32F7_I2CTIMEOMS
+	int "Timeout Milliseconds"
+	default 500
+	depends on STM32F7_I2C && !STM32F7_I2C_DYNTIMEO
+
+config STM32F7_I2CTIMEOTICKS
+	int "Timeout for Done and Stop (ticks)"
+	default 500
+	depends on STM32F7_I2C && !STM32F7_I2C_DYNTIMEO
+
+config STM32F7_I2C_DUTY16_9
+	bool "Frequency with Tlow/Thigh = 16/9 "
+	default n
+	depends on STM32F7_I2C
+
+endmenu # "I2C Configuration"
+
+menu "SD/MMC Configuration"
+	depends on STM32F7_SDMMC
+
+config STM32F7_SDMMC_XFRDEBUG
+	bool "SDMMC transfer debug"
+	depends on DEBUG_FS_INFO
+	default n
+	---help---
+		Enable special debug instrumentation analyze SDMMC data transfers.
+		This logic is as non-invasive as possible:  It samples SDMMC
+		registers at key points in the data transfer and then dumps all of
+		the registers at the end of the transfer.  If DEBUG_DMA is also
+		enabled, then DMA register will be collected as well.  Requires also
+		DEBUG_FS and CONFIG_DEBUG_INFO.
+
+config STM32F7_SDMMC_DMA
+	bool "Support DMA data transfers"
+	default n
+	select SDIO_DMA
+	depends on STM32F7_DMA
+	---help---
+		Support DMA data transfers.
+
+menu "SDMMC1 Configuration"
+	depends on STM32F7_SDMMC1
+
+config STM32F7_SDMMC1_PRI
+	hex "SDMMC1 interrupt priority"
+	default 128
+	depends on ARCH_IRQPRIO && EXPERIMENTAL
+	---help---
+		Select SDMMC1 interrupt priority.  Default: 128.
+
+config STM32F7_SDMMC1_DMAPRIO
+	hex "SDMMC1 DMA priority"
+	default 0x00010000
+	---help---
+		Select SDMMC1 DMA prority.
+
+		Options are: 0x00000000 low, 0x00010000 medium,
+		0x00020000 high, 0x00030000 very high.  Default: medium.
+
+config SDMMC1_WIDTH_D1_ONLY
+	bool "Use D1 only on SDMMC1"
+	default n
+	---help---
+		Select 1-bit transfer mode.  Default: 4-bit transfer mode.
+
+endmenu # "SDMMC1 Configuration"
+
+menu "SDMMC2 Configuration"
+	depends on STM32F7_SDMMC2
+
+config STM32F7_SDMMC2_PRI
+	hex "SDMMC2 interrupt priority"
+	default 128
+	depends on ARCH_IRQPRIO && EXPERIMENTAL
+	---help---
+		Select SDMMC2 interrupt priority.  Default: 128.
+
+config STM32F7_SDMMC2_DMAPRIO
+	hex "SDMMC2 DMA priority"
+	default 0x00010000
+	---help---
+		Select SDMMC1 DMA prority.
+
+		Options are: 0x00000000 low, 0x00010000 medium,
+		0x00020000 high, 0x00030000 very high.  Default: medium.
+
+config SDMMC2_WIDTH_D1_ONLY
+	bool "Use D1 only on SDMMC2"
+	default n
+	---help---
+		Select 1-bit transfer mode.  Default: 4-bit transfer mode.
+
+endmenu # "SDMMC2 Configuration"
+endmenu # "SD/MMC Configuration"
+
+if STM32F7_BKPSRAM
+
+config STM32F7_BBSRAM
+	bool "BBSRAM File Support"
+	default n
+
+config STM32F7_BBSRAM_FILES
+	int "Max Files to support in BBSRAM"
+	default 4
+
+config STM32F7_SAVE_CRASHDUMP
+	bool "Enable Saving Panic to BBSRAM"
+	default n
+
+endif # STM32F7_BKPSRAM
+
+config STM32F7_HAVE_RTC_COUNTER
+	bool
+	default n
+
+config STM32F7_HAVE_RTC_SUBSECONDS
+	bool
+	default n
+
+config RTC_MAGIC_REG
+	int "The BKP register used to store/check the Magic value to determine if RTC is set already"
+	default 0
+	range  0 31
+	depends on RTC && !STM32F7_HAVE_RTC_COUNTER
+
+config RTC_MAGIC
+	hex "Value used as Magic to determine if RTC is set already"
+	default 0xfacefeee
+	depends on RTC && !STM32F7_HAVE_RTC_COUNTER
+
+choice
+	prompt "RTC clock source"
+	default STM32F7_RTC_LSECLOCK
+	depends on RTC
+
+config STM32F7_RTC_HSECLOCK
+	bool "HSE clock"
+	---help---
+		Drive the RTC with the HSE clock, divided down to 1MHz.
+
+config STM32F7_RTC_LSECLOCK
+	bool "LSE clock"
+	---help---
+		Drive the RTC with the LSE clock
+
+config STM32F7_RTC_LSICLOCK
+	bool "LSI clock"
+	---help---
+		Drive the RTC with the LSI clock
+
+endchoice #"RTC clock source"
+
+config STM32F7_CUSTOM_CLOCKCONFIG
+		bool "Custom clock configuration"
+	default n
+	---help---
+		Enables special, board-specific STM32 clock configuration.
+
+config STM32F7_DTCMEXCLUDE
+	bool "Exclude DTCM SRAM from the heap"
+	default y if ELF
+	depends on ARMV7M_HAVE_DTCM
+	---help---
+		Exclude DTCM SRAM from the HEAP because it appears to be impossible
+		to execute ELF modules from DTCM RAM (REVISIT!).
+
+config STM32F7_DTCM_PROCFS
+	bool "DTCM SRAM PROCFS support"
+	default n
+	depends on ARMV7M_DTCM && FS_PROCFS
+	---help---
+		Select to build in support for /proc/dtcm.  Reading from /proc/dtcm
+		will provide statistics about DTCM memory use similar to what you
+		would get from mallinfo() for the user heap.
+
+config STM32F7_DMACAPABLE
+	bool "Workaround non-DMA capable memory"
+	depends on ARCH_DMA
+	default y if !STM32F7_CCMEXCLUDE
+	default n if STM32F7_CCMEXCLUDE
+	---help---
+		This option enables the DMA interface stm32_dmacapable that can be
+		used to check if it is possible to do DMA from the selected address.
+		Drivers then may use this information to determine if they should
+		attempt the DMA or fall back to a different transfer method.
+
+menu "Timer Configuration"
+
+config STM32F7_TIM1_PWM
+	bool "TIM1 PWM"
+	default n
+	depends on STM32F7_TIM1
+	select ARCH_HAVE_PWM_PULSECOUNT
+	---help---
+		Reserve timer 1 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If STM32F7_TIM1
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+if STM32F7_TIM1_PWM
+
+config STM32F7_TIM1_MODE
+	int "TIM1 Mode"
+	default 0
+	range 0 4
+	---help---
+		Specifies the timer mode.
+
+if STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM1_CHANNEL1
+	bool "TIM1 Channel 1"
+	default n
+	---help---
+		Enables channel 1.
+
+if STM32F7_TIM1_CHANNEL1
+
+config STM32F7_TIM1_CH1MODE
+	int "TIM1 Channel 1 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM1_CH1OUT
+	bool "TIM1 Channel 1 Output"
+	default n
+	---help---
+		Enables channel 1 output.
+
+endif # STM32F7_TIM1_CHANNEL1
+
+config STM32F7_TIM1_CHANNEL2
+	bool "TIM1 Channel 2"
+	default n
+	---help---
+		Enables channel 2.
+
+if STM32F7_TIM1_CHANNEL2
+
+config STM32F7_TIM1_CH2MODE
+	int "TIM1 Channel 2 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM1_CH2OUT
+	bool "TIM1 Channel 2 Output"
+	default n
+	---help---
+		Enables channel 2 output.
+
+endif # STM32F7_TIM1_CHANNEL2
+
+config STM32F7_TIM1_CHANNEL3
+	bool "TIM1 Channel 3"
+	default n
+	---help---
+		Enables channel 3.
+
+if STM32F7_TIM1_CHANNEL3
+
+config STM32F7_TIM1_CH3MODE
+	int "TIM1 Channel 3 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM1_CH3OUT
+	bool "TIM1 Channel 3 Output"
+	default n
+	---help---
+		Enables channel 3 output.
+
+endif # STM32F7_TIM1_CHANNEL3
+
+config STM32F7_TIM1_CHANNEL4
+	bool "TIM1 Channel 4"
+	default n
+	---help---
+		Enables channel 4.
+
+if STM32F7_TIM1_CHANNEL4
+
+config STM32F7_TIM1_CH4MODE
+	int "TIM1 Channel 4 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM1_CH4OUT
+	bool "TIM1 Channel 4 Output"
+	default n
+	---help---
+		Enables channel 4 output.
+
+endif # STM32F7_TIM1_CHANNEL4
+
+endif # STM32F7_PWM_MULTICHAN
+
+if !STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM1_CHANNEL
+	int "TIM1 PWM Output Channel"
+	default 1
+	range 1 4
+	---help---
+		If TIM1 is enabled for PWM usage, you also need specifies the timer output
+		channel {1,..,4}
+
+config STM32F7_TIM1_CHMODE
+	int "TIM1 Channel Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+endif # !STM32F7_PWM_MULTICHAN
+
+endif # STM32F7_TIM1_PWM
+
+config STM32F7_TIM2_PWM
+	bool "TIM2 PWM"
+	default n
+	depends on STM32F7_TIM2
+	select ARCH_HAVE_PWM_PULSECOUNT
+	---help---
+		Reserve timer 2 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If STM32F7_TIM2
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+if STM32F7_TIM2_PWM
+
+config STM32F7_TIM2_MODE
+	int "TIM2 Mode"
+	default 0
+	range 0 4
+	---help---
+		Specifies the timer mode.
+
+if STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM2_CHANNEL1
+	bool "TIM2 Channel 1"
+	default n
+	---help---
+		Enables channel 1.
+
+if STM32F7_TIM2_CHANNEL1
+
+config STM32F7_TIM2_CH1MODE
+	int "TIM2 Channel 1 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM2_CH1OUT
+	bool "TIM2 Channel 1 Output"
+	default n
+	---help---
+		Enables channel 1 output.
+
+endif # STM32F7_TIM2_CHANNEL1
+
+config STM32F7_TIM2_CHANNEL2
+	bool "TIM2 Channel 2"
+	default n
+	---help---
+		Enables channel 2.
+
+if STM32F7_TIM2_CHANNEL2
+
+config STM32F7_TIM2_CH2MODE
+	int "TIM2 Channel 2 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM2_CH2OUT
+	bool "TIM2 Channel 2 Output"
+	default n
+	---help---
+		Enables channel 2 output.
+
+endif # STM32F7_TIM2_CHANNEL2
+
+config STM32F7_TIM2_CHANNEL3
+	bool "TIM2 Channel 3"
+	default n
+	---help---
+		Enables channel 3.
+
+if STM32F7_TIM2_CHANNEL3
+
+config STM32F7_TIM2_CH3MODE
+	int "TIM2 Channel 3 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM2_CH3OUT
+	bool "TIM2 Channel 3 Output"
+	default n
+	---help---
+		Enables channel 3 output.
+
+endif # STM32F7_TIM2_CHANNEL3
+
+config STM32F7_TIM2_CHANNEL4
+	bool "TIM2 Channel 4"
+	default n
+	---help---
+		Enables channel 4.
+
+if STM32F7_TIM2_CHANNEL4
+
+config STM32F7_TIM2_CH4MODE
+	int "TIM2 Channel 4 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM2_CH4OUT
+	bool "TIM2 Channel 4 Output"
+	default n
+	---help---
+		Enables channel 4 output.
+
+endif # STM32F7_TIM2_CHANNEL4
+
+endif # STM32F7_PWM_MULTICHAN
+
+if !STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM2_CHANNEL
+	int "TIM2 PWM Output Channel"
+	default 1
+	range 1 4
+	---help---
+		If TIM2 is enabled for PWM usage, you also need specifies the timer output
+		channel {1,..,4}
+
+config STM32F7_TIM2_CHMODE
+	int "TIM2 Channel Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+endif # !STM32F7_PWM_MULTICHAN
+
+endif # STM32F7_TIM2_PWM
+
+config STM32F7_TIM3_PWM
+	bool "TIM3 PWM"
+	default n
+	depends on STM32F7_TIM3
+	select ARCH_HAVE_PWM_PULSECOUNT
+	---help---
+		Reserve timer 3 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If STM32F7_TIM3
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+if STM32F7_TIM3_PWM
+
+config STM32F7_TIM3_MODE
+	int "TIM3 Mode"
+	default 0
+	range 0 4
+	---help---
+		Specifies the timer mode.
+
+if STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM3_CHANNEL1
+	bool "TIM3 Channel 1"
+	default n
+	---help---
+		Enables channel 1.
+
+if STM32F7_TIM3_CHANNEL1
+
+config STM32F7_TIM3_CH1MODE
+	int "TIM3 Channel 1 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM3_CH1OUT
+	bool "TIM3 Channel 1 Output"
+	default n
+	---help---
+		Enables channel 1 output.
+
+endif # STM32F7_TIM3_CHANNEL1
+
+config STM32F7_TIM3_CHANNEL2
+	bool "TIM3 Channel 2"
+	default n
+	---help---
+		Enables channel 2.
+
+if STM32F7_TIM3_CHANNEL2
+
+config STM32F7_TIM3_CH2MODE
+	int "TIM3 Channel 2 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM3_CH2OUT
+	bool "TIM3 Channel 2 Output"
+	default n
+	---help---
+		Enables channel 2 output.
+
+endif # STM32F7_TIM3_CHANNEL2
+
+config STM32F7_TIM3_CHANNEL3
+	bool "TIM3 Channel 3"
+	default n
+	---help---
+		Enables channel 3.
+
+if STM32F7_TIM3_CHANNEL3
+
+config STM32F7_TIM3_CH3MODE
+	int "TIM3 Channel 3 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM3_CH3OUT
+	bool "TIM3 Channel 3 Output"
+	default n
+	---help---
+		Enables channel 3 output.
+
+endif # STM32F7_TIM3_CHANNEL3
+
+config STM32F7_TIM3_CHANNEL4
+	bool "TIM3 Channel 4"
+	default n
+	---help---
+		Enables channel 4.
+
+if STM32F7_TIM3_CHANNEL4
+
+config STM32F7_TIM3_CH4MODE
+	int "TIM3 Channel 4 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM3_CH4OUT
+	bool "TIM3 Channel 4 Output"
+	default n
+	---help---
+		Enables channel 4 output.
+
+endif # STM32F7_TIM3_CHANNEL4
+
+endif # STM32F7_PWM_MULTICHAN
+
+if !STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM3_CHANNEL
+	int "TIM3 PWM Output Channel"
+	default 1
+	range 1 4
+	---help---
+		If TIM3 is enabled for PWM usage, you also need specifies the timer output
+		channel {1,..,4}
+
+config STM32F7_TIM3_CHMODE
+	int "TIM3 Channel Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+endif # !STM32F7_PWM_MULTICHAN
+
+endif # STM32F7_TIM3_PWM
+
+config STM32F7_TIM4_PWM
+	bool "TIM4 PWM"
+	default n
+	depends on STM32F7_TIM4
+	select ARCH_HAVE_PWM_PULSECOUNT
+	---help---
+		Reserve timer 4 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If STM32F7_TIM4
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+if STM32F7_TIM4_PWM
+
+config STM32F7_TIM4_MODE
+	int "TIM4 Mode"
+	default 0
+	range 0 4
+	---help---
+		Specifies the timer mode.
+
+if STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM4_CHANNEL1
+	bool "TIM4 Channel 1"
+	default n
+	---help---
+		Enables channel 1.
+
+if STM32F7_TIM4_CHANNEL1
+
+config STM32F7_TIM4_CH1MODE
+	int "TIM4 Channel 1 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM4_CH1OUT
+	bool "TIM4 Channel 1 Output"
+	default n
+	---help---
+		Enables channel 1 output.
+
+endif # STM32F7_TIM4_CHANNEL1
+
+config STM32F7_TIM4_CHANNEL2
+	bool "TIM4 Channel 2"
+	default n
+	---help---
+		Enables channel 2.
+
+if STM32F7_TIM4_CHANNEL2
+
+config STM32F7_TIM4_CH2MODE
+	int "TIM4 Channel 2 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM4_CH2OUT
+	bool "TIM4 Channel 2 Output"
+	default n
+	---help---
+		Enables channel 2 output.
+
+endif # STM32F7_TIM4_CHANNEL2
+
+config STM32F7_TIM4_CHANNEL3
+	bool "TIM4 Channel 3"
+	default n
+	---help---
+		Enables channel 3.
+
+if STM32F7_TIM4_CHANNEL3
+
+config STM32F7_TIM4_CH3MODE
+	int "TIM4 Channel 3 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM4_CH3OUT
+	bool "TIM4 Channel 3 Output"
+	default n
+	---help---
+		Enables channel 3 output.
+
+endif # STM32F7_TIM4_CHANNEL3
+
+config STM32F7_TIM4_CHANNEL4
+	bool "TIM4 Channel 4"
+	default n
+	---help---
+		Enables channel 4.
+
+if STM32F7_TIM4_CHANNEL4
+
+config STM32F7_TIM4_CH4MODE
+	int "TIM4 Channel 4 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM4_CH4OUT
+	bool "TIM4 Channel 4 Output"
+	default n
+	---help---
+		Enables channel 4 output.
+
+endif # STM32F7_TIM4_CHANNEL4
+
+endif # STM32F7_PWM_MULTICHAN
+
+if !STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM4_CHANNEL
+	int "TIM4 PWM Output Channel"
+	default 1
+	range 1 4
+	---help---
+		If TIM4 is enabled for PWM usage, you also need specifies the timer output
+		channel {1,..,4}
+
+config STM32F7_TIM4_CHMODE
+	int "TIM4 Channel Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+endif # !STM32F7_PWM_MULTICHAN
+
+endif # STM32F7_TIM4_PWM
+
+config STM32F7_TIM5_PWM
+	bool "TIM5 PWM"
+	default n
+	depends on STM32F7_TIM5
+	select ARCH_HAVE_PWM_PULSECOUNT
+	---help---
+		Reserve timer 5 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If STM32F7_TIM5
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+if STM32F7_TIM5_PWM
+
+config STM32F7_TIM5_MODE
+	int "TIM5 Mode"
+	default 0
+	range 0 4
+	---help---
+		Specifies the timer mode.
+
+if STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM5_CHANNEL1
+	bool "TIM5 Channel 1"
+	default n
+	---help---
+		Enables channel 1.
+
+if STM32F7_TIM5_CHANNEL1
+
+config STM32F7_TIM5_CH1MODE
+	int "TIM5 Channel 1 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM5_CH1OUT
+	bool "TIM5 Channel 1 Output"
+	default n
+	---help---
+		Enables channel 1 output.
+
+endif # STM32F7_TIM5_CHANNEL1
+
+config STM32F7_TIM5_CHANNEL2
+	bool "TIM5 Channel 2"
+	default n
+	---help---
+		Enables channel 2.
+
+if STM32F7_TIM5_CHANNEL2
+
+config STM32F7_TIM5_CH2MODE
+	int "TIM5 Channel 2 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM5_CH2OUT
+	bool "TIM5 Channel 2 Output"
+	default n
+	---help---
+		Enables channel 2 output.
+
+endif # STM32F7_TIM5_CHANNEL2
+
+config STM32F7_TIM5_CHANNEL3
+	bool "TIM5 Channel 3"
+	default n
+	---help---
+		Enables channel 3.
+
+if STM32F7_TIM5_CHANNEL3
+
+config STM32F7_TIM5_CH3MODE
+	int "TIM5 Channel 3 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM5_CH3OUT
+	bool "TIM5 Channel 3 Output"
+	default n
+	---help---
+		Enables channel 3 output.
+
+endif # STM32F7_TIM5_CHANNEL3
+
+config STM32F7_TIM5_CHANNEL4
+	bool "TIM5 Channel 4"
+	default n
+	---help---
+		Enables channel 4.
+
+if STM32F7_TIM5_CHANNEL4
+
+config STM32F7_TIM5_CH4MODE
+	int "TIM5 Channel 4 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM5_CH4OUT
+	bool "TIM5 Channel 4 Output"
+	default n
+	---help---
+		Enables channel 4 output.
+
+endif # STM32F7_TIM5_CHANNEL4
+
+endif # STM32F7_PWM_MULTICHAN
+
+if !STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM5_CHANNEL
+	int "TIM5 PWM Output Channel"
+	default 1
+	range 1 4
+	---help---
+		If TIM5 is enabled for PWM usage, you also need specifies the timer output
+		channel {1,..,4}
+
+config STM32F7_TIM5_CHMODE
+	int "TIM5 Channel Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+endif # !STM32F7_PWM_MULTICHAN
+
+endif # STM32F7_TIM5_PWM
+
+config STM32F7_TIM8_PWM
+	bool "TIM8 PWM"
+	default n
+	depends on STM32F7_TIM8
+	select ARCH_HAVE_PWM_PULSECOUNT
+	---help---
+		Reserve timer 8 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If STM32F7_TIM8
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+if STM32F7_TIM8_PWM
+
+config STM32F7_TIM8_MODE
+	int "TIM8 Mode"
+	default 0
+	range 0 4
+	---help---
+		Specifies the timer mode.
+
+if STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM8_CHANNEL1
+	bool "TIM8 Channel 1"
+	default n
+	---help---
+		Enables channel 1.
+
+if STM32F7_TIM8_CHANNEL1
+
+config STM32F7_TIM8_CH1MODE
+	int "TIM8 Channel 1 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM8_CH1OUT
+	bool "TIM8 Channel 1 Output"
+	default n
+	---help---
+		Enables channel 1 output.
+
+endif # STM32F7_TIM8_CHANNEL1
+
+config STM32F7_TIM8_CHANNEL2
+	bool "TIM8 Channel 2"
+	default n
+	---help---
+		Enables channel 2.
+
+if STM32F7_TIM8_CHANNEL2
+
+config STM32F7_TIM8_CH2MODE
+	int "TIM8 Channel 2 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM8_CH2OUT
+	bool "TIM8 Channel 2 Output"
+	default n
+	---help---
+		Enables channel 2 output.
+
+endif # STM32F7_TIM8_CHANNEL2
+
+config STM32F7_TIM8_CHANNEL3
+	bool "TIM8 Channel 3"
+	default n
+	---help---
+		Enables channel 3.
+
+if STM32F7_TIM8_CHANNEL3
+
+config STM32F7_TIM8_CH3MODE
+	int "TIM8 Channel 3 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM8_CH3OUT
+	bool "TIM8 Channel 3 Output"
+	default n
+	---help---
+		Enables channel 3 output.
+
+endif # STM32F7_TIM8_CHANNEL3
+
+config STM32F7_TIM8_CHANNEL4
+	bool "TIM8 Channel 4"
+	default n
+	---help---
+		Enables channel 4.
+
+if STM32F7_TIM8_CHANNEL4
+
+config STM32F7_TIM8_CH4MODE
+	int "TIM8 Channel 4 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM8_CH4OUT
+	bool "TIM8 Channel 4 Output"
+	default n
+	---help---
+		Enables channel 4 output.
+
+endif # STM32F7_TIM8_CHANNEL4
+
+endif # STM32F7_PWM_MULTICHAN
+
+if !STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM8_CHANNEL
+	int "TIM8 PWM Output Channel"
+	default 1
+	range 1 4
+	---help---
+		If TIM8 is enabled for PWM usage, you also need specifies the timer output
+		channel {1,..,4}
+
+config STM32F7_TIM8_CHMODE
+	int "TIM8 Channel Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+endif # !STM32F7_PWM_MULTICHAN
+
+endif # STM32F7_TIM8_PWM
+
+config STM32F7_TIM9_PWM
+	bool "TIM9 PWM"
+	default n
+	depends on STM32F7_TIM9
+	select ARCH_HAVE_PWM_PULSECOUNT
+	---help---
+		Reserve timer 9 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If STM32F7_TIM9
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+if STM32F7_TIM9_PWM
+
+if STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM9_CHANNEL1
+	bool "TIM9 Channel 1"
+	default n
+	---help---
+		Enables channel 1.
+
+if STM32F7_TIM9_CHANNEL1
+
+config STM32F7_TIM9_CH1MODE
+	int "TIM9 Channel 1 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM9_CH1OUT
+	bool "TIM9 Channel 1 Output"
+	default n
+	---help---
+		Enables channel 1 output.
+
+endif # STM32F7_TIM9_CHANNEL1
+
+config STM32F7_TIM9_CHANNEL2
+	bool "TIM9 Channel 2"
+	default n
+	---help---
+		Enables channel 2.
+
+if STM32F7_TIM9_CHANNEL2
+
+config STM32F7_TIM9_CH2MODE
+	int "TIM9 Channel 2 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM9_CH2OUT
+	bool "TIM9 Channel 2 Output"
+	default n
+	---help---
+		Enables channel 2 output.
+
+endif # STM32F7_TIM9_CHANNEL2
+
+config STM32F7_TIM9_CHANNEL3
+	bool "TIM9 Channel 3"
+	default n
+	---help---
+		Enables channel 3.
+
+if STM32F7_TIM9_CHANNEL3
+
+config STM32F7_TIM9_CH3MODE
+	int "TIM9 Channel 3 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM9_CH3OUT
+	bool "TIM9 Channel 3 Output"
+	default n
+	---help---
+		Enables channel 3 output.
+
+endif # STM32F7_TIM9_CHANNEL3
+
+config STM32F7_TIM9_CHANNEL4
+	bool "TIM9 Channel 4"
+	default n
+	---help---
+		Enables channel 4.
+
+if STM32F7_TIM9_CHANNEL4
+
+config STM32F7_TIM9_CH4MODE
+	int "TIM9 Channel 4 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM9_CH4OUT
+	bool "TIM9 Channel 4 Output"
+	default n
+	---help---
+		Enables channel 4 output.
+
+endif # STM32F7_TIM9_CHANNEL4
+
+endif # STM32F7_PWM_MULTICHAN
+
+if !STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM9_CHANNEL
+	int "TIM9 PWM Output Channel"
+	default 1
+	range 1 4
+	---help---
+		If TIM9 is enabled for PWM usage, you also need specifies the timer output
+		channel {1,..,4}
+
+config STM32F7_TIM9_CHMODE
+	int "TIM9 Channel Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+endif # !STM32F7_PWM_MULTICHAN
+
+endif # STM32F7_TIM9_PWM
+
+config STM32F7_TIM10_PWM
+	bool "TIM10 PWM"
+	default n
+	depends on STM32F7_TIM10
+	select ARCH_HAVE_PWM_PULSECOUNT
+	---help---
+		Reserve timer 10 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If STM32F7_TIM10
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+if STM32F7_TIM10_PWM
+
+if STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM10_CHANNEL1
+	bool "TIM10 Channel 1"
+	default n
+	---help---
+		Enables channel 1.
+
+if STM32F7_TIM10_CHANNEL1
+
+config STM32F7_TIM10_CH1MODE
+	int "TIM10 Channel 1 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM10_CH1OUT
+	bool "TIM10 Channel 1 Output"
+	default n
+	---help---
+		Enables channel 1 output.
+
+endif # STM32F7_TIM10_CHANNEL1
+
+config STM32F7_TIM10_CHANNEL2
+	bool "TIM10 Channel 2"
+	default n
+	---help---
+		Enables channel 2.
+
+if STM32F7_TIM10_CHANNEL2
+
+config STM32F7_TIM10_CH2MODE
+	int "TIM10 Channel 2 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM10_CH2OUT
+	bool "TIM10 Channel 2 Output"
+	default n
+	---help---
+		Enables channel 2 output.
+
+endif # STM32F7_TIM10_CHANNEL2
+
+config STM32F7_TIM10_CHANNEL3
+	bool "TIM10 Channel 3"
+	default n
+	---help---
+		Enables channel 3.
+
+if STM32F7_TIM10_CHANNEL3
+
+config STM32F7_TIM10_CH3MODE
+	int "TIM10 Channel 3 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM10_CH3OUT
+	bool "TIM10 Channel 3 Output"
+	default n
+	---help---
+		Enables channel 3 output.
+
+endif # STM32F7_TIM10_CHANNEL3
+
+config STM32F7_TIM10_CHANNEL4
+	bool "TIM10 Channel 4"
+	default n
+	---help---
+		Enables channel 4.
+
+if STM32F7_TIM10_CHANNEL4
+
+config STM32F7_TIM10_CH4MODE
+	int "TIM10 Channel 4 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM10_CH4OUT
+	bool "TIM10 Channel 4 Output"
+	default n
+	---help---
+		Enables channel 4 output.
+
+endif # STM32F7_TIM10_CHANNEL4
+
+endif # STM32F7_PWM_MULTICHAN
+
+if !STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM10_CHANNEL
+	int "TIM10 PWM Output Channel"
+	default 1
+	range 1 4
+	---help---
+		If TIM10 is enabled for PWM usage, you also need specifies the timer output
+		channel {1,..,4}
+
+config STM32F7_TIM10_CHMODE
+	int "TIM10 Channel Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+endif # !STM32F7_PWM_MULTICHAN
+
+endif # STM32F7_TIM10_PWM
+
+config STM32F7_TIM11_PWM
+	bool "TIM11 PWM"
+	default n
+	depends on STM32F7_TIM11
+	select ARCH_HAVE_PWM_PULSECOUNT
+	---help---
+		Reserve timer 11 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If STM32F7_TIM11
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+if STM32F7_TIM11_PWM
+
+if STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM11_CHANNEL1
+	bool "TIM11 Channel 1"
+	default n
+	---help---
+		Enables channel 1.
+
+if STM32F7_TIM11_CHANNEL1
+
+config STM32F7_TIM11_CH1MODE
+	int "TIM11 Channel 1 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM11_CH1OUT
+	bool "TIM11 Channel 1 Output"
+	default n
+	---help---
+		Enables channel 1 output.
+
+endif # STM32F7_TIM11_CHANNEL1
+
+config STM32F7_TIM11_CHANNEL2
+	bool "TIM11 Channel 2"
+	default n
+	---help---
+		Enables channel 2.
+
+if STM32F7_TIM11_CHANNEL2
+
+config STM32F7_TIM11_CH2MODE
+	int "TIM11 Channel 2 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM11_CH2OUT
+	bool "TIM11 Channel 2 Output"
+	default n
+	---help---
+		Enables channel 2 output.
+
+endif # STM32F7_TIM11_CHANNEL2
+
+config STM32F7_TIM11_CHANNEL3
+	bool "TIM11 Channel 3"
+	default n
+	---help---
+		Enables channel 3.
+
+if STM32F7_TIM11_CHANNEL3
+
+config STM32F7_TIM11_CH3MODE
+	int "TIM11 Channel 3 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM11_CH3OUT
+	bool "TIM11 Channel 3 Output"
+	default n
+	---help---
+		Enables channel 3 output.
+
+endif # STM32F7_TIM11_CHANNEL3
+
+config STM32F7_TIM11_CHANNEL4
+	bool "TIM11 Channel 4"
+	default n
+	---help---
+		Enables channel 4.
+
+if STM32F7_TIM11_CHANNEL4
+
+config STM32F7_TIM11_CH4MODE
+	int "TIM11 Channel 4 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM11_CH4OUT
+	bool "TIM11 Channel 4 Output"
+	default n
+	---help---
+		Enables channel 4 output.
+
+endif # STM32F7_TIM11_CHANNEL4
+
+endif # STM32F7_PWM_MULTICHAN
+
+if !STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM11_CHANNEL
+	int "TIM11 PWM Output Channel"
+	default 1
+	range 1 4
+	---help---
+		If TIM11 is enabled for PWM usage, you also need specifies the timer output
+		channel {1,..,4}
+
+config STM32F7_TIM11_CHMODE
+	int "TIM11 Channel Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+endif # !STM32F7_PWM_MULTICHAN
+
+endif # STM32F7_TIM11_PWM
+
+config STM32F7_TIM12_PWM
+	bool "TIM12 PWM"
+	default n
+	depends on STM32F7_TIM12
+	select ARCH_HAVE_PWM_PULSECOUNT
+	---help---
+		Reserve timer 12 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If STM32F7_TIM12
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+if STM32F7_TIM12_PWM
+
+if STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM12_CHANNEL1
+	bool "TIM12 Channel 1"
+	default n
+	---help---
+		Enables channel 1.
+
+if STM32F7_TIM12_CHANNEL1
+
+config STM32F7_TIM12_CH1MODE
+	int "TIM12 Channel 1 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM12_CH1OUT
+	bool "TIM12 Channel 1 Output"
+	default n
+	---help---
+		Enables channel 1 output.
+
+endif # STM32F7_TIM12_CHANNEL1
+
+config STM32F7_TIM12_CHANNEL2
+	bool "TIM12 Channel 2"
+	default n
+	---help---
+		Enables channel 2.
+
+if STM32F7_TIM12_CHANNEL2
+
+config STM32F7_TIM12_CH2MODE
+	int "TIM12 Channel 2 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM12_CH2OUT
+	bool "TIM12 Channel 2 Output"
+	default n
+	---help---
+		Enables channel 2 output.
+
+endif # STM32F7_TIM12_CHANNEL2
+
+config STM32F7_TIM12_CHANNEL3
+	bool "TIM12 Channel 3"
+	default n
+	---help---
+		Enables channel 3.
+
+if STM32F7_TIM12_CHANNEL3
+
+config STM32F7_TIM12_CH3MODE
+	int "TIM12 Channel 3 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM12_CH3OUT
+	bool "TIM12 Channel 3 Output"
+	default n
+	---help---
+		Enables channel 3 output.
+
+endif # STM32F7_TIM12_CHANNEL3
+
+config STM32F7_TIM12_CHANNEL4
+	bool "TIM12 Channel 4"
+	default n
+	---help---
+		Enables channel 4.
+
+if STM32F7_TIM12_CHANNEL4
+
+config STM32F7_TIM12_CH4MODE
+	int "TIM12 Channel 4 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM12_CH4OUT
+	bool "TIM12 Channel 4 Output"
+	default n
+	---help---
+		Enables channel 4 output.
+
+endif # STM32F7_TIM12_CHANNEL4
+
+endif # STM32F7_PWM_MULTICHAN
+
+if !STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM12_CHANNEL
+	int "TIM12 PWM Output Channel"
+	default 1
+	range 1 4
+	---help---
+		If TIM12 is enabled for PWM usage, you also need specifies the timer output
+		channel {1,..,4}
+
+config STM32F7_TIM12_CHMODE
+	int "TIM12 Channel Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+endif # !STM32F7_PWM_MULTICHAN
+
+endif # STM32F7_TIM12_PWM
+
+config STM32F7_TIM13_PWM
+	bool "TIM13 PWM"
+	default n
+	depends on STM32F7_TIM13
+	select ARCH_HAVE_PWM_PULSECOUNT
+	---help---
+		Reserve timer 13 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If STM32F7_TIM13
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+if STM32F7_TIM13_PWM
+
+if STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM13_CHANNEL1
+	bool "TIM13 Channel 1"
+	default n
+	---help---
+		Enables channel 1.
+
+if STM32F7_TIM13_CHANNEL1
+
+config STM32F7_TIM13_CH1MODE
+	int "TIM13 Channel 1 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM13_CH1OUT
+	bool "TIM13 Channel 1 Output"
+	default n
+	---help---
+		Enables channel 1 output.
+
+endif # STM32F7_TIM13_CHANNEL1
+
+config STM32F7_TIM13_CHANNEL2
+	bool "TIM13 Channel 2"
+	default n
+	---help---
+		Enables channel 2.
+
+if STM32F7_TIM13_CHANNEL2
+
+config STM32F7_TIM13_CH2MODE
+	int "TIM13 Channel 2 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM13_CH2OUT
+	bool "TIM13 Channel 2 Output"
+	default n
+	---help---
+		Enables channel 2 output.
+
+endif # STM32F7_TIM13_CHANNEL2
+
+config STM32F7_TIM13_CHANNEL3
+	bool "TIM13 Channel 3"
+	default n
+	---help---
+		Enables channel 3.
+
+if STM32F7_TIM13_CHANNEL3
+
+config STM32F7_TIM13_CH3MODE
+	int "TIM13 Channel 3 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM13_CH3OUT
+	bool "TIM13 Channel 3 Output"
+	default n
+	---help---
+		Enables channel 3 output.
+
+endif # STM32F7_TIM13_CHANNEL3
+
+config STM32F7_TIM13_CHANNEL4
+	bool "TIM13 Channel 4"
+	default n
+	---help---
+		Enables channel 4.
+
+if STM32F7_TIM13_CHANNEL4
+
+config STM32F7_TIM13_CH4MODE
+	int "TIM13 Channel 4 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM13_CH4OUT
+	bool "TIM13 Channel 4 Output"
+	default n
+	---help---
+		Enables channel 4 output.
+
+endif # STM32F7_TIM13_CHANNEL4
+
+endif # STM32F7_PWM_MULTICHAN
+
+if !STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM13_CHANNEL
+	int "TIM13 PWM Output Channel"
+	default 1
+	range 1 4
+	---help---
+		If TIM13 is enabled for PWM usage, you also need specifies the timer output
+		channel {1,..,4}
+
+config STM32F7_TIM13_CHMODE
+	int "TIM13 Channel Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+endif # !STM32F7_PWM_MULTICHAN
+
+endif # STM32F7_TIM13_PWM
+
+config STM32F7_TIM14_PWM
+	bool "TIM14 PWM"
+	default n
+	depends on STM32F7_TIM14
+	select ARCH_HAVE_PWM_PULSECOUNT
+	---help---
+		Reserve timer 14 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If STM32F7_TIM14
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+if STM32F7_TIM14_PWM
+
+if STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM14_CHANNEL1
+	bool "TIM14 Channel 1"
+	default n
+	---help---
+		Enables channel 1.
+
+if STM32F7_TIM14_CHANNEL1
+
+config STM32F7_TIM14_CH1MODE
+	int "TIM14 Channel 1 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM14_CH1OUT
+	bool "TIM14 Channel 1 Output"
+	default n
+	---help---
+		Enables channel 1 output.
+
+endif # STM32F7_TIM14_CHANNEL1
+
+config STM32F7_TIM14_CHANNEL2
+	bool "TIM14 Channel 2"
+	default n
+	---help---
+		Enables channel 2.
+
+if STM32F7_TIM14_CHANNEL2
+
+config STM32F7_TIM14_CH2MODE
+	int "TIM14 Channel 2 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM14_CH2OUT
+	bool "TIM14 Channel 2 Output"
+	default n
+	---help---
+		Enables channel 2 output.
+
+endif # STM32F7_TIM14_CHANNEL2
+
+config STM32F7_TIM14_CHANNEL3
+	bool "TIM14 Channel 3"
+	default n
+	---help---
+		Enables channel 3.
+
+if STM32F7_TIM14_CHANNEL3
+
+config STM32F7_TIM14_CH3MODE
+	int "TIM14 Channel 3 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM14_CH3OUT
+	bool "TIM14 Channel 3 Output"
+	default n
+	---help---
+		Enables channel 3 output.
+
+endif # STM32F7_TIM14_CHANNEL3
+
+config STM32F7_TIM14_CHANNEL4
+	bool "TIM14 Channel 4"
+	default n
+	---help---
+		Enables channel 4.
+
+if STM32F7_TIM14_CHANNEL4
+
+config STM32F7_TIM14_CH4MODE
+	int "TIM14 Channel 4 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32F7_TIM14_CH4OUT
+	bool "TIM14 Channel 4 Output"
+	default n
+	---help---
+		Enables channel 4 output.
+
+endif # STM32F7_TIM14_CHANNEL4
+
+endif # STM32F7_PWM_MULTICHAN
+
+if !STM32F7_PWM_MULTICHAN
+
+config STM32F7_TIM14_CHANNEL
+	int "TIM14 PWM Output Channel"
+	default 1
+	range 1 4
+	---help---
+		If TIM14 is enabled for PWM usage, you also need specifies the timer output
+		channel {1,..,4}
+
+config STM32F7_TIM14_CHMODE
+	int "TIM14 Channel Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+endif # !STM32F7_PWM_MULTICHAN
+
+endif # STM32F7_TIM14_PWM
+
+config STM32F7_PWM_MULTICHAN
+	bool "PWM Multiple Output Channels"
+	default n
+	depends on STM32F7_TIM1_PWM || STM32F7_TIM2_PWM || STM32F7_TIM3_PWM || STM32F7_TIM4_PWM || STM32F7_TIM5_PWM || STM32F7_TIM8_PWM || STM32F7_TIM9_PWM || STM32F7_TIM10_PWM || STM32F7_TIM11_PWM || STM32F7_TIM12_PWM || STM32F7_TIM13_PWM || STM32F7_TIM14_PWM
+	select ARCH_HAVE_PWM_MULTICHAN
+	---help---
+		Specifies that the PWM driver supports multiple output
+		channels per timer.
+
+config STM32F7_TIM1_ADC
+	bool "TIM1 ADC"
+	default n
+	depends on STM32F7_TIM1 && STM32F7_ADC
+	---help---
+		Reserve timer 1 for use by ADC
+
+		Timer devices may be used for different purposes.  If STM32F7_TIM1 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for ADC conversion. Note that ADC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the ADC, but then you also have to configure which ADC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM1 ADC channel"
+	default STM32F7_TIM1_ADC1
+	depends on STM32F7_TIM1_ADC
+
+config STM32F7_TIM1_ADC1
+	bool "TIM1 ADC channel 1"
+	depends on STM32F7_ADC1
+	select HAVE_ADC1_TIMER
+	---help---
+		Reserve TIM1 to trigger ADC1
+
+config STM32F7_TIM1_ADC2
+	bool "TIM1 ADC channel 2"
+	depends on STM32F7_ADC2
+	select HAVE_ADC2_TIMER
+	---help---
+		Reserve TIM1 to trigger ADC2
+
+config STM32F7_TIM1_ADC3
+	bool "TIM1 ADC channel 3"
+	depends on STM32F7_ADC3
+	select HAVE_ADC3_TIMER
+	---help---
+		Reserve TIM1 to trigger ADC3
+
+endchoice
+
+config STM32F7_TIM2_ADC
+	bool "TIM2 ADC"
+	default n
+	depends on STM32F7_TIM2 && STM32F7_ADC
+	---help---
+		Reserve timer 1 for use by ADC
+
+		Timer devices may be used for different purposes.  If STM32F7_TIM2 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for ADC conversion. Note that ADC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the ADC, but then you also have to configure which ADC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM2 ADC channel"
+	default STM32F7_TIM2_ADC1
+	depends on STM32F7_TIM2_ADC
+
+config STM32F7_TIM2_ADC1
+	bool "TIM2 ADC channel 1"
+	depends on STM32F7_ADC1
+	select HAVE_ADC1_TIMER
+	---help---
+		Reserve TIM2 to trigger ADC1
+
+config STM32F7_TIM2_ADC2
+	bool "TIM2 ADC channel 2"
+	depends on STM32F7_ADC2
+	select HAVE_ADC2_TIMER
+	---help---
+		Reserve TIM2 to trigger ADC2
+
+config STM32F7_TIM2_ADC3
+	bool "TIM2 ADC channel 3"
+	depends on STM32F7_ADC3
+	select HAVE_ADC3_TIMER
+	---help---
+		Reserve TIM2 to trigger ADC3
+
+endchoice
+
+config STM32F7_TIM3_ADC
+	bool "TIM3 ADC"
+	default n
+	depends on STM32F7_TIM3 && STM32F7_ADC
+	---help---
+		Reserve timer 1 for use by ADC
+
+		Timer devices may be used for different purposes.  If STM32F7_TIM3 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for ADC conversion. Note that ADC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the ADC, but then you also have to configure which ADC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM3 ADC channel"
+	default STM32F7_TIM3_ADC1
+	depends on STM32F7_TIM3_ADC
+
+config STM32F7_TIM3_ADC1
+	bool "TIM3 ADC channel 1"
+	depends on STM32F7_ADC1
+	select HAVE_ADC1_TIMER
+	---help---
+		Reserve TIM3 to trigger ADC1
+
+config STM32F7_TIM3_ADC2
+	bool "TIM3 ADC channel 2"
+	depends on STM32F7_ADC2
+	select HAVE_ADC2_TIMER
+	---help---
+		Reserve TIM3 to trigger ADC2
+
+config STM32F7_TIM3_ADC3
+	bool "TIM3 ADC channel 3"
+	depends on STM32F7_ADC3
+	select HAVE_ADC3_TIMER
+	---help---
+		Reserve TIM3 to trigger ADC3
+
+endchoice
+
+config STM32F7_TIM4_ADC
+	bool "TIM4 ADC"
+	default n
+	depends on STM32F7_TIM4 && STM32F7_ADC
+	---help---
+		Reserve timer 1 for use by ADC
+
+		Timer devices may be used for different purposes.  If STM32F7_TIM4 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for ADC conversion. Note that ADC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the ADC, but then you also have to configure which ADC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM4 ADC channel"
+	default STM32F7_TIM4_ADC1
+	depends on STM32F7_TIM4_ADC
+
+config STM32F7_TIM4_ADC1
+	bool "TIM4 ADC channel 1"
+	depends on STM32F7_ADC1
+	select HAVE_ADC1_TIMER
+	---help---
+		Reserve TIM4 to trigger ADC1
+
+config STM32F7_TIM4_ADC2
+	bool "TIM4 ADC channel 2"
+	depends on STM32F7_ADC2
+	select HAVE_ADC2_TIMER
+	---help---
+		Reserve TIM4 to trigger ADC2
+
+config STM32F7_TIM4_ADC3
+	bool "TIM4 ADC channel 3"
+	depends on STM32F7_ADC3
+	select HAVE_ADC3_TIMER
+	---help---
+		Reserve TIM4 to trigger ADC3
+
+endchoice
+
+config STM32F7_TIM5_ADC
+	bool "TIM5 ADC"
+	default n
+	depends on STM32F7_TIM5 && STM32F7_ADC
+	---help---
+		Reserve timer 1 for use by ADC
+
+		Timer devices may be used for different purposes.  If STM32F7_TIM5 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for ADC conversion. Note that ADC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the ADC, but then you also have to configure which ADC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM5 ADC channel"
+	default STM32F7_TIM5_ADC1
+	depends on STM32F7_TIM5_ADC
+
+config STM32F7_TIM5_ADC1
+	bool "TIM5 ADC channel 1"
+	depends on STM32F7_ADC1
+	select HAVE_ADC1_TIMER
+	---help---
+		Reserve TIM5 to trigger ADC1
+
+config STM32F7_TIM5_ADC2
+	bool "TIM5 ADC channel 2"
+	depends on STM32F7_ADC2
+	select HAVE_ADC2_TIMER
+	---help---
+		Reserve TIM5 to trigger ADC2
+
+config STM32F7_TIM5_ADC3
+	bool "TIM5 ADC channel 3"
+	depends on STM32F7_ADC3
+	select HAVE_ADC3_TIMER
+	---help---
+		Reserve TIM5 to trigger ADC3
+
+endchoice
+
+config STM32F7_TIM8_ADC
+	bool "TIM8 ADC"
+	default n
+	depends on STM32F7_TIM8 && STM32F7_ADC
+	---help---
+		Reserve timer 1 for use by ADC
+
+		Timer devices may be used for different purposes.  If STM32F7_TIM8 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for ADC conversion. Note that ADC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the ADC, but then you also have to configure which ADC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM8 ADC channel"
+	default STM32F7_TIM8_ADC1
+	depends on STM32F7_TIM8_ADC
+
+config STM32F7_TIM8_ADC1
+	bool "TIM8 ADC channel 1"
+	depends on STM32F7_ADC1
+	select HAVE_ADC1_TIMER
+	---help---
+		Reserve TIM8 to trigger ADC1
+
+config STM32F7_TIM8_ADC2
+	bool "TIM8 ADC channel 2"
+	depends on STM32F7_ADC2
+	select HAVE_ADC2_TIMER
+	---help---
+		Reserve TIM8 to trigger ADC2
+
+config STM32F7_TIM8_ADC3
+	bool "TIM8 ADC channel 3"
+	depends on STM32F7_ADC3
+	select HAVE_ADC3_TIMER
+	---help---
+		Reserve TIM8 to trigger ADC3
+
+endchoice
+
+config HAVE_ADC1_TIMER
+	bool
+
+config HAVE_ADC2_TIMER
+	bool
+
+config HAVE_ADC3_TIMER
+	bool
+
+config STM32F7_ADC1_SAMPLE_FREQUENCY
+	int "ADC1 Sampling Frequency"
+	default 100
+	depends on HAVE_ADC1_TIMER
+	---help---
+		ADC1 sampling frequency.  Default:  100Hz
+
+config STM32F7_ADC1_TIMTRIG
+	int "ADC1 Timer Trigger"
+	default 0
+	range 0 4
+	depends on HAVE_ADC1_TIMER
+	---help---
+		Values 0:CC1 1:CC2 2:CC3 3:CC4 4:TRGO
+
+config STM32F7_ADC2_SAMPLE_FREQUENCY
+	int "ADC2 Sampling Frequency"
+	default 100
+	depends on HAVE_ADC2_TIMER
+	---help---
+		ADC2 sampling frequency.  Default:  100Hz
+
+config STM32F7_ADC2_TIMTRIG
+	int "ADC2 Timer Trigger"
+	default 0
+	range 0 4
+	depends on HAVE_ADC2_TIMER
+	---help---
+		Values 0:CC1 1:CC2 2:CC3 3:CC4 4:TRGO
+
+config STM32F7_ADC3_SAMPLE_FREQUENCY
+	int "ADC3 Sampling Frequency"
+	default 100
+	depends on HAVE_ADC3_TIMER
+	---help---
+		ADC3 sampling frequency.  Default:  100Hz
+
+config STM32F7_ADC3_TIMTRIG
+	int "ADC3 Timer Trigger"
+	default 0
+	range 0 4
+	depends on HAVE_ADC3_TIMER
+	---help---
+		Values 0:CC1 1:CC2 2:CC3 3:CC4 4:TRGO
+
+config STM32F7_TIM1_DAC
+	bool "TIM1 DAC"
+	default n
+	depends on STM32F7_TIM1 && STM32F7_DAC
+	---help---
+		Reserve timer 1 for use by DAC
+
+		Timer devices may be used for different purposes.  If STM32F7_TIM1 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM1 DAC channel"
+	default STM32F7_TIM1_DAC1
+	depends on STM32F7_TIM1_DAC
+
+config STM32F7_TIM1_DAC1
+	bool "TIM1 DAC channel 1"
+	---help---
+		Reserve TIM1 to trigger DAC1
+
+config STM32F7_TIM1_DAC2
+	bool "TIM1 DAC channel 2"
+	---help---
+		Reserve TIM1 to trigger DAC2
+
+endchoice
+
+config STM32F7_TIM2_DAC
+	bool "TIM2 DAC"
+	default n
+	depends on STM32F7_TIM2 && STM32F7_DAC
+	---help---
+		Reserve timer 2 for use by DAC
+
+		Timer devices may be used for different purposes.  If STM32F7_TIM2 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM2 DAC channel"
+	default STM32F7_TIM2_DAC1
+	depends on STM32F7_TIM2_DAC
+
+config STM32F7_TIM2_DAC1
+	bool "TIM2 DAC channel 1"
+	---help---
+		Reserve TIM2 to trigger DAC1
+
+config STM32F7_TIM2_DAC2
+	bool "TIM2 DAC channel 2"
+	---help---
+		Reserve TIM2 to trigger DAC2
+
+endchoice
+
+config STM32F7_TIM3_DAC
+	bool "TIM3 DAC"
+	default n
+	depends on STM32F7_TIM3 && STM32F7_DAC
+	---help---
+		Reserve timer 3 for use by DAC
+
+		Timer devices may be used for different purposes.  If STM32F7_TIM3 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM3 DAC channel"
+	default STM32F7_TIM3_DAC1
+	depends on STM32F7_TIM3_DAC
+
+config STM32F7_TIM3_DAC1
+	bool "TIM3 DAC channel 1"
+	---help---
+		Reserve TIM3 to trigger DAC1
+
+config STM32F7_TIM3_DAC2
+	bool "TIM3 DAC channel 2"
+	---help---
+		Reserve TIM3 to trigger DAC2
+
+endchoice
+
+config STM32F7_TIM4_DAC
+	bool "TIM4 DAC"
+	default n
+	depends on STM32F7_TIM4 && STM32F7_DAC
+	---help---
+		Reserve timer 4 for use by DAC
+
+		Timer devices may be used for different purposes.  If STM32F7_TIM4 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM4 DAC channel"
+	default STM32F7_TIM4_DAC1
+	depends on STM32F7_TIM4_DAC
+
+config STM32F7_TIM4_DAC1
+	bool "TIM4 DAC channel 1"
+	---help---
+		Reserve TIM4 to trigger DAC1
+
+config STM32F7_TIM4_DAC2
+	bool "TIM4 DAC channel 2"
+	---help---
+		Reserve TIM4 to trigger DAC2
+
+endchoice
+
+config STM32F7_TIM5_DAC
+	bool "TIM5 DAC"
+	default n
+	depends on STM32F7_TIM5 && STM32F7_DAC
+	---help---
+		Reserve timer 5 for use by DAC
+
+		Timer devices may be used for different purposes.  If STM32F7_TIM5 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM5 DAC channel"
+	default STM32F7_TIM5_DAC1
+	depends on STM32F7_TIM5_DAC
+
+config STM32F7_TIM5_DAC1
+	bool "TIM5 DAC channel 1"
+	---help---
+		Reserve TIM5 to trigger DAC1
+
+config STM32F7_TIM5_DAC2
+	bool "TIM5 DAC channel 2"
+	---help---
+		Reserve TIM5 to trigger DAC2
+
+endchoice
+
+config STM32F7_TIM6_DAC
+	bool "TIM6 DAC"
+	default n
+	depends on STM32F7_TIM6 && STM32F7_DAC
+	---help---
+		Reserve timer 6 for use by DAC
+
+		Timer devices may be used for different purposes.  If STM32F7_TIM6 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM6 DAC channel"
+	default STM32F7_TIM6_DAC1
+	depends on STM32F7_TIM6_DAC
+
+config STM32F7_TIM6_DAC1
+	bool "TIM6 DAC channel 1"
+	---help---
+		Reserve TIM6 to trigger DAC1
+
+config STM32F7_TIM6_DAC2
+	bool "TIM6 DAC channel 2"
+	---help---
+		Reserve TIM6 to trigger DAC2
+
+endchoice
+
+config STM32F7_TIM7_DAC
+	bool "TIM7 DAC"
+	default n
+	depends on STM32F7_TIM7 && STM32F7_DAC
+	---help---
+		Reserve timer 7 for use by DAC
+
+		Timer devices may be used for different purposes.  If STM32F7_TIM7 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM7 DAC channel"
+	default STM32F7_TIM7_DAC1
+	depends on STM32F7_TIM7_DAC
+
+config STM32F7_TIM7_DAC1
+	bool "TIM7 DAC channel 1"
+	---help---
+		Reserve TIM7 to trigger DAC1
+
+config STM32F7_TIM7_DAC2
+	bool "TIM7 DAC channel 2"
+	---help---
+		Reserve TIM7 to trigger DAC2
+
+endchoice
+
+config STM32F7_TIM8_DAC
+	bool "TIM8 DAC"
+	default n
+	depends on STM32F7_TIM8 && STM32F7_DAC
+	---help---
+		Reserve timer 8 for use by DAC
+
+		Timer devices may be used for different purposes.  If STM32F7_TIM8 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM8 DAC channel"
+	default STM32F7_TIM8_DAC1
+	depends on STM32F7_TIM8_DAC
+
+config STM32F7_TIM8_DAC1
+	bool "TIM8 DAC channel 1"
+	---help---
+		Reserve TIM8 to trigger DAC1
+
+config STM32F7_TIM8_DAC2
+	bool "TIM8 DAC channel 2"
+	---help---
+		Reserve TIM8 to trigger DAC2
+
+endchoice
+
+config STM32F7_TIM9_DAC
+	bool "TIM9 DAC"
 	default n
-	select ARCH_HAVE_SERIAL_TERMIOS
-	select UART8_SERIALDRIVER
-	select STM32F7_USART
+	depends on STM32F7_TIM9 && STM32F7_DAC
+	---help---
+		Reserve timer 9 for use by DAC
 
-config STM32F7_IWDG
-	bool "IWDG"
-	default n
-	select WATCHDOG
+		Timer devices may be used for different purposes.  If STM32F7_TIM9 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
 
-config STM32F7_WWDG
-	bool "WWDG"
-	default n
-	select WATCHDOG
+choice
+	prompt "Select TIM9 DAC channel"
+	default STM32F7_TIM9_DAC1
+	depends on STM32F7_TIM9_DAC
 
-endmenu
+config STM32F7_TIM9_DAC1
+	bool "TIM9 DAC channel 1"
+	---help---
+		Reserve TIM9 to trigger DAC1
 
-menu "U[S]ART Configuration"
-	depends on STM32F7_USART
+config STM32F7_TIM9_DAC2
+	bool "TIM9 DAC channel 2"
+	---help---
+		Reserve TIM9 to trigger DAC2
 
-config USART1_RS485
-	bool "RS-485 on USART1"
+endchoice
+
+config STM32F7_TIM10_DAC
+	bool "TIM10 DAC"
 	default n
-	depends on STM32F7_USART1
+	depends on STM32F7_TIM10 && STM32F7_DAC
 	---help---
-		Enable RS-485 interface on USART1. Your board config will have to
-		provide GPIO_USART1_RS485_DIR pin definition. Currently it cannot be
-		used with USART1_RXDMA.
+		Reserve timer 10 for use by DAC
 
-config USART1_RS485_DIR_POLARITY
-	int "USART1 RS-485 DIR pin polarity"
-	default 1
-	range 0 1
-	depends on USART1_RS485
+		Timer devices may be used for different purposes.  If STM32F7_TIM10 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM10 DAC channel"
+	default STM32F7_TIM10_DAC1
+	depends on STM32F7_TIM10_DAC
+
+config STM32F7_TIM10_DAC1
+	bool "TIM10 DAC channel 1"
 	---help---
-		Polarity of DIR pin for RS-485 on USART1. Set to state on DIR pin which
-		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+		Reserve TIM10 to trigger DAC1
 
-config USART1_RXDMA
-	bool "USART1 Rx DMA"
-	default n
-	depends on STM32F7_USART1 && STM32F7_DMA1
+config STM32F7_TIM10_DAC2
+	bool "TIM10 DAC channel 2"
 	---help---
-		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+		Reserve TIM10 to trigger DAC2
 
-config USART2_RS485
-	bool "RS-485 on USART2"
+endchoice
+
+config STM32F7_TIM11_DAC
+	bool "TIM11 DAC"
 	default n
-	depends on STM32F7_USART2
+	depends on STM32F7_TIM11 && STM32F7_DAC
 	---help---
-		Enable RS-485 interface on USART2. Your board config will have to
-		provide GPIO_USART2_RS485_DIR pin definition. Currently it cannot be
-		used with USART2_RXDMA.
+		Reserve timer 11 for use by DAC
 
-config USART2_RS485_DIR_POLARITY
-	int "USART2 RS-485 DIR pin polarity"
-	default 1
-	range 0 1
-	depends on USART2_RS485
+		Timer devices may be used for different purposes.  If STM32F7_TIM11 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM11 DAC channel"
+	default STM32F7_TIM11_DAC1
+	depends on STM32F7_TIM11_DAC
+
+config STM32F7_TIM11_DAC1
+	bool "TIM11 DAC channel 1"
 	---help---
-		Polarity of DIR pin for RS-485 on USART2. Set to state on DIR pin which
-		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+		Reserve TIM11 to trigger DAC1
 
-config USART2_RXDMA
-	bool "USART2 Rx DMA"
-	default n
-	depends on STM32F7_USART2 && STM32F7_DMA1
+config STM32F7_TIM11_DAC2
+	bool "TIM11 DAC channel 2"
 	---help---
-		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+		Reserve TIM11 to trigger DAC2
 
-config USART3_RS485
-	bool "RS-485 on USART3"
+endchoice
+
+config STM32F7_TIM12_DAC
+	bool "TIM12 DAC"
 	default n
-	depends on STM32F7_USART3
+	depends on STM32F7_TIM12 && STM32F7_DAC
 	---help---
-		Enable RS-485 interface on USART3. Your board config will have to
-		provide GPIO_USART3_RS485_DIR pin definition. Currently it cannot be
-		used with USART3_RXDMA.
+		Reserve timer 12 for use by DAC
 
-config USART3_RS485_DIR_POLARITY
-	int "USART3 RS-485 DIR pin polarity"
-	default 1
-	range 0 1
-	depends on USART3_RS485
+		Timer devices may be used for different purposes.  If STM32F7_TIM12 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM12 DAC channel"
+	default STM32F7_TIM12_DAC1
+	depends on STM32F7_TIM12_DAC
+
+config STM32F7_TIM12_DAC1
+	bool "TIM12 DAC channel 1"
 	---help---
-		Polarity of DIR pin for RS-485 on USART3. Set to state on DIR pin which
-		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+		Reserve TIM12 to trigger DAC1
 
-config USART3_RXDMA
-	bool "USART3 Rx DMA"
-	default n
-	depends on STM32F7_USART3 && STM32F7_DMA1
+config STM32F7_TIM12_DAC2
+	bool "TIM12 DAC channel 2"
 	---help---
-		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+		Reserve TIM12 to trigger DAC2
 
-config UART4_RS485
-	bool "RS-485 on UART4"
+endchoice
+
+config STM32F7_TIM13_DAC
+	bool "TIM13 DAC"
 	default n
-	depends on STM32F7_UART4
+	depends on STM32F7_TIM13 && STM32F7_DAC
 	---help---
-		Enable RS-485 interface on UART4. Your board config will have to
-		provide GPIO_UART4_RS485_DIR pin definition. Currently it cannot be
-		used with UART4_RXDMA.
+		Reserve timer 13 for use by DAC
 
-config UART4_RS485_DIR_POLARITY
-	int "UART4 RS-485 DIR pin polarity"
-	default 1
-	range 0 1
-	depends on UART4_RS485
+		Timer devices may be used for different purposes.  If STM32F7_TIM13 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM13 DAC channel"
+	default STM32F7_TIM13_DAC1
+	depends on STM32F7_TIM13_DAC
+
+config STM32F7_TIM13_DAC1
+	bool "TIM13 DAC channel 1"
 	---help---
-		Polarity of DIR pin for RS-485 on UART4. Set to state on DIR pin which
-		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+		Reserve TIM13 to trigger DAC1
 
-config UART4_RXDMA
-	bool "UART4 Rx DMA"
-	default n
-	depends on STM32F7_UART4 && STM32F7_DMA1
+config STM32F7_TIM13_DAC2
+	bool "TIM13 DAC channel 2"
 	---help---
-		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+		Reserve TIM13 to trigger DAC2
 
-config UART5_RS485
-	bool "RS-485 on UART5"
+endchoice
+
+config STM32F7_TIM14_DAC
+	bool "TIM14 DAC"
 	default n
-	depends on STM32F7_UART5
+	depends on STM32F7_TIM14 && STM32F7_DAC
 	---help---
-		Enable RS-485 interface on UART5. Your board config will have to
-		provide GPIO_UART5_RS485_DIR pin definition. Currently it cannot be
-		used with UART5_RXDMA.
+		Reserve timer 14 for use by DAC
 
-config UART5_RS485_DIR_POLARITY
-	int "UART5 RS-485 DIR pin polarity"
-	default 1
-	range 0 1
-	depends on UART5_RS485
+		Timer devices may be used for different purposes.  If STM32F7_TIM14 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM14 DAC channel"
+	default STM32F7_TIM14_DAC1
+	depends on STM32F7_TIM14_DAC
+
+config STM32F7_TIM14_DAC1
+	bool "TIM14 DAC channel 1"
 	---help---
-		Polarity of DIR pin for RS-485 on UART5. Set to state on DIR pin which
-		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+		Reserve TIM14 to trigger DAC1
 
-config UART5_RXDMA
-	bool "UART5 Rx DMA"
-	default n
-	depends on STM32F7_UART5 && STM32F7_DMA1
+config STM32F7_TIM14_DAC2
+	bool "TIM14 DAC channel 2"
 	---help---
-		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+		Reserve TIM14 to trigger DAC2
 
-config USART6_RS485
-	bool "RS-485 on USART6"
+endchoice
+
+config STM32F7_TIM1_CAP
+	bool "TIM1 Capture"
 	default n
-	depends on STM32F7_USART6
+	depends on STM32F7_HAVE_TIM1
 	---help---
-		Enable RS-485 interface on USART6. Your board config will have to
-		provide GPIO_USART6_RS485_DIR pin definition. Currently it cannot be
-		used with USART6_RXDMA.
+		Reserve timer 1 for use by Capture
 
-config USART6_RS485_DIR_POLARITY
-	int "USART6 RS-485 DIR pin polarity"
-	default 1
-	range 0 1
-	depends on USART6_RS485
-	---help---
-		Polarity of DIR pin for RS-485 on USART6. Set to state on DIR pin which
-		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+		Timer devices may be used for different purposes.  One special purpose is
+		to capture input.
 
-config USART6_RXDMA
-	bool "USART6 Rx DMA"
+config STM32F7_TIM2_CAP
+	bool "TIM2 Capture"
 	default n
-	depends on STM32F7_USART6 && STM32F7_DMA2
+	depends on STM32F7_HAVE_TIM2
 	---help---
-		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+		Reserve timer 2 for use by Capture
 
-config UART7_RS485
-	bool "RS-485 on UART7"
+		Timer devices may be used for different purposes.  One special purpose is
+		to capture input.
+
+config STM32F7_TIM3_CAP
+	bool "TIM3 Capture"
 	default n
-	depends on STM32F7_UART7
+	depends on STM32F7_HAVE_TIM3
 	---help---
-		Enable RS-485 interface on UART7. Your board config will have to
-		provide GPIO_UART7_RS485_DIR pin definition. Currently it cannot be
-		used with UART7_RXDMA.
+		Reserve timer 3 for use by Capture
 
-config UART7_RS485_DIR_POLARITY
-	int "UART7 RS-485 DIR pin polarity"
-	default 1
-	range 0 1
-	depends on UART7_RS485
+		Timer devices may be used for different purposes.  One special purpose is
+		to capture input.
+
+config STM32F7_TIM4_CAP
+	bool "TIM4 Capture"
+	default n
+	depends on STM32F7_HAVE_TIM4
 	---help---
-		Polarity of DIR pin for RS-485 on UART7. Set to state on DIR pin which
-		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+		Reserve timer 4 for use by Capture
 
-config UART7_RXDMA
-	bool "UART7 Rx DMA"
+		Timer devices may be used for different purposes.  One special purpose is
+		to capture input.
+
+config STM32F7_TIM5_CAP
+	bool "TIM5 Capture"
 	default n
-	depends on STM32F7_UART7 && STM32F7_DMA2
+	depends on STM32F7_HAVE_TIM5
 	---help---
-		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+		Reserve timer 5 for use by Capture
 
-config UART8_RS485
-	bool "RS-485 on UART8"
+		Timer devices may be used for different purposes.  One special purpose is
+		to capture input.
+
+config STM32F7_TIM8_CAP
+	bool "TIM8 Capture"
 	default n
-	depends on STM32F7_UART8
+	depends on STM32F7_HAVE_TIM8
 	---help---
-		Enable RS-485 interface on UART8. Your board config will have to
-		provide GPIO_UART8_RS485_DIR pin definition. Currently it cannot be
-		used with UART8_RXDMA.
+		Reserve timer 8 for use by Capture
 
-config UART8_RS485_DIR_POLARITY
-	int "UART8 RS-485 DIR pin polarity"
-	default 1
-	range 0 1
-	depends on UART8_RS485
+		Timer devices may be used for different purposes.  One special purpose is
+		to capture input.
+
+config STM32F7_TIM9_CAP
+	bool "TIM9 Capture"
+	default n
+	depends on STM32F7_HAVE_TIM9
 	---help---
-		Polarity of DIR pin for RS-485 on UART8. Set to state on DIR pin which
-		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+		Reserve timer 9 for use by Capture
 
-config UART8_RXDMA
-	bool "UART8 Rx DMA"
+		Timer devices may be used for different purposes.  One special purpose is
+		to capture input.
+
+config STM32F7_TIM10_CAP
+	bool "TIM10 Capture"
 	default n
-	depends on STM32F7_UART8 && STM32F7_DMA2
+	depends on STM32F7_HAVE_TIM10
 	---help---
-		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+		Reserve timer 10 for use by Capture
 
-config SERIAL_DISABLE_REORDERING
-	bool "Disable reordering of ttySx devices."
-	depends on STM32F7_USART1 || STM32F7_USART2 || STM32F7_USART3 || STM32F7_UART4 || STM32F7_UART5 || STM32F7_USART6 || STM32F7_UART7 || STM32F7_UART8
+		Timer devices may be used for different purposes.  One special purpose is
+		to capture input.
+
+config STM32F7_TIM11_CAP
+	bool "TIM11 Capture"
 	default n
+	depends on STM32F7_HAVE_TIM11
 	---help---
-		NuttX per default reorders the serial ports (/dev/ttySx) so that the
-		console is always on /dev/ttyS0. If more than one UART is in use this
-		can, however, have the side-effect that all port mappings
-		(hardware USART1 -> /dev/ttyS0) change if the console is moved to another
-		UART. This is in particular relevant if a project uses the USB console
-		in some configs and a serial console in other configs, but does not
-		want the side effect of having all serial port names change when just
-		the console is moved from serial to USB.
+		Reserve timer 11 for use by Capture
 
-config STM32F7_FLOWCONTROL_BROKEN
-	bool "Use Software UART RTS flow control"
-	depends on STM32F7_USART
+		Timer devices may be used for different purposes.  One special purpose is
+		to capture input.
+
+config STM32F7_TIM12_CAP
+	bool "TIM12 Capture"
 	default n
+	depends on STM32F7_HAVE_TIM12
 	---help---
-		Enable UART RTS flow control using Software. Because STM
-		Current STM32 have broken HW based RTS behavior (they assert
-		nRTS after every byte received)  Enable this setting workaround
-		this issue by useing software based management of RTS
+		Reserve timer 12 for use by Capture
 
-config STM32F7_USART_BREAKS
-	bool "Add TIOxSBRK to support sending Breaks"
-	depends on STM32F7_USART
+		Timer devices may be used for different purposes.  One special purpose is
+		to capture input.
+
+config STM32F7_TIM13_CAP
+	bool "TIM13 Capture"
 	default n
+	depends on STM32F7_HAVE_TIM13
 	---help---
-		Add TIOCxBRK routines to send a line break per the STM32 manual, the
-		break will be a pulse based on the value M. This is not a BSD compatible
-		break.
+		Reserve timer 13 for use by Capture
 
-config STM32F7_SERIALBRK_BSDCOMPAT
-	bool "Use GPIO To send Break"
-	depends on STM32F7_USART && STM32F7_USART_BREAKS
+		Timer devices may be used for different purposes.  One special purpose is
+		to capture input.
+
+config STM32F7_TIM14_CAP
+	bool "TIM14 Capture"
 	default n
+	depends on STM32F7_HAVE_TIM14
 	---help---
-		Enable using GPIO on the TX pin to send a BSD compatible break:
-		TIOCSBRK will start the break and TIOCCBRK will end the break.
-		The current STM32 U[S]ARTS have no way to leave the break (TX=LOW)
-		on because the SW starts the break and then the HW automatically clears
-		the break. This makes it is difficult to sent a long break.
+		Reserve timer 14 for use by Capture
 
-endmenu # U[S]ART Configuration
+		Timer devices may be used for different purposes.  One special purpose is
+		to capture input.
 
-config STM32F7_CUSTOM_CLOCKCONFIG
-        bool "Custom clock configuration"
+endmenu # Timer Configuration
+
+menu "ADC Configuration"
+	depends on STM32F7_ADC
+
+config STM32F7_ADC1_DMA
+	bool "ADC1 DMA"
+	depends on STM32F7_ADC1 && STM32F7_HAVE_ADC1_DMA
 	default n
 	---help---
-		Enables special, board-specific STM32 clock configuration.
+		If DMA is selected, then the ADC may be configured to support
+		DMA transfer, which is necessary if multiple channels are read
+		or if very high trigger frequencies are used.
 
-config STM32F7_DTCM_PROCFS
-	bool "DTCM SRAM PROCFS support"
+config STM32F7_ADC2_DMA
+	bool "ADC2 DMA"
+	depends on STM32F7_ADC2 && STM32F7_HAVE_ADC2_DMA
 	default n
-	depends on ARMV7M_DTCM && FS_PROCFS
 	---help---
-		Select to build in support for /proc/dtcm.  Reading from /proc/dtcm
-		will provide statistics about DTCM memory use similar to what you
-		would get from mallinfo() for the user heap.
+		If DMA is selected, then the ADC may be configured to support
+		DMA transfer, which is necessary if multiple channels are read
+		or if very high trigger frequencies are used.
+
+config STM32F7_ADC3_DMA
+	bool "ADC3 DMA"
+	depends on STM32F7_ADC3 && STM32F7_HAVE_ADC3_DMA
+	default n
+	---help---
+		If DMA is selected, then the ADC may be configured to support
+		DMA transfer, which is necessary if multiple channels are read
+		or if very high trigger frequencies are used.
+
+endmenu # "ADC Configuration"
 
-if STM32F7_ETHMAC
 menu "Ethernet MAC configuration"
+	depends on STM32F7_ETHMAC
 
 config STM32F7_PHYADDR
 	int "PHY address"
@@ -882,15 +4606,34 @@ config STM32F7_RMII_EXTCLK
 	---help---
 		Clocking is provided by external logic.
 
-endchoice
+endchoice # RMII clock configuration
+
+choice
+	prompt "Work queue"
+	default STM32F7_ETHMAC_LPWORK if SCHED_LPWORK
+	default STM32F7_ETHMAC_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the Ethernet driver.  If the
+		low priority work queue is available, then it should be used by the
+		driver.
+
+config STM32F7_ETHMAC_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
+
+config STM32F7_ETHMAC_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
+
+endchoice # Work queue
 
 config STM32F7_ETHMAC_REGDEBUG
 	bool "Register-Level Debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_NET_INFO
 	---help---
-		Enable very low-level register access debug.  Depends on DEBUG.
+		Enable very low-level register access debug.  Depends on CONFIG_DEBUG_FEATURES.
 
-endmenu
-endif # STM32F7_ETHMAC
+endmenu # Ethernet MAC configuration
 endif # ARCH_CHIP_STM32F7
diff --git a/arch/arm/src/stm32f7/Make.defs b/arch/arm/src/stm32f7/Make.defs
index 2f4b7b251346b339b59bece843d3292169b8f3e7..d25b702d67d6aedde9c1b0f9ab5150eb7e6191fb 100644
--- a/arch/arm/src/stm32f7/Make.defs
+++ b/arch/arm/src/stm32f7/Make.defs
@@ -51,7 +51,7 @@ CMN_CSRCS += up_mdelay.c up_udelay.c up_exit.c up_idle.c up_initialize.c
 CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_memfault.c up_modifyreg8.c
 CMN_CSRCS += up_modifyreg16.c up_modifyreg32.c up_releasepending.c
 CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c
-CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_unblocktask.c up_usestack.c
+CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_systemreset.c up_unblocktask.c up_usestack.c
 CMN_CSRCS += up_doirq.c up_hardfault.c up_svcall.c up_vfork.c
 
 # Configuration-dependent common files
@@ -87,10 +87,6 @@ ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
 CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
 endif
 
-ifeq ($(CONFIG_ARCH_MEMCPY),y)
-CMN_ASRCS += up_memcpy.S
-endif
-
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
 CMN_CSRCS += up_mpu.c up_task_start.c up_pthread_start.c
 ifneq ($(CONFIG_DISABLE_SIGNALS),y)
@@ -100,9 +96,9 @@ endif
 endif
 
 ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c up_coherent_dcache.c
+CMN_CSRCS += up_coherent_dcache.c
 else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c up_coherent_dcache.c
+CMN_CSRCS += up_coherent_dcache.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
@@ -135,11 +131,53 @@ ifeq ($(CONFIG_STM32F7_DMA),y)
 CHIP_CSRCS += stm32_dma.c
 endif
 
-ifeq ($(CONFIG_STM32_PWR),y)
-CHIP_CSRCS += stm32_exti_pwr.c
+ifeq ($(CONFIG_STM32F7_PWR),y)
+CHIP_CSRCS += stm32_pwr.c stm32_exti_pwr.c
 endif
 
 ifeq ($(CONFIG_RTC),y)
+CHIP_CSRCS += stm32_rtc.c
+ifeq ($(CONFIG_RTC_ALARM),y)
+CHIP_CSRCS += stm32_exti_alarm.c
+endif
+ifeq ($(CONFIG_RTC_DRIVER),y)
+CHIP_CSRCS += stm32_rtc_lowerhalf.c
+endif
+endif
+
+ifeq ($(filter y,$(CONFIG_STM32F7_IWDG) $(CONFIG_STM32F7_RTC_LSICLOCK)),y)
+CHIP_CSRCS += stm32_lsi.c
+endif
+
+ifeq ($(CONFIG_STM32F7_I2C),y)
+CHIP_CSRCS += stm32_i2c.c
+endif
+
+ifeq ($(CONFIG_STM32F7_SPI),y)
+CHIP_CSRCS += stm32_spi.c
+endif
+
+ifeq ($(CONFIG_STM32F7_SDMMC),y)
+CHIP_CSRCS += stm32_sdmmc.c
+endif
+
+ifeq ($(CONFIG_USBDEV),y)
+CHIP_CSRCS += stm32_otgdev.c
+endif
+
+ifeq ($(CONFIG_USBHOST),y)
+CHIP_CSRCS += stm32_otghost.c
+endif
+
+ifeq ($(CONFIG_STM32F7_TIM),y)
+CHIP_CSRCS += stm32_tim.c
+endif
+
+ifeq ($(CONFIG_STM32F7_ADC),y)
+CHIP_CSRCS += stm32_adc.c
+endif
+
+ifeq ($(CONFIG_STM32F7_RTC),y)
 ifeq ($(CONFIG_RTC_ALARM),y)
 CHIP_CSRCS += stm32_exti_alarm.c
 endif
@@ -149,6 +187,10 @@ ifeq ($(CONFIG_STM32F7_ETHMAC),y)
 CHIP_CSRCS += stm32_ethernet.c
 endif
 
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
 CHIP_CSRCS += stm32_dumpgpio.c
 endif
+
+ifeq ($(CONFIG_STM32F7_BBSRAM),y)
+CHIP_CSRCS += stm32_bbsram.c
+endif
diff --git a/arch/arm/src/stm32f7/chip.h b/arch/arm/src/stm32f7/chip.h
index 536b8e001071e25e8cbe4654faa9eac4baabfbef..6a8e21995f5d2c506c33ccfe87d7bda477cc473b 100644
--- a/arch/arm/src/stm32f7/chip.h
+++ b/arch/arm/src/stm32f7/chip.h
@@ -48,6 +48,7 @@
 
 #include 
 #include 
+#include "chip/stm32_pinmap.h"
 #include "chip/stm32_memorymap.h"
 
 /* If the common ARMv7-M vector handling logic is used, then it expects the
diff --git a/arch/arm/src/stm32f7/chip/stm32_adc.h b/arch/arm/src/stm32f7/chip/stm32_adc.h
new file mode 100644
index 0000000000000000000000000000000000000000..7b0861d77efbba26a6672482a8fd92e9374d93d9
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32_adc.h
@@ -0,0 +1,58 @@
+/****************************************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32_adc.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32_ADC_H
+#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32_ADC_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+#include 
+#include "chip.h"
+
+#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) || \
+    defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+#  include "chip/stm32f74xx77xx_adc.h"
+#else
+#  error "Unsupported STM32 F7 sub family"
+#endif
+
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32_ADC_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32_dbgmcu.h b/arch/arm/src/stm32f7/chip/stm32_dbgmcu.h
new file mode 100644
index 0000000000000000000000000000000000000000..73fcd64dccb157d3efd0db9e13ffaf37c05327ae
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32_dbgmcu.h
@@ -0,0 +1,55 @@
+/****************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32_dbgmcu.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32_DBGMCU_H
+#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32_DBGMCU_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include "chip.h"
+
+#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
+#  include "chip/stm32f74xx75xx_dbgmcu.h"
+#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+#  include "chip/stm32f76xx77xx_dbgmcu.h"
+#else
+#  error "Unsupported STM32 F7 part"
+#endif
+
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32_DBGMCU_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32_dma.h b/arch/arm/src/stm32f7/chip/stm32_dma.h
index 63db15ec9f3e32119711fb5586788ee74ec6e134..64fa967bca6e423f9d7e6dfb43687d6e558ff1bb 100644
--- a/arch/arm/src/stm32f7/chip/stm32_dma.h
+++ b/arch/arm/src/stm32f7/chip/stm32_dma.h
@@ -2,7 +2,8 @@
  * arch/arm/src/stm32f7/chip/stm32_dma.h
  *
  *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -45,6 +46,8 @@
 
 #if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
 #  include "chip/stm32f74xx75xx_dma.h"
+#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+#  include "chip/stm32f76xx77xx_dma.h"
 #else
 #  error "Unsupported STM32 F7 part"
 #endif
diff --git a/arch/arm/src/stm32f7/chip/stm32_ethernet.h b/arch/arm/src/stm32f7/chip/stm32_ethernet.h
index e5fc6982d2859f9ada3083f35f53fcc484e11962..962cb6d92205d7785f32bc5effff1336a9ccdd65 100644
--- a/arch/arm/src/stm32f7/chip/stm32_ethernet.h
+++ b/arch/arm/src/stm32f7/chip/stm32_ethernet.h
@@ -2,7 +2,8 @@
  * arch/arm/src/stm32f7/chip/stm32_ethernet.h
  *
  *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -46,7 +47,8 @@
  * families
  */
 
-#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
+#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) \
+    defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
 
 /****************************************************************************************************
  * Pre-processor Definitions
@@ -805,6 +807,6 @@ struct eth_rxdesc_s
  ****************************************************************************************************/
 
 #endif /* __ASSEMBLY__ */
-#endif /* CONFIG_STM32F7_STM32F74XX || CONFIG_STM32F7_STM32F75XX */
+#endif /* CONFIG_STM32F7_STM32F74XX || CONFIG_STM32F7_STM32F75XX || CONFIG_STM32F7_STM32F76XX || CONFIG_STM32F7_STM32F77XX */
 #endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32_ETHERNET_H */
 
diff --git a/arch/arm/src/stm32f7/chip/stm32_exti.h b/arch/arm/src/stm32f7/chip/stm32_exti.h
index 1bf43de7931ea7eb3c4604533d51b2ac0ed60970..288f51b228c1e15e84422dd07e303ecd35e76603 100644
--- a/arch/arm/src/stm32f7/chip/stm32_exti.h
+++ b/arch/arm/src/stm32f7/chip/stm32_exti.h
@@ -2,7 +2,8 @@
  * arch/arm/src/stm32f7/chip/stm32_exti.h
  *
  *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -47,7 +48,8 @@
  * families
  */
 
-#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
+#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) || \
+    defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -127,5 +129,5 @@
 #define EXTI_IMR_SHIFT           (0)                /* Bits 0-X: Pending bit for all lines */
 #define EXTI_IMR_MASK            STM32_EXTI_MASK
 
-#endif /* CONFIG_STM32F7_STM32F74XX || CONFIG_STM32F7_STM32F75XX */
+#endif /* CONFIG_STM32F7_STM32F74XX || CONFIG_STM32F7_STM32F75XX || CONFIG_STM32F7_STM32F76XX || CONFIG_STM32F7_STM32F77XX */
 #endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32_EXTI_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32_flash.h b/arch/arm/src/stm32f7/chip/stm32_flash.h
index 965191bdcfbb70b94ca73f0b7776931a2b0972a8..d20bdfe4d33ef60da4151d1b4e9ebab0ad90c49d 100644
--- a/arch/arm/src/stm32f7/chip/stm32_flash.h
+++ b/arch/arm/src/stm32f7/chip/stm32_flash.h
@@ -2,7 +2,8 @@
  * arch/arm/src/stm32f7/chip/stm32_flash.h
  *
  *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -45,6 +46,8 @@
 
 #if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
 #  include "chip/stm32f74xx75xx_flash.h"
+#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+#  include "chip/stm32f76xx77xx_flash.h"
 #else
 #  error "Unsupported STM32 F7 part"
 #endif
diff --git a/arch/arm/src/stm32f7/chip/stm32_gpio.h b/arch/arm/src/stm32f7/chip/stm32_gpio.h
index 5b89574b0f29130da07c0bc8093a635f7edc666d..06431bb787dd4c73008fbf41490209d064e209e6 100644
--- a/arch/arm/src/stm32f7/chip/stm32_gpio.h
+++ b/arch/arm/src/stm32f7/chip/stm32_gpio.h
@@ -2,7 +2,8 @@
  * arch/arm/src/stm32f7/chip/stm32_gpio.h
  *
  *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -45,6 +46,8 @@
 
 #if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
 #  include "chip/stm32f74xx75xx_gpio.h"
+#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+#  include "chip/stm32f76xx77xx_gpio.h"
 #else
 #  error "Unsupported STM32 F7 part"
 #endif
diff --git a/arch/arm/src/stm32f7/chip/stm32_i2c.h b/arch/arm/src/stm32f7/chip/stm32_i2c.h
new file mode 100644
index 0000000000000000000000000000000000000000..f615eb6ec18f0e9df6fda4901be642696a23d012
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32_i2c.h
@@ -0,0 +1,54 @@
+/************************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32_i2c.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32_I2C_H
+#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32_I2C_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include "chip.h"
+
+#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) || \
+    defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+#  include "chip/stm32f74xx77xx_i2c.h"
+#else
+#  error "Unsupported STM32 F7 sub family"
+#endif
+
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32_I2C_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32_memorymap.h b/arch/arm/src/stm32f7/chip/stm32_memorymap.h
index f3ef8a1d53b83e38b989b9d342e45977440751fa..eba94016fd1e7202f3888e0040ad3d2f9632ee1c 100644
--- a/arch/arm/src/stm32f7/chip/stm32_memorymap.h
+++ b/arch/arm/src/stm32f7/chip/stm32_memorymap.h
@@ -2,7 +2,8 @@
  * arch/arm/src/stm32f7/chip/stm32_memorymap.h
  *
  *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -45,6 +46,8 @@
 
 #if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
 #  include "chip/stm32f74xx75xx_memorymap.h"
+#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+#  include "chip/stm32f76xx77xx_memorymap.h"
 #else
 #  error "Unsupported STM32 F7 memory map"
 #endif
diff --git a/arch/arm/src/stm32f7/chip/stm32_otg.h b/arch/arm/src/stm32f7/chip/stm32_otg.h
new file mode 100644
index 0000000000000000000000000000000000000000..b69ef1a9ddc04a01916827476e2a822c223d5209
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32_otg.h
@@ -0,0 +1,873 @@
+/****************************************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32f_otg.h
+ *
+ *   Copyright (C) 2012, 2014-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32_OTG_H
+#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32_OTG_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+/* General definitions */
+
+#define OTG_EPTYPE_CTRL               (0) /* Control */
+#define OTG_EPTYPE_ISOC               (1) /* Isochronous */
+#define OTG_EPTYPE_BULK               (2) /* Bulk */
+#define OTG_EPTYPE_INTR               (3) /* Interrupt */
+
+#define OTG_PID_DATA0                 (0)
+#define OTG_PID_DATA2                 (1)
+#define OTG_PID_DATA1                 (2)
+#define OTG_PID_MDATA                 (3) /* Non-control */
+#define OTG_PID_SETUP                 (3) /* Control */
+
+/* Register Offsets *********************************************************************************/
+/* Core global control and status registers */
+
+#define STM32_OTG_GOTGCTL_OFFSET      0x0000 /* Control and status register */
+#define STM32_OTG_GOTGINT_OFFSET      0x0004 /* Interrupt register */
+#define STM32_OTG_GAHBCFG_OFFSET      0x0008 /* AHB configuration register */
+#define STM32_OTG_GUSBCFG_OFFSET      0x000c /* USB configuration register */
+#define STM32_OTG_GRSTCTL_OFFSET      0x0010 /* Reset register */
+#define STM32_OTG_GINTSTS_OFFSET      0x0014 /* Core interrupt register */
+#define STM32_OTG_GINTMSK_OFFSET      0x0018 /* Interrupt mask register */
+#define STM32_OTG_GRXSTSR_OFFSET      0x001c /* Receive status debug read/OTG status read register */
+#define STM32_OTG_GRXSTSP_OFFSET      0x0020 /* Receive status debug read/OTG status pop register */
+#define STM32_OTG_GRXFSIZ_OFFSET      0x0024 /* Receive FIFO size register */
+#define STM32_OTG_HNPTXFSIZ_OFFSET    0x0028 /* Host non-periodic transmit FIFO size register */
+#define STM32_OTG_DIEPTXF0_OFFSET     0x0028 /* Endpoint 0 Transmit FIFO size */
+#define STM32_OTG_HNPTXSTS_OFFSET     0x002c /* Non-periodic transmit FIFO/queue status register */
+#define STM32_OTG_GCCFG_OFFSET        0x0038 /* General core configuration register */
+#define STM32_OTG_CID_OFFSET          0x003c /* Core ID register  */
+#define STM32_OTG_HPTXFSIZ_OFFSET     0x0100 /* Host periodic transmit FIFO size register */
+
+#define STM32_OTG_DIEPTXF_OFFSET(n)   (0x0104+(((n)-1) << 2))
+
+/* Host-mode control and status registers */
+
+#define STM32_OTG_HCFG_OFFSET         0x0400 /* Host configuration register */
+#define STM32_OTG_HFIR_OFFSET         0x0404 /* Host frame interval register */
+#define STM32_OTG_HFNUM_OFFSET        0x0408 /* Host frame number/frame time remaining register */
+#define STM32_OTG_HPTXSTS_OFFSET      0x0410 /* Host periodic transmit FIFO/queue status register */
+#define STM32_OTG_HAINT_OFFSET        0x0414 /* Host all channels interrupt register */
+#define STM32_OTG_HAINTMSK_OFFSET     0x0418 /* Host all channels interrupt mask register */
+#define STM32_OTG_HPRT_OFFSET         0x0440 /* Host port control and status register */
+
+#define STM32_OTG_CHAN_OFFSET(n)      (0x500 + ((n) << 5)
+#define STM32_OTG_HCCHAR_CHOFFSET     0x0000 /* Host channel characteristics register */
+#define STM32_OTG_HCINT_CHOFFSET      0x0008 /* Host channel interrupt register */
+#define STM32_OTG_HCINTMSK_CHOFFSET   0x000c /* Host channel interrupt mask register */
+#define STM32_OTG_HCTSIZ_CHOFFSET     0x0010 /* Host channel interrupt register */
+
+#define STM32_OTG_HCCHAR_OFFSET(n)    (0x500 + ((n) << 5))
+
+#define STM32_OTG_HCINT_OFFSET(n)     (0x508 + ((n) << 5))
+
+#define STM32_OTG_HCINTMSK_OFFSET(n)  (0x50c + ((n) << 5))
+
+#define STM32_OTG_HCTSIZ_OFFSET(n)    (0x510 + ((n) << 5))
+
+/* Device-mode control and status registers */
+
+#define STM32_OTG_DCFG_OFFSET         0x0800 /* Device configuration register */
+#define STM32_OTG_DCTL_OFFSET         0x0804 /* Device control register */
+#define STM32_OTG_DSTS_OFFSET         0x0808 /* Device status register */
+#define STM32_OTG_DIEPMSK_OFFSET      0x0810 /* Device IN endpoint common interrupt mask register */
+#define STM32_OTG_DOEPMSK_OFFSET      0x0814 /* Device OUT endpoint common interrupt mask register */
+#define STM32_OTG_DAINT_OFFSET        0x0818 /* Device all endpoints interrupt register */
+#define STM32_OTG_DAINTMSK_OFFSET     0x081c /* All endpoints interrupt mask register */
+#define STM32_OTG_DVBUSDIS_OFFSET     0x0828 /* Device VBUS discharge time register */
+#define STM32_OTG_DVBUSPULSE_OFFSET   0x082c /* Device VBUS pulsing time register */
+#define STM32_OTG_DIEPEMPMSK_OFFSET   0x0834 /* Device IN endpoint FIFO empty interrupt mask register */
+
+#define STM32_OTG_DIEP_OFFSET(n)      (0x0900 + ((n) << 5))
+#define STM32_OTG_DIEPCTL_EPOFFSET    0x0000 /* Device endpoint control register */
+#define STM32_OTG_DIEPINT_EPOFFSET    0x0008 /* Device endpoint interrupt register */
+#define STM32_OTG_DIEPTSIZ_EPOFFSET   0x0010 /* Device IN endpoint transfer size register */
+#define STM32_OTG_DTXFSTS_EPOFFSET    0x0018 /* Device IN endpoint transmit FIFO status register */
+
+#define STM32_OTG_DIEPCTL_OFFSET(n)   (0x0900 + ((n) << 5))
+
+#define STM32_OTG_DIEPINT_OFFSET(n)   (0x0908 + ((n) << 5))
+
+#define STM32_OTG_DIEPTSIZ_OFFSET(n)  (0x910 + ((n) << 5))
+
+#define STM32_OTG_DTXFSTS_OFFSET(n)   (0x0918 + ((n) << 5))
+
+#define STM32_OTG_DOEP_OFFSET(n)      (0x0b00 + ((n) << 5))
+#define STM32_OTG_DOEPCTL_EPOFFSET    0x0000 /* Device control OUT endpoint 0 control register */
+#define STM32_OTG_DOEPINT_EPOFFSET    0x0008 /* Device endpoint-x interrupt register */
+
+#define STM32_OTG_DOEPCTL_OFFSET(n)   (0x0b00 + ((n) << 5))
+
+#define STM32_OTG_DOEPINT_OFFSET(n)   (0x0b08 + ((n) << 5))
+
+#define STM32_OTG_DOEPTSIZ_OFFSET(n)  (0x0b10 + ((n) << 5))
+
+/* Power and clock gating registers */
+
+#define STM32_OTG_PCGCCTL_OFFSET      0x0e00 /* Power and clock gating control register */
+
+/* Data FIFO (DFIFO) access registers */
+
+#define STM32_OTG_DFIFO_DEP_OFFSET(n) (0x1000 + ((n) << 12))
+#define STM32_OTG_DFIFO_HCH_OFFSET(n) (0x1000 + ((n) << 12))
+
+
+/* Register Addresses *******************************************************************************/
+
+#define STM32_OTG_GOTGCTL             (STM32_OTG_BASE+STM32_OTG_GOTGCTL_OFFSET)
+#define STM32_OTG_GOTGINT             (STM32_OTG_BASE+STM32_OTG_GOTGINT_OFFSET)
+#define STM32_OTG_GAHBCFG             (STM32_OTG_BASE+STM32_OTG_GAHBCFG_OFFSET)
+#define STM32_OTG_GUSBCFG             (STM32_OTG_BASE+STM32_OTG_GUSBCFG_OFFSET)
+#define STM32_OTG_GRSTCTL             (STM32_OTG_BASE+STM32_OTG_GRSTCTL_OFFSET)
+#define STM32_OTG_GINTSTS             (STM32_OTG_BASE+STM32_OTG_GINTSTS_OFFSET)
+#define STM32_OTG_GINTMSK             (STM32_OTG_BASE+STM32_OTG_GINTMSK_OFFSET)
+#define STM32_OTG_GRXSTSR             (STM32_OTG_BASE+STM32_OTG_GRXSTSR_OFFSET)
+#define STM32_OTG_GRXSTSP             (STM32_OTG_BASE+STM32_OTG_GRXSTSP_OFFSET)
+#define STM32_OTG_GRXFSIZ             (STM32_OTG_BASE+STM32_OTG_GRXFSIZ_OFFSET)
+#define STM32_OTG_HNPTXFSIZ           (STM32_OTG_BASE+STM32_OTG_HNPTXFSIZ_OFFSET)
+#define STM32_OTG_DIEPTXF0            (STM32_OTG_BASE+STM32_OTG_DIEPTXF0_OFFSET)
+#define STM32_OTG_HNPTXSTS            (STM32_OTG_BASE+STM32_OTG_HNPTXSTS_OFFSET)
+#define STM32_OTG_GCCFG               (STM32_OTG_BASE+STM32_OTG_GCCFG_OFFSET)
+#define STM32_OTG_CID                 (STM32_OTG_BASE+STM32_OTG_CID_OFFSET)
+#define STM32_OTG_HPTXFSIZ            (STM32_OTG_BASE+STM32_OTG_HPTXFSIZ_OFFSET)
+
+#define STM32_OTG_DIEPTXF(n)          (STM32_OTG_BASE+STM32_OTG_DIEPTXF_OFFSET(n))
+
+/* Host-mode control and status registers */
+
+#define STM32_OTG_HCFG                (STM32_OTG_BASE+STM32_OTG_HCFG_OFFSET)
+#define STM32_OTG_HFIR                (STM32_OTG_BASE+STM32_OTG_HFIR_OFFSET)
+#define STM32_OTG_HFNUM               (STM32_OTG_BASE+STM32_OTG_HFNUM_OFFSET)
+#define STM32_OTG_HPTXSTS             (STM32_OTG_BASE+STM32_OTG_HPTXSTS_OFFSET)
+#define STM32_OTG_HAINT               (STM32_OTG_BASE+STM32_OTG_HAINT_OFFSET)
+#define STM32_OTG_HAINTMSK            (STM32_OTG_BASE+STM32_OTG_HAINTMSK_OFFSET)
+#define STM32_OTG_HPRT                (STM32_OTG_BASE+STM32_OTG_HPRT_OFFSET)
+
+#define STM32_OTG_CHAN(n)             (STM32_OTG_BASE+STM32_OTG_CHAN_OFFSET(n))
+
+#define STM32_OTG_HCCHAR(n)           (STM32_OTG_BASE+STM32_OTG_HCCHAR_OFFSET(n))
+
+#define STM32_OTG_HCINT(n)            (STM32_OTG_BASE+STM32_OTG_HCINT_OFFSET(n))
+
+#define STM32_OTG_HCINTMSK(n)         (STM32_OTG_BASE+STM32_OTG_HCINTMSK_OFFSET(n))
+
+#define STM32_OTG_HCTSIZ(n)           (STM32_OTG_BASE+STM32_OTG_HCTSIZ_OFFSET(n))
+
+/* Device-mode control and status registers */
+
+#define STM32_OTG_DCFG                (STM32_OTG_BASE+STM32_OTG_DCFG_OFFSET)
+#define STM32_OTG_DCTL                (STM32_OTG_BASE+STM32_OTG_DCTL_OFFSET)
+#define STM32_OTG_DSTS                (STM32_OTG_BASE+STM32_OTG_DSTS_OFFSET)
+#define STM32_OTG_DIEPMSK             (STM32_OTG_BASE+STM32_OTG_DIEPMSK_OFFSET)
+#define STM32_OTG_DOEPMSK             (STM32_OTG_BASE+STM32_OTG_DOEPMSK_OFFSET)
+#define STM32_OTG_DAINT               (STM32_OTG_BASE+STM32_OTG_DAINT_OFFSET)
+#define STM32_OTG_DAINTMSK            (STM32_OTG_BASE+STM32_OTG_DAINTMSK_OFFSET)
+#define STM32_OTG_DVBUSDIS            (STM32_OTG_BASE+STM32_OTG_DVBUSDIS_OFFSET)
+#define STM32_OTG_DVBUSPULSE          (STM32_OTG_BASE+STM32_OTG_DVBUSPULSE_OFFSET)
+#define STM32_OTG_DIEPEMPMSK          (STM32_OTG_BASE+STM32_OTG_DIEPEMPMSK_OFFSET)
+
+#define STM32_OTG_DIEP(n)             (STM32_OTG_BASE+STM32_OTG_DIEP_OFFSET(n))
+
+#define STM32_OTG_DIEPCTL(n)          (STM32_OTG_BASE+STM32_OTG_DIEPCTL_OFFSET(n))
+
+#define STM32_OTG_DIEPINT(n)          (STM32_OTG_BASE+STM32_OTG_DIEPINT_OFFSET(n))
+
+#define STM32_OTG_DIEPTSIZ(n)         (STM32_OTG_BASE+STM32_OTG_DIEPTSIZ_OFFSET(n))
+
+#define STM32_OTG_DTXFSTS(n)          (STM32_OTG_BASE+STM32_OTG_DTXFSTS_OFFSET(n))
+
+#define STM32_OTG_DOEP(n)             (STM32_OTG_BASE+STM32_OTG_DOEP_OFFSET(n))
+
+#define STM32_OTG_DOEPCTL(n)          (STM32_OTG_BASE+STM32_OTG_DOEPCTL_OFFSET(n))
+
+#define STM32_OTG_DOEPINT(n)          (STM32_OTG_BASE+STM32_OTG_DOEPINT_OFFSET(n))
+
+#define STM32_OTG_DOEPTSIZ(n)         (STM32_OTG_BASE+STM32_OTG_DOEPTSIZ_OFFSET(n))
+
+/* Power and clock gating registers */
+
+#define STM32_OTG_PCGCCTL             (STM32_OTG_BASE+STM32_OTG_PCGCCTL_OFFSET)
+
+/* Data FIFO (DFIFO) access registers */
+
+#define STM32_OTG_DFIFO_DEP(n)        (STM32_OTG_BASE+STM32_OTG_DFIFO_DEP_OFFSET(n))
+#define STM32_OTG_DFIFO_HCH(n)        (STM32_OTG_BASE+STM32_OTG_DFIFO_HCH_OFFSET(n))
+
+
+/* Register Bitfield Definitions ********************************************************************/
+/* Core global control and status registers */
+
+/* Control and status register */
+
+#define OTG_GOTGCTL_SRQSCS            (1 << 0)  /* Bit 0:  Session request success */
+#define OTG_GOTGCTL_SRQ               (1 << 1)  /* Bit 1:  Session request */
+#define OTG_GOTGCTL_VBVALOEN          (1 << 2)  /* Bit 2:  VBUS valid override enable */
+#define OTG_GOTGCTL_VBVALOVAL         (1 << 3)  /* Bit 3:  VBUS valid override value */
+#define OTG_GOTGCTL_AVALOEN           (1 << 4)  /* Bit 4:  A-peripheral session valid override enable */
+#define OTG_GOTGCTL_AVALOVAL          (1 << 5)  /* Bit 5:  A-peripheral session valid override value */
+#define OTG_GOTGCTL_BVALOEN           (1 << 6)  /* Bit 6:  B-peripheral session valid override enable */
+#define OTG_GOTGCTL_BVALOVAL          (1 << 7)  /* Bit 7:  B-peripheral session valid override value  */
+#define OTG_GOTGCTL_HNGSCS            (1 << 8)  /* Bit 8:  Host negotiation success */
+#define OTG_GOTGCTL_HNPRQ             (1 << 9)  /* Bit 9:  HNP request */
+#define OTG_GOTGCTL_HSHNPEN           (1 << 10) /* Bit 10: host set HNP enable */
+#define OTG_GOTGCTL_DHNPEN            (1 << 11) /* Bit 11: Device HNP enabled */
+#define OTG_GOTGCTL_EHEN              (1 << 12) /* Bit 12: Embedded host enable */
+                                                  /* Bits 13-15: Reserved, must be kept at reset value */
+#define OTG_GOTGCTL_CIDSTS            (1 << 16) /* Bit 16: Connector ID status */
+#define OTG_GOTGCTL_DBCT              (1 << 17) /* Bit 17: Long/short debounce time */
+#define OTG_GOTGCTL_ASVLD             (1 << 18) /* Bit 18: A-session valid */
+#define OTG_GOTGCTL_BSVLD             (1 << 19) /* Bit 19: B-session valid */
+#define OTG_GOTGCTL_OTGVER            (1 << 20) /* Bit 20: OTG version */
+                                                  /* Bits 21-31: Reserved, must be kept at reset value */
+/* Interrupt register */
+                                                  /* Bits 1:0 Reserved, must be kept at reset value */
+#define OTG_GOTGINT_SEDET             (1 << 2)  /* Bit 2: Session end detected */
+                                                  /* Bits 3-7: Reserved, must be kept at reset value */
+#define OTG_GOTGINT_SRSSCHG           (1 << 8)  /* Bit 8: Session request success status change */
+#define OTG_GOTGINT_HNSSCHG           (1 << 9)  /* Bit 9: Host negotiation success status change */
+                                                  /* Bits 16:10 Reserved, must be kept at reset value */
+#define OTG_GOTGINT_HNGDET            (1 << 17) /* Bit 17: Host negotiation detected */
+#define OTG_GOTGINT_ADTOCHG           (1 << 18) /* Bit 18: A-device timeout change */
+#define OTG_GOTGINT_DBCDNE            (1 << 19) /* Bit 19: Debounce done */
+#define OTG_GOTGINT_IDCHNG            (1 << 20) /* Bit 20: Change in ID pin input value */
+                                                  /* Bits 21-31: Reserved, must be kept at reset value */
+
+/* AHB configuration register */
+
+#define OTG_GAHBCFG_GINTMSK           (1 << 0)  /* Bit 0: Global interrupt mask */
+                                                  /* Bits 1-6: Reserved, must be kept at reset value */
+#define OTG_GAHBCFG_TXFELVL           (1 << 7)  /* Bit 7: TxFIFO empty level */
+#define OTG_GAHBCFG_PTXFELVL          (1 << 8)  /* Bit 8: Periodic TxFIFO empty level */
+                                                  /* Bits 20-31: Reserved, must be kept at reset value */
+/* USB configuration register */
+
+#define OTG_GUSBCFG_TOCAL_SHIFT       (0)       /* Bits 0-2: FS timeout calibration */
+#define OTG_GUSBCFG_TOCAL_MASK        (7 << OTG_GUSBCFG_TOCAL_SHIFT)
+                                                  /* Bits 3-5: Reserved, must be kept at reset value */
+#define OTG_GUSBCFG_PHYSEL            (1 << 6)  /* Bit 6: Full Speed serial transceiver select */
+                                                  /* Bit 7: Reserved, must be kept at reset value */
+#define OTG_GUSBCFG_SRPCAP            (1 << 8)  /* Bit 8: SRP-capable */
+#define OTG_GUSBCFG_HNPCAP            (1 << 9)  /* Bit 9: HNP-capable */
+#define OTG_GUSBCFG_TRDT_SHIFT        (10)      /* Bits 10-13: USB turnaround time */
+#define OTG_GUSBCFG_TRDT_MASK         (15 << OTG_GUSBCFG_TRDT_SHIFT)
+#  define OTG_GUSBCFG_TRDT(n)         ((n) << OTG_GUSBCFG_TRDT_SHIFT)
+                                                  /* Bits 14-28: Reserved, must be kept at reset value */
+#define OTG_GUSBCFG_FHMOD             (1 << 29) /* Bit 29: Force host mode */
+#define OTG_GUSBCFG_FDMOD             (1 << 30) /* Bit 30: Force device mode */
+#define OTG_GUSBCFG_CTXPKT            (1 << 31) /* Bit 31: Corrupt Tx packet */
+                                                  /* Bits 20-31: Reserved, must be kept at reset value */
+/* Reset register */
+
+#define OTG_GRSTCTL_CSRST             (1 << 0)  /* Bit 0: Core soft reset */
+#define OTG_GRSTCTL_HSRST             (1 << 1)  /* Bit 1: HCLK soft reset */
+#define OTG_GRSTCTL_FCRST             (1 << 2)  /* Bit 2: Host frame counter reset */
+                                                  /* Bit 3 Reserved, must be kept at reset value */
+#define OTG_GRSTCTL_RXFFLSH           (1 << 4)  /* Bit 4: RxFIFO flush */
+#define OTG_GRSTCTL_TXFFLSH           (1 << 5)  /* Bit 5: TxFIFO flush */
+#define OTG_GRSTCTL_TXFNUM_SHIFT      (6)       /* Bits 6-10: TxFIFO number */
+#define OTG_GRSTCTL_TXFNUM_MASK       (31 << OTG_GRSTCTL_TXFNUM_SHIFT)
+#  define OTG_GRSTCTL_TXFNUM_HNONPER  (0 << OTG_GRSTCTL_TXFNUM_SHIFT)   /* Non-periodic TxFIFO flush in host mode */
+#  define OTG_GRSTCTL_TXFNUM_HPER     (1 << OTG_GRSTCTL_TXFNUM_SHIFT)   /* Periodic TxFIFO flush in host mode */
+#  define OTG_GRSTCTL_TXFNUM_HALL     (16 << OTG_GRSTCTL_TXFNUM_SHIFT)  /* Flush all the transmit FIFOs in host mode.*/
+#  define OTG_GRSTCTL_TXFNUM_D(n)     ((n) << OTG_GRSTCTL_TXFNUM_SHIFT) /* TXFIFO n flush in device mode, n=0-15 */
+#  define OTG_GRSTCTL_TXFNUM_DALL     (16 << OTG_GRSTCTL_TXFNUM_SHIFT)  /* Flush all the transmit FIFOs in device mode.*/
+                                                  /* Bits 11-31: Reserved, must be kept at reset value */
+#define OTG_GRSTCTL_AHBIDL            (1 << 31) /* Bit 31: AHB master idle */
+
+/* Core interrupt and Interrupt mask registers */
+
+#define OTG_GINTSTS_CMOD              (1 << 0)  /* Bit 0:  Current mode of operation */
+#  define OTG_GINTSTS_DEVMODE         (0)
+#  define OTG_GINTSTS_HOSTMODE        (OTG_GINTSTS_CMOD)
+#define OTG_GINT_MMIS                 (1 << 1)  /* Bit 1:  Mode mismatch interrupt */
+#define OTG_GINT_OTG                  (1 << 2)  /* Bit 2:  OTG interrupt */
+#define OTG_GINT_SOF                  (1 << 3)  /* Bit 3:  Start of frame */
+#define OTG_GINT_RXFLVL               (1 << 4)  /* Bit 4:  RxFIFO non-empty */
+#define OTG_GINT_NPTXFE               (1 << 5)  /* Bit 5:  Non-periodic TxFIFO empty */
+#define OTG_GINT_GINAKEFF             (1 << 6)  /* Bit 6:  Global IN non-periodic NAK effective */
+#define OTG_GINT_GONAKEFF             (1 << 7)  /* Bit 7:  Global OUT NAK effective */
+#define OTG_GINT_RES89                (3 << 8)  /* Bits 8-9: Reserved, must be kept at reset value */
+#define OTG_GINT_ESUSP                (1 << 10) /* Bit 10: Early suspend */
+#define OTG_GINT_USBSUSP              (1 << 11) /* Bit 11: USB suspend */
+#define OTG_GINT_USBRST               (1 << 12) /* Bit 12: USB reset */
+#define OTG_GINT_ENUMDNE              (1 << 13) /* Bit 13: Enumeration done */
+#define OTG_GINT_ISOODRP              (1 << 14) /* Bit 14: Isochronous OUT packet dropped interrupt */
+#define OTG_GINT_EOPF                 (1 << 15) /* Bit 15: End of periodic frame interrupt */
+#define OTG_GINT_RES1617              (3 << 16) /* Bits 16-17 Reserved, must be kept at reset value */
+#define OTG_GINT_IEP                  (1 << 18) /* Bit 18: IN endpoint interrupt */
+#define OTG_GINT_OEP                  (1 << 19) /* Bit 19: OUT endpoint interrupt */
+#define OTG_GINT_IISOIXFR             (1 << 20) /* Bit 20: Incomplete isochronous IN transfer */
+#define OTG_GINT_IISOOXFR             (1 << 21) /* Bit 21: Incomplete isochronous OUT transfer (device) */
+#define OTG_GINT_IPXFR                (1 << 21) /* Bit 21: Incomplete periodic transfer (host) */
+#define OTG_GINT_RES22                (1 << 22) /* Bits 22: Reserved, must be kept at reset value */
+#define OTG_GINT_RSTDET               (1 << 23) /* Bit 23: Reset detected interrupt */
+#define OTG_GINT_HPRT                 (1 << 24) /* Bit 24: Host port interrupt */
+#define OTG_GINT_HC                   (1 << 25) /* Bit 25: Host channels interrupt */
+#define OTG_GINT_PTXFE                (1 << 26) /* Bit 26: Periodic TxFIFO empty */
+#define OTG_GINT_LPMINT               (1 << 27) /* Bit 27: LPM interrupt */
+#define OTG_GINT_CIDSCHG              (1 << 28) /* Bit 28: Connector ID status change */
+#define OTG_GINT_DISC                 (1 << 29) /* Bit 29: Disconnect detected interrupt */
+#define OTG_GINT_SRQ                  (1 << 30) /* Bit 30: Session request/new session detected interrupt */
+#define OTG_GINT_WKUP                 (1 << 31) /* Bit 31: Resume/remote wakeup detected interrupt */
+
+/* Receive status debug read/OTG status read and pop registers (host mode) */
+
+#define OTG_GRXSTSH_CHNUM_SHIFT       (0)       /* Bits 0-3: Channel number */
+#define OTG_GRXSTSH_CHNUM_MASK        (15 << OTG_GRXSTSH_CHNUM_SHIFT)
+#define OTG_GRXSTSH_BCNT_SHIFT        (4)       /* Bits 4-14: Byte count */
+#define OTG_GRXSTSH_BCNT_MASK         (0x7ff << OTG_GRXSTSH_BCNT_SHIFT)
+#define OTG_GRXSTSH_DPID_SHIFT        (15)      /* Bits 15-16: Data PID */
+#define OTG_GRXSTSH_DPID_MASK         (3 << OTG_GRXSTSH_DPID_SHIFT)
+#  define OTG_GRXSTSH_DPID_DATA0      (0 << OTG_GRXSTSH_DPID_SHIFT)
+#  define OTG_GRXSTSH_DPID_DATA2      (1 << OTG_GRXSTSH_DPID_SHIFT)
+#  define OTG_GRXSTSH_DPID_DATA1      (2 << OTG_GRXSTSH_DPID_SHIFT)
+#  define OTG_GRXSTSH_DPID_MDATA      (3 << OTG_GRXSTSH_DPID_SHIFT)
+#define OTG_GRXSTSH_PKTSTS_SHIFT      (17)      /* Bits 17-20: Packet status */
+#define OTG_GRXSTSH_PKTSTS_MASK       (15 << OTG_GRXSTSH_PKTSTS_SHIFT)
+#  define OTG_GRXSTSH_PKTSTS_INRECVD  (2 << OTG_GRXSTSH_PKTSTS_SHIFT) /* IN data packet received */
+#  define OTG_GRXSTSH_PKTSTS_INDONE   (3 << OTG_GRXSTSH_PKTSTS_SHIFT) /* IN transfer completed */
+#  define OTG_GRXSTSH_PKTSTS_DTOGERR  (5 << OTG_GRXSTSH_PKTSTS_SHIFT) /* Data toggle error */
+#  define OTG_GRXSTSH_PKTSTS_HALTED   (7 << OTG_GRXSTSH_PKTSTS_SHIFT) /* Channel halted */
+                                                  /* Bits 21-31: Reserved, must be kept at reset value */
+/* Receive status debug read/OTG status read and pop registers (device mode) */
+
+#define OTG_GRXSTSD_EPNUM_SHIFT       (0)       /* Bits 0-3: Endpoint number */
+#define OTG_GRXSTSD_EPNUM_MASK        (15 << OTG_GRXSTSD_EPNUM_SHIFT)
+#define OTG_GRXSTSD_BCNT_SHIFT        (4)       /* Bits 4-14: Byte count */
+#define OTG_GRXSTSD_BCNT_MASK         (0x7ff << OTG_GRXSTSD_BCNT_SHIFT)
+#define OTG_GRXSTSD_DPID_SHIFT        (15)      /* Bits 15-16: Data PID */
+#define OTG_GRXSTSD_DPID_MASK         (3 << OTG_GRXSTSD_DPID_SHIFT)
+#  define OTG_GRXSTSD_DPID_DATA0      (0 << OTG_GRXSTSD_DPID_SHIFT)
+#  define OTG_GRXSTSD_DPID_DATA2      (1 << OTG_GRXSTSD_DPID_SHIFT)
+#  define OTG_GRXSTSD_DPID_DATA1      (2 << OTG_GRXSTSD_DPID_SHIFT)
+#  define OTG_GRXSTSD_DPID_MDATA      (3 << OTG_GRXSTSD_DPID_SHIFT)
+#define OTG_GRXSTSD_PKTSTS_SHIFT      (17)      /* Bits 17-20: Packet status */
+#define OTG_GRXSTSD_PKTSTS_MASK       (15 << OTG_GRXSTSD_PKTSTS_SHIFT)
+#  define OTG_GRXSTSD_PKTSTS_OUTNAK     (1 << OTG_GRXSTSD_PKTSTS_SHIFT) /* Global OUT NAK */
+#  define OTG_GRXSTSD_PKTSTS_OUTRECVD   (2 << OTG_GRXSTSD_PKTSTS_SHIFT) /* OUT data packet received */
+#  define OTG_GRXSTSD_PKTSTS_OUTDONE    (3 << OTG_GRXSTSD_PKTSTS_SHIFT) /* OUT transfer completed */
+#  define OTG_GRXSTSD_PKTSTS_SETUPDONE  (4 << OTG_GRXSTSD_PKTSTS_SHIFT) /* SETUP transaction completed */
+#  define OTG_GRXSTSD_PKTSTS_SETUPRECVD (6 << OTG_GRXSTSD_PKTSTS_SHIFT) /* SETUP data packet received */
+#define OTG_GRXSTSD_FRMNUM_SHIFT      (21)      /* Bits 21-24: Frame number */
+#define OTG_GRXSTSD_FRMNUM_MASK       (15 << OTG_GRXSTSD_FRMNUM_SHIFT)
+                                                  /* Bits 25-31: Reserved, must be kept at reset value */
+/* Receive FIFO size register */
+
+#define OTG_GRXFSIZ_MASK              (0xffff)
+
+/* Host non-periodic transmit FIFO size register */
+
+#define OTG_HNPTXFSIZ_NPTXFSA_SHIFT   (0)       /* Bits 0-15: Non-periodic transmit RAM start address */
+#define OTG_HNPTXFSIZ_NPTXFSA_MASK    (0xffff << OTG_HNPTXFSIZ_NPTXFSA_SHIFT)
+#define OTG_HNPTXFSIZ_NPTXFD_SHIFT    (16)      /* Bits 16-31: Non-periodic TxFIFO depth */
+#define OTG_HNPTXFSIZ_NPTXFD_MASK     (0xffff << OTG_HNPTXFSIZ_NPTXFD_SHIFT)
+#  define OTG_HNPTXFSIZ_NPTXFD_MIN    (16 << OTG_HNPTXFSIZ_NPTXFD_SHIFT)
+#  define OTG_HNPTXFSIZ_NPTXFD_MAX    (256 << OTG_HNPTXFSIZ_NPTXFD_SHIFT)
+
+/* Endpoint 0 Transmit FIFO size */
+
+#define OTG_DIEPTXF0_TX0FD_SHIFT      (0)       /* Bits 0-15: Endpoint 0 transmit RAM start address */
+#define OTG_DIEPTXF0_TX0FD_MASK       (0xffff << OTG_DIEPTXF0_TX0FD_SHIFT)
+#define OTG_DIEPTXF0_TX0FSA_SHIFT     (16)      /* Bits 16-31: Endpoint 0 TxFIFO depth */
+#define OTG_DIEPTXF0_TX0FSA_MASK      (0xffff << OTG_DIEPTXF0_TX0FSA_SHIFT)
+#  define OTG_DIEPTXF0_TX0FSA_MIN     (16 << OTG_DIEPTXF0_TX0FSA_SHIFT)
+#  define OTG_DIEPTXF0_TX0FSA_MAX     (256 << OTG_DIEPTXF0_TX0FSA_SHIFT)
+
+/* Non-periodic transmit FIFO/queue status register */
+
+#define OTG_HNPTXSTS_NPTXFSAV_SHIFT   (0)       /* Bits 0-15: Non-periodic TxFIFO space available */
+#define OTG_HNPTXSTS_NPTXFSAV_MASK    (0xffff << OTG_HNPTXSTS_NPTXFSAV_SHIFT)
+#  define OTG_HNPTXSTS_NPTXFSAV_FULL  (0 << OTG_HNPTXSTS_NPTXFSAV_SHIFT)
+#define OTG_HNPTXSTS_NPTQXSAV_SHIFT   (16)      /* Bits 16-23: Non-periodic transmit request queue space available */
+#define OTG_HNPTXSTS_NPTQXSAV_MASK    (0xff << OTG_HNPTXSTS_NPTQXSAV_SHIFT)
+#  define OTG_HNPTXSTS_NPTQXSAV_FULL  (0 << OTG_HNPTXSTS_NPTQXSAV_SHIFT)
+#define OTG_HNPTXSTS_NPTXQTOP_SHIFT   (24)      /* Bits 24-30: Top of the non-periodic transmit request queue */
+#define OTG_HNPTXSTS_NPTXQTOP_MASK    (0x7f << OTG_HNPTXSTS_NPTXQTOP_SHIFT)
+#  define OTG_HNPTXSTS_TERMINATE      (1 << 24) /* Bit 24: Terminate (last entry for selected channel/endpoint) */
+#  define OTG_HNPTXSTS_TYPE_SHIFT     (25)      /* Bits 25-26: Status */
+#  define OTG_HNPTXSTS_TYPE_MASK      (3 << OTG_HNPTXSTS_TYPE_SHIFT)
+#    define OTG_HNPTXSTS_TYPE_INOUT   (0 << OTG_HNPTXSTS_TYPE_SHIFT) /* IN/OUT token */
+#    define OTG_HNPTXSTS_TYPE_ZLP     (1 << OTG_HNPTXSTS_TYPE_SHIFT) /* Zero-length transmit packet (device IN/host OUT) */
+#    define OTG_HNPTXSTS_TYPE_HALT    (3 << OTG_HNPTXSTS_TYPE_SHIFT) /* Channel halt command */
+#  define OTG_HNPTXSTS_CHNUM_SHIFT    (27)      /* Bits 27-30: Channel number */
+#  define OTG_HNPTXSTS_CHNUM_MASK     (15 << OTG_HNPTXSTS_CHNUM_SHIFT)
+#  define OTG_HNPTXSTS_EPNUM_SHIFT    (27)      /* Bits 27-30: Endpoint number */
+#  define OTG_HNPTXSTS_EPNUM_MASK     (15 << OTG_HNPTXSTS_EPNUM_SHIFT)
+                                                  /* Bit 31 Reserved, must be kept at reset value */
+/* General core configuration register */
+                                                  /* Bits 0-15: Reserved, must be kept at reset value */
+#define OTG_GCCFG_PWRDWN              (1 << 16) /* Bit 16: Power down */
+                                                  /* Bit 17 Reserved, must be kept at reset value */
+#define OTG_GCCFG_VBDEN               (1 << 21) /* Bit 21: USB VBUS detection enable */
+                                                  /* Bits 22-31: Reserved, must be kept at reset value */
+/* Core ID register  (32-bit product ID) */
+
+/* Host periodic transmit FIFO size register */
+
+#define OTG_HPTXFSIZ_PTXSA_SHIFT      (0)       /* Bits 0-15: Host periodic TxFIFO start address */
+#define OTG_HPTXFSIZ_PTXSA_MASK       (0xffff << OTG_HPTXFSIZ_PTXSA_SHIFT)
+#define OTG_HPTXFSIZ_PTXFD_SHIFT      (16)      /* Bits 16-31: Host periodic TxFIFO depth */
+#define OTG_HPTXFSIZ_PTXFD_MASK       (0xffff << OTG_HPTXFSIZ_PTXFD_SHIFT)
+
+/* Device IN endpoint transmit FIFOn size register */
+
+#define OTG_DIEPTXF_INEPTXSA_SHIFT    (0)       /* Bits 0-15: IN endpoint FIFOx transmit RAM start address */
+#define OTG_DIEPTXF_INEPTXSA_MASK     (0xffff << OTG_DIEPTXF_INEPTXSA_SHIFT)
+#define OTG_DIEPTXF_INEPTXFD_SHIFT    (16)       /* Bits 16-31: IN endpoint TxFIFO depth */
+#define OTG_DIEPTXF_INEPTXFD_MASK     (0xffff << OTG_DIEPTXF_INEPTXFD_SHIFT)
+#  define OTG_DIEPTXF_INEPTXFD_MIN    (16 << OTG_DIEPTXF_INEPTXFD_MASK)
+
+/* Host-mode control and status registers */
+
+/* Host configuration register */
+
+#define OTG_HCFG_FSLSPCS_SHIFT        (0)       /* Bits 0-1: FS/LS PHY clock select */
+#define OTG_HCFG_FSLSPCS_MASK         (3 << OTG_HCFG_FSLSPCS_SHIFT)
+#  define OTG_HCFG_FSLSPCS_FS48MHz    (1 << OTG_HCFG_FSLSPCS_SHIFT) /* FS host mode, PHY clock is running at 48 MHz */
+#  define OTG_HCFG_FSLSPCS_LS48MHz    (1 << OTG_HCFG_FSLSPCS_SHIFT) /* LS host mode,  Select 48 MHz PHY clock frequency */
+#  define OTG_HCFG_FSLSPCS_LS6MHz     (2 << OTG_HCFG_FSLSPCS_SHIFT) /* LS host mode, Select 6 MHz PHY clock frequency */
+#define OTG_HCFG_FSLSS                (1 << 2)  /* Bit 2: FS- and LS-only support */
+                                                  /* Bits 31:3 Reserved, must be kept at reset value */
+/* Host frame interval register */
+
+#define OTG_HFIR_MASK                 (0xffff)
+
+/* Host frame number/frame time remaining register */
+
+#define OTG_HFNUM_FRNUM_SHIFT         (0)       /* Bits 0-15: Frame number */
+#define OTG_HFNUM_FRNUM_MASK          (0xffff << OTG_HFNUM_FRNUM_SHIFT)
+#define OTG_HFNUM_FTREM_SHIFT         (16)      /* Bits 16-31: Frame time remaining */
+#define OTG_HFNUM_FTREM_MASK          (0xffff << OTG_HFNUM_FTREM_SHIFT)
+
+/* Host periodic transmit FIFO/queue status register */
+
+#define OTG_HPTXSTS_PTXFSAVL_SHIFT    (0)       /* Bits 0-15: Periodic transmit data FIFO space available */
+#define OTG_HPTXSTS_PTXFSAVL_MASK     (0xffff << OTG_HPTXSTS_PTXFSAVL_SHIFT)
+#  define OTG_HPTXSTS_PTXFSAVL_FULL   (0 << OTG_HPTXSTS_PTXFSAVL_SHIFT)
+#define OTG_HPTXSTS_PTXQSAV_SHIFT     (16)      /* Bits 16-23: Periodic transmit request queue space available */
+#define OTG_HPTXSTS_PTXQSAV_MASK      (0xff << OTG_HPTXSTS_PTXQSAV_SHIFT)
+#  define OTG_HPTXSTS_PTXQSAV_FULL    (0 << OTG_HPTXSTS_PTXQSAV_SHIFT)
+#define OTG_HPTXSTS_PTXQTOP_SHIFT     (24)      /* Bits 24-31: Top of the periodic transmit request queue */
+#define OTG_HPTXSTS_PTXQTOP_MASK      (0x7f << OTG_HPTXSTS_PTXQTOP_SHIFT)
+#  define OTG_HPTXSTS_TERMINATE       (1 << 24) /* Bit 24: Terminate (last entry for selected channel/endpoint) */
+#  define OTG_HPTXSTS_TYPE_SHIFT      (25)      /* Bits 25-26: Type */
+#  define OTG_HPTXSTS_TYPE_MASK       (3 << OTG_HPTXSTS_TYPE_SHIFT)
+#    define OTG_HPTXSTS_TYPE_INOUT    (0 << OTG_HPTXSTS_TYPE_SHIFT) /* IN/OUT token */
+#    define OTG_HPTXSTS_TYPE_ZLP      (1 << OTG_HPTXSTS_TYPE_SHIFT) /* Zero-length transmit packet */
+#    define OTG_HPTXSTS_TYPE_HALT     (3 << OTG_HPTXSTS_TYPE_SHIFT) /* Disable channel command */
+#  define OTG_HPTXSTS_EPNUM_SHIFT     (27)      /* Bits 27-30: Endpoint number */
+#  define OTG_HPTXSTS_EPNUM_MASK      (15 << OTG_HPTXSTS_EPNUM_SHIFT)
+#  define OTG_HPTXSTS_CHNUM_SHIFT     (27)      /* Bits 27-30: Channel number */
+#  define OTG_HPTXSTS_CHNUM_MASK      (15 << OTG_HPTXSTS_CHNUM_SHIFT)
+#  define OTG_HPTXSTS_ODD             (1 << 24) /* Bit 31: Send in odd (vs even) frame */
+
+/* Host all channels interrupt and all channels interrupt mask registers */
+
+#define OTG_HAINT(n)                  (1 << (n)) /* Bits 15:0 HAINTM: Channel interrupt */
+
+/* Host port control and status register */
+
+#define OTG_HPRT_PCSTS                (1 << 0)  /* Bit 0:  Port connect status */
+#define OTG_HPRT_PCDET                (1 << 1)  /* Bit 1:  Port connect detected */
+#define OTG_HPRT_PENA                 (1 << 2)  /* Bit 2:  Port enable */
+#define OTG_HPRT_PENCHNG              (1 << 3)  /* Bit 3:  Port enable/disable change */
+#define OTG_HPRT_POCA                 (1 << 4)  /* Bit 4:  Port overcurrent active */
+#define OTG_HPRT_POCCHNG              (1 << 5)  /* Bit 5:  Port overcurrent change */
+#define OTG_HPRT_PRES                 (1 << 6)  /* Bit 6:  Port resume */
+#define OTG_HPRT_PSUSP                (1 << 7)  /* Bit 7:  Port suspend */
+#define OTG_HPRT_PRST                 (1 << 8)  /* Bit 8:  Port reset */
+                                                  /* Bit 9:  Reserved, must be kept at reset value */
+#define OTG_HPRT_PLSTS_SHIFT          (10)      /* Bits 10-11: Port line status */
+#define OTG_HPRT_PLSTS_MASK           (3 << OTG_HPRT_PLSTS_SHIFT)
+#  define OTG_HPRT_PLSTS_DP           (1 << 10) /* Bit 10: Logic level of OTG_FS_FS_DP */
+#  define OTG_HPRT_PLSTS_DM           (1 << 11) /* Bit 11: Logic level of OTG_FS_FS_DM */
+#define OTG_HPRT_PPWR                 (1 << 12) /* Bit 12: Port power */
+#define OTG_HPRT_PTCTL_SHIFT          (13)      /* Bits 13-16: Port test control */
+#define OTG_HPRT_PTCTL_MASK           (15 << OTG_HPRT_PTCTL_SHIFT)
+#  define OTG_HPRT_PTCTL_DISABLED     (0 << OTG_HPRT_PTCTL_SHIFT) /* Test mode disabled */
+#  define OTG_HPRT_PTCTL_J            (1 << OTG_HPRT_PTCTL_SHIFT) /* Test_J mode */
+#  define OTG_HPRT_PTCTL_L            (2 << OTG_HPRT_PTCTL_SHIFT) /* Test_K mode */
+#  define OTG_HPRT_PTCTL_SE0_NAK      (3 << OTG_HPRT_PTCTL_SHIFT) /* Test_SE0_NAK mode */
+#  define OTG_HPRT_PTCTL_PACKET       (4 << OTG_HPRT_PTCTL_SHIFT) /* Test_Packet mode */
+#  define OTG_HPRT_PTCTL_FORCE        (5 << OTG_HPRT_PTCTL_SHIFT) /* Test_Force_Enable */
+#define OTG_HPRT_PSPD_SHIFT           (17)      /* Bits 17-18: Port speed */
+#define OTG_HPRT_PSPD_MASK            (3 << OTG_HPRT_PSPD_SHIFT)
+#  define OTG_HPRT_PSPD_FS            (1 << OTG_HPRT_PSPD_SHIFT) /* Full speed */
+#  define OTG_HPRT_PSPD_LS            (2 << OTG_HPRT_PSPD_SHIFT) /* Low speed */
+                                                  /* Bits 19-31: Reserved, must be kept at reset value */
+
+/* Host channel-n characteristics register */
+
+#define OTG_HCCHAR_MPSIZ_SHIFT        (0)       /* Bits 0-10: Maximum packet size */
+#define OTG_HCCHAR_MPSIZ_MASK         (0x7ff << OTG_HCCHAR_MPSIZ_SHIFT)
+#define OTG_HCCHAR_EPNUM_SHIFT        (11)      /* Bits 11-14: Endpoint number */
+#define OTG_HCCHAR_EPNUM_MASK         (15 << OTG_HCCHAR_EPNUM_SHIFT)
+#define OTG_HCCHAR_EPDIR              (1 << 15) /* Bit 15: Endpoint direction */
+#  define OTG_HCCHAR_EPDIR_OUT        (0)
+#  define OTG_HCCHAR_EPDIR_IN         OTG_HCCHAR_EPDIR
+                                                  /* Bit 16 Reserved, must be kept at reset value */
+#define OTG_HCCHAR_LSDEV              (1 << 17) /* Bit 17: Low-speed device */
+#define OTG_HCCHAR_EPTYP_SHIFT        (18)      /* Bits 18-19: Endpoint type */
+#define OTG_HCCHAR_EPTYP_MASK         (3 << OTG_HCCHAR_EPTYP_SHIFT)
+#  define OTG_HCCHAR_EPTYP_CTRL       (0 << OTG_HCCHAR_EPTYP_SHIFT) /* Control */
+#  define OTG_HCCHAR_EPTYP_ISOC       (1 << OTG_HCCHAR_EPTYP_SHIFT) /* Isochronous */
+#  define OTG_HCCHAR_EPTYP_BULK       (2 << OTG_HCCHAR_EPTYP_SHIFT) /* Bulk */
+#  define OTG_HCCHAR_EPTYP_INTR       (3 << OTG_HCCHAR_EPTYP_SHIFT) /* Interrupt */
+#define OTG_HCCHAR_MCNT_SHIFT         (20)      /* Bits 20-21: Multicount */
+#define OTG_HCCHAR_MCNT_MASK          (3 << OTG_HCCHAR_MCNT_SHIFT)
+#define OTG_HCCHAR_DAD_SHIFT          (22)      /* Bits 22-28: Device address */
+#define OTG_HCCHAR_DAD_MASK           (0x7f << OTG_HCCHAR_DAD_SHIFT)
+#define OTG_HCCHAR_ODDFRM             (1 << 29) /* Bit 29: Odd frame */
+#define OTG_HCCHAR_CHDIS              (1 << 30) /* Bit 30: Channel disable */
+#define OTG_HCCHAR_CHENA              (1 << 31) /* Bit 31: Channel enable */
+
+/* Host channel-n interrupt and Host channel-0 interrupt mask registers */
+
+#define OTG_HCINT_XFRC                (1 << 0)  /* Bit 0:  Transfer completed */
+#define OTG_HCINT_CHH                 (1 << 1)  /* Bit 1:  Channel halted */
+                                                  /* Bit 2:  Reserved, must be kept at reset value */
+#define OTG_HCINT_STALL               (1 << 3)  /* Bit 3:  STALL response received interrupt */
+#define OTG_HCINT_NAK                 (1 << 4)  /* Bit 4:  NAK response received interrupt */
+#define OTG_HCINT_ACK                 (1 << 5)  /* Bit 5:  ACK response received/transmitted interrupt */
+#define OTG_HCINT_NYET                (1 << 6)  /* Bit 6:  Response received interrupt */
+#define OTG_HCINT_TXERR               (1 << 7)  /* Bit 7:  Transaction error */
+#define OTG_HCINT_BBERR               (1 << 8)  /* Bit 8:  Babble error */
+#define OTG_HCINT_FRMOR               (1 << 9)  /* Bit 9:  Frame overrun */
+#define OTG_HCINT_DTERR               (1 << 10) /* Bit 10: Data toggle error */
+                                                  /* Bits 11-31 Reserved, must be kept at reset value */
+/* Host channel-n interrupt register */
+
+#define OTG_HCTSIZ_XFRSIZ_SHIFT       (0)       /* Bits 0-18: Transfer size */
+#define OTG_HCTSIZ_XFRSIZ_MASK        (0x7ffff << OTG_HCTSIZ_XFRSIZ_SHIFT)
+#define OTG_HCTSIZ_PKTCNT_SHIFT       (19)      /* Bits 19-28: Packet count */
+#define OTG_HCTSIZ_PKTCNT_MASK        (0x3ff << OTG_HCTSIZ_PKTCNT_SHIFT)
+#define OTG_HCTSIZ_DPID_SHIFT         (29)      /* Bits 29-30: Data PID */
+#define OTG_HCTSIZ_DPID_MASK          (3 << OTG_HCTSIZ_DPID_SHIFT)
+#  define OTG_HCTSIZ_DPID_DATA0       (0 << OTG_HCTSIZ_DPID_SHIFT)
+#  define OTG_HCTSIZ_DPID_DATA2       (1 << OTG_HCTSIZ_DPID_SHIFT)
+#  define OTG_HCTSIZ_DPID_DATA1       (2 << OTG_HCTSIZ_DPID_SHIFT)
+#  define OTG_HCTSIZ_DPID_MDATA       (3 << OTG_HCTSIZ_DPID_SHIFT) /* Non-control */
+#  define OTG_HCTSIZ_PID_SETUP        (3 << OTG_HCTSIZ_DPID_SHIFT) /* Control */
+                                                  /* Bit 31 Reserved, must be kept at reset value */
+/* Device-mode control and status registers */
+
+/* Device configuration register */
+
+#define OTG_DCFG_DSPD_SHIFT           (0)       /* Bits 0-1: Device speed */
+#define OTG_DCFG_DSPD_MASK            (3 << OTG_DCFG_DSPD_SHIFT)
+#  define OTG_DCFG_DSPD_FS            (3 << OTG_DCFG_DSPD_SHIFT) /* Full speed */
+#define OTG_DCFG_NZLSOHSK             (1 << 2)  /* Bit 2:  Non-zero-length status OUT handshake */
+                                                  /* Bit 3:  Reserved, must be kept at reset value */
+#define OTG_DCFG_DAD_SHIFT            (4)       /* Bits 4-10: Device address */
+#define OTG_DCFG_DAD_MASK             (0x7f << OTG_DCFG_DAD_SHIFT)
+#define OTG_DCFG_PFIVL_SHIFT          (11)      /* Bits 11-12: Periodic frame interval */
+#define OTG_DCFG_PFIVL_MASK           (3 << OTG_DCFG_PFIVL_SHIFT)
+#  define OTG_DCFG_PFIVL_80PCT        (0 << OTG_DCFG_PFIVL_SHIFT) /* 80% of the frame interval */
+#  define OTG_DCFG_PFIVL_85PCT        (1 << OTG_DCFG_PFIVL_SHIFT) /* 85% of the frame interval */
+#  define OTG_DCFG_PFIVL_90PCT        (2 << OTG_DCFG_PFIVL_SHIFT) /* 90% of the frame interval */
+#  define OTG_DCFG_PFIVL_95PCT        (3 << OTG_DCFG_PFIVL_SHIFT) /* 95% of the frame interval */
+                                                  /* Bits 13-31 Reserved, must be kept at reset value */
+/* Device control register */
+
+#define OTG_TESTMODE_DISABLED         (0) /* Test mode disabled */
+#define OTG_TESTMODE_J                (1) /* Test_J mode */
+#define OTG_TESTMODE_K                (2) /* Test_K mode */
+#define OTG_TESTMODE_SE0_NAK          (3) /* Test_SE0_NAK mode */
+#define OTG_TESTMODE_PACKET           (4) /* Test_Packet mode */
+#define OTG_TESTMODE_FORCE            (5) /* Test_Force_Enable */
+
+#define OTG_DCTL_RWUSIG               (1 << 0)  /* Bit 0:  Remote wakeup signaling */
+#define OTG_DCTL_SDIS                 (1 << 1)  /* Bit 1:  Soft disconnect */
+#define OTG_DCTL_GINSTS               (1 << 2)  /* Bit 2:  Global IN NAK status */
+#define OTG_DCTL_GONSTS               (1 << 3)  /* Bit 3:  Global OUT NAK status */
+#define OTG_DCTL_TCTL_SHIFT           (4)       /* Bits 4-6: Test control */
+#define OTG_DCTL_TCTL_MASK            (7 << OTG_DCTL_TCTL_SHIFT)
+#  define OTG_DCTL_TCTL_DISABLED      (0 << OTG_DCTL_TCTL_SHIFT) /* Test mode disabled */
+#  define OTG_DCTL_TCTL_J             (1 << OTG_DCTL_TCTL_SHIFT) /* Test_J mode */
+#  define OTG_DCTL_TCTL_K             (2 << OTG_DCTL_TCTL_SHIFT) /* Test_K mode */
+#  define OTG_DCTL_TCTL_SE0_NAK       (3 << OTG_DCTL_TCTL_SHIFT) /* Test_SE0_NAK mode */
+#  define OTG_DCTL_TCTL_PACKET        (4 << OTG_DCTL_TCTL_SHIFT) /* Test_Packet mode */
+#  define OTG_DCTL_TCTL_FORCE         (5 << OTG_DCTL_TCTL_SHIFT) /* Test_Force_Enable */
+#define OTG_DCTL_SGINAK               (1 << 7)  /* Bit 7:  Set global IN NAK */
+#define OTG_DCTL_CGINAK               (1 << 8)  /* Bit 8:  Clear global IN NAK */
+#define OTG_DCTL_SGONAK               (1 << 9)  /* Bit 9:  Set global OUT NAK */
+#define OTG_DCTL_CGONAK               (1 << 10) /* Bit 10: Clear global OUT NAK */
+#define OTG_DCTL_POPRGDNE             (1 << 11) /* Bit 11: Power-on programming done */
+                                                  /* Bits 12-31: Reserved, must be kept at reset value */
+/* Device status register */
+
+#define OTG_DSTS_SUSPSTS              (1 << 0)  /* Bit 0: Suspend status */
+#define OTG_DSTS_ENUMSPD_SHIFT        (1)       /* Bits 1-2: Enumerated speed */
+#define OTG_DSTS_ENUMSPD_MASK         (3 << OTG_DSTS_ENUMSPD_SHIFT)
+#  define OTG_DSTS_ENUMSPD_FS         (3 << OTG_DSTS_ENUMSPD_MASK) /* Full speed */
+                                                  /* Bits 4-7: Reserved, must be kept at reset value */
+#define OTG_DSTS_EERR                 (1 << 3)  /* Bit 3: Erratic error */
+#define OTG_DSTS_SOFFN_SHIFT          (8)       /* Bits 8-21: Frame number of the received SOF */
+#define OTG_DSTS_SOFFN_MASK           (0x3fff << OTG_DSTS_SOFFN_SHIFT)
+#define OTG_DSTS_SOFFN0               (1 << 8)  /* Bits 8: Frame number even/odd bit */
+#define OTG_DSTS_SOFFN_EVEN           0
+#define OTG_DSTS_SOFFN_ODD            OTG_DSTS_SOFFN0
+                                                  /* Bits 22-31: Reserved, must be kept at reset value */
+/* Device IN endpoint common interrupt mask register */
+
+#define OTG_DIEPMSK_XFRCM             (1 << 0)  /* Bit 0: Transfer completed interrupt mask */
+#define OTG_DIEPMSK_EPDM              (1 << 1)  /* Bit 1: Endpoint disabled interrupt mask */
+                                                  /* Bit 2:  Reserved, must be kept at reset value */
+#define OTG_DIEPMSK_TOM               (1 << 3)  /* Bit 3: Timeout condition mask (Non-isochronous endpoints) */
+#define OTG_DIEPMSK_ITTXFEMSK         (1 << 4)  /* Bit 4: IN token received when TxFIFO empty mask */
+#define OTG_DIEPMSK_INEPNMM           (1 << 5)  /* Bit 5: IN token received with EP mismatch mask */
+#define OTG_DIEPMSK_INEPNEM           (1 << 6)  /* Bit 6: IN endpoint NAK effective mask */
+                                                  /* Bits 7-31: Reserved, must be kept at reset value */
+/* Device OUT endpoint common interrupt mask register */
+
+#define OTG_DOEPMSK_XFRCM             (1 << 0)  /* Bit 0: Transfer completed interrupt mask */
+#define OTG_DOEPMSK_EPDM              (1 << 1)  /* Bit 1: Endpoint disabled interrupt mask */
+                                                  /* Bit 2:  Reserved, must be kept at reset value */
+#define OTG_DOEPMSK_STUPM             (1 << 3)  /* Bit 3: SETUP phase done mask */
+#define OTG_DOEPMSK_OTEPDM            (1 << 4)  /* Bit 4: OUT token received when endpoint disabled mask */
+                                                  /* Bits 5-31: Reserved, must be kept at reset value */
+/* Device all endpoints interrupt and All endpoints interrupt mask registers */
+
+#define OTG_DAINT_IEP_SHIFT           (0)      /* Bits 0-15: IN endpoint interrupt bits */
+#define OTG_DAINT_IEP_MASK            (0xffff << OTG_DAINT_IEP_SHIFT)
+#  define OTG_DAINT_IEP(n)            (1 << (n))
+#define OTG_DAINT_OEP_SHIFT           (16)      /* Bits 16-31: OUT endpoint interrupt bits */
+#define OTG_DAINT_OEP_MASK            (0xffff << OTG_DAINT_OEP_SHIFT)
+#  define OTG_DAINT_OEP(n)            (1 << ((n)+16))
+
+/* Device VBUS discharge time register */
+
+#define OTG_DVBUSDIS_MASK             (0xffff)
+
+/* Device VBUS pulsing time register */
+
+#define OTG_DVBUSPULSE_MASK           (0xfff)
+
+/* Device IN endpoint FIFO empty interrupt mask register */
+
+#define OTG_DIEPEMPMSK(n)             (1 << (n))
+
+/* Device control IN endpoint 0 control register */
+
+#define OTG_DIEPCTL0_MPSIZ_SHIFT      (0)       /* Bits 0-1: Maximum packet size */
+#define OTG_DIEPCTL0_MPSIZ_MASK       (3 << OTG_DIEPCTL0_MPSIZ_SHIFT)
+#  define OTG_DIEPCTL0_MPSIZ_64       (0 << OTG_DIEPCTL0_MPSIZ_SHIFT) /* 64 bytes */
+#  define OTG_DIEPCTL0_MPSIZ_32       (1 << OTG_DIEPCTL0_MPSIZ_SHIFT) /* 32 bytes */
+#  define OTG_DIEPCTL0_MPSIZ_16       (2 << OTG_DIEPCTL0_MPSIZ_SHIFT) /* 16 bytes */
+#  define OTG_DIEPCTL0_MPSIZ_8        (3 << OTG_DIEPCTL0_MPSIZ_SHIFT) /* 8 bytes */
+                                                  /* Bits 2-14: Reserved, must be kept at reset value */
+#define OTG_DIEPCTL0_USBAEP           (1 << 15) /* Bit 15: USB active endpoint */
+                                                  /* Bit 16: Reserved, must be kept at reset value */
+#define OTG_DIEPCTL0_NAKSTS           (1 << 17) /* Bit 17: NAK status */
+#define OTG_DIEPCTL0_EPTYP_SHIFT      (18)      /* Bits 18-19: Endpoint type */
+#define OTG_DIEPCTL0_EPTYP_MASK       (3 << OTG_DIEPCTL0_EPTYP_SHIFT)
+#  define OTG_DIEPCTL0_EPTYP_CTRL     (0 << OTG_DIEPCTL0_EPTYP_SHIFT) /* Control (hard-coded) */
+                                                  /* Bit 20: Reserved, must be kept at reset value */
+#define OTG_DIEPCTL0_STALL            (1 << 21) /* Bit 21: STALL handshake */
+#define OTG_DIEPCTL0_TXFNUM_SHIFT     (22)      /* Bits 22-25: TxFIFO number */
+#define OTG_DIEPCTL0_TXFNUM_MASK      (15 << OTG_DIEPCTL0_TXFNUM_SHIFT)
+#define OTG_DIEPCTL0_CNAK             (1 << 26) /* Bit 26: Clear NAK */
+#define OTG_DIEPCTL0_SNAK             (1 << 27) /* Bit 27: Set NAK */
+                                                  /* Bits 28-29: Reserved, must be kept at reset value */
+#define OTG_DIEPCTL0_EPDIS            (1 << 30) /* Bit 30: Endpoint disable */
+#define OTG_DIEPCTL0_EPENA            (1 << 31) /* Bit 31: Endpoint enable */
+
+/* Device control IN endpoint n control register */
+
+#define OTG_DIEPCTL_MPSIZ_SHIFT       (0)       /* Bits 0-10: Maximum packet size */
+#define OTG_DIEPCTL_MPSIZ_MASK        (0x7ff << OTG_DIEPCTL_MPSIZ_SHIFT)
+                                                  /* Bits 11-14: Reserved, must be kept at reset value */
+#define OTG_DIEPCTL_USBAEP            (1 << 15) /* Bit 15: USB active endpoint */
+#define OTG_DIEPCTL_EONUM             (1 << 16) /* Bit 16: Even/odd frame */
+#  define OTG_DIEPCTL_EVEN            (0)
+#  define OTG_DIEPCTL_ODD             OTG_DIEPCTL_EONUM
+#  define OTG_DIEPCTL_DATA0           (0)
+#  define OTG_DIEPCTL_DATA1           OTG_DIEPCTL_EONUM
+#define OTG_DIEPCTL_NAKSTS            (1 << 17) /* Bit 17: NAK status */
+#define OTG_DIEPCTL_EPTYP_SHIFT       (18)      /* Bits 18-19: Endpoint type */
+#define OTG_DIEPCTL_EPTYP_MASK        (3 << OTG_DIEPCTL_EPTYP_SHIFT)
+#  define OTG_DIEPCTL_EPTYP_CTRL      (0 << OTG_DIEPCTL_EPTYP_SHIFT) /* Control */
+#  define OTG_DIEPCTL_EPTYP_ISOC      (1 << OTG_DIEPCTL_EPTYP_SHIFT) /* Isochronous */
+#  define OTG_DIEPCTL_EPTYP_BULK      (2 << OTG_DIEPCTL_EPTYP_SHIFT) /* Bulk */
+#  define OTG_DIEPCTL_EPTYP_INTR      (3 << OTG_DIEPCTL_EPTYP_SHIFT) /* Interrupt */
+                                                  /* Bit 20: Reserved, must be kept at reset value */
+#define OTG_DIEPCTL_STALL             (1 << 21) /* Bit 21: STALL handshake */
+#define OTG_DIEPCTL_TXFNUM_SHIFT      (22)      /* Bits 22-25: TxFIFO number */
+#define OTG_DIEPCTL_TXFNUM_MASK       (15 << OTG_DIEPCTL_TXFNUM_SHIFT)
+#define OTG_DIEPCTL_CNAK              (1 << 26) /* Bit 26: Clear NAK */
+#define OTG_DIEPCTL_SNAK              (1 << 27) /* Bit 27: Set NAK */
+#define OTG_DIEPCTL_SD0PID            (1 << 28) /* Bit 28: Set DATA0 PID (interrupt/bulk) */
+#define OTG_DIEPCTL_SEVNFRM           (1 << 28) /* Bit 28: Set even frame (isochronous)) */
+#define OTG_DIEPCTL_SODDFRM           (1 << 29) /* Bit 29: Set odd frame (isochronous) */
+#define OTG_DIEPCTL_EPDIS             (1 << 30) /* Bit 30: Endpoint disable */
+#define OTG_DIEPCTL_EPENA             (1 << 31) /* Bit 31: Endpoint enable */
+
+/* Device endpoint-n interrupt register */
+
+#define OTG_DIEPINT_XFRC              (1 << 0)  /* Bit 0:  Transfer completed interrupt */
+#define OTG_DIEPINT_EPDISD            (1 << 1)  /* Bit 1:  Endpoint disabled interrupt */
+                                                  /* Bit 2:  Reserved, must be kept at reset value */
+#define OTG_DIEPINT_TOC               (1 << 3)  /* Bit 3:  Timeout condition */
+#define OTG_DIEPINT_ITTXFE            (1 << 4)  /* Bit 4:  IN token received when TxFIFO is empty */
+                                                  /* Bit 5:  Reserved, must be kept at reset value */
+#define OTG_DIEPINT_INEPNE            (1 << 6)  /* Bit 6:  IN endpoint NAK effective */
+#define OTG_DIEPINT_TXFE              (1 << 7)  /* Bit 7:  Transmit FIFO empty */
+                                                  /* Bits 8-31: Reserved, must be kept at reset value */
+/* Device IN endpoint 0 transfer size register */
+
+#define OTG_DIEPTSIZ0_XFRSIZ_SHIFT    (0)       /* Bits 0-6: Transfer size */
+#define OTG_DIEPTSIZ0_XFRSIZ_MASK     (0x7f << OTG_DIEPTSIZ0_XFRSIZ_SHIFT)
+                                                  /* Bits 7-18: Reserved, must be kept at reset value */
+#define OTG_DIEPTSIZ0_PKTCNT_SHIFT    (19)      /* Bits 19-20: Packet count */
+#define OTG_DIEPTSIZ0_PKTCNT_MASK     (3 << OTG_DIEPTSIZ0_PKTCNT_SHIFT)
+                                                  /* Bits 21-31: Reserved, must be kept at reset value */
+/* Device IN endpoint n transfer size register */
+
+#define OTG_DIEPTSIZ_XFRSIZ_SHIFT     (0)       /* Bits 0-18: Transfer size */
+#define OTG_DIEPTSIZ_XFRSIZ_MASK      (0x7ffff << OTG_DIEPTSIZ_XFRSIZ_SHIFT)
+#define OTG_DIEPTSIZ_PKTCNT_SHIFT     (19)      /* Bit 19-28: Packet count */
+#define OTG_DIEPTSIZ_PKTCNT_MASK      (0x3ff << OTG_DIEPTSIZ_PKTCNT_SHIFT)
+#define OTG_DIEPTSIZ_MCNT_SHIFT       (29)      /* Bits 29-30: Multi count */
+#define OTG_DIEPTSIZ_MCNT_MASK        (3 << OTG_DIEPTSIZ_MCNT_SHIFT)
+                                                  /* Bit 31: Reserved, must be kept at reset value */
+/* Device OUT endpoint TxFIFO status register */
+
+#define OTG_DTXFSTS_MASK              (0xffff)
+
+/* Device OUT endpoint 0 control register */
+
+#define OTG_DOEPCTL0_MPSIZ_SHIFT      (0)       /* Bits 0-1: Maximum packet size */
+#define OTG_DOEPCTL0_MPSIZ_MASK       (3 << OTG_DOEPCTL0_MPSIZ_SHIFT)
+#  define OTG_DOEPCTL0_MPSIZ_64       (0 << OTG_DOEPCTL0_MPSIZ_SHIFT) /* 64 bytes */
+#  define OTG_DOEPCTL0_MPSIZ_32       (1 << OTG_DOEPCTL0_MPSIZ_SHIFT) /* 32 bytes */
+#  define OTG_DOEPCTL0_MPSIZ_16       (2 << OTG_DOEPCTL0_MPSIZ_SHIFT) /* 16 bytes */
+#  define OTG_DOEPCTL0_MPSIZ_8        (3 << OTG_DOEPCTL0_MPSIZ_SHIFT) /* 8 bytes */
+                                                  /* Bits 2-14: Reserved, must be kept at reset value */
+#define OTG_DOEPCTL0_USBAEP           (1 << 15) /* Bit 15: USB active endpoint */
+                                                  /* Bit 16: Reserved, must be kept at reset value */
+#define OTG_DOEPCTL0_NAKSTS           (1 << 17) /* Bit 17: NAK status */
+#define OTG_DOEPCTL0_EPTYP_SHIFT      (18)      /* Bits 18-19: Endpoint type */
+#define OTG_DOEPCTL0_EPTYP_MASK       (3 << OTG_DOEPCTL0_EPTYP_SHIFT)
+#  define OTG_DOEPCTL0_EPTYP_CTRL     (0 << OTG_DOEPCTL0_EPTYP_SHIFT) /* Control (hard-coded) */
+#define OTG_DOEPCTL0_SNPM             (1 << 20) /* Bit 20: Snoop mode */
+#define OTG_DOEPCTL0_STALL            (1 << 21) /* Bit 21: STALL handshake */
+                                                  /* Bits 22-25: Reserved, must be kept at reset value */
+#define OTG_DOEPCTL0_CNAK             (1 << 26) /* Bit 26: Clear NAK */
+#define OTG_DOEPCTL0_SNAK             (1 << 27) /* Bit 27: Set NAK */
+                                                  /* Bits 28-29: Reserved, must be kept at reset value */
+#define OTG_DOEPCTL0_EPDIS            (1 << 30) /* Bit 30: Endpoint disable */
+#define OTG_DOEPCTL0_EPENA            (1 << 31) /* Bit 31: Endpoint enable */
+
+/* Device OUT endpoint n control register */
+
+#define OTG_DOEPCTL_MPSIZ_SHIFT       (0)       /* Bits 0-10: Maximum packet size */
+#define OTG_DOEPCTL_MPSIZ_MASK        (0x7ff << OTG_DOEPCTL_MPSIZ_SHIFT)
+                                                  /* Bits 11-14: Reserved, must be kept at reset value */
+#define OTG_DOEPCTL_USBAEP            (1 << 15) /* Bit 15: USB active endpoint */
+#define OTG_DOEPCTL_DPID              (1 << 16) /* Bit 16: Endpoint data PID (interrupt/buld) */
+#  define OTG_DOEPCTL_DATA0           (0)
+#  define OTG_DOEPCTL_DATA1           OTG_DOEPCTL_DPID
+#define OTG_DOEPCTL_EONUM             (1 << 16) /* Bit 16: Even/odd frame (isochronous) */
+#  define OTG_DOEPCTL_EVEN            (0)
+#  define OTG_DOEPCTL_ODD             OTG_DOEPCTL_EONUM
+#define OTG_DOEPCTL_NAKSTS            (1 << 17) /* Bit 17: NAK status */
+#define OTG_DOEPCTL_EPTYP_SHIFT       (18)      /* Bits 18-19: Endpoint type */
+#define OTG_DOEPCTL_EPTYP_MASK        (3 << OTG_DOEPCTL_EPTYP_SHIFT)
+#  define OTG_DOEPCTL_EPTYP_CTRL      (0 << OTG_DOEPCTL_EPTYP_SHIFT) /* Control */
+#  define OTG_DOEPCTL_EPTYP_ISOC      (1 << OTG_DOEPCTL_EPTYP_SHIFT) /* Isochronous */
+#  define OTG_DOEPCTL_EPTYP_BULK      (2 << OTG_DOEPCTL_EPTYP_SHIFT) /* Bulk */
+#  define OTG_DOEPCTL_EPTYP_INTR      (3 << OTG_DOEPCTL_EPTYP_SHIFT) /* Interrupt */
+#define OTG_DOEPCTL_SNPM              (1 << 20) /* Bit 20: Snoop mode */
+#define OTG_DOEPCTL_STALL             (1 << 21) /* Bit 21: STALL handshake */
+                                                  /* Bits 22-25: Reserved, must be kept at reset value */
+#define OTG_DOEPCTL_CNAK              (1 << 26) /* Bit 26: Clear NAK */
+#define OTG_DOEPCTL_SNAK              (1 << 27) /* Bit 27: Set NAK */
+#define OTG_DOEPCTL_SD0PID            (1 << 28) /* Bit 28: Set DATA0 PID (interrupt/bulk) */
+#define OTG_DOEPCTL_SEVNFRM           (1 << 28) /* Bit 28: Set even frame (isochronous) */
+#define OTG_DOEPCTL_SD1PID            (1 << 29) /* Bit 29: Set DATA1 PID (interrupt/bulk) */
+#define OTG_DOEPCTL_SODDFRM           (1 << 29) /* Bit 29: Set odd frame (isochronous */
+#define OTG_DOEPCTL_EPDIS             (1 << 30) /* Bit 30: Endpoint disable */
+#define OTG_DOEPCTL_EPENA             (1 << 31) /* Bit 31: Endpoint enable */
+
+/* Device endpoint-n interrupt register */
+
+#define OTG_DOEPINT_XFRC              (1 << 0)  /* Bit 0: Transfer completed interrupt */
+#define OTG_DOEPINT_EPDISD            (1 << 1)  /* Bit 1: Endpoint disabled interrupt */
+                                                  /* Bit 2: Reserved, must be kept at reset value */
+#define OTG_DOEPINT_SETUP             (1 << 3)  /* Bit 3: SETUP phase done */
+#define OTG_DOEPINT_OTEPDIS           (1 << 4)  /* Bit 4: OUT token received when endpoint disabled */
+                                                  /* Bit 5: Reserved, must be kept at reset value */
+#define OTG_DOEPINT_B2BSTUP           (1 << 6)  /* Bit 6: Back-to-back SETUP packets received */
+                                                  /* Bits 7-31: Reserved, must be kept at reset value */
+/* Device OUT endpoint-0 transfer size register */
+
+#define OTG_DOEPTSIZ0_XFRSIZ_SHIFT    (0)       /* Bits 0-6: Transfer size */
+#define OTG_DOEPTSIZ0_XFRSIZ_MASK     (0x7f << OTG_DOEPTSIZ0_XFRSIZ_SHIFT)
+                                                  /* Bits 7-18: Reserved, must be kept at reset value */
+#define OTG_DOEPTSIZ0_PKTCNT          (1 << 19) /* Bit 19 PKTCNT: Packet count */
+                                                  /* Bits 20-28: Reserved, must be kept at reset value */
+#define OTG_DOEPTSIZ0_STUPCNT_SHIFT   (29)      /* Bits 29-30: SETUP packet count */
+#define OTG_DOEPTSIZ0_STUPCNT_MASK    (3 << OTG_DOEPTSIZ0_STUPCNT_SHIFT)
+                                                  /* Bit 31: Reserved, must be kept at reset value */
+/* Device OUT endpoint-n transfer size register */
+
+#define OTG_DOEPTSIZ_XFRSIZ_SHIFT     (0)       /* Bits 0-18: Transfer size */
+#define OTG_DOEPTSIZ_XFRSIZ_MASK      (0x7ffff << OTG_DOEPTSIZ_XFRSIZ_SHIFT)
+#define OTG_DOEPTSIZ_PKTCNT_SHIFT     (19)      /* Bit 19-28: Packet count */
+#define OTG_DOEPTSIZ_PKTCNT_MASK      (0x3ff << OTG_DOEPTSIZ_PKTCNT_SHIFT)
+#define OTG_DOEPTSIZ_STUPCNT_SHIFT    (29)      /* Bits 29-30: SETUP packet count */
+#define OTG_DOEPTSIZ_STUPCNT_MASK     (3 << OTG_DOEPTSIZ_STUPCNT_SHIFT)
+#define OTG_DOEPTSIZ_RXDPID_SHIFT     (29)      /* Bits 29-30: Received data PID */
+#define OTG_DOEPTSIZ_RXDPID_MASK      (3 << OTG_DOEPTSIZ_RXDPID_SHIFT)
+#  define OTG_DOEPTSIZ_RXDPID_DATA0   (0 << OTG_DOEPTSIZ_RXDPID_SHIFT)
+#  define OTG_DOEPTSIZ_RXDPID_DATA2   (1 << OTG_DOEPTSIZ_RXDPID_SHIFT)
+#  define OTG_DOEPTSIZ_RXDPID_DATA1   (2 << OTG_DOEPTSIZ_RXDPID_SHIFT)
+#  define OTG_DOEPTSIZ_RXDPID_MDATA   (3 << OTG_DOEPTSIZ_RXDPID_SHIFT)
+                                                  /* Bit 31: Reserved, must be kept at reset value */
+/* Power and clock gating control register */
+
+#define OTG_PCGCCTL_STPPCLK           (1 << 0)  /* Bit 0: Stop PHY clock */
+#define OTG_PCGCCTL_GATEHCLK          (1 << 1)  /* Bit 1: Gate HCLK */
+                                                  /* Bits 2-3: Reserved, must be kept at reset value */
+#define OTG_PCGCCTL_PHYSUSP           (1 << 4)  /* Bit 4: PHY Suspended */
+                                                  /* Bits 5-31: Reserved, must be kept at reset value */
+
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32_OTG_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32_pinmap.h b/arch/arm/src/stm32f7/chip/stm32_pinmap.h
index 59903d8d03e21ebf156de17b75476bc3dad7b5e2..034e32166eb229ed25ca0467f989ac741aa4778d 100644
--- a/arch/arm/src/stm32f7/chip/stm32_pinmap.h
+++ b/arch/arm/src/stm32f7/chip/stm32_pinmap.h
@@ -2,7 +2,8 @@
  * arch/arm/src/stm32f7/chip/stm32_pinmap.h
  *
  *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -45,8 +46,10 @@
 
 #if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
 #  include "chip/stm32f74xx75xx_pinmap.h"
+#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+#  include "chip/stm32f76xx77xx_pinmap.h"
 #else
-#  error "Unsupported STM32 F7 memory map"
+#  error "Unsupported STM32 F7 Pin map"
 #endif
 
 #endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32_PINMAP_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32_pwr.h b/arch/arm/src/stm32f7/chip/stm32_pwr.h
index 427fab1f3fcfdfcd3364469c3c92a3180033773e..e9415d800a7c78766d29ade47bf8865b598f9dae 100644
--- a/arch/arm/src/stm32f7/chip/stm32_pwr.h
+++ b/arch/arm/src/stm32f7/chip/stm32_pwr.h
@@ -2,7 +2,8 @@
  * arch/arm/src/stm32f7/chip/stm32_pwr.h
  *
  *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -45,6 +46,8 @@
 
 #if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
 #  include "chip/stm32f74xx75xx_pwr.h"
+#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+#  include "chip/stm32f76xx77xx_pwr.h"
 #else
 #  error "Unsupported STM32 F7 part"
 #endif
diff --git a/arch/arm/src/stm32f7/chip/stm32_rcc.h b/arch/arm/src/stm32f7/chip/stm32_rcc.h
index 13468a55601d8427c96c4a5f020c417b3eb35923..e2dfc8380f987400cf5130ff1cf5a0a1472a0fae 100644
--- a/arch/arm/src/stm32f7/chip/stm32_rcc.h
+++ b/arch/arm/src/stm32f7/chip/stm32_rcc.h
@@ -1,8 +1,8 @@
 /************************************************************************************
  * arch/arm/src/stm32f7/chip/stm32_rcc.h
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -45,6 +45,8 @@
 
 #if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
 #  include "chip/stm32f74xx75xx_rcc.h"
+#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+#  include "chip/stm32f76xx77xx_rcc.h"
 #else
 #  error "Unsupported STM32 F7 part"
 #endif
diff --git a/arch/arm/src/stm32f7/chip/stm32_rtcc.h b/arch/arm/src/stm32f7/chip/stm32_rtcc.h
new file mode 100644
index 0000000000000000000000000000000000000000..262a48633cbbafd8b4502f9490030ca6d560876b
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32_rtcc.h
@@ -0,0 +1,405 @@
+/************************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32_rtcc.h
+ *
+ *   Copyright (C) 2011-2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32_RTCC_H
+#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32_RTCC_H
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Register Offsets *****************************************************************/
+
+#define STM32_RTC_TR_OFFSET       0x0000 /* RTC time register */
+#define STM32_RTC_DR_OFFSET       0x0004 /* RTC date register */
+#define STM32_RTC_CR_OFFSET       0x0008 /* RTC control register */
+#define STM32_RTC_ISR_OFFSET      0x000c /* RTC initialization and status register */
+#define STM32_RTC_PRER_OFFSET     0x0010 /* RTC prescaler register */
+#define STM32_RTC_WUTR_OFFSET     0x0014 /* RTC wakeup timer register */
+#define STM32_RTC_ALRMAR_OFFSET   0x001c /* RTC alarm A register */
+#define STM32_RTC_ALRMBR_OFFSET   0x0020 /* RTC alarm B register */
+#define STM32_RTC_WPR_OFFSET      0x0024 /* RTC write protection register */
+#define STM32_RTC_SSR_OFFSET      0x0028 /* RTC sub second register */
+#define STM32_RTC_SHIFTR_OFFSET   0x002c /* RTC shift control register */
+#define STM32_RTC_TSTR_OFFSET     0x0030 /* RTC time stamp time register */
+#define STM32_RTC_TSDR_OFFSET     0x0034 /* RTC time stamp date register */
+#define STM32_RTC_TSSSR_OFFSET    0x0038 /* RTC timestamp sub second register */
+#define STM32_RTC_CALR_OFFSET     0x003c /* RTC calibration register */
+#define STM32_RTC_TAMPCR_OFFSET   0x0040 /* RTC tamper configuration register */
+#define STM32_RTC_ALRMASSR_OFFSET 0x0044 /* RTC alarm A sub second register */
+#define STM32_RTC_ALRMBSSR_OFFSET 0x0048 /* RTC alarm B sub second register */
+#define STM32_RTC_OR_OFFSET       0x004c /* RTC option register */
+
+#define STM32_RTC_BKR_OFFSET(n)   (0x0050+((n)<<2))
+#define STM32_RTC_BK0R_OFFSET     0x0050 /* RTC backup register 0 */
+#define STM32_RTC_BK1R_OFFSET     0x0054 /* RTC backup register 1 */
+#define STM32_RTC_BK2R_OFFSET     0x0058 /* RTC backup register 2 */
+#define STM32_RTC_BK3R_OFFSET     0x005c /* RTC backup register 3 */
+#define STM32_RTC_BK4R_OFFSET     0x0060 /* RTC backup register 4 */
+#define STM32_RTC_BK5R_OFFSET     0x0064 /* RTC backup register 5 */
+#define STM32_RTC_BK6R_OFFSET     0x0068 /* RTC backup register 6 */
+#define STM32_RTC_BK7R_OFFSET     0x006c /* RTC backup register 7 */
+#define STM32_RTC_BK8R_OFFSET     0x0070 /* RTC backup register 8 */
+#define STM32_RTC_BK9R_OFFSET     0x0074 /* RTC backup register 9 */
+#define STM32_RTC_BK10R_OFFSET    0x0078 /* RTC backup register 10 */
+#define STM32_RTC_BK11R_OFFSET    0x007c /* RTC backup register 11 */
+#define STM32_RTC_BK12R_OFFSET    0x0080 /* RTC backup register 12 */
+#define STM32_RTC_BK13R_OFFSET    0x0084 /* RTC backup register 13 */
+#define STM32_RTC_BK14R_OFFSET    0x0088 /* RTC backup register 14 */
+#define STM32_RTC_BK15R_OFFSET    0x008c /* RTC backup register 15 */
+#define STM32_RTC_BK16R_OFFSET    0x0090 /* RTC backup register 16 */
+#define STM32_RTC_BK17R_OFFSET    0x0094 /* RTC backup register 17 */
+#define STM32_RTC_BK18R_OFFSET    0x0098 /* RTC backup register 18 */
+#define STM32_RTC_BK19R_OFFSET    0x009c /* RTC backup register 19 */
+#define STM32_RTC_BK20R_OFFSET    0x00a0 /* RTC backup register 20 */
+#define STM32_RTC_BK21R_OFFSET    0x00a4 /* RTC backup register 21 */
+#define STM32_RTC_BK22R_OFFSET    0x00a8 /* RTC backup register 22 */
+#define STM32_RTC_BK23R_OFFSET    0x00ac /* RTC backup register 23 */
+#define STM32_RTC_BK24R_OFFSET    0x00b0 /* RTC backup register 24 */
+#define STM32_RTC_BK25R_OFFSET    0x00b4 /* RTC backup register 25 */
+#define STM32_RTC_BK26R_OFFSET    0x00b8 /* RTC backup register 26 */
+#define STM32_RTC_BK27R_OFFSET    0x00bc /* RTC backup register 27 */
+#define STM32_RTC_BK28R_OFFSET    0x00c0 /* RTC backup register 28 */
+#define STM32_RTC_BK29R_OFFSET    0x00c4 /* RTC backup register 29 */
+#define STM32_RTC_BK30R_OFFSET    0x00c8 /* RTC backup register 30 */
+#define STM32_RTC_BK31R_OFFSET    0x00cc /* RTC backup register 31 */
+
+/* Register Addresses ***************************************************************/
+
+#define STM32_RTC_TR              (STM32_RTC_BASE+STM32_RTC_TR_OFFSET)
+#define STM32_RTC_DR              (STM32_RTC_BASE+STM32_RTC_DR_OFFSET)
+#define STM32_RTC_CR              (STM32_RTC_BASE+STM32_RTC_CR_OFFSET)
+#define STM32_RTC_ISR             (STM32_RTC_BASE+STM32_RTC_ISR_OFFSET)
+#define STM32_RTC_PRER            (STM32_RTC_BASE+STM32_RTC_PRER_OFFSET)
+#define STM32_RTC_WUTR            (STM32_RTC_BASE+STM32_RTC_WUTR_OFFSET)
+#define STM32_RTC_ALRMAR          (STM32_RTC_BASE+STM32_RTC_ALRMAR_OFFSET)
+#define STM32_RTC_ALRMBR          (STM32_RTC_BASE+STM32_RTC_ALRMBR_OFFSET)
+#define STM32_RTC_WPR             (STM32_RTC_BASE+STM32_RTC_WPR_OFFSET)
+#define STM32_RTC_SSR             (STM32_RTC_BASE+STM32_RTC_SSR_OFFSET)
+#define STM32_RTC_SHIFTR          (STM32_RTC_BASE+STM32_RTC_SHIFTR_OFFSET)
+#define STM32_RTC_TSTR            (STM32_RTC_BASE+STM32_RTC_TSTR_OFFSET)
+#define STM32_RTC_TSDR            (STM32_RTC_BASE+STM32_RTC_TSDR_OFFSET)
+#define STM32_RTC_TSSSR           (STM32_RTC_BASE+STM32_RTC_TSSSR_OFFSET)
+#define STM32_RTC_CALR            (STM32_RTC_BASE+STM32_RTC_CALR_OFFSET)
+#define STM32_RTC_TAMPCR          (STM32_RTC_BASE+STM32_RTC_TAMPCR_OFFSET)
+#define STM32_RTC_ALRMASSR        (STM32_RTC_BASE+STM32_RTC_ALRMASSR_OFFSET)
+#define STM32_RTC_ALRMBSSR        (STM32_RTC_BASE+STM32_RTC_ALRMBSSR_OFFSET)
+
+#define STM32_RTC_BKR(n)          (STM32_RTC_BASE+STM32_RTC_BKR_OFFSET(n))
+#define STM32_RTC_BK0R            (STM32_RTC_BASE+STM32_RTC_BK0R_OFFSET)
+#define STM32_RTC_BK1R            (STM32_RTC_BASE+STM32_RTC_BK1R_OFFSET)
+#define STM32_RTC_BK2R            (STM32_RTC_BASE+STM32_RTC_BK2R_OFFSET)
+#define STM32_RTC_BK3R            (STM32_RTC_BASE+STM32_RTC_BK3R_OFFSET)
+#define STM32_RTC_BK4R            (STM32_RTC_BASE+STM32_RTC_BK4R_OFFSET)
+#define STM32_RTC_BK5R            (STM32_RTC_BASE+STM32_RTC_BK5R_OFFSET)
+#define STM32_RTC_BK6R            (STM32_RTC_BASE+STM32_RTC_BK6R_OFFSET)
+#define STM32_RTC_BK7R            (STM32_RTC_BASE+STM32_RTC_BK7R_OFFSET)
+#define STM32_RTC_BK8R            (STM32_RTC_BASE+STM32_RTC_BK8R_OFFSET)
+#define STM32_RTC_BK9R            (STM32_RTC_BASE+STM32_RTC_BK9R_OFFSET)
+#define STM32_RTC_BK10R           (STM32_RTC_BASE+STM32_RTC_BK10R_OFFSET)
+#define STM32_RTC_BK11R           (STM32_RTC_BASE+STM32_RTC_BK11R_OFFSET)
+#define STM32_RTC_BK12R           (STM32_RTC_BASE+STM32_RTC_BK12R_OFFSET)
+#define STM32_RTC_BK13R           (STM32_RTC_BASE+STM32_RTC_BK13R_OFFSET)
+#define STM32_RTC_BK14R           (STM32_RTC_BASE+STM32_RTC_BK14R_OFFSET)
+#define STM32_RTC_BK15R           (STM32_RTC_BASE+STM32_RTC_BK15R_OFFSET)
+#define STM32_RTC_BK16R           (STM32_RTC_BASE+STM32_RTC_BK16R_OFFSET)
+#define STM32_RTC_BK17R           (STM32_RTC_BASE+STM32_RTC_BK17R_OFFSET)
+#define STM32_RTC_BK18R           (STM32_RTC_BASE+STM32_RTC_BK18R_OFFSET)
+#define STM32_RTC_BK19R           (STM32_RTC_BASE+STM32_RTC_BK19R_OFFSET)
+#define STM32_RTC_BK20R           (STM32_RTC_BASE+STM32_RTC_BK20R_OFFSET)
+#define STM32_RTC_BK21R           (STM32_RTC_BASE+STM32_RTC_BK21R_OFFSET)
+#define STM32_RTC_BK22R           (STM32_RTC_BASE+STM32_RTC_BK22R_OFFSET)
+#define STM32_RTC_BK23R           (STM32_RTC_BASE+STM32_RTC_BK23R_OFFSET)
+#define STM32_RTC_BK24R           (STM32_RTC_BASE+STM32_RTC_BK24R_OFFSET)
+#define STM32_RTC_BK25R           (STM32_RTC_BASE+STM32_RTC_BK25R_OFFSET)
+#define STM32_RTC_BK26R           (STM32_RTC_BASE+STM32_RTC_BK26R_OFFSET)
+#define STM32_RTC_BK27R           (STM32_RTC_BASE+STM32_RTC_BK27R_OFFSET)
+#define STM32_RTC_BK28R           (STM32_RTC_BASE+STM32_RTC_BK28R_OFFSET)
+#define STM32_RTC_BK29R           (STM32_RTC_BASE+STM32_RTC_BK29R_OFFSET)
+#define STM32_RTC_BK30R           (STM32_RTC_BASE+STM32_RTC_BK30R_OFFSET)
+#define STM32_RTC_BK31R           (STM32_RTC_BASE+STM32_RTC_BK31R_OFFSET)
+
+#define STM32_RTC_BKCOUNT         32
+
+/* Register Bitfield Definitions ****************************************************/
+
+/* RTC time register */
+
+#define RTC_TR_SU_SHIFT           (0)       /* Bits 0-3: Second units in BCD format */
+#define RTC_TR_SU_MASK            (15 << RTC_TR_SU_SHIFT)
+#define RTC_TR_ST_SHIFT           (4)       /* Bits 4-6: Second tens in BCD format */
+#define RTC_TR_ST_MASK            (7 << RTC_TR_ST_SHIFT)
+#define RTC_TR_MNU_SHIFT          (8)       /* Bit 8-11: Minute units in BCD format */
+#define RTC_TR_MNU_MASK           (15 << RTC_TR_MNU_SHIFT)
+#define RTC_TR_MNT_SHIFT          (12)      /* Bits 12-14: Minute tens in BCD format */
+#define RTC_TR_MNT_MASK           (7 << RTC_TR_MNT_SHIFT)
+#define RTC_TR_HU_SHIFT           (16)      /* Bit 16-19: Hour units in BCD format */
+#define RTC_TR_HU_MASK            (15 << RTC_TR_HU_SHIFT)
+#define RTC_TR_HT_SHIFT           (20)      /* Bits 20-21: Hour tens in BCD format */
+#define RTC_TR_HT_MASK            (3 << RTC_TR_HT_SHIFT)
+#define RTC_TR_PM                 (1 << 22) /* Bit 22: AM/PM notation */
+#define RTC_TR_RESERVED_BITS      (0xff808080)
+
+/* RTC date register */
+
+#define RTC_DR_DU_SHIFT           (0)       /* Bits 0-3: Date units in BCD format */
+#define RTC_DR_DU_MASK            (15 << RTC_DR_DU_SHIFT)
+#define RTC_DR_DT_SHIFT           (4)       /* Bits 4-5: Date tens in BCD format */
+#define RTC_DR_DT_MASK            (3 << RTC_DR_DT_SHIFT)
+#define RTC_DR_MU_SHIFT           (8)      /* Bits 8-11: Month units in BCD format */
+#define RTC_DR_MU_MASK            (15 << RTC_DR_MU_SHIFT)
+#define RTC_DR_MT                 (1 << 12) /* Bit 12: Month tens in BCD format */
+#define RTC_DR_WDU_SHIFT          (13)      /* Bits 13-15: Week day units */
+#define RTC_DR_WDU_MASK           (7 << RTC_DR_WDU_SHIFT)
+#  define RTC_DR_WDU_MONDAY       (1 << RTC_DR_WDU_SHIFT)
+#  define RTC_DR_WDU_TUESDAY      (2 << RTC_DR_WDU_SHIFT)
+#  define RTC_DR_WDU_WEDNESDAY    (3 << RTC_DR_WDU_SHIFT)
+#  define RTC_DR_WDU_THURSDAY     (4 << RTC_DR_WDU_SHIFT)
+#  define RTC_DR_WDU_FRIDAY       (5 << RTC_DR_WDU_SHIFT)
+#  define RTC_DR_WDU_SATURDAY     (6 << RTC_DR_WDU_SHIFT)
+#  define RTC_DR_WDU_SUNDAY       (7 << RTC_DR_WDU_SHIFT)
+#define RTC_DR_YU_SHIFT           (16)     /* Bits 16-19: Year units in BCD format */
+#define RTC_DR_YU_MASK            (15 << RTC_DR_YU_SHIFT)
+#define RTC_DR_YT_SHIFT           (20)     /* Bits 20-23: Year tens in BCD format */
+#define RTC_DR_YT_MASK            (15 << RTC_DR_YT_SHIFT)
+#define RTC_DR_RESERVED_BITS      (0xff0000c0)
+
+/* RTC control register */
+
+#define RTC_CR_WUCKSEL_SHIFT      (0)      /* Bits 0-2: Wakeup clock selection */
+#define RTC_CR_WUCKSEL_MASK       (7 << RTC_CR_WUCKSEL_SHIFT)
+#  define RTC_CR_WUCKSEL_RTCDIV16  (0 << RTC_CR_WUCKSEL_SHIFT) /* 000: RTC/16 clock is selected */
+#  define RTC_CR_WUCKSEL_RTCDIV8   (1 << RTC_CR_WUCKSEL_SHIFT) /* 001: RTC/8 clock is selected */
+#  define RTC_CR_WUCKSEL_RTCDIV4   (2 << RTC_CR_WUCKSEL_SHIFT) /* 010: RTC/4 clock is selected */
+#  define RTC_CR_WUCKSEL_RTCDIV2   (3 << RTC_CR_WUCKSEL_SHIFT) /* 011: RTC/2 clock is selected */
+#  define RTC_CR_WUCKSEL_CKSPRE    (4 << RTC_CR_WUCKSEL_SHIFT) /* 10x: ck_spre clock is selected */
+#  define RTC_CR_WUCKSEL_CKSPREADD (6 << RTC_CR_WUCKSEL_SHIFT) /* 11x: ck_spr clock and 216 added WUT counter */
+#define RTC_CR_TSEDGE             (1 << 3)  /* Bit 3:  Timestamp event active edge */
+#define RTC_CR_REFCKON            (1 << 4)  /* Bit 4:  Reference clock detection enable (50 or 60 Hz) */
+#define RTC_CR_BYPSHAD            (1 << 5)  /* Bit 5:  Bypass the shadow registers */
+#define RTC_CR_FMT                (1 << 6)  /* Bit 6:  Hour format */
+#define RTC_CR_ALRAE              (1 << 8)  /* Bit 8:  Alarm A enable */
+#define RTC_CR_ALRBE              (1 << 9)  /* Bit 9:  Alarm B enable */
+#define RTC_CR_WUTE               (1 << 10) /* Bit 10: Wakeup timer enable */
+#define RTC_CR_TSE                (1 << 11) /* Bit 11: Time stamp enable */
+#define RTC_CR_ALRAIE             (1 << 12) /* Bit 12: Alarm A interrupt enable */
+#define RTC_CR_ALRBIE             (1 << 13) /* Bit 13: Alarm B interrupt enable */
+#define RTC_CR_WUTIE              (1 << 14) /* Bit 14: Wakeup timer interrupt enable */
+#define RTC_CR_TSIE               (1 << 15) /* Bit 15: Timestamp interrupt enable */
+#define RTC_CR_ADD1H              (1 << 16) /* Bit 16: Add 1 hour (summer time change) */
+#define RTC_CR_SUB1H              (1 << 17) /* Bit 17: Subtract 1 hour (winter time change) */
+#define RTC_CR_BKP                (1 << 18) /* Bit 18: Backup */
+#define RTC_CR_COSEL              (1 << 19) /* Bit 19 : Calibration output selection */
+#define RTC_CR_POL                (1 << 20) /* Bit 20: Output polarity */
+#define RTC_CR_OSEL_SHIFT         (21)      /* Bits 21-22: Output selection */
+#define RTC_CR_OSEL_MASK          (3 << RTC_CR_OSEL_SHIFT)
+#  define RTC_CR_OSEL_DISABLED    (0 << RTC_CR_OSEL_SHIFT) /* 00: Output disabled */
+#  define RTC_CR_OSEL_ALRMA       (1 << RTC_CR_OSEL_SHIFT) /* 01: Alarm A output enabled */
+#  define RTC_CR_OSEL_ALRMB       (2 << RTC_CR_OSEL_SHIFT) /* 10: Alarm B output enabled */
+#  define RTC_CR_OSEL_WUT         (3 << RTC_CR_OSEL_SHIFT) /* 11: Wakeup output enabled */
+#define RTC_CR_COE                (1 << 23) /* Bit 23: Calibration output enable */
+#define RTC_CR_ITSE               (1 << 24) /* Bit 24: Timestamp on internal event enable */
+
+/* RTC initialization and status register */
+
+#define RTC_ISR_ALRAWF            (1 << 0)  /* Bit 0:  Alarm A write flag */
+#define RTC_ISR_ALRBWF            (1 << 1)  /* Bit 1:  Alarm B write flag */
+#define RTC_ISR_WUTWF             (1 << 2)  /* Bit 2:  Wakeup timer write flag */
+#define RTC_ISR_SHPF              (1 << 3)  /* Bit 3:  Shift operation pending */
+#define RTC_ISR_INITS             (1 << 4)  /* Bit 4:  Initialization status flag */
+#define RTC_ISR_RSF               (1 << 5)  /* Bit 5:  Registers synchronization flag */
+#define RTC_ISR_INITF             (1 << 6)  /* Bit 6:  Initialization flag */
+#define RTC_ISR_INIT              (1 << 7)  /* Bit 7:  Initialization mode */
+#define RTC_ISR_ALRAF             (1 << 8)  /* Bit 8:  Alarm A flag */
+#define RTC_ISR_ALRBF             (1 << 9)  /* Bit 9:  Alarm B flag */
+#define RTC_ISR_WUTF              (1 << 10) /* Bit 10: Wakeup timer flag */
+#define RTC_ISR_TSF               (1 << 11) /* Bit 11: Timestamp flag */
+#define RTC_ISR_TSOVF             (1 << 12) /* Bit 12: Timestamp overflow flag */
+#define RTC_ISR_TAMP1F            (1 << 13) /* Bit 13: Tamper detection flag */
+#define RTC_ISR_TAMP2F            (1 << 14) /* Bit 14: TAMPER2 detection flag */
+#define RTC_ISR_TAMP3F            (1 << 15) /* Bit 15: TAMPER3 detection flag */
+#define RTC_ISR_RECALPF           (1 << 16) /* Bit 16: Recalibration pending Flag */
+#define RTC_ISR_ITSF              (1 << 17) /* Bit 17:Internal tTime-stamp flagg */
+#define RTC_ISR_ALLFLAGS          (0x0003ffff)
+
+/* RTC prescaler register */
+
+#define RTC_PRER_PREDIV_S_SHIFT   (0)       /* Bits 0-14: Synchronous prescaler factor */
+#define RTC_PRER_PREDIV_S_MASK    (0x7fff << RTC_PRER_PREDIV_S_SHIFT)
+#define RTC_PRER_PREDIV_A_SHIFT   (16)      /* Bits 16-22: Asynchronous prescaler factor */
+#define RTC_PRER_PREDIV_A_MASK    (0x7f << RTC_PRER_PREDIV_A_SHIFT)
+
+/* RTC wakeup timer register */
+
+#define RTC_WUTR_MASK             (0xffff)  /* Bits 15:0  Wakeup auto-reload value bits */
+
+/* RTC alarm A/B registers */
+
+#define RTC_ALRMR_SU_SHIFT        (0)       /* Bits 0-3: Second units in BCD format. */
+#define RTC_ALRMR_SU_MASK         (15 << RTC_ALRMR_SU_SHIFT)
+#define RTC_ALRMR_ST_SHIFT        (4)       /* Bits 4-6: Second tens in BCD format. */
+#define RTC_ALRMR_ST_MASK         (7 << RTC_ALRMR_ST_SHIFT)
+#define RTC_ALRMR_MSK1            (1 << 7)  /* Bit 7 : Alarm A seconds mask */
+#define RTC_ALRMR_MNU_SHIFT       (8)       /* Bits 8-11: Minute units in BCD format. */
+#define RTC_ALRMR_MNU_MASK        (15 << RTC_ALRMR_MNU_SHIFT)
+#define RTC_ALRMR_MNT_SHIFT       (12)      /* Bits 12-14: Minute tens in BCD format. */
+#define RTC_ALRMR_MNT_MASK        (7 << RTC_ALRMR_MNT_SHIFT)
+#define RTC_ALRMR_MSK2            (1 << 15) /* Bit 15 : Alarm A minutes mask */
+#define RTC_ALRMR_HU_SHIFT        (16)      /* Bits 16-19: Hour units in BCD format. */
+#define RTC_ALRMR_HU_MASK         (15 << RTC_ALRMR_HU_SHIFT)
+#define RTC_ALRMR_HT_SHIFT        (20)      /* Bits 20-21: Hour tens in BCD format. */
+#define RTC_ALRMR_HT_MASK         (3 << RTC_ALRMR_HT_SHIFT)
+#define RTC_ALRMR_PM              (1 << 22) /* Bit 22 : AM/PM notation */
+#define RTC_ALRMR_MSK3            (1 << 23) /* Bit 23 : Alarm A hours mask */
+#define RTC_ALRMR_DU_SHIFT        (24)      /* Bits 24-27: Date units or day in BCD format. */
+#define RTC_ALRMR_DU_MASK         (15 << RTC_ALRMR_DU_SHIFT)
+#define RTC_ALRMR_DT_SHIFT        (28)      /* Bits 28-29: Date tens in BCD format. */
+#define RTC_ALRMR_DT_MASK         (3 << RTC_ALRMR_DT_SHIFT)
+#define RTC_ALRMR_WDSEL           (1 << 30) /* Bit 30: Week day selection */
+#define RTC_ALRMR_MSK4            (1 << 31) /* Bit 31: Alarm A date mask */
+
+/* RTC write protection register */
+
+#define RTC_WPR_MASK              (0xff)    /* Bits 0-7: Write protection key */
+
+/* RTC sub second register */
+
+#define RTC_SSR_MASK              (0xffff)  /* Bits 0-15: Sub second value */
+
+/* RTC shift control register */
+
+#define RTC_SHIFTR_SUBFS_SHIFT    (0)       /* Bits 0-14: Subtract a fraction of a second */
+#define RTC_SHIFTR_SUBFS_MASK     (0x7ffff << RTC_SHIFTR_SUBFS_SHIFT)
+#define RTC_SHIFTR_ADD1S          (1 << 31) /* Bit 31: Add one second */
+
+/* RTC time stamp time register */
+
+#define RTC_TSTR_SU_SHIFT         (0)       /* Bits 0-3: Second units in BCD format. */
+#define RTC_TSTR_SU_MASK          (15 << RTC_TSTR_SU_SHIFT)
+#define RTC_TSTR_ST_SHIFT         (4)       /* Bits 4-6: Second tens in BCD format. */
+#define RTC_TSTR_ST_MASK          (7 << RTC_TSTR_ST_SHIFT)
+#define RTC_TSTR_MNU_SHIFT        (8)       /* Bits 8-11: Minute units in BCD format. */
+#define RTC_TSTR_MNU_MASK         (15 << RTC_TSTR_MNU_SHIFT)
+#define RTC_TSTR_MNT_SHIFT        (12)      /* Bits 12-14: Minute tens in BCD format. */
+#define RTC_TSTR_MNT_MASK         (7 << RTC_TSTR_MNT_SHIFT)
+#define RTC_TSTR_HU_SHIFT         (16)      /* Bits 16-19: Hour units in BCD format. */
+#define RTC_TSTR_HU_MASK          (15 << RTC_TSTR_HU_SHIFT)
+#define RTC_TSTR_HT_SHIFT         (20)      /* Bits 20-21: Hour tens in BCD format. */
+#define RTC_TSTR_HT_MASK          (3 << RTC_TSTR_HT_SHIFT)
+#define RTC_TSTR_PM               (1 << 22) /* Bit 22: AM/PM notation */
+
+/* RTC time stamp date register */
+
+#define RTC_TSDR_DU_SHIFT         (0)       /* Bit 0-3: Date units in BCD format */
+#define RTC_TSDR_DU_MASK          (15 << RTC_TSDR_DU_SHIFT) */
+#define RTC_TSDR_DT_SHIFT         (4)       /* Bits 4-5: Date tens in BCD format */
+#define RTC_TSDR_DT_MASK          (3 << RTC_TSDR_DT_SHIFT)
+#define RTC_TSDR_MU_SHIFT         (8)       /* Bits 8-11: Month units in BCD format */
+#define RTC_TSDR_MU_MASK          (xx << RTC_TSDR_MU_SHIFT)
+#define RTC_TSDR_MT               (1 << 12) /* Bit 12: Month tens in BCD format */
+#define RTC_TSDR_WDU_SHIFT        (13)      /* Bits 13-15: Week day units */
+#define RTC_TSDR_WDU_MASK         (7 << RTC_TSDR_WDU_SHIFT)
+
+/* RTC timestamp sub second register */
+
+#define RTC_TSSSR_MASK            (0xffff)  /* Bits 0-15: Sub second value */
+
+/* RTC calibration register */
+
+#define RTC_CALR_CALM_SHIFT       (0)       /* Bits 0-8: Calibration minus */
+#define RTC_CALR_CALM_MASK        (0x1ff << RTC_CALR_CALM_SHIFT)
+#define RTC_CALR_CALW16           (1 << 13) /* Bit 13: Use a 16-second calibration cycle period */
+#define RTC_CALR_CALW8            (1 << 14) /* Bit 14: Use an 8-second calibration cycle period */
+#define RTC_CALR_CALP             (1 << 15) /* Bit 15: Increase frequency of RTC by 488.5 ppm */
+
+/* RTC tamper configuration register */
+
+#define RTC_TAMPCR_TAMP1E         (1 << 0)  /* Bit 0:  RTC_TAMP1 input detection enable */
+#define RTC_TAMPCR_TAMP1TRG       (1 << 1)  /* Bit 1:  Active level for RTC_TAMP1 input */
+#define RTC_TAMPCR_TAMPIE         (1 << 2)  /* Bit 2:  Tamper interrupt enable */
+#define RTC_TAMPCR_TAMP2E         (1 << 3)  /* Bit 3:  RTC_TAMP2 input detection enable */
+#define RTC_TAMPCR_TAMP2TRG       (1 << 4)  /* Bit 4:  Active level for RTC_TAMP2 input */
+#define RTC_TAMPCR_TAMP3E         (1 << 5)  /* Bit 5:  RTC_TAMP3 detection enable */
+#define RTC_TAMPCR_TAMP3TRG       (1 << 6)  /* Bit 6:  Active level for RTC_TAMP3 input */
+#define RTC_TAMPCR_TAMPTS         (1 << 7)  /* Bit 7:  Activate timestamp on tamper detection event */
+#define RTC_TAMPCR_TAMPFREQ_SHIFT (8)        /* Bits 8-10: Tamper sampling frequency */
+#define RTC_TAMPCR_TAMPFREQ_MASK  (7 << RTC_TAMPCR_TAMPFREQ_SHIFT)
+#  define RTC_TAMPCR_TAMPFREQ_DIV32768 (0 << RTC_TAMPCR_TAMPFREQ_SHIFT) /* RTCCLK / 32768 (1 Hz) */
+#  define RTC_TAMPCR_TAMPFREQ_DIV16384 (1 << RTC_TAMPCR_TAMPFREQ_SHIFT) /* RTCCLK / 16384 (2 Hz) */
+#  define RTC_TAMPCR_TAMPFREQ_DIV8192  (2 << RTC_TAMPCR_TAMPFREQ_SHIFT) /* RTCCLK / 8192 (4 Hz) */
+#  define RTC_TAMPCR_TAMPFREQ_DIV4096  (3 << RTC_TAMPCR_TAMPFREQ_SHIFT) /* RTCCLK / 4096 (8 Hz) */
+#  define RTC_TAMPCR_TAMPFREQ_DIV2048  (4 << RTC_TAMPCR_TAMPFREQ_SHIFT) /* RTCCLK / 2048 (16 Hz) */
+#  define RTC_TAMPCR_TAMPFREQ_DIV1024  (5 << RTC_TAMPCR_TAMPFREQ_SHIFT) /* RTCCLK / 1024 (32 Hz) */
+#  define RTC_TAMPCR_TAMPFREQ_DIV512   (6 << RTC_TAMPCR_TAMPFREQ_SHIFT) /* RTCCLK / 512 (64 Hz) */
+#  define RTC_TAMPCR_TAMPFREQ_DIV256   (7 << RTC_TAMPCR_TAMPFREQ_SHIFT) /* RTCCLK / 256 (128 Hz) */
+#define RTC_TAMPCR_TAMPFLT_SHIFT  (11)        /* Bits 11-12: RTC_TAMPx filter count */
+#define RTC_TAMPCR_TAMPFLT_MASK   (3 << RTC_TAMPCR_TAMPFLT_SHIFT)
+#define RTC_TAMPCR_TAMPPRCH_SHIFT (13)        /* Bits 13-14: RTC_TAMPx precharge duration */
+#define RTC_TAMPCR_TAMPPRCH_MASK  (3 << RTC_TAMPCR_TAMPPRCH_SHIFT)
+#  define RTC_TAMPCR_TAMPPRCH_1CYCLE  (0 << RTC_TAMPCR_TAMPPRCH_SHIFT) /* 1 RTCCLK cycle */
+#  define RTC_TAMPCR_TAMPPRCH_2CYCLES (1 << RTC_TAMPCR_TAMPPRCH_SHIFT) /* 2 RTCCLK cycles */
+#  define RTC_TAMPCR_TAMPPRCH_4CYCLES (2 << RTC_TAMPCR_TAMPPRCH_SHIFT) /* 4 RTCCLK cycles */
+#  define RTC_TAMPCR_TAMPPRCH_5CYCLES (3 << RTC_TAMPCR_TAMPPRCH_SHIFT) /* 8 RTCCLK cycles */
+#define RTC_TAMPCR_TAMPPUDIS      (1 << 15) /* Bit 15: RTC_TAMPx pull-up disable */
+#define RTC_TAMPCR_TAMP1IE        (1 << 16) /* Bit 16: Tamper 1 interrupt enable */
+#define RTC_TAMPCR_TAMP1NOERASE   (1 << 17) /* Bit 17: Tamper 1 no erase */
+#define RTC_TAMPCR_TAMP1MF        (1 << 18) /* Bit 18: Tamper 1 mask flag */
+#define RTC_TAMPCR_TAMP2IE        (1 << 19) /* Bit 19: Tamper 2 interrupt enable */
+#define RTC_TAMPCR_TAMP2NOERASE   (1 << 20) /* Bit 20: Tamper 2 no erase */
+#define RTC_TAMPCR_TAMP2MF        (1 << 21) /* Bit 21: Tamper 2 mask flag */
+#define RTC_TAMPCR_TAMP3IE        (1 << 22) /* Bit 22: Tamper 3 interrupt enable */
+#define RTC_TAMPCR_TAMP3NOERASE   (1 << 23) /* Bit 23: Tamper 3 no erase */
+#define RTC_TAMPCR_TAMP3MF        (1 << 24) /* Bit 24: Tamper 3 mask flag */
+
+/* RTC alarm A/B sub second register */
+
+#define RTC_ALRMSSR_SS_SHIFT      (0)   /* Bits 0-14: Sub second value */
+#define RTC_ALRMSSR_SS_MASK       (0x7fff << RTC_ALRMSSR_SS_SHIFT)
+#define RTC_ALRMSSR_MASKSS_SHIFT  (24)  /* Bits 24-27:  Mask the most-significant bits starting at this bit */
+#define RTC_ALRMSSR_MASKSS_MASK   (0xf << RTC_ALRMSSR_MASKSS_SHIFT)
+
+/* RTC option register */
+
+#define RTC_OR_TSINSEL_SHIFT      (1)   /* Bits 1-2: TIMESTAMP mapping */
+#define RTC_OR_TSINSEL_MASK       (3 << RTC_OR_TSINSEL_SHIFT)
+#  define RTC_OR_PC13             (0 << RTC_OR_TSINSEL_SHIFT) /* TIMESTAMP is mapped on PC13*/
+#  define RTC_OR_PI8              (1 << RTC_OR_TSINSEL_SHIFT) /* TIMESTAMP is mapped on PI8 */
+#  define RTC_OR_PC1              (2 << RTC_OR_TSINSEL_SHIFT) /* TIMESTAMP is mapped on PC1 */
+#  define RTC_OR_PC1_1            (3 << RTC_OR_TSINSEL_SHIFT) /* TIMESTAMP is mapped on PC1 */
+#define RTC_OR_RTC_ALARM_TYPE     (1 << 3) /* RTC_ALARM on PC13 output type */
+
+
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32_RTCC_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32_sdmmc.h b/arch/arm/src/stm32f7/chip/stm32_sdmmc.h
new file mode 100644
index 0000000000000000000000000000000000000000..016ddb18fb9eba5cd86a35b1c4829d398354ab29
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32_sdmmc.h
@@ -0,0 +1,54 @@
+/************************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32_sdmmc.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32_SDMMC_H
+#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32_SDMMC_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include "chip.h"
+
+#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) || \
+    defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+#  include "stm32f74xx77xx_sdmmc.h"
+#else
+#  error "Unsupported STM32 F7 part"
+#endif
+
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32_SDMMC_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32_spi.h b/arch/arm/src/stm32f7/chip/stm32_spi.h
new file mode 100644
index 0000000000000000000000000000000000000000..1874d88bca62f4b3c662db89cfd3f211cceedf75
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32_spi.h
@@ -0,0 +1,53 @@
+/************************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32_spi.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32_SPI_H
+#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32_SPI_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include "chip.h"
+
+#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) || \
+    defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+#  include "chip/stm32f74xx77xx_spi.h"
+#else
+#  error "Unsupported STM32 F7 sub family"
+#endif
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32_SPI_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32_syscfg.h b/arch/arm/src/stm32f7/chip/stm32_syscfg.h
index 37c82ec50cf4b6c87316f352cc8cacb4d33759d9..b17bc518aa2cce7ce9ba6ece9adc10b6051c14e1 100644
--- a/arch/arm/src/stm32f7/chip/stm32_syscfg.h
+++ b/arch/arm/src/stm32f7/chip/stm32_syscfg.h
@@ -2,7 +2,8 @@
  * arch/arm/src/stm32f7/chip/stm32_syscfg.h
  *
  *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -45,6 +46,8 @@
 
 #if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
 #  include "chip/stm32f74xx75xx_syscfg.h"
+#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+#  include "chip/stm32f76xx77xx_syscfg.h"
 #else
 #  error "Unsupported STM32 F7 part"
 #endif
diff --git a/arch/arm/src/stm32f7/chip/stm32_tim.h b/arch/arm/src/stm32f7/chip/stm32_tim.h
new file mode 100644
index 0000000000000000000000000000000000000000..77204d861d813fc912d22e7ada7516ac2beb213b
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32_tim.h
@@ -0,0 +1,55 @@
+/****************************************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32_tim.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32_TIM_H
+#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32_TIM_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include "chip.h"
+
+#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
+#  include "chip/stm32f74xx75xx_tim.h"
+#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+#  include "chip/stm32f76xx77xx_tim.h"
+#else
+#  error "Unsupported STM32 F7 sub family"
+#endif
+
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32_TIM_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32_uart.h b/arch/arm/src/stm32f7/chip/stm32_uart.h
index 0d48eaa399a94ae741256cb8cd20327af9624fdc..7669c675cc39162f66ccbf78492dd8c52b6ac005 100644
--- a/arch/arm/src/stm32f7/chip/stm32_uart.h
+++ b/arch/arm/src/stm32f7/chip/stm32_uart.h
@@ -1,8 +1,9 @@
 /************************************************************************************
  * arch/arm/src/stm32f7/chip/stm32_uart.h
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -43,8 +44,9 @@
 #include 
 #include "chip.h"
 
-#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
-#  include "chip/stm32f74xx75xx_uart.h"
+#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) || \
+    defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+#  include "chip/stm32f74xx77xx_uart.h"
 #else
 #  error "Unsupported STM32 F7 part"
 #endif
diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_dbgmcu.h b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_dbgmcu.h
new file mode 100644
index 0000000000000000000000000000000000000000..33842b73410302c3d6bd587c420b79dc0e58313b
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_dbgmcu.h
@@ -0,0 +1,112 @@
+/****************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32f74xx75xx_dbgmcu.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XX75XXDBGMCU_H
+#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XX75XXDBGMCU_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Register Addresses *******************************************************/
+
+#define STM32_DBGMCU_IDCODE       0xe0042000  /* MCU identifier */
+#define STM32_DBGMCU_CR           0xe0042004  /* MCU debug */
+#define STM32_DBGMCU_APB1_FZ      0xe0042008  /* Debug MCU APB1 freeze register */
+#define STM32_DBGMCU_APB2_FZ      0xe004200c  /* Debug MCU APB2 freeze register */
+
+/* Register Bitfield Definitions ********************************************/
+
+/* MCU identifier */
+
+#define DBGMCU_IDCODE_DEVID_SHIFT (0)       /* Bits 11-0: Device Identifier */
+#define DBGMCU_IDCODE_DEVID_MASK  (0x0fff << DBGMCU_IDCODE_DEVID_SHIFT)
+#define DBGMCU_IDCODE_REVID_SHIFT (16)      /* Bits 31-16:  Revision Identifier */
+#define DBGMCU_IDCODE_REVID_MASK  (0xffff << DBGMCU_IDCODE_REVID_SHIFT)
+
+/* MCU debug */
+
+#define DBGMCU_CR_SLEEP           (1 << 0)  /* Bit 0: Debug Sleep Mode */
+#define DBGMCU_CR_STOP            (1 << 1)  /* Bit 1: Debug Stop Mode */
+#define DBGMCU_CR_STANDBY         (1 << 2)  /* Bit 2: Debug Standby mode */
+#define DBGMCU_CR_TRACEIOEN       (1 << 5)  /* Bit 5: Trace enabled */
+
+#define DBGMCU_CR_TRACEMODE_SHIFT (6)        /* Bits 7-6: Trace mode pin assignement */
+#define DBGMCU_CR_TRACEMODE_MASK  (3 << DBGMCU_CR_TRACEMODE_SHIFT)
+#define DBGMCU_CR_ASYNCH          (0 << DBGMCU_CR_TRACEMODE_SHIFT) /* Asynchronous Mode */
+#define DBGMCU_CR_SYNCH1          (1 << DBGMCU_CR_TRACEMODE_SHIFT) /* Synchronous Mode, TRACEDATA size=1 */
+#define DBGMCU_CR_SYNCH2          (2 << DBGMCU_CR_TRACEMODE_SHIFT) /* Synchronous Mode, TRACEDATA size=2 */
+#define DBGMCU_CR_SYNCH4          (3 << DBGMCU_CR_TRACEMODE_SHIFT) /* Synchronous Mode, TRACEDATA size=4 */
+
+/* Debug MCU APB1 freeze register */
+
+#define DBGMCU_APB1_TIM2STOP      (1 << 0)   /* Bit 0: TIM2 stopped when core is halted */
+#define DBGMCU_APB1_TIM3STOP      (1 << 1)   /* Bit 1: TIM3 stopped when core is halted */
+#define DBGMCU_APB1_TIM4STOP      (1 << 2)   /* Bit 2: TIM4 stopped when core is halted */
+#define DBGMCU_APB1_TIM5STOP      (1 << 3)   /* Bit 3: TIM5 stopped when core is halted */
+#define DBGMCU_APB1_TIM6STOP      (1 << 4)   /* Bit 4: TIM6 stopped when core is halted */
+#define DBGMCU_APB1_TIM7STOP      (1 << 5)   /* Bit 5: TIM7 stopped when core is halted */
+#define DBGMCU_APB1_TIM12STOP     (1 << 6)   /* Bit 6: TIM12 stopped when core is halted */
+#define DBGMCU_APB1_TIM13STOP     (1 << 7)   /* Bit 7: TIM13 stopped when core is halted */
+#define DBGMCU_APB1_TIM14STOP     (1 << 8)   /* Bit 8: TIM14 stopped when core is halted */
+#define DBGMCU_APB1_LPTIM1STOP    (1 << 9)   /* Bit 9: LPTIM1 stopped when core is halted */
+#define DBGMCU_APB1_RTCSTOP       (1 << 10)  /* Bit 10: RTC stopped when Core is halted */
+#define DBGMCU_APB1_WWDGSTOP      (1 << 11)  /* Bit 11: Window Watchdog stopped when core is halted */
+#define DBGMCU_APB1_IWDGSTOP      (1 << 12)  /* Bit 12: Independent Watchdog stopped when core is halted */
+#define DBGMCU_APB1_I2C1STOP      (1 << 21)  /* Bit 21: I2C1 SMBUS timeout mode stopped when Core is halted */
+#define DBGMCU_APB1_I2C2STOP      (1 << 22)  /* Bit 22: I2C2 SMBUS timeout mode stopped when Core is halted */
+#define DBGMCU_APB1_I2C3STOP      (1 << 23)  /* Bit 23: I2C3 SMBUS timeout mode stopped when Core is halted */
+#define DBGMCU_APB1_I2C4STOP      (1 << 24)  /* Bit 24: I2C4 SMBUS timeout mode stopped when Core is halted */
+#define DBGMCU_APB1_CAN1STOP      (1 << 25)  /* Bit 25: CAN1 stopped when core is halted */
+#define DBGMCU_APB1_CAN2STOP      (1 << 26)  /* Bit 26: CAN2 stopped when core is halted */
+
+/* Debug MCU APB2 freeze register */
+
+#define DBGMCU_APB2_TIM1STOP      (1 << 0)   /* Bit 0:  TIM1 stopped when core is halted */
+#define DBGMCU_APB2_TIM8STOP      (1 << 1)   /* Bit 1:  TIM8 stopped when core is halted */
+#define DBGMCU_APB2_TIM9STOP      (1 << 16)  /* Bit 16: TIM9 stopped when core is halted */
+#define DBGMCU_APB2_TIM10STOP     (1 << 17)  /* Bit 17: TIM10 stopped when core is halted */
+#define DBGMCU_APB2_TIM11STOP     (1 << 18)  /* Bit 18: TIM11 stopped when core is halted */
+
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XX75XXDBGMCU_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_dma.h b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_dma.h
index a9acb05787178b750c099a549fb0845602706c7c..6b7fed23c16a6121b368e839f72fe2f7f51bd563 100644
--- a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_dma.h
+++ b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_dma.h
@@ -412,16 +412,16 @@
 #define DMAMAP_SPDIFRX_CS          STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN0)
 #define DMAMAP_SPI3_TX_2           STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN0)
 
-#define DMAMAP_I2C1_RX_1           STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN1)
-#define DMAMAP_I2C3_RX_1           STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN1)
+#define DMAMAP_I2C1_RX             STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN1)
+#define DMAMAP_I2C3_RX             STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN1)
 #define DMAMAP_TIM7_UP_1           STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN1)
 #define DMAMAP_TIM7_UP_2           STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN1)
-#define DMAMAP_I2C1_RX_2           STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN1)
-#define DMAMAP_I2C1_TX_1           STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN1)
-#define DMAMAP_I2C1_TX_2           STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN1)
+#define DMAMAP_I2C1_RX_1           STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN1)
+#define DMAMAP_I2C1_TX             STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN1)
+#define DMAMAP_I2C1_TX_1           STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN1)
 
 #define DMAMAP_TIM4_CH1            STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN2)
-#define DMAMAP_I2C_RX              STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN2)
+#define DMAMAP_I2C4_RX             STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN2)
 #define DMAMAP_TIM4_CH2            STM32_DMA_MAP(DMA1,DMA_STREAM3,DMA_CHAN2)
 #define DMAMAP_I2C4_TX             STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN2)
 #define DMAMAP_TIM4_UP             STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN2)
@@ -429,7 +429,7 @@
 
 #define DMAMAP_TIM2_UP_1           STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN3)
 #define DMAMAP_TIM2_CH3            STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN3)
-#define DMAMAP_I2C3_RX_2           STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN3)
+#define DMAMAP_I2C3_RX_1           STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN3)
 #define DMAMAP_I2C3_TX             STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN3)
 #define DMAMAP_TIM2_CH1            STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN3)
 #define DMAMAP_TIM2_CH2            STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN3)
@@ -468,8 +468,8 @@
 #define DMAMAP_TIM5_UP_2           STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN6)
 
 #define DMAMAP_TIM6_UP             STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN7)
-#define DMAMAP_I2C2_RX_1           STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN7)
-#define DMAMAP_I2C2_RX_2           STM32_DMA_MAP(DMA1,DMA_STREAM3,DMA_CHAN7)
+#define DMAMAP_I2C2_RX             STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN7)
+#define DMAMAP_I2C2_RX_1           STM32_DMA_MAP(DMA1,DMA_STREAM3,DMA_CHAN7)
 #define DMAMAP_USART3_TX_2         STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN7)
 #define DMAMAP_DAC1                STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN7)
 #define DMAMAP_DAC2                STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN7)
diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_flash.h b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_flash.h
index 69f4e217fca1a7d573cc9fc5da53acaca69eb7b1..74c2759fc94226c9ed3fb3da722d49339e9ca4cd 100644
--- a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_flash.h
+++ b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_flash.h
@@ -2,7 +2,8 @@
  * arch/arm/src/stm32f7/chip/stm32f74xx75xx_flash.h
  *
  *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -40,44 +41,62 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* Flash size is not known from the chip configuration:
+/* Flash size is known from the chip selection:
+ *
+ *   When CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT is set the
+ *   CONFIG_STM32F7_FLASH_CONFIG_x selects the default FLASH size based on the chip
+ *   part number. This value can be overridden with CONFIG_STM32F7_FLASH_OVERRIDE_x
  *
  *   Parts STM32F74xxE have 512Kb of FLASH
  *   Parts STM32F74xxG have 1024Kb of FLASH
  *
- * The user has to tell us the FLASH size by setting CONFIG_STM32F7_FLASH_SIZE
+ *   N.B. Only Single bank mode is supported
  */
 
-#if defined(CONFIG_STM32F7_FLASH_512KB)
+#define _K(x) ((x)*1024)
+
+#if !defined(CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT) && \
+    !defined(CONFIG_STM32_FLASH_OVERRIDE_E) && \
+    !defined(CONFIG_STM32_FLASH_OVERRIDE_F) && \
+    !defined(CONFIG_STM32_FLASH_OVERRIDE_G) && \
+    !defined(CONFIG_STM32_FLASH_CONFIG_E) && \
+    !defined(CONFIG_STM32_FLASH_CONFIG_F) && \
+    !defined(CONFIG_STM32_FLASH_CONFIG_G)
+#  define CONFIG_STM32_FLASH_OVERRIDE_E
+#  warning "Flash size not defined defaulting to 512KiB (E)"
+#endif
+
+#if !defined(CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT)
 
-#  define STM32_FLASH_NPAGES  2
-#  define STM32_FLASH_SIZE    (512*1024)
+#  undef CONFIG_STM32F7_FLASH_CONFIG_E
+#  undef CONFIG_STM32F7_FLASH_CONFIG_G
 
-#elif defined(CONFIG_STM32F7_FLASH_1024KB)
+#  if defined(CONFIG_STM32F7_FLASH_OVERRIDE_E)
 
-#  define STM32_FLASH_NPAGES  4
-#  define STM32_FLASH_SIZE    (1024*1024)
+#    define CONFIG_STM32F7_FLASH_CONFIG_E
 
-#else
-#  warning Assuming FLASH size 1024KB
+#  elif defined(CONFIG_STM32F7_FLASH_OVERRIDE_G)
 
-#  define STM32_FLASH_NPAGES  4
-#  define STM32_FLASH_SIZE    (1024*1024)
+#    define CONFIG_STM32F7_FLASH_CONFIG_G
 
+#  endif
 #endif
 
-/* The STM32F745xx/46xx have mixed page sizes:
- *
- *   Sectors: 0-3:  32 KB
- *   Sector   4    128 KB
- *   Sectors: 5-7: 256 KB
- *
- * We use the largest page size and set the number of pages equal to the
- * FLASH size assuming that fixed, largest pages size.
- */
+#if defined(CONFIG_STM32_FLASH_CONFIG_E)
+
+#  define STM32_FLASH_NPAGES      6
+#  define STM32_FLASH_SIZE        _K((4 * 32) + (1 * 128) + (1 * 256))
+#  define STM32_FLASH_SIZES       {_K(32), _K(32), _K(32), _K(32),  \
+                                   _K(128), _K(256)}
 
-#define STM32_FLASH_PAGESIZE  (256*1024)
+#elif defined(CONFIG_STM32_FLASH_CONFIG_G)
 
+#  define STM32_FLASH_NPAGES      8
+#  define STM32_FLASH_SIZE        _K((4 * 32) + (1 * 128) + (3 * 256))
+#  define STM32_FLASH_SIZES       {_K(32), _K(32), _K(32), _K(32),  \
+                                  _K(128), _K(256), _K(256), _K(256)}
+
+#endif
 
 /* Register Offsets *****************************************************************/
 
@@ -133,8 +152,8 @@
 #define FLASH_CR_SER               (1 << 1)  /* Bit 1:  Sector Erase */
 #define FLASH_CR_MER               (1 << 2)  /* Bit 2:  Mass Erase sectors 0..11 */
 #define FLASH_CR_SNB_SHIFT         (3)       /* Bits 3-6: Sector number */
-#define FLASH_CR_SNB_MASK          (15 << FLASH_CR_SNB_SHIFT)
-#  define FLASH_CR_SNB(n)          ((uint32_t)(n) << FLASH_CR_SNB_SHIFT) | ((n / 12) << 7)) /* Sector n, n=0..23 */
+#define FLASH_CR_SNB_MASK          (0xf << FLASH_CR_SNB_SHIFT)
+#  define FLASH_CR_SNB(n)          ((uint32_t)((n) % 8) << FLASH_CR_SNB_SHIFT) | ((n / 8) << 6)) /* Sector n, n=0..23 */
 #define FLASH_CR_PSIZE_SHIFT       (8)       /* Bits 8-9: Program size */
 #define FLASH_CR_PSIZE_MASK        (3 << FLASH_CR_PSIZE_SHIFT)
 #  define FLASH_CR_PSIZE_X8        (0 << FLASH_CR_PSIZE_SHIFT) /* Program x8 */
@@ -145,7 +164,6 @@
 #define FLASH_CR_EOPIE             (1 << 24) /* Bit 24: End of operation interrupt enable */
 #define FLASH_CR_ERRIE             (1 << 25) /* Bit 25: Error interrupt enable */
 #define FLASH_CR_LOCK              (1 << 31) /* Bit 31: Lock */
-#define FLASH_CR_MER1              (1 << 15) /* Bit 15: Mass Erase sectors 12..23 */
 
 /* Flash Option Control Register (OPTCR) */
 
@@ -159,15 +177,15 @@
 #  define FLASH_OPTCR_VBOR0        (3 << FLASH_OPTCR_BORLEV_SHIFT) /* BOR off */
 #define FLASH_OPTCR_USER_SHIFT     (4)       /* Bits 5-7: User option bytes */
 #define FLASH_OPTCR_USER_MASK      (15 << FLASH_OPTCR_USER_SHIFT)
-#  define FLASH_OPTCR_WWDG_SW      (1 << 4)  /* Bit 5: WWDG_SW */
+#  define FLASH_OPTCR_WWDG_SW      (1 << 4)  /* Bit 4: WWDG_SW */
 #  define FLASH_OPTCR_IWDG_SW      (1 << 5)  /* Bit 5: IWDG_SW */
 #  define FLASH_OPTCR_NRST_STOP    (1 << 6)  /* Bit 6: nRST_STOP */
 #  define FLASH_OPTCR_NRST_STDBY   (1 << 7)  /* Bit 7: nRST_STDBY */
 #define FLASH_OPTCR_RDP_SHIFT      (8)       /* Bits 8-15: Read protect */
 #define FLASH_OPTCR_RDP_MASK       (0xff << FLASH_OPTCR_RDP_SHIFT)
 #  define FLASH_OPTCR_RDP(n)       ((uint32_t)(n) << FLASH_OPTCR_RDP_SHIFT)
-#define FLASH_OPTCR_NWRP_SHIFT     (16)      /* Bits 16-27: Not write protect */
-#define FLASH_OPTCR_NWRP_MASK      (0xfff << FLASH_OPTCR_NWRP_SHIFT)
+#define FLASH_OPTCR_NWRP_SHIFT     (16)      /* Bits 16-23: Not write protect */
+#define FLASH_OPTCR_NWRP_MASK      (0xff << FLASH_OPTCR_NWRP_SHIFT)
 #   define FLASH_OPTCR_NWRP(n)     ((uint32_t)(n) << FLASH_OPTCR_NWRP_SHIFT)
 #define FLASH_OPTCR_IWDG_STDBY     (1 << 30) /* Bit 30: IWDG freeze in stop mode */
 #define FLASH_OPTCR_IWDG_STOP      (1 << 31) /* Bit 31: IWDG freeze in standby mode */
diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_gpio.h b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_gpio.h
index c996f7d1052226b065fc39140333050598ae890d..b8818f6e49b83ebe43e105c0732e3f1f86a947d6 100644
--- a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_gpio.h
+++ b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_gpio.h
@@ -61,7 +61,6 @@
 #define STM32_GPIO_LCKR_OFFSET     0x001c /* GPIO port configuration lock register */
 #define STM32_GPIO_AFRL_OFFSET     0x0020 /* GPIO alternate function low register */
 #define STM32_GPIO_AFRH_OFFSET     0x0024 /* GPIO alternate function high register */
-#define STM32_GPIO_BRR_OFFSET      0x0028 /* GPIO port bit reset register */
 
 /* Register Addresses ***************************************************************/
 
@@ -76,7 +75,6 @@
 #  define STM32_GPIOA_LCKR         (STM32_GPIOA_BASE+STM32_GPIO_LCKR_OFFSET)
 #  define STM32_GPIOA_AFRL         (STM32_GPIOA_BASE+STM32_GPIO_AFRL_OFFSET)
 #  define STM32_GPIOA_AFRH         (STM32_GPIOA_BASE+STM32_GPIO_AFRH_OFFSET)
-#  define STM32_GPIOA_BRR          (STM32_GPIOA_BASE+STM32_GPIO_BRR_OFFSET)
 #endif
 
 #if STM32F7_NGPIO > 1
@@ -90,7 +88,6 @@
 #  define STM32_GPIOB_LCKR         (STM32_GPIOB_BASE+STM32_GPIO_LCKR_OFFSET)
 #  define STM32_GPIOB_AFRL         (STM32_GPIOB_BASE+STM32_GPIO_AFRL_OFFSET)
 #  define STM32_GPIOB_AFRH         (STM32_GPIOB_BASE+STM32_GPIO_AFRH_OFFSET)
-#  define STM32_GPIOB_BRR          (STM32_GPIOB_BASE+STM32_GPIO_BRR_OFFSET)
 #endif
 
 #if STM32F7_NGPIO > 2
@@ -104,7 +101,6 @@
 #  define STM32_GPIOC_LCKR         (STM32_GPIOC_BASE+STM32_GPIO_LCKR_OFFSET)
 #  define STM32_GPIOC_AFRL         (STM32_GPIOC_BASE+STM32_GPIO_AFRL_OFFSET)
 #  define STM32_GPIOC_AFRH         (STM32_GPIOC_BASE+STM32_GPIO_AFRH_OFFSET)
-#  define STM32_GPIOC_BRR          (STM32_GPIOC_BASE+STM32_GPIO_BRR_OFFSET)
 #endif
 
 #if STM32F7_NGPIO > 3
@@ -118,7 +114,6 @@
 #  define STM32_GPIOD_LCKR         (STM32_GPIOD_BASE+STM32_GPIO_LCKR_OFFSET)
 #  define STM32_GPIOD_AFRL         (STM32_GPIOD_BASE+STM32_GPIO_AFRL_OFFSET)
 #  define STM32_GPIOD_AFRH         (STM32_GPIOD_BASE+STM32_GPIO_AFRH_OFFSET)
-#  define STM32_GPIOD_BRR          (STM32_GPIOD_BASE+STM32_GPIO_BRR_OFFSET)
 #endif
 
 #if STM32F7_NGPIO > 4
@@ -132,7 +127,6 @@
 #  define STM32_GPIOE_LCKR         (STM32_GPIOE_BASE+STM32_GPIO_LCKR_OFFSET)
 #  define STM32_GPIOE_AFRL         (STM32_GPIOE_BASE+STM32_GPIO_AFRL_OFFSET)
 #  define STM32_GPIOE_AFRH         (STM32_GPIOE_BASE+STM32_GPIO_AFRH_OFFSET)
-#  define STM32_GPIOE_BRR          (STM32_GPIOE_BASE+STM32_GPIO_BRR_OFFSET)
 #endif
 
 #if STM32F7_NGPIO > 5
@@ -146,7 +140,6 @@
 #  define STM32_GPIOF_LCKR         (STM32_GPIOF_BASE+STM32_GPIO_LCKR_OFFSET)
 #  define STM32_GPIOF_AFRL         (STM32_GPIOF_BASE+STM32_GPIO_AFRL_OFFSET)
 #  define STM32_GPIOF_AFRH         (STM32_GPIOF_BASE+STM32_GPIO_AFRH_OFFSET)
-#  define STM32_GPIOF_BRR          (STM32_GPIOF_BASE+STM32_GPIO_BRR_OFFSET)
 #endif
 
 #if STM32F7_NGPIO > 6
@@ -160,7 +153,6 @@
 #  define STM32_GPIOG_LCKR         (STM32_GPIOG_BASE+STM32_GPIO_LCKR_OFFSET)
 #  define STM32_GPIOG_AFRL         (STM32_GPIOG_BASE+STM32_GPIO_AFRL_OFFSET)
 #  define STM32_GPIOG_AFRH         (STM32_GPIOG_BASE+STM32_GPIO_AFRH_OFFSET)
-#  define STM32_GPIOG_BRR          (STM32_GPIOG_BASE+STM32_GPIO_BRR_OFFSET)
 #endif
 
 #if STM32F7_NGPIO > 7
@@ -174,7 +166,6 @@
 #  define STM32_GPIOH_LCKR         (STM32_GPIOH_BASE+STM32_GPIO_LCKR_OFFSET)
 #  define STM32_GPIOH_AFRL         (STM32_GPIOH_BASE+STM32_GPIO_AFRL_OFFSET)
 #  define STM32_GPIOH_AFRH         (STM32_GPIOH_BASE+STM32_GPIO_AFRH_OFFSET)
-#  define STM32_GPIOH_BRR          (STM32_GPIOH_BASE+STM32_GPIO_BRR_OFFSET)
 #endif
 
 #if STM32F7_NGPIO > 8
@@ -188,7 +179,6 @@
 #  define STM32_GPIOI_LCKR         (STM32_GPIOI_BASE+STM32_GPIO_LCKR_OFFSET)
 #  define STM32_GPIOI_AFRL         (STM32_GPIOI_BASE+STM32_GPIO_AFRL_OFFSET)
 #  define STM32_GPIOI_AFRH         (STM32_GPIOI_BASE+STM32_GPIO_AFRH_OFFSET)
-#  define STM32_GPIOI_BRR          (STM32_GPIOI_BASE+STM32_GPIO_BRR_OFFSET)
 #endif
 
 #if STM32F7_NGPIO > 9
@@ -202,7 +192,6 @@
 #  define STM32_GPIOJ_LCKR         (STM32_GPIOJ_BASE+STM32_GPIO_LCKR_OFFSET)
 #  define STM32_GPIOJ_AFRL         (STM32_GPIOJ_BASE+STM32_GPIO_AFRL_OFFSET)
 #  define STM32_GPIOJ_AFRH         (STM32_GPIOJ_BASE+STM32_GPIO_AFRH_OFFSET)
-#  define STM32_GPIOJ_BRR          (STM32_GPIOJ_BASE+STM32_GPIO_BRR_OFFSET)
 #endif
 
 #if STM32F7_NGPIO > 10
@@ -216,7 +205,6 @@
 #  define STM32_GPIOK_LCKR         (STM32_GPIOK_BASE+STM32_GPIO_LCKR_OFFSET)
 #  define STM32_GPIOK_AFRL         (STM32_GPIOK_BASE+STM32_GPIO_AFRL_OFFSET)
 #  define STM32_GPIOK_AFRH         (STM32_GPIOK_BASE+STM32_GPIO_AFRH_OFFSET)
-#  define STM32_GPIOK_BRR          (STM32_GPIOK_BASE+STM32_GPIO_BRR_OFFSET)
 #endif
 
 /* Register Bitfield Definitions ****************************************************/
@@ -411,9 +399,5 @@
 #define GPIO_AFRH15_SHIFT          (28)
 #define GPIO_AFRH15_MASK           (15 << GPIO_AFRH15_SHIFT)
 
-/* GPIO port bit reset register */
-
-#define GPIO_BRR(n)                (1 << (n))
-
 #endif /* CONFIG_STM32F7_STM32F74XX || CONFIG_STM32F7_STM32F75XX */
 #endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XX75XX_GPIO_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_memorymap.h b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_memorymap.h
index 82a5d2242bc036c54485630992d9c2dc3745a972..889cf23192e98ec539b09377de48cd48cbe1bda0 100644
--- a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_memorymap.h
+++ b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_memorymap.h
@@ -2,7 +2,8 @@
  * arch/arm/src/stm3fr2/chip/stm32f74xxx75xxx_memorymap.h
  *
  *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -48,7 +49,7 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* STM32F40XXX Address Blocks *******************************************************/
+/* STM32F7XXXX STM32F75XXX Address Blocks *******************************************/
 
 #define STM32_CODE_BASE      0x00000000     /* 0x00000000-0x1fffffff: 512Mb code block */
 #define STM32_SRAM_BASE      0x20000000     /* 0x20000000-0x3fffffff: 512Mb sram block */
@@ -59,9 +60,8 @@
 #define STM32_FSMC_BASE34    0x80000000     /* 0x80000000-0x8fffffff: 512Mb FSMC bank3&4 block */
 #  define STM32_FSMC_BANK3   0x80000000     /* 0x80000000-0x8fffffff:       256Mb NAND FLASH */
 #  define STM32_FSMC_BANK4   0x90000000     /* 0x90000000-0x9fffffff:       256Mb PC CARD */
-#define STM32_AHB3_BASE      0xa0000000     /* 0xa0000000-0xa0001fff: 256Mb AHB3 peripheral block */
 #define STM32_FSMC_BASE5     0xc0000000     /* 0xc0000000-0xcfffffff: 256Mb FSMC */
-#define STM32_FSMC_BASE6     0xc0000000     /* 0xd0000000-0xdfffffff: 256Mb FSMC */
+#define STM32_FSMC_BASE6     0xd0000000     /* 0xd0000000-0xdfffffff: 256Mb FSMC */
 #define STM32_CORTEX_BASE    0xe0000000     /* 0xe0000000-0xffffffff: 512Mb Cortex-M7 block */
 
 #define STM32_REGION_MASK    0xf0000000
@@ -82,6 +82,7 @@
 
 
 #define STM32_SYSMEM_AXIM    0x1ff00000     /* 0x1ff00000-0x1ff0edbf: System memory (AXIM) */
+#define STM32_SYSMEM_UID     0x1ff0f420     /* The 96-bit unique device identifier */
 #define STM32_OTP_ICTM       0x0010f000     /* 0x0010f000-0x0010edbf: OTP (ITCM) */
 #define STM32_OTP_AXIM       0x1ff0f000     /* 0x1ff00000-0x1ff0f41f: OTP (AXIM) */
 
@@ -97,6 +98,7 @@
 #define STM32_APB2_BASE      0x40010000     /* 0x40010000-0x40016bff: APB2 */
 #define STM32_AHB1_BASE      0x40020000     /* 0x40020000-0x4007ffff: APB1 */
 #define STM32_AHB2_BASE      0x50000000     /* 0x50000000-0x5003ffff: AHB2 */
+#define STM32_AHB3_BASE      0x60000000     /* 0x60000000-0xdfffffff: AHB3 */
 
 /* APB1 Base Addresses **************************************************************/
 
@@ -142,6 +144,10 @@
 #define STM32_USART1_BASE    0x40011000     /* 0x40011000-0x400113ff: USART1 */
 #define STM32_USART6_BASE    0x40011400     /* 0x40011400-0x400117ff: USART6 */
 #define STM32_ADC_BASE       0x40012000     /* 0x40012000-0x400123ff: ADC1 - ADC2 - ADC3 */
+#  define STM32_ADC1_BASE    0x40012000     /*                        ADC1 */
+#  define STM32_ADC2_BASE    0x40012100     /*                        ADC2 */
+#  define STM32_ADC3_BASE    0x40012200     /*                        ADC3 */
+#  define STM32_ADCCMN_BASE  0x40012300     /*                        Common */
 #define STM32_SDMMC1_BASE    0x40012c00     /* 0x40012c00-0x40012fff: SDMMC1 */
 #define STM32_SPI1_BASE      0x40013000     /* 0x40013000-0x400133ff: SPI1 */
 #define STM32_SPI4_BASE      0x40013400     /* 0x40013400-0x400137ff: SPI4 */
@@ -203,5 +209,7 @@
  * address range
  */
 
+#define STM32_DEBUGMCU_BASE 0xe0042000
+ 
 #endif /* CONFIG_STM32F7_STM32F74XX || CONFIG_STM32F7_STM32F75XX */
 #endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XXX75XXX_MEMORYMAP_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_pinmap.h b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_pinmap.h
index 64b68653d188a853236f8107287e0e6c4b904f98..efc3b1c3d539eb43b6cfabacfc49a0277c7aea4e 100644
--- a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_pinmap.h
+++ b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_pinmap.h
@@ -2,7 +2,8 @@
  * arch/arm/src/stm32f7/chip/stm32f74xx75xx_pinmap.h
  *
  *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -50,7 +51,7 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* Alternate Pin Functions.  All members of the STM32F40xxx family share the same
+/* Alternate Pin Functions.  All members of the STM32F74|5xxx family share the same
  * pin multiplexing (although they may differ in the pins physically available).
  *
  * Alternative pin selections are provided with a numeric suffix like _1, _2, etc.
@@ -241,7 +242,6 @@
 #define GPIO_ETH_RMII_TXD0_2  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN13)
 #define GPIO_ETH_RMII_TXD1_1  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13)
 #define GPIO_ETH_RMII_TXD1_2  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN14)
-#define GPIO_ETH_RMII_TX_CLK  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN3)
 #define GPIO_ETH_RMII_TX_EN_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN11)
 #define GPIO_ETH_RMII_TX_EN_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN11)
 
diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_pwr.h b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_pwr.h
index e7c58b19ff57c720cad80b2dc006a79df8750aaa..547b555a92b61946bcec54eb3ec3e6824b5de7d2 100644
--- a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_pwr.h
+++ b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_pwr.h
@@ -1,8 +1,9 @@
 /************************************************************************************
- * arch/arm/src/stm32f7/chip/stm32_pwr.h
+ * arch/arm/src/stm32f7/chip/stm32f74xx75xx_pwr.h
  *
  *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -103,6 +104,7 @@
 #define PWR_CSR1_SBF            (1 << 1)  /* Bit 1:  Standby flag */
 #define PWR_CSR1_PVDO           (1 << 2)  /* Bit 2:  PVD Output */
 #define PWR_CSR1_BRR            (1 << 3)  /* Bit 3:  Backup regulator ready */
+#define PWR_CSR1_EIWUP          (1 << 8)  /* Bit 8:  Enable internal wakeup */
 #define PWR_CSR1_BRE            (1 << 9)  /* Bit 9:  Backup regulator enable */
 #define PWR_CSR1_VOSRDY         (1 << 14) /* Bit 14: Regulator voltage scaling output selection ready bite */
 #define PWR_CSR1_ODRDY          (1 << 16) /* Bit 16: Over Drive generator ready */
diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_rcc.h b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_rcc.h
index 0cdc92c7276b5aa3a080d3aea0bbfaeab91a26a1..f7bf4d122c1b5eafc8c2bfcac505ad733279061f 100644
--- a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_rcc.h
+++ b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_rcc.h
@@ -1,8 +1,9 @@
 /****************************************************************************************************
  * arch/arm/src/stm32f7/chip/stm32f74xx75xx_rcc.h
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -573,13 +574,13 @@
 #  define RCC_PLLI2SCFGR_PLLI2SN(n)  ((uint32_t)(n) << RCC_PLLI2SCFGR_PLLI2SN_SHIFT)
 #define RCC_PLLI2SCFGR_PLLI2SP_SHIFT (16)      /* Bits 16-17: PLLI2S division factor for SPDIFRX clock */
 #define RCC_PLLI2SCFGR_PLLI2SP_MASK  (3 << RCC_PLLI2SCFGR_PLLI2SP_SHIFT)
-#  define RCC_PLLI2SCFGR_PLLI2SP(n)  ((uint32_t)(n) << RCC_PLLI2SCFGR_PLLI2SP_SHIFT)
+#  define RCC_PLLI2SCFGR_PLLI2SP(n)  ((((n)>>1)-1) << RCC_PLLI2SCFGR_PLLI2SP_SHIFT)
 #define RCC_PLLI2SCFGR_PLLI2SQ_SHIFT (24)      /* Bits 24-27: PLLI2S division factor for SAIs clock */
 #define RCC_PLLI2SCFGR_PLLI2SQ_MASK  (15 << RCC_PLLI2SCFGR_PLLI2SQ_SHIFT)
 #  define RCC_PLLI2SCFGR_PLLI2SQ(n)  ((uint32_t)(n) << RCC_PLLI2SCFGR_PLLI2SQ_SHIFT)
 #define RCC_PLLI2SCFGR_PLLI2SR_SHIFT (28)      /* Bits 28-30: PLLI2S division factor for I2S clocks */
 #define RCC_PLLI2SCFGR_PLLI2SR_MASK  (7 << RCC_PLLI2SCFGR_PLLI2SR_SHIFT)
-#  define RCC_PLLI2SCFGR_PLLI2SR(n)  (uint32_t)(n) << RCC_PLLI2SCFGR_PLLI2SR_SHIFT)
+#  define RCC_PLLI2SCFGR_PLLI2SR(n)  ((uint32_t)(n) << RCC_PLLI2SCFGR_PLLI2SR_SHIFT)
 
 /* PLLSAI configuration register */
 
@@ -588,7 +589,7 @@
 #  define RCC_PLLSAICFGR_PLLSAIN(n)  ((n) << RCC_PLLSAICFGR_PLLSAIN_SHIFT)
 #define RCC_PLLSAICFGR_PLLSAIP_SHIFT (16)      /* Bits 16-17: PLLSAI division factor for 48MHz clock */
 #define RCC_PLLSAICFGR_PLLSAIP_MASK  (3 << RCC_PLLSAICFGR_PLLSAIP_SHIFT)
-#  define RCC_PLLSAICFGR_PLLSAIP(n)  ((n) << RCC_PLLSAICFGR_PLLSAIP_SHIFT)
+#  define RCC_PLLSAICFGR_PLLSAIP(n)  ((((n)>>1)-1) << RCC_PLLSAICFGR_PLLSAIP_SHIFT)
 #define RCC_PLLSAICFGR_PLLSAIQ_SHIFT (24)      /* Bits 24-27: PLLSAI division factor for SAI clock */
 #define RCC_PLLSAICFGR_PLLSAIQ_MASK  (0x0F << RCC_PLLSAICFGR_PLLSAIQ_SHIFT)
 #  define RCC_PLLSAICFGR_PLLSAIQ(n)  ((n) << RCC_PLLSAICFGR_PLLSAIQ_SHIFT)
@@ -616,7 +617,7 @@
 #define RCC_DCKCFGR1_SAI2SEL_SHIFT   (22)      /* Bits 22-23: SAI 2 clock source selection */
 #define RCC_DCKCFGR1_SAI2SEL_MASK    (0x3 << RCC_DCKCFGR1_SAI2SEL_SHIFT)
 #  define RCC_DCKCFGR1_SAI2SEL(n)    ((n) << RCC_DCKCFGR1_SAI2SEL_SHIFT)
-#define RCC_DCKCFGR1_TIMPRE          (1 << 24) /* Bit 24: Timer clock prescaler selection */
+#define RCC_DCKCFGR1_TIMPRESEL       (1 << 24) /* Bit 24: Timer clock prescaler selection */
 
 /* Dedicated clocks configuration register 2 */
 
diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_tim.h b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_tim.h
new file mode 100644
index 0000000000000000000000000000000000000000..eca76e95aaebad7f58717a1feedf673466b07417
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_tim.h
@@ -0,0 +1,1129 @@
+/****************************************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32f74xx75xx_tim.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XX75XX_TIM_H
+#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XX75XX_TIM_H
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+/* Register Offsets *********************************************************************************/
+
+/* Basic Timers - TIM6 and TIM7 */
+
+#define STM32_BTIM_CR1_OFFSET     0x0000  /* Control register 1 (16-bit) */
+#define STM32_BTIM_CR2_OFFSET     0x0004  /* Control register 2 (16-bit) */
+#define STM32_BTIM_DIER_OFFSET    0x000c  /* DMA/Interrupt enable register (16-bit) */
+#define STM32_BTIM_SR_OFFSET      0x0010  /* Status register (16-bit) */
+#define STM32_BTIM_EGR_OFFSET     0x0014  /* Event generation register (16-bit) */
+#define STM32_BTIM_CNT_OFFSET     0x0024  /* Counter (16-bit) */
+#define STM32_BTIM_PSC_OFFSET     0x0028  /* Prescaler (16-bit) */
+#define STM32_BTIM_ARR_OFFSET     0x002c  /* Auto-reload register (16-bit) */
+
+/* 16-/32-bit General Timers with DMA: TIM2, TM3, TIM4, and TIM5
+ * 16-bit General Timers without DMA: TIM9, TIM10, TIM11, TIM12, TIM13, and TIM14
+ * timers are 16-bit except for TIM2 and 5 are 32-bit
+ * timers TIM9 and 12 are different then  TIM10, TIM11, TIM13, and TIM14
+ */
+
+#define STM32_GTIM_CR1_OFFSET      0x0000  /* Control register 1 (16-bit) */
+#define STM32_GTIM_CR2_OFFSET      0x0004  /* Control register 2 (16-bit, TIM2, 5 only) */
+#define STM32_GTIM_SMCR_OFFSET     0x0008  /* Slave mode control register (32-bit, TIM2, 5, 9, 12 only) */
+#define STM32_GTIM_DIER_OFFSET     0x000c  /* DMA/Interrupt enable register (16-bit) */
+#define STM32_GTIM_SR_OFFSET       0x0010  /* Status register (16-bit) */
+#define STM32_GTIM_EGR_OFFSET      0x0014  /* Event generation register (16-bit) */
+#define STM32_GTIM_CCMR1_OFFSET    0x0018  /* Capture/compare mode register 1 (32-bit) */
+#define STM32_GTIM_CCMR2_OFFSET    0x001c  /* Capture/compare mode register 2 (32-bit on TIM2,5 only) */
+#define STM32_GTIM_CCER_OFFSET     0x0020  /* Capture/compare enable register (16-bit) */
+#define STM32_GTIM_CNT_OFFSET      0x0024  /* Counter (16 bit and 32-bit on TIM2, 5 only) */
+#define STM32_GTIM_PSC_OFFSET      0x0028  /* Prescaler (16-bit) */
+#define STM32_GTIM_ARR_OFFSET      0x002c  /* Auto-reload register (16 bit and 32-bit on TIM2, 5 only) */
+#define STM32_GTIM_CCR1_OFFSET     0x0034  /* Capture/compare register 1 (16-bit on all TIMx and 32-bit on TIM2,5 only) */
+#define STM32_GTIM_CCR2_OFFSET     0x0038  /* Capture/compare register 2 (16-bit TIM 3-4, 9, 12 and 32-bit on TIM2,5 only) */
+#define STM32_GTIM_CCR3_OFFSET     0x003c  /* Capture/compare register 3 (16-bit TIM 3-4 and 32-bit on TIM2,5 only) */
+#define STM32_GTIM_CCR4_OFFSET     0x0040  /* Capture/compare register 4 (16-bit TIM 3-4 and 32-bit on TIM2,5 only) */
+#define STM32_GTIM_DCR_OFFSET      0x0048  /* DMA control register (16-bit, TIM2-5 only) */
+#define STM32_GTIM_DMAR_OFFSET     0x004c  /* DMA address for burst mode (16-bit, TIM2-5 only) */
+#define STM32_GTIM_OR_OFFSET       0x0050  /* Timer 2/5/11 option register */
+
+/* Advanced Timers - TIM1 and TIM8 */
+
+#define STM32_ATIM_CR1_OFFSET      0x0000  /* Control register 1 (16-bit) */
+#define STM32_ATIM_CR2_OFFSET      0x0004  /* Control register 2 (32-bit*) */
+#define STM32_ATIM_SMCR_OFFSET     0x0008  /* Slave mode control register (32 -bit) */
+#define STM32_ATIM_DIER_OFFSET     0x000c  /* DMA/Interrupt enable register (16-bit) */
+#define STM32_ATIM_SR_OFFSET       0x0010  /* Status register (32-bit*) */
+#define STM32_ATIM_EGR_OFFSET      0x0014  /* Event generation register (16-bit) */
+#define STM32_ATIM_CCMR1_OFFSET    0x0018  /* Capture/compare mode register 1 (32-bit*) */
+#define STM32_ATIM_CCMR2_OFFSET    0x001c  /* Capture/compare mode register 2 (32-bit*) */
+#define STM32_ATIM_CCER_OFFSET     0x0020  /* Capture/compare enable register (32-bit*) */
+#define STM32_ATIM_CNT_OFFSET      0x0024  /* Counter (32-bit cnt in lower 16 bit ) */
+#define STM32_ATIM_PSC_OFFSET      0x0028  /* Prescaler (16-bit) */
+#define STM32_ATIM_ARR_OFFSET      0x002c  /* Auto-reload register (16-bit) */
+#define STM32_ATIM_RCR_OFFSET      0x0030  /* Repetition counter register (16-bit) */
+#define STM32_ATIM_CCR1_OFFSET     0x0034  /* Capture/compare register 1 (16-bit) */
+#define STM32_ATIM_CCR2_OFFSET     0x0038  /* Capture/compare register 2 (16-bit) */
+#define STM32_ATIM_CCR3_OFFSET     0x003c  /* Capture/compare register 3 (16-bit) */
+#define STM32_ATIM_CCR4_OFFSET     0x0040  /* Capture/compare register 4 (16-bit) */
+#define STM32_ATIM_BDTR_OFFSET     0x0044  /* Break and dead-time register (32-bit*) */
+#define STM32_ATIM_DCR_OFFSET      0x0048  /* DMA control register (16-bit) */
+#define STM32_ATIM_DMAR_OFFSET     0x004c  /* DMA address for burst mode (16-bit) */
+#define STM32_ATIM_CCMR3_OFFSET    0x0054  /* Capture/compare mode register 3 (32-bit) */
+#define STM32_ATIM_CCR5_OFFSET     0x0058  /* Capture/compare register 5 (32-bit) */
+#define STM32_ATIM_CCR6_OFFSET     0x005c  /* Capture/compare register 6 (16-bit) */
+
+/* Register Addresses *******************************************************************************/
+
+/* Advanced Timers - TIM1 and TIM8 */
+
+#if STM32F7_NATIM > 0
+#  define STM32_TIM1_CR1          (STM32_TIM1_BASE+STM32_ATIM_CR1_OFFSET)
+#  define STM32_TIM1_CR2          (STM32_TIM1_BASE+STM32_ATIM_CR2_OFFSET)
+#  define STM32_TIM1_SMCR         (STM32_TIM1_BASE+STM32_ATIM_SMCR_OFFSET)
+#  define STM32_TIM1_DIER         (STM32_TIM1_BASE+STM32_ATIM_DIER_OFFSET)
+#  define STM32_TIM1_SR           (STM32_TIM1_BASE+STM32_ATIM_SR_OFFSET)
+#  define STM32_TIM1_EGR          (STM32_TIM1_BASE+STM32_ATIM_EGR_OFFSET)
+#  define STM32_TIM1_CCMR1        (STM32_TIM1_BASE+STM32_ATIM_CCMR1_OFFSET)
+#  define STM32_TIM1_CCMR2        (STM32_TIM1_BASE+STM32_ATIM_CCMR2_OFFSET)
+#  define STM32_TIM1_CCER         (STM32_TIM1_BASE+STM32_ATIM_CCER_OFFSET)
+#  define STM32_TIM1_CNT          (STM32_TIM1_BASE+STM32_ATIM_CNT_OFFSET)
+#  define STM32_TIM1_PSC          (STM32_TIM1_BASE+STM32_ATIM_PSC_OFFSET)
+#  define STM32_TIM1_ARR          (STM32_TIM1_BASE+STM32_ATIM_ARR_OFFSET)
+#  define STM32_TIM1_RCR          (STM32_TIM1_BASE+STM32_ATIM_RCR_OFFSET)
+#  define STM32_TIM1_CCR1         (STM32_TIM1_BASE+STM32_ATIM_CCR1_OFFSET)
+#  define STM32_TIM1_CCR2         (STM32_TIM1_BASE+STM32_ATIM_CCR2_OFFSET)
+#  define STM32_TIM1_CCR3         (STM32_TIM1_BASE+STM32_ATIM_CCR3_OFFSET)
+#  define STM32_TIM1_CCR4         (STM32_TIM1_BASE+STM32_ATIM_CCR4_OFFSET)
+#  define STM32_TIM1_BDTR         (STM32_TIM1_BASE+STM32_ATIM_BDTR_OFFSET)
+#  define STM32_TIM1_DCR          (STM32_TIM1_BASE+STM32_ATIM_DCR_OFFSET)
+#  define STM32_TIM1_DMAR         (STM32_TIM1_BASE+STM32_ATIM_DMAR_OFFSET)
+#  define STM32_TIM1_CCMR3        (STM32_TIM1_BASE+STM32_ATIM_CCMR3_OFFSET)
+#  define STM32_TIM1_CCR5         (STM32_TIM1_BASE+STM32_ATIM_CCR5_OFFSET)
+#  define STM32_TIM1_CCR6         (STM32_TIM1_BASE+STM32_ATIM_CCR6_OFFSET)
+#endif
+
+#if STM32F7_NATIM > 1
+#  define STM32_TIM8_CR1          (STM32_TIM8_BASE+STM32_ATIM_CR1_OFFSET)
+#  define STM32_TIM8_CR2          (STM32_TIM8_BASE+STM32_ATIM_CR2_OFFSET)
+#  define STM32_TIM8_SMCR         (STM32_TIM8_BASE+STM32_ATIM_SMCR_OFFSET)
+#  define STM32_TIM8_DIER         (STM32_TIM8_BASE+STM32_ATIM_DIER_OFFSET)
+#  define STM32_TIM8_SR           (STM32_TIM8_BASE+STM32_ATIM_SR_OFFSET)
+#  define STM32_TIM8_EGR          (STM32_TIM8_BASE+STM32_ATIM_EGR_OFFSET)
+#  define STM32_TIM8_CCMR1        (STM32_TIM8_BASE+STM32_ATIM_CCMR1_OFFSET)
+#  define STM32_TIM8_CCMR2        (STM32_TIM8_BASE+STM32_ATIM_CCMR2_OFFSET)
+#  define STM32_TIM8_CCER         (STM32_TIM8_BASE+STM32_ATIM_CCER_OFFSET)
+#  define STM32_TIM8_CNT          (STM32_TIM8_BASE+STM32_ATIM_CNT_OFFSET)
+#  define STM32_TIM8_PSC          (STM32_TIM8_BASE+STM32_ATIM_PSC_OFFSET)
+#  define STM32_TIM8_ARR          (STM32_TIM8_BASE+STM32_ATIM_ARR_OFFSET)
+#  define STM32_TIM8_RCR          (STM32_TIM8_BASE+STM32_ATIM_RCR_OFFSET)
+#  define STM32_TIM8_CCR1         (STM32_TIM8_BASE+STM32_ATIM_CCR1_OFFSET)
+#  define STM32_TIM8_CCR2         (STM32_TIM8_BASE+STM32_ATIM_CCR2_OFFSET)
+#  define STM32_TIM8_CCR3         (STM32_TIM8_BASE+STM32_ATIM_CCR3_OFFSET)
+#  define STM32_TIM8_CCR4         (STM32_TIM8_BASE+STM32_ATIM_CCR4_OFFSET)
+#  define STM32_TIM8_BDTR         (STM32_TIM8_BASE+STM32_ATIM_BDTR_OFFSET)
+#  define STM32_TIM8_DCR          (STM32_TIM8_BASE+STM32_ATIM_DCR_OFFSET)
+#  define STM32_TIM8_DMAR         (STM32_TIM8_BASE+STM32_ATIM_DMAR_OFFSET)
+#  define STM32_TIM8_CCMR3        (STM32_TIM8_BASE+STM32_ATIM_CCMR3_OFFSET)
+#  define STM32_TIM8_CCR5         (STM32_TIM8_BASE+STM32_ATIM_CCR5_OFFSET)
+#  define STM32_TIM8_CCR6         (STM32_TIM8_BASE+STM32_ATIM_CCR6_OFFSET)
+#endif
+
+/* 16-/32-bit General Timers - TIM2, TIM3, TIM4, and TIM5 with DMA.
+ * All timers are 16-bit except for TIM2 and 5 are 32-bit
+ */
+
+#if (STM32F7_NGTIM16+STM32F7_NGTIM32) > 0
+#  define STM32_TIM2_CR1          (STM32_TIM2_BASE+STM32_GTIM_CR1_OFFSET)
+#  define STM32_TIM2_CR2          (STM32_TIM2_BASE+STM32_GTIM_CR2_OFFSET)
+#  define STM32_TIM2_SMCR         (STM32_TIM2_BASE+STM32_GTIM_SMCR_OFFSET)
+#  define STM32_TIM2_DIER         (STM32_TIM2_BASE+STM32_GTIM_DIER_OFFSET)
+#  define STM32_TIM2_SR           (STM32_TIM2_BASE+STM32_GTIM_SR_OFFSET)
+#  define STM32_TIM2_EGR          (STM32_TIM2_BASE+STM32_GTIM_EGR_OFFSET)
+#  define STM32_TIM2_CCMR1        (STM32_TIM2_BASE+STM32_GTIM_CCMR1_OFFSET)
+#  define STM32_TIM2_CCMR2        (STM32_TIM2_BASE+STM32_GTIM_CCMR2_OFFSET)
+#  define STM32_TIM2_CCER         (STM32_TIM2_BASE+STM32_GTIM_CCER_OFFSET)
+#  define STM32_TIM2_CNT          (STM32_TIM2_BASE+STM32_GTIM_CNT_OFFSET)
+#  define STM32_TIM2_PSC          (STM32_TIM2_BASE+STM32_GTIM_PSC_OFFSET)
+#  define STM32_TIM2_ARR          (STM32_TIM2_BASE+STM32_GTIM_ARR_OFFSET)
+#  define STM32_TIM2_CCR1         (STM32_TIM2_BASE+STM32_GTIM_CCR1_OFFSET)
+#  define STM32_TIM2_CCR2         (STM32_TIM2_BASE+STM32_GTIM_CCR2_OFFSET)
+#  define STM32_TIM2_CCR3         (STM32_TIM2_BASE+STM32_GTIM_CCR3_OFFSET)
+#  define STM32_TIM2_CCR4         (STM32_TIM2_BASE+STM32_GTIM_CCR4_OFFSET)
+#  define STM32_TIM2_DCR          (STM32_TIM2_BASE+STM32_GTIM_DCR_OFFSET)
+#  define STM32_TIM2_DMAR         (STM32_TIM2_BASE+STM32_GTIM_DMAR_OFFSET)
+#  define STM32_TIM2_OR           (STM32_TIM2_BASE+STM32_GTIM_OR_OFFSET)
+#endif
+
+#if (STM32F7_NGTIM16+STM32F7_NGTIM32) > 1
+#  define STM32_TIM3_CR1          (STM32_TIM3_BASE+STM32_GTIM_CR1_OFFSET)
+#  define STM32_TIM3_CR2          (STM32_TIM3_BASE+STM32_GTIM_CR2_OFFSET)
+#  define STM32_TIM3_SMCR         (STM32_TIM3_BASE+STM32_GTIM_SMCR_OFFSET)
+#  define STM32_TIM3_DIER         (STM32_TIM3_BASE+STM32_GTIM_DIER_OFFSET)
+#  define STM32_TIM3_SR           (STM32_TIM3_BASE+STM32_GTIM_SR_OFFSET)
+#  define STM32_TIM3_EGR          (STM32_TIM3_BASE+STM32_GTIM_EGR_OFFSET)
+#  define STM32_TIM3_CCMR1        (STM32_TIM3_BASE+STM32_GTIM_CCMR1_OFFSET)
+#  define STM32_TIM3_CCMR2        (STM32_TIM3_BASE+STM32_GTIM_CCMR2_OFFSET)
+#  define STM32_TIM3_CCER         (STM32_TIM3_BASE+STM32_GTIM_CCER_OFFSET)
+#  define STM32_TIM3_CNT          (STM32_TIM3_BASE+STM32_GTIM_CNT_OFFSET)
+#  define STM32_TIM3_PSC          (STM32_TIM3_BASE+STM32_GTIM_PSC_OFFSET)
+#  define STM32_TIM3_ARR          (STM32_TIM3_BASE+STM32_GTIM_ARR_OFFSET)
+#  define STM32_TIM3_CCR1         (STM32_TIM3_BASE+STM32_GTIM_CCR1_OFFSET)
+#  define STM32_TIM3_CCR2         (STM32_TIM3_BASE+STM32_GTIM_CCR2_OFFSET)
+#  define STM32_TIM3_CCR3         (STM32_TIM3_BASE+STM32_GTIM_CCR3_OFFSET)
+#  define STM32_TIM3_CCR4         (STM32_TIM3_BASE+STM32_GTIM_CCR4_OFFSET)
+#  define STM32_TIM3_DCR          (STM32_TIM3_BASE+STM32_GTIM_DCR_OFFSET)
+#  define STM32_TIM3_DMAR         (STM32_TIM3_BASE+STM32_GTIM_DMAR_OFFSET)
+#endif
+
+#if (STM32F7_NGTIM16+STM32F7_NGTIM32) > 2
+#  define STM32_TIM4_CR1          (STM32_TIM4_BASE+STM32_GTIM_CR1_OFFSET)
+#  define STM32_TIM4_CR2          (STM32_TIM4_BASE+STM32_GTIM_CR2_OFFSET)
+#  define STM32_TIM4_SMCR         (STM32_TIM4_BASE+STM32_GTIM_SMCR_OFFSET)
+#  define STM32_TIM4_DIER         (STM32_TIM4_BASE+STM32_GTIM_DIER_OFFSET)
+#  define STM32_TIM4_SR           (STM32_TIM4_BASE+STM32_GTIM_SR_OFFSET)
+#  define STM32_TIM4_EGR          (STM32_TIM4_BASE+STM32_GTIM_EGR_OFFSET)
+#  define STM32_TIM4_CCMR1        (STM32_TIM4_BASE+STM32_GTIM_CCMR1_OFFSET)
+#  define STM32_TIM4_CCMR2        (STM32_TIM4_BASE+STM32_GTIM_CCMR2_OFFSET)
+#  define STM32_TIM4_CCER         (STM32_TIM4_BASE+STM32_GTIM_CCER_OFFSET)
+#  define STM32_TIM4_CNT          (STM32_TIM4_BASE+STM32_GTIM_CNT_OFFSET)
+#  define STM32_TIM4_PSC          (STM32_TIM4_BASE+STM32_GTIM_PSC_OFFSET)
+#  define STM32_TIM4_ARR          (STM32_TIM4_BASE+STM32_GTIM_ARR_OFFSET)
+#  define STM32_TIM4_CCR1         (STM32_TIM4_BASE+STM32_GTIM_CCR1_OFFSET)
+#  define STM32_TIM4_CCR2         (STM32_TIM4_BASE+STM32_GTIM_CCR2_OFFSET)
+#  define STM32_TIM4_CCR3         (STM32_TIM4_BASE+STM32_GTIM_CCR3_OFFSET)
+#  define STM32_TIM4_CCR4         (STM32_TIM4_BASE+STM32_GTIM_CCR4_OFFSET)
+#  define STM32_TIM4_DCR          (STM32_TIM4_BASE+STM32_GTIM_DCR_OFFSET)
+#  define STM32_TIM4_DMAR         (STM32_TIM4_BASE+STM32_GTIM_DMAR_OFFSET)
+#endif
+
+#if (STM32F7_NGTIM16+STM32F7_NGTIM32) > 3
+#  define STM32_TIM5_CR1          (STM32_TIM5_BASE+STM32_GTIM_CR1_OFFSET)
+#  define STM32_TIM5_CR2          (STM32_TIM5_BASE+STM32_GTIM_CR2_OFFSET)
+#  define STM32_TIM5_SMCR         (STM32_TIM5_BASE+STM32_GTIM_SMCR_OFFSET)
+#  define STM32_TIM5_DIER         (STM32_TIM5_BASE+STM32_GTIM_DIER_OFFSET)
+#  define STM32_TIM5_SR           (STM32_TIM5_BASE+STM32_GTIM_SR_OFFSET)
+#  define STM32_TIM5_EGR          (STM32_TIM5_BASE+STM32_GTIM_EGR_OFFSET)
+#  define STM32_TIM5_CCMR1        (STM32_TIM5_BASE+STM32_GTIM_CCMR1_OFFSET)
+#  define STM32_TIM5_CCMR2        (STM32_TIM5_BASE+STM32_GTIM_CCMR2_OFFSET)
+#  define STM32_TIM5_CCER         (STM32_TIM5_BASE+STM32_GTIM_CCER_OFFSET)
+#  define STM32_TIM5_CNT          (STM32_TIM5_BASE+STM32_GTIM_CNT_OFFSET)
+#  define STM32_TIM5_PSC          (STM32_TIM5_BASE+STM32_GTIM_PSC_OFFSET)
+#  define STM32_TIM5_ARR          (STM32_TIM5_BASE+STM32_GTIM_ARR_OFFSET)
+#  define STM32_TIM5_CCR1         (STM32_TIM5_BASE+STM32_GTIM_CCR1_OFFSET)
+#  define STM32_TIM5_CCR2         (STM32_TIM5_BASE+STM32_GTIM_CCR2_OFFSET)
+#  define STM32_TIM5_CCR3         (STM32_TIM5_BASE+STM32_GTIM_CCR3_OFFSET)
+#  define STM32_TIM5_CCR4         (STM32_TIM5_BASE+STM32_GTIM_CCR4_OFFSET)
+#  define STM32_TIM5_DCR          (STM32_TIM5_BASE+STM32_GTIM_DCR_OFFSET)
+#  define STM32_TIM5_DMAR         (STM32_TIM5_BASE+STM32_GTIM_DMAR_OFFSET)
+#  define STM32_TIM5_OR           (STM32_TIM5_BASE+STM32_GTIM_OR_OFFSET)
+#endif
+
+
+/* 16-bit General Timers - TIM9-14 without DMA.  Note that (1) these timers
+ * support only a subset of the general timer registers are supported, and
+ * (2) TIM9 and TIM12 differ from the others.
+ */
+
+#if STM32F7_NGTIMNDMA > 0
+#  define STM32_TIM9_CR1          (STM32_TIM9_BASE+STM32_GTIM_CR1_OFFSET)
+#  define STM32_TIM9_CR2          (STM32_TIM9_BASE+STM32_GTIM_CR2_OFFSET)
+#  define STM32_TIM9_DIER         (STM32_TIM9_BASE+STM32_GTIM_DIER_OFFSET)
+#  define STM32_TIM9_SR           (STM32_TIM9_BASE+STM32_GTIM_SR_OFFSET)
+#  define STM32_TIM9_EGR          (STM32_TIM9_BASE+STM32_GTIM_EGR_OFFSET)
+#  define STM32_TIM9_CCMR1        (STM32_TIM9_BASE+STM32_GTIM_CCMR1_OFFSET)
+#  define STM32_TIM9_CCER         (STM32_TIM9_BASE+STM32_GTIM_CCER_OFFSET)
+#  define STM32_TIM9_CNT          (STM32_TIM9_BASE+STM32_GTIM_CNT_OFFSET)
+#  define STM32_TIM9_PSC          (STM32_TIM9_BASE+STM32_GTIM_PSC_OFFSET)
+#  define STM32_TIM9_ARR          (STM32_TIM9_BASE+STM32_GTIM_ARR_OFFSET)
+#  define STM32_TIM9_CCR1         (STM32_TIM9_BASE+STM32_GTIM_CCR1_OFFSET)
+#  define STM32_TIM9_CCR2         (STM32_TIM9_BASE+STM32_GTIM_CCR2_OFFSET)
+#endif
+
+#if STM32F7_NGTIMNDMA > 1
+#  define STM32_TIM10_CR1         (STM32_TIM10_BASE+STM32_GTIM_CR1_OFFSET)
+#  define STM32_TIM10_DIER        (STM32_TIM10_BASE+STM32_GTIM_DIER_OFFSET)
+#  define STM32_TIM10_SR          (STM32_TIM10_BASE+STM32_GTIM_SR_OFFSET)
+#  define STM32_TIM10_EGR         (STM32_TIM10_BASE+STM32_GTIM_EGR_OFFSET)
+#  define STM32_TIM10_CCMR1       (STM32_TIM10_BASE+STM32_GTIM_CCMR1_OFFSET)
+#  define STM32_TIM10_CCER        (STM32_TIM10_BASE+STM32_GTIM_CCER_OFFSET)
+#  define STM32_TIM10_CNT         (STM32_TIM10_BASE+STM32_GTIM_CNT_OFFSET)
+#  define STM32_TIM10_PSC         (STM32_TIM10_BASE+STM32_GTIM_PSC_OFFSET)
+#  define STM32_TIM10_ARR         (STM32_TIM10_BASE+STM32_GTIM_ARR_OFFSET)
+#  define STM32_TIM10_CCR1        (STM32_TIM10_BASE+STM32_GTIM_CCR1_OFFSET)
+#endif
+
+#if STM32F7_NGTIMNDMA > 2
+#  define STM32_TIM11_CR1         (STM32_TIM11_BASE+STM32_GTIM_CR1_OFFSET)
+#  define STM32_TIM11_DIER        (STM32_TIM11_BASE+STM32_GTIM_DIER_OFFSET)
+#  define STM32_TIM11_SR          (STM32_TIM11_BASE+STM32_GTIM_SR_OFFSET)
+#  define STM32_TIM11_EGR         (STM32_TIM11_BASE+STM32_GTIM_EGR_OFFSET)
+#  define STM32_TIM11_CCMR1       (STM32_TIM11_BASE+STM32_GTIM_CCMR1_OFFSET)
+#  define STM32_TIM11_CCER        (STM32_TIM11_BASE+STM32_GTIM_CCER_OFFSET)
+#  define STM32_TIM11_CNT         (STM32_TIM11_BASE+STM32_GTIM_CNT_OFFSET)
+#  define STM32_TIM11_PSC         (STM32_TIM11_BASE+STM32_GTIM_PSC_OFFSET)
+#  define STM32_TIM11_ARR         (STM32_TIM11_BASE+STM32_GTIM_ARR_OFFSET)
+#  define STM32_TIM11_CCR1        (STM32_TIM11_BASE+STM32_GTIM_CCR1_OFFSET)
+#  define STM32_TIM11_OR          (STM32_TIM11_BASE+STM32_GTIM_OR_OFFSET)
+#endif
+
+#if STM32F7_NGTIMNDMA > 3
+#  define STM32_TIM12_CR1         (STM32_TIM12_BASE+STM32_GTIM_CR1_OFFSET)
+#  define STM32_TIM12_CR2         (STM32_TIM9_BASE+STM32_GTIM_CR2_OFFSET)
+#  define STM32_TIM12_DIER        (STM32_TIM12_BASE+STM32_GTIM_DIER_OFFSET)
+#  define STM32_TIM12_SR          (STM32_TIM12_BASE+STM32_GTIM_SR_OFFSET)
+#  define STM32_TIM12_EGR         (STM32_TIM12_BASE+STM32_GTIM_EGR_OFFSET)
+#  define STM32_TIM12_CCMR1       (STM32_TIM12_BASE+STM32_GTIM_CCMR1_OFFSET)
+#  define STM32_TIM12_CCER        (STM32_TIM12_BASE+STM32_GTIM_CCER_OFFSET)
+#  define STM32_TIM12_CNT         (STM32_TIM12_BASE+STM32_GTIM_CNT_OFFSET)
+#  define STM32_TIM12_PSC         (STM32_TIM12_BASE+STM32_GTIM_PSC_OFFSET)
+#  define STM32_TIM12_ARR         (STM32_TIM12_BASE+STM32_GTIM_ARR_OFFSET)
+#  define STM32_TIM12_CCR1        (STM32_TIM12_BASE+STM32_GTIM_CCR1_OFFSET)
+#  define STM32_TIM12_CCR2        (STM32_TIM12_BASE+STM32_GTIM_CCR2_OFFSET)
+#endif
+
+#if STM32F7_NGTIMNDMA > 4
+#  define STM32_TIM13_CR1         (STM32_TIM13_BASE+STM32_GTIM_CR1_OFFSET)
+#  define STM32_TIM13_DIER        (STM32_TIM13_BASE+STM32_GTIM_DIER_OFFSET)
+#  define STM32_TIM13_SR          (STM32_TIM13_BASE+STM32_GTIM_SR_OFFSET)
+#  define STM32_TIM13_EGR         (STM32_TIM13_BASE+STM32_GTIM_EGR_OFFSET)
+#  define STM32_TIM13_CCMR1       (STM32_TIM13_BASE+STM32_GTIM_CCMR1_OFFSET)
+#  define STM32_TIM13_CCER        (STM32_TIM13_BASE+STM32_GTIM_CCER_OFFSET)
+#  define STM32_TIM13_CNT         (STM32_TIM13_BASE+STM32_GTIM_CNT_OFFSET)
+#  define STM32_TIM13_PSC         (STM32_TIM13_BASE+STM32_GTIM_PSC_OFFSET)
+#  define STM32_TIM13_ARR         (STM32_TIM13_BASE+STM32_GTIM_ARR_OFFSET)
+#  define STM32_TIM13_CCR1        (STM32_TIM13_BASE+STM32_GTIM_CCR1_OFFSET)
+#endif
+
+#if STM32F7_NGTIMNDMA > 5
+#  define STM32_TIM14_CR1         (STM32_TIM14_BASE+STM32_GTIM_CR1_OFFSET)
+#  define STM32_TIM14_DIER        (STM32_TIM14_BASE+STM32_GTIM_DIER_OFFSET)
+#  define STM32_TIM14_SR          (STM32_TIM14_BASE+STM32_GTIM_SR_OFFSET)
+#  define STM32_TIM14_EGR         (STM32_TIM14_BASE+STM32_GTIM_EGR_OFFSET)
+#  define STM32_TIM14_CCMR1       (STM32_TIM14_BASE+STM32_GTIM_CCMR1_OFFSET)
+#  define STM32_TIM14_CCER        (STM32_TIM14_BASE+STM32_GTIM_CCER_OFFSET)
+#  define STM32_TIM14_CNT         (STM32_TIM14_BASE+STM32_GTIM_CNT_OFFSET)
+#  define STM32_TIM14_PSC         (STM32_TIM14_BASE+STM32_GTIM_PSC_OFFSET)
+#  define STM32_TIM14_ARR         (STM32_TIM14_BASE+STM32_GTIM_ARR_OFFSET)
+#  define STM32_TIM14_CCR1        (STM32_TIM14_BASE+STM32_GTIM_CCR1_OFFSET)
+#endif
+
+/* Basic Timers - TIM6 and TIM7 */
+
+#if STM32F7_NBTIM > 0
+#  define STM32_TIM6_CR1          (STM32_TIM6_BASE+STM32_BTIM_CR1_OFFSET)
+#  define STM32_TIM6_CR2          (STM32_TIM6_BASE+STM32_BTIM_CR2_OFFSET)
+#  define STM32_TIM6_DIER         (STM32_TIM6_BASE+STM32_BTIM_DIER_OFFSET)
+#  define STM32_TIM6_SR           (STM32_TIM6_BASE+STM32_BTIM_SR_OFFSET)
+#  define STM32_TIM6_EGR          (STM32_TIM6_BASE+STM32_BTIM_EGR_OFFSET)
+#  define STM32_TIM6_CNT          (STM32_TIM6_BASE+STM32_BTIM_CNT_OFFSET)
+#  define STM32_TIM6_PSC          (STM32_TIM6_BASE+STM32_BTIM_PSC_OFFSET)
+#  define STM32_TIM6_ARR          (STM32_TIM6_BASE+STM32_BTIM_ARR_OFFSET)
+#endif
+
+#if STM32F7_NBTIM > 1
+#  define STM32_TIM7_CR1          (STM32_TIM7_BASE+STM32_BTIM_CR1_OFFSET)
+#  define STM32_TIM7_CR2          (STM32_TIM7_BASE+STM32_BTIM_CR2_OFFSET)
+#  define STM32_TIM7_DIER         (STM32_TIM7_BASE+STM32_BTIM_DIER_OFFSET)
+#  define STM32_TIM7_SR           (STM32_TIM7_BASE+STM32_BTIM_SR_OFFSET)
+#  define STM32_TIM7_EGR          (STM32_TIM7_BASE+STM32_BTIM_EGR_OFFSET)
+#  define STM32_TIM7_CNT          (STM32_TIM7_BASE+STM32_BTIM_CNT_OFFSET)
+#  define STM32_TIM7_PSC          (STM32_TIM7_BASE+STM32_BTIM_PSC_OFFSET)
+#  define STM32_TIM7_ARR          (STM32_TIM7_BASE+STM32_BTIM_ARR_OFFSET)
+#endif
+
+/* Register Bitfield Definitions ********************************************************************/
+
+/* Control register 1 */
+
+#define ATIM_CR1_CEN              (1 << 0)  /* Bit 0: Counter enable */
+#define ATIM_CR1_UDIS             (1 << 1)  /* Bit 1: Update disable */
+#define ATIM_CR1_URS              (1 << 2)  /* Bit 2: Update request source */
+#define ATIM_CR1_OPM              (1 << 3)  /* Bit 3: One pulse mode */
+#define ATIM_CR1_DIR              (1 << 4)  /* Bit 4: Direction */
+#define ATIM_CR1_CMS_SHIFT        (5)       /* Bits 6-5: Center-aligned mode selection */
+#define ATIM_CR1_CMS_MASK         (3 << ATIM_CR1_CMS_SHIFT)
+#  define ATIM_CR1_EDGE           (0 << ATIM_CR1_CMS_SHIFT) /* 00: Edge-aligned mode */
+#  define ATIM_CR1_CENTER1        (1 << ATIM_CR1_CMS_SHIFT) /* 01: Center-aligned mode 1 */
+#  define ATIM_CR1_CENTER2        (2 << ATIM_CR1_CMS_SHIFT) /* 10: Center-aligned mode 2 */
+#  define ATIM_CR1_CENTER3        (3 << ATIM_CR1_CMS_SHIFT) /* 11: Center-aligned mode 3 */
+#define ATIM_CR1_ARPE             (1 << 7)  /* Bit 7: Auto-reload preload enable */
+#define ATIM_CR1_CKD_SHIFT        (8)       /* Bits 9-8: Clock division */
+#define ATIM_CR1_CKD_MASK         (3 << ATIM_CR1_CKD_SHIFT)
+#  define ATIM_CR1_TCKINT         (0 << ATIM_CR1_CKD_SHIFT) /* 00: tDTS=tCK_INT */
+#  define ATIM_CR1_2TCKINT        (1 << ATIM_CR1_CKD_SHIFT) /* 01: tDTS=2*tCK_INT */
+#  define ATIM_CR1_4TCKINT        (2 << ATIM_CR1_CKD_SHIFT) /* 10: tDTS=4*tCK_INT */
+#define ATIM_CR1_UIFREMAP         (1 << 11) /* Bit 11: UIF status bit remapping */
+
+/* Control register 2 */
+
+#define ATIM_CR2_CCPC             (1 << 0)  /* Bit 0:  Capture/Compare Preloaded Control */
+#define ATIM_CR2_CCUS             (1 << 2)  /* Bit 2:  Capture/Compare Control Update Selection */
+#define ATIM_CR2_CCDS             (1 << 3)  /* Bit 3:  Capture/Compare DMA Selection */
+#define ATIM_CR2_MMS_SHIFT        (4)       /* Bits 6-4: Master Mode Selection */
+#define ATIM_CR2_MMS_MASK         (7 << ATIM_CR2_MMS_SHIFT)
+#  define ATIM_CR2_MMS_RESET      (0 << ATIM_CR2_MMS_SHIFT) /* 000: Reset - TIMx_EGR UG bit is TRGO */
+#  define ATIM_CR2_MMS_ENABLE     (1 << ATIM_CR2_MMS_SHIFT) /* 001: Enable - CNT_EN is TRGO */
+#  define ATIM_CR2_MMS_UPDATE     (2 << ATIM_CR2_MMS_SHIFT) /* 010: Update event is TRGO */
+#  define ATIM_CR2_MMS_COMPP      (3 << ATIM_CR2_MMS_SHIFT) /* 010: Compare Pulse - CC1IF flag */
+#  define ATIM_CR2_MMS_OC1REF     (4 << ATIM_CR2_MMS_SHIFT) /* 100: Compare OC1REF is TRGO */
+#  define ATIM_CR2_MMS_OC2REF     (5 << ATIM_CR2_MMS_SHIFT) /* 101: Compare OC2REF is TRGO */
+#  define ATIM_CR2_MMS_OC3REF     (6 << ATIM_CR2_MMS_SHIFT) /* 110: Compare OC3REF is TRGO */
+#  define ATIM_CR2_MMS_OC4REF     (7 << ATIM_CR2_MMS_SHIFT) /* 111: Compare OC4REF is TRGO */
+#define ATIM_CR2_TI1S             (1 << 7)  /* Bit 7: TI1 Selection */
+#define ATIM_CR2_OIS1             (1 << 8)  /* Bit 8:  Output Idle state 1 (OC1 output) */
+#define ATIM_CR2_OIS1N            (1 << 9)  /* Bit 9:  Output Idle state 1 (OC1N output) */
+#define ATIM_CR2_OIS2             (1 << 10) /* Bit 10: Output Idle state 2 (OC2 output) */
+#define ATIM_CR2_OIS2N            (1 << 11) /* Bit 11: Output Idle state 2 (OC2N output) */
+#define ATIM_CR2_OIS3             (1 << 12) /* Bit 12: Output Idle state 3 (OC3 output) */
+#define ATIM_CR2_OIS3N            (1 << 13) /* Bit 13: Output Idle state 3 (OC3N output) */
+#define ATIM_CR2_OIS4             (1 << 14) /* Bit 14: Output Idle state 4 (OC4 output) */
+#define ATIM_CR2_OIS5             (1 << 16) /* Bit 16: OOutput Idle state 5 (OC5 output) */
+#define ATIM_CR2_OIS6             (1 << 18) /* Bit 18: Output Idle state 6 (OC6 output) */
+#define ATIM_CR2_MMS2_SHIFT       (20)      /* Bits 20-23: Master Mode Selection 2 */
+#define ATIM_CR2_MMS2_MASK        (15 << ATIM_CR2_MMS2_SHIFT)
+#  define ATIM_CR2_MMS2_RESET     (0 << ATIM_CR2_MMS2_SHIFT)  /* 0000: Reset - TIMx_EGR UG bit is TRG9 */
+#  define ATIM_CR2_MMS2_ENABLE    (1 << ATIM_CR2_MMS2_SHIFT)  /* 0001: Enable - CNT_EN is TRGO2 */
+#  define ATIM_CR2_MMS2_UPDATE    (2 << ATIM_CR2_MMS2_SHIFT)  /* 0010: Update event is TRGH0*/
+#  define ATIM_CR2_MMS2_COMPP     (3 << ATIM_CR2_MMS2_SHIFT)  /* 0010: Compare Pulse - CC1IF flag */
+#  define ATIM_CR2_MMS2_OC1REF    (4 << ATIM_CR2_MMS2_SHIFT)  /* 0100: Compare OC1REF is TRGO2 */
+#  define ATIM_CR2_MMS2_OC2REF    (5 << ATIM_CR2_MMS2_SHIFT)  /* 0101: Compare OC2REF is TRGO2 */
+#  define ATIM_CR2_MMS2_OC3REF    (6 << ATIM_CR2_MMS2_SHIFT)  /* 0110: Compare OC3REF is TRGO2 */
+#  define ATIM_CR2_MMS2_OC4REF    (7 << ATIM_CR2_MMS2_SHIFT)  /* 0111: Compare OC4REF is TRGO2 */
+#  define ATIM_CR2_MMS2_OC5REF    (8 << ATIM_CR2_MMS2_SHIFT)  /* 1000: Compare OC5REF is TRGO2 */
+#  define ATIM_CR2_MMS2_OC6REF    (9 << ATIM_CR2_MMS2_SHIFT)  /* 1001: Compare OC6REF is TRGO2 */
+#  define ATIM_CR2_MMS2_CMPOC4    (10 << ATIM_CR2_MMS2_SHIFT) /* 1010: Compare pulse - OC4REF edge is TRGO2 */
+#  define ATIM_CR2_MMS2_CMPOC6    (11 << ATIM_CR2_MMS2_SHIFT) /* 1011: Compare pulse - OC6REF edge is TRGO2 */
+#  define ATIM_CR2_MMS2_CMPOC4R6R (12 << ATIM_CR2_MMS2_SHIFT) /* 1100: Compare pulse - OC4REF/OC6REF rising */
+#  define ATIM_CR2_MMS2_CMPOC4R6F (13 << ATIM_CR2_MMS2_SHIFT) /* 1101: Compare pulse - OC4REF rising/OC6REF falling */
+#  define ATIM_CR2_MMS2_CMPOC5R6R (14 << ATIM_CR2_MMS2_SHIFT) /* 1110: Compare pulse - OC5REF/OC6REF rising */
+#  define ATIM_CR2_MMS2_CMPOC5R6F (15 << ATIM_CR2_MMS2_SHIFT) /* 1111: Compare pulse - OC5REF rising/OC6REF falling */
+
+/* Slave mode control register */
+
+#define ATIM_SMCR_SMS_SHIFT       (0)       /* Bits 0-2: Slave mode selection */
+#define ATIM_SMCR_SMS_MASK        (7 << ATIM_SMCR_SMS_SHIFT)
+#  define ATIM_SMCR_DISAB         (0 << ATIM_SMCR_SMS_SHIFT) /* 000: Slave mode disabled */
+#  define ATIM_SMCR_ENCMD1        (1 << ATIM_SMCR_SMS_SHIFT) /* 001: Encoder mode 1 */
+#  define ATIM_SMCR_ENCMD2        (2 << ATIM_SMCR_SMS_SHIFT) /* 010: Encoder mode 2 */
+#  define ATIM_SMCR_ENCMD3        (3 << ATIM_SMCR_SMS_SHIFT) /* 011: Encoder mode 3 */
+#  define ATIM_SMCR_RESET         (4 << ATIM_SMCR_SMS_SHIFT) /* 100: Reset Mode */
+#  define ATIM_SMCR_GATED         (5 << ATIM_SMCR_SMS_SHIFT) /* 101: Gated Mode */
+#  define ATIM_SMCR_TRIGGER       (6 << ATIM_SMCR_SMS_SHIFT) /* 110: Trigger Mode */
+#  define ATIM_SMCR_EXTCLK1       (7 << ATIM_SMCR_SMS_SHIFT) /* 111: External Clock Mode 1 */
+#define ATIM_SMCR_TS_SHIFT        (4)       /* Bits 4-6: Trigger selection */
+#define ATIM_SMCR_TS_MASK         (7 << ATIM_SMCR_TS_SHIFT)
+#  define ATIM_SMCR_ITR0          (0 << ATIM_SMCR_TS_SHIFT) /* 000: Internal trigger 0 (ITR0) */
+#  define ATIM_SMCR_ITR1          (1 << ATIM_SMCR_TS_SHIFT) /* 001: Internal trigger 1 (ITR1) */
+#  define ATIM_SMCR_ITR2          (2 << ATIM_SMCR_TS_SHIFT) /* 010: Internal trigger 2 (ITR2) */
+#  define ATIM_SMCR_ITR3          (3 << ATIM_SMCR_TS_SHIFT) /* 011: Internal trigger 3 (ITR3) */
+#  define ATIM_SMCR_T1FED         (4 << ATIM_SMCR_TS_SHIFT) /* 100: TI1 Edge Detector (TI1F_ED) */
+#  define ATIM_SMCR_TI1FP1        (5 << ATIM_SMCR_TS_SHIFT) /* 101: Filtered Timer Input 1 (TI1FP1) */
+#  define ATIM_SMCR_T12FP2        (6 << ATIM_SMCR_TS_SHIFT) /* 110: Filtered Timer Input 2 (TI2FP2) */
+#  define ATIM_SMCR_ETRF          (7 << ATIM_SMCR_TS_SHIFT) /* 111: External Trigger input (ETRF) */
+#define ATIM_SMCR_MSM             (1 << 7)  /* Bit 7: Master/slave mode */
+#define ATIM_SMCR_ETF_SHIFT       (8)       /* Bits 8-11: External trigger filter */
+#define ATIM_SMCR_ETF_MASK        (0x0f << ATIM_SMCR_ETF_SHIFT)
+#  define ATIM_SMCR_NOFILT        (0 << ATIM_SMCR_ETF_SHIFT) /* 0000: No filter, sampling is done at fDTS */
+#  define ATIM_SMCR_FCKINT2       (1 << ATIM_SMCR_ETF_SHIFT) /* 0001: fSAMPLING=fCK_INT, N=2 */
+#  define ATIM_SMCR_FCKINT4       (2 << ATIM_SMCR_ETF_SHIFT) /* 0010: fSAMPLING=fCK_INT, N=4 */
+#  define ATIM_SMCR_FCKINT8       (3 << ATIM_SMCR_ETF_SHIFT) /* 0011: fSAMPLING=fCK_INT, N=8 */
+#  define ATIM_SMCR_FDTSd26       (4 << ATIM_SMCR_ETF_SHIFT) /* 0100: fSAMPLING=fDTS/2, N=6 */
+#  define ATIM_SMCR_FDTSd28       (5 << ATIM_SMCR_ETF_SHIFT) /* 0101: fSAMPLING=fDTS/2, N=8 */
+#  define ATIM_SMCR_FDTSd46       (6 << ATIM_SMCR_ETF_SHIFT) /* 0110: fSAMPLING=fDTS/4, N=6 */
+#  define ATIM_SMCR_FDTSd48       (7 << ATIM_SMCR_ETF_SHIFT) /* 0111: fSAMPLING=fDTS/4, N=8 */
+#  define ATIM_SMCR_FDTSd86       (8 << ATIM_SMCR_ETF_SHIFT) /* 1000: fSAMPLING=fDTS/8, N=6 */
+#  define ATIM_SMCR_FDTSd88       (9 << ATIM_SMCR_ETF_SHIFT) /* 1001: fSAMPLING=fDTS/8, N=8 */
+#  define ATIM_SMCR_FDTSd165      (10 << ATIM_SMCR_ETF_SHIFT) /* 1010: fSAMPLING=fDTS/16, N=5 */
+#  define ATIM_SMCR_FDTSd166      (11 << ATIM_SMCR_ETF_SHIFT) /* 1011: fSAMPLING=fDTS/16, N=6 */
+#  define ATIM_SMCR_FDTSd168      (12 << ATIM_SMCR_ETF_SHIFT) /* 1100: fSAMPLING=fDTS/16, N=8 */
+#  define ATIM_SMCR_FDTSd325      (13 << ATIM_SMCR_ETF_SHIFT) /* 1101: fSAMPLING=fDTS/32, N=5 */
+#  define ATIM_SMCR_FDTSd326      (14 << ATIM_SMCR_ETF_SHIFT) /* 1110: fSAMPLING=fDTS/32, N=6 */
+#  define ATIM_SMCR_FDTSd328      (15 << ATIM_SMCR_ETF_SHIFT) /* 1111: fSAMPLING=fDTS/32, N=8 */
+#define ATIM_SMCR_ETPS_SHIFT      (12)      /* Bits 12-13: External trigger prescaler */
+#define ATIM_SMCR_ETPS_MASK       (3 << ATIM_SMCR_ETPS_SHIFT)
+#  define ATIM_SMCR_PSCOFF        (0 << ATIM_SMCR_ETPS_SHIFT) /* 00: Prescaler OFF */
+#  define ATIM_SMCR_ETRPd2        (1 << ATIM_SMCR_ETPS_SHIFT) /* 01: ETRP frequency divided by 2 */
+#  define ATIM_SMCR_ETRPd4        (2 << ATIM_SMCR_ETPS_SHIFT) /* 10: ETRP frequency divided by 4 */
+#  define ATIM_SMCR_ETRPd8        (3 << ATIM_SMCR_ETPS_SHIFT) /* 11: ETRP frequency divided by 8 */
+#define ATIM_SMCR_ECE             (1 << 14) /* Bit 14: External clock enable */
+#define ATIM_SMCR_ETP             (1 << 15) /* Bit 15: External trigger polarity */
+#define ATIM_SMCR_SMS             (1 << 16) /* Bit 16: Slave mode selection - bit 3 */
+
+/* DMA/Interrupt enable register */
+
+#define ATIM_DIER_UIE             (1 << 0)  /* Bit 0: Update interrupt enable */
+#define ATIM_DIER_CC1IE           (1 << 1)  /* Bit 1: Capture/Compare 1 interrupt enable */
+#define ATIM_DIER_CC2IE           (1 << 2)  /* Bit 2: Capture/Compare 2 interrupt enable */
+#define ATIM_DIER_CC3IE           (1 << 3)  /* Bit 3: Capture/Compare 3 interrupt enable */
+#define ATIM_DIER_CC4IE           (1 << 4)  /* Bit 4: Capture/Compare 4 interrupt enable */
+#define ATIM_DIER_COMIE           (1 << 5)  /* Bit 5: COM interrupt enable */
+#define ATIM_DIER_TIE             (1 << 6)  /* Bit 6: Trigger interrupt enable */
+#define ATIM_DIER_BIE             (1 << 7)  /* Bit 7: Break interrupt enable */
+#define ATIM_DIER_UDE             (1 << 8)  /* Bit 8: Update DMA request enable */
+#define ATIM_DIER_CC1DE           (1 << 9)  /* Bit 9: Capture/Compare 1 DMA request enable */
+#define ATIM_DIER_CC2DE           (1 << 10) /* Bit 10: Capture/Compare 2 DMA request enable */
+#define ATIM_DIER_CC3DE           (1 << 11) /* Bit 11: Capture/Compare 3 DMA request enable */
+#define ATIM_DIER_CC4DE           (1 << 12) /* Bit 12: Capture/Compare 4 DMA request enable */
+#define ATIM_DIER_COMDE           (1 << 13) /* Bit 13: COM DMA request enable */
+#define ATIM_DIER_TDE             (1 << 14) /* Bit 14: Trigger DMA request enable */
+
+/* Status register */
+
+#define ATIM_SR_UIF               (1 << 0)  /* Bit 0:  Update interrupt Flag */
+#define ATIM_SR_CC1IF             (1 << 1)  /* Bit 1:  Capture/Compare 1 interrupt Flag */
+#define ATIM_SR_CC2IF             (1 << 2)  /* Bit 2:  Capture/Compare 2 interrupt Flag */
+#define ATIM_SR_CC3IF             (1 << 3)  /* Bit 3:  Capture/Compare 3 interrupt Flag */
+#define ATIM_SR_CC4IF             (1 << 4)  /* Bit 4:  Capture/Compare 4 interrupt Flag */
+#define ATIM_SR_COMIF             (1 << 5)  /* Bit 5:  COM interrupt Flag */
+#define ATIM_SR_TIF               (1 << 6)  /* Bit 6:  Trigger interrupt Flag */
+#define ATIM_SR_BIF               (1 << 7)  /* Bit 7:  Break interrupt Flag */
+#define ATIM_SR_B2IF              (1 << 8)  /* Bit 8:  Break 2 interrupt Flag */
+#define ATIM_SR_CC1OF             (1 << 9)  /* Bit 9:  Capture/Compare 1 Overcapture Flag */
+#define ATIM_SR_CC2OF             (1 << 10) /* Bit 10: Capture/Compare 2 Overcapture Flag */
+#define ATIM_SR_CC3OF             (1 << 11) /* Bit 11: Capture/Compare 3 Overcapture Flag */
+#define ATIM_SR_CC4OF             (1 << 12) /* Bit 12: Capture/Compare 4 Overcapture Flag */
+#define ATIM_SR_CC5IF             (1 << 16) /* Bit 16: Compare 5 interrupt flag */
+#define ATIM_SR_CC6IF             (1 << 17) /* Bit 17: Compare 6 interrupt flag */
+
+/* Event generation register */
+
+#define ATIM_EGR_UG               (1 << 0)  /* Bit 0: Update Generation */
+#define ATIM_EGR_CC1G             (1 << 1)  /* Bit 1: Capture/Compare 1 Generation */
+#define ATIM_EGR_CC2G             (1 << 2)  /* Bit 2: Capture/Compare 2 Generation */
+#define ATIM_EGR_CC3G             (1 << 3)  /* Bit 3: Capture/Compare 3 Generation */
+#define ATIM_EGR_CC4G             (1 << 4)  /* Bit 4: Capture/Compare 4 Generation */
+#define ATIM_EGR_COMG             (1 << 5)  /* Bit 5: Capture/Compare Control Update Generation */
+#define ATIM_EGR_TG               (1 << 6)  /* Bit 6: Trigger Generation */
+#define ATIM_EGR_BG               (1 << 7)  /* Bit 7: Break Generation */
+#define ATIM_EGR_B2G              (1 << 8)  /* Bit 8: Break 2 Generation */
+
+/* Capture/compare mode register 1 -- Output compare mode */
+
+#define ATIM_CCMR1_CC1S_SHIFT     (0)       /* Bits 1-0: Capture/Compare 1 Selection */
+#define ATIM_CCMR1_CC1S_MASK      (3 << ATIM_CCMR1_CC1S_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR1_OC1FE          (1 << 2)  /* Bit 2: Output Compare 1 Fast enable */
+#define ATIM_CCMR1_OC1PE          (1 << 3)  /* Bit 3: Output Compare 1 Preload enable */
+#define ATIM_CCMR1_OC1M_SHIFT     (4)       /* Bits 6-4: Output Compare 1 Mode */
+#define ATIM_CCMR1_OC1M_MASK      (7 << ATIM_CCMR1_OC1M_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR1_OC1CE          (1 << 7)  /* Bit 7: Output Compare 1Clear Enable */
+#define ATIM_CCMR1_CC2S_SHIFT     (8)       /* Bits 8-9: Capture/Compare 2 Selection */
+#define ATIM_CCMR1_CC2S_MASK      (3 << ATIM_CCMR1_CC2S_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR1_OC2FE          (1 << 10) /* Bit 10: Output Compare 2 Fast enable */
+#define ATIM_CCMR1_OC2PE          (1 << 11) /* Bit 11: Output Compare 2 Preload enable */
+#define ATIM_CCMR1_OC2M_SHIFT     (12)      /* Bits 14-12: Output Compare 2 Mode */
+#define ATIM_CCMR1_OC2M_MASK      (7 << ATIM_CCMR1_OC2M_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR1_OC2CE          (1 << 15) /* Bit 15: Output Compare 2 Clear Enable */
+#define ATIM_CCMR1_OC1M           (1 << 16) /* Bit 16: Output Compare 1 mode - bit 3 */
+#define ATIM_CCMR1_OC2M           (1 << 24) /* Bit 24: Output Compare 2 mode - bit 3 */
+
+
+/* Common CCMR (unshifted) Capture/Compare Selection bit-field definitions */
+
+#define ATIM_CCMR_CCS_CCOUT       (0)       /* 00: CCx channel  output */
+#define ATIM_CCMR_CCS_CCIN1       (1)       /* 01: CCx channel input, ICx is TIx */
+#define ATIM_CCMR_CCS_CCIN2       (2)       /* 10: CCx channel input, ICx is TIy */
+#define ATIM_CCMR_CCS_CCINTRC     (3)       /* 11: CCx channel input, ICx is TRC */
+
+/* Common CCMR (unshifted) Compare Mode bit field definitions */
+
+#define ATIM_CCMR_MODE_FRZN        (0)      /* 0000: Frozen */
+#define ATIM_CCMR_MODE_CHACT       (1)      /* 0001: Channel x active on match */
+#define ATIM_CCMR_MODE_CHINACT     (2)      /* 0010: Channel x inactive on match */
+#define ATIM_CCMR_MODE_OCREFTOG    (3)      /* 0011: OCxREF toggle ATIM_CNT=ATIM_CCRx */
+#define ATIM_CCMR_MODE_OCREFLO     (4)      /* 0100: OCxREF forced low */
+#define ATIM_CCMR_MODE_OCREFHI     (5)      /* 0101: OCxREF forced high */
+#define ATIM_CCMR_MODE_PWM1        (6)      /* 0110: PWM mode 1 */
+#define ATIM_CCMR_MODE_PWM2        (7)      /* 0111: PWM mode 2 */
+#define ATIM_CCMR_MODE_OPM1        (8)      /* 1000: Retrigerrable OPM mode 1 */
+#define ATIM_CCMR_MODE_OPM2        (9)      /* 1001: Retrigerrable OPM mode 2 */
+#define ATIM_CCMR_MODE_COMBINED1   (12)     /* 1100: Combined PWM mode 1 */
+#define ATIM_CCMR_MODE_COMBINED2   (13)     /* 1101: Combined PWM mode 2 */
+#define ATIM_CCMR_MODE_ASYMMETRIC1 (14)     /* 1110: Asymmetric PWM mode 1 */
+#define ATIM_CCMR_MODE_ASYMMETRIC2 (15)     /* 1111: Asymmetric PWM mode 2 */
+
+/* Capture/compare mode register 1 -- Input capture mode */
+
+                                            /* Bits 1-0:(same as output compare mode) */
+#define ATIM_CCMR1_IC1PSC_SHIFT   (2)       /* Bits 3-2: Input Capture 1 Prescaler */
+#define ATIM_CCMR1_IC1PSC_MASK    (3 << ATIM_CCMR1_IC1PSC_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR1_IC1F_SHIFT     (4)       /* Bits 7-4: Input Capture 1 Filter */
+#define ATIM_CCMR1_IC1F_MASK      (0x0f << ATIM_CCMR1_IC1F_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+                                            /* Bits 9:8 (same as output compare mode) */
+#define ATIM_CCMR1_IC2PSC_SHIFT   (10)      /* Bits 11:10: Input Capture 2 Prescaler */
+#define ATIM_CCMR1_IC2PSC_MASK    (3 << ATIM_CCMR1_IC2PSC_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR1_IC2F_SHIFT     (12)      /* Bits 15-12: Input Capture 2 Filter */
+#define ATIM_CCMR1_IC2F_MASK      (0x0f << ATIM_CCMR1_IC2F_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+
+/* Common CCMR (unshifted) Input Capture Prescaler bit-field definitions */
+
+#define ATIM_CCMR_ICPSC_NOPSC     (0)       /* 00: no prescaler, capture each edge */
+#define ATIM_CCMR_ICPSC_EVENTS2   (1)       /* 01: capture once every 2 events */
+#define ATIM_CCMR_ICPSC_EVENTS4   (2)       /* 10: capture once every 4 events */
+#define ATIM_CCMR_ICPSC_EVENTS8   (3)       /* 11: capture once every 8 events */
+
+/* Common CCMR (unshifted) Input Capture Filter bit-field definitions */
+
+#define ATIM_CCMR_ICF_NOFILT      (0)       /* 0000: No filter, sampling at fDTS */
+#define ATIM_CCMR_ICF_FCKINT2     (1)       /* 0001: fSAMPLING=fCK_INT, N=2 */
+#define ATIM_CCMR_ICF_FCKINT4     (2)       /* 0010: fSAMPLING=fCK_INT, N=4 */
+#define ATIM_CCMR_ICF_FCKINT8     (3)       /* 0011: fSAMPLING=fCK_INT, N=8 */
+#define ATIM_CCMR_ICF_FDTSd26     (4)       /* 0100: fSAMPLING=fDTS/2, N=6 */
+#define ATIM_CCMR_ICF_FDTSd28     (5)       /* 0101: fSAMPLING=fDTS/2, N=8 */
+#define ATIM_CCMR_ICF_FDTSd46     (6)       /* 0110: fSAMPLING=fDTS/4, N=6 */
+#define ATIM_CCMR_ICF_FDTSd48     (7)       /* 0111: fSAMPLING=fDTS/4, N=8 */
+#define ATIM_CCMR_ICF_FDTSd86     (8)       /* 1000: fSAMPLING=fDTS/8, N=6 */
+#define ATIM_CCMR_ICF_FDTSd88     (9)       /* 1001: fSAMPLING=fDTS/8, N=8 */
+#define ATIM_CCMR_ICF_FDTSd165    (10)      /* 1010: fSAMPLING=fDTS/16, N=5 */
+#define ATIM_CCMR_ICF_FDTSd166    (11)      /* 1011: fSAMPLING=fDTS/16, N=6 */
+#define ATIM_CCMR_ICF_FDTSd168    (12)      /* 1100: fSAMPLING=fDTS/16, N=8 */
+#define ATIM_CCMR_ICF_FDTSd325    (13)      /* 1101: fSAMPLING=fDTS/32, N=5 */
+#define ATIM_CCMR_ICF_FDTSd326    (14)      /* 1110: fSAMPLING=fDTS/32, N=6 */
+#define ATIM_CCMR_ICF_FDTSd328    (15)      /* 1111: fSAMPLING=fDTS/32, N=8 */
+
+/* Capture/compare mode register 2 - Output Compare mode */
+
+#define ATIM_CCMR2_CC3S_SHIFT     (0)       /* Bits 1-0: Capture/Compare 3 Selection */
+#define ATIM_CCMR2_CC3S_MASK      (3 << ATIM_CCMR2_CC3S_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+#define ATIM_CCMR2_OC3FE          (1 << 2)  /* Bit 2: Output Compare 3 Fast enable */
+#define ATIM_CCMR2_OC3PE          (1 << 3)  /* Bit 3: Output Compare 3 Preload enable */
+#define ATIM_CCMR2_OC3M_SHIFT     (4)       /* Bits 6-4: Output Compare 3 Mode */
+#define ATIM_CCMR2_OC3M_MASK      (7 << ATIM_CCMR2_OC3M_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+#define ATIM_CCMR2_OC3CE          (1 << 7)  /* Bit 7: Output Compare 3 Clear Enable */
+#define ATIM_CCMR2_CC4S_SHIFT     (8)       /* Bits 9-8: Capture/Compare 4 Selection */
+#define ATIM_CCMR2_CC4S_MASK      (3 << ATIM_CCMR2_CC4S_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+#define ATIM_CCMR2_OC4FE          (1 << 10) /* Bit 10: Output Compare 4 Fast enable */
+#define ATIM_CCMR2_OC4PE          (1 << 11) /* Bit 11: Output Compare 4 Preload enable */
+#define ATIM_CCMR2_OC4M_SHIFT     (12)      /* Bits 14-12: Output Compare 4 Mode */
+#define ATIM_CCMR2_OC4M_MASK      (7 << ATIM_CCMR2_OC4M_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+#define ATIM_CCMR2_OC4CE          (1 << 15) /* Bit 15: Output Compare 4 Clear Enable */
+#define ATIM_CCMR2_OC3M           (1 << 16) /* Bit 16: Output Compare 3 mode - bit 3 */
+#define ATIM_CCMR2_OC4M           (1 << 24) /* Bit 24: Output Compare 4 mode - bit 3 */
+
+/* Capture/compare mode register 2 - Input Capture Mode */
+
+                                            /* Bits 1-0:(same as output compare mode) */
+#define ATIM_CCMR2_IC3PSC_SHIFT   (2)       /* Bits 3-2: Input Capture 3 Prescaler */
+#define ATIM_CCMR1_IC3PSC_MASK    (3 << ATIM_CCMR2_IC3PSC_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+#define ATIM_CCMR2_IC3F_SHIFT     (4)       /* Bits 7-4: Input Capture 3 Filter */
+#define ATIM_CCMR2_IC3F_MASK      (0x0f << ATIM_CCMR2_IC3F_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+                                            /* Bits 9:8 (same as output compare mode) */
+#define ATIM_CCMR2_IC4PSC_SHIFT   (10)      /* Bits 11:10: Input Capture 4 Prescaler */
+#define ATIM_CCMR2_IC4PSC_MASK    (3 << ATIM_CCMR2_IC4PSC_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+#define ATIM_CCMR2_IC4F_SHIFT     (12)      /* Bits 15-12: Input Capture 4 Filter */
+#define ATIM_CCMR2_IC4F_MASK      (0x0f << ATIM_CCMR2_IC4F_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+
+/* Capture/compare mode register 3 -- Output compare mode */
+
+#define ATIM_CCMR3_OC5FE          (1 << 2)  /* Bit 2: Output Compare 5 Fast enable */
+#define ATIM_CCMR3_OC5PE          (1 << 3)  /* Bit 3: Output Compare 5 Preload enable */
+#define ATIM_CCMR3_OC5M_SHIFT     (4)       /* Bits 6-4: Output Compare 5 Mode */
+#define ATIM_CCMR3_OC5M_MASK      (7 << ATIM_CCMR3_OC5M_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR3_OC5CE          (1 << 7)  /* Bit 7: Output Compare 5 Clear Enable */
+#define ATIM_CCMR3_OC6FE          (1 << 10) /* Bit 10: Output Compare 6 Fast enable */
+#define ATIM_CCMR3_OC6PE          (1 << 11) /* Bit 11: Output Compare 6 Preload enable */
+#define ATIM_CCMR3_OC6M_SHIFT     (12)      /* Bits 14-12: Output Compare 7 Mode */
+#define ATIM_CCMR3_OC6M_MASK      (7 << ATIM_CCMR3_OC6M_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR3_OC6CE          (1 << 15) /* Bit 15: Output Compare 7 Clear Enable */
+#define ATIM_CCMR3_OC5M           (1 << 16) /* Bit 16: Output Compare 5 mode - bit 3 */
+#define ATIM_CCMR3_OC6M           (1 << 24) /* Bit 24: Output Compare 6 mode - bit 3 */
+                                            
+
+/* Capture/compare enable register */
+
+#define ATIM_CCER_CC1E            (1 << 0)  /* Bit 0: Capture/Compare 1 output enable */
+#define ATIM_CCER_CC1P            (1 << 1)  /* Bit 1: Capture/Compare 1 output Polarity */
+#define ATIM_CCER_CC1NE           (1 << 2)  /* Bit 2: Capture/Compare 1 Complementary output enable */
+#define ATIM_CCER_CC1NP           (1 << 3)  /* Bit 3: Capture/Compare 1 Complementary output polarity */
+#define ATIM_CCER_CC2E            (1 << 4)  /* Bit 4: Capture/Compare 2 output enable */
+#define ATIM_CCER_CC2P            (1 << 5)  /* Bit 5: Capture/Compare 2 output Polarity */
+#define ATIM_CCER_CC2NE           (1 << 6)  /* Bit 6: Capture/Compare 2 Complementary output enable */
+#define ATIM_CCER_CC2NP           (1 << 7)  /* Bit 7: Capture/Compare 2 Complementary output polarity */
+#define ATIM_CCER_CC3E            (1 << 8)  /* Bit 8: Capture/Compare 3 output enable */
+#define ATIM_CCER_CC3P            (1 << 9)  /* Bit 9: Capture/Compare 3 output Polarity */
+#define ATIM_CCER_CC3NE           (1 << 10) /* Bit 10: Capture/Compare 3 Complementary output enable */
+#define ATIM_CCER_CC3NP           (1 << 11) /* Bit 11: Capture/Compare 3 Complementary output polarity */
+#define ATIM_CCER_CC4E            (1 << 12) /* Bit 12: Capture/Compare 4 output enable */
+#define ATIM_CCER_CC4P            (1 << 13) /* Bit 13: Capture/Compare 4 output Polarity */
+#define ATIM_CCER_CC4NP           (1 << 15) /* Bit 15: Capture/Compare 4 Complementary output polarity */
+#define ATIM_CCER_CC5E            (1 << 16) /* Bit 16: Capture/Compare 5 output enable */
+#define ATIM_CCER_CC5P            (1 << 17) /* Bit 17: Capture/Compare 5 output Polarity */
+#define ATIM_CCER_CC6E            (1 << 20) /* Bit 20: Capture/Compare 6 output enable */
+#define ATIM_CCER_CC6P            (1 << 21) /* Bit 21: Capture/Compare 6 output Polarity */
+
+
+/* 16-bit counter register */
+
+#define ATIM_CNT_SHIFT            (0)       /* Bits 0-15: Timer counter value */
+#define ATIM_CNT_MASK             (0xffff << ATIM_CNT_SHIFT)
+
+/* Repetition counter register */
+
+#define ATIM_RCR_REP_SHIFT        (0)       /* Bits 0-15: Repetition Counter Value */
+#define ATIM_RCR_REP_MASK         (0xffff << ATIM_RCR_REP_SHIFT)
+
+#define ATIM_RCR_REP_MAX          65536
+
+/* Capture/compare registers (CCR) */
+
+#define ATIM_CCR5_GC5C1           (1 << 29)  /* Bit 29: Group Channel 5 and Channel 1 */
+#define ATIM_CCR5_GC5C2           (1 << 30)  /* Bit 30: Group Channel 5 and Channel 2 */
+#define ATIM_CCR5_GC5C3           (1 << 31)  /* Bit 31: Group Channel 5 and Channel 3 */
+
+#define ATIM_CCR_MASK             (0xffff)
+
+/* Break and dead-time register */
+
+#define ATIM_BDTR_DTG_SHIFT       (0)       /* Bits 7:0 [7:0]: Dead-Time Generator set-up */
+#define ATIM_BDTR_DTG_MASK        (0xff << ATIM_BDTR_DTG_SHIFT)
+#define ATIM_BDTR_LOCK_SHIFT      (8)       /* Bits 9:8 [1:0]: Lock Configuration */
+#define ATIM_BDTR_LOCK_MASK       (3 << ATIM_BDTR_LOCK_SHIFT)
+#  define ATIM_BDTR_LOCKOFF       (0 << ATIM_BDTR_LOCK_SHIFT) /* 00: LOCK OFF - No bit is write protected */
+#  define ATIM_BDTR_LOCK1         (1 << ATIM_BDTR_LOCK_SHIFT) /* 01: LOCK Level 1 protection */
+#  define ATIM_BDTR_LOCK2         (2 << ATIM_BDTR_LOCK_SHIFT) /* 10: LOCK Level 2 protection */
+#  define ATIM_BDTR_LOCK3         (3 << ATIM_BDTR_LOCK_SHIFT) /* 11: LOCK Level 3 protection */ */
+#define ATIM_BDTR_OSSI            (1 << 10) /* Bit 10: Off-State Selection for Idle mode */
+#define ATIM_BDTR_OSSR            (1 << 11) /* Bit 11: Off-State Selection for Run mode */
+#define ATIM_BDTR_BKE             (1 << 12) /* Bit 12: Break enable */
+#define ATIM_BDTR_BKP             (1 << 13) /* Bit 13: Break Polarity */
+#define ATIM_BDTR_AOE             (1 << 14) /* Bit 14: Automatic Output enable */
+#define ATIM_BDTR_MOE             (1 << 15) /* Bit 15: Main Output enable */
+#define ATIM_BDTR_BKF_SHIFT       (16)      /* Bits 16-19: Break filter */
+#define ATIM_BDTR_BKF_MASK        (0xf << ATIM_BDTR_BKF_SHIFT)
+#  define ATIM_BDTR_BKF_NOFILT    (0 << ATIM_BDTR_BKF_SHIFT)   /* 0000: No filter, BRK acts asynchronously */
+#  define ATIM_BDTR_BKF_FCKINT2   (1 << ATIM_BDTR_BKF_SHIFT)   /* 0001: fSAMPLING=fCK_INT, N=2 */
+#  define ATIM_BDTR_BKF_FCKINT4   (2 << ATIM_BDTR_BKF_SHIFT)   /* 0010: fSAMPLING=fCK_INT, N=4 */
+#  define ATIM_BDTR_BKF_FCKINT8   (3 << ATIM_BDTR_BKF_SHIFT)   /* 0011: fSAMPLING=fCK_INT, N=8 */
+#  define ATIM_BDTR_BKF_FDTSd26   (4 << ATIM_BDTR_BKF_SHIFT)   /* 0100: fSAMPLING=fDTS/2, N=6 */
+#  define ATIM_BDTR_BKF_FDTSd28   (5 << ATIM_BDTR_BKF_SHIFT)   /* 0101: fSAMPLING=fDTS/2, N=8 */
+#  define ATIM_BDTR_BKF_FDTSd36   (6 << ATIM_BDTR_BKF_SHIFT)   /* 0110: fSAMPLING=fDTS/4, N=6 */
+#  define ATIM_BDTR_BKF_FDTSd38   (7 << ATIM_BDTR_BKF_SHIFT)   /* 0111: fSAMPLING=fDTS/4, N=8 */
+#  define ATIM_BDTR_BKF_FDTSd86   (8 << ATIM_BDTR_BKF_SHIFT)   /* 1000: fSAMPLING=fDTS/8, N=6 */
+#  define ATIM_BDTR_BKF_FDTSd88   (9 << ATIM_BDTR_BKF_SHIFT)   /* 1001: fSAMPLING=fDTS/8, N=8 */
+#  define ATIM_BDTR_BKF_FDTSd165  (10 << ATIM_BDTR_BKF_SHIFT)  /* 1010: fSAMPLING=fDTS/16, N=5 */
+#  define ATIM_BDTR_BKF_FDTSd166  (11 << ATIM_BDTR_BKF_SHIFT)  /* 1011: fSAMPLING=fDTS/16, N=6 */
+#  define ATIM_BDTR_BKF_FDTSd168  (12 << ATIM_BDTR_BKF_SHIFT)  /* 1100: fSAMPLING=fDTS/16, N=8 */
+#  define ATIM_BDTR_BKF_FDTSd325  (13 << ATIM_BDTR_BKF_SHIFT)  /* 1101: fSAMPLING=fDTS/32, N=5 */
+#  define ATIM_BDTR_BKF_FDTSd326  (14 << ATIM_BDTR_BKF_SHIFT)  /* 1110: fSAMPLING=fDTS/32, N=6 */
+#  define ATIM_BDTR_BKF_FDTSd328  (15 << ATIM_BDTR_BKF_SHIFT)  /* 1111: fSAMPLING=fDTS/32, N=8 */
+#define ATIM_BDTR_BK2F_SHIFT      (20)      /* Bits 20-23: Break 2 filter */
+#define ATIM_BDTR_BK2F_MASK       (0xf << ATIM_BDTR_BK2F_SHIFT)
+#  define ATIM_BDTR_BK2F_NOFILT   (0 << ATIM_BDTR_BK2F_SHIFT)  /* 0000: No filter, BRK 2 acts asynchronously */
+#  define ATIM_BDTR_BK2F_FCKINT2  (1 << ATIM_BDTR_BK2F_SHIFT)  /* 0001: fSAMPLING=fCK_INT, N=2 */
+#  define ATIM_BDTR_BK2F_FCKINT4  (2 << ATIM_BDTR_BK2F_SHIFT)  /* 0010: fSAMPLING=fCK_INT, N=4 */
+#  define ATIM_BDTR_BK2F_FCKINT8  (3 << ATIM_BDTR_BK2F_SHIFT)  /* 0011: fSAMPLING=fCK_INT, N=8 */
+#  define ATIM_BDTR_BK2F_FDTSd26  (4 << ATIM_BDTR_BK2F_SHIFT)  /* 0100: fSAMPLING=fDTS/2, N=6 */
+#  define ATIM_BDTR_BK2F_FDTSd28  (5 << ATIM_BDTR_BK2F_SHIFT)  /* 0101: fSAMPLING=fDTS/2, N=8 */
+#  define ATIM_BDTR_BK2F_FDTSd36  (6 << ATIM_BDTR_BK2F_SHIFT)  /* 0110: fSAMPLING=fDTS/4, N=6 */
+#  define ATIM_BDTR_BK2F_FDTSd38  (7 << ATIM_BDTR_BK2F_SHIFT)  /* 0111: fSAMPLING=fDTS/4, N=8 */
+#  define ATIM_BDTR_BK2F_FDTSd86  (8 << ATIM_BDTR_BK2F_SHIFT)  /* 1000: fSAMPLING=fDTS/8, N=6 */
+#  define ATIM_BDTR_BK2F_FDTSd88  (9 << ATIM_BDTR_BK2F_SHIFT)  /* 1001: fSAMPLING=fDTS/8, N=8 */
+#  define ATIM_BDTR_BK2F_FDTSd165 (10 << ATIM_BDTR_BK2F_SHIFT) /* 1010: fSAMPLING=fDTS/16, N=5 */
+#  define ATIM_BDTR_BK2F_FDTSd166 (11 << ATIM_BDTR_BK2F_SHIFT) /* 1011: fSAMPLING=fDTS/16, N=6 */
+#  define ATIM_BDTR_BK2F_FDTSd168 (12 << ATIM_BDTR_BK2F_SHIFT) /* 1100: fSAMPLING=fDTS/16, N=8 */
+#  define ATIM_BDTR_BK2F_FDTSd325 (13 << ATIM_BDTR_BK2F_SHIFT) /* 1101: fSAMPLING=fDTS/32, N=5 */
+#  define ATIM_BDTR_BK2F_FDTSd326 (14 << ATIM_BDTR_BK2F_SHIFT) /* 1110: fSAMPLING=fDTS/32, N=6 */
+#  define ATIM_BDTR_BK2F_FDTSd328 (15 << ATIM_BDTR_BK2F_SHIFT) /* 1111: fSAMPLING=fDTS/32, N=8 */
+#define ATIM_BDTR_BK2E            (1 << 24) /* Bit 24: Break 2 enable */
+#define ATIM_BDTR_BK2P            (1 << 1525 /* Bit 25:Break 2 polarity */
+
+
+/* DMA control register */
+
+#define ATIM_DCR_DBA_SHIFT        (0)       /* Bits 4-0: DMA Base Address */
+#define ATIM_DCR_DBA_MASK         (0x1f << ATIM_DCR_DBA_SHIFT)
+#define ATIM_DCR_DBL_SHIFT        (8)       /* Bits 12-8: DMA Burst Length */
+#define ATIM_DCR_DBL_MASK         (0x1f << ATIM_DCR_DBL_SHIFT)
+#  define ATIM_DCR_DBL(n)         (((n)-1) << ATIM_DCR_DBL_SHIFT) /* n transfers, n = 1..18 */
+
+/* Control register 1 (TIM2-5 and TIM9-14) */
+
+#define GTIM_CR1_CEN              (1 << 0)  /* Bit 0: Counter enable */
+#define GTIM_CR1_UDIS             (1 << 1)  /* Bit 1: Update Disable */
+#define GTIM_CR1_URS              (1 << 2)  /* Bit 2: Update Request Source */
+#define GTIM_CR1_OPM              (1 << 3)  /* Bit 3: One Pulse Mode (TIM2-5, 9, and 12 only) */
+#define GTIM_CR1_DIR              (1 << 4)  /* Bit 4: Direction (TIM2-5 only) */
+#define GTIM_CR1_CMS_SHIFT        (5)       /* Bits 6-5: Center-aligned Mode Selection (TIM2-5 only) */
+#define GTIM_CR1_CMS_MASK         (3 << GTIM_CR1_CMS_SHIFT)
+#  define GTIM_CR1_EDGE           (0 << GTIM_CR1_CMS_SHIFT) /* 00: Edge-aligned mode.  */
+#  define GTIM_CR1_CENTER1        (1 << GTIM_CR1_CMS_SHIFT) /* 01: Center-aligned mode 1 */
+#  define GTIM_CR1_CENTER2        (2 << GTIM_CR1_CMS_SHIFT) /* 10: Center-aligned mode 2 */
+#  define GTIM_CR1_CENTER3        (3 << GTIM_CR1_CMS_SHIFT) /* 11: Center-aligned mode 3 */
+#define GTIM_CR1_ARPE             (1 << 7)  /* Bit 7: Auto-Reload Preload enable */
+#define GTIM_CR1_CKD_SHIFT        (8)       /* Bits 9-8: Clock Division */
+#define GTIM_CR1_CKD_MASK         (3 << GTIM_CR1_CKD_SHIFT)
+#  define GTIM_CR1_TCKINT         (0 << GTIM_CR1_CKD_SHIFT) /* 00: tDTS = tCK_INT */
+#  define GTIM_CR1_2TCKINT        (1 << GTIM_CR1_CKD_SHIFT) /* 01: tDTS = 2 x tCK_INT */
+#  define GTIM_CR1_4TCKINT        (2 << GTIM_CR1_CKD_SHIFT) /* 10: tDTS = 4 x tCK_INT */
+#define GTIM_CR1_UIFREMAP         (1 << 11) /* Bit 11: UIF status bit remapping */
+
+/* Control register 2 (TIM2-5, TIM9-12) */
+
+#define GTIM_CR2_CCPC             (1 << 0)  /* Bit 0: Capture/compare preloaded control (TIM15-17 only) */
+#define GTIM_CR2_CCUS             (1 << 2)  /* Bit 2: Capture/compare control update selection (TIM15-17 only) */
+#define GTIM_CR2_CCDS             (1 << 3)  /* Bit 3: Capture/Compare DMA Selection (TIM2-5,1,&16 only) */
+#define GTIM_CR2_MMS_SHIFT        (4)       /* Bits 6-4: Master Mode Selection (not TIM16) */
+#define GTIM_CR2_MMS_MASK         (7 << GTIM_CR2_MMS_SHIFT)
+#  define GTIM_CR2_MMS_RESET      (0 << GTIM_CR2_MMS_SHIFT) /* 000: Reset */
+#  define GTIM_CR2_MMS_ENABLE     (1 << GTIM_CR2_MMS_SHIFT) /* 001: Enable */
+#  define GTIM_CR2_MMS_UPDATE     (2 << GTIM_CR2_MMS_SHIFT) /* 010: Update */
+#  define GTIM_CR2_MMS_COMPP      (3 << GTIM_CR2_MMS_SHIFT) /* 011: Compare Pulse */
+#  define GTIM_CR2_MMS_OC1REF     (4 << GTIM_CR2_MMS_SHIFT) /* 100: Compare - OC1REF signal is used as trigger output (TRGO) */
+#  define GTIM_CR2_MMS_OC2REF     (5 << GTIM_CR2_MMS_SHIFT) /* 101: Compare - OC2REF signal is used as trigger output (TRGO) */
+#  define GTIM_CR2_MMS_OC3REF     (6 << GTIM_CR2_MMS_SHIFT) /* 110: Compare - OC3REF signal is used as trigger output (TRGO, TIM2-5 and TIM15 only) */
+#  define GTIM_CR2_MMS_OC4REF     (7 << GTIM_CR2_MMS_SHIFT) /* 111: Compare - OC4REF signal is used as trigger output (TRGO, TIM2-5 and TIM15 only) */
+#define GTIM_CR2_TI1S             (1 << 7)  /* Bit 7: TI1 Selection (not TIM16) */
+#define GTIM_CR2_OIS1             (1 << 8)  /* Bit 8: COutput Idle state 1 (OC1 output) (TIM15-17 only) */
+#define GTIM_CR2_OIS1N            (1 << 9)  /* Bit 9: Output Idle state 1 (OC1N output) (TIM15-17 only) */
+#define GTIM_CR2_OIS2             (1 << 10) /* Bit 10: Output idle state 2 (OC2 output) (TIM15 only) */
+
+/* Slave mode control register (TIM2-5) */
+
+#define GTIM_SMCR_SMS_SHIFT       (0)       /* Bits 2-0: Slave Mode Selection */
+#define GTIM_SMCR_SMS_MASK        (7 << GTIM_SMCR_SMS_SHIFT)
+#  define GTIM_SMCR_DISAB         (0 << GTIM_SMCR_SMS_SHIFT) /* 000: Slave mode disabled */
+#  define GTIM_SMCR_ENCMD1        (1 << GTIM_SMCR_SMS_SHIFT) /* 001: Encoder mode 1 */
+#  define GTIM_SMCR_ENCMD2        (2 << GTIM_SMCR_SMS_SHIFT) /* 010: Encoder mode 2 */
+#  define GTIM_SMCR_ENCMD3        (3 << GTIM_SMCR_SMS_SHIFT) /* 011: Encoder mode 3 */
+#  define GTIM_SMCR_RESET         (4 << GTIM_SMCR_SMS_SHIFT) /* 100: Reset Mode  */
+#  define GTIM_SMCR_GATED         (5 << GTIM_SMCR_SMS_SHIFT) /* 101: Gated Mode  */
+#  define GTIM_SMCR_TRIGGER       (6 << GTIM_SMCR_SMS_SHIFT) /* 110: Trigger Mode */
+#  define GTIM_SMCR_EXTCLK1       (7 << GTIM_SMCR_SMS_SHIFT) /* 111: External Clock Mode 1 */
+#define GTIM_SMCR_TS_SHIFT        (4)       /* Bits 6-4: Trigger Selection */
+#define GTIM_SMCR_TS_MASK         (7 << GTIM_SMCR_TS_SHIFT)
+#  define GTIM_SMCR_ITR0          (0 << GTIM_SMCR_TS_SHIFT) /* 000: Internal Trigger 0 (ITR0). TIM1 */
+#  define GTIM_SMCR_ITR1          (1 << GTIM_SMCR_TS_SHIFT) /* 001: Internal Trigger 1 (ITR1). TIM2 */
+#  define GTIM_SMCR_ITR2          (2 << GTIM_SMCR_TS_SHIFT) /* 010: Internal Trigger 2 (ITR2). TIM3 */
+#  define GTIM_SMCR_ITR3          (3 << GTIM_SMCR_TS_SHIFT) /* 011: Internal Trigger 3 (ITR3). TIM4 */
+#  define GTIM_SMCR_TI1FED        (4 << GTIM_SMCR_TS_SHIFT) /* 100: TI1 Edge Detector (TI1F_ED) */
+#  define GTIM_SMCR_TI1FP1        (5 << GTIM_SMCR_TS_SHIFT) /* 101: Filtered Timer Input 1 (TI1FP1) */
+#  define GTIM_SMCR_TI2FP2        (6 << GTIM_SMCR_TS_SHIFT) /* 110: Filtered Timer Input 2 (TI2FP2) */
+#  define GTIM_SMCR_ETRF          (7 << GTIM_SMCR_TS_SHIFT) /* 111: External Trigger input (ETRF) */
+#define GTIM_SMCR_MSM             (1 << 7)  /* Bit 7: Master/Slave mode */
+#define GTIM_SMCR_ETF_SHIFT       (8)       /* Bits 11-8: External Trigger Filter (not TIM15) */
+#define GTIM_SMCR_ETF_MASK        (0x0f << GTIM_SMCR_ETF_SHIFT)
+#  define GTIM_SMCR_NOFILT        (0 << GTIM_SMCR_ETF_SHIFT)  /* 0000: No filter, sampling is done at fDTS */
+#  define GTIM_SMCR_FCKINT2       (1 << GTIM_SMCR_ETF_SHIFT)  /* 0001: fSAMPLING=fCK_INT, N=2 */
+#  define GTIM_SMCR_FCKINT4       (2 << GTIM_SMCR_ETF_SHIFT)  /* 0010: fSAMPLING=fCK_INT, N=4 */
+#  define GTIM_SMCR_FCKINT8       (3 << GTIM_SMCR_ETF_SHIFT)  /* 0011: fSAMPLING=fCK_INT, N=8 */
+#  define GTIM_SMCR_FDTSd26       (4 << GTIM_SMCR_ETF_SHIFT)  /* 0100: fSAMPLING=fDTS/2, N=6 */
+#  define GTIM_SMCR_FDTSd28       (5 << GTIM_SMCR_ETF_SHIFT)  /* 0101: fSAMPLING=fDTS/2, N=8 */
+#  define GTIM_SMCR_FDTSd36       (6 << GTIM_SMCR_ETF_SHIFT)  /* 0110: fSAMPLING=fDTS/4, N=6 */
+#  define GTIM_SMCR_FDTSd38       (7 << GTIM_SMCR_ETF_SHIFT)  /* 0111: fSAMPLING=fDTS/4, N=8 */
+#  define GTIM_SMCR_FDTSd86       (8 << GTIM_SMCR_ETF_SHIFT)  /* 1000: fSAMPLING=fDTS/8, N=6 */
+#  define GTIM_SMCR_FDTSd88       (9 << GTIM_SMCR_ETF_SHIFT)  /* 1001: fSAMPLING=fDTS/8, N=8 */
+#  define GTIM_SMCR_FDTSd165      (10 << GTIM_SMCR_ETF_SHIFT) /* 1010: fSAMPLING=fDTS/16, N=5 */
+#  define GTIM_SMCR_FDTSd166      (11 << GTIM_SMCR_ETF_SHIFT) /* 1011: fSAMPLING=fDTS/16, N=6 */
+#  define GTIM_SMCR_FDTSd168      (12 << GTIM_SMCR_ETF_SHIFT) /* 1100: fSAMPLING=fDTS/16, N=8 */
+#  define GTIM_SMCR_FDTSd325      (13 << GTIM_SMCR_ETF_SHIFT) /* 1101: fSAMPLING=fDTS/32, N=5 */
+#  define GTIM_SMCR_FDTSd326      (14 << GTIM_SMCR_ETF_SHIFT) /* 1110: fSAMPLING=fDTS/32, N=6 */
+#  define GTIM_SMCR_FDTSd328      (15 << GTIM_SMCR_ETF_SHIFT) /* 1111: fSAMPLING=fDTS/32, N=8 */
+#define GTIM_SMCR_ETPS_SHIFT      (12)      /* Bits 13-12: External Trigger Prescaler (not TIM15) */
+#define GTIM_SMCR_ETPS_MASK       (3 << GTIM_SMCR_ETPS_SHIFT)
+#  define GTIM_SMCR_PSCOFF        (0 << GTIM_SMCR_ETPS_SHIFT) /* 00: Prescaler OFF */
+#  define GTIM_SMCR_ETRPd2        (1 << GTIM_SMCR_ETPS_SHIFT) /* 01: ETRP frequency divided by 2 */
+#  define GTIM_SMCR_ETRPd4        (2 << GTIM_SMCR_ETPS_SHIFT) /* 10: ETRP frequency divided by 4 */
+#  define GTIM_SMCR_ETRPd8        (3 << GTIM_SMCR_ETPS_SHIFT) /* 11: ETRP frequency divided by 8 */
+#define GTIM_SMCR_ECE             (1 << 14) /* Bit 14: External Clock enable */
+#define GTIM_SMCR_ETP             (1 << 15) /* Bit 15: External Trigger Polarity */
+#define GTIM_SMCR_SMS             (1 << 16) /* Bit 16: Slave mode selection - bit 3 */
+
+/* DMA/Interrupt enable register (TIM2-5 and TIM9-14) */
+
+#define GTIM_DIER_UIE             (1 << 0)  /* Bit 0: Update interrupt enable */
+#define GTIM_DIER_CC1IE           (1 << 1)  /* Bit 1: Capture/Compare 1 interrupt enable */
+#define GTIM_DIER_CC2IE           (1 << 2)  /* Bit 2: Capture/Compare 2 interrupt enable (TIM2-5,9,12,&15 only) */
+#define GTIM_DIER_CC3IE           (1 << 3)  /* Bit 3: Capture/Compare 3 interrupt enable (TIM2-5 only) */
+#define GTIM_DIER_CC4IE           (1 << 4)  /* Bit 4: Capture/Compare 4 interrupt enable (TIM2-5 only) */
+#define GTIM_DIER_COMIE           (1 << 5)  /* Bit 5: COM interrupt enable (TIM15-17 only) */
+#define GTIM_DIER_TIE             (1 << 6)  /* Bit 6: Trigger interrupt enable (TIM2-5,9,&12 only) */
+#define GTIM_DIER_BIE             (1 << 7)  /* Bit 7: Break interrupt enable (TIM15-17 only) */
+#define GTIM_DIER_UDE             (1 << 8)  /* Bit 8: Update DMA request enable (TIM2-5&15-17 only) */
+#define GTIM_DIER_CC1DE           (1 << 9)  /* Bit 9: Capture/Compare 1 DMA request enable (TIM2-5&15-17 only) */
+#define GTIM_DIER_CC2DE           (1 << 10) /* Bit 10: Capture/Compare 2 DMA request enable (TIM2-5&15 only) */
+#define GTIM_DIER_CC3DE           (1 << 11) /* Bit 11: Capture/Compare 3 DMA request enable (TIM2-5 only) */
+#define GTIM_DIER_CC4DE           (1 << 12) /* Bit 12: Capture/Compare 4 DMA request enable (TIM2-5 only) */
+#define GTIM_DIER_COMDE           (1 << 13) /* Bit 13: COM DMA request enable (TIM15-17 only) */
+#define GTIM_DIER_TDE             (1 << 14) /* Bit 14: Trigger DMA request enable (TIM2-5&15-17 only) */
+
+/* Status register */
+
+#define GTIM_SR_UIF               (1 << 0)  /* Bit 0: Update interrupt flag */
+#define GTIM_SR_CC1IF             (1 << 1)  /* Bit 1: Capture/compare 1 interrupt flag */
+#define GTIM_SR_CC2IF             (1 << 2)  /* Bit 2: Capture/Compare 2 interrupt flag (TIM2-5,9,12,&15 only) */
+#define GTIM_SR_CC3IF             (1 << 3)  /* Bit 3: Capture/Compare 3 interrupt flag (TIM2-5 only) */
+#define GTIM_SR_CC4IF             (1 << 4)  /* Bit 4: Capture/Compare 4 interrupt flag (TIM2-5 only) */
+#define GTIM_SR_COMIF             (1 << 5)  /* Bit 5: COM interrupt flag (TIM15-17 only) */
+#define GTIM_SR_TIF               (1 << 6)  /* Bit 6: Trigger interrupt Flag (TIM2-5,9,12&15-17 only) */
+#define GTIM_SR_BIF               (1 << 7)  /* Bit 7: Break interrupt flag (TIM15-17 only) */
+#define GTIM_SR_CC1OF             (1 << 9)  /* Bit 9: Capture/Compare 1 Overcapture flag */
+#define GTIM_SR_CC2OF             (1 << 10) /* Bit 10: Capture/Compare 2 Overcapture flag (TIM2-5,9,12&15 only) */
+#define GTIM_SR_CC3OF             (1 << 11) /* Bit 11: Capture/Compare 3 Overcapture flag (TIM2-5 only) */
+#define GTIM_SR_CC4OF             (1 << 12) /* Bit 12: Capture/Compare 4 Overcapture flag (TIM2-5 only) */
+
+/* Event generation register (TIM2-5 and TIM9-14) */
+
+#define GTIM_EGR_UG               (1 << 0)  /* Bit 0: Update generation */
+#define GTIM_EGR_CC1G             (1 << 1)  /* Bit 1: Capture/compare 1 generation */
+#define GTIM_EGR_CC2G             (1 << 2)  /* Bit 2: Capture/compare 2 generation (TIM2-5,9,12,&15 only) */
+#define GTIM_EGR_CC3G             (1 << 3)  /* Bit 3: Capture/compare 3 generation (TIM2-5 only) */
+#define GTIM_EGR_CC4G             (1 << 4)  /* Bit 4: Capture/compare 4 generation (TIM2-5 only) */
+#define GTIM_EGR_COMIG            (1 << 5)  /* Bit 5: Capture/Compare control update generation (TIM15-17 only) */
+#define GTIM_EGR_TG               (1 << 6)  /* Bit 6: Trigger generation (TIM2-5,9,12&16-17 only) */
+#define GTIM_EGR_BG               (1 << 7)  /* Bit 7: Break generation (TIM15-17 only) */
+
+/* Capture/compare mode register 1 - Output compare mode (TIM2-5 and TIM9-14) */
+
+#define GTIM_CCMR1_CC1S_SHIFT     (0)       /* Bits 1-0: Capture/Compare 1 Selection */
+#define GTIM_CCMR1_CC1S_MASK      (3 << GTIM_CCMR1_CC1S_SHIFT)
+                                            /* (See common CCMR Capture/Compare Selection definitions below) */
+#define GTIM_CCMR1_OC1FE          (1 << 2)  /* Bit 2: Output Compare 1 Fast enable */
+#define GTIM_CCMR1_OC1PE          (1 << 3)  /* Bit 3: Output Compare 1 Preload enable */
+#define GTIM_CCMR1_OC1M_SHIFT     (4)       /* Bits 6-4: Output Compare 1 Mode */
+#define GTIM_CCMR1_OC1M_MASK      (7 << GTIM_CCMR1_OC1M_SHIFT)
+                                            /* (See common CCMR Output Compare Mode definitions below) */
+#define GTIM_CCMR1_OC1CE          (1 << 7)  /* Bit 7: Output Compare 1Clear Enable */
+#define GTIM_CCMR1_CC2S_SHIFT     (8)       /* Bits 9-8: Capture/Compare 2 Selection */
+#define GTIM_CCMR1_CC2S_MASK      (3 << GTIM_CCMR1_CC2S_SHIFT)
+                                            /* (See common CCMR Capture/Compare Selection definitions below) */
+#define GTIM_CCMR1_OC2FE          (1 << 10) /* Bit 10: Output Compare 2 Fast enable */
+#define GTIM_CCMR1_OC2PE          (1 << 11) /* Bit 11: Output Compare 2 Preload enable */
+#define GTIM_CCMR1_OC2M_SHIFT     (12)      /* Bits 14-12: Output Compare 2 Mode */
+#define GTIM_CCMR1_OC2M_MASK      (7 << GTIM_CCMR1_OC2M_SHIFT)
+                                            /* (See common CCMR Output Compare Mode definitions below) */
+#define GTIM_CCMR1_OC2CE          (1 << 15) /* Bit 15: Output Compare 2 Clear Enable */
+#define GTIM_CCMR1_OC1M           (1 << 16) /* Bit 16: Output Compare 1 mode - bit 3 */
+#define GTIM_CCMR1_OC2M           (1 << 24) /* Bit 24: Output Compare 2 mode - bit 3 */
+
+/* Common CCMR (unshifted) Capture/Compare Selection bit-field definitions */
+
+#define GTIM_CCMR_CCS_CCOUT       (0)       /* 00: CCx channel output */
+#define GTIM_CCMR_CCS_CCIN1       (1)       /* 01: CCx channel input, ICx is TIx */
+#define GTIM_CCMR_CCS_CCIN2       (2)       /* 10: CCx channel input, ICx is TIy */
+#define GTIM_CCMR_CCS_CCINTRC     (3)       /* 11: CCx channel input, ICx is TRC */
+
+/* Common CCMR (unshifted) Compare Mode bit field definitions */
+
+#define GTIM_CCMR_MODE_FRZN       (0)       /* 000: Frozen */
+#define GTIM_CCMR_MODE_CHACT      (1)       /* 001: Channel x active on match */
+#define GTIM_CCMR_MODE_CHINACT    (2)       /* 010: Channel x inactive on match */
+#define GTIM_CCMR_MODE_OCREFTOG   (3)       /* 011: OCxREF toggle ATIM_CNT=ATIM_CCRx */
+#define GTIM_CCMR_MODE_OCREFLO    (4)       /* 100: OCxREF forced low */
+#define GTIM_CCMR_MODE_OCREFHI    (5)       /* 101: OCxREF forced high */
+#define GTIM_CCMR_MODE_PWM1       (6)       /* 110: PWM mode 1 */
+#define GTIM_CCMR_MODE_PWM2       (7)       /* 111: PWM mode 2 */
+
+/* Capture/compare mode register 1 - Input capture mode (TIM2-5 and TIM9-14) */
+
+                                            /* Bits 1-0 (Same as Output Compare Mode) */
+#define GTIM_CCMR1_IC1PSC_SHIFT   (2)       /* Bits 3-2: Input Capture 1 Prescaler */
+#define GTIM_CCMR1_IC1PSC_MASK    (3 << GTIM_CCMR1_IC1PSC_SHIFT)
+                                            /* (See common CCMR Input Capture Prescaler definitions below) */
+#define GTIM_CCMR1_IC1F_SHIFT     (4)       /* Bits 7-4: Input Capture 1 Filter */
+#define GTIM_CCMR1_IC1F_MASK      (0x0f << GTIM_CCMR1_IC1F_SHIFT)
+                                            /* (See common CCMR Input Capture Filter definitions below) */
+                                            /* Bits 9-8: (Same as Output Compare Mode) */
+#define GTIM_CCMR1_IC2PSC_SHIFT   (10)      /* Bits 11-10: Input Capture 2 Prescaler */
+#define GTIM_CCMR1_IC2PSC_MASK    (3 << GTIM_CCMR1_IC2PSC_SHIFT)
+                                            /* (See common CCMR Input Capture Prescaler definitions below) */
+#define GTIM_CCMR1_IC2F_SHIFT     (12)      /* Bits 15-12: Input Capture 2 Filter */
+#define GTIM_CCMR1_IC2F_MASK      (0x0f << GTIM_CCMR1_IC2F_SHIFT)
+                                            /* (See common CCMR Input Capture Filter definitions below) */
+
+/* Common CCMR (unshifted) Input Capture Prescaler bit-field definitions */
+
+#define GTIM_CCMR_ICPSC_NOPSC     (0)       /* 00: no prescaler, capture each edge */
+#define GTIM_CCMR_ICPSC_EVENTS2   (1)       /* 01: capture once every 2 events */
+#define GTIM_CCMR_ICPSC_EVENTS4   (2)       /* 10: capture once every 4 events */
+#define GTIM_CCMR_ICPSC_EVENTS8   (3)       /* 11: capture once every 8 events */
+
+/* Common CCMR (unshifted) Input Capture Filter bit-field definitions */
+
+#define GTIM_CCMR_ICF_NOFILT      (0)       /* 0000: No filter, sampling at fDTS */
+#define GTIM_CCMR_ICF_FCKINT2     (1)       /* 0001: fSAMPLING=fCK_INT, N=2 */
+#define GTIM_CCMR_ICF_FCKINT4     (2)       /* 0010: fSAMPLING=fCK_INT, N=4 */
+#define GTIM_CCMR_ICF_FCKINT8     (3)       /* 0011: fSAMPLING=fCK_INT, N=8 */
+#define GTIM_CCMR_ICF_FDTSd26     (4)       /* 0100: fSAMPLING=fDTS/2, N=6 */
+#define GTIM_CCMR_ICF_FDTSd28     (5)       /* 0101: fSAMPLING=fDTS/2, N=8 */
+#define GTIM_CCMR_ICF_FDTSd46     (6)       /* 0110: fSAMPLING=fDTS/4, N=6 */
+#define GTIM_CCMR_ICF_FDTSd48     (7)       /* 0111: fSAMPLING=fDTS/4, N=8 */
+#define GTIM_CCMR_ICF_FDTSd86     (8)       /* 1000: fSAMPLING=fDTS/8, N=6 */
+#define GTIM_CCMR_ICF_FDTSd88     (9)       /* 1001: fSAMPLING=fDTS/8, N=8 */
+#define GTIM_CCMR_ICF_FDTSd165    (10)      /* 1010: fSAMPLING=fDTS/16, N=5 */
+#define GTIM_CCMR_ICF_FDTSd166    (11)      /* 1011: fSAMPLING=fDTS/16, N=6 */
+#define GTIM_CCMR_ICF_FDTSd168    (12)      /* 1100: fSAMPLING=fDTS/16, N=8 */
+#define GTIM_CCMR_ICF_FDTSd325    (13)      /* 1101: fSAMPLING=fDTS/32, N=5 */
+#define GTIM_CCMR_ICF_FDTSd326    (14)      /* 1110: fSAMPLING=fDTS/32, N=6 */
+#define GTIM_CCMR_ICF_FDTSd328    (15)      /* 1111: fSAMPLING=fDTS/32, N=8 */
+
+/* Capture/compare mode register 2 - Output Compare mode (TIM2-5 only) */
+
+#define GTIM_CCMR2_CC3S_SHIFT     (0)       /* Bits 1-0: Capture/Compare 3 Selection */
+#define GTIM_CCMR2_CC3S_MASK      (3 << GTIM_CCMR2_CC3S_SHIFT)
+                                            /* (See common CCMR Capture/Compare Selection definitions above) */
+#define GTIM_CCMR2_OC3FE          (1 << 2)  /* Bit 2: Output Compare 3 Fast enable */
+#define GTIM_CCMR2_OC3PE          (1 << 3)  /* Bit 3: Output Compare 3 Preload enable */
+#define GTIM_CCMR2_OC3M_SHIFT     (4)       /* Bits 6-4: Output Compare 3 Mode */
+#define GTIM_CCMR2_OC3M_MASK      (7 << GTIM_CCMR2_OC3M_SHIFT)
+                                            /* (See common CCMR Output Compare Mode definitions above) */
+#define GTIM_CCMR2_OC3CE          (1 << 7)  /* Bit 7: Output Compare 3 Clear Enable */
+#define GTIM_CCMR2_CC4S_SHIFT     (8)       /* Bits 9-8: Capture/Compare 4 Selection */
+#define GTIM_CCMR2_CC4S_MASK      (3 << GTIM_CCMR2_CC4S_SHIFT)
+                                            /* (See common CCMR Capture/Compare Selection definitions above) */
+#define GTIM_CCMR2_OC4FE          (1 << 10) /* Bit 10: Output Compare 4 Fast enable */
+#define GTIM_CCMR2_OC4PE          (1 << 11) /* Bit 11: Output Compare 4 Preload enable */
+#define GTIM_CCMR2_OC4M_SHIFT     (12)      /* Bits 14-12: Output Compare 4 Mode */
+#define GTIM_CCMR2_OC4M_MASK      (7 << GTIM_CCMR2_OC4M_SHIFT)
+                                            /* (See common CCMR Output Compare Mode definitions above) */
+#define GTIM_CCMR2_OC4CE          (1 << 15) /* Bit 15: Output Compare 4 Clear Enable */
+
+/* Capture/compare mode register 2 - Input capture mode (TIM2-5 only) */
+
+                                            /* Bits 1-0 (Same as Output Compare Mode) */
+#define GTIM_CCMR2_IC3PSC_SHIFT   (2)       /* Bits 3-2: Input Capture 3 Prescaler */
+#define GTIM_CCMR2_IC3PSC_MASK    (3 << GTIM_CCMR2_IC3PSC_SHIFT)
+                                            /* (See common CCMR Input Capture Prescaler definitions below) */
+#define GTIM_CCMR2_IC3F_SHIFT     (4)       /* Bits 7-4: Input Capture 3 Filter */
+#define GTIM_CCMR2_IC3F_MASK      (0x0f << GTIM_CCMR2_IC3F_SHIFT)
+                                            /* (See common CCMR Input Capture Filter definitions below) */
+                                            /* Bits 9-8: (Same as Output Compare Mode) */
+#define GTIM_CCMR2_IC4PSC_SHIFT   (10)      /* Bits 11-10: Input Capture 4 Prescaler */
+#define GTIM_CCMR2_IC4PSC_MASK    (3 << GTIM_CCMR2_IC4PSC_SHIFT)
+                                            /* (See common CCMR Input Capture Prescaler definitions below) */
+#define GTIM_CCMR2_IC4F_SHIFT     (12)      /* Bits 15-12: Input Capture 4 Filter */
+#define GTIM_CCMR2_IC4F_MASK      (0x0f << GTIM_CCMR2_IC4F_SHIFT)
+                                            /* (See common CCMR Input Capture Filter definitions below) */
+
+/* Capture/compare enable register (TIM1 and TIM8, TIM2-5 and TIM9-14) */
+
+#define GTIM_CCER_CC1E            (1 << 0)  /* Bit 0: Capture/Compare 1 output enable */
+#define GTIM_CCER_CC1P            (1 << 1)  /* Bit 1: Capture/Compare 1 output polarity */
+#define GTIM_CCER_CC1NE           (1 << 2)  /* Bit 2: Capture/Compare 1 complementary output enable (TIM1 and TIM8 only) */
+#define GTIM_CCER_CC1NP           (1 << 3)  /* Bit 3: Capture/Compare 1 output Polarity (F2,F3,F4 and TIM15-17) */
+#define GTIM_CCER_CC2E            (1 << 4)  /* Bit 4: Capture/Compare 2 output enable (TIM2-5,9&12 only) */
+#define GTIM_CCER_CC2P            (1 << 5)  /* Bit 5: Capture/Compare 2 output polarity (TIM2-5,9&12 only) */
+#define GTIM_CCER_CC2NE           (1 << 6)  /* Bit 6: Capture/Compare 2 complementary output enable (TIM1 and TIM8 only) */
+#define GTIM_CCER_CC2NP           (1 << 7)  /* Bit 7: Capture/Compare 2 output Polarity (F2,F3,F4 and TIM2-5,9,12&15 only) */
+#define GTIM_CCER_CC3E            (1 << 8)  /* Bit 8: Capture/Compare 3 output enable (TIM2-5 only) */
+#define GTIM_CCER_CC3P            (1 << 9)  /* Bit 9: Capture/Compare 3 output Polarity (TIM2-5 only) */
+#define GTIM_CCER_CC3NE           (1 << 10) /* Bit 10: Capture/Compare 3 complementary output enable (TIM1 and TIM8 only) */
+#define GTIM_CCER_CC3NP           (1 << 11) /* Bit 11: Capture/Compare 3 output Polarity (F2,F4 and TIM2-5 only) */
+#define GTIM_CCER_CC4E            (1 << 12) /* Bit 12: Capture/Compare 4 output enable (TIM2-5 only) */
+#define GTIM_CCER_CC4P            (1 << 13) /* Bit 13: Capture/Compare 4 output Polarity (TIM2-5 only) */
+#define GTIM_CCER_CC4NP           (1 << 15) /* Bit 15: Capture/Compare 4 output Polarity */
+
+/* 16-bit counter register */
+
+#define GTIM_CNT_SHIFT            (0)       /* Bits 0-15: Timer counter value */
+#define GTIM_CNT_MASK             (0xffff << ATIM_CNT_SHIFT)
+
+/* DMA control register */
+
+#define GTIM_DCR_DBA_SHIFT        (0)       /* Bits 4-0: DMA Base Address */
+#define GTIM_DCR_DBA_MASK         (0x1f << GTIM_DCR_DBA_SHIFT)
+#define GTIM_DCR_DBL_SHIFT        (8)       /* Bits 12-8: DMA Burst Length */
+#define GTIM_DCR_DBL_MASK         (0x1f << GTIM_DCR_DBL_SHIFT)
+
+/* Timer 2/5 option register */
+
+#define TIM2_OR_ITR1_RMP_SHIFT    (10)     /* Bits 10-11: Internal trigger 1 remap */
+#define TIM2_OR_ITR1_RMP_MASK     (3 << TIM2_OR_ITR1_RMP_SHIFT)
+#  define TIM2_OR_ITR1_TIM8_TRGOUT (0 << TIM2_OR_ITR1_RMP_SHIFT) /* 00: TIM2_ITR1 input connected to TIM8_TRGOUT */
+#  define TIM2_OR_ITR1_PTP        (1 << TIM2_OR_ITR1_RMP_SHIFT) /* 01: TIM2_ITR1 input connected to PTP trigger output */
+#  define TIM2_OR_ITR1_OTGFSSOF   (2 << TIM2_OR_ITR1_RMP_SHIFT) /* 10: TIM2_ITR1 input connected to OTG FS SOF */
+#  define TIM2_OR_ITR1_OTGHSSOF   (3 << TIM2_OR_ITR1_RMP_SHIFT) /* 11: TIM2_ITR1 input connected to OTG HS SOF */
+
+#define TIM5_OR_TI4_RMP_SHIFT     (6)     /* Bits 6-7: Internal trigger 4 remap */
+#define TIM5_OR_TI4_RMP_MASK      (3 << TIM5_OR_TI4_RMP_SHIFT)
+#  define TIM5_OR_TI4_GPIO        (0 << TIM5_OR_TI4_RMP_SHIFT) /* 00: TIM5_CH4 input connected to GPIO */
+#  define TIM5_OR_TI4_LSI         (1 << TIM5_OR_TI4_RMP_SHIFT) /* 01: TIM5_CH4 input connected to LSI internal clock */
+#  define TIM5_OR_TI4_LSE         (2 << TIM5_OR_TI4_RMP_SHIFT) /* 10: TIM5_CH4 input connected to LSE internal clock */
+#  define TIM5_OR_TI4_RTC         (3 << TIM5_OR_TI4_RMP_SHIFT) /* 11: TIM5_CH4 input connected to RTC output event */
+
+#define TIM11_OR_TI1_RMP_SHIFT    (6)     /* Bits 6-7: Internal trigger 4 remap */
+#define TIM11_OR_TI1_RMP_MASK     (3 << TIM11_OR_TI1_RMP_SHIFT)
+#  define TIM11_OR_TI1_GPIO       (0 << TIM11_OR_TI1_RMP_SHIFT) /* 00-11: TIM11_CH1 input connected to GPIO */
+#  define TIM11_OR_TI1_HSERTC     (3 << TIM11_OR_TI1_RMP_SHIFT) /* 11: TIM11_CH1 input connected to HSE_RTC clock */
+
+
+/* Control register 1 */
+
+#define BTIM_CR1_CEN              (1 << 0)  /* Bit 0: Counter enable */
+#define BTIM_CR1_UDIS             (1 << 1)  /* Bit 1: Update Disable */
+#define BTIM_CR1_URS              (1 << 2)  /* Bit 2: Update Request Source */
+#define BTIM_CR1_OPM              (1 << 3)  /* Bit 3: One Pulse Mode */
+#define BTIM_CR1_ARPE             (1 << 7)  /* Bit 7: Auto-Reload Preload enable */
+
+/* Control register 2 */
+
+#define BTIM_CR2_MMS_SHIFT        (4)       /* Bits 6-4: Master Mode Selection */
+#define BTIM_CR2_MMS_MASK         (7 << BTIM_CR2_MMS_SHIFT)
+#  define BTIM_CR2_RESET          (0 << BTIM_CR2_MMS_SHIFT) /* 000: Reset */
+#  define BTIM_CR2_ENAB           (1 << BTIM_CR2_MMS_SHIFT) /* 001: Enable */
+#  define BTIM_CR2_UPDT           (2 << BTIM_CR2_MMS_SHIFT) /* 010: Update */
+
+/* DMA/Interrupt enable register */
+
+#define BTIM_DIER_UIE             (1 << 0)  /* Bit 0: Update interrupt enable */
+#define BTIM_DIER_UDE             (1 << 8)  /* Bit 8: Update DMA request enable */
+
+/* Status register */
+
+#define BTIM_SR_UIF               (1 << 0)  /* Bit 0: Update interrupt flag */
+
+/* Event generation register */
+
+#define BTIM_EGR_UG               (1 << 0)  /* Bit 0: Update generation */
+
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XX75XX_TIM_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx77xx_adc.h b/arch/arm/src/stm32f7/chip/stm32f74xx77xx_adc.h
new file mode 100644
index 0000000000000000000000000000000000000000..bc79490798be7c1b0077d01c4c5373520d024a02
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32f74xx77xx_adc.h
@@ -0,0 +1,484 @@
+/****************************************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32f74xx77xx_adc.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XX77XX_ADC_H
+#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XX77XX_ADC_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+/* Register Offsets *********************************************************************************/
+
+#define STM32_ADC_SR_OFFSET          0x0000  /* ADC status register (32-bit) */
+#define STM32_ADC_CR1_OFFSET         0x0004  /* ADC control register 1 (32-bit) */
+#define STM32_ADC_CR2_OFFSET         0x0008  /* ADC control register 2 (32-bit) */
+#define STM32_ADC_SMPR1_OFFSET       0x000c  /* ADC sample time register 1 (32-bit) */
+#define STM32_ADC_SMPR2_OFFSET       0x0010  /* ADC sample time register 2 (32-bit) */
+#define STM32_ADC_JOFR1_OFFSET       0x0014  /* ADC injected channel data offset register 1 (32-bit) */
+#define STM32_ADC_JOFR2_OFFSET       0x0018  /* ADC injected channel data offset register 2 (32-bit) */
+#define STM32_ADC_JOFR3_OFFSET       0x001c  /* ADC injected channel data offset register 3 (32-bit) */
+#define STM32_ADC_JOFR4_OFFSET       0x0020  /* ADC injected channel data offset register 4 (32-bit) */
+#define STM32_ADC_HTR_OFFSET         0x0024  /* ADC watchdog high threshold register (32-bit) */
+#define STM32_ADC_LTR_OFFSET         0x0028  /* ADC watchdog low threshold register (32-bit) */
+#define STM32_ADC_SQR1_OFFSET        0x002c  /* ADC regular sequence register 1 (32-bit) */
+#define STM32_ADC_SQR2_OFFSET        0x0030  /* ADC regular sequence register 2 (32-bit) */
+#define STM32_ADC_SQR3_OFFSET        0x0034  /* ADC regular sequence register 3 (32-bit) */
+#define STM32_ADC_JSQR_OFFSET        0x0038  /* ADC injected sequence register (32-bit) */
+#define STM32_ADC_JDR1_OFFSET        0x003c  /* ADC injected data register 1 (32-bit) */
+#define STM32_ADC_JDR2_OFFSET        0x0040  /* ADC injected data register 1 (32-bit) */
+#define STM32_ADC_JDR3_OFFSET        0x0044  /* ADC injected data register 1 (32-bit) */
+#define STM32_ADC_JDR4_OFFSET        0x0048  /* ADC injected data register 1 (32-bit) */
+#define STM32_ADC_DR_OFFSET          0x004c  /* ADC regular data register (32-bit) */
+
+
+#define STM32_ADC_CSR_OFFSET         0x0000  /* Common status register */
+#define STM32_ADC_CCR_OFFSET         0x0004  /* Common control register */
+#define STM32_ADC_CDR_OFFSET         0x0008  /* Data register for dual and triple modes */
+
+/* Register Addresses *******************************************************************************/
+
+#if STM32F7_NADC > 0
+#  define STM32_ADC1_SR              (STM32_ADC1_BASE+STM32_ADC_SR_OFFSET)
+#  define STM32_ADC1_CR1             (STM32_ADC1_BASE+STM32_ADC_CR1_OFFSET)
+#  define STM32_ADC1_CR2             (STM32_ADC1_BASE+STM32_ADC_CR2_OFFSET)
+#  define STM32_ADC1_SMPR1           (STM32_ADC1_BASE+STM32_ADC_SMPR1_OFFSET)
+#  define STM32_ADC1_SMPR2           (STM32_ADC1_BASE+STM32_ADC_SMPR2_OFFSET)
+#  define STM32_ADC1_JOFR1           (STM32_ADC1_BASE+STM32_ADC_JOFR1_OFFSET)
+#  define STM32_ADC1_JOFR2           (STM32_ADC1_BASE+STM32_ADC_JOFR2_OFFSET)
+#  define STM32_ADC1_JOFR3           (STM32_ADC1_BASE+STM32_ADC_JOFR3_OFFSET)
+#  define STM32_ADC1_JOFR4           (STM32_ADC1_BASE+STM32_ADC_JOFR4_OFFSET)
+#  define STM32_ADC1_HTR             (STM32_ADC1_BASE+STM32_ADC_HTR_OFFSET)
+#  define STM32_ADC1_LTR             (STM32_ADC1_BASE+STM32_ADC_LTR_OFFSET)
+#  define STM32_ADC1_SQR1            (STM32_ADC1_BASE+STM32_ADC_SQR1_OFFSET)
+#  define STM32_ADC1_SQR2            (STM32_ADC1_BASE+STM32_ADC_SQR2_OFFSET)
+#  define STM32_ADC1_SQR3            (STM32_ADC1_BASE+STM32_ADC_SQR3_OFFSET)
+#  define STM32_ADC1_JSQR            (STM32_ADC1_BASE+STM32_ADC_JSQR_OFFSET)
+#  define STM32_ADC1_JDR1            (STM32_ADC1_BASE+STM32_ADC_JDR1_OFFSET)
+#  define STM32_ADC1_JDR2            (STM32_ADC1_BASE+STM32_ADC_JDR2_OFFSET)
+#  define STM32_ADC1_JDR3            (STM32_ADC1_BASE+STM32_ADC_JDR3_OFFSET)
+#  define STM32_ADC1_JDR4            (STM32_ADC1_BASE+STM32_ADC_JDR4_OFFSET)
+#  define STM32_ADC1_DR              (STM32_ADC1_BASE+STM32_ADC_DR_OFFSET)
+#endif
+
+#if STM32F7_NADC > 1
+#  define STM32_ADC2_SR              (STM32_ADC2_BASE+STM32_ADC_SR_OFFSET)
+#  define STM32_ADC2_CR1             (STM32_ADC2_BASE+STM32_ADC_CR1_OFFSET)
+#  define STM32_ADC2_CR2             (STM32_ADC2_BASE+STM32_ADC_CR2_OFFSET)
+#  define STM32_ADC2_SMPR1           (STM32_ADC2_BASE+STM32_ADC_SMPR1_OFFSET)
+#  define STM32_ADC2_SMPR2           (STM32_ADC2_BASE+STM32_ADC_SMPR2_OFFSET)
+#  define STM32_ADC2_JOFR1           (STM32_ADC2_BASE+STM32_ADC_JOFR1_OFFSET)
+#  define STM32_ADC2_JOFR2           (STM32_ADC2_BASE+STM32_ADC_JOFR2_OFFSET)
+#  define STM32_ADC2_JOFR3           (STM32_ADC2_BASE+STM32_ADC_JOFR3_OFFSET)
+#  define STM32_ADC2_JOFR4           (STM32_ADC2_BASE+STM32_ADC_JOFR4_OFFSET)
+#  define STM32_ADC2_HTR             (STM32_ADC2_BASE+STM32_ADC_HTR_OFFSET)
+#  define STM32_ADC2_LTR             (STM32_ADC2_BASE+STM32_ADC_LTR_OFFSET)
+#  define STM32_ADC2_SQR1            (STM32_ADC2_BASE+STM32_ADC_SQR1_OFFSET)
+#  define STM32_ADC2_SQR2            (STM32_ADC2_BASE+STM32_ADC_SQR2_OFFSET)
+#  define STM32_ADC2_SQR3            (STM32_ADC2_BASE+STM32_ADC_SQR3_OFFSET)
+#  define STM32_ADC2_JSQR            (STM32_ADC2_BASE+STM32_ADC_JSQR_OFFSET)
+#  define STM32_ADC2_JDR1            (STM32_ADC2_BASE+STM32_ADC_JDR1_OFFSET)
+#  define STM32_ADC2_JDR2            (STM32_ADC2_BASE+STM32_ADC_JDR2_OFFSET)
+#  define STM32_ADC2_JDR3            (STM32_ADC2_BASE+STM32_ADC_JDR3_OFFSET)
+#  define STM32_ADC2_JDR4            (STM32_ADC2_BASE+STM32_ADC_JDR4_OFFSET)
+#  define STM32_ADC2_DR              (STM32_ADC2_BASE+STM32_ADC_DR_OFFSET)
+#endif
+
+#if STM32F7_NADC > 2
+#  define STM32_ADC3_SR              (STM32_ADC3_BASE+STM32_ADC_SR_OFFSET)
+#  define STM32_ADC3_CR1             (STM32_ADC3_BASE+STM32_ADC_CR1_OFFSET)
+#  define STM32_ADC3_CR2             (STM32_ADC3_BASE+STM32_ADC_CR2_OFFSET)
+#  define STM32_ADC3_SMPR1           (STM32_ADC3_BASE+STM32_ADC_SMPR1_OFFSET)
+#  define STM32_ADC3_SMPR2           (STM32_ADC3_BASE+STM32_ADC_SMPR2_OFFSET)
+#  define STM32_ADC3_JOFR1           (STM32_ADC3_BASE+STM32_ADC_JOFR1_OFFSET)
+#  define STM32_ADC3_JOFR2           (STM32_ADC3_BASE+STM32_ADC_JOFR2_OFFSET)
+#  define STM32_ADC3_JOFR3           (STM32_ADC3_BASE+STM32_ADC_JOFR3_OFFSET)
+#  define STM32_ADC3_JOFR4           (STM32_ADC3_BASE+STM32_ADC_JOFR4_OFFSET)
+#  define STM32_ADC3_HTR             (STM32_ADC3_BASE+STM32_ADC_HTR_OFFSET)
+#  define STM32_ADC3_LTR             (STM32_ADC3_BASE+STM32_ADC_LTR_OFFSET)
+#  define STM32_ADC3_SQR1            (STM32_ADC3_BASE+STM32_ADC_SQR1_OFFSET)
+#  define STM32_ADC3_SQR2            (STM32_ADC3_BASE+STM32_ADC_SQR2_OFFSET)
+#  define STM32_ADC3_SQR3            (STM32_ADC3_BASE+STM32_ADC_SQR3_OFFSET)
+#  define STM32_ADC3_JSQR            (STM32_ADC3_BASE+STM32_ADC_JSQR_OFFSET)
+#  define STM32_ADC3_JDR1            (STM32_ADC3_BASE+STM32_ADC_JDR1_OFFSET)
+#  define STM32_ADC3_JDR2            (STM32_ADC3_BASE+STM32_ADC_JDR2_OFFSET)
+#  define STM32_ADC3_JDR3            (STM32_ADC3_BASE+STM32_ADC_JDR3_OFFSET)
+#  define STM32_ADC3_JDR4            (STM32_ADC3_BASE+STM32_ADC_JDR4_OFFSET)
+#  define STM32_ADC3_DR              (STM32_ADC3_BASE+STM32_ADC_DR_OFFSET)
+#endif
+
+#define STM32_ADC_CSR                (STM32_ADCCMN_BASE+STM32_ADC_CSR_OFFSET)
+#define STM32_ADC_CCR                (STM32_ADCCMN_BASE+STM32_ADC_CCR_OFFSET)
+#define STM32_ADC_CDR                (STM32_ADCCMN_BASE+STM32_ADC_CDR_OFFSET)
+
+/* Register Bitfield Definitions ********************************************************************/
+
+/* ADC status register */
+
+#define ADC_SR_AWD                   (1 << 0)  /* Bit 0 : Analog watchdog flag */
+#define ADC_SR_EOC                   (1 << 1)  /* Bit 1 : End of conversion */
+#define ADC_SR_JEOC                  (1 << 2)  /* Bit 2 : Injected channel end of conversion */
+#define ADC_SR_JSTRT                 (1 << 3)  /* Bit 3 : Injected channel Start flag */
+#define ADC_SR_STRT                  (1 << 4)  /* Bit 4 : Regular channel Start flag */
+#define ADC_SR_OVR                   (1 << 5)  /* Bit 5 : Overrun */
+
+/* ADC control register 1 */
+
+#define ADC_CR1_AWDCH_SHIFT          (0)       /* Bits 4-0: Analog watchdog channel select bits */
+#define ADC_CR1_AWDCH_MASK           (0x1f << ADC_CR1_AWDCH_SHIFT)
+#define ADC_CR1_EOCIE                (1 << 5)  /* Bit 5: Interrupt enable for EOC */
+#define ADC_CR1_AWDIE                (1 << 6)  /* Bit 6: Analog Watchdog interrupt enable */
+#define ADC_CR1_JEOCIE               (1 << 7)  /* Bit 7: Interrupt enable for injected channels */
+#define ADC_CR1_SCAN                 (1 << 8)  /* Bit 8: Scan mode */
+#define ADC_CR1_AWDSGL               (1 << 9)  /* Bit 9: Enable the watchdog on a single channel in scan mode */
+#define ADC_CR1_JAUTO                (1 << 10) /* Bit 10: Automatic Injected Group conversion */
+#define ADC_CR1_DISCEN               (1 << 11) /* Bit 11: Discontinuous mode on regular channels */
+#define ADC_CR1_JDISCEN              (1 << 12) /* Bit 12: Discontinuous mode on injected channels */
+#define ADC_CR1_DISCNUM_SHIFT        (13)      /* Bits 15-13: Discontinuous mode channel count */
+#define ADC_CR1_DISCNUM_MASK         (0x07 << ADC_CR1_DISCNUM_SHIFT)
+#define ADC_CR1_JAWDEN               (1 << 22) /* Bit 22: Analog watchdog enable on injected channels */
+#define ADC_CR1_AWDEN                (1 << 23) /* Bit 23: Analog watchdog enable on regular channels */
+#define ADC_CR1_RES_SHIFT            (24)      /* Bits 24-25: Resolution */
+#define ADC_CR1_RES_MASK             (3 << ADC_CR1_RES_SHIFT)
+#define ADC_CR1_RES_12BIT            (0 << ADC_CR1_RES_SHIFT) /* 15 ADCCLK cycles. For STM32L15XX: 12 ADCCLK cycles */
+#define ADC_CR1_RES_10BIT            (1 << ADC_CR1_RES_SHIFT) /* 13 ADCCLK cycles. For STM32L15XX: 11 ADCCLK cycles */
+#define ADC_CR1_RES_8BIT             (2 << ADC_CR1_RES_SHIFT) /* 11 ADCCLK cycles. For STM32L15XX: 9 ADCCLK cycles */
+#define ADC_CR1_RES_6BIT             (3 << ADC_CR1_RES_SHIFT) /* 9 ADCCLK cycles. For STM32L15XX: 7 ADCCLK cycles */
+#define ADC_CR1_OVRIE                (1 << 26) /* Bit 26: Overrun interrupt enable */
+
+/* ADC control register 2 */
+
+#define ADC_CR2_ADON                 (1 << 0)  /* Bit 0: A/D Converter ON / OFF */
+#define ADC_CR2_CONT                 (1 << 1)  /* Bit 1: Continuous Conversion */
+#define ADC_CR2_DMA                  (1 << 8)  /* Bit 8: Direct Memory access mode */
+#define ADC_CR2_DDS                  (1 << 9)  /* Bit 9: DMA disable selection (for single ADC mode) */
+#define ADC_CR2_EOCS                 (1 << 10) /* Bit 10: End of conversion selection */
+#define ADC_CR2_ALIGN                (1 << 11) /* Bit 11: Data Alignment */
+                                               /* Bits 12-15: Reserved */
+#define ADC_CR2_JEXTSEL_SHIFT        (16)      /* Bits 16-19: External event select for injected group */
+#define ADC_CR2_JEXTSEL_MASK         (0x0f << ADC_CR2_JEXTSEL_SHIFT)
+#define ADC_CR2_JEXTSEL_T1TRGO       (0x00 << ADC_CR2_JEXTSEL_SHIFT) /* 0000: Timer 1 TRGO event */
+#define ADC_CR2_JEXTSEL_T1CC4        (0x01 << ADC_CR2_JEXTSEL_SHIFT) /* 0001: Timer 1 CC4 event */
+#define ADC_CR2_JEXTSEL_T2TRGO       (0x02 << ADC_CR2_JEXTSEL_SHIFT) /* 0010: Timer 2 TRGO event */
+#define ADC_CR2_JEXTSEL_T2CC1        (0x03 << ADC_CR2_JEXTSEL_SHIFT) /* 0011: Timer 2 CC1 event */
+#define ADC_CR2_JEXTSEL_T3CC4        (0x04 << ADC_CR2_JEXTSEL_SHIFT) /* 0100: Timer 3 CC4 event */
+#define ADC_CR2_JEXTSEL_T4TRGO       (0x05 << ADC_CR2_JEXTSEL_SHIFT) /* 0101: Timer 4 TRGO event */
+                                                                     /* 0110: NA */
+#define ADC_CR2_JEXTSEL_T8CC4        (0x07 << ADC_CR2_JEXTSEL_SHIFT) /* 0111: Timer 8 CC4 event */
+#define ADC_CR2_JEXTSEL_T1TRGO2      (0x08 << ADC_CR2_JEXTSEL_SHIFT) /* 1000: Timer 1 TRGO2 event */
+#define ADC_CR2_JEXTSEL_T8TRGO       (0x09 << ADC_CR2_JEXTSEL_SHIFT) /* 1001: Timer 8 TRGO event */
+#define ADC_CR2_JEXTSEL_T8TRGO2      (0x0a << ADC_CR2_JEXTSEL_SHIFT) /* 1010: Timer 8 TRGO2 event */
+#define ADC_CR2_JEXTSEL_T3CC3        (0x0b << ADC_CR2_JEXTSEL_SHIFT) /* 1011: Timer 3 CC3 event */
+#define ADC_CR2_JEXTSEL_T5TRGO       (0x0c << ADC_CR2_JEXTSEL_SHIFT) /* 1100: Timer 5 TRGO event */
+#define ADC_CR2_JEXTSEL_T3CC1        (0x0d << ADC_CR2_JEXTSEL_SHIFT) /* 1101: Timer 3 CC1 event */
+#define ADC_CR2_JEXTSEL_T6TRGO       (0x0e << ADC_CR2_JEXTSEL_SHIFT) /* 1110: Timer 6 TRGO event */
+                                                                     /* 1111: Reserved */
+#define ADC_CR2_JEXTEN_SHIFT         (20)      /* Bits 20-21: External trigger enable for injected channels */
+#define ADC_CR2_JEXTEN_MASK          (3 << ADC_CR2_JEXTEN_SHIFT)
+#define ADC_CR2_JEXTEN_NONE          (0 << ADC_CR2_JEXTEN_SHIFT) /* 00: Trigger detection disabled */
+#define ADC_CR2_JEXTEN_RISING        (1 << ADC_CR2_JEXTEN_SHIFT) /* 01: Trigger detection on the rising edge */
+#define ADC_CR2_JEXTEN_FALLING       (2 << ADC_CR2_JEXTEN_SHIFT) /* 10: Trigger detection on the falling edge */
+#define ADC_CR2_JEXTEN_BOTH          (3 << ADC_CR2_JEXTEN_SHIFT) /* 11: Trigger detection on both the rising and falling edges */
+#define ADC_CR2_JSWSTART             (1 << 22) /* Bit 22: Start Conversion of injected channels */
+                                               /* Bit 23: Reserved, must be kept at reset value. */
+#define ADC_CR2_EXTSEL_SHIFT         (24)      /* Bits 24-27: External Event Select for regular group */
+#define ADC_CR2_EXTSEL_MASK          (0x0f << ADC_CR2_EXTSEL_SHIFT)
+#define ADC_CR2_EXTSEL_T1CC1         (0x0 << ADC_CR2_EXTSEL_SHIFT)  /* 0000: Timer 1 CC1 event */
+#define ADC_CR2_EXTSEL_T1CC2         (0x01 << ADC_CR2_EXTSEL_SHIFT) /* 0001: Timer 1 CC2 event */
+#define ADC_CR2_EXTSEL_T1CC3         (0x02 << ADC_CR2_EXTSEL_SHIFT) /* 0010: Timer 1 CC3 event */
+#define ADC_CR2_EXTSEL_T2CC2         (0x03 << ADC_CR2_EXTSEL_SHIFT) /* 0011: Timer 2 CC2 event */
+#define ADC_CR2_EXTSEL_T5TRGO        (0x04 << ADC_CR2_EXTSEL_SHIFT) /* 0100: Timer 5 TRGO event */
+#define ADC_CR2_EXTSEL_T4CC4         (0x05 << ADC_CR2_EXTSEL_SHIFT) /* 0101: Timer 4 CC4 event */
+#define ADC_CR2_EXTSEL_T3CC4         (0x06 << ADC_CR2_EXTSEL_SHIFT) /* 0110: Timer 3 CC4 event */
+#define ADC_CR2_EXTSEL_T8TRGO        (0x07 << ADC_CR2_EXTSEL_SHIFT) /* 0111: Timer 8 TRGO event */
+#define ADC_CR2_EXTSEL_T8TRGO2       (0x08 << ADC_CR2_EXTSEL_SHIFT) /* 1000: Timer 8 TRGO2 event */
+#define ADC_CR2_EXTSEL_T1TRGO        (0x09 << ADC_CR2_EXTSEL_SHIFT) /* 1001: Timer 1 TRGO event */
+#define ADC_CR2_EXTSEL_T1TRGO2       (0x0a << ADC_CR2_EXTSEL_SHIFT) /* 1010: Timer 1 TRGO2 event */
+#define ADC_CR2_EXTSEL_T2TRGO        (0x0b << ADC_CR2_EXTSEL_SHIFT) /* 1011: Timer 2 TRGO event */
+#define ADC_CR2_EXTSEL_T4TRGO        (0x0c << ADC_CR2_EXTSEL_SHIFT) /* 1100: Timer 4 TRGO event */
+#define ADC_CR2_EXTSEL_T6TRGO        (0x0d << ADC_CR2_EXTSEL_SHIFT) /* 1101: Timer 6 TRGO event */
+                                                                    /* 1110: NA */
+#define ADC_CR2_EXTSEL_EXTI11        (0x0f << ADC_CR2_EXTSEL_SHIFT) /* 1111: EXTI line 11 */
+#define ADC_CR2_EXTEN_SHIFT          (28)      /* Bits 28-29: External trigger enable for regular channels */
+#define ADC_CR2_EXTEN_MASK           (3 << ADC_CR2_EXTEN_SHIFT)
+#define ADC_CR2_EXTEN_NONE           (0 << ADC_CR2_EXTEN_SHIFT) /* 00: Trigger detection disabled */
+#define ADC_CR2_EXTEN_RISING         (1 << ADC_CR2_EXTEN_SHIFT) /* 01: Trigger detection on the rising edge */
+#define ADC_CR2_EXTEN_FALLING        (2 << ADC_CR2_EXTEN_SHIFT) /* 10: Trigger detection on the falling edge */
+#define ADC_CR2_EXTEN_BOTH           (3 << ADC_CR2_EXTEN_SHIFT) /* 11: Trigger detection on both the rising and falling edges */
+
+#  define ADC_CR2_SWSTART            (1 << 30) /* Bit 30: Start Conversion of regular channels */
+
+/* ADC sample time register 1 */
+
+#define ADC_SMPR_3                   0         /* 000: 3 cycles */
+#define ADC_SMPR_15                  1         /* 001: 15 cycles */
+#define ADC_SMPR_28                  2         /* 010: 28 cycles */
+#define ADC_SMPR_56                  3         /* 011: 56 cycles */
+#define ADC_SMPR_84                  4         /* 100: 84 cycles */
+#define ADC_SMPR_112                 5         /* 101: 112 cycles */
+#define ADC_SMPR_144                 6         /* 110: 144 cycles */
+#define ADC_SMPR_480                 7         /* 111: 480 cycles */
+#define ADC_SMPR1_SMP10_SHIFT        (0)       /* Bits 0-2: Channel 10 Sample time selection */
+#define ADC_SMPR1_SMP10_MASK         (7 << ADC_SMPR1_SMP10_SHIFT)
+#define ADC_SMPR1_SMP11_SHIFT        (3)       /* Bits 3-5: Channel 11 Sample time selection */
+#define ADC_SMPR1_SMP11_MASK         (7 << ADC_SMPR1_SMP11_SHIFT)
+#define ADC_SMPR1_SMP12_SHIFT        (6)       /* Bits 6-8: Channel 12 Sample time selection */
+#define ADC_SMPR1_SMP12_MASK         (7 << ADC_SMPR1_SMP12_SHIFT)
+#define ADC_SMPR1_SMP13_SHIFT        (9)       /* Bits 9-11: Channel 13 Sample time selection */
+#define ADC_SMPR1_SMP13_MASK         (7 << ADC_SMPR1_SMP13_SHIFT)
+#define ADC_SMPR1_SMP14_SHIFT        (12)      /* Bits 12-14: Channel 14 Sample time selection */
+#define ADC_SMPR1_SMP14_MASK         (7 << ADC_SMPR1_SMP14_SHIFT)
+#define ADC_SMPR1_SMP15_SHIFT        (15)      /* Bits 15-17: Channel 15 Sample time selection */
+#define ADC_SMPR1_SMP15_MASK         (7 << ADC_SMPR1_SMP15_SHIFT)
+#define ADC_SMPR1_SMP16_SHIFT        (18)      /* Bits 18-20: Channel 16 Sample time selection */
+#define ADC_SMPR1_SMP16_MASK         (7 << ADC_SMPR1_SMP16_SHIFT)
+#define ADC_SMPR1_SMP17_SHIFT        (21)      /* Bits 21-23: Channel 17 Sample time selection */
+#define ADC_SMPR1_SMP17_MASK         (7 << ADC_SMPR1_SMP17_SHIFT)
+#define ADC_SMPR1_SMP18_SHIFT        (24)      /* Bits 24-26: Channel 18 Sample time selection */
+#define ADC_SMPR1_SMP18_MASK         (7 << ADC_SMPR1_SMP17_SHIFT)
+
+
+/* ADC sample time register 2 */
+
+#define ADC_SMPR2_SMP0_SHIFT         (0)       /* Bits 2-0: Channel 0 Sample time selection */
+#define ADC_SMPR2_SMP0_MASK          (7 << ADC_SMPR2_SMP0_SHIFT)
+#define ADC_SMPR2_SMP1_SHIFT         (3)       /* Bits 5-3: Channel 1 Sample time selection */
+#define ADC_SMPR2_SMP1_MASK          (7 << ADC_SMPR2_SMP1_SHIFT)
+#define ADC_SMPR2_SMP2_SHIFT         (6)       /* Bits 8-6: Channel 2 Sample time selection */
+#define ADC_SMPR2_SMP2_MASK          (7 << ADC_SMPR2_SMP2_SHIFT)
+#define ADC_SMPR2_SMP3_SHIFT         (9)       /* Bits 11-9: Channel 3 Sample time selection */
+#define ADC_SMPR2_SMP3_MASK          (7 << ADC_SMPR2_SMP3_SHIFT)
+#define ADC_SMPR2_SMP4_SHIFT         (12)      /* Bits 14-12: Channel 4 Sample time selection */
+#define ADC_SMPR2_SMP4_MASK          (7 << ADC_SMPR2_SMP4_SHIFT)
+#define ADC_SMPR2_SMP5_SHIFT         (15)      /* Bits 17-15: Channel 5 Sample time selection */
+#define ADC_SMPR2_SMP5_MASK          (7 << ADC_SMPR2_SMP5_SHIFT)
+#define ADC_SMPR2_SMP6_SHIFT         (18)      /* Bits 20-18: Channel 6 Sample time selection */
+#define ADC_SMPR2_SMP6_MASK          (7 << ADC_SMPR2_SMP6_SHIFT)
+#define ADC_SMPR2_SMP7_SHIFT         (21)      /* Bits 23-21: Channel 7 Sample time selection */
+#define ADC_SMPR2_SMP7_MASK          (7 << ADC_SMPR2_SMP7_SHIFT)
+#define ADC_SMPR2_SMP8_SHIFT         (24)      /* Bits 26-24: Channel 8 Sample time selection */
+#define ADC_SMPR2_SMP8_MASK          (7 << ADC_SMPR2_SMP8_SHIFT)
+#define ADC_SMPR2_SMP9_SHIFT         (27)      /* Bits 29-27: Channel 9 Sample time selection */
+#define ADC_SMPR2_SMP9_MASK          (7 << ADC_SMPR2_SMP9_SHIFT)
+
+
+/* ADC injected channel data offset register 1-4 */
+
+#define ADC_JOFR_SHIFT               (0)       /* Bits 11-0: Data offset for injected channel x */
+#define ADC_JOFR_MASK                (0x0fff << ADC_JOFR_SHIFT)
+
+/* ADC watchdog high threshold register */
+
+#define ADC_HTR_SHIFT                (0)       /* Bits 11-0: Analog watchdog high threshold */
+#define ADC_HTR_MASK                 (0x0fff << ADC_HTR_SHIFT)
+
+/* ADC watchdog low threshold register */
+
+#define ADC_LTR_SHIFT                (0)       /* Bits 11-0: Analog watchdog low threshold */
+#define ADC_LTR_MASK                 (0x0fff << ADC_LTR_SHIFT)
+
+/* ADC regular sequence register 1 */
+
+#define ADC_SQR1_SQ13_SHIFT          (0)       /* Bits 4-0: 13th conversion in regular sequence */
+#define ADC_SQR1_SQ13_MASK           (0x1f << ADC_SQR1_SQ13_SHIFT)
+#define ADC_SQR1_SQ14_SHIFT          (5)       /* Bits 9-5: 14th conversion in regular sequence */
+#define ADC_SQR1_SQ14_MASK           (0x1f << ADC_SQR1_SQ14_SHIFT)
+#define ADC_SQR1_SQ15_SHIFT          (10)      /* Bits 14-10: 15th conversion in regular sequence */
+#define ADC_SQR1_SQ15_MASK           (0x1f << ADC_SQR1_SQ15_SHIFT)
+#define ADC_SQR1_SQ16_SHIFT          (15)      /* Bits 19-15: 16th conversion in regular sequence */
+#define ADC_SQR1_SQ16_MASK           (0x1f << ADC_SQR1_SQ16_SHIFT)
+#define ADC_SQR1_L_SHIFT             (20)      /* Bits 23-20: Regular channel sequence length */
+#define ADC_SQR1_L_MASK              (0x0f << ADC_SQR1_L_SHIFT)
+#define ADC_SQR1_RESERVED            (0xff000000)
+#define ADC_SQR1_FIRST               (13)
+#define ADC_SQR1_LAST                (16)
+#define ADC_SQR1_SQ_OFFSET           (0)
+
+/* ADC regular sequence register 2 */
+
+#define ADC_SQR2_SQ7_SHIFT           (0)       /* Bits 4-0: 7th conversion in regular sequence */
+#define ADC_SQR2_SQ7_MASK            (0x1f << ADC_SQR2_SQ7_SHIFT)
+#define ADC_SQR2_SQ8_SHIFT           (5)       /* Bits 9-5: 8th conversion in regular sequence */
+#define ADC_SQR2_SQ8_MASK            (0x1f << ADC_SQR2_SQ8_SHIFT)
+#define ADC_SQR2_SQ9_SHIFT           (10)      /* Bits 14-10: 9th conversion in regular sequence */
+#define ADC_SQR2_SQ9_MASK            (0x1f << ADC_SQR2_SQ9_SHIFT)
+#define ADC_SQR2_SQ10_SHIFT          (15)      /* Bits 19-15: 10th conversion in regular sequence */
+#define ADC_SQR2_SQ10_MASK           (0x1f << ADC_SQR2_SQ10_SHIFT)
+#define ADC_SQR2_SQ11_SHIFT          (20)      /* Bits 24-20: 11th conversion in regular sequence */
+#define ADC_SQR2_SQ11_MASK           (0x1f << ADC_SQR2_SQ11_SHIFT )
+#define ADC_SQR2_SQ12_SHIFT          (25)      /* Bits 29-25: 12th conversion in regular sequence */
+#define ADC_SQR2_SQ12_MASK           (0x1f << ADC_SQR2_SQ12_SHIFT)
+#define ADC_SQR2_RESERVED            (0xc0000000)
+#define ADC_SQR2_FIRST               (7)
+#define ADC_SQR2_LAST                (12)
+#define ADC_SQR2_SQ_OFFSET           (0)
+
+/* ADC regular sequence register 3 */
+
+#define ADC_SQR3_SQ1_SHIFT           (0)       /* Bits 4-0: 1st conversion in regular sequence */
+#define ADC_SQR3_SQ1_MASK            (0x1f << ADC_SQR3_SQ1_SHIFT)
+#define ADC_SQR3_SQ2_SHIFT           (5)       /* Bits 9-5: 2nd conversion in regular sequence */
+#define ADC_SQR3_SQ2_MASK            (0x1f << ADC_SQR3_SQ2_SHIFT)
+#define ADC_SQR3_SQ3_SHIFT           (10)      /* Bits 14-10: 3rd conversion in regular sequence */
+#define ADC_SQR3_SQ3_MASK            (0x1f << ADC_SQR3_SQ3_SHIFT)
+#define ADC_SQR3_SQ4_SHIFT           (15)      /* Bits 19-15: 4th conversion in regular sequence */
+#define ADC_SQR3_SQ4_MASK            (0x1f << ADC_SQR3_SQ4_SHIFT)
+#define ADC_SQR3_SQ5_SHIFT           (20)      /* Bits 24-20: 5th conversion in regular sequence */
+#define ADC_SQR3_SQ5_MASK            (0x1f << ADC_SQR3_SQ5_SHIFT )
+#define ADC_SQR3_SQ6_SHIFT           (25)      /* Bits 29-25: 6th conversion in regular sequence */
+#define ADC_SQR3_SQ6_MASK            (0x1f << ADC_SQR3_SQ6_SHIFT)
+#define ADC_SQR3_RESERVED            (0xc0000000)
+#define ADC_SQR3_FIRST               (1)
+#define ADC_SQR3_LAST                (6)
+#define ADC_SQR3_SQ_OFFSET           (0)
+
+/* Offset between SQ bits */
+
+#define ADC_SQ_OFFSET                (5)
+
+/* ADC injected sequence register */
+
+#define ADC_JSQR_JSQ1_SHIFT          (0)       /* Bits 4-0: 1st conversion in injected sequence */
+#define ADC_JSQR_JSQ1_MASK           (0x1f << ADC_JSQR_JSQ1_SHIFT)
+#define ADC_JSQR_JSQ2_SHIFT          (5)       /* Bits 9-5: 2nd conversion in injected sequence */
+#define ADC_JSQR_JSQ2_MASK           (0x1f << ADC_JSQR_JSQ2_SHIFT)
+#define ADC_JSQR_JSQ3_SHIFT          (10)      /* Bits 14-10: 3rd conversion in injected sequence */
+#define ADC_JSQR_JSQ3_MASK           (0x1f << ADC_JSQR_JSQ3_SHIFT)
+#define ADC_JSQR_JSQ4_SHIFT          (15)      /* Bits 19-15: 4th conversion in injected sequence */
+#define ADC_JSQR_JSQ4_MASK           (0x1f << ADC_JSQR_JSQ4_SHIFT)
+#define ADC_JSQR_JL_SHIFT            (20)      /* Bits 21-20: Injected Sequence length */
+#define ADC_JSQR_JL_MASK             (3 << ADC_JSQR_JL_SHIFT)
+
+/* ADC injected data register 1-4 */
+
+#define ADC_JDR_JDATA_SHIFT          (0)       /* Bits 15-0: Injected data */
+#define ADC_JDR_JDATA_MASK           (0xffff << ADC_JDR_JDATA_SHIFT)
+
+/* ADC regular data register */
+
+#define ADC_DR_RDATA_SHIFT           (0)       /* Bits 15-0 Regular data */
+#define ADC_DR_RDATA_MASK            (0xffff << ADC_DR_RDATA_SHIFT)
+
+/* Common status register */
+
+#define ADC_CSR_AWD1                 (1 << 0)  /* Bit 0:  Analog watchdog flag of ADC1 (copy of AWD in ADC1_SR) */
+#define ADC_CSR_EOC1                 (1 << 1)  /* Bit 1:  End of conversion of ADC1 (copy of EOC in ADC1_SR) */
+#define ADC_CSR_JEOC1                (1 << 2)  /* Bit 2:  Injected channel end of conversion of ADC1 (copy of JEOC in ADC1_SR) */
+#define ADC_CSR_JSTRT1               (1 << 3)  /* Bit 3:  Injected channel Start flag of ADC1 (copy of JSTRT in ADC1_SR) */
+#define ADC_CSR_STRT1                (1 << 4)  /* Bit 4:  Regular channel Start flag of ADC1 (copy of STRT in ADC1_SR) */
+#define ADC_CSR_OVR1                 (1 << 5)  /* Bit 5:  Overrun flag of ADC1 (copy of OVR in ADC1_SR) */
+
+#define ADC_CSR_AWD2                 (1 << 8)  /* Bit 8:  Analog watchdog flag of ADC2 (copy of AWD in ADC2_SR) */
+#define ADC_CSR_EOC2                 (1 << 9)  /* Bit 9:  End of conversion of ADC2 (copy of EOC in ADC2_SR) */
+#define ADC_CSR_JEOC2                (1 << 10) /* Bit 10: Injected channel end of conversion of ADC2 (copy of JEOC in ADC2_SR) */
+#define ADC_CSR_JSTRT2               (1 << 11) /* Bit 11: Injected channel Start flag of ADC2 (copy of JSTRT in ADC2_SR) */
+#define ADC_CSR_STRT2                (1 << 12) /* Bit 12: Regular channel Start flag of ADC2 (copy of STRT in ADC2_SR) */
+#define ADC_CSR_OVR2                 (1 << 13) /* Bit 13: Overrun flag of ADC2 (copy of OVR in ADC2_SR) */
+                                               /* Bits 14-15: Reserved, must be kept at reset value. */
+#define ADC_CSR_AWD3                 (1 << 16) /* Bit 16: ADC3 Analog watchdog flag (copy of AWD in ADC3_SR) */
+#define ADC_CSR_EOC3                 (1 << 17) /* Bit 17: ADC3 End of conversion (copy of EOC in ADC3_SR) */
+#define ADC_CSR_JEOC3                (1 << 18) /* Bit 18: ADC3 Injected channel end of conversion (copy of JEOC in ADC3_SR) */
+#define ADC_CSR_JSTRT3               (1 << 19) /* Bit 19: ADC3 Injected channel Start flag (copy of JSTRT in ADC3_SR) */
+#define ADC_CSR_STRT3                (1 << 20) /* Bit 20: ADC3 Regular channel Start flag (copy of STRT in ADC3_SR). */
+#define ADC_CSR_OVR3                 (1 << 21) /* Bit 21: ADC3 overrun flag (copy of OVR in ADC3_SR). */
+
+/* Common control register */
+
+#  define ADC_CCR_MULTI_SHIFT        (0)       /* Bits 0-4: Multi ADC mode selection */
+#  define ADC_CCR_MULTI_MASK         (0x1f << ADC_CCR_MULTI_SHIFT)
+#    define ADC_CCR_MULTI_NONE       (0 << ADC_CCR_MULTI_SHIFT)  /* 00000: Independent mode */
+                                                                 /* 00001 to 01001: Dual mode (ADC1 and ADC2), ADC3 independent */
+#    define ADC_CCR_MULTI_RSISM2     (1 << ADC_CCR_MULTI_SHIFT)  /* 00001: Combined regular simultaneous + injected simultaneous mode */
+#    define ADC_CCR_MULTI_RSATM2     (2 << ADC_CCR_MULTI_SHIFT)  /* 00010: Combined regular simultaneous + alternate trigger mode */
+#    define ADC_CCR_MULTI_ISM2       (5 << ADC_CCR_MULTI_SHIFT)  /* 00101: Injected simultaneous mode only */
+#    define ADC_CCR_MULTI_RSM2       (6 << ADC_CCR_MULTI_SHIFT)  /* 00110: Regular simultaneous mode only */
+#    define ADC_CCR_MULTI_IM2        (7 << ADC_CCR_MULTI_SHIFT)  /* 00111: interleaved mode only */
+#    define ADC_CCR_MULTI_ATM2       (9 << ADC_CCR_MULTI_SHIFT)  /* 01001: Alternate trigger mode only */
+                                                                 /* 10001 to 11001: Triple mode (ADC1, 2 and 3) */
+#    define ADC_CCR_MULTI_RSISM3     (17 << ADC_CCR_MULTI_SHIFT) /* 10001: Combined regular simultaneous + injected simultaneous mode */
+#    define ADC_CCR_MULTI_RSATM3     (18 << ADC_CCR_MULTI_SHIFT) /* 10010: Combined regular simultaneous + alternate trigger mode */
+#    define ADC_CCR_MULTI_ISM3       (21 << ADC_CCR_MULTI_SHIFT) /* 10101: Injected simultaneous mode only */
+#    define ADC_CCR_MULTI_RSM3       (22 << ADC_CCR_MULTI_SHIFT) /* 10110: Regular simultaneous mode only */
+#    define ADC_CCR_MULTI_IM3        (23 << ADC_CCR_MULTI_SHIFT) /* 10111: interleaved mode only */
+#    define ADC_CCR_MULTI_ATM3       (25 << ADC_CCR_MULTI_SHIFT) /* 11001: Alternate trigger mode only */
+                                               /* Bits 5-7: Reserved, must be kept at reset value. */
+#  define ADC_CCR_DELAY_SHIFT        (8)       /* Bits 8-11: Delay between 2 sampling phases */
+#  define ADC_CCR_DELAY_MASK         (0xf << ADC_CCR_DELAY_SHIFT)
+#    define ADC_CCR_DELAY(n)         (((n)-5) << ADC_CCR_DELAY_SHIFT) /* n * TADCCLK, n=5-20 */
+                                               /* Bit 12 Reserved, must be kept at reset value. */
+#  define ADC_CCR_DDS                (1 << 13) /* Bit 13: DMA disable selection (for multi-ADC mode) */
+
+#  define ADC_CCR_DMA_SHIFT          (14)      /* Bits 14-15: Direct memory access mode for multi ADC mode */
+#  define ADC_CCR_DMA_MASK           (3 << ADC_CCR_DMA_SHIFT)
+#    define ADC_CCR_DMA_DISABLED     (0 << ADC_CCR_DMA_SHIFT) /* 00: DMA mode disabled */
+#    define ADC_CCR_DMA_MODE1        (1 << ADC_CCR_DMA_SHIFT) /* 01: DMA mode 1 enabled */
+#    define ADC_CCR_DMA_MODE2        (2 << ADC_CCR_DMA_SHIFT) /* 10: DMA mode 2 enabled */
+#    define ADC_CCR_DMA_MODE3        (3 << ADC_CCR_DMA_SHIFT) /* 11: DMA mode 3 enabled */
+
+#  define ADC_CCR_ADCPRE_SHIFT       (16)      /* Bits 16-17: ADC prescaler */
+#  define ADC_CCR_ADCPRE_MASK        (3 << ADC_CCR_ADCPRE_SHIFT)
+#    define ADC_CCR_ADCPRE_DIV2      (0 << ADC_CCR_ADCPRE_SHIFT) /* 00: PCLK2 divided by 2 */
+#    define ADC_CCR_ADCPRE_DIV4      (1 << ADC_CCR_ADCPRE_SHIFT) /* 01: PCLK2 divided by 4 */
+#    define ADC_CCR_ADCPRE_DIV6      (2 << ADC_CCR_ADCPRE_SHIFT) /* 10: PCLK2 divided by 6 */
+#    define ADC_CCR_ADCPRE_DIV8      (3 << ADC_CCR_ADCPRE_SHIFT) /* 11: PCLK2 divided by 8 */
+                                               /* Bits 18-21: Reserved, must be kept at reset value. */
+#  define ADC_CCR_VBATE              (1 << 22) /* Bit 22: VBAT enable */
+#  define ADC_CCR_TSVREFE            (1 << 23) /* Bit 23: Temperature sensor and VREFINT enable */
+                                               /* Bits 24-31 Reserved, must be kept at reset value. */
+
+/* Data register for dual and triple modes (32-bit data with no named fields) */
+
+/****************************************************************************************************
+ * Public Types
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public Data
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XX77XX_ADC_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx77xx_i2c.h b/arch/arm/src/stm32f7/chip/stm32f74xx77xx_i2c.h
new file mode 100644
index 0000000000000000000000000000000000000000..7e2d801dc90e28f47d328e75f3a886894b9af3f5
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32f74xx77xx_i2c.h
@@ -0,0 +1,264 @@
+/************************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32f74xx77xx_i2c.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_STM32F74XX77XX_I2C_H
+#define __ARCH_ARM_SRC_STM32F7_STM32F74XX77XX_I2C_H
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Register Offsets *****************************************************************/
+
+#define STM32_I2C_CR1_OFFSET      0x0000 /* Control register 1 (32-bit) */
+#define STM32_I2C_CR2_OFFSET      0x0004 /* Control register 2 (32-bit) */
+#define STM32_I2C_OAR1_OFFSET     0x0008 /* Own address register 1 (16-bit) */
+#define STM32_I2C_OAR2_OFFSET     0x000c /* Own address register 2 (16-bit) */
+#define STM32_I2C_TIMINGR_OFFSET  0x0010 /* Timing register */
+#define STM32_I2C_TIMEOUTR_OFFSET 0x0014 /* Timeout register */
+#define STM32_I2C_ISR_OFFSET      0x0018 /* Interrupt and Status register */
+#define STM32_I2C_ICR_OFFSET      0x001c /* Interrupt clear register */
+#define STM32_I2C_PECR_OFFSET     0x0020 /* Packet error checking register */
+#define STM32_I2C_RXDR_OFFSET     0x0024 /* Receive data register */
+#define STM32_I2C_TXDR_OFFSET     0x0028 /* Transmit data register */
+
+/* Register Addresses ***************************************************************/
+
+#if STM32F7_NI2C > 0
+#  define STM32_I2C1_CR1          (STM32_I2C1_BASE+STM32_I2C_CR1_OFFSET)
+#  define STM32_I2C1_CR2          (STM32_I2C1_BASE+STM32_I2C_CR2_OFFSET)
+#  define STM32_I2C1_OAR1         (STM32_I2C1_BASE+STM32_I2C_OAR1_OFFSET)
+#  define STM32_I2C1_OAR2         (STM32_I2C1_BASE+STM32_I2C_OAR2_OFFSET)
+#  define STM32_I2C1_TIMINGR      (STM32_I2C1_BASE+STM32_I2C_TIMINGR_OFFSET)
+#  define STM32_I2C1_TIMEOUTR     (STM32_I2C1_BASE+STM32_I2C_TIMEOUTR_OFFSET)
+#  define STM32_I2C1_ISR          (STM32_I2C1_BASE+STM32_I2C_ISR_OFFSET)
+#  define STM32_I2C1_ICR          (STM32_I2C1_BASE+STM32_I2C_ICR_OFFSET)
+#  define STM32_I2C1_PECR         (STM32_I2C1_BASE+STM32_I2C_PECR_OFFSET)
+#  define STM32_I2C1_RXDR         (STM32_I2C1_BASE+STM32_I2C_RXDR_OFFSET)
+#  define STM32_I2C1_TXDR         (STM32_I2C1_BASE+STM32_I2C_TXDR_OFFSET)
+#endif
+
+#if STM32F7_NI2C > 1
+#  define STM32_I2C2_CR1          (STM32_I2C2_BASE+STM32_I2C_CR1_OFFSET)
+#  define STM32_I2C2_CR2          (STM32_I2C2_BASE+STM32_I2C_CR2_OFFSET)
+#  define STM32_I2C2_OAR1         (STM32_I2C2_BASE+STM32_I2C_OAR1_OFFSET)
+#  define STM32_I2C2_OAR2         (STM32_I2C2_BASE+STM32_I2C_OAR2_OFFSET)
+#  define STM32_I2C2_TIMINGR      (STM32_I2C2_BASE+STM32_I2C_TIMINGR_OFFSET)
+#  define STM32_I2C2_TIMEOUTR     (STM32_I2C2_BASE+STM32_I2C_TIMEOUTR_OFFSET)
+#  define STM32_I2C2_ISR          (STM32_I2C2_BASE+STM32_I2C_ISR_OFFSET)
+#  define STM32_I2C2_ICR          (STM32_I2C2_BASE+STM32_I2C_ICR_OFFSET)
+#  define STM32_I2C2_PECR         (STM32_I2C2_BASE+STM32_I2C_PECR_OFFSET)
+#  define STM32_I2C2_RXDR         (STM32_I2C2_BASE+STM32_I2C_RXDR_OFFSET)
+#  define STM32_I2C2_TXDR         (STM32_I2C2_BASE+STM32_I2C_TXDR_OFFSET)
+#endif
+
+#if STM32F7_NI2C > 2
+#  define STM32_I2C3_CR1          (STM32_I2C3_BASE+STM32_I2C_CR1_OFFSET)
+#  define STM32_I2C3_CR2          (STM32_I2C3_BASE+STM32_I2C_CR2_OFFSET)
+#  define STM32_I2C3_OAR1         (STM32_I2C3_BASE+STM32_I2C_OAR1_OFFSET)
+#  define STM32_I2C3_OAR2         (STM32_I2C3_BASE+STM32_I2C_OAR2_OFFSET)
+#  define STM32_I2C3_TIMINGR      (STM32_I2C3_BASE+STM32_I2C_TIMINGR_OFFSET)
+#  define STM32_I2C3_TIMEOUTR     (STM32_I2C3_BASE+STM32_I2C_TIMEOUTR_OFFSET)
+#  define STM32_I2C3_ISR          (STM32_I2C3_BASE+STM32_I2C_ISR_OFFSET)
+#  define STM32_I2C3_ICR          (STM32_I2C3_BASE+STM32_I2C_ICR_OFFSET)
+#  define STM32_I2C3_PECR         (STM32_I2C3_BASE+STM32_I2C_PECR_OFFSET)
+#  define STM32_I2C3_RXDR         (STM32_I2C3_BASE+STM32_I2C_RXDR_OFFSET)
+#  define STM32_I2C3_TXDR         (STM32_I2C3_BASE+STM32_I2C_TXDR_OFFSET)
+#endif
+
+#if STM32F7_NI2C > 3
+#  define STM32_I2C4_CR1          (STM32_I2C4_BASE+STM32_I2C_CR1_OFFSET)
+#  define STM32_I2C4_CR2          (STM32_I2C4_BASE+STM32_I2C_CR2_OFFSET)
+#  define STM32_I2C4_OAR1         (STM32_I2C4_BASE+STM32_I2C_OAR1_OFFSET)
+#  define STM32_I2C4_OAR2         (STM32_I2C4_BASE+STM32_I2C_OAR2_OFFSET)
+#  define STM32_I2C4_TIMINGR      (STM32_I2C4_BASE+STM32_I2C_TIMINGR_OFFSET)
+#  define STM32_I2C4_TIMEOUTR     (STM32_I2C4_BASE+STM32_I2C_TIMEOUTR_OFFSET)
+#  define STM32_I2C4_ISR          (STM32_I2C4_BASE+STM32_I2C_ISR_OFFSET)
+#  define STM32_I2C4_ICR          (STM32_I2C4_BASE+STM32_I2C_ICR_OFFSET)
+#  define STM32_I2C4_PECR         (STM32_I2C4_BASE+STM32_I2C_PECR_OFFSET)
+#  define STM32_I2C4_RXDR         (STM32_I2C4_BASE+STM32_I2C_RXDR_OFFSET)
+#  define STM32_I2C4_TXDR         (STM32_I2C4_BASE+STM32_I2C_TXDR_OFFSET)
+#endif
+
+/* Register Bitfield Definitions ****************************************************/
+
+/* Control register 1 */
+
+#define I2C_CR1_PE                (1 << 0)  /* Bit 0:  Peripheral Enable */
+#define I2C_CR1_TXIE              (1 << 1)  /* Bit 1:  TX Interrupt enable */
+#define I2C_CR1_RXIE              (1 << 2)  /* Bit 2:  RX Interrupt enable */
+#define I2C_CR1_ADDRIE            (1 << 3)  /* Bit 3:  Address match interrupt enable (slave) */
+#define I2C_CR1_NACKIE            (1 << 4)  /* Bit 4:  Not acknowledge received interrupt enable */
+#define I2C_CR1_STOPIE            (1 << 5)  /* Bit 5:  STOP detection interrupt enable */
+#define I2C_CR1_TCIE              (1 << 6)  /* Bit 6:  Transfer Complete interrupt enable */
+#define I2C_CR1_ERRIE             (1 << 7)  /* Bit 7:  Error interrupts enable */
+#define I2C_CR1_DNF_SHIFT         (8)       /* Bits 8-11: Digital noise filter */
+#define I2C_CR1_DNF_MASK          (0xf << I2C_CR1_DNF_SHIFT)
+#  define I2C_CR1_DNF_DISABLE     (0 << I2C_CR1_DNF_SHIFT)
+#  define I2C_CR1_DNF(n)          ((n) << I2C_CR1_DNF_SHIFT) /* Up to n * Ti2cclk, n=1..15 */
+#define I2C_CR1_ANFOFF            (1 << 12) /* Bit 12: Analog noise filter OFF */
+#define I2C_CR1_TXDMAEN           (1 << 14) /* Bit 14: DMA transmission requests enable */
+#define I2C_CR1_RXDMAEN           (1 << 15) /* Bit 15: DMA reception requests enable */
+#define I2C_CR1_SBC               (1 << 16) /* Bit 16: Slave byte control */
+#define I2C_CR1_NOSTRETCH         (1 << 17) /* Bit 17: Clock stretching disable */
+#define I2C_CR1_GCEN              (1 << 19) /* Bit 19: General call enable */
+#define I2C_CR1_SMBHEN            (1 << 20) /* Bit 20: SMBus Host address enable */
+#define I2C_CR1_SMBDEN            (1 << 21) /* Bit 21: SMBus Device Default address enable */
+#define I2C_CR1_ALERTEN           (1 << 22) /* Bit 22: SMBus alert enable */
+#define I2C_CR1_PECEN             (1 << 23) /* Bit 23: PEC enable */
+
+/* Control register 2 */
+
+#define I2C_CR2_SADD10_SHIFT      (0)       /* Bits 0-9: Slave 10-bit address (master) */
+#define I2C_CR2_SADD10_MASK       (0x3ff << I2C_CR2_SADD10_SHIFT)
+#define I2C_CR2_SADD7_SHIFT       (1)       /* Bits 1-7: Slave 7-bit address (master) */
+#define I2C_CR2_SADD7_MASK        (0x7f << I2C_CR2_SADD7_SHIFT)
+#define I2C_CR2_RD_WRN            (1 << 10) /* Bit 10: Transfer direction (master) */
+#define I2C_CR2_ADD10             (1 << 11) /* Bit 11: 10-bit addressing mode (master) */
+#define I2C_CR2_HEAD10R           (1 << 12) /* Bit 12: 10-bit address header only read direction (master) */
+#define I2C_CR2_START             (1 << 13) /* Bit 13: Start generation */
+#define I2C_CR2_STOP              (1 << 14) /* Bit 14: Stop generation (master) */
+#define I2C_CR2_NACK              (1 << 15) /* Bit 15: NACK generation (slave) */
+#define I2C_CR2_NBYTES_SHIFT      (16)      /* Bits 16-23: Number of bytes */
+#define I2C_CR2_NBYTES_MASK       (0xff << I2C_CR2_NBYTES_SHIFT)
+#define I2C_CR2_RELOAD            (1 << 24) /* Bit 24: NBYTES reload mode */
+#define I2C_CR2_AUTOEND           (1 << 25) /* Bit 25: Automatic end mode (master) */
+#define I2C_CR2_PECBYTE           (1 << 26) /* Bit 26: Packet error checking byte */
+
+/* Own address register 1 */
+
+#define I2C_OAR1_OA1_10_SHIFT     (0)       /* Bits 0-9: 10-bit interface address */
+#define I2C_OAR1_OA1_10_MASK      (0x3ff << I2C_OAR1_OA1_10_SHIFT)
+#define I2C_OAR1_OA1_7_SHIFT      (1)       /* Bits 1-7: 7-bit interface address */
+#define I2C_OAR1_OA1_7_MASK       (0x7f << I2C_OAR1_OA1_7_SHIFT)
+#define I2C_OAR1_OA1MODE          (1 << 10) /* Bit 10: Own Address 1 10-bit mode */
+#define I2C_OAR1_OA1EN            (1 << 15) /* Bit 15: Own Address 1 enable */
+
+/* Own address register 2 */
+
+#define I2C_OAR2_OA2_SHIFT        (1)       /* Bits 1-7: 7-bit interface address */
+#define I2C_OAR2_OA2_MASK         (0x7f << I2C_OAR2_OA2_SHIFT)
+#define I2C_OAR2_OA2MSK_SHIFT     (8)       /* Bits 8-10: Own Address 2 masks */
+#define I2C_OAR2_OA2MSK_MASK      (7 << I2C_OAR2_OA2MSK_SHIFT)
+#  define I2C_OAR2_OA2MSK_NONE    (0 << I2C_OAR2_OA2MSK_SHIFT) /* No mask */
+#  define I2C_OAR2_OA2MSK_2_7     (1 << I2C_OAR2_OA2MSK_SHIFT) /* Only OA2[7:2] are compared */
+#  define I2C_OAR2_OA2MSK_3_7     (2 << I2C_OAR2_OA2MSK_SHIFT) /* Only OA2[7:3] are compared */
+#  define I2C_OAR2_OA2MSK_4_7     (3 << I2C_OAR2_OA2MSK_SHIFT) /* Only OA2[7:4] are compared */
+#  define I2C_OAR2_OA2MSK_5_7     (4 << I2C_OAR2_OA2MSK_SHIFT) /* Only OA2[7:5] are compared */
+#  define I2C_OAR2_OA2MSK_6_7     (5 << I2C_OAR2_OA2MSK_SHIFT) /* Only OA2[7:6] are compared */
+#  define I2C_OAR2_OA2MSK_7       (6 << I2C_OAR2_OA2MSK_SHIFT) /* Only OA2[7] is compared */
+#  define I2C_OAR2_OA2MSK_ALL     (7 << I2C_OAR2_OA2MSK_SHIFT) /* All 7-bit addresses acknowledged */
+#define I2C_OAR2_OA2EN            (1 << 15)  /* Bit 15: Own Address 2 enable */
+
+/* Timing register */
+
+#define I2C_TIMINGR_SCLL_SHIFT    (0)        /* Bits 0-7: SCL low period (master) */
+#define I2C_TIMINGR_SCLL_MASK     (0xff << I2C_TIMINGR_SCLL_SHIFT)
+#  define I2C_TIMINGR_SCLL(n)     (((n)-1) << I2C_TIMINGR_SCLL_SHIFT) /* tSCLL = n x tPRESC */
+
+#define I2C_TIMINGR_SCLH_SHIFT    (8)        /* Bits 8-15: SCL high period (master) */
+#define I2C_TIMINGR_SCLH_MASK     (0xff << I2C_TIMINGR_SCLH_SHIFT)
+#  define I2C_TIMINGR_SCLH(n)     (((n)-1) << I2C_TIMINGR_SCLH_SHIFT) /* tSCLH = n x tPRESC */
+
+#define I2C_TIMINGR_SDADEL_SHIFT  (16)        /* Bits 16-19: Data hold time */
+#define I2C_TIMINGR_SDADEL_MASK   (0xf << I2C_TIMINGR_SDADEL_SHIFT)
+#  define I2C_TIMINGR_SDADEL(n)   ((n) << I2C_TIMINGR_SDADEL_SHIFT) /* tSDADEL= n x tPRESC */
+
+#define I2C_TIMINGR_SCLDEL_SHIFT  (20)        /* Bits 20-23: Data setup time */
+#define I2C_TIMINGR_SCLDEL_MASK   (0xf << I2C_TIMINGR_SCLDEL_SHIFT)
+#  define I2C_TIMINGR_SCLDEL(n)   (((n)-1) << I2C_TIMINGR_SCLDEL_SHIFT) /* tSCLDEL = n x tPRESC */
+
+#define I2C_TIMINGR_PRESC_SHIFT   (28)        /* Bits 28-31: Timing prescaler */
+#define I2C_TIMINGR_PRESC_MASK    (0xf << I2C_TIMINGR_PRESC_SHIFT)
+#  define I2C_TIMINGR_PRESC(n)    (((n)-1) << I2C_TIMINGR_PRESC_SHIFT) /* tPRESC = n x tI2CCLK */
+
+/* Timeout register */
+
+#define I2C_TIMEOUTR_A_SHIFT      (0)       /* Bits 0-11: Bus Timeout A */
+#define I2C_TIMEOUTR_A_MASK       (0x0fff << I2C_TIMEOUTR_A_SHIFT)
+#  define I2C_TIMEOUTR_A(n)       ((n) << I2C_TIMEOUTR_A_SHIFT)
+#define I2C_TIMEOUTR_TIDLE        (1 << 12) /* Bit 12: Idle clock timeout detection */
+#define I2C_TIMEOUTR_TIMOUTEN     (1 << 15) /* Bit 15: Clock timeout enable */
+#define I2C_TIMEOUTR_B_SHIFT      (16)      /* Bits 16-27: Bus Timeout B */
+#define I2C_TIMEOUTR_B_MASK       (0x0fff << I2C_TIMEOUTR_B_SHIFT)
+#  define I2C_TIMEOUTR_B(n)       ((n) << I2C_TIMEOUTR_B_SHIFT)
+#define I2C_TIMEOUTR_TEXTEN       (1 << 31) /* Bits 31: Extended clock timeout enable */
+
+
+/* Fields unique to the Interrupt and Status register */
+
+#define I2C_ISR_TXE               (1 << 0)  /* Bit 0:  Transmit data register empty (transmitters) */
+#define I2C_ISR_TXIS              (1 << 1)  /* Bit 1:  Transmit interrupt status (transmitters) */
+#define I2C_ISR_RXNE              (1 << 2)  /* Bit 2:  Receive data register not empty (receivers) */
+#define I2C_ISR_TC                (1 << 6)  /* Bit 6:  Transfer Complete (master) */
+#define I2C_ISR_TCR               (1 << 7)  /* Bit 7:  Transfer Complete Reload */
+#define I2C_ISR_BUSY              (1 << 15) /* Bit 15: Bus busy */
+#define I2C_ISR_DIR               (1 << 16) /* Bit 16: Transfer direction (slave) */
+#define I2C_ISR_ADDCODE_SHIFT     (17)      /* Bits 17-23: Address match code (slave) */
+#define I2C_ISR_ADDCODE_MASK      (0x7f << I2C_ISR_ADDCODE_SHIFT)
+
+/* Interrupt and Status register and interrupt clear register */
+/* Common interrupt bits */
+
+#define I2C_INT_ADDR              (1 << 3)  /* Bit 3:  Address matched (slave) */
+#define I2C_INT_NACK              (1 << 4)  /* Bit 4:  Not Acknowledge received flag */
+#define I2C_INT_STOP              (1 << 5)  /* Bit 5:  Stop detection flag */
+#define I2C_INT_BERR              (1 << 8)  /* Bit 8:  Bus error */
+#define I2C_INT_ARLO              (1 << 9)  /* Bit 9:  Arbitration lost */
+#define I2C_INT_OVR               (1 << 10) /* Bit 10: Overrun/Underrun (slave) */
+#define I2C_INT_PECERR            (1 << 11) /* Bit 11: PEC Error in reception */
+#define I2C_INT_TIMEOUT           (1 << 12) /* Bit 12: Timeout or tLOW detection flag */
+#define I2C_INT_ALERT             (1 << 13) /* Bit 13: SMBus alert */
+
+#define I2C_ISR_ERRORMASK (I2C_INT_BERR | I2C_INT_ARLO | I2C_INT_OVR | I2C_INT_PECERR | I2C_INT_TIMEOUT)
+
+#define I2C_ICR_CLEARMASK (I2C_INT_ADDR | I2C_INT_NACK | I2C_INT_STOP | I2C_INT_BERR | I2C_INT_ARLO \
+                           | I2C_INT_OVR | I2C_INT_PECERR | I2C_INT_TIMEOUT | I2C_INT_ALERT)
+
+/* Packet error checking register */
+
+#define I2C_PECR_MASK             (0xff)
+
+/* Receive data register */
+
+#define I2C_RXDR_MASK             (0xff)
+
+/* Transmit data register */
+
+#define I2C_TXDR_MASK             (0xff)
+
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XX77XX_I2C_H */
+
diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx77xx_sdmmc.h b/arch/arm/src/stm32f7/chip/stm32f74xx77xx_sdmmc.h
new file mode 100644
index 0000000000000000000000000000000000000000..e0d52edc4ef756e39978be194f4b12f409450301
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32f74xx77xx_sdmmc.h
@@ -0,0 +1,224 @@
+ /* arch/arm/src/stm32f7/chip/stm32f74xx77xx_sdmmc.h
+ *
+ *   Copyright (C) 2009, 2011-2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XX77XX_SDMMC_H
+#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XX77XX_SDMMC_H
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Register Offsets *****************************************************************/
+
+#define STM32_SDMMC_POWER_OFFSET              0x0000 /* SDMMC power control register */
+#define STM32_SDMMC_CLKCR_OFFSET              0x0004 /* SDMMC clock control register */
+#define STM32_SDMMC_ARG_OFFSET                0x0008 /* SDMMC argument register */
+#define STM32_SDMMC_CMD_OFFSET                0x000c /* SDMMC command register */
+#define STM32_SDMMC_RESPCMD_OFFSET            0x0010 /* SDMMC command response register */
+#define STM32_SDMMC_RESP_OFFSET(n)            (0x0010+4*(n))
+#define STM32_SDMMC_RESP1_OFFSET              0x0014 /* SDMMC response 1 register */
+#define STM32_SDMMC_RESP2_OFFSET              0x0018 /* SDMMC response 2 register */
+#define STM32_SDMMC_RESP3_OFFSET              0x001c /* SDMMC response 3 register */
+#define STM32_SDMMC_RESP4_OFFSET              0x0020 /* SDMMC response 4 register */
+#define STM32_SDMMC_DTIMER_OFFSET             0x0024 /* SDMMC data timer register */
+#define STM32_SDMMC_DLEN_OFFSET               0x0028 /* SDMMC data length register */
+#define STM32_SDMMC_DCTRL_OFFSET              0x002c /* SDMMC data control register */
+#define STM32_SDMMC_DCOUNT_OFFSET             0x0030 /* SDMMC data counter register */
+#define STM32_SDMMC_STA_OFFSET                0x0034 /* SDMMC status register */
+#define STM32_SDMMC_ICR_OFFSET                0x0038 /* SDMMC interrupt clear register */
+#define STM32_SDMMC_MASK_OFFSET               0x003c /* SDMMC mask register */
+#define STM32_SDMMC_FIFOCNT_OFFSET            0x0048 /* SDMMC FIFO counter register */
+#define STM32_SDMMC_FIFO_OFFSET               0x0080 /* SDMMC data FIFO register */
+
+
+/* Register Bitfield Definitions ****************************************************/
+
+#define STM32_SDMMC_POWER_PWRCTRL_SHIFT       (0)       /* Bits 0-1: Power supply control bits */
+#define STM32_SDMMC_POWER_PWRCTRL_MASK        (3 << STM32_SDMMC_POWER_PWRCTRL_SHIFT)
+#  define STM32_SDMMC_POWER_PWRCTRL_OFF       (0 << STM32_SDMMC_POWER_PWRCTRL_SHIFT) /* 00: Power-off: card clock stopped */
+#  define STM32_SDMMC_POWER_PWRCTRL_PWRUP     (2 << STM32_SDMMC_POWER_PWRCTRL_SHIFT) /* 10: Reserved power-up */
+#  define STM32_SDMMC_POWER_PWRCTRL_ON        (3 << STM32_SDMMC_POWER_PWRCTRL_SHIFT) /* 11: Power-on: card is clocked */
+
+#define STM32_SDMMC_POWER_RESET               (0)       /* Reset value */
+
+#define STM32_SDMMC_CLKCR_CLKDIV_SHIFT        (0)       /* Bits 7-0: Clock divide factor */
+#define STM32_SDMMC_CLKCR_CLKDIV_MASK         (0xff << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
+#define STM32_SDMMC_CLKCR_CLKEN               (1 << 8)  /* Bit 8: Clock enable bit */
+#define STM32_SDMMC_CLKCR_PWRSAV              (1 << 9)  /* Bit 9: Power saving configuration bit */
+#define STM32_SDMMC_CLKCR_BYPASS              (1 << 10) /* Bit 10: Clock divider bypass enable bit */
+#define STM32_SDMMC_CLKCR_WIDBUS_SHIFT        (11)      /* Bits 12-11: Wide bus mode enable bits */
+#define STM32_SDMMC_CLKCR_WIDBUS_MASK         (3 << STM32_SDMMC_CLKCR_WIDBUS_SHIFT)
+#  define STM32_SDMMC_CLKCR_WIDBUS_D1         (0 << STM32_SDMMC_CLKCR_WIDBUS_SHIFT) /* 00: Default (STM32_SDMMC_D0) */
+#  define STM32_SDMMC_CLKCR_WIDBUS_D4         (1 << STM32_SDMMC_CLKCR_WIDBUS_SHIFT) /* 01: 4-wide (STM32_SDMMC_D[3:0]) */
+#  define STM32_SDMMC_CLKCR_WIDBUS_D8         (2 << STM32_SDMMC_CLKCR_WIDBUS_SHIFT) /* 10: 8-wide (STM32_SDMMC_D[7:0]) */
+#define STM32_SDMMC_CLKCR_NEGEDGE             (1 << 13) /* Bit 13: STM32_SDMMC_CK dephasing selection bit */
+#define STM32_SDMMC_CLKCR_HWFC_EN             (1 << 14) /* Bit 14: HW Flow Control enable */
+
+#define STM32_SDMMC_CLKCR_RESET               (0)       /* Reset value */
+
+#define STM32_SDMMC_ARG_RESET                 (0)       /* Reset value */
+
+#define STM32_SDMMC_CMD_CMDINDEX_SHIFT        (0)
+#define STM32_SDMMC_CMD_CMDINDEX_MASK         (0x3f << STM32_SDMMC_CMD_CMDINDEX_SHIFT)
+#define STM32_SDMMC_CMD_WAITRESP_SHIFT        (6)       /* Bits 7-6: Wait for response bits */
+#define STM32_SDMMC_CMD_WAITRESP_MASK         (3 << STM32_SDMMC_CMD_WAITRESP_SHIFT)
+#  define STM32_SDMMC_CMD_NORESPONSE          (0 << STM32_SDMMC_CMD_WAITRESP_SHIFT) /* 00/10: No response */
+#  define STM32_SDMMC_CMD_SHORTRESPONSE       (1 << STM32_SDMMC_CMD_WAITRESP_SHIFT) /* 01: Short response */
+#  define STM32_SDMMC_CMD_LONGRESPONSE        (3 << STM32_SDMMC_CMD_WAITRESP_SHIFT) /* 11: Long response */
+#define STM32_SDMMC_CMD_WAITINT               (1 << 8)  /* Bit 8: CPSM waits for interrupt request */
+#define STM32_SDMMC_CMD_WAITPEND              (1 << 9)  /* Bit 9: CPSM Waits for ends of data transfer */
+#define STM32_SDMMC_CMD_CPSMEN                (1 << 10) /* Bit 10: Command path state machine enable */
+#define STM32_SDMMC_CMD_SUSPEND               (1 << 11) /* Bit 11: SD I/O suspend command */
+#define STM32_SDMMC_CMD_ENDCMD                (1 << 12) /* Bit 12: Enable CMD completion */
+#define STM32_SDMMC_CMD_NIEN                  (1 << 13) /* Bit 13: not Interrupt Enable */
+#define STM32_SDMMC_CMD_ATACMD                (1 << 14) /* Bit 14: CE-ATA command */
+
+#define STM32_SDMMC_CMD_RESET                 (0)       /* Reset value */
+
+#define STM32_SDMMC_RESPCMD_SHIFT             (0)
+#define STM32_SDMMC_RESPCMD_MASK              (0x3f << STM32_SDMMC_RESPCMD_SHIFT)
+
+#define STM32_SDMMC_DTIMER_RESET              (0)       /* Reset value */
+
+#define STM32_SDMMC_DLEN_SHIFT                (0)
+#define STM32_SDMMC_DLEN_MASK                 (0x01ffffff << STM32_SDMMC_DLEN_SHIFT)
+
+#define STM32_SDMMC_DLEN_RESET                (0)       /* Reset value */
+
+#define STM32_SDMMC_DCTRL_DTEN                (1 << 0)  /* Bit 0: Data transfer enabled bit */
+#define STM32_SDMMC_DCTRL_DTDIR               (1 << 1)  /* Bit 1: Data transfer direction */
+#define STM32_SDMMC_DCTRL_DTMODE              (1 << 2)  /* Bit 2: Data transfer mode */
+#define STM32_SDMMC_DCTRL_DMAEN               (1 << 3)  /* Bit 3: DMA enable bit */
+#define STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT    (4)       /* Bits 7-4: Data block size */
+#define STM32_SDMMC_DCTRL_DBLOCKSIZE_MASK     (15 << STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT)
+#  define STM32_SDMMC_DCTRL_1BYTE             (0 << STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT)
+#  define STM32_SDMMC_DCTRL_2BYTES            (1 << STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT)
+#  define STM32_SDMMC_DCTRL_4BYTES            (2 << STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT)
+#  define STM32_SDMMC_DCTRL_8BYTES            (3 << STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT)
+#  define STM32_SDMMC_DCTRL_16BYTES           (4 << STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT)
+#  define STM32_SDMMC_DCTRL_32BYTES           (5 << STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT)
+#  define STM32_SDMMC_DCTRL_64BYTES           (6 << STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT)
+#  define STM32_SDMMC_DCTRL_128BYTES          (7 << STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT)
+#  define STM32_SDMMC_DCTRL_256BYTES          (8 << STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT)
+#  define STM32_SDMMC_DCTRL_512BYTES          (9 << STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT)
+#  define STM32_SDMMC_DCTRL_1KBYTE            (10 << STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT)
+#  define STM32_SDMMC_DCTRL_2KBYTES           (11 << STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT)
+#  define STM32_SDMMC_DCTRL_4KBYTES           (12 << STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT)
+#  define STM32_SDMMC_DCTRL_8KBYTES           (13 << STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT)
+#  define STM32_SDMMC_DCTRL_16KBYTES          (14 << STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT)
+#define STM32_SDMMC_DCTRL_RWSTART             (1 << 8)  /* Bit 8: Read wait start */
+#define STM32_SDMMC_DCTRL_RWSTOP              (1 << 9)  /* Bit 9: Read wait stop */
+#define STM32_SDMMC_DCTRL_RWMOD               (1 << 10) /* Bit 10: Read wait mode */
+#define STM32_SDMMC_DCTRL_SDIOEN              (1 << 11) /* Bit 11: SD I/O enable functions */
+
+#define STM32_SDMMC_DCTRL_RESET               (0)       /* Reset value */
+
+#define STM32_SDMMC_DCOUNT_SHIFT              (0)
+#define STM32_SDMMC_DCOUNT_MASK               (0x01ffffff << STM32_SDMMC_DCOUNT_SHIFT)
+
+#define STM32_SDMMC_STA_CCRCFAIL              (1 << 0)  /* Bit 0: Command response CRC fail */
+#define STM32_SDMMC_STA_DCRCFAIL              (1 << 1)  /* Bit 1: Data block CRC fail */
+#define STM32_SDMMC_STA_CTIMEOUT              (1 << 2)  /* Bit 2: Command response timeout */
+#define STM32_SDMMC_STA_DTIMEOUT              (1 << 3)  /* Bit 3: Data timeout */
+#define STM32_SDMMC_STA_TXUNDERR              (1 << 4)  /* Bit 4: Transmit FIFO underrun error */
+#define STM32_SDMMC_STA_RXOVERR               (1 << 5)  /* Bit 5: Received FIFO overrun error */
+#define STM32_SDMMC_STA_CMDREND               (1 << 6)  /* Bit 6: Command response received  */
+#define STM32_SDMMC_STA_CMDSENT               (1 << 7)  /* Bit 7: Command sent  */
+#define STM32_SDMMC_STA_DATAEND               (1 << 8)  /* Bit 8: Data end */
+#define STM32_SDMMC_STA_STBITERR              (1 << 9)  /* Bit 9: Start bit not detected  */
+#define STM32_SDMMC_STA_DBCKEND               (1 << 10) /* Bit 10: Data block sent/received  */
+#define STM32_SDMMC_STA_CMDACT                (1 << 11) /* Bit 11: Command transfer in progress */
+#define STM32_SDMMC_STA_TXACT                 (1 << 12) /* Bit 12: Data transmit in progress */
+#define STM32_SDMMC_STA_RXACT                 (1 << 13) /* Bit 13: Data receive in progress */
+#define STM32_SDMMC_STA_TXFIFOHE              (1 << 14) /* Bit 14: Transmit FIFO half empty */
+#define STM32_SDMMC_STA_RXFIFOHF              (1 << 15) /* Bit 15: Receive FIFO half full */
+#define STM32_SDMMC_STA_TXFIFOF               (1 << 16) /* Bit 16: Transmit FIFO full */
+#define STM32_SDMMC_STA_RXFIFOF               (1 << 17) /* Bit 17: Receive FIFO full */
+#define STM32_SDMMC_STA_TXFIFOE               (1 << 18) /* Bit 18: Transmit FIFO empty */
+#define STM32_SDMMC_STA_RXFIFOE               (1 << 19) /* Bit 19: Receive FIFO empty */
+#define STM32_SDMMC_STA_TXDAVL                (1 << 20) /* Bit 20: Data available in transmit FIFO */
+#define STM32_SDMMC_STA_RXDAVL                (1 << 21) /* Bit 21: Data available in receive FIFO */
+#define STM32_SDMMC_STA_SDIOIT                (1 << 22) /* Bit 22: SDIO interrupt received */
+#define STM32_SDMMC_STA_CEATAEND              (1 << 23) /* Bit 23: CMD6 CE-ATA command completion */
+
+#define STM32_SDMMC_ICR_CCRCFAILC             (1 << 0)  /* Bit 0: CCRCFAIL flag clear bit */
+#define STM32_SDMMC_ICR_DCRCFAILC             (1 << 1)  /* Bit 1: DCRCFAIL flag clear bit */
+#define STM32_SDMMC_ICR_CTIMEOUTC             (1 << 2)  /* Bit 2: CTIMEOUT flag clear bit */
+#define STM32_SDMMC_ICR_DTIMEOUTC             (1 << 3)  /* Bit 3: DTIMEOUT flag clear bit */
+#define STM32_SDMMC_ICR_TXUNDERRC             (1 << 4)  /* Bit 4: TXUNDERR flag clear bit */
+#define STM32_SDMMC_ICR_RXOVERRC              (1 << 5)  /* Bit 5: RXOVERR flag clear bit */
+#define STM32_SDMMC_ICR_CMDRENDC              (1 << 6)  /* Bit 6: CMDREND flag clear bit */
+#define STM32_SDMMC_ICR_CMDSENTC              (1 << 7)  /* Bit 7: CMDSENT flag clear bit */
+#define STM32_SDMMC_ICR_DATAENDC              (1 << 8)  /* Bit 8: DATAEND flag clear bit */
+#define STM32_SDMMC_ICR_STBITERRC             (1 << 9)  /* Bit 9: STBITERR flag clear bit */
+#define STM32_SDMMC_ICR_DBCKENDC              (1 << 10) /* Bit 10: DBCKEND flag clear bit */
+#define STM32_SDMMC_ICR_SDIOITC               (1 << 22) /* Bit 22: SDIOIT flag clear bit */
+#define STM32_SDMMC_ICR_CEATAENDC             (1 << 23) /* Bit 23: CEATAEND flag clear bit */
+
+#define STM32_SDMMC_ICR_RESET                 0x00c007ff
+#define STM32_SDMMC_ICR_STATICFLAGS           0x000005ff
+
+#define STM32_SDMMC_MASK_CCRCFAILIE           (1 << 0)  /* Bit 0: Command CRC fail interrupt enable */
+#define STM32_SDMMC_MASK_DCRCFAILIE           (1 << 1)  /* Bit 1: Data CRC fail interrupt enable */
+#define STM32_SDMMC_MASK_CTIMEOUTIE           (1 << 2)  /* Bit 2: Command timeout interrupt enable */
+#define STM32_SDMMC_MASK_DTIMEOUTIE           (1 << 3)  /* Bit 3: Data timeout interrupt enable */
+#define STM32_SDMMC_MASK_TXUNDERRIE           (1 << 4)  /* Bit 4: Tx FIFO underrun error interrupt enable */
+#define STM32_SDMMC_MASK_RXOVERRIE            (1 << 5)  /* Bit 5: Rx FIFO overrun error interrupt enable */
+#define STM32_SDMMC_MASK_CMDRENDIE            (1 << 6)  /* Bit 6: Command response received interrupt enable */
+#define STM32_SDMMC_MASK_CMDSENTIE            (1 << 7)  /* Bit 7: Command sent interrupt enable */
+#define STM32_SDMMC_MASK_DATAENDIE            (1 << 8)  /* Bit 8: Data end interrupt enable */
+#define STM32_SDMMC_MASK_STBITERRIE           (1 << 9)  /* Bit 9: Start bit error interrupt enable */
+#define STM32_SDMMC_MASK_DBCKENDIE            (1 << 10) /* Bit 10: Data block end interrupt enable */
+#define STM32_SDMMC_MASK_CMDACTIE             (1 << 11) /* Bit 11: Command acting interrupt enable */
+#define STM32_SDMMC_MASK_TXACTIE              (1 << 12) /* Bit 12: Data transmit acting interrupt enable */
+#define STM32_SDMMC_MASK_RXACTIE              (1 << 13) /* Bit 13: Data receive acting interrupt enable */
+#define STM32_SDMMC_MASK_TXFIFOHEIE           (1 << 14) /* Bit 14: Tx FIFO half empty interrupt enable */
+#define STM32_SDMMC_MASK_RXFIFOHFIE           (1 << 15) /* Bit 15: Rx FIFO half full interrupt enable */
+#define STM32_SDMMC_MASK_TXFIFOFIE            (1 << 16) /* Bit 16: Tx FIFO full interrupt enable */
+#define STM32_SDMMC_MASK_RXFIFOFIE            (1 << 17) /* Bit 17: Rx FIFO full interrupt enable */
+#define STM32_SDMMC_MASK_TXFIFOEIE            (1 << 18) /* Bit 18: Tx FIFO empty interrupt enable */
+#define STM32_SDMMC_MASK_RXFIFOEIE            (1 << 19) /* Bit 19: Rx FIFO empty interrupt enable */
+#define STM32_SDMMC_MASK_TXDAVLIE             (1 << 20) /* Bit 20: Data available in Tx FIFO interrupt enable */
+#define STM32_SDMMC_MASK_RXDAVLIE             (1 << 21) /* Bit 21: Data available in Rx FIFO interrupt enable */
+#define STM32_SDMMC_MASK_SDIOITIE             (1 << 22) /* Bit 22: SDIO mode interrupt received interrupt enable */
+#define STM32_SDMMC_MASK_CEATAENDIE           (1 << 23) /* Bit 23: CE-ATA command completion interrupt enable */
+
+#define STM32_SDMMC_MASK_RESET                (0)
+
+#define STM32_SDMMC_FIFOCNT_SHIFT             (0)
+#define STM32_SDMMC_FIFOCNT_MASK              (0x0ffffff << STM32_SDMMC_FIFOCNT_SHIFT)
+
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XX77XX_SDMMC_H */
+
diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx77xx_spi.h b/arch/arm/src/stm32f7/chip/stm32f74xx77xx_spi.h
new file mode 100644
index 0000000000000000000000000000000000000000..fe8c899c564548c98698ab816afc2c39d0a7eb82
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32f74xx77xx_spi.h
@@ -0,0 +1,258 @@
+/************************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32f74xx77xx_spi.h
+ *stm32f74xx77xx
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XX77XX_SPI_H
+#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XX77XX_SPI_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include "chip.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Maximum allowed speed as per data sheet for all SPIs (both pclk1 and pclk2)*/
+
+#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
+#  define STM32_SPI_CLK_MAX       50000000UL
+#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+#  define STM32_SPI_CLK_MAX       54000000UL
+#endif
+
+/* Register Offsets *****************************************************************/
+
+#define STM32_SPI_CR1_OFFSET      0x0000  /* SPI Control Register 1 (16-bit) */
+#define STM32_SPI_CR2_OFFSET      0x0004  /* SPI control register 2 (16-bit) */
+#define STM32_SPI_SR_OFFSET       0x0008  /* SPI status register (16-bit) */
+#define STM32_SPI_DR_OFFSET       0x000c  /* SPI data register (16-bit) */
+#define STM32_SPI_CRCPR_OFFSET    0x0010  /* SPI CRC polynomial register (16-bit) */
+#define STM32_SPI_RXCRCR_OFFSET   0x0014  /* SPI Rx CRC register (16-bit) */
+#define STM32_SPI_TXCRCR_OFFSET   0x0018  /* SPI Tx CRC register (16-bit) */
+#define STM32_SPI_I2SCFGR_OFFSET  0x001c  /* I2S configuration register */
+#define STM32_SPI_I2SPR_OFFSET    0x0020  /* I2S prescaler register */
+
+/* Register Addresses ***************************************************************/
+
+#if STM32F7_NSPI > 0
+#  define STM32_SPI1_CR1          (STM32_SPI1_BASE+STM32_SPI_CR1_OFFSET)
+#  define STM32_SPI1_CR2          (STM32_SPI1_BASE+STM32_SPI_CR2_OFFSET)
+#  define STM32_SPI1_SR           (STM32_SPI1_BASE+STM32_SPI_SR_OFFSET)
+#  define STM32_SPI1_DR           (STM32_SPI1_BASE+STM32_SPI_DR_OFFSET)
+#  define STM32_SPI1_CRCPR        (STM32_SPI1_BASE+STM32_SPI_CRCPR_OFFSET)
+#  define STM32_SPI1_RXCRCR       (STM32_SPI1_BASE+STM32_SPI_RXCRCR_OFFSET)
+#  define STM32_SPI1_TXCRCR       (STM32_SPI1_BASE+STM32_SPI_TXCRCR_OFFSET)
+#endif
+
+#if STM32F7_NSPI > 1
+#  define STM32_SPI2_CR1          (STM32_SPI2_BASE+STM32_SPI_CR1_OFFSET)
+#  define STM32_SPI2_CR2          (STM32_SPI2_BASE+STM32_SPI_CR2_OFFSET)
+#  define STM32_SPI2_SR           (STM32_SPI2_BASE+STM32_SPI_SR_OFFSET)
+#  define STM32_SPI2_DR           (STM32_SPI2_BASE+STM32_SPI_DR_OFFSET)
+#  define STM32_SPI2_CRCPR        (STM32_SPI2_BASE+STM32_SPI_CRCPR_OFFSET)
+#  define STM32_SPI2_RXCRCR       (STM32_SPI2_BASE+STM32_SPI_RXCRCR_OFFSET)
+#  define STM32_SPI2_TXCRCR       (STM32_SPI2_BASE+STM32_SPI_TXCRCR_OFFSET)
+#  define STM32_SPI2_I2SCFGR      (STM32_SPI2_BASE+STM32_SPI_I2SCFGR_OFFSET)
+#  define STM32_SPI2_I2SPR        (STM32_SPI2_BASE+STM32_SPI_I2SPR_OFFSET)
+#endif
+
+#if STM32F7_NSPI > 2
+#  define STM32_SPI3_CR1          (STM32_SPI3_BASE+STM32_SPI_CR1_OFFSET)
+#  define STM32_SPI3_CR2          (STM32_SPI3_BASE+STM32_SPI_CR2_OFFSET)
+#  define STM32_SPI3_SR           (STM32_SPI3_BASE+STM32_SPI_SR_OFFSET)
+#  define STM32_SPI3_DR           (STM32_SPI3_BASE+STM32_SPI_DR_OFFSET)
+#  define STM32_SPI3_CRCPR        (STM32_SPI3_BASE+STM32_SPI_CRCPR_OFFSET)
+#  define STM32_SPI3_RXCRCR       (STM32_SPI3_BASE+STM32_SPI_RXCRCR_OFFSET)
+#  define STM32_SPI3_TXCRCR       (STM32_SPI3_BASE+STM32_SPI_TXCRCR_OFFSET)
+#  define STM32_SPI3_I2SCFGR      (STM32_SPI3_BASE+STM32_SPI_I2SCFGR_OFFSET)
+#  define STM32_SPI3_I2SPR        (STM32_SPI3_BASE+STM32_SPI_I2SPR_OFFSET)
+#endif
+
+#if STM32F7_NSPI > 3
+#  define STM32_SPI4_CR1          (STM32_SPI4_BASE+STM32_SPI_CR1_OFFSET)
+#  define STM32_SPI4_CR2          (STM32_SPI4_BASE+STM32_SPI_CR2_OFFSET)
+#  define STM32_SPI4_SR           (STM32_SPI4_BASE+STM32_SPI_SR_OFFSET)
+#  define STM32_SPI4_DR           (STM32_SPI4_BASE+STM32_SPI_DR_OFFSET)
+#  define STM32_SPI4_CRCPR        (STM32_SPI4_BASE+STM32_SPI_CRCPR_OFFSET)
+#  define STM32_SPI4_RXCRCR       (STM32_SPI4_BASE+STM32_SPI_RXCRCR_OFFSET)
+#  define STM32_SPI4_TXCRCR       (STM32_SPI4_BASE+STM32_SPI_TXCRCR_OFFSET)
+#  define STM32_SPI4_I2SCFGR      (STM32_SPI4_BASE+STM32_SPI_I2SCFGR_OFFSET)
+#  define STM32_SPI4_I2SPR        (STM32_SPI4_BASE+STM32_SPI_I2SPR_OFFSET)
+#endif
+
+#if STM32F7_NSPI > 4
+#  define STM32_SPI5_CR1          (STM32_SPI5_BASE+STM32_SPI_CR1_OFFSET)
+#  define STM32_SPI5_CR2          (STM32_SPI5_BASE+STM32_SPI_CR2_OFFSET)
+#  define STM32_SPI5_SR           (STM32_SPI5_BASE+STM32_SPI_SR_OFFSET)
+#  define STM32_SPI5_DR           (STM32_SPI5_BASE+STM32_SPI_DR_OFFSET)
+#  define STM32_SPI5_CRCPR        (STM32_SPI5_BASE+STM32_SPI_CRCPR_OFFSET)
+#  define STM32_SPI5_RXCRCR       (STM32_SPI5_BASE+STM32_SPI_RXCRCR_OFFSET)
+#  define STM32_SPI5_TXCRCR       (STM32_SPI5_BASE+STM32_SPI_TXCRCR_OFFSET)
+#  define STM32_SPI5_I2SCFGR      (STM32_SPI5_BASE+STM32_SPI_I2SCFGR_OFFSET)
+#  define STM32_SPI5_I2SPR        (STM32_SPI5_BASE+STM32_SPI_I2SPR_OFFSET)
+#endif
+
+#if STM32F7_NSPI > 5
+#  define STM32_SPI6_CR1          (STM32_SPI6_BASE+STM32_SPI_CR1_OFFSET)
+#  define STM32_SPI6_CR2          (STM32_SPI6_BASE+STM32_SPI_CR2_OFFSET)
+#  define STM32_SPI6_SR           (STM32_SPI6_BASE+STM32_SPI_SR_OFFSET)
+#  define STM32_SPI6_DR           (STM32_SPI6_BASE+STM32_SPI_DR_OFFSET)
+#  define STM32_SPI6_CRCPR        (STM32_SPI6_BASE+STM32_SPI_CRCPR_OFFSET)
+#  define STM32_SPI6_RXCRCR       (STM32_SPI6_BASE+STM32_SPI_RXCRCR_OFFSET)
+#  define STM32_SPI6_TXCRCR       (STM32_SPI6_BASE+STM32_SPI_TXCRCR_OFFSET)
+#  define STM32_SPI6_I2SCFGR      (STM32_SPI6_BASE+STM32_SPI_I2SCFGR_OFFSET)
+#  define STM32_SPI6_I2SPR        (STM32_SPI6_BASE+STM32_SPI_I2SPR_OFFSET)
+#endif
+
+/* Register Bitfield Definitions ****************************************************/
+
+/* SPI Control Register 1 */
+
+#define SPI_CR1_CPHA              (1 << 0)  /* Bit 0: Clock Phase */
+#define SPI_CR1_CPOL              (1 << 1)  /* Bit 1: Clock Polarity */
+#define SPI_CR1_MSTR              (1 << 2)  /* Bit 2: Master Selection */
+#define SPI_CR1_BR_SHIFT          (3)       /* Bits 5:3 Baud Rate Control */
+#define SPI_CR1_BR_MASK           (7 << SPI_CR1_BR_SHIFT)
+#  define SPI_CR1_FPCLCKd2        (0 << SPI_CR1_BR_SHIFT) /* 000: fPCLK/2 */
+#  define SPI_CR1_FPCLCKd4        (1 << SPI_CR1_BR_SHIFT) /* 001: fPCLK/4 */
+#  define SPI_CR1_FPCLCKd8        (2 << SPI_CR1_BR_SHIFT) /* 010: fPCLK/8 */
+#  define SPI_CR1_FPCLCKd16       (3 << SPI_CR1_BR_SHIFT) /* 011: fPCLK/16 */
+#  define SPI_CR1_FPCLCKd32       (4 << SPI_CR1_BR_SHIFT) /* 100: fPCLK/32 */
+#  define SPI_CR1_FPCLCKd64       (5 << SPI_CR1_BR_SHIFT) /* 101: fPCLK/64 */
+#  define SPI_CR1_FPCLCKd128      (6 << SPI_CR1_BR_SHIFT) /* 110: fPCLK/128 */
+#  define SPI_CR1_FPCLCKd256      (7 << SPI_CR1_BR_SHIFT) /* 111: fPCLK/256 */
+#define SPI_CR1_SPE               (1 << 6)  /* Bit 6: SPI Enable */
+#define SPI_CR1_LSBFIRST          (1 << 7)  /* Bit 7: Frame Format */
+#define SPI_CR1_SSI               (1 << 8)  /* Bit 8: Internal slave select */
+#define SPI_CR1_SSM               (1 << 9)  /* Bit 9: Software slave management */
+#define SPI_CR1_RXONLY            (1 << 10) /* Bit 10: Receive only */
+#define SPI_CR1_CRCL              (1 << 11) /* Bit 11: CRC length */
+#define SPI_CR1_CRCNEXT           (1 << 12) /* Bit 12: Transmit CRC next */
+#define SPI_CR1_CRCEN             (1 << 13) /* Bit 13: Hardware CRC calculation enable */
+#define SPI_CR1_BIDIOE            (1 << 14) /* Bit 14: Output enable in bidirectional mode */
+#define SPI_CR1_BIDIMODE          (1 << 15) /* Bit 15: Bidirectional data mode enable */
+
+/* SPI Control Register 2 */
+
+#define SPI_CR2_RXDMAEN           (1 << 0)  /* Bit 0: Rx Buffer DMA Enable */
+#define SPI_CR2_TXDMAEN           (1 << 1)  /* Bit 1: Tx Buffer DMA Enable */
+#define SPI_CR2_SSOE              (1 << 2)  /* Bit 2: SS Output Enable */
+#define SPI_CR2_NSSP              (1 << 3)  /* Bit 3 NSSP: NSS pulse management */
+#define SPI_CR2_FRF               (1 << 4)  /* Bit 4: Frame format */
+#define SPI_CR2_ERRIE             (1 << 5)  /* Bit 5: Error interrupt enable */
+#define SPI_CR2_RXNEIE            (1 << 6)  /* Bit 6: RX buffer not empty interrupt enable */
+#define SPI_CR2_TXEIE             (1 << 7)  /* Bit 7: Tx buffer empty interrupt enable */
+#define SPI_CR2_DS_SHIFT          (8)       /* Bits 8-11:  Data size */
+#define SPI_CR2_DS_MASK           (0xf << SPI_CR2_DS_SHIFT)
+#  define SPI_CR2_DS_VAL(bits)    (((bits)-1) << SPI_CR2_DS_SHIFT)
+#  define SPI_CR2_DS_4BIT         SPI_CR2_DS_VAL(4)
+#  define SPI_CR2_DS_5BIT         SPI_CR2_DS_VAL(5)
+#  define SPI_CR2_DS_6BIT         SPI_CR2_DS_VAL(6)
+#  define SPI_CR2_DS_7BIT         SPI_CR2_DS_VAL(7)
+#  define SPI_CR2_DS_8BIT         SPI_CR2_DS_VAL(8)
+#  define SPI_CR2_DS_9BIT         SPI_CR2_DS_VAL(9)
+#  define SPI_CR2_DS_10BIT        SPI_CR2_DS_VAL(10)
+#  define SPI_CR2_DS_11BIT        SPI_CR2_DS_VAL(11)
+#  define SPI_CR2_DS_12BIT        SPI_CR2_DS_VAL(12)
+#  define SPI_CR2_DS_13BIT        SPI_CR2_DS_VAL(13)
+#  define SPI_CR2_DS_14BIT        SPI_CR2_DS_VAL(14)
+#  define SPI_CR2_DS_15BIT        SPI_CR2_DS_VAL(15)
+#  define SPI_CR2_DS_16BIT        SPI_CR2_DS_VAL(16)
+#define SPI_CR2_FRXTH             (1 << 12) /* Bit 12: FIFO reception threshold */
+#define SPI_CR2_LDMARX            (1 << 13) /* Bit 13: Last DMA transfer for receptione */
+#define SPI_CR2_LDMATX            (1 << 14) /* Bit 14: Last DMA transfer for transmission */
+
+/* SPI status register */
+
+#define SPI_SR_RXNE               (1 << 0)  /* Bit 0: Receive buffer not empty */
+#define SPI_SR_TXE                (1 << 1)  /* Bit 1: Transmit buffer empty */
+#define SPI_SR_CHSIDE             (1 << 2)  /* Bit 2: Channel side (i2s) */
+#define SPI_SR_UDR                (1 << 3)  /* Bit 3: Underrun flag (i2s) */
+#define SPI_SR_CRCERR             (1 << 4)  /* Bit 4: CRC error flag */
+#define SPI_SR_MODF               (1 << 5)  /* Bit 5: Mode fault */
+#define SPI_SR_OVR                (1 << 6)  /* Bit 6: Overrun flag */
+#define SPI_SR_BSY                (1 << 7)  /* Bit 7: Busy flag */
+#define SPI_SR_FRE                (1 << 8)  /* Bit 8: Frame format error */
+#define SPI_SR_FRLVL_SHIFT        (9)       /* Bits 9-10: FIFO reception level */
+#define SPI_SR_FRLVL_MASK         (3 << SPI_SR_FRLVL_SHIFT)
+#  define SPI_SR_FRLVL_EMPTY      (0 << SPI_SR_FRLVL_SHIFT) /* FIFO empty */
+#  define SPI_SR_FRLVL_QUARTER    (1 << SPI_SR_FRLVL_SHIFT) /* 1/4 FIFO */
+#  define SPI_SR_FRLVL_HALF       (2 << SPI_SR_FRLVL_SHIFT) /* 1/2 FIFO */
+#  define SPI_SR_FRLVL_FULL       (3 << SPI_SR_FRLVL_SHIFT) /* FIFO full */
+#define SPI_SR_FTLVL_SHIFT        (11)      /* Bits 11-12: FIFO transmission level */
+#define SPI_SR_FTLVL_MASK         (3 << SPI_SR_FTLVL_SHIFT)
+#  define SPI_SR_FTLVL_EMPTY      (0 << SPI_SR_FTLVL_SHIFT) /* FIFO empty */
+#  define SPI_SR_FTLVL_QUARTER    (1 << SPI_SR_FTLVL_SHIFT) /* 1/4 FIFO */
+#  define SPI_SR_FTLVL_HALF       (2 << SPI_SR_FTLVL_SHIFT) /* 1/2 FIFO */
+#  define SPI_SR_FTLVL_FULL       (3 << SPI_SR_FTLVL_SHIFT) /* FIFO full */
+
+/* I2S configuration register */
+
+#define SPI_I2SCFGR_CHLEN          (1 << 0)  /* Bit 0: Channel length (number of bits per audio channel) */
+#define SPI_I2SCFGR_DATLEN_SHIFT   (1)       /* Bit 1-2: Data length to be transferred */
+#define SPI_I2SCFGR_DATLEN_MASK    (3 << SPI_I2SCFGR_DATLEN_SHIFT)
+#  define SPI_I2SCFGR_DATLEN_16BIT (0 << SPI_I2SCFGR_DATLEN_SHIFT) /* 00: 16-bit data length */
+#  define SPI_I2SCFGR_DATLEN_8BIT  (1 << SPI_I2SCFGR_DATLEN_SHIFT) /* 01: 24-bit data length */
+#  define SPI_I2SCFGR_DATLEN_32BIT (2 << SPI_I2SCFGR_DATLEN_SHIFT) /* 10: 32-bit data length */
+#define SPI_I2SCFGR_CKPOL          (1 << 3)  /* Bit 3: Steady state clock polarity */
+#define SPI_I2SCFGR_I2SSTD_SHIFT   (4)       /* Bit 4-5: I2S standard selection */
+#define SPI_I2SCFGR_I2SSTD_MASK    (3 << SPI_I2SCFGR_I2SSTD_SHIFT)
+#  define SPI_I2SCFGR_I2SSTD_PHILLIPS (0 << SPI_I2SCFGR_I2SSTD_SHIFT) /* 00: I2S Phillips standard. */
+#  define SPI_I2SCFGR_I2SSTD_MSB      (1 << SPI_I2SCFGR_I2SSTD_SHIFT) /* 01: MSB justified standard (left justified) */
+#  define SPI_I2SCFGR_I2SSTD_LSB      (2 << SPI_I2SCFGR_I2SSTD_SHIFT) /* 10: LSB justified standard (right justified) */
+#  define SPI_I2SCFGR_I2SSTD_PCM      (3 << SPI_I2SCFGR_I2SSTD_SHIFT) /* 11: PCM standard */
+#define SPI_I2SCFGR_PCMSYNC        (1 << 7)  /* Bit 7: PCM frame synchronization */
+#define SPI_I2SCFGR_I2SCFG_SHIFT   (8)       /* Bit 8-9: I2S configuration mode */
+#define SPI_I2SCFGR_I2SCFG_MASK    (3 << SPI_I2SCFGR_I2SCFG_SHIFT)
+#  define SPI_I2SCFGR_I2SCFG_STX   (0 << SPI_I2SCFGR_I2SCFG_SHIFT) /* 00: Slave - transmit */
+#  define SPI_I2SCFGR_I2SCFG_SRX   (1 << SPI_I2SCFGR_I2SCFG_SHIFT) /* 01: Slave - receive */
+#  define SPI_I2SCFGR_I2SCFG_MTX   (2 << SPI_I2SCFGR_I2SCFG_SHIFT) /* 10: Master - transmit */
+#  define SPI_I2SCFGR_I2SCFG_MRX   (3 << SPI_I2SCFGR_I2SCFG_SHIFT) /* 11: Master - receive */
+#define SPI_I2SCFGR_I2SE           (1 << 10) /* Bit 10: I2S Enable */
+#define SPI_I2SCFGR_I2SMOD         (1 << 11) /* Bit 11: I2S mode selection */
+#define SPI_I2SCFGR_ASTRTEN        (1 << 12) /* Bit 12: Asynchronous start enable */
+
+/* I2S prescaler register */
+
+#define SPI_I2SPR_I2SDIV_SHIFT    (0)       /* Bit 0-7: I2S Linear prescaler */
+#define SPI_I2SPR_I2SDIV_MASK     (0xff << SPI_I2SPR_I2SDIV_SHIFT)
+#define SPI_I2SPR_ODD             (1 << 8)  /* Bit 8: Odd factor for the prescaler */
+#define SPI_I2SPR_MCKOE           (1 << 9)  /* Bit 9: Master clock output enable */
+
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XX77XX_SPI_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_uart.h b/arch/arm/src/stm32f7/chip/stm32f74xx77xx_uart.h
similarity index 98%
rename from arch/arm/src/stm32f7/chip/stm32f74xx75xx_uart.h
rename to arch/arm/src/stm32f7/chip/stm32f74xx77xx_uart.h
index 50d5f949f5fe62ce6bce527a90e82e2882287035..4d109bead0d6ef5a0d8e20f2e6f46453741f6643 100644
--- a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_uart.h
+++ b/arch/arm/src/stm32f7/chip/stm32f74xx77xx_uart.h
@@ -1,8 +1,9 @@
 /************************************************************************************
- * arch/arm/src/stm32f7/chip/stm32f74xxf75xx_uart.h
+ * arch/arm/src/stm32f7/chip/stm32f74xxf77xx_uart.h
  *
  *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -33,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_STC_STM32F7_CHIP_STM32F74XX75XX_UART_H
-#define __ARCH_ARM_STC_STM32F7_CHIP_STM32F74XX75XX_UART_H
+#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XX77XX_UART_H
+#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XX77XX_UART_H
 
 /************************************************************************************
  * Included Files
@@ -42,7 +43,8 @@
 
 #include 
 
-#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
+#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) || \
+    defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -366,4 +368,4 @@
 #define USART_TDR_MASK            (0x1ff << USART_TDR_SHIFT)
 
 #endif /* CONFIG_STM32F7_STM32F74XX || CONFIG_STM32F7_STM32F75XX */
-#endif /* __ARCH_ARM_STC_STM32F7_CHIP_STM32F74XX75XX_UART_H */
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XX77XX_UART_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_dbgmcu.h b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_dbgmcu.h
new file mode 100644
index 0000000000000000000000000000000000000000..6804dc2574891d0e8233f868dc6a61d2bb51c7f1
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_dbgmcu.h
@@ -0,0 +1,113 @@
+/****************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32f76xx77xx_dbgmcu.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XXDBGMCU_H
+#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XXDBGMCU_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Register Addresses *******************************************************/
+
+#define STM32_DBGMCU_IDCODE       0xe0042000  /* MCU identifier */
+#define STM32_DBGMCU_CR           0xe0042004  /* MCU debug */
+#define STM32_DBGMCU_APB1_FZ      0xe0042008  /* Debug MCU APB1 freeze register */
+#define STM32_DBGMCU_APB2_FZ      0xe004200c  /* Debug MCU APB2 freeze register */
+
+/* Register Bitfield Definitions ********************************************/
+
+/* MCU identifier */
+
+#define DBGMCU_IDCODE_DEVID_SHIFT (0)       /* Bits 11-0: Device Identifier */
+#define DBGMCU_IDCODE_DEVID_MASK  (0x0fff << DBGMCU_IDCODE_DEVID_SHIFT)
+#define DBGMCU_IDCODE_REVID_SHIFT (16)      /* Bits 31-16:  Revision Identifier */
+#define DBGMCU_IDCODE_REVID_MASK  (0xffff << DBGMCU_IDCODE_REVID_SHIFT)
+
+/* MCU debug */
+
+#define DBGMCU_CR_SLEEP           (1 << 0)  /* Bit 0: Debug Sleep Mode */
+#define DBGMCU_CR_STOP            (1 << 1)  /* Bit 1: Debug Stop Mode */
+#define DBGMCU_CR_STANDBY         (1 << 2)  /* Bit 2: Debug Standby mode */
+#define DBGMCU_CR_TRACEIOEN       (1 << 5)  /* Bit 5: Trace enabled */
+
+#define DBGMCU_CR_TRACEMODE_SHIFT (6)        /* Bits 7-6: Trace mode pin assignement */
+#define DBGMCU_CR_TRACEMODE_MASK  (3 << DBGMCU_CR_TRACEMODE_SHIFT)
+#define DBGMCU_CR_ASYNCH          (0 << DBGMCU_CR_TRACEMODE_SHIFT) /* Asynchronous Mode */
+#define DBGMCU_CR_SYNCH1          (1 << DBGMCU_CR_TRACEMODE_SHIFT) /* Synchronous Mode, TRACEDATA size=1 */
+#define DBGMCU_CR_SYNCH2          (2 << DBGMCU_CR_TRACEMODE_SHIFT) /* Synchronous Mode, TRACEDATA size=2 */
+#define DBGMCU_CR_SYNCH4          (3 << DBGMCU_CR_TRACEMODE_SHIFT) /* Synchronous Mode, TRACEDATA size=4 */
+
+/* Debug MCU APB1 freeze register */
+
+#define DBGMCU_APB1_TIM2STOP      (1 << 0)   /* Bit 0: TIM2 stopped when core is halted */
+#define DBGMCU_APB1_TIM3STOP      (1 << 1)   /* Bit 1: TIM3 stopped when core is halted */
+#define DBGMCU_APB1_TIM4STOP      (1 << 2)   /* Bit 2: TIM4 stopped when core is halted */
+#define DBGMCU_APB1_TIM5STOP      (1 << 3)   /* Bit 3: TIM5 stopped when core is halted */
+#define DBGMCU_APB1_TIM6STOP      (1 << 4)   /* Bit 4: TIM6 stopped when core is halted */
+#define DBGMCU_APB1_TIM7STOP      (1 << 5)   /* Bit 5: TIM7 stopped when core is halted */
+#define DBGMCU_APB1_TIM12STOP     (1 << 6)   /* Bit 6: TIM12 stopped when core is halted */
+#define DBGMCU_APB1_TIM13STOP     (1 << 7)   /* Bit 7: TIM13 stopped when core is halted */
+#define DBGMCU_APB1_TIM14STOP     (1 << 8)   /* Bit 8: TIM14 stopped when core is halted */
+#define DBGMCU_APB1_LPTIM1STOP    (1 << 9)   /* Bit 9: LPTIM1 stopped when core is halted */
+#define DBGMCU_APB1_RTCSTOP       (1 << 10)  /* Bit 10: RTC stopped when Core is halted */
+#define DBGMCU_APB1_WWDGSTOP      (1 << 11)  /* Bit 11: Window Watchdog stopped when core is halted */
+#define DBGMCU_APB1_IWDGSTOP      (1 << 12)  /* Bit 12: Independent Watchdog stopped when core is halted */
+#define DBGMCU_APB1_CAN3STOP      (1 << 13)  /* Bit 13: CAN3 stopped when Core is halted */
+#define DBGMCU_APB1_I2C1STOP      (1 << 21)  /* Bit 21: I2C1 SMBUS timeout mode stopped when Core is halted */
+#define DBGMCU_APB1_I2C2STOP      (1 << 22)  /* Bit 22: I2C2 SMBUS timeout mode stopped when Core is halted */
+#define DBGMCU_APB1_I2C3STOP      (1 << 23)  /* Bit 23: I2C3 SMBUS timeout mode stopped when Core is halted */
+#define DBGMCU_APB1_I2C4STOP      (1 << 24)  /* Bit 24: I2C4 SMBUS timeout mode stopped when Core is halted */
+#define DBGMCU_APB1_CAN1STOP      (1 << 25)  /* Bit 25: CAN1 stopped when core is halted */
+#define DBGMCU_APB1_CAN2STOP      (1 << 26)  /* Bit 26: CAN2 stopped when core is halted */
+
+/* Debug MCU APB2 freeze register */
+
+#define DBGMCU_APB2_TIM1STOP      (1 << 0)   /* Bit 0:  TIM1 stopped when core is halted */
+#define DBGMCU_APB2_TIM8STOP      (1 << 1)   /* Bit 1:  TIM8 stopped when core is halted */
+#define DBGMCU_APB2_TIM9STOP      (1 << 16)  /* Bit 16: TIM9 stopped when core is halted */
+#define DBGMCU_APB2_TIM10STOP     (1 << 17)  /* Bit 17: TIM10 stopped when core is halted */
+#define DBGMCU_APB2_TIM11STOP     (1 << 18)  /* Bit 18: TIM11 stopped when core is halted */
+
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XXDBGMCU_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_dma.h b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_dma.h
new file mode 100644
index 0000000000000000000000000000000000000000..d4d4eb0f8931b76ac8ad68aad7c0b95bbf14575c
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_dma.h
@@ -0,0 +1,593 @@
+/************************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32f76xx77xx_dma.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            Davod Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XXX77XX_DMA_H
+#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XXX77XX_DMA_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#if defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* 2 DMA controllers */
+
+#define DMA1                      (0)
+#define DMA2                      (1)
+
+/* 8 DMA streams */
+
+#define DMA_STREAM0               (0)
+#define DMA_STREAM1               (1)
+#define DMA_STREAM2               (2)
+#define DMA_STREAM3               (3)
+#define DMA_STREAM4               (4)
+#define DMA_STREAM5               (5)
+#define DMA_STREAM6               (6)
+#define DMA_STREAM7               (7)
+
+/* 16 DMA channels */
+
+#define DMA_CHAN0                 (0)
+#define DMA_CHAN1                 (1)
+#define DMA_CHAN2                 (2)
+#define DMA_CHAN3                 (3)
+#define DMA_CHAN4                 (4)
+#define DMA_CHAN5                 (5)
+#define DMA_CHAN6                 (6)
+#define DMA_CHAN7                 (7)
+#define DMA_CHAN8                 (8)
+#define DMA_CHAN9                 (9)
+#define DMA_CHAN10                (10)
+#define DMA_CHAN11                (11)
+#define DMA_CHAN12                (12)
+#define DMA_CHAN13                (13)
+#define DMA_CHAN14                (14)
+#define DMA_CHAN15                (15)
+
+/* Register Offsets *****************************************************************/
+
+#define STM32_DMA_LISR_OFFSET     0x0000 /* DMA low interrupt status register */
+#define STM32_DMA_HISR_OFFSET     0x0004 /* DMA high interrupt status register */
+#define STM32_DMA_LIFCR_OFFSET    0x0008 /* DMA low interrupt flag clear register */
+#define STM32_DMA_HIFCR_OFFSET    0x000c /* DMA high interrupt flag clear register */
+
+#define STM32_DMA_OFFSET(n)       (0x0010+0x0018*(n))
+#define STM32_DMA_SCR_OFFSET      0x0000 /* DMA stream n configuration register */
+#define STM32_DMA_SNDTR_OFFSET    0x0004 /* DMA stream n number of data register */
+#define STM32_DMA_SPAR_OFFSET     0x0008 /* DMA stream n peripheral address register */
+#define STM32_DMA_SM0AR_OFFSET    0x000c /* DMA stream n memory 0 address register */
+#define STM32_DMA_SM1AR_OFFSET    0x0010 /* DMA stream n memory 1 address register */
+#define STM32_DMA_SFCR_OFFSET     0x0014 /* DMA stream n FIFO control register */
+
+#define STM32_DMA_S0CR_OFFSET     0x0010 /* DMA stream 0 configuration register */
+#define STM32_DMA_S1CR_OFFSET     0x0028 /* DMA stream 1 configuration register */
+#define STM32_DMA_S2CR_OFFSET     0x0040 /* DMA stream 2 configuration register */
+#define STM32_DMA_S3CR_OFFSET     0x0058 /* DMA stream 3 configuration register */
+#define STM32_DMA_S4CR_OFFSET     0x0070 /* DMA stream 4 configuration register */
+#define STM32_DMA_S5CR_OFFSET     0x0088 /* DMA stream 5 configuration register */
+#define STM32_DMA_S6CR_OFFSET     0x00a0 /* DMA stream 6 configuration register */
+#define STM32_DMA_S7CR_OFFSET     0x00b8 /* DMA stream 7 configuration register */
+
+#define STM32_DMA_S0NDTR_OFFSET   0x0014 /* DMA stream 0 number of data register */
+#define STM32_DMA_S1NDTR_OFFSET   0x002c /* DMA stream 1 number of data register */
+#define STM32_DMA_S2NDTR_OFFSET   0x0044 /* DMA stream 2 number of data register */
+#define STM32_DMA_S3NDTR_OFFSET   0x005c /* DMA stream 3 number of data register */
+#define STM32_DMA_S4NDTR_OFFSET   0x0074 /* DMA stream 4 number of data register */
+#define STM32_DMA_S5NDTR_OFFSET   0x008c /* DMA stream 5 number of data register */
+#define STM32_DMA_S6NDTR_OFFSET   0x00a4 /* DMA stream 6 number of data register */
+#define STM32_DMA_S7NDTR_OFFSET   0x00bc /* DMA stream 7 number of data register */
+
+#define STM32_DMA_S0PAR_OFFSET    0x0018 /* DMA stream 0 peripheral address register */
+#define STM32_DMA_S1PAR_OFFSET    0x0030 /* DMA stream 1 peripheral address register */
+#define STM32_DMA_S2PAR_OFFSET    0x0048 /* DMA stream 2 peripheral address register */
+#define STM32_DMA_S3PAR_OFFSET    0x0060 /* DMA stream 3 peripheral address register */
+#define STM32_DMA_S4PAR_OFFSET    0x0078 /* DMA stream 4 peripheral address register */
+#define STM32_DMA_S5PAR_OFFSET    0x0090 /* DMA stream 5 peripheral address register */
+#define STM32_DMA_S6PAR_OFFSET    0x00a8 /* DMA stream 6 peripheral address register */
+#define STM32_DMA_S7PAR_OFFSET    0x00c0 /* DMA stream 7 peripheral address register */
+
+#define STM32_DMA_S0M0AR_OFFSET   0x001c /* DMA stream 0 memory 0 address register */
+#define STM32_DMA_S1M0AR_OFFSET   0x0034 /* DMA stream 1 memory 0 address register */
+#define STM32_DMA_S2M0AR_OFFSET   0x004c /* DMA stream 2 memory 0 address register */
+#define STM32_DMA_S3M0AR_OFFSET   0x0064 /* DMA stream 3 memory 0 address register */
+#define STM32_DMA_S4M0AR_OFFSET   0x007c /* DMA stream 4 memory 0 address register */
+#define STM32_DMA_S5M0AR_OFFSET   0x0094 /* DMA stream 5 memory 0 address register */
+#define STM32_DMA_S6M0AR_OFFSET   0x00ac /* DMA stream 6 memory 0 address register */
+#define STM32_DMA_S7M0AR_OFFSET   0x00c4 /* DMA stream 7 memory 0 address register */
+
+#define STM32_DMA_S0M1AR_OFFSET   0x0020 /* DMA stream 0 memory 1 address register */
+#define STM32_DMA_S1M1AR_OFFSET   0x0038 /* DMA stream 1 memory 1 address register */
+#define STM32_DMA_S2M1AR_OFFSET   0x0050 /* DMA stream 2 memory 1 address register */
+#define STM32_DMA_S3M1AR_OFFSET   0x0068 /* DMA stream 3 memory 1 address register */
+#define STM32_DMA_S4M1AR_OFFSET   0x0080 /* DMA stream 4 memory 1 address register */
+#define STM32_DMA_S5M1AR_OFFSET   0x0098 /* DMA stream 5 memory 1 address register */
+#define STM32_DMA_S6M1AR_OFFSET   0x00b0 /* DMA stream 6 memory 1 address register */
+#define STM32_DMA_S7M1AR_OFFSET   0x00c8 /* DMA stream 7 memory 1 address register */
+
+#define STM32_DMA_S0FCR_OFFSET    0x0024 /* DMA stream 0 FIFO control register */
+#define STM32_DMA_S1FCR_OFFSET    0x003c /* DMA stream 1 FIFO control register */
+#define STM32_DMA_S2FCR_OFFSET    0x0054 /* DMA stream 2 FIFO control register */
+#define STM32_DMA_S3FCR_OFFSET    0x006c /* DMA stream 3 FIFO control register */
+#define STM32_DMA_S4FCR_OFFSET    0x0084 /* DMA stream 4 FIFO control register */
+#define STM32_DMA_S5FCR_OFFSET    0x009c /* DMA stream 5 FIFO control register */
+#define STM32_DMA_S6FCR_OFFSET    0x00b4 /* DMA stream 6 FIFO control register */
+#define STM32_DMA_S7FCR_OFFSET    0x00cc /* DMA stream 7 FIFO control register */
+
+/* Register Addresses ***************************************************************/
+
+#define STM32_DMA1_LISRC          (STM32_DMA1_BASE+STM32_DMA_LISR_OFFSET)
+#define STM32_DMA1_HISRC          (STM32_DMA1_BASE+STM32_DMA_HISR_OFFSET)
+#define STM32_DMA1_LIFCR          (STM32_DMA1_BASE+STM32_DMA_LIFCR_OFFSET)
+#define STM32_DMA1_HIFCR          (STM32_DMA1_BASE+STM32_DMA_HIFCR_OFFSET)
+
+#define STM32_DMA1_SCR(n)         (STM32_DMA1_BASE+STM32_DMA_SCR_OFFSET+STM32_DMA_OFFSET(n))
+#define STM32_DMA1_S0CR           (STM32_DMA1_BASE+STM32_DMA_S0CR_OFFSET)
+#define STM32_DMA1_S1CR           (STM32_DMA1_BASE+STM32_DMA_S1CR_OFFSET)
+#define STM32_DMA1_S2CR           (STM32_DMA1_BASE+STM32_DMA_S2CR_OFFSET)
+#define STM32_DMA1_S3CR           (STM32_DMA1_BASE+STM32_DMA_S3CR_OFFSET)
+#define STM32_DMA1_S4CR           (STM32_DMA1_BASE+STM32_DMA_S4CR_OFFSET)
+#define STM32_DMA1_S5CR           (STM32_DMA1_BASE+STM32_DMA_S5CR_OFFSET)
+#define STM32_DMA1_S6CR           (STM32_DMA1_BASE+STM32_DMA_S6CR_OFFSET)
+#define STM32_DMA1_S7CR           (STM32_DMA1_BASE+STM32_DMA_S7CR_OFFSET)
+
+#define STM32_DMA1_SNDTR(n)       (STM32_DMA1_BASE+STM32_DMA_SNDTR_OFFSET+STM32_DMA_OFFSET(n))
+#define STM32_DMA1_S0NDTR         (STM32_DMA1_BASE+STM32_DMA_S0NDTR_OFFSET)
+#define STM32_DMA1_S1NDTR         (STM32_DMA1_BASE+STM32_DMA_S1NDTR_OFFSET)
+#define STM32_DMA1_S2NDTR         (STM32_DMA1_BASE+STM32_DMA_S2NDTR_OFFSET)
+#define STM32_DMA1_S3NDTR         (STM32_DMA1_BASE+STM32_DMA_S3NDTR_OFFSET)
+#define STM32_DMA1_S4NDTR         (STM32_DMA1_BASE+STM32_DMA_S4NDTR_OFFSET)
+#define STM32_DMA1_S5NDTR         (STM32_DMA1_BASE+STM32_DMA_S5NDTR_OFFSET)
+#define STM32_DMA1_S6NDTR         (STM32_DMA1_BASE+STM32_DMA_S6NDTR_OFFSET)
+#define STM32_DMA1_S7NDTR         (STM32_DMA1_BASE+STM32_DMA_S7NDTR_OFFSET)
+
+#define STM32_DMA1_SPAR(n)        (STM32_DMA1_BASE+STM32_DMA_SPAR_OFFSET+STM32_DMA_OFFSET(n))
+#define STM32_DMA1_S0PAR          (STM32_DMA1_BASE+STM32_DMA_S0PAR_OFFSET)
+#define STM32_DMA1_S1PAR          (STM32_DMA1_BASE+STM32_DMA_S1PAR_OFFSET)
+#define STM32_DMA1_S2PAR          (STM32_DMA1_BASE+STM32_DMA_S2PAR_OFFSET)
+#define STM32_DMA1_S3PAR          (STM32_DMA1_BASE+STM32_DMA_S3PAR_OFFSET)
+#define STM32_DMA1_S4PAR          (STM32_DMA1_BASE+STM32_DMA_S4PAR_OFFSET)
+#define STM32_DMA1_S5PAR          (STM32_DMA1_BASE+STM32_DMA_S5PAR_OFFSET)
+#define STM32_DMA1_S6PAR          (STM32_DMA1_BASE+STM32_DMA_S6PAR_OFFSET)
+#define STM32_DMA1_S7PAR          (STM32_DMA1_BASE+STM32_DMA_S7PAR_OFFSET)
+
+#define STM32_DMA1_SM0AR(n)       (STM32_DMA1_BASE+STM32_DMA_SM0AR_OFFSET+STM32_DMA_OFFSET(n))
+#define STM32_DMA1_S0M0AR         (STM32_DMA1_BASE+STM32_DMA_S0M0AR_OFFSET)
+#define STM32_DMA1_S1M0AR         (STM32_DMA1_BASE+STM32_DMA_S1M0AR_OFFSET)
+#define STM32_DMA1_S2M0AR         (STM32_DMA1_BASE+STM32_DMA_S2M0AR_OFFSET)
+#define STM32_DMA1_S3M0AR         (STM32_DMA1_BASE+STM32_DMA_S3M0AR_OFFSET)
+#define STM32_DMA1_S4M0AR         (STM32_DMA1_BASE+STM32_DMA_S4M0AR_OFFSET)
+#define STM32_DMA1_S5M0AR         (STM32_DMA1_BASE+STM32_DMA_S5M0AR_OFFSET)
+#define STM32_DMA1_S6M0AR         (STM32_DMA1_BASE+STM32_DMA_S6M0AR_OFFSET)
+#define STM32_DMA1_S7M0AR         (STM32_DMA1_BASE+STM32_DMA_S7M0AR_OFFSET)
+
+#define STM32_DMA1_SM1AR(n)       (STM32_DMA1_BASE+STM32_DMA_SM1AR_OFFSET+STM32_DMA_OFFSET(n))
+#define STM32_DMA1_S0M1AR         (STM32_DMA1_BASE+STM32_DMA_S0M1AR_OFFSET)
+#define STM32_DMA1_S1M1AR         (STM32_DMA1_BASE+STM32_DMA_S1M1AR_OFFSET)
+#define STM32_DMA1_S2M1AR         (STM32_DMA1_BASE+STM32_DMA_S2M1AR_OFFSET)
+#define STM32_DMA1_S3M1AR         (STM32_DMA1_BASE+STM32_DMA_S3M1AR_OFFSET)
+#define STM32_DMA1_S4M1AR         (STM32_DMA1_BASE+STM32_DMA_S4M1AR_OFFSET)
+#define STM32_DMA1_S5M1AR         (STM32_DMA1_BASE+STM32_DMA_S5M1AR_OFFSET)
+#define STM32_DMA1_S6M1AR         (STM32_DMA1_BASE+STM32_DMA_S6M1AR_OFFSET)
+#define STM32_DMA1_S7M1AR         (STM32_DMA1_BASE+STM32_DMA_S7M1AR_OFFSET)
+
+#define STM32_DMA1_SFCR(n)        (STM32_DMA1_BASE+STM32_DMA_SFCR_OFFSET+STM32_DMA_OFFSET(n))
+#define STM32_DMA1_S0FCR          (STM32_DMA1_BASE+STM32_DMA_S0FCR_OFFSET)
+#define STM32_DMA1_S1FCR          (STM32_DMA1_BASE+STM32_DMA_S1FCR_OFFSET)
+#define STM32_DMA1_S2FCR          (STM32_DMA1_BASE+STM32_DMA_S2FCR_OFFSET)
+#define STM32_DMA1_S3FCR          (STM32_DMA1_BASE+STM32_DMA_S3FCR_OFFSET)
+#define STM32_DMA1_S4FCR          (STM32_DMA1_BASE+STM32_DMA_S4FCR_OFFSET)
+#define STM32_DMA1_S5FCR          (STM32_DMA1_BASE+STM32_DMA_S5FCR_OFFSET)
+#define STM32_DMA1_S6FCR          (STM32_DMA1_BASE+STM32_DMA_S6FCR_OFFSET)
+#define STM32_DMA1_S7FCR          (STM32_DMA1_BASE+STM32_DMA_S7FCR_OFFSET)
+
+#define STM32_DMA2_LISRC          (STM32_DMA2_BASE+STM32_DMA_LISR_OFFSET)
+#define STM32_DMA2_HISRC          (STM32_DMA2_BASE+STM32_DMA_HISR_OFFSET)
+#define STM32_DMA2_LIFCR          (STM32_DMA2_BASE+STM32_DMA_LIFCR_OFFSET)
+#define STM32_DMA2_HIFCR          (STM32_DMA2_BASE+STM32_DMA_HIFCR_OFFSET)
+
+#define STM32_DMA2_SCR(n)         (STM32_DMA2_BASE+STM32_DMA_SCR_OFFSET+STM32_DMA_OFFSET(n))
+#define STM32_DMA2_S0CR           (STM32_DMA2_BASE+STM32_DMA_S0CR_OFFSET)
+#define STM32_DMA2_S1CR           (STM32_DMA2_BASE+STM32_DMA_S1CR_OFFSET)
+#define STM32_DMA2_S2CR           (STM32_DMA2_BASE+STM32_DMA_S2CR_OFFSET)
+#define STM32_DMA2_S3CR           (STM32_DMA2_BASE+STM32_DMA_S3CR_OFFSET)
+#define STM32_DMA2_S4CR           (STM32_DMA2_BASE+STM32_DMA_S4CR_OFFSET)
+#define STM32_DMA2_S5CR           (STM32_DMA2_BASE+STM32_DMA_S5CR_OFFSET)
+#define STM32_DMA2_S6CR           (STM32_DMA2_BASE+STM32_DMA_S6CR_OFFSET)
+#define STM32_DMA2_S7CR           (STM32_DMA2_BASE+STM32_DMA_S7CR_OFFSET)
+
+#define STM32_DMA2_SNDTR(n)       (STM32_DMA2_BASE+STM32_DMA_SNDTR_OFFSET+STM32_DMA_OFFSET(n))
+#define STM32_DMA2_S0NDTR         (STM32_DMA2_BASE+STM32_DMA_S0NDTR_OFFSET)
+#define STM32_DMA2_S1NDTR         (STM32_DMA2_BASE+STM32_DMA_S1NDTR_OFFSET)
+#define STM32_DMA2_S2NDTR         (STM32_DMA2_BASE+STM32_DMA_S2NDTR_OFFSET)
+#define STM32_DMA2_S3NDTR         (STM32_DMA2_BASE+STM32_DMA_S3NDTR_OFFSET)
+#define STM32_DMA2_S4NDTR         (STM32_DMA2_BASE+STM32_DMA_S4NDTR_OFFSET)
+#define STM32_DMA2_S5NDTR         (STM32_DMA2_BASE+STM32_DMA_S5NDTR_OFFSET)
+#define STM32_DMA2_S6NDTR         (STM32_DMA2_BASE+STM32_DMA_S6NDTR_OFFSET)
+#define STM32_DMA2_S7NDTR         (STM32_DMA2_BASE+STM32_DMA_S7NDTR_OFFSET)
+
+#define STM32_DMA2_SPAR(n)        (STM32_DMA2_BASE+STM32_DMA_SPAR_OFFSET+STM32_DMA_OFFSET(n))
+#define STM32_DMA2_S0PAR          (STM32_DMA2_BASE+STM32_DMA_S0PAR_OFFSET)
+#define STM32_DMA2_S1PAR          (STM32_DMA2_BASE+STM32_DMA_S1PAR_OFFSET)
+#define STM32_DMA2_S2PAR          (STM32_DMA2_BASE+STM32_DMA_S2PAR_OFFSET)
+#define STM32_DMA2_S3PAR          (STM32_DMA2_BASE+STM32_DMA_S3PAR_OFFSET)
+#define STM32_DMA2_S4PAR          (STM32_DMA2_BASE+STM32_DMA_S4PAR_OFFSET)
+#define STM32_DMA2_S5PAR          (STM32_DMA2_BASE+STM32_DMA_S5PAR_OFFSET)
+#define STM32_DMA2_S6PAR          (STM32_DMA2_BASE+STM32_DMA_S6PAR_OFFSET)
+#define STM32_DMA2_S7PAR          (STM32_DMA2_BASE+STM32_DMA_S7PAR_OFFSET)
+
+#define STM32_DMA2_SM0AR(n)       (STM32_DMA2_BASE+STM32_DMA_SM0AR_OFFSET+STM32_DMA_OFFSET(n))
+#define STM32_DMA2_S0M0AR         (STM32_DMA2_BASE+STM32_DMA_S0M0AR_OFFSET)
+#define STM32_DMA2_S1M0AR         (STM32_DMA2_BASE+STM32_DMA_S1M0AR_OFFSET)
+#define STM32_DMA2_S2M0AR         (STM32_DMA2_BASE+STM32_DMA_S2M0AR_OFFSET)
+#define STM32_DMA2_S3M0AR         (STM32_DMA2_BASE+STM32_DMA_S3M0AR_OFFSET)
+#define STM32_DMA2_S4M0AR         (STM32_DMA2_BASE+STM32_DMA_S4M0AR_OFFSET)
+#define STM32_DMA2_S5M0AR         (STM32_DMA2_BASE+STM32_DMA_S5M0AR_OFFSET)
+#define STM32_DMA2_S6M0AR         (STM32_DMA2_BASE+STM32_DMA_S6M0AR_OFFSET)
+#define STM32_DMA2_S7M0AR         (STM32_DMA2_BASE+STM32_DMA_S7M0AR_OFFSET)
+
+#define STM32_DMA2_SM1AR(n)       (STM32_DMA2_BASE+STM32_DMA_SM1AR_OFFSET+STM32_DMA_OFFSET(n))
+#define STM32_DMA2_S0M1AR         (STM32_DMA2_BASE+STM32_DMA_S0M1AR_OFFSET)
+#define STM32_DMA2_S1M1AR         (STM32_DMA2_BASE+STM32_DMA_S1M1AR_OFFSET)
+#define STM32_DMA2_S2M1AR         (STM32_DMA2_BASE+STM32_DMA_S2M1AR_OFFSET)
+#define STM32_DMA2_S3M1AR         (STM32_DMA2_BASE+STM32_DMA_S3M1AR_OFFSET)
+#define STM32_DMA2_S4M1AR         (STM32_DMA2_BASE+STM32_DMA_S4M1AR_OFFSET)
+#define STM32_DMA2_S5M1AR         (STM32_DMA2_BASE+STM32_DMA_S5M1AR_OFFSET)
+#define STM32_DMA2_S6M1AR         (STM32_DMA2_BASE+STM32_DMA_S6M1AR_OFFSET)
+#define STM32_DMA2_S7M1AR         (STM32_DMA2_BASE+STM32_DMA_S7M1AR_OFFSET)
+
+#define STM32_DMA2_SFCR(n)        (STM32_DMA2_BASE+STM32_DMA_SFCR_OFFSET+STM32_DMA_OFFSET(n))
+#define STM32_DMA2_S0FCR          (STM32_DMA2_BASE+STM32_DMA_S0FCR_OFFSET)
+#define STM32_DMA2_S1FCR          (STM32_DMA2_BASE+STM32_DMA_S1FCR_OFFSET)
+#define STM32_DMA2_S2FCR          (STM32_DMA2_BASE+STM32_DMA_S2FCR_OFFSET)
+#define STM32_DMA2_S3FCR          (STM32_DMA2_BASE+STM32_DMA_S3FCR_OFFSET)
+#define STM32_DMA2_S4FCR          (STM32_DMA2_BASE+STM32_DMA_S4FCR_OFFSET)
+#define STM32_DMA2_S5FCR          (STM32_DMA2_BASE+STM32_DMA_S5FCR_OFFSET)
+#define STM32_DMA2_S6FCR          (STM32_DMA2_BASE+STM32_DMA_S6FCR_OFFSET)
+#define STM32_DMA2_S7FCR          (STM32_DMA2_BASE+STM32_DMA_S7FCR_OFFSET)
+
+/* Register Bitfield Definitions ****************************************************/
+
+#define DMA_STREAM_MASK           0x3f
+#define DMA_STREAM_FEIF_BIT       (1 << 0)  /* Bit 0: Stream FIFO error interrupt flag */
+#define DMA_STREAM_DMEIF_BIT      (1 << 2)  /* Bit 2: Stream direct mode error interrupt flag */
+#define DMA_STREAM_TEIF_BIT       (1 << 3)  /* Bit 3: Stream Transfer Error flag */
+#define DMA_STREAM_HTIF_BIT       (1 << 4)  /* Bit 4: Stream Half Transfer flag */
+#define DMA_STREAM_TCIF_BIT       (1 << 5)  /* Bit 5: Stream Transfer Complete flag */
+
+/* DMA interrupt status register and interrupt flag clear register field definitions */
+
+#define DMA_INT_STREAM0_SHIFT     (0)       /* Bits 0-5:   DMA Stream 0 interrupt */
+#define DMA_INT_STREAM0_MASK      (DMA_STREAM_MASK <<  DMA_INT_STREAM0_SHIFT)
+#define DMA_INT_STREAM1_SHIFT     (6)       /* Bits 6-11:  DMA Stream 1 interrupt */
+#define DMA_INT_STREAM1_MASK      (DMA_STREAM_MASK <<  DMA_INT_STREAM1_SHIFT)
+#define DMA_INT_STREAM2_SHIFT     (16)      /* Bits 16-21: DMA Stream 2 interrupt */
+#define DMA_INT_STREAM2_MASK      (DMA_STREAM_MASK <<  DMA_INT_STREAM2_SHIFT)
+#define DMA_INT_STREAM3_SHIFT     (22)      /* Bits 22-27: DMA Stream 3 interrupt */
+#define DMA_INT_STREAM3_MASK      (DMA_STREAM_MASK <<  DMA_INT_STREAM3_SHIFT)
+
+#define DMA_INT_STREAM4_SHIFT     (0)       /* Bits 0-5:   DMA Stream 4 interrupt */
+#define DMA_INT_STREAM4_MASK      (DMA_STREAM_MASK <<  DMA_INT_STREAM4_SHIFT)
+#define DMA_INT_STREAM5_SHIFT     (6)       /* Bits 6-11:  DMA Stream 5 interrupt */
+#define DMA_INT_STREAM5_MASK      (DMA_STREAM_MASK <<  DMA_INT_STREAM5_SHIFT)
+#define DMA_INT_STREAM6_SHIFT     (16)      /* Bits 16-21: DMA Stream 6 interrupt */
+#define DMA_INT_STREAM6_MASK      (DMA_STREAM_MASK <<  DMA_INT_STREAM6_SHIFT)
+#define DMA_INT_STREAM7_SHIFT     (22)      /* Bits 22-27: DMA Stream 7 interrupt */
+#define DMA_INT_STREAM7_MASK      (DMA_STREAM_MASK <<  DMA_INT_STREAM7_SHIFT)
+
+/* DMA stream configuration register */
+
+#define DMA_SCR_EN                (1 << 0)  /* Bit 0:  Stream enable */
+#define DMA_SCR_DMEIE             (1 << 1)  /* Bit 1:  Direct mode error interrupt enable */
+#define DMA_SCR_TEIE              (1 << 2)  /* Bit 2:  Transfer error interrupt enable */
+#define DMA_SCR_HTIE              (1 << 3)  /* Bit 3:  Half Transfer interrupt enable */
+#define DMA_SCR_TCIE              (1 << 4)  /* Bit 4:  Transfer complete interrupt enable */
+#define DMA_SCR_PFCTRL            (1 << 5)  /* Bit 5:  Peripheral flow controller */
+#define DMA_SCR_DIR_SHIFT         (6)       /* Bits 6-7: Data transfer direction */
+#define DMA_SCR_DIR_MASK          (3 << DMA_SCR_DIR_SHIFT)
+#  define DMA_SCR_DIR_P2M         (0 << DMA_SCR_DIR_SHIFT) /* 00: Peripheral-to-memory */
+#  define DMA_SCR_DIR_M2P         (1 << DMA_SCR_DIR_SHIFT) /* 01: Memory-to-peripheral */
+#  define DMA_SCR_DIR_M2M         (2 << DMA_SCR_DIR_SHIFT) /* 10: Memory-to-memory */
+#define DMA_SCR_CIRC              (1 << 8)  /* Bit 8:  Circular mode */
+#define DMA_SCR_PINC              (1 << 9)  /* Bit 9:  Peripheral increment mode */
+#define DMA_SCR_MINC              (1 << 10) /* Bit 10: Memory increment mode */
+#define DMA_SCR_PSIZE_SHIFT       (11)      /* Bits 11-12: Peripheral size */
+#define DMA_SCR_PSIZE_MASK        (3 << DMA_SCR_PSIZE_SHIFT)
+#  define DMA_SCR_PSIZE_8BITS     (0 << DMA_SCR_PSIZE_SHIFT) /* 00: 8-bits */
+#  define DMA_SCR_PSIZE_16BITS    (1 << DMA_SCR_PSIZE_SHIFT) /* 01: 16-bits */
+#  define DMA_SCR_PSIZE_32BITS    (2 << DMA_SCR_PSIZE_SHIFT) /* 10: 32-bits */
+#define DMA_SCR_MSIZE_SHIFT       (13)      /* Bits 13-14: Memory size */
+#define DMA_SCR_MSIZE_MASK        (3 << DMA_SCR_MSIZE_SHIFT)
+#  define DMA_SCR_MSIZE_8BITS     (0 << DMA_SCR_MSIZE_SHIFT) /* 00: 8-bits */
+#  define DMA_SCR_MSIZE_16BITS    (1 << DMA_SCR_MSIZE_SHIFT) /* 01: 16-bits */
+#  define DMA_SCR_MSIZE_32BITS    (2 << DMA_SCR_MSIZE_SHIFT) /* 10: 32-bits */
+#define DMA_SCR_PINCOS            (1 << 15) /* Bit 15: Peripheral increment offset size */
+#define DMA_SCR_PL_SHIFT          (16)      /* Bits 16-17: Stream Priority level */
+#define DMA_SCR_PL_MASK           (3 << DMA_SCR_PL_SHIFT)
+#  define DMA_SCR_PRILO           (0 << DMA_SCR_PL_SHIFT) /* 00: Low */
+#  define DMA_SCR_PRIMED          (1 << DMA_SCR_PL_SHIFT) /* 01: Medium */
+#  define DMA_SCR_PRIHI           (2 << DMA_SCR_PL_SHIFT) /* 10: High */
+#  define DMA_SCR_PRIVERYHI       (3 << DMA_SCR_PL_SHIFT) /* 11: Very high */
+#define DMA_SCR_DBM               (1 << 18) /* Bit 15: Double buffer mode */
+#define DMA_SCR_CT                (1 << 19) /* Bit 19: Current target */
+#define DMA_SCR_PBURST_SHIFT      (21)      /* Bits 21-22: Peripheral burst transfer configuration */
+#define DMA_SCR_PBURST_MASK       (3 << DMA_SCR_PBURST_SHIFT)
+#  define DMA_SCR_PBURST_SINGLE   (0 << DMA_SCR_PBURST_SHIFT) /* 00: Single transfer */
+#  define DMA_SCR_PBURST_INCR4    (1 << DMA_SCR_PBURST_SHIFT) /* 01: Incremental burst of 4 beats */
+#  define DMA_SCR_PBURST_INCR8    (2 << DMA_SCR_PBURST_SHIFT) /* 10: Incremental burst of 8 beats */
+#  define DMA_SCR_PBURST_INCR16   (3 << DMA_SCR_PBURST_SHIFT) /* 11: Incremental burst of 16 beats */
+#define DMA_SCR_MBURST_SHIFT      (23)      /* Bits 23-24: Memory burst transfer configuration */
+#define DMA_SCR_MBURST_MASK       (3 << DMA_SCR_MBURST_SHIFT)
+#  define DMA_SCR_MBURST_SINGLE   (0 << DMA_SCR_MBURST_SHIFT) /* 00: Single transfer */
+#  define DMA_SCR_MBURST_INCR4    (1 << DMA_SCR_MBURST_SHIFT) /* 01: Incremental burst of 4 beats */
+#  define DMA_SCR_MBURST_INCR8    (2 << DMA_SCR_MBURST_SHIFT) /* 10: Incremental burst of 8 beats */
+#  define DMA_SCR_MBURST_INCR16   (3 << DMA_SCR_MBURST_SHIFT) /* 11: Incremental burst of 16 beats */
+#define DMA_SCR_CHSEL_SHIFT       (25)      /* Bits 25-28:  Channel selection */
+#define DMA_SCR_CHSEL_MASK        (0xf << DMA_SCR_CHSEL_SHIFT)
+#  define DMA_SCR_CHSEL(n)        ((n) << DMA_SCR_CHSEL_SHIFT)
+
+#define DMA_SCR_ALLINTS           (DMA_SCR_DMEIE|DMA_SCR_TEIE|DMA_SCR_HTIE|DMA_SCR_TCIE)
+
+/* DMA stream number of data register */
+
+#define DMA_SNDTR_NDT_SHIFT       (0)       /* Bits 15-0: Number of data to Transfer */
+#define DMA_SNDTR_NDT_MASK        (0xffff << DMA_SNDTR_NDT_SHIFT)
+
+/* DMA stream n FIFO control register */
+
+#define DMA_SFCR_FTH_SHIFT        (0)       /* Bits 0-1: FIFO threshold selection */
+#define DMA_SFCR_FTH_MASK         (3 << DMA_SFCR_FTH_SHIFT)
+#  define DMA_SFCR_FTH_QUARTER    (0 << DMA_SFCR_FTH_SHIFT) /* 1/4 full FIFO */
+#  define DMA_SFCR_FTH_HALF       (1 << DMA_SFCR_FTH_SHIFT) /* 1/2 full FIFO */
+#  define DMA_SFCR_FTH_3QUARTER   (2 << DMA_SFCR_FTH_SHIFT) /* 3/4 full FIFO */
+#  define DMA_SFCR_FTH_FULL       (3 << DMA_SFCR_FTH_SHIFT) /* full FIFO */
+#define DMA_SFCR_DMDIS            (1 << 2)  /* Bit 2:  Direct mode disable */
+#define DMA_SFCR_FS_SHIFT         (3)       /* Bits 3-5: FIFO status */
+#define DMA_SFCR_FS_MASK          (7 << DMA_SFCR_FS_SHIFT)
+#  define DMA_SFCR_FS_QUARTER     (0 << DMA_SFCR_FS_SHIFT) /* 0 < fifo_level < 1/4 */
+#  define DMA_SFCR_FS_HALF        (1 << DMA_SFCR_FS_SHIFT) /* 1/4 = fifo_level < 1/2 */
+#  define DMA_SFCR_FS_3QUARTER    (2 << DMA_SFCR_FS_SHIFT) /* 1/2 = fifo_level < 3/4 */
+#  define DMA_SFCR_FS_ALMOSTFULL  (3 << DMA_SFCR_FS_SHIFT) /* 3/4 = fifo_level < full */
+#  define DMA_SFCR_FS_EMPTY       (4 << DMA_SFCR_FS_SHIFT) /* FIFO is empty */
+#  define DMA_SFCR_FS_FULL        (5 << DMA_SFCR_FS_SHIFT) /* FIFO is full */
+                                            /* Bit 6:  Reserved */
+#define DMA_SFCR_FEIE             (1 << 7)  /* Bit 7:  FIFO error interrupt enable */
+                                            /* Bits 8-31: Reserved */
+
+/* DMA Stream mapping.  Each DMA stream has a mapping to several possible
+ * sources/sinks of data.  The requests from peripherals assigned to a stream
+ * are simply OR'ed together before entering the DMA block.  This means that only
+ * one request on a given stream can be enabled at once.
+ *
+ * Alternative stream selections are provided with a numeric suffix like _1, _2, etc.
+ * The DMA driver, however, will use the pin selection without the numeric suffix.
+ * Additional definitions are required in the board.h file.  For example, if
+ * SPI3_RX connects via DMA STREAM0, then following should be application-specific
+ * mapping should be used:
+ *
+ * #define DMAMAP_SPI3_RX DMAMAP_SPI3_RX_1
+ */
+
+#define STM32_DMA_MAP(d,s,c)       ((d) << 7 | (s) << 4 | (c))
+#define STM32_DMA_CONTROLLER(m)    (((m) >> 7) & 1)
+#define STM32_DMA_STREAM(m)        (((m) >> 4) & 7)
+#define STM32_DMA_CHANNEL(m)       ((m) & 0xf)
+
+#define DMAMAP_SPI3_RX_1           STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN0)
+#define DMAMAP_SPDIFRX_DT          STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN0)
+#define DMAMAP_SPI3_RX_2           STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN0)
+#define DMAMAP_SPI2_RX             STM32_DMA_MAP(DMA1,DMA_STREAM3,DMA_CHAN0)
+#define DMAMAP_SPI2_TX             STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN0)
+#define DMAMAP_SPI3_TX_1           STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN0)
+#define DMAMAP_SPDIFRX_CS          STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN0)
+#define DMAMAP_SPI3_TX_2           STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN0)
+
+#define DMAMAP_I2C1_RX             STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN1)
+#define DMAMAP_I2C3_RX             STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN1)
+#define DMAMAP_TIM7_UP_1           STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN1)
+#define DMAMAP_TIM7_UP_2           STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN1)
+#define DMAMAP_I2C1_RX_1           STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN1)
+#define DMAMAP_I2C1_TX             STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN1)
+#define DMAMAP_I2C1_TX_1           STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN1)
+
+#define DMAMAP_TIM4_CH1            STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN2)
+#define DMAMAP_I2C4_RX             STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN2)
+#define DMAMAP_TIM4_CH2            STM32_DMA_MAP(DMA1,DMA_STREAM3,DMA_CHAN2)
+#define DMAMAP_I2C4_TX             STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN2)
+#define DMAMAP_TIM4_UP             STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN2)
+#define DMAMAP_TIM4_CH3            STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN2)
+
+#define DMAMAP_TIM2_UP_1           STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN3)
+#define DMAMAP_TIM2_CH3            STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN3)
+#define DMAMAP_I2C3_RX_1           STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN3)
+#define DMAMAP_I2C3_TX             STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN3)
+#define DMAMAP_TIM2_CH1            STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN3)
+#define DMAMAP_TIM2_CH2            STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN3)
+#define DMAMAP_TIM2_CH4_1          STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN3)
+#define DMAMAP_TIM2_UP_2           STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN3)
+#define DMAMAP_TIM2_CH4_2          STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN3)
+
+#define DMAMAP_UART5_RX            STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN4)
+#define DMAMAP_USART3_RX           STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN4)
+#define DMAMAP_UART4_RX            STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN4)
+#define DMAMAP_USART3_TX_1         STM32_DMA_MAP(DMA1,DMA_STREAM3,DMA_CHAN4)
+#define DMAMAP_UART4_TX            STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN4)
+#define DMAMAP_USART2_RX           STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN4)
+#define DMAMAP_USART2_TX           STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN4)
+#define DMAMAP_UART5_TX            STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN4)
+
+#define DMAMAP_UART8_TX            STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN5)
+#define DMAMAP_UART7_TX            STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN5)
+#define DMAMAP_TIM3_CH4            STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN5)
+#define DMAMAP_TIM3_UP             STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN5)
+#define DMAMAP_UART7_RX            STM32_DMA_MAP(DMA1,DMA_STREAM3,DMA_CHAN5)
+#define DMAMAP_TIM3_CH1            STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN5)
+#define DMAMAP_TIM3_TRIG           STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN5)
+#define DMAMAP_TIM3_CH2            STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN5)
+#define DMAMAP_UART8_RX            STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN5)
+#define DMAMAP_TIM3_CH3            STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN5)
+
+#define DMAMAP_TIM5_CH3            STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN6)
+#define DMAMAP_TIM5_UP_1           STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN6)
+#define DMAMAP_TIM5_CH4_1          STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN6)
+#define DMAMAP_TIM5_TRIG_1         STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN6)
+#define DMAMAP_TIM5_CH1            STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN6)
+#define DMAMAP_TIM5_CH4_2          STM32_DMA_MAP(DMA1,DMA_STREAM3,DMA_CHAN6)
+#define DMAMAP_TIM5_TRIG_2         STM32_DMA_MAP(DMA1,DMA_STREAM3,DMA_CHAN6)
+#define DMAMAP_TIM5_CH2            STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN6)
+#define DMAMAP_TIM5_UP_2           STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN6)
+
+#define DMAMAP_TIM6_UP             STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN7)
+#define DMAMAP_I2C2_RX             STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN7)
+#define DMAMAP_I2C2_RX_1           STM32_DMA_MAP(DMA1,DMA_STREAM3,DMA_CHAN7)
+#define DMAMAP_USART3_TX_2         STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN7)
+#define DMAMAP_DAC1                STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN7)
+#define DMAMAP_DAC2                STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN7)
+#define DMAMAP_I2C2_TX             STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN7)
+
+#define DMAMAP_I2C3_TX_1           STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN8)
+#define DMAMAP_I2C4_RX_1           STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN8)
+#define DMAMAP_I2C2_TX_1           STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN8)
+#define DMAMAP_I2C4_TX_1           STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN8)
+
+#define DMAMAP_SPI2_RX_1           STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN9)
+#define DMAMAP_SPI2_TX_1           STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN9)
+
+#define DMAMAP_ADC1_1              STM32_DMA_MAP(DMA2,DMA_STREAM0,DMA_CHAN0)
+#define DMAMAP_SAI1_A_1            STM32_DMA_MAP(DMA2,DMA_STREAM1,DMA_CHAN0)
+#define DMAMAP_TIM8_CH1_1          STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN0)
+#define DMAMAP_TIM8_CH2_1          STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN0)
+#define DMAMAP_TIM8_CH3_1          STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN0)
+#define DMAMAP_SAI1_A_2            STM32_DMA_MAP(DMA2,DMA_STREAM3,DMA_CHAN0)
+#define DMAMAP_ADC1_2              STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN0)
+#define DMAMAP_SAI1_B_1            STM32_DMA_MAP(DMA2,DMA_STREAM5,DMA_CHAN0)
+#define DMAMAP_TIM1_CH1_1          STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN0)
+#define DMAMAP_TIM1_CH2_1          STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN0)
+#define DMAMAP_TIM1_CH3_1          STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN0)
+#define DMAMAP_SAI1_B_2            STM32_DMA_MAP(DMA2,DMA_STREAM7,DMA_CHAN0)
+
+#define DMAMAP_DCMI_1              STM32_DMA_MAP(DMA2,DMA_STREAM1,DMA_CHAN1)
+#define DMAMAP_ADC2_1              STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN1)
+#define DMAMAP_ADC2_2              STM32_DMA_MAP(DMA2,DMA_STREAM3,DMA_CHAN1)
+#define DMAMAP_SAI1_B              STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN1)
+#define DMAMAP_SPI6_TX             STM32_DMA_MAP(DMA2,DMA_STREAM5,DMA_CHAN1)
+#define DMAMAP_SPI6_RX             STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN1)
+#define DMAMAP_DCMI_2              STM32_DMA_MAP(DMA2,DMA_STREAM7,DMA_CHAN1)
+
+#define DMAMAP_ADC3_1              STM32_DMA_MAP(DMA2,DMA_STREAM0,DMA_CHAN2)
+#define DMAMAP_ADC3_2              STM32_DMA_MAP(DMA2,DMA_STREAM1,DMA_CHAN2)
+#define DMAMAP_SPI5_RX_1           STM32_DMA_MAP(DMA2,DMA_STREAM3,DMA_CHAN2)
+#define DMAMAP_SPI5_TX_1           STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN2)
+#define DMAMAP_CRYP_OUT            STM32_DMA_MAP(DMA2,DMA_STREAM5,DMA_CHAN2)
+#define DMAMAP_CRYP_IN             STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN2)
+#define DMAMAP_HASH_IN             STM32_DMA_MAP(DMA2,DMA_STREAM7,DMA_CHAN2)
+
+#define DMAMAP_SPI1_RX_1           STM32_DMA_MAP(DMA2,DMA_STREAM0,DMA_CHAN3)
+#define DMAMAP_SPI1_RX_2           STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN3)
+#define DMAMAP_SPI1_TX_1           STM32_DMA_MAP(DMA2,DMA_STREAM3,DMA_CHAN3)
+#define DMAMAP_SAI2_A              STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN3)
+#define DMAMAP_SPI1_TX_2           STM32_DMA_MAP(DMA2,DMA_STREAM5,DMA_CHAN3)
+#define DMAMAP_SAI2_B              STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN3)
+#define DMAMAP_QUADSPI             STM32_DMA_MAP(DMA2,DMA_STREAM7,DMA_CHAN3)
+
+#define DMAMAP_SPI4_RX_1           STM32_DMA_MAP(DMA2,DMA_STREAM0,DMA_CHAN4)
+#define DMAMAP_SPI4_TX_1           STM32_DMA_MAP(DMA2,DMA_STREAM1,DMA_CHAN4)
+#define DMAMAP_USART1_RX_1         STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN4)
+#define DMAMAP_SDMMC1_1            STM32_DMA_MAP(DMA2,DMA_STREAM3,DMA_CHAN4)
+#define DMAMAP_USART1_RX_2         STM32_DMA_MAP(DMA2,DMA_STREAM5,DMA_CHAN4)
+#define DMAMAP_SDMMC1_2            STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN4)
+#define DMAMAP_USART1_TX           STM32_DMA_MAP(DMA2,DMA_STREAM7,DMA_CHAN4)
+
+#define DMAMAP_USART6_RX_1         STM32_DMA_MAP(DMA2,DMA_STREAM1,DMA_CHAN5)
+#define DMAMAP_USART6_RX_2         STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN5)
+#define DMAMAP_SPI4_RX_2           STM32_DMA_MAP(DMA2,DMA_STREAM3,DMA_CHAN5)
+#define DMAMAP_SPI4_TX_2           STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN5)
+#define DMAMAP_USART6_TX_1         STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN5)
+#define DMAMAP_USART6_TX_2         STM32_DMA_MAP(DMA2,DMA_STREAM7,DMA_CHAN5)
+
+#define DMAMAP_TIM1_TRIG_1         STM32_DMA_MAP(DMA2,DMA_STREAM0,DMA_CHAN6)
+#define DMAMAP_TIM1_CH1_2          STM32_DMA_MAP(DMA2,DMA_STREAM1,DMA_CHAN6)
+#define DMAMAP_TIM1_CH2_2          STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN6)
+#define DMAMAP_TIM1_CH1            STM32_DMA_MAP(DMA2,DMA_STREAM3,DMA_CHAN6)
+#define DMAMAP_TIM1_CH4            STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN6)
+#define DMAMAP_TIM1_TRIG_2         STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN6)
+#define DMAMAP_TIM1_COM            STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN6)
+#define DMAMAP_TIM1_UP             STM32_DMA_MAP(DMA2,DMA_STREAM5,DMA_CHAN6)
+#define DMAMAP_TIM1_CH3_2          STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN6)
+
+#define DMAMAP_TIM8_UP             STM32_DMA_MAP(DMA2,DMA_STREAM1,DMA_CHAN7)
+#define DMAMAP_TIM8_CH1_2          STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN7)
+#define DMAMAP_TIM8_CH2_2          STM32_DMA_MAP(DMA2,DMA_STREAM3,DMA_CHAN7)
+#define DMAMAP_TIM8_CH3_2          STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN7)
+#define DMAMAP_SPI5_RX_2           STM32_DMA_MAP(DMA2,DMA_STREAM5,DMA_CHAN7)
+#define DMAMAP_SPI5_TX_2           STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN7)
+#define DMAMAP_TIM8_CH4            STM32_DMA_MAP(DMA2,DMA_STREAM7,DMA_CHAN7)
+#define DMAMAP_TIM8_TRIG           STM32_DMA_MAP(DMA2,DMA_STREAM7,DMA_CHAN7)
+#define DMAMAP_TIM8_COM            STM32_DMA_MAP(DMA2,DMA_STREAM7,DMA_CHAN7)
+
+#define DMAMAP_DFSDM1_FLT0_1       STM32_DMA_MAP(DMA2,DMA_STREAM0,DMA_CHAN8)
+#define DMAMAP_DFSDM1_FLT1_1       STM32_DMA_MAP(DMA2,DMA_STREAM1,DMA_CHAN8)
+#define DMAMAP_DFSDM1_FLT2_1       STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN8)
+#define DMAMAP_DFSDM1_FLT3_1       STM32_DMA_MAP(DMA2,DMA_STREAM3,DMA_CHAN8)
+#define DMAMAP_DFSDM1_FLT0_2       STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN8)
+#define DMAMAP_DFSDM1_FLT1_2       STM32_DMA_MAP(DMA2,DMA_STREAM5,DMA_CHAN8)
+#define DMAMAP_DFSDM1_FLT2_2       STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN8)
+#define DMAMAP_DFSDM1_FLT3_2       STM32_DMA_MAP(DMA2,DMA_STREAM7,DMA_CHAN8)
+
+#define DMAMAP_JPEG_IN_1           STM32_DMA_MAP(DMA2,DMA_STREAM0,DMA_CHAN9)
+#define DMAMAP_JPEG_OUT_           STM32_DMA_MAP(DMA2,DMA_STREAM1,DMA_CHAN9)
+#define DMAMAP_SPI4_TX_3           STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN9)
+#define DMAMAP_JPEG_IN_2           STM32_DMA_MAP(DMA2,DMA_STREAM3,DMA_CHAN9)
+#define DMAMAP_JPEG_OUT_2          STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN9)
+#define DMAMAP_SPI5_RX_3           STM32_DMA_MAP(DMA2,DMA_STREAM5,DMA_CHAN9)
+
+#define DMAMAP_SAI1_B_3            STM32_DMA_MAP(DMA2,DMA_STREAM0,DMA_CHAN10)
+#define DMAMAP_SAI2_B_1            STM32_DMA_MAP(DMA2,DMA_STREAM1,DMA_CHAN10)
+#define DMAMAP_SAI2_A_1            STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN10)
+#define DMAMAP_SAI1_A_3            STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN10)
+
+#define DMAMAP_SDMMC2_1            STM32_DMA_MAP(DMA2,DMA_STREAM0,DMA_CHAN11)
+#define DMAMAP_QUADSPI_1           STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN11)
+#define DMAMAP_SDMMC2_2            STM32_DMA_MAP(DMA2,DMA_STREAM5,DMA_CHAN11)
+
+#endif /* CONFIG_STM32F7_STM32F76XX || CONFIG_STM32F7_STM32F77XX */
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XXX77XX_DMA_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_flash.h b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_flash.h
new file mode 100644
index 0000000000000000000000000000000000000000..0b6f764c365c440ae099a874135329cef329411a
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_flash.h
@@ -0,0 +1,219 @@
+/************************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32f74xx75xx_flash.h
+ *
+ *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM327_CHIP_STM32F74XX75XX_FLASH_H
+#define __ARCH_ARM_SRC_STM327_CHIP_STM32F74XX75XX_FLASH_H
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Flash size is known from the chip selection:
+ *
+ *   When CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT is set the
+ *   CONFIG_STM32F7_FLASH_CONFIG_x selects the default FLASH size based on the chip
+ *   part number. This value can be overridden with CONFIG_STM32F7_FLASH_OVERRIDE_x
+ *
+ *   Parts STM32F74xxE have 512Kb of FLASH
+ *   Parts STM32F74xxG have 1024Kb of FLASH
+ *
+ *   N.B. Only Single bank mode is supported
+ */
+
+#define _K(x) ((x)*1024)
+
+#if !defined(CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT) && \
+    !defined(CONFIG_STM32_FLASH_OVERRIDE_E) && \
+    !defined(CONFIG_STM32_FLASH_OVERRIDE_F) && \
+    !defined(CONFIG_STM32_FLASH_OVERRIDE_G) && \
+    !defined(CONFIG_STM32_FLASH_OVERRIDE_I) && \
+    !defined(CONFIG_STM32_FLASH_CONFIG_E) && \
+    !defined(CONFIG_STM32_FLASH_CONFIG_F) && \
+    !defined(CONFIG_STM32_FLASH_CONFIG_G) && \
+    !defined(CONFIG_STM32_FLASH_CONFIG_I)
+#  define CONFIG_STM32_FLASH_OVERRIDE_E
+#  warning "Flash size not defined defaulting to 512KiB (E)"
+#endif
+
+#if !defined(CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT)
+
+#  undef CONFIG_STM32F7_FLASH_CONFIG_E
+#  undef CONFIG_STM32F7_FLASH_CONFIG_G
+#  undef CONFIG_STM32F7_FLASH_CONFIG_I
+
+#  if defined(CONFIG_STM32F7_FLASH_OVERRIDE_E)
+
+#    define CONFIG_STM32F7_FLASH_CONFIG_E
+
+#  elif defined(CONFIG_STM32F7_FLASH_OVERRIDE_G)
+
+#    define CONFIG_STM32F7_FLASH_CONFIG_G
+
+#  elif defined(CONFIG_STM32F7_FLASH_OVERRIDE_I)
+
+#    define CONFIG_STM32F7_FLASH_CONFIG_I
+
+#  endif
+#endif
+
+#if defined(CONFIG_STM32_FLASH_CONFIG_E)
+
+#  define STM32_FLASH_NPAGES      6
+#  define STM32_FLASH_SIZE        _K((4 * 32) + (1 * 128) + (1 * 256))
+#  define STM32_FLASH_SIZES       {_K(32), _K(32), _K(32), _K(32),  \
+                                   _K(128), _K(256)}
+
+#elif defined(CONFIG_STM32_FLASH_CONFIG_G)
+
+#  define STM32_FLASH_NPAGES      8
+#  define STM32_FLASH_SIZE        _K((4 * 32) + (1 * 128) + (3 * 256))
+#  define STM32_FLASH_SIZES       {_K(32), _K(32), _K(32), _K(32),  \
+                                  _K(128), _K(256), _K(256), _K(256)}
+
+#elif defined(CONFIG_STM32_FLASH_CONFIG_I)
+
+#  define STM32_FLASH_NPAGES      12
+#  define STM32_FLASH_SIZE        _K((4 * 32) + (1 * 128) + (7 * 256))
+#  define STM32_FLASH_SIZES       {_K(32), _K(32), _K(32), _K(32),  \
+                                  _K(128), _K(256), _K(256), _K(256) \
+                                  _K(256), _K(256), _K(256), _K(256)}
+#endif
+
+/* Register Offsets *****************************************************************/
+
+#define STM32_FLASH_ACR_OFFSET     0x0000
+#define STM32_FLASH_KEYR_OFFSET    0x0004
+#define STM32_FLASH_OPTKEYR_OFFSET 0x0008
+#define STM32_FLASH_SR_OFFSET      0x000c
+#define STM32_FLASH_CR_OFFSET      0x0010
+#define STM32_FLASH_OPTCR_OFFSET   0x0014
+#define STM32_FLASH_OPTCR1_OFFSET  0x0018
+
+/* Register Addresses ***************************************************************/
+
+#define STM32_FLASH_ACR            (STM32_FLASHIF_BASE+STM32_FLASH_ACR_OFFSET)
+#define STM32_FLASH_KEYR           (STM32_FLASHIF_BASE+STM32_FLASH_KEYR_OFFSET)
+#define STM32_FLASH_OPTKEYR        (STM32_FLASHIF_BASE+STM32_FLASH_OPTKEYR_OFFSET)
+#define STM32_FLASH_SR             (STM32_FLASHIF_BASE+STM32_FLASH_SR_OFFSET)
+#define STM32_FLASH_CR             (STM32_FLASHIF_BASE+STM32_FLASH_CR_OFFSET)
+#define STM32_FLASH_OPTCR          (STM32_FLASHIF_BASE+STM32_FLASH_OPTCR_OFFSET)
+#define STM32_FLASH_OPTCR1         (STM32_FLASHIF_BASE+STM32_FLASH_OPTCR1_OFFSET)
+
+/* Register Bitfield Definitions ****************************************************/
+/* Flash Access Control Register (ACR) */
+
+#define FLASH_ACR_LATENCY_SHIFT    (0)       /* Bits 0-1: Latency */
+#define FLASH_ACR_LATENCY_MASK     (7 << FLASH_ACR_LATENCY_SHIFT)
+#  define FLASH_ACR_LATENCY(n)     ((n) << FLASH_ACR_LATENCY_SHIFT)  /* n wait states */
+#  define FLASH_ACR_LATENCY_0      (0 << FLASH_ACR_LATENCY_SHIFT)    /* 000: Zero wait states */
+#  define FLASH_ACR_LATENCY_1      (1 << FLASH_ACR_LATENCY_SHIFT)    /* 001: One wait state */
+#  define FLASH_ACR_LATENCY_2      (2 << FLASH_ACR_LATENCY_SHIFT)    /* 010: Two wait states */
+#  define FLASH_ACR_LATENCY_3      (3 << FLASH_ACR_LATENCY_SHIFT)    /* 011: Three wait states */
+#  define FLASH_ACR_LATENCY_4      (4 << FLASH_ACR_LATENCY_SHIFT)    /* 100: Four wait states */
+#  define FLASH_ACR_LATENCY_5      (5 << FLASH_ACR_LATENCY_SHIFT)    /* 101: Five wait states */
+#  define FLASH_ACR_LATENCY_6      (6 << FLASH_ACR_LATENCY_SHIFT)    /* 110: Six wait states */
+#  define FLASH_ACR_LATENCY_7      (7 << FLASH_ACR_LATENCY_SHIFT)    /* 111: Seven wait states */
+#define FLASH_ACR_PRFTEN           (1 << 8)  /* FLASH prefetch enable */
+#define FLASH_ACR_ARTEN            (1 << 9)  /* Bit 9:  ART Accelerator Enable */
+#define FLASH_ACR_ARTRST           (1 << 11) /* Bit 11: ART Accelerator reset */
+
+/* Flash Status Register (SR) */
+
+#define FLASH_SR_EOP               (1 << 0)  /* Bit 0:  End of operation */
+#define FLASH_SR_OPERR             (1 << 1)  /* Bit 1:  Operation error */
+#define FLASH_SR_WRPERR            (1 << 4)  /* Bit 4:  Write protection error */
+#define FLASH_SR_PGAERR            (1 << 5)  /* Bit 5:  Programming alignment error */
+#define FLASH_SR_PGPERR            (1 << 6)  /* Bit 6:  Programming parallelism error */
+#define FLASH_SR_PGSERR            (1 << 7)  /* Bit 7:  Programming sequence error */
+#define FLASH_SR_BSY               (1 << 16) /* Bit 16: Busy */
+
+/* Flash Control Register (CR) */
+
+#define FLASH_CR_PG                (1 << 0)  /* Bit 0:  Programming */
+#define FLASH_CR_SER               (1 << 1)  /* Bit 1:  Sector Erase */
+#define FLASH_CR_MER_MER1          (1 << 2)  /* Bit 2:  Mass Erase sectors 0..11 */
+#define FLASH_CR_SNB_SHIFT         (3)       /* Bits 3-6: Sector number */
+#define FLASH_CR_SNB_MASK          (0x1f << FLASH_CR_SNB_SHIFT)
+#  define FLASH_CR_SNB(n)          ((uint32_t)((n) % 12) << FLASH_CR_SNB_SHIFT) | ((n / 12) << 7)) /* Sector n, n=0..23 */
+#define FLASH_CR_PSIZE_SHIFT       (8)       /* Bits 8-9: Program size */
+#define FLASH_CR_PSIZE_MASK        (3 << FLASH_CR_PSIZE_SHIFT)
+#  define FLASH_CR_PSIZE_X8        (0 << FLASH_CR_PSIZE_SHIFT) /* Program x8 */
+#  define FLASH_CR_PSIZE_X16       (1 << FLASH_CR_PSIZE_SHIFT) /* Program x16 */
+#  define FLASH_CR_PSIZE_X32       (2 << FLASH_CR_PSIZE_SHIFT) /* Program x32 */
+#  define FLASH_CR_PSIZE_X64       (3 << FLASH_CR_PSIZE_SHIFT) /* Program x64 */
+#define FLASH_CR_STRT              (1 << 16) /* Bit 16: Start Erase */
+#define FLASH_CR_EOPIE             (1 << 24) /* Bit 24: End of operation interrupt enable */
+#define FLASH_CR_ERRIE             (1 << 25) /* Bit 25: Error interrupt enable */
+#define FLASH_CR_LOCK              (1 << 31) /* Bit 31: Lock */
+#define FLASH_CR_MER2              (1 << 15) /* Bit 15: Mass Erase sectors 12..23 */
+
+/* Flash Option Control Register (OPTCR) */
+
+#define FLASH_OPTCR_OPTLOCK        (1 << 0)  /* Bit 0:  Option lock */
+#define FLASH_OPTCR_OPTSTRT        (1 << 1)  /* Bit 1:  Option start */
+#define FLASH_OPTCR_BORLEV_SHIFT   (2)       /* Bits 2-3: BOR reset Level */
+#define FLASH_OPTCR_BORLEV_MASK    (3 << FLASH_OPTCR_BORLEV_SHIFT)
+#  define FLASH_OPTCR_VBOR3        (0 << FLASH_OPTCR_BORLEV_SHIFT) /* BOR Level 3 */
+#  define FLASH_OPTCR_VBOR2        (1 << FLASH_OPTCR_BORLEV_SHIFT) /* BOR Level 2 */
+#  define FLASH_OPTCR_VBOR1        (2 << FLASH_OPTCR_BORLEV_SHIFT) /* BOR Level 1 */
+#  define FLASH_OPTCR_VBOR0        (3 << FLASH_OPTCR_BORLEV_SHIFT) /* BOR off */
+#define FLASH_OPTCR_USER_SHIFT     (4)       /* Bits 5-7: User option bytes */
+#define FLASH_OPTCR_USER_MASK      (15 << FLASH_OPTCR_USER_SHIFT)
+#  define FLASH_OPTCR_WWDG_SW      (1 << 4)  /* Bit 4: WWDG_SW */
+#  define FLASH_OPTCR_IWDG_SW      (1 << 5)  /* Bit 5: IWDG_SW */
+#  define FLASH_OPTCR_NRST_STOP    (1 << 6)  /* Bit 6: nRST_STOP */
+#  define FLASH_OPTCR_NRST_STDBY   (1 << 7)  /* Bit 7: nRST_STDBY */
+#define FLASH_OPTCR_RDP_SHIFT      (8)       /* Bits 8-15: Read protect */
+#define FLASH_OPTCR_RDP_MASK       (0xff << FLASH_OPTCR_RDP_SHIFT)
+#  define FLASH_OPTCR_RDP(n)       ((uint32_t)(n) << FLASH_OPTCR_RDP_SHIFT)
+#define FLASH_OPTCR_NWRP_SHIFT     (16)      /* Bits 16-27: Not write protect */
+#define FLASH_OPTCR_NWRP_MASK      (0xfff << FLASH_OPTCR_NWRP_SHIFT)
+#   define FLASH_OPTCR_NWRP(n)     ((uint32_t)(n) << FLASH_OPTCR_NWRP_SHIFT)
+#define FLASH_OPTCR_NDBANK         (1 << 28) /* Bit 28: Not dual bank mode */
+#define FLASH_OPTCR_NDBOOT         (1 << 29) /* Bit 29: Dual Boot mode */
+#define FLASH_OPTCR_IWDG_STDBY     (1 << 30) /* Bit 30: IWDG freeze in stop mode */
+#define FLASH_OPTCR_IWDG_STOP      (1 << 31) /* Bit 31: IWDG freeze in standby mode */
+
+/* Flash Option Control Register (OPTCR1) */
+
+#define FLASH_OPTCR1_BOOTADD0_SHIFT (0)      /* Bits 0-15: Boot base address when Boot pin=0 */
+#define FLASH_OPTCR1_BOOTADD0_MASK  (0xffff << FLASH_OPTCR1_BOOTADD0_SHIFT)
+#  define FLASH_OPTCR1_BOOTADD0(n)  ((uint32_t)(n) << FLASH_OPTCR1_BOOTADD0_SHIFT)
+#define FLASH_OPTCR1_BOOTADD1_SHIFT (16)     /* Bits 16-31:Boot base address when Boot pin=1 */
+#define FLASH_OPTCR1_BOOTADD1_MASK  (0xffff << FLASH_OPTCR1_BOOTADD1_SHIFT)
+#  define FLASH_OPTCR1_BOOTADD1(n)  ((uint32_t)(n) << FLASH_OPTCR1_BOOTADD1_SHIFT)
+
+#endif /* __ARCH_ARM_SRC_STM327_CHIP_STM32F74XX75XX_FLASH_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_gpio.h b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_gpio.h
new file mode 100644
index 0000000000000000000000000000000000000000..711dc0e124790dca5985db7fd24408d2eddba64d
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_gpio.h
@@ -0,0 +1,404 @@
+/************************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32f76xxx77xx_gpio.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XX_GPIO_H
+#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XX_GPIO_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include 
+
+#if defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Register Offsets *****************************************************************/
+
+#define STM32_GPIO_MODER_OFFSET    0x0000 /* GPIO port mode register */
+#define STM32_GPIO_OTYPER_OFFSET   0x0004 /* GPIO port output type register */
+#define STM32_GPIO_OSPEED_OFFSET   0x0008 /* GPIO port output speed register */
+#define STM32_GPIO_PUPDR_OFFSET    0x000c /* GPIO port pull-up/pull-down register */
+#define STM32_GPIO_IDR_OFFSET      0x0010 /* GPIO port input data register */
+#define STM32_GPIO_ODR_OFFSET      0x0014 /* GPIO port output data register */
+#define STM32_GPIO_BSRR_OFFSET     0x0018 /* GPIO port bit set/reset register */
+#define STM32_GPIO_LCKR_OFFSET     0x001c /* GPIO port configuration lock register */
+#define STM32_GPIO_AFRL_OFFSET     0x0020 /* GPIO alternate function low register */
+#define STM32_GPIO_AFRH_OFFSET     0x0024 /* GPIO alternate function high register */
+
+/* Register Addresses ***************************************************************/
+
+#if STM32F7_NGPIO > 0
+#  define STM32_GPIOA_MODER        (STM32_GPIOA_BASE+STM32_GPIO_MODER_OFFSET)
+#  define STM32_GPIOA_OTYPER       (STM32_GPIOA_BASE+STM32_GPIO_OTYPER_OFFSET)
+#  define STM32_GPIOA_OSPEED       (STM32_GPIOA_BASE+STM32_GPIO_OSPEED_OFFSET)
+#  define STM32_GPIOA_PUPDR        (STM32_GPIOA_BASE+STM32_GPIO_PUPDR_OFFSET)
+#  define STM32_GPIOA_IDR          (STM32_GPIOA_BASE+STM32_GPIO_IDR_OFFSET)
+#  define STM32_GPIOA_ODR          (STM32_GPIOA_BASE+STM32_GPIO_ODR_OFFSET)
+#  define STM32_GPIOA_BSRR         (STM32_GPIOA_BASE+STM32_GPIO_BSRR_OFFSET)
+#  define STM32_GPIOA_LCKR         (STM32_GPIOA_BASE+STM32_GPIO_LCKR_OFFSET)
+#  define STM32_GPIOA_AFRL         (STM32_GPIOA_BASE+STM32_GPIO_AFRL_OFFSET)
+#  define STM32_GPIOA_AFRH         (STM32_GPIOA_BASE+STM32_GPIO_AFRH_OFFSET)
+#endif
+
+#if STM32F7_NGPIO > 1
+#  define STM32_GPIOB_MODER        (STM32_GPIOB_BASE+STM32_GPIO_MODER_OFFSET)
+#  define STM32_GPIOB_OTYPER       (STM32_GPIOB_BASE+STM32_GPIO_OTYPER_OFFSET)
+#  define STM32_GPIOB_OSPEED       (STM32_GPIOB_BASE+STM32_GPIO_OSPEED_OFFSET)
+#  define STM32_GPIOB_PUPDR        (STM32_GPIOB_BASE+STM32_GPIO_PUPDR_OFFSET)
+#  define STM32_GPIOB_IDR          (STM32_GPIOB_BASE+STM32_GPIO_IDR_OFFSET)
+#  define STM32_GPIOB_ODR          (STM32_GPIOB_BASE+STM32_GPIO_ODR_OFFSET)
+#  define STM32_GPIOB_BSRR         (STM32_GPIOB_BASE+STM32_GPIO_BSRR_OFFSET)
+#  define STM32_GPIOB_LCKR         (STM32_GPIOB_BASE+STM32_GPIO_LCKR_OFFSET)
+#  define STM32_GPIOB_AFRL         (STM32_GPIOB_BASE+STM32_GPIO_AFRL_OFFSET)
+#  define STM32_GPIOB_AFRH         (STM32_GPIOB_BASE+STM32_GPIO_AFRH_OFFSET)
+#endif
+
+#if STM32F7_NGPIO > 2
+#  define STM32_GPIOC_MODER        (STM32_GPIOC_BASE+STM32_GPIO_MODER_OFFSET)
+#  define STM32_GPIOC_OTYPER       (STM32_GPIOC_BASE+STM32_GPIO_OTYPER_OFFSET)
+#  define STM32_GPIOC_OSPEED       (STM32_GPIOC_BASE+STM32_GPIO_OSPEED_OFFSET)
+#  define STM32_GPIOC_PUPDR        (STM32_GPIOC_BASE+STM32_GPIO_PUPDR_OFFSET)
+#  define STM32_GPIOC_IDR          (STM32_GPIOC_BASE+STM32_GPIO_IDR_OFFSET)
+#  define STM32_GPIOC_ODR          (STM32_GPIOC_BASE+STM32_GPIO_ODR_OFFSET)
+#  define STM32_GPIOC_BSRR         (STM32_GPIOC_BASE+STM32_GPIO_BSRR_OFFSET)
+#  define STM32_GPIOC_LCKR         (STM32_GPIOC_BASE+STM32_GPIO_LCKR_OFFSET)
+#  define STM32_GPIOC_AFRL         (STM32_GPIOC_BASE+STM32_GPIO_AFRL_OFFSET)
+#  define STM32_GPIOC_AFRH         (STM32_GPIOC_BASE+STM32_GPIO_AFRH_OFFSET)
+#endif
+
+#if STM32F7_NGPIO > 3
+#  define STM32_GPIOD_MODER        (STM32_GPIOD_BASE+STM32_GPIO_MODER_OFFSET)
+#  define STM32_GPIOD_OTYPER       (STM32_GPIOD_BASE+STM32_GPIO_OTYPER_OFFSET)
+#  define STM32_GPIOD_OSPEED       (STM32_GPIOD_BASE+STM32_GPIO_OSPEED_OFFSET)
+#  define STM32_GPIOD_PUPDR        (STM32_GPIOD_BASE+STM32_GPIO_PUPDR_OFFSET)
+#  define STM32_GPIOD_IDR          (STM32_GPIOD_BASE+STM32_GPIO_IDR_OFFSET)
+#  define STM32_GPIOD_ODR          (STM32_GPIOD_BASE+STM32_GPIO_ODR_OFFSET)
+#  define STM32_GPIOD_BSRR         (STM32_GPIOD_BASE+STM32_GPIO_BSRR_OFFSET)
+#  define STM32_GPIOD_LCKR         (STM32_GPIOD_BASE+STM32_GPIO_LCKR_OFFSET)
+#  define STM32_GPIOD_AFRL         (STM32_GPIOD_BASE+STM32_GPIO_AFRL_OFFSET)
+#  define STM32_GPIOD_AFRH         (STM32_GPIOD_BASE+STM32_GPIO_AFRH_OFFSET)
+#endif
+
+#if STM32F7_NGPIO > 4
+#  define STM32_GPIOE_MODER        (STM32_GPIOE_BASE+STM32_GPIO_MODER_OFFSET)
+#  define STM32_GPIOE_OTYPER       (STM32_GPIOE_BASE+STM32_GPIO_OTYPER_OFFSET)
+#  define STM32_GPIOE_OSPEED       (STM32_GPIOE_BASE+STM32_GPIO_OSPEED_OFFSET)
+#  define STM32_GPIOE_PUPDR        (STM32_GPIOE_BASE+STM32_GPIO_PUPDR_OFFSET)
+#  define STM32_GPIOE_IDR          (STM32_GPIOE_BASE+STM32_GPIO_IDR_OFFSET)
+#  define STM32_GPIOE_ODR          (STM32_GPIOE_BASE+STM32_GPIO_ODR_OFFSET)
+#  define STM32_GPIOE_BSRR         (STM32_GPIOE_BASE+STM32_GPIO_BSRR_OFFSET)
+#  define STM32_GPIOE_LCKR         (STM32_GPIOE_BASE+STM32_GPIO_LCKR_OFFSET)
+#  define STM32_GPIOE_AFRL         (STM32_GPIOE_BASE+STM32_GPIO_AFRL_OFFSET)
+#  define STM32_GPIOE_AFRH         (STM32_GPIOE_BASE+STM32_GPIO_AFRH_OFFSET)
+#endif
+
+#if STM32F7_NGPIO > 5
+#  define STM32_GPIOF_MODER        (STM32_GPIOF_BASE+STM32_GPIO_MODER_OFFSET)
+#  define STM32_GPIOF_OTYPER       (STM32_GPIOF_BASE+STM32_GPIO_OTYPER_OFFSET)
+#  define STM32_GPIOF_OSPEED       (STM32_GPIOF_BASE+STM32_GPIO_OSPEED_OFFSET)
+#  define STM32_GPIOF_PUPDR        (STM32_GPIOF_BASE+STM32_GPIO_PUPDR_OFFSET)
+#  define STM32_GPIOF_IDR          (STM32_GPIOF_BASE+STM32_GPIO_IDR_OFFSET)
+#  define STM32_GPIOF_ODR          (STM32_GPIOF_BASE+STM32_GPIO_ODR_OFFSET)
+#  define STM32_GPIOF_BSRR         (STM32_GPIOF_BASE+STM32_GPIO_BSRR_OFFSET)
+#  define STM32_GPIOF_LCKR         (STM32_GPIOF_BASE+STM32_GPIO_LCKR_OFFSET)
+#  define STM32_GPIOF_AFRL         (STM32_GPIOF_BASE+STM32_GPIO_AFRL_OFFSET)
+#  define STM32_GPIOF_AFRH         (STM32_GPIOF_BASE+STM32_GPIO_AFRH_OFFSET)
+#endif
+
+#if STM32F7_NGPIO > 6
+#  define STM32_GPIOG_MODER        (STM32_GPIOG_BASE+STM32_GPIO_MODER_OFFSET)
+#  define STM32_GPIOG_OTYPER       (STM32_GPIOG_BASE+STM32_GPIO_OTYPER_OFFSET)
+#  define STM32_GPIOG_OSPEED       (STM32_GPIOG_BASE+STM32_GPIO_OSPEED_OFFSET)
+#  define STM32_GPIOG_PUPDR        (STM32_GPIOG_BASE+STM32_GPIO_PUPDR_OFFSET)
+#  define STM32_GPIOG_IDR          (STM32_GPIOG_BASE+STM32_GPIO_IDR_OFFSET)
+#  define STM32_GPIOG_ODR          (STM32_GPIOG_BASE+STM32_GPIO_ODR_OFFSET)
+#  define STM32_GPIOG_BSRR         (STM32_GPIOG_BASE+STM32_GPIO_BSRR_OFFSET)
+#  define STM32_GPIOG_LCKR         (STM32_GPIOG_BASE+STM32_GPIO_LCKR_OFFSET)
+#  define STM32_GPIOG_AFRL         (STM32_GPIOG_BASE+STM32_GPIO_AFRL_OFFSET)
+#  define STM32_GPIOG_AFRH         (STM32_GPIOG_BASE+STM32_GPIO_AFRH_OFFSET)
+#endif
+
+#if STM32F7_NGPIO > 7
+#  define STM32_GPIOH_MODER        (STM32_GPIOH_BASE+STM32_GPIO_MODER_OFFSET)
+#  define STM32_GPIOH_OTYPER       (STM32_GPIOH_BASE+STM32_GPIO_OTYPER_OFFSET)
+#  define STM32_GPIOH_OSPEED       (STM32_GPIOH_BASE+STM32_GPIO_OSPEED_OFFSET)
+#  define STM32_GPIOH_PUPDR        (STM32_GPIOH_BASE+STM32_GPIO_PUPDR_OFFSET)
+#  define STM32_GPIOH_IDR          (STM32_GPIOH_BASE+STM32_GPIO_IDR_OFFSET)
+#  define STM32_GPIOH_ODR          (STM32_GPIOH_BASE+STM32_GPIO_ODR_OFFSET)
+#  define STM32_GPIOH_BSRR         (STM32_GPIOH_BASE+STM32_GPIO_BSRR_OFFSET)
+#  define STM32_GPIOH_LCKR         (STM32_GPIOH_BASE+STM32_GPIO_LCKR_OFFSET)
+#  define STM32_GPIOH_AFRL         (STM32_GPIOH_BASE+STM32_GPIO_AFRL_OFFSET)
+#  define STM32_GPIOH_AFRH         (STM32_GPIOH_BASE+STM32_GPIO_AFRH_OFFSET)
+#endif
+
+#if STM32F7_NGPIO > 8
+#  define STM32_GPIOI_MODER        (STM32_GPIOI_BASE+STM32_GPIO_MODER_OFFSET)
+#  define STM32_GPIOI_OTYPER       (STM32_GPIOI_BASE+STM32_GPIO_OTYPER_OFFSET)
+#  define STM32_GPIOI_OSPEED       (STM32_GPIOI_BASE+STM32_GPIO_OSPEED_OFFSET)
+#  define STM32_GPIOI_PUPDR        (STM32_GPIOI_BASE+STM32_GPIO_PUPDR_OFFSET)
+#  define STM32_GPIOI_IDR          (STM32_GPIOI_BASE+STM32_GPIO_IDR_OFFSET)
+#  define STM32_GPIOI_ODR          (STM32_GPIOI_BASE+STM32_GPIO_ODR_OFFSET)
+#  define STM32_GPIOI_BSRR         (STM32_GPIOI_BASE+STM32_GPIO_BSRR_OFFSET)
+#  define STM32_GPIOI_LCKR         (STM32_GPIOI_BASE+STM32_GPIO_LCKR_OFFSET)
+#  define STM32_GPIOI_AFRL         (STM32_GPIOI_BASE+STM32_GPIO_AFRL_OFFSET)
+#  define STM32_GPIOI_AFRH         (STM32_GPIOI_BASE+STM32_GPIO_AFRH_OFFSET)
+#endif
+
+#if STM32F7_NGPIO > 9
+#  define STM32_GPIOJ_MODER        (STM32_GPIOJ_BASE+STM32_GPIO_MODER_OFFSET)
+#  define STM32_GPIOJ_OTYPER       (STM32_GPIOJ_BASE+STM32_GPIO_OTYPER_OFFSET)
+#  define STM32_GPIOJ_OSPEED       (STM32_GPIOJ_BASE+STM32_GPIO_OSPEED_OFFSET)
+#  define STM32_GPIOJ_PUPDR        (STM32_GPIOJ_BASE+STM32_GPIO_PUPDR_OFFSET)
+#  define STM32_GPIOJ_IDR          (STM32_GPIOJ_BASE+STM32_GPIO_IDR_OFFSET)
+#  define STM32_GPIOJ_ODR          (STM32_GPIOJ_BASE+STM32_GPIO_ODR_OFFSET)
+#  define STM32_GPIOJ_BSRR         (STM32_GPIOJ_BASE+STM32_GPIO_BSRR_OFFSET)
+#  define STM32_GPIOJ_LCKR         (STM32_GPIOJ_BASE+STM32_GPIO_LCKR_OFFSET)
+#  define STM32_GPIOJ_AFRL         (STM32_GPIOJ_BASE+STM32_GPIO_AFRL_OFFSET)
+#  define STM32_GPIOJ_AFRH         (STM32_GPIOJ_BASE+STM32_GPIO_AFRH_OFFSET)
+#endif
+
+#if STM32F7_NGPIO > 10
+#  define STM32_GPIOK_MODER        (STM32_GPIOK_BASE+STM32_GPIO_MODER_OFFSET)
+#  define STM32_GPIOK_OTYPER       (STM32_GPIOK_BASE+STM32_GPIO_OTYPER_OFFSET)
+#  define STM32_GPIOK_OSPEED       (STM32_GPIOK_BASE+STM32_GPIO_OSPEED_OFFSET)
+#  define STM32_GPIOK_PUPDR        (STM32_GPIOK_BASE+STM32_GPIO_PUPDR_OFFSET)
+#  define STM32_GPIOK_IDR          (STM32_GPIOK_BASE+STM32_GPIO_IDR_OFFSET)
+#  define STM32_GPIOK_ODR          (STM32_GPIOK_BASE+STM32_GPIO_ODR_OFFSET)
+#  define STM32_GPIOK_BSRR         (STM32_GPIOK_BASE+STM32_GPIO_BSRR_OFFSET)
+#  define STM32_GPIOK_LCKR         (STM32_GPIOK_BASE+STM32_GPIO_LCKR_OFFSET)
+#  define STM32_GPIOK_AFRL         (STM32_GPIOK_BASE+STM32_GPIO_AFRL_OFFSET)
+#  define STM32_GPIOK_AFRH         (STM32_GPIOK_BASE+STM32_GPIO_AFRH_OFFSET)
+#endif
+
+/* Register Bitfield Definitions ****************************************************/
+
+/* GPIO port mode register */
+
+#define GPIO_MODER_INPUT           (0) /* Input */
+#define GPIO_MODER_OUTPUT          (1) /* General purpose output mode */
+#define GPIO_MODER_ALT             (2) /* Alternate mode */
+#define GPIO_MODER_ANALOG          (3) /* Analog mode */
+
+#define GPIO_MODER_SHIFT(n)        ((n) << 1)
+#define GPIO_MODER_MASK(n)         (3 << GPIO_MODER_SHIFT(n))
+
+#define GPIO_MODER0_SHIFT          (0)
+#define GPIO_MODER0_MASK           (3 << GPIO_MODER0_SHIFT)
+#define GPIO_MODER1_SHIFT          (2)
+#define GPIO_MODER1_MASK           (3 << GPIO_MODER1_SHIFT)
+#define GPIO_MODER2_SHIFT          (4)
+#define GPIO_MODER2_MASK           (3 << GPIO_MODER2_SHIFT)
+#define GPIO_MODER3_SHIFT          (6)
+#define GPIO_MODER3_MASK           (3 << GPIO_MODER3_SHIFT)
+#define GPIO_MODER4_SHIFT          (8)
+#define GPIO_MODER4_MASK           (3 << GPIO_MODER4_SHIFT)
+#define GPIO_MODER5_SHIFT          (10)
+#define GPIO_MODER5_MASK           (3 << GPIO_MODER5_SHIFT)
+#define GPIO_MODER6_SHIFT          (12)
+#define GPIO_MODER6_MASK           (3 << GPIO_MODER6_SHIFT)
+#define GPIO_MODER7_SHIFT          (14)
+#define GPIO_MODER7_MASK           (3 << GPIO_MODER7_SHIFT)
+#define GPIO_MODER8_SHIFT          (16)
+#define GPIO_MODER8_MASK           (3 << GPIO_MODER8_SHIFT)
+#define GPIO_MODER9_SHIFT          (18)
+#define GPIO_MODER9_MASK           (3 << GPIO_MODER9_SHIFT)
+#define GPIO_MODER10_SHIFT         (20)
+#define GPIO_MODER10_MASK          (3 << GPIO_MODER10_SHIFT)
+#define GPIO_MODER11_SHIFT         (22)
+#define GPIO_MODER11_MASK          (3 << GPIO_MODER11_SHIFT)
+#define GPIO_MODER12_SHIFT         (24)
+#define GPIO_MODER12_MASK          (3 << GPIO_MODER12_SHIFT)
+#define GPIO_MODER13_SHIFT         (26)
+#define GPIO_MODER13_MASK          (3 << GPIO_MODER13_SHIFT)
+#define GPIO_MODER14_SHIFT         (28)
+#define GPIO_MODER14_MASK          (3 << GPIO_MODER14_SHIFT)
+#define GPIO_MODER15_SHIFT         (30)
+#define GPIO_MODER15_MASK          (3 << GPIO_MODER15_SHIFT)
+
+/* GPIO port output type register */
+
+#define GPIO_OTYPER_OD(n)          (1 << (n)) /* 1=Output open-drain */
+#define GPIO_OTYPER_PP(n)          (0)        /* 0=Ouput push-pull */
+
+/* GPIO port output speed register */
+
+#define GPIO_OSPEED_2MHz           (0) /* 2 MHz Low speed */
+#define GPIO_OSPEED_25MHz          (1) /* 25 MHz Medium speed */
+#define GPIO_OSPEED_50MHz          (2) /* 50 MHz Fast speed */
+#define GPIO_OSPEED_100MHz         (3) /* 100 MHz High speed on 30 pF (80 MHz Output max speed on 15 pF) */
+
+#define GPIO_OSPEED_SHIFT(n)       ((n) << 1)
+#define GPIO_OSPEED_MASK(n)        (3 << GPIO_OSPEED_SHIFT(n))
+
+#define GPIO_OSPEED0_SHIFT         (0)
+#define GPIO_OSPEED0_MASK          (3 << GPIO_OSPEED0_SHIFT)
+#define GPIO_OSPEED1_SHIFT         (2)
+#define GPIO_OSPEED1_MASK          (3 << GPIO_OSPEED1_SHIFT)
+#define GPIO_OSPEED2_SHIFT         (4)
+#define GPIO_OSPEED2_MASK          (3 << GPIO_OSPEED2_SHIFT)
+#define GPIO_OSPEED3_SHIFT         (6)
+#define GPIO_OSPEED3_MASK          (3 << GPIO_OSPEED3_SHIFT)
+#define GPIO_OSPEED4_SHIFT         (8)
+#define GPIO_OSPEED4_MASK          (3 << GPIO_OSPEED4_SHIFT)
+#define GPIO_OSPEED5_SHIFT         (10)
+#define GPIO_OSPEED5_MASK          (3 << GPIO_OSPEED5_SHIFT)
+#define GPIO_OSPEED6_SHIFT         (12)
+#define GPIO_OSPEED6_MASK          (3 << GPIO_OSPEED6_SHIFT)
+#define GPIO_OSPEED7_SHIFT         (14)
+#define GPIO_OSPEED7_MASK          (3 << GPIO_OSPEED7_SHIFT)
+#define GPIO_OSPEED8_SHIFT         (16)
+#define GPIO_OSPEED8_MASK          (3 << GPIO_OSPEED8_SHIFT)
+#define GPIO_OSPEED9_SHIFT         (18)
+#define GPIO_OSPEED9_MASK          (3 << GPIO_OSPEED9_SHIFT)
+#define GPIO_OSPEED10_SHIFT        (20)
+#define GPIO_OSPEED10_MASK         (3 << GPIO_OSPEED10_SHIFT)
+#define GPIO_OSPEED11_SHIFT        (22)
+#define GPIO_OSPEED11_MASK         (3 << GPIO_OSPEED11_SHIFT)
+#define GPIO_OSPEED12_SHIFT        (24)
+#define GPIO_OSPEED12_MASK         (3 << GPIO_OSPEED12_SHIFT)
+#define GPIO_OSPEED13_SHIFT        (26)
+#define GPIO_OSPEED13_MASK         (3 << GPIO_OSPEED13_SHIFT)
+#define GPIO_OSPEED14_SHIFT        (28)
+#define GPIO_OSPEED14_MASK         (3 << GPIO_OSPEED14_SHIFT)
+#define GPIO_OSPEED15_SHIFT        (30)
+#define GPIO_OSPEED15_MASK         (3 << GPIO_OSPEED15_SHIFT)
+
+/* GPIO port pull-up/pull-down register */
+
+#define GPIO_PUPDR_NONE            (0) /* No pull-up, pull-down */
+#define GPIO_PUPDR_PULLUP          (1) /* Pull-up */
+#define GPIO_PUPDR_PULLDOWN        (2) /* Pull-down */
+
+#define GPIO_PUPDR_SHIFT(n)        ((n) << 1)
+#define GPIO_PUPDR_MASK(n)         (3 << GPIO_PUPDR_SHIFT(n))
+
+#define GPIO_PUPDR0_SHIFT          (0)
+#define GPIO_PUPDR0_MASK           (3 << GPIO_PUPDR0_SHIFT)
+#define GPIO_PUPDR1_SHIFT          (2)
+#define GPIO_PUPDR1_MASK           (3 << GPIO_PUPDR1_SHIFT)
+#define GPIO_PUPDR2_SHIFT          (4)
+#define GPIO_PUPDR2_MASK           (3 << GPIO_PUPDR2_SHIFT)
+#define GPIO_PUPDR3_SHIFT          (6)
+#define GPIO_PUPDR3_MASK           (3 << GPIO_PUPDR3_SHIFT)
+#define GPIO_PUPDR4_SHIFT          (8)
+#define GPIO_PUPDR4_MASK           (3 << GPIO_PUPDR4_SHIFT)
+#define GPIO_PUPDR5_SHIFT          (10)
+#define GPIO_PUPDR5_MASK           (3 << GPIO_PUPDR5_SHIFT)
+#define GPIO_PUPDR6_SHIFT          (12)
+#define GPIO_PUPDR6_MASK           (3 << GPIO_PUPDR6_SHIFT)
+#define GPIO_PUPDR7_SHIFT          (14)
+#define GPIO_PUPDR7_MASK           (3 << GPIO_PUPDR7_SHIFT)
+#define GPIO_PUPDR8_SHIFT          (16)
+#define GPIO_PUPDR8_MASK           (3 << GPIO_PUPDR8_SHIFT)
+#define GPIO_PUPDR9_SHIFT          (18)
+#define GPIO_PUPDR9_MASK           (3 << GPIO_PUPDR9_SHIFT)
+#define GPIO_PUPDR10_SHIFT         (20)
+#define GPIO_PUPDR10_MASK          (3 << GPIO_PUPDR10_SHIFT)
+#define GPIO_PUPDR11_SHIFT         (22)
+#define GPIO_PUPDR11_MASK          (3 << GPIO_PUPDR11_SHIFT)
+#define GPIO_PUPDR12_SHIFT         (24)
+#define GPIO_PUPDR12_MASK          (3 << GPIO_PUPDR12_SHIFT)
+#define GPIO_PUPDR13_SHIFT         (26)
+#define GPIO_PUPDR13_MASK          (3 << GPIO_PUPDR13_SHIFT)
+#define GPIO_PUPDR14_SHIFT         (28)
+#define GPIO_PUPDR14_MASK          (3 << GPIO_PUPDR14_SHIFT)
+#define GPIO_PUPDR15_SHIFT         (30)
+#define GPIO_PUPDR15_MASK          (3 << GPIO_PUPDR15_SHIFT)
+
+/* GPIO port input data register */
+
+#define GPIO_IDR(n)                (1 << (n))
+
+/* GPIO port output data register */
+
+#define GPIO_ODR(n)                (1 << (n))
+
+/* GPIO port bit set/reset register */
+
+#define GPIO_BSRR_SET(n)           (1 << (n))
+#define GPIO_BSRR_RESET(n)         (1 << ((n)+16))
+
+/* GPIO port configuration lock register */
+
+#define GPIO_LCKR(n)               (1 << (n))
+#define GPIO_LCKK                  (1 << 16)   /* Lock key */
+
+/* GPIO alternate function low/high register */
+
+#define GPIO_AFR_SHIFT(n)          ((n) << 2)
+#define GPIO_AFR_MASK(n)           (15 << GPIO_AFR_SHIFT(n))
+
+#define GPIO_AFRL0_SHIFT           (0)
+#define GPIO_AFRL0_MASK            (15 << GPIO_AFRL0_SHIFT)
+#define GPIO_AFRL1_SHIFT           (4)
+#define GPIO_AFRL1_MASK            (15 << GPIO_AFRL1_SHIFT)
+#define GPIO_AFRL2_SHIFT           (8)
+#define GPIO_AFRL2_MASK            (15 << GPIO_AFRL2_SHIFT)
+#define GPIO_AFRL3_SHIFT           (12)
+#define GPIO_AFRL3_MASK            (15 << GPIO_AFRL3_SHIFT)
+#define GPIO_AFRL4_SHIFT           (16)
+#define GPIO_AFRL4_MASK            (15 << GPIO_AFRL4_SHIFT)
+#define GPIO_AFRL5_SHIFT           (20)
+#define GPIO_AFRL5_MASK            (15 << GPIO_AFRL5_SHIFT)
+#define GPIO_AFRL6_SHIFT           (24)
+#define GPIO_AFRL6_MASK            (15 << GPIO_AFRL6_SHIFT)
+#define GPIO_AFRL7_SHIFT           (28)
+#define GPIO_AFRL7_MASK            (15 << GPIO_AFRL7_SHIFT)
+
+#define GPIO_AFRH8_SHIFT           (0)
+#define GPIO_AFRH8_MASK            (15 << GPIO_AFRH8_SHIFT)
+#define GPIO_AFRH9_SHIFT           (4)
+#define GPIO_AFRH9_MASK            (15 << GPIO_AFRH9_SHIFT)
+#define GPIO_AFRH10_SHIFT          (8)
+#define GPIO_AFRH10_MASK           (15 << GPIO_AFRH10_SHIFT)
+#define GPIO_AFRH11_SHIFT          (12)
+#define GPIO_AFRH11_MASK           (15 << GPIO_AFRH11_SHIFT)
+#define GPIO_AFRH12_SHIFT          (16)
+#define GPIO_AFRH12_MASK           (15 << GPIO_AFRH12_SHIFT)
+#define GPIO_AFRH13_SHIFT          (20)
+#define GPIO_AFRH13_MASK           (15 << GPIO_AFRH13_SHIFT)
+#define GPIO_AFRH14_SHIFT          (24)
+#define GPIO_AFRH14_MASK           (15 << GPIO_AFRH14_SHIFT)
+#define GPIO_AFRH15_SHIFT          (28)
+#define GPIO_AFRH15_MASK           (15 << GPIO_AFRH15_SHIFT)
+
+#endif /* CONFIG_STM32F7_STM32F76XX || CONFIG_STM32F7_STM32F77XX */
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XX_GPIO_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_memorymap.h b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_memorymap.h
new file mode 100644
index 0000000000000000000000000000000000000000..81f3512fe6aa1af501df775da1ea7346b046b4b5
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_memorymap.h
@@ -0,0 +1,221 @@
+/************************************************************************************
+ * arch/arm/src/stm3fr2/chip/stm32f76xxx77xxx_memorymap.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XXX77XXX_MEMORYMAP_H
+#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XXX77XXX_MEMORYMAP_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#if defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* STM32F76XXX STM32F77XXX Address Blocks *******************************************/
+
+#define STM32_CODE_BASE      0x00000000     /* 0x00000000-0x1fffffff: 512Mb code block */
+#define STM32_SRAM_BASE      0x20000000     /* 0x20000000-0x3fffffff: 512Mb sram block */
+#define STM32_PERIPH_BASE    0x40000000     /* 0x40000000-0x5fffffff: 512Mb AHB1-2 peripheral blocks */
+#define STM32_FSMC_BASE12    0x60000000     /* 0x60000000-0x7fffffff: 512Mb FSMC bank1&2 block */
+#  define STM32_FSMC_BANK1   0x60000000     /* 0x60000000-0x6fffffff:       256Mb NOR/SRAM */
+#  define STM32_FSMC_BANK2   0x70000000     /* 0x70000000-0x7fffffff:       256Mb NAND FLASH */
+#define STM32_FSMC_BASE34    0x80000000     /* 0x80000000-0x8fffffff: 512Mb FSMC bank3&4 block */
+#  define STM32_FSMC_BANK3   0x80000000     /* 0x80000000-0x8fffffff:       256Mb NAND FLASH */
+#  define STM32_FSMC_BANK4   0x90000000     /* 0x90000000-0x9fffffff:       256Mb PC CARD */
+#define STM32_FSMC_BASE5     0xc0000000     /* 0xc0000000-0xcfffffff: 256Mb FSMC */
+#define STM32_FSMC_BASE6     0xd0000000     /* 0xd0000000-0xdfffffff: 256Mb FSMC */
+#define STM32_CORTEX_BASE    0xe0000000     /* 0xe0000000-0xffffffff: 512Mb Cortex-M7 block */
+
+#define STM32_REGION_MASK    0xf0000000
+#define STM32_IS_SRAM(a)     ((((uint32_t)(a)) & STM32_REGION_MASK) == STM32_SRAM_BASE)
+#define STM32_IS_EXTSRAM(a)  ((((uint32_t)(a)) & STM32_REGION_MASK) == STM32_FSMC_BANK1)
+
+/* Code Base Addresses **************************************************************/
+
+#define STM32_BOOT_BASE      0x00000000     /* 0x00000000-0x000fffff: Aliased boot memory */
+#define STM32_INSTRAM_BASE   0x00000000     /* 0x00000000-0x00003fff: Instruction RAM (ITCM-RAM) */
+#define STM32_SYSMEM_ICTM    0x00100000     /* 0x00100000-0x0010edbf: System memory (ITCM) */
+#define STM32_FLASH_ITCM     0x00200000     /* 0x00200000-0x003fffff: FLASH memory (ITCM) */
+#define STM32_LOADER_BASE    0x01000000     /* 0x01000000-            Bootloader */
+#define STM32_FLASH_AXIM     0x08000000     /* 0x08000000-0x081fffff: FLASH memory (AXIM) */
+#define STM32_OPTIONS_BASE   0x1fff0000     /* 0x1ff00000-0x1fff001f: OTP (AXIM) */
+
+/* Information Addresses ************************************************************/
+
+
+#define STM32_SYSMEM_AXIM    0x1ff00000     /* 0x1ff00000-0x1ff0edbf: System memory (AXIM) */
+#define STM32_SYSMEM_UID     0x1ff0f420     /* The 96-bit unique device identifier */
+#define STM32_OTP_ICTM       0x0010f000     /* 0x0010f000-0x0010edbf: OTP (ITCM) */
+#define STM32_OTP_AXIM       0x1ff0f000     /* 0x1ff00000-0x1ff0f41f: OTP (AXIM) */
+
+/* SRAM Base Addresses **************************************************************/
+
+#define STM32_DTCRAM_BASE    0x20000000     /* 0x20000000-0x2001ffff: DTCM-RAM on TCM interface */
+#define STM32_SRAM1_BASE     0x20020000     /* 0x20020000-0x2007bfff: System SRAM1 */
+#define STM32_SRAM2_BASE     0x2007c000     /* 0x2007c000-0x2007ffff: System SRAM2 */
+
+/* Peripheral Base Addresses ********************************************************/
+
+#define STM32_APB1_BASE      0x40000000     /* 0x40000000-0x40007fff: APB1 */
+#define STM32_APB2_BASE      0x40010000     /* 0x40010000-0x40016bff: APB2 */
+#define STM32_AHB1_BASE      0x40020000     /* 0x40020000-0x4007ffff: APB1 */
+#define STM32_AHB2_BASE      0x50000000     /* 0x50000000-0x5003ffff: AHB2 */
+#define STM32_AHB3_BASE      0x60000000     /* 0x60000000-0xdfffffff: AHB3 */
+
+/* APB1 Base Addresses **************************************************************/
+
+#define STM32_TIM2_BASE      0x40000000     /* 0x40000000-0x400003ff: TIM2 */
+#define STM32_TIM3_BASE      0x40000400     /* 0x40000400-0x400007ff: TIM3 */
+#define STM32_TIM4_BASE      0x40000800     /* 0x40000800-0x40000bff: TIM4 */
+#define STM32_TIM5_BASE      0x40000c00     /* 0x40000c00-0x40000fff: TIM5 */
+#define STM32_TIM6_BASE      0x40001000     /* 0x40001000-0x400013ff: TIM6 */
+#define STM32_TIM7_BASE      0x40001400     /* 0x40001400-0x400017ff: TIM7 */
+#define STM32_TIM12_BASE     0x40001800     /* 0x40001800-0x40001bff: TIM12 */
+#define STM32_TIM13_BASE     0x40001c00     /* 0x40001c00-0x40001fff: TIM13 */
+#define STM32_TIM14_BASE     0x40002000     /* 0x40002000-0x400023ff: TIM14 */
+#define STM32_LPTIM1_BASE    0x40002400     /* 0x40002400-0x400027ff: LPTIM1 */
+#define STM32_RTC_BASE       0x40002800     /* 0x40002800-0x40002bff: RTC & BKP Registers */
+#define STM32_BKP_BASE       0x40002800     /* 0x40002800-0x40002bff: RTC & BKP Registers */
+#define STM32_WWDG_BASE      0x40002c00     /* 0x40002c00-0x40002fff: WWDG */
+#define STM32_IWDG_BASE      0x40003000     /* 0x40003000-0x400033ff: IWDG */
+#define STM32_CAN3_BASE      0x40003400     /* 0x40003400-0x400037ff: CAN3 */
+#define STM32_SPI2_BASE      0x40003800     /* 0x40003800-0x40003bff: SPI2 / I2S2 */
+#define STM32_I2S2_BASE      0x40003800     /* 0x40003800-0x40003bff: SPI2 / I2S2 */
+#define STM32_SPI3_BASE      0x40003c00     /* 0x40003c00-0x40003fff: SPI3 / I2S3 */
+#define STM32_I2S3_BASE      0x40003c00     /* 0x40003c00-0x40003fff: SPI3 / I2S3 */
+#define STM32_SPDIFRX_BASE   0x40004000     /* 0x40004000-0x400043ff: SPDIFRX */
+#define STM32_USART2_BASE    0x40004400     /* 0x40004400-0x400047ff: USART2 */
+#define STM32_USART3_BASE    0x40004800     /* 0x40004800-0x40004bff: USART3 */
+#define STM32_UART4_BASE     0x40004c00     /* 0x40004c00-0x40004fff: UART4 */
+#define STM32_UART5_BASE     0x40005000     /* 0x40005000-0x400053ff: UART5 */
+#define STM32_I2C1_BASE      0x40005400     /* 0x40005400-0x400057ff: I2C1 */
+#define STM32_I2C2_BASE      0x40005800     /* 0x40005800-0x40005bff: I2C2 */
+#define STM32_I2C3_BASE      0x40005c00     /* 0x40005c00-0x40005fff: I2C3 */
+#define STM32_I2C4_BASE      0x40006000     /* 0x40006000-0x400063ff: I2C4 */
+#define STM32_CAN1_BASE      0x40006400     /* 0x40006400-0x400067ff: CAN1 */
+#define STM32_CAN2_BASE      0x40006800     /* 0x40006800-0x40006bff: CAN2 */
+#define STM32_HDMICEC_BASE   0x40006c00     /* 0x40006c00-0x40006fff: HDMI-CEC */
+#define STM32_PWR_BASE       0x40007000     /* 0x40007000-0x400073ff: PWR */
+#define STM32_DAC_BASE       0x40007400     /* 0x40007400-0x400077ff: DAC */
+#define STM32_UART7_BASE     0x40007800     /* 0x40007800-0x40007bff: UART7 */
+#define STM32_UART8_BASE     0x40007c00     /* 0x40007c00-0x40007fff: UART8 */
+
+/* APB2 Base Addresses **************************************************************/
+
+#define STM32_TIM1_BASE      0x40010000     /* 0x40010000-0x400103ff: TIM1 */
+#define STM32_TIM8_BASE      0x40010400     /* 0x40010400-0x400107ff: TIM8 */
+#define STM32_USART1_BASE    0x40011000     /* 0x40011000-0x400113ff: USART1 */
+#define STM32_USART6_BASE    0x40011400     /* 0x40011400-0x400117ff: USART6 */
+#define STM32_SDMMC2_BASE    0x40011c00     /* 0x40011c00-0x40011fff: SDMMC2 */
+#define STM32_ADC_BASE       0x40012000     /* 0x40012000-0x400123ff: ADC1 - ADC2 - ADC3 */
+#  define STM32_ADC1_BASE    0x40012000     /*                        ADC1 */
+#  define STM32_ADC2_BASE    0x40012100     /*                        ADC2 */
+#  define STM32_ADC3_BASE    0x40012200     /*                        ADC3 */
+#  define STM32_ADCCMN_BASE  0x40012300     /*                        Common */
+#define STM32_SDMMC1_BASE    0x40012c00     /* 0x40012c00-0x40012fff: SDMMC1 */
+#define STM32_SPI1_BASE      0x40013000     /* 0x40013000-0x400133ff: SPI1 */
+#define STM32_SPI4_BASE      0x40013400     /* 0x40013400-0x400137ff: SPI4 */
+#define STM32_SYSCFG_BASE    0x40013800     /* 0x40013800-0x40013bff: SYSCFG */
+#define STM32_EXTI_BASE      0x40013c00     /* 0x40013c00-0x40013fff: EXTI */
+#define STM32_TIM9_BASE      0x40014000     /* 0x40014000-0x400143ff: TIM9 */
+#define STM32_TIM10_BASE     0x40014400     /* 0x40014400-0x400147ff: TIM10 */
+#define STM32_TIM11_BASE     0x40014800     /* 0x40014800-0x40014bff: TIM11 */
+#define STM32_SPI5_BASE      0x40015000     /* 0x40015000-0x400153ff: SPI5 */
+#define STM32_SPI6_BASE      0x40015400     /* 0x40015400-0x400157ff: SPI6 */
+#define STM32_SAI1_BASE      0x40015800     /* 0x40015800-0x40015bff: SAI1 */
+#define STM32_SAI2_BASE      0x40015c00     /* 0x40015c00-0x40015fff: SAI2 */
+#define STM32_LCDTFT_BASE    0x40016800     /* 0x40016800-0x40016bff: LCD-TFT */
+#define STM32_DSIHOST_BASE   0x40016c00     /* 0x40016c00-0x400173ff: DSI Host */
+#define STM32_DFSDM1_BASE    0x40017400     /* 0x40017400-0x400174ff: DFSDM1 */
+#define STM32_MDIOS_BASE     0x40017800     /* 0x40017800-0x40017bff: MDIOS */
+
+/* AHB1 Base Addresses **************************************************************/
+
+#define STM32_GPIOA_BASE     0x40020000     /* 0x40020000-0x400203ff: GPIOA */
+#define STM32_GPIOB_BASE     0x40020400     /* 0x40020400-0x400207ff: GPIOB */
+#define STM32_GPIOC_BASE     0x40020800     /* 0x40020800-0x40020bff: GPIOC */
+#define STM32_GPIOD_BASE     0x40020c00     /* 0x40020c00-0x40020fff: GPIOD */
+#define STM32_GPIOE_BASE     0x40021000     /* 0x40021000-0x400213ff: GPIOE */
+#define STM32_GPIOF_BASE     0x40021400     /* 0x40021400-0x400217ff: GPIOF */
+#define STM32_GPIOG_BASE     0x40021800     /* 0x40021800-0x40021bff: GPIOG */
+#define STM32_GPIOH_BASE     0x40021c00     /* 0x40021c00-0x40021fff: GPIOH */
+#define STM32_GPIOI_BASE     0x40022000     /* 0x40022000-0x400223ff: GPIOI */
+#define STM32_GPIOJ_BASE     0x40022400     /* 0x40022400-0x400227ff: GPIOJ */
+#define STM32_GPIOK_BASE     0x40022800     /* 0x40022800-0x40022bff: GPIOK */
+#define STM32_CRC_BASE       0x40023000     /* 0x40023000-0x400233ff: CRC */
+#define STM32_RCC_BASE       0x40023800     /* 0x40023800-0x40023bff: RCC */
+#define STM32_FLASHIF_BASE   0x40023c00     /* 0x40023c00-0x40023fff: Flash interface */
+#define STM32_BKPSRAM_BASE   0x40024000     /* 0x40024000-0x40024fff: BKPSRAM */
+#define STM32_DMA1_BASE      0x40026000     /* 0x40026000-0x400263ff: DMA1 */
+#define STM32_DMA2_BASE      0x40026400     /* 0x40026400-0x400267ff: DMA2 */
+#define STM32_ETHMAC_BASE    0x40028000     /* 0x40028000-0x400293ff: ETHERNET MAC */
+#define STM32_DMA2D_BASE     0x4002b000     /* 0x4002b000-0x4002Bbff: Chrom-ART (DMA2D) */
+#define STM32_USBOTGHS_BASE  0x40040000     /* 0x40040000-0x4007ffff: USB OTG HS */
+
+/* AHB2 Base Addresses **************************************************************/
+
+#define STM32_USBOTGFS_BASE  0x50000000     /* 0x50000000-0x5003ffff: USB OTG FS */
+#define STM32_DCMI_BASE      0x50050000     /* 0x50050000-0x500503ff: DCMI */
+#define STM32_JPEG_BASE      0x50051000     /* 0x50051000-0x500511ff: JPEG */
+#define STM32_CRYP_BASE      0x50060000     /* 0x50060000-0x500603ff: CRYP */
+#define STM32_HASH_BASE      0x50060400     /* 0x50060400-0x500607ff: HASH */
+#define STM32_RNG_BASE       0x50060800     /* 0x50060800-0x50060bff: RNG */
+
+/* AHB3 Base Addresses **************************************************************/
+
+#define STM32_FMCBANK1_BASE  0x60000000     /* 0x60000000-0x6fffffff: FMC bank 1 */
+#define STM32_FMCBANK2_BASE  0x70000000     /* 0x70000000-0x7fffffff: FMC bank 2 */
+#define STM32_FMCBANK3_BASE  0x80000000     /* 0x80000000-0x8fffffff: FMC bank 3 */
+#define STM32_FMCBANK4_BASE  0x90000000     /* 0x90000000-0x9fffffff: FMC bank 4 */
+#define STM32_FSMC_BASE      0xa0000000     /* 0xa0000000-0xa0000fff: FMC control registers */
+#define STM32_QUADSPI_BASE   0xa0001000     /* 0xa0001000-0xa0001fff: QuadSPI Control */
+#define STM32_FMCBANK5_BASE  0xc0000000     /* 0xc0000000-0xcfffffff: FMC bank 5 */
+#define STM32_FMCBANK6_BASE  0xd0000000     /* 0xd0000000-0xdfffffff: FMC bank 6 */
+
+/* Cortex-M7 Base Addresses *********************************************************/
+/* Other registers -- see armv7-m/nvic.h for standard Cortex-M3 registers in this
+ * address range
+ */
+
+#define STM32_DEBUGMCU_BASE 0xe0042000
+ 
+#endif /* CONFIG_STM32F7_STM32F74XX || CONFIG_STM32F7_STM32F75XX */
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XXX75XXX_MEMORYMAP_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_pinmap.h b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_pinmap.h
new file mode 100644
index 0000000000000000000000000000000000000000..c5d1b50a16cb35c93b47b965af4ec7450655f42f
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_pinmap.h
@@ -0,0 +1,1343 @@
+/************************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32f76xx77xx_pinmap.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32F76XX77XX_PINMAP_H
+#define __ARCH_ARM_SRC_STM32_CHIP_STM32F76XX77XX_PINMAP_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "stm32_gpio.h"
+
+#if defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F76XX)
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Alternate Pin Functions.  All members of the STM32F76|7xxx family share the same
+ * pin multiplexing (although they may differ in the pins physically available).
+ *
+ * Alternative pin selections are provided with a numeric suffix like _1, _2, etc.
+ * Drivers, however, will use the pin selection without the numeric suffix.
+ * Additional definitions are required in the board.h file.  For example, if
+ * CAN1_RX connects vis PA11 on some board, then the following definitions should
+ * appear inthe board.h header file for that board:
+ *
+ * #define GPIO_CAN1_RX GPIO_CAN1_RX_1
+ *
+ * The driver will then automatically configre PA11 as the CAN1 RX pin.
+ */
+
+/* WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!!
+ * Additional effort is required to select specific GPIO options such as frequency,
+ * open-drain/push-pull, and pull-up/down!  Just the basics are defined for most
+ * pins in this file.
+ */
+
+/* ADC */
+
+#define GPIO_ADC1_IN0         (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_ADC1_IN1         (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_ADC1_IN2         (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_ADC1_IN3         (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_ADC1_IN4         (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_ADC1_IN5         (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_ADC1_IN6         (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_ADC1_IN7         (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_ADC1_IN8         (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_ADC1_IN9         (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_ADC1_IN10        (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN0)
+#define GPIO_ADC1_IN11        (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN1)
+#define GPIO_ADC1_IN12        (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN2)
+#define GPIO_ADC1_IN13        (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN3)
+#define GPIO_ADC1_IN14        (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN4)
+#define GPIO_ADC1_IN15        (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN5)
+
+#define GPIO_ADC2_IN0         (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_ADC2_IN1         (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_ADC2_IN2         (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_ADC2_IN3         (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_ADC2_IN4         (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_ADC2_IN5         (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_ADC2_IN6         (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_ADC2_IN7         (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_ADC2_IN8         (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_ADC2_IN9         (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_ADC2_IN10        (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN0)
+#define GPIO_ADC2_IN11        (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN1)
+#define GPIO_ADC2_IN12        (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN2)
+#define GPIO_ADC2_IN13        (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN3)
+#define GPIO_ADC2_IN14        (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN4)
+#define GPIO_ADC2_IN15        (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN5)
+
+#define GPIO_ADC3_IN0         (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_ADC3_IN1         (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_ADC3_IN2         (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_ADC3_IN3         (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_ADC3_IN4         (GPIO_ANALOG|GPIO_PORTF|GPIO_PIN6)
+#define GPIO_ADC3_IN5         (GPIO_ANALOG|GPIO_PORTF|GPIO_PIN7)
+#define GPIO_ADC3_IN6         (GPIO_ANALOG|GPIO_PORTF|GPIO_PIN8)
+#define GPIO_ADC3_IN7         (GPIO_ANALOG|GPIO_PORTF|GPIO_PIN9)
+#define GPIO_ADC3_IN8         (GPIO_ANALOG|GPIO_PORTF|GPIO_PIN10)
+
+#define GPIO_ADC3_IN9         (GPIO_ANALOG|GPIO_PORTF|GPIO_PIN3)
+#define GPIO_ADC3_IN10        (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN0)
+#define GPIO_ADC3_IN11        (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN1)
+#define GPIO_ADC3_IN12        (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN2)
+#define GPIO_ADC3_IN13        (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN3)
+#define GPIO_ADC3_IN14        (GPIO_ANALOG|GPIO_PORTF|GPIO_PIN4)
+#define GPIO_ADC3_IN15        (GPIO_ANALOG|GPIO_PORTF|GPIO_PIN5)
+
+/* CAN */
+
+#define GPIO_CAN1_RX_1        (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_CAN1_RX_2        (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_CAN1_RX_3        (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN0)
+#define GPIO_CAN1_RX_4        (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN14)
+#define GPIO_CAN1_RX_5        (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN9)
+
+#define GPIO_CAN1_TX_1        (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN12)
+#define GPIO_CAN1_TX_2        (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_CAN1_TX_3        (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN1)
+#define GPIO_CAN1_TX_4        (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN13)
+
+#define GPIO_CAN2_RX_1        (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN12)
+#define GPIO_CAN2_RX_2        (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_CAN2_TX_1        (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13)
+#define GPIO_CAN2_TX_2        (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN6)
+
+#define GPIO_CAN3_RX_1        (GPIO_ALT|GPIO_AF11|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8)
+#define GPIO_CAN3_RX_2        (GPIO_ALT|GPIO_AF11|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN3)
+#define GPIO_CAN3_TX_1        (GPIO_ALT|GPIO_AF11|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN15)
+#define GPIO_CAN3_TX_2        (GPIO_ALT|GPIO_AF11|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN4)
+
+/* DAC -" Once the DAC channel is enabled, the corresponding GPIO pin
+ * (PA4 or PA5) is automatically connected to the analog converter output
+ * (DAC_OUTx). In order to avoid parasitic consumption, the PA4 or PA5 pin
+ * should first be configured to analog (AIN)".
+ */
+
+#define GPIO_DAC1_OUT          (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_DAC2_OUT          (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN5)
+
+/* Digital Camera Interface (DCMI) */
+
+#define GPIO_DCMI_D0_1        (GPIO_ALT|GPIO_AF13|GPIO_PORTA|GPIO_PIN9)
+#define GPIO_DCMI_D0_2        (GPIO_ALT|GPIO_AF13|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_DCMI_D0_3        (GPIO_ALT|GPIO_AF13|GPIO_PORTH|GPIO_PIN9)
+#define GPIO_DCMI_D1_1        (GPIO_ALT|GPIO_AF13|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_DCMI_D1_2        (GPIO_ALT|GPIO_AF13|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_DCMI_D1_3        (GPIO_ALT|GPIO_AF13|GPIO_PORTH|GPIO_PIN10)
+#define GPIO_DCMI_D2_1        (GPIO_ALT|GPIO_AF13|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_DCMI_D2_2        (GPIO_ALT|GPIO_AF13|GPIO_PORTE|GPIO_PIN0)
+#define GPIO_DCMI_D2_3        (GPIO_ALT|GPIO_AF13|GPIO_PORTG|GPIO_PIN10)
+#define GPIO_DCMI_D2_4        (GPIO_ALT|GPIO_AF13|GPIO_PORTH|GPIO_PIN11)
+#define GPIO_DCMI_D3_1        (GPIO_ALT|GPIO_AF13|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_DCMI_D3_2        (GPIO_ALT|GPIO_AF13|GPIO_PORTE|GPIO_PIN1)
+#define GPIO_DCMI_D3_3        (GPIO_ALT|GPIO_AF13|GPIO_PORTG|GPIO_PIN11)
+#define GPIO_DCMI_D3_4        (GPIO_ALT|GPIO_AF13|GPIO_PORTH|GPIO_PIN12)
+#define GPIO_DCMI_D4_1        (GPIO_ALT|GPIO_AF13|GPIO_PORTC|GPIO_PIN11)
+#define GPIO_DCMI_D4_2        (GPIO_ALT|GPIO_AF13|GPIO_PORTE|GPIO_PIN4)
+#define GPIO_DCMI_D4_3        (GPIO_ALT|GPIO_AF13|GPIO_PORTH|GPIO_PIN14)
+#define GPIO_DCMI_D5_1        (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_DCMI_D5_2        (GPIO_ALT|GPIO_AF13|GPIO_PORTD|GPIO_PIN3)
+#define GPIO_DCMI_D5_3        (GPIO_ALT|GPIO_AF13|GPIO_PORTI|GPIO_PIN4)
+#define GPIO_DCMI_D6_1        (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_DCMI_D6_2        (GPIO_ALT|GPIO_AF13|GPIO_PORTE|GPIO_PIN5)
+#define GPIO_DCMI_D6_3        (GPIO_ALT|GPIO_AF13|GPIO_PORTI|GPIO_PIN6)
+#define GPIO_DCMI_D7_1        (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_DCMI_D7_2        (GPIO_ALT|GPIO_AF13|GPIO_PORTE|GPIO_PIN6)
+#define GPIO_DCMI_D7_3        (GPIO_ALT|GPIO_AF13|GPIO_PORTI|GPIO_PIN7)
+#define GPIO_DCMI_D8_1        (GPIO_ALT|GPIO_AF13|GPIO_PORTC|GPIO_PIN10)
+#define GPIO_DCMI_D8_2        (GPIO_ALT|GPIO_AF13|GPIO_PORTH|GPIO_PIN6)
+#define GPIO_DCMI_D8_3        (GPIO_ALT|GPIO_AF13|GPIO_PORTI|GPIO_PIN1)
+#define GPIO_DCMI_D9_1        (GPIO_ALT|GPIO_AF13|GPIO_PORTC|GPIO_PIN12)
+#define GPIO_DCMI_D9_2        (GPIO_ALT|GPIO_AF13|GPIO_PORTH|GPIO_PIN7)
+#define GPIO_DCMI_D9_3        (GPIO_ALT|GPIO_AF13|GPIO_PORTI|GPIO_PIN2)
+#define GPIO_DCMI_D10_1       (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_DCMI_D10_2       (GPIO_ALT|GPIO_AF13|GPIO_PORTD|GPIO_PIN6)
+#define GPIO_DCMI_D10_3       (GPIO_ALT|GPIO_AF13|GPIO_PORTI|GPIO_PIN3)
+#define GPIO_DCMI_D11_1       (GPIO_ALT|GPIO_AF13|GPIO_PORTD|GPIO_PIN2)
+#define GPIO_DCMI_D11_2       (GPIO_ALT|GPIO_AF13|GPIO_PORTF|GPIO_PIN10)
+#define GPIO_DCMI_D11_3       (GPIO_ALT|GPIO_AF13|GPIO_PORTH|GPIO_PIN15)
+#define GPIO_DCMI_D12_1       (GPIO_ALT|GPIO_AF13|GPIO_PORTF|GPIO_PIN11)
+#define GPIO_DCMI_D12_2       (GPIO_ALT|GPIO_AF13|GPIO_PORTG|GPIO_PIN6)
+#define GPIO_DCMI_D13_1       (GPIO_ALT|GPIO_AF13|GPIO_PORTG|GPIO_PIN15)
+#define GPIO_DCMI_D13_2       (GPIO_ALT|GPIO_AF13|GPIO_PORTG|GPIO_PIN7)
+#define GPIO_DCMI_D13_3       (GPIO_ALT|GPIO_AF13|GPIO_PORTI|GPIO_PIN0)
+#define GPIO_DCMI_HSYNC_1     (GPIO_ALT|GPIO_AF13|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_DCMI_HSYNC_2     (GPIO_ALT|GPIO_AF13|GPIO_PORTH|GPIO_PIN8)
+#define GPIO_DCMI_PIXCK       (GPIO_ALT|GPIO_AF13|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_DCMI_VSYNC_1     (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_DCMI_VSYNC_2     (GPIO_ALT|GPIO_AF13|GPIO_PORTG|GPIO_PIN9)
+#define GPIO_DCMI_VSYNC_3     (GPIO_ALT|GPIO_AF13|GPIO_PORTI|GPIO_PIN5)
+
+/* DSI Host */
+
+#define DSI_TE_1             (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN11)
+#define DSI_TE_2             (GPIO_ALT|GPIO_AF13|GPIO_PORTJ|GPIO_PIN12)
+
+/* Digital filter for sigma delta modulators */
+
+#define GPIO_DFSDM1_CKOUT_1   (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_DFSDM1_CKOUT_2   (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN2)
+#define GPIO_DFSDM1_CKOUT_3   (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN3)
+#define GPIO_DFSDM1_CKOUT_4   (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN10)
+#define GPIO_DFSDM1_CKOUT_5   (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN9)
+#define GPIO_DFSDM1_CKIN0_1   (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN0)
+#define GPIO_DFSDM1_CKIN0_2   (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN3)
+#define GPIO_DFSDM1_CKIN1_1   (GPIO_ALT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN2)
+#define GPIO_DFSDM1_CKIN1_2   (GPIO_ALT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13)
+#define GPIO_DFSDM1_CKIN1_3   (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN2)
+#define GPIO_DFSDM1_CKIN1_4   (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN7)
+#define GPIO_DFSDM1_CKIN2_1   (GPIO_ALT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN15)
+#define GPIO_DFSDM1_CKIN2_2   (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN4)
+#define GPIO_DFSDM1_CKIN2_3   (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN8)
+#define GPIO_DFSDM1_CKIN3_1   (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_DFSDM1_CKIN3_2   (GPIO_ALT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN1)
+#define GPIO_DFSDM1_CKIN3_3   (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN8)
+#define GPIO_DFSDM1_CKIN3_4   (GPIO_ALT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN5)
+#define GPIO_DFSDM1_CKIN4_1   (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN6)
+#define GPIO_DFSDM1_CKIN4_2   (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN11)
+#define GPIO_DFSDM1_CKIN5_1   (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_DFSDM1_CKIN5_2   (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN10)
+#define GPIO_DFSDM1_CKIN5_3   (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN13)
+#define GPIO_DFSDM1_CKIN6_1   (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN0)
+#define GPIO_DFSDM1_CKIN6_2   (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN14)
+#define GPIO_DFSDM1_CKIN7_1   (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_DFSDM1_CKIN7_2   (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_DFSDM1_CKIN7_3   (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_DFSDM1_CKIN7_4   (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTS|GPIO_PIN1)
+#define GPIO_DFSDM1_DATAIN0_1 (GPIO_ALT|GPIO_AF3 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN1)
+#define GPIO_DFSDM1_DATAIN0_2 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN4)
+#define GPIO_DFSDM1_DATAIN1_1 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_DFSDM1_DATAIN1_2 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN12)
+#define GPIO_DFSDM1_DATAIN1_3 (GPIO_ALT|GPIO_AF3 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN3)
+#define GPIO_DFSDM1_DATAIN1_4 (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN6)
+#define GPIO_DFSDM1_DATAIN2_1 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_DFSDM1_DATAIN2_2 (GPIO_ALT|GPIO_AF3 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN5)
+#define GPIO_DFSDM1_DATAIN2_3 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN7)
+#define GPIO_DFSDM1_DATAIN3_1 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_DFSDM1_DATAIN3_2 (GPIO_ALT|GPIO_AF3 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN9)
+#define GPIO_DFSDM1_DATAIN3_3 (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN4)
+#define GPIO_DFSDM1_DATAIN4_1 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN0)
+#define GPIO_DFSDM1_DATAIN4_2 (GPIO_ALT|GPIO_AF3 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN7)
+#define GPIO_DFSDM1_DATAIN4_3 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN10)
+#define GPIO_DFSDM1_DATAIN5_1 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_DFSDM1_DATAIN5_2 (GPIO_ALT|GPIO_AF3 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN11)
+#define GPIO_DFSDM1_DATAIN5_3 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN12)
+#define GPIO_DFSDM1_DATAIN6_1 (GPIO_ALT|GPIO_AF3 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN1)
+#define GPIO_DFSDM1_DATAIN6_2 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN13)
+#define GPIO_DFSDM1_DATAIN7_1 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_DFSDM1_DATAIN7_2 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_DFSDM1_DATAIN7_3 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN0)
+
+/* Ethernet MAC */
+
+#define GPIO_ETH_MDC          (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN1)
+#define GPIO_ETH_MDIO         (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_ETH_MII_COL_1    (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_ETH_MII_COL_2    (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN3)
+#define GPIO_ETH_MII_CRS_1    (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_ETH_MII_CRS_2    (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN2)
+#define GPIO_ETH_MII_RXD0     (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN4)
+#define GPIO_ETH_MII_RXD1     (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN5)
+#define GPIO_ETH_MII_RXD2_1   (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_ETH_MII_RXD2_2   (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN6)
+#define GPIO_ETH_MII_RXD3_1   (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_ETH_MII_RXD3_2   (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN7)
+#define GPIO_ETH_MII_RX_CLK   (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_ETH_MII_RX_DV    (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_ETH_MII_RX_ER_1  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_ETH_MII_RX_ER_2  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN10)
+#define GPIO_ETH_MII_TXD0_1   (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN12)
+#define GPIO_ETH_MII_TXD0_2   (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN13)
+#define GPIO_ETH_MII_TXD1_1   (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13)
+#define GPIO_ETH_MII_TXD1_2   (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN14)
+#define GPIO_ETH_MII_TXD2     (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN2)
+#define GPIO_ETH_MII_TXD3_1   (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_ETH_MII_TXD3_2   (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN2)
+#define GPIO_ETH_MII_TX_CLK   (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN3)
+#define GPIO_ETH_MII_TX_EN_1  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_ETH_MII_TX_EN_2  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN11)
+#define GPIO_ETH_PPS_OUT_1    (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_ETH_PPS_OUT_2    (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN8)
+
+#define GPIO_ETH_RMII_CRS_DV  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_ETH_RMII_REF_CLK (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_ETH_RMII_RXD0    (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN4)
+#define GPIO_ETH_RMII_RXD1    (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN5)
+#define GPIO_ETH_RMII_TXD0_1  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN12)
+#define GPIO_ETH_RMII_TXD0_2  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN13)
+#define GPIO_ETH_RMII_TXD1_1  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13)
+#define GPIO_ETH_RMII_TXD1_2  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN14)
+#define GPIO_ETH_RMII_TX_EN_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_ETH_RMII_TX_EN_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN11)
+
+/* Event outputs */
+
+#define GPIO_PA0_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_PA1_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_PA2_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_PA3_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_PA4_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_PA5_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_PA6_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_PA7_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_PA8_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN8)
+#define GPIO_PA9_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN9)
+#define GPIO_PA10_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_PA11_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_PA12_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN12)
+#define GPIO_PA13_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN13)
+#define GPIO_PA14_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN14)
+#define GPIO_PA15_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN15)
+
+#define GPIO_PB0_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_PB1_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_PB2_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN2)
+#define GPIO_PB3_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN3)
+#define GPIO_PB4_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN4)
+#define GPIO_PB5_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_PB6_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_PB7_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_PB8_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_PB9_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_PB10_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_PB11_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_PB12_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN12)
+#define GPIO_PB13_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN13)
+#define GPIO_PB14_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_PB15_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN15)
+
+#define GPIO_PC0_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN0)
+#define GPIO_PC1_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN1)
+#define GPIO_PC2_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN2)
+#define GPIO_PC3_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN3)
+#define GPIO_PC4_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN4)
+#define GPIO_PC5_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN5)
+#define GPIO_PC6_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_PC7_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_PC8_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_PC9_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_PC10_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN10)
+#define GPIO_PC11_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN11)
+#define GPIO_PC12_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN12)
+#define GPIO_PC13_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN13)
+#define GPIO_PC14_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN14)
+#define GPIO_PC15_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN15)
+
+#define GPIO_PD0_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN0)
+#define GPIO_PD1_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN1)
+#define GPIO_PD2_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN2)
+#define GPIO_PD3_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN3)
+#define GPIO_PD4_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN4)
+#define GPIO_PD5_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN5)
+#define GPIO_PD6_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN6)
+#define GPIO_PD7_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN7)
+#define GPIO_PD8_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN8)
+#define GPIO_PD9_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN9)
+#define GPIO_PD10_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN10)
+#define GPIO_PD11_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN11)
+#define GPIO_PD12_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN12)
+#define GPIO_PD13_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN13)
+#define GPIO_PD14_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN14)
+#define GPIO_PD15_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN15)
+
+#define GPIO_PE0_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN0)
+#define GPIO_PE1_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN1)
+#define GPIO_PE2_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN2)
+#define GPIO_PE3_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN3)
+#define GPIO_PE4_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN4)
+#define GPIO_PE5_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN5)
+#define GPIO_PE6_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN6)
+#define GPIO_PE7_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN7)
+#define GPIO_PE8_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN8)
+#define GPIO_PE9_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN9)
+#define GPIO_PE10_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN10)
+#define GPIO_PE11_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN11)
+#define GPIO_PE12_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN12)
+#define GPIO_PE13_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN13)
+#define GPIO_PE14_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN14)
+#define GPIO_PE15_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN15)
+
+#define GPIO_PF0_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN0)
+#define GPIO_PF1_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN1)
+#define GPIO_PF2_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN2)
+#define GPIO_PF3_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN3)
+#define GPIO_PF4_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN4)
+#define GPIO_PF5_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN5)
+#define GPIO_PF6_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN6)
+#define GPIO_PF7_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN7)
+#define GPIO_PF8_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN8)
+#define GPIO_PF9_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN9)
+#define GPIO_PF10_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN10)
+#define GPIO_PF11_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN11)
+#define GPIO_PF12_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN12)
+#define GPIO_PF13_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN13)
+#define GPIO_PF14_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN14)
+#define GPIO_PF15_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN15)
+
+#define GPIO_PG0_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN0)
+#define GPIO_PG1_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN1)
+#define GPIO_PG2_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN2)
+#define GPIO_PG3_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN3)
+#define GPIO_PG4_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN4)
+#define GPIO_PG5_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN5)
+#define GPIO_PG6_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN6)
+#define GPIO_PG7_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN7)
+#define GPIO_PG8_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN8)
+#define GPIO_PG9_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN9)
+#define GPIO_PG10_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN10)
+#define GPIO_PG11_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN11)
+#define GPIO_PG12_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN12)
+#define GPIO_PG13_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN13)
+#define GPIO_PG14_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN14)
+#define GPIO_PG15_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN15)
+
+#define GPIO_PH0_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN0)
+#define GPIO_PH1_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN1)
+#define GPIO_PH2_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN2)
+#define GPIO_PH3_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN3)
+#define GPIO_PH4_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN4)
+#define GPIO_PH5_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN5)
+#define GPIO_PH6_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN6)
+#define GPIO_PH7_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN7)
+#define GPIO_PH8_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN8)
+#define GPIO_PH9_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN9)
+#define GPIO_PH10_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN10)
+#define GPIO_PH11_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN11)
+#define GPIO_PH12_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN12)
+#define GPIO_PH13_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN13)
+#define GPIO_PH14_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN14)
+#define GPIO_PH15_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN15)
+
+#define GPIO_PI0_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN0)
+#define GPIO_PI1_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN1)
+#define GPIO_PI2_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN2)
+#define GPIO_PI3_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN3)
+#define GPIO_PI4_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN4)
+#define GPIO_PI5_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN5)
+#define GPIO_PI6_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN6)
+#define GPIO_PI7_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN7)
+#define GPIO_PI8_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN8)
+#define GPIO_PI9_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN9)
+#define GPIO_PI10_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN10)
+#define GPIO_PI11_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN11)
+#define GPIO_PI12_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN12)
+#define GPIO_PI13_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN13)
+#define GPIO_PI14_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN14)
+#define GPIO_PI15_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN15)
+
+#define GPIO_PJ0_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN0)
+#define GPIO_PJ1_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN1)
+#define GPIO_PJ2_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN2)
+#define GPIO_PJ3_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN3)
+#define GPIO_PJ4_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN4)
+#define GPIO_PJ5_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN5)
+#define GPIO_PJ6_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN6)
+#define GPIO_PJ7_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN7)
+#define GPIO_PJ8_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN8)
+#define GPIO_PJ9_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN9)
+#define GPIO_PJ10_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN10)
+#define GPIO_PJ11_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN11)
+#define GPIO_PJ12_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN12)
+#define GPIO_PJ13_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN13)
+#define GPIO_PJ14_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN14)
+#define GPIO_PJ15_EVENTOUT    (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN15)
+
+#define GPIO_PK0_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTK|GPIO_PIN0)
+#define GPIO_PK1_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTK|GPIO_PIN1)
+#define GPIO_PK2_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTK|GPIO_PIN2)
+#define GPIO_PK3_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTK|GPIO_PIN3)
+#define GPIO_PK4_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTK|GPIO_PIN4)
+#define GPIO_PK5_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTK|GPIO_PIN5)
+#define GPIO_PK6_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTK|GPIO_PIN6)
+#define GPIO_PK7_EVENTOUT     (GPIO_ALT|GPIO_AF15|GPIO_PORTK|GPIO_PIN7)
+
+/* Flexible Static Memory Controller (FSMC) */
+
+#define GPIO_FSMC_A0          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN0)
+#define GPIO_FSMC_A1          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN1)
+#define GPIO_FSMC_A2          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN2)
+#define GPIO_FSMC_A3          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN3)
+#define GPIO_FSMC_A4          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN4)
+#define GPIO_FSMC_A5          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN5)
+#define GPIO_FSMC_A6          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN12)
+#define GPIO_FSMC_A7          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN13)
+#define GPIO_FSMC_A8          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN14)
+#define GPIO_FSMC_A9          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN15)
+#define GPIO_FSMC_A10         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN0)
+#define GPIO_FSMC_A11         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN1)
+#define GPIO_FSMC_A12         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN2)
+#define GPIO_FSMC_A13         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN3)
+#define GPIO_FSMC_A14         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN4)
+#define GPIO_FSMC_A15         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN5)
+#define GPIO_FSMC_A16         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN11)
+#define GPIO_FSMC_A17         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN12)
+#define GPIO_FSMC_A18         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN13)
+#define GPIO_FSMC_A19         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN3)
+#define GPIO_FSMC_A20         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN4)
+#define GPIO_FSMC_A21         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN5)
+#define GPIO_FSMC_A22         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN6)
+#define GPIO_FSMC_A23         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN2)
+#define GPIO_FSMC_A24         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN13)
+#define GPIO_FSMC_A25         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN14)
+#define GPIO_FSMC_ALE         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN12)
+#define GPIO_FSMC_BA0         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN4)
+#define GPIO_FSMC_BA1         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN5)
+#define GPIO_FSMC_CLE         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN11)
+#define GPIO_FSMC_CLK         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN3)
+#define GPIO_FSMC_D0          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN14)
+#define GPIO_FSMC_D1          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN15)
+#define GPIO_FSMC_D2          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN0)
+#define GPIO_FSMC_D3          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN1)
+#define GPIO_FSMC_D4          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN7)
+#define GPIO_FSMC_D5          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN8)
+#define GPIO_FSMC_D6          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN9)
+#define GPIO_FSMC_D7          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN10)
+#define GPIO_FSMC_D8          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN11)
+#define GPIO_FSMC_D9          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN12)
+#define GPIO_FSMC_D10         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN13)
+#define GPIO_FSMC_D11         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN14)
+#define GPIO_FSMC_D12         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN15)
+#define GPIO_FSMC_D13         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN8)
+#define GPIO_FSMC_D14         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN9)
+#define GPIO_FSMC_D15         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN10)
+#define GPIO_FSMC_D16         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN8)
+#define GPIO_FSMC_D17         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN9)
+#define GPIO_FSMC_D18         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN10)
+#define GPIO_FSMC_D19         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN11)
+#define GPIO_FSMC_D20         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN12)
+#define GPIO_FSMC_D21         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN13)
+#define GPIO_FSMC_D22         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN14)
+#define GPIO_FSMC_D23         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN15)
+#define GPIO_FSMC_D24         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTI|GPIO_PIN0)
+#define GPIO_FSMC_D25         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTI|GPIO_PIN1)
+#define GPIO_FSMC_D26         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTI|GPIO_PIN2)
+#define GPIO_FSMC_D27         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTI|GPIO_PIN3)
+#define GPIO_FSMC_D28         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTI|GPIO_PIN6)
+#define GPIO_FSMC_D29         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTI|GPIO_PIN7)
+#define GPIO_FSMC_D30         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTI|GPIO_PIN9)
+#define GPIO_FSMC_D31         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTI|GPIO_PIN10)
+#define GPIO_FSMC_INT         (GPIO_ALT|GPIO_AF12|GPIO_PORTG|GPIO_PIN7)
+#define GPIO_FSMC_NBL0        (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN0)
+#define GPIO_FSMC_NBL1        (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN1)
+#define GPIO_FSMC_NBL2        (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTI|GPIO_PIN4)
+#define GPIO_FSMC_NBL3        (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTI|GPIO_PIN5)
+#define GPIO_FSMC_NCE_1       (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN9)
+#define GPIO_FSMC_NCE_2       (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_100MHz|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_FSMC_NE1_1       (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN7)
+#define GPIO_FSMC_NE1_2       (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_100MHz|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_FSMC_NE2_1       (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN9)
+#define GPIO_FSMC_NE2_2       (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_100MHz|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_FSMC_NE3         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN10)
+#define GPIO_FSMC_NE4         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN12)
+#define GPIO_FSMC_NL          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_FSMC_NOE         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN4)
+#define GPIO_FSMC_NWAIT_1     (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN6)
+#define GPIO_FSMC_NWAIT_2     (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_100MHz|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_FSMC_NWE         (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN5)
+#define GPIO_FSMC_SDCKE0_1    (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTC|GPIO_PIN3)
+#define GPIO_FSMC_SDCKE0_2    (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTC|GPIO_PIN5)
+#define GPIO_FSMC_SDCKE0_3    (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN2)
+#define GPIO_FSMC_SDCKE1_1    (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_FSMC_SDCKE1_2    (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN7)
+#define GPIO_FSMC_SDCLK       (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN8)
+#define GPIO_FSMC_SDNCAS      (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN15)
+#define GPIO_FSMC_SDNE0_1     (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTC|GPIO_PIN2)
+#define GPIO_FSMC_SDNE0_2     (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTC|GPIO_PIN4)
+#define GPIO_FSMC_SDNE0_3     (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN3)
+#define GPIO_FSMC_SDNE1_1     (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_FSMC_SDNE1_2     (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN6)
+#define GPIO_FSMC_SDNRAS      (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN11)
+#define GPIO_FSMC_SDNWE_1     (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_FSMC_SDNWE_2     (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTC|GPIO_PIN0)
+#define GPIO_FSMC_SDNWE_3     (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN5)
+
+/* HDMI-CEC Controller */
+
+#define GPIO_HDMICEC_1        (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_HDMICEC_2        (GPIO_ALT|GPIO_AF4|GPIO_PORTA|GPIO_PIN15)
+
+/* I2C */
+
+#define GPIO_I2C1_SCL_1       (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_I2C1_SCL_2       (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_I2C1_SDA_1       (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_I2C1_SDA_2       (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_I2C1_SMBA        (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5)
+
+#define GPIO_I2C2_SCL_1       (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_I2C2_SCL_2       (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTF|GPIO_PIN1)
+#define GPIO_I2C2_SCL_3       (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTH|GPIO_PIN4)
+#define GPIO_I2C2_SDA_1       (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_I2C2_SDA_2       (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTF|GPIO_PIN0)
+#define GPIO_I2C2_SDA_3       (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTH|GPIO_PIN5)
+#define GPIO_I2C2_SMBA_1      (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN12)
+#define GPIO_I2C2_SMBA_2      (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN2)
+#define GPIO_I2C2_SMBA_3      (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN6)
+
+#define GPIO_I2C3_SCL_1       (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN8)
+#define GPIO_I2C3_SCL_2       (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTH|GPIO_PIN7)
+#define GPIO_I2C3_SDA_1       (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_I2C3_SDA_2       (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTH|GPIO_PIN8)
+#define GPIO_I2C3_SMBA_1      (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN9)
+#define GPIO_I2C3_SMBA_2      (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN9)
+
+#define GPIO_I2C4_SCL_1       (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN12)
+#define GPIO_I2C4_SCL_2       (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN14)
+#define GPIO_I2C4_SCL_3       (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN11)
+#define GPIO_I2C4_SCL_4       (GPIO_ALT|GPIO_AF11|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_I2C4_SCL_5       (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_I2C4_SDA_1       (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN13)
+#define GPIO_I2C4_SDA_2       (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN15)
+#define GPIO_I2C4_SDA_3       (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN12)
+#define GPIO_I2C4_SDA_4       (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_I2C4_SMBA_1      (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN11)
+#define GPIO_I2C4_SMBA_2      (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN13)
+#define GPIO_I2C4_SMBA_3      (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN10)
+#define GPIO_I2C4_SMBA_4      (GPIO_ALT|GPIO_AF11|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9)
+
+/* I2S */
+
+#define GPIO_I2S1_CK_1        (GPIO_ALT|GPIO_AF5 |GPIO_PORTA|GPIO_PIN5)
+#define GPIO_I2S1_CK_2        (GPIO_ALT|GPIO_AF5 |GPIO_PORTB|GPIO_PIN3)
+#define GPIO_I2S1_CK_3        (GPIO_ALT|GPIO_AF5 |GPIO_PORTG|GPIO_PIN11)
+#define GPIO_I2S1_MCK         (GPIO_ALT|GPIO_AF5 |GPIO_PORTC|GPIO_PIN4)
+#define GPIO_I2S1_SD_1        (GPIO_ALT|GPIO_AF5 |GPIO_PORTA|GPIO_PIN7)
+#define GPIO_I2S1_SD_2        (GPIO_ALT|GPIO_AF5 |GPIO_PORTB|GPIO_PIN5)
+#define GPIO_I2S1_SD_3        (GPIO_ALT|GPIO_AF5 |GPIO_PORTD|GPIO_PIN7)
+#define GPIO_I2S1_WS_1        (GPIO_ALT|GPIO_AF5 |GPIO_PORTA|GPIO_PIN15)
+#define GPIO_I2S1_WS_2        (GPIO_ALT|GPIO_AF5 |GPIO_PORTA|GPIO_PIN4)
+#define GPIO_I2S1_WS_3        (GPIO_ALT|GPIO_AF5 |GPIO_PORTG|GPIO_PIN10)
+
+#define GPIO_I2S2_CK_1        (GPIO_ALT|GPIO_AF5 |GPIO_PORTA|GPIO_PIN9)
+#define GPIO_I2S2_CK_2        (GPIO_ALT|GPIO_AF5 |GPIO_PORTB|GPIO_PIN10)
+#define GPIO_I2S2_CK_3        (GPIO_ALT|GPIO_AF5 |GPIO_PORTB|GPIO_PIN13)
+#define GPIO_I2S2_CK_4        (GPIO_ALT|GPIO_AF5 |GPIO_PORTD|GPIO_PIN3)
+#define GPIO_I2S2_CK_5        (GPIO_ALT|GPIO_AF5 |GPIO_PORTI|GPIO_PIN1)
+#define GPIO_I2S2_CK_6        (GPIO_ALT|GPIO_AF5 |GPIO_PORTA|GPIO_PIN12)
+#define GPIO_I2S2_MCK         (GPIO_ALT|GPIO_AF5 |GPIO_PORTC|GPIO_PIN6)
+#define GPIO_I2S2_SD_1        (GPIO_ALT|GPIO_AF5 |GPIO_PORTB|GPIO_PIN15)
+#define GPIO_I2S2_SD_2        (GPIO_ALT|GPIO_AF5 |GPIO_PORTC|GPIO_PIN1)
+#define GPIO_I2S2_SD_3        (GPIO_ALT|GPIO_AF5 |GPIO_PORTC|GPIO_PIN3)
+#define GPIO_I2S2_SD_4        (GPIO_ALT|GPIO_AF5 |GPIO_PORTI|GPIO_PIN3)
+#define GPIO_I2S2_WS_1        (GPIO_ALT|GPIO_AF5 |GPIO_PORTB|GPIO_PIN12)
+#define GPIO_I2S2_WS_2        (GPIO_ALT|GPIO_AF5 |GPIO_PORTB|GPIO_PIN9)
+#define GPIO_I2S2_WS_3        (GPIO_ALT|GPIO_AF5 |GPIO_PORTI|GPIO_PIN0)
+#define GPIO_I2S2_WS_4        (GPIO_ALT|GPIO_AF7 |GPIO_PORTB|GPIO_PIN4)
+#define GPIO_I2S2_WS_5        (GPIO_ALT|GPIO_AF5 |GPIO_PORTA|GPIO_PIN11)
+
+#define GPIO_I2S3_CK_1        (GPIO_ALT|GPIO_AF6 |GPIO_PORTB|GPIO_PIN3)
+#define GPIO_I2S3_CK_2        (GPIO_ALT|GPIO_AF6 |GPIO_PORTC|GPIO_PIN10)
+#define GPIO_I2S3_MCK         (GPIO_ALT|GPIO_AF6 |GPIO_PORTC|GPIO_PIN7)
+#define GPIO_I2S3_SD_1        (GPIO_ALT|GPIO_AF5 |GPIO_PORTD|GPIO_PIN6)
+#define GPIO_I2S3_SD_2        (GPIO_ALT|GPIO_AF6 |GPIO_PORTB|GPIO_PIN5)
+#define GPIO_I2S3_SD_3        (GPIO_ALT|GPIO_AF6 |GPIO_PORTC|GPIO_PIN12)
+#define GPIO_I2S3_SD_4        (GPIO_ALT|GPIO_AF7 |GPIO_PORTB|GPIO_PIN2)
+#define GPIO_I2S3_WS_1        (GPIO_ALT|GPIO_AF6 |GPIO_PORTA|GPIO_PIN15)
+#define GPIO_I2S3_WS_2        (GPIO_ALT|GPIO_AF6 |GPIO_PORTA|GPIO_PIN4)
+
+#define GPIO_I2S4_SD_1        (GPIO_ALT|GPIO_AF11|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_I2S4_SD_2        (GPIO_ALT|GPIO_AF1 |GPIO_PORTB|GPIO_PIN9)
+
+#define GPIO_I2S_CKIN         (GPIO_ALT|GPIO_AF5 |GPIO_PORTC|GPIO_PIN9)
+
+/* JTAG */
+
+#define GPIO_JTCK             (GPIO_ALT|GPIO_AF0|GPIO_PORTA|GPIO_PIN14)
+#define GPIO_JTDI             (GPIO_ALT|GPIO_AF0|GPIO_PORTA|GPIO_PIN15)
+#define GPIO_JTDO             (GPIO_ALT|GPIO_AF0|GPIO_PORTB|GPIO_PIN3)
+#define GPIO_JTMS             (GPIO_ALT|GPIO_AF0|GPIO_PORTA|GPIO_PIN13)
+#define GPIO_NJTRST           (GPIO_ALT|GPIO_AF0|GPIO_PORTB|GPIO_PIN4)
+
+#define GPIO_SWCLK            (GPIO_ALT|GPIO_AF0|GPIO_PORTA|GPIO_PIN14)
+#define GPIO_SWDIO            (GPIO_ALT|GPIO_AF0|GPIO_PORTA|GPIO_PIN13)
+
+/* LCD-TFT Display Controller (LTDC) */
+
+#define GPIO_LTDC_R0_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN13)
+#define GPIO_LTDC_R0_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN2)
+#define GPIO_LTDC_R0_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN15)
+#define GPIO_LTDC_R1_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_LTDC_R1_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN3)
+#define GPIO_LTDC_R1_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN0)
+#define GPIO_LTDC_R2_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_LTDC_R2_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN10)
+#define GPIO_LTDC_R2_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN8)
+#define GPIO_LTDC_R2_4        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN1)
+#define GPIO_LTDC_R3_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN9)
+#define GPIO_LTDC_R3_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN2)
+#define GPIO_LTDC_R3_1        (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_LTDC_R4_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_LTDC_R4_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_LTDC_R4_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN10)
+#define GPIO_LTDC_R4_4        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN3)
+#define GPIO_LTDC_R5_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN12)
+#define GPIO_LTDC_R5_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN0)
+#define GPIO_LTDC_R5_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN11)
+#define GPIO_LTDC_R5_4        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN4)
+#define GPIO_LTDC_R5_5        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN9)
+#define GPIO_LTDC_R6_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8)
+#define GPIO_LTDC_R6_2        (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_LTDC_R6_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN12)
+#define GPIO_LTDC_R6_4        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN5)
+#define GPIO_LTDC_R7_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN15)
+#define GPIO_LTDC_R7_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN6)
+#define GPIO_LTDC_R7_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN6)
+#define GPIO_LTDC_R7_4        (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN0)
+
+#define GPIO_LTDC_B0_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN4)
+#define GPIO_LTDC_B0_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN14)
+#define GPIO_LTDC_B0_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN12)
+#define GPIO_LTDC_B1_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN12)
+#define GPIO_LTDC_B1_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN13)
+#define GPIO_LTDC_B1_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_LTDC_B2_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN6)
+#define GPIO_LTDC_B2_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN10)
+#define GPIO_LTDC_B2_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN14)
+#define GPIO_LTDC_B2_4        (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_LTDC_B2_5        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_LTDC_B3_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN10)
+#define GPIO_LTDC_B3_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN11)
+#define GPIO_LTDC_B3_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN15)
+#define GPIO_LTDC_B3_4        (GPIO_ALT|GPIO_AF13|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8)
+#define GPIO_LTDC_B4_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN12)
+#define GPIO_LTDC_B4_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN4)
+#define GPIO_LTDC_B4_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTK|GPIO_PIN3)
+#define GPIO_LTDC_B4_4        (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN12)
+#define GPIO_LTDC_B4_5        (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_LTDC_B5_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_LTDC_B5_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN5)
+#define GPIO_LTDC_B5_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTK|GPIO_PIN4)
+#define GPIO_LTDC_B6_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_LTDC_B6_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN6)
+#define GPIO_LTDC_B6_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTK|GPIO_PIN5)
+#define GPIO_LTDC_B7_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_LTDC_B7_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN7)
+#define GPIO_LTDC_B7_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTK|GPIO_PIN6)
+
+#define GPIO_LTDC_G0_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN5)
+#define GPIO_LTDC_G0_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN7)
+#define GPIO_LTDC_G0_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_LTDC_G1_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN6)
+#define GPIO_LTDC_G1_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN8)
+#define GPIO_LTDC_G1_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_LTDC_G2_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_LTDC_G2_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN13)
+#define GPIO_LTDC_G2_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN9)
+#define GPIO_LTDC_G2_4        (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN15)
+#define GPIO_LTDC_G3_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN11)
+#define GPIO_LTDC_G3_2        (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN10)
+#define GPIO_LTDC_G3_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN14)
+#define GPIO_LTDC_G3_4        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN10)
+#define GPIO_LTDC_G3_5        (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_LTDC_G3_6        (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN12)
+#define GPIO_LTDC_G4_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_LTDC_G4_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN15)
+#define GPIO_LTDC_G4_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN11)
+#define GPIO_LTDC_G4_4        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN4)
+#define GPIO_LTDC_G4_5        (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN13)
+#define GPIO_LTDC_G5_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_LTDC_G5_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN0)
+#define GPIO_LTDC_G5_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTK|GPIO_PIN0)
+#define GPIO_LTDC_G5_4        (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN4)
+#define GPIO_LTDC_G6_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_LTDC_G6_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN1)
+#define GPIO_LTDC_G6_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTK|GPIO_PIN1)
+#define GPIO_LTDC_G6_4        (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN11)
+#define GPIO_LTDC_G7_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN3)
+#define GPIO_LTDC_G7_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN2)
+#define GPIO_LTDC_G7_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTK|GPIO_PIN2)
+#define GPIO_LTDC_G7_4        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_LTDC_G7_5        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN8)
+
+#define GPIO_LTDC_HSYNC_1     (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_LTDC_HSYNC_2     (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN10)
+#define GPIO_LTDC_HSYNC_3     (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN12)
+#define GPIO_LTDC_VSYNC_1     (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_LTDC_VSYNC_2     (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN9)
+#define GPIO_LTDC_VSYNC_3     (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN13)
+#define GPIO_LTDC_CLK_1       (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN14)
+#define GPIO_LTDC_CLK_2       (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN7)
+#define GPIO_LTDC_CLK_3       (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN14)
+#define GPIO_LTDC_DE_1        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN13)
+#define GPIO_LTDC_DE_2        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN10)
+#define GPIO_LTDC_DE_3        (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTK|GPIO_PIN7)
+
+/* Low Power Timer */
+
+#define GPIO_LPTIM1_ETR_1     (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN0)
+#define GPIO_LPTIM1_ETR_2     (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTG|GPIO_PIN14)
+#define GPIO_LPTIM1_IN1_1     (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTD|GPIO_PIN12)
+#define GPIO_LPTIM1_IN1_2     (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTG|GPIO_PIN12)
+#define GPIO_LPTIM1_IN2_3     (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN1)
+#define GPIO_LPTIM1_IN2_4     (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTH|GPIO_PIN2)
+#define GPIO_LPTIM1_OUT_1     (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN13)
+#define GPIO_LPTIM1_OUT_2     (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN13)
+
+/* Clocks outputs */
+
+#define GPIO_MCO1             (GPIO_ALT|GPIO_AF0|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8)
+#define GPIO_MCO2             (GPIO_ALT|GPIO_AF0|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9)
+
+/* Management data input/output */
+
+#define MDIOS_MDIO_1          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN2)
+#define MDIOS_MDC_1           (GPIO_ALT|GPIO_AF12|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN6)
+#define MDIOS_MDC_2           (GPIO_ALT|GPIO_AF12|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN1)
+#define MDIOS_MDIO_2          (GPIO_ALT|GPIO_AF12|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN10)
+
+/* OTG FS/HS (VBUS PA9 is not an alternate configuration) */
+
+#define GPIO_OTGFS_DM         (GPIO_ALT|GPIO_FLOAT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_OTGFS_DP         (GPIO_ALT|GPIO_FLOAT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN12)
+#define GPIO_OTGFS_ID         (GPIO_ALT|GPIO_PULLUP|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_OTGFS_SOF        (GPIO_ALT|GPIO_FLOAT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8)
+
+#define GPIO_OTGHSFS_DM       (GPIO_ALT|GPIO_FLOAT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_OTGHSFS_DP       (GPIO_ALT|GPIO_FLOAT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN15)
+#define GPIO_OTGHSFS_ID       (GPIO_ALT|GPIO_PULLUP|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN12)
+
+#define GPIO_OTGHS_SOF        (GPIO_ALT|GPIO_FLOAT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN4)
+
+#define GPIO_OTGHS_ULPI_CK    (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_OTGHS_ULPI_D0    (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_OTGHS_ULPI_D1    (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_OTGHS_ULPI_D2    (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_OTGHS_ULPI_D3    (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_OTGHS_ULPI_D4    (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_OTGHS_ULPI_D5    (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN12)
+#define GPIO_OTGHS_ULPI_D6    (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN13)
+#define GPIO_OTGHS_ULPI_D7    (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_OTGHS_ULPI_DIR_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTC|GPIO_PIN2)
+#define GPIO_OTGHS_ULPI_DIR_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTI|GPIO_PIN11)
+#define GPIO_OTGHS_ULPI_NXT_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTC|GPIO_PIN3)
+#define GPIO_OTGHS_ULPI_NXT_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTH|GPIO_PIN4)
+#define GPIO_OTGHS_ULPI_STP   (GPIO_ALT|GPIO_AF10|GPIO_PORTC|GPIO_PIN0)
+
+/* QuadSPI */
+
+#define GPIO_QUADSPI_BK1_IO0_1  (GPIO_ALT|GPIO_AF10|GPIO_PORTF|GPIO_PIN8)
+#define GPIO_QUADSPI_BK1_IO0_2  (GPIO_ALT|GPIO_AF9 |GPIO_PORTC|GPIO_PIN9)
+#define GPIO_QUADSPI_BK1_IO0_3  (GPIO_ALT|GPIO_AF9 |GPIO_PORTD|GPIO_PIN11)
+#define GPIO_QUADSPI_BK1_IO1_1  (GPIO_ALT|GPIO_AF10|GPIO_PORTF|GPIO_PIN9)
+#define GPIO_QUADSPI_BK1_IO1_2  (GPIO_ALT|GPIO_AF9 |GPIO_PORTC|GPIO_PIN10)
+#define GPIO_QUADSPI_BK1_IO1_3  (GPIO_ALT|GPIO_AF9 |GPIO_PORTD|GPIO_PIN12)
+#define GPIO_QUADSPI_BK1_IO2_1  (GPIO_ALT|GPIO_AF9 |GPIO_PORTE|GPIO_PIN2)
+#define GPIO_QUADSPI_BK1_IO2_2  (GPIO_ALT|GPIO_AF9 |GPIO_PORTF|GPIO_PIN7)
+#define GPIO_QUADSPI_BK1_IO3_1  (GPIO_ALT|GPIO_AF9 |GPIO_PORTA|GPIO_PIN1)
+#define GPIO_QUADSPI_BK1_IO3_2  (GPIO_ALT|GPIO_AF9 |GPIO_PORTD|GPIO_PIN13)
+#define GPIO_QUADSPI_BK1_IO3_3  (GPIO_ALT|GPIO_AF9 |GPIO_PORTF|GPIO_PIN6)
+#define GPIO_QUADSPI_BK1_NCS_1  (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_QUADSPI_BK1_NCS_2  (GPIO_ALT|GPIO_AF9 |GPIO_PORTB|GPIO_PIN10)
+
+#define GPIO_QUADSPI_BK2_IO0_1  (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN7)
+#define GPIO_QUADSPI_BK2_IO0_2  (GPIO_ALT|GPIO_AF9 |GPIO_PORTH|GPIO_PIN2)
+#define GPIO_QUADSPI_BK2_IO1_1  (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN8)
+#define GPIO_QUADSPI_BK2_IO1_2  (GPIO_ALT|GPIO_AF9 |GPIO_PORTH|GPIO_PIN3)
+#define GPIO_QUADSPI_BK2_IO2_1  (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN9)
+#define GPIO_QUADSPI_BK2_IO2_2  (GPIO_ALT|GPIO_AF9 |GPIO_PORTG|GPIO_PIN9)
+#define GPIO_QUADSPI_BK2_IO3_1  (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN10)
+#define GPIO_QUADSPI_BK2_IO3_2  (GPIO_ALT|GPIO_AF9 |GPIO_PORTG|GPIO_PIN14)
+#define GPIO_QUADSPI_BK2_NCS    (GPIO_ALT|GPIO_AF9 |GPIO_PORTC|GPIO_PIN11)
+
+#define GPIO_QUADSPI_CLK_1      (GPIO_ALT|GPIO_AF9 |GPIO_PORTB|GPIO_PIN2)
+#define GPIO_QUADSPI_CLK_2      (GPIO_ALT|GPIO_AF9 |GPIO_PORTF|GPIO_PIN10)
+
+/* RTC */
+
+#define GPIO_RTC_REFIN        (GPIO_ALT|GPIO_AF0|GPIO_PORTB|GPIO_PIN15)
+
+/* Serial Audio Interface */
+
+#define GPIO_SAI1_FS_A        (GPIO_ALT|GPIO_AF6 |GPIO_PORTE|GPIO_PIN4)
+#define GPIO_SAI1_FS_B        (GPIO_ALT|GPIO_AF6 |GPIO_PORTF|GPIO_PIN9)
+#define GPIO_SAI1_MCLK_A_1    (GPIO_ALT|GPIO_AF6 |GPIO_PORTE|GPIO_PIN2)
+#define GPIO_SAI1_MCLK_A_2    (GPIO_ALT|GPIO_AF6 |GPIO_PORTG|GPIO_PIN7)
+#define GPIO_SAI1_MCLK_B      (GPIO_ALT|GPIO_AF6 |GPIO_PORTF|GPIO_PIN7)
+#define GPIO_SAI1_SCK_A       (GPIO_ALT|GPIO_AF6 |GPIO_PORTE|GPIO_PIN5)
+#define GPIO_SAI1_SCK_B       (GPIO_ALT|GPIO_AF6 |GPIO_PORTF|GPIO_PIN8)
+#define GPIO_SAI1_SD_A_1      (GPIO_ALT|GPIO_AF6 |GPIO_PORTB|GPIO_PIN2)
+#define GPIO_SAI1_SD_A_2      (GPIO_ALT|GPIO_AF6 |GPIO_PORTC|GPIO_PIN1)
+#define GPIO_SAI1_SD_A_3      (GPIO_ALT|GPIO_AF6 |GPIO_PORTD|GPIO_PIN6)
+#define GPIO_SAI1_SD_A_4      (GPIO_ALT|GPIO_AF6 |GPIO_PORTE|GPIO_PIN6)
+#define GPIO_SAI1_SD_B_1      (GPIO_ALT|GPIO_AF6 |GPIO_PORTE|GPIO_PIN3)
+#define GPIO_SAI1_SD_B_2      (GPIO_ALT|GPIO_AF6 |GPIO_PORTF|GPIO_PIN6)
+#define GPIO_SAI2_FS_A_1      (GPIO_ALT|GPIO_AF10|GPIO_PORTD|GPIO_PIN12)
+#define GPIO_SAI2_FS_A_2      (GPIO_ALT|GPIO_AF10|GPIO_PORTI|GPIO_PIN7)
+#define GPIO_SAI2_FS_B_1      (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN13)
+#define GPIO_SAI2_FS_B_2      (GPIO_ALT|GPIO_AF10|GPIO_PORTG|GPIO_PIN9)
+#define GPIO_SAI2_FS_B_3      (GPIO_ALT|GPIO_AF8 |GPIO_PORTA|GPIO_PIN12)
+#define GPIO_SAI2_FS_B_4      (GPIO_ALT|GPIO_AF8 |GPIO_PORTC|GPIO_PIN0)
+#define GPIO_SAI2_MCLK_A_1    (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN0)
+#define GPIO_SAI2_MCLK_A_2    (GPIO_ALT|GPIO_AF10|GPIO_PORTI|GPIO_PIN4)
+#define GPIO_SAI2_MCLK_B_1    (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_SAI2_MCLK_B_2    (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN14)
+#define GPIO_SAI2_MCLK_B_3    (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN6)
+#define GPIO_SAI2_MCLK_B_4    (GPIO_ALT|GPIO_AF10|GPIO_PORTH|GPIO_PIN3)
+#define GPIO_SAI2_SCK_A_1     (GPIO_ALT|GPIO_AF10|GPIO_PORTD|GPIO_PIN13)
+#define GPIO_SAI2_SCK_A_2     (GPIO_ALT|GPIO_AF10|GPIO_PORTI|GPIO_PIN5)
+#define GPIO_SAI2_SCK_B_1     (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN12)
+#define GPIO_SAI2_SCK_B_2     (GPIO_ALT|GPIO_AF10|GPIO_PORTH|GPIO_PIN2)
+#define GPIO_SAI2_SCK_B_3     (GPIO_ALT|GPIO_AF8 |GPIO_PORTA|GPIO_PIN2)
+#define GPIO_SAI2_SD_A_1      (GPIO_ALT|GPIO_AF10|GPIO_PORTD|GPIO_PIN11)
+#define GPIO_SAI2_SD_A_2      (GPIO_ALT|GPIO_AF10|GPIO_PORTI|GPIO_PIN6)
+#define GPIO_SAI2_SD_B_1      (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_SAI2_SD_B_2      (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN11)
+#define GPIO_SAI2_SD_B_3      (GPIO_ALT|GPIO_AF10|GPIO_PORTF|GPIO_PIN11)
+#define GPIO_SAI2_SD_B_4      (GPIO_ALT|GPIO_AF10|GPIO_PORTG|GPIO_PIN10)
+
+/* SD/MMC */
+
+#define GPIO_SDMMC1_CK        (GPIO_ALT|GPIO_AF12|GPIO_PORTC|GPIO_PIN12)
+#define GPIO_SDMMC1_CMD       (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN2)
+#define GPIO_SDMMC1_D0        (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_SDMMC1_D1        (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_SDMMC1_D2        (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN10)
+#define GPIO_SDMMC1_D3        (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN11)
+#define GPIO_SDMMC1_D4        (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_SDMMC1_D5        (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_SDMMC1_D6        (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_SDMMC1_D7        (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN7)
+
+#define GPIO_SDMMC2_CK        (GPIO_ALT|GPIO_AF11|GPIO_PORTD|GPIO_PIN6)
+#define GPIO_SDMMC2_CMD       (GPIO_ALT|GPIO_AF11|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN7)
+#define GPIO_SDMMC2_D0_1      (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_SDMMC2_D1_1      (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN15)
+#define GPIO_SDMMC2_D2_1      (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN3)
+#define GPIO_SDMMC2_D3_1      (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN4)
+#define GPIO_SDMMC2_D0_2      (GPIO_ALT|GPIO_AF11|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN9)
+#define GPIO_SDMMC2_D1_2      (GPIO_ALT|GPIO_AF11|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN10)
+#define GPIO_SDMMC2_D2_2      (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN11)
+#define GPIO_SDMMC2_D3_2      (GPIO_ALT|GPIO_AF11|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN12)
+#define GPIO_SDMMC2_D4        (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_SDMMC2_D5        (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_SDMMC2_D6        (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_SDMMC2_D7        (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN7)
+
+
+/* SPDIFRX */
+
+#define GPIO_SPDIFRX_IN0_1    (GPIO_ALT|GPIO_AF7|GPIO_PORTG|GPIO_PIN11)
+#define GPIO_SPDIFRX_IN0_2    (GPIO_ALT|GPIO_AF8|GPIO_PORTD|GPIO_PIN7)
+#define GPIO_SPDIFRX_IN1_1    (GPIO_ALT|GPIO_AF7|GPIO_PORTG|GPIO_PIN12)
+#define GPIO_SPDIFRX_IN1_2    (GPIO_ALT|GPIO_AF8|GPIO_PORTD|GPIO_PIN8)
+#define GPIO_SPDIFRX_IN2_1    (GPIO_ALT|GPIO_AF7|GPIO_PORTG|GPIO_PIN8)
+#define GPIO_SPDIFRX_IN2_2    (GPIO_ALT|GPIO_AF8|GPIO_PORTC|GPIO_PIN4)
+#define GPIO_SPDIFRX_IN3_1    (GPIO_ALT|GPIO_AF7|GPIO_PORTG|GPIO_PIN9)
+#define GPIO_SPDIFRX_IN3_2    (GPIO_ALT|GPIO_AF8|GPIO_PORTC|GPIO_PIN5)
+
+/* SPI */
+
+#define GPIO_SPI1_MISO_1      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_SPI1_MISO_2      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN4)
+#define GPIO_SPI1_MISO_3      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTG|GPIO_PIN9)
+#define GPIO_SPI1_MOSI_1      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_SPI1_MOSI_2      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_SPI1_MOSI_3      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTD|GPIO_PIN7)
+#define GPIO_SPI1_NSS_1       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN15)
+#define GPIO_SPI1_NSS_2       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_SPI1_NSS_3       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTG|GPIO_PIN10)
+#define GPIO_SPI1_SCK_1       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_SPI1_SCK_2       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN3)
+#define GPIO_SPI1_SCK_3       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTG|GPIO_PIN11)
+
+#define GPIO_SPI2_MISO_1      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_SPI2_MISO_2      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN2)
+#define GPIO_SPI2_MISO_3      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTI|GPIO_PIN2)
+#define GPIO_SPI2_MOSI_1      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN15)
+#define GPIO_SPI2_MOSI_2      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN3)
+#define GPIO_SPI2_MOSI_3      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTI|GPIO_PIN3)
+#define GPIO_SPI2_NSS_1       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN12)
+#define GPIO_SPI2_NSS_2       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_SPI2_NSS_3       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTI|GPIO_PIN0)
+#define GPIO_SPI2_NSS_4       (GPIO_ALT|GPIO_AF7|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN4)
+#define GPIO_SPI2_NSS_5       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_SPI2_SCK_1       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN9)
+#define GPIO_SPI2_SCK_2       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_SPI2_SCK_3       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN13)
+#define GPIO_SPI2_SCK_4       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTD|GPIO_PIN3)
+#define GPIO_SPI2_SCK_5       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTI|GPIO_PIN1)
+#define GPIO_SPI2_SCK_6       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN12)
+
+#define GPIO_SPI3_MISO_1      (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN4)
+#define GPIO_SPI3_MISO_2      (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN11)
+#define GPIO_SPI3_MOSI_1      (GPIO_ALT|GPIO_AF7|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN2)
+#define GPIO_SPI3_MOSI_2      (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_SPI3_MOSI_3      (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN12)
+#define GPIO_SPI3_MOSI_4      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTD|GPIO_PIN6)
+#define GPIO_SPI3_NSS_1       (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN15)
+#define GPIO_SPI3_NSS_2       (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_SPI3_SCK_1       (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN3)
+#define GPIO_SPI3_SCK_2       (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN10)
+
+#define GPIO_SPI4_MISO_1      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN5)
+#define GPIO_SPI4_MISO_2      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN13)
+#define GPIO_SPI4_MOSI_1      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN6)
+#define GPIO_SPI4_MOSI_2      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN14)
+#define GPIO_SPI4_NSS_1       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN4)
+#define GPIO_SPI4_NSS_2       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN11)
+#define GPIO_SPI4_SCK_1       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN2)
+#define GPIO_SPI4_SCK_2       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN12)
+
+#define GPIO_SPI5_MISO_1      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTF|GPIO_PIN8)
+#define GPIO_SPI5_MISO_2      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTH|GPIO_PIN7)
+#define GPIO_SPI5_MOSI_1      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTF|GPIO_PIN9)
+#define GPIO_SPI5_MOSI_2      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTF|GPIO_PIN11)
+#define GPIO_SPI5_NSS_1       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTF|GPIO_PIN6)
+#define GPIO_SPI5_NSS_2       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTH|GPIO_PIN5)
+#define GPIO_SPI5_SCK_1       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTF|GPIO_PIN7)
+#define GPIO_SPI5_SCK_2       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTH|GPIO_PIN6)
+
+#define GPIO_SPI6_MISO_1      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTG|GPIO_PIN12)
+#define GPIO_SPI6_MOSI_1      (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTG|GPIO_PIN14)
+#define GPIO_SPI6_NSS_1       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTG|GPIO_PIN8)
+#define GPIO_SPI6_SCK_1       (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTG|GPIO_PIN13)
+#define GPIO_SPI6_MISO_2      (GPIO_ALT|GPIO_AF8|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_SPI6_MOSI_2      (GPIO_ALT|GPIO_AF8|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_SPI6_NSS_2       (GPIO_ALT|GPIO_AF8|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_SPI6_SCK_2       (GPIO_ALT|GPIO_AF8|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_SPI6_MISO_3      (GPIO_ALT|GPIO_AF8|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN4)
+#define GPIO_SPI6_MOSI_3      (GPIO_ALT|GPIO_AF8|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_SPI6_NSS_3       (GPIO_ALT|GPIO_AF7|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN15)
+#define GPIO_SPI6_SCK_3       (GPIO_ALT|GPIO_AF8|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN3)
+
+/* Timers */
+
+#define GPIO_TIM1_BKIN_1      (GPIO_ALT|GPIO_AF1|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_TIM1_BKIN_2      (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN12)
+#define GPIO_TIM1_BKIN_3      (GPIO_ALT|GPIO_AF1|GPIO_PORTE|GPIO_PIN15)
+#define GPIO_TIM1_BKIN2       (GPIO_ALT|GPIO_AF1|GPIO_PORTE|GPIO_PIN6)
+#define GPIO_TIM1_CH1N_1      (GPIO_ALT|GPIO_AF1|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_TIM1_CH1N_2      (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN13)
+#define GPIO_TIM1_CH1N_3      (GPIO_ALT|GPIO_AF1|GPIO_PORTE|GPIO_PIN8)
+#define GPIO_TIM1_CH1IN_1     (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN8)
+#define GPIO_TIM1_CH1IN_2     (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN9)
+#define GPIO_TIM1_CH1OUT_1    (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8)
+#define GPIO_TIM1_CH1OUT_2    (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN9)
+#define GPIO_TIM1_CH1N_1      (GPIO_ALT|GPIO_AF1|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_TIM1_CH1N_2      (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN13)
+#define GPIO_TIM1_CH1N_3      (GPIO_ALT|GPIO_AF1|GPIO_PORTE|GPIO_PIN8)
+#define GPIO_TIM1_CH2IN_1     (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN9)
+#define GPIO_TIM1_CH2IN_2     (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN11)
+#define GPIO_TIM1_CH2OUT_1    (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN9)
+#define GPIO_TIM1_CH2OUT_2    (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN11)
+#define GPIO_TIM1_CH2N_1      (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_TIM1_CH2N_2      (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_TIM1_CH2N_3      (GPIO_ALT|GPIO_AF1|GPIO_PORTE|GPIO_PIN10)
+#define GPIO_TIM1_CH3IN_1     (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_TIM1_CH3IN_2     (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN13)
+#define GPIO_TIM1_CH3OUT_1    (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_TIM1_CH3OUT_2    (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN13)
+#define GPIO_TIM1_CH3N_1      (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_TIM1_CH3N_2      (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN15)
+#define GPIO_TIM1_CH3N_3      (GPIO_ALT|GPIO_AF1|GPIO_PORTE|GPIO_PIN12)
+#define GPIO_TIM1_CH4IN_1     (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_TIM1_CH4IN_2     (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN14)
+#define GPIO_TIM1_CH4OUT_1    (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_TIM1_CH4OUT_2    (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN14)
+#define GPIO_TIM1_ETR_1       (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN12)
+#define GPIO_TIM1_ETR_2       (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN7)
+
+#define GPIO_TIM2_CH1IN_1     (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_TIM2_CH1IN_2     (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN15)
+#define GPIO_TIM2_CH1IN_3     (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_TIM2_CH1OUT_1    (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_TIM2_CH1OUT_2    (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN15)
+#define GPIO_TIM2_CH1OUT_3    (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_TIM2_CH2IN_1     (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_TIM2_CH2IN_2     (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN3)
+#define GPIO_TIM2_CH2OUT_1    (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_TIM2_CH2OUT_2    (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN3)
+#define GPIO_TIM2_CH3IN_1     (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_TIM2_CH3IN_2     (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_TIM2_CH3OUT_1    (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_TIM2_CH3OUT_2    (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_TIM2_CH4IN_1     (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_TIM2_CH4IN_2     (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_TIM2_CH4OUT_1    (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_TIM2_CH4OUT_2    (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_TIM2_ETR_1       (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_TIM2_ETR_2       (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN15)
+#define GPIO_TIM2_ETR_3       (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN5)
+
+#define GPIO_TIM3_CH1IN_1     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_TIM3_CH1IN_2     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN4)
+#define GPIO_TIM3_CH1IN_3     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_TIM3_CH1OUT_1    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_TIM3_CH1OUT_2    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN4)
+#define GPIO_TIM3_CH1OUT_3    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_TIM3_CH2IN_1     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_TIM3_CH2IN_2     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_TIM3_CH2IN_3     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_TIM3_CH2OUT_1    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_TIM3_CH2OUT_2    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_TIM3_CH2OUT_3    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_TIM3_CH3IN_1     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_TIM3_CH3IN_2     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_TIM3_CH3OUT_1    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_TIM3_CH3OUT_2    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_TIM3_CH4IN_1     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_TIM3_CH4IN_2     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_TIM3_CH4OUT_1    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_TIM3_CH4OUT_2    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_TIM3_ETR         (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTD|GPIO_PIN2)
+
+#define GPIO_TIM4_CH1IN_1     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_TIM4_CH1IN_2     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTD|GPIO_PIN12)
+#define GPIO_TIM4_CH1OUT_1    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_TIM4_CH1OUT_2    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN12)
+#define GPIO_TIM4_CH2IN_1     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_TIM4_CH2IN_2     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTD|GPIO_PIN13)
+#define GPIO_TIM4_CH2OUT_1    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_TIM4_CH2OUT_2    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN13)
+#define GPIO_TIM4_CH3IN_1     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_TIM4_CH3IN_2     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTD|GPIO_PIN14)
+#define GPIO_TIM4_CH3OUT_1    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_TIM4_CH3OUT_2    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN14)
+#define GPIO_TIM4_CH4IN_1     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_TIM4_CH4IN_2     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTD|GPIO_PIN15)
+#define GPIO_TIM4_CH4OUT_1    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_TIM4_CH4OUT_2    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN15)
+#define GPIO_TIM4_ETR         (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN0)
+
+#define GPIO_TIM5_CH1IN_1     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_TIM5_CH1IN_2     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTH|GPIO_PIN10)
+#define GPIO_TIM5_CH1OUT_1    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_TIM5_CH1OUT_2    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN10)
+
+#define GPIO_TIM5_CH2IN_1     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_TIM5_CH2IN_2     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTH|GPIO_PIN11)
+#define GPIO_TIM5_CH2OUT_1    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_TIM5_CH2OUT_2    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN11)
+
+#define GPIO_TIM5_CH3IN_1     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_TIM5_CH3IN_2     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTH|GPIO_PIN12)
+#define GPIO_TIM5_CH3OUT_1    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_TIM5_CH3OUT_2    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN12)
+
+#define GPIO_TIM5_CH4IN_1     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_TIM5_CH4IN_2     (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTI|GPIO_PIN0)
+#define GPIO_TIM5_CH4OUT_1    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_TIM5_CH4OUT_2    (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN0)
+
+#define GPIO_TIM8_BKIN_1      (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_TIM8_BKIN_2      (GPIO_ALT|GPIO_AF3|GPIO_PORTI|GPIO_PIN4)
+#define GPIO_TIM8_BKIN2_1     (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN8)
+#define GPIO_TIM8_BKIN2_2     (GPIO_ALT|GPIO_AF3|GPIO_PORTI|GPIO_PIN1)
+#define GPIO_TIM8_CH1IN_1     (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_TIM8_CH1IN_2     (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTI|GPIO_PIN5)
+#define GPIO_TIM8_CH1OUT_1    (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_TIM8_CH1OUT_2    (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN5)
+#define GPIO_TIM8_CH1N_1      (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_TIM8_CH1N_2      (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_TIM8_CH1N_3      (GPIO_ALT|GPIO_AF3|GPIO_PORTH|GPIO_PIN13)
+#define GPIO_TIM8_CH2IN_1     (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_TIM8_CH2IN_2     (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTI|GPIO_PIN6)
+#define GPIO_TIM8_CH2OUT_1    (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_TIM8_CH2OUT_2    (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN6)
+#define GPIO_TIM8_CH2N_1      (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_TIM8_CH2N_2      (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_TIM8_CH2N_3      (GPIO_ALT|GPIO_AF3|GPIO_PORTH|GPIO_PIN14)
+#define GPIO_TIM8_CH3IN_1     (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_TIM8_CH3IN_2     (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTI|GPIO_PIN7)
+#define GPIO_TIM8_CH3OUT_1    (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_TIM8_CH3OUT_2    (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN7)
+#define GPIO_TIM8_CH3N_1      (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_TIM8_CH3N_2      (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN15)
+#define GPIO_TIM8_CH3N_3      (GPIO_ALT|GPIO_AF3|GPIO_PORTH|GPIO_PIN15)
+#define GPIO_TIM8_CH4IN_1     (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_TIM8_CH4IN_2     (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTI|GPIO_PIN2)
+#define GPIO_TIM8_CH4OUT_1    (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_TIM8_CH4OUT_2    (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN2)
+#define GPIO_TIM8_ETR_1       (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_TIM8_ETR_2       (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTI|GPIO_PIN3)
+
+#define GPIO_TIM9_CH1IN_1     (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_TIM9_CH1IN_2     (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN5)
+#define GPIO_TIM9_CH1OUT_1    (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_TIM9_CH1OUT_2    (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN5)
+#define GPIO_TIM9_CH2IN_1     (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_TIM9_CH2IN_2     (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN6)
+#define GPIO_TIM9_CH2OUT_1    (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_TIM9_CH2OUT_2    (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN6)
+
+#define GPIO_TIM10_CH1IN_1    (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_TIM10_CH1IN_2    (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTF|GPIO_PIN6)
+#define GPIO_TIM10_CH1OUT_1   (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_TIM10_CH1OUT_2   (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN6)
+
+#define GPIO_TIM11_CH1IN_1    (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_TIM11_CH1IN_2    (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTF|GPIO_PIN7)
+#define GPIO_TIM11_CH1OUT_1   (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_TIM11_CH1OUT_2   (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN7)
+
+#define GPIO_TIM12_CH1IN_1    (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_TIM12_CH1IN_2    (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTH|GPIO_PIN6)
+#define GPIO_TIM12_CH1OUT_1   (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_TIM12_CH1OUT_2   (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN6)
+
+#define GPIO_TIM12_CH2IN_1    (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN15)
+#define GPIO_TIM12_CH2IN_2    (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTH|GPIO_PIN9)
+#define GPIO_TIM12_CH2OUT_1   (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN15)
+#define GPIO_TIM12_CH2OUT_2   (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN9)
+
+#define GPIO_TIM13_CH1IN_1    (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_TIM13_CH1IN_2    (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTF|GPIO_PIN8)
+#define GPIO_TIM13_CH1OUT_1   (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_TIM13_CH1OUT_2   (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN8)
+
+#define GPIO_TIM14_CH1IN_1    (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_TIM14_CH1IN_2    (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTF|GPIO_PIN9)
+#define GPIO_TIM14_CH1OUT_1   (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_TIM14_CH1OUT_2   (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN9)
+
+/* Trace */
+
+#define GPIO_TRACECLK         (GPIO_ALT|GPIO_AF0|GPIO_PORTE|GPIO_PIN2)
+#define GPIO_TRACED0_1        (GPIO_ALT|GPIO_AF0|GPIO_PORTC|GPIO_PIN1)
+#define GPIO_TRACED0_2        (GPIO_ALT|GPIO_AF0|GPIO_PORTE|GPIO_PIN3)
+#define GPIO_TRACED0_3        (GPIO_ALT|GPIO_AF0|GPIO_PORTG|GPIO_PIN13)
+#define GPIO_TRACED1_1        (GPIO_ALT|GPIO_AF0|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_TRACED1_2        (GPIO_ALT|GPIO_AF0|GPIO_PORTE|GPIO_PIN4)
+#define GPIO_TRACED1_3        (GPIO_ALT|GPIO_AF0|GPIO_PORTG|GPIO_PIN14)
+#define GPIO_TRACED2_1        (GPIO_ALT|GPIO_AF0|GPIO_PORTD|GPIO_PIN2)
+#define GPIO_TRACED2_2        (GPIO_ALT|GPIO_AF0|GPIO_PORTE|GPIO_PIN5)
+#define GPIO_TRACED3_1        (GPIO_ALT|GPIO_AF0|GPIO_PORTC|GPIO_PIN12)
+#define GPIO_TRACED3_2        (GPIO_ALT|GPIO_AF0|GPIO_PORTE|GPIO_PIN6)
+#define GPIO_TRACESWO         (GPIO_ALT|GPIO_AF0|GPIO_PORTB|GPIO_PIN3)
+
+/* UARTs/USARTs */
+
+#define GPIO_USART1_CK        (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN8)
+#define GPIO_USART1_CTS       (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_USART1_RTS       (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN12)
+#define GPIO_USART1_RX_1      (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_USART1_RX_2      (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_USART1_RX_3      (GPIO_ALT|GPIO_AF4|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN15)
+#define GPIO_USART1_TX_1      (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN9)
+#define GPIO_USART1_TX_2      (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_USART1_TX_3      (GPIO_ALT|GPIO_AF4|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN14)
+
+#define GPIO_USART2_CK_1      (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN4)
+#define GPIO_USART2_CK_2      (GPIO_ALT|GPIO_AF7|GPIO_PORTD|GPIO_PIN7)
+#define GPIO_USART2_CTS_1     (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_USART2_CTS_2     (GPIO_ALT|GPIO_AF7|GPIO_PORTD|GPIO_PIN3)
+#define GPIO_USART2_RTS_1     (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_USART2_RTS_2     (GPIO_ALT|GPIO_AF7|GPIO_PORTD|GPIO_PIN4)
+#define GPIO_USART2_RX_1      (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_USART2_RX_2      (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN6)
+#define GPIO_USART2_TX_1      (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_USART2_TX_2      (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN5)
+
+#define GPIO_USART3_CK_1      (GPIO_ALT|GPIO_AF7|GPIO_PORTB|GPIO_PIN12)
+#define GPIO_USART3_CK_2      (GPIO_ALT|GPIO_AF7|GPIO_PORTC|GPIO_PIN12)
+#define GPIO_USART3_CK_3      (GPIO_ALT|GPIO_AF7|GPIO_PORTD|GPIO_PIN10)
+#define GPIO_USART3_CTS_1     (GPIO_ALT|GPIO_AF7|GPIO_PORTB|GPIO_PIN13)
+#define GPIO_USART3_CTS_2     (GPIO_ALT|GPIO_AF7|GPIO_PORTD|GPIO_PIN11)
+#define GPIO_USART3_RTS_1     (GPIO_ALT|GPIO_AF7|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_USART3_RTS_2     (GPIO_ALT|GPIO_AF7|GPIO_PORTD|GPIO_PIN12)
+#define GPIO_USART3_RX_1      (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_USART3_RX_2      (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN11)
+#define GPIO_USART3_RX_3      (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN9)
+#define GPIO_USART3_TX_1      (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_USART3_TX_2      (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN10)
+#define GPIO_USART3_TX_3      (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN8)
+
+#define GPIO_UART4_CTS_1      (GPIO_ALT|GPIO_AF8|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_UART4_CTS_2      (GPIO_ALT|GPIO_AF8|GPIO_PORTB|GPIO_PIN15)
+#define GPIO_UART4_RTS_1      (GPIO_ALT|GPIO_AF8|GPIO_PORTA|GPIO_PIN15)
+#define GPIO_UART4_RTS_2      (GPIO_ALT|GPIO_AF8|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_UART4_RX_1       (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_UART4_RX_2       (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN11)
+#define GPIO_UART4_RX_3       (GPIO_ALT|GPIO_AF6|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_UART4_RX_4       (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN0)
+#define GPIO_UART4_RX_5       (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN14)
+#define GPIO_UART4_RX_6       (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN9)
+#define GPIO_UART4_TX_1       (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_UART4_TX_2       (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN10)
+#define GPIO_UART4_TX_3       (GPIO_ALT|GPIO_AF6|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN12)
+#define GPIO_UART4_TX_4       (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN1)
+#define GPIO_UART4_TX_5       (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN13)
+
+#define GPIO_UART5_CTS_1      (GPIO_ALT|GPIO_AF7|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_UART5_RTS_1      (GPIO_ALT|GPIO_AF7|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_UART5_RX_1       (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN2)
+#define GPIO_UART5_TX_1       (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN12)
+#define GPIO_UART5_RX_2       (GPIO_ALT|GPIO_AF1|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_UART5_TX_2       (GPIO_ALT|GPIO_AF1|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_UART5_RX_3       (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN12)
+#define GPIO_UART5_TX_3       (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13)
+#define GPIO_UART5_RX_4       (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_UART5_TX_4       (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9)
+
+#define GPIO_USART6_CK_1      (GPIO_ALT|GPIO_AF8|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_USART6_CK_2      (GPIO_ALT|GPIO_AF8|GPIO_PORTG|GPIO_PIN7)
+#define GPIO_USART6_CTS_1     (GPIO_ALT|GPIO_AF8|GPIO_PORTG|GPIO_PIN13)
+#define GPIO_USART6_CTS_2     (GPIO_ALT|GPIO_AF8|GPIO_PORTG|GPIO_PIN15)
+#define GPIO_USART6_RTS_1     (GPIO_ALT|GPIO_AF8|GPIO_PORTG|GPIO_PIN12)
+#define GPIO_USART6_RTS_2     (GPIO_ALT|GPIO_AF8|GPIO_PORTG|GPIO_PIN8)
+#define GPIO_USART6_RX_1      (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_USART6_RX_2      (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN9)
+#define GPIO_USART6_TX_1      (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_USART6_TX_2      (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN14)
+
+#define GPIO_UART7_CTS_1      (GPIO_ALT|GPIO_AF8|GPIO_PORTE|GPIO_PIN10)
+#define GPIO_UART7_CTS_2      (GPIO_ALT|GPIO_AF8|GPIO_PORTF|GPIO_PIN9)
+#define GPIO_UART7_RTS_1      (GPIO_ALT|GPIO_AF8|GPIO_PORTE|GPIO_PIN9)
+#define GPIO_UART7_RTS_2      (GPIO_ALT|GPIO_AF8|GPIO_PORTF|GPIO_PIN8)
+#define GPIO_UART7_RX_1       (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN7)
+#define GPIO_UART7_RX_2       (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN6)
+#define GPIO_UART7_RX_3       (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8)
+#define GPIO_UART7_RX_4       (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN3)
+#define GPIO_UART7_TX_1       (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN8)
+#define GPIO_UART7_TX_2       (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN7)
+#define GPIO_UART7_TX_3       (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN15)
+#define GPIO_UART7_TX_4       (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN4)
+
+#define GPIO_UART8_CTS        (GPIO_ALT|GPIO_AF8|GPIO_PORTD|GPIO_PIN14)
+#define GPIO_UART8_RTS        (GPIO_ALT|GPIO_AF8|GPIO_PORTD|GPIO_PIN15)
+#define GPIO_UART8_RX         (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN0)
+#define GPIO_UART8_TX         (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN1)
+
+#endif /* CONFIG_STM32F7_STM32F76XX || CONFIG_STM32F7_STM32F77XX */
+#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F76XX77XX_PINMAP_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_pwr.h b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_pwr.h
new file mode 100644
index 0000000000000000000000000000000000000000..21f78951f94cb0a694f44e033f49de457206e76c
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_pwr.h
@@ -0,0 +1,159 @@
+/************************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32f76xx77xx_pwr.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XX_PWR_H
+#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XX_PWR_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#if defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F76XX)
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Register Offsets *****************************************************************/
+
+#define STM32_PWR_CR1_OFFSET    0x0000  /* Power control register 1 */
+#define STM32_PWR_CSR1_OFFSET   0x0004  /* Power control/status register 1 */
+#define STM32_PWR_CR2_OFFSET    0x0008  /* Power control register 1 */
+#define STM32_PWR_CSR2_OFFSET   0x000c  /* Power control/status register 1 */
+
+/* Register Addresses ***************************************************************/
+
+#define STM32_PWR_CR1           (STM32_PWR_BASE+STM32_PWR_CR1_OFFSET)
+#define STM32_PWR_CSR1          (STM32_PWR_BASE+STM32_PWR_CSR1_OFFSET)
+#define STM32_PWR_CR2           (STM32_PWR_BASE+STM32_PWR_CR2_OFFSET)
+#define STM32_PWR_CSR2          (STM32_PWR_BASE+STM32_PWR_CSR2_OFFSET)
+
+/* Register Bitfield Definitions ****************************************************/
+
+/* Power control register 1 */
+
+#define PWR_CR1_LPDS            (1 << 0)  /* Bit 0: Low-Power Deepsleep/sleep; low power run */
+#define PWR_CR1_PDDS            (1 << 1)  /* Bit 1: Power Down Deepsleep */
+#define PWR_CR1_CSBF            (1 << 3)  /* Bit 3: Clear Standby Flag */
+#define PWR_CR1_PVDE            (1 << 4)  /* Bit 4: Power Voltage Detector Enable */
+#define PWR_CR1_PLS_SHIFT       (5)       /* Bits 7-5: PVD Level Selection */
+#define PWR_CR1_PLS_MASK        (7 << PWR_CR1_PLS_SHIFT)
+#  define PWR_CR1_2p0V          (0 << PWR_CR1_PLS_SHIFT) /* 000: 2.0V */
+#  define PWR_CR1_2p1V          (1 << PWR_CR1_PLS_SHIFT) /* 001: 2.1V */
+#  define PWR_CR1_2p3V          (2 << PWR_CR1_PLS_SHIFT) /* 010: 2.3V */
+#  define PWR_CR1_2p5V          (3 << PWR_CR1_PLS_SHIFT) /* 011: 2.5V */
+#  define PWR_CR1_2p6V          (4 << PWR_CR1_PLS_SHIFT) /* 100: 2.6V */
+#  define PWR_CR1_2p7V          (5 << PWR_CR1_PLS_SHIFT) /* 101: 2.7V */
+#  define PWR_CR1_2p8V          (6 << PWR_CR1_PLS_SHIFT) /* 110: 2.8V */
+#  define PWR_CR1_2p9V          (7 << PWR_CR1_PLS_SHIFT) /* 111: 2.9V */
+#define PWR_CR1_DBP             (1 << 8)  /* Bit 8: Disable Backup Domain write protection */
+#define PWR_CR1_FPDS            (1 << 9)  /* Bit 9: Flash power down in Stop mode */
+#define PWR_CR1_LPUDS           (1 << 10) /* Bit 10: Low-power regulator in deepsleep under-drive mode */
+#define PWR_CR1_MRUDS           (1 << 11) /* Bit 11: Main regulator in deepsleep under-drive mode */
+#define PWR_CR1_ADCDC1          (1 << 13) /* Bit 13: see AN4073 for details */
+#define PWR_CR1_VOS_SHIFT       (14)      /* Bits 14-15: Regulator voltage scaling output selection */
+#define PWR_CR1_VOS_MASK        (3 << PWR_CR1_VOS_SHIFT)
+#  define PWR_CR1_VOS_SCALE_3   (1 << PWR_CR1_VOS_SHIFT) /* Fmax = 144MHz */
+#  define PWR_CR1_VOS_SCALE_2   (2 << PWR_CR1_VOS_SHIFT) /* Fmax = 168/180MHz */
+#  define PWR_CR1_VOS_SCALE_1   (3 << PWR_CR1_VOS_SHIFT) /* Fmax = 180/216MHz */
+#define PWR_CR1_ODEN            (1 << 16) /* Bit 16: Over Drive enable */
+#define PWR_CR1_ODSWEN          (1 << 17) /* Bit 17: Over Drive switch enabled */
+#define PWR_CR1_UDEN_SHIFT      (18)      /* Bits 18-19: Under-drive enable in stop mode */
+#define PWR_CR1_UDEN_MASK       (3 << PWR_CR1_UDEN_SHIFT)
+#  define PWR_CR1_UDEN_DISABLE  (0 << PWR_CR1_UDEN_SHIFT) /* Under-drive disable */
+#  define PWR_CR1_UDEN_ENABLE   (3 << PWR_CR1_UDEN_SHIFT) /* Under-drive enable */
+
+/* Power control/status register 1 */
+
+#define PWR_CSR1_WUIF           (1 << 0)  /* Bit 0:  Wakeup internal flag */
+#define PWR_CSR1_SBF            (1 << 1)  /* Bit 1:  Standby flag */
+#define PWR_CSR1_PVDO           (1 << 2)  /* Bit 2:  PVD Output */
+#define PWR_CSR1_BRR            (1 << 3)  /* Bit 3:  Backup regulator ready */
+#define PWR_CSR1_BRE            (1 << 9)  /* Bit 9:  Backup regulator enable */
+#define PWR_CSR1_VOSRDY         (1 << 14) /* Bit 14: Regulator voltage scaling output selection ready bite */
+#define PWR_CSR1_ODRDY          (1 << 16) /* Bit 16: Over Drive generator ready */
+#define PWR_CSR1_ODSWRDY        (1 << 17) /* Bit 17: Over Drive Switch ready */
+#define PWR_CSR1_UDSRDY_SHIFT   (18)      /* Bits 18-19: Under-drive ready flag */
+#define PWR_CSR1_UDSRDY_MASK    (3 << PWR_CSR1_UDSRDY_SHIFT)
+#  define PWR_CSR1_UDSRDY_DISAB (0 << PWR_CSR1_UDSRDY_SHIFT) /* Under-drive is disabled */
+#  define PWR_CSR1_UDSRDY_STOP  (3 << PWR_CSR1_UDSRDY_SHIFT) /* Under-drive mode is activated in Stop mode */
+
+/* Power control register 2 */
+
+#define PWR_CR2_CWUPF1           (1 << 0)  /* Bit 0:  Clear Wakeup Pin flag for PA0 */
+#define PWR_CR2_CWUPF2           (1 << 1)  /* Bit 1:  Clear Wakeup Pin flag for PA2 */
+#define PWR_CR2_CWUPF3           (1 << 2)  /* Bit 2:  Clear Wakeup Pin flag for PC1 */
+#define PWR_CR2_CWUPF4           (1 << 3)  /* Bit 3:  Clear Wakeup Pin flag for PC13 */
+#define PWR_CR2_CWUPF5           (1 << 4)  /* Bit 4:  Clear Wakeup Pin flag for PI8 */
+#define PWR_CR2_CWUPF6           (1 << 5)  /* Bit 5:  Clear Wakeup Pin flag for PI11 */
+#define PWR_CR2_WUPP1            (1 << 8)  /* Bit 8:  Wakeup pin polarity bit for PA0 */
+#  define PWR_CR2_WUPP1_RISING   (0 << 8)  /*         0=Detection on rising edge */
+#  define PWR_CR2_WUPP1_FALLING  (1 << 8)  /*         1= Detection on falling edge */
+#define PWR_CR2_WUPP2            (1 << 9)  /* Bit 9:  Wakeup pin polarity bit for PA2 */
+#  define PWR_CR2_WUPP2_RISING   (0 << 9)  /*         0=Detection on rising edge */
+#  define PWR_CR2_WUPP2_FALLING  (1 << 9)  /*         1= Detection on falling edge */
+#define PWR_CR2_WUPP3            (1 << 10) /* Bit 10: Wakeup pin polarity bit for PC1 */
+#  define PWR_CR2_WUPP3_RISING   (0 << 10) /*         0=Detection on rising edge */
+#  define PWR_CR2_WUPP3_FALLING  (1 << 10) /*         1= Detection on falling edge */
+#define PWR_CR2_WUPP4            (1 << 11) /* Bit 11: Wakeup pin polarity bit for PC13 */
+#  define PWR_CR2_WUPP4_RISING   (0 << 11) /*         0=Detection on rising edge */
+#  define PWR_CR2_WUPP4_FALLING  (1 << 11) /*         1= Detection on falling edge */
+#define PWR_CR2_WUPP5            (1 << 12) /* Bit 12: Wakeup pin polarity bit for PI8 */
+#  define PWR_CR2_WUPP5_RISING   (0 << 12) /*         0=Detection on rising edge */
+#  define PWR_CR2_WUPP5_FALLING  (1 << 12) /*         1= Detection on falling edge */
+#define PWR_CR2_WUPP6            (1 << 13) /* Bits 13: Wakeup pin polarity bit for PI11 */
+#  define PWR_CR2_WUPP6_RISING   (0 << 13) /*         0=Detection on rising edge */
+#  define PWR_CR2_WUPP6_FALLING  (1 << 13) /*         1= Detection on falling edge */
+
+/* Power control/status register 2 */
+
+#define PWR_CSR2_WUPF1           (1 << 0)  /* Bit 0:  Wakeup Pin flag for PA0 */
+#define PWR_CSR2_WUPF2           (1 << 1)  /* Bit 1:  Wakeup Pin flag for PA2 */
+#define PWR_CSR2_WUPF3           (1 << 2)  /* Bit 2:  Wakeup Pin flag for PC1 */
+#define PWR_CSR2_WUPF4           (1 << 3)  /* Bit 3:  Wakeup Pin flag for PC13 */
+#define PWR_CSR2_WUPF5           (1 << 4)  /* Bit 4:  Wakeup Pin flag for PI8 */
+#define PWR_CSR2_WUPF6           (1 << 5)  /* Bit 5:  Wakeup Pin flag for PI11 */
+#define PWR_CSR2_EWUP1           (1 << 8)  /* Bit 8:  Enable wakeup pin for PA0 */
+#define PWR_CSR2_EWUP2           (1 << 9)  /* Bit 9:  Enable wakeup pin for PA2 */
+#define PWR_CSR2_EWUP3           (1 << 10) /* Bit 10: Enable wakeup pin for PC1 */
+#define PWR_CSR2_EWUP4           (1 << 11) /* Bit 11: Enable wakeup pin for PC13 */
+#define PWR_CSR2_EWUP5           (1 << 12) /* Bit 12: Enable wakeup pin for PI8 */
+#define PWR_CSR2_EWUP6           (1 << 13) /* Bit 13: Enable wakeup pin for PI11 */
+
+#endif /* CONFIG_STM32F7_STM32F76XX || CONFIG_STM32F7_STM32F77XX */
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XX_PWR_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_rcc.h b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_rcc.h
new file mode 100644
index 0000000000000000000000000000000000000000..6c8a78406819e4283b71395aab59f579498e140b
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_rcc.h
@@ -0,0 +1,737 @@
+/****************************************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32f74xx75xx_rcc.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32F76XX77XX_RCC_H
+#define __ARCH_ARM_SRC_STM32_CHIP_STM32F76XX77XX_RCC_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include 
+
+#if defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+/* Register Offsets *********************************************************************************/
+
+#define STM32_RCC_CR_OFFSET          0x0000  /* Clock control register */
+#define STM32_RCC_PLLCFG_OFFSET      0x0004  /* PLL configuration register */
+#define STM32_RCC_CFGR_OFFSET        0x0008  /* Clock configuration register */
+#define STM32_RCC_CIR_OFFSET         0x000c  /* Clock interrupt register */
+#define STM32_RCC_AHB1RSTR_OFFSET    0x0010  /* AHB1 peripheral reset register */
+#define STM32_RCC_AHB2RSTR_OFFSET    0x0014  /* AHB2 peripheral reset register */
+#define STM32_RCC_AHB3RSTR_OFFSET    0x0018  /* AHB3 peripheral reset register */
+#define STM32_RCC_APB1RSTR_OFFSET    0x0020  /* APB1 Peripheral reset register */
+#define STM32_RCC_APB2RSTR_OFFSET    0x0024  /* APB2 Peripheral reset register */
+#define STM32_RCC_AHB1ENR_OFFSET     0x0030  /* AHB1 Peripheral Clock enable register */
+#define STM32_RCC_AHB2ENR_OFFSET     0x0034  /* AHB2 Peripheral Clock enable register */
+#define STM32_RCC_AHB3ENR_OFFSET     0x0038  /* AHB3 Peripheral Clock enable register */
+#define STM32_RCC_APB1ENR_OFFSET     0x0040  /* APB1 Peripheral Clock enable register */
+#define STM32_RCC_APB2ENR_OFFSET     0x0044  /* APB2 Peripheral Clock enable register */
+#define STM32_RCC_AHB1LPENR_OFFSET   0x0050  /* RCC AHB1 low power mode peripheral clock enable register */
+#define STM32_RCC_AHB2LPENR_OFFSET   0x0054  /* RCC AHB2 low power mode peripheral clock enable register */
+#define STM32_RCC_AHB3LPENR_OFFSET   0x0058  /* RCC AHB3 low power mode peripheral clock enable register */
+#define STM32_RCC_APB1LPENR_OFFSET   0x0060  /* RCC APB1 low power mode peripheral clock enable register */
+#define STM32_RCC_APB2LPENR_OFFSET   0x0064  /* RCC APB2 low power mode peripheral clock enable register */
+#define STM32_RCC_BDCR_OFFSET        0x0070  /* Backup domain control register */
+#define STM32_RCC_CSR_OFFSET         0x0074  /* Control/status register */
+#define STM32_RCC_SSCGR_OFFSET       0x0080  /* Spread spectrum clock generation register */
+#define STM32_RCC_PLLI2SCFGR_OFFSET  0x0084  /* PLLI2S configuration register */
+#define STM32_RCC_PLLSAICFGR_OFFSET  0x0088  /* PLLSAI configuration register */
+#define STM32_RCC_DCKCFGR1_OFFSET    0x008c  /* Dedicated clocks configuration register 1 */
+#define STM32_RCC_DCKCFGR2_OFFSET    0x0090  /* Dedicated clocks configuration register 2 */
+
+/* Register Addresses *******************************************************************************/
+
+#define STM32_RCC_CR                (STM32_RCC_BASE+STM32_RCC_CR_OFFSET)
+#define STM32_RCC_PLLCFG            (STM32_RCC_BASE+STM32_RCC_PLLCFG_OFFSET)
+#define STM32_RCC_CFGR              (STM32_RCC_BASE+STM32_RCC_CFGR_OFFSET)
+#define STM32_RCC_CIR               (STM32_RCC_BASE+STM32_RCC_CIR_OFFSET)
+#define STM32_RCC_AHB1RSTR          (STM32_RCC_BASE+STM32_RCC_AHB1RSTR_OFFSET)
+#define STM32_RCC_AHB2RSTR          (STM32_RCC_BASE+STM32_RCC_AHB2RSTR_OFFSET)
+#define STM32_RCC_AHB3RSTR          (STM32_RCC_BASE+STM32_RCC_AHB3RSTR_OFFSET)
+#define STM32_RCC_APB1RSTR          (STM32_RCC_BASE+STM32_RCC_APB1RSTR_OFFSET)
+#define STM32_RCC_APB2RSTR          (STM32_RCC_BASE+STM32_RCC_APB2RSTR_OFFSET)
+#define STM32_RCC_AHB1ENR           (STM32_RCC_BASE+STM32_RCC_AHB1ENR_OFFSET)
+#define STM32_RCC_AHB2ENR           (STM32_RCC_BASE+STM32_RCC_AHB2ENR_OFFSET)
+#define STM32_RCC_AHB3ENR           (STM32_RCC_BASE+STM32_RCC_AHB3ENR_OFFSET)
+#define STM32_RCC_APB1ENR           (STM32_RCC_BASE+STM32_RCC_APB1ENR_OFFSET)
+#define STM32_RCC_APB2ENR           (STM32_RCC_BASE+STM32_RCC_APB2ENR_OFFSET)
+#define STM32_RCC_AHB1LPENR         (STM32_RCC_BASE+STM32_RCC_AHB1LPENR_OFFSET)
+#define STM32_RCC_AHB2LPENR         (STM32_RCC_BASE+STM32_RCC_AHB2LPENR)
+#define STM32_RCC_AHB3LPENR         (STM32_RCC_BASE+STM32_RCC_AHB3LPENR_OFFSET)
+#define STM32_RCC_APB1LPENR         (STM32_RCC_BASE+STM32_RCC_APB1LPENR_OFFSET)
+#define STM32_RCC_APB2LPENR         (STM32_RCC_BASE+STM32_RCC_APB2LPENR_OFFSET)
+#define STM32_RCC_BDCR              (STM32_RCC_BASE+STM32_RCC_BDCR_OFFSET)
+#define STM32_RCC_CSR               (STM32_RCC_BASE+STM32_RCC_CSR_OFFSET)
+#define STM32_RCC_SSCGR             (STM32_RCC_BASE+STM32_RCC_SSCGR_OFFSET)
+#define STM32_RCC_PLLI2SCFGR        (STM32_RCC_BASE+STM32_RCC_PLLI2SCFGR_OFFSET)
+#define STM32_RCC_PLLSAICFGR        (STM32_RCC_BASE+STM32_RCC_PLLSAICFGR_OFFSET)
+#define STM32_RCC_DCKCFGR1          (STM32_RCC_BASE+STM32_RCC_DCKCFGR1_OFFSET)
+#define STM32_RCC_DCKCFGR2          (STM32_RCC_BASE+STM32_RCC_DCKCFGR2_OFFSET)
+
+/* Register Bitfield Definitions ********************************************************************/
+
+/* Clock control register */
+
+#define RCC_CR_HSION                 (1 << 0)  /* Bit 0: Internal High Speed clock enable */
+#define RCC_CR_HSIRDY                (1 << 1)  /* Bit 1: Internal High Speed clock ready flag */
+#define RCC_CR_HSITRIM_SHIFT         (3)       /* Bits 7-3: Internal High Speed clock trimming */
+#define RCC_CR_HSITRIM_MASK          (0x1f << RCC_CR_HSITRIM_SHIFT)
+#define RCC_CR_HSICAL_SHIFT          (8)       /* Bits 15-8: Internal High Speed clock Calibration */
+#define RCC_CR_HSICAL_MASK           (0xff << RCC_CR_HSICAL_SHIFT)
+#define RCC_CR_HSEON                 (1 << 16) /* Bit 16: External High Speed clock enable */
+#define RCC_CR_HSERDY                (1 << 17) /* Bit 17: External High Speed clock ready flag */
+#define RCC_CR_HSEBYP                (1 << 18) /* Bit 18: External High Speed clock Bypass */
+#define RCC_CR_CSSON                 (1 << 19) /* Bit 19: Clock Security System enable */
+#define RCC_CR_PLLON                 (1 << 24) /* Bit 24: PLL enable */
+#define RCC_CR_PLLRDY                (1 << 25) /* Bit 25: PLL clock ready flag */
+#define RCC_CR_PLLI2SON              (1 << 26) /* Bit 26: PLLI2S enable */
+#define RCC_CR_PLLI2SRDY             (1 << 27) /* Bit 27: PLLI2S clock ready flag */
+#define RCC_CR_PLLSAION              (1 << 28) /* Bit 28: PLLSAI enable */
+#define RCC_CR_PLLSAIRDY             (1 << 29) /* Bit 29: PLLSAI clock ready flag */
+
+/* PLL configuration register */
+
+#define RCC_PLLCFG_PLLM_SHIFT        (0)      /* Bits 0-5: Main PLL (PLL) and audio PLL (PLLI2S)
+                                               * input clock divider */
+#define RCC_PLLCFG_PLLM_MASK         (0x3f << RCC_PLLCFG_PLLM_SHIFT)
+#  define RCC_PLLCFG_PLLM(n)         ((n) << RCC_PLLCFG_PLLM_SHIFT) /* n = 2..63 */
+#define RCC_PLLCFG_PLLN_SHIFT        (6)      /* Bits 6-14: Main PLL (PLL) VCO multiplier */
+#define RCC_PLLCFG_PLLN_MASK         (0x1ff << RCC_PLLCFG_PLLN_SHIFT)
+#  define RCC_PLLCFG_PLLN(n)         ((n) << RCC_PLLCFG_PLLN_SHIFT) /* n = 2..432 */
+#define RCC_PLLCFG_PLLP_SHIFT        (16)      /* Bits 16-17: Main PLL (PLL) main system clock divider */
+#define RCC_PLLCFG_PLLP_MASK         (3 << RCC_PLLCFG_PLLP_SHIFT)
+#  define RCC_PLLCFG_PLLP(n)         ((((n)>>1)-1)<< RCC_PLLCFG_PLLP_SHIFT) /* n=2,4,6,8 */
+#  define RCC_PLLCFG_PLLP_2          (0 << RCC_PLLCFG_PLLP_SHIFT) /* 00: PLLP = 2 */
+#  define RCC_PLLCFG_PLLP_4          (1 << RCC_PLLCFG_PLLP_SHIFT) /* 01: PLLP = 4 */
+#  define RCC_PLLCFG_PLLP_6          (2 << RCC_PLLCFG_PLLP_SHIFT) /* 10: PLLP = 6 */
+#  define RCC_PLLCFG_PLLP_8          (3 << RCC_PLLCFG_PLLP_SHIFT) /* 11: PLLP = 8 */
+#define RCC_PLLCFG_PLLSRC            (1 << 22) /* Bit 22: Main PLL(PLL) and audio PLL (PLLI2S)
+                                                * entry clock source */
+#  define RCC_PLLCFG_PLLSRC_HSI      (0)
+#  define RCC_PLLCFG_PLLSRC_HSE      RCC_PLLCFG_PLLSRC
+#define RCC_PLLCFG_PLLQ_SHIFT        (24)      /* Bits 24-27: Main PLL (PLL) divider
+                                                * (USB OTG FS, SDIO and RNG clocks) */
+#define RCC_PLLCFG_PLLQ_MASK         (15 << RCC_PLLCFG_PLLQ_SHIFT)
+#  define RCC_PLLCFG_PLLQ(n)         ((n) << RCC_PLLCFG_PLLQ_SHIFT) /* n=2..15 */
+
+#define RCC_PLLCFG_PLLR_SHIFT        (28)      /* Bits 28-30: PLL division factor for DSI clock */
+#define RCC_PLLCFG_PLLR_MASK         (7 << RCC_PLLCFG_PLLR_SHIFT)
+#  define RCC_PLLCFG_PLLR(n)         ((n) << RCC_PLLCFG_PLLR_SHIFT) /* n=2..7 */
+
+#define RCC_PLLCFG_RESET             (0x24003010) /* PLLCFG reset value */
+
+/* Clock configuration register */
+
+#define RCC_CFGR_SW_SHIFT            (0)       /* Bits 0-1: System clock Switch */
+#define RCC_CFGR_SW_MASK             (3 << RCC_CFGR_SW_SHIFT)
+#  define RCC_CFGR_SW_HSI            (0 << RCC_CFGR_SW_SHIFT) /* 00: HSI selected as system clock */
+#  define RCC_CFGR_SW_HSE            (1 << RCC_CFGR_SW_SHIFT) /* 01: HSE selected as system clock */
+#  define RCC_CFGR_SW_PLL            (2 << RCC_CFGR_SW_SHIFT) /* 10: PLL selected as system clock */
+#define RCC_CFGR_SWS_SHIFT           (2)       /* Bits 2-3: System Clock Switch Status */
+#define RCC_CFGR_SWS_MASK            (3 << RCC_CFGR_SWS_SHIFT)
+#  define RCC_CFGR_SWS_HSI           (0 << RCC_CFGR_SWS_SHIFT) /* 00: HSI oscillator used as system clock */
+#  define RCC_CFGR_SWS_HSE           (1 << RCC_CFGR_SWS_SHIFT) /* 01: HSE oscillator used as system clock */
+#  define RCC_CFGR_SWS_PLL           (2 << RCC_CFGR_SWS_SHIFT) /* 10: PLL used as system clock */
+#define RCC_CFGR_HPRE_SHIFT          (4)       /* Bits 4-7: AHB prescaler */
+#define RCC_CFGR_HPRE_MASK           (0x0f << RCC_CFGR_HPRE_SHIFT)
+#  define RCC_CFGR_HPRE_SYSCLK       (0 << RCC_CFGR_HPRE_SHIFT) /* 0xxx: SYSCLK not divided */
+#  define RCC_CFGR_HPRE_SYSCLKd2     (8 << RCC_CFGR_HPRE_SHIFT) /* 1000: SYSCLK divided by 2 */
+#  define RCC_CFGR_HPRE_SYSCLKd4     (9 << RCC_CFGR_HPRE_SHIFT) /* 1001: SYSCLK divided by 4 */
+#  define RCC_CFGR_HPRE_SYSCLKd8     (10 << RCC_CFGR_HPRE_SHIFT) /* 1010: SYSCLK divided by 8 */
+#  define RCC_CFGR_HPRE_SYSCLKd16    (11 << RCC_CFGR_HPRE_SHIFT) /* 1011: SYSCLK divided by 16 */
+#  define RCC_CFGR_HPRE_SYSCLKd64    (12 << RCC_CFGR_HPRE_SHIFT) /* 1100: SYSCLK divided by 64 */
+#  define RCC_CFGR_HPRE_SYSCLKd128   (13 << RCC_CFGR_HPRE_SHIFT) /* 1101: SYSCLK divided by 128 */
+#  define RCC_CFGR_HPRE_SYSCLKd256   (14 << RCC_CFGR_HPRE_SHIFT) /* 1110: SYSCLK divided by 256 */
+#  define RCC_CFGR_HPRE_SYSCLKd512   (15 << RCC_CFGR_HPRE_SHIFT) /* 1111: SYSCLK divided by 512 */
+#define RCC_CFGR_PPRE1_SHIFT         (10)      /* Bits 10-12: APB Low speed prescaler  (APB1) */
+#define RCC_CFGR_PPRE1_MASK          (7 << RCC_CFGR_PPRE1_SHIFT)
+#  define RCC_CFGR_PPRE1_HCLK        (0 << RCC_CFGR_PPRE1_SHIFT) /* 0xx: HCLK not divided */
+#  define RCC_CFGR_PPRE1_HCLKd2      (4 << RCC_CFGR_PPRE1_SHIFT) /* 100: HCLK divided by 2 */
+#  define RCC_CFGR_PPRE1_HCLKd4      (5 << RCC_CFGR_PPRE1_SHIFT) /* 101: HCLK divided by 4 */
+#  define RCC_CFGR_PPRE1_HCLKd8      (6 << RCC_CFGR_PPRE1_SHIFT) /* 110: HCLK divided by 8 */
+#  define RCC_CFGR_PPRE1_HCLKd16     (7 << RCC_CFGR_PPRE1_SHIFT) /* 111: HCLK divided by 16 */
+#define RCC_CFGR_PPRE2_SHIFT         (13)      /* Bits 13-15: APB High speed prescaler (APB2) */
+#define RCC_CFGR_PPRE2_MASK          (7 << RCC_CFGR_PPRE2_SHIFT)
+#  define RCC_CFGR_PPRE2_HCLK        (0 << RCC_CFGR_PPRE2_SHIFT) /* 0xx: HCLK not divided */
+#  define RCC_CFGR_PPRE2_HCLKd2      (4 << RCC_CFGR_PPRE2_SHIFT) /* 100: HCLK divided by 2 */
+#  define RCC_CFGR_PPRE2_HCLKd4      (5 << RCC_CFGR_PPRE2_SHIFT) /* 101: HCLK divided by 4 */
+#  define RCC_CFGR_PPRE2_HCLKd8      (6 << RCC_CFGR_PPRE2_SHIFT) /* 110: HCLK divided by 8 */
+#  define RCC_CFGR_PPRE2_HCLKd16     (7 << RCC_CFGR_PPRE2_SHIFT) /* 111: HCLK divided by 16 */
+#define RCC_CFGR_RTCPRE_SHIFT        (16)      /* Bits 16-20: APB High speed prescaler (APB2) */
+#define RCC_CFGR_RTCPRE_MASK         (31 << RCC_CFGR_RTCPRE_SHIFT)
+#  define RCC_CFGR_RTCPRE(n)         ((n) << RCC_CFGR_RTCPRE_SHIFT) /* HSE/n, n=1..31 */
+#define RCC_CFGR_MCO1_SHIFT          (21)      /* Bits 21-22: Microcontroller Clock Output */
+#define RCC_CFGR_MCO1_MASK           (3 << RCC_CFGR_MCO1_SHIFT)
+#  define RCC_CFGR_MCO1_HSI          (0 << RCC_CFGR_MCO1_SHIFT) /* 00: HSI clock selected */
+#  define RCC_CFGR_MCO1_LSE          (1 << RCC_CFGR_MCO1_SHIFT) /* 01: LSE oscillator selected */
+#  define RCC_CFGR_MCO1_HSE          (2 << RCC_CFGR_MCO1_SHIFT) /* 10: HSE oscillator clock selected */
+#  define RCC_CFGR_MCO1_PLL          (3 << RCC_CFGR_MCO1_SHIFT) /* 11: PLL clock selected */
+#define RCC_CFGR_I2SSRC              (1 << 23) /* Bit 23: I2S clock selection */
+#define RCC_CFGR_MCO1PRE_SHIFT       (24)      /* Bits 24-26: MCO1 prescaler */
+#define RCC_CFGR_MCO1PRE_MASK        (7 << RCC_CFGR_MCO1PRE_SHIFT)
+#  define RCC_CFGR_MCO1PRE_NONE      (0 << RCC_CFGR_MCO1PRE_SHIFT) /* 0xx: no division */
+#  define RCC_CFGR_MCO1PRE_DIV2      (4 << RCC_CFGR_MCO1PRE_SHIFT) /* 100: division by 2 */
+#  define RCC_CFGR_MCO1PRE_DIV3      (5 << RCC_CFGR_MCO1PRE_SHIFT) /* 101: division by 3 */
+#  define RCC_CFGR_MCO1PRE_DIV4      (6 << RCC_CFGR_MCO1PRE_SHIFT) /* 110: division by 4 */
+#  define RCC_CFGR_MCO1PRE_DIV5      (7 << RCC_CFGR_MCO1PRE_SHIFT) /* 111: division by 5 */
+#define RCC_CFGR_MCO2PRE_SHIFT       (27)      /* Bits 27-29: MCO2 prescaler */
+#define RCC_CFGR_MCO2PRE_MASK        (7 << RCC_CFGR_MCO2PRE_SHIFT)
+#  define RCC_CFGR_MCO2PRE_NONE      (0 << RCC_CFGR_MCO2PRE_SHIFT) /* 0xx: no division */
+#  define RCC_CFGR_MCO2PRE_DIV2      (4 << RCC_CFGR_MCO2PRE_SHIFT) /* 100: division by 2 */
+#  define RCC_CFGR_MCO2PRE_DIV3      (5 << RCC_CFGR_MCO2PRE_SHIFT) /* 101: division by 3 */
+#  define RCC_CFGR_MCO2PRE_DIV4      (6 << RCC_CFGR_MCO2PRE_SHIFT) /* 110: division by 4 */
+#  define RCC_CFGR_MCO2PRE_DIV5      (7 << RCC_CFGR_MCO2PRE_SHIFT) /* 111: division by 5 */
+#define RCC_CFGR_MCO2_SHIFT          (30)      /* Bits 30-31: Microcontroller clock output 2 */
+#define RCC_CFGR_MCO2_MASK           (3 << RCC_CFGR_MCO2_SHIFT)
+#  define RCC_CFGR_MCO2_SYSCLK       (0 << RCC_CFGR_MCO2_SHIFT) /* 00: System clock  (SYSCLK) selected */
+#  define RCC_CFGR_MCO2_PLLI2S       (1 << RCC_CFGR_MCO2_SHIFT) /* 01: PLLI2S clock selected */
+#  define RCC_CFGR_MCO2_HSE          (2 << RCC_CFGR_MCO2_SHIFT) /* 10: HSE oscillator clock selected */
+#  define RCC_CFGR_MCO2_PLL          (3 << RCC_CFGR_MCO2_SHIFT) /* 11: PLL clock selected */
+
+/* Clock interrupt register */
+
+#define RCC_CIR_LSIRDYF              (1 << 0)  /* Bit 0: LSI Ready Interrupt flag */
+#define RCC_CIR_LSERDYF              (1 << 1)  /* Bit 1: LSE Ready Interrupt flag */
+#define RCC_CIR_HSIRDYF              (1 << 2)  /* Bit 2: HSI Ready Interrupt flag */
+#define RCC_CIR_HSERDYF              (1 << 3)  /* Bit 3: HSE Ready Interrupt flag */
+#define RCC_CIR_PLLRDYF              (1 << 4)  /* Bit 4: PLL Ready Interrupt flag */
+#define RCC_CIR_PLLI2SRDYF           (1 << 5)  /* Bit 5: PLLI2S Ready Interrupt flag */
+#define RCC_CIR_PLLSAIRDYF           (1 << 6)  /* Bit 6: PLLSAI Ready Interrupt flag */
+#define RCC_CIR_CSSF                 (1 << 7)  /* Bit 7: Clock Security System Interrupt flag */
+#define RCC_CIR_LSIRDYIE             (1 << 8)  /* Bit 8: LSI Ready Interrupt Enable */
+#define RCC_CIR_LSERDYIE             (1 << 9)  /* Bit 9: LSE Ready Interrupt Enable */
+#define RCC_CIR_HSIRDYIE             (1 << 10) /* Bit 10: HSI Ready Interrupt Enable */
+#define RCC_CIR_HSERDYIE             (1 << 11) /* Bit 11: HSE Ready Interrupt Enable */
+#define RCC_CIR_PLLRDYIE             (1 << 12) /* Bit 12: PLL Ready Interrupt Enable */
+#define RCC_CIR_PLLI2SRDYIE          (1 << 13) /* Bit 13: PLLI2S Ready Interrupt enable */
+#define RCC_CIR_PLLSAIRDYIE          (1 << 14) /* Bit 14: PLLSAI Ready Interrupt enable */
+#define RCC_CIR_LSIRDYC              (1 << 16) /* Bit 16: LSI Ready Interrupt Clear */
+#define RCC_CIR_LSERDYC              (1 << 17) /* Bit 17: LSE Ready Interrupt Clear */
+#define RCC_CIR_HSIRDYC              (1 << 18) /* Bit 18: HSI Ready Interrupt Clear */
+#define RCC_CIR_HSERDYC              (1 << 19) /* Bit 19: HSE Ready Interrupt Clear */
+#define RCC_CIR_PLLRDYC              (1 << 20) /* Bit 20: PLL Ready Interrupt Clear */
+#define RCC_CIR_PLLI2SRDYC           (1 << 21) /* Bit 21: PLLI2S Ready Interrupt clear */
+#define RCC_CIR_PLLSAIRDYC           (1 << 22) /* Bit 22: PLLSAI Ready Interrupt clear */
+#define RCC_CIR_CSSC                 (1 << 23) /* Bit 23: Clock Security System Interrupt Clear */
+
+/* AHB1 peripheral reset register */
+
+#define RCC_AHB1RSTR_GPIOARST        (1 << 0)  /* Bit 0:  IO port A reset */
+#define RCC_AHB1RSTR_GPIOBRST        (1 << 1)  /* Bit 1:  IO port B reset */
+#define RCC_AHB1RSTR_GPIOCRST        (1 << 2)  /* Bit 2:  IO port C reset */
+#define RCC_AHB1RSTR_GPIODRST        (1 << 3)  /* Bit 3:  IO port D reset */
+#define RCC_AHB1RSTR_GPIOERST        (1 << 4)  /* Bit 4:  IO port E reset */
+#define RCC_AHB1RSTR_GPIOFRST        (1 << 5)  /* Bit 5:  IO port F reset */
+#define RCC_AHB1RSTR_GPIOGRST        (1 << 6)  /* Bit 6:  IO port G reset */
+#define RCC_AHB1RSTR_GPIOHRST        (1 << 7)  /* Bit 7:  IO port H reset */
+#define RCC_AHB1RSTR_GPIOIRST        (1 << 8)  /* Bit 8:  IO port I reset */
+#define RCC_AHB1RSTR_GPIOJRST        (1 << 9)  /* Bit 9:  IO port J reset */
+#define RCC_AHB1RSTR_GPIOKRST        (1 << 10) /* Bit 10: IO port K reset */
+#define RCC_AHB1RSTR_CRCRST          (1 << 12) /* Bit 12  CRC reset */
+#define RCC_AHB1RSTR_DMA1RST         (1 << 21) /* Bit 21: DMA1 reset */
+#define RCC_AHB1RSTR_DMA2RST         (1 << 22) /* Bit 22: DMA2 reset */
+#define RCC_AHB1RSTR_DMA2DRST        (1 << 23) /* Bit 23: DMA2D reset */
+#define RCC_AHB1RSTR_ETHMACRST       (1 << 25) /* Bit 25: Ethernet MAC reset */
+#define RCC_AHB1RSTR_OTGHSRST        (1 << 29) /* Bit 29: USB OTG HS module reset */
+
+/* AHB2 peripheral reset register */
+
+#define RCC_AHB2RSTR_DCMIRST         (1 << 0)  /* Bit 0: Camera interface reset */
+#define RCC_AHB2RSTR_JPEGRST         (1 << 1)  /* Bit 1: Jpeg codec reset */
+#define RCC_AHB2RSTR_CRYPRST         (1 << 4)  /* Bit 4: Cryptographic module reset */
+#define RCC_AHB2RSTR_HASHRST         (1 << 5)  /* Bit 5: Hash module reset */
+#define RCC_AHB2RSTR_RNGRST          (1 << 6)  /* Bit 6: Random number generator module reset */
+#define RCC_AHB2RSTR_OTGFSRST        (1 << 7)  /* Bit 7: USB OTG FS module reset */
+
+/* AHB3 peripheral reset register */
+
+#define RCC_AHB3RSTR_FSMCRST         (1 << 0)  /* Bit 0: Flexible static memory controller module reset */
+#define RCC_AHB3RSTR_QSPIRST         (1 << 1)  /* Bit 1: Quad SPI memory controller reset */
+
+/* APB1 Peripheral reset register */
+
+#define RCC_APB1RSTR_TIM2RST         (1 << 0)  /* Bit 0:  TIM2 reset */
+#define RCC_APB1RSTR_TIM3RST         (1 << 1)  /* Bit 1:  TIM3 reset */
+#define RCC_APB1RSTR_TIM4RST         (1 << 2)  /* Bit 2:  TIM4 reset */
+#define RCC_APB1RSTR_TIM5RST         (1 << 3)  /* Bit 3:  TIM5 reset */
+#define RCC_APB1RSTR_TIM6RST         (1 << 4)  /* Bit 4:  TIM6 reset */
+#define RCC_APB1RSTR_TIM7RST         (1 << 5)  /* Bit 5:  TIM7 reset */
+#define RCC_APB1RSTR_TIM12RST        (1 << 6)  /* Bit 6:  TIM12 reset */
+#define RCC_APB1RSTR_TIM13RST        (1 << 7)  /* Bit 7:  TIM13 reset */
+#define RCC_APB1RSTR_TIM14RST        (1 << 8)  /* Bit 8:  TIM14 reset */
+#define RCC_APB1RSTR_LPTIM1RST       (1 << 9)  /* Bit 9:  LPTIM1 reset */
+#define RCC_APB1RSTR_WWDGRST         (1 << 11) /* Bit 11: Window watchdog reset */
+#define RCC_APB1RSTR_CAN3RST         (1 << 13) /* Bit 13: CAN3 reset */
+#define RCC_APB1RSTR_SPI2RST         (1 << 14) /* Bit 14: SPI 2 reset */
+#define RCC_APB1RSTR_SPI3RST         (1 << 15) /* Bit 15: SPI 3 reset */
+#define RCC_APB1RSTR_SPDIFRXRST      (1 << 16) /* Bit 16: SPDIFRX reset */
+#define RCC_APB1RSTR_USART2RST       (1 << 17) /* Bit 17: USART 2 reset */
+#define RCC_APB1RSTR_USART3RST       (1 << 18) /* Bit 18: USART 3 reset */
+#define RCC_APB1RSTR_UART4RST        (1 << 19) /* Bit 19: USART 4 reset */
+#define RCC_APB1RSTR_UART5RST        (1 << 20) /* Bit 20: USART 5 reset */
+#define RCC_APB1RSTR_I2C1RST         (1 << 21) /* Bit 21: I2C 1 reset */
+#define RCC_APB1RSTR_I2C2RST         (1 << 22) /* Bit 22: I2C 2 reset */
+#define RCC_APB1RSTR_I2C3RST         (1 << 23) /* Bit 23: I2C 3 reset */
+#define RCC_APB1RSTR_I2C4RST         (1 << 24) /* Bit 24: I2C 4 reset */
+#define RCC_APB1RSTR_CAN1RST         (1 << 25) /* Bit 25: CAN1 reset */
+#define RCC_APB1RSTR_CAN2RST         (1 << 26) /* Bit 26: CAN2 reset */
+#define RCC_APB1RSTR_CECRST          (1 << 27) /* Bit 27: CEC reset */
+#define RCC_APB1RSTR_PWRRST          (1 << 28) /* Bit 28: Power interface reset */
+#define RCC_APB1RSTR_DACRST          (1 << 29) /* Bit 29: DAC reset */
+#define RCC_APB1RSTR_UART7RST        (1 << 30) /* Bit 30: USART 7 reset */
+#define RCC_APB1RSTR_UART8RST        (1 << 31) /* Bit 31: USART 8 reset */
+
+/* APB2 Peripheral reset register */
+
+#define RCC_APB2RSTR_TIM1RST         (1 << 0)  /* Bit 0:  TIM1 reset */
+#define RCC_APB2RSTR_TIM8RST         (1 << 1)  /* Bit 1:  TIM8 reset */
+#define RCC_APB2RSTR_USART1RST       (1 << 4)  /* Bit 4:  USART1 reset */
+#define RCC_APB2RSTR_USART6RST       (1 << 5)  /* Bit 5:  USART6 reset */
+#define RCC_APB2RSTR_SDMMC2RST       (1 << 7)  /* Bit 7:  SDMMC2 reset */
+#define RCC_APB2RSTR_ADCRST          (1 << 8)  /* Bit 8:  ADC interface reset (common to all ADCs) */
+#define RCC_APB2RSTR_SDMMC1RST       (1 << 11) /* Bit 11: SDMMC1 reset */
+#define RCC_APB2RSTR_SPI1RST         (1 << 12) /* Bit 12: SPI1 reset */
+#define RCC_APB2RSTR_SPI4RST         (1 << 13) /* Bit 13: SPI4 reset */
+#define RCC_APB2RSTR_SYSCFGRST       (1 << 14) /* Bit 14: System configuration controller reset */
+#define RCC_APB2RSTR_TIM9RST         (1 << 16) /* Bit 16: TIM9 reset */
+#define RCC_APB2RSTR_TIM10RST        (1 << 17) /* Bit 17: TIM10 reset */
+#define RCC_APB2RSTR_TIM11RST        (1 << 18) /* Bit 18: TIM11 reset */
+#define RCC_APB2RSTR_SPI5RST         (1 << 20) /* Bit 20: SPI 5 reset */
+#define RCC_APB2RSTR_SPI6RST         (1 << 21) /* Bit 21: SPI 6 reset */
+#define RCC_APB2RSTR_SAI1RST         (1 << 22) /* Bit 22: SAI 1 reset */
+#define RCC_APB2RSTR_SAI2RST         (1 << 22) /* Bit 23: SAI 2 reset */
+#define RCC_APB2RSTR_LTDCRST         (1 << 26) /* Bit 26: LTDC reset */
+#define RCC_APB2RSTR_DSIRST          (1 << 27) /* Bit 27: DSI reset */
+#define RCC_APB2RSTR_DFSDM1RST       (1 << 29) /* Bit 29: DFSDM1 reset */
+#define RCC_APB2RSTR_MDIORST         (1 << 30) /* Bit 30: MDIO reset */
+
+/* AHB1 Peripheral Clock enable register */
+
+#define RCC_AHB1ENR_GPIOEN(n)        (1 << (n))
+#define RCC_AHB1ENR_GPIOAEN          (1 << 0)  /* Bit 0:  IO port A clock enable */
+#define RCC_AHB1ENR_GPIOBEN          (1 << 1)  /* Bit 1:  IO port B clock enable */
+#define RCC_AHB1ENR_GPIOCEN          (1 << 2)  /* Bit 2:  IO port C clock enable */
+#define RCC_AHB1ENR_GPIODEN          (1 << 3)  /* Bit 3:  IO port D clock enable */
+#define RCC_AHB1ENR_GPIOEEN          (1 << 4)  /* Bit 4:  IO port E clock enable */
+#define RCC_AHB1ENR_GPIOFEN          (1 << 5)  /* Bit 5:  IO port F clock enable */
+#define RCC_AHB1ENR_GPIOGEN          (1 << 6)  /* Bit 6:  IO port G clock enable */
+#define RCC_AHB1ENR_GPIOHEN          (1 << 7)  /* Bit 7:  IO port H clock enable */
+#define RCC_AHB1ENR_GPIOIEN          (1 << 8)  /* Bit 8:  IO port I clock enable */
+#define RCC_AHB1ENR_GPIOJEN          (1 << 9)  /* Bit 9:  IO port J clock enable */
+#define RCC_AHB1ENR_GPIOKEN          (1 << 10) /* Bit 10: IO port K clock enable */
+#define RCC_AHB1ENR_CRCEN            (1 << 12) /* Bit 12: CRC clock enable */
+#define RCC_AHB1ENR_BKPSRAMEN        (1 << 18) /* Bit 18: Backup SRAM interface clock enable */
+#define RCC_AHB1ENR_DTCMRAMEN        (1 << 20) /* Bit 20: DTCM RAM clock enable */
+#define RCC_AHB1ENR_DMA1EN           (1 << 21) /* Bit 21: DMA1 clock enable */
+#define RCC_AHB1ENR_DMA2EN           (1 << 22) /* Bit 22: DMA2 clock enable */
+#define RCC_AHB1ENR_DMA2DEN          (1 << 23) /* Bit 23: DMA2D clock enable */
+#define RCC_AHB1ENR_ETHMACEN         (1 << 25) /* Bit 25: Ethernet MAC clock enable */
+#define RCC_AHB1ENR_ETHMACTXEN       (1 << 26) /* Bit 26: Ethernet Transmission clock enable */
+#define RCC_AHB1ENR_ETHMACRXEN       (1 << 27) /* Bit 27: Ethernet Reception clock enable */
+#define RCC_AHB1ENR_ETHMACPTPEN      (1 << 28) /* Bit 28: Ethernet PTP clock enable */
+#define RCC_AHB1ENR_OTGHSEN          (1 << 29) /* Bit 29: USB OTG HS clock enable */
+#define RCC_AHB1ENR_OTGHSULPIEN      (1 << 30) /* Bit 30: USB OTG HSULPI clock enable */
+
+/* AHB2 Peripheral Clock enable register */
+
+#define RCC_AHB2ENR_DCMIEN           (1 << 0)  /* Bit 0: Camera interface enable */
+#define RCC_AHB2ENR_JPEGEN           (1 << 1)  /* Bit 1: Jpeg codec enable */
+#define RCC_AHB2ENR_CRYPEN           (1 << 4)  /* Bit 4: Cryptographic modules clock enable */
+#define RCC_AHB2ENR_HASHEN           (1 << 5)  /* Bit 5: Hash modules clock enable */
+#define RCC_AHB2ENR_RNGEN            (1 << 6)  /* Bit 6: Random number generator clock enable */
+#define RCC_AHB2ENR_OTGFSEN          (1 << 7)  /* Bit 7: USB OTG FS clock enable */
+
+/* AHB3 Peripheral Clock enable register */
+
+#define RCC_AHB3ENR_FSMCEN           (1 << 0) /* Bit 0: Flexible static memory controller module clock enable */
+#define RCC_AHB3ENR_QSPIEN           (1 << 1) /* Bit 1: Quad SPI memory controller clock enable */
+
+/* APB1 Peripheral Clock enable register */
+
+#define RCC_APB1ENR_TIM2EN           (1 << 0)  /* Bit 0:  TIM 2 clock enable */
+#define RCC_APB1ENR_TIM3EN           (1 << 1)  /* Bit 1:  TIM 3 clock enable */
+#define RCC_APB1ENR_TIM4EN           (1 << 2)  /* Bit 2:  TIM 4 clock enable */
+#define RCC_APB1ENR_TIM5EN           (1 << 3)  /* Bit 3:  TIM 5 clock enable */
+#define RCC_APB1ENR_TIM6EN           (1 << 4)  /* Bit 4:  TIM 6 clock enable */
+#define RCC_APB1ENR_TIM7EN           (1 << 5)  /* Bit 5:  TIM 7 clock enable */
+#define RCC_APB1ENR_TIM12EN          (1 << 6)  /* Bit 6:  TIM 12 clock enable */
+#define RCC_APB1ENR_TIM13EN          (1 << 7)  /* Bit 7:  TIM 13 clock enable */
+#define RCC_APB1ENR_TIM14EN          (1 << 8)  /* Bit 8:  TIM 14 clock enable */
+#define RCC_APB1ENR_LPTIM1EN         (1 << 9)  /* Bit 9:  LPTIM 1 clock enable */
+#define RCC_APB1ENR_WWDGEN           (1 << 11) /* Bit 11: Window watchdog clock enable */
+#define RCC_APB1ENR_CAN3EN           (1 << 13) /* Bit 13: CAN 3 clock enable */
+#define RCC_APB1ENR_SPI2EN           (1 << 14) /* Bit 14: SPI 2 clock enable */
+#define RCC_APB1ENR_SPI3EN           (1 << 15) /* Bit 15: SPI 3 clock enable */
+#define RCC_APB1ENR_SPDIFRXEN        (1 << 16) /* Bit 16: SPDIFRX clock enable */
+#define RCC_APB1ENR_USART2EN         (1 << 17) /* Bit 17: USART 2 clock enable */
+#define RCC_APB1ENR_USART3EN         (1 << 18) /* Bit 18: USART 3 clock enable */
+#define RCC_APB1ENR_UART4EN          (1 << 19) /* Bit 19: UART 4 clock enable */
+#define RCC_APB1ENR_UART5EN          (1 << 20) /* Bit 20: UART 5 clock enable */
+#define RCC_APB1ENR_I2C1EN           (1 << 21) /* Bit 21: I2C 1 clock enable */
+#define RCC_APB1ENR_I2C2EN           (1 << 22) /* Bit 22: I2C 2 clock enable */
+#define RCC_APB1ENR_I2C3EN           (1 << 23) /* Bit 23: I2C 3 clock enable */
+#define RCC_APB1ENR_I2C4EN           (1 << 24) /* Bit 24: I2C 4 clock enable */
+#define RCC_APB1ENR_CAN1EN           (1 << 25) /* Bit 25: CAN 1 clock enable */
+#define RCC_APB1ENR_CAN2EN           (1 << 26) /* Bit 26: CAN 2 clock enable */
+#define RCC_APB1ENR_CECEN            (1 << 27) /* Bit 27: CEC clock enable */
+#define RCC_APB1ENR_PWREN            (1 << 28) /* Bit 28: Power interface clock enable */
+#define RCC_APB1ENR_DACEN            (1 << 29) /* Bit 29: DAC interface clock enable */
+#define RCC_APB1ENR_UART7EN          (1 << 30) /* Bit 30: UART7 clock enable */
+#define RCC_APB1ENR_UART8EN          (1 << 31) /* Bit 31: UART8 clock enable */
+
+/* APB2 Peripheral Clock enable register */
+
+#define RCC_APB2ENR_TIM1EN           (1 << 0)  /* Bit 0:  TIM 1 clock enable */
+#define RCC_APB2ENR_TIM8EN           (1 << 1)  /* Bit 1:  TIM 8 clock enable */
+#define RCC_APB2ENR_USART1EN         (1 << 4)  /* Bit 4:  USART 1 clock enable */
+#define RCC_APB2ENR_USART6EN         (1 << 5)  /* Bit 5:  USART 6 clock enable */
+#define RCC_APB2ENR_SDMMC2EN         (1 << 7)  /* Bit 7:  SDMMC 2 clock enable */
+#define RCC_APB2ENR_ADC1EN           (1 << 8)  /* Bit 8:  ADC 1 clock enable */
+#define RCC_APB2ENR_ADC2EN           (1 << 9)  /* Bit 9:  ADC 2 clock enable */
+#define RCC_APB2ENR_ADC3EN           (1 << 10) /* Bit 10: ADC 3 clock enable */
+#define RCC_APB2ENR_SDMMC1EN         (1 << 11) /* Bit 11: SDMMC 1 clock enable */
+#define RCC_APB2ENR_SPI1EN           (1 << 12) /* Bit 12: SPI 1 clock enable */
+#define RCC_APB2ENR_SPI4EN           (1 << 13) /* Bit 13: SPI 4 clock enable */
+#define RCC_APB2ENR_SYSCFGEN         (1 << 14) /* Bit 14: System configuration controller clock enable */
+#define RCC_APB2ENR_TIM9EN           (1 << 16) /* Bit 16: TIM 9 clock enable */
+#define RCC_APB2ENR_TIM10EN          (1 << 17) /* Bit 17: TIM1 0 clock enable */
+#define RCC_APB2ENR_TIM11EN          (1 << 18) /* Bit 18: TIM  11 clock enable */
+#define RCC_APB2ENR_SPI5EN           (1 << 20) /* Bit 20: SPI 5 clock enable */
+#define RCC_APB2ENR_SPI6EN           (1 << 21) /* Bit 21: SPI 6 clock enable */
+#define RCC_APB2ENR_SAI1EN           (1 << 22) /* Bit 22: SAI 1 clock enable */
+#define RCC_APB2ENR_SAI2EN           (1 << 23) /* Bit 23: SAI 2 clock enable */
+#define RCC_APB2ENR_LTDCEN           (1 << 26) /* Bit 26: LTDC clock enable */
+#define RCC_APB2ENR_DSIEN            (1 << 27) /* Bit 27: DSI clock enable */
+#define RCC_APB2ENR_DFSDM1EN         (1 << 29) /* Bit 29: DFSDM1 clock enable */
+#define RCC_APB2ENR_MDIOEN           (1 << 30) /* Bit 30: MDIO clock enable */
+
+/* RCC AHB1 low power mode peripheral clock enable register */
+
+#define RCC_AHB1LPENR_GPIOLPEN(n)    (1 << (n))
+#define RCC_AHB1LPENR_GPIOALPEN      (1 << 0)  /* Bit 0:  IO port A clock enable during Sleep mode */
+#define RCC_AHB1LPENR_GPIOBLPEN      (1 << 1)  /* Bit 1:  IO port B clock enable during Sleep mode */
+#define RCC_AHB1LPENR_GPIOCLPEN      (1 << 2)  /* Bit 2:  IO port C clock enable during Sleep mode */
+#define RCC_AHB1LPENR_GPIODLPEN      (1 << 3)  /* Bit 3:  IO port D clock enable during Sleep mode */
+#define RCC_AHB1LPENR_GPIOELPEN      (1 << 4)  /* Bit 4:  IO port E clock enable during Sleep mode */
+#define RCC_AHB1LPENR_GPIOFLPEN      (1 << 5)  /* Bit 5:  IO port F clock enable during Sleep mode */
+#define RCC_AHB1LPENR_GPIOGLPEN      (1 << 6)  /* Bit 6:  IO port G clock enable during Sleep mode */
+#define RCC_AHB1LPENR_GPIOHLPEN      (1 << 7)  /* Bit 7:  IO port H clock enable during Sleep mode */
+#define RCC_AHB1LPENR_GPIOILPEN      (1 << 8)  /* Bit 8:  IO port I clock enable during Sleep mode */
+#define RCC_AHB1LPENR_GPIOJLPEN      (1 << 9)  /* Bit 8:  IO port J clock enable during Sleep mode */
+#define RCC_AHB1LPENR_GPIOKLPEN      (1 << 10) /* Bit 10: IO port K clock enable during Sleep mode */
+#define RCC_AHB1LPENR_CRCLPEN        (1 << 12) /* Bit 12: CRC clock enable during Sleep mode */
+#define RCC_AHB1LPENR_AXILPEN        (1 << 13) /* Bit 12: AXI to AHB bridge clock enable during Sleep mode */
+#define RCC_AHB1LPENR_FLITFLPEN      (1 << 15) /* Bit 15: Flash interface clock enable during Sleep mode */
+#define RCC_AHB1LPENR_SRAM1LPEN      (1 << 16) /* Bit 16: SRAM 1 interface clock enable during Sleep mode */
+#define RCC_AHB1LPENR_SRAM2LPEN      (1 << 17) /* Bit 17: SRAM 2 interface clock enable during Sleep mode */
+#define RCC_AHB1LPENR_BKPSRAMLPEN    (1 << 18) /* Bit 18: Backup SRAM interface clock enable during Sleep mode */
+#define RCC_AHB1LPENR_DTCMLPEN       (1 << 20) /* Bit 20: DTCM RAM clock enable during Sleep mode */
+#define RCC_AHB1LPENR_DMA1LPEN       (1 << 21) /* Bit 21: DMA1 clock enable during Sleep mode */
+#define RCC_AHB1LPENR_DMA2LPEN       (1 << 22) /* Bit 22: DMA2 clock enable during Sleep mode */
+#define RCC_AHB1LPENR_DMA2DLPEN      (1 << 23) /* Bit 23: DMA2D clock enable during Sleep mode */
+#define RCC_AHB1LPENR_ETHMACLPEN     (1 << 25) /* Bit 25: Ethernet MAC clock enable during Sleep mode */
+#define RCC_AHB1LPENR_ETHTXLPEN      (1 << 26) /* Bit 26: Ethernet Transmission clock enable during Sleep mode */
+#define RCC_AHB1LPENR_ETHRXLPEN      (1 << 27) /* Bit 27: Ethernet Reception clock enable during Sleep mode */
+
+#define RCC_AHB1LPENR_ETHPTPLPEN     (1 << 28) /* Bit 28: Ethernet PTP clock enable during Sleep mode */
+#define RCC_AHB1LPENR_OTGHSLPEN      (1 << 29) /* Bit 29: USB OTG HS clock enable during Sleep mode */
+#define RCC_AHB1LPENR_OTGHSULPILPEN  (1 << 30) /* Bit 30: USB OTG HSULPI clock enable during Sleep mode */
+
+/* RCC AHB2 low power mode peripheral clock enable register */
+
+#define RCC_AHB2LPENR_DCMILPEN       (1 << 0)  /* Bit 0: Camera interface enable during Sleep mode */
+#define RCC_AHB2LPENR_JPEGLPEN       (1 << 1)  /* Bit 1: Jpeg codec enable during Sleep mode */
+#define RCC_AHB2LPENR_CRYPLPEN       (1 << 4)  /* Bit 4: Cryptographic modules clock enable during Sleep mode */
+#define RCC_AHB2LPENR_HASHLPEN       (1 << 5)  /* Bit 5: Hash modules clock enable during Sleep mode */
+#define RCC_AHB2LPENR_RNGLPEN        (1 << 6)  /* Bit 6: Random number generator clock enable during Sleep mode */
+#define RCC_AHB2LPENR_OTGFLPSEN      (1 << 7)  /* Bit 7: USB OTG FS clock enable during Sleep mode */
+
+/* RCC AHB3 low power mode peripheral clock enable register */
+
+#define RCC_AHB3LPENR_FSMLPEN        (1 << 0) /* Bit 0: Flexible static memory controller module clock
+                                               *        enable during Sleep mode */
+#define RCC_AHB3LPENR_QSPILPEN       (1 << 1) /* Bit 1: Quad SPI memory controller clock
+                                               *        enable during Sleep mode */
+
+/* RCC APB1 low power mode peripheral clock enable register */
+
+#define RCC_APB1LPENR_TIM2LPEN       (1 << 0)  /* Bit 0:  TIM 2 clock enable during Sleep mode */
+#define RCC_APB1LPENR_TIM3LPEN       (1 << 1)  /* Bit 1:  TIM 3 clock enable during Sleep mode */
+#define RCC_APB1LPENR_TIM4LPEN       (1 << 2)  /* Bit 2:  TIM 4 clock enable during Sleep mode */
+#define RCC_APB1LPENR_TIM5LPEN       (1 << 3)  /* Bit 3:  TIM 5 clock enable during Sleep mode */
+#define RCC_APB1LPENR_TIM6LPEN       (1 << 4)  /* Bit 4:  TIM 6 clock enable during Sleep mode */
+#define RCC_APB1LPENR_TIM7LPEN       (1 << 5)  /* Bit 5:  TIM 7 clock enable during Sleep mode */
+#define RCC_APB1LPENR_TIM12LPEN      (1 << 6)  /* Bit 6:  TIM 12 clock enable during Sleep mode */
+#define RCC_APB1LPENR_TIM13LPEN      (1 << 7)  /* Bit 7:  TIM 13 clock enable during Sleep mode */
+#define RCC_APB1LPENR_TIM14LPEN      (1 << 8)  /* Bit 8:  TIM 14 clock enable during Sleep mode */
+#define RCC_APB1LPENR_LPTIM1LPEN     (1 << 9)  /* Bit 9:  LPTIM 1 clock enable during Sleep mode */
+#define RCC_APB1LPENR_WWDGLPEN       (1 << 11) /* Bit 11: Window watchdog clock enable during Sleep mode */
+#define RCC_APB1LPENR_SPI2LPEN       (1 << 14) /* Bit 14: SPI 2 clock enable during Sleep mode */
+#define RCC_APB1LPENR_SPI3LPEN       (1 << 15) /* Bit 15: SPI 3 clock enable during Sleep mode */
+#define RCC_APB1LPENR_SPDIFRXLPEN    (1 << 16) /* Bit 16: SPDIFRX clock enable during Sleep mode */
+#define RCC_APB1LPENR_USART2LPEN     (1 << 17) /* Bit 17: USART 2 clock enable during Sleep mode */
+#define RCC_APB1LPENR_USART3LPEN     (1 << 18) /* Bit 18: USART 3 clock enable during Sleep mode */
+#define RCC_APB1LPENR_UART4LPEN      (1 << 19) /* Bit 19: UART 4 clock enable during Sleep mode */
+#define RCC_APB1LPENR_UART5LPEN      (1 << 20) /* Bit 20: UART 5 clock enable during Sleep mode */
+#define RCC_APB1LPENR_I2C1LPEN       (1 << 21) /* Bit 21: I2C 1 clock enable during Sleep mode */
+#define RCC_APB1LPENR_I2C2LPEN       (1 << 22) /* Bit 22: I2C 2 clock enable during Sleep mode */
+#define RCC_APB1LPENR_I2C3LPEN       (1 << 23) /* Bit 23: I2C 3 clock enable during Sleep mode */
+#define RCC_APB1LPENR_I2C4LPEN       (1 << 24) /* Bit 24: I2C 4 clock enable during Sleep mode */
+#define RCC_APB1LPENR_CAN1LPEN       (1 << 25) /* Bit 25: CAN 1 clock enable during Sleep mode */
+#define RCC_APB1LPENR_CAN2LPEN       (1 << 26) /* Bit 26: CAN 2 clock enable during Sleep mode */
+#define RCC_APB1LPENR_CECLPEN        (1 << 27) /* Bit 27: CEC clock enable during Sleep mode */
+#define RCC_APB1LPENR_PWRLPEN        (1 << 28) /* Bit 28: Power interface clock enable during Sleep mode */
+#define RCC_APB1LPENR_DACLPEN        (1 << 29) /* Bit 29: DAC interface clock enable during Sleep mode */
+#define RCC_APB1LPENR_UART7LPEN      (1 << 30) /* Bit 30: UART 7 clock enable during Sleep mode */
+#define RCC_APB1LPENR_UART8LPEN      (1 << 31) /* Bit 31: UART 8 clock enable during Sleep mode */
+
+/* RCC APB2 low power mode peripheral clock enable register */
+
+#define RCC_APB2LPENR_TIM1LPEN       (1 << 0)  /* Bit 0:  TIM 1 clock enable during Sleep mode */
+#define RCC_APB2LPENR_TIM8LPEN       (1 << 1)  /* Bit 1:  TIM 8 clock enable during Sleep mode */
+#define RCC_APB2LPENR_USART1LPEN     (1 << 4)  /* Bit 4:  USART 1 clock enable during Sleep mode */
+#define RCC_APB2LPENR_USART6LPEN     (1 << 5)  /* Bit 5:  USART 6 clock enable during Sleep mode */
+#define RCC_APB2LPENR_SDMMC2LPEN     (1 << 7)  /* Bit 7:  SDMMC 2 clock enable during Sleep mode */
+#define RCC_APB2LPENR_ADC1LPEN       (1 << 8)  /* Bit 8:  ADC 1 clock enable during Sleep mode */
+#define RCC_APB2LPENR_ADC2LPEN       (1 << 9)  /* Bit 9:  ADC 2 clock enable during Sleep mode */
+#define RCC_APB2LPENR_ADC3LPEN       (1 << 10) /* Bit 10: ADC 3 clock enable during Sleep mode */
+#define RCC_APB2LPENR_SDMMC1LPEN     (1 << 11) /* Bit 11: SDMMC 1 clock enable during Sleep mode */
+#define RCC_APB2LPENR_SPI1LPEN       (1 << 12) /* Bit 12: SPI 1 clock enable during Sleep mode */
+#define RCC_APB2LPENR_SPI4LPEN       (1 << 13) /* Bit 13: SPI 4 clock enable during Sleep mode */
+#define RCC_APB2LPENR_SYSCFGLPEN     (1 << 14) /* Bit 14: System configuration controller clock enable during Sleep mode */
+#define RCC_APB2LPENR_TIM9LPEN       (1 << 16) /* Bit 16: TIM 9 clock enable during Sleep mode */
+#define RCC_APB2LPENR_TIM10LPEN      (1 << 17) /* Bit 17: TIM 10 clock enable during Sleep mode */
+#define RCC_APB2LPENR_TIM11LPEN      (1 << 18) /* Bit 18: TIM 11 clock enable during Sleep mode */
+#define RCC_APB2LPENR_SPI5LPEN       (1 << 20) /* Bit 20: SPI 5 clock enable during Sleep mode */
+#define RCC_APB2LPENR_SPI6LPEN       (1 << 21) /* Bit 21: SPI 6 clock enable during Sleep mode */
+#define RCC_APB2LPENR_SAI1LPEN       (1 << 22) /* Bit 22: SAI 1 clock enable during Sleep mode */
+#define RCC_APB2LPENR_SAI2LPEN       (1 << 23) /* Bit 23: SAI 2 clock enable during Sleep mode */
+#define RCC_APB2LPENR_LTDCLPEN       (1 << 26) /* Bit 26: LTDC clock enable during Sleep mode */
+#define RCC_APB2LPENR_DSILPEN        (1 << 27) /* Bit 27: DSI clock enable during Sleep mode */
+#define RCC_APB2LPENR_DFSDM1LPEN     (1 << 29) /* Bit 29: DFSDM1 clock enable during Sleep mode */
+#define RCC_APB2LPENR_MDIOLPEN       (1 << 30) /* Bit 30: MDIO clock enable during Sleep mode */
+
+/* Backup domain control register */
+
+#define RCC_BDCR_LSEON               (1 << 0)  /* Bit 0: External Low Speed oscillator enable */
+#define RCC_BDCR_LSERDY              (1 << 1)  /* Bit 1: External Low Speed oscillator Ready */
+#define RCC_BDCR_LSEBYP              (1 << 2)  /* Bit 2: External Low Speed oscillator Bypass */
+#define RCC_BDCR_RTCSEL_SHIFT        (8)       /* Bits 9:8: RTC clock source selection */
+#define RCC_BDCR_RTCSEL_MASK         (3 << RCC_BDCR_RTCSEL_SHIFT)
+#  define RCC_BDCR_RTCSEL_NOCLK      (0 << RCC_BDCR_RTCSEL_SHIFT) /* 00: No clock */
+#  define RCC_BDCR_RTCSEL_LSE        (1 << RCC_BDCR_RTCSEL_SHIFT) /* 01: LSE oscillator clock used as RTC clock */
+#  define RCC_BDCR_RTCSEL_LSI        (2 << RCC_BDCR_RTCSEL_SHIFT) /* 10: LSI oscillator clock used as RTC clock */
+#  define RCC_BDCR_RTCSEL_HSE        (3 << RCC_BDCR_RTCSEL_SHIFT) /* 11: HSE oscillator clock divided by 128 used as RTC clock */
+#define RCC_BDCR_RTCEN               (1 << 15) /* Bit 15: RTC clock enable */
+#define RCC_BDCR_BDRST               (1 << 16) /* Bit 16: Backup domain software reset */
+
+/* Control/status register */
+
+#define RCC_CSR_LSION                (1 << 0)  /* Bit 0: Internal Low Speed oscillator enable */
+#define RCC_CSR_LSIRDY               (1 << 1)  /* Bit 1: Internal Low Speed oscillator Ready */
+#define RCC_CSR_RMVF                 (1 << 24) /* Bit 24: Remove reset flag */
+#define RCC_CSR_BORRSTF              (1 << 25) /* Bit 25: BOR reset flag */
+#define RCC_CSR_PINRSTF              (1 << 26) /* Bit 26: PIN reset flag */
+#define RCC_CSR_PORRSTF              (1 << 27) /* Bit 27: POR/PDR reset flag */
+#define RCC_CSR_SFTRSTF              (1 << 28) /* Bit 28: Software Reset flag */
+#define RCC_CSR_IWDGRSTF             (1 << 29) /* Bit 29: Independent Watchdog reset flag */
+#define RCC_CSR_WWDGRSTF             (1 << 30) /* Bit 30: Window watchdog reset flag */
+#define RCC_CSR_LPWRRSTF             (1 << 31) /* Bit 31: Low-Power reset flag */
+
+/* Spread spectrum clock generation register */
+
+#define RCC_SSCGR_MODPER_SHIFT       (0)       /* Bit 0-12: Modulation period */
+#define RCC_SSCGR_MODPER_MASK        (0x1fff << RCC_SSCGR_MODPER_SHIFT)
+#  define RCC_SSCGR_MODPER(n)        ((n) << RCC_SSCGR_MODPER_SHIFT)
+#define RCC_SSCGR_INCSTEP_SHIFT      (13)      /* Bit 13-27: Incrementation step */
+#define RCC_SSCGR_INCSTEP_MASK       (0x7fff << RCC_SSCGR_INCSTEP_SHIFT)
+#  define RCC_SSCGR_INCSTEP(n)       ((n) << RCC_SSCGR_INCSTEP_SHIFT)
+#define RCC_SSCGR_SPREADSEL          (1 << 30) /* Bit 30: Spread Select */
+#define RCC_SSCGR_SSCGEN             (1 << 31) /* Bit 31: Spread spectrum modulation enable */
+
+/* PLLI2S configuration register */
+
+#define RCC_PLLI2SCFGR_PLLI2SN_SHIFT (6)       /* Bits 6-14: PLLI2S multiplication factor for VCO */
+#define RCC_PLLI2SCFGR_PLLI2SN_MASK  (0x1ff << RCC_PLLI2SCFGR_PLLI2SN_SHIFT)
+#  define RCC_PLLI2SCFGR_PLLI2SN(n)  ((uint32_t)(n) << RCC_PLLI2SCFGR_PLLI2SN_SHIFT)
+#define RCC_PLLI2SCFGR_PLLI2SP_SHIFT (16)      /* Bits 16-17: PLLI2S division factor for SPDIFRX clock */
+#define RCC_PLLI2SCFGR_PLLI2SP_MASK  (3 << RCC_PLLI2SCFGR_PLLI2SP_SHIFT)
+#  define RCC_PLLI2SCFGR_PLLI2SP(n)  ((((n)>>1)-1) << RCC_PLLI2SCFGR_PLLI2SP_SHIFT)
+#define RCC_PLLI2SCFGR_PLLI2SQ_SHIFT (24)      /* Bits 24-27: PLLI2S division factor for SAIs clock */
+#define RCC_PLLI2SCFGR_PLLI2SQ_MASK  (15 << RCC_PLLI2SCFGR_PLLI2SQ_SHIFT)
+#  define RCC_PLLI2SCFGR_PLLI2SQ(n)  ((uint32_t)(n) << RCC_PLLI2SCFGR_PLLI2SQ_SHIFT)
+#define RCC_PLLI2SCFGR_PLLI2SR_SHIFT (28)      /* Bits 28-30: PLLI2S division factor for I2S clocks */
+#define RCC_PLLI2SCFGR_PLLI2SR_MASK  (7 << RCC_PLLI2SCFGR_PLLI2SR_SHIFT)
+#  define RCC_PLLI2SCFGR_PLLI2SR(n)  ((uint32_t)(n) << RCC_PLLI2SCFGR_PLLI2SR_SHIFT)
+
+/* PLLSAI configuration register */
+
+#define RCC_PLLSAICFGR_PLLSAIN_SHIFT (6)       /* Bits 6-14: PLLSAI divider (N) for VCO */
+#define RCC_PLLSAICFGR_PLLSAIN_MASK  (0x1ff << RCC_PLLSAICFGR_PLLSAIN_SHIFT)
+#  define RCC_PLLSAICFGR_PLLSAIN(n)  ((n) << RCC_PLLSAICFGR_PLLSAIN_SHIFT)
+#define RCC_PLLSAICFGR_PLLSAIP_SHIFT (16)      /* Bits 16-17: PLLSAI division factor for 48MHz clock */
+#define RCC_PLLSAICFGR_PLLSAIP_MASK  (3 << RCC_PLLSAICFGR_PLLSAIP_SHIFT)
+#  define RCC_PLLSAICFGR_PLLSAIP(n)  ((((n)>>1)-1) << RCC_PLLSAICFGR_PLLSAIP_SHIFT)
+#define RCC_PLLSAICFGR_PLLSAIQ_SHIFT (24)      /* Bits 24-27: PLLSAI division factor for SAI clock */
+#define RCC_PLLSAICFGR_PLLSAIQ_MASK  (0x0F << RCC_PLLSAICFGR_PLLSAIQ_SHIFT)
+#  define RCC_PLLSAICFGR_PLLSAIQ(n)  ((n) << RCC_PLLSAICFGR_PLLSAIQ_SHIFT)
+#define RCC_PLLSAICFGR_PLLSAIR_SHIFT (28)      /* Bits 28-30: PLLSAI division factor for LCD clock */
+#define RCC_PLLSAICFGR_PLLSAIR_MASK  (7 << RCC_PLLSAICFGR_PLLSAIR_SHIFT)
+#  define RCC_PLLSAICFGR_PLLSAIR(n)  ((n) << RCC_PLLSAICFGR_PLLSAIR_SHIFT)
+
+/* Dedicated clocks configuration register 1 */
+
+#define RCC_DCKCFGR1_PLLI2SDIVQ_SHIFT (0)      /* Bits 0-4: PLLI2S division factor for I2S clock */
+#define RCC_DCKCFGR1_PLLI2SDIVQ_MASK  (0x1F << RCC_DCKCFGR1_PLLI2SDIVQ_SHIFT)
+#  define RCC_DCKCFGR1_PLLI2SDIVQ(n)  ((n) << RCC_DCKCFGR1_PLLI2SDIVQ_SHIFT)
+#define RCC_DCKCFGR1_PLLSAIDIVQ_SHIFT (8)      /* Bits 8-12: PLLSAI division factor for SAI clock */
+#define RCC_DCKCFGR1_PLLSAIDIVQ_MASK  (0x1F << RCC_DCKCFGR1_PLLSAIDIVQ_SHIFT)
+#  define RCC_DCKCFGR1_PLLSAIDIVQ(n)  ((n) << RCC_DCKCFGR1_PLLSAIDIVQ_SHIFT)
+
+#define RCC_DCKCFGR1_PLLSAIDIVR_SHIFT (16)     /* Bits 16-17: PLLSAI division factor for LCD_CLK clock */
+#define RCC_DCKCFGR1_PLLSAIDIVR_MASK  (0x3 << RCC_DCKCFGR1_PLLSAIDIVR_SHIFT)
+#  define RCC_DCKCFGR1_PLLSAIDIVR(n)  ((n) << RCC_DCKCFGR1_PLLSAIDIVR_SHIFT)
+
+#define RCC_DCKCFGR1_SAI1SEL_SHIFT   (20)      /* Bits 20-21: SAI 1 clock source selection */
+#define RCC_DCKCFGR1_SAI1SEL_MASK    (0x3 << RCC_DCKCFGR1_SAI1SEL_SHIFT)
+#  define RCC_DCKCFGR1_SAI1SEL(n)    ((n) << RCC_DCKCFGR1_SAI1SEL_SHIFT)
+
+#define RCC_DCKCFGR1_SAI2SEL_SHIFT   (22)      /* Bits 22-23: SAI 2 clock source selection */
+#define RCC_DCKCFGR1_SAI2SEL_MASK    (0x3 << RCC_DCKCFGR1_SAI2SEL_SHIFT)
+#  define RCC_DCKCFGR1_SAI2SEL(n)    ((n) << RCC_DCKCFGR1_SAI2SEL_SHIFT)
+#define RCC_DCKCFGR1_TIMPRESEL       (1 << 24) /* Bit 24: Timer clock prescaler selection */
+#define RCC_DCKCFGR1_DFSDM1SEL       (1 << 25) /* Bit 25: DFSDM1 clock prescaler selection */
+#define RCC_DCKCFGR1_ADFSDM1SEL      (1 << 26) /* Bit 26: DFSDM1 AUDIO clock prescaler selection */
+
+/* Dedicated clocks configuration register 2 */
+
+#define RCC_DCKCFGR2_USART1SEL_SHIFT    (0)    /* Bits 0-1: USART 1 clock source selection */
+#define RCC_DCKCFGR2_USART1SEL_MASK     (3 << RCC_DCKCFGR2_USART1SEL_SHIFT)
+#  define RCC_DCKCFGR2_USART1SEL_APB    (0 << RCC_DCKCFGR2_USART1SEL_SHIFT) /* APB2 clock (PCLK2) is selected as USART 1 clock */
+#  define RCC_DCKCFGR2_USART1SEL_SYSCLK (1 << RCC_DCKCFGR2_USART1SEL_SHIFT) /* System clock is selected as USART 1 clock */
+#  define RCC_DCKCFGR2_USART1SEL_HSI    (2 << RCC_DCKCFGR2_USART1SEL_SHIFT) /* HSI clock is selected as USART 1 clock */
+#  define RCC_DCKCFGR2_USART1SEL_LSE    (3 << RCC_DCKCFGR2_USART1SEL_SHIFT) /* LSE clock is selected as USART 1 clock */
+#define RCC_DCKCFGR2_USART2SEL_SHIFT    (2)    /* Bits 2-3: USART 2 clock source selection */
+#define RCC_DCKCFGR2_USART2SEL_MASK     (3 << RCC_DCKCFGR2_USART2SEL_SHIFT)
+#  define RCC_DCKCFGR2_USART2SEL_APB    (0 << RCC_DCKCFGR2_USART2SEL_SHIFT) /* APB1 clock (PCLK1) is selected as USART 2 clock */
+#  define RCC_DCKCFGR2_USART2SEL_SYSCLK (1 << RCC_DCKCFGR2_USART2SEL_SHIFT) /* System clock is selected as USART 2 clock */
+#  define RCC_DCKCFGR2_USART2SEL_HSI    (2 << RCC_DCKCFGR2_USART2SEL_SHIFT) /* HSI clock is selected as USART 2 clock */
+#  define RCC_DCKCFGR2_USART2SEL_LSE    (3 << RCC_DCKCFGR2_USART2SEL_SHIFT) /* LSE clock is selected as USART 2 clock */
+#define RCC_DCKCFGR2_UART4SEL_SHIFT     (6)    /* Bits 6-7: UART 4 clock source selection */
+#define RCC_DCKCFGR2_UART4SEL_MASK      (3 << RCC_DCKCFGR2_UART4SEL_SHIFT)
+#  define RCC_DCKCFGR2_UART4SEL_APB     (0 << RCC_DCKCFGR2_UART4SEL_SHIFT)  /* APB1 clock (PCLK1) is selected as UART 4 clock */
+#  define RCC_DCKCFGR2_UART4SEL_SYSCLK  (1 << RCC_DCKCFGR2_UART4SEL_SHIFT)  /* System clock is selected as UART 4 clock */
+#  define RCC_DCKCFGR2_UART4SEL_HSI     (2 << RCC_DCKCFGR2_UART4SEL_SHIFT)  /* HSI clock is selected as UART 4 clock */
+#  define RCC_DCKCFGR2_UART4SEL_LSE     (3 << RCC_DCKCFGR2_UART4SEL_SHIFT)  /* LSE clock is selected as UART 4 clock */
+#define RCC_DCKCFGR2_UART5SEL_SHIFT     (8)    /* Bits 8-9:  UART 5 clock source selection */
+#define RCC_DCKCFGR2_UART5SEL_MASK      (3 << RCC_DCKCFGR2_UART5SEL_SHIFT)
+#  define RCC_DCKCFGR2_UART5SEL_APB     (0 << RCC_DCKCFGR2_UART5SEL_SHIFT)  /* APB1 clock (PCLK1) is selected as UART 5 clock */
+#  define RCC_DCKCFGR2_UART5SEL_SYSCLK  (1 << RCC_DCKCFGR2_UART5SEL_SHIFT)  /* System clock is selected as UART 5 clock */
+#  define RCC_DCKCFGR2_UART5SEL_HSI     (2 << RCC_DCKCFGR2_UART5SEL_SHIFT)  /* HSI clock is selected as UART 5 clock */
+#  define RCC_DCKCFGR2_UART5SEL_LSE     (3 << RCC_DCKCFGR2_UART5SEL_SHIFT)  /* LSE clock is selected as UART 5 clock */
+#define RCC_DCKCFGR2_USART6SEL_SHIFT    (10)   /* Bits 10-11:  USART 6 clock source selection */
+#define RCC_DCKCFGR2_USART6SEL_MASK     (3 << RCC_DCKCFGR2_USART6SEL_SHIFT)
+#  define RCC_DCKCFGR2_USART6SEL_APB    (0 << RCC_DCKCFGR2_USART6SEL_SHIFT) /* APB2 clock (PCLK2) is selected as USART 6 clock */
+#  define RCC_DCKCFGR2_USART6SEL_SYSCLK (1 << RCC_DCKCFGR2_USART6SEL_SHIFT) /* System clock is selected as USART 6 clock */
+#  define RCC_DCKCFGR2_USART6SEL_HSI    (2 << RCC_DCKCFGR2_USART6SEL_SHIFT) /* HSI clock is selected as USART 6 clock */
+#  define RCC_DCKCFGR2_USART6SEL_LSE    (3 << RCC_DCKCFGR2_USART6SEL_SHIFT) /* LSE clock is selected as USART 6 clock */
+#define RCC_DCKCFGR2_UART7SEL_SHIFT     (12)   /* Bits 12-13:  UART 7 clock source selection */
+#define RCC_DCKCFGR2_UART7SEL_MASK      (3 << RCC_DCKCFGR2_UART7SEL_SHIFT)
+#  define RCC_DCKCFGR2_UART7SEL_APB     (0 << RCC_DCKCFGR2_UART7SEL_SHIFT)  /* APB1 clock (PCLK1) is selected as UART 7 clock */
+#  define RCC_DCKCFGR2_UART7SEL_SYSCLK  (1 << RCC_DCKCFGR2_UART7SEL_SHIFT)  /* System clock is selected as UART 7 clock */
+#  define RCC_DCKCFGR2_UART7SEL_HSI     (2 << RCC_DCKCFGR2_UART7SEL_SHIFT)  /* HSI clock is selected as UART 7 clock */
+#  define RCC_DCKCFGR2_UART7SEL_LSE     (3 << RCC_DCKCFGR2_UART7SEL_SHIFT)  /* LSE clock is selected as UART 7 clock */
+#define RCC_DCKCFGR2_UART8SEL_SHIFT     (14)   /* Bits 14-15: UART 8 clock source selection */
+#define RCC_DCKCFGR2_UART8SEL_MASK      (3 << RCC_DCKCFGR2_UART8SEL_SHIFT)
+#  define RCC_DCKCFGR2_UART8SEL_APB     (0 << RCC_DCKCFGR2_UART8SEL_SHIFT)  /* APB1 clock (PCLK1) is selected as UART 8 clock */
+#  define RCC_DCKCFGR2_UART8SEL_SYSCLK  (1 << RCC_DCKCFGR2_UART8SEL_SHIFT)  /* System clock is selected as UART 8 clock */
+#  define RCC_DCKCFGR2_UART8SEL_HSI     (2 << RCC_DCKCFGR2_UART8SEL_SHIFT)  /* HSI clock is selected as UART 8 clock */
+#  define RCC_DCKCFGR2_UART8SEL_LSE     (3 << RCC_DCKCFGR2_UART8SEL_SHIFT)  /* LSE clock is selected as UART 8 clock */
+#define RCC_DCKCFGR2_I2C1SEL_SHIFT      (16)   /* Bits 16-17: I2C1 clock source selection */
+#define RCC_DCKCFGR2_I2C1SEL_MASK       (3 << RCC_DCKCFGR2_I2C1SEL_SHIFT)
+#  define RCC_DCKCFGR2_I2C1SEL_APB      (0 << RCC_DCKCFGR2_I2C1SEL_SHIFT)   /* APB1 clock (PCLK1) is selected as I2C 1 clock */
+#  define RCC_DCKCFGR2_I2C1SEL_SYSCLK   (1 << RCC_DCKCFGR2_I2C1SEL_SHIFT)   /* System clock is selected as I2C 1 clock */
+#  define RCC_DCKCFGR2_I2C1SEL_HSI      (2 << RCC_DCKCFGR2_I2C1SEL_SHIFT)   /* HSI clock is selected as I2C 1 clock */
+#define RCC_DCKCFGR2_I2C2SEL_SHIFT      (18)   /* Bits 18-19: I2C2 clock source selection */
+#define RCC_DCKCFGR2_I2C2SEL_MASK       (3 << RCC_DCKCFGR2_I2C2SEL_SHIFT)
+#  define RCC_DCKCFGR2_I2C2SEL_APB      (0 << RCC_DCKCFGR2_I2C2SEL_SHIFT)   /* APB1 clock (PCLK1) is selected as I2C 2 clock */
+#  define RCC_DCKCFGR2_I2C2SEL_SYSCLK   (1 << RCC_DCKCFGR2_I2C2SEL_SHIFT)   /* System clock is selected as I2C 2 clock */
+#  define RCC_DCKCFGR2_I2C2SEL_HSI      (2 << RCC_DCKCFGR2_I2C2SEL_SHIFT)   /* HSI clock is selected as I2C 2 clock */
+#define RCC_DCKCFGR2_I2C3SEL_SHIFT      (20)   /* Bits 20-21: I2C3 clock source selection */
+#define RCC_DCKCFGR2_I2C3SEL_MASK       (3 << RCC_DCKCFGR2_I2C3SEL_SHIFT)
+#  define RCC_DCKCFGR2_I2C3SEL_APB      (0 << RCC_DCKCFGR2_I2C3SEL_SHIFT)   /* APB1 clock (PCLK1) is selected as I2C 3 clock */
+#  define RCC_DCKCFGR2_I2C3SEL_SYSCLK   (1 << RCC_DCKCFGR2_I2C3SEL_SHIFT)   /* System clock is selected as I2C 3 clock */
+#  define RCC_DCKCFGR2_I2C3SEL_HSI      (2 << RCC_DCKCFGR2_I2C3SEL_SHIFT)   /* HSI clock is selected as I2C 3 clock */
+#define RCC_DCKCFGR2_I2C4SEL_SHIFT      (22)   /* Bits 22-23: I2C4 clock source selection */
+#define RCC_DCKCFGR2_I2C4SEL_MASK       (3 << RCC_DCKCFGR2_I2C4SEL_SHIFT)
+#  define RCC_DCKCFGR2_I2C4SEL_APB      (0 << RCC_DCKCFGR2_I2C4SEL_SHIFT)   /* APB1 clock (PCLK1) is selected as I2C 4 clock */
+#  define RCC_DCKCFGR2_I2C4SEL_SYSCLK   (1 << RCC_DCKCFGR2_I2C4SEL_SHIFT)   /* System clock is selected as I2C 4 clock */
+#  define RCC_DCKCFGR2_I2C4SEL_HSI      (2 << RCC_DCKCFGR2_I2C4SEL_SHIFT)   /* HSI clock is selected as I2C 4 clock */
+#define RCC_DCKCFGR2_LPTIM1SEL_SHIFT    (24)   /* Bits 24-25: Low power timer 1 clock source selection */
+#define RCC_DCKCFGR2_LPTIM1SEL_MASK     (3 << RCC_DCKCFGR2_LPTIM1SEL_SHIFT)
+#  define RCC_DCKCFGR2_LPTIM1SEL_APB    (0 << RCC_DCKCFGR2_LPTIM1SEL_SHIFT) /* APB1 clock (PCLK1) is selected as LPTIM 1 clock */
+#  define RCC_DCKCFGR2_LPTIM1SEL_SYSCLK (1 << RCC_DCKCFGR2_LPTIM1SEL_SHIFT) /* System clock is selected as LPTIM 1 clock */
+#  define RCC_DCKCFGR2_LPTIM1SEL_HSI    (2 << RCC_DCKCFGR2_LPTIM1SEL_SHIFT) /* HSI clock is selected as LPTIM 1 clock */
+#  define RCC_DCKCFGR2_LPTIM1SEL_LSE    (3 << RCC_DCKCFGR2_LPTIM1SEL_SHIFT) /* LSE clock is selected as LPTIM 1 clock */
+#define RCC_DCKCFGR2_CECSEL_SHIFT       (26)   /* Bit 26: HDMI-CEC clock source selection */
+#define RCC_DCKCFGR2_CECSEL_MASK        (1 << RCC_DCKCFGR2_CECSEL_SHIFT)
+#  define RCC_DCKCFGR2_CECSEL_LSE       (0 << RCC_DCKCFGR2_CECSEL_SHIFT)    /* LSE clock is selected as HDMI-CEC clock */
+#  define RCC_DCKCFGR2_CECSEL_HSI       (1 << RCC_DCKCFGR2_CECSEL_SHIFT)    /* HSI clock is selected as HDMI-CEC clock */
+#define RCC_DCKCFGR2_CK48MSEL_SHIFT     (27)   /* Bit 27: 48MHz clock source selection */
+#define RCC_DCKCFGR2_CK48MSEL_MASK      (1 << RCC_DCKCFGR2_CK48MSEL_SHIFT)
+#  define RCC_DCKCFGR2_CK48MSEL_PLL     (0 << RCC_DCKCFGR2_CK48MSEL_SHIFT)  /* 48MHz clock from PLL is selected */
+#  define RCC_DCKCFGR2_CK48MSEL_PLLSAI  (1 << RCC_DCKCFGR2_CK48MSEL_SHIFT)  /*48MHz clock from PLLSAI is selected */
+#define RCC_DCKCFGR2_SDMMCSEL_SHIFT     (28)   /* Bit 28: SDMMC clock source selection */
+#define RCC_DCKCFGR2_SDMMCSEL_MASK      (1 << RCC_DCKCFGR2_SDMMCSEL_SHIFT)
+#  define RCC_DCKCFGR2_SDMMCSEL_48MHZ   (0 << RCC_DCKCFGR2_SDMMCSEL_SHIFT)  /* 48 MHz clock is selected as SDMMC clock */
+#  define RCC_DCKCFGR2_SDMMCSEL_SYSCLK  (1 << RCC_DCKCFGR2_SDMMCSEL_SHIFT)  /* System clock is selected as SDMMC clock */
+#define RCC_DCKCFGR2_SDMMC2SEL_SHIFT    (29)   /* Bit 29: SDMMC 2 clock source selection */
+#define RCC_DCKCFGR2_SDMMC2SEL_MASK     (1 << RCC_DCKCFGR2_SDMMC2SEL_SHIFT)
+#  define RCC_DCKCFGR2_SDMMC2SEL_48MHZ  (0 << RCC_DCKCFGR2_SDMMC2SEL_SHIFT)  /* 48 MHz clock is selected as SDMMC 2 clock */
+#  define RCC_DCKCFGR2_SDMMC2SEL_SYSCLK (1 << RCC_DCKCFGR2_SDMMC2SEL_SHIFT)  /* System clock is selected as SDMMC 2 clock */
+#define RCC_DCKCFGR2_DSISEL_SHIFT       (30)   /* Bit 30: DSI clock source selection */
+#define RCC_DCKCFGR2_DSISELL_MASK      (1 << RCC_DCKCFGR2_DSISEL_SHIFT)
+#  define RCC_DCKCFGR2_DSISEL_48MHZ      (0 << RCC_DCKCFGR2_DSISEL_SHIFT)  /* 48 MHz clock is selected as DSI clock */
+#  define RCC_DCKCFGR2_DSISEL_SYSCLK     (1 << RCC_DCKCFGR2_DSISEL_SHIFT)  /* System clock is selected as DSI clock */
+
+#endif /* CONFIG_STM32F7_STM32F76XX || CONFIG_STM32F7_STM32F77XX */
+#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F76XX77XX_RCC_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_syscfg.h b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_syscfg.h
new file mode 100644
index 0000000000000000000000000000000000000000..d3a469fe8a6179672e2da7d470e9fe8a38eeb0b8
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_syscfg.h
@@ -0,0 +1,180 @@
+/****************************************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32f76xx77xx_syscfg.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XX_SYSCFG_H
+#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XX_SYSCFG_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include 
+#include "chip.h"
+
+#if defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+/* Register Offsets *********************************************************************************/
+
+#define STM32_SYSCFG_MEMRMP_OFFSET    0x0000 /* SYSCFG memory remap register */
+#define STM32_SYSCFG_PMC_OFFSET       0x0004 /* SYSCFG peripheral mode configuration register */
+
+#define STM32_SYSCFG_EXTICR_OFFSET(p) (0x0008 + ((p) & 0x000c)) /* Registers are displaced by 4! */
+#define STM32_SYSCFG_EXTICR1_OFFSET   0x0008 /* SYSCFG external interrupt configuration register 1 */
+#define STM32_SYSCFG_EXTICR2_OFFSET   0x000c /* SYSCFG external interrupt configuration register 2 */
+#define STM32_SYSCFG_EXTICR3_OFFSET   0x0010 /* SYSCFG external interrupt configuration register 3 */
+#define STM32_SYSCFG_EXTICR4_OFFSET   0x0014 /* SYSCFG external interrupt configuration register 4 */
+
+#define STM32_SYSCFG_CBR_OFFSET       0x001c /* Class B register */
+#define STM32_SYSCFG_CMPCR_OFFSET     0x0020 /* Compensation cell control register */
+
+/* Register Addresses *******************************************************************************/
+
+#define STM32_SYSCFG_MEMRMP           (STM32_SYSCFG_BASE+STM32_SYSCFG_MEMRMP_OFFSET)
+#define STM32_SYSCFG_PMC              (STM32_SYSCFG_BASE+STM32_SYSCFG_PMC_OFFSET)
+
+#define STM32_SYSCFG_EXTICR(p)        (STM32_SYSCFG_BASE+STM32_SYSCFG_EXTICR_OFFSET(p))
+#define STM32_SYSCFG_EXTICR1          (STM32_SYSCFG_BASE+STM32_SYSCFG_EXTICR1_OFFSET)
+#define STM32_SYSCFG_EXTICR2          (STM32_SYSCFG_BASE+STM32_SYSCFG_EXTICR2_OFFSET)
+#define STM32_SYSCFG_EXTICR3          (STM32_SYSCFG_BASE+STM32_SYSCFG_EXTICR3_OFFSET)
+#define STM32_SYSCFG_EXTICR4          (STM32_SYSCFG_BASE+STM32_SYSCFG_EXTICR4_OFFSET)
+
+#define STM32_SYSCFG_CBR              (STM32_SYSCFG_BASE+STM32_SYSCFG_CBR_OFFSET)
+#define STM32_SYSCFG_CMPCR            (STM32_SYSCFG_BASE+STM32_SYSCFG_CMPCR_OFFSET)
+
+/* Register Bitfield Definitions ********************************************************************/
+
+/* SYSCFG memory remap register */
+
+#define SYSCFG_MEMRMP_MEMBOOT         (1 << 0)  /* Bit 0:  Memory boot mapping */
+#define SYSCFG_MEMRMP_MEMBOOT_ADD0    (0 << 0)  /*         0=BOOT_ADD0 defines */
+#define SYSCFG_MEMRMP_MEMBOOT_ADD1    (1 << 0)  /*         1=BOOT_ADD1 defines */
+#define SYSCFG_MEMRMP_SWP_FB          (1 << 8)  /* Bits 8: Flash Bank swap */
+#define SYSCFG_MEMRMP_SWP_FB_BNK1     (0 << 8)  /*         Flash Bank 1 mapped at 0x08000000
+                                                 *         Flash Bank 2 mapped at 0x08100000 */
+#define SYSCFG_MEMRMP_SWP_FB_BNK2     (1 << 8)  /*         Flash Bank 2 mapped at 0x08000000
+                                                 *         Flash Bank 1 mapped at 0x08100000 */
+#define SYSCFG_MEMRMP_SWPFMC_SHIFT    (10)      /* Bits 10-11: FMC memory mapping swap */
+#define SYSCFG_MEMRMP_SWPFMC_MASK     (3 << SYSCFG_MEMRMP_SWPFMC_SHIFT)
+#  define SYSCFG_MEMRMP_SWPFMC_NONE   (0 << SYSCFG_MEMRMP_SWPFMC_SHIFT) /* No FMC memory mapping swapping */
+#  define SYSCFG_MEMRMP_SWPFMC_NORRAM (1 << SYSCFG_MEMRMP_SWPFMC_SHIFT) /* NOR/RAM and SDRAM memory mapping swapped */
+
+/* SYSCFG peripheral mode configuration register */
+
+#define SYSCFG_PMC_I2C1_FMP           (1 << 0)  /* Bit 0: I2C1 Fast-mode Plus Enable */
+#define SYSCFG_PMC_I2C2_FMP           (1 << 1)  /* Bit 1: I2C2 Fast-mode Plus Enable */
+#define SYSCFG_PMC_I2C3_FMP           (1 << 2)  /* Bit 2: I2C3 Fast-mode Plus Enable */
+#define SYSCFG_PMC_I2C4_FMP           (1 << 3)  /* Bit 3: I2C4 Fast-mode Plus Enable */
+#define SYSCFG_PMC_PB6_FMP            (1 << 4)  /* Bit 4: PB6 IO pads Fast-mode Plus Enable */
+#define SYSCFG_PMC_PB7_FMP            (1 << 5)  /* Bit 5: PB7 IO pads Fast-mode Plus Enable */
+#define SYSCFG_PMC_PB8_FMP            (1 << 6)  /* Bit 6: PB8 IO pads Fast-mode Plus Enable */
+#define SYSCFG_PMC_PB9_FMP            (1 << 7)  /* Bit 7: PB9 IO pads Fast-mode Plus Enable */
+#define SYSCFG_PMC_ADC1DC2            (1 << 16) /* Bit 16: See AN4073 */
+#define SYSCFG_PMC_ADC2DC2            (1 << 17) /* Bit 17: See AN4073 */
+#define SYSCFG_PMC_ADC3DC2            (1 << 18) /* Bit 18: See AN4073 */
+#define SYSCFG_PMC_MII_RMII_SEL       (1 << 23) /* Bit 23: Ethernet PHY interface selection */
+#  define SYSCFG_PMC_MII_SEL          (0 << 23) /*         0 selects MII */
+#  define SYSCFG_PMC_RMII_SEL         (1 << 23) /*         1 selects RMII */
+
+/* SYSCFG external interrupt configuration register 1-4 */
+
+#define SYSCFG_EXTICR_PORTA           (0)       /* 0000: PA[x] pin */
+#define SYSCFG_EXTICR_PORTB           (1)       /* 0001: PB[x] pin */
+#define SYSCFG_EXTICR_PORTC           (2)       /* 0010: PC[x] pin */
+#define SYSCFG_EXTICR_PORTD           (3)       /* 0011: PD[x] pin */
+#define SYSCFG_EXTICR_PORTE           (4)       /* 0100: PE[x] pin */
+#define SYSCFG_EXTICR_PORTF           (5)       /* 0101: PF[C] pin */
+#define SYSCFG_EXTICR_PORTG           (6)       /* 0110: PG[x] pin */
+#define SYSCFG_EXTICR_PORTH           (7)       /* 0111: PH[x] pin */
+#define SYSCFG_EXTICR_PORTI           (8)       /* 1000: PI[x] pin */
+#define SYSCFG_EXTICR_PORTJ           (9)       /* 1001: PJ[x] pin */
+#define SYSCFG_EXTICR_PORTK           (10)      /* 1010: PK[x] pin */
+
+#define SYSCFG_EXTICR_PORT_MASK       (15)
+#define SYSCFG_EXTICR_EXTI_SHIFT(g)   (((g) & 3) << 2)
+#define SYSCFG_EXTICR_EXTI_MASK(g)    (SYSCFG_EXTICR_PORT_MASK << (SYSCFG_EXTICR_EXTI_SHIFT(g)))
+
+#define SYSCFG_EXTICR1_EXTI0_SHIFT    (0)       /* Bits 0-3: EXTI 0 coinfiguration */
+#define SYSCFG_EXTICR1_EXTI0_MASK     (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR1_EXTI0_SHIFT)
+#define SYSCFG_EXTICR1_EXTI1_SHIFT    (4)       /* Bits 4-7: EXTI 1 coinfiguration */
+#define SYSCFG_EXTICR1_EXTI1_MASK     (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR1_EXTI1_SHIFT)
+#define SYSCFG_EXTICR1_EXTI2_SHIFT    (8)       /* Bits 8-11: EXTI 2 coinfiguration */
+#define SYSCFG_EXTICR1_EXTI2_MASK     (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR1_EXTI2_SHIFT)
+#define SYSCFG_EXTICR1_EXTI3_SHIFT    (12)      /* Bits 12-15: EXTI 3 coinfiguration */
+#define SYSCFG_EXTICR1_EXTI3_MASK     (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR1_EXTI3_SHIFT)
+
+#define SYSCFG_EXTICR2_EXTI4_SHIFT    (0)       /* Bits 0-3: EXTI 4 coinfiguration */
+#define SYSCFG_EXTICR2_EXTI4_MASK     (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR2_EXTI4_SHIFT)
+#define SYSCFG_EXTICR2_EXTI5_SHIFT    (4)       /* Bits 4-7: EXTI 5 coinfiguration */
+#define SYSCFG_EXTICR2_EXTI5_MASK     (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR2_EXTI5_SHIFT)
+#define SYSCFG_EXTICR2_EXTI6_SHIFT    (8)       /* Bits 8-11: EXTI 6 coinfiguration */
+#define SYSCFG_EXTICR2_EXTI6_MASK     (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR2_EXTI6_SHIFT)
+#define SYSCFG_EXTICR2_EXTI7_SHIFT    (12)      /* Bits 12-15: EXTI 7 coinfiguration */
+#define SYSCFG_EXTICR2_EXTI7_MASK     (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR2_EXTI7_SHIFT)
+
+#define SYSCFG_EXTICR3_EXTI8_SHIFT    (0)       /* Bits 0-3: EXTI 8 coinfiguration */
+#define SYSCFG_EXTICR3_EXTI8_MASK     (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR3_EXTI8_SHIFT)
+#define SYSCFG_EXTICR3_EXTI9_SHIFT    (4)       /* Bits 4-7: EXTI 9 coinfiguration */
+#define SYSCFG_EXTICR3_EXTI9_MASK     (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR3_EXTI9_SHIFT)
+#define SYSCFG_EXTICR3_EXTI10_SHIFT   (8)       /* Bits 8-11: EXTI 10 coinfiguration */
+#define SYSCFG_EXTICR3_EXTI10_MASK    (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR3_EXTI10_SHIFT)
+#define SYSCFG_EXTICR3_EXTI11_SHIFT   (12)      /* Bits 12-15: EXTI 11 coinfiguration */
+#define SYSCFG_EXTICR3_EXTI11_MASK    (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR3_EXTI11_SHIFT)
+
+#define SYSCFG_EXTICR4_EXTI12_SHIFT   (0)       /* Bits 0-3: EXTI 12 coinfiguration */
+#define SYSCFG_EXTICR4_EXTI12_MASK    (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR4_EXTI12_SHIFT)
+#define SYSCFG_EXTICR4_EXTI13_SHIFT   (4)       /* Bits 4-7: EXTI 13 coinfiguration */
+#define SYSCFG_EXTICR4_EXTI13_MASK    (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR4_EXTI13_SHIFT)
+#define SYSCFG_EXTICR4_EXTI14_SHIFT   (8)       /* Bits 8-11: EXTI 14 coinfiguration */
+#define SYSCFG_EXTICR4_EXTI14_MASK    (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR4_EXTI14_SHIFT)
+#define SYSCFG_EXTICR4_EXTI15_SHIFT   (12)      /* Bits 12-15: EXTI 15 coinfiguration */
+#define SYSCFG_EXTICR4_EXTI15_MASK    (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR4_EXTI15_SHIFT)
+
+/* Class B register */
+
+#define SYSCFG_CBR_PVD              (1 << 0)  /* Bit 0: PVDL: PVD Lock */
+#define SYSCFG_CBR_CLL              (1 << 2)  /* Bit 2: CLL Core Lockup Lock*/
+
+/* Compensation cell control register */
+
+#define SYSCFG_CMPCR_CMPPD            (1 << 0)  /* Bit 0: Compensation cell power-down */
+#define SYSCFG_CMPCR_READY            (1 << 8)  /* Bit 8: Compensation cell ready flag */
+
+#endif /* CONFIG_STM32F7_STM32F76XX || CONFIG_STM32F7_STM32F77XX */
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XX_SYSCFG_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_tim.h b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_tim.h
new file mode 100644
index 0000000000000000000000000000000000000000..bb6a657aa8457f1088a582cdcf4ddad6fb3105b5
--- /dev/null
+++ b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_tim.h
@@ -0,0 +1,1147 @@
+/****************************************************************************************************
+ * arch/arm/src/stm32f7/chip/stm32f76xx77xx_tim.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XX_TIM_H
+#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XX_TIM_H
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+/* Register Offsets *********************************************************************************/
+
+/* Basic Timers - TIM6 and TIM7 */
+
+#define STM32_BTIM_CR1_OFFSET     0x0000  /* Control register 1 (16-bit) */
+#define STM32_BTIM_CR2_OFFSET     0x0004  /* Control register 2 (16-bit) */
+#define STM32_BTIM_DIER_OFFSET    0x000c  /* DMA/Interrupt enable register (16-bit) */
+#define STM32_BTIM_SR_OFFSET      0x0010  /* Status register (16-bit) */
+#define STM32_BTIM_EGR_OFFSET     0x0014  /* Event generation register (16-bit) */
+#define STM32_BTIM_CNT_OFFSET     0x0024  /* Counter (16-bit) */
+#define STM32_BTIM_PSC_OFFSET     0x0028  /* Prescaler (16-bit) */
+#define STM32_BTIM_ARR_OFFSET     0x002c  /* Auto-reload register (16-bit) */
+
+/* 16-/32-bit General Timers with DMA: TIM2, TM3, TIM4, and TIM5
+ * 16-bit General Timers without DMA: TIM9, TIM10, TIM11, TIM12, TIM13, and TIM14
+ * timers are 16-bit except for TIM2 and 5 are 32-bit
+ * timers TIM9 and 12 are different then  TIM10, TIM11, TIM13, and TIM14
+ */
+
+#define STM32_GTIM_CR1_OFFSET      0x0000  /* Control register 1 (16-bit) */
+#define STM32_GTIM_CR2_OFFSET      0x0004  /* Control register 2 (16-bit, TIM2, 5 only) */
+#define STM32_GTIM_SMCR_OFFSET     0x0008  /* Slave mode control register (32-bit, TIM2, 5, 9, 12 only) */
+#define STM32_GTIM_DIER_OFFSET     0x000c  /* DMA/Interrupt enable register (16-bit) */
+#define STM32_GTIM_SR_OFFSET       0x0010  /* Status register (16-bit) */
+#define STM32_GTIM_EGR_OFFSET      0x0014  /* Event generation register (16-bit) */
+#define STM32_GTIM_CCMR1_OFFSET    0x0018  /* Capture/compare mode register 1 (32-bit) */
+#define STM32_GTIM_CCMR2_OFFSET    0x001c  /* Capture/compare mode register 2 (32-bit on TIM2,5 only) */
+#define STM32_GTIM_CCER_OFFSET     0x0020  /* Capture/compare enable register (16-bit) */
+#define STM32_GTIM_CNT_OFFSET      0x0024  /* Counter (16 bit and 32-bit on TIM2, 5 only) */
+#define STM32_GTIM_PSC_OFFSET      0x0028  /* Prescaler (16-bit) */
+#define STM32_GTIM_ARR_OFFSET      0x002c  /* Auto-reload register (16 bit and 32-bit on TIM2, 5 only) */
+#define STM32_GTIM_CCR1_OFFSET     0x0034  /* Capture/compare register 1 (16-bit on all TIMx and 32-bit on TIM2,5 only) */
+#define STM32_GTIM_CCR2_OFFSET     0x0038  /* Capture/compare register 2 (16-bit TIM 3-4, 9, 12 and 32-bit on TIM2,5 only) */
+#define STM32_GTIM_CCR3_OFFSET     0x003c  /* Capture/compare register 3 (16-bit TIM 3-4 and 32-bit on TIM2,5 only) */
+#define STM32_GTIM_CCR4_OFFSET     0x0040  /* Capture/compare register 4 (16-bit TIM 3-4 and 32-bit on TIM2,5 only) */
+#define STM32_GTIM_DCR_OFFSET      0x0048  /* DMA control register (16-bit, TIM2-5 only) */
+#define STM32_GTIM_DMAR_OFFSET     0x004c  /* DMA address for burst mode (16-bit, TIM2-5 only) */
+#define STM32_GTIM_OR_OFFSET       0x0050  /* Timer 2/5/11 option register */
+
+/* Advanced Timers - TIM1 and TIM8 */
+
+#define STM32_ATIM_CR1_OFFSET      0x0000  /* Control register 1 (16-bit) */
+#define STM32_ATIM_CR2_OFFSET      0x0004  /* Control register 2 (32-bit*) */
+#define STM32_ATIM_SMCR_OFFSET     0x0008  /* Slave mode control register (32 -bit) */
+#define STM32_ATIM_DIER_OFFSET     0x000c  /* DMA/Interrupt enable register (16-bit) */
+#define STM32_ATIM_SR_OFFSET       0x0010  /* Status register (32-bit*) */
+#define STM32_ATIM_EGR_OFFSET      0x0014  /* Event generation register (16-bit) */
+#define STM32_ATIM_CCMR1_OFFSET    0x0018  /* Capture/compare mode register 1 (32-bit*) */
+#define STM32_ATIM_CCMR2_OFFSET    0x001c  /* Capture/compare mode register 2 (32-bit*) */
+#define STM32_ATIM_CCER_OFFSET     0x0020  /* Capture/compare enable register (32-bit*) */
+#define STM32_ATIM_CNT_OFFSET      0x0024  /* Counter (32-bit cnt in lower 16 bit ) */
+#define STM32_ATIM_PSC_OFFSET      0x0028  /* Prescaler (16-bit) */
+#define STM32_ATIM_ARR_OFFSET      0x002c  /* Auto-reload register (16-bit) */
+#define STM32_ATIM_RCR_OFFSET      0x0030  /* Repetition counter register (16-bit) */
+#define STM32_ATIM_CCR1_OFFSET     0x0034  /* Capture/compare register 1 (16-bit) */
+#define STM32_ATIM_CCR2_OFFSET     0x0038  /* Capture/compare register 2 (16-bit) */
+#define STM32_ATIM_CCR3_OFFSET     0x003c  /* Capture/compare register 3 (16-bit) */
+#define STM32_ATIM_CCR4_OFFSET     0x0040  /* Capture/compare register 4 (16-bit) */
+#define STM32_ATIM_BDTR_OFFSET     0x0044  /* Break and dead-time register (32-bit*) */
+#define STM32_ATIM_DCR_OFFSET      0x0048  /* DMA control register (16-bit) */
+#define STM32_ATIM_DMAR_OFFSET     0x004c  /* DMA address for burst mode (16-bit) */
+#define STM32_ATIM_CCMR3_OFFSET    0x0054  /* Capture/compare mode register 3 (32-bit) */
+#define STM32_ATIM_CCR5_OFFSET     0x0058  /* Capture/compare register 5 (32-bit) */
+#define STM32_ATIM_CCR6_OFFSET     0x005c  /* Capture/compare register 6 (16-bit) */
+#define STM32_ATIM_AF1_OFFSET      0x0060  /* Alternate function option register 1 (16-bit) */
+#define STM32_ATIM_AF2_OFFSET      0x0064  /* Alternate function option register 2 (16-bit) */
+
+/* Register Addresses *******************************************************************************/
+
+/* Advanced Timers - TIM1 and TIM8 */
+
+#if STM32F7_NATIM > 0
+#  define STM32_TIM1_CR1          (STM32_TIM1_BASE+STM32_ATIM_CR1_OFFSET)
+#  define STM32_TIM1_CR2          (STM32_TIM1_BASE+STM32_ATIM_CR2_OFFSET)
+#  define STM32_TIM1_SMCR         (STM32_TIM1_BASE+STM32_ATIM_SMCR_OFFSET)
+#  define STM32_TIM1_DIER         (STM32_TIM1_BASE+STM32_ATIM_DIER_OFFSET)
+#  define STM32_TIM1_SR           (STM32_TIM1_BASE+STM32_ATIM_SR_OFFSET)
+#  define STM32_TIM1_EGR          (STM32_TIM1_BASE+STM32_ATIM_EGR_OFFSET)
+#  define STM32_TIM1_CCMR1        (STM32_TIM1_BASE+STM32_ATIM_CCMR1_OFFSET)
+#  define STM32_TIM1_CCMR2        (STM32_TIM1_BASE+STM32_ATIM_CCMR2_OFFSET)
+#  define STM32_TIM1_CCER         (STM32_TIM1_BASE+STM32_ATIM_CCER_OFFSET)
+#  define STM32_TIM1_CNT          (STM32_TIM1_BASE+STM32_ATIM_CNT_OFFSET)
+#  define STM32_TIM1_PSC          (STM32_TIM1_BASE+STM32_ATIM_PSC_OFFSET)
+#  define STM32_TIM1_ARR          (STM32_TIM1_BASE+STM32_ATIM_ARR_OFFSET)
+#  define STM32_TIM1_RCR          (STM32_TIM1_BASE+STM32_ATIM_RCR_OFFSET)
+#  define STM32_TIM1_CCR1         (STM32_TIM1_BASE+STM32_ATIM_CCR1_OFFSET)
+#  define STM32_TIM1_CCR2         (STM32_TIM1_BASE+STM32_ATIM_CCR2_OFFSET)
+#  define STM32_TIM1_CCR3         (STM32_TIM1_BASE+STM32_ATIM_CCR3_OFFSET)
+#  define STM32_TIM1_CCR4         (STM32_TIM1_BASE+STM32_ATIM_CCR4_OFFSET)
+#  define STM32_TIM1_BDTR         (STM32_TIM1_BASE+STM32_ATIM_BDTR_OFFSET)
+#  define STM32_TIM1_DCR          (STM32_TIM1_BASE+STM32_ATIM_DCR_OFFSET)
+#  define STM32_TIM1_DMAR         (STM32_TIM1_BASE+STM32_ATIM_DMAR_OFFSET)
+#  define STM32_TIM1_CCMR3        (STM32_TIM1_BASE+STM32_ATIM_CCMR3_OFFSET)
+#  define STM32_TIM1_CCR5         (STM32_TIM1_BASE+STM32_ATIM_CCR5_OFFSET)
+#  define STM32_TIM1_CCR6         (STM32_TIM1_BASE+STM32_ATIM_CCR6_OFFSET)
+#  define STM32_TIM1_AF1          (STM32_TIM1_BASE+STM32_ATIM_AF1_OFFSET)
+#  define STM32_TIM1_AF2          (STM32_TIM1_BASE+STM32_ATIM_AF2_OFFSET)
+#endif
+
+#if STM32F7_NATIM > 1
+#  define STM32_TIM8_CR1          (STM32_TIM8_BASE+STM32_ATIM_CR1_OFFSET)
+#  define STM32_TIM8_CR2          (STM32_TIM8_BASE+STM32_ATIM_CR2_OFFSET)
+#  define STM32_TIM8_SMCR         (STM32_TIM8_BASE+STM32_ATIM_SMCR_OFFSET)
+#  define STM32_TIM8_DIER         (STM32_TIM8_BASE+STM32_ATIM_DIER_OFFSET)
+#  define STM32_TIM8_SR           (STM32_TIM8_BASE+STM32_ATIM_SR_OFFSET)
+#  define STM32_TIM8_EGR          (STM32_TIM8_BASE+STM32_ATIM_EGR_OFFSET)
+#  define STM32_TIM8_CCMR1        (STM32_TIM8_BASE+STM32_ATIM_CCMR1_OFFSET)
+#  define STM32_TIM8_CCMR2        (STM32_TIM8_BASE+STM32_ATIM_CCMR2_OFFSET)
+#  define STM32_TIM8_CCER         (STM32_TIM8_BASE+STM32_ATIM_CCER_OFFSET)
+#  define STM32_TIM8_CNT          (STM32_TIM8_BASE+STM32_ATIM_CNT_OFFSET)
+#  define STM32_TIM8_PSC          (STM32_TIM8_BASE+STM32_ATIM_PSC_OFFSET)
+#  define STM32_TIM8_ARR          (STM32_TIM8_BASE+STM32_ATIM_ARR_OFFSET)
+#  define STM32_TIM8_RCR          (STM32_TIM8_BASE+STM32_ATIM_RCR_OFFSET)
+#  define STM32_TIM8_CCR1         (STM32_TIM8_BASE+STM32_ATIM_CCR1_OFFSET)
+#  define STM32_TIM8_CCR2         (STM32_TIM8_BASE+STM32_ATIM_CCR2_OFFSET)
+#  define STM32_TIM8_CCR3         (STM32_TIM8_BASE+STM32_ATIM_CCR3_OFFSET)
+#  define STM32_TIM8_CCR4         (STM32_TIM8_BASE+STM32_ATIM_CCR4_OFFSET)
+#  define STM32_TIM8_BDTR         (STM32_TIM8_BASE+STM32_ATIM_BDTR_OFFSET)
+#  define STM32_TIM8_DCR          (STM32_TIM8_BASE+STM32_ATIM_DCR_OFFSET)
+#  define STM32_TIM8_DMAR         (STM32_TIM8_BASE+STM32_ATIM_DMAR_OFFSET)
+#  define STM32_TIM8_CCMR3        (STM32_TIM8_BASE+STM32_ATIM_CCMR3_OFFSET)
+#  define STM32_TIM8_CCR5         (STM32_TIM8_BASE+STM32_ATIM_CCR5_OFFSET)
+#  define STM32_TIM8_CCR6         (STM32_TIM8_BASE+STM32_ATIM_CCR6_OFFSET)
+#  define STM32_TIM8_AF1          (STM32_TIM8_BASE+STM32_ATIM_AF1_OFFSET)
+#  define STM32_TIM8_AF2          (STM32_TIM8_BASE+STM32_ATIM_AF2_OFFSET)
+#endif
+
+/* 16-/32-bit General Timers - TIM2, TIM3, TIM4, and TIM5 with DMA.
+ * All timers are 16-bit except for TIM2 and 5 are 32-bit
+ */
+
+#if (STM32F7_NGTIM16+STM32F7_NGTIM32) > 0
+#  define STM32_TIM2_CR1          (STM32_TIM2_BASE+STM32_GTIM_CR1_OFFSET)
+#  define STM32_TIM2_CR2          (STM32_TIM2_BASE+STM32_GTIM_CR2_OFFSET)
+#  define STM32_TIM2_SMCR         (STM32_TIM2_BASE+STM32_GTIM_SMCR_OFFSET)
+#  define STM32_TIM2_DIER         (STM32_TIM2_BASE+STM32_GTIM_DIER_OFFSET)
+#  define STM32_TIM2_SR           (STM32_TIM2_BASE+STM32_GTIM_SR_OFFSET)
+#  define STM32_TIM2_EGR          (STM32_TIM2_BASE+STM32_GTIM_EGR_OFFSET)
+#  define STM32_TIM2_CCMR1        (STM32_TIM2_BASE+STM32_GTIM_CCMR1_OFFSET)
+#  define STM32_TIM2_CCMR2        (STM32_TIM2_BASE+STM32_GTIM_CCMR2_OFFSET)
+#  define STM32_TIM2_CCER         (STM32_TIM2_BASE+STM32_GTIM_CCER_OFFSET)
+#  define STM32_TIM2_CNT          (STM32_TIM2_BASE+STM32_GTIM_CNT_OFFSET)
+#  define STM32_TIM2_PSC          (STM32_TIM2_BASE+STM32_GTIM_PSC_OFFSET)
+#  define STM32_TIM2_ARR          (STM32_TIM2_BASE+STM32_GTIM_ARR_OFFSET)
+#  define STM32_TIM2_CCR1         (STM32_TIM2_BASE+STM32_GTIM_CCR1_OFFSET)
+#  define STM32_TIM2_CCR2         (STM32_TIM2_BASE+STM32_GTIM_CCR2_OFFSET)
+#  define STM32_TIM2_CCR3         (STM32_TIM2_BASE+STM32_GTIM_CCR3_OFFSET)
+#  define STM32_TIM2_CCR4         (STM32_TIM2_BASE+STM32_GTIM_CCR4_OFFSET)
+#  define STM32_TIM2_DCR          (STM32_TIM2_BASE+STM32_GTIM_DCR_OFFSET)
+#  define STM32_TIM2_DMAR         (STM32_TIM2_BASE+STM32_GTIM_DMAR_OFFSET)
+#  define STM32_TIM2_OR           (STM32_TIM2_BASE+STM32_GTIM_OR_OFFSET)
+#endif
+
+#if (STM32F7_NGTIM16+STM32F7_NGTIM32) > 1
+#  define STM32_TIM3_CR1          (STM32_TIM3_BASE+STM32_GTIM_CR1_OFFSET)
+#  define STM32_TIM3_CR2          (STM32_TIM3_BASE+STM32_GTIM_CR2_OFFSET)
+#  define STM32_TIM3_SMCR         (STM32_TIM3_BASE+STM32_GTIM_SMCR_OFFSET)
+#  define STM32_TIM3_DIER         (STM32_TIM3_BASE+STM32_GTIM_DIER_OFFSET)
+#  define STM32_TIM3_SR           (STM32_TIM3_BASE+STM32_GTIM_SR_OFFSET)
+#  define STM32_TIM3_EGR          (STM32_TIM3_BASE+STM32_GTIM_EGR_OFFSET)
+#  define STM32_TIM3_CCMR1        (STM32_TIM3_BASE+STM32_GTIM_CCMR1_OFFSET)
+#  define STM32_TIM3_CCMR2        (STM32_TIM3_BASE+STM32_GTIM_CCMR2_OFFSET)
+#  define STM32_TIM3_CCER         (STM32_TIM3_BASE+STM32_GTIM_CCER_OFFSET)
+#  define STM32_TIM3_CNT          (STM32_TIM3_BASE+STM32_GTIM_CNT_OFFSET)
+#  define STM32_TIM3_PSC          (STM32_TIM3_BASE+STM32_GTIM_PSC_OFFSET)
+#  define STM32_TIM3_ARR          (STM32_TIM3_BASE+STM32_GTIM_ARR_OFFSET)
+#  define STM32_TIM3_CCR1         (STM32_TIM3_BASE+STM32_GTIM_CCR1_OFFSET)
+#  define STM32_TIM3_CCR2         (STM32_TIM3_BASE+STM32_GTIM_CCR2_OFFSET)
+#  define STM32_TIM3_CCR3         (STM32_TIM3_BASE+STM32_GTIM_CCR3_OFFSET)
+#  define STM32_TIM3_CCR4         (STM32_TIM3_BASE+STM32_GTIM_CCR4_OFFSET)
+#  define STM32_TIM3_DCR          (STM32_TIM3_BASE+STM32_GTIM_DCR_OFFSET)
+#  define STM32_TIM3_DMAR         (STM32_TIM3_BASE+STM32_GTIM_DMAR_OFFSET)
+#endif
+
+#if (STM32F7_NGTIM16+STM32F7_NGTIM32) > 2
+#  define STM32_TIM4_CR1          (STM32_TIM4_BASE+STM32_GTIM_CR1_OFFSET)
+#  define STM32_TIM4_CR2          (STM32_TIM4_BASE+STM32_GTIM_CR2_OFFSET)
+#  define STM32_TIM4_SMCR         (STM32_TIM4_BASE+STM32_GTIM_SMCR_OFFSET)
+#  define STM32_TIM4_DIER         (STM32_TIM4_BASE+STM32_GTIM_DIER_OFFSET)
+#  define STM32_TIM4_SR           (STM32_TIM4_BASE+STM32_GTIM_SR_OFFSET)
+#  define STM32_TIM4_EGR          (STM32_TIM4_BASE+STM32_GTIM_EGR_OFFSET)
+#  define STM32_TIM4_CCMR1        (STM32_TIM4_BASE+STM32_GTIM_CCMR1_OFFSET)
+#  define STM32_TIM4_CCMR2        (STM32_TIM4_BASE+STM32_GTIM_CCMR2_OFFSET)
+#  define STM32_TIM4_CCER         (STM32_TIM4_BASE+STM32_GTIM_CCER_OFFSET)
+#  define STM32_TIM4_CNT          (STM32_TIM4_BASE+STM32_GTIM_CNT_OFFSET)
+#  define STM32_TIM4_PSC          (STM32_TIM4_BASE+STM32_GTIM_PSC_OFFSET)
+#  define STM32_TIM4_ARR          (STM32_TIM4_BASE+STM32_GTIM_ARR_OFFSET)
+#  define STM32_TIM4_CCR1         (STM32_TIM4_BASE+STM32_GTIM_CCR1_OFFSET)
+#  define STM32_TIM4_CCR2         (STM32_TIM4_BASE+STM32_GTIM_CCR2_OFFSET)
+#  define STM32_TIM4_CCR3         (STM32_TIM4_BASE+STM32_GTIM_CCR3_OFFSET)
+#  define STM32_TIM4_CCR4         (STM32_TIM4_BASE+STM32_GTIM_CCR4_OFFSET)
+#  define STM32_TIM4_DCR          (STM32_TIM4_BASE+STM32_GTIM_DCR_OFFSET)
+#  define STM32_TIM4_DMAR         (STM32_TIM4_BASE+STM32_GTIM_DMAR_OFFSET)
+#endif
+
+#if (STM32F7_NGTIM16+STM32F7_NGTIM32) > 3
+#  define STM32_TIM5_CR1          (STM32_TIM5_BASE+STM32_GTIM_CR1_OFFSET)
+#  define STM32_TIM5_CR2          (STM32_TIM5_BASE+STM32_GTIM_CR2_OFFSET)
+#  define STM32_TIM5_SMCR         (STM32_TIM5_BASE+STM32_GTIM_SMCR_OFFSET)
+#  define STM32_TIM5_DIER         (STM32_TIM5_BASE+STM32_GTIM_DIER_OFFSET)
+#  define STM32_TIM5_SR           (STM32_TIM5_BASE+STM32_GTIM_SR_OFFSET)
+#  define STM32_TIM5_EGR          (STM32_TIM5_BASE+STM32_GTIM_EGR_OFFSET)
+#  define STM32_TIM5_CCMR1        (STM32_TIM5_BASE+STM32_GTIM_CCMR1_OFFSET)
+#  define STM32_TIM5_CCMR2        (STM32_TIM5_BASE+STM32_GTIM_CCMR2_OFFSET)
+#  define STM32_TIM5_CCER         (STM32_TIM5_BASE+STM32_GTIM_CCER_OFFSET)
+#  define STM32_TIM5_CNT          (STM32_TIM5_BASE+STM32_GTIM_CNT_OFFSET)
+#  define STM32_TIM5_PSC          (STM32_TIM5_BASE+STM32_GTIM_PSC_OFFSET)
+#  define STM32_TIM5_ARR          (STM32_TIM5_BASE+STM32_GTIM_ARR_OFFSET)
+#  define STM32_TIM5_CCR1         (STM32_TIM5_BASE+STM32_GTIM_CCR1_OFFSET)
+#  define STM32_TIM5_CCR2         (STM32_TIM5_BASE+STM32_GTIM_CCR2_OFFSET)
+#  define STM32_TIM5_CCR3         (STM32_TIM5_BASE+STM32_GTIM_CCR3_OFFSET)
+#  define STM32_TIM5_CCR4         (STM32_TIM5_BASE+STM32_GTIM_CCR4_OFFSET)
+#  define STM32_TIM5_DCR          (STM32_TIM5_BASE+STM32_GTIM_DCR_OFFSET)
+#  define STM32_TIM5_DMAR         (STM32_TIM5_BASE+STM32_GTIM_DMAR_OFFSET)
+#  define STM32_TIM5_OR           (STM32_TIM5_BASE+STM32_GTIM_OR_OFFSET)
+#endif
+
+
+/* 16-bit General Timers - TIM9-14 without DMA.  Note that (1) these timers
+ * support only a subset of the general timer registers are supported, and
+ * (2) TIM9 and TIM12 differ from the others.
+ */
+
+#if STM32F7_NGTIMNDMA > 0
+#  define STM32_TIM9_CR1          (STM32_TIM9_BASE+STM32_GTIM_CR1_OFFSET)
+#  define STM32_TIM9_CR2          (STM32_TIM9_BASE+STM32_GTIM_CR2_OFFSET)
+#  define STM32_TIM9_DIER         (STM32_TIM9_BASE+STM32_GTIM_DIER_OFFSET)
+#  define STM32_TIM9_SR           (STM32_TIM9_BASE+STM32_GTIM_SR_OFFSET)
+#  define STM32_TIM9_EGR          (STM32_TIM9_BASE+STM32_GTIM_EGR_OFFSET)
+#  define STM32_TIM9_CCMR1        (STM32_TIM9_BASE+STM32_GTIM_CCMR1_OFFSET)
+#  define STM32_TIM9_CCER         (STM32_TIM9_BASE+STM32_GTIM_CCER_OFFSET)
+#  define STM32_TIM9_CNT          (STM32_TIM9_BASE+STM32_GTIM_CNT_OFFSET)
+#  define STM32_TIM9_PSC          (STM32_TIM9_BASE+STM32_GTIM_PSC_OFFSET)
+#  define STM32_TIM9_ARR          (STM32_TIM9_BASE+STM32_GTIM_ARR_OFFSET)
+#  define STM32_TIM9_CCR1         (STM32_TIM9_BASE+STM32_GTIM_CCR1_OFFSET)
+#  define STM32_TIM9_CCR2         (STM32_TIM9_BASE+STM32_GTIM_CCR2_OFFSET)
+#endif
+
+#if STM32F7_NGTIMNDMA > 1
+#  define STM32_TIM10_CR1         (STM32_TIM10_BASE+STM32_GTIM_CR1_OFFSET)
+#  define STM32_TIM10_DIER        (STM32_TIM10_BASE+STM32_GTIM_DIER_OFFSET)
+#  define STM32_TIM10_SR          (STM32_TIM10_BASE+STM32_GTIM_SR_OFFSET)
+#  define STM32_TIM10_EGR         (STM32_TIM10_BASE+STM32_GTIM_EGR_OFFSET)
+#  define STM32_TIM10_CCMR1       (STM32_TIM10_BASE+STM32_GTIM_CCMR1_OFFSET)
+#  define STM32_TIM10_CCER        (STM32_TIM10_BASE+STM32_GTIM_CCER_OFFSET)
+#  define STM32_TIM10_CNT         (STM32_TIM10_BASE+STM32_GTIM_CNT_OFFSET)
+#  define STM32_TIM10_PSC         (STM32_TIM10_BASE+STM32_GTIM_PSC_OFFSET)
+#  define STM32_TIM10_ARR         (STM32_TIM10_BASE+STM32_GTIM_ARR_OFFSET)
+#  define STM32_TIM10_CCR1        (STM32_TIM10_BASE+STM32_GTIM_CCR1_OFFSET)
+#endif
+
+#if STM32F7_NGTIMNDMA > 2
+#  define STM32_TIM11_CR1         (STM32_TIM11_BASE+STM32_GTIM_CR1_OFFSET)
+#  define STM32_TIM11_DIER        (STM32_TIM11_BASE+STM32_GTIM_DIER_OFFSET)
+#  define STM32_TIM11_SR          (STM32_TIM11_BASE+STM32_GTIM_SR_OFFSET)
+#  define STM32_TIM11_EGR         (STM32_TIM11_BASE+STM32_GTIM_EGR_OFFSET)
+#  define STM32_TIM11_CCMR1       (STM32_TIM11_BASE+STM32_GTIM_CCMR1_OFFSET)
+#  define STM32_TIM11_CCER        (STM32_TIM11_BASE+STM32_GTIM_CCER_OFFSET)
+#  define STM32_TIM11_CNT         (STM32_TIM11_BASE+STM32_GTIM_CNT_OFFSET)
+#  define STM32_TIM11_PSC         (STM32_TIM11_BASE+STM32_GTIM_PSC_OFFSET)
+#  define STM32_TIM11_ARR         (STM32_TIM11_BASE+STM32_GTIM_ARR_OFFSET)
+#  define STM32_TIM11_CCR1        (STM32_TIM11_BASE+STM32_GTIM_CCR1_OFFSET)
+#  define STM32_TIM11_OR          (STM32_TIM11_BASE+STM32_GTIM_OR_OFFSET)
+#endif
+
+#if STM32F7_NGTIMNDMA > 3
+#  define STM32_TIM12_CR1         (STM32_TIM12_BASE+STM32_GTIM_CR1_OFFSET)
+#  define STM32_TIM12_CR2         (STM32_TIM9_BASE+STM32_GTIM_CR2_OFFSET)
+#  define STM32_TIM12_DIER        (STM32_TIM12_BASE+STM32_GTIM_DIER_OFFSET)
+#  define STM32_TIM12_SR          (STM32_TIM12_BASE+STM32_GTIM_SR_OFFSET)
+#  define STM32_TIM12_EGR         (STM32_TIM12_BASE+STM32_GTIM_EGR_OFFSET)
+#  define STM32_TIM12_CCMR1       (STM32_TIM12_BASE+STM32_GTIM_CCMR1_OFFSET)
+#  define STM32_TIM12_CCER        (STM32_TIM12_BASE+STM32_GTIM_CCER_OFFSET)
+#  define STM32_TIM12_CNT         (STM32_TIM12_BASE+STM32_GTIM_CNT_OFFSET)
+#  define STM32_TIM12_PSC         (STM32_TIM12_BASE+STM32_GTIM_PSC_OFFSET)
+#  define STM32_TIM12_ARR         (STM32_TIM12_BASE+STM32_GTIM_ARR_OFFSET)
+#  define STM32_TIM12_CCR1        (STM32_TIM12_BASE+STM32_GTIM_CCR1_OFFSET)
+#  define STM32_TIM12_CCR2        (STM32_TIM12_BASE+STM32_GTIM_CCR2_OFFSET)
+#endif
+
+#if STM32F7_NGTIMNDMA > 4
+#  define STM32_TIM13_CR1         (STM32_TIM13_BASE+STM32_GTIM_CR1_OFFSET)
+#  define STM32_TIM13_DIER        (STM32_TIM13_BASE+STM32_GTIM_DIER_OFFSET)
+#  define STM32_TIM13_SR          (STM32_TIM13_BASE+STM32_GTIM_SR_OFFSET)
+#  define STM32_TIM13_EGR         (STM32_TIM13_BASE+STM32_GTIM_EGR_OFFSET)
+#  define STM32_TIM13_CCMR1       (STM32_TIM13_BASE+STM32_GTIM_CCMR1_OFFSET)
+#  define STM32_TIM13_CCER        (STM32_TIM13_BASE+STM32_GTIM_CCER_OFFSET)
+#  define STM32_TIM13_CNT         (STM32_TIM13_BASE+STM32_GTIM_CNT_OFFSET)
+#  define STM32_TIM13_PSC         (STM32_TIM13_BASE+STM32_GTIM_PSC_OFFSET)
+#  define STM32_TIM13_ARR         (STM32_TIM13_BASE+STM32_GTIM_ARR_OFFSET)
+#  define STM32_TIM13_CCR1        (STM32_TIM13_BASE+STM32_GTIM_CCR1_OFFSET)
+#endif
+
+#if STM32F7_NGTIMNDMA > 5
+#  define STM32_TIM14_CR1         (STM32_TIM14_BASE+STM32_GTIM_CR1_OFFSET)
+#  define STM32_TIM14_DIER        (STM32_TIM14_BASE+STM32_GTIM_DIER_OFFSET)
+#  define STM32_TIM14_SR          (STM32_TIM14_BASE+STM32_GTIM_SR_OFFSET)
+#  define STM32_TIM14_EGR         (STM32_TIM14_BASE+STM32_GTIM_EGR_OFFSET)
+#  define STM32_TIM14_CCMR1       (STM32_TIM14_BASE+STM32_GTIM_CCMR1_OFFSET)
+#  define STM32_TIM14_CCER        (STM32_TIM14_BASE+STM32_GTIM_CCER_OFFSET)
+#  define STM32_TIM14_CNT         (STM32_TIM14_BASE+STM32_GTIM_CNT_OFFSET)
+#  define STM32_TIM14_PSC         (STM32_TIM14_BASE+STM32_GTIM_PSC_OFFSET)
+#  define STM32_TIM14_ARR         (STM32_TIM14_BASE+STM32_GTIM_ARR_OFFSET)
+#  define STM32_TIM14_CCR1        (STM32_TIM14_BASE+STM32_GTIM_CCR1_OFFSET)
+#endif
+
+/* Basic Timers - TIM6 and TIM7 */
+
+#if STM32F7_NBTIM > 0
+#  define STM32_TIM6_CR1          (STM32_TIM6_BASE+STM32_BTIM_CR1_OFFSET)
+#  define STM32_TIM6_CR2          (STM32_TIM6_BASE+STM32_BTIM_CR2_OFFSET)
+#  define STM32_TIM6_DIER         (STM32_TIM6_BASE+STM32_BTIM_DIER_OFFSET)
+#  define STM32_TIM6_SR           (STM32_TIM6_BASE+STM32_BTIM_SR_OFFSET)
+#  define STM32_TIM6_EGR          (STM32_TIM6_BASE+STM32_BTIM_EGR_OFFSET)
+#  define STM32_TIM6_CNT          (STM32_TIM6_BASE+STM32_BTIM_CNT_OFFSET)
+#  define STM32_TIM6_PSC          (STM32_TIM6_BASE+STM32_BTIM_PSC_OFFSET)
+#  define STM32_TIM6_ARR          (STM32_TIM6_BASE+STM32_BTIM_ARR_OFFSET)
+#endif
+
+#if STM32F7_NBTIM > 1
+#  define STM32_TIM7_CR1          (STM32_TIM7_BASE+STM32_BTIM_CR1_OFFSET)
+#  define STM32_TIM7_CR2          (STM32_TIM7_BASE+STM32_BTIM_CR2_OFFSET)
+#  define STM32_TIM7_DIER         (STM32_TIM7_BASE+STM32_BTIM_DIER_OFFSET)
+#  define STM32_TIM7_SR           (STM32_TIM7_BASE+STM32_BTIM_SR_OFFSET)
+#  define STM32_TIM7_EGR          (STM32_TIM7_BASE+STM32_BTIM_EGR_OFFSET)
+#  define STM32_TIM7_CNT          (STM32_TIM7_BASE+STM32_BTIM_CNT_OFFSET)
+#  define STM32_TIM7_PSC          (STM32_TIM7_BASE+STM32_BTIM_PSC_OFFSET)
+#  define STM32_TIM7_ARR          (STM32_TIM7_BASE+STM32_BTIM_ARR_OFFSET)
+#endif
+
+/* Register Bitfield Definitions ********************************************************************/
+
+/* Control register 1 */
+
+#define ATIM_CR1_CEN              (1 << 0)  /* Bit 0: Counter enable */
+#define ATIM_CR1_UDIS             (1 << 1)  /* Bit 1: Update disable */
+#define ATIM_CR1_URS              (1 << 2)  /* Bit 2: Update request source */
+#define ATIM_CR1_OPM              (1 << 3)  /* Bit 3: One pulse mode */
+#define ATIM_CR1_DIR              (1 << 4)  /* Bit 4: Direction */
+#define ATIM_CR1_CMS_SHIFT        (5)       /* Bits 6-5: Center-aligned mode selection */
+#define ATIM_CR1_CMS_MASK         (3 << ATIM_CR1_CMS_SHIFT)
+#  define ATIM_CR1_EDGE           (0 << ATIM_CR1_CMS_SHIFT) /* 00: Edge-aligned mode */
+#  define ATIM_CR1_CENTER1        (1 << ATIM_CR1_CMS_SHIFT) /* 01: Center-aligned mode 1 */
+#  define ATIM_CR1_CENTER2        (2 << ATIM_CR1_CMS_SHIFT) /* 10: Center-aligned mode 2 */
+#  define ATIM_CR1_CENTER3        (3 << ATIM_CR1_CMS_SHIFT) /* 11: Center-aligned mode 3 */
+#define ATIM_CR1_ARPE             (1 << 7)  /* Bit 7: Auto-reload preload enable */
+#define ATIM_CR1_CKD_SHIFT        (8)       /* Bits 9-8: Clock division */
+#define ATIM_CR1_CKD_MASK         (3 << ATIM_CR1_CKD_SHIFT)
+#  define ATIM_CR1_TCKINT         (0 << ATIM_CR1_CKD_SHIFT) /* 00: tDTS=tCK_INT */
+#  define ATIM_CR1_2TCKINT        (1 << ATIM_CR1_CKD_SHIFT) /* 01: tDTS=2*tCK_INT */
+#  define ATIM_CR1_4TCKINT        (2 << ATIM_CR1_CKD_SHIFT) /* 10: tDTS=4*tCK_INT */
+#define ATIM_CR1_UIFREMAP         (1 << 11) /* Bit 11: UIF status bit remapping */
+
+/* Control register 2 */
+
+#define ATIM_CR2_CCPC             (1 << 0)  /* Bit 0:  Capture/Compare Preloaded Control */
+#define ATIM_CR2_CCUS             (1 << 2)  /* Bit 2:  Capture/Compare Control Update Selection */
+#define ATIM_CR2_CCDS             (1 << 3)  /* Bit 3:  Capture/Compare DMA Selection */
+#define ATIM_CR2_MMS_SHIFT        (4)       /* Bits 6-4: Master Mode Selection */
+#define ATIM_CR2_MMS_MASK         (7 << ATIM_CR2_MMS_SHIFT)
+#  define ATIM_CR2_MMS_RESET      (0 << ATIM_CR2_MMS_SHIFT) /* 000: Reset - TIMx_EGR UG bit is TRGO */
+#  define ATIM_CR2_MMS_ENABLE     (1 << ATIM_CR2_MMS_SHIFT) /* 001: Enable - CNT_EN is TRGO */
+#  define ATIM_CR2_MMS_UPDATE     (2 << ATIM_CR2_MMS_SHIFT) /* 010: Update event is TRGO */
+#  define ATIM_CR2_MMS_COMPP      (3 << ATIM_CR2_MMS_SHIFT) /* 010: Compare Pulse - CC1IF flag */
+#  define ATIM_CR2_MMS_OC1REF     (4 << ATIM_CR2_MMS_SHIFT) /* 100: Compare OC1REF is TRGO */
+#  define ATIM_CR2_MMS_OC2REF     (5 << ATIM_CR2_MMS_SHIFT) /* 101: Compare OC2REF is TRGO */
+#  define ATIM_CR2_MMS_OC3REF     (6 << ATIM_CR2_MMS_SHIFT) /* 110: Compare OC3REF is TRGO */
+#  define ATIM_CR2_MMS_OC4REF     (7 << ATIM_CR2_MMS_SHIFT) /* 111: Compare OC4REF is TRGO */
+#define ATIM_CR2_TI1S             (1 << 7)  /* Bit 7: TI1 Selection */
+#define ATIM_CR2_OIS1             (1 << 8)  /* Bit 8:  Output Idle state 1 (OC1 output) */
+#define ATIM_CR2_OIS1N            (1 << 9)  /* Bit 9:  Output Idle state 1 (OC1N output) */
+#define ATIM_CR2_OIS2             (1 << 10) /* Bit 10: Output Idle state 2 (OC2 output) */
+#define ATIM_CR2_OIS2N            (1 << 11) /* Bit 11: Output Idle state 2 (OC2N output) */
+#define ATIM_CR2_OIS3             (1 << 12) /* Bit 12: Output Idle state 3 (OC3 output) */
+#define ATIM_CR2_OIS3N            (1 << 13) /* Bit 13: Output Idle state 3 (OC3N output) */
+#define ATIM_CR2_OIS4             (1 << 14) /* Bit 14: Output Idle state 4 (OC4 output) */
+#define ATIM_CR2_OIS5             (1 << 16) /* Bit 16: OOutput Idle state 5 (OC5 output) */
+#define ATIM_CR2_OIS6             (1 << 18) /* Bit 18: Output Idle state 6 (OC6 output) */
+#define ATIM_CR2_MMS2_SHIFT       (20)      /* Bits 20-23: Master Mode Selection 2 */
+#define ATIM_CR2_MMS2_MASK        (15 << ATIM_CR2_MMS2_SHIFT)
+#  define ATIM_CR2_MMS2_RESET     (0 << ATIM_CR2_MMS2_SHIFT)  /* 0000: Reset - TIMx_EGR UG bit is TRG9 */
+#  define ATIM_CR2_MMS2_ENABLE    (1 << ATIM_CR2_MMS2_SHIFT)  /* 0001: Enable - CNT_EN is TRGO2 */
+#  define ATIM_CR2_MMS2_UPDATE    (2 << ATIM_CR2_MMS2_SHIFT)  /* 0010: Update event is TRGH0*/
+#  define ATIM_CR2_MMS2_COMPP     (3 << ATIM_CR2_MMS2_SHIFT)  /* 0010: Compare Pulse - CC1IF flag */
+#  define ATIM_CR2_MMS2_OC1REF    (4 << ATIM_CR2_MMS2_SHIFT)  /* 0100: Compare OC1REF is TRGO2 */
+#  define ATIM_CR2_MMS2_OC2REF    (5 << ATIM_CR2_MMS2_SHIFT)  /* 0101: Compare OC2REF is TRGO2 */
+#  define ATIM_CR2_MMS2_OC3REF    (6 << ATIM_CR2_MMS2_SHIFT)  /* 0110: Compare OC3REF is TRGO2 */
+#  define ATIM_CR2_MMS2_OC4REF    (7 << ATIM_CR2_MMS2_SHIFT)  /* 0111: Compare OC4REF is TRGO2 */
+#  define ATIM_CR2_MMS2_OC5REF    (8 << ATIM_CR2_MMS2_SHIFT)  /* 1000: Compare OC5REF is TRGO2 */
+#  define ATIM_CR2_MMS2_OC6REF    (9 << ATIM_CR2_MMS2_SHIFT)  /* 1001: Compare OC6REF is TRGO2 */
+#  define ATIM_CR2_MMS2_CMPOC4    (10 << ATIM_CR2_MMS2_SHIFT) /* 1010: Compare pulse - OC4REF edge is TRGO2 */
+#  define ATIM_CR2_MMS2_CMPOC6    (11 << ATIM_CR2_MMS2_SHIFT) /* 1011: Compare pulse - OC6REF edge is TRGO2 */
+#  define ATIM_CR2_MMS2_CMPOC4R6R (12 << ATIM_CR2_MMS2_SHIFT) /* 1100: Compare pulse - OC4REF/OC6REF rising */
+#  define ATIM_CR2_MMS2_CMPOC4R6F (13 << ATIM_CR2_MMS2_SHIFT) /* 1101: Compare pulse - OC4REF rising/OC6REF falling */
+#  define ATIM_CR2_MMS2_CMPOC5R6R (14 << ATIM_CR2_MMS2_SHIFT) /* 1110: Compare pulse - OC5REF/OC6REF rising */
+#  define ATIM_CR2_MMS2_CMPOC5R6F (15 << ATIM_CR2_MMS2_SHIFT) /* 1111: Compare pulse - OC5REF rising/OC6REF falling */
+
+/* Slave mode control register */
+
+#define ATIM_SMCR_SMS_SHIFT       (0)       /* Bits 0-2: Slave mode selection */
+#define ATIM_SMCR_SMS_MASK        (7 << ATIM_SMCR_SMS_SHIFT)
+#  define ATIM_SMCR_DISAB         (0 << ATIM_SMCR_SMS_SHIFT) /* 000: Slave mode disabled */
+#  define ATIM_SMCR_ENCMD1        (1 << ATIM_SMCR_SMS_SHIFT) /* 001: Encoder mode 1 */
+#  define ATIM_SMCR_ENCMD2        (2 << ATIM_SMCR_SMS_SHIFT) /* 010: Encoder mode 2 */
+#  define ATIM_SMCR_ENCMD3        (3 << ATIM_SMCR_SMS_SHIFT) /* 011: Encoder mode 3 */
+#  define ATIM_SMCR_RESET         (4 << ATIM_SMCR_SMS_SHIFT) /* 100: Reset Mode */
+#  define ATIM_SMCR_GATED         (5 << ATIM_SMCR_SMS_SHIFT) /* 101: Gated Mode */
+#  define ATIM_SMCR_TRIGGER       (6 << ATIM_SMCR_SMS_SHIFT) /* 110: Trigger Mode */
+#  define ATIM_SMCR_EXTCLK1       (7 << ATIM_SMCR_SMS_SHIFT) /* 111: External Clock Mode 1 */
+#define ATIM_SMCR_TS_SHIFT        (4)       /* Bits 4-6: Trigger selection */
+#define ATIM_SMCR_TS_MASK         (7 << ATIM_SMCR_TS_SHIFT)
+#  define ATIM_SMCR_ITR0          (0 << ATIM_SMCR_TS_SHIFT) /* 000: Internal trigger 0 (ITR0) */
+#  define ATIM_SMCR_ITR1          (1 << ATIM_SMCR_TS_SHIFT) /* 001: Internal trigger 1 (ITR1) */
+#  define ATIM_SMCR_ITR2          (2 << ATIM_SMCR_TS_SHIFT) /* 010: Internal trigger 2 (ITR2) */
+#  define ATIM_SMCR_ITR3          (3 << ATIM_SMCR_TS_SHIFT) /* 011: Internal trigger 3 (ITR3) */
+#  define ATIM_SMCR_T1FED         (4 << ATIM_SMCR_TS_SHIFT) /* 100: TI1 Edge Detector (TI1F_ED) */
+#  define ATIM_SMCR_TI1FP1        (5 << ATIM_SMCR_TS_SHIFT) /* 101: Filtered Timer Input 1 (TI1FP1) */
+#  define ATIM_SMCR_T12FP2        (6 << ATIM_SMCR_TS_SHIFT) /* 110: Filtered Timer Input 2 (TI2FP2) */
+#  define ATIM_SMCR_ETRF          (7 << ATIM_SMCR_TS_SHIFT) /* 111: External Trigger input (ETRF) */
+#define ATIM_SMCR_MSM             (1 << 7)  /* Bit 7: Master/slave mode */
+#define ATIM_SMCR_ETF_SHIFT       (8)       /* Bits 8-11: External trigger filter */
+#define ATIM_SMCR_ETF_MASK        (0x0f << ATIM_SMCR_ETF_SHIFT)
+#  define ATIM_SMCR_NOFILT        (0 << ATIM_SMCR_ETF_SHIFT) /* 0000: No filter, sampling is done at fDTS */
+#  define ATIM_SMCR_FCKINT2       (1 << ATIM_SMCR_ETF_SHIFT) /* 0001: fSAMPLING=fCK_INT, N=2 */
+#  define ATIM_SMCR_FCKINT4       (2 << ATIM_SMCR_ETF_SHIFT) /* 0010: fSAMPLING=fCK_INT, N=4 */
+#  define ATIM_SMCR_FCKINT8       (3 << ATIM_SMCR_ETF_SHIFT) /* 0011: fSAMPLING=fCK_INT, N=8 */
+#  define ATIM_SMCR_FDTSd26       (4 << ATIM_SMCR_ETF_SHIFT) /* 0100: fSAMPLING=fDTS/2, N=6 */
+#  define ATIM_SMCR_FDTSd28       (5 << ATIM_SMCR_ETF_SHIFT) /* 0101: fSAMPLING=fDTS/2, N=8 */
+#  define ATIM_SMCR_FDTSd46       (6 << ATIM_SMCR_ETF_SHIFT) /* 0110: fSAMPLING=fDTS/4, N=6 */
+#  define ATIM_SMCR_FDTSd48       (7 << ATIM_SMCR_ETF_SHIFT) /* 0111: fSAMPLING=fDTS/4, N=8 */
+#  define ATIM_SMCR_FDTSd86       (8 << ATIM_SMCR_ETF_SHIFT) /* 1000: fSAMPLING=fDTS/8, N=6 */
+#  define ATIM_SMCR_FDTSd88       (9 << ATIM_SMCR_ETF_SHIFT) /* 1001: fSAMPLING=fDTS/8, N=8 */
+#  define ATIM_SMCR_FDTSd165      (10 << ATIM_SMCR_ETF_SHIFT) /* 1010: fSAMPLING=fDTS/16, N=5 */
+#  define ATIM_SMCR_FDTSd166      (11 << ATIM_SMCR_ETF_SHIFT) /* 1011: fSAMPLING=fDTS/16, N=6 */
+#  define ATIM_SMCR_FDTSd168      (12 << ATIM_SMCR_ETF_SHIFT) /* 1100: fSAMPLING=fDTS/16, N=8 */
+#  define ATIM_SMCR_FDTSd325      (13 << ATIM_SMCR_ETF_SHIFT) /* 1101: fSAMPLING=fDTS/32, N=5 */
+#  define ATIM_SMCR_FDTSd326      (14 << ATIM_SMCR_ETF_SHIFT) /* 1110: fSAMPLING=fDTS/32, N=6 */
+#  define ATIM_SMCR_FDTSd328      (15 << ATIM_SMCR_ETF_SHIFT) /* 1111: fSAMPLING=fDTS/32, N=8 */
+#define ATIM_SMCR_ETPS_SHIFT      (12)      /* Bits 12-13: External trigger prescaler */
+#define ATIM_SMCR_ETPS_MASK       (3 << ATIM_SMCR_ETPS_SHIFT)
+#  define ATIM_SMCR_PSCOFF        (0 << ATIM_SMCR_ETPS_SHIFT) /* 00: Prescaler OFF */
+#  define ATIM_SMCR_ETRPd2        (1 << ATIM_SMCR_ETPS_SHIFT) /* 01: ETRP frequency divided by 2 */
+#  define ATIM_SMCR_ETRPd4        (2 << ATIM_SMCR_ETPS_SHIFT) /* 10: ETRP frequency divided by 4 */
+#  define ATIM_SMCR_ETRPd8        (3 << ATIM_SMCR_ETPS_SHIFT) /* 11: ETRP frequency divided by 8 */
+#define ATIM_SMCR_ECE             (1 << 14) /* Bit 14: External clock enable */
+#define ATIM_SMCR_ETP             (1 << 15) /* Bit 15: External trigger polarity */
+#define ATIM_SMCR_SMS             (1 << 16) /* Bit 16: Slave mode selection - bit 3 */
+
+/* DMA/Interrupt enable register */
+
+#define ATIM_DIER_UIE             (1 << 0)  /* Bit 0: Update interrupt enable */
+#define ATIM_DIER_CC1IE           (1 << 1)  /* Bit 1: Capture/Compare 1 interrupt enable */
+#define ATIM_DIER_CC2IE           (1 << 2)  /* Bit 2: Capture/Compare 2 interrupt enable */
+#define ATIM_DIER_CC3IE           (1 << 3)  /* Bit 3: Capture/Compare 3 interrupt enable */
+#define ATIM_DIER_CC4IE           (1 << 4)  /* Bit 4: Capture/Compare 4 interrupt enable */
+#define ATIM_DIER_COMIE           (1 << 5)  /* Bit 5: COM interrupt enable */
+#define ATIM_DIER_TIE             (1 << 6)  /* Bit 6: Trigger interrupt enable */
+#define ATIM_DIER_BIE             (1 << 7)  /* Bit 7: Break interrupt enable */
+#define ATIM_DIER_UDE             (1 << 8)  /* Bit 8: Update DMA request enable */
+#define ATIM_DIER_CC1DE           (1 << 9)  /* Bit 9: Capture/Compare 1 DMA request enable */
+#define ATIM_DIER_CC2DE           (1 << 10) /* Bit 10: Capture/Compare 2 DMA request enable */
+#define ATIM_DIER_CC3DE           (1 << 11) /* Bit 11: Capture/Compare 3 DMA request enable */
+#define ATIM_DIER_CC4DE           (1 << 12) /* Bit 12: Capture/Compare 4 DMA request enable */
+#define ATIM_DIER_COMDE           (1 << 13) /* Bit 13: COM DMA request enable */
+#define ATIM_DIER_TDE             (1 << 14) /* Bit 14: Trigger DMA request enable */
+
+/* Status register */
+
+#define ATIM_SR_UIF               (1 << 0)  /* Bit 0:  Update interrupt Flag */
+#define ATIM_SR_CC1IF             (1 << 1)  /* Bit 1:  Capture/Compare 1 interrupt Flag */
+#define ATIM_SR_CC2IF             (1 << 2)  /* Bit 2:  Capture/Compare 2 interrupt Flag */
+#define ATIM_SR_CC3IF             (1 << 3)  /* Bit 3:  Capture/Compare 3 interrupt Flag */
+#define ATIM_SR_CC4IF             (1 << 4)  /* Bit 4:  Capture/Compare 4 interrupt Flag */
+#define ATIM_SR_COMIF             (1 << 5)  /* Bit 5:  COM interrupt Flag */
+#define ATIM_SR_TIF               (1 << 6)  /* Bit 6:  Trigger interrupt Flag */
+#define ATIM_SR_BIF               (1 << 7)  /* Bit 7:  Break interrupt Flag */
+#define ATIM_SR_B2IF              (1 << 8)  /* Bit 8:  Break 2 interrupt Flag */
+#define ATIM_SR_CC1OF             (1 << 9)  /* Bit 9:  Capture/Compare 1 Overcapture Flag */
+#define ATIM_SR_CC2OF             (1 << 10) /* Bit 10: Capture/Compare 2 Overcapture Flag */
+#define ATIM_SR_CC3OF             (1 << 11) /* Bit 11: Capture/Compare 3 Overcapture Flag */
+#define ATIM_SR_CC4OF             (1 << 12) /* Bit 12: Capture/Compare 4 Overcapture Flag */
+#define ATIM_SR_CC5IF             (1 << 16) /* Bit 16: Compare 5 interrupt flag */
+#define ATIM_SR_CC6IF             (1 << 17) /* Bit 17: Compare 6 interrupt flag */
+
+/* Event generation register */
+
+#define ATIM_EGR_UG               (1 << 0)  /* Bit 0: Update Generation */
+#define ATIM_EGR_CC1G             (1 << 1)  /* Bit 1: Capture/Compare 1 Generation */
+#define ATIM_EGR_CC2G             (1 << 2)  /* Bit 2: Capture/Compare 2 Generation */
+#define ATIM_EGR_CC3G             (1 << 3)  /* Bit 3: Capture/Compare 3 Generation */
+#define ATIM_EGR_CC4G             (1 << 4)  /* Bit 4: Capture/Compare 4 Generation */
+#define ATIM_EGR_COMG             (1 << 5)  /* Bit 5: Capture/Compare Control Update Generation */
+#define ATIM_EGR_TG               (1 << 6)  /* Bit 6: Trigger Generation */
+#define ATIM_EGR_BG               (1 << 7)  /* Bit 7: Break Generation */
+#define ATIM_EGR_B2G              (1 << 8)  /* Bit 8: Break 2 Generation */
+
+/* Capture/compare mode register 1 -- Output compare mode */
+
+#define ATIM_CCMR1_CC1S_SHIFT     (0)       /* Bits 1-0: Capture/Compare 1 Selection */
+#define ATIM_CCMR1_CC1S_MASK      (3 << ATIM_CCMR1_CC1S_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR1_OC1FE          (1 << 2)  /* Bit 2: Output Compare 1 Fast enable */
+#define ATIM_CCMR1_OC1PE          (1 << 3)  /* Bit 3: Output Compare 1 Preload enable */
+#define ATIM_CCMR1_OC1M_SHIFT     (4)       /* Bits 6-4: Output Compare 1 Mode */
+#define ATIM_CCMR1_OC1M_MASK      (7 << ATIM_CCMR1_OC1M_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR1_OC1CE          (1 << 7)  /* Bit 7: Output Compare 1Clear Enable */
+#define ATIM_CCMR1_CC2S_SHIFT     (8)       /* Bits 8-9: Capture/Compare 2 Selection */
+#define ATIM_CCMR1_CC2S_MASK      (3 << ATIM_CCMR1_CC2S_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR1_OC2FE          (1 << 10) /* Bit 10: Output Compare 2 Fast enable */
+#define ATIM_CCMR1_OC2PE          (1 << 11) /* Bit 11: Output Compare 2 Preload enable */
+#define ATIM_CCMR1_OC2M_SHIFT     (12)      /* Bits 14-12: Output Compare 2 Mode */
+#define ATIM_CCMR1_OC2M_MASK      (7 << ATIM_CCMR1_OC2M_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR1_OC2CE          (1 << 15) /* Bit 15: Output Compare 2 Clear Enable */
+#define ATIM_CCMR1_OC1M           (1 << 16) /* Bit 16: Output Compare 1 mode - bit 3 */
+#define ATIM_CCMR1_OC2M           (1 << 24) /* Bit 24: Output Compare 2 mode - bit 3 */
+
+
+/* Common CCMR (unshifted) Capture/Compare Selection bit-field definitions */
+
+#define ATIM_CCMR_CCS_CCOUT       (0)       /* 00: CCx channel  output */
+#define ATIM_CCMR_CCS_CCIN1       (1)       /* 01: CCx channel input, ICx is TIx */
+#define ATIM_CCMR_CCS_CCIN2       (2)       /* 10: CCx channel input, ICx is TIy */
+#define ATIM_CCMR_CCS_CCINTRC     (3)       /* 11: CCx channel input, ICx is TRC */
+
+/* Common CCMR (unshifted) Compare Mode bit field definitions */
+
+#define ATIM_CCMR_MODE_FRZN        (0)      /* 0000: Frozen */
+#define ATIM_CCMR_MODE_CHACT       (1)      /* 0001: Channel x active on match */
+#define ATIM_CCMR_MODE_CHINACT     (2)      /* 0010: Channel x inactive on match */
+#define ATIM_CCMR_MODE_OCREFTOG    (3)      /* 0011: OCxREF toggle ATIM_CNT=ATIM_CCRx */
+#define ATIM_CCMR_MODE_OCREFLO     (4)      /* 0100: OCxREF forced low */
+#define ATIM_CCMR_MODE_OCREFHI     (5)      /* 0101: OCxREF forced high */
+#define ATIM_CCMR_MODE_PWM1        (6)      /* 0110: PWM mode 1 */
+#define ATIM_CCMR_MODE_PWM2        (7)      /* 0111: PWM mode 2 */
+#define ATIM_CCMR_MODE_OPM1        (8)      /* 1000: Retrigerrable OPM mode 1 */
+#define ATIM_CCMR_MODE_OPM2        (9)      /* 1001: Retrigerrable OPM mode 2 */
+#define ATIM_CCMR_MODE_COMBINED1   (12)     /* 1100: Combined PWM mode 1 */
+#define ATIM_CCMR_MODE_COMBINED2   (13)     /* 1101: Combined PWM mode 2 */
+#define ATIM_CCMR_MODE_ASYMMETRIC1 (14)     /* 1110: Asymmetric PWM mode 1 */
+#define ATIM_CCMR_MODE_ASYMMETRIC2 (15)     /* 1111: Asymmetric PWM mode 2 */
+
+/* Capture/compare mode register 1 -- Input capture mode */
+
+                                            /* Bits 1-0:(same as output compare mode) */
+#define ATIM_CCMR1_IC1PSC_SHIFT   (2)       /* Bits 3-2: Input Capture 1 Prescaler */
+#define ATIM_CCMR1_IC1PSC_MASK    (3 << ATIM_CCMR1_IC1PSC_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR1_IC1F_SHIFT     (4)       /* Bits 7-4: Input Capture 1 Filter */
+#define ATIM_CCMR1_IC1F_MASK      (0x0f << ATIM_CCMR1_IC1F_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+                                            /* Bits 9:8 (same as output compare mode) */
+#define ATIM_CCMR1_IC2PSC_SHIFT   (10)      /* Bits 11:10: Input Capture 2 Prescaler */
+#define ATIM_CCMR1_IC2PSC_MASK    (3 << ATIM_CCMR1_IC2PSC_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR1_IC2F_SHIFT     (12)      /* Bits 15-12: Input Capture 2 Filter */
+#define ATIM_CCMR1_IC2F_MASK      (0x0f << ATIM_CCMR1_IC2F_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+
+/* Common CCMR (unshifted) Input Capture Prescaler bit-field definitions */
+
+#define ATIM_CCMR_ICPSC_NOPSC     (0)       /* 00: no prescaler, capture each edge */
+#define ATIM_CCMR_ICPSC_EVENTS2   (1)       /* 01: capture once every 2 events */
+#define ATIM_CCMR_ICPSC_EVENTS4   (2)       /* 10: capture once every 4 events */
+#define ATIM_CCMR_ICPSC_EVENTS8   (3)       /* 11: capture once every 8 events */
+
+/* Common CCMR (unshifted) Input Capture Filter bit-field definitions */
+
+#define ATIM_CCMR_ICF_NOFILT      (0)       /* 0000: No filter, sampling at fDTS */
+#define ATIM_CCMR_ICF_FCKINT2     (1)       /* 0001: fSAMPLING=fCK_INT, N=2 */
+#define ATIM_CCMR_ICF_FCKINT4     (2)       /* 0010: fSAMPLING=fCK_INT, N=4 */
+#define ATIM_CCMR_ICF_FCKINT8     (3)       /* 0011: fSAMPLING=fCK_INT, N=8 */
+#define ATIM_CCMR_ICF_FDTSd26     (4)       /* 0100: fSAMPLING=fDTS/2, N=6 */
+#define ATIM_CCMR_ICF_FDTSd28     (5)       /* 0101: fSAMPLING=fDTS/2, N=8 */
+#define ATIM_CCMR_ICF_FDTSd46     (6)       /* 0110: fSAMPLING=fDTS/4, N=6 */
+#define ATIM_CCMR_ICF_FDTSd48     (7)       /* 0111: fSAMPLING=fDTS/4, N=8 */
+#define ATIM_CCMR_ICF_FDTSd86     (8)       /* 1000: fSAMPLING=fDTS/8, N=6 */
+#define ATIM_CCMR_ICF_FDTSd88     (9)       /* 1001: fSAMPLING=fDTS/8, N=8 */
+#define ATIM_CCMR_ICF_FDTSd165    (10)      /* 1010: fSAMPLING=fDTS/16, N=5 */
+#define ATIM_CCMR_ICF_FDTSd166    (11)      /* 1011: fSAMPLING=fDTS/16, N=6 */
+#define ATIM_CCMR_ICF_FDTSd168    (12)      /* 1100: fSAMPLING=fDTS/16, N=8 */
+#define ATIM_CCMR_ICF_FDTSd325    (13)      /* 1101: fSAMPLING=fDTS/32, N=5 */
+#define ATIM_CCMR_ICF_FDTSd326    (14)      /* 1110: fSAMPLING=fDTS/32, N=6 */
+#define ATIM_CCMR_ICF_FDTSd328    (15)      /* 1111: fSAMPLING=fDTS/32, N=8 */
+
+/* Capture/compare mode register 2 - Output Compare mode */
+
+#define ATIM_CCMR2_CC3S_SHIFT     (0)       /* Bits 1-0: Capture/Compare 3 Selection */
+#define ATIM_CCMR2_CC3S_MASK      (3 << ATIM_CCMR2_CC3S_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+#define ATIM_CCMR2_OC3FE          (1 << 2)  /* Bit 2: Output Compare 3 Fast enable */
+#define ATIM_CCMR2_OC3PE          (1 << 3)  /* Bit 3: Output Compare 3 Preload enable */
+#define ATIM_CCMR2_OC3M_SHIFT     (4)       /* Bits 6-4: Output Compare 3 Mode */
+#define ATIM_CCMR2_OC3M_MASK      (7 << ATIM_CCMR2_OC3M_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+#define ATIM_CCMR2_OC3CE          (1 << 7)  /* Bit 7: Output Compare 3 Clear Enable */
+#define ATIM_CCMR2_CC4S_SHIFT     (8)       /* Bits 9-8: Capture/Compare 4 Selection */
+#define ATIM_CCMR2_CC4S_MASK      (3 << ATIM_CCMR2_CC4S_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+#define ATIM_CCMR2_OC4FE          (1 << 10) /* Bit 10: Output Compare 4 Fast enable */
+#define ATIM_CCMR2_OC4PE          (1 << 11) /* Bit 11: Output Compare 4 Preload enable */
+#define ATIM_CCMR2_OC4M_SHIFT     (12)      /* Bits 14-12: Output Compare 4 Mode */
+#define ATIM_CCMR2_OC4M_MASK      (7 << ATIM_CCMR2_OC4M_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+#define ATIM_CCMR2_OC4CE          (1 << 15) /* Bit 15: Output Compare 4 Clear Enable */
+#define ATIM_CCMR2_OC3M           (1 << 16) /* Bit 16: Output Compare 3 mode - bit 3 */
+#define ATIM_CCMR2_OC4M           (1 << 24) /* Bit 24: Output Compare 4 mode - bit 3 */
+
+/* Capture/compare mode register 2 - Input Capture Mode */
+
+                                            /* Bits 1-0:(same as output compare mode) */
+#define ATIM_CCMR2_IC3PSC_SHIFT   (2)       /* Bits 3-2: Input Capture 3 Prescaler */
+#define ATIM_CCMR1_IC3PSC_MASK    (3 << ATIM_CCMR2_IC3PSC_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+#define ATIM_CCMR2_IC3F_SHIFT     (4)       /* Bits 7-4: Input Capture 3 Filter */
+#define ATIM_CCMR2_IC3F_MASK      (0x0f << ATIM_CCMR2_IC3F_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+                                            /* Bits 9:8 (same as output compare mode) */
+#define ATIM_CCMR2_IC4PSC_SHIFT   (10)      /* Bits 11:10: Input Capture 4 Prescaler */
+#define ATIM_CCMR2_IC4PSC_MASK    (3 << ATIM_CCMR2_IC4PSC_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+#define ATIM_CCMR2_IC4F_SHIFT     (12)      /* Bits 15-12: Input Capture 4 Filter */
+#define ATIM_CCMR2_IC4F_MASK      (0x0f << ATIM_CCMR2_IC4F_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+
+/* Capture/compare mode register 3 -- Output compare mode */
+
+#define ATIM_CCMR3_OC5FE          (1 << 2)  /* Bit 2: Output Compare 5 Fast enable */
+#define ATIM_CCMR3_OC5PE          (1 << 3)  /* Bit 3: Output Compare 5 Preload enable */
+#define ATIM_CCMR3_OC5M_SHIFT     (4)       /* Bits 6-4: Output Compare 5 Mode */
+#define ATIM_CCMR3_OC5M_MASK      (7 << ATIM_CCMR3_OC5M_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR3_OC5CE          (1 << 7)  /* Bit 7: Output Compare 5 Clear Enable */
+#define ATIM_CCMR3_OC6FE          (1 << 10) /* Bit 10: Output Compare 6 Fast enable */
+#define ATIM_CCMR3_OC6PE          (1 << 11) /* Bit 11: Output Compare 6 Preload enable */
+#define ATIM_CCMR3_OC6M_SHIFT     (12)      /* Bits 14-12: Output Compare 7 Mode */
+#define ATIM_CCMR3_OC6M_MASK      (7 << ATIM_CCMR3_OC6M_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR3_OC6CE          (1 << 15) /* Bit 15: Output Compare 7 Clear Enable */
+#define ATIM_CCMR3_OC5M           (1 << 16) /* Bit 16: Output Compare 5 mode - bit 3 */
+#define ATIM_CCMR3_OC6M           (1 << 24) /* Bit 24: Output Compare 6 mode - bit 3 */
+
+
+/* Capture/compare enable register */
+
+#define ATIM_CCER_CC1E            (1 << 0)  /* Bit 0: Capture/Compare 1 output enable */
+#define ATIM_CCER_CC1P            (1 << 1)  /* Bit 1: Capture/Compare 1 output Polarity */
+#define ATIM_CCER_CC1NE           (1 << 2)  /* Bit 2: Capture/Compare 1 Complementary output enable */
+#define ATIM_CCER_CC1NP           (1 << 3)  /* Bit 3: Capture/Compare 1 Complementary output polarity */
+#define ATIM_CCER_CC2E            (1 << 4)  /* Bit 4: Capture/Compare 2 output enable */
+#define ATIM_CCER_CC2P            (1 << 5)  /* Bit 5: Capture/Compare 2 output Polarity */
+#define ATIM_CCER_CC2NE           (1 << 6)  /* Bit 6: Capture/Compare 2 Complementary output enable */
+#define ATIM_CCER_CC2NP           (1 << 7)  /* Bit 7: Capture/Compare 2 Complementary output polarity */
+#define ATIM_CCER_CC3E            (1 << 8)  /* Bit 8: Capture/Compare 3 output enable */
+#define ATIM_CCER_CC3P            (1 << 9)  /* Bit 9: Capture/Compare 3 output Polarity */
+#define ATIM_CCER_CC3NE           (1 << 10) /* Bit 10: Capture/Compare 3 Complementary output enable */
+#define ATIM_CCER_CC3NP           (1 << 11) /* Bit 11: Capture/Compare 3 Complementary output polarity */
+#define ATIM_CCER_CC4E            (1 << 12) /* Bit 12: Capture/Compare 4 output enable */
+#define ATIM_CCER_CC4P            (1 << 13) /* Bit 13: Capture/Compare 4 output Polarity */
+#define ATIM_CCER_CC4NP           (1 << 15) /* Bit 15: Capture/Compare 4 Complementary output polarity */
+#define ATIM_CCER_CC5E            (1 << 16) /* Bit 16: Capture/Compare 5 output enable */
+#define ATIM_CCER_CC5P            (1 << 17) /* Bit 17: Capture/Compare 5 output Polarity */
+#define ATIM_CCER_CC6E            (1 << 20) /* Bit 20: Capture/Compare 6 output enable */
+#define ATIM_CCER_CC6P            (1 << 21) /* Bit 21: Capture/Compare 6 output Polarity */
+
+
+/* 16-bit counter register */
+
+#define ATIM_CNT_SHIFT            (0)       /* Bits 0-15: Timer counter value */
+#define ATIM_CNT_MASK             (0xffff << ATIM_CNT_SHIFT)
+
+/* Repetition counter register */
+
+#define ATIM_RCR_REP_SHIFT        (0)       /* Bits 0-15: Repetition Counter Value */
+#define ATIM_RCR_REP_MASK         (0xffff << ATIM_RCR_REP_SHIFT)
+
+#define ATIM_RCR_REP_MAX          65536
+
+/* Capture/compare registers (CCR) */
+
+#define ATIM_CCR5_GC5C1           (1 << 29)  /* Bit 29: Group Channel 5 and Channel 1 */
+#define ATIM_CCR5_GC5C2           (1 << 30)  /* Bit 30: Group Channel 5 and Channel 2 */
+#define ATIM_CCR5_GC5C3           (1 << 31)  /* Bit 31: Group Channel 5 and Channel 3 */
+
+#define ATIM_CCR_MASK             (0xffff)
+
+/* Alternate function option register 1 (TIMx_AF1) */
+
+#define ATIM_AF1_BKINE            (1 << 0)  /* Bit 0: BRK BKIN input enable */
+#define ATIM_AF1_BKDFBKE          (1 << 8)  /* Bit 8: BRK DFSDM_BREAK[0] enable */
+#define ATIM_AF1_BKINP            (1 << 9)  /* Bit 9: BRK BKIN input polarity */
+
+/* Alternate function option register 2 (TIMx_AF2) */
+
+#define ATIM_AF1_BK2INE           (1 << 0)  /* Bit 0: BRK2 BKIN input enable */
+#define ATIM_AF1_BK2DFBKE         (1 << 8)  /* Bit 8: BRK2 DFSDM_BREAK enable */
+#define ATIM_AF1_BK2INP           (1 << 9)  /* Bit 9: BRK2 BKIN2 input polarity */
+
+/* Break and dead-time register */
+
+#define ATIM_BDTR_DTG_SHIFT       (0)       /* Bits 7:0 [7:0]: Dead-Time Generator set-up */
+#define ATIM_BDTR_DTG_MASK        (0xff << ATIM_BDTR_DTG_SHIFT)
+#define ATIM_BDTR_LOCK_SHIFT      (8)       /* Bits 9:8 [1:0]: Lock Configuration */
+#define ATIM_BDTR_LOCK_MASK       (3 << ATIM_BDTR_LOCK_SHIFT)
+#  define ATIM_BDTR_LOCKOFF       (0 << ATIM_BDTR_LOCK_SHIFT) /* 00: LOCK OFF - No bit is write protected */
+#  define ATIM_BDTR_LOCK1         (1 << ATIM_BDTR_LOCK_SHIFT) /* 01: LOCK Level 1 protection */
+#  define ATIM_BDTR_LOCK2         (2 << ATIM_BDTR_LOCK_SHIFT) /* 10: LOCK Level 2 protection */
+#  define ATIM_BDTR_LOCK3         (3 << ATIM_BDTR_LOCK_SHIFT) /* 11: LOCK Level 3 protection */ */
+#define ATIM_BDTR_OSSI            (1 << 10) /* Bit 10: Off-State Selection for Idle mode */
+#define ATIM_BDTR_OSSR            (1 << 11) /* Bit 11: Off-State Selection for Run mode */
+#define ATIM_BDTR_BKE             (1 << 12) /* Bit 12: Break enable */
+#define ATIM_BDTR_BKP             (1 << 13) /* Bit 13: Break Polarity */
+#define ATIM_BDTR_AOE             (1 << 14) /* Bit 14: Automatic Output enable */
+#define ATIM_BDTR_MOE             (1 << 15) /* Bit 15: Main Output enable */
+#define ATIM_BDTR_BKF_SHIFT       (16)      /* Bits 16-19: Break filter */
+#define ATIM_BDTR_BKF_MASK        (0xf << ATIM_BDTR_BKF_SHIFT)
+#  define ATIM_BDTR_BKF_NOFILT    (0 << ATIM_BDTR_BKF_SHIFT)   /* 0000: No filter, BRK acts asynchronously */
+#  define ATIM_BDTR_BKF_FCKINT2   (1 << ATIM_BDTR_BKF_SHIFT)   /* 0001: fSAMPLING=fCK_INT, N=2 */
+#  define ATIM_BDTR_BKF_FCKINT4   (2 << ATIM_BDTR_BKF_SHIFT)   /* 0010: fSAMPLING=fCK_INT, N=4 */
+#  define ATIM_BDTR_BKF_FCKINT8   (3 << ATIM_BDTR_BKF_SHIFT)   /* 0011: fSAMPLING=fCK_INT, N=8 */
+#  define ATIM_BDTR_BKF_FDTSd26   (4 << ATIM_BDTR_BKF_SHIFT)   /* 0100: fSAMPLING=fDTS/2, N=6 */
+#  define ATIM_BDTR_BKF_FDTSd28   (5 << ATIM_BDTR_BKF_SHIFT)   /* 0101: fSAMPLING=fDTS/2, N=8 */
+#  define ATIM_BDTR_BKF_FDTSd36   (6 << ATIM_BDTR_BKF_SHIFT)   /* 0110: fSAMPLING=fDTS/4, N=6 */
+#  define ATIM_BDTR_BKF_FDTSd38   (7 << ATIM_BDTR_BKF_SHIFT)   /* 0111: fSAMPLING=fDTS/4, N=8 */
+#  define ATIM_BDTR_BKF_FDTSd86   (8 << ATIM_BDTR_BKF_SHIFT)   /* 1000: fSAMPLING=fDTS/8, N=6 */
+#  define ATIM_BDTR_BKF_FDTSd88   (9 << ATIM_BDTR_BKF_SHIFT)   /* 1001: fSAMPLING=fDTS/8, N=8 */
+#  define ATIM_BDTR_BKF_FDTSd165  (10 << ATIM_BDTR_BKF_SHIFT)  /* 1010: fSAMPLING=fDTS/16, N=5 */
+#  define ATIM_BDTR_BKF_FDTSd166  (11 << ATIM_BDTR_BKF_SHIFT)  /* 1011: fSAMPLING=fDTS/16, N=6 */
+#  define ATIM_BDTR_BKF_FDTSd168  (12 << ATIM_BDTR_BKF_SHIFT)  /* 1100: fSAMPLING=fDTS/16, N=8 */
+#  define ATIM_BDTR_BKF_FDTSd325  (13 << ATIM_BDTR_BKF_SHIFT)  /* 1101: fSAMPLING=fDTS/32, N=5 */
+#  define ATIM_BDTR_BKF_FDTSd326  (14 << ATIM_BDTR_BKF_SHIFT)  /* 1110: fSAMPLING=fDTS/32, N=6 */
+#  define ATIM_BDTR_BKF_FDTSd328  (15 << ATIM_BDTR_BKF_SHIFT)  /* 1111: fSAMPLING=fDTS/32, N=8 */
+#define ATIM_BDTR_BK2F_SHIFT      (20)      /* Bits 20-23: Break 2 filter */
+#define ATIM_BDTR_BK2F_MASK       (0xf << ATIM_BDTR_BK2F_SHIFT)
+#  define ATIM_BDTR_BK2F_NOFILT   (0 << ATIM_BDTR_BK2F_SHIFT)  /* 0000: No filter, BRK 2 acts asynchronously */
+#  define ATIM_BDTR_BK2F_FCKINT2  (1 << ATIM_BDTR_BK2F_SHIFT)  /* 0001: fSAMPLING=fCK_INT, N=2 */
+#  define ATIM_BDTR_BK2F_FCKINT4  (2 << ATIM_BDTR_BK2F_SHIFT)  /* 0010: fSAMPLING=fCK_INT, N=4 */
+#  define ATIM_BDTR_BK2F_FCKINT8  (3 << ATIM_BDTR_BK2F_SHIFT)  /* 0011: fSAMPLING=fCK_INT, N=8 */
+#  define ATIM_BDTR_BK2F_FDTSd26  (4 << ATIM_BDTR_BK2F_SHIFT)  /* 0100: fSAMPLING=fDTS/2, N=6 */
+#  define ATIM_BDTR_BK2F_FDTSd28  (5 << ATIM_BDTR_BK2F_SHIFT)  /* 0101: fSAMPLING=fDTS/2, N=8 */
+#  define ATIM_BDTR_BK2F_FDTSd36  (6 << ATIM_BDTR_BK2F_SHIFT)  /* 0110: fSAMPLING=fDTS/4, N=6 */
+#  define ATIM_BDTR_BK2F_FDTSd38  (7 << ATIM_BDTR_BK2F_SHIFT)  /* 0111: fSAMPLING=fDTS/4, N=8 */
+#  define ATIM_BDTR_BK2F_FDTSd86  (8 << ATIM_BDTR_BK2F_SHIFT)  /* 1000: fSAMPLING=fDTS/8, N=6 */
+#  define ATIM_BDTR_BK2F_FDTSd88  (9 << ATIM_BDTR_BK2F_SHIFT)  /* 1001: fSAMPLING=fDTS/8, N=8 */
+#  define ATIM_BDTR_BK2F_FDTSd165 (10 << ATIM_BDTR_BK2F_SHIFT) /* 1010: fSAMPLING=fDTS/16, N=5 */
+#  define ATIM_BDTR_BK2F_FDTSd166 (11 << ATIM_BDTR_BK2F_SHIFT) /* 1011: fSAMPLING=fDTS/16, N=6 */
+#  define ATIM_BDTR_BK2F_FDTSd168 (12 << ATIM_BDTR_BK2F_SHIFT) /* 1100: fSAMPLING=fDTS/16, N=8 */
+#  define ATIM_BDTR_BK2F_FDTSd325 (13 << ATIM_BDTR_BK2F_SHIFT) /* 1101: fSAMPLING=fDTS/32, N=5 */
+#  define ATIM_BDTR_BK2F_FDTSd326 (14 << ATIM_BDTR_BK2F_SHIFT) /* 1110: fSAMPLING=fDTS/32, N=6 */
+#  define ATIM_BDTR_BK2F_FDTSd328 (15 << ATIM_BDTR_BK2F_SHIFT) /* 1111: fSAMPLING=fDTS/32, N=8 */
+#define ATIM_BDTR_BK2E            (1 << 24) /* Bit 24: Break 2 enable */
+#define ATIM_BDTR_BK2P            (1 << 1525 /* Bit 25:Break 2 polarity */
+
+
+/* DMA control register */
+
+#define ATIM_DCR_DBA_SHIFT        (0)       /* Bits 4-0: DMA Base Address */
+#define ATIM_DCR_DBA_MASK         (0x1f << ATIM_DCR_DBA_SHIFT)
+#define ATIM_DCR_DBL_SHIFT        (8)       /* Bits 12-8: DMA Burst Length */
+#define ATIM_DCR_DBL_MASK         (0x1f << ATIM_DCR_DBL_SHIFT)
+#  define ATIM_DCR_DBL(n)         (((n)-1) << ATIM_DCR_DBL_SHIFT) /* n transfers, n = 1..18 */
+
+/* Control register 1 (TIM2-5 and TIM9-14) */
+
+#define GTIM_CR1_CEN              (1 << 0)  /* Bit 0: Counter enable */
+#define GTIM_CR1_UDIS             (1 << 1)  /* Bit 1: Update Disable */
+#define GTIM_CR1_URS              (1 << 2)  /* Bit 2: Update Request Source */
+#define GTIM_CR1_OPM              (1 << 3)  /* Bit 3: One Pulse Mode (TIM2-5, 9, and 12 only) */
+#define GTIM_CR1_DIR              (1 << 4)  /* Bit 4: Direction (TIM2-5 only) */
+#define GTIM_CR1_CMS_SHIFT        (5)       /* Bits 6-5: Center-aligned Mode Selection (TIM2-5 only) */
+#define GTIM_CR1_CMS_MASK         (3 << GTIM_CR1_CMS_SHIFT)
+#  define GTIM_CR1_EDGE           (0 << GTIM_CR1_CMS_SHIFT) /* 00: Edge-aligned mode.  */
+#  define GTIM_CR1_CENTER1        (1 << GTIM_CR1_CMS_SHIFT) /* 01: Center-aligned mode 1 */
+#  define GTIM_CR1_CENTER2        (2 << GTIM_CR1_CMS_SHIFT) /* 10: Center-aligned mode 2 */
+#  define GTIM_CR1_CENTER3        (3 << GTIM_CR1_CMS_SHIFT) /* 11: Center-aligned mode 3 */
+#define GTIM_CR1_ARPE             (1 << 7)  /* Bit 7: Auto-Reload Preload enable */
+#define GTIM_CR1_CKD_SHIFT        (8)       /* Bits 9-8: Clock Division */
+#define GTIM_CR1_CKD_MASK         (3 << GTIM_CR1_CKD_SHIFT)
+#  define GTIM_CR1_TCKINT         (0 << GTIM_CR1_CKD_SHIFT) /* 00: tDTS = tCK_INT */
+#  define GTIM_CR1_2TCKINT        (1 << GTIM_CR1_CKD_SHIFT) /* 01: tDTS = 2 x tCK_INT */
+#  define GTIM_CR1_4TCKINT        (2 << GTIM_CR1_CKD_SHIFT) /* 10: tDTS = 4 x tCK_INT */
+#define GTIM_CR1_UIFREMAP         (1 << 11) /* Bit 11: UIF status bit remapping */
+
+/* Control register 2 (TIM2-5, TIM9-12) */
+
+#define GTIM_CR2_CCPC             (1 << 0)  /* Bit 0: Capture/compare preloaded control (TIM15-17 only) */
+#define GTIM_CR2_CCUS             (1 << 2)  /* Bit 2: Capture/compare control update selection (TIM15-17 only) */
+#define GTIM_CR2_CCDS             (1 << 3)  /* Bit 3: Capture/Compare DMA Selection (TIM2-5,1,&16 only) */
+#define GTIM_CR2_MMS_SHIFT        (4)       /* Bits 6-4: Master Mode Selection (not TIM16) */
+#define GTIM_CR2_MMS_MASK         (7 << GTIM_CR2_MMS_SHIFT)
+#  define GTIM_CR2_MMS_RESET      (0 << GTIM_CR2_MMS_SHIFT) /* 000: Reset */
+#  define GTIM_CR2_MMS_ENABLE     (1 << GTIM_CR2_MMS_SHIFT) /* 001: Enable */
+#  define GTIM_CR2_MMS_UPDATE     (2 << GTIM_CR2_MMS_SHIFT) /* 010: Update */
+#  define GTIM_CR2_MMS_COMPP      (3 << GTIM_CR2_MMS_SHIFT) /* 011: Compare Pulse */
+#  define GTIM_CR2_MMS_OC1REF     (4 << GTIM_CR2_MMS_SHIFT) /* 100: Compare - OC1REF signal is used as trigger output (TRGO) */
+#  define GTIM_CR2_MMS_OC2REF     (5 << GTIM_CR2_MMS_SHIFT) /* 101: Compare - OC2REF signal is used as trigger output (TRGO) */
+#  define GTIM_CR2_MMS_OC3REF     (6 << GTIM_CR2_MMS_SHIFT) /* 110: Compare - OC3REF signal is used as trigger output (TRGO, TIM2-5 and TIM15 only) */
+#  define GTIM_CR2_MMS_OC4REF     (7 << GTIM_CR2_MMS_SHIFT) /* 111: Compare - OC4REF signal is used as trigger output (TRGO, TIM2-5 and TIM15 only) */
+#define GTIM_CR2_TI1S             (1 << 7)  /* Bit 7: TI1 Selection (not TIM16) */
+#define GTIM_CR2_OIS1             (1 << 8)  /* Bit 8: COutput Idle state 1 (OC1 output) (TIM15-17 only) */
+#define GTIM_CR2_OIS1N            (1 << 9)  /* Bit 9: Output Idle state 1 (OC1N output) (TIM15-17 only) */
+#define GTIM_CR2_OIS2             (1 << 10) /* Bit 10: Output idle state 2 (OC2 output) (TIM15 only) */
+
+/* Slave mode control register (TIM2-5) */
+
+#define GTIM_SMCR_SMS_SHIFT       (0)       /* Bits 2-0: Slave Mode Selection */
+#define GTIM_SMCR_SMS_MASK        (7 << GTIM_SMCR_SMS_SHIFT)
+#  define GTIM_SMCR_DISAB         (0 << GTIM_SMCR_SMS_SHIFT) /* 000: Slave mode disabled */
+#  define GTIM_SMCR_ENCMD1        (1 << GTIM_SMCR_SMS_SHIFT) /* 001: Encoder mode 1 */
+#  define GTIM_SMCR_ENCMD2        (2 << GTIM_SMCR_SMS_SHIFT) /* 010: Encoder mode 2 */
+#  define GTIM_SMCR_ENCMD3        (3 << GTIM_SMCR_SMS_SHIFT) /* 011: Encoder mode 3 */
+#  define GTIM_SMCR_RESET         (4 << GTIM_SMCR_SMS_SHIFT) /* 100: Reset Mode  */
+#  define GTIM_SMCR_GATED         (5 << GTIM_SMCR_SMS_SHIFT) /* 101: Gated Mode  */
+#  define GTIM_SMCR_TRIGGER       (6 << GTIM_SMCR_SMS_SHIFT) /* 110: Trigger Mode */
+#  define GTIM_SMCR_EXTCLK1       (7 << GTIM_SMCR_SMS_SHIFT) /* 111: External Clock Mode 1 */
+#define GTIM_SMCR_TS_SHIFT        (4)       /* Bits 6-4: Trigger Selection */
+#define GTIM_SMCR_TS_MASK         (7 << GTIM_SMCR_TS_SHIFT)
+#  define GTIM_SMCR_ITR0          (0 << GTIM_SMCR_TS_SHIFT) /* 000: Internal Trigger 0 (ITR0). TIM1 */
+#  define GTIM_SMCR_ITR1          (1 << GTIM_SMCR_TS_SHIFT) /* 001: Internal Trigger 1 (ITR1). TIM2 */
+#  define GTIM_SMCR_ITR2          (2 << GTIM_SMCR_TS_SHIFT) /* 010: Internal Trigger 2 (ITR2). TIM3 */
+#  define GTIM_SMCR_ITR3          (3 << GTIM_SMCR_TS_SHIFT) /* 011: Internal Trigger 3 (ITR3). TIM4 */
+#  define GTIM_SMCR_TI1FED        (4 << GTIM_SMCR_TS_SHIFT) /* 100: TI1 Edge Detector (TI1F_ED) */
+#  define GTIM_SMCR_TI1FP1        (5 << GTIM_SMCR_TS_SHIFT) /* 101: Filtered Timer Input 1 (TI1FP1) */
+#  define GTIM_SMCR_TI2FP2        (6 << GTIM_SMCR_TS_SHIFT) /* 110: Filtered Timer Input 2 (TI2FP2) */
+#  define GTIM_SMCR_ETRF          (7 << GTIM_SMCR_TS_SHIFT) /* 111: External Trigger input (ETRF) */
+#define GTIM_SMCR_MSM             (1 << 7)  /* Bit 7: Master/Slave mode */
+#define GTIM_SMCR_ETF_SHIFT       (8)       /* Bits 11-8: External Trigger Filter (not TIM15) */
+#define GTIM_SMCR_ETF_MASK        (0x0f << GTIM_SMCR_ETF_SHIFT)
+#  define GTIM_SMCR_NOFILT        (0 << GTIM_SMCR_ETF_SHIFT)  /* 0000: No filter, sampling is done at fDTS */
+#  define GTIM_SMCR_FCKINT2       (1 << GTIM_SMCR_ETF_SHIFT)  /* 0001: fSAMPLING=fCK_INT, N=2 */
+#  define GTIM_SMCR_FCKINT4       (2 << GTIM_SMCR_ETF_SHIFT)  /* 0010: fSAMPLING=fCK_INT, N=4 */
+#  define GTIM_SMCR_FCKINT8       (3 << GTIM_SMCR_ETF_SHIFT)  /* 0011: fSAMPLING=fCK_INT, N=8 */
+#  define GTIM_SMCR_FDTSd26       (4 << GTIM_SMCR_ETF_SHIFT)  /* 0100: fSAMPLING=fDTS/2, N=6 */
+#  define GTIM_SMCR_FDTSd28       (5 << GTIM_SMCR_ETF_SHIFT)  /* 0101: fSAMPLING=fDTS/2, N=8 */
+#  define GTIM_SMCR_FDTSd36       (6 << GTIM_SMCR_ETF_SHIFT)  /* 0110: fSAMPLING=fDTS/4, N=6 */
+#  define GTIM_SMCR_FDTSd38       (7 << GTIM_SMCR_ETF_SHIFT)  /* 0111: fSAMPLING=fDTS/4, N=8 */
+#  define GTIM_SMCR_FDTSd86       (8 << GTIM_SMCR_ETF_SHIFT)  /* 1000: fSAMPLING=fDTS/8, N=6 */
+#  define GTIM_SMCR_FDTSd88       (9 << GTIM_SMCR_ETF_SHIFT)  /* 1001: fSAMPLING=fDTS/8, N=8 */
+#  define GTIM_SMCR_FDTSd165      (10 << GTIM_SMCR_ETF_SHIFT) /* 1010: fSAMPLING=fDTS/16, N=5 */
+#  define GTIM_SMCR_FDTSd166      (11 << GTIM_SMCR_ETF_SHIFT) /* 1011: fSAMPLING=fDTS/16, N=6 */
+#  define GTIM_SMCR_FDTSd168      (12 << GTIM_SMCR_ETF_SHIFT) /* 1100: fSAMPLING=fDTS/16, N=8 */
+#  define GTIM_SMCR_FDTSd325      (13 << GTIM_SMCR_ETF_SHIFT) /* 1101: fSAMPLING=fDTS/32, N=5 */
+#  define GTIM_SMCR_FDTSd326      (14 << GTIM_SMCR_ETF_SHIFT) /* 1110: fSAMPLING=fDTS/32, N=6 */
+#  define GTIM_SMCR_FDTSd328      (15 << GTIM_SMCR_ETF_SHIFT) /* 1111: fSAMPLING=fDTS/32, N=8 */
+#define GTIM_SMCR_ETPS_SHIFT      (12)      /* Bits 13-12: External Trigger Prescaler (not TIM15) */
+#define GTIM_SMCR_ETPS_MASK       (3 << GTIM_SMCR_ETPS_SHIFT)
+#  define GTIM_SMCR_PSCOFF        (0 << GTIM_SMCR_ETPS_SHIFT) /* 00: Prescaler OFF */
+#  define GTIM_SMCR_ETRPd2        (1 << GTIM_SMCR_ETPS_SHIFT) /* 01: ETRP frequency divided by 2 */
+#  define GTIM_SMCR_ETRPd4        (2 << GTIM_SMCR_ETPS_SHIFT) /* 10: ETRP frequency divided by 4 */
+#  define GTIM_SMCR_ETRPd8        (3 << GTIM_SMCR_ETPS_SHIFT) /* 11: ETRP frequency divided by 8 */
+#define GTIM_SMCR_ECE             (1 << 14) /* Bit 14: External Clock enable */
+#define GTIM_SMCR_ETP             (1 << 15) /* Bit 15: External Trigger Polarity */
+#define GTIM_SMCR_SMS             (1 << 16) /* Bit 16: Slave mode selection - bit 3 */
+
+/* DMA/Interrupt enable register (TIM2-5 and TIM9-14) */
+
+#define GTIM_DIER_UIE             (1 << 0)  /* Bit 0: Update interrupt enable */
+#define GTIM_DIER_CC1IE           (1 << 1)  /* Bit 1: Capture/Compare 1 interrupt enable */
+#define GTIM_DIER_CC2IE           (1 << 2)  /* Bit 2: Capture/Compare 2 interrupt enable (TIM2-5,9,12,&15 only) */
+#define GTIM_DIER_CC3IE           (1 << 3)  /* Bit 3: Capture/Compare 3 interrupt enable (TIM2-5 only) */
+#define GTIM_DIER_CC4IE           (1 << 4)  /* Bit 4: Capture/Compare 4 interrupt enable (TIM2-5 only) */
+#define GTIM_DIER_COMIE           (1 << 5)  /* Bit 5: COM interrupt enable (TIM15-17 only) */
+#define GTIM_DIER_TIE             (1 << 6)  /* Bit 6: Trigger interrupt enable (TIM2-5,9,&12 only) */
+#define GTIM_DIER_BIE             (1 << 7)  /* Bit 7: Break interrupt enable (TIM15-17 only) */
+#define GTIM_DIER_UDE             (1 << 8)  /* Bit 8: Update DMA request enable (TIM2-5&15-17 only) */
+#define GTIM_DIER_CC1DE           (1 << 9)  /* Bit 9: Capture/Compare 1 DMA request enable (TIM2-5&15-17 only) */
+#define GTIM_DIER_CC2DE           (1 << 10) /* Bit 10: Capture/Compare 2 DMA request enable (TIM2-5&15 only) */
+#define GTIM_DIER_CC3DE           (1 << 11) /* Bit 11: Capture/Compare 3 DMA request enable (TIM2-5 only) */
+#define GTIM_DIER_CC4DE           (1 << 12) /* Bit 12: Capture/Compare 4 DMA request enable (TIM2-5 only) */
+#define GTIM_DIER_COMDE           (1 << 13) /* Bit 13: COM DMA request enable (TIM15-17 only) */
+#define GTIM_DIER_TDE             (1 << 14) /* Bit 14: Trigger DMA request enable (TIM2-5&15-17 only) */
+
+/* Status register */
+
+#define GTIM_SR_UIF               (1 << 0)  /* Bit 0: Update interrupt flag */
+#define GTIM_SR_CC1IF             (1 << 1)  /* Bit 1: Capture/compare 1 interrupt flag */
+#define GTIM_SR_CC2IF             (1 << 2)  /* Bit 2: Capture/Compare 2 interrupt flag (TIM2-5,9,12,&15 only) */
+#define GTIM_SR_CC3IF             (1 << 3)  /* Bit 3: Capture/Compare 3 interrupt flag (TIM2-5 only) */
+#define GTIM_SR_CC4IF             (1 << 4)  /* Bit 4: Capture/Compare 4 interrupt flag (TIM2-5 only) */
+#define GTIM_SR_COMIF             (1 << 5)  /* Bit 5: COM interrupt flag (TIM15-17 only) */
+#define GTIM_SR_TIF               (1 << 6)  /* Bit 6: Trigger interrupt Flag (TIM2-5,9,12&15-17 only) */
+#define GTIM_SR_BIF               (1 << 7)  /* Bit 7: Break interrupt flag (TIM15-17 only) */
+#define GTIM_SR_CC1OF             (1 << 9)  /* Bit 9: Capture/Compare 1 Overcapture flag */
+#define GTIM_SR_CC2OF             (1 << 10) /* Bit 10: Capture/Compare 2 Overcapture flag (TIM2-5,9,12&15 only) */
+#define GTIM_SR_CC3OF             (1 << 11) /* Bit 11: Capture/Compare 3 Overcapture flag (TIM2-5 only) */
+#define GTIM_SR_CC4OF             (1 << 12) /* Bit 12: Capture/Compare 4 Overcapture flag (TIM2-5 only) */
+
+/* Event generation register (TIM2-5 and TIM9-14) */
+
+#define GTIM_EGR_UG               (1 << 0)  /* Bit 0: Update generation */
+#define GTIM_EGR_CC1G             (1 << 1)  /* Bit 1: Capture/compare 1 generation */
+#define GTIM_EGR_CC2G             (1 << 2)  /* Bit 2: Capture/compare 2 generation (TIM2-5,9,12,&15 only) */
+#define GTIM_EGR_CC3G             (1 << 3)  /* Bit 3: Capture/compare 3 generation (TIM2-5 only) */
+#define GTIM_EGR_CC4G             (1 << 4)  /* Bit 4: Capture/compare 4 generation (TIM2-5 only) */
+#define GTIM_EGR_COMIG            (1 << 5)  /* Bit 5: Capture/Compare control update generation (TIM15-17 only) */
+#define GTIM_EGR_TG               (1 << 6)  /* Bit 6: Trigger generation (TIM2-5,9,12&16-17 only) */
+#define GTIM_EGR_BG               (1 << 7)  /* Bit 7: Break generation (TIM15-17 only) */
+
+/* Capture/compare mode register 1 - Output compare mode (TIM2-5 and TIM9-14) */
+
+#define GTIM_CCMR1_CC1S_SHIFT     (0)       /* Bits 1-0: Capture/Compare 1 Selection */
+#define GTIM_CCMR1_CC1S_MASK      (3 << GTIM_CCMR1_CC1S_SHIFT)
+                                            /* (See common CCMR Capture/Compare Selection definitions below) */
+#define GTIM_CCMR1_OC1FE          (1 << 2)  /* Bit 2: Output Compare 1 Fast enable */
+#define GTIM_CCMR1_OC1PE          (1 << 3)  /* Bit 3: Output Compare 1 Preload enable */
+#define GTIM_CCMR1_OC1M_SHIFT     (4)       /* Bits 6-4: Output Compare 1 Mode */
+#define GTIM_CCMR1_OC1M_MASK      (7 << GTIM_CCMR1_OC1M_SHIFT)
+                                            /* (See common CCMR Output Compare Mode definitions below) */
+#define GTIM_CCMR1_OC1CE          (1 << 7)  /* Bit 7: Output Compare 1Clear Enable */
+#define GTIM_CCMR1_CC2S_SHIFT     (8)       /* Bits 9-8: Capture/Compare 2 Selection */
+#define GTIM_CCMR1_CC2S_MASK      (3 << GTIM_CCMR1_CC2S_SHIFT)
+                                            /* (See common CCMR Capture/Compare Selection definitions below) */
+#define GTIM_CCMR1_OC2FE          (1 << 10) /* Bit 10: Output Compare 2 Fast enable */
+#define GTIM_CCMR1_OC2PE          (1 << 11) /* Bit 11: Output Compare 2 Preload enable */
+#define GTIM_CCMR1_OC2M_SHIFT     (12)      /* Bits 14-12: Output Compare 2 Mode */
+#define GTIM_CCMR1_OC2M_MASK      (7 << GTIM_CCMR1_OC2M_SHIFT)
+                                            /* (See common CCMR Output Compare Mode definitions below) */
+#define GTIM_CCMR1_OC2CE          (1 << 15) /* Bit 15: Output Compare 2 Clear Enable */
+#define GTIM_CCMR1_OC1M           (1 << 16) /* Bit 16: Output Compare 1 mode - bit 3 */
+#define GTIM_CCMR1_OC2M           (1 << 24) /* Bit 24: Output Compare 2 mode - bit 3 */
+
+/* Common CCMR (unshifted) Capture/Compare Selection bit-field definitions */
+
+#define GTIM_CCMR_CCS_CCOUT       (0)       /* 00: CCx channel output */
+#define GTIM_CCMR_CCS_CCIN1       (1)       /* 01: CCx channel input, ICx is TIx */
+#define GTIM_CCMR_CCS_CCIN2       (2)       /* 10: CCx channel input, ICx is TIy */
+#define GTIM_CCMR_CCS_CCINTRC     (3)       /* 11: CCx channel input, ICx is TRC */
+
+/* Common CCMR (unshifted) Compare Mode bit field definitions */
+
+#define GTIM_CCMR_MODE_FRZN       (0)       /* 000: Frozen */
+#define GTIM_CCMR_MODE_CHACT      (1)       /* 001: Channel x active on match */
+#define GTIM_CCMR_MODE_CHINACT    (2)       /* 010: Channel x inactive on match */
+#define GTIM_CCMR_MODE_OCREFTOG   (3)       /* 011: OCxREF toggle ATIM_CNT=ATIM_CCRx */
+#define GTIM_CCMR_MODE_OCREFLO    (4)       /* 100: OCxREF forced low */
+#define GTIM_CCMR_MODE_OCREFHI    (5)       /* 101: OCxREF forced high */
+#define GTIM_CCMR_MODE_PWM1       (6)       /* 110: PWM mode 1 */
+#define GTIM_CCMR_MODE_PWM2       (7)       /* 111: PWM mode 2 */
+
+/* Capture/compare mode register 1 - Input capture mode (TIM2-5 and TIM9-14) */
+
+                                            /* Bits 1-0 (Same as Output Compare Mode) */
+#define GTIM_CCMR1_IC1PSC_SHIFT   (2)       /* Bits 3-2: Input Capture 1 Prescaler */
+#define GTIM_CCMR1_IC1PSC_MASK    (3 << GTIM_CCMR1_IC1PSC_SHIFT)
+                                            /* (See common CCMR Input Capture Prescaler definitions below) */
+#define GTIM_CCMR1_IC1F_SHIFT     (4)       /* Bits 7-4: Input Capture 1 Filter */
+#define GTIM_CCMR1_IC1F_MASK      (0x0f << GTIM_CCMR1_IC1F_SHIFT)
+                                            /* (See common CCMR Input Capture Filter definitions below) */
+                                            /* Bits 9-8: (Same as Output Compare Mode) */
+#define GTIM_CCMR1_IC2PSC_SHIFT   (10)      /* Bits 11-10: Input Capture 2 Prescaler */
+#define GTIM_CCMR1_IC2PSC_MASK    (3 << GTIM_CCMR1_IC2PSC_SHIFT)
+                                            /* (See common CCMR Input Capture Prescaler definitions below) */
+#define GTIM_CCMR1_IC2F_SHIFT     (12)      /* Bits 15-12: Input Capture 2 Filter */
+#define GTIM_CCMR1_IC2F_MASK      (0x0f << GTIM_CCMR1_IC2F_SHIFT)
+                                            /* (See common CCMR Input Capture Filter definitions below) */
+
+/* Common CCMR (unshifted) Input Capture Prescaler bit-field definitions */
+
+#define GTIM_CCMR_ICPSC_NOPSC     (0)       /* 00: no prescaler, capture each edge */
+#define GTIM_CCMR_ICPSC_EVENTS2   (1)       /* 01: capture once every 2 events */
+#define GTIM_CCMR_ICPSC_EVENTS4   (2)       /* 10: capture once every 4 events */
+#define GTIM_CCMR_ICPSC_EVENTS8   (3)       /* 11: capture once every 8 events */
+
+/* Common CCMR (unshifted) Input Capture Filter bit-field definitions */
+
+#define GTIM_CCMR_ICF_NOFILT      (0)       /* 0000: No filter, sampling at fDTS */
+#define GTIM_CCMR_ICF_FCKINT2     (1)       /* 0001: fSAMPLING=fCK_INT, N=2 */
+#define GTIM_CCMR_ICF_FCKINT4     (2)       /* 0010: fSAMPLING=fCK_INT, N=4 */
+#define GTIM_CCMR_ICF_FCKINT8     (3)       /* 0011: fSAMPLING=fCK_INT, N=8 */
+#define GTIM_CCMR_ICF_FDTSd26     (4)       /* 0100: fSAMPLING=fDTS/2, N=6 */
+#define GTIM_CCMR_ICF_FDTSd28     (5)       /* 0101: fSAMPLING=fDTS/2, N=8 */
+#define GTIM_CCMR_ICF_FDTSd46     (6)       /* 0110: fSAMPLING=fDTS/4, N=6 */
+#define GTIM_CCMR_ICF_FDTSd48     (7)       /* 0111: fSAMPLING=fDTS/4, N=8 */
+#define GTIM_CCMR_ICF_FDTSd86     (8)       /* 1000: fSAMPLING=fDTS/8, N=6 */
+#define GTIM_CCMR_ICF_FDTSd88     (9)       /* 1001: fSAMPLING=fDTS/8, N=8 */
+#define GTIM_CCMR_ICF_FDTSd165    (10)      /* 1010: fSAMPLING=fDTS/16, N=5 */
+#define GTIM_CCMR_ICF_FDTSd166    (11)      /* 1011: fSAMPLING=fDTS/16, N=6 */
+#define GTIM_CCMR_ICF_FDTSd168    (12)      /* 1100: fSAMPLING=fDTS/16, N=8 */
+#define GTIM_CCMR_ICF_FDTSd325    (13)      /* 1101: fSAMPLING=fDTS/32, N=5 */
+#define GTIM_CCMR_ICF_FDTSd326    (14)      /* 1110: fSAMPLING=fDTS/32, N=6 */
+#define GTIM_CCMR_ICF_FDTSd328    (15)      /* 1111: fSAMPLING=fDTS/32, N=8 */
+
+/* Capture/compare mode register 2 - Output Compare mode (TIM2-5 only) */
+
+#define GTIM_CCMR2_CC3S_SHIFT     (0)       /* Bits 1-0: Capture/Compare 3 Selection */
+#define GTIM_CCMR2_CC3S_MASK      (3 << GTIM_CCMR2_CC3S_SHIFT)
+                                            /* (See common CCMR Capture/Compare Selection definitions above) */
+#define GTIM_CCMR2_OC3FE          (1 << 2)  /* Bit 2: Output Compare 3 Fast enable */
+#define GTIM_CCMR2_OC3PE          (1 << 3)  /* Bit 3: Output Compare 3 Preload enable */
+#define GTIM_CCMR2_OC3M_SHIFT     (4)       /* Bits 6-4: Output Compare 3 Mode */
+#define GTIM_CCMR2_OC3M_MASK      (7 << GTIM_CCMR2_OC3M_SHIFT)
+                                            /* (See common CCMR Output Compare Mode definitions above) */
+#define GTIM_CCMR2_OC3CE          (1 << 7)  /* Bit 7: Output Compare 3 Clear Enable */
+#define GTIM_CCMR2_CC4S_SHIFT     (8)       /* Bits 9-8: Capture/Compare 4 Selection */
+#define GTIM_CCMR2_CC4S_MASK      (3 << GTIM_CCMR2_CC4S_SHIFT)
+                                            /* (See common CCMR Capture/Compare Selection definitions above) */
+#define GTIM_CCMR2_OC4FE          (1 << 10) /* Bit 10: Output Compare 4 Fast enable */
+#define GTIM_CCMR2_OC4PE          (1 << 11) /* Bit 11: Output Compare 4 Preload enable */
+#define GTIM_CCMR2_OC4M_SHIFT     (12)      /* Bits 14-12: Output Compare 4 Mode */
+#define GTIM_CCMR2_OC4M_MASK      (7 << GTIM_CCMR2_OC4M_SHIFT)
+                                            /* (See common CCMR Output Compare Mode definitions above) */
+#define GTIM_CCMR2_OC4CE          (1 << 15) /* Bit 15: Output Compare 4 Clear Enable */
+
+/* Capture/compare mode register 2 - Input capture mode (TIM2-5 only) */
+
+                                            /* Bits 1-0 (Same as Output Compare Mode) */
+#define GTIM_CCMR2_IC3PSC_SHIFT   (2)       /* Bits 3-2: Input Capture 3 Prescaler */
+#define GTIM_CCMR2_IC3PSC_MASK    (3 << GTIM_CCMR2_IC3PSC_SHIFT)
+                                            /* (See common CCMR Input Capture Prescaler definitions below) */
+#define GTIM_CCMR2_IC3F_SHIFT     (4)       /* Bits 7-4: Input Capture 3 Filter */
+#define GTIM_CCMR2_IC3F_MASK      (0x0f << GTIM_CCMR2_IC3F_SHIFT)
+                                            /* (See common CCMR Input Capture Filter definitions below) */
+                                            /* Bits 9-8: (Same as Output Compare Mode) */
+#define GTIM_CCMR2_IC4PSC_SHIFT   (10)      /* Bits 11-10: Input Capture 4 Prescaler */
+#define GTIM_CCMR2_IC4PSC_MASK    (3 << GTIM_CCMR2_IC4PSC_SHIFT)
+                                            /* (See common CCMR Input Capture Prescaler definitions below) */
+#define GTIM_CCMR2_IC4F_SHIFT     (12)      /* Bits 15-12: Input Capture 4 Filter */
+#define GTIM_CCMR2_IC4F_MASK      (0x0f << GTIM_CCMR2_IC4F_SHIFT)
+                                            /* (See common CCMR Input Capture Filter definitions below) */
+
+/* Capture/compare enable register (TIM1 and TIM8, TIM2-5 and TIM9-14) */
+
+#define GTIM_CCER_CC1E            (1 << 0)  /* Bit 0: Capture/Compare 1 output enable */
+#define GTIM_CCER_CC1P            (1 << 1)  /* Bit 1: Capture/Compare 1 output polarity */
+#define GTIM_CCER_CC1NE           (1 << 2)  /* Bit 2: Capture/Compare 1 complementary output enable (TIM1 and TIM8 only) */
+#define GTIM_CCER_CC1NP           (1 << 3)  /* Bit 3: Capture/Compare 1 output Polarity (F2,F3,F4 and TIM15-17) */
+#define GTIM_CCER_CC2E            (1 << 4)  /* Bit 4: Capture/Compare 2 output enable (TIM2-5,9&12 only) */
+#define GTIM_CCER_CC2P            (1 << 5)  /* Bit 5: Capture/Compare 2 output polarity (TIM2-5,9&12 only) */
+#define GTIM_CCER_CC2NE           (1 << 6)  /* Bit 6: Capture/Compare 2 complementary output enable (TIM1 and TIM8 only) */
+#define GTIM_CCER_CC2NP           (1 << 7)  /* Bit 7: Capture/Compare 2 output Polarity (F2,F3,F4 and TIM2-5,9,12&15 only) */
+#define GTIM_CCER_CC3E            (1 << 8)  /* Bit 8: Capture/Compare 3 output enable (TIM2-5 only) */
+#define GTIM_CCER_CC3P            (1 << 9)  /* Bit 9: Capture/Compare 3 output Polarity (TIM2-5 only) */
+#define GTIM_CCER_CC3NE           (1 << 10) /* Bit 10: Capture/Compare 3 complementary output enable (TIM1 and TIM8 only) */
+#define GTIM_CCER_CC3NP           (1 << 11) /* Bit 11: Capture/Compare 3 output Polarity (F2,F4 and TIM2-5 only) */
+#define GTIM_CCER_CC4E            (1 << 12) /* Bit 12: Capture/Compare 4 output enable (TIM2-5 only) */
+#define GTIM_CCER_CC4P            (1 << 13) /* Bit 13: Capture/Compare 4 output Polarity (TIM2-5 only) */
+#define GTIM_CCER_CC4NP           (1 << 15) /* Bit 15: Capture/Compare 4 output Polarity */
+
+/* 16-bit counter register */
+
+#define GTIM_CNT_SHIFT            (0)       /* Bits 0-15: Timer counter value */
+#define GTIM_CNT_MASK             (0xffff << ATIM_CNT_SHIFT)
+
+/* DMA control register */
+
+#define GTIM_DCR_DBA_SHIFT        (0)       /* Bits 4-0: DMA Base Address */
+#define GTIM_DCR_DBA_MASK         (0x1f << GTIM_DCR_DBA_SHIFT)
+#define GTIM_DCR_DBL_SHIFT        (8)       /* Bits 12-8: DMA Burst Length */
+#define GTIM_DCR_DBL_MASK         (0x1f << GTIM_DCR_DBL_SHIFT)
+
+/* Timer 2/5 option register */
+
+#define TIM2_OR_ITR1_RMP_SHIFT    (10)     /* Bits 10-11: Internal trigger 1 remap */
+#define TIM2_OR_ITR1_RMP_MASK     (3 << TIM2_OR_ITR1_RMP_SHIFT)
+#  define TIM2_OR_ITR1_TIM8_TRGOUT (0 << TIM2_OR_ITR1_RMP_SHIFT) /* 00: TIM2_ITR1 input connected to TIM8_TRGOUT */
+#  define TIM2_OR_ITR1_PTP        (1 << TIM2_OR_ITR1_RMP_SHIFT) /* 01: TIM2_ITR1 input connected to PTP trigger output */
+#  define TIM2_OR_ITR1_OTGFSSOF   (2 << TIM2_OR_ITR1_RMP_SHIFT) /* 10: TIM2_ITR1 input connected to OTG FS SOF */
+#  define TIM2_OR_ITR1_OTGHSSOF   (3 << TIM2_OR_ITR1_RMP_SHIFT) /* 11: TIM2_ITR1 input connected to OTG HS SOF */
+
+#define TIM5_OR_TI4_RMP_SHIFT     (6)     /* Bits 6-7: Internal trigger 4 remap */
+#define TIM5_OR_TI4_RMP_MASK      (3 << TIM5_OR_TI4_RMP_SHIFT)
+#  define TIM5_OR_TI4_GPIO        (0 << TIM5_OR_TI4_RMP_SHIFT) /* 00: TIM5_CH4 input connected to GPIO */
+#  define TIM5_OR_TI4_LSI         (1 << TIM5_OR_TI4_RMP_SHIFT) /* 01: TIM5_CH4 input connected to LSI internal clock */
+#  define TIM5_OR_TI4_LSE         (2 << TIM5_OR_TI4_RMP_SHIFT) /* 10: TIM5_CH4 input connected to LSE internal clock */
+#  define TIM5_OR_TI4_RTC         (3 << TIM5_OR_TI4_RMP_SHIFT) /* 11: TIM5_CH4 input connected to RTC output event */
+
+#define TIM11_OR_TI1_RMP_SHIFT    (6)     /* Bits 6-7: Internal trigger 4 remap */
+#define TIM11_OR_TI1_RMP_MASK     (3 << TIM11_OR_TI1_RMP_SHIFT)
+#  define TIM11_OR_TI1_GPIO       (0 << TIM11_OR_TI1_RMP_SHIFT) /* 00-11: TIM11_CH1 input connected to GPIO */
+#  define TIM11_OR_TI1_HSERTC     (3 << TIM11_OR_TI1_RMP_SHIFT) /* 11: TIM11_CH1 input connected to HSE_RTC clock */
+
+
+/* Control register 1 */
+
+#define BTIM_CR1_CEN              (1 << 0)  /* Bit 0: Counter enable */
+#define BTIM_CR1_UDIS             (1 << 1)  /* Bit 1: Update Disable */
+#define BTIM_CR1_URS              (1 << 2)  /* Bit 2: Update Request Source */
+#define BTIM_CR1_OPM              (1 << 3)  /* Bit 3: One Pulse Mode */
+#define BTIM_CR1_ARPE             (1 << 7)  /* Bit 7: Auto-Reload Preload enable */
+
+/* Control register 2 */
+
+#define BTIM_CR2_MMS_SHIFT        (4)       /* Bits 6-4: Master Mode Selection */
+#define BTIM_CR2_MMS_MASK         (7 << BTIM_CR2_MMS_SHIFT)
+#  define BTIM_CR2_RESET          (0 << BTIM_CR2_MMS_SHIFT) /* 000: Reset */
+#  define BTIM_CR2_ENAB           (1 << BTIM_CR2_MMS_SHIFT) /* 001: Enable */
+#  define BTIM_CR2_UPDT           (2 << BTIM_CR2_MMS_SHIFT) /* 010: Update */
+
+/* DMA/Interrupt enable register */
+
+#define BTIM_DIER_UIE             (1 << 0)  /* Bit 0: Update interrupt enable */
+#define BTIM_DIER_UDE             (1 << 8)  /* Bit 8: Update DMA request enable */
+
+/* Status register */
+
+#define BTIM_SR_UIF               (1 << 0)  /* Bit 0: Update interrupt flag */
+
+/* Event generation register */
+
+#define BTIM_EGR_UG               (1 << 0)  /* Bit 0: Update generation */
+
+#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XX_TIM_H */
diff --git a/arch/arm/src/stm32f7/stm32_adc.c b/arch/arm/src/stm32f7/stm32_adc.c
new file mode 100644
index 0000000000000000000000000000000000000000..df3ab7028e23098d1f3fcc78eb80a58457b4e6b8
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_adc.c
@@ -0,0 +1,1783 @@
+/****************************************************************************
+ * arch/arm/src/stm32f7/stm32_adc.c
+ *
+ *   Copyright (C) 2011, 2013, 2015-2017 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            Diego Sanchez 
+ *            Paul Alexander Patience 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "up_internal.h"
+#include "up_arch.h"
+
+#include "chip.h"
+#include "stm32_rcc.h"
+#include "stm32_tim.h"
+#include "stm32_dma.h"
+#include "stm32_adc.h"
+
+/* ADC "upper half" support must be enabled */
+
+#ifdef CONFIG_ADC
+
+/* Some ADC peripheral must be enabled */
+
+#if defined(CONFIG_STM32F7_ADC1) || defined(CONFIG_STM32F7_ADC2) || \
+    defined(CONFIG_STM32F7_ADC3)
+
+/* This implementation is for the STM32 F7[4-7] only */
+
+#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) || \
+    defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* RCC reset ****************************************************************/
+
+#define STM32_RCC_RSTR   STM32_RCC_APB2RSTR
+#define RCC_RSTR_ADC1RST RCC_APB2RSTR_ADCRST
+#define RCC_RSTR_ADC2RST RCC_APB2RSTR_ADCRST
+#define RCC_RSTR_ADC3RST RCC_APB2RSTR_ADCRST
+
+/* ADC interrupts ***********************************************************/
+
+#define STM32_ADC_DMAREG_OFFSET    STM32_ADC_CR2_OFFSET
+#define ADC_DMAREG_DMA             ADC_CR2_DMA
+#define STM32_ADC_EXTREG_OFFSET    STM32_ADC_CR2_OFFSET
+#define ADC_EXTREG_EXTSEL_MASK     ADC_CR2_EXTSEL_MASK
+#define STM32_ADC_ISR_OFFSET       STM32_ADC_SR_OFFSET
+#define STM32_ADC_IER_OFFSET       STM32_ADC_CR1_OFFSET
+#define ADC_ISR_EOC                ADC_SR_EOC
+#define ADC_IER_EOC                ADC_CR1_EOCIE
+#define ADC_ISR_AWD                ADC_SR_AWD
+#define ADC_IER_AWD                ADC_CR1_AWDIE
+#define ADC_ISR_JEOC               ADC_SR_JEOC
+#define ADC_IER_JEOC               ADC_CR1_JEOCIE
+#define ADC_EXTREG_EXTEN_MASK      ADC_CR2_EXTEN_MASK
+#define ADC_EXTREG_EXTEN_NONE      ADC_CR2_EXTEN_NONE
+#define ADC_EXTREG_EXTEN_DEFAULT   ADC_CR2_EXTEN_RISING
+#define ADC_ISR_OVR                ADC_SR_OVR
+#define ADC_IER_OVR                ADC_CR1_OVRIE
+
+#define ADC_ISR_ALLINTS (ADC_ISR_EOC | ADC_ISR_AWD | ADC_ISR_JEOC | \
+                         ADC_ISR_OVR)
+#define ADC_IER_ALLINTS (ADC_IER_EOC | ADC_IER_AWD | ADC_IER_JEOC | \
+                         ADC_IER_OVR)
+
+/* ADC Channels/DMA ********************************************************/
+/* The maximum number of channels that can be sampled.  If DMA support is
+ * not enabled, then only a single channel can be sampled.  Otherwise,
+ * data overruns would occur.
+ */
+
+#define ADC_MAX_CHANNELS_DMA   16
+#define ADC_MAX_CHANNELS_NODMA 1
+
+#ifdef ADC_HAVE_DMA
+#  define ADC_MAX_SAMPLES ADC_MAX_CHANNELS_DMA
+#else
+#  define ADC_MAX_SAMPLES ADC_MAX_CHANNELS_NODMA
+#endif
+
+#define ADC_DMA_CONTROL_WORD (DMA_SCR_MSIZE_16BITS | \
+                                DMA_SCR_PSIZE_16BITS | \
+                                DMA_SCR_MINC | \
+                                DMA_SCR_CIRC | \
+                                DMA_SCR_DIR_P2M)
+
+/* DMA channels and interface values */
+
+#define ADC_SMPR_DEFAULT    ADC_SMPR_112
+#define ADC_SMPR1_DEFAULT   ((ADC_SMPR_DEFAULT << ADC_SMPR1_SMP10_SHIFT) | \
+                               (ADC_SMPR_DEFAULT << ADC_SMPR1_SMP11_SHIFT) | \
+                               (ADC_SMPR_DEFAULT << ADC_SMPR1_SMP12_SHIFT) | \
+                               (ADC_SMPR_DEFAULT << ADC_SMPR1_SMP13_SHIFT) | \
+                               (ADC_SMPR_DEFAULT << ADC_SMPR1_SMP14_SHIFT) | \
+                               (ADC_SMPR_DEFAULT << ADC_SMPR1_SMP15_SHIFT) | \
+                               (ADC_SMPR_DEFAULT << ADC_SMPR1_SMP16_SHIFT) | \
+                               (ADC_SMPR_DEFAULT << ADC_SMPR1_SMP17_SHIFT) | \
+                               (ADC_SMPR_DEFAULT << ADC_SMPR1_SMP18_SHIFT))
+#define ADC_SMPR2_DEFAULT   ((ADC_SMPR_DEFAULT << ADC_SMPR2_SMP0_SHIFT) | \
+                               (ADC_SMPR_DEFAULT << ADC_SMPR2_SMP1_SHIFT) | \
+                               (ADC_SMPR_DEFAULT << ADC_SMPR2_SMP2_SHIFT) | \
+                               (ADC_SMPR_DEFAULT << ADC_SMPR2_SMP3_SHIFT) | \
+                               (ADC_SMPR_DEFAULT << ADC_SMPR2_SMP4_SHIFT) | \
+                               (ADC_SMPR_DEFAULT << ADC_SMPR2_SMP5_SHIFT) | \
+                               (ADC_SMPR_DEFAULT << ADC_SMPR2_SMP6_SHIFT) | \
+                               (ADC_SMPR_DEFAULT << ADC_SMPR2_SMP7_SHIFT) | \
+                               (ADC_SMPR_DEFAULT << ADC_SMPR2_SMP8_SHIFT) | \
+                               (ADC_SMPR_DEFAULT << ADC_SMPR2_SMP9_SHIFT))
+
+/* The last external channel on ADC 1 to enable Reading Vref or Vbat / Vsence */
+
+#define ADC_LAST_EXTERNAL_CHAN 15
+
+/* Assuming VDC 2.4 - 3.6 */
+
+#define ADC_MAX_FADC 36000000
+
+#if STM32_PCLK2_FREQUENCY/2 <= ADC_MAX_FADC
+# define ADC_CCR_ADCPRE_DIV     ADC_CCR_ADCPRE_DIV2
+#elif STM32_PCLK2_FREQUENCY/4 <= ADC_MAX_FADC
+# define ADC_CCR_ADCPRE_DIV     ADC_CCR_ADCPRE_DIV4
+#elif STM32_PCLK2_FREQUENCY/6 <= ADC_MAX_FADC
+# define ADC_CCR_ADCPRE_DIV     ADC_CCR_ADCPRE_DIV6
+#elif STM32_PCLK2_FREQUENCY/8 <= ADC_MAX_FADC
+# define ADC_CCR_ADCPRE_DIV     ADC_CCR_ADCPRE_DIV8
+#else
+# error "PCLK2 too high - no divisor found "
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* This structure describes the state of one ADC block */
+
+struct stm32_dev_s
+{
+  FAR const struct adc_callback_s *cb;
+  uint8_t irq;          /* Interrupt generated by this ADC block */
+  uint8_t nchannels;    /* Number of channels */
+  uint8_t cchannels;    /* Number of configured channels */
+  uint8_t intf;         /* ADC interface number */
+  uint8_t current;      /* Current ADC channel being converted */
+#ifdef ADC_HAVE_DMA
+  uint8_t dmachan;      /* DMA channel needed by this ADC */
+  bool    hasdma;       /* True: This channel supports DMA */
+#endif
+#ifdef ADC_HAVE_TIMER
+  uint8_t trigger;      /* Timer trigger channel: 0=CC1, 1=CC2, 2=CC3,
+                         * 3=CC4, 4=TRGO */
+#endif
+  xcpt_t   isr;         /* Interrupt handler for this ADC block */
+  uint32_t base;        /* Base address of registers unique to this ADC
+                         * block */
+#ifdef ADC_HAVE_TIMER
+  uint32_t tbase;       /* Base address of timer used by this ADC block */
+  uint32_t extsel;      /* EXTSEL value used by this ADC block */
+  uint32_t pclck;       /* The PCLK frequency that drives this timer */
+  uint32_t freq;        /* The desired frequency of conversions */
+#endif
+#ifdef ADC_HAVE_DMA
+  DMA_HANDLE dma;       /* Allocated DMA channel */
+
+  /* DMA transfer buffer */
+
+  uint16_t dmabuffer[ADC_MAX_SAMPLES];
+#endif
+
+  /* List of selected ADC channels to sample */
+
+  uint8_t  chanlist[ADC_MAX_SAMPLES];
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* ADC Register access */
+
+static void stm32_modifyreg32(unsigned int addr, uint32_t clrbits,
+                              uint32_t setbits);
+static uint32_t adc_getreg(FAR struct stm32_dev_s *priv, int offset);
+static void     adc_putreg(FAR struct stm32_dev_s *priv, int offset,
+                           uint32_t value);
+static void     adc_modifyreg(FAR struct stm32_dev_s *priv, int offset,
+                              uint32_t clrbits, uint32_t setbits);
+#ifdef ADC_HAVE_TIMER
+static uint16_t tim_getreg(FAR struct stm32_dev_s *priv, int offset);
+static void     tim_putreg(FAR struct stm32_dev_s *priv, int offset,
+                           uint16_t value);
+static void     tim_modifyreg(FAR struct stm32_dev_s *priv, int offset,
+                              uint16_t clrbits, uint16_t setbits);
+static void     tim_dumpregs(FAR struct stm32_dev_s *priv,
+                             FAR const char *msg);
+#endif
+
+static void adc_rccreset(FAR struct stm32_dev_s *priv, bool reset);
+
+/* ADC Interrupt Handler */
+
+static int adc_interrupt(FAR struct adc_dev_s *dev);
+static int adc123_interrupt(int irq, FAR void *context, FAR void *arg);
+
+/* ADC Driver Methods */
+
+static int  adc_bind(FAR struct adc_dev_s *dev,
+                     FAR const struct adc_callback_s *callback);
+static void adc_reset(FAR struct adc_dev_s *dev);
+static int  adc_setup(FAR struct adc_dev_s *dev);
+static void adc_shutdown(FAR struct adc_dev_s *dev);
+static void adc_rxint(FAR struct adc_dev_s *dev, bool enable);
+static int  adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg);
+static void adc_enable(FAR struct stm32_dev_s *priv, bool enable);
+
+static uint32_t adc_sqrbits(FAR struct stm32_dev_s *priv, int first, int last,
+                            int offset);
+static int      adc_set_ch(FAR struct adc_dev_s *dev, uint8_t ch);
+static bool     adc_internal(FAR struct stm32_dev_s * priv);
+
+#ifdef ADC_HAVE_TIMER
+static void adc_timstart(FAR struct stm32_dev_s *priv, bool enable);
+static int  adc_timinit(FAR struct stm32_dev_s *priv);
+#endif
+
+#ifdef ADC_HAVE_DMA
+static void adc_dmaconvcallback(DMA_HANDLE handle, uint8_t isr,
+                                FAR void *arg);
+#endif
+
+static void adc_startconv(FAR struct stm32_dev_s *priv, bool enable);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* ADC interface operations */
+
+static const struct adc_ops_s g_adcops =
+{
+  .ao_bind        = adc_bind,
+  .ao_reset       = adc_reset,
+  .ao_setup       = adc_setup,
+  .ao_shutdown    = adc_shutdown,
+  .ao_rxint       = adc_rxint,
+  .ao_ioctl       = adc_ioctl,
+};
+
+/* ADC1 state */
+
+#ifdef CONFIG_STM32F7_ADC1
+static struct stm32_dev_s g_adcpriv1 =
+{
+  .irq         = STM32_IRQ_ADC,
+  .isr         = adc123_interrupt,
+  .intf        = 1,
+  .base        = STM32_ADC1_BASE,
+#ifdef ADC1_HAVE_TIMER
+  .trigger     = CONFIG_STM32F7_ADC1_TIMTRIG,
+  .tbase       = ADC1_TIMER_BASE,
+  .extsel      = ADC1_EXTSEL_VALUE,
+  .pclck       = ADC1_TIMER_PCLK_FREQUENCY,
+  .freq        = CONFIG_STM32F7_ADC1_SAMPLE_FREQUENCY,
+#endif
+#ifdef ADC1_HAVE_DMA
+  .dmachan     = ADC1_DMA_CHAN,
+  .hasdma      = true,
+#endif
+};
+
+static struct adc_dev_s g_adcdev1 =
+{
+  .ad_ops      = &g_adcops,
+  .ad_priv     = &g_adcpriv1,
+};
+#endif
+
+/* ADC2 state */
+
+#ifdef CONFIG_STM32F7_ADC2
+static struct stm32_dev_s g_adcpriv2 =
+{
+  .irq         = STM32_IRQ_ADC,
+  .isr         = adc123_interrupt,
+  .intf        = 2,
+  .base        = STM32_ADC2_BASE,
+#ifdef ADC2_HAVE_TIMER
+  .trigger     = CONFIG_STM32F7_ADC2_TIMTRIG,
+  .tbase       = ADC2_TIMER_BASE,
+  .extsel      = ADC2_EXTSEL_VALUE,
+  .pclck       = ADC2_TIMER_PCLK_FREQUENCY,
+  .freq        = CONFIG_STM32F7_ADC2_SAMPLE_FREQUENCY,
+#endif
+#ifdef ADC2_HAVE_DMA
+  .dmachan     = ADC2_DMA_CHAN,
+  .hasdma      = true,
+#endif
+};
+
+static struct adc_dev_s g_adcdev2 =
+{
+  .ad_ops      = &g_adcops,
+  .ad_priv     = &g_adcpriv2,
+};
+#endif
+
+/* ADC3 state */
+
+#ifdef CONFIG_STM32F7_ADC3
+static struct stm32_dev_s g_adcpriv3 =
+{
+  .irq         = STM32_IRQ_ADC,
+  .isr         = adc123_interrupt,
+  .intf        = 3,
+  .base        = STM32_ADC3_BASE,
+#ifdef ADC3_HAVE_TIMER
+  .trigger     = CONFIG_STM32F7_ADC3_TIMTRIG,
+  .tbase       = ADC3_TIMER_BASE,
+  .extsel      = ADC3_EXTSEL_VALUE,
+  .pclck       = ADC3_TIMER_PCLK_FREQUENCY,
+  .freq        = CONFIG_STM32F7_ADC3_SAMPLE_FREQUENCY,
+#endif
+#ifdef ADC3_HAVE_DMA
+  .dmachan     = ADC3_DMA_CHAN,
+  .hasdma      = true,
+#endif
+};
+
+static struct adc_dev_s g_adcdev3 =
+{
+  .ad_ops      = &g_adcops,
+  .ad_priv     = &g_adcpriv3,
+};
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_modifyreg32
+ *
+ * Description:
+ *   Modify the value of a 32-bit register (not atomic).
+ *
+ * Input Parameters:
+ *   addr    - The address of the register
+ *   clrbits - The bits to clear
+ *   setbits - The bits to set
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void stm32_modifyreg32(unsigned int addr, uint32_t clrbits,
+                              uint32_t setbits)
+{
+  putreg32((getreg32(addr) & ~clrbits) | setbits, addr);
+}
+
+/****************************************************************************
+ * Name: adc_getreg
+ *
+ * Description:
+ *   Read the value of an ADC register.
+ *
+ * Input Parameters:
+ *   priv   - A reference to the ADC block status
+ *   offset - The offset to the register to read
+ *
+ * Returned Value:
+ *   The current contents of the specified register
+ *
+ ****************************************************************************/
+
+static uint32_t adc_getreg(FAR struct stm32_dev_s *priv, int offset)
+{
+  return getreg32(priv->base + offset);
+}
+
+/****************************************************************************
+ * Name: adc_putreg
+ *
+ * Description:
+ *   Write a value to an ADC register.
+ *
+ * Input Parameters:
+ *   priv   - A reference to the ADC block status
+ *   offset - The offset to the register to write to
+ *   value  - The value to write to the register
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void adc_putreg(FAR struct stm32_dev_s *priv, int offset,
+                       uint32_t value)
+{
+  putreg32(value, priv->base + offset);
+}
+
+/****************************************************************************
+ * Name: adc_modifyreg
+ *
+ * Description:
+ *   Modify the value of an ADC register (not atomic).
+ *
+ * Input Parameters:
+ *   priv    - A reference to the ADC block status
+ *   offset  - The offset to the register to modify
+ *   clrbits - The bits to clear
+ *   setbits - The bits to set
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void adc_modifyreg(FAR struct stm32_dev_s *priv, int offset,
+                          uint32_t clrbits, uint32_t setbits)
+{
+  adc_putreg(priv, offset, (adc_getreg(priv, offset) & ~clrbits) | setbits);
+}
+
+/****************************************************************************
+ * Name: tim_getreg
+ *
+ * Description:
+ *   Read the value of an ADC timer register.
+ *
+ * Input Parameters:
+ *   priv   - A reference to the ADC block status
+ *   offset - The offset to the register to read
+ *
+ * Returned Value:
+ *   The current contents of the specified register
+ *
+ ****************************************************************************/
+
+#ifdef ADC_HAVE_TIMER
+static uint16_t tim_getreg(FAR struct stm32_dev_s *priv, int offset)
+{
+  return getreg16(priv->tbase + offset);
+}
+#endif
+
+/****************************************************************************
+ * Name: tim_putreg
+ *
+ * Description:
+ *   Write a value to an ADC timer register.
+ *
+ * Input Parameters:
+ *   priv   - A reference to the ADC block status
+ *   offset - The offset to the register to write to
+ *   value  - The value to write to the register
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef ADC_HAVE_TIMER
+static void tim_putreg(FAR struct stm32_dev_s *priv, int offset,
+                       uint16_t value)
+{
+  putreg16(value, priv->tbase + offset);
+}
+#endif
+
+/****************************************************************************
+ * Name: tim_modifyreg
+ *
+ * Description:
+ *   Modify the value of an ADC timer register (not atomic).
+ *
+ * Input Parameters:
+ *   priv    - A reference to the ADC block status
+ *   offset  - The offset to the register to modify
+ *   clrbits - The bits to clear
+ *   setbits - The bits to set
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef ADC_HAVE_TIMER
+static void tim_modifyreg(FAR struct stm32_dev_s *priv, int offset,
+                          uint16_t clrbits, uint16_t setbits)
+{
+  tim_putreg(priv, offset, (tim_getreg(priv, offset) & ~clrbits) | setbits);
+}
+#endif
+
+/****************************************************************************
+ * Name: tim_dumpregs
+ *
+ * Description:
+ *   Dump all timer registers.
+ *
+ * Input parameters:
+ *   priv - A reference to the ADC block status
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef ADC_HAVE_TIMER
+static void tim_dumpregs(FAR struct stm32_dev_s *priv, FAR const char *msg)
+{
+  ainfo("%s:\n", msg);
+  ainfo("  CR1: %04x CR2:  %04x SMCR:  %04x DIER:  %04x\n",
+        tim_getreg(priv, STM32_GTIM_CR1_OFFSET),
+        tim_getreg(priv, STM32_GTIM_CR2_OFFSET),
+        tim_getreg(priv, STM32_GTIM_SMCR_OFFSET),
+        tim_getreg(priv, STM32_GTIM_DIER_OFFSET));
+  ainfo("   SR: %04x EGR:  0000 CCMR1: %04x CCMR2: %04x\n",
+        tim_getreg(priv, STM32_GTIM_SR_OFFSET),
+        tim_getreg(priv, STM32_GTIM_CCMR1_OFFSET),
+        tim_getreg(priv, STM32_GTIM_CCMR2_OFFSET));
+  ainfo(" CCER: %04x CNT:  %04x PSC:   %04x ARR:   %04x\n",
+        tim_getreg(priv, STM32_GTIM_CCER_OFFSET),
+        tim_getreg(priv, STM32_GTIM_CNT_OFFSET),
+        tim_getreg(priv, STM32_GTIM_PSC_OFFSET),
+        tim_getreg(priv, STM32_GTIM_ARR_OFFSET));
+  ainfo(" CCR1: %04x CCR2: %04x CCR3:  %04x CCR4:  %04x\n",
+        tim_getreg(priv, STM32_GTIM_CCR1_OFFSET),
+        tim_getreg(priv, STM32_GTIM_CCR2_OFFSET),
+        tim_getreg(priv, STM32_GTIM_CCR3_OFFSET),
+        tim_getreg(priv, STM32_GTIM_CCR4_OFFSET));
+  if (priv->tbase == STM32_TIM1_BASE || priv->tbase == STM32_TIM8_BASE)
+    {
+      ainfo("  RCR: %04x BDTR: %04x DCR:   %04x DMAR:  %04x\n",
+            tim_getreg(priv, STM32_ATIM_RCR_OFFSET),
+            tim_getreg(priv, STM32_ATIM_BDTR_OFFSET),
+            tim_getreg(priv, STM32_ATIM_DCR_OFFSET),
+            tim_getreg(priv, STM32_ATIM_DMAR_OFFSET));
+    }
+  else
+    {
+      ainfo("  DCR: %04x DMAR: %04x\n",
+            tim_getreg(priv, STM32_GTIM_DCR_OFFSET),
+            tim_getreg(priv, STM32_GTIM_DMAR_OFFSET));
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: adc_timstart
+ *
+ * Description:
+ *   Start (or stop) the timer counter
+ *
+ * Input Parameters:
+ *   priv - A reference to the ADC block status
+ *   enable - True: Start conversion
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+#ifdef ADC_HAVE_TIMER
+static void adc_timstart(FAR struct stm32_dev_s *priv, bool enable)
+{
+  ainfo("enable: %d\n", enable ? 1 : 0);
+
+  if (enable)
+    {
+      /* Start the counter */
+
+      tim_modifyreg(priv, STM32_GTIM_CR1_OFFSET, 0, GTIM_CR1_CEN);
+    }
+  else
+    {
+      /* Disable the counter */
+
+      tim_modifyreg(priv, STM32_GTIM_CR1_OFFSET, GTIM_CR1_CEN, 0);
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: adc_timinit
+ *
+ * Description:
+ *   Initialize the timer that drivers the ADC sampling for this channel
+ *   using the pre-calculated timer divider definitions.
+ *
+ * Input Parameters:
+ *   priv - A reference to the ADC block status
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+#ifdef ADC_HAVE_TIMER
+static int adc_timinit(FAR struct stm32_dev_s *priv)
+{
+  uint32_t prescaler;
+  uint32_t reload;
+  uint32_t timclk;
+
+  uint16_t clrbits = 0;
+  uint16_t setbits = 0;
+  uint16_t cr2;
+  uint16_t ccmr1;
+  uint16_t ccmr2;
+  uint16_t ocmode1;
+  uint16_t ocmode2;
+  uint16_t ccenable;
+  uint16_t ccer;
+  uint16_t egr;
+
+  /* If the timer base address is zero, then this ADC was not configured to
+   * use a timer.
+   */
+
+  if (priv->tbase == 0)
+    {
+      return ERROR;
+    }
+
+  /* EXTSEL selection: These bits select the external event used to trigger
+   * the start of conversion of a regular group.  NOTE:
+   *
+   * - The position with of the EXTSEL field varies from one STM32 MCU
+   *   to another.
+   * - The width of the EXTSEL field varies from one STM32 MCU to another.
+   * - The value in priv->extsel is already shifted into the correct bit
+   *   position.
+   */
+
+  ainfo("Initializing timers extsel = 0x%08x\n", priv->extsel);
+
+  adc_modifyreg(priv, STM32_ADC_EXTREG_OFFSET,
+                ADC_EXTREG_EXTEN_MASK | ADC_EXTREG_EXTSEL_MASK,
+                ADC_EXTREG_EXTEN_DEFAULT | priv->extsel);
+
+  /* Configure the timer channel to drive the ADC */
+
+  /* Caculate optimal values for the timer prescaler and for the timer
+   * reload register.  If freq is the desired frequency, then
+   *
+   *   reload = timclk / freq
+   *   reload = (pclck / prescaler) / freq
+   *
+   * There are many solutions to do this, but the best solution will be the
+   * one that has the largest reload value and the smallest prescaler value.
+   * That is the solution that should give us the most accuracy in the timer
+   * control.  Subject to:
+   *
+   *   0 <= prescaler  <= 65536
+   *   1 <= reload <= 65535
+   *
+   * So ( prescaler = pclck / 65535 / freq ) would be optimal.
+   */
+
+  prescaler = (priv->pclck / priv->freq + 65534) / 65535;
+
+  /* We need to decrement the prescaler value by one, but only, the value
+   * does not underflow.
+   */
+
+  if (prescaler < 1)
+    {
+      awarn("WARNING: Prescaler underflowed.\n");
+      prescaler = 1;
+    }
+
+  /* Check for overflow */
+
+  else if (prescaler > 65536)
+    {
+      awarn("WARNING: Prescaler overflowed.\n");
+      prescaler = 65536;
+    }
+
+  timclk = priv->pclck / prescaler;
+
+  reload = timclk / priv->freq;
+  if (reload < 1)
+    {
+      awarn("WARNING: Reload value underflowed.\n");
+      reload = 1;
+    }
+  else if (reload > 65535)
+    {
+      awarn("WARNING: Reload value overflowed.\n");
+      reload = 65535;
+    }
+
+  /* Disable the timer until we get it configured */
+
+  adc_timstart(priv, false);
+
+  /* Set up the timer CR1 register.
+   *
+   * Select the Counter Mode == count up:
+   *
+   * ATIM_CR1_EDGE: The counter counts up or down depending on the
+   *                direction bit(DIR).
+   * ATIM_CR1_DIR: 0: count up, 1: count down
+   *
+   * Set the clock division to zero for all
+   */
+
+  clrbits = GTIM_CR1_DIR | GTIM_CR1_CMS_MASK | GTIM_CR1_CKD_MASK;
+  setbits = GTIM_CR1_EDGE;
+  tim_modifyreg(priv, STM32_GTIM_CR1_OFFSET, clrbits, setbits);
+
+  /* Set the reload and prescaler values */
+
+  tim_putreg(priv, STM32_GTIM_PSC_OFFSET, prescaler-1);
+  tim_putreg(priv, STM32_GTIM_ARR_OFFSET, reload);
+
+  /* Clear the advanced timers repetition counter in TIM1 */
+
+  if (priv->tbase == STM32_TIM1_BASE || priv->tbase == STM32_TIM8_BASE)
+    {
+      tim_putreg(priv, STM32_ATIM_RCR_OFFSET, 0);
+      tim_putreg(priv, STM32_ATIM_BDTR_OFFSET, ATIM_BDTR_MOE); /* Check me */
+    }
+
+  /* TIMx event generation: Bit 0 UG: Update generation */
+
+  tim_putreg(priv, STM32_GTIM_EGR_OFFSET, GTIM_EGR_UG);
+
+  /* Handle channel specific setup */
+
+  ocmode1 = 0;
+  ocmode2 = 0;
+
+  switch (priv->trigger)
+    {
+      case 0: /* TimerX CC1 event */
+        {
+          ccenable = ATIM_CCER_CC1E;
+          ocmode1  = (ATIM_CCMR_CCS_CCOUT << ATIM_CCMR1_CC1S_SHIFT) |
+                     (ATIM_CCMR_MODE_PWM1 << ATIM_CCMR1_OC1M_SHIFT) |
+                     ATIM_CCMR1_OC1PE;
+
+          /* Set the event CC1 */
+
+          egr      = ATIM_EGR_CC1G;
+
+          /* Set the duty cycle by writing to the CCR register for this
+           * channel
+           */
+
+          tim_putreg(priv, STM32_GTIM_CCR1_OFFSET, (uint16_t)(reload >> 1));
+        }
+        break;
+
+      case 1: /* TimerX CC2 event */
+        {
+          ccenable = ATIM_CCER_CC2E;
+          ocmode1  = (ATIM_CCMR_CCS_CCOUT << ATIM_CCMR1_CC2S_SHIFT) |
+                     (ATIM_CCMR_MODE_PWM1 << ATIM_CCMR1_OC2M_SHIFT) |
+                     ATIM_CCMR1_OC2PE;
+
+          /* Set the event CC2 */
+
+          egr      = ATIM_EGR_CC2G;
+
+          /* Set the duty cycle by writing to the CCR register for this
+           * channel
+           */
+
+          tim_putreg(priv, STM32_GTIM_CCR2_OFFSET, (uint16_t)(reload >> 1));
+        }
+        break;
+
+      case 2: /* TimerX CC3 event */
+        {
+          ccenable = ATIM_CCER_CC3E;
+          ocmode2  = (ATIM_CCMR_CCS_CCOUT << ATIM_CCMR2_CC3S_SHIFT) |
+                     (ATIM_CCMR_MODE_PWM1 << ATIM_CCMR2_OC3M_SHIFT) |
+                     ATIM_CCMR2_OC3PE;
+
+          /* Set the event CC3 */
+
+          egr      = ATIM_EGR_CC3G;
+
+          /* Set the duty cycle by writing to the CCR register for this
+           * channel
+           */
+
+          tim_putreg(priv, STM32_GTIM_CCR3_OFFSET, (uint16_t)(reload >> 1));
+        }
+        break;
+
+      case 3: /* TimerX CC4 event */
+        {
+          ccenable = ATIM_CCER_CC4E;
+          ocmode2  = (ATIM_CCMR_CCS_CCOUT << ATIM_CCMR2_CC4S_SHIFT) |
+                     (ATIM_CCMR_MODE_PWM1 << ATIM_CCMR2_OC4M_SHIFT) |
+                     ATIM_CCMR2_OC4PE;
+
+          /* Set the event CC4 */
+
+          egr      = ATIM_EGR_CC4G;
+
+          /* Set the duty cycle by writing to the CCR register for this
+           * channel
+           */
+
+          tim_putreg(priv, STM32_GTIM_CCR4_OFFSET, (uint16_t)(reload >> 1));
+        }
+        break;
+
+      case 4: /* TimerX TRGO event */
+        {
+          /* TODO: TRGO support not yet implemented */
+          /* Set the event TRGO */
+
+          ccenable = 0;
+          egr      = GTIM_EGR_TG;
+
+          /* Set the duty cycle by writing to the CCR register for this
+           * channel
+           */
+
+          tim_putreg(priv, STM32_GTIM_CCR4_OFFSET, (uint16_t)(reload >> 1));
+        }
+        break;
+
+      default:
+        aerr("ERROR: No such trigger: %d\n", priv->trigger);
+        return -EINVAL;
+    }
+
+  /* Disable the Channel by resetting the CCxE Bit in the CCER register */
+
+  ccer = tim_getreg(priv, STM32_GTIM_CCER_OFFSET);
+  ccer &= ~ccenable;
+  tim_putreg(priv, STM32_GTIM_CCER_OFFSET, ccer);
+
+  /* Fetch the CR2, CCMR1, and CCMR2 register (already have ccer) */
+
+  cr2   = tim_getreg(priv, STM32_GTIM_CR2_OFFSET);
+  ccmr1 = tim_getreg(priv, STM32_GTIM_CCMR1_OFFSET);
+  ccmr2 = tim_getreg(priv, STM32_GTIM_CCMR2_OFFSET);
+
+  /* Reset the Output Compare Mode Bits and set the select output compare
+   * mode
+   */
+
+  ccmr1 &= ~(ATIM_CCMR1_CC1S_MASK | ATIM_CCMR1_OC1M_MASK | ATIM_CCMR1_OC1PE |
+             ATIM_CCMR1_CC2S_MASK | ATIM_CCMR1_OC2M_MASK | ATIM_CCMR1_OC2PE);
+  ccmr2 &= ~(ATIM_CCMR2_CC3S_MASK | ATIM_CCMR2_OC3M_MASK | ATIM_CCMR2_OC3PE |
+             ATIM_CCMR2_CC4S_MASK | ATIM_CCMR2_OC4M_MASK | ATIM_CCMR2_OC4PE);
+  ccmr1 |= ocmode1;
+  ccmr2 |= ocmode2;
+
+  /* Reset the output polarity level of all channels (selects high
+   * polarity)
+   */
+
+  ccer &= ~(ATIM_CCER_CC1P | ATIM_CCER_CC2P |
+            ATIM_CCER_CC3P | ATIM_CCER_CC4P);
+
+  /* Enable the output state of the selected channel (only) */
+
+  ccer &= ~(ATIM_CCER_CC1E | ATIM_CCER_CC2E |
+            ATIM_CCER_CC3E | ATIM_CCER_CC4E);
+  ccer |= ccenable;
+
+  if (priv->tbase == STM32_TIM1_BASE || priv->tbase == STM32_TIM8_BASE)
+    {
+      /* Reset output N polarity level, output N state, output compare state,
+       * output compare N idle state.
+       */
+
+      ccer &= ~(ATIM_CCER_CC1NE | ATIM_CCER_CC1NP |
+                ATIM_CCER_CC2NE | ATIM_CCER_CC2NP |
+                ATIM_CCER_CC3NE | ATIM_CCER_CC3NP |
+                ATIM_CCER_CC4NP);
+
+      /* Reset the output compare and output compare N IDLE State */
+
+      cr2 &= ~(ATIM_CR2_OIS1 | ATIM_CR2_OIS1N |
+               ATIM_CR2_OIS2 | ATIM_CR2_OIS2N |
+               ATIM_CR2_OIS3 | ATIM_CR2_OIS3N |
+               ATIM_CR2_OIS4);
+    }
+  else
+    {
+      ccer &= ~(GTIM_CCER_CC1NP | GTIM_CCER_CC2NP | GTIM_CCER_CC3NP);
+    }
+
+  /* Save the modified register values */
+
+  tim_putreg(priv, STM32_GTIM_CR2_OFFSET, cr2);
+  tim_putreg(priv, STM32_GTIM_CCMR1_OFFSET, ccmr1);
+  tim_putreg(priv, STM32_GTIM_CCMR2_OFFSET, ccmr2);
+  tim_putreg(priv, STM32_GTIM_CCER_OFFSET, ccer);
+  tim_putreg(priv, STM32_GTIM_EGR_OFFSET, egr);
+
+  /* Set the ARR Preload Bit */
+
+  tim_modifyreg(priv, STM32_GTIM_CR1_OFFSET, 0, GTIM_CR1_ARPE);
+
+  /* Enable the timer counter */
+
+  adc_timstart(priv, true);
+
+  tim_dumpregs(priv, "After starting timers");
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: adc_startconv
+ *
+ * Description:
+ *   Start (or stop) the ADC conversion process
+ *
+ * Input Parameters:
+ *   priv - A reference to the ADC block status
+ *   enable - True: Start conversion
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+static void adc_startconv(FAR struct stm32_dev_s *priv, bool enable)
+{
+  ainfo("enable: %d\n", enable ? 1 : 0);
+
+  if (enable)
+    {
+      /* Start the conversion of regular channels */
+
+      adc_modifyreg(priv, STM32_ADC_CR2_OFFSET, 0, ADC_CR2_SWSTART);
+    }
+  else
+    {
+      /* Stop the conversion */
+
+      adc_modifyreg(priv, STM32_ADC_CR2_OFFSET, ADC_CR2_SWSTART, 0);
+    }
+}
+
+/****************************************************************************
+ * Name: adc_rccreset
+ *
+ * Description:
+ *   Deinitializes the ADCx peripheral registers to their default
+ *   reset values. It could set all the ADCs configured.
+ *
+ * Input Parameters:
+ *   regaddr - The register to read
+ *   reset - Condition, set or reset
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+static void adc_rccreset(FAR struct stm32_dev_s *priv, bool reset)
+{
+  uint32_t adcbit;
+
+  /* Pick the appropriate bit in the APB2 reset register.
+   * For the STM32 F1, there is an individual bit to reset each ADC,
+   * but for the STM32 F2/F4, there is one common reset for all ADCs.
+   * THIS will probably cause some problems!
+   */
+
+  switch (priv->intf)
+    {
+#ifdef CONFIG_STM32F7_ADC1
+      case 1:
+        adcbit = RCC_RSTR_ADC1RST;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_ADC2
+      case 2:
+        adcbit = RCC_RSTR_ADC2RST;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_ADC3
+      case 3:
+        adcbit = RCC_RSTR_ADC3RST;
+        break;
+#endif
+      default:
+        return;
+    }
+
+  /* Set or clear the selected bit in the APB2 reset register.
+   * modifyreg32() disables interrupts.  Disabling interrupts is necessary
+   * because the APB2RTSR register is used by several different drivers.
+   */
+
+  if (reset)
+    {
+      /* Enable ADC reset state */
+
+      modifyreg32(STM32_RCC_RSTR, 0, adcbit);
+    }
+  else
+    {
+      /* Release ADC from reset state */
+
+      modifyreg32(STM32_RCC_RSTR, adcbit, 0);
+    }
+}
+
+/****************************************************************************
+ * Name: adc_enable
+ *
+ * Description    : Enables or disables the specified ADC peripheral.
+ *                  Also, starts a conversion when the ADC is not
+ *                  triggered by timers
+ *
+ * Input Parameters:
+ *
+ *   enable - true:  enable ADC conversion
+ *            false: disable ADC conversion
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+static void adc_enable(FAR struct stm32_dev_s *priv, bool enable)
+{
+
+  ainfo("enable: %d\n", enable ? 1 : 0);
+
+  if (enable)
+    {
+      adc_modifyreg(priv, STM32_ADC_CR2_OFFSET, 0, ADC_CR2_ADON);
+    }
+  else
+    {
+      adc_modifyreg(priv, STM32_ADC_CR2_OFFSET, ADC_CR2_ADON, 0);
+    }
+}
+
+/****************************************************************************
+ * Name: adc_dmacovcallback
+ *
+ * Description:
+ *   Callback for DMA.  Called from the DMA transfer complete interrupt after
+ *   all channels have been converted and transferred with DMA.
+ *
+ * Input Parameters:
+ *
+ *   handle - handle to DMA
+ *   isr -
+ *   arg - adc device
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+#ifdef ADC_HAVE_DMA
+static void adc_dmaconvcallback(DMA_HANDLE handle, uint8_t isr, FAR void *arg)
+{
+  FAR struct adc_dev_s   *dev  = (FAR struct adc_dev_s *)arg;
+  FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
+  int i;
+
+  /* Verify that the upper-half driver has bound its callback functions */
+
+  if (priv->cb != NULL)
+    {
+      DEBUGASSERT(priv->cb->au_receive != NULL);
+
+      for (i = 0; i < priv->nchannels; i++)
+        {
+          priv->cb->au_receive(dev, priv->current, priv->dmabuffer[priv->current]);
+          priv->current++;
+          if (priv->current >= priv->nchannels)
+            {
+              /* Restart the conversion sequence from the beginning */
+
+              priv->current = 0;
+            }
+        }
+    }
+  /* Restart DMA for the next conversion series */
+
+  adc_modifyreg(priv, STM32_ADC_DMAREG_OFFSET, ADC_DMAREG_DMA, 0);
+  adc_modifyreg(priv, STM32_ADC_DMAREG_OFFSET, 0, ADC_DMAREG_DMA);
+}
+#endif
+
+/****************************************************************************
+ * Name: adc_bind
+ *
+ * Description:
+ *   Bind the upper-half driver callbacks to the lower-half implementation.  This
+ *   must be called early in order to receive ADC event notifications.
+ *
+ ****************************************************************************/
+
+static int adc_bind(FAR struct adc_dev_s *dev,
+                    FAR const struct adc_callback_s *callback)
+{
+  FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
+
+  DEBUGASSERT(priv != NULL);
+  priv->cb = callback;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: adc_reset
+ *
+ * Description:
+ *   Reset the ADC device.  Called early to initialize the hardware. This
+ *   is called, before adc_setup() and on error conditions.
+ *
+ * Input Parameters:
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+static void adc_reset(FAR struct adc_dev_s *dev)
+{
+  FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
+  irqstate_t flags;
+  uint32_t clrbits;
+  uint32_t setbits;
+#ifdef ADC_HAVE_TIMER
+  int ret;
+#endif
+
+  ainfo("intf: %d\n", priv->intf);
+  flags = enter_critical_section();
+
+  /* Enable ADC reset state */
+
+  adc_rccreset(priv, true);
+
+  /* Release ADC from reset state */
+
+  adc_rccreset(priv, false);
+
+  /* Initialize the watchdog high threshold register */
+
+  adc_putreg(priv, STM32_ADC_HTR_OFFSET, 0x00000fff);
+
+  /* Initialize the watchdog low threshold register */
+
+  adc_putreg(priv, STM32_ADC_LTR_OFFSET, 0x00000000);
+
+  /* Initialize the same sample time for each ADC.
+   * During sample cycles channel selection bits must remain unchanged.
+   */
+
+  adc_putreg(priv, STM32_ADC_SMPR1_OFFSET, ADC_SMPR1_DEFAULT);
+  adc_putreg(priv, STM32_ADC_SMPR2_OFFSET, ADC_SMPR2_DEFAULT);
+
+  /* Enable the analog watchdog */
+
+  clrbits = ADC_CR1_AWDCH_MASK;
+  setbits = ADC_CR1_AWDEN | (priv->chanlist[0] << ADC_CR1_AWDCH_SHIFT);
+
+  /* Set the resolution of the conversion */
+
+  clrbits |= ADC_CR1_RES_MASK;
+  setbits |= ADC_CR1_RES_12BIT;
+
+#ifdef ADC_HAVE_DMA
+  if (priv->hasdma)
+    {
+      setbits |= ADC_CR1_SCAN;
+    }
+#endif
+
+  /* Enable interrupt flags, but disable overrun interrupt */
+
+  clrbits |= ADC_IER_OVR;
+  setbits |= ADC_IER_ALLINTS & ~ADC_IER_OVR;
+
+  /* Set CR1 configuration */
+
+  adc_modifyreg(priv, STM32_ADC_CR1_OFFSET, clrbits, setbits);
+
+  /* Disable continuous mode and set align to right */
+
+  clrbits = ADC_CR2_CONT | ADC_CR2_ALIGN;
+  setbits = 0;
+
+  /* Disable external trigger for regular channels */
+
+  clrbits |= ADC_EXTREG_EXTEN_MASK;
+  setbits |= ADC_EXTREG_EXTEN_NONE;
+
+#ifdef ADC_HAVE_DMA
+  if (priv->hasdma)
+    {
+      setbits |= ADC_CR2_DMA;
+    }
+#endif
+
+  /* Set CR2 configuration */
+
+  adc_modifyreg(priv, STM32_ADC_CR2_OFFSET, clrbits, setbits);
+
+  /* Configuration of the channel conversions */
+
+  adc_set_ch(dev, 0);
+
+  /* ADC CCR configuration */
+
+  clrbits  = ADC_CCR_ADCPRE_MASK | ADC_CCR_TSVREFE;
+  setbits  = ADC_CCR_ADCPRE_DIV;
+
+  if (adc_internal(priv))
+    {
+      setbits  = ADC_CCR_TSVREFE;
+    }
+
+  clrbits |= ADC_CCR_MULTI_MASK | ADC_CCR_DELAY_MASK | ADC_CCR_DDS |
+             ADC_CCR_DMA_MASK | ADC_CCR_VBATE;
+  setbits |= ADC_CCR_MULTI_NONE | ADC_CCR_DMA_DISABLED;
+
+  stm32_modifyreg32(STM32_ADC_CCR, clrbits, setbits);
+
+#ifdef ADC_HAVE_DMA
+
+  /* Enable DMA */
+
+  if (priv->hasdma)
+    {
+      /* Stop and free DMA if it was started before */
+
+      if (priv->dma != NULL)
+        {
+          stm32_dmastop(priv->dma);
+          stm32_dmafree(priv->dma);
+        }
+
+      priv->dma = stm32_dmachannel(priv->dmachan);
+
+      stm32_dmasetup(priv->dma,
+                     priv->base + STM32_ADC_DR_OFFSET,
+                     (uint32_t)priv->dmabuffer,
+                     priv->nchannels,
+                     ADC_DMA_CONTROL_WORD);
+
+      stm32_dmastart(priv->dma, adc_dmaconvcallback, dev, false);
+    }
+
+#endif
+
+  /* Set ADON to wake up the ADC from the power down state */
+
+  adc_enable(priv, true);
+
+#ifdef ADC_HAVE_TIMER
+  if (priv->tbase != 0)
+    {
+      ret = adc_timinit(priv);
+      if (ret < 0)
+        {
+          aerr("ERROR: adc_timinit failed: %d\n", ret);
+        }
+    }
+#ifndef CONFIG_ADC_NO_STARTUP_CONV
+  else
+#endif
+#endif
+#ifndef CONFIG_ADC_NO_STARTUP_CONV
+    {
+      adc_startconv(priv, true);
+    }
+#endif
+
+  leave_critical_section(flags);
+
+  ainfo("SR:   0x%08x CR1:  0x%08x CR2:  0x%08x\n",
+        adc_getreg(priv, STM32_ADC_SR_OFFSET),
+        adc_getreg(priv, STM32_ADC_CR1_OFFSET),
+        adc_getreg(priv, STM32_ADC_CR2_OFFSET));
+  
+  ainfo("SQR1: 0x%08x SQR2: 0x%08x SQR3: 0x%08x\n",
+        adc_getreg(priv, STM32_ADC_SQR1_OFFSET),
+        adc_getreg(priv, STM32_ADC_SQR2_OFFSET),
+        adc_getreg(priv, STM32_ADC_SQR3_OFFSET));
+
+  ainfo("CCR:  0x%08x\n", getreg32(STM32_ADC_CCR));
+
+}
+
+/****************************************************************************
+ * Name: adc_setup
+ *
+ * Description:
+ *   Configure the ADC. This method is called the first time that the ADC
+ *   device is opened.  This will occur when the port is first opened.
+ *   This setup includes configuring and attaching ADC interrupts.
+ *   Interrupts are all disabled upon return.
+ *
+ * Input Parameters:
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+static int adc_setup(FAR struct adc_dev_s *dev)
+{
+  FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
+  int ret;
+
+  /* Attach the ADC interrupt */
+
+  ret = irq_attach(priv->irq, priv->isr, NULL);
+  if (ret < 0)
+    {
+      ainfo("irq_attach failed: %d\n", ret);
+      return ret;
+    }
+
+  /* Make sure that the ADC device is in the powered up, reset state */
+
+  adc_reset(dev);
+
+  /* Enable the ADC interrupt */
+
+  ainfo("Enable the ADC interrupt: irq=%d\n", priv->irq);
+  up_enable_irq(priv->irq);
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: adc_shutdown
+ *
+ * Description:
+ *   Disable the ADC.  This method is called when the ADC device is closed.
+ *   This method reverses the operation the setup method.
+ *
+ * Input Parameters:
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+static void adc_shutdown(FAR struct adc_dev_s *dev)
+{
+  FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
+
+  adc_enable(priv, false);
+
+  /* Disable ADC interrupts and detach the ADC interrupt handler */
+
+  up_disable_irq(priv->irq);
+  irq_detach(priv->irq);
+
+  /* Disable and reset the ADC module */
+
+  adc_rccreset(priv, true);
+}
+
+/****************************************************************************
+ * Name: adc_rxint
+ *
+ * Description:
+ *   Call to enable or disable RX interrupts.
+ *
+ * Input Parameters:
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+static void adc_rxint(FAR struct adc_dev_s *dev, bool enable)
+{
+  FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
+
+  ainfo("intf: %d enable: %d\n", priv->intf, enable ? 1 : 0);
+
+  if (enable)
+    {
+      /* Enable the end-of-conversion ADC and analog watchdog interrupts */
+
+      adc_modifyreg(priv, STM32_ADC_IER_OFFSET, 0, ADC_IER_ALLINTS);
+    }
+  else
+    {
+      /* Disable all ADC interrupts */
+
+      adc_modifyreg(priv, STM32_ADC_IER_OFFSET, ADC_IER_ALLINTS, 0);
+    }
+}
+
+/****************************************************************************
+ * Name: adc_sqrbits
+ ****************************************************************************/
+
+static uint32_t adc_sqrbits(FAR struct stm32_dev_s *priv, int first, int last,
+                            int offset)
+{
+  uint32_t bits = 0;
+  int i;
+
+  for (i = first - 1;
+       i < priv->nchannels && i < last;
+       i++, offset += ADC_SQ_OFFSET)
+    {
+      bits |= (uint32_t)priv->chanlist[i] << offset;
+    }
+
+  return bits;
+}
+
+/****************************************************************************
+ * Name: adc_internal
+ ****************************************************************************/
+
+static bool adc_internal(FAR struct stm32_dev_s * priv)
+{
+  int i;
+
+  if (priv->intf == 1)
+    {
+      for (i  = 0; i < priv->nchannels; i++)
+        {
+          if (priv->chanlist[i] > ADC_LAST_EXTERNAL_CHAN)
+            {
+              return true;
+            }
+
+        }
+    }
+
+  return false;
+}
+
+/****************************************************************************
+ * Name: adc_set_ch
+ *
+ * Description:
+ *   Sets the ADC channel.
+ *
+ * Input Parameters:
+ *   dev - pointer to device structure used by the driver
+ *   ch  - ADC channel number + 1. 0 reserved for all configured channels
+ *
+ * Returned Value:
+ *   int - errno
+ *
+ ****************************************************************************/
+
+static int adc_set_ch(FAR struct adc_dev_s *dev, uint8_t ch)
+{
+  FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
+  uint32_t bits;
+  int i;
+
+  if (ch == 0)
+    {
+      priv->current   = 0;
+      priv->nchannels = priv->cchannels;
+    }
+  else
+    {
+      for (i = 0; i < priv->cchannels && priv->chanlist[i] != ch - 1; i++);
+
+      if (i >= priv->cchannels)
+        {
+          return -ENODEV;
+        }
+
+      priv->current   = i;
+      priv->nchannels = 1;
+    }
+
+  bits = adc_sqrbits(priv, ADC_SQR3_FIRST, ADC_SQR3_LAST, ADC_SQR3_SQ_OFFSET);
+  adc_modifyreg(priv, STM32_ADC_SQR3_OFFSET, ~ADC_SQR3_RESERVED, bits);
+
+  bits = adc_sqrbits(priv, ADC_SQR2_FIRST, ADC_SQR2_LAST, ADC_SQR2_SQ_OFFSET);
+  adc_modifyreg(priv, STM32_ADC_SQR2_OFFSET, ~ADC_SQR2_RESERVED, bits);
+
+  bits = ((uint32_t)priv->nchannels - 1) << ADC_SQR1_L_SHIFT |
+         adc_sqrbits(priv, ADC_SQR1_FIRST, ADC_SQR1_LAST, ADC_SQR1_SQ_OFFSET);
+  adc_modifyreg(priv, STM32_ADC_SQR1_OFFSET, ~ADC_SQR1_RESERVED, bits);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: adc_ioctl
+ *
+ * Description:
+ *   All ioctl calls will be routed through this method.
+ *
+ * Input Parameters:
+ *   dev - pointer to device structure used by the driver
+ *   cmd - command
+ *   arg - arguments passed with command
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg)
+{
+  FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
+  int ret = OK;
+
+  switch (cmd)
+    {
+      case ANIOC_TRIGGER:
+        adc_startconv(priv, true);
+        break;
+
+      default:
+        aerr("ERROR: Unknown cmd: %d\n", cmd);
+        ret = -ENOTTY;
+        break;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: adc_interrupt
+ *
+ * Description:
+ *   Common ADC interrupt handler.
+ *
+ * Input Parameters:
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+static int adc_interrupt(FAR struct adc_dev_s *dev)
+{
+  FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
+  uint32_t regval;
+  uint32_t pending;
+  int32_t  data;
+
+  regval  = adc_getreg(priv, STM32_ADC_ISR_OFFSET);
+  pending = regval & ADC_ISR_ALLINTS;
+  if (pending == 0)
+    {
+      return OK;
+    }
+
+  /* Identifies the interruption AWD, OVR or EOC */
+
+  if ((regval & ADC_ISR_AWD) != 0)
+    {
+      awarn("WARNING: Analog Watchdog, Value converted out of range!\n");
+    }
+
+  if ((regval & ADC_ISR_OVR) != 0)
+    {
+      awarn("WARNING: Overrun has occurred!\n");
+    }
+
+  /* EOC: End of conversion */
+
+  if ((regval & ADC_ISR_EOC) != 0)
+    {
+      /* Read the converted value and clear EOC bit
+       * (It is cleared by reading the ADC_DR)
+       */
+
+      data = adc_getreg(priv, STM32_ADC_DR_OFFSET) & ADC_DR_RDATA_MASK;
+
+      /* Verify that the upper-half driver has bound its callback functions */
+
+      if (priv->cb != NULL)
+        {
+          /* Give the ADC data to the ADC driver.  The ADC receive() method
+           * accepts 3 parameters:
+           *
+           * 1) The first is the ADC device instance for this ADC block.
+           * 2) The second is the channel number for the data, and
+           * 3) The third is the converted data for the channel.
+           */
+
+          DEBUGASSERT(priv->cb->au_receive != NULL);
+          priv->cb->au_receive(dev, priv->chanlist[priv->current], data);
+        }
+
+      /* Set the channel number of the next channel that will complete
+       * conversion.
+       */
+
+      priv->current++;
+
+      if (priv->current >= priv->nchannels)
+        {
+          /* Restart the conversion sequence from the beginning */
+
+          priv->current = 0;
+        }
+    }
+
+  regval &= ~pending;
+  adc_putreg(priv, STM32_ADC_ISR_OFFSET, regval);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: adc123_interrupt
+ *
+ * Description:
+ *   ADC1/2/3 interrupt handler
+ *
+ * Input Parameters:
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+static int adc123_interrupt(int irq, FAR void *context, FAR void *arg)
+{
+#ifdef CONFIG_STM32F7_ADC1
+  adc_interrupt(&g_adcdev1);
+#endif
+
+#ifdef CONFIG_STM32F7_ADC2
+  adc_interrupt(&g_adcdev2);
+#endif
+
+#ifdef CONFIG_STM32F7_ADC3
+  adc_interrupt(&g_adcdev3);
+#endif
+
+  return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_adc_initialize
+ *
+ * Description:
+ *   Initialize the ADC.
+ *
+ *   The logic is, save nchannels : # of channels (conversions) in ADC_SQR1_L
+ *   Then, take the chanlist array and store it in the SQR Regs,
+ *     chanlist[0] -> ADC_SQR3_SQ1
+ *     chanlist[1] -> ADC_SQR3_SQ2
+ *     ...
+ *     chanlist[15]-> ADC_SQR1_SQ16
+ *
+ *   up to
+ *     chanlist[nchannels]
+ *
+ * Input Parameters:
+ *   intf      - Could be {1,2,3} for ADC1, ADC2, or ADC3
+ *   chanlist  - The list of channels
+ *   cchannels - Number of channels
+ *
+ * Returned Value:
+ *   Valid ADC device structure reference on succcess; a NULL on failure
+ *
+ ****************************************************************************/
+
+struct adc_dev_s *stm32_adc_initialize(int intf, FAR const uint8_t *chanlist,
+                                       int cchannels)
+{
+  FAR struct adc_dev_s   *dev;
+  FAR struct stm32_dev_s *priv;
+
+  ainfo("intf: %d cchannels: %d\n", intf, cchannels);
+
+  switch (intf)
+    {
+#ifdef CONFIG_STM32F7_ADC1
+      case 1:
+        ainfo("ADC1 selected\n");
+        dev = &g_adcdev1;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_ADC2
+      case 2:
+        ainfo("ADC2 selected\n");
+        dev = &g_adcdev2;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_ADC3
+      case 3:
+        ainfo("ADC3 selected\n");
+        dev = &g_adcdev3;
+        break;
+#endif
+      default:
+        aerr("ERROR: No ADC interface defined\n");
+        return NULL;
+    }
+
+  /* Configure the selected ADC */
+
+  priv     = (FAR struct stm32_dev_s *)dev->ad_priv;
+  priv->cb = NULL;
+
+  DEBUGASSERT(cchannels <= ADC_MAX_SAMPLES);
+  if (cchannels > ADC_MAX_SAMPLES)
+    {
+      cchannels = ADC_MAX_SAMPLES;
+    }
+
+  priv->cchannels = cchannels;
+
+  memcpy(priv->chanlist, chanlist, cchannels);
+
+  return dev;
+}
+
+#endif /* CONFIG_STM32F7_STM32F74XX */
+#endif /* CONFIG_STM32F7_ADC1 || CONFIG_STM32F7_ADC2 ||
+        * CONFIG_STM32F7_ADC3
+        */
+#endif /* CONFIG_ADC */
diff --git a/arch/arm/src/stm32f7/stm32_adc.h b/arch/arm/src/stm32f7/stm32_adc.h
new file mode 100644
index 0000000000000000000000000000000000000000..f07afe42db427cdc8bf9577af6848c429a27f841
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_adc.h
@@ -0,0 +1,770 @@
+/************************************************************************************
+ * arch/arm/src/stm32f7/stm32_adc.h
+ *
+ *   Copyright (C) 2009, 2011, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            Paul Alexander Patience 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_STM32_ADC_H
+#define __ARCH_ARM_SRC_STM32F7_STM32_ADC_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include 
+#include "chip.h"
+#include "chip/stm32_adc.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Configuration ********************************************************************/
+
+/* Timer devices may be used for different purposes.  One special purpose is to
+ * control periodic ADC sampling.  If CONFIG_STM32F7_TIMn is defined then
+ * CONFIG_STM32F7_TIMn_ADC must also be defined to indicate that timer "n" is intended
+ * to be used for that purpose. Timers 1-6 and 8 may be used.
+ */
+
+#ifndef CONFIG_STM32F7_TIM1
+#  undef CONFIG_STM32F7_TIM1_ADC
+#  undef CONFIG_STM32F7_TIM1_ADC1
+#  undef CONFIG_STM32F7_TIM1_ADC2
+#  undef CONFIG_STM32F7_TIM1_ADC3
+#endif
+#ifndef CONFIG_STM32F7_TIM2
+#  undef CONFIG_STM32F7_TIM2_ADC
+#  undef CONFIG_STM32F7_TIM2_ADC1
+#  undef CONFIG_STM32F7_TIM2_ADC2
+#  undef CONFIG_STM32F7_TIM2_ADC3
+#endif
+#ifndef CONFIG_STM32F7_TIM3
+#  undef CONFIG_STM32F7_TIM3_ADC
+#  undef CONFIG_STM32F7_TIM3_ADC1
+#  undef CONFIG_STM32F7_TIM3_ADC2
+#  undef CONFIG_STM32F7_TIM3_ADC3
+#endif
+#ifndef CONFIG_STM32F7_TIM4
+#  undef CONFIG_STM32F7_TIM4_ADC
+#  undef CONFIG_STM32F7_TIM4_ADC1
+#  undef CONFIG_STM32F7_TIM4_ADC2
+#  undef CONFIG_STM32F7_TIM4_ADC3
+#endif
+#ifndef CONFIG_STM32F7_TIM5
+#  undef CONFIG_STM32F7_TIM5_ADC
+#  undef CONFIG_STM32F7_TIM5_ADC1
+#  undef CONFIG_STM32F7_TIM5_ADC2
+#  undef CONFIG_STM32F7_TIM5_ADC3
+#endif
+#ifndef CONFIG_STM32F7_TIM6
+#  undef CONFIG_STM32F7_TIM6_ADC
+#  undef CONFIG_STM32F7_TIM6_ADC1
+#  undef CONFIG_STM32F7_TIM6_ADC2
+#  undef CONFIG_STM32F7_TIM6_ADC3
+#endif
+#ifndef CONFIG_STM32F7_TIM8
+#  undef CONFIG_STM32F7_TIM8_ADC
+#  undef CONFIG_STM32F7_TIM8_ADC1
+#  undef CONFIG_STM32F7_TIM8_ADC2
+#  undef CONFIG_STM32F7_TIM8_ADC3
+#endif
+
+/* Up to 3 ADC interfaces are supported */
+
+#if STM32F7_NADC < 3
+#  undef CONFIG_STM32F7_ADC3
+#endif
+
+#if STM32F7_NADC < 2
+#  undef CONFIG_STM32F7_ADC2
+#endif
+
+#if STM32F7_NADC < 1
+#  undef CONFIG_STM32F7_ADC1
+#endif
+
+#if defined(CONFIG_STM32F7_ADC1) || defined(CONFIG_STM32F7_ADC2) || \
+    defined(CONFIG_STM32F7_ADC3)
+
+/* DMA support */
+
+#undef ADC_HAVE_DMA
+#if defined(CONFIG_STM32F7_ADC1_DMA) || defined(CONFIG_STM32F7_ADC2_DMA) || \
+    defined(CONFIG_STM32F7_ADC3_DMA)
+#  define ADC_HAVE_DMA  1
+#endif
+
+#ifdef CONFIG_STM32F7_ADC1_DMA
+#  define ADC1_HAVE_DMA 1
+#else
+#  undef  ADC1_HAVE_DMA
+#endif
+
+#ifdef CONFIG_STM32F7_ADC2_DMA
+#  define ADC2_HAVE_DMA 1
+#else
+#  undef  ADC2_HAVE_DMA
+#endif
+
+#ifdef CONFIG_STM32F7_ADC3_DMA
+#  define ADC3_HAVE_DMA 1
+#else
+#  undef  ADC3_HAVE_DMA
+#endif
+
+/* Timer configuration:  If a timer trigger is specified, then get
+ * information about the timer.
+ */
+
+#if defined(CONFIG_STM32F7_TIM1_ADC1)
+#    define ADC1_HAVE_TIMER           1
+#    define ADC1_TIMER_BASE           STM32_TIM1_BASE
+#    define ADC1_TIMER_PCLK_FREQUENCY STM32_APB2_TIM1_CLKIN
+#elif defined(CONFIG_STM32F7_TIM2_ADC1)
+#    define ADC1_HAVE_TIMER           1
+#    define ADC1_TIMER_BASE           STM32_TIM2_BASE
+#    define ADC1_TIMER_PCLK_FREQUENCY STM32_APB1_TIM2_CLKIN
+#elif defined(CONFIG_STM32F7_TIM3_ADC1)
+#    define ADC1_HAVE_TIMER           1
+#    define ADC1_TIMER_BASE           STM32_TIM3_BASE
+#    define ADC1_TIMER_PCLK_FREQUENCY STM32_APB1_TIM3_CLKIN
+#elif defined(CONFIG_STM32F7_TIM4_ADC1)
+#    define ADC1_HAVE_TIMER           1
+#    define ADC1_TIMER_BASE           STM32_TIM4_BASE
+#    define ADC1_TIMER_PCLK_FREQUENCY STM32_APB1_TIM4_CLKIN
+#elif defined(CONFIG_STM32F7_TIM5_ADC1)
+#    define ADC1_HAVE_TIMER           1
+#    define ADC1_TIMER_BASE           STM32_TIM5_BASE
+#    define ADC1_TIMER_PCLK_FREQUENCY STM32_APB1_TIM5_CLKIN
+#elif defined(CONFIG_STM32F7_TIM6_ADC1)
+#    define ADC1_HAVE_TIMER           1
+#    define ADC1_TIMER_BASE           STM32_TIM6_BASE
+#    define ADC1_TIMER_PCLK_FREQUENCY STM32_APB1_TIM6_CLKIN
+#elif defined(CONFIG_STM32F7_TIM8_ADC1)
+#    define ADC1_HAVE_TIMER           1
+#    define ADC1_TIMER_BASE           STM32_TIM8_BASE
+#    define ADC1_TIMER_PCLK_FREQUENCY STM32_APB2_TIM8_CLKIN
+#else
+#    undef  ADC1_HAVE_TIMER
+#endif
+
+#ifdef ADC1_HAVE_TIMER
+#  ifndef CONFIG_STM32F7_ADC1_SAMPLE_FREQUENCY
+#    error "CONFIG_STM32F7_ADC1_SAMPLE_FREQUENCY not defined"
+#  endif
+#  ifndef CONFIG_STM32F7_ADC1_TIMTRIG
+#    error "CONFIG_STM32F7_ADC1_TIMTRIG not defined"
+#    warning "Values 0:CC1 1:CC2 2:CC3 3:CC4 4:TRGO"
+#  endif
+#endif
+
+#if defined(CONFIG_STM32F7_TIM1_ADC2)
+#    define ADC2_HAVE_TIMER           1
+#    define ADC2_TIMER_BASE           STM32_TIM1_BASE
+#    define ADC2_TIMER_PCLK_FREQUENCY STM32_APB2_TIM1_CLKIN
+#elif defined(CONFIG_STM32F7_TIM2_ADC2)
+#    define ADC2_HAVE_TIMER           1
+#    define ADC2_TIMER_BASE           STM32_TIM2_BASE
+#    define ADC2_TIMER_PCLK_FREQUENCY STM32_APB1_TIM2_CLKIN
+#elif defined(CONFIG_STM32F7_TIM3_ADC2)
+#    define ADC2_HAVE_TIMER           1
+#    define ADC2_TIMER_BASE           STM32_TIM3_BASE
+#    define ADC2_TIMER_PCLK_FREQUENCY STM32_APB1_TIM3_CLKIN
+#elif defined(CONFIG_STM32F7_TIM4_ADC2)
+#    define ADC2_HAVE_TIMER           1
+#    define ADC2_TIMER_BASE           STM32_TIM4_BASE
+#    define ADC2_TIMER_PCLK_FREQUENCY STM32_APB1_TIM4_CLKIN
+#elif defined(CONFIG_STM32F7_TIM5_ADC2)
+#    define ADC2_HAVE_TIMER           1
+#    define ADC2_TIMER_BASE           STM32_TIM5_BASE
+#    define ADC2_TIMER_PCLK_FREQUENCY STM32_APB1_TIM5_CLKIN
+#elif defined(CONFIG_STM32F7_TIM6_ADC2)
+#    define ADC2_HAVE_TIMER           1
+#    define ADC2_TIMER_BASE           STM32_TIM6_BASE
+#    define ADC2_TIMER_PCLK_FREQUENCY STM32_APB1_TIM6_CLKIN
+#elif defined(CONFIG_STM32F7_TIM8_ADC2)
+#    define ADC2_HAVE_TIMER           1
+#    define ADC2_TIMER_BASE           STM32_TIM8_BASE
+#    define ADC2_TIMER_PCLK_FREQUENCY STM32_APB2_TIM8_CLKIN
+#else
+#    undef  ADC2_HAVE_TIMER
+#endif
+
+#ifdef ADC2_HAVE_TIMER
+#  ifndef CONFIG_STM32F7_ADC2_SAMPLE_FREQUENCY
+#    error "CONFIG_STM32F7_ADC2_SAMPLE_FREQUENCY not defined"
+#  endif
+#  ifndef CONFIG_STM32F7_ADC2_TIMTRIG
+#    error "CONFIG_STM32F7_ADC2_TIMTRIG not defined"
+#    warning "Values 0:CC1 1:CC2 2:CC3 3:CC4 4:TRGO"
+#  endif
+#endif
+
+#if defined(CONFIG_STM32F7_TIM1_ADC3)
+#    define ADC3_HAVE_TIMER           1
+#    define ADC3_TIMER_BASE           STM32_TIM1_BASE
+#    define ADC3_TIMER_PCLK_FREQUENCY STM32_APB2_TIM1_CLKIN
+#elif defined(CONFIG_STM32F7_TIM2_ADC3)
+#    define ADC3_HAVE_TIMER           1
+#    define ADC3_TIMER_BASE           STM32_TIM2_BASE
+#    define ADC3_TIMER_PCLK_FREQUENCY STM32_APB1_TIM2_CLKIN
+#elif defined(CONFIG_STM32F7_TIM3_ADC3)
+#    define ADC3_HAVE_TIMER           1
+#    define ADC3_TIMER_BASE           STM32_TIM3_BASE
+#    define ADC3_TIMER_PCLK_FREQUENCY STM32_APB1_TIM3_CLKIN
+#elif defined(CONFIG_STM32F7_TIM4_ADC3)
+#    define ADC3_HAVE_TIMER           1
+#    define ADC3_TIMER_BASE           STM32_TIM4_BASE
+#    define ADC3_TIMER_PCLK_FREQUENCY STM32_APB1_TIM4_CLKIN
+#elif defined(CONFIG_STM32F7_TIM5_ADC3)
+#    define ADC3_HAVE_TIMER           1
+#    define ADC3_TIMER_BASE           STM32_TIM5_BASE
+#    define ADC3_TIMER_PCLK_FREQUENCY STM32_APB1_TIM5_CLKIN
+#elif defined(CONFIG_STM32F7_TIM6_ADC3)
+#    define ADC3_HAVE_TIMER           1
+#    define ADC3_TIMER_BASE           STM32_TIM6_BASE
+#    define ADC3_TIMER_PCLK_FREQUENCY STM32_APB1_TIM6_CLKIN
+#elif defined(CONFIG_STM32F7_TIM8_ADC3)
+#    define ADC3_HAVE_TIMER           1
+#    define ADC3_TIMER_BASE           STM32_TIM8_BASE
+#    define ADC3_TIMER_PCLK_FREQUENCY STM32_APB2_TIM8_CLKIN
+#else
+#    undef  ADC3_HAVE_TIMER
+#endif
+
+#ifdef ADC3_HAVE_TIMER
+#  ifndef CONFIG_STM32F7_ADC3_SAMPLE_FREQUENCY
+#    error "CONFIG_STM32F7_ADC3_SAMPLE_FREQUENCY not defined"
+#  endif
+#  ifndef CONFIG_STM32F7_ADC3_TIMTRIG
+#    error "CONFIG_STM32F7_ADC3_TIMTRIG not defined"
+#    warning "Values 0:CC1 1:CC2 2:CC3 3:CC4 4:TRGO"
+#  endif
+#endif
+
+#if defined(ADC1_HAVE_TIMER) || defined(ADC2_HAVE_TIMER) || \
+    defined(ADC3_HAVE_TIMER)
+#  define ADC_HAVE_TIMER 1
+#else
+#  undef ADC_HAVE_TIMER
+#endif
+
+/* NOTE:  The following assumes that all possible combinations of timers and
+ * values are support EXTSEL.  That is not so and it varies from one STM32
+ * to another.  But this (wrong) assumptions keeps the logic as simple as
+ * possible.  If unsupported combination is used, an error will show up
+ * later during compilation although it may be difficult to track it back
+ * to this simplification.
+ *
+ */
+
+#define ADC1_EXTSEL_T1CC1      ADC_CR2_EXTSEL_T1CC1
+#define ADC1_EXTSEL_T1CC2      ADC_CR2_EXTSEL_T1CC2
+#define ADC1_EXTSEL_T1CC3      ADC_CR2_EXTSEL_T1CC3
+#define ADC1_EXTSEL_T1CC4      ADC_CR2_EXTSEL_T1CC4
+#define ADC1_EXTSEL_T1TRGO     ADC_CR2_EXTSEL_T1TRGO
+#define ADC1_EXTSEL_T1TRGO2    ADC_CR2_EXTSEL_T1TRGO2
+#define ADC2_EXTSEL_T1CC1      ADC_CR2_EXTSEL_T1CC1
+#define ADC2_EXTSEL_T1CC2      ADC_CR2_EXTSEL_T1CC2
+#define ADC2_EXTSEL_T1CC3      ADC_CR2_EXTSEL_T1CC3
+#define ADC2_EXTSEL_T1CC4      ADC_CR2_EXTSEL_T1CC4
+#define ADC2_EXTSEL_T1TRGO     ADC_CR2_EXTSEL_T1TRGO
+#define ADC2_EXTSEL_T1TRGO2    ADC_CR2_EXTSEL_T1TRGO2
+#define ADC3_EXTSEL_T1CC1      ADC_CR2_EXTSEL_T1CC1
+#define ADC3_EXTSEL_T1CC2      ADC_CR2_EXTSEL_T1CC2
+#define ADC3_EXTSEL_T1CC3      ADC_CR2_EXTSEL_T1CC3
+#define ADC3_EXTSEL_T1CC4      ADC_CR2_EXTSEL_T1CC4
+#define ADC3_EXTSEL_T1TRGO     ADC_CR2_EXTSEL_T1TRGO
+#define ADC3_EXTSEL_T1TRGO2    ADC_CR2_EXTSEL_T1TRGO2
+
+#define ADC1_EXTSEL_T2CC1      ADC_CR2_EXTSEL_T2CC1
+#define ADC1_EXTSEL_T2CC2      ADC_CR2_EXTSEL_T2CC2
+#define ADC1_EXTSEL_T2CC3      ADC_CR2_EXTSEL_T2CC3
+#define ADC1_EXTSEL_T2CC4      ADC_CR2_EXTSEL_T2CC4
+#define ADC1_EXTSEL_T2TRGO     ADC_CR2_EXTSEL_T2TRGO
+#define ADC2_EXTSEL_T2CC1      ADC_CR2_EXTSEL_T2CC1
+#define ADC2_EXTSEL_T2CC2      ADC_CR2_EXTSEL_T2CC2
+#define ADC2_EXTSEL_T2CC3      ADC_CR2_EXTSEL_T2CC3
+#define ADC2_EXTSEL_T2CC4      ADC_CR2_EXTSEL_T2CC4
+#define ADC2_EXTSEL_T2TRGO     ADC_CR2_EXTSEL_T2TRGO
+#define ADC3_EXTSEL_T2CC1      ADC_CR2_EXTSEL_T2CC1
+#define ADC3_EXTSEL_T2CC2      ADC_CR2_EXTSEL_T2CC2
+#define ADC3_EXTSEL_T2CC3      ADC_CR2_EXTSEL_T2CC3
+#define ADC3_EXTSEL_T2CC4      ADC_CR2_EXTSEL_T2CC4
+#define ADC3_EXTSEL_T2TRGO     ADC_CR2_EXTSEL_T2TRGO
+
+#define ADC1_EXTSEL_T3CC1      ADC_CR2_EXTSEL_T3CC1
+#define ADC1_EXTSEL_T3CC2      ADC_CR2_EXTSEL_T3CC2
+#define ADC1_EXTSEL_T3CC3      ADC_CR2_EXTSEL_T3CC3
+#define ADC1_EXTSEL_T3CC4      ADC_CR2_EXTSEL_T3CC4
+#define ADC1_EXTSEL_T3TRGO     ADC_CR2_EXTSEL_T3TRGO
+#define ADC2_EXTSEL_T3CC1      ADC_CR2_EXTSEL_T3CC1
+#define ADC2_EXTSEL_T3CC2      ADC_CR2_EXTSEL_T3CC2
+#define ADC2_EXTSEL_T3CC3      ADC_CR2_EXTSEL_T3CC3
+#define ADC2_EXTSEL_T3CC4      ADC_CR2_EXTSEL_T3CC4
+#define ADC2_EXTSEL_T3TRGO     ADC_CR2_EXTSEL_T3TRGO
+#define ADC3_EXTSEL_T3CC1      ADC_CR2_EXTSEL_T3CC1
+#define ADC3_EXTSEL_T3CC2      ADC_CR2_EXTSEL_T3CC2
+#define ADC3_EXTSEL_T3CC3      ADC_CR2_EXTSEL_T3CC3
+#define ADC3_EXTSEL_T3CC4      ADC_CR2_EXTSEL_T3CC4
+#define ADC3_EXTSEL_T3TRGO     ADC_CR2_EXTSEL_T3TRGO
+
+#define ADC1_EXTSEL_T4CC1      ADC_CR2_EXTSEL_T4CC1
+#define ADC1_EXTSEL_T4CC2      ADC_CR2_EXTSEL_T4CC2
+#define ADC1_EXTSEL_T4CC3      ADC_CR2_EXTSEL_T4CC3
+#define ADC1_EXTSEL_T4CC4      ADC_CR2_EXTSEL_T4CC4
+#define ADC1_EXTSEL_T4TRGO     ADC_CR2_EXTSEL_T4TRGO
+#define ADC2_EXTSEL_T4CC1      ADC_CR2_EXTSEL_T4CC1
+#define ADC2_EXTSEL_T4CC2      ADC_CR2_EXTSEL_T4CC2
+#define ADC2_EXTSEL_T4CC3      ADC_CR2_EXTSEL_T4CC3
+#define ADC2_EXTSEL_T4CC4      ADC_CR2_EXTSEL_T4CC4
+#define ADC2_EXTSEL_T4TRGO     ADC_CR2_EXTSEL_T4TRGO
+#define ADC3_EXTSEL_T4CC1      ADC_CR2_EXTSEL_T4CC1
+#define ADC3_EXTSEL_T4CC2      ADC_CR2_EXTSEL_T4CC2
+#define ADC3_EXTSEL_T4CC3      ADC_CR2_EXTSEL_T4CC3
+#define ADC3_EXTSEL_T4CC4      ADC_CR2_EXTSEL_T4CC4
+#define ADC3_EXTSEL_T4TRGO     ADC_CR2_EXTSEL_T4TRGO
+
+#define ADC1_EXTSEL_T5CC1      ADC_CR2_EXTSEL_T5CC1
+#define ADC1_EXTSEL_T5CC2      ADC_CR2_EXTSEL_T5CC2
+#define ADC1_EXTSEL_T5CC3      ADC_CR2_EXTSEL_T5CC3
+#define ADC1_EXTSEL_T5CC4      ADC_CR2_EXTSEL_T5CC4
+#define ADC1_EXTSEL_T5TRGO     ADC_CR2_EXTSEL_T5TRGO
+#define ADC2_EXTSEL_T5CC1      ADC_CR2_EXTSEL_T5CC1
+#define ADC2_EXTSEL_T5CC2      ADC_CR2_EXTSEL_T5CC2
+#define ADC2_EXTSEL_T5CC3      ADC_CR2_EXTSEL_T5CC3
+#define ADC2_EXTSEL_T5CC4      ADC_CR2_EXTSEL_T5CC4
+#define ADC2_EXTSEL_T5TRGO     ADC_CR2_EXTSEL_T5TRGO
+#define ADC3_EXTSEL_T5CC1      ADC_CR2_EXTSEL_T5CC1
+#define ADC3_EXTSEL_T5CC2      ADC_CR2_EXTSEL_T5CC2
+#define ADC3_EXTSEL_T5CC3      ADC_CR2_EXTSEL_T5CC3
+#define ADC3_EXTSEL_T5CC4      ADC_CR2_EXTSEL_T5CC4
+#define ADC3_EXTSEL_T5TRGO     ADC_CR2_EXTSEL_T5TRGO
+
+#define ADC1_EXTSEL_T6CC1      ADC_CR2_EXTSEL_T6CC1
+#define ADC1_EXTSEL_T6CC2      ADC_CR2_EXTSEL_T6CC2
+#define ADC1_EXTSEL_T6CC3      ADC_CR2_EXTSEL_T6CC3
+#define ADC1_EXTSEL_T6CC4      ADC_CR2_EXTSEL_T6CC4
+#define ADC1_EXTSEL_T6TRGO     ADC_CR2_EXTSEL_T6TRGO
+#define ADC2_EXTSEL_T6CC1      ADC_CR2_EXTSEL_T6CC1
+#define ADC2_EXTSEL_T6CC2      ADC_CR2_EXTSEL_T6CC2
+#define ADC2_EXTSEL_T6CC3      ADC_CR2_EXTSEL_T6CC3
+#define ADC2_EXTSEL_T6CC4      ADC_CR2_EXTSEL_T6CC4
+#define ADC2_EXTSEL_T6TRGO     ADC_CR2_EXTSEL_T6TRGO
+#define ADC3_EXTSEL_T6CC1      ADC_CR2_EXTSEL_T6CC1
+#define ADC3_EXTSEL_T6CC2      ADC_CR2_EXTSEL_T6CC2
+#define ADC3_EXTSEL_T6CC3      ADC_CR2_EXTSEL_T6CC3
+#define ADC3_EXTSEL_T6CC4      ADC_CR2_EXTSEL_T6CC4
+#define ADC3_EXTSEL_T6TRGO     ADC_CR2_EXTSEL_T6TRGO
+
+#define ADC1_EXTSEL_T8CC1      ADC_CR2_EXTSEL_T8CC1
+#define ADC1_EXTSEL_T8CC2      ADC_CR2_EXTSEL_T8CC2
+#define ADC1_EXTSEL_T8CC3      ADC_CR2_EXTSEL_T8CC3
+#define ADC1_EXTSEL_T8CC4      ADC_CR2_EXTSEL_T8CC4
+#define ADC1_EXTSEL_T8TRGO     ADC_CR2_EXTSEL_T8TRGO
+#define ADC1_EXTSEL_T8TRGO2    ADC_CR2_EXTSEL_T8TRGO2
+#define ADC2_EXTSEL_T8CC1      ADC_CR2_EXTSEL_T8CC1
+#define ADC2_EXTSEL_T8CC2      ADC_CR2_EXTSEL_T8CC2
+#define ADC2_EXTSEL_T8CC3      ADC_CR2_EXTSEL_T8CC3
+#define ADC2_EXTSEL_T8CC4      ADC_CR2_EXTSEL_T8CC4
+#define ADC2_EXTSEL_T8TRGO     ADC_CR2_EXTSEL_T8TRGO
+#define ADC2_EXTSEL_T8TRGO2    ADC_CR2_EXTSEL_T8TRGO2
+#define ADC3_EXTSEL_T8CC1      ADC_CR2_EXTSEL_T8CC1
+#define ADC3_EXTSEL_T8CC2      ADC_CR2_EXTSEL_T8CC2
+#define ADC3_EXTSEL_T8CC3      ADC_CR2_EXTSEL_T8CC3
+#define ADC3_EXTSEL_T8CC4      ADC_CR2_EXTSEL_T8CC4
+#define ADC3_EXTSEL_T8TRGO     ADC_CR2_EXTSEL_T8TRGO
+#define ADC3_EXTSEL_T8TRGO2     ADC_CR2_EXTSEL_T8TRGO2
+
+#if defined(CONFIG_STM32F7_TIM1_ADC1)
+#  if CONFIG_STM32F7_ADC1_TIMTRIG == 0
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T1CC1
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 1
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T1CC2
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 2
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T1CC3
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 3
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T1CC4
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 4
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T1TRGO
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 5
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T1TRGO2
+#  else
+#    error "CONFIG_STM32F7_ADC1_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32F7_TIM2_ADC1)
+#  if CONFIG_STM32F7_ADC1_TIMTRIG == 0
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T2CC1
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 1
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T2CC2
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 2
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T2CC3
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 3
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T2CC4
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 4
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T2TRGO
+#  else
+#    error "CONFIG_STM32F7_ADC1_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32F7_TIM3_ADC1)
+#  if CONFIG_STM32F7_ADC1_TIMTRIG == 0
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T3CC1
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 1
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T3CC2
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 2
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T3CC3
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 3
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T3CC4
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 4
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T3TRGO
+#  else
+#    error "CONFIG_STM32F7_ADC1_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32F7_TIM4_ADC1)
+#  if CONFIG_STM32F7_ADC1_TIMTRIG == 0
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T4CC1
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 1
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T4CC2
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 2
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T4CC3
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 3
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T4CC4
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 4
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T4TRGO
+#  else
+#    error "CONFIG_STM32F7_ADC1_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32F7_TIM5_ADC1)
+#  if CONFIG_STM32F7_ADC1_TIMTRIG == 0
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T5CC1
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 1
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T5CC2
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 2
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T5CC3
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 3
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T5CC4
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 4
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T5TRGO
+#  else
+#    error "CONFIG_STM32F7_ADC1_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32F7_TIM6_ADC1)
+#  if CONFIG_STM32F7_ADC1_TIMTRIG == 0
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T6CC1
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 1
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T6CC2
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 2
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T6CC3
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 3
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T6CC4
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 4
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T6TRGO
+#  else
+#    error "CONFIG_STM32F7_ADC1_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32F7_TIM8_ADC1)
+#  if CONFIG_STM32F7_ADC1_TIMTRIG == 0
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T8CC1
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 1
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T8CC2
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 2
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T8CC3
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 3
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T8CC4
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 4
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T8TRGO
+#  elif CONFIG_STM32F7_ADC1_TIMTRIG == 5
+#    define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T8TRGO2
+#  else
+#    error "CONFIG_STM32F7_ADC1_TIMTRIG is out of range"
+#  endif
+#endif
+
+#if defined(CONFIG_STM32F7_TIM1_ADC2)
+#  if CONFIG_STM32F7_ADC2_TIMTRIG == 0
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T1CC1
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 1
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T1CC2
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 2
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T1CC3
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 3
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T1CC4
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 4
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T1TRGO
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 5
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T1TRGO2
+#  else
+#    error "CONFIG_STM32F7_ADC2_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32F7_TIM2_ADC2)
+#  if CONFIG_STM32F7_ADC2_TIMTRIG == 0
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T2CC1
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 1
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T2CC2
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 2
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T2CC3
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 3
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T2CC4
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 4
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T2TRGO
+#  else
+#    error "CONFIG_STM32F7_ADC2_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32F7_TIM3_ADC2)
+#  if CONFIG_STM32F7_ADC2_TIMTRIG == 0
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T3CC1
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 1
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T3CC2
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 2
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T3CC3
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 3
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T3CC4
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 4
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T3TRGO
+#  else
+#    error "CONFIG_STM32F7_ADC2_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32F7_TIM4_ADC2)
+#  if CONFIG_STM32F7_ADC2_TIMTRIG == 0
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T4CC1
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 1
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T4CC2
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 2
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T4CC3
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 3
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T4CC4
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 4
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T4TRGO
+#  else
+#    error "CONFIG_STM32F7_ADC2_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32F7_TIM5_ADC2)
+#  if CONFIG_STM32F7_ADC2_TIMTRIG == 0
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T5CC1
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 1
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T5CC2
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 2
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T5CC3
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 3
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T5CC4
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 4
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T5TRGO
+#  else
+#    error "CONFIG_STM32F7_ADC2_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32F7_TIM6_ADC2)
+#  if CONFIG_STM32F7_ADC2_TIMTRIG == 0
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T6CC1
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 1
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T6CC2
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 2
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T6CC3
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 3
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T6CC4
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 4
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T6TRGO
+#  else
+#    error "CONFIG_STM32F7_ADC2_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32F7_TIM8_ADC2)
+#  if CONFIG_STM32F7_ADC2_TIMTRIG == 0
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T8CC1
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 1
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T8CC2
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 2
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T8CC3
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 3
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T8CC4
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 4
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T8TRGO
+#  elif CONFIG_STM32F7_ADC2_TIMTRIG == 5
+#    define ADC2_EXTSEL_VALUE ADC2_EXTSEL_T8TRGO2
+#  else
+#    error "CONFIG_STM32F7_ADC2_TIMTRIG is out of range"
+#  endif
+#endif
+
+#if defined(CONFIG_STM32F7_TIM1_ADC3)
+#  if CONFIG_STM32F7_ADC3_TIMTRIG == 0
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T1CC1
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 1
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T1CC2
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 2
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T1CC3
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 3
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T1CC4
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 4
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T1TRGO
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 5
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T1TRGO2
+#  else
+#    error "CONFIG_STM32F7_ADC3_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32F7_TIM2_ADC3)
+#  if CONFIG_STM32F7_ADC3_TIMTRIG == 0
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T2CC1
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 1
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T2CC2
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 2
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T2CC3
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 3
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T2CC4
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 4
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T2TRGO
+#  else
+#    error "CONFIG_STM32F7_ADC3_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32F7_TIM3_ADC3)
+#  if CONFIG_STM32F7_ADC3_TIMTRIG == 0
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T3CC1
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 1
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T3CC2
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 2
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T3CC3
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 3
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T3CC4
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 4
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T3TRGO
+#  else
+#    error "CONFIG_STM32F7_ADC3_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32F7_TIM4_ADC3)
+#  if CONFIG_STM32F7_ADC3_TIMTRIG == 0
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T4CC1
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 1
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T4CC2
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 2
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T4CC3
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 3
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T4CC4
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 4
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T4TRGO
+#  else
+#    error "CONFIG_STM32F7_ADC3_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32F7_TIM5_ADC3)
+#  if CONFIG_STM32F7_ADC3_TIMTRIG == 0
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T5CC1
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 1
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T5CC2
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 2
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T5CC3
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 3
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T5CC4
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 4
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T5TRGO
+#  else
+#    error "CONFIG_STM32F7_ADC3_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32F7_TIM6_ADC3)
+#  if CONFIG_STM32F7_ADC3_TIMTRIG == 0
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T6CC1
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 1
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T6CC2
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 2
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T6CC3
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 3
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T6CC4
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 4
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T6TRGO
+#  else
+#    error "CONFIG_STM32F7_ADC3_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32F7_TIM8_ADC3)
+#  if CONFIG_STM32F7_ADC3_TIMTRIG == 0
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T8CC1
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 1
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T8CC2
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 2
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T8CC3
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 3
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T8CC4
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 4
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T8TRGO
+#  elif CONFIG_STM32F7_ADC3_TIMTRIG == 5
+#    define ADC3_EXTSEL_VALUE ADC3_EXTSEL_T8TRGO2
+#  else
+#    error "CONFIG_STM32F7_ADC3_TIMTRIG is out of range"
+#  endif
+#endif
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: stm32_adc_initialiize
+ *
+ * Description:
+ *   Initialize the ADC.
+ *
+ * Input Parameters:
+ *   intf      - Could be {1,2,3} for ADC1, ADC2, or ADC3
+ *   chanlist  - The list of channels
+ *   nchannels - Number of channels
+ *
+ * Returned Value:
+ *   Valid can device structure reference on succcess; a NULL on failure
+ *
+ ****************************************************************************/
+
+struct adc_dev_s;
+struct adc_dev_s *stm32_adc_initialize(int intf,
+                                        FAR const uint8_t *chanlist,
+                                        int nchannels);
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif /* __ASSEMBLY__ */
+
+#endif /* CONFIG_STM32F7_ADC1 || CONFIG_STM32F7_ADC2 ||
+        * CONFIG_STM32F7_ADC3
+        */
+#endif /* __ARCH_ARM_SRC_STM32F7_STM32_ADC_H */
diff --git a/arch/arm/src/stm32f7/stm32_alarm.h b/arch/arm/src/stm32f7/stm32_alarm.h
new file mode 100644
index 0000000000000000000000000000000000000000..ee0b8b89164b480fcf44e80be348a901522baa85
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_alarm.h
@@ -0,0 +1,112 @@
+/****************************************************************************
+ * arch/arm/src/include/stm32f7/stm32_alarm.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Neil hancock - delegated to Gregory Nutt Mar 30, 2016
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_STM32_ALARM_H
+#define __ARCH_ARM_SRC_STM32F7_STM32_ALARM_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#ifdef CONFIG_RTC_ALARM
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+typedef CODE void (*alm_callback_t)(FAR void *arg, unsigned int alarmid);
+
+/* These features map to STM32 RTC from stm32F7xx
+ */
+
+enum alm_id_e
+{
+  RTC_ALARMA = 0,              /* RTC ALARM A */
+  RTC_ALARMB,                  /* RTC ALARM B */
+  RTC_ALARM_LAST
+};
+
+/* Structure used to pass parameters to set an alarm */
+
+struct alm_setalarm_s
+{
+  int as_id;                   /* enum alm_id_e */
+  struct tm as_time;           /* Alarm expiration time */
+  alm_callback_t as_cb;        /* Callback (if non-NULL) */
+  FAR void *as_arg;            /* Argument for callback */
+};
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_rtc_setalarm
+ *
+ * Description:
+ *   Set an alarm to an absolute time using associated hardware.
+ *
+ * Input Parameters:
+ *  alminfo - Information about the alarm configuration.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+int stm32_rtc_setalarm(FAR struct alm_setalarm_s *alminfo);
+
+/****************************************************************************
+ * Name: stm32_rtc_cancelalarm
+ *
+ * Description:
+ *   Cancel an alarm.
+ *
+ * Input Parameters:
+ *  alarmid - Identifies the alarm to be cancelled
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+int stm32_rtc_cancelalarm(enum alm_id_e alarmid);
+
+#endif /* CONFIG_RTC_ALARM */
+#endif /* __ARCH_ARM_SRC_STM32F7_STM32_ALARM_H */
diff --git a/arch/arm/src/stm32f7/stm32_allocateheap.c b/arch/arm/src/stm32f7/stm32_allocateheap.c
index 919890b83343e00298d30f92735610845e72348d..ffa6d27455b39b45ed67b7e487c87711de986608 100644
--- a/arch/arm/src/stm32f7/stm32_allocateheap.c
+++ b/arch/arm/src/stm32f7/stm32_allocateheap.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32f7/up_allocateheap.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -41,6 +41,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -56,10 +57,12 @@
 #include "up_arch.h"
 #include "up_internal.h"
 #include "stm32_mpuinit.h"
+#include "stm32_dtcm.h"
 
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
 /* Internal SRAM is available in all members of the STM32 family. The
  * following definitions must be provided to specify the size and
  * location of internal(system) SRAM:
@@ -91,6 +94,20 @@
 #define SRAM2_START  STM32_SRAM2_BASE
 #define SRAM2_END    (SRAM2_START + STM32F7_SRAM2_SIZE)
 
+/* The STM32 F7 has DTCM memory */
+
+#undef HAVE_DTCM
+#define HAVE_DTCM 1
+#if !defined(DTCM_START) || !defined(DTCM_END)
+#  undef HAVE_DTCM
+#endif
+
+/* DTCM to be excluded from the main heap. */
+
+#ifdef CONFIG_STM32F7_DTCMEXCLUDE
+#  undef HAVE_DTCM
+#endif
+
 /* We can't possibly have FSMC SRAM if the FSMC is not enabled */
 
 #ifndef CONFIG_STM32F7_FSMC
@@ -109,7 +126,7 @@
 #  endif
 #endif
 
-/* There are 3 possible heap configurations:
+/* There are 4 possible heap configurations:
  *
  * Configuration 1. System SRAM1 (only)
  *                  CONFIG_MM_REGIONS == 1
@@ -117,9 +134,18 @@
  * Configuration 2. System SRAM1 and SRAM2
  *                  CONFIG_MM_REGIONS == 2
  *                  CONFIG_STM32F7_FSMC_SRAM NOT defined
- * Configuration 3. System SRAM1 and SRAM2 and FSMC SRAM
+ * Configuration 3. System SRAM1 and SRAM2 and DTCM
+ *                  CONFIG_MM_REGIONS == 3
+ *                  CONFIG_STM32F7_FSMC_SRAM undefined
+ *                  HAVE_DTCM defined
+ * Configuration 4. System SRAM1 and SRAM2 and FSMC SRAM
  *                  CONFIG_MM_REGIONS == 3
  *                  CONFIG_STM32F7_FSMC_SRAM defined
+ *                  HAVE_DTCM undefined
+ * Configuration 5. System SRAM1 and SRAM2 and DTCM and FSMC SRAM
+ *                  CONFIG_MM_REGIONS == 4
+ *                  CONFIG_STM32F7_FSMC_SRAM defined
+ *                  HAVE_DTCM defined
  *
  * Let's make sure that all definitions are consistent before doing
  * anything else
@@ -127,24 +153,48 @@
 
 #if CONFIG_MM_REGIONS < 2
 #  ifdef CONFIG_STM32F7_FSMC_SRAM
-#    warning FSMC SRAM and SRAM2 excluded from the heap
-#  else
-#    warning "SRAM2 excluded from the heap"
+#    warning "FSMC SRAM excluded from the heap"
+#    undef CONFIG_STM32F7_FSMC_SRAM
+#  endif
+#  ifdef HAVE_DTCM
+#    warning "DTCM excluded from the heap"
+#    undef HAVE_DTCM
 #  endif
+#  warning "SRAM2 excluded from the heap"
 #elif CONFIG_MM_REGIONS < 3
 #  ifdef CONFIG_STM32F7_FSMC_SRAM
-#    warning FSMC SRAM excluded from the heap
+#    warning "FSMC SRAM excluded from the heap"
+#    undef CONFIG_STM32F7_FSMC_SRAM
+#  endif
+#  ifdef HAVE_DTCM
+#    warning "DTCM excluded from the heap"
+#    undef HAVE_DTCM
 #  endif
 #elif CONFIG_MM_REGIONS < 4
-#  ifndef CONFIG_STM32F7_FSMC_SRAM
-#    error  CONFIG_MM_REGIONS > 2 but I do not know what some of the region(s) are
+#  if defined(CONFIG_STM32F7_FSMC_SRAM) && defined(HAVE_DTCM)
+#    warning "CONFIG_MM_REGIONS == 3 but have both FSMC SRAM and DTCM. DTCM excluded from the heap."
+#    undef  HAVE_DTCM
+#  elif !defined(CONFIG_STM32F7_FSMC_SRAM) && !defined(HAVE_DTCM)
+#    error  "CONFIG_MM_REGIONS == 3 but I do not know what some of the region(s) are"
+#    undef  CONFIG_MM_REGIONS
+#    define CONFIG_MM_REGIONS 2
+#  endif
+#elif CONFIG_MM_REGIONS < 5
+#  if !defined(CONFIG_STM32F7_FSMC_SRAM) && !defined(HAVE_DTCM)
+#    error  "CONFIG_MM_REGIONS == 4 but I do not know what some of the region(s) are"
 #    undef  CONFIG_MM_REGIONS
 #    define CONFIG_MM_REGIONS 2
+#  elif !defined(CONFIG_STM32F7_FSMC_SRAM) || !defined(HAVE_DTCM)
+#    error  "CONFIG_MM_REGIONS == 4 but I do not know what some of the region(s) are"
+#    undef  CONFIG_MM_REGIONS
+#    define CONFIG_MM_REGIONS 3
 #  endif
 #else
-#  error CONFIG_MM_REGIONS > 3 but I do not know what some of the region(s) are
+#  error "CONFIG_MM_REGIONS > 4 but I do not know what some of the region(s) are"
 #  undef CONFIG_MM_REGIONS
-#  ifdef CONFIG_STM32F7_FSMC_SRAM
+#  if defined(CONFIG_STM32F7_FSMC_SRAM) && defined(HAVE_DTCM)
+#    define CONFIG_MM_REGIONS 4
+#  elif defined(CONFIG_STM32F7_FSMC_SRAM) || defined(HAVE_DTCM)
 #    define CONFIG_MM_REGIONS 3
 #  else
 #    define CONFIG_MM_REGIONS 2
@@ -167,7 +217,7 @@
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_HEAP
+#ifdef CONFIG_HEAP_COLORATION
 static inline void up_heap_color(FAR void *start, size_t size)
 {
   memset(start, HEAP_COLOR, size);
@@ -337,6 +387,24 @@ void up_addregion(void)
 
   kumm_addregion((FAR void *)SRAM2_START, SRAM2_END-SRAM2_START);
 
+#ifdef HAVE_DTCM
+#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP)
+
+  /* Allow user-mode access to the DTCM heap */
+
+  stm32_mpu_uheap((uintptr_t)DTCM_START, DTCM_END-DTCM_START);
+
+#endif
+
+  /* Colorize the heap for debug */
+
+  up_heap_color((FAR void *)DTCM_START, DTCM_END-DTCM_START);
+
+  /* Add the DTCM user heap region. */
+
+  kumm_addregion((FAR void *)DTCM_START, DTCM_END-DTCM_START);
+#endif
+
 #ifdef CONFIG_STM32F7_FSMC_SRAM
 #if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP)
 
diff --git a/arch/arm/src/stm32f7/stm32_bbsram.c b/arch/arm/src/stm32f7/stm32_bbsram.c
new file mode 100644
index 0000000000000000000000000000000000000000..71adbcfd219b2ac0acacc71429227b07aa69bee3
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_bbsram.c
@@ -0,0 +1,886 @@
+/****************************************************************************
+ * arch/arm/src/stm32f7/stm32_bbsram.c
+ *
+ *   Copyright (C) 2015-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This will driver create a set of files in the STM32's Battery backed up
+ * SRAM. That can be used to store data retained across power cycles.
+ *
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "stm32_bbsram.h"
+#include "chip.h"
+#include "stm32_pwr.h"
+#include "stm32_rtc.h"
+
+#ifdef CONFIG_STM32F7_BBSRAM
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if !defined(CONFIG_STM32F7_BKPSRAM)
+#error Driver Requires CONFIG_STM32F7_BKPSRAM to be enabled
+#endif
+
+#define MAX_OPENCNT           (255) /* Limit of uint8_t */
+
+#ifndef CONFIG_DEBUG_INFO
+#  undef CONFIG_BBSRAM_DEBUG
+#endif
+
+#if defined(CONFIG_BBSRAM_DEBUG)
+#  define BBSRAM_DEBUG_READ() stm32_bbsram_rd()
+#  define BBSRAM_DUMP(p,s)    stm32_bbsram_dump(p,s)
+#else
+#  define BBSRAM_DEBUG_READ()
+#  define BBSRAM_DUMP(p,s)
+#endif
+
+#define BBSRAM_HEADER_SIZE    (sizeof(struct bbsramfh_s))
+#define BBSRAM_CRCED_OFFSET   (sizeof(((struct bbsramfh_s *)0)->crc))
+#define BBSRAM_CRCED_SIZE(l)  (BBSRAM_HEADER_SIZE-(BBSRAM_CRCED_OFFSET)+(l))
+#define BBSRAM_ALIGNMENT      (sizeof(((struct bbsramfh_s *)0)->crc))
+#define BBSRAM_ALIGNMENT_MASK (BBSRAM_ALIGNMENT-1)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* File Header */
+
+struct bbsramfh_s
+{
+  uint32_t crc;                /* CRC calculated over data and this struct
+                                * starting at fileno */
+  uint8_t fileno;              /* The minor number */
+  uint8_t dirty;               /* Data has been written to the file */
+  uint16_t len;                /* Total Bytes in this file */
+  struct timespec lastwrite;   /* Last write time */
+  uint8_t  data[];             /* Data in the file */
+};
+
+struct stm32_bbsram_s
+{
+  sem_t    exclsem;            /* For atomic accesses to this structure */
+  uint8_t  refs;               /* Number of references */
+  FAR struct bbsramfh_s *bbf;  /* File in bbram */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int     stm32_bbsram_open(FAR struct file *filep);
+static int     stm32_bbsram_close(FAR struct file *filep);
+static off_t   stm32_bbsram_seek(FAR struct file *filep, off_t offset,
+                 int whence);
+static ssize_t stm32_bbsram_read(FAR struct file *filep, FAR char *buffer,
+                 size_t len);
+static ssize_t stm32_bbsram_write(FAR struct file *filep,
+                 FAR const char *buffer, size_t len);
+static int stm32_bbsram_ioctl(FAR struct file *filep, int cmd,
+                 unsigned long arg);
+#ifndef CONFIG_DISABLE_POLL
+static int     stm32_bbsram_poll(FAR struct file *filep, FAR struct pollfd *fds,
+                 bool setup);
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+static int     stm32_bbsram_unlink(FAR struct inode *inode);
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+#if defined(CONFIG_BBSRAM_DEBUG)
+static uint8_t debug[STM32F7_BBSRAM_SIZE];
+#endif
+
+static const struct file_operations stm32_bbsram_fops =
+{
+  .open   = stm32_bbsram_open,
+  .close  = stm32_bbsram_close,
+  .read   = stm32_bbsram_read,
+  .write  = stm32_bbsram_write,
+  .seek   = stm32_bbsram_seek,
+  .ioctl  = stm32_bbsram_ioctl,
+#ifndef CONFIG_DISABLE_POLL
+  .poll   = stm32_bbsram_poll,
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  .unlink = stm32_bbsram_unlink,
+#endif
+};
+
+static struct stm32_bbsram_s g_bbsram[CONFIG_STM32F7_BBSRAM_FILES];
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_bbsram_rd
+ ****************************************************************************/
+
+#if defined(CONFIG_BBSRAM_DEBUG)
+static void stm32_bbsram_rd(void)
+{
+  memcpy(&debug, (uint8_t *)STM32_BKPSRAM_BASE, sizeof debug);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_bbsram_rd
+ ****************************************************************************/
+
+#if defined(CONFIG_BBSRAM_DEBUG)
+static void stm32_bbsram_dump(FAR struct bbsramfh_s *bbf, char *op)
+{
+  BBSRAM_DEBUG_READ();
+  _info("%s:\n", op);
+  _info(" File Address:0x%8x\n", bbf);
+  _info("  crc:0x%8x\n", bbf->crc);
+  _info("  fileno:%d\n", (int) bbf->fileno);
+  _info("  dirty:%d\n", (int) bbf->dirty);
+  _info("  length:%d\n", (int) bbf->len);
+  _info("  time:%ld:%ld\n", bbf->lastwrite.tv_sec, bbf->lastwrite.tv_nsec);
+  _info("  data: 0x%2x 0x%2x 0x%2x 0x%2x 0x%2x\n",
+       bbf->data[0], bbf->data[1], bbf->data[2], bbf->data[3], bbf->data[4]);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_bbsram_semgive
+ ****************************************************************************/
+
+static void stm32_bbsram_semgive(FAR struct stm32_bbsram_s *priv)
+{
+  sem_post(&priv->exclsem);
+}
+
+/****************************************************************************
+ * Name: stm32_bbsram_semtake
+ *
+ * Description:
+ *   Take a semaphore handling any exceptional conditions
+ *
+ * Input Parameters:
+ *   priv - A reference to the CAN peripheral state
+ *
+ * Returned Value:
+ *  None
+ *
+****************************************************************************/
+
+static void stm32_bbsram_semtake(FAR struct stm32_bbsram_s *priv)
+{
+  int ret;
+
+  /* Wait until we successfully get the semaphore.  EINTR is the only
+   * expected 'failure' (meaning that the wait for the semaphore was
+   * interrupted by a signal.
+   */
+
+  do
+    {
+      ret = sem_wait(&priv->exclsem);
+      DEBUGASSERT(ret == 0 || errno == EINTR);
+    }
+  while (ret < 0);
+}
+
+/****************************************************************************
+ * Name: stm32_bbsram_ulock
+ *
+ * Description:
+ *   Unprotects RTC registers, RTC backup data registers and backup SRAM
+ *   against parasitic write access
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static inline void stm32_bbsram_unlock(void)
+{
+  stm32_pwr_enablebkp(true);
+}
+
+/****************************************************************************
+ * Name: stm32_bbsram_lock
+ *
+ * Description:
+ *   Protects RTC registers, RTC backup data registers and backup SRAM
+ *   against parasitic write access
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static inline void stm32_bbsram_lock(void)
+{
+  stm32_pwr_enablebkp(false);
+}
+
+/****************************************************************************
+ * Name: stm32_bbsram_crc
+ *
+ * Description:
+ *   Calculates the CRC of the block
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static uint32_t stm32_bbsram_crc(FAR struct bbsramfh_s *pf)
+{
+  return crc32((uint8_t *)pf + BBSRAM_CRCED_OFFSET, BBSRAM_CRCED_SIZE(pf->len));
+}
+
+/****************************************************************************
+ * Name: stm32_bbsram_open
+ *
+ * Description: Open the device
+ *
+ ****************************************************************************/
+
+static int stm32_bbsram_open(FAR struct file *filep)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct stm32_bbsram_s *bbr;
+
+  DEBUGASSERT(inode && inode->i_private);
+  bbr = (FAR struct stm32_bbsram_s *)inode->i_private;
+
+  /* Increment the reference count */
+
+  stm32_bbsram_semtake(bbr);
+  if (bbr->refs == MAX_OPENCNT)
+    {
+      return -EMFILE;
+    }
+  else
+    {
+      bbr->refs++;
+    }
+
+  stm32_bbsram_semgive(bbr);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_bbsram_internal_close
+ *
+ * Description:
+ *    Close BBSRAM entry; Recalculate the time and crc
+ *
+ ****************************************************************************/
+
+static int stm32_bbsram_internal_close(FAR struct bbsramfh_s *bbf)
+{
+  bbf->dirty = 0;
+  (void)clock_gettime(CLOCK_REALTIME, &bbf->lastwrite);
+  bbf->crc = stm32_bbsram_crc(bbf);
+
+  BBSRAM_DUMP(bbf, "close done");
+  return bbf->len;
+}
+
+/****************************************************************************
+ * Name: stm32_bbsram_close
+ *
+ * Description: close the device
+ *
+ ****************************************************************************/
+
+static int stm32_bbsram_close(FAR struct file *filep)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct stm32_bbsram_s *bbr;
+  int ret = OK;
+
+  DEBUGASSERT(inode && inode->i_private);
+  bbr = (FAR struct stm32_bbsram_s *)inode->i_private;
+
+  stm32_bbsram_semtake(bbr);
+
+  BBSRAM_DUMP(bbr->bbf, "close");
+
+  if (bbr->refs == 0)
+    {
+      ret = -EIO;
+    }
+  else
+    {
+      bbr->refs--;
+
+      if (bbr->refs == 0)
+        {
+          if (bbr->bbf->dirty)
+            {
+              /* Recalculate the time and crc */
+
+              stm32_bbsram_unlock();
+              stm32_bbsram_internal_close(bbr->bbf);
+              stm32_bbsram_lock();
+            }
+        }
+    }
+
+  stm32_bbsram_semgive(bbr);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32_bbsram_seek
+ ****************************************************************************/
+
+static off_t stm32_bbsram_seek(FAR struct file *filep, off_t offset,
+                               int whence)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct stm32_bbsram_s *bbr;
+  off_t newpos;
+  int ret;
+
+  DEBUGASSERT(inode && inode->i_private);
+  bbr = (FAR struct stm32_bbsram_s *)inode->i_private;
+
+  stm32_bbsram_semtake(bbr);
+
+  /* Determine the new, requested file position */
+
+  switch (whence)
+    {
+    case SEEK_CUR:
+      newpos = filep->f_pos + offset;
+      break;
+
+    case SEEK_SET:
+      newpos = offset;
+      break;
+
+    case SEEK_END:
+      newpos = bbr->bbf->len + offset;
+      break;
+
+    default:
+      /* Return EINVAL if the whence argument is invalid */
+
+      stm32_bbsram_semgive(bbr);
+      return -EINVAL;
+    }
+
+  /* Opengroup.org:
+   *
+   *  "The lseek() function shall allow the file offset to be set beyond the end
+   *   of the existing data in the file. If data is later written at this point,
+   *   subsequent reads of data in the gap shall return bytes with the value 0
+   *   until data is actually written into the gap."
+   *
+   * We can conform to the first part, but not the second.  But return EINVAL if
+   *
+   *  "...the resulting file offset would be negative for a regular file, block
+   *   special file, or directory."
+   */
+
+  if (newpos >= 0)
+    {
+      filep->f_pos = newpos;
+      ret = newpos;
+    }
+  else
+    {
+      ret = -EINVAL;
+    }
+
+  stm32_bbsram_semgive(bbr);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32_bbsram_read
+ ****************************************************************************/
+
+static ssize_t stm32_bbsram_read(FAR struct file *filep, FAR char *buffer,
+                                 size_t len)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct stm32_bbsram_s *bbr;
+
+  DEBUGASSERT(inode && inode->i_private);
+  bbr = (FAR struct stm32_bbsram_s *)inode->i_private;
+
+  stm32_bbsram_semtake(bbr);
+
+  /* Trim len if read would go beyond end of device */
+
+  if ((filep->f_pos + len) > bbr->bbf->len)
+    {
+      len = bbr->bbf->len - filep->f_pos;
+    }
+
+  memcpy(buffer, &bbr->bbf->data[filep->f_pos], len);
+  filep->f_pos += len;
+  stm32_bbsram_semgive(bbr);
+  return len;
+}
+
+/****************************************************************************
+ * Name: stm32_bbsram_internal_write
+ ****************************************************************************/
+
+static ssize_t stm32_bbsram_internal_write(FAR struct bbsramfh_s *bbf,
+                                           FAR const char *buffer,
+                                           off_t offset, size_t len)
+{
+  bbf->dirty = 1;
+  memcpy(&bbf->data[offset], buffer, len);
+  return len;
+}
+
+/****************************************************************************
+ * Name: stm32_bbsram_write
+ ****************************************************************************/
+
+static ssize_t stm32_bbsram_write(FAR struct file *filep,
+                                  FAR const char *buffer, size_t len)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct stm32_bbsram_s *bbr;
+  int ret = -EFBIG;
+
+  DEBUGASSERT(inode && inode->i_private);
+  bbr = (FAR struct stm32_bbsram_s *)inode->i_private;
+
+  /* Forbid writes past the end of the device */
+
+  if (filep->f_pos <  bbr->bbf->len)
+    {
+      /* Clamp len to avoid crossing the end of the memory */
+
+      if ((filep->f_pos + len) > bbr->bbf->len)
+        {
+          len = bbr->bbf->len - filep->f_pos;
+        }
+
+      ret = len; /* save number of bytes written */
+
+      stm32_bbsram_semtake(bbr);
+      BBSRAM_DUMP(bbr->bbf, "write");
+      stm32_bbsram_unlock();
+      stm32_bbsram_internal_write(bbr->bbf, buffer, filep->f_pos, len);
+      stm32_bbsram_lock();
+      filep->f_pos += len;
+      BBSRAM_DUMP(bbr->bbf, "write done");
+      stm32_bbsram_semgive(bbr);
+    }
+
+  BBSRAM_DEBUG_READ();
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32_bbsram_poll
+ ****************************************************************************/
+
+#ifndef CONFIG_DISABLE_POLL
+static int stm32_bbsram_poll(FAR struct file *filep, FAR struct pollfd *fds,
+                             bool setup)
+{
+  if (setup)
+    {
+      fds->revents |= (fds->events & (POLLIN | POLLOUT));
+      if (fds->revents != 0)
+        {
+          sem_post(fds->sem);
+        }
+    }
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_bbsram_ioctl
+ *
+ * Description: Return device geometry
+ *
+ ****************************************************************************/
+
+static int stm32_bbsram_ioctl(FAR struct file *filep, int cmd,
+                              unsigned long arg)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct stm32_bbsram_s *bbr;
+  int ret = -ENOTTY;
+
+  DEBUGASSERT(inode && inode->i_private);
+  bbr = (FAR struct stm32_bbsram_s *)inode->i_private;
+
+  if (cmd == STM32F7_BBSRAM_GETDESC_IOCTL)
+    {
+      FAR struct bbsramd_s *bbrr = (FAR struct bbsramd_s *)((uintptr_t)arg);
+
+      stm32_bbsram_semtake(bbr);
+      if (!bbrr)
+        {
+          ret = -EINVAL;
+        }
+      else
+        {
+          bbrr->fileno = bbr->bbf->fileno;
+          bbrr->lastwrite = bbr->bbf->lastwrite;
+          bbrr->len = bbr->bbf->len;
+          bbrr->flags = ((bbr->bbf->crc == stm32_bbsram_crc(bbr->bbf))
+                          ? BBSRAM_CRC_VALID : 0);
+          bbrr->flags |= ((bbr->bbf->dirty) ? BBSRAM_DIRTY : 0);
+          ret = OK;
+        }
+
+      stm32_bbsram_semgive(bbr);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32_bbsram_unlink
+ *
+ * Description:
+ *  This function will remove the remove the file from the file system
+ *  it will zero the contents and time stamp. It will leave the fileno
+ *  and pointer to the BBSRAM intact.
+ *  It should be called called on the the file used for the crash dump
+ *  to remove it from visibility in the file system after it is created or
+ *  read thus arming it.
+ *
+ ****************************************************************************/
+
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+static int stm32_bbsram_unlink(FAR struct inode *inode)
+{
+  FAR struct stm32_bbsram_s *bbr;
+
+  DEBUGASSERT(inode && inode->i_private);
+  bbr = (FAR struct stm32_bbsram_s *)inode->i_private;
+
+  stm32_bbsram_semtake(bbr);
+  stm32_bbsram_unlock();
+  memset(bbr->bbf->data, 0, bbr->bbf->len);
+  bbr->bbf->lastwrite.tv_nsec = 0;
+  bbr->bbf->lastwrite.tv_sec = 0;
+  bbr->bbf->crc = stm32_bbsram_crc(bbr->bbf);
+  stm32_bbsram_lock();
+  bbr->refs  = 0;
+  stm32_bbsram_semgive(bbr);
+  sem_destroy(&bbr->exclsem);
+  return 0;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_bbsram_probe
+ *
+ * Description: Based on the number of files defined and their sizes
+ * Initializes the base pointers to the file entries.
+ *
+ ****************************************************************************/
+
+static int stm32_bbsram_probe(int *ent, struct stm32_bbsram_s pdev[])
+{
+  int i;
+  int avail = STM32F7_BBSRAM_SIZE;
+  int alloc;
+  int size;
+  int ret = -EFBIG;
+  struct bbsramfh_s *pf = (struct bbsramfh_s *) STM32_BKPSRAM_BASE;
+
+  for (i = 0; (i < CONFIG_STM32F7_BBSRAM_FILES) && ent[i] && (avail > 0); i++)
+    {
+      /* Validate the actual allocations against what is in the BBSRAM */
+
+      size = ent[i];
+
+      /* Use all that is left */
+
+      if (size == -1)
+        {
+          size = avail - (BBSRAM_HEADER_SIZE + BBSRAM_ALIGNMENT_MASK);
+        }
+
+      /* Add in header size and keep aligned */
+
+      alloc = size + BBSRAM_HEADER_SIZE + BBSRAM_ALIGNMENT_MASK;
+      alloc &= ~(BBSRAM_ALIGNMENT_MASK);
+
+      /* Does it fit? */
+
+      if (alloc <= avail)
+        {
+          ret = i + 1;
+          BBSRAM_DUMP(pf, "probe");
+
+          if (pf->len != size ||
+              pf->fileno != i ||
+              pf->crc != stm32_bbsram_crc(pf))
+            {
+
+              /* Not Valid so wipe the file in BBSRAM */
+
+              memset((uint8_t *)pf, 0, alloc);
+              pf->fileno = i;
+              pf->len = size;
+              pf->crc = stm32_bbsram_crc(pf);
+              BBSRAM_DUMP(pf, "probe reset");
+            }
+
+          pdev[i].bbf = pf;
+          pf = (struct bbsramfh_s *)((uint8_t *)pf + alloc);
+          sem_init(&g_bbsram[i].exclsem, 0, 1);
+        }
+
+      avail -= alloc;
+    }
+
+  BBSRAM_DEBUG_READ();
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function: stm32_bbsraminitialize
+ *
+ * Description:
+ *   Initialize the Battery Backed up SRAM driver.
+ *
+ * Parameters:
+ *   devpath - the path to instantiate the files.
+ *   sizes   - Pointer to a any array of file sizes to create
+ *             the last entry should be 0
+ *             A size of -1 will use all the remaining spaces
+ *
+ * If the length of sizes is greater then CONFIG_STM32_BBSRAM_FILES
+ * CONFIG_STM32_BBSRAM_FILES will be returned.
+ *
+ * Returned Value:
+ *   Number of files created on success; Negated errno on failure.
+ *
+ * Assumptions:
+ *
+ ****************************************************************************/
+
+int stm32_bbsraminitialize(char *devpath, int *sizes)
+{
+  int i;
+  int fcnt;
+  char path[32];
+  char devname[32];
+
+  int ret = OK;
+
+  if (devpath == NULL)
+    {
+      return -EINVAL;
+    }
+
+  i = strlen(devpath);
+  if (i == 0 || i > sizeof(path) + 3)
+    {
+      return -EINVAL;
+    }
+
+  memset(g_bbsram, 0, sizeof(g_bbsram));
+
+  /* Clocking for the PWR block must be provided.  However, this is done
+   * unconditionally in stm32f7xxxx_rcc.c on power up.  This done
+   * unconditionally because the PWR block is also needed to set the
+   * internal voltage regulator for maximum performance.
+   */
+
+  /* Enable backup SRAM clock is done in rcc_enableahb1() when
+   * CONFIG_STM32_BKPSRAM is defined.
+   */
+
+  /* Allow Access */
+
+  stm32_bbsram_unlock();
+
+  /* Enable backup regulator so that the data is retained in Standby and
+   * VBAT modes
+   */
+
+  stm32_pwr_enablebreg(true);
+
+  fcnt = stm32_bbsram_probe(sizes, g_bbsram);
+
+  strncpy(path, devpath, sizeof(path));
+  strcat(path, "%d");
+
+  for (i = 0; i < fcnt && ret >= OK; i++)
+    {
+      snprintf(devname, sizeof(devname), path, i);
+      ret = register_driver(devname, &stm32_bbsram_fops, 0666, &g_bbsram[i]);
+    }
+
+  /* Disallow Access */
+
+  stm32_bbsram_lock();
+  return ret < OK ? ret : fcnt;
+}
+
+/****************************************************************************
+ * Function: stm32_bbsram_savepanic
+ *
+ * Description:
+ *   Saves the panic context in a previously allocated BBSRAM file
+ *
+ * Parameters:
+ *   fileno  - the value returned by the ioctl STM32_BBSRAM_GETDESC_IOCTL
+ *   context - Pointer to a any array of bytes to save
+ *   length  - The length of the data pointed to byt context
+ *
+ * Returned Value:
+ *   Length saved or negated errno.
+ *
+ * Assumptions:
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_STM32F7_SAVE_CRASHDUMP)
+int stm32_bbsram_savepanic(int fileno, uint8_t *context, int length)
+{
+  FAR struct bbsramfh_s *bbf;
+  int fill;
+  int ret = -ENOSPC;
+
+  /* On a bad day we could panic while panicking, (and we debug assert)
+   * this is a potential feeble attempt at only writing the first
+   * panic's context to the file
+   */
+
+  static bool once = false;
+
+  if (!once)
+    {
+      once = true;
+
+      DEBUGASSERT(fileno > 0 && fileno < CONFIG_STM32F7_BBSRAM_FILES);
+
+      bbf = g_bbsram[fileno].bbf;
+
+      DEBUGASSERT(bbf);
+
+      /* If the g_bbsram has been nulled out we return ENXIO.
+       *
+       * As once ensures we will keep the first dump. Checking the time for
+       * 0 protects from over writing a previous crash dump that has not
+       * been saved to long term storage and erased.  The dreaded reboot
+       * loop.
+       */
+
+      if (!bbf)
+        {
+          ret = -ENXIO;
+        }
+      else if ((bbf->lastwrite.tv_sec == 0 && bbf->lastwrite.tv_nsec == 0))
+        {
+          /* Clamp length if too big  */
+
+          if (length > bbf->len)
+            {
+              length = bbf->len;
+            }
+
+          stm32_bbsram_unlock();
+
+          stm32_bbsram_internal_write(bbf, (char *) context, 0, length);
+
+          /* Fill with 0 if data is less then file size */
+
+          fill = (int) bbf->len - length;
+
+          if (fill > 0)
+            {
+              memset(&bbf->data[length], 0, fill);
+            }
+
+          /* Seal the file */
+
+          stm32_bbsram_internal_close(bbf);
+
+          stm32_bbsram_lock();
+          ret = length;
+        }
+    }
+
+  return ret;
+}
+#endif
+
+#endif /* CONFIG_BBSRAM_DRIVER */
diff --git a/arch/arm/src/stm32f7/stm32_bbsram.h b/arch/arm/src/stm32f7/stm32_bbsram.h
new file mode 100644
index 0000000000000000000000000000000000000000..554a0c60df84bb78ec0d2ff569117b9033d9a62f
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_bbsram.h
@@ -0,0 +1,165 @@
+/****************************************************************************
+ * arch/arm/src/stm32f7/stm32_bbsram.h
+ *
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_STM32_BBSRAM_H
+#define __ARCH_ARM_SRC_STM32F7_STM32_BBSRAM_H
+
+/****************************************************************************
+ * The purpose of this driver is to add battery backup file to the file
+ * system. There can be CONFIG_STM32F7_BBRSRAM_COUNT files defined.
+ * These files are of fixed size up to the maximum of the backing 4K SRAM.
+ *
+ * If CONFIG_SAVE_CRASHDUMP is defined The driver also supports a feature
+ * to save the context of a PANIC in one of these files.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) || \
+    defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+#  define STM32F7_BBSRAM_SIZE 4096
+#else
+#  error "No backup SRAM on this STM32 Device"
+#endif
+
+#if !defined(CONFIG_STM32F7_BBSRAM_FILES)
+#  define CONFIG_STM32F7_BBSRAM_FILES 4
+#endif
+
+/* REVISIT: What guarantees that STM32F7_BBSRAM_GETDESC_IOCTL has a unique
+ * value among all over _DIOC() values?
+ */
+
+#define STM32F7_BBSRAM_GETDESC_IOCTL _DIOC(0x0010) /* Returns a bbsramd_s */
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+enum bbsramdf_e
+{
+  BBSRAM_CRC_VALID = 1,        /* The crc is valid */
+  BBSRAM_DIRTY     = 2,        /* The file was closed */
+};
+
+struct bbsramd_s
+{
+  uint8_t flags;               /* The crc is valid and the file was closed */
+  uint8_t fileno;              /* The minor number */
+  uint16_t len;                /* Total Bytes in this file*/
+  struct timespec lastwrite;   /* Last write time */
+};
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#  define EXTERN extern "C"
+extern "C"
+{
+#else
+#  define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+/****************************************************************************
+ * Function: stm32_bbsraminitialize
+ *
+ * Description:
+ *   Initialize the Battery Backed up SRAM driver.
+ *
+ * Parameters:
+ *   devpath - the path to instantiate the files.
+ *   sizes   - Pointer to a any array of file sizes to create
+ *             the last entry should be 0
+ *             A size of -1 will use all the remaining spaces
+ *
+ * If the length of sizes is greater then CONFIG_STM32F7_BBSRAM_FILES
+ * CONFIG_STM32F7_BBSRAM_FILES will be returned.
+ *
+ * Returned Value:
+ *   Number of files created on success; Negated errno on failure.
+ *
+ * Assumptions:
+ *
+ ****************************************************************************/
+
+int stm32_bbsraminitialize(char *devpath, int *sizes);
+
+/****************************************************************************
+* Function: stm32_bbsram_savepanic
+*
+* Description:
+*   Saves the panic context in a previously allocated BBSRAM file
+*
+* Parameters:
+*   fileno  - the value returned by the ioctl STM32F7_BBSRAM_GETDESC_IOCTL
+*   context - Pointer to a any array of bytes to save
+*   length  - The length of the data pointed to byt context
+*
+* Returned Value:
+*   Length saved or negated errno.
+*
+* Assumptions:
+*
+****************************************************************************/
+
+#if defined(CONFIG_STM32F7_SAVE_CRASHDUMP)
+int stm32_bbsram_savepanic(int fileno, uint8_t *context, int length);
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_STM32F7_STM32_BBSRAM_H */
diff --git a/arch/arm/src/stm32f7/stm32_dbgmcu.h b/arch/arm/src/stm32f7/stm32_dbgmcu.h
new file mode 100644
index 0000000000000000000000000000000000000000..0aef4d5f0a0284c023b58a8e6877f5e5db64921c
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_dbgmcu.h
@@ -0,0 +1,48 @@
+/****************************************************************************
+ * arch/arm/src/stm32f7/stm32_dbgmcu.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_STM32_DBGMCU_H
+#define __ARCH_ARM_SRC_STM32F7_STM32_DBGMCU_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include "chip/stm32_dbgmcu.h"
+
+#endif /* __ARCH_ARM_SRC_STM32F7_STM32_DBGMCU_H */
diff --git a/arch/arm/src/stm32f7/stm32_dma.c b/arch/arm/src/stm32f7/stm32_dma.c
index ff904c1d6b0100a3d980e00a5fd32ba70fc046bf..e1d8256f0919e142d41f8747e98ecef16b7bef25 100644
--- a/arch/arm/src/stm32f7/stm32_dma.c
+++ b/arch/arm/src/stm32f7/stm32_dma.c
@@ -59,7 +59,8 @@
  * families
  */
 
-#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
+#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) \
+  || defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -368,7 +369,7 @@ static void stm32_dmastreamdisable(struct stm32_dma_s *dmast)
  *
  ************************************************************************************/
 
-static int stm32_dmainterrupt(int irq, void *context)
+static int stm32_dmainterrupt(int irq, void *context, FAR void *arg)
 {
   struct stm32_dma_s *dmast;
   uint32_t status;
@@ -481,7 +482,7 @@ void weak_function up_dmainitialize(void)
 
       /* Attach DMA interrupt vectors */
 
-      (void)irq_attach(dmast->irq, stm32_dmainterrupt);
+      (void)irq_attach(dmast->irq, stm32_dmainterrupt, dmast);
 
       /* Disable the DMA stream */
 
@@ -520,9 +521,9 @@ void weak_function up_dmainitialize(void)
  *   version.  Feel free to do that if that is what you need.
  *
  * Input parameter:
- *   dmamap - Identifies the stream/channel resource. For the STM32 F4, this
+ *   dmamap - Identifies the stream/channel resource. For the STM32 F7, this
  *     is a bit-encoded  value as provided by the DMAMAP_* definitions
- *     in chip/stm32f40xxx_dma.h
+ *     in chip/stm32f7xxxxxxx_dma.h
  *
  * Returned Value:
  *   Provided that 'dmamap' is valid, this function ALWAYS returns a non-NULL,
@@ -605,10 +606,10 @@ void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
   uint32_t regoffset;
   uint32_t regval;
 
-  dmadbg("paddr: %08x maddr: %08x ntransfers: %d scr: %08x\n",
-         paddr, maddr, ntransfers, scr);
+  dmainfo("paddr: %08x maddr: %08x ntransfers: %d scr: %08x\n",
+          paddr, maddr, ntransfers, scr);
 
-#ifdef CONFIG_STM32_DMACAPABLE
+#ifdef CONFIG_STM32F7_DMACAPABLE
   DEBUGASSERT(stm32_dmacapable(maddr, ntransfers, scr));
 #endif
 
@@ -864,13 +865,13 @@ size_t stm32_dmaresidual(DMA_HANDLE handle)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_STM32_DMACAPABLE
+#ifdef CONFIG_STM32F7_DMACAPABLE
 bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
 {
   uint32_t transfer_size, burst_length;
   uint32_t mend;
 
-  dmavdbg("stm32_dmacapable: 0x%08x/%u 0x%08x\n", maddr, count, ccr);
+  dmainfo("stm32_dmacapable: 0x%08x/%u 0x%08x\n", maddr, count, ccr);
 
   /* Verify that the address conforms to the memory transfer size.
    * Transfers to/from memory performed by the DMA controller are
@@ -900,13 +901,13 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
         break;
 
       default:
-        dmavdbg("stm32_dmacapable: bad transfer size in CCR\n");
+        dmainfo("stm32_dmacapable: bad transfer size in CCR\n");
         return false;
     }
 
   if ((maddr & (transfer_size - 1)) != 0)
     {
-      dmavdbg("stm32_dmacapable: transfer unaligned\n");
+      dmainfo("stm32_dmacapable: transfer unaligned\n");
       return false;
     }
 
@@ -938,13 +939,13 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
             break;
 
           default:
-          dmavdbg("stm32_dmacapable: bad burst size in CCR\n");
+          dmainfo("stm32_dmacapable: bad burst size in CCR\n");
             return false;
         }
 
       if ((maddr & (burst_length - 1)) != 0)
         {
-          dmavdbg("stm32_dmacapable: burst crosses 1KiB\n");
+          dmainfo("stm32_dmacapable: burst crosses 1KiB\n");
           return false;
         }
     }
@@ -953,7 +954,7 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
 
   if ((maddr & STM32_REGION_MASK) != (mend & STM32_REGION_MASK))
     {
-      dmavdbg("stm32_dmacapable: transfer crosses memory region\n");
+      dmainfo("stm32_dmacapable: transfer crosses memory region\n");
       return false;
     }
 
@@ -964,29 +965,35 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
       case STM32_FSMC_BANK3:
       case STM32_FSMC_BANK4:
       case STM32_SRAM_BASE:
+
         /* All RAM is supported */
 
         break;
 
       case STM32_CODE_BASE:
-        /* Everything except the CCM ram is supported */
 
-        if (maddr >= STM32_CCMRAM_BASE &&
-            (maddr - STM32_CCMRAM_BASE) < 65536)
+        /* Everything except the ITCM ram is supported per the manual
+         *  The ITCM bus is not accessible on AHBS. So the DMA data transfer
+         *  to/from ITCM RAM is not supported.
+         */
+
+        if (maddr >= STM32_INSTRAM_BASE &&
+            (maddr - STM32_INSTRAM_BASE) < 0x3fff)
           {
-            dmavdbg("stm32_dmacapable: transfer targets CCMRAM\n");
+            dmainfo("stm32_dmacapable: transfer targets ITCM RAM\n");
             return false;
           }
         break;
 
       default:
+
         /* Everything else is unsupported by DMA */
 
-        dmavdbg("stm32_dmacapable: transfer targets unknown/unsupported region\n");
+        dmainfo("stm32_dmacapable: transfer targets unknown/unsupported region\n");
         return false;
     }
 
-    dmavdbg("stm32_dmacapable: transfer OK\n");
+  dmainfo("stm32_dmacapable: transfer OK\n");
   return true;
 }
 #endif
@@ -1032,22 +1039,22 @@ void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void stm32_dmadump(DMA_HANDLE handle, const struct stm32_dmaregs_s *regs,
                    const char *msg)
 {
   struct stm32_dma_s *dmast = (struct stm32_dma_s *)handle;
   uint32_t dmabase = DMA_BASE(dmast->base);
 
-  dmadbg("DMA Registers: %s\n", msg);
-  dmadbg("   LISR[%08x]: %08x\n", dmabase + STM32_DMA_LISR_OFFSET, regs->lisr);
-  dmadbg("   HISR[%08x]: %08x\n", dmabase + STM32_DMA_HISR_OFFSET, regs->hisr);
-  dmadbg("    SCR[%08x]: %08x\n", dmast->base + STM32_DMA_SCR_OFFSET, regs->scr);
-  dmadbg("  SNDTR[%08x]: %08x\n", dmast->base + STM32_DMA_SNDTR_OFFSET, regs->sndtr);
-  dmadbg("   SPAR[%08x]: %08x\n", dmast->base + STM32_DMA_SPAR_OFFSET, regs->spar);
-  dmadbg("  SM0AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM0AR_OFFSET, regs->sm0ar);
-  dmadbg("  SM1AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM1AR_OFFSET, regs->sm1ar);
-  dmadbg("   SFCR[%08x]: %08x\n", dmast->base + STM32_DMA_SFCR_OFFSET, regs->sfcr);
+  dmainfo("DMA Registers: %s\n", msg);
+  dmainfo("   LISR[%08x]: %08x\n", dmabase + STM32_DMA_LISR_OFFSET, regs->lisr);
+  dmainfo("   HISR[%08x]: %08x\n", dmabase + STM32_DMA_HISR_OFFSET, regs->hisr);
+  dmainfo("    SCR[%08x]: %08x\n", dmast->base + STM32_DMA_SCR_OFFSET, regs->scr);
+  dmainfo("  SNDTR[%08x]: %08x\n", dmast->base + STM32_DMA_SNDTR_OFFSET, regs->sndtr);
+  dmainfo("   SPAR[%08x]: %08x\n", dmast->base + STM32_DMA_SPAR_OFFSET, regs->spar);
+  dmainfo("  SM0AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM0AR_OFFSET, regs->sm0ar);
+  dmainfo("  SM1AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM1AR_OFFSET, regs->sm1ar);
+  dmainfo("   SFCR[%08x]: %08x\n", dmast->base + STM32_DMA_SFCR_OFFSET, regs->sfcr);
 }
 #endif
 
diff --git a/arch/arm/src/stm32f7/stm32_dma.h b/arch/arm/src/stm32f7/stm32_dma.h
index 67c9cbf4c83c46f14557aba5153942b5859b6627..b25cb84e7dd34aa481065f2790207e06dddca692 100644
--- a/arch/arm/src/stm32f7/stm32_dma.h
+++ b/arch/arm/src/stm32f7/stm32_dma.h
@@ -62,8 +62,8 @@
  * Public Types
  ************************************************************************************/
 
-/* DMA_HANDLE provides an opaque are reference that can be used to represent a DMA
- * channel (F1) or a DMA stream (F4).
+/* DMA_HANDLE Provides an opaque are reference that can be used to represent a DMA
+ * a DMA stream.
  */
 
 typedef FAR void *DMA_HANDLE;
@@ -137,10 +137,8 @@ extern "C"
  *
  * Input parameter:
  *   chan - Identifies the stream/channel resource
- *     For the STM32 F1, this is simply the channel number as provided by
- *     the DMACHAN_* definitions in chip/stm32f10xxx_dma.h.
- *     For the STM32 F4, this is a bit encoded value as provided by the
- *     the DMAMAP_* definitions in chip/stm32f40xxx_dma.h
+ *     For the STM32 F7, this is a bit encoded value as provided by the
+ *     the DMAMAP_* definitions  in chip/stm32f7xxxxxxx_dma.h
  *
  * Returned Value:
  *   Provided that 'chan' is valid, this function ALWAYS returns a non-NULL,
@@ -248,7 +246,7 @@ size_t stm32_dmaresidual(DMA_HANDLE handle);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_STM32_DMACAPABLE
+#ifdef CONFIG_STM32F7_DMACAPABLE
 bool stm32_dmacapable(uintptr_t maddr, uint32_t count, uint32_t ccr);
 #else
 #  define stm32_dmacapable(maddr, count, ccr) (true)
@@ -265,7 +263,7 @@ bool stm32_dmacapable(uintptr_t maddr, uint32_t count, uint32_t ccr);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs);
 #else
 #  define stm32_dmasample(handle,regs)
@@ -282,7 +280,7 @@ void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void stm32_dmadump(DMA_HANDLE handle, const struct stm32_dmaregs_s *regs,
                    const char *msg);
 #else
diff --git a/arch/arm/src/stm32f7/stm32_dtcm.h b/arch/arm/src/stm32f7/stm32_dtcm.h
index a3e76330e917e10d0c68bf8aacdefc7ee1c0293d..0b52bcf96c2fd64fee52861915b5ac3e2e29f09c 100644
--- a/arch/arm/src/stm32f7/stm32_dtcm.h
+++ b/arch/arm/src/stm32f7/stm32_dtcm.h
@@ -1,8 +1,9 @@
 /****************************************************************************
  * arch/arm/src/stm32f7/stm32_dtcm.h
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
+ *           David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -52,14 +53,14 @@
 
 #define HAVE_DTCM_HEAP 1
 
-/* Only the STM32 F2, F3, and F4 have DTCM memory */
+/* The STM32 F7 have DTCM memory */
 
-#if defined(CONFIG_STM32_STM32F30XX)
-#  define DTCM_START 0x10000000
-#  define DTCM_END   0x10002000
-#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
-#  define DTCM_START 0x10000000
-#  define DTCM_END   0x10010000
+#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
+#  define DTCM_START 0x20000000
+#  define DTCM_END   0x20010000
+#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+#  define DTCM_START 0x20000000
+#  define DTCM_END   0x20020000
 #else
 #  undef HAVE_DTCM_HEAP
 #endif
@@ -68,7 +69,7 @@
  * heap.
  */
 
-#ifndef CONFIG_STM32_DTCMEXCLUDE
+#ifndef CONFIG_STM32F7_DTCMEXCLUDE
 #  undef HAVE_DTCM_HEAP
 #endif
 
diff --git a/arch/arm/src/stm32f7/stm32_dumpgpio.c b/arch/arm/src/stm32f7/stm32_dumpgpio.c
index e1772e89cd10fb809224b416cb9ebb7539fef43c..79210b4e8e8094a88e5cb6c9d8ca5114648aa473 100644
--- a/arch/arm/src/stm32f7/stm32_dumpgpio.c
+++ b/arch/arm/src/stm32f7/stm32_dumpgpio.c
@@ -51,20 +51,20 @@
 #include "stm32_gpio.h"
 #include "stm32_rcc.h"
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_GPIO_INFO
 
 /* Content of this file requires verification before it is used with other
  * families
  */
 
-#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
+#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) \
+  || defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
 
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 /* Port letters for prettier debug output */
 
-#ifdef CONFIG_DEBUG
 static const char g_portchar[STM32F7_NGPIO] =
 {
 #if STM32F7_NGPIO > 11
@@ -95,7 +95,6 @@ static const char g_portchar[STM32F7_NGPIO] =
 #  error "Bad number of GPIOs"
 #endif
 };
-#endif
 
 /****************************************************************************
  * Public Functions
@@ -126,28 +125,28 @@ int stm32_dumpgpio(uint32_t pinset, const char *msg)
 
   DEBUGASSERT(port < STM32F7_NGPIO);
 
-  lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
+  gpioinfo("GPIO%c pinset: %08x base: %08x -- %s\n",
         g_portchar[port], pinset, base, msg);
 
   if ((getreg32(STM32_RCC_AHB1ENR) & RCC_AHB1ENR_GPIOEN(port)) != 0)
     {
-      lldbg(" MODE: %08x OTYPE: %04x     OSPEED: %08x PUPDR: %08x\n",
-            getreg32(base + STM32_GPIO_MODER_OFFSET),
-            getreg32(base + STM32_GPIO_OTYPER_OFFSET),
-            getreg32(base + STM32_GPIO_OSPEED_OFFSET),
-            getreg32(base + STM32_GPIO_PUPDR_OFFSET));
-      lldbg("  IDR: %04x       ODR: %04x       LCKR: %05x\n",
-            getreg32(base + STM32_GPIO_IDR_OFFSET),
-            getreg32(base + STM32_GPIO_ODR_OFFSET),
-            getreg32(base + STM32_GPIO_LCKR_OFFSET));
-      lldbg(" AFRH: %08x  AFRL: %08x\n",
-            getreg32(base + STM32_GPIO_AFRH_OFFSET),
-            getreg32(base + STM32_GPIO_AFRL_OFFSET));
+      gpioinfo(" MODE: %08x OTYPE: %04x     OSPEED: %08x PUPDR: %08x\n",
+               getreg32(base + STM32_GPIO_MODER_OFFSET),
+               getreg32(base + STM32_GPIO_OTYPER_OFFSET),
+               getreg32(base + STM32_GPIO_OSPEED_OFFSET),
+               getreg32(base + STM32_GPIO_PUPDR_OFFSET));
+      gpioinfo("  IDR: %04x       ODR: %04x       LCKR: %05x\n",
+               getreg32(base + STM32_GPIO_IDR_OFFSET),
+               getreg32(base + STM32_GPIO_ODR_OFFSET),
+               getreg32(base + STM32_GPIO_LCKR_OFFSET));
+      gpioinfo(" AFRH: %08x  AFRL: %08x\n",
+               getreg32(base + STM32_GPIO_AFRH_OFFSET),
+               getreg32(base + STM32_GPIO_AFRL_OFFSET));
     }
   else
     {
-      lldbg("  GPIO%c not enabled: AHB1ENR: %08x\n",
-            g_portchar[port], getreg32(STM32_RCC_AHB1ENR));
+      gpioinfo("  GPIO%c not enabled: AHB1ENR: %08x\n",
+               g_portchar[port], getreg32(STM32_RCC_AHB1ENR));
     }
 
   leave_critical_section(flags);
@@ -155,4 +154,4 @@ int stm32_dumpgpio(uint32_t pinset, const char *msg)
 }
 
 #endif /* CONFIG_STM32F7_STM32F74XX || CONFIG_STM32F7_STM32F75XX */
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_GPIO_INFO */
diff --git a/arch/arm/src/stm32f7/stm32_ethernet.c b/arch/arm/src/stm32f7/stm32_ethernet.c
index 4e6664ade1b2d401cbf3cc4ad43d43d4c3d25f23..480c395c79e938b429a933d2253e3c56b7bf05b1 100644
--- a/arch/arm/src/stm32f7/stm32_ethernet.c
+++ b/arch/arm/src/stm32f7/stm32_ethernet.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32f7/stm32_ethernet.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -52,14 +52,11 @@
 #include 
 #include 
 #include 
-
-#ifdef CONFIG_NET_NOINTS
-#  include 
-#endif
-
+#include 
 #include 
 #include 
 #include 
+
 #if defined(CONFIG_NET_PKT)
 #  include 
 #endif
@@ -94,12 +91,23 @@
 #  error "Logic to support multiple Ethernet interfaces is incomplete"
 #endif
 
-/* If processing is not done at the interrupt level, then high priority
- * work queue support is required.
+/* If processing is not done at the interrupt level, then work queue support
+ * is required.
  */
 
-#if defined(CONFIG_NET_NOINTS) && !defined(CONFIG_SCHED_HPWORK)
-#  error High priority work queue support is required
+#if !defined(CONFIG_SCHED_WORKQUEUE)
+#  error Work queue support is required
+#else
+
+  /* Select work queue */
+
+#  if defined(CONFIG_STM32F7_ETHMAC_HPWORK)
+#    define ETHWORK HPWORK
+#  elif defined(CONFIG_STM32F7_ETHMAC_LPWORK)
+#    define ETHWORK LPWORK
+#  else
+#    error Neither CONFIG_STM32F7_ETHMAC_HPWORK nor CONFIG_STM32F7_ETHMAC_LPWORK defined
+#  endif
 #endif
 
 #ifndef CONFIG_STM32F7_PHYADDR
@@ -182,12 +190,6 @@
 #undef CONFIG_STM32F7_ETH_ENHANCEDDESC
 #undef CONFIG_STM32F7_ETH_HWCHECKSUM
 
-/* Ethernet buffer sizes, number of buffers, and number of descriptors */
-
-#ifndef CONFIG_NET_MULTIBUFFER
-#  error "CONFIG_NET_MULTIBUFFER is required"
-#endif
-
 /* Add 4 to the configured buffer size to account for the 2 byte checksum
  * memory needed at the end of the maximum size packet.  Buffer sizes must
  * be an even multiple of 4, 8, or 16 bytes (depending on buswidth).  We
@@ -263,7 +265,7 @@
  * enabled.
  */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_NET_INFO
 #  undef CONFIG_STM32F7_ETHMAC_REGDEBUG
 #endif
 
@@ -605,9 +607,8 @@ struct stm32_ethmac_s
   uint8_t              intf;        /* Ethernet interface number */
   WDOG_ID              txpoll;      /* TX poll timer */
   WDOG_ID              txtimeout;   /* TX timeout timer */
-#ifdef CONFIG_NET_NOINTS
-  struct work_s        work;        /* For deferring work to the work queue */
-#endif
+  struct work_s        irqwork;     /* For deferring interrupt work to the work queue */
+  struct work_s        pollwork;    /* For deferring poll work to the work queue */
 
   /* This holds the information visible to the NuttX network */
 
@@ -664,7 +665,7 @@ static struct stm32_ethmac_s g_stm32ethmac[STM32F7_NETHERNET];
  ****************************************************************************/
 /* Register operations ******************************************************/
 
-#if defined(CONFIG_STM32F7_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32F7_ETHMAC_REGDEBUG
 static uint32_t stm32_getreg(uint32_t addr);
 static void stm32_putreg(uint32_t val, uint32_t addr);
 static void stm32_checksetup(void);
@@ -699,35 +700,26 @@ static int  stm32_recvframe(struct stm32_ethmac_s *priv);
 static void stm32_receive(struct stm32_ethmac_s *priv);
 static void stm32_freeframe(struct stm32_ethmac_s *priv);
 static void stm32_txdone(struct stm32_ethmac_s *priv);
-#ifdef CONFIG_NET_NOINTS
+
 static void stm32_interrupt_work(void *arg);
-#endif
-static int  stm32_interrupt(int irq, void *context);
+static int  stm32_interrupt(int irq, void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
-static inline void stm32_txtimeout_process(struct stm32_ethmac_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void stm32_txtimeout_work(void *arg);
-#endif
 static void stm32_txtimeout_expiry(int argc, uint32_t arg, ...);
 
-static inline void stm32_poll_process(struct stm32_ethmac_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void stm32_poll_work(void *arg);
-#endif
 static void stm32_poll_expiry(int argc, uint32_t arg, ...);
 
 /* NuttX callback functions */
 
 static int  stm32_ifup(struct net_driver_s *dev);
 static int  stm32_ifdown(struct net_driver_s *dev);
-static int  stm32_ifdown(struct net_driver_s *dev);
-static inline void stm32_txavail_process(struct stm32_ethmac_s *priv);
-#ifdef CONFIG_NET_NOINTS
+
 static void stm32_txavail_work(void *arg);
-#endif
 static int  stm32_txavail(struct net_driver_s *dev);
+
 #if defined(CONFIG_NET_IGMP) || defined(CONFIG_NET_ICMPv6)
 static int  stm32_addmac(struct net_driver_s *dev, const uint8_t *mac);
 #endif
@@ -795,7 +787,7 @@ static int  stm32_ethconfig(struct stm32_ethmac_s *priv);
  *
  ****************************************************************************/
 
-#if defined(CONFIG_STM32F7_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32F7_ETHMAC_REGDEBUG
 static uint32_t stm32_getreg(uint32_t addr)
 {
   static uint32_t prevaddr = 0;
@@ -816,7 +808,7 @@ static uint32_t stm32_getreg(uint32_t addr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              ninfo("...\n");
             }
 
           return val;
@@ -833,7 +825,7 @@ static uint32_t stm32_getreg(uint32_t addr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          ninfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -845,7 +837,7 @@ static uint32_t stm32_getreg(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%08x\n", addr, val);
+  ninfo("%08x->%08x\n", addr, val);
   return val;
 }
 #endif
@@ -867,12 +859,12 @@ static uint32_t stm32_getreg(uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_STM32F7_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32F7_ETHMAC_REGDEBUG
 static void stm32_putreg(uint32_t val, uint32_t addr)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", addr, val);
+  ninfo("%08x<-%08x\n", addr, val);
 
   /* Write the value */
 
@@ -894,7 +886,7 @@ static void stm32_putreg(uint32_t val, uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_STM32F7_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_STM32F7_ETHMAC_REGDEBUG
 static void stm32_checksetup(void)
 {
 }
@@ -1060,8 +1052,8 @@ static int stm32_transmit(struct stm32_ethmac_s *priv)
   txdesc  = priv->txhead;
   txfirst = txdesc;
 
-  nllvdbg("d_len: %d d_buf: %p txhead: %p tdes0: %08x\n",
-          priv->dev.d_len, priv->dev.d_buf, txdesc, txdesc->tdes0);
+  ninfo("d_len: %d d_buf: %p txhead: %p tdes0: %08x\n",
+        priv->dev.d_len, priv->dev.d_buf, txdesc, txdesc->tdes0);
 
   DEBUGASSERT(txdesc && (txdesc->tdes0 & ETH_TDES0_OWN) == 0);
 
@@ -1082,7 +1074,7 @@ static int stm32_transmit(struct stm32_ethmac_s *priv)
       bufcount = (priv->dev.d_len + (ALIGNED_BUFSIZE-1)) / ALIGNED_BUFSIZE;
       lastsize = priv->dev.d_len - (bufcount - 1) * ALIGNED_BUFSIZE;
 
-      nllvdbg("bufcount: %d lastsize: %d\n", bufcount, lastsize);
+      ninfo("bufcount: %d lastsize: %d\n", bufcount, lastsize);
 
       /* Set the first segment bit in the first TX descriptor */
 
@@ -1209,8 +1201,8 @@ static int stm32_transmit(struct stm32_ethmac_s *priv)
 
   priv->inflight++;
 
-  nllvdbg("txhead: %p txtail: %p inflight: %d\n",
-          priv->txhead, priv->txtail, priv->inflight);
+  ninfo("txhead: %p txtail: %p inflight: %d\n",
+        priv->txhead, priv->txtail, priv->inflight);
 
   /* If all TX descriptors are in-flight, then we have to disable receive interrupts
    * too.  This is because receive events can trigger more un-stoppable transmit
@@ -1508,7 +1500,7 @@ static void stm32_freesegment(struct stm32_ethmac_s *priv,
   struct eth_rxdesc_s *rxdesc;
   int i;
 
-  nllvdbg("rxfirst: %p segments: %d\n", rxfirst, segments);
+  ninfo("rxfirst: %p segments: %d\n", rxfirst, segments);
 
   /* Give the freed RX buffers back to the Ethernet MAC to be refilled */
 
@@ -1580,8 +1572,8 @@ static int stm32_recvframe(struct stm32_ethmac_s *priv)
   uint8_t *buffer;
   int i;
 
-  nllvdbg("rxhead: %p rxcurr: %p segments: %d\n",
-          priv->rxhead, priv->rxcurr, priv->segments);
+  ninfo("rxhead: %p rxcurr: %p segments: %d\n",
+        priv->rxhead, priv->rxcurr, priv->segments);
 
   /* Check if there are free buffers.  We cannot receive new frames in this
    * design unless there is at least one free buffer.
@@ -1589,7 +1581,7 @@ static int stm32_recvframe(struct stm32_ethmac_s *priv)
 
   if (!stm32_isfreebuffer(priv))
     {
-      nlldbg("No free buffers\n");
+      nerr("ERROR: No free buffers\n");
       return -ENOMEM;
     }
 
@@ -1652,7 +1644,7 @@ static int stm32_recvframe(struct stm32_ethmac_s *priv)
               rxcurr = priv->rxcurr;
             }
 
-          nllvdbg("rxhead: %p rxcurr: %p segments: %d\n",
+          ninfo("rxhead: %p rxcurr: %p segments: %d\n",
               priv->rxhead, priv->rxcurr, priv->segments);
 
           /* Check if any errors are reported in the frame */
@@ -1705,8 +1697,8 @@ static int stm32_recvframe(struct stm32_ethmac_s *priv)
               arch_invalidate_dcache((uintptr_t)dev->d_buf,
                                      (uintptr_t)dev->d_buf + dev->d_len);
 
-              nllvdbg("rxhead: %p d_buf: %p d_len: %d\n",
-                      priv->rxhead, dev->d_buf, dev->d_len);
+              ninfo("rxhead: %p d_buf: %p d_len: %d\n",
+                    priv->rxhead, dev->d_buf, dev->d_len);
 
               /* Return success */
 
@@ -1718,7 +1710,7 @@ static int stm32_recvframe(struct stm32_ethmac_s *priv)
                * scanning logic, and continue scanning with the next frame.
                */
 
-              nlldbg("DROPPED: RX descriptor errors: %08x\n", rxdesc->rdes0);
+              nwarn("WARNING: DROPPED RX descriptor errors: %08x\n", rxdesc->rdes0);
               stm32_freesegment(priv, rxcurr, priv->segments);
             }
         }
@@ -1739,8 +1731,8 @@ static int stm32_recvframe(struct stm32_ethmac_s *priv)
 
   priv->rxhead = rxdesc;
 
-  nllvdbg("rxhead: %p rxcurr: %p segments: %d\n",
-          priv->rxhead, priv->rxcurr, priv->segments);
+  ninfo("rxhead: %p rxcurr: %p segments: %d\n",
+        priv->rxhead, priv->rxcurr, priv->segments);
 
   return -EAGAIN;
 }
@@ -1784,22 +1776,16 @@ static void stm32_receive(struct stm32_ethmac_s *priv)
 
       if (dev->d_len > CONFIG_NET_ETH_MTU)
         {
-          nlldbg("DROPPED: Too big: %d\n", dev->d_len);
+          nwarn("WARNING: DROPPED Too big: %d\n", dev->d_len);
           continue;
         }
 
-#ifdef CONFIG_NET_PKT
-      /* When packet sockets are enabled, feed the frame into the packet tap */
-
-       pkt_input(&priv->dev);
-#endif
-
       /* We only accept IP packets of the configured type and ARP packets */
 
 #ifdef CONFIG_NET_IPv4
       if (BUF->type == HTONS(ETHTYPE_IP))
         {
-          nllvdbg("IPv4 frame\n");
+          ninfo("IPv4 frame\n");
 
           /* Handle ARP on input then give the IPv4 packet to the network
            * layer
@@ -1839,7 +1825,7 @@ static void stm32_receive(struct stm32_ethmac_s *priv)
 #ifdef CONFIG_NET_IPv6
       if (BUF->type == HTONS(ETHTYPE_IP6))
         {
-          nllvdbg("Iv6 frame\n");
+          ninfo("Iv6 frame\n");
 
           /* Give the IPv6 packet to the network layer */
 
@@ -1876,7 +1862,7 @@ static void stm32_receive(struct stm32_ethmac_s *priv)
 #ifdef CONFIG_NET_ARP
       if (BUF->type == htons(ETHTYPE_ARP))
         {
-          nllvdbg("ARP frame\n");
+          ninfo("ARP frame\n");
 
           /* Handle ARP packet */
 
@@ -1894,7 +1880,7 @@ static void stm32_receive(struct stm32_ethmac_s *priv)
       else
 #endif
         {
-          nlldbg("DROPPED: Unknown type: %04x\n", BUF->type);
+          nwarn("WARNING: DROPPED Unknown type: %04x\n", BUF->type);
         }
 
       /* We are finished with the RX buffer.  NOTE:  If the buffer is
@@ -1935,8 +1921,8 @@ static void stm32_freeframe(struct stm32_ethmac_s *priv)
   struct eth_txdesc_s *txdesc;
   int i;
 
-  nllvdbg("txhead: %p txtail: %p inflight: %d\n",
-          priv->txhead, priv->txtail, priv->inflight);
+  ninfo("txhead: %p txtail: %p inflight: %d\n",
+        priv->txhead, priv->txtail, priv->inflight);
 
   /* Scan for "in-flight" descriptors owned by the CPU */
 
@@ -1956,8 +1942,8 @@ static void stm32_freeframe(struct stm32_ethmac_s *priv)
            * TX descriptors.
            */
 
-          nllvdbg("txtail: %p tdes0: %08x tdes2: %08x tdes3: %08x\n",
-                  txdesc, txdesc->tdes0, txdesc->tdes2, txdesc->tdes3);
+          ninfo("txtail: %p tdes0: %08x tdes2: %08x tdes3: %08x\n",
+                txdesc, txdesc->tdes0, txdesc->tdes2, txdesc->tdes3);
 
           DEBUGASSERT(txdesc->tdes2 != 0);
 
@@ -2021,8 +2007,8 @@ static void stm32_freeframe(struct stm32_ethmac_s *priv)
 
       priv->txtail = txdesc;
 
-      nllvdbg("txhead: %p txtail: %p inflight: %d\n",
-              priv->txhead, priv->txtail, priv->inflight);
+      ninfo("txhead: %p txtail: %p inflight: %d\n",
+            priv->txhead, priv->txtail, priv->inflight);
     }
 }
 
@@ -2059,14 +2045,6 @@ static void stm32_txdone(struct stm32_ethmac_s *priv)
 
       wd_cancel(priv->txtimeout);
 
-      /* Then make sure that the TX poll timer is running (if it is already
-       * running, the following would restart it).  This is necessary to
-       * avoid certain race conditions where the polling sequence can be
-       * interrupted.
-       */
-
-      (void)wd_start(priv->txpoll, STM32_WDDELAY, stm32_poll_expiry, 1, priv);
-
       /* And disable further TX interrupts. */
 
       stm32_disableint(priv, ETH_DMAINT_TI);
@@ -2078,27 +2056,33 @@ static void stm32_txdone(struct stm32_ethmac_s *priv)
 }
 
 /****************************************************************************
- * Function: stm32_interrupt_process
+ * Function: stm32_interrupt_work
  *
  * Description:
- *   Interrupt processing.  This may be performed either within the interrupt
- *   handler or on the worker thread, depending upon the configuration
+ *   Perform interrupt related work from the worker thread
  *
  * Parameters:
- *   priv  - Reference to the driver state structure
+ *   arg - The argument passed when work_queue() was called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
  *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static inline void stm32_interrupt_process(struct stm32_ethmac_s *priv)
+static void stm32_interrupt_work(void *arg)
 {
+  struct stm32_ethmac_s *priv = (struct stm32_ethmac_s *)arg;
   uint32_t dmasr;
 
+  DEBUGASSERT(priv);
+
+  /* Process pending Ethernet interrupts */
+
+  net_lock();
+
   /* Get the DMA interrupt status bits (no MAC interrupts are expected) */
 
   dmasr = stm32_getreg(STM32_ETH_DMASR);
@@ -2158,7 +2142,7 @@ static inline void stm32_interrupt_process(struct stm32_ethmac_s *priv)
     {
       /* Just let the user know what happened */
 
-      nlldbg("Abormal event(s): %08x\n", dmasr);
+      nerr("ERROR: Abormal event(s): %08x\n", dmasr);
 
       /* Clear all pending abnormal events */
 
@@ -2169,44 +2153,13 @@ static inline void stm32_interrupt_process(struct stm32_ethmac_s *priv)
       stm32_putreg(ETH_DMAINT_AIS, STM32_ETH_DMASR);
     }
 #endif
-}
-
-/****************************************************************************
- * Function: stm32_interrupt_work
- *
- * Description:
- *   Perform interrupt related work from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() was called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
 
-#ifdef CONFIG_NET_NOINTS
-static void stm32_interrupt_work(void *arg)
-{
-  struct stm32_ethmac_s *priv = (struct stm32_ethmac_s *)arg;
-  net_lock_t state;
-
-  DEBUGASSERT(priv);
-
-  /* Process pending Ethernet interrupts */
-
-  state = net_lock();
-  stm32_interrupt_process(priv);
-  net_unlock(state);
+  net_unlock();
 
   /* Re-enable Ethernet interrupts at the NVIC */
 
   up_enable_irq(STM32_IRQ_ETH);
 }
-#endif
 
 /****************************************************************************
  * Function: stm32_interrupt
@@ -2225,11 +2178,9 @@ static void stm32_interrupt_work(void *arg)
  *
  ****************************************************************************/
 
-static int stm32_interrupt(int irq, void *context)
+static int stm32_interrupt(int irq, void *context, FAR void *arg)
 {
   struct stm32_ethmac_s *priv = &g_stm32ethmac[0];
-
-#ifdef CONFIG_NET_NOINTS
   uint32_t dmasr;
 
   /* Get the DMA interrupt status bits (no MAC interrupts are expected) */
@@ -2256,58 +2207,14 @@ static int stm32_interrupt(int irq, void *context)
            wd_cancel(priv->txtimeout);
         }
 
-      /* Cancel any pending poll work */
-
-      work_cancel(HPWORK, &priv->work);
-
       /* Schedule to perform the interrupt processing on the worker thread. */
 
-      work_queue(HPWORK, &priv->work, stm32_interrupt_work, priv, 0);
+      work_queue(ETHWORK, &priv->irqwork, stm32_interrupt_work, priv, 0);
     }
 
-#else
-  /* Process the interrupt now */
-
-  stm32_interrupt_process(priv);
-#endif
-
   return OK;
 }
 
-/****************************************************************************
- * Function: stm32_txtimeout_process
- *
- * Description:
- *   Process a TX timeout.  Called from the either the watchdog timer
- *   expiration logic or from the worker thread, depending upon the
- *   configuration.  The timeout means that the last TX never completed.
- *   Reset the hardware and start again.
- *
- * Parameters:
- *   priv  - Reference to the driver state structure
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Global interrupts are disabled by the watchdog logic.
- *
- ****************************************************************************/
-
-static inline void stm32_txtimeout_process(struct stm32_ethmac_s *priv)
-{
-  /* Then reset the hardware.  Just take the interface down, then back
-   * up again.
-   */
-
-  stm32_ifdown(&priv->dev);
-  stm32_ifup(&priv->dev);
-
-  /* Then poll for new XMIT data */
-
-  stm32_dopoll(priv);
-}
-
 /****************************************************************************
  * Function: stm32_txtimeout_work
  *
@@ -2325,19 +2232,21 @@ static inline void stm32_txtimeout_process(struct stm32_ethmac_s *priv)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_NET_NOINTS
 static void stm32_txtimeout_work(void *arg)
 {
   struct stm32_ethmac_s *priv = (struct stm32_ethmac_s *)arg;
-  net_lock_t state;
 
-  /* Process pending Ethernet interrupts */
+  /* Reset the hardware.  Just take the interface down, then back up again. */
+
+  net_lock();
+  stm32_ifdown(&priv->dev);
+  stm32_ifup(&priv->dev);
 
-  state = net_lock();
-  stm32_txtimeout_process(priv);
-  net_unlock(state);
+  /* Then poll for new XMIT data */
+
+  stm32_dopoll(priv);
+  net_unlock();
 }
-#endif
 
 /****************************************************************************
  * Function: stm32_txtimeout_expiry
@@ -2362,9 +2271,8 @@ static void stm32_txtimeout_expiry(int argc, uint32_t arg, ...)
 {
   struct stm32_ethmac_s *priv = (struct stm32_ethmac_s *)arg;
 
-  nlldbg("Timeout!\n");
+  nerr("ERROR: Timeout!\n");
 
-#ifdef CONFIG_NET_NOINTS
   /* Disable further Ethernet interrupts.  This will prevent some race
    * conditions with interrupt work.  There is still a potential race
    * condition with interrupt work that is already queued and in progress.
@@ -2374,42 +2282,31 @@ static void stm32_txtimeout_expiry(int argc, uint32_t arg, ...)
 
   up_disable_irq(STM32_IRQ_ETH);
 
-  /* Cancel any pending poll or interrupt work.  This will have no effect
-   * on work that has already been started.
-   */
-
-  work_cancel(HPWORK, &priv->work);
-
   /* Schedule to perform the TX timeout processing on the worker thread. */
 
-  work_queue(HPWORK, &priv->work, stm32_txtimeout_work, priv, 0);
-
-#else
-  /* Process the timeout now */
-
-  stm32_txtimeout_process(priv);
-#endif
+  work_queue(ETHWORK, &priv->irqwork, stm32_txtimeout_work, priv, 0);
 }
 
 /****************************************************************************
- * Function: stm32_poll_process
+ * Function: stm32_poll_work
  *
  * Description:
- *   Perform the periodic poll.  This may be called either from watchdog
- *   timer logic or from the worker thread, depending upon the configuration.
+ *   Perform periodic polling from the worker thread
  *
  * Parameters:
- *   priv  - Reference to the driver state structure
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
+ *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static inline void stm32_poll_process(struct stm32_ethmac_s *priv)
+static void stm32_poll_work(void *arg)
 {
+  struct stm32_ethmac_s *priv = (struct stm32_ethmac_s *)arg;
   struct net_driver_s *dev  = &priv->dev;
 
   /* Check if the next TX descriptor is owned by the Ethernet DMA or CPU.  We
@@ -2423,6 +2320,7 @@ static inline void stm32_poll_process(struct stm32_ethmac_s *priv)
    * CONFIG_STM32F7_ETH_NTXDESC).
    */
 
+  net_lock();
   if ((priv->txhead->tdes0 & ETH_TDES0_OWN) == 0 &&
        priv->txhead->tdes2 == 0)
     {
@@ -2458,39 +2356,9 @@ static inline void stm32_poll_process(struct stm32_ethmac_s *priv)
   /* Setup the watchdog poll timer again */
 
   (void)wd_start(priv->txpoll, STM32_WDDELAY, stm32_poll_expiry, 1, priv);
+  net_unlock();
 }
 
-/****************************************************************************
- * Function: stm32_poll_work
- *
- * Description:
- *   Perform periodic polling from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() as called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void stm32_poll_work(void *arg)
-{
-  struct stm32_ethmac_s *priv = (struct stm32_ethmac_s *)arg;
-  net_lock_t state;
-
-  /* Perform the poll */
-
-  state = net_lock();
-  stm32_poll_process(priv);
-  net_unlock(state);
-}
-#endif
-
 /****************************************************************************
  * Function: stm32_poll_expiry
  *
@@ -2513,31 +2381,9 @@ static void stm32_poll_expiry(int argc, uint32_t arg, ...)
 {
   struct stm32_ethmac_s *priv = (struct stm32_ethmac_s *)arg;
 
-#ifdef CONFIG_NET_NOINTS
-  /* Is our single work structure available?  It may not be if there are
-   * pending interrupt actions.
-   */
-
-  if (work_available(&priv->work))
-    {
-      /* Schedule to perform the interrupt processing on the worker thread. */
-
-      work_queue(HPWORK, &priv->work, stm32_poll_work, priv, 0);
-    }
-  else
-    {
-      /* No.. Just re-start the watchdog poll timer, missing one polling
-       * cycle.
-       */
-
-      (void)wd_start(priv->txpoll, STM32_WDDELAY, stm32_poll_expiry, 1, (uint32_t)priv);
-    }
+  /* Schedule to perform the interrupt processing on the worker thread. */
 
-#else
-  /* Process the interrupt now */
-
-  stm32_poll_process(priv);
-#endif
+  work_queue(ETHWORK, &priv->pollwork, stm32_poll_work, priv, 0);
 }
 
 /****************************************************************************
@@ -2563,12 +2409,12 @@ static int stm32_ifup(struct net_driver_s *dev)
   int ret;
 
 #ifdef CONFIG_NET_IPv4
-  nvdbg("Bringing up: %d.%d.%d.%d\n",
+  ninfo("Bringing up: %d.%d.%d.%d\n",
         dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
         (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 #endif
 #ifdef CONFIG_NET_IPv6
-  nvdbg("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+  ninfo("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
         dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
         dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
         dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
@@ -2616,7 +2462,7 @@ static int stm32_ifdown(struct net_driver_s *dev)
   struct stm32_ethmac_s *priv = (struct stm32_ethmac_s *)dev->d_private;
   irqstate_t flags;
 
-  nvdbg("Taking the network down\n");
+  ninfo("Taking the network down\n");
 
   /* Disable the Ethernet interrupt */
 
@@ -2643,28 +2489,31 @@ static int stm32_ifdown(struct net_driver_s *dev)
 }
 
 /****************************************************************************
- * Function: stm32_txavail_process
+ * Function: stm32_txavail_work
  *
  * Description:
- *   Perform an out-of-cycle poll.
+ *   Perform an out-of-cycle poll on the worker thread.
  *
  * Parameters:
- *   priv - Reference to the NuttX driver state structure
+ *   arg  - Reference to the NuttX driver state structure (cast to void*)
  *
  * Returned Value:
  *   None
  *
  * Assumptions:
- *   Called in normal user mode
+ *   Called on the higher priority worker thread.
  *
  ****************************************************************************/
 
-static inline void stm32_txavail_process(struct stm32_ethmac_s *priv)
+static void stm32_txavail_work(void *arg)
 {
-  nvdbg("ifup: %d\n", priv->ifup);
+  struct stm32_ethmac_s *priv = (struct stm32_ethmac_s *)arg;
+
+  ninfo("ifup: %d\n", priv->ifup);
 
   /* Ignore the notification if the interface is not yet up */
 
+  net_lock();
   if (priv->ifup)
     {
       /* Poll the network for new XMIT data */
@@ -2672,39 +2521,9 @@ static inline void stm32_txavail_process(struct stm32_ethmac_s *priv)
       stm32_dopoll(priv);
     }
 
+  net_unlock();
 }
 
-/****************************************************************************
- * Function: stm32_txavail_work
- *
- * Description:
- *   Perform an out-of-cycle poll on the worker thread.
- *
- * Parameters:
- *   arg  - Reference to the NuttX driver state structure (cast to void*)
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Called on the higher priority worker thread.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void stm32_txavail_work(void *arg)
-{
-  struct stm32_ethmac_s *priv = (struct stm32_ethmac_s *)arg;
-  net_lock_t state;
-
-  /* Perform the poll */
-
-  state = net_lock();
-  stm32_txavail_process(priv);
-  net_unlock(state);
-}
-#endif
-
 /****************************************************************************
  * Function: stm32_txavail
  *
@@ -2728,34 +2547,18 @@ static int stm32_txavail(struct net_driver_s *dev)
 {
   struct stm32_ethmac_s *priv = (struct stm32_ethmac_s *)dev->d_private;
 
-#ifdef CONFIG_NET_NOINTS
   /* Is our single work structure available?  It may not be if there are
    * pending interrupt actions and we will have to ignore the Tx
    * availability action.
    */
 
-  if (work_available(&priv->work))
+  if (work_available(&priv->pollwork))
     {
       /* Schedule to serialize the poll on the worker thread. */
 
-      work_queue(HPWORK, &priv->work, stm32_txavail_work, priv, 0);
+      work_queue(ETHWORK, &priv->pollwork, stm32_txavail_work, priv, 0);
     }
 
-#else
-  irqstate_t flags;
-
-  /* Disable interrupts because this function may be called from interrupt
-   * level processing.
-   */
-
-  flags = enter_critical_section();
-
-  /* Perform the out-of-cycle poll now */
-
-  stm32_txavail_process(priv);
-  leave_critical_section(flags);
-#endif
-
   return OK;
 }
 
@@ -2829,8 +2632,8 @@ static int stm32_addmac(struct net_driver_s *dev, const uint8_t *mac)
   uint32_t temp;
   uint32_t registeraddress;
 
-  nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Add the MAC address to the hardware multicast hash table */
 
@@ -2886,7 +2689,7 @@ static int stm32_rmmac(struct net_driver_s *dev, const uint8_t *mac)
   uint32_t temp;
   uint32_t registeraddress;
 
-  nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
           mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Remove the MAC address to the hardware multicast hash table */
@@ -3267,7 +3070,7 @@ static int stm32_phyread(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t *val
         }
     }
 
-  nvdbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n",
+  ninfo("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n",
         phydevaddr, phyregaddr);
 
   return -ETIMEDOUT;
@@ -3326,7 +3129,7 @@ static int stm32_phywrite(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t val
         }
     }
 
-  nvdbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n",
+  ninfo("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n",
         phydevaddr, phyregaddr, value);
 
   return -ETIMEDOUT;
@@ -3363,7 +3166,7 @@ static inline int stm32_dm9161(struct stm32_ethmac_s *priv)
   ret = stm32_phyread(CONFIG_STM32F7_PHYADDR, MII_PHYID1, &phyval);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to read the PHY ID1: %d\n", ret);
+      nerr("ERROR: Failed to read the PHY ID1: %d\n", ret);
       return ret;
     }
 
@@ -3374,14 +3177,14 @@ static inline int stm32_dm9161(struct stm32_ethmac_s *priv)
       up_systemreset();
     }
 
-  nvdbg("PHY ID1: 0x%04X\n", phyval);
+  ninfo("PHY ID1: 0x%04X\n", phyval);
 
   /* Now check the "DAVICOM Specified Configuration Register (DSCR)", Register 16 */
 
   ret = stm32_phyread(CONFIG_STM32F7_PHYADDR, 16, &phyval);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to read the PHY Register 0x10: %d\n", ret);
+      nerr("ERROR: Failed to read the PHY Register 0x10: %d\n", ret);
       return ret;
     }
 
@@ -3438,7 +3241,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
   ret = stm32_phywrite(CONFIG_STM32F7_PHYADDR, MII_MCR, MII_MCR_RESET);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to reset the PHY: %d\n", ret);
+      nerr("ERROR: Failed to reset the PHY: %d\n", ret);
       return ret;
     }
   up_mdelay(PHY_RESET_DELAY);
@@ -3449,7 +3252,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
   ret = stm32_phy_boardinitialize(0);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to initialize the PHY: %d\n", ret);
+      nerr("ERROR: Failed to initialize the PHY: %d\n", ret);
       return ret;
     }
 #endif
@@ -3474,7 +3277,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
       ret = stm32_phyread(CONFIG_STM32F7_PHYADDR, MII_MSR, &phyval);
       if (ret < 0)
         {
-          ndbg("ERROR: Failed to read the PHY MSR: %d\n", ret);
+          nerr("ERROR: Failed to read the PHY MSR: %d\n", ret);
           return ret;
         }
       else if ((phyval & MII_MSR_LINKSTATUS) != 0)
@@ -3485,7 +3288,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
 
   if (timeout >= PHY_RETRY_TIMEOUT)
     {
-      ndbg("ERROR: Timed out waiting for link status: %04x\n", phyval);
+      nerr("ERROR: Timed out waiting for link status: %04x\n", phyval);
       return -ETIMEDOUT;
     }
 
@@ -3494,7 +3297,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
   ret = stm32_phywrite(CONFIG_STM32F7_PHYADDR, MII_MCR, MII_MCR_ANENABLE);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to enable auto-negotiation: %d\n", ret);
+      nerr("ERROR: Failed to enable auto-negotiation: %d\n", ret);
       return ret;
     }
 
@@ -3505,7 +3308,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
       ret = stm32_phyread(CONFIG_STM32F7_PHYADDR, MII_MSR, &phyval);
       if (ret < 0)
         {
-          ndbg("ERROR: Failed to read the PHY MSR: %d\n", ret);
+          nerr("ERROR: Failed to read the PHY MSR: %d\n", ret);
           return ret;
         }
       else if ((phyval & MII_MSR_ANEGCOMPLETE) != 0)
@@ -3516,7 +3319,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
 
   if (timeout >= PHY_RETRY_TIMEOUT)
     {
-      ndbg("ERROR: Timed out waiting for auto-negotiation\n");
+      nerr("ERROR: Timed out waiting for auto-negotiation\n");
       return -ETIMEDOUT;
     }
 
@@ -3525,13 +3328,13 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
   ret = stm32_phyread(CONFIG_STM32F7_PHYADDR, CONFIG_STM32F7_PHYSR, &phyval);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to read PHY status register\n");
+      nerr("ERROR: Failed to read PHY status register\n");
       return ret;
     }
 
   /* Remember the selected speed and duplex modes */
 
-  nvdbg("PHYSR[%d]: %04x\n", CONFIG_STM32F7_PHYSR, phyval);
+  ninfo("PHYSR[%d]: %04x\n", CONFIG_STM32F7_PHYSR, phyval);
 
   /* Different PHYs present speed and mode information in different ways.  IF
    * This CONFIG_STM32F7_PHYSR_ALTCONFIG is selected, this indicates that the PHY
@@ -3543,7 +3346,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
   switch (phyval & CONFIG_STM32F7_PHYSR_ALTMODE)
     {
       default:
-        ndbg("ERROR: Unrecognized PHY status setting\n");
+        nerr("ERROR: Unrecognized PHY status setting\n");
 
       case CONFIG_STM32F7_PHYSR_10HD:
         priv->fduplex = 0;
@@ -3597,7 +3400,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
   ret = stm32_phywrite(CONFIG_STM32F7_PHYADDR, MII_MCR, phyval);
   if (ret < 0)
     {
-     ndbg("ERROR: Failed to write the PHY MCR: %d\n", ret);
+     nerr("ERROR: Failed to write the PHY MCR: %d\n", ret);
       return ret;
     }
 
@@ -3613,7 +3416,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
 #endif
 #endif
 
-  nvdbg("Duplex: %s Speed: %d MBps\n",
+  ninfo("Duplex: %s Speed: %d MBps\n",
         priv->fduplex ? "FULL" : "HALF",
         priv->mbps100 ? 100 : 10);
 
@@ -3809,7 +3612,6 @@ static inline void stm32_ethgpioconfig(struct stm32_ethmac_s *priv)
   stm32_configgpio(GPIO_ETH_RMII_RXD1);
   stm32_configgpio(GPIO_ETH_RMII_TXD0);
   stm32_configgpio(GPIO_ETH_RMII_TXD1);
-  /* stm32_configgpio(GPIO_ETH_RMII_TX_CLK); not needed? */
   stm32_configgpio(GPIO_ETH_RMII_TX_EN);
 
 #endif
@@ -3973,11 +3775,11 @@ static void stm32_macaddress(struct stm32_ethmac_s *priv)
   struct net_driver_s *dev = &priv->dev;
   uint32_t regval;
 
-  nllvdbg("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          dev->d_ifname,
-          dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
-          dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
-          dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
+  ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        dev->d_ifname,
+        dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
+        dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
+        dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
 
   /* Set the MAC address high register */
 
@@ -4041,7 +3843,7 @@ static void stm32_ipv6multicast(struct stm32_ethmac_s *priv)
   mac[4] = tmp16 & 0xff;
   mac[5] = tmp16 >> 8;
 
-  nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+  ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
         mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   (void)stm32_addmac(dev, mac);
@@ -4179,12 +3981,12 @@ static int stm32_ethconfig(struct stm32_ethmac_s *priv)
 
   /* Reset the Ethernet block */
 
-  nllvdbg("Reset the Ethernet block\n");
+  ninfo("Reset the Ethernet block\n");
   stm32_ethreset(priv);
 
   /* Initialize the PHY */
 
-  nllvdbg("Initialize the PHY\n");
+  ninfo("Initialize the PHY\n");
   ret = stm32_phyinit(priv);
   if (ret < 0)
     {
@@ -4193,7 +3995,7 @@ static int stm32_ethconfig(struct stm32_ethmac_s *priv)
 
   /* Initialize the MAC and DMA */
 
-  nllvdbg("Initialize the MAC and DMA\n");
+  ninfo("Initialize the MAC and DMA\n");
   ret = stm32_macconfig(priv);
   if (ret < 0)
     {
@@ -4217,7 +4019,7 @@ static int stm32_ethconfig(struct stm32_ethmac_s *priv)
 
   /* Enable normal MAC operation */
 
-  nllvdbg("Enable normal operation\n");
+  ninfo("Enable normal operation\n");
   return stm32_macenable(priv);
 }
 
@@ -4253,7 +4055,7 @@ int stm32_ethinitialize(int intf)
 {
   struct stm32_ethmac_s *priv;
 
-  nvdbg("intf: %d\n", intf);
+  ninfo("intf: %d\n", intf);
 
   /* Get the interface structure associated with this interface number. */
 
@@ -4287,7 +4089,7 @@ int stm32_ethinitialize(int intf)
 
   /* Attach the IRQ to the driver */
 
-  if (irq_attach(STM32_IRQ_ETH, stm32_interrupt))
+  if (irq_attach(STM32_IRQ_ETH, stm32_interrupt, NULL))
     {
       /* We could not attach the ISR to the interrupt */
 
diff --git a/arch/arm/src/stm32f7/stm32_exti.h b/arch/arm/src/stm32f7/stm32_exti.h
index 38ed8a1d6ed78bdcfdd45c6ab17eefe73da0756a..f9b1f2eaa0c3c1460f7a7b0293dcc008aeb943d7 100644
--- a/arch/arm/src/stm32f7/stm32_exti.h
+++ b/arch/arm/src/stm32f7/stm32_exti.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32f7/stm32_exti.h
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -72,22 +72,22 @@ extern "C"
  * Description:
  *   Sets/clears GPIO based event and interrupt triggers.
  *
- * Parameters:
+ * Input Parameters:
  *  - pinset:      GPIO pin configuration
  *  - risingedge:  Enables interrupt on rising edges
  *  - fallingedge: Enables interrupt on falling edges
  *  - event:       Generate event when set
  *  - func:        When non-NULL, generate interrupt
+ *  - arg:         Argument passed to the interrupt callback
  *
- * Returns:
- *   The previous value of the interrupt handler function pointer.  This
- *   value may, for example, be used to restore the previous handler when
- *   multiple handlers are used.
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure indicating the
+ *   nature of the failure.
  *
- ****************************************************************************/
+ ************************************************************************************/
 
-xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
-                          bool event, xcpt_t func);
+int stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
+                       bool event, xcpt_t func, void *arg);
 
 /****************************************************************************
  * Name: stm32_exti_alarm
@@ -95,21 +95,22 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
  * Description:
  *   Sets/clears EXTI alarm interrupt.
  *
- * Parameters:
+ * Input Parameters:
  *  - risingedge:  Enables interrupt on rising edges
  *  - fallingedge: Enables interrupt on falling edges
  *  - event:       Generate event when set
  *  - func:        When non-NULL, generate interrupt
+ *  - arg:         Argument passed to the interrupt callback
  *
- * Returns:
- *   The previous value of the interrupt handler function pointer.  This
- *   value may, for example, be used to restore the previous handler when
- *   multiple handlers are used.
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure indicating the
+ *   nature of the failure.
  *
  ****************************************************************************/
 
 #ifdef CONFIG_RTC_ALARM
-xcpt_t stm32_exti_alarm(bool risingedge, bool fallingedge, bool event, xcpt_t func);
+int stm32_exti_alarm(bool risingedge, bool fallingedge, bool event,
+                     xcpt_t func, void *arg);
 #endif
 
 #undef EXTERN
diff --git a/arch/arm/src/stm32f7/stm32_exti_alarm.c b/arch/arm/src/stm32f7/stm32_exti_alarm.c
index ff53915178a1a4d9ebf41a96484bd1f76f44df1a..9fd90d761852829390e02ced27826ff187a19c2c 100644
--- a/arch/arm/src/stm32f7/stm32_exti_alarm.c
+++ b/arch/arm/src/stm32f7/stm32_exti_alarm.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32f7/stm32_exti_alarm.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * This file derives from similar logic for the STM32 F1:
@@ -57,17 +57,14 @@
 #include "stm32_gpio.h"
 #include "stm32_exti.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
 /* Interrupt handlers attached to the ALARM EXTI */
 
-static xcpt_t stm32_exti_callback;
+static xcpt_t g_alarm_callback;
+static void  *g_callback_arg;
 
 /****************************************************************************
  * Public Data
@@ -85,7 +82,7 @@ static xcpt_t stm32_exti_callback;
  *
  ****************************************************************************/
 
-static int stm32_exti_alarm_isr(int irq, void *context)
+static int stm32_exti_alarm_isr(int irq, void *context, FAR void *arg)
 {
   int ret = OK;
 
@@ -95,9 +92,9 @@ static int stm32_exti_alarm_isr(int irq, void *context)
 
   /* And dispatch the interrupt to the handler */
 
-  if (stm32_exti_callback)
+  if (g_alarm_callback != NULL)
     {
-      ret = stm32_exti_callback(irq, context);
+      ret = g_alarm_callback(irq, context, g_callback_arg);
     }
 
   return ret;
@@ -117,29 +114,27 @@ static int stm32_exti_alarm_isr(int irq, void *context)
  *  - rising/falling edge: enables interrupt on rising/falling edget
  *  - event:  generate event when set
  *  - func:   when non-NULL, generate interrupt
+ *  - arg:    Argument passed to the interrupt callback
  *
  * Returns:
- *   The previous value of the interrupt handler function pointer.  This
- *   value may, for example, be used to restore the previous handler when
- *   multiple handlers are used.
+ *   Zero (OK) on success; a negated errno value on failure indicating the
+ *   nature of the failure.
  *
  ****************************************************************************/
 
-xcpt_t stm32_exti_alarm(bool risingedge, bool fallingedge, bool event,
-                        xcpt_t func)
+int stm32_exti_alarm(bool risingedge, bool fallingedge, bool event,
+                     xcpt_t func, void *arg)
 {
-  xcpt_t oldhandler;
-
   /* Get the previous GPIO IRQ handler; Save the new IRQ handler. */
 
-  oldhandler          = stm32_exti_callback;
-  stm32_exti_callback = func;
+  g_alarm_callback = func;
+  g_callback_arg   = arg;
 
   /* Install external interrupt handlers (if not already attached) */
 
   if (func)
     {
-      irq_attach(STM32_IRQ_RTCALRM, stm32_exti_alarm_isr);
+      irq_attach(STM32_IRQ_RTCALRM, stm32_exti_alarm_isr, NULL);
       up_enable_irq(STM32_IRQ_RTCALRM);
     }
   else
@@ -167,5 +162,5 @@ xcpt_t stm32_exti_alarm(bool risingedge, bool fallingedge, bool event,
 
   /* Return the old IRQ handler */
 
-  return oldhandler;
+  return OK;
 }
diff --git a/arch/arm/src/stm32f7/stm32_exti_gpio.c b/arch/arm/src/stm32f7/stm32_exti_gpio.c
index 7c150275635df00eae0cac6d81dc0a656892162d..e388054515967d448d229e5a7126c01a1c53ab0c 100644
--- a/arch/arm/src/stm32f7/stm32_exti_gpio.c
+++ b/arch/arm/src/stm32f7/stm32_exti_gpio.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32f7/stm32_exti_gpio.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Based on EXTI GPIO logic from the Cortex-M3/4 which includes contributions
@@ -65,7 +65,18 @@
  * families
  */
 
-#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
+#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) \
+  || defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct gpio_callback_s
+{
+  xcpt_t callback;
+  void  *arg;
+};
 
 /****************************************************************************
  * Private Data
@@ -73,7 +84,7 @@
 
 /* Interrupt handlers attached to each EXTI */
 
-static xcpt_t stm32_exti_callbacks[16];
+static struct gpio_callback_s g_gpio_callbacks[16];
 
 /****************************************************************************
  * Private Functions
@@ -83,7 +94,7 @@ static xcpt_t stm32_exti_callbacks[16];
  * Interrupt Service Routines - Dispatchers
  ****************************************************************************/
 
-static int stm32_exti0_isr(int irq, void *context)
+static int stm32_exti0_isr(int irq, void *context, void *arg)
 {
   int ret = OK;
 
@@ -93,15 +104,18 @@ static int stm32_exti0_isr(int irq, void *context)
 
   /* And dispatch the interrupt to the handler */
 
-  if (stm32_exti_callbacks[0])
+  if (g_gpio_callbacks[0].callback != NULL)
     {
-      ret = stm32_exti_callbacks[0](irq, context);
+       xcpt_t callback = g_gpio_callbacks[0].callback;
+       void   *cbarg   = g_gpio_callbacks[0].arg;
+
+      ret = callback(irq, context, cbarg);
     }
 
   return ret;
 }
 
-static int stm32_exti1_isr(int irq, void *context)
+static int stm32_exti1_isr(int irq, void *context, void *arg)
 {
   int ret = OK;
 
@@ -111,15 +125,18 @@ static int stm32_exti1_isr(int irq, void *context)
 
   /* And dispatch the interrupt to the handler */
 
-  if (stm32_exti_callbacks[1])
+  if (g_gpio_callbacks[1].callback != NULL)
     {
-      ret = stm32_exti_callbacks[1](irq, context);
+       xcpt_t callback = g_gpio_callbacks[1].callback;
+       void   *cbarg   = g_gpio_callbacks[1].arg;
+
+      ret = callback(irq, context, cbarg);
     }
 
   return ret;
 }
 
-static int stm32_exti2_isr(int irq, void *context)
+static int stm32_exti2_isr(int irq, void *context, void *arg)
 {
   int ret = OK;
 
@@ -129,15 +146,18 @@ static int stm32_exti2_isr(int irq, void *context)
 
   /* And dispatch the interrupt to the handler */
 
-  if (stm32_exti_callbacks[2])
+  if (g_gpio_callbacks[2].callback != NULL)
     {
-      ret = stm32_exti_callbacks[2](irq, context);
+       xcpt_t callback = g_gpio_callbacks[2].callback;
+       void   *cbarg   = g_gpio_callbacks[2].arg;
+
+      ret = callback(irq, context, cbarg);
     }
 
   return ret;
 }
 
-static int stm32_exti3_isr(int irq, void *context)
+static int stm32_exti3_isr(int irq, void *context, void *arg)
 {
   int ret = OK;
 
@@ -147,15 +167,18 @@ static int stm32_exti3_isr(int irq, void *context)
 
   /* And dispatch the interrupt to the handler */
 
-  if (stm32_exti_callbacks[3])
+  if (g_gpio_callbacks[3].callback != NULL)
     {
-      ret = stm32_exti_callbacks[3](irq, context);
+       xcpt_t callback = g_gpio_callbacks[3].callback;
+       void   *cbarg   = g_gpio_callbacks[3].arg;
+
+      ret = callback(irq, context, cbarg);
     }
 
   return ret;
 }
 
-static int stm32_exti4_isr(int irq, void *context)
+static int stm32_exti4_isr(int irq, void *context, void *arg)
 {
   int ret = OK;
 
@@ -165,9 +188,12 @@ static int stm32_exti4_isr(int irq, void *context)
 
   /* And dispatch the interrupt to the handler */
 
-  if (stm32_exti_callbacks[4])
+  if (g_gpio_callbacks[4].callback != NULL)
     {
-      ret = stm32_exti_callbacks[4](irq, context);
+       xcpt_t callback = g_gpio_callbacks[4].callback;
+       void   *cbarg   = g_gpio_callbacks[4].arg;
+
+      ret = callback(irq, context, cbarg);
     }
 
   return ret;
@@ -198,10 +224,14 @@ static int stm32_exti_multiisr(int irq, void *context, int first, int last)
 
           /* And dispatch the interrupt to the handler */
 
-          if (stm32_exti_callbacks[pin])
+          if (g_gpio_callbacks[pin].callback != NULL)
             {
-              int tmp = stm32_exti_callbacks[pin](irq, context);
-              if (tmp != OK)
+              xcpt_t callback = g_gpio_callbacks[pin].callback;
+              void   *cbarg   = g_gpio_callbacks[pin].arg;
+              int tmp;
+
+              tmp = callback(irq, context, cbarg);
+              if (tmp < 0)
                 {
                   ret = tmp;
                 }
@@ -212,12 +242,12 @@ static int stm32_exti_multiisr(int irq, void *context, int first, int last)
   return ret;
 }
 
-static int stm32_exti95_isr(int irq, void *context)
+static int stm32_exti95_isr(int irq, void *context, void *arg)
 {
   return stm32_exti_multiisr(irq, context, 5, 9);
 }
 
-static int stm32_exti1510_isr(int irq, void *context)
+static int stm32_exti1510_isr(int irq, void *context, void *arg)
 {
   return stm32_exti_multiisr(irq, context, 10, 15);
 }
@@ -232,30 +262,29 @@ static int stm32_exti1510_isr(int irq, void *context)
  * Description:
  *   Sets/clears GPIO based event and interrupt triggers.
  *
- * Parameters:
+ * Input Parameters:
  *  - pinset:      GPIO pin configuration
  *  - risingedge:  Enables interrupt on rising edges
  *  - fallingedge: Enables interrupt on falling edges
  *  - event:       Generate event when set
  *  - func:        When non-NULL, generate interrupt
+ *  - arg:         Argument passed to the interrupt callback
  *
- * Returns:
- *   The previous value of the interrupt handler function pointer.  This
- *   value may, for example, be used to restore the previous handler when
- *   multiple handlers are used.
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure indicating the
+ *   nature of the failure.
  *
  ****************************************************************************/
 
-xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
-                          bool event, xcpt_t func)
+int stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
+                       bool event, xcpt_t func, void *arg)
 {
+  struct gpio_callback_s *shared_cbs;
   uint32_t pin = pinset & GPIO_PIN_MASK;
   uint32_t exti = STM32_EXTI_BIT(pin);
   int      irq;
   xcpt_t   handler;
-  xcpt_t   oldhandler = NULL;
   int      nshared;
-  xcpt_t  *shared_cbs;
   int      i;
 
   /* Select the interrupt handler for this EXTI pin */
@@ -264,7 +293,7 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
     {
       irq        = pin + STM32_IRQ_EXTI0;
       nshared    = 1;
-      shared_cbs = &stm32_exti_callbacks[pin];
+      shared_cbs = &g_gpio_callbacks[pin];
       switch (pin)
         {
           case 0:
@@ -292,27 +321,27 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
     {
       irq        = STM32_IRQ_EXTI95;
       handler    = stm32_exti95_isr;
-      shared_cbs = &stm32_exti_callbacks[5];
+      shared_cbs = &g_gpio_callbacks[5];
       nshared    = 5;
     }
   else
     {
       irq        = STM32_IRQ_EXTI1510;
       handler    = stm32_exti1510_isr;
-      shared_cbs = &stm32_exti_callbacks[10];
+      shared_cbs = &g_gpio_callbacks[10];
       nshared    = 6;
     }
 
   /* Get the previous GPIO IRQ handler; Save the new IRQ handler. */
 
-  oldhandler = stm32_exti_callbacks[pin];
-  stm32_exti_callbacks[pin] = func;
+  g_gpio_callbacks[pin].callback = func;
+  g_gpio_callbacks[pin].arg      = arg;
 
   /* Install external interrupt handlers */
 
   if (func)
     {
-      irq_attach(irq, handler);
+      irq_attach(irq, handler, NULL);
       up_enable_irq(irq);
     }
   else
@@ -323,7 +352,7 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
 
       for (i = 0; i < nshared; i++)
         {
-          if (shared_cbs[i] != NULL)
+          if (shared_cbs[i].callback != NULL)
             {
               break;
             }
@@ -364,9 +393,7 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
               func ? 0 : exti,
               func ? exti : 0);
 
-  /* Return the old IRQ handler */
-
-  return oldhandler;
+  return OK;
 }
 
 #endif /* CONFIG_STM32F7_STM32F74XX || CONFIG_STM32F7_STM32F75XX */
diff --git a/arch/arm/src/stm32f7/stm32_exti_pwr.c b/arch/arm/src/stm32f7/stm32_exti_pwr.c
index 104dbff01055da91010d43b23fb5002cd30b64be..09d064e930ebf3e8efa3a05ec186250ab99ff4e5 100644
--- a/arch/arm/src/stm32f7/stm32_exti_pwr.c
+++ b/arch/arm/src/stm32f7/stm32_exti_pwr.c
@@ -70,7 +70,8 @@
 
 /* Interrupt handlers attached to the PVD EXTI */
 
-static xcpt_t stm32_exti_pvd_callback;
+static xcpt_t g_pvd_callback;
+static void  *g_callback_arg;
 
 /****************************************************************************
  * Public Data
@@ -88,7 +89,7 @@ static xcpt_t stm32_exti_pvd_callback;
  *
  ****************************************************************************/
 
-static int stm32_exti_pvd_isr(int irq, void *context)
+static int stm32_exti_pvd_isr(int irq, void *context, void *arg)
 {
   int ret = OK;
 
@@ -98,9 +99,9 @@ static int stm32_exti_pvd_isr(int irq, void *context)
 
   /* And dispatch the interrupt to the handler */
 
-  if (stm32_exti_pvd_callback)
+  if (g_pvd_callback)
     {
-      ret = stm32_exti_pvd_callback(irq, context);
+      ret = g_pvd_callback(irq, context, g_callback_arg);
     }
 
   return ret;
@@ -122,27 +123,24 @@ static int stm32_exti_pvd_isr(int irq, void *context)
  *  - func:   when non-NULL, generate interrupt
  *
  * Returns:
- *   The previous value of the interrupt handler function pointer.  This
- *   value may, for example, be used to restore the previous handler when
- *   multiple handlers are used.
+ *   Zero (OK) returned on success; a negated errno value is returned on
+ *   failure.
  *
  ****************************************************************************/
 
-xcpt_t stm32_exti_pvd(bool risingedge, bool fallingedge, bool event,
-                      xcpt_t func)
+int stm32_exti_pvd(bool risingedge, bool fallingedge, bool event,
+                   xcpt_t func, void *arg);
 {
-  xcpt_t oldhandler;
-
   /* Get the previous GPIO IRQ handler; Save the new IRQ handler. */
 
-  oldhandler = stm32_exti_pvd_callback;
-  stm32_exti_pvd_callback = func;
+  g_pvd_callback = func;
+  g_callback_arg = arg;
 
   /* Install external interrupt handlers (if not already attached) */
 
   if (func)
     {
-      irq_attach(STM32_IRQ_PVD, stm32_exti_pvd_isr);
+      irq_attach(STM32_IRQ_PVD, stm32_exti_pvd_isr, NULL);
       up_enable_irq(STM32_IRQ_PVD);
     }
   else
@@ -168,7 +166,5 @@ xcpt_t stm32_exti_pvd(bool risingedge, bool fallingedge, bool event,
               func ? 0 : EXTI_PVD_LINE,
               func ? EXTI_PVD_LINE : 0);
 
-  /* Return the old IRQ handler */
-
-  return oldhandler;
+  return OK;
 }
diff --git a/arch/arm/src/stm32f7/stm32_exti_pwr.h b/arch/arm/src/stm32f7/stm32_exti_pwr.h
new file mode 100644
index 0000000000000000000000000000000000000000..67e22d05ff8400fb6b14f351c19f09f9a724e7f8
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_exti_pwr.h
@@ -0,0 +1,72 @@
+/****************************************************************************
+ * arch/arm/src/stm32f7/stm32_exti_pwr.h
+ *
+ *   Copyright (C) 2015 Haltian Ltd. All rights reserved.
+ *   Authors: Dmitry Nikolaev 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_STM32_EXTI_PWR_H
+#define __ARCH_ARM_SRC_STM32F7_STM32_EXTI_PWR_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_exti_pvd
+ *
+ * Description:
+ *   Sets/clears EXTI PVD interrupt.
+ *
+ * Parameters:
+ *  - rising/falling edge: enables interrupt on rising/falling edge
+ *  - event:  generate event when set
+ *  - func:   when non-NULL, generate interrupt
+ *  - arg:    Argument passed to the interrupt callback
+ *
+ * Returns:
+ *   Zero (OK) returned on success; a negated errno value is returned on
+ *   failure.
+ *
+ ****************************************************************************/
+
+int stm32_exti_pvd(bool risingedge, bool fallingedge, bool event,
+                   xcpt_t func, void *arg);
+
+#endif /* __ARCH_ARM_SRC_STM32F7_STM32_EXTI_PWR_H */
diff --git a/arch/arm/src/stm32f7/stm32_gpio.c b/arch/arm/src/stm32f7/stm32_gpio.c
index ee4e0f819bbf3abd2ddbe3e39d09c9409bbb4e62..17e8b4c10822e6ea958de283f2921ceca571e6a5 100644
--- a/arch/arm/src/stm32f7/stm32_gpio.c
+++ b/arch/arm/src/stm32f7/stm32_gpio.c
@@ -57,7 +57,8 @@
  * families
  */
 
-#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
+#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) \
+  || defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
 
 /****************************************************************************
  * Public Data
@@ -181,6 +182,7 @@ int stm32_configgpio(uint32_t cfgset)
         break;
 
       case GPIO_OUTPUT:     /* General purpose output mode */
+        stm32_gpiowrite(cfgset, (cfgset & GPIO_OUTPUT_SET) != 0); /* Set the initial output value */
         pinmode = GPIO_MODER_OUTPUT;
         break;
 
@@ -310,17 +312,9 @@ int stm32_configgpio(uint32_t cfgset)
 
   putreg32(regval, base + STM32_GPIO_OTYPER_OFFSET);
 
-  /* If it is an output... set the pin to the correct initial state. */
-
-  if (pinmode == GPIO_MODER_OUTPUT)
-    {
-      bool value = ((cfgset & GPIO_OUTPUT_SET) != 0);
-      stm32_gpiowrite(cfgset, value);
-    }
-
   /* Otherwise, it is an input pin.  Should it configured as an EXTI interrupt? */
 
-  else if ((cfgset & GPIO_EXTI) != 0)
+  if (pinmode != GPIO_MODER_OUTPUT && (cfgset & GPIO_EXTI) != 0)
     {
       /* "In STM32 F1 the selection of the EXTI line source is performed through
        *  the EXTIx bits in the AFIO_EXTICRx registers, while in F2 series this
diff --git a/arch/arm/src/stm32f7/stm32_gpio.h b/arch/arm/src/stm32f7/stm32_gpio.h
index 7fff5e249984d0598908d038e8d1c72e1f29a77f..35b7fc39d25d18139346a38b3886323a5a49bd1e 100644
--- a/arch/arm/src/stm32f7/stm32_gpio.h
+++ b/arch/arm/src/stm32f7/stm32_gpio.h
@@ -266,7 +266,7 @@ EXTERN const uint32_t g_gpiobase[STM32F7_NGPIO];
  *   function, it must be unconfigured with stm32_unconfiggpio() with
  *   the same cfgset first before it can be set to non-alternative function.
  *
- * Returns:
+ * Returned Value:
  *   OK on success
  *   ERROR on invalid port, or when pin is locked as ALT function.
  *
@@ -287,7 +287,7 @@ int stm32_configgpio(uint32_t cfgset);
  *   operate in PWM mode could produce excessive on-board currents and trigger
  *   over-current/alarm function.
  *
- * Returns:
+ * Returned Value:
  *  OK on success
  *  ERROR on invalid port
  *
@@ -315,27 +315,28 @@ void stm32_gpiowrite(uint32_t pinset, bool value);
 
 bool stm32_gpioread(uint32_t pinset);
 
-/************************************************************************************
+/****************************************************************************
  * Name: stm32_gpiosetevent
  *
  * Description:
  *   Sets/clears GPIO based event and interrupt triggers.
  *
- * Parameters:
- *  - pinset: gpio pin configuration
- *  - rising/falling edge: enables
- *  - event:  generate event when set
- *  - func:   when non-NULL, generate interrupt
+ * Input Parameters:
+ *  - pinset:      GPIO pin configuration
+ *  - risingedge:  Enables interrupt on rising edges
+ *  - fallingedge: Enables interrupt on falling edges
+ *  - event:       Generate event when set
+ *  - func:        When non-NULL, generate interrupt
+ *  - arg:         Argument passed to the interrupt callback
  *
- * Returns:
- *  The previous value of the interrupt handler function pointer.  This value may,
- *  for example, be used to restore the previous handler when multiple handlers are
- *  used.
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure indicating the
+ *   nature of the failure.
  *
  ************************************************************************************/
 
-xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
-                          bool event, xcpt_t func);
+int stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
+                       bool event, xcpt_t func, void *arg);
 
 /************************************************************************************
  * Function:  stm32_dumpgpio
@@ -345,7 +346,7 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_GPIO_INFO
 int stm32_dumpgpio(uint32_t pinset, const char *msg);
 #else
 #  define stm32_dumpgpio(p,m)
diff --git a/arch/arm/src/stm32f7/stm32_i2c.c b/arch/arm/src/stm32f7/stm32_i2c.c
new file mode 100644
index 0000000000000000000000000000000000000000..c98a1bd2251ced43bb6fc73d1534402deb2c546f
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_i2c.c
@@ -0,0 +1,2792 @@
+/************************************************************************************
+ * arch/arm/src/stm32/stm32f7_i2c.c
+ * STM32 I2C Hardware Layer - Device Driver
+ *
+ *   Copyright (C) 2011 Uros Platise. All rights reserved.
+ *   Author: Uros Platise 
+ *
+ * With extensions and modifications for the F1, F2, and F4 by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregroy Nutt 
+ *            John Wharington
+ *            David Sidrane 
+ *
+ * Major rewrite of ISR and supporting methods, including support
+ * for NACK and RELOAD by:
+ *
+ *   Copyright (c) 2016 Doug Vetter.  All rights reserved.
+ *   Author: Doug Vetter 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/* ------------------------------------------------------------------------------
+ *
+ * STM32 F7 I2C Driver
+ *
+ * Supports:
+ *  - Master operation:
+ *      Standard-mode (up to 100 kHz)
+ *      Fast-mode (up to 400 kHz)
+ *      Fast-mode Plus (up to 1 MHz)
+ *      fI2CCLK clock source selection is based on STM32_RCC_DCKCFGR2_I2CxSRC
+ *      being set to HSI and the calulations are based on STM32_HSI_FREQUENCY
+ *      of 16mHz
+ *
+ *  - Multiple instances (shared bus)
+ *  - Interrupt based operation
+ *  - RELOAD support
+ *
+ * Unsupported, possible future work:
+ *  - More effective error reporting to higher layers
+ *  - Slave operation
+ *  - Support of fI2CCLK frequencies other than 16Mhz
+ *  - Polled operation (code present but untested)
+ *  - SMBus support
+ *  - Multi-master support
+ *  - IPMI
+ *
+ * Test Environment:
+ *
+ *  - STM32F7676ZI on ST Nucleo-144 Board (ST Part STM32F429ZIT6)
+ *
+ * Operational Status:
+ *
+ *  All supported features have been tested and found to be operational.
+ *
+ *  Although the RELOAD capability has been tested as it was required to
+ *  implement the I2C_M_NORESTART flag on F3 hardware, the associated
+ *  logic to support the transfer messages with more than 255 byte
+ *  payloads has not been  tested as the author lacked access to a real
+ *  device supporting these types of transfers.
+ *
+ * Performance Benchmarks: TBD
+ *
+ *  Time to transfer two messages, each a byte in length, in addition to the
+ *  START condition, in interrupt mode:
+ *
+ *  DEBUG enabled (development): TBDms
+ *      Excessive delay here is caused by printing to the console and
+ *      is of no concern.
+ *
+ *  DEBUG disabled (production): TBSus
+ *      Between Messages: TBDus
+ *      Between Bytes: TBDus
+ *
+ * Implementation:
+ *
+ *  - Device: structure as defined by the nuttx/i2c/i2c.h
+ *
+ *  - Instance: represents each individual access to the I2C driver, obtained by
+ *      the i2c_init(); it extends the Device structure from the nuttx/i2c/i2c.h;
+ *      Instance points to OPS, to common I2C Hardware private data and contains
+ *      its own private data including frequency, address and mode of operation.
+ *
+ *  - Private: Private data of an I2C Hardware
+ *
+ * High Level Functional Desecription
+ *
+ * This driver works with I2C "messages" (struct i2c_msg_s), which carry a buffer
+ * intended to transfer data to, or store data read from, the I2C bus.
+ *
+ * As the hardware can only transmit or receive one byte at a time the basic job
+ * of the driver (and the ISR specifically) is to process each message in the
+ * order they are stored in the message list, one byte at a time.  When
+ * no messages are left the ISR exits and returns the result to the caller.
+ *
+ * The order of the list of I2C messages provided to the driver is important and
+ * dependent upon the hardware in use.  A typical I2C transaction between the F3
+ * as an I2C Master and some other IC as a I2C Slave requires two messages that
+ * communicate the:
+ *
+ *    1) Subaddress (register offset on the slave device)
+ *    2) Data sent to or read from the device
+ *
+ * These messages will typically be one byte in length but may be up to 2^31
+ * bytes in length.  Incidentally, the maximum length is limited only because
+ * i2c_msg_s.length is a signed int for some odd reason.
+ *
+ * Interrupt mode relies on the following interrupt events:
+ *
+ *   TXIS  - Transmit interrupt
+ *           (data transmitted to bus and acknowedged)
+ *   NACKF - Not Acknowledge Received
+ *           (data transmitted to bus and NOT acknowledged)
+ *   RXNE  - Receive interrupt
+ *           (data received from bus)
+ *   TC    - Transfer Complete
+ *           (All bytes in message transferred)
+ *   TCR   - Transfer Complete (Reload)
+ *           (Current batch of bytes in message transferred)
+ *
+ * The driver currently supports Single Master mode only.  Slave mode is not
+ * supported.  Additionally, the driver runs in Software End Mode (AUTOEND
+ * disabled) so the driver is responsible for telling the hardware what to
+ * do at the end of a transfer.
+ *
+ * ------------------------------------------------------------------------------
+ *
+ * Configuration:
+ *
+ *  To use this driver, enable the following configuration variable:
+ *
+ *  One of:
+ *
+ *    CONFIG_STM32F7_STM32F74XX
+ *    CONFIG_STM32F7_STM32F75XX
+ *    CONFIG_STM32F7_STM32F76XX
+ *    CONFIG_STM32F7_STM32F77XX
+ *
+ *
+ *  and one or more interfaces:
+ *
+ *    CONFIG_STM32F7_I2C1
+ *    CONFIG_STM32F7_I2C2
+ *    CONFIG_STM32F7_I2C3
+ *    CONFIG_STM32F7_I2C4
+ *
+ *  To configure the ISR timeout using fixed values (CONFIG_STM32F7_I2C_DYNTIMEO=n):
+ *
+ *    CONFIG_STM32F7_I2CTIMEOSEC   (Timeout in seconds)
+ *    CONFIG_STM32F7_I2CTIMEOMS    (Timeout in milliseconds)
+ *    CONFIG_STM32F7_I2CTIMEOTICKS (Timeout in ticks)
+ *
+ *  To configure the ISR timeout using dynamic values (CONFIG_STM32F7_I2C_DYNTIMEO=y):
+ *
+ *    CONFIG_STM32F7_I2C_DYNTIMEO_USECPERBYTE  (Timeout in microseconds per byte)
+ *    CONFIG_STM32F7_I2C_DYNTIMEO_STARTSTOP    (Timeout for start/stop in milliseconds)
+ *
+ *  Debugging output enabled with:
+ *
+ *    CONFIG_DEBUG_FEATURES and CONFIG_DEBUG_I2C_{ERROR|WARN|INFO}
+ *
+ *  ISR Debugging output may be enabled with:
+ *
+ *    CONFIG_DEBUG_FEATURES and CONFIG_DEBUG_I2C_INFO
+ *
+ * ------------------------------------------------------------------------------
+ *
+ * References:
+ *
+ *  RM0316:
+ *     ST STM32F76xxx and STM32F77xxx Reference Manual
+ *     Document ID: DocID028270 Revision 2, April 2016.
+ *
+ *  DATASHEET:
+ *     ST STM32F777xx/STM32F778Ax/STM32F779x Datasheet
+ *     Document ID: DocID028294, Revision 3, May 2016.
+ *
+ *  ERRATA:
+ *     STM32F76xxx/STM32F77xxx Errata sheet Rev A device limitations
+ *     Document ID: DocID028806, Revision 2, April 2016.
+ *
+ *  I2CSPEC:
+ *     I2C Bus Specification and User Manual
+ *     Document ID: UM10204, Revision 6, April 2014.
+ *
+ * ------------------------------------------------------------------------------
+ */
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "up_arch.h"
+
+#include "stm32_rcc.h"
+#include "stm32_i2c.h"
+#include "stm32_gpio.h"
+#include "chip/stm32_pinmap.h"
+
+/* At least one I2C peripheral must be enabled */
+
+#if defined(CONFIG_STM32F7_I2C1) || defined(CONFIG_STM32F7_I2C2) || \
+    defined(CONFIG_STM32F7_I2C3) || defined(CONFIG_STM32F7_I2C4)
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#undef INVALID_CLOCK_SOURCE
+
+#ifdef CONFIG_STM32F7_I2C1
+#  if STM32_RCC_DCKCFGR2_I2C1SRC != RCC_DCKCFGR2_I2C1SEL_HSI
+#    warning "Clock Source STM32_RCC_DCKCFGR2_I2C1SRC must be HSI"
+#    define INVALID_CLOCK_SOURCE
+#  endif
+#endif
+#ifdef CONFIG_STM32F7_I2C1
+#  if STM32_RCC_DCKCFGR2_I2C2SRC != RCC_DCKCFGR2_I2C2SEL_HSI
+#    warning "Clock Source STM32_RCC_DCKCFGR2_I2C2SRC must be HSI"
+#    define INVALID_CLOCK_SOURCE
+#  endif
+#endif
+#ifdef CONFIG_STM32F7_I2C3
+#  if STM32_RCC_DCKCFGR2_I2C3SRC != RCC_DCKCFGR2_I2C3SEL_HSI
+#    warning "Clock Source STM32_RCC_DCKCFGR2_I2C3SRC must be HSI"
+#    define INVALID_CLOCK_SOURCE
+#  endif
+#endif
+#ifdef CONFIG_STM32F7_I2C4
+#  if STM32_RCC_DCKCFGR2_I2C4SRC != RCC_DCKCFGR2_I2C4SEL_HSI
+#    warning "Clock Source STM32_RCC_DCKCFGR2_I2C4SRC must be HSI"
+#    define INVALID_CLOCK_SOURCE
+#  endif
+#endif
+
+/* CONFIG_I2C_POLLED may be set so that I2C interrupts will not be used.  Instead,
+ * CPU-intensive polling will be used.
+ */
+
+/* Interrupt wait timeout in seconds and milliseconds */
+
+#if !defined(CONFIG_STM32F7_I2CTIMEOSEC) && !defined(CONFIG_STM32F7_I2CTIMEOMS)
+#  define CONFIG_STM32F7_I2CTIMEOSEC 0
+#  define CONFIG_STM32F7_I2CTIMEOMS  500   /* Default is 500 milliseconds */
+#  warning "Using Defualt 500 Ms Timeout"
+#elif !defined(CONFIG_STM32F7_I2CTIMEOSEC)
+#  define CONFIG_STM32F7_I2CTIMEOSEC 0     /* User provided milliseconds */
+#elif !defined(CONFIG_STM32F7_I2CTIMEOMS)
+#  define CONFIG_STM32F7_I2CTIMEOMS  0     /* User provided seconds */
+#endif
+
+/* Interrupt wait time timeout in system timer ticks */
+
+#ifndef CONFIG_STM32F7_I2CTIMEOTICKS
+#  define CONFIG_STM32F7_I2CTIMEOTICKS \
+    (SEC2TICK(CONFIG_STM32F7_I2CTIMEOSEC) + MSEC2TICK(CONFIG_STM32F7_I2CTIMEOMS))
+#endif
+
+#ifndef CONFIG_STM32F7_I2C_DYNTIMEO_STARTSTOP
+#  define CONFIG_STM32F7_I2C_DYNTIMEO_STARTSTOP TICK2USEC(CONFIG_STM32F7_I2CTIMEOTICKS)
+#endif
+
+/* Macros to convert a I2C pin to a GPIO output */
+
+#define I2C_OUTPUT (GPIO_OUTPUT | GPIO_FLOAT | GPIO_OPENDRAIN |\
+                      GPIO_SPEED_50MHz | GPIO_OUTPUT_SET)
+
+#define MKI2C_OUTPUT(p) (((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_OUTPUT)
+
+#define I2C_CR1_TXRX (I2C_CR1_RXIE | I2C_CR1_TXIE)
+#define I2C_CR1_ALLINTS (I2C_CR1_TXRX | I2C_CR1_TCIE | I2C_CR1_ERRIE)
+
+/* I2C event tracing
+ *
+ * To enable tracing statements which show the details of the state machine
+ * enable the following configuration variable:
+ *
+ * CONFIG_I2C_TRACE
+ *
+ * Note: This facility uses syslog, which sends output to the console by
+ * default.  No other debug configuration variables are required.
+ */
+
+#ifndef CONFIG_I2C_TRACE
+#  define stm32_i2c_tracereset(p)
+#  define stm32_i2c_tracenew(p,s)
+#  define stm32_i2c_traceevent(p,e,a)
+#  define stm32_i2c_tracedump(p)
+#endif
+
+#ifndef CONFIG_I2C_NTRACE
+#  define CONFIG_I2C_NTRACE 32
+#endif
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+
+/* Interrupt state */
+
+enum stm32_intstate_e
+{
+  INTSTATE_IDLE = 0,      /* No I2C activity */
+  INTSTATE_WAITING,       /* Waiting for completion of interrupt activity */
+  INTSTATE_DONE,          /* Interrupt activity complete */
+};
+
+/* Trace events */
+
+enum stm32_trace_e
+{
+  I2CEVENT_NONE = 0,
+  I2CEVENT_STATE_ERROR,
+  I2CEVENT_ISR_SHUTDOWN,
+  I2CEVENT_ISR_CALL,
+  I2CEVENT_ISR_EMPTY_CALL,
+  I2CEVENT_MSG_HANDLING,
+  I2CEVENT_POLL_NOT_READY,
+  I2CEVENT_EMPTY_MSG,
+  I2CEVENT_START,
+  I2CEVENT_ADDRESS_ACKED,
+  I2CEVENT_ADDRESS_NACKED,
+  I2CEVENT_NACK,
+  I2CEVENT_READ,
+  I2CEVENT_READ_ERROR,
+  I2CEVENT_WRITE_TO_DR,
+  I2CEVENT_WRITE_STOP,
+  I2CEVENT_WRITE_RESTART,
+  I2CEVENT_WRITE_NO_RESTART,
+  I2CEVENT_WRITE_ERROR,
+  I2CEVENT_WRITE_FLAG_ERROR,
+  I2CEVENT_TC_RESTART,
+  I2CEVENT_TC_NO_RESTART
+};
+
+/* Trace data */
+
+struct stm32_trace_s
+{
+  uint32_t status;             /* I2C 32-bit SR2|SR1 status */
+  uint32_t count;              /* Interrupt count when status change */
+  enum stm32_intstate_e event; /* Last event that occurred with this status */
+  uint32_t parm;               /* Parameter associated with the event */
+  uint32_t time;               /* First of event or first status */
+};
+
+/* I2C Device hardware configuration */
+
+struct stm32_i2c_config_s
+{
+  uint32_t base;              /* I2C base address */
+  uint32_t clk_bit;           /* Clock enable bit */
+  uint32_t reset_bit;         /* Reset bit */
+  uint32_t scl_pin;           /* GPIO configuration for SCL as SCL */
+  uint32_t sda_pin;           /* GPIO configuration for SDA as SDA */
+#ifndef CONFIG_I2C_POLLED
+  int (*isr)(int, void *, void *);    /* Interrupt handler */
+  uint32_t ev_irq;            /* Event IRQ */
+  uint32_t er_irq;            /* Error IRQ */
+#endif
+};
+
+/* I2C Device Private Data */
+
+struct stm32_i2c_priv_s
+{
+  const struct stm32_i2c_config_s *config; /* Port configuration */
+  int refs;                    /* Referernce count */
+  sem_t sem_excl;              /* Mutual exclusion semaphore */
+#ifndef CONFIG_I2C_POLLED
+  sem_t sem_isr;               /* Interrupt wait semaphore */
+#endif
+  volatile uint8_t intstate;   /* Interrupt handshake (see enum stm32_intstate_e) */
+
+  uint8_t msgc;                /* Message count */
+  struct i2c_msg_s *msgv;      /* Message list */
+  uint8_t *ptr;                /* Current message buffer */
+  uint32_t frequency;          /* Current I2C frequency */
+  int dcnt;                    /* Current message bytes remaining to transfer */
+  uint16_t flags;              /* Current message flags */
+  bool astart;                 /* START sent */
+
+  /* I2C trace support */
+
+#ifdef CONFIG_I2C_TRACE
+  int tndx;                    /* Trace array index */
+  uint32_t start_time;         /* Time when the trace was started */
+
+  /* The actual trace data */
+
+  struct stm32_trace_s trace[CONFIG_I2C_NTRACE];
+#endif
+
+  uint32_t status;             /* End of transfer SR2|SR1 status */
+};
+
+/* I2C Device, Instance */
+
+struct stm32_i2c_inst_s
+{
+  struct i2c_ops_s        *ops;  /* Standard I2C operations */
+  struct stm32_i2c_priv_s *priv; /* Common driver private data structure */
+};
+
+/************************************************************************************
+ * Private Function Prototypes
+ ************************************************************************************/
+
+static inline uint16_t stm32_i2c_getreg(FAR struct stm32_i2c_priv_s *priv,
+                                        uint8_t offset);
+static inline void stm32_i2c_putreg(FAR struct stm32_i2c_priv_s *priv, uint8_t offset,
+                                    uint16_t value);
+static inline void stm32_i2c_putreg32(FAR struct stm32_i2c_priv_s *priv, uint8_t offset,
+                                    uint32_t value);
+static inline void stm32_i2c_modifyreg32(FAR struct stm32_i2c_priv_s *priv,
+                                         uint8_t offset, uint32_t clearbits,
+                                         uint32_t setbits);
+static inline void stm32_i2c_sem_wait(FAR struct i2c_master_s *dev);
+#ifdef CONFIG_STM32F7_I2C_DYNTIMEO
+static useconds_t stm32_i2c_tousecs(int msgc, FAR struct i2c_msg_s *msgs);
+#endif /* CONFIG_STM32F7_I2C_DYNTIMEO */
+static inline int  stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv);
+static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv);
+static inline void stm32_i2c_sem_post(FAR struct i2c_master_s *dev);
+static inline void stm32_i2c_sem_init(FAR struct i2c_master_s *dev);
+static inline void stm32_i2c_sem_destroy(FAR struct i2c_master_s *dev);
+#ifdef CONFIG_I2C_TRACE
+static void stm32_i2c_tracereset(FAR struct stm32_i2c_priv_s *priv);
+static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv, uint32_t status);
+static void stm32_i2c_traceevent(FAR struct stm32_i2c_priv_s *priv,
+                               enum stm32_trace_e event, uint32_t parm);
+static void stm32_i2c_tracedump(FAR struct stm32_i2c_priv_s *priv);
+#endif /* CONFIG_I2C_TRACE */
+static void stm32_i2c_setclock(FAR struct stm32_i2c_priv_s *priv,
+                               uint32_t frequency);
+static inline void stm32_i2c_sendstart(FAR struct stm32_i2c_priv_s *priv);
+static inline void stm32_i2c_sendstop(FAR struct stm32_i2c_priv_s *priv);
+static inline uint32_t stm32_i2c_getstatus(FAR struct stm32_i2c_priv_s *priv);
+static int stm32_i2c_isr(struct stm32_i2c_priv_s * priv);
+#ifndef CONFIG_I2C_POLLED
+#  ifdef CONFIG_STM32F7_I2C1
+static int stm32_i2c1_isr(int irq, void *context, FAR void *arg);
+#  endif
+#  ifdef CONFIG_STM32F7_I2C2
+static int stm32_i2c2_isr(int irq, void *context, FAR void *arg);
+#  endif
+#  ifdef CONFIG_STM32F7_I2C3
+static int stm32_i2c3_isr(int irq, void *context, FAR void *arg);
+#  endif
+#  ifdef CONFIG_STM32F7_I2C4
+static int stm32_i2c4_isr(int irq, void *context, FAR void *arg);
+#  endif
+#endif
+static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv);
+static int stm32_i2c_deinit(FAR struct stm32_i2c_priv_s *priv);
+
+static int stm32_i2c_process(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s *msgs,
+                             int count);
+static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s *msgs,
+                              int count);
+#ifdef CONFIG_I2C_RESET
+int stm32_i2c_reset(FAR struct i2c_master_s * dev);
+#endif
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32F7_I2C1
+static const struct stm32_i2c_config_s stm32_i2c1_config =
+{
+  .base       = STM32_I2C1_BASE,
+  .clk_bit    = RCC_APB1ENR_I2C1EN,
+  .reset_bit  = RCC_APB1RSTR_I2C1RST,
+  .scl_pin    = GPIO_I2C1_SCL,
+  .sda_pin    = GPIO_I2C1_SDA,
+#ifndef CONFIG_I2C_POLLED
+  .isr        = stm32_i2c1_isr,
+  .ev_irq     = STM32_IRQ_I2C1EV,
+  .er_irq     = STM32_IRQ_I2C1ER
+#endif
+};
+
+struct stm32_i2c_priv_s stm32_i2c1_priv =
+{
+  .config     = &stm32_i2c1_config,
+  .refs       = 0,
+  .intstate   = INTSTATE_IDLE,
+  .msgc       = 0,
+  .msgv       = NULL,
+  .ptr        = NULL,
+  .frequency  = 0,
+  .dcnt       = 0,
+  .flags      = 0,
+  .status     = 0
+};
+#endif
+
+#ifdef CONFIG_STM32F7_I2C2
+static const struct stm32_i2c_config_s stm32_i2c2_config =
+{
+  .base       = STM32_I2C2_BASE,
+  .clk_bit    = RCC_APB1ENR_I2C2EN,
+  .reset_bit  = RCC_APB1RSTR_I2C2RST,
+  .scl_pin    = GPIO_I2C2_SCL,
+  .sda_pin    = GPIO_I2C2_SDA,
+#ifndef CONFIG_I2C_POLLED
+  .isr        = stm32_i2c2_isr,
+  .ev_irq     = STM32_IRQ_I2C2EV,
+  .er_irq     = STM32_IRQ_I2C2ER
+#endif
+};
+
+struct stm32_i2c_priv_s stm32_i2c2_priv =
+{
+  .config     = &stm32_i2c2_config,
+  .refs       = 0,
+  .intstate   = INTSTATE_IDLE,
+  .msgc       = 0,
+  .msgv       = NULL,
+  .ptr        = NULL,
+  .frequency  = 0,
+  .dcnt       = 0,
+  .flags      = 0,
+  .status     = 0
+};
+#endif
+
+#ifdef CONFIG_STM32F7_I2C3
+static const struct stm32_i2c_config_s stm32_i2c3_config =
+{
+  .base       = STM32_I2C3_BASE,
+  .clk_bit    = RCC_APB1ENR_I2C3EN,
+  .reset_bit  = RCC_APB1RSTR_I2C3RST,
+  .scl_pin    = GPIO_I2C3_SCL,
+  .sda_pin    = GPIO_I2C3_SDA,
+#ifndef CONFIG_I2C_POLLED
+  .isr        = stm32_i2c3_isr,
+  .ev_irq     = STM32_IRQ_I2C3EV,
+  .er_irq     = STM32_IRQ_I2C3ER
+#endif
+};
+
+struct stm32_i2c_priv_s stm32_i2c3_priv =
+{
+  .config     = &stm32_i2c3_config,
+  .refs       = 0,
+  .intstate   = INTSTATE_IDLE,
+  .msgc       = 0,
+  .msgv       = NULL,
+  .ptr        = NULL,
+  .frequency  = 0,
+  .dcnt       = 0,
+  .flags      = 0,
+  .status     = 0
+};
+#endif
+
+#ifdef CONFIG_STM32F7_I2C4
+static const struct stm32_i2c_config_s stm32_i2c4_config =
+{
+  .base       = STM32_I2C4_BASE,
+  .clk_bit    = RCC_APB1ENR_I2C4EN,
+  .reset_bit  = RCC_APB1RSTR_I2C4RST,
+  .scl_pin    = GPIO_I2C4_SCL,
+  .sda_pin    = GPIO_I2C4_SDA,
+#ifndef CONFIG_I2C_POLLED
+  .isr        = stm32_i2c4_isr,
+  .ev_irq     = STM32_IRQ_I2C4EV,
+  .er_irq     = STM32_IRQ_I2C4ER
+#endif
+};
+
+struct stm32_i2c_priv_s stm32_i2c4_priv =
+{
+  .config     = &stm32_i2c4_config,
+  .refs       = 0,
+  .intstate   = INTSTATE_IDLE,
+  .msgc       = 0,
+  .msgv       = NULL,
+  .ptr        = NULL,
+  .frequency  = 0,
+  .dcnt       = 0,
+  .flags      = 0,
+  .status     = 0
+};
+#endif
+
+/* Device Structures, Instantiation */
+
+struct i2c_ops_s stm32_i2c_ops =
+{
+  .transfer = stm32_i2c_transfer
+#ifdef CONFIG_I2C_RESET
+  , .reset  = stm32_i2c_reset
+#endif
+};
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_i2c_getreg
+ *
+ * Description:
+ *   Get a 16-bit register value by offset
+ *
+ ************************************************************************************/
+
+static inline uint16_t stm32_i2c_getreg(FAR struct stm32_i2c_priv_s *priv,
+                                        uint8_t offset)
+{
+  return getreg16(priv->config->base + offset);
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_getreg32
+ *
+ * Description:
+ *   Get a 32-bit register value by offset
+ *
+ ************************************************************************************/
+
+static inline uint32_t stm32_i2c_getreg32(FAR struct stm32_i2c_priv_s *priv,
+                                          uint8_t offset)
+{
+  return getreg32(priv->config->base + offset);
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_putreg
+ *
+ * Description:
+ *  Put a 16-bit register value by offset
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_putreg(FAR struct stm32_i2c_priv_s *priv, uint8_t offset,
+                                    uint16_t value)
+{
+  putreg16(value, priv->config->base + offset);
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_putreg32
+ *
+ * Description:
+ *  Put a 32-bit register value by offset
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_putreg32(FAR struct stm32_i2c_priv_s *priv,
+                                      uint8_t offset, uint32_t value)
+{
+  putreg32(value, priv->config->base + offset);
+}
+
+
+/************************************************************************************
+ * Name: stm32_i2c_modifyreg32
+ *
+ * Description:
+ *   Modify a 32-bit register value by offset
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_modifyreg32(FAR struct stm32_i2c_priv_s *priv,
+                                         uint8_t offset, uint32_t clearbits,
+                                         uint32_t setbits)
+{
+  modifyreg32(priv->config->base + offset, clearbits, setbits);
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_sem_wait
+ *
+ * Description:
+ *   Take the exclusive access, waiting as necessary
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_sem_wait(FAR struct i2c_master_s *dev)
+{
+  while (sem_wait(&((struct stm32_i2c_inst_s *)dev)->priv->sem_excl) != 0)
+    {
+      ASSERT(errno == EINTR);
+    }
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_tousecs
+ *
+ * Description:
+ *   Return a micro-second delay based on the number of bytes left to be processed.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32F7_I2C_DYNTIMEO
+static useconds_t stm32_i2c_tousecs(int msgc, FAR struct i2c_msg_s *msgs)
+{
+  size_t bytecount = 0;
+  int i;
+
+  /* Count the number of bytes left to process */
+
+  for (i = 0; i < msgc; i++)
+    {
+      bytecount += msgs[i].length;
+    }
+
+  /* Then return a number of microseconds based on a user provided scaling
+   * factor.
+   */
+
+  return (useconds_t)(CONFIG_STM32F7_I2C_DYNTIMEO_USECPERBYTE * bytecount);
+}
+#endif
+
+/************************************************************************************
+ * Name: stm32_i2c_enableinterrupts
+ *
+ * Description:
+ *   Enable I2C interrupts
+ *
+ ************************************************************************************/
+
+#ifndef CONFIG_I2C_POLLED
+static inline void stm32_i2c_enableinterrupts(struct stm32_i2c_priv_s *priv)
+{
+    stm32_i2c_modifyreg32(priv, STM32_I2C_CR1_OFFSET, 0, (I2C_CR1_TXRX | I2C_CR1_NACKIE));
+}
+#endif
+
+/************************************************************************************
+ * Name: stm32_i2c_sem_waitdone
+ *
+ * Description:
+ *   Wait for a transfer to complete
+ *
+ * There are two versions of this function.  The first is included when using
+ * interrupts while the second is used if polling (CONFIG_I2C_POLLED=y).
+ *
+ ************************************************************************************/
+
+#ifndef CONFIG_I2C_POLLED
+static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
+{
+  struct timespec abstime;
+  irqstate_t flags;
+  int ret;
+
+  flags = enter_critical_section();
+
+  /* Enable I2C interrupts */
+
+  /* The TXIE and RXIE interrupts are enabled initially in stm32_i2c_process.
+   * The remainder of the interrupts, including error-related, are enabled here.
+   */
+
+  stm32_i2c_modifyreg32(priv, STM32_I2C_CR1_OFFSET, 0,
+                        (I2C_CR1_ALLINTS & ~I2C_CR1_TXRX));
+
+  /* Signal the interrupt handler that we are waiting */
+
+  priv->intstate = INTSTATE_WAITING;
+  do
+    {
+      /* Get the current time */
+
+      (void)clock_gettime(CLOCK_REALTIME, &abstime);
+
+      /* Calculate a time in the future */
+
+#if CONFIG_STM32F7_I2CTIMEOSEC > 0
+      abstime.tv_sec += CONFIG_STM32F7_I2CTIMEOSEC;
+#endif
+
+      /* Add a value proportional to the number of bytes in the transfer */
+
+#ifdef CONFIG_STM32F7_I2C_DYNTIMEO
+      abstime.tv_nsec += 1000 * stm32_i2c_tousecs(priv->msgc, priv->msgv);
+      if (abstime.tv_nsec >= 1000 * 1000 * 1000)
+        {
+          abstime.tv_sec++;
+          abstime.tv_nsec -= 1000 * 1000 * 1000;
+        }
+
+#elif CONFIG_STM32F7_I2CTIMEOMS > 0
+      abstime.tv_nsec += CONFIG_STM32F7_I2CTIMEOMS * 1000 * 1000;
+      if (abstime.tv_nsec >= 1000 * 1000 * 1000)
+        {
+          abstime.tv_sec++;
+          abstime.tv_nsec -= 1000 * 1000 * 1000;
+        }
+#endif
+      /* Wait until either the transfer is complete or the timeout expires */
+
+      ret = sem_timedwait(&priv->sem_isr, &abstime);
+      if (ret != OK && errno != EINTR)
+        {
+          /* Break out of the loop on irrecoverable errors.  This would
+           * include timeouts and mystery errors reported by sem_timedwait.
+           * NOTE that we try again if we are awakened by a signal (EINTR).
+           */
+
+          break;
+        }
+    }
+
+  /* Loop until the interrupt level transfer is complete. */
+
+  while (priv->intstate != INTSTATE_DONE);
+
+  /* Set the interrupt state back to IDLE */
+
+  priv->intstate = INTSTATE_IDLE;
+
+  /* Disable I2C interrupts */
+
+  stm32_i2c_modifyreg32(priv, STM32_I2C_CR1_OFFSET, I2C_CR1_ALLINTS, 0);
+
+  leave_critical_section(flags);
+  return ret;
+}
+#else
+static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
+{
+  uint32_t timeout;
+  uint32_t start;
+  uint32_t elapsed;
+  int ret;
+
+  /* Get the timeout value */
+
+#ifdef CONFIG_STM32F7_I2C_DYNTIMEO
+  timeout = USEC2TICK(stm32_i2c_tousecs(priv->msgc, priv->msgv));
+#else
+  timeout = CONFIG_STM32F7_I2CTIMEOTICKS;
+#endif
+
+  /* Signal the interrupt handler that we are waiting.  NOTE:  Interrupts
+   * are currently disabled but will be temporarily re-enabled below when
+   * sem_timedwait() sleeps.
+   */
+
+  priv->intstate = INTSTATE_WAITING;
+  start = clock_systimer();
+
+  do
+    {
+      /* Poll by simply calling the timer interrupt handler until it
+       * reports that it is done.
+       */
+
+      stm32_i2c_isr(priv);
+
+      /* Calculate the elapsed time */
+
+      elapsed = clock_systimer() - start;
+    }
+
+  /* Loop until the transfer is complete. */
+
+  while (priv->intstate != INTSTATE_DONE && elapsed < timeout);
+
+  i2cinfo("intstate: %d elapsed: %d threshold: %d status: 0x%08x\n",
+          priv->intstate, elapsed, timeout, priv->status);
+
+  /* Set the interrupt state back to IDLE */
+
+  ret = priv->intstate == INTSTATE_DONE ? OK : -ETIMEDOUT;
+  priv->intstate = INTSTATE_IDLE;
+  return ret;
+}
+#endif
+
+/************************************************************************************
+ * Name: stm32_i2c_set_7bit_address
+ *
+ * Description:
+ *
+ ************************************************************************************/
+
+static inline void
+stm32_i2c_set_7bit_address(FAR struct stm32_i2c_priv_s *priv)
+{
+  stm32_i2c_modifyreg32(priv, STM32_I2C_CR2_OFFSET, I2C_CR2_SADD7_MASK,
+                        ((priv->msgv->addr & 0x7F) << I2C_CR2_SADD7_SHIFT));
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_set_bytes_to_transfer
+ *
+ * Description:
+ *
+ ************************************************************************************/
+
+static inline void
+stm32_i2c_set_bytes_to_transfer(FAR struct stm32_i2c_priv_s *priv,
+                               uint8_t n_bytes)
+{
+  stm32_i2c_modifyreg32(priv, STM32_I2C_CR2_OFFSET, I2C_CR2_NBYTES_MASK,
+                        (n_bytes << I2C_CR2_NBYTES_SHIFT));
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_set_write_transfer_dir
+ *
+ * Description:
+ *
+ ************************************************************************************/
+
+static inline void
+stm32_i2c_set_write_transfer_dir(FAR struct stm32_i2c_priv_s *priv)
+{
+  stm32_i2c_modifyreg32(priv, STM32_I2C_CR2_OFFSET, I2C_CR2_RD_WRN, 0);
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_set_read_transfer_dir
+ *
+ * Description:
+ *
+ ************************************************************************************/
+
+static inline void
+stm32_i2c_set_read_transfer_dir(FAR struct stm32_i2c_priv_s *priv)
+{
+  stm32_i2c_modifyreg32(priv, STM32_I2C_CR2_OFFSET, 0, I2C_CR2_RD_WRN);
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_enable_reload
+ *
+ * Description:
+ *
+ ************************************************************************************/
+
+static inline void
+stm32_i2c_enable_reload(FAR struct stm32_i2c_priv_s *priv)
+{
+  stm32_i2c_modifyreg32(priv, STM32_I2C_CR2_OFFSET, 0, I2C_CR2_RELOAD);
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_disable_reload
+ *
+ * Description:
+ *
+ ************************************************************************************/
+
+static inline void
+stm32_i2c_disable_reload(FAR struct stm32_i2c_priv_s *priv)
+{
+  stm32_i2c_modifyreg32(priv, STM32_I2C_CR2_OFFSET, I2C_CR2_RELOAD, 0);
+}
+
+
+/************************************************************************************
+ * Name: stm32_i2c_sem_waitstop
+ *
+ * Description:
+ *   Wait for a STOP to complete
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv)
+{
+  uint32_t start;
+  uint32_t elapsed;
+  uint32_t timeout;
+  uint32_t cr;
+  uint32_t sr;
+
+  /* Select a timeout */
+
+#ifdef CONFIG_STM32F7_I2C_DYNTIMEO
+  timeout = USEC2TICK(CONFIG_STM32F7_I2C_DYNTIMEO_STARTSTOP);
+#else
+  timeout = CONFIG_STM32F7_I2CTIMEOTICKS;
+#endif
+
+  /* Wait as stop might still be in progress */
+
+  start = clock_systimer();
+  do
+    {
+      /* Check for STOP condition */
+
+      cr = stm32_i2c_getreg32(priv, STM32_I2C_CR2_OFFSET);
+      if ((cr & I2C_CR2_STOP) == 0)
+        {
+          return;
+        }
+
+      /* Check for timeout error */
+
+      sr = stm32_i2c_getreg(priv, STM32_I2C_ISR_OFFSET);
+      if ((sr & I2C_INT_TIMEOUT) != 0)
+        {
+          return;
+        }
+
+      /* Calculate the elapsed time */
+
+      elapsed = clock_systimer() - start;
+    }
+
+  /* Loop until the stop is complete or a timeout occurs. */
+
+  while (elapsed < timeout);
+
+  /* If we get here then a timeout occurred with the STOP condition
+   * still pending.
+   */
+
+  i2cinfo("Timeout with CR: %04x SR: %04x\n", cr, sr);
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_sem_post
+ *
+ * Description:
+ *   Release the mutual exclusion semaphore
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_sem_post(FAR struct i2c_master_s *dev)
+{
+  sem_post(&((struct stm32_i2c_inst_s *)dev)->priv->sem_excl);
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_sem_init
+ *
+ * Description:
+ *   Initialize semaphores
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_sem_init(FAR struct i2c_master_s *dev)
+{
+  sem_init(&((struct stm32_i2c_inst_s *)dev)->priv->sem_excl, 0, 1);
+
+#ifndef CONFIG_I2C_POLLED
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_init(&((struct stm32_i2c_inst_s *)dev)->priv->sem_isr, 0, 0);
+  sem_setprotocol(&((struct stm32_i2c_inst_s *)dev)->priv->sem_isr, SEM_PRIO_NONE);
+#endif
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_sem_destroy
+ *
+ * Description:
+ *   Destroy semaphores.
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_sem_destroy(FAR struct i2c_master_s *dev)
+{
+  sem_destroy(&((struct stm32_i2c_inst_s *)dev)->priv->sem_excl);
+#ifndef CONFIG_I2C_POLLED
+  sem_destroy(&((struct stm32_i2c_inst_s *)dev)->priv->sem_isr);
+#endif
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_trace*
+ *
+ * Description:
+ *   I2C trace instrumentation
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_I2C_TRACE
+static void stm32_i2c_traceclear(FAR struct stm32_i2c_priv_s *priv)
+{
+  struct stm32_trace_s *trace = &priv->trace[priv->tndx];
+
+  trace->status = 0;              /* I2C 32-bit status */
+  trace->count  = 0;              /* Interrupt count when status change */
+  trace->event  = I2CEVENT_NONE;  /* Last event that occurred with this status */
+  trace->parm   = 0;              /* Parameter associated with the event */
+  trace->time   = 0;              /* Time of first status or event */
+}
+
+static void stm32_i2c_tracereset(FAR struct stm32_i2c_priv_s *priv)
+{
+  /* Reset the trace info for a new data collection */
+
+  priv->tndx       = 0;
+  priv->start_time = clock_systimer();
+  stm32_i2c_traceclear(priv);
+}
+
+static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv,
+                               uint32_t status)
+{
+  struct stm32_trace_s *trace = &priv->trace[priv->tndx];
+
+  /* Is the current entry uninitialized?   Has the status changed? */
+
+  if (trace->count == 0 || status != trace->status)
+    {
+      /* Yes.. Was it the status changed?  */
+
+      if (trace->count != 0)
+        {
+          /* Yes.. bump up the trace index (unless we are out of trace entries) */
+
+          if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
+            {
+              i2cerr("ERROR: Trace table overflow\n");
+              return;
+            }
+
+          priv->tndx++;
+          trace = &priv->trace[priv->tndx];
+        }
+
+      /* Initialize the new trace entry */
+
+      stm32_i2c_traceclear(priv);
+      trace->status = status;
+      trace->count  = 1;
+      trace->time   = clock_systimer();
+    }
+  else
+    {
+      /* Just increment the count of times that we have seen this status */
+
+      trace->count++;
+    }
+}
+
+static void stm32_i2c_traceevent(FAR struct stm32_i2c_priv_s *priv,
+                                enum stm32_trace_e event, uint32_t parm)
+{
+  struct stm32_trace_s *trace;
+
+  if (event != I2CEVENT_NONE)
+    {
+      trace = &priv->trace[priv->tndx];
+
+      /* Initialize the new trace entry */
+
+      trace->event  = event;
+      trace->parm   = parm;
+
+      /* Bump up the trace index (unless we are out of trace entries) */
+
+      if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
+        {
+          i2cerr("ERROR: Trace table overflow\n");
+          return;
+        }
+
+      priv->tndx++;
+      stm32_i2c_traceclear(priv);
+    }
+}
+
+static void stm32_i2c_tracedump(FAR struct stm32_i2c_priv_s *priv)
+{
+  struct stm32_trace_s *trace;
+  int i;
+
+  syslog(LOG_DEBUG, "Elapsed time: %d\n",
+         clock_systimer() - priv->start_time);
+
+  for (i = 0; i <= priv->tndx; i++)
+    {
+      trace = &priv->trace[i];
+      syslog(LOG_DEBUG,
+             "%2d. STATUS: %08x COUNT: %3d EVENT: %2d PARM: %08x TIME: %d\n",
+             i+1, trace->status, trace->count,  trace->event, trace->parm,
+             trace->time - priv->start_time);
+    }
+}
+#endif /* CONFIG_I2C_TRACE */
+
+/************************************************************************************
+ * Name: stm32_i2c_setclock
+ *
+ * Description:
+ *
+ *   Sets the I2C bus clock frequency by configuring the I2C_TIMINGR register.
+ *
+ *   This function supports bus clock frequencies of:
+ *
+ *      1000Khz (Fast Mode+)
+ *      400Khz  (Fast Mode)
+ *      100Khz  (Standard Mode)
+ *      10Khz   (Standard Mode)
+ *
+ *   Attempts to set a different frequency will quietly provision the default
+ *   of 10Khz.
+ *
+ *   The only differences between the various modes of operation (std, fast,
+ *   fast+) are the bus clock speed and setup/hold times.  Setup/hold times are
+ *   specified as a MINIMUM time for the given mode, and naturally std mode
+ *   has the longest minimum times.  As a result, by provisioning setup/hold
+ *   times for std mode they are also compatible with fast/fast+, though some
+ *   performance degradation occurs in fast/fast+ as a result of the times
+ *   being somewhat longer than strictly required.  The values remain as they
+ *   are because reliability is favored over performance.
+ *
+ * Clock Selection:
+ *
+ *   The I2C peripheral clock can be provided by either PCLK1, SYSCLK or the HSI.
+ *
+ *    PCLK1 >------|\   I2CCLK
+ *   SYSCLK >------| |--------->
+ *      HSI >------|/
+ *
+ *   HSI is the default and is always 16Mhz.
+ *
+ *   SYSCLK can, in turn, be derived from the HSI, HSE, PPLCLK.
+ *
+ *      HSI >------|\
+ *                 | |  SYSCLK
+ *      PLL >------| |--------->
+ *                 | |
+ *      HSE >------|/
+ *
+ *
+ * References:
+ *
+ *  App Note AN4235 and the associated software STSW-STM32126.
+ *
+ ************************************************************************************/
+
+static void stm32_i2c_setclock(FAR struct stm32_i2c_priv_s *priv, uint32_t frequency)
+{
+  uint32_t pe;
+  uint8_t presc;
+  uint8_t scl_delay;
+  uint8_t sda_delay;
+  uint8_t scl_h_period;
+  uint8_t scl_l_period;
+
+  if (frequency != priv->frequency)
+    {
+      /* I2C peripheral must be disabled to update clocking configuration */
+
+      pe = (stm32_i2c_getreg32(priv, STM32_I2C_CR1_OFFSET) & I2C_CR1_PE);
+      if (pe)
+        {
+          stm32_i2c_modifyreg32(priv, STM32_I2C_CR1_OFFSET, I2C_CR1_PE, 0);
+        }
+
+      /*  The Sppeed and timing calculation are based on the following
+       *  fI2CCLK = HSI and is 16Mhz
+       *  Analog filter is on,
+       *  Digital filter off
+       *  Rise Time is 120 ns and fall is 10ns
+       *  Mode is FastMode
+       */
+
+        if (frequency == 100000)
+          {
+            presc        = 0;
+            scl_delay    = 5;
+            sda_delay    = 0;
+            scl_h_period = 61;
+            scl_l_period = 89;
+
+          }
+        else if (frequency == 400000)
+           {
+             presc        = 0;
+             scl_delay    = 3;
+             sda_delay    = 0;
+             scl_h_period = 6;
+             scl_l_period = 24;
+           }
+         else if (frequency == 1000000)
+            {
+              presc        = 0;
+              scl_delay    = 2;
+              sda_delay    = 0;
+              scl_h_period = 1;
+              scl_l_period = 5;
+            }
+        else
+          {
+            presc        = 7;
+            scl_delay    = 0;
+            sda_delay    = 0;
+            scl_h_period = 35;
+            scl_l_period = 162;
+          }
+
+      uint32_t timingr =
+        (presc << I2C_TIMINGR_PRESC_SHIFT) |
+        (scl_delay << I2C_TIMINGR_SCLDEL_SHIFT) |
+        (sda_delay << I2C_TIMINGR_SDADEL_SHIFT) |
+        (scl_h_period << I2C_TIMINGR_SCLH_SHIFT) |
+        (scl_l_period << I2C_TIMINGR_SCLL_SHIFT);
+
+      stm32_i2c_putreg32(priv, STM32_I2C_TIMINGR_OFFSET, timingr);
+
+      if (pe)
+        {
+          stm32_i2c_modifyreg32(priv, STM32_I2C_CR1_OFFSET, 0, I2C_CR1_PE);
+        }
+
+      priv->frequency = frequency;
+    }
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_sendstart
+ *
+ * Description:
+ *   Send the START condition / force Master mode
+ *
+ *   A START condition in I2C consists of a single byte that contains both the
+ *   7 bit slave address and a read/write bit (0 = WRITE, 1 = READ).  If the
+ *   address is recognized by one of the slave devices that slave device will
+ *   ACK the byte so that data transfers can begin.
+ *
+ *   A RESTART (or repeated START per the I2CSPEC) is simply a START condition
+ *   issued in the middle of a transfer (i.e. after the initial START and before
+ *   a STOP).  A RESTART sends a new address byte and R/W bit to the bus. A
+ *   RESTART is optional in most cases but mandatory in the event the transfer
+ *   direction is changed.
+ *
+ *   Most of the time reading data from an I2C slave requires a WRITE of the
+ *   subaddress followed by a READ (and hence a RESTART in between).  Writing
+ *   to an I2C slave typically requires only WRITE operations and hence no
+ *   RESTARTs.
+ *
+ *   This function is therefore called both at the beginning of a transfer
+ *   (START) and at appropriate times during a transfer (RESTART).
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_sendstart(FAR struct stm32_i2c_priv_s *priv)
+{
+  /* Flag the first byte as an address byte */
+
+  priv->astart = true;
+
+  /* Set the private "current message" data used in protocol processing.
+   *
+   * ptr:   A pointer to the start of the current message buffer.  This is
+   *        advanced after each byte in the current message is transferred.
+   *
+   * dcnt:  A running counter of the bytes in the current message waiting to be
+   *        transferred.  This is decremented each time a byte is transferred.
+   *        The hardware normally accepts a maximum of 255 bytes per transfer
+   *        but can support more via the RELOAD mechanism.  If dcnt initially
+   *        exceeds 255, the RELOAD mechanism will be enabled automatically.
+   *
+   * flags: Used to characterize handling of the current message.
+   *
+   *  The default flags value is 0 which specifies:
+   *
+   *   - A transfer direction of WRITE (R/W bit = 0)
+   *   - RESTARTs between all messages
+   *
+   *  The following flags can be used to override this behavior as follows:
+   *
+   *   - I2C_M_READ: Sets the transfer direction to READ (R/W bit = 1)
+   *   - I2C_M_NORESTART: Prevents a RESTART from being issued prior to the
+   *      transfer of the message (where allowed by the protocol).
+   *
+   */
+
+  priv->ptr   = priv->msgv->buffer;
+  priv->dcnt  = priv->msgv->length;
+  priv->flags = priv->msgv->flags;
+
+  /* Enabling RELOAD allows the transfer of:
+   *
+   *  - individual messages with a payload exceeding 255 bytes
+   *  - multiple messages back to back without a RESTART in between
+   *
+   * so we enable it if either of those conditions exist and disable
+   * it otherwise.
+   */
+
+  if ((priv->flags & I2C_M_NORESTART) || priv->dcnt > 255)
+    {
+      i2cinfo("RELOAD enabled: dcnt = %i msgc = %i\n",
+          priv->dcnt, priv->msgc);
+      stm32_i2c_enable_reload(priv);
+    }
+  else
+    {
+      i2cinfo("RELOAD disable: dcnt = %i msgc = %i\n",
+          priv->dcnt, priv->msgc);
+      stm32_i2c_disable_reload(priv);
+    }
+
+  /* Set the number of bytes to transfer (I2C_CR2->NBYTES) to the number of
+   * bytes in the current message or 255, whichever is lower so as to not
+   * exceed the hardware maximum allowed.
+   */
+
+  if (priv->dcnt > 255)
+    {
+      stm32_i2c_set_bytes_to_transfer(priv, 255);
+    }
+  else
+    {
+      stm32_i2c_set_bytes_to_transfer(priv, priv->dcnt);
+    }
+
+  /* Set the (7 bit) address.
+   * 10 bit addressing is not yet supported.
+   */
+
+  stm32_i2c_set_7bit_address(priv);
+
+  /* The flag of the current message is used to determine the direction of
+   * transfer required for the current message.
+   */
+
+  if (priv->flags & I2C_M_READ)
+    {
+      stm32_i2c_set_read_transfer_dir(priv);
+    }
+  else
+    {
+      stm32_i2c_set_write_transfer_dir(priv);
+    }
+
+  /* Set the I2C_CR2->START bit to 1 to instruct the hardware to send the
+   * START condition using the address and transfer direction data entered.
+   */
+
+  i2cinfo("Sending START: dcnt=%i msgc=%i flags=0x%04x\n",
+          priv->dcnt, priv->msgc, priv->flags);
+
+  stm32_i2c_modifyreg32(priv, STM32_I2C_CR2_OFFSET, 0, I2C_CR2_START);
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_sendstop
+ *
+ * Description:
+ *   Send the STOP conditions
+ *
+ *   A STOP condition can be requested by setting the STOP bit in the I2C_CR2
+ *   register. Setting the STOP bit clears the TC flag and the STOP condition is
+ *   sent on the bus.
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_sendstop(FAR struct stm32_i2c_priv_s *priv)
+{
+  i2cinfo("Sending STOP\n");
+  stm32_i2c_traceevent(priv, I2CEVENT_WRITE_STOP, 0);
+
+  stm32_i2c_modifyreg32(priv, STM32_I2C_CR2_OFFSET, 0, I2C_CR2_STOP);
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_getstatus
+ *
+ * Description:
+ *   Get 32-bit status (SR1 and SR2 combined)
+ *
+ ************************************************************************************/
+
+static inline uint32_t stm32_i2c_getstatus(FAR struct stm32_i2c_priv_s *priv)
+{
+  return getreg32(priv->config->base + STM32_I2C_ISR_OFFSET);
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_clearinterrupts
+ *
+ * Description:
+ *  Clear all interrupts
+ *
+ ************************************************************************************/
+
+static inline void stm32_i2c_clearinterrupts(struct stm32_i2c_priv_s *priv)
+{
+  stm32_i2c_modifyreg32(priv, STM32_I2C_ICR_OFFSET, 0, I2C_ICR_CLEARMASK);
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_isr
+ *
+ * Description:
+ *  Common interrupt service routine (ISR) that handles I2C protocol logic.
+ *  This is instantiated for each configured I2C interface (I2C1, I2C2, I2C3).
+ *
+ *  This ISR is activated and deactivated by:
+ *
+ *   stm32_i2c_process
+ *    and
+ *   stm32_i2c_waitdone
+ *
+ * Input Parameters:
+ *   priv - The private struct of the I2C driver.
+ *
+ ************************************************************************************/
+
+static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
+{
+  uint32_t status;
+
+  /* Get state of the I2C controller */
+
+  status = stm32_i2c_getreg32(priv, STM32_I2C_ISR_OFFSET);
+
+  i2cinfo("ENTER: status = 0x%08x\n", status);
+
+  /* Update private version of the state */
+
+  priv->status = status;
+
+  /* If this is a new transmission set up the trace table accordingly */
+
+  stm32_i2c_tracenew(priv, status);
+  stm32_i2c_traceevent(priv, I2CEVENT_ISR_CALL, 0);
+
+  /* --------------------- Start of I2C protocol handling -------------------- */
+
+  /* I2C protocol logic follows. It's organized in an if else chain such that
+   * only one mode of operation is executed every time the ISR is called.
+   *
+   * If you need to add additional states to support new features be sure they
+   * continue the chain (i.e. begin with "else if") and are placed before the
+   * empty call / error states at the end of the chain.
+   */
+
+  /* NACK Handling
+   *
+   * This branch is only triggered when the NACK (Not Acknowledge Received)
+   * interrupt occurs.  This interrupt will only fire when the I2C_CR1->NACKIE
+   * bit is 1.
+   *
+   * I2C_ISR->NACKF is set by hardware when a NACK is received after a byte
+   * is transmitted and the slave fails to acknowledge it.  This is the
+   * opposite of, and mutually exclusive to, the I2C_ISR->TXIS event.
+   *
+   * In response to the NACK the hardware automatically triggers generation
+   * of a STOP condition, terminating the transfer.  The only valid response
+   * to this state is to exit the ISR and report the failure.
+   *
+   * To differentiate an "address NACK" from a NACK that might occur during
+   * the transfer of other bytes the "priv->astart" parameter is
+   * used.  This flag is set to TRUE in sendstart() and set to FALSE when
+   * the first TXIS event is received, which would be after the first byte
+   * (the address) is transmitted successfully (acknowledged).
+   */
+
+  if (status & I2C_INT_NACK)
+    {
+
+      if (priv->astart == true)
+        {
+
+          /* NACK received on first (address) byte: address is invalid */
+
+          i2cinfo("NACK: Address invalid: dcnt=%i msgc=%i status=0x%08x\n",
+          priv->dcnt, priv->msgc, status);
+          stm32_i2c_traceevent(priv, I2CEVENT_ADDRESS_NACKED, priv->msgv->addr);
+        }
+      else
+        {
+          /* NACK received on regular byte */
+
+          i2cinfo("NACK: NACK received: dcnt=%i msgc=%i status=0x%08x\n",
+          priv->dcnt, priv->msgc, status);
+          stm32_i2c_traceevent(priv, I2CEVENT_ADDRESS_NACKED, priv->msgv->addr);
+        }
+
+      /* Set flags to terminate message transmission:
+       *
+       *   set message length to -1 to indicate last byte of message sent
+       *   set message count to 0 to indicate no more messages to send
+       *
+       * As we fall through the logic in the ISR the message handling block
+       * will be triggered by these flags and signal the ISR to terminate.
+       */
+
+      priv->dcnt = -1;
+      priv->msgc = 0;
+    }
+
+  /* Transmit Interrupt Status (TXIS) Handler
+   *
+   * This branch is only triggered when the TXIS interrupt occurs.  This
+   * interrupt will only fire when the I2C_CR1->TXIE bit is 1.
+   *
+   * This indicates the transmit data register I2C_TXDR has been emptied
+   * following the successful transmission of a byte and slave acknowledgement.
+   * In this state the I2C_TXDR register is ready to accept another byte for
+   * transmission.  The TXIS bit will be cleared automatically when the next
+   * byte is written to I2C_TXDR.
+   *
+   * The number of TXIS events during the transfer corresponds to NBYTES.
+   *
+   * The TXIS flag is not set when a NACK is received.
+   *
+   * When RELOAD is disabled (RELOAD=0) and NBYTES data have been transferred:
+   *
+   *   - In Automatic End Mode (AUTOEND=1), a STOP is automatically sent.
+   *
+   *     Note:  Automatic End Mode is not currently supported.
+   *
+   *   - In Software End Mode (AUTOEND=0), the TC event occurs and the SCL
+   *     line is stretched low in order to allow software actions (STOP,
+   *     RESTART).
+   *
+   * When RELOAD is enabled (RELOAD=1) and NBYTES bytes have been transferred
+   * a TCR event occurs instead and that handler simply updates NBYTES which
+   * causes TXIS events to continue.  The process repeats until all bytes in
+   * the message have been transferred.
+   */
+
+  else if ((priv->flags & (I2C_M_READ)) == 0 && (status & (I2C_ISR_TXIS)) != 0)
+    {
+
+      /* TXIS interrupt occurred, address valid, ready to transmit */
+
+      stm32_i2c_traceevent(priv, I2CEVENT_WRITE, 0);
+      i2cinfo("TXIS: ENTER dcnt = %i msgc = %i status 0x%08x\n",
+              priv->dcnt, priv->msgc, status);
+
+      /* The first event after the address byte is sent will be either TXIS
+       * or NACKF so it's safe to set the astart flag to false on
+       * the first TXIS event to indicate that it is no longer necessary to
+       * check for address validity.
+       */
+
+      if (priv->astart == true)
+        {
+          i2cinfo("TXIS: Address Valid\n");
+          stm32_i2c_traceevent(priv, I2CEVENT_ADDRESS_ACKED, priv->msgv->addr);
+          priv->astart = false;
+        }
+
+      /* If one or more bytes in the current message are ready to transmit */
+
+      if (priv->dcnt > 0)
+        {
+          /* Prepare to transmit the current byte */
+
+          stm32_i2c_traceevent(priv, I2CEVENT_WRITE_TO_DR, priv->dcnt);
+          i2cinfo("TXIS: Write Data 0x%02x\n", *priv->ptr);
+
+          /* Decrement byte counter */
+
+          priv->dcnt--;
+
+          /* If we are about to transmit the last byte in the current message */
+
+          if (priv->dcnt == 0)
+            {
+              /* If this is also the last message to send, disable RELOAD so
+               * TC fires next and issues STOP condition.  If we don't do this
+               * TCR will fire next, and since there are no bytes to send we
+               * can't write NBYTES to clear TCR so it will fire forever.
+               */
+
+              if ((priv->msgc - 1) == 0)
+                {
+                  stm32_i2c_disable_reload(priv);
+                }
+            }
+
+          /* Transmit current byte */
+
+          stm32_i2c_putreg(priv, STM32_I2C_TXDR_OFFSET, *priv->ptr);
+
+          /* Advance to next byte */
+
+          priv->ptr++;
+        }
+      else
+        {
+          /* Unsupported state */
+
+          i2cerr("ERROR: TXIS Unsupported state detected, dcnt=%i, status 0x%08x\n",
+          priv->dcnt, status);
+          stm32_i2c_traceevent(priv, I2CEVENT_WRITE_ERROR, 0);
+        }
+
+      i2cinfo("TXIS: EXIT  dcnt = %i msgc = %i status 0x%08x\n",
+              priv->dcnt, priv->msgc, status);
+    }
+
+  /* Receive Buffer Not Empty (RXNE) State Handler
+   *
+   * This branch is only triggered when the RXNE interrupt occurs.  This
+   * interrupt will only fire when the I2C_CR1->RXIE bit is 1.
+   *
+   * This indicates data has been received from the bus and is waiting to
+   * be read from the I2C_RXDR register.  When I2C_RXDR is read this bit
+   * is automatically cleared and then an ACK or NACK is sent depending on
+   * whether we have more bytes to receive.
+   *
+   * When RELOAD is disabled and bytes remain to be transferred an acknowledge
+   * is automatically sent on the bus and the RXNE events continue until the
+   * last byte is received.
+   *
+   * When RELOAD is disabled (RELOAD=0) and BYTES have been transferred:
+   *
+   *   - In Automatic End Mode (AUTOEND=1), a NACK and a STOP are automatically
+   *     sent after the last received byte.
+   *
+   *     Note:  Automatic End Mode is not currently supported.
+   *
+   *   - In Software End Mode (AUTOEND=0), a NACK is automatically sent after
+   *     the last received byte, the TC event occurs and the SCL line is
+   *     stretched low in order to allow software actions (STOP, RESTART).
+   *
+   * When RELOAD is enabled (RELOAD=1) and NBYTES bytes have been transferred
+   * a TCR event occurs and that handler simply updates NBYTES which causes
+   * RXNE events to continue until all bytes have been transferred.
+   */
+
+  else if ((priv->flags & (I2C_M_READ)) != 0 && (status & I2C_ISR_RXNE) != 0)
+    {
+      /* When read flag is set and the receive buffer is not empty
+       * (RXNE is set) then the driver can read from the data register.
+       */
+
+      stm32_i2c_traceevent(priv, I2CEVENT_READ, 0);
+      i2cinfo("RXNE: ENTER dcnt = %i msgc = %i status 0x%08x\n",
+              priv->dcnt, priv->msgc, status);
+
+      /* If more bytes in the current message */
+
+      if (priv->dcnt > 0)
+        {
+          stm32_i2c_traceevent(priv, I2CEVENT_RCVBYTE, priv->dcnt);
+
+          /* No interrupts or context switches may occur in the following
+           * sequence.  Otherwise, additional bytes may be received.
+           */
+
+#ifdef CONFIG_I2C_POLLED
+          irqstate_t state = enter_critical_section();
+#endif
+          /* Receive a byte */
+
+          *priv->ptr = stm32_i2c_getreg(priv, STM32_I2C_RXDR_OFFSET);
+
+          i2cinfo("RXNE: Read Data 0x%02x\n", *priv->ptr);
+
+          /* Advance buffer to the next byte in the message */
+
+          priv->ptr++;
+
+          /* Signal byte received */
+
+          priv->dcnt--;
+
+#ifdef CONFIG_I2C_POLLED
+          leave_critical_section(state);
+#endif
+        }
+      else
+        {
+          /* Unsupported state */
+
+          stm32_i2c_traceevent(priv, I2CEVENT_READ_ERROR, 0);
+          status = stm32_i2c_getreg(priv, STM32_I2C_ISR_OFFSET);
+          i2cerr("ERROR: RXNE Unsupported state detected, dcnt=%i, status 0x%08x\n",
+                 priv->dcnt, status);
+
+          /* Set signals that will terminate ISR and wake waiting thread */
+
+          priv->dcnt = -1;
+          priv->msgc = 0;
+        }
+
+      i2cinfo("RXNE: EXIT  dcnt = %i msgc = %i status 0x%08x\n",
+              priv->dcnt, priv->msgc, status);
+    }
+
+  /* Transfer Complete (TC) State Handler
+   *
+   * This branch is only triggered when the TC interrupt occurs.  This
+   * interrupt will only fire when:
+   *
+   * I2C_CR1->TCIE = 1 (Transfer Complete Interrupts Enabled)
+   * I2C_CR2->RELOAD = 0 (Reload Mode Disabled)
+   * I2C_CR2->AUTOEND = 0 (Autoend Mode Disabled, i.e. Software End Mode)
+   *
+   * This event indicates that the number of bytes initially defined
+   * in NBYTES, meaning, the number of bytes in the current message (priv->dcnt)
+   * has been successfully transmitted or received.
+   *
+   * When the TC interrupt occurs we have two choices to clear it and move
+   * on, regardless of the transfer direction:
+   *
+   *    - if more messages follow, perform a repeated START if required
+   *      and then fall through to transmit or receive the next message.
+   *
+   *    - if no messages follow, perform a STOP and set flags needed to
+   *      exit the ISR.
+   *
+   * The fact that the hardware must either RESTART or STOP when a TC
+   * event occurs explains why, when messages must be sent back to back
+   * (i.e. without a restart by specifying the I2C_M_NORESTART flag),
+   * RELOAD mode must be enabled and TCR event(s) must be generated
+   * instead.  See the TCR handler for more.
+   */
+
+  else if ((status & I2C_ISR_TC) != 0)
+    {
+      i2cinfo("TC: ENTER dcnt = %i msgc = %i status 0x%08x\n",
+              priv->dcnt, priv->msgc, status);
+
+      /* Prior message has been sent successfully */
+
+      priv->msgc--;
+
+      /* if additional messages remain to be transmitted / received */
+
+      if (priv->msgc > 0)
+        {
+          i2cinfo("TC: RESTART: dcnt=%i, msgc=%i\n",
+          priv->dcnt, priv->msgc);
+          stm32_i2c_traceevent(priv, I2CEVENT_TC_NO_RESTART, priv->msgc);
+
+          /* Issue a START condition.
+           *
+           * Note that the first thing sendstart does is update the
+           * private structure "current message" data (ptr, dcnt, flags)
+           * so they all reflect the next message in the list so we
+           * update msgv before we get there.
+           */
+
+          /* Advance to the next message in the list */
+
+          priv->msgv++;
+
+          stm32_i2c_sendstart(priv);
+
+        }
+      else
+        {
+          /* Issue a STOP conditions.
+           *
+           * No additional messages to transmit / receive, so the
+           * transfer is indeed complete.  Nothing else to do but
+           * issue a STOP and exit.
+           */
+
+          i2cinfo("TC: STOP: dcnt=%i msgc=%i\n",
+          priv->dcnt, priv->msgc);
+          stm32_i2c_traceevent(priv, I2CEVENT_STOP, priv->dcnt);
+
+          stm32_i2c_sendstop(priv);
+
+          /* Set signals that will terminate ISR and wake waiting thread */
+
+          priv->dcnt = -1;
+          priv->msgc = 0;
+        }
+
+      i2cinfo("TC: EXIT dcnt = %i msgc = %i status 0x%08x\n",
+      priv->dcnt, priv->msgc, status);
+    }
+
+  /* Transfer Complete (Reload) State Handler
+   *
+   * This branch is only triggered when the TCR interrupt occurs.  This
+   * interrupt will only fire when:
+   *
+   *  I2C_CR1->TCIE = 1 (Transfer Complete Interrupts Enabled)
+   *  I2C_CR2->RELOAD = 1 (Reload Mode Active)
+   *  I2C_CR2->AUTOEND = 0 (Autoend Mode Disabled, i.e. Software End Mode)
+   *
+   * This is similar to the TC event except that TCR assumes that additional
+   * bytes are available to transfer.  So despite what its name might imply
+   * the transfer really isn't complete.
+   *
+   * There are two reasons RELOAD would be enabled:
+   *
+   *  1) We're trying to send a message with a payload greater than 255 bytes.
+   *  2) We're trying to send messages back to back, regardless of their
+   *     payload size, to avoid a RESTART (i.e. I2C_M_NORESTART flag is set).
+   *
+   * These conditions may be true simultaneously, as would be the case if
+   * we're sending multiple messages with payloads > 255 bytes.   So we only
+   * advance to the next message if we arrive here and dcnt is 0, meaning,
+   * we're finished with the last message and ready to move to the next.
+   *
+   * This logic supports the transfer of bytes limited only by the size of
+   * the i2c_msg_s length variable.  The SCL line will be stretched low
+   * until NBYTES is written with a non-zero value, allowing the transfer
+   * to continue.
+   *
+   * TODO: RESTARTs are required by the I2CSPEC if the next message transfer
+   * direction changes.  Right now the NORESTART flag overrides this behavior.
+   * May have to introduce logic to issue sendstart, assuming it's legal
+   * with the hardware in the TCR state.
+   */
+
+  else if ((status & I2C_ISR_TCR) != 0)
+    {
+      i2cinfo("TCR: ENTER dcnt = %i msgc = %i status 0x%08x\n",
+      priv->dcnt, priv->msgc, status);
+
+      /* If no more bytes in the current message to transfer */
+
+      if (priv->dcnt == 0)
+        {
+          /* Prior message has been sent successfully */
+
+          priv->msgc--;
+
+          /* Advance to the next message in the list */
+
+          priv->msgv++;
+
+          /* Update current message data */
+
+          priv->ptr    = priv->msgv->buffer;
+          priv->dcnt   = priv->msgv->length;
+          priv->flags  = priv->msgv->flags;
+
+          /* if this is the last message, disable reload so the
+           * TC event fires next time */
+
+          if (priv->msgc == 0)
+            {
+              i2cinfo("TCR: DISABLE RELOAD: dcnt = %i msgc = %i\n",
+              priv->dcnt, priv->msgc);
+
+              stm32_i2c_disable_reload(priv);
+            }
+
+          /* Update NBYTES with length of current message */
+
+          i2cinfo("TCR: NEXT MSG dcnt = %i msgc = %i\n",
+                  priv->dcnt, priv->msgc);
+
+          stm32_i2c_set_bytes_to_transfer(priv, priv->dcnt);
+        }
+      else
+        {
+          /* More bytes in the current (greater than 255 byte payload
+           * length) message, so set NBYTES according to the bytes
+           * remaining in the message, up to a maximum each cycle of 255.
+           */
+
+          if (priv->dcnt > 255)
+            {
+              i2cinfo("TCR: ENABLE RELOAD: NBYTES = 255 dcnt = %i msgc = %i\n",
+              priv->dcnt, priv->msgc);
+
+              /* More than 255 bytes to transfer so the RELOAD bit is
+               * set in order to generate a TCR event rather than a TC
+               * event when 255 bytes are successfully transferred.
+               * This forces us to return here to update NBYTES and
+               * continue until NBYTES is set to less than 255 bytes,
+               * at which point RELOAD will be disabled and a TC
+               * event will (eventually) follow to officially terminate
+               * the transfer.
+               */
+
+              stm32_i2c_enable_reload(priv);
+
+              stm32_i2c_set_bytes_to_transfer(priv, 255);
+            }
+          else
+            {
+              /* Less than 255 bytes left to transfer, which means we'll
+               * complete the transfer of all bytes in the current message
+               * the next time around.
+               *
+               * This means we need to disable the RELOAD functionality so
+               * we receive a TC event next time which will allow us to
+               * either RESTART and continue sending the contents of the
+               * next message or send a STOP condition and exit the ISR.
+               */
+
+              i2cinfo("TCR: DISABLE RELOAD: NBYTES = dcnt = %i msgc = %i\n",
+                      priv->dcnt, priv->msgc);
+
+              stm32_i2c_disable_reload(priv);
+
+              stm32_i2c_set_bytes_to_transfer(priv, priv->dcnt);
+            }
+
+          i2cinfo("TCR: EXIT dcnt = %i msgc = %i status 0x%08x\n",
+          priv->dcnt, priv->msgc, status);
+        }
+    }
+
+  /* Empty call handler
+   *
+   * Case to handle an empty call to the ISR where it has nothing to
+   * do and should exit immediately.
+   */
+
+  else if (priv->dcnt == -1 && priv->msgc == 0)
+    {
+      status = stm32_i2c_getreg(priv, STM32_I2C_ISR_OFFSET);
+      i2cwarn("WARNING: EMPTY CALL: Stopping ISR: status 0x%08x\n", status);
+      stm32_i2c_traceevent(priv, I2CEVENT_ISR_EMPTY_CALL, 0);
+    }
+
+  /* Error handler
+   *
+   * We get to this branch only if we can't handle the current state.
+   *
+   * This should not happen in interrupt based operation.
+   *
+   * This will happen during polled operation when the device is not
+   * in one of the supported states when polled.
+   */
+
+  else
+    {
+#ifdef CONFIG_I2C_POLLED
+      stm32_i2c_traceevent(priv, I2CEVENT_POLL_DEV_NOT_RDY, 0);
+#else
+      /* Read rest of the state */
+
+      status = stm32_i2c_getreg(priv, STM32_I2C_ISR_OFFSET);
+
+      i2cerr("ERROR: Invalid state detected, status 0x%08x\n", status);
+
+      /* set condition to terminate ISR and wake waiting thread */
+
+      priv->dcnt = -1;
+      priv->msgc = 0;
+      stm32_i2c_traceevent(priv, I2CEVENT_STATE_ERROR, 0);
+#endif
+    }
+
+  /* --------------------- End of I2C protocol handling -------------------- */
+
+  /* Message Handling
+   *
+   * Transmission of the whole message chain has been completed. We have to
+   * terminate the ISR and wake up stm32_i2c_process() that is waiting for
+   * the ISR cycle to handle the sending/receiving of the messages.
+   */
+
+  if (priv->dcnt == -1 && priv->msgc == 0)
+    {
+      i2cinfo("MSG: Shutting down I2C ISR\n");
+
+      stm32_i2c_traceevent(priv, I2CEVENT_ISR_SHUTDOWN, 0);
+
+      /* clear pointer to message content to reflect we are done
+       * with the current transaction */
+
+      priv->msgv = NULL;
+
+#ifdef CONFIG_I2C_POLLED
+      priv->intstate = INTSTATE_DONE;
+#else
+
+      status = stm32_i2c_getreg32(priv, STM32_I2C_ISR_OFFSET);
+
+      /* Update private state to capture NACK which is used in combination
+       * with the astart flag to report the type of NACK received (address
+       * vs data) to the upper layers once we exit the ISR.
+       *
+       * Note: We do this prior to clearing interrupts because the NACKF
+       * flag will naturally be cleared by that process.
+       */
+
+      priv->status = status;
+
+      /* Clear all interrupts */
+
+      stm32_i2c_modifyreg32(priv, STM32_I2C_ICR_OFFSET, 0, I2C_ICR_CLEARMASK);
+
+      /* If a thread is waiting then inform it transfer is complete */
+
+      if (priv->intstate == INTSTATE_WAITING)
+        {
+          sem_post(&priv->sem_isr);
+          priv->intstate = INTSTATE_DONE;
+        }
+#endif
+    }
+
+  status = stm32_i2c_getreg32(priv, STM32_I2C_ISR_OFFSET);
+  i2cinfo("EXIT: status = 0x%08x\n", status);
+
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32_i2c1_isr
+ *
+ * Description:
+ *   I2C1 interrupt service routine
+ *
+ ************************************************************************************/
+
+#ifndef CONFIG_I2C_POLLED
+#  ifdef CONFIG_STM32F7_I2C1
+static int stm32_i2c1_isr(int irq, void *context, FAR void *arg)
+{
+  return stm32_i2c_isr(&stm32_i2c1_priv);
+}
+#  endif
+
+/************************************************************************************
+ * Name: stm32_i2c2_isr
+ *
+ * Description:
+ *   I2C2 interrupt service routine
+ *
+ ************************************************************************************/
+
+# ifdef CONFIG_STM32F7_I2C2
+static int stm32_i2c2_isr(int irq, void *context, FAR void *arg)
+{
+  return stm32_i2c_isr(&stm32_i2c2_priv);
+}
+#  endif
+
+/************************************************************************************
+ * Name: stm32_i2c3_isr
+ *
+ * Description:
+ *   I2C2 interrupt service routine
+ *
+ ************************************************************************************/
+
+#  ifdef CONFIG_STM32F7_I2C3
+static int stm32_i2c3_isr(int irq, void *context, FAR void *arg)
+{
+  return stm32_i2c_isr(&stm32_i2c3_priv);
+}
+#  endif
+
+/************************************************************************************
+ * Name: stm32_i2c4_isr
+ *
+ * Description:
+ *   I2C2 interrupt service routine
+ *
+ ************************************************************************************/
+
+#  ifdef CONFIG_STM32F7_I2C4
+static int stm32_i2c4_isr(int irq, void *context, FAR void *arg)
+{
+  return stm32_i2c_isr(&stm32_i2c4_priv);
+}
+#  endif
+#endif
+
+/************************************************************************************
+ * Private Initialization and Deinitialization
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_i2c_init
+ *
+ * Description:
+ *   Setup the I2C hardware, ready for operation with defaults
+ *
+ ************************************************************************************/
+
+static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv)
+{
+  /* Power-up and configure GPIOs */
+
+  /* Enable power and reset the peripheral */
+
+  modifyreg32(STM32_RCC_APB1ENR, 0, priv->config->clk_bit);
+  modifyreg32(STM32_RCC_APB1RSTR, 0, priv->config->reset_bit);
+  modifyreg32(STM32_RCC_APB1RSTR, priv->config->reset_bit, 0);
+
+  /* Configure pins */
+
+  if (stm32_configgpio(priv->config->scl_pin) < 0)
+    {
+      return ERROR;
+    }
+
+  if (stm32_configgpio(priv->config->sda_pin) < 0)
+    {
+      stm32_unconfiggpio(priv->config->scl_pin);
+      return ERROR;
+    }
+
+#ifndef CONFIG_I2C_POLLED
+  /* Attach error and event interrupts to the ISRs */
+
+  irq_attach(priv->config->ev_irq, priv->config->isr, NULL);
+  irq_attach(priv->config->er_irq, priv->config->isr, NULL);
+  up_enable_irq(priv->config->ev_irq);
+  up_enable_irq(priv->config->er_irq);
+#endif
+
+  /* TODO:
+   * - Provide means to set peripheral clock source via RCC_CFGR3_I2CxSW
+   * - Set to HSI by default, make Kconfig option
+   */
+   
+  /* Force a frequency update */
+
+  priv->frequency = 0;
+  stm32_i2c_setclock(priv, 100000);
+
+  /* Enable I2C peripheral */
+
+  stm32_i2c_modifyreg32(priv, STM32_I2C_CR1_OFFSET, 0, I2C_CR1_PE);
+
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_deinit
+ *
+ * Description:
+ *   Shutdown the I2C hardware
+ *
+ ************************************************************************************/
+
+static int stm32_i2c_deinit(FAR struct stm32_i2c_priv_s *priv)
+{
+  /* Disable I2C */
+
+  stm32_i2c_putreg32(priv, STM32_I2C_CR1_OFFSET, 0);
+
+  /* Unconfigure GPIO pins */
+
+  stm32_unconfiggpio(priv->config->scl_pin);
+  stm32_unconfiggpio(priv->config->sda_pin);
+
+#ifndef CONFIG_I2C_POLLED
+
+  /* Disable and detach interrupts */
+
+  up_disable_irq(priv->config->ev_irq);
+  up_disable_irq(priv->config->er_irq);
+  irq_detach(priv->config->ev_irq);
+  irq_detach(priv->config->er_irq);
+#endif
+
+  /* Disable clocking */
+
+  modifyreg32(STM32_RCC_APB1ENR, priv->config->clk_bit, 0);
+
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_process
+ *
+ * Description:
+ *   Common I2C transfer logic
+ *
+ *   Initiates a master mode transaction on the I2C bus to transfer the provided
+ *   messages to and from the slave devices.
+ *
+ ************************************************************************************/
+
+static int stm32_i2c_process(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s *msgs, int count)
+{
+  struct stm32_i2c_inst_s     *inst = (struct stm32_i2c_inst_s *)dev;
+  FAR struct stm32_i2c_priv_s *priv = inst->priv;
+  uint32_t    status = 0;
+  uint32_t    cr1;
+  uint32_t    cr2;
+  int         errval = 0;
+  int         waitrc = 0;
+
+  ASSERT(count);
+
+  /* Wait for any STOP in progress */
+
+  stm32_i2c_sem_waitstop(priv);
+
+  /* Clear any pending error interrupts */
+
+  stm32_i2c_clearinterrupts(priv);
+
+  /* Old transfers are done */
+
+  priv->msgv = msgs;
+  priv->msgc = count;
+
+  /* Reset I2C trace logic */
+
+  stm32_i2c_tracereset(priv);
+
+  /* Set I2C clock frequency (on change it toggles I2C_CR1_PE !) */
+
+  stm32_i2c_setclock(priv, msgs->frequency);
+
+  /* Trigger start condition, then the process moves into the ISR.  I2C
+   * interrupts will be enabled within stm32_i2c_waitdone().
+   */
+
+  priv->status = 0;
+
+#ifndef CONFIG_I2C_POLLED
+  /* Enable transmit and receive interrupts here so when we send the start
+   * condition below the ISR will fire if the data was sent and some
+   * response from the slave received.  All other interrupts relevant to
+   * our needs are enabled in stm32_i2c_sem_waitdone() below.
+   */
+
+  stm32_i2c_enableinterrupts(priv);
+#endif
+
+  /* Trigger START condition generation, which also sends the slave address
+   * with read/write flag and the data in the first message
+   */
+
+  stm32_i2c_sendstart(priv);
+
+  /* Wait for the ISR to tell us that the transfer is complete by attempting
+   * to grab the semaphore that is initially locked by the ISR.  If the ISR
+   * does not release the lock so we can obtain it here prior to the end of
+   * the timeout period waitdone returns error and we report a timeout.
+   */
+
+  waitrc = stm32_i2c_sem_waitdone(priv);
+
+  cr1 = stm32_i2c_getreg32(priv, STM32_I2C_CR1_OFFSET);
+  cr2 = stm32_i2c_getreg32(priv, STM32_I2C_CR2_OFFSET);
+#if !defined(CONFIG_DEBUG_I2C)
+  UNUSED(cr1);
+  UNUSED(cr2);
+#endif
+
+  /* Status after a normal / good exit is usually 0x00000001, meaning the TXE
+   * bit is set.  That occurs as a result of the I2C_TXDR register being
+   * empty, and it naturally will be after the last byte is transmitted.
+   * This bit is cleared when we attempt communications again and re-enable
+   * the peripheral.  The priv->status field can hold additional information
+   * like a NACK, so we reset the status field to include that information.
+   */
+
+  status = stm32_i2c_getstatus(priv);
+
+  /* The priv->status field can hold additional information like a NACK
+   * event so we include that information.
+   */
+
+  status = priv->status & 0xffffffff;
+
+  if (waitrc < 0)
+    {
+      /* Connection timed out */
+
+      errval = ETIMEDOUT;
+      i2cerr("ERROR: Waitdone timed out CR1: 0x%08x CR2: 0x%08x status: 0x%08x\n",
+             cr1, cr2,status);
+    }
+  else
+    {
+      i2cinfo("Waitdone success: CR1: 0x%08x CR2: 0x%08x status: 0x%08x\n",
+             cr1, cr2,status );
+    }
+
+  UNUSED(cr1);
+  UNUSED(cr2);
+
+  i2cinfo("priv->status: 0x%08x\n", priv->status);
+
+  /* Check for error status conditions */
+
+  if ((status & (I2C_INT_BERR |
+                 I2C_INT_ARLO |
+                 I2C_INT_OVR |
+                 I2C_INT_PECERR |
+                 I2C_INT_TIMEOUT |
+                 I2C_INT_NACK)) != 0)
+
+    {
+      /* one or more errors in the mask are present */
+
+      if (status & I2C_INT_BERR)
+        {
+          /* Bus Error, ignore it because of errata (revision A,Z) */
+
+          i2cerr("ERROR: I2C Bus Error\n");
+
+          /* errval = EIO; */
+        }
+      else if (status & I2C_INT_ARLO)
+        {
+          /* Arbitration Lost (master mode) */
+
+          i2cerr("ERROR: I2C Arbitration Lost\n");
+          errval = EAGAIN;
+        }
+
+      else if (status & I2C_INT_OVR)
+        {
+          /* Overrun/Underrun */
+
+          i2cerr("ERROR: I2C Overrun/Underrun\n");
+          errval = EIO;
+        }
+      else if (status & I2C_INT_PECERR)
+        {
+      /* PEC Error in reception (SMBus Only) */
+
+          i2cerr("ERROR: I2C PEC Error\n");
+          errval = EPROTO;
+        }
+      else if (status & I2C_INT_TIMEOUT)
+        {
+          /* Timeout or Tlow Error (SMBus Only) */
+
+          i2cerr("ERROR: I2C Timeout / Tlow Error\n");
+          errval = ETIME;
+        }
+      else if (status & I2C_INT_NACK)
+        {
+          /* NACK Received, flag as "communication error on send" */
+
+          if (priv->astart == TRUE)
+            {
+              i2cwarn("WARNING: I2C Address NACK\n");
+              errval = EADDRNOTAVAIL;
+            }
+          else
+            {
+              i2cwarn("WARNING: I2C Data NACK\n");
+              errval = ECOMM;
+            }
+        }
+      else
+        {
+          /* Unrecognized error */
+
+          i2cerr("ERROR: I2C Unrecognized Error");
+          errval = EINTR;
+        }
+    }
+
+  /* This is not an error, but should not happen.  The BUSY signal can be
+   * present if devices on the bus are in an odd state and need to be reset.
+   * NOTE:  We will only see this busy indication if stm32_i2c_sem_waitdone()
+   * fails above;  Otherwise it is cleared.
+   */
+
+  else if ((status & I2C_ISR_BUSY) != 0)
+    {
+      /* I2C Bus Busy
+       *
+       * This is a status condition rather than an error.
+       *
+       * We will only see this busy indication if stm32_i2c_sem_waitdone()
+       * fails above;  Otherwise it is cleared by the hardware when the ISR
+       * wraps up the transfer with a STOP condition.
+       */
+
+      uint32_t start = clock_systimer();
+      uint32_t timeout = USEC2TICK(USEC_PER_SEC/priv->frequency) + 1;
+
+      status = stm32_i2c_getstatus(priv);
+
+      while(status & I2C_ISR_BUSY)
+        {
+          if((clock_systimer() - start) > timeout)
+            {
+              i2cerr("ERROR: I2C Bus busy");
+              errval = EBUSY;
+              break;
+            }
+
+          status = stm32_i2c_getstatus(priv);
+        }
+    }
+
+  /* Dump the trace result */
+
+  stm32_i2c_tracedump(priv);
+  stm32_i2c_sem_post(dev);
+
+  return -errval;
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_transfer
+ *
+ * Description:
+ *   Generic I2C transfer function
+ *
+ ************************************************************************************/
+
+static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s *msgs,
+                              int count)
+{
+  stm32_i2c_sem_wait(dev);   /* ensure that address or flags don't change meanwhile */
+  return stm32_i2c_process(dev, msgs, count);
+}
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: up_i2cinitialize
+ *
+ * Description:
+ *   Initialize one I2C bus
+ *
+ ************************************************************************************/
+
+FAR struct i2c_master_s *stm32_i2cbus_initialize(int port)
+{
+  struct stm32_i2c_priv_s * priv = NULL;  /* private data of device with multiple instances */
+  struct stm32_i2c_inst_s * inst = NULL;  /* device, single instance */
+  int irqs;
+
+#if STM32_HSI_FREQUENCY != 16000000 || defined(INVALID_CLOCK_SOURCE)
+#   warning STM32_I2C_INIT: Peripheral clock is HSI and it must be 16mHz or the speed/timing calculations need to be redone.
+    return NULL;
+#endif
+
+  /* Get I2C private structure */
+
+  switch (port)
+    {
+#ifdef CONFIG_STM32F7_I2C1
+      case 1:
+        priv = (struct stm32_i2c_priv_s *)&stm32_i2c1_priv;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_I2C2
+      case 2:
+        priv = (struct stm32_i2c_priv_s *)&stm32_i2c2_priv;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_I2C3
+      case 3:
+        priv = (struct stm32_i2c_priv_s *)&stm32_i2c3_priv;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_I2C4
+      case 4:
+        priv = (struct stm32_i2c_priv_s *)&stm32_i2c4_priv;
+        break;
+#endif
+      default:
+        return NULL;
+    }
+
+  /* Allocate instance */
+
+  if (!(inst = kmm_malloc(sizeof(struct stm32_i2c_inst_s))))
+    {
+      return NULL;
+    }
+
+  /* Initialize instance */
+
+  inst->ops       = &stm32_i2c_ops;
+  inst->priv      = priv;
+
+  /* Init private data for the first time, increment refs count,
+   * power-up hardware and configure GPIOs.
+   */
+
+  irqs = enter_critical_section();
+
+  if ((volatile int)priv->refs++ == 0)
+    {
+      stm32_i2c_sem_init((struct i2c_master_s *)inst);
+      stm32_i2c_init(priv);
+    }
+
+  leave_critical_section(irqs);
+  return (struct i2c_master_s *)inst;
+}
+
+/************************************************************************************
+ * Name: up_i2cuninitialize
+ *
+ * Description:
+ *   Uninitialize an I2C bus
+ *
+ ************************************************************************************/
+
+int stm32_i2cbus_uninitialize(FAR struct i2c_master_s * dev)
+{
+  int irqs;
+
+  ASSERT(dev);
+
+  /* Decrement refs and check for underflow */
+
+  if (((struct stm32_i2c_inst_s *)dev)->priv->refs == 0)
+    {
+      return ERROR;
+    }
+
+  irqs = enter_critical_section();
+
+  if (--((struct stm32_i2c_inst_s *)dev)->priv->refs)
+    {
+      leave_critical_section(irqs);
+      kmm_free(dev);
+      return OK;
+    }
+
+  leave_critical_section(irqs);
+
+  /* Disable power and other HW resource (GPIO's) */
+
+  stm32_i2c_deinit(((struct stm32_i2c_inst_s *)dev)->priv);
+
+  /* Release unused resources */
+
+  stm32_i2c_sem_destroy((struct i2c_master_s *)dev);
+
+  kmm_free(dev);
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32_i2c_reset
+ *
+ * Description:
+ *   Reset an I2C bus
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_I2C_RESET
+int stm32_i2c_reset(FAR struct i2c_master_s * dev)
+{
+  struct stm32_i2c_priv_s * priv;
+  unsigned int clock_count;
+  unsigned int stretch_count;
+  uint32_t scl_gpio;
+  uint32_t sda_gpio;
+  int ret = ERROR;
+
+  ASSERT(dev);
+
+  /* Get I2C private structure */
+
+  priv = ((struct stm32_i2c_inst_s *)dev)->priv;
+
+  /* Our caller must own a ref */
+
+  ASSERT(priv->refs > 0);
+
+  /* Lock out other clients */
+
+  stm32_i2c_sem_wait(dev);
+
+  /* De-init the port */
+
+  stm32_i2c_deinit(priv);
+
+  /* Use GPIO configuration to un-wedge the bus */
+
+  scl_gpio = MKI2C_OUTPUT(priv->config->scl_pin);
+  sda_gpio = MKI2C_OUTPUT(priv->config->sda_pin);
+
+  /* Let SDA go high */
+
+  stm32_gpiowrite(sda_gpio, 1);
+
+  /* Clock the bus until any slaves currently driving it let it go. */
+
+  clock_count = 0;
+  while (!stm32_gpioread(sda_gpio))
+    {
+      /* Give up if we have tried too hard */
+
+      if (clock_count++ > 10)
+        {
+          goto out;
+        }
+
+      /* Sniff to make sure that clock stretching has finished.
+       *
+       * If the bus never relaxes, the reset has failed.
+       */
+
+      stretch_count = 0;
+      while (!stm32_gpioread(scl_gpio))
+        {
+          /* Give up if we have tried too hard */
+
+          if (stretch_count++ > 10)
+            {
+              goto out;
+            }
+
+          up_udelay(10);
+        }
+
+      /* Drive SCL low */
+
+      stm32_gpiowrite(scl_gpio, 0);
+      up_udelay(10);
+
+      /* Drive SCL high again */
+
+      stm32_gpiowrite(scl_gpio, 1);
+      up_udelay(10);
+    }
+
+  /* Generate a start followed by a stop to reset slave
+   * state machines.
+   */
+
+  stm32_gpiowrite(sda_gpio, 0);
+  up_udelay(10);
+  stm32_gpiowrite(scl_gpio, 0);
+  up_udelay(10);
+  stm32_gpiowrite(scl_gpio, 1);
+  up_udelay(10);
+  stm32_gpiowrite(sda_gpio, 1);
+  up_udelay(10);
+
+  /* Revert the GPIO configuration. */
+
+  stm32_unconfiggpio(sda_gpio);
+  stm32_unconfiggpio(scl_gpio);
+
+  /* Re-init the port */
+
+  stm32_i2c_init(priv);
+  ret = OK;
+
+out:
+
+  /* Release the port for re-use by other clients */
+
+  stm32_i2c_sem_post(dev);
+  return ret;
+}
+#endif /* CONFIG_I2C_RESET */
+
+#endif /* CONFIG_STM32F7_I2C1 || CONFIG_STM32F7_I2C2 || CONFIG_STM32F7_I2C3 */
diff --git a/arch/arm/src/stm32f7/stm32_i2c.h b/arch/arm/src/stm32f7/stm32_i2c.h
new file mode 100644
index 0000000000000000000000000000000000000000..c5608176387158c74c643c7d56f6c2606c1af5e6
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_i2c.h
@@ -0,0 +1,104 @@
+/****************************************************************************
+ * arch/arm/src/stm32f7/stm32_i2c.h
+ *
+ *   Copyright (C) 2009, 2011, 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_STM32F7_I2C_H
+#define __ARCH_ARM_SRC_STM32F7_STM32F7_I2C_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#include "chip.h"
+#include "chip/stm32_i2c.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* If a dynamic timeout is selected, then a non-negative, non-zero micro-
+ * seconds per byte value must be provided as well.
+ */
+
+#ifdef CONFIG_STM32F7_I2C_DYNTIMEO
+#  if CONFIG_STM32F7_I2C_DYNTIMEO_USECPERBYTE < 1
+#    warning "Ignoring CONFIG_STM32F7_I2C_DYNTIMEO because of CONFIG_STM32F7_I2C_DYNTIMEO_USECPERBYTE"
+#    undef CONFIG_STM32F7_I2C_DYNTIMEO
+#  endif
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_i2cbus_initialize
+ *
+ * Description:
+ *   Initialize the selected I2C port. And return a unique instance of struct
+ *   struct i2c_master_s.  This function may be called to obtain multiple
+ *   instances of the interface, each of which may be set up with a
+ *   different frequency and slave address.
+ *
+ * Input Parameter:
+ *   Port number (for hardware that has multiple I2C interfaces)
+ *
+ * Returned Value:
+ *   Valid I2C device structure reference on succcess; a NULL on failure
+ *
+ ****************************************************************************/
+
+FAR struct i2c_master_s *stm32_i2cbus_initialize(int port);
+
+/****************************************************************************
+ * Name: stm32_i2cbus_uninitialize
+ *
+ * Description:
+ *   De-initialize the selected I2C port, and power down the device.
+ *
+ * Input Parameter:
+ *   Device structure as returned by the stm32_i2cbus_initialize()
+ *
+ * Returned Value:
+ *   OK on success, ERROR when internal reference count mismatch or dev
+ *   points to invalid hardware device.
+ *
+ ****************************************************************************/
+
+int stm32_i2cbus_uninitialize(FAR struct i2c_master_s *dev);
+
+#endif /* __ARCH_ARM_SRC_STM32F7_STM32F7_I2C_H */
diff --git a/arch/arm/src/stm32f7/stm32_irq.c b/arch/arm/src/stm32f7/stm32_irq.c
index a52e3e56d934e02eb24a8b92f79d32bb1960e1b4..b24075010362497cf64e60151ff2a64cd28f40b7 100644
--- a/arch/arm/src/stm32f7/stm32_irq.c
+++ b/arch/arm/src/stm32f7/stm32_irq.c
@@ -110,62 +110,64 @@ extern uint32_t _vectors[];
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_IRQ)
+#if defined(CONFIG_DEBUG_IRQ_INFO)
 static void stm32_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = enter_critical_section();
-  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  lldbg("  INTCTRL:    %08x VECTAB:  %08x\n",
-        getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
+
+  irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
+  irqinfo("  INTCTRL:    %08x VECTAB:  %08x\n",
+          getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
 #if 0
-  lldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
-        getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
-        getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+  irqinfo("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+          getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
+          getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
 #endif
-  lldbg("  IRQ ENABLE: %08x %08x %08x\n",
-        getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
-        getreg32(NVIC_IRQ64_95_ENABLE));
-  lldbg("  SYSH_PRIO:  %08x %08x %08x\n",
-        getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
-        getreg32(NVIC_SYSH12_15_PRIORITY));
-  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
-        getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+  irqinfo("  IRQ ENABLE: %08x %08x %08x\n",
+          getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
+          getreg32(NVIC_IRQ64_95_ENABLE));
+  irqinfo("  SYSH_PRIO:  %08x %08x %08x\n",
+          getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+          getreg32(NVIC_SYSH12_15_PRIORITY));
+  irqinfo("  IRQ PRIO:   %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
+          getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
 #if NR_INTERRUPTS > 15
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
-        getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
+          getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
 #endif
 #if NR_INTERRUPTS > 31
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
-        getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
+          getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
 #endif
 #if NR_INTERRUPTS > 47
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
-        getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
+          getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
 #endif
 #if NR_INTERRUPTS > 63
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
-        getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
+          getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
 #endif
 #if NR_INTERRUPTS > 79
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ80_83_PRIORITY), getreg32(NVIC_IRQ84_87_PRIORITY),
-        getreg32(NVIC_IRQ88_91_PRIORITY), getreg32(NVIC_IRQ92_95_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ80_83_PRIORITY), getreg32(NVIC_IRQ84_87_PRIORITY),
+          getreg32(NVIC_IRQ88_91_PRIORITY), getreg32(NVIC_IRQ92_95_PRIORITY));
 #endif
 #if NR_INTERRUPTS > 95
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ96_99_PRIORITY), getreg32(NVIC_IRQ100_103_PRIORITY),
-        getreg32(NVIC_IRQ104_107_PRIORITY), getreg32(NVIC_IRQ108_111_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ96_99_PRIORITY), getreg32(NVIC_IRQ100_103_PRIORITY),
+          getreg32(NVIC_IRQ104_107_PRIORITY), getreg32(NVIC_IRQ108_111_PRIORITY));
 #endif
 #if NR_INTERRUPTS > 111
 #  warning Missing logic
 #endif
+
   leave_critical_section(flags);
 }
 #else
@@ -183,51 +185,51 @@ static void stm32_dumpnvic(const char *msg, int irq)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
-static int stm32_nmi(int irq, FAR void *context)
+#ifdef CONFIG_DEBUG_FEATURES
+static int stm32_nmi(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! NMI received\n");
+  _err("PANIC!!! NMI received\n");
   PANIC();
   return 0;
 }
 
-static int stm32_busfault(int irq, FAR void *context)
+static int stm32_busfault(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
+  _err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
   PANIC();
   return 0;
 }
 
-static int stm32_usagefault(int irq, FAR void *context)
+static int stm32_usagefault(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
+  _err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
   PANIC();
   return 0;
 }
 
-static int stm32_pendsv(int irq, FAR void *context)
+static int stm32_pendsv(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! PendSV received\n");
+  _err("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
 }
 
-static int stm32_dbgmonitor(int irq, FAR void *context)
+static int stm32_dbgmonitor(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Debug Monitor received\n");
+  _err("PANIC!!! Debug Monitor received\n");
   PANIC();
   return 0;
 }
 
-static int stm32_reserved(int irq, FAR void *context)
+static int stm32_reserved(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Reserved interrupt\n");
+  _err("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;
 }
@@ -467,8 +469,8 @@ void up_irqinitialize(void)
    * under certain conditions.
    */
 
-  irq_attach(STM32_IRQ_SVCALL, up_svcall);
-  irq_attach(STM32_IRQ_HARDFAULT, up_hardfault);
+  irq_attach(STM32_IRQ_SVCALL, up_svcall, NULL);
+  irq_attach(STM32_IRQ_HARDFAULT, up_hardfault, NULL);
 
   /* Set the priority of the SVCall interrupt */
 
@@ -484,22 +486,22 @@ void up_irqinitialize(void)
    */
 
 #ifdef CONFIG_ARM_MPU
-  irq_attach(STM32_IRQ_MEMFAULT, up_memfault);
+  irq_attach(STM32_IRQ_MEMFAULT, up_memfault, NULL);
   up_enable_irq(STM32_IRQ_MEMFAULT);
 #endif
 
   /* Attach all other processor exceptions (except reset and sys tick) */
 
-#ifdef CONFIG_DEBUG
-  irq_attach(STM32_IRQ_NMI, stm32_nmi);
+#ifdef CONFIG_DEBUG_FEATURES
+  irq_attach(STM32_IRQ_NMI, stm32_nmi, NULL);
 #ifndef CONFIG_ARM_MPU
-  irq_attach(STM32_IRQ_MEMFAULT, up_memfault);
+  irq_attach(STM32_IRQ_MEMFAULT, up_memfault, NULL);
 #endif
-  irq_attach(STM32_IRQ_BUSFAULT, stm32_busfault);
-  irq_attach(STM32_IRQ_USAGEFAULT, stm32_usagefault);
-  irq_attach(STM32_IRQ_PENDSV, stm32_pendsv);
-  irq_attach(STM32_IRQ_DBGMONITOR, stm32_dbgmonitor);
-  irq_attach(STM32_IRQ_RESERVED, stm32_reserved);
+  irq_attach(STM32_IRQ_BUSFAULT, stm32_busfault, NULL);
+  irq_attach(STM32_IRQ_USAGEFAULT, stm32_usagefault, NULL);
+  irq_attach(STM32_IRQ_PENDSV, stm32_pendsv, NULL);
+  irq_attach(STM32_IRQ_DBGMONITOR, stm32_dbgmonitor, NULL);
+  irq_attach(STM32_IRQ_RESERVED, stm32_reserved, NULL);
 #endif
 
   stm32_dumpnvic("initial", STM32_IRQ_NIRQS);
@@ -654,7 +656,7 @@ int up_prioritize_irq(int irq, int priority)
   uint32_t regval;
   int shift;
 
-  DEBUGASSERT(irq >= STM32_IRQ_MEMFAULT && irq < STM32_IRQ_NIRQS &&
+  DEBUGASSERT(irq >= STM32_IRQ_MEMFAULT && irq < NR_IRQS &&
               (unsigned)priority <= NVIC_SYSH_PRIORITY_MIN);
 
   if (irq < STM32_IRQ_FIRST)
diff --git a/arch/arm/src/stm32f7/stm32_lsi.c b/arch/arm/src/stm32f7/stm32_lsi.c
new file mode 100644
index 0000000000000000000000000000000000000000..46e961637277fb452dfdb0c553bf298eca6b0047
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_lsi.c
@@ -0,0 +1,89 @@
+/****************************************************************************
+ * arch/arm/src/stm32f/stm32_lsi.c
+ *
+ *   Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include "up_arch.h"
+
+#include "stm32_rcc.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_rcc_enablelsi
+ *
+ * Description:
+ *   Enable the Internal Low-Speed (LSI) RC Oscillator.
+ *
+ ****************************************************************************/
+
+void stm32_rcc_enablelsi(void)
+{
+  /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION
+   * bit the RCC CSR register.
+   */
+
+  modifyreg32(STM32_RCC_CSR, 0, RCC_CSR_LSION);
+
+  /* Wait for the internal RC 40 kHz oscillator to be stable. */
+
+  while ((getreg32(STM32_RCC_CSR) & RCC_CSR_LSIRDY) == 0);
+}
+
+/****************************************************************************
+ * Name: stm32_rcc_disablelsi
+ *
+ * Description:
+ *   Disable the Internal Low-Speed (LSI) RC Oscillator.
+ *
+ ****************************************************************************/
+
+void stm32_rcc_disablelsi(void)
+{
+  /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION
+   * bit the RCC CSR register.
+   */
+
+  modifyreg32(STM32_RCC_CSR, RCC_CSR_LSION, 0);
+
+  /* LSIRDY should go low after 3 LSI clock cycles */
+}
diff --git a/arch/arm/src/stm32f7/stm32_otg.h b/arch/arm/src/stm32f7/stm32_otg.h
new file mode 100644
index 0000000000000000000000000000000000000000..7eba65a61ba4b4b6c0a72cee6d8b50b8d3be108b
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_otg.h
@@ -0,0 +1,148 @@
+/************************************************************************************
+ * arch/arm/src/stm32f7/stm32_otg.h
+ *
+ *   Copyright (C) 2012-2013, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_STM32_OTG_H
+#define __ARCH_ARM_SRC_STM32F7_STM32_OTG_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+
+#include "chip.h"
+#include "chip/stm32_otg.h"
+
+#if defined(CONFIG_STM32F7_OTGFS) || defined(CONFIG_STM32F7_OTGHS)
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Configuration ********************************************************************/
+
+#ifndef CONFIG_OTG_PRI
+#  define CONFIG_OTG_PRI NVIC_SYSH_PRIORITY_DEFAULT
+#endif
+
+#if defined(CONFIG_STM32F7_OTGFS)
+#  define STM32_IRQ_OTG         STM32_IRQ_OTGFS
+#  define STM32_OTG_BASE        STM32_USBOTGFS_BASE
+#  define STM32_NENDPOINTS      (6)          /* ep0-5 x 2 for IN and OUT */
+#  define GPIO_OTG_DM           GPIO_OTGFS_DM
+#  define GPIO_OTG_DP           GPIO_OTGFS_DP
+#  define GPIO_OTG_ID           GPIO_OTGFS_ID
+#  define GPIO_OTG_SOF          GPIO_OTGFS_SOF
+#  define STM32_OTG_FIFO_SIZE   1280
+#endif
+
+#if defined(CONFIG_STM32F7_OTGHS)
+#  define STM32_IRQ_OTG         STM32_IRQ_OTGHS
+#  define STM32_OTG_BASE        STM32_USBOTGHS_BASE
+#  define STM32_NENDPOINTS      (7)          /* ep0-8 x 2 for IN and OUT but driver internals use byte to map + one bit for direction */
+#  define GPIO_OTG_DM           GPIO_OTGHS_DM
+#  define GPIO_OTG_DP           GPIO_OTGHS_DP
+#  define GPIO_OTG_ID           GPIO_OTGHS_ID
+#  define GPIO_OTG_SOF          GPIO_OTGHS_SOF
+#  define STM32_OTG_FIFO_SIZE   4096
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: stm32_otghost_initialize
+ *
+ * Description:
+ *   Initialize USB host device controller hardware.
+ *
+ * Input Parameters:
+ *   controller -- If the device supports more than USB host controller, then
+ *     this identifies which controller is being initializeed.  Normally, this
+ *     is just zero.
+ *
+ * Returned Value:
+ *   And instance of the USB host interface.  The controlling task should
+ *   use this interface to (1) call the wait() method to wait for a device
+ *   to be connected, and (2) call the enumerate() method to bind the device
+ *   to a class driver.
+ *
+ * Assumptions:
+ * - This function should called in the initialization sequence in order
+ *   to initialize the USB device functionality.
+ * - Class drivers should be initialized prior to calling this function.
+ *   Otherwise, there is a race condition if the device is already connected.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBHOST
+struct usbhost_connection_s;
+FAR struct usbhost_connection_s *stm32_otghost_initialize(int controller);
+#endif
+
+/************************************************************************************
+ * Name:  stm32_usbsuspend
+ *
+ * Description:
+ *   Board logic must provide the stm32_usbsuspend logic if the OTG FS device driver
+ *   is used.  This function is called whenever the USB enters or leaves suspend
+ *   mode. This is an opportunity for the board logic to shutdown clocks, power,
+ *   etc. while the USB is suspended.
+ *
+ ************************************************************************************/
+
+void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* CONFIG_STM32F7_OTGFS */
+#endif /* __ARCH_ARM_SRC_STM32F7_STM32_OTG_H */
diff --git a/arch/arm/src/stm32f7/stm32_otgdev.c b/arch/arm/src/stm32f7/stm32_otgdev.c
new file mode 100644
index 0000000000000000000000000000000000000000..ff2a6e026ee470b927fc23d4ed937adbbf238120
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_otgdev.c
@@ -0,0 +1,5784 @@
+/****************************************************************************
+ * arch/arm/src/stm32f7/stm32_otgdev.c
+ *
+ *   Copyright (C) 2012-2014, 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "chip.h"
+#include "stm32_gpio.h"
+#include "stm32_otg.h"
+#include "up_arch.h"
+#include "up_internal.h"
+
+
+#if defined(CONFIG_USBDEV) && (defined(CONFIG_STM32F7_OTGFS) || \
+    defined(CONFIG_STM32F7_OTGHS))
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+#ifndef CONFIG_USBDEV_EP0_MAXSIZE
+#  define CONFIG_USBDEV_EP0_MAXSIZE 64
+#endif
+
+#ifndef CONFIG_USBDEV_SETUP_MAXDATASIZE
+#  define CONFIG_USBDEV_SETUP_MAXDATASIZE CONFIG_USBDEV_EP0_MAXSIZE
+#endif
+
+#ifndef CONFIG_USBDEV_MAXPOWER
+#  define CONFIG_USBDEV_MAXPOWER 100  /* mA */
+#endif
+
+/* There is 1.25Kb of FIFO memory.  The default partitions this memory
+ * so that there is a TxFIFO allocated for each endpoint and with more
+ * memory provided for the common RxFIFO.  A more knowledge-able
+ * configuration would not allocate any TxFIFO space to OUT endpoints.
+ */
+
+#ifndef CONFIG_USBDEV_RXFIFO_SIZE
+#  define CONFIG_USBDEV_RXFIFO_SIZE (STM32_OTG_FIFO_SIZE - STM32_OTG_FIFO_SIZE/4/2/STM32_NENDPOINTS*4*STM32_NENDPOINTS)
+#endif
+
+#if STM32_NENDPOINTS > 0
+#  ifndef CONFIG_USBDEV_EP0_TXFIFO_SIZE
+#    define CONFIG_USBDEV_EP0_TXFIFO_SIZE ((STM32_OTG_FIFO_SIZE - CONFIG_USBDEV_RXFIFO_SIZE)/STM32_NENDPOINTS)
+#  endif
+#else
+#  define CONFIG_USBDEV_EP0_TXFIFO_SIZE 0
+#endif
+
+#if STM32_NENDPOINTS > 1
+#  ifndef CONFIG_USBDEV_EP1_TXFIFO_SIZE
+#    define CONFIG_USBDEV_EP1_TXFIFO_SIZE ((STM32_OTG_FIFO_SIZE - CONFIG_USBDEV_RXFIFO_SIZE)/STM32_NENDPOINTS)
+#  endif
+#else
+#  define CONFIG_USBDEV_EP1_TXFIFO_SIZE 0
+#endif
+
+#if STM32_NENDPOINTS > 2
+#  ifndef CONFIG_USBDEV_EP2_TXFIFO_SIZE
+#    define CONFIG_USBDEV_EP2_TXFIFO_SIZE ((STM32_OTG_FIFO_SIZE - CONFIG_USBDEV_RXFIFO_SIZE)/STM32_NENDPOINTS)
+#  endif
+#else
+#  define CONFIG_USBDEV_EP2_TXFIFO_SIZE 0
+#endif
+
+#if STM32_NENDPOINTS > 3
+#  ifndef CONFIG_USBDEV_EP3_TXFIFO_SIZE
+#    define CONFIG_USBDEV_EP3_TXFIFO_SIZE ((STM32_OTG_FIFO_SIZE - CONFIG_USBDEV_RXFIFO_SIZE)/STM32_NENDPOINTS)
+#  endif
+#else
+#  define CONFIG_USBDEV_EP3_TXFIFO_SIZE 0
+#endif
+
+#if STM32_NENDPOINTS > 4
+#  ifndef CONFIG_USBDEV_EP4_TXFIFO_SIZE
+#    define CONFIG_USBDEV_EP4_TXFIFO_SIZE ((STM32_OTG_FIFO_SIZE - CONFIG_USBDEV_RXFIFO_SIZE)/STM32_NENDPOINTS)
+#  endif
+#else
+#  define CONFIG_USBDEV_EP4_TXFIFO_SIZE 0
+#endif
+
+#if STM32_NENDPOINTS > 5
+#  ifndef CONFIG_USBDEV_EP5_TXFIFO_SIZE
+#    define CONFIG_USBDEV_EP5_TXFIFO_SIZE ((STM32_OTG_FIFO_SIZE - CONFIG_USBDEV_RXFIFO_SIZE)/STM32_NENDPOINTS)
+#  endif
+#else
+#  define CONFIG_USBDEV_EP5_TXFIFO_SIZE 0
+#endif
+
+#if STM32_NENDPOINTS > 6
+#  ifndef CONFIG_USBDEV_EP6_TXFIFO_SIZE
+#    define CONFIG_USBDEV_EP6_TXFIFO_SIZE ((STM32_OTG_FIFO_SIZE - CONFIG_USBDEV_RXFIFO_SIZE)/STM32_NENDPOINTS)
+#  endif
+#else
+#  define CONFIG_USBDEV_EP6_TXFIFO_SIZE 0
+#endif
+
+#if STM32_NENDPOINTS > 7
+#  ifndef CONFIG_USBDEV_EP7_TXFIFO_SIZE
+#    define CONFIG_USBDEV_EP7_TXFIFO_SIZE ((STM32_OTG_FIFO_SIZE - CONFIG_USBDEV_RXFIFO_SIZE)/STM32_NENDPOINTS)
+#  endif
+#else
+#  define CONFIG_USBDEV_EP7_TXFIFO_SIZE 0
+#endif
+
+#if STM32_NENDPOINTS > 8
+#  ifndef CONFIG_USBDEV_EP8_TXFIFO_SIZE
+#    define CONFIG_USBDEV_EP8_TXFIFO_SIZE ((STM32_OTG_FIFO_SIZE - CONFIG_USBDEV_RXFIFO_SIZE)/STM32_NENDPOINTS)
+#  endif
+#else
+#  define CONFIG_USBDEV_EP8_TXFIFO_SIZE 0
+#endif
+
+/* The actual FIFO addresses that we use must be aligned to 4-byte boundaries;
+ * FIFO sizes must be provided in units of 32-bit words.
+ */
+
+#define STM32_RXFIFO_BYTES     ((CONFIG_USBDEV_RXFIFO_SIZE + 3) & ~3)
+#define STM32_RXFIFO_WORDS     ((CONFIG_USBDEV_RXFIFO_SIZE + 3) >> 2)
+
+#define STM32_EP0_TXFIFO_BYTES ((CONFIG_USBDEV_EP0_TXFIFO_SIZE + 3) & ~3)
+#define STM32_EP0_TXFIFO_WORDS ((CONFIG_USBDEV_EP0_TXFIFO_SIZE + 3) >> 2)
+
+#define STM32_EP1_TXFIFO_BYTES ((CONFIG_USBDEV_EP1_TXFIFO_SIZE + 3) & ~3)
+#define STM32_EP1_TXFIFO_WORDS ((CONFIG_USBDEV_EP1_TXFIFO_SIZE + 3) >> 2)
+
+#define STM32_EP2_TXFIFO_BYTES ((CONFIG_USBDEV_EP2_TXFIFO_SIZE + 3) & ~3)
+#define STM32_EP2_TXFIFO_WORDS ((CONFIG_USBDEV_EP2_TXFIFO_SIZE + 3) >> 2)
+
+#define STM32_EP3_TXFIFO_BYTES ((CONFIG_USBDEV_EP3_TXFIFO_SIZE + 3) & ~3)
+#define STM32_EP3_TXFIFO_WORDS ((CONFIG_USBDEV_EP3_TXFIFO_SIZE + 3) >> 2)
+
+#define STM32_EP4_TXFIFO_BYTES ((CONFIG_USBDEV_EP4_TXFIFO_SIZE + 3) & ~3)
+#define STM32_EP4_TXFIFO_WORDS ((CONFIG_USBDEV_EP4_TXFIFO_SIZE + 3) >> 2)
+
+#define STM32_EP5_TXFIFO_BYTES ((CONFIG_USBDEV_EP5_TXFIFO_SIZE + 3) & ~3)
+#define STM32_EP5_TXFIFO_WORDS ((CONFIG_USBDEV_EP5_TXFIFO_SIZE + 3) >> 2)
+
+#define STM32_EP6_TXFIFO_BYTES ((CONFIG_USBDEV_EP6_TXFIFO_SIZE + 3) & ~3)
+#define STM32_EP6_TXFIFO_WORDS ((CONFIG_USBDEV_EP6_TXFIFO_SIZE + 3) >> 2)
+
+#define STM32_EP7_TXFIFO_BYTES ((CONFIG_USBDEV_EP7_TXFIFO_SIZE + 3) & ~3)
+#define STM32_EP7_TXFIFO_WORDS ((CONFIG_USBDEV_EP7_TXFIFO_SIZE + 3) >> 2)
+
+#define STM32_EP8_TXFIFO_BYTES ((CONFIG_USBDEV_EP8_TXFIFO_SIZE + 3) & ~3)
+#define STM32_EP8_TXFIFO_WORDS ((CONFIG_USBDEV_EP8_TXFIFO_SIZE + 3) >> 2)
+
+
+#if (STM32_RXFIFO_BYTES + \
+     STM32_EP0_TXFIFO_BYTES + STM32_EP1_TXFIFO_BYTES + STM32_EP2_TXFIFO_BYTES + STM32_EP3_TXFIFO_BYTES + \
+     STM32_EP4_TXFIFO_BYTES + STM32_EP5_TXFIFO_BYTES + STM32_EP6_TXFIFO_BYTES + STM32_EP7_TXFIFO_BYTES + CONFIG_USBDEV_EP8_TXFIFO_SIZE   \
+    ) > STM32_OTG_FIFO_SIZE
+#  error "FIFO allocations exceed FIFO memory size"
+#endif
+
+#define OTG_GINT_RESERVED   (OTG_GINT_RES89   | \
+                            OTG_GINT_RES1617  | \
+                            OTG_GINT_RES22)
+
+
+#define OTG_GINT_RC_W1   (OTG_GINT_MMIS     | \
+                          OTG_GINT_SOF      | \
+                          OTG_GINT_ESUSP    | \
+                          OTG_GINT_USBSUSP  | \
+                          OTG_GINT_USBRST   | \
+                          OTG_GINT_ENUMDNE  | \
+                          OTG_GINT_ISOODRP  | \
+                          OTG_GINT_EOPF     | \
+                          OTG_GINT_IISOIXFR | \
+                          OTG_GINT_IISOOXFR | \
+                          OTG_GINT_RSTDET   | \
+                          OTG_GINT_LPMINT   | \
+                          OTG_GINT_CIDSCHG  | \
+                          OTG_GINT_DISC     | \
+                          OTG_GINT_SRQ      | \
+                          OTG_GINT_WKUP)
+
+
+/* Debug ***********************************************************************/
+/* Trace error codes */
+
+#define STM32_TRACEERR_ALLOCFAIL            0x01
+#define STM32_TRACEERR_BADCLEARFEATURE      0x02
+#define STM32_TRACEERR_BADDEVGETSTATUS      0x03
+#define STM32_TRACEERR_BADEPNO              0x04
+#define STM32_TRACEERR_BADEPGETSTATUS       0x05
+#define STM32_TRACEERR_BADGETCONFIG         0x06
+#define STM32_TRACEERR_BADGETSETDESC        0x07
+#define STM32_TRACEERR_BADGETSTATUS         0x08
+#define STM32_TRACEERR_BADSETADDRESS        0x09
+#define STM32_TRACEERR_BADSETCONFIG         0x0a
+#define STM32_TRACEERR_BADSETFEATURE        0x0b
+#define STM32_TRACEERR_BADTESTMODE          0x0c
+#define STM32_TRACEERR_BINDFAILED           0x0d
+#define STM32_TRACEERR_DISPATCHSTALL        0x0e
+#define STM32_TRACEERR_DRIVER               0x0f
+#define STM32_TRACEERR_DRIVERREGISTERED     0x10
+#define STM32_TRACEERR_EP0NOSETUP           0x11
+#define STM32_TRACEERR_EP0SETUPSTALLED      0x12
+#define STM32_TRACEERR_EPINNULLPACKET       0x13
+#define STM32_TRACEERR_EPINUNEXPECTED       0x14
+#define STM32_TRACEERR_EPOUTNULLPACKET      0x15
+#define STM32_TRACEERR_EPOUTUNEXPECTED      0x16
+#define STM32_TRACEERR_INVALIDCTRLREQ       0x17
+#define STM32_TRACEERR_INVALIDPARMS         0x18
+#define STM32_TRACEERR_IRQREGISTRATION      0x19
+#define STM32_TRACEERR_NOEP                 0x1a
+#define STM32_TRACEERR_NOTCONFIGURED        0x1b
+#define STM32_TRACEERR_EPOUTQEMPTY          0x1c
+#define STM32_TRACEERR_EPINREQEMPTY         0x1d
+#define STM32_TRACEERR_NOOUTSETUP           0x1e
+#define STM32_TRACEERR_POLLTIMEOUT          0x1f
+
+/* Trace interrupt codes */
+
+#define STM32_TRACEINTID_USB                1       /* USB Interrupt entry/exit */
+#define STM32_TRACEINTID_INTPENDING         2       /* On each pass through the loop */
+
+#define STM32_TRACEINTID_EPOUT              (10 + 0) /* First level interrupt decode */
+#define STM32_TRACEINTID_EPIN               (10 + 1)
+#define STM32_TRACEINTID_MISMATCH           (10 + 2)
+#define STM32_TRACEINTID_WAKEUP             (10 + 3)
+#define STM32_TRACEINTID_SUSPEND            (10 + 4)
+#define STM32_TRACEINTID_SOF                (10 + 5)
+#define STM32_TRACEINTID_RXFIFO             (10 + 6)
+#define STM32_TRACEINTID_DEVRESET           (10 + 7)
+#define STM32_TRACEINTID_ENUMDNE            (10 + 8)
+#define STM32_TRACEINTID_IISOIXFR           (10 + 9)
+#define STM32_TRACEINTID_IISOOXFR           (10 + 10)
+#define STM32_TRACEINTID_SRQ                (10 + 11)
+#define STM32_TRACEINTID_OTG                (10 + 12)
+
+#define STM32_TRACEINTID_EPOUT_XFRC         (40 + 0) /* EPOUT second level decode */
+#define STM32_TRACEINTID_EPOUT_EPDISD       (40 + 1)
+#define STM32_TRACEINTID_EPOUT_SETUP        (40 + 2)
+#define STM32_TRACEINTID_DISPATCH           (40 + 3)
+
+#define STM32_TRACEINTID_GETSTATUS          (50 + 0) /* EPOUT third level decode */
+#define STM32_TRACEINTID_EPGETSTATUS        (50 + 1)
+#define STM32_TRACEINTID_DEVGETSTATUS       (50 + 2)
+#define STM32_TRACEINTID_IFGETSTATUS        (50 + 3)
+#define STM32_TRACEINTID_CLEARFEATURE       (50 + 4)
+#define STM32_TRACEINTID_SETFEATURE         (50 + 5)
+#define STM32_TRACEINTID_SETADDRESS         (50 + 6)
+#define STM32_TRACEINTID_GETSETDESC         (50 + 7)
+#define STM32_TRACEINTID_GETCONFIG          (50 + 8)
+#define STM32_TRACEINTID_SETCONFIG          (50 + 9)
+#define STM32_TRACEINTID_GETSETIF           (50 + 10)
+#define STM32_TRACEINTID_SYNCHFRAME         (50 + 11)
+
+#define STM32_TRACEINTID_EPIN_XFRC          (70 + 0) /* EPIN second level decode */
+#define STM32_TRACEINTID_EPIN_TOC           (70 + 1)
+#define STM32_TRACEINTID_EPIN_ITTXFE        (70 + 2)
+#define STM32_TRACEINTID_EPIN_EPDISD        (70 + 3)
+#define STM32_TRACEINTID_EPIN_TXFE          (70 + 4)
+
+#define STM32_TRACEINTID_EPIN_EMPWAIT       (80 + 0) /* EPIN second level decode */
+
+#define STM32_TRACEINTID_OUTNAK             (90 + 0) /* RXFLVL second level decode */
+#define STM32_TRACEINTID_OUTRECVD           (90 + 1)
+#define STM32_TRACEINTID_OUTDONE            (90 + 2)
+#define STM32_TRACEINTID_SETUPDONE          (90 + 3)
+#define STM32_TRACEINTID_SETUPRECVD         (90 + 4)
+
+/* Endpoints ******************************************************************/
+
+/* Odd physical endpoint numbers are IN; even are OUT */
+
+#define STM32_EPPHYIN2LOG(epphy)     ((uint8_t)(epphy)|USB_DIR_IN)
+#define STM32_EPPHYOUT2LOG(epphy)    ((uint8_t)(epphy)|USB_DIR_OUT)
+
+/* Endpoint 0 */
+
+#define EP0                          (0)
+
+/* The set of all enpoints available to the class implementation (1-3) */
+
+#define STM32_EP_AVAILABLE           (0x0e)       /* All available endpoints */
+
+/* Maximum packet sizes for full speed endpoints */
+
+#define STM32_MAXPACKET              (64)         /* Max packet size (1-64) */
+
+/* Delays **********************************************************************/
+
+#define STM32_READY_DELAY            200000
+#define STM32_FLUSH_DELAY            200000
+
+/* Request queue operations ****************************************************/
+
+#define stm32_rqempty(ep)            ((ep)->head == NULL)
+#define stm32_rqpeek(ep)             ((ep)->head)
+
+/* Standard stuff **************************************************************/
+
+#ifndef MIN
+#  define MIN(a,b) ((a) < (b) ? (a) : (b))
+#endif
+
+#ifndef MAX
+#  define MAX(a,b) ((a) > (b) ? (a) : (b))
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* Overall device state */
+
+enum stm32_devstate_e
+{
+  DEVSTATE_DEFAULT = 0,    /* Power-up, unconfigured state.  This state simply
+                            * means that the device is not yet been given an
+                            * address.
+                            *   SET:    At initialization, uninitialization,
+                            *           reset, and whenever the device address
+                            *           is set to zero
+                            *   TESTED: Never
+                            */
+  DEVSTATE_ADDRESSED,      /* Device address has been assigned, not no
+                            * configuration has yet been selected.
+                            *   SET:    When either a non-zero device address
+                            *           is first assigned or when the device
+                            *           is unconfigured (with configuration == 0)
+                            *   TESTED: never
+                            */
+  DEVSTATE_CONFIGURED,     /* Address assigned and configured:
+                            *   SET:    When the device has been addressed and
+                            *           an non-zero configuration has been selected.
+                            *   TESTED: In many places to assure that the USB device
+                            *           has been properly configured by the host.
+                            */
+};
+
+/* Endpoint 0 states */
+
+enum stm32_ep0state_e
+{
+  EP0STATE_IDLE = 0,       /* Idle State, leave on receiving a SETUP packet or
+                            * epsubmit:
+                            *   SET:    In stm32_epin() and stm32_epout() when
+                            *           we revert from request processing to
+                            *           SETUP processing.
+                            *   TESTED: Never
+                            */
+  EP0STATE_SETUP_OUT,      /* OUT SETUP packet received.  Waiting for the DATA
+                            * OUT phase of SETUP Packet to complete before
+                            * processing a SETUP command (without a USB request):
+                            *   SET:    Set in stm32_rxinterrupt() when SETUP OUT
+                            *           packet is received.
+                            *   TESTED: In stm32_ep0out_receive()
+                            */
+  EP0STATE_SETUP_READY,    /* IN SETUP packet received -OR- OUT SETUP packet and
+                            * accompanying data have been received.  Processing
+                            * of SETUP command will happen soon.
+                            *   SET:    (1) stm32_ep0out_receive() when the OUT
+                            *           SETUP data phase completes, or (2)
+                            *           stm32_rxinterrupt() when an IN SETUP is
+                            *           packet received.
+                            *   TESTED: Tested in stm32_epout_interrupt() when
+                            *           SETUP phase is done to see if the SETUP
+                            *           command is ready to be processed.  Also
+                            *           tested in stm32_ep0out_setup() just to
+                            *           double-check that we have a SETUP request
+                            *           and any accompanying data.
+                            */
+  EP0STATE_SETUP_PROCESS,  /* SETUP Packet is being processed by stm32_ep0out_setup():
+                            *   SET:    When SETUP packet received in EP0 OUT
+                            *   TESTED: Never
+                            */
+  EP0STATE_SETUPRESPONSE,  /* Short SETUP response write (without a USB request):
+                            *   SET:    When SETUP response is sent by
+                            *           stm32_ep0in_setupresponse()
+                            *   TESTED: Never
+                            */
+  EP0STATE_DATA_IN,        /* Waiting for data out stage (with a USB request):
+                            *   SET:    In stm32_epin_request() when a write
+                            *           request is processed on EP0.
+                            *   TESTED: In stm32_epin() to see if we should
+                            *           revert to SETUP processing.
+                            */
+  EP0STATE_DATA_OUT        /* Waiting for data in phase to complete ( with a
+                            * USB request)
+                            *   SET:    In stm32_epout_request() when a read
+                            *           request is processed on EP0.
+                            *   TESTED: In stm32_epout() to see if we should
+                            *           revert to SETUP processing
+                            */
+};
+
+/* Parsed control request */
+
+struct stm32_ctrlreq_s
+{
+  uint8_t  type;
+  uint8_t  req;
+  uint16_t value;
+  uint16_t index;
+  uint16_t len;
+};
+
+/* A container for a request so that the request may be retained in a list */
+
+struct stm32_req_s
+{
+  struct usbdev_req_s  req;           /* Standard USB request */
+  struct stm32_req_s  *flink;         /* Supports a singly linked list */
+};
+
+/* This is the internal representation of an endpoint */
+
+struct stm32_ep_s
+{
+  /* Common endpoint fields.  This must be the first thing defined in the
+   * structure so that it is possible to simply cast from struct usbdev_ep_s
+   * to struct stm32_ep_s.
+   */
+
+  struct usbdev_ep_s      ep;          /* Standard endpoint structure */
+
+  /* STM32-specific fields */
+
+  struct stm32_usbdev_s *dev;          /* Reference to private driver data */
+  struct stm32_req_s    *head;         /* Request list for this endpoint */
+  struct stm32_req_s    *tail;
+  uint8_t                epphy;        /* Physical EP address */
+  uint8_t                eptype:2;     /* Endpoint type */
+  uint8_t                active:1;     /* 1: A request is being processed */
+  uint8_t                stalled:1;    /* 1: Endpoint is stalled */
+  uint8_t                isin:1;       /* 1: IN Endpoint */
+  uint8_t                odd:1;        /* 1: Odd frame */
+  uint8_t                zlp:1;        /* 1: Transmit a zero-length-packet (IN EPs only) */
+};
+
+/* This structure retains the state of the USB device controller */
+
+struct stm32_usbdev_s
+{
+  /* Common device fields.  This must be the first thing defined in the
+   * structure so that it is possible to simply cast from struct usbdev_s
+   * to struct stm32_usbdev_s.
+   */
+
+  struct usbdev_s         usbdev;
+
+  /* The bound device class driver */
+
+  struct usbdevclass_driver_s *driver;
+
+  /* STM32-specific fields */
+
+  uint8_t                 stalled:1;     /* 1: Protocol stalled */
+  uint8_t                 selfpowered:1; /* 1: Device is self powered */
+  uint8_t                 addressed:1;   /* 1: Peripheral address has been set */
+  uint8_t                 configured:1;  /* 1: Class driver has been configured */
+  uint8_t                 wakeup:1;      /* 1: Device remote wake-up */
+  uint8_t                 dotest:1;      /* 1: Test mode selected */
+
+  uint8_t                 devstate:4;    /* See enum stm32_devstate_e */
+  uint8_t                 ep0state:4;    /* See enum stm32_ep0state_e */
+  uint8_t                 testmode:4;    /* Selected test mode */
+  uint8_t                 epavail[2];    /* Bitset of available OUT/IN endpoints */
+
+  /* E0 SETUP data buffering.
+   *
+   * ctrlreq:
+   *   The 8-byte SETUP request is received on the EP0 OUT endpoint and is
+   *   saved.
+   *
+   * ep0data
+   *   For OUT SETUP requests, the SETUP data phase must also complete before
+   *   the SETUP command can be processed.  The pack receipt logic will save
+   *   the accompanying EP0 IN data in ep0data[] before the SETUP command is
+   *   processed.
+   *
+   *   For IN SETUP requests, the DATA phase will occur AFTER the SETUP
+   *   control request is processed.  In that case, ep0data[] may be used as
+   *   the response buffer.
+   *
+   * ep0datlen
+   *   Length of OUT DATA received in ep0data[] (Not used with OUT data)
+   */
+
+  struct usb_ctrlreq_s    ctrlreq;
+  uint8_t                 ep0data[CONFIG_USBDEV_SETUP_MAXDATASIZE];
+  uint16_t                ep0datlen;
+
+  /* The endpoint lists */
+
+  struct stm32_ep_s       epin[STM32_NENDPOINTS];
+  struct stm32_ep_s       epout[STM32_NENDPOINTS];
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* Register operations ******************************************************/
+
+#if defined(CONFIG_STM32F7_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
+static uint32_t    stm32_getreg(uint32_t addr);
+static void        stm32_putreg(uint32_t val, uint32_t addr);
+#else
+# define stm32_getreg(addr)     getreg32(addr)
+# define stm32_putreg(val,addr) putreg32(val,addr)
+#endif
+
+/* Request queue operations **************************************************/
+
+static FAR struct stm32_req_s *stm32_req_remfirst(FAR struct stm32_ep_s *privep);
+static bool       stm32_req_addlast(FAR struct stm32_ep_s *privep,
+                    FAR struct stm32_req_s *req);
+
+/* Low level data transfers and request operations ***************************/
+/* Special endpoint 0 data transfer logic */
+
+static void        stm32_ep0in_setupresponse(FAR struct stm32_usbdev_s *priv,
+                     FAR uint8_t *data, uint32_t nbytes);
+static inline void stm32_ep0in_transmitzlp(FAR struct stm32_usbdev_s *priv);
+static void        stm32_ep0in_activate(void);
+
+static void        stm32_ep0out_ctrlsetup(FAR struct stm32_usbdev_s *priv);
+
+/* IN request and TxFIFO handling */
+
+static void        stm32_txfifo_write(FAR struct stm32_ep_s *privep,
+                     FAR uint8_t *buf, int nbytes);
+static void        stm32_epin_transfer(FAR struct stm32_ep_s *privep,
+                     FAR uint8_t *buf, int nbytes);
+static void        stm32_epin_request(FAR struct stm32_usbdev_s *priv,
+                     FAR struct stm32_ep_s *privep);
+
+/* OUT request and RxFIFO handling */
+
+static void        stm32_rxfifo_read(FAR struct stm32_ep_s *privep,
+                     FAR uint8_t *dest, uint16_t len);
+static void        stm32_rxfifo_discard(FAR struct stm32_ep_s *privep, int len);
+static void        stm32_epout_complete(FAR struct stm32_usbdev_s *priv,
+                     FAR struct stm32_ep_s *privep);
+static inline void stm32_ep0out_receive(FAR struct stm32_ep_s *privep, int bcnt);
+static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, int bcnt);
+static void        stm32_epout_request(FAR struct stm32_usbdev_s *priv,
+                     FAR struct stm32_ep_s *privep);
+
+/* General request handling */
+
+static void        stm32_ep_flush(FAR struct stm32_ep_s *privep);
+static void        stm32_req_complete(FAR struct stm32_ep_s *privep,
+                     int16_t result);
+static void        stm32_req_cancel(FAR struct stm32_ep_s *privep,
+                     int16_t status);
+
+/* Interrupt handling ********************************************************/
+
+static struct      stm32_ep_s *stm32_ep_findbyaddr(struct stm32_usbdev_s *priv,
+                     uint16_t eplog);
+static int         stm32_req_dispatch(FAR struct stm32_usbdev_s *priv,
+                     FAR const struct usb_ctrlreq_s *ctrl);
+static void        stm32_usbreset(FAR struct stm32_usbdev_s *priv);
+
+/* Second level OUT endpoint interrupt processing */
+
+static inline void stm32_ep0out_testmode(FAR struct stm32_usbdev_s *priv,
+                     uint16_t index);
+static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv,
+                     FAR struct stm32_ctrlreq_s *ctrlreq);
+static inline void stm32_ep0out_setup(struct stm32_usbdev_s *priv);
+static inline void stm32_epout(FAR struct stm32_usbdev_s *priv,
+                     uint8_t epno);
+static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv);
+
+/* Second level IN endpoint interrupt processing */
+
+static inline void stm32_epin_runtestmode(FAR struct stm32_usbdev_s *priv);
+static inline void stm32_epin(FAR struct stm32_usbdev_s *priv, uint8_t epno);
+static inline void stm32_epin_txfifoempty(FAR struct stm32_usbdev_s *priv,
+                     int epno);
+static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv);
+
+/* Other second level interrupt processing */
+
+static inline void stm32_resumeinterrupt(FAR struct stm32_usbdev_s *priv);
+static inline void stm32_suspendinterrupt(FAR struct stm32_usbdev_s *priv);
+static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv);
+static inline void stm32_enuminterrupt(FAR struct stm32_usbdev_s *priv);
+#ifdef CONFIG_USBDEV_ISOCHRONOUS
+static inline void stm32_isocininterrupt(FAR struct stm32_usbdev_s *priv);
+static inline void stm32_isocoutinterrupt(FAR struct stm32_usbdev_s *priv);
+#endif
+#ifdef CONFIG_USBDEV_VBUSSENSING
+static inline void stm32_sessioninterrupt(FAR struct stm32_usbdev_s *priv);
+static inline void stm32_otginterrupt(FAR struct stm32_usbdev_s *priv);
+#endif
+
+/* First level interrupt processing */
+
+static int         stm32_usbinterrupt(int irq, FAR void *context, FAR void *arg);
+
+/* Endpoint operations *********************************************************/
+/* Global OUT NAK controls */
+
+static void        stm32_enablegonak(FAR struct stm32_ep_s *privep);
+static void        stm32_disablegonak(FAR struct stm32_ep_s *privep);
+
+/* Endpoint configuration */
+
+static int         stm32_epout_configure(FAR struct stm32_ep_s *privep,
+                     uint8_t eptype, uint16_t maxpacket);
+static int         stm32_epin_configure(FAR struct stm32_ep_s *privep,
+                     uint8_t eptype, uint16_t maxpacket);
+static int         stm32_ep_configure(FAR struct usbdev_ep_s *ep,
+                     FAR const struct usb_epdesc_s *desc, bool last);
+static void        stm32_ep0_configure(FAR struct stm32_usbdev_s *priv);
+
+/* Endpoint disable */
+
+static void        stm32_epout_disable(FAR struct stm32_ep_s *privep);
+static void        stm32_epin_disable(FAR struct stm32_ep_s *privep);
+static int         stm32_ep_disable(FAR struct usbdev_ep_s *ep);
+
+/* Endpoint request management */
+
+static FAR struct usbdev_req_s *stm32_ep_allocreq(FAR struct usbdev_ep_s *ep);
+static void        stm32_ep_freereq(FAR struct usbdev_ep_s *ep,
+                     FAR struct usbdev_req_s *);
+
+/* Endpoint buffer management */
+
+#ifdef CONFIG_USBDEV_DMA
+static void       *stm32_ep_allocbuffer(FAR struct usbdev_ep_s *ep,
+                     unsigned bytes);
+static void        stm32_ep_freebuffer(FAR struct usbdev_ep_s *ep,
+                     FAR void *buf);
+#endif
+
+/* Endpoint request submission */
+
+static int         stm32_ep_submit(FAR struct usbdev_ep_s *ep,
+                     struct usbdev_req_s *req);
+
+/* Endpoint request cancellation */
+
+static int         stm32_ep_cancel(FAR struct usbdev_ep_s *ep,
+                     struct usbdev_req_s *req);
+
+/* Stall handling */
+
+static int         stm32_epout_setstall(FAR struct stm32_ep_s *privep);
+static int         stm32_epin_setstall(FAR struct stm32_ep_s *privep);
+static int         stm32_ep_setstall(FAR struct stm32_ep_s *privep);
+static int         stm32_ep_clrstall(FAR struct stm32_ep_s *privep);
+static int         stm32_ep_stall(FAR struct usbdev_ep_s *ep, bool resume);
+static void        stm32_ep0_stall(FAR struct stm32_usbdev_s *priv);
+
+/* Endpoint allocation */
+
+static FAR struct usbdev_ep_s *stm32_ep_alloc(FAR struct usbdev_s *dev,
+                     uint8_t epno, bool in, uint8_t eptype);
+static void        stm32_ep_free(FAR struct usbdev_s *dev,
+                     FAR struct usbdev_ep_s *ep);
+
+/* USB device controller operations ********************************************/
+
+static int         stm32_getframe(struct usbdev_s *dev);
+static int         stm32_wakeup(struct usbdev_s *dev);
+static int         stm32_selfpowered(struct usbdev_s *dev, bool selfpowered);
+static int         stm32_pullup(struct usbdev_s *dev, bool enable);
+static void        stm32_setaddress(struct stm32_usbdev_s *priv,
+                     uint16_t address);
+static int         stm32_txfifo_flush(uint32_t txfnum);
+static int         stm32_rxfifo_flush(void);
+
+/* Initialization **************************************************************/
+
+static void        stm32_swinitialize(FAR struct stm32_usbdev_s *priv);
+static void        stm32_hwinitialize(FAR struct stm32_usbdev_s *priv);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Since there is only a single USB interface, all status information can be
+ * be simply retained in a single global instance.
+ */
+
+static struct stm32_usbdev_s g_otghsdev;
+
+static const struct usbdev_epops_s g_epops =
+{
+  .configure   = stm32_ep_configure,
+  .disable     = stm32_ep_disable,
+  .allocreq    = stm32_ep_allocreq,
+  .freereq     = stm32_ep_freereq,
+#ifdef CONFIG_USBDEV_DMA
+  .allocbuffer = stm32_ep_allocbuffer,
+  .freebuffer  = stm32_ep_freebuffer,
+#endif
+  .submit      = stm32_ep_submit,
+  .cancel      = stm32_ep_cancel,
+  .stall       = stm32_ep_stall,
+};
+
+static const struct usbdev_ops_s g_devops =
+{
+  .allocep     = stm32_ep_alloc,
+  .freeep      = stm32_ep_free,
+  .getframe    = stm32_getframe,
+  .wakeup      = stm32_wakeup,
+  .selfpowered = stm32_selfpowered,
+  .pullup      = stm32_pullup,
+};
+
+/* Device error strings that may be enabled for more descriptive USB trace
+ * output.
+ */
+
+#ifdef CONFIG_USBDEV_TRACE_STRINGS
+const struct trace_msg_t g_usb_trace_strings_deverror[] =
+{
+  TRACE_STR(STM32_TRACEERR_ALLOCFAIL       ),
+  TRACE_STR(STM32_TRACEERR_BADCLEARFEATURE ),
+  TRACE_STR(STM32_TRACEERR_BADDEVGETSTATUS ),
+  TRACE_STR(STM32_TRACEERR_BADEPNO         ),
+  TRACE_STR(STM32_TRACEERR_BADEPGETSTATUS  ),
+  TRACE_STR(STM32_TRACEERR_BADGETCONFIG    ),
+  TRACE_STR(STM32_TRACEERR_BADGETSETDESC   ),
+  TRACE_STR(STM32_TRACEERR_BADGETSTATUS    ),
+  TRACE_STR(STM32_TRACEERR_BADSETADDRESS   ),
+  TRACE_STR(STM32_TRACEERR_BADSETCONFIG    ),
+  TRACE_STR(STM32_TRACEERR_BADSETFEATURE   ),
+  TRACE_STR(STM32_TRACEERR_BADTESTMODE     ),
+  TRACE_STR(STM32_TRACEERR_BINDFAILED      ),
+  TRACE_STR(STM32_TRACEERR_DISPATCHSTALL   ),
+  TRACE_STR(STM32_TRACEERR_DRIVER          ),
+  TRACE_STR(STM32_TRACEERR_DRIVERREGISTERED),
+  TRACE_STR(STM32_TRACEERR_EP0NOSETUP      ),
+  TRACE_STR(STM32_TRACEERR_EP0SETUPSTALLED ),
+  TRACE_STR(STM32_TRACEERR_EPINNULLPACKET  ),
+  TRACE_STR(STM32_TRACEERR_EPINUNEXPECTED  ),
+  TRACE_STR(STM32_TRACEERR_EPOUTNULLPACKET ),
+  TRACE_STR(STM32_TRACEERR_EPOUTUNEXPECTED ),
+  TRACE_STR(STM32_TRACEERR_INVALIDCTRLREQ  ),
+  TRACE_STR(STM32_TRACEERR_INVALIDPARMS    ),
+  TRACE_STR(STM32_TRACEERR_IRQREGISTRATION ),
+  TRACE_STR(STM32_TRACEERR_NOEP            ),
+  TRACE_STR(STM32_TRACEERR_NOTCONFIGURED   ),
+  TRACE_STR(STM32_TRACEERR_EPOUTQEMPTY     ),
+  TRACE_STR(STM32_TRACEERR_EPINREQEMPTY    ),
+  TRACE_STR(STM32_TRACEERR_NOOUTSETUP      ),
+  TRACE_STR(STM32_TRACEERR_POLLTIMEOUT     ),
+  TRACE_STR_END
+};
+#endif
+
+/* Interrupt event strings that may be enabled for more descriptive USB trace
+ * output.
+ */
+
+#ifdef CONFIG_USBDEV_TRACE_STRINGS
+const struct trace_msg_t g_usb_trace_strings_intdecode[] =
+{
+  TRACE_STR(STM32_TRACEINTID_USB         ),
+  TRACE_STR(STM32_TRACEINTID_INTPENDING  ),
+  TRACE_STR(STM32_TRACEINTID_EPOUT       ),
+  TRACE_STR(STM32_TRACEINTID_EPIN        ),
+  TRACE_STR(STM32_TRACEINTID_MISMATCH    ),
+  TRACE_STR(STM32_TRACEINTID_WAKEUP      ),
+  TRACE_STR(STM32_TRACEINTID_SUSPEND     ),
+  TRACE_STR(STM32_TRACEINTID_SOF         ),
+  TRACE_STR(STM32_TRACEINTID_RXFIFO      ),
+  TRACE_STR(STM32_TRACEINTID_DEVRESET    ),
+  TRACE_STR(STM32_TRACEINTID_ENUMDNE     ),
+  TRACE_STR(STM32_TRACEINTID_IISOIXFR    ),
+  TRACE_STR(STM32_TRACEINTID_IISOOXFR    ),
+  TRACE_STR(STM32_TRACEINTID_SRQ         ),
+  TRACE_STR(STM32_TRACEINTID_OTG         ),
+  TRACE_STR(STM32_TRACEINTID_EPOUT_XFRC  ),
+  TRACE_STR(STM32_TRACEINTID_EPOUT_EPDISD),
+  TRACE_STR(STM32_TRACEINTID_EPOUT_SETUP ),
+  TRACE_STR(STM32_TRACEINTID_DISPATCH    ),
+  TRACE_STR(STM32_TRACEINTID_GETSTATUS   ),
+  TRACE_STR(STM32_TRACEINTID_EPGETSTATUS ),
+  TRACE_STR(STM32_TRACEINTID_DEVGETSTATUS),
+  TRACE_STR(STM32_TRACEINTID_IFGETSTATUS ),
+  TRACE_STR(STM32_TRACEINTID_CLEARFEATURE),
+  TRACE_STR(STM32_TRACEINTID_SETFEATURE  ),
+  TRACE_STR(STM32_TRACEINTID_SETADDRESS  ),
+  TRACE_STR(STM32_TRACEINTID_GETSETDESC  ),
+  TRACE_STR(STM32_TRACEINTID_GETCONFIG   ),
+  TRACE_STR(STM32_TRACEINTID_SETCONFIG   ),
+  TRACE_STR(STM32_TRACEINTID_GETSETIF    ),
+  TRACE_STR(STM32_TRACEINTID_SYNCHFRAME  ),
+  TRACE_STR(STM32_TRACEINTID_EPIN_XFRC   ),
+  TRACE_STR(STM32_TRACEINTID_EPIN_TOC    ),
+  TRACE_STR(STM32_TRACEINTID_EPIN_ITTXFE ),
+  TRACE_STR(STM32_TRACEINTID_EPIN_EPDISD ),
+  TRACE_STR(STM32_TRACEINTID_EPIN_TXFE   ),
+  TRACE_STR(STM32_TRACEINTID_EPIN_EMPWAIT),
+  TRACE_STR(STM32_TRACEINTID_OUTNAK      ),
+  TRACE_STR(STM32_TRACEINTID_OUTRECVD    ),
+  TRACE_STR(STM32_TRACEINTID_OUTDONE     ),
+  TRACE_STR(STM32_TRACEINTID_SETUPDONE   ),
+  TRACE_STR(STM32_TRACEINTID_SETUPRECVD  ),
+  TRACE_STR_END
+};
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_getreg
+ *
+ * Description:
+ *   Get the contents of an STM32 register
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_STM32F7_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
+static uint32_t stm32_getreg(uint32_t addr)
+{
+  static uint32_t prevaddr = 0;
+  static uint32_t preval = 0;
+  static uint32_t count = 0;
+
+  /* Read the value from the register */
+
+  uint32_t val = getreg32(addr);
+
+  /* Is this the same value that we read from the same register last time?  Are
+   * we polling the register?  If so, suppress some of the output.
+   */
+
+  if (addr == prevaddr && val == preval)
+    {
+      if (count == 0xffffffff || ++count > 3)
+        {
+          if (count == 4)
+            {
+              uinfo("...\n");
+            }
+
+          return val;
+        }
+    }
+
+  /* No this is a new address or value */
+
+  else
+    {
+      /* Did we print "..." for the previous value? */
+
+      if (count > 3)
+        {
+          /* Yes.. then show how many times the value repeated */
+
+          uinfo("[repeats %d more times]\n", count-3);
+        }
+
+      /* Save the new address, value, and count */
+
+      prevaddr = addr;
+      preval   = val;
+      count    = 1;
+    }
+
+  /* Show the register value read */
+
+  uinfo("%08x->%08x\n", addr, val);
+  return val;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_putreg
+ *
+ * Description:
+ *   Set the contents of an STM32 register to a value
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_STM32F7_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
+static void stm32_putreg(uint32_t val, uint32_t addr)
+{
+  /* Show the register value being written */
+
+  uinfo("%08x<-%08x\n", addr, val);
+
+  /* Write the value */
+
+  putreg32(val, addr);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_req_remfirst
+ *
+ * Description:
+ *   Remove a request from the head of an endpoint request queue
+ *
+ ****************************************************************************/
+
+static FAR struct stm32_req_s *stm32_req_remfirst(FAR struct stm32_ep_s *privep)
+{
+  FAR struct stm32_req_s *ret = privep->head;
+
+  if (ret)
+    {
+      privep->head = ret->flink;
+      if (!privep->head)
+        {
+          privep->tail = NULL;
+        }
+
+      ret->flink = NULL;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32_req_addlast
+ *
+ * Description:
+ *   Add a request to the end of an endpoint request queue
+ *
+ ****************************************************************************/
+
+static bool stm32_req_addlast(FAR struct stm32_ep_s *privep,
+                              FAR struct stm32_req_s *req)
+{
+  bool is_empty = !privep->head;
+
+  req->flink = NULL;
+  if (is_empty)
+    {
+      privep->head = req;
+      privep->tail = req;
+    }
+  else
+    {
+      privep->tail->flink = req;
+      privep->tail        = req;
+    }
+
+  return is_empty;
+}
+
+/****************************************************************************
+ * Name: stm32_ep0in_setupresponse
+ *
+ * Description:
+ *   Schedule a short transfer on Endpoint 0 (IN or OUT)
+ *
+ ****************************************************************************/
+
+static void stm32_ep0in_setupresponse(FAR struct stm32_usbdev_s *priv,
+                                      FAR uint8_t *buf, uint32_t nbytes)
+{
+  stm32_epin_transfer(&priv->epin[EP0], buf, nbytes);
+  priv->ep0state = EP0STATE_SETUPRESPONSE;
+  stm32_ep0out_ctrlsetup(priv);
+}
+
+/****************************************************************************
+ * Name: stm32_ep0in_transmitzlp
+ *
+ * Description:
+ *   Send a zero length packet (ZLP) on endpoint 0 IN
+ *
+ ****************************************************************************/
+
+static inline void stm32_ep0in_transmitzlp(FAR struct stm32_usbdev_s *priv)
+{
+  stm32_ep0in_setupresponse(priv, NULL, 0);
+}
+
+/****************************************************************************
+ * Name: stm32_ep0in_activate
+ *
+ * Description:
+ *   Activate the endpoint 0 IN endpoint.
+ *
+ ****************************************************************************/
+
+static void stm32_ep0in_activate(void)
+{
+  uint32_t regval;
+
+  /* Set the max packet size  of the IN EP. */
+
+  regval  = stm32_getreg(STM32_OTG_DIEPCTL(0));
+  regval &= ~OTG_DIEPCTL0_MPSIZ_MASK;
+
+#if CONFIG_USBDEV_EP0_MAXSIZE == 8
+  regval |= OTG_DIEPCTL0_MPSIZ_8;
+#elif CONFIG_USBDEV_EP0_MAXSIZE == 16
+  regval |= OTG_DIEPCTL0_MPSIZ_16;
+#elif CONFIG_USBDEV_EP0_MAXSIZE == 32
+  regval |= OTG_DIEPCTL0_MPSIZ_32;
+#elif CONFIG_USBDEV_EP0_MAXSIZE == 64
+  regval |= OTG_DIEPCTL0_MPSIZ_64;
+#else
+#  error "Unsupported value of CONFIG_USBDEV_EP0_MAXSIZE"
+#endif
+
+  stm32_putreg(regval, STM32_OTG_DIEPCTL(0));
+
+  /* Clear global IN NAK */
+
+  regval  = stm32_getreg(STM32_OTG_DCTL);
+  regval |= OTG_DCTL_CGINAK;
+  stm32_putreg(regval, STM32_OTG_DCTL);
+}
+
+/****************************************************************************
+ * Name: stm32_ep0out_ctrlsetup
+ *
+ * Description:
+ *   Setup to receive a SETUP packet.
+ *
+ ****************************************************************************/
+
+static void stm32_ep0out_ctrlsetup(FAR struct stm32_usbdev_s *priv)
+{
+  uint32_t regval;
+
+  /* Setup the hardware to perform the SETUP transfer */
+
+  regval = (USB_SIZEOF_CTRLREQ * 3 << OTG_DOEPTSIZ0_XFRSIZ_SHIFT) |
+           (OTG_DOEPTSIZ0_PKTCNT) |
+           (3 << OTG_DOEPTSIZ0_STUPCNT_SHIFT);
+  stm32_putreg(regval, STM32_OTG_DOEPTSIZ(0));
+
+  /* Then clear NAKing and enable the transfer */
+
+  regval  = stm32_getreg(STM32_OTG_DOEPCTL(0));
+  regval |= (OTG_DOEPCTL0_CNAK | OTG_DOEPCTL0_EPENA);
+  stm32_putreg(regval, STM32_OTG_DOEPCTL(0));
+}
+
+/****************************************************************************
+ * Name: stm32_txfifo_write
+ *
+ * Description:
+ *   Send data to the endpoint's TxFIFO.
+ *
+ ****************************************************************************/
+
+static void stm32_txfifo_write(FAR struct stm32_ep_s *privep,
+                               FAR uint8_t *buf, int nbytes)
+{
+  uint32_t regaddr;
+  uint32_t regval;
+  int nwords;
+  int i;
+
+  /* Convert the number of bytes to words */
+
+  nwords = (nbytes + 3) >> 2;
+
+  /* Get the TxFIFO for this endpoint (same as the endpoint number) */
+
+  regaddr = STM32_OTG_DFIFO_DEP(privep->epphy);
+
+  /* Then transfer each word to the TxFIFO */
+
+  for (i = 0; i < nwords; i++)
+    {
+      /* Read four bytes from the source buffer (to avoid unaligned accesses)
+       * and pack these into one 32-bit word (little endian).
+       */
+
+      regval  = (uint32_t)*buf++;
+      regval |= ((uint32_t)*buf++) << 8;
+      regval |= ((uint32_t)*buf++) << 16;
+      regval |= ((uint32_t)*buf++) << 24;
+
+      /* Then write the packet data to the TxFIFO */
+
+      stm32_putreg(regval, regaddr);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_epin_transfer
+ *
+ * Description:
+ *   Start the Tx data transfer
+ *
+ ****************************************************************************/
+
+static void stm32_epin_transfer(FAR struct stm32_ep_s *privep,
+                                FAR uint8_t *buf, int nbytes)
+{
+  uint32_t pktcnt;
+  uint32_t regval;
+
+  /* Read the DIEPSIZx register */
+
+  regval = stm32_getreg(STM32_OTG_DIEPTSIZ(privep->epphy));
+
+  /* Clear the XFRSIZ, PKTCNT, and MCNT field of the DIEPSIZx register */
+
+  regval &= ~(OTG_DIEPTSIZ_XFRSIZ_MASK | OTG_DIEPTSIZ_PKTCNT_MASK |
+              OTG_DIEPTSIZ_MCNT_MASK);
+
+  /* Are we sending a zero length packet (ZLP) */
+
+  if (nbytes == 0)
+    {
+      /* Yes.. leave the transfer size at zero and set the packet count to 1 */
+
+      pktcnt = 1;
+    }
+  else
+    {
+      /* No.. Program the transfer size and packet count .  First calculate:
+       *
+       * xfrsize = The total number of bytes to be sent.
+       * pktcnt  = the number of packets (of maxpacket bytes) required to
+       *   perform the transfer.
+       */
+
+      pktcnt  = ((uint32_t)nbytes + (privep->ep.maxpacket - 1)) / privep->ep.maxpacket;
+    }
+
+  /* Set the XFRSIZ and PKTCNT */
+
+  regval |= (pktcnt << OTG_DIEPTSIZ_PKTCNT_SHIFT);
+  regval |= ((uint32_t)nbytes << OTG_DIEPTSIZ_XFRSIZ_SHIFT);
+
+  /* If this is an isochronous endpoint, then set the multi-count field to
+   * the PKTCNT as well.
+   */
+
+  if (privep->eptype == USB_EP_ATTR_XFER_ISOC)
+    {
+      regval |= (pktcnt << OTG_DIEPTSIZ_MCNT_SHIFT);
+    }
+
+  /* Save DIEPSIZx register value */
+
+  stm32_putreg(regval, STM32_OTG_DIEPTSIZ(privep->epphy));
+
+  /* Read the DIEPCTLx register */
+
+  regval = stm32_getreg(STM32_OTG_DIEPCTL(privep->epphy));
+
+  /* If this is an isochronous endpoint, then set the even/odd frame bit
+   * the DIEPCTLx register.
+   */
+
+  if (privep->eptype == USB_EP_ATTR_XFER_ISOC)
+    {
+      /* Check bit 0 of the frame number of the received SOF and set the
+       * even/odd frame to match.
+       */
+
+      uint32_t status = stm32_getreg(STM32_OTG_DSTS);
+      if ((status & OTG_DSTS_SOFFN0) == OTG_DSTS_SOFFN_EVEN)
+        {
+          regval |= OTG_DIEPCTL_SEVNFRM;
+        }
+      else
+        {
+          regval |= OTG_DIEPCTL_SODDFRM;
+        }
+    }
+
+  /* EP enable, IN data in FIFO */
+
+  regval &= ~OTG_DIEPCTL_EPDIS;
+  regval |= (OTG_DIEPCTL_CNAK | OTG_DIEPCTL_EPENA);
+  stm32_putreg(regval, STM32_OTG_DIEPCTL(privep->epphy));
+
+  /* Transfer the data to the TxFIFO.  At this point, the caller has already
+   * assured that there is sufficient space in the TxFIFO to hold the transfer
+   * we can just blindly continue.
+   */
+
+  stm32_txfifo_write(privep, buf, nbytes);
+}
+
+/****************************************************************************
+ * Name: stm32_epin_request
+ *
+ * Description:
+ *   Begin or continue write request processing.
+ *
+ ****************************************************************************/
+
+static void stm32_epin_request(FAR struct stm32_usbdev_s *priv,
+                               FAR struct stm32_ep_s *privep)
+{
+  struct stm32_req_s *privreq;
+  uint32_t regaddr;
+  uint32_t regval;
+  uint8_t *buf;
+  int nbytes;
+  int nwords;
+  int bytesleft;
+
+  /* We get here in one of four possible ways.  From three interrupting
+   * events:
+   *
+   * 1. From stm32_epin as part of the transfer complete interrupt processing
+   *    This interrupt indicates that the last transfer has completed.
+   * 2. As part of the ITTXFE interrupt processing.  That interrupt indicates
+   *    that an IN token was received when the associated TxFIFO was empty.
+   * 3. From stm32_epin_txfifoempty as part of the TXFE interrupt processing.
+   *    The TXFE interrupt is only enabled when the TxFIFO is full and the
+   *    software must wait for space to become available in the TxFIFO.
+   *
+   * And this function may be called immediately when the write request is
+   * queue to start up the next transaction.
+   *
+   * 4. From stm32_ep_submit when a new write request is received WHILE the
+   *    endpoint is not active (privep->active == false).
+   */
+
+  /* Check the request from the head of the endpoint request queue */
+
+  privreq = stm32_rqpeek(privep);
+  if (!privreq)
+    {
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EPINREQEMPTY), privep->epphy);
+
+      /* There is no TX transfer in progress and no new pending TX
+       * requests to send.  To stop transmitting any data on a particular
+       * IN endpoint, the application must set the IN NAK bit. To set this
+       * bit, the following field must be programmed.
+       */
+
+      regaddr = STM32_OTG_DIEPCTL(privep->epphy);
+      regval  = stm32_getreg(regaddr);
+      regval |= OTG_DIEPCTL_SNAK;
+      stm32_putreg(regval, regaddr);
+
+      /* The endpoint is no longer active */
+
+      privep->active = false;
+      return;
+    }
+
+  uinfo("EP%d req=%p: len=%d xfrd=%d zlp=%d\n",
+          privep->epphy, privreq, privreq->req.len,
+          privreq->req.xfrd, privep->zlp);
+
+  /* Check for a special case:  If we are just starting a request (xfrd==0) and
+   * the class driver is trying to send a zero-length packet (len==0).  Then set
+   * the ZLP flag so that the packet will be sent.
+   */
+
+  if (privreq->req.len == 0)
+    {
+      /* The ZLP flag is set TRUE whenever we want to force the driver to
+       * send a zero-length-packet on the next pass through the loop (below).
+       * The flag is cleared whenever a packet is sent in the loop below.
+       */
+
+       privep->zlp = true;
+    }
+
+  /* Add one more packet to the TxFIFO.  We will wait for the transfer
+   * complete event before we add the next packet (or part of a packet
+   * to the TxFIFO).
+   *
+   * The documentation says that we can can multiple packets to the TxFIFO,
+   * but it seems that we need to get the transfer complete event before
+   * we can add the next (or maybe I have got something wrong?)
+   */
+
+#if 0
+  while (privreq->req.xfrd < privreq->req.len || privep->zlp)
+#else
+  if (privreq->req.xfrd < privreq->req.len || privep->zlp)
+#endif
+    {
+      /* Get the number of bytes left to be sent in the request */
+
+      bytesleft = privreq->req.len - privreq->req.xfrd;
+      nbytes    = bytesleft;
+
+      /* Assume no zero-length-packet on the next pass through this loop */
+
+      privep->zlp = false;
+
+      /* Limit the size of the transfer to one full packet and handle
+       * zero-length packets (ZLPs).
+       */
+
+      if (nbytes > 0)
+        {
+          /* Either send the maxpacketsize or all of the remaining data in
+           * the request.
+           */
+
+          if (nbytes >= privep->ep.maxpacket)
+            {
+              nbytes =  privep->ep.maxpacket;
+
+              /* Handle the case where this packet is exactly the
+               * maxpacketsize.  Do we need to send a zero-length packet
+               * in this case?
+               */
+
+              if (bytesleft ==  privep->ep.maxpacket &&
+                 (privreq->req.flags & USBDEV_REQFLAGS_NULLPKT) != 0)
+                {
+                  /* The ZLP flag is set TRUE whenever we want to force
+                   * the driver to send a zero-length-packet on the next
+                   * pass through this loop. The flag is cleared (above)
+                   * whenever we are committed to sending any packet and
+                   * set here when we want to force one more pass through
+                   * the loop.
+                   */
+
+                  privep->zlp = true;
+                }
+            }
+        }
+
+      /* Get the transfer size in 32-bit words */
+
+      nwords = (nbytes + 3) >> 2;
+
+      /* Get the number of 32-bit words available in the TxFIFO. The
+       * DXTFSTS indicates the amount of free space available in the
+       * endpoint TxFIFO. Values are in terms of 32-bit words:
+       *
+       *   0: Endpoint TxFIFO is full
+       *   1: 1 word available
+       *   2: 2 words available
+       *   n: n words available
+       */
+
+      regaddr = STM32_OTG_DTXFSTS(privep->epphy);
+
+      /* Check for space in the TxFIFO.  If space in the TxFIFO is not
+       * available, then set up an interrupt to resume the transfer when
+       * the TxFIFO is empty.
+       */
+
+      regval = stm32_getreg(regaddr);
+      if ((int)(regval & OTG_DTXFSTS_MASK) < nwords)
+        {
+          usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_EMPWAIT), (uint16_t)regval);
+
+          /* There is insufficient space in the TxFIFO.  Wait for a TxFIFO
+           * empty interrupt and try again.
+           */
+
+          uint32_t empmsk = stm32_getreg(STM32_OTG_DIEPEMPMSK);
+          empmsk |= OTG_DIEPEMPMSK(privep->epphy);
+          stm32_putreg(empmsk, STM32_OTG_DIEPEMPMSK);
+
+          /* Terminate the transfer.  We will try again when the TxFIFO empty
+           * interrupt is received.
+           */
+
+          return;
+        }
+
+      /* Transfer data to the TxFIFO */
+
+      buf = privreq->req.buf + privreq->req.xfrd;
+      stm32_epin_transfer(privep, buf, nbytes);
+
+      /* If it was not before, the OUT endpoint is now actively transferring
+       * data.
+       */
+
+      privep->active = true;
+
+      /* EP0 is a special case */
+
+      if (privep->epphy == EP0)
+        {
+          priv->ep0state = EP0STATE_DATA_IN;
+        }
+
+      /* Update for the next time through the loop */
+
+      privreq->req.xfrd += nbytes;
+    }
+
+  /* Note that the ZLP, if any, must be sent as a separate transfer.  The need
+   * for a ZLP is indicated by privep->zlp.  If all of the bytes were sent
+   * (including any final null packet) then we are finished with the transfer
+   */
+
+  if (privreq->req.xfrd >= privreq->req.len && !privep->zlp)
+    {
+      usbtrace(TRACE_COMPLETE(privep->epphy), privreq->req.xfrd);
+
+      /* We are finished with the request (although the transfer has not
+       * yet completed).
+       */
+
+      stm32_req_complete(privep, OK);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_rxfifo_read
+ *
+ * Description:
+ *   Read packet from the RxFIFO into a read request.
+ *
+ ****************************************************************************/
+
+static void stm32_rxfifo_read(FAR struct stm32_ep_s *privep,
+                              FAR uint8_t *dest, uint16_t len)
+{
+  uint32_t regaddr;
+  int i;
+
+  /* Get the address of the RxFIFO.  Note:  there is only one RxFIFO so
+   * we might as well use the address associated with EP0.
+   */
+
+  regaddr = STM32_OTG_DFIFO_DEP(EP0);
+
+  /* Read 32-bits and write 4 x 8-bits at time (to avoid unaligned accesses) */
+
+  for (i = 0; i < len; i += 4)
+    {
+      union
+      {
+        uint32_t w;
+        uint8_t  b[4];
+      } data;
+
+      /* Read 1 x 32-bits of EP0 packet data */
+
+      data.w = stm32_getreg(regaddr);
+
+      /* Write 4 x 8-bits of EP0 packet data */
+
+      *dest++ = data.b[0];
+      *dest++ = data.b[1];
+      *dest++ = data.b[2];
+      *dest++ = data.b[3];
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_rxfifo_discard
+ *
+ * Description:
+ *   Discard packet data from the RxFIFO.
+ *
+ ****************************************************************************/
+
+static void stm32_rxfifo_discard(FAR struct stm32_ep_s *privep, int len)
+{
+  if (len > 0)
+    {
+      uint32_t regaddr;
+      int i;
+
+      /* Get the address of the RxFIFO  Note:  there is only one RxFIFO so
+       * we might as well use the address associated with EP0.
+       */
+
+      regaddr = STM32_OTG_DFIFO_DEP(EP0);
+
+      /* Read 32-bits at time */
+
+      for (i = 0; i < len; i += 4)
+        {
+          volatile uint32_t data = stm32_getreg(regaddr);
+          (void)data;
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_epout_complete
+ *
+ * Description:
+ *   This function is called when an OUT transfer complete interrupt is
+ *   received.  It completes the read request at the head of the endpoint's
+ *   request queue.
+ *
+ ****************************************************************************/
+
+static void stm32_epout_complete(FAR struct stm32_usbdev_s *priv,
+                                 FAR struct stm32_ep_s *privep)
+{
+  struct stm32_req_s *privreq;
+
+  /* Since a transfer just completed, there must be a read request at the head of
+   * the endpoint request queue.
+   */
+
+  privreq = stm32_rqpeek(privep);
+  DEBUGASSERT(privreq);
+
+  if (!privreq)
+    {
+      /* An OUT transfer completed, but no packet to receive the data.  This
+       * should not happen.
+       */
+
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EPOUTQEMPTY), privep->epphy);
+      privep->active = false;
+      return;
+    }
+
+  uinfo("EP%d: len=%d xfrd=%d\n",
+          privep->epphy, privreq->req.len, privreq->req.xfrd);
+
+  /* Return the completed read request to the class driver and mark the state
+   * IDLE.
+   */
+
+  usbtrace(TRACE_COMPLETE(privep->epphy), privreq->req.xfrd);
+  stm32_req_complete(privep, OK);
+  privep->active = false;
+
+  /* Now set up the next read request (if any) */
+
+  stm32_epout_request(priv, privep);
+}
+
+/****************************************************************************
+ * Name: stm32_ep0out_receive
+ *
+ * Description:
+ *   This function is called from the RXFLVL interrupt handler when new incoming
+ *   data is available in the endpoint's RxFIFO.  This function will simply
+ *   copy the incoming data into pending request's data buffer.
+ *
+ ****************************************************************************/
+
+static inline void stm32_ep0out_receive(FAR struct stm32_ep_s *privep, int bcnt)
+{
+  FAR struct stm32_usbdev_s *priv;
+
+  /* Sanity Checking */
+
+  DEBUGASSERT(privep && privep->ep.priv);
+  priv = (FAR struct stm32_usbdev_s *)privep->ep.priv;
+
+  uinfo("EP0: bcnt=%d\n", bcnt);
+  usbtrace(TRACE_READ(EP0), bcnt);
+
+  /* Verify that an OUT SETUP request as received before this data was
+   * received in the RxFIFO.
+   */
+
+  if (priv->ep0state == EP0STATE_SETUP_OUT)
+    {
+      /* Read the data into our special buffer for SETUP data */
+
+      int readlen = MIN(CONFIG_USBDEV_SETUP_MAXDATASIZE, bcnt);
+      stm32_rxfifo_read(privep, priv->ep0data, readlen);
+
+      /* Do we have to discard any excess bytes? */
+
+      stm32_rxfifo_discard(privep,  bcnt - readlen);
+
+      /* Now we can process the setup command */
+
+      privep->active  = false;
+      priv->ep0state  = EP0STATE_SETUP_READY;
+      priv->ep0datlen = readlen;
+
+      stm32_ep0out_setup(priv);
+    }
+  else
+    {
+      /* This is an error.  We don't have any idea what to do with the EP0
+       * data in this case.  Just read and discard it so that the RxFIFO
+       * does not become constipated.
+       */
+
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_NOOUTSETUP), priv->ep0state);
+      stm32_rxfifo_discard(privep, bcnt);
+      privep->active = false;
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_epout_receive
+ *
+ * Description:
+ *   This function is called from the RXFLVL interrupt handler when new incoming
+ *   data is available in the endpoint's RxFIFO.  This function will simply
+ *   copy the incoming data into pending request's data buffer.
+ *
+ ****************************************************************************/
+
+static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, int bcnt)
+{
+  struct stm32_req_s *privreq;
+  uint8_t *dest;
+  int buflen;
+  int readlen;
+
+  /* Get a reference to the request at the head of the endpoint's request
+   * queue.
+   */
+
+  privreq = stm32_rqpeek(privep);
+  if (!privreq)
+    {
+      /* Incoming data is available in the RxFIFO, but there is no read setup
+       * to receive the receive the data.  This should not happen for data
+       * endpoints; those endpoints should have been NAKing any OUT data tokens.
+       *
+       * We should get here normally on OUT data phase following an OUT
+       * SETUP command.  EP0 data will still receive data in this case and it
+       * should not be NAKing.
+       */
+
+      if (privep->epphy == 0)
+        {
+          stm32_ep0out_receive(privep, bcnt);
+        }
+      else
+        {
+          /* Otherwise, the data is lost. This really should not happen if
+           * NAKing is working as expected.
+           */
+
+          usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EPOUTQEMPTY), privep->epphy);
+
+          /* Discard the data in the RxFIFO */
+
+          stm32_rxfifo_discard(privep, bcnt);
+        }
+
+      privep->active = false;
+      return;
+    }
+
+  uinfo("EP%d: len=%d xfrd=%d\n", privep->epphy, privreq->req.len, privreq->req.xfrd);
+  usbtrace(TRACE_READ(privep->epphy), bcnt);
+
+  /* Get the number of bytes to transfer from the RxFIFO */
+
+  buflen  = privreq->req.len - privreq->req.xfrd;
+  DEBUGASSERT(buflen > 0 && buflen >= bcnt);
+  readlen = MIN(buflen, bcnt);
+
+  /* Get the destination of the data transfer */
+
+  dest = privreq->req.buf + privreq->req.xfrd;
+
+  /* Transfer the data from the RxFIFO to the request's data buffer */
+
+  stm32_rxfifo_read(privep, dest, readlen);
+
+  /* If there were more bytes in the RxFIFO than could be held in the read
+   * request, then we will have to discard those.
+   */
+
+  stm32_rxfifo_discard(privep, bcnt - readlen);
+
+  /* Update the number of bytes transferred */
+
+  privreq->req.xfrd += readlen;
+}
+
+/****************************************************************************
+ * Name: stm32_epout_request
+ *
+ * Description:
+ *   This function is called when either (1) new read request is received, or
+ *   (2) a pending receive request completes.  If there is no read in pending,
+ *   then this function will initiate the next OUT (read) operation.
+ *
+ ****************************************************************************/
+
+static void stm32_epout_request(FAR struct stm32_usbdev_s *priv,
+                                FAR struct stm32_ep_s *privep)
+{
+  struct stm32_req_s *privreq;
+  uint32_t regaddr;
+  uint32_t regval;
+  uint32_t xfrsize;
+  uint32_t pktcnt;
+
+  /* Make sure that there is not already a pending request request.  If there is,
+   * just return, leaving the newly received request in the request queue.
+   */
+
+  if (!privep->active)
+    {
+      /* Loop until a valid request is found (or the request queue is empty).
+       * The loop is only need to look at the request queue again is an invalid
+       * read request is encountered.
+       */
+
+      for (; ; )
+        {
+          /* Get a reference to the request at the head of the endpoint's request queue */
+
+          privreq = stm32_rqpeek(privep);
+          if (!privreq)
+            {
+              usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EPOUTQEMPTY), privep->epphy);
+
+              /* There are no read requests to be setup.  Configure the hardware to
+               * NAK any incoming packets.  (This should already be the case.  I
+               * think that the hardware will automatically NAK after a transfer is
+               * completed until SNAK is cleared).
+               */
+
+              regaddr = STM32_OTG_DOEPCTL(privep->epphy);
+              regval  = stm32_getreg(regaddr);
+              regval |= OTG_DOEPCTL_SNAK;
+              stm32_putreg(regval, regaddr);
+
+              /* This endpoint is no longer actively transferring */
+
+              privep->active = false;
+              return;
+            }
+
+          uinfo("EP%d: len=%d\n", privep->epphy, privreq->req.len);
+
+          /* Ignore any attempt to receive a zero length packet (this really
+           * should not happen.
+           */
+
+          if (privreq->req.len <= 0)
+            {
+              usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EPOUTNULLPACKET), 0);
+              stm32_req_complete(privep, OK);
+            }
+
+          /* Otherwise, we have a usable read request... break out of the loop */
+
+          else
+            {
+              break;
+            }
+        }
+
+      /* Setup the pending read into the request buffer.  First calculate:
+       *
+       * pktcnt  = the number of packets (of maxpacket bytes) required to
+       *   perform the transfer.
+       * xfrsize = The total number of bytes required (in units of
+       *   maxpacket bytes).
+       */
+
+      pktcnt  = (privreq->req.len + (privep->ep.maxpacket - 1)) / privep->ep.maxpacket;
+      xfrsize = pktcnt * privep->ep.maxpacket;
+
+      /* Then setup the hardware to perform this transfer */
+
+      regaddr = STM32_OTG_DOEPTSIZ(privep->epphy);
+      regval  = stm32_getreg(regaddr);
+      regval &= ~(OTG_DOEPTSIZ_XFRSIZ_MASK | OTG_DOEPTSIZ_PKTCNT_MASK);
+      regval |= (xfrsize << OTG_DOEPTSIZ_XFRSIZ_SHIFT);
+      regval |= (pktcnt  << OTG_DOEPTSIZ_PKTCNT_SHIFT);
+      stm32_putreg(regval, regaddr);
+
+      /* Then enable the transfer */
+
+      regaddr = STM32_OTG_DOEPCTL(privep->epphy);
+      regval  = stm32_getreg(regaddr);
+
+      /* When an isochronous transfer is enabled the Even/Odd frame bit must
+       * also be set appropriately.
+       */
+
+#ifdef CONFIG_USBDEV_ISOCHRONOUS
+      if (privep->eptype == USB_EP_ATTR_XFER_ISOC)
+        {
+          if (privep->odd)
+            {
+              regval |= OTG_DOEPCTL_SODDFRM;
+            }
+          else
+            {
+              regval |= OTG_DOEPCTL_SEVNFRM;
+            }
+        }
+#endif
+
+      /* Clearing NAKing and enable the transfer. */
+
+      regval |= (OTG_DOEPCTL_CNAK | OTG_DOEPCTL_EPENA);
+      stm32_putreg(regval, regaddr);
+
+      /* A transfer is now active on this endpoint */
+
+      privep->active = true;
+
+      /* EP0 is a special case.  We need to know when to switch back to
+       * normal SETUP processing.
+       */
+
+      if (privep->epphy == EP0)
+        {
+          priv->ep0state = EP0STATE_DATA_OUT;
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_ep_flush
+ *
+ * Description:
+ *   Flush any primed descriptors from this ep
+ *
+ ****************************************************************************/
+
+static void stm32_ep_flush(struct stm32_ep_s *privep)
+{
+  if (privep->isin)
+    {
+      stm32_txfifo_flush(OTG_GRSTCTL_TXFNUM_D(privep->epphy));
+    }
+  else
+    {
+      stm32_rxfifo_flush();
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_req_complete
+ *
+ * Description:
+ *   Handle termination of the request at the head of the endpoint request queue.
+ *
+ ****************************************************************************/
+
+static void stm32_req_complete(struct stm32_ep_s *privep, int16_t result)
+{
+  FAR struct stm32_req_s *privreq;
+
+  /* Remove the request at the head of the request list */
+
+  privreq = stm32_req_remfirst(privep);
+  DEBUGASSERT(privreq != NULL);
+
+  /* If endpoint 0, temporarily reflect the state of protocol stalled
+   * in the callback.
+   */
+
+  bool stalled = privep->stalled;
+  if (privep->epphy == EP0)
+    {
+      privep->stalled = privep->dev->stalled;
+    }
+
+  /* Save the result in the request structure */
+
+  privreq->req.result = result;
+
+  /* Callback to the request completion handler */
+
+  privreq->req.callback(&privep->ep, &privreq->req);
+
+  /* Restore the stalled indication */
+
+  privep->stalled = stalled;
+}
+
+/****************************************************************************
+ * Name: stm32_req_cancel
+ *
+ * Description:
+ *   Cancel all pending requests for an endpoint
+ *
+ ****************************************************************************/
+
+static void stm32_req_cancel(struct stm32_ep_s *privep, int16_t status)
+{
+  if (!stm32_rqempty(privep))
+    {
+      stm32_ep_flush(privep);
+    }
+
+  while (!stm32_rqempty(privep))
+    {
+      usbtrace(TRACE_COMPLETE(privep->epphy),
+               (stm32_rqpeek(privep))->req.xfrd);
+      stm32_req_complete(privep, status);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_ep_findbyaddr
+ *
+ * Description:
+ *   Find the physical endpoint structure corresponding to a logic endpoint
+ *   address
+ *
+ ****************************************************************************/
+
+static struct stm32_ep_s *stm32_ep_findbyaddr(struct stm32_usbdev_s *priv,
+                                              uint16_t eplog)
+{
+  struct stm32_ep_s *privep;
+  uint8_t epphy = USB_EPNO(eplog);
+
+  if (epphy >= STM32_NENDPOINTS)
+    {
+      return NULL;
+    }
+
+  /* Is this an IN or an OUT endpoint? */
+
+  if (USB_ISEPIN(eplog))
+    {
+      privep = &priv->epin[epphy];
+    }
+  else
+    {
+      privep = &priv->epout[epphy];
+    }
+
+  /* Return endpoint reference */
+
+  DEBUGASSERT(privep->epphy == epphy);
+  return privep;
+}
+
+/****************************************************************************
+ * Name: stm32_req_dispatch
+ *
+ * Description:
+ *   Provide unhandled setup actions to the class driver. This is logically part
+ *   of the USB interrupt handler.
+ *
+ ****************************************************************************/
+
+static int stm32_req_dispatch(struct stm32_usbdev_s *priv,
+                              const struct usb_ctrlreq_s *ctrl)
+{
+  int ret = -EIO;
+
+  usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_DISPATCH), 0);
+  if (priv->driver)
+    {
+      /* Forward to the control request to the class driver implementation */
+
+      ret = CLASS_SETUP(priv->driver, &priv->usbdev, ctrl,
+                        priv->ep0data, priv->ep0datlen);
+    }
+
+  if (ret < 0)
+    {
+      /* Stall on failure */
+
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_DISPATCHSTALL), 0);
+      priv->stalled = true;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32_usbreset
+ *
+ * Description:
+ *   Reset Usb engine
+ *
+ ****************************************************************************/
+
+static void stm32_usbreset(struct stm32_usbdev_s *priv)
+{
+  FAR struct stm32_ep_s *privep;
+  uint32_t regval;
+  int i;
+
+  /* Clear the Remote Wake-up Signaling */
+
+  regval = stm32_getreg(STM32_OTG_DCTL);
+  regval &= ~OTG_DCTL_RWUSIG;
+  stm32_putreg(regval, STM32_OTG_DCTL);
+
+  /* Flush the EP0 Tx FIFO */
+
+  stm32_txfifo_flush(OTG_GRSTCTL_TXFNUM_D(EP0));
+
+  /* Tell the class driver that we are disconnected. The class
+   * driver should then accept any new configurations.
+   */
+
+  if (priv->driver)
+    {
+      CLASS_DISCONNECT(priv->driver, &priv->usbdev);
+    }
+
+  /* Mark all endpoints as available */
+
+  priv->epavail[0] = STM32_EP_AVAILABLE;
+  priv->epavail[1] = STM32_EP_AVAILABLE;
+
+  /* Disable all end point interrupts */
+
+  for (i = 0; i < STM32_NENDPOINTS ; i++)
+    {
+      /* Disable endpoint interrupts */
+
+      stm32_putreg(0xff, STM32_OTG_DIEPINT(i));
+      stm32_putreg(0xff, STM32_OTG_DOEPINT(i));
+
+      /* Return write requests to the class implementation */
+
+      privep = &priv->epin[i];
+      stm32_req_cancel(privep, -ESHUTDOWN);
+
+      /* Reset IN endpoint status */
+
+      privep->stalled = false;
+
+      /* Return read requests to the class implementation */
+
+      privep = &priv->epout[i];
+      stm32_req_cancel(privep, -ESHUTDOWN);
+
+      /* Reset endpoint status */
+
+      privep->stalled = false;
+    }
+
+  stm32_putreg(0xffffffff, STM32_OTG_DAINT);
+
+  /* Mask all device endpoint interrupts except EP0 */
+
+  regval = (OTG_DAINT_IEP(EP0) | OTG_DAINT_OEP(EP0));
+  stm32_putreg(regval, STM32_OTG_DAINTMSK);
+
+  /* Unmask OUT interrupts */
+
+  regval = (OTG_DOEPMSK_XFRCM | OTG_DOEPMSK_STUPM | OTG_DOEPMSK_EPDM);
+  stm32_putreg(regval, STM32_OTG_DOEPMSK);
+
+  /* Unmask IN interrupts */
+
+  regval = (OTG_DIEPMSK_XFRCM | OTG_DIEPMSK_EPDM | OTG_DIEPMSK_TOM);
+  stm32_putreg(regval, STM32_OTG_DIEPMSK);
+
+  /* Reset device address to 0 */
+
+  stm32_setaddress(priv, 0);
+  priv->devstate = DEVSTATE_DEFAULT;
+  priv->usbdev.speed = USB_SPEED_FULL;
+
+  /* Re-configure EP0 */
+
+  stm32_ep0_configure(priv);
+
+  /* Setup EP0 to receive SETUP packets */
+
+  stm32_ep0out_ctrlsetup(priv);
+}
+
+/****************************************************************************
+ * Name: stm32_ep0out_testmode
+ *
+ * Description:
+ *   Select test mode
+ *
+ ****************************************************************************/
+
+static inline void stm32_ep0out_testmode(FAR struct stm32_usbdev_s *priv,
+                                         uint16_t index)
+{
+  uint8_t testmode;
+
+  testmode = index >> 8;
+  switch (testmode)
+    {
+    case 1:
+      priv->testmode = OTG_TESTMODE_J;
+      break;
+
+    case 2:
+      priv->testmode = OTG_TESTMODE_K;
+      break;
+
+    case 3:
+      priv->testmode = OTG_TESTMODE_SE0_NAK;
+      break;
+
+    case 4:
+      priv->testmode = OTG_TESTMODE_PACKET;
+      break;
+
+    case 5:
+      priv->testmode = OTG_TESTMODE_FORCE;
+      break;
+
+    default:
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADTESTMODE), testmode);
+      priv->dotest   = false;
+      priv->testmode = OTG_TESTMODE_DISABLED;
+      priv->stalled  = true;
+    }
+
+  priv->dotest = true;
+  stm32_ep0in_transmitzlp(priv);
+}
+
+/****************************************************************************
+ * Name: stm32_ep0out_stdrequest
+ *
+ * Description:
+ *   Handle a stanard request on EP0.  Pick off the things of interest to the
+ *   USB device controller driver; pass what is left to the class driver.
+ *
+ ****************************************************************************/
+
+static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv,
+                                           FAR struct stm32_ctrlreq_s *ctrlreq)
+{
+  FAR struct stm32_ep_s *privep;
+
+  /* Handle standard request */
+
+  switch (ctrlreq->req)
+    {
+    case USB_REQ_GETSTATUS:
+      {
+        /* type:  device-to-host; recipient = device, interface, endpoint
+         * value: 0
+         * index: zero interface endpoint
+         * len:   2; data = status
+         */
+
+        usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_GETSTATUS), 0);
+        if (!priv->addressed ||
+             ctrlreq->len != 2 ||
+            USB_REQ_ISOUT(ctrlreq->type) ||
+            ctrlreq->value != 0)
+          {
+            priv->stalled = true;
+          }
+        else
+          {
+            switch (ctrlreq->type & USB_REQ_RECIPIENT_MASK)
+              {
+              case USB_REQ_RECIPIENT_ENDPOINT:
+                {
+                  usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPGETSTATUS), 0);
+                  privep = stm32_ep_findbyaddr(priv, ctrlreq->index);
+                  if (!privep)
+                    {
+                      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADEPGETSTATUS), 0);
+                      priv->stalled = true;
+                    }
+                  else
+                    {
+                      if (privep->stalled)
+                        {
+                          priv->ep0data[0] = (1 << USB_FEATURE_ENDPOINTHALT);
+                        }
+                      else
+                        {
+                          priv->ep0data[0] = 0; /* Not stalled */
+                        }
+
+                      priv->ep0data[1] = 0;
+                      stm32_ep0in_setupresponse(priv, priv->ep0data, 2);
+                    }
+                }
+                break;
+
+              case USB_REQ_RECIPIENT_DEVICE:
+                {
+                  if (ctrlreq->index == 0)
+                    {
+                      usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_DEVGETSTATUS), 0);
+
+                      /* Features:  Remote Wakeup and self-powered */
+
+                      priv->ep0data[0]  = (priv->selfpowered << USB_FEATURE_SELFPOWERED);
+                      priv->ep0data[0] |= (priv->wakeup      << USB_FEATURE_REMOTEWAKEUP);
+                      priv->ep0data[1]  = 0;
+
+                      stm32_ep0in_setupresponse(priv, priv->ep0data, 2);
+                    }
+                  else
+                    {
+                      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADDEVGETSTATUS), 0);
+                      priv->stalled = true;
+                    }
+                }
+                break;
+
+              case USB_REQ_RECIPIENT_INTERFACE:
+                {
+                  usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_IFGETSTATUS), 0);
+                  priv->ep0data[0] = 0;
+                  priv->ep0data[1] = 0;
+
+                  stm32_ep0in_setupresponse(priv, priv->ep0data, 2);
+                }
+                break;
+
+              default:
+                {
+                  usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADGETSTATUS), 0);
+                  priv->stalled = true;
+                }
+                break;
+              }
+          }
+      }
+      break;
+
+    case USB_REQ_CLEARFEATURE:
+      {
+        /* type:  host-to-device; recipient = device, interface or endpoint
+         * value: feature selector
+         * index: zero interface endpoint;
+         * len:   zero, data = none
+         */
+
+        usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_CLEARFEATURE), 0);
+        if (priv->addressed != 0 && ctrlreq->len == 0)
+          {
+            uint8_t recipient = ctrlreq->type & USB_REQ_RECIPIENT_MASK;
+            if (recipient == USB_REQ_RECIPIENT_ENDPOINT &&
+                ctrlreq->value == USB_FEATURE_ENDPOINTHALT &&
+                (privep = stm32_ep_findbyaddr(priv, ctrlreq->index)) != NULL)
+              {
+                stm32_ep_clrstall(privep);
+                stm32_ep0in_transmitzlp(priv);
+              }
+            else if (recipient == USB_REQ_RECIPIENT_DEVICE &&
+                     ctrlreq->value == USB_FEATURE_REMOTEWAKEUP)
+              {
+                priv->wakeup = 0;
+                stm32_ep0in_transmitzlp(priv);
+              }
+            else
+              {
+                /* Actually, I think we could just stall here. */
+
+                (void)stm32_req_dispatch(priv, &priv->ctrlreq);
+              }
+          }
+        else
+          {
+            usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADCLEARFEATURE), 0);
+            priv->stalled = true;
+          }
+      }
+      break;
+
+    case USB_REQ_SETFEATURE:
+      {
+        /* type:  host-to-device; recipient = device, interface, endpoint
+         * value: feature selector
+         * index: zero interface endpoint;
+         * len:   0; data = none
+         */
+
+        usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETFEATURE), 0);
+        if (priv->addressed != 0 && ctrlreq->len == 0)
+          {
+            uint8_t recipient = ctrlreq->type & USB_REQ_RECIPIENT_MASK;
+            if (recipient == USB_REQ_RECIPIENT_ENDPOINT &&
+                ctrlreq->value == USB_FEATURE_ENDPOINTHALT &&
+                (privep = stm32_ep_findbyaddr(priv, ctrlreq->index)) != NULL)
+              {
+                stm32_ep_setstall(privep);
+                stm32_ep0in_transmitzlp(priv);
+              }
+            else if (recipient == USB_REQ_RECIPIENT_DEVICE &&
+                     ctrlreq->value == USB_FEATURE_REMOTEWAKEUP)
+              {
+                priv->wakeup = 1;
+                stm32_ep0in_transmitzlp(priv);
+              }
+            else if (recipient == USB_REQ_RECIPIENT_DEVICE &&
+                     ctrlreq->value == USB_FEATURE_TESTMODE &&
+                     ((ctrlreq->index & 0xff) == 0))
+              {
+                 stm32_ep0out_testmode(priv, ctrlreq->index);
+              }
+            else if (priv->configured)
+              {
+                /* Actually, I think we could just stall here. */
+
+                (void)stm32_req_dispatch(priv, &priv->ctrlreq);
+              }
+            else
+              {
+                usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADSETFEATURE), 0);
+                priv->stalled = true;
+              }
+          }
+        else
+          {
+            usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADSETFEATURE), 0);
+            priv->stalled = true;
+          }
+      }
+      break;
+
+    case USB_REQ_SETADDRESS:
+      {
+        /* type:  host-to-device; recipient = device
+         * value: device address
+         * index: 0
+         * len:   0; data = none
+         */
+
+        usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETADDRESS), ctrlreq->value);
+        if ((ctrlreq->type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE &&
+            ctrlreq->index  == 0 &&
+            ctrlreq->len == 0 &&
+            ctrlreq->value < 128 &&
+            priv->devstate != DEVSTATE_CONFIGURED)
+          {
+            /* Save the address.  We cannot actually change to the next address until
+             * the completion of the status phase.
+             */
+
+            stm32_setaddress(priv, (uint16_t)priv->ctrlreq.value[0]);
+            stm32_ep0in_transmitzlp(priv);
+          }
+        else
+          {
+            usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADSETADDRESS), 0);
+            priv->stalled = true;
+          }
+      }
+      break;
+
+    case USB_REQ_GETDESCRIPTOR:
+      /* type:  device-to-host; recipient = device
+       * value: descriptor type and index
+       * index: 0 or language ID;
+       * len:   descriptor len; data = descriptor
+       */
+
+    case USB_REQ_SETDESCRIPTOR:
+      /* type:  host-to-device; recipient = device
+       * value: descriptor type and index
+       * index: 0 or language ID;
+       * len:   descriptor len; data = descriptor
+       */
+
+      {
+        usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_GETSETDESC), 0);
+        if ((ctrlreq->type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE)
+          {
+            (void)stm32_req_dispatch(priv, &priv->ctrlreq);
+          }
+        else
+          {
+            usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADGETSETDESC), 0);
+            priv->stalled = true;
+          }
+      }
+      break;
+
+    case USB_REQ_GETCONFIGURATION:
+      /* type:  device-to-host; recipient = device
+       * value: 0;
+       * index: 0;
+       * len:   1; data = configuration value
+       */
+
+      {
+        usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_GETCONFIG), 0);
+        if (priv->addressed &&
+           (ctrlreq->type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE &&
+            ctrlreq->value == 0 &&
+            ctrlreq->index == 0 &&
+            ctrlreq->len == 1)
+          {
+            (void)stm32_req_dispatch(priv, &priv->ctrlreq);
+          }
+        else
+          {
+            usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADGETCONFIG), 0);
+            priv->stalled = true;
+          }
+      }
+      break;
+
+    case USB_REQ_SETCONFIGURATION:
+      /* type:  host-to-device; recipient = device
+       * value: configuration value
+       * index: 0;
+       * len:   0; data = none
+       */
+
+      {
+        usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETCONFIG), 0);
+        if (priv->addressed &&
+            (ctrlreq->type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE &&
+            ctrlreq->index == 0 &&
+            ctrlreq->len == 0)
+          {
+            /* Give the configuration to the class driver */
+
+            int ret = stm32_req_dispatch(priv, &priv->ctrlreq);
+
+            /* If the class driver accepted the configuration, then mark the
+             * device state as configured (or not, depending on the
+             * configuration).
+             */
+
+            if (ret == OK)
+              {
+                uint8_t cfg = (uint8_t)ctrlreq->value;
+                if (cfg != 0)
+                  {
+                    priv->devstate   = DEVSTATE_CONFIGURED;
+                    priv->configured = true;
+                  }
+                else
+                  {
+                    priv->devstate   = DEVSTATE_ADDRESSED;
+                    priv->configured = false;
+                  }
+              }
+          }
+        else
+          {
+            usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADSETCONFIG), 0);
+            priv->stalled = true;
+          }
+      }
+      break;
+
+    case USB_REQ_GETINTERFACE:
+      /* type:  device-to-host; recipient = interface
+       * value: 0
+       * index: interface;
+       * len:   1; data = alt interface
+       */
+
+    case USB_REQ_SETINTERFACE:
+      /* type:  host-to-device; recipient = interface
+       * value: alternate setting
+       * index: interface;
+       * len:   0; data = none
+       */
+
+      {
+        usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_GETSETIF), 0);
+        (void)stm32_req_dispatch(priv, &priv->ctrlreq);
+      }
+      break;
+
+    case USB_REQ_SYNCHFRAME:
+      /* type:  device-to-host; recipient = endpoint
+       * value: 0
+       * index: endpoint;
+       * len:   2; data = frame number
+       */
+
+      {
+        usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SYNCHFRAME), 0);
+      }
+      break;
+
+    default:
+      {
+        usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDCTRLREQ), 0);
+        priv->stalled = true;
+      }
+      break;
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_ep0out_setup
+ *
+ * Description:
+ *   USB Ctrl EP Setup Event. This is logically part of the USB interrupt
+ *   handler.  This event occurs when a setup packet is receive on EP0 OUT.
+ *
+ ****************************************************************************/
+
+static inline void stm32_ep0out_setup(struct stm32_usbdev_s *priv)
+{
+  struct stm32_ctrlreq_s ctrlreq;
+
+  /* Verify that a SETUP was received */
+
+  if (priv->ep0state != EP0STATE_SETUP_READY)
+    {
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EP0NOSETUP), priv->ep0state);
+      return;
+    }
+
+  /* Terminate any pending requests */
+
+  stm32_req_cancel(&priv->epout[EP0], -EPROTO);
+  stm32_req_cancel(&priv->epin[EP0],  -EPROTO);
+
+  /* Assume NOT stalled */
+
+  priv->epout[EP0].stalled = false;
+  priv->epin[EP0].stalled = false;
+  priv->stalled = false;
+
+  /* Starting to process a control request - update state */
+
+  priv->ep0state = EP0STATE_SETUP_PROCESS;
+
+  /* And extract the little-endian 16-bit values to host order */
+
+  ctrlreq.type  = priv->ctrlreq.type;
+  ctrlreq.req   = priv->ctrlreq.req;
+  ctrlreq.value = GETUINT16(priv->ctrlreq.value);
+  ctrlreq.index = GETUINT16(priv->ctrlreq.index);
+  ctrlreq.len   = GETUINT16(priv->ctrlreq.len);
+
+  uinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+          ctrlreq.type, ctrlreq.req, ctrlreq.value, ctrlreq.index, ctrlreq.len);
+
+  /* Check for a standard request */
+
+  if ((ctrlreq.type & USB_REQ_TYPE_MASK) != USB_REQ_TYPE_STANDARD)
+    {
+      /* Dispatch any non-standard requests */
+
+      (void)stm32_req_dispatch(priv, &priv->ctrlreq);
+    }
+  else
+    {
+      /* Handle standard requests. */
+
+      stm32_ep0out_stdrequest(priv, &ctrlreq);
+    }
+
+  /* Check if the setup processing resulted in a STALL */
+
+  if (priv->stalled)
+    {
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EP0SETUPSTALLED), priv->ep0state);
+      stm32_ep0_stall(priv);
+    }
+
+  /* Reset state/data associated with thie SETUP request */
+
+   priv->ep0datlen = 0;
+}
+
+/****************************************************************************
+ * Name: stm32_epout
+ *
+ * Description:
+ *   This is part of the OUT endpoint interrupt processing.  This function
+ *   handles the OUT event for a single endpoint.
+ *
+ ****************************************************************************/
+
+static inline void stm32_epout(FAR struct stm32_usbdev_s *priv, uint8_t epno)
+{
+  FAR struct stm32_ep_s *privep;
+
+  /* Endpoint 0 is a special case. */
+
+  if (epno == 0)
+    {
+      privep = &priv->epout[EP0];
+
+      /* In the EP0STATE_DATA_OUT state, we are receiving data into the
+       * request buffer.  In that case, we must continue the request
+       * processing.
+       */
+
+      if (priv->ep0state == EP0STATE_DATA_OUT)
+        {
+          /* Continue processing data from the EP0 OUT request queue */
+
+          stm32_epout_complete(priv, privep);
+
+          /* If we are not actively processing an OUT request, then we
+           * need to setup to receive the next control request.
+           */
+
+          if (!privep->active)
+            {
+              stm32_ep0out_ctrlsetup(priv);
+              priv->ep0state = EP0STATE_IDLE;
+            }
+        }
+    }
+
+  /* For other endpoints, the only possibility is that we are continuing
+   * or finishing an OUT request.
+   */
+
+  else if (priv->devstate == DEVSTATE_CONFIGURED)
+    {
+      stm32_epout_complete(priv, &priv->epout[epno]);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_epout_interrupt
+ *
+ * Description:
+ *   USB OUT endpoint interrupt handler.  The core generates this interrupt when
+ *   there is an interrupt is pending on one of the OUT endpoints of the core.
+ *   The driver must read the OTG DAINT register to determine the exact number
+ *   of the OUT endpoint on which the interrupt occurred, and then read the
+ *   corresponding OTG DOEPINTx register to determine the exact cause of the
+ *   interrupt.
+ *
+ ****************************************************************************/
+
+static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv)
+{
+  uint32_t daint;
+  uint32_t regval;
+  uint32_t doepint;
+  int epno;
+
+  /* Get the pending, enabled interrupts for the OUT endpoint from the endpoint
+   * interrupt status register.
+   */
+
+  regval  = stm32_getreg(STM32_OTG_DAINT);
+  regval &= stm32_getreg(STM32_OTG_DAINTMSK);
+  daint   = (regval & OTG_DAINT_OEP_MASK) >> OTG_DAINT_OEP_SHIFT;
+
+  if (daint == 0)
+    {
+      /* We got an interrupt, but there is no unmasked endpoint that caused
+       * it ?!  When this happens, the interrupt flag never gets cleared and
+       * we are stuck in infinite interrupt loop.
+       *
+       * This shouldn't happen if we are diligent about handling timing
+       * issues when masking endpoint interrupts. However, this workaround
+       * avoids infinite loop and allows operation to continue normally.  It
+       * works by clearing each endpoint flags, masked or not.
+       */
+
+      regval  = stm32_getreg(STM32_OTG_DAINT);
+      daint   = (regval & OTG_DAINT_OEP_MASK) >> OTG_DAINT_OEP_SHIFT;
+
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EPOUTUNEXPECTED),
+               (uint16_t)regval);
+
+      epno = 0;
+      while (daint)
+        {
+          if ((daint & 1) != 0)
+            {
+              regval = stm32_getreg(STM32_OTG_DOEPINT(epno));
+              uerr("DOEPINT(%d) = %08x\n", epno, regval);
+              stm32_putreg(0xFF, STM32_OTG_DOEPINT(epno));
+            }
+
+          epno++;
+          daint >>= 1;
+        }
+
+      return;
+    }
+
+  /* Process each pending IN endpoint interrupt */
+
+  epno = 0;
+  while (daint)
+    {
+      /* Is an OUT interrupt pending for this endpoint? */
+
+      if ((daint & 1) != 0)
+        {
+          /* Yes.. get the OUT endpoint interrupt status */
+
+          doepint  = stm32_getreg(STM32_OTG_DOEPINT(epno));
+          doepint &= stm32_getreg(STM32_OTG_DOEPMSK);
+
+          /* Transfer completed interrupt.  This interrupt is trigged when
+           * stm32_rxinterrupt() removes the last packet data from the RxFIFO.
+           * In this case, core internally sets the NAK bit for this endpoint to
+           * prevent it from receiving any more packets.
+           */
+
+          if ((doepint & OTG_DOEPINT_XFRC) != 0)
+            {
+              usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUT_XFRC), (uint16_t)doepint);
+
+              /* Clear the bit in DOEPINTn for this interrupt */
+
+              stm32_putreg(OTG_DOEPINT_XFRC, STM32_OTG_DOEPINT(epno));
+
+              /* Handle the RX transfer data ready event */
+
+              stm32_epout(priv, epno);
+            }
+
+          /* Endpoint disabled interrupt (ignored because this interrupt is
+           * used in polled mode by the endpoint disable logic).
+           */
+#if 1
+          /* REVISIT: */
+          if ((doepint & OTG_DOEPINT_EPDISD) != 0)
+            {
+              usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUT_EPDISD), (uint16_t)doepint);
+
+              /* Clear the bit in DOEPINTn for this interrupt */
+
+              stm32_putreg(OTG_DOEPINT_EPDISD, STM32_OTG_DOEPINT(epno));
+            }
+#endif
+          /* Setup Phase Done (control EPs) */
+
+          if ((doepint & OTG_DOEPINT_SETUP) != 0)
+            {
+              usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUT_SETUP), priv->ep0state);
+
+              /* Handle the receipt of the IN SETUP packets now (OUT setup
+               * packet processing may be delayed until the accompanying
+               * OUT DATA is received)
+               */
+
+              if (priv->ep0state == EP0STATE_SETUP_READY)
+                {
+                  stm32_ep0out_setup(priv);
+                }
+              stm32_putreg(OTG_DOEPINT_SETUP, STM32_OTG_DOEPINT(epno));
+            }
+        }
+
+      epno++;
+      daint >>= 1;
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_epin_runtestmode
+ *
+ * Description:
+ *   Execute the test mode setup by the SET FEATURE request
+ *
+ ****************************************************************************/
+
+static inline void stm32_epin_runtestmode(FAR struct stm32_usbdev_s *priv)
+{
+  uint32_t regval = stm32_getreg(STM32_OTG_DCTL);
+  regval &= OTG_DCTL_TCTL_MASK;
+  regval |= (uint32_t)priv->testmode << OTG_DCTL_TCTL_SHIFT;
+  stm32_putreg(regval , STM32_OTG_DCTL);
+
+  priv->dotest = 0;
+  priv->testmode = OTG_TESTMODE_DISABLED;
+}
+
+/****************************************************************************
+ * Name: stm32_epin
+ *
+ * Description:
+ *   This is part of the IN endpoint interrupt processing.  This function
+ *   handles the IN event for a single endpoint.
+ *
+ ****************************************************************************/
+
+static inline void stm32_epin(FAR struct stm32_usbdev_s *priv, uint8_t epno)
+{
+  FAR struct stm32_ep_s *privep = &priv->epin[epno];
+
+  /* Endpoint 0 is a special case. */
+
+  if (epno == 0)
+    {
+      /* In the EP0STATE_DATA_IN state, we are sending data from request
+       * buffer.  In that case, we must continue the request processing.
+       */
+
+      if (priv->ep0state == EP0STATE_DATA_IN)
+        {
+          /* Continue processing data from the EP0 OUT request queue */
+
+          stm32_epin_request(priv, privep);
+
+          /* If we are not actively processing an OUT request, then we
+           * need to setup to receive the next control request.
+           */
+
+          if (!privep->active)
+            {
+              stm32_ep0out_ctrlsetup(priv);
+              priv->ep0state = EP0STATE_IDLE;
+            }
+        }
+
+      /* Test mode is another special case */
+
+      if (priv->dotest)
+        {
+          stm32_epin_runtestmode(priv);
+        }
+    }
+
+  /* For other endpoints, the only possibility is that we are continuing
+   * or finishing an IN request.
+   */
+
+  else if (priv->devstate == DEVSTATE_CONFIGURED)
+    {
+      /* Continue processing data from the endpoint write request queue */
+
+      stm32_epin_request(priv, privep);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_epin_txfifoempty
+ *
+ * Description:
+ *   TxFIFO empty interrupt handling
+ *
+ ****************************************************************************/
+
+static inline void stm32_epin_txfifoempty(FAR struct stm32_usbdev_s *priv, int epno)
+{
+  FAR struct stm32_ep_s *privep = &priv->epin[epno];
+
+  /* Continue processing the write request queue.  This may mean sending
+   * more data from the existing request or terminating the current requests
+   * and (perhaps) starting the IN transfer from the next write request.
+   */
+
+  stm32_epin_request(priv, privep);
+}
+
+/****************************************************************************
+ * Name: stm32_epin_interrupt
+ *
+ * Description:
+ *   USB IN endpoint interrupt handler.  The core generates this interrupt when
+ *   an interrupt is pending on one of the IN endpoints of the core. The driver
+ *   must read the OTG DAINT register to determine the exact number of the IN
+ *   endpoint on which the interrupt occurred, and then read the corresponding
+ *   OTG DIEPINTx register to determine the exact cause of the interrupt.
+ *
+ ****************************************************************************/
+
+static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv)
+{
+  uint32_t diepint;
+  uint32_t daint;
+  uint32_t mask;
+  uint32_t empty;
+  int epno;
+
+  /* Get the pending, enabled interrupts for the IN endpoint from the endpoint
+   * interrupt status register.
+   */
+
+  daint  = stm32_getreg(STM32_OTG_DAINT);
+  daint &= stm32_getreg(STM32_OTG_DAINTMSK);
+  daint &= OTG_DAINT_IEP_MASK;
+
+  if (daint == 0)
+    {
+      /* We got an interrupt, but there is no unmasked endpoint that caused
+       * it ?!  When this happens, the interrupt flag never gets cleared and
+       * we are stuck in infinite interrupt loop.
+       *
+       * This shouldn't happen if we are diligent about handling timing
+       * issues when masking endpoint interrupts. However, this workaround
+       * avoids infinite loop and allows operation to continue normally.  It
+       * works by clearing each endpoint flags, masked or not.
+       */
+
+      daint  = stm32_getreg(STM32_OTG_DAINT);
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EPINUNEXPECTED),
+               (uint16_t)daint);
+
+      daint &= OTG_DAINT_IEP_MASK;
+      epno = 0;
+
+      while (daint)
+        {
+          if ((daint & 1) != 0)
+            {
+              uerr("DIEPINT(%d) = %08x\n",
+                     epno, stm32_getreg(STM32_OTG_DIEPINT(epno)));
+              stm32_putreg(0xFF, STM32_OTG_DIEPINT(epno));
+            }
+
+          epno++;
+          daint >>= 1;
+        }
+
+      return;
+    }
+
+  /* Process each pending IN endpoint interrupt */
+
+  epno = 0;
+  while (daint)
+    {
+      /* Is an IN interrupt pending for this endpoint? */
+
+      if ((daint & 1) != 0)
+        {
+          /* Get IN interrupt mask register.  Bits 0-6 correspond to enabled
+           * interrupts as will be found in the DIEPINT interrupt status
+           * register.
+           */
+
+          mask = stm32_getreg(STM32_OTG_DIEPMSK);
+
+          /* Check if the TxFIFO not empty interrupt is enabled for this
+           * endpoint in the DIEPMSK register.  Bits n corresponds to
+           * endpoint n in the register. That condition corresponds to
+           * bit 7 of the DIEPINT interrupt status register.  There is
+           * no TXFE bit in the mask register, so we fake one here.
+           */
+
+          empty = stm32_getreg(STM32_OTG_DIEPEMPMSK);
+          if ((empty & OTG_DIEPEMPMSK(epno)) != 0)
+            {
+              mask |= OTG_DIEPINT_TXFE;
+            }
+
+          /* Now, read the interrupt status and mask out all disabled
+           * interrupts.
+           */
+
+          diepint = stm32_getreg(STM32_OTG_DIEPINT(epno)) & mask;
+
+          /* Decode and process the enabled, pending interrupts */
+          /* Transfer completed interrupt */
+
+          if ((diepint & OTG_DIEPINT_XFRC) != 0)
+            {
+              usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_XFRC),
+                       (uint16_t)diepint);
+
+              /* It is possible that logic may be waiting for a the
+               * TxFIFO to become empty.  We disable the TxFIFO empty
+               * interrupt here; it will be re-enabled if there is still
+               * insufficient space in the TxFIFO.
+               */
+
+              empty &= ~OTG_DIEPEMPMSK(epno);
+              stm32_putreg(empty, STM32_OTG_DIEPEMPMSK);
+              stm32_putreg(OTG_DIEPINT_XFRC, STM32_OTG_DIEPINT(epno));
+
+              /* IN transfer complete */
+
+              stm32_epin(priv, epno);
+            }
+
+          /* Timeout condition */
+
+          if ((diepint & OTG_DIEPINT_TOC) != 0)
+            {
+              usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_TOC), (uint16_t)diepint);
+              stm32_putreg(OTG_DIEPINT_TOC, STM32_OTG_DIEPINT(epno));
+            }
+
+          /* IN token received when TxFIFO is empty.  Applies to non-periodic IN
+           * endpoints only.  This interrupt indicates that an IN token was received
+           * when the associated TxFIFO (periodic/non-periodic) was empty. This
+           * interrupt is asserted on the endpoint for which the IN token was
+           * received.
+           */
+
+          if ((diepint & OTG_DIEPINT_ITTXFE) != 0)
+            {
+              usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_ITTXFE), (uint16_t)diepint);
+              stm32_epin_request(priv, &priv->epin[epno]);
+              stm32_putreg(OTG_DIEPINT_ITTXFE, STM32_OTG_DIEPINT(epno));
+            }
+
+          /* IN endpoint NAK effective (ignored as this used only in polled
+           * mode)
+           */
+#if 0
+          if ((diepint & OTG_DIEPINT_INEPNE) != 0)
+            {
+              usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_INEPNE), (uint16_t)diepint);
+              stm32_putreg(OTG_DIEPINT_INEPNE, STM32_OTG_DIEPINT(epno));
+            }
+#endif
+          /* Endpoint disabled interrupt (ignored as this used only in polled
+           * mode)
+           */
+#if 0
+          if ((diepint & OTG_DIEPINT_EPDISD) != 0)
+            {
+              usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_EPDISD), (uint16_t)diepint);
+              stm32_putreg(OTG_DIEPINT_EPDISD, STM32_OTG_DIEPINT(epno));
+            }
+#endif
+          /* Transmit FIFO empty */
+
+          if ((diepint & OTG_DIEPINT_TXFE) != 0)
+            {
+              usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_TXFE), (uint16_t)diepint);
+
+              /* If we were waiting for TxFIFO to become empty, the we might have both
+               * XFRC and TXFE interrupts pending.  Since we do the same thing for both
+               * cases, ignore the TXFE if we have already processed the XFRC.
+               */
+
+              if ((diepint & OTG_DIEPINT_XFRC) == 0)
+                {
+                  /* Mask further FIFO empty interrupts.  This will be re-enabled
+                   * whenever we need to wait for a FIFO event.
+                   */
+
+                  empty &= ~OTG_DIEPEMPMSK(epno);
+                  stm32_putreg(empty, STM32_OTG_DIEPEMPMSK);
+
+                  /* Handle TxFIFO empty */
+
+                  stm32_epin_txfifoempty(priv, epno);
+                }
+
+              /* Clear the pending TxFIFO empty interrupt */
+
+              stm32_putreg(OTG_DIEPINT_TXFE, STM32_OTG_DIEPINT(epno));
+            }
+        }
+
+      epno++;
+      daint >>= 1;
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_resumeinterrupt
+ *
+ * Description:
+ *   Resume/remote wakeup detected interrupt
+ *
+ ****************************************************************************/
+
+static inline void stm32_resumeinterrupt(FAR struct stm32_usbdev_s *priv)
+{
+  uint32_t regval;
+
+  /* Restart the PHY clock and un-gate USB core clock (HCLK) */
+
+#ifdef CONFIG_USBDEV_LOWPOWER
+  regval = stm32_getreg(STM32_OTG_PCGCCTL);
+  regval &= ~(OTG_PCGCCTL_STPPCLK | OTG_PCGCCTL_GATEHCLK);
+  stm32_putreg(regval, STM32_OTG_PCGCCTL);
+#endif
+
+  /* Clear remote wake-up signaling */
+
+  regval  = stm32_getreg(STM32_OTG_DCTL);
+  regval &= ~OTG_DCTL_RWUSIG;
+  stm32_putreg(regval, STM32_OTG_DCTL);
+
+  /* Restore full power -- whatever that means for this particular board */
+
+  stm32_usbsuspend((struct usbdev_s *)priv, true);
+
+  /* Notify the class driver of the resume event */
+
+  if (priv->driver)
+    {
+      CLASS_RESUME(priv->driver, &priv->usbdev);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_suspendinterrupt
+ *
+ * Description:
+ *   USB suspend interrupt
+ *
+ ****************************************************************************/
+
+static inline void stm32_suspendinterrupt(FAR struct stm32_usbdev_s *priv)
+{
+#ifdef CONFIG_USBDEV_LOWPOWER
+  uint32_t regval;
+#endif
+
+  /* Notify the class driver of the suspend event */
+
+  if (priv->driver)
+    {
+      CLASS_SUSPEND(priv->driver, &priv->usbdev);
+    }
+
+#ifdef CONFIG_USBDEV_LOWPOWER
+  /* OTG_DSTS_SUSPSTS is set as long as the suspend condition is detected
+   * on USB.  Check if we are still have the suspend condition, that we are
+   * connected to the host, and that we have been configured.
+   */
+
+  regval = stm32_getreg(STM32_OTG_DSTS);
+
+  if ((regval & OTG_DSTS_SUSPSTS) != 0 && devstate == DEVSTATE_CONFIGURED)
+    {
+      /* Switch off OTG clocking.  Setting OTG_PCGCCTL_STPPCLK stops the
+       * PHY clock.
+       */
+
+      regval = stm32_getreg(STM32_OTG_PCGCCTL);
+      regval |= OTG_PCGCCTL_STPPCLK;
+      stm32_putreg(regval, STM32_OTG_PCGCCTL);
+
+      /* Setting OTG_PCGCCTL_GATEHCLK gate HCLK to modules other than
+       * the AHB Slave and Master and wakeup logic.
+       */
+
+      regval |= OTG_PCGCCTL_GATEHCLK;
+      stm32_putreg(regval, STM32_OTG_PCGCCTL);
+    }
+#endif
+
+  /* Let the board-specific logic know that we have entered the suspend
+   * state
+   */
+
+  stm32_usbsuspend((FAR struct usbdev_s *)priv, false);
+}
+
+/****************************************************************************
+ * Name: stm32_rxinterrupt
+ *
+ * Description:
+ *   RxFIFO non-empty interrupt.  This interrupt indicates that there is at
+ *   least one packet pending to be read from the RxFIFO.
+ *
+ ****************************************************************************/
+
+static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv)
+{
+  FAR struct stm32_ep_s *privep;
+  uint32_t regval;
+  int bcnt;
+  int epphy;
+
+  /* Get the status from the top of the FIFO */
+
+  regval = stm32_getreg(STM32_OTG_GRXSTSP);
+
+  /* Decode status fields */
+
+  epphy  = (regval & OTG_GRXSTSD_EPNUM_MASK) >> OTG_GRXSTSD_EPNUM_SHIFT;
+
+  if (epphy < STM32_NENDPOINTS)
+    {
+      privep = &priv->epout[epphy];
+
+      /* Handle the RX event according to the packet status field */
+
+      switch (regval & OTG_GRXSTSD_PKTSTS_MASK)
+        {
+        /* Global OUT NAK.  This indicate that the global OUT NAK bit has taken
+         * effect.
+         *
+         * PKTSTS = Global OUT NAK, BCNT = 0, EPNUM = Don't Care, DPID = Don't
+         * Care.
+         */
+
+        case OTG_GRXSTSD_PKTSTS_OUTNAK:
+          {
+            usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OUTNAK), 0);
+          }
+          break;
+
+        /* OUT data packet received.
+         *
+         * PKTSTS = DataOUT, BCNT = size of the received data OUT packet,
+         * EPNUM = EPNUM on which the packet was received, DPID = Actual Data PID.
+         */
+
+        case OTG_GRXSTSD_PKTSTS_OUTRECVD:
+          {
+            usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OUTRECVD), epphy);
+            bcnt = (regval & OTG_GRXSTSD_BCNT_MASK) >> OTG_GRXSTSD_BCNT_SHIFT;
+            if (bcnt > 0)
+              {
+                stm32_epout_receive(privep, bcnt);
+              }
+          }
+          break;
+
+        /* OUT transfer completed.  This indicates that an OUT data transfer for
+         * the specified OUT endpoint has completed. After this entry is popped
+         * from the receive FIFO, the core asserts a Transfer Completed interrupt
+         * on the specified OUT endpoint.
+         *
+         * PKTSTS = Data OUT Transfer Done, BCNT = 0, EPNUM = OUT EP Num on
+         * which the data transfer is complete, DPID = Don't Care.
+         */
+
+        case OTG_GRXSTSD_PKTSTS_OUTDONE:
+          {
+            usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OUTDONE), epphy);
+          }
+          break;
+
+        /* SETUP transaction completed. This indicates that the Setup stage for
+         * the specified endpoint has completed and the Data stage has started.
+         * After this entry is popped from the receive FIFO, the core asserts a
+         * Setup interrupt on the specified control OUT endpoint (triggers an
+         * interrupt).
+         *
+         * PKTSTS = Setup Stage Done, BCNT = 0, EPNUM = Control EP Num,
+         * DPID = Don't Care.
+         */
+
+        case OTG_GRXSTSD_PKTSTS_SETUPDONE:
+          {
+            usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETUPDONE), epphy);
+
+            /* Now that the Setup Phase is complete if it was an OUT enable
+             * the endpoint
+             * (Doing this here prevents the loss of the first FIFO word)
+             */
+
+            if (priv->ep0state == EP0STATE_SETUP_OUT)
+              {
+
+                /* Clear NAKSTS so that we can receive the data */
+
+                regval  = stm32_getreg(STM32_OTG_DOEPCTL(0));
+                regval |= OTG_DOEPCTL0_CNAK;
+                stm32_putreg(regval, STM32_OTG_DOEPCTL(0));
+
+            }
+          }
+          break;
+
+        /* SETUP data packet received.  This indicates that a SETUP packet for the
+         * specified endpoint is now available for reading from the receive FIFO.
+         *
+         * PKTSTS = SETUP, BCNT = 8, EPNUM = Control EP Num, DPID = D0.
+         */
+
+        case OTG_GRXSTSD_PKTSTS_SETUPRECVD:
+          {
+            uint16_t datlen;
+
+            usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETUPRECVD), epphy);
+
+            /* Read EP0 setup data.  NOTE:  If multiple SETUP packets are received,
+             * the last one overwrites the previous setup packets and only that
+             * last SETUP packet will be processed.
+             */
+
+            stm32_rxfifo_read(&priv->epout[EP0], (FAR uint8_t *)&priv->ctrlreq,
+                             USB_SIZEOF_CTRLREQ);
+
+            /* Was this an IN or an OUT SETUP packet.  If it is an OUT SETUP,
+             * then we need to wait for the completion of the data phase to
+             * process the setup command.  If it is an IN SETUP packet, then
+             * we must processing the command BEFORE we enter the DATA phase.
+             *
+             * If the data associated with the OUT SETUP packet is zero length,
+             * then, of course, we don't need to wait.
+             */
+
+            datlen = GETUINT16(priv->ctrlreq.len);
+            if (USB_REQ_ISOUT(priv->ctrlreq.type) && datlen > 0)
+              {
+                priv->ep0state = EP0STATE_SETUP_OUT;
+              }
+            else
+              {
+                /* We can process the setup data as soon as SETUP done word is
+                 * popped of the RxFIFO.
+                 */
+
+                priv->ep0state = EP0STATE_SETUP_READY;
+              }
+          }
+          break;
+
+        default:
+          {
+            usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS),
+                     (regval & OTG_GRXSTSD_PKTSTS_MASK) >> OTG_GRXSTSD_PKTSTS_SHIFT);
+          }
+          break;
+        }
+    }
+
+}
+
+/****************************************************************************
+ * Name: stm32_enuminterrupt
+ *
+ * Description:
+ *   Enumeration done interrupt
+ *
+ ****************************************************************************/
+
+static inline void stm32_enuminterrupt(FAR struct stm32_usbdev_s *priv)
+{
+  uint32_t regval;
+
+  /* Activate EP0 */
+
+  stm32_ep0in_activate();
+
+  /* Set USB turn-around time for the full speed device with internal PHY interface. */
+
+  regval  = stm32_getreg(STM32_OTG_GUSBCFG);
+  regval &= ~OTG_GUSBCFG_TRDT_MASK;
+  regval |=  OTG_GUSBCFG_TRDT(6);
+  stm32_putreg(regval, STM32_OTG_GUSBCFG);
+}
+
+/****************************************************************************
+ * Name: stm32_isocininterrupt
+ *
+ * Description:
+ *   Incomplete isochronous IN transfer interrupt.  Assertion of the incomplete
+ *   isochronous IN transfer interrupt indicates an incomplete isochronous IN
+ *   transfer on at least one of the isochronous IN endpoints.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBDEV_ISOCHRONOUS
+static inline void stm32_isocininterrupt(FAR struct stm32_usbdev_s *priv)
+{
+  int i;
+
+  /* The application must read the endpoint control register for all isochronous
+   * IN endpoints to detect endpoints with incomplete IN data transfers.
+   */
+
+  for (i = 0; i < STM32_NENDPOINTS; i++)
+    {
+      /* Is this an isochronous IN endpoint? */
+
+      privep = &priv->epin[i];
+      if (privep->eptype != USB_EP_ATTR_XFER_ISOC)
+        {
+          /* No... keep looking */
+
+          continue;
+        }
+
+      /* Is there an active read request on the isochronous OUT endpoint? */
+
+      if (!privep->active)
+        {
+          /* No.. the endpoint is not actively transmitting data */
+
+          continue;
+        }
+
+      /* Check if this is the endpoint that had the incomplete transfer */
+
+      regaddr = STM32_OTG_DIEPCTL(privep->epphy);
+      doepctl = stm32_getreg(regaddr);
+      dsts    = stm32_getreg(STM32_OTG_DSTS);
+
+      /* EONUM = 0:even frame, 1:odd frame
+       * SOFFN = Frame number of the received SOF
+       */
+
+      eonum = ((doepctl & OTG_DIEPCTL_EONUM) != 0);
+      soffn = ((dsts & OTG_DSTS_SOFFN0) != 0);
+
+      if (eonum != soffn)
+        {
+          /* Not this endpoint */
+
+          continue;
+        }
+
+      /* For isochronous IN endpoints with incomplete transfers,
+       * the application must discard the data in the memory and
+       * disable the endpoint.
+       */
+
+      stm32_req_complete(privep, -EIO);
+#warning "Will clear OTG_DIEPCTL_USBAEP too"
+      stm32_epin_disable(privep);
+      break;
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_isocoutinterrupt
+ *
+ * Description:
+ *   Incomplete periodic transfer interrupt
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBDEV_ISOCHRONOUS
+static inline void stm32_isocoutinterrupt(FAR struct stm32_usbdev_s *priv)
+{
+  FAR struct stm32_ep_s *privep;
+  FAR struct stm32_req_s *privreq;
+  uint32_t regaddr;
+  uint32_t doepctl;
+  uint32_t dsts;
+  bool eonum;
+  bool soffn;
+
+  /* When it receives an IISOOXFR interrupt, the application must read the
+   * control registers of all isochronous OUT endpoints to determine which
+   * endpoints had an incomplete transfer in the current microframe. An
+   * endpoint transfer is incomplete if both the following conditions are true:
+   *
+   *   DOEPCTLx:EONUM = DSTS:SOFFN[0], and
+   *   DOEPCTLx:EPENA = 1
+   */
+
+  for (i = 0; i < STM32_NENDPOINTS; i++)
+    {
+      /* Is this an isochronous OUT endpoint? */
+
+      privep = &priv->epout[i];
+      if (privep->eptype != USB_EP_ATTR_XFER_ISOC)
+        {
+          /* No... keep looking */
+
+          continue;
+        }
+
+      /* Is there an active read request on the isochronous OUT endpoint? */
+
+      if (!privep->active)
+        {
+          /* No.. the endpoint is not actively transmitting data */
+
+          continue;
+        }
+
+      /* Check if this is the endpoint that had the incomplete transfer */
+
+      regaddr = STM32_OTG_DOEPCTL(privep->epphy);
+      doepctl = stm32_getreg(regaddr);
+      dsts    = stm32_getreg(STM32_OTG_DSTS);
+
+      /* EONUM = 0:even frame, 1:odd frame
+       * SOFFN = Frame number of the received SOF
+       */
+
+      eonum = ((doepctl & OTG_DOEPCTL_EONUM) != 0);
+      soffn = ((dsts & OTG_DSTS_SOFFN0) != 0);
+
+      if (eonum != soffn)
+        {
+          /* Not this endpoint */
+
+          continue;
+        }
+
+      /* For isochronous OUT endpoints with incomplete transfers,
+       * the application must discard the data in the memory and
+       * disable the endpoint.
+       */
+
+      stm32_req_complete(privep, -EIO);
+#warning "Will clear OTG_DOEPCTL_USBAEP too"
+      stm32_epout_disable(privep);
+      break;
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_sessioninterrupt
+ *
+ * Description:
+ *   Session request/new session detected interrupt
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBDEV_VBUSSENSING
+static inline void stm32_sessioninterrupt(FAR struct stm32_usbdev_s *priv)
+{
+#warning "Missing logic"
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_otginterrupt
+ *
+ * Description:
+ *   OTG interrupt
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBDEV_VBUSSENSING
+static inline void stm32_otginterrupt(FAR struct stm32_usbdev_s *priv)
+{
+  uint32_t regval;
+
+  /* Check for session end detected */
+
+  regval = stm32_getreg(STM32_OTG_GOTGINT);
+  if ((regval & OTG_GOTGINT_SEDET) != 0)
+    {
+#warning "Missing logic"
+    }
+
+  /* Clear OTG interrupt */
+
+  stm32_putreg(regval, STM32_OTG_GOTGINT);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_usbinterrupt
+ *
+ * Description:
+ *   USB interrupt handler
+ *
+ ****************************************************************************/
+
+static int stm32_usbinterrupt(int irq, FAR void *context, FAR void *arg)
+{
+  /* At present, there is only a single OTG  device support. Hence it is
+   * pre-allocated as g_otghsdev.  However, in most code, the private data
+   * structure will be referenced using the 'priv' pointer (rather than the
+   * global data) in order to simplify any future support for multiple devices.
+   */
+
+  FAR struct stm32_usbdev_s *priv = &g_otghsdev;
+  uint32_t regval;
+  uint32_t reserved;
+
+  usbtrace(TRACE_INTENTRY(STM32_TRACEINTID_USB), 0);
+
+  /* Assure that we are in device mode */
+
+  DEBUGASSERT((stm32_getreg(STM32_OTG_GINTSTS) & OTG_GINTSTS_CMOD) == OTG_GINTSTS_DEVMODE);
+
+  /* Get the state of all enabled interrupts.  We will do this repeatedly
+   * some interrupts (like RXFLVL) will generate additional interrupting
+   * events.
+   */
+
+  for (; ; )
+    {
+      /* Get the set of pending, un-masked interrupts */
+
+      regval  = stm32_getreg(STM32_OTG_GINTSTS);
+      reserved = (regval & OTG_GINT_RESERVED);
+      regval &= stm32_getreg(STM32_OTG_GINTMSK);
+
+      /* With out modifying the reserved bits, acknowledge all
+       * **Writable** pending irqs we will service below
+       */
+
+      stm32_putreg(((regval | reserved) & OTG_GINT_RC_W1), STM32_OTG_GINTSTS);
+
+      /* Break out of the loop when there are no further pending (and
+       * unmasked) interrupts to be processes.
+       */
+
+      if (regval == 0)
+        {
+          break;
+        }
+      usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_INTPENDING), (uint16_t)regval);
+
+      /* OUT endpoint interrupt. The core sets this bit to indicate that an
+       * interrupt is pending on one of the OUT endpoints of the core.
+       */
+
+      if ((regval & OTG_GINT_OEP) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUT), (uint16_t)regval);
+          stm32_epout_interrupt(priv);
+        }
+
+      /* IN endpoint interrupt.  The core sets this bit to indicate that
+       * an interrupt is pending on one of the IN endpoints of the core.
+       */
+
+      if ((regval & OTG_GINT_IEP) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN), (uint16_t)regval);
+          stm32_epin_interrupt(priv);
+        }
+
+      /* Host/device mode mismatch error interrupt */
+
+#ifdef CONFIG_DEBUG_USB
+      if ((regval & OTG_GINT_MMIS) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_MISMATCH), (uint16_t)regval);
+        }
+#endif
+
+      /* Resume/remote wakeup detected interrupt */
+
+      if ((regval & OTG_GINT_WKUP) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_WAKEUP), (uint16_t)regval);
+          stm32_resumeinterrupt(priv);
+        }
+
+      /* USB suspend interrupt */
+
+      if ((regval & OTG_GINT_USBSUSP) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SUSPEND), (uint16_t)regval);
+          stm32_suspendinterrupt(priv);
+        }
+
+      /* Start of frame interrupt */
+
+#ifdef CONFIG_USBDEV_SOFINTERRUPT
+      if ((regval & OTG_GINT_SOF) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SOF), (uint16_t)regval);
+        }
+#endif
+
+      /* RxFIFO non-empty interrupt.  Indicates that there is at least one
+       * packet pending to be read from the RxFIFO.
+       */
+
+      if ((regval & OTG_GINT_RXFLVL) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_RXFIFO), (uint16_t)regval);
+          stm32_rxinterrupt(priv);
+        }
+
+      /* USB reset interrupt */
+
+      if ((regval & (OTG_GINT_USBRST | OTG_GINT_RSTDET)) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_DEVRESET), (uint16_t)regval);
+
+          /* Perform the device reset */
+
+          stm32_usbreset(priv);
+          usbtrace(TRACE_INTEXIT(STM32_TRACEINTID_USB), 0);
+          return OK;
+        }
+
+      /* Enumeration done interrupt */
+
+      if ((regval & OTG_GINT_ENUMDNE) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_ENUMDNE), (uint16_t)regval);
+          stm32_enuminterrupt(priv);
+        }
+
+      /* Incomplete isochronous IN transfer interrupt.  When the core finds
+       * non-empty any of the isochronous IN endpoint FIFOs scheduled for
+       * the current frame non-empty, the core generates an IISOIXFR
+       * interrupt.
+       */
+
+#ifdef CONFIG_USBDEV_ISOCHRONOUS
+      if ((regval & OTG_GINT_IISOIXFR) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_IISOIXFR), (uint16_t)regval);
+          stm32_isocininterrupt(priv);
+        }
+
+      /* Incomplete isochronous OUT transfer.  For isochronous OUT
+       * endpoints, the XFRC interrupt may not always be asserted. If the
+       * core drops isochronous OUT data packets, the application could fail
+       * to detect the XFRC interrupt.  The incomplete Isochronous OUT data
+       * interrupt indicates that an XFRC interrupt was not asserted on at
+       * least one of the isochronous OUT endpoints. At this point, the
+       * endpoint with the incomplete transfer remains enabled, but no active
+       * transfers remain in progress on this endpoint on the USB.
+       */
+
+      if ((regval & OTG_GINT_IISOOXFR) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_IISOOXFR), (uint16_t)regval);
+          stm32_isocoutinterrupt(priv);
+        }
+#endif
+
+      /* Session request/new session detected interrupt */
+
+#ifdef CONFIG_USBDEV_VBUSSENSING
+      if ((regval & OTG_GINT_SRQ) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SRQ), (uint16_t)regval);
+          stm32_sessioninterrupt(priv);
+        }
+
+      /* OTG interrupt */
+
+      if ((regval & OTG_GINT_OTG) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OTG), (uint16_t)regval);
+          stm32_otginterrupt(priv);
+        }
+#endif
+    }
+
+  usbtrace(TRACE_INTEXIT(STM32_TRACEINTID_USB), 0);
+  return OK;
+}
+
+/****************************************************************************
+ * Endpoint operations
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_enablegonak
+ *
+ * Description:
+ *   Enable global OUT NAK mode
+ *
+ ****************************************************************************/
+
+static void stm32_enablegonak(FAR struct stm32_ep_s *privep)
+{
+  uint32_t regval;
+
+  /* First, make sure that there is no GNOAKEFF interrupt pending. */
+
+#if 0
+  stm32_putreg(OTG_GINT_GONAKEFF, STM32_OTG_GINTSTS);
+#endif
+
+  /* Enable Global OUT NAK mode in the core. */
+
+  regval = stm32_getreg(STM32_OTG_DCTL);
+  regval |= OTG_DCTL_SGONAK;
+  stm32_putreg(regval, STM32_OTG_DCTL);
+
+#if 0
+  /* Wait for the GONAKEFF interrupt that indicates that the OUT NAK
+   * mode is in effect.  When the interrupt handler pops the OUTNAK word
+   * from the RxFIFO, the core sets the GONAKEFF interrupt.
+   */
+
+  while ((stm32_getreg(STM32_OTG_GINTSTS) & OTG_GINT_GONAKEFF) == 0);
+  stm32_putreg(OTG_GINT_GONAKEFF, STM32_OTG_GINTSTS);
+
+#else
+  /* Since we are in the interrupt handler, we cannot wait inline for the
+   * GONAKEFF because it cannot occur until service the RXFLVL global interrupt
+   * and pop the OUTNAK word from the RxFIFO.
+   *
+   * Perhaps it is sufficient to wait for Global OUT NAK status to be reported
+   * in OTG DCTL register?
+   */
+
+  while ((stm32_getreg(STM32_OTG_DCTL) & OTG_DCTL_GONSTS) == 0);
+#endif
+}
+
+/****************************************************************************
+ * Name: stm32_disablegonak
+ *
+ * Description:
+ *   Disable global OUT NAK mode
+ *
+ ****************************************************************************/
+
+static void stm32_disablegonak(FAR struct stm32_ep_s *privep)
+{
+  uint32_t regval;
+
+  /* Set the "Clear the Global OUT NAK bit" to disable global OUT NAK mode */
+
+  regval  = stm32_getreg(STM32_OTG_DCTL);
+  regval |= OTG_DCTL_CGONAK;
+  stm32_putreg(regval, STM32_OTG_DCTL);
+}
+
+/****************************************************************************
+ * Name: stm32_epout_configure
+ *
+ * Description:
+ *   Configure an OUT endpoint, making it usable
+ *
+ * Input Parameters:
+ *   privep    - a pointer to an internal endpoint structure
+ *   eptype    - The type of the endpoint
+ *   maxpacket - The max packet size of the endpoint
+ *
+ ****************************************************************************/
+
+static int stm32_epout_configure(FAR struct stm32_ep_s *privep,
+                                 uint8_t eptype, uint16_t maxpacket)
+{
+  uint32_t mpsiz;
+  uint32_t regaddr;
+  uint32_t regval;
+
+  usbtrace(TRACE_EPCONFIGURE, privep->epphy);
+
+  /* For EP0, the packet size is encoded */
+
+  if (privep->epphy == EP0)
+    {
+      DEBUGASSERT(eptype == USB_EP_ATTR_XFER_CONTROL);
+
+      /* Map the size in bytes to the encoded value in the register */
+
+      switch (maxpacket)
+        {
+          case 8:
+            mpsiz = OTG_DOEPCTL0_MPSIZ_8;
+            break;
+
+          case 16:
+            mpsiz = OTG_DOEPCTL0_MPSIZ_16;
+            break;
+
+          case 32:
+            mpsiz = OTG_DOEPCTL0_MPSIZ_32;
+            break;
+
+          case 64:
+            mpsiz = OTG_DOEPCTL0_MPSIZ_64;
+            break;
+
+          default:
+            uerr("Unsupported maxpacket: %d\n", maxpacket);
+            return -EINVAL;
+        }
+    }
+
+  /* For other endpoints, the packet size is in bytes */
+
+  else
+    {
+      mpsiz = (maxpacket << OTG_DOEPCTL_MPSIZ_SHIFT);
+    }
+
+  /* If the endpoint is already active don't change the endpoint control
+   * register.
+   */
+
+  regaddr = STM32_OTG_DOEPCTL(privep->epphy);
+  regval  = stm32_getreg(regaddr);
+  if ((regval & OTG_DOEPCTL_USBAEP) == 0)
+    {
+      if (regval & OTG_DOEPCTL_NAKSTS)
+        {
+          regval |= OTG_DOEPCTL_CNAK;
+        }
+
+      regval &= ~(OTG_DOEPCTL_MPSIZ_MASK | OTG_DOEPCTL_EPTYP_MASK);
+      regval |= mpsiz;
+      regval |= (eptype << OTG_DOEPCTL_EPTYP_SHIFT);
+      regval |= (OTG_DOEPCTL_SD0PID | OTG_DOEPCTL_USBAEP);
+      stm32_putreg(regval, regaddr);
+
+      /* Save the endpoint configuration */
+
+      privep->ep.maxpacket = maxpacket;
+      privep->eptype       = eptype;
+      privep->stalled      = false;
+    }
+
+  /* Enable the interrupt for this endpoint */
+
+  regval = stm32_getreg(STM32_OTG_DAINTMSK);
+  regval |= OTG_DAINT_OEP(privep->epphy);
+  stm32_putreg(regval, STM32_OTG_DAINTMSK);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_epin_configure
+ *
+ * Description:
+ *   Configure an IN endpoint, making it usable
+ *
+ * Input Parameters:
+ *   privep    - a pointer to an internal endpoint structure
+ *   eptype    - The type of the endpoint
+ *   maxpacket - The max packet size of the endpoint
+ *
+ ****************************************************************************/
+
+static int stm32_epin_configure(FAR struct stm32_ep_s *privep,
+                                uint8_t eptype, uint16_t maxpacket)
+{
+  uint32_t mpsiz;
+  uint32_t regaddr;
+  uint32_t regval;
+
+  usbtrace(TRACE_EPCONFIGURE, privep->epphy);
+
+  /* For EP0, the packet size is encoded */
+
+  if (privep->epphy == EP0)
+    {
+      DEBUGASSERT(eptype == USB_EP_ATTR_XFER_CONTROL);
+
+      /* Map the size in bytes to the encoded value in the register */
+
+      switch (maxpacket)
+        {
+          case 8:
+            mpsiz = OTG_DIEPCTL0_MPSIZ_8;
+            break;
+
+          case 16:
+            mpsiz = OTG_DIEPCTL0_MPSIZ_16;
+            break;
+
+          case 32:
+            mpsiz = OTG_DIEPCTL0_MPSIZ_32;
+            break;
+
+          case 64:
+            mpsiz = OTG_DIEPCTL0_MPSIZ_64;
+            break;
+
+          default:
+            uerr("Unsupported maxpacket: %d\n", maxpacket);
+            return -EINVAL;
+        }
+    }
+
+  /* For other endpoints, the packet size is in bytes */
+
+  else
+    {
+      mpsiz = (maxpacket << OTG_DIEPCTL_MPSIZ_SHIFT);
+    }
+
+
+  /* If the endpoint is already active don't change the endpoint control
+   * register.
+   */
+
+  regaddr = STM32_OTG_DIEPCTL(privep->epphy);
+  regval  = stm32_getreg(regaddr);
+  if ((regval & OTG_DIEPCTL_USBAEP) == 0)
+    {
+      if (regval & OTG_DIEPCTL_NAKSTS)
+        {
+          regval |= OTG_DIEPCTL_CNAK;
+        }
+
+      regval &= ~(OTG_DIEPCTL_MPSIZ_MASK | OTG_DIEPCTL_EPTYP_MASK |
+                  OTG_DIEPCTL_TXFNUM_MASK);
+      regval |= mpsiz;
+      regval |= (eptype << OTG_DIEPCTL_EPTYP_SHIFT);
+      regval |= (eptype << OTG_DIEPCTL_TXFNUM_SHIFT);
+      regval |= (OTG_DIEPCTL_SD0PID | OTG_DIEPCTL_USBAEP);
+      stm32_putreg(regval, regaddr);
+
+      /* Save the endpoint configuration */
+
+      privep->ep.maxpacket = maxpacket;
+      privep->eptype       = eptype;
+      privep->stalled      = false;
+    }
+
+  /* Enable the interrupt for this endpoint */
+
+  regval = stm32_getreg(STM32_OTG_DAINTMSK);
+  regval |= OTG_DAINT_IEP(privep->epphy);
+  stm32_putreg(regval, STM32_OTG_DAINTMSK);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_ep_configure
+ *
+ * Description:
+ *   Configure endpoint, making it usable
+ *
+ * Input Parameters:
+ *   ep   - the struct usbdev_ep_s instance obtained from allocep()
+ *   desc - A struct usb_epdesc_s instance describing the endpoint
+ *   last - true if this this last endpoint to be configured.  Some hardware
+ *          needs to take special action when all of the endpoints have been
+ *          configured.
+ *
+ ****************************************************************************/
+
+static int stm32_ep_configure(FAR struct usbdev_ep_s *ep,
+                              FAR const struct usb_epdesc_s *desc,
+                              bool last)
+{
+  FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep;
+  uint16_t maxpacket;
+  uint8_t  eptype;
+  int ret;
+
+  usbtrace(TRACE_EPCONFIGURE, privep->epphy);
+  DEBUGASSERT(desc->addr == ep->eplog);
+
+  /* Initialize EP capabilities */
+
+  maxpacket = GETUINT16(desc->mxpacketsize);
+  eptype    = desc->attr & USB_EP_ATTR_XFERTYPE_MASK;
+
+  /* Setup Endpoint Control Register */
+
+  if (privep->isin)
+    {
+      ret = stm32_epin_configure(privep, eptype, maxpacket);
+    }
+  else
+    {
+      ret = stm32_epout_configure(privep, eptype, maxpacket);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32_ep0_configure
+ *
+ * Description:
+ *   Reset Usb engine
+ *
+ ****************************************************************************/
+
+static void stm32_ep0_configure(FAR struct stm32_usbdev_s *priv)
+{
+  /* Enable EP0 IN and OUT */
+
+  (void)stm32_epin_configure(&priv->epin[EP0], USB_EP_ATTR_XFER_CONTROL,
+                             CONFIG_USBDEV_EP0_MAXSIZE);
+  (void)stm32_epout_configure(&priv->epout[EP0], USB_EP_ATTR_XFER_CONTROL,
+                              CONFIG_USBDEV_EP0_MAXSIZE);
+}
+
+/****************************************************************************
+ * Name: stm32_epout_disable
+ *
+ * Description:
+ *   Diable an OUT endpoint will no longer be used
+ *
+ ****************************************************************************/
+
+static void stm32_epout_disable(FAR struct stm32_ep_s *privep)
+{
+  uint32_t regaddr;
+  uint32_t regval;
+  irqstate_t flags;
+
+  usbtrace(TRACE_EPDISABLE, privep->epphy);
+
+  /* Is this an IN or an OUT endpoint */
+
+  /* Before disabling any OUT endpoint, the application must enable
+   * Global OUT NAK mode in the core.
+   */
+
+  flags = enter_critical_section();
+  stm32_enablegonak(privep);
+
+  /* Disable the required OUT endpoint by setting the EPDIS and SNAK bits
+   * int DOECPTL register.
+   */
+
+  regaddr = STM32_OTG_DOEPCTL(privep->epphy);
+  regval  = stm32_getreg(regaddr);
+  regval &= ~OTG_DOEPCTL_USBAEP;
+  regval |= (OTG_DOEPCTL_EPDIS | OTG_DOEPCTL_SNAK);
+  stm32_putreg(regval, regaddr);
+
+  /* Wait for the EPDISD interrupt which indicates that the OUT
+   * endpoint is completely disabled.
+   */
+
+#if 0 /* Doesn't happen */
+  regaddr = STM32_OTG_DOEPINT(privep->epphy);
+  while ((stm32_getreg(regaddr) & OTG_DOEPINT_EPDISD) == 0);
+#else
+  /* REVISIT: */
+  up_udelay(10);
+#endif
+
+  /* Clear the EPDISD interrupt indication */
+
+  stm32_putreg(OTG_DOEPINT_EPDISD, STM32_OTG_DOEPINT(privep->epphy));
+
+  /* Then disable the Global OUT NAK mode to continue receiving data
+   * from other non-disabled OUT endpoints.
+   */
+
+  stm32_disablegonak(privep);
+
+  /* Disable endpoint interrupts */
+
+  regval  = stm32_getreg(STM32_OTG_DAINTMSK);
+  regval &= ~OTG_DAINT_OEP(privep->epphy);
+  stm32_putreg(regval, STM32_OTG_DAINTMSK);
+
+  /* Cancel any queued read requests */
+
+  stm32_req_cancel(privep, -ESHUTDOWN);
+
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: stm32_epin_disable
+ *
+ * Description:
+ *   Disable an IN endpoint when it will no longer be used
+ *
+ ****************************************************************************/
+
+static void stm32_epin_disable(FAR struct stm32_ep_s *privep)
+{
+  uint32_t regaddr;
+  uint32_t regval;
+  irqstate_t flags;
+
+  usbtrace(TRACE_EPDISABLE, privep->epphy);
+
+  /* After USB reset, the endpoint will already be deactivated by the
+   * hardware. Trying to disable again will just hang in the wait.
+   */
+
+  regaddr = STM32_OTG_DIEPCTL(privep->epphy);
+  regval  = stm32_getreg(regaddr);
+  if ((regval & OTG_DIEPCTL_USBAEP) == 0)
+    {
+      return;
+    }
+
+  /* This INEPNE wait logic is suggested by reference manual, but seems
+   * to get stuck to infinite loop.
+   */
+
+#if 0
+  /* Make sure that there is no pending IPEPNE interrupt (because we are
+   * to poll this bit below).
+   */
+
+  stm32_putreg(OTG_DIEPINT_INEPNE, STM32_OTG_DIEPINT(privep->epphy));
+
+  /* Set the endpoint in NAK mode */
+
+  regaddr = STM32_OTG_DIEPCTL(privep->epphy);
+  regval  = stm32_getreg(regaddr);
+  regval &= ~OTG_DIEPCTL_USBAEP;
+  regval |= (OTG_DIEPCTL_EPDIS | OTG_DIEPCTL_SNAK);
+  stm32_putreg(regval, regaddr);
+
+  /* Wait for the INEPNE interrupt that indicates that we are now in NAK mode */
+
+  regaddr = STM32_OTG_DIEPINT(privep->epphy);
+  while ((stm32_getreg(regaddr) & OTG_DIEPINT_INEPNE) == 0);
+
+  /* Clear the INEPNE interrupt indication */
+
+  stm32_putreg(OTG_DIEPINT_INEPNE, regaddr);
+#endif
+
+  /* Deactivate and disable the endpoint by setting the EPDIS and SNAK bits
+   * the DIEPCTLx register.
+   */
+
+  flags = enter_critical_section();
+  regaddr = STM32_OTG_DIEPCTL(privep->epphy);
+  regval  = stm32_getreg(regaddr);
+  regval &= ~OTG_DIEPCTL_USBAEP;
+  regval |= (OTG_DIEPCTL_EPDIS | OTG_DIEPCTL_SNAK);
+  stm32_putreg(regval, regaddr);
+
+  /* Wait for the EPDISD interrupt which indicates that the IN
+   * endpoint is completely disabled.
+   */
+
+  regaddr = STM32_OTG_DIEPINT(privep->epphy);
+  while ((stm32_getreg(regaddr) & OTG_DIEPINT_EPDISD) == 0);
+
+  /* Clear the EPDISD interrupt indication */
+
+  regval = stm32_getreg(regaddr);
+  regval |= OTG_DIEPINT_EPDISD;
+  stm32_putreg(regval, regaddr);
+
+  /* Flush any data remaining in the TxFIFO */
+
+  stm32_txfifo_flush(OTG_GRSTCTL_TXFNUM_D(privep->epphy));
+
+  /* Disable endpoint interrupts */
+
+  regval  = stm32_getreg(STM32_OTG_DAINTMSK);
+  regval &= ~OTG_DAINT_IEP(privep->epphy);
+  stm32_putreg(regval, STM32_OTG_DAINTMSK);
+
+  /* Cancel any queued write requests */
+
+  stm32_req_cancel(privep, -ESHUTDOWN);
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: stm32_ep_disable
+ *
+ * Description:
+ *   The endpoint will no longer be used
+ *
+ ****************************************************************************/
+
+static int stm32_ep_disable(FAR struct usbdev_ep_s *ep)
+{
+  FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep;
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!ep)
+    {
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
+      return -EINVAL;
+    }
+#endif
+
+  usbtrace(TRACE_EPDISABLE, privep->epphy);
+
+  /* Is this an IN or an OUT endpoint */
+
+  if (privep->isin)
+    {
+      /* Disable the IN endpoint */
+
+      stm32_epin_disable(privep);
+    }
+  else
+    {
+      /* Disable the OUT endpoint */
+
+      stm32_epout_disable(privep);
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_ep_allocreq
+ *
+ * Description:
+ *   Allocate an I/O request
+ *
+ ****************************************************************************/
+
+static FAR struct usbdev_req_s *stm32_ep_allocreq(FAR struct usbdev_ep_s *ep)
+{
+  FAR struct stm32_req_s *privreq;
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!ep)
+    {
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
+      return NULL;
+    }
+#endif
+
+  usbtrace(TRACE_EPALLOCREQ, ((FAR struct stm32_ep_s *)ep)->epphy);
+
+  privreq = (FAR struct stm32_req_s *)kmm_malloc(sizeof(struct stm32_req_s));
+  if (!privreq)
+    {
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_ALLOCFAIL), 0);
+      return NULL;
+    }
+
+  memset(privreq, 0, sizeof(struct stm32_req_s));
+  return &privreq->req;
+}
+
+/****************************************************************************
+ * Name: stm32_ep_freereq
+ *
+ * Description:
+ *   Free an I/O request
+ *
+ ****************************************************************************/
+
+static void stm32_ep_freereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req)
+{
+  FAR struct stm32_req_s *privreq = (FAR struct stm32_req_s *)req;
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!ep || !req)
+    {
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
+      return;
+    }
+#endif
+
+  usbtrace(TRACE_EPFREEREQ, ((FAR struct stm32_ep_s *)ep)->epphy);
+  kmm_free(privreq);
+}
+
+/****************************************************************************
+ * Name: stm32_ep_allocbuffer
+ *
+ * Description:
+ *   Allocate an I/O buffer
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBDEV_DMA
+static void *stm32_ep_allocbuffer(FAR struct usbdev_ep_s *ep, unsigned bytes)
+{
+  usbtrace(TRACE_EPALLOCBUFFER, privep->epphy);
+
+#ifdef CONFIG_USBDEV_DMAMEMORY
+  return usbdev_dma_alloc(bytes);
+#else
+  return kmm_malloc(bytes);
+#endif
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_ep_freebuffer
+ *
+ * Description:
+ *   Free an I/O buffer
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBDEV_DMA
+static void stm32_ep_freebuffer(FAR struct usbdev_ep_s *ep, FAR void *buf)
+{
+  usbtrace(TRACE_EPFREEBUFFER, privep->epphy);
+
+#ifdef CONFIG_USBDEV_DMAMEMORY
+  usbdev_dma_free(buf);
+#else
+  kmm_free(buf);
+#endif
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_ep_submit
+ *
+ * Description:
+ *   Submit an I/O request to the endpoint
+ *
+ ****************************************************************************/
+
+static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req)
+{
+  FAR struct stm32_req_s *privreq = (FAR struct stm32_req_s *)req;
+  FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep;
+  FAR struct stm32_usbdev_s *priv;
+  irqstate_t flags;
+  int ret = OK;
+
+  /* Some sanity checking */
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!req || !req->callback || !req->buf || !ep)
+    {
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
+      uinfo("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+      return -EINVAL;
+    }
+#endif
+
+  usbtrace(TRACE_EPSUBMIT, privep->epphy);
+  priv = privep->dev;
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!priv->driver)
+    {
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_NOTCONFIGURED), priv->usbdev.speed);
+      return -ESHUTDOWN;
+    }
+#endif
+
+  /* Handle the request from the class driver */
+
+  req->result = -EINPROGRESS;
+  req->xfrd   = 0;
+
+  /* Disable Interrupts */
+
+  flags = enter_critical_section();
+
+  /* If we are stalled, then drop all requests on the floor */
+
+  if (privep->stalled)
+    {
+      ret = -EBUSY;
+    }
+  else
+    {
+      /* Add the new request to the request queue for the endpoint. */
+
+      if (stm32_req_addlast(privep, privreq) && !privep->active)
+        {
+          /* If a request was added to an IN endpoint, then attempt to send
+           * the request data buffer now.
+           */
+
+          if (privep->isin)
+            {
+              usbtrace(TRACE_INREQQUEUED(privep->epphy), privreq->req.len);
+
+              /* If the endpoint is not busy with another write request,
+               * then process the newly received write request now.
+               */
+
+              if (!privep->active)
+                {
+                  stm32_epin_request(priv, privep);
+                }
+            }
+
+          /* If the request was added to an OUT endpoint, then attempt to
+           * setup a read into the request data buffer now (this will, of
+           * course, fail if there is already a read in place).
+           */
+
+          else
+            {
+              usbtrace(TRACE_OUTREQQUEUED(privep->epphy), privreq->req.len);
+              stm32_epout_request(priv, privep);
+            }
+        }
+    }
+
+  leave_critical_section(flags);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32_ep_cancel
+ *
+ * Description:
+ *   Cancel an I/O request previously sent to an endpoint
+ *
+ ****************************************************************************/
+
+static int stm32_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req)
+{
+  FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep;
+  irqstate_t flags;
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!ep || !req)
+    {
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
+      return -EINVAL;
+    }
+#endif
+
+  usbtrace(TRACE_EPCANCEL, privep->epphy);
+
+  flags = enter_critical_section();
+
+  /* FIXME: if the request is the first, then we need to flush the EP
+   *         otherwise just remove it from the list
+   *
+   *  but ... all other implementations cancel all requests ...
+   */
+
+  stm32_req_cancel(privep, -ESHUTDOWN);
+  leave_critical_section(flags);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_epout_setstall
+ *
+ * Description:
+ *   Stall an OUT endpoint
+ *
+ ****************************************************************************/
+
+static int stm32_epout_setstall(FAR struct stm32_ep_s *privep)
+{
+#if 1
+  /* This implementation follows the requirements from the STM32 F4 reference
+   * manual.
+   */
+
+  uint32_t regaddr;
+  uint32_t regval;
+
+  /* Put the core in the Global OUT NAK mode */
+
+  stm32_enablegonak(privep);
+
+  /* Disable and STALL the OUT endpoint by setting the EPDIS and STALL bits
+   * in the DOECPTL register.
+   */
+
+  regaddr = STM32_OTG_DOEPCTL(privep->epphy);
+  regval  = stm32_getreg(regaddr);
+  regval |= (OTG_DOEPCTL_EPDIS | OTG_DOEPCTL_STALL);
+  stm32_putreg(regval, regaddr);
+
+  /* Wait for the EPDISD interrupt which indicates that the OUT
+   * endpoint is completely disabled.
+   */
+
+#if 0 /* Doesn't happen */
+  regaddr = STM32_OTG_DOEPINT(privep->epphy);
+  while ((stm32_getreg(regaddr) & OTG_DOEPINT_EPDISD) == 0);
+#else
+  /* REVISIT: */
+  up_udelay(10);
+#endif
+
+  /* Disable Global OUT NAK mode */
+
+  stm32_disablegonak(privep);
+
+  /* The endpoint is now stalled */
+
+  privep->stalled = true;
+  return OK;
+#else
+  /* This implementation follows the STMicro code example. */
+  /* REVISIT: */
+
+  uint32_t regaddr;
+  uint32_t regval;
+
+  /* Stall the OUT endpoint by setting the STALL bit in the DOECPTL register. */
+
+  regaddr = STM32_OTG_DOEPCTL(privep->epphy);
+  regval  = stm32_getreg(regaddr);
+  regval |= OTG_DOEPCTL_STALL;
+  stm32_putreg(regval, regaddr);
+
+  /* The endpoint is now stalled */
+
+  privep->stalled = true;
+  return OK;
+#endif
+}
+
+/****************************************************************************
+ * Name: stm32_epin_setstall
+ *
+ * Description:
+ *   Stall an IN endpoint
+ *
+ ****************************************************************************/
+
+static int stm32_epin_setstall(FAR struct stm32_ep_s *privep)
+{
+  uint32_t regaddr;
+  uint32_t regval;
+
+  /* Get the IN endpoint device control register */
+
+  regaddr = STM32_OTG_DIEPCTL(privep->epphy);
+  regval  = stm32_getreg(regaddr);
+
+  /* Then stall the endpoint */
+
+  regval |= OTG_DIEPCTL_STALL;
+  stm32_putreg(regval, regaddr);
+
+  /* The endpoint is now stalled */
+
+  privep->stalled = true;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_ep_setstall
+ *
+ * Description:
+ *   Stall an endpoint
+ *
+ ****************************************************************************/
+
+static int stm32_ep_setstall(FAR struct stm32_ep_s *privep)
+{
+  usbtrace(TRACE_EPSTALL, privep->epphy);
+
+  /* Is this an IN endpoint? */
+
+  if (privep->isin == 1)
+    {
+      return stm32_epin_setstall(privep);
+    }
+  else
+    {
+      return stm32_epout_setstall(privep);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_ep_clrstall
+ *
+ * Description:
+ *   Resume a stalled endpoint
+ *
+ ****************************************************************************/
+
+static int stm32_ep_clrstall(FAR struct stm32_ep_s *privep)
+{
+  uint32_t regaddr;
+  uint32_t regval;
+  uint32_t stallbit;
+  uint32_t data0bit;
+
+  usbtrace(TRACE_EPRESUME, privep->epphy);
+
+  /* Is this an IN endpoint? */
+
+  if (privep->isin == 1)
+    {
+      /* Clear the stall bit in the IN endpoint device control register */
+
+      regaddr  = STM32_OTG_DIEPCTL(privep->epphy);
+      stallbit = OTG_DIEPCTL_STALL;
+      data0bit = OTG_DIEPCTL_SD0PID;
+    }
+  else
+    {
+      /* Clear the stall bit in the IN endpoint device control register */
+
+      regaddr  = STM32_OTG_DOEPCTL(privep->epphy);
+      stallbit = OTG_DOEPCTL_STALL;
+      data0bit = OTG_DOEPCTL_SD0PID;
+    }
+
+  /* Clear the stall bit */
+
+  regval  = stm32_getreg(regaddr);
+  regval &= ~stallbit;
+
+  /* Set the DATA0 pid for interrupt and bulk endpoints */
+
+  if (privep->eptype == USB_EP_ATTR_XFER_INT ||
+      privep->eptype == USB_EP_ATTR_XFER_BULK)
+    {
+      /* Writing this bit sets the DATA0 PID */
+
+      regval |= data0bit;
+    }
+
+  stm32_putreg(regval, regaddr);
+
+  /* The endpoint is no longer stalled */
+
+  privep->stalled = false;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_ep_stall
+ *
+ * Description:
+ *   Stall or resume an endpoint
+ *
+ ****************************************************************************/
+
+static int stm32_ep_stall(FAR struct usbdev_ep_s *ep, bool resume)
+{
+  FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep;
+  irqstate_t flags;
+  int ret;
+
+  /* Set or clear the stall condition as requested */
+
+  flags = enter_critical_section();
+  if (resume)
+    {
+      ret = stm32_ep_clrstall(privep);
+    }
+  else
+    {
+      ret = stm32_ep_setstall(privep);
+    }
+  leave_critical_section(flags);
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32_ep0_stall
+ *
+ * Description:
+ *   Stall endpoint 0
+ *
+ ****************************************************************************/
+
+static void stm32_ep0_stall(FAR struct stm32_usbdev_s *priv)
+{
+  stm32_epin_setstall(&priv->epin[EP0]);
+  stm32_epout_setstall(&priv->epout[EP0]);
+  priv->stalled = true;
+  stm32_ep0out_ctrlsetup(priv);
+}
+
+/****************************************************************************
+ * Device operations
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_ep_alloc
+ *
+ * Description:
+ *   Allocate an endpoint matching the parameters.
+ *
+ * Input Parameters:
+ *   eplog  - 7-bit logical endpoint number (direction bit ignored).  Zero means
+ *            that any endpoint matching the other requirements will suffice.  The
+ *            assigned endpoint can be found in the eplog field.
+ *   in     - true: IN (device-to-host) endpoint requested
+ *   eptype - Endpoint type.  One of {USB_EP_ATTR_XFER_ISOC, USB_EP_ATTR_XFER_BULK,
+ *            USB_EP_ATTR_XFER_INT}
+ *
+ ****************************************************************************/
+
+static FAR struct usbdev_ep_s *stm32_ep_alloc(FAR struct usbdev_s *dev,
+                                              uint8_t eplog, bool in,
+                                              uint8_t eptype)
+{
+  FAR struct stm32_usbdev_s *priv = (FAR struct stm32_usbdev_s *)dev;
+  uint8_t epavail;
+  irqstate_t flags;
+  int epphy;
+  int epno = 0;
+
+  usbtrace(TRACE_DEVALLOCEP, (uint16_t)eplog);
+
+  /* Ignore any direction bits in the logical address */
+
+  epphy = USB_EPNO(eplog);
+
+  /* Get the set of available endpoints depending on the direction */
+
+  flags = enter_critical_section();
+  epavail = priv->epavail[in];
+
+  /* A physical address of 0 means that any endpoint will do */
+
+  if (epphy > 0)
+    {
+      /* Otherwise, we will return the endpoint structure only for the requested
+       * 'logical' endpoint.  All of the other checks will still be performed.
+       *
+       * First, verify that the logical endpoint is in the range supported by
+       * by the hardware.
+       */
+
+      if (epphy >= STM32_NENDPOINTS)
+        {
+          usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADEPNO), (uint16_t)epphy);
+          return NULL;
+        }
+
+      /* Remove all of the candidate endpoints from the bitset except for the
+       * this physical endpoint number.
+       */
+
+      epavail &= (1 << epphy);
+    }
+
+  /* Is there an available endpoint? */
+
+  if (epavail)
+    {
+      /* Yes.. Select the lowest numbered endpoint in the set of available
+       * endpoints.
+       */
+
+      for (epno = 1; epno < STM32_NENDPOINTS; epno++)
+        {
+          uint8_t bit = 1 << epno;
+          if ((epavail & bit) != 0)
+            {
+              /* Mark the endpoint no longer available */
+
+              priv->epavail[in] &= ~(1 << epno);
+
+              /* And return the pointer to the standard endpoint structure */
+
+              leave_critical_section(flags);
+              return in ? &priv->epin[epno].ep : &priv->epout[epno].ep;
+            }
+        }
+
+      /* We should not get here */
+    }
+
+  usbtrace(TRACE_DEVERROR(STM32_TRACEERR_NOEP), (uint16_t)eplog);
+  leave_critical_section(flags);
+  return NULL;
+}
+
+/****************************************************************************
+ * Name: stm32_ep_free
+ *
+ * Description:
+ *   Free the previously allocated endpoint
+ *
+ ****************************************************************************/
+
+static void stm32_ep_free(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep)
+{
+  FAR struct stm32_usbdev_s *priv = (FAR struct stm32_usbdev_s *)dev;
+  FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep;
+  irqstate_t flags;
+
+  usbtrace(TRACE_DEVFREEEP, (uint16_t)privep->epphy);
+
+  if (priv && privep)
+    {
+      /* Mark the endpoint as available */
+
+      flags = enter_critical_section();
+      priv->epavail[privep->isin] |= (1 << privep->epphy);
+      leave_critical_section(flags);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_getframe
+ *
+ * Description:
+ *   Returns the current frame number
+ *
+ ****************************************************************************/
+
+static int stm32_getframe(struct usbdev_s *dev)
+{
+  uint32_t regval;
+
+  usbtrace(TRACE_DEVGETFRAME, 0);
+
+  /* Return the last frame number of the last SOF detected by the hardware */
+
+  regval = stm32_getreg(STM32_OTG_DSTS);
+  return (int)((regval & OTG_DSTS_SOFFN_MASK) >> OTG_DSTS_SOFFN_SHIFT);
+}
+
+/****************************************************************************
+ * Name: stm32_wakeup
+ *
+ * Description:
+ *   Exit suspend mode.
+ *
+ ****************************************************************************/
+
+static int stm32_wakeup(struct usbdev_s *dev)
+{
+  FAR struct stm32_usbdev_s *priv = (FAR struct stm32_usbdev_s *)dev;
+  uint32_t regval;
+  irqstate_t flags;
+
+  usbtrace(TRACE_DEVWAKEUP, 0);
+
+  /* Is wakeup enabled? */
+
+  flags = enter_critical_section();
+  if (priv->wakeup)
+    {
+      /* Yes... is the core suspended? */
+
+      regval = stm32_getreg(STM32_OTG_DSTS);
+      if ((regval & OTG_DSTS_SUSPSTS) != 0)
+        {
+          /* Re-start the PHY clock and un-gate USB core clock (HCLK) */
+
+#ifdef CONFIG_USBDEV_LOWPOWER
+          regval = stm32_getreg(STM32_OTG_PCGCCTL);
+          regval &= ~(OTG_PCGCCTL_STPPCLK | OTG_PCGCCTL_GATEHCLK);
+          stm32_putreg(regval, STM32_OTG_PCGCCTL);
+#endif
+          /* Activate Remote wakeup signaling */
+
+          regval  = stm32_getreg(STM32_OTG_DCTL);
+          regval |= OTG_DCTL_RWUSIG;
+          stm32_putreg(regval, STM32_OTG_DCTL);
+          up_mdelay(5);
+          regval &= ~OTG_DCTL_RWUSIG;
+          stm32_putreg(regval, STM32_OTG_DCTL);
+        }
+    }
+
+  leave_critical_section(flags);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_selfpowered
+ *
+ * Description:
+ *   Sets/clears the device self-powered feature
+ *
+ ****************************************************************************/
+
+static int stm32_selfpowered(struct usbdev_s *dev, bool selfpowered)
+{
+  FAR struct stm32_usbdev_s *priv = (FAR struct stm32_usbdev_s *)dev;
+
+  usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!dev)
+    {
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
+      return -ENODEV;
+    }
+#endif
+
+  priv->selfpowered = selfpowered;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_pullup
+ *
+ * Description:
+ *   Software-controlled connect to/disconnect from USB host
+ *
+ ****************************************************************************/
+
+static int stm32_pullup(struct usbdev_s *dev, bool enable)
+{
+  uint32_t regval;
+
+  usbtrace(TRACE_DEVPULLUP, (uint16_t)enable);
+
+  irqstate_t flags = enter_critical_section();
+  regval = stm32_getreg(STM32_OTG_DCTL);
+  if (enable)
+    {
+      /* Connect the device by clearing the soft disconnect bit in the DCTL
+       * register
+       */
+
+      regval &= ~OTG_DCTL_SDIS;
+    }
+  else
+    {
+      /* Connect the device by setting the soft disconnect bit in the DCTL
+       * register
+       */
+
+      regval |= OTG_DCTL_SDIS;
+    }
+
+  stm32_putreg(regval, STM32_OTG_DCTL);
+  leave_critical_section(flags);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_setaddress
+ *
+ * Description:
+ *   Set the devices USB address
+ *
+ ****************************************************************************/
+
+static void stm32_setaddress(struct stm32_usbdev_s *priv, uint16_t address)
+{
+  uint32_t regval;
+
+  /* Set the device address in the DCFG register */
+
+  regval = stm32_getreg(STM32_OTG_DCFG);
+  regval &= ~OTG_DCFG_DAD_MASK;
+  regval |= ((uint32_t)address << OTG_DCFG_DAD_SHIFT);
+  stm32_putreg(regval, STM32_OTG_DCFG);
+
+  /* Are we now addressed?  (i.e., do we have a non-NULL device
+   * address?)
+   */
+
+  if (address != 0)
+    {
+      priv->devstate  = DEVSTATE_ADDRESSED;
+      priv->addressed = true;
+    }
+  else
+    {
+      priv->devstate  = DEVSTATE_DEFAULT;
+      priv->addressed = false;
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_txfifo_flush
+ *
+ * Description:
+ *   Flush the specific TX fifo.
+ *
+ ****************************************************************************/
+
+static int stm32_txfifo_flush(uint32_t txfnum)
+{
+  uint32_t regval;
+  uint32_t timeout;
+
+  /* Initiate the TX FIFO flush operation */
+
+  regval = OTG_GRSTCTL_TXFFLSH | txfnum;
+  stm32_putreg(regval, STM32_OTG_GRSTCTL);
+
+  /* Wait for the FLUSH to complete */
+
+  for (timeout = 0; timeout < STM32_FLUSH_DELAY; timeout++)
+    {
+      regval = stm32_getreg(STM32_OTG_GRSTCTL);
+      if ((regval & OTG_GRSTCTL_TXFFLSH) == 0)
+        {
+          break;
+        }
+    }
+
+  /* Wait for 3 PHY Clocks */
+
+  up_udelay(3);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_rxfifo_flush
+ *
+ * Description:
+ *   Flush the RX fifo.
+ *
+ ****************************************************************************/
+
+static int stm32_rxfifo_flush(void)
+{
+  uint32_t regval;
+  uint32_t timeout;
+
+  /* Initiate the RX FIFO flush operation */
+
+  stm32_putreg(OTG_GRSTCTL_RXFFLSH, STM32_OTG_GRSTCTL);
+
+  /* Wait for the FLUSH to complete */
+
+  for (timeout = 0; timeout < STM32_FLUSH_DELAY; timeout++)
+    {
+      regval = stm32_getreg(STM32_OTG_GRSTCTL);
+      if ((regval & OTG_GRSTCTL_RXFFLSH) == 0)
+        {
+          break;
+        }
+    }
+
+  /* Wait for 3 PHY Clocks */
+
+  up_udelay(3);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_swinitialize
+ *
+ * Description:
+ *   Initialize all driver data structures.
+ *
+ ****************************************************************************/
+
+static void stm32_swinitialize(FAR struct stm32_usbdev_s *priv)
+{
+  FAR struct stm32_ep_s *privep;
+  int i;
+
+  /* Initialize the device state structure */
+
+  memset(priv, 0, sizeof(struct stm32_usbdev_s));
+
+  priv->usbdev.ops = &g_devops;
+  priv->usbdev.ep0 = &priv->epin[EP0].ep;
+
+  priv->epavail[0] = STM32_EP_AVAILABLE;
+  priv->epavail[1] = STM32_EP_AVAILABLE;
+
+  priv->epin[EP0].ep.priv  = priv;
+  priv->epout[EP0].ep.priv = priv;
+
+  /* Initialize the endpoint lists */
+
+  for (i = 0; i < STM32_NENDPOINTS; i++)
+    {
+      /* Set endpoint operations, reference to driver structure (not
+       * really necessary because there is only one controller), and
+       * the physical endpoint number (which is just the index to the
+       * endpoint).
+       */
+
+      privep           = &priv->epin[i];
+      privep->ep.ops   = &g_epops;
+      privep->dev      = priv;
+      privep->isin     = 1;
+
+      /* The index, i, is the physical endpoint address;  Map this
+       * to a logical endpoint address usable by the class driver.
+       */
+
+      privep->epphy    = i;
+      privep->ep.eplog = STM32_EPPHYIN2LOG(i);
+
+      /* Control until endpoint is activated */
+
+      privep->eptype       = USB_EP_ATTR_XFER_CONTROL;
+      privep->ep.maxpacket = CONFIG_USBDEV_EP0_MAXSIZE;
+    }
+
+  /* Initialize the endpoint lists */
+
+  for (i = 0; i < STM32_NENDPOINTS; i++)
+    {
+      /* Set endpoint operations, reference to driver structure (not
+       * really necessary because there is only one controller), and
+       * the physical endpoint number (which is just the index to the
+       * endpoint).
+       */
+
+      privep           = &priv->epout[i];
+      privep->ep.ops   = &g_epops;
+      privep->dev      = priv;
+
+      /* The index, i, is the physical endpoint address;  Map this
+       * to a logical endpoint address usable by the class driver.
+       */
+
+      privep->epphy    = i;
+      privep->ep.eplog = STM32_EPPHYOUT2LOG(i);
+
+      /* Control until endpoint is activated */
+
+      privep->eptype       = USB_EP_ATTR_XFER_CONTROL;
+      privep->ep.maxpacket = CONFIG_USBDEV_EP0_MAXSIZE;
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_hwinitialize
+ *
+ * Description:
+ *   Configure the OTG  core for operation.
+ *
+ ****************************************************************************/
+
+static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv)
+{
+  uint32_t regval;
+  uint32_t timeout;
+  uint32_t address;
+  int i;
+
+  /* At start-up the core is in FS/HS mode. */
+
+  /* Disable global interrupts by clearing the GINTMASK bit in the GAHBCFG
+   * register; Set the TXFELVL bit in the GAHBCFG register so that TxFIFO
+   * interrupts will occur when the TxFIFO is truly empty (not just half full).
+   */
+
+  stm32_putreg(OTG_GAHBCFG_TXFELVL, STM32_OTG_GAHBCFG);
+
+#if defined(CONFIG_STM32F7_OTGHS)
+  /* Set the PHYSEL bit in the GUSBCFG register to select the OTG HS serial
+   * transceiver: "This bit is always 1 with write-only access"
+   */
+
+  regval  = stm32_getreg(STM32_OTG_GUSBCFG);
+  regval |= OTG_GUSBCFG_PHYSEL;
+  stm32_putreg(regval, STM32_OTG_GUSBCFG);
+#endif
+
+  /* Common USB OTG core initialization */
+  /* Reset after a PHY select and set Host mode.  First, wait for AHB master
+   * IDLE state.
+   */
+
+  for (timeout = 0; timeout < STM32_READY_DELAY; timeout++)
+    {
+      up_udelay(3);
+      regval = stm32_getreg(STM32_OTG_GRSTCTL);
+      if ((regval & OTG_GRSTCTL_AHBIDL) != 0)
+        {
+          break;
+        }
+    }
+
+  /* Then perform the core soft reset. */
+
+  stm32_putreg(OTG_GRSTCTL_CSRST, STM32_OTG_GRSTCTL);
+  for (timeout = 0; timeout < STM32_READY_DELAY; timeout++)
+    {
+      regval = stm32_getreg(STM32_OTG_GRSTCTL);
+      if ((regval & OTG_GRSTCTL_CSRST) == 0)
+        {
+          break;
+        }
+    }
+
+  /* Wait for 3 PHY Clocks */
+
+  up_udelay(3);
+
+  /* Deactivate the power down */
+
+
+  /* Detection Enable when set
+   */
+
+  regval  = OTG_GCCFG_PWRDWN;
+
+# ifdef CONFIG_USBDEV_VBUSSENSING
+  regval |= OTG_GCCFG_VBDEN;
+# endif
+
+
+  stm32_putreg(regval, STM32_OTG_GCCFG);
+  up_mdelay(20);
+
+  /* When VBUS sensing is not used we
+   * need to force the B session valid
+   */
+
+
+# ifndef CONFIG_USBDEV_VBUSSENSING
+  regval  =  stm32_getreg(STM32_OTG_GOTGCTL);
+  regval |= (OTG_GOTGCTL_BVALOEN | OTG_GOTGCTL_BVALOVAL);
+  stm32_putreg(regval, STM32_OTG_GOTGCTL);
+# endif
+
+
+  /* Force Device Mode */
+
+  regval  = stm32_getreg(STM32_OTG_GUSBCFG);
+  regval &= ~OTG_GUSBCFG_FHMOD;
+  regval |= OTG_GUSBCFG_FDMOD;
+  stm32_putreg(regval, STM32_OTG_GUSBCFG);
+  up_mdelay(50);
+
+  /* Initialize device mode */
+  /* Restart the PHY Clock */
+
+  stm32_putreg(0, STM32_OTG_PCGCCTL);
+
+  /* Device configuration register */
+
+  regval = stm32_getreg(STM32_OTG_DCFG);
+  regval &= ~OTG_DCFG_PFIVL_MASK;
+  regval |= OTG_DCFG_PFIVL_80PCT;
+  stm32_putreg(regval, STM32_OTG_DCFG);
+
+  /* Set full speed PHY */
+
+  regval = stm32_getreg(STM32_OTG_DCFG);
+  regval &= ~OTG_DCFG_DSPD_MASK;
+  regval |= OTG_DCFG_DSPD_FS;
+  stm32_putreg(regval, STM32_OTG_DCFG);
+
+  /* Set Rx FIFO size */
+
+  stm32_putreg(STM32_RXFIFO_WORDS, STM32_OTG_GRXFSIZ);
+
+#if STM32_NENDPOINTS > 0
+  address = STM32_RXFIFO_WORDS;
+  regval  = (address << OTG_DIEPTXF0_TX0FD_SHIFT) |
+            (STM32_EP0_TXFIFO_WORDS << OTG_DIEPTXF0_TX0FSA_SHIFT);
+  stm32_putreg(regval, STM32_OTG_DIEPTXF0);
+#endif
+
+#if STM32_NENDPOINTS > 1
+  address += STM32_EP0_TXFIFO_WORDS;
+  regval   = (address << OTG_DIEPTXF_INEPTXSA_SHIFT) |
+             (STM32_EP1_TXFIFO_WORDS << OTG_DIEPTXF_INEPTXFD_SHIFT);
+  stm32_putreg(regval, STM32_OTG_DIEPTXF(1));
+#endif
+
+#if STM32_NENDPOINTS > 2
+  address += STM32_EP1_TXFIFO_WORDS;
+  regval   = (address << OTG_DIEPTXF_INEPTXSA_SHIFT) |
+             (STM32_EP2_TXFIFO_WORDS << OTG_DIEPTXF_INEPTXFD_SHIFT);
+  stm32_putreg(regval, STM32_OTG_DIEPTXF(2));
+#endif
+
+#if STM32_NENDPOINTS > 3
+  address += STM32_EP2_TXFIFO_WORDS;
+  regval   = (address << OTG_DIEPTXF_INEPTXSA_SHIFT) |
+             (STM32_EP3_TXFIFO_WORDS << OTG_DIEPTXF_INEPTXFD_SHIFT);
+  stm32_putreg(regval, STM32_OTG_DIEPTXF(3));
+#endif
+
+#if STM32_NENDPOINTS > 4
+  address += STM32_EP3_TXFIFO_WORDS;
+  regval   = (address << OTG_DIEPTXF_INEPTXSA_SHIFT) |
+             (STM32_EP4_TXFIFO_WORDS << OTG_DIEPTXF_INEPTXFD_SHIFT);
+  stm32_putreg(regval, STM32_OTG_DIEPTXF(4));
+#endif
+
+#if STM32_NENDPOINTS > 5
+  address += STM32_EP4_TXFIFO_WORDS;
+  regval   = (address << OTG_DIEPTXF_INEPTXSA_SHIFT) |
+             (STM32_EP5_TXFIFO_WORDS << OTG_DIEPTXF_INEPTXFD_SHIFT);
+  stm32_putreg(regval, STM32_OTG_DIEPTXF(5));
+#endif
+
+#if STM32_NENDPOINTS > 6
+  address += STM32_EP5_TXFIFO_WORDS;
+  regval   = (address << OTG_DIEPTXF_INEPTXSA_SHIFT) |
+             (STM32_EP6_TXFIFO_WORDS << OTG_DIEPTXF_INEPTXFD_SHIFT);
+  stm32_putreg(regval, STM32_OTG_DIEPTXF(6));
+#endif
+
+#if STM32_NENDPOINTS > 7
+  address += STM32_EP6_TXFIFO_WORDS;
+  regval   = (address << OTG_DIEPTXF_INEPTXSA_SHIFT) |
+             (STM32_EP7_TXFIFO_WORDS << OTG_DIEPTXF_INEPTXFD_SHIFT);
+  stm32_putreg(regval, STM32_OTG_DIEPTXF(7));
+#endif
+
+#if STM32_NENDPOINTS > 8
+  address += STM32_EP7_TXFIFO_WORDS;
+  regval   = (address << OTG_DIEPTXF_INEPTXSA_SHIFT) |
+             (STM32_EP8_TXFIFO_WORDS << OTG_DIEPTXF_INEPTXFD_SHIFT);
+  stm32_putreg(regval, STM32_OTG_DIEPTXF(8));
+#endif
+
+  /* Flush the FIFOs */
+
+  stm32_txfifo_flush(OTG_GRSTCTL_TXFNUM_DALL);
+  stm32_rxfifo_flush();
+
+  /* Clear all pending Device Interrupts */
+
+  stm32_putreg(0, STM32_OTG_DIEPMSK);
+  stm32_putreg(0, STM32_OTG_DOEPMSK);
+  stm32_putreg(0, STM32_OTG_DIEPEMPMSK);
+  stm32_putreg(0xffffffff, STM32_OTG_DAINT);
+  stm32_putreg(0, STM32_OTG_DAINTMSK);
+
+  /* Configure all IN endpoints */
+
+  for (i = 0; i < STM32_NENDPOINTS; i++)
+    {
+      regval = stm32_getreg(STM32_OTG_DIEPCTL(i));
+      if ((regval & OTG_DIEPCTL_EPENA) != 0)
+        {
+          /* The endpoint is already enabled */
+
+          regval = OTG_DIEPCTL_EPENA | OTG_DIEPCTL_SNAK;
+        }
+      else
+        {
+          regval = 0;
+        }
+
+      stm32_putreg(regval, STM32_OTG_DIEPCTL(i));
+      stm32_putreg(0, STM32_OTG_DIEPTSIZ(i));
+      stm32_putreg(0xff, STM32_OTG_DIEPINT(i));
+    }
+
+  /* Configure all OUT endpoints */
+
+  for (i = 0; i < STM32_NENDPOINTS; i++)
+    {
+      regval = stm32_getreg(STM32_OTG_DOEPCTL(i));
+      if ((regval & OTG_DOEPCTL_EPENA) != 0)
+        {
+          /* The endpoint is already enabled */
+
+          regval = OTG_DOEPCTL_EPENA | OTG_DOEPCTL_SNAK;
+        }
+      else
+        {
+          regval = 0;
+        }
+
+      stm32_putreg(regval, STM32_OTG_DOEPCTL(i));
+      stm32_putreg(0, STM32_OTG_DOEPTSIZ(i));
+      stm32_putreg(0xff, STM32_OTG_DOEPINT(i));
+    }
+
+  /* Disable all interrupts. */
+
+  stm32_putreg(0, STM32_OTG_GINTMSK);
+
+  /* Clear any pending USB_OTG Interrupts */
+
+  stm32_putreg(0xffffffff, STM32_OTG_GOTGINT);
+
+  /* Clear any pending interrupts */
+
+  regval = stm32_getreg(STM32_OTG_GINTSTS);
+  regval &=  OTG_GINT_RESERVED;
+  stm32_putreg(regval | OTG_GINT_RC_W1, STM32_OTG_GINTSTS);
+
+#if defined(CONFIG_STM32F7_OTGHS)
+  /* Disable the ULPI Clock enable in RCC AHB1 Register.  This must
+   * be done because if both the ULPI and the FS PHY clock enable bits
+   * are set at the same time, the ARM never awakens from WFI due to
+   * some bug / errata in the chip.
+   */
+
+  regval = stm32_getreg(STM32_RCC_AHB1LPENR);
+  regval &= ~RCC_AHB1ENR_OTGULPIEN;
+  stm32_putreg(regval, STM32_RCC_AHB1LPENR);
+#endif
+
+  /* Enable the interrupts in the INTMSK */
+
+  regval = (OTG_GINT_RXFLVL | OTG_GINT_USBSUSP | OTG_GINT_ENUMDNE |
+            OTG_GINT_IEP | OTG_GINT_OEP | OTG_GINT_USBRST);
+
+#ifdef CONFIG_USBDEV_ISOCHRONOUS
+  regval |= (OTG_GINT_IISOIXFR | OTG_GINT_IISOOXFR);
+#endif
+
+#ifdef CONFIG_USBDEV_SOFINTERRUPT
+  regval |= OTG_GINT_SOF;
+#endif
+
+#ifdef CONFIG_USBDEV_VBUSSENSING
+  regval |= (OTG_GINT_OTG | OTG_GINT_SRQ);
+#endif
+
+#ifdef CONFIG_DEBUG_USB
+  regval |= OTG_GINT_MMIS;
+#endif
+
+  stm32_putreg(regval, STM32_OTG_GINTMSK);
+
+  /* Enable the USB global interrupt by setting GINTMSK in the global OTG
+   * AHB configuration register; Set the TXFELVL bit in the GAHBCFG
+   * register so that TxFIFO interrupts will occur when the TxFIFO is truly
+   * empty (not just half full).
+   */
+
+  stm32_putreg(OTG_GAHBCFG_GINTMSK | OTG_GAHBCFG_TXFELVL,
+               STM32_OTG_GAHBCFG);
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_usbinitialize
+ *
+ * Description:
+ *   Initialize USB hardware.
+ *
+ * Assumptions:
+ * - This function is called very early in the initialization sequence
+ * - PLL and GIO pin initialization is not performed here but should been in
+ *   the low-level  boot logic:  PLL1 must be configured for operation at 48MHz
+ *   and P0.23 and PO.31 in PINSEL1 must be configured for Vbus and USB connect
+ *   LED.
+ *
+ ****************************************************************************/
+
+void up_usbinitialize(void)
+{
+  /* At present, there is only a single OTG device support. Hence it is
+   * pre-allocated as g_otghsdev.  However, in most code, the private data
+   * structure will be referenced using the 'priv' pointer (rather than the
+   * global data) in order to simplify any future support for multiple
+   * devices.
+   */
+
+  FAR struct stm32_usbdev_s *priv = &g_otghsdev;
+  int ret;
+
+  usbtrace(TRACE_DEVINIT, 0);
+
+  /* Here we assume that:
+   *
+   * 1. GPIOA and OTG  peripheral clocking has already been enabled as part
+   *    of the boot sequence.
+   * 2. Board-specific logic has already enabled other board specific GPIOs
+   *    for things like soft pull-up, VBUS sensing, power controls, and over-
+   *    current detection.
+   */
+
+  /* Configure OTG alternate function pins
+   */
+
+  stm32_configgpio(GPIO_OTG_DM);
+  stm32_configgpio(GPIO_OTG_DP);
+  stm32_configgpio(GPIO_OTG_ID);    /* Only needed for OTG */
+
+  /* SOF output pin configuration is configurable. */
+
+#ifdef CONFIG_STM32F7_OTG_SOFOUTPUT
+  stm32_configgpio(GPIO_OTG_SOF);
+#endif
+
+  /* Uninitialize the hardware so that we know that we are starting from a
+   * known state. */
+
+  up_usbuninitialize();
+
+  /* Initialie the driver data structure */
+
+  stm32_swinitialize(priv);
+
+  /* Attach the OTG interrupt handler */
+
+  ret = irq_attach(STM32_IRQ_OTG, stm32_usbinterrupt, NULL);
+  if (ret < 0)
+    {
+      uerr("irq_attach failed\n", ret);
+      goto errout;
+    }
+
+  /* Initialize the USB OTG core */
+
+  stm32_hwinitialize(priv);
+
+  /* Disconnect device */
+
+  stm32_pullup(&priv->usbdev, false);
+
+  /* Reset/Re-initialize the USB hardware */
+
+  stm32_usbreset(priv);
+
+  /* Enable USB controller interrupts at the NVIC */
+
+  up_enable_irq(STM32_IRQ_OTG);
+
+#ifdef CONFIG_ARCH_IRQPRIO
+  /* Set the interrupt priority */
+
+  up_prioritize_irq(STM32_IRQ_OTG, CONFIG_OTG_PRI);
+#endif
+  return;
+
+errout:
+  up_usbuninitialize();
+}
+
+/****************************************************************************
+ * Name: up_usbuninitialize
+ ****************************************************************************/
+
+void up_usbuninitialize(void)
+{
+  /* At present, there is only a single OTG  device support. Hence it is
+   * pre-allocated as g_otghsdev.  However, in most code, the private data
+   * structure will be referenced using the 'priv' pointer (rather than the
+   * global data) in order to simplify any future support for multiple devices.
+   */
+
+  FAR struct stm32_usbdev_s *priv = &g_otghsdev;
+  irqstate_t flags;
+  int i;
+
+  usbtrace(TRACE_DEVUNINIT, 0);
+
+  if (priv->driver)
+    {
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_DRIVERREGISTERED), 0);
+      usbdev_unregister(priv->driver);
+    }
+
+  /* Disconnect device */
+
+  flags = enter_critical_section();
+  stm32_pullup(&priv->usbdev, false);
+  priv->usbdev.speed = USB_SPEED_UNKNOWN;
+
+  /* Disable and detach IRQs */
+
+  up_disable_irq(STM32_IRQ_OTG);
+  irq_detach(STM32_IRQ_OTG);
+
+  /* Disable all endpoint interrupts */
+
+  for (i = 0; i < STM32_NENDPOINTS; i++)
+    {
+      stm32_putreg(0xff, STM32_OTG_DIEPINT(i));
+      stm32_putreg(0xff, STM32_OTG_DOEPINT(i));
+    }
+
+  stm32_putreg(0, STM32_OTG_DIEPMSK);
+  stm32_putreg(0, STM32_OTG_DOEPMSK);
+  stm32_putreg(0, STM32_OTG_DIEPEMPMSK);
+  stm32_putreg(0, STM32_OTG_DAINTMSK);
+  stm32_putreg(0xffffffff, STM32_OTG_DAINT);
+
+  /* Flush the FIFOs */
+
+  stm32_txfifo_flush(OTG_GRSTCTL_TXFNUM_DALL);
+  stm32_rxfifo_flush();
+
+  /* TODO: Turn off USB power and clocking */
+
+  priv->devstate = DEVSTATE_DEFAULT;
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: usbdev_register
+ *
+ * Description:
+ *   Register a USB device class driver. The class driver's bind() method will be
+ *   called to bind it to a USB device driver.
+ *
+ ****************************************************************************/
+
+int usbdev_register(struct usbdevclass_driver_s *driver)
+{
+  /* At present, there is only a single OTG  device support. Hence it is
+   * pre-allocated as g_otghsdev.  However, in most code, the private data
+   * structure will be referenced using the 'priv' pointer (rather than the
+   * global data) in order to simplify any future support for multiple devices.
+   */
+
+  FAR struct stm32_usbdev_s *priv = &g_otghsdev;
+  int ret;
+
+  usbtrace(TRACE_DEVREGISTER, 0);
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!driver || !driver->ops->bind || !driver->ops->unbind ||
+      !driver->ops->disconnect || !driver->ops->setup)
+    {
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
+      return -EINVAL;
+    }
+
+  if (priv->driver)
+    {
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_DRIVER), 0);
+      return -EBUSY;
+    }
+#endif
+
+  /* First hook up the driver */
+
+  priv->driver = driver;
+
+  /* Then bind the class driver */
+
+  ret = CLASS_BIND(driver, &priv->usbdev);
+  if (ret)
+    {
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BINDFAILED), (uint16_t)-ret);
+      priv->driver = NULL;
+    }
+  else
+    {
+      /* Enable USB controller interrupts */
+
+      up_enable_irq(STM32_IRQ_OTG);
+
+      /* FIXME: nothing seems to call DEV_CONNECT(), but we need to set
+       *        the RS bit to enable the controller.  It kind of makes sense
+       *        to do this after the class has bound to us...
+       * GEN:   This bug is really in the class driver.  It should make the
+       *        soft connect when it is ready to be enumerated.  I have added
+       *        that logic to the class drivers but left this logic here.
+       */
+
+      stm32_pullup(&priv->usbdev, true);
+      priv->usbdev.speed = USB_SPEED_FULL;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: usbdev_unregister
+ *
+ * Description:
+ *   Un-register usbdev class driver.If the USB device is connected to a USB host,
+ *   it will first disconnect().  The driver is also requested to unbind() and clean
+ *   up any device state, before this procedure finally returns.
+ *
+ ****************************************************************************/
+
+int usbdev_unregister(struct usbdevclass_driver_s *driver)
+{
+  /* At present, there is only a single OTG device support. Hence it is
+   * pre-allocated as g_otghsdev.  However, in most code, the private data
+   * structure will be referenced using the 'priv' pointer (rather than the
+   * global data) in order to simplify any future support for multiple devices.
+   */
+
+  FAR struct stm32_usbdev_s *priv = &g_otghsdev;
+  irqstate_t flags;
+
+  usbtrace(TRACE_DEVUNREGISTER, 0);
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (driver != priv->driver)
+    {
+      usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
+      return -EINVAL;
+    }
+#endif
+
+  /* Reset the hardware and cancel all requests.  All requests must be
+   * canceled while the class driver is still bound.
+   */
+
+  flags = enter_critical_section();
+  stm32_usbreset(priv);
+  leave_critical_section(flags);
+
+  /* Unbind the class driver */
+
+  CLASS_UNBIND(driver, &priv->usbdev);
+
+  /* Disable USB controller interrupts */
+
+  flags = enter_critical_section();
+  up_disable_irq(STM32_IRQ_OTG);
+
+  /* Disconnect device */
+
+  stm32_pullup(&priv->usbdev, false);
+
+  /* Unhook the driver */
+
+  priv->driver = NULL;
+  leave_critical_section(flags);
+
+  return OK;
+}
+
+#endif /* CONFIG_USBDEV && CONFIG_STM32F7_OTGDEV */
diff --git a/arch/arm/src/stm32f7/stm32_otghost.c b/arch/arm/src/stm32f7/stm32_otghost.c
new file mode 100644
index 0000000000000000000000000000000000000000..6cbb0c617f9ba8a0968b253459f21b1be8f89824
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_otghost.c
@@ -0,0 +1,5335 @@
+/****************************************************************************
+ * arch/arm/src/stm32f7/stm32_otghost.c
+ *
+ *   Copyright (C) 2012-2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "chip.h"             /* Includes default GPIO settings */
+#include  /* May redefine GPIO settings */
+
+#include "up_arch.h"
+#include "up_internal.h"
+
+#include "stm32_otg.h"
+
+#if defined(CONFIG_USBHOST) && defined(CONFIG_STM32F7_OTGFS)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+/* STM32 USB OTG FS Host Driver Support
+ *
+ * Pre-requisites
+ *
+ *  CONFIG_USBHOST      - Enable general USB host support
+ *  CONFIG_STM32F7_OTGFS  - Enable the STM32 USB OTG FS block
+ *  CONFIG_STM32F7_SYSCFG - Needed
+ *
+ * Options:
+ *
+ *  CONFIG_STM32F7_OTG_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words.
+ *    Default 128 (512 bytes)
+ *  CONFIG_STM32F7_OTG_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO
+ *    in 32-bit words.  Default 96 (384 bytes)
+ *  CONFIG_STM32F7_OTG_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit
+ *    words.  Default 96 (384 bytes)
+ *  CONFIG_STM32F7_OTG_DESCSIZE - Maximum size of a descriptor.  Default: 128
+ *  CONFIG_STM32F7_OTG_SOFINTR - Enable SOF interrupts.  Why would you ever
+ *    want to do that?
+ *  CONFIG_STM32F7_USBHOST_REGDEBUG - Enable very low-level register access
+ *    debug.  Depends on CONFIG_DEBUG_FEATURES.
+ *  CONFIG_STM32F7_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
+ *    packets. Depends on CONFIG_DEBUG_FEATURES.
+ */
+
+/* Pre-requisites (partial) */
+
+#ifndef CONFIG_STM32F7_SYSCFG
+#  error "CONFIG_STM32F7_SYSCFG is required"
+#endif
+
+/* Default RxFIFO size */
+
+#ifndef CONFIG_STM32F7_OTG_RXFIFO_SIZE
+#  define CONFIG_STM32F7_OTG_RXFIFO_SIZE 128
+#endif
+
+/* Default host non-periodic Tx FIFO size */
+
+#ifndef CONFIG_STM32F7_OTG_NPTXFIFO_SIZE
+#  define CONFIG_STM32F7_OTG_NPTXFIFO_SIZE 96
+#endif
+
+/* Default host periodic Tx fifo size register */
+
+#ifndef CONFIG_STM32F7_OTG_PTXFIFO_SIZE
+#  define CONFIG_STM32F7_OTG_PTXFIFO_SIZE 96
+#endif
+
+/* Maximum size of a descriptor */
+
+#ifndef CONFIG_STM32F7_OTG_DESCSIZE
+#  define CONFIG_STM32F7_OTG_DESCSIZE 128
+#endif
+
+/* Register/packet debug depends on CONFIG_DEBUG_FEATURES */
+
+#ifndef CONFIG_DEBUG_FEATURES
+#  undef CONFIG_STM32F7_USBHOST_REGDEBUG
+#  undef CONFIG_STM32F7_USBHOST_PKTDUMP
+#endif
+
+/* HCD Setup ****************************************************************/
+/* Hardware capabilities */
+
+#define STM32_NHOST_CHANNELS      8   /* Number of host channels */
+#define STM32_MAX_PACKET_SIZE     64  /* Full speed max packet size */
+#define STM32_EP0_DEF_PACKET_SIZE 8   /* EP0 default packet size */
+#define STM32_EP0_MAX_PACKET_SIZE 64  /* EP0 FS max packet size */
+#define STM32_MAX_TX_FIFOS        15  /* Max number of TX FIFOs */
+#define STM32_MAX_PKTCOUNT        256 /* Max packet count */
+#define STM32_RETRY_COUNT         3   /* Number of ctrl transfer retries */
+
+/* Delays *******************************************************************/
+
+#define STM32_READY_DELAY         200000 /* In loop counts */
+#define STM32_FLUSH_DELAY         200000 /* In loop counts */
+#define STM32_SETUP_DELAY         SEC2TICK(5) /* 5 seconds in system ticks */
+#define STM32_DATANAK_DELAY       SEC2TICK(5) /* 5 seconds in system ticks */
+
+/* Ever-present MIN/MAX macros */
+
+#ifndef MIN
+#  define  MIN(a, b) (((a) < (b)) ? (a) : (b))
+#endif
+
+#ifndef MAX
+#  define  MAX(a, b) (((a) > (b)) ? (a) : (b))
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* The following enumeration represents the various states of the USB host
+ * state machine (for debug purposes only)
+ */
+
+enum stm32_smstate_e
+{
+  SMSTATE_DETACHED = 0,  /* Not attached to a device */
+  SMSTATE_ATTACHED,      /* Attached to a device */
+  SMSTATE_ENUM,          /* Attached, enumerating */
+  SMSTATE_CLASS_BOUND,   /* Enumeration complete, class bound */
+};
+
+/* This enumeration provides the reason for the channel halt. */
+
+enum stm32_chreason_e
+{
+  CHREASON_IDLE = 0,     /* Inactive (initial state) */
+  CHREASON_FREED,        /* Channel is no longer in use */
+  CHREASON_XFRC,         /* Transfer complete */
+  CHREASON_NAK,          /* NAK received */
+  CHREASON_NYET,         /* NotYet received */
+  CHREASON_STALL,        /* Endpoint stalled */
+  CHREASON_TXERR,        /* Transfer error received */
+  CHREASON_DTERR,        /* Data toggle error received */
+  CHREASON_FRMOR,        /* Frame overrun */
+  CHREASON_CANCELLED     /* Transfer cancelled */
+};
+
+/* This structure retains the state of one host channel.  NOTE: Since there
+ * is only one channel operation active at a time, some of the fields in
+ * in the structure could be moved in struct stm32_ubhost_s to achieve
+ * some memory savings.
+ */
+
+struct stm32_chan_s
+{
+  sem_t             waitsem;   /* Channel wait semaphore */
+  volatile uint8_t  result;    /* The result of the transfer */
+  volatile uint8_t  chreason;  /* Channel halt reason. See enum stm32_chreason_e */
+  uint8_t           chidx;     /* Channel index */
+  uint8_t           epno;      /* Device endpoint number (0-127) */
+  uint8_t           eptype;    /* See OTG_EPTYPE_* definitions */
+  uint8_t           funcaddr;  /* Device function address */
+  uint8_t           speed;     /* Device speed */
+  uint8_t           pid;       /* Data PID */
+  uint8_t           npackets;  /* Number of packets (for data toggle) */
+  bool              inuse;     /* True: This channel is "in use" */
+  volatile bool     indata1;   /* IN data toggle. True: DATA01 (Bulk and INTR only) */
+  volatile bool     outdata1;  /* OUT data toggle.  True: DATA01 */
+  bool              in;        /* True: IN endpoint */
+  volatile bool     waiter;    /* True: Thread is waiting for a channel event */
+  uint16_t          maxpacket; /* Max packet size */
+  uint16_t          buflen;    /* Buffer length (at start of transfer) */
+  volatile uint16_t xfrd;      /* Bytes transferred (at end of transfer) */
+  volatile uint16_t inflight;  /* Number of Tx bytes "in-flight" */
+  FAR uint8_t      *buffer;    /* Transfer buffer pointer */
+#ifdef CONFIG_USBHOST_ASYNCH
+  usbhost_asynch_t  callback;  /* Transfer complete callback */
+  FAR void         *arg;       /* Argument that accompanies the callback */
+#endif
+};
+
+/* A channel represents on uni-directional endpoint.  So, in the case of the
+ * bi-directional, control endpoint, there must be two channels to represent
+ * the endpoint.
+ */
+
+struct stm32_ctrlinfo_s
+{
+  uint8_t           inndx;     /* EP0 IN control channel index */
+  uint8_t           outndx;    /* EP0 OUT control channel index */
+};
+
+/* This structure retains the state of the USB host controller */
+
+struct stm32_usbhost_s
+{
+  /* Common device fields.  This must be the first thing defined in the
+   * structure so that it is possible to simply cast from struct usbhost_s
+   * to structstm32_usbhost_s.
+   */
+
+  struct usbhost_driver_s drvr;
+
+  /* This is the hub port description understood by class drivers */
+
+  struct usbhost_roothubport_s rhport;
+
+  /* Overall driver status */
+
+  volatile uint8_t  smstate;   /* The state of the USB host state machine */
+  uint8_t           chidx;     /* ID of channel waiting for space in Tx FIFO */
+  volatile bool     connected; /* Connected to device */
+  volatile bool     change;    /* Connection change */
+  volatile bool     pscwait;   /* True: Thread is waiting for a port event */
+  sem_t             exclsem;   /* Support mutually exclusive access */
+  sem_t             pscsem;    /* Semaphore to wait for a port event */
+  struct stm32_ctrlinfo_s ep0;  /* Root hub port EP0 description */
+
+#ifdef CONFIG_USBHOST_HUB
+  /* Used to pass external hub port events */
+
+  volatile struct usbhost_hubport_s *hport;
+#endif
+
+  /* The state of each host channel */
+
+  struct stm32_chan_s chan[STM32_MAX_TX_FIFOS];
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* Register operations ******************************************************/
+
+#ifdef CONFIG_STM32F7_USBHOST_REGDEBUG
+static void stm32_printreg(uint32_t addr, uint32_t val, bool iswrite);
+static void stm32_checkreg(uint32_t addr, uint32_t val, bool iswrite);
+static uint32_t stm32_getreg(uint32_t addr);
+static void stm32_putreg(uint32_t addr, uint32_t value);
+#else
+# define stm32_getreg(addr)     getreg32(addr)
+# define stm32_putreg(addr,val) putreg32(val,addr)
+#endif
+
+static inline void stm32_modifyreg(uint32_t addr, uint32_t clrbits,
+                                   uint32_t setbits);
+
+#ifdef CONFIG_STM32F7_USBHOST_PKTDUMP
+#  define stm32_pktdump(m,b,n) lib_dumpbuffer(m,b,n)
+#else
+#  define stm32_pktdump(m,b,n)
+#endif
+
+/* Semaphores ***************************************************************/
+
+static void stm32_takesem(sem_t *sem);
+#define stm32_givesem(s) sem_post(s);
+
+/* Byte stream access helper functions **************************************/
+
+static inline uint16_t stm32_getle16(const uint8_t *val);
+
+/* Channel management *******************************************************/
+
+static int stm32_chan_alloc(FAR struct stm32_usbhost_s *priv);
+static inline void stm32_chan_free(FAR struct stm32_usbhost_s *priv, int chidx);
+static inline void stm32_chan_freeall(FAR struct stm32_usbhost_s *priv);
+static void stm32_chan_configure(FAR struct stm32_usbhost_s *priv, int chidx);
+static void stm32_chan_halt(FAR struct stm32_usbhost_s *priv, int chidx,
+                            enum stm32_chreason_e chreason);
+static int stm32_chan_waitsetup(FAR struct stm32_usbhost_s *priv,
+                                FAR struct stm32_chan_s *chan);
+#ifdef CONFIG_USBHOST_ASYNCH
+static int stm32_chan_asynchsetup(FAR struct stm32_usbhost_s *priv,
+                                  FAR struct stm32_chan_s *chan,
+                                  usbhost_asynch_t callback, FAR void *arg);
+#endif
+static int stm32_chan_wait(FAR struct stm32_usbhost_s *priv,
+                           FAR struct stm32_chan_s *chan);
+static void stm32_chan_wakeup(FAR struct stm32_usbhost_s *priv,
+                              FAR struct stm32_chan_s *chan);
+static int stm32_ctrlchan_alloc(FAR struct stm32_usbhost_s *priv,
+                                uint8_t epno, uint8_t funcaddr, uint8_t speed,
+                                FAR struct stm32_ctrlinfo_s *ctrlep);
+static int stm32_ctrlep_alloc(FAR struct stm32_usbhost_s *priv,
+                              FAR const struct usbhost_epdesc_s *epdesc,
+                              FAR usbhost_ep_t *ep);
+static int stm32_xfrep_alloc(FAR struct stm32_usbhost_s *priv,
+                              FAR const struct usbhost_epdesc_s *epdesc,
+                              FAR usbhost_ep_t *ep);
+
+/* Control/data transfer logic **********************************************/
+
+static void stm32_transfer_start(FAR struct stm32_usbhost_s *priv, int chidx);
+#if 0 /* Not used */
+static inline uint16_t stm32_getframe(void);
+#endif
+static int stm32_ctrl_sendsetup(FAR struct stm32_usbhost_s *priv,
+                                FAR struct stm32_ctrlinfo_s *ep0,
+                                FAR const struct usb_ctrlreq_s *req);
+static int stm32_ctrl_senddata(FAR struct stm32_usbhost_s *priv,
+                               FAR struct stm32_ctrlinfo_s *ep0,
+                               FAR uint8_t *buffer, unsigned int buflen);
+static int stm32_ctrl_recvdata(FAR struct stm32_usbhost_s *priv,
+                               FAR struct stm32_ctrlinfo_s *ep0,
+                               FAR uint8_t *buffer, unsigned int buflen);
+static int stm32_in_setup(FAR struct stm32_usbhost_s *priv, int chidx);
+static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
+                                 FAR uint8_t *buffer, size_t buflen);
+#ifdef CONFIG_USBHOST_ASYNCH
+static void stm32_in_next(FAR struct stm32_usbhost_s *priv,
+                          FAR struct stm32_chan_s *chan);
+static int stm32_in_asynch(FAR struct stm32_usbhost_s *priv, int chidx,
+                           FAR uint8_t *buffer, size_t buflen,
+                           usbhost_asynch_t callback, FAR void *arg);
+#endif
+static int stm32_out_setup(FAR struct stm32_usbhost_s *priv, int chidx);
+static ssize_t stm32_out_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
+                                  FAR uint8_t *buffer, size_t buflen);
+#ifdef CONFIG_USBHOST_ASYNCH
+static void stm32_out_next(FAR struct stm32_usbhost_s *priv,
+                           FAR struct stm32_chan_s *chan);
+static int stm32_out_asynch(FAR struct stm32_usbhost_s *priv, int chidx,
+                            FAR uint8_t *buffer, size_t buflen,
+                            usbhost_asynch_t callback, FAR void *arg);
+#endif
+
+/* Interrupt handling *******************************************************/
+/* Lower level interrupt handlers */
+
+static void stm32_gint_wrpacket(FAR struct stm32_usbhost_s *priv,
+                                FAR uint8_t *buffer, int chidx, int buflen);
+static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv,
+                                      int chidx);
+static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv,
+                                       int chidx);
+static void stm32_gint_connected(FAR struct stm32_usbhost_s *priv);
+static void stm32_gint_disconnected(FAR struct stm32_usbhost_s *priv);
+
+/* Second level interrupt handlers */
+
+#ifdef CONFIG_STM32F7_OTG_SOFINTR
+static inline void stm32_gint_sofisr(FAR struct stm32_usbhost_s *priv);
+#endif
+static inline void stm32_gint_rxflvlisr(FAR struct stm32_usbhost_s *priv);
+static inline void stm32_gint_nptxfeisr(FAR struct stm32_usbhost_s *priv);
+static inline void stm32_gint_ptxfeisr(FAR struct stm32_usbhost_s *priv);
+static inline void stm32_gint_hcisr(FAR struct stm32_usbhost_s *priv);
+static inline void stm32_gint_hprtisr(FAR struct stm32_usbhost_s *priv);
+static inline void stm32_gint_discisr(FAR struct stm32_usbhost_s *priv);
+static inline void stm32_gint_ipxfrisr(FAR struct stm32_usbhost_s *priv);
+
+/* First level, global interrupt handler */
+
+static int stm32_gint_isr(int irq, FAR void *context, FAR void *arg);
+
+/* Interrupt controls */
+
+static void stm32_gint_enable(void);
+static void stm32_gint_disable(void);
+static inline void stm32_hostinit_enable(void);
+static void stm32_txfe_enable(FAR struct stm32_usbhost_s *priv, int chidx);
+
+/* USB host controller operations *******************************************/
+
+static int stm32_wait(FAR struct usbhost_connection_s *conn,
+                      FAR struct usbhost_hubport_s **hport);
+static int stm32_rh_enumerate(FAR struct stm32_usbhost_s *priv,
+                              FAR struct usbhost_connection_s *conn,
+                              FAR struct usbhost_hubport_s *hport);
+static int stm32_enumerate(FAR struct usbhost_connection_s *conn,
+                           FAR struct usbhost_hubport_s *hport);
+
+static int stm32_ep0configure(FAR struct usbhost_driver_s *drvr,
+                              usbhost_ep_t ep0, uint8_t funcaddr, uint8_t speed,
+                              uint16_t maxpacketsize);
+static int stm32_epalloc(FAR struct usbhost_driver_s *drvr,
+                         FAR const FAR struct usbhost_epdesc_s *epdesc,
+                         FAR usbhost_ep_t *ep);
+static int stm32_epfree(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep);
+static int stm32_alloc(FAR struct usbhost_driver_s *drvr,
+                       FAR uint8_t **buffer, FAR size_t *maxlen);
+static int stm32_free(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer);
+static int stm32_ioalloc(FAR struct usbhost_driver_s *drvr,
+                         FAR uint8_t **buffer, size_t buflen);
+static int stm32_iofree(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer);
+static int stm32_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
+                        const struct usb_ctrlreq_s *req,
+                        FAR uint8_t *buffer);
+static int stm32_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
+                         FAR const struct usb_ctrlreq_s *req,
+                         FAR const uint8_t *buffer);
+static ssize_t stm32_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep,
+                              FAR uint8_t *buffer, size_t buflen);
+#ifdef CONFIG_USBHOST_ASYNCH
+static int stm32_asynch(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep,
+                        FAR uint8_t *buffer, size_t buflen,
+                        usbhost_asynch_t callback, FAR void *arg);
+#endif
+static int stm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep);
+#ifdef CONFIG_USBHOST_HUB
+static int stm32_connect(FAR struct usbhost_driver_s *drvr,
+                         FAR struct usbhost_hubport_s *hport,
+                         bool connected);
+#endif
+static void stm32_disconnect(FAR struct usbhost_driver_s *drvr,
+                             FAR struct usbhost_hubport_s *hport);
+
+/* Initialization ***********************************************************/
+
+static void stm32_portreset(FAR struct stm32_usbhost_s *priv);
+static void stm32_flush_txfifos(uint32_t txfnum);
+static void stm32_flush_rxfifo(void);
+static void stm32_vbusdrive(FAR struct stm32_usbhost_s *priv, bool state);
+static void stm32_host_initialize(FAR struct stm32_usbhost_s *priv);
+
+static inline void stm32_sw_initialize(FAR struct stm32_usbhost_s *priv);
+static inline int stm32_hw_initialize(FAR struct stm32_usbhost_s *priv);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* In this driver implementation, support is provided for only a single a single
+ * USB device.  All status information can be simply retained in a single global
+ * instance.
+ */
+
+static struct stm32_usbhost_s g_usbhost;
+
+/* This is the connection/enumeration interface */
+
+static struct usbhost_connection_s g_usbconn =
+{
+  .wait             = stm32_wait,
+  .enumerate        = stm32_enumerate,
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_printreg
+ *
+ * Description:
+ *   Print the contents of an STM32xx register operation
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32F7_USBHOST_REGDEBUG
+static void stm32_printreg(uint32_t addr, uint32_t val, bool iswrite)
+{
+  llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_checkreg
+ *
+ * Description:
+ *   Get the contents of an STM32 register
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32F7_USBHOST_REGDEBUG
+static void stm32_checkreg(uint32_t addr, uint32_t val, bool iswrite)
+{
+  static uint32_t prevaddr = 0;
+  static uint32_t preval = 0;
+  static uint32_t count = 0;
+  static bool     prevwrite = false;
+
+  /* Is this the same value that we read from/wrote to the same register last time?
+   * Are we polling the register?  If so, suppress the output.
+   */
+
+  if (addr == prevaddr && val == preval && prevwrite == iswrite)
+    {
+      /* Yes.. Just increment the count */
+
+      count++;
+    }
+  else
+    {
+      /* No this is a new address or value or operation. Were there any
+       * duplicate accesses before this one?
+       */
+
+      if (count > 0)
+        {
+          /* Yes.. Just one? */
+
+          if (count == 1)
+            {
+              /* Yes.. Just one */
+
+              stm32_printreg(prevaddr, preval, prevwrite);
+            }
+          else
+            {
+              /* No.. More than one. */
+
+              llerr("[repeats %d more times]\n", count);
+            }
+        }
+
+      /* Save the new address, value, count, and operation for next time */
+
+      prevaddr  = addr;
+      preval    = val;
+      count     = 0;
+      prevwrite = iswrite;
+
+      /* Show the new regisgter access */
+
+      stm32_printreg(addr, val, iswrite);
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_getreg
+ *
+ * Description:
+ *   Get the contents of an STM32 register
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32F7_USBHOST_REGDEBUG
+static uint32_t stm32_getreg(uint32_t addr)
+{
+  /* Read the value from the register */
+
+  uint32_t val = getreg32(addr);
+
+  /* Check if we need to print this value */
+
+  stm32_checkreg(addr, val, false);
+  return val;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_putreg
+ *
+ * Description:
+ *   Set the contents of an STM32 register to a value
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32F7_USBHOST_REGDEBUG
+static void stm32_putreg(uint32_t addr, uint32_t val)
+{
+  /* Check if we need to print this value */
+
+  stm32_checkreg(addr, val, true);
+
+  /* Write the value */
+
+  putreg32(val, addr);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_modifyreg
+ *
+ * Description:
+ *   Modify selected bits of an STM32 register.
+ *
+ ****************************************************************************/
+
+static inline void stm32_modifyreg(uint32_t addr, uint32_t clrbits,
+                                   uint32_t setbits)
+{
+  stm32_putreg(addr, (((stm32_getreg(addr)) & ~clrbits) | setbits));
+}
+
+/****************************************************************************
+ * Name: stm32_takesem
+ *
+ * Description:
+ *   This is just a wrapper to handle the annoying behavior of semaphore
+ *   waits that return due to the receipt of a signal.
+ *
+ ****************************************************************************/
+
+static void stm32_takesem(sem_t *sem)
+{
+  /* Take the semaphore (perhaps waiting) */
+
+  while (sem_wait(sem) != 0)
+    {
+      /* The only case that an error should occr here is if the wait was
+       * awakened by a signal.
+       */
+
+      ASSERT(errno == EINTR);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_getle16
+ *
+ * Description:
+ *   Get a (possibly unaligned) 16-bit little endian value.
+ *
+ ****************************************************************************/
+
+static inline uint16_t stm32_getle16(const uint8_t *val)
+{
+  return (uint16_t)val[1] << 8 | (uint16_t)val[0];
+}
+
+/****************************************************************************
+ * Name: stm32_chan_alloc
+ *
+ * Description:
+ *   Allocate a channel.
+ *
+ ****************************************************************************/
+
+static int stm32_chan_alloc(FAR struct stm32_usbhost_s *priv)
+{
+  int chidx;
+
+  /* Search the table of channels */
+
+  for (chidx = 0; chidx < STM32_NHOST_CHANNELS; chidx++)
+    {
+      /* Is this channel available? */
+
+      if (!priv->chan[chidx].inuse)
+        {
+          /* Yes... make it "in use" and return the index */
+
+          priv->chan[chidx].inuse = true;
+          return chidx;
+        }
+    }
+
+  /* All of the channels are "in-use" */
+
+  return -EBUSY;
+}
+
+/****************************************************************************
+ * Name: stm32_chan_free
+ *
+ * Description:
+ *   Free a previoiusly allocated channel.
+ *
+ ****************************************************************************/
+
+static void stm32_chan_free(FAR struct stm32_usbhost_s *priv, int chidx)
+{
+  DEBUGASSERT((unsigned)chidx < STM32_NHOST_CHANNELS);
+
+  /* Halt the channel */
+
+  stm32_chan_halt(priv, chidx, CHREASON_FREED);
+
+  /* Mark the channel available */
+
+  priv->chan[chidx].inuse = false;
+}
+
+/****************************************************************************
+ * Name: stm32_chan_freeall
+ *
+ * Description:
+ *   Free all channels.
+ *
+ ****************************************************************************/
+
+static inline void stm32_chan_freeall(FAR struct stm32_usbhost_s *priv)
+{
+  uint8_t chidx;
+
+  /* Free all host channels */
+
+  for (chidx = 2; chidx < STM32_NHOST_CHANNELS; chidx ++)
+    {
+      stm32_chan_free(priv, chidx);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_chan_configure
+ *
+ * Description:
+ *   Configure or re-configure a host channel.  Host channels are configured
+ *   when endpoint is allocated and EP0 (only) is re-configured with the
+ *   max packet size or device address changes.
+ *
+ ****************************************************************************/
+
+static void stm32_chan_configure(FAR struct stm32_usbhost_s *priv, int chidx)
+{
+  FAR struct stm32_chan_s *chan = &priv->chan[chidx];
+  uint32_t regval;
+
+  /* Clear any old pending interrupts for this host channel. */
+
+  stm32_putreg(STM32_OTG_HCINT(chidx), 0xffffffff);
+
+  /* Enable channel interrupts required for transfers on this channel. */
+
+  regval = 0;
+
+  switch (chan->eptype)
+    {
+    case OTG_EPTYPE_CTRL:
+    case OTG_EPTYPE_BULK:
+      {
+#ifdef HAVE_USBHOST_TRACE_VERBOSE
+        uint16_t intrace;
+        uint16_t outtrace;
+
+        /* Determine the definitive trace ID to use below */
+
+        if (chan->eptype == OTG_EPTYPE_CTRL)
+          {
+            intrace  = OTG_VTRACE2_CHANCONF_CTRL_IN;
+            outtrace = OTG_VTRACE2_CHANCONF_CTRL_OUT;
+          }
+        else
+          {
+            intrace  = OTG_VTRACE2_CHANCONF_BULK_IN;
+            outtrace = OTG_VTRACE2_CHANCONF_BULK_OUT;
+          }
+#endif
+
+        /* Interrupts required for CTRL and BULK endpoints */
+
+        regval |= (OTG_HCINT_XFRC  | OTG_HCINT_STALL | OTG_HCINT_NAK |
+                   OTG_HCINT_TXERR | OTG_HCINT_DTERR);
+
+        /* Additional setting for IN/OUT endpoints */
+
+        if (chan->in)
+          {
+            usbhost_vtrace2(intrace, chidx, chan->epno);
+            regval |= OTG_HCINT_BBERR;
+          }
+        else
+          {
+            usbhost_vtrace2(outtrace, chidx, chan->epno);
+            regval |= OTG_HCINT_NYET;
+          }
+      }
+      break;
+
+    case OTG_EPTYPE_INTR:
+      {
+        /* Interrupts required for INTR endpoints */
+
+        regval |= (OTG_HCINT_XFRC | OTG_HCINT_STALL | OTG_HCINT_NAK |
+                   OTG_HCINT_TXERR | OTG_HCINT_FRMOR | OTG_HCINT_DTERR);
+
+        /* Additional setting for IN endpoints */
+
+        if (chan->in)
+          {
+            usbhost_vtrace2(OTG_VTRACE2_CHANCONF_INTR_IN, chidx,
+                            chan->epno);
+            regval |= OTG_HCINT_BBERR;
+          }
+#ifdef HAVE_USBHOST_TRACE_VERBOSE
+        else
+          {
+            usbhost_vtrace2(OTG_VTRACE2_CHANCONF_INTR_OUT, chidx,
+                            chan->epno);
+          }
+#endif
+      }
+      break;
+
+    case OTG_EPTYPE_ISOC:
+      {
+        /* Interrupts required for ISOC endpoints */
+
+        regval |= (OTG_HCINT_XFRC | OTG_HCINT_ACK | OTG_HCINT_FRMOR);
+
+        /* Additional setting for IN endpoints */
+
+        if (chan->in)
+          {
+            usbhost_vtrace2(OTG_VTRACE2_CHANCONF_ISOC_IN, chidx,
+                            chan->epno);
+            regval |= (OTG_HCINT_TXERR | OTG_HCINT_BBERR);
+          }
+#ifdef HAVE_USBHOST_TRACE_VERBOSE
+        else
+          {
+            usbhost_vtrace2(OTG_VTRACE2_CHANCONF_ISOC_OUT, chidx,
+                            chan->epno);
+          }
+#endif
+      }
+      break;
+    }
+
+  stm32_putreg(STM32_OTG_HCINTMSK(chidx), regval);
+
+  /* Enable the top level host channel interrupt. */
+
+  stm32_modifyreg(STM32_OTG_HAINTMSK, 0, OTG_HAINT(chidx));
+
+  /* Make sure host channel interrupts are enabled. */
+
+  stm32_modifyreg(STM32_OTG_GINTMSK, 0, OTG_GINT_HC);
+
+  /* Program the HCCHAR register */
+
+  regval = ((uint32_t)chan->maxpacket << OTG_HCCHAR_MPSIZ_SHIFT) |
+           ((uint32_t)chan->epno      << OTG_HCCHAR_EPNUM_SHIFT) |
+           ((uint32_t)chan->eptype    << OTG_HCCHAR_EPTYP_SHIFT) |
+           ((uint32_t)chan->funcaddr  << OTG_HCCHAR_DAD_SHIFT);
+
+  /* Special case settings for low speed devices */
+
+  if (chan->speed == USB_SPEED_LOW)
+    {
+      regval |= OTG_HCCHAR_LSDEV;
+    }
+
+  /* Special case settings for IN endpoints */
+
+  if (chan->in)
+    {
+      regval |= OTG_HCCHAR_EPDIR_IN;
+    }
+
+  /* Special case settings for INTR endpoints */
+
+  if (chan->eptype == OTG_EPTYPE_INTR)
+    {
+      regval |= OTG_HCCHAR_ODDFRM;
+    }
+
+  /* Write the channel configuration */
+
+  stm32_putreg(STM32_OTG_HCCHAR(chidx), regval);
+}
+
+/****************************************************************************
+ * Name: stm32_chan_halt
+ *
+ * Description:
+ *   Halt the channel associated with 'chidx' by setting the CHannel DISable
+ *   (CHDIS) bit in in the HCCHAR register.
+ *
+ ****************************************************************************/
+
+static void stm32_chan_halt(FAR struct stm32_usbhost_s *priv, int chidx,
+                            enum stm32_chreason_e chreason)
+{
+  uint32_t hcchar;
+  uint32_t intmsk;
+  uint32_t eptype;
+  unsigned int avail;
+
+  /* Save the reason for the halt.  We need this in the channel halt interrupt
+   * handling logic to know what to do next.
+   */
+
+  usbhost_vtrace2(OTG_VTRACE2_CHANHALT, chidx, chreason);
+
+  priv->chan[chidx].chreason = (uint8_t)chreason;
+
+  /* "The application can disable any channel by programming the OTG_FS_HCCHARx
+   *  register with the CHDIS and CHENA bits set to 1. This enables the OTG_FS
+   *  host to flush the posted requests (if any) and generates a channel halted
+   *  interrupt. The application must wait for the CHH interrupt in OTG_FS_HCINTx
+   *  before reallocating the channel for other transactions.  The OTG_FS host
+   *  does not interrupt the transaction that has already been started on the
+   *  USB."
+   */
+
+  hcchar  = stm32_getreg(STM32_OTG_HCCHAR(chidx));
+  hcchar |= (OTG_HCCHAR_CHDIS | OTG_HCCHAR_CHENA);
+
+  /* Get the endpoint type from the HCCHAR register */
+
+  eptype = hcchar & OTG_HCCHAR_EPTYP_MASK;
+
+  /* Check for space in the Tx FIFO to issue the halt.
+   *
+   * "Before disabling a channel, the application must ensure that there is at
+   *  least one free space available in the non-periodic request queue (when
+   *  disabling a non-periodic channel) or the periodic request queue (when
+   *  disabling a periodic channel). The application can simply flush the
+   *  posted requests when the Request queue is full (before disabling the
+   *  channel), by programming the OTG_FS_HCCHARx register with the CHDIS bit
+   *  set to 1, and the CHENA bit cleared to 0.
+   */
+
+  if (eptype == OTG_HCCHAR_EPTYP_CTRL || eptype == OTG_HCCHAR_EPTYP_BULK)
+    {
+      /* Get the number of words available in the non-periodic Tx FIFO. */
+
+      avail = stm32_getreg(STM32_OTG_HNPTXSTS) & OTG_HNPTXSTS_NPTXFSAV_MASK;
+    }
+  else /* if (eptype == OTG_HCCHAR_EPTYP_ISOC || eptype == OTG_HCCHAR_EPTYP_INTR) */
+    {
+      /* Get the number of words available in the non-periodic Tx FIFO. */
+
+      avail = stm32_getreg(STM32_OTG_HPTXSTS) & OTG_HPTXSTS_PTXFSAVL_MASK;
+    }
+
+  /* Check if there is any space available in the Tx FIFO. */
+
+  if (avail == 0)
+    {
+      /* The Tx FIFO is full... disable the channel to flush the requests */
+
+      hcchar &= ~OTG_HCCHAR_CHENA;
+    }
+
+  /* Unmask the CHannel Halted (CHH) interrupt */
+
+  intmsk  = stm32_getreg(STM32_OTG_HCINTMSK(chidx));
+  intmsk |= OTG_HCINT_CHH;
+  stm32_putreg(STM32_OTG_HCINTMSK(chidx), intmsk);
+
+  /* Halt the channel by setting CHDIS (and maybe CHENA) in the HCCHAR */
+
+  stm32_putreg(STM32_OTG_HCCHAR(chidx), hcchar);
+}
+
+/****************************************************************************
+ * Name: stm32_chan_waitsetup
+ *
+ * Description:
+ *   Set the request for the transfer complete event well BEFORE enabling
+ *   the transfer (as soon as we are absolutely committed to the transfer).
+ *   We do this to minimize race conditions.  This logic would have to be
+ *   expanded if we want to have more than one packet in flight at a time!
+ *
+ * Assumptions:
+ *   Called from a normal thread context BEFORE the transfer has been started.
+ *
+ ****************************************************************************/
+
+static int stm32_chan_waitsetup(FAR struct stm32_usbhost_s *priv,
+                                FAR struct stm32_chan_s *chan)
+{
+  irqstate_t flags = enter_critical_section();
+  int        ret   = -ENODEV;
+
+  /* Is the device still connected? */
+
+  if (priv->connected)
+    {
+      /* Yes.. then set waiter to indicate that we expect to be informed when
+       * either (1) the device is disconnected, or (2) the transfer completed.
+       */
+
+      chan->waiter   = true;
+#ifdef CONFIG_USBHOST_ASYNCH
+      chan->callback = NULL;
+      chan->arg      = NULL;
+#endif
+      ret            = OK;
+    }
+
+  leave_critical_section(flags);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32_chan_asynchsetup
+ *
+ * Description:
+ *   Set the request for the transfer complete event well BEFORE enabling the
+ *   transfer (as soon as we are absolutely committed to the to avoid transfer).
+ *   We do this to minimize race conditions.  This logic would have to be expanded
+ *   if we want to have more than one packet in flight at a time!
+ *
+ * Assumptions:
+ *   Might be called from the level of an interrupt handler
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBHOST_ASYNCH
+static int stm32_chan_asynchsetup(FAR struct stm32_usbhost_s *priv,
+                                  FAR struct stm32_chan_s *chan,
+                                  usbhost_asynch_t callback, FAR void *arg)
+{
+  irqstate_t flags = enter_critical_section();
+  int        ret   = -ENODEV;
+
+  /* Is the device still connected? */
+
+  if (priv->connected)
+    {
+      /* Yes.. then set waiter to indicate that we expect to be informed when
+       * either (1) the device is disconnected, or (2) the transfer completed.
+       */
+
+      chan->waiter   = false;
+      chan->callback = callback;
+      chan->arg      = arg;
+      ret            = OK;
+    }
+
+  leave_critical_section(flags);
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_chan_wait
+ *
+ * Description:
+ *   Wait for a transfer on a channel to complete.
+ *
+ * Assumptions:
+ *   Called from a normal thread context
+ *
+ ****************************************************************************/
+
+static int stm32_chan_wait(FAR struct stm32_usbhost_s *priv,
+                           FAR struct stm32_chan_s *chan)
+{
+  irqstate_t flags;
+  int ret;
+
+  /* Disable interrupts so that the following operations will be atomic.  On
+   * the OTG FS global interrupt needs to be disabled.  However, here we
+   * disable all interrupts to exploit that fact that interrupts will be re-
+   * enabled while we wait.
+   */
+
+  flags = enter_critical_section();
+
+  /* Loop, testing for an end of transfer condition.  The channel 'result'
+   * was set to EBUSY and 'waiter' was set to true before the transfer; 'waiter'
+   * will be set to false and 'result' will be set appropriately when the
+   * transfer is completed.
+   */
+
+  do
+    {
+      /* Wait for the transfer to complete.  NOTE the transfer may already
+       * completed before we get here or the transfer may complete while we
+       * wait here.
+       */
+
+      ret = sem_wait(&chan->waitsem);
+
+      /* sem_wait should succeed.  But it is possible that we could be
+       * awakened by a signal too.
+       */
+
+      DEBUGASSERT(ret == OK || get_errno() == EINTR);
+    }
+  while (chan->waiter);
+
+  /* The transfer is complete re-enable interrupts and return the result */
+
+  ret = -(int)chan->result;
+  leave_critical_section(flags);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32_chan_wakeup
+ *
+ * Description:
+ *   A channel transfer has completed... wakeup any threads waiting for the
+ *   transfer to complete.
+ *
+ * Assumptions:
+ *   This function is called from the transfer complete interrupt handler for
+ *   the channel.  Interrupts are disabled.
+ *
+ ****************************************************************************/
+
+static void stm32_chan_wakeup(FAR struct stm32_usbhost_s *priv,
+                              FAR struct stm32_chan_s *chan)
+{
+  /* Is the transfer complete? */
+
+  if (chan->result != EBUSY)
+    {
+      /* Is there a thread waiting for this transfer to complete? */
+
+      if (chan->waiter)
+        {
+#ifdef CONFIG_USBHOST_ASYNCH
+          /* Yes.. there should not also be a callback scheduled */
+
+          DEBUGASSERT(chan->callback == NULL);
+#endif
+          /* Wake'em up! */
+
+          usbhost_vtrace2(chan->in ? OTG_VTRACE2_CHANWAKEUP_IN :
+                                     OTG_VTRACE2_CHANWAKEUP_OUT,
+                          chan->epno, chan->result);
+
+          stm32_givesem(&chan->waitsem);
+          chan->waiter = false;
+        }
+
+#ifdef CONFIG_USBHOST_ASYNCH
+      /* No.. is an asynchronous callback expected when the transfer
+       * completes?
+       */
+
+      else if (chan->callback)
+        {
+          /* Handle continuation of IN/OUT pipes */
+
+          if (chan->in)
+            {
+              stm32_in_next(priv, chan);
+            }
+          else
+            {
+              stm32_out_next(priv, chan);
+            }
+        }
+#endif
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_ctrlchan_alloc
+ *
+ * Description:
+ *   Allocate and configured channels for a control pipe.
+ *
+ ****************************************************************************/
+
+static int stm32_ctrlchan_alloc(FAR struct stm32_usbhost_s *priv,
+                                uint8_t epno, uint8_t funcaddr, uint8_t speed,
+                                FAR struct stm32_ctrlinfo_s *ctrlep)
+{
+  FAR struct stm32_chan_s *chan;
+  int inndx;
+  int outndx;
+
+  outndx = stm32_chan_alloc(priv);
+  if (outndx < 0)
+    {
+      return -ENOMEM;
+    }
+
+  ctrlep->outndx  = outndx;
+  chan            = &priv->chan[outndx];
+  chan->epno      = epno;
+  chan->in        = false;
+  chan->eptype    = OTG_EPTYPE_CTRL;
+  chan->funcaddr  = funcaddr;
+  chan->speed     = speed;
+  chan->maxpacket = STM32_EP0_DEF_PACKET_SIZE;
+  chan->indata1   = false;
+  chan->outdata1  = false;
+
+  /* Configure control OUT channels */
+
+  stm32_chan_configure(priv, outndx);
+
+  /* Allocate and initialize the control IN channel */
+
+  inndx = stm32_chan_alloc(priv);
+  if (inndx < 0)
+    {
+      stm32_chan_free(priv, outndx);
+      return -ENOMEM;
+    }
+
+  ctrlep->inndx   = inndx;
+  chan            = &priv->chan[inndx];
+  chan->epno      = epno;
+  chan->in        = true;
+  chan->eptype    = OTG_EPTYPE_CTRL;
+  chan->funcaddr  = funcaddr;
+  chan->speed     = speed;
+  chan->maxpacket = STM32_EP0_DEF_PACKET_SIZE;
+  chan->indata1   = false;
+  chan->outdata1  = false;
+
+  /* Configure control IN channels */
+
+  stm32_chan_configure(priv, inndx);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_ctrlep_alloc
+ *
+ * Description:
+ *   Allocate a container and channels for control pipe.
+ *
+ * Input Parameters:
+ *   priv - The private USB host driver state.
+ *   epdesc - Describes the endpoint to be allocated.
+ *   ep - A memory location provided by the caller in which to receive the
+ *      allocated endpoint descriptor.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value
+ *   is returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   This function will *not* be called from an interrupt handler.
+ *
+ ****************************************************************************/
+
+static int stm32_ctrlep_alloc(FAR struct stm32_usbhost_s *priv,
+                              FAR const struct usbhost_epdesc_s *epdesc,
+                              FAR usbhost_ep_t *ep)
+{
+  FAR struct usbhost_hubport_s *hport;
+  FAR struct stm32_ctrlinfo_s *ctrlep;
+  int ret;
+
+  /* Sanity check.  NOTE that this method should only be called if a device is
+   * connected (because we need a valid low speed indication).
+   */
+
+  DEBUGASSERT(epdesc->hport != NULL);
+  hport = epdesc->hport;
+
+  /* Allocate a container for the control endpoint */
+
+  ctrlep = (FAR struct stm32_ctrlinfo_s *)kmm_malloc(sizeof(struct stm32_ctrlinfo_s));
+  if (ctrlep == NULL)
+    {
+      uerr("ERROR: Failed to allocate control endpoint container\n");
+      return -ENOMEM;
+    }
+
+  /* Then allocate and configure the IN/OUT channnels  */
+
+  ret = stm32_ctrlchan_alloc(priv, epdesc->addr & USB_EPNO_MASK,
+                             hport->funcaddr, hport->speed, ctrlep);
+  if (ret < 0)
+    {
+      uerr("ERROR: stm32_ctrlchan_alloc failed: %d\n", ret);
+      kmm_free(ctrlep);
+      return ret;
+    }
+
+  /* Return a pointer to the control pipe container as the pipe "handle" */
+
+  *ep = (usbhost_ep_t)ctrlep;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_xfrep_alloc
+ *
+ * Description:
+ *   Allocate and configure one unidirectional endpoint.
+ *
+ * Input Parameters:
+ *   priv - The private USB host driver state.
+ *   epdesc - Describes the endpoint to be allocated.
+ *   ep - A memory location provided by the caller in which to receive the
+ *      allocated endpoint descriptor.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value
+ *   is returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   This function will *not* be called from an interrupt handler.
+ *
+ ****************************************************************************/
+
+static int stm32_xfrep_alloc(FAR struct stm32_usbhost_s *priv,
+                              FAR const struct usbhost_epdesc_s *epdesc,
+                              FAR usbhost_ep_t *ep)
+{
+  struct usbhost_hubport_s *hport;
+  FAR struct stm32_chan_s *chan;
+  int chidx;
+
+  /* Sanity check.  NOTE that this method should only be called if a device is
+   * connected (because we need a valid low speed indication).
+   */
+
+  DEBUGASSERT(epdesc->hport != NULL);
+  hport = epdesc->hport;
+
+  /* Allocate a host channel for the endpoint */
+
+  chidx = stm32_chan_alloc(priv);
+  if (chidx < 0)
+    {
+      uerr("ERROR: Failed to allocate a host channel\n");
+      return -ENOMEM;
+    }
+
+  /* Decode the endpoint descriptor to initialize the channel data structures.
+   * Note:  Here we depend on the fact that the endpoint point type is
+   * encoded in the same way in the endpoint descriptor as it is in the OTG
+   * HS hardware.
+   */
+
+  chan            = &priv->chan[chidx];
+  chan->epno      = epdesc->addr & USB_EPNO_MASK;
+  chan->in        = epdesc->in;
+  chan->eptype    = epdesc->xfrtype;
+  chan->funcaddr  = hport->funcaddr;
+  chan->speed     = hport->speed;
+  chan->maxpacket = epdesc->mxpacketsize;
+  chan->indata1   = false;
+  chan->outdata1  = false;
+
+  /* Then configure the endpoint */
+
+  stm32_chan_configure(priv, chidx);
+
+  /* Return the index to the allocated channel as the endpoint "handle" */
+
+  *ep = (usbhost_ep_t)chidx;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_transfer_start
+ *
+ * Description:
+ *   Start at transfer on the select IN or OUT channel.
+ *
+ ****************************************************************************/
+
+static void stm32_transfer_start(FAR struct stm32_usbhost_s *priv, int chidx)
+{
+  FAR struct stm32_chan_s *chan;
+  uint32_t regval;
+  unsigned int npackets;
+  unsigned int maxpacket;
+  unsigned int avail;
+  unsigned int wrsize;
+  unsigned int minsize;
+
+  /* Set up the initial state of the transfer */
+
+  chan           = &priv->chan[chidx];
+
+  usbhost_vtrace2(OTG_VTRACE2_STARTTRANSFER, chidx, chan->buflen);
+
+  chan->result   = EBUSY;
+  chan->inflight = 0;
+  chan->xfrd     = 0;
+  priv->chidx    = chidx;
+
+  /* Compute the expected number of packets associated to the transfer.
+   * If the transfer length is zero (or less than the size of one maximum
+   * size packet), then one packet is expected.
+   */
+
+  /* If the transfer size is greater than one packet, then calculate the
+   * number of packets that will be received/sent, including any partial
+   * final packet.
+   */
+
+  maxpacket = chan->maxpacket;
+
+  if (chan->buflen > maxpacket)
+    {
+      npackets = (chan->buflen + maxpacket - 1) / maxpacket;
+
+      /* Clip if the buffer length if it exceeds the maximum number of
+       * packets that can be transferred (this should not happen).
+       */
+
+      if (npackets > STM32_MAX_PKTCOUNT)
+        {
+          npackets = STM32_MAX_PKTCOUNT;
+          chan->buflen = STM32_MAX_PKTCOUNT * maxpacket;
+          usbhost_trace2(OTG_TRACE2_CLIP, chidx, chan->buflen);
+        }
+    }
+  else
+    {
+      /* One packet will be sent/received (might be a zero length packet) */
+
+      npackets = 1;
+    }
+
+  /* If it is an IN transfer, then adjust the size of the buffer UP to
+   * a full number of packets.  Hmmm... couldn't this cause an overrun
+   * into unallocated memory?
+   */
+
+#if 0 /* Think about this */
+  if (chan->in)
+    {
+      /* Force the buffer length to an even multiple of maxpacket */
+
+      chan->buflen = npackets * maxpacket;
+    }
+#endif
+
+  /* Save the number of packets in the transfer.  We will need this in
+   * order to set the next data toggle correctly when the transfer
+   * completes.
+   */
+
+  chan->npackets = (uint8_t)npackets;
+
+  /* Setup the HCTSIZn register */
+
+  regval = ((uint32_t)chan->buflen << OTG_HCTSIZ_XFRSIZ_SHIFT) |
+           ((uint32_t)npackets << OTG_HCTSIZ_PKTCNT_SHIFT) |
+           ((uint32_t)chan->pid << OTG_HCTSIZ_DPID_SHIFT);
+  stm32_putreg(STM32_OTG_HCTSIZ(chidx), regval);
+
+  /* Setup the HCCHAR register: Frame oddness and host channel enable */
+
+  regval = stm32_getreg(STM32_OTG_HCCHAR(chidx));
+
+  /* Set/clear the Odd Frame bit.  Check for an even frame; if so set Odd
+   * Frame. This field is applicable for only periodic (isochronous and
+   * interrupt) channels.
+   */
+
+  if ((stm32_getreg(STM32_OTG_HFNUM) & 1) == 0)
+    {
+      regval |= OTG_HCCHAR_ODDFRM;
+    }
+  else
+    {
+      regval &= ~OTG_HCCHAR_ODDFRM;
+    }
+
+  regval &= ~OTG_HCCHAR_CHDIS;
+  regval |= OTG_HCCHAR_CHENA;
+  stm32_putreg(STM32_OTG_HCCHAR(chidx), regval);
+
+  /* If this is an out transfer, then we need to do more.. we need to copy
+   * the outgoing data into the correct TxFIFO.
+   */
+
+  if (!chan->in && chan->buflen > 0)
+    {
+      /* Handle non-periodic (CTRL and BULK) OUT transfers differently than
+       * periodic (INTR and ISOC) OUT transfers.
+       */
+
+      minsize = MIN(chan->buflen, chan->maxpacket);
+
+      switch (chan->eptype)
+        {
+        case OTG_EPTYPE_CTRL: /* Non periodic transfer */
+        case OTG_EPTYPE_BULK:
+          {
+            /* Read the Non-periodic Tx FIFO status register */
+
+            regval = stm32_getreg(STM32_OTG_HNPTXSTS);
+            avail  = ((regval & OTG_HNPTXSTS_NPTXFSAV_MASK) >> OTG_HNPTXSTS_NPTXFSAV_SHIFT) << 2;
+          }
+          break;
+
+        /* Periodic transfer */
+
+        case OTG_EPTYPE_INTR:
+        case OTG_EPTYPE_ISOC:
+          {
+            /* Read the Non-periodic Tx FIFO status register */
+
+            regval = stm32_getreg(STM32_OTG_HPTXSTS);
+            avail  = ((regval & OTG_HPTXSTS_PTXFSAVL_MASK) >> OTG_HPTXSTS_PTXFSAVL_SHIFT) << 2;
+          }
+          break;
+
+        default:
+          DEBUGASSERT(false);
+          return;
+        }
+
+      /* Is there space in the TxFIFO to hold the minimum size packet? */
+
+      if (minsize <= avail)
+        {
+          /* Yes.. Get the size of the biggest thing that we can put in the Tx FIFO now */
+
+          wrsize = chan->buflen;
+          if (wrsize > avail)
+            {
+              /* Clip the write size to the number of full, max sized packets
+               * that will fit in the Tx FIFO.
+               */
+
+              unsigned int wrpackets = avail / chan->maxpacket;
+              wrsize = wrpackets * chan->maxpacket;
+            }
+
+          /* Write packet into the Tx FIFO. */
+
+          stm32_gint_wrpacket(priv, chan->buffer, chidx, wrsize);
+        }
+
+      /* Did we put the entire buffer into the Tx FIFO? */
+
+      if (chan->buflen > avail)
+        {
+          /* No, there was insufficient space to hold the entire transfer ...
+           * Enable the Tx FIFO interrupt to handle the transfer when the Tx
+           * FIFO becomes empty.
+           */
+
+           stm32_txfe_enable(priv, chidx);
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_getframe
+ *
+ * Description:
+ *   Get the current frame number.  The frame number (FRNUM) field increments
+ *   when a new SOF is transmitted on the USB, and is cleared to 0 when it
+ *   reaches 0x3fff.
+ *
+ ****************************************************************************/
+
+#if 0 /* Not used */
+static inline uint16_t stm32_getframe(void)
+{
+  return (uint16_t)(stm32_getreg(STM32_OTG_HFNUM) & OTG_HFNUM_FRNUM_MASK);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_ctrl_sendsetup
+ *
+ * Description:
+ *   Send an IN/OUT SETUP packet.
+ *
+ ****************************************************************************/
+
+static int stm32_ctrl_sendsetup(FAR struct stm32_usbhost_s *priv,
+                                FAR struct stm32_ctrlinfo_s *ep0,
+                                FAR const struct usb_ctrlreq_s *req)
+{
+  FAR struct stm32_chan_s *chan;
+  systime_t start;
+  systime_t elapsed;
+  int ret;
+
+  /* Loop while the device reports NAK (and a timeout is not exceeded */
+
+  chan  = &priv->chan[ep0->outndx];
+  start = clock_systimer();
+
+  do
+    {
+      /* Send the  SETUP packet */
+
+      chan->pid    = OTG_PID_SETUP;
+      chan->buffer = (FAR uint8_t *)req;
+      chan->buflen = USB_SIZEOF_CTRLREQ;
+      chan->xfrd   = 0;
+
+      /* Set up for the wait BEFORE starting the transfer */
+
+      ret = stm32_chan_waitsetup(priv, chan);
+      if (ret < 0)
+        {
+          usbhost_trace1(OTG_TRACE1_DEVDISCONN, 0);
+          return ret;
+        }
+
+      /* Start the transfer */
+
+      stm32_transfer_start(priv, ep0->outndx);
+
+      /* Wait for the transfer to complete */
+
+      ret = stm32_chan_wait(priv, chan);
+
+      /* Return on success and for all failures other than EAGAIN.  EAGAIN
+       * means that the device NAKed the SETUP command and that we should
+       * try a few more times.
+       */
+
+      if (ret != -EAGAIN)
+        {
+          /* Output some debug information if the transfer failed */
+
+          if (ret < 0)
+            {
+              usbhost_trace1(OTG_TRACE1_TRNSFRFAILED, ret);
+            }
+
+          /* Return the result in any event */
+
+          return ret;
+        }
+
+      /* Get the elapsed time (in frames) */
+
+      elapsed = clock_systimer() - start;
+    }
+  while (elapsed < STM32_SETUP_DELAY);
+
+  return -ETIMEDOUT;
+}
+
+/****************************************************************************
+ * Name: stm32_ctrl_senddata
+ *
+ * Description:
+ *   Send data in the data phase of an OUT control transfer.  Or send status
+ *   in the status phase of an IN control transfer
+ *
+ ****************************************************************************/
+
+static int stm32_ctrl_senddata(FAR struct stm32_usbhost_s *priv,
+                               FAR struct stm32_ctrlinfo_s *ep0,
+                               FAR uint8_t *buffer, unsigned int buflen)
+{
+  FAR struct stm32_chan_s *chan = &priv->chan[ep0->outndx];
+  int ret;
+
+  /* Save buffer information */
+
+  chan->buffer = buffer;
+  chan->buflen = buflen;
+  chan->xfrd   = 0;
+
+  /* Set the DATA PID */
+
+  if (buflen == 0)
+    {
+      /* For status OUT stage with buflen == 0, set PID DATA1 */
+
+      chan->outdata1 = true;
+    }
+
+  /* Set the Data PID as per the outdata1 boolean */
+
+  chan->pid = chan->outdata1 ? OTG_PID_DATA1 : OTG_PID_DATA0;
+
+  /* Set up for the wait BEFORE starting the transfer */
+
+  ret = stm32_chan_waitsetup(priv, chan);
+  if (ret < 0)
+    {
+      usbhost_trace1(OTG_TRACE1_DEVDISCONN, 0);
+      return ret;
+    }
+
+  /* Start the transfer */
+
+  stm32_transfer_start(priv, ep0->outndx);
+
+  /* Wait for the transfer to complete and return the result */
+
+  return stm32_chan_wait(priv, chan);
+}
+
+/****************************************************************************
+ * Name: stm32_ctrl_recvdata
+ *
+ * Description:
+ *   Receive data in the data phase of an IN control transfer.  Or receive status
+ *   in the status phase of an OUT control transfer
+ *
+ ****************************************************************************/
+
+static int stm32_ctrl_recvdata(FAR struct stm32_usbhost_s *priv,
+                               FAR struct stm32_ctrlinfo_s *ep0,
+                               FAR uint8_t *buffer, unsigned int buflen)
+{
+  FAR struct stm32_chan_s *chan = &priv->chan[ep0->inndx];
+  int ret;
+
+  /* Save buffer information */
+
+  chan->pid    = OTG_PID_DATA1;
+  chan->buffer = buffer;
+  chan->buflen = buflen;
+  chan->xfrd   = 0;
+
+  /* Set up for the wait BEFORE starting the transfer */
+
+  ret = stm32_chan_waitsetup(priv, chan);
+  if (ret < 0)
+    {
+      usbhost_trace1(OTG_TRACE1_DEVDISCONN, 0);
+      return ret;
+    }
+
+  /* Start the transfer */
+
+  stm32_transfer_start(priv, ep0->inndx);
+
+  /* Wait for the transfer to complete and return the result */
+
+  return stm32_chan_wait(priv, chan);
+}
+
+/****************************************************************************
+ * Name: stm32_in_setup
+ *
+ * Description:
+ *   Initiate an IN transfer on an bulk, interrupt, or isochronous pipe.
+ *
+ ****************************************************************************/
+
+static int stm32_in_setup(FAR struct stm32_usbhost_s *priv, int chidx)
+{
+  FAR struct stm32_chan_s *chan;
+
+  /* Set up for the transfer based on the direction and the endpoint type */
+
+  chan = &priv->chan[chidx];
+  switch (chan->eptype)
+    {
+    default:
+    case OTG_EPTYPE_CTRL: /* Control */
+      {
+        /* This kind of transfer on control endpoints other than EP0 are not
+         * currently supported
+         */
+
+        return -ENOSYS;
+      }
+
+    case OTG_EPTYPE_ISOC: /* Isochronous */
+      {
+        /* Set up the IN data PID */
+
+        usbhost_vtrace2(OTG_VTRACE2_ISOCIN, chidx, chan->buflen);
+        chan->pid = OTG_PID_DATA0;
+      }
+      break;
+
+    case OTG_EPTYPE_BULK: /* Bulk */
+      {
+        /* Setup the IN data PID */
+
+        usbhost_vtrace2(OTG_VTRACE2_BULKIN, chidx, chan->buflen);
+        chan->pid = chan->indata1 ? OTG_PID_DATA1 : OTG_PID_DATA0;
+      }
+      break;
+
+    case OTG_EPTYPE_INTR: /* Interrupt */
+      {
+        /* Setup the IN data PID */
+
+        usbhost_vtrace2(OTG_VTRACE2_INTRIN, chidx, chan->buflen);
+        chan->pid = chan->indata1 ? OTG_PID_DATA1 : OTG_PID_DATA0;
+      }
+      break;
+    }
+
+  /* Start the transfer */
+
+  stm32_transfer_start(priv, chidx);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_in_transfer
+ *
+ * Description:
+ *   Transfer 'buflen' bytes into 'buffer' from an IN channel.
+ *
+ ****************************************************************************/
+
+static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
+                                 FAR uint8_t *buffer, size_t buflen)
+{
+  FAR struct stm32_chan_s *chan;
+  ssize_t xfrd;
+  int ret;
+
+  /* Loop until the transfer completes (i.e., buflen is decremented to zero)
+   * or a fatal error occurs any error other than a simple NAK.  NAK would
+   * simply indicate the end of the transfer (short-transfer).
+   */
+
+  chan         = &priv->chan[chidx];
+  chan->buffer = buffer;
+  chan->buflen = buflen;
+  chan->xfrd   = 0;
+  xfrd         = 0;
+
+  while (chan->xfrd < chan->buflen)
+    {
+      /* Set up for the wait BEFORE starting the transfer */
+
+      ret = stm32_chan_waitsetup(priv, chan);
+      if (ret < 0)
+        {
+          usbhost_trace1(OTG_TRACE1_DEVDISCONN, 0);
+          return (ssize_t)ret;
+        }
+
+      /* Set up for the transfer based on the direction and the endpoint type */
+
+      ret = stm32_in_setup(priv, chidx);
+      if (ret < 0)
+        {
+          uerr("ERROR: stm32_in_setup failed: %d\n", ret);
+          return (ssize_t)ret;
+        }
+
+      /* Wait for the transfer to complete and get the result */
+
+      ret = stm32_chan_wait(priv, chan);
+
+      /* EAGAIN indicates that the device NAKed the transfer.  In the case
+       * of a NAK, we do not retry but rather assume that the transfer is
+       * commplete and return the data that we have received.  Retry could
+       * be handled in class driver.
+       */
+
+      if (ret < 0)
+        {
+          /* The transfer failed.  If we received a NAK, return all data
+           * buffered so far (if any).
+           */
+
+          if (ret == -EAGAIN)
+            {
+              /* Was data buffered prior to the NAK? */
+
+              if (xfrd > 0)
+                {
+                  /* Yes, return the amount of data received */
+
+                  return xfrd;
+                }
+              else
+                {
+                  /* No... Break out and return the NAK */
+
+                  return (ssize_t)ret;
+                }
+            }
+
+          usbhost_trace1(OTG_TRACE1_TRNSFRFAILED, ret);
+
+          /* Break out and return the error */
+
+          uerr("ERROR: stm32_chan_wait failed: %d\n", ret);
+          return (ssize_t)ret;
+        }
+
+      xfrd += chan->xfrd;
+    }
+
+  return xfrd;
+}
+
+/****************************************************************************
+ * Name: stm32_in_next
+ *
+ * Description:
+ *   Initiate the next of a sequence of asynchronous transfers.
+ *
+ * Assumptions:
+ *   This function is always called from an interrupt handler
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBHOST_ASYNCH
+static void stm32_in_next(FAR struct stm32_usbhost_s *priv,
+                          FAR struct stm32_chan_s *chan)
+{
+  usbhost_asynch_t callback;
+  FAR void *arg;
+  ssize_t nbytes;
+  int result;
+  int ret;
+
+  /* Is the full transfer complete? Did the last chunk transfer complete OK? */
+
+  result = -(int)chan->result;
+  if (chan->xfrd < chan->buflen && result == OK)
+    {
+      /* Yes.. Set up for the next transfer based on the direction and the
+       * endpoint type
+       */
+
+      ret = stm32_in_setup(priv, chan->chidx);
+      if (ret >= 0)
+        {
+          return;
+        }
+
+      uerr("ERROR: stm32_in_setup failed: %d\n", ret);
+      result = ret;
+    }
+
+  /* The transfer is complete, with or without an error */
+
+  uinfo("Transfer complete:  %d\n", result);
+
+  /* Extract the callback information */
+
+  callback       = chan->callback;
+  arg            = chan->arg;
+  nbytes         = chan->xfrd;
+
+  chan->callback = NULL;
+  chan->arg      = NULL;
+  chan->xfrd     = 0;
+
+  /* Then perform the callback */
+
+  if (result < 0)
+    {
+      nbytes = (ssize_t)result;
+    }
+
+  callback(arg, nbytes);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_in_asynch
+ *
+ * Description:
+ *   Initiate the first of a sequence of asynchronous transfers.
+ *
+ * Assumptions:
+ *   This function is never called from an interrupt handler
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBHOST_ASYNCH
+static int stm32_in_asynch(FAR struct stm32_usbhost_s *priv, int chidx,
+                           FAR uint8_t *buffer, size_t buflen,
+                           usbhost_asynch_t callback, FAR void *arg)
+{
+  FAR struct stm32_chan_s *chan;
+  int ret;
+
+  /* Set up for the transfer data and callback BEFORE starting the first transfer */
+
+  chan         = &priv->chan[chidx];
+  chan->buffer = buffer;
+  chan->buflen = buflen;
+  chan->xfrd   = 0;
+
+  ret = stm32_chan_asynchsetup(priv, chan, callback, arg);
+  if (ret < 0)
+    {
+      uerr("ERROR: stm32_chan_asynchsetup failed: %d\n", ret);
+      return ret;
+    }
+
+  /* Set up for the transfer based on the direction and the endpoint type */
+
+  ret = stm32_in_setup(priv, chidx);
+  if (ret < 0)
+    {
+      uerr("ERROR: stm32_in_setup failed: %d\n", ret);
+    }
+
+  /* And return with the transfer pending */
+
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_out_setup
+ *
+ * Description:
+ *   Initiate an OUT transfer on an bulk, interrupt, or isochronous pipe.
+ *
+ ****************************************************************************/
+
+static int stm32_out_setup(FAR struct stm32_usbhost_s *priv, int chidx)
+{
+  FAR struct stm32_chan_s *chan;
+
+  /* Set up for the transfer based on the direction and the endpoint type */
+
+  chan = &priv->chan[chidx];
+  switch (chan->eptype)
+    {
+    default:
+    case OTG_EPTYPE_CTRL: /* Control */
+      {
+        /* This kind of transfer on control endpoints other than EP0 are not
+         * currently supported
+         */
+
+        return -ENOSYS;
+      }
+
+    case OTG_EPTYPE_ISOC: /* Isochronous */
+      {
+        /* Set up the OUT data PID */
+
+        usbhost_vtrace2(OTG_VTRACE2_ISOCOUT, chidx, chan->buflen);
+        chan->pid = OTG_PID_DATA0;
+      }
+      break;
+
+    case OTG_EPTYPE_BULK: /* Bulk */
+      {
+        /* Setup the OUT data PID */
+
+        usbhost_vtrace2(OTG_VTRACE2_BULKOUT, chidx, chan->buflen);
+        chan->pid = chan->outdata1 ? OTG_PID_DATA1 : OTG_PID_DATA0;
+      }
+      break;
+
+    case OTG_EPTYPE_INTR: /* Interrupt */
+      {
+        /* Setup the OUT data PID */
+
+        usbhost_vtrace2(OTG_VTRACE2_INTROUT, chidx, chan->buflen);
+        chan->pid = chan->outdata1 ? OTG_PID_DATA1 : OTG_PID_DATA0;
+
+        /* Toggle the OUT data PID for the next transfer */
+
+        chan->outdata1 ^= true;
+      }
+      break;
+    }
+
+  /* Start the transfer */
+
+  stm32_transfer_start(priv, chidx);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_out_transfer
+ *
+ * Description:
+ *   Transfer the 'buflen' bytes in 'buffer' through an OUT channel.
+ *
+ ****************************************************************************/
+
+static ssize_t stm32_out_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
+                                  FAR uint8_t *buffer, size_t buflen)
+{
+  FAR struct stm32_chan_s *chan;
+  systime_t start;
+  systime_t elapsed;
+  size_t xfrlen;
+  ssize_t xfrd;
+  int ret;
+
+  /* Loop until the transfer completes (i.e., buflen is decremented to zero)
+   * or a fatal error occurs (any error other than a simple NAK)
+   */
+
+  chan  = &priv->chan[chidx];
+  start = clock_systimer();
+  xfrd  = 0;
+
+  while (buflen > 0)
+    {
+      /* Transfer one packet at a time.  The hardware is capable of queueing
+       * multiple OUT packets, but I just haven't figured out how to handle
+       * the case where a single OUT packet in the group is NAKed.
+       */
+
+      xfrlen       = MIN(chan->maxpacket, buflen);
+      chan->buffer = buffer;
+      chan->buflen = xfrlen;
+      chan->xfrd   = 0;
+
+      /* Set up for the wait BEFORE starting the transfer */
+
+      ret = stm32_chan_waitsetup(priv, chan);
+      if (ret < 0)
+        {
+          usbhost_trace1(OTG_TRACE1_DEVDISCONN, 0);
+          return (ssize_t)ret;
+        }
+
+      /* Set up for the transfer based on the direction and the endpoint type */
+
+      ret = stm32_out_setup(priv, chidx);
+      if (ret < 0)
+        {
+          uerr("ERROR: stm32_out_setup failed: %d\n", ret);
+          return (ssize_t)ret;
+        }
+
+      /* Wait for the transfer to complete and get the result */
+
+      ret = stm32_chan_wait(priv, chan);
+
+      /* Handle transfer failures */
+
+      if (ret < 0)
+        {
+          usbhost_trace1(OTG_TRACE1_TRNSFRFAILED, ret);
+
+          /* Check for a special case:  If (1) the transfer was NAKed and (2)
+           * no Tx FIFO empty or Rx FIFO not-empty event occurred, then we
+           * should be able to just flush the Rx and Tx FIFOs and try again.
+           * We can detect this latter case because the then the transfer
+           * buffer pointer and buffer size will be unaltered.
+           */
+
+          elapsed = clock_systimer() - start;
+          if (ret != -EAGAIN ||                  /* Not a NAK condition OR */
+              elapsed >= STM32_DATANAK_DELAY ||  /* Timeout has elapsed OR */
+              chan->xfrd > 0)                    /* Data has been partially transferred */
+            {
+              /* Break out and return the error */
+
+              uerr("ERROR: stm32_chan_wait failed: %d\n", ret);
+              return (ssize_t)ret;
+            }
+
+          /* Is this flush really necessary? What does the hardware do with the
+           * data in the FIFO when the NAK occurs?  Does it discard it?
+           */
+
+          stm32_flush_txfifos(OTG_GRSTCTL_TXFNUM_HALL);
+
+          /* Get the device a little time to catch up.  Then retry the transfer
+           * using the same buffer pointer and length.
+           */
+
+          usleep(20*1000);
+        }
+      else
+        {
+          /* Successfully transferred.  Update the buffer pointer and length */
+
+          buffer += xfrlen;
+          buflen -= xfrlen;
+          xfrd   += chan->xfrd;
+        }
+    }
+
+  return xfrd;
+}
+
+/****************************************************************************
+ * Name: stm32_out_next
+ *
+ * Description:
+ *   Initiate the next of a sequence of asynchronous transfers.
+ *
+ * Assumptions:
+ *   This function is always called from an interrupt handler
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBHOST_ASYNCH
+static void stm32_out_next(FAR struct stm32_usbhost_s *priv,
+                           FAR struct stm32_chan_s *chan)
+{
+  usbhost_asynch_t callback;
+  FAR void *arg;
+  ssize_t nbytes;
+  int result;
+  int ret;
+
+  /* Is the full transfer complete? Did the last chunk transfer complete OK? */
+
+  result = -(int)chan->result;
+  if (chan->xfrd < chan->buflen && result == OK)
+    {
+      /* Yes.. Set up for the next transfer based on the direction and the
+       * endpoint type
+       */
+
+      ret = stm32_out_setup(priv, chan->chidx);
+      if (ret >= 0)
+        {
+          return;
+        }
+
+      uerr("ERROR: stm32_out_setup failed: %d\n", ret);
+      result = ret;
+    }
+
+  /* The transfer is complete, with or without an error */
+
+  uinfo("Transfer complete:  %d\n", result);
+
+  /* Extract the callback information */
+
+  callback       = chan->callback;
+  arg            = chan->arg;
+  nbytes         = chan->xfrd;
+
+  chan->callback = NULL;
+  chan->arg      = NULL;
+  chan->xfrd     = 0;
+
+  /* Then perform the callback */
+
+  if (result < 0)
+    {
+      nbytes = (ssize_t)result;
+    }
+
+  callback(arg, nbytes);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_out_asynch
+ *
+ * Description:
+ *   Initiate the first of a sequence of asynchronous transfers.
+ *
+ * Assumptions:
+ *   This function is never called from an interrupt handler
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBHOST_ASYNCH
+static int stm32_out_asynch(FAR struct stm32_usbhost_s *priv, int chidx,
+                            FAR uint8_t *buffer, size_t buflen,
+                            usbhost_asynch_t callback, FAR void *arg)
+{
+  FAR struct stm32_chan_s *chan;
+  int ret;
+
+  /* Set up for the transfer data and callback BEFORE starting the first transfer */
+
+  chan         = &priv->chan[chidx];
+  chan->buffer = buffer;
+  chan->buflen = buflen;
+  chan->xfrd   = 0;
+
+  ret = stm32_chan_asynchsetup(priv, chan, callback, arg);
+  if (ret < 0)
+    {
+      uerr("ERROR: stm32_chan_asynchsetup failed: %d\n", ret);
+      return ret;
+    }
+
+  /* Set up for the transfer based on the direction and the endpoint type */
+
+  ret = stm32_out_setup(priv, chidx);
+  if (ret < 0)
+    {
+      uerr("ERROR: stm32_out_setup failed: %d\n", ret);
+    }
+
+  /* And return with the transfer pending */
+
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_gint_wrpacket
+ *
+ * Description:
+ *   Transfer the 'buflen' bytes in 'buffer' to the Tx FIFO associated with
+ *   'chidx' (non-DMA).
+ *
+ ****************************************************************************/
+
+static void stm32_gint_wrpacket(FAR struct stm32_usbhost_s *priv,
+                                FAR uint8_t *buffer, int chidx, int buflen)
+{
+  FAR uint32_t *src;
+  uint32_t fifo;
+  int buflen32;
+
+  stm32_pktdump("Sending", buffer, buflen);
+
+  /* Get the number of 32-byte words associated with this byte size */
+
+  buflen32 = (buflen + 3) >> 2;
+
+  /* Get the address of the Tx FIFO associated with this channel */
+
+  fifo = STM32_OTG_DFIFO_HCH(chidx);
+
+  /* Transfer all of the data into the Tx FIFO */
+
+  src = (FAR uint32_t *)buffer;
+  for (; buflen32 > 0; buflen32--)
+    {
+      uint32_t data = *src++;
+      stm32_putreg(fifo, data);
+    }
+
+  /* Increment the count of bytes "in-flight" in the Tx FIFO */
+
+  priv->chan[chidx].inflight += buflen;
+}
+
+/****************************************************************************
+ * Name: stm32_gint_hcinisr
+ *
+ * Description:
+ *   USB OTG FS host IN channels interrupt handler
+ *
+ *   One the completion of the transfer, the channel result byte may be set as
+ *   follows:
+ *
+ *     OK     - Transfer completed successfully
+ *     EAGAIN - If devices NAKs the transfer or NYET occurs
+ *     EPERM  - If the endpoint stalls
+ *     EIO    - On a TX or data toggle error
+ *     EPIPE  - Frame overrun
+ *
+ *   EBUSY in the result field indicates that the transfer has not completed.
+ *
+ ****************************************************************************/
+
+static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv,
+                                      int chidx)
+{
+  FAR struct stm32_chan_s *chan = &priv->chan[chidx];
+  uint32_t regval;
+  uint32_t pending;
+
+  /* Read the HCINT register to get the pending HC interrupts.  Read the
+   * HCINTMSK register to get the set of enabled HC interrupts.
+   */
+
+  pending = stm32_getreg(STM32_OTG_HCINT(chidx));
+  regval  = stm32_getreg(STM32_OTG_HCINTMSK(chidx));
+
+  /* AND the two to get the set of enabled, pending HC interrupts */
+
+  pending &= regval;
+  uinfo("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
+
+  /* Check for a pending ACK response received/transmitted (ACK) interrupt */
+
+  if ((pending & OTG_HCINT_ACK) != 0)
+    {
+      /* Clear the pending the ACK response received/transmitted (ACK) interrupt */
+
+      stm32_putreg(STM32_OTG_HCINT(chidx), OTG_HCINT_ACK);
+    }
+
+  /* Check for a pending STALL response receive (STALL) interrupt */
+
+  else if ((pending & OTG_HCINT_STALL) != 0)
+    {
+      /* Clear the NAK and STALL Conditions. */
+
+      stm32_putreg(STM32_OTG_HCINT(chidx), (OTG_HCINT_NAK | OTG_HCINT_STALL));
+
+      /* Halt the channel when a STALL, TXERR, BBERR or DTERR interrupt is
+       * received on the channel.
+       */
+
+      stm32_chan_halt(priv, chidx, CHREASON_STALL);
+
+      /* When there is a STALL, clear any pending NAK so that it is not
+       * processed below.
+       */
+
+      pending &= ~OTG_HCINT_NAK;
+    }
+
+  /* Check for a pending Data Toggle ERRor (DTERR) interrupt */
+
+  else if ((pending & OTG_HCINT_DTERR) != 0)
+    {
+      /* Halt the channel when a STALL, TXERR, BBERR or DTERR interrupt is
+       * received on the channel.
+       */
+
+      stm32_chan_halt(priv, chidx, CHREASON_DTERR);
+
+      /* Clear the NAK and data toggle error conditions */
+
+      stm32_putreg(STM32_OTG_HCINT(chidx), (OTG_HCINT_NAK | OTG_HCINT_DTERR));
+    }
+
+  /* Check for a pending FRaMe OverRun (FRMOR) interrupt */
+
+  if ((pending & OTG_HCINT_FRMOR) != 0)
+    {
+      /* Halt the channel -- the CHH interrupt is expected next */
+
+      stm32_chan_halt(priv, chidx, CHREASON_FRMOR);
+
+      /* Clear the FRaMe OverRun (FRMOR) condition */
+
+      stm32_putreg(STM32_OTG_HCINT(chidx), OTG_HCINT_FRMOR);
+    }
+
+  /* Check for a pending TransFeR Completed (XFRC) interrupt */
+
+  else if ((pending & OTG_HCINT_XFRC) != 0)
+    {
+      /* Clear the TransFeR Completed (XFRC) condition */
+
+      stm32_putreg(STM32_OTG_HCINT(chidx), OTG_HCINT_XFRC);
+
+      /* Then handle the transfer completion event based on the endpoint type */
+
+      if (chan->eptype == OTG_EPTYPE_CTRL || chan->eptype == OTG_EPTYPE_BULK)
+        {
+          /* Halt the channel -- the CHH interrupt is expected next */
+
+          stm32_chan_halt(priv, chidx, CHREASON_XFRC);
+
+          /* Clear any pending NAK condition.  The 'indata1' data toggle
+           * should have been appropriately updated by the RxFIFO
+           * logic as each packet was received.
+           */
+
+          stm32_putreg(STM32_OTG_HCINT(chidx), OTG_HCINT_NAK);
+        }
+      else if (chan->eptype == OTG_EPTYPE_INTR)
+        {
+          /* Force the next transfer on an ODD frame */
+
+          regval = stm32_getreg(STM32_OTG_HCCHAR(chidx));
+          regval |= OTG_HCCHAR_ODDFRM;
+          stm32_putreg(STM32_OTG_HCCHAR(chidx), regval);
+
+          /* Set the request done state */
+
+          chan->result = OK;
+        }
+    }
+
+  /* Check for a pending CHannel Halted (CHH) interrupt */
+
+  else if ((pending & OTG_HCINT_CHH) != 0)
+    {
+      /* Mask the CHannel Halted (CHH) interrupt */
+
+      regval  = stm32_getreg(STM32_OTG_HCINTMSK(chidx));
+      regval &= ~OTG_HCINT_CHH;
+      stm32_putreg(STM32_OTG_HCINTMSK(chidx), regval);
+
+      /* Update the request state based on the host state machine state */
+
+      if (chan->chreason == CHREASON_XFRC)
+        {
+          /* Set the request done result */
+
+          chan->result = OK;
+        }
+      else if (chan->chreason == CHREASON_STALL)
+        {
+          /* Set the request stall result */
+
+          chan->result = EPERM;
+        }
+      else if ((chan->chreason == CHREASON_TXERR) ||
+               (chan->chreason == CHREASON_DTERR))
+        {
+          /* Set the request I/O error result */
+
+          chan->result = EIO;
+        }
+      else if (chan->chreason == CHREASON_NAK)
+        {
+          /* Halt on NAK only happens on an INTR channel.  Fetch the HCCHAR
+           * register and check for an interrupt endpoint.
+           */
+
+          regval = stm32_getreg(STM32_OTG_HCCHAR(chidx));
+          if ((regval & OTG_HCCHAR_EPTYP_MASK) == OTG_HCCHAR_EPTYP_INTR)
+            {
+              /* Toggle the IN data toggle (Used by Bulk and INTR only) */
+
+              chan->indata1 ^= true;
+            }
+
+          /* Set the NAK error result */
+
+          chan->result = EAGAIN;
+        }
+      else /* if (chan->chreason == CHREASON_FRMOR) */
+        {
+          /* Set the frame overrun error result */
+
+          chan->result = EPIPE;
+        }
+
+      /* Clear the CHannel Halted (CHH) condition */
+
+      stm32_putreg(STM32_OTG_HCINT(chidx), OTG_HCINT_CHH);
+    }
+
+  /* Check for a pending Transaction ERror (TXERR) interrupt */
+
+  else if ((pending & OTG_HCINT_TXERR) != 0)
+    {
+      /* Halt the channel when a STALL, TXERR, BBERR or DTERR interrupt is
+       * received on the channel.
+       */
+
+      stm32_chan_halt(priv, chidx, CHREASON_TXERR);
+
+      /* Clear the Transaction ERror (TXERR) condition */
+
+      stm32_putreg(STM32_OTG_HCINT(chidx), OTG_HCINT_TXERR);
+    }
+
+  /* Check for a pending NAK response received (NAK) interrupt */
+
+  else if ((pending & OTG_HCINT_NAK) != 0)
+    {
+      /* For a BULK transfer, the hardware is capable of retrying
+       * automatically on a NAK.  However, this is not always
+       * what we need to do.  So we always halt the transfer and
+       * return control to high level logic in the event of a NAK.
+       */
+
+#if 1
+      /* Halt the interrupt channel */
+
+      if (chan->eptype == OTG_EPTYPE_INTR ||
+          chan->eptype == OTG_EPTYPE_BULK)
+        {
+          /* Halt the channel -- the CHH interrupt is expected next */
+
+          stm32_chan_halt(priv, chidx, CHREASON_NAK);
+        }
+
+      /* Re-activate CTRL and BULK channels.
+       * REVISIT: This can cause a lot of interrupts!
+       */
+
+      else if (chan->eptype == OTG_EPTYPE_CTRL /*||
+               chan->eptype == OTG_EPTYPE_BULK*/)
+        {
+          /* Re-activate the channel by clearing CHDIS and assuring that
+           * CHENA is set
+           *
+           * TODO: set channel reason to NACK?
+           */
+
+          regval  = stm32_getreg(STM32_OTG_HCCHAR(chidx));
+          regval |= OTG_HCCHAR_CHENA;
+          regval &= ~OTG_HCCHAR_CHDIS;
+          stm32_putreg(STM32_OTG_HCCHAR(chidx), regval);
+        }
+
+#else
+      /* Halt all transfers on the NAK -- the CHH interrupt is expected next */
+
+      stm32_chan_halt(priv, chidx, CHREASON_NAK);
+#endif
+
+      /* Clear the NAK condition */
+
+      stm32_putreg(STM32_OTG_HCINT(chidx), OTG_HCINT_NAK);
+    }
+
+  /* Check for a transfer complete event */
+
+  stm32_chan_wakeup(priv, chan);
+}
+
+/****************************************************************************
+ * Name: stm32_gint_hcoutisr
+ *
+ * Description:
+ *   USB OTG FS host OUT channels interrupt handler
+ *
+ *   One the completion of the transfer, the channel result byte may be set as
+ *   follows:
+ *
+ *     OK     - Transfer completed successfully
+ *     EAGAIN - If devices NAKs the transfer or NYET occurs
+ *     EPERM  - If the endpoint stalls
+ *     EIO    - On a TX or data toggle error
+ *     EPIPE  - Frame overrun
+ *
+ *   EBUSY in the result field indicates that the transfer has not completed.
+ *
+ ****************************************************************************/
+
+static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv,
+                                       int chidx)
+{
+  FAR struct stm32_chan_s *chan = &priv->chan[chidx];
+  uint32_t regval;
+  uint32_t pending;
+
+  /* Read the HCINT register to get the pending HC interrupts.  Read the
+   * HCINTMSK register to get the set of enabled HC interrupts.
+   */
+
+  pending = stm32_getreg(STM32_OTG_HCINT(chidx));
+  regval  = stm32_getreg(STM32_OTG_HCINTMSK(chidx));
+
+  /* AND the two to get the set of enabled, pending HC interrupts */
+
+  pending &= regval;
+  uinfo("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
+
+  /* Check for a pending ACK response received/transmitted (ACK) interrupt */
+
+  if ((pending & OTG_HCINT_ACK) != 0)
+    {
+      /* Clear the pending the ACK response received/transmitted (ACK) interrupt */
+
+      stm32_putreg(STM32_OTG_HCINT(chidx), OTG_HCINT_ACK);
+    }
+
+  /* Check for a pending FRaMe OverRun (FRMOR) interrupt */
+
+  else if ((pending & OTG_HCINT_FRMOR) != 0)
+    {
+      /* Halt the channel (probably not necessary for FRMOR) */
+
+      stm32_chan_halt(priv, chidx, CHREASON_FRMOR);
+
+      /* Clear the pending the FRaMe OverRun (FRMOR) interrupt */
+
+      stm32_putreg(STM32_OTG_HCINT(chidx), OTG_HCINT_FRMOR);
+    }
+
+  /* Check for a pending TransFeR Completed (XFRC) interrupt */
+
+  else if ((pending & OTG_HCINT_XFRC) != 0)
+    {
+      /* Decrement the number of bytes remaining by the number of
+       * bytes that were "in-flight".
+       */
+
+      priv->chan[chidx].buffer  += priv->chan[chidx].inflight;
+      priv->chan[chidx].xfrd    += priv->chan[chidx].inflight;
+      priv->chan[chidx].inflight = 0;
+
+      /* Halt the channel -- the CHH interrupt is expected next */
+
+      stm32_chan_halt(priv, chidx, CHREASON_XFRC);
+
+      /* Clear the pending the TransFeR Completed (XFRC) interrupt */
+
+      stm32_putreg(STM32_OTG_HCINT(chidx), OTG_HCINT_XFRC);
+    }
+
+  /* Check for a pending STALL response receive (STALL) interrupt */
+
+  else if ((pending & OTG_HCINT_STALL) != 0)
+    {
+      /* Clear the pending the STALL response receiv (STALL) interrupt */
+
+      stm32_putreg(STM32_OTG_HCINT(chidx), OTG_HCINT_STALL);
+
+      /* Halt the channel when a STALL, TXERR, BBERR or DTERR interrupt is
+       * received on the channel.
+       */
+
+      stm32_chan_halt(priv, chidx, CHREASON_STALL);
+    }
+
+  /* Check for a pending NAK response received (NAK) interrupt */
+
+  else if ((pending & OTG_HCINT_NAK) != 0)
+    {
+      /* Halt the channel  -- the CHH interrupt is expected next */
+
+      stm32_chan_halt(priv, chidx, CHREASON_NAK);
+
+      /* Clear the pending the NAK response received (NAK) interrupt */
+
+      stm32_putreg(STM32_OTG_HCINT(chidx), OTG_HCINT_NAK);
+    }
+
+  /* Check for a pending Transaction ERror (TXERR) interrupt */
+
+  else if ((pending & OTG_HCINT_TXERR) != 0)
+    {
+      /* Halt the channel when a STALL, TXERR, BBERR or DTERR interrupt is
+       * received on the channel.
+       */
+
+      stm32_chan_halt(priv, chidx, CHREASON_TXERR);
+
+      /* Clear the pending the Transaction ERror (TXERR) interrupt */
+
+      stm32_putreg(STM32_OTG_HCINT(chidx), OTG_HCINT_TXERR);
+    }
+
+  /* Check for a NYET interrupt */
+
+#if 0 /* NYET is a reserved bit in the HCINT register */
+  else if ((pending & OTG_HCINT_NYET) != 0)
+    {
+      /* Halt the channel */
+
+      stm32_chan_halt(priv, chidx, CHREASON_NYET);
+
+      /* Clear the pending the NYET interrupt */
+
+      stm32_putreg(STM32_OTG_HCINT(chidx), OTG_HCINT_NYET);
+    }
+#endif
+
+  /* Check for a pending Data Toggle ERRor (DTERR) interrupt */
+
+  else if (pending & OTG_HCINT_DTERR)
+    {
+      /* Halt the channel when a STALL, TXERR, BBERR or DTERR interrupt is
+       * received on the channel.
+       */
+
+      stm32_chan_halt(priv, chidx, CHREASON_DTERR);
+
+      /* Clear the pending the Data Toggle ERRor (DTERR) and NAK interrupts */
+
+      stm32_putreg(STM32_OTG_HCINT(chidx), (OTG_HCINT_DTERR | OTG_HCINT_NAK));
+    }
+
+  /* Check for a pending CHannel Halted (CHH) interrupt */
+
+  else if ((pending & OTG_HCINT_CHH) != 0)
+    {
+      /* Mask the CHannel Halted (CHH) interrupt */
+
+      regval  = stm32_getreg(STM32_OTG_HCINTMSK(chidx));
+      regval &= ~OTG_HCINT_CHH;
+      stm32_putreg(STM32_OTG_HCINTMSK(chidx), regval);
+
+      if (chan->chreason == CHREASON_XFRC)
+        {
+          /* Set the request done result */
+
+          chan->result = OK;
+
+          /* Read the HCCHAR register to get the HCCHAR register to get
+           * the endpoint type.
+           */
+
+          regval = stm32_getreg(STM32_OTG_HCCHAR(chidx));
+
+          /* Is it a bulk endpoint?  Were an odd number of packets
+           * transferred?
+           */
+
+          if ((regval & OTG_HCCHAR_EPTYP_MASK) == OTG_HCCHAR_EPTYP_BULK &&
+              (chan->npackets & 1) != 0)
+            {
+              /* Yes to both... toggle the data out PID */
+
+              chan->outdata1 ^= true;
+            }
+        }
+      else if (chan->chreason == CHREASON_NAK ||
+               chan->chreason == CHREASON_NYET)
+        {
+          /* Set the try again later result */
+
+          chan->result = EAGAIN;
+        }
+      else if (chan->chreason == CHREASON_STALL)
+        {
+          /* Set the request stall result */
+
+          chan->result = EPERM;
+        }
+      else if ((chan->chreason == CHREASON_TXERR) ||
+               (chan->chreason == CHREASON_DTERR))
+        {
+          /* Set the I/O failure result */
+
+          chan->result = EIO;
+        }
+      else /* if (chan->chreason == CHREASON_FRMOR) */
+        {
+          /* Set the frame error result */
+
+          chan->result = EPIPE;
+        }
+
+      /* Clear the pending the CHannel Halted (CHH) interrupt */
+
+      stm32_putreg(STM32_OTG_HCINT(chidx), OTG_HCINT_CHH);
+    }
+
+  /* Check for a transfer complete event */
+
+  stm32_chan_wakeup(priv, chan);
+}
+
+/****************************************************************************
+ * Name: stm32_gint_connected
+ *
+ * Description:
+ *   Handle a connection event.
+ *
+ ****************************************************************************/
+
+static void stm32_gint_connected(FAR struct stm32_usbhost_s *priv)
+{
+  /* We we previously disconnected? */
+
+  if (!priv->connected)
+    {
+      /* Yes.. then now we are connected */
+
+      usbhost_vtrace1(OTG_VTRACE1_CONNECTED, 0);
+      priv->connected = true;
+      priv->change    = true;
+      DEBUGASSERT(priv->smstate == SMSTATE_DETACHED);
+
+      /* Notify any waiters */
+
+      priv->smstate = SMSTATE_ATTACHED;
+      if (priv->pscwait)
+        {
+          stm32_givesem(&priv->pscsem);
+          priv->pscwait = false;
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_gint_disconnected
+ *
+ * Description:
+ *   Handle a disconnection event.
+ *
+ ****************************************************************************/
+
+static void stm32_gint_disconnected(FAR struct stm32_usbhost_s *priv)
+{
+  /* Were we previously connected? */
+
+  if (priv->connected)
+    {
+      /* Yes.. then we no longer connected */
+
+      usbhost_vtrace1(OTG_VTRACE1_DISCONNECTED, 0);
+
+      /* Are we bound to a class driver? */
+
+      if (priv->rhport.hport.devclass)
+        {
+          /* Yes.. Disconnect the class driver */
+
+          CLASS_DISCONNECTED(priv->rhport.hport.devclass);
+          priv->rhport.hport.devclass = NULL;
+        }
+
+      /* Re-Initialize Host for new Enumeration */
+
+      priv->smstate   = SMSTATE_DETACHED;
+      priv->connected = false;
+      priv->change    = true;
+      stm32_chan_freeall(priv);
+
+      priv->rhport.hport.speed = USB_SPEED_FULL;
+      priv->rhport.hport.funcaddr = 0;
+
+      /* Notify any waiters that there is a change in the connection state */
+
+      if (priv->pscwait)
+        {
+          stm32_givesem(&priv->pscsem);
+          priv->pscwait = false;
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_gint_sofisr
+ *
+ * Description:
+ *   USB OTG FS start-of-frame interrupt handler
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32F7_OTG_SOFINTR
+static inline void stm32_gint_sofisr(FAR struct stm32_usbhost_s *priv)
+{
+  /* Handle SOF interrupt */
+#warning "Do what?"
+
+  /* Clear pending SOF interrupt */
+
+  stm32_putreg(STM32_OTG_GINTSTS, OTG_GINT_SOF);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_gint_rxflvlisr
+ *
+ * Description:
+ *   USB OTG FS RxFIFO non-empty interrupt handler
+ *
+ ****************************************************************************/
+
+static inline void stm32_gint_rxflvlisr(FAR struct stm32_usbhost_s *priv)
+{
+  FAR uint32_t *dest;
+  uint32_t grxsts;
+  uint32_t intmsk;
+  uint32_t hcchar;
+  uint32_t hctsiz;
+  uint32_t fifo;
+  int bcnt;
+  int bcnt32;
+  int chidx;
+  int i;
+
+  /* Disable the RxFIFO non-empty interrupt */
+
+  intmsk  = stm32_getreg(STM32_OTG_GINTMSK);
+  intmsk &= ~OTG_GINT_RXFLVL;
+  stm32_putreg(STM32_OTG_GINTMSK, intmsk);
+
+  /* Read and pop the next status from the Rx FIFO */
+
+  grxsts = stm32_getreg(STM32_OTG_GRXSTSP);
+  uinfo("GRXSTS: %08x\n", grxsts);
+
+  /* Isolate the channel number/index in the status word */
+
+  chidx = (grxsts & OTG_GRXSTSH_CHNUM_MASK) >> OTG_GRXSTSH_CHNUM_SHIFT;
+
+  /* Get the host channel characteristics register (HCCHAR) for this channel */
+
+  hcchar = stm32_getreg(STM32_OTG_HCCHAR(chidx));
+
+  /* Then process the interrupt according to the packet status */
+
+  switch (grxsts & OTG_GRXSTSH_PKTSTS_MASK)
+    {
+    case OTG_GRXSTSH_PKTSTS_INRECVD: /* IN data packet received */
+      {
+        /* Read the data into the host buffer. */
+
+        bcnt = (grxsts & OTG_GRXSTSH_BCNT_MASK) >> OTG_GRXSTSH_BCNT_SHIFT;
+        if (bcnt > 0 && priv->chan[chidx].buffer != NULL)
+          {
+            /* Transfer the packet from the Rx FIFO into the user buffer */
+
+            dest   = (FAR uint32_t *)priv->chan[chidx].buffer;
+            fifo   = STM32_OTG_DFIFO_HCH(0);
+            bcnt32 = (bcnt + 3) >> 2;
+
+            for (i = 0; i < bcnt32; i++)
+              {
+                *dest++ = stm32_getreg(fifo);
+              }
+
+            stm32_pktdump("Received", priv->chan[chidx].buffer, bcnt);
+
+            /* Toggle the IN data pid (Used by Bulk and INTR only) */
+
+            priv->chan[chidx].indata1 ^= true;
+
+            /* Manage multiple packet transfers */
+
+            priv->chan[chidx].buffer += bcnt;
+            priv->chan[chidx].xfrd   += bcnt;
+
+            /* Check if more packets are expected */
+
+            hctsiz = stm32_getreg(STM32_OTG_HCTSIZ(chidx));
+            if ((hctsiz & OTG_HCTSIZ_PKTCNT_MASK) != 0)
+              {
+                /* Re-activate the channel when more packets are expected */
+
+                hcchar |= OTG_HCCHAR_CHENA;
+                hcchar &= ~OTG_HCCHAR_CHDIS;
+                stm32_putreg(STM32_OTG_HCCHAR(chidx), hcchar);
+              }
+          }
+      }
+      break;
+
+    case OTG_GRXSTSH_PKTSTS_INDONE:  /* IN transfer completed */
+    case OTG_GRXSTSH_PKTSTS_DTOGERR: /* Data toggle error */
+    case OTG_GRXSTSH_PKTSTS_HALTED:  /* Channel halted */
+    default:
+      break;
+    }
+
+  /* Re-enable the RxFIFO non-empty interrupt */
+
+  intmsk |= OTG_GINT_RXFLVL;
+  stm32_putreg(STM32_OTG_GINTMSK, intmsk);
+}
+
+/****************************************************************************
+ * Name: stm32_gint_nptxfeisr
+ *
+ * Description:
+ *   USB OTG FS non-periodic TxFIFO empty interrupt handler
+ *
+ ****************************************************************************/
+
+static inline void stm32_gint_nptxfeisr(FAR struct stm32_usbhost_s *priv)
+{
+  FAR struct stm32_chan_s *chan;
+  uint32_t     regval;
+  unsigned int wrsize;
+  unsigned int avail;
+  unsigned int chidx;
+
+  /* Recover the index of the channel that is waiting for space in the Tx
+   * FIFO.
+   */
+
+  chidx = priv->chidx;
+  chan  = &priv->chan[chidx];
+
+  /* Reduce the buffer size by the number of bytes that were previously placed
+   * in the Tx FIFO.
+   */
+
+  chan->buffer  += chan->inflight;
+  chan->xfrd    += chan->inflight;
+  chan->inflight = 0;
+
+  /* If we have now transferred the entire buffer, then this transfer is
+   * complete (this case really should never happen because we disable
+   * the NPTXFE interrupt on the final packet).
+   */
+
+  if (chan->xfrd >= chan->buflen)
+    {
+      /* Disable further Tx FIFO empty interrupts and bail. */
+
+      stm32_modifyreg(STM32_OTG_GINTMSK, OTG_GINT_NPTXFE, 0);
+      return;
+    }
+
+  /* Read the status from the top of the non-periodic TxFIFO */
+
+  regval = stm32_getreg(STM32_OTG_HNPTXSTS);
+
+  /* Extract the number of bytes available in the non-periodic Tx FIFO. */
+
+  avail = ((regval & OTG_HNPTXSTS_NPTXFSAV_MASK) >> OTG_HNPTXSTS_NPTXFSAV_SHIFT) << 2;
+
+  /* Get the size to put in the Tx FIFO now */
+
+  wrsize = chan->buflen - chan->xfrd;
+
+  /* Get minimal size packet that can be sent.  Something is seriously
+   * configured wrong if one packet will not fit into the empty Tx FIFO.
+   */
+
+  DEBUGASSERT(wrsize > 0 && avail >= MIN(wrsize, chan->maxpacket));
+  if (wrsize > avail)
+    {
+      /* Clip the write size to the number of full, max sized packets
+       * that will fit in the Tx FIFO.
+       */
+
+      unsigned int wrpackets = avail / chan->maxpacket;
+      wrsize = wrpackets * chan->maxpacket;
+    }
+
+  /* Otherwise, this will be the last packet to be sent in this transaction.
+   * We now need to disable further NPTXFE interrupts.
+   */
+
+  else
+    {
+      stm32_modifyreg(STM32_OTG_GINTMSK, OTG_GINT_NPTXFE, 0);
+    }
+
+  /* Write the next group of packets into the Tx FIFO */
+
+  uinfo("HNPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
+           regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
+
+  stm32_gint_wrpacket(priv, chan->buffer, chidx, wrsize);
+}
+
+/****************************************************************************
+ * Name: stm32_gint_ptxfeisr
+ *
+ * Description:
+ *   USB OTG FS periodic TxFIFO empty interrupt handler
+ *
+ ****************************************************************************/
+
+static inline void stm32_gint_ptxfeisr(FAR struct stm32_usbhost_s *priv)
+{
+  FAR struct stm32_chan_s *chan;
+  uint32_t     regval;
+  unsigned int wrsize;
+  unsigned int avail;
+  unsigned int chidx;
+
+  /* Recover the index of the channel that is waiting for space in the Tx
+   * FIFO.
+   */
+
+  chidx = priv->chidx;
+  chan  = &priv->chan[chidx];
+
+  /* Reduce the buffer size by the number of bytes that were previously placed
+   * in the Tx FIFO.
+   */
+
+  chan->buffer  += chan->inflight;
+  chan->xfrd    += chan->inflight;
+  chan->inflight = 0;
+
+  /* If we have now transfered the entire buffer, then this transfer is
+   * complete (this case really should never happen because we disable
+   * the PTXFE interrupt on the final packet).
+   */
+
+  if (chan->xfrd >= chan->buflen)
+    {
+      /* Disable further Tx FIFO empty interrupts and bail. */
+
+      stm32_modifyreg(STM32_OTG_GINTMSK, OTG_GINT_PTXFE, 0);
+      return;
+    }
+
+  /* Read the status from the top of the periodic TxFIFO */
+
+  regval = stm32_getreg(STM32_OTG_HPTXSTS);
+
+  /* Extract the number of bytes available in the periodic Tx FIFO. */
+
+  avail = ((regval & OTG_HPTXSTS_PTXFSAVL_MASK) >> OTG_HPTXSTS_PTXFSAVL_SHIFT) << 2;
+
+  /* Get the size to put in the Tx FIFO now */
+
+  wrsize = chan->buflen - chan->xfrd;
+
+  /* Get minimal size packet that can be sent.  Something is seriously
+   * configured wrong if one packet will not fit into the empty Tx FIFO.
+   */
+
+  DEBUGASSERT(wrsize && avail >= MIN(wrsize, chan->maxpacket));
+  if (wrsize > avail)
+    {
+      /* Clip the write size to the number of full, max sized packets
+       * that will fit in the Tx FIFO.
+       */
+
+      unsigned int wrpackets = avail / chan->maxpacket;
+      wrsize = wrpackets * chan->maxpacket;
+    }
+
+  /* Otherwise, this will be the last packet to be sent in this transaction.
+   * We now need to disable further PTXFE interrupts.
+   */
+
+  else
+    {
+      stm32_modifyreg(STM32_OTG_GINTMSK, OTG_GINT_PTXFE, 0);
+    }
+
+  /* Write the next group of packets into the Tx FIFO */
+
+  uinfo("HPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
+           regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
+
+  stm32_gint_wrpacket(priv, chan->buffer, chidx, wrsize);
+}
+
+/****************************************************************************
+ * Name: stm32_gint_hcisr
+ *
+ * Description:
+ *   USB OTG FS host channels interrupt handler
+ *
+ ****************************************************************************/
+
+static inline void stm32_gint_hcisr(FAR struct stm32_usbhost_s *priv)
+{
+  uint32_t haint;
+  uint32_t hcchar;
+  int i = 0;
+
+  /* Read the Host all channels interrupt register and test each bit in the
+   * register. Each bit i, i=0...(STM32_NHOST_CHANNELS-1), corresponds to
+   * a pending interrupt on channel i.
+   */
+
+  haint = stm32_getreg(STM32_OTG_HAINT);
+  for (i = 0; i < STM32_NHOST_CHANNELS; i++)
+    {
+      /* Is an interrupt pending on this channel? */
+
+      if ((haint & OTG_HAINT(i)) != 0)
+        {
+          /* Yes... read the HCCHAR register to get the direction bit */
+
+          hcchar = stm32_getreg(STM32_OTG_HCCHAR(i));
+
+          /* Was this an interrupt on an IN or an OUT channel? */
+
+          if ((hcchar & OTG_HCCHAR_EPDIR) != 0)
+            {
+              /* Handle the HC IN channel interrupt */
+
+              stm32_gint_hcinisr(priv, i);
+            }
+          else
+            {
+              /* Handle the HC OUT channel interrupt */
+
+              stm32_gint_hcoutisr(priv, i);
+            }
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_gint_hprtisr
+ *
+ * Description:
+ *   USB OTG FS host port interrupt handler
+ *
+ ****************************************************************************/
+
+static inline void stm32_gint_hprtisr(FAR struct stm32_usbhost_s *priv)
+{
+  uint32_t hprt;
+  uint32_t newhprt;
+  uint32_t hcfg;
+
+  usbhost_vtrace1(OTG_VTRACE1_GINT_HPRT, 0);
+  /* Read the port status and control register (HPRT) */
+
+  hprt = stm32_getreg(STM32_OTG_HPRT);
+
+  /* Setup to clear the interrupt bits in GINTSTS by setting the corresponding
+   * bits in the HPRT.  The HCINT interrupt bit is cleared when the appropriate
+   * status bits in the HPRT register are cleared.
+   */
+
+  newhprt = hprt & ~(OTG_HPRT_PENA    | OTG_HPRT_PCDET  |
+                     OTG_HPRT_PENCHNG | OTG_HPRT_POCCHNG);
+
+  /* Check for Port Overcurrent CHaNGe (POCCHNG) */
+
+  if ((hprt & OTG_HPRT_POCCHNG) != 0)
+    {
+      /* Set up to clear the POCCHNG status in the new HPRT contents. */
+
+      usbhost_vtrace1(OTG_VTRACE1_GINT_HPRT_POCCHNG, 0);
+      newhprt |= OTG_HPRT_POCCHNG;
+    }
+
+  /* Check for Port Connect DETected (PCDET).  The core sets this bit when a
+   * device connection is detected.
+   */
+
+  if ((hprt & OTG_HPRT_PCDET) != 0)
+    {
+      /* Set up to clear the PCDET status in the new HPRT contents. Then
+       * process the new connection event.
+       */
+
+      usbhost_vtrace1(OTG_VTRACE1_GINT_HPRT_PCDET, 0);
+      newhprt |= OTG_HPRT_PCDET;
+      stm32_portreset(priv);
+      stm32_gint_connected(priv);
+    }
+
+  /* Check for Port Enable CHaNGed (PENCHNG) */
+
+  if ((hprt & OTG_HPRT_PENCHNG) != 0)
+    {
+      /* Set up to clear the PENCHNG status in the new HPRT contents. */
+
+      usbhost_vtrace1(OTG_VTRACE1_GINT_HPRT_PENCHNG, 0);
+      newhprt |= OTG_HPRT_PENCHNG;
+
+      /* Was the port enabled? */
+
+      if ((hprt & OTG_HPRT_PENA) != 0)
+        {
+          /* Yes.. handle the new connection event */
+
+          stm32_gint_connected(priv);
+
+          /* Check the Host ConFiGuration register (HCFG) */
+
+          hcfg = stm32_getreg(STM32_OTG_HCFG);
+
+          /* Is this a low speed or full speed connection (OTG FS does not
+           * support high speed)
+           */
+
+          if ((hprt & OTG_HPRT_PSPD_MASK) == OTG_HPRT_PSPD_LS)
+            {
+              /* Set the Host Frame Interval Register for the 6KHz speed */
+
+              usbhost_vtrace1(OTG_VTRACE1_GINT_HPRT_LSDEV, 0);
+              stm32_putreg(STM32_OTG_HFIR, 6000);
+
+              /* Are we switching from FS to LS? */
+
+              if ((hcfg & OTG_HCFG_FSLSPCS_MASK) != OTG_HCFG_FSLSPCS_LS6MHz)
+                {
+                  usbhost_vtrace1(OTG_VTRACE1_GINT_HPRT_FSLSSW, 0);
+
+                  /* Yes... configure for LS */
+
+                  hcfg &= ~OTG_HCFG_FSLSPCS_MASK;
+                  hcfg |= OTG_HCFG_FSLSPCS_LS6MHz;
+                  stm32_putreg(STM32_OTG_HCFG, hcfg);
+
+                  /* And reset the port */
+
+                  stm32_portreset(priv);
+                }
+            }
+          else /* if ((hprt & OTG_HPRT_PSPD_MASK) == OTG_HPRT_PSPD_FS) */
+            {
+
+              usbhost_vtrace1(OTG_VTRACE1_GINT_HPRT_FSDEV, 0);
+              stm32_putreg(STM32_OTG_HFIR, 48000);
+
+              /* Are we switching from LS to FS? */
+
+              if ((hcfg & OTG_HCFG_FSLSPCS_MASK) != OTG_HCFG_FSLSPCS_FS48MHz)
+                {
+
+                  usbhost_vtrace1(OTG_VTRACE1_GINT_HPRT_LSFSSW, 0);
+                  /* Yes... configure for FS */
+
+                  hcfg &= ~OTG_HCFG_FSLSPCS_MASK;
+                  hcfg |= OTG_HCFG_FSLSPCS_FS48MHz;
+                  stm32_putreg(STM32_OTG_HCFG, hcfg);
+
+                  /* And reset the port */
+
+                  stm32_portreset(priv);
+                }
+            }
+        }
+    }
+
+  /* Clear port interrupts by setting bits in the HPRT */
+
+  stm32_putreg(STM32_OTG_HPRT, newhprt);
+}
+
+/****************************************************************************
+ * Name: stm32_gint_discisr
+ *
+ * Description:
+ *   USB OTG FS disconnect detected interrupt handler
+ *
+ ****************************************************************************/
+
+static inline void stm32_gint_discisr(FAR struct stm32_usbhost_s *priv)
+{
+  /* Handle the disconnection event */
+
+  stm32_gint_disconnected(priv);
+
+  /* Clear the dicsonnect interrupt */
+
+  stm32_putreg(STM32_OTG_GINTSTS, OTG_GINT_DISC);
+}
+
+/****************************************************************************
+ * Name: stm32_gint_ipxfrisr
+ *
+ * Description:
+ *   USB OTG FS incomplete periodic interrupt handler
+ *
+ ****************************************************************************/
+
+static inline void stm32_gint_ipxfrisr(FAR struct stm32_usbhost_s *priv)
+{
+  uint32_t regval;
+
+  /* CHENA : Set to enable the channel
+   * CHDIS : Set to stop transmitting/receiving data on a channel
+   */
+
+  regval = stm32_getreg(STM32_OTG_HCCHAR(0));
+  regval |= (OTG_HCCHAR_CHDIS | OTG_HCCHAR_CHENA);
+  stm32_putreg(STM32_OTG_HCCHAR(0), regval);
+
+  /* Clear the incomplete isochronous OUT interrupt */
+
+  stm32_putreg(STM32_OTG_GINTSTS, OTG_GINT_IPXFR);
+}
+
+/****************************************************************************
+ * Name: stm32_gint_isr
+ *
+ * Description:
+ *   USB OTG FS global interrupt handler
+ *
+ ****************************************************************************/
+
+static int stm32_gint_isr(int irq, FAR void *context, FAR void *arg)
+{
+  /* At present, there is only support for a single OTG FS host. Hence it is
+   * pre-allocated as g_usbhost.  However, in most code, the private data
+   * structure will be referenced using the 'priv' pointer (rather than the
+   * global data) in order to simplify any future support for multiple devices.
+   */
+
+  FAR struct stm32_usbhost_s *priv = &g_usbhost;
+  uint32_t pending;
+
+  /* If OTG were supported, we would need to check if we are in host or
+   * device mode when the global interrupt occurs.  Here we support only
+   * host mode
+   */
+
+  /* Loop while there are pending interrupts to process.  This loop may save a
+   * little interrupt handling overhead.
+   */
+
+  for (; ; )
+    {
+      /* Get the unmasked bits in the GINT status */
+
+      pending  = stm32_getreg(STM32_OTG_GINTSTS);
+      pending &= stm32_getreg(STM32_OTG_GINTMSK);
+
+      /* Return from the interrupt when there are no further pending
+       * interrupts.
+       */
+
+      if (pending == 0)
+        {
+          return OK;
+        }
+
+      /* Otherwise, process each pending, unmasked GINT interrupts */
+      /* Handle the start of frame interrupt */
+
+#ifdef CONFIG_STM32F7_OTG_SOFINTR
+      if ((pending & OTG_GINT_SOF) != 0)
+        {
+          usbhost_vtrace1(OTG_VTRACE1_GINT_SOF, 0);
+          stm32_gint_sofisr(priv);
+        }
+#endif
+
+      /* Handle the RxFIFO non-empty interrupt */
+
+      if ((pending & OTG_GINT_RXFLVL) != 0)
+        {
+          usbhost_vtrace1(OTG_VTRACE1_GINT_RXFLVL, 0);
+          stm32_gint_rxflvlisr(priv);
+        }
+
+      /* Handle the non-periodic TxFIFO empty interrupt */
+
+      if ((pending & OTG_GINT_NPTXFE) != 0)
+        {
+          usbhost_vtrace1(OTG_VTRACE1_GINT_NPTXFE, 0);
+          stm32_gint_nptxfeisr(priv);
+        }
+
+      /* Handle the periodic TxFIFO empty interrupt */
+
+      if ((pending & OTG_GINT_PTXFE) != 0)
+        {
+          usbhost_vtrace1(OTG_VTRACE1_GINT_PTXFE, 0);
+          stm32_gint_ptxfeisr(priv);
+        }
+
+      /* Handle the host channels interrupt */
+
+      if ((pending & OTG_GINT_HC) != 0)
+        {
+          usbhost_vtrace1(OTG_VTRACE1_GINT_HC, 0);
+          stm32_gint_hcisr(priv);
+        }
+
+      /* Handle the host port interrupt */
+
+      if ((pending & OTG_GINT_HPRT) != 0)
+        {
+          stm32_gint_hprtisr(priv);
+        }
+
+      /* Handle the disconnect detected interrupt */
+
+      if ((pending & OTG_GINT_DISC) != 0)
+        {
+          usbhost_vtrace1(OTG_VTRACE1_GINT_DISC, 0);
+          stm32_gint_discisr(priv);
+        }
+
+      /* Handle the incomplete periodic transfer */
+
+      if ((pending & OTG_GINT_IPXFR) != 0)
+        {
+          usbhost_vtrace1(OTG_VTRACE1_GINT_IPXFR, 0);
+          stm32_gint_ipxfrisr(priv);
+        }
+    }
+
+  /* We won't get here */
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_gint_enable and stm32_gint_disable
+ *
+ * Description:
+ *   Respectively enable or disable the global OTG FS interrupt.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void stm32_gint_enable(void)
+{
+  uint32_t regval;
+
+  /* Set the GINTMSK bit to unmask the interrupt */
+
+  regval  = stm32_getreg(STM32_OTG_GAHBCFG);
+  regval |= OTG_GAHBCFG_GINTMSK;
+  stm32_putreg(STM32_OTG_GAHBCFG, regval);
+}
+
+static void stm32_gint_disable(void)
+{
+  uint32_t regval;
+
+  /* Clear the GINTMSK bit to mask the interrupt */
+
+  regval  = stm32_getreg(STM32_OTG_GAHBCFG);
+  regval &= ~OTG_GAHBCFG_GINTMSK;
+  stm32_putreg(STM32_OTG_GAHBCFG, regval);
+}
+
+/****************************************************************************
+ * Name: stm32_hostinit_enable
+ *
+ * Description:
+ *   Enable host interrupts.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static inline void stm32_hostinit_enable(void)
+{
+  uint32_t regval;
+
+  /* Disable all interrupts. */
+
+  stm32_putreg(STM32_OTG_GINTMSK, 0);
+
+  /* Clear any pending interrupts. */
+
+  stm32_putreg(STM32_OTG_GINTSTS, 0xffffffff);
+
+  /* Clear any pending USB OTG Interrupts (should be done elsewhere if OTG is supported) */
+
+  stm32_putreg(STM32_OTG_GOTGINT, 0xffffffff);
+
+  /* Clear any pending USB OTG interrupts */
+
+  stm32_putreg(STM32_OTG_GINTSTS, 0xbfffffff);
+
+  /* Enable the host interrupts */
+  /* Common interrupts:
+   *
+   *   OTG_GINT_WKUP     : Resume/remote wakeup detected interrupt
+   *   OTG_GINT_USBSUSP  : USB suspend
+   */
+
+  regval = (OTG_GINT_WKUP | OTG_GINT_USBSUSP);
+
+  /* If OTG were supported, we would need to enable the following as well:
+   *
+   *   OTG_GINT_OTG      : OTG interrupt
+   *   OTG_GINT_SRQ      : Session request/new session detected interrupt
+   *   OTG_GINT_CIDSCHG  : Connector ID status change
+   */
+
+  /* Host-specific interrupts
+   *
+   *   OTG_GINT_SOF      : Start of frame
+   *   OTG_GINT_RXFLVL   : RxFIFO non-empty
+   *   OTG_GINT_IISOOXFR : Incomplete isochronous OUT transfer
+   *   OTG_GINT_HPRT     : Host port interrupt
+   *   OTG_GINT_HC       : Host channels interrupt
+   *   OTG_GINT_DISC     : Disconnect detected interrupt
+   */
+
+#ifdef CONFIG_STM32F7_OTG_SOFINTR
+  regval |= (OTG_GINT_SOF    | OTG_GINT_RXFLVL   | OTG_GINT_IISOOXFR |
+             OTG_GINT_HPRT   | OTG_GINT_HC       | OTG_GINT_DISC);
+#else
+  regval |= (OTG_GINT_RXFLVL | OTG_GINT_IPXFR    | OTG_GINT_HPRT     |
+             OTG_GINT_HC     | OTG_GINT_DISC);
+#endif
+  stm32_putreg(STM32_OTG_GINTMSK, regval);
+}
+
+/****************************************************************************
+ * Name: stm32_txfe_enable
+ *
+ * Description:
+ *   Enable Tx FIFO empty interrupts.  This is necessary when the entire
+ *   transfer will not fit into Tx FIFO.  The transfer will then be completed
+ *   when the Tx FIFO is empty.  NOTE:  The Tx FIFO interrupt is disabled
+ *   the fifo empty interrupt handler when the transfer is complete.
+ *
+ * Input Parameters:
+ *   priv - Driver state structure reference
+ *   chidx - The channel that requires the Tx FIFO empty interrupt
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Called from user task context.  Interrupts must be disabled to assure
+ *   exclusive access to the GINTMSK register.
+ *
+ ****************************************************************************/
+
+static void stm32_txfe_enable(FAR struct stm32_usbhost_s *priv, int chidx)
+{
+  FAR struct stm32_chan_s *chan = &priv->chan[chidx];
+  irqstate_t flags;
+  uint32_t regval;
+
+  /* Disable all interrupts so that we have exclusive access to the GINTMSK
+   * (it would be sufficent just to disable the GINT interrupt).
+   */
+
+  flags = enter_critical_section();
+
+  /* Should we enable the periodic or non-peridic Tx FIFO empty interrupts */
+
+  regval = stm32_getreg(STM32_OTG_GINTMSK);
+  switch (chan->eptype)
+    {
+    default:
+    case OTG_EPTYPE_CTRL: /* Non periodic transfer */
+    case OTG_EPTYPE_BULK:
+      regval |= OTG_GINT_NPTXFE;
+      break;
+
+    case OTG_EPTYPE_INTR: /* Periodic transfer */
+    case OTG_EPTYPE_ISOC:
+      regval |= OTG_GINT_PTXFE;
+      break;
+    }
+
+  /* Enable interrupts */
+
+  stm32_putreg(STM32_OTG_GINTMSK, regval);
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * USB Host Controller Operations
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_wait
+ *
+ * Description:
+ *   Wait for a device to be connected or disconnected to/from a hub port.
+ *
+ * Input Parameters:
+ *   conn - The USB host connection instance obtained as a parameter from the call to
+ *      the USB driver initialization logic.
+ *   hport - The location to return the hub port descriptor that detected the
+ *      connection related event.
+ *
+ * Returned Values:
+ *   Zero (OK) is returned on success when a device in connected or
+ *   disconnected. This function will not return until either (1) a device is
+ *   connected or disconnect to/from any hub port or until (2) some failure
+ *   occurs.  On a failure, a negated errno value is returned indicating the
+ *   nature of the failure
+ *
+ * Assumptions:
+ *   - Called from a single thread so no mutual exclusion is required.
+ *   - Never called from an interrupt handler.
+ *
+ ****************************************************************************/
+
+static int stm32_wait(FAR struct usbhost_connection_s *conn,
+                      FAR struct usbhost_hubport_s **hport)
+{
+  FAR struct stm32_usbhost_s *priv = &g_usbhost;
+  struct usbhost_hubport_s *connport;
+  irqstate_t flags;
+
+  /* Loop until a change in connection state is detected */
+
+  flags = enter_critical_section();
+  for (; ; )
+    {
+      /* Is there a change in the connection state of the single root hub
+       * port?
+       */
+
+      if (priv->change)
+        {
+          connport = &priv->rhport.hport;
+
+          /* Yes. Remember the new state */
+
+          connport->connected = priv->connected;
+          priv->change = false;
+
+          /* And return the root hub port */
+
+          *hport = connport;
+          leave_critical_section(flags);
+
+          uinfo("RHport Connected: %s\n", connport->connected ? "YES" : "NO");
+          return OK;
+        }
+
+#ifdef CONFIG_USBHOST_HUB
+      /* Is a device connected to an external hub? */
+
+      if (priv->hport)
+        {
+          /* Yes.. return the external hub port */
+
+          connport = (struct usbhost_hubport_s *)priv->hport;
+          priv->hport = NULL;
+
+          *hport = connport;
+          leave_critical_section(flags);
+
+          uinfo("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
+          return OK;
+        }
+#endif
+
+      /* Wait for the next connection event */
+
+      priv->pscwait = true;
+      stm32_takesem(&priv->pscsem);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_enumerate
+ *
+ * Description:
+ *   Enumerate the connected device.  As part of this enumeration process,
+ *   the driver will (1) get the device's configuration descriptor, (2)
+ *   extract the class ID info from the configuration descriptor, (3) call
+ *   usbhost_findclass() to find the class that supports this device, (4)
+ *   call the create() method on the struct usbhost_registry_s interface
+ *   to get a class instance, and finally (5) call the connect() method
+ *   of the struct usbhost_class_s interface.  After that, the class is in
+ *   charge of the sequence of operations.
+ *
+ * Input Parameters:
+ *   conn - The USB host connection instance obtained as a parameter from
+ *      the call to the USB driver initialization logic.
+ *   hport - The descriptor of the hub port that has the newly connected
+ *      device.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   This function will *not* be called from an interrupt handler.
+ *
+ ****************************************************************************/
+
+static int stm32_rh_enumerate(FAR struct stm32_usbhost_s *priv,
+                              FAR struct usbhost_connection_s *conn,
+                              FAR struct usbhost_hubport_s *hport)
+{
+  uint32_t regval;
+  int ret;
+
+  DEBUGASSERT(conn != NULL && hport != NULL && hport->port == 0);
+
+  /* Are we connected to a device?  The caller should have called the wait()
+   * method first to be assured that a device is connected.
+   */
+
+  while (!priv->connected)
+    {
+      /* No, return an error */
+
+      usbhost_trace1(OTG_TRACE1_DEVDISCONN, 0);
+      return -ENODEV;
+    }
+
+  DEBUGASSERT(priv->smstate == SMSTATE_ATTACHED);
+
+  /* USB 2.0 spec says at least 50ms delay before port reset.  We wait 100ms. */
+
+  usleep(100*1000);
+
+  /* Reset the host port */
+
+  stm32_portreset(priv);
+
+  /* Get the current device speed */
+
+  regval = stm32_getreg(STM32_OTG_HPRT);
+  if ((regval & OTG_HPRT_PSPD_MASK) == OTG_HPRT_PSPD_LS)
+    {
+      priv->rhport.hport.speed = USB_SPEED_LOW;
+    }
+  else
+    {
+      priv->rhport.hport.speed = USB_SPEED_FULL;
+    }
+
+  /* Allocate and initialize the root hub port EP0 channels */
+
+  ret = stm32_ctrlchan_alloc(priv, 0, 0, priv->rhport.hport.speed, &priv->ep0);
+  if (ret < 0)
+    {
+      uerr("ERROR: Failed to allocate a control endpoint: %d\n", ret);
+    }
+
+  return ret;
+}
+
+static int stm32_enumerate(FAR struct usbhost_connection_s *conn,
+                           FAR struct usbhost_hubport_s *hport)
+{
+  FAR struct stm32_usbhost_s *priv = &g_usbhost;
+  int ret;
+
+  DEBUGASSERT(hport);
+
+  /* If this is a connection on the root hub, then we need to go to
+   * little more effort to get the device speed.  If it is a connection
+   * on an external hub, then we already have that information.
+   */
+
+#ifdef CONFIG_USBHOST_HUB
+  if (ROOTHUB(hport))
+#endif
+    {
+      ret = stm32_rh_enumerate(priv, conn, hport);
+      if (ret < 0)
+        {
+          return ret;
+        }
+    }
+
+  /* Then let the common usbhost_enumerate do the real enumeration. */
+
+  uinfo("Enumerate the device\n");
+  priv->smstate = SMSTATE_ENUM;
+  ret = usbhost_enumerate(hport, &hport->devclass);
+
+  /* The enumeration may fail either because of some HCD interfaces failure
+   * or because the device class is not supported.  In either case, we just
+   * need to perform the disconnection operation and make ready for a new
+   * enumeration.
+   */
+
+  if (ret < 0)
+    {
+      /* Return to the disconnected state */
+
+      uerr("ERROR: Enumeration failed: %d\n", ret);
+      stm32_gint_disconnected(priv);
+    }
+
+  return ret;
+}
+
+/************************************************************************************
+ * Name: stm32_ep0configure
+ *
+ * Description:
+ *   Configure endpoint 0.  This method is normally used internally by the
+ *   enumerate() method but is made available at the interface to support an
+ *   external implementation of the enumeration logic.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   ep0 - The (opaque) EP0 endpoint instance
+ *   funcaddr - The USB address of the function containing the endpoint that EP0
+ *     controls
+ *   speed - The speed of the port USB_SPEED_LOW, _FULL, or _HIGH
+ *   maxpacketsize - The maximum number of bytes that can be sent to or
+ *    received from the endpoint in a single data packet
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   This function will *not* be called from an interrupt handler.
+ *
+ ************************************************************************************/
+
+static int stm32_ep0configure(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
+                              uint8_t funcaddr, uint8_t speed,
+                              uint16_t maxpacketsize)
+{
+  FAR struct stm32_usbhost_s *priv = (FAR struct stm32_usbhost_s *)drvr;
+  FAR struct stm32_ctrlinfo_s *ep0info = (FAR struct stm32_ctrlinfo_s *)ep0;
+  FAR struct stm32_chan_s *chan;
+
+  DEBUGASSERT(drvr != NULL && ep0info != NULL && funcaddr < 128 &&
+              maxpacketsize <= 64);
+
+  /* We must have exclusive access to the USB host hardware and state structures */
+
+  stm32_takesem(&priv->exclsem);
+
+  /* Configure the EP0 OUT channel */
+
+  chan            = &priv->chan[ep0info->outndx];
+  chan->funcaddr  = funcaddr;
+  chan->speed     = speed;
+  chan->maxpacket = maxpacketsize;
+
+  stm32_chan_configure(priv, ep0info->outndx);
+
+  /* Configure the EP0 IN channel */
+
+  chan            = &priv->chan[ep0info->inndx];
+  chan->funcaddr  = funcaddr;
+  chan->speed     = speed;
+  chan->maxpacket = maxpacketsize;
+
+  stm32_chan_configure(priv, ep0info->inndx);
+
+  stm32_givesem(&priv->exclsem);
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32_epalloc
+ *
+ * Description:
+ *   Allocate and configure one endpoint.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   epdesc - Describes the endpoint to be allocated.
+ *   ep - A memory location provided by the caller in which to receive the
+ *      allocated endpoint descriptor.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   This function will *not* be called from an interrupt handler.
+ *
+ ************************************************************************************/
+
+static int stm32_epalloc(FAR struct usbhost_driver_s *drvr,
+                         FAR const struct usbhost_epdesc_s *epdesc,
+                         FAR usbhost_ep_t *ep)
+{
+  FAR struct stm32_usbhost_s *priv = (FAR struct stm32_usbhost_s *)drvr;
+  int ret;
+
+  /* Sanity check.  NOTE that this method should only be called if a device is
+   * connected (because we need a valid low speed indication).
+   */
+
+  DEBUGASSERT(drvr != 0 && epdesc != NULL && ep != NULL);
+
+  /* We must have exclusive access to the USB host hardware and state structures */
+
+  stm32_takesem(&priv->exclsem);
+
+  /* Handler control pipes differently from other endpoint types.  This is
+   * because the normal, "transfer" endpoints are unidirectional an require
+   * only a single channel.  Control endpoints, however, are bi-diretional
+   * and require two channels, one for the IN and one for the OUT direction.
+   */
+
+  if (epdesc->xfrtype == OTG_EPTYPE_CTRL)
+    {
+      ret = stm32_ctrlep_alloc(priv, epdesc, ep);
+    }
+  else
+    {
+      ret = stm32_xfrep_alloc(priv, epdesc, ep);
+    }
+
+  stm32_givesem(&priv->exclsem);
+  return ret;
+}
+
+/************************************************************************************
+ * Name: stm32_epfree
+ *
+ * Description:
+ *   Free and endpoint previously allocated by DRVR_EPALLOC.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   ep - The endpoint to be freed.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   This function will *not* be called from an interrupt handler.
+ *
+ ************************************************************************************/
+
+static int stm32_epfree(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
+{
+  FAR struct stm32_usbhost_s *priv = (FAR struct stm32_usbhost_s *)drvr;
+
+  DEBUGASSERT(priv);
+
+  /* We must have exclusive access to the USB host hardware and state structures */
+
+  stm32_takesem(&priv->exclsem);
+
+  /* A single channel is represent by an index in the range of 0 to STM32_MAX_TX_FIFOS.
+   * Otherwise, the ep must be a pointer to an allocated control endpoint structure.
+   */
+
+  if ((uintptr_t)ep < STM32_MAX_TX_FIFOS)
+    {
+      /* Halt the channel and mark the channel available */
+
+      stm32_chan_free(priv, (int)ep);
+    }
+  else
+    {
+      /* Halt both control channel and mark the channels available */
+
+      FAR struct stm32_ctrlinfo_s *ctrlep = (FAR struct stm32_ctrlinfo_s *)ep;
+      stm32_chan_free(priv, ctrlep->inndx);
+      stm32_chan_free(priv, ctrlep->outndx);
+
+      /* And free the control endpoint container */
+
+      kmm_free(ctrlep);
+    }
+
+  stm32_givesem(&priv->exclsem);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_alloc
+ *
+ * Description:
+ *   Some hardware supports special memory in which request and descriptor data can
+ *   be accessed more efficiently.  This method provides a mechanism to allocate
+ *   the request/descriptor memory.  If the underlying hardware does not support
+ *   such "special" memory, this functions may simply map to kmm_malloc.
+ *
+ *   This interface was optimized under a particular assumption.  It was assumed
+ *   that the driver maintains a pool of small, pre-allocated buffers for descriptor
+ *   traffic.  NOTE that size is not an input, but an output:  The size of the
+ *   pre-allocated buffer is returned.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   buffer - The address of a memory location provided by the caller in which to
+ *     return the allocated buffer memory address.
+ *   maxlen - The address of a memory location provided by the caller in which to
+ *     return the maximum size of the allocated buffer memory.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   - Called from a single thread so no mutual exclusion is required.
+ *   - Never called from an interrupt handler.
+ *
+ ****************************************************************************/
+
+static int stm32_alloc(FAR struct usbhost_driver_s *drvr,
+                       FAR uint8_t **buffer, FAR size_t *maxlen)
+{
+  FAR uint8_t *alloc;
+
+  DEBUGASSERT(drvr && buffer && maxlen);
+
+  /* There is no special memory requirement for the STM32. */
+
+  alloc = (FAR uint8_t *)kmm_malloc(CONFIG_STM32F7_OTG_DESCSIZE);
+  if (!alloc)
+    {
+      return -ENOMEM;
+    }
+
+  /* Return the allocated address and size of the descriptor buffer */
+
+  *buffer = alloc;
+  *maxlen = CONFIG_STM32F7_OTG_DESCSIZE;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_free
+ *
+ * Description:
+ *   Some hardware supports special memory in which request and descriptor data can
+ *   be accessed more efficiently.  This method provides a mechanism to free that
+ *   request/descriptor memory.  If the underlying hardware does not support
+ *   such "special" memory, this functions may simply map to kmm_free().
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   buffer - The address of the allocated buffer memory to be freed.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   - Never called from an interrupt handler.
+ *
+ ****************************************************************************/
+
+static int stm32_free(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer)
+{
+  /* There is no special memory requirement */
+
+  DEBUGASSERT(drvr && buffer);
+  kmm_free(buffer);
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32_ioalloc
+ *
+ * Description:
+ *   Some hardware supports special memory in which larger IO buffers can
+ *   be accessed more efficiently.  This method provides a mechanism to allocate
+ *   the request/descriptor memory.  If the underlying hardware does not support
+ *   such "special" memory, this functions may simply map to kmm_malloc.
+ *
+ *   This interface differs from DRVR_ALLOC in that the buffers are variable-sized.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   buffer - The address of a memory location provided by the caller in which to
+ *     return the allocated buffer memory address.
+ *   buflen - The size of the buffer required.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   This function will *not* be called from an interrupt handler.
+ *
+ ************************************************************************************/
+
+static int stm32_ioalloc(FAR struct usbhost_driver_s *drvr,
+                         FAR uint8_t **buffer, size_t buflen)
+{
+  FAR uint8_t *alloc;
+
+  DEBUGASSERT(drvr && buffer && buflen > 0);
+
+  /* There is no special memory requirement */
+
+  alloc = (FAR uint8_t *)kmm_malloc(buflen);
+  if (!alloc)
+    {
+      return -ENOMEM;
+    }
+
+  /* Return the allocated buffer */
+
+  *buffer = alloc;
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32_iofree
+ *
+ * Description:
+ *   Some hardware supports special memory in which IO data can  be accessed more
+ *   efficiently.  This method provides a mechanism to free that IO buffer
+ *   memory.  If the underlying hardware does not support such "special" memory,
+ *   this functions may simply map to kmm_free().
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   buffer - The address of the allocated buffer memory to be freed.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   This function will *not* be called from an interrupt handler.
+ *
+ ************************************************************************************/
+
+static int stm32_iofree(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer)
+{
+  /* There is no special memory requirement */
+
+  DEBUGASSERT(drvr && buffer);
+  kmm_free(buffer);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_ctrlin and stm32_ctrlout
+ *
+ * Description:
+ *   Process a IN or OUT request on the control endpoint.  These methods
+ *   will enqueue the request and wait for it to complete.  Only one transfer may be
+ *   queued; Neither these methods nor the transfer() method can be called again
+ *   until the control transfer functions returns.
+ *
+ *   These are blocking methods; these functions will not return until the
+ *   control transfer has completed.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   ep0 - The control endpoint to send/receive the control request.
+ *   req - Describes the request to be sent.  This request must lie in memory
+ *      created by DRVR_ALLOC.
+ *   buffer - A buffer used for sending the request and for returning any
+ *     responses.  This buffer must be large enough to hold the length value
+ *     in the request description. buffer must have been allocated using DRVR_ALLOC.
+ *
+ *   NOTE: On an IN transaction, req and buffer may refer to the same allocated
+ *   memory.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   - Called from a single thread so no mutual exclusion is required.
+ *   - Never called from an interrupt handler.
+ *
+ ****************************************************************************/
+
+static int stm32_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
+                        FAR const struct usb_ctrlreq_s *req,
+                        FAR uint8_t *buffer)
+{
+  FAR struct stm32_usbhost_s *priv = (FAR struct stm32_usbhost_s *)drvr;
+  FAR struct stm32_ctrlinfo_s *ep0info = (FAR struct stm32_ctrlinfo_s *)ep0;
+  uint16_t buflen;
+  systime_t start;
+  systime_t elapsed;
+  int retries;
+  int ret;
+
+  DEBUGASSERT(priv != NULL && ep0info != NULL && req != NULL);
+  usbhost_vtrace2(OTG_VTRACE2_CTRLIN, req->type, req->req);
+  uinfo("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
+        req->type, req->req, req->value[1], req->value[0],
+        req->index[1], req->index[0], req->len[1], req->len[0]);
+
+  /* Extract values from the request */
+
+  buflen = stm32_getle16(req->len);
+
+  /* We must have exclusive access to the USB host hardware and state structures */
+
+  stm32_takesem(&priv->exclsem);
+
+  /* Loop, retrying until the retry time expires */
+
+  for (retries = 0; retries < STM32_RETRY_COUNT; retries++)
+    {
+      /* Send the SETUP request */
+
+      ret = stm32_ctrl_sendsetup(priv, ep0info, req);
+      if (ret < 0)
+        {
+          usbhost_trace1(OTG_TRACE1_SENDSETUP, -ret);
+          continue;
+        }
+
+      /* Get the start time.  Loop again until the timeout expires */
+
+      start = clock_systimer();
+      do
+        {
+          /* Handle the IN data phase (if any) */
+
+          if (buflen > 0)
+            {
+              ret = stm32_ctrl_recvdata(priv, ep0info, buffer, buflen);
+              if (ret < 0)
+                {
+                  usbhost_trace1(OTG_TRACE1_RECVDATA, -ret);
+                }
+            }
+
+          /* Handle the status OUT phase */
+
+          if (ret == OK)
+            {
+              priv->chan[ep0info->outndx].outdata1 ^= true;
+              ret = stm32_ctrl_senddata(priv, ep0info, NULL, 0);
+              if (ret == OK)
+                {
+                  /* All success transactions exit here */
+
+                  stm32_givesem(&priv->exclsem);
+                  return OK;
+                }
+
+              usbhost_trace1(OTG_TRACE1_SENDDATA, ret < 0 ? -ret : ret);
+            }
+
+          /* Get the elapsed time (in frames) */
+
+          elapsed = clock_systimer() - start;
+        }
+      while (elapsed < STM32_DATANAK_DELAY);
+    }
+
+  /* All failures exit here after all retries and timeouts have been exhausted */
+
+  stm32_givesem(&priv->exclsem);
+  return -ETIMEDOUT;
+}
+
+static int stm32_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
+                         FAR const struct usb_ctrlreq_s *req,
+                         FAR const uint8_t *buffer)
+{
+  FAR struct stm32_usbhost_s *priv = (FAR struct stm32_usbhost_s *)drvr;
+  FAR struct stm32_ctrlinfo_s *ep0info = (FAR struct stm32_ctrlinfo_s *)ep0;
+  uint16_t buflen;
+  systime_t start;
+  systime_t elapsed;
+  int retries;
+  int ret;
+
+  DEBUGASSERT(priv != NULL && ep0info != NULL && req != NULL);
+  usbhost_vtrace2(OTG_VTRACE2_CTRLOUT, req->type, req->req);
+  uinfo("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
+        req->type, req->req, req->value[1], req->value[0],
+        req->index[1], req->index[0], req->len[1], req->len[0]);
+
+  /* Extract values from the request */
+
+  buflen = stm32_getle16(req->len);
+
+  /* We must have exclusive access to the USB host hardware and state structures */
+
+  stm32_takesem(&priv->exclsem);
+
+  /* Loop, retrying until the retry time expires */
+
+  for (retries = 0; retries < STM32_RETRY_COUNT; retries++)
+    {
+      /* Send the SETUP request */
+
+      ret = stm32_ctrl_sendsetup(priv, ep0info, req);
+      if (ret < 0)
+        {
+          usbhost_trace1(OTG_TRACE1_SENDSETUP, -ret);
+          continue;
+        }
+
+      /* Get the start time.  Loop again until the timeout expires */
+
+      start = clock_systimer();
+      do
+        {
+          /* Handle the data OUT phase (if any) */
+
+          if (buflen > 0)
+            {
+              /* Start DATA out transfer (only one DATA packet) */
+
+              priv->chan[ep0info->outndx].outdata1 = true;
+              ret = stm32_ctrl_senddata(priv, ep0info, NULL, 0);
+              if (ret < 0)
+                {
+                  usbhost_trace1(OTG_TRACE1_SENDDATA, -ret);
+                }
+            }
+
+          /* Handle the status IN phase */
+
+          if (ret == OK)
+            {
+              ret = stm32_ctrl_recvdata(priv, ep0info, NULL, 0);
+              if (ret == OK)
+                {
+                  /* All success transactins exit here */
+
+                  stm32_givesem(&priv->exclsem);
+                  return OK;
+                }
+
+              usbhost_trace1(OTG_TRACE1_RECVDATA, ret < 0 ? -ret : ret);
+            }
+
+          /* Get the elapsed time (in frames) */
+
+          elapsed = clock_systimer() - start;
+        }
+      while (elapsed < STM32_DATANAK_DELAY);
+    }
+
+  /* All failures exit here after all retries and timeouts have been exhausted */
+
+  stm32_givesem(&priv->exclsem);
+  return -ETIMEDOUT;
+}
+
+/****************************************************************************
+ * Name: stm32_transfer
+ *
+ * Description:
+ *   Process a request to handle a transfer descriptor.  This method will
+ *   enqueue the transfer request, blocking until the transfer completes. Only
+ *   one transfer may be  queued; Neither this method nor the ctrlin or
+ *   ctrlout methods can be called again until this function returns.
+ *
+ *   This is a blocking method; this functions will not return until the
+ *   transfer has completed.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   ep - The IN or OUT endpoint descriptor for the device endpoint on which to
+ *      perform the transfer.
+ *   buffer - A buffer containing the data to be sent (OUT endpoint) or received
+ *     (IN endpoint).  buffer must have been allocated using DRVR_ALLOC
+ *   buflen - The length of the data to be sent or received.
+ *
+ * Returned Values:
+ *   On success, a non-negative value is returned that indicates the number
+ *   of bytes successfully transferred.  On a failure, a negated errno value is
+ *   returned that indicates the nature of the failure:
+ *
+ *     EAGAIN - If devices NAKs the transfer (or NYET or other error where
+ *              it may be appropriate to restart the entire transaction).
+ *     EPERM  - If the endpoint stalls
+ *     EIO    - On a TX or data toggle error
+ *     EPIPE  - Overrun errors
+ *
+ * Assumptions:
+ *   - Called from a single thread so no mutual exclusion is required.
+ *   - Never called from an interrupt handler.
+ *
+ ****************************************************************************/
+
+static ssize_t stm32_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep,
+                              FAR uint8_t *buffer, size_t buflen)
+{
+  FAR struct stm32_usbhost_s *priv  = (FAR struct stm32_usbhost_s *)drvr;
+  unsigned int chidx = (unsigned int)ep;
+  ssize_t nbytes;
+
+  uinfo("chidx: %d buflen: %d\n",  (unsigned int)ep, buflen);
+
+  DEBUGASSERT(priv && buffer && chidx < STM32_MAX_TX_FIFOS && buflen > 0);
+
+  /* We must have exclusive access to the USB host hardware and state structures */
+
+  stm32_takesem(&priv->exclsem);
+
+  /* Handle IN and OUT transfer slightly differently */
+
+  if (priv->chan[chidx].in)
+    {
+      nbytes = stm32_in_transfer(priv, chidx, buffer, buflen);
+    }
+  else
+    {
+      nbytes = stm32_out_transfer(priv, chidx, buffer, buflen);
+    }
+
+  stm32_givesem(&priv->exclsem);
+  return nbytes;
+}
+
+/****************************************************************************
+ * Name: stm32_asynch
+ *
+ * Description:
+ *   Process a request to handle a transfer descriptor.  This method will
+ *   enqueue the transfer request and return immediately.  When the transfer
+ *   completes, the the callback will be invoked with the provided transfer.
+ *   This method is useful for receiving interrupt transfers which may come
+ *   infrequently.
+ *
+ *   Only one transfer may be queued; Neither this method nor the ctrlin or
+ *   ctrlout methods can be called again until the transfer completes.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   ep - The IN or OUT endpoint descriptor for the device endpoint on which to
+ *      perform the transfer.
+ *   buffer - A buffer containing the data to be sent (OUT endpoint) or received
+ *     (IN endpoint).  buffer must have been allocated using DRVR_ALLOC
+ *   buflen - The length of the data to be sent or received.
+ *   callback - This function will be called when the transfer completes.
+ *   arg - The arbitrary parameter that will be passed to the callback function
+ *     when the transfer completes.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   - Called from a single thread so no mutual exclusion is required.
+ *   - Never called from an interrupt handler.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBHOST_ASYNCH
+static int stm32_asynch(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep,
+                        FAR uint8_t *buffer, size_t buflen,
+                        usbhost_asynch_t callback, FAR void *arg)
+{
+  FAR struct stm32_usbhost_s *priv  = (FAR struct stm32_usbhost_s *)drvr;
+  unsigned int chidx = (unsigned int)ep;
+  int ret;
+
+  uinfo("chidx: %d buflen: %d\n",  (unsigned int)ep, buflen);
+
+  DEBUGASSERT(priv && buffer && chidx < STM32_MAX_TX_FIFOS && buflen > 0);
+
+  /* We must have exclusive access to the USB host hardware and state structures */
+
+  stm32_takesem(&priv->exclsem);
+
+  /* Handle IN and OUT transfer slightly differently */
+
+  if (priv->chan[chidx].in)
+    {
+      ret = stm32_in_asynch(priv, chidx, buffer, buflen, callback, arg);
+    }
+  else
+    {
+      ret = stm32_out_asynch(priv, chidx, buffer, buflen, callback, arg);
+    }
+
+  stm32_givesem(&priv->exclsem);
+  return ret;
+}
+#endif /* CONFIG_USBHOST_ASYNCH */
+
+/************************************************************************************
+ * Name: stm32_cancel
+ *
+ * Description:
+ *   Cancel a pending transfer on an endpoint.  Cancelled synchronous or
+ *   asynchronous transfer will complete normally with the error -ESHUTDOWN.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   ep - The IN or OUT endpoint descriptor for the device endpoint on which an
+ *      asynchronous transfer should be transferred.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure.
+ *
+ ************************************************************************************/
+
+static int stm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
+{
+  FAR struct stm32_usbhost_s *priv  = (FAR struct stm32_usbhost_s *)drvr;
+  FAR struct stm32_chan_s *chan;
+  unsigned int chidx = (unsigned int)ep;
+  irqstate_t flags;
+
+  uinfo("chidx: %u: %d\n",  chidx);
+
+  DEBUGASSERT(priv && chidx < STM32_MAX_TX_FIFOS);
+  chan = &priv->chan[chidx];
+
+  /* We need to disable interrupts to avoid race conditions with the asynchronous
+   * completion of the transfer being cancelled.
+   */
+
+  flags = enter_critical_section();
+
+  /* Halt the channel */
+
+  stm32_chan_halt(priv, chidx, CHREASON_CANCELLED);
+  chan->result = -ESHUTDOWN;
+
+  /* Is there a thread waiting for this transfer to complete? */
+
+  if (chan->waiter)
+    {
+#ifdef CONFIG_USBHOST_ASYNCH
+      /* Yes.. there should not also be a callback scheduled */
+
+      DEBUGASSERT(chan->callback == NULL);
+#endif
+
+      /* Wake'em up! */
+
+      stm32_givesem(&chan->waitsem);
+      chan->waiter = false;
+    }
+
+#ifdef CONFIG_USBHOST_ASYNCH
+  /* No.. is an asynchronous callback expected when the transfer
+   * completes?
+   */
+
+  else if (chan->callback)
+    {
+      usbhost_asynch_t callback;
+      FAR void *arg;
+
+      /* Extract the callback information */
+
+      callback       = chan->callback;
+      arg            = chan->arg;
+
+      chan->callback = NULL;
+      chan->arg      = NULL;
+      chan->xfrd     = 0;
+
+      /* Then perform the callback */
+
+      callback(arg, -ESHUTDOWN);
+    }
+#endif
+
+  leave_critical_section(flags);
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32_connect
+ *
+ * Description:
+ *   New connections may be detected by an attached hub.  This method is the
+ *   mechanism that is used by the hub class to introduce a new connection
+ *   and port description to the system.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   hport - The descriptor of the hub port that detected the connection
+ *      related event
+ *   connected - True: device connected; false: device disconnected
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_USBHOST_HUB
+static int stm32_connect(FAR struct usbhost_driver_s *drvr,
+                         FAR struct usbhost_hubport_s *hport,
+                         bool connected)
+{
+  FAR struct stm32_usbhost_s *priv = (FAR struct stm32_usbhost_s *)drvr;
+  irqstate_t flags;
+
+  DEBUGASSERT(priv != NULL && hport != NULL);
+
+  /* Set the connected/disconnected flag */
+
+  hport->connected = connected;
+  uinfo("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
+
+  /* Report the connection event */
+
+  flags = enter_critical_section();
+  priv->hport = hport;
+  if (priv->pscwait)
+    {
+      priv->pscwait = false;
+      stm32_givesem(&priv->pscsem);
+    }
+
+  leave_critical_section(flags);
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_disconnect
+ *
+ * Description:
+ *   Called by the class when an error occurs and driver has been disconnected.
+ *   The USB host driver should discard the handle to the class instance (it is
+ *   stale) and not attempt any further interaction with the class driver instance
+ *   (until a new instance is received from the create() method).  The driver
+ *   should not called the class' disconnected() method.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   hport - The port from which the device is being disconnected.  Might be a port
+ *      on a hub.
+ *
+ * Returned Values:
+ *   None
+ *
+ * Assumptions:
+ *   - Only a single class bound to a single device is supported.
+ *   - Never called from an interrupt handler.
+ *
+ ****************************************************************************/
+
+static void stm32_disconnect(FAR struct usbhost_driver_s *drvr,
+                             FAR struct usbhost_hubport_s *hport)
+{
+  DEBUGASSERT(hport != NULL);
+  hport->devclass = NULL;
+}
+
+/****************************************************************************
+ * Initialization
+ ****************************************************************************/
+/****************************************************************************
+ * Name: stm32_portreset
+ *
+ * Description:
+ *   Reset the USB host port.
+ *
+ *   NOTE: "Before starting to drive a USB reset, the application waits for the
+ *   OTG interrupt triggered by the debounce done bit (DBCDNE bit in
+ *   OTG_FS_GOTGINT), which indicates that the bus is stable again after the
+ *   electrical debounce caused by the attachment of a pull-up resistor on DP
+ *   (FS) or DM (LS).
+ *
+ * Input Parameters:
+ *   priv -- USB host driver private data structure.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void stm32_portreset(FAR struct stm32_usbhost_s *priv)
+{
+  uint32_t regval;
+
+  regval  = stm32_getreg(STM32_OTG_HPRT);
+  regval &= ~(OTG_HPRT_PENA | OTG_HPRT_PCDET | OTG_HPRT_PENCHNG |
+              OTG_HPRT_POCCHNG);
+  regval |= OTG_HPRT_PRST;
+  stm32_putreg(STM32_OTG_HPRT, regval);
+
+  up_mdelay(20);
+
+  regval &= ~OTG_HPRT_PRST;
+  stm32_putreg(STM32_OTG_HPRT, regval);
+
+  up_mdelay(20);
+}
+
+/****************************************************************************
+ * Name: stm32_flush_txfifos
+ *
+ * Description:
+ *   Flush the selected Tx FIFO.
+ *
+ * Input Parameters:
+ *   txfnum -- USB host driver private data structure.
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+static void stm32_flush_txfifos(uint32_t txfnum)
+{
+  uint32_t regval;
+  uint32_t timeout;
+
+  /* Initiate the TX FIFO flush operation */
+
+  regval = OTG_GRSTCTL_TXFFLSH | txfnum;
+  stm32_putreg(STM32_OTG_GRSTCTL, regval);
+
+  /* Wait for the FLUSH to complete */
+
+  for (timeout = 0; timeout < STM32_FLUSH_DELAY; timeout++)
+    {
+      regval = stm32_getreg(STM32_OTG_GRSTCTL);
+      if ((regval & OTG_GRSTCTL_TXFFLSH) == 0)
+        {
+          break;
+        }
+    }
+
+  /* Wait for 3 PHY Clocks */
+
+  up_udelay(3);
+}
+
+/****************************************************************************
+ * Name: stm32_flush_rxfifo
+ *
+ * Description:
+ *   Flush the Rx FIFO.
+ *
+ * Input Parameters:
+ *   priv -- USB host driver private data structure.
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+static void stm32_flush_rxfifo(void)
+{
+  uint32_t regval;
+  uint32_t timeout;
+
+  /* Initiate the RX FIFO flush operation */
+
+  stm32_putreg(STM32_OTG_GRSTCTL, OTG_GRSTCTL_RXFFLSH);
+
+  /* Wait for the FLUSH to complete */
+
+  for (timeout = 0; timeout < STM32_FLUSH_DELAY; timeout++)
+    {
+      regval = stm32_getreg(STM32_OTG_GRSTCTL);
+      if ((regval & OTG_GRSTCTL_RXFFLSH) == 0)
+        {
+          break;
+        }
+    }
+
+  /* Wait for 3 PHY Clocks */
+
+  up_udelay(3);
+}
+
+/****************************************************************************
+ * Name: stm32_vbusdrive
+ *
+ * Description:
+ *   Drive the Vbus +5V.
+ *
+ * Input Parameters:
+ *   priv  - USB host driver private data structure.
+ *   state - True: Drive, False: Don't drive
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+static void stm32_vbusdrive(FAR struct stm32_usbhost_s *priv, bool state)
+{
+  uint32_t regval;
+
+  /* Enable/disable the external charge pump */
+
+  stm32_usbhost_vbusdrive(0, state);
+
+  /* Turn on the Host port power. */
+
+  regval = stm32_getreg(STM32_OTG_HPRT);
+  regval &= ~(OTG_HPRT_PENA | OTG_HPRT_PCDET | OTG_HPRT_PENCHNG |
+              OTG_HPRT_POCCHNG);
+
+  if (((regval & OTG_HPRT_PPWR) == 0) && state)
+    {
+      regval |= OTG_HPRT_PPWR;
+      stm32_putreg(STM32_OTG_HPRT, regval);
+    }
+
+  if (((regval & OTG_HPRT_PPWR) != 0) && !state)
+    {
+      regval &= ~OTG_HPRT_PPWR;
+      stm32_putreg(STM32_OTG_HPRT, regval);
+    }
+
+  up_mdelay(200);
+}
+
+/****************************************************************************
+ * Name: stm32_host_initialize
+ *
+ * Description:
+ *   Initialize/re-initialize hardware for host mode operation.  At present,
+ *   this function is called only from stm32_hw_initialize().  But if OTG mode
+ *   were supported, this function would also be called to swtich between
+ *   host and device modes on a connector ID change interrupt.
+ *
+ * Input Parameters:
+ *   priv -- USB host driver private data structure.
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+static void stm32_host_initialize(FAR struct stm32_usbhost_s *priv)
+{
+  uint32_t regval;
+  uint32_t offset;
+  int i;
+
+  /* Restart the PHY Clock */
+
+  stm32_putreg(STM32_OTG_PCGCCTL, 0);
+
+  /* Initialize Host Configuration (HCFG) register */
+
+  regval  = stm32_getreg(STM32_OTG_HCFG);
+  regval &= ~OTG_HCFG_FSLSPCS_MASK;
+  regval |= OTG_HCFG_FSLSPCS_FS48MHz;
+  stm32_putreg(STM32_OTG_HCFG, regval);
+
+  /* Reset the host port */
+
+  stm32_portreset(priv);
+
+  /* Clear the FS-/LS-only support bit in the HCFG register */
+
+  regval = stm32_getreg(STM32_OTG_HCFG);
+  regval &= ~OTG_HCFG_FSLSS;
+  stm32_putreg(STM32_OTG_HCFG, regval);
+
+  /* Carve up FIFO memory for the Rx FIFO and the periodic and non-periodic Tx FIFOs */
+  /* Configure Rx FIFO size (GRXFSIZ) */
+
+  stm32_putreg(STM32_OTG_GRXFSIZ, CONFIG_STM32F7_OTG_RXFIFO_SIZE);
+  offset = CONFIG_STM32F7_OTG_RXFIFO_SIZE;
+
+  /* Setup the host non-periodic Tx FIFO size (HNPTXFSIZ) */
+
+  regval = (offset | (CONFIG_STM32F7_OTG_NPTXFIFO_SIZE << OTG_HNPTXFSIZ_NPTXFD_SHIFT));
+  stm32_putreg(STM32_OTG_HNPTXFSIZ, regval);
+  offset += CONFIG_STM32F7_OTG_NPTXFIFO_SIZE;
+
+  /* Set up the host periodic Tx fifo size register (HPTXFSIZ) */
+
+  regval = (offset | (CONFIG_STM32F7_OTG_PTXFIFO_SIZE << OTG_HPTXFSIZ_PTXFD_SHIFT));
+  stm32_putreg(STM32_OTG_HPTXFSIZ, regval);
+
+  /* If OTG were supported, we sould need to clear HNP enable bit in the
+   * USB_OTG control register about here.
+   */
+
+  /* Flush all FIFOs */
+
+  stm32_flush_txfifos(OTG_GRSTCTL_TXFNUM_HALL);
+  stm32_flush_rxfifo();
+
+  /* Clear all pending HC Interrupts */
+
+  for (i = 0; i < STM32_NHOST_CHANNELS; i++)
+    {
+      stm32_putreg(STM32_OTG_HCINT(i), 0xffffffff);
+      stm32_putreg(STM32_OTG_HCINTMSK(i), 0);
+    }
+
+  /* Driver Vbus +5V (the smoke test).  Should be done elsewhere in OTG
+   * mode.
+   */
+
+  stm32_vbusdrive(priv, true);
+
+  /* Enable host interrupts */
+
+  stm32_hostinit_enable();
+}
+
+/****************************************************************************
+ * Name: stm32_sw_initialize
+ *
+ * Description:
+ *   One-time setup of the host driver state structure.
+ *
+ * Input Parameters:
+ *   priv -- USB host driver private data structure.
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+static inline void stm32_sw_initialize(FAR struct stm32_usbhost_s *priv)
+{
+  FAR struct usbhost_driver_s *drvr;
+  FAR struct usbhost_hubport_s *hport;
+  int i;
+
+  /* Initialize the device operations */
+
+  drvr                 = &priv->drvr;
+  drvr->ep0configure   = stm32_ep0configure;
+  drvr->epalloc        = stm32_epalloc;
+  drvr->epfree         = stm32_epfree;
+  drvr->alloc          = stm32_alloc;
+  drvr->free           = stm32_free;
+  drvr->ioalloc        = stm32_ioalloc;
+  drvr->iofree         = stm32_iofree;
+  drvr->ctrlin         = stm32_ctrlin;
+  drvr->ctrlout        = stm32_ctrlout;
+  drvr->transfer       = stm32_transfer;
+#ifdef CONFIG_USBHOST_ASYNCH
+  drvr->asynch         = stm32_asynch;
+#endif
+  drvr->cancel         = stm32_cancel;
+#ifdef CONFIG_USBHOST_HUB
+  drvr->connect        = stm32_connect;
+#endif
+  drvr->disconnect     = stm32_disconnect;
+
+  /* Initialize the public port representation */
+
+  hport                = &priv->rhport.hport;
+  hport->drvr          = drvr;
+#ifdef CONFIG_USBHOST_HUB
+  hport->parent        = NULL;
+#endif
+  hport->ep0           = (usbhost_ep_t)&priv->ep0;
+  hport->speed         = USB_SPEED_FULL;
+
+  /* Initialize function address generation logic */
+
+  usbhost_devaddr_initialize(&priv->rhport);
+
+  /* Initialize semaphores */
+
+  sem_init(&priv->pscsem,  0, 0);
+  sem_init(&priv->exclsem, 0, 1);
+
+  /* The pscsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+ sem_setprotocol(&priv->pscsem, SEM_PRIO_NONE);
+
+  /* Initialize the driver state data */
+
+  priv->smstate   = SMSTATE_DETACHED;
+  priv->connected = false;
+  priv->change    = false;
+
+  /* Put all of the channels back in their initial, allocated state */
+
+  memset(priv->chan, 0, STM32_MAX_TX_FIFOS * sizeof(struct stm32_chan_s));
+
+  /* Initialize each channel */
+
+  for (i = 0; i < STM32_MAX_TX_FIFOS; i++)
+    {
+      FAR struct stm32_chan_s *chan = &priv->chan[i];
+
+      chan->chidx = i;
+
+      /* The waitsem semaphore is used for signaling and, hence, should not
+       * have priority inheritance enabled.
+       */
+
+      sem_init(&chan->waitsem,  0, 0);
+      sem_setprotocol(&chan->waitsem, SEM_PRIO_NONE);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_hw_initialize
+ *
+ * Description:
+ *   One-time setup of the host controller harware for normal operations.
+ *
+ * Input Parameters:
+ *   priv -- USB host driver private data structure.
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+static inline int stm32_hw_initialize(FAR struct stm32_usbhost_s *priv)
+{
+  uint32_t regval;
+  unsigned long timeout;
+
+  /* Set the PHYSEL bit in the GUSBCFG register to select the OTG FS serial
+   * transceiver: "This bit is always 1 with write-only access"
+   */
+
+  regval = stm32_getreg(STM32_OTG_GUSBCFG);
+  regval |= OTG_GUSBCFG_PHYSEL;
+  stm32_putreg(STM32_OTG_GUSBCFG, regval);
+
+  /* Reset after a PHY select and set Host mode.  First, wait for AHB master
+   * IDLE state.
+   */
+
+  for (timeout = 0; timeout < STM32_READY_DELAY; timeout++)
+    {
+      up_udelay(3);
+      regval = stm32_getreg(STM32_OTG_GRSTCTL);
+      if ((regval & OTG_GRSTCTL_AHBIDL) != 0)
+        {
+          break;
+        }
+    }
+
+  /* Then perform the core soft reset. */
+
+  stm32_putreg(STM32_OTG_GRSTCTL, OTG_GRSTCTL_CSRST);
+  for (timeout = 0; timeout < STM32_READY_DELAY; timeout++)
+    {
+      regval = stm32_getreg(STM32_OTG_GRSTCTL);
+      if ((regval & OTG_GRSTCTL_CSRST) == 0)
+        {
+          break;
+        }
+    }
+
+  /* Wait for 3 PHY Clocks */
+
+  up_udelay(3);
+
+  /* Deactivate the power down */
+
+  regval  = (OTG_GCCFG_PWRDWN | OTG_GCCFG_VBUSASEN | OTG_GCCFG_VBUSBSEN);
+#ifndef CONFIG_USBDEV_VBUSSENSING
+  regval |= OTG_GCCFG_NOVBUSSENS;
+#endif
+#ifdef CONFIG_STM32F7_OTG_SOFOUTPUT
+  regval |= OTG_GCCFG_SOFOUTEN;
+#endif
+  stm32_putreg(STM32_OTG_GCCFG, regval);
+  up_mdelay(20);
+
+  /* Initialize OTG features:  In order to support OTP, the HNPCAP and SRPCAP
+   * bits would need to be set in the GUSBCFG register about here.
+   */
+
+  /* Force Host Mode */
+
+  regval  = stm32_getreg(STM32_OTG_GUSBCFG);
+  regval &= ~OTG_GUSBCFG_FDMOD;
+  regval |= OTG_GUSBCFG_FHMOD;
+  stm32_putreg(STM32_OTG_GUSBCFG, regval);
+  up_mdelay(50);
+
+  /* Initialize host mode and return success */
+
+  stm32_host_initialize(priv);
+  return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_otgfshost_initialize
+ *
+ * Description:
+ *   Initialize USB host device controller hardware.
+ *
+ * Input Parameters:
+ *   controller -- If the device supports more than USB host controller, then
+ *     this identifies which controller is being initialized.  Normally, this
+ *     is just zero.
+ *
+ * Returned Value:
+ *   And instance of the USB host interface.  The controlling task should
+ *   use this interface to (1) call the wait() method to wait for a device
+ *   to be connected, and (2) call the enumerate() method to bind the device
+ *   to a class driver.
+ *
+ * Assumptions:
+ * - This function should called in the initialization sequence in order
+ *   to initialize the USB device functionality.
+ * - Class drivers should be initialized prior to calling this function.
+ *   Otherwise, there is a race condition if the device is already connected.
+ *
+ ****************************************************************************/
+
+FAR struct usbhost_connection_s *stm32_otgfshost_initialize(int controller)
+{
+  /* At present, there is only support for a single OTG FS host. Hence it is
+   * pre-allocated as g_usbhost.  However, in most code, the private data
+   * structure will be referenced using the 'priv' pointer (rather than the
+   * global data) in order to simplify any future support for multiple devices.
+   */
+
+  FAR struct stm32_usbhost_s *priv = &g_usbhost;
+
+  /* Sanity checks */
+
+  DEBUGASSERT(controller == 0);
+
+  /* Make sure that interrupts from the OTG FS core are disabled */
+
+  stm32_gint_disable();
+
+  /* Reset the state of the host driver */
+
+  stm32_sw_initialize(priv);
+
+  /* Alternate function pin configuration.  Here we assume that:
+   *
+   * 1. GPIOA, SYSCFG, and OTG FS peripheral clocking have already been\
+   *    enabled as part of the boot sequence.
+   * 2. Board-specific logic has already enabled other board specific GPIOs
+   *    for things like soft pull-up, VBUS sensing, power controls, and over-
+   *    current detection.
+   */
+
+  /* Configure OTG FS alternate function pins for DM, DP, ID, and SOF.
+   *
+   * PIN* SIGNAL      DIRECTION
+   * ---- ----------- ----------
+   * PA8  OTG_FS_SOF  SOF clock output
+   * PA9  OTG_FS_VBUS VBUS input for device, Driven by external regulator by
+   *                  host (not an alternate function)
+   * PA10 OTG_FS_ID   OTG ID pin (only needed in Dual mode)
+   * PA11 OTG_FS_DM   D- I/O
+   * PA12 OTG_FS_DP   D+ I/O
+   *
+   * *Pins may vary from device-to-device.
+   */
+
+  stm32_configgpio(GPIO_OTG_DM);
+  stm32_configgpio(GPIO_OTG_DP);
+  stm32_configgpio(GPIO_OTG_ID);    /* Only needed for OTG */
+
+  /* SOF output pin configuration is configurable */
+
+#ifdef CONFIG_STM32F7_OTG_SOFOUTPUT
+  stm32_configgpio(GPIO_OTG_SOF);
+#endif
+
+  /* Initialize the USB OTG FS core */
+
+  stm32_hw_initialize(priv);
+
+  /* Attach USB host controller interrupt handler */
+
+  if (irq_attach(STM32_IRQ_OTGFS, stm32_gint_isr, NULL) != 0)
+    {
+      usbhost_trace1(OTG_TRACE1_IRQATTACH, 0);
+      return NULL;
+    }
+
+  /* Enable USB OTG FS global interrupts */
+
+  stm32_gint_enable();
+
+  /* Enable interrupts at the interrupt controller */
+
+  up_enable_irq(STM32_IRQ_OTGFS);
+  return &g_usbconn;
+}
+
+#endif /* CONFIG_USBHOST && CONFIG_STM32F7_OTGFS */
diff --git a/arch/arm/src/stm32f7/stm32_procfs_dtcm.c b/arch/arm/src/stm32f7/stm32_procfs_dtcm.c
index af6f467fef5cba94bea1fc75d50833e4a0249b80..30c54f2387dd8e35ac507b0394b1069e6c6ff7b3 100644
--- a/arch/arm/src/stm32f7/stm32_procfs_dtcm.c
+++ b/arch/arm/src/stm32f7/stm32_procfs_dtcm.c
@@ -147,7 +147,7 @@ static int dtcm_open(FAR struct file *filep, FAR const char *relpath,
 {
   FAR struct dtcm_file_s *priv;
 
-  fvdbg("Open '%s'\n", relpath);
+  finfo("Open '%s'\n", relpath);
 
   /* PROCFS is read-only.  Any attempt to open with any kind of write
    * access is not permitted.
@@ -157,7 +157,7 @@ static int dtcm_open(FAR struct file *filep, FAR const char *relpath,
 
   if ((oflags & O_WRONLY) != 0 || (oflags & O_RDONLY) == 0)
     {
-      fdbg("ERROR: Only O_RDONLY supported\n");
+      ferr("ERROR: Only O_RDONLY supported\n");
       return -EACCES;
     }
 
@@ -165,7 +165,7 @@ static int dtcm_open(FAR struct file *filep, FAR const char *relpath,
 
   if (strcmp(relpath, "dtcm") != 0)
     {
-      fdbg("ERROR: relpath is '%s'\n", relpath);
+      ferr("ERROR: relpath is '%s'\n", relpath);
       return -ENOENT;
     }
 
@@ -174,7 +174,7 @@ static int dtcm_open(FAR struct file *filep, FAR const char *relpath,
   priv = (FAR struct dtcm_file_s *)kmm_zalloc(sizeof(struct dtcm_file_s));
   if (!priv)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
@@ -219,7 +219,7 @@ static ssize_t dtcm_read(FAR struct file *filep, FAR char *buffer,
   struct mallinfo mem;
   off_t offset = filep->f_pos;
 
-  fvdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+  finfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
 
   /* Recover our private data from the struct file instance */
 
@@ -278,7 +278,7 @@ static int dtcm_dup(FAR const struct file *oldp, FAR struct file *newp)
   FAR struct dtcm_file_s *oldpriv;
   FAR struct dtcm_file_s *newpriv;
 
-  fvdbg("Dup %p->%p\n", oldp, newp);
+  finfo("Dup %p->%p\n", oldp, newp);
 
   /* Recover our private data from the old struct file instance */
 
@@ -290,7 +290,7 @@ static int dtcm_dup(FAR const struct file *oldp, FAR struct file *newp)
   newpriv = (FAR struct dtcm_file_s *)kmm_zalloc(sizeof(struct dtcm_file_s));
   if (!newpriv)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
@@ -308,7 +308,7 @@ static int dtcm_stat(const char *relpath, struct stat *buf)
 {
   if (strcmp(relpath, "dtcm") != 0)
     {
-      fdbg("ERROR: relpath is '%s'\n", relpath);
+      ferr("ERROR: relpath is '%s'\n", relpath);
       return -ENOENT;
     }
 
diff --git a/arch/arm/src/stm32f7/stm32_pwr.c b/arch/arm/src/stm32f7/stm32_pwr.c
new file mode 100644
index 0000000000000000000000000000000000000000..c9d2d5dae44159523fb02e629f6873d56350c284
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_pwr.c
@@ -0,0 +1,322 @@
+/************************************************************************************
+ * arch/arm/src/stm32f7/stm32_pwr.c
+ *
+ *   Copyright (C) 2011 Uros Platise. All rights reserved.
+ *   Copyright (C) 2013, 2015, 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Uros Platise 
+ *            Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "up_arch.h"
+#include "stm32_pwr.h"
+
+#if defined(CONFIG_STM32F7_PWR)
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+static uint16_t g_bkp_writable_counter = 0;
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+static inline uint16_t stm32_pwr_getreg(uint8_t offset)
+{
+  return (uint16_t)getreg32(STM32_PWR_BASE + (uint32_t)offset);
+}
+
+static inline void stm32_pwr_putreg(uint8_t offset, uint16_t value)
+{
+  putreg32((uint32_t)value, STM32_PWR_BASE + (uint32_t)offset);
+}
+
+static inline void stm32_pwr_modifyreg(uint8_t offset, uint16_t clearbits, uint16_t setbits)
+{
+  modifyreg32(STM32_PWR_BASE + (uint32_t)offset, (uint32_t)clearbits, (uint32_t)setbits);
+}
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_pwr_initbkp
+ *
+ * Description:
+ *   Insures the referenced count access to the backup domain (RTC registers,
+ *   RTC backup data registers and backup SRAM is consistent with the HW state
+ *   without relying on a variable.
+ *
+ *   NOTE: This function should only be called by SoC Start up code.
+ *
+ * Input Parameters:
+ *   writable - True: enable ability to write to backup domain registers
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+void stm32_pwr_initbkp(bool writable)
+{
+  uint16_t regval;
+
+  /* Make the HW not writable */
+
+  regval = stm32_pwr_getreg(STM32_PWR_CR1_OFFSET);
+  regval &= ~PWR_CR1_DBP;
+  stm32_pwr_putreg(STM32_PWR_CR1_OFFSET, regval);
+
+  /* Make the reference count agree */
+
+  g_bkp_writable_counter =  0;
+  stm32_pwr_enablebkp(writable);
+}
+
+/************************************************************************************
+ * Name: stm32_pwr_enablebkp
+ *
+ * Description:
+ *   Enables access to the backup domain (RTC registers, RTC backup data registers
+ *   and backup SRAM).
+ *
+ *   NOTE: Reference counting is used in order to supported nested calls to this
+ *   function.  As a consequence, every call to stm32_pwr_enablebkp(true) must
+ *   be followed by a matching call to stm32_pwr_enablebkp(false).
+ *
+ * Input Parameters:
+ *   writable - True: enable ability to write to backup domain registers
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+void stm32_pwr_enablebkp(bool writable)
+{
+  irqstate_t flags;
+  uint16_t regval;
+  bool waswritable;
+  bool wait = false;
+
+  flags = enter_critical_section();
+
+  /* Get the current state of the STM32 PWR control register */
+
+  regval      = stm32_pwr_getreg(STM32_PWR_CR1_OFFSET);
+  waswritable = ((regval & PWR_CR1_DBP) != 0);
+
+  if (writable)
+    {
+      DEBUGASSERT(g_bkp_writable_counter < UINT16_MAX);
+      g_bkp_writable_counter++;
+    }
+  else if (g_bkp_writable_counter > 0)
+    {
+      g_bkp_writable_counter--;
+    }
+  /* Enable or disable the ability to write */
+
+  if (waswritable && g_bkp_writable_counter == 0)
+    {
+      /* Disable backup domain access */
+
+      regval &= ~PWR_CR1_DBP;
+      stm32_pwr_putreg(STM32_PWR_CR1_OFFSET, regval);
+    }
+  else if (!waswritable && g_bkp_writable_counter > 0)
+    {
+      /* Enable backup domain access */
+
+      regval |= PWR_CR1_DBP;
+      stm32_pwr_putreg(STM32_PWR_CR1_OFFSET, regval);
+
+      wait = true;
+	}
+
+  leave_critical_section(flags);
+
+  if (wait)
+    {
+      /* Enable does not happen right away */
+
+      up_udelay(4);
+    }
+}
+
+/************************************************************************************
+ * Name: stm32_pwr_enablebreg
+ *
+ * Description:
+ *   Enables the Backup regulator, the Backup regulator (used to maintain backup
+ *   SRAM content in Standby and VBAT modes) is enabled. If BRE is reset, the backup
+ *   regulator is switched off. The backup SRAM can still be used but its content will
+ *   be lost in the Standby and VBAT modes. Once set, the application must wait that
+ *   the Backup Regulator Ready flag (BRR) is set to indicate that the data written
+ *   into the RAM will be maintained in the Standby and VBAT modes.
+ *
+ * Input Parameters:
+ *   regon - state to set it to
+ *
+ * Returned Values:
+ *   None
+ *
+ ************************************************************************************/
+
+void stm32_pwr_enablebreg(bool regon)
+{
+  uint16_t regval;
+
+  regval  = stm32_pwr_getreg(STM32_PWR_CSR1_OFFSET);
+  regval &= ~PWR_CSR1_BRE;
+  regval |= regon ? PWR_CSR1_BRE : 0;
+  stm32_pwr_putreg(STM32_PWR_CSR1_OFFSET, regval);
+
+  if (regon)
+    {
+      while ((stm32_pwr_getreg(STM32_PWR_CSR1_OFFSET) & PWR_CSR1_BRR) == 0);
+    }
+}
+
+/************************************************************************************
+ * Name: stm32_pwr_setvos
+ *
+ * Description:
+ *   Set voltage scaling.
+ *
+ * Input Parameters:
+ *   vos - Properly aligned voltage scaling select bits for the PWR_CR register.
+ *
+ * Returned Values:
+ *   None
+ *
+ * Assumptions:
+ *   At present, this function is called only from initialization logic.  If used
+ *   for any other purpose that protection to assure that its operation is atomic
+ *   will be required.
+ *
+ ************************************************************************************/
+
+void stm32_pwr_setvos(uint16_t vos)
+{
+  uint16_t regval;
+
+  /* The following sequence is required to program the voltage regulator ranges:
+   * 1. Check VDD to identify which ranges are allowed...
+   * 2. Configure the voltage scaling range by setting the VOS bits in the PWR_CR1
+   *    register.
+   */
+
+  regval  = stm32_pwr_getreg(STM32_PWR_CR1_OFFSET);
+  regval &= ~PWR_CR1_VOS_MASK;
+  regval |= (vos & PWR_CR1_VOS_MASK);
+  stm32_pwr_putreg(STM32_PWR_CR1_OFFSET, regval);
+}
+
+/************************************************************************************
+ * Name: stm32_pwr_setpvd
+ *
+ * Description:
+ *   Sets power voltage detector
+ *
+ * Input Parameters:
+ *   pls - PVD level
+ *
+ * Returned Values:
+ *   None
+ *
+ * Assumptions:
+ *   At present, this function is called only from initialization logic.  If used
+ *   for any other purpose that protection to assure that its operation is atomic
+ *   will be required.
+ *
+ ************************************************************************************/
+
+void stm32_pwr_setpvd(uint16_t pls)
+{
+  uint16_t regval;
+
+  /* Set PLS */
+
+  regval = stm32_pwr_getreg(STM32_PWR_CR1_OFFSET);
+  regval &= ~PWR_CR1_PLS_MASK;
+  regval |= (pls & PWR_CR1_PLS_MASK);
+
+  /* Write value to register */
+
+  stm32_pwr_putreg(STM32_PWR_CR1_OFFSET, regval);
+}
+
+/************************************************************************************
+ * Name: stm32_pwr_enablepvd
+ *
+ * Description:
+ *   Enable the Programmable Voltage Detector
+ *
+ ************************************************************************************/
+
+void stm32_pwr_enablepvd(void)
+{
+  /* Enable PVD by setting the PVDE bit in PWR_CR register. */
+
+  stm32_pwr_modifyreg(STM32_PWR_CR1_OFFSET, 0, PWR_CR1_PVDE);
+}
+
+/************************************************************************************
+ * Name: stm32_pwr_disablepvd
+ *
+ * Description:
+ *   Disable the Programmable Voltage Detector
+ *
+ ************************************************************************************/
+
+void stm32_pwr_disablepvd(void)
+{
+  /* Disable PVD by clearing the PVDE bit in PWR_CR register. */
+
+  stm32_pwr_modifyreg(STM32_PWR_CR1_OFFSET, PWR_CR1_PVDE, 0);
+}
+
+#endif /* CONFIG_STM32_PWR */
diff --git a/arch/arm/src/stm32f7/stm32_pwr.h b/arch/arm/src/stm32f7/stm32_pwr.h
index 3c5a30f96738676775413bc07942eb930ffd28d7..c80de12ae1707689cd498cd13275af2dda22edd2 100644
--- a/arch/arm/src/stm32f7/stm32_pwr.h
+++ b/arch/arm/src/stm32f7/stm32_pwr.h
@@ -1,8 +1,9 @@
 /************************************************************************************
  * arch/arm/src/stm32f7/stm32_pwr.h
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -66,6 +67,27 @@ extern "C"
  * Public Functions
  ************************************************************************************/
 
+/************************************************************************************
+ * Name: stm32_pwr_initbkp
+ *
+ * Description:
+ *   Insures the referenced count access to the backup domain (RTC registers,
+ *   RTC backup data registers and backup SRAM is consistent with the HW state
+ *   without relying on a variable.
+ *
+ *   NOTE: This function should only be called by SoC Start up code.
+ *
+ * Input Parameters:
+ *   writable - set the initial state of the enable and the
+ *              bkp_writable_counter
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+void stm32_pwr_initbkp(bool writable);
+
 /************************************************************************************
  * Name: stm32_pwr_enablebkp
  *
@@ -77,11 +99,11 @@ extern "C"
  *   writable - True: enable ability to write to backup domain registers
  *
  * Returned Value:
- *   True: The backup domain was previously writeable.
+ *   none
  *
  ************************************************************************************/
 
-bool stm32_pwr_enablebkp(bool writable);
+void stm32_pwr_enablebkp(bool writable);
 
 /************************************************************************************
  * Name: stm32_pwr_enablebreg
diff --git a/arch/arm/src/stm32f7/stm32_rcc.c b/arch/arm/src/stm32f7/stm32_rcc.c
index bd1d1e7bcab3645b87538e183038cdb56ae31e45..a64ce09ed64c4e5d13b93fbbcfb42d65932bd7a6 100644
--- a/arch/arm/src/stm32f7/stm32_rcc.c
+++ b/arch/arm/src/stm32f7/stm32_rcc.c
@@ -1,8 +1,9 @@
 /****************************************************************************
  * arch/arm/src/stm32f7/stm32_rcc.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -51,6 +52,7 @@
 
 #include "chip/stm32_flash.h"
 #include "stm32_rcc.h"
+#include "stm32_pwr.h"
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -75,6 +77,8 @@
 
 #if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
 #  include "stm32f74xx75xx_rcc.c"
+#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+#  include "stm32f76xx77xx_rcc.c"
 #else
 #  error "Unsupported STM32 F7 chip"
 #endif
@@ -110,6 +114,13 @@ void stm32_clockconfig(void)
 
   rcc_reset();
 
+#if defined(CONFIG_STM32F7_PWR)
+
+  /* Insure the bkp is initialized */
+
+  stm32_pwr_initbkp(false);
+#endif
+
 #if defined(CONFIG_STM32F7_CUSTOM_CLOCKCONFIG)
 
   /* Invoke Board Custom Clock Configuration */
diff --git a/arch/arm/src/stm32f7/stm32_rtc.c b/arch/arm/src/stm32f7/stm32_rtc.c
new file mode 100644
index 0000000000000000000000000000000000000000..8a21ec41fea98b9a397d75e7ea473ca6bb1c4a6c
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_rtc.c
@@ -0,0 +1,1503 @@
+/****************************************************************************
+ * arch/arm/src/stm32f7/stm32_rtc.c
+ *
+ *   Copyright (C) 2011, 2015-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "up_arch.h"
+
+#include "stm32_rcc.h"
+#include "stm32_pwr.h"
+#include "stm32_exti.h"
+#include "stm32_rtc.h"
+
+#include 
+
+#ifdef CONFIG_RTC
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* Configuration ************************************************************/
+/* This RTC implementation supports
+ *  - date/time RTC hardware
+ *  - extended functions Alarm A and B for STM32F4xx and onwards
+ * */
+
+#ifndef CONFIG_RTC_DATETIME
+#  error "CONFIG_RTC_DATETIME must be set to use this driver"
+#endif
+
+#ifdef CONFIG_RTC_HIRES
+#  error "CONFIG_RTC_HIRES must NOT be set with this driver"
+#endif
+
+#ifndef CONFIG_STM32F7_PWR
+#  error "CONFIG_STM32F7_PWR must selected to use this driver"
+#endif
+
+/* Constants ****************************************************************/
+
+#if defined(CONFIG_STM32F7_RTC_HSECLOCK)
+#  define  RCC_BDCR_RTCSEL RCC_BDCR_RTCSEL_HSE
+#elif defined(CONFIG_STM32F7_RTC_LSICLOCK)
+#  define  RCC_BDCR_RTCSEL RCC_BDCR_RTCSEL_LSI
+#elif defined(CONFIG_STM32F7_RTC_LSECLOCK)
+#  define  RCC_BDCR_RTCSEL RCC_BDCR_RTCSEL_LSE
+#else
+#  warning "RCC_BDCR_RTCSEL_NOCLK has been selected - RTC will not count"
+#endif
+
+#define SYNCHRO_TIMEOUT      (0x00020000)
+#define INITMODE_TIMEOUT     (0x00010000)
+
+/* Time conversions */
+
+#define MINUTES_IN_HOUR 60
+#define HOURS_IN_DAY 24
+
+#define hours_add(parm_hrs) \
+  time->tm_hour += parm_hrs;\
+  if ((HOURS_IN_DAY-1) < (time->tm_hour))\
+    {\
+      time->tm_hour = (parm_hrs - HOURS_IN_DAY);\
+    }
+
+#define RTC_ALRMR_DIS_MASK            (RTC_ALRMR_MSK4 | RTC_ALRMR_MSK3 | \
+                                       RTC_ALRMR_MSK2 | RTC_ALRMR_MSK1)
+#define RTC_ALRMR_DIS_DATE_MASK       (RTC_ALRMR_MSK4)
+#define RTC_ALRMR_ENABLE              (0)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+typedef unsigned int rtc_alarmreg_t;
+
+struct alm_cbinfo_s
+{
+  volatile alm_callback_t ac_cb; /* Client callback function */
+  volatile FAR void *ac_arg;     /* Argument to pass with the callback function */
+};
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+/* Callback to use when an EXTI is activated  */
+
+static struct alm_cbinfo_s g_alarmcb[RTC_ALARM_LAST];
+#endif
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* g_rtc_enabled is set true after the RTC has successfully initialized */
+
+volatile bool g_rtc_enabled = false;
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+static int rtchw_check_alrawf(void);
+static int rtchw_set_alrmar(rtc_alarmreg_t alarmreg);
+#if CONFIG_RTC_NALARMS > 1
+static int rtchw_check_alrbwf(void);
+static int rtchw_set_alrmbr(rtc_alarmreg_t alarmreg);
+#endif
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: rtc_dumpregs
+ *
+ * Description:
+ *    Disable RTC write protection
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEBUG_RTC_INFO
+static void rtc_dumpregs(FAR const char *msg)
+{
+  int rtc_state;
+
+  rtcinfo("%s:\n", msg);
+  rtcinfo("      TR: %08x\n", getreg32(STM32_RTC_TR));
+  rtcinfo("      DR: %08x\n", getreg32(STM32_RTC_DR));
+  rtcinfo("      CR: %08x\n", getreg32(STM32_RTC_CR));
+  rtcinfo("     ISR: %08x\n", getreg32(STM32_RTC_ISR));
+  rtcinfo("    PRER: %08x\n", getreg32(STM32_RTC_PRER));
+  rtcinfo("    WUTR: %08x\n", getreg32(STM32_RTC_WUTR));
+  rtcinfo("  ALRMAR: %08x\n", getreg32(STM32_RTC_ALRMAR));
+  rtcinfo("  ALRMBR: %08x\n", getreg32(STM32_RTC_ALRMBR));
+  rtcinfo("  SHIFTR: %08x\n", getreg32(STM32_RTC_SHIFTR));
+  rtcinfo("    TSTR: %08x\n", getreg32(STM32_RTC_TSTR));
+  rtcinfo("    TSDR: %08x\n", getreg32(STM32_RTC_TSDR));
+  rtcinfo("   TSSSR: %08x\n", getreg32(STM32_RTC_TSSSR));
+  rtcinfo("    CALR: %08x\n", getreg32(STM32_RTC_CALR));
+  rtcinfo("   TAFCR: %08x\n", getreg32(STM32_RTC_TAFCR));
+  rtcinfo("ALRMASSR: %08x\n", getreg32(STM32_RTC_ALRMASSR));
+  rtcinfo("ALRMBSSR: %08x\n", getreg32(STM32_RTC_ALRMBSSR));
+  rtcinfo("MAGICREG: %08x\n", getreg32(RTC_MAGIC_REG));
+
+  rtc_state =
+    ((getreg32(STM32_EXTI_RTSR) & EXTI_RTC_ALARM) ? 0x1000 : 0) |
+    ((getreg32(STM32_EXTI_FTSR) & EXTI_RTC_ALARM) ? 0x0100 : 0) |
+    ((getreg32(STM32_EXTI_IMR)  & EXTI_RTC_ALARM) ? 0x0010 : 0) |
+    ((getreg32(STM32_EXTI_EMR)  & EXTI_RTC_ALARM) ? 0x0001 : 0);
+  rtcinfo("EXTI (RTSR FTSR ISR EVT): %01x\n",rtc_state);
+}
+#else
+#  define rtc_dumpregs(msg)
+#endif
+
+/****************************************************************************
+ * Name: rtc_dumptime
+ *
+ * Description:
+ *    Disable RTC write protection
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEBUG_RTC_INFO
+static void rtc_dumptime(FAR const struct tm *tp, FAR const char *msg)
+{
+  rtcinfo("%s:\n", msg);
+  rtcinfo("  tm_sec: %08x\n", tp->tm_sec);
+  rtcinfo("  tm_min: %08x\n", tp->tm_min);
+  rtcinfo(" tm_hour: %08x\n", tp->tm_hour);
+  rtcinfo(" tm_mday: %08x\n", tp->tm_mday);
+  rtcinfo("  tm_mon: %08x\n", tp->tm_mon);
+  rtcinfo(" tm_year: %08x\n", tp->tm_year);
+}
+#else
+#  define rtc_dumptime(tp, msg)
+#endif
+
+/****************************************************************************
+ * Name: rtc_wprunlock
+ *
+ * Description:
+ *    Disable RTC write protection
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void rtc_wprunlock(void)
+{
+  /* Enable write access to the backup domain (RTC registers, RTC backup data
+   * registers and backup SRAM).
+   */
+
+  stm32_pwr_enablebkp(true);
+
+  /* The following steps are required to unlock the write protection on all the
+   * RTC registers (except for RTC_ISR[13:8], RTC_TAFCR, and RTC_BKPxR).
+   *
+   * 1. Write 0xCA into the RTC_WPR register.
+   * 2. Write 0x53 into the RTC_WPR register.
+   *
+   * Writing a wrong key re-activates the write protection.
+   */
+
+  putreg32(0xca, STM32_RTC_WPR);
+  putreg32(0x53, STM32_RTC_WPR);
+}
+
+/****************************************************************************
+ * Name: rtc_wprlock
+ *
+ * Description:
+ *    Enable RTC write protection
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static inline void rtc_wprlock(void)
+{
+  /* Writing any wrong key re-activates the write protection. */
+
+  putreg32(0xff, STM32_RTC_WPR);
+
+  /* Disable write access to the backup domain (RTC registers, RTC backup
+   * data registers and backup SRAM).
+   */
+
+  stm32_pwr_enablebkp(false);
+}
+
+/****************************************************************************
+ * Name: rtc_synchwait
+ *
+ * Description:
+ *   Waits until the RTC Time and Date registers (RTC_TR and RTC_DR) are
+ *   synchronized with RTC APB clock.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+static int rtc_synchwait(void)
+{
+  volatile uint32_t timeout;
+  uint32_t regval;
+  int ret;
+
+  /* Disable the write protection for RTC registers */
+
+  rtc_wprunlock();
+
+  /* Clear Registers synchronization flag (RSF) */
+
+  regval  = getreg32(STM32_RTC_ISR);
+  regval &= ~RTC_ISR_RSF;
+  putreg32(regval, STM32_RTC_ISR);
+
+  /* Now wait the registers to become synchronised */
+
+  ret = -ETIMEDOUT;
+  for (timeout = 0; timeout < SYNCHRO_TIMEOUT; timeout++)
+    {
+      regval = getreg32(STM32_RTC_ISR);
+      if ((regval & RTC_ISR_RSF) != 0)
+        {
+          /* Synchronized */
+
+          ret = OK;
+          break;
+        }
+    }
+
+  /* Re-enable the write protection for RTC registers */
+
+  rtc_wprlock();
+  return ret;
+}
+
+/****************************************************************************
+ * Name: rtc_enterinit
+ *
+ * Description:
+ *   Enter RTC initialization mode.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+static int rtc_enterinit(void)
+{
+  volatile uint32_t timeout;
+  uint32_t regval;
+  int ret;
+
+  /* Check if the Initialization mode is already set */
+
+  regval = getreg32(STM32_RTC_ISR);
+
+  ret = OK;
+  if ((regval & RTC_ISR_INITF) == 0)
+    {
+      /* Set the Initialization mode */
+
+      putreg32(RTC_ISR_INIT, STM32_RTC_ISR);
+
+      /* Wait until the RTC is in the INIT state (or a timeout occurs) */
+
+      ret = -ETIMEDOUT;
+      for (timeout = 0; timeout < INITMODE_TIMEOUT; timeout++)
+        {
+          regval = getreg32(STM32_RTC_ISR);
+          if ((regval & RTC_ISR_INITF) != 0)
+            {
+              ret = OK;
+              break;
+            }
+        }
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: rtc_exitinit
+ *
+ * Description:
+ *   Exit RTC initialization mode.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+static void rtc_exitinit(void)
+{
+  uint32_t regval;
+
+  regval = getreg32(STM32_RTC_ISR);
+  regval &= ~(RTC_ISR_INIT);
+  putreg32(regval, STM32_RTC_ISR);
+}
+
+/****************************************************************************
+ * Name: rtc_bin2bcd
+ *
+ * Description:
+ *   Converts a 2 digit binary to BCD format
+ *
+ * Input Parameters:
+ *   value - The byte to be converted.
+ *
+ * Returned Value:
+ *   The value in BCD representation
+ *
+ ****************************************************************************/
+
+static uint32_t rtc_bin2bcd(int value)
+{
+  uint32_t msbcd = 0;
+
+  while (value >= 10)
+    {
+      msbcd++;
+      value -= 10;
+    }
+
+  return (msbcd << 4) | value;
+}
+
+/****************************************************************************
+ * Name: rtc_bin2bcd
+ *
+ * Description:
+ *   Convert from 2 digit BCD to binary.
+ *
+ * Input Parameters:
+ *   value - The BCD value to be converted.
+ *
+ * Returned Value:
+ *   The value in binary representation
+ *
+ ****************************************************************************/
+
+static int rtc_bcd2bin(uint32_t value)
+{
+  uint32_t tens = (value >> 4) * 10;
+  return (int)(tens + (value & 0x0f));
+}
+
+/****************************************************************************
+ * Name: rtc_setup
+ *
+ * Description:
+ *   Performs first time configuration of the RTC.  A special value written
+ *   into back-up register 0 will prevent this function from being called on
+ *   sub-sequent resets or power up.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+static int rtc_setup(void)
+{
+  uint32_t regval;
+  int ret;
+
+  /* Disable the write protection for RTC registers */
+
+  rtc_wprunlock();
+
+  /* Set Initialization mode */
+
+  ret = rtc_enterinit();
+  if (ret == OK)
+    {
+      /* Set the 24 hour format by clearing the FMT bit in the RTC
+       * control register
+       */
+
+      regval = getreg32(STM32_RTC_CR);
+      regval &= ~RTC_CR_FMT;
+      putreg32(regval, STM32_RTC_CR);
+
+      /* Configure RTC pre-scaler with the required values */
+
+#ifdef CONFIG_STM32F7_RTC_HSECLOCK
+      /* For a 1 MHz clock this yields 0.9999360041 Hz on the second
+       * timer - which is pretty close.
+       */
+
+      putreg32(((uint32_t)7182 << RTC_PRER_PREDIV_S_SHIFT) |
+              ((uint32_t)0x7f << RTC_PRER_PREDIV_A_SHIFT),
+              STM32_RTC_PRER);
+#else
+      /* Correct values for 32.768 KHz LSE clock and inaccurate LSI clock */
+
+      putreg32(((uint32_t)0xff << RTC_PRER_PREDIV_S_SHIFT) |
+              ((uint32_t)0x7f << RTC_PRER_PREDIV_A_SHIFT),
+              STM32_RTC_PRER);
+#endif
+
+      /* Exit RTC initialization mode */
+
+      rtc_exitinit();
+    }
+
+  /* Re-enable the write protection for RTC registers */
+
+  rtc_wprlock();
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: rtc_resume
+ *
+ * Description:
+ *   Called when the RTC was already initialized on a previous power cycle.
+ *   This just brings the RTC back into full operation.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+static void rtc_resume(void)
+{
+#ifdef CONFIG_RTC_ALARM
+  uint32_t regval;
+
+  /* Clear the RTC alarm flags */
+
+  regval  = getreg32(STM32_RTC_ISR);
+  regval &= ~(RTC_ISR_ALRAF | RTC_ISR_ALRBF);
+  putreg32(regval, STM32_RTC_ISR);
+
+  /* Clear the RTC Alarm Pending bit */
+
+  putreg32(EXTI_RTC_ALARM, STM32_EXTI_PR);
+#endif
+}
+
+/****************************************************************************
+ * Name: stm32_rtc_alarm_handler
+ *
+ * Description:
+ *   RTC ALARM interrupt service routine through the EXTI line
+ *
+ * Input Parameters:
+ *   irq - The IRQ number that generated the interrupt
+ *   context - Architecture specific register save information.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; A negated errno value on failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+static int stm32_rtc_alarm_handler(int irq, void *context)
+{
+  FAR struct alm_cbinfo_s *cbinfo;
+  alm_callback_t cb;
+  FAR void *arg;
+  uint32_t isr;
+  uint32_t cr;
+  int ret = OK;
+
+  isr  = getreg32(STM32_RTC_ISR);
+
+  /* Check for EXTI from Alarm A or B and handle according */
+
+  if ((isr & RTC_ISR_ALRAF) != 0)
+    {
+      cr  = getreg32(STM32_RTC_CR);
+      if ((cr & RTC_CR_ALRAIE) != 0)
+        {
+          cbinfo = &g_alarmcb[RTC_ALARMA];
+          if (cbinfo->ac_cb != NULL)
+            {
+              /* Alarm A callback */
+
+              cb  = cbinfo->ac_cb;
+              arg = (FAR void *)cbinfo->ac_arg;
+
+              cbinfo->ac_cb  = NULL;
+              cbinfo->ac_arg = NULL;
+
+              cb(arg, RTC_ALARMA);
+            }
+
+          isr  = getreg32(STM32_RTC_ISR) & ~RTC_ISR_ALRAF;
+          putreg32(isr, STM32_RTC_CR);
+        }
+    }
+
+#if CONFIG_RTC_NALARMS > 1
+  if ((isr & RTC_ISR_ALRBF) != 0)
+    {
+      cr  = getreg32(STM32_RTC_CR);
+      if ((cr & RTC_CR_ALRBIE) != 0)
+        {
+          cbinfo = &g_alarmcb[RTC_ALARMB];
+          if (cbinfo->ac_cb != NULL)
+            {
+              /* Alarm B callback */
+
+              cb  = cbinfo->ac_cb;
+              arg = (FAR void *)cbinfo->ac_arg;
+
+              cbinfo->ac_cb  = NULL;
+              cbinfo->ac_arg = NULL;
+
+              cb(arg, RTC_ALARMB);
+            }
+
+          isr  = getreg32(STM32_RTC_ISR) & ~RTC_ISR_ALRBF;
+          putreg32(isr, STM32_RTC_CR);
+        }
+    }
+#endif
+
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: rtchw_check_alrXwf X= a or B
+ *
+ * Description:
+ *   Check registers
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+static int rtchw_check_alrawf(void)
+{
+  volatile uint32_t timeout;
+  uint32_t regval;
+  int ret = -ETIMEDOUT;
+
+  /* Check RTC_ISR ALRAWF for access to alarm register,
+   * Can take 2 RTCCLK cycles or timeout
+   * CubeMX use GetTick.
+   */
+
+  for (timeout = 0; timeout < INITMODE_TIMEOUT; timeout++)
+    {
+      regval = getreg32(STM32_RTC_ISR);
+      if ((regval & RTC_ISR_ALRAWF) != 0)
+        {
+          ret = OK;
+          break;
+        }
+    }
+
+  return ret;
+}
+#endif
+
+#if defined(CONFIG_RTC_ALARM) && CONFIG_RTC_NALARMS > 1
+static int rtchw_check_alrbwf(void)
+{
+  volatile uint32_t timeout;
+  uint32_t regval;
+  int ret = -ETIMEDOUT;
+
+  /* Check RTC_ISR ALRAWF for access to alarm register,
+   * can take 2 RTCCLK cycles or timeout
+   * CubeMX use GetTick.
+   */
+
+  for (timeout = 0; timeout < INITMODE_TIMEOUT; timeout++)
+    {
+      regval = getreg32(STM32_RTC_ISR);
+      if ((regval & RTC_ISR_ALRBWF) != 0)
+        {
+          ret = OK;
+          break;
+        }
+    }
+
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_rtchw_set_alrmXr X is a or b
+ *
+ * Description:
+ *   Set the alarm (A or B) hardware registers, using the required hardware
+ *   access protocol
+ *
+ * Input Parameters:
+ *   alarmreg - the register
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+static int rtchw_set_alrmar(rtc_alarmreg_t alarmreg)
+{
+  int ret = -EBUSY;
+
+  /* Need to follow RTC register wrote protection
+   * Disable the write protection for RTC registers
+   */
+
+  rtc_wprunlock();
+
+  /* Disable RTC alarm & Interrupt */
+
+  modifyreg32(STM32_RTC_CR, (RTC_CR_ALRAE | RTC_CR_ALRAIE), 0);
+
+  ret = rtchw_check_alrawf();
+  if (ret != OK)
+    {
+      goto errout_with_wprunlock;
+    }
+
+  /* Set the RTC Alarm register */
+
+  putreg32(alarmreg, STM32_RTC_ALRMAR);
+  rtcinfo("  TR: %08x ALRMAR: %08x\n",
+          getreg32(STM32_RTC_TR), getreg32(STM32_RTC_ALRMAR));
+
+  /* Enable RTC alarm */
+
+  modifyreg32(STM32_RTC_CR, 0, (RTC_CR_ALRAE | RTC_CR_ALRAIE));
+
+errout_with_wprunlock:
+  rtc_wprlock();
+  return ret;
+}
+#endif
+
+#if defined(CONFIG_RTC_ALARM) && CONFIG_RTC_NALARMS > 1
+static int rtchw_set_alrmbr(rtc_alarmreg_t alarmreg)
+{
+  int ret = -EBUSY;
+
+  /* Need to follow RTC register wrote protection
+   * Disable the write protection for RTC registers
+   */
+
+  rtc_wprunlock();
+
+  /* Disable RTC alarm B & Interrupt B */
+
+  modifyreg32(STM32_RTC_CR, (RTC_CR_ALRBE | RTC_CR_ALRBIE), 0);
+
+  ret = rtchw_check_alrbwf();
+  if (ret != OK)
+    {
+      goto rtchw_set_alrmbr_exit;
+    }
+
+  /* Set the RTC Alarm register */
+
+  putreg32(alarmreg, STM32_RTC_ALRMBR);
+  rtcinfo("  TR: %08x ALRMBR: %08x\n",
+          getreg32(STM32_RTC_TR), getreg32(STM32_RTC_ALRMBR));
+
+  /* Enable RTC alarm B */
+
+  modifyreg32(STM32_RTC_CR, 0, (RTC_CR_ALRBE | RTC_CR_ALRBIE));
+
+rtchw_set_alrmbr_exit:
+  rtc_wprlock();
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_rtc_initialize
+ *
+ * Description:
+ *   Initialize the hardware RTC per the selected configuration.  This
+ *   function is called once during the OS initialization sequence
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+int up_rtc_initialize(void)
+{
+  uint32_t regval;
+  uint32_t tr_bkp;
+  uint32_t dr_bkp;
+  int ret;
+  int maxretry = 10;
+  int nretry = 0;
+
+  /* Clocking for the PWR block must be provided.  However, this is done
+   * unconditionally in stm32f7xxx_rcc.c on power up.  This done
+   * unconditionally because the PWR block is also needed to set the
+   * internal voltage regulator for maximum performance.
+   */
+
+  /* Select the clock source */
+  /* Save the token before losing it when resetting */
+
+  regval = getreg32(RTC_MAGIC_REG);
+
+  stm32_pwr_enablebkp(true);
+
+  if (regval != RTC_MAGIC)
+    {
+      /* Issue the Backup domain Reset Per Section 5.3.20 DocID028270 Rev 2
+       * The LSEON, LSEBYP, RTCSEL and RTCEN bits in the RCC backup domain
+       * control register (RCC_BDCR) are in the Backup domain. As a result,
+       * after Reset, these bits are write-protected and the DBP bit in the
+       * PWR power control register (PWR_CR1) has to be set before these can
+       * be modified.  Refer to Section 5.1.1: System reset on page 148 for
+       * further information.  These bits are only reset after a Backup
+       * domain Reset (see Section 5.1.3: Backup domain reset).
+       *
+       * This has to be done here so that PWR is already enabled
+       */
+
+      modifyreg32(STM32_RCC_BDCR, 0, RCC_BDCR_BDRST);
+      modifyreg32(STM32_RCC_BDCR, RCC_BDCR_BDRST, 0);
+
+#if RCC_BDCR_RTCSEL == RCC_BDCR_RTCSEL_LSE
+      /* Because of the Backup domain Reset - we must re enable the LSE */
+
+      stm32_rcc_enablelse();
+#endif
+
+      /* Some boards do not have the external 32khz oscillator installed, for
+       * those boards we must fallback to the crummy internal RC clock or the
+       * external high rate clock
+       */
+
+#ifdef CONFIG_STM32F7_RTC_HSECLOCK
+      /* Use the HSE clock as the input to the RTC block */
+
+      rtc_dumpregs("On reset HSE");
+
+#elif defined(CONFIG_STM32F7_RTC_LSICLOCK)
+      /* Use the LSI clock as the input to the RTC block */
+
+      rtc_dumpregs("On reset LSI");
+
+#elif defined(CONFIG_STM32F7_RTC_LSECLOCK)
+      /* Use the LSE clock as the input to the RTC block */
+
+      rtc_dumpregs("On reset LSE");
+
+#endif
+      modifyreg32(STM32_RCC_BDCR, RCC_BDCR_RTCSEL_MASK, RCC_BDCR_RTCSEL);
+
+      /* Enable the RTC Clock by setting the RTCEN bit in the RCC register */
+
+      modifyreg32(STM32_RCC_BDCR, 0, RCC_BDCR_RTCEN);
+    }
+  else
+    {
+      uint32_t clksrc = getreg32(STM32_RCC_BDCR);
+
+      rtc_dumpregs("On reset warm");
+
+      /* The RTC is already in use: check if the clock source has changed */
+
+      if ((clksrc & RCC_BDCR_RTCSEL_MASK) != RCC_BDCR_RTCSEL)
+        {
+          tr_bkp = getreg32(STM32_RTC_TR);
+          dr_bkp = getreg32(STM32_RTC_DR);
+          modifyreg32(STM32_RCC_BDCR, 0, RCC_BDCR_BDRST);
+          modifyreg32(STM32_RCC_BDCR, RCC_BDCR_BDRST, 0);
+
+# if RCC_BDCR_RTCSEL == RCC_BDCR_RTCSEL_LSE
+          /* Because of the Backup domain Reset - we must re enable the LSE
+           * if it is used
+           */
+
+          stm32_rcc_enablelse();
+#endif
+          /* Change to the new clock as the input to the RTC block */
+
+          modifyreg32(STM32_RCC_BDCR, RCC_BDCR_RTCSEL_MASK, RCC_BDCR_RTCSEL);
+
+          putreg32(tr_bkp, STM32_RTC_TR);
+          putreg32(dr_bkp, STM32_RTC_DR);
+
+          /* Keep the fact that the RTC is initialized */
+
+          putreg32(RTC_MAGIC, RTC_MAGIC_REG);
+
+          /* Enable the RTC Clock by setting the RTCEN bit in the RCC
+           * register.
+           */
+
+          modifyreg32(STM32_RCC_BDCR, 0, RCC_BDCR_RTCEN);
+        }
+    }
+
+  stm32_pwr_enablebkp(false);
+
+  /* Loop, attempting to initialize/resume the RTC.  This loop is necessary
+   * because it seems that occasionally it takes longer to initialize the
+   * RTC (the actual failure is in rtc_synchwait()).
+   */
+
+  do
+    {
+      /* Wait for the RTC Time and Date registers to be synchronized with
+       * RTC APB clock.
+       */
+
+      ret = rtc_synchwait();
+
+      /* Check that rtc_syncwait() returned successfully */
+
+      switch (ret)
+        {
+          case OK:
+            {
+              rtcinfo("rtc_syncwait() okay\n");
+              break;
+            }
+
+          default:
+            {
+              rtcerr("ERROR: rtc_syncwait() failed (%d)\n", ret);
+              break;
+            }
+        }
+    }
+  while (ret != OK && ++nretry < maxretry);
+
+  /* Check if the one-time initialization of the RTC has already been
+   * performed. We can determine this by checking if the magic number
+   * has been writing to to back-up date register DR0.
+   */
+
+  if (regval != RTC_MAGIC)
+    {
+      rtcinfo("Do setup\n");
+
+      /* Perform the one-time setup of the LSE clocking to the RTC */
+
+      ret = rtc_setup();
+
+      /* Enable write access to the backup domain (RTC registers, RTC
+       * backup data registers and backup SRAM).
+       */
+
+      stm32_pwr_enablebkp(true);
+
+      /* Remember that the RTC is initialized */
+
+      putreg32(RTC_MAGIC, RTC_MAGIC_REG);
+    }
+  else
+    {
+      rtcinfo("Do resume\n");
+
+      /* RTC already set-up, just resume normal operation */
+
+      rtc_resume();
+      rtc_dumpregs("Did resume");
+    }
+
+  /* Disable write access to the backup domain (RTC registers, RTC backup
+   * data registers and backup SRAM).
+   */
+
+  stm32_pwr_enablebkp(false);
+
+  if (ret != OK && nretry > 0)
+    {
+      rtcinfo("setup/resume ran %d times and failed with %d\n",
+              nretry, ret);
+      return -ETIMEDOUT;
+    }
+
+#ifdef CONFIG_RTC_ALARM
+  /* Configure RTC interrupt to catch alarm interrupts. All RTC interrupts
+   * are connected to the EXTI controller.  To enable the RTC Alarm
+   * interrupt, the following sequence is required:
+   *
+   * 1. Configure and enable the EXTI Line 17 RTC ALARM in interrupt mode
+   *    and select the rising edge sensitivity.
+   *    For STM32F4xx
+   *    EXTI line 21 RTC Tamper & Timestamp
+   *    EXTI line 22 RTC Wakeup
+   * 2. Configure and enable the RTC_Alarm IRQ channel in the NVIC.
+   * 3. Configure the RTC to generate RTC alarms (Alarm A or Alarm B).
+   */
+
+  (void)stm32_exti_alarm(true, false, true, stm32_rtc_alarm_handler, NULL);
+  rtc_dumpregs("After InitExtiAlarm");
+#else
+  rtc_dumpregs("After Initialization");
+#endif
+
+  g_rtc_enabled = true;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_rtc_getdatetime_with_subseconds
+ *
+ * Description:
+ *   Get the current date and time from the date/time RTC.  This interface
+ *   is only supported by the date/time RTC hardware implementation.
+ *   It is used to replace the system timer.  It is only used by the RTOS
+ *   during initialization to set up the system time when CONFIG_RTC and
+ *   CONFIG_RTC_DATETIME are selected (and CONFIG_RTC_HIRES is not).
+ *
+ *   NOTE: Some date/time RTC hardware is capability of sub-second accuracy.
+ *   That sub-second accuracy is returned through 'nsec'.
+ *
+ * Input Parameters:
+ *   tp - The location to return the high resolution time value.
+ *   nsec - The location to return the subsecond time value.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32_HAVE_RTC_SUBSECONDS
+int stm32_rtc_getdatetime_with_subseconds(FAR struct tm *tp, FAR long *nsec)
+#else
+int up_rtc_getdatetime(FAR struct tm *tp)
+#endif
+{
+#ifdef CONFIG_STM32_HAVE_RTC_SUBSECONDS
+  uint32_t ssr;
+#endif
+  uint32_t dr;
+  uint32_t tr;
+  uint32_t tmp;
+
+  /* Sample the data time registers.  There is a race condition here... If
+   * we sample the time just before midnight on December 31, the date could
+   * be wrong because the day rolled over while were sampling.
+   */
+
+  do
+    {
+      dr  = getreg32(STM32_RTC_DR);
+      tr  = getreg32(STM32_RTC_TR);
+#ifdef CONFIG_STM32_HAVE_RTC_SUBSECONDS
+      ssr = getreg32(STM32_RTC_SSR);
+#endif
+      tmp = getreg32(STM32_RTC_DR);
+    }
+  while (tmp != dr);
+
+  rtc_dumpregs("Reading Time");
+
+  /* Convert the RTC time to fields in struct tm format.  All of the STM32
+   * All of the ranges of values correspond between struct tm and the time
+   * register.
+   */
+
+  tmp = (tr & (RTC_TR_SU_MASK | RTC_TR_ST_MASK)) >> RTC_TR_SU_SHIFT;
+  tp->tm_sec = rtc_bcd2bin(tmp);
+
+  tmp = (tr & (RTC_TR_MNU_MASK | RTC_TR_MNT_MASK)) >> RTC_TR_MNU_SHIFT;
+  tp->tm_min = rtc_bcd2bin(tmp);
+
+  tmp = (tr & (RTC_TR_HU_MASK | RTC_TR_HT_MASK)) >> RTC_TR_HU_SHIFT;
+  tp->tm_hour = rtc_bcd2bin(tmp);
+
+  /* Now convert the RTC date to fields in struct tm format:
+   * Days: 1-31 match in both cases.
+   * Month: STM32 is 1-12, struct tm is 0-11.
+   * Years: STM32 is 00-99, struct tm is years since 1900.
+   * WeekDay: STM32 is 1 = Mon - 7 = Sun
+   *
+   * Issue:  I am not sure what the STM32 years mean.  Are these the
+   * years 2000-2099?  I'll assume so.
+   */
+
+  tmp = (dr & (RTC_DR_DU_MASK | RTC_DR_DT_MASK)) >> RTC_DR_DU_SHIFT;
+  tp->tm_mday = rtc_bcd2bin(tmp);
+
+  tmp = (dr & (RTC_DR_MU_MASK | RTC_DR_MT)) >> RTC_DR_MU_SHIFT;
+  tp->tm_mon = rtc_bcd2bin(tmp) - 1;
+
+  tmp = (dr & (RTC_DR_YU_MASK | RTC_DR_YT_MASK)) >> RTC_DR_YU_SHIFT;
+  tp->tm_year = rtc_bcd2bin(tmp) + 100;
+
+#if defined(CONFIG_LIBC_LOCALTIME) || defined(CONFIG_TIME_EXTENDED)
+  tmp = (dr & RTC_DR_WDU_MASK) >> RTC_DR_WDU_SHIFT;
+  tp->tm_wday = tmp % 7;
+  tp->tm_yday = tp->tm_mday +
+    clock_daysbeforemonth(tp->tm_mon, clock_isleapyear(tp->tm_year + 1900));
+  tp->tm_isdst = 0
+#endif
+
+#ifdef CONFIG_STM32_HAVE_RTC_SUBSECONDS
+  /* Return RTC sub-seconds if no configured and if a non-NULL value
+   * of nsec has been provided to receive the sub-second value.
+   */
+
+  if (nsec)
+    {
+      uint32_t prediv_s;
+      uint32_t usecs;
+
+      prediv_s   = getreg32(STM32_RTC_PRER) & RTC_PRER_PREDIV_S_MASK;
+      prediv_s >>= RTC_PRER_PREDIV_S_SHIFT;
+
+      ssr &= RTC_SSR_MASK;
+
+      /* Maximum prediv_s is 0x7fff, thus we can multiply by 100000 and
+       * still fit 32-bit unsigned integer.
+       */
+
+      usecs = (((prediv_s - ssr) * 100000) / (prediv_s + 1)) * 10;
+      *nsec = usecs * 1000;
+    }
+#endif /* CONFIG_STM32_HAVE_RTC_SUBSECONDS */
+
+  rtc_dumptime((FAR const struct tm *)tp, "Returning");
+  return OK;
+}
+
+/****************************************************************************
+ * Name: up_rtc_getdatetime
+ *
+ * Description:
+ *   Get the current date and time from the date/time RTC.  This interface
+ *   is only supported by the date/time RTC hardware implementation.
+ *   It is used to replace the system timer.  It is only used by the RTOS
+ *   during initialization to set up the system time when CONFIG_RTC and
+ *   CONFIG_RTC_DATETIME are selected (and CONFIG_RTC_HIRES is not).
+ *
+ *   NOTE: Some date/time RTC hardware is capability of sub-second accuracy.
+ *   That sub-second accuracy is lost in this interface.  However, since the
+ *   system time is reinitialized on each power-up/reset, there will be no
+ *   timing inaccuracy in the long run.
+ *
+ * Input Parameters:
+ *   tp - The location to return the high resolution time value.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32_HAVE_RTC_SUBSECONDS
+int up_rtc_getdatetime(FAR struct tm *tp)
+{
+  return stm32_rtc_getdatetime_with_subseconds(tp, NULL);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_rtc_setdatetime
+ *
+ * Description:
+ *   Set the RTC to the provided time. RTC implementations which provide
+ *   up_rtc_getdatetime() (CONFIG_RTC_DATETIME is selected) should provide
+ *   this function.
+ *
+ * Input Parameters:
+ *   tp - the time to use
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+int stm32_rtc_setdatetime(FAR const struct tm *tp)
+{
+  uint32_t tr;
+  uint32_t dr;
+  int ret;
+
+  rtc_dumptime(tp, "Setting time");
+
+  /* Then write the broken out values to the RTC */
+
+  /* Convert the struct tm format to RTC time register fields.  All of the
+   * STM32 All of the ranges of values correspond between struct tm and the
+   * time register.
+   */
+
+  tr = (rtc_bin2bcd(tp->tm_sec)  << RTC_TR_SU_SHIFT) |
+       (rtc_bin2bcd(tp->tm_min)  << RTC_TR_MNU_SHIFT) |
+       (rtc_bin2bcd(tp->tm_hour) << RTC_TR_HU_SHIFT);
+
+  /* Now convert the fields in struct tm format to the RTC date register
+   * fields:
+   *
+   *   Days: 1-31 match in both cases.
+   *   Month: STM32 is 1-12, struct tm is 0-11.
+   *   Years: STM32 is 00-99, struct tm is years since 1900.
+   *   WeekDay: STM32 is 1 = Mon - 7 = Sun
+   *
+   * Issue:  I am not sure what the STM32 years mean.  Are these the
+   * years 2000-2099?  I'll assume so.
+   */
+
+  dr = (rtc_bin2bcd(tp->tm_mday) << RTC_DR_DU_SHIFT) |
+       ((rtc_bin2bcd(tp->tm_mon + 1))  << RTC_DR_MU_SHIFT) |
+#if defined(CONFIG_LIBC_LOCALTIME) || defined(CONFIG_TIME_EXTENDED)
+       ((tp->tm_wday == 0 ? 7 : (tp->tm_wday & 7))  << RTC_DR_WDU_SHIFT) |
+#endif
+       ((rtc_bin2bcd(tp->tm_year - 100)) << RTC_DR_YU_SHIFT);
+
+  dr &= ~RTC_DR_RESERVED_BITS;
+
+  /* Disable the write protection for RTC registers */
+
+  rtc_wprunlock();
+
+  /* Set Initialization mode */
+
+  ret = rtc_enterinit();
+  if (ret == OK)
+    {
+      /* Set the RTC TR and DR registers */
+
+      putreg32(tr, STM32_RTC_TR);
+      putreg32(dr, STM32_RTC_DR);
+
+      /* Exit Initialization mode and wait for the RTC Time and Date
+       * registers to be synchronized with RTC APB clock.
+       */
+
+      rtc_exitinit();
+      ret = rtc_synchwait();
+    }
+
+  /* Re-enable the write protection for RTC registers */
+
+  rtc_wprlock();
+  rtc_dumpregs("New time setting");
+  return ret;
+}
+
+/****************************************************************************
+ * Name: up_rtc_settime
+ *
+ * Description:
+ *   Set the RTC to the provided time.  All RTC implementations must be able
+ *   to set their time based on a standard timespec.
+ *
+ * Input Parameters:
+ *   tp - the time to use
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+int up_rtc_settime(FAR const struct timespec *tp)
+{
+  FAR struct tm newtime;
+
+  /* Break out the time values (not that the time is set only to units of
+   * seconds)
+   */
+
+  (void)gmtime_r(&tp->tv_sec, &newtime);
+  return stm32_rtc_setdatetime(&newtime);
+}
+
+/****************************************************************************
+ * Name: stm32_rtc_setalarm
+ *
+ * Description:
+ *   Set an alarm to an asbolute time using associated hardware.
+ *
+ * Input Parameters:
+ *  alminfo - Information about the alarm configuration.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+int stm32_rtc_setalarm(FAR struct alm_setalarm_s *alminfo)
+{
+  FAR struct alm_cbinfo_s *cbinfo;
+  rtc_alarmreg_t alarmreg;
+  int ret = -EINVAL;
+
+  ASSERT(alminfo != NULL);
+  DEBUGASSERT(RTC_ALARM_LAST > alminfo->as_id);
+
+  /* REVISIT:  Should test that the time is in the future */
+
+  rtc_dumptime(&alminfo->as_time, "New alarm time");
+
+  /* Break out the values to the HW alarm register format.  The values in
+   * all STM32 fields match the fields of struct tm in this case.  Notice
+   * that the alarm is limited to one month.
+   */
+
+  alarmreg = (rtc_bin2bcd(alminfo->as_time.tm_sec)  << RTC_ALRMR_SU_SHIFT) |
+             (rtc_bin2bcd(alminfo->as_time.tm_min)  << RTC_ALRMR_MNU_SHIFT) |
+             (rtc_bin2bcd(alminfo->as_time.tm_hour) << RTC_ALRMR_HU_SHIFT) |
+             (rtc_bin2bcd(alminfo->as_time.tm_mday) << RTC_ALRMR_DU_SHIFT);
+
+  /* Set the alarm in hardware and enable interrupts */
+
+  switch (alminfo->as_id)
+    {
+      case RTC_ALARMA:
+        {
+          cbinfo         = &g_alarmcb[RTC_ALARMA];
+          cbinfo->ac_cb  = alminfo->as_cb;
+          cbinfo->ac_arg = alminfo->as_arg;
+
+          ret = rtchw_set_alrmar(alarmreg | RTC_ALRMR_ENABLE);
+          if (ret < 0)
+            {
+              cbinfo->ac_cb  = NULL;
+              cbinfo->ac_arg = NULL;
+            }
+
+          rtc_dumpregs("Set AlarmA");
+        }
+        break;
+
+#if CONFIG_RTC_NALARMS > 1
+      case RTC_ALARMB:
+        {
+          cbinfo         = &g_alarmcb[RTC_ALARMB];
+          cbinfo->ac_cb  = alminfo->as_cb;
+          cbinfo->ac_arg = alminfo->as_arg;
+
+          ret = rtchw_set_alrmbr(alarmreg | RTC_ALRMR_ENABLE);
+          if (ret < 0)
+            {
+              cbinfo->ac_cb  = NULL;
+              cbinfo->ac_arg = NULL;
+            }
+
+          rtc_dumpregs("Set AlarmB");
+        }
+        break;
+#endif
+
+      default:
+        rtcerr("ERROR: Invalid ALARM%d\n", alminfo->as_id);
+        break;
+    }
+
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_rtc_cancelalarm
+ *
+ * Description:
+ *   Cancel an alaram.
+ *
+ * Input Parameters:
+ *  alarmid - Identifies the alarm to be cancelled
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+int stm32_rtc_cancelalarm(enum alm_id_e alarmid)
+{
+  int ret = -EINVAL;
+
+  DEBUGASSERT(RTC_ALARM_LAST > alarmid);
+
+  /* Cancel the alarm in hardware and disable interrupts */
+
+  switch (alarmid)
+    {
+      case RTC_ALARMA:
+        {
+          /* Cancel the global callback function */
+
+           g_alarmcb[alarmid].ac_cb  = NULL;
+           g_alarmcb[alarmid].ac_arg = NULL;
+
+          /* Need to follow RTC register wrote protection.
+           * Disable the write protection for RTC registers
+           */
+
+          rtc_wprunlock();
+
+          /* Disable RTC alarm and interrupt */
+
+          modifyreg32(STM32_RTC_CR, (RTC_CR_ALRAE | RTC_CR_ALRAIE), 0);
+
+          ret = rtchw_check_alrawf();
+          if (ret < 0)
+            {
+              goto errout_with_wprunlock;
+            }
+
+          /* Unset the alarm */
+
+          putreg32(-1, STM32_RTC_ALRMAR);
+          rtc_wprlock();
+          ret = OK;
+        }
+        break;
+
+#if CONFIG_RTC_NALARMS > 1
+      case RTC_ALARMB:
+        {
+          /* Cancel the global callback function */
+
+           g_alarmcb[alarmid].ac_cb  = NULL;
+           g_alarmcb[alarmid].ac_arg = NULL;
+
+          /* Need to follow RTC register wrote protection.
+           * Disable the write protection for RTC registers
+           */
+
+          rtc_wprunlock();
+
+          /* Disable RTC alarm and interrupt */
+
+          modifyreg32(STM32_RTC_CR, (RTC_CR_ALRBE | RTC_CR_ALRBIE), 0);
+
+          ret = rtchw_check_alrbwf();
+          if (ret < 0)
+            {
+              goto errout_with_wprunlock;
+            }
+
+          /* Unset the alarm */
+
+          putreg32(-1, STM32_RTC_ALRMBR);
+          rtc_wprlock();
+          ret = OK;
+        }
+        break;
+#endif
+
+      default:
+        rtcerr("ERROR: Invalid ALARM%d\n", alarmid);
+        break;
+    }
+
+  return ret;
+
+errout_with_wprunlock:
+  rtc_wprlock();
+  return ret;
+}
+#endif
+
+#endif /* CONFIG_RTC */
diff --git a/arch/arm/src/stm32f7/stm32_rtc.h b/arch/arm/src/stm32f7/stm32_rtc.h
new file mode 100644
index 0000000000000000000000000000000000000000..f784f8acd310b1dc0cc0dc926812d2f4024e80e9
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_rtc.h
@@ -0,0 +1,178 @@
+/****************************************************************************
+ * arch/arm/src/stm32f7/stm32_rtc.h
+ *
+ *   Copyright (C) 2011 Uros Platise. All rights reserved.
+ *   Copyright (C) 2011-2013, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Authors: Uros Platise  (Original for the F1)
+ *            Gregory Nutt  (On-going support and development)
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_STM32_RTC_H
+#define __ARCH_ARM_SRC_STM32F7_STM32_RTC_H
+
+#include 
+
+#include "chip.h"
+
+/* The STMF7 family use a more traditional Realtime Clock/Calendar (RTCC) with
+ * broken-out data/time in BCD format.  The backup registers are integrated into
+ * the RTCC in these families.
+ */
+
+#include "chip/stm32_rtcc.h"
+#include "stm32_alarm.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define STM32_RTC_PRESCALER_SECOND  32767  /* Default prescaler to get a second base */
+#define STM32_RTC_PRESCALER_MIN         1  /* Maximum speed of 16384 Hz */
+
+#if !defined(CONFIG_RTC_MAGIC)
+# define CONFIG_RTC_MAGIC           (0xfacefeee)
+#endif
+
+#if !defined(CONFIG_RTC_MAGIC_REG)
+# define CONFIG_RTC_MAGIC_REG       (0)
+#endif
+
+#define RTC_MAGIC                   CONFIG_RTC_MAGIC
+#define RTC_MAGIC_REG               STM32_RTC_BKR(CONFIG_RTC_MAGIC_REG)
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_rtc_getdatetime_with_subseconds
+ *
+ * Description:
+ *   Get the current date and time from the date/time RTC.  This interface
+ *   is only supported by the date/time RTC hardware implementation.
+ *   It is used to replace the system timer.  It is only used by the RTOS
+ *   during initialization to set up the system time when CONFIG_RTC and
+ *   CONFIG_RTC_DATETIME are selected (and CONFIG_RTC_HIRES is not).
+ *
+ *   NOTE: Some date/time RTC hardware is capability of sub-second accuracy.
+ *   Thatsub-second accuracy is returned through 'nsec'.
+ *
+ * Input Parameters:
+ *   tp - The location to return the high resolution time value.
+ *   nsec - The location to return the subsecond time value.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32F7_HAVE_RTC_SUBSECONDS
+int stm32_rtc_getdatetime_with_subseconds(FAR struct tm *tp, FAR long *nsec);
+#endif
+
+/****************************************************************************
+ * Name: stm32_rtc_setdatetime
+ *
+ * Description:
+ *   Set the RTC to the provided time. RTC implementations which provide
+ *   up_rtc_getdatetime() (CONFIG_RTC_DATETIME is selected) should provide
+ *   this function.
+ *
+ * Input Parameters:
+ *   tp - the time to use
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_DATETIME
+struct tm;
+int stm32_rtc_setdatetime(FAR const struct tm *tp);
+#endif
+
+/****************************************************************************
+ * Name: stm32_rtc_lowerhalf
+ *
+ * Description:
+ *   Instantiate the RTC lower half driver for the STM32.  General usage:
+ *
+ *     #include 
+ *     #include "stm32_rtc.h>
+ *
+ *     struct rtc_lowerhalf_s *lower;
+ *     lower = stm32_rtc_lowerhalf();
+ *     rtc_initialize(0, lower);
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   On success, a non-NULL RTC lower interface is returned.  NULL is
+ *   returned on any failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_DRIVER
+struct rtc_lowerhalf_s;
+FAR struct rtc_lowerhalf_s *stm32_rtc_lowerhalf(void);
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_STM32F7_STM32_RTC_H */
diff --git a/arch/arm/src/stm32f7/stm32_rtc_lowerhalf.c b/arch/arm/src/stm32f7/stm32_rtc_lowerhalf.c
new file mode 100644
index 0000000000000000000000000000000000000000..1b20b44edabff9a1bed544e39b712a6544e9b358
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_rtc_lowerhalf.c
@@ -0,0 +1,530 @@
+/****************************************************************************
+ * arch/arm/src/stm32f7/stm32_rtc_lowerhalf.c
+ *
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* REVISIT:  This driver is *not* thread-safe! */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "chip.h"
+#include "stm32_rtc.h"
+
+#ifdef CONFIG_RTC_DRIVER
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define STM32_NALARMS 2
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+struct stm32_cbinfo_s
+{
+  volatile rtc_alarm_callback_t cb;  /* Callback when the alarm expires */
+  volatile FAR void *priv;           /* Private argurment to accompany callback */
+  uint8_t id;                        /* Identifies the alarm */
+};
+#endif
+
+/* This is the private type for the RTC state.  It must be cast compatible
+ * with struct rtc_lowerhalf_s.
+ */
+
+struct stm32_lowerhalf_s
+{
+  /* This is the contained reference to the read-only, lower-half
+   * operations vtable (which may lie in FLASH or ROM)
+   */
+
+  FAR const struct rtc_ops_s *ops;
+
+  /* Data following is private to this driver and not visible outside of
+   * this file.
+   */
+
+#ifdef CONFIG_RTC_ALARM
+  /* Alarm callback information */
+
+  struct stm32_cbinfo_s cbinfo[STM32_NALARMS];
+#endif
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+/* Prototypes for static methods in struct rtc_ops_s */
+
+static int stm32_rdtime(FAR struct rtc_lowerhalf_s *lower,
+                        FAR struct rtc_time *rtctime);
+static int stm32_settime(FAR struct rtc_lowerhalf_s *lower,
+                         FAR const struct rtc_time *rtctime);
+
+#ifdef CONFIG_RTC_ALARM
+static int stm32_setalarm(FAR struct rtc_lowerhalf_s *lower,
+                          FAR const struct lower_setalarm_s *alarminfo);
+static int stm32_setrelative(FAR struct rtc_lowerhalf_s *lower,
+                             FAR const struct lower_setrelative_s *alarminfo);
+static int stm32_cancelalarm(FAR struct rtc_lowerhalf_s *lower,
+                             int alarmid);
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+/* STM32 RTC driver operations */
+
+static const struct rtc_ops_s g_rtc_ops =
+{
+  .rdtime      = stm32_rdtime,
+  .settime     = stm32_settime,
+#ifdef CONFIG_RTC_ALARM
+  .setalarm    = stm32_setalarm,
+  .setrelative = stm32_setrelative,
+  .cancelalarm = stm32_cancelalarm,
+#endif
+#ifdef CONFIG_RTC_IOCTL
+  .ioctl       = NULL,
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  .destroy     = NULL,
+#endif
+};
+
+/* STM32 RTC device state */
+
+static struct stm32_lowerhalf_s g_rtc_lowerhalf =
+{
+  .ops        = &g_rtc_ops,
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_alarm_callback
+ *
+ * Description:
+ *   This is the function that is called from the RTC driver when the alarm
+ *   goes off.  It just invokes the upper half drivers callback.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+static void stm32_alarm_callback(FAR void *arg, unsigned int alarmid)
+{
+  FAR struct stm32_lowerhalf_s *lower;
+  FAR struct stm32_cbinfo_s *cbinfo;
+  rtc_alarm_callback_t cb;
+  FAR void *priv;
+
+  DEBUGASSERT(alarmid == RTC_ALARMA || alarmid == RTC_ALARMB);
+
+  lower        = (struct stm32_lowerhalf_s *)arg;
+  cbinfo       = &lower->cbinfo[alarmid];
+
+  /* Sample and clear the callback information to minimize the window in
+   * time in which race conditions can occur.
+   */
+
+  cb           = (rtc_alarm_callback_t)cbinfo->cb;
+  priv         = (FAR void *)cbinfo->priv;
+  DEBUGASSERT(priv != NULL);
+
+  cbinfo->cb   = NULL;
+  cbinfo->priv = NULL;
+
+  /* Perform the callback */
+
+  if (cb != NULL)
+    {
+      cb(priv, alarmid);
+    }
+}
+#endif /* CONFIG_RTC_ALARM */
+
+/****************************************************************************
+ * Name: stm32_rdtime
+ *
+ * Description:
+ *   Implements the rdtime() method of the RTC driver interface
+ *
+ * Input Parameters:
+ *   lower   - A reference to RTC lower half driver state structure
+ *   rcttime - The location in which to return the current RTC time.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on any failure.
+ *
+ ****************************************************************************/
+
+static int stm32_rdtime(FAR struct rtc_lowerhalf_s *lower,
+                        FAR struct rtc_time *rtctime)
+{
+#if defined(CONFIG_RTC_DATETIME)
+  /* This operation depends on the fact that struct rtc_time is cast
+   * compatible with struct tm.
+   */
+
+  return up_rtc_getdatetime((FAR struct tm *)rtctime);
+
+#elif defined(CONFIG_RTC_HIRES)
+  FAR struct timespec ts;
+  int ret;
+
+  /* Get the higher resolution time */
+
+  ret = up_rtc_gettime(&ts);
+  if (ret < 0)
+    {
+      goto errout_with_errno;
+    }
+
+  /* Convert the one second epoch time to a struct tm.  This operation
+   * depends on the fact that struct rtc_time and struct tm are cast
+   * compatible.
+   */
+
+  if (!gmtime_r(&ts.tv_sec, (FAR struct tm *)rtctime))
+    {
+      goto errout_with_errno;
+    }
+
+  return OK;
+
+errout_with_errno:
+  ret = get_errno();
+  DEBUGASSERT(ret > 0);
+  return -ret;
+
+#else
+  time_t timer;
+
+  /* The resolution of time is only 1 second */
+
+  timer = up_rtc_time();
+
+  /* Convert the one second epoch time to a struct tm */
+
+  if (!gmtime_r(&timer, (FAR struct tm *)rtctime))
+    {
+      int errcode = get_errno();
+      DEBUGASSERT(errcode > 0);
+      return -errcode;
+    }
+
+  return OK;
+#endif
+}
+
+/****************************************************************************
+ * Name: stm32_settime
+ *
+ * Description:
+ *   Implements the settime() method of the RTC driver interface
+ *
+ * Input Parameters:
+ *   lower   - A reference to RTC lower half driver state structure
+ *   rcttime - The new time to set
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on any failure.
+ *
+ ****************************************************************************/
+
+static int stm32_settime(FAR struct rtc_lowerhalf_s *lower,
+                         FAR const struct rtc_time *rtctime)
+{
+#ifdef CONFIG_RTC_DATETIME
+  /* This operation depends on the fact that struct rtc_time is cast
+   * compatible with struct tm.
+   */
+
+  return stm32_rtc_setdatetime((FAR const struct tm *)rtctime);
+
+#else
+  struct timespec ts;
+
+  /* Convert the struct rtc_time to a time_t.  Here we assume that struct
+   * rtc_time is cast compatible with struct tm.
+   */
+
+  ts.tv_sec  = mktime((FAR struct tm *)rtctime);
+  ts.tv_nsec = 0;
+
+  /* Now set the time (to one second accuracy) */
+
+  return up_rtc_settime(&ts);
+#endif
+}
+
+/****************************************************************************
+ * Name: stm32_setalarm
+ *
+ * Description:
+ *   Set a new alarm.  This function implements the setalarm() method of the
+ *   RTC driver interface
+ *
+ * Input Parameters:
+ *   lower - A reference to RTC lower half driver state structure
+ *   alarminfo - Provided information needed to set the alarm
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on any failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+static int stm32_setalarm(FAR struct rtc_lowerhalf_s *lower,
+                          FAR const struct lower_setalarm_s *alarminfo)
+{
+  FAR struct stm32_lowerhalf_s *priv;
+  FAR struct stm32_cbinfo_s *cbinfo;
+  struct alm_setalarm_s lowerinfo;
+  int ret = -EINVAL;
+
+  /* ID0-> Alarm A; ID1 -> Alarm B */
+
+  DEBUGASSERT(lower != NULL && alarminfo != NULL);
+  DEBUGASSERT(alarminfo->id == RTC_ALARMA || alarminfo->id == RTC_ALARMB);
+  priv = (FAR struct stm32_lowerhalf_s *)lower;
+
+  if (alarminfo->id == RTC_ALARMA || alarminfo->id == RTC_ALARMB)
+    {
+      /* Remember the callback information */
+
+      cbinfo            = &priv->cbinfo[alarminfo->id];
+      cbinfo->cb        = alarminfo->cb;
+      cbinfo->priv      = alarminfo->priv;
+      cbinfo->id        = alarminfo->id;
+
+      /* Set the alarm */
+
+      lowerinfo.as_id   = alarminfo->id;
+      lowerinfo.as_cb   = stm32_alarm_callback;
+      lowerinfo.as_arg  = priv;
+      memcpy(&lowerinfo.as_time, &alarminfo->time, sizeof(struct tm));
+
+      /* And set the alarm */
+
+      ret = stm32_rtc_setalarm(&lowerinfo);
+      if (ret < 0)
+        {
+          cbinfo->cb   = NULL;
+          cbinfo->priv = NULL;
+        }
+    }
+
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_setrelative
+ *
+ * Description:
+ *   Set a new alarm relative to the current time.  This function implements
+ *   the setrelative() method of the RTC driver interface
+ *
+ * Input Parameters:
+ *   lower - A reference to RTC lower half driver state structure
+ *   alarminfo - Provided information needed to set the alarm
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on any failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+static int stm32_setrelative(FAR struct rtc_lowerhalf_s *lower,
+                             FAR const struct lower_setrelative_s *alarminfo)
+{
+  struct lower_setalarm_s setalarm;
+  struct tm time;
+  time_t seconds;
+  int ret = -EINVAL;
+
+  ASSERT(lower != NULL && alarminfo != NULL);
+  DEBUGASSERT(alarminfo->id == RTC_ALARMA || alarminfo->id == RTC_ALARMB);
+
+  if ((alarminfo->id == RTC_ALARMA || alarminfo->id == RTC_ALARMB) &&
+      alarminfo->reltime > 0)
+    {
+      /* Disable pre-emption while we do this so that we don't have to worry
+       * about being suspended and working on an old time.
+       */
+
+      sched_lock();
+
+      /* Get the current time in broken out format */
+
+      ret = up_rtc_getdatetime(&time);
+      if (ret >= 0)
+        {
+          /* Convert to seconds since the epoch */
+
+          seconds = mktime(&time);
+
+          /* Add the seconds offset.  Add one to the number of seconds
+           * because we are unsure of the phase of the timer.
+           */
+
+          seconds += (alarminfo->reltime + 1);
+
+          /* And convert the time back to broken out format */
+
+          (void)gmtime_r(&seconds, (FAR struct tm *)&setalarm.time);
+
+          /* The set the alarm using this absolute time */
+
+          setalarm.id   = alarminfo->id;
+          setalarm.cb   = alarminfo->cb;
+          setalarm.priv = alarminfo->priv;
+
+          ret = stm32_setalarm(lower, &setalarm);
+        }
+
+      sched_unlock();
+    }
+
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_cancelalarm
+ *
+ * Description:
+ *   Cancel the current alarm.  This function implements the cancelalarm()
+ *   method of the RTC driver interface
+ *
+ * Input Parameters:
+ *   lower - A reference to RTC lower half driver state structure
+ *   alarminfo - Provided information needed to set the alarm
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on any failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+static int stm32_cancelalarm(FAR struct rtc_lowerhalf_s *lower, int alarmid)
+{
+  FAR struct stm32_lowerhalf_s *priv;
+  FAR struct stm32_cbinfo_s *cbinfo;
+  int ret = -EINVAL;
+
+  DEBUGASSERT(lower != NULL);
+  DEBUGASSERT(alarmid == RTC_ALARMA || alarmid == RTC_ALARMB);
+  priv = (FAR struct stm32_lowerhalf_s *)lower;
+
+  /* ID0-> Alarm A; ID1 -> Alarm B */
+
+  if (alarmid == RTC_ALARMA || alarmid == RTC_ALARMB)
+    {
+      /* Nullify callback information to reduce window for race conditions */
+
+      cbinfo       = &priv->cbinfo[alarmid];
+      cbinfo->cb   = NULL;
+      cbinfo->priv = NULL;
+
+      /* Then cancel the alarm */
+
+      ret = stm32_rtc_cancelalarm((enum alm_id_e)alarmid);
+    }
+
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_rtc_lowerhalf
+ *
+ * Description:
+ *   Instantiate the RTC lower half driver for the STM32.  General usage:
+ *
+ *     #include 
+ *     #include "stm32_rtc.h>
+ *
+ *     struct rtc_lowerhalf_s *lower;
+ *     lower = stm32_rtc_lowerhalf();
+ *     rtc_initialize(0, lower);
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   On success, a non-NULL RTC lower interface is returned.  NULL is
+ *   returned on any failure.
+ *
+ ****************************************************************************/
+
+FAR struct rtc_lowerhalf_s *stm32_rtc_lowerhalf(void)
+{
+  return (FAR struct rtc_lowerhalf_s *)&g_rtc_lowerhalf;
+}
+
+#endif /* CONFIG_RTC_DRIVER */
diff --git a/arch/arm/src/stm32f7/stm32_sdmmc.c b/arch/arm/src/stm32f7/stm32_sdmmc.c
new file mode 100644
index 0000000000000000000000000000000000000000..2249dc87c3bc9e8e4213ab96ea4d8e9a93edd756
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_sdmmc.c
@@ -0,0 +1,3319 @@
+/****************************************************************************
+ * arch/arm/src/stm32f7/stm32_sdmmc.c
+ *
+ *   Copyright (C) 2009, 2011-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "cache.h"
+#include "chip.h"
+#include "up_arch.h"
+
+#include "stm32_dma.h"
+#include "stm32_gpio.h"
+#include "stm32_sdmmc.h"
+
+#if defined(CONFIG_STM32F7_SDMMC1) || defined(CONFIG_STM32F7_SDMMC2)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+/* Required system configuration options:
+ *
+ *   CONFIG_ARCH_DMA - Enable architecture-specific DMA subsystem
+ *     initialization.  Required if CONFIG_SDMMC[1|2]_DMA is enabled.
+ *   CONFIG_STM32F7_DMA2 - Enable STM32 DMA2 support.  Required if
+ *     CONFIG_SDMMC[1|2]_DMA  is enabled
+ *   CONFIG_SCHED_WORKQUEUE -- Callback support requires work queue support.
+ *
+ * Driver-specific configuration options:
+ *
+ *   CONFIG_SDIO_MUXBUS - Setting this configuration enables some locking
+ *     APIs to manage concurrent accesses on the SDMMC bus.  This is not
+ *     needed for the simple case of a single SD card, for example.
+ *   CONFIG_STM32F7_SDMMC_DMA - Enable SDMMC.  This is a marginally optional.  For
+ *     most usages, SDMMC will cause data overruns if used without DMA.
+ *     NOTE the above system DMA configuration options.
+ *   CONFIG_SDMMC1/2_WIDTH_D1_ONLY - This may be selected to force the driver
+ *     operate with only a single data line (the default is to use all
+ *     4 SD data lines).
+ *   CONFIG_SDMMC_PRI - SDMMC interrupt priority.  This setting is not very
+ *     important since interrupt nesting is not currently supported.
+ *   CONFIG_SDMMMC_DMAPRIO - SDMMC DMA priority.  This can be selecte if
+ *     CONFIG_STM32F7_SDMMC_DMA is enabled.
+ *   CONFIG_CONFIG_STM32F7_SDMMC_XFRDEBUG - Enables some very low-level debug output
+ *     This also requires CONFIG_DEBUG_FS and CONFIG_DEBUG_INFO
+ */
+
+#ifndef CONFIG_STM32F7_SDMMC_DMA
+#  warning "Large Non-DMA transfer may result in RX overrun failures"
+#else
+#  ifndef CONFIG_STM32F7_DMA2
+#    error "CONFIG_STM32F7_SDMMC_DMA support requires CONFIG_STM32F7_DMA2"
+#  endif
+#  ifndef CONFIG_SDIO_DMA
+#    error CONFIG_SDIO_DMA must be defined with CONFIG_STM32F7_SDMMC_DMA
+#  endif
+#endif
+
+#ifndef CONFIG_SCHED_WORKQUEUE
+#  error "Callback support requires CONFIG_SCHED_WORKQUEUE"
+#endif
+
+#ifdef CONFIG_STM32F7_SDMMC1
+#  if defined(CONFIG_ARCH_IRQPRIO) && !defined(CONFIG_SDMMC1_PRI)
+#    define CONFIG_SDMMC1_PRI        NVIC_SYSH_PRIORITY_DEFAULT
+#  endif
+
+#  ifdef CONFIG_STM32F7_SDMMC_DMA
+#    ifndef CONFIG_STM32F7_SDMMC1_DMAPRIO
+#        define CONFIG_STM32F7_SDMMC1_DMAPRIO DMA_SCR_PRIVERYHI
+#    endif
+#    if (CONFIG_STM32F7_SDMMC1_DMAPRIO & ~DMA_SCR_PL_MASK) != 0
+#      error "Illegal value for CONFIG_STM32F7_SDMMC1_DMAPRIO"
+#    endif
+#  else
+#    undef CONFIG_STM32F7_SDMMC1_DMAPRIO
+#  endif
+#endif
+
+#ifdef CONFIG_STM32F7_SDMMC2
+#  if defined(CONFIG_ARCH_IRQPRIO) && !defined(CONFIG_SDMMC2_PRI)
+#    define CONFIG_SDMMC2_PRI        NVIC_SYSH_PRIORITY_DEFAULT
+#  endif
+
+#  ifdef CONFIG_STM32F7_SDMMC_DMA
+#    ifndef CONFIG_STM32F7_SDMMC2_DMAPRIO
+#        define CONFIG_STM32F7_SDMMC2_DMAPRIO DMA_SCR_PRIVERYHI
+#    endif
+#    if (CONFIG_STM32F7_SDMMC2_DMAPRIO & ~DMA_SCR_PL_MASK) != 0
+#      error "Illegal value for CONFIG_STM32F7_SDMMC2_DMAPRIO"
+#    endif
+#  else
+#    undef CONFIG_STM32F7_SDMMC2_DMAPRIO
+#  endif
+#endif
+
+#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG_FEATURES)
+#  undef CONFIG_CONFIG_STM32F7_SDMMC_XFRDEBUG
+#endif
+
+/* Friendly CLKCR bit re-definitions ****************************************/
+
+#define STM32_CLKCR_RISINGEDGE    (0)
+#define STM32_CLKCR_FALLINGEDGE   STM32_SDMMC_CLKCR_NEGEDGE
+
+/* Use the default of the rising edge but allow a configuration,
+ * that does not have the errata, to override the edge the SDIO
+ * command and data is changed on.
+ */
+
+#if !defined(STM32_SDMMC_CLKCR_EDGE)
+#  define STM32_SDMMC_CLKCR_EDGE STM32_CLKCR_RISINGEDGE
+#endif
+
+/* Mode dependent settings.  These depend on clock divisor settings that must
+ * be defined in the board-specific board.h header file: STM32_SDMMC_INIT_CLKDIV,
+ * STM32_SDMMC_MMCXFR_CLKDIV, and STM32_SDMMC_SDXFR_CLKDIV.
+ */
+
+#define STM32_CLCKCR_INIT           (STM32_SDMMC_INIT_CLKDIV      | \
+                                     STM32_SDMMC_CLKCR_EDGE | \
+                                     STM32_SDMMC_CLKCR_WIDBUS_D1)
+#define STM32_SDMMC_CLKCR_MMCXFR    (STM32_SDMMC_MMCXFR_CLKDIV    | \
+                                     STM32_SDMMC_CLKCR_EDGE | \
+                                     STM32_SDMMC_CLKCR_WIDBUS_D1)
+#define STM32_SDMMC_CLCKR_SDXFR     (STM32_SDMMC_SDXFR_CLKDIV     | \
+                                     STM32_SDMMC_CLKCR_EDGE | \
+                                     STM32_SDMMC_CLKCR_WIDBUS_D1)
+#define STM32_SDMMC_CLCKR_SDWIDEXFR (STM32_SDMMC_SDXFR_CLKDIV     | \
+                                     STM32_SDMMC_CLKCR_EDGE | \
+                                     STM32_SDMMC_CLKCR_WIDBUS_D4)
+
+/* Timing */
+
+#define SDMMC_CMDTIMEOUT         (100000)
+#define SDMMC_LONGTIMEOUT        (0x7fffffff)
+
+/* Big DTIMER setting */
+
+#define SDMMC_DTIMER_DATATIMEOUT (0x000fffff)
+
+/* DMA channel/stream configuration register settings.  The following
+ * must be selected.  The DMA driver will select the remaining fields.
+ *
+ * - 32-bit DMA
+ * - Memory increment
+ * - Direction (memory-to-peripheral, peripheral-to-memory)
+ * - Memory burst size (F4 only)
+ */
+
+
+/* STM32 stream configuration register (SCR) settings base settings sans
+ * priority.
+ */
+
+#  define SDMMC_RXDMA32_CONFIG   (DMA_SCR_PFCTRL | DMA_SCR_DIR_P2M|DMA_SCR_MINC | \
+                                  DMA_SCR_PSIZE_32BITS | DMA_SCR_MSIZE_32BITS | \
+                                  DMA_SCR_PBURST_INCR4 | DMA_SCR_MBURST_INCR4)
+#  define SDMMC_TXDMA32_CONFIG   (DMA_SCR_PFCTRL | DMA_SCR_DIR_M2P | DMA_SCR_MINC | \
+                                  DMA_SCR_PSIZE_32BITS | DMA_SCR_MSIZE_32BITS | \
+                                  DMA_SCR_PBURST_INCR4 | DMA_SCR_MBURST_INCR4)
+
+#ifdef DMAMAP_SDMMC1
+
+/* SDMMC DMA Channel/Stream selection.  There
+ * are multiple DMA stream options that must be dis-ambiguated in the board.h
+ * file.
+ */
+
+#  define SDMMC1_DMACHAN          DMAMAP_SDMMC1
+#endif
+
+
+#ifdef DMAMAP_SDMMC2
+
+/* SDMMC DMA Channel/Stream selection.  There
+ * are multiple DMA stream options that must be dis-ambiguated in the board.h
+ * file.
+ */
+
+#  define SDMMC2_DMACHAN           DMAMAP_SDMMC2
+#endif
+
+/* FIFO sizes */
+
+#define SDMMC_HALFFIFO_WORDS      (8)
+#define SDMMC_HALFFIFO_BYTES      (8*4)
+
+/* Data transfer interrupt mask bits */
+
+#define STM32_SDMMC_RECV_MASK     (STM32_SDMMC_MASK_DCRCFAILIE | \
+                                   STM32_SDMMC_MASK_DTIMEOUTIE | \
+                                   STM32_SDMMC_MASK_DATAENDIE  | \
+                                   STM32_SDMMC_MASK_RXOVERRIE  | \
+                                   STM32_SDMMC_MASK_RXFIFOHFIE | \
+                                   STM32_SDMMC_MASK_STBITERRIE)
+
+#define STM32_SDMMC_SEND_MASK     (STM32_SDMMC_MASK_DCRCFAILIE | \
+                                   STM32_SDMMC_MASK_DTIMEOUTIE | \
+                                   STM32_SDMMC_MASK_DATAENDIE  | \
+                                   STM32_SDMMC_MASK_TXUNDERRIE | \
+                                   STM32_SDMMC_MASK_TXFIFOHEIE | \
+                                   STM32_SDMMC_MASK_STBITERRIE)
+
+#define STM32_SDMMC_DMARECV_MASK  (STM32_SDMMC_MASK_DCRCFAILIE | \
+                                   STM32_SDMMC_MASK_DTIMEOUTIE | \
+                                   STM32_SDMMC_MASK_DATAENDIE  | \
+                                   STM32_SDMMC_MASK_RXOVERRIE | \
+                                   STM32_SDMMC_MASK_STBITERRIE)
+
+#define STM32_SDMMC_DMASEND_MASK  (STM32_SDMMC_MASK_DCRCFAILIE | \
+                                   STM32_SDMMC_MASK_DTIMEOUTIE | \
+                                   STM32_SDMMC_MASK_DATAENDIE  | \
+                                   STM32_SDMMC_MASK_TXUNDERRIE | \
+                                   STM32_SDMMC_MASK_STBITERRIE)
+
+/* Event waiting interrupt mask bits */
+
+#define STM32_SDMMC_CMDDONE_STA   (STM32_SDMMC_STA_CMDSENT)
+
+#define STM32_SDMMC_RESPDONE_STA  (STM32_SDMMC_STA_CTIMEOUT | \
+                                   STM32_SDMMC_STA_CCRCFAIL | \
+                                   STM32_SDMMC_STA_CMDREND)
+
+#define STM32_SDMMC_XFRDONE_STA   (0)
+
+#define STM32_SDMMC_CMDDONE_MASK  (STM32_SDMMC_MASK_CMDSENTIE)
+
+#define STM32_SDMMC_RESPDONE_MASK (STM32_SDMMC_MASK_CCRCFAILIE | \
+                                   STM32_SDMMC_MASK_CTIMEOUTIE | \
+                                   STM32_SDMMC_MASK_CMDRENDIE)
+
+#define STM32_SDMMC_XFRDONE_MASK  (0)
+
+#define STM32_SDMMC_CMDDONE_ICR   (STM32_SDMMC_ICR_CMDSENTC | \
+                                   STM32_SDMMC_ICR_DBCKENDC)
+
+#define STM32_SDMMC_RESPDONE_ICR  (STM32_SDMMC_ICR_CTIMEOUTC | \
+                                   STM32_SDMMC_ICR_CCRCFAILC | \
+                                   STM32_SDMMC_ICR_CMDRENDC  | \
+                                   STM32_SDMMC_ICR_DBCKENDC)
+
+#define STM32_SDMMC_XFRDONE_ICR   (STM32_SDMMC_ICR_DATAENDC  | \
+                                   STM32_SDMMC_ICR_DCRCFAILC | \
+                                   STM32_SDMMC_ICR_DTIMEOUTC | \
+                                   STM32_SDMMC_ICR_RXOVERRC  | \
+                                   STM32_SDMMC_ICR_TXUNDERRC | \
+                                   STM32_SDMMC_ICR_STBITERRC | \
+                                   STM32_SDMMC_ICR_DBCKENDC)
+
+#define STM32_SDMMC_WAITALL_ICR   (STM32_SDMMC_CMDDONE_ICR   | \
+                                   STM32_SDMMC_RESPDONE_ICR  | \
+                                   STM32_SDMMC_XFRDONE_ICR   | \
+                                   STM32_SDMMC_ICR_DBCKENDC)
+
+/* Let's wait until we have both SDIO transfer complete and DMA complete. */
+
+
+#define SDMMC_XFRDONE_FLAG  (1)
+#define SDMMC_DMADONE_FLAG  (2)
+#define SDMMC_ALLDONE       (3)
+
+/* Register logging support */
+
+#ifdef CONFIG_STM32F7_SDMMC_XFRDEBUG
+#  ifdef CONFIG_STM32F7_SDMMC_DMA
+#    define SAMPLENDX_BEFORE_SETUP  0
+#    define SAMPLENDX_BEFORE_ENABLE 1
+#    define SAMPLENDX_AFTER_SETUP   2
+#    define SAMPLENDX_END_TRANSFER  3
+#    define SAMPLENDX_DMA_CALLBACK  4
+#    define DEBUG_NSAMPLES          5
+#  else
+#    define SAMPLENDX_BEFORE_SETUP  0
+#    define SAMPLENDX_AFTER_SETUP   1
+#    define SAMPLENDX_END_TRANSFER  2
+#    define DEBUG_NSAMPLES          3
+#  endif
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* This structure defines the state of the STM32 SDMMC interface */
+
+struct stm32_dev_s
+{
+  struct sdio_dev_s  dev;        /* Standard, base SDIO interface */
+
+  /* STM32-specific extensions */
+  uint32_t          base;
+  int               nirq;
+#ifdef CONFIG_ARCH_IRQPRIO
+  int               irqprio;
+#endif
+#ifdef CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE
+  uint32_t          d0_gpio;
+#endif
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+  uint32_t          dmapri;
+#endif
+
+  /* Event support */
+
+  sem_t              waitsem;    /* Implements event waiting */
+  sdio_eventset_t    waitevents; /* Set of events to be waited for */
+  uint32_t           waitmask;   /* Interrupt enables for event waiting */
+  volatile sdio_eventset_t wkupevent; /* The event that caused the wakeup */
+  WDOG_ID            waitwdog;   /* Watchdog that handles event timeouts */
+
+  /* Callback support */
+
+  sdio_statset_t     cdstatus;   /* Card status */
+  sdio_eventset_t    cbevents;   /* Set of events to be cause callbacks */
+  worker_t           callback;   /* Registered callback function */
+  void              *cbarg;      /* Registered callback argument */
+  struct work_s      cbwork;     /* Callback work queue structure */
+
+  /* Interrupt mode data transfer support */
+
+  uint32_t          *buffer;     /* Address of current R/W buffer */
+  size_t             remaining;  /* Number of bytes remaining in the transfer */
+  uint32_t           xfrmask;    /* Interrupt enables for data transfer */
+
+  /* DMA data transfer support */
+
+  bool               widebus;    /* Required for DMA support */
+  bool               onebit;     /* true: Only 1-bit transfers are supported */
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+  volatile uint8_t   xfrflags;   /* Used to synchronize SDMMC and DMA completion events */
+  bool               dmamode;    /* true: DMA mode transfer */
+  DMA_HANDLE         dma;        /* Handle for DMA channel */
+#endif
+};
+
+/* Register logging support */
+
+#ifdef CONFIG_STM32F7_SDMMC_XFRDEBUG
+struct stm32_sdioregs_s
+{
+  uint8_t  power;
+  uint16_t clkcr;
+  uint16_t dctrl;
+  uint32_t dtimer;
+  uint32_t dlen;
+  uint32_t dcount;
+  uint32_t sta;
+  uint32_t mask;
+  uint32_t fifocnt;
+};
+
+struct stm32_sampleregs_s
+{
+  struct stm32_sdioregs_s sdio;
+#if defined(CONFIG_DEBUG_DMA_INFO) && defined(CONFIG_STM32F7_SDMMC_DMA)
+  struct stm32_dmaregs_s  dma;
+#endif
+};
+#endif
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* Low-level helpers ********************************************************/
+
+static inline void sdmmc_putreg32(struct stm32_dev_s *priv, uint32_t value,\
+                                  int offset);
+static inline uint32_t sdmmc_getreg32(struct stm32_dev_s *priv, int offset);
+static void stm32_takesem(struct stm32_dev_s *priv);
+#define     stm32_givesem(priv) (sem_post(&priv->waitsem))
+static inline void stm32_setclkcr(struct stm32_dev_s *priv, uint32_t clkcr);
+static void stm32_configwaitints(struct stm32_dev_s *priv, uint32_t waitmask,
+              sdio_eventset_t waitevents, sdio_eventset_t wkupevents);
+static void stm32_configxfrints(struct stm32_dev_s *priv, uint32_t xfrmask);
+static void stm32_setpwrctrl(struct stm32_dev_s *priv, uint32_t pwrctrl);
+static inline uint32_t stm32_getpwrctrl(struct stm32_dev_s *priv);
+
+/* DMA Helpers **************************************************************/
+
+#ifdef CONFIG_STM32F7_SDMMC_XFRDEBUG
+static void stm32_sampleinit(void);
+static void stm32_sdiosample(struct stm32_dev_s *priv,
+                             struct stm32_sdioregs_s *regs);
+static void stm32_sample(struct stm32_dev_s *priv, int index);
+static void stm32_sdiodump(struct stm32_sdioregs_s *regs, const char *msg);
+static void stm32_dumpsample(struct stm32_dev_s *priv,
+              struct stm32_sampleregs_s *regs, const char *msg);
+static void stm32_dumpsamples(struct stm32_dev_s *priv);
+#else
+#  define   stm32_sampleinit()
+#  define   stm32_sample(priv,index)
+#  define   stm32_dumpsamples(priv)
+#endif
+
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+static void stm32_dmacallback(DMA_HANDLE handle, uint8_t status, void *arg);
+#endif
+
+/* Data Transfer Helpers ****************************************************/
+
+static uint8_t stm32_log2(uint16_t value);
+static void stm32_dataconfig(struct stm32_dev_s *priv, uint32_t timeout,
+                             uint32_t dlen, uint32_t dctrl);
+static void stm32_datadisable(struct stm32_dev_s *priv);
+static void stm32_sendfifo(struct stm32_dev_s *priv);
+static void stm32_recvfifo(struct stm32_dev_s *priv);
+static void stm32_eventtimeout(int argc, uint32_t arg);
+static void stm32_endwait(struct stm32_dev_s *priv, sdio_eventset_t wkupevent);
+static void stm32_endtransfer(struct stm32_dev_s *priv, sdio_eventset_t wkupevent);
+
+/* Interrupt Handling *******************************************************/
+
+static int  stm32_sdmmc_interrupt(int irq, void *context, void *arg);
+#ifdef CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE
+static int  stm32_sdmmc_rdyinterrupt(int irq, void *context, void *arg);
+#endif
+
+/* SDIO interface methods ***************************************************/
+
+/* Mutual exclusion */
+
+#ifdef CONFIG_SDIO_MUXBUS
+static int stm32_lock(FAR struct sdio_dev_s *dev, bool lock);
+#endif
+
+/* Initialization/setup */
+
+static void stm32_reset(FAR struct sdio_dev_s *dev);
+static sdio_capset_t stm32_capabilities(FAR struct sdio_dev_s *dev);
+static sdio_statset_t stm32_status(FAR struct sdio_dev_s *dev);
+static void stm32_widebus(FAR struct sdio_dev_s *dev, bool enable);
+static void stm32_clock(FAR struct sdio_dev_s *dev,
+              enum sdio_clock_e rate);
+static int  stm32_attach(FAR struct sdio_dev_s *dev);
+
+/* Command/Status/Data Transfer */
+
+static int  stm32_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd,
+              uint32_t arg);
+static int  stm32_recvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
+              size_t nbytes);
+static int  stm32_sendsetup(FAR struct sdio_dev_s *dev,
+              FAR const uint8_t *buffer, uint32_t nbytes);
+static int  stm32_cancel(FAR struct sdio_dev_s *dev);
+
+static int  stm32_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd);
+static int  stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd,
+              uint32_t *rshort);
+static int  stm32_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd,
+              uint32_t rlong[4]);
+static int  stm32_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd,
+              uint32_t *rshort);
+static int  stm32_recvnotimpl(FAR struct sdio_dev_s *dev, uint32_t cmd,
+              uint32_t *rnotimpl);
+
+/* EVENT handler */
+
+static void stm32_waitenable(FAR struct sdio_dev_s *dev,
+              sdio_eventset_t eventset);
+static sdio_eventset_t
+            stm32_eventwait(FAR struct sdio_dev_s *dev, uint32_t timeout);
+static void stm32_callbackenable(FAR struct sdio_dev_s *dev,
+              sdio_eventset_t eventset);
+static int  stm32_registercallback(FAR struct sdio_dev_s *dev,
+              worker_t callback, void *arg);
+
+/* DMA */
+
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+#ifdef CONFIG_SDIO_PREFLIGHT
+static int  stm32_dmapreflight(FAR struct sdio_dev_s *dev,
+              FAR const uint8_t *buffer, size_t buflen);
+#endif
+static int  stm32_dmarecvsetup(FAR struct sdio_dev_s *dev,
+              FAR uint8_t *buffer, size_t buflen);
+static int  stm32_dmasendsetup(FAR struct sdio_dev_s *dev,
+              FAR const uint8_t *buffer, size_t buflen);
+#endif
+
+/* Initialization/uninitialization/reset ************************************/
+
+static void stm32_callback(void *arg);
+static void stm32_default(struct stm32_dev_s *priv);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+#ifdef CONFIG_STM32F7_SDMMC1
+struct stm32_dev_s g_sdmmcdev1 =
+{
+  .dev =
+  {
+#ifdef CONFIG_SDIO_MUXBUS
+    .lock             = stm32_lock,
+#endif
+    .reset            = stm32_reset,
+    .capabilities     = stm32_capabilities,
+    .status           = stm32_status,
+    .widebus          = stm32_widebus,
+    .clock            = stm32_clock,
+    .attach           = stm32_attach,
+    .sendcmd          = stm32_sendcmd,
+#ifdef CONFIG_SDIO_BLOCKSETUP
+    .blocksetup       = stm32_blocksetup, /* Not implemented yet */
+#endif
+    .recvsetup        = stm32_recvsetup,
+    .sendsetup        = stm32_sendsetup,
+    .cancel           = stm32_cancel,
+    .waitresponse     = stm32_waitresponse,
+    .recvR1           = stm32_recvshortcrc,
+    .recvR2           = stm32_recvlong,
+    .recvR3           = stm32_recvshort,
+    .recvR4           = stm32_recvnotimpl,
+    .recvR5           = stm32_recvnotimpl,
+    .recvR6           = stm32_recvshortcrc,
+    .recvR7           = stm32_recvshort,
+    .waitenable       = stm32_waitenable,
+    .eventwait        = stm32_eventwait,
+    .callbackenable   = stm32_callbackenable,
+    .registercallback = stm32_registercallback,
+#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+#ifdef CONFIG_SDIO_PREFLIGHT
+    .dmapreflight     = stm32_dmapreflight,
+#endif
+    .dmarecvsetup     = stm32_dmarecvsetup,
+    .dmasendsetup     = stm32_dmasendsetup,
+#else
+#ifdef CONFIG_SDIO_PREFLIGHT
+    .dmapreflight     = NULL,
+#endif
+    .dmarecvsetup     = stm32_recvsetup,
+    .dmasendsetup     = stm32_sendsetup,
+#endif
+#endif
+  },
+  .base              = STM32_SDMMC1_BASE,
+  .nirq              = STM32_IRQ_SDMMC1,
+#ifdef CONFIG_SDMMC1_PRI
+  .irqprio           = CONFIG_SDMMC1_PRI,
+#endif
+#ifdef CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE
+  .d0_gpio           = GPIO_SDMMC1_D0,
+#endif
+#ifdef CONFIG_STM32F7_SDMMC1_DMAPRIO
+  .dmapri            = CONFIG_STM32F7_SDMMC1_DMAPRIO,
+#endif
+};
+#endif
+#ifdef CONFIG_STM32F7_SDMMC2
+struct stm32_dev_s g_sdmmcdev2 =
+{
+  .dev =
+  {
+#ifdef CONFIG_SDIO_MUXBUS
+    .lock             = stm32_lock,
+#endif
+    .reset            = stm32_reset,
+    .capabilities     = stm32_capabilities,
+    .status           = stm32_status,
+    .widebus          = stm32_widebus,
+    .clock            = stm32_clock,
+    .attach           = stm32_attach,
+    .sendcmd          = stm32_sendcmd,
+#ifdef CONFIG_SDIO_BLOCKSETUP
+    .blocksetup       = stm32_blocksetup, /* Not implemented yet */
+#endif
+    .recvsetup        = stm32_recvsetup,
+    .sendsetup        = stm32_sendsetup,
+    .cancel           = stm32_cancel,
+    .waitresponse     = stm32_waitresponse,
+    .recvR1           = stm32_recvshortcrc,
+    .recvR2           = stm32_recvlong,
+    .recvR3           = stm32_recvshort,
+    .recvR4           = stm32_recvnotimpl,
+    .recvR5           = stm32_recvnotimpl,
+    .recvR6           = stm32_recvshortcrc,
+    .recvR7           = stm32_recvshort,
+    .waitenable       = stm32_waitenable,
+    .eventwait        = stm32_eventwait,
+    .callbackenable   = stm32_callbackenable,
+    .registercallback = stm32_registercallback,
+#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_SDIO_PREFLIGHT
+    .dmapreflight     = stm32_dmapreflight,
+#endif
+    .dmarecvsetup     = stm32_dmarecvsetup,
+    .dmasendsetup     = stm32_dmasendsetup,
+#endif
+  },
+  .base              = STM32_SDMMC2_BASE,
+  .nirq              = STM32_IRQ_SDMMC2,
+#ifdef CONFIG_SDMMC2_PRI
+  .irqprio           = CONFIG_SDMMC2_PRI,
+#endif
+#ifdef CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE
+  .d0_gpio           = GPIO_SDMMC2_D0,
+#endif
+#ifdef CONFIG_STM32F7_SDMMC2_DMAPRIO
+  .dmapri            = CONFIG_STM32F7_SDMMC2_DMAPRIO,
+#endif
+};
+#endif
+/* Register logging support */
+
+#ifdef CONFIG_STM32F7_SDMMC_XFRDEBUG
+static struct stm32_sampleregs_s g_sampleregs[DEBUG_NSAMPLES];
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Low-level Helpers
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sdmmc_putreg32
+ ****************************************************************************/
+
+static inline void sdmmc_putreg32(struct stm32_dev_s *priv, uint32_t value,\
+                                  int offset)
+{
+  putreg32(value, priv->base + offset);
+}
+
+/****************************************************************************
+ * Name: sdmmc_gettreg32
+ ****************************************************************************/
+
+static inline uint32_t sdmmc_getreg32(struct stm32_dev_s *priv, int offset)
+{
+  return getreg32(priv->base + offset);
+}
+
+/****************************************************************************
+ * Name: sdmmc_modifyreg32
+ ****************************************************************************/
+
+static inline void sdmmc_modifyreg32(struct stm32_dev_s *priv, int offset,
+                                      uint32_t clearbits, uint32_t setbits)
+{
+  irqstate_t flags;
+  int32_t   regval;
+
+  flags   = enter_critical_section();
+  regval  = getreg32(priv->base + offset);
+  regval &= ~clearbits;
+  regval |= setbits;
+  putreg32(regval, priv->base + offset);
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: stm32_takesem
+ *
+ * Description:
+ *   Take the wait semaphore (handling false alarm wakeups due to the receipt
+ *   of signals).
+ *
+ * Input Parameters:
+ *   priv  - Instance of the SDMMC private state structure.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void stm32_takesem(struct stm32_dev_s *priv)
+{
+  /* Take the semaphore (perhaps waiting) */
+
+  while (sem_wait(&priv->waitsem) != 0)
+    {
+      /* The only case that an error should occr here is if the wait was
+       * awakened by a signal.
+       */
+
+      ASSERT(errno == EINTR);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_setclkcr
+ *
+ * Description:
+ *   Modify oft-changed bits in the CLKCR register.  Only the following bit-
+ *   fields are changed:
+ *
+ *   CLKDIV, PWRSAV, BYPASS, WIDBUS, NEGEDGE, and HWFC_EN
+ *
+ * Input Parameters:
+ *   priv       - Instance of the SDMMC private state structure.
+ *   clkcr - A new CLKCR setting for the above mentions bits (other bits
+ *           are ignored.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static inline void stm32_setclkcr(struct stm32_dev_s *priv, uint32_t clkcr)
+{
+  uint32_t regval = sdmmc_getreg32(priv, STM32_SDMMC_CLKCR_OFFSET);
+
+  /* Clear CLKDIV, PWRSAV, BYPASS, WIDBUS, NEGEDGE, HWFC_EN bits */
+
+  regval &= ~(STM32_SDMMC_CLKCR_CLKDIV_MASK | STM32_SDMMC_CLKCR_PWRSAV      |
+              STM32_SDMMC_CLKCR_BYPASS      | STM32_SDMMC_CLKCR_WIDBUS_MASK |
+              STM32_SDMMC_CLKCR_NEGEDGE     | STM32_SDMMC_CLKCR_HWFC_EN     |
+              STM32_SDMMC_CLKCR_CLKEN);
+
+  /* Replace with user provided settings */
+
+  clkcr  &=  (STM32_SDMMC_CLKCR_CLKDIV_MASK | STM32_SDMMC_CLKCR_PWRSAV      |
+              STM32_SDMMC_CLKCR_BYPASS      | STM32_SDMMC_CLKCR_WIDBUS_MASK |
+              STM32_SDMMC_CLKCR_NEGEDGE     | STM32_SDMMC_CLKCR_HWFC_EN     |
+              STM32_SDMMC_CLKCR_CLKEN);
+
+  regval |=  clkcr;
+  sdmmc_putreg32(priv, regval, STM32_SDMMC_CLKCR_OFFSET);
+
+  mcinfo("CLKCR: %08x PWR: %08x\n",
+        sdmmc_getreg32(priv, STM32_SDMMC_CLKCR_OFFSET),
+        sdmmc_getreg32(priv, STM32_SDMMC_POWER_OFFSET));
+}
+
+/****************************************************************************
+ * Name: stm32_configwaitints
+ *
+ * Description:
+ *   Enable/disable SDIO interrupts needed to suport the wait function
+ *
+ * Input Parameters:
+ *   priv       - Instance of the SDMMC private state structure.
+ *   waitmask   - The set of bits in the SDIO MASK register to set
+ *   waitevents - Waited for events
+ *   wkupevent  - Wake-up events
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void stm32_configwaitints(struct stm32_dev_s *priv, uint32_t waitmask,
+                                 sdio_eventset_t waitevents,
+                                 sdio_eventset_t wkupevent)
+{
+  irqstate_t flags;
+#ifdef CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE
+  int pinset;
+#endif
+
+  /* Save all of the data and set the new interrupt mask in one, atomic
+   * operation.
+   */
+  flags = enter_critical_section();
+
+#ifdef CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE
+  if ((waitmask & SDIOWAIT_WRCOMPLETE) != 0)
+    {
+      /* Do not use this in STM32_SDMMC_MASK register */
+
+      waitmask &= !SDIOWAIT_WRCOMPLETE;
+
+      pinset = priv->d0_gpio & (GPIO_PORT_MASK | GPIO_PIN_MASK);
+      pinset |= (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI);
+
+      /* Arm the SDMMC_D Ready and install Isr */
+
+      (void)stm32_gpiosetevent(pinset, true, false, false,
+                               stm32_sdmmc_rdyinterrupt, priv);
+    }
+
+  /* Disarm SDMMC_D ready */
+
+  if ((wkupevent & SDIOWAIT_WRCOMPLETE) != 0)
+    {
+      (void)stm32_gpiosetevent(priv->d0_gpio, false, false, false,
+                               NULL, NULL);
+      stm32_configgpio(priv->d0_gpio);
+    }
+#endif
+
+  priv->waitevents = waitevents;
+  priv->wkupevent  = wkupevent;
+  priv->waitmask   = waitmask;
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+  priv->xfrflags   = 0;
+#endif
+  sdmmc_putreg32(priv, priv->xfrmask | priv->waitmask, STM32_SDMMC_MASK_OFFSET);
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: stm32_configxfrints
+ *
+ * Description:
+ *   Enable SDIO interrupts needed to support the data transfer event
+ *
+ * Input Parameters:
+ *   priv    - Instance of the SDMMC private state structure.
+ *   xfrmask - The set of bits in the SDIO MASK register to set
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void stm32_configxfrints(struct stm32_dev_s *priv, uint32_t xfrmask)
+{
+  irqstate_t flags;
+  flags = enter_critical_section();
+  priv->xfrmask = xfrmask;
+  sdmmc_putreg32(priv, priv->xfrmask | priv->waitmask, STM32_SDMMC_MASK_OFFSET);
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: stm32_setpwrctrl
+ *
+ * Description:
+ *   Change the PWRCTRL field of the SDIO POWER register to turn the SDIO
+ *   ON or OFF
+ *
+ * Input Parameters:
+ *   priv  - Instance of the SDMMC private state structure.
+ *   clkcr - A new PWRCTRL setting
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void stm32_setpwrctrl(struct stm32_dev_s *priv, uint32_t pwrctrl)
+{
+  uint32_t regval;
+
+  regval  = sdmmc_getreg32(priv, STM32_SDMMC_POWER_OFFSET);
+  regval &= ~STM32_SDMMC_POWER_PWRCTRL_MASK;
+  regval |= pwrctrl;
+  sdmmc_putreg32(priv, regval, STM32_SDMMC_POWER_OFFSET);
+}
+
+/****************************************************************************
+ * Name: stm32_getpwrctrl
+ *
+ * Description:
+ *   Return the current value of the  the PWRCTRL field of the SDIO POWER
+ *   register.  This function can be used to see if the SDIO is powered ON
+ *   or OFF
+ *
+ * Input Parameters:
+ *   priv  - Instance of the SDMMC private state structure.
+ *
+ * Returned Value:
+ *   The current value of the  the PWRCTRL field of the SDIO POWER register.
+ *
+ ****************************************************************************/
+
+static inline uint32_t stm32_getpwrctrl(struct stm32_dev_s *priv)
+{
+  return sdmmc_getreg32(priv, STM32_SDMMC_POWER_OFFSET) &
+                        STM32_SDMMC_POWER_PWRCTRL_MASK;
+}
+
+/****************************************************************************
+ * DMA Helpers
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_sampleinit
+ *
+ * Description:
+ *   Setup prior to collecting DMA samples
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32F7_SDMMC_XFRDEBUG
+static void stm32_sampleinit(void)
+{
+  memset(g_sampleregs, 0xff, DEBUG_NSAMPLES * sizeof(struct stm32_sampleregs_s));
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_sdiosample
+ *
+ * Description:
+ *   Sample SDIO registers
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32F7_SDMMC_XFRDEBUG
+static void stm32_sdiosample(struct stm32_dev_s *priv,
+                             struct stm32_sdioregs_s *regs)
+{
+  regs->power   = (uint8_t)sdmmc_getreg32(priv, STM32_SDMMC_POWER_OFFSET);
+  regs->clkcr   = (uint16_t)sdmmc_getreg32(priv, STM32_SDMMC_CLKCR_OFFSET);
+  regs->dctrl   = (uint16_t)sdmmc_getreg32(priv, STM32_SDMMC_DCTRL_OFFSET);
+  regs->dtimer  = sdmmc_getreg32(priv, STM32_SDMMC_DTIMER_OFFSET);
+  regs->dlen    = sdmmc_getreg32(priv, STM32_SDMMC_DLEN_OFFSET);
+  regs->dcount  = sdmmc_getreg32(priv, STM32_SDMMC_DCOUNT_OFFSET);
+  regs->sta     = sdmmc_getreg32(priv, STM32_SDMMC_STA_OFFSET);
+  regs->mask    = sdmmc_getreg32(priv, STM32_SDMMC_MASK_OFFSET);
+  regs->fifocnt = sdmmc_getreg32(priv, STM32_SDMMC_FIFOCNT_OFFSET);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_sample
+ *
+ * Description:
+ *   Sample SDIO/DMA registers
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32F7_SDMMC_XFRDEBUG
+static void stm32_sample(struct stm32_dev_s *priv, int index)
+{
+  struct stm32_sampleregs_s *regs = &g_sampleregs[index];
+
+#if defined(CONFIG_DEBUG_DMA_INFO) && defined(CONFIG_STM32F7_SDMMC_DMA)
+  if (priv->dmamode)
+    {
+      stm32_dmasample(priv->dma, ®s->dma);
+    }
+#endif
+
+  stm32_sdiosample(priv, ®s->sdio);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_sdiodump
+ *
+ * Description:
+ *   Dump one register sample
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32F7_SDMMC_XFRDEBUG
+static void stm32_sdiodump(struct stm32_sdioregs_s *regs, const char *msg)
+{
+  mcinfo("SDIO Registers: %s\n", msg);
+  mcinfo("  POWER[%08x]: %08x\n", STM32_SDMMC_POWER_OFFSET,   regs->power);
+  mcinfo("  CLKCR[%08x]: %08x\n", STM32_SDMMC_CLKCR_OFFSET,   regs->clkcr);
+  mcinfo("  DCTRL[%08x]: %08x\n", STM32_SDMMC_DCTRL_OFFSET,   regs->dctrl);
+  mcinfo(" DTIMER[%08x]: %08x\n", STM32_SDMMC_DTIMER_OFFSET,  regs->dtimer);
+  mcinfo("   DLEN[%08x]: %08x\n", STM32_SDMMC_DLEN_OFFSET,    regs->dlen);
+  mcinfo(" DCOUNT[%08x]: %08x\n", STM32_SDMMC_DCOUNT_OFFSET,  regs->dcount);
+  mcinfo("    STA[%08x]: %08x\n", STM32_SDMMC_STA_OFFSET,     regs->sta);
+  mcinfo("   MASK[%08x]: %08x\n", STM32_SDMMC_MASK_OFFSET,    regs->mask);
+  mcinfo("FIFOCNT[%08x]: %08x\n", STM32_SDMMC_FIFOCNT_OFFSET, regs->fifocnt);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_dumpsample
+ *
+ * Description:
+ *   Dump one register sample
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32F7_SDMMC_XFRDEBUG
+static void stm32_dumpsample(struct stm32_dev_s *priv,
+                             struct stm32_sampleregs_s *regs, const char *msg)
+{
+#if defined(CONFIG_DEBUG_DMA_INFO) && defined(CONFIG_STM32F7_SDMMC_DMA)
+  if (priv->dmamode)
+    {
+      stm32_dmadump(priv->dma, ®s->dma, msg);
+    }
+#endif
+
+  stm32_sdiodump(®s->sdio, msg);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_dumpsamples
+ *
+ * Description:
+ *   Dump all sampled register data
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32F7_SDMMC_XFRDEBUG
+static void stm32_dumpsamples(struct stm32_dev_s *priv)
+{
+  stm32_dumpsample(priv, &g_sampleregs[SAMPLENDX_BEFORE_SETUP], "Before setup");
+
+#if defined(CONFIG_DEBUG_DMA_INFO) && defined(CONFIG_STM32F7_SDMMC_DMA)
+  if (priv->dmamode)
+    {
+      stm32_dumpsample(priv, &g_sampleregs[SAMPLENDX_BEFORE_ENABLE], "Before DMA enable");
+    }
+#endif
+
+  stm32_dumpsample(priv, &g_sampleregs[SAMPLENDX_AFTER_SETUP], "After setup");
+  stm32_dumpsample(priv, &g_sampleregs[SAMPLENDX_END_TRANSFER], "End of transfer");
+
+#if defined(CONFIG_DEBUG_DMA_INFO) && defined(CONFIG_STM32F7_SDMMC_DMA)
+  if (priv->dmamode)
+    {
+      stm32_dumpsample(priv, &g_sampleregs[SAMPLENDX_DMA_CALLBACK], "DMA Callback");
+    }
+#endif
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_dmacallback
+ *
+ * Description:
+ *   Called when SDIO DMA completes
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+static void stm32_dmacallback(DMA_HANDLE handle, uint8_t status, void *arg)
+{
+  FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)arg;
+  DEBUGASSERT(priv->dmamode);
+  sdio_eventset_t result;
+
+  /* In the normal case, SDIO appears to handle the End-Of-Transfer interrupt
+   * first with the End-Of-DMA event occurring significantly later.  On
+   * transfer errors, however, the DMA error will occur before the End-of-
+   * Transfer.
+   */
+
+  stm32_sample((struct stm32_dev_s *)arg, SAMPLENDX_DMA_CALLBACK);
+
+  /* Get the result of the DMA transfer */
+
+  if ((status & DMA_STATUS_ERROR) != 0)
+    {
+      mcerr("DMA error %02x, remaining: %d\n", status, priv->remaining);
+      result = SDIOWAIT_ERROR;
+    }
+  else
+    {
+      result = SDIOWAIT_TRANSFERDONE;
+    }
+
+  /* Then terminate the transfer if this completes all of the steps in the
+   * transfer OR if a DMA error occurred.  In the non-error case, we should
+   * already have the SDIO transfer done interrupt.  If not, the transfer
+   * will appropriately time out.
+   */
+
+  priv->xfrflags |= SDMMC_DMADONE_FLAG;
+  if (priv->xfrflags == SDMMC_ALLDONE || result == SDIOWAIT_ERROR)
+    {
+      stm32_endtransfer(priv, result);
+    }
+}
+#endif
+
+/****************************************************************************
+ * Data Transfer Helpers
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_log2
+ *
+ * Description:
+ *   Take (approximate) log base 2 of the provided number (Only works if the
+ *   provided number is a power of 2).
+ *
+ ****************************************************************************/
+
+static uint8_t stm32_log2(uint16_t value)
+{
+  uint8_t log2 = 0;
+
+  /* 0000 0000 0000 0001 -> return 0,
+   * 0000 0000 0000 001x -> return 1,
+   * 0000 0000 0000 01xx -> return 2,
+   * 0000 0000 0000 1xxx -> return 3,
+   * ...
+   * 1xxx xxxx xxxx xxxx -> return 15,
+   */
+
+  DEBUGASSERT(value > 0);
+  while (value != 1)
+    {
+      value >>= 1;
+      log2++;
+    }
+
+  return log2;
+}
+
+/****************************************************************************
+ * Name: stm32_dataconfig
+ *
+ * Description:
+ *   Configure the SDIO data path for the next data transfer
+ *
+ ****************************************************************************/
+
+static void stm32_dataconfig(struct stm32_dev_s *priv, uint32_t timeout,
+                             uint32_t dlen, uint32_t dctrl)
+{
+  uint32_t regval = 0;
+
+  /* Enable data path */
+
+  sdmmc_putreg32(priv, timeout, STM32_SDMMC_DTIMER_OFFSET); /* Set DTIMER */
+  sdmmc_putreg32(priv, dlen,    STM32_SDMMC_DLEN_OFFSET);   /* Set DLEN */
+
+  /* Configure DCTRL DTDIR, DTMODE, and DBLOCKSIZE fields and set the DTEN
+   * field
+   */
+
+  regval  =  sdmmc_getreg32(priv, STM32_SDMMC_DCTRL_OFFSET);
+  regval &= ~(STM32_SDMMC_DCTRL_DTDIR | STM32_SDMMC_DCTRL_DTMODE |
+              STM32_SDMMC_DCTRL_DBLOCKSIZE_MASK);
+  dctrl  &=  (STM32_SDMMC_DCTRL_DTDIR | STM32_SDMMC_DCTRL_DTMODE |
+              STM32_SDMMC_DCTRL_DBLOCKSIZE_MASK);
+  regval |=  (dctrl | STM32_SDMMC_DCTRL_DTEN);
+  sdmmc_putreg32(priv, regval, STM32_SDMMC_DCTRL_OFFSET);
+}
+
+/****************************************************************************
+ * Name: stm32_datadisable
+ *
+ * Description:
+ *   Disable the SDIO data path setup by stm32_dataconfig() and
+ *   disable DMA.
+ *
+ ****************************************************************************/
+
+static void stm32_datadisable(struct stm32_dev_s *priv)
+{
+  uint32_t regval;
+
+  /* Disable the data path */
+
+  /* Reset DTIMER */
+  sdmmc_putreg32(priv, SDMMC_DTIMER_DATATIMEOUT, STM32_SDMMC_DTIMER_OFFSET);
+  sdmmc_putreg32(priv, 0, STM32_SDMMC_DLEN_OFFSET);   /* Reset DLEN */
+
+  /* Reset DCTRL DTEN, DTDIR, DTMODE, DMAEN, and DBLOCKSIZE fields */
+
+  regval  = sdmmc_getreg32(priv, STM32_SDMMC_DCTRL_OFFSET);
+  regval &= ~(STM32_SDMMC_DCTRL_DTEN   | STM32_SDMMC_DCTRL_DTDIR |
+              STM32_SDMMC_DCTRL_DTMODE | STM32_SDMMC_DCTRL_DMAEN |
+              STM32_SDMMC_DCTRL_DBLOCKSIZE_MASK);
+  sdmmc_putreg32(priv, regval, STM32_SDMMC_DCTRL_OFFSET);
+}
+
+/****************************************************************************
+ * Name: stm32_sendfifo
+ *
+ * Description:
+ *   Send SDIO data in interrupt mode
+ *
+ * Input Parameters:
+ *   priv  - Instance of the SDMMC private state structure.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void stm32_sendfifo(struct stm32_dev_s *priv)
+{
+  union
+  {
+    uint32_t w;
+    uint8_t  b[4];
+  } data;
+
+  /* Loop while there is more data to be sent and the RX FIFO is not full */
+
+  while (priv->remaining > 0 &&
+         (sdmmc_getreg32(priv, STM32_SDMMC_STA_OFFSET) & STM32_SDMMC_STA_TXFIFOF) == 0)
+    {
+      /* Is there a full word remaining in the user buffer? */
+
+      if (priv->remaining >= sizeof(uint32_t))
+        {
+          /* Yes, transfer the word to the TX FIFO */
+
+          data.w           = *priv->buffer++;
+          priv->remaining -= sizeof(uint32_t);
+        }
+      else
+        {
+          /* No.. transfer just the bytes remaining in the user buffer,
+           * padding with zero as necessary to extend to a full word.
+           */
+
+          uint8_t *ptr = (uint8_t *)priv->remaining;
+          int i;
+
+          data.w = 0;
+          for (i = 0; i < (int)priv->remaining; i++)
+            {
+              data.b[i] = *ptr++;
+            }
+
+          /* Now the transfer is finished */
+
+          priv->remaining = 0;
+        }
+
+      /* Put the word in the FIFO */
+
+     sdmmc_putreg32(priv, data.w, STM32_SDMMC_FIFO_OFFSET);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_recvfifo
+ *
+ * Description:
+ *   Receive SDIO data in interrupt mode
+ *
+ * Input Parameters:
+ *   priv  - Instance of the SDMMC private state structure.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void stm32_recvfifo(struct stm32_dev_s *priv)
+{
+  union
+  {
+    uint32_t w;
+    uint8_t  b[4];
+  } data;
+
+  /* Loop while there is space to store the data and there is more
+   * data available in the RX FIFO.
+   */
+
+  while (priv->remaining > 0 &&
+         (sdmmc_getreg32(priv, STM32_SDMMC_STA_OFFSET) & STM32_SDMMC_STA_RXDAVL) != 0)
+    {
+      /* Read the next word from the RX FIFO */
+
+      data.w = sdmmc_getreg32(priv, STM32_SDMMC_FIFO_OFFSET);
+      if (priv->remaining >= sizeof(uint32_t))
+        {
+          /* Transfer the whole word to the user buffer */
+
+          *priv->buffer++  = data.w;
+          priv->remaining -= sizeof(uint32_t);
+        }
+      else
+        {
+          /* Transfer any trailing fractional word */
+
+          uint8_t *ptr = (uint8_t *)priv->buffer;
+          int i;
+
+          for (i = 0; i < (int)priv->remaining; i++)
+            {
+               *ptr++ = data.b[i];
+            }
+
+          /* Now the transfer is finished */
+
+          priv->remaining = 0;
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_eventtimeout
+ *
+ * Description:
+ *   The watchdog timeout setup when the event wait start has expired without
+ *   any other waited-for event occurring.
+ *
+ * Input Parameters:
+ *   argc   - The number of arguments (should be 1)
+ *   arg    - The argument (the SDMMC private state structure reference cast
+ *            to uint32_t)
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Always called from the interrupt level with interrupts disabled.
+ *
+ ****************************************************************************/
+
+static void stm32_eventtimeout(int argc, uint32_t arg)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)arg;
+
+  /* There is always race conditions with timer expirations. */
+
+  DEBUGASSERT((priv->waitevents & SDIOWAIT_TIMEOUT) != 0 ||
+              priv->wkupevent != 0);
+
+  /* Is a data transfer complete event expected? */
+
+  if ((priv->waitevents & SDIOWAIT_TIMEOUT) != 0)
+    {
+      /* Yes.. wake up any waiting threads */
+
+      stm32_endwait(priv, SDIOWAIT_TIMEOUT);
+      mcerr("Timeout: remaining: %d\n", priv->remaining);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_endwait
+ *
+ * Description:
+ *   Wake up a waiting thread if the waited-for event has occurred.
+ *
+ * Input Parameters:
+ *   priv  - Instance of the SDMMC private state structure.
+ *   wkupevent - The event that caused the wait to end
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Always called from the interrupt level with interrupts disabled.
+ *
+ ****************************************************************************/
+
+static void stm32_endwait(struct stm32_dev_s *priv, sdio_eventset_t wkupevent)
+{
+  /* Cancel the watchdog timeout */
+
+  (void)wd_cancel(priv->waitwdog);
+
+  /* Disable event-related interrupts */
+
+  stm32_configwaitints(priv, 0, 0, wkupevent);
+
+  /* Wake up the waiting thread */
+
+  stm32_givesem(priv);
+}
+
+/****************************************************************************
+ * Name: stm32_endtransfer
+ *
+ * Description:
+ *   Terminate a transfer with the provided status.  This function is called
+ *   only from the SDIO interrupt handler when end-of-transfer conditions
+ *   are detected.
+ *
+ * Input Parameters:
+ *   priv  - Instance of the SDMMC private state structure.
+ *   wkupevent - The event that caused the transfer to end
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Always called from the interrupt level with interrupts disabled.
+ *
+ ****************************************************************************/
+
+static void stm32_endtransfer(struct stm32_dev_s *priv,
+                              sdio_eventset_t wkupevent)
+{
+  /* Disable all transfer related interrupts */
+
+  stm32_configxfrints(priv, 0);
+
+  /* Clearing pending interrupt status on all transfer related interrupts */
+
+  sdmmc_putreg32(priv, STM32_SDMMC_XFRDONE_ICR, STM32_SDMMC_ICR_OFFSET);
+
+  /* If this was a DMA transfer, make sure that DMA is stopped */
+
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+  if (priv->dmamode)
+    {
+      /* DMA debug instrumentation */
+
+      stm32_sample(priv, SAMPLENDX_END_TRANSFER);
+
+      /* Make sure that the DMA is stopped (it will be stopped automatically
+       * on normal transfers, but not necessarily when the transfer terminates
+       * on an error condition).
+       */
+
+      stm32_dmastop(priv->dma);
+    }
+#endif
+
+  /* Mark the transfer finished */
+
+  priv->remaining = 0;
+
+  /* Is a thread wait for these data transfer complete events? */
+
+  if ((priv->waitevents & wkupevent) != 0)
+    {
+      /* Yes.. wake up any waiting threads */
+
+      stm32_endwait(priv, wkupevent);
+    }
+}
+
+/****************************************************************************
+ * Interrupt Handling
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_sdmmc[1|2]_rdyinterrupt
+ *
+ * Description:
+ *   SDMMC ready interrupt handler
+ *
+ * Input Parameters:
+ *   irq     - not used
+ *   context - not used
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE
+static int stm32_sdmmc_rdyinterrupt(int irq, void *context, void *arg)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)arg;
+  stm32_endwait(priv, SDIOWAIT_WRCOMPLETE);
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_sdmmc_interrupt
+ *
+ * Description:
+ *   SDMMC interrupt handler
+ *
+ * Input Parameters:
+ *   priv  - Instance of the SDMMC private state structure.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static int stm32_sdmmc_interrupt(int irq, void *context, void *arg);
+{
+  struct stm32_dev_s *priv =(struct stm32_dev_s *)arg;
+  uint32_t enabled;
+  uint32_t pending;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Loop while there are pending interrupts.  Check the SDIO status
+   * register.  Mask out all bits that don't correspond to enabled
+   * interrupts.  (This depends on the fact that bits are ordered
+   * the same in both the STA and MASK register).  If there are non-zero
+   * bits remaining, then we have work to do here.
+   */
+
+  while ((enabled = sdmmc_getreg32(priv, STM32_SDMMC_STA_OFFSET) &
+          sdmmc_getreg32(priv, STM32_SDMMC_MASK_OFFSET)) != 0)
+    {
+      /* Handle in progress, interrupt driven data transfers ****************/
+
+      pending  = enabled & priv->xfrmask;
+      if (pending != 0)
+        {
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+          if (!priv->dmamode)
+#endif
+            {
+              /* Is the RX FIFO half full or more?  Is so then we must be
+               * processing a receive transaction.
+               */
+
+              if ((pending & STM32_SDMMC_STA_RXFIFOHF) != 0)
+                {
+                  /* Receive data from the RX FIFO */
+
+                  stm32_recvfifo(priv);
+                }
+
+              /* Otherwise, Is the transmit FIFO half empty or less?  If so we must
+               * be processing a send transaction.  NOTE:  We can't be processing
+               * both!
+               */
+
+              else if ((pending & STM32_SDMMC_STA_TXFIFOHE) != 0)
+                {
+                  /* Send data via the TX FIFO */
+
+                  stm32_sendfifo(priv);
+                }
+            }
+
+          /* Handle data end events */
+
+          if ((pending & STM32_SDMMC_STA_DATAEND) != 0)
+            {
+              /* Handle any data remaining the RX FIFO.  If the RX FIFO is
+               * less than half full at the end of the transfer, then no
+               * half-full interrupt will be received.
+               */
+
+              /* Was this transfer performed in DMA mode? */
+
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+              if (priv->dmamode)
+                {
+                  /* Yes.. Terminate the transfers only if the DMA has also
+                   * finished.
+                   */
+
+                  priv->xfrflags |= SDMMC_XFRDONE_FLAG;
+                  if (priv->xfrflags == SDMMC_ALLDONE)
+                    {
+                      stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE);
+                    }
+
+                  /* Otherwise, just disable futher transfer interrupts and
+                   * wait for the DMA complete event.
+                   */
+
+                  else
+                    {
+                      stm32_configxfrints(priv, 0);
+                    }
+                }
+              else
+#endif
+                {
+                  /* Receive data from the RX FIFO */
+
+                  stm32_recvfifo(priv);
+
+                  /* Then terminate the transfer */
+
+                  stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE);
+                }
+            }
+
+          /* Handle data block send/receive CRC failure */
+
+          else if ((pending & STM32_SDMMC_STA_DCRCFAIL) != 0)
+            {
+              /* Terminate the transfer with an error */
+
+              mcerr("ERROR: Data block CRC failure, remaining: %d\n",
+                    priv->remaining);
+              stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
+            }
+
+          /* Handle data timeout error */
+
+          else if ((pending & STM32_SDMMC_STA_DTIMEOUT) != 0)
+            {
+              /* Terminate the transfer with an error */
+
+              mcerr("ERROR: Data timeout, remaining: %d\n", priv->remaining);
+              stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT);
+            }
+
+          /* Handle RX FIFO overrun error */
+
+          else if ((pending & STM32_SDMMC_STA_RXOVERR) != 0)
+            {
+              /* Terminate the transfer with an error */
+
+              mcerr("ERROR: RX FIFO overrun, remaining: %d\n", priv->remaining);
+              stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
+            }
+
+          /* Handle TX FIFO underrun error */
+
+          else if ((pending & STM32_SDMMC_STA_TXUNDERR) != 0)
+            {
+              /* Terminate the transfer with an error */
+
+              mcerr("ERROR: TX FIFO underrun, remaining: %d\n", priv->remaining);
+              stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
+            }
+
+          /* Handle start bit error */
+
+          else if ((pending & STM32_SDMMC_STA_STBITERR) != 0)
+            {
+              /* Terminate the transfer with an error */
+
+              mcerr("ERROR: Start bit, remaining: %d\n", priv->remaining);
+              stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
+            }
+        }
+
+      /* Handle wait events *************************************************/
+
+      pending  = enabled & priv->waitmask;
+      if (pending != 0)
+        {
+          /* Is this a response completion event? */
+
+          if ((pending & STM32_SDMMC_RESPDONE_STA) != 0)
+            {
+              /* Yes.. Is their a thread waiting for response done? */
+
+              if ((priv->waitevents & SDIOWAIT_RESPONSEDONE) != 0)
+                {
+                  /* Yes.. wake the thread up */
+
+                 sdmmc_putreg32(priv, STM32_SDMMC_RESPDONE_ICR |
+                                STM32_SDMMC_CMDDONE_ICR, STM32_SDMMC_ICR_OFFSET);
+                  stm32_endwait(priv, SDIOWAIT_RESPONSEDONE);
+                }
+            }
+
+          /* Is this a command completion event? */
+
+          if ((pending & STM32_SDMMC_CMDDONE_STA) != 0)
+            {
+              /* Yes.. Is their a thread waiting for command done? */
+
+              if ((priv->waitevents & SDIOWAIT_RESPONSEDONE) != 0)
+                {
+                  /* Yes.. wake the thread up */
+
+                 sdmmc_putreg32(priv, STM32_SDMMC_CMDDONE_ICR,
+                                STM32_SDMMC_ICR_OFFSET);
+                  stm32_endwait(priv, SDIOWAIT_CMDDONE);
+                }
+            }
+        }
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * SDIO Interface Methods
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_lock
+ *
+ * Description:
+ *   Locks the bus. Function calls low-level multiplexed bus routines to
+ *   resolve bus requests and acknowledgment issues.
+ *
+ * Input Parameters:
+ *   dev    - An instance of the SDIO device interface
+ *   lock   - TRUE to lock, FALSE to unlock.
+ *
+ * Returned Value:
+ *   OK on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SDIO_MUXBUS
+static int stm32_lock(FAR struct sdio_dev_s *dev, bool lock)
+{
+  /* The multiplex bus is part of board support package.
+   */
+  stm32_muxbus_sdio_lock(dev, lock);
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_reset
+ *
+ * Description:
+ *   Reset the SDIO controller.  Undo all setup and initialization.
+ *
+ * Input Parameters:
+ *   dev    - An instance of the SDIO device interface
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void stm32_reset(FAR struct sdio_dev_s *dev)
+{
+  FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev;
+  irqstate_t flags;
+
+  /* Disable clocking */
+
+  flags = enter_critical_section();
+  sdmmc_modifyreg32(priv, STM32_SDMMC_CLKCR_OFFSET, STM32_SDMMC_CLKCR_CLKEN, 0);
+  stm32_setpwrctrl(priv, STM32_SDMMC_POWER_PWRCTRL_OFF);
+
+  /* Put SDIO registers in their default, reset state */
+
+  stm32_default(priv);
+
+  /* Reset data */
+
+  priv->waitevents = 0;      /* Set of events to be waited for */
+  priv->waitmask   = 0;      /* Interrupt enables for event waiting */
+  priv->wkupevent  = 0;      /* The event that caused the wakeup */
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+  priv->xfrflags   = 0;      /* Used to synchronize SDIO and DMA
+                              * completion events */
+#endif
+
+  wd_cancel(priv->waitwdog); /* Cancel any timeouts */
+
+  /* Interrupt mode data transfer support */
+
+  priv->buffer     = 0;      /* Address of current R/W buffer */
+  priv->remaining  = 0;      /* Number of bytes remaining in the transfer */
+  priv->xfrmask    = 0;      /* Interrupt enables for data transfer */
+
+  /* DMA data transfer support */
+
+  priv->widebus    = false;  /* Required for DMA support */
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+  priv->dmamode    = false;  /* true: DMA mode transfer */
+#endif
+
+  /* Configure the SDIO peripheral */
+
+  stm32_setclkcr(priv, STM32_CLCKCR_INIT | STM32_SDMMC_CLKCR_CLKEN);
+  stm32_setpwrctrl(priv, STM32_SDMMC_POWER_PWRCTRL_ON);
+  leave_critical_section(flags);
+
+  mcinfo("CLCKR: %08x POWER: %08x\n",
+        sdmmc_getreg32(priv, STM32_SDMMC_CLKCR_OFFSET),
+        sdmmc_getreg32(priv, STM32_SDMMC_POWER_OFFSET));
+}
+
+/****************************************************************************
+ * Name: stm32_capabilities
+ *
+ * Description:
+ *   Get capabilities (and limitations) of the SDIO driver (optional)
+ *
+ * Input Parameters:
+ *   dev   - Device-specific state data
+ *
+ * Returned Value:
+ *   Returns a bitset of status values (see SDIO_CAPS_* defines)
+ *
+ ****************************************************************************/
+
+static sdio_capset_t stm32_capabilities(FAR struct sdio_dev_s *dev)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+  sdio_capset_t caps = 0;
+
+  if (priv->onebit)
+    {
+      caps |= SDIO_CAPS_1BIT_ONLY;
+    }
+
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+  caps |= SDIO_CAPS_DMASUPPORTED;
+#endif
+
+  return caps;
+}
+
+/****************************************************************************
+ * Name: stm32_status
+ *
+ * Description:
+ *   Get SDIO status.
+ *
+ * Input Parameters:
+ *   dev   - Device-specific state data
+ *
+ * Returned Value:
+ *   Returns a bitset of status values (see stm32_status_* defines)
+ *
+ ****************************************************************************/
+
+static sdio_statset_t stm32_status(FAR struct sdio_dev_s *dev)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+  return priv->cdstatus;
+}
+
+/****************************************************************************
+ * Name: stm32_widebus
+ *
+ * Description:
+ *   Called after change in Bus width has been selected (via ACMD6).  Most
+ *   controllers will need to perform some special operations to work
+ *   correctly in the new bus mode.
+ *
+ * Input Parameters:
+ *   dev  - An instance of the SDIO device interface
+ *   wide - true: wide bus (4-bit) bus mode enabled
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void stm32_widebus(FAR struct sdio_dev_s *dev, bool wide)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+  priv->widebus = wide;
+}
+
+/****************************************************************************
+ * Name: stm32_clock
+ *
+ * Description:
+ *   Enable/disable SDIO clocking
+ *
+ * Input Parameters:
+ *   dev  - An instance of the SDIO device interface
+ *   rate - Specifies the clocking to use (see enum sdio_clock_e)
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void stm32_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+  uint32_t clckr;
+
+  switch (rate)
+    {
+      /* Disable clocking (with default ID mode divisor) */
+
+      default:
+      case CLOCK_SDIO_DISABLED:
+        clckr = STM32_CLCKCR_INIT;
+        return;
+
+      /* Enable in initial ID mode clocking (<400KHz) */
+
+      case CLOCK_IDMODE:
+        clckr = (STM32_CLCKCR_INIT | STM32_SDMMC_CLKCR_CLKEN);
+        break;
+
+      /* Enable in MMC normal operation clocking */
+
+      case CLOCK_MMC_TRANSFER:
+        clckr = (STM32_SDMMC_CLKCR_MMCXFR | STM32_SDMMC_CLKCR_CLKEN);
+        break;
+
+      /* SD normal operation clocking (wide 4-bit mode) */
+
+      case CLOCK_SD_TRANSFER_4BIT:
+        if (!priv->onebit)
+          {
+            clckr = (STM32_SDMMC_CLCKR_SDWIDEXFR | STM32_SDMMC_CLKCR_CLKEN);
+            break;
+          }
+
+      /* SD normal operation clocking (narrow 1-bit mode) */
+
+      case CLOCK_SD_TRANSFER_1BIT:
+        clckr = (STM32_SDMMC_CLCKR_SDXFR | STM32_SDMMC_CLKCR_CLKEN);
+        break;
+    }
+
+  /* Set the new clock frequency along with the clock enable/disable bit */
+
+  stm32_setclkcr(priv, clckr);
+}
+
+/****************************************************************************
+ * Name: stm32_attach
+ *
+ * Description:
+ *   Attach and prepare interrupts
+ *
+ * Input Parameters:
+ *   dev - An instance of the SDIO device interface
+ *
+ * Returned Value:
+ *   OK on success; A negated errno on failure.
+ *
+ ****************************************************************************/
+
+static int stm32_attach(FAR struct sdio_dev_s *dev)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+  int ret;
+
+  /* Attach the SDIO interrupt handler */
+
+  ret = irq_attach(priv->nirq, stm32_sdmmc_interrupt, priv);
+  if (ret == OK)
+    {
+
+      /* Disable all interrupts at the SDIO controller and clear static
+       * interrupt flags
+       */
+
+     sdmmc_putreg32(priv, STM32_SDMMC_MASK_RESET, STM32_SDMMC_MASK_OFFSET);
+     sdmmc_putreg32(priv, STM32_SDMMC_ICR_STATICFLAGS, STM32_SDMMC_ICR_OFFSET);
+
+      /* Enable SDIO interrupts at the NVIC.  They can now be enabled at
+       * the SDIO controller as needed.
+       */
+
+      up_enable_irq(priv->nirq);
+
+#if defined(CONFIG_ARCH_IRQPRIO) && (defined(CONFIG_STM32F7_SDMMC1_DMAPRIO) || \
+                                     defined(CONFIG_STM32F7_SDMMC2_DMAPRIO))
+      /* Set the interrupt priority */
+
+      up_prioritize_irq(priv->nirq, priv->irqprio);
+#endif
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32_sendcmd
+ *
+ * Description:
+ *   Send the SDIO command
+ *
+ * Input Parameters:
+ *   dev  - An instance of the SDIO device interface
+ *   cmd  - The command to send (32-bits, encoded)
+ *   arg  - 32-bit argument required with some commands
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static int stm32_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t arg)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+  uint32_t regval;
+  uint32_t cmdidx;
+
+  /* Set the SDIO Argument value */
+
+  sdmmc_putreg32(priv, arg, STM32_SDMMC_ARG_OFFSET);
+
+  /* Clear CMDINDEX, WAITRESP, WAITINT, WAITPEND, and CPSMEN bits */
+
+  regval = sdmmc_getreg32(priv, STM32_SDMMC_CMD_OFFSET);
+  regval &= ~(STM32_SDMMC_CMD_CMDINDEX_MASK | STM32_SDMMC_CMD_WAITRESP_MASK |
+              STM32_SDMMC_CMD_WAITINT       | STM32_SDMMC_CMD_WAITPEND      |
+              STM32_SDMMC_CMD_CPSMEN);
+
+  /* Set WAITRESP bits */
+
+  switch (cmd & MMCSD_RESPONSE_MASK)
+    {
+    case MMCSD_NO_RESPONSE:
+      regval |= STM32_SDMMC_CMD_NORESPONSE;
+      break;
+
+    case MMCSD_R1_RESPONSE:
+    case MMCSD_R1B_RESPONSE:
+    case MMCSD_R3_RESPONSE:
+    case MMCSD_R4_RESPONSE:
+    case MMCSD_R5_RESPONSE:
+    case MMCSD_R6_RESPONSE:
+    case MMCSD_R7_RESPONSE:
+      regval |= STM32_SDMMC_CMD_SHORTRESPONSE;
+      break;
+
+    case MMCSD_R2_RESPONSE:
+      regval |= STM32_SDMMC_CMD_LONGRESPONSE;
+      break;
+    }
+
+  /* Set CPSMEN and the command index */
+
+  cmdidx  = (cmd & MMCSD_CMDIDX_MASK) >> MMCSD_CMDIDX_SHIFT;
+  regval |= cmdidx | STM32_SDMMC_CMD_CPSMEN;
+
+  mcinfo("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
+
+  /* Write the SDIO CMD */
+
+  sdmmc_putreg32(priv, STM32_SDMMC_RESPDONE_ICR | STM32_SDMMC_CMDDONE_ICR,
+                 STM32_SDMMC_ICR_OFFSET);
+  sdmmc_putreg32(priv, regval, STM32_SDMMC_CMD_OFFSET);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_recvsetup
+ *
+ * Description:
+ *   Setup hardware in preparation for data transfer from the card in non-DMA
+ *   (interrupt driven mode).  This method will do whatever controller setup
+ *   is necessary.  This would be called for SD memory just BEFORE sending
+ *   CMD13 (SEND_STATUS), CMD17 (READ_SINGLE_BLOCK), CMD18
+ *   (READ_MULTIPLE_BLOCKS), ACMD51 (SEND_SCR), etc.  Normally, SDMMC_WAITEVENT
+ *   will be called to receive the indication that the transfer is complete.
+ *
+ * Input Parameters:
+ *   dev    - An instance of the SDIO device interface
+ *   buffer - Address of the buffer in which to receive the data
+ *   nbytes - The number of bytes in the transfer
+ *
+ * Returned Value:
+ *   Number of bytes sent on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+static int stm32_recvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
+                           size_t nbytes)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+  uint32_t dblocksize;
+
+  DEBUGASSERT(priv != NULL && buffer != NULL && nbytes > 0);
+  DEBUGASSERT(((uint32_t)buffer & 3) == 0);
+
+  /* Reset the DPSM configuration */
+
+  stm32_datadisable(priv);
+  stm32_sampleinit();
+  stm32_sample(priv, SAMPLENDX_BEFORE_SETUP);
+
+  /* Save the destination buffer information for use by the interrupt handler */
+
+  priv->buffer    = (uint32_t *)buffer;
+  priv->remaining = nbytes;
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+  priv->dmamode   = false;
+#endif
+
+  /* Then set up the SDIO data path */
+
+  dblocksize = stm32_log2(nbytes) << STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT;
+  stm32_dataconfig(priv, SDMMC_DTIMER_DATATIMEOUT, nbytes, dblocksize |
+                   STM32_SDMMC_DCTRL_DTDIR);
+
+  /* And enable interrupts */
+
+  stm32_configxfrints(priv, STM32_SDMMC_RECV_MASK);
+  stm32_sample(priv, SAMPLENDX_AFTER_SETUP);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_sendsetup
+ *
+ * Description:
+ *   Setup hardware in preparation for data transfer from the card.  This method
+ *   will do whatever controller setup is necessary.  This would be called
+ *   for SD memory just AFTER sending CMD24 (WRITE_BLOCK), CMD25
+ *   (WRITE_MULTIPLE_BLOCK), ... and before SDMMC_SENDDATA is called.
+ *
+ * Input Parameters:
+ *   dev    - An instance of the SDIO device interface
+ *   buffer - Address of the buffer containing the data to send
+ *   nbytes - The number of bytes in the transfer
+ *
+ * Returned Value:
+ *   Number of bytes sent on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+static int stm32_sendsetup(FAR struct sdio_dev_s *dev, FAR const
+                           uint8_t *buffer, size_t nbytes)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+  uint32_t dblocksize;
+
+  DEBUGASSERT(priv != NULL && buffer != NULL && nbytes > 0);
+  DEBUGASSERT(((uint32_t)buffer & 3) == 0);
+
+  /* Reset the DPSM configuration */
+
+  stm32_datadisable(priv);
+  stm32_sampleinit();
+  stm32_sample(priv, SAMPLENDX_BEFORE_SETUP);
+
+  /* Save the source buffer information for use by the interrupt handler */
+
+  priv->buffer    = (uint32_t *)buffer;
+  priv->remaining = nbytes;
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+  priv->dmamode   = false;
+#endif
+
+  /* Then set up the SDIO data path */
+
+  dblocksize = stm32_log2(nbytes) << STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT;
+  stm32_dataconfig(priv, SDMMC_DTIMER_DATATIMEOUT, nbytes, dblocksize);
+
+  /* Enable TX interrupts */
+
+  stm32_configxfrints(priv, STM32_SDMMC_SEND_MASK);
+  stm32_sample(priv, SAMPLENDX_AFTER_SETUP);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_cancel
+ *
+ * Description:
+ *   Cancel the data transfer setup of SDMMC_RECVSETUP, SDMMC_SENDSETUP,
+ *   SDMMC_DMARECVSETUP or SDMMC_DMASENDSETUP.  This must be called to cancel
+ *   the data transfer setup if, for some reason, you cannot perform the
+ *   transfer.
+ *
+ * Input Parameters:
+ *   dev  - An instance of the SDIO device interface
+ *
+ * Returned Value:
+ *   OK is success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+static int stm32_cancel(FAR struct sdio_dev_s *dev)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+
+  /* Disable all transfer- and event- related interrupts */
+
+  stm32_configxfrints(priv, 0);
+  stm32_configwaitints(priv, 0, 0, 0);
+
+  /* Clearing pending interrupt status on all transfer- and event- related
+   * interrupts
+   */
+
+  sdmmc_putreg32(priv, STM32_SDMMC_WAITALL_ICR, STM32_SDMMC_ICR_OFFSET);
+
+  /* Cancel any watchdog timeout */
+
+  (void)wd_cancel(priv->waitwdog);
+
+  /* If this was a DMA transfer, make sure that DMA is stopped */
+
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+  if (priv->dmamode)
+    {
+      /* Make sure that the DMA is stopped (it will be stopped automatically
+       * on normal transfers, but not necessarily when the transfer terminates
+       * on an error condition.
+       */
+
+      stm32_dmastop(priv->dma);
+    }
+#endif
+
+  /* Mark no transfer in progress */
+
+  priv->remaining = 0;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_waitresponse
+ *
+ * Description:
+ *   Poll-wait for the response to the last command to be ready.
+ *
+ * Input Parameters:
+ *   dev  - An instance of the SDIO device interface
+ *   cmd  - The command that was sent.  See 32-bit command definitions above.
+ *
+ * Returned Value:
+ *   OK is success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+static int stm32_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+  int32_t timeout;
+  uint32_t events;
+
+  switch (cmd & MMCSD_RESPONSE_MASK)
+    {
+    case MMCSD_NO_RESPONSE:
+      events  = STM32_SDMMC_CMDDONE_STA;
+      timeout = SDMMC_CMDTIMEOUT;
+      break;
+
+    case MMCSD_R1_RESPONSE:
+    case MMCSD_R1B_RESPONSE:
+    case MMCSD_R2_RESPONSE:
+    case MMCSD_R6_RESPONSE:
+      events  = STM32_SDMMC_RESPDONE_STA;
+      timeout = SDMMC_LONGTIMEOUT;
+      break;
+
+    case MMCSD_R4_RESPONSE:
+    case MMCSD_R5_RESPONSE:
+      return -ENOSYS;
+
+    case MMCSD_R3_RESPONSE:
+    case MMCSD_R7_RESPONSE:
+      events  = STM32_SDMMC_RESPDONE_STA;
+      timeout = SDMMC_CMDTIMEOUT;
+      break;
+
+    default:
+      return -EINVAL;
+    }
+
+  /* Then wait for the response (or timeout) */
+
+  while ((sdmmc_getreg32(priv, STM32_SDMMC_STA_OFFSET) & events) == 0)
+    {
+      if (--timeout <= 0)
+        {
+           mcerr("ERROR: Timeout cmd: %08x events: %08x STA: %08x\n",
+               cmd, events, sdmmc_getreg32(priv, STM32_SDMMC_STA_OFFSET));
+
+          return -ETIMEDOUT;
+        }
+    }
+
+  sdmmc_putreg32(priv, STM32_SDMMC_CMDDONE_ICR, STM32_SDMMC_ICR_OFFSET);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_recvRx
+ *
+ * Description:
+ *   Receive response to SDIO command.  Only the critical payload is
+ *   returned -- that is 32 bits for 48 bit status and 128 bits for 136 bit
+ *   status.  The driver implementation should verify the correctness of
+ *   the remaining, non-returned bits (CRCs, CMD index, etc.).
+ *
+ * Input Parameters:
+ *   dev    - An instance of the SDIO device interface
+ *   Rx - Buffer in which to receive the response
+ *
+ * Returned Value:
+ *   Number of bytes sent on success; a negated errno on failure.  Here a
+ *   failure means only a faiure to obtain the requested response (due to
+ *   transport problem -- timeout, CRC, etc.).  The implementation only
+ *   assures that the response is returned intact and does not check errors
+ *   within the response itself.
+ *
+ ****************************************************************************/
+
+static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd,
+                              uint32_t *rshort)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+#ifdef CONFIG_DEBUG_FEATURES
+  uint32_t respcmd;
+#endif
+  uint32_t regval;
+  int ret = OK;
+
+  /* R1  Command response (48-bit)
+   *     47        0               Start bit
+   *     46        0               Transmission bit (0=from card)
+   *     45:40     bit5   - bit0   Command index (0-63)
+   *     39:8      bit31  - bit0   32-bit card status
+   *     7:1       bit6   - bit0   CRC7
+   *     0         1               End bit
+   *
+   * R1b Identical to R1 with the additional busy signaling via the data
+   *     line.
+   *
+   * R6  Published RCA Response (48-bit, SD card only)
+   *     47        0               Start bit
+   *     46        0               Transmission bit (0=from card)
+   *     45:40     bit5   - bit0   Command index (0-63)
+   *     39:8      bit31  - bit0   32-bit Argument Field, consisting of:
+   *                               [31:16] New published RCA of card
+   *                               [15:0]  Card status bits {23,22,19,12:0}
+   *     7:1       bit6   - bit0   CRC7
+   *     0         1               End bit
+   */
+
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!rshort)
+    {
+      mcerr("ERROR: rshort=NULL\n");
+      ret = -EINVAL;
+    }
+
+  /* Check that this is the correct response to this command */
+
+  else if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R1_RESPONSE &&
+           (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R1B_RESPONSE &&
+           (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R6_RESPONSE)
+    {
+      mcerr("ERROR: Wrong response CMD=%08x\n", cmd);
+      ret = -EINVAL;
+    }
+  else
+#endif
+    {
+      /* Check if a timeout or CRC error occurred */
+
+      regval = sdmmc_getreg32(priv, STM32_SDMMC_STA_OFFSET);
+      if ((regval & STM32_SDMMC_STA_CTIMEOUT) != 0)
+        {
+          mcerr("ERROR: Command timeout: %08x\n", regval);
+          ret = -ETIMEDOUT;
+        }
+      else if ((regval & STM32_SDMMC_STA_CCRCFAIL) != 0)
+        {
+          mcerr("ERROR: CRC failure: %08x\n", regval);
+          ret = -EIO;
+        }
+#ifdef CONFIG_DEBUG_FEATURES
+      else
+        {
+          /* Check response received is of desired command */
+
+          respcmd = sdmmc_getreg32(priv, STM32_SDMMC_RESPCMD_OFFSET);
+          if ((uint8_t)(respcmd & STM32_SDMMC_RESPCMD_MASK) !=
+              (cmd & MMCSD_CMDIDX_MASK))
+            {
+              mcerr("ERROR: RESCMD=%02x CMD=%08x\n", respcmd, cmd);
+              ret = -EINVAL;
+            }
+        }
+#endif
+    }
+
+  /* Clear all pending message completion events and return the R1/R6 response */
+
+  sdmmc_putreg32(priv, STM32_SDMMC_RESPDONE_ICR | STM32_SDMMC_CMDDONE_ICR,
+                 STM32_SDMMC_ICR_OFFSET);
+  *rshort = sdmmc_getreg32(priv, STM32_SDMMC_RESP1_OFFSET);
+  return ret;
+}
+
+static int stm32_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd,
+                          uint32_t rlong[4])
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+  uint32_t regval;
+  int ret = OK;
+
+  /* R2  CID, CSD register (136-bit)
+   *     135       0               Start bit
+   *     134       0               Transmission bit (0=from card)
+   *     133:128   bit5   - bit0   Reserved
+   *     127:1     bit127 - bit1   127-bit CID or CSD register
+   *                               (including internal CRC)
+   *     0         1               End bit
+   */
+
+#ifdef CONFIG_DEBUG_FEATURES
+  /* Check that R1 is the correct response to this command */
+
+  if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R2_RESPONSE)
+    {
+      mcerr("ERROR: Wrong response CMD=%08x\n", cmd);
+      ret = -EINVAL;
+    }
+  else
+#endif
+    {
+      /* Check if a timeout or CRC error occurred */
+
+      regval = sdmmc_getreg32(priv, STM32_SDMMC_STA_OFFSET);
+      if (regval & STM32_SDMMC_STA_CTIMEOUT)
+        {
+          mcerr("ERROR: Timeout STA: %08x\n", regval);
+          ret = -ETIMEDOUT;
+        }
+      else if (regval & STM32_SDMMC_STA_CCRCFAIL)
+        {
+          mcerr("ERROR: CRC fail STA: %08x\n", regval);
+          ret = -EIO;
+        }
+    }
+
+  /* Return the long response */
+
+  sdmmc_putreg32(priv, STM32_SDMMC_RESPDONE_ICR | STM32_SDMMC_CMDDONE_ICR,
+                 STM32_SDMMC_ICR_OFFSET);
+  if (rlong)
+    {
+      rlong[0] = sdmmc_getreg32(priv, STM32_SDMMC_RESP1_OFFSET);
+      rlong[1] = sdmmc_getreg32(priv, STM32_SDMMC_RESP2_OFFSET);
+      rlong[2] = sdmmc_getreg32(priv, STM32_SDMMC_RESP3_OFFSET);
+      rlong[3] = sdmmc_getreg32(priv, STM32_SDMMC_RESP4_OFFSET);
+    }
+  return ret;
+}
+
+static int stm32_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *rshort)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+  uint32_t regval;
+  int ret = OK;
+
+  /* R3  OCR (48-bit)
+   *     47        0               Start bit
+   *     46        0               Transmission bit (0=from card)
+   *     45:40     bit5   - bit0   Reserved
+   *     39:8      bit31  - bit0   32-bit OCR register
+   *     7:1       bit6   - bit0   Reserved
+   *     0         1               End bit
+   */
+
+  /* Check that this is the correct response to this command */
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R3_RESPONSE &&
+      (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R7_RESPONSE)
+    {
+      mcerr("ERROR: Wrong response CMD=%08x\n", cmd);
+      ret = -EINVAL;
+    }
+  else
+#endif
+    {
+      /* Check if a timeout occurred (Apparently a CRC error can terminate
+       * a good response)
+       */
+
+      regval = sdmmc_getreg32(priv, STM32_SDMMC_STA_OFFSET);
+      if (regval & STM32_SDMMC_STA_CTIMEOUT)
+        {
+          mcerr("ERROR: Timeout STA: %08x\n", regval);
+          ret = -ETIMEDOUT;
+        }
+    }
+
+  sdmmc_putreg32(priv, STM32_SDMMC_RESPDONE_ICR | STM32_SDMMC_CMDDONE_ICR,
+                 STM32_SDMMC_ICR_OFFSET);
+  if (rshort)
+    {
+      *rshort = sdmmc_getreg32(priv, STM32_SDMMC_RESP1_OFFSET);
+    }
+  return ret;
+}
+
+/* MMC responses not supported */
+
+static int stm32_recvnotimpl(FAR struct sdio_dev_s *dev, uint32_t cmd,
+                             uint32_t *rnotimpl)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+  sdmmc_putreg32(priv, STM32_SDMMC_RESPDONE_ICR | STM32_SDMMC_CMDDONE_ICR,
+                 STM32_SDMMC_ICR_OFFSET);
+  return -ENOSYS;
+}
+
+/****************************************************************************
+ * Name: stm32_waitenable
+ *
+ * Description:
+ *   Enable/disable of a set of SDIO wait events.  This is part of the
+ *   the SDMMC_WAITEVENT sequence.  The set of to-be-waited-for events is
+ *   configured before calling stm32_eventwait.  This is done in this way
+ *   to help the driver to eliminate race conditions between the command
+ *   setup and the subsequent events.
+ *
+ *   The enabled events persist until either (1) SDMMC_WAITENABLE is called
+ *   again specifying a different set of wait events, or (2) SDMMC_EVENTWAIT
+ *   returns.
+ *
+ * Input Parameters:
+ *   dev      - An instance of the SDIO device interface
+ *   eventset - A bitset of events to enable or disable (see SDIOWAIT_*
+ *              definitions). 0=disable; 1=enable.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void stm32_waitenable(FAR struct sdio_dev_s *dev,
+                             sdio_eventset_t eventset)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+  uint32_t waitmask;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Disable event-related interrupts */
+
+  stm32_configwaitints(priv, 0, 0, 0);
+
+  /* Select the interrupt mask that will give us the appropriate wakeup
+   * interrupts.
+   */
+
+#if defined(CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE)
+  if ((eventset & SDIOWAIT_WRCOMPLETE) != 0)
+    {
+      waitmask = SDIOWAIT_WRCOMPLETE;
+    }
+  else
+#endif
+    {
+      waitmask = 0;
+      if ((eventset & SDIOWAIT_CMDDONE) != 0)
+        {
+          waitmask |= STM32_SDMMC_CMDDONE_MASK;
+        }
+
+      if ((eventset & SDIOWAIT_RESPONSEDONE) != 0)
+        {
+          waitmask |= STM32_SDMMC_RESPDONE_MASK;
+        }
+
+      if ((eventset & SDIOWAIT_TRANSFERDONE) != 0)
+        {
+          waitmask |= STM32_SDMMC_XFRDONE_MASK;
+        }
+
+      /* Enable event-related interrupts */
+
+     sdmmc_putreg32(priv, STM32_SDMMC_WAITALL_ICR, STM32_SDMMC_ICR_OFFSET);
+    }
+
+  stm32_configwaitints(priv, waitmask, eventset, 0);
+}
+
+/****************************************************************************
+ * Name: stm32_eventwait
+ *
+ * Description:
+ *   Wait for one of the enabled events to occur (or a timeout).  Note that
+ *   all events enabled by SDMMC_WAITEVENTS are disabled when stm32_eventwait
+ *   returns.  SDMMC_WAITEVENTS must be called again before stm32_eventwait
+ *   can be used again.
+ *
+ * Input Parameters:
+ *   dev     - An instance of the SDIO device interface
+ *   timeout - Maximum time in milliseconds to wait.  Zero means immediate
+ *             timeout with no wait.  The timeout value is ignored if
+ *             SDIOWAIT_TIMEOUT is not included in the waited-for eventset.
+ *
+ * Returned Value:
+ *   Event set containing the event(s) that ended the wait.  Should always
+ *   be non-zero.  All events are disabled after the wait concludes.
+ *
+ ****************************************************************************/
+
+static sdio_eventset_t stm32_eventwait(FAR struct sdio_dev_s *dev,
+                                       uint32_t timeout)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+  sdio_eventset_t wkupevent = 0;
+  irqstate_t flags;
+  int ret;
+
+  /* There is a race condition here... the event may have completed before
+   * we get here.  In this case waitevents will be zero, but wkupevents will
+   * be non-zero (and, hopefully, the semaphore count will also be non-zero.
+   */
+
+  flags = enter_critical_section();
+  DEBUGASSERT(priv->waitevents != 0 || priv->wkupevent != 0);
+
+  /* Check if the timeout event is specified in the event set */
+
+  if ((priv->waitevents & SDIOWAIT_TIMEOUT) != 0)
+    {
+      int delay;
+
+      /* Yes.. Handle a cornercase: The user request a timeout event but
+       * with timeout == 0?
+       */
+
+      if (!timeout)
+        {
+          /* Then just tell the caller that we already timed out */
+
+          wkupevent = SDIOWAIT_TIMEOUT;
+          goto errout;
+        }
+
+      /* Start the watchdog timer */
+
+      delay = MSEC2TICK(timeout);
+      ret   = wd_start(priv->waitwdog, delay, (wdentry_t)stm32_eventtimeout,
+                       1, (uint32_t)priv);
+      if (ret != OK)
+        {
+          mcerr("ERROR: wd_start failed: %d\n", ret);
+        }
+    }
+
+#if defined(CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE)
+  if ((priv->waitevents & SDIOWAIT_WRCOMPLETE) != 0)
+    {
+      /* Atomically read pin to see if ready (true) and determine if ISR fired
+       * If Pin is ready and if ISR did NOT fire end the wait here
+       */
+
+      if (stm32_gpioread(priv->d0_gpio) &&
+         (priv->wkupevent & SDIOWAIT_WRCOMPLETE) == 0)
+        {
+          stm32_endwait(priv, SDIOWAIT_WRCOMPLETE);
+        }
+    }
+#endif
+
+  /* Loop until the event (or the timeout occurs). Race conditions are avoided
+   * by calling stm32_waitenable prior to triggering the logic that will cause
+   * the wait to terminate.  Under certain race conditions, the waited-for
+   * may have already occurred before this function was called!
+   */
+
+  for (; ; )
+    {
+      /* Wait for an event in event set to occur.  If this the event has already
+       * occurred, then the semaphore will already have been incremented and
+       * there will be no wait.
+       */
+
+      stm32_takesem(priv);
+      wkupevent = priv->wkupevent;
+
+      /* Check if the event has occurred.  When the event has occurred, then
+       * evenset will be set to 0 and wkupevent will be set to a nonzero value.
+       */
+
+      if (wkupevent != 0)
+        {
+          /* Yes... break out of the loop with wkupevent non-zero */
+
+          break;
+        }
+    }
+
+  /* Disable event-related interrupts */
+
+  stm32_configwaitints(priv, 0, 0, 0);
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+  priv->xfrflags   = 0;
+#endif
+
+errout:
+  leave_critical_section(flags);
+  stm32_dumpsamples(priv);
+  return wkupevent;
+}
+
+/****************************************************************************
+ * Name: stm32_callbackenable
+ *
+ * Description:
+ *   Enable/disable of a set of SDIO callback events.  This is part of the
+ *   the SDIO callback sequence.  The set of events is configured to enabled
+ *   callbacks to the function provided in stm32_registercallback.
+ *
+ *   Events are automatically disabled once the callback is performed and no
+ *   further callback events will occur until they are again enabled by
+ *   calling this methos.
+ *
+ * Input Parameters:
+ *   dev      - An instance of the SDIO device interface
+ *   eventset - A bitset of events to enable or disable (see SDIOMEDIA_*
+ *              definitions). 0=disable; 1=enable.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void stm32_callbackenable(FAR struct sdio_dev_s *dev,
+                                 sdio_eventset_t eventset)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+
+  mcinfo("eventset: %02x\n", eventset);
+  DEBUGASSERT(priv != NULL);
+
+  priv->cbevents = eventset;
+  stm32_callback(priv);
+}
+
+/****************************************************************************
+ * Name: stm32_registercallback
+ *
+ * Description:
+ *   Register a callback that that will be invoked on any media status
+ *   change.  Callbacks should not be made from interrupt handlers, rather
+ *   interrupt level events should be handled by calling back on the work
+ *   thread.
+ *
+ *   When this method is called, all callbacks should be disabled until they
+ *   are enabled via a call to SDMMC_CALLBACKENABLE
+ *
+ * Input Parameters:
+ *   dev -      Device-specific state data
+ *   callback - The funtion to call on the media change
+ *   arg -      A caller provided value to return with the callback
+ *
+ * Returned Value:
+ *   0 on success; negated errno on failure.
+ *
+ ****************************************************************************/
+
+static int stm32_registercallback(FAR struct sdio_dev_s *dev,
+                                  worker_t callback, void *arg)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+
+  /* Disable callbacks and register this callback and is argument */
+
+  mcinfo("Register %p(%p)\n", callback, arg);
+  DEBUGASSERT(priv != NULL);
+
+  priv->cbevents = 0;
+  priv->cbarg    = arg;
+  priv->callback = callback;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32_dmapreflight
+ *
+ * Description:
+ *   Preflight an SDIO DMA operation.  If the buffer is not well-formed for
+ *   SDIO DMA transfer (alignment, size, etc.) returns an error.
+ *
+ * Input Parameters:
+ *   dev    - An instance of the SDIO device interface
+ *   buffer - The memory to DMA to/from
+ *   buflen - The size of the DMA transfer in bytes
+ *
+ * Returned Value:
+ *   OK on success; a negated errno on failure
+ ****************************************************************************/
+
+#if defined(CONFIG_STM32F7_SDMMC_DMA) && defined(CONFIG_SDIO_PREFLIGHT)
+static int stm32_dmapreflight(FAR struct sdio_dev_s *dev,
+                              FAR const uint8_t *buffer, size_t buflen)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+
+  DEBUGASSERT(priv != NULL && buffer != NULL && buflen > 0);
+
+  /* Wide bus operation is required for DMA */
+
+  if (!priv->widebus)
+    {
+      return -EINVAL;
+    }
+
+  /* DMA must be possible to the buffer */
+
+  if (!stm32_dmacapable((uintptr_t)buffer, (buflen + 3) >> 2,
+                        SDMMC_RXDMA32_CONFIG | priv->dmapri))
+    {
+      return -EFAULT;
+    }
+
+  return 0;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_dmarecvsetup
+ *
+ * Description:
+ *   Setup to perform a read DMA.  If the processor supports a data cache,
+ *   then this method will also make sure that the contents of the DMA memory
+ *   and the data cache are coherent.  For read transfers this may mean
+ *   invalidating the data cache.
+ *
+ * Input Parameters:
+ *   dev    - An instance of the SDIO device interface
+ *   buffer - The memory to DMA from
+ *   buflen - The size of the DMA transfer in bytes
+ *
+ * Returned Value:
+ *   OK on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
+                              size_t buflen)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+  uint32_t dblocksize;
+
+  DEBUGASSERT(priv != NULL && buffer != NULL && buflen > 0);
+#ifdef CONFIG_SDIO_PREFLIGHT
+  DEBUGASSERT(stm32_dmapreflight(dev, buffer, buflen) == 0);
+#endif
+
+#ifdef CONFIG_ARMV7M_DCACHE
+  /* buffer alignment is required for DMA transfers with dcache */
+
+  if (((uintptr_t)buffer & (ARMV7M_DCACHE_LINESIZE-1)) != 0 ||
+      (buflen & (ARMV7M_DCACHE_LINESIZE-1)) != 0)
+    {
+      return -EFAULT;
+    }
+#endif
+
+  /* Reset the DPSM configuration */
+
+  stm32_datadisable(priv);
+
+  /* Initialize register sampling */
+
+  stm32_sampleinit();
+  stm32_sample(priv, SAMPLENDX_BEFORE_SETUP);
+
+  /* Save the destination buffer information for use by the interrupt handler */
+
+  priv->buffer    = (uint32_t *)buffer;
+  priv->remaining = buflen;
+  priv->dmamode   = true;
+
+  /* Then set up the SDIO data path */
+
+  dblocksize = stm32_log2(buflen) << STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT;
+  stm32_dataconfig(priv, SDMMC_DTIMER_DATATIMEOUT, buflen, dblocksize |
+                   STM32_SDMMC_DCTRL_DTDIR);
+
+  /* Configure the RX DMA */
+
+  stm32_configxfrints(priv, STM32_SDMMC_DMARECV_MASK);
+  
+  sdmmc_modifyreg32(priv, STM32_SDMMC_DCTRL_OFFSET, 0, STM32_SDMMC_DCTRL_DMAEN);
+  stm32_dmasetup(priv->dma, priv->base + STM32_SDMMC_FIFO_OFFSET,
+                 (uint32_t)buffer, (buflen + 3) >> 2,
+                 SDMMC_RXDMA32_CONFIG | priv->dmapri);
+
+  /* Force RAM reread */
+
+  arch_invalidate_dcache((uintptr_t)buffer,(uintptr_t)buffer + buflen);
+
+  /* Start the DMA */
+
+  stm32_sample(priv, SAMPLENDX_BEFORE_ENABLE);
+  stm32_dmastart(priv->dma, stm32_dmacallback, priv, false);
+  stm32_sample(priv, SAMPLENDX_AFTER_SETUP);
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_dmasendsetup
+ *
+ * Description:
+ *   Setup to perform a write DMA.  If the processor supports a data cache,
+ *   then this method will also make sure that the contents of the DMA memory
+ *   and the data cache are coherent.  For write transfers, this may mean
+ *   flushing the data cache.
+ *
+ * Input Parameters:
+ *   dev    - An instance of the SDIO device interface
+ *   buffer - The memory to DMA into
+ *   buflen - The size of the DMA transfer in bytes
+ *
+ * Returned Value:
+ *   OK on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+static int stm32_dmasendsetup(FAR struct sdio_dev_s *dev,
+                              FAR const uint8_t *buffer, size_t buflen)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+  uint32_t dblocksize;
+
+  DEBUGASSERT(priv != NULL && buffer != NULL && buflen > 0);
+#ifdef CONFIG_SDIO_PREFLIGHT
+  DEBUGASSERT(stm32_dmapreflight(dev, buffer, buflen) == 0);
+#endif
+
+#ifdef CONFIG_ARMV7M_DCACHE
+  /* buffer alignment is required for DMA transfers with dcache */
+
+  if (((uintptr_t)buffer & (ARMV7M_DCACHE_LINESIZE-1)) != 0 ||
+      (buflen & (ARMV7M_DCACHE_LINESIZE-1)) != 0)
+    {
+      return -EFAULT;
+    }
+#endif
+
+  /* Reset the DPSM configuration */
+
+  stm32_datadisable(priv);
+
+  /* Initialize register sampling */
+
+  stm32_sampleinit();
+  stm32_sample(priv, SAMPLENDX_BEFORE_SETUP);
+
+  /* Flush cache to physical memory */
+
+  arch_flush_dcache((uintptr_t)buffer, (uintptr_t)buffer + buflen);
+
+  /* Save the source buffer information for use by the interrupt handler */
+
+  priv->buffer    = (uint32_t *)buffer;
+  priv->remaining = buflen;
+  priv->dmamode   = true;
+
+  /* Then set up the SDIO data path */
+
+  dblocksize = stm32_log2(buflen) << STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT;
+  stm32_dataconfig(priv, SDMMC_DTIMER_DATATIMEOUT, buflen, dblocksize);
+
+  /* Configure the TX DMA */
+
+  stm32_dmasetup(priv->dma, priv->base + STM32_SDMMC_FIFO_OFFSET, (uint32_t)buffer,
+                 (buflen + 3) >> 2, SDMMC_TXDMA32_CONFIG | priv->dmapri);
+
+  sdmmc_modifyreg32(priv, STM32_SDMMC_DCTRL_OFFSET, 0, STM32_SDMMC_DCTRL_DMAEN);
+  stm32_sample(priv, SAMPLENDX_BEFORE_ENABLE);
+
+  /* Start the DMA */
+
+  stm32_dmastart(priv->dma, stm32_dmacallback, priv, false);
+  stm32_sample(priv, SAMPLENDX_AFTER_SETUP);
+
+  /* Enable TX interrupts */
+
+  stm32_configxfrints(priv, STM32_SDMMC_DMASEND_MASK);
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Initialization/uninitialization/reset
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_callback
+ *
+ * Description:
+ *   Perform callback.
+ *
+ * Assumptions:
+ *   This function does not execute in the context of an interrupt handler.
+ *   It may be invoked on any user thread or scheduled on the work thread
+ *   from an interrupt handler.
+ *
+ ****************************************************************************/
+
+static void stm32_callback(void *arg)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)arg;
+
+  /* Is a callback registered? */
+
+  DEBUGASSERT(priv != NULL);
+  mcinfo("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
+        priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus);
+
+  if (priv->callback)
+    {
+      /* Yes.. Check for enabled callback events */
+
+      if ((priv->cdstatus & SDIO_STATUS_PRESENT) != 0)
+        {
+          /* Media is present.  Is the media inserted event enabled? */
+
+          if ((priv->cbevents & SDIOMEDIA_INSERTED) == 0)
+            {
+              /* No... return without performing the callback */
+
+              return;
+            }
+        }
+      else
+        {
+          /* Media is not present.  Is the media eject event enabled? */
+
+          if ((priv->cbevents & SDIOMEDIA_EJECTED) == 0)
+            {
+              /* No... return without performing the callback */
+
+              return;
+            }
+        }
+
+      /* Perform the callback, disabling further callbacks.  Of course, the
+       * the callback can (and probably should) re-enable callbacks.
+       */
+
+      priv->cbevents = 0;
+
+      /* Callbacks cannot be performed in the context of an interrupt handler.
+       * If we are in an interrupt handler, then queue the callback to be
+       * performed later on the work thread.
+       */
+
+      if (up_interrupt_context())
+        {
+          /* Yes.. queue it */
+
+           mcinfo("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
+          (void)work_queue(HPWORK, &priv->cbwork, (worker_t)priv->callback, priv->cbarg, 0);
+        }
+      else
+        {
+          /* No.. then just call the callback here */
+
+          mcinfo("Callback to %p(%p)\n", priv->callback, priv->cbarg);
+          priv->callback(priv->cbarg);
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_default
+ *
+ * Description:
+ *   Restore SDIO registers to their default, reset values
+ *
+ ****************************************************************************/
+
+static void stm32_default(struct stm32_dev_s *priv)
+{
+  sdmmc_putreg32(priv, STM32_SDMMC_POWER_RESET,  STM32_SDMMC_POWER_OFFSET);
+  sdmmc_putreg32(priv, STM32_SDMMC_CLKCR_RESET,  STM32_SDMMC_CLKCR_OFFSET);
+  sdmmc_putreg32(priv, STM32_SDMMC_ARG_RESET,    STM32_SDMMC_ARG_OFFSET);
+  sdmmc_putreg32(priv, STM32_SDMMC_CMD_RESET,    STM32_SDMMC_CMD_OFFSET);
+  sdmmc_putreg32(priv, STM32_SDMMC_DTIMER_RESET, STM32_SDMMC_DTIMER_OFFSET);
+  sdmmc_putreg32(priv, STM32_SDMMC_DLEN_RESET,   STM32_SDMMC_DLEN_OFFSET);
+  sdmmc_putreg32(priv, STM32_SDMMC_DCTRL_RESET,  STM32_SDMMC_DCTRL_OFFSET);
+  sdmmc_putreg32(priv, STM32_SDMMC_ICR_RESET,    STM32_SDMMC_ICR_OFFSET);
+  sdmmc_putreg32(priv, STM32_SDMMC_MASK_RESET,   STM32_SDMMC_MASK_OFFSET);
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sdio_initialize
+ *
+ * Description:
+ *   Initialize SDIO for operation.
+ *
+ * Input Parameters:
+ *   slotno - Not used.
+ *
+ * Returned Values:
+ *   A reference to an SDIO interface structure.  NULL is returned on failures.
+ *
+ ****************************************************************************/
+
+FAR struct sdio_dev_s *sdio_initialize(int slotno)
+{
+  struct stm32_dev_s *priv = NULL;
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+  unsigned int dmachan;
+#endif
+
+#ifdef CONFIG_STM32F7_SDMMC1
+  if (slotno == 0)
+    {
+      /* Select SDMMC 1 */
+
+      priv = &g_sdmmcdev1;
+
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+      dmachan = SDMMC1_DMACHAN;
+#endif
+
+#ifdef CONFIG_SDMMC1_WIDTH_D1_ONLY
+      priv->onebit = true;
+#else
+      priv->onebit = false;
+#endif
+
+      /* Configure GPIOs for 4-bit, wide-bus operation (the chip is capable of
+       * 8-bit wide bus operation but D4-D7 are not configured).
+       *
+       * If bus is multiplexed then there is a custom bus configuration utility
+       * in the scope of the board support package.
+       */
+
+#ifndef CONFIG_SDIO_MUXBUS
+      stm32_configgpio(GPIO_SDMMC1_D0);
+#ifndef CONFIG_SDMMC1_WIDTH_D1_ONLY
+      stm32_configgpio(GPIO_SDMMC1_D1);
+      stm32_configgpio(GPIO_SDMMC1_D2);
+      stm32_configgpio(GPIO_SDMMC1_D3);
+#endif
+      stm32_configgpio(GPIO_SDMMC1_CK);
+      stm32_configgpio(GPIO_SDMMC1_CMD);
+#endif
+    }
+  else
+#endif
+#ifdef CONFIG_STM32F7_SDMMC2
+  if (slotno == 1)
+    {
+      /* Select SDMMC 2 */
+
+      priv = &g_sdmmcdev2;
+
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+      dmachan = SDMMC2_DMACHAN;
+#endif
+
+#ifdef CONFIG_SDMMC2_WIDTH_D1_ONLY
+      priv->onebit = true;
+#else
+      priv->onebit = false;
+#endif
+
+      /* Configure GPIOs for 4-bit, wide-bus operation (the chip is capable of
+       * 8-bit wide bus operation but D4-D7 are not configured).
+       *
+       * If bus is multiplexed then there is a custom bus configuration utility
+       * in the scope of the board support package.
+       */
+
+#ifndef CONFIG_SDIO_MUXBUS
+      stm32_configgpio(GPIO_SDMMC2_D0);
+#ifndef CONFIG_SDMMC2_WIDTH_D1_ONLY
+      stm32_configgpio(GPIO_SDMMC2_D1);
+      stm32_configgpio(GPIO_SDMMC2_D2);
+      stm32_configgpio(GPIO_SDMMC2_D3);
+#endif
+      stm32_configgpio(GPIO_SDMMC2_CK);
+      stm32_configgpio(GPIO_SDMMC2_CMD);
+#endif
+    }
+  else
+#endif
+    {
+      mcerr("ERROR: Unsupported SDMMC slot: %d\n", slotno);
+      return NULL;
+    }
+
+  /* Initialize the SDIO slot structure */
+  /* Initialize semaphores */
+
+  sem_init(&priv->waitsem, 0, 0);
+
+  /* The waitsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
+
+  /* Create a watchdog timer */
+
+  priv->waitwdog = wd_create();
+  DEBUGASSERT(priv->waitwdog);
+
+#ifdef CONFIG_STM32F7_SDMMC_DMA
+  /* Allocate a DMA channel */
+
+  priv->dma = stm32_dmachannel(dmachan);
+  DEBUGASSERT(priv->dma);
+#endif
+
+  /* Reset the card and assure that it is in the initial, unconfigured
+   * state.
+   */
+
+  stm32_reset(&priv->dev);
+  return &priv->dev;
+}
+
+/****************************************************************************
+ * Name: sdio_mediachange
+ *
+ * Description:
+ *   Called by board-specific logic -- possible from an interrupt handler --
+ *   in order to signal to the driver that a card has been inserted or
+ *   removed from the slot
+ *
+ * Input Parameters:
+ *   dev        - An instance of the SDIO driver device state structure.
+ *   cardinslot - true is a card has been detected in the slot; false if a
+ *                card has been removed from the slot.  Only transitions
+ *                (inserted->removed or removed->inserted should be reported)
+ *
+ * Returned Values:
+ *   None
+ *
+ ****************************************************************************/
+
+void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+  sdio_statset_t cdstatus;
+  irqstate_t flags;
+
+  /* Update card status */
+
+  flags = enter_critical_section();
+  cdstatus = priv->cdstatus;
+  if (cardinslot)
+    {
+      priv->cdstatus |= SDIO_STATUS_PRESENT;
+    }
+  else
+    {
+      priv->cdstatus &= ~SDIO_STATUS_PRESENT;
+    }
+
+  leave_critical_section(flags);
+
+  mcinfo("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
+
+  /* Perform any requested callback if the status has changed */
+
+  if (cdstatus != priv->cdstatus)
+    {
+      stm32_callback(priv);
+    }
+}
+
+/****************************************************************************
+ * Name: sdio_wrprotect
+ *
+ * Description:
+ *   Called by board-specific logic to report if the card in the slot is
+ *   mechanically write protected.
+ *
+ * Input Parameters:
+ *   dev       - An instance of the SDIO driver device state structure.
+ *   wrprotect - true is a card is writeprotected.
+ *
+ * Returned Values:
+ *   None
+ *
+ ****************************************************************************/
+
+void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
+{
+  struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
+  irqstate_t flags;
+
+  /* Update card status */
+
+  flags = enter_critical_section();
+  if (wrprotect)
+    {
+      priv->cdstatus |= SDIO_STATUS_WRPROTECTED;
+    }
+  else
+    {
+      priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED;
+    }
+    
+  mcinfo("cdstatus: %02x\n", priv->cdstatus);
+  leave_critical_section(flags);
+}
+#endif /* CONFIG_STM32F7_SDMMC1 || CONFIG_STM32F7_SDMMC2 */
diff --git a/arch/arm/src/stm32f7/stm32_sdmmc.h b/arch/arm/src/stm32f7/stm32_sdmmc.h
new file mode 100644
index 0000000000000000000000000000000000000000..8e722497c5f296141a7fd40b87f4c581c0806c5a
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_sdmmc.h
@@ -0,0 +1,129 @@
+/************************************************************************************
+ * arch/arm/src/stm32f7/stm32_sdmmc.h
+ *
+ *   Copyright (C) 2009, 2011, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_STM32_SDMMC_H
+#define __ARCH_ARM_SRC_STM32F7_STM32_SDMMC_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include 
+#include 
+
+#include "chip.h"
+#include "chip/stm32_sdmmc.h"
+
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: sdio_initialize
+ *
+ * Description:
+ *   Initialize SDIO for operation.
+ *
+ * Input Parameters:
+ *   slotno - Not used.
+ *
+ * Returned Values:
+ *   A reference to an SDIO interface structure.  NULL is returned on failures.
+ *
+ ****************************************************************************/
+
+struct sdio_dev_s; /* See include/nuttx/sdio.h */
+FAR struct sdio_dev_s *sdio_initialize(int slotno);
+
+/****************************************************************************
+ * Name: sdio_mediachange
+ *
+ * Description:
+ *   Called by board-specific logic -- posssible from an interrupt handler --
+ *   in order to signal to the driver that a card has been inserted or
+ *   removed from the slot
+ *
+ * Input Parameters:
+ *   dev        - An instance of the SDIO driver device state structure.
+ *   cardinslot - true is a card has been detected in the slot; false if a
+ *                card has been removed from the slot.  Only transitions
+ *                (inserted->removed or removed->inserted should be reported)
+ *
+ * Returned Values:
+ *   None
+ *
+ ****************************************************************************/
+
+void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot);
+
+/****************************************************************************
+ * Name: sdio_wrprotect
+ *
+ * Description:
+ *   Called by board-specific logic to report if the card in the slot is
+ *   mechanically write protected.
+ *
+ * Input Parameters:
+ *   dev       - An instance of the SDIO driver device state structure.
+ *   wrprotect - true is a card is writeprotected.
+ *
+ * Returned Values:
+ *   None
+ *
+ ****************************************************************************/
+
+void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_STM32F7_STM32_SDMMC_H */
+
diff --git a/arch/arm/src/stm32f7/stm32_serial.c b/arch/arm/src/stm32f7/stm32_serial.c
index 5b57549a8efe738499f9460a6d6403084aaff9d5..77138526dd64dea41ca15495071926854fd5faaa 100644
--- a/arch/arm/src/stm32f7/stm32_serial.c
+++ b/arch/arm/src/stm32f7/stm32_serial.c
@@ -281,8 +281,6 @@ struct up_dev_s
   const unsigned int rxdma_channel; /* DMA channel assigned */
 #endif
 
-  int (*const vector)(int irq, void *context); /* Interrupt handler */
-
   /* RX DMA state */
 
 #ifdef SERIAL_HAVE_DMA
@@ -290,7 +288,7 @@ struct up_dev_s
   bool              rxenable;  /* DMA-based reception en/disable */
   uint16_t          rxdmain;   /* Next byte in the DMA where hardware will write */
   uint16_t          rxdmaout;  /* Next byte in the DMA buffer to be read */
-  VAR char * const  rxfifo;    /* Receive DMA buffer */
+  char      *const  rxfifo;    /* Receive DMA buffer */
 #endif
 
 #ifdef HAVE_RS485
@@ -308,7 +306,7 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-static int  up_interrupt_common(struct up_dev_s *dev);
+static int  up_interrupt(int irq, void *context, FAR void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
 #ifndef SERIAL_HAVE_ONLY_DMA
 static int  up_receive(struct uart_dev_s *dev, unsigned int *status);
@@ -340,31 +338,6 @@ static int  up_pm_prepare(struct pm_callback_s *cb, int domain,
                           enum pm_state_e pmstate);
 #endif
 
-#ifdef CONFIG_STM32F7_USART1
-static int up_interrupt_usart1(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32F7_USART2
-static int up_interrupt_usart2(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32F7_USART3
-static int up_interrupt_usart3(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32F7_UART4
-static int up_interrupt_uart4(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32F7_UART5
-static int up_interrupt_uart5(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32F7_USART6
-static int up_interrupt_usart6(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32F7_UART7
-static int up_interrupt_uart7(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32F7_UART8
-static int up_interrupt_uart8(int irq, void *context);
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
@@ -554,7 +527,6 @@ static struct up_dev_s g_usart1priv =
   .rxdma_channel = DMAMAP_USART1_RX,
   .rxfifo        = g_usart1rxfifo,
 #endif
-  .vector        = up_interrupt_usart1,
 
 #ifdef CONFIG_USART1_RS485
   .rs485_dir_gpio = GPIO_USART1_RS485_DIR,
@@ -616,7 +588,6 @@ static struct up_dev_s g_usart2priv =
   .rxdma_channel = DMAMAP_USART2_RX,
   .rxfifo        = g_usart2rxfifo,
 #endif
-  .vector        = up_interrupt_usart2,
 
 #ifdef CONFIG_USART2_RS485
   .rs485_dir_gpio = GPIO_USART2_RS485_DIR,
@@ -678,7 +649,6 @@ static struct up_dev_s g_usart3priv =
   .rxdma_channel = DMAMAP_USART3_RX,
   .rxfifo        = g_usart3rxfifo,
 #endif
-  .vector        = up_interrupt_usart3,
 
 #ifdef CONFIG_USART3_RS485
   .rs485_dir_gpio = GPIO_USART3_RS485_DIR,
@@ -744,7 +714,6 @@ static struct up_dev_s g_uart4priv =
   .rxdma_channel = DMAMAP_UART4_RX,
   .rxfifo        = g_uart4rxfifo,
 #endif
-  .vector        = up_interrupt_uart4,
 
 #ifdef CONFIG_UART4_RS485
   .rs485_dir_gpio = GPIO_UART4_RS485_DIR,
@@ -810,7 +779,6 @@ static struct up_dev_s g_uart5priv =
   .rxdma_channel = DMAMAP_UART5_RX,
   .rxfifo        = g_uart5rxfifo,
 #endif
-  .vector         = up_interrupt_uart5,
 
 #ifdef CONFIG_UART5_RS485
   .rs485_dir_gpio = GPIO_UART5_RS485_DIR,
@@ -872,7 +840,6 @@ static struct up_dev_s g_usart6priv =
   .rxdma_channel = DMAMAP_USART6_RX,
   .rxfifo        = g_usart6rxfifo,
 #endif
-  .vector         = up_interrupt_usart6,
 
 #ifdef CONFIG_USART6_RS485
   .rs485_dir_gpio = GPIO_USART6_RS485_DIR,
@@ -934,7 +901,6 @@ static struct up_dev_s g_uart7priv =
   .rxdma_channel = DMAMAP_UART7_RX,
   .rxfifo        = g_uart7rxfifo,
 #endif
-  .vector         = up_interrupt_uart7,
 
 #ifdef CONFIG_UART7_RS485
   .rs485_dir_gpio = GPIO_UART7_RS485_DIR,
@@ -996,7 +962,6 @@ static struct up_dev_s g_uart8priv =
   .rxdma_channel = DMAMAP_UART8_RX,
   .rxfifo        = g_uart8rxfifo,
 #endif
-  .vector         = up_interrupt_uart8,
 
 #ifdef CONFIG_UART8_RS485
   .rs485_dir_gpio = GPIO_UART8_RS485_DIR,
@@ -1681,7 +1646,7 @@ static int up_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, priv->vector);
+  ret = irq_attach(priv->irq, up_interrupt, priv);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
@@ -1711,7 +1676,7 @@ static void up_detach(struct uart_dev_s *dev)
 }
 
 /****************************************************************************
- * Name: up_interrupt_common
+ * Name: up_interrupt
  *
  * Description:
  *   This is the USART interrupt handler.  It will be invoked when an
@@ -1722,11 +1687,14 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_interrupt_common(struct up_dev_s *priv)
+static int up_interrupt(int irq, void *context, FAR void *arg)
 {
+  struct up_dev_s *priv = (struct up_dev_s *)arg;
   int  passes;
   bool handled;
 
+  DEBUGASSERT(priv != NULL);
+
   /* Report serial activity to the power management logic */
 
 #if defined(CONFIG_PM) && CONFIG_PM_SERIAL_ACTIVITY > 0
@@ -2501,70 +2469,6 @@ static bool up_txready(struct uart_dev_s *dev)
   return ((up_serialin(priv, STM32_USART_ISR_OFFSET) & USART_ISR_TXE) != 0);
 }
 
-/****************************************************************************
- * Name: up_interrupt_u[s]art[n]
- *
- * Description:
- *   Interrupt handlers for U[S]ART[n] where n=1,..,6.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_STM32F7_USART1
-static int up_interrupt_usart1(int irq, void *context)
-{
-  return up_interrupt_common(&g_usart1priv);
-}
-#endif
-
-#ifdef CONFIG_STM32F7_USART2
-static int up_interrupt_usart2(int irq, void *context)
-{
-  return up_interrupt_common(&g_usart2priv);
-}
-#endif
-
-#ifdef CONFIG_STM32F7_USART3
-static int up_interrupt_usart3(int irq, void *context)
-{
-  return up_interrupt_common(&g_usart3priv);
-}
-#endif
-
-#ifdef CONFIG_STM32F7_UART4
-static int up_interrupt_uart4(int irq, void *context)
-{
-  return up_interrupt_common(&g_uart4priv);
-}
-#endif
-
-#ifdef CONFIG_STM32F7_UART5
-static int up_interrupt_uart5(int irq, void *context)
-{
-  return up_interrupt_common(&g_uart5priv);
-}
-#endif
-
-#ifdef CONFIG_STM32F7_USART6
-static int up_interrupt_usart6(int irq, void *context)
-{
-  return up_interrupt_common(&g_usart6priv);
-}
-#endif
-
-#ifdef CONFIG_STM32F7_UART7
-static int up_interrupt_uart7(int irq, void *context)
-{
-  return up_interrupt_common(&g_uart7priv);
-}
-#endif
-
-#ifdef CONFIG_STM32F7_UART8
-static int up_interrupt_uart8(int irq, void *context)
-{
-  return up_interrupt_common(&g_uart8priv);
-}
-#endif
-
 /****************************************************************************
  * Name: up_dma_rxcallback
  *
diff --git a/arch/arm/src/stm32f7/stm32_spi.c b/arch/arm/src/stm32f7/stm32_spi.c
new file mode 100644
index 0000000000000000000000000000000000000000..c00e717a09a121558fa07f3da21e56a9b4c1532c
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_spi.c
@@ -0,0 +1,1883 @@
+/************************************************************************************
+ * arm/arm/src/stm32f7/stm32_spi.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * The external functions, stm32_spi1/2/3/4/5/6select and stm32_spi1/2/3/4/5/6status
+ * must be * provided by board-specific logic.  They are implementations of the select
+ * and status methods of the SPI interface defined by struct spi_ops_s (see
+ * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize())
+ * are provided by common STM32 logic.  To use this common SPI logic on your
+ * board:
+ *
+ *   1. Provide logic in stm32_boardinitialize() to configure SPI chip select
+ *      pins.
+ *   2. Provide stm32_spi1/2/3/4/5/6select() and stm32_spi1/2/3/4/5/6status()
+ *      functions in your board-specific logic.  These functions will perform chip
+ *      selection and status operations using GPIOs in the way your board is
+ *      configured.
+ *   3. Add a calls to stm32_spibus_initialize() in your low level application
+ *      initialization logic
+ *   4. The handle returned by stm32_spibus_initialize() may then be used to bind the
+ *      SPI driver to higher level logic (e.g., calling
+ *      mmcsd_spislotinitialize(), for example, will bind the SPI driver to
+ *      the SPI MMC/SD driver).
+ *
+ ****************************************************c*******************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "up_internal.h"
+#include "up_arch.h"
+
+#include "chip.h"
+#include "stm32_gpio.h"
+#include "stm32_dma.h"
+#include "stm32_spi.h"
+
+#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \
+    defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \
+    defined(CONFIG_STM32F7_SPI5) || defined(CONFIG_STM32F7_SPI6)
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Configuration ********************************************************************/
+/* SPI interrupts */
+
+#ifdef CONFIG_STM32F7_SPI_INTERRUPTS
+#  error "Interrupt driven SPI not yet supported"
+#endif
+
+/* Can't have both interrupt driven SPI and SPI DMA */
+
+#if defined(CONFIG_STM32F7_SPI_INTERRUPTS) && defined(CONFIG_STM32F7_SPI_DMA)
+#  error "Cannot enable both interrupt mode and DMA mode for SPI"
+#endif
+
+/* SPI DMA priority */
+
+#ifdef CONFIG_STM32F7_SPI_DMA
+
+#  error "SPI DMA not yet supported"
+
+#  if defined(CONFIG_SPI_DMAPRIO)
+#    define SPI_DMA_PRIO  CONFIG_SPI_DMAPRIO
+#  elif defined(DMA_SCR_PRIMED)
+#    define SPI_DMA_PRIO  DMA_SCR_PRIMED
+#  else
+#    error "Unknown STM32 DMA"
+#  endif
+
+#if (SPI_DMA_PRIO & ~DMA_SCR_PL_MASK) != 0
+#    error "Illegal value for CONFIG_SPI_DMAPRIO"
+#endif
+
+
+/* DMA channel configuration */
+
+#  define SPI_RXDMA16_CONFIG        (SPI_DMA_PRIO|DMA_SCR_MSIZE_16BITS|DMA_SCR_PSIZE_16BITS|DMA_SCR_MINC|DMA_SCR_DIR_P2M)
+#  define SPI_RXDMA8_CONFIG         (SPI_DMA_PRIO|DMA_SCR_MSIZE_8BITS |DMA_SCR_PSIZE_8BITS |DMA_SCR_MINC|DMA_SCR_DIR_P2M)
+#  define SPI_RXDMA16NULL_CONFIG    (SPI_DMA_PRIO|DMA_SCR_MSIZE_8BITS |DMA_SCR_PSIZE_16BITS             |DMA_SCR_DIR_P2M)
+#  define SPI_RXDMA8NULL_CONFIG     (SPI_DMA_PRIO|DMA_SCR_MSIZE_8BITS |DMA_SCR_PSIZE_8BITS              |DMA_SCR_DIR_P2M)
+#  define SPI_TXDMA16_CONFIG        (SPI_DMA_PRIO|DMA_SCR_MSIZE_16BITS|DMA_SCR_PSIZE_16BITS|DMA_SCR_MINC|DMA_SCR_DIR_M2P)
+#  define SPI_TXDMA8_CONFIG         (SPI_DMA_PRIO|DMA_SCR_MSIZE_8BITS |DMA_SCR_PSIZE_8BITS |DMA_SCR_MINC|DMA_SCR_DIR_M2P)
+#  define SPI_TXDMA16NULL_CONFIG    (SPI_DMA_PRIO|DMA_SCR_MSIZE_8BITS |DMA_SCR_PSIZE_16BITS             |DMA_SCR_DIR_M2P)
+#  define SPI_TXDMA8NULL_CONFIG     (SPI_DMA_PRIO|DMA_SCR_MSIZE_8BITS |DMA_SCR_PSIZE_8BITS              |DMA_SCR_DIR_M2P)
+#endif
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+
+struct stm32_spidev_s
+{
+  struct spi_dev_s spidev;     /* Externally visible part of the SPI interface */
+  uint32_t         spibase;    /* SPIn base address */
+  uint32_t         spiclock;   /* Clocking for the SPI module */
+#ifdef CONFIG_STM32F7_SPI_INTERRUPTS
+  uint8_t          spiirq;     /* SPI IRQ number */
+#endif
+#ifdef CONFIG_STM32F7_SPI_DMA
+  volatile uint8_t rxresult;   /* Result of the RX DMA */
+  volatile uint8_t txresult;   /* Result of the RX DMA */
+  uint8_t          rxch;       /* The RX DMA channel number */
+  uint8_t          txch;       /* The TX DMA channel number */
+  DMA_HANDLE       rxdma;      /* DMA channel handle for RX transfers */
+  DMA_HANDLE       txdma;      /* DMA channel handle for TX transfers */
+  sem_t            rxsem;      /* Wait for RX DMA to complete */
+  sem_t            txsem;      /* Wait for TX DMA to complete */
+  uint32_t         txccr;      /* DMA control register for TX transfers */
+  uint32_t         rxccr;      /* DMA control register for RX transfers */
+#endif
+  sem_t            exclsem;    /* Held while chip is selected for mutual exclusion */
+  uint32_t         frequency;  /* Requested clock frequency */
+  uint32_t         actual;     /* Actual clock frequency */
+  int8_t           nbits;      /* Width of word in bits */
+  uint8_t          mode;       /* Mode 0,1,2,3 */
+};
+
+/************************************************************************************
+ * Private Function Prototypes
+ ************************************************************************************/
+
+/* Helpers */
+
+static inline uint16_t spi_getreg(FAR struct stm32_spidev_s *priv, uint8_t offset);
+static inline void spi_putreg(FAR struct stm32_spidev_s *priv, uint8_t offset,
+                                 uint16_t value);
+static inline uint16_t spi_readword(FAR struct stm32_spidev_s *priv);
+static inline void spi_writeword(FAR struct stm32_spidev_s *priv, uint16_t byte);
+static inline bool spi_9to16bitmode(FAR struct stm32_spidev_s *priv);
+
+/* DMA support */
+
+#ifdef CONFIG_STM32F7_SPI_DMA
+static void        spi_dmarxwait(FAR struct stm32_spidev_s *priv);
+static void        spi_dmatxwait(FAR struct stm32_spidev_s *priv);
+static inline void spi_dmarxwakeup(FAR struct stm32_spidev_s *priv);
+static inline void spi_dmatxwakeup(FAR struct stm32_spidev_s *priv);
+static void        spi_dmarxcallback(DMA_HANDLE handle, uint8_t isr, void *arg);
+static void        spi_dmatxcallback(DMA_HANDLE handle, uint8_t isr, void *arg);
+static void        spi_dmarxsetup(FAR struct stm32_spidev_s *priv,
+                                  FAR void *rxbuffer, FAR void *rxdummy, size_t nwords);
+static void        spi_dmatxsetup(FAR struct stm32_spidev_s *priv,
+                                  FAR const void *txbuffer, FAR const void *txdummy, size_t nwords);
+static inline void spi_dmarxstart(FAR struct stm32_spidev_s *priv);
+static inline void spi_dmatxstart(FAR struct stm32_spidev_s *priv);
+#endif
+
+/* SPI methods */
+
+static int         spi_lock(FAR struct spi_dev_s *dev, bool lock);
+static uint32_t    spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
+static void        spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
+static void        spi_setbits(FAR struct spi_dev_s *dev, int nbits);
+#ifdef CONFIG_SPI_HWFEATURES
+static int         spi_hwfeatures(FAR struct spi_dev_s *dev,
+                                  spi_hwfeatures_t features);
+#endif
+static uint16_t    spi_send(FAR struct spi_dev_s *dev, uint16_t wd);
+static void        spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
+                                FAR void *rxbuffer, size_t nwords);
+#ifndef CONFIG_SPI_EXCHANGE
+static void        spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
+                                size_t nwords);
+static void        spi_recvblock(FAR struct spi_dev_s *dev, FAR void *rxbuffer,
+                                 size_t nwords);
+#endif
+
+/* Initialization */
+
+static void        spi_bus_initialize(FAR struct stm32_spidev_s *priv);
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32F7_SPI1
+static const struct spi_ops_s g_sp1iops =
+{
+  .lock              = spi_lock,
+  .select            = stm32_spi1select,
+  .setfrequency      = spi_setfrequency,
+  .setmode           = spi_setmode,
+  .setbits           = spi_setbits,
+#ifdef CONFIG_SPI_HWFEATURES
+  .hwfeatures        = spi_hwfeatures,
+#endif
+  .status            = stm32_spi1status,
+#ifdef CONFIG_SPI_CMDDATA
+  .cmddata           = stm32_spi1cmddata,
+#endif
+  .send              = spi_send,
+#ifdef CONFIG_SPI_EXCHANGE
+  .exchange          = spi_exchange,
+#else
+  .sndblock          = spi_sndblock,
+  .recvblock         = spi_recvblock,
+#endif
+#ifdef CONFIG_SPI_CALLBACK
+  .registercallback  = stm32_spi1register,  /* Provided externally */
+#else
+  .registercallback  = 0,                   /* Not implemented */
+#endif
+};
+
+static struct stm32_spidev_s g_spi1dev =
+{
+  .spidev   = { &g_sp1iops },
+  .spibase  = STM32_SPI1_BASE,
+  .spiclock = STM32_PCLK2_FREQUENCY,
+#ifdef CONFIG_STM32F7_SPI_INTERRUPTS
+  .spiirq   = STM32_IRQ_SPI1,
+#endif
+#ifdef CONFIG_STM32F7_SPI_DMA
+  .rxch     = DMACHAN_SPI1_RX,
+  .txch     = DMACHAN_SPI1_TX,
+#endif
+};
+#endif
+
+#ifdef CONFIG_STM32F7_SPI2
+static const struct spi_ops_s g_sp2iops =
+{
+  .lock              = spi_lock,
+  .select            = stm32_spi2select,
+  .setfrequency      = spi_setfrequency,
+  .setmode           = spi_setmode,
+  .setbits           = spi_setbits,
+#ifdef CONFIG_SPI_HWFEATURES
+  .hwfeatures        = spi_hwfeatures,
+#endif
+  .status            = stm32_spi2status,
+#ifdef CONFIG_SPI_CMDDATA
+  .cmddata           = stm32_spi2cmddata,
+#endif
+  .send              = spi_send,
+#ifdef CONFIG_SPI_EXCHANGE
+  .exchange          = spi_exchange,
+#else
+  .sndblock          = spi_sndblock,
+  .recvblock         = spi_recvblock,
+#endif
+#ifdef CONFIG_SPI_CALLBACK
+  .registercallback  = stm32_spi2register,  /* provided externally */
+#else
+  .registercallback  = 0,  /* not implemented */
+#endif
+};
+
+static struct stm32_spidev_s g_spi2dev =
+{
+  .spidev   = { &g_sp2iops },
+  .spibase  = STM32_SPI2_BASE,
+  .spiclock = STM32_PCLK1_FREQUENCY,
+#ifdef CONFIG_STM32F7_SPI_INTERRUPTS
+  .spiirq   = STM32_IRQ_SPI2,
+#endif
+#ifdef CONFIG_STM32F7_SPI_DMA
+  .rxch     = DMACHAN_SPI2_RX,
+  .txch     = DMACHAN_SPI2_TX,
+#endif
+};
+#endif
+
+#ifdef CONFIG_STM32F7_SPI3
+static const struct spi_ops_s g_sp3iops =
+{
+  .lock              = spi_lock,
+  .select            = stm32_spi3select,
+  .setfrequency      = spi_setfrequency,
+  .setmode           = spi_setmode,
+  .setbits           = spi_setbits,
+#ifdef CONFIG_SPI_HWFEATURES
+  .hwfeatures        = spi_hwfeatures,
+#endif
+  .status            = stm32_spi3status,
+#ifdef CONFIG_SPI_CMDDATA
+  .cmddata           = stm32_spi3cmddata,
+#endif
+  .send              = spi_send,
+#ifdef CONFIG_SPI_EXCHANGE
+  .exchange          = spi_exchange,
+#else
+  .sndblock          = spi_sndblock,
+  .recvblock         = spi_recvblock,
+#endif
+#ifdef CONFIG_SPI_CALLBACK
+  .registercallback  = stm32_spi3register,  /* provided externally */
+#else
+  .registercallback  = 0,  /* not implemented */
+#endif
+};
+
+static struct stm32_spidev_s g_spi3dev =
+{
+  .spidev   = { &g_sp3iops },
+  .spibase  = STM32_SPI3_BASE,
+  .spiclock = STM32_PCLK1_FREQUENCY,
+#ifdef CONFIG_STM32F7_SPI_INTERRUPTS
+  .spiirq   = STM32_IRQ_SPI3,
+#endif
+#ifdef CONFIG_STM32F7_SPI_DMA
+  .rxch     = DMACHAN_SPI3_RX,
+  .txch     = DMACHAN_SPI3_TX,
+#endif
+};
+#endif
+
+#ifdef CONFIG_STM32F7_SPI4
+static const struct spi_ops_s g_sp4iops =
+{
+  .lock              = spi_lock,
+  .select            = stm32_spi4select,
+  .setfrequency      = spi_setfrequency,
+  .setmode           = spi_setmode,
+  .setbits           = spi_setbits,
+#ifdef CONFIG_SPI_HWFEATURES
+  .hwfeatures        = spi_hwfeatures,
+#endif
+  .status            = stm32_spi4status,
+#ifdef CONFIG_SPI_CMDDATA
+  .cmddata           = stm32_spi4cmddata,
+#endif
+  .send              = spi_send,
+#ifdef CONFIG_SPI_EXCHANGE
+  .exchange          = spi_exchange,
+#else
+  .sndblock          = spi_sndblock,
+  .recvblock         = spi_recvblock,
+#endif
+#ifdef CONFIG_SPI_CALLBACK
+  .registercallback  = stm32_spi4register,  /* provided externally */
+#else
+  .registercallback  = 0,  /* not implemented */
+#endif
+};
+
+static struct stm32_spidev_s g_spi4dev =
+{
+  .spidev   = { &g_sp4iops },
+  .spibase  = STM32_SPI4_BASE,
+  .spiclock = STM32_PCLK2_FREQUENCY,
+#ifdef CONFIG_STM32F7_SPI_INTERRUPTS
+  .spiirq   = STM32_IRQ_SPI4,
+#endif
+#ifdef CONFIG_STM32F7_SPI_DMA
+  .rxch     = DMACHAN_SPI4_RX,
+  .txch     = DMACHAN_SPI4_TX,
+#endif
+};
+#endif
+
+#ifdef CONFIG_STM32F7_SPI5
+static const struct spi_ops_s g_sp5iops =
+{
+  .lock              = spi_lock,
+  .select            = stm32_spi5select,
+  .setfrequency      = spi_setfrequency,
+  .setmode           = spi_setmode,
+  .setbits           = spi_setbits,
+#ifdef CONFIG_SPI_HWFEATURES
+  .hwfeatures        = spi_hwfeatures,
+#endif
+  .status            = stm32_spi5status,
+#ifdef CONFIG_SPI_CMDDATA
+  .cmddata           = stm32_spi5cmddata,
+#endif
+  .send              = spi_send,
+#ifdef CONFIG_SPI_EXCHANGE
+  .exchange          = spi_exchange,
+#else
+  .sndblock          = spi_sndblock,
+  .recvblock         = spi_recvblock,
+#endif
+#ifdef CONFIG_SPI_CALLBACK
+  .registercallback  = stm32_spi5register,  /* provided externally */
+#else
+  .registercallback  = 0,  /* not implemented */
+#endif
+};
+
+static struct stm32_spidev_s g_spi5dev =
+{
+  .spidev   = { &g_sp5iops },
+  .spibase  = STM32_SPI5_BASE,
+  .spiclock = STM32_PCLK2_FREQUENCY,
+#ifdef CONFIG_STM32F7_SPI_INTERRUPTS
+  .spiirq   = STM32_IRQ_SPI5,
+#endif
+#ifdef CONFIG_STM32F7_SPI_DMA
+  .rxch     = DMACHAN_SPI5_RX,
+  .txch     = DMACHAN_SPI5_TX,
+#endif
+};
+#endif
+
+#ifdef CONFIG_STM32F7_SPI6
+static const struct spi_ops_s g_sp6iops =
+{
+  .lock              = spi_lock,
+  .select            = stm32_spi6select,
+  .setfrequency      = spi_setfrequency,
+  .setmode           = spi_setmode,
+  .setbits           = spi_setbits,
+#ifdef CONFIG_SPI_HWFEATURES
+  .hwfeatures        = spi_hwfeatures,
+#endif
+  .status            = stm32_spi6status,
+#ifdef CONFIG_SPI_CMDDATA
+  .cmddata           = stm32_spi3cmddata,
+#endif
+  .send              = spi_send,
+#ifdef CONFIG_SPI_EXCHANGE
+  .exchange          = spi_exchange,
+#else
+  .sndblock          = spi_sndblock,
+  .recvblock         = spi_recvblock,
+#endif
+#ifdef CONFIG_SPI_CALLBACK
+  .registercallback  = stm32_spi6register,  /* provided externally */
+#else
+  .registercallback  = 0,  /* not implemented */
+#endif
+};
+
+static struct stm32_spidev_s g_spi6dev =
+{
+  .spidev   = { &g_sp6iops },
+  .spibase  = STM32_SPI6_BASE,
+  .spiclock = STM32_PCLK2_FREQUENCY,
+#ifdef CONFIG_STM32F7_SPI_INTERRUPTS
+  .spiirq   = STM32_IRQ_SPI6,
+#endif
+#ifdef CONFIG_STM32F7_SPI_DMA
+  .rxch     = DMACHAN_SPI6_RX,
+  .txch     = DMACHAN_SPI6_TX,
+#endif
+};
+#endif
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: spi_getreg8
+ *
+ * Description:
+ *   Get the contents of the SPI register at offset
+ *
+ * Input Parameters:
+ *   priv   - private SPI device structure
+ *   offset - offset to the register of interest
+ *
+ * Returned Value:
+ *   The contents of the 8-bit register
+ *
+ ************************************************************************************/
+
+static inline uint8_t spi_getreg8(FAR struct stm32_spidev_s *priv, uint8_t offset)
+{
+  return getreg8(priv->spibase + offset);
+}
+
+/************************************************************************************
+ * Name: spi_putreg8
+ *
+ * Description:
+ *   Write a 8-bit value to the SPI register at offset
+ *
+ * Input Parameters:
+ *   priv   - private SPI device structure
+ *   offset - offset to the register of interest
+ *   value  - the 8-bit value to be written
+ *
+ ************************************************************************************/
+
+static inline void spi_putreg8(FAR struct stm32_spidev_s *priv, uint8_t offset,
+                               uint8_t value)
+{
+  putreg8(value, priv->spibase + offset);
+}
+
+/************************************************************************************
+ * Name: spi_getreg
+ *
+ * Description:
+ *   Get the contents of the SPI register at offset
+ *
+ * Input Parameters:
+ *   priv   - private SPI device structure
+ *   offset - offset to the register of interest
+ *
+ * Returned Value:
+ *   The contents of the 16-bit register
+ *
+ ************************************************************************************/
+
+static inline uint16_t spi_getreg(FAR struct stm32_spidev_s *priv, uint8_t offset)
+{
+  return getreg16(priv->spibase + offset);
+}
+
+/************************************************************************************
+ * Name: spi_putreg
+ *
+ * Description:
+ *   Write a 16-bit value to the SPI register at offset
+ *
+ * Input Parameters:
+ *   priv   - private SPI device structure
+ *   offset - offset to the register of interest
+ *   value  - the 16-bit value to be written
+ *
+ * Returned Value:
+ *   The contents of the 16-bit register
+ *
+ ************************************************************************************/
+
+static inline void spi_putreg(FAR struct stm32_spidev_s *priv, uint8_t offset,
+                              uint16_t value)
+{
+  putreg16(value, priv->spibase + offset);
+}
+
+/************************************************************************************
+ * Name: spi_readword
+ *
+ * Description:
+ *   Read one byte from SPI
+ *
+ * Input Parameters:
+ *   priv - Device-specific state data
+ *
+ * Returned Value:
+ *   Byte as read
+ *
+ ************************************************************************************/
+
+static inline uint16_t spi_readword(FAR struct stm32_spidev_s *priv)
+{
+  /* Wait until the receive buffer is not empty */
+
+  while ((spi_getreg(priv, STM32_SPI_SR_OFFSET) & SPI_SR_RXNE) == 0);
+
+  /* Then return the received byte */
+
+  return spi_getreg(priv, STM32_SPI_DR_OFFSET);
+}
+
+/************************************************************************************
+ * Name: spi_writeword
+ *
+ * Description:
+ *   Write one byte to SPI
+ *
+ * Input Parameters:
+ *   priv - Device-specific state data
+ *   byte - Byte to send
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+static inline void spi_writeword(FAR struct stm32_spidev_s *priv, uint16_t word)
+{
+  /* Wait until the transmit buffer is empty */
+
+  while ((spi_getreg(priv, STM32_SPI_SR_OFFSET) & SPI_SR_TXE) == 0);
+
+  /* Then send the byte */
+
+  spi_putreg(priv, STM32_SPI_DR_OFFSET, word);
+}
+
+/************************************************************************************
+ * Name: spi_readbyte
+ *
+ * Description:
+ *   Read one byte from SPI
+ *
+ * Input Parameters:
+ *   priv - Device-specific state data
+ *
+ * Returned Value:
+ *   Byte as read
+ *
+ ************************************************************************************/
+
+static inline uint8_t spi_readbyte(FAR struct stm32_spidev_s *priv)
+{
+  /* Wait until the receive buffer is not empty */
+
+  while ((spi_getreg(priv, STM32_SPI_SR_OFFSET) & SPI_SR_RXNE) == 0);
+
+  /* Then return the received byte */
+
+  return spi_getreg8(priv, STM32_SPI_DR_OFFSET);
+}
+
+/************************************************************************************
+ * Name: spi_writebyte
+ *
+ * Description:
+ *   Write one 8-bit frame to the SPI FIFO
+ *
+ * Input Parameters:
+ *   priv - Device-specific state data
+ *   byte - Byte to send
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+static inline void spi_writebyte(FAR struct stm32_spidev_s *priv, uint8_t byte)
+{
+  /* Wait until the transmit buffer is empty */
+
+  while ((spi_getreg(priv, STM32_SPI_SR_OFFSET) & SPI_SR_TXE) == 0);
+
+  /* Then send the byte */
+
+  spi_putreg8(priv, STM32_SPI_DR_OFFSET, byte);
+}
+
+/************************************************************************************
+ * Name: spi_9to16bitmode
+ *
+ * Description:
+ *   Check if the SPI is operating in more then 8 bit mode
+ *
+ * Input Parameters:
+ *   priv     - Device-specific state data
+ *
+ * Returned Value:
+ *   true: >8 bit mode-bit mode, false: <= 8-bit mode
+ *
+ ************************************************************************************/
+
+static inline bool spi_9to16bitmode(FAR struct stm32_spidev_s *priv)
+{
+  return ((spi_getreg(priv, STM32_SPI_CR2_OFFSET) & SPI_CR2_DS_9BIT) == SPI_CR2_DS_9BIT);
+}
+
+/************************************************************************************
+ * Name: spi_dmarxwait
+ *
+ * Description:
+ *   Wait for DMA to complete.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32F7_SPI_DMA
+static void spi_dmarxwait(FAR struct stm32_spidev_s *priv)
+{
+  /* Take the semaphore (perhaps waiting).  If the result is zero, then the DMA
+   * must not really have completed???
+   */
+
+  while (sem_wait(&priv->rxsem) != 0 || priv->rxresult == 0)
+    {
+      /* The only case that an error should occur here is if the wait was awakened
+       * by a signal.
+       */
+
+      ASSERT(errno == EINTR);
+    }
+}
+#endif
+
+/************************************************************************************
+ * Name: spi_dmatxwait
+ *
+ * Description:
+ *   Wait for DMA to complete.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32F7_SPI_DMA
+static void spi_dmatxwait(FAR struct stm32_spidev_s *priv)
+{
+  /* Take the semaphore (perhaps waiting).  If the result is zero, then the DMA
+   * must not really have completed???
+   */
+
+  while (sem_wait(&priv->txsem) != 0 || priv->txresult == 0)
+    {
+      /* The only case that an error should occur here is if the wait was awakened
+       * by a signal.
+       */
+
+      ASSERT(errno == EINTR);
+    }
+}
+#endif
+
+/************************************************************************************
+ * Name: spi_dmarxwakeup
+ *
+ * Description:
+ *   Signal that DMA is complete
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32F7_SPI_DMA
+static inline void spi_dmarxwakeup(FAR struct stm32_spidev_s *priv)
+{
+  (void)sem_post(&priv->rxsem);
+}
+#endif
+
+/************************************************************************************
+ * Name: spi_dmatxwakeup
+ *
+ * Description:
+ *   Signal that DMA is complete
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32F7_SPI_DMA
+static inline void spi_dmatxwakeup(FAR struct stm32_spidev_s *priv)
+{
+  (void)sem_post(&priv->txsem);
+}
+#endif
+
+/************************************************************************************
+ * Name: spi_dmarxcallback
+ *
+ * Description:
+ *   Called when the RX DMA completes
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32F7_SPI_DMA
+static void spi_dmarxcallback(DMA_HANDLE handle, uint8_t isr, void *arg)
+{
+  FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)arg;
+
+  /* Wake-up the SPI driver */
+
+  priv->rxresult = isr | 0x080;  /* OR'ed with 0x80 to assure non-zero */
+  spi_dmarxwakeup(priv);
+}
+#endif
+
+/************************************************************************************
+ * Name: spi_dmatxcallback
+ *
+ * Description:
+ *   Called when the RX DMA completes
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32F7_SPI_DMA
+static void spi_dmatxcallback(DMA_HANDLE handle, uint8_t isr, void *arg)
+{
+  FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)arg;
+
+  /* Wake-up the SPI driver */
+
+  priv->txresult = isr | 0x080;  /* OR'ed with 0x80 to assure non-zero */
+  spi_dmatxwakeup(priv);
+}
+#endif
+
+/************************************************************************************
+ * Name: spi_dmarxsetup
+ *
+ * Description:
+ *   Setup to perform RX DMA
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32F7_SPI_DMA
+static void spi_dmarxsetup(FAR struct stm32_spidev_s *priv, FAR void *rxbuffer,
+                           FAR void *rxdummy, size_t nwords)
+{
+  /* 8- or 16-bit mode? */
+
+  if (spi_9to16bitmode(priv))
+    {
+      /* 16-bit mode -- is there a buffer to receive data in? */
+
+      if (rxbuffer)
+        {
+          priv->rxccr = SPI_RXDMA16_CONFIG;
+        }
+      else
+        {
+          rxbuffer    = rxdummy;
+          priv->rxccr = SPI_RXDMA16NULL_CONFIG;
+        }
+    }
+  else
+    {
+      /* 8-bit mode -- is there a buffer to receive data in? */
+
+      if (rxbuffer)
+        {
+          priv->rxccr = SPI_RXDMA8_CONFIG;
+        }
+      else
+        {
+          rxbuffer    = rxdummy;
+          priv->rxccr = SPI_RXDMA8NULL_CONFIG;
+        }
+    }
+
+  /* Configure the RX DMA */
+
+  stm32_dmasetup(priv->rxdma, priv->spibase + STM32_SPI_DR_OFFSET,
+                 (uint32_t)rxbuffer, nwords, priv->rxccr);
+}
+#endif
+
+/************************************************************************************
+ * Name: spi_dmatxsetup
+ *
+ * Description:
+ *   Setup to perform TX DMA
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32F7_SPI_DMA
+static void spi_dmatxsetup(FAR struct stm32_spidev_s *priv, FAR const void *txbuffer,
+                           FAR const void *txdummy, size_t nwords)
+{
+  /* 8- or 16-bit mode? */
+
+  if (spi_9to16bitmode(priv))
+    {
+      /* 16-bit mode -- is there a buffer to transfer data from? */
+
+      if (txbuffer)
+        {
+          priv->txccr = SPI_TXDMA16_CONFIG;
+        }
+      else
+        {
+          txbuffer    = txdummy;
+          priv->txccr = SPI_TXDMA16NULL_CONFIG;
+        }
+    }
+  else
+    {
+      /* 8-bit mode -- is there a buffer to transfer data from? */
+
+      if (txbuffer)
+        {
+          priv->txccr = SPI_TXDMA8_CONFIG;
+        }
+      else
+        {
+          txbuffer    = txdummy;
+          priv->txccr = SPI_TXDMA8NULL_CONFIG;
+        }
+    }
+
+  /* Setup the TX DMA */
+
+  stm32_dmasetup(priv->txdma, priv->spibase + STM32_SPI_DR_OFFSET,
+                 (uint32_t)txbuffer, nwords, priv->txccr);
+}
+#endif
+
+/************************************************************************************
+ * Name: spi_dmarxstart
+ *
+ * Description:
+ *   Start RX DMA
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32F7_SPI_DMA
+static inline void spi_dmarxstart(FAR struct stm32_spidev_s *priv)
+{
+  priv->rxresult = 0;
+  stm32_dmastart(priv->rxdma, spi_dmarxcallback, priv, false);
+}
+#endif
+
+/************************************************************************************
+ * Name: spi_dmatxstart
+ *
+ * Description:
+ *   Start TX DMA
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32F7_SPI_DMA
+static inline void spi_dmatxstart(FAR struct stm32_spidev_s *priv)
+{
+  priv->txresult = 0;
+  stm32_dmastart(priv->txdma, spi_dmatxcallback, priv, false);
+}
+#endif
+
+/************************************************************************************
+ * Name: spi_modifycr1
+ *
+ * Description:
+ *   Clear and set bits in the CR1 register
+ *
+ * Input Parameters:
+ *   priv    - Device-specific state data
+ *   clrbits - The bits to clear
+ *   setbits - The bits to set
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+static void spi_modifycr1(FAR struct stm32_spidev_s *priv, uint16_t setbits,
+                          uint16_t clrbits)
+{
+  uint16_t cr1;
+  cr1 = spi_getreg(priv, STM32_SPI_CR1_OFFSET);
+  cr1 &= ~clrbits;
+  cr1 |= setbits;
+  spi_putreg(priv, STM32_SPI_CR1_OFFSET, cr1);
+}
+
+/************************************************************************************
+ * Name: spi_modifycr2
+ *
+ * Description:
+ *   Clear and set bits in the CR2 register
+ *
+ * Input Parameters:
+ *   priv    - Device-specific state data
+ *   clrbits - The bits to clear
+ *   setbits - The bits to set
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+static void spi_modifycr2(FAR struct stm32_spidev_s *priv, uint16_t setbits,
+                          uint16_t clrbits)
+{
+  uint16_t cr2;
+  cr2 = spi_getreg(priv, STM32_SPI_CR2_OFFSET);
+  cr2 &= ~clrbits;
+  cr2 |= setbits;
+  spi_putreg(priv, STM32_SPI_CR2_OFFSET, cr2);
+}
+
+/************************************************************************************
+ * Name: spi_lock
+ *
+ * Description:
+ *   On SPI busses where there are multiple devices, it will be necessary to
+ *   lock SPI to have exclusive access to the busses for a sequence of
+ *   transfers.  The bus should be locked before the chip is selected. After
+ *   locking the SPI bus, the caller should then also call the setfrequency,
+ *   setbits, and setmode methods to make sure that the SPI is properly
+ *   configured for the device.  If the SPI buss is being shared, then it
+ *   may have been left in an incompatible state.
+ *
+ * Input Parameters:
+ *   dev  - Device-specific state data
+ *   lock - true: Lock spi bus, false: unlock SPI bus
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
+{
+  FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev;
+
+  if (lock)
+    {
+      /* Take the semaphore (perhaps waiting) */
+
+      while (sem_wait(&priv->exclsem) != 0)
+        {
+          /* The only case that an error should occur here is if the wait was awakened
+           * by a signal.
+           */
+
+          ASSERT(errno == EINTR);
+        }
+    }
+  else
+    {
+      (void)sem_post(&priv->exclsem);
+    }
+
+  return OK;
+}
+
+/************************************************************************************
+ * Name: spi_setfrequency
+ *
+ * Description:
+ *   Set the SPI frequency.
+ *
+ * Input Parameters:
+ *   dev -       Device-specific state data
+ *   frequency - The SPI frequency requested
+ *
+ * Returned Value:
+ *   Returns the actual frequency selected
+ *
+ ************************************************************************************/
+
+static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
+{
+  FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev;
+  uint16_t setbits;
+  uint32_t actual;
+
+  /* Limit to max possible (if STM32_SPI_CLK_MAX is defined in board.h) */
+
+  if (frequency > STM32_SPI_CLK_MAX)
+    {
+      frequency = STM32_SPI_CLK_MAX;
+    }
+
+  /* Has the frequency changed? */
+
+  if (frequency != priv->frequency)
+    {
+      /* Choices are limited by PCLK frequency with a set of divisors */
+
+      if (frequency >= priv->spiclock >> 1)
+        {
+          /* More than fPCLK/2.  This is as fast as we can go */
+
+          setbits = SPI_CR1_FPCLCKd2; /* 000: fPCLK/2 */
+          actual = priv->spiclock >> 1;
+        }
+      else if (frequency >= priv->spiclock >> 2)
+        {
+          /* Between fPCLCK/2 and fPCLCK/4, pick the slower */
+
+          setbits = SPI_CR1_FPCLCKd4; /* 001: fPCLK/4 */
+          actual = priv->spiclock >> 2;
+        }
+      else if (frequency >= priv->spiclock >> 3)
+        {
+          /* Between fPCLCK/4 and fPCLCK/8, pick the slower */
+
+          setbits = SPI_CR1_FPCLCKd8; /* 010: fPCLK/8 */
+          actual = priv->spiclock >> 3;
+        }
+      else if (frequency >= priv->spiclock >> 4)
+        {
+          /* Between fPCLCK/8 and fPCLCK/16, pick the slower */
+
+          setbits = SPI_CR1_FPCLCKd16; /* 011: fPCLK/16 */
+          actual = priv->spiclock >> 4;
+        }
+      else if (frequency >= priv->spiclock >> 5)
+        {
+          /* Between fPCLCK/16 and fPCLCK/32, pick the slower */
+
+          setbits = SPI_CR1_FPCLCKd32; /* 100: fPCLK/32 */
+          actual = priv->spiclock >> 5;
+        }
+      else if (frequency >= priv->spiclock >> 6)
+        {
+          /* Between fPCLCK/32 and fPCLCK/64, pick the slower */
+
+          setbits = SPI_CR1_FPCLCKd64; /*  101: fPCLK/64 */
+          actual = priv->spiclock >> 6;
+        }
+      else if (frequency >= priv->spiclock >> 7)
+        {
+          /* Between fPCLCK/64 and fPCLCK/128, pick the slower */
+
+          setbits = SPI_CR1_FPCLCKd128; /* 110: fPCLK/128 */
+          actual = priv->spiclock >> 7;
+        }
+      else
+        {
+          /* Less than fPCLK/128.  This is as slow as we can go */
+
+          setbits = SPI_CR1_FPCLCKd256; /* 111: fPCLK/256 */
+          actual = priv->spiclock >> 8;
+        }
+
+      spi_modifycr1(priv, 0, SPI_CR1_SPE);
+      spi_modifycr1(priv, setbits, SPI_CR1_BR_MASK);
+      spi_modifycr1(priv, SPI_CR1_SPE, 0);
+
+      /* Save the frequency selection so that subsequent reconfigurations will be
+       * faster.
+       */
+
+      spiinfo("Frequency %d->%d\n", frequency, actual);
+
+      priv->frequency = frequency;
+      priv->actual    = actual;
+    }
+
+  return priv->actual;
+}
+
+/************************************************************************************
+ * Name: spi_setmode
+ *
+ * Description:
+ *   Set the SPI mode.  see enum spi_mode_e for mode definitions
+ *
+ * Input Parameters:
+ *   dev  - Device-specific state data
+ *   mode - The SPI mode requested
+ *
+ * Returned Value:
+ *   Returns the actual frequency selected
+ *
+ ************************************************************************************/
+
+static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
+{
+  FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev;
+  uint16_t setbits;
+  uint16_t clrbits;
+
+  spiinfo("mode=%d\n", mode);
+
+  /* Has the mode changed? */
+
+  if (mode != priv->mode)
+    {
+      /* Yes... Set CR1 appropriately */
+
+      switch (mode)
+        {
+        case SPIDEV_MODE0: /* CPOL=0; CPHA=0 */
+          setbits = 0;
+          clrbits = SPI_CR1_CPOL | SPI_CR1_CPHA;
+          break;
+
+        case SPIDEV_MODE1: /* CPOL=0; CPHA=1 */
+          setbits = SPI_CR1_CPHA;
+          clrbits = SPI_CR1_CPOL;
+          break;
+
+        case SPIDEV_MODE2: /* CPOL=1; CPHA=0 */
+          setbits = SPI_CR1_CPOL;
+          clrbits = SPI_CR1_CPHA;
+          break;
+
+        case SPIDEV_MODE3: /* CPOL=1; CPHA=1 */
+          setbits = SPI_CR1_CPOL | SPI_CR1_CPHA;
+          clrbits = 0;
+          break;
+
+        default:
+          return;
+        }
+
+      spi_modifycr1(priv, 0, SPI_CR1_SPE);
+      spi_modifycr1(priv, setbits, clrbits);
+      spi_modifycr1(priv, SPI_CR1_SPE, 0);
+
+      /* Save the mode so that subsequent re-configurations will be faster */
+
+      priv->mode = mode;
+    }
+}
+
+/************************************************************************************
+ * Name: spi_setbits
+ *
+ * Description:
+ *   Set the number of bits per word.
+ *
+ * Input Parameters:
+ *   dev   - Device-specific state data
+ *   nbits - The number of bits requested
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
+{
+  FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev;
+  uint16_t setbits;
+  uint16_t clrbits;
+  int savbits = nbits;
+
+  spiinfo("nbits=%d\n", nbits);
+
+  /* Has the number of bits changed? */
+
+  if (nbits != priv->nbits)
+    {
+      /* Yes... Set CR2 appropriately */
+      /* Set the number of bits (valid range 4-16) */
+
+      if (nbits < 4 || nbits > 16)
+        {
+          return;
+        }
+
+      clrbits = SPI_CR2_DS_MASK;
+      setbits = SPI_CR2_DS_VAL(nbits);
+
+      /* If nbits is <=8, then we are in byte mode and FRXTH shall be set
+       * (else, transaction will not complete).
+       */
+
+      if (nbits < 9)
+        {
+          setbits |= SPI_CR2_FRXTH; /* RX FIFO Threshold = 1 byte */
+        }
+      else
+        {
+          clrbits |= SPI_CR2_FRXTH; /* RX FIFO Threshold = 2 bytes */
+        }
+
+      spi_modifycr1(priv, 0, SPI_CR1_SPE);
+      spi_modifycr2(priv, setbits, clrbits);
+      spi_modifycr1(priv, SPI_CR1_SPE, 0);
+
+      /* Save the selection so the subsequence re-configurations will be faster */
+
+      priv->nbits = savbits; // nbits has been clobbered... save the signed value.
+    }
+}
+
+/****************************************************************************
+ * Name: spi_hwfeatures
+ *
+ * Description:
+ *   Set hardware-specific feature flags.
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   features - H/W feature flags
+ *
+ * Returned Value:
+ *   Zero (OK) if the selected H/W features are enabled; A negated errno
+ *   value if any H/W feature is not supportable.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI_HWFEATURES
+static int spi_hwfeatures(FAR struct spi_dev_s *dev, spi_hwfeatures_t features)
+{
+#ifdef CONFIG_SPI_BITORDER
+  FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev;
+  uint16_t setbitscr1;
+  uint16_t clrbitscr1;
+  uint16_t setbitscr2;
+  uint16_t clrbitscr2;
+  int savbits = nbits;
+
+  spiinfo("features=%08x\n", features);
+
+  /* Transfer data LSB first? */
+
+  if ((features & HWFEAT_LSBFIRST) != 0)
+    {
+      setbits = SPI_CR1_LSBFIRST;
+      clrbits = 0;
+    }
+  else
+    {
+      setbits = 0;
+      clrbits = SPI_CR1_LSBFIRST;
+    }
+
+  spi_modifycr1(priv, 0, SPI_CR1_SPE);
+  spi_modifycr1(priv, setbits, clrbits);
+  spi_modifycr1(priv, SPI_CR1_SPE, 0);
+
+  /* Other H/W features are not supported */
+
+  return ((features & ~HWFEAT_LSBFIRST) == 0) ? OK : -ENOSYS;
+#else
+  return -ENOSYS;
+#endif
+}
+#endif
+
+/************************************************************************************
+ * Name: spi_send
+ *
+ * Description:
+ *   Exchange one word on SPI
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   wd  - The word to send.  the size of the data is determined by the
+ *         number of bits selected for the SPI interface.
+ *
+ * Returned Value:
+ *   response
+ *
+ ************************************************************************************/
+
+static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
+{
+  FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev;
+  uint32_t regval;
+  uint16_t ret;
+
+  DEBUGASSERT(priv && priv->spibase);
+
+  /* According to the number of bits, access data register as word or byte
+   * This is absolutely required because of packing. With nbits <=8 bit frames,
+   * two bytes are received by a 16-bit read of the data register!
+   */
+
+  if (spi_9to16bitmode(priv))
+    {
+      spi_writeword(priv, wd);
+      ret = spi_readword(priv);
+    }
+  else
+    {
+      spi_writebyte(priv, (uint8_t)(wd & 0xFF));
+      ret = (uint16_t)spi_readbyte(priv);
+    }
+
+  /* Check and clear any error flags (Reading from the SR clears the error
+   * flags).
+   */
+
+  regval = spi_getreg(priv, STM32_SPI_SR_OFFSET);
+
+  if (spi_9to16bitmode(priv))
+    {
+      spiinfo("Sent: %04x Return: %04x Status: %02x\n", wd, ret, regval);
+    }
+  else
+    {
+      spiinfo("Sent: %02x Return: %02x Status: %02x\n", wd, ret, regval);
+    }
+
+  UNUSED(regval);
+  return ret;
+}
+
+/************************************************************************************
+ * Name: spi_exchange (no DMA).  aka spi_exchange_nodma
+ *
+ * Description:
+ *   Exchange a block of data on SPI without using DMA
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   txbuffer - A pointer to the buffer of data to be sent
+ *   rxbuffer - A pointer to a buffer in which to receive data
+ *   nwords   - the length of data to be exchaned in units of words.
+ *              The wordsize is determined by the number of bits-per-word
+ *              selected for the SPI interface.  If nbits <= 8, the data is
+ *              packed into uint8_t's; if nbits >8, the data is packed into uint16_t's
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+#if !defined(CONFIG_STM32F7_SPI_DMA) || defined(CONFIG_STM32F7_DMACAPABLE)
+#if !defined(CONFIG_STM32F7_SPI_DMA)
+static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
+                         FAR void *rxbuffer, size_t nwords)
+#else
+static void spi_exchange_nodma(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
+                               FAR void *rxbuffer, size_t nwords)
+#endif
+{
+  FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev;
+  DEBUGASSERT(priv && priv->spibase);
+
+  spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+
+  /* 8- or 16-bit mode? */
+
+  if (spi_9to16bitmode(priv))
+    {
+      /* 16-bit mode */
+
+      const uint16_t *src  = (const uint16_t *)txbuffer;
+            uint16_t *dest = (uint16_t *)rxbuffer;
+            uint16_t  word;
+
+      while (nwords-- > 0)
+        {
+          /* Get the next word to write.  Is there a source buffer? */
+
+          if (src)
+            {
+              word = *src++;
+            }
+          else
+            {
+              word = 0xffff;
+            }
+
+          /* Exchange one word */
+
+          word = spi_send(dev, word);
+
+          /* Is there a buffer to receive the return value? */
+
+          if (dest)
+            {
+              *dest++ = word;
+            }
+        }
+    }
+  else
+    {
+      /* 8-bit mode */
+
+      const uint8_t *src  = (const uint8_t *)txbuffer;
+            uint8_t *dest = (uint8_t *)rxbuffer;
+            uint8_t  word;
+
+      while (nwords-- > 0)
+        {
+          /* Get the next word to write.  Is there a source buffer? */
+
+          if (src)
+            {
+              word = *src++;
+            }
+          else
+            {
+              word = 0xff;
+            }
+
+          /* Exchange one word */
+
+          word = (uint8_t)spi_send(dev, (uint16_t)word);
+
+          /* Is there a buffer to receive the return value? */
+
+          if (dest)
+            {
+              *dest++ = word;
+            }
+        }
+    }
+}
+#endif /* !CONFIG_STM32F7_SPI_DMA || CONFIG_STM32F7_DMACAPABLE */
+
+/****************************************************************************
+ * Name: spi_exchange (with DMA capability)
+ *
+ * Description:
+ *   Exchange a block of data on SPI using DMA
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   txbuffer - A pointer to the buffer of data to be sent
+ *   rxbuffer - A pointer to a buffer in which to receive data
+ *   nwords   - the length of data to be exchanged in units of words.
+ *              The wordsize is determined by the number of bits-per-word
+ *              selected for the SPI interface.  If nbits <= 8, the data is
+ *              packed into uint8_t's; if nbits >8, the data is packed into uint16_t's
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32F7_SPI_DMA
+static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
+                         FAR void *rxbuffer, size_t nwords)
+{
+  FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev;
+
+#ifdef CONFIG_STM32F7_DMACAPABLE
+  if ((txbuffer && !stm32_dmacapable((uint32_t)txbuffer, nwords, priv->txccr)) ||
+      (rxbuffer && !stm32_dmacapable((uint32_t)rxbuffer, nwords, priv->rxccr)))
+    {
+      /* Unsupported memory region, fall back to non-DMA method. */
+
+      spi_exchange_nodma(dev, txbuffer, rxbuffer, nwords);
+    }
+  else
+#endif
+    {
+      static uint16_t rxdummy = 0xffff;
+      static const uint16_t txdummy = 0xffff;
+
+      spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+      DEBUGASSERT(priv && priv->spibase);
+
+      /* Setup DMAs */
+
+      spi_dmarxsetup(priv, rxbuffer, &rxdummy, nwords);
+      spi_dmatxsetup(priv, txbuffer, &txdummy, nwords);
+
+      /* Start the DMAs */
+
+      spi_dmarxstart(priv);
+      spi_dmatxstart(priv);
+
+      /* Then wait for each to complete */
+
+      spi_dmarxwait(priv);
+      spi_dmatxwait(priv);
+    }
+}
+#endif /* CONFIG_STM32F7_SPI_DMA */
+
+/****************************************************************************
+ * Name: spi_sndblock
+ *
+ * Description:
+ *   Send a block of data on SPI
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   txbuffer - A pointer to the buffer of data to be sent
+ *   nwords   - the length of data to send from the buffer in number of words.
+ *              The wordsize is determined by the number of bits-per-word
+ *              selected for the SPI interface.  If nbits <= 8, the data is
+ *              packed into uint8_t's; if nbits >8, the data is packed into uint16_t's
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+#ifndef CONFIG_SPI_EXCHANGE
+static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer, size_t nwords)
+{
+  spiinfo("txbuffer=%p nwords=%d\n", txbuffer, nwords);
+  return spi_exchange(dev, txbuffer, NULL, nwords);
+}
+#endif
+
+/************************************************************************************
+ * Name: spi_recvblock
+ *
+ * Description:
+ *   Receive a block of data from SPI
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   rxbuffer - A pointer to the buffer in which to recieve data
+ *   nwords   - the length of data that can be received in the buffer in number
+ *              of words.  The wordsize is determined by the number of bits-per-word
+ *              selected for the SPI interface.  If nbits <= 8, the data is
+ *              packed into uint8_t's; if nbits >8, the data is packed into uint16_t's
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+#ifndef CONFIG_SPI_EXCHANGE
+static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *rxbuffer, size_t nwords)
+{
+  spiinfo("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
+  return spi_exchange(dev, NULL, rxbuffer, nwords);
+}
+#endif
+
+/************************************************************************************
+ * Name: spi_bus_initialize
+ *
+ * Description:
+ *   Initialize the selected SPI bus in its default state (Master, 8-bit, mode 0, etc.)
+ *
+ * Input Parameter:
+ *   priv   - private SPI device structure
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+static void spi_bus_initialize(FAR struct stm32_spidev_s *priv)
+{
+  uint16_t setbits;
+  uint16_t clrbits;
+
+  /* Configure CR1 and CR2. Default configuration:
+   *   Mode 0:                        CR1.CPHA=0 and CR1.CPOL=0
+   *   Master:                        CR1.MSTR=1
+   *   8-bit:                         CR2.DS=7
+   *   MSB tranmitted first:          CR1.LSBFIRST=0
+   *   Replace NSS with SSI & SSI=1:  CR1.SSI=1 CR1.SSM=1 (prevents MODF error)
+   *   Two lines full duplex:         CR1.BIDIMODE=0 CR1.BIDIOIE=(Don't care) and CR1.RXONLY=0
+   */
+
+  clrbits = SPI_CR1_CPHA | SPI_CR1_CPOL | SPI_CR1_BR_MASK | SPI_CR1_LSBFIRST |
+            SPI_CR1_RXONLY | SPI_CR1_BIDIOE | SPI_CR1_BIDIMODE;
+  setbits = SPI_CR1_MSTR | SPI_CR1_SSI | SPI_CR1_SSM;
+  spi_modifycr1(priv, setbits, clrbits);
+
+  clrbits = SPI_CR2_DS_MASK;
+  setbits = SPI_CR2_DS_8BIT | SPI_CR2_FRXTH; /* FRXTH must be high in 8-bit mode */
+  spi_modifycr2(priv, setbits, clrbits);
+
+  priv->frequency = 0;
+  priv->nbits     = 8;
+  priv->mode      = SPIDEV_MODE0;
+
+  /* Select a default frequency of approx. 400KHz */
+
+  spi_setfrequency((FAR struct spi_dev_s *)priv, 400000);
+
+  /* CRCPOLY configuration */
+
+  spi_putreg(priv, STM32_SPI_CRCPR_OFFSET, 7);
+
+  /* Initialize the SPI semaphore that enforces mutually exclusive access. */
+
+  sem_init(&priv->exclsem, 0, 1);
+
+#ifdef CONFIG_STM32F7_SPI_DMA
+  /* Initialize the SPI semaphores that is used to wait for DMA completion.
+   * This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_init(&priv->rxsem, 0, 0);
+  sem_init(&priv->txsem, 0, 0);
+
+  sem_setprotocol(&priv->rxsem, SEM_PRIO_NONE);
+  sem_setprotocol(&priv->txsem, SEM_PRIO_NONE);
+
+  /* Get DMA channels.  NOTE: stm32_dmachannel() will always assign the DMA channel.
+   * if the channel is not available, then stm32_dmachannel() will block and wait
+   * until the channel becomes available.  WARNING: If you have another device sharing
+   * a DMA channel with SPI and the code never releases that channel, then the call
+   * to stm32_dmachannel()  will hang forever in this function!  Don't let your
+   * design do that!
+   */
+
+  priv->rxdma = stm32_dmachannel(priv->rxch);
+  priv->txdma = stm32_dmachannel(priv->txch);
+  DEBUGASSERT(priv->rxdma && priv->txdma);
+
+  spi_putreg(priv, STM32_SPI_CR2_OFFSET, SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN);
+#endif
+
+  /* Enable spi */
+
+  spi_modifycr1(priv, SPI_CR1_SPE, 0);
+}
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_spibus_initialize
+ *
+ * Description:
+ *   Initialize the selected SPI bus
+ *
+ * Input Parameter:
+ *   Port number (for hardware that has mutiple SPI interfaces)
+ *
+ * Returned Value:
+ *   Valid SPI device structure reference on succcess; a NULL on failure
+ *
+ ************************************************************************************/
+
+FAR struct spi_dev_s *stm32_spibus_initialize(int bus)
+{
+  FAR struct stm32_spidev_s *priv = NULL;
+
+  irqstate_t flags = enter_critical_section();
+
+#ifdef CONFIG_STM32F7_SPI1
+  if (bus == 1)
+    {
+      /* Select SPI1 */
+
+      priv = &g_spi1dev;
+
+      /* Only configure if the bus is not already configured */
+
+      if ((spi_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0)
+        {
+          /* Configure SPI1 pins: SCK, MISO, and MOSI */
+
+          stm32_configgpio(GPIO_SPI1_SCK);
+          stm32_configgpio(GPIO_SPI1_MISO);
+          stm32_configgpio(GPIO_SPI1_MOSI);
+
+          /* Set up default configuration: Master, 8-bit, etc. */
+
+          spi_bus_initialize(priv);
+        }
+    }
+  else
+#endif
+#ifdef CONFIG_STM32F7_SPI2
+  if (bus == 2)
+    {
+      /* Select SPI2 */
+
+      priv = &g_spi2dev;
+
+      /* Only configure if the bus is not already configured */
+
+      if ((spi_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0)
+        {
+          /* Configure SPI2 pins: SCK, MISO, and MOSI */
+
+          stm32_configgpio(GPIO_SPI2_SCK);
+          stm32_configgpio(GPIO_SPI2_MISO);
+          stm32_configgpio(GPIO_SPI2_MOSI);
+
+          /* Set up default configuration: Master, 8-bit, etc. */
+
+          spi_bus_initialize(priv);
+        }
+    }
+  else
+#endif
+#ifdef CONFIG_STM32F7_SPI3
+  if (bus == 3)
+    {
+      /* Select SPI3 */
+
+      priv = &g_spi3dev;
+
+      /* Only configure if the bus is not already configured */
+
+      if ((spi_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0)
+        {
+          /* Configure SPI3 pins: SCK, MISO, and MOSI */
+
+          stm32_configgpio(GPIO_SPI3_SCK);
+          stm32_configgpio(GPIO_SPI3_MISO);
+          stm32_configgpio(GPIO_SPI3_MOSI);
+
+          /* Set up default configuration: Master, 8-bit, etc. */
+
+          spi_bus_initialize(priv);
+        }
+    }
+  else
+#endif
+#ifdef CONFIG_STM32F7_SPI4
+  if (bus == 4)
+    {
+      /* Select SPI4 */
+
+      priv = &g_spi4dev;
+
+      /* Only configure if the bus is not already configured */
+
+      if ((spi_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0)
+        {
+          /* Configure SPI4 pins: SCK, MISO, and MOSI */
+
+          stm32_configgpio(GPIO_SPI4_SCK);
+          stm32_configgpio(GPIO_SPI4_MISO);
+          stm32_configgpio(GPIO_SPI4_MOSI);
+
+          /* Set up default configuration: Master, 8-bit, etc. */
+
+          spi_bus_initialize(priv);
+        }
+    }
+  else
+#endif
+#ifdef CONFIG_STM32F7_SPI5
+  if (bus == 5)
+    {
+      /* Select SPI5 */
+
+      priv = &g_spi5dev;
+
+      /* Only configure if the bus is not already configured */
+
+      if ((spi_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0)
+        {
+          /* Configure SPI5 pins: SCK, MISO, and MOSI */
+
+          stm32_configgpio(GPIO_SPI5_SCK);
+          stm32_configgpio(GPIO_SPI5_MISO);
+          stm32_configgpio(GPIO_SPI5_MOSI);
+
+          /* Set up default configuration: Master, 8-bit, etc. */
+
+          spi_bus_initialize(priv);
+        }
+    }
+  else
+#endif
+#ifdef CONFIG_STM32F7_SPI6
+  if (bus == 6)
+    {
+      /* Select SPI6 */
+
+      priv = &g_spi6dev;
+
+      /* Only configure if the bus is not already configured */
+
+      if ((spi_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0)
+        {
+          /* Configure SPI6 pins: SCK, MISO, and MOSI */
+
+          stm32_configgpio(GPIO_SPI6_SCK);
+          stm32_configgpio(GPIO_SPI6_MISO);
+          stm32_configgpio(GPIO_SPI6_MOSI);
+
+          /* Set up default configuration: Master, 8-bit, etc. */
+
+          spi_bus_initialize(priv);
+        }
+    }
+  else
+#endif
+    {
+      spierr("ERROR: Unsupported SPI bus: %d\n", bus);
+      return NULL;
+    }
+
+  leave_critical_section(flags);
+  return (FAR struct spi_dev_s *)priv;
+}
+
+#endif /* CONFIG_STM32F7_SPI1 || CONFIG_STM32F7_SPI2 || CONFIG_STM32F7_SPI3 || \
+        * CONFIG_STM32F7_SPI4 || CONFIG_STM32F7_SPI5 || CONFIG_STM32F7_SPI6 */
diff --git a/arch/arm/src/stm32f7/stm32_spi.h b/arch/arm/src/stm32f7/stm32_spi.h
index 2d606d2f45c6685ea4114cdeca640b2bf6075a10..2a2aa91881a21d1b75745b184b924ec355054247 100644
--- a/arch/arm/src/stm32f7/stm32_spi.h
+++ b/arch/arm/src/stm32f7/stm32_spi.h
@@ -2,7 +2,8 @@
  * arch/arm/src/stm32f7/stm32_spi.h
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -33,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_STC_STM32F7_STM32_SPI_H
-#define __ARCH_ARM_STC_STM32F7_STM32_SPI_H
+#ifndef __ARCH_ARM_SRC_STM32F7_STM32_SPI_H
+#define __ARCH_ARM_SRC_STM32F7_STM32_SPI_H
 
 /************************************************************************************
  * Included Files
@@ -45,7 +46,7 @@
 #include 
 
 #include "chip.h"
-//#include "chip/stm32_spi.h"
+#include "chip/stm32_spi.h"
 
 /************************************************************************************
  * Public Functions
@@ -110,37 +111,37 @@ FAR struct spi_dev_s *stm32_spibus_initialize(int bus);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_STM32_SPI1
+#ifdef CONFIG_STM32F7_SPI1
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
 uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
 int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
 #endif
 
-#ifdef CONFIG_STM32_SPI2
+#ifdef CONFIG_STM32F7_SPI2
 void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
 uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
 int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
 #endif
 
-#ifdef CONFIG_STM32_SPI3
+#ifdef CONFIG_STM32F7_SPI3
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
 uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
 int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
 #endif
 
-#ifdef CONFIG_STM32_SPI4
+#ifdef CONFIG_STM32F7_SPI4
 void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
 uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
 int stm32_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
 #endif
 
-#ifdef CONFIG_STM32_SPI5
+#ifdef CONFIG_STM32F7_SPI5
 void stm32_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
 uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
 int stm32_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
 #endif
 
-#ifdef CONFIG_STM32_SPI6
+#ifdef CONFIG_STM32F7_SPI6
 void stm32_spi6select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
 uint8_t stm32_spi6status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
 int stm32_spi6cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
@@ -167,32 +168,32 @@ int stm32_spi6cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
  ****************************************************************************/
 
 #ifdef CONFIG_SPI_CALLBACK
-#ifdef CONFIG_STM32_SPI1
+#ifdef CONFIG_STM32F7_SPI1
 int stm32_spi1register(FAR struct spi_dev_s *dev, spi_mediachange_t callback,
                        FAR void *arg);
 #endif
 
-#ifdef CONFIG_STM32_SPI2
+#ifdef CONFIG_STM32F7_SPI2
 int stm32_spi2register(FAR struct spi_dev_s *dev, spi_mediachange_t callback,
                        FAR void *arg);
 #endif
 
-#ifdef CONFIG_STM32_SPI3
+#ifdef CONFIG_STM32F7_SPI3
 int stm32_spi3register(FAR struct spi_dev_s *dev, spi_mediachange_t callback,
                        FAR void *arg);
 #endif
 
-#ifdef CONFIG_STM32_SPI4
+#ifdef CONFIG_STM32F7_SPI4
 int stm32_spi4register(FAR struct spi_dev_s *dev, spi_mediachange_t callback,
                        FAR void *arg);
 #endif
 
-#ifdef CONFIG_STM32_SPI5
+#ifdef CONFIG_STM32F7_SPI5
 int stm32_spi5register(FAR struct spi_dev_s *dev, spi_mediachange_t callback,
                        FAR void *arg);
 #endif
 
-#ifdef CONFIG_STM32_SPI6
+#ifdef CONFIG_STM32F7_SPI6
 int stm32_spi6register(FAR struct spi_dev_s *dev, spi_mediachange_t callback,
                        FAR void *arg);
 #endif
@@ -204,5 +205,5 @@ int stm32_spi6register(FAR struct spi_dev_s *dev, spi_mediachange_t callback,
 #endif
 
 #endif /* __ASSEMBLY__ */
-#endif /* __ARCH_ARM_STC_STM32F7_STM32_SPI_H */
+#endif /* __ARCH_ARM_SRC_STM32F7_STM32_SPI_H */
 
diff --git a/arch/arm/src/stm32f7/stm32_tim.c b/arch/arm/src/stm32f7/stm32_tim.c
new file mode 100644
index 0000000000000000000000000000000000000000..09a7c1f1d8a76727f51ca4d08fae924f618fb374
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_tim.c
@@ -0,0 +1,1496 @@
+/************************************************************************************
+ * arm/arm/src/stm32f7/stm32_tim.c
+ *
+ *   Copyright (C) 2011 Uros Platise. All rights reserved.
+ *   Author: Uros Platise 
+ *
+ * With modifications and updates by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "chip.h"
+#include "up_internal.h"
+#include "up_arch.h"
+
+#include "stm32_gpio.h"
+#include "stm32_tim.h"
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+/* Configuration ********************************************************************/
+/* Timer devices may be used for different purposes.  Such special purposes include:
+ *
+ * - To generate modulated outputs for such things as motor control.  If CONFIG_STM32F7_TIMn
+ *   is defined then the CONFIG_STM32F7_TIMn_PWM may also be defined to indicate that
+ *   the timer is intended to be used for pulsed output modulation.
+ *
+ * - To control periodic ADC input sampling.  If CONFIG_STM32F7_TIMn is defined then
+ *   CONFIG_STM32F7_TIMn_ADC may also be defined to indicate that timer "n" is intended
+ *   to be used for that purpose.
+ *
+ * - To control periodic DAC outputs.  If CONFIG_STM32F7_TIMn is defined then
+ *   CONFIG_STM32F7_TIMn_DAC may also be defined to indicate that timer "n" is intended
+ *   to be used for that purpose.
+ *
+ * - To use a Quadrature Encoder.  If CONFIG_STM32F7_TIMn is defined then
+ *   CONFIG_STM32F7_TIMn_QE may also be defined to indicate that timer "n" is intended
+ *   to be used for that purpose.
+ *
+ * In any of these cases, the timer will not be used by this timer module.
+ */
+
+#if defined(CONFIG_STM32F7_TIM1_PWM) || defined (CONFIG_STM32F7_TIM1_ADC) || \
+    defined(CONFIG_STM32F7_TIM1_DAC) || defined(CONFIG_STM32F7_TIM1_QE)
+#  undef CONFIG_STM32F7_TIM1
+#endif
+#if defined(CONFIG_STM32F7_TIM2_PWM) || defined (CONFIG_STM32F7_TIM2_ADC) || \
+    defined(CONFIG_STM32F7_TIM2_DAC) || defined(CONFIG_STM32F7_TIM2_QE)
+#  undef CONFIG_STM32F7_TIM2
+#endif
+#if defined(CONFIG_STM32F7_TIM3_PWM) || defined (CONFIG_STM32F7_TIM3_ADC) || \
+    defined(CONFIG_STM32F7_TIM3_DAC) || defined(CONFIG_STM32F7_TIM3_QE)
+#  undef CONFIG_STM32F7_TIM3
+#endif
+#if defined(CONFIG_STM32F7_TIM4_PWM) || defined (CONFIG_STM32F7_TIM4_ADC) || \
+    defined(CONFIG_STM32F7_TIM4_DAC) || defined(CONFIG_STM32F7_TIM4_QE)
+#  undef CONFIG_STM32F7_TIM4
+#endif
+#if defined(CONFIG_STM32F7_TIM5_PWM) || defined (CONFIG_STM32F7_TIM5_ADC) || \
+    defined(CONFIG_STM32F7_TIM5_DAC) || defined(CONFIG_STM32F7_TIM5_QE)
+#  undef CONFIG_STM32F7_TIM5
+#endif
+#if defined(CONFIG_STM32F7_TIM6_PWM) || defined (CONFIG_STM32F7_TIM6_ADC) || \
+    defined(CONFIG_STM32F7_TIM6_DAC) || defined(CONFIG_STM32F7_TIM6_QE)
+#  undef CONFIG_STM32F7_TIM6
+#endif
+#if defined(CONFIG_STM32F7_TIM7_PWM) || defined (CONFIG_STM32F7_TIM7_ADC) || \
+    defined(CONFIG_STM32F7_TIM7_DAC) || defined(CONFIG_STM32F7_TIM7_QE)
+#  undef CONFIG_STM32F7_TIM7
+#endif
+#if defined(CONFIG_STM32F7_TIM8_PWM) || defined (CONFIG_STM32F7_TIM8_ADC) || \
+    defined(CONFIG_STM32F7_TIM8_DAC) || defined(CONFIG_STM32F7_TIM8_QE)
+#  undef CONFIG_STM32F7_TIM8
+#endif
+#if defined(CONFIG_STM32F7_TIM9_PWM) || defined (CONFIG_STM32F7_TIM9_ADC) || \
+    defined(CONFIG_STM32F7_TIM9_DAC) || defined(CONFIG_STM32F7_TIM9_QE)
+#  undef CONFIG_STM32F7_TIM9
+#endif
+#if defined(CONFIG_STM32F7_TIM10_PWM) || defined (CONFIG_STM32F7_TIM10_ADC) || \
+    defined(CONFIG_STM32F7_TIM10_DAC) || defined(CONFIG_STM32F7_TIM10_QE)
+#  undef CONFIG_STM32F7_TIM10
+#endif
+#if defined(CONFIG_STM32F7_TIM11_PWM) || defined (CONFIG_STM32F7_TIM11_ADC) || \
+    defined(CONFIG_STM32F7_TIM11_DAC) || defined(CONFIG_STM32F7_TIM11_QE)
+#  undef CONFIG_STM32F7_TIM11
+#endif
+#if defined(CONFIG_STM32F7_TIM12_PWM) || defined (CONFIG_STM32F7_TIM12_ADC) || \
+    defined(CONFIG_STM32F7_TIM12_DAC) || defined(CONFIG_STM32F7_TIM12_QE)
+#  undef CONFIG_STM32F7_TIM12
+#endif
+#if defined(CONFIG_STM32F7_TIM13_PWM) || defined (CONFIG_STM32F7_TIM13_ADC) || \
+    defined(CONFIG_STM32F7_TIM13_DAC) || defined(CONFIG_STM32F7_TIM13_QE)
+#  undef CONFIG_STM32F7_TIM13
+#endif
+#if defined(CONFIG_STM32F7_TIM14_PWM) || defined (CONFIG_STM32F7_TIM14_ADC) || \
+    defined(CONFIG_STM32F7_TIM14_DAC) || defined(CONFIG_STM32F7_TIM14_QE)
+#  undef CONFIG_STM32F7_TIM14
+#endif
+
+#if defined(CONFIG_STM32F7_TIM1)
+#  if defined(GPIO_TIM1_CH1OUT) ||defined(GPIO_TIM1_CH2OUT)||\
+      defined(GPIO_TIM1_CH3OUT) ||defined(GPIO_TIM1_CH4OUT)
+#    define HAVE_TIM1_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32F7_TIM2)
+#  if defined(GPIO_TIM2_CH1OUT) ||defined(GPIO_TIM2_CH2OUT)||\
+      defined(GPIO_TIM2_CH3OUT) ||defined(GPIO_TIM2_CH4OUT)
+#    define HAVE_TIM2_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32F7_TIM3)
+#  if defined(GPIO_TIM3_CH1OUT) ||defined(GPIO_TIM3_CH2OUT)||\
+      defined(GPIO_TIM3_CH3OUT) ||defined(GPIO_TIM3_CH4OUT)
+#    define HAVE_TIM3_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32F7_TIM4)
+#  if defined(GPIO_TIM4_CH1OUT) ||defined(GPIO_TIM4_CH2OUT)||\
+      defined(GPIO_TIM4_CH3OUT) ||defined(GPIO_TIM4_CH4OUT)
+#    define HAVE_TIM4_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32F7_TIM5)
+#  if defined(GPIO_TIM5_CH1OUT) ||defined(GPIO_TIM5_CH2OUT)||\
+      defined(GPIO_TIM5_CH3OUT) ||defined(GPIO_TIM5_CH4OUT)
+#    define HAVE_TIM5_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32F7_TIM8)
+#  if defined(GPIO_TIM8_CH1OUT) ||defined(GPIO_TIM8_CH2OUT)||\
+      defined(GPIO_TIM8_CH3OUT) ||defined(GPIO_TIM8_CH4OUT)
+#    define HAVE_TIM8_GPIOCONFIG 1
+#endif
+#endif
+#if defined(CONFIG_STM32F7_TIM9)
+#  if defined(GPIO_TIM9_CH1OUT) ||defined(GPIO_TIM9_CH2OUT)||\
+      defined(GPIO_TIM9_CH3OUT) ||defined(GPIO_TIM9_CH4OUT)
+#    define HAVE_TIM9_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32F7_TIM10)
+#  if defined(GPIO_TIM10_CH1OUT) ||defined(GPIO_TIM10_CH2OUT)||\
+      defined(GPIO_TIM10_CH3OUT) ||defined(GPIO_TIM10_CH4OUT)
+#    define HAVE_TIM10_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32F7_TIM11)
+#  if defined(GPIO_TIM11_CH1OUT) ||defined(GPIO_TIM11_CH2OUT)||\
+      defined(GPIO_TIM11_CH3OUT) ||defined(GPIO_TIM11_CH4OUT)
+#    define HAVE_TIM11_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32F7_TIM12)
+#  if defined(GPIO_TIM12_CH1OUT) ||defined(GPIO_TIM12_CH2OUT)||\
+      defined(GPIO_TIM12_CH3OUT) ||defined(GPIO_TIM12_CH4OUT)
+#    define HAVE_TIM12_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32F7_TIM13)
+#  if defined(GPIO_TIM13_CH1OUT) ||defined(GPIO_TIM13_CH2OUT)||\
+      defined(GPIO_TIM13_CH3OUT) ||defined(GPIO_TIM13_CH4OUT)
+#    define HAVE_TIM13_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32F7_TIM14)
+#  if defined(GPIO_TIM14_CH1OUT) ||defined(GPIO_TIM14_CH2OUT)||\
+      defined(GPIO_TIM14_CH3OUT) ||defined(GPIO_TIM14_CH4OUT)
+#    define HAVE_TIM14_GPIOCONFIG 1
+#endif
+#endif
+
+
+/* This module then only compiles if there are enabled timers that are not intended for
+ * some other purpose.
+ */
+
+#if defined(CONFIG_STM32F7_TIM1)  || defined(CONFIG_STM32F7_TIM2)  || \
+    defined(CONFIG_STM32F7_TIM3)  || defined(CONFIG_STM32F7_TIM4)  || \
+    defined(CONFIG_STM32F7_TIM5)  || defined(CONFIG_STM32F7_TIM6)  || \
+    defined(CONFIG_STM32F7_TIM7)  || defined(CONFIG_STM32F7_TIM8)  || \
+    defined(CONFIG_STM32F7_TIM9)  || defined(CONFIG_STM32F7_TIM10) || \
+    defined(CONFIG_STM32F7_TIM11) || defined(CONFIG_STM32F7_TIM12) || \
+    defined(CONFIG_STM32F7_TIM13) || defined(CONFIG_STM32F7_TIM14)
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+
+/* TIM Device Structure */
+
+struct stm32_tim_priv_s
+{
+  struct stm32_tim_ops_s *ops;
+  stm32_tim_mode_t        mode;
+  uint32_t                base;   /* TIMn base address */
+};
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/* Get a 16-bit register value by offset */
+
+static inline uint16_t stm32_getreg16(FAR struct stm32_tim_dev_s *dev,
+                                      uint8_t offset)
+{
+  return getreg16(((struct stm32_tim_priv_s *)dev)->base + offset);
+}
+
+/* Put a 16-bit register value by offset */
+
+static inline void stm32_putreg16(FAR struct stm32_tim_dev_s *dev, uint8_t offset,
+                                  uint16_t value)
+{
+  putreg16(value, ((struct stm32_tim_priv_s *)dev)->base + offset);
+}
+
+/* Modify a 16-bit register value by offset */
+
+static inline void stm32_modifyreg16(FAR struct stm32_tim_dev_s *dev,
+                                     uint8_t offset, uint16_t clearbits,
+                                     uint16_t setbits)
+{
+  modifyreg16(((struct stm32_tim_priv_s *)dev)->base + offset, clearbits, setbits);
+}
+
+/* Get a 32-bit register value by offset.  This applies only for the STM32 F4
+ * 32-bit registers (CNT, ARR, CRR1-4) in the 32-bit timers TIM2-5.
+ */
+
+static inline uint32_t stm32_getreg32(FAR struct stm32_tim_dev_s *dev,
+                                      uint8_t offset)
+{
+  return getreg32(((struct stm32_tim_priv_s *)dev)->base + offset);
+}
+
+/* Put a 32-bit register value by offset.  This applies only for the STM32 F4
+ * 32-bit registers (CNT, ARR, CRR1-4) in the 32-bit timers TIM2-5.
+ */
+
+static inline void stm32_putreg32(FAR struct stm32_tim_dev_s *dev, uint8_t offset,
+                                  uint32_t value)
+{
+  putreg32(value, ((struct stm32_tim_priv_s *)dev)->base + offset);
+}
+
+static void stm32_tim_reload_counter(FAR struct stm32_tim_dev_s *dev)
+{
+  uint16_t val = stm32_getreg16(dev, STM32_BTIM_EGR_OFFSET);
+  val |= ATIM_EGR_UG;
+  stm32_putreg16(dev, STM32_BTIM_EGR_OFFSET, val);
+}
+
+static void stm32_tim_enable(FAR struct stm32_tim_dev_s *dev)
+{
+  uint16_t val = stm32_getreg16(dev, STM32_BTIM_CR1_OFFSET);
+  val |= ATIM_CR1_CEN;
+  stm32_tim_reload_counter(dev);
+  stm32_putreg16(dev, STM32_BTIM_CR1_OFFSET, val);
+}
+
+static void stm32_tim_disable(FAR struct stm32_tim_dev_s *dev)
+{
+  uint16_t val = stm32_getreg16(dev, STM32_BTIM_CR1_OFFSET);
+  val &= ~ATIM_CR1_CEN;
+  stm32_putreg16(dev, STM32_BTIM_CR1_OFFSET, val);
+}
+
+/* Reset timer into system default state, but do not affect output/input pins */
+
+static void stm32_tim_reset(FAR struct stm32_tim_dev_s *dev)
+{
+  ((struct stm32_tim_priv_s *)dev)->mode = STM32_TIM_MODE_DISABLED;
+  stm32_tim_disable(dev);
+}
+
+#if defined(HAVE_TIM1_GPIOCONFIG)||defined(HAVE_TIM2_GPIOCONFIG)||\
+    defined(HAVE_TIM3_GPIOCONFIG)||defined(HAVE_TIM4_GPIOCONFIG)||\
+    defined(HAVE_TIM5_GPIOCONFIG)||defined(HAVE_TIM8_GPIOCONFIG)
+static void stm32_tim_gpioconfig(uint32_t cfg, stm32_tim_channel_t mode)
+{
+  /* TODO: Add support for input capture and bipolar dual outputs for TIM8 */
+
+  if (mode & STM32_TIM_CH_MODE_MASK)
+    {
+      stm32_configgpio(cfg);
+    }
+  else
+    {
+      stm32_unconfiggpio(cfg);
+    }
+}
+#endif
+
+/************************************************************************************
+ * Basic Functions
+ ************************************************************************************/
+
+static int stm32_tim_setclock(FAR struct stm32_tim_dev_s *dev, uint32_t freq)
+{
+  uint32_t freqin;
+  int prescaler;
+
+  DEBUGASSERT(dev != NULL);
+
+  /* Disable Timer? */
+
+  if (freq == 0)
+    {
+      stm32_tim_disable(dev);
+      return 0;
+    }
+
+  /* Get the input clock frequency for this timer.  These vary with
+   * different timer clock sources, MCU-specific timer configuration, and
+   * board-specific clock configuration.  The correct input clock frequency
+   * must be defined in the board.h header file.
+   */
+
+  switch (((struct stm32_tim_priv_s *)dev)->base)
+    {
+#ifdef CONFIG_STM32F7_TIM1
+      case STM32_TIM1_BASE:
+        freqin = STM32_APB2_TIM1_CLKIN;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM2
+      case STM32_TIM2_BASE:
+        freqin = STM32_APB1_TIM2_CLKIN;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM3
+      case STM32_TIM3_BASE:
+        freqin = STM32_APB1_TIM3_CLKIN;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM4
+      case STM32_TIM4_BASE:
+        freqin = STM32_APB1_TIM4_CLKIN;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM5
+      case STM32_TIM5_BASE:
+        freqin = STM32_APB1_TIM5_CLKIN;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM6
+      case STM32_TIM6_BASE:
+        freqin = STM32_APB1_TIM6_CLKIN;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM7
+      case STM32_TIM7_BASE:
+        freqin = STM32_APB1_TIM7_CLKIN;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM8
+      case STM32_TIM8_BASE:
+        freqin = STM32_APB2_TIM8_CLKIN;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM9
+      case STM32_TIM9_BASE:
+        freqin = STM32_APB2_TIM9_CLKIN;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM10
+      case STM32_TIM10_BASE:
+        freqin = STM32_APB2_TIM10_CLKIN;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM11
+      case STM32_TIM11_BASE:
+        freqin = STM32_APB2_TIM11_CLKIN;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM12
+      case STM32_TIM12_BASE:
+        freqin = STM32_APB1_TIM12_CLKIN;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM13
+      case STM32_TIM13_BASE:
+        freqin = STM32_APB1_TIM13_CLKIN;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM14
+      case STM32_TIM14_BASE:
+        freqin = STM32_APB1_TIM14_CLKIN;
+        break;
+#endif
+      default:
+        return -EINVAL;
+    }
+
+  /* Select a pre-scaler value for this timer using the input clock
+   * frequency.
+   */
+
+  prescaler = freqin / freq;
+
+  /* We need to decrement value for '1', but only, if that will not to
+   * cause underflow.
+   */
+
+  if (prescaler > 0)
+    {
+      prescaler--;
+    }
+
+  /* Check for overflow as well. */
+
+  if (prescaler > 0xffff)
+    {
+      prescaler = 0xffff;
+    }
+
+  stm32_putreg16(dev, STM32_BTIM_PSC_OFFSET, prescaler);
+  stm32_tim_enable(dev);
+
+  return prescaler;
+}
+
+static void stm32_tim_setperiod(FAR struct stm32_tim_dev_s *dev,
+                                uint32_t period)
+{
+  DEBUGASSERT(dev != NULL);
+  stm32_putreg32(dev, STM32_BTIM_ARR_OFFSET, period);
+}
+
+static int stm32_tim_setisr(FAR struct stm32_tim_dev_s *dev,
+                            xcpt_t handler, void *arg, int source)
+{
+  int vectorno;
+
+  DEBUGASSERT(dev != NULL);
+  DEBUGASSERT(source == 0);
+
+  switch (((struct stm32_tim_priv_s *)dev)->base)
+    {
+#ifdef CONFIG_STM32F7_TIM1
+      case STM32_TIM1_BASE:
+        vectorno = STM32_IRQ_TIM1UP;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM2
+      case STM32_TIM2_BASE:
+        vectorno = STM32_IRQ_TIM2;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM3
+      case STM32_TIM3_BASE:
+        vectorno = STM32_IRQ_TIM3;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM4
+      case STM32_TIM4_BASE:
+        vectorno = STM32_IRQ_TIM4;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM5
+      case STM32_TIM5_BASE:
+        vectorno = STM32_IRQ_TIM5;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM6
+      case STM32_TIM6_BASE:
+        vectorno = STM32_IRQ_TIM6;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM7
+      case STM32_TIM7_BASE:
+        vectorno = STM32_IRQ_TIM7;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM8
+      case STM32_TIM8_BASE:
+        vectorno = STM32_IRQ_TIM8UP;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM9
+      case STM32_TIM9_BASE:
+        vectorno = STM32_IRQ_TIM9;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM10
+      case STM32_TIM10_BASE:
+        vectorno = STM32_IRQ_TIM10;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM11
+      case STM32_TIM11_BASE:
+        vectorno = STM32_IRQ_TIM11;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM12
+      case STM32_TIM12_BASE:
+        vectorno = STM32_IRQ_TIM12;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM13
+      case STM32_TIM13_BASE:
+        vectorno = STM32_IRQ_TIM13;
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM14
+      case STM32_TIM14_BASE:
+        vectorno = STM32_IRQ_TIM14;
+        break;
+#endif
+
+      default:
+        return -EINVAL;
+    }
+
+  /* Disable interrupt when callback is removed */
+
+  if (!handler)
+    {
+      up_disable_irq(vectorno);
+      irq_detach(vectorno);
+      return OK;
+    }
+
+  /* Otherwise set callback and enable interrupt */
+
+  irq_attach(vectorno, handler, arg);
+  up_enable_irq(vectorno);
+
+#ifdef CONFIG_ARCH_IRQPRIO
+  /* Set the interrupt priority */
+
+  up_prioritize_irq(vectorno, NVIC_SYSH_PRIORITY_DEFAULT);
+#endif
+
+  return OK;
+}
+
+static void stm32_tim_enableint(FAR struct stm32_tim_dev_s *dev, int source)
+{
+  DEBUGASSERT(dev != NULL);
+  stm32_modifyreg16(dev, STM32_BTIM_DIER_OFFSET, 0, ATIM_DIER_UIE);
+}
+
+static void stm32_tim_disableint(FAR struct stm32_tim_dev_s *dev, int source)
+{
+  DEBUGASSERT(dev != NULL);
+  stm32_modifyreg16(dev, STM32_BTIM_DIER_OFFSET, ATIM_DIER_UIE, 0);
+}
+
+static void stm32_tim_ackint(FAR struct stm32_tim_dev_s *dev, int source)
+{
+  stm32_putreg16(dev, STM32_BTIM_SR_OFFSET, ~ATIM_SR_UIF);
+}
+
+/************************************************************************************
+ * General Functions
+ ************************************************************************************/
+
+static int stm32_tim_setmode(FAR struct stm32_tim_dev_s *dev, stm32_tim_mode_t mode)
+{
+  uint16_t val = ATIM_CR1_CEN | ATIM_CR1_ARPE;
+
+  DEBUGASSERT(dev != NULL);
+
+  /* This function is not supported on basic timers. To enable or
+   * disable it, simply set its clock to valid frequency or zero.
+   */
+
+  if (((struct stm32_tim_priv_s *)dev)->base == STM32_TIM6_BASE || \
+      ((struct stm32_tim_priv_s *)dev)->base == STM32_TIM7_BASE)
+    {
+      return -EINVAL;
+    }
+
+  /* Decode operational modes */
+
+  switch (mode & STM32_TIM_MODE_MASK)
+    {
+      case STM32_TIM_MODE_DISABLED:
+        val = 0;
+        break;
+
+      case STM32_TIM_MODE_DOWN:
+        val |= ATIM_CR1_DIR;
+
+      case STM32_TIM_MODE_UP:
+        break;
+
+      case STM32_TIM_MODE_UPDOWN:
+        val |= ATIM_CR1_CENTER1;
+        // Our default: Interrupts are generated on compare, when counting down
+        break;
+
+      case STM32_TIM_MODE_PULSE:
+        val |= ATIM_CR1_OPM;
+        break;
+
+      default:
+        return -EINVAL;
+    }
+
+  stm32_tim_reload_counter(dev);
+  stm32_putreg16(dev, STM32_BTIM_CR1_OFFSET, val);
+
+  /* Advanced registers require Main Output Enable */
+
+    if (((struct stm32_tim_priv_s *)dev)->base == STM32_TIM1_BASE ||
+        ((struct stm32_tim_priv_s *)dev)->base == STM32_TIM8_BASE)
+      {
+        stm32_modifyreg16(dev, STM32_ATIM_BDTR_OFFSET, 0, ATIM_BDTR_MOE);
+      }
+
+  return OK;
+}
+
+static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel,
+                                stm32_tim_channel_t mode)
+{
+  uint16_t ccmr_orig   = 0;
+  uint16_t ccmr_val    = 0;
+  uint16_t ccmr_mask   = 0xff;
+  uint16_t ccer_val    = stm32_getreg16(dev, STM32_GTIM_CCER_OFFSET);
+  uint8_t  ccmr_offset = STM32_GTIM_CCMR1_OFFSET;
+
+  DEBUGASSERT(dev != NULL);
+
+  /* Further we use range as 0..3; if channel=0 it will also overflow here */
+
+  if (--channel > 4)
+    {
+      return -EINVAL;
+    }
+
+  /* Assume that channel is disabled and polarity is active high */
+
+  ccer_val &= ~(3 << (channel << 2));
+
+  /* This function is not supported on basic timers. To enable or
+   * disable it, simply set its clock to valid frequency or zero.
+   */
+
+  if (((struct stm32_tim_priv_s *)dev)->base == STM32_TIM6_BASE || \
+      ((struct stm32_tim_priv_s *)dev)->base == STM32_TIM7_BASE)
+    {
+      return -EINVAL;
+    }
+
+
+  /* Decode configuration */
+
+  switch (mode & STM32_TIM_CH_MODE_MASK)
+    {
+      case STM32_TIM_CH_DISABLED:
+        break;
+
+      case STM32_TIM_CH_OUTPWM:
+        ccmr_val  =  (ATIM_CCMR_MODE_PWM1 << ATIM_CCMR1_OC1M_SHIFT) + ATIM_CCMR1_OC1PE;
+        ccer_val |= ATIM_CCER_CC1E << (channel << 2);
+        break;
+
+      default:
+        return -EINVAL;
+    }
+
+  /* Set polarity */
+
+  if (mode & STM32_TIM_CH_POLARITY_NEG)
+    {
+      ccer_val |= ATIM_CCER_CC1P << (channel << 2);
+    }
+
+  /* Define its position (shift) and get register offset */
+
+  if (channel & 1)
+    {
+      ccmr_val  <<= 8;
+      ccmr_mask <<= 8;
+    }
+
+  if (channel > 1)
+    {
+      ccmr_offset = STM32_GTIM_CCMR2_OFFSET;
+    }
+
+  ccmr_orig  = stm32_getreg16(dev, ccmr_offset);
+  ccmr_orig &= ~ccmr_mask;
+  ccmr_orig |= ccmr_val;
+  stm32_putreg16(dev, ccmr_offset, ccmr_orig);
+  stm32_putreg16(dev, STM32_GTIM_CCER_OFFSET, ccer_val);
+
+  /* set GPIO */
+
+  switch (((struct stm32_tim_priv_s *)dev)->base)
+    {
+#ifdef CONFIG_STM32F7_TIM1
+      case STM32_TIM1_BASE:
+        switch (channel)
+          {
+#  if defined(GPIO_TIM1_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM1_CH1OUT, mode); break;
+#  endif
+#  if defined(GPIO_TIM1_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM1_CH2OUT, mode); break;
+#  endif
+#  if defined(GPIO_TIM1_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM1_CH3OUT, mode); break;
+#  endif
+#  if defined(GPIO_TIM1_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM1_CH4OUT, mode); break;
+#  endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM2
+      case STM32_TIM2_BASE:
+        switch (channel)
+          {
+#  if defined(GPIO_TIM2_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM2_CH1OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM2_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM2_CH2OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM2_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM2_CH3OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM2_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM2_CH4OUT, mode);
+              break;
+#endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM3
+      case STM32_TIM3_BASE:
+        switch (channel)
+          {
+#  if defined(GPIO_TIM3_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM3_CH1OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM3_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM3_CH2OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM3_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM3_CH3OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM3_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM3_CH4OUT, mode);
+              break;
+#endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM4
+      case STM32_TIM4_BASE:
+        switch (channel)
+          {
+#  if defined(GPIO_TIM4_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM4_CH1OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM4_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM4_CH2OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM4_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM4_CH3OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM4_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM4_CH4OUT, mode);
+              break;
+#  endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM5
+      case STM32_TIM5_BASE:
+        switch (channel)
+          {
+#  if defined(GPIO_TIM5_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM5_CH1OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM5_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM5_CH2OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM5_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM5_CH3OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM5_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM5_CH4OUT, mode);
+              break;
+#  endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM8
+      case STM32_TIM8_BASE:
+        switch (channel)
+          {
+#  if defined(GPIO_TIM8_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM8_CH1OUT, mode); break;
+#  endif
+#  if defined(GPIO_TIM8_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM8_CH2OUT, mode); break;
+#  endif
+#  if defined(GPIO_TIM8_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM8_CH3OUT, mode); break;
+#  endif
+#  if defined(GPIO_TIM8_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM8_CH4OUT, mode); break;
+#  endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#  ifdef CONFIG_STM32F7_TIM9
+      case STM32_TIM9_BASE:
+        switch (channel)
+          {
+#  if defined(GPIO_TIM9_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM9_CH1OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM9_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM9_CH2OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM9_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM9_CH3OUT, mode);
+              break;
+# endif
+#  if defined(GPIO_TIM9_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM9_CH4OUT, mode);
+              break;
+#  endif
+      default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM10
+      case STM32_TIM10_BASE:
+        switch (channel)
+          {
+#  if defined(GPIO_TIM10_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM10_CH1OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM10_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM10_CH2OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM10_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM10_CH3OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM10_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM10_CH4OUT, mode);
+              break;
+#  endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM11
+      case STM32_TIM11_BASE:
+        switch (channel)
+          {
+#  if defined(GPIO_TIM11_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM11_CH1OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM11_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM11_CH2OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM11_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM11_CH3OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM11_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM11_CH4OUT, mode);
+              break;
+#  endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM12
+      case STM32_TIM12_BASE:
+        switch (channel)
+          {
+#  if defined(GPIO_TIM12_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM12_CH1OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM12_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM12_CH2OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM12_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM12_CH3OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM12_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM12_CH4OUT, mode);
+              break;
+#  endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM13
+      case STM32_TIM13_BASE:
+        switch (channel)
+          {
+#  if defined(GPIO_TIM13_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM13_CH1OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM13_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM13_CH2OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM13_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM13_CH3OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM13_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM13_CH4OUT, mode);
+              break;
+#  endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM14
+      case STM32_TIM14_BASE:
+        switch (channel)
+          {
+#  if defined(GPIO_TIM14_CH1OUT)
+            case 0:
+              stm32_tim_gpioconfig(GPIO_TIM14_CH1OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM14_CH2OUT)
+            case 1:
+              stm32_tim_gpioconfig(GPIO_TIM14_CH2OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM14_CH3OUT)
+            case 2:
+              stm32_tim_gpioconfig(GPIO_TIM14_CH3OUT, mode);
+              break;
+#  endif
+#  if defined(GPIO_TIM14_CH4OUT)
+            case 3:
+              stm32_tim_gpioconfig(GPIO_TIM14_CH4OUT, mode);
+              break;
+#  endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+    }
+  return OK;
+}
+
+static int stm32_tim_setcompare(FAR struct stm32_tim_dev_s *dev, uint8_t channel,
+                                uint32_t compare)
+{
+  DEBUGASSERT(dev != NULL);
+
+  switch (channel)
+    {
+      case 1:
+        stm32_putreg32(dev, STM32_GTIM_CCR1_OFFSET, compare);
+        break;
+      case 2:
+        stm32_putreg32(dev, STM32_GTIM_CCR2_OFFSET, compare);
+        break;
+      case 3:
+        stm32_putreg32(dev, STM32_GTIM_CCR3_OFFSET, compare);
+        break;
+      case 4:
+        stm32_putreg32(dev, STM32_GTIM_CCR4_OFFSET, compare);
+        break;
+      default:
+        return -EINVAL;
+    }
+  return OK;
+}
+
+static int stm32_tim_getcapture(FAR struct stm32_tim_dev_s *dev, uint8_t channel)
+{
+  DEBUGASSERT(dev != NULL);
+
+  switch (channel)
+    {
+      case 1:
+        return stm32_getreg32(dev, STM32_GTIM_CCR1_OFFSET);
+      case 2:
+        return stm32_getreg32(dev, STM32_GTIM_CCR2_OFFSET);
+      case 3:
+        return stm32_getreg32(dev, STM32_GTIM_CCR3_OFFSET);
+      case 4:
+        return stm32_getreg32(dev, STM32_GTIM_CCR4_OFFSET);
+    }
+
+  return -EINVAL;
+}
+
+/************************************************************************************
+ * Advanced Functions
+ ************************************************************************************/
+
+/* TODO: Advanced functions for the STM32_ATIM */
+
+/************************************************************************************
+ * Device Structures, Instantiation
+ ************************************************************************************/
+
+struct stm32_tim_ops_s stm32_tim_ops =
+{
+  .setmode        = &stm32_tim_setmode,
+  .setclock       = &stm32_tim_setclock,
+  .setperiod      = &stm32_tim_setperiod,
+  .setchannel     = &stm32_tim_setchannel,
+  .setcompare     = &stm32_tim_setcompare,
+  .getcapture     = &stm32_tim_getcapture,
+  .setisr         = &stm32_tim_setisr,
+  .enableint      = &stm32_tim_enableint,
+  .disableint     = &stm32_tim_disableint,
+  .ackint         = &stm32_tim_ackint
+};
+
+#ifdef CONFIG_STM32F7_TIM1
+struct stm32_tim_priv_s stm32_tim1_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM1_BASE,
+};
+#endif
+#ifdef CONFIG_STM32F7_TIM2
+struct stm32_tim_priv_s stm32_tim2_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM2_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32F7_TIM3
+struct stm32_tim_priv_s stm32_tim3_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM3_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32F7_TIM4
+struct stm32_tim_priv_s stm32_tim4_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM4_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32F7_TIM5
+struct stm32_tim_priv_s stm32_tim5_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM5_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32F7_TIM6
+struct stm32_tim_priv_s stm32_tim6_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM6_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32F7_TIM7
+struct stm32_tim_priv_s stm32_tim7_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM7_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32F7_TIM8
+struct stm32_tim_priv_s stm32_tim8_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM8_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32F7_TIM9
+struct stm32_tim_priv_s stm32_tim9_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM9_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32F7_TIM10
+struct stm32_tim_priv_s stm32_tim10_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM10_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32F7_TIM11
+struct stm32_tim_priv_s stm32_tim11_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM11_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32F7_TIM12
+struct stm32_tim_priv_s stm32_tim12_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM12_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32F7_TIM13
+struct stm32_tim_priv_s stm32_tim13_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM13_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32F7_TIM14
+struct stm32_tim_priv_s stm32_tim14_priv =
+{
+  .ops        = &stm32_tim_ops,
+  .mode       = STM32_TIM_MODE_UNUSED,
+  .base       = STM32_TIM14_BASE,
+};
+#endif
+
+
+/************************************************************************************
+ * Public Function - Initialization
+ ************************************************************************************/
+
+FAR struct stm32_tim_dev_s *stm32_tim_init(int timer)
+{
+  struct stm32_tim_dev_s *dev = NULL;
+
+  /* Get structure and enable power */
+
+  switch (timer)
+    {
+#ifdef CONFIG_STM32F7_TIM1
+      case 1:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim1_priv;
+        modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM1EN);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM2
+      case 2:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim2_priv;
+        modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM2EN);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM3
+      case 3:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim3_priv;
+        modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM3EN);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM4
+      case 4:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim4_priv;
+        modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM4EN);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM5
+      case 5:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim5_priv;
+        modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM5EN);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM6
+      case 6:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim6_priv;
+        modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM6EN);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM7
+      case 7:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim7_priv;
+        modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM7EN);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM8
+      case 8:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim8_priv;
+        modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM8EN);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM9
+      case 9:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim9_priv;
+        modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM9EN);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM10
+      case 10:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim10_priv;
+        modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM10EN);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM11
+      case 11:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim11_priv;
+        modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM11EN);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM12
+      case 12:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim12_priv;
+        modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM12EN);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM13
+      case 13:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim13_priv;
+        modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM13EN);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM14
+      case 14:
+        dev = (struct stm32_tim_dev_s *)&stm32_tim14_priv;
+        modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM14EN);
+        break;
+#endif
+      default:
+        return NULL;
+    }
+
+  /* Is device already allocated */
+
+  if (((struct stm32_tim_priv_s *)dev)->mode != STM32_TIM_MODE_UNUSED)
+    {
+      return NULL;
+    }
+
+  stm32_tim_reset(dev);
+
+  return dev;
+}
+
+/* TODO: Detach interrupts, and close down all TIM Channels */
+
+int stm32_tim_deinit(FAR struct stm32_tim_dev_s * dev)
+{
+  DEBUGASSERT(dev != NULL);
+
+  /* Disable power */
+
+  switch (((struct stm32_tim_priv_s *)dev)->base)
+    {
+#ifdef CONFIG_STM32F7_TIM1
+      case STM32_TIM1_BASE:
+        modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM1EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM2
+      case STM32_TIM2_BASE:
+        modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM2EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM3
+      case STM32_TIM3_BASE:
+        modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM3EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM4
+      case STM32_TIM4_BASE:
+        modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM4EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM5
+      case STM32_TIM5_BASE:
+        modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM5EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM6
+      case STM32_TIM6_BASE:
+        modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM6EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM7
+      case STM32_TIM7_BASE:
+        modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM7EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM8
+      case STM32_TIM8_BASE:
+        modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM8EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM9
+      case STM32_TIM9_BASE:
+        modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM9EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM10
+      case STM32_TIM10_BASE:
+        modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM10EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM11
+      case STM32_TIM11_BASE:
+        modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM11EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM12
+      case STM32_TIM12_BASE:
+        modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM12EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM13
+      case STM32_TIM13_BASE:
+        modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM13EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32F7_TIM14
+      case STM32_TIM14_BASE:
+        modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM14EN, 0);
+        break;
+#endif
+      default:
+        return -EINVAL;
+    }
+
+  /* Mark it as free */
+
+  ((struct stm32_tim_priv_s *)dev)->mode = STM32_TIM_MODE_UNUSED;
+
+  return OK;
+}
+
+#endif /* defined(CONFIG_STM32F7_TIM1 || ... || TIM8) */
diff --git a/arch/arm/src/stm32f7/stm32_tim.h b/arch/arm/src/stm32f7/stm32_tim.h
new file mode 100644
index 0000000000000000000000000000000000000000..5f3bf82c1002d61ccb4f46768ba84259f0a0262b
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32_tim.h
@@ -0,0 +1,215 @@
+/************************************************************************************
+ * arch/arm/src/stm32f7/stm32_tim.h
+ *
+ *   Copyright (C) 2011 Uros Platise. All rights reserved.
+ *   Author: Uros Platise 
+ *
+ * With modifications and updates by:
+ *
+ *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32F7_STM32_TIM_H
+#define __ARCH_ARM_SRC_STM32F7_STM32_TIM_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "chip.h"
+#include "chip/stm32_tim.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Helpers **************************************************************************/
+
+#define STM32_TIM_SETMODE(d,mode)       ((d)->ops->setmode(d,mode))
+#define STM32_TIM_SETCLOCK(d,freq)      ((d)->ops->setclock(d,freq))
+#define STM32_TIM_SETPERIOD(d,period)   ((d)->ops->setperiod(d,period))
+#define STM32_TIM_SETCHANNEL(d,ch,mode) ((d)->ops->setchannel(d,ch,mode))
+#define STM32_TIM_SETCOMPARE(d,ch,comp) ((d)->ops->setcompare(d,ch,comp))
+#define STM32_TIM_GETCAPTURE(d,ch)      ((d)->ops->getcapture(d,ch))
+#define STM32_TIM_SETISR(d,hnd,arg,s)   ((d)->ops->setisr(d,hnd,arg,s))
+#define STM32_TIM_ENABLEINT(d,s)        ((d)->ops->enableint(d,s))
+#define STM32_TIM_DISABLEINT(d,s)       ((d)->ops->disableint(d,s))
+#define STM32_TIM_ACKINT(d,s)           ((d)->ops->ackint(d,s))
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/* TIM Device Structure */
+
+struct stm32_tim_dev_s
+{
+  struct stm32_tim_ops_s *ops;
+};
+
+/* TIM Modes of Operation */
+
+typedef enum
+{
+  STM32_TIM_MODE_UNUSED       = -1,
+
+  /* One of the following */
+
+  STM32_TIM_MODE_MASK         = 0x0310,
+  STM32_TIM_MODE_DISABLED     = 0x0000,
+  STM32_TIM_MODE_UP           = 0x0100,
+  STM32_TIM_MODE_DOWN         = 0x0110,
+  STM32_TIM_MODE_UPDOWN       = 0x0200,
+  STM32_TIM_MODE_PULSE        = 0x0300,
+
+  /* One of the following */
+
+  STM32_TIM_MODE_CK_INT       = 0x0000,
+//STM32_TIM_MODE_CK_INT_TRIG  = 0x0400,
+//STM32_TIM_MODE_CK_EXT       = 0x0800,
+//STM32_TIM_MODE_CK_EXT_TRIG  = 0x0C00,
+
+  /* Clock sources, OR'ed with CK_EXT */
+
+//STM32_TIM_MODE_CK_CHINVALID = 0x0000,
+//STM32_TIM_MODE_CK_CH1       = 0x0001,
+//STM32_TIM_MODE_CK_CH2       = 0x0002,
+//STM32_TIM_MODE_CK_CH3       = 0x0003,
+//STM32_TIM_MODE_CK_CH4       = 0x0004
+
+  /* Todo: external trigger block */
+
+} stm32_tim_mode_t;
+
+/* TIM Channel Modes */
+
+typedef enum
+{
+  STM32_TIM_CH_DISABLED       = 0x00,
+
+  /* Common configuration */
+
+  STM32_TIM_CH_POLARITY_POS   = 0x00,
+  STM32_TIM_CH_POLARITY_NEG   = 0x01,
+
+  /* MODES: */
+
+  STM32_TIM_CH_MODE_MASK      = 0x06,
+
+  /* Output Compare Modes */
+
+  STM32_TIM_CH_OUTPWM         = 0x04,     /** Enable standard PWM mode, active high when counter < compare */
+//STM32_TIM_CH_OUTCOMPARE     = 0x06,
+
+  // TODO other modes ... as PWM capture, ENCODER and Hall Sensor
+//STM32_TIM_CH_INCAPTURE      = 0x10,
+//STM32_TIM_CH_INPWM          = 0x20
+//STM32_TIM_CH_DRIVE_OC   -- open collector mode
+
+} stm32_tim_channel_t;
+
+/* TIM Operations */
+
+struct stm32_tim_ops_s
+{
+  /* Basic Timers */
+
+  int  (*setmode)(FAR struct stm32_tim_dev_s *dev, stm32_tim_mode_t mode);
+  int  (*setclock)(FAR struct stm32_tim_dev_s *dev, uint32_t freq);
+  void (*setperiod)(FAR struct stm32_tim_dev_s *dev, uint32_t period);
+
+  /* General and Advanced Timers Adds */
+
+  int  (*setchannel)(FAR struct stm32_tim_dev_s *dev, uint8_t channel, stm32_tim_channel_t mode);
+  int  (*setcompare)(FAR struct stm32_tim_dev_s *dev, uint8_t channel, uint32_t compare);
+  int  (*getcapture)(FAR struct stm32_tim_dev_s *dev, uint8_t channel);
+
+  /* Timer interrupts */
+
+  int  (*setisr)(FAR struct stm32_tim_dev_s *dev, xcpt_t handler, void *arg, int source);
+  void (*enableint)(FAR struct stm32_tim_dev_s *dev, int source);
+  void (*disableint)(FAR struct stm32_tim_dev_s *dev, int source);
+  void (*ackint)(FAR struct stm32_tim_dev_s *dev, int source);
+};
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/* Power-up timer and get its structure */
+
+FAR struct stm32_tim_dev_s *stm32_tim_init(int timer);
+
+/* Power-down timer, mark it as unused */
+
+int stm32_tim_deinit(FAR struct stm32_tim_dev_s *dev);
+
+/****************************************************************************
+ * Name: stm32_timer_initialize
+ *
+ * Description:
+ *   Bind the configuration timer to a timer lower half instance and
+ *   register the timer drivers at 'devpath'
+ *
+ * Input Parameters:
+ *   devpath - The full path to the timer device. This should be of the form /dev/timer0
+ *   timer - the timer number.
+ *
+ * Returned Values:
+ *   Zero (OK) is returned on success; A negated errno value is returned
+ *   to indicate the nature of any failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_TIMER
+int stm32_timer_initialize(FAR const char *devpath, int timer);
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_STM32F7_STM32_TIM_H */
diff --git a/arch/arm/src/stm32f7/stm32_timerisr.c b/arch/arm/src/stm32f7/stm32_timerisr.c
index db9c685cdf4be9d9bb2889cdd0f1550459270626..5261088235676892cc531bfe0a1acd0e4c984f21 100644
--- a/arch/arm/src/stm32f7/stm32_timerisr.c
+++ b/arch/arm/src/stm32f7/stm32_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32f7/stm32_timerisr.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -92,19 +92,11 @@
 #endif
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  stm32_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -112,7 +104,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int stm32_timerisr(int irq, uint32_t *regs, void *arg)
 {
   /* Process timer interrupt */
 
@@ -121,7 +113,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize the timer
@@ -129,7 +125,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t regval;
 
@@ -140,7 +136,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(STM32_IRQ_SYSTICK, (xcpt_t)up_timerisr);
+  (void)irq_attach(STM32_IRQ_SYSTICK, (xcpt_t)stm32_timerisr, NULL);
 
   /* Enable SysTick interrupts:
    *
diff --git a/arch/arm/src/stm32f7/stm32_uart.h b/arch/arm/src/stm32f7/stm32_uart.h
index 9b1bce0b4e6d8761eb3c493cc4c1ebc9928642e8..d250eb77612c200ce9d29042a502eeb5634c6725 100644
--- a/arch/arm/src/stm32f7/stm32_uart.h
+++ b/arch/arm/src/stm32f7/stm32_uart.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_STC_STM32F7_STM32_UART_H
-#define __ARCH_ARM_STC_STM32F7_STM32_UART_H
+#ifndef __ARCH_ARM_SRC_STM32F7_STM32_UART_H
+#define __ARCH_ARM_SRC_STM32F7_STM32_UART_H
 
 /************************************************************************************
  * Included Files
@@ -342,4 +342,4 @@ void stm32_serial_dma_poll(void);
 #endif
 
 #endif /* __ASSEMBLY__ */
-#endif /* __ARCH_ARM_STC_STM32F7_STM32_UART_H */
+#endif /* __ARCH_ARM_SRC_STM32F7_STM32_UART_H */
diff --git a/arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c b/arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c
index 1db43d255132f7e258e8c20db5607bc91235c175..a10c399f887d21d3592bd8311613573722ac3896 100644
--- a/arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c
+++ b/arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c
@@ -1,8 +1,9 @@
 /****************************************************************************
  * arch/arm/src/stm32f7/stm32f74xxx75xx_rcc.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -686,6 +687,11 @@ static void stm32_stdclockconfig(void)
   /* Enable External High-Speed Clock (HSE) */
 
   regval  = getreg32(STM32_RCC_CR);
+#ifdef STM32_HSEBYP_ENABLE          /* May be defined in board.h header file */
+  regval |= RCC_CR_HSEBYP;          /* Enable HSE clock bypass */
+#else
+  regval &= ~RCC_CR_HSEBYP;         /* Disable HSE clock bypass */
+#endif
   regval |= RCC_CR_HSEON;           /* Enable HSE */
   putreg32(regval, STM32_RCC_CR);
 
@@ -745,7 +751,7 @@ static void stm32_stdclockconfig(void)
       regval |= STM32_RCC_CFGR_PPRE1;
       putreg32(regval, STM32_RCC_CFGR);
 
-#ifdef CONFIG_RTC_HSECLOCK
+#ifdef CONFIG_STM32F7_RTC_HSECLOCK
       /* Set the RTC clock divisor */
 
       regval = getreg32(STM32_RCC_CFGR);
@@ -827,18 +833,38 @@ static void stm32_stdclockconfig(void)
         {
         }
 
-#ifdef CONFIG_STM32F7_LTDC
-      /* Configure PLLSAI */
+#if defined(CONFIG_STM32F7_LTDC) || defined(CONFIG_STM32F7_PLLSAI)
+
+       /* Configure PLLSAI */
 
       regval = getreg32(STM32_RCC_PLLSAICFGR);
+      regval &= ~(  RCC_PLLSAICFGR_PLLSAIN_MASK
+                  | RCC_PLLSAICFGR_PLLSAIP_MASK
+                  | RCC_PLLSAICFGR_PLLSAIQ_MASK
+                  | RCC_PLLSAICFGR_PLLSAIR_MASK);
       regval |= (STM32_RCC_PLLSAICFGR_PLLSAIN
-                | STM32_RCC_PLLSAICFGR_PLLSAIR
-                | STM32_RCC_PLLSAICFGR_PLLSAIQ);
+                 | STM32_RCC_PLLSAICFGR_PLLSAIP
+                 | STM32_RCC_PLLSAICFGR_PLLSAIQ
+                 | STM32_RCC_PLLSAICFGR_PLLSAIR);
       putreg32(regval, STM32_RCC_PLLSAICFGR);
 
-      regval = getreg32(STM32_RCC_DCKCFGR);
-      regval |= STM32_RCC_DCKCFGR_PLLSAIDIVR;
-      putreg32(regval, STM32_RCC_DCKCFGR);
+      regval  = getreg32(STM32_RCC_DCKCFGR1);
+      regval &= ~(RCC_DCKCFGR1_PLLI2SDIVQ_MASK
+                  | RCC_DCKCFGR1_PLLSAIDIVQ_MASK
+                  | RCC_DCKCFGR1_PLLSAIDIVR_MASK
+                  | RCC_DCKCFGR1_SAI1SEL_MASK
+                  | RCC_DCKCFGR1_SAI2SEL_MASK
+                  | RCC_DCKCFGR1_TIMPRESEL);
+
+      regval |= (STM32_RCC_DCKCFGR1_PLLI2SDIVQ
+                 | STM32_RCC_DCKCFGR1_PLLSAIDIVQ
+                 | STM32_RCC_DCKCFGR1_PLLSAIDIVR
+                 | STM32_RCC_DCKCFGR1_SAI1SRC
+                 | STM32_RCC_DCKCFGR1_SAI2SRC
+                 | STM32_RCC_DCKCFGR1_TIMPRESRC);
+
+      putreg32(regval, STM32_RCC_DCKCFGR1);
+
 
       /* Enable PLLSAI */
 
@@ -852,14 +878,76 @@ static void stm32_stdclockconfig(void)
         {
         }
 #endif
+#if defined(CONFIG_STM32F7_LTDC) || defined(CONFIG_STM32F7_PLLI2S)
+
+      /* Configure PLLI2S */
+
+      regval = getreg32(STM32_RCC_PLLI2SCFGR);
+      regval &= ~(  RCC_PLLI2SCFGR_PLLI2SN_MASK
+                  | RCC_PLLI2SCFGR_PLLI2SP_MASK
+                  | RCC_PLLI2SCFGR_PLLI2SQ_MASK
+                  | RCC_PLLI2SCFGR_PLLI2SR_MASK);
+      regval |= (STM32_RCC_PLLI2SCFGR_PLLI2SN
+                 | STM32_RCC_PLLI2SCFGR_PLLI2SP
+                 | STM32_RCC_PLLI2SCFGR_PLLI2SQ
+                 | STM32_RCC_PLLI2SCFGR_PLLI2SR);
+      putreg32(regval, STM32_RCC_PLLI2SCFGR);
+
+      regval  = getreg32(STM32_RCC_DCKCFGR2);
+      regval &= ~(  RCC_DCKCFGR2_USART1SEL_MASK
+                  | RCC_DCKCFGR2_USART2SEL_MASK
+                  | RCC_DCKCFGR2_UART4SEL_MASK
+                  | RCC_DCKCFGR2_UART5SEL_MASK
+                  | RCC_DCKCFGR2_USART6SEL_MASK
+                  | RCC_DCKCFGR2_UART7SEL_MASK
+                  | RCC_DCKCFGR2_UART8SEL_MASK
+                  | RCC_DCKCFGR2_I2C1SEL_MASK
+                  | RCC_DCKCFGR2_I2C2SEL_MASK
+                  | RCC_DCKCFGR2_I2C3SEL_MASK
+                  | RCC_DCKCFGR2_I2C4SEL_MASK
+                  | RCC_DCKCFGR2_LPTIM1SEL_MASK
+                  | RCC_DCKCFGR2_CECSEL_MASK
+                  | RCC_DCKCFGR2_CK48MSEL_MASK
+                  | RCC_DCKCFGR2_SDMMCSEL_MASK);
+
+      regval |= (  STM32_RCC_DCKCFGR2_USART1SRC
+                 | STM32_RCC_DCKCFGR2_USART2SRC
+                 | STM32_RCC_DCKCFGR2_UART4SRC
+                 | STM32_RCC_DCKCFGR2_UART5SRC
+                 | STM32_RCC_DCKCFGR2_USART6SRC
+                 | STM32_RCC_DCKCFGR2_UART7SRC
+                 | STM32_RCC_DCKCFGR2_UART8SRC
+                 | STM32_RCC_DCKCFGR2_I2C1SRC
+                 | STM32_RCC_DCKCFGR2_I2C2SRC
+                 | STM32_RCC_DCKCFGR2_I2C3SRC
+                 | STM32_RCC_DCKCFGR2_I2C4SRC
+                 | STM32_RCC_DCKCFGR2_LPTIM1SRC
+                 | STM32_RCC_DCKCFGR2_CECSRC
+                 | STM32_RCC_DCKCFGR2_CK48MSRC
+                 | STM32_RCC_DCKCFGR2_SDMMCSRC);
+
+      putreg32(regval, STM32_RCC_DCKCFGR2);
+
+      /* Enable PLLI2S */
+
+      regval = getreg32(STM32_RCC_CR);
+      regval |= RCC_CR_PLLI2SON;
+      putreg32(regval, STM32_RCC_CR);
+
+      /* Wait until the PLLI2S is ready */
+
+      while ((getreg32(STM32_RCC_CR) & RCC_CR_PLLI2SRDY) == 0)
+        {
+        }
+#endif
 
-#if defined(CONFIG_STM32F7_IWDG) || defined(CONFIG_RTC_LSICLOCK)
+#if defined(CONFIG_STM32F7_IWDG) || defined(CONFIG_STM32F7_RTC_LSICLOCK)
       /* Low speed internal clock source LSI */
 
       stm32_rcc_enablelsi();
 #endif
 
-#if defined(CONFIG_RTC_LSECLOCK)
+#if defined(CONFIG_STM32F7_RTC_LSECLOCK)
       /* Low speed external clock source LSE
        *
        * TODO: There is another case where the LSE needs to
diff --git a/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c b/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c
new file mode 100644
index 0000000000000000000000000000000000000000..b390d422b4dc0782a6ec4db16f0899491b766968
--- /dev/null
+++ b/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c
@@ -0,0 +1,976 @@
+/****************************************************************************
+ * arch/arm/src/stm32f7/stm32f76xxx77xx_rcc.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include "stm32_pwr.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Allow up to 100 milliseconds for the high speed clock to become ready.
+ * that is a very long delay, but if the clock does not become ready we are
+ * hosed anyway.  Normally this is very fast, but I have seen at least one
+ * board that required this long, long timeout for the HSE to be ready.
+ */
+
+#define HSERDY_TIMEOUT (100 * CONFIG_BOARD_LOOPSPERMSEC)
+
+/* Same for HSI */
+
+#define HSIRDY_TIMEOUT HSERDY_TIMEOUT
+
+/* HSE divisor to yield ~1MHz RTC clock */
+
+#define HSE_DIVISOR (STM32_HSE_FREQUENCY + 500000) / 1000000
+
+/* FLASH wait states */
+
+#if !defined(BOARD_FLASH_WAITSTATES)
+#  error BOARD_FLASH_WAITSTATES not defined
+#elif BOARD_FLASH_WAITSTATES < 0 || BOARD_FLASH_WAITSTATES > 15
+#  error BOARD_FLASH_WAITSTATES is out of range
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: rcc_reset
+ *
+ * Description:
+ *   Reset the RCC clock configuration to the default reset state
+ *
+ ****************************************************************************/
+
+static inline void rcc_reset(void)
+{
+  uint32_t regval;
+
+  /* Enable the Internal High Speed clock (HSI) */
+
+  regval = getreg32(STM32_RCC_CR);
+  regval |= RCC_CR_HSION;
+  putreg32(regval, STM32_RCC_CR);
+
+  /* Reset CFGR register */
+
+  putreg32(0x00000000, STM32_RCC_CFGR);
+
+  /* Reset HSION, HSEON, CSSON and PLLON bits */
+
+  regval  = getreg32(STM32_RCC_CR);
+  regval &= ~(RCC_CR_HSION | RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_PLLON);
+  putreg32(regval, STM32_RCC_CR);
+
+  /* Reset PLLCFGR register to reset default */
+
+  putreg32(RCC_PLLCFG_RESET, STM32_RCC_PLLCFG);
+
+  /* Reset HSEBYP bit */
+
+  regval  = getreg32(STM32_RCC_CR);
+  regval &= ~RCC_CR_HSEBYP;
+  putreg32(regval, STM32_RCC_CR);
+
+  /* Disable all interrupts */
+
+  putreg32(0x00000000, STM32_RCC_CIR);
+}
+
+/****************************************************************************
+ * Name: rcc_enableahb1
+ *
+ * Description:
+ *   Enable selected AHB1 peripherals
+ *
+ ****************************************************************************/
+
+static inline void rcc_enableahb1(void)
+{
+  uint32_t regval;
+
+  /* Set the appropriate bits in the AHB1ENR register to enabled the
+   * selected AHB1 peripherals.
+   */
+
+  regval = getreg32(STM32_RCC_AHB1ENR);
+
+  /* Enable GPIOA, GPIOB, .... GPIOI */
+
+#if STM32F7_NGPIO > 0
+  regval |= (RCC_AHB1ENR_GPIOAEN
+#if STM32F7_NGPIO > 1
+             | RCC_AHB1ENR_GPIOBEN
+#endif
+#if STM32F7_NGPIO > 2
+             | RCC_AHB1ENR_GPIOCEN
+#endif
+#if STM32F7_NGPIO > 3
+             | RCC_AHB1ENR_GPIODEN
+#endif
+#if STM32F7_NGPIO > 4
+             | RCC_AHB1ENR_GPIOEEN
+#endif
+#if STM32F7_NGPIO > 5
+             | RCC_AHB1ENR_GPIOFEN
+#endif
+#if STM32F7_NGPIO > 6
+             | RCC_AHB1ENR_GPIOGEN
+#endif
+#if STM32F7_NGPIO > 7
+             | RCC_AHB1ENR_GPIOHEN
+#endif
+#if STM32F7_NGPIO > 8
+             | RCC_AHB1ENR_GPIOIEN
+#endif
+#if STM32F7_NGPIO > 9
+             | RCC_AHB1ENR_GPIOJEN
+#endif
+#if STM32F7_NGPIO > 10
+             | RCC_AHB1ENR_GPIOKEN
+#endif
+             );
+#endif
+
+#ifdef CONFIG_STM32F7_CRC
+  /* CRC clock enable */
+
+  regval |= RCC_AHB1ENR_CRCEN;
+#endif
+
+#ifdef CONFIG_STM32F7_BKPSRAM
+  /* Backup SRAM clock enable */
+
+  regval |= RCC_AHB1ENR_BKPSRAMEN;
+#endif
+
+#ifdef CONFIG_ARMV7M_DTCM
+  /* DTCM data RAM clock enable */
+
+  regval |= RCC_AHB1ENR_DTCMRAMEN;
+#endif
+
+#ifdef CONFIG_STM32F7_DMA1
+  /* DMA 1 clock enable */
+
+  regval |= RCC_AHB1ENR_DMA1EN;
+#endif
+
+#ifdef CONFIG_STM32F7_DMA2
+  /* DMA 2 clock enable */
+
+  regval |= RCC_AHB1ENR_DMA2EN;
+#endif
+
+#ifdef CONFIG_STM32F7_DMA2D
+  /* DMA2D clock */
+
+  regval |= RCC_AHB1ENR_DMA2DEN;
+#endif
+
+#ifdef CONFIG_STM32F7_ETHMAC
+  /* Ethernet MAC clocking */
+
+  regval |= (RCC_AHB1ENR_ETHMACEN | RCC_AHB1ENR_ETHMACTXEN | \
+             RCC_AHB1ENR_ETHMACRXEN);
+
+#ifdef CONFIG_STM32F7_ETH_PTP
+  /* Precision Time Protocol (PTP) */
+
+  regval |= RCC_AHB1ENR_ETHMACPTPEN;
+
+#endif
+#endif
+
+#ifdef CONFIG_STM32F7_OTGHS
+  /* USB OTG HS */
+
+  regval |= RCC_AHB1ENR_OTGHSEN;
+
+#endif  /* CONFIG_STM32F7_OTGHS */
+
+  putreg32(regval, STM32_RCC_AHB1ENR);   /* Enable peripherals */
+}
+
+/****************************************************************************
+ * Name: rcc_enableahb2
+ *
+ * Description:
+ *   Enable selected AHB2 peripherals
+ *
+ ****************************************************************************/
+
+static inline void rcc_enableahb2(void)
+{
+  uint32_t regval;
+
+  /* Set the appropriate bits in the AHB2ENR register to enabled the
+   * selected AHB2 peripherals.
+   */
+
+  regval = getreg32(STM32_RCC_AHB2ENR);
+
+#ifdef CONFIG_STM32F7_DCMI
+  /* Camera interface enable */
+
+  regval |= RCC_AHB2ENR_DCMIEN;
+#endif
+
+#ifdef CONFIG_STM32F7_CRYP
+  /* Cryptographic modules clock enable */
+
+  regval |= RCC_AHB2ENR_CRYPEN;
+#endif
+
+#ifdef CONFIG_STM32F7_HASH
+  /* Hash modules clock enable */
+
+  regval |= RCC_AHB2ENR_HASHEN;
+#endif
+
+#ifdef CONFIG_STM32F7_RNG
+  /* Random number generator clock enable */
+
+  regval |= RCC_AHB2ENR_RNGEN;
+#endif
+
+#ifdef CONFIG_STM32F7_OTGFS
+  /* USB OTG FS clock enable */
+
+  regval |= RCC_AHB2ENR_OTGFSEN;
+#endif
+
+  putreg32(regval, STM32_RCC_AHB2ENR);   /* Enable peripherals */
+}
+
+/****************************************************************************
+ * Name: rcc_enableahb3
+ *
+ * Description:
+ *   Enable selected AHB3 peripherals
+ *
+ ****************************************************************************/
+
+static inline void rcc_enableahb3(void)
+{
+  uint32_t regval;
+
+  /* Set the appropriate bits in the AHB3ENR register to enabled the
+   * selected AHB3 peripherals.
+   */
+
+  regval = getreg32(STM32_RCC_AHB3ENR);
+
+#ifdef CONFIG_STM32F7_FSMC
+  /* Flexible static memory controller module clock enable */
+
+  regval |= RCC_AHB3ENR_FSMCEN;
+#endif
+
+#ifdef CONFIG_STM32F7_QUADSPI
+  /* FQuad SPI memory controller clock enable */
+
+  regval |= RCC_AHB3ENR_QSPIEN;
+#endif
+
+  putreg32(regval, STM32_RCC_AHB3ENR);   /* Enable peripherals */
+}
+
+/****************************************************************************
+ * Name: rcc_enableapb1
+ *
+ * Description:
+ *   Enable selected APB1 peripherals
+ *
+ ****************************************************************************/
+
+static inline void rcc_enableapb1(void)
+{
+  uint32_t regval;
+
+  /* Set the appropriate bits in the APB1ENR register to enabled the
+   * selected APB1 peripherals.
+   */
+
+  regval = getreg32(STM32_RCC_APB1ENR);
+
+#ifdef CONFIG_STM32F7_TIM2
+  /* TIM2 clock enable */
+
+  regval |= RCC_APB1ENR_TIM2EN;
+#endif
+
+#ifdef CONFIG_STM32F7_TIM3
+  /* TIM3 clock enable */
+
+  regval |= RCC_APB1ENR_TIM3EN;
+#endif
+
+#ifdef CONFIG_STM32F7_TIM4
+  /* TIM4 clock enable */
+
+  regval |= RCC_APB1ENR_TIM4EN;
+#endif
+
+#ifdef CONFIG_STM32F7_TIM5
+  /* TIM5 clock enable */
+
+  regval |= RCC_APB1ENR_TIM5EN;
+#endif
+
+#ifdef CONFIG_STM32F7_TIM6
+  /* TIM6 clock enable */
+
+  regval |= RCC_APB1ENR_TIM6EN;
+#endif
+
+#ifdef CONFIG_STM32F7_TIM7
+  /* TIM7 clock enable */
+
+  regval |= RCC_APB1ENR_TIM7EN;
+#endif
+
+#ifdef CONFIG_STM32F7_TIM12
+  /* TIM12 clock enable */
+
+  regval |= RCC_APB1ENR_TIM12EN;
+#endif
+
+#ifdef CONFIG_STM32F7_TIM13
+  /* TIM13 clock enable */
+
+  regval |= RCC_APB1ENR_TIM13EN;
+#endif
+
+#ifdef CONFIG_STM32F7_TIM14
+  /* TIM14 clock enable */
+
+  regval |= RCC_APB1ENR_TIM14EN;
+#endif
+
+#ifdef CONFIG_STM32F7_LPTIM1
+  /* Low-power timer 1 clock enable */
+
+  regval |= RCC_APB1ENR_LPTIM1EN;
+#endif
+
+#ifdef CONFIG_STM32F7_WWDG
+  /* Window watchdog clock enable */
+
+  regval |= RCC_APB1ENR_WWDGEN;
+#endif
+
+#ifdef CONFIG_STM32F7_SPI2
+  /* SPI2 clock enable */
+
+  regval |= RCC_APB1ENR_SPI2EN;
+#endif
+
+#ifdef CONFIG_STM32F7_SPI3
+  /* SPI3 clock enable */
+
+  regval |= RCC_APB1ENR_SPI3EN;
+#endif
+
+#ifdef CONFIG_STM32F7_SPDIFRX
+  /* SPDIFRX clock enable */
+
+  regval |= RCC_APB1ENR_SPDIFRXEN;
+#endif
+
+#ifdef CONFIG_STM32F7_USART2
+  /* USART 2 clock enable */
+
+  regval |= RCC_APB1ENR_USART2EN;
+#endif
+
+#ifdef CONFIG_STM32F7_USART3
+  /* USART3 clock enable */
+
+  regval |= RCC_APB1ENR_USART3EN;
+#endif
+
+#ifdef CONFIG_STM32F7_UART4
+  /* UART4 clock enable */
+
+  regval |= RCC_APB1ENR_UART4EN;
+#endif
+
+#ifdef CONFIG_STM32F7_UART5
+  /* UART5 clock enable */
+
+  regval |= RCC_APB1ENR_UART5EN;
+#endif
+
+#ifdef CONFIG_STM32F7_I2C1
+  /* I2C1 clock enable */
+
+  regval |= RCC_APB1ENR_I2C1EN;
+#endif
+
+#ifdef CONFIG_STM32F7_I2C2
+  /* I2C2 clock enable */
+
+  regval |= RCC_APB1ENR_I2C2EN;
+#endif
+
+#ifdef CONFIG_STM32F7_I2C3
+  /* I2C3 clock enable */
+
+  regval |= RCC_APB1ENR_I2C3EN;
+#endif
+
+#ifdef CONFIG_STM32F7_I2C4
+  /* I2C4 clock enable */
+
+  regval |= RCC_APB1ENR_I2C4EN;
+#endif
+
+#ifdef CONFIG_STM32F7_CAN1
+  /* CAN 1 clock enable */
+
+  regval |= RCC_APB1ENR_CAN1EN;
+#endif
+
+#ifdef CONFIG_STM32F7_CAN2
+  /* CAN2 clock enable.  NOTE: CAN2 needs CAN1 clock as well. */
+
+  regval |= (RCC_APB1ENR_CAN1EN | RCC_APB1ENR_CAN2EN);
+#endif
+
+#ifdef CONFIG_STM32F7_CEC
+  /* CEC clock enable. */
+
+  regval |= RCC_APB1ENR_CECEN;
+#endif
+
+  /* Power interface clock enable.  The PWR block is always enabled so that
+   * we can set the internal voltage regulator for maximum performance.
+   */
+
+  regval |= RCC_APB1ENR_PWREN;
+
+#if defined (CONFIG_STM32F7_DAC1) || defined(CONFIG_STM32F7_DAC2)
+  /* DAC interface clock enable */
+
+  regval |= RCC_APB1ENR_DACEN;
+#endif
+
+#ifdef CONFIG_STM32F7_UART7
+  /* UART7 clock enable */
+
+  regval |= RCC_APB1ENR_UART7EN;
+#endif
+
+#ifdef CONFIG_STM32F7_UART8
+  /* UART8 clock enable */
+
+  regval |= RCC_APB1ENR_UART8EN;
+#endif
+
+  putreg32(regval, STM32_RCC_APB1ENR);   /* Enable peripherals */
+}
+
+/****************************************************************************
+ * Name: rcc_enableapb2
+ *
+ * Description:
+ *   Enable selected APB2 peripherals
+ *
+ ****************************************************************************/
+
+static inline void rcc_enableapb2(void)
+{
+  uint32_t regval;
+
+  /* Set the appropriate bits in the APB2ENR register to enabled the
+   * selected APB2 peripherals.
+   */
+
+  regval = getreg32(STM32_RCC_APB2ENR);
+
+#ifdef CONFIG_STM32F7_TIM1
+  /* TIM1 clock enable */
+
+  regval |= RCC_APB2ENR_TIM1EN;
+#endif
+
+#ifdef CONFIG_STM32F7_TIM8
+  /* TIM8 clock enable */
+
+  regval |= RCC_APB2ENR_TIM8EN;
+#endif
+
+#ifdef CONFIG_STM32F7_USART1
+  /* USART1 clock enable */
+
+  regval |= RCC_APB2ENR_USART1EN;
+#endif
+
+#ifdef CONFIG_STM32F7_USART6
+  /* USART6 clock enable */
+
+  regval |= RCC_APB2ENR_USART6EN;
+#endif
+
+#ifdef CONFIG_STM32F7_ADC1
+  /* ADC1 clock enable */
+
+  regval |= RCC_APB2ENR_ADC1EN;
+#endif
+
+#ifdef CONFIG_STM32F7_ADC2
+  /* ADC2 clock enable */
+
+  regval |= RCC_APB2ENR_ADC2EN;
+#endif
+
+#ifdef CONFIG_STM32F7_ADC3
+  /* ADC3 clock enable */
+
+  regval |= RCC_APB2ENR_ADC3EN;
+#endif
+
+#ifdef CONFIG_STM32F7_SDMMC1
+  /* SDIO clock enable */
+
+  regval |= RCC_APB2ENR_SDMMC1EN;
+#endif
+
+#ifdef CONFIG_STM32F7_SPI1
+  /* SPI1 clock enable */
+
+  regval |= RCC_APB2ENR_SPI1EN;
+#endif
+
+#ifdef CONFIG_STM32F7_SPI4
+  /* SPI4 clock enable */
+
+  regval |= RCC_APB2ENR_SPI4EN;
+#endif
+
+  /* System configuration controller clock enable */
+
+  regval |= RCC_APB2ENR_SYSCFGEN;
+
+#ifdef CONFIG_STM32F7_TIM9
+  /* TIM9 clock enable */
+
+  regval |= RCC_APB2ENR_TIM9EN;
+#endif
+
+#ifdef CONFIG_STM32F7_TIM10
+  /* TIM10 clock enable */
+
+  regval |= RCC_APB2ENR_TIM10EN;
+#endif
+
+#ifdef CONFIG_STM32F7_TIM11
+  /* TIM11 clock enable */
+
+  regval |= RCC_APB2ENR_TIM11EN;
+#endif
+
+#ifdef CONFIG_STM32F7_SPI5
+  /* SPI5 clock enable */
+
+  regval |= RCC_APB2ENR_SPI5EN;
+#endif
+
+#ifdef CONFIG_STM32F7_SPI6
+  /* SPI6 clock enable */
+
+  regval |= RCC_APB2ENR_SPI6EN;
+#endif
+
+#ifdef CONFIG_STM32F7_SAI1
+  /* SPI6 clock enable */
+
+  regval |= RCC_APB2ENR_SAI1EN;
+#endif
+
+#ifdef CONFIG_STM32F7_SAI2
+  /* SPI6 clock enable */
+
+  regval |= RCC_APB2ENR_SAI2EN;
+#endif
+
+#ifdef CONFIG_STM32F7_LTDC
+  /* LTDC clock enable */
+
+  regval |= RCC_APB2ENR_LTDCEN;
+#endif
+
+  putreg32(regval, STM32_RCC_APB2ENR);   /* Enable peripherals */
+}
+
+/****************************************************************************
+ * Name: stm32_stdclockconfig
+ *
+ * Description:
+ *   Called to change to new clock based on settings in board.h
+ *
+ *   NOTE:  This logic would need to be extended if you need to select low-
+ *   power clocking modes!
+ ****************************************************************************/
+
+#ifndef CONFIG_STM32F7_CUSTOM_CLOCKCONFIG
+static void stm32_stdclockconfig(void)
+{
+  uint32_t regval;
+  volatile int32_t timeout;
+
+#ifdef STM32_BOARD_USEHSI
+  /* Enable Internal High-Speed Clock (HSI) */
+
+  regval  = getreg32(STM32_RCC_CR);
+  regval |= RCC_CR_HSION;           /* Enable HSI */
+  putreg32(regval, STM32_RCC_CR);
+
+  /* Wait until the HSI is ready (or until a timeout elapsed) */
+
+  for (timeout = HSIRDY_TIMEOUT; timeout > 0; timeout--)
+    {
+      /* Check if the HSIRDY flag is the set in the CR */
+
+      if ((getreg32(STM32_RCC_CR) & RCC_CR_HSIRDY) != 0)
+        {
+          /* If so, then break-out with timeout > 0 */
+
+          break;
+        }
+    }
+
+#else /* if STM32_BOARD_USEHSE */
+  /* Enable External High-Speed Clock (HSE) */
+
+  regval  = getreg32(STM32_RCC_CR);
+  regval |= RCC_CR_HSEON;           /* Enable HSE */
+  putreg32(regval, STM32_RCC_CR);
+
+  /* Wait until the HSE is ready (or until a timeout elapsed) */
+
+  for (timeout = HSERDY_TIMEOUT; timeout > 0; timeout--)
+    {
+      /* Check if the HSERDY flag is the set in the CR */
+
+      if ((getreg32(STM32_RCC_CR) & RCC_CR_HSERDY) != 0)
+        {
+          /* If so, then break-out with timeout > 0 */
+
+          break;
+        }
+    }
+#endif
+
+  /* Check for a timeout.  If this timeout occurs, then we are hosed.  We
+   * have no real back-up plan, although the following logic makes it look
+   * as though we do.
+   */
+
+  if (timeout > 0)
+    {
+      /* Select regulator voltage output Scale 1 mode to support system
+       * frequencies up to 216 MHz.
+       */
+
+      regval  = getreg32(STM32_RCC_APB1ENR);
+      regval |= RCC_APB1ENR_PWREN;
+      putreg32(regval, STM32_RCC_APB1ENR);
+
+      regval  = getreg32(STM32_PWR_CR1);
+      regval &= ~PWR_CR1_VOS_MASK;
+      regval |= PWR_CR1_VOS_SCALE_1;
+      putreg32(regval, STM32_PWR_CR1);
+
+      /* Set the HCLK source/divider */
+
+      regval = getreg32(STM32_RCC_CFGR);
+      regval &= ~RCC_CFGR_HPRE_MASK;
+      regval |= STM32_RCC_CFGR_HPRE;
+      putreg32(regval, STM32_RCC_CFGR);
+
+      /* Set the PCLK2 divider */
+
+      regval = getreg32(STM32_RCC_CFGR);
+      regval &= ~RCC_CFGR_PPRE2_MASK;
+      regval |= STM32_RCC_CFGR_PPRE2;
+      putreg32(regval, STM32_RCC_CFGR);
+
+      /* Set the PCLK1 divider */
+
+      regval = getreg32(STM32_RCC_CFGR);
+      regval &= ~RCC_CFGR_PPRE1_MASK;
+      regval |= STM32_RCC_CFGR_PPRE1;
+      putreg32(regval, STM32_RCC_CFGR);
+
+#ifdef CONFIG_STM32F7_RTC_HSECLOCK
+      /* Set the RTC clock divisor */
+
+      regval = getreg32(STM32_RCC_CFGR);
+      regval &= ~RCC_CFGR_RTCPRE_MASK;
+      regval |= RCC_CFGR_RTCPRE(HSE_DIVISOR);
+      putreg32(regval, STM32_RCC_CFGR);
+#endif
+
+      /* Set the PLL dividers and multipliers to configure the main PLL */
+
+#ifdef STM32_BOARD_USEHSI
+      regval = (STM32_PLLCFG_PLLM | STM32_PLLCFG_PLLN | STM32_PLLCFG_PLLP |
+                RCC_PLLCFG_PLLSRC_HSI | STM32_PLLCFG_PLLQ);
+#else /* if STM32_BOARD_USEHSE */
+      regval = (STM32_PLLCFG_PLLM | STM32_PLLCFG_PLLN | STM32_PLLCFG_PLLP |
+                RCC_PLLCFG_PLLSRC_HSE | STM32_PLLCFG_PLLQ);
+#endif
+      putreg32(regval, STM32_RCC_PLLCFG);
+
+      /* Enable the main PLL */
+
+      regval = getreg32(STM32_RCC_CR);
+      regval |= RCC_CR_PLLON;
+      putreg32(regval, STM32_RCC_CR);
+
+      /* Wait until the PLL is ready */
+
+      while ((getreg32(STM32_RCC_CR) & RCC_CR_PLLRDY) == 0)
+        {
+        }
+
+      /* Enable the Over-drive to extend the clock frequency to 216 Mhz */
+
+      regval  = getreg32(STM32_PWR_CR1);
+      regval |= PWR_CR1_ODEN;
+      putreg32(regval, STM32_PWR_CR1);
+      while ((getreg32(STM32_PWR_CSR1) & PWR_CSR1_ODRDY) == 0)
+        {
+        }
+
+      regval = getreg32(STM32_PWR_CR1);
+      regval |= PWR_CR1_ODSWEN;
+      putreg32(regval, STM32_PWR_CR1);
+      while ((getreg32(STM32_PWR_CSR1) & PWR_CSR1_ODSWRDY) == 0)
+        {
+        }
+
+      /* Configure FLASH wait states */
+
+      regval = FLASH_ACR_LATENCY(BOARD_FLASH_WAITSTATES);
+
+#ifdef CONFIG_STM32F7_FLASH_PREFETCH
+      /* Enable FLASH prefetch */
+
+      regval |= FLASH_ACR_PRFTEN;
+#endif
+
+#ifdef CONFIG_ARMV7M_ITCM
+  /* The Flash memory interface accelerates code execution with a system of
+   * instruction prefetch and cache lines on ITCM interface (ART
+   * Accelerator™).
+   */
+
+      regval |= FLASH_ACR_ARTEN;
+#endif
+
+      putreg32(regval, STM32_FLASH_ACR);
+
+      /* Select the main PLL as system clock source */
+
+      regval  = getreg32(STM32_RCC_CFGR);
+      regval &= ~RCC_CFGR_SW_MASK;
+      regval |= RCC_CFGR_SW_PLL;
+      putreg32(regval, STM32_RCC_CFGR);
+
+      /* Wait until the PLL source is used as the system clock source */
+
+      while ((getreg32(STM32_RCC_CFGR) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_PLL)
+        {
+        }
+
+#if defined(CONFIG_STM32F7_LTDC) || defined(CONFIG_STM32F7_PLLSAI)
+
+      /* Configure PLLSAI */
+
+      regval = getreg32(STM32_RCC_PLLSAICFGR);
+      regval &= ~(  RCC_PLLSAICFGR_PLLSAIN_MASK
+                  | RCC_PLLSAICFGR_PLLSAIP_MASK
+                  | RCC_PLLSAICFGR_PLLSAIQ_MASK
+                  | RCC_PLLSAICFGR_PLLSAIR_MASK);
+      regval |= (STM32_RCC_PLLSAICFGR_PLLSAIN
+                 | STM32_RCC_PLLSAICFGR_PLLSAIP
+                 | STM32_RCC_PLLSAICFGR_PLLSAIQ
+                 | STM32_RCC_PLLSAICFGR_PLLSAIR);
+      putreg32(regval, STM32_RCC_PLLSAICFGR);
+
+      regval  = getreg32(STM32_RCC_DCKCFGR1);
+      regval &= ~(RCC_DCKCFGR1_PLLI2SDIVQ_MASK
+                  | RCC_DCKCFGR1_PLLSAIDIVQ_MASK
+                  | RCC_DCKCFGR1_PLLSAIDIVR_MASK
+                  | RCC_DCKCFGR1_SAI1SEL_MASK
+                  | RCC_DCKCFGR1_SAI2SEL_MASK
+                  | RCC_DCKCFGR1_TIMPRESEL
+                  | RCC_DCKCFGR1_DFSDM1SEL
+                  | RCC_DCKCFGR1_ADFSDM1SEL);
+
+      regval |= (STM32_RCC_DCKCFGR1_PLLI2SDIVQ
+                 | STM32_RCC_DCKCFGR1_PLLSAIDIVQ
+                 | STM32_RCC_DCKCFGR1_PLLSAIDIVR
+                 | STM32_RCC_DCKCFGR1_SAI1SRC
+                 | STM32_RCC_DCKCFGR1_SAI2SRC
+                 | STM32_RCC_DCKCFGR1_TIMPRESRC
+                 | STM32_RCC_DCKCFGR1_DFSDM1SRC
+                 | STM32_RCC_DCKCFGR1_ADFSDM1SRC);
+
+      putreg32(regval, STM32_RCC_DCKCFGR1);
+
+      /* Enable PLLSAI */
+
+      regval = getreg32(STM32_RCC_CR);
+      regval |= RCC_CR_PLLSAION;
+      putreg32(regval, STM32_RCC_CR);
+
+      /* Wait until the PLLSAI is ready */
+
+      while ((getreg32(STM32_RCC_CR) & RCC_CR_PLLSAIRDY) == 0)
+        {
+        }
+#endif
+#if defined(CONFIG_STM32F7_LTDC) || defined(CONFIG_STM32F7_PLLI2S)
+
+      /* Configure PLLI2S */
+
+      regval = getreg32(STM32_RCC_PLLI2SCFGR);
+      regval &= ~(  RCC_PLLI2SCFGR_PLLI2SN_MASK
+                  | RCC_PLLI2SCFGR_PLLI2SP_MASK
+                  | RCC_PLLI2SCFGR_PLLI2SQ_MASK
+                  | RCC_PLLI2SCFGR_PLLI2SR_MASK);
+      regval |= (STM32_RCC_PLLSAICFGR_PLLSAIN
+                 | STM32_RCC_PLLSAICFGR_PLLSAIP
+                 | STM32_RCC_PLLSAICFGR_PLLSAIQ
+                 | STM32_RCC_PLLSAICFGR_PLLSAIR);
+      putreg32(regval, STM32_RCC_PLLI2SCFGR);
+
+      regval  = getreg32(STM32_RCC_DCKCFGR2);
+      regval &= ~(  RCC_DCKCFGR2_USART1SEL_MASK
+                  | RCC_DCKCFGR2_USART2SEL_MASK
+                  | RCC_DCKCFGR2_UART4SEL_MASK
+                  | RCC_DCKCFGR2_UART5SEL_MASK
+                  | RCC_DCKCFGR2_USART6SEL_MASK
+                  | RCC_DCKCFGR2_UART7SEL_MASK
+                  | RCC_DCKCFGR2_UART8SEL_MASK
+                  | RCC_DCKCFGR2_I2C1SEL_MASK
+                  | RCC_DCKCFGR2_I2C2SEL_MASK
+                  | RCC_DCKCFGR2_I2C3SEL_MASK
+                  | RCC_DCKCFGR2_I2C4SEL_MASK
+                  | RCC_DCKCFGR2_LPTIM1SEL_MASK
+                  | RCC_DCKCFGR2_CECSEL_MASK
+                  | RCC_DCKCFGR2_CK48MSEL_MASK
+                  | RCC_DCKCFGR2_SDMMCSEL_MASK
+                  | RCC_DCKCFGR2_SDMMC2SEL_MASK
+                  | RCC_DCKCFGR2_DSISELL_MASK);
+
+      regval |= (  STM32_RCC_DCKCFGR2_USART1SRC
+                 | STM32_RCC_DCKCFGR2_USART2SRC
+                 | STM32_RCC_DCKCFGR2_UART4SRC
+                 | STM32_RCC_DCKCFGR2_UART5SRC
+                 | STM32_RCC_DCKCFGR2_USART6SRC
+                 | STM32_RCC_DCKCFGR2_UART7SRC
+                 | STM32_RCC_DCKCFGR2_UART8SRC
+                 | STM32_RCC_DCKCFGR2_I2C1SRC
+                 | STM32_RCC_DCKCFGR2_I2C2SRC
+                 | STM32_RCC_DCKCFGR2_I2C3SRC
+                 | STM32_RCC_DCKCFGR2_I2C4SRC
+                 | STM32_RCC_DCKCFGR2_LPTIM1SRC
+                 | STM32_RCC_DCKCFGR2_CECSRC
+                 | STM32_RCC_DCKCFGR2_CK48MSRC
+                 | STM32_RCC_DCKCFGR2_SDMMCSRC
+                 | STM32_RCC_DCKCFGR2_SDMMC2SRC
+                 | STM32_RCC_DCKCFGR2_DSISRC);
+
+      putreg32(regval, STM32_RCC_DCKCFGR2);
+
+      /* Enable PLLI2S */
+
+      regval = getreg32(STM32_RCC_CR);
+      regval |= RCC_CR_PLLI2SON;
+      putreg32(regval, STM32_RCC_CR);
+
+      /* Wait until the PLLI2S is ready */
+
+      while ((getreg32(STM32_RCC_CR) & RCC_CR_PLLI2SRDY) == 0)
+        {
+        }
+#endif
+
+#if defined(CONFIG_STM32F7_IWDG) || defined(CONFIG_STM32F7_RTC_LSICLOCK)
+      /* Low speed internal clock source LSI */
+
+      stm32_rcc_enablelsi();
+#endif
+
+#if defined(CONFIG_STM32F7_RTC_LSECLOCK)
+      /* Low speed external clock source LSE
+       *
+       * TODO: There is another case where the LSE needs to
+       * be enabled: if the MCO1 pin selects LSE as source.
+       */
+
+      stm32_rcc_enablelse();
+#endif
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: rcc_enableperiphals
+ ****************************************************************************/
+
+static inline void rcc_enableperipherals(void)
+{
+  rcc_enableahb1();
+  rcc_enableahb2();
+  rcc_enableahb3();
+  rcc_enableapb1();
+  rcc_enableapb2();
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
diff --git a/arch/arm/src/stm32l4/Kconfig b/arch/arm/src/stm32l4/Kconfig
index eccd8469bfb32013e27552e180cecd77848ace48..68d6ee6806b947f6f35b9dd7d929e4b3b0255b54 100644
--- a/arch/arm/src/stm32l4/Kconfig
+++ b/arch/arm/src/stm32l4/Kconfig
@@ -37,9 +37,36 @@ endchoice # STM32 L4 Chip Selection
 
 # Chip families
 
+config STM32L4_STM32L4X3
+	bool
+	default n
+	select STM32L4_HAVE_USART1
+	select STM32L4_HAVE_USART2
+	select STM32L4_HAVE_USART3
+	select STM32L4_HAVE_LPTIM1
+	select STM32L4_HAVE_LPTIM2
+	select STM32L4_HAVE_COMP
+	select STM32L4_HAVE_SAI1
+	select STM32L4_HAVE_SAI2
+
+config STM32L4_STM32L4X6
+	bool
+	default n
+	select STM32L4_HAVE_USART1
+	select STM32L4_HAVE_USART2
+	select STM32L4_HAVE_USART3
+	select STM32L4_HAVE_UART4
+	select STM32L4_HAVE_UART5
+	select STM32L4_HAVE_LPTIM1
+	select STM32L4_HAVE_LPTIM2
+	select STM32L4_HAVE_COMP
+	select STM32L4_HAVE_SAI1
+	select STM32L4_HAVE_SAI2
+
 config STM32L4_STM32L476XX
 	bool
 	default n
+	select STM32L4_STM32L4X6
 	select ARCH_HAVE_FPU
 	select ARCH_HAVE_DPFPU # REVISIT
 	select ARMV7M_HAVE_ITCM
@@ -48,6 +75,7 @@ config STM32L4_STM32L476XX
 config STM32L4_STM32L486XX
 	bool
 	default n
+	select STM32L4_STM32L4X6
 	select ARCH_HAVE_FPU
 	select ARCH_HAVE_DPFPU # REVISIT
 	select ARMV7M_HAVE_ITCM
@@ -69,7 +97,7 @@ config STM32L4_FLASH_1024KB
 
 endchoice # Embedded FLASH size
 
-comment "SRAM2 Options"
+comment "STM32L4 SRAM2 Options"
 
 config STM32L4_SRAM2_HEAP
 	bool "SRAM2 is used for heap"
@@ -97,6 +125,8 @@ config STM32L4_SRAM2_INIT
 		case, the board should handle the initialization itself at the appropriate
 		time.
 
+comment "STM32L4 Peripherals"
+
 menu "STM32L4 Peripheral Support"
 
 # These "hidden" settings determine is a peripheral option is available for the
@@ -106,6 +136,26 @@ config STM32L4_HAVE_LTDC
 	bool
 	default n
 
+config STM32L4_HAVE_LPTIM1
+	bool
+	default n
+
+config STM32L4_HAVE_LPTIM2
+	bool
+	default n
+
+config STM32L4_HAVE_COMP
+	bool
+	default n
+
+config STM32L4_HAVE_SAI1
+	bool
+	default n
+
+config STM32L4_HAVE_SAI2
+	bool
+	default n
+
 # These "hidden" settings are the OR of individual peripheral selections
 # indicating that the general capability is required.
 
@@ -142,8 +192,8 @@ config STM32L4_USART
 	default n
 
 config STM32L4_LPTIM
-    bool
-    default n
+	bool
+	default n
 
 # These are the peripheral selections proper
 
@@ -200,6 +250,38 @@ config STM32L4_RNG
 	default n
 	select ARCH_HAVE_RNG
 
+config STM32L4_SAI1_A
+	bool "SAI1 Block A"
+	default n
+	select AUDIO
+	select I2S
+	select SCHED_WORKQUEUE
+	select STM32L4_SAI
+
+config STM32L4_SAI1_B
+	bool "SAI1 Block B"
+	default n
+	select AUDIO
+	select I2S
+	select SCHED_WORKQUEUE
+	select STM32L4_SAI
+
+config STM32L4_SAI2_A
+	bool "SAI2 Block A"
+	default n
+	select AUDIO
+	select I2S
+	select SCHED_WORKQUEUE
+	select STM32L4_SAI
+
+config STM32L4_SAI2_B
+	bool "SAI2 Block B"
+	default n
+	select AUDIO
+	select I2S
+	select SCHED_WORKQUEUE
+	select STM32L4_SAI
+
 comment "AHB3 Peripherals"
 
 config STM32L4_FMC
@@ -333,7 +415,7 @@ config STM32L4_QSPI_DMATHRESHOLD
 
 config STM32L4_QSPI_DMADEBUG
 	bool "QSPI DMA transfer debug"
-	depends on STM32L4_QSPI_DMA && DEBUG && DEBUG_DMA
+	depends on STM32L4_QSPI_DMA && DEBUG_SPI && DEBUG_DMA
 	default n
 	---help---
 		Enable special debug instrumentation to analyze QSPI DMA data transfers.
@@ -343,11 +425,11 @@ config STM32L4_QSPI_DMADEBUG
 
 config STM32L4_QSPI_REGDEBUG
 	bool "QSPI Register level debug"
-	depends on DEBUG
+	depends on DEBUG_SPI_INFO
 	default n
 	---help---
 		Output detailed register-level QSPI device debug information.
-		Requires also DEBUG.
+		Requires also CONFIG_DEBUG_SPI_INFO.
 
 endif
 
@@ -382,8 +464,8 @@ config STM32L4_TIM7
 	default n
 
 config STM32L4_LCD
-    bool "LCD"
-    default n
+	bool "LCD"
+	default n
 
 config STM32L4_SPI2
 	bool "SPI2"
@@ -400,20 +482,23 @@ config STM32L4_SPI3
 config STM32L4_USART1
 	bool "USART1"
 	default n
-	select USART1_SERIALDRIVER
+	depends on STM32L4_HAVE_USART1
 	select ARCH_HAVE_SERIAL_TERMIOS
+	select USART1_SERIALDRIVER
 	select STM32L4_USART
 
 config STM32L4_USART2
 	bool "USART2"
 	default n
-	select USART2_SERIALDRIVER
+	depends on STM32L4_HAVE_USART2
 	select ARCH_HAVE_SERIAL_TERMIOS
+	select USART2_SERIALDRIVER
 	select STM32L4_USART
 
 config STM32L4_USART3
 	bool "USART3"
 	default n
+	depends on STM32L4_HAVE_USART3
 	select ARCH_HAVE_SERIAL_TERMIOS
 	select USART3_SERIALDRIVER
 	select STM32L4_USART
@@ -421,6 +506,7 @@ config STM32L4_USART3
 config STM32L4_UART4
 	bool "UART4"
 	default n
+	depends on STM32L4_HAVE_UART4
 	select ARCH_HAVE_SERIAL_TERMIOS
 	select UART4_SERIALDRIVER
 	select STM32L4_USART
@@ -428,6 +514,7 @@ config STM32L4_UART4
 config STM32L4_UART5
 	bool "UART5"
 	default n
+	depends on STM32L4_HAVE_UART5
 	select ARCH_HAVE_SERIAL_TERMIOS
 	select UART5_SERIALDRIVER
 	select STM32L4_USART
@@ -464,13 +551,14 @@ config STM32L4_DAC2
 	select STM32L4_DAC
 
 config STM32L4_OPAMP
-    bool "OPAMP"
-    default n
+	bool "OPAMP"
+	default n
 
 config STM32L4_LPTIM1
 	bool "LPTIM1"
 	default n
-    select STM32L4_LPTIM
+	select STM32L4_LPTIM
+	depends on STM32L4_HAVE_LPTIM1
 
 config STM32L4_LPUART1
 	bool "LPUART1"
@@ -479,13 +567,14 @@ config STM32L4_LPUART1
 	select ARCH_HAVE_LPUART1
 
 config STM32L4_SWPMI
-    bool "SWPMI"
-    default n
+	bool "SWPMI"
+	default n
 
 config STM32L4_LPTIM2
 	bool "LPTIM2"
 	default n
-    select STM32L4_LPTIM
+	select STM32L4_LPTIM
+	depends on STM32L4_HAVE_LPTIM2
 
 comment "APB2 Peripherals"
 
@@ -536,19 +625,24 @@ config STM32L4_TIM17
 	bool "TIM17"
 	default n
 
+config STM32L4_COMP
+	bool "COMP"
+	default n
+	depends on STM32L4_HAVE_COMP
+
 config STM32L4_SAI1
 	bool "SAI1"
 	default n
-	select STM32L4_SAI
+	depends on STM32L4_HAVE_SAI1
 
 config STM32L4_SAI2
 	bool "SAI2"
 	default n
-	select STM32L4_SAI
+	depends on STM32L4_HAVE_SAI2
 
 config STM32L4_DFSDM
-    bool "DFSDM"
-    default n
+	bool "DFSDM"
+	default n
 
 comment "Other Peripherals"
 
@@ -630,252 +724,2159 @@ config STM32L4_SAI2PLL
 config STM32L4_USART
 	bool
 
-menu "U[S]ART Configuration"
-	depends on STM32L4_USART
+menu "Timer Configuration"
 
-config USART1_RS485
-	bool "RS-485 on USART1"
-	default n
-	depends on STM32L4_USART1
+if SCHED_TICKLESS
+
+config STM32L4_ONESHOT
+	bool
+	default y
+
+config STM32L4_FREERUN
+	bool
+	default y
+
+config STM32L4_TICKLESS_ONESHOT
+	int "Tickless one-shot timer channel"
+	default 2
+	range 1 8
+	depends on STM32L4_ONESHOT
 	---help---
-		Enable RS-485 interface on USART1. Your board config will have to
-		provide GPIO_USART1_RS485_DIR pin definition. Currently it cannot be
-		used with USART1_RXDMA.
+		If the Tickless OS feature is enabled, then one clock must be
+		assigned to provide the one-shot timer needed by the OS.
 
-config USART1_RS485_DIR_POLARITY
-	int "USART1 RS-485 DIR pin polarity"
-	default 1
-	range 0 1
-	depends on USART1_RS485
+config STM32L4_TICKLESS_FREERUN
+	int "Tickless free-running timer channel"
+	default 5
+	range 1 8
+	depends on STM32L4_FREERUN
 	---help---
-		Polarity of DIR pin for RS-485 on USART1. Set to state on DIR pin which
-		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+		If the Tickless OS feature is enabled, then one clock must be
+		assigned to provide the free-running timer needed by the OS.
 
-config USART1_RXDMA
-	bool "USART1 Rx DMA"
+endif # SCHED_TICKLESS
+
+if !SCHED_TICKLESS
+
+config STM32L4_ONESHOT
+	bool "TIM one-shot wrapper"
 	default n
-	depends on STM32L4_USART1 && ( STM32L4_DMA1 || STM32L4_DMA2 )
 	---help---
-		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+		Enable a wrapper around the low level timer/counter functions to
+		support one-shot timer.
 
-config USART2_RS485
-	bool "RS-485 on USART2"
+config STM32L4_FREERUN
+	bool "TIM free-running wrapper"
 	default n
-	depends on STM32L4_USART2
 	---help---
-		Enable RS-485 interface on USART2. Your board config will have to
-		provide GPIO_USART2_RS485_DIR pin definition. Currently it cannot be
-		used with USART2_RXDMA.
+		Enable a wrapper around the low level timer/counter functions to
+		support a free-running timer.
 
-config USART2_RS485_DIR_POLARITY
-	int "USART2 RS-485 DIR pin polarity"
+endif # !SCHED_TICKLESS
+
+config STM32L4_ONESHOT_MAXTIMERS
+	int "Maximum number of oneshot timers"
 	default 1
-	range 0 1
-	depends on USART2_RS485
+	range 1 8
+	depends on STM32L4_ONESHOT
 	---help---
-		Polarity of DIR pin for RS-485 on USART2. Set to state on DIR pin which
-		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+		Determines the maximum number of oneshot timers that can be
+		supported.  This setting pre-allocates some minimal support for each
+		of the timers and places an upper limit on the number of oneshot
+		timers that you can use.
 
-config USART2_RXDMA
-	bool "USART2 Rx DMA"
+config STM32L4_TIM1_PWM
+	bool "TIM1 PWM"
 	default n
-	depends on STM32L4_USART2 && STM32L4_DMA1
+	depends on STM32L4_TIM1
+	select PWM
+	select ARCH_HAVE_PWM_PULSECOUNT
 	---help---
-		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+		Reserve timer 1 for use by PWM
 
-config USART3_RS485
-	bool "RS-485 on USART3"
-	default n
-	depends on STM32L4_USART3
-	---help---
-		Enable RS-485 interface on USART3. Your board config will have to
-		provide GPIO_USART3_RS485_DIR pin definition. Currently it cannot be
-		used with USART3_RXDMA.
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If STM32L4_TIM1
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
 
-config USART3_RS485_DIR_POLARITY
-	int "USART3 RS-485 DIR pin polarity"
-	default 1
-	range 0 1
-	depends on USART3_RS485
-	---help---
-		Polarity of DIR pin for RS-485 on USART3. Set to state on DIR pin which
-		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+if STM32L4_TIM1_PWM
 
-config USART3_RXDMA
-	bool "USART3 Rx DMA"
-	default n
-	depends on STM32L4_USART3 && STM32L4_DMA1
+config STM32L4_TIM1_MODE
+	int "TIM1 Mode"
+	default 0
+	range 0 4
 	---help---
-		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+		Specifies the timer mode.
 
-config UART4_RS485
-	bool "RS-485 on UART4"
+if STM32L4_PWM_MULTICHAN
+
+config STM32L4_TIM1_CHANNEL1
+	bool "TIM1 Channel 1"
 	default n
-	depends on STM32L4_UART4
 	---help---
-		Enable RS-485 interface on UART4. Your board config will have to
-		provide GPIO_UART4_RS485_DIR pin definition. Currently it cannot be
-		used with UART4_RXDMA.
+		Enables channel 1.
 
-config UART4_RS485_DIR_POLARITY
-	int "UART4 RS-485 DIR pin polarity"
-	default 1
-	range 0 1
-	depends on UART4_RS485
+if STM32L4_TIM1_CHANNEL1
+
+config STM32L4_TIM1_CH1MODE
+	int "TIM1 Channel 1 Mode"
+	default 0
+	range 0 5
 	---help---
-		Polarity of DIR pin for RS-485 on UART4. Set to state on DIR pin which
-		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+		Specifies the channel mode.
 
-config UART4_RXDMA
-	bool "UART4 Rx DMA"
+config STM32L4_TIM1_CH1OUT
+	bool "TIM1 Channel 1 Output"
 	default n
-	depends on STM32L4_UART4 && STM32L4_DMA2
 	---help---
-		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+		Enables channel 1 output.
 
-config UART5_RS485
-	bool "RS-485 on UART5"
+config STM32L4_TIM1_CH1NOUT
+	bool "TIM1 Channel 1 Complementary Output"
 	default n
-	depends on STM32L4_UART5
+	depends on STM32L4_TIM1_CH1OUT
 	---help---
-		Enable RS-485 interface on UART5. Your board config will have to
-		provide GPIO_UART5_RS485_DIR pin definition. Currently it cannot be
-		used with UART5_RXDMA.
+		Enables channel 1 complementary output.
 
-config UART5_RS485_DIR_POLARITY
-	int "UART5 RS-485 DIR pin polarity"
-	default 1
-	range 0 1
-	depends on UART5_RS485
-	---help---
-		Polarity of DIR pin for RS-485 on UART5. Set to state on DIR pin which
-		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+endif # STM32L4_TIM1_CHANNEL1
 
-config UART5_RXDMA
-	bool "UART5 Rx DMA"
+config STM32L4_TIM1_CHANNEL2
+	bool "TIM1 Channel 2"
 	default n
-	depends on STM32L4_UART5 && STM32L4_DMA2
 	---help---
-		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+		Enables channel 2.
 
-config SERIAL_DISABLE_REORDERING
-	bool "Disable reordering of ttySx devices."
-	depends on STM32L4_USART1 || STM32L4_USART2 || STM32L4_USART3 || STM32L4_UART4 || STM32L4_UART5
-	default n
+if STM32L4_TIM1_CHANNEL2
+
+config STM32L4_TIM1_CH2MODE
+	int "TIM1 Channel 2 Mode"
+	default 0
+	range 0 5
 	---help---
-		NuttX per default reorders the serial ports (/dev/ttySx) so that the
-		console is always on /dev/ttyS0. If more than one UART is in use this
-		can, however, have the side-effect that all port mappings
-		(hardware USART1 -> /dev/ttyS0) change if the console is moved to another
-		UART. This is in particular relevant if a project uses the USB console
-		in some configs and a serial console in other configs, but does not
-		want the side effect of having all serial port names change when just
-		the console is moved from serial to USB.
+		Specifies the channel mode.
 
-config STM32L4_FLOWCONTROL_BROKEN
-	bool "Use Software UART RTS flow control"
-	depends on STM32L4_USART
+config STM32L4_TIM1_CH2OUT
+	bool "TIM1 Channel 2 Output"
 	default n
 	---help---
-		Enable UART RTS flow control using Software. Because STM
-		Current STM32 have broken HW based RTS behavior (they assert
-		nRTS after every byte received)  Enable this setting workaround
-		this issue by useing software based management of RTS
+		Enables channel 2 output.
 
-config STM32L4_USART_BREAKS
-	bool "Add TIOxSBRK to support sending Breaks"
-	depends on STM32_USART
+config STM32L4_TIM1_CH2NOUT
+	bool "TIM1 Channel 2 Complemenrary Output"
 	default n
+	depends on STM32L4_TIM1_CH2OUT
 	---help---
-		Add TIOCxBRK routines to send a line break per the STM32 manual, the
-		break will be a pulse based on the value M. This is not a BSD compatible
-		break.
+		Enables channel 2 complementary output.
 
-config STM32L4_SERIALBRK_BSDCOMPAT
-	bool "Use GPIO To send Break"
-	depends on STM32_USART && STM32_USART_BREAKS
+endif # STM32L4_TIM1_CHANNEL2
+
+config STM32L4_TIM1_CHANNEL3
+	bool "TIM1 Channel 3"
 	default n
 	---help---
-		Enable using GPIO on the TX pin to send a BSD compatible break:
-		TIOCSBRK will start the break and TIOCCBRK will end the break.
-		The current STM32 U[S]ARTS have no way to leave the break (TX=LOW)
-		on because the SW starts the break and then the HW automatically clears
-		the break. This makes it is difficult to sent a long break.
+		Enables channel 3.
 
-endmenu # U[S]ART Configuration
+if STM32L4_TIM1_CHANNEL3
 
-menu "SPI Configuration"
-	depends on STM32L4_SPI
+config STM32L4_TIM1_CH3MODE
+	int "TIM1 Channel 3 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
 
-config STM32L4_SPI_INTERRUPTS
-	bool "Interrupt driver SPI"
+config STM32L4_TIM1_CH3OUT
+	bool "TIM1 Channel 3 Output"
 	default n
 	---help---
-		Select to enable interrupt driven SPI support. Non-interrupt-driven,
-		poll-waiting is recommended if the interrupt rate would be to high in
-		the interrupt driven case.
+		Enables channel 3 output.
 
-config STM32L4_SPI_DMA
-	bool "SPI DMA"
+config STM32L4_TIM1_CH3NOUT
+	bool "TIM1 Channel 3 Complementary Output"
 	default n
+	depends on STM32L4_TIM1_CH3OUT
 	---help---
-		Use DMA to improve SPI transfer performance.  Cannot be used with STM32L4_SPI_INTERRUPT.
+		Enables channel 3 complementary output.
 
-endmenu
+endif # STM32L4_TIM1_CHANNEL3
 
-menu "I2C Configuration"
-	depends on STM32L4_I2C
+config STM32L4_TIM1_CHANNEL4
+	bool "TIM1 Channel 4"
+	default n
+	---help---
+		Enables channel 4.
 
-config STM32L4_I2C_DYNTIMEO
-	bool "Use dynamic timeouts"
+if STM32L4_TIM1_CHANNEL4
+
+config STM32L4_TIM1_CH4MODE
+	int "TIM1 Channel 4 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM1_CH4OUT
+	bool "TIM1 Channel 4 Output"
 	default n
-	depends on STM32L4_I2C
+	---help---
+		Enables channel 4 output.
 
-config STM32L4_I2C_DYNTIMEO_USECPERBYTE
-	int "Timeout Microseconds per Byte"
-	default 500
-	depends on STM32L4_I2C_DYNTIMEO
+endif # STM32L4_TIM1_CHANNEL4
 
-config STM32L4_I2C_DYNTIMEO_STARTSTOP
-	int "Timeout for Start/Stop (Milliseconds)"
-	default 1000
-	depends on STM32L4_I2C_DYNTIMEO
+endif # STM32L4_PWM_MULTICHAN
 
-config STM32L4_I2CTIMEOSEC
-	int "Timeout seconds"
+if !STM32L4_PWM_MULTICHAN
+
+config STM32L4_TIM1_CHANNEL
+	int "TIM1 PWM Output Channel"
+	default 1
+	range 1 4
+	---help---
+		If TIM1 is enabled for PWM usage, you also need specifies the timer output
+		channel {1,..,4}
+
+config STM32L4_TIM1_CHMODE
+	int "TIM1 Channel Mode"
 	default 0
-	depends on STM32L4_I2C
+	range 0 5
+	---help---
+		Specifies the channel mode.
 
-config STM32L4_I2CTIMEOMS
-	int "Timeout Milliseconds"
-	default 500
-	depends on STM32L4_I2C && !STM32L4_I2C_DYNTIMEO
+endif # !STM32L4_PWM_MULTICHAN
 
-config STM32L4_I2CTIMEOTICKS
-	int "Timeout for Done and Stop (ticks)"
-	default 500
-	depends on STM32L4_I2C && !STM32L4_I2C_DYNTIMEO
+endif # STM32L4_TIM1_PWM
 
-config STM32L4_I2C_DUTY16_9
-	bool "Frequency with Tlow/Thigh = 16/9 "
+config STM32L4_TIM2_PWM
+	bool "TIM2 PWM"
 	default n
-	depends on STM32L4_I2C
+	depends on STM32L4_TIM2
+	select PWM
+	select ARCH_HAVE_PWM_PULSECOUNT
+	---help---
+		Reserve timer 2 for use by PWM
 
-endmenu
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If STM32L4_TIM2
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
 
-menu "CAN driver configuration"
-	depends on STM32L4_CAN1
+if STM32L4_TIM2_PWM
 
-config CAN1_BAUD
-	int "CAN1 BAUD"
-	default 250000
-	depends on STM32L4_CAN1
+config STM32L4_TIM2_MODE
+	int "TIM2 Mode"
+	default 0
+	range 0 4
 	---help---
-		CAN1 BAUD rate.  Required if STM32L4_CAN1 is defined.
+		Specifies the timer mode.
 
-config CAN_TSEG1
-	int "TSEG1 quanta"
-	default 6
+if STM32L4_PWM_MULTICHAN
+
+config STM32L4_TIM2_CHANNEL1
+	bool "TIM2 Channel 1"
+	default n
+	---help---
+		Enables channel 1.
+
+if STM32L4_TIM2_CHANNEL1
+
+config STM32L4_TIM2_CH1MODE
+	int "TIM2 Channel 1 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM2_CH1OUT
+	bool "TIM2 Channel 1 Output"
+	default n
+	---help---
+		Enables channel 1 output.
+
+endif # STM32L4_TIM2_CHANNEL1
+
+config STM32L4_TIM2_CHANNEL2
+	bool "TIM2 Channel 2"
+	default n
+	---help---
+		Enables channel 2.
+
+if STM32L4_TIM2_CHANNEL2
+
+config STM32L4_TIM2_CH2MODE
+	int "TIM2 Channel 2 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM2_CH2OUT
+	bool "TIM2 Channel 2 Output"
+	default n
+	---help---
+		Enables channel 2 output.
+
+endif # STM32L4_TIM2_CHANNEL2
+
+config STM32L4_TIM2_CHANNEL3
+	bool "TIM2 Channel 3"
+	default n
+	---help---
+		Enables channel 3.
+
+if STM32L4_TIM2_CHANNEL3
+
+config STM32L4_TIM2_CH3MODE
+	int "TIM2 Channel 3 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM2_CH3OUT
+	bool "TIM2 Channel 3 Output"
+	default n
+	---help---
+		Enables channel 3 output.
+
+endif # STM32L4_TIM2_CHANNEL3
+
+config STM32L4_TIM2_CHANNEL4
+	bool "TIM2 Channel 4"
+	default n
+	---help---
+		Enables channel 4.
+
+if STM32L4_TIM2_CHANNEL4
+
+config STM32L4_TIM2_CH4MODE
+	int "TIM2 Channel 4 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM2_CH4OUT
+	bool "TIM2 Channel 4 Output"
+	default n
+	---help---
+		Enables channel 4 output.
+
+endif # STM32L4_TIM2_CHANNEL4
+
+endif # STM32L4_PWM_MULTICHAN
+
+if !STM32L4_PWM_MULTICHAN
+
+config STM32L4_TIM2_CHANNEL
+	int "TIM2 PWM Output Channel"
+	default 1
+	range 1 4
+	---help---
+		If TIM2 is enabled for PWM usage, you also need specifies the timer output
+		channel {1,..,4}
+
+config STM32L4_TIM2_CHMODE
+	int "TIM2 Channel Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+endif # !STM32L4_PWM_MULTICHAN
+
+endif # STM32L4_TIM2_PWM
+
+config STM32L4_TIM3_PWM
+	bool "TIM3 PWM"
+	default n
+	depends on STM32L4_TIM3
+	select PWM
+	select ARCH_HAVE_PWM_PULSECOUNT
+	---help---
+		Reserve timer 3 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If STM32L4_TIM3
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+if STM32L4_TIM3_PWM
+
+config STM32L4_TIM3_MODE
+	int "TIM3 Mode"
+	default 0
+	range 0 4
+	---help---
+		Specifies the timer mode.
+
+if STM32L4_PWM_MULTICHAN
+
+config STM32L4_TIM3_CHANNEL1
+	bool "TIM3 Channel 1"
+	default n
+	---help---
+		Enables channel 1.
+
+if STM32L4_TIM3_CHANNEL1
+
+config STM32L4_TIM3_CH1MODE
+	int "TIM3 Channel 1 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM3_CH1OUT
+	bool "TIM3 Channel 1 Output"
+	default n
+	---help---
+		Enables channel 1 output.
+
+endif # STM32L4_TIM3_CHANNEL1
+
+config STM32L4_TIM3_CHANNEL2
+	bool "TIM3 Channel 2"
+	default n
+	---help---
+		Enables channel 2.
+
+if STM32L4_TIM3_CHANNEL2
+
+config STM32L4_TIM3_CH2MODE
+	int "TIM3 Channel 2 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM3_CH2OUT
+	bool "TIM3 Channel 2 Output"
+	default n
+	---help---
+		Enables channel 2 output.
+
+endif # STM32L4_TIM3_CHANNEL2
+
+config STM32L4_TIM3_CHANNEL3
+	bool "TIM3 Channel 3"
+	default n
+	---help---
+		Enables channel 3.
+
+if STM32L4_TIM3_CHANNEL3
+
+config STM32L4_TIM3_CH3MODE
+	int "TIM3 Channel 3 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM3_CH3OUT
+	bool "TIM3 Channel 3 Output"
+	default n
+	---help---
+		Enables channel 3 output.
+
+endif # STM32L4_TIM3_CHANNEL3
+
+config STM32L4_TIM3_CHANNEL4
+	bool "TIM3 Channel 4"
+	default n
+	---help---
+		Enables channel 4.
+
+if STM32L4_TIM3_CHANNEL4
+
+config STM32L4_TIM3_CH4MODE
+	int "TIM3 Channel 4 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM3_CH4OUT
+	bool "TIM3 Channel 4 Output"
+	default n
+	---help---
+		Enables channel 4 output.
+
+endif # STM32L4_TIM3_CHANNEL4
+
+endif # STM32L4_PWM_MULTICHAN
+
+if !STM32L4_PWM_MULTICHAN
+
+config STM32L4_TIM3_CHANNEL
+	int "TIM3 PWM Output Channel"
+	default 1
+	range 1 4
+	---help---
+		If TIM3 is enabled for PWM usage, you also need specifies the timer output
+		channel {1,..,4}
+
+config STM32L4_TIM3_CHMODE
+	int "TIM3 Channel Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+endif # !STM32L4_PWM_MULTICHAN
+
+endif # STM32L4_TIM3_PWM
+
+config STM32L4_TIM4_PWM
+	bool "TIM4 PWM"
+	default n
+	depends on STM32L4_TIM4
+	select PWM
+	select ARCH_HAVE_PWM_PULSECOUNT
+	---help---
+		Reserve timer 4 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If STM32L4_TIM4
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+if STM32L4_TIM4_PWM
+
+config STM32L4_TIM4_MODE
+	int "TIM4 Mode"
+	default 0
+	range 0 4
+	---help---
+		Specifies the timer mode.
+
+if STM32L4_PWM_MULTICHAN
+
+config STM32L4_TIM4_CHANNEL1
+	bool "TIM4 Channel 1"
+	default n
+	---help---
+		Enables channel 1.
+
+if STM32L4_TIM4_CHANNEL1
+
+config STM32L4_TIM4_CH1MODE
+	int "TIM4 Channel 1 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM4_CH1OUT
+	bool "TIM4 Channel 1 Output"
+	default n
+	---help---
+		Enables channel 1 output.
+
+endif # STM32L4_TIM4_CHANNEL1
+
+config STM32L4_TIM4_CHANNEL2
+	bool "TIM4 Channel 2"
+	default n
+	---help---
+		Enables channel 2.
+
+if STM32L4_TIM4_CHANNEL2
+
+config STM32L4_TIM4_CH2MODE
+	int "TIM4 Channel 2 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM4_CH2OUT
+	bool "TIM4 Channel 2 Output"
+	default n
+	---help---
+		Enables channel 2 output.
+
+endif # STM32L4_TIM4_CHANNEL2
+
+config STM32L4_TIM4_CHANNEL3
+	bool "TIM4 Channel 3"
+	default n
+	---help---
+		Enables channel 3.
+
+if STM32L4_TIM4_CHANNEL3
+
+config STM32L4_TIM4_CH3MODE
+	int "TIM4 Channel 3 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM4_CH3OUT
+	bool "TIM4 Channel 3 Output"
+	default n
+	---help---
+		Enables channel 3 output.
+
+endif # STM32L4_TIM4_CHANNEL3
+
+config STM32L4_TIM4_CHANNEL4
+	bool "TIM4 Channel 4"
+	default n
+	---help---
+		Enables channel 4.
+
+if STM32L4_TIM4_CHANNEL4
+
+config STM32L4_TIM4_CH4MODE
+	int "TIM4 Channel 4 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM4_CH4OUT
+	bool "TIM4 Channel 4 Output"
+	default n
+	---help---
+		Enables channel 4 output.
+
+endif # STM32L4_TIM4_CHANNEL4
+
+endif # STM32L4_PWM_MULTICHAN
+
+if !STM32L4_PWM_MULTICHAN
+
+config STM32L4_TIM4_CHANNEL
+	int "TIM4 PWM Output Channel"
+	default 1
+	range 1 4
+	---help---
+		If TIM4 is enabled for PWM usage, you also need specifies the timer output
+		channel {1,..,4}
+
+config STM32L4_TIM4_CHMODE
+	int "TIM4 Channel Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+endif # !STM32L4_PWM_MULTICHAN
+
+endif # STM32L4_TIM4_PWM
+
+config STM32L4_TIM5_PWM
+	bool "TIM5 PWM"
+	default n
+	depends on STM32L4_TIM5
+	select PWM
+	select ARCH_HAVE_PWM_PULSECOUNT
+	---help---
+		Reserve timer 5 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If STM32L4_TIM5
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+if STM32L4_TIM5_PWM
+
+config STM32L4_TIM5_MODE
+	int "TIM5 Mode"
+	default 0
+	range 0 4
+	---help---
+		Specifies the timer mode.
+
+if STM32L4_PWM_MULTICHAN
+
+config STM32L4_TIM5_CHANNEL1
+	bool "TIM5 Channel 1"
+	default n
+	---help---
+		Enables channel 1.
+
+if STM32L4_TIM5_CHANNEL1
+
+config STM32L4_TIM5_CH1MODE
+	int "TIM5 Channel 1 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM5_CH1OUT
+	bool "TIM5 Channel 1 Output"
+	default n
+	---help---
+		Enables channel 1 output.
+
+endif # STM32L4_TIM5_CHANNEL1
+
+config STM32L4_TIM5_CHANNEL2
+	bool "TIM5 Channel 2"
+	default n
+	---help---
+		Enables channel 2.
+
+if STM32L4_TIM5_CHANNEL2
+
+config STM32L4_TIM5_CH2MODE
+	int "TIM5 Channel 2 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM5_CH2OUT
+	bool "TIM5 Channel 2 Output"
+	default n
+	---help---
+		Enables channel 2 output.
+
+endif # STM32L4_TIM5_CHANNEL2
+
+config STM32L4_TIM5_CHANNEL3
+	bool "TIM5 Channel 3"
+	default n
+	---help---
+		Enables channel 3.
+
+if STM32L4_TIM5_CHANNEL3
+
+config STM32L4_TIM5_CH3MODE
+	int "TIM5 Channel 3 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM5_CH3OUT
+	bool "TIM5 Channel 3 Output"
+	default n
+	---help---
+		Enables channel 3 output.
+
+endif # STM32L4_TIM5_CHANNEL3
+
+config STM32L4_TIM5_CHANNEL4
+	bool "TIM5 Channel 4"
+	default n
+	---help---
+		Enables channel 4.
+
+if STM32L4_TIM5_CHANNEL4
+
+config STM32L4_TIM5_CH4MODE
+	int "TIM5 Channel 4 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM5_CH4OUT
+	bool "TIM5 Channel 4 Output"
+	default n
+	---help---
+		Enables channel 4 output.
+
+endif # STM32L4_TIM5_CHANNEL4
+
+endif # STM32L4_PWM_MULTICHAN
+
+if !STM32L4_PWM_MULTICHAN
+
+config STM32L4_TIM5_CHANNEL
+	int "TIM5 PWM Output Channel"
+	default 1
+	range 1 4
+	---help---
+		If TIM5 is enabled for PWM usage, you also need specifies the timer output
+		channel {1,..,4}
+
+config STM32L4_TIM5_CHMODE
+	int "TIM5 Channel Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+endif # !STM32L4_PWM_MULTICHAN
+
+endif # STM32L4_TIM5_PWM
+
+config STM32L4_TIM8_PWM
+	bool "TIM8 PWM"
+	default n
+	depends on STM32L4_TIM8
+	select PWM
+	select ARCH_HAVE_PWM_PULSECOUNT
+	---help---
+		Reserve timer 8 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If STM32L4_TIM8
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+if STM32L4_TIM8_PWM
+
+config STM32L4_TIM8_MODE
+	int "TIM8 Mode"
+	default 0
+	range 0 4
+	---help---
+		Specifies the timer mode.
+
+if STM32L4_PWM_MULTICHAN
+
+config STM32L4_TIM8_CHANNEL1
+	bool "TIM8 Channel 1"
+	default n
+	---help---
+		Enables channel 1.
+
+if STM32L4_TIM8_CHANNEL1
+
+config STM32L4_TIM8_CH1MODE
+	int "TIM8 Channel 1 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM8_CH1OUT
+	bool "TIM8 Channel 1 Output"
+	default n
+	---help---
+		Enables channel 1 output.
+
+config STM32L4_TIM8_CH1NOUT
+	bool "TIM8 Channel 1 Complementary Output"
+	default n
+	depends on STM32L4_TIM8_CH1OUT
+	---help---
+		Enables channel 1 complementary output.
+
+endif # STM32L4_TIM8_CHANNEL1
+
+config STM32L4_TIM8_CHANNEL2
+	bool "TIM8 Channel 2"
+	default n
+	---help---
+		Enables channel 2.
+
+if STM32L4_TIM8_CHANNEL2
+
+config STM32L4_TIM8_CH2MODE
+	int "TIM8 Channel 2 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM8_CH2OUT
+	bool "TIM8 Channel 2 Output"
+	default n
+	---help---
+		Enables channel 2 output.
+
+config STM32L4_TIM8_CH2NOUT
+	bool "TIM8 Channel 2 Complementary Output"
+	default n
+	depends on STM32L4_TIM8_CH2OUT
+	---help---
+		Enables channel 2 complementary output.
+
+endif # STM32L4_TIM8_CHANNEL2
+
+config STM32L4_TIM8_CHANNEL3
+	bool "TIM8 Channel 3"
+	default n
+	---help---
+		Enables channel 3.
+
+if STM32L4_TIM8_CHANNEL3
+
+config STM32L4_TIM8_CH3MODE
+	int "TIM8 Channel 3 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM8_CH3OUT
+	bool "TIM8 Channel 3 Output"
+	default n
+	---help---
+		Enables channel 3 output.
+
+config STM32L4_TIM8_CH3NOUT
+	bool "TIM8 Channel 3 Complementary Output"
+	default n
+	depends on STM32L4_TIM8_CH3OUT
+	---help---
+		Enables channel 3 complementary output.
+
+endif # STM32L4_TIM8_CHANNEL3
+
+config STM32L4_TIM8_CHANNEL4
+	bool "TIM8 Channel 4"
+	default n
+	---help---
+		Enables channel 4.
+
+if STM32L4_TIM8_CHANNEL4
+
+config STM32L4_TIM8_CH4MODE
+	int "TIM8 Channel 4 Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM8_CH4OUT
+	bool "TIM8 Channel 4 Output"
+	default n
+	---help---
+		Enables channel 4 output.
+
+endif # STM32L4_TIM8_CHANNEL4
+
+endif # STM32L4_PWM_MULTICHAN
+
+if !STM32L4_PWM_MULTICHAN
+
+config STM32L4_TIM8_CHANNEL
+	int "TIM8 PWM Output Channel"
+	default 1
+	range 1 4
+	---help---
+		If TIM8 is enabled for PWM usage, you also need specifies the timer output
+		channel {1,..,4}
+
+config STM32L4_TIM8_CHMODE
+	int "TIM8 Channel Mode"
+	default 0
+	range 0 5
+	---help---
+		Specifies the channel mode.
+
+endif # !STM32L4_PWM_MULTICHAN
+
+endif # STM32L4_TIM8_PWM
+
+config STM32L4_TIM15_PWM
+	bool "TIM15 PWM"
+	default n
+	depends on STM32L4_TIM15
+	select PWM
+	---help---
+		Reserve timer 15 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If STM32L4_TIM15
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+if STM32L4_TIM15_PWM
+
+if STM32L4_PWM_MULTICHAN
+
+config STM32L4_TIM15_CHANNEL1
+	bool "TIM15 Channel 1"
+	default n
+	---help---
+		Enables channel 1.
+
+if STM32L4_TIM15_CHANNEL1
+
+config STM32L4_TIM15_CH1MODE
+	int "TIM15 Channel 1 Mode"
+	default 0
+	range 0 3
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM15_CH1OUT
+	bool "TIM15 Channel 1 Output"
+	default n
+	---help---
+		Enables channel 1 output.
+
+config STM32L4_TIM15_CH1NOUT
+	bool "TIM15 Channel 1 Complementary Output"
+	default n
+	depends on STM32L4_TIM15_CH1OUT
+	---help---
+		Enables channel 1 complementary output.
+
+endif # STM32L4_TIM15_CHANNEL1
+
+config STM32L4_TIM15_CHANNEL2
+	bool "TIM15 Channel 2"
+	default n
+	---help---
+		Enables channel 2.
+
+if STM32L4_TIM15_CHANNEL2
+
+config STM32L4_TIM15_CH2MODE
+	int "TIM15 Channel 2 Mode"
+	default 0
+	range 0 3
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM15_CH2OUT
+	bool "TIM15 Channel 2 Output"
+	default n
+	---help---
+		Enables channel 2 output.
+
+endif # STM32L4_TIM15_CHANNEL2
+
+endif # STM32L4_PWM_MULTICHAN
+
+if !STM32L4_PWM_MULTICHAN
+
+config STM32L4_TIM15_CHANNEL
+	int "TIM15 PWM Output Channel"
+	default 1
+	range 1 2
+	---help---
+		If TIM15 is enabled for PWM usage, you also need specifies the timer output
+		channel {1,2}
+
+config STM32L4_TIM15_CHMODE
+	int "TIM15 Channel Mode"
+	default 0
+	range 0 3
+	---help---
+		Specifies the channel mode.
+
+endif # !STM32L4_PWM_MULTICHAN
+
+endif # STM32L4_TIM15_PWM
+
+config STM32L4_TIM16_PWM
+	bool "TIM16 PWM"
+	default n
+	depends on STM32L4_TIM16
+	select PWM
+	---help---
+		Reserve timer 16 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If STM32L4_TIM16
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+if STM32L4_TIM16_PWM
+
+if STM32L4_PWM_MULTICHAN
+
+config STM32L4_TIM16_CHANNEL1
+	bool "TIM16 Channel 1"
+	default n
+	---help---
+		Enables channel 1.
+
+if STM32L4_TIM16_CHANNEL1
+
+config STM32L4_TIM16_CH1MODE
+	int "TIM16 Channel 1 Mode"
+	default 0
+	range 0 1
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM16_CH1OUT
+	bool "TIM16 Channel 1 Output"
+	default n
+	---help---
+		Enables channel 1 output.
+
+config STM32L4_TIM16_CH1NOUT
+	bool "TIM16 Channel 1 Complementary Output"
+	default n
+	depends on STM32L4_TIM16_CH1OUT
+	---help---
+		Enables channel 1 complementary output.
+
+endif # STM32L4_TIM16_CHANNEL1
+
+endif # STM32L4_PWM_MULTICHAN
+
+if !STM32L4_PWM_MULTICHAN
+
+config STM32L4_TIM16_CHANNEL
+	int "TIM16 PWM Output Channel"
+	default 1
+	range 1 1
+	---help---
+		If TIM16 is enabled for PWM usage, you also need specifies the timer output
+		channel {1}
+
+config STM32L4_TIM16_CHMODE
+	int "TIM16 Channel Mode"
+	default 0
+	range 0 1
+	---help---
+		Specifies the channel mode.
+
+endif # !STM32L4_PWM_MULTICHAN
+
+endif # STM32L4_TIM16_PWM
+
+config STM32L4_TIM17_PWM
+	bool "TIM17 PWM"
+	default n
+	depends on STM32L4_TIM17
+	select PWM
+	---help---
+		Reserve timer 17 for use by PWM
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to generate modulated outputs for such things as motor control.  If STM32L4_TIM17
+		is defined then THIS following may also be defined to indicate that
+		the timer is intended to be used for pulsed output modulation.
+
+if STM32L4_TIM17_PWM
+
+if STM32L4_PWM_MULTICHAN
+
+config STM32L4_TIM17_CHANNEL1
+	bool "TIM17 Channel 1"
+	default n
+	---help---
+		Enables channel 1.
+
+if STM32L4_TIM17_CHANNEL1
+
+config STM32L4_TIM17_CH1MODE
+	int "TIM17 Channel 1 Mode"
+	default 0
+	range 0 1
+	---help---
+		Specifies the channel mode.
+
+config STM32L4_TIM17_CH1OUT
+	bool "TIM17 Channel 1 Output"
+	default n
+	---help---
+		Enables channel 1 output.
+
+config STM32L4_TIM17_CH1NOUT
+	bool "TIM17 Channel 1 Complementary Output"
+	default n
+	depends on STM32L4_TIM17_CH1OUT
+	---help---
+		Enables channel 1 complementary output.
+
+endif # STM32L4_TIM17_CHANNEL1
+
+endif # STM32L4_PWM_MULTICHAN
+
+if !STM32L4_PWM_MULTICHAN
+
+config STM32L4_TIM17_CHANNEL
+	int "TIM17 PWM Output Channel"
+	default 1
+	range 1 1
+	---help---
+		If TIM17 is enabled for PWM usage, you also need specifies the timer output
+		channel {1}
+
+config STM32L4_TIM17_CHMODE
+	int "TIM17 Channel Mode"
+	default 0
+	range 0 1
+	---help---
+		Specifies the channel mode.
+
+endif # !STM32L4_PWM_MULTICHAN
+
+endif # STM32L4_TIM17_PWM
+
+config STM32L4_PWM_MULTICHAN
+	bool "PWM Multiple Output Channels"
+	default n
+	depends on STM32L4_TIM1_PWM || STM32L4_TIM2_PWM || STM32L4_TIM3_PWM || STM32L4_TIM4_PWM || STM32L4_TIM5_PWM || STM32L4_TIM8_PWM || STM32L4_TIM15_PWM || STM32L4_TIM16_PWM || STM32L4_TIM17_PWM
+	select ARCH_HAVE_PWM_MULTICHAN
+	---help---
+		Specifies that the PWM driver supports multiple output
+		channels per timer.
+
+config STM32L4_TIM1_ADC
+	bool "TIM1 ADC"
+	default n
+	depends on STM32L4_TIM1 && STM32L4_ADC
+	---help---
+		Reserve timer 1 for use by ADC
+
+		Timer devices may be used for different purposes.  If STM32L4_TIM1 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for ADC conversion. Note that ADC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the ADC, but then you also have to configure which ADC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM1 ADC channel"
+	default STM32L4_TIM1_ADC1
+	depends on STM32L4_TIM1_ADC
+
+config STM32L4_TIM1_ADC1
+	bool "TIM1 ADC channel 1"
+	depends on STM32L4_ADC1
+	select HAVE_ADC1_TIMER
+	---help---
+		Reserve TIM1 to trigger ADC1
+
+config STM32L4_TIM1_ADC2
+	bool "TIM1 ADC channel 2"
+	depends on STM32L4_ADC2
+	select HAVE_ADC2_TIMER
+	---help---
+		Reserve TIM1 to trigger ADC2
+
+config STM32L4_TIM1_ADC3
+	bool "TIM1 ADC channel 3"
+	depends on STM32L4_ADC3
+	select HAVE_ADC3_TIMER
+	---help---
+		Reserve TIM1 to trigger ADC3
+
+endchoice
+
+config STM32L4_TIM2_ADC
+	bool "TIM2 ADC"
+	default n
+	depends on STM32L4_TIM2 && STM32L4_ADC
+	---help---
+		Reserve timer 1 for use by ADC
+
+		Timer devices may be used for different purposes.  If STM32L4_TIM2 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for ADC conversion. Note that ADC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the ADC, but then you also have to configure which ADC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM2 ADC channel"
+	default STM32L4_TIM2_ADC1
+	depends on STM32L4_TIM2_ADC
+
+config STM32L4_TIM2_ADC1
+	bool "TIM2 ADC channel 1"
+	depends on STM32L4_ADC1
+	select HAVE_ADC1_TIMER
+	---help---
+		Reserve TIM2 to trigger ADC1
+
+config STM32L4_TIM2_ADC2
+	bool "TIM2 ADC channel 2"
+	depends on STM32L4_ADC2
+	select HAVE_ADC2_TIMER
+	---help---
+		Reserve TIM2 to trigger ADC2
+
+config STM32L4_TIM2_ADC3
+	bool "TIM2 ADC channel 3"
+	depends on STM32L4_ADC3
+	select HAVE_ADC3_TIMER
+	---help---
+		Reserve TIM2 to trigger ADC3
+
+endchoice
+
+config STM32L4_TIM3_ADC
+	bool "TIM3 ADC"
+	default n
+	depends on STM32L4_TIM3 && STM32L4_ADC
+	---help---
+		Reserve timer 1 for use by ADC
+
+		Timer devices may be used for different purposes.  If STM32L4_TIM3 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for ADC conversion. Note that ADC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the ADC, but then you also have to configure which ADC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM3 ADC channel"
+	default STM32L4_TIM3_ADC1
+	depends on STM32L4_TIM3_ADC
+
+config STM32L4_TIM3_ADC1
+	bool "TIM3 ADC channel 1"
+	depends on STM32L4_ADC1
+	select HAVE_ADC1_TIMER
+	---help---
+		Reserve TIM3 to trigger ADC1
+
+config STM32L4_TIM3_ADC2
+	bool "TIM3 ADC channel 2"
+	depends on STM32L4_ADC2
+	select HAVE_ADC2_TIMER
+	---help---
+		Reserve TIM3 to trigger ADC2
+
+config STM32L4_TIM3_ADC3
+	bool "TIM3 ADC channel 3"
+	depends on STM32L4_ADC3
+	select HAVE_ADC3_TIMER
+	---help---
+		Reserve TIM3 to trigger ADC3
+
+endchoice
+
+config STM32L4_TIM4_ADC
+	bool "TIM4 ADC"
+	default n
+	depends on STM32L4_TIM4 && STM32L4_ADC
+	---help---
+		Reserve timer 1 for use by ADC
+
+		Timer devices may be used for different purposes.  If STM32L4_TIM4 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for ADC conversion. Note that ADC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the ADC, but then you also have to configure which ADC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM4 ADC channel"
+	default STM32L4_TIM4_ADC1
+	depends on STM32L4_TIM4_ADC
+
+config STM32L4_TIM4_ADC1
+	bool "TIM4 ADC channel 1"
+	depends on STM32L4_ADC1
+	select HAVE_ADC1_TIMER
+	---help---
+		Reserve TIM4 to trigger ADC1
+
+config STM32L4_TIM4_ADC2
+	bool "TIM4 ADC channel 2"
+	depends on STM32L4_ADC2
+	select HAVE_ADC2_TIMER
+	---help---
+		Reserve TIM4 to trigger ADC2
+
+config STM32L4_TIM4_ADC3
+	bool "TIM4 ADC channel 3"
+	depends on STM32L4_ADC3
+	select HAVE_ADC3_TIMER
+	---help---
+		Reserve TIM4 to trigger ADC3
+
+endchoice
+
+config STM32L4_TIM5_ADC
+	bool "TIM5 ADC"
+	default n
+	depends on STM32L4_TIM5 && STM32L4_ADC
+	---help---
+		Reserve timer 1 for use by ADC
+
+		Timer devices may be used for different purposes.  If STM32L4_TIM5 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for ADC conversion. Note that ADC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the ADC, but then you also have to configure which ADC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM5 ADC channel"
+	default STM32L4_TIM5_ADC1
+	depends on STM32L4_TIM5_ADC
+
+config STM32L4_TIM5_ADC1
+	bool "TIM5 ADC channel 1"
+	depends on STM32L4_ADC1
+	select HAVE_ADC1_TIMER
+	---help---
+		Reserve TIM5 to trigger ADC1
+
+config STM32L4_TIM5_ADC2
+	bool "TIM5 ADC channel 2"
+	depends on STM32L4_ADC2
+	select HAVE_ADC2_TIMER
+	---help---
+		Reserve TIM5 to trigger ADC2
+
+config STM32L4_TIM5_ADC3
+	bool "TIM5 ADC channel 3"
+	depends on STM32L4_ADC3
+	select HAVE_ADC3_TIMER
+	---help---
+		Reserve TIM5 to trigger ADC3
+
+endchoice
+
+config STM32L4_TIM8_ADC
+	bool "TIM8 ADC"
+	default n
+	depends on STM32L4_TIM8 && STM32L4_ADC
+	---help---
+		Reserve timer 1 for use by ADC
+
+		Timer devices may be used for different purposes.  If STM32L4_TIM8 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for ADC conversion. Note that ADC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the ADC, but then you also have to configure which ADC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM8 ADC channel"
+	default STM32L4_TIM8_ADC1
+	depends on STM32L4_TIM8_ADC
+
+config STM32L4_TIM8_ADC1
+	bool "TIM8 ADC channel 1"
+	depends on STM32L4_ADC1
+	select HAVE_ADC1_TIMER
+	---help---
+		Reserve TIM8 to trigger ADC1
+
+config STM32L4_TIM8_ADC2
+	bool "TIM8 ADC channel 2"
+	depends on STM32L4_ADC2
+	select HAVE_ADC2_TIMER
+	---help---
+		Reserve TIM8 to trigger ADC2
+
+config STM32L4_TIM8_ADC3
+	bool "TIM8 ADC channel 3"
+	depends on STM32L4_ADC3
+	select HAVE_ADC3_TIMER
+	---help---
+		Reserve TIM8 to trigger ADC3
+
+endchoice
+
+config HAVE_ADC1_TIMER
+	bool
+
+config HAVE_ADC2_TIMER
+	bool
+
+config HAVE_ADC3_TIMER
+	bool
+
+config STM32L4_ADC1_SAMPLE_FREQUENCY
+	int "ADC1 Sampling Frequency"
+	default 100
+	depends on HAVE_ADC1_TIMER
+	---help---
+		ADC1 sampling frequency.  Default:  100Hz
+
+config STM32L4_ADC1_TIMTRIG
+	int "ADC1 Timer Trigger"
+	default 0
+	range 0 4
+	depends on HAVE_ADC1_TIMER
+	---help---
+		Values 0:CC1 1:CC2 2:CC3 3:CC4 4:TRGO
+
+config STM32L4_ADC2_SAMPLE_FREQUENCY
+	int "ADC2 Sampling Frequency"
+	default 100
+	depends on HAVE_ADC2_TIMER
+	---help---
+		ADC2 sampling frequency.  Default:  100Hz
+
+config STM32L4_ADC2_TIMTRIG
+	int "ADC2 Timer Trigger"
+	default 0
+	range 0 4
+	depends on HAVE_ADC2_TIMER
+	---help---
+		Values 0:CC1 1:CC2 2:CC3 3:CC4 4:TRGO
+
+config STM32L4_ADC3_SAMPLE_FREQUENCY
+	int "ADC3 Sampling Frequency"
+	default 100
+	depends on HAVE_ADC3_TIMER
+	---help---
+		ADC3 sampling frequency.  Default:  100Hz
+
+config STM32L4_ADC3_TIMTRIG
+	int "ADC3 Timer Trigger"
+	default 0
+	range 0 4
+	depends on HAVE_ADC3_TIMER
+	---help---
+		Values 0:CC1 1:CC2 2:CC3 3:CC4 4:TRGO
+
+config STM32L4_TIM1_DAC
+	bool "TIM1 DAC"
+	default n
+	depends on STM32L4_TIM1 && STM32L4_DAC
+	---help---
+		Reserve timer 1 for use by DAC
+
+		Timer devices may be used for different purposes.  If STM32L4_TIM1 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM1 DAC channel"
+	default STM32L4_TIM1_DAC1
+	depends on STM32L4_TIM1_DAC
+
+config STM32L4_TIM1_DAC1
+	bool "TIM1 DAC channel 1"
+	---help---
+		Reserve TIM1 to trigger DAC1
+
+config STM32L4_TIM1_DAC2
+	bool "TIM1 DAC channel 2"
+	---help---
+		Reserve TIM1 to trigger DAC2
+
+endchoice
+
+config STM32L4_TIM2_DAC
+	bool "TIM2 DAC"
+	default n
+	depends on STM32L4_TIM2 && STM32L4_DAC
+	---help---
+		Reserve timer 2 for use by DAC
+
+		Timer devices may be used for different purposes.  If STM32L4_TIM2 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM2 DAC channel"
+	default STM32L4_TIM2_DAC1
+	depends on STM32L4_TIM2_DAC
+
+config STM32L4_TIM2_DAC1
+	bool "TIM2 DAC channel 1"
+	---help---
+		Reserve TIM2 to trigger DAC1
+
+config STM32L4_TIM2_DAC2
+	bool "TIM2 DAC channel 2"
+	---help---
+		Reserve TIM2 to trigger DAC2
+
+endchoice
+
+config STM32L4_TIM3_DAC
+	bool "TIM3 DAC"
+	default n
+	depends on STM32L4_TIM3 && STM32L4_DAC
+	---help---
+		Reserve timer 3 for use by DAC
+
+		Timer devices may be used for different purposes.  If STM32L4_TIM3 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM3 DAC channel"
+	default STM32L4_TIM3_DAC1
+	depends on STM32L4_TIM3_DAC
+
+config STM32L4_TIM3_DAC1
+	bool "TIM3 DAC channel 1"
+	---help---
+		Reserve TIM3 to trigger DAC1
+
+config STM32L4_TIM3_DAC2
+	bool "TIM3 DAC channel 2"
+	---help---
+		Reserve TIM3 to trigger DAC2
+
+endchoice
+
+config STM32L4_TIM4_DAC
+	bool "TIM4 DAC"
+	default n
+	depends on STM32L4_TIM4 && STM32L4_DAC
+	---help---
+		Reserve timer 4 for use by DAC
+
+		Timer devices may be used for different purposes.  If STM32L4_TIM4 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM4 DAC channel"
+	default STM32L4_TIM4_DAC1
+	depends on STM32L4_TIM4_DAC
+
+config STM32L4_TIM4_DAC1
+	bool "TIM4 DAC channel 1"
+	---help---
+		Reserve TIM4 to trigger DAC1
+
+config STM32L4_TIM4_DAC2
+	bool "TIM4 DAC channel 2"
+	---help---
+		Reserve TIM4 to trigger DAC2
+
+endchoice
+
+config STM32L4_TIM5_DAC
+	bool "TIM5 DAC"
+	default n
+	depends on STM32L4_TIM5 && STM32L4_DAC
+	---help---
+		Reserve timer 5 for use by DAC
+
+		Timer devices may be used for different purposes.  If STM32L4_TIM5 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM5 DAC channel"
+	default STM32L4_TIM5_DAC1
+	depends on STM32L4_TIM5_DAC
+
+config STM32L4_TIM5_DAC1
+	bool "TIM5 DAC channel 1"
+	---help---
+		Reserve TIM5 to trigger DAC1
+
+config STM32L4_TIM5_DAC2
+	bool "TIM5 DAC channel 2"
+	---help---
+		Reserve TIM5 to trigger DAC2
+
+endchoice
+
+config STM32L4_TIM6_DAC
+	bool "TIM6 DAC"
+	default n
+	depends on STM32L4_TIM6 && STM32L4_DAC
+	---help---
+		Reserve timer 6 for use by DAC
+
+		Timer devices may be used for different purposes.  If STM32L4_TIM6 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM6 DAC channel"
+	default STM32L4_TIM6_DAC1
+	depends on STM32L4_TIM6_DAC
+
+config STM32L4_TIM6_DAC1
+	bool "TIM6 DAC channel 1"
+	---help---
+		Reserve TIM6 to trigger DAC1
+
+config STM32L4_TIM6_DAC2
+	bool "TIM6 DAC channel 2"
+	---help---
+		Reserve TIM6 to trigger DAC2
+
+endchoice
+
+config STM32L4_TIM7_DAC
+	bool "TIM7 DAC"
+	default n
+	depends on STM32L4_TIM7 && STM32L4_DAC
+	---help---
+		Reserve timer 7 for use by DAC
+
+		Timer devices may be used for different purposes.  If STM32L4_TIM7 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM7 DAC channel"
+	default STM32L4_TIM7_DAC1
+	depends on STM32L4_TIM7_DAC
+
+config STM32L4_TIM7_DAC1
+	bool "TIM7 DAC channel 1"
+	---help---
+		Reserve TIM7 to trigger DAC1
+
+config STM32L4_TIM7_DAC2
+	bool "TIM7 DAC channel 2"
+	---help---
+		Reserve TIM7 to trigger DAC2
+
+endchoice
+
+config STM32L4_TIM8_DAC
+	bool "TIM8 DAC"
+	default n
+	depends on STM32L4_TIM8 && STM32L4_DAC
+	---help---
+		Reserve timer 8 for use by DAC
+
+		Timer devices may be used for different purposes.  If STM32L4_TIM8 is
+		defined then the following may also be defined to indicate that the
+		timer is intended to be used for DAC conversion. Note that DAC usage
+		requires two definition:  Not only do you have to assign the timer
+		for used by the DAC, but then you also have to configure which DAC
+		channel it is assigned to.
+
+choice
+	prompt "Select TIM8 DAC channel"
+	default STM32L4_TIM8_DAC1
+	depends on STM32L4_TIM8_DAC
+
+config STM32L4_TIM8_DAC1
+	bool "TIM8 DAC channel 1"
+	---help---
+		Reserve TIM8 to trigger DAC1
+
+config STM32L4_TIM8_DAC2
+	bool "TIM8 DAC channel 2"
+	---help---
+		Reserve TIM8 to trigger DAC2
+
+endchoice
+
+config STM32L4_TIM1_CAP
+	bool "TIM1 Capture"
+	default n
+	depends on STM32L4_HAVE_TIM1
+	---help---
+		Reserve timer 1 for use by Capture
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to capture input.
+
+config STM32L4_TIM2_CAP
+	bool "TIM2 Capture"
+	default n
+	depends on STM32L4_HAVE_TIM2
+	---help---
+		Reserve timer 2 for use by Capture
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to capture input.
+
+config STM32L4_TIM3_CAP
+	bool "TIM3 Capture"
+	default n
+	depends on STM32L4_HAVE_TIM3
+	---help---
+		Reserve timer 3 for use by Capture
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to capture input.
+
+config STM32L4_TIM4_CAP
+	bool "TIM4 Capture"
+	default n
+	depends on STM32L4_HAVE_TIM4
+	---help---
+		Reserve timer 4 for use by Capture
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to capture input.
+
+config STM32L4_TIM5_CAP
+	bool "TIM5 Capture"
+	default n
+	depends on STM32L4_HAVE_TIM5
+	---help---
+		Reserve timer 5 for use by Capture
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to capture input.
+
+config STM32L4_TIM8_CAP
+	bool "TIM8 Capture"
+	default n
+	depends on STM32L4_HAVE_TIM8
+	---help---
+		Reserve timer 8 for use by Capture
+
+		Timer devices may be used for different purposes.  One special purpose is
+		to capture input.
+
+endmenu # Timer Configuration
+
+menu "ADC Configuration"
+	depends on STM32L4_ADC
+
+config STM32L4_ADC1_DMA
+	bool "ADC1 DMA"
+	depends on STM32L4_ADC1 && STM32L4_HAVE_ADC1_DMA
+	default n
+	---help---
+		If DMA is selected, then the ADC may be configured to support
+		DMA transfer, which is necessary if multiple channels are read
+		or if very high trigger frequencies are used.
+
+config STM32L4_ADC2_DMA
+	bool "ADC2 DMA"
+	depends on STM32L4_ADC2 && STM32L4_HAVE_ADC2_DMA
+	default n
+	---help---
+		If DMA is selected, then the ADC may be configured to support
+		DMA transfer, which is necessary if multiple channels are read
+		or if very high trigger frequencies are used.
+
+config STM32L4_ADC3_DMA
+	bool "ADC3 DMA"
+	depends on STM32L4_ADC3 && STM32L4_HAVE_ADC3_DMA
+	default n
+	---help---
+		If DMA is selected, then the ADC may be configured to support
+		DMA transfer, which is necessary if multiple channels are read
+		or if very high trigger frequencies are used.
+
+endmenu
+
+menu "DAC Configuration"
+	depends on STM32L4_DAC1 || STM32L4_DAC2
+
+config STM32L4_DAC1_DMA
+	bool "DAC1 DMA"
+	depends on STM32L4_DAC1
+	default n
+	---help---
+		If DMA is selected, then a timer and output frequency must also be
+		provided to support the DMA transfer.  The DMA transfer could be
+		supported by and EXTI trigger, but this feature is not currently
+		supported by the driver.
+
+if STM32L4_DAC1_DMA
+
+config STM32L4_DAC1_TIMER
+	int "DAC1 timer"
+	range 2 8
+
+config STM32L4_DAC1_TIMER_FREQUENCY
+	int "DAC1 timer frequency"
+	default 0
+
+endif
+
+config STM32L4_DAC2_DMA
+	bool "DAC2 DMA"
+	depends on STM32L4_DAC2
+	default n
+	---help---
+		If DMA is selected, then a timer and output frequency must also be
+		provided to support the DMA transfer.  The DMA transfer could be
+		supported by and EXTI trigger, but this feature is not currently
+		supported by the driver.
+
+if STM32L4_DAC2_DMA
+
+config STM32L4_DAC2_TIMER
+	int "DAC2 timer"
+	default 0
+	range 2 8
+
+config STM32L4_DAC2_TIMER_FREQUENCY
+	int "DAC2 timer frequency"
+	default 0
+
+endif
+
+config STM32L4_DAC_DMA_BUFFER_SIZE
+	int "DAC DMA buffer size"
+	default 256
+
+endmenu
+
+config STM32L4_HAVE_USART1
+	bool
+	default n
+
+config STM32L4_HAVE_USART2
+	bool
+	default n
+
+config STM32L4_HAVE_USART3
+	bool
+	default n
+
+config STM32L4_HAVE_UART4
+	bool
+	default n
+
+config STM32L4_HAVE_UART5
+	bool
+	default n
+
+menu "U[S]ART Configuration"
+	depends on STM32L4_USART
+
+config USART1_RS485
+	bool "RS-485 on USART1"
+	default n
+	depends on STM32L4_USART1
+	---help---
+		Enable RS-485 interface on USART1. Your board config will have to
+		provide GPIO_USART1_RS485_DIR pin definition. Currently it cannot be
+		used with USART1_RXDMA.
+
+config USART1_RS485_DIR_POLARITY
+	int "USART1 RS-485 DIR pin polarity"
+	default 1
+	range 0 1
+	depends on USART1_RS485
+	---help---
+		Polarity of DIR pin for RS-485 on USART1. Set to state on DIR pin which
+		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
+config USART1_RXDMA
+	bool "USART1 Rx DMA"
+	default n
+	depends on STM32L4_USART1 && ( STM32L4_DMA1 || STM32L4_DMA2 )
+	---help---
+		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+
+config USART2_RS485
+	bool "RS-485 on USART2"
+	default n
+	depends on STM32L4_USART2
+	---help---
+		Enable RS-485 interface on USART2. Your board config will have to
+		provide GPIO_USART2_RS485_DIR pin definition. Currently it cannot be
+		used with USART2_RXDMA.
+
+config USART2_RS485_DIR_POLARITY
+	int "USART2 RS-485 DIR pin polarity"
+	default 1
+	range 0 1
+	depends on USART2_RS485
+	---help---
+		Polarity of DIR pin for RS-485 on USART2. Set to state on DIR pin which
+		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
+config USART2_RXDMA
+	bool "USART2 Rx DMA"
+	default n
+	depends on STM32L4_USART2 && STM32L4_DMA1
+	---help---
+		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+
+config USART3_RS485
+	bool "RS-485 on USART3"
+	default n
+	depends on STM32L4_USART3
+	---help---
+		Enable RS-485 interface on USART3. Your board config will have to
+		provide GPIO_USART3_RS485_DIR pin definition. Currently it cannot be
+		used with USART3_RXDMA.
+
+config USART3_RS485_DIR_POLARITY
+	int "USART3 RS-485 DIR pin polarity"
+	default 1
+	range 0 1
+	depends on USART3_RS485
+	---help---
+		Polarity of DIR pin for RS-485 on USART3. Set to state on DIR pin which
+		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
+config USART3_RXDMA
+	bool "USART3 Rx DMA"
+	default n
+	depends on STM32L4_USART3 && STM32L4_DMA1
+	---help---
+		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+
+config UART4_RS485
+	bool "RS-485 on UART4"
+	default n
+	depends on STM32L4_UART4
+	---help---
+		Enable RS-485 interface on UART4. Your board config will have to
+		provide GPIO_UART4_RS485_DIR pin definition. Currently it cannot be
+		used with UART4_RXDMA.
+
+config UART4_RS485_DIR_POLARITY
+	int "UART4 RS-485 DIR pin polarity"
+	default 1
+	range 0 1
+	depends on UART4_RS485
+	---help---
+		Polarity of DIR pin for RS-485 on UART4. Set to state on DIR pin which
+		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
+config UART4_RXDMA
+	bool "UART4 Rx DMA"
+	default n
+	depends on STM32L4_UART4 && STM32L4_DMA2
+	---help---
+		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+
+config UART5_RS485
+	bool "RS-485 on UART5"
+	default n
+	depends on STM32L4_UART5
+	---help---
+		Enable RS-485 interface on UART5. Your board config will have to
+		provide GPIO_UART5_RS485_DIR pin definition. Currently it cannot be
+		used with UART5_RXDMA.
+
+config UART5_RS485_DIR_POLARITY
+	int "UART5 RS-485 DIR pin polarity"
+	default 1
+	range 0 1
+	depends on UART5_RS485
+	---help---
+		Polarity of DIR pin for RS-485 on UART5. Set to state on DIR pin which
+		enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
+config UART5_RXDMA
+	bool "UART5 Rx DMA"
+	default n
+	depends on STM32L4_UART5 && STM32L4_DMA2
+	---help---
+		In high data rate usage, Rx DMA may eliminate Rx overrun errors
+
+config SERIAL_DISABLE_REORDERING
+	bool "Disable reordering of ttySx devices."
+	depends on STM32L4_USART1 || STM32L4_USART2 || STM32L4_USART3 || STM32L4_UART4 || STM32L4_UART5
+	default n
+	---help---
+		NuttX per default reorders the serial ports (/dev/ttySx) so that the
+		console is always on /dev/ttyS0. If more than one UART is in use this
+		can, however, have the side-effect that all port mappings
+		(hardware USART1 -> /dev/ttyS0) change if the console is moved to another
+		UART. This is in particular relevant if a project uses the USB console
+		in some configs and a serial console in other configs, but does not
+		want the side effect of having all serial port names change when just
+		the console is moved from serial to USB.
+
+config STM32L4_FLOWCONTROL_BROKEN
+	bool "Use Software UART RTS flow control"
+	depends on STM32L4_USART
+	default n
+	---help---
+		Enable UART RTS flow control using Software. Because STM
+		Current STM32 have broken HW based RTS behavior (they assert
+		nRTS after every byte received)  Enable this setting workaround
+		this issue by useing software based management of RTS
+
+config STM32L4_USART_BREAKS
+	bool "Add TIOxSBRK to support sending Breaks"
+	depends on STM32L4_USART
+	default n
+	---help---
+		Add TIOCxBRK routines to send a line break per the STM32 manual, the
+		break will be a pulse based on the value M. This is not a BSD compatible
+		break.
+
+config STM32L4_SERIALBRK_BSDCOMPAT
+	bool "Use GPIO To send Break"
+	depends on STM32L4_USART && STM32L4_USART_BREAKS
+	default n
+	---help---
+		Enable using GPIO on the TX pin to send a BSD compatible break:
+		TIOCSBRK will start the break and TIOCCBRK will end the break.
+		The current STM32 U[S]ARTS have no way to leave the break (TX=LOW)
+		on because the SW starts the break and then the HW automatically clears
+		the break. This makes it is difficult to sent a long break.
+
+endmenu # U[S]ART Configuration
+
+menu "SPI Configuration"
+	depends on STM32L4_SPI
+
+config STM32L4_SPI_INTERRUPTS
+	bool "Interrupt driver SPI"
+	default n
+	---help---
+		Select to enable interrupt driven SPI support. Non-interrupt-driven,
+		poll-waiting is recommended if the interrupt rate would be to high in
+		the interrupt driven case.
+
+config STM32L4_SPI_DMA
+	bool "SPI DMA"
+	default n
+	---help---
+		Use DMA to improve SPI transfer performance.  Cannot be used with STM32L4_SPI_INTERRUPT.
+
+endmenu
+
+menu "I2C Configuration"
+	depends on STM32L4_I2C
+
+config STM32L4_I2C_DYNTIMEO
+	bool "Use dynamic timeouts"
+	default n
+	depends on STM32L4_I2C
+
+config STM32L4_I2C_DYNTIMEO_USECPERBYTE
+	int "Timeout Microseconds per Byte"
+	default 500
+	depends on STM32L4_I2C_DYNTIMEO
+
+config STM32L4_I2C_DYNTIMEO_STARTSTOP
+	int "Timeout for Start/Stop (Milliseconds)"
+	default 1000
+	depends on STM32L4_I2C_DYNTIMEO
+
+config STM32L4_I2CTIMEOSEC
+	int "Timeout seconds"
+	default 0
+	depends on STM32L4_I2C
+
+config STM32L4_I2CTIMEOMS
+	int "Timeout Milliseconds"
+	default 500
+	depends on STM32L4_I2C && !STM32L4_I2C_DYNTIMEO
+
+config STM32L4_I2CTIMEOTICKS
+	int "Timeout for Done and Stop (ticks)"
+	default 500
+	depends on STM32L4_I2C && !STM32L4_I2C_DYNTIMEO
+
+config STM32L4_I2C_DUTY16_9
+	bool "Frequency with Tlow/Thigh = 16/9 "
+	default n
+	depends on STM32L4_I2C
+
+endmenu
+
+menu "CAN driver configuration"
+	depends on STM32L4_CAN1
+
+config CAN1_BAUD
+	int "CAN1 BAUD"
+	default 250000
+	depends on STM32L4_CAN1
+	---help---
+		CAN1 BAUD rate.  Required if CONFIG_STM32L4_CAN1 is defined.
+
+config CAN_TSEG1
+	int "TSEG1 quanta"
+	default 6
 	---help---
 		The number of CAN time quanta in segment 1. Default: 6
 
@@ -884,6 +2885,256 @@ config CAN_TSEG2
 	default 7
 	---help---
 		The number of CAN time quanta in segment 2. Default: 7
+
+config STM32L4_CAN_REGDEBUG
+	bool "CAN Register level debug"
+	depends on DEBUG_CAN_INFO
+	default n
+	---help---
+		Output detailed register-level CAN device debug information.
+		Requires also CONFIG_DEBUG_CAN_INFO.
+
+endmenu
+
+menu "QEncoder Driver"
+	depends on QENCODER
+	depends on STM32L4_TIM1 || STM32L4_TIM2 || STM32L4_TIM3 || STM32L4_TIM4 || STM32L4_TIM5 || STM32L4_TIM8
+
+config STM32L4_TIM1_QE
+	bool "TIM1"
+	default n
+	depends on STM32L4_TIM1
+	---help---
+		Reserve TIM1 for use by QEncoder.
+
+if STM32L4_TIM1_QE
+
+config STM32L4_TIM1_QEPSC
+	int "TIM1 pulse prescaler"
+	default 1
+	---help---
+		This prescaler divides the number of recorded encoder pulses, limiting the count rate at the expense of resolution.
+		Replaces the obscure "output clock of TIM1." (CONFIG_TIM1_QECLKOUT).
+
+endif
+
+config STM32L4_TIM2_QE
+	bool "TIM2"
+	default n
+	depends on STM32L4_TIM2
+	---help---
+		Reserve TIM2 for use by QEncoder.
+
+if STM32L4_TIM2_QE
+
+config STM32L4_TIM2_QEPSC
+	int "TIM2 pulse prescaler"
+	default 1
+	---help---
+		This prescaler divides the number of recorded encoder pulses, limiting the count rate at the expense of resolution.
+		Replaces the obscure "output clock of TIM2." (CONFIG_TIM2_QECLKOUT).
+
+endif
+
+config STM32L4_TIM3_QE
+	bool "TIM3"
+	default n
+	depends on STM32L4_TIM3
+	---help---
+		Reserve TIM3 for use by QEncoder.
+
+if STM32L4_TIM3_QE
+
+config STM32L4_TIM3_QEPSC
+	int "TIM3 pulse prescaler"
+	default 1
+	---help---
+		This prescaler divides the number of recorded encoder pulses, limiting the count rate at the expense of resolution.
+		Replaces the obscure "output clock of TIM3." (CONFIG_TIM3_QECLKOUT).
+
+endif
+
+config STM32L4_TIM4_QE
+	bool "TIM4"
+	default n
+	depends on STM32L4_TIM4
+	---help---
+		Reserve TIM4 for use by QEncoder.
+
+if STM32L4_TIM4_QE
+
+config STM32L4_TIM4_QEPSC
+	int "TIM4 pulse prescaler"
+	default 1
+	---help---
+		This prescaler divides the number of recorded encoder pulses, limiting the count rate at the expense of resolution.
+		Replaces the obscure "output clock of TIM4." (CONFIG_TIM4_QECLKOUT).
+
+endif
+
+config STM32L4_TIM5_QE
+	bool "TIM5"
+	default n
+	depends on STM32L4_TIM5
+	---help---
+		Reserve TIM5 for use by QEncoder.
+
+if STM32L4_TIM5_QE
+
+config STM32L4_TIM5_QEPSC
+	int "TIM5 pulse prescaler"
+	default 1
+	---help---
+		This prescaler divides the number of recorded encoder pulses, limiting the count rate at the expense of resolution.
+		Replaces the obscure "output clock of TIM5." (CONFIG_TIM5_QECLKOUT).
+
+endif
+
+config STM32L4_TIM8_QE
+	bool "TIM8"
+	default n
+	depends on STM32L4_TIM8
+	---help---
+		Reserve TIM8 for use by QEncoder.
+
+if STM32L4_TIM8_QE
+
+config STM32L4_TIM8_QEPSC
+	int "TIM8 pulse prescaler"
+	default 1
+	---help---
+		This prescaler divides the number of recorded encoder pulses, limiting the count rate at the expense of resolution.
+		Replaces the obscure "output clock of TIM8." (CONFIG_TIM8_QECLKOUT).
+
+endif
+
+config STM32L4_QENCODER_FILTER
+	bool "Enable filtering on STM32 QEncoder input"
+	default y
+
+choice
+	depends on STM32L4_QENCODER_FILTER
+	prompt "Input channel sampling frequency"
+	default STM32L4_QENCODER_SAMPLE_FDTS_4
+
+config STM32L4_QENCODER_SAMPLE_FDTS
+	bool "fDTS"
+
+config STM32L4_QENCODER_SAMPLE_CKINT
+	bool "fCK_INT"
+
+config STM32L4_QENCODER_SAMPLE_FDTS_2
+	bool "fDTS/2"
+
+config STM32L4_QENCODER_SAMPLE_FDTS_4
+	bool "fDTS/4"
+
+config STM32L4_QENCODER_SAMPLE_FDTS_8
+	bool "fDTS/8"
+
+config STM32L4_QENCODER_SAMPLE_FDTS_16
+	bool "fDTS/16"
+
+config STM32L4_QENCODER_SAMPLE_FDTS_32
+	bool "fDTS/32"
+
+endchoice
+
+choice
+	depends on STM32L4_QENCODER_FILTER
+	prompt "Input channel event count"
+	default STM32L4_QENCODER_SAMPLE_EVENT_6
+
+config STM32L4_QENCODER_SAMPLE_EVENT_1
+	depends on STM32L4_QENCODER_SAMPLE_FDTS
+	bool "1"
+
+config STM32L4_QENCODER_SAMPLE_EVENT_2
+	depends on STM32L4_QENCODER_SAMPLE_CKINT
+	bool "2"
+
+config STM32L4_QENCODER_SAMPLE_EVENT_4
+	depends on STM32L4_QENCODER_SAMPLE_CKINT
+	bool "4"
+
+config STM32L4_QENCODER_SAMPLE_EVENT_5
+	depends on STM32L4_QENCODER_SAMPLE_FDTS_16 || STM32L4_QENCODER_SAMPLE_FDTS_32
+	bool "5"
+
+config STM32L4_QENCODER_SAMPLE_EVENT_6
+	depends on !STM32L4_QENCODER_SAMPLE_FDTS && !STM32L4_QENCODER_SAMPLE_CKINT
+	bool "6"
+
+config STM32L4_QENCODER_SAMPLE_EVENT_8
+	depends on !STM32L4_QENCODER_SAMPLE_FDTS
+	bool "8"
+
+endchoice
+
+endmenu
+
+menu "SAI Configuration"
+	depends on STM32L4_SAI
+
+choice
+	prompt "Operation mode"
+	default STM32L4_SAI_DMA
+	---help---
+		Select the operation mode the SAI driver should use.
+
+config STM32L4_SAI_POLLING
+	bool "Polling"
+	---help---
+		The SAI registers are polled for events.
+
+config STM32L4_SAI_INTERRUPTS
+	bool "Interrupt"
+	---help---
+		Select to enable interrupt driven SAI support.
+
+config STM32L4_SAI_DMA
+	bool "DMA"
+	---help---
+		Use DMA to improve SAI transfer performance.
+
+endchoice # Operation mode
+
+choice
+	prompt "SAI1 synchronization enable"
+	default STM32L4_SAI1_BOTH_ASYNC
+	depends on STM32L4_SAI1_A && STM32L4_SAI1_B
+	---help---
+		Select the synchronization mode of the SAI sub-blocks
+
+config STM32L4_SAI1_BOTH_ASYNC
+	bool "Both asynchronous"
+
+config STM32L4_SAI1_A_SYNC_WITH_B
+	bool "Block A is synchronous with Block B"
+
+config STM32L4_SAI1_B_SYNC_WITH_A
+	bool "Block B is synchronous with Block A"
+
+endchoice # SAI1 synchronization enable
+
+choice
+	prompt "SAI2 synchronization enable"
+	default STM32L4_SAI2_BOTH_ASYNC
+	depends on STM32L4_SAI2_A && STM32L4_SAI2_B
+	---help---
+		Select the synchronization mode of the SAI sub-blocks
+
+config STM32L4_SAI2_BOTH_ASYNC
+	bool "Both asynchronous"
+
+config STM32L4_SAI2_A_SYNC_WITH_B
+	bool "Block A is synchronous with Block B"
+
+config STM32L4_SAI2_B_SYNC_WITH_A
+	bool "Block B is synchronous with Block A"
+
+endchoice # SAI2 synchronization enable
+
 endmenu
 
 endif # ARCH_CHIP_STM32L4
diff --git a/arch/arm/src/stm32l4/Make.defs b/arch/arm/src/stm32l4/Make.defs
index d7b602efe472dd1630e38aaa04ef78018c1ace4e..359875b63c70464cd7722942721b4b6ed8152625 100644
--- a/arch/arm/src/stm32l4/Make.defs
+++ b/arch/arm/src/stm32l4/Make.defs
@@ -1,6 +1,7 @@
 ############################################################################
 # arch/arm/src/stm32l4/Make.defs
 #
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
 #   Copyright (C) 2015-2016 Sebastien Lorquet. All rights reserved.
 #   Author: Sebastien Lorquet 
 #
@@ -83,10 +84,6 @@ ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
 CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
 endif
 
-ifeq ($(CONFIG_ARCH_MEMCPY),y)
-CMN_ASRCS += up_memcpy.S
-endif
-
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
 CMN_CSRCS += up_mpu.c up_task_start.c up_pthread_start.c
 ifneq ($(CONFIG_DISABLE_SIGNALS),y)
@@ -99,16 +96,6 @@ ifeq ($(CONFIG_STACK_COLORATION),y)
 CMN_CSRCS += up_checkstack.c
 endif
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c up_coherent_dcache.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c up_coherent_dcache.c
-endif
-
-ifeq ($(CONFIG_STACK_COLORATION),y)
-CMN_CSRCS += up_checkstack.c
-endif
-
 # Required STM32L4 files
 
 CHIP_ASRCS  =
@@ -116,9 +103,24 @@ CHIP_CSRCS  = stm32l4_allocateheap.c stm32l4_exti_gpio.c stm32l4_gpio.c
 CHIP_CSRCS += stm32l4_idle.c stm32l4_irq.c stm32l4_lowputc.c stm32l4_rcc.c
 CHIP_CSRCS += stm32l4_serial.c stm32l4_start.c stm32l4_waste.c stm32l4_uid.c
 CHIP_CSRCS += stm32l4_spi.c stm32l4_i2c.c stm32l4_lse.c stm32l4_pwr.c
+CHIP_CSRCS += stm32l4_tim.c
+
+ifeq ($(CONFIG_TIMER),y)
+CHIP_CSRCS += stm32l4_tim_lowerhalf.c
+endif
 
 ifneq ($(CONFIG_SCHED_TICKLESS),y)
 CHIP_CSRCS += stm32l4_timerisr.c
+else
+CHIP_CSRCS += stm32l4_tickless.c
+endif
+
+ifeq ($(CONFIG_STM32L4_ONESHOT),y)
+CHIP_CSRCS += stm32l4_oneshot.c stm32l4_oneshot_lowerhalf.c
+endif
+
+ifeq ($(CONFIG_STM32L4_FREERUN),y)
+CHIP_CSRCS += stm32l4_freerun.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
@@ -136,6 +138,37 @@ ifeq ($(CONFIG_STM32L4_DMA),y)
 CHIP_CSRCS += stm32l4_dma.c
 endif
 
+ifeq ($(CONFIG_USBDEV),y)
+ifeq ($(CONFIG_STM32L4_OTGFS),y)
+CHIP_CSRCS += stm32l4_otgfsdev.c
+endif
+endif
+
+ifeq ($(CONFIG_USBHOST),y)
+ifeq ($(CONFIG_STM32L4_OTGFS),y)
+CHIP_CSRCS += stm32l4_otgfshost.c
+endif
+endif
+
+ifeq ($(CONFIG_USBHOST),y)
+ifeq ($(CONFIG_USBHOST_TRACE),y)
+CHIP_CSRCS += stm32l4_usbhost_trace.c
+else
+ifeq ($(CONFIG_DEBUG_USB),y)
+CHIP_CSRCS += stm32l4_usbhost_trace.c
+endif
+endif
+endif
+
+ifeq ($(CONFIG_PM),y)
+CHIP_CSRCS += stm32l4_pmlpr.c stm32l4_pmsleep.c stm32l4_pmstandby.c
+CHIP_CSRCS += stm32l4_pmstop.c
+
+ifneq ($(CONFIG_ARCH_CUSTOM_PMINIT),y)
+CHIP_CSRCS += stm32l4_pminitialize.c
+endif
+endif
+
 ifeq ($(CONFIG_STM32L4_PWR),y)
 CHIP_CSRCS += stm32l4_exti_pwr.c
 endif
@@ -150,14 +183,34 @@ CHIP_CSRCS += stm32l4_rtcc.c
 endif
 endif
 
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
 CHIP_CSRCS += stm32l4_dumpgpio.c
 endif
 
+ifeq ($(CONFIG_STM32L4_COMP),y)
+CHIP_CSRCS += stm32l4_comp.c stm32l4_exti_comp.c
+endif
+
 ifeq ($(CONFIG_STM32L4_RNG),y)
 CHIP_CSRCS += stm32l4_rng.c
 endif
 
+ifeq ($(CONFIG_STM32L4_SAI),y)
+CHIP_CSRCS += stm32l4_sai.c
+endif
+
+ifeq ($(CONFIG_STM32L4_LPTIM),y)
+CHIP_CSRCS += stm32l4_lptim.c
+endif
+
+ifeq ($(CONFIG_PWM),y)
+CHIP_CSRCS += stm32l4_pwm.c
+endif
+
+ifeq ($(CONFIG_QENCODER),y)
+CHIP_CSRCS += stm32l4_qencoder.c
+endif
+
 ifeq ($(CONFIG_STM32L4_QSPI),y)
 CHIP_CSRCS += stm32l4_qspi.c
 endif
diff --git a/arch/arm/src/stm32l4/README.txt b/arch/arm/src/stm32l4/README.txt
index 59f2eb28d9f99d4a2348f4bde5fc478afbb2e426..4e1d31f6aa0eb2754e242ff5027f26edda6ac3a3 100644
--- a/arch/arm/src/stm32l4/README.txt
+++ b/arch/arm/src/stm32l4/README.txt
@@ -1,5 +1,5 @@
 This is a port of NuttX to the STM32L4 Family
-Used development board is the Nucleo L476RG
+Used development board is the Nucleo L476RG, STM32L4VGDiscovery
 
 The status is HIGHLY EXPERIMENTAL.
 
@@ -16,23 +16,24 @@ IRQs     : OK
 GPIO     : OK
 EXTI     : OK, to be tested.
 HSI      : OK
-HSE      : To be tested
+HSE      : OK
 PLL      : Works @ 80 MHz
-MSI      : TODO
-LSE      : works, but TODO autotrim of MSI, etc
+MSI      : OK
+LSE      : OK
 RCC      : All registers defined, peripherals enabled, basic clock working
 SYSCTL   : All registers defined
 USART    : Working in normal mode (no DMA, to be tested, code is written)
 DMA      : works; at least tested with QSPI
-SRAM2    : Should work with enough MM regions
+SRAM2    : OK; can be included in MM region or left separate for special app purposes
 FIREWALL : Code written, to be tested, requires support from ldscript
 SPI      : Code written, to be tested, including DMA
 I2C      : Registers defined
 RTC      : works
 QSPI     : works in polling, interrupt, DMA, and also memory-mapped modes
 CAN      : TODO
-OTGFS    : TODO
-Timers   : TODO
+OTGFS    : dev implemented, tested, outstanding issue with CDCACM (ACM_SET_LINE_CODING, but otherwise works);
+         : host implemented, only build smoke-tested (i.e. builds, but no functional testing yet)
+Timers   : Implemented, with PWM oneshot and freerun, tickless OS support.  Limited testing (focused on tickless OS so far)
 PM       : TODO, PWR registers defined
 FSMC     : TODO
 AES      : TODO
diff --git a/arch/arm/src/stm32l4/chip/stm32l4_can.h b/arch/arm/src/stm32l4/chip/stm32l4_can.h
index 75c48cfeb8a816f2847ab4431e08b2e28569e2d9..6319282e48e722b005182e1bb73cf98378c745f8 100644
--- a/arch/arm/src/stm32l4/chip/stm32l4_can.h
+++ b/arch/arm/src/stm32l4/chip/stm32l4_can.h
@@ -74,6 +74,7 @@
 #define STM32L4_CAN_MCR_OFFSET      0x0000  /* CAN master control register */
 #define STM32L4_CAN_MSR_OFFSET      0x0004  /* CAN master status register */
 #define STM32L4_CAN_TSR_OFFSET      0x0008  /* CAN transmit status register */
+#define STM32L4_CAN_RFR_OFFSET(m)   (0x000c + ((m) << 2))
 #define STM32L4_CAN_RF0R_OFFSET     0x000c  /* CAN receive FIFO 0 register */
 #define STM32L4_CAN_RF1R_OFFSET     0x0010  /* CAN receive FIFO 1 register */
 #define STM32L4_CAN_IER_OFFSET      0x0014  /* CAN interrupt enable register */
@@ -82,39 +83,39 @@
 
 /* CAN mailbox registers (3 TX and 2 RX) */
 
-#define STM32L4_CAN_TIR_OFFSET(m)   (0x0180+((m)<<4))
+#define STM32L4_CAN_TIR_OFFSET(m)   (0x0180 + ((m) << 4))
 #define STM32L4_CAN_TI0R_OFFSET     0x0180  /* TX mailbox identifier register 0 */
 #define STM32L4_CAN_TI1R_OFFSET     0x0190  /* TX mailbox identifier register 1 */
 #define STM32L4_CAN_TI2R_OFFSET     0x01a0  /* TX mailbox identifier register 2 */
 
-#define STM32L4_CAN_TDTR_OFFSET(m)  (0x0184+((m)<<4))
+#define STM32L4_CAN_TDTR_OFFSET(m)  (0x0184 + ((m) << 4))
 #define STM32L4_CAN_TDT0R_OFFSET    0x0184  /* Mailbox data length control and time stamp register 0 */
 #define STM32L4_CAN_TDT1R_OFFSET    0x0194  /* Mailbox data length control and time stamp register 1 */
 #define STM32L4_CAN_TDT2R_OFFSET    0x01a4  /* Mailbox data length control and time stamp register 2 */
 
-#define STM32L4_CAN_TDLR_OFFSET(m)  (0x0188+((m)<<4))
+#define STM32L4_CAN_TDLR_OFFSET(m)  (0x0188 + ((m) << 4))
 #define STM32L4_CAN_TDL0R_OFFSET    0x0188  /* Mailbox data low register 0 */
 #define STM32L4_CAN_TDL1R_OFFSET    0x0198  /* Mailbox data low register 1 */
 #define STM32L4_CAN_TDL2R_OFFSET    0x01a8  /* Mailbox data low register 2 */
 
-#define STM32L4_CAN_TDHR_OFFSET(m)  (0x018c+((m)<<4))
+#define STM32L4_CAN_TDHR_OFFSET(m)  (0x018c + ((m) << 4))
 #define STM32L4_CAN_TDH0R_OFFSET    0x018c  /* Mailbox data high register 0 */
 #define STM32L4_CAN_TDH1R_OFFSET    0x019c  /* Mailbox data high register 1 */
 #define STM32L4_CAN_TDH2R_OFFSET    0x01ac  /* Mailbox data high register 2 */
 
-#define STM32L4_CAN_RIR_OFFSET(m)   (0x01b0+((m)<<4))
+#define STM32L4_CAN_RIR_OFFSET(m)   (0x01b0 + ((m) << 4))
 #define STM32L4_CAN_RI0R_OFFSET     0x01b0  /* Rx FIFO mailbox identifier register 0 */
 #define STM32L4_CAN_RI1R_OFFSET     0x01c0  /* Rx FIFO mailbox identifier register 1 */
 
-#define STM32L4_CAN_RDTR_OFFSET(m)  (0x01b4+((m)<<4))
+#define STM32L4_CAN_RDTR_OFFSET(m)  (0x01b4 + ((m) << 4))
 #define STM32L4_CAN_RDT0R_OFFSET    0x01b4  /* Rx FIFO mailbox data length control and time stamp register 0 */
 #define STM32L4_CAN_RDT1R_OFFSET    0x01c4  /* Rx FIFO mailbox data length control and time stamp register 1 */
 
-#define STM32L4_CAN_RDLR_OFFSET(m)  (0x01b8+((m)<<4))
+#define STM32L4_CAN_RDLR_OFFSET(m)  (0x01b8 + ((m) << 4))
 #define STM32L4_CAN_RDL0R_OFFSET    0x01b8  /* Receive FIFO mailbox data low register 0 */
 #define STM32L4_CAN_RDL1R_OFFSET    0x01c8  /* Receive FIFO mailbox data low register 1 */
 
-#define STM32L4_CAN_RDHR_OFFSET(m)  (0x01bc+((m)<<4))
+#define STM32L4_CAN_RDHR_OFFSET(m)  (0x01bc + ((m) << 4))
 #define STM32L4_CAN_RDH0R_OFFSET    0x01bc  /* Receive FIFO mailbox data high register 0 */
 #define STM32L4_CAN_RDH1R_OFFSET    0x01cc  /* Receive FIFO mailbox data high register 1 */
 
@@ -126,7 +127,7 @@
 #define STM32L4_CAN_FFA1R_OFFSET    0x0214  /* CAN filter FIFO assignment register */
 #define STM32L4_CAN_FA1R_OFFSET     0x021c  /* CAN filter activation register */
 
-/* There are 14 or 28 filter banks (depending) on the device.  Each filter bank is
+/* There are 14 filter banks on the device.  Each filter bank is
  * composed of two 32-bit registers, CAN_FiR:
  *  F0R1 Offset 0x240
  *  F0R2 Offset 0x244
@@ -143,6 +144,7 @@
 #  define STM32L4_CAN1_MCR          (STM32L4_CAN1_BASE+STM32L4_CAN_MCR_OFFSET)
 #  define STM32L4_CAN1_MSR          (STM32L4_CAN1_BASE+STM32L4_CAN_MSR_OFFSET)
 #  define STM32L4_CAN1_TSR          (STM32L4_CAN1_BASE+STM32L4_CAN_TSR_OFFSET)
+#  define STM32L4_CAN1_RFR(m)       (STM32L4_CAN1_BASE+STM32L4_CAN_RFR_OFFSET(m))
 #  define STM32L4_CAN1_RF0R         (STM32L4_CAN1_BASE+STM32L4_CAN_RF0R_OFFSET)
 #  define STM32L4_CAN1_RF1R         (STM32L4_CAN1_BASE+STM32L4_CAN_RF1R_OFFSET)
 #  define STM32L4_CAN1_IER          (STM32L4_CAN1_BASE+STM32L4_CAN_IER_OFFSET)
@@ -302,7 +304,7 @@
 #define CAN_BTR_SJW_SHIFT         (24)      /* Bits 25-24: Resynchronization Jump Width */
 #define CAN_BTR_SJW_MASK          (3 << CAN_BTR_SJW_SHIFT)
 #define CAN_BTR_LBKM              (1 << 30) /* Bit 30: Loop Back Mode (Debug) */
-#define CAN_BTR_SILM              (1 << 31) /* Bit 31: Silent Mode (Debug) */
+#define CAN_BTR_SILM              (1ul << 31) /* Bit 31: Silent Mode (Debug) */
 
 #define CAN_BTR_BRP_MAX           (1024)    /* Maximum BTR value (without decrement) */
 #define CAN_BTR_TSEG1_MAX         (16)      /* Maximum TSEG1 value (without decrement) */
@@ -394,43 +396,23 @@
 
 /* CAN filter mode register */
 
-#if defined(CONFIG_STM32L4_CONNECTIVITYLINE) || defined(CONFIG_STM32L4_STM32F20XX) || defined(CONFIG_STM32L4_STM32F40XX)
-#  define CAN_FM1R_FBM_SHIFT      (0)      /* Bits 13:0: Filter Mode */
-#  define CAN_FM1R_FBM_MASK       (0x3fff << CAN_FM1R_FBM_SHIFT)
-#else
-#  define CAN_FM1R_FBM_SHIFT      (0)      /* Bits 27:0: Filter Mode */
-#  define CAN_FM1R_FBM_MASK       (0x0fffffff << CAN_FM1R_FBM_SHIFT)
-#endif
+#define CAN_FM1R_FBM_SHIFT        (0)      /* Bits 13:0: Filter Mode */
+#define CAN_FM1R_FBM_MASK         (0x3fff << CAN_FM1R_FBM_SHIFT)
 
 /* CAN filter scale register */
 
-#if defined(CONFIG_STM32L4_CONNECTIVITYLINE) || defined(CONFIG_STM32L4_STM32F20XX) || defined(CONFIG_STM32L4_STM32F40XX)
-#  define CAN_FS1R_FSC_SHIFT      (0)      /* Bits 13:0: Filter Scale Configuration */
-#  define CAN_FS1R_FSC_MASK       (0x3fff << CAN_FS1R_FSC_SHIFT)
-#else
-#  define CAN_FS1R_FSC_SHIFT      (0)      /* Bits 27:0: Filter Scale Configuration */
-#  define CAN_FS1R_FSC_MASK       (0x0fffffff << CAN_FS1R_FSC_SHIFT)
-#endif
+#define CAN_FS1R_FSC_SHIFT        (0)      /* Bits 13:0: Filter Scale Configuration */
+#define CAN_FS1R_FSC_MASK         (0x3fff << CAN_FS1R_FSC_SHIFT)
 
 /* CAN filter FIFO assignment register */
 
-#if defined(CONFIG_STM32L4_CONNECTIVITYLINE) || defined(CONFIG_STM32L4_STM32F20XX) || defined(CONFIG_STM32L4_STM32F40XX)
-#  define CAN_FFA1R_FFA_SHIFT     (0)      /* Bits 13:0: Filter FIFO Assignment */
-#  define CAN_FFA1R_FFA_MASK      (0x3fff << CAN_FFA1R_FFA_SHIFT)
-#else
-#  define CAN_FFA1R_FFA_SHIFT     (0)      /* Bits 27:0: Filter FIFO Assignment */
-#  define CAN_FFA1R_FFA_MASK      (0x0fffffff << CAN_FFA1R_FFA_SHIFT)
-#endif
+#define CAN_FFA1R_FFA_SHIFT       (0)      /* Bits 13:0: Filter FIFO Assignment */
+#define CAN_FFA1R_FFA_MASK        (0x3fff << CAN_FFA1R_FFA_SHIFT)
 
 /* CAN filter activation register */
 
-#if defined(CONFIG_STM32L4_CONNECTIVITYLINE) || defined(CONFIG_STM32L4_STM32F20XX) || defined(CONFIG_STM32L4_STM32F40XX)
-#  define CAN_FA1R_FACT_SHIFT     (0)      /* Bits 13:0: Filter Active */
-#  define CAN_FA1R_FACT_MASK      (0x3fff << CAN_FA1R_FACT_SHIFT)
-#else
-#  define CAN_FA1R_FACT_SHIFT     (0)      /* Bits 27:0: Filter Active */
-#  define CAN_FA1R_FACT_MASK      (0x0fffffff << CAN_FA1R_FACT_SHIFT)
-#endif
+#define CAN_FA1R_FACT_SHIFT       (0)      /* Bits 13:0: Filter Active */
+#define CAN_FA1R_FACT_MASK        (0x3fff << CAN_FA1R_FACT_SHIFT)
 
 /************************************************************************************
  * Public Types
diff --git a/arch/arm/src/stm32l4/chip/stm32l4_comp.h b/arch/arm/src/stm32l4/chip/stm32l4_comp.h
new file mode 100644
index 0000000000000000000000000000000000000000..a09c6826527bad66004c132a2c025eee099267f9
--- /dev/null
+++ b/arch/arm/src/stm32l4/chip/stm32l4_comp.h
@@ -0,0 +1,107 @@
+/****************************************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_comp.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_COMP_H
+#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_COMP_H
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+/* Register Offsets *********************************************************************************/
+
+#define STM32L4_COMP_CSR_OFFSET(n) (((n)-1) << 2)
+#define STM32L4_COMP1_CSR_OFFSET   0x0000  /* Comparator 1 control and status register */
+#define STM32L4_COMP2_CSR_OFFSET   0x0004  /* Comparator 2 control and status register */
+
+/* Register Addresses *******************************************************************************/
+
+#define STM32L4_COMP_CSR(n)        (STM32L4_COMP_BASE+STM32L4_COMP_CSR_OFFSET(n))
+#define STM32L4_COMP1_CSR          (STM32L4_COMP_BASE+STM32L4_COMP1_CSR_OFFSET)
+#define STM32L4_COMP2_CSR          (STM32L4_COMP_BASE+STM32L4_COMP2_CSR_OFFSET)
+
+/* Register Bitfield Definitions ********************************************************************/
+
+#define COMP_CSR_EN                (1 << 0)  /* Bit 0:  Comparator enable bit */
+                                             /* Bit 1: Reserved */
+#define COMP_CSR_PWRMODE_SHIFT     (2)       /* Bits 2-3: Power Mode */
+#define COMP_CSR_PWRMODE_MASK      (3 << COMP_CSR_PWRMODE_SHIFT)
+#  define COMP_CSR_PWRMODE_HIGH    (0 << COMP_CSR_PWRMODE_SHIFT) /* High speed */
+#  define COMP_CSR_PWRMODE_MEDIUM  (1 << COMP_CSR_PWRMODE_SHIFT) /* Medium speed */
+#  define COMP_CSR_PWRMODE_LOW     (3 << COMP_CSR_PWRMODE_SHIFT) /* Ultra low power */
+#define COMP_CSR_INMSEL_SHIFT      (4)       /* Bits 4-6: Input minus selection bits */
+#define COMP_CSR_INMSEL_MASK       (7 << COMP_CSR_INMSEL_SHIFT)
+#  define COMP_CSR_INMSEL_25PCT    (0 << COMP_CSR_INMSEL_SHIFT) /* 1/4 VREFINT */
+#  define COMP_CSR_INMSEL_50PCT    (1 << COMP_CSR_INMSEL_SHIFT) /* 1/2 VREFINT */
+#  define COMP_CSR_INMSEL_75PCT    (2 << COMP_CSR_INMSEL_SHIFT) /* 3/4 VREFINT */
+#  define COMP_CSR_INMSEL_VREF     (3 << COMP_CSR_INMSEL_SHIFT) /* VREFINT */
+#  define COMP_CSR_INMSEL_DAC1     (4 << COMP_CSR_INMSEL_SHIFT) /* DAC Channel1 */
+#  define COMP_CSR_INMSEL_DAC2     (5 << COMP_CSR_INMSEL_SHIFT) /* DAC Channel2 */
+#  define COMP_CSR_INMSEL_PIN1     (6 << COMP_CSR_INMSEL_SHIFT) /* Input minus pin 1: COMP1=PB1; COMP2=PB3 */
+#  define COMP_CSR_INMSEL_PIN2     (7 << COMP_CSR_INMSEL_SHIFT) /* Input minus pin 2: COMP1=PC4; COMP2=PB7 */
+#define COMP_CSR_INPSEL_MASK       (1 << 7)  /* Bit 7:  Input plus selection bit */
+#  define COMP_CSR_INPSEL_PIN1     (0)                          /* Input plus pin 1: COMP1=PC5; COMP2=PB4 */
+#  define COMP_CSR_INPSEL_PIN2     COMP_CSR_INPSEL_MASK         /* Input plus pin 1: COMP1=PB2; COMP2=PB6 */
+#define COMP2_CSR_WINMODE          (1 << 9)  /* Bit 9:  Windows mode selection bit (COMP2 only) */
+#  define COMP2_CSR_WINMODE_NOCONN (0)                /* Comparator 2 input not connected to Comparator 1 */
+#  define COMP2_CSR_WINMODE_CONN   COMP2_CSR_WINMODE  /* Comparator 2 input connected to Comparator 1 */
+#define COMP_CSR_POLARITY_MASK     (1 << 15) /* Bit 15: Polarity selection bit */
+#  define COMP_CSR_POLARITY_NORMAL (0)
+#  define COMP_CSR_POLARITY_INVERT COMP_CSR_POLARITY_MASK
+#define COMP_CSR_HYST_SHIFT        (16)      /* Bits 16-17: Hysteresis selection bits */
+#define COMP_CSR_HYST_MASK         (3 << COMP_CSR_HYST_SHIFT)
+#  define COMP_CSR_HYST_NONE       (0 << COMP_CSR_HYST_SHIFT) /* No hysteresis */
+#  define COMP_CSR_HYST_LOW        (1 << COMP_CSR_HYST_SHIFT) /* Low hysteresis */
+#  define COMP_CSR_HYST_MEDIUM     (2 << COMP_CSR_HYST_SHIFT) /* Medium hysteresis */
+#  define COMP_CSR_HYST_HIGH       (3 << COMP_CSR_HYST_SHIFT) /* High hysteresis */
+#define COMP_CSR_BLANK_SHIFT       (18)      /* Bits 18-20: Blanking source selection bits */
+#define COMP_CSR_BLANK_MASK        (7 << COMP_CSR_BLANK_SHIFT)
+#  define COMP_CSR_BLANK_NONE      (0 << COMP_CSR_BLANK_SHIFT) /* No blanking */
+#  define COMP1_CSR_BLANK_TIM1OC5  (1 << COMP_CSR_BLANK_SHIFT) /* TIM1 OC5 is blanking source */
+#  define COMP1_CSR_BLANK_TIM2OC3  (2 << COMP_CSR_BLANK_SHIFT) /* TIM2 OC3 is blanking source */
+#  define COMP1_CSR_BLANK_TIM3OC3  (4 << COMP_CSR_BLANK_SHIFT) /* TIM3 OC3 is blanking source */
+#  define COMP2_CSR_BLANK_TIM3OC4  (1 << COMP_CSR_BLANK_SHIFT) /* TIM3 OC4 is blanking source */
+#  define COMP2_CSR_BLANK_TIM8OC5  (2 << COMP_CSR_BLANK_SHIFT) /* TIM8 OC5 is blanking source */
+#  define COMP2_CSR_BLANK_TIM15OC1 (4 << COMP_CSR_BLANK_SHIFT) /* TIM15 OC1 is blanking source */
+                                             /* Bit 21: Reserved */
+#define COMP_CSR_BRGEN             (1 << 22) /* Bit 22: Scaler bridge enable */
+#define COMP_CSR_SCALEN            (1 << 23) /* Bit 23: Voltage scaler enable bit */
+                                             /* Bits 24-29: Reserved */
+#define COMP_CSR_VALUE             (1 << 30) /* Bit 30: Comparator output status bit */
+#define COMP_CSR_LOCK_MASK         (1 << 31) /* Bit 31: CSR register lock bit */
+#  define COMP_CSR_LOCK_RW         (0)
+#  define COMP_CSR_LOCK_RO         COMP_CSR_LOCK_MASK
+
+#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_COMP_H */
diff --git a/arch/arm/src/stm32l4/chip/stm32l4_lptim.h b/arch/arm/src/stm32l4/chip/stm32l4_lptim.h
new file mode 100644
index 0000000000000000000000000000000000000000..1822effec45039747ae7e639b274b7be10513cf1
--- /dev/null
+++ b/arch/arm/src/stm32l4/chip/stm32l4_lptim.h
@@ -0,0 +1,117 @@
+/****************************************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_lptim.h
+ *
+ *   Copyright (C) 2016 Motorola Mobility, LLC. All rights reserved.
+ *   Copyright (C) 2009, 2011-2012, 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_LPTIM_H
+#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_LPTIM_H
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+/* Register Offsets *********************************************************************************/
+
+/* Basic Timers - TIM6 and TIM7 */
+
+#define STM32L4_LPTIM_ISR_OFFSET  0x0000  /* Interrupt and Status Register */
+#define STM32L4_LPTIM_ICR_OFFSET  0x0004  /* Interrupt Clear Register */
+#define STM32L4_LPTIM_IER_OFFSET  0x0008  /* Interrupt Enable Register */
+#define STM32L4_LPTIM_CFGR_OFFSET 0x000c  /* Configuration Register */
+#define STM32L4_LPTIM_CR_OFFSET   0x0010  /* Control Register */
+#define STM32L4_LPTIM_CMP_OFFSET  0x0014  /* Compare Register */
+#define STM32L4_LPTIM_ARR_OFFSET  0x0018  /* Autoreload Register */
+#define STM32L4_LPTIM_CNT_OFFSET  0x001c  /* Counter Register */
+
+/* Register Addresses *******************************************************************************/
+
+/* Low-Power Timers - LPTIM1 and LPTIM2 */
+
+#define STM32L4_LPTIM1_ISR        (STM32L4_LPTIM1_BASE+STM32L4_LPTIM_ISR_OFFSET)
+#define STM32L4_LPTIM1_ICR        (STM32L4_LPTIM1_BASE+STM32L4_LPTIM_ICR_OFFSET)
+#define STM32L4_LPTIM1_IER        (STM32L4_LPTIM1_BASE+STM32L4_LPTIM_IER_OFFSET)
+#define STM32L4_LPTIM1_CFGR       (STM32L4_LPTIM1_BASE+STM32L4_LPTIM_CFGR_OFFSET)
+#define STM32L4_LPTIM1_CR         (STM32L4_LPTIM1_BASE+STM32L4_LPTIM_CR_OFFSET)
+#define STM32L4_LPTIM1_CMP        (STM32L4_LPTIM1_BASE+STM32L4_LPTIM_CMP_OFFSET)
+#define STM32L4_LPTIM1_ARR        (STM32L4_LPTIM1_BASE+STM32L4_LPTIM_ARR_OFFSET)
+#define STM32L4_LPTIM1_CNT        (STM32L4_LPTIM1_BASE+STM32L4_LPTIM_CNT_OFFSET)
+
+#define STM32L4_LPTIM2_ISR        (STM32L4_LPTIM2_BASE+STM32L4_LPTIM_ISR_OFFSET)
+#define STM32L4_LPTIM2_ICR        (STM32L4_LPTIM2_BASE+STM32L4_LPTIM_ICR_OFFSET)
+#define STM32L4_LPTIM2_IER        (STM32L4_LPTIM2_BASE+STM32L4_LPTIM_IER_OFFSET)
+#define STM32L4_LPTIM2_CFGR       (STM32L4_LPTIM2_BASE+STM32L4_LPTIM_CFGR_OFFSET)
+#define STM32L4_LPTIM2_CR         (STM32L4_LPTIM2_BASE+STM32L4_LPTIM_CR_OFFSET)
+#define STM32L4_LPTIM2_CMP        (STM32L4_LPTIM2_BASE+STM32L4_LPTIM_CMP_OFFSET)
+#define STM32L4_LPTIM2_ARR        (STM32L4_LPTIM2_BASE+STM32L4_LPTIM_ARR_OFFSET)
+#define STM32L4_LPTIM2_CNT        (STM32L4_LPTIM2_BASE+STM32L4_LPTIM_CNT_OFFSET)
+
+/* Register Bitfield Definitions ********************************************************************/
+
+#define LPTIM_CFGR_CKSEL          (1 << 0)   /* Bit   0: Clock selector */
+#define LPTIM_CFGR_CKPOL_SHIFT    (1)        /* Bits 2-1: Clock Polarity */
+#define LPTIM_CFGR_CKPOL_MASK     (3 << LPTIM_CFGR_CKPOL_SHIFT)
+#define LPTIM_CFGR_CKFLT_SHIFT    (3)        /* Bits 4-3: Digital filter for external clock */
+#define LPTIM_CFGR_CKFLTN_MASK    (3 << LPTIM_CFGR_CKFLT_SHIFT)
+                                             /* Bit  5: reserved */
+#define LPTIM_CFGR_TRGFLT_SHIFT   (6)        /* Bits 7-6: Digital filter for trigger */
+#define LPTIM_CFGR_TRGFLT_MASK    (3 << LPTIM_CFGR_TRGFLT_SHIFT)
+                                             /* Bit  8: reserved */
+#define LPTIM_CFGR_PRESC_SHIFT    (9)        /* Bits 11-9: clock pre-scaler */
+#define LPTIM_CFGR_PRESC_MASK     (7 << LPTIM_CFGR_PRESC_SHIFT)
+#  define LPTIM_CFGR_PRESCd1      (0 << LPTIM_CFGR_PRESC_SHIFT) /* 000: divide by 1 */
+#  define LPTIM_CFGR_PRESCd2      (1 << LPTIM_CFGR_PRESC_SHIFT) /* 001: divide by 2 */
+#  define LPTIM_CFGR_PRESCd4      (2 << LPTIM_CFGR_PRESC_SHIFT) /* 010: divide by 4 */
+#  define LPTIM_CFGR_PRESCd8      (3 << LPTIM_CFGR_PRESC_SHIFT) /* 011: divide by 8 */
+#  define LPTIM_CFGR_PRESCd16     (4 << LPTIM_CFGR_PRESC_SHIFT) /* 100: divide by 16 */
+#  define LPTIM_CFGR_PRESCd32     (5 << LPTIM_CFGR_PRESC_SHIFT) /* 101: divide by 32 */
+#  define LPTIM_CFGR_PRESCd64     (6 << LPTIM_CFGR_PRESC_SHIFT) /* 110: divide by 64 */
+#  define LPTIM_CFGR_PRESCd128    (7 << LPTIM_CFGR_PRESC_SHIFT) /* 111: divide by 128 */
+                                             /* Bit  12: reserved */
+#define LPTIM_CFGR_TRIGSEL_SHIFT  (13)       /* Bits 15-13: Trigger selector */
+#define LPTIM_CFGR_TRIGSEL_MASK   (7 << LPTIM_CFGR_TRIGSEL_SHIFT)
+                                             /* Bit  16: reserved */
+#define LPTIM_CFGR_TRIGEN_SHIFT   (17)       /* Bits 18-17: Trigger enable and polarity */
+#define LPTIM_CFGR_TRIGEN_MASK    (3 << LPTIM_CFGR_TRIGEN_SHIFT)
+#define LPTIM_CFGR_TIMOUT         (1 << 19)  /* Bit  19: Timeout enable */
+#define LPTIM_CFGR_WAVE           (1 << 20)  /* Bit  20: Waveform shape */
+#define LPTIM_CFGR_WAVPOL         (1 << 21)  /* Bit  21: Waveform polarity */
+#define LPTIM_CFGR_PRELOAD        (1 << 22)  /* Bit  22: Update mode enable */
+#define LPTIM_CFGR_COUNTMODE      (1 << 23)  /* Bit  23: Count mode enable */
+#define LPTIM_CFGR_ENC            (1 << 24)  /* Bit  24: Encoder mode enable (LPTIM1 only) */
+
+#define LPTIM_CR_ENABLE           (1 << 0)   /* Bit 0: Enable */
+#define LPTIM_CR_SNGSTRT          (1 << 1)   /* Bit 1: Single Mode */
+#define LPTIM_CR_CNTSTRT          (1 << 2)   /* Bit 2: Continuous Mode */
+
+#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_LPTIM_H */
diff --git a/arch/arm/src/stm32l4/chip/stm32l4_memorymap.h b/arch/arm/src/stm32l4/chip/stm32l4_memorymap.h
index 0dd79ff8de84528afb142bfbff83b3380c10e413..99271a7a527b61fa0a16b559df674dd407e32b9a 100644
--- a/arch/arm/src/stm32l4/chip/stm32l4_memorymap.h
+++ b/arch/arm/src/stm32l4/chip/stm32l4_memorymap.h
@@ -175,7 +175,7 @@
 #define STM32L4_RNG_BASE        0x50060800
 #define STM32L4_AES_BASE        0x50060000
 #define STM32L4_ADC_BASE        0x50040000
-#define STM32L4_OTG_FS_BASE     0x50000000
+#define STM32L4_OTGFS_BASE      0x50000000
 #define STM32L4_GPIOH_BASE      0x50001c00
 #define STM32L4_GPIOG_BASE      0x48001800
 #define STM32L4_GPIOF_BASE      0x48001400
diff --git a/arch/arm/src/stm32l4/chip/stm32l4_pinmap.h b/arch/arm/src/stm32l4/chip/stm32l4_pinmap.h
index 16bbdec7ab14b30993635d9d20419aa04ce35c2d..0b2b537f1e4c57314cf67df23cbbccb3193a774b 100644
--- a/arch/arm/src/stm32l4/chip/stm32l4_pinmap.h
+++ b/arch/arm/src/stm32l4/chip/stm32l4_pinmap.h
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/arm/src/stm32l4/chip/stm32_pinmap.h
+ * arch/arm/src/stm32l4/chip/stm32l4_pinmap.h
  *
  *   Copyright (C) 2015 Sebastien Lorquet. All rights reserved.
  *   Author: Sebastien Lorquet 
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32_PINMAP_H
-#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32_PINMAP_H
+#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_PINMAP_H
+#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_PINMAP_H
 
 /************************************************************************************
  * Included Files
@@ -49,5 +49,5 @@
 #  error "Unsupported STM32 L4 pin map"
 #endif
 
-#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32_PINMAP_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_PINMAP_H */
 
diff --git a/arch/arm/src/stm32l4/chip/stm32l4_pwr.h b/arch/arm/src/stm32l4/chip/stm32l4_pwr.h
index 2e771551f8ea23e2faad53ae83f3446ef3b65645..2b81413a793c69a9f83fc5c5be74636ace27b6dd 100644
--- a/arch/arm/src/stm32l4/chip/stm32l4_pwr.h
+++ b/arch/arm/src/stm32l4/chip/stm32l4_pwr.h
@@ -105,8 +105,8 @@
 
 #define PWR_CR1_LPMS_SHIFT       0
 #define PWR_CR1_LPMS_MASK        (7 << PWR_CR1_LPMS_SHIFT) /* Bits 0-2: Low-power mode selection */
-#  define PWR_CR1_LPMS_STOP0     (0 << PWR_CR1_LPMS_SHIFT) /* 000: Stop 0 mode */
-#  define PWR_CR1_LPMS_STOP1     (1 << PWR_CR1_LPMS_SHIFT) /* 001: Stpp 1 mode */
+#  define PWR_CR1_LPMS_STOP1MR   (0 << PWR_CR1_LPMS_SHIFT) /* Stop 1 mode with main regulator (MR) */
+#  define PWR_CR1_LPMS_STOP1LPR  (1 << PWR_CR1_LPMS_SHIFT) /* Stop 1 mode with low-power regulator (LPR) */
 #  define PWR_CR1_LPMS_STOP2     (2 << PWR_CR1_LPMS_SHIFT) /* 010: Stop 2 mode*/
 #  define PWR_CR1_LPMS_STANDBY   (3 << PWR_CR1_LPMS_SHIFT) /* 011: Standby mode */
 #  define PWR_CR1_LPMS_SHUTDOWN  (4 << PWR_CR1_LPMS_SHIFT) /* 1xx: Shutdown node */
@@ -120,7 +120,7 @@
 /* Power control register 2 */
 
 #define PWR_CR2_PVDE             (1 <<  0) /* Bit  0: Power voltage detector enable */
-#define PWR_CR2_PLS_SHIFT        1         
+#define PWR_CR2_PLS_SHIFT        1
 #define PWR_CR2_PLS_MASK         (7 << PWR_CR2_PLS_SHIFT) /* Bits 1-3: Power voltage detector level selection */
 #  define PWR_CR2_PLS_2000mv     (0 << PWR_CR2_PLS_SHIFT) /* 000: VPVD0 around 2.0V */
 #  define PWR_CR2_PLS_2200mv     (1 << PWR_CR2_PLS_SHIFT) /* 001: VPVD1 around 2.2V */
diff --git a/arch/arm/src/stm32l4/chip/stm32l4_rng.h b/arch/arm/src/stm32l4/chip/stm32l4_rng.h
index 434b77c1c265c93b2706f0c85c0a351804a8aea6..7812110b620ffe4625fd7ac18144546f2354d992 100644
--- a/arch/arm/src/stm32l4/chip/stm32l4_rng.h
+++ b/arch/arm/src/stm32l4/chip/stm32l4_rng.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_STC_STM32_CHIP_STM32L4_RNG_H
-#define __ARCH_ARM_STC_STM32_CHIP_STM32L4_RNG_H
+#ifndef __ARCH_ARM_STC_STM32L4_CHIP_STM32L4_RNG_H
+#define __ARCH_ARM_STC_STM32L4_CHIP_STM32L4_RNG_H
 
 /************************************************************************************
  * Included Files
@@ -74,4 +74,4 @@
 #define RNG_SR_CEIS               (1 << 5) /* Bit 5: Clock error interrupt status */
 #define RNG_SR_SEIS               (1 << 6) /* Bit 6: Seed error interrupt status */
 
-#endif /* __ARCH_ARM_STC_STM32_CHIP_STM32L4_RNG_H */
+#endif /* __ARCH_ARM_STC_STM32L4_CHIP_STM32L4_RNG_H */
diff --git a/arch/arm/src/stm32l4/chip/stm32l4_sai.h b/arch/arm/src/stm32l4/chip/stm32l4_sai.h
new file mode 100644
index 0000000000000000000000000000000000000000..f411fb72baf0408964adc9ed0314c32cc7cc3507
--- /dev/null
+++ b/arch/arm/src/stm32l4/chip/stm32l4_sai.h
@@ -0,0 +1,259 @@
+/************************************************************************************
+ * arch/arm/src/stm32/chip/stm32l4_sai.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author:  Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_STC_STM32L4_CHIP_STM32L4_SAI_H
+#define __ARCH_ARM_STC_STM32L4_CHIP_STM32L4_SAI_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include "chip.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Register Offsets *****************************************************************/
+
+#define STM32L4_SAI_GCR_OFFSET     0x0000  /* SAI Global Configuration Register */
+
+#define STM32L4_SAI_A_OFFSET       0x0004
+#define STM32L4_SAI_B_OFFSET       0x0024
+
+#define STM32L4_SAI_CR1_OFFSET     0x0000  /* SAI Configuration Register 1 A */
+#define STM32L4_SAI_CR2_OFFSET     0x0004  /* SAI Configuration Register 2 A */
+#define STM32L4_SAI_FRCR_OFFSET    0x0008  /* SAI Frame Configuration Register A */
+#define STM32L4_SAI_SLOTR_OFFSET   0x000c  /* SAI Slot Register A */
+#define STM32L4_SAI_IM_OFFSET      0x0010  /* SAI Interrupt Mask Register 2 A */
+#define STM32L4_SAI_SR_OFFSET      0x0014  /* SAI Status Register A */
+#define STM32L4_SAI_CLRFR_OFFSET   0x0018  /* SAI Clear Flag Register A */
+#define STM32L4_SAI_DR_OFFSET      0x001c  /* SAI Data Register A */
+
+/* Register Addresses ***************************************************************/
+
+#define STM32L4_SAI1_GCR           (STM32L4_SAI_GCR_OFFSET)
+
+#define STM32L4_SAI1_A_BASE        (STM32L4_SAI1_BASE+STM32L4_SAI_A_OFFSET)
+#define STM32L4_SAI1_B_BASE        (STM32L4_SAI1_BASE+STM32L4_SAI_B_OFFSET)
+
+#define STM32L4_SAI1_ACR1          (STM32L4_SAI1_A_BASE+STM32L4_SAI_ACR1_OFFSET)
+#define STM32L4_SAI1_ACR2          (STM32L4_SAI1_A_BASE+STM32L4_SAI_ACR2_OFFSET)
+#define STM32L4_SAI1_AFRCR         (STM32L4_SAI1_A_BASE+STM32L4_SAI_AFRCR_OFFSET)
+#define STM32L4_SAI1_ASLOTR        (STM32L4_SAI1_A_BASE+STM32L4_SAI_ASLOTR_OFFSET)
+#define STM32L4_SAI1_AIM           (STM32L4_SAI1_A_BASE+STM32L4_SAI_AIM_OFFSET)
+#define STM32L4_SAI1_ASR           (STM32L4_SAI1_A_BASE+STM32L4_SAI_ASR_OFFSET)
+#define STM32L4_SAI1_ACLRFR        (STM32L4_SAI1_A_BASE+STM32L4_SAI_ACLRFR_OFFSET)
+#define STM32L4_SAI1_ADR           (STM32L4_SAI1_A_BASE+STM32L4_SAI_ADR_OFFSET)
+
+#define STM32L4_SAI1_BCR1          (STM32L4_SAI1_B_BASE+STM32L4_SAI_BCR1_OFFSET)
+#define STM32L4_SAI1_BCR2          (STM32L4_SAI1_B_BASE+STM32L4_SAI_BCR2_OFFSET)
+#define STM32L4_SAI1_BFRCR         (STM32L4_SAI1_B_BASE+STM32L4_SAI_BFRCR_OFFSET)
+#define STM32L4_SAI1_BSLOTR        (STM32L4_SAI1_B_BASE+STM32L4_SAI_BSLOTR_OFFSET)
+#define STM32L4_SAI1_BIM           (STM32L4_SAI1_B_BASE+STM32L4_SAI_BIM_OFFSET)
+#define STM32L4_SAI1_BSR           (STM32L4_SAI1_B_BASE+STM32L4_SAI_BSR_OFFSET)
+#define STM32L4_SAI1_BCLRFR        (STM32L4_SAI1_B_BASE+STM32L4_SAI_BCLRFR_OFFSET)
+#define STM32L4_SAI1_BDR           (STM32L4_SAI1_B_BASE+STM32L4_SAI_BDR_OFFSET)
+
+#define STM32L4_SAI2_GCR           (STM32L4_SAI2_BASE+STM32L4_SAI_GCR_OFFSET)
+
+#define STM32L4_SAI2_A_BASE        (STM32L4_SAI2_BASE+STM32L4_SAI_A_OFFSET)
+#define STM32L4_SAI2_B_BASE        (STM32L4_SAI2_BASE+STM32L4_SAI_B_OFFSET)
+
+#define STM32L4_SAI2_ACR1          (STM32L4_SAI2_A_BASE+STM32L4_SAI_ACR1_OFFSET)
+#define STM32L4_SAI2_ACR2          (STM32L4_SAI2_A_BASE+STM32L4_SAI_ACR2_OFFSET)
+#define STM32L4_SAI2_AFRCR         (STM32L4_SAI2_A_BASE+STM32L4_SAI_AFRCR_OFFSET)
+#define STM32L4_SAI2_ASLOTR        (STM32L4_SAI2_A_BASE+STM32L4_SAI_ASLOTR_OFFSET)
+#define STM32L4_SAI2_AIM           (STM32L4_SAI2_A_BASE+STM32L4_SAI_AIM_OFFSET)
+#define STM32L4_SAI2_ASR           (STM32L4_SAI2_A_BASE+STM32L4_SAI_ASR_OFFSET)
+#define STM32L4_SAI2_ACLRFR        (STM32L4_SAI2_A_BASE+STM32L4_SAI_ACLRFR_OFFSET)
+#define STM32L4_SAI2_ADR           (STM32L4_SAI2_A_BASE+STM32L4_SAI_ADR_OFFSET)
+
+#define STM32L4_SAI2_BCR1          (STM32L4_SAI2_B_BASE+STM32L4_SAI_BCR1_OFFSET)
+#define STM32L4_SAI2_BCR2          (STM32L4_SAI2_B_BASE+STM32L4_SAI_BCR2_OFFSET)
+#define STM32L4_SAI2_BFRCR         (STM32L4_SAI2_B_BASE+STM32L4_SAI_BFRCR_OFFSET)
+#define STM32L4_SAI2_BSLOTR        (STM32L4_SAI2_B_BASE+STM32L4_SAI_BSLOTR_OFFSET)
+#define STM32L4_SAI2_BIM           (STM32L4_SAI2_B_BASE+STM32L4_SAI_BIM_OFFSET)
+#define STM32L4_SAI2_BSR           (STM32L4_SAI2_B_BASE+STM32L4_SAI_BSR_OFFSET)
+#define STM32L4_SAI2_BCLRFR        (STM32L4_SAI2_B_BASE+STM32L4_SAI_BCLRFR_OFFSET)
+#define STM32L4_SAI2_BDR           (STM32L4_SAI2_B_BASE+STM32L4_SAI_BDR_OFFSET)
+
+/* Register Bitfield Definitions ****************************************************/
+
+/* SAI Global Configuration Register */
+
+#define SAI_GCR_SYNCIN_SHIFT       (0)       /* Bits 0-1: Synchronization inputs */
+#define SAI_GCR_SYNCIN_MASK        (3 << SAI_GCR_SYNCIN_SHIFT)
+#  define SAI_GCR_SYNCIN(n)        ((uint32_t)(n) << SAI_GCR_SYNCIN_SHIFT)
+                                             /* Bits 2-3: Reserved */
+#define SAI_GCR_SYNCOUT_SHIFT      (4)       /* Bits 4-5: Synchronization outputs */
+#define SAI_GCR_SYNCOUT_MASK       (3 << SAI_GCR_SYNCOUT_SHIFT)
+#  define SAI_GCR_SYNCOUT          ((uint32_t)(n) << SAI_GCR_SYNCOUT_SHIFT)
+                                             /* Bits 6-31: Reserved */
+
+/* SAI Configuration Register 1 */
+
+#define SAI_CR1_MODE_SHIFT         (0)       /* Bits 0-1: SAI audio block mode */
+#define SAI_CR1_MODE_MASK          (3 << SAI_CR1_MODE_SHIFT)
+#  define SAI_CR1_MODE_MASTER_TX   (0 << SAI_CR1_MODE_SHIFT) /* Master transmitter */
+#  define SAI_CR1_MODE_MASTER_RX   (1 << SAI_CR1_MODE_SHIFT) /* Master receiver */
+#  define SAI_CR1_MODE_SLAVE_TX    (2 << SAI_CR1_MODE_SHIFT) /* Slave transmitter */
+#  define SAI_CR1_MODE_SLAVE_RX    (3 << SAI_CR1_MODE_SHIFT) /* Slave receiver */
+#define SAI_CR1_PRTCFG_SHIFT       (2)       /* Bits 2-3: Protocol configuration */
+#define SAI_CR1_PRTCFG_MASK        (3 << SAI_CR1_PRTCFG_SHIFT)
+#  define SAI_CR1_PRTCFG_FREE      (0 << SAI_CR1_PRTCFG_SHIFT) /* Free protocol */
+#  define SAI_CR1_PRTCFG_SPDIF     (1 << SAI_CR1_PRTCFG_SHIFT) /* SPDIF protocol */
+#  define SAI_CR1_PRTCFG_AC97      (2 << SAI_CR1_PRTCFG_SHIFT) /* AC97 protocol */
+                                             /* Bit 4: Reserved */
+#define SAI_CR1_DS_SHIFT           (5)       /* Bits 5-7: Data size */
+#define SAI_CR1_DS_MASK            (7 << SAI_CR1_DS_SHIFT)
+# define SAI_CR1_DS_8BITS          (2 << SAI_CR1_DS_SHIFT) /* 8 bits */
+# define SAI_CR1_DS_10BITS         (3 << SAI_CR1_DS_SHIFT) /* 10 bits */
+# define SAI_CR1_DS_16BITS         (4 << SAI_CR1_DS_SHIFT) /* 16 bits */
+# define SAI_CR1_DS_20BITS         (5 << SAI_CR1_DS_SHIFT) /* 20 bits */
+# define SAI_CR1_DS_24BITS         (6 << SAI_CR1_DS_SHIFT) /* 24 bits */
+# define SAI_CR1_DS_32BITS         (7 << SAI_CR1_DS_SHIFT) /* 32 bits */
+#define SAI_CR1_LSBFIRST           (1 << 8)  /* Bit 8:  Least significant bit first */
+#define SAI_CR1_CKSTR              (1 << 9)  /* Bit 9:  Clock strobing edge */
+#define SAI_CR1_SYNCEN_SHIFT       (10)      /* Bits 10-11: Synchronization enable */
+#define SAI_CR1_SYNCEN_MASK        (3 << SAI_CR1_SYNCEN_SHIFT)
+#  define SAI_CR1_SYNCEN_ASYNCH    (0 << SAI_CR1_SYNCEN_SHIFT) /* Asynchronous mode */
+#  define SAI_CR1_SYNCEN_INTERNAL  (1 << SAI_CR1_SYNCEN_SHIFT) /* Synchronous with other internal sub-block */
+#  define SAI_CR1_SYNCEN_EXTERNAL  (2 << SAI_CR1_SYNCEN_SHIFT) /* Aynchronous with external SAI peripheral */
+#define SAI_CR1_MONO               (1 << 12) /* Bit 12: Mono mode */
+#define SAI_CR1_OUTDRIV            (1 << 13) /* Bit 13: Output drive */
+                                             /* Bits 14-15: Reserved */
+#define SAI_CR1_SAIEN              (1 << 16) /* Bit 16: Audio block enable */
+#define SAI_CR1_DMAEN              (1 << 17) /* Bit 17: DMA enable */
+                                             /* Bit 18: Reserved */
+#define SAI_CR1_NODIV              (1 << 19) /* Bit 19: No divider */
+#define SAI_CR1_MCKDIV_SHIFT       (20)      /* Bits 20-23: Master clock divider */
+#define SAI_CR1_MCKDIV_MASK        (15 << SAI_CR1_MCKDIV_SHIFT)
+#  define SAI_CR1_MCKDIV(n)        ((uint32_t)(n) << SAI_CR1_MCKDIV_SHIFT)
+                                             /* Bits 24-31: Reserved */
+
+/* SAI Configuration Register 2 */
+
+#define SAI_CR2_FTH_SHIFT          (0)       /* Bits 0-2: FIFO threshold */
+#define SAI_CR2_FTH_MASK           (7 << SAI_CR2_FTH_SHIFT)
+#  define SAI_CR2_FTH_EMPTY        (0 << SAI_CR2_FTH_SHIFT) /* FIFO empty */
+#  define SAI_CR2_FTH_1QF          (1 << SAI_CR2_FTH_SHIFT) /* 1/4 FIFO */
+#  define SAI_CR2_FTH_HF           (2 << SAI_CR2_FTH_SHIFT) /* 1/2 FIFO */
+#  define SAI_CR2_FTH_3QF          (3 << SAI_CR2_FTH_SHIFT) /* 3/4 FIFO */
+#  define SAI_CR2_FTH_FULL         (4 << SAI_CR2_FTH_SHIFT) /* FIFO full */
+#define SAI_CR2_FFLUSH             (1 << 3)  /* Bit 3:  FIFO flush */
+#define SAI_CR2_TRIS               (1 << 4)  /* Bit 4:  Tristate management on data line */
+#define SAI_CR2_MUTE               (1 << 5)  /* Bit 5:  Mute */
+#define SAI_CR2_MUTEVAL            (1 << 6)  /* Bit 6:  Mute value */
+#define SAI_CR2_MUTECNT_SHIFT      (7)       /* Bits 7-12: Mute counter */
+#define SAI_CR2_MUTECNT_MASK       (0x3f << SAI_CR2_MUTECNT_SHIFT)
+#  define SAI_CR2_MUTECNT(n)       ((uint32_t)(n) << SAI_CR2_MUTECNT_SHIFT)
+#define SAI_CR2_CPL                (1 << 13) /* Bit 13: Complement */
+#define SAI_CR2_COMP_SHIFT         (14)      /* Bits 14-15: Companding mode */
+#define SAI_CR2_COMP_MASK          (3 << SAI_CR2_COMP_SHIFT)
+#  define SAI_CR2_COMP_NONE        (0 << SAI_CR2_COMP_SHIFT) /* No companding algorithm */
+#  define SAI_CR2_COMP_ULAW        (2 << SAI_CR2_COMP_SHIFT) /* μ-Law algorithm */
+#  define SAI_CR2_COMP_ALAW        (3 << SAI_CR2_COMP_SHIFT) /* A-Law algorithm */
+                                             /* Bits 16-31: Reserved */
+
+/* SAI Frame Configuration Register */
+
+#define SAI_FRCR_FRL_SHIFT         (0)       /* Bits 0-7: Frame length */
+#define SAI_FRCR_FRL_MASK          (0xff << SAI_FRCR_FRL_SHIFT)
+#  define SAI_FRCR_FRL(n)          ((uint32_t)((n) - 1) << SAI_FRCR_FRL_SHIFT)
+#define SAI_FRCR_FSALL_SHIFT       (8)       /* Bits 8-14: Frame synchronization active level length */
+#define SAI_FRCR_FSALL_MASK        (0x7f << SAI_FRCR_FSALL_SHIFT)
+#  define SAI_FRCR_FSALL(n)        ((uint32_t)((n) - 1) << SAI_FRCR_FSALL_SHIFT)
+#define SAI_FRCR_FSDEF             (1 << 16) /* Bit 16: Frame synchronization definition */
+#  define SAI_FRCR_FSDEF_SF        (0)             /* FS signal is a start frame signal */
+#  define SAI_FRCR_FSDEF_CHID      SAI_FRCR_FSDEF  /* FS signal is a start of frame + channel side ID */
+#define SAI_FRCR_FSPOL             (1 << 17) /* Bit 17: Frame synchronization polarity */
+#  define SAI_FRCR_FSPOL_LOW       (0)             /* FS is active low */
+#  define SAI_FRCR_FSPOL_HIGH      SAI_FRCR_FSPOL  /* FS is active high */
+#define SAI_FRCR_FSOFF             (1 << 18) /* Bit 18: Frame synchronization offset */
+#  define SAI_FRCR_FSOFF_FB        (0)             /* FS on first bit of slot 0 */
+#  define SAI_FRCR_FSOFF_BFB       SAI_FRCR_FSOFF  /* FS one bit before first bit of slot 0 */
+                                             /* Bits 19-31: Reserved */
+
+/* SAI Slot Register */
+
+#define SAI_SLOTR_FBOFF_SHIFT      (0)       /* Bits 0-4: First bit offset */
+#define SAI_SLOTR_FBOFF_MASK       (32 << SAI_SLOTR_FBOFF_SHIFT)
+#  define SAI_SLOTR_FBOFF(n)       ((uint32_t)(n) << SAI_SLOTR_FBOFF_SHIFT)
+                                             /* Bit 5: Reserved */
+#define SAI_SLOTR_SLOTSZ_SHIFT     (6)       /* Bits 6-7: Slot size */
+#define SAI_SLOTR_SLOTSZ_MASK      (3 << SAI_SLOTR_SLOTSZ_SHIFT)
+#  define SAI_SLOTR_SLOTSZ_DATA    (0 << SAI_SLOTR_SLOTSZ_SHIFT) /* Same as data size */
+#  define SAI_SLOTR_SLOTSZ_16BIT   (1 << SAI_SLOTR_SLOTSZ_SHIFT) /* 16-bit */
+#  define SAI_SLOTR_SLOTSZ_32BIT   (2 << SAI_SLOTR_SLOTSZ_SHIFT) /* 32-bit */
+#define SAI_SLOTR_NBSLOT_SHIFT     (0)       /* Bits 0-3: Number of slots in an audio frame */
+#define SAI_SLOTR_NBSLOT_MASK      (15 << SAI_SLOTR_NBSLOT_SHIFT)
+#  define SAI_SLOTR_NBSLOT(n)      ((uint32_t)((n) - 1) << SAI_SLOTR_NBSLOT_SHIFT)
+                                             /* Bits 12-15: Reserved */
+#define SAI_SLOTR_SLOTEN_SHIFT     (16)      /* Bits 16-31: Slot enable */
+#define SAI_SLOTR_SLOTEN_MASK      (0xffff << SAI_SLOTR_SLOTEN_SHIFT)
+#  define SAI_SLOTR_SLOTEN(n)      ((uint32_t)(n) << SAI_SLOTR_SLOTEN_SHIFT)
+#  define SAI_SLOTR_SLOTEN_0       (1 << 16)  /* Bit 16: Slot 0 Enabled */
+#  define SAI_SLOTR_SLOTEN_1       (1 << 17)  /* Bit 17: Slot 1 Enabled */
+#  define SAI_SLOTR_SLOTEN_2       (1 << 18)  /* Bit 18: Slot 2 Enabled */
+#  define SAI_SLOTR_SLOTEN_3       (1 << 19)  /* Bit 19: Slot 3 Enabled */
+#  define SAI_SLOTR_SLOTEN_4       (1 << 20)  /* Bit 20: Slot 4 Enabled */
+#  define SAI_SLOTR_SLOTEN_5       (1 << 21)  /* Bit 21: Slot 5 Enabled */
+#  define SAI_SLOTR_SLOTEN_6       (1 << 22)  /* Bit 22: Slot 6 Enabled */
+#  define SAI_SLOTR_SLOTEN_7       (1 << 23)  /* Bit 23: Slot 7 Enabled */
+#  define SAI_SLOTR_SLOTEN_8       (1 << 24)  /* Bit 24: Slot 8 Enabled */
+#  define SAI_SLOTR_SLOTEN_9       (1 << 25)  /* Bit 25: Slot 9 Enabled */
+#  define SAI_SLOTR_SLOTEN_10      (1 << 26)  /* Bit 26: Slot 10 Enabled */
+#  define SAI_SLOTR_SLOTEN_11      (1 << 27)  /* Bit 27: Slot 11 Enabled */
+#  define SAI_SLOTR_SLOTEN_12      (1 << 28)  /* Bit 28: Slot 12 Enabled */
+#  define SAI_SLOTR_SLOTEN_13      (1 << 29)  /* Bit 29: Slot 13 Enabled */
+#  define SAI_SLOTR_SLOTEN_14      (1 << 30)  /* Bit 30: Slot 14 Enabled */
+#  define SAI_SLOTR_SLOTEN_15      (1 << 31)  /* Bit 31: Slot 15 Enabled */
+
+/* SAI Interrupt Mask Register 2, SAI Status Register, and SAI Clear Flag Register */
+
+#define SAI_INT_OVRUDR             (1 << 0)  /* Bit 0:  Overrun/underrun interrupt */
+#define SAI_INT_MUTEDET            (1 << 1)  /* Bit 1:  Mute detection interrupt */
+#define SAI_INT_WCKCFG             (1 << 2)  /* Bit 2:  Wrong clock configuration interrupt */
+#define SAI_INT_FREQ               (1 << 3)  /* Bit 3:  FIFO request interrupt (not CLRFFR) */
+#define SAI_INT_CNRDY              (1 << 4)  /* Bit 4:  Codec not ready interrupt (AC97). */
+#define SAI_INT_AFSDET             (1 << 5)  /* Bit 5:  Anticipated frame synchronization detection interrupt */
+#define SAI_INT_LFSDET             (1 << 6)  /* Bit 6:  Late frame synchronization detection interrupt */
+                                             /* Bits 7-31: Reserved */
+
+/* SAI Data Register (32-bit data) */
+
+#endif /* __ARCH_ARM_STC_STM32L4_CHIP_STM32L4_SAI_H */
diff --git a/arch/arm/src/stm32l4/chip/stm32l4_tim.h b/arch/arm/src/stm32l4/chip/stm32l4_tim.h
new file mode 100644
index 0000000000000000000000000000000000000000..23ff67ad4fed5e3dacdc74a441d25db873be18d6
--- /dev/null
+++ b/arch/arm/src/stm32l4/chip/stm32l4_tim.h
@@ -0,0 +1,1121 @@
+/****************************************************************************************************
+ * arch/arm/src/stm32l4/chip/stm32l4_tim.h
+ *
+ *   Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           dev@ziggurat29.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_TIM_H
+#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_TIM_H
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+/* Register Offsets *********************************************************************************/
+
+/* Basic Timers - TIM6 and TIM7 */
+
+#define STM32L4_BTIM_CR1_OFFSET     0x0000  /* Control register 1 (16-bit) */
+#define STM32L4_BTIM_CR2_OFFSET     0x0004  /* Control register 2 (16-bit) */
+#define STM32L4_BTIM_DIER_OFFSET    0x000c  /* DMA/Interrupt enable register (16-bit) */
+#define STM32L4_BTIM_SR_OFFSET      0x0010  /* Status register (16-bit) */
+#define STM32L4_BTIM_EGR_OFFSET     0x0014  /* Event generation register (16-bit) */
+#define STM32L4_BTIM_CNT_OFFSET     0x0024  /* Counter (16-bit) */
+#define STM32L4_BTIM_PSC_OFFSET     0x0028  /* Prescaler (16-bit) */
+#define STM32L4_BTIM_ARR_OFFSET     0x002c  /* Auto-reload register (16-bit) */
+
+/* 16-/32-bit General Timers with DMA: TIM2, TM3, TIM4, and TIM5
+ * TIM3 and 4 are 16-bit
+ * TIM2 and 5 are 32-bit
+ */
+
+#define STM32L4_GTIM_CR1_OFFSET     0x0000  /* Control register 1 (16-bit) */
+#define STM32L4_GTIM_CR2_OFFSET     0x0004  /* Control register 2 (16-bit, TIM2-5 only) */
+#define STM32L4_GTIM_SMCR_OFFSET    0x0008  /* Slave mode control register (16-bit, TIM2-5 only) */
+#define STM32L4_GTIM_DIER_OFFSET    0x000c  /* DMA/Interrupt enable register (16-bit) */
+#define STM32L4_GTIM_SR_OFFSET      0x0010  /* Status register (16-bit) */
+#define STM32L4_GTIM_EGR_OFFSET     0x0014  /* Event generation register (16-bit) */
+#define STM32L4_GTIM_CCMR1_OFFSET   0x0018  /* Capture/compare mode register 1 (16-bit) */
+#define STM32L4_GTIM_CCMR2_OFFSET   0x001c  /* Capture/compare mode register 2 (16-bit, TIM2-5 only) */
+#define STM32L4_GTIM_CCER_OFFSET    0x0020  /* Capture/compare enable register (16-bit) */
+#define STM32L4_GTIM_CNT_OFFSET     0x0024  /* Counter (16-bit* or 32-bit STM3240 TIM2 and 5 only) */
+#define STM32L4_GTIM_PSC_OFFSET     0x0028  /* Prescaler (16-bit) */
+#define STM32L4_GTIM_ARR_OFFSET     0x002c  /* Auto-reload register (16-bit) */
+#define STM32L4_GTIM_CCR1_OFFSET    0x0034  /* Capture/compare register 1 (16-bit or 32-bit STM3240 TIM2/5 only) */
+#define STM32L4_GTIM_CCR2_OFFSET    0x0038  /* Capture/compare register 2 (16-bit TIM2-5 only or 32-bit STM32 F4 TIM2/5 or STM2 F3 TIM15 only) */
+#define STM32L4_GTIM_CCR3_OFFSET    0x003c  /* Capture/compare register 3 (16-bit TIM2-5 only or 32-bit STM32 F4 TIM2/5 only) */
+#define STM32L4_GTIM_CCR4_OFFSET    0x0040  /* Capture/compare register 4 (16-bit TIM2-5 only or 32-bit STM32 F4 TIM2/5 only) */
+#define STM32L4_GTIM_DCR_OFFSET     0x0048  /* DMA control register (16-bit, TIM2-5 only) */
+#define STM32L4_GTIM_DMAR_OFFSET    0x004c  /* DMA address for burst mode (16-bit, TIM2-5 only) */
+#define STM32L4_GTIM_OR1_OFFSET     0x0050  /* Option register 1 */
+#define STM32L4_GTIM_OR2_OFFSET     0x0060  /* Option register 2 */
+
+/* TIM15, 16, and 17 only.
+ */
+
+#define STM32L4_GTIM_RCR_OFFSET     0x0030  /* Repetition counter register (TIM16/TIM17) */
+#define STM32L4_GTIM_BDTR_OFFSET    0x0044  /* Break and dead-time register (TIM16/TIM17) */
+
+/* Advanced Timers - TIM1 and TIM8 */
+
+#define STM32L4_ATIM_CR1_OFFSET     0x0000  /* Control register 1 (16-bit) */
+#define STM32L4_ATIM_CR2_OFFSET     0x0004  /* Control register 2 (16-bit*) */
+#define STM32L4_ATIM_SMCR_OFFSET    0x0008  /* Slave mode control register (16-bit) */
+#define STM32L4_ATIM_DIER_OFFSET    0x000c  /* DMA/Interrupt enable register (16-bit) */
+#define STM32L4_ATIM_SR_OFFSET      0x0010  /* Status register (16-bit*) */
+#define STM32L4_ATIM_EGR_OFFSET     0x0014  /* Event generation register (16-bit) */
+#define STM32L4_ATIM_CCMR1_OFFSET   0x0018  /* Capture/compare mode register 1 (16-bit*) */
+#define STM32L4_ATIM_CCMR2_OFFSET   0x001c  /* Capture/compare mode register 2 (16-bit*) */
+#define STM32L4_ATIM_CCER_OFFSET    0x0020  /* Capture/compare enable register (16-bit*) */
+#define STM32L4_ATIM_CNT_OFFSET     0x0024  /* Counter (16-bit) */
+#define STM32L4_ATIM_PSC_OFFSET     0x0028  /* Prescaler (16-bit) */
+#define STM32L4_ATIM_ARR_OFFSET     0x002c  /* Auto-reload register (16-bit) */
+#define STM32L4_ATIM_RCR_OFFSET     0x0030  /* Repetition counter register (16-bit) */
+#define STM32L4_ATIM_CCR1_OFFSET    0x0034  /* Capture/compare register 1 (16-bit) */
+#define STM32L4_ATIM_CCR2_OFFSET    0x0038  /* Capture/compare register 2 (16-bit) */
+#define STM32L4_ATIM_CCR3_OFFSET    0x003c  /* Capture/compare register 3 (16-bit) */
+#define STM32L4_ATIM_CCR4_OFFSET    0x0040  /* Capture/compare register 4 (16-bit) */
+#define STM32L4_ATIM_BDTR_OFFSET    0x0044  /* Break and dead-time register (16-bit*) */
+#define STM32L4_ATIM_DCR_OFFSET     0x0048  /* DMA control register (16-bit) */
+#define STM32L4_ATIM_DMAR_OFFSET    0x004c  /* DMA address for burst mode (16-bit) */
+#define STM32L4_ATIM_OR1_OFFSET     0x0050  /* Timer option register 1 */
+#define STM32L4_ATIM_CCMR3_OFFSET   0x0054  /* Capture/compare mode register 3 (32-bit) */
+#define STM32L4_ATIM_CCR5_OFFSET    0x0058  /* Capture/compare register 4 (16-bit) */
+#define STM32L4_ATIM_CCR6_OFFSET    0x005c  /* Capture/compare register 4 (32-bit) */
+#define STM32L4_ATIM_OR2_OFFSET     0x0050  /* Timer option register 2 */
+#define STM32L4_ATIM_OR3_OFFSET     0x0050  /* Timer option register 3 */
+
+/* Low-Power Timers - LPTIM1 and LPTIM2 */
+
+#define STM32L4_LPTIM_ISR_OFFSET    0x0000  /* Interrupt and Status register */
+#define STM32L4_LPTIM_ICR_OFFSET    0x0004  /* Interrupt clear register */
+#define STM32L4_LPTIM_IER_OFFSET    0x0008  /* Interrupt enable register */
+#define STM32L4_LPTIM_CFGR_OFFSET   0x000c  /* Configuration register */
+#define STM32L4_LPTIM_CR_OFFSET     0x0010  /* Control register */
+#define STM32L4_LPTIM_CMP_OFFSET    0x0014  /* Compare register */
+#define STM32L4_LPTIM_ARR_OFFSET    0x0018  /* Auto-reloud register (16-bit) */
+#define STM32L4_LPTIM_CNT_OFFSET    0x001c  /* Counter (16-bit) */
+#define STM32L4_LPTIM_OR_OFFSET     0x001c  /* Options Register */
+
+/* Register Addresses *******************************************************************************/
+
+/* Advanced Timers - TIM1 and TIM8 */
+
+#define STM32L4_TIM1_CR1            (STM32L4_TIM1_BASE+STM32L4_ATIM_CR1_OFFSET)
+#define STM32L4_TIM1_CR2            (STM32L4_TIM1_BASE+STM32L4_ATIM_CR2_OFFSET)
+#define STM32L4_TIM1_SMCR           (STM32L4_TIM1_BASE+STM32L4_ATIM_SMCR_OFFSET)
+#define STM32L4_TIM1_DIER           (STM32L4_TIM1_BASE+STM32L4_ATIM_DIER_OFFSET)
+#define STM32L4_TIM1_SR             (STM32L4_TIM1_BASE+STM32L4_ATIM_SR_OFFSET)
+#define STM32L4_TIM1_EGR            (STM32L4_TIM1_BASE+STM32L4_ATIM_EGR_OFFSET)
+#define STM32L4_TIM1_CCMR1          (STM32L4_TIM1_BASE+STM32L4_ATIM_CCMR1_OFFSET)
+#define STM32L4_TIM1_CCMR2          (STM32L4_TIM1_BASE+STM32L4_ATIM_CCMR2_OFFSET)
+#define STM32L4_TIM1_CCER           (STM32L4_TIM1_BASE+STM32L4_ATIM_CCER_OFFSET)
+#define STM32L4_TIM1_CNT            (STM32L4_TIM1_BASE+STM32L4_ATIM_CNT_OFFSET)
+#define STM32L4_TIM1_PSC            (STM32L4_TIM1_BASE+STM32L4_ATIM_PSC_OFFSET)
+#define STM32L4_TIM1_ARR            (STM32L4_TIM1_BASE+STM32L4_ATIM_ARR_OFFSET)
+#define STM32L4_TIM1_RCR            (STM32L4_TIM1_BASE+STM32L4_ATIM_RCR_OFFSET)
+#define STM32L4_TIM1_CCR1           (STM32L4_TIM1_BASE+STM32L4_ATIM_CCR1_OFFSET)
+#define STM32L4_TIM1_CCR2           (STM32L4_TIM1_BASE+STM32L4_ATIM_CCR2_OFFSET)
+#define STM32L4_TIM1_CCR3           (STM32L4_TIM1_BASE+STM32L4_ATIM_CCR3_OFFSET)
+#define STM32L4_TIM1_CCR4           (STM32L4_TIM1_BASE+STM32L4_ATIM_CCR4_OFFSET)
+#define STM32L4_TIM1_BDTR           (STM32L4_TIM1_BASE+STM32L4_ATIM_BDTR_OFFSET)
+#define STM32L4_TIM1_DCR            (STM32L4_TIM1_BASE+STM32L4_ATIM_DCR_OFFSET)
+#define STM32L4_TIM1_DMAR           (STM32L4_TIM1_BASE+STM32L4_ATIM_DMAR_OFFSET)
+#define STM32L4_TIM1_OR1            (STM32L4_TIM1_BASE+STM32L4_ATIM_OR1_OFFSET)
+#define STM32L4_TIM1_CCMR3          (STM32L4_TIM1_BASE+STM32L4_ATIM_CCMR3_OFFSET)
+#define STM32L4_TIM1_CCR5           (STM32L4_TIM1_BASE+STM32L4_ATIM_CCR5_OFFSET)
+#define STM32L4_TIM1_CCR6           (STM32L4_TIM1_BASE+STM32L4_ATIM_CCR6_OFFSET)
+#define STM32L4_TIM1_OR2            (STM32L4_TIM1_BASE+STM32L4_ATIM_OR2_OFFSET)
+#define STM32L4_TIM1_OR3            (STM32L4_TIM1_BASE+STM32L4_ATIM_OR3_OFFSET)
+
+#define STM32L4_TIM8_CR1            (STM32L4_TIM8_BASE+STM32L4_ATIM_CR1_OFFSET)
+#define STM32L4_TIM8_CR2            (STM32L4_TIM8_BASE+STM32L4_ATIM_CR2_OFFSET)
+#define STM32L4_TIM8_SMCR           (STM32L4_TIM8_BASE+STM32L4_ATIM_SMCR_OFFSET)
+#define STM32L4_TIM8_DIER           (STM32L4_TIM8_BASE+STM32L4_ATIM_DIER_OFFSET)
+#define STM32L4_TIM8_SR             (STM32L4_TIM8_BASE+STM32L4_ATIM_SR_OFFSET)
+#define STM32L4_TIM8_EGR            (STM32L4_TIM8_BASE+STM32L4_ATIM_EGR_OFFSET)
+#define STM32L4_TIM8_CCMR1          (STM32L4_TIM8_BASE+STM32L4_ATIM_CCMR1_OFFSET)
+#define STM32L4_TIM8_CCMR2          (STM32L4_TIM8_BASE+STM32L4_ATIM_CCMR2_OFFSET)
+#define STM32L4_TIM8_CCER           (STM32L4_TIM8_BASE+STM32L4_ATIM_CCER_OFFSET)
+#define STM32L4_TIM8_CNT            (STM32L4_TIM8_BASE+STM32L4_ATIM_CNT_OFFSET)
+#define STM32L4_TIM8_PSC            (STM32L4_TIM8_BASE+STM32L4_ATIM_PSC_OFFSET)
+#define STM32L4_TIM8_ARR            (STM32L4_TIM8_BASE+STM32L4_ATIM_ARR_OFFSET)
+#define STM32L4_TIM8_RCR            (STM32L4_TIM8_BASE+STM32L4_ATIM_RCR_OFFSET)
+#define STM32L4_TIM8_CCR1           (STM32L4_TIM8_BASE+STM32L4_ATIM_CCR1_OFFSET)
+#define STM32L4_TIM8_CCR2           (STM32L4_TIM8_BASE+STM32L4_ATIM_CCR2_OFFSET)
+#define STM32L4_TIM8_CCR3           (STM32L4_TIM8_BASE+STM32L4_ATIM_CCR3_OFFSET)
+#define STM32L4_TIM8_CCR4           (STM32L4_TIM8_BASE+STM32L4_ATIM_CCR4_OFFSET)
+#define STM32L4_TIM8_BDTR           (STM32L4_TIM8_BASE+STM32L4_ATIM_BDTR_OFFSET)
+#define STM32L4_TIM8_DCR            (STM32L4_TIM8_BASE+STM32L4_ATIM_DCR_OFFSET)
+#define STM32L4_TIM8_DMAR           (STM32L4_TIM8_BASE+STM32L4_ATIM_DMAR_OFFSET)
+#define STM32L4_TIM8_OR1            (STM32L4_TIM8_BASE+STM32L4_ATIM_OR1_OFFSET)
+#define STM32L4_TIM8_CCMR3          (STM32L4_TIM8_BASE+STM32L4_ATIM_CCMR3_OFFSET)
+#define STM32L4_TIM8_CCR5           (STM32L4_TIM8_BASE+STM32L4_ATIM_CCR5_OFFSET)
+#define STM32L4_TIM8_CCR6           (STM32L4_TIM8_BASE+STM32L4_ATIM_CCR6_OFFSET)
+#define STM32L4_TIM8_OR2            (STM32L4_TIM8_BASE+STM32L4_ATIM_OR2_OFFSET)
+#define STM32L4_TIM8_OR3            (STM32L4_TIM8_BASE+STM32L4_ATIM_OR3_OFFSET)
+
+/* 16-/32-bit General Timers - TIM2, TIM3, TIM4, and TIM5 with DMA.
+ * TIM3 and 4 are 16-bit.
+ * TIM2 and 5 are 32-bit
+ */
+
+#define STM32L4_TIM2_CR1            (STM32L4_TIM2_BASE+STM32L4_GTIM_CR1_OFFSET)
+#define STM32L4_TIM2_CR2            (STM32L4_TIM2_BASE+STM32L4_GTIM_CR2_OFFSET)
+#define STM32L4_TIM2_SMCR           (STM32L4_TIM2_BASE+STM32L4_GTIM_SMCR_OFFSET)
+#define STM32L4_TIM2_DIER           (STM32L4_TIM2_BASE+STM32L4_GTIM_DIER_OFFSET)
+#define STM32L4_TIM2_SR             (STM32L4_TIM2_BASE+STM32L4_GTIM_SR_OFFSET)
+#define STM32L4_TIM2_EGR            (STM32L4_TIM2_BASE+STM32L4_GTIM_EGR_OFFSET)
+#define STM32L4_TIM2_CCMR1          (STM32L4_TIM2_BASE+STM32L4_GTIM_CCMR1_OFFSET)
+#define STM32L4_TIM2_CCMR2          (STM32L4_TIM2_BASE+STM32L4_GTIM_CCMR2_OFFSET)
+#define STM32L4_TIM2_CCER           (STM32L4_TIM2_BASE+STM32L4_GTIM_CCER_OFFSET)
+#define STM32L4_TIM2_CNT            (STM32L4_TIM2_BASE+STM32L4_GTIM_CNT_OFFSET)
+#define STM32L4_TIM2_PSC            (STM32L4_TIM2_BASE+STM32L4_GTIM_PSC_OFFSET)
+#define STM32L4_TIM2_ARR            (STM32L4_TIM2_BASE+STM32L4_GTIM_ARR_OFFSET)
+#define STM32L4_TIM2_CCR1           (STM32L4_TIM2_BASE+STM32L4_GTIM_CCR1_OFFSET)
+#define STM32L4_TIM2_CCR2           (STM32L4_TIM2_BASE+STM32L4_GTIM_CCR2_OFFSET)
+#define STM32L4_TIM2_CCR3           (STM32L4_TIM2_BASE+STM32L4_GTIM_CCR3_OFFSET)
+#define STM32L4_TIM2_CCR4           (STM32L4_TIM2_BASE+STM32L4_GTIM_CCR4_OFFSET)
+#define STM32L4_TIM2_DCR            (STM32L4_TIM2_BASE+STM32L4_GTIM_DCR_OFFSET)
+#define STM32L4_TIM2_DMAR           (STM32L4_TIM2_BASE+STM32L4_GTIM_DMAR_OFFSET)
+#define STM32L4_TIM2_OR             (STM32L4_TIM2_BASE+STM32L4_GTIM_OR_OFFSET)
+
+#define STM32L4_TIM3_CR1            (STM32L4_TIM3_BASE+STM32L4_GTIM_CR1_OFFSET)
+#define STM32L4_TIM3_CR2            (STM32L4_TIM3_BASE+STM32L4_GTIM_CR2_OFFSET)
+#define STM32L4_TIM3_SMCR           (STM32L4_TIM3_BASE+STM32L4_GTIM_SMCR_OFFSET)
+#define STM32L4_TIM3_DIER           (STM32L4_TIM3_BASE+STM32L4_GTIM_DIER_OFFSET)
+#define STM32L4_TIM3_SR             (STM32L4_TIM3_BASE+STM32L4_GTIM_SR_OFFSET)
+#define STM32L4_TIM3_EGR            (STM32L4_TIM3_BASE+STM32L4_GTIM_EGR_OFFSET)
+#define STM32L4_TIM3_CCMR1          (STM32L4_TIM3_BASE+STM32L4_GTIM_CCMR1_OFFSET)
+#define STM32L4_TIM3_CCMR2          (STM32L4_TIM3_BASE+STM32L4_GTIM_CCMR2_OFFSET)
+#define STM32L4_TIM3_CCER           (STM32L4_TIM3_BASE+STM32L4_GTIM_CCER_OFFSET)
+#define STM32L4_TIM3_CNT            (STM32L4_TIM3_BASE+STM32L4_GTIM_CNT_OFFSET)
+#define STM32L4_TIM3_PSC            (STM32L4_TIM3_BASE+STM32L4_GTIM_PSC_OFFSET)
+#define STM32L4_TIM3_ARR            (STM32L4_TIM3_BASE+STM32L4_GTIM_ARR_OFFSET)
+#define STM32L4_TIM3_CCR1           (STM32L4_TIM3_BASE+STM32L4_GTIM_CCR1_OFFSET)
+#define STM32L4_TIM3_CCR2           (STM32L4_TIM3_BASE+STM32L4_GTIM_CCR2_OFFSET)
+#define STM32L4_TIM3_CCR3           (STM32L4_TIM3_BASE+STM32L4_GTIM_CCR3_OFFSET)
+#define STM32L4_TIM3_CCR4           (STM32L4_TIM3_BASE+STM32L4_GTIM_CCR4_OFFSET)
+#define STM32L4_TIM3_DCR            (STM32L4_TIM3_BASE+STM32L4_GTIM_DCR_OFFSET)
+#define STM32L4_TIM3_DMAR           (STM32L4_TIM3_BASE+STM32L4_GTIM_DMAR_OFFSET)
+
+#define STM32L4_TIM4_CR1            (STM32L4_TIM4_BASE+STM32L4_GTIM_CR1_OFFSET)
+#define STM32L4_TIM4_CR2            (STM32L4_TIM4_BASE+STM32L4_GTIM_CR2_OFFSET)
+#define STM32L4_TIM4_SMCR           (STM32L4_TIM4_BASE+STM32L4_GTIM_SMCR_OFFSET)
+#define STM32L4_TIM4_DIER           (STM32L4_TIM4_BASE+STM32L4_GTIM_DIER_OFFSET)
+#define STM32L4_TIM4_SR             (STM32L4_TIM4_BASE+STM32L4_GTIM_SR_OFFSET)
+#define STM32L4_TIM4_EGR            (STM32L4_TIM4_BASE+STM32L4_GTIM_EGR_OFFSET)
+#define STM32L4_TIM4_CCMR1          (STM32L4_TIM4_BASE+STM32L4_GTIM_CCMR1_OFFSET)
+#define STM32L4_TIM4_CCMR2          (STM32L4_TIM4_BASE+STM32L4_GTIM_CCMR2_OFFSET)
+#define STM32L4_TIM4_CCER           (STM32L4_TIM4_BASE+STM32L4_GTIM_CCER_OFFSET)
+#define STM32L4_TIM4_CNT            (STM32L4_TIM4_BASE+STM32L4_GTIM_CNT_OFFSET)
+#define STM32L4_TIM4_PSC            (STM32L4_TIM4_BASE+STM32L4_GTIM_PSC_OFFSET)
+#define STM32L4_TIM4_ARR            (STM32L4_TIM4_BASE+STM32L4_GTIM_ARR_OFFSET)
+#define STM32L4_TIM4_CCR1           (STM32L4_TIM4_BASE+STM32L4_GTIM_CCR1_OFFSET)
+#define STM32L4_TIM4_CCR2           (STM32L4_TIM4_BASE+STM32L4_GTIM_CCR2_OFFSET)
+#define STM32L4_TIM4_CCR3           (STM32L4_TIM4_BASE+STM32L4_GTIM_CCR3_OFFSET)
+#define STM32L4_TIM4_CCR4           (STM32L4_TIM4_BASE+STM32L4_GTIM_CCR4_OFFSET)
+#define STM32L4_TIM4_DCR            (STM32L4_TIM4_BASE+STM32L4_GTIM_DCR_OFFSET)
+#define STM32L4_TIM4_DMAR           (STM32L4_TIM4_BASE+STM32L4_GTIM_DMAR_OFFSET)
+
+#define STM32L4_TIM5_CR1            (STM32L4_TIM5_BASE+STM32L4_GTIM_CR1_OFFSET)
+#define STM32L4_TIM5_CR2            (STM32L4_TIM5_BASE+STM32L4_GTIM_CR2_OFFSET)
+#define STM32L4_TIM5_SMCR           (STM32L4_TIM5_BASE+STM32L4_GTIM_SMCR_OFFSET)
+#define STM32L4_TIM5_DIER           (STM32L4_TIM5_BASE+STM32L4_GTIM_DIER_OFFSET)
+#define STM32L4_TIM5_SR             (STM32L4_TIM5_BASE+STM32L4_GTIM_SR_OFFSET)
+#define STM32L4_TIM5_EGR            (STM32L4_TIM5_BASE+STM32L4_GTIM_EGR_OFFSET)
+#define STM32L4_TIM5_CCMR1          (STM32L4_TIM5_BASE+STM32L4_GTIM_CCMR1_OFFSET)
+#define STM32L4_TIM5_CCMR2          (STM32L4_TIM5_BASE+STM32L4_GTIM_CCMR2_OFFSET)
+#define STM32L4_TIM5_CCER           (STM32L4_TIM5_BASE+STM32L4_GTIM_CCER_OFFSET)
+#define STM32L4_TIM5_CNT            (STM32L4_TIM5_BASE+STM32L4_GTIM_CNT_OFFSET)
+#define STM32L4_TIM5_PSC            (STM32L4_TIM5_BASE+STM32L4_GTIM_PSC_OFFSET)
+#define STM32L4_TIM5_ARR            (STM32L4_TIM5_BASE+STM32L4_GTIM_ARR_OFFSET)
+#define STM32L4_TIM5_CCR1           (STM32L4_TIM5_BASE+STM32L4_GTIM_CCR1_OFFSET)
+#define STM32L4_TIM5_CCR2           (STM32L4_TIM5_BASE+STM32L4_GTIM_CCR2_OFFSET)
+#define STM32L4_TIM5_CCR3           (STM32L4_TIM5_BASE+STM32L4_GTIM_CCR3_OFFSET)
+#define STM32L4_TIM5_CCR4           (STM32L4_TIM5_BASE+STM32L4_GTIM_CCR4_OFFSET)
+#define STM32L4_TIM5_DCR            (STM32L4_TIM5_BASE+STM32L4_GTIM_DCR_OFFSET)
+#define STM32L4_TIM5_DMAR           (STM32L4_TIM5_BASE+STM32L4_GTIM_DMAR_OFFSET)
+#define STM32L4_TIM5_OR             (STM32L4_TIM5_BASE+STM32L4_GTIM_OR_OFFSET)
+
+#define STM32L4_TIM15_CR1           (STM32L4_TIM15_BASE+STM32L4_GTIM_CR1_OFFSET)
+#define STM32L4_TIM15_CR2           (STM32L4_TIM15_BASE+STM32L4_GTIM_CR2_OFFSET)
+#define STM32L4_TIM15_SMCR          (STM32L4_TIM15_BASE+STM32L4_GTIM_SMCR_OFFSET)
+#define STM32L4_TIM15_DIER          (STM32L4_TIM15_BASE+STM32L4_GTIM_DIER_OFFSET)
+#define STM32L4_TIM15_SR            (STM32L4_TIM15_BASE+STM32L4_GTIM_SR_OFFSET)
+#define STM32L4_TIM15_EGR           (STM32L4_TIM15_BASE+STM32L4_GTIM_EGR_OFFSET)
+#define STM32L4_TIM15_CCMR1         (STM32L4_TIM15_BASE+STM32L4_GTIM_CCMR1_OFFSET)
+#define STM32L4_TIM15_CCER          (STM32L4_TIM15_BASE+STM32L4_GTIM_CCER_OFFSET)
+#define STM32L4_TIM15_CNT           (STM32L4_TIM15_BASE+STM32L4_GTIM_CNT_OFFSET)
+#define STM32L4_TIM15_PSC           (STM32L4_TIM15_BASE+STM32L4_GTIM_PSC_OFFSET)
+#define STM32L4_TIM15_ARR           (STM32L4_TIM15_BASE+STM32L4_GTIM_ARR_OFFSET)
+#define STM32L4_TIM15_RCR           (STM32L4_TIM15_BASE+STM32L4_GTIM_RCR_OFFSET)
+#define STM32L4_TIM15_CCR1          (STM32L4_TIM15_BASE+STM32L4_GTIM_CCR1_OFFSET)
+#define STM32L4_TIM15_CCR2          (STM32L4_TIM15_BASE+STM32L4_GTIM_CCR2_OFFSET)
+#define STM32L4_TIM15_BDTR          (STM32L4_TIM15_BASE+STM32L4_GTIM_BDTR_OFFSET)
+#define STM32L4_TIM15_DCR           (STM32L4_TIM15_BASE+STM32L4_GTIM_DCR_OFFSET)
+#define STM32L4_TIM15_DMAR          (STM32L4_TIM15_BASE+STM32L4_GTIM_DMAR_OFFSET)
+
+#define STM32L4_TIM16_CR1           (STM32L4_TIM16_BASE+STM32L4_GTIM_CR1_OFFSET)
+#define STM32L4_TIM16_CR2           (STM32L4_TIM16_BASE+STM32L4_GTIM_CR2_OFFSET)
+#define STM32L4_TIM16_DIER          (STM32L4_TIM16_BASE+STM32L4_GTIM_DIER_OFFSET)
+#define STM32L4_TIM16_SR            (STM32L4_TIM16_BASE+STM32L4_GTIM_SR_OFFSET)
+#define STM32L4_TIM16_EGR           (STM32L4_TIM16_BASE+STM32L4_GTIM_EGR_OFFSET)
+#define STM32L4_TIM16_CCMR1         (STM32L4_TIM16_BASE+STM32L4_GTIM_CCMR1_OFFSET)
+#define STM32L4_TIM16_CCMR2         (STM32L4_TIM16_BASE+STM32L4_GTIM_CCMR2_OFFSET)
+#define STM32L4_TIM16_CCER          (STM32L4_TIM16_BASE+STM32L4_GTIM_CCER_OFFSET)
+#define STM32L4_TIM16_CNT           (STM32L4_TIM16_BASE+STM32L4_GTIM_CNT_OFFSET)
+#define STM32L4_TIM16_PSC           (STM32L4_TIM16_BASE+STM32L4_GTIM_PSC_OFFSET)
+#define STM32L4_TIM16_ARR           (STM32L4_TIM16_BASE+STM32L4_GTIM_ARR_OFFSET)
+#define STM32L4_TIM16_RCR           (STM32L4_TIM16_BASE+STM32L4_GTIM_RCR_OFFSET)
+#define STM32L4_TIM16_CCR1          (STM32L4_TIM16_BASE+STM32L4_GTIM_CCR1_OFFSET)
+#define STM32L4_TIM16_BDTR          (STM32L4_TIM16_BASE+STM32L4_GTIM_BDTR_OFFSET)
+#define STM32L4_TIM16_DCR           (STM32L4_TIM16_BASE+STM32L4_GTIM_DCR_OFFSET)
+#define STM32L4_TIM16_DMAR          (STM32L4_TIM16_BASE+STM32L4_GTIM_DMAR_OFFSET)
+#define STM32L4_TIM16_OR            (STM32L4_TIM16_BASE+STM32L4_GTIM_OR_OFFSET)
+
+#define STM32L4_TIM17_CR1           (STM32L4_TIM17_BASE+STM32L4_GTIM_CR1_OFFSET)
+#define STM32L4_TIM17_CR2           (STM32L4_TIM17_BASE+STM32L4_GTIM_CR2_OFFSET)
+#define STM32L4_TIM17_DIER          (STM32L4_TIM17_BASE+STM32L4_GTIM_DIER_OFFSET)
+#define STM32L4_TIM17_SR            (STM32L4_TIM17_BASE+STM32L4_GTIM_SR_OFFSET)
+#define STM32L4_TIM17_EGR           (STM32L4_TIM17_BASE+STM32L4_GTIM_EGR_OFFSET)
+#define STM32L4_TIM17_CCMR1         (STM32L4_TIM17_BASE+STM32L4_GTIM_CCMR1_OFFSET)
+#define STM32L4_TIM17_CCMR2         (STM32L4_TIM17_BASE+STM32L4_GTIM_CCMR2_OFFSET)
+#define STM32L4_TIM17_CCER          (STM32L4_TIM17_BASE+STM32L4_GTIM_CCER_OFFSET)
+#define STM32L4_TIM17_CNT           (STM32L4_TIM17_BASE+STM32L4_GTIM_CNT_OFFSET)
+#define STM32L4_TIM17_PSC           (STM32L4_TIM17_BASE+STM32L4_GTIM_PSC_OFFSET)
+#define STM32L4_TIM17_ARR           (STM32L4_TIM17_BASE+STM32L4_GTIM_ARR_OFFSET)
+#define STM32L4_TIM17_RCR           (STM32L4_TIM17_BASE+STM32L4_GTIM_RCR_OFFSET)
+#define STM32L4_TIM17_CCR1          (STM32L4_TIM17_BASE+STM32L4_GTIM_CCR1_OFFSET)
+#define STM32L4_TIM17_BDTR          (STM32L4_TIM17_BASE+STM32L4_GTIM_BDTR_OFFSET)
+#define STM32L4_TIM17_DCR           (STM32L4_TIM17_BASE+STM32L4_GTIM_DCR_OFFSET)
+#define STM32L4_TIM17_DMAR          (STM32L4_TIM17_BASE+STM32L4_GTIM_DMAR_OFFSET)
+
+/* Basic Timers - TIM6 and TIM7 */
+
+#define STM32L4_TIM6_CR1            (STM32L4_TIM6_BASE+STM32L4_BTIM_CR1_OFFSET)
+#define STM32L4_TIM6_CR2            (STM32L4_TIM6_BASE+STM32L4_BTIM_CR2_OFFSET)
+#define STM32L4_TIM6_DIER           (STM32L4_TIM6_BASE+STM32L4_BTIM_DIER_OFFSET)
+#define STM32L4_TIM6_SR             (STM32L4_TIM6_BASE+STM32L4_BTIM_SR_OFFSET)
+#define STM32L4_TIM6_EGR            (STM32L4_TIM6_BASE+STM32L4_BTIM_EGR_OFFSET)
+#define STM32L4_TIM6_CNT            (STM32L4_TIM6_BASE+STM32L4_BTIM_CNT_OFFSET)
+#define STM32L4_TIM6_PSC            (STM32L4_TIM6_BASE+STM32L4_BTIM_PSC_OFFSET)
+#define STM32L4_TIM6_ARR            (STM32L4_TIM6_BASE+STM32L4_BTIM_ARR_OFFSET)
+
+#define STM32L4_TIM7_CR1            (STM32L4_TIM7_BASE+STM32L4_BTIM_CR1_OFFSET)
+#define STM32L4_TIM7_CR2            (STM32L4_TIM7_BASE+STM32L4_BTIM_CR2_OFFSET)
+#define STM32L4_TIM7_DIER           (STM32L4_TIM7_BASE+STM32L4_BTIM_DIER_OFFSET)
+#define STM32L4_TIM7_SR             (STM32L4_TIM7_BASE+STM32L4_BTIM_SR_OFFSET)
+#define STM32L4_TIM7_EGR            (STM32L4_TIM7_BASE+STM32L4_BTIM_EGR_OFFSET)
+#define STM32L4_TIM7_CNT            (STM32L4_TIM7_BASE+STM32L4_BTIM_CNT_OFFSET)
+#define STM32L4_TIM7_PSC            (STM32L4_TIM7_BASE+STM32L4_BTIM_PSC_OFFSET)
+#define STM32L4_TIM7_ARR            (STM32L4_TIM7_BASE+STM32L4_BTIM_ARR_OFFSET)
+
+/* Register Bitfield Definitions ********************************************************************/
+
+/* Control register 1 */
+
+#define ATIM_CR1_CEN                (1 << 0)  /* Bit 0: Counter enable */
+#define ATIM_CR1_UDIS               (1 << 1)  /* Bit 1: Update disable */
+#define ATIM_CR1_URS                (1 << 2)  /* Bit 2: Update request source */
+#define ATIM_CR1_OPM                (1 << 3)  /* Bit 3: One pulse mode */
+#define ATIM_CR1_DIR                (1 << 4)  /* Bit 4: Direction */
+#define ATIM_CR1_CMS_SHIFT          (5)       /* Bits 6-5: Center-aligned mode selection */
+#define ATIM_CR1_CMS_MASK           (3 << ATIM_CR1_CMS_SHIFT)
+#  define ATIM_CR1_EDGE             (0 << ATIM_CR1_CMS_SHIFT) /* 00: Edge-aligned mode */
+#  define ATIM_CR1_CENTER1          (1 << ATIM_CR1_CMS_SHIFT) /* 01: Center-aligned mode 1 */
+#  define ATIM_CR1_CENTER2          (2 << ATIM_CR1_CMS_SHIFT) /* 10: Center-aligned mode 2 */
+#  define ATIM_CR1_CENTER3          (3 << ATIM_CR1_CMS_SHIFT) /* 11: Center-aligned mode 3 */
+#define ATIM_CR1_ARPE               (1 << 7)  /* Bit 7: Auto-reload preload enable */
+#define ATIM_CR1_CKD_SHIFT          (8)       /* Bits 9-8: Clock division */
+#define ATIM_CR1_CKD_MASK           (3 << ATIM_CR1_CKD_SHIFT)
+#  define ATIM_CR1_TCKINT           (0 << ATIM_CR1_CKD_SHIFT) /* 00: tDTS=tCK_INT */
+#  define ATIM_CR1_2TCKINT          (1 << ATIM_CR1_CKD_SHIFT) /* 01: tDTS=2*tCK_INT */
+#  define ATIM_CR1_4TCKINT          (2 << ATIM_CR1_CKD_SHIFT) /* 10: tDTS=4*tCK_INT */
+#define ATIM_CR1_UIFREMAP           (1 << 11) /* Bit 11: UIF status bit remapping */
+
+/* Control register 2 */
+
+#define ATIM_CR2_CCPC               (1 << 0)  /* Bit 0:  Capture/Compare Preloaded Control */
+#define ATIM_CR2_CCUS               (1 << 2)  /* Bit 2:  Capture/Compare Control Update Selection */
+#define ATIM_CR2_CCDS               (1 << 3)  /* Bit 3:  Capture/Compare DMA Selection */
+#define ATIM_CR2_MMS_SHIFT          (4)       /* Bits 6-4: Master Mode Selection */
+#define ATIM_CR2_MMS_MASK           (7 << ATIM_CR2_MMS_SHIFT)
+#  define ATIM_CR2_MMS_RESET        (0 << ATIM_CR2_MMS_SHIFT) /* 000: Reset - TIMx_EGR UG bit is TRGO */
+#  define ATIM_CR2_MMS_ENABLE       (1 << ATIM_CR2_MMS_SHIFT) /* 001: Enable - CNT_EN is TRGO */
+#  define ATIM_CR2_MMS_UPDATE       (2 << ATIM_CR2_MMS_SHIFT) /* 010: Update event is TRGO */
+#  define ATIM_CR2_MMS_COMPP        (3 << ATIM_CR2_MMS_SHIFT) /* 010: Compare Pulse - CC1IF flag */
+#  define ATIM_CR2_MMS_OC1REF       (4 << ATIM_CR2_MMS_SHIFT) /* 100: Compare OC1REF is TRGO */
+#  define ATIM_CR2_MMS_OC2REF       (5 << ATIM_CR2_MMS_SHIFT) /* 101: Compare OC2REF is TRGO */
+#  define ATIM_CR2_MMS_OC3REF       (6 << ATIM_CR2_MMS_SHIFT) /* 110: Compare OC3REF is TRGO */
+#  define ATIM_CR2_MMS_OC4REF       (7 << ATIM_CR2_MMS_SHIFT) /* 111: Compare OC4REF is TRGO */
+#define ATIM_CR2_TI1S               (1 << 7)  /* Bit 7: TI1 Selection */
+#define ATIM_CR2_OIS1               (1 << 8)  /* Bit 8:  Output Idle state 1 (OC1 output) */
+#define ATIM_CR2_OIS1N              (1 << 9)  /* Bit 9:  Output Idle state 1 (OC1N output) */
+#define ATIM_CR2_OIS2               (1 << 10) /* Bit 10: Output Idle state 2 (OC2 output) */
+#define ATIM_CR2_OIS2N              (1 << 11) /* Bit 11: Output Idle state 2 (OC2N output) */
+#define ATIM_CR2_OIS3               (1 << 12) /* Bit 12: Output Idle state 3 (OC3 output) */
+#define ATIM_CR2_OIS3N              (1 << 13) /* Bit 13: Output Idle state 3 (OC3N output) */
+#define ATIM_CR2_OIS4               (1 << 14) /* Bit 14: Output Idle state 4 (OC4 output) */
+#define ATIM_CR2_OIS5               (1 << 16) /* Bit 16: OOutput Idle state 5 (OC5 output) */
+#define ATIM_CR2_OIS6               (1 << 18) /* Bit 18: Output Idle state 6 (OC6 output) */
+#define ATIM_CR2_MMS2_SHIFT         (20)      /* Bits 20-23: Master Mode Selection 2 */
+#define ATIM_CR2_MMS2_MASK          (15 << ATIM_CR2_MMS2_SHIFT)
+#  define ATIM_CR2_MMS2_RESET       (0 << ATIM_CR2_MMS2_SHIFT)  /* 0000: Reset - TIMx_EGR UG bit is TRG9 */
+#  define ATIM_CR2_MMS2_ENABLE      (1 << ATIM_CR2_MMS2_SHIFT)  /* 0001: Enable - CNT_EN is TRGO2 */
+#  define ATIM_CR2_MMS2_UPDATE      (2 << ATIM_CR2_MMS2_SHIFT)  /* 0010: Update event is TRGH0*/
+#  define ATIM_CR2_MMS2_COMPP       (3 << ATIM_CR2_MMS2_SHIFT)  /* 0010: Compare Pulse - CC1IF flag */
+#  define ATIM_CR2_MMS2_OC1REF      (4 << ATIM_CR2_MMS2_SHIFT)  /* 0100: Compare OC1REF is TRGO2 */
+#  define ATIM_CR2_MMS2_OC2REF      (5 << ATIM_CR2_MMS2_SHIFT)  /* 0101: Compare OC2REF is TRGO2 */
+#  define ATIM_CR2_MMS2_OC3REF      (6 << ATIM_CR2_MMS2_SHIFT)  /* 0110: Compare OC3REF is TRGO2 */
+#  define ATIM_CR2_MMS2_OC4REF      (7 << ATIM_CR2_MMS2_SHIFT)  /* 0111: Compare OC4REF is TRGO2 */
+#  define ATIM_CR2_MMS2_OC5REF      (8 << ATIM_CR2_MMS2_SHIFT)  /* 1000: Compare OC5REF is TRGO2 */
+#  define ATIM_CR2_MMS2_OC6REF      (9 << ATIM_CR2_MMS2_SHIFT)  /* 1001: Compare OC6REF is TRGO2 */
+#  define ATIM_CR2_MMS2_CMPOC4      (10 << ATIM_CR2_MMS2_SHIFT) /* 1010: Compare pulse - OC4REF edge is TRGO2 */
+#  define ATIM_CR2_MMS2_CMPOC6      (11 << ATIM_CR2_MMS2_SHIFT) /* 1011: Compare pulse - OC6REF edge is TRGO2 */
+#  define ATIM_CR2_MMS2_CMPOC4R6R   (12 << ATIM_CR2_MMS2_SHIFT) /* 1100: Compare pulse - OC4REF/OC6REF rising */
+#  define ATIM_CR2_MMS2_CMPOC4R6F   (13 << ATIM_CR2_MMS2_SHIFT) /* 1101: Compare pulse - OC4REF rising/OC6REF falling */
+#  define ATIM_CR2_MMS2_CMPOC5R6R   (14 << ATIM_CR2_MMS2_SHIFT) /* 1110: Compare pulse - OC5REF/OC6REF rising */
+#  define ATIM_CR2_MMS2_CMPOC5R6F   (15 << ATIM_CR2_MMS2_SHIFT) /* 1111: Compare pulse - OC5REF rising/OC6REF falling */
+
+/* Slave mode control register */
+
+#define ATIM_SMCR_SMS_SHIFT       (0)       /* Bits 0-2: Slave mode selection */
+#define ATIM_SMCR_SMS_MASK        (7 << ATIM_SMCR_SMS_SHIFT)
+#  define ATIM_SMCR_DISAB         (0 << ATIM_SMCR_SMS_SHIFT) /* 000: Slave mode disabled */
+#  define ATIM_SMCR_ENCMD1        (1 << ATIM_SMCR_SMS_SHIFT) /* 001: Encoder mode 1 */
+#  define ATIM_SMCR_ENCMD2        (2 << ATIM_SMCR_SMS_SHIFT) /* 010: Encoder mode 2 */
+#  define ATIM_SMCR_ENCMD3        (3 << ATIM_SMCR_SMS_SHIFT) /* 011: Encoder mode 3 */
+#  define ATIM_SMCR_RESET         (4 << ATIM_SMCR_SMS_SHIFT) /* 100: Reset Mode */
+#  define ATIM_SMCR_GATED         (5 << ATIM_SMCR_SMS_SHIFT) /* 101: Gated Mode */
+#  define ATIM_SMCR_TRIGGER       (6 << ATIM_SMCR_SMS_SHIFT) /* 110: Trigger Mode */
+#  define ATIM_SMCR_EXTCLK1       (7 << ATIM_SMCR_SMS_SHIFT) /* 111: External Clock Mode 1 */
+#define ATIM_SMCR_OCCS            (1 << 3)  /* Bit 3: OCREF clear selection */
+#define ATIM_SMCR_TS_SHIFT        (4)       /* Bits 4-6: Trigger selection */
+#define ATIM_SMCR_TS_MASK         (7 << ATIM_SMCR_TS_SHIFT)
+#  define ATIM_SMCR_ITR0          (0 << ATIM_SMCR_TS_SHIFT) /* 000: Internal trigger 0 (ITR0) */
+#  define ATIM_SMCR_ITR1          (1 << ATIM_SMCR_TS_SHIFT) /* 001: Internal trigger 1 (ITR1) */
+#  define ATIM_SMCR_ITR2          (2 << ATIM_SMCR_TS_SHIFT) /* 010: Internal trigger 2 (ITR2) */
+#  define ATIM_SMCR_ITR3          (3 << ATIM_SMCR_TS_SHIFT) /* 011: Internal trigger 3 (ITR3) */
+#  define ATIM_SMCR_T1FED         (4 << ATIM_SMCR_TS_SHIFT) /* 100: TI1 Edge Detector (TI1F_ED) */
+#  define ATIM_SMCR_TI1FP1        (5 << ATIM_SMCR_TS_SHIFT) /* 101: Filtered Timer Input 1 (TI1FP1) */
+#  define ATIM_SMCR_T12FP2        (6 << ATIM_SMCR_TS_SHIFT) /* 110: Filtered Timer Input 2 (TI2FP2) */
+#  define ATIM_SMCR_ETRF          (7 << ATIM_SMCR_TS_SHIFT) /* 111: External Trigger input (ETRF) */
+#define ATIM_SMCR_MSM             (1 << 7)  /* Bit 7: Master/slave mode */
+#define ATIM_SMCR_ETF_SHIFT       (8)       /* Bits 8-11: External trigger filter */
+#define ATIM_SMCR_ETF_MASK        (0x0f << ATIM_SMCR_ETF_SHIFT)
+#  define ATIM_SMCR_NOFILT        (0 << ATIM_SMCR_ETF_SHIFT) /* 0000: No filter, sampling is done at fDTS */
+#  define ATIM_SMCR_FCKINT2       (1 << ATIM_SMCR_ETF_SHIFT) /* 0001: fSAMPLING=fCK_INT, N=2 */
+#  define ATIM_SMCR_FCKINT4       (2 << ATIM_SMCR_ETF_SHIFT) /* 0010: fSAMPLING=fCK_INT, N=4 */
+#  define ATIM_SMCR_FCKINT8       (3 << ATIM_SMCR_ETF_SHIFT) /* 0011: fSAMPLING=fCK_INT, N=8 */
+#  define ATIM_SMCR_FDTSd26       (4 << ATIM_SMCR_ETF_SHIFT) /* 0100: fSAMPLING=fDTS/2, N=6 */
+#  define ATIM_SMCR_FDTSd28       (5 << ATIM_SMCR_ETF_SHIFT) /* 0101: fSAMPLING=fDTS/2, N=8 */
+#  define ATIM_SMCR_FDTSd46       (6 << ATIM_SMCR_ETF_SHIFT) /* 0110: fSAMPLING=fDTS/4, N=6 */
+#  define ATIM_SMCR_FDTSd48       (7 << ATIM_SMCR_ETF_SHIFT) /* 0111: fSAMPLING=fDTS/4, N=8 */
+#  define ATIM_SMCR_FDTSd86       (8 << ATIM_SMCR_ETF_SHIFT) /* 1000: fSAMPLING=fDTS/8, N=6 */
+#  define ATIM_SMCR_FDTSd88       (9 << ATIM_SMCR_ETF_SHIFT) /* 1001: fSAMPLING=fDTS/8, N=8 */
+#  define ATIM_SMCR_FDTSd165      (10 << ATIM_SMCR_ETF_SHIFT) /* 1010: fSAMPLING=fDTS/16, N=5 */
+#  define ATIM_SMCR_FDTSd166      (11 << ATIM_SMCR_ETF_SHIFT) /* 1011: fSAMPLING=fDTS/16, N=6 */
+#  define ATIM_SMCR_FDTSd168      (12 << ATIM_SMCR_ETF_SHIFT) /* 1100: fSAMPLING=fDTS/16, N=8 */
+#  define ATIM_SMCR_FDTSd325      (13 << ATIM_SMCR_ETF_SHIFT) /* 1101: fSAMPLING=fDTS/32, N=5 */
+#  define ATIM_SMCR_FDTSd326      (14 << ATIM_SMCR_ETF_SHIFT) /* 1110: fSAMPLING=fDTS/32, N=6 */
+#  define ATIM_SMCR_FDTSd328      (15 << ATIM_SMCR_ETF_SHIFT) /* 1111: fSAMPLING=fDTS/32, N=8 */
+#define ATIM_SMCR_ETPS_SHIFT      (12)      /* Bits 12-13: External trigger prescaler */
+#define ATIM_SMCR_ETPS_MASK       (3 << ATIM_SMCR_ETPS_SHIFT)
+#  define ATIM_SMCR_PSCOFF        (0 << ATIM_SMCR_ETPS_SHIFT) /* 00: Prescaler OFF */
+#  define ATIM_SMCR_ETRPd2        (1 << ATIM_SMCR_ETPS_SHIFT) /* 01: ETRP frequency divided by 2 */
+#  define ATIM_SMCR_ETRPd4        (2 << ATIM_SMCR_ETPS_SHIFT) /* 10: ETRP frequency divided by 4 */
+#  define ATIM_SMCR_ETRPd8        (3 << ATIM_SMCR_ETPS_SHIFT) /* 11: ETRP frequency divided by 8 */
+#define ATIM_SMCR_ECE             (1 << 14) /* Bit 14: External clock enable */
+#define ATIM_SMCR_ETP             (1 << 15) /* Bit 15: External trigger polarity */
+#define ATIM_SMCR_SMS             (1 << 16) /* Bit 16: Slave mode selection - bit 3 */
+
+/* DMA/Interrupt enable register */
+
+#define ATIM_DIER_UIE             (1 << 0)  /* Bit 0: Update interrupt enable */
+#define ATIM_DIER_CC1IE           (1 << 1)  /* Bit 1: Capture/Compare 1 interrupt enable */
+#define ATIM_DIER_CC2IE           (1 << 2)  /* Bit 2: Capture/Compare 2 interrupt enable */
+#define ATIM_DIER_CC3IE           (1 << 3)  /* Bit 3: Capture/Compare 3 interrupt enable */
+#define ATIM_DIER_CC4IE           (1 << 4)  /* Bit 4: Capture/Compare 4 interrupt enable */
+#define ATIM_DIER_COMIE           (1 << 5)  /* Bit 5: COM interrupt enable */
+#define ATIM_DIER_TIE             (1 << 6)  /* Bit 6: Trigger interrupt enable */
+#define ATIM_DIER_BIE             (1 << 7)  /* Bit 7: Break interrupt enable */
+#define ATIM_DIER_UDE             (1 << 8)  /* Bit 8: Update DMA request enable */
+#define ATIM_DIER_CC1DE           (1 << 9)  /* Bit 9: Capture/Compare 1 DMA request enable */
+#define ATIM_DIER_CC2DE           (1 << 10) /* Bit 10: Capture/Compare 2 DMA request enable */
+#define ATIM_DIER_CC3DE           (1 << 11) /* Bit 11: Capture/Compare 3 DMA request enable */
+#define ATIM_DIER_CC4DE           (1 << 12) /* Bit 12: Capture/Compare 4 DMA request enable */
+#define ATIM_DIER_COMDE           (1 << 13) /* Bit 13: COM DMA request enable */
+#define ATIM_DIER_TDE             (1 << 14) /* Bit 14: Trigger DMA request enable */
+
+/* Status register */
+
+#define ATIM_SR_UIF               (1 << 0)  /* Bit 0:  Update interrupt Flag */
+#define ATIM_SR_CC1IF             (1 << 1)  /* Bit 1:  Capture/Compare 1 interrupt Flag */
+#define ATIM_SR_CC2IF             (1 << 2)  /* Bit 2:  Capture/Compare 2 interrupt Flag */
+#define ATIM_SR_CC3IF             (1 << 3)  /* Bit 3:  Capture/Compare 3 interrupt Flag */
+#define ATIM_SR_CC4IF             (1 << 4)  /* Bit 4:  Capture/Compare 4 interrupt Flag */
+#define ATIM_SR_COMIF             (1 << 5)  /* Bit 5:  COM interrupt Flag */
+#define ATIM_SR_TIF               (1 << 6)  /* Bit 6:  Trigger interrupt Flag */
+#define ATIM_SR_BIF               (1 << 7)  /* Bit 7:  Break interrupt Flag */
+#define ATIM_SR_B2IF              (1 << 8)  /* Bit 8:  Break 2 interrupt Flag */
+#define ATIM_SR_CC1OF             (1 << 9)  /* Bit 9:  Capture/Compare 1 Overcapture Flag */
+#define ATIM_SR_CC2OF             (1 << 10) /* Bit 10: Capture/Compare 2 Overcapture Flag */
+#define ATIM_SR_CC3OF             (1 << 11) /* Bit 11: Capture/Compare 3 Overcapture Flag */
+#define ATIM_SR_CC4OF             (1 << 12) /* Bit 12: Capture/Compare 4 Overcapture Flag */
+#define ATIM_SR_SBIF              (1 << 13) /* Bit 13: System break interrupt Flag */
+#define ATIM_SR_CC5IF             (1 << 16) /* Bit 16: Compare 5 interrupt flag */
+#define ATIM_SR_CC6IF             (1 << 17) /* Bit 17: Compare 6 interrupt flag */
+
+/* Event generation register */
+
+#define ATIM_EGR_UG               (1 << 0)  /* Bit 0: Update Generation */
+#define ATIM_EGR_CC1G             (1 << 1)  /* Bit 1: Capture/Compare 1 Generation */
+#define ATIM_EGR_CC2G             (1 << 2)  /* Bit 2: Capture/Compare 2 Generation */
+#define ATIM_EGR_CC3G             (1 << 3)  /* Bit 3: Capture/Compare 3 Generation */
+#define ATIM_EGR_CC4G             (1 << 4)  /* Bit 4: Capture/Compare 4 Generation */
+#define ATIM_EGR_COMG             (1 << 5)  /* Bit 5: Capture/Compare Control Update Generation */
+#define ATIM_EGR_TG               (1 << 6)  /* Bit 6: Trigger Generation */
+#define ATIM_EGR_BG               (1 << 7)  /* Bit 7: Break Generation */
+#define ATIM_EGR_B2G              (1 << 8)  /* Bit 8: Break 2 Generation */
+
+/* Capture/compare mode register 1 -- Output compare mode */
+
+#define ATIM_CCMR1_CC1S_SHIFT     (0)       /* Bits 1-0: Capture/Compare 1 Selection */
+#define ATIM_CCMR1_CC1S_MASK      (3 << ATIM_CCMR1_CC1S_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR1_OC1FE          (1 << 2)  /* Bit 2: Output Compare 1 Fast enable */
+#define ATIM_CCMR1_OC1PE          (1 << 3)  /* Bit 3: Output Compare 1 Preload enable */
+#define ATIM_CCMR1_OC1M_SHIFT     (4)       /* Bits 6-4: Output Compare 1 Mode */
+#define ATIM_CCMR1_OC1M_MASK      (7 << ATIM_CCMR1_OC1M_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR1_OC1CE          (1 << 7)  /* Bit 7: Output Compare 1Clear Enable */
+#define ATIM_CCMR1_CC2S_SHIFT     (8)       /* Bits 8-9: Capture/Compare 2 Selection */
+#define ATIM_CCMR1_CC2S_MASK      (3 << ATIM_CCMR1_CC2S_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR1_OC2FE          (1 << 10) /* Bit 10: Output Compare 2 Fast enable */
+#define ATIM_CCMR1_OC2PE          (1 << 11) /* Bit 11: Output Compare 2 Preload enable */
+#define ATIM_CCMR1_OC2M_SHIFT     (12)      /* Bits 14-12: Output Compare 2 Mode */
+#define ATIM_CCMR1_OC2M_MASK      (7 << ATIM_CCMR1_OC2M_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR1_OC2CE          (1 << 15) /* Bit 15: Output Compare 2 Clear Enable */
+#define ATIM_CCMR1_OC1M           (1 << 16) /* Bit 16: Output Compare 1 mode - bit 3 */
+#define ATIM_CCMR1_OC2M           (1 << 24) /* Bit 24: Output Compare 2 mode - bit 3 */
+
+/* Common CCMR (unshifted) Capture/Compare Selection bit-field definitions */
+
+#define ATIM_CCMR_CCS_CCOUT       (0)       /* 00: CCx channel  output */
+#define ATIM_CCMR_CCS_CCIN1       (1)       /* 01: CCx channel input, ICx is TIx */
+#define ATIM_CCMR_CCS_CCIN2       (2)       /* 10: CCx channel input, ICx is TIy */
+#define ATIM_CCMR_CCS_CCINTRC     (3)       /* 11: CCx channel input, ICx is TRC */
+
+/* Common CCMR (unshifted) Compare Mode bit field definitions */
+
+#define ATIM_CCMR_MODE_FRZN       (0)       /* 000: Frozen */
+#define ATIM_CCMR_MODE_CHACT      (1)       /* 001: Channel x active on match */
+#define ATIM_CCMR_MODE_CHINACT    (2)       /* 010: Channel x inactive on match */
+#define ATIM_CCMR_MODE_OCREFTOG   (3)       /* 011: OCxREF toggle ATIM_CNT=ATIM_CCRx */
+#define ATIM_CCMR_MODE_OCREFLO    (4)       /* 100: OCxREF forced low */
+#define ATIM_CCMR_MODE_OCREFHI    (5)       /* 101: OCxREF forced high */
+#define ATIM_CCMR_MODE_PWM1       (6)       /* 110: PWM mode 1 */
+#define ATIM_CCMR_MODE_PWM2       (7)       /* 111: PWM mode 2 */
+#define ATIM_CCMR_MODE_COMBINED1  (12)      /* 1100: Combined PWM mode 1 */
+#define ATIM_CCMR_MODE_COMBINED2  (13)      /* 1101: Combined PWM mode 2 */
+#define ATIM_CCMR_MODE_ASYMMETRIC1 (14)     /* 1110: Asymmetric PWM mode 1 */
+#define ATIM_CCMR_MODE_ASYMMETRIC2 (15)     /* 1111: Asymmetric PWM mode 2 */
+
+/* Capture/compare mode register 1 -- Input capture mode */
+
+                                            /* Bits 1-0:(same as output compare mode) */
+#define ATIM_CCMR1_IC1PSC_SHIFT   (2)       /* Bits 3-2: Input Capture 1 Prescaler */
+#define ATIM_CCMR1_IC1PSC_MASK    (3 << ATIM_CCMR1_IC1PSC_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR1_IC1F_SHIFT     (4)       /* Bits 7-4: Input Capture 1 Filter */
+#define ATIM_CCMR1_IC1F_MASK      (0x0f << ATIM_CCMR1_IC1F_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+                                            /* Bits 9:8 (same as output compare mode) */
+#define ATIM_CCMR1_IC2PSC_SHIFT   (10)      /* Bits 11:10: Input Capture 2 Prescaler */
+#define ATIM_CCMR1_IC2PSC_MASK    (3 << ATIM_CCMR1_IC2PSC_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR1_IC2F_SHIFT     (12)      /* Bits 15-12: Input Capture 2 Filter */
+#define ATIM_CCMR1_IC2F_MASK      (0x0f << ATIM_CCMR1_IC2F_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+
+/* Common CCMR (unshifted) Input Capture Prescaler bit-field definitions */
+
+#define ATIM_CCMR_ICPSC_NOPSC     (0)       /* 00: no prescaler, capture each edge */
+#define ATIM_CCMR_ICPSC_EVENTS2   (1)       /* 01: capture once every 2 events */
+#define ATIM_CCMR_ICPSC_EVENTS4   (2)       /* 10: capture once every 4 events */
+#define ATIM_CCMR_ICPSC_EVENTS8   (3)       /* 11: capture once every 8 events */
+
+/* Common CCMR (unshifted) Input Capture Filter bit-field definitions */
+
+#define ATIM_CCMR_ICF_NOFILT      (0)       /* 0000: No filter, sampling at fDTS */
+#define ATIM_CCMR_ICF_FCKINT2     (1)       /* 0001: fSAMPLING=fCK_INT, N=2 */
+#define ATIM_CCMR_ICF_FCKINT4     (2)       /* 0010: fSAMPLING=fCK_INT, N=4 */
+#define ATIM_CCMR_ICF_FCKINT8     (3)       /* 0011: fSAMPLING=fCK_INT, N=8 */
+#define ATIM_CCMR_ICF_FDTSd26     (4)       /* 0100: fSAMPLING=fDTS/2, N=6 */
+#define ATIM_CCMR_ICF_FDTSd28     (5)       /* 0101: fSAMPLING=fDTS/2, N=8 */
+#define ATIM_CCMR_ICF_FDTSd46     (6)       /* 0110: fSAMPLING=fDTS/4, N=6 */
+#define ATIM_CCMR_ICF_FDTSd48     (7)       /* 0111: fSAMPLING=fDTS/4, N=8 */
+#define ATIM_CCMR_ICF_FDTSd86     (8)       /* 1000: fSAMPLING=fDTS/8, N=6 */
+#define ATIM_CCMR_ICF_FDTSd88     (9)       /* 1001: fSAMPLING=fDTS/8, N=8 */
+#define ATIM_CCMR_ICF_FDTSd165    (10)      /* 1010: fSAMPLING=fDTS/16, N=5 */
+#define ATIM_CCMR_ICF_FDTSd166    (11)      /* 1011: fSAMPLING=fDTS/16, N=6 */
+#define ATIM_CCMR_ICF_FDTSd168    (12)      /* 1100: fSAMPLING=fDTS/16, N=8 */
+#define ATIM_CCMR_ICF_FDTSd325    (13)      /* 1101: fSAMPLING=fDTS/32, N=5 */
+#define ATIM_CCMR_ICF_FDTSd326    (14)      /* 1110: fSAMPLING=fDTS/32, N=6 */
+#define ATIM_CCMR_ICF_FDTSd328    (15)      /* 1111: fSAMPLING=fDTS/32, N=8 */
+
+/* Capture/compare mode register 2 - Output Compare mode */
+
+#define ATIM_CCMR2_CC3S_SHIFT     (0)       /* Bits 1-0: Capture/Compare 3 Selection */
+#define ATIM_CCMR2_CC3S_MASK      (3 << ATIM_CCMR2_CC3S_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+#define ATIM_CCMR2_OC3FE          (1 << 2)  /* Bit 2: Output Compare 3 Fast enable */
+#define ATIM_CCMR2_OC3PE          (1 << 3)  /* Bit 3: Output Compare 3 Preload enable */
+#define ATIM_CCMR2_OC3M_SHIFT     (4)       /* Bits 6-4: Output Compare 3 Mode */
+#define ATIM_CCMR2_OC3M_MASK      (7 << ATIM_CCMR2_OC3M_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+#define ATIM_CCMR2_OC3CE          (1 << 7)  /* Bit 7: Output Compare 3 Clear Enable */
+#define ATIM_CCMR2_CC4S_SHIFT     (8)       /* Bits 9-8: Capture/Compare 4 Selection */
+#define ATIM_CCMR2_CC4S_MASK      (3 << ATIM_CCMR2_CC4S_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+#define ATIM_CCMR2_OC4FE          (1 << 10) /* Bit 10: Output Compare 4 Fast enable */
+#define ATIM_CCMR2_OC4PE          (1 << 11) /* Bit 11: Output Compare 4 Preload enable */
+#define ATIM_CCMR2_OC4M_SHIFT     (12)      /* Bits 14-12: Output Compare 4 Mode */
+#define ATIM_CCMR2_OC4M_MASK      (7 << ATIM_CCMR2_OC4M_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+#define ATIM_CCMR2_OC4CE          (1 << 15) /* Bit 15: Output Compare 4 Clear Enable */
+#define ATIM_CCMR2_OC3M           (1 << 16) /* Bit 16: Output Compare 3 mode - bit 3 */
+#define ATIM_CCMR2_OC4M           (1 << 24) /* Bit 24: Output Compare 4 mode - bit 3 */
+
+/* Capture/compare mode register 2 - Input Capture Mode */
+
+                                            /* Bits 1-0:(same as output compare mode) */
+#define ATIM_CCMR2_IC3PSC_SHIFT   (2)       /* Bits 3-2: Input Capture 3 Prescaler */
+#define ATIM_CCMR1_IC3PSC_MASK    (3 << ATIM_CCMR2_IC3PSC_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+#define ATIM_CCMR2_IC3F_SHIFT     (4)       /* Bits 7-4: Input Capture 3 Filter */
+#define ATIM_CCMR2_IC3F_MASK      (0x0f << ATIM_CCMR2_IC3F_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+                                            /* Bits 9:8 (same as output compare mode) */
+#define ATIM_CCMR2_IC4PSC_SHIFT   (10)      /* Bits 11:10: Input Capture 4 Prescaler */
+#define ATIM_CCMR2_IC4PSC_MASK    (3 << ATIM_CCMR2_IC4PSC_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+#define ATIM_CCMR2_IC4F_SHIFT     (12)      /* Bits 15-12: Input Capture 4 Filter */
+#define ATIM_CCMR2_IC4F_MASK      (0x0f << ATIM_CCMR2_IC4F_SHIFT)
+                                            /* (See common (unshifted) bit field definitions above) */
+
+/* Capture/compare mode register 3 -- Output compare mode */
+
+#define ATIM_CCMR3_OC5FE          (1 << 2)  /* Bit 2: Output Compare 5 Fast enable */
+#define ATIM_CCMR3_OC5PE          (1 << 3)  /* Bit 3: Output Compare 5 Preload enable */
+#define ATIM_CCMR3_OC5M_SHIFT     (4)       /* Bits 6-4: Output Compare 5 Mode */
+#define ATIM_CCMR3_OC5M_MASK      (7 << ATIM_CCMR3_OC5M_SHIFT)
+                                              /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR3_OC5CE          (1 << 7)  /* Bit 7: Output Compare 5 Clear Enable */
+#define ATIM_CCMR3_OC6FE          (1 << 10) /* Bit 10: Output Compare 6 Fast enable */
+#define ATIM_CCMR3_OC6PE          (1 << 11) /* Bit 11: Output Compare 6 Preload enable */
+#define ATIM_CCMR3_OC6M_SHIFT     (12)      /* Bits 14-12: Output Compare 7 Mode */
+#define ATIM_CCMR3_OC6M_MASK      (7 << ATIM_CCMR3_OC6M_SHIFT)
+                                            /* (See common (unshifted) bit field definitions below) */
+#define ATIM_CCMR3_OC6CE          (1 << 15) /* Bit 15: Output Compare 7 Clear Enable */
+                               
+#define ATIM_CCMR3_OC5M           (1 << 16) /* Bit 16: Output Compare 5 mode - bit 3 */
+#define ATIM_CCMR3_OC6M           (1 << 24) /* Bit 24: Output Compare 6 mode - bit 3 */
+
+/* Capture/compare enable register */
+
+#define ATIM_CCER_CC1E            (1 << 0)  /* Bit 0: Capture/Compare 1 output enable */
+#define ATIM_CCER_CC1P            (1 << 1)  /* Bit 1: Capture/Compare 1 output Polarity */
+#define ATIM_CCER_CC1NE           (1 << 2)  /* Bit 2: Capture/Compare 1 Complementary output enable */
+#define ATIM_CCER_CC1NP           (1 << 3)  /* Bit 3: Capture/Compare 1 Complementary output polarity */
+#define ATIM_CCER_CC2E            (1 << 4)  /* Bit 4: Capture/Compare 2 output enable */
+#define ATIM_CCER_CC2P            (1 << 5)  /* Bit 5: Capture/Compare 2 output Polarity */
+#define ATIM_CCER_CC2NE           (1 << 6)  /* Bit 6: Capture/Compare 2 Complementary output enable */
+#define ATIM_CCER_CC2NP           (1 << 7)  /* Bit 7: Capture/Compare 2 Complementary output polarity */
+#define ATIM_CCER_CC3E            (1 << 8)  /* Bit 8: Capture/Compare 3 output enable */
+#define ATIM_CCER_CC3P            (1 << 9)  /* Bit 9: Capture/Compare 3 output Polarity */
+#define ATIM_CCER_CC3NE           (1 << 10) /* Bit 10: Capture/Compare 3 Complementary output enable */
+#define ATIM_CCER_CC3NP           (1 << 11) /* Bit 11: Capture/Compare 3 Complementary output polarity */
+#define ATIM_CCER_CC4E            (1 << 12) /* Bit 12: Capture/Compare 4 output enable */
+#define ATIM_CCER_CC4P            (1 << 13) /* Bit 13: Capture/Compare 4 output Polarity */
+#define ATIM_CCER_CC5E            (1 << 16) /* Bit 16: Capture/Compare 5 output enable */
+#define ATIM_CCER_CC5P            (1 << 17) /* Bit 17: Capture/Compare 5 output Polarity */
+#define ATIM_CCER_CC6E            (1 << 20) /* Bit 20: Capture/Compare 6 output enable */
+#define ATIM_CCER_CC6P            (1 << 21) /* Bit 21: Capture/Compare 6 output Polarity */
+
+/* 16-bit counter register */
+
+#define ATIM_CNT_SHIFT            (0)       /* Bits 0-15: Timer counter value */
+#define ATIM_CNT_MASK             (0xffff << ATIM_CNT_SHIFT)
+#define ATIM_CCER_UIFCPY          (1 << 31) /* Bit 31: UIF copy */
+
+/* Repetition counter register */
+
+#define ATIM_RCR_REP_SHIFT        (0)       /* Bits 0-15: Repetition Counter Value */
+#define ATIM_RCR_REP_MASK         (0xffff << ATIM_RCR_REP_SHIFT)
+#define ATIM_RCR_REP_MAX          32768     /* REVISIT */
+
+/* Capture/compare registers (CCR) */
+
+#define ATIM_CCR5_GC5C1           (1 << 29) /* Bit 29: Group Channel 5 and Channel 1 */
+#define ATIM_CCR5_GC5C2           (1 << 30) /* Bit 30: Group Channel 5 and Channel 2 */
+#define ATIM_CCR5_GC5C3           (1 << 31) /* Bit 31: Group Channel 5 and Channel 3 */
+
+#define ATIM_CCR_MASK             (0xffff)
+
+/* Break and dead-time register */
+
+#define ATIM_BDTR_DTG_SHIFT       (0)       /* Bits 7:0 [7:0]: Dead-Time Generator set-up */
+#define ATIM_BDTR_DTG_MASK        (0xff << ATIM_BDTR_DTG_SHIFT)
+#define ATIM_BDTR_LOCK_SHIFT      (8)       /* Bits 9:8 [1:0]: Lock Configuration */
+#define ATIM_BDTR_LOCK_MASK       (3 << ATIM_BDTR_LOCK_SHIFT)
+#  define ATIM_BDTR_LOCKOFF       (0 << ATIM_BDTR_LOCK_SHIFT) /* 00: LOCK OFF - No bit is write protected */
+#  define ATIM_BDTR_LOCK1         (1 << ATIM_BDTR_LOCK_SHIFT) /* 01: LOCK Level 1 protection */
+#  define ATIM_BDTR_LOCK2         (2 << ATIM_BDTR_LOCK_SHIFT) /* 10: LOCK Level 2 protection */
+#  define ATIM_BDTR_LOCK3         (3 << ATIM_BDTR_LOCK_SHIFT) /* 11: LOCK Level 3 protection */ */
+#define ATIM_BDTR_OSSI            (1 << 10) /* Bit 10: Off-State Selection for Idle mode */
+#define ATIM_BDTR_OSSR            (1 << 11) /* Bit 11: Off-State Selection for Run mode */
+#define ATIM_BDTR_BKE             (1 << 12) /* Bit 12: Break enable */
+#define ATIM_BDTR_BKP             (1 << 13) /* Bit 13: Break Polarity */
+#define ATIM_BDTR_AOE             (1 << 14) /* Bit 14: Automatic Output enable */
+#define ATIM_BDTR_MOE             (1 << 15) /* Bit 15: Main Output enable */
+#define ATIM_BDTR_BKF_SHIFT       (16)      /* Bits 16-19: Break filter */
+#define ATIM_BDTR_BKF_MASK        (15 << ATIM_BDTR_BKF_SHIFT)
+#  define ATIM_BDTR_BKF_NOFILT      (0 << ATIM_BDTR_BKF_SHIFT)   /* 0000: No filter, BRK acts asynchronously */
+#  define ATIM_BDTR_BKF_FCKINT2     (1 << ATIM_BDTR_BKF_SHIFT)   /* 0001: fSAMPLING=fCK_INT, N=2 */
+#  define ATIM_BDTR_BKF_FCKINT4     (2 << ATIM_BDTR_BKF_SHIFT)   /* 0010: fSAMPLING=fCK_INT, N=4 */
+#  define ATIM_BDTR_BKF_FCKINT8     (3 << ATIM_BDTR_BKF_SHIFT)   /* 0011: fSAMPLING=fCK_INT, N=8 */
+#  define ATIM_BDTR_BKF_FDTSd26     (4 << ATIM_BDTR_BKF_SHIFT)   /* 0100: fSAMPLING=fDTS/2, N=6 */
+#  define ATIM_BDTR_BKF_FDTSd28     (5 << ATIM_BDTR_BKF_SHIFT)   /* 0101: fSAMPLING=fDTS/2, N=8 */
+#  define ATIM_BDTR_BKF_FDTSd36     (6 << ATIM_BDTR_BKF_SHIFT)   /* 0110: fSAMPLING=fDTS/4, N=6 */
+#  define ATIM_BDTR_BKF_FDTSd38     (7 << ATIM_BDTR_BKF_SHIFT)   /* 0111: fSAMPLING=fDTS/4, N=8 */
+#  define ATIM_BDTR_BKF_FDTSd86     (8 << ATIM_BDTR_BKF_SHIFT)   /* 1000: fSAMPLING=fDTS/8, N=6 */
+#  define ATIM_BDTR_BKF_FDTSd88     (9 << ATIM_BDTR_BKF_SHIFT)   /* 1001: fSAMPLING=fDTS/8, N=8 */
+#  define ATIM_BDTR_BKF_FDTSd165    (10 << ATIM_BDTR_BKF_SHIFT)  /* 1010: fSAMPLING=fDTS/16, N=5 */
+#  define ATIM_BDTR_BKF_FDTSd166    (11 << ATIM_BDTR_BKF_SHIFT)  /* 1011: fSAMPLING=fDTS/16, N=6 */
+#  define ATIM_BDTR_BKF_FDTSd168    (12 << ATIM_BDTR_BKF_SHIFT)  /* 1100: fSAMPLING=fDTS/16, N=8 */
+#  define ATIM_BDTR_BKF_FDTSd325    (13 << ATIM_BDTR_BKF_SHIFT)  /* 1101: fSAMPLING=fDTS/32, N=5 */
+#  define ATIM_BDTR_BKF_FDTSd326    (14 << ATIM_BDTR_BKF_SHIFT)  /* 1110: fSAMPLING=fDTS/32, N=6 */
+#  define ATIM_BDTR_BKF_FDTSd328    (15 << ATIM_BDTR_BKF_SHIFT)  /* 1111: fSAMPLING=fDTS/32, N=8 */
+#define ATIM_BDTR_BK2F_SHIFT      (20)      /* Bits 20-23: Break 2 filter */
+#define ATIM_BDTR_BK2F_MASK       (15 << ATIM_BDTR_BK2F_SHIFT)
+#  define ATIM_BDTR_BK2F_NOFILT     (0 << ATIM_BDTR_BK2F_SHIFT)  /* 0000: No filter, BRK 2 acts asynchronously */
+#  define ATIM_BDTR_BK2F_FCKINT2    (1 << ATIM_BDTR_BK2F_SHIFT)  /* 0001: fSAMPLING=fCK_INT, N=2 */
+#  define ATIM_BDTR_BK2F_FCKINT4    (2 << ATIM_BDTR_BK2F_SHIFT)  /* 0010: fSAMPLING=fCK_INT, N=4 */
+#  define ATIM_BDTR_BK2F_FCKINT8    (3 << ATIM_BDTR_BK2F_SHIFT)  /* 0011: fSAMPLING=fCK_INT, N=8 */
+#  define ATIM_BDTR_BK2F_FDTSd26    (4 << ATIM_BDTR_BK2F_SHIFT)  /* 0100: fSAMPLING=fDTS/2, N=6 */
+#  define ATIM_BDTR_BK2F_FDTSd28    (5 << ATIM_BDTR_BK2F_SHIFT)  /* 0101: fSAMPLING=fDTS/2, N=8 */
+#  define ATIM_BDTR_BK2F_FDTSd36    (6 << ATIM_BDTR_BK2F_SHIFT)  /* 0110: fSAMPLING=fDTS/4, N=6 */
+#  define ATIM_BDTR_BK2F_FDTSd38    (7 << ATIM_BDTR_BK2F_SHIFT)  /* 0111: fSAMPLING=fDTS/4, N=8 */
+#  define ATIM_BDTR_BK2F_FDTSd86    (8 << ATIM_BDTR_BK2F_SHIFT)  /* 1000: fSAMPLING=fDTS/8, N=6 */
+#  define ATIM_BDTR_BK2F_FDTSd88    (9 << ATIM_BDTR_BK2F_SHIFT)  /* 1001: fSAMPLING=fDTS/8, N=8 */
+#  define ATIM_BDTR_BK2F_FDTSd165   (10 << ATIM_BDTR_BK2F_SHIFT) /* 1010: fSAMPLING=fDTS/16, N=5 */
+#  define ATIM_BDTR_BK2F_FDTSd166   (11 << ATIM_BDTR_BK2F_SHIFT) /* 1011: fSAMPLING=fDTS/16, N=6 */
+#  define ATIM_BDTR_BK2F_FDTSd168   (12 << ATIM_BDTR_BK2F_SHIFT) /* 1100: fSAMPLING=fDTS/16, N=8 */
+#  define ATIM_BDTR_BK2F_FDTSd325   (13 << ATIM_BDTR_BK2F_SHIFT) /* 1101: fSAMPLING=fDTS/32, N=5 */
+#  define ATIM_BDTR_BK2F_FDTSd326   (14 << ATIM_BDTR_BK2F_SHIFT) /* 1110: fSAMPLING=fDTS/32, N=6 */
+#  define ATIM_BDTR_BK2F_FDTSd328   (15 << ATIM_BDTR_BK2F_SHIFT) /* 1111: fSAMPLING=fDTS/32, N=8 */
+#define ATIM_BDTR_BK2E            (1 << 24) /* Bit 24: Break 2 enable */
+#define ATIM_BDTR_BK2P            (1 << 1525 /* Bit 25:Break 2 polarity */
+
+/* DMA control register */
+
+#define ATIM_DCR_DBA_SHIFT        (0)       /* Bits 4-0: DMA Base Address */
+#define ATIM_DCR_DBA_MASK         (0x1f << ATIM_DCR_DBA_SHIFT)
+#define ATIM_DCR_DBL_SHIFT        (8)       /* Bits 12-8: DMA Burst Length */
+#define ATIM_DCR_DBL_MASK         (0x1f << ATIM_DCR_DBL_SHIFT)
+#  define ATIM_DCR_DBL(n)         (((n)-1) << ATIM_DCR_DBL_SHIFT) /* n transfers, n = 1..18 */
+
+/* Control register 1 (TIM2-5) */
+
+#define GTIM_CR1_CEN              (1 << 0)  /* Bit 0: Counter enable */
+#define GTIM_CR1_UDIS             (1 << 1)  /* Bit 1: Update Disable */
+#define GTIM_CR1_URS              (1 << 2)  /* Bit 2: Update Request Source */
+#define GTIM_CR1_OPM              (1 << 3)  /* Bit 3: One Pulse Mode (TIM2-5, 9, and 12 only) */
+#define GTIM_CR1_DIR              (1 << 4)  /* Bit 4: Direction (TIM2-5 only) */
+#define GTIM_CR1_CMS_SHIFT        (5)       /* Bits 6-5: Center-aligned Mode Selection (TIM2-5 only) */
+#define GTIM_CR1_CMS_MASK         (3 << GTIM_CR1_CMS_SHIFT)
+#  define GTIM_CR1_EDGE           (0 << GTIM_CR1_CMS_SHIFT) /* 00: Edge-aligned mode.  */
+#  define GTIM_CR1_CENTER1        (1 << GTIM_CR1_CMS_SHIFT) /* 01: Center-aligned mode 1 */
+#  define GTIM_CR1_CENTER2        (2 << GTIM_CR1_CMS_SHIFT) /* 10: Center-aligned mode 2 */
+#  define GTIM_CR1_CENTER3        (3 << GTIM_CR1_CMS_SHIFT) /* 11: Center-aligned mode 3 */
+#define GTIM_CR1_ARPE             (1 << 7)  /* Bit 7: Auto-Reload Preload enable */
+#define GTIM_CR1_CKD_SHIFT        (8)       /* Bits 9-8: Clock Division */
+#define GTIM_CR1_CKD_MASK         (3 << GTIM_CR1_CKD_SHIFT)
+#  define GTIM_CR1_TCKINT         (0 << GTIM_CR1_CKD_SHIFT) /* 00: tDTS = tCK_INT */
+#  define GTIM_CR1_2TCKINT        (1 << GTIM_CR1_CKD_SHIFT) /* 01: tDTS = 2 x tCK_INT */
+#  define GTIM_CR1_4TCKINT        (2 << GTIM_CR1_CKD_SHIFT) /* 10: tDTS = 4 x tCK_INT */
+#define GTIM_CR1_UIFREMAP         (1 << 11) /* Bit 11: UIF status bit remapping */
+
+/* Control register 2 (TIM2-5, and TIM15-17 only) */
+
+#define GTIM_CR2_CCPC             (1 << 0)  /* Bit 0: Capture/compare preloaded control (TIM15-17 only) */
+#define GTIM_CR2_CCUS             (1 << 2)  /* Bit 2: Capture/compare control update selection (TIM15-17 only) */
+#define GTIM_CR2_CCDS             (1 << 3)  /* Bit 3: Capture/Compare DMA Selection (TIM2-5,1,&16 only) */
+#define GTIM_CR2_MMS_SHIFT        (4)       /* Bits 6-4: Master Mode Selection (not TIM16) */
+#define GTIM_CR2_MMS_MASK         (7 << GTIM_CR2_MMS_SHIFT)
+#  define GTIM_CR2_MMS_RESET      (0 << GTIM_CR2_MMS_SHIFT) /* 000: Reset */
+#  define GTIM_CR2_MMS_ENABLE     (1 << GTIM_CR2_MMS_SHIFT) /* 001: Enable */
+#  define GTIM_CR2_MMS_UPDATE     (2 << GTIM_CR2_MMS_SHIFT) /* 010: Update */
+#  define GTIM_CR2_MMS_COMPP      (3 << GTIM_CR2_MMS_SHIFT) /* 011: Compare Pulse */
+#  define GTIM_CR2_MMS_OC1REF     (4 << GTIM_CR2_MMS_SHIFT) /* 100: Compare - OC1REF signal is used as trigger output (TRGO) */
+#  define GTIM_CR2_MMS_OC2REF     (5 << GTIM_CR2_MMS_SHIFT) /* 101: Compare - OC2REF signal is used as trigger output (TRGO) */
+#  define GTIM_CR2_MMS_OC3REF     (6 << GTIM_CR2_MMS_SHIFT) /* 110: Compare - OC3REF signal is used as trigger output (TRGO, TIM2-5 and TIM15 only) */
+#  define GTIM_CR2_MMS_OC4REF     (7 << GTIM_CR2_MMS_SHIFT) /* 111: Compare - OC4REF signal is used as trigger output (TRGO, TIM2-5 and TIM15 only) */
+#define GTIM_CR2_TI1S             (1 << 7)  /* Bit 7: TI1 Selection (not TIM16) */
+#define GTIM_CR2_OIS1             (1 << 8)  /* Bit 8: COutput Idle state 1 (OC1 output) (TIM15-17 only) */
+#define GTIM_CR2_OIS1N            (1 << 9)  /* Bit 9: Output Idle state 1 (OC1N output) (TIM15-17 only) */
+#define GTIM_CR2_OIS2             (1 << 10) /* Bit 10: Output idle state 2 (OC2 output) (TIM15 only) */
+
+/* Slave mode control register (TIM2-5 and TIM15 only) */
+
+#define GTIM_SMCR_SMS_SHIFT       (0)       /* Bits 2-0: Slave Mode Selection */
+#define GTIM_SMCR_SMS_MASK        (7 << GTIM_SMCR_SMS_SHIFT)
+#  define GTIM_SMCR_DISAB         (0 << GTIM_SMCR_SMS_SHIFT) /* 000: Slave mode disabled */
+#  define GTIM_SMCR_ENCMD1        (1 << GTIM_SMCR_SMS_SHIFT) /* 001: Encoder mode 1 */
+#  define GTIM_SMCR_ENCMD2        (2 << GTIM_SMCR_SMS_SHIFT) /* 010: Encoder mode 2 */
+#  define GTIM_SMCR_ENCMD3        (3 << GTIM_SMCR_SMS_SHIFT) /* 011: Encoder mode 3 */
+#  define GTIM_SMCR_RESET         (4 << GTIM_SMCR_SMS_SHIFT) /* 100: Reset Mode  */
+#  define GTIM_SMCR_GATED         (5 << GTIM_SMCR_SMS_SHIFT) /* 101: Gated Mode  */
+#  define GTIM_SMCR_TRIGGER       (6 << GTIM_SMCR_SMS_SHIFT) /* 110: Trigger Mode */
+#  define GTIM_SMCR_EXTCLK1       (7 << GTIM_SMCR_SMS_SHIFT) /* 111: External Clock Mode 1 */
+#define GTIM_SMCR_TS_SHIFT        (4)       /* Bits 6-4: Trigger Selection */
+#define GTIM_SMCR_TS_MASK         (7 << GTIM_SMCR_TS_SHIFT)
+#  define GTIM_SMCR_ITR0          (0 << GTIM_SMCR_TS_SHIFT) /* 000: Internal Trigger 0 (ITR0). TIM1 */
+#  define GTIM_SMCR_ITR1          (1 << GTIM_SMCR_TS_SHIFT) /* 001: Internal Trigger 1 (ITR1). TIM2 */
+#  define GTIM_SMCR_ITR2          (2 << GTIM_SMCR_TS_SHIFT) /* 010: Internal Trigger 2 (ITR2). TIM3 */
+#  define GTIM_SMCR_ITR3          (3 << GTIM_SMCR_TS_SHIFT) /* 011: Internal Trigger 3 (ITR3). TIM4 */
+#  define GTIM_SMCR_TI1FED        (4 << GTIM_SMCR_TS_SHIFT) /* 100: TI1 Edge Detector (TI1F_ED) */
+#  define GTIM_SMCR_TI1FP1        (5 << GTIM_SMCR_TS_SHIFT) /* 101: Filtered Timer Input 1 (TI1FP1) */
+#  define GTIM_SMCR_TI2FP2        (6 << GTIM_SMCR_TS_SHIFT) /* 110: Filtered Timer Input 2 (TI2FP2) */
+#  define GTIM_SMCR_ETRF          (7 << GTIM_SMCR_TS_SHIFT) /* 111: External Trigger input (ETRF) */
+#define GTIM_SMCR_MSM             (1 << 7)  /* Bit 7: Master/Slave mode */
+#define GTIM_SMCR_ETF_SHIFT       (8)       /* Bits 11-8: External Trigger Filter (not TIM15) */
+#define GTIM_SMCR_ETF_MASK        (0x0f << GTIM_SMCR_ETF_SHIFT)
+#  define GTIM_SMCR_NOFILT        (0 << GTIM_SMCR_ETF_SHIFT)  /* 0000: No filter, sampling is done at fDTS */
+#  define GTIM_SMCR_FCKINT2       (1 << GTIM_SMCR_ETF_SHIFT)  /* 0001: fSAMPLING=fCK_INT, N=2 */
+#  define GTIM_SMCR_FCKINT4       (2 << GTIM_SMCR_ETF_SHIFT)  /* 0010: fSAMPLING=fCK_INT, N=4 */
+#  define GTIM_SMCR_FCKINT8       (3 << GTIM_SMCR_ETF_SHIFT)  /* 0011: fSAMPLING=fCK_INT, N=8 */
+#  define GTIM_SMCR_FDTSd26       (4 << GTIM_SMCR_ETF_SHIFT)  /* 0100: fSAMPLING=fDTS/2, N=6 */
+#  define GTIM_SMCR_FDTSd28       (5 << GTIM_SMCR_ETF_SHIFT)  /* 0101: fSAMPLING=fDTS/2, N=8 */
+#  define GTIM_SMCR_FDTSd36       (6 << GTIM_SMCR_ETF_SHIFT)  /* 0110: fSAMPLING=fDTS/4, N=6 */
+#  define GTIM_SMCR_FDTSd38       (7 << GTIM_SMCR_ETF_SHIFT)  /* 0111: fSAMPLING=fDTS/4, N=8 */
+#  define GTIM_SMCR_FDTSd86       (8 << GTIM_SMCR_ETF_SHIFT)  /* 1000: fSAMPLING=fDTS/8, N=6 */
+#  define GTIM_SMCR_FDTSd88       (9 << GTIM_SMCR_ETF_SHIFT)  /* 1001: fSAMPLING=fDTS/8, N=8 */
+#  define GTIM_SMCR_FDTSd165      (10 << GTIM_SMCR_ETF_SHIFT) /* 1010: fSAMPLING=fDTS/16, N=5 */
+#  define GTIM_SMCR_FDTSd166      (11 << GTIM_SMCR_ETF_SHIFT) /* 1011: fSAMPLING=fDTS/16, N=6 */
+#  define GTIM_SMCR_FDTSd168      (12 << GTIM_SMCR_ETF_SHIFT) /* 1100: fSAMPLING=fDTS/16, N=8 */
+#  define GTIM_SMCR_FDTSd325      (13 << GTIM_SMCR_ETF_SHIFT) /* 1101: fSAMPLING=fDTS/32, N=5 */
+#  define GTIM_SMCR_FDTSd326      (14 << GTIM_SMCR_ETF_SHIFT) /* 1110: fSAMPLING=fDTS/32, N=6 */
+#  define GTIM_SMCR_FDTSd328      (15 << GTIM_SMCR_ETF_SHIFT) /* 1111: fSAMPLING=fDTS/32, N=8 */
+#define GTIM_SMCR_ETPS_SHIFT      (12)      /* Bits 13-12: External Trigger Prescaler (not TIM15) */
+#define GTIM_SMCR_ETPS_MASK       (3 << GTIM_SMCR_ETPS_SHIFT)
+#  define GTIM_SMCR_PSCOFF        (0 << GTIM_SMCR_ETPS_SHIFT) /* 00: Prescaler OFF */
+#  define GTIM_SMCR_ETRPd2        (1 << GTIM_SMCR_ETPS_SHIFT) /* 01: ETRP frequency divided by 2 */
+#  define GTIM_SMCR_ETRPd4        (2 << GTIM_SMCR_ETPS_SHIFT) /* 10: ETRP frequency divided by 4 */
+#  define GTIM_SMCR_ETRPd8        (3 << GTIM_SMCR_ETPS_SHIFT) /* 11: ETRP frequency divided by 8 */
+#define GTIM_SMCR_ECE             (1 << 14) /* Bit 14: External Clock enable */
+#define GTIM_SMCR_ETP             (1 << 15) /* Bit 15: External Trigger Polarity */
+#define GTIM_SMCR_SMS             (1 << 16) /* Bit 16: Slave mode selection - bit 3 */
+
+/* DMA/Interrupt enable register (TIM2-5) */
+
+#define GTIM_DIER_UIE             (1 << 0)  /* Bit 0: Update interrupt enable */
+#define GTIM_DIER_CC1IE           (1 << 1)  /* Bit 1: Capture/Compare 1 interrupt enable */
+#define GTIM_DIER_CC2IE           (1 << 2)  /* Bit 2: Capture/Compare 2 interrupt enable (TIM2-5,9,12,&15 only) */
+#define GTIM_DIER_CC3IE           (1 << 3)  /* Bit 3: Capture/Compare 3 interrupt enable (TIM2-5 only) */
+#define GTIM_DIER_CC4IE           (1 << 4)  /* Bit 4: Capture/Compare 4 interrupt enable (TIM2-5 only) */
+#define GTIM_DIER_COMIE           (1 << 5)  /* Bit 5: COM interrupt enable (TIM15-17 only) */
+#define GTIM_DIER_TIE             (1 << 6)  /* Bit 6: Trigger interrupt enable (TIM2-5,9,&12 only) */
+#define GTIM_DIER_BIE             (1 << 7)  /* Bit 7: Break interrupt enable (TIM15-17 only) */
+#define GTIM_DIER_UDE             (1 << 8)  /* Bit 8: Update DMA request enable (TIM2-5&15-17 only) */
+#define GTIM_DIER_CC1DE           (1 << 9)  /* Bit 9: Capture/Compare 1 DMA request enable (TIM2-5&15-17 only) */
+#define GTIM_DIER_CC2DE           (1 << 10) /* Bit 10: Capture/Compare 2 DMA request enable (TIM2-5&15 only) */
+#define GTIM_DIER_CC3DE           (1 << 11) /* Bit 11: Capture/Compare 3 DMA request enable (TIM2-5 only) */
+#define GTIM_DIER_CC4DE           (1 << 12) /* Bit 12: Capture/Compare 4 DMA request enable (TIM2-5 only) */
+#define GTIM_DIER_COMDE           (1 << 13) /* Bit 13: COM DMA request enable (TIM15-17 only) */
+#define GTIM_DIER_TDE             (1 << 14) /* Bit 14: Trigger DMA request enable (TIM2-5&15-17 only) */
+
+/* Status register */
+
+#define GTIM_SR_UIF               (1 << 0)  /* Bit 0: Update interrupt flag */
+#define GTIM_SR_CC1IF             (1 << 1)  /* Bit 1: Capture/compare 1 interrupt flag */
+#define GTIM_SR_CC2IF             (1 << 2)  /* Bit 2: Capture/Compare 2 interrupt flag (TIM2-5,9,12,&15 only) */
+#define GTIM_SR_CC3IF             (1 << 3)  /* Bit 3: Capture/Compare 3 interrupt flag (TIM2-5 only) */
+#define GTIM_SR_CC4IF             (1 << 4)  /* Bit 4: Capture/Compare 4 interrupt flag (TIM2-5 only) */
+#define GTIM_SR_COMIF             (1 << 5)  /* Bit 5: COM interrupt flag (TIM15-17 only) */
+#define GTIM_SR_TIF               (1 << 6)  /* Bit 6: Trigger interrupt Flag (TIM2-5,9,12&15-17 only) */
+#define GTIM_SR_BIF               (1 << 7)  /* Bit 7: Break interrupt flag (TIM15-17 only) */
+#define GTIM_SR_CC1OF             (1 << 9)  /* Bit 9: Capture/Compare 1 Overcapture flag */
+#define GTIM_SR_CC2OF             (1 << 10) /* Bit 10: Capture/Compare 2 Overcapture flag (TIM2-5,9,12&15 only) */
+#define GTIM_SR_CC3OF             (1 << 11) /* Bit 11: Capture/Compare 3 Overcapture flag (TIM2-5 only) */
+#define GTIM_SR_CC4OF             (1 << 12) /* Bit 12: Capture/Compare 4 Overcapture flag (TIM2-5 only) */
+
+/* Event generation register (TIM2-5 and TIM9-14) */
+
+#define GTIM_EGR_UG               (1 << 0)  /* Bit 0: Update generation */
+#define GTIM_EGR_CC1G             (1 << 1)  /* Bit 1: Capture/compare 1 generation */
+#define GTIM_EGR_CC2G             (1 << 2)  /* Bit 2: Capture/compare 2 generation (TIM2-5,9,12,&15 only) */
+#define GTIM_EGR_CC3G             (1 << 3)  /* Bit 3: Capture/compare 3 generation (TIM2-5 only) */
+#define GTIM_EGR_CC4G             (1 << 4)  /* Bit 4: Capture/compare 4 generation (TIM2-5 only) */
+#define GTIM_EGR_COMIG            (1 << 5)  /* Bit 5: Capture/Compare control update generation (TIM15-17 only) */
+#define GTIM_EGR_TG               (1 << 6)  /* Bit 6: Trigger generation (TIM2-5,9,12&16-17 only) */
+#define GTIM_EGR_BG               (1 << 7)  /* Bit 7: Break generation (TIM15-17 only) */
+
+/* Capture/compare mode register 1 - Output compare mode (TIM2-5) */
+
+#define GTIM_CCMR1_CC1S_SHIFT     (0)       /* Bits 1-0: Capture/Compare 1 Selection */
+#define GTIM_CCMR1_CC1S_MASK      (3 << GTIM_CCMR1_CC1S_SHIFT)
+                                            /* (See common CCMR Capture/Compare Selection definitions below) */
+#define GTIM_CCMR1_OC1FE          (1 << 2)  /* Bit 2: Output Compare 1 Fast enable */
+#define GTIM_CCMR1_OC1PE          (1 << 3)  /* Bit 3: Output Compare 1 Preload enable */
+#define GTIM_CCMR1_OC1M_SHIFT     (4)       /* Bits 6-4: Output Compare 1 Mode */
+#define GTIM_CCMR1_OC1M_MASK      (7 << GTIM_CCMR1_OC1M_SHIFT)
+                                            /* (See common CCMR Output Compare Mode definitions below) */
+#define GTIM_CCMR1_OC1CE          (1 << 7)  /* Bit 7: Output Compare 1Clear Enable */
+#define GTIM_CCMR1_CC2S_SHIFT     (8)       /* Bits 9-8: Capture/Compare 2 Selection */
+#define GTIM_CCMR1_CC2S_MASK      (3 << GTIM_CCMR1_CC2S_SHIFT)
+                                            /* (See common CCMR Capture/Compare Selection definitions below) */
+#define GTIM_CCMR1_OC2FE          (1 << 10) /* Bit 10: Output Compare 2 Fast enable */
+#define GTIM_CCMR1_OC2PE          (1 << 11) /* Bit 11: Output Compare 2 Preload enable */
+#define GTIM_CCMR1_OC2M_SHIFT     (12)      /* Bits 14-12: Output Compare 2 Mode */
+#define GTIM_CCMR1_OC2M_MASK      (7 << GTIM_CCMR1_OC2M_SHIFT)
+                                            /* (See common CCMR Output Compare Mode definitions below) */
+#define GTIM_CCMR1_OC2CE          (1 << 15) /* Bit 15: Output Compare 2 Clear Enable */
+#define GTIM_CCMR1_OC1M           (1 << 16) /* Bit 16: Output Compare 1 mode - bit 3 */
+#define GTIM_CCMR1_OC2M           (1 << 24) /* Bit 24: Output Compare 2 mode - bit 3 */
+
+/* Common CCMR (unshifted) Capture/Compare Selection bit-field definitions */
+
+#define GTIM_CCMR_CCS_CCOUT       (0)       /* 00: CCx channel output */
+#define GTIM_CCMR_CCS_CCIN1       (1)       /* 01: CCx channel input, ICx is TIx */
+#define GTIM_CCMR_CCS_CCIN2       (2)       /* 10: CCx channel input, ICx is TIy */
+#define GTIM_CCMR_CCS_CCINTRC     (3)       /* 11: CCx channel input, ICx is TRC */
+
+/* Common CCMR (unshifted) Compare Mode bit field definitions */
+
+#define GTIM_CCMR_MODE_FRZN       (0)       /* 000: Frozen */
+#define GTIM_CCMR_MODE_CHACT      (1)       /* 001: Channel x active on match */
+#define GTIM_CCMR_MODE_CHINACT    (2)       /* 010: Channel x inactive on match */
+#define GTIM_CCMR_MODE_OCREFTOG   (3)       /* 011: OCxREF toggle ATIM_CNT=ATIM_CCRx */
+#define GTIM_CCMR_MODE_OCREFLO    (4)       /* 100: OCxREF forced low */
+#define GTIM_CCMR_MODE_OCREFHI    (5)       /* 101: OCxREF forced high */
+#define GTIM_CCMR_MODE_PWM1       (6)       /* 110: PWM mode 1 */
+#define GTIM_CCMR_MODE_PWM2       (7)       /* 111: PWM mode 2 */
+
+/* Capture/compare mode register 1 - Input capture mode (TIM2-5 and TIM9-14) */
+
+                                            /* Bits 1-0 (Same as Output Compare Mode) */
+#define GTIM_CCMR1_IC1PSC_SHIFT   (2)       /* Bits 3-2: Input Capture 1 Prescaler */
+#define GTIM_CCMR1_IC1PSC_MASK    (3 << GTIM_CCMR1_IC1PSC_SHIFT)
+                                            /* (See common CCMR Input Capture Prescaler definitions below) */
+#define GTIM_CCMR1_IC1F_SHIFT     (4)       /* Bits 7-4: Input Capture 1 Filter */
+#define GTIM_CCMR1_IC1F_MASK      (0x0f << GTIM_CCMR1_IC1F_SHIFT)
+                                            /* (See common CCMR Input Capture Filter definitions below) */
+                                            /* Bits 9-8: (Same as Output Compare Mode) */
+#define GTIM_CCMR1_IC2PSC_SHIFT   (10)      /* Bits 11-10: Input Capture 2 Prescaler */
+#define GTIM_CCMR1_IC2PSC_MASK    (3 << GTIM_CCMR1_IC2PSC_SHIFT)
+                                            /* (See common CCMR Input Capture Prescaler definitions below) */
+#define GTIM_CCMR1_IC2F_SHIFT     (12)      /* Bits 15-12: Input Capture 2 Filter */
+#define GTIM_CCMR1_IC2F_MASK      (0x0f << GTIM_CCMR1_IC2F_SHIFT)
+                                            /* (See common CCMR Input Capture Filter definitions below) */
+
+/* Common CCMR (unshifted) Input Capture Prescaler bit-field definitions */
+
+#define GTIM_CCMR_ICPSC_NOPSC     (0)       /* 00: no prescaler, capture each edge */
+#define GTIM_CCMR_ICPSC_EVENTS2   (1)       /* 01: capture once every 2 events */
+#define GTIM_CCMR_ICPSC_EVENTS4   (2)       /* 10: capture once every 4 events */
+#define GTIM_CCMR_ICPSC_EVENTS8   (3)       /* 11: capture once every 8 events */
+
+/* Common CCMR (unshifted) Input Capture Filter bit-field definitions */
+
+#define GTIM_CCMR_ICF_NOFILT      (0)       /* 0000: No filter, sampling at fDTS */
+#define GTIM_CCMR_ICF_FCKINT2     (1)       /* 0001: fSAMPLING=fCK_INT, N=2 */
+#define GTIM_CCMR_ICF_FCKINT4     (2)       /* 0010: fSAMPLING=fCK_INT, N=4 */
+#define GTIM_CCMR_ICF_FCKINT8     (3)       /* 0011: fSAMPLING=fCK_INT, N=8 */
+#define GTIM_CCMR_ICF_FDTSd26     (4)       /* 0100: fSAMPLING=fDTS/2, N=6 */
+#define GTIM_CCMR_ICF_FDTSd28     (5)       /* 0101: fSAMPLING=fDTS/2, N=8 */
+#define GTIM_CCMR_ICF_FDTSd46     (6)       /* 0110: fSAMPLING=fDTS/4, N=6 */
+#define GTIM_CCMR_ICF_FDTSd48     (7)       /* 0111: fSAMPLING=fDTS/4, N=8 */
+#define GTIM_CCMR_ICF_FDTSd86     (8)       /* 1000: fSAMPLING=fDTS/8, N=6 */
+#define GTIM_CCMR_ICF_FDTSd88     (9)       /* 1001: fSAMPLING=fDTS/8, N=8 */
+#define GTIM_CCMR_ICF_FDTSd165    (10)      /* 1010: fSAMPLING=fDTS/16, N=5 */
+#define GTIM_CCMR_ICF_FDTSd166    (11)      /* 1011: fSAMPLING=fDTS/16, N=6 */
+#define GTIM_CCMR_ICF_FDTSd168    (12)      /* 1100: fSAMPLING=fDTS/16, N=8 */
+#define GTIM_CCMR_ICF_FDTSd325    (13)      /* 1101: fSAMPLING=fDTS/32, N=5 */
+#define GTIM_CCMR_ICF_FDTSd326    (14)      /* 1110: fSAMPLING=fDTS/32, N=6 */
+#define GTIM_CCMR_ICF_FDTSd328    (15)      /* 1111: fSAMPLING=fDTS/32, N=8 */
+
+/* Capture/compare mode register 2 - Output Compare mode (TIM2-5 only) */
+
+#define GTIM_CCMR2_CC3S_SHIFT     (0)       /* Bits 1-0: Capture/Compare 3 Selection */
+#define GTIM_CCMR2_CC3S_MASK      (3 << GTIM_CCMR2_CC3S_SHIFT)
+                                            /* (See common CCMR Capture/Compare Selection definitions above) */
+#define GTIM_CCMR2_OC3FE          (1 << 2)  /* Bit 2: Output Compare 3 Fast enable */
+#define GTIM_CCMR2_OC3PE          (1 << 3)  /* Bit 3: Output Compare 3 Preload enable */
+#define GTIM_CCMR2_OC3M_SHIFT     (4)       /* Bits 6-4: Output Compare 3 Mode */
+#define GTIM_CCMR2_OC3M_MASK      (7 << GTIM_CCMR2_OC3M_SHIFT)
+                                            /* (See common CCMR Output Compare Mode definitions above) */
+#define GTIM_CCMR2_OC3CE          (1 << 7)  /* Bit 7: Output Compare 3 Clear Enable */
+#define GTIM_CCMR2_CC4S_SHIFT     (8)       /* Bits 9-8: Capture/Compare 4 Selection */
+#define GTIM_CCMR2_CC4S_MASK      (3 << GTIM_CCMR2_CC4S_SHIFT)
+                                            /* (See common CCMR Capture/Compare Selection definitions above) */
+#define GTIM_CCMR2_OC4FE          (1 << 10) /* Bit 10: Output Compare 4 Fast enable */
+#define GTIM_CCMR2_OC4PE          (1 << 11) /* Bit 11: Output Compare 4 Preload enable */
+#define GTIM_CCMR2_OC4M_SHIFT     (12)      /* Bits 14-12: Output Compare 4 Mode */
+#define GTIM_CCMR2_OC4M_MASK      (7 << GTIM_CCMR2_OC4M_SHIFT)
+                                            /* (See common CCMR Output Compare Mode definitions above) */
+#define GTIM_CCMR2_OC4CE          (1 << 15) /* Bit 15: Output Compare 4 Clear Enable */
+
+/* Capture/compare mode register 2 - Input capture mode (TIM2-5 only) */
+
+                                            /* Bits 1-0 (Same as Output Compare Mode) */
+#define GTIM_CCMR2_IC3PSC_SHIFT   (2)       /* Bits 3-2: Input Capture 3 Prescaler */
+#define GTIM_CCMR2_IC3PSC_MASK    (3 << GTIM_CCMR2_IC3PSC_SHIFT)
+                                            /* (See common CCMR Input Capture Prescaler definitions below) */
+#define GTIM_CCMR2_IC3F_SHIFT     (4)       /* Bits 7-4: Input Capture 3 Filter */
+#define GTIM_CCMR2_IC3F_MASK      (0x0f << GTIM_CCMR2_IC3F_SHIFT)
+                                            /* (See common CCMR Input Capture Filter definitions below) */
+                                            /* Bits 9-8: (Same as Output Compare Mode) */
+#define GTIM_CCMR2_IC4PSC_SHIFT   (10)      /* Bits 11-10: Input Capture 4 Prescaler */
+#define GTIM_CCMR2_IC4PSC_MASK    (3 << GTIM_CCMR2_IC4PSC_SHIFT)
+                                            /* (See common CCMR Input Capture Prescaler definitions below) */
+#define GTIM_CCMR2_IC4F_SHIFT     (12)      /* Bits 15-12: Input Capture 4 Filter */
+#define GTIM_CCMR2_IC4F_MASK      (0x0f << GTIM_CCMR2_IC4F_SHIFT)
+                                            /* (See common CCMR Input Capture Filter definitions below) */
+
+/* Capture/compare enable register (TIM1 and TIM8, TIM2-5) */
+
+#define GTIM_CCER_CC1E            (1 << 0)  /* Bit 0: Capture/Compare 1 output enable */
+#define GTIM_CCER_CC1P            (1 << 1)  /* Bit 1: Capture/Compare 1 output polarity */
+#define GTIM_CCER_CC1NE           (1 << 2)  /* Bit 2: Capture/Compare 1 complementary output enable (TIM1 and TIM8 only) */
+#define GTIM_CCER_CC1NP           (1 << 3)  /* Bit 3: Capture/Compare 1 output Polarity (F2,F3,F4 and TIM15-17) */
+#define GTIM_CCER_CC2E            (1 << 4)  /* Bit 4: Capture/Compare 2 output enable (TIM2-5,9&12 only) */
+#define GTIM_CCER_CC2P            (1 << 5)  /* Bit 5: Capture/Compare 2 output polarity (TIM2-5,9&12 only) */
+#define GTIM_CCER_CC2NE           (1 << 6)  /* Bit 6: Capture/Compare 2 complementary output enable (TIM1 and TIM8 only) */
+#define GTIM_CCER_CC2NP           (1 << 7)  /* Bit 7: Capture/Compare 2 output Polarity (F2,F3,F4 and TIM2-5,9,12&15 only) */
+#define GTIM_CCER_CC3E            (1 << 8)  /* Bit 8: Capture/Compare 3 output enable (TIM2-5 only) */
+#define GTIM_CCER_CC3P            (1 << 9)  /* Bit 9: Capture/Compare 3 output Polarity (TIM2-5 only) */
+#define GTIM_CCER_CC3NE           (1 << 10) /* Bit 10: Capture/Compare 3 complementary output enable (TIM1 and TIM8 only) */
+#define GTIM_CCER_CC3NP           (1 << 11) /* Bit 11: Capture/Compare 3 output Polarity (F2,F4 and TIM2-5 only) */
+#define GTIM_CCER_CC4E            (1 << 12) /* Bit 12: Capture/Compare 4 output enable (TIM2-5 only) */
+#define GTIM_CCER_CC4P            (1 << 13) /* Bit 13: Capture/Compare 4 output Polarity (TIM2-5 only) */
+#define GTIM_CCER_CC4NP           (1 << 15) /* Bit 15: Capture/Compare 4 output Polarity */
+
+/* 16-bit counter register */
+
+#define GTIM_CNT_SHIFT            (0)       /* Bits 0-15: Timer counter value */
+#define GTIM_CNT_MASK             (0xffff << ATIM_CNT_SHIFT)
+
+/* Repetition counter (TIM15-17 only) */
+
+#define GTIM_RCR_REP_SHIFT        (0)       /* Bits 0-7: Repetition Counter Value */
+#define GTIM_RCR_REP_MASK         (0xff << GTIM_RCR_REP_SHIFT)
+
+#define GTIM_RCR_REP_MAX          128
+
+/* Break and dead-time register (TIM15-17 only */
+
+#define GTIM_BDTR_DTG_SHIFT       (0)       /* Bits 7:0 [7:0]: Dead-Time Generator set-up */
+#define GTIM_BDTR_DTG_MASK        (0xff << GTIM_BDTR_DTG_SHIFT)
+#define GTIM_BDTR_LOCK_SHIFT      (8)       /* Bits 9:8 [1:0]: Lock Configuration */
+#define GTIM_BDTR_LOCK_MASK       (3 << GTIM_BDTR_LOCK_SHIFT)
+#  define GTIM_BDTR_LOCKOFF       (0 << GTIM_BDTR_LOCK_SHIFT) /* 00: LOCK OFF - No bit is write protected */
+#  define GTIM_BDTR_LOCK1         (1 << GTIM_BDTR_LOCK_SHIFT) /* 01: LOCK Level 1 protection */
+#  define GTIM_BDTR_LOCK2         (2 << GTIM_BDTR_LOCK_SHIFT) /* 10: LOCK Level 2 protection */
+#  define GTIM_BDTR_LOCK3         (3 << GTIM_BDTR_LOCK_SHIFT) /* 11: LOCK Level 3 protection */ */
+#define GTIM_BDTR_OSSI            (1 << 10) /* Bit 10: Off-State Selection for Idle mode */
+#define GTIM_BDTR_OSSR            (1 << 11) /* Bit 11: Off-State Selection for Run mode */
+#define GTIM_BDTR_BKE             (1 << 12) /* Bit 12: Break enable */
+#define GTIM_BDTR_BKP             (1 << 13) /* Bit 13: Break Polarity */
+#define GTIM_BDTR_AOE             (1 << 14) /* Bit 14: Automatic Output enable */
+#define GTIM_BDTR_MOE             (1 << 15) /* Bit 15: Main Output enable */
+#define GTIM_BDTR_BKF_SHIFT       (16)      /* Bits 16-19: Break filter */
+#define GTIM_BDTR_BKF_MASK        (15 << GTIM_BDTR_BKF_SHIFT)
+#  define GTIM_BDTR_BKF_NOFILT    (0 << GTIM_BDTR_BKF_SHIFT)   /* 0000: No filter, BRK acts asynchronously */
+#  define GTIM_BDTR_BKF_FCKINT2   (1 << GTIM_BDTR_BKF_SHIFT)   /* 0001: fSAMPLING=fCK_INT, N=2 */
+#  define GTIM_BDTR_BKF_FCKINT4   (2 << GTIM_BDTR_BKF_SHIFT)   /* 0010: fSAMPLING=fCK_INT, N=4 */
+#  define GTIM_BDTR_BKF_FCKINT8   (3 << GTIM_BDTR_BKF_SHIFT)   /* 0011: fSAMPLING=fCK_INT, N=8 */
+#  define GTIM_BDTR_BKF_FDTSd26   (4 << GTIM_BDTR_BKF_SHIFT)   /* 0100: fSAMPLING=fDTS/2, N=6 */
+#  define GTIM_BDTR_BKF_FDTSd28   (5 << GTIM_BDTR_BKF_SHIFT)   /* 0101: fSAMPLING=fDTS/2, N=8 */
+#  define GTIM_BDTR_BKF_FDTSd36   (6 << GTIM_BDTR_BKF_SHIFT)   /* 0110: fSAMPLING=fDTS/4, N=6 */
+#  define GTIM_BDTR_BKF_FDTSd38   (7 << GTIM_BDTR_BKF_SHIFT)   /* 0111: fSAMPLING=fDTS/4, N=8 */
+#  define GTIM_BDTR_BKF_FDTSd86   (8 << GTIM_BDTR_BKF_SHIFT)   /* 1000: fSAMPLING=fDTS/8, N=6 */
+#  define GTIM_BDTR_BKF_FDTSd88   (9 << GTIM_BDTR_BKF_SHIFT)   /* 1001: fSAMPLING=fDTS/8, N=8 */
+#  define GTIM_BDTR_BKF_FDTSd165  (10 << GTIM_BDTR_BKF_SHIFT)  /* 1010: fSAMPLING=fDTS/16, N=5 */
+#  define GTIM_BDTR_BKF_FDTSd166  (11 << GTIM_BDTR_BKF_SHIFT)  /* 1011: fSAMPLING=fDTS/16, N=6 */
+#  define GTIM_BDTR_BKF_FDTSd168  (12 << GTIM_BDTR_BKF_SHIFT)  /* 1100: fSAMPLING=fDTS/16, N=8 */
+#  define GTIM_BDTR_BKF_FDTSd325  (13 << GTIM_BDTR_BKF_SHIFT)  /* 1101: fSAMPLING=fDTS/32, N=5 */
+#  define GTIM_BDTR_BKF_FDTSd326  (14 << GTIM_BDTR_BKF_SHIFT)  /* 1110: fSAMPLING=fDTS/32, N=6 */
+#  define GTIM_BDTR_BKF_FDTSd328  (15 << GTIM_BDTR_BKF_SHIFT)  /* 1111: fSAMPLING=fDTS/32, N=8 */
+
+/* DMA control register */
+
+#define GTIM_DCR_DBA_SHIFT        (0)       /* Bits 4-0: DMA Base Address */
+#define GTIM_DCR_DBA_MASK         (0x1f << GTIM_DCR_DBA_SHIFT)
+#define GTIM_DCR_DBL_SHIFT        (8)       /* Bits 12-8: DMA Burst Length */
+#define GTIM_DCR_DBL_MASK         (0x1f << GTIM_DCR_DBL_SHIFT)
+
+/* Control register 1 */
+
+#define BTIM_CR1_CEN              (1 << 0)  /* Bit 0: Counter enable */
+#define BTIM_CR1_UDIS             (1 << 1)  /* Bit 1: Update Disable */
+#define BTIM_CR1_URS              (1 << 2)  /* Bit 2: Update Request Source */
+#define BTIM_CR1_OPM              (1 << 3)  /* Bit 3: One Pulse Mode */
+#define BTIM_CR1_ARPE             (1 << 7)  /* Bit 7: Auto-Reload Preload enable */
+
+/* Control register 2 */
+
+#define BTIM_CR2_MMS_SHIFT        (4)       /* Bits 6-4: Master Mode Selection */
+#define BTIM_CR2_MMS_MASK         (7 << BTIM_CR2_MMS_SHIFT)
+#  define BTIM_CR2_RESET          (0 << BTIM_CR2_MMS_SHIFT) /* 000: Reset */
+#  define BTIM_CR2_ENAB           (1 << BTIM_CR2_MMS_SHIFT) /* 001: Enable */
+#  define BTIM_CR2_UPDT           (2 << BTIM_CR2_MMS_SHIFT) /* 010: Update */
+
+/* DMA/Interrupt enable register */
+
+#define BTIM_DIER_UIE             (1 << 0)  /* Bit 0: Update interrupt enable */
+#define BTIM_DIER_UDE             (1 << 8)  /* Bit 8: Update DMA request enable */
+
+/* Status register */
+
+#define BTIM_SR_UIF               (1 << 0)  /* Bit 0: Update interrupt flag */
+
+/* Event generation register */
+
+#define BTIM_EGR_UG               (1 << 0)  /* Bit 0: Update generation */
+
+#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_TIM_H */
diff --git a/arch/arm/src/stm32l4/chip/stm32l4x6xx_firewall.h b/arch/arm/src/stm32l4/chip/stm32l4x6xx_firewall.h
index e0471567fec6ac6c73edd4ddb75aa1d3f03f7a96..e1531de5d0349d8e73e6a1ccb0f6158e77338f43 100644
--- a/arch/arm/src/stm32l4/chip/stm32l4x6xx_firewall.h
+++ b/arch/arm/src/stm32l4/chip/stm32l4x6xx_firewall.h
@@ -101,4 +101,3 @@
 #define FIREWALL_CR_VDE                 (1 << 2) /* Bit 2: Volatile data execution */
 
 #endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_FIREWALL_H */
-
diff --git a/arch/arm/src/stm32/chip/stm32_otgfs.h b/arch/arm/src/stm32l4/chip/stm32l4x6xx_otgfs.h
similarity index 66%
rename from arch/arm/src/stm32/chip/stm32_otgfs.h
rename to arch/arm/src/stm32l4/chip/stm32l4x6xx_otgfs.h
index 575214e6482b987f54937e5ab159831174f9aadb..49874d7233e94181d00ded10e10dcd86c489b6f6 100644
--- a/arch/arm/src/stm32/chip/stm32_otgfs.h
+++ b/arch/arm/src/stm32l4/chip/stm32l4x6xx_otgfs.h
@@ -1,8 +1,11 @@
 /****************************************************************************************************
- * arch/arm/src/stm32/chip/stm32_otgfs.h
+ * arch/arm/src/stm32l4/chip/stm32l4x6xx_otgfs.h
  *
- *   Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
  *   Author: Gregory Nutt 
+ *           Paul Alexander Patience 
+ *           dev@ziggurat29.com
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -33,16 +36,12 @@
  *
  ****************************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32_OTGFS_H
-#define __ARCH_ARM_SRC_STM32_CHIP_STM32_OTGFS_H
+#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_OTGFS_H
+#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_OTGFS_H
 
 /****************************************************************************************************
  * Included Files
  ****************************************************************************************************/
-
-#include 
-#include "chip.h"
-
 /****************************************************************************************************
  * Pre-processor Definitions
  ****************************************************************************************************/
@@ -62,325 +61,184 @@
 /* Register Offsets *********************************************************************************/
 /* Core global control and status registers */
 
-#define STM32_OTGFS_GOTGCTL_OFFSET      0x0000 /* Control and status register */
-#define STM32_OTGFS_GOTGINT_OFFSET      0x0004 /* Interrupt register */
-#define STM32_OTGFS_GAHBCFG_OFFSET      0x0008 /* AHB configuration register */
-#define STM32_OTGFS_GUSBCFG_OFFSET      0x000c /* USB configuration register */
-#define STM32_OTGFS_GRSTCTL_OFFSET      0x0010 /* Reset register */
-#define STM32_OTGFS_GINTSTS_OFFSET      0x0014 /* Core interrupt register */
-#define STM32_OTGFS_GINTMSK_OFFSET      0x0018 /* Interrupt mask register */
-#define STM32_OTGFS_GRXSTSR_OFFSET      0x001c /* Receive status debug read/OTG status read register */
-#define STM32_OTGFS_GRXSTSP_OFFSET      0x0020 /* Receive status debug read/OTG status pop register */
-#define STM32_OTGFS_GRXFSIZ_OFFSET      0x0024 /* Receive FIFO size register */
-#define STM32_OTGFS_HNPTXFSIZ_OFFSET    0x0028 /* Host non-periodic transmit FIFO size register */
-#define STM32_OTGFS_DIEPTXF0_OFFSET     0x0028 /* Endpoint 0 Transmit FIFO size */
-#define STM32_OTGFS_HNPTXSTS_OFFSET     0x002c /* Non-periodic transmit FIFO/queue status register */
-#define STM32_OTGFS_GCCFG_OFFSET        0x0038 /* General core configuration register */
-#define STM32_OTGFS_CID_OFFSET          0x003c /* Core ID register  */
-#define STM32_OTGFS_HPTXFSIZ_OFFSET     0x0100 /* Host periodic transmit FIFO size register */
-
-#define STM32_OTGFS_DIEPTXF_OFFSET(n)   (104+(((n)-1) << 2))
-#define STM32_OTGFS_DIEPTXF1_OFFSET     0x0104 /* Device IN endpoint transmit FIFO1 size register */
-#define STM32_OTGFS_DIEPTXF2_OFFSET     0x0108 /* Device IN endpoint transmit FIFO2 size register */
-#define STM32_OTGFS_DIEPTXF3_OFFSET     0x010c /* Device IN endpoint transmit FIFO3 size register */
+#define STM32L4_OTGFS_GOTGCTL_OFFSET      0x0000 /* Control and status register */
+#define STM32L4_OTGFS_GOTGINT_OFFSET      0x0004 /* Interrupt register */
+#define STM32L4_OTGFS_GAHBCFG_OFFSET      0x0008 /* AHB configuration register */
+#define STM32L4_OTGFS_GUSBCFG_OFFSET      0x000c /* USB configuration register */
+#define STM32L4_OTGFS_GRSTCTL_OFFSET      0x0010 /* Reset register */
+#define STM32L4_OTGFS_GINTSTS_OFFSET      0x0014 /* Core interrupt register */
+#define STM32L4_OTGFS_GINTMSK_OFFSET      0x0018 /* Interrupt mask register */
+#define STM32L4_OTGFS_GRXSTSR_OFFSET      0x001c /* Receive status debug read/OTG status read register */
+#define STM32L4_OTGFS_GRXSTSP_OFFSET      0x0020 /* Receive status debug read/OTG status pop register */
+#define STM32L4_OTGFS_GRXFSIZ_OFFSET      0x0024 /* Receive FIFO size register */
+#define STM32L4_OTGFS_HNPTXFSIZ_OFFSET    0x0028 /* Host non-periodic transmit FIFO size register */
+#define STM32L4_OTGFS_DIEPTXF0_OFFSET     0x0028 /* Endpoint 0 Transmit FIFO size */
+#define STM32L4_OTGFS_HNPTXSTS_OFFSET     0x002c /* Non-periodic transmit FIFO/queue status register */
+#define STM32L4_OTGFS_GCCFG_OFFSET        0x0038 /* General core configuration register */
+#define STM32L4_OTGFS_CID_OFFSET          0x003c /* Core ID register  */
+#define STM32L4_OTGFS_GLPMCFG_OFFSET      0x0054 /* LPM configuration register */
+#define STM32L4_OTGFS_GPWRDN_OFFSET       0x0058 /* Power down register */
+#define STM32L4_OTGFS_GADPCTL_OFSSET      0x005c /* ADP timer, control and status register */
+#define STM32L4_OTGFS_HPTXFSIZ_OFFSET     0x0100 /* Host periodic transmit FIFO size register */
+
+#define STM32L4_OTGFS_DIEPTXF_OFFSET(n)   (104+(((n)-1) << 2))
 
 /* Host-mode control and status registers */
 
-#define STM32_OTGFS_HCFG_OFFSET         0x0400 /* Host configuration register */
-#define STM32_OTGFS_HFIR_OFFSET         0x0404 /* Host frame interval register */
-#define STM32_OTGFS_HFNUM_OFFSET        0x0408 /* Host frame number/frame time remaining register */
-#define STM32_OTGFS_HPTXSTS_OFFSET      0x0410 /* Host periodic transmit FIFO/queue status register */
-#define STM32_OTGFS_HAINT_OFFSET        0x0414 /* Host all channels interrupt register */
-#define STM32_OTGFS_HAINTMSK_OFFSET     0x0418 /* Host all channels interrupt mask register */
-#define STM32_OTGFS_HPRT_OFFSET         0x0440 /* Host port control and status register */
-
-#define STM32_OTGFS_CHAN_OFFSET(n)      (0x500 + ((n) << 5)
-#define STM32_OTGFS_HCCHAR_CHOFFSET     0x0000 /* Host channel characteristics register */
-#define STM32_OTGFS_HCINT_CHOFFSET      0x0008 /* Host channel interrupt register */
-#define STM32_OTGFS_HCINTMSK_CHOFFSET   0x000c /* Host channel interrupt mask register */
-#define STM32_OTGFS_HCTSIZ_CHOFFSET     0x0010 /* Host channel interrupt register */
-
-#define STM32_OTGFS_HCCHAR_OFFSET(n)    (0x500 + ((n) << 5))
-#define STM32_OTGFS_HCCHAR0_OFFSET      0x0500 /* Host channel-0 characteristics register */
-#define STM32_OTGFS_HCCHAR1_OFFSET      0x0520 /* Host channel-1 characteristics register */
-#define STM32_OTGFS_HCCHAR2_OFFSET      0x0540 /* Host channel-2 characteristics register */
-#define STM32_OTGFS_HCCHAR3_OFFSET      0x0560 /* Host channel-3 characteristics register */
-#define STM32_OTGFS_HCCHAR4_OFFSET      0x0580 /* Host channel-4 characteristics register */
-#define STM32_OTGFS_HCCHAR5_OFFSET      0x05a0 /* Host channel-5 characteristics register */
-#define STM32_OTGFS_HCCHAR6_OFFSET      0x05c0 /* Host channel-6 characteristics register */
-#define STM32_OTGFS_HCCHAR7_OFFSET      0x05e0 /* Host channel-7 characteristics register */
-
-#define STM32_OTGFS_HCINT_OFFSET(n)     (0x508 + ((n) << 5))
-#define STM32_OTGFS_HCINT0_OFFSET       0x0508 /* Host channel-0 interrupt register */
-#define STM32_OTGFS_HCINT1_OFFSET       0x0528 /* Host channel-1 interrupt register */
-#define STM32_OTGFS_HCINT2_OFFSET       0x0548 /* Host channel-2 interrupt register */
-#define STM32_OTGFS_HCINT3_OFFSET       0x0568 /* Host channel-3 interrupt register */
-#define STM32_OTGFS_HCINT4_OFFSET       0x0588 /* Host channel-4 interrupt register */
-#define STM32_OTGFS_HCINT5_OFFSET       0x05a8 /* Host channel-5 interrupt register */
-#define STM32_OTGFS_HCINT6_OFFSET       0x05c8 /* Host channel-6 interrupt register */
-#define STM32_OTGFS_HCINT7_OFFSET       0x05e8 /* Host channel-7 interrupt register */
-
-#define STM32_OTGFS_HCINTMSK_OFFSET(n)  (0x50c + ((n) << 5))
-#define STM32_OTGFS_HCINTMSK0_OFFSET    0x050c /* Host channel-0 interrupt mask register */
-#define STM32_OTGFS_HCINTMSK1_OFFSET    0x052c /* Host channel-1 interrupt mask register */
-#define STM32_OTGFS_HCINTMSK2_OFFSET    0x054c /* Host channel-2 interrupt mask register */
-#define STM32_OTGFS_HCINTMSK3_OFFSET    0x056c /* Host channel-3 interrupt mask register */
-#define STM32_OTGFS_HCINTMSK4_OFFSET    0x058c /* Host channel-4 interrupt mask register */
-#define STM32_OTGFS_HCINTMSK5_OFFSET    0x05ac /* Host channel-5 interrupt mask register */
-#define STM32_OTGFS_HCINTMSK6_OFFSET    0x05cc /* Host channel-6 interrupt mask register */
-#define STM32_OTGFS_HCINTMSK7_OFFSET    0x05ec /* Host channel-7 interrupt mask register */
-
-#define STM32_OTGFS_HCTSIZ_OFFSET(n)    (0x510 + ((n) << 5))
-#define STM32_OTGFS_HCTSIZ0_OFFSET      0x0510 /* Host channel-0 interrupt register */
-#define STM32_OTGFS_HCTSIZ1_OFFSET      0x0530 /* Host channel-1 interrupt register */
-#define STM32_OTGFS_HCTSIZ2_OFFSET      0x0550 /* Host channel-2 interrupt register */
-#define STM32_OTGFS_HCTSIZ3_OFFSET      0x0570 /* Host channel-3 interrupt register */
-#define STM32_OTGFS_HCTSIZ4_OFFSET      0x0590 /* Host channel-4 interrupt register */
-#define STM32_OTGFS_HCTSIZ5_OFFSET      0x05b0 /* Host channel-5 interrupt register */
-#define STM32_OTGFS_HCTSIZ6_OFFSET      0x05d0 /* Host channel-6 interrupt register */
-#define STM32_OTGFS_HCTSIZ7_OFFSET      0x05f0 /* Host channel-7 interrupt register */
+#define STM32L4_OTGFS_HCFG_OFFSET         0x0400 /* Host configuration register */
+#define STM32L4_OTGFS_HFIR_OFFSET         0x0404 /* Host frame interval register */
+#define STM32L4_OTGFS_HFNUM_OFFSET        0x0408 /* Host frame number/frame time remaining register */
+#define STM32L4_OTGFS_HPTXSTS_OFFSET      0x0410 /* Host periodic transmit FIFO/queue status register */
+#define STM32L4_OTGFS_HAINT_OFFSET        0x0414 /* Host all channels interrupt register */
+#define STM32L4_OTGFS_HAINTMSK_OFFSET     0x0418 /* Host all channels interrupt mask register */
+#define STM32L4_OTGFS_HPRT_OFFSET         0x0440 /* Host port control and status register */
+
+#define STM32L4_OTGFS_CHAN_OFFSET(n)      (0x500 + ((n) << 5)
+#define STM32L4_OTGFS_HCCHAR_CHOFFSET     0x0000 /* Host channel characteristics register */
+#define STM32L4_OTGFS_HCINT_CHOFFSET      0x0008 /* Host channel interrupt register */
+#define STM32L4_OTGFS_HCINTMSK_CHOFFSET   0x000c /* Host channel interrupt mask register */
+#define STM32L4_OTGFS_HCTSIZ_CHOFFSET     0x0010 /* Host channel interrupt register */
+
+#define STM32L4_OTGFS_HCCHAR_OFFSET(n)    (0x500 + ((n) << 5))
+
+#define STM32L4_OTGFS_HCINT_OFFSET(n)     (0x508 + ((n) << 5))
+
+#define STM32L4_OTGFS_HCINTMSK_OFFSET(n)  (0x50c + ((n) << 5))
+
+#define STM32L4_OTGFS_HCTSIZ_OFFSET(n)    (0x510 + ((n) << 5))
 
 /* Device-mode control and status registers */
 
-#define STM32_OTGFS_DCFG_OFFSET         0x0800 /* Device configuration register */
-#define STM32_OTGFS_DCTL_OFFSET         0x0804 /* Device control register */
-#define STM32_OTGFS_DSTS_OFFSET         0x0808 /* Device status register */
-#define STM32_OTGFS_DIEPMSK_OFFSET      0x0810 /* Device IN endpoint common interrupt mask register */
-#define STM32_OTGFS_DOEPMSK_OFFSET      0x0814 /* Device OUT endpoint common interrupt mask register */
-#define STM32_OTGFS_DAINT_OFFSET        0x0818 /* Device all endpoints interrupt register */
-#define STM32_OTGFS_DAINTMSK_OFFSET     0x081c /* All endpoints interrupt mask register */
-#define STM32_OTGFS_DVBUSDIS_OFFSET     0x0828 /* Device VBUS discharge time register */
-#define STM32_OTGFS_DVBUSPULSE_OFFSET   0x082c /* Device VBUS pulsing time register */
-#define STM32_OTGFS_DIEPEMPMSK_OFFSET   0x0834 /* Device IN endpoint FIFO empty interrupt mask register */
-
-#define STM32_OTGFS_DIEP_OFFSET(n)      (0x0900 + ((n) << 5))
-#define STM32_OTGFS_DIEPCTL_EPOFFSET    0x0000 /* Device endpoint control register */
-#define STM32_OTGFS_DIEPINT_EPOFFSET    0x0008 /* Device endpoint interrupt register */
-#define STM32_OTGFS_DIEPTSIZ_EPOFFSET   0x0010 /* Device IN endpoint transfer size register */
-#define STM32_OTGFS_DTXFSTS_EPOFFSET    0x0018 /* Device IN endpoint transmit FIFO status register */
-
-#define STM32_OTGFS_DIEPCTL_OFFSET(n)   (0x0900 + ((n) << 5))
-#define STM32_OTGFS_DIEPCTL0_OFFSET     0x0900 /* Device control IN endpoint 0 control register */
-#define STM32_OTGFS_DIEPCTL1_OFFSET     0x0920 /* Device control IN endpoint 2 control register */
-#define STM32_OTGFS_DIEPCTL2_OFFSET     0x0940 /* Device control IN endpoint 3 control register */
-#define STM32_OTGFS_DIEPCTL3_OFFSET     0x0960 /* Device control IN endpoint 4 control register */
-
-#define STM32_OTGFS_DIEPINT_OFFSET(n)   (0x0908 + ((n) << 5))
-#define STM32_OTGFS_DIEPINT0_OFFSET     0x0908 /* Device endpoint-0 interrupt register */
-#define STM32_OTGFS_DIEPINT1_OFFSET     0x0928 /* Device endpoint-1 interrupt register */
-#define STM32_OTGFS_DIEPINT2_OFFSET     0x0948 /* Device endpoint-2 interrupt register */
-#define STM32_OTGFS_DIEPINT3_OFFSET     0x0968 /* Device endpoint-3 interrupt register */
-
-#define STM32_OTGFS_DIEPTSIZ_OFFSET(n)  (0x910 + ((n) << 5))
-#define STM32_OTGFS_DIEPTSIZ0_OFFSET    0x0910 /* Device IN endpoint 0 transfer size register */
-#define STM32_OTGFS_DIEPTSIZ1_OFFSET    0x0930 /* Device IN endpoint 1 transfer size register */
-#define STM32_OTGFS_DIEPTSIZ2_OFFSET    0x0950 /* Device IN endpoint 2 transfer size register */
-#define STM32_OTGFS_DIEPTSIZ3_OFFSET    0x0970 /* Device IN endpoint 3 transfer size register */
-
-#define STM32_OTGFS_DTXFSTS_OFFSET(n)   (0x0918 + ((n) << 5))
-#define STM32_OTGFS_DTXFSTS0_OFFSET     0x0918 /* Device OUT endpoint-0 TxFIFO status register */
-#define STM32_OTGFS_DTXFSTS1_OFFSET     0x0938 /* Device OUT endpoint-1 TxFIFO status register */
-#define STM32_OTGFS_DTXFSTS2_OFFSET     0x0958 /* Device OUT endpoint-2 TxFIFO status register */
-#define STM32_OTGFS_DTXFSTS3_OFFSET     0x0978 /* Device OUT endpoint-3 TxFIFO status register */
-
-#define STM32_OTGFS_DOEP_OFFSET(n)      (0x0b00 + ((n) << 5))
-#define STM32_OTGFS_DOEPCTL_EPOFFSET    0x0000 /* Device control OUT endpoint 0 control register */
-#define STM32_OTGFS_DOEPINT_EPOFFSET    0x0008 /* Device endpoint-x interrupt register */
-
-#define STM32_OTGFS_DOEPCTL_OFFSET(n)   (0x0b00 + ((n) << 5))
-#define STM32_OTGFS_DOEPCTL0_OFFSET     0x00b00 /* Device OUT endpoint 0 control register */
-#define STM32_OTGFS_DOEPCTL1_OFFSET     0x00b20 /* Device OUT endpoint 1 control register */
-#define STM32_OTGFS_DOEPCTL2_OFFSET     0x00b40 /* Device OUT endpoint 2 control register */
-#define STM32_OTGFS_DOEPCTL3_OFFSET     0x00b60 /* Device OUT endpoint 3 control register */
-
-#define STM32_OTGFS_DOEPINT_OFFSET(n)   (0x0b08 + ((n) << 5))
-#define STM32_OTGFS_DOEPINT0_OFFSET     0x00b08 /* Device endpoint-0 interrupt register */
-#define STM32_OTGFS_DOEPINT1_OFFSET     0x00b28 /* Device endpoint-1 interrupt register */
-#define STM32_OTGFS_DOEPINT2_OFFSET     0x00b48 /* Device endpoint-2 interrupt register */
-#define STM32_OTGFS_DOEPINT3_OFFSET     0x00b68 /* Device endpoint-3 interrupt register */
-
-#define STM32_OTGFS_DOEPTSIZ_OFFSET(n)  (0x0b10 + ((n) << 5))
-#define STM32_OTGFS_DOEPTSIZ0_OFFSET    0x00b10 /* Device OUT endpoint-0 transfer size register */
-#define STM32_OTGFS_DOEPTSIZ1_OFFSET    0x00b30 /* Device OUT endpoint-1 transfer size register */
-#define STM32_OTGFS_DOEPTSIZ2_OFFSET    0x00b50 /* Device OUT endpoint-2 transfer size register */
-#define STM32_OTGFS_DOEPTSIZ3_OFFSET    0x00b70 /* Device OUT endpoint-3 transfer size register */
+#define STM32L4_OTGFS_DCFG_OFFSET         0x0800 /* Device configuration register */
+#define STM32L4_OTGFS_DCTL_OFFSET         0x0804 /* Device control register */
+#define STM32L4_OTGFS_DSTS_OFFSET         0x0808 /* Device status register */
+#define STM32L4_OTGFS_DIEPMSK_OFFSET      0x0810 /* Device IN endpoint common interrupt mask register */
+#define STM32L4_OTGFS_DOEPMSK_OFFSET      0x0814 /* Device OUT endpoint common interrupt mask register */
+#define STM32L4_OTGFS_DAINT_OFFSET        0x0818 /* Device all endpoints interrupt register */
+#define STM32L4_OTGFS_DAINTMSK_OFFSET     0x081c /* All endpoints interrupt mask register */
+#define STM32L4_OTGFS_DVBUSDIS_OFFSET     0x0828 /* Device VBUS discharge time register */
+#define STM32L4_OTGFS_DVBUSPULSE_OFFSET   0x082c /* Device VBUS pulsing time register */
+#define STM32L4_OTGFS_DIEPEMPMSK_OFFSET   0x0834 /* Device IN endpoint FIFO empty interrupt mask register */
 
-/* Power and clock gating registers */
+#define STM32L4_OTGFS_DIEP_OFFSET(n)      (0x0900 + ((n) << 5))
+#define STM32L4_OTGFS_DIEPCTL_EPOFFSET    0x0000 /* Device endpoint control register */
+#define STM32L4_OTGFS_DIEPINT_EPOFFSET    0x0008 /* Device endpoint interrupt register */
+#define STM32L4_OTGFS_DIEPTSIZ_EPOFFSET   0x0010 /* Device IN endpoint transfer size register */
+#define STM32L4_OTGFS_DTXFSTS_EPOFFSET    0x0018 /* Device IN endpoint transmit FIFO status register */
 
-#define STM32_OTGFS_PCGCCTL_OFFSET      0x0e00 /* Power and clock gating control register */
+#define STM32L4_OTGFS_DIEPCTL_OFFSET(n)   (0x0900 + ((n) << 5))
 
-/* Data FIFO (DFIFO) access registers */
+#define STM32L4_OTGFS_DIEPINT_OFFSET(n)   (0x0908 + ((n) << 5))
 
-#define STM32_OTGFS_DFIFO_DEP_OFFSET(n) (0x1000 + ((n) << 12))
-#define STM32_OTGFS_DFIFO_HCH_OFFSET(n) (0x1000 + ((n) << 12))
+#define STM32L4_OTGFS_DIEPTSIZ_OFFSET(n)  (0x910 + ((n) << 5))
 
-#define STM32_OTGFS_DFIFO_DEP0_OFFSET   0x1000 /* 0x1000-0x1ffc Device IN/OUT Endpoint 0 DFIFO Write/Read Access */
-#define STM32_OTGFS_DFIFO_HCH0_OFFSET   0x1000 /* 0x1000-0x1ffc Host OUT/IN Channel 0 DFIFO Read/Write Access */
+#define STM32L4_OTGFS_DTXFSTS_OFFSET(n)   (0x0918 + ((n) << 5))
 
-#define STM32_OTGFS_DFIFO_DEP1_OFFSET   0x2000 /* 0x2000-0x2ffc Device IN/OUT Endpoint 1 DFIFO Write/Read Access */
-#define STM32_OTGFS_DFIFO_HCH1_OFFSET   0x2000 /* 0x2000-0x2ffc Host OUT/IN Channel 1 DFIFO Read/Write Access */
+#define STM32L4_OTGFS_DOEP_OFFSET(n)      (0x0b00 + ((n) << 5))
+#define STM32L4_OTGFS_DOEPCTL_EPOFFSET    0x0000 /* Device control OUT endpoint 0 control register */
+#define STM32L4_OTGFS_DOEPINT_EPOFFSET    0x0008 /* Device endpoint-x interrupt register */
+#define STM32L4_OTGFS_DOEPTSIZ_EPOFFSET   0x0010 /* Device endpoint OUT transfer size register */
 
-#define STM32_OTGFS_DFIFO_DEP2_OFFSET   0x3000 /* 0x3000-0x3ffc Device IN/OUT Endpoint 2 DFIFO Write/Read Access */
-#define STM32_OTGFS_DFIFO_HCH2_OFFSET   0x3000 /* 0x3000-0x3ffc Host OUT/IN Channel 2 DFIFO Read/Write Access */
+#define STM32L4_OTGFS_DOEPCTL_OFFSET(n)   (0x0b00 + ((n) << 5))
 
-#define STM32_OTGFS_DFIFO_DEP3_OFFSET   0x4000 /* 0x4000-0x4ffc Device IN/OUT Endpoint 3 DFIFO Write/Read Access */
-#define STM32_OTGFS_DFIFO_HCH3_OFFSET   0x4000 /* 0x4000-0x4ffc Host OUT/IN Channel 3 DFIFO Read/Write Access */
+#define STM32L4_OTGFS_DOEPINT_OFFSET(n)   (0x0b08 + ((n) << 5))
+
+#define STM32L4_OTGFS_DOEPTSIZ_OFFSET(n)  (0x0b10 + ((n) << 5))
+
+/* Power and clock gating registers */
+
+#define STM32L4_OTGFS_PCGCCTL_OFFSET      0x0e00 /* Power and clock gating control register */
+
+/* Data FIFO (DFIFO) access registers */
+
+#define STM32L4_OTGFS_DFIFO_DEP_OFFSET(n) (0x1000 + ((n) << 12))
+#define STM32L4_OTGFS_DFIFO_HCH_OFFSET(n) (0x1000 + ((n) << 12))
 
 /* Register Addresses *******************************************************************************/
 
-#define STM32_OTGFS_GOTGCTL             (STM32_OTGFS_BASE+STM32_OTGFS_GOTGCTL_OFFSET)
-#define STM32_OTGFS_GOTGINT             (STM32_OTGFS_BASE+STM32_OTGFS_GOTGINT_OFFSET)
-#define STM32_OTGFS_GAHBCFG             (STM32_OTGFS_BASE+STM32_OTGFS_GAHBCFG_OFFSET)
-#define STM32_OTGFS_GUSBCFG             (STM32_OTGFS_BASE+STM32_OTGFS_GUSBCFG_OFFSET)
-#define STM32_OTGFS_GRSTCTL             (STM32_OTGFS_BASE+STM32_OTGFS_GRSTCTL_OFFSET)
-#define STM32_OTGFS_GINTSTS             (STM32_OTGFS_BASE+STM32_OTGFS_GINTSTS_OFFSET)
-#define STM32_OTGFS_GINTMSK             (STM32_OTGFS_BASE+STM32_OTGFS_GINTMSK_OFFSET)
-#define STM32_OTGFS_GRXSTSR             (STM32_OTGFS_BASE+STM32_OTGFS_GRXSTSR_OFFSET)
-#define STM32_OTGFS_GRXSTSP             (STM32_OTGFS_BASE+STM32_OTGFS_GRXSTSP_OFFSET)
-#define STM32_OTGFS_GRXFSIZ             (STM32_OTGFS_BASE+STM32_OTGFS_GRXFSIZ_OFFSET)
-#define STM32_OTGFS_HNPTXFSIZ           (STM32_OTGFS_BASE+STM32_OTGFS_HNPTXFSIZ_OFFSET)
-#define STM32_OTGFS_DIEPTXF0            (STM32_OTGFS_BASE+STM32_OTGFS_DIEPTXF0_OFFSET)
-#define STM32_OTGFS_HNPTXSTS            (STM32_OTGFS_BASE+STM32_OTGFS_HNPTXSTS_OFFSET)
-#define STM32_OTGFS_GCCFG               (STM32_OTGFS_BASE+STM32_OTGFS_GCCFG_OFFSET)
-#define STM32_OTGFS_CID                 (STM32_OTGFS_BASE+STM32_OTGFS_CID_OFFSET)
-#define STM32_OTGFS_HPTXFSIZ            (STM32_OTGFS_BASE+STM32_OTGFS_HPTXFSIZ_OFFSET)
-
-#define STM32_OTGFS_DIEPTXF(n)          (STM32_OTGFS_BASE+STM32_OTGFS_DIEPTXF_OFFSET(n))
-#define STM32_OTGFS_DIEPTXF1            (STM32_OTGFS_BASE+STM32_OTGFS_DIEPTXF1_OFFSET)
-#define STM32_OTGFS_DIEPTXF2            (STM32_OTGFS_BASE+STM32_OTGFS_DIEPTXF2_OFFSET)
-#define STM32_OTGFS_DIEPTXF3            (STM32_OTGFS_BASE+STM32_OTGFS_DIEPTXF3_OFFSET)
+#define STM32L4_OTGFS_GOTGCTL             (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GOTGCTL_OFFSET)
+#define STM32L4_OTGFS_GOTGINT             (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GOTGINT_OFFSET)
+#define STM32L4_OTGFS_GAHBCFG             (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GAHBCFG_OFFSET)
+#define STM32L4_OTGFS_GUSBCFG             (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GUSBCFG_OFFSET)
+#define STM32L4_OTGFS_GRSTCTL             (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GRSTCTL_OFFSET)
+#define STM32L4_OTGFS_GINTSTS             (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GINTSTS_OFFSET)
+#define STM32L4_OTGFS_GINTMSK             (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GINTMSK_OFFSET)
+#define STM32L4_OTGFS_GRXSTSR             (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GRXSTSR_OFFSET)
+#define STM32L4_OTGFS_GRXSTSP             (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GRXSTSP_OFFSET)
+#define STM32L4_OTGFS_GRXFSIZ             (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GRXFSIZ_OFFSET)
+#define STM32L4_OTGFS_HNPTXFSIZ           (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HNPTXFSIZ_OFFSET)
+#define STM32L4_OTGFS_DIEPTXF0            (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPTXF0_OFFSET)
+#define STM32L4_OTGFS_HNPTXSTS            (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HNPTXSTS_OFFSET)
+#define STM32L4_OTGFS_GCCFG               (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GCCFG_OFFSET)
+#define STM32L4_OTGFS_CID                 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_CID_OFFSET)
+#define STM32L4_OTGFS_GLPMCFG             (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GLPMCFG_OFFSET)
+#define STM32L4_OTGFS_GPWRDN              (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GPWRDN_OFFSET)
+#define STM32L4_OTGFS_GADPCTL             (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GADPCTL_OFSSET)
+#define STM32L4_OTGFS_HPTXFSIZ            (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HPTXFSIZ_OFFSET)
+
+#define STM32L4_OTGFS_DIEPTXF(n)          (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPTXF_OFFSET(n))
 
 /* Host-mode control and status registers */
 
-#define STM32_OTGFS_HCFG                (STM32_OTGFS_BASE+STM32_OTGFS_HCFG_OFFSET)
-#define STM32_OTGFS_HFIR                (STM32_OTGFS_BASE+STM32_OTGFS_HFIR_OFFSET)
-#define STM32_OTGFS_HFNUM               (STM32_OTGFS_BASE+STM32_OTGFS_HFNUM_OFFSET)
-#define STM32_OTGFS_HPTXSTS             (STM32_OTGFS_BASE+STM32_OTGFS_HPTXSTS_OFFSET)
-#define STM32_OTGFS_HAINT               (STM32_OTGFS_BASE+STM32_OTGFS_HAINT_OFFSET)
-#define STM32_OTGFS_HAINTMSK            (STM32_OTGFS_BASE+STM32_OTGFS_HAINTMSK_OFFSET)
-#define STM32_OTGFS_HPRT                (STM32_OTGFS_BASE+STM32_OTGFS_HPRT_OFFSET)
-
-#define STM32_OTGFS_CHAN(n)             (STM32_OTGFS_BASE+STM32_OTGFS_CHAN_OFFSET(n))
-
-#define STM32_OTGFS_HCCHAR(n)           (STM32_OTGFS_BASE+STM32_OTGFS_HCCHAR_OFFSET(n))
-#define STM32_OTGFS_HCCHAR0             (STM32_OTGFS_BASE+STM32_OTGFS_HCCHAR0_OFFSET)
-#define STM32_OTGFS_HCCHAR1             (STM32_OTGFS_BASE+STM32_OTGFS_HCCHAR1_OFFSET)
-#define STM32_OTGFS_HCCHAR2             (STM32_OTGFS_BASE+STM32_OTGFS_HCCHAR2_OFFSET)
-#define STM32_OTGFS_HCCHAR3             (STM32_OTGFS_BASE+STM32_OTGFS_HCCHAR3_OFFSET)
-#define STM32_OTGFS_HCCHAR4             (STM32_OTGFS_BASE+STM32_OTGFS_HCCHAR4_OFFSET)
-#define STM32_OTGFS_HCCHAR5             (STM32_OTGFS_BASE+STM32_OTGFS_HCCHAR5_OFFSET)
-#define STM32_OTGFS_HCCHAR6             (STM32_OTGFS_BASE+STM32_OTGFS_HCCHAR6_OFFSET)
-#define STM32_OTGFS_HCCHAR7             (STM32_OTGFS_BASE+STM32_OTGFS_HCCHAR7_OFFSET)
-
-#define STM32_OTGFS_HCINT(n)            (STM32_OTGFS_BASE+STM32_OTGFS_HCINT_OFFSET(n))
-#define STM32_OTGFS_HCINT0              (STM32_OTGFS_BASE+STM32_OTGFS_HCINT0_OFFSET)
-#define STM32_OTGFS_HCINT1              (STM32_OTGFS_BASE+STM32_OTGFS_HCINT1_OFFSET)
-#define STM32_OTGFS_HCINT2              (STM32_OTGFS_BASE+STM32_OTGFS_HCINT2_OFFSET)
-#define STM32_OTGFS_HCINT3              (STM32_OTGFS_BASE+STM32_OTGFS_HCINT3_OFFSET)
-#define STM32_OTGFS_HCINT4              (STM32_OTGFS_BASE+STM32_OTGFS_HCINT4_OFFSET)
-#define STM32_OTGFS_HCINT5              (STM32_OTGFS_BASE+STM32_OTGFS_HCINT5_OFFSET)
-#define STM32_OTGFS_HCINT6              (STM32_OTGFS_BASE+STM32_OTGFS_HCINT6_OFFSET)
-#define STM32_OTGFS_HCINT7              (STM32_OTGFS_BASE+STM32_OTGFS_HCINT7_OFFSET)
-
-#define STM32_OTGFS_HCINTMSK(n)         (STM32_OTGFS_BASE+STM32_OTGFS_HCINTMSK_OFFSET(n))
-#define STM32_OTGFS_HCINTMSK0           (STM32_OTGFS_BASE+STM32_OTGFS_HCINTMSK0_OFFSET)
-#define STM32_OTGFS_HCINTMSK1           (STM32_OTGFS_BASE+STM32_OTGFS_HCINTMSK1_OFFSET)
-#define STM32_OTGFS_HCINTMSK2           (STM32_OTGFS_BASE+STM32_OTGFS_HCINTMSK2_OFFSET)
-#define STM32_OTGFS_HCINTMSK3           (STM32_OTGFS_BASE+STM32_OTGFS_HCINTMSK3_OFFSET)
-#define STM32_OTGFS_HCINTMSK4           (STM32_OTGFS_BASE+STM32_OTGFS_HCINTMSK4_OFFSET)
-#define STM32_OTGFS_HCINTMSK5           (STM32_OTGFS_BASE+STM32_OTGFS_HCINTMSK5_OFFSET)
-#define STM32_OTGFS_HCINTMSK6           (STM32_OTGFS_BASE+STM32_OTGFS_HCINTMSK6_OFFSET)
-#define STM32_OTGFS_HCINTMSK7           (STM32_OTGFS_BASE+STM32_OTGFS_HCINTMSK7_OFFSET)_
-
-#define STM32_OTGFS_HCTSIZ(n)           (STM32_OTGFS_BASE+STM32_OTGFS_HCTSIZ_OFFSET(n))
-#define STM32_OTGFS_HCTSIZ0             (STM32_OTGFS_BASE+STM32_OTGFS_HCTSIZ0_OFFSET)
-#define STM32_OTGFS_HCTSIZ1             (STM32_OTGFS_BASE+STM32_OTGFS_HCTSIZ1_OFFSET)
-#define STM32_OTGFS_HCTSIZ2             (STM32_OTGFS_BASE+STM32_OTGFS_HCTSIZ2_OFFSET)
-#define STM32_OTGFS_HCTSIZ3             (STM32_OTGFS_BASE+STM32_OTGFS_HCTSIZ3_OFFSET)
-#define STM32_OTGFS_HCTSIZ4             (STM32_OTGFS_BASE+STM32_OTGFS_HCTSIZ4_OFFSET)
-#define STM32_OTGFS_HCTSIZ5             (STM32_OTGFS_BASE+STM32_OTGFS_HCTSIZ5_OFFSET)
-#define STM32_OTGFS_HCTSIZ6             (STM32_OTGFS_BASE+STM32_OTGFS_HCTSIZ6_OFFSET)
-#define STM32_OTGFS_HCTSIZ7             (STM32_OTGFS_BASE+STM32_OTGFS_HCTSIZ7_OFFSET)
+#define STM32L4_OTGFS_HCFG                (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCFG_OFFSET)
+#define STM32L4_OTGFS_HFIR                (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HFIR_OFFSET)
+#define STM32L4_OTGFS_HFNUM               (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HFNUM_OFFSET)
+#define STM32L4_OTGFS_HPTXSTS             (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HPTXSTS_OFFSET)
+#define STM32L4_OTGFS_HAINT               (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HAINT_OFFSET)
+#define STM32L4_OTGFS_HAINTMSK            (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HAINTMSK_OFFSET)
+#define STM32L4_OTGFS_HPRT                (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HPRT_OFFSET)
+
+#define STM32L4_OTGFS_CHAN(n)             (STM32L4_OTGFS_BASE+STM32L4_OTGFS_CHAN_OFFSET(n))
+
+#define STM32L4_OTGFS_HCCHAR(n)           (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCCHAR_OFFSET(n))
+
+#define STM32L4_OTGFS_HCINT(n)            (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINT_OFFSET(n))
+
+#define STM32L4_OTGFS_HCINTMSK(n)         (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINTMSK_OFFSET(n))
+
+#define STM32L4_OTGFS_HCTSIZ(n)           (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCTSIZ_OFFSET(n))
 
 /* Device-mode control and status registers */
 
-#define STM32_OTGFS_DCFG                (STM32_OTGFS_BASE+STM32_OTGFS_DCFG_OFFSET)
-#define STM32_OTGFS_DCTL                (STM32_OTGFS_BASE+STM32_OTGFS_DCTL_OFFSET)
-#define STM32_OTGFS_DSTS                (STM32_OTGFS_BASE+STM32_OTGFS_DSTS_OFFSET)
-#define STM32_OTGFS_DIEPMSK             (STM32_OTGFS_BASE+STM32_OTGFS_DIEPMSK_OFFSET)
-#define STM32_OTGFS_DOEPMSK             (STM32_OTGFS_BASE+STM32_OTGFS_DOEPMSK_OFFSET)
-#define STM32_OTGFS_DAINT               (STM32_OTGFS_BASE+STM32_OTGFS_DAINT_OFFSET)
-#define STM32_OTGFS_DAINTMSK            (STM32_OTGFS_BASE+STM32_OTGFS_DAINTMSK_OFFSET)
-#define STM32_OTGFS_DVBUSDIS            (STM32_OTGFS_BASE+STM32_OTGFS_DVBUSDIS_OFFSET)
-#define STM32_OTGFS_DVBUSPULSE          (STM32_OTGFS_BASE+STM32_OTGFS_DVBUSPULSE_OFFSET)
-#define STM32_OTGFS_DIEPEMPMSK          (STM32_OTGFS_BASE+STM32_OTGFS_DIEPEMPMSK_OFFSET)
-
-#define STM32_OTGFS_DIEP(n)             (STM32_OTGFS_BASE+STM32_OTGFS_DIEP_OFFSET(n))
-
-#define STM32_OTGFS_DIEPCTL(n)          (STM32_OTGFS_BASE+STM32_OTGFS_DIEPCTL_OFFSET(n))
-#define STM32_OTGFS_DIEPCTL0            (STM32_OTGFS_BASE+STM32_OTGFS_DIEPCTL0_OFFSET)
-#define STM32_OTGFS_DIEPCTL1            (STM32_OTGFS_BASE+STM32_OTGFS_DIEPCTL1_OFFSET)
-#define STM32_OTGFS_DIEPCTL2            (STM32_OTGFS_BASE+STM32_OTGFS_DIEPCTL2_OFFSET)
-#define STM32_OTGFS_DIEPCTL3            (STM32_OTGFS_BASE+STM32_OTGFS_DIEPCTL3_OFFSET)
-
-#define STM32_OTGFS_DIEPINT(n)          (STM32_OTGFS_BASE+STM32_OTGFS_DIEPINT_OFFSET(n))
-#define STM32_OTGFS_DIEPINT0            (STM32_OTGFS_BASE+STM32_OTGFS_DIEPINT0_OFFSET)
-#define STM32_OTGFS_DIEPINT1            (STM32_OTGFS_BASE+STM32_OTGFS_DIEPINT1_OFFSET)
-#define STM32_OTGFS_DIEPINT2            (STM32_OTGFS_BASE+STM32_OTGFS_DIEPINT2_OFFSET)
-#define STM32_OTGFS_DIEPINT3            (STM32_OTGFS_BASE+STM32_OTGFS_DIEPINT3_OFFSET)
-
-#define STM32_OTGFS_DIEPTSIZ(n)         (STM32_OTGFS_BASE+STM32_OTGFS_DIEPTSIZ_OFFSET(n))
-#define STM32_OTGFS_DIEPTSIZ0           (STM32_OTGFS_BASE+STM32_OTGFS_DIEPTSIZ0_OFFSET)
-#define STM32_OTGFS_DIEPTSIZ1           (STM32_OTGFS_BASE+STM32_OTGFS_DIEPTSIZ1_OFFSET)
-#define STM32_OTGFS_DIEPTSIZ2           (STM32_OTGFS_BASE+STM32_OTGFS_DIEPTSIZ2_OFFSET)
-#define STM32_OTGFS_DIEPTSIZ3           (STM32_OTGFS_BASE+STM32_OTGFS_DIEPTSIZ3_OFFSET)
-
-#define STM32_OTGFS_DTXFSTS(n)          (STM32_OTGFS_BASE+STM32_OTGFS_DTXFSTS_OFFSET(n))
-#define STM32_OTGFS_DTXFSTS0            (STM32_OTGFS_BASE+STM32_OTGFS_DTXFSTS0_OFFSET)
-#define STM32_OTGFS_DTXFSTS1            (STM32_OTGFS_BASE+STM32_OTGFS_DTXFSTS1_OFFSET)
-#define STM32_OTGFS_DTXFSTS2            (STM32_OTGFS_BASE+STM32_OTGFS_DTXFSTS2_OFFSET)
-#define STM32_OTGFS_DTXFSTS3            (STM32_OTGFS_BASE+STM32_OTGFS_DTXFSTS3_OFFSET)
-
-#define STM32_OTGFS_DOEP(n)             (STM32_OTGFS_BASE+STM32_OTGFS_DOEP_OFFSET(n))
-
-#define STM32_OTGFS_DOEPCTL(n)          (STM32_OTGFS_BASE+STM32_OTGFS_DOEPCTL_OFFSET(n))
-#define STM32_OTGFS_DOEPCTL0            (STM32_OTGFS_BASE+STM32_OTGFS_DOEPCTL0_OFFSET)
-#define STM32_OTGFS_DOEPCTL1            (STM32_OTGFS_BASE+STM32_OTGFS_DOEPCTL1_OFFSET)
-#define STM32_OTGFS_DOEPCTL2            (STM32_OTGFS_BASE+STM32_OTGFS_DOEPCTL2_OFFSET)
-#define STM32_OTGFS_DOEPCTL3            (STM32_OTGFS_BASE+STM32_OTGFS_DOEPCTL3_OFFSET)
-
-#define STM32_OTGFS_DOEPINT(n)          (STM32_OTGFS_BASE+STM32_OTGFS_DOEPINT_OFFSET(n))
-#define STM32_OTGFS_DOEPINT0            (STM32_OTGFS_BASE+STM32_OTGFS_DOEPINT0_OFFSET)
-#define STM32_OTGFS_DOEPINT1            (STM32_OTGFS_BASE+STM32_OTGFS_DOEPINT1_OFFSET)
-#define STM32_OTGFS_DOEPINT2            (STM32_OTGFS_BASE+STM32_OTGFS_DOEPINT2_OFFSET)
-#define STM32_OTGFS_DOEPINT3            (STM32_OTGFS_BASE+STM32_OTGFS_DOEPINT3_OFFSET)
-
-#define STM32_OTGFS_DOEPTSIZ(n)         (STM32_OTGFS_BASE+STM32_OTGFS_DOEPTSIZ_OFFSET(n))
-#define STM32_OTGFS_DOEPTSIZ0           (STM32_OTGFS_BASE+STM32_OTGFS_DOEPTSIZ0_OFFSET)
-#define STM32_OTGFS_DOEPTSIZ1           (STM32_OTGFS_BASE+STM32_OTGFS_DOEPTSIZ1_OFFSET)
-#define STM32_OTGFS_DOEPTSIZ2           (STM32_OTGFS_BASE+STM32_OTGFS_DOEPTSIZ2_OFFSET)
-#define STM32_OTGFS_DOEPTSIZ3           (STM32_OTGFS_BASE+STM32_OTGFS_DOEPTSIZ3_OFFSET)
+#define STM32L4_OTGFS_DCFG                (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DCFG_OFFSET)
+#define STM32L4_OTGFS_DCTL                (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DCTL_OFFSET)
+#define STM32L4_OTGFS_DSTS                (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DSTS_OFFSET)
+#define STM32L4_OTGFS_DIEPMSK             (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPMSK_OFFSET)
+#define STM32L4_OTGFS_DOEPMSK             (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPMSK_OFFSET)
+#define STM32L4_OTGFS_DAINT               (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DAINT_OFFSET)
+#define STM32L4_OTGFS_DAINTMSK            (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DAINTMSK_OFFSET)
+#define STM32L4_OTGFS_DVBUSDIS            (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DVBUSDIS_OFFSET)
+#define STM32L4_OTGFS_DVBUSPULSE          (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DVBUSPULSE_OFFSET)
+#define STM32L4_OTGFS_DIEPEMPMSK          (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPEMPMSK_OFFSET)
 
-/* Power and clock gating registers */
+#define STM32L4_OTGFS_DIEP(n)             (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEP_OFFSET(n))
 
-#define STM32_OTGFS_PCGCCTL             (STM32_OTGFS_BASE+STM32_OTGFS_PCGCCTL_OFFSET)
+#define STM32L4_OTGFS_DIEPCTL(n)          (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPCTL_OFFSET(n))
 
-/* Data FIFO (DFIFO) access registers */
+#define STM32L4_OTGFS_DIEPINT(n)          (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPINT_OFFSET(n))
 
-#define STM32_OTGFS_DFIFO_DEP(n)        (STM32_OTGFS_BASE+STM32_OTGFS_DFIFO_DEP_OFFSET(n))
-#define STM32_OTGFS_DFIFO_HCH(n)        (STM32_OTGFS_BASE+STM32_OTGFS_DFIFO_HCH_OFFSET(n))
+#define STM32L4_OTGFS_DIEPTSIZ(n)         (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPTSIZ_OFFSET(n))
 
-#define STM32_OTGFS_DFIFO_DEP0          (STM32_OTGFS_BASE+STM32_OTGFS_DFIFO_DEP0_OFFSET)
-#define STM32_OTGFS_DFIFO_HCH0          (STM32_OTGFS_BASE+STM32_OTGFS_DFIFO_HCH0_OFFSET)
+#define STM32L4_OTGFS_DTXFSTS(n)          (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DTXFSTS_OFFSET(n))
 
-#define STM32_OTGFS_DFIFO_DEP1          (STM32_OTGFS_BASE+STM32_OTGFS_DFIFO_DEP1_OFFSET)
-#define STM32_OTGFS_DFIFO_HCH1          (STM32_OTGFS_BASE+STM32_OTGFS_DFIFO_HCH1_OFFSET)
+#define STM32L4_OTGFS_DOEP(n)             (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEP_OFFSET(n))
+
+#define STM32L4_OTGFS_DOEPCTL(n)          (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPCTL_OFFSET(n))
+
+#define STM32L4_OTGFS_DOEPINT(n)          (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPINT_OFFSET(n))
+
+#define STM32L4_OTGFS_DOEPTSIZ(n)         (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPTSIZ_OFFSET(n))
+
+/* Power and clock gating registers */
+
+#define STM32L4_OTGFS_PCGCCTL             (STM32L4_OTGFS_BASE+STM32L4_OTGFS_PCGCCTL_OFFSET)
+
+/* Data FIFO (DFIFO) access registers */
+
+#define STM32L4_OTGFS_DFIFO_DEP(n)        (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DFIFO_DEP_OFFSET(n))
+#define STM32L4_OTGFS_DFIFO_HCH(n)        (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DFIFO_HCH_OFFSET(n))
 
-#define STM32_OTGFS_DFIFO_DEP2          (STM32_OTGFS_BASE+STM32_OTGFS_DFIFO_DEP2_OFFSET)
-#define STM32_OTGFS_DFIFO_HCH2          (STM32_OTGFS_BASE+STM32_OTGFS_DFIFO_HCH2_OFFSET)
 
-#define STM32_OTGFS_DFIFO_DEP3          (STM32_OTGFS_BASE+STM32_OTGFS_DFIFO_DEP3_OFFSET)
-#define STM32_OTGFS_DFIFO_HCH3          (STM32_OTGFS_BASE+STM32_OTGFS_DFIFO_HCH3_OFFSET)
 
 /* Register Bitfield Definitions ********************************************************************/
 /* Core global control and status registers */
@@ -389,17 +247,24 @@
 
 #define OTGFS_GOTGCTL_SRQSCS            (1 << 0)  /* Bit 0:  Session request success */
 #define OTGFS_GOTGCTL_SRQ               (1 << 1)  /* Bit 1:  Session request */
-                                                  /* Bits 2-72 Reserved, must be kept at reset value */
+#define OTGFS_GOTGCTL_VBVALOEN          (1 << 2)  /* Bit 2:  VBUS valid override enable */
+#define OTGFS_GOTGCTL_VBVALOVAL         (1 << 3)  /* Bit 3:  VBUS valid override value */
+#define OTGFS_GOTGCTL_AVALOEN           (1 << 4)  /* Bit 4:  A-peripheral session valid override enable */
+#define OTGFS_GOTGCTL_AVALOVAL          (1 << 5)  /* Bit 5:  A-peripheral session valid override value */
+#define OTGFS_GOTGCTL_BVALOEN           (1 << 6)  /* Bit 6:  B-peripheral session valid override enable */
+#define OTGFS_GOTGCTL_BVALOVAL          (1 << 7)  /* Bit 7:  B-peripheral session valid override value  */
 #define OTGFS_GOTGCTL_HNGSCS            (1 << 8)  /* Bit 8:  Host negotiation success */
 #define OTGFS_GOTGCTL_HNPRQ             (1 << 9)  /* Bit 9:  HNP request */
 #define OTGFS_GOTGCTL_HSHNPEN           (1 << 10) /* Bit 10: host set HNP enable */
 #define OTGFS_GOTGCTL_DHNPEN            (1 << 11) /* Bit 11: Device HNP enabled */
-                                                  /* Bits 12-15: Reserved, must be kept at reset value */
+#define OTGFS_GOTGCTL_EHEN              (1 << 12) /* Bit 12: Embedded host enable */
+                                                  /* Bits 13-15: Reserved, must be kept at reset value */
 #define OTGFS_GOTGCTL_CIDSTS            (1 << 16) /* Bit 16: Connector ID status */
 #define OTGFS_GOTGCTL_DBCT              (1 << 17) /* Bit 17: Long/short debounce time */
 #define OTGFS_GOTGCTL_ASVLD             (1 << 18) /* Bit 18: A-session valid */
 #define OTGFS_GOTGCTL_BSVLD             (1 << 19) /* Bit 19: B-session valid */
-                                                  /* Bits 20-31: Reserved, must be kept at reset value */
+#define OTGFS_GOTGCTL_OTGVER            (1 << 20) /* Bit 20: OTG version */
+                                                  /* Bits 21-31: Reserved, must be kept at reset value */
 /* Interrupt register */
                                                   /* Bits 1:0 Reserved, must be kept at reset value */
 #define OTGFS_GOTGINT_SEDET             (1 << 2)  /* Bit 2: Session end detected */
@@ -410,7 +275,8 @@
 #define OTGFS_GOTGINT_HNGDET            (1 << 17) /* Bit 17: Host negotiation detected */
 #define OTGFS_GOTGINT_ADTOCHG           (1 << 18) /* Bit 18: A-device timeout change */
 #define OTGFS_GOTGINT_DBCDNE            (1 << 19) /* Bit 19: Debounce done */
-                                                  /* Bits 2-31: Reserved, must be kept at reset value */
+#define OTGFS_GOTGINT_IDCHNG            (1 << 20) /* Bit 20: Change in ID pin input value */
+                                                  /* Bits 21-31: Reserved, must be kept at reset value */
 
 /* AHB configuration register */
 
@@ -434,12 +300,11 @@
                                                   /* Bits 14-28: Reserved, must be kept at reset value */
 #define OTGFS_GUSBCFG_FHMOD             (1 << 29) /* Bit 29: Force host mode */
 #define OTGFS_GUSBCFG_FDMOD             (1 << 30) /* Bit 30: Force device mode */
-#define OTGFS_GUSBCFG_CTXPKT            (1 << 31) /* Bit 31: Corrupt Tx packet */
-                                                  /* Bits 20-31: Reserved, must be kept at reset value */
+                                                  /* Bit 31: Reserved, must be kept at reset value */
 /* Reset register */
 
 #define OTGFS_GRSTCTL_CSRST             (1 << 0)  /* Bit 0: Core soft reset */
-#define OTGFS_GRSTCTL_HSRST             (1 << 1)  /* Bit 1: HCLK soft reset */
+                                                  /* Bit 1 Reserved, must be kept at reset value */
 #define OTGFS_GRSTCTL_FCRST             (1 << 2)  /* Bit 2: Host frame counter reset */
                                                   /* Bit 3 Reserved, must be kept at reset value */
 #define OTGFS_GRSTCTL_RXFFLSH           (1 << 4)  /* Bit 4: RxFIFO flush */
@@ -451,7 +316,7 @@
 #  define OTGFS_GRSTCTL_TXFNUM_HALL     (16 << OTGFS_GRSTCTL_TXFNUM_SHIFT)  /* Flush all the transmit FIFOs in host mode.*/
 #  define OTGFS_GRSTCTL_TXFNUM_D(n)     ((n) << OTGFS_GRSTCTL_TXFNUM_SHIFT) /* TXFIFO n flush in device mode, n=0-15 */
 #  define OTGFS_GRSTCTL_TXFNUM_DALL     (16 << OTGFS_GRSTCTL_TXFNUM_SHIFT)  /* Flush all the transmit FIFOs in device mode.*/
-                                                  /* Bits 11-31: Reserved, must be kept at reset value */
+                                                  /* Bits 11-30: Reserved, must be kept at reset value */
 #define OTGFS_GRSTCTL_AHBIDL            (1 << 31) /* Bit 31: AHB master idle */
 
 /* Core interrupt and Interrupt mask registers */
@@ -466,25 +331,25 @@
 #define OTGFS_GINT_NPTXFE               (1 << 5)  /* Bit 5:  Non-periodic TxFIFO empty */
 #define OTGFS_GINT_GINAKEFF             (1 << 6)  /* Bit 6:  Global IN non-periodic NAK effective */
 #define OTGFS_GINT_GONAKEFF             (1 << 7)  /* Bit 7:  Global OUT NAK effective */
-                                                  /* Bits 8-9: Reserved, must be kept at reset value */
+#define OTGFS_GINT_RES89                (3 << 8)  /* Bits 8-9: Reserved, must be kept at reset value */
 #define OTGFS_GINT_ESUSP                (1 << 10) /* Bit 10: Early suspend */
 #define OTGFS_GINT_USBSUSP              (1 << 11) /* Bit 11: USB suspend */
 #define OTGFS_GINT_USBRST               (1 << 12) /* Bit 12: USB reset */
 #define OTGFS_GINT_ENUMDNE              (1 << 13) /* Bit 13: Enumeration done */
 #define OTGFS_GINT_ISOODRP              (1 << 14) /* Bit 14: Isochronous OUT packet dropped interrupt */
 #define OTGFS_GINT_EOPF                 (1 << 15) /* Bit 15: End of periodic frame interrupt */
-                                                  /* Bits 16 Reserved, must be kept at reset value */
-#define OTGFS_GINTMSK_EPMISM            (1 << 17) /* Bit 17: Endpoint mismatch interrupt mask */
+#define OTGFS_GINT_RES1617              (3 << 16) /* Bits 16-17: Reserved, must be kept at reset value */
 #define OTGFS_GINT_IEP                  (1 << 18) /* Bit 18: IN endpoint interrupt */
 #define OTGFS_GINT_OEP                  (1 << 19) /* Bit 19: OUT endpoint interrupt */
 #define OTGFS_GINT_IISOIXFR             (1 << 20) /* Bit 20: Incomplete isochronous IN transfer */
 #define OTGFS_GINT_IISOOXFR             (1 << 21) /* Bit 21: Incomplete isochronous OUT transfer (device) */
 #define OTGFS_GINT_IPXFR                (1 << 21) /* Bit 21: Incomplete periodic transfer (host) */
-                                                  /* Bits 22-23: Reserved, must be kept at reset value */
+#define OTGFS_GINT_RES22                (1 << 22) /* Bit 22: Reserved, must be kept at reset value */
+#define OTGFS_GINT_RSTDET               (1 << 23) /* Bit 23: Reset detected interrupt */
 #define OTGFS_GINT_HPRT                 (1 << 24) /* Bit 24: Host port interrupt */
 #define OTGFS_GINT_HC                   (1 << 25) /* Bit 25: Host channels interrupt */
 #define OTGFS_GINT_PTXFE                (1 << 26) /* Bit 26: Periodic TxFIFO empty */
-                                                  /* Bit 27 Reserved, must be kept at reset value */
+#define OTGFS_GINT_LPMINT               (1 << 27) /* Bit 27: LPM interrupt */
 #define OTGFS_GINT_CIDSCHG              (1 << 28) /* Bit 28: Connector ID status change */
 #define OTGFS_GINT_DISC                 (1 << 29) /* Bit 29: Disconnect detected interrupt */
 #define OTGFS_GINT_SRQ                  (1 << 30) /* Bit 30: Session request/new session detected interrupt */
@@ -575,16 +440,60 @@
 #  define OTGFS_HNPTXSTS_EPNUM_MASK     (15 << OTGFS_HNPTXSTS_EPNUM_SHIFT)
                                                   /* Bit 31 Reserved, must be kept at reset value */
 /* General core configuration register */
-                                                  /* Bits 15:0 Reserved, must be kept at reset value */
+#define OTGFS_GCCFG_DCDET               (1 << 0) /* Bit 0: Data contact detect */
+#define OTGFS_GCCFG_PDET                (1 << 1) /* Bit 1: Primary detect */
+#define OTGFS_GCCFG_SDET                (1 << 2) /* Bit 2: Secondary detect */
+#define OTGFS_GCCFG_PS2DET              (1 << 3) /* Bit 3: DM pull-up detect */
+                                                  /* Bits 4-15: Reserved, must be kept at reset value */
 #define OTGFS_GCCFG_PWRDWN              (1 << 16) /* Bit 16: Power down */
-                                                  /* Bit 17 Reserved, must be kept at reset value */
-#define OTGFS_GCCFG_VBUSASEN            (1 << 18) /* Bit 18: Enable the VBUS sensing A device */
-#define OTGFS_GCCFG_VBUSBSEN            (1 << 19) /* Bit 19: Enable the VBUS sensing B device */
-#define OTGFS_GCCFG_SOFOUTEN            (1 << 20) /* Bit 20: SOF output enable */
-#define OTGFS_GCCFG_NOVBUSSENS          (1 << 21) /* Bit 21: VBUS sensing disable option */
-                                                  /* Bits 31:22 Reserved, must be kept at reset value */
+#define OTGFS_GCCFG_BCDEN               (1 << 18) /* Bit 17: Battery charging detector enable */
+#define OTGFS_GCCFG_DCDEN               (1 << 18) /* Bit 18: Data contact detection mode enable */
+#define OTGFS_GCCFG_PDEN                (1 << 19) /* Bit 19: Primary detection mode enable */
+#define OTGFS_GCCFG_SDEN                (1 << 20) /* Bit 20: Secondary detection mode enable */
+#define OTGFS_GCCFG_VBDEN               (1 << 21) /* Bit 21: USB VBUS detection enable */
+                                                  /* Bits 22-31: Reserved, must be kept at reset value */
+
 /* Core ID register  (32-bit product ID) */
 
+//XXX GLPMCFG
+#define OTGFS_GLPMCFG_LPMEN             (1 << 0) /* Bit 0: XXX */
+#define OTGFS_GLPMCFG_LPMACK            (1 << 1) /* Bit 1: XXX */
+//#define OTGFS_GLPMCFG_BESL
+#define OTGFS_GLPMCFG_REMWAKE           (1 << 6) /* Bit 6: XXX */
+#define OTGFS_GLPMCFG_L1SSEN            (1 << 7) /* Bit 7: XXX */
+//#define OTGFS_GLPMCFG_BESLTHRS
+#define OTGFS_GLPMCFG_L1DSEN            (1 << 12) /* Bit 12: XXX */
+//#define OTGFS_GLPMCFG_LPMRSP
+#define OTGFS_GLPMCFG_SLPSTS            (1 << 15) /* Bit 15: XXX */
+#define OTGFS_GLPMCFG_L1RSMOK           (1 << 16) /* Bit 16: XXX */
+//#define OTGFS_GLPMCFG_LPMCHIDX
+//#define OTGFS_GLPMCFG_LPMRCNT
+#define OTGFS_GLPMCFG_SNDLPM            (1 << 24) /* Bit 24: XXX */
+//#define OTGFS_GLPMCFG_LPMRCNTSTS
+#define OTGFS_GLPMCFG_ENBESL            (1 << 28) /* Bit 28: XXX */
+                                                  /* Bits 29-31: Reserved, must be kept at reset value */
+
+//XXX GPWRDN
+#define OTGFS_GPWRDN_ADPMEN             (1 << 0) /* Bit 0: XXX */
+#define OTGFS_GPWRDN_ADPIF              (1 << 23) /* Bit 23: XXX */
+
+//XXX GADPCTL
+//#define OTGFS_GADPCTL_PRBDSCHG
+//#define OTGFS_GADPCTL_PRBDELTA
+//#define OTGFS_GADPCTL_PRBPER
+//#define OTGFS_GADPCTL_RTIM
+#define OTGFS_GADPCTL_ENAPRB            (1 << 17) /* Bit 17: XXX */
+#define OTGFS_GADPCTL_ENASNS            (1 << 18) /* Bit 18: XXX */
+#define OTGFS_GADPCTL_ADPRST            (1 << 19) /* Bit 19: XXX */
+#define OTGFS_GADPCTL_ADPEN             (1 << 20) /* Bit 20: XXX */
+#define OTGFS_GADPCTL_ADPPRBIF          (1 << 21) /* Bit 21: XXX */
+#define OTGFS_GADPCTL_ADPSNSIF          (1 << 22) /* Bit 22: XXX */
+#define OTGFS_GADPCTL_ADPTOIF           (1 << 23) /* Bit 23: XXX */
+#define OTGFS_GADPCTL_ADPPRBIM          (1 << 24) /* Bit 24: XXX */
+#define OTGFS_GADPCTL_ADPSNSIM          (1 << 25) /* Bit 25: XXX */
+#define OTGFS_GADPCTL_ADPTOIM           (1 << 26) /* Bit 26: XXX */
+//#define OTGFS_GADPCTL_AR
+
 /* Host periodic transmit FIFO size register */
 
 #define OTGFS_HPTXFSIZ_PTXSA_SHIFT      (0)       /* Bits 0-15: Host periodic TxFIFO start address */
@@ -614,6 +523,7 @@
 /* Host frame interval register */
 
 #define OTGFS_HFIR_MASK                 (0xffff)
+#define OTGFS_HFIR_RLDCTRL              (1 << 16)  /* Bit 16: XXX */
 
 /* Host frame number/frame time remaining register */
 
@@ -712,7 +622,7 @@
 #define OTGFS_HCINT_STALL               (1 << 3)  /* Bit 3:  STALL response received interrupt */
 #define OTGFS_HCINT_NAK                 (1 << 4)  /* Bit 4:  NAK response received interrupt */
 #define OTGFS_HCINT_ACK                 (1 << 5)  /* Bit 5:  ACK response received/transmitted interrupt */
-#define OTGFS_HCINT_NYET                (1 << 6)  /* Bit 6:  Response received interrupt */
+//#define OTGFS_HCINT_NYET                (1 << 6)  /* Bit 6:  Response received interrupt */
 #define OTGFS_HCINT_TXERR               (1 << 7)  /* Bit 7:  Transaction error */
 #define OTGFS_HCINT_BBERR               (1 << 8)  /* Bit 8:  Babble error */
 #define OTGFS_HCINT_FRMOR               (1 << 9)  /* Bit 9:  Frame overrun */
@@ -776,7 +686,9 @@
 #define OTGFS_DCTL_SGONAK               (1 << 9)  /* Bit 9:  Set global OUT NAK */
 #define OTGFS_DCTL_CGONAK               (1 << 10) /* Bit 10: Clear global OUT NAK */
 #define OTGFS_DCTL_POPRGDNE             (1 << 11) /* Bit 11: Power-on programming done */
-                                                  /* Bits 12-31: Reserved, must be kept at reset value */
+                                                  /* Bits 12-17: Reserved, must be kept at reset value */
+#define OTGFS_DCTL_DSBESLRJCT           (1 << 18) /* Bit 18: Deep sleep BESL reject */
+                                                  /* Bits 19-31: Reserved, must be kept at reset value */
 /* Device status register */
 
 #define OTGFS_DSTS_SUSPSTS              (1 << 0)  /* Bit 0: Suspend status */
@@ -790,7 +702,10 @@
 #define OTGFS_DSTS_SOFFN0               (1 << 8)  /* Bits 8: Frame number even/odd bit */
 #define OTGFS_DSTS_SOFFN_EVEN           0
 #define OTGFS_DSTS_SOFFN_ODD            OTGFS_DSTS_SOFFN0
-                                                  /* Bits 22-31: Reserved, must be kept at reset value */
+#define OTGFS_DSTS_DEVLNSTS_SHIFT       (22)       /* Bits 22-23: XXX */
+#define OTGFS_DSTS_DEVLNSTS_MASK        (0x3 << OTGFS_DSTS_DEVLNSTS_SHIFT)
+//XXX
+                                                  /* Bits 24-31: Reserved, must be kept at reset value */
 /* Device IN endpoint common interrupt mask register */
 
 #define OTGFS_DIEPMSK_XFRCM             (1 << 0)  /* Bit 0: Transfer completed interrupt mask */
@@ -800,7 +715,9 @@
 #define OTGFS_DIEPMSK_ITTXFEMSK         (1 << 4)  /* Bit 4: IN token received when TxFIFO empty mask */
 #define OTGFS_DIEPMSK_INEPNMM           (1 << 5)  /* Bit 5: IN token received with EP mismatch mask */
 #define OTGFS_DIEPMSK_INEPNEM           (1 << 6)  /* Bit 6: IN endpoint NAK effective mask */
-                                                  /* Bits 7-31: Reserved, must be kept at reset value */
+                                                  /* Bits 7-12: Reserved, must be kept at reset value */
+#define OTGFS_DIEPMSK_NAKM              (1 << 13) /* Bit 13: NAK interrupt mask */
+                                                  /* Bits 14-31: Reserved, must be kept at reset value */
 /* Device OUT endpoint common interrupt mask register */
 
 #define OTGFS_DOEPMSK_XFRCM             (1 << 0)  /* Bit 0: Transfer completed interrupt mask */
@@ -824,7 +741,7 @@
 
 /* Device VBUS pulsing time register */
 
-#define OTGFS_DVBUSPULSE_MASK           (0xfff)
+#define OTGFS_DVBUSPULSE_MASK           (0xffff)
 
 /* Device IN endpoint FIFO empty interrupt mask register */
 
@@ -1013,6 +930,9 @@
 #define OTGFS_PCGCCTL_GATEHCLK          (1 << 1)  /* Bit 1: Gate HCLK */
                                                   /* Bits 2-3: Reserved, must be kept at reset value */
 #define OTGFS_PCGCCTL_PHYSUSP           (1 << 4)  /* Bit 4: PHY Suspended */
-                                                  /* Bits 5-31: Reserved, must be kept at reset value */
+#define OTGFS_PCGCCTL_ENL1GTG           (1 << 5)  /* Bit 5: Enable Sleep clock gating */
+#define OTGFS_PCGCCTL_PHYSLEEP          (1 << 6)  /* Bit 6: PHY in Sleep */
+#define OTGFS_PCGCCTL_SUSP              (1 << 7)  /* Bit 7: Deep Sleep */
+                                                  /* Bits 8-31: Reserved, must be kept at reset value */
 
-#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32_OTGFS_H */
+#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_OTGFS_H */
diff --git a/arch/arm/src/stm32l4/chip/stm32l4x6xx_pinmap.h b/arch/arm/src/stm32l4/chip/stm32l4x6xx_pinmap.h
index 8a564fc377f1495fb265c85dbd3474854d020c9a..8be6eca5a54eef2c65d41f4067dec036c7d2fe6d 100644
--- a/arch/arm/src/stm32l4/chip/stm32l4x6xx_pinmap.h
+++ b/arch/arm/src/stm32l4/chip/stm32l4x6xx_pinmap.h
@@ -350,27 +350,27 @@
 
 /* OTG FS */
 
-#define GPIO_OTG_FS_SOF        (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN8)
-#define GPIO_OTG_FS_ID         (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN10)
-#define GPIO_OTG_FS_DM         (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN11)
-#define GPIO_OTG_FS_DP         (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN12)
-#define GPIO_OTG_FS_NOE_1      (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN13)
-#define GPIO_OTG_FS_NOE_2      (GPIO_ALT|GPIO_AF10|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_OTGFS_SOF         (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN8)
+#define GPIO_OTGFS_ID          (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_OTGFS_DM          (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_OTGFS_DP          (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN12)
+#define GPIO_OTGFS_NOE_1       (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN13)
+#define GPIO_OTGFS_NOE_2       (GPIO_ALT|GPIO_AF10|GPIO_PORTC|GPIO_PIN9)
 
 /* QUADSPI */
 
-#define GPIO_QSPI_NCS_1         (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN11)
-#define GPIO_QSPI_NCS_2         (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN11)
-#define GPIO_QSPI_CLK_1         (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN10)
-#define GPIO_QSPI_CLK_2         (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN10)
-#define GPIO_QSPI_BK1_IO0_1     (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN1)
-#define GPIO_QSPI_BK1_IO0_2     (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN12)
-#define GPIO_QSPI_BK1_IO1_1     (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN0)
-#define GPIO_QSPI_BK1_IO1_2     (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN13)
-#define GPIO_QSPI_BK1_IO2_1     (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN7)
-#define GPIO_QSPI_BK1_IO2_2     (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN14)
-#define GPIO_QSPI_BK1_IO3_1     (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN6)
-#define GPIO_QSPI_BK1_IO3_2     (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN15)
+#define GPIO_QSPI_NCS_1        (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_QSPI_NCS_2        (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN11)
+#define GPIO_QSPI_CLK_1        (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_QSPI_CLK_2        (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN10)
+#define GPIO_QSPI_BK1_IO0_1    (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_QSPI_BK1_IO0_2    (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN12)
+#define GPIO_QSPI_BK1_IO1_1    (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_QSPI_BK1_IO1_2    (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN13)
+#define GPIO_QSPI_BK1_IO2_1    (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_QSPI_BK1_IO2_2    (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN14)
+#define GPIO_QSPI_BK1_IO3_1    (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_QSPI_BK1_IO3_2    (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN15)
 
 /* RTC */
 
@@ -500,23 +500,31 @@
 
 /* Timers */
 
-#define GPIO_TIM1_CH1_1        (GPIO_ALT|GPIO_AF1 |GPIO_PORTA|GPIO_PIN8)
-#define GPIO_TIM1_CH1_2        (GPIO_ALT|GPIO_AF1 |GPIO_PORTE|GPIO_PIN9)
-#define GPIO_TIM1_CH2_1        (GPIO_ALT|GPIO_AF1 |GPIO_PORTA|GPIO_PIN9)
-#define GPIO_TIM1_CH2_2        (GPIO_ALT|GPIO_AF1 |GPIO_PORTE|GPIO_PIN11)
-#define GPIO_TIM1_CH3_1        (GPIO_ALT|GPIO_AF1 |GPIO_PORTA|GPIO_PIN10)
-#define GPIO_TIM1_CH3_2        (GPIO_ALT|GPIO_AF1 |GPIO_PORTE|GPIO_PIN13)
-#define GPIO_TIM1_CH4_1        (GPIO_ALT|GPIO_AF1 |GPIO_PORTA|GPIO_PIN11)
-#define GPIO_TIM1_CH4_2        (GPIO_ALT|GPIO_AF1 |GPIO_PORTE|GPIO_PIN14)
-#define GPIO_TIM1_CH1N_1       (GPIO_ALT|GPIO_AF1 |GPIO_PORTA|GPIO_PIN7)
-#define GPIO_TIM1_CH1N_2       (GPIO_ALT|GPIO_AF1 |GPIO_PORTB|GPIO_PIN13)
-#define GPIO_TIM1_CH1N_3       (GPIO_ALT|GPIO_AF1 |GPIO_PORTE|GPIO_PIN8)
-#define GPIO_TIM1_CH2N_1       (GPIO_ALT|GPIO_AF1 |GPIO_PORTB|GPIO_PIN0)
-#define GPIO_TIM1_CH2N_2       (GPIO_ALT|GPIO_AF1 |GPIO_PORTB|GPIO_PIN14)
-#define GPIO_TIM1_CH2N_3       (GPIO_ALT|GPIO_AF1 |GPIO_PORTE|GPIO_PIN10)
-#define GPIO_TIM1_CH3N_1       (GPIO_ALT|GPIO_AF1 |GPIO_PORTB|GPIO_PIN1)
-#define GPIO_TIM1_CH3N_2       (GPIO_ALT|GPIO_AF1 |GPIO_PORTB|GPIO_PIN15)
-#define GPIO_TIM1_CH3N_3       (GPIO_ALT|GPIO_AF1 |GPIO_PORTE|GPIO_PIN12)
+#define GPIO_TIM1_CH1IN_1      (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN8)
+#define GPIO_TIM1_CH1IN_2      (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN9)
+#define GPIO_TIM1_CH1OUT_1     (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8)
+#define GPIO_TIM1_CH1OUT_2     (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN9)
+#define GPIO_TIM1_CH2IN_1      (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN9)
+#define GPIO_TIM1_CH2IN_2      (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN11)
+#define GPIO_TIM1_CH2OUT_1     (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN9)
+#define GPIO_TIM1_CH2OUT_2     (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN11)
+#define GPIO_TIM1_CH3IN_1      (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_TIM1_CH3IN_2      (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN13)
+#define GPIO_TIM1_CH3OUT_1     (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN10)
+#define GPIO_TIM1_CH3OUT_2     (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN13)
+#define GPIO_TIM1_CH4IN_1      (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_TIM1_CH4IN_2      (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN14)
+#define GPIO_TIM1_CH4OUT_1     (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_TIM1_CH4OUT_2     (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN14)
+#define GPIO_TIM1_CH1N_1       (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_TIM1_CH1N_2       (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13)
+#define GPIO_TIM1_CH1N_3       (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN8)
+#define GPIO_TIM1_CH2N_1       (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_TIM1_CH2N_2       (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_TIM1_CH2N_3       (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN10)
+#define GPIO_TIM1_CH3N_1       (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_TIM1_CH3N_2       (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN15)
+#define GPIO_TIM1_CH3N_3       (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN12)
 #define GPIO_TIM1_BKIN_1       (GPIO_ALT|GPIO_AF1 |GPIO_PORTA|GPIO_PIN6)
 #define GPIO_TIM1_BKIN_2       (GPIO_ALT|GPIO_AF1 |GPIO_PORTB|GPIO_PIN12)
 #define GPIO_TIM1_BKIN_3       (GPIO_ALT|GPIO_AF1 |GPIO_PORTE|GPIO_PIN15)
@@ -529,67 +537,110 @@
 #define GPIO_TIM1_ETR_1        (GPIO_ALT|GPIO_AF1 |GPIO_PORTA|GPIO_PIN12)
 #define GPIO_TIM1_ETR_2        (GPIO_ALT|GPIO_AF1 |GPIO_PORTE|GPIO_PIN7)
 
-#define GPIO_TIM2_CH1_1        (GPIO_ALT|GPIO_AF1 |GPIO_PORTA|GPIO_PIN0)
-#define GPIO_TIM2_CH1_2        (GPIO_ALT|GPIO_AF1 |GPIO_PORTA|GPIO_PIN5)
-#define GPIO_TIM2_CH1_3        (GPIO_ALT|GPIO_AF1 |GPIO_PORTA|GPIO_PIN15)
-#define GPIO_TIM2_CH2_1        (GPIO_ALT|GPIO_AF1 |GPIO_PORTA|GPIO_PIN1)
-#define GPIO_TIM2_CH2_2        (GPIO_ALT|GPIO_AF1 |GPIO_PORTB|GPIO_PIN3)
-#define GPIO_TIM2_CH3_1        (GPIO_ALT|GPIO_AF1 |GPIO_PORTA|GPIO_PIN2)
-#define GPIO_TIM2_CH3_2        (GPIO_ALT|GPIO_AF1 |GPIO_PORTB|GPIO_PIN10)
-#define GPIO_TIM2_CH4_1        (GPIO_ALT|GPIO_AF1 |GPIO_PORTA|GPIO_PIN3)
-#define GPIO_TIM2_CH4_2        (GPIO_ALT|GPIO_AF1 |GPIO_PORTB|GPIO_PIN11)
+#define GPIO_TIM2_CH1IN_1      (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_TIM2_CH1IN_2      (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_TIM2_CH1IN_3      (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN15)
+#define GPIO_TIM2_CH1OUT_1     (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_TIM2_CH1OUT_2     (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_TIM2_CH1OUT_3     (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN15)
+#define GPIO_TIM2_CH2IN_1      (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_TIM2_CH2IN_2      (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN3)
+#define GPIO_TIM2_CH2OUT_1     (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_TIM2_CH2OUT_2     (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN3)
+#define GPIO_TIM2_CH3IN_1      (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_TIM2_CH3IN_2      (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_TIM2_CH3OUT_1     (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_TIM2_CH3OUT_2     (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_TIM2_CH4IN_1      (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_TIM2_CH4IN_2      (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_TIM2_CH4OUT_1     (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_TIM2_CH4OUT_2     (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN11)
 #define GPIO_TIM2_BKIN         (GPIO_ALT|GPIO_AF2 |GPIO_PORTE|GPIO_PIN14)
 #define GPIO_TIM2_ETR_1        (GPIO_ALT|GPIO_AF14|GPIO_PORTA|GPIO_PIN0)
 #define GPIO_TIM2_ETR_2        (GPIO_ALT|GPIO_AF2 |GPIO_PORTA|GPIO_PIN5)
 #define GPIO_TIM2_ETR_3        (GPIO_ALT|GPIO_AF2 |GPIO_PORTA|GPIO_PIN15)
 
-#define GPIO_TIM3_CH1_1        (GPIO_ALT|GPIO_AF2 |GPIO_PORTA|GPIO_PIN6)
-#define GPIO_TIM3_CH1_2        (GPIO_ALT|GPIO_AF2 |GPIO_PORTB|GPIO_PIN4)
-#define GPIO_TIM3_CH1_3        (GPIO_ALT|GPIO_AF2 |GPIO_PORTC|GPIO_PIN6)
-#define GPIO_TIM3_CH1_4        (GPIO_ALT|GPIO_AF2 |GPIO_PORTE|GPIO_PIN3)
-#define GPIO_TIM3_CH2_1        (GPIO_ALT|GPIO_AF2 |GPIO_PORTA|GPIO_PIN7)
-#define GPIO_TIM3_CH2_2        (GPIO_ALT|GPIO_AF2 |GPIO_PORTB|GPIO_PIN5)
-#define GPIO_TIM3_CH2_3        (GPIO_ALT|GPIO_AF2 |GPIO_PORTC|GPIO_PIN7)
-#define GPIO_TIM3_CH2_4        (GPIO_ALT|GPIO_AF2 |GPIO_PORTE|GPIO_PIN4)
-#define GPIO_TIM3_CH3_1        (GPIO_ALT|GPIO_AF2 |GPIO_PORTB|GPIO_PIN0)
-#define GPIO_TIM3_CH3_2        (GPIO_ALT|GPIO_AF2 |GPIO_PORTC|GPIO_PIN8)
-#define GPIO_TIM3_CH3_3        (GPIO_ALT|GPIO_AF2 |GPIO_PORTE|GPIO_PIN5)
-#define GPIO_TIM3_CH4_1        (GPIO_ALT|GPIO_AF2 |GPIO_PORTB|GPIO_PIN1)
-#define GPIO_TIM3_CH4_2        (GPIO_ALT|GPIO_AF2 |GPIO_PORTC|GPIO_PIN9)
-#define GPIO_TIM3_CH4_3        (GPIO_ALT|GPIO_AF2 |GPIO_PORTE|GPIO_PIN6)
+#define GPIO_TIM3_CH1IN_1      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_TIM3_CH1IN_2      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN4)
+#define GPIO_TIM3_CH1IN_3      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_TIM3_CH1IN_4      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN3)
+#define GPIO_TIM3_CH1OUT_1     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_TIM3_CH1OUT_2     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN4)
+#define GPIO_TIM3_CH1OUT_3     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_TIM3_CH1OUT_4     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN3)
+#define GPIO_TIM3_CH2IN_1      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_TIM3_CH2IN_2      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_TIM3_CH2IN_3      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_TIM3_CH2IN_4      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN4)
+#define GPIO_TIM3_CH2OUT_1     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_TIM3_CH2OUT_2     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5)
+#define GPIO_TIM3_CH2OUT_3     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_TIM3_CH2OUT_4     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN4)
+#define GPIO_TIM3_CH3IN_1      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_TIM3_CH3IN_2      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_TIM3_CH3IN_3      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN5)
+#define GPIO_TIM3_CH3OUT_1     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_TIM3_CH3OUT_2     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_TIM3_CH3OUT_3     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN5)
+#define GPIO_TIM3_CH4IN_1      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_TIM3_CH4IN_2      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_TIM3_CH4IN_3      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN6)
+#define GPIO_TIM3_CH4OUT_1     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_TIM3_CH4OUT_2     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_TIM3_CH4OUT_3     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN6)
 #define GPIO_TIM3_ETR_1        (GPIO_ALT|GPIO_AF2 |GPIO_PORTD|GPIO_PIN2)
 #define GPIO_TIM3_ETR_2        (GPIO_ALT|GPIO_AF2 |GPIO_PORTE|GPIO_PIN2)
 
-#define GPIO_TIM4_CH1_1        (GPIO_ALT|GPIO_AF2 |GPIO_PORTB|GPIO_PIN6)
-#define GPIO_TIM4_CH1_2        (GPIO_ALT|GPIO_AF2 |GPIO_PORTD|GPIO_PIN12)
-#define GPIO_TIM4_CH2_1        (GPIO_ALT|GPIO_AF2 |GPIO_PORTB|GPIO_PIN7)
-#define GPIO_TIM4_CH2_2        (GPIO_ALT|GPIO_AF2 |GPIO_PORTD|GPIO_PIN13)
-#define GPIO_TIM4_CH3_1        (GPIO_ALT|GPIO_AF2 |GPIO_PORTB|GPIO_PIN8)
-#define GPIO_TIM4_CH3_2        (GPIO_ALT|GPIO_AF2 |GPIO_PORTD|GPIO_PIN14)
-#define GPIO_TIM4_CH4_1        (GPIO_ALT|GPIO_AF2 |GPIO_PORTB|GPIO_PIN9)
-#define GPIO_TIM4_CH4_2        (GPIO_ALT|GPIO_AF2 |GPIO_PORTD|GPIO_PIN15)
+#define GPIO_TIM4_CH1IN_1      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_TIM4_CH1IN_2      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTD|GPIO_PIN12)
+#define GPIO_TIM4_CH1OUT_1     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_TIM4_CH1OUT_2     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN12)
+#define GPIO_TIM4_CH2IN_1      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_TIM4_CH2IN_2      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTD|GPIO_PIN13)
+#define GPIO_TIM4_CH2OUT_1     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_TIM4_CH2OUT_2     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN13)
+#define GPIO_TIM4_CH3IN_1      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_TIM4_CH3IN_2      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTD|GPIO_PIN14)
+#define GPIO_TIM4_CH3OUT_1     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_TIM4_CH3OUT_2     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN14)
+#define GPIO_TIM4_CH4IN_1      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_TIM4_CH4IN_2      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTD|GPIO_PIN15)
+#define GPIO_TIM4_CH4OUT_1     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_TIM4_CH4OUT_2     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN15)
 #define GPIO_TIM4_ETR          (GPIO_ALT|GPIO_AF2 |GPIO_PORTE|GPIO_PIN0)
 
-#define GPIO_TIM5_CH1_1        (GPIO_ALT|GPIO_AF2 |GPIO_PORTA|GPIO_PIN0)
-#define GPIO_TIM5_CH1_2        (GPIO_ALT|GPIO_AF2 |GPIO_PORTF|GPIO_PIN6)
-#define GPIO_TIM5_CH2_1        (GPIO_ALT|GPIO_AF2 |GPIO_PORTA|GPIO_PIN1)
-#define GPIO_TIM5_CH2_2        (GPIO_ALT|GPIO_AF2 |GPIO_PORTF|GPIO_PIN7)
-#define GPIO_TIM5_CH3_1        (GPIO_ALT|GPIO_AF2 |GPIO_PORTA|GPIO_PIN2)
-#define GPIO_TIM5_CH3_2        (GPIO_ALT|GPIO_AF2 |GPIO_PORTF|GPIO_PIN8)
-#define GPIO_TIM5_CH4_1        (GPIO_ALT|GPIO_AF2 |GPIO_PORTA|GPIO_PIN3)
-#define GPIO_TIM5_CH4_2        (GPIO_ALT|GPIO_AF2 |GPIO_PORTF|GPIO_PIN9)
+#define GPIO_TIM5_CH1IN_1      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_TIM5_CH1IN_2      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTF|GPIO_PIN6)
+#define GPIO_TIM5_CH1OUT_1     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_TIM5_CH1OUT_2     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN6)
+#define GPIO_TIM5_CH2IN_1      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_TIM5_CH2IN_2      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTF|GPIO_PIN7)
+#define GPIO_TIM5_CH2OUT_1     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_TIM5_CH2OUT_2     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN7)
+#define GPIO_TIM5_CH3IN_1      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_TIM5_CH3IN_2      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTF|GPIO_PIN8)
+#define GPIO_TIM5_CH3OUT_1     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_TIM5_CH3OUT_2     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN8)
+#define GPIO_TIM5_CH4IN_1      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_TIM5_CH4IN_2      (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTF|GPIO_PIN9)
+#define GPIO_TIM5_CH4OUT_1     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_TIM5_CH4OUT_2     (GPIO_ALT|GPIO_AF2 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN9)
 #define GPIO_TIM5_ETR          (GPIO_ALT|GPIO_AF1 |GPIO_PORTF|GPIO_PIN6)
 
-#define GPIO_TIM8_CH1          (GPIO_ALT|GPIO_AF3 |GPIO_PORTC|GPIO_PIN6)
-#define GPIO_TIM8_CH2          (GPIO_ALT|GPIO_AF3 |GPIO_PORTC|GPIO_PIN7)
-#define GPIO_TIM8_CH3          (GPIO_ALT|GPIO_AF3 |GPIO_PORTC|GPIO_PIN8)
-#define GPIO_TIM8_CH4          (GPIO_ALT|GPIO_AF3 |GPIO_PORTC|GPIO_PIN9)
-#define GPIO_TIM8_CH1N_1       (GPIO_ALT|GPIO_AF3 |GPIO_PORTA|GPIO_PIN5)
-#define GPIO_TIM8_CH1N_2       (GPIO_ALT|GPIO_AF3 |GPIO_PORTA|GPIO_PIN7)
-#define GPIO_TIM8_CH2N_1       (GPIO_ALT|GPIO_AF3 |GPIO_PORTB|GPIO_PIN0)
-#define GPIO_TIM8_CH2N_2       (GPIO_ALT|GPIO_AF3 |GPIO_PORTB|GPIO_PIN14)
-#define GPIO_TIM8_CH3N_1       (GPIO_ALT|GPIO_AF3 |GPIO_PORTB|GPIO_PIN1)
-#define GPIO_TIM8_CH3N_2       (GPIO_ALT|GPIO_AF3 |GPIO_PORTB|GPIO_PIN15)
+#define GPIO_TIM8_CH1IN        (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_TIM8_CH1OUT       (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_TIM8_CH2IN        (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_TIM8_CH2OUT       (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_TIM8_CH3IN        (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_TIM8_CH3OUT       (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_TIM8_CH4IN        (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_TIM8_CH4OUT       (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_TIM8_CH1N_1       (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN5)
+#define GPIO_TIM8_CH1N_2       (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_TIM8_CH2N_1       (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_TIM8_CH2N_2       (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_TIM8_CH3N_1       (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN1)
+#define GPIO_TIM8_CH3N_2       (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN15)
 #define GPIO_TIM8_BKIN_1       (GPIO_ALT|GPIO_AF3 |GPIO_PORTA|GPIO_PIN6)
 #define GPIO_TIM8_BKIN_2       (GPIO_ALT|GPIO_AF3 |GPIO_PORTB|GPIO_PIN7)
 #define GPIO_TIM8_BKIN_COMP1   (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN7)
@@ -600,30 +651,44 @@
 #define GPIO_TIM8_BKIN2_COMP2  (GPIO_ALT|GPIO_AF12|GPIO_PORTB|GPIO_PIN6)
 #define GPIO_TIM8_ETR          (GPIO_ALT|GPIO_AF3 |GPIO_PORTA|GPIO_PIN0)
 
-#define GPIO_TIM15_CH1_1       (GPIO_ALT|GPIO_AF14|GPIO_PORTA|GPIO_PIN2)
-#define GPIO_TIM15_CH1_2       (GPIO_ALT|GPIO_AF14|GPIO_PORTB|GPIO_PIN14)
-#define GPIO_TIM15_CH1_3       (GPIO_ALT|GPIO_AF14|GPIO_PORTF|GPIO_PIN9)
-#define GPIO_TIM15_CH1_4       (GPIO_ALT|GPIO_AF14|GPIO_PORTG|GPIO_PIN10)
-#define GPIO_TIM15_CH2_1       (GPIO_ALT|GPIO_AF14|GPIO_PORTA|GPIO_PIN3)
-#define GPIO_TIM15_CH2_2       (GPIO_ALT|GPIO_AF14|GPIO_PORTB|GPIO_PIN15)
-#define GPIO_TIM15_CH2_3       (GPIO_ALT|GPIO_AF14|GPIO_PORTF|GPIO_PIN10)
-#define GPIO_TIM15_CH2_4       (GPIO_ALT|GPIO_AF14|GPIO_PORTG|GPIO_PIN11)
-#define GPIO_TIM15_CH1N_1      (GPIO_ALT|GPIO_AF14|GPIO_PORTA|GPIO_PIN1)
-#define GPIO_TIM15_CH1N_2      (GPIO_ALT|GPIO_AF14|GPIO_PORTB|GPIO_PIN13)
-#define GPIO_TIM15_CH1N_3      (GPIO_ALT|GPIO_AF14|GPIO_PORTG|GPIO_PIN9)
+#define GPIO_TIM15_CH1IN_1     (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_TIM15_CH1IN_2     (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_TIM15_CH1IN_3     (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTF|GPIO_PIN9)
+#define GPIO_TIM15_CH1IN_4     (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTG|GPIO_PIN10)
+#define GPIO_TIM15_CH1OUT_1    (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN2)
+#define GPIO_TIM15_CH1OUT_2    (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN14)
+#define GPIO_TIM15_CH1OUT_3    (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN9)
+#define GPIO_TIM15_CH1OUT_4    (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN10)
+#define GPIO_TIM15_CH2IN_1     (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_TIM15_CH2IN_2     (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN15)
+#define GPIO_TIM15_CH2IN_3     (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTF|GPIO_PIN10)
+#define GPIO_TIM15_CH2IN_4     (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTG|GPIO_PIN11)
+#define GPIO_TIM15_CH2OUT_1    (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_TIM15_CH2OUT_2    (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN15)
+#define GPIO_TIM15_CH2OUT_3    (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN10)
+#define GPIO_TIM15_CH2OUT_4    (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN11)
+#define GPIO_TIM15_CH1N_1      (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN1)
+#define GPIO_TIM15_CH1N_2      (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13)
+#define GPIO_TIM15_CH1N_3      (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN9)
 #define GPIO_TIM15_BKIN_1      (GPIO_ALT|GPIO_AF14|GPIO_PORTA|GPIO_PIN9)
 #define GPIO_TIM15_BKIN_2      (GPIO_ALT|GPIO_AF14|GPIO_PORTB|GPIO_PIN12)
 
-#define GPIO_TIM16_CH1_1       (GPIO_ALT|GPIO_AF14|GPIO_PORTA|GPIO_PIN6)
-#define GPIO_TIM16_CH1_2       (GPIO_ALT|GPIO_AF14|GPIO_PORTB|GPIO_PIN8)
-#define GPIO_TIM16_CH1_3       (GPIO_ALT|GPIO_AF14|GPIO_PORTE|GPIO_PIN0)
-#define GPIO_TIM16_CH1N        (GPIO_ALT|GPIO_AF14|GPIO_PORTB|GPIO_PIN6)
+#define GPIO_TIM16_CH1IN_1     (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_TIM16_CH1IN_2     (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_TIM16_CH1IN_3     (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN0)
+#define GPIO_TIM16_CH1OUT_1    (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN6)
+#define GPIO_TIM16_CH1OUT_2    (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_TIM16_CH1OUT_3    (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN0)
+#define GPIO_TIM16_CH1N        (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN6)
 #define GPIO_TIM16_BKIN        (GPIO_ALT|GPIO_AF14|GPIO_PORTB|GPIO_PIN5)
 
-#define GPIO_TIM17_CH1_1       (GPIO_ALT|GPIO_AF14|GPIO_PORTA|GPIO_PIN7)
-#define GPIO_TIM17_CH1_2       (GPIO_ALT|GPIO_AF14|GPIO_PORTB|GPIO_PIN9)
-#define GPIO_TIM17_CH1_3       (GPIO_ALT|GPIO_AF14|GPIO_PORTE|GPIO_PIN1)
-#define GPIO_TIM17_CH1N        (GPIO_ALT|GPIO_AF14|GPIO_PORTB|GPIO_PIN7)
+#define GPIO_TIM17_CH1IN_1     (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_TIM17_CH1IN_2     (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_TIM17_CH1IN_3     (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN1)
+#define GPIO_TIM17_CH1OUT_1    (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN7)
+#define GPIO_TIM17_CH1OUT_2    (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_TIM17_CH1OUT_3    (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN1)
+#define GPIO_TIM17_CH1N        (GPIO_ALT|GPIO_AF14|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN7)
 #define GPIO_TIM17_BKIN_1      (GPIO_ALT|GPIO_AF14|GPIO_PORTA|GPIO_PIN10)
 #define GPIO_TIM17_BKIN_2      (GPIO_ALT|GPIO_AF14|GPIO_PORTB|GPIO_PIN4)
 
@@ -780,4 +845,3 @@
 #define GPIO_LPUART1_RTS_DE_2  (GPIO_ALT|GPIO_AF8 |GPIO_PORTG|GPIO_PIN6)
 
 #endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4X6XX_PINMAP_H */
-
diff --git a/arch/arm/src/stm32l4/chip/stm32l4x6xx_rcc.h b/arch/arm/src/stm32l4/chip/stm32l4x6xx_rcc.h
index 0b184230b4b688ff851e991f90d605eb4f69d859..c45c199e9b8b7f41ef8028fe0994fec0c8e48a42 100644
--- a/arch/arm/src/stm32l4/chip/stm32l4x6xx_rcc.h
+++ b/arch/arm/src/stm32l4/chip/stm32l4x6xx_rcc.h
@@ -381,6 +381,7 @@
 
 /* AHB2 peripheral reset register */
 
+#define RCC_AHB1ENR_GPIOEN(port)    (1 << port)
 #define RCC_AHB2RSTR_GPIOARST       (1 << 0)  /* Bit 0:  IO port A reset */
 #define RCC_AHB2RSTR_GPIOBRST       (1 << 1)  /* Bit 1:  IO port B reset */
 #define RCC_AHB2RSTR_GPIOCRST       (1 << 2)  /* Bit 2:  IO port C reset */
@@ -759,5 +760,5 @@
 #define RCC_CSR_WWDGRSTF            (1 << 30) /* Bit 30: Window watchdog reset flag */
 #define RCC_CSR_LPWRRSTF            (1 << 31) /* Bit 31: Low-Power reset flag */
 
-#endif /* CONFIG_STM32L4_STM32F427 || CONFIG_STM32L4_STM32F429 */
+#endif /* CONFIG_STM32L4_STM32L476XX || CONFIG_STM32L4_STM32L486XX */
 #endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32F42XXX_RCC_H */
diff --git a/arch/arm/src/stm32l4/stm32l4.h b/arch/arm/src/stm32l4/stm32l4.h
index c78865577d2c10811dbfa3abdbd60e9ee38b75d6..fad620ad86abb04b7518b34babfd223ec521393e 100644
--- a/arch/arm/src/stm32l4/stm32l4.h
+++ b/arch/arm/src/stm32l4/stm32l4.h
@@ -53,26 +53,11 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* Additional Configuration *********************************************************/
-/* Custom debug settings used in the STM32L4 port.  These are managed by
- * STM32L4-specific logic and not the common logic in include/debug.h.
- * NOTE:  Some of these also depend on CONFIG_DEBUG_VERBOSE
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_DMA
-#  undef CONFIG_DEBUG_RTC
-#  undef CONFIG_DEBUG_I2C
-#  undef CONFIG_DEBUG_CAN
-#  undef CONFIG_DEBUG_PWM
-#  undef CONFIG_DEBUG_SENSORS
-#endif
-
 /* Peripherals **********************************************************************/
 
 #include "chip.h"
 #include "stm32l4_adc.h"
-//#include "stm32_bkp.h"
+//#include "stm32l4_bkp.h"
 #include "stm32l4_can.h"
 #include "stm32l4_dbgmcu.h"
 #include "stm32l4_dma.h"
diff --git a/arch/arm/src/stm32l4/stm32l4_allocateheap.c b/arch/arm/src/stm32l4/stm32l4_allocateheap.c
index d5ac105436cd5442894ec4296368367b3492f746..dc39c59e51de3033f8cceacf35061a42f0907128 100644
--- a/arch/arm/src/stm32l4/stm32l4_allocateheap.c
+++ b/arch/arm/src/stm32l4/stm32l4_allocateheap.c
@@ -148,7 +148,7 @@
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_HEAP
+#ifdef CONFIG_HEAP_COLORATION
 static inline void up_heap_color(FAR void *start, size_t size)
 {
   memset(start, HEAP_COLOR, size);
diff --git a/arch/arm/src/stm32l4/stm32l4_can.c b/arch/arm/src/stm32l4/stm32l4_can.c
index 81efb677d2c3b91d138c75436d183f93e7c3d97d..ed14ca436093a5319d61130ca3c56dd8066be3c9 100644
--- a/arch/arm/src/stm32l4/stm32l4_can.c
+++ b/arch/arm/src/stm32l4/stm32l4_can.c
@@ -1,9 +1,12 @@
-/************************************************************************************
+/****************************************************************************
  * arch/arm/src/stm32l4/stm32l4_can.c
  *
  *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
  *   Adaptations for stm32l4:
  *   Copyright (C) 2016 Sebastien Lorquet. All rights reserved.
  *   Author: Sebastien Lorquet 
@@ -35,7 +38,7 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 /****************************************************************************
  * Included Files
@@ -54,7 +57,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 #include "up_internal.h"
 #include "up_arch.h"
@@ -82,23 +85,8 @@
 
 #define CAN_BIT_QUANTA (CONFIG_CAN_TSEG1 + CONFIG_CAN_TSEG2 + 1)
 
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
-
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
-#else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
-#endif
-
-#if !defined(CONFIG_DEBUG) || !defined(CONFIG_DEBUG_CAN)
-#  undef CONFIG_CAN_REGDEBUG
+#ifndef CONFIG_DEBUG_CAN_INFO
+#  undef CONFIG_STM32L4_CAN_REGDEBUG
 #endif
 
 /****************************************************************************
@@ -107,13 +95,13 @@
 
 struct stm32l4_can_s
 {
-  uint8_t  port;   /* CAN port number (1 or 2) */
-  uint8_t  canrx0; /* CAN RX FIFO 0 IRQ number */
-  uint8_t  cantx;  /* CAN TX IRQ number */
-  uint8_t  filter; /* Filter number */
-  uint32_t base;   /* Base address of the CAN control registers */
-  uint32_t fbase;  /* Base address of the CAN filter registers */
-  uint32_t baud;   /* Configured baud */
+  uint8_t  port;     /* CAN port number (1 or 2) */
+  uint8_t  canrx[2]; /* CAN RX FIFO 0/1 IRQ number */
+  uint8_t  cantx;    /* CAN TX IRQ number */
+  uint8_t  filter;   /* Filter number */
+  uint32_t base;     /* Base address of the CAN control registers */
+  uint32_t fbase;    /* Base address of the CAN filter registers */
+  uint32_t baud;     /* Configured baud */
 };
 
 /****************************************************************************
@@ -122,43 +110,70 @@ struct stm32l4_can_s
 
 /* CAN Register access */
 
-static uint32_t can_getreg(struct stm32l4_can_s *priv, int offset);
-static uint32_t can_getfreg(struct stm32l4_can_s *priv, int offset);
-static void can_putreg(struct stm32l4_can_s *priv, int offset, uint32_t value);
-static void can_putfreg(struct stm32l4_can_s *priv, int offset, uint32_t value);
-#ifdef CONFIG_CAN_REGDEBUG
-static void can_dumpctrlregs(struct stm32l4_can_s *priv, FAR const char *msg);
-static void can_dumpmbregs(struct stm32l4_can_s *priv, FAR const char *msg);
-static void can_dumpfiltregs(struct stm32l4_can_s *priv, FAR const char *msg);
+static uint32_t stm32l4can_getreg(FAR struct stm32l4_can_s *priv,
+                                  int offset);
+static uint32_t stm32l4can_getfreg(FAR struct stm32l4_can_s *priv,
+                                   int offset);
+static void stm32l4can_putreg(FAR struct stm32l4_can_s *priv, int offset,
+                              uint32_t value);
+static void stm32l4can_putfreg(FAR struct stm32l4_can_s *priv, int offset,
+                               uint32_t value);
+#ifdef CONFIG_STM32L4_CAN_REGDEBUG
+static void stm32l4can_dumpctrlregs(FAR struct stm32l4_can_s *priv,
+                                    FAR const char *msg);
+static void stm32l4can_dumpmbregs(FAR struct stm32l4_can_s *priv,
+                                  FAR const char *msg);
+static void stm32l4can_dumpfiltregs(FAR struct stm32l4_can_s *priv,
+                                    FAR const char *msg);
 #else
-#  define can_dumpctrlregs(priv,msg)
-#  define can_dumpmbregs(priv,msg)
-#  define can_dumpfiltregs(priv,msg)
+#  define stm32l4can_dumpctrlregs(priv,msg)
+#  define stm32l4can_dumpmbregs(priv,msg)
+#  define stm32l4can_dumpfiltregs(priv,msg)
+#endif
+
+/* Filtering (todo) */
+
+#ifdef CONFIG_CAN_EXTID
+static int  stm32l4can_addextfilter(FAR struct stm32l4_can_s *priv,
+                                    FAR struct canioc_extfilter_s *arg);
+static int  stm32l4can_delextfilter(FAR struct stm32l4_can_s *priv,
+                                    int arg);
 #endif
+static int  stm32l4can_addstdfilter(FAR struct stm32l4_can_s *priv,
+                                    FAR struct canioc_stdfilter_s *arg);
+static int  stm32l4can_delstdfilter(FAR struct stm32l4_can_s *priv,
+                                    int arg);
 
 /* CAN driver methods */
 
-static void can_reset(FAR struct can_dev_s *dev);
-static int  can_setup(FAR struct can_dev_s *dev);
-static void can_shutdown(FAR struct can_dev_s *dev);
-static void can_rxint(FAR struct can_dev_s *dev, bool enable);
-static void can_txint(FAR struct can_dev_s *dev, bool enable);
-static int  can_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg);
-static int  can_remoterequest(FAR struct can_dev_s *dev, uint16_t id);
-static int  can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg);
-static bool can_txready(FAR struct can_dev_s *dev);
-static bool can_txempty(FAR struct can_dev_s *dev);
+static void stm32l4can_reset(FAR struct can_dev_s *dev);
+static int  stm32l4can_setup(FAR struct can_dev_s *dev);
+static void stm32l4can_shutdown(FAR struct can_dev_s *dev);
+static void stm32l4can_rxint(FAR struct can_dev_s *dev, bool enable);
+static void stm32l4can_txint(FAR struct can_dev_s *dev, bool enable);
+static int  stm32l4can_ioctl(FAR struct can_dev_s *dev, int cmd,
+                             unsigned long arg);
+static int  stm32l4can_remoterequest(FAR struct can_dev_s *dev,
+                                     uint16_t id);
+static int  stm32l4can_send(FAR struct can_dev_s *dev,
+                            FAR struct can_msg_s *msg);
+static bool stm32l4can_txready(FAR struct can_dev_s *dev);
+static bool stm32l4can_txempty(FAR struct can_dev_s *dev);
 
 /* CAN interrupt handling */
 
-static int  can_rx0interrupt(int irq, void *context);
-static int  can_txinterrupt(int irq, void *context);
+static int  stm32l4can_rxinterrupt(int irq, FAR void *context, int rxmb);
+static int  stm32l4can_rx0interrupt(int irq, FAR void *context, FAR void *arg);
+static int  stm32l4can_rx1interrupt(int irq, FAR void *context, FAR void *arg);
+static int  stm32l4can_txinterrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Initialization */
 
-static int  can_bittiming(struct stm32l4_can_s *priv);
-static int  can_cellinit(struct stm32l4_can_s *priv);
-static int  can_filterinit(struct stm32l4_can_s *priv);
+static int  stm32l4can_enterinitmode(FAR struct stm32l4_can_s *priv);
+static int  stm32l4can_exitinitmode(FAR struct stm32l4_can_s *priv);
+static int  stm32l4can_bittiming(FAR struct stm32l4_can_s *priv);
+static int  stm32l4can_cellinit(FAR struct stm32l4_can_s *priv);
+static int  stm32l4can_filterinit(FAR struct stm32l4_can_s *priv);
 
 /****************************************************************************
  * Private Data
@@ -166,23 +181,27 @@ static int  can_filterinit(struct stm32l4_can_s *priv);
 
 static const struct can_ops_s g_canops =
 {
-  .co_reset         = can_reset,
-  .co_setup         = can_setup,
-  .co_shutdown      = can_shutdown,
-  .co_rxint         = can_rxint,
-  .co_txint         = can_txint,
-  .co_ioctl         = can_ioctl,
-  .co_remoterequest = can_remoterequest,
-  .co_send          = can_send,
-  .co_txready       = can_txready,
-  .co_txempty       = can_txempty,
+  .co_reset         = stm32l4can_reset,
+  .co_setup         = stm32l4can_setup,
+  .co_shutdown      = stm32l4can_shutdown,
+  .co_rxint         = stm32l4can_rxint,
+  .co_txint         = stm32l4can_txint,
+  .co_ioctl         = stm32l4can_ioctl,
+  .co_remoterequest = stm32l4can_remoterequest,
+  .co_send          = stm32l4can_send,
+  .co_txready       = stm32l4can_txready,
+  .co_txempty       = stm32l4can_txempty,
 };
 
 #ifdef CONFIG_STM32L4_CAN1
 static struct stm32l4_can_s g_can1priv =
 {
   .port             = 1,
-  .canrx0           = STM32L4_IRQ_CAN1RX0,
+  .canrx            =
+  {
+                      STM32L4_IRQ_CAN1RX0,
+                      STM32L4_IRQ_CAN1RX1,
+  },
   .cantx            = STM32L4_IRQ_CAN1TX,
   .filter           = 0,
   .base             = STM32L4_CAN1_BASE,
@@ -202,8 +221,8 @@ static struct can_dev_s g_can1dev =
  ****************************************************************************/
 
 /****************************************************************************
- * Name: can_getreg
- * Name: can_getfreg
+ * Name: stm32l4can_getreg
+ * Name: stm32l4can_getfreg
  *
  * Description:
  *   Read the value of a CAN register or filter block register.
@@ -216,8 +235,8 @@ static struct can_dev_s g_can1dev =
  *
  ****************************************************************************/
 
-#ifdef CONFIG_CAN_REGDEBUG
-static uint32_t can_vgetreg(uint32_t addr)
+#ifdef CONFIG_STM32L4_CAN_REGDEBUG
+static uint32_t stm32l4can_vgetreg(uint32_t addr)
 {
   static uint32_t prevaddr = 0;
   static uint32_t preval   = 0;
@@ -237,7 +256,7 @@ static uint32_t can_vgetreg(uint32_t addr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              caninfo("...\n");
             }
 
           return val;
@@ -254,7 +273,7 @@ static uint32_t can_vgetreg(uint32_t addr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          caninfo("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -266,27 +285,27 @@ static uint32_t can_vgetreg(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%08x\n", addr, val);
+  caninfo("%08x->%08x\n", addr, val);
   return val;
 }
 
-static uint32_t can_getreg(struct stm32l4_can_s *priv, int offset)
+static uint32_t stm32l4can_getreg(FAR struct stm32l4_can_s *priv, int offset)
 {
-  return can_vgetreg(priv->base + offset);
+  return stm32l4can_vgetreg(priv->base + offset);
 }
 
-static uint32_t can_getfreg(struct stm32l4_can_s *priv, int offset)
+static uint32_t stm32l4can_getfreg(FAR struct stm32l4_can_s *priv, int offset)
 {
-  return can_vgetreg(priv->fbase + offset);
+  return stm32l4can_vgetreg(priv->fbase + offset);
 }
 
 #else
-static uint32_t can_getreg(struct stm32l4_can_s *priv, int offset)
+static uint32_t stm32l4can_getreg(FAR struct stm32l4_can_s *priv, int offset)
 {
   return getreg32(priv->base + offset);
 }
 
-static uint32_t can_getfreg(struct stm32l4_can_s *priv, int offset)
+static uint32_t stm32l4can_getfreg(FAR struct stm32l4_can_s *priv, int offset)
 {
   return getreg32(priv->fbase + offset);
 }
@@ -294,8 +313,8 @@ static uint32_t can_getfreg(struct stm32l4_can_s *priv, int offset)
 #endif
 
 /****************************************************************************
- * Name: can_putreg
- * Name: can_putfreg
+ * Name: stm32l4can_putreg
+ * Name: stm32l4can_putfreg
  *
  * Description:
  *   Set the value of a CAN register or filter block register.
@@ -310,42 +329,46 @@ static uint32_t can_getfreg(struct stm32l4_can_s *priv, int offset)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_CAN_REGDEBUG
-static void can_vputreg(uint32_t addr, uint32_t value)
+#ifdef CONFIG_STM32L4_CAN_REGDEBUG
+static void stm32l4can_vputreg(uint32_t addr, uint32_t value)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", addr, value);
+  caninfo("%08x<-%08x\n", addr, value);
 
   /* Write the value */
 
   putreg32(value, addr);
 }
 
-static void can_putreg(struct stm32l4_can_s *priv, int offset, uint32_t value)
+static void stm32l4can_putreg(FAR struct stm32l4_can_s *priv, int offset,
+                              uint32_t value)
 {
-  can_vputreg(priv->base + offset, value);
+  stm32l4can_vputreg(priv->base + offset, value);
 }
 
-static void can_putfreg(struct stm32l4_can_s *priv, int offset, uint32_t value)
+static void stm32l4can_putfreg(FAR struct stm32l4_can_s *priv, int offset,
+                               uint32_t value)
 {
-  can_vputreg(priv->fbase + offset, value);
+  stm32l4can_vputreg(priv->fbase + offset, value);
 }
 
 #else
-static void can_putreg(struct stm32l4_can_s *priv, int offset, uint32_t value)
+static void stm32l4can_putreg(FAR struct stm32l4_can_s *priv, int offset,
+                              uint32_t value)
 {
   putreg32(value, priv->base + offset);
 }
 
-static void can_putfreg(struct stm32l4_can_s *priv, int offset, uint32_t value)
+static void stm32l4can_putfreg(FAR struct stm32l4_can_s *priv, int offset,
+                               uint32_t value)
 {
   putreg32(value, priv->fbase + offset);
 }
 #endif
 
 /****************************************************************************
- * Name: can_dumpctrlregs
+ * Name: stm32l4can_dumpctrlregs
  *
  * Description:
  *   Dump the contents of all CAN control registers
@@ -358,38 +381,39 @@ static void can_putfreg(struct stm32l4_can_s *priv, int offset, uint32_t value)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_CAN_REGDEBUG
-static void can_dumpctrlregs(struct stm32l4_can_s *priv, FAR const char *msg)
+#ifdef CONFIG_STM32L4_CAN_REGDEBUG
+static void stm32l4can_dumpctrlregs(FAR struct stm32l4_can_s *priv,
+                                    FAR const char *msg)
 {
   if (msg)
     {
-      canlldbg("Control Registers: %s\n", msg);
+      caninfo("Control Registers: %s\n", msg);
     }
   else
     {
-      canlldbg("Control Registers:\n");
+      caninfo("Control Registers:\n");
     }
 
   /* CAN control and status registers */
 
-  lldbg("  MCR: %08x   MSR: %08x   TSR: %08x\n",
-        getreg32(priv->base + STM32L4_CAN_MCR_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_MSR_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_TSR_OFFSET));
+  caninfo("  MCR: %08x   MSR: %08x   TSR: %08x\n",
+          getreg32(priv->base + STM32L4_CAN_MCR_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_MSR_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_TSR_OFFSET));
 
-  lldbg(" RF0R: %08x  RF1R: %08x\n",
-        getreg32(priv->base + STM32L4_CAN_RF0R_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_RF1R_OFFSET));
+  caninfo(" RF0R: %08x  RF1R: %08x\n",
+          getreg32(priv->base + STM32L4_CAN_RF0R_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_RF1R_OFFSET));
 
-  lldbg("  IER: %08x   ESR: %08x   BTR: %08x\n",
-        getreg32(priv->base + STM32L4_CAN_IER_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_ESR_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_BTR_OFFSET));
+  caninfo("  IER: %08x   ESR: %08x   BTR: %08x\n",
+          getreg32(priv->base + STM32L4_CAN_IER_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_ESR_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_BTR_OFFSET));
 }
 #endif
 
 /****************************************************************************
- * Name: can_dumpmbregs
+ * Name: stm32l4can_dumpmbregs
  *
  * Description:
  *   Dump the contents of all CAN mailbox registers
@@ -402,54 +426,55 @@ static void can_dumpctrlregs(struct stm32l4_can_s *priv, FAR const char *msg)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_CAN_REGDEBUG
-static void can_dumpmbregs(struct stm32l4_can_s *priv, FAR const char *msg)
+#ifdef CONFIG_STM32L4_CAN_REGDEBUG
+static void stm32l4can_dumpmbregs(FAR struct stm32l4_can_s *priv,
+                                  FAR const char *msg)
 {
   if (msg)
     {
-      canlldbg("Mailbox Registers: %s\n", msg);
+      caninfo("Mailbox Registers: %s\n", msg);
     }
   else
     {
-      canlldbg("Mailbox Registers:\n");
+      caninfo("Mailbox Registers:\n");
     }
 
   /* CAN mailbox registers (3 TX and 2 RX) */
 
-  lldbg(" TI0R: %08x TDT0R: %08x TDL0R: %08x TDH0R: %08x\n",
-        getreg32(priv->base + STM32L4_CAN_TI0R_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_TDT0R_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_TDL0R_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_TDH0R_OFFSET));
-
-  lldbg(" TI1R: %08x TDT1R: %08x TDL1R: %08x TDH1R: %08x\n",
-        getreg32(priv->base + STM32L4_CAN_TI1R_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_TDT1R_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_TDL1R_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_TDH1R_OFFSET));
-
-  lldbg(" TI2R: %08x TDT2R: %08x TDL2R: %08x TDH2R: %08x\n",
-        getreg32(priv->base + STM32L4_CAN_TI2R_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_TDT2R_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_TDL2R_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_TDH2R_OFFSET));
-
-  lldbg(" RI0R: %08x RDT0R: %08x RDL0R: %08x RDH0R: %08x\n",
-        getreg32(priv->base + STM32L4_CAN_RI0R_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_RDT0R_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_RDL0R_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_RDH0R_OFFSET));
-
-  lldbg(" RI1R: %08x RDT1R: %08x RDL1R: %08x RDH1R: %08x\n",
-        getreg32(priv->base + STM32L4_CAN_RI1R_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_RDT1R_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_RDL1R_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_RDH1R_OFFSET));
+  caninfo(" TI0R: %08x TDT0R: %08x TDL0R: %08x TDH0R: %08x\n",
+          getreg32(priv->base + STM32L4_CAN_TI0R_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_TDT0R_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_TDL0R_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_TDH0R_OFFSET));
+
+  caninfo(" TI1R: %08x TDT1R: %08x TDL1R: %08x TDH1R: %08x\n",
+          getreg32(priv->base + STM32L4_CAN_TI1R_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_TDT1R_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_TDL1R_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_TDH1R_OFFSET));
+
+  caninfo(" TI2R: %08x TDT2R: %08x TDL2R: %08x TDH2R: %08x\n",
+          getreg32(priv->base + STM32L4_CAN_TI2R_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_TDT2R_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_TDL2R_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_TDH2R_OFFSET));
+
+  caninfo(" RI0R: %08x RDT0R: %08x RDL0R: %08x RDH0R: %08x\n",
+          getreg32(priv->base + STM32L4_CAN_RI0R_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_RDT0R_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_RDL0R_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_RDH0R_OFFSET));
+
+  caninfo(" RI1R: %08x RDT1R: %08x RDL1R: %08x RDH1R: %08x\n",
+          getreg32(priv->base + STM32L4_CAN_RI1R_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_RDT1R_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_RDL1R_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_RDH1R_OFFSET));
 }
 #endif
 
 /****************************************************************************
- * Name: can_dumpfiltregs
+ * Name: stm32l4can_dumpfiltregs
  *
  * Description:
  *   Dump the contents of all CAN filter registers
@@ -462,42 +487,43 @@ static void can_dumpmbregs(struct stm32l4_can_s *priv, FAR const char *msg)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_CAN_REGDEBUG
-static void can_dumpfiltregs(struct stm32l4_can_s *priv, FAR const char *msg)
+#ifdef CONFIG_STM32L4_CAN_REGDEBUG
+static void stm32l4can_dumpfiltregs(FAR struct stm32l4_can_s *priv,
+                                    FAR const char *msg)
 {
   int i;
 
   if (msg)
     {
-      canlldbg("Filter Registers: %s\n", msg);
+      caninfo("Filter Registers: %s\n", msg);
     }
   else
     {
-      canlldbg("Filter Registers:\n");
+      caninfo("Filter Registers:\n");
     }
 
-  lldbg(" FMR: %08x   FM1R: %08x  FS1R: %08x FFA1R: %08x  FA1R: %08x\n",
-        getreg32(priv->base + STM32L4_CAN_FMR_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_FM1R_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_FS1R_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_FFA1R_OFFSET),
-        getreg32(priv->base + STM32L4_CAN_FA1R_OFFSET));
+  caninfo(" FMR: %08x   FM1R: %08x  FS1R: %08x FFA1R: %08x  FA1R: %08x\n",
+          getreg32(priv->base + STM32L4_CAN_FMR_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_FM1R_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_FS1R_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_FFA1R_OFFSET),
+          getreg32(priv->base + STM32L4_CAN_FA1R_OFFSET));
 
   for (i = 0; i < CAN_NFILTERS; i++)
     {
-      lldbg(" F%dR1: %08x F%dR2: %08x\n",
-            i, getreg32(priv->base + STM32L4_CAN_FIR_OFFSET(i, 1)),
-            i, getreg32(priv->base + STM32L4_CAN_FIR_OFFSET(i, 2)));
+      caninfo(" F%dR1: %08x F%dR2: %08x\n",
+              i, getreg32(priv->base + STM32L4_CAN_FIR_OFFSET(i, 1)),
+              i, getreg32(priv->base + STM32L4_CAN_FIR_OFFSET(i, 2)));
     }
 }
 #endif
 
 /****************************************************************************
- * Name: can_reset
+ * Name: stm32l4can_reset
  *
  * Description:
  *   Reset the CAN device.  Called early to initialize the hardware. This
- *   function is called, before can_setup() and on error conditions.
+ *   function is called, before stm32l4can_setup() and on error conditions.
  *
  * Input Parameters:
  *   dev - An instance of the "upper half" can driver state structure.
@@ -507,14 +533,14 @@ static void can_dumpfiltregs(struct stm32l4_can_s *priv, FAR const char *msg)
  *
  ****************************************************************************/
 
-static void can_reset(FAR struct can_dev_s *dev)
+static void stm32l4can_reset(FAR struct can_dev_s *dev)
 {
   FAR struct stm32l4_can_s *priv = dev->cd_priv;
   uint32_t regval;
   uint32_t regbit = 0;
   irqstate_t flags;
 
-  canllvdbg("CAN%d\n", priv->port);
+  caninfo("CAN%d\n", priv->port);
 
   /* Get the bits in the AHB1RSTR1 register needed to reset this CAN device */
 
@@ -526,12 +552,12 @@ static void can_reset(FAR struct can_dev_s *dev)
   else
 #endif
     {
-      canlldbg("Unsupported port %d\n", priv->port);
+      canerr("ERROR: Unsupported port %d\n", priv->port);
       return;
     }
 
-  /* Disable interrupts momentary to stop any ongoing CAN event processing and
-   * to prevent any concurrent access to the AHB1RSTR1 register.
+  /* Disable interrupts momentarily to stop any ongoing CAN event processing
+   * and to prevent any concurrent access to the AHB1RSTR1 register.
    */
 
   flags = enter_critical_section();
@@ -548,7 +574,7 @@ static void can_reset(FAR struct can_dev_s *dev)
 }
 
 /****************************************************************************
- * Name: can_setup
+ * Name: stm32l4can_setup
  *
  * Description:
  *   Configure the CAN. This method is called the first time that the CAN
@@ -564,64 +590,80 @@ static void can_reset(FAR struct can_dev_s *dev)
  *
  ****************************************************************************/
 
-static int can_setup(FAR struct can_dev_s *dev)
+static int stm32l4can_setup(FAR struct can_dev_s *dev)
 {
   FAR struct stm32l4_can_s *priv = dev->cd_priv;
   int ret;
 
-  canllvdbg("CAN%d RX0 irq: %d TX irq: %d\n", priv->port, priv->canrx0, priv->cantx);
+  caninfo("CAN%d RX0 irq: %d RX1 irq: %d TX irq: %d\n",
+          priv->port, priv->canrx[0], priv->canrx[1], priv->cantx);
 
   /* CAN cell initialization */
 
-  ret = can_cellinit(priv);
+  ret = stm32l4can_cellinit(priv);
   if (ret < 0)
     {
-      canlldbg("CAN%d cell initialization failed: %d\n", priv->port, ret);
+      canerr("ERROR: CAN%d cell initialization failed: %d\n",
+             priv->port, ret);
       return ret;
     }
 
-  can_dumpctrlregs(priv, "After cell initialization");
-  can_dumpmbregs(priv, NULL);
+  stm32l4can_dumpctrlregs(priv, "After cell initialization");
+  stm32l4can_dumpmbregs(priv, NULL);
 
   /* CAN filter initialization */
 
-  ret = can_filterinit(priv);
+  ret = stm32l4can_filterinit(priv);
   if (ret < 0)
     {
-      canlldbg("CAN%d filter initialization failed: %d\n", priv->port, ret);
+      canerr("ERROR: CAN%d filter initialization failed: %d\n",
+             priv->port, ret);
       return ret;
     }
 
-  can_dumpfiltregs(priv, "After filter initialization");
+  stm32l4can_dumpfiltregs(priv, "After filter initialization");
+
+  /* Attach the CAN RX FIFO 0/1 interrupts and TX interrupts.
+   * The others are not used.
+   */
 
-  /* Attach the CAN RX FIFO 0 interrupt and TX interrupts.  The others are not used */
+  ret = irq_attach(priv->canrx[0], stm32l4can_rx0interrupt, NULL);
+  if (ret < 0)
+    {
+      canerr("ERROR: Failed to attach CAN%d RX0 IRQ (%d)",
+             priv->port, priv->canrx[0]);
+      return ret;
+    }
 
-  ret = irq_attach(priv->canrx0, can_rx0interrupt);
+  ret = irq_attach(priv->canrx[1], stm32l4can_rx1interrupt, NULL);
   if (ret < 0)
     {
-      canlldbg("Failed to attach CAN%d RX0 IRQ (%d)", priv->port, priv->canrx0);
+      canerr("ERROR: Failed to attach CAN%d RX1 IRQ (%d)",
+             priv->port, priv->canrx[1]);
       return ret;
     }
 
-  ret = irq_attach(priv->cantx, can_txinterrupt);
+  ret = irq_attach(priv->cantx, stm32l4can_txinterrupt, NULL);
   if (ret < 0)
     {
-      canlldbg("Failed to attach CAN%d TX IRQ (%d)", priv->port, priv->cantx);
+      canerr("ERROR: Failed to attach CAN%d TX IRQ (%d)",
+             priv->port, priv->cantx);
       return ret;
     }
 
-  /* Enable the interrupts at the NVIC.  Interrupts arestill disabled in
+  /* Enable the interrupts at the NVIC.  Interrupts are still disabled in
    * the CAN module.  Since we coming out of reset here, there should be
    * no pending interrupts.
    */
 
-  up_enable_irq(priv->canrx0);
+  up_enable_irq(priv->canrx[0]);
+  up_enable_irq(priv->canrx[1]);
   up_enable_irq(priv->cantx);
   return OK;
 }
 
 /****************************************************************************
- * Name: can_shutdown
+ * Name: stm32l4can_shutdown
  *
  * Description:
  *   Disable the CAN.  This method is called when the CAN device is closed.
@@ -635,29 +677,31 @@ static int can_setup(FAR struct can_dev_s *dev)
  *
  ****************************************************************************/
 
-static void can_shutdown(FAR struct can_dev_s *dev)
+static void stm32l4can_shutdown(FAR struct can_dev_s *dev)
 {
   FAR struct stm32l4_can_s *priv = dev->cd_priv;
 
-  canllvdbg("CAN%d\n", priv->port);
+  caninfo("CAN%d\n", priv->port);
 
-  /* Disable the RX FIFO 0 and TX interrupts */
+  /* Disable the RX FIFO 0/1 and TX interrupts */
 
-  up_disable_irq(priv->canrx0);
+  up_disable_irq(priv->canrx[0]);
+  up_disable_irq(priv->canrx[1]);
   up_disable_irq(priv->cantx);
 
-  /* Detach the RX FIFO 0 and TX interrupts */
+  /* Detach the RX FIFO 0/1 and TX interrupts */
 
-  irq_detach(priv->canrx0);
+  irq_detach(priv->canrx[0]);
+  irq_detach(priv->canrx[1]);
   irq_detach(priv->cantx);
 
   /* And reset the hardware */
 
-  can_reset(dev);
+  stm32l4can_reset(dev);
 }
 
 /****************************************************************************
- * Name: can_rxint
+ * Name: stm32l4can_rxint
  *
  * Description:
  *   Call to enable or disable RX interrupts.
@@ -670,30 +714,30 @@ static void can_shutdown(FAR struct can_dev_s *dev)
  *
  ****************************************************************************/
 
-static void can_rxint(FAR struct can_dev_s *dev, bool enable)
+static void stm32l4can_rxint(FAR struct can_dev_s *dev, bool enable)
 {
   FAR struct stm32l4_can_s *priv = dev->cd_priv;
   uint32_t regval;
 
-  canllvdbg("CAN%d enable: %d\n", priv->port, enable);
+  caninfo("CAN%d enable: %d\n", priv->port, enable);
 
-  /* Enable/disable the FIFO 0 message pending interrupt */
+  /* Enable/disable the FIFO 0/1 message pending interrupt */
 
-  regval = can_getreg(priv, STM32L4_CAN_IER_OFFSET);
+  regval = stm32l4can_getreg(priv, STM32L4_CAN_IER_OFFSET);
   if (enable)
     {
-      regval |= CAN_IER_FMPIE0;
+      regval |= CAN_IER_FMPIE0 | CAN_IER_FMPIE1;
     }
   else
     {
-      regval &= ~CAN_IER_FMPIE0;
+      regval &= ~(CAN_IER_FMPIE0 | CAN_IER_FMPIE1);
     }
 
-  can_putreg(priv, STM32L4_CAN_IER_OFFSET, regval);
+  stm32l4can_putreg(priv, STM32L4_CAN_IER_OFFSET, regval);
 }
 
 /****************************************************************************
- * Name: can_txint
+ * Name: stm32l4can_txint
  *
  * Description:
  *   Call to enable or disable TX interrupts.
@@ -706,25 +750,25 @@ static void can_rxint(FAR struct can_dev_s *dev, bool enable)
  *
  ****************************************************************************/
 
-static void can_txint(FAR struct can_dev_s *dev, bool enable)
+static void stm32l4can_txint(FAR struct can_dev_s *dev, bool enable)
 {
   FAR struct stm32l4_can_s *priv = dev->cd_priv;
   uint32_t regval;
 
-  canllvdbg("CAN%d enable: %d\n", priv->port, enable);
+  caninfo("CAN%d enable: %d\n", priv->port, enable);
 
   /* Support only disabling the transmit mailbox interrupt */
 
   if (!enable)
     {
-      regval  = can_getreg(priv, STM32L4_CAN_IER_OFFSET);
+      regval  = stm32l4can_getreg(priv, STM32L4_CAN_IER_OFFSET);
       regval &= ~CAN_IER_TMEIE;
-      can_putreg(priv, STM32L4_CAN_IER_OFFSET, regval);
+      stm32l4can_putreg(priv, STM32L4_CAN_IER_OFFSET, regval);
     }
 }
 
 /****************************************************************************
- * Name: can_ioctl
+ * Name: stm32l4can_ioctl
  *
  * Description:
  *   All ioctl calls will be routed through this method
@@ -737,15 +781,311 @@ static void can_txint(FAR struct can_dev_s *dev, bool enable)
  *
  ****************************************************************************/
 
-static int can_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg)
+static int stm32l4can_ioctl(FAR struct can_dev_s *dev, int cmd,
+                            unsigned long arg)
 {
-  /* No CAN ioctls are supported */
+  FAR struct stm32l4_can_s *priv;
+  int ret = -ENOTTY;
 
-  return -ENOTTY;
+  caninfo("cmd=%04x arg=%lu\n", cmd, arg);
+
+  DEBUGASSERT(dev && dev->cd_priv);
+  priv = dev->cd_priv;
+
+  /* Handle the command */
+
+  switch (cmd)
+    {
+      /* CANIOC_GET_BITTIMING:
+       *   Description:    Return the current bit timing settings
+       *   Argument:       A pointer to a write-able instance of struct
+       *                   canioc_bittiming_s in which current bit timing
+       *                   values will be returned.
+       *   Returned Value: Zero (OK) is returned on success.  Otherwise -1
+       *                   (ERROR) is returned with the errno variable set
+       *                   to indicate the nature of the error.
+       *   Dependencies:   None
+       */
+
+      case CANIOC_GET_BITTIMING:
+        {
+          FAR struct canioc_bittiming_s *bt =
+            (FAR struct canioc_bittiming_s *)arg;
+          uint32_t regval;
+          uint32_t brp;
+
+          DEBUGASSERT(bt != NULL);
+          regval       = stm32l4can_getreg(priv, STM32L4_CAN_BTR_OFFSET);
+          bt->bt_sjw   = ((regval & CAN_BTR_SJW_MASK) >> CAN_BTR_SJW_SHIFT) + 1;
+          bt->bt_tseg1 = ((regval & CAN_BTR_TS1_MASK) >> CAN_BTR_TS1_SHIFT) + 1;
+          bt->bt_tseg2 = ((regval & CAN_BTR_TS2_MASK) >> CAN_BTR_TS2_SHIFT) + 1;
+
+          brp          = ((regval & CAN_BTR_BRP_MASK) >> CAN_BTR_BRP_SHIFT) + 1;
+          bt->bt_baud  = STM32L4_PCLK1_FREQUENCY /
+                         (brp * (bt->bt_tseg1 + bt->bt_tseg2 + 1));
+          ret = OK;
+        }
+        break;
+
+      /* CANIOC_SET_BITTIMING:
+       *   Description:    Set new current bit timing values
+       *   Argument:       A pointer to a read-able instance of struct
+       *                   canioc_bittiming_s in which the new bit timing
+       *                   values are provided.
+       *   Returned Value: Zero (OK) is returned on success.  Otherwise -1
+       *                   (ERROR)is returned with the errno variable set
+       *                    to indicate thenature of the error.
+       *   Dependencies:   None
+       *
+       * REVISIT: There is probably a limitation here:  If there are multiple
+       * threads trying to send CAN packets, when one of these threads
+       * reconfigures the bitrate, the MCAN hardware will be reset and the
+       * context of operation will be lost.  Hence, this IOCTL can only safely
+       * be executed in quiescent time periods.
+       */
+
+      case CANIOC_SET_BITTIMING:
+        {
+          FAR const struct canioc_bittiming_s *bt =
+            (FAR const struct canioc_bittiming_s *)arg;
+          uint32_t brp;
+          uint32_t can_bit_quanta;
+          uint32_t tmp;
+          uint32_t regval;
+
+          DEBUGASSERT(bt != NULL);
+          DEBUGASSERT(bt->bt_baud < STM32L4_PCLK1_FREQUENCY);
+          DEBUGASSERT(bt->bt_sjw > 0 && bt->bt_sjw <= 4);
+          DEBUGASSERT(bt->bt_tseg1 > 0 && bt->bt_tseg1 <= 16);
+          DEBUGASSERT(bt->bt_tseg2 > 0 && bt->bt_tseg2 <=  8);
+
+          regval = stm32l4can_getreg(priv, STM32L4_CAN_BTR_OFFSET);
+
+          /* Extract bit timing data */
+          /* tmp is in clocks per bit time */
+
+          tmp = STM32L4_PCLK1_FREQUENCY / bt->bt_baud;
+
+          /* This value is dynamic as requested by user */
+
+          can_bit_quanta = bt->bt_tseg1 + bt->bt_tseg2 + 1;
+
+          if (tmp < can_bit_quanta)
+            {
+              /* This timing is not possible */
+
+              ret = -EINVAL;
+              break;
+            }
+
+          /* Otherwise, nquanta is can_bit_quanta, ts1 and ts2 are
+           * provided by the user and we calculate brp to achieve
+           * can_bit_quanta quanta in the bit times
+           */
+
+          else
+            {
+              brp = (tmp + (can_bit_quanta/2)) / can_bit_quanta;
+              DEBUGASSERT(brp >= 1 && brp <= CAN_BTR_BRP_MAX);
+            }
+
+          caninfo("TS1: %d TS2: %d BRP: %d\n",
+                  bt->bt_tseg1, bt->bt_tseg2, brp);
+
+          /* Configure bit timing. */
+
+          regval &= ~(CAN_BTR_BRP_MASK | CAN_BTR_TS1_MASK |
+                      CAN_BTR_TS2_MASK | CAN_BTR_SJW_MASK);
+          regval |= ((brp          - 1) << CAN_BTR_BRP_SHIFT) |
+                    ((bt->bt_tseg1 - 1) << CAN_BTR_TS1_SHIFT) |
+                    ((bt->bt_tseg2 - 1) << CAN_BTR_TS2_SHIFT) |
+                    ((bt->bt_sjw   - 1) << CAN_BTR_SJW_SHIFT);
+
+          /* Bit timing can only be configured in init mode. */
+
+          ret = stm32l4can_enterinitmode(priv);
+          if (ret < 0)
+            {
+              break;
+            }
+
+          stm32l4can_putreg(priv, STM32L4_CAN_BTR_OFFSET, regval);
+
+          ret = stm32l4can_exitinitmode(priv);
+          if (ret >= 0)
+            {
+              priv->baud  = STM32L4_PCLK1_FREQUENCY /
+                (brp * (bt->bt_tseg1 + bt->bt_tseg2 + 1));
+            }
+        }
+        break;
+
+      /* CANIOC_GET_CONNMODES:
+       *   Description:    Get the current bus connection modes
+       *   Argument:       A pointer to a write-able instance of struct
+       *                   canioc_connmodes_s in which the new bus modes will
+       *                   be returned.
+       *   Returned Value: Zero (OK) is returned on success.  Otherwise -1
+       *                   (ERROR)is returned with the errno variable set
+       *                   to indicate the nature of the error.
+       *   Dependencies:   None
+       */
+
+      case CANIOC_GET_CONNMODES:
+        {
+          FAR struct canioc_connmodes_s *bm =
+            (FAR struct canioc_connmodes_s *)arg;
+          uint32_t regval;
+
+          DEBUGASSERT(bm != NULL);
+
+          regval          = stm32l4can_getreg(priv, STM32L4_CAN_BTR_OFFSET);
+
+          bm->bm_loopback = ((regval & CAN_BTR_LBKM) == CAN_BTR_LBKM);
+          bm->bm_silent   = ((regval & CAN_BTR_SILM) == CAN_BTR_SILM);
+          ret = OK;
+          break;
+        }
+
+      /* CANIOC_SET_CONNMODES:
+       *   Description:    Set new bus connection modes values
+       *   Argument:       A pointer to a read-able instance of struct
+       *                   canioc_connmodes_s in which the new bus modes
+       *                   are provided.
+       *   Returned Value: Zero (OK) is returned on success.  Otherwise -1
+       *                   (ERROR) is returned with the errno variable set
+       *                   to indicate the nature of the error.
+       *   Dependencies:   None
+       */
+
+      case CANIOC_SET_CONNMODES:
+        {
+          FAR struct canioc_connmodes_s *bm =
+            (FAR struct canioc_connmodes_s *)arg;
+          uint32_t regval;
+
+          DEBUGASSERT(bm != NULL);
+
+          regval = stm32l4can_getreg(priv, STM32L4_CAN_BTR_OFFSET);
+
+          if (bm->bm_loopback)
+            {
+              regval |= CAN_BTR_LBKM;
+            }
+          else
+            {
+              regval &= ~CAN_BTR_LBKM;
+            }
+
+          if (bm->bm_silent)
+            {
+              regval |= CAN_BTR_SILM;
+            }
+          else
+            {
+              regval &= ~CAN_BTR_SILM;
+            }
+
+          /* This register can only be configured in init mode. */
+
+          ret = stm32l4can_enterinitmode(priv);
+          if (ret < 0)
+            {
+              break;
+            }
+
+          stm32l4can_putreg(priv, STM32L4_CAN_BTR_OFFSET, regval);
+
+          ret = stm32l4can_exitinitmode(priv);
+        }
+        break;
+
+#ifdef CONFIG_CAN_EXTID
+      /* CANIOC_ADD_EXTFILTER:
+       *   Description:    Add an address filter for a extended 29 bit
+       *                   address.
+       *   Argument:       A reference to struct canioc_extfilter_s
+       *   Returned Value: A non-negative filter ID is returned on success.
+       *                   Otherwise -1 (ERROR) is returned with the errno
+       *                   variable set to indicate the nature of the error.
+       */
+
+      case CANIOC_ADD_EXTFILTER:
+        {
+          DEBUGASSERT(arg != 0);
+          ret = stm32l4can_addextfilter(priv,
+                                        (FAR struct canioc_extfilter_s *)arg);
+        }
+        break;
+
+      /* CANIOC_DEL_EXTFILTER:
+       *   Description:    Remove an address filter for a standard 29 bit
+       *                   address.
+       *   Argument:       The filter index previously returned by the
+       *                   CANIOC_ADD_EXTFILTER command
+       *   Returned Value: Zero (OK) is returned on success.  Otherwise -1
+       *                   (ERROR)is returned with the errno variable set
+       *                   to indicate the nature of the error.
+       */
+
+      case CANIOC_DEL_EXTFILTER:
+        {
+#if 0 /* Unimplemented */
+          DEBUGASSERT(arg <= priv->config->nextfilters);
+#endif
+          ret = stm32l4can_delextfilter(priv, (int)arg);
+        }
+        break;
+#endif
+
+      /* CANIOC_ADD_STDFILTER:
+       *   Description:    Add an address filter for a standard 11 bit
+       *                   address.
+       *   Argument:       A reference to struct canioc_stdfilter_s
+       *   Returned Value: A non-negative filter ID is returned on success.
+       *                   Otherwise -1 (ERROR) is returned with the errno
+       *                   variable set to indicate the nature of the error.
+       */
+
+      case CANIOC_ADD_STDFILTER:
+        {
+          DEBUGASSERT(arg != 0);
+          ret = stm32l4can_addstdfilter(priv,
+                                        (FAR struct canioc_stdfilter_s *)arg);
+        }
+        break;
+
+      /* CANIOC_DEL_STDFILTER:
+       *   Description:    Remove an address filter for a standard 11 bit
+       *                   address.
+       *   Argument:       The filter index previously returned by the
+       *                   CANIOC_ADD_STDFILTER command
+       *   Returned Value: Zero (OK) is returned on success.  Otherwise -1
+       *                   (ERROR) is returned with the errno variable set
+       *                   to indicate the nature of the error.
+       */
+
+      case CANIOC_DEL_STDFILTER:
+        {
+#if 0 /* Unimplemented */
+          DEBUGASSERT(arg <= priv->config->nstdfilters);
+#endif
+          ret = stm32l4can_delstdfilter(priv, (int)arg);
+        }
+        break;
+
+      /* Unsupported/unrecognized command */
+
+      default:
+        canerr("ERROR: Unrecognized command: %04x\n", cmd);
+        break;
+    }
+
+  return ret;
 }
 
 /****************************************************************************
- * Name: can_remoterequest
+ * Name: stm32l4can_remoterequest
  *
  * Description:
  *   Send a remote request
@@ -758,14 +1098,14 @@ static int can_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg)
  *
  ****************************************************************************/
 
-static int can_remoterequest(FAR struct can_dev_s *dev, uint16_t id)
+static int stm32l4can_remoterequest(FAR struct can_dev_s *dev, uint16_t id)
 {
 #warning "Remote request not implemented"
   return -ENOSYS;
 }
 
 /****************************************************************************
- * Name: can_send
+ * Name: stm32l4can_send
  *
  * Description:
  *    Send one can message.
@@ -787,7 +1127,8 @@ static int can_remoterequest(FAR struct can_dev_s *dev, uint16_t id)
  *
  ****************************************************************************/
 
-static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
+static int stm32l4can_send(FAR struct can_dev_s *dev,
+                           FAR struct can_msg_s *msg)
 {
   FAR struct stm32l4_can_s *priv = dev->cd_priv;
   FAR uint8_t *ptr;
@@ -796,11 +1137,12 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
   int dlc;
   int txmb;
 
-  canllvdbg("CAN%d ID: %d DLC: %d\n", priv->port, msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc);
+  caninfo("CAN%d ID: %d DLC: %d\n",
+          priv->port, msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc);
 
   /* Select one empty transmit mailbox */
 
-  regval = can_getreg(priv, STM32L4_CAN_TSR_OFFSET);
+  regval = stm32l4can_getreg(priv, STM32L4_CAN_TSR_OFFSET);
   if ((regval & CAN_TSR_TME0) != 0 && (regval & CAN_TSR_RQCP0) == 0)
     {
       txmb = 0;
@@ -815,15 +1157,16 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
     }
   else
     {
-      canlldbg("ERROR: No available mailbox\n");
+      canerr("ERROR: No available mailbox\n");
       return -EBUSY;
     }
 
   /* Clear TXRQ, RTR, IDE, EXID, and STID fields */
 
-  regval  = can_getreg(priv, STM32L4_CAN_TIR_OFFSET(txmb));
-  regval &= ~(CAN_TIR_TXRQ | CAN_TIR_RTR | CAN_TIR_IDE | CAN_TIR_EXID_MASK | CAN_TIR_STID_MASK);
-  can_putreg(priv, STM32L4_CAN_TIR_OFFSET(txmb), regval);
+  regval  = stm32l4can_getreg(priv, STM32L4_CAN_TIR_OFFSET(txmb));
+  regval &= ~(CAN_TIR_TXRQ | CAN_TIR_RTR | CAN_TIR_IDE |
+              CAN_TIR_EXID_MASK | CAN_TIR_STID_MASK);
+  stm32l4can_putreg(priv, STM32L4_CAN_TIR_OFFSET(txmb), regval);
 
   /* Set up the ID, standard 11-bit or extended 29-bit. */
 
@@ -843,15 +1186,15 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
   regval &= ~CAN_TIR_STID_MASK;
   regval |= (uint32_t)msg->cm_hdr.ch_id << CAN_TIR_STID_SHIFT;
 #endif
-  can_putreg(priv, STM32L4_CAN_TIR_OFFSET(txmb), regval);
+  stm32l4can_putreg(priv, STM32L4_CAN_TIR_OFFSET(txmb), regval);
 
   /* Set up the DLC */
 
   dlc     = msg->cm_hdr.ch_dlc;
-  regval  = can_getreg(priv, STM32L4_CAN_TDTR_OFFSET(txmb));
+  regval  = stm32l4can_getreg(priv, STM32L4_CAN_TDTR_OFFSET(txmb));
   regval &= ~(CAN_TDTR_DLC_MASK | CAN_TDTR_TGT);
   regval |= (uint32_t)dlc << CAN_TDTR_DLC_SHIFT;
-  can_putreg(priv, STM32L4_CAN_TDTR_OFFSET(txmb), regval);
+  stm32l4can_putreg(priv, STM32L4_CAN_TDTR_OFFSET(txmb), regval);
 
   /* Set up the data fields */
 
@@ -865,24 +1208,24 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
 
       if (dlc > 1)
         {
-          tmp    = (uint32_t)*ptr++;
+          tmp     = (uint32_t)*ptr++;
           regval |= tmp << CAN_TDLR_DATA1_SHIFT;
 
           if (dlc > 2)
             {
-              tmp    = (uint32_t)*ptr++;
+              tmp     = (uint32_t)*ptr++;
               regval |= tmp << CAN_TDLR_DATA2_SHIFT;
 
               if (dlc > 3)
                 {
-                  tmp    = (uint32_t)*ptr++;
+                  tmp     = (uint32_t)*ptr++;
                   regval |= tmp << CAN_TDLR_DATA3_SHIFT;
                 }
             }
         }
     }
 
-  can_putreg(priv, STM32L4_CAN_TDLR_OFFSET(txmb), regval);
+  stm32l4can_putreg(priv, STM32L4_CAN_TDLR_OFFSET(txmb), regval);
 
   regval = 0;
   if (dlc > 4)
@@ -892,43 +1235,43 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
 
       if (dlc > 5)
         {
-          tmp    = (uint32_t)*ptr++;
+          tmp     = (uint32_t)*ptr++;
           regval |= tmp << CAN_TDHR_DATA5_SHIFT;
 
           if (dlc > 6)
             {
-              tmp    = (uint32_t)*ptr++;
+              tmp     = (uint32_t)*ptr++;
               regval |= tmp << CAN_TDHR_DATA6_SHIFT;
 
               if (dlc > 7)
                 {
-                  tmp    = (uint32_t)*ptr++;
+                  tmp     = (uint32_t)*ptr++;
                   regval |= tmp << CAN_TDHR_DATA7_SHIFT;
                 }
             }
         }
     }
 
-  can_putreg(priv, STM32L4_CAN_TDHR_OFFSET(txmb), regval);
+  stm32l4can_putreg(priv, STM32L4_CAN_TDHR_OFFSET(txmb), regval);
 
   /* Enable the transmit mailbox empty interrupt (may already be enabled) */
 
-  regval  = can_getreg(priv, STM32L4_CAN_IER_OFFSET);
+  regval  = stm32l4can_getreg(priv, STM32L4_CAN_IER_OFFSET);
   regval |= CAN_IER_TMEIE;
-  can_putreg(priv, STM32L4_CAN_IER_OFFSET, regval);
+  stm32l4can_putreg(priv, STM32L4_CAN_IER_OFFSET, regval);
 
   /* Request transmission */
 
-  regval  = can_getreg(priv, STM32L4_CAN_TIR_OFFSET(txmb));
+  regval  = stm32l4can_getreg(priv, STM32L4_CAN_TIR_OFFSET(txmb));
   regval |= CAN_TIR_TXRQ;  /* Transmit Mailbox Request */
-  can_putreg(priv, STM32L4_CAN_TIR_OFFSET(txmb), regval);
+  stm32l4can_putreg(priv, STM32L4_CAN_TIR_OFFSET(txmb), regval);
 
-  can_dumpmbregs(priv, "After send");
+  stm32l4can_dumpmbregs(priv, "After send");
   return OK;
 }
 
 /****************************************************************************
- * Name: can_txready
+ * Name: stm32l4can_txready
  *
  * Description:
  *   Return true if the CAN hardware can accept another TX message.
@@ -941,26 +1284,21 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
  *
  ****************************************************************************/
 
-static bool can_txready(FAR struct can_dev_s *dev)
+static bool stm32l4can_txready(FAR struct can_dev_s *dev)
 {
   FAR struct stm32l4_can_s *priv = dev->cd_priv;
   uint32_t regval;
 
   /* Return true if any mailbox is available */
 
-  regval = can_getreg(priv, STM32L4_CAN_TSR_OFFSET);
-  canllvdbg("CAN%d TSR: %08x\n", priv->port, regval);
-
-  if ((regval & CAN_ALL_MAILBOXES) != 0)
-    {
-      return true;
-    }
+  regval = stm32l4can_getreg(priv, STM32L4_CAN_TSR_OFFSET);
+  caninfo("CAN%d TSR: %08x\n", priv->port, regval);
 
-  return false;
+  return (regval & CAN_ALL_MAILBOXES) != 0;
 }
 
 /****************************************************************************
- * Name: can_txempty
+ * Name: stm32l4can_txempty
  *
  * Description:
  *   Return true if all message have been sent.  If for example, the CAN
@@ -977,40 +1315,36 @@ static bool can_txready(FAR struct can_dev_s *dev)
  *
  ****************************************************************************/
 
-static bool can_txempty(FAR struct can_dev_s *dev)
+static bool stm32l4can_txempty(FAR struct can_dev_s *dev)
 {
   FAR struct stm32l4_can_s *priv = dev->cd_priv;
   uint32_t regval;
 
   /* Return true if all mailboxes are available */
 
-  regval = can_getreg(priv, STM32L4_CAN_TSR_OFFSET);
-  canllvdbg("CAN%d TSR: %08x\n", priv->port, regval);
+  regval = stm32l4can_getreg(priv, STM32L4_CAN_TSR_OFFSET);
+  caninfo("CAN%d TSR: %08x\n", priv->port, regval);
 
-  if ((regval & CAN_ALL_MAILBOXES) == CAN_ALL_MAILBOXES)
-    {
-      return true;
-    }
-
-  return false;
+  return (regval & CAN_ALL_MAILBOXES) == CAN_ALL_MAILBOXES;
 }
 
 /****************************************************************************
- * Name: can_rx0interrupt
+ * Name: stm32l4can_rxinterrupt
  *
  * Description:
- *   CAN RX FIFO 0 interrupt handler
+ *   CAN RX FIFO 0/1 interrupt handler
  *
  * Input Parameters:
  *   irq - The IRQ number of the interrupt.
  *   context - The register state save array at the time of the interrupt.
+ *   rxmb - The RX mailbox number.
  *
  * Returned Value:
  *   Zero on success; a negated errno on failure
  *
  ****************************************************************************/
 
-static int can_rx0interrupt(int irq, void *context)
+static int stm32l4can_rxinterrupt(int irq, FAR void *context, int rxmb)
 {
   FAR struct can_dev_s *dev = NULL;
   FAR struct stm32l4_can_s *priv;
@@ -1023,21 +1357,28 @@ static int can_rx0interrupt(int irq, void *context)
   dev = &g_can1dev;
   priv = dev->cd_priv;
 
-  /* Verify that a message is pending in FIFO 0 */
+  /* Verify that a message is pending in the FIFO */
 
-  regval   = can_getreg(priv, STM32L4_CAN_RF0R_OFFSET);
+  regval   = stm32l4can_getreg(priv, STM32L4_CAN_RFR_OFFSET(rxmb));
   npending = (regval & CAN_RFR_FMP_MASK) >> CAN_RFR_FMP_SHIFT;
   if (npending < 1)
     {
-      canlldbg("WARNING: No messages pending\n");
+      canwarn("WARNING: No messages pending\n");
       return OK;
     }
 
-  can_dumpmbregs(priv, "RX0 interrupt");
+  if (rxmb == 0)
+    {
+      stm32l4can_dumpmbregs(priv, "RX0 interrupt");
+    }
+  else
+    {
+      stm32l4can_dumpmbregs(priv, "RX1 interrupt");
+    }
 
   /* Get the CAN identifier. */
 
-  regval = can_getreg(priv, STM32L4_CAN_RI0R_OFFSET);
+  regval = stm32l4can_getreg(priv, STM32L4_CAN_RIR_OFFSET(rxmb));
 
 #ifdef CONFIG_CAN_EXTID
   if ((regval & CAN_RIR_IDE) != 0)
@@ -1053,7 +1394,7 @@ static int can_rx0interrupt(int irq, void *context)
 #else
   if ((regval & CAN_RIR_IDE) != 0)
     {
-      canlldbg("ERROR: Received message with extended identifier.  Dropped\n");
+      canerr("ERROR: Received message with extended identifier.  Dropped\n");
       ret = -ENOSYS;
       goto errout;
     }
@@ -1070,22 +1411,22 @@ static int can_rx0interrupt(int irq, void *context)
 
   /* Extract the RTR bit */
 
-  hdr.ch_rtr = (regval & CAN_RIR_RTR) != 0 ? true : false;
+  hdr.ch_rtr = (regval & CAN_RIR_RTR) != 0;
 
   /* Get the DLC */
 
-  regval     = can_getreg(priv, STM32L4_CAN_RDT0R_OFFSET);
+  regval     = stm32l4can_getreg(priv, STM32L4_CAN_RDTR_OFFSET(rxmb));
   hdr.ch_dlc = (regval & CAN_RDTR_DLC_MASK) >> CAN_RDTR_DLC_SHIFT;
 
   /* Save the message data */
 
-  regval  = can_getreg(priv, STM32L4_CAN_RDL0R_OFFSET);
+  regval  = stm32l4can_getreg(priv, STM32L4_CAN_RDLR_OFFSET(rxmb));
   data[0] = (regval & CAN_RDLR_DATA0_MASK) >> CAN_RDLR_DATA0_SHIFT;
   data[1] = (regval & CAN_RDLR_DATA1_MASK) >> CAN_RDLR_DATA1_SHIFT;
   data[2] = (regval & CAN_RDLR_DATA2_MASK) >> CAN_RDLR_DATA2_SHIFT;
   data[3] = (regval & CAN_RDLR_DATA3_MASK) >> CAN_RDLR_DATA3_SHIFT;
 
-  regval  = can_getreg(priv, STM32L4_CAN_RDH0R_OFFSET);
+  regval  = stm32l4can_getreg(priv, STM32L4_CAN_RDHR_OFFSET(rxmb));
   data[4] = (regval & CAN_RDHR_DATA4_MASK) >> CAN_RDHR_DATA4_SHIFT;
   data[5] = (regval & CAN_RDHR_DATA5_MASK) >> CAN_RDHR_DATA5_SHIFT;
   data[6] = (regval & CAN_RDHR_DATA6_MASK) >> CAN_RDHR_DATA6_SHIFT;
@@ -1095,19 +1436,59 @@ static int can_rx0interrupt(int irq, void *context)
 
   ret = can_receive(dev, &hdr, data);
 
-  /* Release the FIFO0 */
+  /* Release the FIFO */
 
 #ifndef CONFIG_CAN_EXTID
 errout:
 #endif
-  regval  = can_getreg(priv, STM32L4_CAN_RF0R_OFFSET);
+  regval  = stm32l4can_getreg(priv, STM32L4_CAN_RFR_OFFSET(rxmb));
   regval |= CAN_RFR_RFOM;
-  can_putreg(priv, STM32L4_CAN_RF0R_OFFSET, regval);
+  stm32l4can_putreg(priv, STM32L4_CAN_RFR_OFFSET(rxmb), regval);
   return ret;
 }
 
 /****************************************************************************
- * Name: can_txinterrupt
+ * Name: stm32l4can_rx0interrupt
+ *
+ * Description:
+ *   CAN RX FIFO 0 interrupt handler
+ *
+ * Input Parameters:
+ *   irq - The IRQ number of the interrupt.
+ *   context - The register state save array at the time of the interrupt.
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+static int stm32l4can_rx0interrupt(int irq, FAR void *context, FAR void *arg)
+{
+  return stm32l4can_rxinterrupt(irq, context, 0);
+}
+
+/****************************************************************************
+ * Name: stm32l4can_rx1interrupt
+ *
+ * Description:
+ *   CAN RX FIFO 1 interrupt handler
+ *
+ * Input Parameters:
+ *   irq - The IRQ number of the interrupt.
+ *   context - The register state save array at the time of the interrupt.
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno on failure
+ *
+ ****************************************************************************/
+
+static int stm32l4can_rx1interrupt(int irq, FAR void *context, FAR void *arg)
+{
+  return stm32l4can_rxinterrupt(irq, context, 1);
+}
+
+/****************************************************************************
+ * Name: stm32l4can_txinterrupt
  *
  * Description:
  *   CAN TX mailbox complete interrupt handler
@@ -1121,7 +1502,7 @@ errout:
  *
  ****************************************************************************/
 
-static int can_txinterrupt(int irq, void *context)
+static int stm32l4can_txinterrupt(int irq, FAR void *context, FAR void *arg)
 {
   FAR struct can_dev_s *dev = NULL;
   FAR struct stm32l4_can_s *priv;
@@ -1132,7 +1513,7 @@ static int can_txinterrupt(int irq, void *context)
 
   /* Get the transmit status */
 
-  regval = can_getreg(priv, STM32L4_CAN_TSR_OFFSET);
+  regval = stm32l4can_getreg(priv, STM32L4_CAN_TSR_OFFSET);
 
   /* Check for RQCP0: Request completed mailbox 0 */
 
@@ -1142,7 +1523,7 @@ static int can_txinterrupt(int irq, void *context)
        * ALST0 and TERR0) for Mailbox 0.
        */
 
-      can_putreg(priv, STM32L4_CAN_TSR_OFFSET, CAN_TSR_RQCP0);
+      stm32l4can_putreg(priv, STM32L4_CAN_TSR_OFFSET, CAN_TSR_RQCP0);
 
       /* Check for errors */
 
@@ -1162,7 +1543,7 @@ static int can_txinterrupt(int irq, void *context)
        * ALST1 and TERR1) for Mailbox 1.
        */
 
-      can_putreg(priv, STM32L4_CAN_TSR_OFFSET, CAN_TSR_RQCP1);
+      stm32l4can_putreg(priv, STM32L4_CAN_TSR_OFFSET, CAN_TSR_RQCP1);
 
       /* Check for errors */
 
@@ -1182,7 +1563,7 @@ static int can_txinterrupt(int irq, void *context)
        * ALST2 and TERR2) for Mailbox 2.
        */
 
-      can_putreg(priv, STM32L4_CAN_TSR_OFFSET, CAN_TSR_RQCP2);
+      stm32l4can_putreg(priv, STM32L4_CAN_TSR_OFFSET, CAN_TSR_RQCP2);
 
       /* Check for errors */
 
@@ -1198,7 +1579,7 @@ static int can_txinterrupt(int irq, void *context)
 }
 
 /****************************************************************************
- * Name: can_bittiming
+ * Name: stm32l4can_bittiming
  *
  * Description:
  *   Set the CAN bit timing register (BTR) based on the configured BAUD.
@@ -1241,6 +1622,7 @@ static int can_txinterrupt(int irq, void *context)
  *   Tbs1 = Tq * ts1
  *   Tbs2 = Tq * ts2
  *   Tq = brp * Tpclk1
+ *   baud = Fpclk1 / (brp  * (1 + ts1 + ts2))
  *
  * Where:
  *   Tpclk1 is the period of the APB1 clock (PCLK1).
@@ -1253,15 +1635,15 @@ static int can_txinterrupt(int irq, void *context)
  *
  ****************************************************************************/
 
-static int can_bittiming(struct stm32l4_can_s *priv)
+static int stm32l4can_bittiming(FAR struct stm32l4_can_s *priv)
 {
   uint32_t tmp;
   uint32_t brp;
   uint32_t ts1;
   uint32_t ts2;
 
-  canllvdbg("CAN%d PCLK1: %d baud: %d\n",
-            priv->port, STM32L4_PCLK1_FREQUENCY, priv->baud);
+  caninfo("CAN%d PCLK1: %d baud: %d\n",
+          priv->port, STM32L4_PCLK1_FREQUENCY, priv->baud);
 
   /* Try to get CAN_BIT_QUANTA quanta in one bit_time.
    *
@@ -1293,7 +1675,6 @@ static int can_bittiming(struct stm32l4_can_s *priv)
 
       ts1 = (tmp - 1) >> 1;
       ts2 = tmp - ts1 - 1;
-
       if (ts1 == ts2 && ts1 > 1 && ts2 < CAN_BTR_TSEG2_MAX)
         {
           ts1--;
@@ -1314,7 +1695,7 @@ static int can_bittiming(struct stm32l4_can_s *priv)
       DEBUGASSERT(brp >= 1 && brp <= CAN_BTR_BRP_MAX);
     }
 
-  canllvdbg("TS1: %d TS2: %d BRP: %d\n", ts1, ts2, brp);
+  caninfo("TS1: %d TS2: %d BRP: %d\n", ts1, ts2, brp);
 
   /* Configure bit timing.  This also does the following, less obvious
    * things.  Unless loopback mode is enabled, it:
@@ -1333,15 +1714,17 @@ static int can_bittiming(struct stm32l4_can_s *priv)
   tmp |= CAN_BTR_LBKM;
 #endif
 
-  can_putreg(priv, STM32L4_CAN_BTR_OFFSET, tmp);
+  stm32l4can_putreg(priv, STM32L4_CAN_BTR_OFFSET, tmp);
   return OK;
 }
 
 /****************************************************************************
- * Name: can_cellinit
+ * Name: stm32l4can_enterinitmode
  *
  * Description:
- *   CAN cell initialization
+ *   Put the CAN cell in Initialization mode. This only disconnects the CAN
+ *   peripheral, no registers are changed. The initialization mode is
+ *   required to change the baud rate.
  *
  * Input Parameter:
  *   priv - A pointer to the private data structure for this CAN block
@@ -1351,35 +1734,24 @@ static int can_bittiming(struct stm32l4_can_s *priv)
  *
  ****************************************************************************/
 
-static int can_cellinit(struct stm32l4_can_s *priv)
+static int stm32l4can_enterinitmode(FAR struct stm32l4_can_s *priv)
 {
-  volatile uint32_t timeout;
   uint32_t regval;
-  int ret;
-
-  canllvdbg("CAN%d\n", priv->port);
-
-  /* Exit from sleep mode */
-
-  regval  = can_getreg(priv, STM32L4_CAN_MCR_OFFSET);
-  regval &= ~CAN_MCR_SLEEP;
-  can_putreg(priv, STM32L4_CAN_MCR_OFFSET, regval);
-
-  /* Configure CAN behavior.  Priority driven request order, not message ID. */
+  volatile uint32_t timeout;
 
-  regval |= CAN_MCR_TXFP;
-  can_putreg(priv, STM32L4_CAN_MCR_OFFSET, regval);
+  caninfo("CAN%d\n", priv->port);
 
   /* Enter initialization mode */
 
+  regval  = stm32l4can_getreg(priv, STM32L4_CAN_MCR_OFFSET);
   regval |= CAN_MCR_INRQ;
-  can_putreg(priv, STM32L4_CAN_MCR_OFFSET, regval);
+  stm32l4can_putreg(priv, STM32L4_CAN_MCR_OFFSET, regval);
 
   /* Wait until initialization mode is acknowledged */
 
   for (timeout = INAK_TIMEOUT; timeout > 0; timeout--)
     {
-      regval = can_getreg(priv, STM32L4_CAN_MSR_OFFSET);
+      regval = stm32l4can_getreg(priv, STM32L4_CAN_MSR_OFFSET);
       if ((regval & CAN_MSR_INAK) != 0)
         {
           /* We are in initialization mode */
@@ -1392,44 +1764,43 @@ static int can_cellinit(struct stm32l4_can_s *priv)
 
   if (timeout < 1)
     {
-      canlldbg("ERROR: Timed out waiting to enter initialization mode\n");
+      canerr("ERROR: Timed out waiting to enter initialization mode\n");
       return -ETIMEDOUT;
     }
 
-  /* Disable the following modes:
-   *
-   *  - Time triggered communication mode
-   *  - Automatic bus-off management
-   *  - Automatic wake-up mode
-   *  - No automatic retransmission
-   *  - Receive FIFO locked mode
-   *  - Transmit FIFO priority
-   */
-
-  regval   = can_getreg(priv, STM32L4_CAN_MCR_OFFSET);
-  regval &= ~(CAN_MCR_TXFP | CAN_MCR_RFLM | CAN_MCR_NART | CAN_MCR_AWUM | CAN_MCR_ABOM | CAN_MCR_TTCM);
-  can_putreg(priv, STM32L4_CAN_MCR_OFFSET, regval);
+  return OK;
+}
 
-  /* Configure bit timing. */
+/****************************************************************************
+ * Name: stm32l4can_exitinitmode
+ *
+ * Description:
+ *   Put the CAN cell out of the Initialization mode (to Normal mode)
+ *
+ * Input Parameter:
+ *   priv - A pointer to the private data structure for this CAN block
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
 
-  ret = can_bittiming(priv);
-  if (ret < 0)
-    {
-      canlldbg("ERROR: Failed to set bit timing: %d\n", ret);
-      return ret;
-    }
+static int stm32l4can_exitinitmode(FAR struct stm32l4_can_s *priv)
+{
+  uint32_t regval;
+  volatile uint32_t timeout;
 
-  /* Exit initialization mode */
+  /* Exit Initialization mode, enter Normal mode */
 
-  regval  = can_getreg(priv, STM32L4_CAN_MCR_OFFSET);
+  regval  = stm32l4can_getreg(priv, STM32L4_CAN_MCR_OFFSET);
   regval &= ~CAN_MCR_INRQ;
-  can_putreg(priv, STM32L4_CAN_MCR_OFFSET, regval);
+  stm32l4can_putreg(priv, STM32L4_CAN_MCR_OFFSET, regval);
 
   /* Wait until the initialization mode exit is acknowledged */
 
   for (timeout = INAK_TIMEOUT; timeout > 0; timeout--)
     {
-      regval = can_getreg(priv, STM32L4_CAN_MSR_OFFSET);
+      regval = stm32l4can_getreg(priv, STM32L4_CAN_MSR_OFFSET);
       if ((regval & CAN_MSR_INAK) == 0)
         {
           /* We are out of initialization mode */
@@ -1442,7 +1813,8 @@ static int can_cellinit(struct stm32l4_can_s *priv)
 
   if (timeout < 1)
     {
-      canlldbg("ERROR: Timed out waiting to exit initialization mode: %08x\n", regval);
+      canerr("ERROR: Timed out waiting to exit initialization mode: %08x\n",
+             regval);
       return -ETIMEDOUT;
     }
 
@@ -1450,7 +1822,67 @@ static int can_cellinit(struct stm32l4_can_s *priv)
 }
 
 /****************************************************************************
- * Name: can_filterinit
+ * Name: stm32l4can_cellinit
+ *
+ * Description:
+ *   CAN cell initialization
+ *
+ * Input Parameter:
+ *   priv - A pointer to the private data structure for this CAN block
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+static int stm32l4can_cellinit(FAR struct stm32l4_can_s *priv)
+{
+  uint32_t regval;
+  int ret;
+
+  caninfo("CAN%d\n", priv->port);
+
+  /* Exit from sleep mode */
+
+  regval  = stm32l4can_getreg(priv, STM32L4_CAN_MCR_OFFSET);
+  regval &= ~CAN_MCR_SLEEP;
+  stm32l4can_putreg(priv, STM32L4_CAN_MCR_OFFSET, regval);
+
+  ret = stm32l4can_enterinitmode(priv);
+  if(ret != 0)
+    {
+      return ret;
+    }
+
+  /* Disable the following modes:
+   *
+   *  - Time triggered communication mode
+   *  - Automatic bus-off management
+   *  - Automatic wake-up mode
+   *  - No automatic retransmission
+   *  - Receive FIFO locked mode
+   *  - Transmit FIFO priority
+   */
+
+  regval   = stm32l4can_getreg(priv, STM32L4_CAN_MCR_OFFSET);
+  regval &= ~(CAN_MCR_TXFP | CAN_MCR_RFLM | CAN_MCR_NART |
+              CAN_MCR_AWUM | CAN_MCR_ABOM | CAN_MCR_TTCM);
+  stm32l4can_putreg(priv, STM32L4_CAN_MCR_OFFSET, regval);
+
+  /* Configure bit timing. */
+
+  ret = stm32l4can_bittiming(priv);
+  if (ret < 0)
+    {
+      canerr("ERROR: Failed to set bit timing: %d\n", ret);
+      return ret;
+    }
+
+  return stm32l4can_exitinitmode(priv);
+}
+
+/****************************************************************************
+ * Name: stm32l4can_filterinit
  *
  * Description:
  *   CAN filter initialization.  CAN filters are not currently used by this
@@ -1466,7 +1898,7 @@ static int can_cellinit(struct stm32l4_can_s *priv)
  *      finer control of the filtering.
  *
  *   There is no need to set up one filter for each CAN since STM32L4 only
- *   contains one CAN devices. If one day some STM32L4 has 2 CANs, then
+ *   contains one CAN device. If one day some STM32L4 has 2 CANs, then
  *   code will have to be imported from the STM32 port.
  *
  *   32-bit IdMask mode is configured.  However, both the ID and the MASK
@@ -1481,74 +1913,170 @@ static int can_cellinit(struct stm32l4_can_s *priv)
  *
  ****************************************************************************/
 
-static int can_filterinit(struct stm32l4_can_s *priv)
+static int stm32l4can_filterinit(FAR struct stm32l4_can_s *priv)
 {
   uint32_t regval;
   uint32_t bitmask;
 
-  canllvdbg("CAN%d filter: %d\n", priv->port, priv->filter);
+  caninfo("CAN%d filter: %d\n", priv->port, priv->filter);
 
   /* Get the bitmask associated with the filter used by this CAN block */
 
-  bitmask = ((uint32_t)1) << priv->filter;
+  bitmask = (uint32_t)1 << priv->filter;
 
   /* Enter filter initialization mode */
 
-  regval  = can_getfreg(priv, STM32L4_CAN_FMR_OFFSET);
+  regval  = stm32l4can_getfreg(priv, STM32L4_CAN_FMR_OFFSET);
   regval |= CAN_FMR_FINIT;
-  can_putfreg(priv, STM32L4_CAN_FMR_OFFSET, regval);
+  stm32l4can_putfreg(priv, STM32L4_CAN_FMR_OFFSET, regval);
 
   /* Disable the filter */
 
-  regval  = can_getfreg(priv, STM32L4_CAN_FA1R_OFFSET);
+  regval  = stm32l4can_getfreg(priv, STM32L4_CAN_FA1R_OFFSET);
   regval &= ~bitmask;
-  can_putfreg(priv, STM32L4_CAN_FA1R_OFFSET, regval);
+  stm32l4can_putfreg(priv, STM32L4_CAN_FA1R_OFFSET, regval);
 
   /* Select the 32-bit scale for the filter */
 
-  regval  = can_getfreg(priv, STM32L4_CAN_FS1R_OFFSET);
+  regval  = stm32l4can_getfreg(priv, STM32L4_CAN_FS1R_OFFSET);
   regval |= bitmask;
-  can_putfreg(priv, STM32L4_CAN_FS1R_OFFSET, regval);
+  stm32l4can_putfreg(priv, STM32L4_CAN_FS1R_OFFSET, regval);
 
-  /* There are 14 or 28 filter banks (depending) on the device.  Each filter bank is
-   * composed of two 32-bit registers, CAN_FiR:
+  /* There are 14 or 28 filter banks (depending) on the device.
+   * Each filter bank is composed of two 32-bit registers, CAN_FiR:
    */
 
-  can_putfreg(priv,  STM32L4_CAN_FIR_OFFSET(priv->filter, 1), 0);
-  can_putfreg(priv,  STM32L4_CAN_FIR_OFFSET(priv->filter, 2), 0);
+  stm32l4can_putfreg(priv, STM32L4_CAN_FIR_OFFSET(priv->filter, 1), 0);
+  stm32l4can_putfreg(priv, STM32L4_CAN_FIR_OFFSET(priv->filter, 2), 0);
 
   /* Set Id/Mask mode for the filter */
 
-  regval  = can_getfreg(priv, STM32L4_CAN_FM1R_OFFSET);
+  regval  = stm32l4can_getfreg(priv, STM32L4_CAN_FM1R_OFFSET);
   regval &= ~bitmask;
-  can_putfreg(priv, STM32L4_CAN_FM1R_OFFSET, regval);
+  stm32l4can_putfreg(priv, STM32L4_CAN_FM1R_OFFSET, regval);
 
   /* Assign FIFO 0 for the filter */
 
-  regval  = can_getfreg(priv, STM32L4_CAN_FFA1R_OFFSET);
+  regval  = stm32l4can_getfreg(priv, STM32L4_CAN_FFA1R_OFFSET);
   regval &= ~bitmask;
-  can_putfreg(priv, STM32L4_CAN_FFA1R_OFFSET, regval);
+  stm32l4can_putfreg(priv, STM32L4_CAN_FFA1R_OFFSET, regval);
 
   /* Enable the filter */
 
-  regval  = can_getfreg(priv, STM32L4_CAN_FA1R_OFFSET);
+  regval  = stm32l4can_getfreg(priv, STM32L4_CAN_FA1R_OFFSET);
   regval |= bitmask;
-  can_putfreg(priv, STM32L4_CAN_FA1R_OFFSET, regval);
+  stm32l4can_putfreg(priv, STM32L4_CAN_FA1R_OFFSET, regval);
 
   /* Exit filter initialization mode */
 
-  regval  = can_getfreg(priv, STM32L4_CAN_FMR_OFFSET);
+  regval  = stm32l4can_getfreg(priv, STM32L4_CAN_FMR_OFFSET);
   regval &= ~CAN_FMR_FINIT;
-  can_putfreg(priv, STM32L4_CAN_FMR_OFFSET, regval);
+  stm32l4can_putfreg(priv, STM32L4_CAN_FMR_OFFSET, regval);
   return OK;
 }
 
+/****************************************************************************
+ * Name: stm32l4can_addextfilter
+ *
+ * Description:
+ *   Add a filter for extended CAN IDs
+ *
+ * Input Parameter:
+ *   priv - A pointer to the private data structure for this CAN block
+ *   arg  - A pointer to a structure describing the filter
+ *
+ * Returned Value:
+ *   A non-negative filter ID is returned on success.
+ *   Otherwise -1 (ERROR) is returned with the errno
+ *   set to indicate the nature of the error.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CAN_EXTID
+static int stm32l4can_addextfilter(FAR struct stm32l4_can_s *priv,
+                                   FAR struct canioc_extfilter_s *arg)
+{
+  return -ENOTTY;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4can_delextfilter
+ *
+ * Description:
+ *   Remove a filter for extended CAN IDs
+ *
+ * Input Parameter:
+ *   priv - A pointer to the private data structure for this CAN block
+ *   arg  - The filter index previously returned by the
+ *            CANIOC_ADD_EXTFILTER command
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success.  Otherwise -1 (ERROR)
+ *   returned with the errno variable set to indicate the
+ *   of the error.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CAN_EXTID
+static int stm32l4can_delextfilter(FAR struct stm32l4_can_s *priv, int arg)
+{
+  return -ENOTTY;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4can_addstdfilter
+ *
+ * Description:
+ *   Add a filter for standard CAN IDs
+ *
+ * Input Parameter:
+ *   priv - A pointer to the private data structure for this CAN block
+ *   arg  - A pointer to a structure describing the filter
+ *
+ * Returned Value:
+ *   A non-negative filter ID is returned on success.
+ *   Otherwise -1 (ERROR) is returned with the errno
+ *   set to indicate the nature of the error.
+ *
+ ****************************************************************************/
+
+static int stm32l4can_addstdfilter(FAR struct stm32l4_can_s *priv,
+                                   FAR struct canioc_stdfilter_s *arg)
+{
+  return -ENOTTY;
+}
+
+/****************************************************************************
+ * Name: stm32l4can_delstdfilter
+ *
+ * Description:
+ *   Remove a filter for standard CAN IDs
+ *
+ * Input Parameter:
+ *   priv - A pointer to the private data structure for this CAN block
+ *   arg  - The filter index previously returned by the
+ *            CANIOC_ADD_STDFILTER command
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success.  Otherwise -1 (ERROR)
+ *   returned with the errno variable set to indicate the
+ *   of the error.
+ *
+ ****************************************************************************/
+
+static int stm32l4can_delstdfilter(FAR struct stm32l4_can_s *priv, int arg)
+{
+  return -ENOTTY;
+}
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: stm32l4_caninitialize
+ * Name: stm32l4can_initialize
  *
  * Description:
  *   Initialize the selected CAN port
@@ -1561,11 +2089,11 @@ static int can_filterinit(struct stm32l4_can_s *priv)
  *
  ****************************************************************************/
 
-FAR struct can_dev_s *stm32l4_caninitialize(int port)
+FAR struct can_dev_s *stm32l4can_initialize(int port)
 {
-  struct can_dev_s *dev = NULL;
+  FAR struct can_dev_s *dev = NULL;
 
-  canvdbg("CAN%d\n", port);
+  caninfo("CAN%d\n", port);
 
   /* NOTE:  Peripherical clocking for CAN1 and/or CAN2 was already provided
    * by stm32l4_clockconfig() early in the reset sequence.
@@ -1588,7 +2116,7 @@ FAR struct can_dev_s *stm32l4_caninitialize(int port)
   else
 #endif
     {
-      candbg("ERROR: Unsupported port %d\n", port);
+      canerr("ERROR: Unsupported port %d\n", port);
       return NULL;
     }
 
diff --git a/arch/arm/src/stm32l4/stm32l4_can.h b/arch/arm/src/stm32l4/stm32l4_can.h
index f9dad5d89fd8efcda29d4d6075b6f06f9b47b1ef..86eb26fb659aec026b9b7040691be85fd37f0bc5 100644
--- a/arch/arm/src/stm32l4/stm32l4_can.h
+++ b/arch/arm/src/stm32l4/stm32l4_can.h
@@ -49,7 +49,7 @@
 #include "chip.h"
 #include "chip/stm32l4_can.h"
 
-#include 
+#include 
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -117,7 +117,7 @@ extern "C"
  ************************************************************************************/
 
 /****************************************************************************
- * Name: stm32l4_caninitialize
+ * Name: stm32l4can_initialize
  *
  * Description:
  *   Initialize the selected CAN port
@@ -131,7 +131,7 @@ extern "C"
  ****************************************************************************/
 
 struct can_dev_s;
-FAR struct can_dev_s *stm32l4_caninitialize(int port);
+FAR struct can_dev_s *stm32l4can_initialize(int port);
 
 #undef EXTERN
 #if defined(__cplusplus)
diff --git a/arch/arm/src/stm32l4/stm32l4_comp.c b/arch/arm/src/stm32l4/stm32l4_comp.c
new file mode 100644
index 0000000000000000000000000000000000000000..518e648639ce8b6e3c26cc24fe20eb02d2e15ac0
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_comp.c
@@ -0,0 +1,316 @@
+/************************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_comp.c
+ *
+ *   Copyright (c) 2017 Gregory Nutt. All rights reserved.
+ *
+ * Based on COMP driver from the Motorola MDK:
+ *
+ *   Copyright (c) 2016 Motorola Mobility, LLC. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include "chip.h"
+#include "stm32l4_comp.h"
+#include "stm32l4_gpio.h"
+#include "up_arch.h"
+
+#include 
+
+#if !(defined(CONFIG_STM32L4_STM32L4X3) || defined(CONFIG_STM32L4_STM32L4X6))
+#  error "Unrecognized STM32 chip"
+#endif
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: modify_csr
+ ************************************************************************************/
+
+static inline void modify_csr(int cmp, uint32_t clearbits, uint32_t setbits)
+{
+  modifyreg32(cmp == STM32L4_COMP1 ? STM32L4_COMP1_CSR : STM32L4_COMP2_CSR,
+              clearbits, setbits);
+}
+
+/************************************************************************************
+ * Name: get_csr
+ ************************************************************************************/
+
+static inline uint32_t get_csr(int cmp)
+{
+  return getreg32(cmp == STM32L4_COMP1 ? STM32L4_COMP1_CSR : STM32L4_COMP2_CSR);
+}
+
+/*************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32l4_compconfig
+ *
+ * Description:
+ *   Configure comparator and I/Os used as comparators inputs
+ *
+ * Parameters:
+ *  cmp - comparator
+ *  cfg - configuration
+ *
+ * Returns:
+ *  0 on success, a negated errno value on failure
+ *
+ ************************************************************************************/
+
+int stm32l4_compconfig(int cmp, const struct stm32l4_comp_config_s *cfg)
+{
+  uint32_t regval = 0;
+  uint32_t mask = 0;
+  uint32_t clearbits;
+  uint32_t setbits;
+
+  /* Input plus */
+
+  mask |= COMP_CSR_INPSEL_MASK;
+  switch (cfg->inp)
+    {
+    case STM32L4_COMP_INP_PIN_1:
+      stm32l4_configgpio(cmp == STM32L4_COMP1 ? GPIO_COMP1_INP_1 : GPIO_COMP2_INP_1);
+      regval |= COMP_CSR_INPSEL_PIN1;
+      break;
+
+    case STM32L4_COMP_INP_PIN_2:
+      stm32l4_configgpio(cmp == STM32L4_COMP1 ? GPIO_COMP1_INP_2 : GPIO_COMP2_INP_2);
+      regval |= COMP_CSR_INPSEL_PIN2;
+      break;
+
+#if defined(CONFIG_STM32L4_STM32L4X3)
+    case STM32L4_COMP_INP_PIN_3:
+      stm32l4_configgpio(cmp == STM32L4_COMP1 ? GPIO_COMP1_INP_3 : GPIO_COMP2_INP_3);
+      regval |= COMP_CSR_INPSEL_PIN3;
+      break;
+#endif
+
+    default:
+      return -EINVAL;
+    }
+
+  /* Input minus */
+
+  mask |= COMP_CSR_INMSEL_MASK;
+  switch (cfg->inm)
+    {
+    case STM32L4_COMP_INM_1_4_VREF:
+      regval |= COMP_CSR_INMSEL_25PCT;
+      mask   |= (COMP_CSR_SCALEN | COMP_CSR_BRGEN);
+      regval |= (COMP_CSR_SCALEN | COMP_CSR_BRGEN);
+      break;
+
+    case STM32L4_COMP_INM_1_2_VREF:
+      regval |= COMP_CSR_INMSEL_50PCT;
+      mask   |= (COMP_CSR_SCALEN | COMP_CSR_BRGEN);
+      regval |= (COMP_CSR_SCALEN | COMP_CSR_BRGEN);
+      break;
+
+    case STM32L4_COMP_INM_3_4_VREF:
+      regval |= COMP_CSR_INMSEL_75PCT;
+      mask   |= (COMP_CSR_SCALEN | COMP_CSR_BRGEN);
+      regval |= (COMP_CSR_SCALEN | COMP_CSR_BRGEN);
+      break;
+
+    case STM32L4_COMP_INM_VREF:
+      regval |= COMP_CSR_INMSEL_VREF;
+      mask   |= (COMP_CSR_SCALEN | COMP_CSR_BRGEN);
+      regval |= COMP_CSR_SCALEN;
+      break;
+
+    case STM32L4_COMP_INM_DAC_1:
+      regval |= COMP_CSR_INMSEL_DAC1;
+      break;
+
+    case STM32L4_COMP_INM_DAC_2:
+      regval |= COMP_CSR_INMSEL_DAC2;
+      break;
+
+  case STM32L4_COMP_INM_PIN_1:
+      stm32l4_configgpio(cmp == STM32L4_COMP1 ? GPIO_COMP1_INM_1 : GPIO_COMP2_INM_1);
+      regval |= COMP_CSR_INMSEL_PIN1;
+      break;
+
+  case STM32L4_COMP_INM_PIN_2:
+      stm32l4_configgpio(cmp == STM32L4_COMP1 ? GPIO_COMP1_INM_2 : GPIO_COMP2_INM_2);
+#if defined(CONFIG_STM32L4_STM32L4X6)
+      regval |= COMP_CSR_INMSEL_PIN2;
+#else
+      regval |= COMP_CSR_INMSEL_INMESEL;
+      mask   |= COMP_CSR_INMESEL_MASK;
+      regval |= COMP_CSR_INMSEL_PIN2;
+#endif
+      break;
+
+#if defined(CONFIG_STM32L4_STM32L4X3)
+    case STM32L4_COMP_INM_PIN_3:
+      stm32l4_configgpio(cmp == STM32L4_COMP1 ? GPIO_COMP1_INM_3 : GPIO_COMP2_INM_3);
+      regval |= COMP_CSR_INMSEL_INMESEL;
+      mask   |= COMP_CSR_INMESEL_MASK;
+      regval |= COMP_CSR_INMSEL_PIN3;
+      break;
+
+    case STM32L4_COMP_INM_PIN_4:
+      stm32l4_configgpio(cmp == STM32L4_COMP1 ? GPIO_COMP1_INM_4 : GPIO_COMP2_INM_4);
+      regval |= COMP_CSR_INMSEL_INMESEL;
+      mask   |= COMP_CSR_INMESEL_MASK;
+      regval |= COMP_CSR_INMSEL_PIN4;
+      break;
+
+    case STM32L4_COMP_INM_PIN_5:
+      stm32l4_configgpio(cmp == STM32L4_COMP1 ? GPIO_COMP1_INM_5 : GPIO_COMP2_INM_5);
+      regval |= COMP_CSR_INMSEL_INMESEL;
+      mask   |= COMP_CSR_INMESEL_MASK;
+      regval |= COMP_CSR_INMSEL_PIN5;
+      break;
+
+#endif
+    default:
+      return -EINVAL;
+    }
+
+  /* Hysteresis */
+
+  mask |= COMP_CSR_HYST_MASK;
+  switch (cfg->hyst)
+    {
+    case STM32L4_COMP_HYST_NONE:
+      regval |= COMP_CSR_HYST_NONE;
+      break;
+
+    case STM32L4_COMP_HYST_LOW:
+      regval |= COMP_CSR_HYST_LOW;
+      break;
+
+    case STM32L4_COMP_HYST_MEDIUM:
+      regval |= COMP_CSR_HYST_MEDIUM;
+      break;
+
+    case STM32L4_COMP_HYST_HIGH:
+      regval |= COMP_CSR_HYST_HIGH;
+      break;
+
+    default:
+      return -EINVAL;
+    }
+
+  /* Power/speed Mode */
+
+  mask |= COMP_CSR_PWRMODE_MASK;
+  switch(cfg->speed)
+    {
+    case STM32L4_COMP_SPEED_HIGH:
+      regval |= COMP_CSR_PWRMODE_HIGH;
+      break;
+
+    case STM32L4_COMP_SPEED_MEDIUM:
+      regval |= COMP_CSR_PWRMODE_MEDIUM;
+      break;
+
+    case STM32L4_COMP_SPEED_LOW:
+      regval |= COMP_CSR_PWRMODE_LOW;
+      break;
+
+    default:
+      return -EINVAL;
+    }
+
+  /* Polarity */
+
+  mask |= COMP_CSR_POLARITY_MASK;
+  if (cfg->inverted)
+    {
+        regval |= COMP_CSR_POLARITY_INVERT;
+    }
+
+  /* Disable blanking */
+
+  mask   |= COMP_CSR_BLANK_MASK;
+  regval |= COMP_CSR_BLANK_NONE;
+
+  clearbits = regval ^ mask;
+  setbits = regval;
+
+  modify_csr(cmp, clearbits, setbits);
+  return 0;
+}
+
+/************************************************************************************
+ * Name: stm32l4_compenable
+ *
+ * Description:
+ *   Enable/disable comparator
+ *
+ * Parameters:
+ *  cmp - comparator
+ *  cfg - enable/disable flag
+ *
+ * Returns:
+ *  0 on success, a negated errno value on failure
+ *
+ ************************************************************************************/
+
+int stm32l4_compenable(int cmp, bool en)
+{
+  uint32_t clearbits = en ? 0 : COMP_CSR_EN;
+  uint32_t setbits = en ? COMP_CSR_EN : 0;
+
+  modify_csr(cmp, clearbits, setbits);
+  return 0;
+}
+
+/************************************************************************************
+ * Name: stm32l4_compread
+ *
+ * Description:
+ *   Read comparator output
+ *
+ * Parameters:
+ *  - cmp: comparator
+ *
+ * Returns:
+ *  true for high, false for low
+ *
+ ************************************************************************************/
+
+bool stm32l4_compread(int cmp)
+{
+  return !!(get_csr(cmp) & COMP_CSR_VALUE);
+}
diff --git a/arch/arm/src/stm32l4/stm32l4_comp.h b/arch/arm/src/stm32l4/stm32l4_comp.h
new file mode 100644
index 0000000000000000000000000000000000000000..eecede715b2a4c63d0a411a05ac59bfc790e8a93
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_comp.h
@@ -0,0 +1,221 @@
+/************************************************************************************
+ * arch/arm/src/stm32/stm32l4_comp.h
+ *
+ * Copyright (c) 2016 Motorola Mobility, LLC.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32L4_STM32L4_COMP_H
+#define __ARCH_ARM_SRC_STM32L4_STM32L4_COMP_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+
+#include "chip/stm32l4_comp.h"
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+#if defined(CONFIG_STM32L4_STM32L4X3)
+/* Comparators */
+
+enum stm32l4_comp_e
+{
+  STM32L4_COMP1,
+  STM32L4_COMP2,
+  STM32L4_COMP_NUM  /* Number of comparators */
+};
+
+/* Plus input */
+
+enum stm32l4_comp_inp_e
+{
+  STM32L4_COMP_INP_PIN_1,   /* COMP1: PC5, COMP2: PB4 */
+  STM32L4_COMP_INP_PIN_2,   /* COMP1: PB2, COMP2: PB6 */
+  STM32L4_COMP_INP_PIN_3    /* COMP1: PA1, COMP2: PA3 */
+};
+
+/* Minus input */
+
+enum stm32l4_comp_inm_e
+{
+  STM32L4_COMP_INM_1_4_VREF,
+  STM32L4_COMP_INM_1_2_VREF,
+  STM32L4_COMP_INM_3_4_VREF,
+  STM32L4_COMP_INM_VREF,
+  STM32L4_COMP_INM_DAC_1,
+  STM32L4_COMP_INM_DAC_2,
+  STM32L4_COMP_INM_PIN_1,   /* COMP1: PB1, COMP2: PB3 */
+  STM32L4_COMP_INM_PIN_2,   /* COMP1: PC4, COMP2: PB7 */
+  STM32L4_COMP_INM_PIN_3,   /* COMP1: PA0, COMP2: PA2 */
+  STM32L4_COMP_INM_PIN_4,   /* COMP1: PA4, COMP2: PA4 */
+  STM32L4_COMP_INM_PIN_5    /* COMP1: PA5, COMP2: PA5 */
+};
+
+#elif defined(CONFIG_STM32L4_STM32L4X6)
+/* Comparators */
+
+enum stm32l4_comp_e
+{
+  STM32L4_COMP1,
+  STM32L4_COMP2,
+  STM32L4_COMP_NUM  /* Number of comparators */
+};
+
+/* Plus input */
+
+enum stm32l4_comp_inp_e
+{
+  STM32L4_COMP_INP_PIN_1,   /* COMP1: PC5, COMP2: PB4 */
+  STM32L4_COMP_INP_PIN_2    /* COMP1: PB2, COMP2: PB6 */
+};
+
+/* Minus input */
+
+enum stm32l4_comp_inm_e
+{
+  STM32L4_COMP_INM_1_4_VREF,
+  STM32L4_COMP_INM_1_2_VREF,
+  STM32L4_COMP_INM_3_4_VREF,
+  STM32L4_COMP_INM_VREF,
+  STM32L4_COMP_INM_DAC_1,
+  STM32L4_COMP_INM_DAC_2,
+  STM32L4_COMP_INM_PIN_1,   /* COMP1: PB1, COMP2: PB3 */
+  STM32L4_COMP_INM_PIN_2    /* COMP1: PC4, COMP2: PB7 */
+};
+#endif
+
+/* Hysteresis */
+
+enum stm32l4_comp_hyst_e
+{
+  STM32L4_COMP_HYST_NONE,
+  STM32L4_COMP_HYST_LOW,
+  STM32L4_COMP_HYST_MEDIUM,
+  STM32L4_COMP_HYST_HIGH
+};
+
+/* Power/Speed Modes */
+
+enum stm32l4_comp_speed_e
+{
+  STM32L4_COMP_SPEED_HIGH,
+  STM32L4_COMP_SPEED_MEDIUM,
+  STM32L4_COMP_SPEED_LOW
+};
+
+/* Comparator configuration ***********************************************************/
+
+struct stm32l4_comp_config_s
+{
+  uint8_t inp;                /* Plus input pin (see enum stm32l4_comp_inp_e) */
+  uint8_t inm;                /* Minus input pin (see enum stm32l4_comp_inm_e) */
+  uint8_t hyst;               /* Hysteresis (see enum stm32l4_comp_hyst_e) */
+  uint8_t speed;              /* Speed (see stm32l4_comp_speed_e) */
+  bool inverted;              /* Invert output? */
+};
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Name: stm32l4_compconfig
+ *
+ * Description:
+ *   Configure comparator and I/Os used as comparators inputs
+ *
+ * Parameters:
+ *  cmp - comparator
+ *  cfg - configuration
+ *
+ * Returns:
+ *  0 on success, a negated errno value on failure
+ *
+ ************************************************************************************/
+
+int stm32l4_compconfig(int cmp, const struct stm32l4_comp_config_s *cfg);
+
+/************************************************************************************
+ * Name: stm32l4_compenable
+ *
+ * Description:
+ *   Enable/disable comparator
+ *
+ * Parameters:
+ *  cmp - comparator
+ *  cfg - enable/disable flag
+ *
+ * Returns:
+ *  0 on success, a negated errno value on failure
+ *
+ ************************************************************************************/
+
+int stm32l4_compenable(int cmp, bool en);
+
+/************************************************************************************
+ * Name: stm32l4_compread
+ *
+ * Description:
+ *   Read comparator output
+ *
+ * Parameters:
+ *  - cmp: comparator
+ *
+ * Returns:
+ *  true for high, false for low
+ *
+ ************************************************************************************/
+
+bool stm32l4_compread(int cmp);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ARCH_ARM_SRC_STM32L4_STM32L4_COMP_H */
diff --git a/arch/arm/src/stm32l4/stm32l4_dma.h b/arch/arm/src/stm32l4/stm32l4_dma.h
index ee11f8655c51bd08e8a975b45d77ec7e00cad7c9..c5ccf60b29d635c967af82f4ad0e7ce137602857 100644
--- a/arch/arm/src/stm32l4/stm32l4_dma.h
+++ b/arch/arm/src/stm32l4/stm32l4_dma.h
@@ -90,7 +90,7 @@ typedef FAR void *DMA_HANDLE;
 
 typedef void (*dma_callback_t)(DMA_HANDLE handle, uint8_t status, void *arg);
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 struct stm32l4_dmaregs_s
 {
   uint32_t isr;       /* Interrupt Status Register; each channel gets 4 bits */
@@ -267,7 +267,7 @@ bool stm32l4_dmacapable(uintptr_t maddr, uint32_t count, uint32_t ccr);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void stm32l4_dmasample(DMA_HANDLE handle, struct stm32l4_dmaregs_s *regs);
 #else
 #  define stm32l4_dmasample(handle,regs)
@@ -284,7 +284,7 @@ void stm32l4_dmasample(DMA_HANDLE handle, struct stm32l4_dmaregs_s *regs);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void stm32l4_dmadump(DMA_HANDLE handle, const struct stm32l4_dmaregs_s *regs,
                    const char *msg);
 #else
diff --git a/arch/arm/src/stm32l4/stm32l4_dumpgpio.c b/arch/arm/src/stm32l4/stm32l4_dumpgpio.c
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..c0eabb206c99c5f5d814b1293116b333a31077a5 100644
--- a/arch/arm/src/stm32l4/stm32l4_dumpgpio.c
+++ b/arch/arm/src/stm32l4/stm32l4_dumpgpio.c
@@ -0,0 +1,153 @@
+/****************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_dumpgpio.c
+ *
+ *   Copyright (C) 2016 Sebastien Lorquet. All rights reserved.
+ *   Author: Sebastien Lorquet 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/* Output debug info even if debug output is not selected. */
+
+#undef  CONFIG_DEBUG_INFO
+#define CONFIG_DEBUG_INFO 1
+
+#include 
+#include 
+
+#include 
+
+#include "up_arch.h"
+#include "chip.h"
+#include "stm32l4_gpio.h"
+#include "stm32l4_rcc.h"
+
+#ifdef CONFIG_DEBUG_FEATURES
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+/* Port letters for prettier debug output */
+
+static const char g_portchar[STM32L4_NPORTS] =
+{
+#if STM32L4_NPORTS > 11
+#  error "Additional support required for this number of GPIOs"
+#elif STM32L4_NPORTS > 10
+  'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I', 'J', 'K'
+#elif STM32L4_NPORTS > 9
+  'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I', 'J'
+#elif STM32L4_NPORTS > 8
+  'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I'
+#elif STM32L4_NPORTS > 7
+  'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H'
+#elif STM32L4_NPORTS > 6
+  'A', 'B', 'C', 'D', 'E', 'F', 'G'
+#elif STM32L4_NPORTS > 5
+  'A', 'B', 'C', 'D', 'E', 'F'
+#elif STM32L4_NPORTS > 4
+  'A', 'B', 'C', 'D', 'E'
+#elif STM32L4_NPORTS > 3
+  'A', 'B', 'C', 'D'
+#elif STM32L4_NPORTS > 2
+  'A', 'B', 'C'
+#elif STM32L4_NPORTS > 1
+  'A', 'B'
+#elif STM32L4_NPORTS > 0
+  'A'
+#else
+#  error "Bad number of GPIOs"
+#endif
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  stm32l4_dumpgpio
+ *
+ * Description:
+ *   Dump all GPIO registers associated with the provided base address
+ *
+ ****************************************************************************/
+
+int stm32l4_dumpgpio(uint32_t pinset, const char *msg)
+{
+  irqstate_t   flags;
+  uint32_t     base;
+  unsigned int port;
+
+  /* Get the base address associated with the GPIO port */
+
+  port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
+  base = g_gpiobase[port];
+
+  /* The following requires exclusive access to the GPIO registers */
+
+  flags = enter_critical_section();
+
+  DEBUGASSERT(port < STM32L4_NPORTS);
+
+  _info("GPIO%c pinset: %08x base: %08x -- %s\n",
+        g_portchar[port], pinset, base, msg);
+
+  if ((getreg32(STM32L4_RCC_AHB1ENR) & RCC_AHB1ENR_GPIOEN(port)) != 0)
+    {
+      _info(" MODE: %08x OTYPE: %04x     OSPEED: %08x PUPDR: %08x\n",
+            getreg32(base + STM32L4_GPIO_MODER_OFFSET),
+            getreg32(base + STM32L4_GPIO_OTYPER_OFFSET),
+            getreg32(base + STM32L4_GPIO_OSPEED_OFFSET),
+            getreg32(base + STM32L4_GPIO_PUPDR_OFFSET));
+      _info("  IDR: %04x       ODR: %04x       BSRR: %08x  LCKR: %04x\n",
+            getreg32(base + STM32L4_GPIO_IDR_OFFSET),
+            getreg32(base + STM32L4_GPIO_ODR_OFFSET),
+            getreg32(base + STM32L4_GPIO_BSRR_OFFSET),
+            getreg32(base + STM32L4_GPIO_LCKR_OFFSET));
+      _info(" AFRH: %08x  AFRL: %08x\n",
+            getreg32(base + STM32L4_GPIO_AFRH_OFFSET),
+            getreg32(base + STM32L4_GPIO_AFRL_OFFSET));
+    }
+  else
+    {
+      _info("  GPIO%c not enabled: AHB1ENR: %08x\n",
+            g_portchar[port], getreg32(STM32L4_RCC_AHB1ENR));
+    }
+
+  leave_critical_section(flags);
+  return OK;
+}
+
+#endif /* CONFIG_DEBUG_FEATURES */
diff --git a/arch/arm/src/stm32l4/stm32l4_exti.h b/arch/arm/src/stm32l4/stm32l4_exti.h
index 87dbd78c25506963cf1e2830bb347ed2cd513c01..2f57229ea213222a067cb1ff83a2a47b98fa4b36 100644
--- a/arch/arm/src/stm32l4/stm32l4_exti.h
+++ b/arch/arm/src/stm32l4/stm32l4_exti.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * arch/arm/src/stm32l4/stm32l4_exti.h
  *
- *   Copyright (C) 2009, 2012, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2012, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -72,23 +72,24 @@ extern "C"
  * Description:
  *   Sets/clears GPIO based event and interrupt triggers.
  *
- * Parameters:
- *  - pinset: gpio pin configuration
- *  - rising/falling edge: enables
- *  - event:  generate event when set
- *  - func:   when non-NULL, generate interrupt
+ * Input Parameters:
+ *  pinset      - GPIO pin configuration
+ *  risingedge  - Enables interrupt on rising edges
+ *  fallingedge - Enables interrupt on falling edges
+ *  event       - Generate event when set
+ *  func        - When non-NULL, generate interrupt
+ *  arg         - Argument passed to the interrupt callback
  *
- * Returns:
- *  The previous value of the interrupt handler function pointer.  This value may,
- *  for example, be used to restore the previous handler when multiple handlers are
- *  used.
+ * Returned Value:
+ *  Zero (OK) is returned on success, otherwise a negated errno value is returned
+ *  to indicate the nature of the failure.
  *
  ************************************************************************************/
 
-xcpt_t stm32l4_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
-                          bool event, xcpt_t func);
+int stm32l4_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
+                         bool event, xcpt_t func, void *arg);
 
-/************************************************************************************
+/****************************************************************************
  * Name: stm32l4_exti_alarm
  *
  * Description:
@@ -98,16 +99,41 @@ xcpt_t stm32l4_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
  *  - rising/falling edge: enables interrupt on rising/falling edges
  *  - event:  generate event when set
  *  - func:   when non-NULL, generate interrupt
+ *  - arg:    Argument passed to the interrupt callback
  *
  * Returns:
- *   The previous value of the interrupt handler function pointer.  This value may,
- *   for example, be used to restore the previous handler when multiple handlers are
- *   used.
+ *   Zero (OK) on success; a negated errno value on failure indicating the
+ *   nature of the failure.
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 #ifdef CONFIG_RTC_ALARM
-xcpt_t stm32l4_exti_alarm(bool risingedge, bool fallingedge, bool event, xcpt_t func);
+int stm32l4_exti_alarm(bool risingedge, bool fallingedge, bool event,
+                       xcpt_t func, void *arg);
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_exti_comp
+ *
+ * Description:
+ *   Sets/clears comparator based events and interrupt triggers.
+ *
+ * Parameters:
+ *  - cmp: comparator
+ *  - rising/falling edge: enables interrupt on rising/falling edget
+ *  - event:  generate event when set
+ *  - func:   when non-NULL, generate interrupt
+ *  - arg:    Argument passed to the interrupt callback
+ *
+ * Returns:
+ *   Zero (OK) returned on success; a negated errno value is returned on
+ *   failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32L4_COMP
+int stm32l4_exti_comp(int cmp, bool risingedge, bool fallingedge,
+                      bool event, xcpt_t func, void *arg);
 #endif
 
 #undef EXTERN
diff --git a/arch/arm/src/stm32l4/stm32l4_exti_alarm.c b/arch/arm/src/stm32l4/stm32l4_exti_alarm.c
index c71d9752837a4079bd51774e3ce56827174876ef..d4fbfd6c039c2d5fd207c17296d3f53221ea56cc 100644
--- a/arch/arm/src/stm32l4/stm32l4_exti_alarm.c
+++ b/arch/arm/src/stm32l4/stm32l4_exti_alarm.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32l4/stm32l4_exti_alarm.c
  *
- *   Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *           Diego Sanchez 
  *           dev@ziggurat29.com (adaptation to stm32l4)
@@ -60,7 +60,8 @@
 
 /* Interrupt handlers attached to the ALARM EXTI */
 
-static xcpt_t stm32l4_exti_callback;
+static xcpt_t g_alarm_callback;
+static void  *g_callback_arg;
 
 /****************************************************************************
  * Private Functions
@@ -74,15 +75,15 @@ static xcpt_t stm32l4_exti_callback;
  *
  ****************************************************************************/
 
-static int stm32l4_exti_alarm_isr(int irq, void *context)
+static int stm32l4_exti_alarm_isr(int irq, void *context, FAR void *arg)
 {
   int ret = OK;
 
   /* Dispatch the interrupt to the handler */
 
-  if (stm32l4_exti_callback)
+  if (g_alarm_callback != NULL)
     {
-      ret = stm32l4_exti_callback(irq, context);
+      ret = g_alarm_callback(irq, context, g_callback_arg);
     }
 
   /* Clear the pending EXTI interrupt */
@@ -108,27 +109,24 @@ static int stm32l4_exti_alarm_isr(int irq, void *context)
  *  - func:   when non-NULL, generate interrupt
  *
  * Returns:
- *   The previous value of the interrupt handler function pointer.  This
- *   value may, for example, be used to restore the previous handler when
- *   multiple handlers are used.
+ *   Zero (OK) on success; a negated errno value on failure indicating the
+ *   nature of the failure.
  *
  ****************************************************************************/
 
-xcpt_t stm32l4_exti_alarm(bool risingedge, bool fallingedge, bool event,
-                        xcpt_t func)
+int stm32l4_exti_alarm(bool risingedge, bool fallingedge, bool event,
+                       xcpt_t func, void *arg)
 {
-  xcpt_t oldhandler;
-
   /* Get the previous GPIO IRQ handler; Save the new IRQ handler. */
 
-  oldhandler          = stm32l4_exti_callback;
-  stm32l4_exti_callback = func;
+  g_alarm_callback = func;
+  g_callback_arg   = arg;
 
   /* Install external interrupt handlers (if not already attached) */
 
   if (func)
     {
-      irq_attach(STM32L4_IRQ_RTCALRM, stm32l4_exti_alarm_isr);
+      irq_attach(STM32L4_IRQ_RTCALRM, stm32l4_exti_alarm_isr, NULL);
       up_enable_irq(STM32L4_IRQ_RTCALRM);
     }
   else
@@ -156,5 +154,5 @@ xcpt_t stm32l4_exti_alarm(bool risingedge, bool fallingedge, bool event,
 
   /* Return the old IRQ handler */
 
-  return oldhandler;
+  return OK;
 }
diff --git a/arch/arm/src/stm32l4/stm32l4_exti_comp.c b/arch/arm/src/stm32l4/stm32l4_exti_comp.c
new file mode 100644
index 0000000000000000000000000000000000000000..a1295b6970b714ec22d93a24fc32c791b00dedb9
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_exti_comp.c
@@ -0,0 +1,180 @@
+/****************************************************************************
+ * arch/arm/src/stm32/stm32l4_exti_comp.c
+ *
+ *   Copyright (c) 2017 Gregory Nutt. All rights reserved
+ *   Copyright (c) 2016 Motorola Mobility, LLC. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include "up_arch.h"
+#include "stm32l4_comp.h"
+#include "stm32l4_exti.h"
+#include "chip/stm32l4_exti.h"
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct comp_callback_s
+{
+  xcpt_t callback;
+  void  *arg;
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Interrupt handlers attached to the COMP EXTI lines */
+
+static struct comp_callback_s g_comp_handlers[STM32L4_COMP_NUM];
+
+/* Comparator EXTI lines */
+
+static const uint32_t g_comp_lines[STM32L4_COMP_NUM] =
+{
+#if defined(CONFIG_STM32L4_STM32L4X3) || defined (CONFIG_STM32L4_STM32L4X6)
+  EXTI1_COMP1,
+  EXTI1_COMP2
+#else
+#  error "Unrecognized STM32L4 chip"
+#endif
+};
+
+ /****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+static int stm32l4_exti_comp_isr(int irq, void *context)
+{
+  uint32_t pr;
+  uint32_t ln;
+  int ret = 0;
+  int i;
+
+  /* Examine the state of each comparator line and dispatch interrupts */
+
+  pr = getreg32(STM32L4_EXTI1_PR);
+  for (i = 0; i < STM32L4_COMP_NUM; i++)
+    {
+      ln = g_comp_lines[i];
+      if ((pr & ln) != 0)
+        {
+          /* Clear the pending interrupt */
+
+          putreg32(ln, STM32L4_EXTI1_PR);
+          if (g_comp_handlers[i].callback != NULL)
+            {
+              xcpt_t callback = g_comp_handlers[i].callback;
+              vid   *arg      = g_comp_handlers[i].arg;
+              ret = callback(irq, context, arg);
+            }
+        }
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_exti_comp
+ *
+ * Description:
+ *   Sets/clears comparator based events and interrupt triggers.
+ *
+ * Parameters:
+ *  - cmp: comparator
+ *  - rising/falling edge: enables interrupt on rising/falling edget
+ *  - event:  generate event when set
+ *  - func:   when non-NULL, generate interrupt
+ *  - arg:    Argument passed to the interrupt callback
+ *
+ * Returns:
+ *   Zero (OK) returned on success; a negated errno value is returned on
+ *   failure.
+ *
+ ****************************************************************************/
+
+int stm32l4_exti_comp(int cmp, bool risingedge, bool fallingedge,
+                      bool event, xcpt_t func, void *arg)
+{
+  irqstate_t flags;
+  uint32_t ln = g_comp_lines[cmp];
+
+ /* Perform the following within a critical section so that the handler gets
+  * installed correctly before the next interrupt is received.
+  */
+
+  flags = enter_critical_section();
+
+  /* Install external interrupt handlers */
+
+  if (func != NULL)
+    {
+      irq_attach(STM32L4_IRQ_COMP, stm32l4_exti_comp_isr, NULL);
+      up_enable_irq(STM32L4_IRQ_COMP);
+    }
+  else
+    {
+      up_disable_irq(STM32L4_IRQ_COMP);
+    }
+
+    /* Configure rising/falling edges */
+
+    modifyreg32(STM32L4_EXTI1_RTSR, risingedge  ? 0 : ln, risingedge  ? ln : 0);
+    modifyreg32(STM32L4_EXTI1_FTSR, fallingedge ? 0 : ln, fallingedge ? ln : 0);
+
+    /* Enable Events and Interrupts */
+
+    modifyreg32(STM32L4_EXTI1_EMR, event ? 0 : ln, event ? ln : 0);
+    modifyreg32(STM32L4_EXTI1_IMR, func  ? 0 : ln, func  ? ln : 0);
+
+    /* Get the previous IRQ handler and save the new IRQ handler. */
+
+    g_comp_handlers[cmp].callback = func;
+    g_comp_handlers[cmp].arg      = arg;
+
+    /* Leave the critical section */
+
+    leave_critical_section(flags);
+    return OK;
+}
diff --git a/arch/arm/src/stm32l4/stm32l4_exti_gpio.c b/arch/arm/src/stm32l4/stm32l4_exti_gpio.c
index ede05e83221963110e1e4bb108b51e2a3e54c2ff..da7eb4e19aaaa81a7782ae4f9c7b4035fbff7779 100644
--- a/arch/arm/src/stm32l4/stm32l4_exti_gpio.c
+++ b/arch/arm/src/stm32l4/stm32l4_exti_gpio.c
@@ -55,13 +55,23 @@
 #include "stm32l4_gpio.h"
 #include "stm32l4_exti.h"
 
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct gpio_callback_s
+{
+  xcpt_t callback;   /* Callback entry point */
+  void  *arg;        /* The argument that accompanies the callback */
+};
+
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
 /* Interrupt handlers attached to each EXTI */
 
-static xcpt_t stm32l4_exti_callbacks[16];
+static struct gpio_callback_s g_gpio_handlers[16];
 
 /****************************************************************************
  * Private Functions
@@ -71,7 +81,7 @@ static xcpt_t stm32l4_exti_callbacks[16];
  * Interrupt Service Routines - Dispatchers
  ****************************************************************************/
 
-static int stm32l4_exti0_isr(int irq, void *context)
+static int stm32l4_exti0_isr(int irq, void *context, FAR void *arg)
 {
   int ret = OK;
 
@@ -81,15 +91,18 @@ static int stm32l4_exti0_isr(int irq, void *context)
 
   /* And dispatch the interrupt to the handler */
 
-  if (stm32l4_exti_callbacks[0])
+  if (g_gpio_handlers[0].callback != NULL)
     {
-      ret = stm32l4_exti_callbacks[0](irq, context);
+      xcpt_t callback = g_gpio_handlers[0].callback;
+      void  *cbarg    = g_gpio_handlers[0].arg;
+
+      ret = callback(irq, context, cbarg);
     }
 
   return ret;
 }
 
-static int stm32l4_exti1_isr(int irq, void *context)
+static int stm32l4_exti1_isr(int irq, void *context, FAR void *arg)
 {
   int ret = OK;
 
@@ -99,15 +112,18 @@ static int stm32l4_exti1_isr(int irq, void *context)
 
   /* And dispatch the interrupt to the handler */
 
-  if (stm32l4_exti_callbacks[1])
+  if (g_gpio_handlers[1].callback != NULL)
     {
-      ret = stm32l4_exti_callbacks[1](irq, context);
+      xcpt_t callback = g_gpio_handlers[1].callback;
+      void  *cbarg    = g_gpio_handlers[1].arg;
+
+      ret = callback(irq, context, cbarg);
     }
 
   return ret;
 }
 
-static int stm32l4_exti2_isr(int irq, void *context)
+static int stm32l4_exti2_isr(int irq, void *context, FAR void *arg)
 {
   int ret = OK;
 
@@ -117,15 +133,18 @@ static int stm32l4_exti2_isr(int irq, void *context)
 
   /* And dispatch the interrupt to the handler */
 
-  if (stm32l4_exti_callbacks[2])
+  if (g_gpio_handlers[2].callback != NULL)
     {
-      ret = stm32l4_exti_callbacks[2](irq, context);
+      xcpt_t callback = g_gpio_handlers[2].callback;
+      void  *cbarg    = g_gpio_handlers[2].arg;
+
+      ret = callback(irq, context, cbarg);
     }
 
   return ret;
 }
 
-static int stm32l4_exti3_isr(int irq, void *context)
+static int stm32l4_exti3_isr(int irq, void *context, FAR void *arg)
 {
   int ret = OK;
 
@@ -135,15 +154,18 @@ static int stm32l4_exti3_isr(int irq, void *context)
 
   /* And dispatch the interrupt to the handler */
 
-  if (stm32l4_exti_callbacks[3])
+  if (g_gpio_handlers[3].callback != NULL)
     {
-      ret = stm32l4_exti_callbacks[3](irq, context);
+      xcpt_t callback = g_gpio_handlers[3].callback;
+      void  *cbarg    = g_gpio_handlers[3].arg;
+
+      ret = callback(irq, context, cbarg);
     }
 
   return ret;
 }
 
-static int stm32l4_exti4_isr(int irq, void *context)
+static int stm32l4_exti4_isr(int irq, void *context, FAR void *arg)
 {
   int ret = OK;
 
@@ -153,15 +175,18 @@ static int stm32l4_exti4_isr(int irq, void *context)
 
   /* And dispatch the interrupt to the handler */
 
-  if (stm32l4_exti_callbacks[4])
+  if (g_gpio_handlers[4].callback != NULL)
     {
-      ret = stm32l4_exti_callbacks[4](irq, context);
+      xcpt_t callback = g_gpio_handlers[4].callback;
+      void  *cbarg    = g_gpio_handlers[4].arg;
+
+      ret = callback(irq, context, cbarg);
     }
 
   return ret;
 }
 
-static int stm32l4_exti_multiisr(int irq, void *context, int first, int last)
+static int stm32l4_exti_multiisr(int irq, void *context, void *arg, int first, int last)
 {
   uint32_t pr;
   int pin;
@@ -186,10 +211,14 @@ static int stm32l4_exti_multiisr(int irq, void *context, int first, int last)
 
           /* And dispatch the interrupt to the handler */
 
-          if (stm32l4_exti_callbacks[pin])
+          if (g_gpio_handlers[pin].callback != NULL)
             {
-              int tmp = stm32l4_exti_callbacks[pin](irq, context);
-              if (tmp != OK)
+              xcpt_t callback = g_gpio_handlers[pin].callback;
+              void  *cbarg    = g_gpio_handlers[pin].arg;
+              int tmp;
+
+              tmp = callback(irq, context, cbarg);
+              if (tmp < 0)
                 {
                   ret = tmp;
                 }
@@ -200,14 +229,14 @@ static int stm32l4_exti_multiisr(int irq, void *context, int first, int last)
   return ret;
 }
 
-static int stm32l4_exti95_isr(int irq, void *context)
+static int stm32l4_exti95_isr(int irq, void *context, void *arg)
 {
-  return stm32l4_exti_multiisr(irq, context, 5, 9);
+  return stm32l4_exti_multiisr(irq, context, arg, 5, 9);
 }
 
-static int stm32l4_exti1510_isr(int irq, void *context)
+static int stm32l4_exti1510_isr(int irq, void *context, FAR void *arg)
 {
-  return stm32l4_exti_multiisr(irq, context, 10, 15);
+  return stm32l4_exti_multiisr(irq, context, arg, 10, 15);
 }
 
 /****************************************************************************
@@ -220,30 +249,32 @@ static int stm32l4_exti1510_isr(int irq, void *context)
  * Description:
  *   Sets/clears GPIO based event and interrupt triggers.
  *
- * Parameters:
- *  - pinset:      GPIO pin configuration
- *  - risingedge:  Enables interrupt on rising edges
- *  - fallingedge: Enables interrupt on falling edges
- *  - event:       Generate event when set
- *  - func:        When non-NULL, generate interrupt
+ * Description:
+ *   Sets/clears GPIO based event and interrupt triggers.
  *
- * Returns:
- *   The previous value of the interrupt handler function pointer.  This
- *   value may, for example, be used to restore the previous handler when
- *   multiple handlers are used.
+ * Input Parameters:
+ *  pinset      - GPIO pin configuration
+ *  risingedge  - Enables interrupt on rising edges
+ *  fallingedge - Enables interrupt on falling edges
+ *  event       - Generate event when set
+ *  func        - When non-NULL, generate interrupt
+ *  arg         - Argument passed to the interrupt callback
  *
- ****************************************************************************/
+ * Returned Value:
+ *  Zero (OK) is returned on success, otherwise a negated errno value is returned
+ *  to indicate the nature of the failure.
+ *
+ ************************************************************************************/
 
-xcpt_t stm32l4_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
-                          bool event, xcpt_t func)
+int stm32l4_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
+                         bool event, xcpt_t func, void *arg)
 {
+  struct gpio_callback_s *shared_cbs;
   uint32_t pin = pinset & GPIO_PIN_MASK;
   uint32_t exti = STM32L4_EXTI1_BIT(pin);
   int      irq;
   xcpt_t   handler;
-  xcpt_t   oldhandler = NULL;
   int      nshared;
-  xcpt_t  *shared_cbs;
   int      i;
 
   /* Select the interrupt handler for this EXTI pin */
@@ -252,7 +283,7 @@ xcpt_t stm32l4_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
     {
       irq        = pin + STM32L4_IRQ_EXTI0;
       nshared    = 1;
-      shared_cbs = &stm32l4_exti_callbacks[pin];
+      shared_cbs = &g_gpio_handlers[pin];
       switch (pin)
         {
           case 0:
@@ -280,27 +311,27 @@ xcpt_t stm32l4_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
     {
       irq        = STM32L4_IRQ_EXTI95;
       handler    = stm32l4_exti95_isr;
-      shared_cbs = &stm32l4_exti_callbacks[5];
+      shared_cbs = &g_gpio_handlers[5];
       nshared    = 5;
     }
   else
     {
       irq        = STM32L4_IRQ_EXTI1510;
       handler    = stm32l4_exti1510_isr;
-      shared_cbs = &stm32l4_exti_callbacks[10];
+      shared_cbs = &g_gpio_handlers[10];
       nshared    = 6;
     }
 
   /* Get the previous GPIO IRQ handler; Save the new IRQ handler. */
 
-  oldhandler = stm32l4_exti_callbacks[pin];
-  stm32l4_exti_callbacks[pin] = func;
+  g_gpio_handlers[pin].callback = func;
+  g_gpio_handlers[pin].arg      = arg;
 
   /* Install external interrupt handlers */
 
   if (func)
     {
-      irq_attach(irq, handler);
+      irq_attach(irq, handler, NULL);
       up_enable_irq(irq);
     }
   else
@@ -311,7 +342,7 @@ xcpt_t stm32l4_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
 
       for (i = 0; i < nshared; i++)
         {
-          if (shared_cbs[i] != NULL)
+          if (shared_cbs[i].callback != NULL)
             {
               break;
             }
@@ -354,5 +385,5 @@ xcpt_t stm32l4_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
 
   /* Return the old IRQ handler */
 
-  return oldhandler;
+  return OK;
 }
diff --git a/arch/arm/src/stm32l4/stm32l4_exti_pwr.c b/arch/arm/src/stm32l4/stm32l4_exti_pwr.c
index f037936c649934f1002fa4d01cedd2707e61185b..ab19f6f3cb95384a0c35b84400d606c01fda2f8c 100644
--- a/arch/arm/src/stm32l4/stm32l4_exti_pwr.c
+++ b/arch/arm/src/stm32l4/stm32l4_exti_pwr.c
@@ -65,11 +65,8 @@
 
 /* Interrupt handlers attached to the PVD EXTI */
 
-static xcpt_t stm32l4_exti_pvd_callback;
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
+static xcpt_t g_pvd_callback;
+static void  *g_callback_arg;
 
 /****************************************************************************
  * Private Functions
@@ -83,7 +80,7 @@ static xcpt_t stm32l4_exti_pvd_callback;
  *
  ****************************************************************************/
 
-static int stm32l4_exti_pvd_isr(int irq, void *context)
+static int stm32l4_exti_pvd_isr(int irq, void *context, FAR void *arg)
 {
   int ret = OK;
 
@@ -93,9 +90,9 @@ static int stm32l4_exti_pvd_isr(int irq, void *context)
 
   /* And dispatch the interrupt to the handler */
 
-  if (stm32l4_exti_pvd_callback)
+  if (g_pvd_callback != NULL)
     {
-      ret = stm32l4_exti_pvd_callback(irq, context);
+      ret = g_pvd_callback(irq, context, g_callback_arg);
     }
 
   return ret;
@@ -117,27 +114,24 @@ static int stm32l4_exti_pvd_isr(int irq, void *context)
  *  - func:   when non-NULL, generate interrupt
  *
  * Returns:
- *   The previous value of the interrupt handler function pointer.  This
- *   value may, for example, be used to restore the previous handler when
- *   multiple handlers are used.
+ *   Zero (OK) returned on success; a negated errno value is returned on
+ *   failure.
  *
  ****************************************************************************/
 
-xcpt_t stm32l4_exti_pvd(bool risingedge, bool fallingedge, bool event,
-                      xcpt_t func)
+int stm32l4_exti_pvd(bool risingedge, bool fallingedge, bool event,
+                        xcpt_t func, void *arg)
 {
-  xcpt_t oldhandler;
-
   /* Get the previous GPIO IRQ handler; Save the new IRQ handler. */
 
-  oldhandler = stm32l4_exti_pvd_callback;
-  stm32l4_exti_pvd_callback = func;
+  g_pvd_callback = func;
+  g_callback_arg = arg;
 
   /* Install external interrupt handlers (if not already attached) */
 
   if (func)
     {
-      irq_attach(STM32L4_IRQ_PVD, stm32l4_exti_pvd_isr);
+      irq_attach(STM32L4_IRQ_PVD, stm32l4_exti_pvd_isr, NULL);
       up_enable_irq(STM32L4_IRQ_PVD);
     }
   else
@@ -163,7 +157,5 @@ xcpt_t stm32l4_exti_pvd(bool risingedge, bool fallingedge, bool event,
               func ? 0 : EXTI1_PVD_LINE,
               func ? EXTI1_PVD_LINE : 0);
 
-  /* Return the old IRQ handler */
-
-  return oldhandler;
+  return OK;
 }
diff --git a/arch/arm/src/stm32l4/stm32l4_exti_pwr.h b/arch/arm/src/stm32l4/stm32l4_exti_pwr.h
index 5789e37076489ba45d4ea522e8e7316bf057eba7..27e584779b9fe981ce6fc93a9f2c7b86a764b3de 100644
--- a/arch/arm/src/stm32l4/stm32l4_exti_pwr.h
+++ b/arch/arm/src/stm32l4/stm32l4_exti_pwr.h
@@ -57,15 +57,15 @@
  *  - rising/falling edge: enables interrupt on rising/falling edge
  *  - event:  generate event when set
  *  - func:   when non-NULL, generate interrupt
+ *  - arg:    Argument passed to the interrupt callback
  *
  * Returns:
- *   The previous value of the interrupt handler function pointer.  This
- *   value may, for example, be used to restore the previous handler when
- *   multiple handlers are used.
+ *   Zero (OK) returned on success; a negated errno value is returned on
+ *   failure.
  *
  ****************************************************************************/
 
-xcpt_t stm32l4_exti_pvd(bool risingedge, bool fallingedge, bool event,
-                      xcpt_t func);
+int stm32l4_exti_pvd(bool risingedge, bool fallingedge, bool event,
+                     xcpt_t func, void *arg);
 
 #endif /* STM32L4_EXTI_PWR_H_ */
diff --git a/arch/arm/src/stm32l4/stm32l4_flash.h b/arch/arm/src/stm32l4/stm32l4_flash.h
index ecb6fccb0a9dba169d512e7a9eda3cffdb6b44ac..96bd6135d906376c076019b3e6c3ff1231180fd6 100644
--- a/arch/arm/src/stm32l4/stm32l4_flash.h
+++ b/arch/arm/src/stm32l4/stm32l4_flash.h
@@ -3,7 +3,7 @@
  *
  *   Copyright (C) 2009, 2011, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
- *           David Sidrane 
+ *           David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
diff --git a/arch/arm/src/stm32l4/stm32l4_freerun.c b/arch/arm/src/stm32l4/stm32l4_freerun.c
new file mode 100644
index 0000000000000000000000000000000000000000..a8a42588e0eb63c5d02177111524e4366d23d16a
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_freerun.c
@@ -0,0 +1,288 @@
+/****************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_freerun.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           dev@ziggurat29.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the names NuttX nor Atmel nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "stm32l4_freerun.h"
+
+#ifdef CONFIG_STM32L4_FREERUN
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_freerun_handler
+ *
+ * Description:
+ *   Timer interrupt callback.  When the freerun timer counter overflows,
+ *   this interrupt will occur.  We will just increment an overflow count.
+ *
+ * Input Parameters:
+ *   tch - The handle that represents the timer state
+ *   arg - An opaque argument provided when the interrupt was registered
+ *   sr  - The value of the timer interrupt status register at the time
+ *         that the interrupt occurred.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static int stm32l4_freerun_handler(int irq, FAR void *context, void *arg)
+{
+  FAR struct stm32l4_freerun_s *freerun = (FAR struct stm32l4_freerun_s *) arg;
+
+  DEBUGASSERT(freerun != NULL && freerun->overflow < UINT32_MAX);
+  freerun->overflow++;
+
+  STM32L4_TIM_ACKINT(freerun->tch, 0);
+  return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_freerun_initialize
+ *
+ * Description:
+ *   Initialize the freerun timer wrapper
+ *
+ * Input Parameters:
+ *   freerun    Caller allocated instance of the freerun state structure
+ *   chan       Timer counter channel to be used.
+ *   resolution The required resolution of the timer in units of
+ *              microseconds.  NOTE that the range is restricted to the
+ *              range of uint16_t (excluding zero).
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+int stm32l4_freerun_initialize(FAR struct stm32l4_freerun_s *freerun, int chan,
+                               uint16_t resolution)
+{
+  uint32_t frequency;
+
+  tmrinfo("chan=%d resolution=%d usec\n", chan, resolution);
+  DEBUGASSERT(freerun != NULL && resolution > 0);
+
+  /* Get the TC frequency the corresponds to the requested resolution */
+
+  frequency = USEC_PER_SEC / (uint32_t)resolution;
+  freerun->frequency = frequency;
+
+  freerun->tch = stm32l4_tim_init(chan);
+  if (!freerun->tch)
+    {
+      tmrerr("ERROR: Failed to allocate TIM%d\n", chan);
+      return -EBUSY;
+    }
+
+  STM32L4_TIM_SETCLOCK(freerun->tch, frequency);
+
+  /* Initialize the remaining fields in the state structure and return
+   * success.
+   */
+
+  freerun->chan     = chan;
+  freerun->running  = false;
+  freerun->overflow = 0;
+
+  /* Set up to receive the callback when the counter overflow occurs */
+
+  STM32L4_TIM_SETISR(freerun->tch, stm32l4_freerun_handler, freerun, 0);
+
+  /* Set timer period */
+
+  STM32L4_TIM_SETPERIOD(freerun->tch, UINT32_MAX);
+
+  /* Start the counter */
+
+  STM32L4_TIM_SETMODE(freerun->tch, STM32L4_TIM_MODE_UP);
+  STM32L4_TIM_ACKINT(freerun->tch, 0);
+  STM32L4_TIM_ENABLEINT(freerun->tch, 0);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_freerun_counter
+ *
+ * Description:
+ *   Read the counter register of the free-running timer.
+ *
+ * Input Parameters:
+ *   freerun Caller allocated instance of the freerun state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           stm32l4_freerun_initialize();
+ *   ts      The location in which to return the time from the free-running
+ *           timer.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+int stm32l4_freerun_counter(FAR struct stm32l4_freerun_s *freerun,
+                            FAR struct timespec *ts)
+{
+  uint64_t usec;
+  uint32_t counter;
+  uint32_t verify;
+  uint32_t overflow;
+  uint32_t sec;
+  int pending;
+  irqstate_t flags;
+
+  DEBUGASSERT(freerun && freerun->tch && ts);
+
+  /* Temporarily disable the overflow counter.  NOTE that we have to be
+   * careful here because  stm32l4_tc_getpending() will reset the pending
+   * interrupt status.  If we do not handle the overflow here then, it will
+   * be lost.
+   */
+
+  flags    = enter_critical_section();
+
+  overflow = freerun->overflow;
+  counter  = STM32L4_TIM_GETCOUNTER(freerun->tch);
+  pending  = STM32L4_TIM_CHECKINT(freerun->tch, 0);
+  verify   = STM32L4_TIM_GETCOUNTER(freerun->tch);
+
+  /* If an interrupt was pending before we re-enabled interrupts,
+   * then the overflow needs to be incremented.
+   */
+
+  if (pending)
+    {
+      STM32L4_TIM_ACKINT(freerun->tch, 0);
+
+      /* Increment the overflow count and use the value of the
+       * guaranteed to be AFTER the overflow occurred.
+       */
+
+      overflow++;
+      counter = verify;
+
+      /* Update freerun overflow counter. */
+
+      freerun->overflow = overflow;
+    }
+
+  leave_critical_section(flags);
+
+  tmrinfo("counter=%lu (%lu) overflow=%lu, pending=%i\n",
+         (unsigned long)counter,  (unsigned long)verify,
+         (unsigned long)overflow, pending);
+  tmrinfo("frequency=%u\n", freerun->frequency);
+
+  /* Convert the whole thing to units of microseconds.
+   *
+   *   frequency = ticks / second
+   *   seconds   = ticks * frequency
+   *   usecs     = (ticks * USEC_PER_SEC) / frequency;
+   */
+
+  usec = ((((uint64_t)overflow << 32) + (uint64_t)counter) * USEC_PER_SEC) /
+         freerun->frequency;
+
+  /* And return the value of the timer */
+
+  sec         = (uint32_t)(usec / USEC_PER_SEC);
+  ts->tv_sec  = sec;
+  ts->tv_nsec = (usec - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
+
+  tmrinfo("usec=%llu ts=(%u, %lu)\n",
+          usec, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_freerun_uninitialize
+ *
+ * Description:
+ *   Stop the free-running timer and release all resources that it uses.
+ *
+ * Input Parameters:
+ *   freerun Caller allocated instance of the freerun state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           stm32l4_freerun_initialize();
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+int stm32l4_freerun_uninitialize(FAR struct stm32l4_freerun_s *freerun)
+{
+  DEBUGASSERT(freerun && freerun->tch);
+
+  /* Now we can disable the timer interrupt and disable the timer. */
+
+  STM32L4_TIM_DISABLEINT(freerun->tch, 0);
+  STM32L4_TIM_SETMODE(freerun->tch, STM32L4_TIM_MODE_DISABLED);
+  STM32L4_TIM_SETISR(freerun->tch, NULL, NULL, 0);
+
+  /* Free the timer */
+
+  stm32l4_tim_deinit(freerun->tch);
+  freerun->tch = NULL;
+
+  return OK;
+}
+
+#endif /* CONFIG_STM32L4_FREERUN */
diff --git a/arch/arm/src/stm32l4/stm32l4_freerun.h b/arch/arm/src/stm32l4/stm32l4_freerun.h
new file mode 100644
index 0000000000000000000000000000000000000000..7d551978b4c1d0debabcef20403010bf03f1afcd
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_freerun.h
@@ -0,0 +1,159 @@
+/****************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_freerun.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           dev@ziggurat29.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32L4_FREERUN_H
+#define __ARCH_ARM_SRC_STM32L4_FREERUN_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include "stm32l4_tim.h"
+
+#ifdef CONFIG_STM32L4_FREERUN
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* The freerun client must allocate an instance of this structure and called
+ * stm32l4_freerun_initialize() before using the freerun facilities.  The client
+ * should not access the contents of this structure directly since the
+ * contents are subject to change.
+ */
+
+struct stm32l4_freerun_s
+{
+  uint8_t chan;                    /* The timer/counter in use */
+  bool running;                    /* True: the timer is running */
+  uint32_t overflow;               /* Timer counter overflow */
+  FAR struct stm32l4_tim_dev_s *tch; /* Handle returned by stm32l4_tim_init() */
+  uint32_t frequency;
+};
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_freerun_initialize
+ *
+ * Description:
+ *   Initialize the freerun timer wrapper
+ *
+ * Input Parameters:
+ *   freerun    Caller allocated instance of the freerun state structure
+ *   chan       Timer counter channel to be used.
+ *   resolution The required resolution of the timer in units of
+ *              microseconds.  NOTE that the range is restricted to the
+ *              range of uint16_t (excluding zero).
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun, int chan,
+                             uint16_t resolution);
+
+/****************************************************************************
+ * Name: stm32l4_freerun_counter
+ *
+ * Description:
+ *   Read the counter register of the free-running timer.
+ *
+ * Input Parameters:
+ *   freerun Caller allocated instance of the freerun state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           stm32l4_freerun_initialize();
+ *   ts      The location in which to return the time remaining on the
+ *           oneshot timer.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun,
+                          struct timespec *ts);
+
+/****************************************************************************
+ * Name: stm32l4_freerun_uninitialize
+ *
+ * Description:
+ *   Stop the free-running timer and release all resources that it uses.
+ *
+ * Input Parameters:
+ *   freerun Caller allocated instance of the freerun state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           stm32l4_freerun_initialize();
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+int stm32l4_freerun_uninitialize(struct stm32l4_freerun_s *freerun);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CONFIG_STM32L4_FREERUN */
+#endif /* __ARCH_ARM_SRC_STM32L4_FREERUN_H */
diff --git a/arch/arm/src/stm32l4/stm32l4_gpio.c b/arch/arm/src/stm32l4/stm32l4_gpio.c
index 8ae6efdb11857001c0cbc7709d2601792d243248..0c3432d6e478692a468bbe59f3876e453d7f6fe8 100644
--- a/arch/arm/src/stm32l4/stm32l4_gpio.c
+++ b/arch/arm/src/stm32l4/stm32l4_gpio.c
@@ -176,6 +176,7 @@ int stm32l4_configgpio(uint32_t cfgset)
         break;
 
       case GPIO_OUTPUT:     /* General purpose output mode */
+        stm32l4_gpiowrite(cfgset, (cfgset & GPIO_OUTPUT_SET) != 0); /* Set the initial output value */
         pinmode = GPIO_MODER_OUTPUT;
         break;
 
@@ -305,17 +306,9 @@ int stm32l4_configgpio(uint32_t cfgset)
 
   putreg32(regval, base + STM32L4_GPIO_OTYPER_OFFSET);
 
-  /* If it is an output... set the pin to the correct initial state. */
-
-  if (pinmode == GPIO_MODER_OUTPUT)
-    {
-      bool value = ((cfgset & GPIO_OUTPUT_SET) != 0);
-      stm32l4_gpiowrite(cfgset, value);
-    }
-
   /* Otherwise, it is an input pin.  Should it configured as an EXTI interrupt? */
 
-  else if ((cfgset & GPIO_EXTI) != 0)
+  if ((cfgset & GPIO_EXTI) != 0)
     {
 #if 0
       /* "In STM32 F1 the selection of the EXTI line source is performed through
diff --git a/arch/arm/src/stm32l4/stm32l4_gpio.h b/arch/arm/src/stm32l4/stm32l4_gpio.h
index 185af4810fb0739ca3b612488e25f883c94bbf68..5d4f74d58dc5870dbdcd161fa106ea1311b28641 100644
--- a/arch/arm/src/stm32l4/stm32l4_gpio.h
+++ b/arch/arm/src/stm32l4/stm32l4_gpio.h
@@ -268,7 +268,7 @@ EXTERN const uint32_t g_gpiobase[STM32L4_NPORTS];
  * Description:
  *   Configure a GPIO pin based on bit-encoded description of the pin.
  *   Once it is configured as Alternative (GPIO_ALT|GPIO_CNF_AFPP|...)
- *   function, it must be unconfigured with stm32_unconfiggpio() with
+ *   function, it must be unconfigured with stm32l4_unconfiggpio() with
  *   the same cfgset first before it can be set to non-alternative function.
  *
  * Returns:
@@ -326,21 +326,22 @@ bool stm32l4_gpioread(uint32_t pinset);
  * Description:
  *   Sets/clears GPIO based event and interrupt triggers.
  *
- * Parameters:
- *  - pinset: gpio pin configuration
- *  - rising/falling edge: enables
- *  - event:  generate event when set
- *  - func:   when non-NULL, generate interrupt
+ * Input Parameters:
+ *  pinset      - GPIO pin configuration
+ *  risingedge  - Enables interrupt on rising edges
+ *  fallingedge - Enables interrupt on falling edges
+ *  event       - Generate event when set
+ *  func        - When non-NULL, generate interrupt
+ *  arg         - Argument passed to the interrupt callback
  *
- * Returns:
- *  The previous value of the interrupt handler function pointer.  This value may,
- *  for example, be used to restore the previous handler when multiple handlers are
- *  used.
+ * Returned Value:
+ *  Zero (OK) is returned on success, otherwise a negated errno value is returned
+ *  to indicate the nature of the failure.
  *
  ************************************************************************************/
 
-xcpt_t stm32l4_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
-                            bool event, xcpt_t func);
+int stm32l4_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
+                         bool event, xcpt_t func, void *arg);
 
 /************************************************************************************
  * Function:  stm32l4_dumpgpio
@@ -350,7 +351,7 @@ xcpt_t stm32l4_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 int stm32l4_dumpgpio(uint32_t pinset, const char *msg);
 #else
 #  define stm32l4_dumpgpio(p,m)
diff --git a/arch/arm/src/stm32l4/stm32l4_i2c.c b/arch/arm/src/stm32l4/stm32l4_i2c.c
index 452b125e36140d76081d964a4b59fafb251c9aeb..48aa7a9b0e29dacd007568746811a16ea4f963c2 100644
--- a/arch/arm/src/stm32l4/stm32l4_i2c.c
+++ b/arch/arm/src/stm32l4/stm32l4_i2c.c
@@ -81,8 +81,9 @@
 
 #include 
 #include 
-#include 
 #include 
+#include 
+#include 
 
 #include 
 
@@ -146,15 +147,6 @@
 #define STATUS_BUSY(status)    (status & I2C_ISR_BUSY)
 
 /* Debug ****************************************************************************/
-/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
-
-#ifdef CONFIG_DEBUG_I2C
-#  define i2cdbg dbg
-#  define i2cvdbg vdbg
-#else
-#  define i2cdbg(x...)
-#  define i2cvdbg(x...)
-#endif
 
 /* I2C event trace logic.  NOTE:  trace uses the internal, non-standard, low-level
  * debug interface syslog() but does not require that any other debug
@@ -222,7 +214,7 @@ struct stm32l4_i2c_config_s
   uint32_t scl_pin;           /* GPIO configuration for SCL as SCL */
   uint32_t sda_pin;           /* GPIO configuration for SDA as SDA */
 #ifndef CONFIG_I2C_POLLED
-  int (*isr)(int, void *);    /* Interrupt handler */
+  int (*isr)(int, void *, void *);    /* Interrupt handler */
   uint32_t ev_irq;            /* Event IRQ */
   uint32_t er_irq;            /* Error IRQ */
 #endif
@@ -300,13 +292,13 @@ static inline uint32_t stm32l4_i2c_getstatus(FAR struct stm32l4_i2c_priv_s *priv
 static int stm32l4_i2c_isr(struct stm32l4_i2c_priv_s * priv);
 #ifndef CONFIG_I2C_POLLED
 #ifdef CONFIG_STM32L4_I2C1
-static int stm32l4_i2c1_isr(int irq, void *context);
+static int stm32l4_i2c1_isr(int irq, void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_STM32L4_I2C2
-static int stm32l4_i2c2_isr(int irq, void *context);
+static int stm32l4_i2c2_isr(int irq, void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_STM32L4_I2C3
-static int stm32l4_i2c3_isr(int irq, void *context);
+static int stm32l4_i2c3_isr(int irq, void *context, FAR void *arg);
 #endif
 #endif
 static int stm32l4_i2c_init(FAR struct stm32l4_i2c_priv_s *priv);
@@ -365,8 +357,8 @@ struct stm32l4_i2c_priv_s stm32l4_i2c1_priv =
 static const struct stm32l4_i2c_config_s stm32l4_i2c2_config =
 {
   .base       = STM32L4_I2C2_BASE,
-  .clk_bit    = RCC_APB1ENR_I2C2EN,
-  .reset_bit  = RCC_APB1RSTR_I2C2RST,
+  .clk_bit    = RCC_APB1ENR1_I2C2EN,
+  .reset_bit  = RCC_APB1RSTR1_I2C2RST,
   .scl_pin    = GPIO_I2C2_SCL,
   .sda_pin    = GPIO_I2C2_SDA,
 #ifndef CONFIG_I2C_POLLED
@@ -395,8 +387,8 @@ struct stm32l4_i2c_priv_s stm32l4_i2c2_priv =
 static const struct stm32l4_i2c_config_s stm32l4_i2c3_config =
 {
   .base       = STM32L4_I2C3_BASE,
-  .clk_bit    = RCC_APB1ENR_I2C3EN,
-  .reset_bit  = RCC_APB1RSTR_I2C3RST,
+  .clk_bit    = RCC_APB1ENR1_I2C3EN,
+  .reset_bit  = RCC_APB1RSTR1_I2C3RST,
   .scl_pin    = GPIO_I2C3_SCL,
   .sda_pin    = GPIO_I2C3_SDA,
 #ifndef CONFIG_I2C_POLLED
@@ -671,7 +663,7 @@ static inline int stm32l4_i2c_sem_waitdone(FAR struct stm32l4_i2c_priv_s *priv)
 
   while (priv->intstate != INTSTATE_DONE && elapsed < timeout);
 
-  i2cvdbg("intstate: %d elapsed: %ld threshold: %ld status: %08x\n",
+  i2cinfo("intstate: %d elapsed: %ld threshold: %ld status: %08x\n",
           priv->intstate, (long)elapsed, (long)timeout, priv->status);
 
   /* Set the interrupt state back to IDLE */
@@ -825,7 +817,7 @@ static inline void stm32l4_i2c_sem_waitstop(FAR struct stm32l4_i2c_priv_s *priv)
    * still pending.
    */
 
-  i2cvdbg("Timeout with CR: %04x SR: %04x\n", cr, sr);
+  i2cinfo("Timeout with CR: %04x SR: %04x\n", cr, sr);
 }
 
 /************************************************************************************
@@ -852,8 +844,14 @@ static inline void stm32l4_i2c_sem_post(FAR struct stm32l4_i2c_priv_s *priv)
 static inline void stm32l4_i2c_sem_init(FAR struct stm32l4_i2c_priv_s *priv)
 {
   sem_init(&priv->sem_excl, 0, 1);
+
 #ifndef CONFIG_I2C_POLLED
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   sem_init(&priv->sem_isr, 0, 0);
+  sem_setprotocol(&priv->sem_isr, SEM_PRIO_NONE);
 #endif
 }
 
@@ -919,7 +917,7 @@ static void stm32l4_i2c_tracenew(FAR struct stm32l4_i2c_priv_s *priv,
 
           if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
             {
-              i2cdbg("Trace table overflow\n");
+              i2cerr("ERROR: Trace table overflow\n");
               return;
             }
 
@@ -960,7 +958,7 @@ static void stm32l4_i2c_traceevent(FAR struct stm32l4_i2c_priv_s *priv,
 
       if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
         {
-          i2cdbg("Trace table overflow\n");
+          i2cerr("ERROR: Trace table overflow\n");
           return;
         }
 
@@ -1517,7 +1515,7 @@ static int stm32l4_i2c_isr(struct stm32l4_i2c_priv_s *priv)
 
 #ifndef CONFIG_I2C_POLLED
 #ifdef CONFIG_STM32L4_I2C1
-static int stm32l4_i2c1_isr(int irq, void *context)
+static int stm32l4_i2c1_isr(int irq, void *context, FAR void *arg)
 {
   return stm32l4_i2c_isr(&stm32l4_i2c1_priv);
 }
@@ -1532,7 +1530,7 @@ static int stm32l4_i2c1_isr(int irq, void *context)
  ************************************************************************************/
 
 #ifdef CONFIG_STM32L4_I2C2
-static int stm32l4_i2c2_isr(int irq, void *context)
+static int stm32l4_i2c2_isr(int irq, void *context, FAR void *arg)
 {
   return stm32l4_i2c_isr(&stm32l4_i2c2_priv);
 }
@@ -1547,7 +1545,7 @@ static int stm32l4_i2c2_isr(int irq, void *context)
  ************************************************************************************/
 
 #ifdef CONFIG_STM32L4_I2C3
-static int stm32l4_i2c3_isr(int irq, void *context)
+static int stm32l4_i2c3_isr(int irq, void *context, FAR void *arg)
 {
   return stm32l4_i2c_isr(&stm32l4_i2c3_priv);
 }
@@ -1592,8 +1590,8 @@ static int stm32l4_i2c_init(FAR struct stm32l4_i2c_priv_s *priv)
   /* Attach ISRs */
 
 #ifndef CONFIG_I2C_POLLED
-  irq_attach(priv->config->ev_irq, priv->config->isr);
-  irq_attach(priv->config->er_irq, priv->config->isr);
+  irq_attach(priv->config->ev_irq, priv->config->isr, NULL);
+  irq_attach(priv->config->er_irq, priv->config->isr, NULL);
   up_enable_irq(priv->config->ev_irq);
   up_enable_irq(priv->config->er_irq);
 #endif
@@ -1731,7 +1729,7 @@ static int stm32l4_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg
       status = stm32l4_i2c_getstatus(priv);
       ret = -ETIMEDOUT;
 
-      i2cdbg("Timed out: CR1: %08x status: %08x\n",
+      i2cerr("ERROR: Timed out: CR1: %08x status: %08x\n",
              stm32l4_i2c_getreg32(priv, STM32L4_I2C_CR1_OFFSET), status);
 
       /* "Note: When the STOP, START or PEC bit is set, the software must
diff --git a/arch/arm/src/stm32l4/stm32l4_idle.c b/arch/arm/src/stm32l4/stm32l4_idle.c
index 7cf0734c22d1b88ca12b91ce3bb62b75b4139aa1..015be72d0398b8790b39b12ec90caeca3c967fff 100644
--- a/arch/arm/src/stm32l4/stm32l4_idle.c
+++ b/arch/arm/src/stm32l4/stm32l4_idle.c
@@ -42,11 +42,10 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 
-#include 
-
 #include "chip.h"
 #include "stm32l4_pm.h"
 #include "up_internal.h"
@@ -97,11 +96,11 @@ static void up_idlepm(void)
 
   if (newstate != oldstate)
     {
-      flags = irqsave();
+      flags = enter_critical_section();
 
       /* Perform board-specific, state-dependent logic here */
 
-      llvdbg("newstate= %d oldstate=%d\n", newstate, oldstate);
+      _info("newstate= %d oldstate=%d\n", newstate, oldstate);
 
       /* Then force the global state change */
 
@@ -141,7 +140,7 @@ static void up_idlepm(void)
           break;
         }
 
-      irqrestore(flags);
+      leave_critical_section(flags);
     }
 }
 #else
diff --git a/arch/arm/src/stm32l4/stm32l4_irq.c b/arch/arm/src/stm32l4/stm32l4_irq.c
index e0e963c66df118d575182ab6d4f51e361a7a64ea..7a0ed88bd371679bb9c8aefd63f082919b0d9d39 100644
--- a/arch/arm/src/stm32l4/stm32l4_irq.c
+++ b/arch/arm/src/stm32l4/stm32l4_irq.c
@@ -1,8 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32l4/stm32l4_irq.c
- * arch/arm/src/chip/stm32l4_irq.c
  *
- *   Copyright (C) 2009-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -90,10 +89,6 @@ volatile uint32_t *g_current_regs[1];
 
 extern uint32_t _vectors[];
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -106,40 +101,42 @@ extern uint32_t _vectors[];
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_IRQ)
+#if defined(CONFIG_DEBUG_IRQ_INFO)
 static void stm32l4_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = enter_critical_section();
-  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  lldbg("  INTCTRL:    %08x VECTAB:  %08x\n",
-        getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
+
+  irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
+  irqinfo("  INTCTRL:    %08x VECTAB:  %08x\n",
+          getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
 #if 0
-  lldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
-        getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
-        getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+  irqinfo("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+          getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
+          getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
 #endif
-  lldbg("  IRQ ENABLE: %08x %08x %08x\n",
-        getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
-        getreg32(NVIC_IRQ64_95_ENABLE));
-  lldbg("  SYSH_PRIO:  %08x %08x %08x\n",
-        getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
-        getreg32(NVIC_SYSH12_15_PRIORITY));
-  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
-        getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
-        getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
-        getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
-        getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
-  lldbg("              %08x\n",
-        getreg32(NVIC_IRQ64_67_PRIORITY));
+  irqinfo("  IRQ ENABLE: %08x %08x %08x\n",
+          getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
+          getreg32(NVIC_IRQ64_95_ENABLE));
+  irqinfo("  SYSH_PRIO:  %08x %08x %08x\n",
+          getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+          getreg32(NVIC_SYSH12_15_PRIORITY));
+  irqinfo("  IRQ PRIO:   %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
+          getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
+          getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
+          getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
+          getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+  irqinfo("              %08x\n",
+          getreg32(NVIC_IRQ64_67_PRIORITY));
+
   leave_critical_section(flags);
 }
 #else
@@ -157,51 +154,51 @@ static void stm32l4_dumpnvic(const char *msg, int irq)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
-static int stm32l4_nmi(int irq, FAR void *context)
+#ifdef CONFIG_DEBUG_FEATURES
+static int stm32l4_nmi(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! NMI received\n");
+  _err("PANIC!!! NMI received\n");
   PANIC();
   return 0;
 }
 
-static int stm32l4_busfault(int irq, FAR void *context)
+static int stm32l4_busfault(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
+  _err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
   PANIC();
   return 0;
 }
 
-static int stm32l4_usagefault(int irq, FAR void *context)
+static int stm32l4_usagefault(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
+  _err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
   PANIC();
   return 0;
 }
 
-static int stm32l4_pendsv(int irq, FAR void *context)
+static int stm32l4_pendsv(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! PendSV received\n");
+  _err("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
 }
 
-static int stm32l4_dbgmonitor(int irq, FAR void *context)
+static int stm32l4_dbgmonitor(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Debug Monitor received\n");
+  _err("PANIC!!! Debug Monitor received\n");
   PANIC();
   return 0;
 }
 
-static int stm32l4_reserved(int irq, FAR void *context)
+static int stm32l4_reserved(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Reserved interrupt\n");
+  _err("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;
 }
@@ -242,31 +239,17 @@ static inline void stm32l4_prioritize_syscall(int priority)
 static int stm32l4_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
                          uintptr_t offset)
 {
+  int n;
+
   DEBUGASSERT(irq >= STM32L4_IRQ_NMI && irq < NR_IRQS);
 
   /* Check for external interrupt */
 
   if (irq >= STM32L4_IRQ_FIRST)
     {
-      if (irq < STM32L4_IRQ_FIRST + 32)
-        {
-           *regaddr = (NVIC_IRQ0_31_ENABLE + offset);
-           *bit     = 1 << (irq - STM32L4_IRQ_FIRST);
-        }
-      else if (irq < STM32L4_IRQ_FIRST + 64)
-        {
-           *regaddr = (NVIC_IRQ32_63_ENABLE + offset);
-           *bit     = 1 << (irq - STM32L4_IRQ_FIRST - 32);
-        }
-      else if (irq < NR_IRQS)
-        {
-           *regaddr = (NVIC_IRQ64_95_ENABLE + offset);
-           *bit     = 1 << (irq - STM32L4_IRQ_FIRST - 64);
-        }
-      else
-        {
-          return ERROR; /* Invalid interrupt */
-        }
+      n        = irq - STM32L4_IRQ_FIRST;
+      *regaddr = NVIC_IRQ_ENABLE(n) + offset;
+      *bit     = (uint32_t)1 << (n & 0x1f);
     }
 
   /* Handle processor exceptions.  Only a few can be disabled */
@@ -312,11 +295,14 @@ void up_irqinitialize(void)
 {
   uint32_t regaddr;
   int num_priority_registers;
+  int i;
 
   /* Disable all interrupts */
 
-  putreg32(0, NVIC_IRQ0_31_ENABLE);
-  putreg32(0, NVIC_IRQ32_63_ENABLE);
+  for (i = 0; i < NR_IRQS - STM32L4_IRQ_FIRST; i += 32)
+    {
+      putreg32(0xffffffff, NVIC_IRQ_CLEAR(i));
+    }
 
   /* Colorize the interrupt stack for debug purposes */
 
@@ -380,8 +366,8 @@ void up_irqinitialize(void)
    * under certain conditions.
    */
 
-  irq_attach(STM32L4_IRQ_SVCALL, up_svcall);
-  irq_attach(STM32L4_IRQ_HARDFAULT, up_hardfault);
+  irq_attach(STM32L4_IRQ_SVCALL, up_svcall, NULL);
+  irq_attach(STM32L4_IRQ_HARDFAULT, up_hardfault, NULL);
 
   /* Set the priority of the SVCall interrupt */
 
@@ -397,22 +383,22 @@ void up_irqinitialize(void)
    */
 
 #ifdef CONFIG_ARM_MPU
-  irq_attach(STM32L4_IRQ_MEMFAULT, up_memfault);
+  irq_attach(STM32L4_IRQ_MEMFAULT, up_memfault, NULL);
   up_enable_irq(STM32L4_IRQ_MEMFAULT);
 #endif
 
   /* Attach all other processor exceptions (except reset and sys tick) */
 
-#ifdef CONFIG_DEBUG
-  irq_attach(STM32L4_IRQ_NMI, stm32l4_nmi);
+#ifdef CONFIG_DEBUG_FEATURES
+  irq_attach(STM32L4_IRQ_NMI, stm32l4_nmi, NULL);
 #ifndef CONFIG_ARM_MPU
-  irq_attach(STM32L4_IRQ_MEMFAULT, up_memfault);
+  irq_attach(STM32L4_IRQ_MEMFAULT, up_memfault, NULL);
 #endif
-  irq_attach(STM32L4_IRQ_BUSFAULT, stm32l4_busfault);
-  irq_attach(STM32L4_IRQ_USAGEFAULT, stm32l4_usagefault);
-  irq_attach(STM32L4_IRQ_PENDSV, stm32l4_pendsv);
-  irq_attach(STM32L4_IRQ_DBGMONITOR, stm32l4_dbgmonitor);
-  irq_attach(STM32L4_IRQ_RESERVED, stm32l4_reserved);
+  irq_attach(STM32L4_IRQ_BUSFAULT, stm32l4_busfault, NULL);
+  irq_attach(STM32L4_IRQ_USAGEFAULT, stm32l4_usagefault, NULL);
+  irq_attach(STM32L4_IRQ_PENDSV, stm32l4_pendsv, NULL);
+  irq_attach(STM32L4_IRQ_DBGMONITOR, stm32l4_dbgmonitor, NULL);
+  irq_attach(STM32L4_IRQ_RESERVED, stm32l4_reserved, NULL);
 #endif
 
   stm32l4_dumpnvic("initial", NR_IRQS);
diff --git a/arch/arm/src/stm32l4/stm32l4_lptim.c b/arch/arm/src/stm32l4/stm32l4_lptim.c
new file mode 100644
index 0000000000000000000000000000000000000000..4833472120c2d46d0a122eb4a321ab7300985216
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_lptim.c
@@ -0,0 +1,548 @@
+/************************************************************************************
+ * arm/arm/src/stm3l42/stm32l4_lptim.c
+ *
+ *   Copyright (C) 2011 Uros Platise. All rights reserved.
+ *   Author: Uros Platise 
+ *
+ * With modifications and updates by:
+ *
+ *   Copyright (C) 2016 Motorola Mobility, LLC. All rights reserved.
+ *   Copyright (C) 2011-2012, 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+/************************************************************************************
+ *   Copyright (c) 2015 Google, Inc.
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+
+#include "stm32l4.h"
+#include "stm32l4_gpio.h"
+#include "stm32l4_lptim.h"
+
+#if defined(CONFIG_STM32L4_LPTIM1) || defined(CONFIG_STM32L4_LPTIM2)
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+
+/* TIM Device Structure */
+
+struct stm32l4_lptim_priv_s
+{
+  const struct stm32l4_lptim_ops_s *ops;
+  stm32l4_lptim_mode_t mode;
+  uint32_t base;                   /* LPTIMn base address */
+  uint32_t freq;                   /* Clocking for the LPTIM module */
+};
+
+/************************************************************************************
+ * Private Function Prototypes
+ ************************************************************************************/
+
+static struct stm32l4_lptim_dev_s *stm32l4_lptim_getstruct(int timer);
+static inline void stm32l4_modifyreg32(FAR struct stm32l4_lptim_dev_s *dev,
+                                       uint8_t offset, uint32_t clearbits,
+                                       uint32_t setbits);
+static int stm32l4_lptim_enable(FAR struct stm32l4_lptim_dev_s *dev);
+static int stm32l4_lptim_disable(FAR struct stm32l4_lptim_dev_s *dev);
+static int stm32l4_lptim_reset(FAR struct stm32l4_lptim_dev_s *dev);
+static int stm32l4_lptim_get_gpioconfig(FAR struct stm32l4_lptim_dev_s *dev,
+                                        stm32l4_lptim_channel_t channel,
+                                        uint32_t *cfg);
+static int stm32l4_lptim_setmode(FAR struct stm32l4_lptim_dev_s *dev,
+                                 stm32l4_lptim_mode_t mode);
+static int stm32l4_lptim_setclock(FAR struct stm32l4_lptim_dev_s *dev,
+                                  uint32_t freq);
+static int stm32l4_lptim_setchannel(FAR struct stm32l4_lptim_dev_s *dev,
+                                    stm32l4_lptim_channel_t channel, int enable);
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+static const struct stm32l4_lptim_ops_s stm32l4_lptim_ops =
+{
+  .setmode    = &stm32l4_lptim_setmode,
+  .setclock   = &stm32l4_lptim_setclock,
+  .setchannel = &stm32l4_lptim_setchannel,
+};
+
+#if CONFIG_STM32L4_LPTIM1
+static struct stm32l4_lptim_priv_s stm32l4_lptim1_priv =
+{
+  .ops        = &stm32l4_lptim_ops,
+  .mode       = STM32L4_LPTIM_MODE_UNUSED,
+  .base       = STM32L4_LPTIM1_BASE,
+  .freq       = STM32L4_LPTIM1_FREQUENCY,  /* Must be efined in board.h */
+};
+#endif
+
+#if CONFIG_STM32L4_LPTIM2
+static struct stm32l4_lptim_priv_s stm32l4_lptim2_priv =
+{
+  .ops        = &stm32l4_lptim_ops,
+  .mode       = STM32L4_LPTIM_MODE_UNUSED,
+  .base       = STM32L4_LPTIM2_BASE,
+  .freq       = STM32L4_LPTIM2_FREQUENCY,  /* Must be efined in board.h */
+};
+#endif
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32l4_lptim_getstruct
+ ************************************************************************************/
+
+static struct stm32l4_lptim_dev_s *stm32l4_lptim_getstruct(int timer)
+{
+  switch (timer)
+    {
+#if CONFIG_STM32L4_LPTIM1
+      case 1:
+        return (struct stm32l4_lptim_dev_s *)&stm32l4_lptim1_priv;
+#endif
+#if CONFIG_STM32L4_LPTIM2
+      case 2:
+        return (struct stm32l4_lptim_dev_s *)&stm32l4_lptim2_priv;
+#endif
+      default:
+        return NULL;
+    }
+}
+
+/************************************************************************************
+ * Name: stm32l4_modifyreg32
+ ************************************************************************************/
+
+static inline void stm32l4_modifyreg32(FAR struct stm32l4_lptim_dev_s *dev,
+                                       uint8_t offset, uint32_t clearbits,
+                                       uint32_t setbits)
+{
+  modifyreg32(((struct stm32l4_lptim_priv_s *)dev)->base + offset, clearbits, setbits);
+}
+
+/************************************************************************************
+ * Name: stm32l4_lptim_enable
+ ************************************************************************************/
+
+static int stm32l4_lptim_enable(FAR struct stm32l4_lptim_dev_s *dev)
+{
+  DEBUGASSERT(dev != NULL);
+
+  switch (((struct stm32l4_lptim_priv_s *)dev)->base)
+    {
+#if CONFIG_STM32L4_LPTIM1
+      case STM32L4_LPTIM1_BASE:
+        modifyreg32(STM32L4_RCC_APB1ENR1, 0, RCC_APB1ENR1_LPTIM1EN);
+        break;
+#endif
+#if CONFIG_STM32L4_LPTIM2
+      case STM32L4_LPTIM2_BASE:
+        modifyreg32(STM32L4_RCC_APB1ENR2, 0, RCC_APB1ENR2_LPTIM2EN);
+        break;
+#endif
+
+      default:
+        return ERROR;
+    }
+
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32l4_lptim_disable
+ ************************************************************************************/
+
+static int stm32l4_lptim_disable(FAR struct stm32l4_lptim_dev_s *dev)
+{
+  DEBUGASSERT(dev != NULL);
+
+  switch (((struct stm32l4_lptim_priv_s *)dev)->base)
+    {
+#if CONFIG_STM32L4_LPTIM1
+      case STM32L4_LPTIM1_BASE:
+        modifyreg32(STM32L4_RCC_APB1ENR1, RCC_APB1ENR1_LPTIM1EN, 0);
+        break;
+#endif
+#if CONFIG_STM32L4_LPTIM2
+      case STM32L4_LPTIM2_BASE:
+        modifyreg32(STM32L4_RCC_APB1ENR2, RCC_APB1ENR2_LPTIM2EN, 0);
+        break;
+#endif
+
+      default:
+        return ERROR;
+    }
+
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32l4_lptim_reset
+ ************************************************************************************/
+
+static int stm32l4_lptim_reset(FAR struct stm32l4_lptim_dev_s *dev)
+{
+  DEBUGASSERT(dev != NULL);
+
+  switch (((struct stm32l4_lptim_priv_s *)dev)->base)
+    {
+#if CONFIG_STM32L4_LPTIM1
+      case STM32L4_LPTIM1_BASE:
+        modifyreg32(STM32L4_RCC_APB1RSTR1, 0, RCC_APB1RSTR1_LPTIM1RST);
+        modifyreg32(STM32L4_RCC_APB1RSTR1, RCC_APB1RSTR1_LPTIM1RST, 0);
+        break;
+#endif
+#if CONFIG_STM32L4_LPTIM2
+      case STM32L4_LPTIM2_BASE:
+        modifyreg32(STM32L4_RCC_APB1RSTR2, 0, RCC_APB1RSTR2_LPTIM2RST);
+        modifyreg32(STM32L4_RCC_APB1RSTR2, RCC_APB1RSTR2_LPTIM2RST, 0);
+        break;
+#endif
+    }
+
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32l4_lptim_get_gpioconfig
+ ************************************************************************************/
+
+static int stm32l4_lptim_get_gpioconfig(FAR struct stm32l4_lptim_dev_s *dev,
+                                        stm32l4_lptim_channel_t channel,
+                                        uint32_t *cfg)
+{
+  DEBUGASSERT(dev != NULL && cfg != NULL);
+
+  channel &= STM32L4_LPTIM_CH_MASK;
+
+  switch (((struct stm32l4_lptim_priv_s *)dev)->base)
+    {
+#if CONFIG_STM32L4_LPTIM1
+      case STM32L4_LPTIM1_BASE:
+        switch (channel)
+          {
+# if defined(GPIO_LPTIM1_OUT_1)
+            case 1:
+              *cfg = GPIO_LPTIM1_OUT_1;
+              break;
+# endif
+# if defined(GPIO_LPTIM1_OUT_2)
+            case 2:
+              *cfg = GPIO_LPTIM1_OUT_2;
+              break;
+# endif
+# if defined(GPIO_LPTIM1_OUT_3)
+            case 3:
+              *cfg = GPIO_LPTIM1_OUT_3;
+              break;
+# endif
+            default:
+              return ERROR;
+          }
+        break;
+#endif /* CONFIG_STM32L4_LPTIM1 */
+
+#if CONFIG_STM32L4_LPTIM2
+      case STM32L4_LPTIM2_BASE:
+        switch (channel)
+          {
+# if defined(GPIO_LPTIM2_OUT_1)
+            case 1:
+              *cfg = GPIO_LPTIM2_OUT_1;
+              break;
+# endif
+# if defined(GPIO_LPTIM2_OUT_2)
+            case 2:
+              *cfg = GPIO_LPTIM2_OUT_2;
+              break;
+# endif
+# if defined(GPIO_LPTIM2_OUT_3)
+            case 3:
+              *cfg = GPIO_LPTIM2_OUT_3;
+              break;
+# endif
+            default:
+              return ERROR;
+          }
+        break;
+#endif /* CONFIG_STM32L4_LPTIM2 */
+
+      default:
+        return ERROR;
+    }
+
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32l4_lptim_setmode
+ ************************************************************************************/
+
+static int stm32l4_lptim_setmode(FAR struct stm32l4_lptim_dev_s *dev,
+                                 stm32l4_lptim_mode_t mode)
+{
+  const uint32_t addr = ((struct stm32l4_lptim_priv_s *)dev)->base +
+                        STM32L4_LPTIM_CR_OFFSET;
+
+  DEBUGASSERT(dev != NULL);
+
+  /* Mode */
+
+  switch (mode & STM32L4_LPTIM_MODE_MASK)
+    {
+      case STM32L4_LPTIM_MODE_DISABLED:
+          modifyreg32(addr, LPTIM_CR_ENABLE, 0);
+          break;
+
+      case STM32L4_LPTIM_MODE_SINGLE:
+          modifyreg32(addr, 0, LPTIM_CR_ENABLE);
+          modifyreg32(addr, 0, LPTIM_CR_SNGSTRT);
+          break;
+
+      case STM32L4_LPTIM_MODE_CONTINUOUS:
+          modifyreg32(addr, 0, LPTIM_CR_ENABLE);
+          modifyreg32(addr, 0, LPTIM_CR_CNTSTRT);
+          break;
+
+      default:
+          return ERROR;
+    }
+
+  /* Save mode */
+
+  ((struct stm32l4_lptim_priv_s *)dev)->mode = mode;
+
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32l4_lptim_setclock
+ ************************************************************************************/
+
+static int stm32l4_lptim_setclock(FAR struct stm32l4_lptim_dev_s *dev,
+                                  uint32_t freq)
+{
+  FAR struct stm32l4_lptim_priv_s *priv = (FAR struct stm32l4_lptim_priv_s *)dev;
+  uint32_t setbits;
+  uint32_t actual;
+
+  DEBUGASSERT(dev != NULL);
+
+  /* Disable Timer? */
+
+  if (freq == 0)
+    {
+      stm32l4_lptim_disable(dev);
+      return 0;
+    }
+
+  if (freq >= priv->freq >> 0)
+    {
+      /* More than clock source.  This is as fast as we can go */
+
+      setbits = LPTIM_CFGR_PRESCd1;
+      actual = priv->freq >> 0;
+    }
+  else if (freq >= priv->freq >> 1)
+    {
+      setbits = LPTIM_CFGR_PRESCd2;
+      actual = priv->freq >> 1;
+    }
+  else if (freq >= priv->freq >> 2)
+    {
+      setbits = LPTIM_CFGR_PRESCd4;
+      actual = priv->freq >> 2;
+    }
+  else if (freq >= priv->freq >> 3)
+    {
+      setbits = LPTIM_CFGR_PRESCd8;
+      actual = priv->freq >> 3;
+    }
+  else if (freq >= priv->freq >> 4)
+    {
+      setbits = LPTIM_CFGR_PRESCd16;
+      actual = priv->freq >> 4;
+    }
+  else if (freq >= priv->freq >> 5)
+    {
+      setbits = LPTIM_CFGR_PRESCd32;
+      actual = priv->freq >> 5;
+    }
+  else if (freq >= priv->freq >> 6)
+    {
+      setbits = LPTIM_CFGR_PRESCd64;
+      actual = priv->freq >> 6;
+    }
+  else
+    {
+      /* This is as slow as we can go */
+
+      setbits = LPTIM_CFGR_PRESCd128;
+      actual = priv->freq >> 7;
+    }
+
+  stm32l4_modifyreg32(dev, STM32L4_LPTIM_CFGR_OFFSET, LPTIM_CFGR_PRESC_MASK,
+                    setbits);
+  stm32l4_lptim_enable(dev);
+
+  return actual;
+}
+
+/************************************************************************************
+ * Name: stm32l4_lptim_setchannel
+ ************************************************************************************/
+
+static int stm32l4_lptim_setchannel(FAR struct stm32l4_lptim_dev_s *dev,
+                                    stm32l4_lptim_channel_t channel, int enable)
+{
+  int ret = OK;
+  uint32_t cfg = 0;
+
+  ASSERT(dev);
+
+  /* Configure GPIOs */
+
+  ret = stm32l4_lptim_get_gpioconfig(dev, channel, &cfg);
+  if (!ret)
+    {
+      if (enable)
+        {
+          stm32l4_configgpio(cfg);
+        }
+      else
+        {
+          stm32l4_unconfiggpio(cfg);
+        }
+    }
+
+  return ret;
+}
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32l4_lptim_init
+ ************************************************************************************/
+
+FAR struct stm32l4_lptim_dev_s *stm32l4_lptim_init(int timer)
+{
+  struct stm32l4_lptim_dev_s *dev = NULL;
+
+  /* Get structure and enable power */
+
+  dev = stm32l4_lptim_getstruct(timer);
+  if (!dev)
+    {
+      return NULL;
+    }
+
+  /* Is device already allocated */
+
+  if (((struct stm32l4_lptim_priv_s *)dev)->mode != STM32L4_LPTIM_MODE_UNUSED)
+    {
+      return NULL;
+    }
+
+  /* Enable power */
+
+  stm32l4_lptim_enable(dev);
+
+  /* Reset timer */
+
+  stm32l4_lptim_reset(dev);
+
+  /* Mark it as used */
+
+  ((struct stm32l4_lptim_priv_s *)dev)->mode = STM32L4_LPTIM_MODE_DISABLED;
+
+  return dev;
+}
+
+/************************************************************************************
+ * Name: stm32l4_lptim_deinit
+ ************************************************************************************/
+
+int stm32l4_lptim_deinit(FAR struct stm32l4_lptim_dev_s * dev)
+{
+  ASSERT(dev);
+
+  /* Disable power */
+
+  stm32l4_lptim_disable(dev);
+
+  /* Mark it as free */
+
+  ((struct stm32l4_lptim_priv_s *)dev)->mode = STM32L4_LPTIM_MODE_UNUSED;
+
+  return OK;
+}
+
+#endif /* CONFIG_STM32L4_LPTIM1 || CONFIG_STM32L4_LPTIM2 */
diff --git a/arch/arm/src/stm32l4/stm32l4_lptim.h b/arch/arm/src/stm32l4/stm32l4_lptim.h
new file mode 100644
index 0000000000000000000000000000000000000000..90e0cb0d3bb72662f2c6f43f951d60ad4d0e6ae3
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_lptim.h
@@ -0,0 +1,171 @@
+/************************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_lptim.h
+ *
+ *   Copyright (C) 2011 Uros Platise. All rights reserved.
+ *   Author: Uros Platise 
+ *
+ * With modifications and updates by:
+ *
+ *   Copyright (C) 2016 Motorola Mobility, LLC. All rights reserved.
+ *   Copyright (C) 2011-2012, 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+/************************************************************************************
+ *   Copyright (c) 2015 Google, Inc.
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32L4_STM32L4_LPTIM_H
+#define __ARCH_ARM_SRC_STM32L4_STM32L4_LPTIM_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "chip.h"
+#include "chip/stm32l4_lptim.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Helpers **************************************************************************/
+
+#define STM32L4_LPTIM_SETMODE(d,mode)     ((d)->ops->setmode(d,mode))
+#define STM32L4_LPTIM_SETCLOCK(d,freq)    ((d)->ops->setclock(d,freq))
+#define STM32L4_LPTIM_SETCHANNEL(d,ch,en) ((d)->ops->setchannel(d,ch,en))
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/* LPTIM Device Structure */
+
+struct stm32l4_lptim_dev_s
+{
+  struct stm32l4_lptim_ops_s *ops;
+};
+
+/* LPTIM Modes of Operation */
+
+typedef enum
+{
+  STM32L4_LPTIM_MODE_UNUSED       = -1,
+
+  /* MODES */
+
+  STM32L4_LPTIM_MODE_DISABLED     = 0x0000,
+  STM32L4_LPTIM_MODE_SINGLE       = 0x0001,
+  STM32L4_LPTIM_MODE_CONTINUOUS   = 0x0002,
+  STM32L4_LPTIM_MODE_MASK         = 0x003f,
+} stm32l4_lptim_mode_t;
+
+/* LPTIM Channel Modes */
+
+typedef enum
+{
+  STM32L4_LPTIM_CH_DISABLED       = 0x0000,
+
+  /* CHANNELS */
+
+  STM32L4_LPTIM_CH_CHINVALID      = 0x0000,
+  STM32L4_LPTIM_CH_CH1            = 0x0001,
+  STM32L4_LPTIM_CH_CH2            = 0x0002,
+  STM32L4_LPTIM_CH_CH3            = 0x0003,
+  STM32L4_LPTIM_CH_MASK           = 0x000f,
+} stm32l4_lptim_channel_t;
+
+/* LPTIM Operations */
+
+struct stm32l4_lptim_ops_s
+{
+  int  (*setmode)(FAR struct stm32l4_lptim_dev_s *dev, stm32l4_lptim_mode_t mode);
+  int  (*setclock)(FAR struct stm32l4_lptim_dev_s *dev, uint32_t freq);
+  int  (*setchannel)(FAR struct stm32l4_lptim_dev_s *dev,
+                     stm32l4_lptim_channel_t channel, int enable);
+};
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/* Get timer structure, power-up, reset, and mark it as used */
+
+FAR struct stm32l4_lptim_dev_s *stm32l4_lptim_init(int timer);
+
+/* Power-down timer, mark it as unused */
+
+int stm32l4_lptim_deinit(FAR struct stm32l4_lptim_dev_s *dev);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_STM32L4_STM32L4_LPTIM_H */
diff --git a/arch/arm/src/stm32l4/stm32l4_oneshot.c b/arch/arm/src/stm32l4/stm32l4_oneshot.c
new file mode 100644
index 0000000000000000000000000000000000000000..5ae8e069adb4c84e0170f8bf50e7a00ac3df8716
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_oneshot.c
@@ -0,0 +1,475 @@
+/****************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_oneshot.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           dev@ziggurat29.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the names NuttX nor Atmel nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "stm32l4_oneshot.h"
+
+#ifdef CONFIG_STM32L4_ONESHOT
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int stm32l4_oneshot_handler(int irq, void *context, void *arg);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static struct stm32l4_oneshot_s *g_oneshot[CONFIG_STM32L4_ONESHOT_MAXTIMERS];
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_oneshot_handler
+ *
+ * Description:
+ *   Common timer interrupt callback.  When any oneshot timer interrupt
+ *   expires, this function will be called.  It will forward the call to
+ *   the next level up.
+ *
+ * Input Parameters:
+ *   oneshot - The state associated with the expired timer
+ *
+ * Returned Value:
+ *   Always returns OK
+ *
+ ****************************************************************************/
+
+static int stm32l4_oneshot_handler(int irq, void *context, void *arg)
+{
+  struct stm32l4_oneshot_s *oneshot = (struct stm32l4_oneshot_s *) arg;
+  oneshot_handler_t oneshot_handler;
+  FAR void *oneshot_arg;
+
+  tmrinfo("Expired...\n");
+  DEBUGASSERT(oneshot != NULL && oneshot->handler);
+
+  /* The clock was stopped, but not disabled when the RC match occurred.
+   * Disable the TC now and disable any further interrupts.
+   */
+
+  STM32L4_TIM_SETISR(oneshot->tch, NULL, NULL, 0);
+  STM32L4_TIM_DISABLEINT(oneshot->tch, 0);
+  STM32L4_TIM_SETMODE(oneshot->tch, STM32L4_TIM_MODE_DISABLED);
+  STM32L4_TIM_ACKINT(oneshot->tch, 0);
+
+  /* The timer is no longer running */
+
+  oneshot->running = false;
+
+  /* Forward the event, clearing out any vestiges */
+
+  oneshot_handler  = (oneshot_handler_t)oneshot->handler;
+  oneshot->handler = NULL;
+  oneshot_arg      = (void *)oneshot->arg;
+  oneshot->arg     = NULL;
+
+  oneshot_handler(oneshot_arg);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_allocate_handler
+ *
+ * Description:
+ *   Allocate a timer callback handler for the oneshot instance.
+ *
+ * Input Parameters:
+ *   oneshot - The state instance the new oneshot timer
+ *
+ * Returned Value:
+ *   Returns zero (OK) on success.  This can only fail if the number of
+ *   timers exceeds CONFIG_STM32L4_ONESHOT_MAXTIMERS.
+ *
+ ****************************************************************************/
+
+static inline int stm32l4_allocate_handler(struct stm32l4_oneshot_s *oneshot)
+{
+#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 1
+  int ret = -EBUSY;
+  int i;
+
+  /* Search for an unused handler */
+
+  sched_lock();
+  for (i = 0; i < CONFIG_STM32L4_ONESHOT_MAXTIMERS; i++)
+    {
+      /* Is this handler available? */
+
+      if (g_oneshot[i] == NULL)
+        {
+          /* Yes... assign it to this oneshot */
+
+          g_oneshot[i]   = oneshot;
+          oneshot->cbndx = i;
+          ret            = OK;
+          break;
+        }
+    }
+
+  sched_unlock();
+  return ret;
+
+#else
+  if (g_oneshot[0] == NULL)
+    {
+      g_oneshot[0] = oneshot;
+      return OK;
+    }
+
+  return -EBUSY;
+#endif
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_oneshot_initialize
+ *
+ * Description:
+ *   Initialize the oneshot timer wrapper
+ *
+ * Input Parameters:
+ *   oneshot    Caller allocated instance of the oneshot state structure
+ *   chan       Timer counter channel to be used.
+ *   resolution The required resolution of the timer in units of
+ *              microseconds.  NOTE that the range is restricted to the
+ *              range of uint16_t (excluding zero).
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+int stm32l4_oneshot_initialize(FAR struct stm32l4_oneshot_s *oneshot,
+                               int chan, uint16_t resolution)
+{
+  uint32_t frequency;
+
+  tmrinfo("chan=%d resolution=%d usec\n", chan, resolution);
+  DEBUGASSERT(oneshot && resolution > 0);
+
+  /* Get the TC frequency the corresponds to the requested resolution */
+
+  frequency = USEC_PER_SEC / (uint32_t)resolution;
+  oneshot->frequency = frequency;
+
+  oneshot->tch = stm32l4_tim_init(chan);
+  if (!oneshot->tch)
+    {
+      tmrerr("ERROR: Failed to allocate TIM%d\n", chan);
+      return -EBUSY;
+    }
+
+  STM32L4_TIM_SETCLOCK(oneshot->tch, frequency);
+
+  /* Initialize the remaining fields in the state structure. */
+
+  oneshot->chan       = chan;
+  oneshot->running    = false;
+  oneshot->handler    = NULL;
+  oneshot->arg        = NULL;
+
+  /* Assign a callback handler to the oneshot */
+
+  return stm32l4_allocate_handler(oneshot);
+}
+
+/****************************************************************************
+ * Name: stm32l4_oneshot_max_delay
+ *
+ * Description:
+ *   Determine the maximum delay of the one-shot timer (in microseconds)
+ *
+ ****************************************************************************/
+
+int stm32l4_oneshot_max_delay(FAR struct stm32l4_oneshot_s *oneshot, 
+                              FAR uint64_t *usec)
+{
+  DEBUGASSERT(oneshot != NULL && usec != NULL);
+
+  *usec = (uint64_t)(UINT32_MAX / oneshot->frequency) *
+          (uint64_t)USEC_PER_SEC;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_oneshot_start
+ *
+ * Description:
+ *   Start the oneshot timer
+ *
+ * Input Parameters:
+ *   oneshot Caller allocated instance of the oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           stm32l4_oneshot_initialize();
+ *   handler The function to call when when the oneshot timer expires.
+ *   arg     An opaque argument that will accompany the callback.
+ *   ts      Provides the duration of the one shot timer.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+int stm32l4_oneshot_start(FAR struct stm32l4_oneshot_s *oneshot,
+                          oneshot_handler_t handler, FAR void *arg,
+                          FAR const struct timespec *ts)
+{
+  uint64_t usec;
+  uint64_t period;
+  irqstate_t flags;
+
+  tmrinfo("handler=%p arg=%p, ts=(%lu, %lu)\n",
+         handler, arg, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
+  DEBUGASSERT(oneshot && handler && ts);
+  DEBUGASSERT(oneshot->tch);
+
+  /* Was the oneshot already running? */
+
+  flags = enter_critical_section();
+  if (oneshot->running)
+    {
+      /* Yes.. then cancel it */
+
+      tmrinfo("Already running... cancelling\n");
+      (void)stm32l4_oneshot_cancel(oneshot, NULL);
+    }
+
+  /* Save the new handler and its argument */
+
+  oneshot->handler = handler;
+  oneshot->arg     = arg;
+
+  /* Express the delay in microseconds */
+
+  usec = (uint64_t)ts->tv_sec * USEC_PER_SEC +
+         (uint64_t)(ts->tv_nsec / NSEC_PER_USEC);
+
+  /* Get the timer counter frequency and determine the number of counts need
+   * to achieve the requested delay.
+   *
+   *   frequency = ticks / second
+   *   ticks     = seconds * frequency
+   *             = (usecs * frequency) / USEC_PER_SEC;
+   */
+
+  period = (usec * (uint64_t)oneshot->frequency) / USEC_PER_SEC;
+
+  tmrinfo("usec=%llu period=%08llx\n", usec, period);
+  DEBUGASSERT(period <= UINT32_MAX);
+
+  /* Set up to receive the callback when the interrupt occurs */
+
+  STM32L4_TIM_SETISR(oneshot->tch, stm32l4_oneshot_handler, oneshot, 0);
+
+  /* Set timer period */
+
+  oneshot->period = (uint32_t)period;
+  STM32L4_TIM_SETPERIOD(oneshot->tch, (uint32_t)period);
+
+  /* Start the counter */
+
+  STM32L4_TIM_SETMODE(oneshot->tch, STM32L4_TIM_MODE_PULSE);
+
+  STM32L4_TIM_ACKINT(oneshot->tch, 0);
+  STM32L4_TIM_ENABLEINT(oneshot->tch, 0);
+
+  /* Enable interrupts.  We should get the callback when the interrupt
+   * occurs.
+   */
+
+  oneshot->running = true;
+  leave_critical_section(flags);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_oneshot_cancel
+ *
+ * Description:
+ *   Cancel the oneshot timer and return the time remaining on the timer.
+ *
+ *   NOTE: This function may execute at a high rate with no timer running (as
+ *   when pre-emption is enabled and disabled).
+ *
+ * Input Parameters:
+ *   oneshot Caller allocated instance of the oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           stm32l4_oneshot_initialize();
+ *   ts      The location in which to return the time remaining on the
+ *           oneshot timer.  A time of zero is returned if the timer is
+ *           not running.  ts may be zero in which case the time remaining
+ *           is not returned.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success.  A call to up_timer_cancel() when
+ *   the timer is not active should also return success; a negated errno
+ *   value is returned on any failure.
+ *
+ ****************************************************************************/
+
+int stm32l4_oneshot_cancel(FAR struct stm32l4_oneshot_s *oneshot,
+                           FAR struct timespec *ts)
+{
+  irqstate_t flags;
+  uint64_t usec;
+  uint64_t sec;
+  uint64_t nsec;
+  uint32_t count;
+  uint32_t period;
+
+  /* Was the timer running? */
+
+  flags = enter_critical_section();
+  if (!oneshot->running)
+    {
+      /* No.. Just return zero timer remaining and successful cancellation.
+       * This function may execute at a high rate with no timer running
+       * (as when pre-emption is enabled and disabled).
+       */
+
+      ts->tv_sec  = 0;
+      ts->tv_nsec = 0;
+      leave_critical_section(flags);
+      return OK;
+    }
+
+  /* Yes.. Get the timer counter and period registers and stop the counter.
+   * If the counter expires while we are doing this, the counter clock will
+   * be stopped, but the clock will not be disabled.
+   *
+   * The expected behavior is that the the counter register will freezes at
+   * a value equal to the RC register when the timer expires.  The counter
+   * should have values between 0 and RC in all other cased.
+   *
+   * REVISIT:  This does not appear to be the case.
+   */
+
+  tmrinfo("Cancelling...\n");
+
+  count  = STM32L4_TIM_GETCOUNTER(oneshot->tch);
+  period = oneshot->period;
+
+  /* Now we can disable the interrupt and stop the timer. */
+
+  STM32L4_TIM_DISABLEINT(oneshot->tch, 0);
+  STM32L4_TIM_SETISR(oneshot->tch, NULL, NULL, 0);
+  STM32L4_TIM_SETMODE(oneshot->tch, STM32L4_TIM_MODE_DISABLED);
+
+  oneshot->running = false;
+  oneshot->handler = NULL;
+  oneshot->arg     = NULL;
+  leave_critical_section(flags);
+
+  /* Did the caller provide us with a location to return the time
+   * remaining?
+   */
+
+  if (ts)
+    {
+      /* Yes.. then calculate and return the time remaining on the
+       * oneshot timer.
+       */
+
+      tmrinfo("period=%lu count=%lu\n",
+             (unsigned long)period, (unsigned long)count);
+
+      /* REVISIT: I am not certain why the timer counter value sometimes
+       * exceeds RC.  Might be a bug, or perhaps the counter does not stop
+       * in all cases.
+       */
+
+      if (count >= period)
+        {
+          /* No time remaining (?) */
+
+          ts->tv_sec  = 0;
+          ts->tv_nsec = 0;
+        }
+      else
+        {
+          /* The total time remaining is the difference.  Convert the that
+           * to units of microseconds.
+           *
+           *   frequency = ticks / second
+           *   seconds   = ticks * frequency
+           *   usecs     = (ticks * USEC_PER_SEC) / frequency;
+           */
+
+          usec        = (((uint64_t)(period - count)) * USEC_PER_SEC) /
+                        oneshot->frequency;
+
+          /* Return the time remaining in the correct form */
+
+          sec         = usec / USEC_PER_SEC;
+          nsec        = ((usec) - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
+
+          ts->tv_sec  = (time_t)sec;
+          ts->tv_nsec = (unsigned long)nsec;
+        }
+
+      tmrinfo("remaining (%lu, %lu)\n",
+             (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
+    }
+
+  return OK;
+}
+
+#endif /* CONFIG_STM32L4_ONESHOT */
diff --git a/arch/arm/src/stm32l4/stm32l4_oneshot.h b/arch/arm/src/stm32l4/stm32l4_oneshot.h
new file mode 100644
index 0000000000000000000000000000000000000000..410f0930d7dc2ce53cdceb5441ec3374b38df2a9
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_oneshot.h
@@ -0,0 +1,212 @@
+/****************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_oneshot.h
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           dev@ziggurat29.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32L4_ONESHOT_H
+#define __ARCH_ARM_SRC_STM32L4_ONESHOT_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include "stm32l4_tim.h"
+
+#ifdef CONFIG_STM32L4_ONESHOT
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if !defined(CONFIG_STM32L4_ONESHOT_MAXTIMERS) || \
+    CONFIG_STM32L4_ONESHOT_MAXTIMERS < 1
+#  undef CONFIG_STM32L4_ONESHOT_MAXTIMERS
+#  define CONFIG_STM32L4_ONESHOT_MAXTIMERS 1
+#endif
+
+#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 8
+#  warning Additional logic required to handle more than 8 timers
+#  undef CONFIG_STM32L4_ONESHOT_MAXTIMERS
+#  define CONFIG_STM32L4_ONESHOT_MAXTIMERS 8
+#endif
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* This describes the callback function that will be invoked when the oneshot
+ * timer expires.  The oneshot fires, the client will receive:
+ *
+ *   arg - The opaque argument provided when the interrupt was registered
+ */
+
+typedef void (*oneshot_handler_t)(void *arg);
+
+/* The oneshot client must allocate an instance of this structure and called
+ * stm32l4_oneshot_initialize() before using the oneshot facilities.  The client
+ * should not access the contents of this structure directly since the
+ * contents are subject to change.
+ */
+
+struct stm32l4_oneshot_s
+{
+  uint8_t chan;                       /* The timer/counter in use */
+#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 1
+  uint8_t cbndx;                      /* Timer callback handler index */
+#endif
+  volatile bool running;              /* True: the timer is running */
+  FAR struct stm32l4_tim_dev_s *tch;  /* Pointer returned by
+                                       * stm32l4_tim_init() */
+  volatile oneshot_handler_t handler; /* Oneshot expiration callback */
+  volatile void *arg;                 /* The argument that will accompany
+                                       * the callback */
+  uint32_t frequency;
+  uint32_t period;
+};
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_oneshot_initialize
+ *
+ * Description:
+ *   Initialize the oneshot timer wrapper
+ *
+ * Input Parameters:
+ *   oneshot    Caller allocated instance of the oneshot state structure
+ *   chan       Timer counter channel to be used.
+ *   resolution The required resolution of the timer in units of
+ *              microseconds.  NOTE that the range is restricted to the
+ *              range of uint16_t (excluding zero).
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+int stm32l4_oneshot_initialize(struct stm32l4_oneshot_s *oneshot, int chan,
+                               uint16_t resolution);
+
+/****************************************************************************
+ * Name: stm32l4_oneshot_max_delay
+ *
+ * Description:
+ *   Determine the maximum delay of the one-shot timer (in microseconds)
+ *
+ ****************************************************************************/
+
+int stm32l4_oneshot_max_delay(struct stm32l4_oneshot_s *oneshot,
+                              uint64_t *usec);
+
+/****************************************************************************
+ * Name: stm32l4_oneshot_start
+ *
+ * Description:
+ *   Start the oneshot timer
+ *
+ * Input Parameters:
+ *   oneshot Caller allocated instance of the oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           stm32l4_oneshot_initialize();
+ *   handler The function to call when when the oneshot timer expires.
+ *   arg     An opaque argument that will accompany the callback.
+ *   ts      Provides the duration of the one shot timer.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot,
+                          oneshot_handler_t handler, void *arg,
+                          const struct timespec *ts);
+
+/****************************************************************************
+ * Name: stm32l4_oneshot_cancel
+ *
+ * Description:
+ *   Cancel the oneshot timer and return the time remaining on the timer.
+ *
+ *   NOTE: This function may execute at a high rate with no timer running (as
+ *   when pre-emption is enabled and disabled).
+ *
+ * Input Parameters:
+ *   oneshot Caller allocated instance of the oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           stm32l4_oneshot_initialize();
+ *   ts      The location in which to return the time remaining on the
+ *           oneshot timer.  A time of zero is returned if the timer is
+ *           not running.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success.  A call to up_timer_cancel() when
+ *   the timer is not active should also return success; a negated errno
+ *   value is returned on any failure.
+ *
+ ****************************************************************************/
+
+int stm32l4_oneshot_cancel(struct stm32l4_oneshot_s *oneshot,
+                           struct timespec *ts);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CONFIG_STM32L4_ONESHOT */
+#endif /* __ARCH_ARM_SRC_STM32L4_ONESHOT_H */
diff --git a/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c b/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c
new file mode 100644
index 0000000000000000000000000000000000000000..8a73130dc7dea4accf475ebee82d4ec5fcd712a4
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c
@@ -0,0 +1,345 @@
+/****************************************************************************
+ *  arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "stm32l4_oneshot.h"
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* This structure describes the state of the oneshot timer lower-half driver */
+
+struct stm32l4_oneshot_lowerhalf_s
+{
+  /* This is the part of the lower half driver that is visible to the upper-
+   * half client of the driver.  This must be the first thing in this
+   * structure so that pointers to struct oneshot_lowerhalf_s are cast
+   * compatible to struct stm32l4_oneshot_lowerhalf_s and vice versa.
+   */
+
+  struct oneshot_lowerhalf_s lh;  /* Common lower-half driver fields */
+
+  /* Private lower half data follows */
+
+  struct stm32l4_oneshot_s oneshot; /* STM32-specific oneshot state */
+  oneshot_callback_t callback;    /* internal handler that receives callback */
+  FAR void *arg;                  /* Argument that is passed to the handler */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static void stm32l4_oneshot_handler(void *arg);
+
+static int stm32l4_max_delay(FAR struct oneshot_lowerhalf_s *lower,
+                             FAR struct timespec *ts);
+static int stm32l4_start(FAR struct oneshot_lowerhalf_s *lower,
+                         oneshot_callback_t callback, FAR void *arg,
+                         FAR const struct timespec *ts);
+static int stm32l4_cancel(FAR struct oneshot_lowerhalf_s *lower,
+                          FAR struct timespec *ts);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Lower half operations */
+
+static const struct oneshot_operations_s g_oneshot_ops =
+{
+  .max_delay = stm32l4_max_delay,
+  .start     = stm32l4_start,
+  .cancel    = stm32l4_cancel,
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_oneshot_handler
+ *
+ * Description:
+ *   Timer expiration handler
+ *
+ * Input Parameters:
+ *   arg - Should be the same argument provided when stm32l4_oneshot_start()
+ *         was called.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void stm32l4_oneshot_handler(void *arg)
+{
+  FAR struct stm32l4_oneshot_lowerhalf_s *priv =
+    (FAR struct stm32l4_oneshot_lowerhalf_s *)arg;
+  oneshot_callback_t callback;
+  FAR void *cbarg;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Perhaps the callback was nullified in a race condition with
+   * stm32l4_cancel?
+   */
+
+  if (priv->callback)
+    {
+      /* Sample and nullify BEFORE executing callback (in case the callback
+       * restarts the oneshot).
+       */
+
+      callback       = priv->callback;
+      cbarg          = priv->arg;
+      priv->callback = NULL;
+      priv->arg      = NULL;
+
+      /* Then perform the callback */
+
+      callback(&priv->lh, cbarg);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_max_delay
+ *
+ * Description:
+ *   Determine the maximum delay of the one-shot timer (in microseconds)
+ *
+ * Input Parameters:
+ *   lower   An instance of the lower-half oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           oneshot_initialize();
+ *   ts      The location in which to return the maxumum delay.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+static int stm32l4_max_delay(FAR struct oneshot_lowerhalf_s *lower,
+                             FAR struct timespec *ts)
+{
+  FAR struct stm32l4_oneshot_lowerhalf_s *priv =
+    (FAR struct stm32l4_oneshot_lowerhalf_s *)lower;
+  uint64_t usecs;
+  int ret;
+
+  DEBUGASSERT(priv != NULL && ts != NULL);
+  ret = stm32l4_oneshot_max_delay(&priv->oneshot, &usecs);
+  if (ret >= 0)
+    {
+      uint64_t sec = usecs / 1000000;
+      usecs -= 1000000 * sec;
+
+      ts->tv_sec  = (time_t)sec;
+      ts->tv_nsec = (long)(usecs * 1000);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32l4_start
+ *
+ * Description:
+ *   Start the oneshot timer
+ *
+ * Input Parameters:
+ *   lower   An instance of the lower-half oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           oneshot_initialize();
+ *   handler The function to call when when the oneshot timer expires.
+ *   arg     An opaque argument that will accompany the callback.
+ *   ts      Provides the duration of the one shot timer.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+static int stm32l4_start(FAR struct oneshot_lowerhalf_s *lower,
+                       oneshot_callback_t callback, FAR void *arg,
+                       FAR const struct timespec *ts)
+{
+  FAR struct stm32l4_oneshot_lowerhalf_s *priv =
+    (FAR struct stm32l4_oneshot_lowerhalf_s *)lower;
+  irqstate_t flags;
+  int ret;
+
+  DEBUGASSERT(priv != NULL && callback != NULL && ts != NULL);
+
+  /* Save the callback information and start the timer */
+
+  flags          = enter_critical_section();
+  priv->callback = callback;
+  priv->arg      = arg;
+  ret            = stm32l4_oneshot_start(&priv->oneshot,
+                                       stm32l4_oneshot_handler, priv, ts);
+  leave_critical_section(flags);
+
+  if (ret < 0)
+    {
+      tmrerr("ERROR: stm32l4_oneshot_start failed: %d\n", flags);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32l4_cancel
+ *
+ * Description:
+ *   Cancel the oneshot timer and return the time remaining on the timer.
+ *
+ *   NOTE: This function may execute at a high rate with no timer running (as
+ *   when pre-emption is enabled and disabled).
+ *
+ * Input Parameters:
+ *   lower   Caller allocated instance of the oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           oneshot_initialize();
+ *   ts      The location in which to return the time remaining on the
+ *           oneshot timer.  A time of zero is returned if the timer is
+ *           not running.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success.  A call to up_timer_cancel() when
+ *   the timer is not active should also return success; a negated errno
+ *   value is returned on any failure.
+ *
+ ****************************************************************************/
+
+static int stm32l4_cancel(FAR struct oneshot_lowerhalf_s *lower,
+                        FAR struct timespec *ts)
+{
+  FAR struct stm32l4_oneshot_lowerhalf_s *priv =
+    (FAR struct stm32l4_oneshot_lowerhalf_s *)lower;
+  irqstate_t flags;
+  int ret;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Cancel the timer */
+
+  flags          = enter_critical_section();
+  ret            = stm32l4_oneshot_cancel(&priv->oneshot, ts);
+  priv->callback = NULL;
+  priv->arg      = NULL;
+  leave_critical_section(flags);
+
+  if (ret < 0)
+    {
+      tmrerr("ERROR: stm32l4_oneshot_cancel failed: %d\n", flags);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: oneshot_initialize
+ *
+ * Description:
+ *   Initialize the oneshot timer and return a oneshot lower half driver
+ *   instance.
+ *
+ * Input Parameters:
+ *   chan       Timer counter channel to be used.
+ *   resolution The required resolution of the timer in units of
+ *              microseconds.  NOTE that the range is restricted to the
+ *              range of uint16_t (excluding zero).
+ *
+ * Returned Value:
+ *   On success, a non-NULL instance of the oneshot lower-half driver is
+ *   returned.  NULL is return on any failure.
+ *
+ ****************************************************************************/
+
+FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan,
+                                                   uint16_t resolution)
+{
+  FAR struct stm32l4_oneshot_lowerhalf_s *priv;
+  int ret;
+
+  /* Allocate an instance of the lower half driver */
+
+  priv = (FAR struct stm32l4_oneshot_lowerhalf_s *)
+    kmm_zalloc(sizeof(struct stm32l4_oneshot_lowerhalf_s));
+
+  if (priv == NULL)
+    {
+      tmrerr("ERROR: Failed to initialized state structure\n");
+      return NULL;
+    }
+
+  /* Initialize the lower-half driver structure */
+
+  priv->lh.ops = &g_oneshot_ops;
+
+  /* Initialize the contained STM32 oneshot timer */
+
+  ret = stm32l4_oneshot_initialize(&priv->oneshot, chan, resolution);
+  if (ret < 0)
+    {
+      tmrerr("ERROR: stm32l4_oneshot_initialize failed: %d\n", ret);
+      kmm_free(priv);
+      return NULL;
+    }
+
+  return &priv->lh;
+}
diff --git a/arch/arm/src/stm32l4/stm32l4_otgfs.h b/arch/arm/src/stm32l4/stm32l4_otgfs.h
new file mode 100644
index 0000000000000000000000000000000000000000..0d64e0a72ca2ae858ce36e4a1413720d498641db
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_otgfs.h
@@ -0,0 +1,128 @@
+/************************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_otgfs.h
+ *
+ *   Copyright (C) 2012-2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           dev@ziggurat29.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32L4_STM32L4_OTGFS_H
+#define __ARCH_ARM_SRC_STM32L4_STM32L4_OTGFS_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+
+#include "stm32l4.h"
+
+#include "chip/stm32l4x6xx_otgfs.h"
+
+#if defined(CONFIG_STM32L4_OTGFS)
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Configuration ********************************************************************/
+
+#ifndef CONFIG_OTGFS_PRI
+#  define CONFIG_OTGFS_PRI NVIC_SYSH_PRIORITY_DEFAULT
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_otgfshost_initialize
+ *
+ * Description:
+ *   Initialize USB host device controller hardware.
+ *
+ * Input Parameters:
+ *   controller -- If the device supports more than USB host controller, then
+ *     this identifies which controller is being initialized.  Normally, this
+ *     is just zero.
+ *
+ * Returned Value:
+ *   And instance of the USB host interface.  The controlling task should
+ *   use this interface to (1) call the wait() method to wait for a device
+ *   to be connected, and (2) call the enumerate() method to bind the device
+ *   to a class driver.
+ *
+ * Assumptions:
+ * - This function should called in the initialization sequence in order
+ *   to initialize the USB device functionality.
+ * - Class drivers should be initialized prior to calling this function.
+ *   Otherwise, there is a race condition if the device is already connected.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBHOST
+struct usbhost_connection_s;
+FAR struct usbhost_connection_s *stm32l4_otgfshost_initialize(int controller);
+#endif
+
+/************************************************************************************
+ * Name:  stm32l4_usbsuspend
+ *
+ * Description:
+ *   Board logic must provide the stm32l4_usbsuspend logic if the OTG FS device driver
+ *   is used.  This function is called whenever the USB enters or leaves suspend
+ *   mode. This is an opportunity for the board logic to shutdown clocks, power,
+ *   etc. while the USB is suspended.
+ *
+ ************************************************************************************/
+
+void stm32l4_usbsuspend(FAR struct usbdev_s *dev, bool resume);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* CONFIG_STM32L4_OTGFS */
+#endif /* __ARCH_ARM_SRC_STM32L4_STM32L4_OTGFS_H */
diff --git a/arch/arm/src/stm32l4/stm32l4_otgfsdev.c b/arch/arm/src/stm32l4/stm32l4_otgfsdev.c
new file mode 100644
index 0000000000000000000000000000000000000000..d57701ad6ae468bde64d83ded439bcf14b04324e
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_otgfsdev.c
@@ -0,0 +1,5811 @@
+/****************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_otgfsdev.c
+ *
+ *   Copyright (C) 2012-2014 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           dev@ziggurat29.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "chip.h"
+#include "up_arch.h"
+#include "up_internal.h"
+
+#include "stm32l4_otgfs.h"
+#include "stm32l4_pwr.h"
+
+#if defined(CONFIG_USBDEV) && (defined(CONFIG_STM32L4_OTGFS))
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* Configuration ***************************************************************/
+
+#ifndef CONFIG_USBDEV_EP0_MAXSIZE
+#  define CONFIG_USBDEV_EP0_MAXSIZE 64
+#endif
+
+#ifndef CONFIG_USBDEV_SETUP_MAXDATASIZE
+#  define CONFIG_USBDEV_SETUP_MAXDATASIZE CONFIG_USBDEV_EP0_MAXSIZE
+#endif
+
+#ifndef CONFIG_USBDEV_MAXPOWER
+#  define CONFIG_USBDEV_MAXPOWER 100  /* mA */
+#endif
+
+/* There is 1.25Kb of FIFO memory.  The default partitions this memory
+ * so that there is a TxFIFO allocated for each endpoint and with more
+ * memory provided for the common RxFIFO.  A more knowledge-able
+ * configuration would not allocate any TxFIFO space to OUT endpoints.
+ */
+
+#ifndef CONFIG_USBDEV_RXFIFO_SIZE
+#  define CONFIG_USBDEV_RXFIFO_SIZE 512
+#endif
+
+#ifndef CONFIG_USBDEV_EP0_TXFIFO_SIZE
+#  define CONFIG_USBDEV_EP0_TXFIFO_SIZE 128
+#endif
+
+#ifndef CONFIG_USBDEV_EP1_TXFIFO_SIZE
+#  define CONFIG_USBDEV_EP1_TXFIFO_SIZE 128
+#endif
+
+#ifndef CONFIG_USBDEV_EP2_TXFIFO_SIZE
+#  define CONFIG_USBDEV_EP2_TXFIFO_SIZE 128
+#endif
+
+#ifndef CONFIG_USBDEV_EP3_TXFIFO_SIZE
+#  define CONFIG_USBDEV_EP3_TXFIFO_SIZE 128
+#endif
+
+#ifndef CONFIG_USBDEV_EP4_TXFIFO_SIZE
+#  define CONFIG_USBDEV_EP4_TXFIFO_SIZE 128
+#endif
+
+#ifndef CONFIG_USBDEV_EP5_TXFIFO_SIZE
+#  define CONFIG_USBDEV_EP5_TXFIFO_SIZE 128
+#endif
+
+/* Number of endpoints */
+
+#define STM32L4_NENDPOINTS  (6)          /* ep0-5 x 2 for IN and OUT */
+
+/* Adjust actual number of endpoints based upon size; 0 means 'not available',
+ * and we expect that the first 0-length endpoint implies that all others
+ * after are unused as well (irrespective of what their size is set to be).
+ */
+
+#if CONFIG_USBDEV_EP1_TXFIFO_SIZE == 0
+#  undef STM32L4_NENDPOINTS
+#  define STM32L4_NENDPOINTS 1
+#  undef CONFIG_USBDEV_EP2_TXFIFO_SIZE
+#  define CONFIG_USBDEV_EP2_TXFIFO_SIZE 0
+#  undef CONFIG_USBDEV_EP3_TXFIFO_SIZE
+#  define CONFIG_USBDEV_EP3_TXFIFO_SIZE 0
+#  undef CONFIG_USBDEV_EP4_TXFIFO_SIZE
+#  define CONFIG_USBDEV_EP4_TXFIFO_SIZE 0
+#  undef CONFIG_USBDEV_EP5_TXFIFO_SIZE
+#  define CONFIG_USBDEV_EP5_TXFIFO_SIZE 0
+#elif CONFIG_USBDEV_EP2_TXFIFO_SIZE == 0
+#  undef STM32L4_NENDPOINTS
+#  define STM32L4_NENDPOINTS 2
+#  undef CONFIG_USBDEV_EP3_TXFIFO_SIZE
+#  define CONFIG_USBDEV_EP3_TXFIFO_SIZE 0
+#  undef CONFIG_USBDEV_EP4_TXFIFO_SIZE
+#  define CONFIG_USBDEV_EP4_TXFIFO_SIZE 0
+#  undef CONFIG_USBDEV_EP5_TXFIFO_SIZE
+#  define CONFIG_USBDEV_EP5_TXFIFO_SIZE 0
+#elif CONFIG_USBDEV_EP3_TXFIFO_SIZE == 0
+#  undef STM32L4_NENDPOINTS
+#  define STM32L4_NENDPOINTS 3
+#  undef CONFIG_USBDEV_EP4_TXFIFO_SIZE
+#  define CONFIG_USBDEV_EP4_TXFIFO_SIZE 0
+#  undef CONFIG_USBDEV_EP5_TXFIFO_SIZE
+#  define CONFIG_USBDEV_EP5_TXFIFO_SIZE 0
+#elif CONFIG_USBDEV_EP4_TXFIFO_SIZE == 0
+#  undef STM32L4_NENDPOINTS
+#  define STM32L4_NENDPOINTS 4
+#  undef CONFIG_USBDEV_EP5_TXFIFO_SIZE
+#  define CONFIG_USBDEV_EP5_TXFIFO_SIZE 0
+#elif CONFIG_USBDEV_EP5_TXFIFO_SIZE == 0
+#  undef STM32L4_NENDPOINTS
+#  define STM32L4_NENDPOINTS 5
+#endif
+
+/* Sanity check on allocations specified. */
+
+#if (CONFIG_USBDEV_RXFIFO_SIZE +\
+     CONFIG_USBDEV_EP0_TXFIFO_SIZE +\
+     CONFIG_USBDEV_EP1_TXFIFO_SIZE +\
+     CONFIG_USBDEV_EP2_TXFIFO_SIZE +\
+     CONFIG_USBDEV_EP3_TXFIFO_SIZE +\
+     CONFIG_USBDEV_EP4_TXFIFO_SIZE +\
+     CONFIG_USBDEV_EP5_TXFIFO_SIZE +\
+     0 ) > 1280
+#  error "FIFO allocations exceed FIFO memory size"
+#endif
+
+/* The actual FIFO addresses that we use must be aligned to 4-byte boundaries;
+ * FIFO sizes must be provided in units of 32-bit words.
+ */
+
+#define STM32L4_RXFIFO_BYTES     ((CONFIG_USBDEV_RXFIFO_SIZE + 3) & ~3)
+#define STM32L4_RXFIFO_WORDS     ((CONFIG_USBDEV_RXFIFO_SIZE + 3) >> 2)
+
+#define STM32L4_EP0_TXFIFO_BYTES ((CONFIG_USBDEV_EP0_TXFIFO_SIZE + 3) & ~3)
+#define STM32L4_EP0_TXFIFO_WORDS ((CONFIG_USBDEV_EP0_TXFIFO_SIZE + 3) >> 2)
+
+#if STM32L4_EP0_TXFIFO_WORDS < 16 || STM32L4_EP0_TXFIFO_WORDS > 256
+#  error "CONFIG_USBDEV_EP0_TXFIFO_SIZE is out of range"
+#endif
+
+#define STM32L4_EP1_TXFIFO_BYTES ((CONFIG_USBDEV_EP1_TXFIFO_SIZE + 3) & ~3)
+#define STM32L4_EP1_TXFIFO_WORDS ((CONFIG_USBDEV_EP1_TXFIFO_SIZE + 3) >> 2)
+
+#if STM32L4_EP1_TXFIFO_BYTES != 0 && STM32L4_EP1_TXFIFO_WORDS < 16
+#  error "CONFIG_USBDEV_EP1_TXFIFO_SIZE is out of range"
+#endif
+
+#define STM32L4_EP2_TXFIFO_BYTES ((CONFIG_USBDEV_EP2_TXFIFO_SIZE + 3) & ~3)
+#define STM32L4_EP2_TXFIFO_WORDS ((CONFIG_USBDEV_EP2_TXFIFO_SIZE + 3) >> 2)
+
+#if STM32L4_EP2_TXFIFO_BYTES != 0 && STM32L4_EP2_TXFIFO_WORDS < 16
+#  error "CONFIG_USBDEV_EP2_TXFIFO_SIZE is out of range"
+#endif
+
+#define STM32L4_EP3_TXFIFO_BYTES ((CONFIG_USBDEV_EP3_TXFIFO_SIZE + 3) & ~3)
+#define STM32L4_EP3_TXFIFO_WORDS ((CONFIG_USBDEV_EP3_TXFIFO_SIZE + 3) >> 2)
+
+#if STM32L4_EP3_TXFIFO_BYTES != 0 && STM32L4_EP3_TXFIFO_WORDS < 16
+#  error "CONFIG_USBDEV_EP3_TXFIFO_SIZE is out of range"
+#endif
+
+#define STM32L4_EP4_TXFIFO_BYTES ((CONFIG_USBDEV_EP4_TXFIFO_SIZE + 3) & ~3)
+#define STM32L4_EP4_TXFIFO_WORDS ((CONFIG_USBDEV_EP4_TXFIFO_SIZE + 3) >> 2)
+
+#if STM32L4_EP4_TXFIFO_BYTES != 0 && STM32L4_EP4_TXFIFO_WORDS < 16
+#  error "CONFIG_USBDEV_EP4_TXFIFO_SIZE is out of range"
+#endif
+
+#define STM32L4_EP5_TXFIFO_BYTES ((CONFIG_USBDEV_EP5_TXFIFO_SIZE + 3) & ~3)
+#define STM32L4_EP5_TXFIFO_WORDS ((CONFIG_USBDEV_EP5_TXFIFO_SIZE + 3) >> 2)
+
+#if STM32L4_EP5_TXFIFO_BYTES != 0 && STM32L4_EP5_TXFIFO_WORDS < 16
+#  error "CONFIG_USBDEV_EP5_TXFIFO_SIZE is out of range"
+#endif
+
+#define OTGFS_GINT_RESERVED (OTGFS_GINT_RES89 | \
+                             OTGFS_GINT_RES1617 | \
+                             OTGFS_GINT_RES22)
+
+#define OTGFS_GINT_RC_W1 (OTGFS_GINT_MMIS     | \
+                          OTGFS_GINT_SOF      | \
+                          OTGFS_GINT_ESUSP    | \
+                          OTGFS_GINT_USBSUSP  | \
+                          OTGFS_GINT_USBRST   | \
+                          OTGFS_GINT_ENUMDNE  | \
+                          OTGFS_GINT_ISOODRP  | \
+                          OTGFS_GINT_EOPF     | \
+                          OTGFS_GINT_IISOIXFR | \
+                          OTGFS_GINT_IISOOXFR | \
+                          OTGFS_GINT_RSTDET   | \
+                          OTGFS_GINT_LPMINT   | \
+                          OTGFS_GINT_CIDSCHG  | \
+                          OTGFS_GINT_DISC     | \
+                          OTGFS_GINT_SRQ      | \
+                          OTGFS_GINT_WKUP)
+
+/* Debug ***********************************************************************/
+/* Trace error codes */
+
+#define STM32L4_TRACEERR_ALLOCFAIL            0x01
+#define STM32L4_TRACEERR_BADCLEARFEATURE      0x02
+#define STM32L4_TRACEERR_BADDEVGETSTATUS      0x03
+#define STM32L4_TRACEERR_BADEPNO              0x04
+#define STM32L4_TRACEERR_BADEPGETSTATUS       0x05
+#define STM32L4_TRACEERR_BADGETCONFIG         0x06
+#define STM32L4_TRACEERR_BADGETSETDESC        0x07
+#define STM32L4_TRACEERR_BADGETSTATUS         0x08
+#define STM32L4_TRACEERR_BADSETADDRESS        0x09
+#define STM32L4_TRACEERR_BADSETCONFIG         0x0a
+#define STM32L4_TRACEERR_BADSETFEATURE        0x0b
+#define STM32L4_TRACEERR_BADTESTMODE          0x0c
+#define STM32L4_TRACEERR_BINDFAILED           0x0d
+#define STM32L4_TRACEERR_DISPATCHSTALL        0x0e
+#define STM32L4_TRACEERR_DRIVER               0x0f
+#define STM32L4_TRACEERR_DRIVERREGISTERED     0x10
+#define STM32L4_TRACEERR_EP0NOSETUP           0x11
+#define STM32L4_TRACEERR_EP0SETUPSTALLED      0x12
+#define STM32L4_TRACEERR_EPINNULLPACKET       0x13
+#define STM32L4_TRACEERR_EPINUNEXPECTED       0x14
+#define STM32L4_TRACEERR_EPOUTNULLPACKET      0x15
+#define STM32L4_TRACEERR_EPOUTUNEXPECTED      0x16
+#define STM32L4_TRACEERR_INVALIDCTRLREQ       0x17
+#define STM32L4_TRACEERR_INVALIDPARMS         0x18
+#define STM32L4_TRACEERR_IRQREGISTRATION      0x19
+#define STM32L4_TRACEERR_NOEP                 0x1a
+#define STM32L4_TRACEERR_NOTCONFIGURED        0x1b
+#define STM32L4_TRACEERR_EPOUTQEMPTY          0x1c
+#define STM32L4_TRACEERR_EPINREQEMPTY         0x1d
+#define STM32L4_TRACEERR_NOOUTSETUP           0x1e
+#define STM32L4_TRACEERR_POLLTIMEOUT          0x1f
+
+/* Trace interrupt codes */
+
+#define STM32L4_TRACEINTID_USB                1       /* USB Interrupt entry/exit */
+#define STM32L4_TRACEINTID_INTPENDING         2       /* On each pass through the loop */
+
+#define STM32L4_TRACEINTID_EPOUT              (10 + 0) /* First level interrupt decode */
+#define STM32L4_TRACEINTID_EPIN               (10 + 1)
+#define STM32L4_TRACEINTID_MISMATCH           (10 + 2)
+#define STM32L4_TRACEINTID_WAKEUP             (10 + 3)
+#define STM32L4_TRACEINTID_SUSPEND            (10 + 4)
+#define STM32L4_TRACEINTID_SOF                (10 + 5)
+#define STM32L4_TRACEINTID_RXFIFO             (10 + 6)
+#define STM32L4_TRACEINTID_DEVRESET           (10 + 7)
+#define STM32L4_TRACEINTID_ENUMDNE            (10 + 8)
+#define STM32L4_TRACEINTID_IISOIXFR           (10 + 9)
+#define STM32L4_TRACEINTID_IISOOXFR           (10 + 10)
+#define STM32L4_TRACEINTID_SRQ                (10 + 11)
+#define STM32L4_TRACEINTID_OTG                (10 + 12)
+
+#define STM32L4_TRACEINTID_EPOUT_XFRC         (40 + 0) /* EPOUT second level decode */
+#define STM32L4_TRACEINTID_EPOUT_EPDISD       (40 + 1)
+#define STM32L4_TRACEINTID_EPOUT_SETUP        (40 + 2)
+#define STM32L4_TRACEINTID_DISPATCH           (40 + 3)
+
+#define STM32L4_TRACEINTID_GETSTATUS          (50 + 0) /* EPOUT third level decode */
+#define STM32L4_TRACEINTID_EPGETSTATUS        (50 + 1)
+#define STM32L4_TRACEINTID_DEVGETSTATUS       (50 + 2)
+#define STM32L4_TRACEINTID_IFGETSTATUS        (50 + 3)
+#define STM32L4_TRACEINTID_CLEARFEATURE       (50 + 4)
+#define STM32L4_TRACEINTID_SETFEATURE         (50 + 5)
+#define STM32L4_TRACEINTID_SETADDRESS         (50 + 6)
+#define STM32L4_TRACEINTID_GETSETDESC         (50 + 7)
+#define STM32L4_TRACEINTID_GETCONFIG          (50 + 8)
+#define STM32L4_TRACEINTID_SETCONFIG          (50 + 9)
+#define STM32L4_TRACEINTID_GETSETIF           (50 + 10)
+#define STM32L4_TRACEINTID_SYNCHFRAME         (50 + 11)
+
+#define STM32L4_TRACEINTID_EPIN_XFRC          (70 + 0) /* EPIN second level decode */
+#define STM32L4_TRACEINTID_EPIN_TOC           (70 + 1)
+#define STM32L4_TRACEINTID_EPIN_ITTXFE        (70 + 2)
+#define STM32L4_TRACEINTID_EPIN_EPDISD        (70 + 3)
+#define STM32L4_TRACEINTID_EPIN_TXFE          (70 + 4)
+
+#define STM32L4_TRACEINTID_EPIN_EMPWAIT       (80 + 0) /* EPIN second level decode */
+
+#define STM32L4_TRACEINTID_OUTNAK             (90 + 0) /* RXFLVL second level decode */
+#define STM32L4_TRACEINTID_OUTRECVD           (90 + 1)
+#define STM32L4_TRACEINTID_OUTDONE            (90 + 2)
+#define STM32L4_TRACEINTID_SETUPDONE          (90 + 3)
+#define STM32L4_TRACEINTID_SETUPRECVD         (90 + 4)
+
+/* CONFIG_USB_DUMPBUFFER will dump the contents of buffers to the console. */
+
+#define CONFIG_USB_DUMPBUFFER
+
+#if !defined(CONFIG_DEBUG_INFO) || !defined(CONFIG_DEBUG_FEATURES)
+#  undef CONFIG_USB_DUMPBUFFER
+#endif
+#ifdef CONFIG_USB_DUMPBUFFER
+#  define usb_dumpbuffer(t,b,l) lib_dumpbuffer(t,b,l)
+#else
+#  define usb_dumpbuffer(t,b,l)
+#endif
+
+/* Endpoints ******************************************************************/
+
+/* Odd physical endpoint numbers are IN; even are OUT */
+
+#define STM32L4_EPPHYIN2LOG(epphy)     ((uint8_t)(epphy)|USB_DIR_IN)
+#define STM32L4_EPPHYOUT2LOG(epphy)    ((uint8_t)(epphy)|USB_DIR_OUT)
+
+/* Endpoint 0 */
+
+#define EP0                            (0)
+
+/* The set of all endpoints available to the class implementation (1-n).
+ * This is a bitmap, and the first endpoint (0) is reserved.
+ */
+
+#define STM32L4_EP_AVAILABLE           (((1 << STM32L4_NENDPOINTS) - 1) & ~1)
+
+/* Maximum packet sizes for full speed endpoints */
+
+#define STM32L4_MAXPACKET              (64)         /* Max packet size (1-64) */
+
+/* Delays **********************************************************************/
+
+#define STM32L4_READY_DELAY            200000
+#define STM32L4_FLUSH_DELAY            200000
+
+/* Request queue operations ****************************************************/
+
+#define stm32l4_rqempty(ep)            ((ep)->head == NULL)
+#define stm32l4_rqpeek(ep)             ((ep)->head)
+
+/* Standard stuff **************************************************************/
+
+#ifndef MIN
+#  define MIN(a,b) ((a) < (b) ? (a) : (b))
+#endif
+
+#ifndef MAX
+#  define MAX(a,b) ((a) > (b) ? (a) : (b))
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* Overall device state */
+
+enum stm32l4_devstate_e
+{
+  DEVSTATE_DEFAULT = 0,    /* Power-up, unconfigured state.  This state simply
+                            * means that the device is not yet been given an
+                            * address.
+                            *   SET:    At initialization, uninitialization,
+                            *           reset, and whenever the device address
+                            *           is set to zero
+                            *   TESTED: Never
+                            */
+  DEVSTATE_ADDRESSED,      /* Device address has been assigned, not no
+                            * configuration has yet been selected.
+                            *   SET:    When either a non-zero device address
+                            *           is first assigned or when the device
+                            *           is unconfigured (with configuration == 0)
+                            *   TESTED: never
+                            */
+  DEVSTATE_CONFIGURED,     /* Address assigned and configured:
+                            *   SET:    When the device has been addressed and
+                            *           an non-zero configuration has been selected.
+                            *   TESTED: In many places to assure that the USB device
+                            *           has been properly configured by the host.
+                            */
+};
+
+/* Endpoint 0 states */
+
+enum stm32l4_ep0state_e
+{
+  EP0STATE_IDLE = 0,       /* Idle State, leave on receiving a SETUP packet or
+                            * epsubmit:
+                            *   SET:    In stm32l4_epin() and stm32l4_epout() when
+                            *           we revert from request processing to
+                            *           SETUP processing.
+                            *   TESTED: Never
+                            */
+  EP0STATE_SETUP_OUT,      /* OUT SETUP packet received.  Waiting for the DATA
+                            * OUT phase of SETUP Packet to complete before
+                            * processing a SETUP command (without a USB request):
+                            *   SET:    Set in stm32l4_rxinterrupt() when SETUP OUT
+                            *           packet is received.
+                            *   TESTED: In stm32l4_ep0out_receive()
+                            */
+  EP0STATE_SETUP_READY,    /* IN SETUP packet received -OR- OUT SETUP packet and
+                            * accompanying data have been received.  Processing
+                            * of SETUP command will happen soon.
+                            *   SET:    (1) stm32l4_ep0out_receive() when the OUT
+                            *           SETUP data phase completes, or (2)
+                            *           stm32l4_rxinterrupt() when an IN SETUP is
+                            *           packet received.
+                            *   TESTED: Tested in stm32l4_epout_interrupt() when
+                            *           SETUP phase is done to see if the SETUP
+                            *           command is ready to be processed.  Also
+                            *           tested in stm32l4_ep0out_setup() just to
+                            *           double-check that we have a SETUP request
+                            *           and any accompanying data.
+                            */
+  EP0STATE_SETUP_PROCESS,  /* SETUP Packet is being processed by stm32l4_ep0out_setup():
+                            *   SET:    When SETUP packet received in EP0 OUT
+                            *   TESTED: Never
+                            */
+  EP0STATE_SETUPRESPONSE,  /* Short SETUP response write (without a USB request):
+                            *   SET:    When SETUP response is sent by
+                            *           stm32l4_ep0in_setupresponse()
+                            *   TESTED: Never
+                            */
+  EP0STATE_DATA_IN,        /* Waiting for data out stage (with a USB request):
+                            *   SET:    In stm32l4_epin_request() when a write
+                            *           request is processed on EP0.
+                            *   TESTED: In stm32l4_epin() to see if we should
+                            *           revert to SETUP processing.
+                            */
+  EP0STATE_DATA_OUT        /* Waiting for data in phase to complete ( with a
+                            * USB request)
+                            *   SET:    In stm32l4_epout_request() when a read
+                            *           request is processed on EP0.
+                            *   TESTED: In stm32l4_epout() to see if we should
+                            *           revert to SETUP processing
+                            */
+};
+
+/* Parsed control request */
+
+struct stm32l4_ctrlreq_s
+{
+  uint8_t  type;
+  uint8_t  req;
+  uint16_t value;
+  uint16_t index;
+  uint16_t len;
+};
+
+/* A container for a request so that the request may be retained in a list */
+
+struct stm32l4_req_s
+{
+  struct usbdev_req_s      req;           /* Standard USB request */
+  struct stm32l4_req_s    *flink;         /* Supports a singly linked list */
+};
+
+/* This is the internal representation of an endpoint */
+
+struct stm32l4_ep_s
+{
+  /* Common endpoint fields.  This must be the first thing defined in the
+   * structure so that it is possible to simply cast from struct usbdev_ep_s
+   * to struct stm32l4_ep_s.
+   */
+
+  struct usbdev_ep_s       ep;            /* Standard endpoint structure */
+
+  /* STM32-specific fields */
+
+  struct stm32l4_usbdev_s *dev;           /* Reference to private driver data */
+  struct stm32l4_req_s    *head;          /* Request list for this endpoint */
+  struct stm32l4_req_s    *tail;
+  uint8_t                  epphy;         /* Physical EP address */
+  uint8_t                  eptype:2;      /* Endpoint type */
+  uint8_t                  active:1;      /* 1: A request is being processed */
+  uint8_t                  stalled:1;     /* 1: Endpoint is stalled */
+  uint8_t                  isin:1;        /* 1: IN Endpoint */
+  uint8_t                  odd:1;         /* 1: Odd frame */
+  uint8_t                  zlp:1;         /* 1: Transmit a zero-length-packet (IN EPs only) */
+};
+
+/* This structure retains the state of the USB device controller */
+
+struct stm32l4_usbdev_s
+{
+  /* Common device fields.  This must be the first thing defined in the
+   * structure so that it is possible to simply cast from struct usbdev_s
+   * to struct stm32l4_usbdev_s.
+   */
+
+  struct usbdev_s          usbdev;
+
+  /* The bound device class driver */
+
+  struct usbdevclass_driver_s *driver;
+
+  /* STM32-specific fields */
+
+  uint8_t                  stalled:1;     /* 1: Protocol stalled */
+  uint8_t                  selfpowered:1; /* 1: Device is self powered */
+  uint8_t                  addressed:1;   /* 1: Peripheral address has been set */
+  uint8_t                  configured:1;  /* 1: Class driver has been configured */
+  uint8_t                  wakeup:1;      /* 1: Device remote wake-up */
+  uint8_t                  dotest:1;      /* 1: Test mode selected */
+
+  uint8_t                  devstate:4;    /* See enum stm32l4_devstate_e */
+  uint8_t                  ep0state:4;    /* See enum stm32l4_ep0state_e */
+  uint8_t                  testmode:4;    /* Selected test mode */
+  uint8_t                  epavail[2];    /* Bitset of available OUT/IN endpoints */
+
+  /* E0 SETUP data buffering.
+   *
+   * ctrlreq:
+   *   The 8-byte SETUP request is received on the EP0 OUT endpoint and is
+   *   saved.
+   *
+   * ep0data
+   *   For OUT SETUP requests, the SETUP data phase must also complete before
+   *   the SETUP command can be processed.  The pack receipt logic will save
+   *   the accompanying EP0 IN data in ep0data[] before the SETUP command is
+   *   processed.
+   *
+   *   For IN SETUP requests, the DATA phase will occur AFTER the SETUP
+   *   control request is processed.  In that case, ep0data[] may be used as
+   *   the response buffer.
+   *
+   * ep0datlen
+   *   Length of OUT DATA received in ep0data[] (Not used with OUT data)
+   */
+
+  struct usb_ctrlreq_s     ctrlreq;
+  uint8_t                  ep0data[CONFIG_USBDEV_SETUP_MAXDATASIZE];
+  uint16_t                 ep0datlen;
+
+  /* The endpoint lists */
+
+  struct stm32l4_ep_s      epin[STM32L4_NENDPOINTS];
+  struct stm32l4_ep_s      epout[STM32L4_NENDPOINTS];
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* Register operations ********************************************************/
+
+#if defined(CONFIG_STM32L4_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
+static uint32_t    stm32l4_getreg(uint32_t addr);
+static void        stm32l4_putreg(uint32_t val, uint32_t addr);
+#else
+# define stm32l4_getreg(addr)     getreg32(addr)
+# define stm32l4_putreg(val,addr) putreg32(val,addr)
+#endif
+
+/* Request queue operations ****************************************************/
+
+static FAR struct stm32l4_req_s *stm32l4_req_remfirst(FAR struct stm32l4_ep_s *privep);
+static bool       stm32l4_req_addlast(FAR struct stm32l4_ep_s *privep,
+                    FAR struct stm32l4_req_s *req);
+
+/* Low level data transfers and request operations *****************************/
+/* Special endpoint 0 data transfer logic */
+
+static void        stm32l4_ep0in_setupresponse(FAR struct stm32l4_usbdev_s *priv,
+                     FAR uint8_t *data, uint32_t nbytes);
+static inline void stm32l4_ep0in_transmitzlp(FAR struct stm32l4_usbdev_s *priv);
+static void        stm32l4_ep0in_activate(void);
+
+static void        stm32l4_ep0out_ctrlsetup(FAR struct stm32l4_usbdev_s *priv);
+
+/* IN request and TxFIFO handling */
+
+static void        stm32l4_txfifo_write(FAR struct stm32l4_ep_s *privep,
+                     FAR uint8_t *buf, int nbytes);
+static void        stm32l4_epin_transfer(FAR struct stm32l4_ep_s *privep,
+                     FAR uint8_t *buf, int nbytes);
+static void        stm32l4_epin_request(FAR struct stm32l4_usbdev_s *priv,
+                     FAR struct stm32l4_ep_s *privep);
+
+/* OUT request and RxFIFO handling */
+
+static void        stm32l4_rxfifo_read(FAR struct stm32l4_ep_s *privep,
+                     FAR uint8_t *dest, uint16_t len);
+static void        stm32l4_rxfifo_discard(FAR struct stm32l4_ep_s *privep, int len);
+static void        stm32l4_epout_complete(FAR struct stm32l4_usbdev_s *priv,
+                     FAR struct stm32l4_ep_s *privep);
+static inline void stm32l4_ep0out_receive(FAR struct stm32l4_ep_s *privep, int bcnt);
+static inline void stm32l4_epout_receive(FAR struct stm32l4_ep_s *privep, int bcnt);
+static void        stm32l4_epout_request(FAR struct stm32l4_usbdev_s *priv,
+                     FAR struct stm32l4_ep_s *privep);
+
+/* General request handling */
+
+static void        stm32l4_ep_flush(FAR struct stm32l4_ep_s *privep);
+static void        stm32l4_req_complete(FAR struct stm32l4_ep_s *privep,
+                     int16_t result);
+static void        stm32l4_req_cancel(FAR struct stm32l4_ep_s *privep,
+                     int16_t status);
+
+/* Interrupt handling **********************************************************/
+
+static struct      stm32l4_ep_s *stm32l4_ep_findbyaddr(struct stm32l4_usbdev_s *priv,
+                     uint16_t eplog);
+static int         stm32l4_req_dispatch(FAR struct stm32l4_usbdev_s *priv,
+                     FAR const struct usb_ctrlreq_s *ctrl);
+static void        stm32l4_usbreset(FAR struct stm32l4_usbdev_s *priv);
+
+/* Second level OUT endpoint interrupt processing */
+
+static inline void stm32l4_ep0out_testmode(FAR struct stm32l4_usbdev_s *priv,
+                     uint16_t index);
+static inline void stm32l4_ep0out_stdrequest(struct stm32l4_usbdev_s *priv,
+                     FAR struct stm32l4_ctrlreq_s *ctrlreq);
+static inline void stm32l4_ep0out_setup(struct stm32l4_usbdev_s *priv);
+static inline void stm32l4_epout(FAR struct stm32l4_usbdev_s *priv,
+                     uint8_t epno);
+static inline void stm32l4_epout_interrupt(FAR struct stm32l4_usbdev_s *priv);
+
+/* Second level IN endpoint interrupt processing */
+
+static inline void stm32l4_epin_runtestmode(FAR struct stm32l4_usbdev_s *priv);
+static inline void stm32l4_epin(FAR struct stm32l4_usbdev_s *priv, uint8_t epno);
+static inline void stm32l4_epin_txfifoempty(FAR struct stm32l4_usbdev_s *priv, int epno);
+static inline void stm32l4_epin_interrupt(FAR struct stm32l4_usbdev_s *priv);
+
+/* Other second level interrupt processing */
+
+static inline void stm32l4_resumeinterrupt(FAR struct stm32l4_usbdev_s *priv);
+static inline void stm32l4_suspendinterrupt(FAR struct stm32l4_usbdev_s *priv);
+static inline void stm32l4_rxinterrupt(FAR struct stm32l4_usbdev_s *priv);
+static inline void stm32l4_enuminterrupt(FAR struct stm32l4_usbdev_s *priv);
+#ifdef CONFIG_USBDEV_ISOCHRONOUS
+static inline void stm32l4_isocininterrupt(FAR struct stm32l4_usbdev_s *priv);
+static inline void stm32l4_isocoutinterrupt(FAR struct stm32l4_usbdev_s *priv);
+#endif
+#ifdef CONFIG_USBDEV_VBUSSENSING
+static inline void stm32l4_sessioninterrupt(FAR struct stm32l4_usbdev_s *priv);
+static inline void stm32l4_otginterrupt(FAR struct stm32l4_usbdev_s *priv);
+#endif
+
+/* First level interrupt processing */
+
+static int         stm32l4_usbinterrupt(int irq, FAR void *context, FAR void *arg);
+
+/* Endpoint operations *********************************************************/
+/* Global OUT NAK controls */
+
+static void        stm32l4_enablegonak(FAR struct stm32l4_ep_s *privep);
+static void        stm32l4_disablegonak(FAR struct stm32l4_ep_s *privep);
+
+/* Endpoint configuration */
+
+static int         stm32l4_epout_configure(FAR struct stm32l4_ep_s *privep,
+                     uint8_t eptype, uint16_t maxpacket);
+static int         stm32l4_epin_configure(FAR struct stm32l4_ep_s *privep,
+                     uint8_t eptype, uint16_t maxpacket);
+static int         stm32l4_ep_configure(FAR struct usbdev_ep_s *ep,
+                     FAR const struct usb_epdesc_s *desc, bool last);
+static void        stm32l4_ep0_configure(FAR struct stm32l4_usbdev_s *priv);
+
+/* Endpoint disable */
+
+static void        stm32l4_epout_disable(FAR struct stm32l4_ep_s *privep);
+static void        stm32l4_epin_disable(FAR struct stm32l4_ep_s *privep);
+static int         stm32l4_ep_disable(FAR struct usbdev_ep_s *ep);
+
+/* Endpoint request management */
+
+static FAR struct usbdev_req_s *stm32l4_ep_allocreq(FAR struct usbdev_ep_s *ep);
+static void        stm32l4_ep_freereq(FAR struct usbdev_ep_s *ep,
+                     FAR struct usbdev_req_s *);
+
+/* Endpoint buffer management */
+
+#ifdef CONFIG_USBDEV_DMA
+static void       *stm32l4_ep_allocbuffer(FAR struct usbdev_ep_s *ep, unsigned bytes);
+static void        stm32l4_ep_freebuffer(FAR struct usbdev_ep_s *ep, FAR void *buf);
+#endif
+
+/* Endpoint request submission */
+
+static int         stm32l4_ep_submit(FAR struct usbdev_ep_s *ep,
+                     struct usbdev_req_s *req);
+
+/* Endpoint request cancellation */
+
+static int         stm32l4_ep_cancel(FAR struct usbdev_ep_s *ep,
+                     struct usbdev_req_s *req);
+
+/* Stall handling */
+
+static int         stm32l4_epout_setstall(FAR struct stm32l4_ep_s *privep);
+static int         stm32l4_epin_setstall(FAR struct stm32l4_ep_s *privep);
+static int         stm32l4_ep_setstall(FAR struct stm32l4_ep_s *privep);
+static int         stm32l4_ep_clrstall(FAR struct stm32l4_ep_s *privep);
+static int         stm32l4_ep_stall(FAR struct usbdev_ep_s *ep, bool resume);
+static void        stm32l4_ep0_stall(FAR struct stm32l4_usbdev_s *priv);
+
+/* Endpoint allocation */
+
+static FAR struct usbdev_ep_s *stm32l4_ep_alloc(FAR struct usbdev_s *dev,
+                     uint8_t epno, bool in, uint8_t eptype);
+static void        stm32l4_ep_free(FAR struct usbdev_s *dev,
+                     FAR struct usbdev_ep_s *ep);
+
+/* USB device controller operations ********************************************/
+
+static int         stm32l4_getframe(struct usbdev_s *dev);
+static int         stm32l4_wakeup(struct usbdev_s *dev);
+static int         stm32l4_selfpowered(struct usbdev_s *dev, bool selfpowered);
+static int         stm32l4_pullup(struct usbdev_s *dev, bool enable);
+static void        stm32l4_setaddress(struct stm32l4_usbdev_s *priv,
+                     uint16_t address);
+static int         stm32l4_txfifo_flush(uint32_t txfnum);
+static int         stm32l4_rxfifo_flush(void);
+
+/* Initialization **************************************************************/
+
+static void        stm32l4_swinitialize(FAR struct stm32l4_usbdev_s *priv);
+static void        stm32l4_hwinitialize(FAR struct stm32l4_usbdev_s *priv);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+/* Since there is only a single USB interface, all status information can be
+ * be simply retained in a single global instance.
+ */
+
+static struct stm32l4_usbdev_s g_otgfsdev;
+
+static const struct usbdev_epops_s g_epops =
+{
+  .configure   = stm32l4_ep_configure,
+  .disable     = stm32l4_ep_disable,
+  .allocreq    = stm32l4_ep_allocreq,
+  .freereq     = stm32l4_ep_freereq,
+#ifdef CONFIG_USBDEV_DMA
+  .allocbuffer = stm32l4_ep_allocbuffer,
+  .freebuffer  = stm32l4_ep_freebuffer,
+#endif
+  .submit      = stm32l4_ep_submit,
+  .cancel      = stm32l4_ep_cancel,
+  .stall       = stm32l4_ep_stall,
+};
+
+static const struct usbdev_ops_s g_devops =
+{
+  .allocep     = stm32l4_ep_alloc,
+  .freeep      = stm32l4_ep_free,
+  .getframe    = stm32l4_getframe,
+  .wakeup      = stm32l4_wakeup,
+  .selfpowered = stm32l4_selfpowered,
+  .pullup      = stm32l4_pullup,
+};
+
+/* Device error strings that may be enabled for more descriptive USB trace
+ * output.
+ */
+
+#ifdef CONFIG_USBDEV_TRACE_STRINGS
+const struct trace_msg_t g_usb_trace_strings_deverror[] =
+{
+  TRACE_STR(STM32L4_TRACEERR_ALLOCFAIL       ),
+  TRACE_STR(STM32L4_TRACEERR_BADCLEARFEATURE ),
+  TRACE_STR(STM32L4_TRACEERR_BADDEVGETSTATUS ),
+  TRACE_STR(STM32L4_TRACEERR_BADEPNO         ),
+  TRACE_STR(STM32L4_TRACEERR_BADEPGETSTATUS  ),
+  TRACE_STR(STM32L4_TRACEERR_BADGETCONFIG    ),
+  TRACE_STR(STM32L4_TRACEERR_BADGETSETDESC   ),
+  TRACE_STR(STM32L4_TRACEERR_BADGETSTATUS    ),
+  TRACE_STR(STM32L4_TRACEERR_BADSETADDRESS   ),
+  TRACE_STR(STM32L4_TRACEERR_BADSETCONFIG    ),
+  TRACE_STR(STM32L4_TRACEERR_BADSETFEATURE   ),
+  TRACE_STR(STM32L4_TRACEERR_BADTESTMODE     ),
+  TRACE_STR(STM32L4_TRACEERR_BINDFAILED      ),
+  TRACE_STR(STM32L4_TRACEERR_DISPATCHSTALL   ),
+  TRACE_STR(STM32L4_TRACEERR_DRIVER          ),
+  TRACE_STR(STM32L4_TRACEERR_DRIVERREGISTERED),
+  TRACE_STR(STM32L4_TRACEERR_EP0NOSETUP      ),
+  TRACE_STR(STM32L4_TRACEERR_EP0SETUPSTALLED ),
+  TRACE_STR(STM32L4_TRACEERR_EPINNULLPACKET  ),
+  TRACE_STR(STM32L4_TRACEERR_EPINUNEXPECTED  ),
+  TRACE_STR(STM32L4_TRACEERR_EPOUTNULLPACKET ),
+  TRACE_STR(STM32L4_TRACEERR_EPOUTUNEXPECTED ),
+  TRACE_STR(STM32L4_TRACEERR_INVALIDCTRLREQ  ),
+  TRACE_STR(STM32L4_TRACEERR_INVALIDPARMS    ),
+  TRACE_STR(STM32L4_TRACEERR_IRQREGISTRATION ),
+  TRACE_STR(STM32L4_TRACEERR_NOEP            ),
+  TRACE_STR(STM32L4_TRACEERR_NOTCONFIGURED   ),
+  TRACE_STR(STM32L4_TRACEERR_EPOUTQEMPTY     ),
+  TRACE_STR(STM32L4_TRACEERR_EPINREQEMPTY    ),
+  TRACE_STR(STM32L4_TRACEERR_NOOUTSETUP      ),
+  TRACE_STR(STM32L4_TRACEERR_POLLTIMEOUT     ),
+  TRACE_STR_END
+};
+#endif
+
+/* Interrupt event strings that may be enabled for more descriptive USB trace
+ * output.
+ */
+
+#ifdef CONFIG_USBDEV_TRACE_STRINGS
+const struct trace_msg_t g_usb_trace_strings_intdecode[] =
+{
+  TRACE_STR(STM32L4_TRACEINTID_USB         ),
+  TRACE_STR(STM32L4_TRACEINTID_INTPENDING  ),
+  TRACE_STR(STM32L4_TRACEINTID_EPOUT       ),
+  TRACE_STR(STM32L4_TRACEINTID_EPIN        ),
+  TRACE_STR(STM32L4_TRACEINTID_MISMATCH    ),
+  TRACE_STR(STM32L4_TRACEINTID_WAKEUP      ),
+  TRACE_STR(STM32L4_TRACEINTID_SUSPEND     ),
+  TRACE_STR(STM32L4_TRACEINTID_SOF         ),
+  TRACE_STR(STM32L4_TRACEINTID_RXFIFO      ),
+  TRACE_STR(STM32L4_TRACEINTID_DEVRESET    ),
+  TRACE_STR(STM32L4_TRACEINTID_ENUMDNE     ),
+  TRACE_STR(STM32L4_TRACEINTID_IISOIXFR    ),
+  TRACE_STR(STM32L4_TRACEINTID_IISOOXFR    ),
+  TRACE_STR(STM32L4_TRACEINTID_SRQ         ),
+  TRACE_STR(STM32L4_TRACEINTID_OTG         ),
+  TRACE_STR(STM32L4_TRACEINTID_EPOUT_XFRC  ),
+  TRACE_STR(STM32L4_TRACEINTID_EPOUT_EPDISD),
+  TRACE_STR(STM32L4_TRACEINTID_EPOUT_SETUP ),
+  TRACE_STR(STM32L4_TRACEINTID_DISPATCH    ),
+  TRACE_STR(STM32L4_TRACEINTID_GETSTATUS   ),
+  TRACE_STR(STM32L4_TRACEINTID_EPGETSTATUS ),
+  TRACE_STR(STM32L4_TRACEINTID_DEVGETSTATUS),
+  TRACE_STR(STM32L4_TRACEINTID_IFGETSTATUS ),
+  TRACE_STR(STM32L4_TRACEINTID_CLEARFEATURE),
+  TRACE_STR(STM32L4_TRACEINTID_SETFEATURE  ),
+  TRACE_STR(STM32L4_TRACEINTID_SETADDRESS  ),
+  TRACE_STR(STM32L4_TRACEINTID_GETSETDESC  ),
+  TRACE_STR(STM32L4_TRACEINTID_GETCONFIG   ),
+  TRACE_STR(STM32L4_TRACEINTID_SETCONFIG   ),
+  TRACE_STR(STM32L4_TRACEINTID_GETSETIF    ),
+  TRACE_STR(STM32L4_TRACEINTID_SYNCHFRAME  ),
+  TRACE_STR(STM32L4_TRACEINTID_EPIN_XFRC   ),
+  TRACE_STR(STM32L4_TRACEINTID_EPIN_TOC    ),
+  TRACE_STR(STM32L4_TRACEINTID_EPIN_ITTXFE ),
+  TRACE_STR(STM32L4_TRACEINTID_EPIN_EPDISD ),
+  TRACE_STR(STM32L4_TRACEINTID_EPIN_TXFE   ),
+  TRACE_STR(STM32L4_TRACEINTID_EPIN_EMPWAIT),
+  TRACE_STR(STM32L4_TRACEINTID_OUTNAK      ),
+  TRACE_STR(STM32L4_TRACEINTID_OUTRECVD    ),
+  TRACE_STR(STM32L4_TRACEINTID_OUTDONE     ),
+  TRACE_STR(STM32L4_TRACEINTID_SETUPDONE   ),
+  TRACE_STR(STM32L4_TRACEINTID_SETUPRECVD  ),
+  TRACE_STR_END
+};
+#endif
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_getreg
+ *
+ * Description:
+ *   Get the contents of an STM32 register
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_STM32L4_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
+static uint32_t stm32l4_getreg(uint32_t addr)
+{
+  static uint32_t prevaddr = 0;
+  static uint32_t preval = 0;
+  static uint32_t count = 0;
+
+  /* Read the value from the register */
+
+  uint32_t val = getreg32(addr);
+
+  /* Is this the same value that we read from the same register last time?  Are
+   * we polling the register?  If so, suppress some of the output.
+   */
+
+  if (addr == prevaddr && val == preval)
+    {
+      if (count == 0xffffffff || ++count > 3)
+        {
+          if (count == 4)
+            {
+              uinfo("...\n");
+            }
+
+          return val;
+        }
+    }
+
+  /* No this is a new address or value */
+
+  else
+    {
+      /* Did we print "..." for the previous value? */
+
+      if (count > 3)
+        {
+          /* Yes.. then show how many times the value repeated */
+
+          uinfo("[repeats %d more times]\n", count-3);
+        }
+
+      /* Save the new address, value, and count */
+
+      prevaddr = addr;
+      preval   = val;
+      count    = 1;
+    }
+
+  /* Show the register value read */
+
+  uinfo("%08x->%08x\n", addr, val);
+  return val;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_putreg
+ *
+ * Description:
+ *   Set the contents of an STM32 register to a value
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_STM32L4_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
+static void stm32l4_putreg(uint32_t val, uint32_t addr)
+{
+  /* Show the register value being written */
+
+  uinfo("%08x<-%08x\n", addr, val);
+
+  /* Write the value */
+
+  putreg32(val, addr);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_req_remfirst
+ *
+ * Description:
+ *   Remove a request from the head of an endpoint request queue
+ *
+ ****************************************************************************/
+
+static FAR struct stm32l4_req_s *stm32l4_req_remfirst(FAR struct stm32l4_ep_s *privep)
+{
+  FAR struct stm32l4_req_s *ret = privep->head;
+
+  if (ret)
+    {
+      privep->head = ret->flink;
+      if (!privep->head)
+        {
+          privep->tail = NULL;
+        }
+
+      ret->flink = NULL;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32l4_req_addlast
+ *
+ * Description:
+ *   Add a request to the end of an endpoint request queue
+ *
+ ****************************************************************************/
+
+static bool stm32l4_req_addlast(FAR struct stm32l4_ep_s *privep,
+                                FAR struct stm32l4_req_s *req)
+{
+  bool is_empty = !privep->head;
+
+  req->flink = NULL;
+  if (is_empty)
+    {
+      privep->head = req;
+      privep->tail = req;
+    }
+  else
+    {
+      privep->tail->flink = req;
+      privep->tail        = req;
+    }
+
+  return is_empty;
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep0in_setupresponse
+ *
+ * Description:
+ *   Schedule a short transfer on Endpoint 0 (IN or OUT)
+ *
+ ****************************************************************************/
+
+static void stm32l4_ep0in_setupresponse(FAR struct stm32l4_usbdev_s *priv,
+                                        FAR uint8_t *buf, uint32_t nbytes)
+{
+  stm32l4_epin_transfer(&priv->epin[EP0], buf, nbytes);
+  priv->ep0state = EP0STATE_SETUPRESPONSE;
+  stm32l4_ep0out_ctrlsetup(priv);
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep0in_transmitzlp
+ *
+ * Description:
+ *   Send a zero length packet (ZLP) on endpoint 0 IN
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_ep0in_transmitzlp(FAR struct stm32l4_usbdev_s *priv)
+{
+  stm32l4_ep0in_setupresponse(priv, NULL, 0);
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep0in_activate
+ *
+ * Description:
+ *   Activate the endpoint 0 IN endpoint.
+ *
+ ****************************************************************************/
+
+static void stm32l4_ep0in_activate(void)
+{
+  uint32_t regval;
+
+  /* Set the max packet size  of the IN EP. */
+
+  regval  = stm32l4_getreg(STM32L4_OTGFS_DIEPCTL(0));
+  regval &= ~OTGFS_DIEPCTL0_MPSIZ_MASK;
+
+#if CONFIG_USBDEV_EP0_MAXSIZE == 8
+  regval |= OTGFS_DIEPCTL0_MPSIZ_8;
+#elif CONFIG_USBDEV_EP0_MAXSIZE == 16
+  regval |= OTGFS_DIEPCTL0_MPSIZ_16;
+#elif CONFIG_USBDEV_EP0_MAXSIZE == 32
+  regval |= OTGFS_DIEPCTL0_MPSIZ_32;
+#elif CONFIG_USBDEV_EP0_MAXSIZE == 64
+  regval |= OTGFS_DIEPCTL0_MPSIZ_64;
+#else
+#  error "Unsupported value of CONFIG_USBDEV_EP0_MAXSIZE"
+#endif
+
+  stm32l4_putreg(regval, STM32L4_OTGFS_DIEPCTL(0));
+
+  /* Clear global IN NAK */
+
+  regval  = stm32l4_getreg(STM32L4_OTGFS_DCTL);
+  regval |= OTGFS_DCTL_CGINAK;
+  stm32l4_putreg(regval, STM32L4_OTGFS_DCTL);
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep0out_ctrlsetup
+ *
+ * Description:
+ *   Setup to receive a SETUP packet.
+ *
+ ****************************************************************************/
+
+static void stm32l4_ep0out_ctrlsetup(FAR struct stm32l4_usbdev_s *priv)
+{
+  uint32_t regval;
+
+  /* Setup the hardware to perform the SETUP transfer */
+
+  regval = (USB_SIZEOF_CTRLREQ * 3 << OTGFS_DOEPTSIZ0_XFRSIZ_SHIFT) |
+           (OTGFS_DOEPTSIZ0_PKTCNT) |
+           (3 << OTGFS_DOEPTSIZ0_STUPCNT_SHIFT);
+  stm32l4_putreg(regval, STM32L4_OTGFS_DOEPTSIZ(0));
+
+  /* Then clear NAKing and enable the transfer */
+
+  regval  = stm32l4_getreg(STM32L4_OTGFS_DOEPCTL(0));
+  regval |= (OTGFS_DOEPCTL0_CNAK | OTGFS_DOEPCTL0_EPENA);
+  stm32l4_putreg(regval, STM32L4_OTGFS_DOEPCTL(0));
+}
+
+/****************************************************************************
+ * Name: stm32l4_txfifo_write
+ *
+ * Description:
+ *   Send data to the endpoint's TxFIFO.
+ *
+ ****************************************************************************/
+
+static void stm32l4_txfifo_write(FAR struct stm32l4_ep_s *privep,
+                                 FAR uint8_t *buf, int nbytes)
+{
+  uint32_t regaddr;
+  uint32_t regval;
+  int nwords;
+  int i;
+
+  usb_dumpbuffer(">>>",buf,nbytes);
+
+  /* Convert the number of bytes to words */
+
+  nwords = (nbytes + 3) >> 2;
+
+  /* Get the TxFIFO for this endpoint (same as the endpoint number) */
+
+  regaddr = STM32L4_OTGFS_DFIFO_DEP(privep->epphy);
+
+  /* Then transfer each word to the TxFIFO */
+
+  for (i = 0; i < nwords; i++)
+    {
+      /* Read four bytes from the source buffer (to avoid unaligned accesses)
+       * and pack these into one 32-bit word (little endian).
+       */
+
+      regval  = (uint32_t)*buf++;
+      regval |= ((uint32_t)*buf++) << 8;
+      regval |= ((uint32_t)*buf++) << 16;
+      regval |= ((uint32_t)*buf++) << 24;
+
+      /* Then write the packet data to the TxFIFO */
+
+      stm32l4_putreg(regval, regaddr);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_epin_transfer
+ *
+ * Description:
+ *   Start the Tx data transfer
+ *
+ ****************************************************************************/
+
+static void stm32l4_epin_transfer(FAR struct stm32l4_ep_s *privep,
+                                  FAR uint8_t *buf, int nbytes)
+{
+  uint32_t pktcnt;
+  uint32_t regval;
+
+  /* Read the DIEPSIZx register */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_DIEPTSIZ(privep->epphy));
+
+  /* Clear the XFRSIZ, PKTCNT, and MCNT field of the DIEPSIZx register */
+
+  regval &= ~(OTGFS_DIEPTSIZ_XFRSIZ_MASK | OTGFS_DIEPTSIZ_PKTCNT_MASK |
+              OTGFS_DIEPTSIZ_MCNT_MASK);
+
+  /* Are we sending a zero length packet (ZLP) */
+
+  if (nbytes == 0)
+    {
+      /* Yes.. leave the transfer size at zero and set the packet count to 1 */
+
+      pktcnt = 1;
+    }
+  else
+    {
+      /* No.. Program the transfer size and packet count .  First calculate:
+       *
+       * xfrsize = The total number of bytes to be sent.
+       * pktcnt  = the number of packets (of maxpacket bytes) required to
+       *   perform the transfer.
+       */
+
+      pktcnt  = ((uint32_t)nbytes + (privep->ep.maxpacket - 1)) / privep->ep.maxpacket;
+    }
+
+  /* Set the XFRSIZ and PKTCNT */
+
+  regval |= (pktcnt << OTGFS_DIEPTSIZ_PKTCNT_SHIFT);
+  regval |= ((uint32_t)nbytes << OTGFS_DIEPTSIZ_XFRSIZ_SHIFT);
+
+  /* If this is an isochronous endpoint, then set the multi-count field to
+   * the PKTCNT as well.
+   */
+
+  if (privep->eptype == USB_EP_ATTR_XFER_ISOC)
+    {
+      regval |= (pktcnt << OTGFS_DIEPTSIZ_MCNT_SHIFT);
+    }
+
+  /* Save DIEPSIZx register value */
+
+  stm32l4_putreg(regval, STM32L4_OTGFS_DIEPTSIZ(privep->epphy));
+
+  /* Read the DIEPCTLx register */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_DIEPCTL(privep->epphy));
+
+  /* If this is an isochronous endpoint, then set the even/odd frame bit
+   * the DIEPCTLx register.
+   */
+
+  if (privep->eptype == USB_EP_ATTR_XFER_ISOC)
+    {
+      /* Check bit 0 of the frame number of the received SOF and set the
+       * even/odd frame to match.
+       */
+
+      uint32_t status = stm32l4_getreg(STM32L4_OTGFS_DSTS);
+      if ((status & OTGFS_DSTS_SOFFN0) == OTGFS_DSTS_SOFFN_EVEN)
+        {
+          regval |= OTGFS_DIEPCTL_SEVNFRM;
+        }
+      else
+        {
+          regval |= OTGFS_DIEPCTL_SODDFRM;
+        }
+    }
+
+  /* EP enable, IN data in FIFO */
+
+  regval &= ~OTGFS_DIEPCTL_EPDIS;
+  regval |= (OTGFS_DIEPCTL_CNAK | OTGFS_DIEPCTL_EPENA);
+  stm32l4_putreg(regval, STM32L4_OTGFS_DIEPCTL(privep->epphy));
+
+  /* Transfer the data to the TxFIFO.  At this point, the caller has already
+   * assured that there is sufficient space in the TxFIFO to hold the transfer
+   * we can just blindly continue.
+   */
+
+  stm32l4_txfifo_write(privep, buf, nbytes);
+}
+
+/****************************************************************************
+ * Name: stm32l4_epin_request
+ *
+ * Description:
+ *   Begin or continue write request processing.
+ *
+ ****************************************************************************/
+
+static void stm32l4_epin_request(FAR struct stm32l4_usbdev_s *priv,
+                                 FAR struct stm32l4_ep_s *privep)
+{
+  struct stm32l4_req_s *privreq;
+  uint32_t regaddr;
+  uint32_t regval;
+  uint8_t *buf;
+  int nbytes;
+  int nwords;
+  int bytesleft;
+
+  /* We get here in one of four possible ways.  From three interrupting
+   * events:
+   *
+   * 1. From stm32l4_epin as part of the transfer complete interrupt processing
+   *    This interrupt indicates that the last transfer has completed.
+   * 2. As part of the ITTXFE interrupt processing.  That interrupt indicates
+   *    that an IN token was received when the associated TxFIFO was empty.
+   * 3. From stm32l4_epin_txfifoempty as part of the TXFE interrupt processing.
+   *    The TXFE interrupt is only enabled when the TxFIFO is full and the
+   *    software must wait for space to become available in the TxFIFO.
+   *
+   * And this function may be called immediately when the write request is
+   * queue to start up the next transaction.
+   *
+   * 4. From stm32l4_ep_submit when a new write request is received WHILE the
+   *    endpoint is not active (privep->active == false).
+   */
+
+  /* Check the request from the head of the endpoint request queue */
+
+  privreq = stm32l4_rqpeek(privep);
+  if (!privreq)
+    {
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_EPINREQEMPTY), privep->epphy);
+
+      /* There is no TX transfer in progress and no new pending TX
+       * requests to send.  To stop transmitting any data on a particular
+       * IN endpoint, the application must set the IN NAK bit. To set this
+       * bit, the following field must be programmed.
+       */
+
+      regaddr = STM32L4_OTGFS_DIEPCTL(privep->epphy);
+      regval  = stm32l4_getreg(regaddr);
+      regval |= OTGFS_DIEPCTL_SNAK;
+      stm32l4_putreg(regval, regaddr);
+
+      /* The endpoint is no longer active */
+
+      privep->active = false;
+      return;
+    }
+
+  uinfo("EP%d req=%p: len=%d xfrd=%d zlp=%d\n",
+        privep->epphy, privreq, privreq->req.len,
+        privreq->req.xfrd, privep->zlp);
+
+  /* Check for a special case:  If we are just starting a request (xfrd==0) and
+   * the class driver is trying to send a zero-length packet (len==0).  Then set
+   * the ZLP flag so that the packet will be sent.
+   */
+
+  if (privreq->req.len == 0)
+    {
+      /* The ZLP flag is set TRUE whenever we want to force the driver to
+       * send a zero-length-packet on the next pass through the loop (below).
+       * The flag is cleared whenever a packet is sent in the loop below.
+       */
+
+       privep->zlp = true;
+    }
+
+  /* Add one more packet to the TxFIFO.  We will wait for the transfer
+   * complete event before we add the next packet (or part of a packet
+   * to the TxFIFO).
+   *
+   * The documentation says that we can can multiple packets to the TxFIFO,
+   * but it seems that we need to get the transfer complete event before
+   * we can add the next (or maybe I have got something wrong?)
+   */
+
+#if 0
+  while (privreq->req.xfrd < privreq->req.len || privep->zlp)
+#else
+  if (privreq->req.xfrd < privreq->req.len || privep->zlp)
+#endif
+    {
+      /* Get the number of bytes left to be sent in the request */
+
+      bytesleft = privreq->req.len - privreq->req.xfrd;
+      nbytes    = bytesleft;
+
+      /* Assume no zero-length-packet on the next pass through this loop */
+
+      privep->zlp = false;
+
+      /* Limit the size of the transfer to one full packet and handle
+       * zero-length packets (ZLPs).
+       */
+
+      if (nbytes > 0)
+        {
+          /* Either send the maxpacketsize or all of the remaining data in
+           * the request.
+           */
+
+          if (nbytes >= privep->ep.maxpacket)
+            {
+              nbytes =  privep->ep.maxpacket;
+
+              /* Handle the case where this packet is exactly the
+               * maxpacketsize.  Do we need to send a zero-length packet
+               * in this case?
+               */
+
+              if (bytesleft ==  privep->ep.maxpacket &&
+                 (privreq->req.flags & USBDEV_REQFLAGS_NULLPKT) != 0)
+                {
+                  /* The ZLP flag is set TRUE whenever we want to force
+                   * the driver to send a zero-length-packet on the next
+                   * pass through this loop. The flag is cleared (above)
+                   * whenever we are committed to sending any packet and
+                   * set here when we want to force one more pass through
+                   * the loop.
+                   */
+
+                  privep->zlp = true;
+                }
+            }
+        }
+
+      /* Get the transfer size in 32-bit words */
+
+      nwords = (nbytes + 3) >> 2;
+
+      /* Get the number of 32-bit words available in the TxFIFO. The
+       * DXTFSTS indicates the amount of free space available in the
+       * endpoint TxFIFO. Values are in terms of 32-bit words:
+       *
+       *   0: Endpoint TxFIFO is full
+       *   1: 1 word available
+       *   2: 2 words available
+       *   n: n words available
+       */
+
+      regaddr = STM32L4_OTGFS_DTXFSTS(privep->epphy);
+
+      /* Check for space in the TxFIFO.  If space in the TxFIFO is not
+       * available, then set up an interrupt to resume the transfer when
+       * the TxFIFO is empty.
+       */
+
+      regval = stm32l4_getreg(regaddr);
+      if ((int)(regval & OTGFS_DTXFSTS_MASK) < nwords)
+        {
+          usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPIN_EMPWAIT), (uint16_t)regval);
+
+          /* There is insufficient space in the TxFIFO.  Wait for a TxFIFO
+           * empty interrupt and try again.
+           */
+
+          uint32_t empmsk = stm32l4_getreg(STM32L4_OTGFS_DIEPEMPMSK);
+          empmsk |= OTGFS_DIEPEMPMSK(privep->epphy);
+          stm32l4_putreg(empmsk, STM32L4_OTGFS_DIEPEMPMSK);
+
+          /* Terminate the transfer.  We will try again when the TxFIFO empty
+           * interrupt is received.
+           */
+
+          return;
+        }
+
+      /* Transfer data to the TxFIFO */
+
+      buf = privreq->req.buf + privreq->req.xfrd;
+      stm32l4_epin_transfer(privep, buf, nbytes);
+
+      /* If it was not before, the OUT endpoint is now actively transferring
+       * data.
+       */
+
+      privep->active = true;
+
+      /* EP0 is a special case */
+
+      if (privep->epphy == EP0)
+        {
+          priv->ep0state = EP0STATE_DATA_IN;
+        }
+
+      /* Update for the next time through the loop */
+
+      privreq->req.xfrd += nbytes;
+    }
+
+  /* Note that the ZLP, if any, must be sent as a separate transfer.  The need
+   * for a ZLP is indicated by privep->zlp.  If all of the bytes were sent
+   * (including any final null packet) then we are finished with the transfer
+   */
+
+  if (privreq->req.xfrd >= privreq->req.len && !privep->zlp)
+    {
+      usbtrace(TRACE_COMPLETE(privep->epphy), privreq->req.xfrd);
+
+      /* We are finished with the request (although the transfer has not
+       * yet completed).
+       */
+
+      stm32l4_req_complete(privep, OK);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_rxfifo_read
+ *
+ * Description:
+ *   Read packet from the RxFIFO into a read request.
+ *
+ ****************************************************************************/
+
+static void stm32l4_rxfifo_read(FAR struct stm32l4_ep_s *privep,
+                                FAR uint8_t *dest, uint16_t len)
+{
+  uint32_t regaddr;
+  int i;
+
+  /* Get the address of the RxFIFO.  Note:  there is only one RxFIFO so
+   * we might as well use the address associated with EP0.
+   */
+
+  regaddr = STM32L4_OTGFS_DFIFO_DEP(EP0);
+
+  /* Read 32-bits and write 4 x 8-bits at time (to avoid unaligned accesses) */
+
+  for (i = 0; i < len; i += 4)
+    {
+      union
+      {
+        uint32_t w;
+        uint8_t  b[4];
+      } data;
+
+      /* Read 1 x 32-bits of EP0 packet data */
+
+      data.w = stm32l4_getreg(regaddr);
+
+      /* Write 4 x 8-bits of EP0 packet data */
+
+      *dest++ = data.b[0];
+      *dest++ = data.b[1];
+      *dest++ = data.b[2];
+      *dest++ = data.b[3];
+    }
+
+  usb_dumpbuffer("<<<",dest-len,len);
+}
+
+/****************************************************************************
+ * Name: stm32l4_rxfifo_discard
+ *
+ * Description:
+ *   Discard packet data from the RxFIFO.
+ *
+ ****************************************************************************/
+
+static void stm32l4_rxfifo_discard(FAR struct stm32l4_ep_s *privep, int len)
+{
+  if (len > 0)
+    {
+      uint32_t regaddr;
+      int i;
+
+      /* Get the address of the RxFIFO  Note:  there is only one RxFIFO so
+       * we might as well use the address associated with EP0.
+       */
+
+      regaddr = STM32L4_OTGFS_DFIFO_DEP(EP0);
+
+      /* Read 32-bits at time */
+
+      for (i = 0; i < len; i += 4)
+        {
+          volatile uint32_t data = stm32l4_getreg(regaddr);
+          (void)data;
+        }
+
+      uinfo("<<< discarding %d\n",len);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_epout_complete
+ *
+ * Description:
+ *   This function is called when an OUT transfer complete interrupt is
+ *   received.  It completes the read request at the head of the endpoint's
+ *   request queue.
+ *
+ ****************************************************************************/
+
+static void stm32l4_epout_complete(FAR struct stm32l4_usbdev_s *priv,
+                                   FAR struct stm32l4_ep_s *privep)
+{
+  struct stm32l4_req_s *privreq;
+
+  /* Since a transfer just completed, there must be a read request at the head of
+   * the endpoint request queue.
+   */
+
+  privreq = stm32l4_rqpeek(privep);
+  DEBUGASSERT(privreq);
+
+  if (!privreq)
+    {
+      /* An OUT transfer completed, but no packet to receive the data.  This
+       * should not happen.
+       */
+
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_EPOUTQEMPTY), privep->epphy);
+      privep->active = false;
+      return;
+    }
+
+  uinfo("EP%d: len=%d xfrd=%d\n",
+        privep->epphy, privreq->req.len, privreq->req.xfrd);
+
+  /* Return the completed read request to the class driver and mark the state
+   * IDLE.
+   */
+
+  usbtrace(TRACE_COMPLETE(privep->epphy), privreq->req.xfrd);
+  stm32l4_req_complete(privep, OK);
+  privep->active = false;
+
+  /* Now set up the next read request (if any) */
+
+  stm32l4_epout_request(priv, privep);
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep0out_receive
+ *
+ * Description:
+ *   This function is called from the RXFLVL interrupt handler when new incoming
+ *   data is available in the endpoint's RxFIFO.  This function will simply
+ *   copy the incoming data into pending request's data buffer.
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_ep0out_receive(FAR struct stm32l4_ep_s *privep,
+                                          int bcnt)
+{
+  FAR struct stm32l4_usbdev_s *priv;
+
+  /* Sanity Checking */
+
+  DEBUGASSERT(privep && privep->ep.priv);
+  priv = (FAR struct stm32l4_usbdev_s *)privep->ep.priv;
+
+  uinfo("EP0: bcnt=%d\n", bcnt);
+  usbtrace(TRACE_READ(EP0), bcnt);
+
+  /* Verify that an OUT SETUP request as received before this data was
+   * received in the RxFIFO.
+   */
+
+  if (priv->ep0state == EP0STATE_SETUP_OUT)
+    {
+      /* Read the data into our special buffer for SETUP data */
+
+      int readlen = MIN(CONFIG_USBDEV_SETUP_MAXDATASIZE, bcnt);
+      stm32l4_rxfifo_read(privep, priv->ep0data, readlen);
+
+      /* Do we have to discard any excess bytes? */
+
+      stm32l4_rxfifo_discard(privep,  bcnt - readlen);
+
+      /* Now we can process the setup command */
+
+      privep->active  = false;
+      priv->ep0state  = EP0STATE_SETUP_READY;
+      priv->ep0datlen = readlen;
+
+      stm32l4_ep0out_setup(priv);
+    }
+  else
+    {
+      /* This is an error.  We don't have any idea what to do with the EP0
+       * data in this case.  Just read and discard it so that the RxFIFO
+       * does not become constipated.
+       */
+
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_NOOUTSETUP), priv->ep0state);
+      stm32l4_rxfifo_discard(privep, bcnt);
+      privep->active = false;
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_epout_receive
+ *
+ * Description:
+ *   This function is called from the RXFLVL interrupt handler when new incoming
+ *   data is available in the endpoint's RxFIFO.  This function will simply
+ *   copy the incoming data into pending request's data buffer.
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_epout_receive(FAR struct stm32l4_ep_s *privep,
+                                         int bcnt)
+{
+  struct stm32l4_req_s *privreq;
+  uint8_t *dest;
+  int buflen;
+  int readlen;
+
+  /* Get a reference to the request at the head of the endpoint's request
+   * queue.
+   */
+
+  privreq = stm32l4_rqpeek(privep);
+  if (!privreq)
+    {
+      /* Incoming data is available in the RxFIFO, but there is no read setup
+       * to receive the receive the data.  This should not happen for data
+       * endpoints; those endpoints should have been NAKing any OUT data tokens.
+       *
+       * We should get here normally on OUT data phase following an OUT
+       * SETUP command.  EP0 data will still receive data in this case and it
+       * should not be NAKing.
+       */
+
+      if (privep->epphy == 0)
+        {
+          stm32l4_ep0out_receive(privep, bcnt);
+        }
+      else
+        {
+          /* Otherwise, the data is lost. This really should not happen if
+           * NAKing is working as expected.
+           */
+
+          usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_EPOUTQEMPTY), privep->epphy);
+
+          /* Discard the data in the RxFIFO */
+
+          stm32l4_rxfifo_discard(privep, bcnt);
+        }
+
+      privep->active = false;
+      return;
+    }
+
+  uinfo("EP%d: len=%d xfrd=%d\n", privep->epphy, privreq->req.len, privreq->req.xfrd);
+  usbtrace(TRACE_READ(privep->epphy), bcnt);
+
+  /* Get the number of bytes to transfer from the RxFIFO */
+
+  buflen  = privreq->req.len - privreq->req.xfrd;
+  DEBUGASSERT(buflen > 0 && buflen >= bcnt);
+  readlen = MIN(buflen, bcnt);
+
+  /* Get the destination of the data transfer */
+
+  dest = privreq->req.buf + privreq->req.xfrd;
+
+  /* Transfer the data from the RxFIFO to the request's data buffer */
+
+  stm32l4_rxfifo_read(privep, dest, readlen);
+
+  /* If there were more bytes in the RxFIFO than could be held in the read
+   * request, then we will have to discard those.
+   */
+
+  stm32l4_rxfifo_discard(privep, bcnt - readlen);
+
+  /* Update the number of bytes transferred */
+
+  privreq->req.xfrd += readlen;
+}
+
+/****************************************************************************
+ * Name: stm32l4_epout_request
+ *
+ * Description:
+ *   This function is called when either (1) new read request is received, or
+ *   (2) a pending receive request completes.  If there is no read in pending,
+ *   then this function will initiate the next OUT (read) operation.
+ *
+ ****************************************************************************/
+
+static void stm32l4_epout_request(FAR struct stm32l4_usbdev_s *priv,
+                                  FAR struct stm32l4_ep_s *privep)
+{
+  struct stm32l4_req_s *privreq;
+  uint32_t regaddr;
+  uint32_t regval;
+  uint32_t xfrsize;
+  uint32_t pktcnt;
+
+  /* Make sure that there is not already a pending request request.  If there is,
+   * just return, leaving the newly received request in the request queue.
+   */
+
+  if (!privep->active)
+    {
+      /* Loop until a valid request is found (or the request queue is empty).
+       * The loop is only need to look at the request queue again is an invalid
+       * read request is encountered.
+       */
+
+      for (; ; )
+        {
+          /* Get a reference to the request at the head of the endpoint's request queue */
+
+          privreq = stm32l4_rqpeek(privep);
+          if (!privreq)
+            {
+              usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_EPOUTQEMPTY), privep->epphy);
+
+              /* There are no read requests to be setup.  Configure the hardware to
+               * NAK any incoming packets.  (This should already be the case.  I
+               * think that the hardware will automatically NAK after a transfer is
+               * completed until SNAK is cleared).
+               */
+
+              regaddr = STM32L4_OTGFS_DOEPCTL(privep->epphy);
+              regval  = stm32l4_getreg(regaddr);
+              regval |= OTGFS_DOEPCTL_SNAK;
+              stm32l4_putreg(regval, regaddr);
+
+              /* This endpoint is no longer actively transferring */
+
+              privep->active = false;
+              return;
+            }
+
+          uinfo("EP%d: len=%d\n", privep->epphy, privreq->req.len);
+
+          /* Ignore any attempt to receive a zero length packet (this really
+           * should not happen.
+           */
+
+          if (privreq->req.len <= 0)
+            {
+              usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_EPOUTNULLPACKET), 0);
+              stm32l4_req_complete(privep, OK);
+            }
+
+          /* Otherwise, we have a usable read request... break out of the loop */
+
+          else
+            {
+              break;
+            }
+        }
+
+      /* Setup the pending read into the request buffer.  First calculate:
+       *
+       * pktcnt  = the number of packets (of maxpacket bytes) required to
+       *   perform the transfer.
+       * xfrsize = The total number of bytes required (in units of
+       *   maxpacket bytes).
+       */
+
+      pktcnt  = (privreq->req.len + (privep->ep.maxpacket - 1)) / privep->ep.maxpacket;
+      xfrsize = pktcnt * privep->ep.maxpacket;
+
+      /* Then setup the hardware to perform this transfer */
+
+      regaddr = STM32L4_OTGFS_DOEPTSIZ(privep->epphy);
+      regval  = stm32l4_getreg(regaddr);
+      regval &= ~(OTGFS_DOEPTSIZ_XFRSIZ_MASK | OTGFS_DOEPTSIZ_PKTCNT_MASK);
+      regval |= (xfrsize << OTGFS_DOEPTSIZ_XFRSIZ_SHIFT);
+      regval |= (pktcnt  << OTGFS_DOEPTSIZ_PKTCNT_SHIFT);
+      stm32l4_putreg(regval, regaddr);
+
+      /* Then enable the transfer */
+
+      regaddr = STM32L4_OTGFS_DOEPCTL(privep->epphy);
+      regval  = stm32l4_getreg(regaddr);
+
+      /* When an isochronous transfer is enabled the Even/Odd frame bit must
+       * also be set appropriately.
+       */
+
+#ifdef CONFIG_USBDEV_ISOCHRONOUS
+      if (privep->eptype == USB_EP_ATTR_XFER_ISOC)
+        {
+          if (privep->odd)
+            {
+              regval |= OTGFS_DOEPCTL_SODDFRM;
+            }
+          else
+            {
+              regval |= OTGFS_DOEPCTL_SEVNFRM;
+            }
+        }
+#endif
+
+      /* Clearing NAKing and enable the transfer. */
+
+      regval |= (OTGFS_DOEPCTL_CNAK | OTGFS_DOEPCTL_EPENA);
+      stm32l4_putreg(regval, regaddr);
+
+      /* A transfer is now active on this endpoint */
+
+      privep->active = true;
+
+      /* EP0 is a special case.  We need to know when to switch back to
+       * normal SETUP processing.
+       */
+
+      if (privep->epphy == EP0)
+        {
+          priv->ep0state = EP0STATE_DATA_OUT;
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep_flush
+ *
+ * Description:
+ *   Flush any primed descriptors from this ep
+ *
+ ****************************************************************************/
+
+static void stm32l4_ep_flush(struct stm32l4_ep_s *privep)
+{
+  if (privep->isin)
+    {
+      stm32l4_txfifo_flush(OTGFS_GRSTCTL_TXFNUM_D(privep->epphy));
+    }
+  else
+    {
+      stm32l4_rxfifo_flush();
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_req_complete
+ *
+ * Description:
+ *   Handle termination of the request at the head of the endpoint request queue.
+ *
+ ****************************************************************************/
+
+static void stm32l4_req_complete(struct stm32l4_ep_s *privep, int16_t result)
+{
+  FAR struct stm32l4_req_s *privreq;
+
+  /* Remove the request at the head of the request list */
+
+  privreq = stm32l4_req_remfirst(privep);
+  DEBUGASSERT(privreq != NULL);
+
+  /* If endpoint 0, temporarily reflect the state of protocol stalled
+   * in the callback.
+   */
+
+  bool stalled = privep->stalled;
+  if (privep->epphy == EP0)
+    {
+      privep->stalled = privep->dev->stalled;
+    }
+
+  /* Save the result in the request structure */
+
+  privreq->req.result = result;
+
+  /* Callback to the request completion handler */
+
+  privreq->req.callback(&privep->ep, &privreq->req);
+
+  /* Restore the stalled indication */
+
+  privep->stalled = stalled;
+}
+
+/****************************************************************************
+ * Name: stm32l4_req_cancel
+ *
+ * Description:
+ *   Cancel all pending requests for an endpoint
+ *
+ ****************************************************************************/
+
+static void stm32l4_req_cancel(struct stm32l4_ep_s *privep, int16_t status)
+{
+  if (!stm32l4_rqempty(privep))
+    {
+      stm32l4_ep_flush(privep);
+    }
+
+  while (!stm32l4_rqempty(privep))
+    {
+      usbtrace(TRACE_COMPLETE(privep->epphy),
+               (stm32l4_rqpeek(privep))->req.xfrd);
+      stm32l4_req_complete(privep, status);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep_findbyaddr
+ *
+ * Description:
+ *   Find the physical endpoint structure corresponding to a logic endpoint
+ *   address
+ *
+ ****************************************************************************/
+
+static struct stm32l4_ep_s *stm32l4_ep_findbyaddr(struct stm32l4_usbdev_s *priv,
+                                                  uint16_t eplog)
+{
+  struct stm32l4_ep_s *privep;
+  uint8_t epphy = USB_EPNO(eplog);
+
+  if (epphy >= STM32L4_NENDPOINTS)
+    {
+      return NULL;
+    }
+
+  /* Is this an IN or an OUT endpoint? */
+
+  if (USB_ISEPIN(eplog))
+    {
+      privep = &priv->epin[epphy];
+    }
+  else
+    {
+      privep = &priv->epout[epphy];
+    }
+
+  /* Return endpoint reference */
+
+  DEBUGASSERT(privep->epphy == epphy);
+  return privep;
+}
+
+/****************************************************************************
+ * Name: stm32l4_req_dispatch
+ *
+ * Description:
+ *   Provide unhandled setup actions to the class driver. This is logically part
+ *   of the USB interrupt handler.
+ *
+ ****************************************************************************/
+
+static int stm32l4_req_dispatch(struct stm32l4_usbdev_s *priv,
+                                const struct usb_ctrlreq_s *ctrl)
+{
+  int ret = -EIO;
+
+  usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_DISPATCH), 0);
+  if (priv->driver)
+    {
+      /* Forward to the control request to the class driver implementation */
+
+      ret = CLASS_SETUP(priv->driver, &priv->usbdev, ctrl,
+                        priv->ep0data, priv->ep0datlen);
+    }
+
+  if (ret < 0)
+    {
+      /* Stall on failure */
+
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_DISPATCHSTALL), 0);
+      priv->stalled = true;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32l4_usbreset
+ *
+ * Description:
+ *   Reset Usb engine
+ *
+ ****************************************************************************/
+
+static void stm32l4_usbreset(struct stm32l4_usbdev_s *priv)
+{
+  FAR struct stm32l4_ep_s *privep;
+  uint32_t regval;
+  int i;
+
+  /* Clear the Remote Wake-up Signaling */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_DCTL);
+  regval &= ~OTGFS_DCTL_RWUSIG;
+  stm32l4_putreg(regval, STM32L4_OTGFS_DCTL);
+
+  /* Flush the EP0 Tx FIFO */
+
+  stm32l4_txfifo_flush(OTGFS_GRSTCTL_TXFNUM_D(EP0));
+
+  /* Tell the class driver that we are disconnected. The class
+   * driver should then accept any new configurations.
+   */
+
+  if (priv->driver)
+    {
+      CLASS_DISCONNECT(priv->driver, &priv->usbdev);
+    }
+
+  /* Mark all endpoints as available */
+
+  priv->epavail[0] = STM32L4_EP_AVAILABLE;
+  priv->epavail[1] = STM32L4_EP_AVAILABLE;
+
+  /* Disable all end point interrupts */
+
+  for (i = 0; i < STM32L4_NENDPOINTS ; i++)
+    {
+      /* Disable endpoint interrupts */
+
+      stm32l4_putreg(0xff, STM32L4_OTGFS_DIEPINT(i));
+      stm32l4_putreg(0xff, STM32L4_OTGFS_DOEPINT(i));
+
+      /* Return write requests to the class implementation */
+
+      privep = &priv->epin[i];
+      stm32l4_req_cancel(privep, -ESHUTDOWN);
+
+      /* Reset IN endpoint status */
+
+      privep->stalled = false;
+
+      /* Return read requests to the class implementation */
+
+      privep = &priv->epout[i];
+      stm32l4_req_cancel(privep, -ESHUTDOWN);
+
+      /* Reset endpoint status */
+
+      privep->stalled = false;
+    }
+
+  stm32l4_putreg(0xffffffff, STM32L4_OTGFS_DAINT);
+
+  /* Mask all device endpoint interrupts except EP0 */
+
+  regval = (OTGFS_DAINT_IEP(EP0) | OTGFS_DAINT_OEP(EP0));
+  stm32l4_putreg(regval, STM32L4_OTGFS_DAINTMSK);
+
+  /* Unmask OUT interrupts */
+
+  regval = (OTGFS_DOEPMSK_XFRCM | OTGFS_DOEPMSK_STUPM | OTGFS_DOEPMSK_EPDM);
+  stm32l4_putreg(regval, STM32L4_OTGFS_DOEPMSK);
+
+  /* Unmask IN interrupts */
+
+  regval = (OTGFS_DIEPMSK_XFRCM | OTGFS_DIEPMSK_EPDM | OTGFS_DIEPMSK_TOM);
+  stm32l4_putreg(regval, STM32L4_OTGFS_DIEPMSK);
+
+  /* Reset device address to 0 */
+
+  stm32l4_setaddress(priv, 0);
+  priv->devstate = DEVSTATE_DEFAULT;
+  priv->usbdev.speed = USB_SPEED_FULL;
+
+  /* Re-configure EP0 */
+
+  stm32l4_ep0_configure(priv);
+
+  /* Setup EP0 to receive SETUP packets */
+
+  stm32l4_ep0out_ctrlsetup(priv);
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep0out_testmode
+ *
+ * Description:
+ *   Select test mode
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_ep0out_testmode(FAR struct stm32l4_usbdev_s *priv,
+                                           uint16_t index)
+{
+  uint8_t testmode;
+
+  testmode = index >> 8;
+  switch (testmode)
+    {
+    case 1:
+      priv->testmode = OTGFS_TESTMODE_J;
+      break;
+
+    case 2:
+      priv->testmode = OTGFS_TESTMODE_K;
+      break;
+
+    case 3:
+      priv->testmode = OTGFS_TESTMODE_SE0_NAK;
+      break;
+
+    case 4:
+      priv->testmode = OTGFS_TESTMODE_PACKET;
+      break;
+
+    case 5:
+      priv->testmode = OTGFS_TESTMODE_FORCE;
+      break;
+
+    default:
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADTESTMODE), testmode);
+      priv->dotest   = false;
+      priv->testmode = OTGFS_TESTMODE_DISABLED;
+      priv->stalled  = true;
+    }
+
+  priv->dotest = true;
+  stm32l4_ep0in_transmitzlp(priv);
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep0out_stdrequest
+ *
+ * Description:
+ *   Handle a standard request on EP0.  Pick off the things of interest to the
+ *   USB device controller driver; pass what is left to the class driver.
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_ep0out_stdrequest(struct stm32l4_usbdev_s *priv,
+                                             FAR struct stm32l4_ctrlreq_s *ctrlreq)
+{
+  FAR struct stm32l4_ep_s *privep;
+
+  /* Handle standard request */
+
+  switch (ctrlreq->req)
+    {
+    case USB_REQ_GETSTATUS:
+      {
+        /* type:  device-to-host; recipient = device, interface, endpoint
+         * value: 0
+         * index: zero interface endpoint
+         * len:   2; data = status
+         */
+
+        usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_GETSTATUS), 0);
+        if (!priv->addressed ||
+             ctrlreq->len != 2 ||
+            USB_REQ_ISOUT(ctrlreq->type) ||
+            ctrlreq->value != 0)
+          {
+            priv->stalled = true;
+          }
+        else
+          {
+            switch (ctrlreq->type & USB_REQ_RECIPIENT_MASK)
+              {
+              case USB_REQ_RECIPIENT_ENDPOINT:
+                {
+                  usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPGETSTATUS), 0);
+                  privep = stm32l4_ep_findbyaddr(priv, ctrlreq->index);
+                  if (!privep)
+                    {
+                      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADEPGETSTATUS), 0);
+                      priv->stalled = true;
+                    }
+                  else
+                    {
+                      if (privep->stalled)
+                        {
+                          priv->ep0data[0] = (1 << USB_FEATURE_ENDPOINTHALT);
+                        }
+                      else
+                        {
+                          priv->ep0data[0] = 0; /* Not stalled */
+                        }
+
+                      priv->ep0data[1] = 0;
+                      stm32l4_ep0in_setupresponse(priv, priv->ep0data, 2);
+                    }
+                }
+                break;
+
+              case USB_REQ_RECIPIENT_DEVICE:
+                {
+                  if (ctrlreq->index == 0)
+                    {
+                      usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_DEVGETSTATUS), 0);
+
+                      /* Features:  Remote Wakeup and self-powered */
+
+                      priv->ep0data[0]  = (priv->selfpowered << USB_FEATURE_SELFPOWERED);
+                      priv->ep0data[0] |= (priv->wakeup      << USB_FEATURE_REMOTEWAKEUP);
+                      priv->ep0data[1]  = 0;
+
+                      stm32l4_ep0in_setupresponse(priv, priv->ep0data, 2);
+                    }
+                  else
+                    {
+                      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADDEVGETSTATUS), 0);
+                      priv->stalled = true;
+                    }
+                }
+                break;
+
+              case USB_REQ_RECIPIENT_INTERFACE:
+                {
+                  usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_IFGETSTATUS), 0);
+                  priv->ep0data[0] = 0;
+                  priv->ep0data[1] = 0;
+
+                  stm32l4_ep0in_setupresponse(priv, priv->ep0data, 2);
+                }
+                break;
+
+              default:
+                {
+                  usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADGETSTATUS), 0);
+                  priv->stalled = true;
+                }
+                break;
+              }
+          }
+      }
+      break;
+
+    case USB_REQ_CLEARFEATURE:
+      {
+        /* type:  host-to-device; recipient = device, interface or endpoint
+         * value: feature selector
+         * index: zero interface endpoint;
+         * len:   zero, data = none
+         */
+
+        usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_CLEARFEATURE), 0);
+        if (priv->addressed != 0 && ctrlreq->len == 0)
+          {
+            uint8_t recipient = ctrlreq->type & USB_REQ_RECIPIENT_MASK;
+            if (recipient == USB_REQ_RECIPIENT_ENDPOINT &&
+                ctrlreq->value == USB_FEATURE_ENDPOINTHALT &&
+                (privep = stm32l4_ep_findbyaddr(priv, ctrlreq->index)) != NULL)
+              {
+                stm32l4_ep_clrstall(privep);
+                stm32l4_ep0in_transmitzlp(priv);
+              }
+            else if (recipient == USB_REQ_RECIPIENT_DEVICE &&
+                     ctrlreq->value == USB_FEATURE_REMOTEWAKEUP)
+              {
+                priv->wakeup = 0;
+                stm32l4_ep0in_transmitzlp(priv);
+              }
+            else
+              {
+                /* Actually, I think we could just stall here. */
+
+                (void)stm32l4_req_dispatch(priv, &priv->ctrlreq);
+              }
+          }
+        else
+          {
+            usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADCLEARFEATURE), 0);
+            priv->stalled = true;
+          }
+      }
+      break;
+
+    case USB_REQ_SETFEATURE:
+      {
+        /* type:  host-to-device; recipient = device, interface, endpoint
+         * value: feature selector
+         * index: zero interface endpoint;
+         * len:   0; data = none
+         */
+
+        usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SETFEATURE), 0);
+        if (priv->addressed != 0 && ctrlreq->len == 0)
+          {
+            uint8_t recipient = ctrlreq->type & USB_REQ_RECIPIENT_MASK;
+            if (recipient == USB_REQ_RECIPIENT_ENDPOINT &&
+                ctrlreq->value == USB_FEATURE_ENDPOINTHALT &&
+                (privep = stm32l4_ep_findbyaddr(priv, ctrlreq->index)) != NULL)
+              {
+                stm32l4_ep_setstall(privep);
+                stm32l4_ep0in_transmitzlp(priv);
+              }
+            else if (recipient == USB_REQ_RECIPIENT_DEVICE &&
+                     ctrlreq->value == USB_FEATURE_REMOTEWAKEUP)
+              {
+                priv->wakeup = 1;
+                stm32l4_ep0in_transmitzlp(priv);
+              }
+            else if (recipient == USB_REQ_RECIPIENT_DEVICE &&
+                     ctrlreq->value == USB_FEATURE_TESTMODE &&
+                     ((ctrlreq->index & 0xff) == 0))
+              {
+                 stm32l4_ep0out_testmode(priv, ctrlreq->index);
+              }
+            else if (priv->configured)
+              {
+                /* Actually, I think we could just stall here. */
+
+                (void)stm32l4_req_dispatch(priv, &priv->ctrlreq);
+              }
+            else
+              {
+                usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADSETFEATURE), 0);
+                priv->stalled = true;
+              }
+          }
+        else
+          {
+            usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADSETFEATURE), 0);
+            priv->stalled = true;
+          }
+      }
+      break;
+
+    case USB_REQ_SETADDRESS:
+      {
+        /* type:  host-to-device; recipient = device
+         * value: device address
+         * index: 0
+         * len:   0; data = none
+         */
+
+        usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SETADDRESS), ctrlreq->value);
+        if ((ctrlreq->type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE &&
+            ctrlreq->index  == 0 &&
+            ctrlreq->len == 0 &&
+            ctrlreq->value < 128 &&
+            priv->devstate != DEVSTATE_CONFIGURED)
+          {
+            /* Save the address.  We cannot actually change to the next address until
+             * the completion of the status phase.
+             */
+
+            stm32l4_setaddress(priv, (uint16_t)priv->ctrlreq.value[0]);
+            stm32l4_ep0in_transmitzlp(priv);
+          }
+        else
+          {
+            usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADSETADDRESS), 0);
+            priv->stalled = true;
+          }
+      }
+      break;
+
+    case USB_REQ_GETDESCRIPTOR:
+      /* type:  device-to-host; recipient = device
+       * value: descriptor type and index
+       * index: 0 or language ID;
+       * len:   descriptor len; data = descriptor
+       */
+
+    case USB_REQ_SETDESCRIPTOR:
+      /* type:  host-to-device; recipient = device
+       * value: descriptor type and index
+       * index: 0 or language ID;
+       * len:   descriptor len; data = descriptor
+       */
+
+      {
+        usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_GETSETDESC), 0);
+        if ((ctrlreq->type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE)
+          {
+            (void)stm32l4_req_dispatch(priv, &priv->ctrlreq);
+          }
+        else
+          {
+            usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADGETSETDESC), 0);
+            priv->stalled = true;
+          }
+      }
+      break;
+
+    case USB_REQ_GETCONFIGURATION:
+      /* type:  device-to-host; recipient = device
+       * value: 0;
+       * index: 0;
+       * len:   1; data = configuration value
+       */
+
+      {
+        usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_GETCONFIG), 0);
+        if (priv->addressed &&
+           (ctrlreq->type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE &&
+            ctrlreq->value == 0 &&
+            ctrlreq->index == 0 &&
+            ctrlreq->len == 1)
+          {
+            (void)stm32l4_req_dispatch(priv, &priv->ctrlreq);
+          }
+        else
+          {
+            usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADGETCONFIG), 0);
+            priv->stalled = true;
+          }
+      }
+      break;
+
+    case USB_REQ_SETCONFIGURATION:
+      /* type:  host-to-device; recipient = device
+       * value: configuration value
+       * index: 0;
+       * len:   0; data = none
+       */
+
+      {
+        usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SETCONFIG), 0);
+        if (priv->addressed &&
+            (ctrlreq->type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE &&
+            ctrlreq->index == 0 &&
+            ctrlreq->len == 0)
+          {
+            /* Give the configuration to the class driver */
+
+            int ret = stm32l4_req_dispatch(priv, &priv->ctrlreq);
+
+            /* If the class driver accepted the configuration, then mark the
+             * device state as configured (or not, depending on the
+             * configuration).
+             */
+
+            if (ret == OK)
+              {
+                uint8_t cfg = (uint8_t)ctrlreq->value;
+                if (cfg != 0)
+                  {
+                    priv->devstate   = DEVSTATE_CONFIGURED;
+                    priv->configured = true;
+                  }
+                else
+                  {
+                    priv->devstate   = DEVSTATE_ADDRESSED;
+                    priv->configured = false;
+                  }
+              }
+          }
+        else
+          {
+            usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADSETCONFIG), 0);
+            priv->stalled = true;
+          }
+      }
+      break;
+
+    case USB_REQ_GETINTERFACE:
+      /* type:  device-to-host; recipient = interface
+       * value: 0
+       * index: interface;
+       * len:   1; data = alt interface
+       */
+
+    case USB_REQ_SETINTERFACE:
+      /* type:  host-to-device; recipient = interface
+       * value: alternate setting
+       * index: interface;
+       * len:   0; data = none
+       */
+
+      {
+        usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_GETSETIF), 0);
+        (void)stm32l4_req_dispatch(priv, &priv->ctrlreq);
+      }
+      break;
+
+    case USB_REQ_SYNCHFRAME:
+      /* type:  device-to-host; recipient = endpoint
+       * value: 0
+       * index: endpoint;
+       * len:   2; data = frame number
+       */
+
+      {
+        usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SYNCHFRAME), 0);
+      }
+      break;
+
+    default:
+      {
+        usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDCTRLREQ), 0);
+        priv->stalled = true;
+      }
+      break;
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep0out_setup
+ *
+ * Description:
+ *   USB Ctrl EP Setup Event. This is logically part of the USB interrupt
+ *   handler.  This event occurs when a setup packet is receive on EP0 OUT.
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_ep0out_setup(struct stm32l4_usbdev_s *priv)
+{
+  struct stm32l4_ctrlreq_s ctrlreq;
+
+  /* Verify that a SETUP was received */
+
+  if (priv->ep0state != EP0STATE_SETUP_READY)
+    {
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_EP0NOSETUP), priv->ep0state);
+      return;
+    }
+
+  /* Terminate any pending requests */
+
+  stm32l4_req_cancel(&priv->epout[EP0], -EPROTO);
+  stm32l4_req_cancel(&priv->epin[EP0],  -EPROTO);
+
+  /* Assume NOT stalled */
+
+  priv->epout[EP0].stalled = false;
+  priv->epin[EP0].stalled = false;
+  priv->stalled = false;
+
+  /* Starting to process a control request - update state */
+
+  priv->ep0state = EP0STATE_SETUP_PROCESS;
+
+  /* And extract the little-endian 16-bit values to host order */
+
+  ctrlreq.type  = priv->ctrlreq.type;
+  ctrlreq.req   = priv->ctrlreq.req;
+  ctrlreq.value = GETUINT16(priv->ctrlreq.value);
+  ctrlreq.index = GETUINT16(priv->ctrlreq.index);
+  ctrlreq.len   = GETUINT16(priv->ctrlreq.len);
+
+  uinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+          ctrlreq.type, ctrlreq.req, ctrlreq.value, ctrlreq.index, ctrlreq.len);
+
+  /* Check for a standard request */
+
+  if ((ctrlreq.type & USB_REQ_TYPE_MASK) != USB_REQ_TYPE_STANDARD)
+    {
+      /* Dispatch any non-standard requests */
+
+      (void)stm32l4_req_dispatch(priv, &priv->ctrlreq);
+    }
+  else
+    {
+      /* Handle standard requests. */
+
+      stm32l4_ep0out_stdrequest(priv, &ctrlreq);
+    }
+
+  /* Check if the setup processing resulted in a STALL */
+
+  if (priv->stalled)
+    {
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_EP0SETUPSTALLED), priv->ep0state);
+      stm32l4_ep0_stall(priv);
+    }
+
+  /* Reset state/data associated with thie SETUP request */
+
+   priv->ep0datlen = 0;
+}
+
+/****************************************************************************
+ * Name: stm32l4_epout
+ *
+ * Description:
+ *   This is part of the OUT endpoint interrupt processing.  This function
+ *   handles the OUT event for a single endpoint.
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_epout(FAR struct stm32l4_usbdev_s *priv,
+                                 uint8_t epno)
+{
+  FAR struct stm32l4_ep_s *privep;
+
+  /* Endpoint 0 is a special case. */
+
+  if (epno == 0)
+    {
+      privep = &priv->epout[EP0];
+
+      /* In the EP0STATE_DATA_OUT state, we are receiving data into the
+       * request buffer.  In that case, we must continue the request
+       * processing.
+       */
+
+      if (priv->ep0state == EP0STATE_DATA_OUT)
+        {
+          /* Continue processing data from the EP0 OUT request queue */
+
+          stm32l4_epout_complete(priv, privep);
+
+          /* If we are not actively processing an OUT request, then we
+           * need to setup to receive the next control request.
+           */
+
+          if (!privep->active)
+            {
+              stm32l4_ep0out_ctrlsetup(priv);
+              priv->ep0state = EP0STATE_IDLE;
+            }
+        }
+    }
+
+  /* For other endpoints, the only possibility is that we are continuing
+   * or finishing an OUT request.
+   */
+
+  else if (priv->devstate == DEVSTATE_CONFIGURED)
+    {
+      stm32l4_epout_complete(priv, &priv->epout[epno]);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_epout_interrupt
+ *
+ * Description:
+ *   USB OUT endpoint interrupt handler.  The core generates this interrupt when
+ *   there is an interrupt is pending on one of the OUT endpoints of the core.
+ *   The driver must read the OTGFS DAINT register to determine the exact number
+ *   of the OUT endpoint on which the interrupt occurred, and then read the
+ *   corresponding OTGFS DOEPINTx register to determine the exact cause of the
+ *   interrupt.
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_epout_interrupt(FAR struct stm32l4_usbdev_s *priv)
+{
+  uint32_t daint;
+  uint32_t regval;
+  uint32_t doepint;
+  int epno;
+
+  /* Get the pending, enabled interrupts for the OUT endpoint from the endpoint
+   * interrupt status register.
+   */
+
+  regval  = stm32l4_getreg(STM32L4_OTGFS_DAINT);
+  regval &= stm32l4_getreg(STM32L4_OTGFS_DAINTMSK);
+  daint   = (regval & OTGFS_DAINT_OEP_MASK) >> OTGFS_DAINT_OEP_SHIFT;
+
+  if (daint == 0)
+    {
+      /* We got an interrupt, but there is no unmasked endpoint that caused
+       * it ?!  When this happens, the interrupt flag never gets cleared and
+       * we are stuck in infinite interrupt loop.
+       *
+       * This shouldn't happen if we are diligent about handling timing
+       * issues when masking endpoint interrupts. However, this workaround
+       * avoids infinite loop and allows operation to continue normally.  It
+       * works by clearing each endpoint flags, masked or not.
+       */
+
+      regval  = stm32l4_getreg(STM32L4_OTGFS_DAINT);
+      daint   = (regval & OTGFS_DAINT_OEP_MASK) >> OTGFS_DAINT_OEP_SHIFT;
+
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_EPOUTUNEXPECTED),
+               (uint16_t)regval);
+
+      epno = 0;
+      while (daint)
+        {
+          if ((daint & 1) != 0)
+            {
+              regval = stm32l4_getreg(STM32L4_OTGFS_DOEPINT(epno));
+              uinfo("DOEPINT(%d) = %08x\n", epno, regval);
+              stm32l4_putreg(0xFF, STM32L4_OTGFS_DOEPINT(epno));
+            }
+
+          epno++;
+          daint >>= 1;
+        }
+
+      return;
+    }
+
+  /* Process each pending IN endpoint interrupt */
+
+  epno = 0;
+  while (daint)
+    {
+      /* Is an OUT interrupt pending for this endpoint? */
+
+      if ((daint & 1) != 0)
+        {
+          /* Yes.. get the OUT endpoint interrupt status */
+
+          doepint  = stm32l4_getreg(STM32L4_OTGFS_DOEPINT(epno));
+          doepint &= stm32l4_getreg(STM32L4_OTGFS_DOEPMSK);
+
+          /* Transfer completed interrupt.  This interrupt is trigged when
+           * stm32l4_rxinterrupt() removes the last packet data from the RxFIFO.
+           * In this case, core internally sets the NAK bit for this endpoint to
+           * prevent it from receiving any more packets.
+           */
+
+          if ((doepint & OTGFS_DOEPINT_XFRC) != 0)
+            {
+              usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPOUT_XFRC),
+                       (uint16_t)doepint);
+
+              /* Clear the bit in DOEPINTn for this interrupt */
+
+              stm32l4_putreg(OTGFS_DOEPINT_XFRC, STM32L4_OTGFS_DOEPINT(epno));
+
+              /* Handle the RX transfer data ready event */
+
+              stm32l4_epout(priv, epno);
+            }
+
+          /* Endpoint disabled interrupt (ignored because this interrupt is
+           * used in polled mode by the endpoint disable logic).
+           */
+#if 1
+          /* REVISIT: */
+          if ((doepint & OTGFS_DOEPINT_EPDISD) != 0)
+            {
+              usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPOUT_EPDISD),
+                       (uint16_t)doepint);
+
+              /* Clear the bit in DOEPINTn for this interrupt */
+
+              stm32l4_putreg(OTGFS_DOEPINT_EPDISD, STM32L4_OTGFS_DOEPINT(epno));
+            }
+#endif
+          /* Setup Phase Done (control EPs) */
+
+          if ((doepint & OTGFS_DOEPINT_SETUP) != 0)
+            {
+              usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPOUT_SETUP),
+                       priv->ep0state);
+
+              /* Handle the receipt of the IN SETUP packets now (OUT setup
+               * packet processing may be delayed until the accompanying
+               * OUT DATA is received)
+               */
+
+              if (priv->ep0state == EP0STATE_SETUP_READY)
+                {
+                  stm32l4_ep0out_setup(priv);
+                }
+
+              stm32l4_putreg(OTGFS_DOEPINT_SETUP, STM32L4_OTGFS_DOEPINT(epno));
+            }
+        }
+
+      epno++;
+      daint >>= 1;
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_epin_runtestmode
+ *
+ * Description:
+ *   Execute the test mode setup by the SET FEATURE request
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_epin_runtestmode(FAR struct stm32l4_usbdev_s *priv)
+{
+  uint32_t regval = stm32l4_getreg(STM32L4_OTGFS_DCTL);
+  regval &= OTGFS_DCTL_TCTL_MASK;
+  regval |= (uint32_t)priv->testmode << OTGFS_DCTL_TCTL_SHIFT;
+  stm32l4_putreg(regval , STM32L4_OTGFS_DCTL);
+
+  priv->dotest = 0;
+  priv->testmode = OTGFS_TESTMODE_DISABLED;
+}
+
+/****************************************************************************
+ * Name: stm32l4_epin
+ *
+ * Description:
+ *   This is part of the IN endpoint interrupt processing.  This function
+ *   handles the IN event for a single endpoint.
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_epin(FAR struct stm32l4_usbdev_s *priv,
+                                uint8_t epno)
+{
+  FAR struct stm32l4_ep_s *privep = &priv->epin[epno];
+
+  /* Endpoint 0 is a special case. */
+
+  if (epno == 0)
+    {
+      /* In the EP0STATE_DATA_IN state, we are sending data from request
+       * buffer.  In that case, we must continue the request processing.
+       */
+
+      if (priv->ep0state == EP0STATE_DATA_IN)
+        {
+          /* Continue processing data from the EP0 OUT request queue */
+
+          stm32l4_epin_request(priv, privep);
+
+          /* If we are not actively processing an OUT request, then we
+           * need to setup to receive the next control request.
+           */
+
+          if (!privep->active)
+            {
+              stm32l4_ep0out_ctrlsetup(priv);
+              priv->ep0state = EP0STATE_IDLE;
+            }
+        }
+
+      /* Test mode is another special case */
+
+      if (priv->dotest)
+        {
+          stm32l4_epin_runtestmode(priv);
+        }
+    }
+
+  /* For other endpoints, the only possibility is that we are continuing
+   * or finishing an IN request.
+   */
+
+  else if (priv->devstate == DEVSTATE_CONFIGURED)
+    {
+      /* Continue processing data from the endpoint write request queue */
+
+      stm32l4_epin_request(priv, privep);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_epin_txfifoempty
+ *
+ * Description:
+ *   TxFIFO empty interrupt handling
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_epin_txfifoempty(FAR struct stm32l4_usbdev_s *priv,
+                                            int epno)
+{
+  FAR struct stm32l4_ep_s *privep = &priv->epin[epno];
+
+  /* Continue processing the write request queue.  This may mean sending
+   * more data from the existing request or terminating the current requests
+   * and (perhaps) starting the IN transfer from the next write request.
+   */
+
+  stm32l4_epin_request(priv, privep);
+}
+
+/****************************************************************************
+ * Name: stm32l4_epin_interrupt
+ *
+ * Description:
+ *   USB IN endpoint interrupt handler.  The core generates this interrupt when
+ *   an interrupt is pending on one of the IN endpoints of the core. The driver
+ *   must read the OTGFS DAINT register to determine the exact number of the IN
+ *   endpoint on which the interrupt occurred, and then read the corresponding
+ *   OTGFS DIEPINTx register to determine the exact cause of the interrupt.
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_epin_interrupt(FAR struct stm32l4_usbdev_s *priv)
+{
+  uint32_t diepint;
+  uint32_t daint;
+  uint32_t mask;
+  uint32_t empty;
+  int epno;
+
+  /* Get the pending, enabled interrupts for the IN endpoint from the endpoint
+   * interrupt status register.
+   */
+
+  daint  = stm32l4_getreg(STM32L4_OTGFS_DAINT);
+  daint &= stm32l4_getreg(STM32L4_OTGFS_DAINTMSK);
+  daint &= OTGFS_DAINT_IEP_MASK;
+
+  if (daint == 0)
+    {
+      /* We got an interrupt, but there is no unmasked endpoint that caused
+       * it ?!  When this happens, the interrupt flag never gets cleared and
+       * we are stuck in infinite interrupt loop.
+       *
+       * This shouldn't happen if we are diligent about handling timing
+       * issues when masking endpoint interrupts. However, this workaround
+       * avoids infinite loop and allows operation to continue normally.  It
+       * works by clearing each endpoint flags, masked or not.
+       */
+
+      daint  = stm32l4_getreg(STM32L4_OTGFS_DAINT);
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_EPINUNEXPECTED),
+               (uint16_t)daint);
+
+      daint &= OTGFS_DAINT_IEP_MASK;
+      epno = 0;
+
+      while (daint)
+        {
+          if ((daint & 1) != 0)
+            {
+              uerr("DIEPINT(%d) = %08x\n",
+                     epno, stm32l4_getreg(STM32L4_OTGFS_DIEPINT(epno)));
+              stm32l4_putreg(0xFF, STM32L4_OTGFS_DIEPINT(epno));
+            }
+
+          epno++;
+          daint >>= 1;
+        }
+
+      return;
+    }
+
+  /* Process each pending IN endpoint interrupt */
+
+  epno = 0;
+  while (daint)
+    {
+      /* Is an IN interrupt pending for this endpoint? */
+
+      if ((daint & 1) != 0)
+        {
+          /* Get IN interrupt mask register.  Bits 0-6 correspond to enabled
+           * interrupts as will be found in the DIEPINT interrupt status
+           * register.
+           */
+
+          mask = stm32l4_getreg(STM32L4_OTGFS_DIEPMSK);
+
+          /* Check if the TxFIFO not empty interrupt is enabled for this
+           * endpoint in the DIEPMSK register.  Bits n corresponds to
+           * endpoint n in the register. That condition corresponds to
+           * bit 7 of the DIEPINT interrupt status register.  There is
+           * no TXFE bit in the mask register, so we fake one here.
+           */
+
+          empty = stm32l4_getreg(STM32L4_OTGFS_DIEPEMPMSK);
+          if ((empty & OTGFS_DIEPEMPMSK(epno)) != 0)
+            {
+              mask |= OTGFS_DIEPINT_TXFE;
+            }
+
+          /* Now, read the interrupt status and mask out all disabled
+           * interrupts.
+           */
+
+          diepint = stm32l4_getreg(STM32L4_OTGFS_DIEPINT(epno)) & mask;
+
+          /* Decode and process the enabled, pending interrupts */
+          /* Transfer completed interrupt */
+
+          if ((diepint & OTGFS_DIEPINT_XFRC) != 0)
+            {
+              usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPIN_XFRC),
+                       (uint16_t)diepint);
+
+              /* It is possible that logic may be waiting for a the
+               * TxFIFO to become empty.  We disable the TxFIFO empty
+               * interrupt here; it will be re-enabled if there is still
+               * insufficient space in the TxFIFO.
+               */
+
+              empty &= ~OTGFS_DIEPEMPMSK(epno);
+              stm32l4_putreg(empty, STM32L4_OTGFS_DIEPEMPMSK);
+              stm32l4_putreg(OTGFS_DIEPINT_XFRC, STM32L4_OTGFS_DIEPINT(epno));
+
+              /* IN transfer complete */
+
+              stm32l4_epin(priv, epno);
+            }
+
+          /* Timeout condition */
+
+          if ((diepint & OTGFS_DIEPINT_TOC) != 0)
+            {
+              usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPIN_TOC), (uint16_t)diepint);
+              stm32l4_putreg(OTGFS_DIEPINT_TOC, STM32L4_OTGFS_DIEPINT(epno));
+            }
+
+          /* IN token received when TxFIFO is empty.  Applies to non-periodic IN
+           * endpoints only.  This interrupt indicates that an IN token was received
+           * when the associated TxFIFO (periodic/non-periodic) was empty. This
+           * interrupt is asserted on the endpoint for which the IN token was
+           * received.
+           */
+
+          if ((diepint & OTGFS_DIEPINT_ITTXFE) != 0)
+            {
+              usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPIN_ITTXFE), (uint16_t)diepint);
+              stm32l4_epin_request(priv, &priv->epin[epno]);
+              stm32l4_putreg(OTGFS_DIEPINT_ITTXFE, STM32L4_OTGFS_DIEPINT(epno));
+            }
+
+          /* IN endpoint NAK effective (ignored as this used only in polled
+           * mode)
+           */
+#if 0
+          if ((diepint & OTGFS_DIEPINT_INEPNE) != 0)
+            {
+              usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPIN_INEPNE), (uint16_t)diepint);
+              stm32l4_putreg(OTGFS_DIEPINT_INEPNE, STM32L4_OTGFS_DIEPINT(epno));
+            }
+#endif
+          /* Endpoint disabled interrupt (ignored as this used only in polled
+           * mode)
+           */
+#if 0
+          if ((diepint & OTGFS_DIEPINT_EPDISD) != 0)
+            {
+              usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPIN_EPDISD), (uint16_t)diepint);
+              stm32l4_putreg(OTGFS_DIEPINT_EPDISD, STM32L4_OTGFS_DIEPINT(epno));
+            }
+#endif
+          /* Transmit FIFO empty */
+
+          if ((diepint & OTGFS_DIEPINT_TXFE) != 0)
+            {
+              usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPIN_TXFE), (uint16_t)diepint);
+
+              /* If we were waiting for TxFIFO to become empty, the we might have both
+               * XFRC and TXFE interrupts pending.  Since we do the same thing for both
+               * cases, ignore the TXFE if we have already processed the XFRC.
+               */
+
+              if ((diepint & OTGFS_DIEPINT_XFRC) == 0)
+                {
+                  /* Mask further FIFO empty interrupts.  This will be re-enabled
+                   * whenever we need to wait for a FIFO event.
+                   */
+
+                  empty &= ~OTGFS_DIEPEMPMSK(epno);
+                  stm32l4_putreg(empty, STM32L4_OTGFS_DIEPEMPMSK);
+
+                  /* Handle TxFIFO empty */
+
+                  stm32l4_epin_txfifoempty(priv, epno);
+                }
+
+              /* Clear the pending TxFIFO empty interrupt */
+
+              stm32l4_putreg(OTGFS_DIEPINT_TXFE, STM32L4_OTGFS_DIEPINT(epno));
+            }
+        }
+
+      epno++;
+      daint >>= 1;
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_resumeinterrupt
+ *
+ * Description:
+ *   Resume/remote wakeup detected interrupt
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_resumeinterrupt(FAR struct stm32l4_usbdev_s *priv)
+{
+  uint32_t regval;
+
+  /* Restart the PHY clock and un-gate USB core clock (HCLK) */
+
+#ifdef CONFIG_USBDEV_LOWPOWER
+  regval = stm32l4_getreg(STM32L4_OTGFS_PCGCCTL);
+  regval &= ~(OTGFS_PCGCCTL_STPPCLK | OTGFS_PCGCCTL_GATEHCLK);
+  stm32l4_putreg(regval, STM32L4_OTGFS_PCGCCTL);
+#endif
+
+  /* Clear remote wake-up signaling */
+
+  regval  = stm32l4_getreg(STM32L4_OTGFS_DCTL);
+  regval &= ~OTGFS_DCTL_RWUSIG;
+  stm32l4_putreg(regval, STM32L4_OTGFS_DCTL);
+
+  /* Restore full power -- whatever that means for this particular board */
+
+  stm32l4_usbsuspend((struct usbdev_s *)priv, true);
+
+  /* Notify the class driver of the resume event */
+
+  if (priv->driver)
+    {
+      CLASS_RESUME(priv->driver, &priv->usbdev);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_suspendinterrupt
+ *
+ * Description:
+ *   USB suspend interrupt
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_suspendinterrupt(FAR struct stm32l4_usbdev_s *priv)
+{
+#ifdef CONFIG_USBDEV_LOWPOWER
+  uint32_t regval;
+#endif
+
+  /* Notify the class driver of the suspend event */
+
+  if (priv->driver)
+    {
+      CLASS_SUSPEND(priv->driver, &priv->usbdev);
+    }
+
+#ifdef CONFIG_USBDEV_LOWPOWER
+  /* OTGFS_DSTS_SUSPSTS is set as long as the suspend condition is detected
+   * on USB.  Check if we are still have the suspend condition, that we are
+   * connected to the host, and that we have been configured.
+   */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_DSTS);
+
+  if ((regval & OTGFS_DSTS_SUSPSTS) != 0 && devstate == DEVSTATE_CONFIGURED)
+    {
+      /* Switch off OTG FS clocking.  Setting OTGFS_PCGCCTL_STPPCLK stops the
+       * PHY clock.
+       */
+
+      regval = stm32l4_getreg(STM32L4_OTGFS_PCGCCTL);
+      regval |= OTGFS_PCGCCTL_STPPCLK;
+      stm32l4_putreg(regval, STM32L4_OTGFS_PCGCCTL);
+
+      /* Setting OTGFS_PCGCCTL_GATEHCLK gate HCLK to modules other than
+       * the AHB Slave and Master and wakeup logic.
+       */
+
+      regval |= OTGFS_PCGCCTL_GATEHCLK;
+      stm32l4_putreg(regval, STM32L4_OTGFS_PCGCCTL);
+    }
+#endif
+
+  /* Let the board-specific logic know that we have entered the suspend
+   * state
+   */
+
+  stm32l4_usbsuspend((FAR struct usbdev_s *)priv, false);
+}
+
+/****************************************************************************
+ * Name: stm32l4_rxinterrupt
+ *
+ * Description:
+ *   RxFIFO non-empty interrupt.  This interrupt indicates that there is at
+ *   least one packet pending to be read from the RxFIFO.
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_rxinterrupt(FAR struct stm32l4_usbdev_s *priv)
+{
+  FAR struct stm32l4_ep_s *privep;
+  uint32_t regval;
+  int bcnt;
+  int epphy;
+
+  while(0 != (stm32l4_getreg(STM32L4_OTGFS_GINTSTS) & OTGFS_GINT_RXFLVL))
+    {
+
+    /* Get the status from the top of the FIFO */
+
+    regval = stm32l4_getreg(STM32L4_OTGFS_GRXSTSP);
+
+    /* Decode status fields */
+
+    epphy  = (regval & OTGFS_GRXSTSD_EPNUM_MASK) >> OTGFS_GRXSTSD_EPNUM_SHIFT;
+
+        /* Workaround for bad values read from the STM32L4_OTGFS_GRXSTSP register
+         * happens regval is 0xb4e48168 or 0xa80c9367 or 267E781c
+         * All of which provide out of range indexes for  epout[epphy]
+         */
+
+    if (epphy < STM32L4_NENDPOINTS)
+      {
+        privep = &priv->epout[epphy];
+
+        /* Handle the RX event according to the packet status field */
+
+        switch (regval & OTGFS_GRXSTSD_PKTSTS_MASK)
+          {
+          /* Global OUT NAK.  This indicate that the global OUT NAK bit has taken
+           * effect.
+           *
+           * PKTSTS = Global OUT NAK, BCNT = 0, EPNUM = Don't Care, DPID = Don't
+           * Care.
+           */
+
+          case OTGFS_GRXSTSD_PKTSTS_OUTNAK:
+            {
+              usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_OUTNAK), 0);
+            }
+            break;
+
+          /* OUT data packet received.
+           *
+           * PKTSTS = DataOUT, BCNT = size of the received data OUT packet,
+           * EPNUM = EPNUM on which the packet was received, DPID = Actual Data PID.
+           */
+
+          case OTGFS_GRXSTSD_PKTSTS_OUTRECVD:
+            {
+              usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_OUTRECVD), epphy);
+              bcnt = (regval & OTGFS_GRXSTSD_BCNT_MASK) >> OTGFS_GRXSTSD_BCNT_SHIFT;
+              if (bcnt > 0)
+                {
+                  stm32l4_epout_receive(privep, bcnt);
+                }
+            }
+            break;
+
+          /* OUT transfer completed.  This indicates that an OUT data transfer for
+           * the specified OUT endpoint has completed. After this entry is popped
+           * from the receive FIFO, the core asserts a Transfer Completed interrupt
+           * on the specified OUT endpoint.
+           *
+           * PKTSTS = Data OUT Transfer Done, BCNT = 0, EPNUM = OUT EP Num on
+           * which the data transfer is complete, DPID = Don't Care.
+           */
+
+          case OTGFS_GRXSTSD_PKTSTS_OUTDONE:
+            {
+              usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_OUTDONE), epphy);
+            }
+            break;
+
+          /* SETUP transaction completed. This indicates that the Setup stage for
+           * the specified endpoint has completed and the Data stage has started.
+           * After this entry is popped from the receive FIFO, the core asserts a
+           * Setup interrupt on the specified control OUT endpoint (triggers an
+           * interrupt).
+           *
+           * PKTSTS = Setup Stage Done, BCNT = 0, EPNUM = Control EP Num,
+           * DPID = Don't Care.
+           */
+
+          case OTGFS_GRXSTSD_PKTSTS_SETUPDONE:
+            {
+              usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SETUPDONE), epphy);
+
+              /* On the L4 This event does not occur on the next SETUP
+               * after a SETUP OUT.
+               */
+
+            }
+            break;
+
+          /* SETUP data packet received.  This indicates that a SETUP packet for the
+           * specified endpoint is now available for reading from the receive FIFO.
+           *
+           * PKTSTS = SETUP, BCNT = 8, EPNUM = Control EP Num, DPID = D0.
+           */
+
+          case OTGFS_GRXSTSD_PKTSTS_SETUPRECVD:
+            {
+              uint16_t datlen;
+
+              usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SETUPRECVD), epphy);
+
+              /* Read EP0 setup data.  NOTE:  If multiple SETUP packets are received,
+               * the last one overwrites the previous setup packets and only that
+               * last SETUP packet will be processed.
+               */
+
+              stm32l4_rxfifo_read(&priv->epout[EP0], (FAR uint8_t *)&priv->ctrlreq,
+                               USB_SIZEOF_CTRLREQ);
+
+              /* Was this an IN or an OUT SETUP packet.  If it is an OUT SETUP,
+               * then we need to wait for the completion of the data phase to
+               * process the setup command.  If it is an IN SETUP packet, then
+               * we must processing the command BEFORE we enter the DATA phase.
+               *
+               * If the data associated with the OUT SETUP packet is zero length,
+               * then, of course, we don't need to wait.
+               */
+
+              datlen = GETUINT16(priv->ctrlreq.len);
+              if (USB_REQ_ISOUT(priv->ctrlreq.type) && datlen > 0)
+                {
+                   /* Reset the endpoint and Stop NAK-ing */
+
+                   stm32l4_ep0out_ctrlsetup(priv);
+
+                  /* Wait for the data phase. */
+
+                  priv->ep0state = EP0STATE_SETUP_OUT;
+                }
+              else
+                {
+                  /* We can process the setup data Now no need to wait for SETUP done word
+                   * to be popped of the RxFIFO.
+                   */
+
+                  priv->ep0state = EP0STATE_SETUP_READY;
+                  stm32l4_ep0out_setup(priv);
+
+                }
+            }
+            break;
+
+          default:
+            {
+              usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDPARMS),
+                       (regval & OTGFS_GRXSTSD_PKTSTS_MASK) >> OTGFS_GRXSTSD_PKTSTS_SHIFT);
+            }
+            break;
+          }
+      }
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_enuminterrupt
+ *
+ * Description:
+ *   Enumeration done interrupt
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_enuminterrupt(FAR struct stm32l4_usbdev_s *priv)
+{
+  uint32_t regval;
+
+  /* Activate EP0 */
+
+  stm32l4_ep0in_activate();
+
+  /* Set USB turn-around time for the full speed device with internal PHY interface. */
+
+  regval  = stm32l4_getreg(STM32L4_OTGFS_GUSBCFG);
+  regval &= ~OTGFS_GUSBCFG_TRDT_MASK;
+  regval |=  OTGFS_GUSBCFG_TRDT(6);
+  stm32l4_putreg(regval, STM32L4_OTGFS_GUSBCFG);
+}
+
+/****************************************************************************
+ * Name: stm32l4_isocininterrupt
+ *
+ * Description:
+ *   Incomplete isochronous IN transfer interrupt.  Assertion of the incomplete
+ *   isochronous IN transfer interrupt indicates an incomplete isochronous IN
+ *   transfer on at least one of the isochronous IN endpoints.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBDEV_ISOCHRONOUS
+static inline void stm32l4_isocininterrupt(FAR struct stm32l4_usbdev_s *priv)
+{
+  int i;
+
+  /* The application must read the endpoint control register for all isochronous
+   * IN endpoints to detect endpoints with incomplete IN data transfers.
+   */
+
+  for (i = 0; i < STM32L4_NENDPOINTS; i++)
+    {
+      /* Is this an isochronous IN endpoint? */
+
+      privep = &priv->epin[i];
+      if (privep->eptype != USB_EP_ATTR_XFER_ISOC)
+        {
+          /* No... keep looking */
+
+          continue;
+        }
+
+      /* Is there an active read request on the isochronous OUT endpoint? */
+
+      if (!privep->active)
+        {
+          /* No.. the endpoint is not actively transmitting data */
+
+          continue;
+        }
+
+      /* Check if this is the endpoint that had the incomplete transfer */
+
+      regaddr = STM32L4_OTGFS_DIEPCTL(privep->epphy);
+      doepctl = stm32l4_getreg(regaddr);
+      dsts    = stm32l4_getreg(STM32L4_OTGFS_DSTS);
+
+      /* EONUM = 0:even frame, 1:odd frame
+       * SOFFN = Frame number of the received SOF
+       */
+
+      eonum = ((doepctl & OTGFS_DIEPCTL_EONUM) != 0);
+      soffn = ((dsts & OTGFS_DSTS_SOFFN0) != 0);
+
+      if (eonum != soffn)
+        {
+          /* Not this endpoint */
+
+          continue;
+        }
+
+      /* For isochronous IN endpoints with incomplete transfers,
+       * the application must discard the data in the memory and
+       * disable the endpoint.
+       */
+
+      stm32l4_req_complete(privep, -EIO);
+#warning "Will clear OTGFS_DIEPCTL_USBAEP too"
+      stm32l4_epin_disable(privep);
+      break;
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_isocoutinterrupt
+ *
+ * Description:
+ *   Incomplete periodic transfer interrupt
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBDEV_ISOCHRONOUS
+static inline void stm32l4_isocoutinterrupt(FAR struct stm32l4_usbdev_s *priv)
+{
+  FAR struct stm32l4_ep_s *privep;
+  FAR struct stm32l4_req_s *privreq;
+  uint32_t regaddr;
+  uint32_t doepctl;
+  uint32_t dsts;
+  bool eonum;
+  bool soffn;
+
+  /* When it receives an IISOOXFR interrupt, the application must read the
+   * control registers of all isochronous OUT endpoints to determine which
+   * endpoints had an incomplete transfer in the current microframe. An
+   * endpoint transfer is incomplete if both the following conditions are true:
+   *
+   *   DOEPCTLx:EONUM = DSTS:SOFFN[0], and
+   *   DOEPCTLx:EPENA = 1
+   */
+
+  for (i = 0; i < STM32L4_NENDPOINTS; i++)
+    {
+      /* Is this an isochronous OUT endpoint? */
+
+      privep = &priv->epout[i];
+      if (privep->eptype != USB_EP_ATTR_XFER_ISOC)
+        {
+          /* No... keep looking */
+
+          continue;
+        }
+
+      /* Is there an active read request on the isochronous OUT endpoint? */
+
+      if (!privep->active)
+        {
+          /* No.. the endpoint is not actively transmitting data */
+
+          continue;
+        }
+
+      /* Check if this is the endpoint that had the incomplete transfer */
+
+      regaddr = STM32L4_OTGFS_DOEPCTL(privep->epphy);
+      doepctl = stm32l4_getreg(regaddr);
+      dsts    = stm32l4_getreg(STM32L4_OTGFS_DSTS);
+
+      /* EONUM = 0:even frame, 1:odd frame
+       * SOFFN = Frame number of the received SOF
+       */
+
+      eonum = ((doepctl & OTGFS_DOEPCTL_EONUM) != 0);
+      soffn = ((dsts & OTGFS_DSTS_SOFFN0) != 0);
+
+      if (eonum != soffn)
+        {
+          /* Not this endpoint */
+
+          continue;
+        }
+
+      /* For isochronous OUT endpoints with incomplete transfers,
+       * the application must discard the data in the memory and
+       * disable the endpoint.
+       */
+
+      stm32l4_req_complete(privep, -EIO);
+#warning "Will clear OTGFS_DOEPCTL_USBAEP too"
+      stm32l4_epout_disable(privep);
+      break;
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_sessioninterrupt
+ *
+ * Description:
+ *   Session request/new session detected interrupt
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBDEV_VBUSSENSING
+static inline void stm32l4_sessioninterrupt(FAR struct stm32l4_usbdev_s *priv)
+{
+#warning "Missing logic"
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_otginterrupt
+ *
+ * Description:
+ *   OTG interrupt
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBDEV_VBUSSENSING
+static inline void stm32l4_otginterrupt(FAR struct stm32l4_usbdev_s *priv)
+{
+  uint32_t regval;
+
+  /* Check for session end detected */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_GOTGINT);
+  if ((regval & OTGFS_GOTGINT_SEDET) != 0)
+    {
+#warning "Missing logic"
+    }
+
+  /* Clear OTG interrupt */
+
+  stm32l4_putreg(regval, STM32L4_OTGFS_GOTGINT);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_usbinterrupt
+ *
+ * Description:
+ *   USB interrupt handler
+ *
+ ****************************************************************************/
+
+static int stm32l4_usbinterrupt(int irq, FAR void *context, FAR void *arg)
+{
+  /* At present, there is only a single OTG FS device support. Hence it is
+   * pre-allocated as g_otgfsdev.  However, in most code, the private data
+   * structure will be referenced using the 'priv' pointer (rather than the
+   * global data) in order to simplify any future support for multiple devices.
+   */
+
+  FAR struct stm32l4_usbdev_s *priv = &g_otgfsdev;
+  uint32_t regval;
+  uint32_t reserved;
+
+  usbtrace(TRACE_INTENTRY(STM32L4_TRACEINTID_USB), priv->ep0state);
+
+  /* Assure that we are in device mode */
+
+  DEBUGASSERT((stm32l4_getreg(STM32L4_OTGFS_GINTSTS) & OTGFS_GINTSTS_CMOD) == OTGFS_GINTSTS_DEVMODE);
+
+  /* Get the state of all enabled interrupts.  We will do this repeatedly
+   * some interrupts (like RXFLVL) will generate additional interrupting
+   * events.
+   */
+  for (; ; )
+    {
+      /* Get the set of pending, un-masked interrupts */
+
+      regval  = stm32l4_getreg(STM32L4_OTGFS_GINTSTS);
+      reserved = (regval & OTGFS_GINT_RESERVED);
+      regval &= stm32l4_getreg(STM32L4_OTGFS_GINTMSK);
+
+      /* With out modifying the reserved bits, acknowledge all
+       * **Writable** pending irqs we will service below
+       */
+
+      stm32l4_putreg(((regval | reserved) & OTGFS_GINT_RC_W1), STM32L4_OTGFS_GINTSTS);
+
+
+      /* Break out of the loop when there are no further pending (and
+       * unmasked) interrupts to be processes.
+       */
+
+      if (regval == 0)
+        {
+          break;
+        }
+      usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_INTPENDING), (uint16_t)regval);
+
+      /* OUT endpoint interrupt. The core sets this bit to indicate that an
+       * interrupt is pending on one of the OUT endpoints of the core.
+       */
+
+      if ((regval & OTGFS_GINT_OEP) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPOUT), (uint16_t)regval);
+          stm32l4_epout_interrupt(priv);
+        }
+
+      /* IN endpoint interrupt.  The core sets this bit to indicate that
+       * an interrupt is pending on one of the IN endpoints of the core.
+       */
+
+      if ((regval & OTGFS_GINT_IEP) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPIN), (uint16_t)regval);
+          stm32l4_epin_interrupt(priv);
+        }
+
+      /* Host/device mode mismatch error interrupt */
+
+#ifdef CONFIG_DEBUG_FEATURES
+      if ((regval & OTGFS_GINT_MMIS) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_MISMATCH), (uint16_t)regval);
+        }
+#endif
+
+      /* Resume/remote wakeup detected interrupt */
+
+      if ((regval & OTGFS_GINT_WKUP) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_WAKEUP), (uint16_t)regval);
+          stm32l4_resumeinterrupt(priv);
+        }
+
+      /* USB suspend interrupt */
+
+      if ((regval & OTGFS_GINT_USBSUSP) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SUSPEND), (uint16_t)regval);
+          stm32l4_suspendinterrupt(priv);
+        }
+
+      /* Start of frame interrupt */
+
+#ifdef CONFIG_USBDEV_SOFINTERRUPT
+      if ((regval & OTGFS_GINT_SOF) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SOF), (uint16_t)regval);
+        }
+#endif
+
+      /* RxFIFO non-empty interrupt.  Indicates that there is at least one
+       * packet pending to be read from the RxFIFO.
+       */
+
+      if ((regval & OTGFS_GINT_RXFLVL) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_RXFIFO), (uint16_t)regval);
+          stm32l4_rxinterrupt(priv);
+        }
+
+      /* USB reset interrupt */
+
+      if ((regval & (OTGFS_GINT_USBRST | OTGFS_GINT_RSTDET)) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_DEVRESET), (uint16_t)regval);
+
+          /* Perform the device reset */
+
+          stm32l4_usbreset(priv);
+          usbtrace(TRACE_INTEXIT(STM32L4_TRACEINTID_USB), priv->ep0state);
+          return OK;
+        }
+
+      /* Enumeration done interrupt */
+
+      if ((regval & OTGFS_GINT_ENUMDNE) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_ENUMDNE), (uint16_t)regval);
+          stm32l4_enuminterrupt(priv);
+        }
+
+      /* Incomplete isochronous IN transfer interrupt.  When the core finds
+       * non-empty any of the isochronous IN endpoint FIFOs scheduled for
+       * the current frame non-empty, the core generates an IISOIXFR
+       * interrupt.
+       */
+
+#ifdef CONFIG_USBDEV_ISOCHRONOUS
+      if ((regval & OTGFS_GINT_IISOIXFR) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_IISOIXFR), (uint16_t)regval);
+          stm32l4_isocininterrupt(priv);
+        }
+
+      /* Incomplete isochronous OUT transfer.  For isochronous OUT
+       * endpoints, the XFRC interrupt may not always be asserted. If the
+       * core drops isochronous OUT data packets, the application could fail
+       * to detect the XFRC interrupt.  The incomplete Isochronous OUT data
+       * interrupt indicates that an XFRC interrupt was not asserted on at
+       * least one of the isochronous OUT endpoints. At this point, the
+       * endpoint with the incomplete transfer remains enabled, but no active
+       * transfers remain in progress on this endpoint on the USB.
+       */
+
+      if ((regval & OTGFS_GINT_IISOOXFR) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_IISOOXFR), (uint16_t)regval);
+          stm32l4_isocoutinterrupt(priv);
+        }
+#endif
+
+      /* Session request/new session detected interrupt */
+
+#ifdef CONFIG_USBDEV_VBUSSENSING
+      if ((regval & OTGFS_GINT_SRQ) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SRQ), (uint16_t)regval);
+          stm32l4_sessioninterrupt(priv);
+        }
+
+      /* OTG interrupt */
+
+      if ((regval & OTGFS_GINT_OTG) != 0)
+        {
+          usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_OTG), (uint16_t)regval);
+          stm32l4_otginterrupt(priv);
+        }
+#endif
+    }
+
+  usbtrace(TRACE_INTEXIT(STM32L4_TRACEINTID_USB), priv->ep0state);
+  return OK;
+}
+
+/****************************************************************************
+ * Endpoint operations
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_enablegonak
+ *
+ * Description:
+ *   Enable global OUT NAK mode
+ *
+ ****************************************************************************/
+
+static void stm32l4_enablegonak(FAR struct stm32l4_ep_s *privep)
+{
+  uint32_t regval;
+
+  /* First, make sure that there is no GNOAKEFF interrupt pending. */
+
+#if 0
+  stm32l4_putreg(OTGFS_GINT_GONAKEFF, STM32L4_OTGFS_GINTSTS);
+#endif
+
+  /* Enable Global OUT NAK mode in the core. */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_DCTL);
+  regval |= OTGFS_DCTL_SGONAK;
+  stm32l4_putreg(regval, STM32L4_OTGFS_DCTL);
+
+#if 0
+  /* Wait for the GONAKEFF interrupt that indicates that the OUT NAK
+   * mode is in effect.  When the interrupt handler pops the OUTNAK word
+   * from the RxFIFO, the core sets the GONAKEFF interrupt.
+   */
+
+  while ((stm32l4_getreg(STM32L4_OTGFS_GINTSTS) & OTGFS_GINT_GONAKEFF) == 0);
+  stm32l4_putreg(OTGFS_GINT_GONAKEFF, STM32L4_OTGFS_GINTSTS);
+
+#else
+  /* Since we are in the interrupt handler, we cannot wait inline for the
+   * GONAKEFF because it cannot occur until service the RXFLVL global interrupt
+   * and pop the OUTNAK word from the RxFIFO.
+   *
+   * Perhaps it is sufficient to wait for Global OUT NAK status to be reported
+   * in OTGFS DCTL register?
+   */
+
+  while ((stm32l4_getreg(STM32L4_OTGFS_DCTL) & OTGFS_DCTL_GONSTS) == 0);
+#endif
+}
+
+/****************************************************************************
+ * Name: stm32l4_disablegonak
+ *
+ * Description:
+ *   Disable global OUT NAK mode
+ *
+ ****************************************************************************/
+
+static void stm32l4_disablegonak(FAR struct stm32l4_ep_s *privep)
+{
+  uint32_t regval;
+
+  /* Set the "Clear the Global OUT NAK bit" to disable global OUT NAK mode */
+
+  regval  = stm32l4_getreg(STM32L4_OTGFS_DCTL);
+  regval |= OTGFS_DCTL_CGONAK;
+  stm32l4_putreg(regval, STM32L4_OTGFS_DCTL);
+}
+
+/****************************************************************************
+ * Name: stm32l4_epout_configure
+ *
+ * Description:
+ *   Configure an OUT endpoint, making it usable
+ *
+ * Input Parameters:
+ *   privep    - a pointer to an internal endpoint structure
+ *   eptype    - The type of the endpoint
+ *   maxpacket - The max packet size of the endpoint
+ *
+ ****************************************************************************/
+
+static int stm32l4_epout_configure(FAR struct stm32l4_ep_s *privep,
+                                   uint8_t eptype, uint16_t maxpacket)
+{
+  uint32_t mpsiz;
+  uint32_t regaddr;
+  uint32_t regval;
+
+  usbtrace(TRACE_EPCONFIGURE, privep->epphy);
+
+  /* For EP0, the packet size is encoded */
+
+  if (privep->epphy == EP0)
+    {
+      DEBUGASSERT(eptype == USB_EP_ATTR_XFER_CONTROL);
+
+      /* Map the size in bytes to the encoded value in the register */
+
+      switch (maxpacket)
+        {
+          case 8:
+            mpsiz = OTGFS_DOEPCTL0_MPSIZ_8;
+            break;
+
+          case 16:
+            mpsiz = OTGFS_DOEPCTL0_MPSIZ_16;
+            break;
+
+          case 32:
+            mpsiz = OTGFS_DOEPCTL0_MPSIZ_32;
+            break;
+
+          case 64:
+            mpsiz = OTGFS_DOEPCTL0_MPSIZ_64;
+            break;
+
+          default:
+            uerr("Unsupported maxpacket: %d\n", maxpacket);
+            return -EINVAL;
+        }
+    }
+
+  /* For other endpoints, the packet size is in bytes */
+
+  else
+    {
+      mpsiz = (maxpacket << OTGFS_DOEPCTL_MPSIZ_SHIFT);
+    }
+
+  /* If the endpoint is already active don't change the endpoint control
+   * register.
+   */
+
+  regaddr = STM32L4_OTGFS_DOEPCTL(privep->epphy);
+  regval  = stm32l4_getreg(regaddr);
+  if ((regval & OTGFS_DOEPCTL_USBAEP) == 0)
+    {
+      if (regval & OTGFS_DOEPCTL_NAKSTS)
+        {
+          regval |= OTGFS_DOEPCTL_CNAK;
+        }
+
+      regval &= ~(OTGFS_DOEPCTL_MPSIZ_MASK | OTGFS_DOEPCTL_EPTYP_MASK);
+      regval |= mpsiz;
+      regval |= (eptype << OTGFS_DOEPCTL_EPTYP_SHIFT);
+      regval |= (OTGFS_DOEPCTL_SD0PID | OTGFS_DOEPCTL_USBAEP);
+      stm32l4_putreg(regval, regaddr);
+
+      /* Save the endpoint configuration */
+
+      privep->ep.maxpacket = maxpacket;
+      privep->eptype       = eptype;
+      privep->stalled      = false;
+    }
+
+  /* Enable the interrupt for this endpoint */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_DAINTMSK);
+  regval |= OTGFS_DAINT_OEP(privep->epphy);
+  stm32l4_putreg(regval, STM32L4_OTGFS_DAINTMSK);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_epin_configure
+ *
+ * Description:
+ *   Configure an IN endpoint, making it usable
+ *
+ * Input Parameters:
+ *   privep    - a pointer to an internal endpoint structure
+ *   eptype    - The type of the endpoint
+ *   maxpacket - The max packet size of the endpoint
+ *
+ ****************************************************************************/
+
+static int stm32l4_epin_configure(FAR struct stm32l4_ep_s *privep, uint8_t eptype,
+                                  uint16_t maxpacket)
+{
+  uint32_t mpsiz;
+  uint32_t regaddr;
+  uint32_t regval;
+
+  usbtrace(TRACE_EPCONFIGURE, privep->epphy);
+
+  /* For EP0, the packet size is encoded */
+
+  if (privep->epphy == EP0)
+    {
+      DEBUGASSERT(eptype == USB_EP_ATTR_XFER_CONTROL);
+
+      /* Map the size in bytes to the encoded value in the register */
+
+      switch (maxpacket)
+        {
+          case 8:
+            mpsiz = OTGFS_DIEPCTL0_MPSIZ_8;
+            break;
+
+          case 16:
+            mpsiz = OTGFS_DIEPCTL0_MPSIZ_16;
+            break;
+
+          case 32:
+            mpsiz = OTGFS_DIEPCTL0_MPSIZ_32;
+            break;
+
+          case 64:
+            mpsiz = OTGFS_DIEPCTL0_MPSIZ_64;
+            break;
+
+          default:
+            uerr("Unsupported maxpacket: %d\n", maxpacket);
+            return -EINVAL;
+        }
+    }
+
+  /* For other endpoints, the packet size is in bytes */
+
+  else
+    {
+      mpsiz = (maxpacket << OTGFS_DIEPCTL_MPSIZ_SHIFT);
+    }
+
+
+  /* If the endpoint is already active don't change the endpoint control
+   * register.
+   */
+
+  regaddr = STM32L4_OTGFS_DIEPCTL(privep->epphy);
+  regval  = stm32l4_getreg(regaddr);
+  if ((regval & OTGFS_DIEPCTL_USBAEP) == 0)
+    {
+      if (regval & OTGFS_DIEPCTL_NAKSTS)
+        {
+          regval |= OTGFS_DIEPCTL_CNAK;
+        }
+
+      regval &= ~(OTGFS_DIEPCTL_MPSIZ_MASK | OTGFS_DIEPCTL_EPTYP_MASK | OTGFS_DIEPCTL_TXFNUM_MASK);
+      regval |= mpsiz;
+      regval |= (eptype << OTGFS_DIEPCTL_EPTYP_SHIFT);
+      regval |= (eptype << OTGFS_DIEPCTL_TXFNUM_SHIFT);
+      regval |= (OTGFS_DIEPCTL_SD0PID | OTGFS_DIEPCTL_USBAEP);
+      stm32l4_putreg(regval, regaddr);
+
+      /* Save the endpoint configuration */
+
+      privep->ep.maxpacket = maxpacket;
+      privep->eptype       = eptype;
+      privep->stalled      = false;
+    }
+
+  /* Enable the interrupt for this endpoint */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_DAINTMSK);
+  regval |= OTGFS_DAINT_IEP(privep->epphy);
+  stm32l4_putreg(regval, STM32L4_OTGFS_DAINTMSK);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep_configure
+ *
+ * Description:
+ *   Configure endpoint, making it usable
+ *
+ * Input Parameters:
+ *   ep   - the struct usbdev_ep_s instance obtained from allocep()
+ *   desc - A struct usb_epdesc_s instance describing the endpoint
+ *   last - true if this this last endpoint to be configured.  Some hardware
+ *          needs to take special action when all of the endpoints have been
+ *          configured.
+ *
+ ****************************************************************************/
+
+static int stm32l4_ep_configure(FAR struct usbdev_ep_s *ep,
+                                FAR const struct usb_epdesc_s *desc,
+                                bool last)
+{
+  FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep;
+  uint16_t maxpacket;
+  uint8_t  eptype;
+  int ret;
+
+  usbtrace(TRACE_EPCONFIGURE, privep->epphy);
+  DEBUGASSERT(desc->addr == ep->eplog);
+
+  /* Initialize EP capabilities */
+
+  maxpacket = GETUINT16(desc->mxpacketsize);
+  eptype    = desc->attr & USB_EP_ATTR_XFERTYPE_MASK;
+
+  /* Setup Endpoint Control Register */
+
+  if (privep->isin)
+    {
+      ret = stm32l4_epin_configure(privep, eptype, maxpacket);
+    }
+  else
+    {
+      ret = stm32l4_epout_configure(privep, eptype, maxpacket);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep0_configure
+ *
+ * Description:
+ *   Reset Usb engine
+ *
+ ****************************************************************************/
+
+static void stm32l4_ep0_configure(FAR struct stm32l4_usbdev_s *priv)
+{
+  /* Enable EP0 IN and OUT */
+
+  (void)stm32l4_epin_configure(&priv->epin[EP0], USB_EP_ATTR_XFER_CONTROL,
+                               CONFIG_USBDEV_EP0_MAXSIZE);
+  (void)stm32l4_epout_configure(&priv->epout[EP0], USB_EP_ATTR_XFER_CONTROL,
+                                CONFIG_USBDEV_EP0_MAXSIZE);
+}
+
+/****************************************************************************
+ * Name: stm32l4_epout_disable
+ *
+ * Description:
+ *   Diable an OUT endpoint will no longer be used
+ *
+ ****************************************************************************/
+
+static void stm32l4_epout_disable(FAR struct stm32l4_ep_s *privep)
+{
+  uint32_t regaddr;
+  uint32_t regval;
+  irqstate_t flags;
+
+  usbtrace(TRACE_EPDISABLE, privep->epphy);
+
+  /* Is this an IN or an OUT endpoint */
+
+  /* Before disabling any OUT endpoint, the application must enable
+   * Global OUT NAK mode in the core.
+   */
+
+  flags = enter_critical_section();
+  stm32l4_enablegonak(privep);
+
+  /* Disable the required OUT endpoint by setting the EPDIS and SNAK bits
+   * int DOECPTL register.
+   */
+
+  regaddr = STM32L4_OTGFS_DOEPCTL(privep->epphy);
+  regval  = stm32l4_getreg(regaddr);
+  regval &= ~OTGFS_DOEPCTL_USBAEP;
+  regval |= (OTGFS_DOEPCTL_EPDIS | OTGFS_DOEPCTL_SNAK);
+  stm32l4_putreg(regval, regaddr);
+
+  /* Wait for the EPDISD interrupt which indicates that the OUT
+   * endpoint is completely disabled.
+   */
+
+#if 0 /* Doesn't happen */
+  regaddr = STM32L4_OTGFS_DOEPINT(privep->epphy);
+  while ((stm32l4_getreg(regaddr) & OTGFS_DOEPINT_EPDISD) == 0);
+#else
+  /* REVISIT: */
+  up_udelay(10);
+#endif
+
+  /* Clear the EPDISD interrupt indication */
+
+  stm32l4_putreg(OTGFS_DOEPINT_EPDISD, STM32L4_OTGFS_DOEPINT(privep->epphy));
+
+  /* Then disable the Global OUT NAK mode to continue receiving data
+   * from other non-disabled OUT endpoints.
+   */
+
+  stm32l4_disablegonak(privep);
+
+  /* Disable endpoint interrupts */
+
+  regval  = stm32l4_getreg(STM32L4_OTGFS_DAINTMSK);
+  regval &= ~OTGFS_DAINT_OEP(privep->epphy);
+  stm32l4_putreg(regval, STM32L4_OTGFS_DAINTMSK);
+
+  /* Cancel any queued read requests */
+
+  stm32l4_req_cancel(privep, -ESHUTDOWN);
+
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: stm32l4_epin_disable
+ *
+ * Description:
+ *   Disable an IN endpoint when it will no longer be used
+ *
+ ****************************************************************************/
+
+static void stm32l4_epin_disable(FAR struct stm32l4_ep_s *privep)
+{
+  uint32_t regaddr;
+  uint32_t regval;
+  irqstate_t flags;
+
+  usbtrace(TRACE_EPDISABLE, privep->epphy);
+
+  /* After USB reset, the endpoint will already be deactivated by the
+   * hardware. Trying to disable again will just hang in the wait.
+   */
+
+  regaddr = STM32L4_OTGFS_DIEPCTL(privep->epphy);
+  regval  = stm32l4_getreg(regaddr);
+  if ((regval & OTGFS_DIEPCTL_USBAEP) == 0)
+    {
+      return;
+    }
+
+  /* This INEPNE wait logic is suggested by reference manual, but seems
+   * to get stuck to infinite loop.
+   */
+
+#if 0
+  /* Make sure that there is no pending IPEPNE interrupt (because we are
+   * to poll this bit below).
+   */
+
+  stm32l4_putreg(OTGFS_DIEPINT_INEPNE, STM32L4_OTGFS_DIEPINT(privep->epphy));
+
+  /* Set the endpoint in NAK mode */
+
+  regaddr = STM32L4_OTGFS_DIEPCTL(privep->epphy);
+  regval  = stm32l4_getreg(regaddr);
+  regval &= ~OTGFS_DIEPCTL_USBAEP;
+  regval |= (OTGFS_DIEPCTL_EPDIS | OTGFS_DIEPCTL_SNAK);
+  stm32l4_putreg(regval, regaddr);
+
+  /* Wait for the INEPNE interrupt that indicates that we are now in NAK mode */
+
+  regaddr = STM32L4_OTGFS_DIEPINT(privep->epphy);
+  while ((stm32l4_getreg(regaddr) & OTGFS_DIEPINT_INEPNE) == 0);
+
+  /* Clear the INEPNE interrupt indication */
+
+  stm32l4_putreg(OTGFS_DIEPINT_INEPNE, regaddr);
+#endif
+
+  /* Deactivate and disable the endpoint by setting the EPDIS and SNAK bits
+   * the DIEPCTLx register.
+   */
+
+  flags = enter_critical_section();
+  regaddr = STM32L4_OTGFS_DIEPCTL(privep->epphy);
+  regval  = stm32l4_getreg(regaddr);
+  regval &= ~OTGFS_DIEPCTL_USBAEP;
+  regval |= (OTGFS_DIEPCTL_EPDIS | OTGFS_DIEPCTL_SNAK);
+  stm32l4_putreg(regval, regaddr);
+
+  /* Wait for the EPDISD interrupt which indicates that the IN
+   * endpoint is completely disabled.
+   */
+
+  regaddr = STM32L4_OTGFS_DIEPINT(privep->epphy);
+  while ((stm32l4_getreg(regaddr) & OTGFS_DIEPINT_EPDISD) == 0);
+
+  /* Clear the EPDISD interrupt indication */
+
+  stm32l4_putreg(OTGFS_DIEPINT_EPDISD, stm32l4_getreg(regaddr));
+
+  /* Flush any data remaining in the TxFIFO */
+
+  stm32l4_txfifo_flush(OTGFS_GRSTCTL_TXFNUM_D(privep->epphy));
+
+  /* Disable endpoint interrupts */
+
+  regval  = stm32l4_getreg(STM32L4_OTGFS_DAINTMSK);
+  regval &= ~OTGFS_DAINT_IEP(privep->epphy);
+  stm32l4_putreg(regval, STM32L4_OTGFS_DAINTMSK);
+
+  /* Cancel any queued write requests */
+
+  stm32l4_req_cancel(privep, -ESHUTDOWN);
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep_disable
+ *
+ * Description:
+ *   The endpoint will no longer be used
+ *
+ ****************************************************************************/
+
+static int stm32l4_ep_disable(FAR struct usbdev_ep_s *ep)
+{
+  FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep;
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!ep)
+    {
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDPARMS), 0);
+      return -EINVAL;
+    }
+#endif
+
+  usbtrace(TRACE_EPDISABLE, privep->epphy);
+
+  /* Is this an IN or an OUT endpoint */
+
+  if (privep->isin)
+    {
+      /* Disable the IN endpoint */
+
+      stm32l4_epin_disable(privep);
+    }
+  else
+    {
+      /* Disable the OUT endpoint */
+
+      stm32l4_epout_disable(privep);
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep_allocreq
+ *
+ * Description:
+ *   Allocate an I/O request
+ *
+ ****************************************************************************/
+
+static FAR struct usbdev_req_s *stm32l4_ep_allocreq(FAR struct usbdev_ep_s *ep)
+{
+  FAR struct stm32l4_req_s *privreq;
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!ep)
+    {
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDPARMS), 0);
+      return NULL;
+    }
+#endif
+
+  usbtrace(TRACE_EPALLOCREQ, ((FAR struct stm32l4_ep_s *)ep)->epphy);
+
+  privreq = (FAR struct stm32l4_req_s *)kmm_malloc(sizeof(struct stm32l4_req_s));
+  if (!privreq)
+    {
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_ALLOCFAIL), 0);
+      return NULL;
+    }
+
+  memset(privreq, 0, sizeof(struct stm32l4_req_s));
+  return &privreq->req;
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep_freereq
+ *
+ * Description:
+ *   Free an I/O request
+ *
+ ****************************************************************************/
+
+static void stm32l4_ep_freereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req)
+{
+  FAR struct stm32l4_req_s *privreq = (FAR struct stm32l4_req_s *)req;
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!ep || !req)
+    {
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDPARMS), 0);
+      return;
+    }
+#endif
+
+  usbtrace(TRACE_EPFREEREQ, ((FAR struct stm32l4_ep_s *)ep)->epphy);
+  kmm_free(privreq);
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep_allocbuffer
+ *
+ * Description:
+ *   Allocate an I/O buffer
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBDEV_DMA
+static void *stm32l4_ep_allocbuffer(FAR struct usbdev_ep_s *ep, unsigned bytes)
+{
+  usbtrace(TRACE_EPALLOCBUFFER, privep->epphy);
+
+#ifdef CONFIG_USBDEV_DMAMEMORY
+  return usbdev_dma_alloc(bytes);
+#else
+  return kmm_malloc(bytes);
+#endif
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_ep_freebuffer
+ *
+ * Description:
+ *   Free an I/O buffer
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBDEV_DMA
+static void stm32l4_ep_freebuffer(FAR struct usbdev_ep_s *ep, FAR void *buf)
+{
+  usbtrace(TRACE_EPFREEBUFFER, privep->epphy);
+
+#ifdef CONFIG_USBDEV_DMAMEMORY
+  usbdev_dma_free(buf);
+#else
+  kmm_free(buf);
+#endif
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_ep_submit
+ *
+ * Description:
+ *   Submit an I/O request to the endpoint
+ *
+ ****************************************************************************/
+
+static int stm32l4_ep_submit(FAR struct usbdev_ep_s *ep,
+                             FAR struct usbdev_req_s *req)
+{
+  FAR struct stm32l4_req_s *privreq = (FAR struct stm32l4_req_s *)req;
+  FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep;
+  FAR struct stm32l4_usbdev_s *priv;
+  irqstate_t flags;
+  int ret = OK;
+
+  /* Some sanity checking */
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!req || !req->callback || !req->buf || !ep)
+    {
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDPARMS), 0);
+      uinfo("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+      return -EINVAL;
+    }
+#endif
+
+  usbtrace(TRACE_EPSUBMIT, privep->epphy);
+  priv = privep->dev;
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!priv->driver)
+    {
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_NOTCONFIGURED), priv->usbdev.speed);
+      return -ESHUTDOWN;
+    }
+#endif
+
+  /* Handle the request from the class driver */
+
+  req->result = -EINPROGRESS;
+  req->xfrd   = 0;
+
+  /* Disable Interrupts */
+
+  flags = enter_critical_section();
+
+  /* If we are stalled, then drop all requests on the floor */
+
+  if (privep->stalled)
+    {
+      ret = -EBUSY;
+    }
+  else
+    {
+      /* Add the new request to the request queue for the endpoint. */
+
+      if (stm32l4_req_addlast(privep, privreq) && !privep->active)
+        {
+          /* If a request was added to an IN endpoint, then attempt to send
+           * the request data buffer now.
+           */
+
+          if (privep->isin)
+            {
+              usbtrace(TRACE_INREQQUEUED(privep->epphy), privreq->req.len);
+
+              /* If the endpoint is not busy with another write request,
+               * then process the newly received write request now.
+               */
+
+              if (!privep->active)
+                {
+                  stm32l4_epin_request(priv, privep);
+                }
+            }
+
+          /* If the request was added to an OUT endpoint, then attempt to
+           * setup a read into the request data buffer now (this will, of
+           * course, fail if there is already a read in place).
+           */
+
+          else
+            {
+              usbtrace(TRACE_OUTREQQUEUED(privep->epphy), privreq->req.len);
+              stm32l4_epout_request(priv, privep);
+            }
+        }
+    }
+
+  leave_critical_section(flags);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep_cancel
+ *
+ * Description:
+ *   Cancel an I/O request previously sent to an endpoint
+ *
+ ****************************************************************************/
+
+static int stm32l4_ep_cancel(FAR struct usbdev_ep_s *ep,
+                             FAR struct usbdev_req_s *req)
+{
+  FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep;
+  irqstate_t flags;
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!ep || !req)
+    {
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDPARMS), 0);
+      return -EINVAL;
+    }
+#endif
+
+  usbtrace(TRACE_EPCANCEL, privep->epphy);
+
+  flags = enter_critical_section();
+
+  /* FIXME: if the request is the first, then we need to flush the EP
+   *         otherwise just remove it from the list
+   *
+   *  but ... all other implementations cancel all requests ...
+   */
+
+  stm32l4_req_cancel(privep, -ESHUTDOWN);
+  leave_critical_section(flags);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_epout_setstall
+ *
+ * Description:
+ *   Stall an OUT endpoint
+ *
+ ****************************************************************************/
+
+static int stm32l4_epout_setstall(FAR struct stm32l4_ep_s *privep)
+{
+#if 1
+  /* This implementation follows the requirements from the STM32 F4 reference
+   * manual.
+   */
+
+  uint32_t regaddr;
+  uint32_t regval;
+
+  /* Put the core in the Global OUT NAK mode */
+
+  stm32l4_enablegonak(privep);
+
+  /* Disable and STALL the OUT endpoint by setting the EPDIS and STALL bits
+   * in the DOECPTL register.
+   */
+
+  regaddr = STM32L4_OTGFS_DOEPCTL(privep->epphy);
+  regval  = stm32l4_getreg(regaddr);
+  regval |= (OTGFS_DOEPCTL_EPDIS | OTGFS_DOEPCTL_STALL);
+  stm32l4_putreg(regval, regaddr);
+
+  /* Wait for the EPDISD interrupt which indicates that the OUT
+   * endpoint is completely disabled.
+   */
+
+#if 0 /* Doesn't happen */
+  regaddr = STM32L4_OTGFS_DOEPINT(privep->epphy);
+  while ((stm32l4_getreg(regaddr) & OTGFS_DOEPINT_EPDISD) == 0);
+#else
+  /* REVISIT: */
+  up_udelay(10);
+#endif
+
+  /* Disable Global OUT NAK mode */
+
+  stm32l4_disablegonak(privep);
+
+  /* The endpoint is now stalled */
+
+  privep->stalled = true;
+  return OK;
+#else
+  /* This implementation follows the STMicro code example. */
+  /* REVISIT: */
+
+  uint32_t regaddr;
+  uint32_t regval;
+
+  /* Stall the OUT endpoint by setting the STALL bit in the DOECPTL register. */
+
+  regaddr = STM32L4_OTGFS_DOEPCTL(privep->epphy);
+  regval  = stm32l4_getreg(regaddr);
+  regval |= OTGFS_DOEPCTL_STALL;
+  stm32l4_putreg(regval, regaddr);
+
+  /* The endpoint is now stalled */
+
+  privep->stalled = true;
+  return OK;
+#endif
+}
+
+/****************************************************************************
+ * Name: stm32l4_epin_setstall
+ *
+ * Description:
+ *   Stall an IN endpoint
+ *
+ ****************************************************************************/
+
+static int stm32l4_epin_setstall(FAR struct stm32l4_ep_s *privep)
+{
+  uint32_t regaddr;
+  uint32_t regval;
+
+  /* Get the IN endpoint device control register */
+
+  regaddr = STM32L4_OTGFS_DIEPCTL(privep->epphy);
+  regval  = stm32l4_getreg(regaddr);
+
+  /* Then stall the endpoint */
+
+  regval |= OTGFS_DIEPCTL_STALL;
+  stm32l4_putreg(regval, regaddr);
+
+  /* The endpoint is now stalled */
+
+  privep->stalled = true;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep_setstall
+ *
+ * Description:
+ *   Stall an endpoint
+ *
+ ****************************************************************************/
+
+static int stm32l4_ep_setstall(FAR struct stm32l4_ep_s *privep)
+{
+  usbtrace(TRACE_EPSTALL, privep->epphy);
+
+  /* Is this an IN endpoint? */
+
+  if (privep->isin == 1)
+    {
+      return stm32l4_epin_setstall(privep);
+    }
+  else
+    {
+      return stm32l4_epout_setstall(privep);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep_clrstall
+ *
+ * Description:
+ *   Resume a stalled endpoint
+ *
+ ****************************************************************************/
+
+static int stm32l4_ep_clrstall(FAR struct stm32l4_ep_s *privep)
+{
+  uint32_t regaddr;
+  uint32_t regval;
+  uint32_t stallbit;
+  uint32_t data0bit;
+
+  usbtrace(TRACE_EPRESUME, privep->epphy);
+
+  /* Is this an IN endpoint? */
+
+  if (privep->isin == 1)
+    {
+      /* Clear the stall bit in the IN endpoint device control register */
+
+      regaddr  = STM32L4_OTGFS_DIEPCTL(privep->epphy);
+      stallbit = OTGFS_DIEPCTL_STALL;
+      data0bit = OTGFS_DIEPCTL_SD0PID;
+    }
+  else
+    {
+      /* Clear the stall bit in the IN endpoint device control register */
+
+      regaddr  = STM32L4_OTGFS_DOEPCTL(privep->epphy);
+      stallbit = OTGFS_DOEPCTL_STALL;
+      data0bit = OTGFS_DOEPCTL_SD0PID;
+    }
+
+  /* Clear the stall bit */
+
+  regval  = stm32l4_getreg(regaddr);
+  regval &= ~stallbit;
+
+  /* Set the DATA0 pid for interrupt and bulk endpoints */
+
+  if (privep->eptype == USB_EP_ATTR_XFER_INT ||
+      privep->eptype == USB_EP_ATTR_XFER_BULK)
+    {
+      /* Writing this bit sets the DATA0 PID */
+
+      regval |= data0bit;
+    }
+
+  stm32l4_putreg(regval, regaddr);
+
+  /* The endpoint is no longer stalled */
+
+  privep->stalled = false;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep_stall
+ *
+ * Description:
+ *   Stall or resume an endpoint
+ *
+ ****************************************************************************/
+
+static int stm32l4_ep_stall(FAR struct usbdev_ep_s *ep, bool resume)
+{
+  FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep;
+  irqstate_t flags;
+  int ret;
+
+  /* Set or clear the stall condition as requested */
+
+  flags = enter_critical_section();
+  if (resume)
+    {
+      ret = stm32l4_ep_clrstall(privep);
+    }
+  else
+    {
+      ret = stm32l4_ep_setstall(privep);
+    }
+  leave_critical_section(flags);
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep0_stall
+ *
+ * Description:
+ *   Stall endpoint 0
+ *
+ ****************************************************************************/
+
+static void stm32l4_ep0_stall(FAR struct stm32l4_usbdev_s *priv)
+{
+  stm32l4_epin_setstall(&priv->epin[EP0]);
+  stm32l4_epout_setstall(&priv->epout[EP0]);
+  priv->stalled = true;
+  stm32l4_ep0out_ctrlsetup(priv);
+}
+
+/****************************************************************************
+ * Device operations
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_ep_alloc
+ *
+ * Description:
+ *   Allocate an endpoint matching the parameters.
+ *
+ * Input Parameters:
+ *   eplog  - 7-bit logical endpoint number (direction bit ignored).  Zero means
+ *            that any endpoint matching the other requirements will suffice.  The
+ *            assigned endpoint can be found in the eplog field.
+ *   in     - true: IN (device-to-host) endpoint requested
+ *   eptype - Endpoint type.  One of {USB_EP_ATTR_XFER_ISOC, USB_EP_ATTR_XFER_BULK,
+ *            USB_EP_ATTR_XFER_INT}
+ *
+ ****************************************************************************/
+
+static FAR struct usbdev_ep_s *stm32l4_ep_alloc(FAR struct usbdev_s *dev,
+                                                uint8_t eplog, bool in,
+                                                uint8_t eptype)
+{
+  FAR struct stm32l4_usbdev_s *priv = (FAR struct stm32l4_usbdev_s *)dev;
+  uint8_t epavail;
+  irqstate_t flags;
+  int epphy;
+  int epno = 0;
+
+  usbtrace(TRACE_DEVALLOCEP, (uint16_t)eplog);
+
+  /* Ignore any direction bits in the logical address */
+
+  epphy = USB_EPNO(eplog);
+
+  /* Get the set of available endpoints depending on the direction */
+
+  flags = enter_critical_section();
+  epavail = priv->epavail[in];
+
+  /* A physical address of 0 means that any endpoint will do */
+
+  if (epphy > 0)
+    {
+      /* Otherwise, we will return the endpoint structure only for the requested
+       * 'logical' endpoint.  All of the other checks will still be performed.
+       *
+       * First, verify that the logical endpoint is in the range supported by
+       * by the hardware.
+       */
+
+      if (epphy >= STM32L4_NENDPOINTS)
+        {
+          usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADEPNO), (uint16_t)epphy);
+          return NULL;
+        }
+
+      /* Remove all of the candidate endpoints from the bitset except for the
+       * this physical endpoint number.
+       */
+
+      epavail &= (1 << epphy);
+    }
+
+  /* Is there an available endpoint? */
+
+  if (epavail)
+    {
+      /* Yes.. Select the lowest numbered endpoint in the set of available
+       * endpoints.
+       */
+
+      for (epno = 1; epno < STM32L4_NENDPOINTS; epno++)
+        {
+          uint8_t bit = 1 << epno;
+          if ((epavail & bit) != 0)
+            {
+              /* Mark the endpoint no longer available */
+
+              priv->epavail[in] &= ~(1 << epno);
+
+              /* And return the pointer to the standard endpoint structure */
+
+              leave_critical_section(flags);
+              return in ? &priv->epin[epno].ep : &priv->epout[epno].ep;
+            }
+        }
+
+      /* We should not get here */
+    }
+
+  usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_NOEP), (uint16_t)eplog);
+  leave_critical_section(flags);
+  return NULL;
+}
+
+/****************************************************************************
+ * Name: stm32l4_ep_free
+ *
+ * Description:
+ *   Free the previously allocated endpoint
+ *
+ ****************************************************************************/
+
+static void stm32l4_ep_free(FAR struct usbdev_s *dev,
+                            FAR struct usbdev_ep_s *ep)
+{
+  FAR struct stm32l4_usbdev_s *priv = (FAR struct stm32l4_usbdev_s *)dev;
+  FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep;
+  irqstate_t flags;
+
+  usbtrace(TRACE_DEVFREEEP, (uint16_t)privep->epphy);
+
+  if (priv && privep)
+    {
+      /* Mark the endpoint as available */
+
+      flags = enter_critical_section();
+      priv->epavail[privep->isin] |= (1 << privep->epphy);
+      leave_critical_section(flags);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_getframe
+ *
+ * Description:
+ *   Returns the current frame number
+ *
+ ****************************************************************************/
+
+static int stm32l4_getframe(struct usbdev_s *dev)
+{
+  uint32_t regval;
+
+  usbtrace(TRACE_DEVGETFRAME, 0);
+
+  /* Return the last frame number of the last SOF detected by the hardware */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_DSTS);
+  return (int)((regval & OTGFS_DSTS_SOFFN_MASK) >> OTGFS_DSTS_SOFFN_SHIFT);
+}
+
+/****************************************************************************
+ * Name: stm32l4_wakeup
+ *
+ * Description:
+ *   Exit suspend mode.
+ *
+ ****************************************************************************/
+
+static int stm32l4_wakeup(struct usbdev_s *dev)
+{
+  FAR struct stm32l4_usbdev_s *priv = (FAR struct stm32l4_usbdev_s *)dev;
+  uint32_t regval;
+  irqstate_t flags;
+
+  usbtrace(TRACE_DEVWAKEUP, 0);
+
+  /* Is wakeup enabled? */
+
+  flags = enter_critical_section();
+  if (priv->wakeup)
+    {
+      /* Yes... is the core suspended? */
+
+      regval = stm32l4_getreg(STM32L4_OTGFS_DSTS);
+      if ((regval & OTGFS_DSTS_SUSPSTS) != 0)
+        {
+          /* Re-start the PHY clock and un-gate USB core clock (HCLK) */
+
+#ifdef CONFIG_USBDEV_LOWPOWER
+          regval = stm32l4_getreg(STM32L4_OTGFS_PCGCCTL);
+          regval &= ~(OTGFS_PCGCCTL_STPPCLK | OTGFS_PCGCCTL_GATEHCLK);
+          stm32l4_putreg(regval, STM32L4_OTGFS_PCGCCTL);
+#endif
+          /* Activate Remote wakeup signaling */
+
+          regval  = stm32l4_getreg(STM32L4_OTGFS_DCTL);
+          regval |= OTGFS_DCTL_RWUSIG;
+          stm32l4_putreg(regval, STM32L4_OTGFS_DCTL);
+          up_mdelay(5);
+          regval &= ~OTGFS_DCTL_RWUSIG;
+          stm32l4_putreg(regval, STM32L4_OTGFS_DCTL);
+        }
+    }
+
+  leave_critical_section(flags);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_selfpowered
+ *
+ * Description:
+ *   Sets/clears the device self-powered feature
+ *
+ ****************************************************************************/
+
+static int stm32l4_selfpowered(struct usbdev_s *dev, bool selfpowered)
+{
+  FAR struct stm32l4_usbdev_s *priv = (FAR struct stm32l4_usbdev_s *)dev;
+
+  usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!dev)
+    {
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDPARMS), 0);
+      return -ENODEV;
+    }
+#endif
+
+  priv->selfpowered = selfpowered;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_pullup
+ *
+ * Description:
+ *   Software-controlled connect to/disconnect from USB host
+ *
+ ****************************************************************************/
+
+static int stm32l4_pullup(struct usbdev_s *dev, bool enable)
+{
+  uint32_t regval;
+
+  usbtrace(TRACE_DEVPULLUP, (uint16_t)enable);
+
+  irqstate_t flags = enter_critical_section();
+  regval = stm32l4_getreg(STM32L4_OTGFS_DCTL);
+  if (enable)
+    {
+      /* Connect the device by clearing the soft disconnect bit in the DCTL
+       * register
+       */
+
+      regval &= ~OTGFS_DCTL_SDIS;
+    }
+  else
+    {
+      /* Disconnect the device by setting the soft disconnect bit in the DCTL
+       * register
+       */
+
+      regval |= OTGFS_DCTL_SDIS;
+    }
+
+  stm32l4_putreg(regval, STM32L4_OTGFS_DCTL);
+  leave_critical_section(flags);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_setaddress
+ *
+ * Description:
+ *   Set the devices USB address
+ *
+ ****************************************************************************/
+
+static void stm32l4_setaddress(struct stm32l4_usbdev_s *priv,
+                               uint16_t address)
+{
+  uint32_t regval;
+
+  /* Set the device address in the DCFG register */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_DCFG);
+  regval &= ~OTGFS_DCFG_DAD_MASK;
+  regval |= ((uint32_t)address << OTGFS_DCFG_DAD_SHIFT);
+  stm32l4_putreg(regval, STM32L4_OTGFS_DCFG);
+
+  /* Are we now addressed?  (i.e., do we have a non-NULL device
+   * address?)
+   */
+
+  if (address != 0)
+    {
+      priv->devstate  = DEVSTATE_ADDRESSED;
+      priv->addressed = true;
+    }
+  else
+    {
+      priv->devstate  = DEVSTATE_DEFAULT;
+      priv->addressed = false;
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_txfifo_flush
+ *
+ * Description:
+ *   Flush the specific TX fifo.
+ *
+ ****************************************************************************/
+
+static int stm32l4_txfifo_flush(uint32_t txfnum)
+{
+  uint32_t regval;
+  uint32_t timeout;
+
+  /* Initiate the TX FIFO flush operation */
+
+  regval = OTGFS_GRSTCTL_TXFFLSH | txfnum;
+  stm32l4_putreg(regval, STM32L4_OTGFS_GRSTCTL);
+
+  /* Wait for the FLUSH to complete */
+
+  for (timeout = 0; timeout < STM32L4_FLUSH_DELAY; timeout++)
+    {
+      regval = stm32l4_getreg(STM32L4_OTGFS_GRSTCTL);
+      if ((regval & OTGFS_GRSTCTL_TXFFLSH) == 0)
+        {
+          break;
+        }
+    }
+
+  /* Wait for 3 PHY Clocks */
+
+  up_udelay(3);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_rxfifo_flush
+ *
+ * Description:
+ *   Flush the RX fifo.
+ *
+ ****************************************************************************/
+
+static int stm32l4_rxfifo_flush(void)
+{
+  uint32_t regval;
+  uint32_t timeout;
+
+  /* Initiate the RX FIFO flush operation */
+
+  stm32l4_putreg(OTGFS_GRSTCTL_RXFFLSH, STM32L4_OTGFS_GRSTCTL);
+
+  /* Wait for the FLUSH to complete */
+
+  for (timeout = 0; timeout < STM32L4_FLUSH_DELAY; timeout++)
+    {
+      regval = stm32l4_getreg(STM32L4_OTGFS_GRSTCTL);
+      if ((regval & OTGFS_GRSTCTL_RXFFLSH) == 0)
+        {
+          break;
+        }
+    }
+
+  /* Wait for 3 PHY Clocks */
+
+  up_udelay(3);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_swinitialize
+ *
+ * Description:
+ *   Initialize all driver data structures.
+ *
+ ****************************************************************************/
+
+static void stm32l4_swinitialize(FAR struct stm32l4_usbdev_s *priv)
+{
+  FAR struct stm32l4_ep_s *privep;
+  int i;
+
+  /* Initialize the device state structure */
+
+  memset(priv, 0, sizeof(struct stm32l4_usbdev_s));
+
+  priv->usbdev.ops = &g_devops;
+  priv->usbdev.ep0 = &priv->epin[EP0].ep;
+
+  priv->epavail[0] = STM32L4_EP_AVAILABLE;
+  priv->epavail[1] = STM32L4_EP_AVAILABLE;
+
+  priv->epin[EP0].ep.priv  = priv;
+  priv->epout[EP0].ep.priv = priv;
+
+  /* Initialize the IN endpoint list */
+
+  for (i = 0; i < STM32L4_NENDPOINTS; i++)
+    {
+      /* Set endpoint operations, reference to driver structure (not
+       * really necessary because there is only one controller), and
+       * the physical endpoint number (which is just the index to the
+       * endpoint).
+       */
+
+      privep           = &priv->epin[i];
+      privep->ep.ops   = &g_epops;
+      privep->dev      = priv;
+      privep->isin     = 1;
+
+      /* The index, i, is the physical endpoint address;  Map this
+       * to a logical endpoint address usable by the class driver.
+       */
+
+      privep->epphy    = i;
+      privep->ep.eplog = STM32L4_EPPHYIN2LOG(i);
+
+      /* Control until endpoint is activated */
+
+      privep->eptype       = USB_EP_ATTR_XFER_CONTROL;
+      privep->ep.maxpacket = CONFIG_USBDEV_EP0_MAXSIZE;
+    }
+
+  /* Initialize the OUT endpoint list */
+
+  for (i = 0; i < STM32L4_NENDPOINTS; i++)
+    {
+      /* Set endpoint operations, reference to driver structure (not
+       * really necessary because there is only one controller), and
+       * the physical endpoint number (which is just the index to the
+       * endpoint).
+       */
+
+      privep           = &priv->epout[i];
+      privep->ep.ops   = &g_epops;
+      privep->dev      = priv;
+
+      /* The index, i, is the physical endpoint address;  Map this
+       * to a logical endpoint address usable by the class driver.
+       */
+
+      privep->epphy    = i;
+      privep->ep.eplog = STM32L4_EPPHYOUT2LOG(i);
+
+      /* Control until endpoint is activated */
+
+      privep->eptype       = USB_EP_ATTR_XFER_CONTROL;
+      privep->ep.maxpacket = CONFIG_USBDEV_EP0_MAXSIZE;
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_hwinitialize
+ *
+ * Description:
+ *   Configure the OTG FS core for operation.
+ *
+ ****************************************************************************/
+
+static void stm32l4_hwinitialize(FAR struct stm32l4_usbdev_s *priv)
+{
+  uint32_t regval;
+  uint32_t timeout;
+  uint32_t address;
+  int i;
+
+  /* Enable Vbus monitoring in the Power control */
+
+  stm32l4_pwr_enableusv(true);
+
+  /* At start-up the core is in FS mode. */
+
+  /* Disable global interrupts by clearing the GINTMASK bit in the GAHBCFG
+   * register; Set the TXFELVL bit in the GAHBCFG register so that TxFIFO
+   * interrupts will occur when the TxFIFO is truly empty (not just half full).
+   */
+
+  stm32l4_putreg(OTGFS_GAHBCFG_TXFELVL, STM32L4_OTGFS_GAHBCFG);
+
+  /* Common USB OTG core initialization */
+  /* Reset after a PHY select and set Host mode.  First, wait for AHB master
+   * IDLE state.
+   */
+
+  for (timeout = 0; timeout < STM32L4_READY_DELAY; timeout++)
+    {
+      up_udelay(3);
+      regval = stm32l4_getreg(STM32L4_OTGFS_GRSTCTL);
+      if ((regval & OTGFS_GRSTCTL_AHBIDL) != 0)
+        {
+          break;
+        }
+    }
+
+  /* Then perform the core soft reset. */
+
+  stm32l4_putreg(OTGFS_GRSTCTL_CSRST, STM32L4_OTGFS_GRSTCTL);
+  for (timeout = 0; timeout < STM32L4_READY_DELAY; timeout++)
+    {
+      regval = stm32l4_getreg(STM32L4_OTGFS_GRSTCTL);
+      if ((regval & OTGFS_GRSTCTL_CSRST) == 0)
+        {
+          break;
+        }
+    }
+
+  /* Wait for 3 PHY Clocks */
+
+  up_udelay(3);
+
+  /* Deactivate the power down */
+
+  regval  = OTGFS_GCCFG_PWRDWN;
+
+# ifdef CONFIG_USBDEV_VBUSSENSING
+  /* Enable Vbus sensing */
+
+  regval |= OTGFS_GCCFG_VBDEN;
+# endif
+
+  stm32l4_putreg(regval, STM32L4_OTGFS_GCCFG);
+  up_mdelay(20);
+
+  /* When VBUS sensing is not used we need to force the B session valid */
+
+# ifndef CONFIG_USBDEV_VBUSSENSING
+  regval  =  stm32l4_getreg(STM32L4_OTGFS_GOTGCTL);
+  regval |= (OTGFS_GOTGCTL_BVALOEN | OTGFS_GOTGCTL_BVALOVAL);
+  stm32l4_putreg(regval, STM32L4_OTGFS_GOTGCTL);
+# endif
+
+  /* Force Device Mode */
+
+  regval  = stm32l4_getreg(STM32L4_OTGFS_GUSBCFG);
+  regval &= ~OTGFS_GUSBCFG_FHMOD;
+  regval |= OTGFS_GUSBCFG_FDMOD;
+  stm32l4_putreg(regval, STM32L4_OTGFS_GUSBCFG);
+  up_mdelay(50);
+
+  /* Initialize device mode */
+  /* Restart the PHY Clock */
+
+  stm32l4_putreg(0, STM32L4_OTGFS_PCGCCTL);
+
+  /* Device configuration register */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_DCFG);
+  regval &= ~OTGFS_DCFG_PFIVL_MASK;
+  regval |= OTGFS_DCFG_PFIVL_80PCT;
+  stm32l4_putreg(regval, STM32L4_OTGFS_DCFG);
+
+  /* Set full speed PHY */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_DCFG);
+  regval &= ~OTGFS_DCFG_DSPD_MASK;
+  regval |= OTGFS_DCFG_DSPD_FS;
+  stm32l4_putreg(regval, STM32L4_OTGFS_DCFG);
+
+  /* Set Rx FIFO size */
+
+  stm32l4_putreg(STM32L4_RXFIFO_WORDS, STM32L4_OTGFS_GRXFSIZ);
+
+#if STM32L4_NENDPOINTS > 0
+  /* EP0 TX */
+
+  address = STM32L4_RXFIFO_WORDS;
+  regval  = (address << OTGFS_DIEPTXF0_TX0FD_SHIFT) |
+            (STM32L4_EP0_TXFIFO_WORDS << OTGFS_DIEPTXF0_TX0FSA_SHIFT);
+  stm32l4_putreg(regval, STM32L4_OTGFS_DIEPTXF(0));
+#endif
+
+#if STM32L4_NENDPOINTS > 1
+  /* EP1 TX */
+
+  address += STM32L4_EP0_TXFIFO_WORDS;
+  regval   = (address << OTGFS_DIEPTXF_INEPTXSA_SHIFT) |
+             (STM32L4_EP1_TXFIFO_WORDS << OTGFS_DIEPTXF_INEPTXFD_SHIFT);
+  stm32l4_putreg(regval, STM32L4_OTGFS_DIEPTXF(1));
+#endif
+
+#if STM32L4_NENDPOINTS > 2
+  /* EP2 TX */
+
+  address += STM32L4_EP1_TXFIFO_WORDS;
+  regval   = (address << OTGFS_DIEPTXF_INEPTXSA_SHIFT) |
+             (STM32L4_EP2_TXFIFO_WORDS << OTGFS_DIEPTXF_INEPTXFD_SHIFT);
+  stm32l4_putreg(regval, STM32L4_OTGFS_DIEPTXF(2));
+#endif
+
+#if STM32L4_NENDPOINTS > 3
+  /* EP3 TX */
+
+  address += STM32L4_EP2_TXFIFO_WORDS;
+  regval   = (address << OTGFS_DIEPTXF_INEPTXSA_SHIFT) |
+             (STM32L4_EP3_TXFIFO_WORDS << OTGFS_DIEPTXF_INEPTXFD_SHIFT);
+  stm32l4_putreg(regval, STM32L4_OTGFS_DIEPTXF(3));
+#endif
+
+#if STM32L4_NENDPOINTS > 4
+  /* EP4 TX */
+
+  address += STM32L4_EP3_TXFIFO_WORDS;
+  regval   = (address << OTGFS_DIEPTXF_INEPTXSA_SHIFT) |
+             (STM32L4_EP4_TXFIFO_WORDS << OTGFS_DIEPTXF_INEPTXFD_SHIFT);
+  stm32l4_putreg(regval, STM32L4_OTGFS_DIEPTXF(4));
+#endif
+
+#if STM32L4_NENDPOINTS > 5
+  /* EP5 TX */
+
+  address += STM32L4_EP4_TXFIFO_WORDS;
+  regval   = (address << OTGFS_DIEPTXF_INEPTXSA_SHIFT) |
+             (STM32L4_EP5_TXFIFO_WORDS << OTGFS_DIEPTXF_INEPTXFD_SHIFT);
+  stm32l4_putreg(regval, STM32L4_OTGFS_DIEPTXF(5));
+#endif
+
+
+  /* Flush the FIFOs */
+
+  stm32l4_txfifo_flush(OTGFS_GRSTCTL_TXFNUM_DALL);
+  stm32l4_rxfifo_flush();
+
+  /* Clear all pending Device Interrupts */
+
+  stm32l4_putreg(0, STM32L4_OTGFS_DIEPMSK);
+  stm32l4_putreg(0, STM32L4_OTGFS_DOEPMSK);
+  stm32l4_putreg(0, STM32L4_OTGFS_DIEPEMPMSK);
+  stm32l4_putreg(0xffffffff, STM32L4_OTGFS_DAINT);
+  stm32l4_putreg(0, STM32L4_OTGFS_DAINTMSK);
+
+  /* Configure all IN endpoints */
+
+  for (i = 0; i < STM32L4_NENDPOINTS; i++)
+    {
+      regval = stm32l4_getreg(STM32L4_OTGFS_DIEPCTL(i));
+      if ((regval & OTGFS_DIEPCTL_EPENA) != 0)
+        {
+          /* The endpoint is already enabled */
+
+          regval = OTGFS_DIEPCTL_EPENA | OTGFS_DIEPCTL_SNAK;
+        }
+      else
+        {
+          regval = 0;
+        }
+
+      stm32l4_putreg(regval, STM32L4_OTGFS_DIEPCTL(i));
+      stm32l4_putreg(0, STM32L4_OTGFS_DIEPTSIZ(i));
+      stm32l4_putreg(0xff, STM32L4_OTGFS_DIEPINT(i));
+    }
+
+  /* Configure all OUT endpoints */
+
+  for (i = 0; i < STM32L4_NENDPOINTS; i++)
+    {
+      regval = stm32l4_getreg(STM32L4_OTGFS_DOEPCTL(i));
+      if ((regval & OTGFS_DOEPCTL_EPENA) != 0)
+        {
+          /* The endpoint is already enabled */
+
+          regval = OTGFS_DOEPCTL_EPENA | OTGFS_DOEPCTL_SNAK;
+        }
+      else
+        {
+          regval = 0;
+        }
+
+      stm32l4_putreg(regval, STM32L4_OTGFS_DOEPCTL(i));
+      stm32l4_putreg(0, STM32L4_OTGFS_DOEPTSIZ(i));
+      stm32l4_putreg(0xff, STM32L4_OTGFS_DOEPINT(i));
+    }
+
+  /* Disable all interrupts. */
+
+  stm32l4_putreg(0, STM32L4_OTGFS_GINTMSK);
+
+  /* Clear any pending USB_OTG Interrupts */
+
+  stm32l4_putreg(0xffffffff, STM32L4_OTGFS_GOTGINT);
+
+  /* Clear any pending interrupts */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_GINTSTS);
+  regval &=  OTGFS_GINT_RESERVED;
+  stm32l4_putreg(regval | OTGFS_GINT_RC_W1, STM32L4_OTGFS_GINTSTS);
+
+  /* Enable the interrupts in the INTMSK */
+
+  regval = (OTGFS_GINT_RXFLVL | OTGFS_GINT_USBSUSP | OTGFS_GINT_ENUMDNE |
+            OTGFS_GINT_IEP | OTGFS_GINT_OEP | OTGFS_GINT_USBRST);
+
+#ifdef CONFIG_USBDEV_ISOCHRONOUS
+  regval |= (OTGFS_GINT_IISOIXFR | OTGFS_GINT_IISOOXFR);
+#endif
+
+#ifdef CONFIG_USBDEV_SOFINTERRUPT
+  regval |= OTGFS_GINT_SOF;
+#endif
+
+#ifdef CONFIG_USBDEV_VBUSSENSING
+  regval |= (OTGFS_GINT_OTG | OTGFS_GINT_SRQ);
+#endif
+
+#ifdef CONFIG_DEBUG_FEATURES
+  regval |= OTGFS_GINT_MMIS;
+#endif
+
+  stm32l4_putreg(regval, STM32L4_OTGFS_GINTMSK);
+
+  /* Enable the USB global interrupt by setting GINTMSK in the global OTG
+   * FS AHB configuration register; Set the TXFELVL bit in the GAHBCFG
+   * register so that TxFIFO interrupts will occur when the TxFIFO is truly
+   * empty (not just half full).
+   */
+
+  stm32l4_putreg(OTGFS_GAHBCFG_GINTMSK | OTGFS_GAHBCFG_TXFELVL,
+               STM32L4_OTGFS_GAHBCFG);
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_usbinitialize
+ *
+ * Description:
+ *   Initialize USB hardware.
+ *
+ * Assumptions:
+ * - This function is called very early in the initialization sequence
+ * - PLL and GIO pin initialization is not performed here but should been in
+ *   the low-level  boot logic:  PLL1 must be configured for operation at 48MHz
+ *   and P0.23 and PO.31 in PINSEL1 must be configured for Vbus and USB connect
+ *   LED.
+ *
+ ****************************************************************************/
+
+void up_usbinitialize(void)
+{
+  /* At present, there is only a single OTG FS device support. Hence it is
+   * pre-allocated as g_otgfsdev.  However, in most code, the private data
+   * structure will be referenced using the 'priv' pointer (rather than the
+   * global data) in order to simplify any future support for multiple devices.
+   */
+
+  FAR struct stm32l4_usbdev_s *priv = &g_otgfsdev;
+  int ret;
+
+  usbtrace(TRACE_DEVINIT, 0);
+
+  /* Here we assume that:
+   *
+   * 1. GPIOA and OTG FS peripheral clocking has already been enabled as part
+   *    of the boot sequence.
+   * 2. Board-specific logic has already enabled other board specific GPIOs
+   *    for things like soft pull-up, VBUS sensing, power controls, and over-
+   *    current detection.
+   */
+
+  /* Configure OTG FS alternate function pins
+   *
+   * PIN* SIGNAL      DIRECTION
+   * ---- ----------- ----------
+   * PA8  OTG_FS_SOF  SOF clock output
+   * PA9  OTG_FS_VBUS VBUS input for device, Driven by external regulator by
+   *                  host (not an alternate function)
+   * PA10 OTG_FS_ID   OTG ID pin (only needed in Dual mode)
+   * PA11 OTG_FS_DM   D- I/O
+   * PA12 OTG_FS_DP   D+ I/O
+   *
+   * *Pins may vary from device-to-device.
+   */
+
+  stm32l4_configgpio(GPIO_OTGFS_DM);
+  stm32l4_configgpio(GPIO_OTGFS_DP);
+  stm32l4_configgpio(GPIO_OTGFS_ID);    /* Only needed for OTG */
+
+  /* SOF output pin configuration is configurable. */
+
+#ifdef CONFIG_STM32L4_OTGFS_SOFOUTPUT
+  stm32l4_configgpio(GPIO_OTGFS_SOF);
+#endif
+
+  /* Uninitialize the hardware so that we know that we are starting from a
+   * known state. */
+
+  up_usbuninitialize();
+
+  /* Initialize the driver data structure */
+
+  stm32l4_swinitialize(priv);
+
+  /* Attach the OTG FS interrupt handler */
+
+  ret = irq_attach(STM32L4_IRQ_OTGFS, stm32l4_usbinterrupt, NULL);
+  if (ret < 0)
+    {
+      uerr("irq_attach failed\n", ret);
+      goto errout;
+    }
+
+  /* Initialize the USB OTG core */
+
+  stm32l4_hwinitialize(priv);
+
+  /* Disconnect device */
+
+  stm32l4_pullup(&priv->usbdev, false);
+
+  /* Reset/Re-initialize the USB hardware */
+
+  stm32l4_usbreset(priv);
+
+  /* Enable USB controller interrupts at the NVIC */
+
+  up_enable_irq(STM32L4_IRQ_OTGFS);
+
+#ifdef CONFIG_ARCH_IRQPRIO
+  /* Set the interrupt priority */
+
+  up_prioritize_irq(STM32L4_IRQ_OTGFS, CONFIG_OTGFS_PRI);
+#endif
+  return;
+
+errout:
+  up_usbuninitialize();
+}
+
+/****************************************************************************
+ * Name: up_usbuninitialize
+ ****************************************************************************/
+
+void up_usbuninitialize(void)
+{
+  /* At present, there is only a single OTG FS device support. Hence it is
+   * pre-allocated as g_otgfsdev.  However, in most code, the private data
+   * structure will be referenced using the 'priv' pointer (rather than the
+   * global data) in order to simplify any future support for multiple devices.
+   */
+
+  FAR struct stm32l4_usbdev_s *priv = &g_otgfsdev;
+  irqstate_t flags;
+  int i;
+
+  usbtrace(TRACE_DEVUNINIT, 0);
+
+  if (priv->driver)
+    {
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_DRIVERREGISTERED), 0);
+      usbdev_unregister(priv->driver);
+    }
+
+  /* Disconnect device */
+
+  flags = enter_critical_section();
+  stm32l4_pullup(&priv->usbdev, false);
+  priv->usbdev.speed = USB_SPEED_UNKNOWN;
+
+  /* Disable and detach IRQs */
+
+  up_disable_irq(STM32L4_IRQ_OTGFS);
+  irq_detach(STM32L4_IRQ_OTGFS);
+
+  /* Disable all endpoint interrupts */
+
+  for (i = 0; i < STM32L4_NENDPOINTS; i++)
+    {
+      stm32l4_putreg(0xff, STM32L4_OTGFS_DIEPINT(i));
+      stm32l4_putreg(0xff, STM32L4_OTGFS_DOEPINT(i));
+    }
+
+  stm32l4_putreg(0, STM32L4_OTGFS_DIEPMSK);
+  stm32l4_putreg(0, STM32L4_OTGFS_DOEPMSK);
+  stm32l4_putreg(0, STM32L4_OTGFS_DIEPEMPMSK);
+  stm32l4_putreg(0, STM32L4_OTGFS_DAINTMSK);
+  stm32l4_putreg(0xffffffff, STM32L4_OTGFS_DAINT);
+
+  /* Flush the FIFOs */
+
+  stm32l4_txfifo_flush(OTGFS_GRSTCTL_TXFNUM_DALL);
+  stm32l4_rxfifo_flush();
+
+  /* TODO: Turn off USB power and clocking */
+
+  priv->devstate = DEVSTATE_DEFAULT;
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: usbdev_register
+ *
+ * Description:
+ *   Register a USB device class driver. The class driver's bind() method will be
+ *   called to bind it to a USB device driver.
+ *
+ ****************************************************************************/
+
+int usbdev_register(struct usbdevclass_driver_s *driver)
+{
+  /* At present, there is only a single OTG FS device support. Hence it is
+   * pre-allocated as g_otgfsdev.  However, in most code, the private data
+   * structure will be referenced using the 'priv' pointer (rather than the
+   * global data) in order to simplify any future support for multiple devices.
+   */
+
+  FAR struct stm32l4_usbdev_s *priv = &g_otgfsdev;
+  int ret;
+
+  usbtrace(TRACE_DEVREGISTER, 0);
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (!driver || !driver->ops->bind || !driver->ops->unbind ||
+      !driver->ops->disconnect || !driver->ops->setup)
+    {
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDPARMS), 0);
+      return -EINVAL;
+    }
+
+  if (priv->driver)
+    {
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_DRIVER), 0);
+      return -EBUSY;
+    }
+#endif
+
+  /* First hook up the driver */
+
+  priv->driver = driver;
+
+  /* Then bind the class driver */
+
+  ret = CLASS_BIND(driver, &priv->usbdev);
+  if (ret)
+    {
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BINDFAILED), (uint16_t)-ret);
+      priv->driver = NULL;
+    }
+  else
+    {
+      /* Enable USB controller interrupts */
+
+      up_enable_irq(STM32L4_IRQ_OTGFS);
+
+      /* FIXME: nothing seems to call DEV_CONNECT(), but we need to set
+       *        the RS bit to enable the controller.  It kind of makes sense
+       *        to do this after the class has bound to us...
+       * GEN:   This bug is really in the class driver.  It should make the
+       *        soft connect when it is ready to be enumerated.  I have added
+       *        that logic to the class drivers but left this logic here.
+       */
+
+      stm32l4_pullup(&priv->usbdev, true);
+      priv->usbdev.speed = USB_SPEED_FULL;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: usbdev_unregister
+ *
+ * Description:
+ *   Un-register usbdev class driver.If the USB device is connected to a USB host,
+ *   it will first disconnect().  The driver is also requested to unbind() and clean
+ *   up any device state, before this procedure finally returns.
+ *
+ ****************************************************************************/
+
+int usbdev_unregister(struct usbdevclass_driver_s *driver)
+{
+  /* At present, there is only a single OTG FS device support. Hence it is
+   * pre-allocated as g_otgfsdev.  However, in most code, the private data
+   * structure will be referenced using the 'priv' pointer (rather than the
+   * global data) in order to simplify any future support for multiple devices.
+   */
+
+  FAR struct stm32l4_usbdev_s *priv = &g_otgfsdev;
+  irqstate_t flags;
+
+  usbtrace(TRACE_DEVUNREGISTER, 0);
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (driver != priv->driver)
+    {
+      usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDPARMS), 0);
+      return -EINVAL;
+    }
+#endif
+
+  /* Reset the hardware and cancel all requests.  All requests must be
+   * canceled while the class driver is still bound.
+   */
+
+  flags = enter_critical_section();
+  stm32l4_usbreset(priv);
+  leave_critical_section(flags);
+
+  /* Unbind the class driver */
+
+  CLASS_UNBIND(driver, &priv->usbdev);
+
+  /* Disable USB controller interrupts */
+
+  flags = enter_critical_section();
+  up_disable_irq(STM32L4_IRQ_OTGFS);
+
+  /* Disconnect device */
+
+  stm32l4_pullup(&priv->usbdev, false);
+
+  /* Unhook the driver */
+
+  priv->driver = NULL;
+  leave_critical_section(flags);
+
+  return OK;
+}
+
+#endif /* CONFIG_USBDEV && CONFIG_STM32L4_OTGFSDEV */
diff --git a/arch/arm/src/stm32l4/stm32l4_otgfshost.c b/arch/arm/src/stm32l4/stm32l4_otgfshost.c
new file mode 100644
index 0000000000000000000000000000000000000000..d2c41ffd79a14d5a1755626c22619cf9bc2431b2
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_otgfshost.c
@@ -0,0 +1,5342 @@
+/****************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_otgfshost.c
+ *
+ *   Copyright (C) 2012-2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            dev@ziggurat29.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "chip.h"             /* Includes default GPIO settings */
+#include  /* May redefine GPIO settings */
+
+#include "up_arch.h"
+#include "up_internal.h"
+
+#include "stm32l4_usbhost.h"
+
+#if defined(CONFIG_USBHOST) && defined(CONFIG_STM32L4_OTGFS)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* Configuration ***************************************************************/
+/* STM32 USB OTG FS Host Driver Support
+ *
+ * Pre-requisites
+ *
+ *  CONFIG_USBHOST      - Enable general USB host support
+ *  CONFIG_STM32L4_OTGFS  - Enable the STM32 USB OTG FS block
+ *  CONFIG_STM32L4_SYSCFG - Needed
+ *
+ * Options:
+ *
+ *  CONFIG_STM32L4_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words.
+ *    Default 128 (512 bytes)
+ *  CONFIG_STM32L4_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO
+ *    in 32-bit words.  Default 96 (384 bytes)
+ *  CONFIG_STM32L4_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit
+ *    words.  Default 96 (384 bytes)
+ *  CONFIG_STM32L4_OTGFS_DESCSIZE - Maximum size of a descriptor.  Default: 128
+ *  CONFIG_STM32L4_OTGFS_SOFINTR - Enable SOF interrupts.  Why would you ever
+ *    want to do that?
+ *  CONFIG_STM32L4_USBHOST_REGDEBUG - Enable very low-level register access
+ *    debug.  Depends on CONFIG_DEBUG.
+ *  CONFIG_STM32L4_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
+ *    packets. Depends on CONFIG_DEBUG.
+ */
+
+/* Pre-requisites (partial) */
+
+#ifndef CONFIG_STM32L4_SYSCFG
+#  error "CONFIG_STM32L4_SYSCFG is required"
+#endif
+
+/* Default RxFIFO size */
+
+#ifndef CONFIG_STM32L4_OTGFS_RXFIFO_SIZE
+#  define CONFIG_STM32L4_OTGFS_RXFIFO_SIZE 128
+#endif
+
+/* Default host non-periodic Tx FIFO size */
+
+#ifndef CONFIG_STM32L4_OTGFS_NPTXFIFO_SIZE
+#  define CONFIG_STM32L4_OTGFS_NPTXFIFO_SIZE 96
+#endif
+
+/* Default host periodic Tx fifo size register */
+
+#ifndef CONFIG_STM32L4_OTGFS_PTXFIFO_SIZE
+#  define CONFIG_STM32L4_OTGFS_PTXFIFO_SIZE 96
+#endif
+
+/* Maximum size of a descriptor */
+
+#ifndef CONFIG_STM32L4_OTGFS_DESCSIZE
+#  define CONFIG_STM32L4_OTGFS_DESCSIZE 128
+#endif
+
+/* Register/packet debug depends on CONFIG_DEBUG */
+
+#ifndef CONFIG_DEBUG
+#  undef CONFIG_STM32L4_USBHOST_REGDEBUG
+#  undef CONFIG_STM32L4_USBHOST_PKTDUMP
+#endif
+
+/* HCD Setup *******************************************************************/
+/* Hardware capabilities */
+//XXX I think this needs to be 12 for the 'L4
+#define STM32L4_NHOST_CHANNELS      8   /* Number of host channels */
+#define STM32L4_MAX_PACKET_SIZE     64  /* Full speed max packet size */
+#define STM32L4_EP0_DEF_PACKET_SIZE 8   /* EP0 default packet size */
+#define STM32L4_EP0_MAX_PACKET_SIZE 64  /* EP0 FS max packet size */
+#define STM32L4_MAX_TX_FIFOS        15  /* Max number of TX FIFOs */
+#define STM32L4_MAX_PKTCOUNT        256 /* Max packet count */
+#define STM32L4_RETRY_COUNT         3   /* Number of ctrl transfer retries */
+
+/* Delays **********************************************************************/
+
+#define STM32L4_READY_DELAY         200000 /* In loop counts */
+#define STM32L4_FLUSH_DELAY         200000 /* In loop counts */
+#define STM32L4_SETUP_DELAY         SEC2TICK(5) /* 5 seconds in system ticks */
+#define STM32L4_DATANAK_DELAY       SEC2TICK(5) /* 5 seconds in system ticks */
+
+/* Ever-present MIN/MAX macros */
+
+#ifndef MIN
+#  define  MIN(a, b) (((a) < (b)) ? (a) : (b))
+#endif
+
+#ifndef MAX
+#  define  MAX(a, b) (((a) > (b)) ? (a) : (b))
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* The following enumeration represents the various states of the USB host
+ * state machine (for debug purposes only)
+ */
+
+enum stm32l4_smstate_e
+{
+  SMSTATE_DETACHED = 0,  /* Not attached to a device */
+  SMSTATE_ATTACHED,      /* Attached to a device */
+  SMSTATE_ENUM,          /* Attached, enumerating */
+  SMSTATE_CLASS_BOUND,   /* Enumeration complete, class bound */
+};
+
+/* This enumeration provides the reason for the channel halt. */
+
+enum stm32l4_chreason_e
+{
+  CHREASON_IDLE = 0,     /* Inactive (initial state) */
+  CHREASON_FREED,        /* Channel is no longer in use */
+  CHREASON_XFRC,         /* Transfer complete */
+  CHREASON_NAK,          /* NAK received */
+  CHREASON_NYET,         /* NotYet received */
+  CHREASON_STALL,        /* Endpoint stalled */
+  CHREASON_TXERR,        /* Transfer error received */
+  CHREASON_DTERR,        /* Data toggle error received */
+  CHREASON_FRMOR,        /* Frame overrun */
+  CHREASON_CANCELLED     /* Transfer cancelled */
+};
+
+/* This structure retains the state of one host channel.  NOTE: Since there
+ * is only one channel operation active at a time, some of the fields in
+ * in the structure could be moved in struct stm32l4_ubhost_s to achieve
+ * some memory savings.
+ */
+
+struct stm32l4_chan_s
+{
+  sem_t             waitsem;   /* Channel wait semaphore */
+  volatile uint8_t  result;    /* The result of the transfer */
+  volatile uint8_t  chreason;  /* Channel halt reason. See enum stm32l4_chreason_e */
+  uint8_t           chidx;     /* Channel index */
+  uint8_t           epno;      /* Device endpoint number (0-127) */
+  uint8_t           eptype;    /* See OTGFS_EPTYPE_* definitions */
+  uint8_t           funcaddr;  /* Device function address */
+  uint8_t           speed;     /* Device speed */
+  uint8_t           pid;       /* Data PID */
+  uint8_t           npackets;  /* Number of packets (for data toggle) */
+  bool              inuse;     /* True: This channel is "in use" */
+  volatile bool     indata1;   /* IN data toggle. True: DATA01 (Bulk and INTR only) */
+  volatile bool     outdata1;  /* OUT data toggle.  True: DATA01 */
+  bool              in;        /* True: IN endpoint */
+  volatile bool     waiter;    /* True: Thread is waiting for a channel event */
+  uint16_t          maxpacket; /* Max packet size */
+  uint16_t          buflen;    /* Buffer length (at start of transfer) */
+  volatile uint16_t xfrd;      /* Bytes transferred (at end of transfer) */
+  volatile uint16_t inflight;  /* Number of Tx bytes "in-flight" */
+  FAR uint8_t      *buffer;    /* Transfer buffer pointer */
+#ifdef CONFIG_USBHOST_ASYNCH
+  usbhost_asynch_t  callback;  /* Transfer complete callback */
+  FAR void         *arg;       /* Argument that accompanies the callback */
+#endif
+};
+
+/* A channel represents on uni-directional endpoint.  So, in the case of the
+ * bi-directional, control endpoint, there must be two channels to represent
+ * the endpoint.
+ */
+
+struct stm32l4_ctrlinfo_s
+{
+  uint8_t           inndx;     /* EP0 IN control channel index */
+  uint8_t           outndx;    /* EP0 OUT control channel index */
+};
+
+/* This structure retains the state of the USB host controller */
+
+struct stm32l4_usbhost_s
+{
+  /* Common device fields.  This must be the first thing defined in the
+   * structure so that it is possible to simply cast from struct usbhost_s
+   * to structstm32l4_usbhost_s.
+   */
+
+  struct usbhost_driver_s drvr;
+
+  /* This is the hub port description understood by class drivers */
+
+  struct usbhost_roothubport_s rhport;
+
+  /* Overall driver status */
+
+  volatile uint8_t  smstate;   /* The state of the USB host state machine */
+  uint8_t           chidx;     /* ID of channel waiting for space in Tx FIFO */
+  volatile bool     connected; /* Connected to device */
+  volatile bool     change;    /* Connection change */
+  volatile bool     pscwait;   /* True: Thread is waiting for a port event */
+  sem_t             exclsem;   /* Support mutually exclusive access */
+  sem_t             pscsem;    /* Semaphore to wait for a port event */
+  struct stm32l4_ctrlinfo_s ep0;  /* Root hub port EP0 description */
+
+#ifdef CONFIG_USBHOST_HUB
+  /* Used to pass external hub port events */
+
+  volatile struct usbhost_hubport_s *hport;
+#endif
+
+  /* The state of each host channel */
+
+  struct stm32l4_chan_s chan[STM32L4_MAX_TX_FIFOS];
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* Register operations ********************************************************/
+
+#ifdef CONFIG_STM32L4_USBHOST_REGDEBUG
+static void stm32l4_printreg(uint32_t addr, uint32_t val, bool iswrite);
+static void stm32l4_checkreg(uint32_t addr, uint32_t val, bool iswrite);
+static uint32_t stm32l4_getreg(uint32_t addr);
+static void stm32l4_putreg(uint32_t addr, uint32_t value);
+#else
+# define stm32l4_getreg(addr)     getreg32(addr)
+# define stm32l4_putreg(addr,val) putreg32(val,addr)
+#endif
+
+static inline void stm32l4_modifyreg(uint32_t addr, uint32_t clrbits,
+                                     uint32_t setbits);
+
+#ifdef CONFIG_STM32L4_USBHOST_PKTDUMP
+#  define stm32l4_pktdump(m,b,n) lib_dumpbuffer(m,b,n)
+#else
+#  define stm32l4_pktdump(m,b,n)
+#endif
+
+/* Semaphores ******************************************************************/
+
+static void stm32l4_takesem(FAR sem_t *sem);
+#define stm32l4_givesem(s) sem_post(s);
+
+/* Byte stream access helper functions *****************************************/
+
+static inline uint16_t stm32l4_getle16(FAR const uint8_t *val);
+
+/* Channel management **********************************************************/
+
+static int stm32l4_chan_alloc(FAR struct stm32l4_usbhost_s *priv);
+static inline void stm32l4_chan_free(FAR struct stm32l4_usbhost_s *priv, int chidx);
+static inline void stm32l4_chan_freeall(FAR struct stm32l4_usbhost_s *priv);
+static void stm32l4_chan_configure(FAR struct stm32l4_usbhost_s *priv, int chidx);
+static void stm32l4_chan_halt(FAR struct stm32l4_usbhost_s *priv, int chidx,
+                              enum stm32l4_chreason_e chreason);
+static int stm32l4_chan_waitsetup(FAR struct stm32l4_usbhost_s *priv,
+                                  FAR struct stm32l4_chan_s *chan);
+#ifdef CONFIG_USBHOST_ASYNCH
+static int stm32l4_chan_asynchsetup(FAR struct stm32l4_usbhost_s *priv,
+                                    FAR struct stm32l4_chan_s *chan,
+                                    usbhost_asynch_t callback, FAR void *arg);
+#endif
+static int stm32l4_chan_wait(FAR struct stm32l4_usbhost_s *priv,
+                             FAR struct stm32l4_chan_s *chan);
+static void stm32l4_chan_wakeup(FAR struct stm32l4_usbhost_s *priv,
+                                FAR struct stm32l4_chan_s *chan);
+static int stm32l4_ctrlchan_alloc(FAR struct stm32l4_usbhost_s *priv,
+                                  uint8_t epno, uint8_t funcaddr, uint8_t speed,
+                                  FAR struct stm32l4_ctrlinfo_s *ctrlep);
+static int stm32l4_ctrlep_alloc(FAR struct stm32l4_usbhost_s *priv,
+                                FAR const struct usbhost_epdesc_s *epdesc,
+                                FAR usbhost_ep_t *ep);
+static int stm32l4_xfrep_alloc(FAR struct stm32l4_usbhost_s *priv,
+                                FAR const struct usbhost_epdesc_s *epdesc,
+                                FAR usbhost_ep_t *ep);
+
+/* Control/data transfer logic *************************************************/
+
+static void stm32l4_transfer_start(FAR struct stm32l4_usbhost_s *priv, int chidx);
+#if 0 /* Not used */
+static inline uint16_t stm32l4_getframe(void);
+#endif
+static int stm32l4_ctrl_sendsetup(FAR struct stm32l4_usbhost_s *priv,
+                                  FAR struct stm32l4_ctrlinfo_s *ep0,
+                                  FAR const struct usb_ctrlreq_s *req);
+static int stm32l4_ctrl_senddata(FAR struct stm32l4_usbhost_s *priv,
+                                 FAR struct stm32l4_ctrlinfo_s *ep0,
+                                 FAR uint8_t *buffer, unsigned int buflen);
+static int stm32l4_ctrl_recvdata(FAR struct stm32l4_usbhost_s *priv,
+                                 FAR struct stm32l4_ctrlinfo_s *ep0,
+                                 FAR uint8_t *buffer, unsigned int buflen);
+static int stm32l4_in_setup(FAR struct stm32l4_usbhost_s *priv, int chidx);
+static ssize_t stm32l4_in_transfer(FAR struct stm32l4_usbhost_s *priv, int chidx,
+                                   FAR uint8_t *buffer, size_t buflen);
+#ifdef CONFIG_USBHOST_ASYNCH
+static void stm32l4_in_next(FAR struct stm32l4_usbhost_s *priv,
+                            FAR struct stm32l4_chan_s *chan);
+static int stm32l4_in_asynch(FAR struct stm32l4_usbhost_s *priv, int chidx,
+                             FAR uint8_t *buffer, size_t buflen,
+                             usbhost_asynch_t callback, FAR void *arg);
+#endif
+static int stm32l4_out_setup(FAR struct stm32l4_usbhost_s *priv, int chidx);
+static ssize_t stm32l4_out_transfer(FAR struct stm32l4_usbhost_s *priv, int chidx,
+                                    FAR uint8_t *buffer, size_t buflen);
+#ifdef CONFIG_USBHOST_ASYNCH
+static void stm32l4_out_next(FAR struct stm32l4_usbhost_s *priv,
+                             FAR struct stm32l4_chan_s *chan);
+static int stm32l4_out_asynch(FAR struct stm32l4_usbhost_s *priv, int chidx,
+                              FAR uint8_t *buffer, size_t buflen,
+                              usbhost_asynch_t callback, FAR void *arg);
+#endif
+
+/* Interrupt handling **********************************************************/
+/* Lower level interrupt handlers */
+
+static void stm32l4_gint_wrpacket(FAR struct stm32l4_usbhost_s *priv,
+                                  FAR uint8_t *buffer, int chidx, int buflen);
+static inline void stm32l4_gint_hcinisr(FAR struct stm32l4_usbhost_s *priv,
+                                        int chidx);
+static inline void stm32l4_gint_hcoutisr(FAR struct stm32l4_usbhost_s *priv,
+                                         int chidx);
+static void stm32l4_gint_connected(FAR struct stm32l4_usbhost_s *priv);
+static void stm32l4_gint_disconnected(FAR struct stm32l4_usbhost_s *priv);
+
+/* Second level interrupt handlers */
+
+#ifdef CONFIG_STM32L4_OTGFS_SOFINTR
+static inline void stm32l4_gint_sofisr(FAR struct stm32l4_usbhost_s *priv);
+#endif
+static inline void stm32l4_gint_rxflvlisr(FAR struct stm32l4_usbhost_s *priv);
+static inline void stm32l4_gint_nptxfeisr(FAR struct stm32l4_usbhost_s *priv);
+static inline void stm32l4_gint_ptxfeisr(FAR struct stm32l4_usbhost_s *priv);
+static inline void stm32l4_gint_hcisr(FAR struct stm32l4_usbhost_s *priv);
+static inline void stm32l4_gint_hprtisr(FAR struct stm32l4_usbhost_s *priv);
+static inline void stm32l4_gint_discisr(FAR struct stm32l4_usbhost_s *priv);
+static inline void stm32l4_gint_ipxfrisr(FAR struct stm32l4_usbhost_s *priv);
+
+/* First level, global interrupt handler */
+
+static int stm32l4_gint_isr(int irq, FAR void *context, FAR void *arg);
+
+/* Interrupt controls */
+
+static void stm32l4_gint_enable(void);
+static void stm32l4_gint_disable(void);
+static inline void stm32l4_hostinit_enable(void);
+static void stm32l4_txfe_enable(FAR struct stm32l4_usbhost_s *priv, int chidx);
+
+/* USB host controller operations **********************************************/
+
+static int stm32l4_wait(FAR struct usbhost_connection_s *conn,
+                        FAR struct usbhost_hubport_s **hport);
+static int stm32l4_rh_enumerate(FAR struct stm32l4_usbhost_s *priv,
+                                FAR struct usbhost_connection_s *conn,
+                                FAR struct usbhost_hubport_s *hport);
+static int stm32l4_enumerate(FAR struct usbhost_connection_s *conn,
+                             FAR struct usbhost_hubport_s *hport);
+
+static int stm32l4_ep0configure(FAR struct usbhost_driver_s *drvr,
+                                usbhost_ep_t ep0, uint8_t funcaddr, uint8_t speed,
+                                uint16_t maxpacketsize);
+static int stm32l4_epalloc(FAR struct usbhost_driver_s *drvr,
+                           FAR const FAR struct usbhost_epdesc_s *epdesc,
+                           FAR usbhost_ep_t *ep);
+static int stm32l4_epfree(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep);
+static int stm32l4_alloc(FAR struct usbhost_driver_s *drvr,
+                         FAR uint8_t **buffer, FAR size_t *maxlen);
+static int stm32l4_free(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer);
+static int stm32l4_ioalloc(FAR struct usbhost_driver_s *drvr,
+                           FAR uint8_t **buffer, size_t buflen);
+static int stm32l4_iofree(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer);
+static int stm32l4_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
+                          FAR const struct usb_ctrlreq_s *req,
+                          FAR uint8_t *buffer);
+static int stm32l4_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
+                           FAR const struct usb_ctrlreq_s *req,
+                           FAR const uint8_t *buffer);
+static ssize_t stm32l4_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep,
+                                FAR uint8_t *buffer, size_t buflen);
+#ifdef CONFIG_USBHOST_ASYNCH
+static int stm32l4_asynch(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep,
+                          FAR uint8_t *buffer, size_t buflen,
+                          usbhost_asynch_t callback, FAR void *arg);
+#endif
+static int stm32l4_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep);
+#ifdef CONFIG_USBHOST_HUB
+static int stm32l4_connect(FAR struct usbhost_driver_s *drvr,
+                           FAR struct usbhost_hubport_s *hport,
+                           bool connected);
+#endif
+static void stm32l4_disconnect(FAR struct usbhost_driver_s *drvr,
+                               FAR struct usbhost_hubport_s *hport);
+
+/* Initialization **************************************************************/
+
+static void stm32l4_portreset(FAR struct stm32l4_usbhost_s *priv);
+static void stm32l4_flush_txfifos(uint32_t txfnum);
+static void stm32l4_flush_rxfifo(void);
+static void stm32l4_vbusdrive(FAR struct stm32l4_usbhost_s *priv, bool state);
+static void stm32l4_host_initialize(FAR struct stm32l4_usbhost_s *priv);
+
+static inline void stm32l4_sw_initialize(FAR struct stm32l4_usbhost_s *priv);
+static inline int stm32l4_hw_initialize(FAR struct stm32l4_usbhost_s *priv);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* In this driver implementation, support is provided for only a single a single
+ * USB device.  All status information can be simply retained in a single global
+ * instance.
+ */
+
+static struct stm32l4_usbhost_s g_usbhost;
+
+/* This is the connection/enumeration interface */
+
+static struct usbhost_connection_s g_usbconn =
+{
+  .wait             = stm32l4_wait,
+  .enumerate        = stm32l4_enumerate,
+};
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_printreg
+ *
+ * Description:
+ *   Print the contents of an STM32xx register operation
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32L4_USBHOST_REGDEBUG
+static void stm32l4_printreg(uint32_t addr, uint32_t val, bool iswrite)
+{
+  lldbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_checkreg
+ *
+ * Description:
+ *   Get the contents of an STM32 register
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32L4_USBHOST_REGDEBUG
+static void stm32l4_checkreg(uint32_t addr, uint32_t val, bool iswrite)
+{
+  static uint32_t prevaddr = 0;
+  static uint32_t preval = 0;
+  static uint32_t count = 0;
+  static bool     prevwrite = false;
+
+  /* Is this the same value that we read from/wrote to the same register last time?
+   * Are we polling the register?  If so, suppress the output.
+   */
+
+  if (addr == prevaddr && val == preval && prevwrite == iswrite)
+    {
+      /* Yes.. Just increment the count */
+
+      count++;
+    }
+  else
+    {
+      /* No this is a new address or value or operation. Were there any
+       * duplicate accesses before this one?
+       */
+
+      if (count > 0)
+        {
+          /* Yes.. Just one? */
+
+          if (count == 1)
+            {
+              /* Yes.. Just one */
+
+              stm32l4_printreg(prevaddr, preval, prevwrite);
+            }
+          else
+            {
+              /* No.. More than one. */
+
+              lldbg("[repeats %d more times]\n", count);
+            }
+        }
+
+      /* Save the new address, value, count, and operation for next time */
+
+      prevaddr  = addr;
+      preval    = val;
+      count     = 0;
+      prevwrite = iswrite;
+
+      /* Show the new regisgter access */
+
+      stm32l4_printreg(addr, val, iswrite);
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_getreg
+ *
+ * Description:
+ *   Get the contents of an STM32 register
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32L4_USBHOST_REGDEBUG
+static uint32_t stm32l4_getreg(uint32_t addr)
+{
+  /* Read the value from the register */
+
+  uint32_t val = getreg32(addr);
+
+  /* Check if we need to print this value */
+
+  stm32l4_checkreg(addr, val, false);
+  return val;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_putreg
+ *
+ * Description:
+ *   Set the contents of an STM32 register to a value
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32L4_USBHOST_REGDEBUG
+static void stm32l4_putreg(uint32_t addr, uint32_t val)
+{
+  /* Check if we need to print this value */
+
+  stm32l4_checkreg(addr, val, true);
+
+  /* Write the value */
+
+  putreg32(val, addr);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_modifyreg
+ *
+ * Description:
+ *   Modify selected bits of an STM32 register.
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_modifyreg(uint32_t addr, uint32_t clrbits,
+                                     uint32_t setbits)
+{
+  stm32l4_putreg(addr, (((stm32l4_getreg(addr)) & ~clrbits) | setbits));
+}
+
+/****************************************************************************
+ * Name: stm32l4_takesem
+ *
+ * Description:
+ *   This is just a wrapper to handle the annoying behavior of semaphore
+ *   waits that return due to the receipt of a signal.
+ *
+ ****************************************************************************/
+
+static void stm32l4_takesem(FAR sem_t *sem)
+{
+  /* Take the semaphore (perhaps waiting) */
+
+  while (sem_wait(sem) != 0)
+    {
+      /* The only case that an error should occr here is if the wait was
+       * awakened by a signal.
+       */
+
+      ASSERT(errno == EINTR);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_getle16
+ *
+ * Description:
+ *   Get a (possibly unaligned) 16-bit little endian value.
+ *
+ ****************************************************************************/
+
+static inline uint16_t stm32l4_getle16(FAR const uint8_t *val)
+{
+  return (uint16_t)val[1] << 8 | (uint16_t)val[0];
+}
+
+/****************************************************************************
+ * Name: stm32l4_chan_alloc
+ *
+ * Description:
+ *   Allocate a channel.
+ *
+ ****************************************************************************/
+
+static int stm32l4_chan_alloc(FAR struct stm32l4_usbhost_s *priv)
+{
+  int chidx;
+
+  /* Search the table of channels */
+
+  for (chidx = 0; chidx < STM32L4_NHOST_CHANNELS; chidx++)
+    {
+      /* Is this channel available? */
+
+      if (!priv->chan[chidx].inuse)
+        {
+          /* Yes... make it "in use" and return the index */
+
+          priv->chan[chidx].inuse = true;
+          return chidx;
+        }
+    }
+
+  /* All of the channels are "in-use" */
+
+  return -EBUSY;
+}
+
+/****************************************************************************
+ * Name: stm32l4_chan_free
+ *
+ * Description:
+ *   Free a previoiusly allocated channel.
+ *
+ ****************************************************************************/
+
+static void stm32l4_chan_free(FAR struct stm32l4_usbhost_s *priv, int chidx)
+{
+  DEBUGASSERT((unsigned)chidx < STM32L4_NHOST_CHANNELS);
+
+  /* Halt the channel */
+
+  stm32l4_chan_halt(priv, chidx, CHREASON_FREED);
+
+  /* Mark the channel available */
+
+  priv->chan[chidx].inuse = false;
+}
+
+/****************************************************************************
+ * Name: stm32l4_chan_freeall
+ *
+ * Description:
+ *   Free all channels.
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_chan_freeall(FAR struct stm32l4_usbhost_s *priv)
+{
+  uint8_t chidx;
+
+  /* Free all host channels */
+
+  for (chidx = 2; chidx < STM32L4_NHOST_CHANNELS; chidx ++)
+    {
+      stm32l4_chan_free(priv, chidx);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_chan_configure
+ *
+ * Description:
+ *   Configure or re-configure a host channel.  Host channels are configured
+ *   when endpoint is allocated and EP0 (only) is re-configured with the
+ *   max packet size or device address changes.
+ *
+ ****************************************************************************/
+
+static void stm32l4_chan_configure(FAR struct stm32l4_usbhost_s *priv, int chidx)
+{
+  FAR struct stm32l4_chan_s *chan = &priv->chan[chidx];
+  uint32_t regval;
+
+  /* Clear any old pending interrupts for this host channel. */
+
+  stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), 0xffffffff);
+
+  /* Enable channel interrupts required for transfers on this channel. */
+
+  regval = 0;
+
+  switch (chan->eptype)
+    {
+    case OTGFS_EPTYPE_CTRL:
+    case OTGFS_EPTYPE_BULK:
+      {
+#ifdef HAVE_USBHOST_TRACE_VERBOSE
+        uint16_t intrace;
+        uint16_t outtrace;
+
+        /* Determine the definitive trace ID to use below */
+
+        if (chan->eptype == OTGFS_EPTYPE_CTRL)
+          {
+            intrace  = OTGFS_VTRACE2_CHANCONF_CTRL_IN;
+            outtrace = OTGFS_VTRACE2_CHANCONF_CTRL_OUT;
+          }
+        else
+          {
+            intrace  = OTGFS_VTRACE2_CHANCONF_BULK_IN;
+            outtrace = OTGFS_VTRACE2_CHANCONF_BULK_OUT;
+          }
+#endif
+
+        /* Interrupts required for CTRL and BULK endpoints */
+
+        regval |= (OTGFS_HCINT_XFRC  | OTGFS_HCINT_STALL | OTGFS_HCINT_NAK |
+                   OTGFS_HCINT_TXERR | OTGFS_HCINT_DTERR);
+
+        /* Additional setting for IN/OUT endpoints */
+
+        if (chan->in)
+          {
+            usbhost_vtrace2(intrace, chidx, chan->epno);
+            regval |= OTGFS_HCINT_BBERR;
+          }
+        else
+          {
+            usbhost_vtrace2(outtrace, chidx, chan->epno);
+            regval |= OTGFS_HCINT_NYET;
+          }
+      }
+      break;
+
+    case OTGFS_EPTYPE_INTR:
+      {
+        /* Interrupts required for INTR endpoints */
+
+        regval |= (OTGFS_HCINT_XFRC | OTGFS_HCINT_STALL | OTGFS_HCINT_NAK |
+                   OTGFS_HCINT_TXERR | OTGFS_HCINT_FRMOR | OTGFS_HCINT_DTERR);
+
+        /* Additional setting for IN endpoints */
+
+        if (chan->in)
+          {
+            usbhost_vtrace2(OTGFS_VTRACE2_CHANCONF_INTR_IN, chidx,
+                            chan->epno);
+            regval |= OTGFS_HCINT_BBERR;
+          }
+#ifdef HAVE_USBHOST_TRACE_VERBOSE
+        else
+          {
+            usbhost_vtrace2(OTGFS_VTRACE2_CHANCONF_INTR_OUT, chidx,
+                            chan->epno);
+          }
+#endif
+      }
+      break;
+
+    case OTGFS_EPTYPE_ISOC:
+      {
+        /* Interrupts required for ISOC endpoints */
+
+        regval |= (OTGFS_HCINT_XFRC | OTGFS_HCINT_ACK | OTGFS_HCINT_FRMOR);
+
+        /* Additional setting for IN endpoints */
+
+        if (chan->in)
+          {
+            usbhost_vtrace2(OTGFS_VTRACE2_CHANCONF_ISOC_IN, chidx,
+                            chan->epno);
+            regval |= (OTGFS_HCINT_TXERR | OTGFS_HCINT_BBERR);
+          }
+#ifdef HAVE_USBHOST_TRACE_VERBOSE
+        else
+          {
+            usbhost_vtrace2(OTGFS_VTRACE2_CHANCONF_ISOC_OUT, chidx,
+                            chan->epno);
+          }
+#endif
+      }
+      break;
+    }
+
+  stm32l4_putreg(STM32L4_OTGFS_HCINTMSK(chidx), regval);
+
+  /* Enable the top level host channel interrupt. */
+
+  stm32l4_modifyreg(STM32L4_OTGFS_HAINTMSK, 0, OTGFS_HAINT(chidx));
+
+  /* Make sure host channel interrupts are enabled. */
+
+  stm32l4_modifyreg(STM32L4_OTGFS_GINTMSK, 0, OTGFS_GINT_HC);
+
+  /* Program the HCCHAR register */
+
+  regval = ((uint32_t)chan->maxpacket << OTGFS_HCCHAR_MPSIZ_SHIFT) |
+           ((uint32_t)chan->epno      << OTGFS_HCCHAR_EPNUM_SHIFT) |
+           ((uint32_t)chan->eptype    << OTGFS_HCCHAR_EPTYP_SHIFT) |
+           ((uint32_t)chan->funcaddr  << OTGFS_HCCHAR_DAD_SHIFT);
+
+  /* Special case settings for low speed devices */
+
+  if (chan->speed == USB_SPEED_LOW)
+    {
+      regval |= OTGFS_HCCHAR_LSDEV;
+    }
+
+  /* Special case settings for IN endpoints */
+
+  if (chan->in)
+    {
+      regval |= OTGFS_HCCHAR_EPDIR_IN;
+    }
+
+  /* Special case settings for INTR endpoints */
+
+  if (chan->eptype == OTGFS_EPTYPE_INTR)
+    {
+      regval |= OTGFS_HCCHAR_ODDFRM;
+    }
+
+  /* Write the channel configuration */
+
+  stm32l4_putreg(STM32L4_OTGFS_HCCHAR(chidx), regval);
+}
+
+/****************************************************************************
+ * Name: stm32l4_chan_halt
+ *
+ * Description:
+ *   Halt the channel associated with 'chidx' by setting the CHannel DISable
+ *   (CHDIS) bit in in the HCCHAR register.
+ *
+ ****************************************************************************/
+
+static void stm32l4_chan_halt(FAR struct stm32l4_usbhost_s *priv, int chidx,
+                              enum stm32l4_chreason_e chreason)
+{
+  uint32_t hcchar;
+  uint32_t intmsk;
+  uint32_t eptype;
+  unsigned int avail;
+
+  /* Save the reason for the halt.  We need this in the channel halt interrupt
+   * handling logic to know what to do next.
+   */
+
+  usbhost_vtrace2(OTGFS_VTRACE2_CHANHALT, chidx, chreason);
+
+  priv->chan[chidx].chreason = (uint8_t)chreason;
+
+  /* "The application can disable any channel by programming the OTG_FS_HCCHARx
+   *  register with the CHDIS and CHENA bits set to 1. This enables the OTG_FS
+   *  host to flush the posted requests (if any) and generates a channel halted
+   *  interrupt. The application must wait for the CHH interrupt in OTG_FS_HCINTx
+   *  before reallocating the channel for other transactions.  The OTG_FS host
+   *  does not interrupt the transaction that has already been started on the
+   *  USB."
+   */
+
+  hcchar  = stm32l4_getreg(STM32L4_OTGFS_HCCHAR(chidx));
+  hcchar |= (OTGFS_HCCHAR_CHDIS | OTGFS_HCCHAR_CHENA);
+
+  /* Get the endpoint type from the HCCHAR register */
+
+  eptype = hcchar & OTGFS_HCCHAR_EPTYP_MASK;
+
+  /* Check for space in the Tx FIFO to issue the halt.
+   *
+   * "Before disabling a channel, the application must ensure that there is at
+   *  least one free space available in the non-periodic request queue (when
+   *  disabling a non-periodic channel) or the periodic request queue (when
+   *  disabling a periodic channel). The application can simply flush the
+   *  posted requests when the Request queue is full (before disabling the
+   *  channel), by programming the OTG_FS_HCCHARx register with the CHDIS bit
+   *  set to 1, and the CHENA bit cleared to 0.
+   */
+
+  if (eptype == OTGFS_HCCHAR_EPTYP_CTRL || eptype == OTGFS_HCCHAR_EPTYP_BULK)
+    {
+      /* Get the number of words available in the non-periodic Tx FIFO. */
+
+      avail = stm32l4_getreg(STM32L4_OTGFS_HNPTXSTS) & OTGFS_HNPTXSTS_NPTXFSAV_MASK;
+    }
+  else /* if (eptype == OTGFS_HCCHAR_EPTYP_ISOC || eptype == OTGFS_HCCHAR_EPTYP_INTR) */
+    {
+      /* Get the number of words available in the non-periodic Tx FIFO. */
+
+      avail = stm32l4_getreg(STM32L4_OTGFS_HPTXSTS) & OTGFS_HPTXSTS_PTXFSAVL_MASK;
+    }
+
+  /* Check if there is any space available in the Tx FIFO. */
+
+  if (avail == 0)
+    {
+      /* The Tx FIFO is full... disable the channel to flush the requests */
+
+      hcchar &= ~OTGFS_HCCHAR_CHENA;
+    }
+
+  /* Unmask the CHannel Halted (CHH) interrupt */
+
+  intmsk  = stm32l4_getreg(STM32L4_OTGFS_HCINTMSK(chidx));
+  intmsk |= OTGFS_HCINT_CHH;
+  stm32l4_putreg(STM32L4_OTGFS_HCINTMSK(chidx), intmsk);
+
+  /* Halt the channel by setting CHDIS (and maybe CHENA) in the HCCHAR */
+
+  stm32l4_putreg(STM32L4_OTGFS_HCCHAR(chidx), hcchar);
+}
+
+/****************************************************************************
+ * Name: stm32l4_chan_waitsetup
+ *
+ * Description:
+ *   Set the request for the transfer complete event well BEFORE enabling the
+ *   transfer (as soon as we are absolutely committed to the to avoid transfer).
+ *   We do this to minimize race conditions.  This logic would have to be expanded
+ *   if we want to have more than one packet in flight at a time!
+ *
+ * Assumptions:
+ *   Called from a normal thread context BEFORE the transfer has been started.
+ *
+ ****************************************************************************/
+
+static int stm32l4_chan_waitsetup(FAR struct stm32l4_usbhost_s *priv,
+                                  FAR struct stm32l4_chan_s *chan)
+{
+  irqstate_t flags = enter_critical_section();
+  int        ret   = -ENODEV;
+
+  /* Is the device still connected? */
+
+  if (priv->connected)
+    {
+      /* Yes.. then set waiter to indicate that we expect to be informed when
+       * either (1) the device is disconnected, or (2) the transfer completed.
+       */
+
+      chan->waiter   = true;
+#ifdef CONFIG_USBHOST_ASYNCH
+      chan->callback = NULL;
+      chan->arg      = NULL;
+#endif
+      ret            = OK;
+    }
+
+  leave_critical_section(flags);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32l4_chan_asynchsetup
+ *
+ * Description:
+ *   Set the request for the transfer complete event well BEFORE enabling the
+ *   transfer (as soon as we are absolutely committed to the to avoid transfer).
+ *   We do this to minimize race conditions.  This logic would have to be expanded
+ *   if we want to have more than one packet in flight at a time!
+ *
+ * Assumptions:
+ *   Might be called from the level of an interrupt handler
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBHOST_ASYNCH
+static int stm32l4_chan_asynchsetup(FAR struct stm32l4_usbhost_s *priv,
+                                    FAR struct stm32l4_chan_s *chan,
+                                    usbhost_asynch_t callback, FAR void *arg)
+{
+  irqstate_t flags = enter_critical_section();
+  int        ret   = -ENODEV;
+
+  /* Is the device still connected? */
+
+  if (priv->connected)
+    {
+      /* Yes.. then set waiter to indicate that we expect to be informed when
+       * either (1) the device is disconnected, or (2) the transfer completed.
+       */
+
+      chan->waiter   = false;
+      chan->callback = callback;
+      chan->arg      = arg;
+      ret            = OK;
+    }
+
+  leave_critical_section(flags);
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_chan_wait
+ *
+ * Description:
+ *   Wait for a transfer on a channel to complete.
+ *
+ * Assumptions:
+ *   Called from a normal thread context
+ *
+ ****************************************************************************/
+
+static int stm32l4_chan_wait(FAR struct stm32l4_usbhost_s *priv,
+                             FAR struct stm32l4_chan_s *chan)
+{
+  irqstate_t flags;
+  int ret;
+
+  /* Disable interrupts so that the following operations will be atomic.  On
+   * the OTG FS global interrupt needs to be disabled.  However, here we disable
+   * all interrupts to exploit that fact that interrupts will be re-enabled
+   * while we wait.
+   */
+
+  flags = enter_critical_section();
+
+  /* Loop, testing for an end of transfer condition.  The channel 'result'
+   * was set to EBUSY and 'waiter' was set to true before the transfer; 'waiter'
+   * will be set to false and 'result' will be set appropriately when the
+   * transfer is completed.
+   */
+
+  do
+    {
+      /* Wait for the transfer to complete.  NOTE the transfer may already
+       * completed before we get here or the transfer may complete while we
+       * wait here.
+       */
+
+      ret = sem_wait(&chan->waitsem);
+
+      /* sem_wait should succeed.  But it is possible that we could be
+       * awakened by a signal too.
+       */
+
+      DEBUGASSERT(ret == OK || get_errno() == EINTR);
+    }
+  while (chan->waiter);
+
+  /* The transfer is complete re-enable interrupts and return the result */
+
+  ret = -(int)chan->result;
+  leave_critical_section(flags);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: stm32l4_chan_wakeup
+ *
+ * Description:
+ *   A channel transfer has completed... wakeup any threads waiting for the
+ *   transfer to complete.
+ *
+ * Assumptions:
+ *   This function is called from the transfer complete interrupt handler for
+ *   the channel.  Interrupts are disabled.
+ *
+ ****************************************************************************/
+
+static void stm32l4_chan_wakeup(FAR struct stm32l4_usbhost_s *priv,
+                                FAR struct stm32l4_chan_s *chan)
+{
+  /* Is the transfer complete? */
+
+  if (chan->result != EBUSY)
+    {
+      /* Is there a thread waiting for this transfer to complete? */
+
+      if (chan->waiter)
+        {
+#ifdef CONFIG_USBHOST_ASYNCH
+          /* Yes.. there should not also be a callback scheduled */
+
+          DEBUGASSERT(chan->callback == NULL);
+#endif
+          /* Wake'em up! */
+
+          usbhost_vtrace2(chan->in ? OTGFS_VTRACE2_CHANWAKEUP_IN :
+                                     OTGFS_VTRACE2_CHANWAKEUP_OUT,
+                          chan->epno, chan->result);
+
+          stm32l4_givesem(&chan->waitsem);
+          chan->waiter = false;
+        }
+
+#ifdef CONFIG_USBHOST_ASYNCH
+      /* No.. is an asynchronous callback expected when the transfer
+       * completes?
+       */
+
+      else if (chan->callback)
+        {
+          /* Handle continuation of IN/OUT pipes */
+
+          if (chan->in)
+            {
+              stm32l4_in_next(priv, chan);
+            }
+          else
+            {
+              stm32l4_out_next(priv, chan);
+            }
+        }
+#endif
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_ctrlchan_alloc
+ *
+ * Description:
+ *   Allocate and configured channels for a control pipe.
+ *
+ ****************************************************************************/
+
+static int stm32l4_ctrlchan_alloc(FAR struct stm32l4_usbhost_s *priv,
+                                  uint8_t epno, uint8_t funcaddr, uint8_t speed,
+                                  FAR struct stm32l4_ctrlinfo_s *ctrlep)
+{
+  FAR struct stm32l4_chan_s *chan;
+  int inndx;
+  int outndx;
+
+  outndx = stm32l4_chan_alloc(priv);
+  if (outndx < 0)
+    {
+      return -ENOMEM;
+    }
+
+  ctrlep->outndx  = outndx;
+  chan            = &priv->chan[outndx];
+  chan->epno      = epno;
+  chan->in        = false;
+  chan->eptype    = OTGFS_EPTYPE_CTRL;
+  chan->funcaddr  = funcaddr;
+  chan->speed     = speed;
+  chan->maxpacket = STM32L4_EP0_DEF_PACKET_SIZE;
+  chan->indata1   = false;
+  chan->outdata1  = false;
+
+  /* Configure control OUT channels */
+
+  stm32l4_chan_configure(priv, outndx);
+
+  /* Allocate and initialize the control IN channel */
+
+  inndx = stm32l4_chan_alloc(priv);
+  if (inndx < 0)
+    {
+      stm32l4_chan_free(priv, outndx);
+      return -ENOMEM;
+    }
+
+  ctrlep->inndx   = inndx;
+  chan            = &priv->chan[inndx];
+  chan->epno      = epno;
+  chan->in        = true;
+  chan->eptype    = OTGFS_EPTYPE_CTRL;
+  chan->funcaddr  = funcaddr;
+  chan->speed     = speed;
+  chan->maxpacket = STM32L4_EP0_DEF_PACKET_SIZE;
+  chan->indata1   = false;
+  chan->outdata1  = false;
+
+  /* Configure control IN channels */
+
+  stm32l4_chan_configure(priv, inndx);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_ctrlep_alloc
+ *
+ * Description:
+ *   Allocate a container and channels for control pipe.
+ *
+ * Input Parameters:
+ *   priv - The private USB host driver state.
+ *   epdesc - Describes the endpoint to be allocated.
+ *   ep - A memory location provided by the caller in which to receive the
+ *      allocated endpoint descriptor.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   This function will *not* be called from an interrupt handler.
+ *
+ ****************************************************************************/
+
+static int stm32l4_ctrlep_alloc(FAR struct stm32l4_usbhost_s *priv,
+                                FAR const struct usbhost_epdesc_s *epdesc,
+                                FAR usbhost_ep_t *ep)
+{
+  FAR struct usbhost_hubport_s *hport;
+  FAR struct stm32l4_ctrlinfo_s *ctrlep;
+  int ret;
+
+  /* Sanity check.  NOTE that this method should only be called if a device is
+   * connected (because we need a valid low speed indication).
+   */
+
+  DEBUGASSERT(epdesc->hport != NULL);
+  hport = epdesc->hport;
+
+  /* Allocate a container for the control endpoint */
+
+  ctrlep = (FAR struct stm32l4_ctrlinfo_s *)kmm_malloc(sizeof(struct stm32l4_ctrlinfo_s));
+  if (ctrlep == NULL)
+    {
+      uerr("ERROR: Failed to allocate control endpoint container\n");
+      return -ENOMEM;
+    }
+
+  /* Then allocate and configure the IN/OUT channnels  */
+
+  ret = stm32l4_ctrlchan_alloc(priv, epdesc->addr & USB_EPNO_MASK,
+                             hport->funcaddr, hport->speed, ctrlep);
+  if (ret < 0)
+    {
+      uerr("ERROR: stm32l4_ctrlchan_alloc failed: %d\n", ret);
+      kmm_free(ctrlep);
+      return ret;
+    }
+
+  /* Return a pointer to the control pipe container as the pipe "handle" */
+
+  *ep = (usbhost_ep_t)ctrlep;
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32l4_xfrep_alloc
+ *
+ * Description:
+ *   Allocate and configure one unidirectional endpoint.
+ *
+ * Input Parameters:
+ *   priv - The private USB host driver state.
+ *   epdesc - Describes the endpoint to be allocated.
+ *   ep - A memory location provided by the caller in which to receive the
+ *      allocated endpoint descriptor.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   This function will *not* be called from an interrupt handler.
+ *
+ ************************************************************************************/
+
+static int stm32l4_xfrep_alloc(FAR struct stm32l4_usbhost_s *priv,
+                               FAR const struct usbhost_epdesc_s *epdesc,
+                               FAR usbhost_ep_t *ep)
+{
+  struct usbhost_hubport_s *hport;
+  FAR struct stm32l4_chan_s *chan;
+  int chidx;
+
+  /* Sanity check.  NOTE that this method should only be called if a device is
+   * connected (because we need a valid low speed indication).
+   */
+
+  DEBUGASSERT(epdesc->hport != NULL);
+  hport = epdesc->hport;
+
+  /* Allocate a host channel for the endpoint */
+
+  chidx = stm32l4_chan_alloc(priv);
+  if (chidx < 0)
+    {
+      uerr("ERROR: Failed to allocate a host channel\n");
+      return -ENOMEM;
+    }
+
+  /* Decode the endpoint descriptor to initialize the channel data structures.
+   * Note:  Here we depend on the fact that the endpoint point type is
+   * encoded in the same way in the endpoint descriptor as it is in the OTG
+   * HS hardware.
+   */
+
+  chan            = &priv->chan[chidx];
+  chan->epno      = epdesc->addr & USB_EPNO_MASK;
+  chan->in        = epdesc->in;
+  chan->eptype    = epdesc->xfrtype;
+  chan->funcaddr  = hport->funcaddr;
+  chan->speed     = hport->speed;
+  chan->maxpacket = epdesc->mxpacketsize;
+  chan->indata1   = false;
+  chan->outdata1  = false;
+
+  /* Then configure the endpoint */
+
+  stm32l4_chan_configure(priv, chidx);
+
+  /* Return the index to the allocated channel as the endpoint "handle" */
+
+  *ep = (usbhost_ep_t)chidx;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_transfer_start
+ *
+ * Description:
+ *   Start at transfer on the select IN or OUT channel.
+ *
+ ****************************************************************************/
+
+static void stm32l4_transfer_start(FAR struct stm32l4_usbhost_s *priv,
+                                   int chidx)
+{
+  FAR struct stm32l4_chan_s *chan;
+  uint32_t regval;
+  unsigned int npackets;
+  unsigned int maxpacket;
+  unsigned int avail;
+  unsigned int wrsize;
+  unsigned int minsize;
+
+  /* Set up the initial state of the transfer */
+
+  chan           = &priv->chan[chidx];
+
+  usbhost_vtrace2(OTGFS_VTRACE2_STARTTRANSFER, chidx, chan->buflen);
+
+  chan->result   = EBUSY;
+  chan->inflight = 0;
+  chan->xfrd     = 0;
+  priv->chidx    = chidx;
+
+  /* Compute the expected number of packets associated to the transfer.
+   * If the transfer length is zero (or less than the size of one maximum
+   * size packet), then one packet is expected.
+   */
+
+  /* If the transfer size is greater than one packet, then calculate the
+   * number of packets that will be received/sent, including any partial
+   * final packet.
+   */
+
+  maxpacket = chan->maxpacket;
+
+  if (chan->buflen > maxpacket)
+    {
+      npackets = (chan->buflen + maxpacket - 1) / maxpacket;
+
+      /* Clip if the buffer length if it exceeds the maximum number of
+       * packets that can be transferred (this should not happen).
+       */
+
+      if (npackets > STM32L4_MAX_PKTCOUNT)
+        {
+          npackets = STM32L4_MAX_PKTCOUNT;
+          chan->buflen = STM32L4_MAX_PKTCOUNT * maxpacket;
+          usbhost_trace2(OTGFS_TRACE2_CLIP, chidx, chan->buflen);
+        }
+    }
+  else
+    {
+      /* One packet will be sent/received (might be a zero length packet) */
+
+      npackets = 1;
+    }
+
+  /* If it is an IN transfer, then adjust the size of the buffer UP to
+   * a full number of packets.  Hmmm... couldn't this cause an overrun
+   * into unallocated memory?
+   */
+
+#if 0 /* Think about this */
+  if (chan->in)
+    {
+      /* Force the buffer length to an even multiple of maxpacket */
+
+      chan->buflen = npackets * maxpacket;
+    }
+#endif
+
+  /* Save the number of packets in the transfer.  We will need this in
+   * order to set the next data toggle correctly when the transfer
+   * completes.
+   */
+
+  chan->npackets = (uint8_t)npackets;
+
+  /* Setup the HCTSIZn register */
+
+  regval = ((uint32_t)chan->buflen << OTGFS_HCTSIZ_XFRSIZ_SHIFT) |
+           ((uint32_t)npackets << OTGFS_HCTSIZ_PKTCNT_SHIFT) |
+           ((uint32_t)chan->pid << OTGFS_HCTSIZ_DPID_SHIFT);
+  stm32l4_putreg(STM32L4_OTGFS_HCTSIZ(chidx), regval);
+
+  /* Setup the HCCHAR register: Frame oddness and host channel enable */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_HCCHAR(chidx));
+
+  /* Set/clear the Odd Frame bit.  Check for an even frame; if so set Odd
+   * Frame. This field is applicable for only periodic (isochronous and
+   * interrupt) channels.
+   */
+
+  if ((stm32l4_getreg(STM32L4_OTGFS_HFNUM) & 1) == 0)
+    {
+      regval |= OTGFS_HCCHAR_ODDFRM;
+    }
+  else
+    {
+      regval &= ~OTGFS_HCCHAR_ODDFRM;
+    }
+
+  regval &= ~OTGFS_HCCHAR_CHDIS;
+  regval |= OTGFS_HCCHAR_CHENA;
+  stm32l4_putreg(STM32L4_OTGFS_HCCHAR(chidx), regval);
+
+  /* If this is an out transfer, then we need to do more.. we need to copy
+   * the outgoing data into the correct TxFIFO.
+   */
+
+  if (!chan->in && chan->buflen > 0)
+    {
+      /* Handle non-periodic (CTRL and BULK) OUT transfers differently than
+       * periodic (INTR and ISOC) OUT transfers.
+       */
+
+      minsize = MIN(chan->buflen, chan->maxpacket);
+
+      switch (chan->eptype)
+        {
+        case OTGFS_EPTYPE_CTRL: /* Non periodic transfer */
+        case OTGFS_EPTYPE_BULK:
+          {
+            /* Read the Non-periodic Tx FIFO status register */
+
+            regval = stm32l4_getreg(STM32L4_OTGFS_HNPTXSTS);
+            avail  = ((regval & OTGFS_HNPTXSTS_NPTXFSAV_MASK) >> OTGFS_HNPTXSTS_NPTXFSAV_SHIFT) << 2;
+          }
+          break;
+
+        /* Periodic transfer */
+
+        case OTGFS_EPTYPE_INTR:
+        case OTGFS_EPTYPE_ISOC:
+          {
+            /* Read the Non-periodic Tx FIFO status register */
+
+            regval = stm32l4_getreg(STM32L4_OTGFS_HPTXSTS);
+            avail  = ((regval & OTGFS_HPTXSTS_PTXFSAVL_MASK) >> OTGFS_HPTXSTS_PTXFSAVL_SHIFT) << 2;
+          }
+          break;
+
+        default:
+          DEBUGASSERT(false);
+          return;
+        }
+
+      /* Is there space in the TxFIFO to hold the minimum size packet? */
+
+      if (minsize <= avail)
+        {
+          /* Yes.. Get the size of the biggest thing that we can put in the Tx FIFO now */
+
+          wrsize = chan->buflen;
+          if (wrsize > avail)
+            {
+              /* Clip the write size to the number of full, max sized packets
+               * that will fit in the Tx FIFO.
+               */
+
+              unsigned int wrpackets = avail / chan->maxpacket;
+              wrsize = wrpackets * chan->maxpacket;
+            }
+
+          /* Write packet into the Tx FIFO. */
+
+          stm32l4_gint_wrpacket(priv, chan->buffer, chidx, wrsize);
+        }
+
+      /* Did we put the entire buffer into the Tx FIFO? */
+
+      if (chan->buflen > avail)
+        {
+          /* No, there was insufficient space to hold the entire transfer ...
+           * Enable the Tx FIFO interrupt to handle the transfer when the Tx
+           * FIFO becomes empty.
+           */
+
+           stm32l4_txfe_enable(priv, chidx);
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_getframe
+ *
+ * Description:
+ *   Get the current frame number.  The frame number (FRNUM) field increments
+ *   when a new SOF is transmitted on the USB, and is cleared to 0 when it
+ *   reaches 0x3fff.
+ *
+ ****************************************************************************/
+
+#if 0 /* Not used */
+static inline uint16_t stm32l4_getframe(void)
+{
+  return (uint16_t)(stm32l4_getreg(STM32L4_OTGFS_HFNUM) & OTGFS_HFNUM_FRNUM_MASK);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_ctrl_sendsetup
+ *
+ * Description:
+ *   Send an IN/OUT SETUP packet.
+ *
+ ****************************************************************************/
+
+static int stm32l4_ctrl_sendsetup(FAR struct stm32l4_usbhost_s *priv,
+                                  FAR struct stm32l4_ctrlinfo_s *ep0,
+                                  FAR const struct usb_ctrlreq_s *req)
+{
+  FAR struct stm32l4_chan_s *chan;
+  systime_t start;
+  systime_t elapsed;
+  int ret;
+
+  /* Loop while the device reports NAK (and a timeout is not exceeded */
+
+  chan  = &priv->chan[ep0->outndx];
+  start = clock_systimer();
+
+  do
+    {
+      /* Send the  SETUP packet */
+
+      chan->pid    = OTGFS_PID_SETUP;
+      chan->buffer = (FAR uint8_t *)req;
+      chan->buflen = USB_SIZEOF_CTRLREQ;
+      chan->xfrd   = 0;
+
+      /* Set up for the wait BEFORE starting the transfer */
+
+      ret = stm32l4_chan_waitsetup(priv, chan);
+      if (ret < 0)
+        {
+          usbhost_trace1(OTGFS_TRACE1_DEVDISCONN, 0);
+          return ret;
+        }
+
+      /* Start the transfer */
+
+      stm32l4_transfer_start(priv, ep0->outndx);
+
+      /* Wait for the transfer to complete */
+
+      ret = stm32l4_chan_wait(priv, chan);
+
+      /* Return on success and for all failures other than EAGAIN.  EAGAIN
+       * means that the device NAKed the SETUP command and that we should
+       * try a few more times.
+       */
+
+      if (ret != -EAGAIN)
+        {
+          /* Output some debug information if the transfer failed */
+
+          if (ret < 0)
+            {
+              usbhost_trace1(OTGFS_TRACE1_TRNSFRFAILED, ret);
+            }
+
+          /* Return the result in any event */
+
+          return ret;
+        }
+
+      /* Get the elapsed time (in frames) */
+
+      elapsed = clock_systimer() - start;
+    }
+  while (elapsed < STM32L4_SETUP_DELAY);
+
+  return -ETIMEDOUT;
+}
+
+/****************************************************************************
+ * Name: stm32l4_ctrl_senddata
+ *
+ * Description:
+ *   Send data in the data phase of an OUT control transfer.  Or send status
+ *   in the status phase of an IN control transfer
+ *
+ ****************************************************************************/
+
+static int stm32l4_ctrl_senddata(FAR struct stm32l4_usbhost_s *priv,
+                                 FAR struct stm32l4_ctrlinfo_s *ep0,
+                                 FAR uint8_t *buffer, unsigned int buflen)
+{
+  FAR struct stm32l4_chan_s *chan = &priv->chan[ep0->outndx];
+  int ret;
+
+  /* Save buffer information */
+
+  chan->buffer = buffer;
+  chan->buflen = buflen;
+  chan->xfrd   = 0;
+
+  /* Set the DATA PID */
+
+  if (buflen == 0)
+    {
+      /* For status OUT stage with buflen == 0, set PID DATA1 */
+
+      chan->outdata1 = true;
+    }
+
+  /* Set the Data PID as per the outdata1 boolean */
+
+  chan->pid = chan->outdata1 ? OTGFS_PID_DATA1 : OTGFS_PID_DATA0;
+
+  /* Set up for the wait BEFORE starting the transfer */
+
+  ret = stm32l4_chan_waitsetup(priv, chan);
+  if (ret < 0)
+    {
+      usbhost_trace1(OTGFS_TRACE1_DEVDISCONN, 0);
+      return ret;
+    }
+
+  /* Start the transfer */
+
+  stm32l4_transfer_start(priv, ep0->outndx);
+
+  /* Wait for the transfer to complete and return the result */
+
+  return stm32l4_chan_wait(priv, chan);
+}
+
+/****************************************************************************
+ * Name: stm32l4_ctrl_recvdata
+ *
+ * Description:
+ *   Receive data in the data phase of an IN control transfer.  Or receive status
+ *   in the status phase of an OUT control transfer
+ *
+ ****************************************************************************/
+
+static int stm32l4_ctrl_recvdata(FAR struct stm32l4_usbhost_s *priv,
+                                 FAR struct stm32l4_ctrlinfo_s *ep0,
+                                 FAR uint8_t *buffer, unsigned int buflen)
+{
+  FAR struct stm32l4_chan_s *chan = &priv->chan[ep0->inndx];
+  int ret;
+
+  /* Save buffer information */
+
+  chan->pid    = OTGFS_PID_DATA1;
+  chan->buffer = buffer;
+  chan->buflen = buflen;
+  chan->xfrd   = 0;
+
+  /* Set up for the wait BEFORE starting the transfer */
+
+  ret = stm32l4_chan_waitsetup(priv, chan);
+  if (ret < 0)
+    {
+      usbhost_trace1(OTGFS_TRACE1_DEVDISCONN, 0);
+      return ret;
+    }
+
+  /* Start the transfer */
+
+  stm32l4_transfer_start(priv, ep0->inndx);
+
+  /* Wait for the transfer to complete and return the result */
+
+  return stm32l4_chan_wait(priv, chan);
+}
+
+/****************************************************************************
+ * Name: stm32l4_in_setup
+ *
+ * Description:
+ *   Initiate an IN transfer on an bulk, interrupt, or isochronous pipe.
+ *
+ ****************************************************************************/
+
+static int stm32l4_in_setup(FAR struct stm32l4_usbhost_s *priv, int chidx)
+{
+  FAR struct stm32l4_chan_s *chan;
+
+  /* Set up for the transfer based on the direction and the endpoint type */
+
+  chan = &priv->chan[chidx];
+  switch (chan->eptype)
+    {
+    default:
+    case OTGFS_EPTYPE_CTRL: /* Control */
+      {
+        /* This kind of transfer on control endpoints other than EP0 are not
+         * currently supported
+         */
+
+        return -ENOSYS;
+      }
+
+    case OTGFS_EPTYPE_ISOC: /* Isochronous */
+      {
+        /* Set up the IN data PID */
+
+        usbhost_vtrace2(OTGFS_VTRACE2_ISOCIN, chidx, chan->buflen);
+        chan->pid = OTGFS_PID_DATA0;
+      }
+      break;
+
+    case OTGFS_EPTYPE_BULK: /* Bulk */
+      {
+        /* Setup the IN data PID */
+
+        usbhost_vtrace2(OTGFS_VTRACE2_BULKIN, chidx, chan->buflen);
+        chan->pid = chan->indata1 ? OTGFS_PID_DATA1 : OTGFS_PID_DATA0;
+      }
+      break;
+
+    case OTGFS_EPTYPE_INTR: /* Interrupt */
+      {
+        /* Setup the IN data PID */
+
+        usbhost_vtrace2(OTGFS_VTRACE2_INTRIN, chidx, chan->buflen);
+        chan->pid = chan->indata1 ? OTGFS_PID_DATA1 : OTGFS_PID_DATA0;
+      }
+      break;
+    }
+
+  /* Start the transfer */
+
+  stm32l4_transfer_start(priv, chidx);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_in_transfer
+ *
+ * Description:
+ *   Transfer 'buflen' bytes into 'buffer' from an IN channel.
+ *
+ ****************************************************************************/
+
+static ssize_t stm32l4_in_transfer(FAR struct stm32l4_usbhost_s *priv,
+                                   int chidx, FAR uint8_t *buffer,
+                                   size_t buflen)
+{
+  FAR struct stm32l4_chan_s *chan;
+  ssize_t xfrd;
+  int ret;
+
+  /* Loop until the transfer completes (i.e., buflen is decremented to zero)
+   * or a fatal error occurs any error other than a simple NAK.  NAK would
+   * simply indicate the end of the transfer (short-transfer).
+   */
+
+  chan         = &priv->chan[chidx];
+  chan->buffer = buffer;
+  chan->buflen = buflen;
+  chan->xfrd   = 0;
+  xfrd         = 0;
+
+  while (chan->xfrd < chan->buflen)
+    {
+      /* Set up for the wait BEFORE starting the transfer */
+
+      ret = stm32l4_chan_waitsetup(priv, chan);
+      if (ret < 0)
+        {
+          usbhost_trace1(OTGFS_TRACE1_DEVDISCONN, 0);
+          return (ssize_t)ret;
+        }
+
+      /* Set up for the transfer based on the direction and the endpoint type */
+
+      ret = stm32l4_in_setup(priv, chidx);
+      if (ret < 0)
+        {
+          uerr("ERROR: stm32l4_in_setup failed: %d\n", ret);
+          return (ssize_t)ret;
+        }
+
+      /* Wait for the transfer to complete and get the result */
+
+      ret = stm32l4_chan_wait(priv, chan);
+
+      /* EAGAIN indicates that the device NAKed the transfer.  In the case
+       * of a NAK, we do not retry but rather assume that the transfer is
+       * commplete and return the data that we have received.  Retry could
+       * be handled in class driver.
+       */
+
+      if (ret < 0)
+        {
+          /* The transfer failed.  If we received a NAK, return all data
+           * buffered so far (if any).
+           */
+
+          if (ret == -EAGAIN)
+            {
+              /* Was data buffered prior to the NAK? */
+
+              if (xfrd > 0)
+                {
+                  /* Yes, return the amount of data received */
+
+                  return xfrd;
+                }
+              else
+                {
+                  /* No... Break out and return the NAK */
+
+                  return (ssize_t)ret;
+                }
+            }
+
+          usbhost_trace1(OTGFS_TRACE1_TRNSFRFAILED, ret);
+
+          /* Break out and return the error */
+
+          uerr("ERROR: stm32l4_chan_wait failed: %d\n", ret);
+          return (ssize_t)ret;
+        }
+
+      xfrd += chan->xfrd;
+    }
+
+  return xfrd;
+}
+
+/****************************************************************************
+ * Name: stm32l4_in_next
+ *
+ * Description:
+ *   Initiate the next of a sequence of asynchronous transfers.
+ *
+ * Assumptions:
+ *   This function is always called from an interrupt handler
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBHOST_ASYNCH
+static void stm32l4_in_next(FAR struct stm32l4_usbhost_s *priv,
+                            FAR struct stm32l4_chan_s *chan)
+{
+  usbhost_asynch_t callback;
+  FAR void *arg;
+  ssize_t nbytes;
+  int result;
+  int ret;
+
+  /* Is the full transfer complete? Did the last chunk transfer complete OK? */
+
+  result = -(int)chan->result;
+  if (chan->xfrd < chan->buflen && result == OK)
+    {
+      /* Yes.. Set up for the next transfer based on the direction and the
+       * endpoint type
+       */
+
+      ret = stm32l4_in_setup(priv, chan->chidx);
+      if (ret >= 0)
+        {
+          return;
+        }
+
+      uerr("ERROR: stm32l4_in_setup failed: %d\n", ret);
+      result = ret;
+    }
+
+  /* The transfer is complete, with or without an error */
+
+  uvdbg("Transfer complete:  %d\n", result);
+
+  /* Extract the callback information */
+
+  callback       = chan->callback;
+  arg            = chan->arg;
+  nbytes         = chan->xfrd;
+
+  chan->callback = NULL;
+  chan->arg      = NULL;
+  chan->xfrd     = 0;
+
+  /* Then perform the callback */
+
+  if (result < 0)
+    {
+      nbytes = (ssize_t)result;
+    }
+
+  callback(arg, nbytes);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_in_asynch
+ *
+ * Description:
+ *   Initiate the first of a sequence of asynchronous transfers.
+ *
+ * Assumptions:
+ *   This function is never called from an interrupt handler
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBHOST_ASYNCH
+static int stm32l4_in_asynch(FAR struct stm32l4_usbhost_s *priv, int chidx,
+                             FAR uint8_t *buffer, size_t buflen,
+                             usbhost_asynch_t callback, FAR void *arg)
+{
+  FAR struct stm32l4_chan_s *chan;
+  int ret;
+
+  /* Set up for the transfer data and callback BEFORE starting the first transfer */
+
+  chan         = &priv->chan[chidx];
+  chan->buffer = buffer;
+  chan->buflen = buflen;
+  chan->xfrd   = 0;
+
+  ret = stm32l4_chan_asynchsetup(priv, chan, callback, arg);
+  if (ret < 0)
+    {
+      uerr("ERROR: stm32l4_chan_asynchsetup failed: %d\n", ret);
+      return ret;
+    }
+
+  /* Set up for the transfer based on the direction and the endpoint type */
+
+  ret = stm32l4_in_setup(priv, chidx);
+  if (ret < 0)
+    {
+      uerr("ERROR: stm32l4_in_setup failed: %d\n", ret);
+    }
+
+  /* And return with the transfer pending */
+
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_out_setup
+ *
+ * Description:
+ *   Initiate an OUT transfer on an bulk, interrupt, or isochronous pipe.
+ *
+ ****************************************************************************/
+
+static int stm32l4_out_setup(FAR struct stm32l4_usbhost_s *priv, int chidx)
+{
+  FAR struct stm32l4_chan_s *chan;
+
+  /* Set up for the transfer based on the direction and the endpoint type */
+
+  chan = &priv->chan[chidx];
+  switch (chan->eptype)
+    {
+    default:
+    case OTGFS_EPTYPE_CTRL: /* Control */
+      {
+        /* This kind of transfer on control endpoints other than EP0 are not
+         * currently supported
+         */
+
+        return -ENOSYS;
+      }
+
+    case OTGFS_EPTYPE_ISOC: /* Isochronous */
+      {
+        /* Set up the OUT data PID */
+
+        usbhost_vtrace2(OTGFS_VTRACE2_ISOCOUT, chidx, chan->buflen);
+        chan->pid = OTGFS_PID_DATA0;
+      }
+      break;
+
+    case OTGFS_EPTYPE_BULK: /* Bulk */
+      {
+        /* Setup the OUT data PID */
+
+        usbhost_vtrace2(OTGFS_VTRACE2_BULKOUT, chidx, chan->buflen);
+        chan->pid = chan->outdata1 ? OTGFS_PID_DATA1 : OTGFS_PID_DATA0;
+      }
+      break;
+
+    case OTGFS_EPTYPE_INTR: /* Interrupt */
+      {
+        /* Setup the OUT data PID */
+
+        usbhost_vtrace2(OTGFS_VTRACE2_INTROUT, chidx, chan->buflen);
+        chan->pid = chan->outdata1 ? OTGFS_PID_DATA1 : OTGFS_PID_DATA0;
+
+        /* Toggle the OUT data PID for the next transfer */
+
+        chan->outdata1 ^= true;
+      }
+      break;
+    }
+
+  /* Start the transfer */
+
+  stm32l4_transfer_start(priv, chidx);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_out_transfer
+ *
+ * Description:
+ *   Transfer the 'buflen' bytes in 'buffer' through an OUT channel.
+ *
+ ****************************************************************************/
+
+static ssize_t stm32l4_out_transfer(FAR struct stm32l4_usbhost_s *priv,
+                                    int chidx, FAR uint8_t *buffer,
+                                    size_t buflen)
+{
+  FAR struct stm32l4_chan_s *chan;
+  systime_t start;
+  systime_t elapsed;
+  size_t xfrlen;
+  ssize_t xfrd;
+  int ret;
+
+  /* Loop until the transfer completes (i.e., buflen is decremented to zero)
+   * or a fatal error occurs (any error other than a simple NAK)
+   */
+
+  chan  = &priv->chan[chidx];
+  start = clock_systimer();
+  xfrd  = 0;
+
+  while (buflen > 0)
+    {
+      /* Transfer one packet at a time.  The hardware is capable of queueing
+       * multiple OUT packets, but I just haven't figured out how to handle
+       * the case where a single OUT packet in the group is NAKed.
+       */
+
+      xfrlen       = MIN(chan->maxpacket, buflen);
+      chan->buffer = buffer;
+      chan->buflen = xfrlen;
+      chan->xfrd   = 0;
+
+      /* Set up for the wait BEFORE starting the transfer */
+
+      ret = stm32l4_chan_waitsetup(priv, chan);
+      if (ret < 0)
+        {
+          usbhost_trace1(OTGFS_TRACE1_DEVDISCONN, 0);
+          return (ssize_t)ret;
+        }
+
+      /* Set up for the transfer based on the direction and the endpoint type */
+
+      ret = stm32l4_out_setup(priv, chidx);
+      if (ret < 0)
+        {
+          uerr("ERROR: stm32l4_out_setup failed: %d\n", ret);
+          return (ssize_t)ret;
+        }
+
+      /* Wait for the transfer to complete and get the result */
+
+      ret = stm32l4_chan_wait(priv, chan);
+
+      /* Handle transfer failures */
+
+      if (ret < 0)
+        {
+          usbhost_trace1(OTGFS_TRACE1_TRNSFRFAILED, ret);
+
+          /* Check for a special case:  If (1) the transfer was NAKed and (2)
+           * no Tx FIFO empty or Rx FIFO not-empty event occurred, then we
+           * should be able to just flush the Rx and Tx FIFOs and try again.
+           * We can detect this latter case because the then the transfer
+           * buffer pointer and buffer size will be unaltered.
+           */
+
+          elapsed = clock_systimer() - start;
+          if (ret != -EAGAIN ||                  /* Not a NAK condition OR */
+              elapsed >= STM32L4_DATANAK_DELAY ||  /* Timeout has elapsed OR */
+              chan->xfrd > 0)                    /* Data has been partially transferred */
+            {
+              /* Break out and return the error */
+
+              uerr("ERROR: stm32l4_chan_wait failed: %d\n", ret);
+              return (ssize_t)ret;
+            }
+
+          /* Is this flush really necessary? What does the hardware do with the
+           * data in the FIFO when the NAK occurs?  Does it discard it?
+           */
+
+          stm32l4_flush_txfifos(OTGFS_GRSTCTL_TXFNUM_HALL);
+
+          /* Get the device a little time to catch up.  Then retry the transfer
+           * using the same buffer pointer and length.
+           */
+
+          usleep(20*1000);
+        }
+      else
+        {
+          /* Successfully transferred.  Update the buffer pointer and length */
+
+          buffer += xfrlen;
+          buflen -= xfrlen;
+          xfrd   += chan->xfrd;
+        }
+    }
+
+  return xfrd;
+}
+
+/****************************************************************************
+ * Name: stm32l4_out_next
+ *
+ * Description:
+ *   Initiate the next of a sequence of asynchronous transfers.
+ *
+ * Assumptions:
+ *   This function is always called from an interrupt handler
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBHOST_ASYNCH
+static void stm32l4_out_next(FAR struct stm32l4_usbhost_s *priv,
+                             FAR struct stm32l4_chan_s *chan)
+{
+  usbhost_asynch_t callback;
+  FAR void *arg;
+  ssize_t nbytes;
+  int result;
+  int ret;
+
+  /* Is the full transfer complete? Did the last chunk transfer complete OK? */
+
+  result = -(int)chan->result;
+  if (chan->xfrd < chan->buflen && result == OK)
+    {
+      /* Yes.. Set up for the next transfer based on the direction and the
+       * endpoint type
+       */
+
+      ret = stm32l4_out_setup(priv, chan->chidx);
+      if (ret >= 0)
+        {
+          return;
+        }
+
+      uerr("ERROR: stm32l4_out_setup failed: %d\n", ret);
+      result = ret;
+    }
+
+  /* The transfer is complete, with or without an error */
+
+  uvdbg("Transfer complete:  %d\n", result);
+
+  /* Extract the callback information */
+
+  callback       = chan->callback;
+  arg            = chan->arg;
+  nbytes         = chan->xfrd;
+
+  chan->callback = NULL;
+  chan->arg      = NULL;
+  chan->xfrd     = 0;
+
+  /* Then perform the callback */
+
+  if (result < 0)
+    {
+      nbytes = (ssize_t)result;
+    }
+
+  callback(arg, nbytes);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_out_asynch
+ *
+ * Description:
+ *   Initiate the first of a sequence of asynchronous transfers.
+ *
+ * Assumptions:
+ *   This function is never called from an interrupt handler
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBHOST_ASYNCH
+static int stm32l4_out_asynch(FAR struct stm32l4_usbhost_s *priv, int chidx,
+                              FAR uint8_t *buffer, size_t buflen,
+                              usbhost_asynch_t callback, FAR void *arg)
+{
+  FAR struct stm32l4_chan_s *chan;
+  int ret;
+
+  /* Set up for the transfer data and callback BEFORE starting the first transfer */
+
+  chan         = &priv->chan[chidx];
+  chan->buffer = buffer;
+  chan->buflen = buflen;
+  chan->xfrd   = 0;
+
+  ret = stm32l4_chan_asynchsetup(priv, chan, callback, arg);
+  if (ret < 0)
+    {
+      uerr("ERROR: stm32l4_chan_asynchsetup failed: %d\n", ret);
+      return ret;
+    }
+
+  /* Set up for the transfer based on the direction and the endpoint type */
+
+  ret = stm32l4_out_setup(priv, chidx);
+  if (ret < 0)
+    {
+      uerr("ERROR: stm32l4_out_setup failed: %d\n", ret);
+    }
+
+  /* And return with the transfer pending */
+
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_gint_wrpacket
+ *
+ * Description:
+ *   Transfer the 'buflen' bytes in 'buffer' to the Tx FIFO associated with
+ *   'chidx' (non-DMA).
+ *
+ ****************************************************************************/
+
+static void stm32l4_gint_wrpacket(FAR struct stm32l4_usbhost_s *priv,
+                                  FAR uint8_t *buffer, int chidx, int buflen)
+{
+  FAR uint32_t *src;
+  uint32_t fifo;
+  int buflen32;
+
+  stm32l4_pktdump("Sending", buffer, buflen);
+
+  /* Get the number of 32-byte words associated with this byte size */
+
+  buflen32 = (buflen + 3) >> 2;
+
+  /* Get the address of the Tx FIFO associated with this channel */
+
+  fifo = STM32L4_OTGFS_DFIFO_HCH(chidx);
+
+  /* Transfer all of the data into the Tx FIFO */
+
+  src = (FAR uint32_t *)buffer;
+  for (; buflen32 > 0; buflen32--)
+    {
+      uint32_t data = *src++;
+      stm32l4_putreg(fifo, data);
+    }
+
+  /* Increment the count of bytes "in-flight" in the Tx FIFO */
+
+  priv->chan[chidx].inflight += buflen;
+}
+
+/****************************************************************************
+ * Name: stm32l4_gint_hcinisr
+ *
+ * Description:
+ *   USB OTG FS host IN channels interrupt handler
+ *
+ *   One the completion of the transfer, the channel result byte may be set as
+ *   follows:
+ *
+ *     OK     - Transfer completed successfully
+ *     EAGAIN - If devices NAKs the transfer or NYET occurs
+ *     EPERM  - If the endpoint stalls
+ *     EIO    - On a TX or data toggle error
+ *     EPIPE  - Frame overrun
+ *
+ *   EBUSY in the result field indicates that the transfer has not completed.
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_gint_hcinisr(FAR struct stm32l4_usbhost_s *priv,
+                                        int chidx)
+{
+  FAR struct stm32l4_chan_s *chan = &priv->chan[chidx];
+  uint32_t regval;
+  uint32_t pending;
+
+  /* Read the HCINT register to get the pending HC interrupts.  Read the
+   * HCINTMSK register to get the set of enabled HC interrupts.
+   */
+
+  pending = stm32l4_getreg(STM32L4_OTGFS_HCINT(chidx));
+  regval  = stm32l4_getreg(STM32L4_OTGFS_HCINTMSK(chidx));
+
+  /* AND the two to get the set of enabled, pending HC interrupts */
+
+  pending &= regval;
+  uinfo("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
+
+  /* Check for a pending ACK response received/transmitted (ACK) interrupt */
+
+  if ((pending & OTGFS_HCINT_ACK) != 0)
+    {
+      /* Clear the pending the ACK response received/transmitted (ACK) interrupt */
+
+      stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_ACK);
+    }
+
+  /* Check for a pending STALL response receive (STALL) interrupt */
+
+  else if ((pending & OTGFS_HCINT_STALL) != 0)
+    {
+      /* Clear the NAK and STALL Conditions. */
+
+      stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), (OTGFS_HCINT_NAK | OTGFS_HCINT_STALL));
+
+      /* Halt the channel when a STALL, TXERR, BBERR or DTERR interrupt is
+       * received on the channel.
+       */
+
+      stm32l4_chan_halt(priv, chidx, CHREASON_STALL);
+
+      /* When there is a STALL, clear any pending NAK so that it is not
+       * processed below.
+       */
+
+      pending &= ~OTGFS_HCINT_NAK;
+    }
+
+  /* Check for a pending Data Toggle ERRor (DTERR) interrupt */
+
+  else if ((pending & OTGFS_HCINT_DTERR) != 0)
+    {
+      /* Halt the channel when a STALL, TXERR, BBERR or DTERR interrupt is
+       * received on the channel.
+       */
+
+      stm32l4_chan_halt(priv, chidx, CHREASON_DTERR);
+
+      /* Clear the NAK and data toggle error conditions */
+
+      stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), (OTGFS_HCINT_NAK | OTGFS_HCINT_DTERR));
+    }
+
+  /* Check for a pending FRaMe OverRun (FRMOR) interrupt */
+
+  if ((pending & OTGFS_HCINT_FRMOR) != 0)
+    {
+      /* Halt the channel -- the CHH interrupt is expected next */
+
+      stm32l4_chan_halt(priv, chidx, CHREASON_FRMOR);
+
+      /* Clear the FRaMe OverRun (FRMOR) condition */
+
+      stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_FRMOR);
+    }
+
+  /* Check for a pending TransFeR Completed (XFRC) interrupt */
+
+  else if ((pending & OTGFS_HCINT_XFRC) != 0)
+    {
+      /* Clear the TransFeR Completed (XFRC) condition */
+
+      stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_XFRC);
+
+      /* Then handle the transfer completion event based on the endpoint type */
+
+      if (chan->eptype == OTGFS_EPTYPE_CTRL || chan->eptype == OTGFS_EPTYPE_BULK)
+        {
+          /* Halt the channel -- the CHH interrupt is expected next */
+
+          stm32l4_chan_halt(priv, chidx, CHREASON_XFRC);
+
+          /* Clear any pending NAK condition.  The 'indata1' data toggle
+           * should have been appropriately updated by the RxFIFO
+           * logic as each packet was received.
+           */
+
+          stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_NAK);
+        }
+      else if (chan->eptype == OTGFS_EPTYPE_INTR)
+        {
+          /* Force the next transfer on an ODD frame */
+
+          regval = stm32l4_getreg(STM32L4_OTGFS_HCCHAR(chidx));
+          regval |= OTGFS_HCCHAR_ODDFRM;
+          stm32l4_putreg(STM32L4_OTGFS_HCCHAR(chidx), regval);
+
+          /* Set the request done state */
+
+          chan->result = OK;
+        }
+    }
+
+  /* Check for a pending CHannel Halted (CHH) interrupt */
+
+  else if ((pending & OTGFS_HCINT_CHH) != 0)
+    {
+      /* Mask the CHannel Halted (CHH) interrupt */
+
+      regval  = stm32l4_getreg(STM32L4_OTGFS_HCINTMSK(chidx));
+      regval &= ~OTGFS_HCINT_CHH;
+      stm32l4_putreg(STM32L4_OTGFS_HCINTMSK(chidx), regval);
+
+      /* Update the request state based on the host state machine state */
+
+      if (chan->chreason == CHREASON_XFRC)
+        {
+          /* Set the request done result */
+
+          chan->result = OK;
+        }
+      else if (chan->chreason == CHREASON_STALL)
+        {
+          /* Set the request stall result */
+
+          chan->result = EPERM;
+        }
+      else if ((chan->chreason == CHREASON_TXERR) ||
+               (chan->chreason == CHREASON_DTERR))
+        {
+          /* Set the request I/O error result */
+
+          chan->result = EIO;
+        }
+      else if (chan->chreason == CHREASON_NAK)
+        {
+          /* Halt on NAK only happens on an INTR channel.  Fetch the HCCHAR register
+           * and check for an interrupt endpoint.
+           */
+
+          regval = stm32l4_getreg(STM32L4_OTGFS_HCCHAR(chidx));
+          if ((regval & OTGFS_HCCHAR_EPTYP_MASK) == OTGFS_HCCHAR_EPTYP_INTR)
+            {
+              /* Toggle the IN data toggle (Used by Bulk and INTR only) */
+
+              chan->indata1 ^= true;
+            }
+
+          /* Set the NAK error result */
+
+          chan->result = EAGAIN;
+        }
+      else /* if (chan->chreason == CHREASON_FRMOR) */
+        {
+          /* Set the frame overrun error result */
+
+          chan->result = EPIPE;
+        }
+
+      /* Clear the CHannel Halted (CHH) condition */
+
+      stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_CHH);
+    }
+
+  /* Check for a pending Transaction ERror (TXERR) interrupt */
+
+  else if ((pending & OTGFS_HCINT_TXERR) != 0)
+    {
+      /* Halt the channel when a STALL, TXERR, BBERR or DTERR interrupt is
+       * received on the channel.
+       */
+
+      stm32l4_chan_halt(priv, chidx, CHREASON_TXERR);
+
+      /* Clear the Transaction ERror (TXERR) condition */
+
+      stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_TXERR);
+    }
+
+  /* Check for a pending NAK response received (NAK) interrupt */
+
+  else if ((pending & OTGFS_HCINT_NAK) != 0)
+    {
+      /* For a BULK transfer, the hardware is capable of retrying
+       * automatically on a NAK.  However, this is not always
+       * what we need to do.  So we always halt the transfer and
+       * return control to high level logic in the event of a NAK.
+       */
+
+#if 1
+      /* Halt the interrupt channel */
+
+      if (chan->eptype == OTGFS_EPTYPE_INTR ||
+          chan->eptype == OTGFS_EPTYPE_BULK)
+        {
+          /* Halt the channel -- the CHH interrupt is expected next */
+
+          stm32l4_chan_halt(priv, chidx, CHREASON_NAK);
+        }
+
+      /* Re-activate CTRL and BULK channels.
+       * REVISIT: This can cause a lot of interrupts!
+       */
+
+      else if (chan->eptype == OTGFS_EPTYPE_CTRL /*||
+               chan->eptype == OTGFS_EPTYPE_BULK*/)
+        {
+          /* Re-activate the channel by clearing CHDIS and assuring that
+           * CHENA is set
+           *
+           * TODO: set channel reason to NACK?
+           */
+
+          regval  = stm32l4_getreg(STM32L4_OTGFS_HCCHAR(chidx));
+          regval |= OTGFS_HCCHAR_CHENA;
+          regval &= ~OTGFS_HCCHAR_CHDIS;
+          stm32l4_putreg(STM32L4_OTGFS_HCCHAR(chidx), regval);
+        }
+
+#else
+      /* Halt all transfers on the NAK -- the CHH interrupt is expected next */
+
+      stm32l4_chan_halt(priv, chidx, CHREASON_NAK);
+#endif
+
+      /* Clear the NAK condition */
+
+      stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_NAK);
+    }
+
+  /* Check for a transfer complete event */
+
+  stm32l4_chan_wakeup(priv, chan);
+}
+
+/****************************************************************************
+ * Name: stm32l4_gint_hcoutisr
+ *
+ * Description:
+ *   USB OTG FS host OUT channels interrupt handler
+ *
+ *   One the completion of the transfer, the channel result byte may be set as
+ *   follows:
+ *
+ *     OK     - Transfer completed successfully
+ *     EAGAIN - If devices NAKs the transfer or NYET occurs
+ *     EPERM  - If the endpoint stalls
+ *     EIO    - On a TX or data toggle error
+ *     EPIPE  - Frame overrun
+ *
+ *   EBUSY in the result field indicates that the transfer has not completed.
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_gint_hcoutisr(FAR struct stm32l4_usbhost_s *priv,
+                                         int chidx)
+{
+  FAR struct stm32l4_chan_s *chan = &priv->chan[chidx];
+  uint32_t regval;
+  uint32_t pending;
+
+  /* Read the HCINT register to get the pending HC interrupts.  Read the
+   * HCINTMSK register to get the set of enabled HC interrupts.
+   */
+
+  pending = stm32l4_getreg(STM32L4_OTGFS_HCINT(chidx));
+  regval  = stm32l4_getreg(STM32L4_OTGFS_HCINTMSK(chidx));
+
+  /* AND the two to get the set of enabled, pending HC interrupts */
+
+  pending &= regval;
+  uinfo("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
+
+  /* Check for a pending ACK response received/transmitted (ACK) interrupt */
+
+  if ((pending & OTGFS_HCINT_ACK) != 0)
+    {
+      /* Clear the pending the ACK response received/transmitted (ACK) interrupt */
+
+      stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_ACK);
+    }
+
+  /* Check for a pending FRaMe OverRun (FRMOR) interrupt */
+
+  else if ((pending & OTGFS_HCINT_FRMOR) != 0)
+    {
+      /* Halt the channel (probably not necessary for FRMOR) */
+
+      stm32l4_chan_halt(priv, chidx, CHREASON_FRMOR);
+
+      /* Clear the pending the FRaMe OverRun (FRMOR) interrupt */
+
+      stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_FRMOR);
+    }
+
+  /* Check for a pending TransFeR Completed (XFRC) interrupt */
+
+  else if ((pending & OTGFS_HCINT_XFRC) != 0)
+    {
+      /* Decrement the number of bytes remaining by the number of
+       * bytes that were "in-flight".
+       */
+
+      priv->chan[chidx].buffer  += priv->chan[chidx].inflight;
+      priv->chan[chidx].xfrd    += priv->chan[chidx].inflight;
+      priv->chan[chidx].inflight = 0;
+
+      /* Halt the channel -- the CHH interrupt is expected next */
+
+      stm32l4_chan_halt(priv, chidx, CHREASON_XFRC);
+
+      /* Clear the pending the TransFeR Completed (XFRC) interrupt */
+
+      stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_XFRC);
+    }
+
+  /* Check for a pending STALL response receive (STALL) interrupt */
+
+  else if ((pending & OTGFS_HCINT_STALL) != 0)
+    {
+      /* Clear the pending the STALL response receiv (STALL) interrupt */
+
+      stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_STALL);
+
+      /* Halt the channel when a STALL, TXERR, BBERR or DTERR interrupt is
+       * received on the channel.
+       */
+
+      stm32l4_chan_halt(priv, chidx, CHREASON_STALL);
+    }
+
+  /* Check for a pending NAK response received (NAK) interrupt */
+
+  else if ((pending & OTGFS_HCINT_NAK) != 0)
+    {
+      /* Halt the channel  -- the CHH interrupt is expected next */
+
+      stm32l4_chan_halt(priv, chidx, CHREASON_NAK);
+
+      /* Clear the pending the NAK response received (NAK) interrupt */
+
+      stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_NAK);
+    }
+
+  /* Check for a pending Transaction ERror (TXERR) interrupt */
+
+  else if ((pending & OTGFS_HCINT_TXERR) != 0)
+    {
+      /* Halt the channel when a STALL, TXERR, BBERR or DTERR interrupt is
+       * received on the channel.
+       */
+
+      stm32l4_chan_halt(priv, chidx, CHREASON_TXERR);
+
+      /* Clear the pending the Transaction ERror (TXERR) interrupt */
+
+      stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_TXERR);
+    }
+
+  /* Check for a NYET interrupt */
+
+#if 0 /* NYET is a reserved bit in the HCINT register */
+  else if ((pending & OTGFS_HCINT_NYET) != 0)
+    {
+      /* Halt the channel */
+
+      stm32l4_chan_halt(priv, chidx, CHREASON_NYET);
+
+      /* Clear the pending the NYET interrupt */
+
+      stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_NYET);
+    }
+#endif
+
+  /* Check for a pending Data Toggle ERRor (DTERR) interrupt */
+
+  else if (pending & OTGFS_HCINT_DTERR)
+    {
+      /* Halt the channel when a STALL, TXERR, BBERR or DTERR interrupt is
+       * received on the channel.
+       */
+
+      stm32l4_chan_halt(priv, chidx, CHREASON_DTERR);
+
+      /* Clear the pending the Data Toggle ERRor (DTERR) and NAK interrupts */
+
+      stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), (OTGFS_HCINT_DTERR | OTGFS_HCINT_NAK));
+    }
+
+  /* Check for a pending CHannel Halted (CHH) interrupt */
+
+  else if ((pending & OTGFS_HCINT_CHH) != 0)
+    {
+      /* Mask the CHannel Halted (CHH) interrupt */
+
+      regval  = stm32l4_getreg(STM32L4_OTGFS_HCINTMSK(chidx));
+      regval &= ~OTGFS_HCINT_CHH;
+      stm32l4_putreg(STM32L4_OTGFS_HCINTMSK(chidx), regval);
+
+      if (chan->chreason == CHREASON_XFRC)
+        {
+          /* Set the request done result */
+
+          chan->result = OK;
+
+          /* Read the HCCHAR register to get the HCCHAR register to get
+           * the endpoint type.
+           */
+
+          regval = stm32l4_getreg(STM32L4_OTGFS_HCCHAR(chidx));
+
+          /* Is it a bulk endpoint?  Were an odd number of packets
+           * transferred?
+           */
+
+          if ((regval & OTGFS_HCCHAR_EPTYP_MASK) == OTGFS_HCCHAR_EPTYP_BULK &&
+              (chan->npackets & 1) != 0)
+            {
+              /* Yes to both... toggle the data out PID */
+
+              chan->outdata1 ^= true;
+            }
+        }
+      else if (chan->chreason == CHREASON_NAK ||
+               chan->chreason == CHREASON_NYET)
+        {
+          /* Set the try again later result */
+
+          chan->result = EAGAIN;
+        }
+      else if (chan->chreason == CHREASON_STALL)
+        {
+          /* Set the request stall result */
+
+          chan->result = EPERM;
+        }
+      else if ((chan->chreason == CHREASON_TXERR) ||
+               (chan->chreason == CHREASON_DTERR))
+        {
+          /* Set the I/O failure result */
+
+          chan->result = EIO;
+        }
+      else /* if (chan->chreason == CHREASON_FRMOR) */
+        {
+          /* Set the frame error result */
+
+          chan->result = EPIPE;
+        }
+
+      /* Clear the pending the CHannel Halted (CHH) interrupt */
+
+      stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_CHH);
+    }
+
+  /* Check for a transfer complete event */
+
+  stm32l4_chan_wakeup(priv, chan);
+}
+
+/****************************************************************************
+ * Name: stm32l4_gint_connected
+ *
+ * Description:
+ *   Handle a connection event.
+ *
+ ****************************************************************************/
+
+static void stm32l4_gint_connected(FAR struct stm32l4_usbhost_s *priv)
+{
+  /* We we previously disconnected? */
+
+  if (!priv->connected)
+    {
+      /* Yes.. then now we are connected */
+
+      usbhost_vtrace1(OTGFS_VTRACE1_CONNECTED, 0);
+      priv->connected = true;
+      priv->change    = true;
+      DEBUGASSERT(priv->smstate == SMSTATE_DETACHED);
+
+      /* Notify any waiters */
+
+      priv->smstate = SMSTATE_ATTACHED;
+      if (priv->pscwait)
+        {
+          stm32l4_givesem(&priv->pscsem);
+          priv->pscwait = false;
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_gint_disconnected
+ *
+ * Description:
+ *   Handle a disconnection event.
+ *
+ ****************************************************************************/
+
+static void stm32l4_gint_disconnected(FAR struct stm32l4_usbhost_s *priv)
+{
+  /* Were we previously connected? */
+
+  if (priv->connected)
+    {
+      /* Yes.. then we no longer connected */
+
+      usbhost_vtrace1(OTGFS_VTRACE1_DISCONNECTED, 0);
+
+      /* Are we bound to a class driver? */
+
+      if (priv->rhport.hport.devclass)
+        {
+          /* Yes.. Disconnect the class driver */
+
+          CLASS_DISCONNECTED(priv->rhport.hport.devclass);
+          priv->rhport.hport.devclass = NULL;
+        }
+
+      /* Re-Initialize Host for new Enumeration */
+
+      priv->smstate   = SMSTATE_DETACHED;
+      priv->connected = false;
+      priv->change    = true;
+      stm32l4_chan_freeall(priv);
+
+      priv->rhport.hport.speed = USB_SPEED_FULL;
+      priv->rhport.hport.funcaddr = 0;
+
+      /* Notify any waiters that there is a change in the connection state */
+
+      if (priv->pscwait)
+        {
+          stm32l4_givesem(&priv->pscsem);
+          priv->pscwait = false;
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_gint_sofisr
+ *
+ * Description:
+ *   USB OTG FS start-of-frame interrupt handler
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32L4_OTGFS_SOFINTR
+static inline void stm32l4_gint_sofisr(FAR struct stm32l4_usbhost_s *priv)
+{
+  /* Handle SOF interrupt */
+#warning "Do what?"
+
+  /* Clear pending SOF interrupt */
+
+  stm32l4_putreg(STM32L4_OTGFS_GINTSTS, OTGFS_GINT_SOF);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_gint_rxflvlisr
+ *
+ * Description:
+ *   USB OTG FS RxFIFO non-empty interrupt handler
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_gint_rxflvlisr(FAR struct stm32l4_usbhost_s *priv)
+{
+  FAR uint32_t *dest;
+  uint32_t grxsts;
+  uint32_t intmsk;
+  uint32_t hcchar;
+  uint32_t hctsiz;
+  uint32_t fifo;
+  int bcnt;
+  int bcnt32;
+  int chidx;
+  int i;
+
+  /* Disable the RxFIFO non-empty interrupt */
+
+  intmsk  = stm32l4_getreg(STM32L4_OTGFS_GINTMSK);
+  intmsk &= ~OTGFS_GINT_RXFLVL;
+  stm32l4_putreg(STM32L4_OTGFS_GINTMSK, intmsk);
+
+  /* Read and pop the next status from the Rx FIFO */
+
+  grxsts = stm32l4_getreg(STM32L4_OTGFS_GRXSTSP);
+  uinfo("GRXSTS: %08x\n", grxsts);
+
+  /* Isolate the channel number/index in the status word */
+
+  chidx = (grxsts & OTGFS_GRXSTSH_CHNUM_MASK) >> OTGFS_GRXSTSH_CHNUM_SHIFT;
+
+  /* Get the host channel characteristics register (HCCHAR) for this channel */
+
+  hcchar = stm32l4_getreg(STM32L4_OTGFS_HCCHAR(chidx));
+
+  /* Then process the interrupt according to the packet status */
+
+  switch (grxsts & OTGFS_GRXSTSH_PKTSTS_MASK)
+    {
+    case OTGFS_GRXSTSH_PKTSTS_INRECVD: /* IN data packet received */
+      {
+        /* Read the data into the host buffer. */
+
+        bcnt = (grxsts & OTGFS_GRXSTSH_BCNT_MASK) >> OTGFS_GRXSTSH_BCNT_SHIFT;
+        if (bcnt > 0 && priv->chan[chidx].buffer != NULL)
+          {
+            /* Transfer the packet from the Rx FIFO into the user buffer */
+
+            dest   = (FAR uint32_t *)priv->chan[chidx].buffer;
+            fifo   = STM32L4_OTGFS_DFIFO_HCH(0);
+            bcnt32 = (bcnt + 3) >> 2;
+
+            for (i = 0; i < bcnt32; i++)
+              {
+                *dest++ = stm32l4_getreg(fifo);
+              }
+
+            stm32l4_pktdump("Received", priv->chan[chidx].buffer, bcnt);
+
+            /* Toggle the IN data pid (Used by Bulk and INTR only) */
+
+            priv->chan[chidx].indata1 ^= true;
+
+            /* Manage multiple packet transfers */
+
+            priv->chan[chidx].buffer += bcnt;
+            priv->chan[chidx].xfrd   += bcnt;
+
+            /* Check if more packets are expected */
+
+            hctsiz = stm32l4_getreg(STM32L4_OTGFS_HCTSIZ(chidx));
+            if ((hctsiz & OTGFS_HCTSIZ_PKTCNT_MASK) != 0)
+              {
+                /* Re-activate the channel when more packets are expected */
+
+                hcchar |= OTGFS_HCCHAR_CHENA;
+                hcchar &= ~OTGFS_HCCHAR_CHDIS;
+                stm32l4_putreg(STM32L4_OTGFS_HCCHAR(chidx), hcchar);
+              }
+          }
+      }
+      break;
+
+    case OTGFS_GRXSTSH_PKTSTS_INDONE:  /* IN transfer completed */
+    case OTGFS_GRXSTSH_PKTSTS_DTOGERR: /* Data toggle error */
+    case OTGFS_GRXSTSH_PKTSTS_HALTED:  /* Channel halted */
+    default:
+      break;
+    }
+
+  /* Re-enable the RxFIFO non-empty interrupt */
+
+  intmsk |= OTGFS_GINT_RXFLVL;
+  stm32l4_putreg(STM32L4_OTGFS_GINTMSK, intmsk);
+}
+
+/****************************************************************************
+ * Name: stm32l4_gint_nptxfeisr
+ *
+ * Description:
+ *   USB OTG FS non-periodic TxFIFO empty interrupt handler
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_gint_nptxfeisr(FAR struct stm32l4_usbhost_s *priv)
+{
+  FAR struct stm32l4_chan_s *chan;
+  uint32_t     regval;
+  unsigned int wrsize;
+  unsigned int avail;
+  unsigned int chidx;
+
+  /* Recover the index of the channel that is waiting for space in the Tx
+   * FIFO.
+   */
+
+  chidx = priv->chidx;
+  chan  = &priv->chan[chidx];
+
+  /* Reduce the buffer size by the number of bytes that were previously placed
+   * in the Tx FIFO.
+   */
+
+  chan->buffer  += chan->inflight;
+  chan->xfrd    += chan->inflight;
+  chan->inflight = 0;
+
+  /* If we have now transferred the entire buffer, then this transfer is
+   * complete (this case really should never happen because we disable
+   * the NPTXFE interrupt on the final packet).
+   */
+
+  if (chan->xfrd >= chan->buflen)
+    {
+      /* Disable further Tx FIFO empty interrupts and bail. */
+
+      stm32l4_modifyreg(STM32L4_OTGFS_GINTMSK, OTGFS_GINT_NPTXFE, 0);
+      return;
+    }
+
+  /* Read the status from the top of the non-periodic TxFIFO */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_HNPTXSTS);
+
+  /* Extract the number of bytes available in the non-periodic Tx FIFO. */
+
+  avail = ((regval & OTGFS_HNPTXSTS_NPTXFSAV_MASK) >> OTGFS_HNPTXSTS_NPTXFSAV_SHIFT) << 2;
+
+  /* Get the size to put in the Tx FIFO now */
+
+  wrsize = chan->buflen - chan->xfrd;
+
+  /* Get minimal size packet that can be sent.  Something is seriously
+   * configured wrong if one packet will not fit into the empty Tx FIFO.
+   */
+
+  DEBUGASSERT(wrsize > 0 && avail >= MIN(wrsize, chan->maxpacket));
+  if (wrsize > avail)
+    {
+      /* Clip the write size to the number of full, max sized packets
+       * that will fit in the Tx FIFO.
+       */
+
+      unsigned int wrpackets = avail / chan->maxpacket;
+      wrsize = wrpackets * chan->maxpacket;
+    }
+
+  /* Otherwise, this will be the last packet to be sent in this transaction.
+   * We now need to disable further NPTXFE interrupts.
+   */
+
+  else
+    {
+      stm32l4_modifyreg(STM32L4_OTGFS_GINTMSK, OTGFS_GINT_NPTXFE, 0);
+    }
+
+  /* Write the next group of packets into the Tx FIFO */
+
+  uinfo("HNPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
+           regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
+
+  stm32l4_gint_wrpacket(priv, chan->buffer, chidx, wrsize);
+}
+
+/****************************************************************************
+ * Name: stm32l4_gint_ptxfeisr
+ *
+ * Description:
+ *   USB OTG FS periodic TxFIFO empty interrupt handler
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_gint_ptxfeisr(FAR struct stm32l4_usbhost_s *priv)
+{
+  FAR struct stm32l4_chan_s *chan;
+  uint32_t     regval;
+  unsigned int wrsize;
+  unsigned int avail;
+  unsigned int chidx;
+
+  /* Recover the index of the channel that is waiting for space in the Tx
+   * FIFO.
+   */
+
+  chidx = priv->chidx;
+  chan  = &priv->chan[chidx];
+
+  /* Reduce the buffer size by the number of bytes that were previously placed
+   * in the Tx FIFO.
+   */
+
+  chan->buffer  += chan->inflight;
+  chan->xfrd    += chan->inflight;
+  chan->inflight = 0;
+
+  /* If we have now transfered the entire buffer, then this transfer is
+   * complete (this case really should never happen because we disable
+   * the PTXFE interrupt on the final packet).
+   */
+
+  if (chan->xfrd >= chan->buflen)
+    {
+      /* Disable further Tx FIFO empty interrupts and bail. */
+
+      stm32l4_modifyreg(STM32L4_OTGFS_GINTMSK, OTGFS_GINT_PTXFE, 0);
+      return;
+    }
+
+  /* Read the status from the top of the periodic TxFIFO */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_HPTXSTS);
+
+  /* Extract the number of bytes available in the periodic Tx FIFO. */
+
+  avail = ((regval & OTGFS_HPTXSTS_PTXFSAVL_MASK) >> OTGFS_HPTXSTS_PTXFSAVL_SHIFT) << 2;
+
+  /* Get the size to put in the Tx FIFO now */
+
+  wrsize = chan->buflen - chan->xfrd;
+
+  /* Get minimal size packet that can be sent.  Something is seriously
+   * configured wrong if one packet will not fit into the empty Tx FIFO.
+   */
+
+  DEBUGASSERT(wrsize && avail >= MIN(wrsize, chan->maxpacket));
+  if (wrsize > avail)
+    {
+      /* Clip the write size to the number of full, max sized packets
+       * that will fit in the Tx FIFO.
+       */
+
+      unsigned int wrpackets = avail / chan->maxpacket;
+      wrsize = wrpackets * chan->maxpacket;
+    }
+
+  /* Otherwise, this will be the last packet to be sent in this transaction.
+   * We now need to disable further PTXFE interrupts.
+   */
+
+  else
+    {
+      stm32l4_modifyreg(STM32L4_OTGFS_GINTMSK, OTGFS_GINT_PTXFE, 0);
+    }
+
+  /* Write the next group of packets into the Tx FIFO */
+
+  uinfo("HPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
+           regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
+
+  stm32l4_gint_wrpacket(priv, chan->buffer, chidx, wrsize);
+}
+
+/****************************************************************************
+ * Name: stm32l4_gint_hcisr
+ *
+ * Description:
+ *   USB OTG FS host channels interrupt handler
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_gint_hcisr(FAR struct stm32l4_usbhost_s *priv)
+{
+  uint32_t haint;
+  uint32_t hcchar;
+  int i = 0;
+
+  /* Read the Host all channels interrupt register and test each bit in the
+   * register. Each bit i, i=0...(STM32L4_NHOST_CHANNELS-1), corresponds to
+   * a pending interrupt on channel i.
+   */
+
+  haint = stm32l4_getreg(STM32L4_OTGFS_HAINT);
+  for (i = 0; i < STM32L4_NHOST_CHANNELS; i++)
+    {
+      /* Is an interrupt pending on this channel? */
+
+      if ((haint & OTGFS_HAINT(i)) != 0)
+        {
+          /* Yes... read the HCCHAR register to get the direction bit */
+
+          hcchar = stm32l4_getreg(STM32L4_OTGFS_HCCHAR(i));
+
+          /* Was this an interrupt on an IN or an OUT channel? */
+
+          if ((hcchar & OTGFS_HCCHAR_EPDIR) != 0)
+            {
+              /* Handle the HC IN channel interrupt */
+
+              stm32l4_gint_hcinisr(priv, i);
+            }
+          else
+            {
+              /* Handle the HC OUT channel interrupt */
+
+              stm32l4_gint_hcoutisr(priv, i);
+            }
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_gint_hprtisr
+ *
+ * Description:
+ *   USB OTG FS host port interrupt handler
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_gint_hprtisr(FAR struct stm32l4_usbhost_s *priv)
+{
+  uint32_t hprt;
+  uint32_t newhprt;
+  uint32_t hcfg;
+
+  usbhost_vtrace1(OTGFS_VTRACE1_GINT_HPRT, 0);
+  /* Read the port status and control register (HPRT) */
+
+  hprt = stm32l4_getreg(STM32L4_OTGFS_HPRT);
+
+  /* Setup to clear the interrupt bits in GINTSTS by setting the corresponding
+   * bits in the HPRT.  The HCINT interrupt bit is cleared when the appropriate
+   * status bits in the HPRT register are cleared.
+   */
+
+  newhprt = hprt & ~(OTGFS_HPRT_PENA    | OTGFS_HPRT_PCDET  |
+                     OTGFS_HPRT_PENCHNG | OTGFS_HPRT_POCCHNG);
+
+  /* Check for Port Overcurrent CHaNGe (POCCHNG) */
+
+  if ((hprt & OTGFS_HPRT_POCCHNG) != 0)
+    {
+      /* Set up to clear the POCCHNG status in the new HPRT contents. */
+
+      usbhost_vtrace1(OTGFS_VTRACE1_GINT_HPRT_POCCHNG, 0);
+      newhprt |= OTGFS_HPRT_POCCHNG;
+    }
+
+  /* Check for Port Connect DETected (PCDET).  The core sets this bit when a
+   * device connection is detected.
+   */
+
+  if ((hprt & OTGFS_HPRT_PCDET) != 0)
+    {
+      /* Set up to clear the PCDET status in the new HPRT contents. Then
+       * process the new connection event.
+       */
+
+      usbhost_vtrace1(OTGFS_VTRACE1_GINT_HPRT_PCDET, 0);
+      newhprt |= OTGFS_HPRT_PCDET;
+      stm32l4_portreset(priv);
+      stm32l4_gint_connected(priv);
+    }
+
+  /* Check for Port Enable CHaNGed (PENCHNG) */
+
+  if ((hprt & OTGFS_HPRT_PENCHNG) != 0)
+    {
+      /* Set up to clear the PENCHNG status in the new HPRT contents. */
+
+      usbhost_vtrace1(OTGFS_VTRACE1_GINT_HPRT_PENCHNG, 0);
+      newhprt |= OTGFS_HPRT_PENCHNG;
+
+      /* Was the port enabled? */
+
+      if ((hprt & OTGFS_HPRT_PENA) != 0)
+        {
+          /* Yes.. handle the new connection event */
+
+          stm32l4_gint_connected(priv);
+
+          /* Check the Host ConFiGuration register (HCFG) */
+
+          hcfg = stm32l4_getreg(STM32L4_OTGFS_HCFG);
+
+          /* Is this a low speed or full speed connection (OTG FS does not
+           * support high speed)
+           */
+
+          if ((hprt & OTGFS_HPRT_PSPD_MASK) == OTGFS_HPRT_PSPD_LS)
+            {
+              /* Set the Host Frame Interval Register for the 6KHz speed */
+
+              usbhost_vtrace1(OTGFS_VTRACE1_GINT_HPRT_LSDEV, 0);
+              stm32l4_putreg(STM32L4_OTGFS_HFIR, 6000);
+
+              /* Are we switching from FS to LS? */
+
+              if ((hcfg & OTGFS_HCFG_FSLSPCS_MASK) != OTGFS_HCFG_FSLSPCS_LS6MHz)
+                {
+                  usbhost_vtrace1(OTGFS_VTRACE1_GINT_HPRT_FSLSSW, 0);
+
+                  /* Yes... configure for LS */
+
+                  hcfg &= ~OTGFS_HCFG_FSLSPCS_MASK;
+                  hcfg |= OTGFS_HCFG_FSLSPCS_LS6MHz;
+                  stm32l4_putreg(STM32L4_OTGFS_HCFG, hcfg);
+
+                  /* And reset the port */
+
+                  stm32l4_portreset(priv);
+                }
+            }
+          else /* if ((hprt & OTGFS_HPRT_PSPD_MASK) == OTGFS_HPRT_PSPD_FS) */
+            {
+
+              usbhost_vtrace1(OTGFS_VTRACE1_GINT_HPRT_FSDEV, 0);
+              stm32l4_putreg(STM32L4_OTGFS_HFIR, 48000);
+
+              /* Are we switching from LS to FS? */
+
+              if ((hcfg & OTGFS_HCFG_FSLSPCS_MASK) != OTGFS_HCFG_FSLSPCS_FS48MHz)
+                {
+
+                  usbhost_vtrace1(OTGFS_VTRACE1_GINT_HPRT_LSFSSW, 0);
+                  /* Yes... configure for FS */
+
+                  hcfg &= ~OTGFS_HCFG_FSLSPCS_MASK;
+                  hcfg |= OTGFS_HCFG_FSLSPCS_FS48MHz;
+                  stm32l4_putreg(STM32L4_OTGFS_HCFG, hcfg);
+
+                  /* And reset the port */
+
+                  stm32l4_portreset(priv);
+                }
+            }
+        }
+    }
+
+  /* Clear port interrupts by setting bits in the HPRT */
+
+  stm32l4_putreg(STM32L4_OTGFS_HPRT, newhprt);
+}
+
+/****************************************************************************
+ * Name: stm32l4_gint_discisr
+ *
+ * Description:
+ *   USB OTG FS disconnect detected interrupt handler
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_gint_discisr(FAR struct stm32l4_usbhost_s *priv)
+{
+  /* Handle the disconnection event */
+
+  stm32l4_gint_disconnected(priv);
+
+  /* Clear the dicsonnect interrupt */
+
+  stm32l4_putreg(STM32L4_OTGFS_GINTSTS, OTGFS_GINT_DISC);
+}
+
+/****************************************************************************
+ * Name: stm32l4_gint_ipxfrisr
+ *
+ * Description:
+ *   USB OTG FS incomplete periodic interrupt handler
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_gint_ipxfrisr(FAR struct stm32l4_usbhost_s *priv)
+{
+  uint32_t regval;
+
+  /* CHENA : Set to enable the channel
+   * CHDIS : Set to stop transmitting/receiving data on a channel
+   */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_HCCHAR(0));
+  regval |= (OTGFS_HCCHAR_CHDIS | OTGFS_HCCHAR_CHENA);
+  stm32l4_putreg(STM32L4_OTGFS_HCCHAR(0), regval);
+
+  /* Clear the incomplete isochronous OUT interrupt */
+
+  stm32l4_putreg(STM32L4_OTGFS_GINTSTS, OTGFS_GINT_IPXFR);
+}
+
+/****************************************************************************
+ * Name: stm32l4_gint_isr
+ *
+ * Description:
+ *   USB OTG FS global interrupt handler
+ *
+ ****************************************************************************/
+
+static int stm32l4_gint_isr(int irq, FAR void *context, FAR void *arg)
+{
+  /* At present, there is only support for a single OTG FS host. Hence it is
+   * pre-allocated as g_usbhost.  However, in most code, the private data
+   * structure will be referenced using the 'priv' pointer (rather than the
+   * global data) in order to simplify any future support for multiple devices.
+   */
+
+  FAR struct stm32l4_usbhost_s *priv = &g_usbhost;
+  uint32_t pending;
+
+  /* If OTG were supported, we would need to check if we are in host or
+   * device mode when the global interrupt occurs.  Here we support only
+   * host mode
+   */
+
+  /* Loop while there are pending interrupts to process.  This loop may save a
+   * little interrupt handling overhead.
+   */
+
+  for (; ; )
+    {
+      /* Get the unmasked bits in the GINT status */
+
+      pending  = stm32l4_getreg(STM32L4_OTGFS_GINTSTS);
+      pending &= stm32l4_getreg(STM32L4_OTGFS_GINTMSK);
+
+      /* Return from the interrupt when there are no further pending
+       * interrupts.
+       */
+
+      if (pending == 0)
+        {
+          return OK;
+        }
+
+      /* Otherwise, process each pending, unmasked GINT interrupts */
+
+      /* Handle the start of frame interrupt */
+
+#ifdef CONFIG_STM32L4_OTGFS_SOFINTR
+      if ((pending & OTGFS_GINT_SOF) != 0)
+        {
+          usbhost_vtrace1(OTGFS_VTRACE1_GINT_SOF, 0);
+          stm32l4_gint_sofisr(priv);
+        }
+#endif
+
+      /* Handle the RxFIFO non-empty interrupt */
+
+      if ((pending & OTGFS_GINT_RXFLVL) != 0)
+        {
+          usbhost_vtrace1(OTGFS_VTRACE1_GINT_RXFLVL, 0);
+          stm32l4_gint_rxflvlisr(priv);
+        }
+
+      /* Handle the non-periodic TxFIFO empty interrupt */
+
+      if ((pending & OTGFS_GINT_NPTXFE) != 0)
+        {
+          usbhost_vtrace1(OTGFS_VTRACE1_GINT_NPTXFE, 0);
+          stm32l4_gint_nptxfeisr(priv);
+        }
+
+      /* Handle the periodic TxFIFO empty interrupt */
+
+      if ((pending & OTGFS_GINT_PTXFE) != 0)
+        {
+          usbhost_vtrace1(OTGFS_VTRACE1_GINT_PTXFE, 0);
+          stm32l4_gint_ptxfeisr(priv);
+        }
+
+      /* Handle the host channels interrupt */
+
+      if ((pending & OTGFS_GINT_HC) != 0)
+        {
+          usbhost_vtrace1(OTGFS_VTRACE1_GINT_HC, 0);
+          stm32l4_gint_hcisr(priv);
+        }
+
+      /* Handle the host port interrupt */
+
+      if ((pending & OTGFS_GINT_HPRT) != 0)
+        {
+          stm32l4_gint_hprtisr(priv);
+        }
+
+      /* Handle the disconnect detected interrupt */
+
+      if ((pending & OTGFS_GINT_DISC) != 0)
+        {
+          usbhost_vtrace1(OTGFS_VTRACE1_GINT_DISC, 0);
+          stm32l4_gint_discisr(priv);
+        }
+
+      /* Handle the incomplete periodic transfer */
+
+      if ((pending & OTGFS_GINT_IPXFR) != 0)
+        {
+          usbhost_vtrace1(OTGFS_VTRACE1_GINT_IPXFR, 0);
+          stm32l4_gint_ipxfrisr(priv);
+        }
+    }
+
+  /* We won't get here */
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_gint_enable and stm32l4_gint_disable
+ *
+ * Description:
+ *   Respectively enable or disable the global OTG FS interrupt.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void stm32l4_gint_enable(void)
+{
+  uint32_t regval;
+
+  /* Set the GINTMSK bit to unmask the interrupt */
+
+  regval  = stm32l4_getreg(STM32L4_OTGFS_GAHBCFG);
+  regval |= OTGFS_GAHBCFG_GINTMSK;
+  stm32l4_putreg(STM32L4_OTGFS_GAHBCFG, regval);
+}
+
+static void stm32l4_gint_disable(void)
+{
+  uint32_t regval;
+
+  /* Clear the GINTMSK bit to mask the interrupt */
+
+  regval  = stm32l4_getreg(STM32L4_OTGFS_GAHBCFG);
+  regval &= ~OTGFS_GAHBCFG_GINTMSK;
+  stm32l4_putreg(STM32L4_OTGFS_GAHBCFG, regval);
+}
+
+/****************************************************************************
+ * Name: stm32l4_hostinit_enable
+ *
+ * Description:
+ *   Enable host interrupts.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_hostinit_enable(void)
+{
+  uint32_t regval;
+
+  /* Disable all interrupts. */
+
+  stm32l4_putreg(STM32L4_OTGFS_GINTMSK, 0);
+
+  /* Clear any pending interrupts. */
+
+  stm32l4_putreg(STM32L4_OTGFS_GINTSTS, 0xffffffff);
+
+  /* Clear any pending USB OTG Interrupts (should be done elsewhere if OTG is supported) */
+
+  stm32l4_putreg(STM32L4_OTGFS_GOTGINT, 0xffffffff);
+
+  /* Clear any pending USB OTG interrupts */
+
+  stm32l4_putreg(STM32L4_OTGFS_GINTSTS, 0xbfffffff);
+
+  /* Enable the host interrupts */
+  /* Common interrupts:
+   *
+   *   OTGFS_GINT_WKUP     : Resume/remote wakeup detected interrupt
+   *   OTGFS_GINT_USBSUSP  : USB suspend
+   */
+
+  regval = (OTGFS_GINT_WKUP | OTGFS_GINT_USBSUSP);
+
+  /* If OTG were supported, we would need to enable the following as well:
+   *
+   *   OTGFS_GINT_OTG      : OTG interrupt
+   *   OTGFS_GINT_SRQ      : Session request/new session detected interrupt
+   *   OTGFS_GINT_CIDSCHG  : Connector ID status change
+   */
+
+  /* Host-specific interrupts
+   *
+   *   OTGFS_GINT_SOF      : Start of frame
+   *   OTGFS_GINT_RXFLVL   : RxFIFO non-empty
+   *   OTGFS_GINT_IISOOXFR : Incomplete isochronous OUT transfer
+   *   OTGFS_GINT_HPRT     : Host port interrupt
+   *   OTGFS_GINT_HC       : Host channels interrupt
+   *   OTGFS_GINT_DISC     : Disconnect detected interrupt
+   */
+
+#ifdef CONFIG_STM32L4_OTGFS_SOFINTR
+  regval |= (OTGFS_GINT_SOF    | OTGFS_GINT_RXFLVL   | OTGFS_GINT_IISOOXFR |
+             OTGFS_GINT_HPRT   | OTGFS_GINT_HC       | OTGFS_GINT_DISC);
+#else
+  regval |= (OTGFS_GINT_RXFLVL | OTGFS_GINT_IPXFR    | OTGFS_GINT_HPRT     |
+             OTGFS_GINT_HC     | OTGFS_GINT_DISC);
+#endif
+  stm32l4_putreg(STM32L4_OTGFS_GINTMSK, regval);
+}
+
+/****************************************************************************
+ * Name: stm32l4_txfe_enable
+ *
+ * Description:
+ *   Enable Tx FIFO empty interrupts.  This is necessary when the entire
+ *   transfer will not fit into Tx FIFO.  The transfer will then be completed
+ *   when the Tx FIFO is empty.  NOTE:  The Tx FIFO interrupt is disabled
+ *   the fifo empty interrupt handler when the transfer is complete.
+ *
+ * Input Parameters:
+ *   priv - Driver state structure reference
+ *   chidx - The channel that requires the Tx FIFO empty interrupt
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Called from user task context.  Interrupts must be disabled to assure
+ *   exclusive access to the GINTMSK register.
+ *
+ ****************************************************************************/
+
+static void stm32l4_txfe_enable(FAR struct stm32l4_usbhost_s *priv, int chidx)
+{
+  FAR struct stm32l4_chan_s *chan = &priv->chan[chidx];
+  irqstate_t flags;
+  uint32_t regval;
+
+  /* Disable all interrupts so that we have exclusive access to the GINTMSK
+   * (it would be sufficent just to disable the GINT interrupt).
+   */
+
+  flags = enter_critical_section();
+
+  /* Should we enable the periodic or non-peridic Tx FIFO empty interrupts */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_GINTMSK);
+  switch (chan->eptype)
+    {
+    default:
+    case OTGFS_EPTYPE_CTRL: /* Non periodic transfer */
+    case OTGFS_EPTYPE_BULK:
+      regval |= OTGFS_GINT_NPTXFE;
+      break;
+
+    case OTGFS_EPTYPE_INTR: /* Periodic transfer */
+    case OTGFS_EPTYPE_ISOC:
+      regval |= OTGFS_GINT_PTXFE;
+      break;
+    }
+
+  /* Enable interrupts */
+
+  stm32l4_putreg(STM32L4_OTGFS_GINTMSK, regval);
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * USB Host Controller Operations
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_wait
+ *
+ * Description:
+ *   Wait for a device to be connected or disconnected to/from a hub port.
+ *
+ * Input Parameters:
+ *   conn - The USB host connection instance obtained as a parameter from the call to
+ *      the USB driver initialization logic.
+ *   hport - The location to return the hub port descriptor that detected the
+ *      connection related event.
+ *
+ * Returned Values:
+ *   Zero (OK) is returned on success when a device in connected or
+ *   disconnected. This function will not return until either (1) a device is
+ *   connected or disconnect to/from any hub port or until (2) some failure
+ *   occurs.  On a failure, a negated errno value is returned indicating the
+ *   nature of the failure
+ *
+ * Assumptions:
+ *   - Called from a single thread so no mutual exclusion is required.
+ *   - Never called from an interrupt handler.
+ *
+ ****************************************************************************/
+
+static int stm32l4_wait(FAR struct usbhost_connection_s *conn,
+                        FAR struct usbhost_hubport_s **hport)
+{
+  FAR struct stm32l4_usbhost_s *priv = &g_usbhost;
+  struct usbhost_hubport_s *connport;
+  irqstate_t flags;
+
+  /* Loop until a change in connection state is detected */
+
+  flags = enter_critical_section();
+  for (; ; )
+    {
+      /* Is there a change in the connection state of the single root hub
+       * port?
+       */
+
+      if (priv->change)
+        {
+          connport = &priv->rhport.hport;
+
+          /* Yes. Remember the new state */
+
+          connport->connected = priv->connected;
+          priv->change = false;
+
+          /* And return the root hub port */
+
+          *hport = connport;
+          leave_critical_section(flags);
+
+          uvdbg("RHport Connected: %s\n", connport->connected ? "YES" : "NO");
+          return OK;
+        }
+
+#ifdef CONFIG_USBHOST_HUB
+      /* Is a device connected to an external hub? */
+
+      if (priv->hport)
+        {
+          /* Yes.. return the external hub port */
+
+          connport = (struct usbhost_hubport_s *)priv->hport;
+          priv->hport = NULL;
+
+          *hport = connport;
+          leave_critical_section(flags);
+
+          uvdbg("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
+          return OK;
+        }
+#endif
+
+      /* Wait for the next connection event */
+
+      priv->pscwait = true;
+      stm32l4_takesem(&priv->pscsem);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_enumerate
+ *
+ * Description:
+ *   Enumerate the connected device.  As part of this enumeration process,
+ *   the driver will (1) get the device's configuration descriptor, (2)
+ *   extract the class ID info from the configuration descriptor, (3) call
+ *   usbhost_findclass() to find the class that supports this device, (4)
+ *   call the create() method on the struct usbhost_registry_s interface
+ *   to get a class instance, and finally (5) call the connect() method
+ *   of the struct usbhost_class_s interface.  After that, the class is in
+ *   charge of the sequence of operations.
+ *
+ * Input Parameters:
+ *   conn - The USB host connection instance obtained as a parameter from
+ *      the call to the USB driver initialization logic.
+ *   hport - The descriptor of the hub port that has the newly connected
+ *      device.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   This function will *not* be called from an interrupt handler.
+ *
+ ****************************************************************************/
+
+static int stm32l4_rh_enumerate(FAR struct stm32l4_usbhost_s *priv,
+                                FAR struct usbhost_connection_s *conn,
+                                FAR struct usbhost_hubport_s *hport)
+{
+  uint32_t regval;
+  int ret;
+
+  DEBUGASSERT(conn != NULL && hport != NULL && hport->port == 0);
+
+  /* Are we connected to a device?  The caller should have called the wait()
+   * method first to be assured that a device is connected.
+   */
+
+  while (!priv->connected)
+    {
+      /* No, return an error */
+
+      usbhost_trace1(OTGFS_TRACE1_DEVDISCONN, 0);
+      return -ENODEV;
+    }
+
+  DEBUGASSERT(priv->smstate == SMSTATE_ATTACHED);
+
+  /* USB 2.0 spec says at least 50ms delay before port reset.  We wait 100ms. */
+
+  usleep(100*1000);
+
+  /* Reset the host port */
+
+  stm32l4_portreset(priv);
+
+  /* Get the current device speed */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_HPRT);
+  if ((regval & OTGFS_HPRT_PSPD_MASK) == OTGFS_HPRT_PSPD_LS)
+    {
+      priv->rhport.hport.speed = USB_SPEED_LOW;
+    }
+  else
+    {
+      priv->rhport.hport.speed = USB_SPEED_FULL;
+    }
+
+  /* Allocate and initialize the root hub port EP0 channels */
+
+  ret = stm32l4_ctrlchan_alloc(priv, 0, 0, priv->rhport.hport.speed, &priv->ep0);
+  if (ret < 0)
+    {
+      uerr("ERROR: Failed to allocate a control endpoint: %d\n", ret);
+    }
+
+  return ret;
+}
+
+static int stm32l4_enumerate(FAR struct usbhost_connection_s *conn,
+                             FAR struct usbhost_hubport_s *hport)
+{
+  FAR struct stm32l4_usbhost_s *priv = &g_usbhost;
+  int ret;
+
+  DEBUGASSERT(hport);
+
+  /* If this is a connection on the root hub, then we need to go to
+   * little more effort to get the device speed.  If it is a connection
+   * on an external hub, then we already have that information.
+   */
+
+#ifdef CONFIG_USBHOST_HUB
+  if (ROOTHUB(hport))
+#endif
+    {
+      ret = stm32l4_rh_enumerate(priv, conn, hport);
+      if (ret < 0)
+        {
+          return ret;
+        }
+    }
+
+  /* Then let the common usbhost_enumerate do the real enumeration. */
+
+  uvdbg("Enumerate the device\n");
+  priv->smstate = SMSTATE_ENUM;
+  ret = usbhost_enumerate(hport, &hport->devclass);
+
+  /* The enumeration may fail either because of some HCD interfaces failure
+   * or because the device class is not supported.  In either case, we just
+   * need to perform the disconnection operation and make ready for a new
+   * enumeration.
+   */
+
+  if (ret < 0)
+    {
+      /* Return to the disconnected state */
+
+      uerr("ERROR: Enumeration failed: %d\n", ret);
+      stm32l4_gint_disconnected(priv);
+    }
+
+  return ret;
+}
+
+/************************************************************************************
+ * Name: stm32l4_ep0configure
+ *
+ * Description:
+ *   Configure endpoint 0.  This method is normally used internally by the
+ *   enumerate() method but is made available at the interface to support an
+ *   external implementation of the enumeration logic.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   ep0 - The (opaque) EP0 endpoint instance
+ *   funcaddr - The USB address of the function containing the endpoint that EP0
+ *     controls
+ *   speed - The speed of the port USB_SPEED_LOW, _FULL, or _HIGH
+ *   maxpacketsize - The maximum number of bytes that can be sent to or
+ *    received from the endpoint in a single data packet
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   This function will *not* be called from an interrupt handler.
+ *
+ ************************************************************************************/
+
+static int stm32l4_ep0configure(FAR struct usbhost_driver_s *drvr,
+                                usbhost_ep_t ep0, uint8_t funcaddr,
+                                uint8_t speed, uint16_t maxpacketsize)
+{
+  FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr;
+  FAR struct stm32l4_ctrlinfo_s *ep0info = (FAR struct stm32l4_ctrlinfo_s *)ep0;
+  FAR struct stm32l4_chan_s *chan;
+
+  DEBUGASSERT(drvr != NULL && ep0info != NULL && funcaddr < 128 &&
+              maxpacketsize <= 64);
+
+  /* We must have exclusive access to the USB host hardware and state structures */
+
+  stm32l4_takesem(&priv->exclsem);
+
+  /* Configure the EP0 OUT channel */
+
+  chan            = &priv->chan[ep0info->outndx];
+  chan->funcaddr  = funcaddr;
+  chan->speed     = speed;
+  chan->maxpacket = maxpacketsize;
+
+  stm32l4_chan_configure(priv, ep0info->outndx);
+
+  /* Configure the EP0 IN channel */
+
+  chan            = &priv->chan[ep0info->inndx];
+  chan->funcaddr  = funcaddr;
+  chan->speed     = speed;
+  chan->maxpacket = maxpacketsize;
+
+  stm32l4_chan_configure(priv, ep0info->inndx);
+
+  stm32l4_givesem(&priv->exclsem);
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32l4_epalloc
+ *
+ * Description:
+ *   Allocate and configure one endpoint.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   epdesc - Describes the endpoint to be allocated.
+ *   ep - A memory location provided by the caller in which to receive the
+ *      allocated endpoint descriptor.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   This function will *not* be called from an interrupt handler.
+ *
+ ************************************************************************************/
+
+static int stm32l4_epalloc(FAR struct usbhost_driver_s *drvr,
+                           FAR const struct usbhost_epdesc_s *epdesc,
+                           FAR usbhost_ep_t *ep)
+{
+  FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr;
+  int ret;
+
+  /* Sanity check.  NOTE that this method should only be called if a device is
+   * connected (because we need a valid low speed indication).
+   */
+
+  DEBUGASSERT(drvr != 0 && epdesc != NULL && ep != NULL);
+
+  /* We must have exclusive access to the USB host hardware and state structures */
+
+  stm32l4_takesem(&priv->exclsem);
+
+  /* Handler control pipes differently from other endpoint types.  This is
+   * because the normal, "transfer" endpoints are unidirectional an require
+   * only a single channel.  Control endpoints, however, are bi-diretional
+   * and require two channels, one for the IN and one for the OUT direction.
+   */
+
+  if (epdesc->xfrtype == OTGFS_EPTYPE_CTRL)
+    {
+      ret = stm32l4_ctrlep_alloc(priv, epdesc, ep);
+    }
+  else
+    {
+      ret = stm32l4_xfrep_alloc(priv, epdesc, ep);
+    }
+
+  stm32l4_givesem(&priv->exclsem);
+  return ret;
+}
+
+/************************************************************************************
+ * Name: stm32l4_epfree
+ *
+ * Description:
+ *   Free and endpoint previously allocated by DRVR_EPALLOC.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   ep - The endpoint to be freed.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   This function will *not* be called from an interrupt handler.
+ *
+ ************************************************************************************/
+
+static int stm32l4_epfree(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
+{
+  FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr;
+
+  DEBUGASSERT(priv);
+
+  /* We must have exclusive access to the USB host hardware and state structures */
+
+  stm32l4_takesem(&priv->exclsem);
+
+  /* A single channel is represent by an index in the range of 0 to STM32L4_MAX_TX_FIFOS.
+   * Otherwise, the ep must be a pointer to an allocated control endpoint structure.
+   */
+
+  if ((uintptr_t)ep < STM32L4_MAX_TX_FIFOS)
+    {
+      /* Halt the channel and mark the channel available */
+
+      stm32l4_chan_free(priv, (int)ep);
+    }
+  else
+    {
+      /* Halt both control channel and mark the channels available */
+
+      FAR struct stm32l4_ctrlinfo_s *ctrlep = (FAR struct stm32l4_ctrlinfo_s *)ep;
+      stm32l4_chan_free(priv, ctrlep->inndx);
+      stm32l4_chan_free(priv, ctrlep->outndx);
+
+      /* And free the control endpoint container */
+
+      kmm_free(ctrlep);
+    }
+
+  stm32l4_givesem(&priv->exclsem);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_alloc
+ *
+ * Description:
+ *   Some hardware supports special memory in which request and descriptor data can
+ *   be accessed more efficiently.  This method provides a mechanism to allocate
+ *   the request/descriptor memory.  If the underlying hardware does not support
+ *   such "special" memory, this functions may simply map to kmm_malloc.
+ *
+ *   This interface was optimized under a particular assumption.  It was assumed
+ *   that the driver maintains a pool of small, pre-allocated buffers for descriptor
+ *   traffic.  NOTE that size is not an input, but an output:  The size of the
+ *   pre-allocated buffer is returned.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   buffer - The address of a memory location provided by the caller in which to
+ *     return the allocated buffer memory address.
+ *   maxlen - The address of a memory location provided by the caller in which to
+ *     return the maximum size of the allocated buffer memory.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   - Called from a single thread so no mutual exclusion is required.
+ *   - Never called from an interrupt handler.
+ *
+ ****************************************************************************/
+#warning this function name is too generic
+static int stm32l4_alloc(FAR struct usbhost_driver_s *drvr,
+                         FAR uint8_t **buffer, FAR size_t *maxlen)
+{
+  FAR uint8_t *alloc;
+
+  DEBUGASSERT(drvr && buffer && maxlen);
+
+  /* There is no special memory requirement for the STM32. */
+
+  alloc = (FAR uint8_t *)kmm_malloc(CONFIG_STM32L4_OTGFS_DESCSIZE);
+  if (!alloc)
+    {
+      return -ENOMEM;
+    }
+
+  /* Return the allocated address and size of the descriptor buffer */
+
+  *buffer = alloc;
+  *maxlen = CONFIG_STM32L4_OTGFS_DESCSIZE;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_free
+ *
+ * Description:
+ *   Some hardware supports special memory in which request and descriptor data can
+ *   be accessed more efficiently.  This method provides a mechanism to free that
+ *   request/descriptor memory.  If the underlying hardware does not support
+ *   such "special" memory, this functions may simply map to kmm_free().
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   buffer - The address of the allocated buffer memory to be freed.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   - Never called from an interrupt handler.
+ *
+ ****************************************************************************/
+#warning this function name is too generic
+static int stm32l4_free(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer)
+{
+  /* There is no special memory requirement */
+
+  DEBUGASSERT(drvr && buffer);
+  kmm_free(buffer);
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32l4_ioalloc
+ *
+ * Description:
+ *   Some hardware supports special memory in which larger IO buffers can
+ *   be accessed more efficiently.  This method provides a mechanism to allocate
+ *   the request/descriptor memory.  If the underlying hardware does not support
+ *   such "special" memory, this functions may simply map to kmm_malloc.
+ *
+ *   This interface differs from DRVR_ALLOC in that the buffers are variable-sized.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   buffer - The address of a memory location provided by the caller in which to
+ *     return the allocated buffer memory address.
+ *   buflen - The size of the buffer required.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   This function will *not* be called from an interrupt handler.
+ *
+ ************************************************************************************/
+#warning this function name is too generic
+static int stm32l4_ioalloc(FAR struct usbhost_driver_s *drvr,
+                           FAR uint8_t **buffer, size_t buflen)
+{
+  FAR uint8_t *alloc;
+
+  DEBUGASSERT(drvr && buffer && buflen > 0);
+
+  /* There is no special memory requirement */
+
+  alloc = (FAR uint8_t *)kmm_malloc(buflen);
+  if (!alloc)
+    {
+      return -ENOMEM;
+    }
+
+  /* Return the allocated buffer */
+
+  *buffer = alloc;
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32l4_iofree
+ *
+ * Description:
+ *   Some hardware supports special memory in which IO data can  be accessed more
+ *   efficiently.  This method provides a mechanism to free that IO buffer
+ *   memory.  If the underlying hardware does not support such "special" memory,
+ *   this functions may simply map to kmm_free().
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   buffer - The address of the allocated buffer memory to be freed.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   This function will *not* be called from an interrupt handler.
+ *
+ ************************************************************************************/
+#warning this function name is too generic
+static int stm32l4_iofree(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer)
+{
+  /* There is no special memory requirement */
+
+  DEBUGASSERT(drvr && buffer);
+  kmm_free(buffer);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_ctrlin and stm32l4_ctrlout
+ *
+ * Description:
+ *   Process a IN or OUT request on the control endpoint.  These methods
+ *   will enqueue the request and wait for it to complete.  Only one transfer may be
+ *   queued; Neither these methods nor the transfer() method can be called again
+ *   until the control transfer functions returns.
+ *
+ *   These are blocking methods; these functions will not return until the
+ *   control transfer has completed.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   ep0 - The control endpoint to send/receive the control request.
+ *   req - Describes the request to be sent.  This request must lie in memory
+ *      created by DRVR_ALLOC.
+ *   buffer - A buffer used for sending the request and for returning any
+ *     responses.  This buffer must be large enough to hold the length value
+ *     in the request description. buffer must have been allocated using DRVR_ALLOC.
+ *
+ *   NOTE: On an IN transaction, req and buffer may refer to the same allocated
+ *   memory.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   - Called from a single thread so no mutual exclusion is required.
+ *   - Never called from an interrupt handler.
+ *
+ ****************************************************************************/
+
+static int stm32l4_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
+                          FAR const struct usb_ctrlreq_s *req,
+                          FAR uint8_t *buffer)
+{
+  FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr;
+  FAR struct stm32l4_ctrlinfo_s *ep0info = (FAR struct stm32l4_ctrlinfo_s *)ep0;
+  uint16_t buflen;
+  systime_t start;
+  systime_t elapsed;
+  int retries;
+  int ret;
+
+  DEBUGASSERT(priv != NULL && ep0info != NULL && req != NULL);
+  usbhost_vtrace2(OTGFS_VTRACE2_CTRLIN, req->type, req->req);
+  uvdbg("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
+        req->type, req->req, req->value[1], req->value[0],
+        req->index[1], req->index[0], req->len[1], req->len[0]);
+
+  /* Extract values from the request */
+
+  buflen = stm32l4_getle16(req->len);
+
+  /* We must have exclusive access to the USB host hardware and state structures */
+
+  stm32l4_takesem(&priv->exclsem);
+
+  /* Loop, retrying until the retry time expires */
+
+  for (retries = 0; retries < STM32L4_RETRY_COUNT; retries++)
+    {
+      /* Send the SETUP request */
+
+      ret = stm32l4_ctrl_sendsetup(priv, ep0info, req);
+      if (ret < 0)
+        {
+          usbhost_trace1(OTGFS_TRACE1_SENDSETUP, -ret);
+          continue;
+        }
+
+      /* Get the start time.  Loop again until the timeout expires */
+
+      start = clock_systimer();
+      do
+        {
+          /* Handle the IN data phase (if any) */
+
+          if (buflen > 0)
+            {
+              ret = stm32l4_ctrl_recvdata(priv, ep0info, buffer, buflen);
+              if (ret < 0)
+                {
+                  usbhost_trace1(OTGFS_TRACE1_RECVDATA, -ret);
+                }
+            }
+
+          /* Handle the status OUT phase */
+
+          if (ret == OK)
+            {
+              priv->chan[ep0info->outndx].outdata1 ^= true;
+              ret = stm32l4_ctrl_senddata(priv, ep0info, NULL, 0);
+              if (ret == OK)
+                {
+                  /* All success transactions exit here */
+
+                  stm32l4_givesem(&priv->exclsem);
+                  return OK;
+                }
+
+              usbhost_trace1(OTGFS_TRACE1_SENDDATA, ret < 0 ? -ret : ret);
+            }
+
+          /* Get the elapsed time (in frames) */
+
+          elapsed = clock_systimer() - start;
+        }
+      while (elapsed < STM32L4_DATANAK_DELAY);
+    }
+
+  /* All failures exit here after all retries and timeouts have been exhausted */
+
+  stm32l4_givesem(&priv->exclsem);
+  return -ETIMEDOUT;
+}
+
+static int stm32l4_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
+                           FAR const struct usb_ctrlreq_s *req,
+                           FAR const uint8_t *buffer)
+{
+  FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr;
+  FAR struct stm32l4_ctrlinfo_s *ep0info = (FAR struct stm32l4_ctrlinfo_s *)ep0;
+  uint16_t buflen;
+  systime_t start;
+  systime_t elapsed;
+  int retries;
+  int ret;
+
+  DEBUGASSERT(priv != NULL && ep0info != NULL && req != NULL);
+  usbhost_vtrace2(OTGFS_VTRACE2_CTRLOUT, req->type, req->req);
+  uvdbg("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
+        req->type, req->req, req->value[1], req->value[0],
+        req->index[1], req->index[0], req->len[1], req->len[0]);
+
+  /* Extract values from the request */
+
+  buflen = stm32l4_getle16(req->len);
+
+  /* We must have exclusive access to the USB host hardware and state structures */
+
+  stm32l4_takesem(&priv->exclsem);
+
+  /* Loop, retrying until the retry time expires */
+
+  for (retries = 0; retries < STM32L4_RETRY_COUNT; retries++)
+    {
+      /* Send the SETUP request */
+
+      ret = stm32l4_ctrl_sendsetup(priv, ep0info, req);
+      if (ret < 0)
+        {
+          usbhost_trace1(OTGFS_TRACE1_SENDSETUP, -ret);
+          continue;
+        }
+
+      /* Get the start time.  Loop again until the timeout expires */
+
+      start = clock_systimer();
+      do
+        {
+          /* Handle the data OUT phase (if any) */
+
+          if (buflen > 0)
+            {
+              /* Start DATA out transfer (only one DATA packet) */
+
+              priv->chan[ep0info->outndx].outdata1 = true;
+              ret = stm32l4_ctrl_senddata(priv, ep0info, NULL, 0);
+              if (ret < 0)
+                {
+                  usbhost_trace1(OTGFS_TRACE1_SENDDATA, -ret);
+                }
+            }
+
+          /* Handle the status IN phase */
+
+          if (ret == OK)
+            {
+              ret = stm32l4_ctrl_recvdata(priv, ep0info, NULL, 0);
+              if (ret == OK)
+                {
+                  /* All success transactins exit here */
+
+                  stm32l4_givesem(&priv->exclsem);
+                  return OK;
+                }
+
+              usbhost_trace1(OTGFS_TRACE1_RECVDATA, ret < 0 ? -ret : ret);
+            }
+
+          /* Get the elapsed time (in frames) */
+
+          elapsed = clock_systimer() - start;
+        }
+      while (elapsed < STM32L4_DATANAK_DELAY);
+    }
+
+  /* All failures exit here after all retries and timeouts have been exhausted */
+
+  stm32l4_givesem(&priv->exclsem);
+  return -ETIMEDOUT;
+}
+
+/****************************************************************************
+ * Name: stm32l4_transfer
+ *
+ * Description:
+ *   Process a request to handle a transfer descriptor.  This method will
+ *   enqueue the transfer request, blocking until the transfer completes. Only
+ *   one transfer may be  queued; Neither this method nor the ctrlin or
+ *   ctrlout methods can be called again until this function returns.
+ *
+ *   This is a blocking method; this functions will not return until the
+ *   transfer has completed.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   ep - The IN or OUT endpoint descriptor for the device endpoint on which to
+ *      perform the transfer.
+ *   buffer - A buffer containing the data to be sent (OUT endpoint) or received
+ *     (IN endpoint).  buffer must have been allocated using DRVR_ALLOC
+ *   buflen - The length of the data to be sent or received.
+ *
+ * Returned Values:
+ *   On success, a non-negative value is returned that indicates the number
+ *   of bytes successfully transferred.  On a failure, a negated errno value is
+ *   returned that indicates the nature of the failure:
+ *
+ *     EAGAIN - If devices NAKs the transfer (or NYET or other error where
+ *              it may be appropriate to restart the entire transaction).
+ *     EPERM  - If the endpoint stalls
+ *     EIO    - On a TX or data toggle error
+ *     EPIPE  - Overrun errors
+ *
+ * Assumptions:
+ *   - Called from a single thread so no mutual exclusion is required.
+ *   - Never called from an interrupt handler.
+ *
+ ****************************************************************************/
+
+static ssize_t stm32l4_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep,
+                                FAR uint8_t *buffer, size_t buflen)
+{
+  FAR struct stm32l4_usbhost_s *priv  = (FAR struct stm32l4_usbhost_s *)drvr;
+  unsigned int chidx = (unsigned int)ep;
+  ssize_t nbytes;
+
+  uvdbg("chidx: %d buflen: %d\n",  (unsigned int)ep, buflen);
+
+  DEBUGASSERT(priv && buffer && chidx < STM32L4_MAX_TX_FIFOS && buflen > 0);
+
+  /* We must have exclusive access to the USB host hardware and state structures */
+
+  stm32l4_takesem(&priv->exclsem);
+
+  /* Handle IN and OUT transfer slightly differently */
+
+  if (priv->chan[chidx].in)
+    {
+      nbytes = stm32l4_in_transfer(priv, chidx, buffer, buflen);
+    }
+  else
+    {
+      nbytes = stm32l4_out_transfer(priv, chidx, buffer, buflen);
+    }
+
+  stm32l4_givesem(&priv->exclsem);
+  return nbytes;
+}
+
+/****************************************************************************
+ * Name: stm32l4_asynch
+ *
+ * Description:
+ *   Process a request to handle a transfer descriptor.  This method will
+ *   enqueue the transfer request and return immediately.  When the transfer
+ *   completes, the the callback will be invoked with the provided transfer.
+ *   This method is useful for receiving interrupt transfers which may come
+ *   infrequently.
+ *
+ *   Only one transfer may be queued; Neither this method nor the ctrlin or
+ *   ctrlout methods can be called again until the transfer completes.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   ep - The IN or OUT endpoint descriptor for the device endpoint on which to
+ *      perform the transfer.
+ *   buffer - A buffer containing the data to be sent (OUT endpoint) or received
+ *     (IN endpoint).  buffer must have been allocated using DRVR_ALLOC
+ *   buflen - The length of the data to be sent or received.
+ *   callback - This function will be called when the transfer completes.
+ *   arg - The arbitrary parameter that will be passed to the callback function
+ *     when the transfer completes.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   - Called from a single thread so no mutual exclusion is required.
+ *   - Never called from an interrupt handler.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBHOST_ASYNCH
+static int stm32l4_asynch(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep,
+                          FAR uint8_t *buffer, size_t buflen,
+                          usbhost_asynch_t callback, FAR void *arg)
+{
+  FAR struct stm32l4_usbhost_s *priv  = (FAR struct stm32l4_usbhost_s *)drvr;
+  unsigned int chidx = (unsigned int)ep;
+  int ret;
+
+  uvdbg("chidx: %d buflen: %d\n",  (unsigned int)ep, buflen);
+
+  DEBUGASSERT(priv && buffer && chidx < STM32L4_MAX_TX_FIFOS && buflen > 0);
+
+  /* We must have exclusive access to the USB host hardware and state structures */
+
+  stm32l4_takesem(&priv->exclsem);
+
+  /* Handle IN and OUT transfer slightly differently */
+
+  if (priv->chan[chidx].in)
+    {
+      ret = stm32l4_in_asynch(priv, chidx, buffer, buflen, callback, arg);
+    }
+  else
+    {
+      ret = stm32l4_out_asynch(priv, chidx, buffer, buflen, callback, arg);
+    }
+
+  stm32l4_givesem(&priv->exclsem);
+  return ret;
+}
+#endif /* CONFIG_USBHOST_ASYNCH */
+
+/************************************************************************************
+ * Name: stm32l4_cancel
+ *
+ * Description:
+ *   Cancel a pending transfer on an endpoint.  Cancelled synchronous or
+ *   asynchronous transfer will complete normally with the error -ESHUTDOWN.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   ep - The IN or OUT endpoint descriptor for the device endpoint on which an
+ *      asynchronous transfer should be transferred.
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure.
+ *
+ ************************************************************************************/
+
+static int stm32l4_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
+{
+  FAR struct stm32l4_usbhost_s *priv  = (FAR struct stm32l4_usbhost_s *)drvr;
+  FAR struct stm32l4_chan_s *chan;
+  unsigned int chidx = (unsigned int)ep;
+  irqstate_t flags;
+
+  uvdbg("chidx: %u: %d\n",  chidx);
+
+  DEBUGASSERT(priv && chidx < STM32L4_MAX_TX_FIFOS);
+  chan = &priv->chan[chidx];
+
+  /* We need to disable interrupts to avoid race conditions with the asynchronous
+   * completion of the transfer being cancelled.
+   */
+
+  flags = enter_critical_section();
+
+  /* Halt the channel */
+
+  stm32l4_chan_halt(priv, chidx, CHREASON_CANCELLED);
+  chan->result = -ESHUTDOWN;
+
+  /* Is there a thread waiting for this transfer to complete? */
+
+  if (chan->waiter)
+    {
+#ifdef CONFIG_USBHOST_ASYNCH
+      /* Yes.. there should not also be a callback scheduled */
+
+      DEBUGASSERT(chan->callback == NULL);
+#endif
+
+      /* Wake'em up! */
+
+      stm32l4_givesem(&chan->waitsem);
+      chan->waiter = false;
+    }
+
+#ifdef CONFIG_USBHOST_ASYNCH
+  /* No.. is an asynchronous callback expected when the transfer
+   * completes?
+   */
+
+  else if (chan->callback)
+    {
+      usbhost_asynch_t callback;
+      FAR void *arg;
+
+      /* Extract the callback information */
+
+      callback       = chan->callback;
+      arg            = chan->arg;
+
+      chan->callback = NULL;
+      chan->arg      = NULL;
+      chan->xfrd     = 0;
+
+      /* Then perform the callback */
+
+      callback(arg, -ESHUTDOWN);
+    }
+#endif
+
+  leave_critical_section(flags);
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32l4_connect
+ *
+ * Description:
+ *   New connections may be detected by an attached hub.  This method is the
+ *   mechanism that is used by the hub class to introduce a new connection
+ *   and port description to the system.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   hport - The descriptor of the hub port that detected the connection
+ *      related event
+ *   connected - True: device connected; false: device disconnected
+ *
+ * Returned Values:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_USBHOST_HUB
+static int stm32l4_connect(FAR struct usbhost_driver_s *drvr,
+                           FAR struct usbhost_hubport_s *hport,
+                           bool connected)
+{
+  FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr;
+  irqstate_t flags;
+
+  DEBUGASSERT(priv != NULL && hport != NULL);
+
+  /* Set the connected/disconnected flag */
+
+  hport->connected = connected;
+  uinfo("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
+
+  /* Report the connection event */
+
+  flags = enter_critical_section();
+  priv->hport = hport;
+  if (priv->pscwait)
+    {
+      priv->pscwait = false;
+      stm32l4_givesem(&priv->pscsem);
+    }
+
+  leave_critical_section(flags);
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_disconnect
+ *
+ * Description:
+ *   Called by the class when an error occurs and driver has been disconnected.
+ *   The USB host driver should discard the handle to the class instance (it is
+ *   stale) and not attempt any further interaction with the class driver instance
+ *   (until a new instance is received from the create() method).  The driver
+ *   should not called the class' disconnected() method.
+ *
+ * Input Parameters:
+ *   drvr - The USB host driver instance obtained as a parameter from the call to
+ *      the class create() method.
+ *   hport - The port from which the device is being disconnected.  Might be a port
+ *      on a hub.
+ *
+ * Returned Values:
+ *   None
+ *
+ * Assumptions:
+ *   - Only a single class bound to a single device is supported.
+ *   - Never called from an interrupt handler.
+ *
+ ****************************************************************************/
+
+static void stm32l4_disconnect(FAR struct usbhost_driver_s *drvr,
+                               FAR struct usbhost_hubport_s *hport)
+{
+  DEBUGASSERT(hport != NULL);
+  hport->devclass = NULL;
+}
+
+/****************************************************************************
+ * Initialization
+ ****************************************************************************/
+/****************************************************************************
+ * Name: stm32l4_portreset
+ *
+ * Description:
+ *   Reset the USB host port.
+ *
+ *   NOTE: "Before starting to drive a USB reset, the application waits for the
+ *   OTG interrupt triggered by the debounce done bit (DBCDNE bit in
+ *   OTG_FS_GOTGINT), which indicates that the bus is stable again after the
+ *   electrical debounce caused by the attachment of a pull-up resistor on DP
+ *   (FS) or DM (LS).
+ *
+ * Input Parameters:
+ *   priv -- USB host driver private data structure.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void stm32l4_portreset(FAR struct stm32l4_usbhost_s *priv)
+{
+  uint32_t regval;
+
+  regval  = stm32l4_getreg(STM32L4_OTGFS_HPRT);
+  regval &= ~(OTGFS_HPRT_PENA | OTGFS_HPRT_PCDET | OTGFS_HPRT_PENCHNG |
+              OTGFS_HPRT_POCCHNG);
+  regval |= OTGFS_HPRT_PRST;
+  stm32l4_putreg(STM32L4_OTGFS_HPRT, regval);
+
+  up_mdelay(20);
+
+  regval &= ~OTGFS_HPRT_PRST;
+  stm32l4_putreg(STM32L4_OTGFS_HPRT, regval);
+
+  up_mdelay(20);
+}
+
+/****************************************************************************
+ * Name: stm32l4_flush_txfifos
+ *
+ * Description:
+ *   Flush the selected Tx FIFO.
+ *
+ * Input Parameters:
+ *   txfnum -- USB host driver private data structure.
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+static void stm32l4_flush_txfifos(uint32_t txfnum)
+{
+  uint32_t regval;
+  uint32_t timeout;
+
+  /* Initiate the TX FIFO flush operation */
+
+  regval = OTGFS_GRSTCTL_TXFFLSH | txfnum;
+  stm32l4_putreg(STM32L4_OTGFS_GRSTCTL, regval);
+
+  /* Wait for the FLUSH to complete */
+
+  for (timeout = 0; timeout < STM32L4_FLUSH_DELAY; timeout++)
+    {
+      regval = stm32l4_getreg(STM32L4_OTGFS_GRSTCTL);
+      if ((regval & OTGFS_GRSTCTL_TXFFLSH) == 0)
+        {
+          break;
+        }
+    }
+
+  /* Wait for 3 PHY Clocks */
+
+  up_udelay(3);
+}
+
+/****************************************************************************
+ * Name: stm32l4_flush_rxfifo
+ *
+ * Description:
+ *   Flush the Rx FIFO.
+ *
+ * Input Parameters:
+ *   priv -- USB host driver private data structure.
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+static void stm32l4_flush_rxfifo(void)
+{
+  uint32_t regval;
+  uint32_t timeout;
+
+  /* Initiate the RX FIFO flush operation */
+
+  stm32l4_putreg(STM32L4_OTGFS_GRSTCTL, OTGFS_GRSTCTL_RXFFLSH);
+
+  /* Wait for the FLUSH to complete */
+
+  for (timeout = 0; timeout < STM32L4_FLUSH_DELAY; timeout++)
+    {
+      regval = stm32l4_getreg(STM32L4_OTGFS_GRSTCTL);
+      if ((regval & OTGFS_GRSTCTL_RXFFLSH) == 0)
+        {
+          break;
+        }
+    }
+
+  /* Wait for 3 PHY Clocks */
+
+  up_udelay(3);
+}
+
+/****************************************************************************
+ * Name: stm32l4_vbusdrive
+ *
+ * Description:
+ *   Drive the Vbus +5V.
+ *
+ * Input Parameters:
+ *   priv  - USB host driver private data structure.
+ *   state - True: Drive, False: Don't drive
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+static void stm32l4_vbusdrive(FAR struct stm32l4_usbhost_s *priv, bool state)
+{
+  uint32_t regval;
+
+  /* Enable/disable the external charge pump */
+
+  stm32l4_usbhost_vbusdrive(0, state);
+
+  /* Turn on the Host port power. */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_HPRT);
+  regval &= ~(OTGFS_HPRT_PENA | OTGFS_HPRT_PCDET | OTGFS_HPRT_PENCHNG |
+              OTGFS_HPRT_POCCHNG);
+
+  if (((regval & OTGFS_HPRT_PPWR) == 0) && state)
+    {
+      regval |= OTGFS_HPRT_PPWR;
+      stm32l4_putreg(STM32L4_OTGFS_HPRT, regval);
+    }
+
+  if (((regval & OTGFS_HPRT_PPWR) != 0) && !state)
+    {
+      regval &= ~OTGFS_HPRT_PPWR;
+      stm32l4_putreg(STM32L4_OTGFS_HPRT, regval);
+    }
+
+  up_mdelay(200);
+}
+
+/****************************************************************************
+ * Name: stm32l4_host_initialize
+ *
+ * Description:
+ *   Initialize/re-initialize hardware for host mode operation.  At present,
+ *   this function is called only from stm32l4_hw_initialize().  But if OTG mode
+ *   were supported, this function would also be called to swtich between
+ *   host and device modes on a connector ID change interrupt.
+ *
+ * Input Parameters:
+ *   priv -- USB host driver private data structure.
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+static void stm32l4_host_initialize(FAR struct stm32l4_usbhost_s *priv)
+{
+  uint32_t regval;
+  uint32_t offset;
+  int i;
+
+  /* Restart the PHY Clock */
+
+  stm32l4_putreg(STM32L4_OTGFS_PCGCCTL, 0);
+
+  /* Initialize Host Configuration (HCFG) register */
+
+  regval  = stm32l4_getreg(STM32L4_OTGFS_HCFG);
+  regval &= ~OTGFS_HCFG_FSLSPCS_MASK;
+  regval |= OTGFS_HCFG_FSLSPCS_FS48MHz;
+  stm32l4_putreg(STM32L4_OTGFS_HCFG, regval);
+
+  /* Reset the host port */
+
+  stm32l4_portreset(priv);
+
+  /* Clear the FS-/LS-only support bit in the HCFG register */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_HCFG);
+  regval &= ~OTGFS_HCFG_FSLSS;
+  stm32l4_putreg(STM32L4_OTGFS_HCFG, regval);
+
+  /* Carve up FIFO memory for the Rx FIFO and the periodic and non-periodic Tx FIFOs */
+  /* Configure Rx FIFO size (GRXFSIZ) */
+
+  stm32l4_putreg(STM32L4_OTGFS_GRXFSIZ, CONFIG_STM32L4_OTGFS_RXFIFO_SIZE);
+  offset = CONFIG_STM32L4_OTGFS_RXFIFO_SIZE;
+
+  /* Setup the host non-periodic Tx FIFO size (HNPTXFSIZ) */
+
+  regval = (offset | (CONFIG_STM32L4_OTGFS_NPTXFIFO_SIZE << OTGFS_HNPTXFSIZ_NPTXFD_SHIFT));
+  stm32l4_putreg(STM32L4_OTGFS_HNPTXFSIZ, regval);
+  offset += CONFIG_STM32L4_OTGFS_NPTXFIFO_SIZE;
+
+  /* Set up the host periodic Tx fifo size register (HPTXFSIZ) */
+
+  regval = (offset | (CONFIG_STM32L4_OTGFS_PTXFIFO_SIZE << OTGFS_HPTXFSIZ_PTXFD_SHIFT));
+  stm32l4_putreg(STM32L4_OTGFS_HPTXFSIZ, regval);
+
+  /* If OTG were supported, we sould need to clear HNP enable bit in the
+   * USB_OTG control register about here.
+   */
+
+  /* Flush all FIFOs */
+
+  stm32l4_flush_txfifos(OTGFS_GRSTCTL_TXFNUM_HALL);
+  stm32l4_flush_rxfifo();
+
+  /* Clear all pending HC Interrupts */
+
+  for (i = 0; i < STM32L4_NHOST_CHANNELS; i++)
+    {
+      stm32l4_putreg(STM32L4_OTGFS_HCINT(i), 0xffffffff);
+      stm32l4_putreg(STM32L4_OTGFS_HCINTMSK(i), 0);
+    }
+
+  /* Driver Vbus +5V (the smoke test).  Should be done elsewhere in OTG
+   * mode.
+   */
+
+  stm32l4_vbusdrive(priv, true);
+
+  /* Enable host interrupts */
+
+  stm32l4_hostinit_enable();
+}
+
+/****************************************************************************
+ * Name: stm32l4_sw_initialize
+ *
+ * Description:
+ *   One-time setup of the host driver state structure.
+ *
+ * Input Parameters:
+ *   priv -- USB host driver private data structure.
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+static inline void stm32l4_sw_initialize(FAR struct stm32l4_usbhost_s *priv)
+{
+  FAR struct usbhost_driver_s *drvr;
+  FAR struct usbhost_hubport_s *hport;
+  int i;
+
+  /* Initialize the device operations */
+
+  drvr                 = &priv->drvr;
+  drvr->ep0configure   = stm32l4_ep0configure;
+  drvr->epalloc        = stm32l4_epalloc;
+  drvr->epfree         = stm32l4_epfree;
+  drvr->alloc          = stm32l4_alloc;
+  drvr->free           = stm32l4_free;
+  drvr->ioalloc        = stm32l4_ioalloc;
+  drvr->iofree         = stm32l4_iofree;
+  drvr->ctrlin         = stm32l4_ctrlin;
+  drvr->ctrlout        = stm32l4_ctrlout;
+  drvr->transfer       = stm32l4_transfer;
+#ifdef CONFIG_USBHOST_ASYNCH
+  drvr->asynch         = stm32l4_asynch;
+#endif
+  drvr->cancel         = stm32l4_cancel;
+#ifdef CONFIG_USBHOST_HUB
+  drvr->connect        = stm32l4_connect;
+#endif
+  drvr->disconnect     = stm32l4_disconnect;
+
+  /* Initialize the public port representation */
+
+  hport                = &priv->rhport.hport;
+  hport->drvr          = drvr;
+#ifdef CONFIG_USBHOST_HUB
+  hport->parent        = NULL;
+#endif
+  hport->ep0           = (usbhost_ep_t)&priv->ep0;
+  hport->speed         = USB_SPEED_FULL;
+
+  /* Initialize function address generation logic */
+
+  usbhost_devaddr_initialize(&priv->rhport);
+
+  /* Initialize semaphores */
+
+  sem_init(&priv->pscsem,  0, 0);
+  sem_init(&priv->exclsem, 0, 1);
+
+  /* The pscsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+ sem_setprotocol(&priv->pscsem, SEM_PRIO_NONE);
+
+  /* Initialize the driver state data */
+
+  priv->smstate   = SMSTATE_DETACHED;
+  priv->connected = false;
+  priv->change    = false;
+
+  /* Put all of the channels back in their initial, allocated state */
+
+  memset(priv->chan, 0, STM32L4_MAX_TX_FIFOS * sizeof(struct stm32l4_chan_s));
+
+  /* Initialize each channel */
+
+  for (i = 0; i < STM32L4_MAX_TX_FIFOS; i++)
+    {
+      FAR struct stm32l4_chan_s *chan = &priv->chan[i];
+
+      chan->chidx = i;
+
+      /* The waitsem semaphore is used for signaling and, hence, should not
+       * have priority inheritance enabled.
+       */
+
+      sem_init(&chan->waitsem,  0, 0);
+      sem_setprotocol(&chan->waitsem, SEM_PRIO_NONE);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4_hw_initialize
+ *
+ * Description:
+ *   One-time setup of the host controller harware for normal operations.
+ *
+ * Input Parameters:
+ *   priv -- USB host driver private data structure.
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+static inline int stm32l4_hw_initialize(FAR struct stm32l4_usbhost_s *priv)
+{
+  uint32_t regval;
+  unsigned long timeout;
+
+  /* Set the PHYSEL bit in the GUSBCFG register to select the OTG FS serial
+   * transceiver: "This bit is always 1 with write-only access"
+   */
+
+  regval = stm32l4_getreg(STM32L4_OTGFS_GUSBCFG);
+  regval |= OTGFS_GUSBCFG_PHYSEL;
+  stm32l4_putreg(STM32L4_OTGFS_GUSBCFG, regval);
+
+  /* Reset after a PHY select and set Host mode.  First, wait for AHB master
+   * IDLE state.
+   */
+
+  for (timeout = 0; timeout < STM32L4_READY_DELAY; timeout++)
+    {
+      up_udelay(3);
+      regval = stm32l4_getreg(STM32L4_OTGFS_GRSTCTL);
+      if ((regval & OTGFS_GRSTCTL_AHBIDL) != 0)
+        {
+          break;
+        }
+    }
+
+  /* Then perform the core soft reset. */
+
+  stm32l4_putreg(STM32L4_OTGFS_GRSTCTL, OTGFS_GRSTCTL_CSRST);
+  for (timeout = 0; timeout < STM32L4_READY_DELAY; timeout++)
+    {
+      regval = stm32l4_getreg(STM32L4_OTGFS_GRSTCTL);
+      if ((regval & OTGFS_GRSTCTL_CSRST) == 0)
+        {
+          break;
+        }
+    }
+
+  /* Wait for 3 PHY Clocks */
+
+  up_udelay(3);
+
+  /* Deactivate the power down */
+
+  regval  = (OTGFS_GCCFG_PWRDWN | OTGFS_GCCFG_VBUSASEN | OTGFS_GCCFG_VBUSBSEN);
+#ifndef CONFIG_USBDEV_VBUSSENSING
+  regval |= OTGFS_GCCFG_NOVBUSSENS;
+#endif
+#ifdef CONFIG_STM32L4_OTGFS_SOFOUTPUT
+  regval |= OTGFS_GCCFG_SOFOUTEN;
+#endif
+  stm32l4_putreg(STM32L4_OTGFS_GCCFG, regval);
+  up_mdelay(20);
+
+  /* Initialize OTG features:  In order to support OTP, the HNPCAP and SRPCAP
+   * bits would need to be set in the GUSBCFG register about here.
+   */
+
+  /* Force Host Mode */
+
+  regval  = stm32l4_getreg(STM32L4_OTGFS_GUSBCFG);
+  regval &= ~OTGFS_GUSBCFG_FDMOD;
+  regval |= OTGFS_GUSBCFG_FHMOD;
+  stm32l4_putreg(STM32L4_OTGFS_GUSBCFG, regval);
+  up_mdelay(50);
+
+  /* Initialize host mode and return success */
+
+  stm32l4_host_initialize(priv);
+  return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_otgfshost_initialize
+ *
+ * Description:
+ *   Initialize USB host device controller hardware.
+ *
+ * Input Parameters:
+ *   controller -- If the device supports more than USB host controller, then
+ *     this identifies which controller is being initialized.  Normally, this
+ *     is just zero.
+ *
+ * Returned Value:
+ *   And instance of the USB host interface.  The controlling task should
+ *   use this interface to (1) call the wait() method to wait for a device
+ *   to be connected, and (2) call the enumerate() method to bind the device
+ *   to a class driver.
+ *
+ * Assumptions:
+ * - This function should called in the initialization sequence in order
+ *   to initialize the USB device functionality.
+ * - Class drivers should be initialized prior to calling this function.
+ *   Otherwise, there is a race condition if the device is already connected.
+ *
+ ****************************************************************************/
+
+FAR struct usbhost_connection_s *stm32l4_otgfshost_initialize(int controller)
+{
+  /* At present, there is only support for a single OTG FS host. Hence it is
+   * pre-allocated as g_usbhost.  However, in most code, the private data
+   * structure will be referenced using the 'priv' pointer (rather than the
+   * global data) in order to simplify any future support for multiple devices.
+   */
+
+  FAR struct stm32l4_usbhost_s *priv = &g_usbhost;
+
+  /* Sanity checks */
+
+  DEBUGASSERT(controller == 0);
+
+  /* Make sure that interrupts from the OTG FS core are disabled */
+
+  stm32l4_gint_disable();
+
+  /* Reset the state of the host driver */
+
+  stm32l4_sw_initialize(priv);
+
+  /* Alternate function pin configuration.  Here we assume that:
+   *
+   * 1. GPIOA, SYSCFG, and OTG FS peripheral clocking have already been\
+   *    enabled as part of the boot sequence.
+   * 2. Board-specific logic has already enabled other board specific GPIOs
+   *    for things like soft pull-up, VBUS sensing, power controls, and over-
+   *    current detection.
+   */
+
+  /* Configure OTG FS alternate function pins for DM, DP, ID, and SOF.
+   *
+   * PIN* SIGNAL      DIRECTION
+   * ---- ----------- ----------
+   * PA8  OTG_FS_SOF  SOF clock output
+   * PA9  OTG_FS_VBUS VBUS input for device, Driven by external regulator by
+   *                  host (not an alternate function)
+   * PA10 OTG_FS_ID   OTG ID pin (only needed in Dual mode)
+   * PA11 OTG_FS_DM   D- I/O
+   * PA12 OTG_FS_DP   D+ I/O
+   *
+   * *Pins may vary from device-to-device.
+   */
+
+  stm32l4_configgpio(GPIO_OTGFS_DM);
+  stm32l4_configgpio(GPIO_OTGFS_DP);
+  stm32l4_configgpio(GPIO_OTGFS_ID);    /* Only needed for OTG */
+
+  /* SOF output pin configuration is configurable */
+
+#ifdef CONFIG_STM32L4_OTGFS_SOFOUTPUT
+  stm32l4_configgpio(GPIO_OTGFS_SOF);
+#endif
+
+  /* Initialize the USB OTG FS core */
+
+  stm32l4_hw_initialize(priv);
+
+  /* Attach USB host controller interrupt handler */
+
+  if (irq_attach(STM32L4_IRQ_OTGFS, stm32l4_gint_isr, NULL) != 0)
+    {
+      usbhost_trace1(OTGFS_TRACE1_IRQATTACH, 0);
+      return NULL;
+    }
+
+  /* Enable USB OTG FS global interrupts */
+
+  stm32l4_gint_enable();
+
+  /* Enable interrupts at the interrupt controller */
+
+  up_enable_irq(STM32L4_IRQ_OTGFS);
+  return &g_usbconn;
+}
+
+#endif /* CONFIG_USBHOST && CONFIG_STM32L4_OTGFS */
diff --git a/arch/arm/src/stm32l4/stm32l4_pm.h b/arch/arm/src/stm32l4/stm32l4_pm.h
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..0bf7a827f39468218b2f26c9a049b93374be6ac0 100644
--- a/arch/arm/src/stm32l4/stm32l4_pm.h
+++ b/arch/arm/src/stm32l4/stm32l4_pm.h
@@ -0,0 +1,171 @@
+/************************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_pm.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32L4_STM32L4_PM_H
+#define __ARCH_ARM_SRC_STM32L4_STM32L4_PM_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include "chip.h"
+#include "up_internal.h"
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_pmstop
+ *
+ * Description:
+ *   Enter STOP mode.
+ *
+ * Input Parameters:
+ *   lpds - true: To further reduce power consumption in Stop mode, put the
+ *          internal voltage regulator in low-power mode using the LPDS bit
+ *          of the Power control register (PWR_CR).
+ *
+ * Returned Value:
+ *   Zero means that the STOP was successfully entered and the system has
+ *   been re-awakened.  The internal voltage regulator is back to its
+ *   original state.  Otherwise, STOP mode did not occur and a negated
+ *   errno value is returned to indicate the cause of the failure.
+ *
+ ****************************************************************************/
+
+int stm32l4_pmstop(bool lpds);
+
+/****************************************************************************
+ * Name: stm32l4_pmstop2
+ *
+ * Description:
+ *   Enter STOP2 mode.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero means that the STOP2 was successfully entered and the system has
+ *   been re-awakened.  Otherwise, STOP2 mode did not occur and a negated
+ *   errno value is returned to indicate the cause of the failure.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_STM32L4_STM32L4X6) || defined(CONFIG_STM32L4_STM32L4X3)
+int stm32l4_pmstop2(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_pmstandby
+ *
+ * Description:
+ *   Enter STANDBY mode.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value.
+ *   On success, this function will not return (STANDBY mode can only be
+ *   terminated with a reset event).  Otherwise, STANDBY mode did not occur
+ *   and a negated errno value is returned to indicate the cause of the
+ *   failure.
+ *
+ ****************************************************************************/
+
+int stm32l4_pmstandby(void);
+
+/****************************************************************************
+ * Name: stm32l4_pmsleep
+ *
+ * Description:
+ *   Enter SLEEP mode.
+ *
+ * Input Parameters:
+ *   sleeponexit - true:  SLEEPONEXIT bit is set when the WFI instruction is
+ *                        executed, the MCU enters Sleep mode as soon as it
+ *                        exits the lowest priority ISR.
+ *               - false: SLEEPONEXIT bit is cleared, the MCU enters Sleep mode
+ *                        as soon as WFI or WFE instruction is executed.
+ * Returned Value:
+ *   Zero means that the STOP was successfully entered and the system has
+ *   been re-awakened.  The internal volatage regulator is back to its
+ *   original state.  Otherwise, STOP mode did not occur and a negated
+ *   errno value is returned to indicate the cause of the failure.
+ *
+ ****************************************************************************/
+
+void stm32l4_pmsleep(bool sleeponexit);
+
+/****************************************************************************
+ * Name: stm32l4_pmlpr
+ *
+ * Description:
+ *   Enter Low-Power Run (LPR) mode.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero means that LPR was successfully entered. Otherwise, LPR mode was not
+ *   entered and a negated errno value is returned to indicate the cause of the
+ *   failure.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_STM32L4_STM32L4X6) || defined(CONFIG_STM32L4_STM32L4X3)
+int stm32l4_pmlpr(void);
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ARCH_ARM_SRC_STM32L4_STM32L4_PM_H */
diff --git a/arch/arm/src/stm32l4/stm32l4_pminitialize.c b/arch/arm/src/stm32l4/stm32l4_pminitialize.c
new file mode 100644
index 0000000000000000000000000000000000000000..05988f21bf5723da1df9944580531b9fbf187c56
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_pminitialize.c
@@ -0,0 +1,78 @@
+/****************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_pminitialize.c
+ *
+ *   Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include "up_internal.h"
+#include "stm32l4_pm.h"
+
+#ifdef CONFIG_PM
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_pminitialize
+ *
+ * Description:
+ *   This function is called by MCU-specific logic at power-on reset in
+ *   order to provide one-time initialization the power management subystem.
+ *   This function must be called *very* early in the initialization sequence
+ *   *before* any other device drivers are initialized (since they may
+ *   attempt to register with the power management subsystem).
+ *
+ * Input parameters:
+ *   None.
+ *
+ * Returned value:
+ *    None.
+ *
+ ****************************************************************************/
+
+void up_pminitialize(void)
+{
+  /* Then initialize the NuttX power management subsystem proper */
+
+  pm_initialize();
+}
+
+#endif /* CONFIG_PM */
diff --git a/arch/arm/src/stm32l4/stm32l4_pmlpr.c b/arch/arm/src/stm32l4/stm32l4_pmlpr.c
new file mode 100644
index 0000000000000000000000000000000000000000..83a6782cf726d0dd00997eb60785035a4f3b0160
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_pmlpr.c
@@ -0,0 +1,111 @@
+/****************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_pmlpr.c
+ *
+ *   Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015 Motorola Mobility, LLC. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include "up_arch.h"
+#include "nvic.h"
+#include "stm32l4_pwr.h"
+#include "stm32l4_pm.h"
+#include "stm32l4_rcc.h"
+
+#if defined(CONFIG_STM32L4_STM32L4X6) || defined(CONFIG_STM32L4_STM32L4X3)
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_pmlpr
+ *
+ * Description:
+ *   Enter Low-Power Run (LPR) mode.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero means that LPR was successfully entered. Otherwise, LPR mode was not
+ *   entered and a negated errno value is returned to indicate the cause of the
+ *   failure.
+ *
+ ****************************************************************************/
+
+int stm32l4_pmlpr(void)
+{
+  uint32_t regval;
+
+  /* Enable MSI clock */
+
+  regval  = getreg32(STM32L4_RCC_CR);
+  regval |= RCC_CR_MSION;
+
+  /* Set MSI clock to 2 MHz */
+
+  regval &= ~RCC_CR_MSIRANGE_MASK;
+  regval |= RCC_CR_MSIRANGE_2M; /* 2 MHz */
+  regval |= RCC_CR_MSIRGSEL;    /* Select new MSIRANGE */
+  putreg32(regval, STM32L4_RCC_CR);
+
+  /* Select MSI clock as system clock source */
+
+  regval  = getreg32(STM32L4_RCC_CFGR);
+  regval &= ~RCC_CFGR_SW_MASK;
+  regval |= RCC_CFGR_SW_MSI;
+  putreg32(regval, STM32L4_RCC_CFGR);
+
+  /* Wait until the MSI source is used as the system clock source */
+
+  while ((getreg32(STM32L4_RCC_CFGR) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_MSI)
+    {
+    }
+
+  /* Enable Low-Power Run */
+
+  regval  = getreg32(STM32L4_PWR_CR1);
+  regval |= PWR_CR1_LPR;
+  putreg32(regval, STM32L4_PWR_CR1);
+
+  return OK;
+}
+
+#endif /* CONFIG_STM32L4_STM32L4X6 || CONFIG_STM32L4_STM32L4X3 */
diff --git a/arch/arm/src/stm32l4/stm32l4_pmsleep.c b/arch/arm/src/stm32l4/stm32l4_pmsleep.c
new file mode 100644
index 0000000000000000000000000000000000000000..2a5ebcd58ae9d9920f82c5bc96e55c43f4a2d644
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_pmsleep.c
@@ -0,0 +1,104 @@
+/****************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_pmsleep.c
+ *
+ *   Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            Diego Sanchez 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include "up_arch.h"
+#include "nvic.h"
+#include "stm32l4_pwr.h"
+#include "stm32l4_pm.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_pmsleep
+ *
+ * Description:
+ *   Enter SLEEP mode.
+ *
+ * Input Parameters:
+ *   sleeponexit - true:  SLEEPONEXIT bit is set when the WFI instruction is
+ *                        executed, the MCU enters Sleep mode as soon as it
+ *                        exits the lowest priority ISR.
+ *               - false: SLEEPONEXIT bit is cleared, the MCU enters Sleep mode
+ *                        as soon as WFI or WFE instruction is executed.
+ * Returned Value:
+ *   Zero means that the STOP was successfully entered and the system has
+ *   been re-awakened.  The internal volatage regulator is back to its
+ *   original state.  Otherwise, STOP mode did not occur and a negated
+ *   errno value is returned to indicate the cause of the failure.
+ *
+ ****************************************************************************/
+
+void stm32l4_pmsleep(bool sleeponexit)
+{
+  uint32_t regval;
+
+  /* Clear SLEEPDEEP bit of Cortex System Control Register */
+
+  regval  = getreg32(NVIC_SYSCON);
+  regval &= ~NVIC_SYSCON_SLEEPDEEP;
+  if (sleeponexit)
+    {
+      regval |= NVIC_SYSCON_SLEEPONEXIT;
+    }
+  else
+    {
+      regval &= ~NVIC_SYSCON_SLEEPONEXIT;
+    }
+
+  putreg32(regval, NVIC_SYSCON);
+
+  /* Sleep until the wakeup interrupt or event occurs */
+
+#ifdef CONFIG_PM_WFE
+  /* Mode: SLEEP + Entry with WFE */
+
+  asm("wfe");
+#else
+  /* Mode: SLEEP + Entry with WFI */
+
+  asm("wfi");
+#endif
+}
diff --git a/arch/arm/src/stm32l4/stm32l4_pmstandby.c b/arch/arm/src/stm32l4/stm32l4_pmstandby.c
new file mode 100644
index 0000000000000000000000000000000000000000..99101ee5280aba901e6c7f7b7a8ba23d0c6ea28c
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_pmstandby.c
@@ -0,0 +1,114 @@
+/****************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_pmstandby.c
+ *
+ *   Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015 Motorola Mobility, LLC. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include "up_arch.h"
+#include "nvic.h"
+#include "stm32l4_pwr.h"
+#include "stm32l4_pm.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_pmstandby
+ *
+ * Description:
+ *   Enter STANDBY mode.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value.
+ *   On success, this function will not return (STANDBY mode can only be
+ *   terminated with a reset event).  Otherwise, STANDBY mode did not occur
+ *   and a negated errno value is returned to indicate the cause of the
+ *   failure.
+ *
+ ****************************************************************************/
+
+int stm32l4_pmstandby(void)
+{
+  uint32_t regval;
+
+#if defined(CONFIG_STM32L4_STM32L4X6) || defined(CONFIG_STM32L4_STM32L4X3)
+  /* Clear the Wake-Up Flags by setting the CWUFx bits in the power status
+   * clear register
+   */
+  regval = PWR_SCR_CWUF1 | PWR_SCR_CWUF2 | PWR_SCR_CWUF3 |
+           PWR_SCR_CWUF4 | PWR_SCR_CWUF5;
+  putreg32(regval, STM32L4_PWR_SCR);
+
+  /* Select Standby mode */
+  regval  = getreg32(STM32L4_PWR_CR1);
+  regval &= ~PWR_CR1_LPMS_MASK;
+  regval |= PWR_CR1_LPMS_STANDBY;
+
+  putreg32(regval, STM32L4_PWR_CR1);
+#else
+  /* Clear the Wake-Up Flag by setting the CWUF bit in the power control
+   * register.
+   */
+
+  regval  = getreg32(STM32L4_PWR_CR);
+  regval |= PWR_CR_CWUF;
+  putreg32(regval, STM32L4_PWR_CR);
+
+  /* Set the Power Down Deep Sleep (PDDS) bit in the power control register. */
+
+  regval |= PWR_CR_PDDS;
+  putreg32(regval, STM32L4_PWR_CR);
+#endif
+
+  /* Set SLEEPDEEP bit of Cortex System Control Register */
+
+  regval  = getreg32(NVIC_SYSCON);
+  regval |= NVIC_SYSCON_SLEEPDEEP;
+  putreg32(regval, NVIC_SYSCON);
+
+  /* Sleep until the wakeup reset occurs */
+
+  asm("wfi");
+  return OK;  /* Won't get here */
+}
diff --git a/arch/arm/src/stm32l4/stm32l4_pmstop.c b/arch/arm/src/stm32l4/stm32l4_pmstop.c
new file mode 100644
index 0000000000000000000000000000000000000000..9be563cf9ecfbd7b6dc0b49b014160698913b38f
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_pmstop.c
@@ -0,0 +1,177 @@
+/****************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_pmstop.c
+ *
+ *   Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015 Motorola Mobility, LLC. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include "up_arch.h"
+#include "nvic.h"
+#include "stm32l4_pwr.h"
+#include "stm32l4_pm.h"
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+static int do_stop(void)
+{
+  uint32_t regval;
+
+  /* Set SLEEPDEEP bit of Cortex System Control Register */
+
+  regval  = getreg32(NVIC_SYSCON);
+  regval |= NVIC_SYSCON_SLEEPDEEP;
+  putreg32(regval, NVIC_SYSCON);
+
+  /* Sleep until the wakeup interrupt or event occurs */
+
+#ifdef CONFIG_PM_WFE
+  /* Mode: SLEEP + Entry with WFE */
+
+  asm("wfe");
+#else
+  /* Mode: SLEEP + Entry with WFI */
+
+  asm("wfi");
+#endif
+
+  /* Clear SLEEPDEEP bit of Cortex System Control Register */
+
+  regval  = getreg32(NVIC_SYSCON);
+  regval &= ~NVIC_SYSCON_SLEEPDEEP;
+  putreg32(regval, NVIC_SYSCON);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_pmstop
+ *
+ * Description:
+ *   Enter STOP mode.
+ *
+ * Input Parameters:
+ *   lpds - true: To further reduce power consumption in Stop mode, put the
+ *          internal voltage regulator in low-power mode using the LPDS bit
+ *          of the Power control register (PWR_CR).
+ *
+ * Returned Value:
+ *   Zero means that the STOP was successfully entered and the system has
+ *   been re-awakened.  The internal volatage regulator is back to its
+ *   original state.  Otherwise, STOP mode did not occur and a negated
+ *   errno value is returned to indicate the cause of the failure.
+ *
+ ****************************************************************************/
+
+int stm32l4_pmstop(bool lpds)
+{
+  uint32_t regval;
+
+#if defined(CONFIG_STM32L4_STM32L4X6) || defined(CONFIG_STM32L4_STM32L4X3)
+  /* Clear Low-Power Mode Selection (LPMS) bits in power control register 1. */
+  regval  = getreg32(STM32L4_PWR_CR1);
+  regval &= ~PWR_CR1_LPMS_MASK;
+
+  /* Select Stop 1 mode with low-power regulator if so requested */
+  if (lpds)
+    {
+      regval |= PWR_CR1_LPMS_STOP1LPR;
+    }
+
+  putreg32(regval, STM32L4_PWR_CR1);
+#else
+  /* Clear the Power Down Deep Sleep (PDDS), Low Power Deep Sleep (LPDS), and
+   * Low Power regulator Low Voltage in Deep Sleep (LPLVDS) bits in the power
+   * control register.
+   */
+
+  regval  = getreg32(STM32L4_PWR_CR);
+  regval &= ~(PWR_CR_LPDS | PWR_CR_PDDS | PWR_CR_LPLVDS);
+
+  /* Set the Low Power Deep Sleep (LPDS) and Low Power regulator Low Voltage
+   * in Deep Sleep (LPLVDS) bits if so requested */
+
+  if (lpds)
+    {
+      regval |= PWR_CR_LPDS | PWR_CR_LPLVDS;
+    }
+
+  putreg32(regval, STM32L4_PWR_CR);
+#endif
+
+  return do_stop();
+}
+
+/****************************************************************************
+ * Name: stm32l4_pmstop2
+ *
+ * Description:
+ *   Enter STOP2 mode.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero means that the STOP2 was successfully entered and the system has
+ *   been re-awakened.  Otherwise, STOP2 mode did not occur and a negated
+ *   errno value is returned to indicate the cause of the failure.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_STM32L4_STM32L4X6) || defined(CONFIG_STM32L4_STM32L4X3)
+int stm32l4_pmstop2(void)
+{
+  uint32_t regval;
+
+  /* Select Stop 2 mode in power control register 1. */
+
+  regval  = getreg32(STM32L4_PWR_CR1);
+  regval &= ~PWR_CR1_LPMS_MASK;
+  regval |= PWR_CR1_LPMS_STOP2;
+  putreg32(regval, STM32L4_PWR_CR1);
+
+  return do_stop();
+}
+#endif
diff --git a/arch/arm/src/stm32l4/stm32l4_pwm.c b/arch/arm/src/stm32l4/stm32l4_pwm.c
new file mode 100644
index 0000000000000000000000000000000000000000..fe46e8cc4ef5ef15817e4813ae815904dfdeae1d
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_pwm.c
@@ -0,0 +1,2144 @@
+/****************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_pwm.c
+ *
+ *   Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "up_internal.h"
+#include "up_arch.h"
+
+#include "chip.h"
+#include "stm32l4_pwm.h"
+#include "stm32l4.h"
+
+/* This module then only compiles if there is at least one enabled timer
+ * intended for use with the PWM upper half driver.
+ */
+
+#if defined(CONFIG_STM32L4_TIM1_PWM)  || defined(CONFIG_STM32L4_TIM2_PWM)  || \
+    defined(CONFIG_STM32L4_TIM3_PWM)  || defined(CONFIG_STM32L4_TIM4_PWM)  || \
+    defined(CONFIG_STM32L4_TIM5_PWM)  || defined(CONFIG_STM32L4_TIM8_PWM)  || \
+    defined(CONFIG_STM32L4_TIM15_PWM) || defined(CONFIG_STM32L4_TIM16_PWM) || \
+    defined(CONFIG_STM32L4_TIM17_PWM)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* PWM/Timer Definitions ****************************************************/
+/* The following definitions are used to identify the various time types */
+
+#define TIMTYPE_BASIC      0  /* Basic timers: TIM6,7 */
+#define TIMTYPE_GENERAL16  1  /* General 16-bit timers: TIM3,4 */
+#define TIMTYPE_COUNTUP16  2  /* General 16-bit count-up timers: TIM15-17 */
+#define TIMTYPE_GENERAL32  3  /* General 32-bit timers: TIM2,5 */
+#define TIMTYPE_ADVANCED   4  /* Advanced timers:  TIM1,8 */
+
+#define TIMTYPE_TIM1       TIMTYPE_ADVANCED
+#define TIMTYPE_TIM2       TIMTYPE_GENERAL32
+#define TIMTYPE_TIM3       TIMTYPE_GENERAL16
+#define TIMTYPE_TIM4       TIMTYPE_GENERAL16
+#define TIMTYPE_TIM5       TIMTYPE_GENERAL32
+#define TIMTYPE_TIM6       TIMTYPE_BASIC
+#define TIMTYPE_TIM7       TIMTYPE_BASIC
+#define TIMTYPE_TIM8       TIMTYPE_ADVANCED
+#define TIMTYPE_TIM15      TIMTYPE_COUNTUP16
+#define TIMTYPE_TIM16      TIMTYPE_COUNTUP16
+#define TIMTYPE_TIM17      TIMTYPE_COUNTUP16
+
+/* Debug ********************************************************************/
+
+#ifdef CONFIG_DEBUG_PWM_INFO
+#  define pwm_dumpgpio(p,m) stm32l4_dumpgpio(p,m)
+#else
+#  define pwm_dumpgpio(p,m)
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+enum stm32l4_timmode_e
+{
+  STM32L4_TIMMODE_COUNTUP   = 0,
+  STM32L4_TIMMODE_COUNTDOWN = 1,
+  STM32L4_TIMMODE_CENTER1   = 2,
+  STM32L4_TIMMODE_CENTER2   = 3,
+  STM32L4_TIMMODE_CENTER3   = 4,
+};
+
+enum stm32l4_chanmode_e
+{
+  STM32L4_CHANMODE_PWM1        = 0,
+  STM32L4_CHANMODE_PWM2        = 1,
+  STM32L4_CHANMODE_COMBINED1   = 2,
+  STM32L4_CHANMODE_COMBINED2   = 3,
+  STM32L4_CHANMODE_ASYMMETRIC1 = 4,
+  STM32L4_CHANMODE_ASYMMETRIC2 = 5,
+};
+
+struct stm32l4_pwmchan_s
+{
+  uint8_t channel;                     /* Timer output channel: {1,..4} */
+  uint32_t pincfg;                     /* Output pin configuration */
+  enum stm32l4_chanmode_e mode;
+  uint32_t npincfg;                    /* Complementary output pin configuration (only TIM1/8 CH1-3)*/
+};
+
+/* This structure represents the state of one PWM timer */
+
+struct stm32l4_pwmtimer_s
+{
+  FAR const struct pwm_ops_s *ops;     /* PWM operations */
+  uint8_t timid;                       /* Timer ID {1,...,17} */
+  struct stm32l4_pwmchan_s channels[PWM_NCHANNELS];
+  uint8_t timtype;                     /* See the TIMTYPE_* definitions */
+  enum stm32l4_timmode_e mode;
+#ifdef CONFIG_PWM_PULSECOUNT
+  uint8_t irq;                         /* Timer update IRQ */
+  uint8_t prev;                        /* The previous value of the RCR (pre-loaded) */
+  uint8_t curr;                        /* The current value of the RCR (pre-loaded) */
+  uint32_t count;                      /* Remaining pluse count */
+#else
+  uint32_t frequency;                  /* Current frequency setting */
+#endif
+  uint32_t base;                       /* The base address of the timer */
+  uint32_t pclk;                       /* The frequency of the peripheral clock
+                                        * that drives the timer module. */
+#ifdef CONFIG_PWM_PULSECOUNT
+  FAR void *handle;                    /* Handle used for upper-half callback */
+#endif
+};
+
+/****************************************************************************
+ * Static Function Prototypes
+ ****************************************************************************/
+/* Register access */
+
+static uint16_t stm32l4pwm_getreg(struct stm32l4_pwmtimer_s *priv, int offset);
+static void stm32l4pwm_putreg(struct stm32l4_pwmtimer_s *priv, int offset, uint16_t value);
+
+#ifdef CONFIG_DEBUG_PWM_INFO
+static void stm32l4pwm_dumpregs(struct stm32l4_pwmtimer_s *priv, FAR const char *msg);
+#else
+#  define stm32l4pwm_dumpregs(priv,msg)
+#endif
+
+/* Timer management */
+
+static int stm32l4pwm_timer(FAR struct stm32l4_pwmtimer_s *priv,
+                            FAR const struct pwm_info_s *info);
+
+#if defined(CONFIG_PWM_PULSECOUNT) && (defined(CONFIG_STM32L4_TIM1_PWM) || defined(CONFIG_STM32L4_TIM8_PWM))
+static int stm32l4pwm_interrupt(struct stm32l4_pwmtimer_s *priv);
+#if defined(CONFIG_STM32L4_TIM1_PWM)
+static int stm32l4pwm_tim1interrupt(int irq, void *context, FAR void *arg);
+#endif
+#if defined(CONFIG_STM32L4_TIM8_PWM)
+static int stm32l4pwm_tim8interrupt(int irq, void *context, FAR void *arg);
+#endif
+static uint8_t stm32l4pwm_pulsecount(uint32_t count);
+#endif
+
+/* PWM driver methods */
+
+static int stm32l4pwm_setup(FAR struct pwm_lowerhalf_s *dev);
+static int stm32l4pwm_shutdown(FAR struct pwm_lowerhalf_s *dev);
+
+#ifdef CONFIG_PWM_PULSECOUNT
+static int stm32l4pwm_start(FAR struct pwm_lowerhalf_s *dev,
+                            FAR const struct pwm_info_s *info,
+                            FAR void *handle);
+#else
+static int stm32l4pwm_start(FAR struct pwm_lowerhalf_s *dev,
+                            FAR const struct pwm_info_s *info);
+#endif
+
+static int stm32l4pwm_stop(FAR struct pwm_lowerhalf_s *dev);
+static int stm32l4pwm_ioctl(FAR struct pwm_lowerhalf_s *dev,
+                            int cmd, unsigned long arg);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+/* This is the list of lower half PWM driver methods used by the upper half driver */
+
+static const struct pwm_ops_s g_pwmops =
+{
+  .setup       = stm32l4pwm_setup,
+  .shutdown    = stm32l4pwm_shutdown,
+  .start       = stm32l4pwm_start,
+  .stop        = stm32l4pwm_stop,
+  .ioctl       = stm32l4pwm_ioctl,
+};
+
+#ifdef CONFIG_STM32L4_TIM1_PWM
+static struct stm32l4_pwmtimer_s g_pwm1dev =
+{
+  .ops         = &g_pwmops,
+  .timid       = 1,
+  .channels    =
+  {
+#ifdef CONFIG_STM32L4_TIM1_CHANNEL1
+    {
+      .channel = 1,
+      .pincfg  = PWM_TIM1_CH1CFG,
+      .mode    = CONFIG_STM32L4_TIM1_CH1MODE,
+      .npincfg = PWM_TIM1_CH1NCFG,
+    },
+#endif
+#ifdef CONFIG_STM32L4_TIM1_CHANNEL2
+    {
+      .channel = 2,
+      .pincfg  = PWM_TIM1_CH2CFG,
+      .mode    = CONFIG_STM32L4_TIM1_CH2MODE,
+      .npincfg = PWM_TIM1_CH2NCFG,
+    },
+#endif
+#ifdef CONFIG_STM32L4_TIM1_CHANNEL3
+    {
+      .channel = 3,
+      .pincfg  = PWM_TIM1_CH3CFG,
+      .mode    = CONFIG_STM32L4_TIM1_CH3MODE,
+      .npincfg = PWM_TIM1_CH3NCFG,
+    },
+#endif
+#ifdef CONFIG_STM32L4_TIM1_CHANNEL4
+    {
+      .channel = 4,
+      .pincfg  = PWM_TIM1_CH4CFG,
+      .mode    = CONFIG_STM32L4_TIM1_CH4MODE,
+      .npincfg = 0,
+    },
+#endif
+  },
+  .timtype     = TIMTYPE_TIM1,
+  .mode        = CONFIG_STM32L4_TIM1_MODE,
+#ifdef CONFIG_PWM_PULSECOUNT
+  .irq         = STM32L4_IRQ_TIM1UP,
+#endif
+  .base        = STM32L4_TIM1_BASE,
+  .pclk        = STM32L4_APB2_TIM1_CLKIN,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM2_PWM
+static struct stm32l4_pwmtimer_s g_pwm2dev =
+{
+  .ops         = &g_pwmops,
+  .timid       = 2,
+  .channels    =
+  {
+#ifdef CONFIG_STM32L4_TIM2_CHANNEL1
+    {
+      .channel = 1,
+      .pincfg  = PWM_TIM2_CH1CFG,
+      .mode    = CONFIG_STM32L4_TIM2_CH1MODE,
+      .npincfg = 0,
+    },
+#endif
+#ifdef CONFIG_STM32L4_TIM2_CHANNEL2
+    {
+      .channel = 2,
+      .pincfg  = PWM_TIM2_CH2CFG,
+      .mode    = CONFIG_STM32L4_TIM2_CH2MODE,
+      .npincfg = 0,
+    },
+#endif
+#ifdef CONFIG_STM32L4_TIM2_CHANNEL3
+    {
+      .channel = 3,
+      .pincfg  = PWM_TIM2_CH3CFG,
+      .mode    = CONFIG_STM32L4_TIM2_CH3MODE,
+      .npincfg = 0,
+    },
+#endif
+#ifdef CONFIG_STM32L4_TIM2_CHANNEL4
+    {
+      .channel = 4,
+      .pincfg  = PWM_TIM2_CH4CFG,
+      .mode    = CONFIG_STM32L4_TIM2_CH4MODE,
+      .npincfg = 0,
+    },
+#endif
+  },
+  .timtype     = TIMTYPE_TIM2,
+  .mode        = CONFIG_STM32L4_TIM2_MODE,
+#ifdef CONFIG_PWM_PULSECOUNT
+  .irq         = STM32L4_IRQ_TIM2,
+#endif
+  .base        = STM32L4_TIM2_BASE,
+  .pclk        = STM32L4_APB1_TIM2_CLKIN,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM3_PWM
+static struct stm32l4_pwmtimer_s g_pwm3dev =
+{
+  .ops         = &g_pwmops,
+  .timid       = 3,
+  .channels    =
+  {
+#ifdef CONFIG_STM32L4_TIM3_CHANNEL1
+    {
+      .channel = 1,
+      .pincfg  = PWM_TIM3_CH1CFG,
+      .mode    = CONFIG_STM32L4_TIM3_CH1MODE,
+      .npincfg = 0,
+    },
+#endif
+#ifdef CONFIG_STM32L4_TIM3_CHANNEL2
+    {
+      .channel = 2,
+      .pincfg  = PWM_TIM3_CH2CFG,
+      .mode    = CONFIG_STM32L4_TIM3_CH2MODE,
+      .npincfg = 0,
+    },
+#endif
+#ifdef CONFIG_STM32L4_TIM3_CHANNEL3
+    {
+      .channel = 3,
+      .pincfg  = PWM_TIM3_CH3CFG,
+      .mode    = CONFIG_STM32L4_TIM3_CH3MODE,
+      .npincfg = 0,
+    },
+#endif
+#ifdef CONFIG_STM32L4_TIM3_CHANNEL4
+    {
+      .channel = 4,
+      .pincfg  = PWM_TIM3_CH4CFG,
+      .mode    = CONFIG_STM32L4_TIM3_CH4MODE,
+      .npincfg = 0,
+    },
+#endif
+  },
+  .timtype     = TIMTYPE_TIM3,
+  .mode        = CONFIG_STM32L4_TIM3_MODE,
+#ifdef CONFIG_PWM_PULSECOUNT
+  .irq         = STM32L4_IRQ_TIM3,
+#endif
+  .base        = STM32L4_TIM3_BASE,
+  .pclk        = STM32L4_APB1_TIM3_CLKIN,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM4_PWM
+static struct stm32l4_pwmtimer_s g_pwm4dev =
+{
+  .ops         = &g_pwmops,
+  .timid       = 4,
+  .channels    =
+  {
+#ifdef CONFIG_STM32L4_TIM4_CHANNEL1
+    {
+      .channel = 1,
+      .pincfg  = PWM_TIM4_CH1CFG,
+      .mode    = CONFIG_STM32L4_TIM4_CH1MODE,
+      .npincfg = 0,
+    },
+#endif
+#ifdef CONFIG_STM32L4_TIM4_CHANNEL2
+    {
+      .channel = 2,
+      .pincfg  = PWM_TIM4_CH2CFG,
+      .mode    = CONFIG_STM32L4_TIM4_CH2MODE,
+      .npincfg = 0,
+    },
+#endif
+#ifdef CONFIG_STM32L4_TIM4_CHANNEL3
+    {
+      .channel = 3,
+      .pincfg  = PWM_TIM4_CH3CFG,
+      .mode    = CONFIG_STM32L4_TIM4_CH3MODE,
+      .npincfg = 0,
+    },
+#endif
+#ifdef CONFIG_STM32L4_TIM4_CHANNEL4
+    {
+      .channel = 4,
+      .pincfg  = PWM_TIM4_CH4CFG,
+      .mode    = CONFIG_STM32L4_TIM4_CH4MODE,
+      .npincfg = 0,
+    },
+#endif
+  },
+  .timtype     = TIMTYPE_TIM4,
+  .mode        = CONFIG_STM32L4_TIM4_MODE,
+#ifdef CONFIG_PWM_PULSECOUNT
+  .irq         = STM32L4_IRQ_TIM4,
+#endif
+  .base        = STM32L4_TIM4_BASE,
+  .pclk        = STM32L4_APB1_TIM4_CLKIN,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM5_PWM
+static struct stm32l4_pwmtimer_s g_pwm5dev =
+{
+  .ops         = &g_pwmops,
+  .timid       = 5,
+  .channels    =
+  {
+#ifdef CONFIG_STM32L4_TIM5_CHANNEL1
+    {
+      .channel = 1,
+      .pincfg  = PWM_TIM5_CH1CFG,
+      .mode    = CONFIG_STM32L4_TIM5_CH1MODE,
+      .npincfg = 0,
+    },
+#endif
+#ifdef CONFIG_STM32L4_TIM5_CHANNEL2
+    {
+      .channel = 2,
+      .pincfg  = PWM_TIM5_CH2CFG,
+      .mode    = CONFIG_STM32L4_TIM5_CH2MODE,
+      .npincfg = 0,
+    },
+#endif
+#ifdef CONFIG_STM32L4_TIM5_CHANNEL3
+    {
+      .channel = 3,
+      .pincfg  = PWM_TIM5_CH3CFG,
+      .mode    = CONFIG_STM32L4_TIM5_CH3MODE,
+      .npincfg = 0,
+    },
+#endif
+#ifdef CONFIG_STM32L4_TIM5_CHANNEL4
+    {
+      .channel = 4,
+      .pincfg  = PWM_TIM5_CH4CFG,
+      .mode    = CONFIG_STM32L4_TIM5_CH4MODE,
+      .npincfg = 0,
+    },
+#endif
+  },
+  .timtype     = TIMTYPE_TIM5,
+  .mode        = CONFIG_STM32L4_TIM5_MODE,
+#ifdef CONFIG_PWM_PULSECOUNT
+  .irq         = STM32L4_IRQ_TIM5,
+#endif
+  .base        = STM32L4_TIM5_BASE,
+  .pclk        = STM32L4_APB1_TIM5_CLKIN,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM8_PWM
+static struct stm32l4_pwmtimer_s g_pwm8dev =
+{
+  .ops         = &g_pwmops,
+  .timid       = 8,
+  .channels    =
+  {
+#ifdef CONFIG_STM32L4_TIM8_CHANNEL1
+    {
+      .channel = 1,
+      .pincfg  = PWM_TIM8_CH1CFG,
+      .mode    = CONFIG_STM32L4_TIM8_CH1MODE,
+      .npincfg = PWM_TIM8_CH1NCFG,
+    },
+#endif
+#ifdef CONFIG_STM32L4_TIM8_CHANNEL2
+    {
+      .channel = 2,
+      .pincfg  = PWM_TIM8_CH2CFG,
+      .mode    = CONFIG_STM32L4_TIM8_CH2MODE,
+      .npincfg = PWM_TIM8_CH2NCFG,
+    },
+#endif
+#ifdef CONFIG_STM32L4_TIM8_CHANNEL3
+    {
+      .channel = 3,
+      .pincfg  = PWM_TIM8_CH3CFG,
+      .mode    = CONFIG_STM32L4_TIM8_CH3MODE,
+      .npincfg = PWM_TIM8_CH3NCFG,
+    },
+#endif
+#ifdef CONFIG_STM32L4_TIM8_CHANNEL4
+    {
+      .channel = 4,
+      .pincfg  = PWM_TIM8_CH4CFG,
+      .mode    = CONFIG_STM32L4_TIM8_CH4MODE,
+      .npincfg = 0,
+    },
+#endif
+  },
+  .timtype     = TIMTYPE_TIM8,
+  .mode        = CONFIG_STM32L4_TIM8_MODE,
+#ifdef CONFIG_PWM_PULSECOUNT
+  .irq         = STM32L4_IRQ_TIM8UP,
+#endif
+  .base        = STM32L4_TIM8_BASE,
+  .pclk        = STM32L4_APB2_TIM8_CLKIN,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM15_PWM
+static struct stm32l4_pwmtimer_s g_pwm15dev =
+{
+  .ops         = &g_pwmops,
+  .timid       = 15,
+  .channels    =
+  {
+#ifdef CONFIG_STM32L4_TIM15_CHANNEL1
+    {
+      .channel = 1,
+      .pincfg  = PWM_TIM15_CH1CFG,
+      .mode    = CONFIG_STM32L4_TIM15_CH1MODE,
+      .npincfg = PWM_TIM15_CH1NCFG,
+    },
+#endif
+#ifdef CONFIG_STM32L4_TIM15_CHANNEL2
+    {
+      .channel = 2,
+      .pincfg  = PWM_TIM15_CH2CFG,
+      .mode    = CONFIG_STM32L4_TIM15_CH2MODE,
+      .npincfg = 0,
+    },
+#endif
+  },
+  .timtype     = TIMTYPE_TIM15,
+  .mode        = STM32L4_TIMMODE_COUNTUP,
+#ifdef CONFIG_PWM_PULSECOUNT
+  .irq         = STM32L4_IRQ_TIM15,
+#endif
+  .base        = STM32L4_TIM15_BASE,
+  .pclk        = STM32L4_APB1_TIM15_CLKIN,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM16_PWM
+static struct stm32l4_pwmtimer_s g_pwm16dev =
+{
+  .ops         = &g_pwmops,
+  .timid       = 16,
+  .channels    =
+  {
+#ifdef CONFIG_STM32L4_TIM16_CHANNEL1
+    {
+      .channel = 1,
+      .pincfg  = PWM_TIM16_CH1CFG,
+      .mode    = CONFIG_STM32L4_TIM16_CH1MODE,
+      .npincfg = PWM_TIM16_CH1NCFG,
+    },
+#endif
+  },
+  .timtype     = TIMTYPE_TIM16,
+  .mode        = STM32L4_TIMMODE_COUNTUP,
+#ifdef CONFIG_PWM_PULSECOUNT
+  .irq         = STM32L4_IRQ_TIM16,
+#endif
+  .base        = STM32L4_TIM16_BASE,
+  .pclk        = STM32L4_APB1_TIM16_CLKIN,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM17_PWM
+static struct stm32l4_pwmtimer_s g_pwm17dev =
+{
+  .ops         = &g_pwmops,
+  .timid       = 17,
+  .channels    =
+  {
+#ifdef CONFIG_STM32L4_TIM17_CHANNEL1
+    {
+      .channel = 1,
+      .pincfg  = PWM_TIM17_CH1CFG,
+      .mode    = CONFIG_STM32L4_TIM17_CH1MODE,
+      .npincfg = PWM_TIM17_CH1NCFG,
+    },
+#endif
+  },
+  .timtype     = TIMTYPE_TIM17,
+  .mode        = STM32L4_TIMMODE_COUNTUP,
+#ifdef CONFIG_PWM_PULSECOUNT
+  .irq         = STM32L4_IRQ_TIM17,
+#endif
+  .base        = STM32L4_TIM17_BASE,
+  .pclk        = STM32L4_APB1_TIM17_CLKIN,
+};
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4pwm_getreg
+ *
+ * Description:
+ *   Read the value of an PWM timer register.
+ *
+ * Input Parameters:
+ *   priv - A reference to the PWM block status
+ *   offset - The offset to the register to read
+ *
+ * Returned Value:
+ *   The current contents of the specified register
+ *
+ ****************************************************************************/
+
+static uint16_t stm32l4pwm_getreg(struct stm32l4_pwmtimer_s *priv, int offset)
+{
+  return getreg16(priv->base + offset);
+}
+
+/****************************************************************************
+ * Name: stm32l4pwm_putreg
+ *
+ * Description:
+ *   Read the value of an PWM timer register.
+ *
+ * Input Parameters:
+ *   priv - A reference to the PWM block status
+ *   offset - The offset to the register to read
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void stm32l4pwm_putreg(struct stm32l4_pwmtimer_s *priv, int offset, 
+                              uint16_t value)
+{
+  if (priv->timtype == TIMTYPE_GENERAL32 &&
+      (offset == STM32L4_GTIM_CNT_OFFSET ||
+       offset == STM32L4_GTIM_ARR_OFFSET ||
+       offset == STM32L4_GTIM_CCR1_OFFSET ||
+       offset == STM32L4_GTIM_CCR2_OFFSET ||
+       offset == STM32L4_GTIM_CCR3_OFFSET ||
+       offset == STM32L4_GTIM_CCR4_OFFSET))
+    {
+      /* a 32 bit access is required for a 32 bit register:
+       * if only a 16 bit write would be performed, then the
+       * upper 16 bits of the 32 bit register will be a copy of
+       * the lower 16 bits.
+       */
+
+      putreg32(value, priv->base + offset);
+    }
+  else
+    {
+      putreg16(value, priv->base + offset);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4pwm_dumpregs
+ *
+ * Description:
+ *   Dump all timer registers.
+ *
+ * Input parameters:
+ *   priv - A reference to the PWM block status
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEBUG_PWM_INFO
+static void stm32l4pwm_dumpregs(struct stm32l4_pwmtimer_s *priv,
+                                FAR const char *msg)
+{
+  pwminfo("%s:\n", msg);
+  pwminfo("  CR1: %04x CR2:  %04x SMCR:  %04x DIER:  %04x\n",
+          stm32l4pwm_getreg(priv, STM32L4_GTIM_CR1_OFFSET),
+          stm32l4pwm_getreg(priv, STM32L4_GTIM_CR2_OFFSET),
+          stm32l4pwm_getreg(priv, STM32L4_GTIM_SMCR_OFFSET),
+          stm32l4pwm_getreg(priv, STM32L4_GTIM_DIER_OFFSET));
+  pwminfo("   SR: %04x EGR:  %04x CCMR1: %04x CCMR2: %04x\n",
+          stm32l4pwm_getreg(priv, STM32L4_GTIM_SR_OFFSET),
+          stm32l4pwm_getreg(priv, STM32L4_GTIM_EGR_OFFSET),
+          stm32l4pwm_getreg(priv, STM32L4_GTIM_CCMR1_OFFSET),
+          stm32l4pwm_getreg(priv, STM32L4_GTIM_CCMR2_OFFSET));
+  pwminfo(" CCER: %04x CNT:  %04x PSC:   %04x ARR:   %04x\n",
+          stm32l4pwm_getreg(priv, STM32L4_GTIM_CCER_OFFSET),
+          stm32l4pwm_getreg(priv, STM32L4_GTIM_CNT_OFFSET),
+          stm32l4pwm_getreg(priv, STM32L4_GTIM_PSC_OFFSET),
+          stm32l4pwm_getreg(priv, STM32L4_GTIM_ARR_OFFSET));
+  pwminfo(" CCR1: %04x CCR2: %04x CCR3:  %04x CCR4:  %04x\n",
+          stm32l4pwm_getreg(priv, STM32L4_GTIM_CCR1_OFFSET),
+          stm32l4pwm_getreg(priv, STM32L4_GTIM_CCR2_OFFSET),
+          stm32l4pwm_getreg(priv, STM32L4_GTIM_CCR3_OFFSET),
+          stm32l4pwm_getreg(priv, STM32L4_GTIM_CCR4_OFFSET));
+#if defined(CONFIG_STM32L4_TIM1_PWM) || defined(CONFIG_STM32L4_TIM8_PWM)
+  if (priv->timtype == TIMTYPE_ADVANCED)
+    {
+      pwminfo("  RCR: %04x BDTR: %04x DCR:   %04x DMAR:  %04x\n",
+          stm32l4pwm_getreg(priv, STM32L4_ATIM_RCR_OFFSET),
+          stm32l4pwm_getreg(priv, STM32L4_ATIM_BDTR_OFFSET),
+          stm32l4pwm_getreg(priv, STM32L4_ATIM_DCR_OFFSET),
+          stm32l4pwm_getreg(priv, STM32L4_ATIM_DMAR_OFFSET));
+    }
+  else
+#endif
+    {
+      pwminfo("  DCR: %04x DMAR: %04x\n",
+          stm32l4pwm_getreg(priv, STM32L4_GTIM_DCR_OFFSET),
+          stm32l4pwm_getreg(priv, STM32L4_GTIM_DMAR_OFFSET));
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4pwm_timer
+ *
+ * Description:
+ *   (Re-)initialize the timer resources and start the pulsed output
+ *
+ * Input parameters:
+ *   priv - A reference to the lower half PWM driver state structure
+ *   info - A reference to the characteristics of the pulsed output
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int stm32l4pwm_timer(FAR struct stm32l4_pwmtimer_s *priv,
+                            FAR const struct pwm_info_s *info)
+{
+#ifdef CONFIG_PWM_MULTICHAN
+  int      i;
+#endif
+
+  /* Calculated values */
+
+  uint32_t prescaler;
+  uint32_t timclk;
+  uint32_t reload;
+  uint32_t ccr;
+
+  /* Register contents */
+
+  uint16_t cr1;
+  uint16_t ccer;
+  uint16_t cr2;
+  uint32_t ccmr1;
+  uint32_t ccmr2;
+
+  /* New timer register bit settings */
+
+  uint16_t ccenable;
+  uint16_t ccnenable;
+  uint32_t ocmode1;
+  uint32_t ocmode2;
+
+  DEBUGASSERT(priv != NULL && info != NULL);
+
+#if defined(CONFIG_PWM_MULTICHAN)
+  pwminfo("TIM%u frequency: %u\n",
+          priv->timid, info->frequency);
+#elif defined(CONFIG_PWM_PULSECOUNT)
+  pwminfo("TIM%u channel: %u frequency: %u duty: %08x count: %u\n",
+          priv->timid, priv->channels[0].channel, info->frequency,
+          info->duty, info->count);
+#else
+  pwminfo("TIM%u channel: %u frequency: %u duty: %08x\n",
+          priv->timid, priv->channels[0].channel, info->frequency, info->duty);
+#endif
+
+  DEBUGASSERT(info->frequency > 0);
+#ifndef CONFIG_PWM_MULTICHAN
+  DEBUGASSERT(info->duty >= 0 && info->duty < uitoub16(100));
+#endif
+
+  /* Disable all interrupts and DMA requests, clear all pending status */
+
+#ifdef CONFIG_PWM_PULSECOUNT
+  stm32l4pwm_putreg(priv, STM32L4_GTIM_DIER_OFFSET, 0);
+  stm32l4pwm_putreg(priv, STM32L4_GTIM_SR_OFFSET, 0);
+#endif
+
+  /* Calculate optimal values for the timer prescaler and for the timer reload
+   * register.  If 'frequency' is the desired frequency, then
+   *
+   *   reload = timclk / frequency
+   *   timclk = pclk / presc
+   *
+   * Or,
+   *
+   *   reload = pclk / presc / frequency
+   *
+   * There are many solutions to this this, but the best solution will be the
+   * one that has the largest reload value and the smallest prescaler value.
+   * That is the solution that should give us the most accuracy in the timer
+   * control.  Subject to:
+   *
+   *   0 <= presc  <= 65536
+   *   1 <= reload <= 65535
+   *
+   * So presc = pclk / 65535 / frequency would be optimal.
+   *
+   * Example:
+   *
+   *  pclk      = 42 MHz
+   *  frequency = 100 Hz
+   *
+   *  prescaler = 42,000,000 / 65,535 / 100
+   *            = 6.4 (or 7 -- taking the ceiling always)
+   *  timclk    = 42,000,000 / 7
+   *            = 6,000,000
+   *  reload    = 6,000,000 / 100
+   *            = 60,000
+   */
+
+  prescaler = (priv->pclk / info->frequency + 65534) / 65535;
+  if (prescaler < 1)
+    {
+      prescaler = 1;
+    }
+  else if (prescaler > 65536)
+    {
+      prescaler = 65536;
+    }
+
+  timclk = priv->pclk / prescaler;
+
+  reload = timclk / info->frequency;
+  if (reload < 1)
+    {
+      reload = 1;
+    }
+  else if (reload > 65535)
+    {
+      reload = 65535;
+    }
+
+  pwminfo("TIM%u PCLK: %u frequency: %u TIMCLK: %u prescaler: %u reload: %u\n",
+          priv->timid, priv->pclk, info->frequency, timclk, prescaler, reload);
+
+  /* Set up the timer CR1 register:
+   *
+   * 1,8   CKD[1:0] ARPE CMS[1:0] DIR OPM URS UDIS CEN
+   * 2-5   CKD[1:0] ARPE CMS      DIR OPM URS UDIS CEN
+   * 6-7            ARPE              OPM URS UDIS CEN
+   * 9-14  CKD[1:0] ARPE                  URS UDIS CEN
+   * 15-17 CKD[1:0] ARPE              OPM URS UDIS CEN
+   */
+
+  cr1 = stm32l4pwm_getreg(priv, STM32L4_GTIM_CR1_OFFSET);
+
+  /* Disable the timer until we get it configured */
+
+  cr1 &= ~GTIM_CR1_CEN;
+
+  /* Set the counter mode for the advanced timers (1,8) and most general
+   * purpose timers (all 2-5, but not 9-17), i.e., all but TIMTYPE_COUNTUP16
+   * and TIMTYPE_BASIC
+   */
+
+#if defined(CONFIG_STM32L4_TIM1_PWM) || defined(CONFIG_STM32L4_TIM2_PWM) || \
+    defined(CONFIG_STM32L4_TIM3_PWM) || defined(CONFIG_STM32L4_TIM4_PWM) || \
+    defined(CONFIG_STM32L4_TIM5_PWM) || defined(CONFIG_STM32L4_TIM8_PWM)
+
+  if (priv->timtype != TIMTYPE_BASIC && priv->timtype != TIMTYPE_COUNTUP16)
+    {
+      /* Select the Counter Mode:
+       *
+       * GTIM_CR1_EDGE: The counter counts up or down depending on the
+       *   direction bit (DIR).
+       * GTIM_CR1_CENTER1, GTIM_CR1_CENTER2, GTIM_CR1_CENTER3: The counter
+       *   counts up then down.
+       * GTIM_CR1_DIR: 0: count up, 1: count down
+       */
+
+      cr1 &= ~(GTIM_CR1_DIR | GTIM_CR1_CMS_MASK);
+
+      switch (priv->mode)
+        {
+          case STM32L4_TIMMODE_COUNTUP:
+            cr1 |= GTIM_CR1_EDGE;
+            break;
+
+          case STM32L4_TIMMODE_COUNTDOWN:
+            cr1 |= GTIM_CR1_EDGE | GTIM_CR1_DIR;
+            break;
+
+          case STM32L4_TIMMODE_CENTER1:
+            cr1 |= GTIM_CR1_CENTER1;
+            break;
+
+          case STM32L4_TIMMODE_CENTER2:
+            cr1 |= GTIM_CR1_CENTER2;
+            break;
+
+          case STM32L4_TIMMODE_CENTER3:
+            cr1 |= GTIM_CR1_CENTER3;
+            break;
+
+          default:
+            pwmerr("ERROR: No such timer mode: %u\n", (unsigned int)priv->mode);
+            return -EINVAL;
+        }
+    }
+#endif
+
+  /* Set the clock division to zero for all (but the basic timers, but there
+   * should be no basic timers in this context
+   */
+
+  cr1 &= ~GTIM_CR1_CKD_MASK;
+  stm32l4pwm_putreg(priv, STM32L4_GTIM_CR1_OFFSET, cr1);
+
+  /* Set the reload and prescaler values */
+
+  stm32l4pwm_putreg(priv, STM32L4_GTIM_ARR_OFFSET, (uint16_t)reload);
+  stm32l4pwm_putreg(priv, STM32L4_GTIM_PSC_OFFSET, (uint16_t)(prescaler - 1));
+
+  /* Set the advanced timer's repetition counter */
+
+#if defined(CONFIG_STM32L4_TIM1_PWM) || defined(CONFIG_STM32L4_TIM8_PWM)
+  if (priv->timtype == TIMTYPE_ADVANCED)
+    {
+      /* If a non-zero repetition count has been selected, then set the
+       * repitition counter to the count-1 (stm32l4pwm_start() has already
+       * assured us that the count value is within range).
+       */
+
+#ifdef CONFIG_PWM_PULSECOUNT
+      if (info->count > 0)
+        {
+          /* Save the remaining count and the number of counts that will have
+           * elapsed on the first interrupt.
+           */
+
+          /* If the first interrupt occurs at the end end of the first
+           * repetition count, then the count will be the same as the RCR
+           * value.
+           */
+
+          priv->prev  = stm32l4pwm_pulsecount(info->count);
+          stm32l4pwm_putreg(priv, STM32L4_ATIM_RCR_OFFSET, (uint16_t)priv->prev - 1);
+
+          /* Generate an update event to reload the prescaler.  This should
+           * preload the RCR into active repetition counter.
+           */
+
+          stm32l4pwm_putreg(priv, STM32L4_GTIM_EGR_OFFSET, ATIM_EGR_UG);
+
+          /* Now set the value of the RCR that will be loaded on the next
+           * update event.
+           */
+
+          priv->count = info->count;
+          priv->curr  = stm32l4pwm_pulsecount(info->count - priv->prev);
+          stm32l4pwm_putreg(priv, STM32L4_ATIM_RCR_OFFSET, (uint16_t)priv->curr - 1);
+        }
+
+      /* Otherwise, just clear the repetition counter */
+
+      else
+#endif
+        {
+          /* Set the repetition counter to zero */
+
+          stm32l4pwm_putreg(priv, STM32L4_ATIM_RCR_OFFSET, 0);
+
+          /* Generate an update event to reload the prescaler */
+
+          stm32l4pwm_putreg(priv, STM32L4_GTIM_EGR_OFFSET, ATIM_EGR_UG);
+        }
+    }
+  else
+#endif
+    {
+      /* Generate an update event to reload the prescaler (all timers) */
+
+      stm32l4pwm_putreg(priv, STM32L4_GTIM_EGR_OFFSET, ATIM_EGR_UG);
+    }
+
+  /* Handle channel specific setup */
+
+  ccenable  = 0;
+  ccnenable = 0;
+  ocmode1   = 0;
+  ocmode2   = 0;
+
+#ifdef CONFIG_PWM_MULTICHAN
+  for (i = 0; i < CONFIG_PWM_NCHANNELS; i++)
+#endif
+    {
+      ub16_t                duty;
+      uint32_t              chanmode;
+      uint32_t              compout; /* Complementary output config */
+      bool                  ocmbit = false;
+      uint8_t               channel;
+#ifdef CONFIG_PWM_MULTICHAN
+      int                   j;
+#endif
+      enum stm32l4_chanmode_e mode;
+
+#ifdef CONFIG_PWM_MULTICHAN
+      duty = info->channels[i].duty;
+      channel = info->channels[i].channel;
+
+      /* A value of zero means to skip this channel */
+
+      if (channel == 0)
+        {
+          continue;
+        }
+
+      /* Find the channel */
+
+      for (j = 0; j < PWM_NCHANNELS; j++)
+        {
+          if (priv->channels[j].channel == channel)
+            {
+              mode = priv->channels[j].mode;
+              compout = priv->channels[j].npincfg;
+              break;
+            }
+        }
+
+      if (j >= PWM_NCHANNELS)
+        {
+          pwmerr("ERROR: No such channel: %u\n", channel);
+          return -EINVAL;
+        }
+#else
+      duty = info->duty;
+      channel = priv->channels[0].channel;
+      mode = priv->channels[0].mode;
+      compout = priv->channels[0].npincfg;
+#endif
+
+      /* Duty cycle:
+       *
+       * duty cycle = ccr / reload (fractional value)
+       */
+
+      ccr = b16toi(duty * reload + b16HALF);
+
+      pwminfo("ccr: %u\n", ccr);
+
+      switch (mode)
+        {
+          case STM32L4_CHANMODE_PWM1:
+            chanmode = ATIM_CCMR_MODE_PWM1;
+            break;
+
+          case STM32L4_CHANMODE_PWM2:
+            chanmode = ATIM_CCMR_MODE_PWM2;
+            break;
+
+          case STM32L4_CHANMODE_COMBINED1:
+            chanmode = ATIM_CCMR_MODE_COMBINED1;
+            ocmbit = true;
+            break;
+
+          case STM32L4_CHANMODE_COMBINED2:
+            chanmode = ATIM_CCMR_MODE_COMBINED2;
+            ocmbit = true;
+            break;
+
+          case STM32L4_CHANMODE_ASYMMETRIC1:
+            chanmode = ATIM_CCMR_MODE_ASYMMETRIC1;
+            ocmbit = true;
+            break;
+
+          case STM32L4_CHANMODE_ASYMMETRIC2:
+            chanmode = ATIM_CCMR_MODE_ASYMMETRIC2;
+            ocmbit = true;
+            break;
+
+          default:
+            pwmerr("ERROR: No such mode: %u\n", (unsigned int)mode);
+            return -EINVAL;
+        }
+
+      switch (channel)
+        {
+          case 1:  /* PWM Mode configuration: Channel 1 */
+            {
+              /* Select the CCER enable bit for this channel */
+
+              ccenable |= ATIM_CCER_CC1E;
+
+              /* Conditionnaly enable the complementary output */
+
+              if (compout)
+                {
+                  ccnenable |= ATIM_CCER_CC1NE;
+                }
+
+              /* Set the CCMR1 mode values (leave CCMR2 zero) */
+
+              ocmode1  |= (ATIM_CCMR_CCS_CCOUT << ATIM_CCMR1_CC1S_SHIFT) |
+                          (chanmode << ATIM_CCMR1_OC1M_SHIFT) |
+                          ATIM_CCMR1_OC1PE;
+
+              if (ocmbit)
+                {
+                  ocmode1 |= ATIM_CCMR1_OC1M;
+                }
+
+              /* Set the duty cycle by writing to the CCR register for this channel */
+
+              stm32l4pwm_putreg(priv, STM32L4_GTIM_CCR1_OFFSET, (uint16_t)ccr);
+            }
+            break;
+
+          case 2:  /* PWM Mode configuration: Channel 2 */
+            {
+              /* Select the CCER enable bit for this channel */
+
+              ccenable |= ATIM_CCER_CC2E;
+
+              /* Conditionnaly enable the complementary output */
+
+              if (compout)
+                {
+                  ccnenable |= ATIM_CCER_CC2NE;
+                }
+
+              /* Set the CCMR1 mode values (leave CCMR2 zero) */
+
+              ocmode1  |= (ATIM_CCMR_CCS_CCOUT << ATIM_CCMR1_CC2S_SHIFT) |
+                          (chanmode << ATIM_CCMR1_OC2M_SHIFT) |
+                          ATIM_CCMR1_OC2PE;
+
+              if (ocmbit)
+                {
+                  ocmode1 |= ATIM_CCMR1_OC2M;
+                }
+
+              /* Set the duty cycle by writing to the CCR register for this channel */
+
+              stm32l4pwm_putreg(priv, STM32L4_GTIM_CCR2_OFFSET, (uint16_t)ccr);
+            }
+            break;
+
+          case 3:  /* PWM Mode configuration: Channel 3 */
+            {
+              /* Select the CCER enable bit for this channel */
+
+              ccenable |= ATIM_CCER_CC3E;
+
+              /* Conditionnaly enable the complementary output */
+
+              if (compout)
+                {
+                  ccnenable |= ATIM_CCER_CC3NE;
+                }
+
+              /* Set the CCMR2 mode values (leave CCMR1 zero) */
+
+              ocmode2  |= (ATIM_CCMR_CCS_CCOUT << ATIM_CCMR2_CC3S_SHIFT) |
+                          (chanmode << ATIM_CCMR2_OC3M_SHIFT) |
+                          ATIM_CCMR2_OC3PE;
+
+              if (ocmbit)
+                {
+                  ocmode2 |= ATIM_CCMR2_OC3M;
+                }
+
+              /* Set the duty cycle by writing to the CCR register for this channel */
+
+              stm32l4pwm_putreg(priv, STM32L4_GTIM_CCR3_OFFSET, (uint16_t)ccr);
+            }
+            break;
+
+          case 4:  /* PWM Mode configuration: Channel 4 */
+            {
+              /* Select the CCER enable bit for this channel */
+
+              ccenable |= ATIM_CCER_CC4E;
+
+              /* Set the CCMR2 mode values (leave CCMR1 zero) */
+
+              ocmode2  |= (ATIM_CCMR_CCS_CCOUT << ATIM_CCMR2_CC4S_SHIFT) |
+                          (chanmode << ATIM_CCMR2_OC4M_SHIFT) |
+                          ATIM_CCMR2_OC4PE;
+
+              if (ocmbit)
+                {
+                  ocmode2 |= ATIM_CCMR2_OC4M;
+                }
+
+              /* Set the duty cycle by writing to the CCR register for this channel */
+
+              stm32l4pwm_putreg(priv, STM32L4_GTIM_CCR4_OFFSET, (uint16_t)ccr);
+            }
+            break;
+
+          default:
+            pwmerr("ERROR: No such channel: %u\n", channel);
+            return -EINVAL;
+        }
+    }
+
+  /* Disable the Channel by resetting the CCxE Bit in the CCER register */
+
+  ccer = stm32l4pwm_getreg(priv, STM32L4_GTIM_CCER_OFFSET);
+  ccer &= ~ccenable;
+  stm32l4pwm_putreg(priv, STM32L4_GTIM_CCER_OFFSET, ccer);
+
+  /* Fetch the CR2, CCMR1, and CCMR2 register (already have cr1 and ccer) */
+
+  cr2   = stm32l4pwm_getreg(priv, STM32L4_GTIM_CR2_OFFSET);
+  ccmr1 = stm32l4pwm_getreg(priv, STM32L4_GTIM_CCMR1_OFFSET);
+  ccmr2 = stm32l4pwm_getreg(priv, STM32L4_GTIM_CCMR2_OFFSET);
+
+  /* Reset the Output Compare Mode Bits and set the select output compare mode */
+
+  ccmr1 &= ~(ATIM_CCMR1_CC1S_MASK | ATIM_CCMR1_OC1M_MASK | ATIM_CCMR1_OC1PE |
+             ATIM_CCMR1_CC2S_MASK | ATIM_CCMR1_OC2M_MASK | ATIM_CCMR1_OC2PE
+             | ATIM_CCMR1_OC1M | ATIM_CCMR1_OC2M
+             );
+  ccmr2 &= ~(ATIM_CCMR2_CC3S_MASK | ATIM_CCMR2_OC3M_MASK | ATIM_CCMR2_OC3PE |
+             ATIM_CCMR2_CC4S_MASK | ATIM_CCMR2_OC4M_MASK | ATIM_CCMR2_OC4PE
+             | ATIM_CCMR2_OC3M | ATIM_CCMR2_OC4M
+             );
+  ccmr1 |= ocmode1;
+  ccmr2 |= ocmode2;
+
+  /* Reset the output polarity level of all channels (selects high polarity)*/
+
+  ccer &= ~(ATIM_CCER_CC1P | ATIM_CCER_CC2P | ATIM_CCER_CC3P | ATIM_CCER_CC4P);
+
+  /* Enable the output state of the selected channels */
+
+  ccer &= ~(ATIM_CCER_CC1E | ATIM_CCER_CC2E | ATIM_CCER_CC3E | ATIM_CCER_CC4E);
+  ccer |= ccenable;
+
+  /* Some special setup for advanced timers */
+
+#if defined(CONFIG_STM32L4_TIM1_PWM) || defined(CONFIG_STM32L4_TIM8_PWM)
+  if (priv->timtype == TIMTYPE_ADVANCED)
+    {
+      uint16_t bdtr;
+
+      /* Reset output N polarity level, output N state, output compare state,
+       * output compare N idle state.
+       */
+
+      ccer &= ~(ATIM_CCER_CC1NE | ATIM_CCER_CC1NP | ATIM_CCER_CC2NE | ATIM_CCER_CC2NP |
+                ATIM_CCER_CC3NE | ATIM_CCER_CC3NP);
+
+      ccer |= ccnenable;
+
+      /* Reset the output compare and output compare N IDLE State */
+
+      cr2 &= ~(ATIM_CR2_OIS1 | ATIM_CR2_OIS1N | ATIM_CR2_OIS2 | ATIM_CR2_OIS2N |
+               ATIM_CR2_OIS3 | ATIM_CR2_OIS3N | ATIM_CR2_OIS4);
+
+      /* Set the main output enable (MOE) bit and clear the OSSI and OSSR
+       * bits in the BDTR register.
+       */
+
+      bdtr  = stm32l4pwm_getreg(priv, STM32L4_ATIM_BDTR_OFFSET);
+      bdtr &= ~(ATIM_BDTR_OSSI | ATIM_BDTR_OSSR);
+      bdtr |= ATIM_BDTR_MOE;
+      stm32l4pwm_putreg(priv, STM32L4_ATIM_BDTR_OFFSET, bdtr);
+    }
+  else
+#if defined(CONFIG_STM32L4_TIM15_PWM) || defined(CONFIG_STM32L4_TIM15_PWM) || defined(CONFIG_STM32L4_TIM15_PWM)
+  if (priv->timtype == TIMTYPE_COUNTUP16)
+    {
+
+      /* Reset output N polarity level, output N state, output compare state,
+       * output compare N idle state.
+       */
+
+      ccer &= ~(ATIM_CCER_CC1NE | ATIM_CCER_CC1NP);
+      ccer |= ccnenable;
+    }
+  else
+#endif
+#endif
+    {
+      ccer &= ~(GTIM_CCER_CC1NP | GTIM_CCER_CC2NP | GTIM_CCER_CC3NP); /* Not sure why? */
+    }
+
+  /* Save the modified register values */
+
+  stm32l4pwm_putreg(priv, STM32L4_GTIM_CR2_OFFSET, cr2);
+  putreg32(ccmr1, priv->base + STM32L4_GTIM_CCMR1_OFFSET);
+  putreg32(ccmr2, priv->base + STM32L4_GTIM_CCMR2_OFFSET);
+  stm32l4pwm_putreg(priv, STM32L4_GTIM_CCER_OFFSET, ccer);
+
+  /* Set the ARR Preload Bit */
+
+  cr1 = stm32l4pwm_getreg(priv, STM32L4_GTIM_CR1_OFFSET);
+  cr1 |= GTIM_CR1_ARPE;
+  stm32l4pwm_putreg(priv, STM32L4_GTIM_CR1_OFFSET, cr1);
+
+  /* Setup update interrupt.  If info->count is > 0, then we can be
+   * assured that stm32l4pwm_start() has already verified: (1) that this is an
+   * advanced timer, and that (2) the repetition count is within range.
+   */
+
+#ifdef CONFIG_PWM_PULSECOUNT
+  if (info->count > 0)
+    {
+      /* Clear all pending interrupts and enable the update interrupt. */
+
+      stm32l4pwm_putreg(priv, STM32L4_GTIM_SR_OFFSET, 0);
+      stm32l4pwm_putreg(priv, STM32L4_GTIM_DIER_OFFSET, ATIM_DIER_UIE);
+
+      /* Enable the timer */
+
+      cr1 |= GTIM_CR1_CEN;
+      stm32l4pwm_putreg(priv, STM32L4_GTIM_CR1_OFFSET, cr1);
+
+      /* And enable timer interrupts at the NVIC */
+
+      up_enable_irq(priv->irq);
+    }
+  else
+#endif
+    {
+      /* Just enable the timer, leaving all interrupts disabled */
+
+      cr1 |= GTIM_CR1_CEN;
+      stm32l4pwm_putreg(priv, STM32L4_GTIM_CR1_OFFSET, cr1);
+    }
+
+  stm32l4pwm_dumpregs(priv, "After starting");
+  return OK;
+}
+
+#ifndef CONFIG_PWM_PULSECOUNT
+/****************************************************************************
+ * Name: stm32l4pwm_update_duty
+ *
+ * Description:
+ *   Try to change only channel duty.
+ *
+ * Input parameters:
+ *   priv    - A reference to the lower half PWM driver state structure
+ *   channel - Channel to by updated
+ *   duty    - New duty.
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static  int stm32l4pwm_update_duty(FAR struct stm32l4_pwmtimer_s *priv,
+                                   uint8_t channel, ub16_t duty)
+{
+  /* Register offset */
+
+  int ccr_offset;
+
+  /* Calculated values */
+
+  uint32_t reload;
+  uint32_t ccr;
+
+  DEBUGASSERT(priv != NULL);
+
+  pwminfo("TIM%u channel: %u duty: %08x\n",
+          priv->timid, channel, duty);
+
+#ifndef CONFIG_PWM_MULTICHAN
+  DEBUGASSERT(channel == priv->channels[0].channel);
+  DEBUGASSERT(duty >= 0 && duty < uitoub16(100));
+#endif
+
+  /* Get the reload values */
+
+  reload = stm32l4pwm_getreg(priv, STM32L4_GTIM_ARR_OFFSET);
+
+  /* Duty cycle:
+   *
+   * duty cycle = ccr / reload (fractional value)
+   */
+
+  ccr = b16toi(duty * reload + b16HALF);
+
+  pwminfo("ccr: %u\n", ccr);
+
+  switch (channel)
+    {
+      case 1:  /* Register offset for Channel 1 */
+        ccr_offset = STM32L4_GTIM_CCR1_OFFSET;
+        break;
+
+      case 2:  /* Register offset for Channel 2 */
+        ccr_offset = STM32L4_GTIM_CCR2_OFFSET;
+        break;
+
+      case 3:  /* Register offset for Channel 3 */
+        ccr_offset = STM32L4_GTIM_CCR3_OFFSET;
+        break;
+
+      case 4:  /* Register offset for Channel 4 */
+        ccr_offset = STM32L4_GTIM_CCR4_OFFSET;
+        break;
+
+      default:
+        pwmerr("ERROR: No such channel: %u\n", channel);
+        return -EINVAL;
+    }
+
+  /* Set the duty cycle by writing to the CCR register for this channel */
+
+  stm32l4pwm_putreg(priv, ccr_offset, (uint16_t)ccr);
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4pwm_interrupt
+ *
+ * Description:
+ *   Handle timer interrupts.
+ *
+ * Input parameters:
+ *   priv - A reference to the lower half PWM driver state structure
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_PWM_PULSECOUNT) && (defined(CONFIG_STM32L4_TIM1_PWM) || defined(CONFIG_STM32L4_TIM8_PWM))
+static int stm32l4pwm_interrupt(struct stm32l4_pwmtimer_s *priv)
+{
+  uint16_t regval;
+
+  /* Verify that this is an update interrupt.  Nothing else is expected. */
+
+  regval = stm32l4pwm_getreg(priv, STM32L4_ATIM_SR_OFFSET);
+  DEBUGASSERT((regval & ATIM_SR_UIF) != 0);
+
+  /* Clear the UIF interrupt bit */
+
+  stm32l4pwm_putreg(priv, STM32L4_ATIM_SR_OFFSET, regval & ~ATIM_SR_UIF);
+
+  /* Calculate the new count by subtracting the number of pulses
+   * since the last interrupt.
+   */
+
+  if (priv->count <= priv->prev)
+    {
+      /* We are finished.  Turn off the mast output to stop the output as
+       * quickly as possible.
+       */
+
+      regval  = stm32l4pwm_getreg(priv, STM32L4_ATIM_BDTR_OFFSET);
+      regval &= ~ATIM_BDTR_MOE;
+      stm32l4pwm_putreg(priv, STM32L4_ATIM_BDTR_OFFSET, regval);
+
+      /* Disable first interrtups, stop and reset the timer */
+
+      (void)stm32l4pwm_stop((FAR struct pwm_lowerhalf_s *)priv);
+
+      /* Then perform the callback into the upper half driver */
+
+      pwm_expired(priv->handle);
+
+      priv->handle = NULL;
+      priv->count  = 0;
+      priv->prev   = 0;
+      priv->curr   = 0;
+    }
+  else
+    {
+      /* Decrement the count of pulses remaining using the number of
+       * pulses generated since the last interrupt.
+       */
+
+      priv->count -= priv->prev;
+
+      /* Set up the next RCR.  Set 'prev' to the value of the RCR that
+       * was loaded when the update occurred (just before this interrupt)
+       * and set 'curr' to the current value of the RCR register (which
+       * will bet loaded on the next update event).
+       */
+
+      priv->prev = priv->curr;
+      priv->curr = stm32l4pwm_pulsecount(priv->count - priv->prev);
+      stm32l4pwm_putreg(priv, STM32L4_ATIM_RCR_OFFSET, (uint16_t)priv->curr - 1);
+    }
+
+  /* Now all of the time critical stuff is done so we can do some debug output */
+
+  pwminfo("Update interrupt SR: %04x prev: %u curr: %u count: %u\n",
+          regval, priv->prev, priv->curr, priv->count);
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: pwm_tim1/8interrupt
+ *
+ * Description:
+ *   Handle timer 1 and 8 interrupts.
+ *
+ * Input parameters:
+ *   Standard NuttX interrupt inputs
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_STM32L4_TIM1_PWM)
+static int stm32l4pwm_tim1interrupt(int irq, void *context, FAR void *arg)
+{
+  return stm32l4pwm_interrupt(&g_pwm1dev);
+}
+#endif
+
+#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_STM32L4_TIM8_PWM)
+static int stm32l4pwm_tim8interrupt(int irq, void *context, FAR void *arg)
+{
+  return stm32l4pwm_interrupt(&g_pwm8dev);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4pwm_pulsecount
+ *
+ * Description:
+ *   Pick an optimal pulse count to program the RCR.
+ *
+ * Input parameters:
+ *   count - The total count remaining
+ *
+ * Returned Value:
+ *   The recommended pulse count
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_PWM_PULSECOUNT) && (defined(CONFIG_STM32L4_TIM1_PWM) || defined(CONFIG_STM32L4_TIM8_PWM))
+static uint8_t stm32l4pwm_pulsecount(uint32_t count)
+{
+  /* The the remaining pulse count is less than or equal to the maximum, the
+   * just return the count.
+   */
+
+  if (count <= ATIM_RCR_REP_MAX)
+    {
+      return count;
+    }
+
+  /* Otherwise, we have to be careful.  We do not want a small number of
+   * counts at the end because we might have trouble responding fast enough.
+   * If the remaining count is less than 150% of the maximum, then return
+   * half of the maximum.  In this case the final sequence will be between 64
+   * and 128.
+   */
+
+  else if (count < (3 * ATIM_RCR_REP_MAX / 2))
+    {
+      return (ATIM_RCR_REP_MAX + 1) >> 1;
+    }
+
+  /* Otherwise, return the maximum.  The final count will be 64 or more */
+
+  else
+    {
+      return ATIM_RCR_REP_MAX;
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4pwm_setapbclock
+ *
+ * Description:
+ *   Enable or disable APB clock for the timer peripheral
+ *
+ * Input parameters:
+ *   dev - A reference to the lower half PWM driver state structure
+ *   on  - Enable clock if 'on' is 'true' and disable if 'false'
+ *
+ ****************************************************************************/
+
+static void stm32l4pwm_setapbclock(FAR struct stm32l4_pwmtimer_s *priv, bool on)
+{
+  uint32_t en_bit;
+  uint32_t regaddr;
+
+  /* Determine which timer to configure */
+
+  switch (priv->timid)
+    {
+#ifdef CONFIG_STM32L4_TIM1_PWM
+      case 1:
+        regaddr  = STM32L4_RCC_APB2ENR;
+        en_bit   = RCC_APB2ENR_TIM1EN;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM2_PWM
+      case 2:
+        regaddr  = STM32L4_RCC_APB1ENR;
+        en_bit   = RCC_APB1ENR_TIM2EN;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM3_PWM
+      case 3:
+        regaddr  = STM32L4_RCC_APB1ENR;
+        en_bit   = RCC_APB1ENR_TIM3EN;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM4_PWM
+      case 4:
+        regaddr  = STM32L4_RCC_APB1ENR;
+        en_bit   = RCC_APB1ENR_TIM4EN;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM5_PWM
+      case 5:
+        regaddr  = STM32L4_RCC_APB1ENR;
+        en_bit   = RCC_APB1ENR_TIM5EN;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM8_PWM
+      case 8:
+        regaddr  = STM32L4_RCC_APB2ENR;
+        en_bit   = RCC_APB2ENR_TIM8EN;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM15_PWM
+      case 15:
+        regaddr  = STM32L4_RCC_APB2ENR;
+        en_bit   = RCC_APB2ENR_TIM15EN;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM16_PWM
+      case 16:
+        regaddr  = STM32L4_RCC_APB2ENR;
+        en_bit   = RCC_APB2ENR_TIM16EN;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM17_PWM
+      case 17:
+        regaddr  = STM32L4_RCC_APB2ENR;
+        en_bit   = RCC_APB2ENR_TIM17EN;
+        break;
+#endif
+      default:
+        return;
+    }
+
+  /* Enable/disable APB 1/2 clock for timer */
+
+  if (on)
+    {
+      modifyreg32(regaddr, 0, en_bit);
+    }
+  else
+    {
+      modifyreg32(regaddr, en_bit, 0);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32l4pwm_setup
+ *
+ * Description:
+ *   This method is called when the driver is opened.  The lower half driver
+ *   should configure and initialize the device so that it is ready for use.
+ *   It should not, however, output pulses until the start method is called.
+ *
+ * Input parameters:
+ *   dev - A reference to the lower half PWM driver state structure
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ * Assumptions:
+ *   APB1 or 2 clocking for the GPIOs has already been configured by the RCC
+ *   logic at power up.
+ *
+ ****************************************************************************/
+
+static int stm32l4pwm_setup(FAR struct pwm_lowerhalf_s *dev)
+{
+  FAR struct stm32l4_pwmtimer_s *priv = (FAR struct stm32l4_pwmtimer_s *)dev;
+  uint32_t pincfg;
+  int i;
+
+  pwminfo("TIM%u\n", priv->timid);
+  stm32l4pwm_dumpregs(priv, "Initially");
+
+  /* Enable APB1/2 clocking for timer. */
+
+  stm32l4pwm_setapbclock(priv, true);
+
+  /* Configure the PWM output pins, but do not start the timer yet */
+
+  for (i = 0; i < PWM_NCHANNELS; i++)
+    {
+      pincfg = priv->channels[i].pincfg;
+      if (pincfg != 0)
+        {
+          pwminfo("pincfg: %08x\n", pincfg);
+
+          stm32l4_configgpio(pincfg);
+        }
+
+
+      /* Enable complementary channel if available */
+
+      pincfg = priv->channels[i].npincfg;
+      if (pincfg != 0)
+        {
+          pwminfo("npincfg: %08x\n", pincfg);
+
+          stm32l4_configgpio(pincfg);
+        }
+
+      pwm_dumpgpio(pincfg, "PWM setup");
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4pwm_shutdown
+ *
+ * Description:
+ *   This method is called when the driver is closed.  The lower half driver
+ *   stop pulsed output, free any resources, disable the timer hardware, and
+ *   put the system into the lowest possible power usage state
+ *
+ * Input parameters:
+ *   dev - A reference to the lower half PWM driver state structure
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int stm32l4pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
+{
+  FAR struct stm32l4_pwmtimer_s *priv = (FAR struct stm32l4_pwmtimer_s *)dev;
+  uint32_t pincfg;
+  int i;
+
+  pwminfo("TIM%u\n", priv->timid);
+
+  /* Make sure that the output has been stopped */
+
+  stm32l4pwm_stop(dev);
+
+  /* Disable APB1/2 clocking for timer. */
+
+  stm32l4pwm_setapbclock(priv, false);
+
+  /* Then put the GPIO pins back to the default state */
+
+  for (i = 0; i < PWM_NCHANNELS; i++)
+    {
+      pincfg = priv->channels[i].pincfg;
+      if (pincfg != 0)
+        {
+          pwminfo("pincfg: %08x\n", pincfg);
+
+          pincfg &= (GPIO_PORT_MASK | GPIO_PIN_MASK);
+          pincfg |= GPIO_INPUT | GPIO_FLOAT;
+
+          stm32l4_configgpio(pincfg);
+        }
+
+      pincfg = priv->channels[i].npincfg;
+      if (pincfg != 0)
+        {
+          pwminfo("npincfg: %08x\n", pincfg);
+
+          pincfg &= (GPIO_PORT_MASK | GPIO_PIN_MASK);
+          pincfg |= GPIO_INPUT | GPIO_FLOAT;
+
+          stm32l4_configgpio(pincfg);
+        }
+
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4pwm_start
+ *
+ * Description:
+ *   (Re-)initialize the timer resources and start the pulsed output
+ *
+ * Input parameters:
+ *   dev - A reference to the lower half PWM driver state structure
+ *   info - A reference to the characteristics of the pulsed output
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_PWM_PULSECOUNT
+static int stm32l4pwm_start(FAR struct pwm_lowerhalf_s *dev,
+                     FAR const struct pwm_info_s *info,
+                     FAR void *handle)
+{
+  FAR struct stm32l4_pwmtimer_s *priv = (FAR struct stm32l4_pwmtimer_s *)dev;
+
+  /* Check if a pulsecount has been selected */
+
+  if (info->count > 0)
+    {
+      /* Only the advanced timers (TIM1,8 can support the pulse counting) */
+
+      if (priv->timtype != TIMTYPE_ADVANCED)
+        {
+          pwmerr("ERROR: TIM%u cannot support pulse count: %u\n",
+                 priv->timid, info->count);
+          return -EPERM;
+        }
+    }
+
+  /* Save the handle */
+
+  priv->handle = handle;
+
+  /* Start the time */
+
+  return stm32l4pwm_timer(priv, info);
+}
+#else
+static int stm32l4pwm_start(FAR struct pwm_lowerhalf_s *dev,
+                     FAR const struct pwm_info_s *info)
+{
+  int ret = OK;
+  FAR struct stm32l4_pwmtimer_s *priv = (FAR struct stm32l4_pwmtimer_s *)dev;
+
+#ifndef CONFIG_PWM_PULSECOUNT
+  /* if frequency has not changed we just update duty */
+
+  if (info->frequency == priv->frequency)
+    {
+#ifdef CONFIG_PWM_MULTICHAN
+      int i;
+
+      for (i = 0; ret == OK && i < CONFIG_PWM_NCHANNELS; i++)
+        {
+          ret = stm32l4pwm_update_duty(priv,info->channels[i].channel,
+                                info->channels[i].duty);
+        }
+#else
+      ret = stm32l4pwm_update_duty(priv,priv->channels[0].channel,info->duty);
+#endif
+    }
+  else
+#endif
+    {
+      ret = stm32l4pwm_timer(priv, info);
+
+#ifndef CONFIG_PWM_PULSECOUNT
+      /* Save current frequency */
+
+      if (ret == OK)
+        {
+          priv->frequency = info->frequency;
+        }
+#endif
+    }
+
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32l4pwm_stop
+ *
+ * Description:
+ *   Stop the pulsed output and reset the timer resources
+ *
+ * Input parameters:
+ *   dev - A reference to the lower half PWM driver state structure
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ * Assumptions:
+ *   This function is called to stop the pulsed output at anytime.  This
+ *   method is also called from the timer interrupt handler when a repetition
+ *   count expires... automatically stopping the timer.
+ *
+ ****************************************************************************/
+
+static int stm32l4pwm_stop(FAR struct pwm_lowerhalf_s *dev)
+{
+  FAR struct stm32l4_pwmtimer_s *priv = (FAR struct stm32l4_pwmtimer_s *)dev;
+  uint32_t resetbit;
+  uint32_t regaddr;
+  uint32_t regval;
+  irqstate_t flags;
+
+  pwminfo("TIM%u\n", priv->timid);
+
+  /* Disable interrupts momentary to stop any ongoing timer processing and
+   * to prevent any concurrent access to the reset register.
+   */
+
+  flags = enter_critical_section();
+
+  /* Stopped so frequency is zero */
+
+  priv->frequency = 0;
+
+  /* Disable further interrupts and stop the timer */
+
+  stm32l4pwm_putreg(priv, STM32L4_GTIM_DIER_OFFSET, 0);
+  stm32l4pwm_putreg(priv, STM32L4_GTIM_SR_OFFSET, 0);
+
+  /* Determine which timer to reset */
+
+  switch (priv->timid)
+    {
+#ifdef CONFIG_STM32L4_TIM1_PWM
+      case 1:
+        regaddr  = STM32L4_RCC_APB2RSTR;
+        resetbit = RCC_APB2RSTR_TIM1RST;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM2_PWM
+      case 2:
+        regaddr  = STM32L4_RCC_APB1RSTR;
+        resetbit = RCC_APB1RSTR_TIM2RST;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM3_PWM
+      case 3:
+        regaddr  = STM32L4_RCC_APB1RSTR;
+        resetbit = RCC_APB1RSTR_TIM3RST;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM4_PWM
+      case 4:
+        regaddr  = STM32L4_RCC_APB1RSTR;
+        resetbit = RCC_APB1RSTR_TIM4RST;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM5_PWM
+      case 5:
+        regaddr  = STM32L4_RCC_APB1RSTR;
+        resetbit = RCC_APB1RSTR_TIM5RST;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM8_PWM
+      case 8:
+        regaddr  = STM32L4_RCC_APB2RSTR;
+        resetbit = RCC_APB2RSTR_TIM8RST;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM16_PWM
+      case 16:
+        regaddr  = STM32L4_RCC_APB2RSTR;
+        resetbit = RCC_APB2RSTR_TIM16RST;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM17_PWM
+      case 17:
+        regaddr  = STM32L4_RCC_APB2RSTR;
+        resetbit = RCC_APB2RSTR_TIM17RST;
+        break;
+#endif
+      default:
+        return -EINVAL;
+    }
+
+  /* Reset the timer - stopping the output and putting the timer back
+   * into a state where stm32l4pwm_start() can be called.
+   */
+
+  regval  = getreg32(regaddr);
+  regval |= resetbit;
+  putreg32(regval, regaddr);
+
+  regval &= ~resetbit;
+  putreg32(regval, regaddr);
+  leave_critical_section(flags);
+
+  pwminfo("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
+  stm32l4pwm_dumpregs(priv, "After stop");
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4pwm_ioctl
+ *
+ * Description:
+ *   Lower-half logic may support platform-specific ioctl commands
+ *
+ * Input parameters:
+ *   dev - A reference to the lower half PWM driver state structure
+ *   cmd - The ioctl command
+ *   arg - The argument accompanying the ioctl command
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int stm32l4pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, 
+                            unsigned long arg)
+{
+#ifdef CONFIG_DEBUG_PWM_INFO
+  FAR struct stm32l4_pwmtimer_s *priv = (FAR struct stm32l4_pwmtimer_s *)dev;
+
+  /* There are no platform-specific ioctl commands */
+
+  pwminfo("TIM%u\n", priv->timid);
+#endif
+  return -ENOTTY;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_pwminitialize
+ *
+ * Description:
+ *   Initialize one timer for use with the upper_level PWM driver.
+ *
+ * Input Parameters:
+ *   timer - A number identifying the timer use.  The number of valid timer
+ *     IDs varies with the STM32 MCU and MCU family but is somewhere in
+ *     the range of {1,..,17}.
+ *
+ * Returned Value:
+ *   On success, a pointer to the STM32 lower half PWM driver is returned.
+ *   NULL is returned on any failure.
+ *
+ ****************************************************************************/
+
+FAR struct pwm_lowerhalf_s *stm32l4_pwminitialize(int timer)
+{
+  FAR struct stm32l4_pwmtimer_s *lower;
+
+  pwminfo("TIM%u\n", timer);
+
+  switch (timer)
+    {
+#ifdef CONFIG_STM32L4_TIM1_PWM
+      case 1:
+        lower = &g_pwm1dev;
+
+        /* Attach but disable the TIM1 update interrupt */
+
+#ifdef CONFIG_PWM_PULSECOUNT
+        irq_attach(lower->irq, stm32l4pwm_tim1interrupt, NULL);
+        up_disable_irq(lower->irq);
+#endif
+        break;
+#endif
+
+#ifdef CONFIG_STM32L4_TIM2_PWM
+      case 2:
+        lower = &g_pwm2dev;
+        break;
+#endif
+
+#ifdef CONFIG_STM32L4_TIM3_PWM
+      case 3:
+        lower = &g_pwm3dev;
+        break;
+#endif
+
+#ifdef CONFIG_STM32L4_TIM4_PWM
+      case 4:
+        lower = &g_pwm4dev;
+        break;
+#endif
+
+#ifdef CONFIG_STM32L4_TIM5_PWM
+      case 5:
+        lower = &g_pwm5dev;
+        break;
+#endif
+
+#ifdef CONFIG_STM32L4_TIM8_PWM
+      case 8:
+        lower = &g_pwm8dev;
+
+        /* Attach but disable the TIM8 update interrupt */
+
+#ifdef CONFIG_PWM_PULSECOUNT
+        irq_attach(lower->irq, stm32l4pwm_tim8interrupt, NULL);
+        up_disable_irq(lower->irq);
+#endif
+        break;
+#endif
+
+#ifdef CONFIG_STM32L4_TIM15_PWM
+      case 15:
+        lower = &g_pwm15dev;
+        break;
+#endif
+
+#ifdef CONFIG_STM32L4_TIM16_PWM
+      case 16:
+        lower = &g_pwm16dev;
+        break;
+#endif
+
+#ifdef CONFIG_STM32L4_TIM17_PWM
+      case 17:
+        lower = &g_pwm17dev;
+        break;
+#endif
+
+      default:
+        pwmerr("ERROR: No such timer configured\n");
+        return NULL;
+    }
+
+  return (FAR struct pwm_lowerhalf_s *)lower;
+}
+
+#endif /* CONFIG_STM32L4_TIMn_PWM, n = 1,...,17 */
diff --git a/arch/arm/src/stm32l4/stm32l4_pwm.h b/arch/arm/src/stm32l4/stm32l4_pwm.h
new file mode 100644
index 0000000000000000000000000000000000000000..b314834520989f148ec48beb5a419c8c4cf4a13f
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_pwm.h
@@ -0,0 +1,724 @@
+/************************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_pwm.h
+ *
+ *   Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32L4_STM32L4_PWM_H
+#define __ARCH_ARM_SRC_STM32L4_STM32L4_PWM_H
+
+/* The STM32L4 does not have dedicated PWM hardware.  Rather, pulsed output control
+ * is a capability of the STM32L4 timers.  The logic in this file implements the
+ * lower half of the standard, NuttX PWM interface using the STM32L4 timers.  That
+ * interface is described in include/nuttx/drivers/pwm.h.
+ */
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Configuration ********************************************************************/
+/* Timer devices may be used for different purposes.  One special purpose is
+ * to generate modulated outputs for such things as motor control.  If CONFIG_STM32L4_TIMn
+ * is defined then the CONFIG_STM32L4_TIMn_PWM must also be defined to indicate that
+ * timer "n" is intended to be used for pulsed output signal generation.
+ */
+
+#ifndef CONFIG_STM32L4_TIM1
+#  undef CONFIG_STM32L4_TIM1_PWM
+#endif
+#ifndef CONFIG_STM32L4_TIM2
+#  undef CONFIG_STM32L4_TIM2_PWM
+#endif
+#ifndef CONFIG_STM32L4_TIM3
+#  undef CONFIG_STM32L4_TIM3_PWM
+#endif
+#ifndef CONFIG_STM32L4_TIM4
+#  undef CONFIG_STM32L4_TIM4_PWM
+#endif
+#ifndef CONFIG_STM32L4_TIM5
+#  undef CONFIG_STM32L4_TIM5_PWM
+#endif
+#ifndef CONFIG_STM32L4_TIM8
+#  undef CONFIG_STM32L4_TIM8_PWM
+#endif
+#ifndef CONFIG_STM32L4_TIM15
+#  undef CONFIG_STM32L4_TIM15_PWM
+#endif
+#ifndef CONFIG_STM32L4_TIM16
+#  undef CONFIG_STM32L4_TIM16_PWM
+#endif
+#ifndef CONFIG_STM32L4_TIM17
+#  undef CONFIG_STM32L4_TIM17_PWM
+#endif
+
+/* The basic timers (timer 6 and 7) are not capable of generating output pulses */
+
+#undef CONFIG_STM32L4_TIM6_PWM
+#undef CONFIG_STM32L4_TIM7_PWM
+
+/* Check if PWM support for any channel is enabled. */
+
+#if defined(CONFIG_STM32L4_TIM1_PWM)  || defined(CONFIG_STM32L4_TIM2_PWM)  || \
+    defined(CONFIG_STM32L4_TIM3_PWM)  || defined(CONFIG_STM32L4_TIM4_PWM)  || \
+    defined(CONFIG_STM32L4_TIM5_PWM)  || defined(CONFIG_STM32L4_TIM8_PWM)  || \
+    defined(CONFIG_STM32L4_TIM15_PWM) || defined(CONFIG_STM32L4_TIM16_PWM) || \
+    defined(CONFIG_STM32L4_TIM17_PWM)
+
+#include 
+#include "chip/stm32l4_tim.h"
+
+#ifdef CONFIG_PWM_MULTICHAN
+
+#ifdef CONFIG_STM32L4_TIM1_CHANNEL1
+#  ifdef CONFIG_STM32L4_TIM1_CH1OUT
+#    define PWM_TIM1_CH1CFG GPIO_TIM1_CH1OUT
+#  else
+#    define PWM_TIM1_CH1CFG 0
+#  endif
+#  ifdef CONFIG_STM32L4_TIM1_CH1NOUT
+#    define PWM_TIM1_CH1NCFG GPIO_TIM1_CH1NOUT
+#  else
+#    define PWM_TIM1_CH1NCFG 0
+#  endif
+#  define PWM_TIM1_CHANNEL1 1
+#else
+#  define PWM_TIM1_CHANNEL1 0
+#endif
+#ifdef CONFIG_STM32L4_TIM1_CHANNEL2
+#  ifdef CONFIG_STM32L4_TIM1_CH2OUT
+#    define PWM_TIM1_CH2CFG GPIO_TIM1_CH2OUT
+#  else
+#    define PWM_TIM1_CH2CFG 0
+#  endif
+#  ifdef CONFIG_STM32L4_TIM1_CH2NOUT
+#    define PWM_TIM1_CH2NCFG GPIO_TIM1_CH2NOUT
+#  else
+#    define PWM_TIM1_CH2NCFG 0
+#  endif
+#  define PWM_TIM1_CHANNEL2 1
+#else
+#  define PWM_TIM1_CHANNEL2 0
+#endif
+#ifdef CONFIG_STM32L4_TIM1_CHANNEL3
+#  ifdef CONFIG_STM32L4_TIM1_CH3OUT
+#    define PWM_TIM1_CH3CFG GPIO_TIM1_CH3OUT
+#  else
+#    define PWM_TIM1_CH3CFG 0
+#  endif
+#  ifdef CONFIG_STM32L4_TIM1_CH3NOUT
+#    define PWM_TIM1_CH3NCFG GPIO_TIM1_CH3NOUT
+#  else
+#    define PWM_TIM1_CH3NCFG 0
+#  endif
+#  define PWM_TIM1_CHANNEL3 1
+#else
+#  define PWM_TIM1_CHANNEL3 0
+#endif
+#ifdef CONFIG_STM32L4_TIM1_CHANNEL4
+#  ifdef CONFIG_STM32L4_TIM1_CH4OUT
+#    define PWM_TIM1_CH4CFG GPIO_TIM1_CH4OUT
+#  else
+#    define PWM_TIM1_CH4CFG 0
+#  endif
+#  define PWM_TIM1_CHANNEL4 1
+#else
+#  define PWM_TIM1_CHANNEL4 0
+#endif
+#define PWM_TIM1_NCHANNELS (PWM_TIM1_CHANNEL1 + PWM_TIM1_CHANNEL2 + \
+                            PWM_TIM1_CHANNEL3 + PWM_TIM1_CHANNEL4)
+
+#ifdef CONFIG_STM32L4_TIM2_CHANNEL1
+#  ifdef CONFIG_STM32L4_TIM2_CH1OUT
+#    define PWM_TIM2_CH1CFG GPIO_TIM2_CH1OUT
+#  else
+#    define PWM_TIM2_CH1CFG 0
+#  endif
+#  define PWM_TIM2_CHANNEL1 1
+#else
+#  define PWM_TIM2_CHANNEL1 0
+#endif
+#ifdef CONFIG_STM32L4_TIM2_CHANNEL2
+#  ifdef CONFIG_STM32L4_TIM2_CH2OUT
+#    define PWM_TIM2_CH2CFG GPIO_TIM2_CH2OUT
+#  else
+#    define PWM_TIM2_CH2CFG 0
+#  endif
+#  define PWM_TIM2_CHANNEL2 1
+#else
+#  define PWM_TIM2_CHANNEL2 0
+#endif
+#ifdef CONFIG_STM32L4_TIM2_CHANNEL3
+#  ifdef CONFIG_STM32L4_TIM2_CH3OUT
+#    define PWM_TIM2_CH3CFG GPIO_TIM2_CH3OUT
+#  else
+#    define PWM_TIM2_CH3CFG 0
+#  endif
+#  define PWM_TIM2_CHANNEL3 1
+#else
+#  define PWM_TIM2_CHANNEL3 0
+#endif
+#ifdef CONFIG_STM32L4_TIM2_CHANNEL4
+#  ifdef CONFIG_STM32L4_TIM2_CH4OUT
+#    define PWM_TIM2_CH4CFG GPIO_TIM2_CH4OUT
+#  else
+#    define PWM_TIM2_CH4CFG 0
+#  endif
+#  define PWM_TIM2_CHANNEL4 1
+#else
+#  define PWM_TIM2_CHANNEL4 0
+#endif
+#define PWM_TIM2_NCHANNELS (PWM_TIM2_CHANNEL1 + PWM_TIM2_CHANNEL2 + \
+                            PWM_TIM2_CHANNEL3 + PWM_TIM2_CHANNEL4)
+
+#ifdef CONFIG_STM32L4_TIM3_CHANNEL1
+#  ifdef CONFIG_STM32L4_TIM3_CH1OUT
+#    define PWM_TIM3_CH1CFG GPIO_TIM3_CH1OUT
+#  else
+#    define PWM_TIM3_CH1CFG 0
+#  endif
+#  define PWM_TIM3_CHANNEL1 1
+#else
+#  define PWM_TIM3_CHANNEL1 0
+#endif
+#ifdef CONFIG_STM32L4_TIM3_CHANNEL2
+#  ifdef CONFIG_STM32L4_TIM3_CH2OUT
+#    define PWM_TIM3_CH2CFG GPIO_TIM3_CH2OUT
+#  else
+#    define PWM_TIM3_CH2CFG 0
+#  endif
+#  define PWM_TIM3_CHANNEL2 1
+#else
+#  define PWM_TIM3_CHANNEL2 0
+#endif
+#ifdef CONFIG_STM32L4_TIM3_CHANNEL3
+#  ifdef CONFIG_STM32L4_TIM3_CH3OUT
+#    define PWM_TIM3_CH3CFG GPIO_TIM3_CH3OUT
+#  else
+#    define PWM_TIM3_CH3CFG 0
+#  endif
+#  define PWM_TIM3_CHANNEL3 1
+#else
+#  define PWM_TIM3_CHANNEL3 0
+#endif
+#ifdef CONFIG_STM32L4_TIM3_CHANNEL4
+#  ifdef CONFIG_STM32L4_TIM3_CH4OUT
+#    define PWM_TIM3_CH4CFG GPIO_TIM3_CH4OUT
+#  else
+#    define PWM_TIM3_CH4CFG 0
+#  endif
+#  define PWM_TIM3_CHANNEL4 1
+#else
+#  define PWM_TIM3_CHANNEL4 0
+#endif
+#define PWM_TIM3_NCHANNELS (PWM_TIM3_CHANNEL1 + PWM_TIM3_CHANNEL2 + \
+                            PWM_TIM3_CHANNEL3 + PWM_TIM3_CHANNEL4)
+
+#ifdef CONFIG_STM32L4_TIM4_CHANNEL1
+#  ifdef CONFIG_STM32L4_TIM4_CH1OUT
+#    define PWM_TIM4_CH1CFG GPIO_TIM4_CH1OUT
+#  else
+#    define PWM_TIM4_CH1CFG 0
+#  endif
+#  define PWM_TIM4_CHANNEL1 1
+#else
+#  define PWM_TIM4_CHANNEL1 0
+#endif
+#ifdef CONFIG_STM32L4_TIM4_CHANNEL2
+#  ifdef CONFIG_STM32L4_TIM4_CH2OUT
+#    define PWM_TIM4_CH2CFG GPIO_TIM4_CH2OUT
+#  else
+#    define PWM_TIM4_CH2CFG 0
+#  endif
+#  define PWM_TIM4_CHANNEL2 1
+#else
+#  define PWM_TIM4_CHANNEL2 0
+#endif
+#ifdef CONFIG_STM32L4_TIM4_CHANNEL3
+#  ifdef CONFIG_STM32L4_TIM4_CH3OUT
+#    define PWM_TIM4_CH3CFG GPIO_TIM4_CH3OUT
+#  else
+#    define PWM_TIM4_CH3CFG 0
+#  endif
+#  define PWM_TIM4_CHANNEL3 1
+#else
+#  define PWM_TIM4_CHANNEL3 0
+#endif
+#ifdef CONFIG_STM32L4_TIM4_CHANNEL4
+#  ifdef CONFIG_STM32L4_TIM4_CH4OUT
+#    define PWM_TIM4_CH4CFG GPIO_TIM4_CH4OUT
+#  else
+#    define PWM_TIM4_CH4CFG 0
+#  endif
+#  define PWM_TIM4_CHANNEL4 1
+#else
+#  define PWM_TIM4_CHANNEL4 0
+#endif
+#define PWM_TIM4_NCHANNELS (PWM_TIM4_CHANNEL1 + PWM_TIM4_CHANNEL2 + \
+                            PWM_TIM4_CHANNEL3 + PWM_TIM4_CHANNEL4)
+
+#ifdef CONFIG_STM32L4_TIM5_CHANNEL1
+#  ifdef CONFIG_STM32L4_TIM5_CH1OUT
+#    define PWM_TIM5_CH1CFG GPIO_TIM5_CH1OUT
+#  else
+#    define PWM_TIM5_CH1CFG 0
+#  endif
+#  define PWM_TIM5_CHANNEL1 1
+#else
+#  define PWM_TIM5_CHANNEL1 0
+#endif
+#ifdef CONFIG_STM32L4_TIM5_CHANNEL2
+#  ifdef CONFIG_STM32L4_TIM5_CH2OUT
+#    define PWM_TIM5_CH2CFG GPIO_TIM5_CH2OUT
+#  else
+#    define PWM_TIM5_CH2CFG 0
+#  endif
+#  define PWM_TIM5_CHANNEL2 1
+#else
+#  define PWM_TIM5_CHANNEL2 0
+#endif
+#ifdef CONFIG_STM32L4_TIM5_CHANNEL3
+#  ifdef CONFIG_STM32L4_TIM5_CH3OUT
+#    define PWM_TIM5_CH3CFG GPIO_TIM5_CH3OUT
+#  else
+#    define PWM_TIM5_CH3CFG 0
+#  endif
+#  define PWM_TIM5_CHANNEL3 1
+#else
+#  define PWM_TIM5_CHANNEL3 0
+#endif
+#ifdef CONFIG_STM32L4_TIM5_CHANNEL4
+#  ifdef CONFIG_STM32L4_TIM5_CH4OUT
+#    define PWM_TIM5_CH4CFG GPIO_TIM5_CH4OUT
+#  else
+#    define PWM_TIM5_CH4CFG 0
+#  endif
+#  define PWM_TIM5_CHANNEL4 1
+#else
+#  define PWM_TIM5_CHANNEL4 0
+#endif
+#define PWM_TIM5_NCHANNELS (PWM_TIM5_CHANNEL1 + PWM_TIM5_CHANNEL2 + \
+                            PWM_TIM5_CHANNEL3 + PWM_TIM5_CHANNEL4)
+
+#ifdef CONFIG_STM32L4_TIM8_CHANNEL1
+#  ifdef CONFIG_STM32L4_TIM8_CH1OUT
+#    define PWM_TIM8_CH1CFG GPIO_TIM8_CH1OUT
+#  else
+#    define PWM_TIM8_CH1CFG 0
+#  endif
+#  ifdef CONFIG_STM32L4_TIM8_CH1OUT
+#    define PWM_TIM8_CH1NCFG GPIO_TIM8_CH1NOUT
+#  else
+#    define PWM_TIM8_CH1NCFG 0
+#  endif
+#  define PWM_TIM8_CHANNEL1 1
+#else
+#  define PWM_TIM8_CHANNEL1 0
+#endif
+#ifdef CONFIG_STM32L4_TIM8_CHANNEL2
+#  ifdef CONFIG_STM32L4_TIM8_CH2OUT
+#    define PWM_TIM8_CH2CFG GPIO_TIM8_CH2OUT
+#  else
+#    define PWM_TIM8_CH2CFG 0
+#  endif
+#  ifdef CONFIG_STM32L4_TIM8_CH2NOUT
+#    define PWM_TIM8_CH2NCFG GPIO_TIM8_CH2NOUT
+#  else
+#    define PWM_TIM8_CH2NCFG 0
+#  endif
+#  define PWM_TIM8_CHANNEL2 1
+#else
+#  define PWM_TIM8_CHANNEL2 0
+#endif
+#ifdef CONFIG_STM32L4_TIM8_CHANNEL3
+#  ifdef CONFIG_STM32L4_TIM8_CH3OUT
+#    define PWM_TIM8_CH3CFG GPIO_TIM8_CH3OUT
+#  else
+#    define PWM_TIM8_CH3CFG 0
+#  endif
+#  ifdef CONFIG_STM32L4_TIM8_CH3NOUT
+#    define PWM_TIM8_CH3NCFG GPIO_TIM8_CH3NOUT
+#  else
+#    define PWM_TIM8_CH3NCFG 0
+#  endif
+#  define PWM_TIM8_CHANNEL3 1
+#else
+#  define PWM_TIM8_CHANNEL3 0
+#endif
+#ifdef CONFIG_STM32L4_TIM8_CHANNEL4
+#  ifdef CONFIG_STM32L4_TIM8_CH4OUT
+#    define PWM_TIM8_CH4CFG GPIO_TIM8_CH4OUT
+#  else
+#    define PWM_TIM8_CH4CFG 0
+#  endif
+#  define PWM_TIM8_CHANNEL4 1
+#else
+#  define PWM_TIM8_CHANNEL4 0
+#endif
+#define PWM_TIM8_NCHANNELS (PWM_TIM8_CHANNEL1 + PWM_TIM8_CHANNEL2 + \
+                            PWM_TIM8_CHANNEL3 + PWM_TIM8_CHANNEL4)
+
+#ifdef CONFIG_STM32L4_TIM15_CHANNEL1
+#  ifdef CONFIG_STM32L4_TIM15_CH1OUT
+#    define PWM_TIM15_CH1CFG GPIO_TIM15_CH1OUT
+#  else
+#    define PWM_TIM15_CH1CFG 0
+#  endif
+#  ifdef CONFIG_STM32L4_TIM15_CH1NOUT
+#    define PWM_TIM15_CH1NCFG GPIO_TIM15_CH1NOUT
+#  else
+#    define PWM_TIM15_CH1NCFG 0
+#  endif
+#  define PWM_TIM15_CHANNEL1 1
+#else
+#  define PWM_TIM15_CHANNEL1 0
+#endif
+#ifdef CONFIG_STM32L4_TIM15_CHANNEL2
+#  ifdef CONFIG_STM32L4_TIM15_CH2OUT
+#    define PWM_TIM15_CH2CFG GPIO_TIM15_CH2OUT
+#  else
+#    define PWM_TIM15_CH2CFG 0
+#  endif
+#  define PWM_TIM15_CHANNEL2 1
+#else
+#  define PWM_TIM15_CHANNEL2 0
+#endif
+#define PWM_TIM15_NCHANNELS (PWM_TIM15_CHANNEL1 + PWM_TIM15_CHANNEL2)
+
+#ifdef CONFIG_STM32L4_TIM16_CHANNEL1
+#  ifdef CONFIG_STM32L4_TIM16_CH1OUT
+#    define PWM_TIM16_CH1CFG GPIO_TIM16_CH1OUT
+#  else
+#    define PWM_TIM16_CH1CFG 0
+#  endif
+#  ifdef CONFIG_STM32L4_TIM16_CH1NOUT
+#    define PWM_TIM16_CH1NCFG GPIO_TIM16_CH1NOUT
+#  else
+#    define PWM_TIM16_CH1NCFG 0
+#  endif
+#  define PWM_TIM16_CHANNEL1 1
+#else
+#  define PWM_TIM16_CHANNEL1 0
+#endif
+#define PWM_TIM16_NCHANNELS PWM_TIM16_CHANNEL1
+
+#ifdef CONFIG_STM32L4_TIM17_CHANNEL1
+#  ifdef CONFIG_STM32L4_TIM17_CH1OUT
+#    define PWM_TIM17_CH1CFG GPIO_TIM17_CH1OUT
+#  else
+#    define PWM_TIM17_CH1CFG 0
+#  endif
+#  ifdef CONFIG_STM32L4_TIM17_CH1NOUT
+#    define PWM_TIM17_CH1NCFG GPIO_TIM17_CH1NOUT
+#  else
+#    define PWM_TIM17_CH1NCFG 0
+#  endif
+#  define PWM_TIM17_CHANNEL1 1
+#else
+#  define PWM_TIM17_CHANNEL1 0
+#endif
+#define PWM_TIM17_NCHANNELS PWM_TIM17_CHANNEL1
+
+#define PWM_MAX(a, b) ((a) > (b) ? (a) : (b))
+
+#define PWM_NCHANNELS PWM_MAX(PWM_TIM1_NCHANNELS, \
+                      PWM_MAX(PWM_TIM2_NCHANNELS, \
+                      PWM_MAX(PWM_TIM3_NCHANNELS, \
+                      PWM_MAX(PWM_TIM4_NCHANNELS, \
+                      PWM_MAX(PWM_TIM5_NCHANNELS, \
+                      PWM_MAX(PWM_TIM8_NCHANNELS, \
+                      PWM_MAX(PWM_TIM15_NCHANNELS, \
+                      PWM_MAX(PWM_TIM16_NCHANNELS, \
+                              PWM_TIM17_NCHANNELS))))))))
+
+#else
+
+/* For each timer that is enabled for PWM usage, we need the following additional
+ * configuration settings:
+ *
+ * CONFIG_STM32L4_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
+ * PWM_TIMx_CHn - One of the values defined in chip/stm32*_pinmap.h.  In the case
+ *   where there are multiple pin selections, the correct setting must be provided
+ *   in the arch/board/board.h file.
+ *
+ * NOTE: The STM32L4 timers are each capable of generating different signals on
+ * each of the four channels with different duty cycles.  That capability is
+ * not supported by this driver:  Only one output channel per timer.
+ */
+
+#ifdef CONFIG_STM32L4_TIM1_PWM
+#  if !defined(CONFIG_STM32L4_TIM1_CHANNEL)
+#    error "CONFIG_STM32L4_TIM1_CHANNEL must be provided"
+#  elif CONFIG_STM32L4_TIM1_CHANNEL == 1
+#    define CONFIG_STM32L4_TIM1_CHANNEL1 1
+#    define CONFIG_STM32L4_TIM1_CH1MODE  CONFIG_STM32L4_TIM1_CHMODE
+#    define PWM_TIM1_CH1CFG            GPIO_TIM1_CH1OUT
+#  elif CONFIG_STM32L4_TIM1_CHANNEL == 2
+#    define CONFIG_STM32L4_TIM1_CHANNEL2 1
+#    define CONFIG_STM32L4_TIM1_CH2MODE  CONFIG_STM32L4_TIM1_CHMODE
+#    define PWM_TIM1_CH2CFG            GPIO_TIM1_CH2OUT
+#  elif CONFIG_STM32L4_TIM1_CHANNEL == 3
+#    define CONFIG_STM32L4_TIM1_CHANNEL3 1
+#    define CONFIG_STM32L4_TIM1_CH3MODE  CONFIG_STM32L4_TIM1_CHMODE
+#    define PWM_TIM1_CH3CFG            GPIO_TIM1_CH3OUT
+#  elif CONFIG_STM32L4_TIM1_CHANNEL == 4
+#    define CONFIG_STM32L4_TIM1_CHANNEL4 1
+#    define CONFIG_STM32L4_TIM1_CH4MODE  CONFIG_STM32L4_TIM1_CHMODE
+#    define PWM_TIM1_CH4CFG            GPIO_TIM1_CH4OUT
+#  else
+#    error "Unsupported value of CONFIG_STM32L4_TIM1_CHANNEL"
+#  endif
+#endif
+
+#ifdef CONFIG_STM32L4_TIM2_PWM
+#  if !defined(CONFIG_STM32L4_TIM2_CHANNEL)
+#    error "CONFIG_STM32L4_TIM2_CHANNEL must be provided"
+#  elif CONFIG_STM32L4_TIM2_CHANNEL == 1
+#    define CONFIG_STM32L4_TIM2_CHANNEL1 1
+#    define CONFIG_STM32L4_TIM2_CH1MODE  CONFIG_STM32L4_TIM2_CHMODE
+#    define PWM_TIM2_CH1CFG            GPIO_TIM2_CH1OUT
+#  elif CONFIG_STM32L4_TIM2_CHANNEL == 2
+#    define CONFIG_STM32L4_TIM2_CHANNEL2 1
+#    define CONFIG_STM32L4_TIM2_CH2MODE  CONFIG_STM32L4_TIM2_CHMODE
+#    define PWM_TIM2_CH2CFG            GPIO_TIM2_CH2OUT
+#  elif CONFIG_STM32L4_TIM2_CHANNEL == 3
+#    define CONFIG_STM32L4_TIM2_CHANNEL3 1
+#    define CONFIG_STM32L4_TIM2_CH3MODE  CONFIG_STM32L4_TIM2_CHMODE
+#    define PWM_TIM2_CH3CFG            GPIO_TIM2_CH3OUT
+#  elif CONFIG_STM32L4_TIM2_CHANNEL == 4
+#    define CONFIG_STM32L4_TIM2_CHANNEL4 1
+#    define CONFIG_STM32L4_TIM2_CH4MODE  CONFIG_STM32L4_TIM2_CHMODE
+#    define PWM_TIM2_CH4CFG            GPIO_TIM2_CH4OUT
+#  else
+#    error "Unsupported value of CONFIG_STM32L4_TIM2_CHANNEL"
+#  endif
+#endif
+
+#ifdef CONFIG_STM32L4_TIM3_PWM
+#  if !defined(CONFIG_STM32L4_TIM3_CHANNEL)
+#    error "CONFIG_STM32L4_TIM3_CHANNEL must be provided"
+#  elif CONFIG_STM32L4_TIM3_CHANNEL == 1
+#    define CONFIG_STM32L4_TIM3_CHANNEL1 1
+#    define CONFIG_STM32L4_TIM3_CH1MODE  CONFIG_STM32L4_TIM3_CHMODE
+#    define PWM_TIM3_CH1CFG            GPIO_TIM3_CH1OUT
+#  elif CONFIG_STM32L4_TIM3_CHANNEL == 2
+#    define CONFIG_STM32L4_TIM3_CHANNEL2 1
+#    define CONFIG_STM32L4_TIM3_CH2MODE  CONFIG_STM32L4_TIM3_CHMODE
+#    define PWM_TIM3_CH2CFG            GPIO_TIM3_CH2OUT
+#  elif CONFIG_STM32L4_TIM3_CHANNEL == 3
+#    define CONFIG_STM32L4_TIM3_CHANNEL3 1
+#    define CONFIG_STM32L4_TIM3_CH3MODE  CONFIG_STM32L4_TIM3_CHMODE
+#    define PWM_TIM3_CH3CFG            GPIO_TIM3_CH3OUT
+#  elif CONFIG_STM32L4_TIM3_CHANNEL == 4
+#    define CONFIG_STM32L4_TIM3_CHANNEL4 1
+#    define CONFIG_STM32L4_TIM3_CH4MODE  CONFIG_STM32L4_TIM3_CHMODE
+#    define PWM_TIM3_CH4CFG            GPIO_TIM3_CH4OUT
+#  else
+#    error "Unsupported value of CONFIG_STM32L4_TIM3_CHANNEL"
+#  endif
+#endif
+
+#ifdef CONFIG_STM32L4_TIM4_PWM
+#  if !defined(CONFIG_STM32L4_TIM4_CHANNEL)
+#    error "CONFIG_STM32L4_TIM4_CHANNEL must be provided"
+#  elif CONFIG_STM32L4_TIM4_CHANNEL == 1
+#    define CONFIG_STM32L4_TIM4_CHANNEL1 1
+#    define CONFIG_STM32L4_TIM4_CH1MODE  CONFIG_STM32L4_TIM4_CHMODE
+#    define PWM_TIM4_CH1CFG            GPIO_TIM4_CH1OUT
+#  elif CONFIG_STM32L4_TIM4_CHANNEL == 2
+#    define CONFIG_STM32L4_TIM4_CHANNEL2 1
+#    define CONFIG_STM32L4_TIM4_CH2MODE  CONFIG_STM32L4_TIM4_CHMODE
+#    define PWM_TIM4_CH2CFG            GPIO_TIM4_CH2OUT
+#  elif CONFIG_STM32L4_TIM4_CHANNEL == 3
+#    define CONFIG_STM32L4_TIM4_CHANNEL3 1
+#    define CONFIG_STM32L4_TIM4_CH3MODE  CONFIG_STM32L4_TIM4_CHMODE
+#    define PWM_TIM4_CH3CFG            GPIO_TIM4_CH3OUT
+#  elif CONFIG_STM32L4_TIM4_CHANNEL == 4
+#    define CONFIG_STM32L4_TIM4_CHANNEL4 1
+#    define CONFIG_STM32L4_TIM4_CH4MODE  CONFIG_STM32L4_TIM4_CHMODE
+#    define PWM_TIM4_CH4CFG            GPIO_TIM4_CH4OUT
+#  else
+#    error "Unsupported value of CONFIG_STM32L4_TIM4_CHANNEL"
+#  endif
+#endif
+
+#ifdef CONFIG_STM32L4_TIM5_PWM
+#  if !defined(CONFIG_STM32L4_TIM5_CHANNEL)
+#    error "CONFIG_STM32L4_TIM5_CHANNEL must be provided"
+#  elif CONFIG_STM32L4_TIM5_CHANNEL == 1
+#    define CONFIG_STM32L4_TIM5_CHANNEL1 1
+#    define CONFIG_STM32L4_TIM5_CH1MODE  CONFIG_STM32L4_TIM5_CHMODE
+#    define PWM_TIM5_CH1CFG            GPIO_TIM5_CH1OUT
+#  elif CONFIG_STM32L4_TIM5_CHANNEL == 2
+#    define CONFIG_STM32L4_TIM5_CHANNEL2 1
+#    define CONFIG_STM32L4_TIM5_CH2MODE  CONFIG_STM32L4_TIM5_CHMODE
+#    define PWM_TIM5_CH2CFG            GPIO_TIM5_CH2OUT
+#  elif CONFIG_STM32L4_TIM5_CHANNEL == 3
+#    define CONFIG_STM32L4_TIM5_CHANNEL3 1
+#    define CONFIG_STM32L4_TIM5_CH3MODE  CONFIG_STM32L4_TIM5_CHMODE
+#    define PWM_TIM5_CH3CFG            GPIO_TIM5_CH3OUT
+#  elif CONFIG_STM32L4_TIM5_CHANNEL == 4
+#    define CONFIG_STM32L4_TIM5_CHANNEL4 1
+#    define CONFIG_STM32L4_TIM5_CH4MODE  CONFIG_STM32L4_TIM5_CHMODE
+#    define PWM_TIM5_CH4CFG            GPIO_TIM5_CH4OUT
+#  else
+#    error "Unsupported value of CONFIG_STM32L4_TIM5_CHANNEL"
+#  endif
+#endif
+
+#ifdef CONFIG_STM32L4_TIM8_PWM
+#  if !defined(CONFIG_STM32L4_TIM8_CHANNEL)
+#    error "CONFIG_STM32L4_TIM8_CHANNEL must be provided"
+#  elif CONFIG_STM32L4_TIM8_CHANNEL == 1
+#    define CONFIG_STM32L4_TIM8_CHANNEL1 1
+#    define CONFIG_STM32L4_TIM8_CH1MODE  CONFIG_STM32L4_TIM8_CHMODE
+#    define PWM_TIM8_CH1CFG            GPIO_TIM8_CH1OUT
+#  elif CONFIG_STM32L4_TIM8_CHANNEL == 2
+#    define CONFIG_STM32L4_TIM8_CHANNEL2 1
+#    define CONFIG_STM32L4_TIM8_CH2MODE  CONFIG_STM32L4_TIM8_CHMODE
+#    define PWM_TIM8_CH2CFG            GPIO_TIM8_CH2OUT
+#  elif CONFIG_STM32L4_TIM8_CHANNEL == 3
+#    define CONFIG_STM32L4_TIM8_CHANNEL3 1
+#    define CONFIG_STM32L4_TIM8_CH3MODE  CONFIG_STM32L4_TIM8_CHMODE
+#    define PWM_TIM8_CH3CFG            GPIO_TIM8_CH3OUT
+#  elif CONFIG_STM32L4_TIM8_CHANNEL == 4
+#    define CONFIG_STM32L4_TIM8_CHANNEL4 1
+#    define CONFIG_STM32L4_TIM8_CH4MODE  CONFIG_STM32L4_TIM8_CHMODE
+#    define PWM_TIM8_CH4CFG            GPIO_TIM8_CH4OUT
+#  else
+#    error "Unsupported value of CONFIG_STM32L4_TIM8_CHANNEL"
+#  endif
+#endif
+
+#ifdef CONFIG_STM32L4_TIM15_PWM
+#  if !defined(CONFIG_STM32L4_TIM15_CHANNEL)
+#    error "CONFIG_STM32L4_TIM15_CHANNEL must be provided"
+#  elif CONFIG_STM32L4_TIM15_CHANNEL == 1
+#    define CONFIG_STM32L4_TIM15_CHANNEL1 1
+#    define CONFIG_STM32L4_TIM15_CH1MODE  CONFIG_STM32L4_TIM15_CHMODE
+#    define PWM_TIM15_CH1CFG            GPIO_TIM15_CH1OUT
+#  elif CONFIG_STM32L4_TIM15_CHANNEL == 2
+#    define CONFIG_STM32L4_TIM15_CHANNEL2 1
+#    define CONFIG_STM32L4_TIM15_CH2MODE  CONFIG_STM32L4_TIM15_CHMODE
+#    define PWM_TIM15_CH2CFG            GPIO_TIM15_CH2OUT
+#  else
+#    error "Unsupported value of CONFIG_STM32L4_TIM15_CHANNEL"
+#  endif
+#endif
+
+#ifdef CONFIG_STM32L4_TIM16_PWM
+#  if !defined(CONFIG_STM32L4_TIM16_CHANNEL)
+#    error "CONFIG_STM32L4_TIM16_CHANNEL must be provided"
+#  elif CONFIG_STM32L4_TIM16_CHANNEL == 1
+#    define CONFIG_STM32L4_TIM16_CHANNEL1 1
+#    define CONFIG_STM32L4_TIM16_CH1MODE  CONFIG_STM32L4_TIM16_CHMODE
+#    define PWM_TIM16_CH1CFG            GPIO_TIM16_CH1OUT
+#  else
+#    error "Unsupported value of CONFIG_STM32L4_TIM16_CHANNEL"
+#  endif
+#endif
+
+#ifdef CONFIG_STM32L4_TIM17_PWM
+#  if !defined(CONFIG_STM32L4_TIM17_CHANNEL)
+#    error "CONFIG_STM32L4_TIM17_CHANNEL must be provided"
+#  elif CONFIG_STM32L4_TIM17_CHANNEL == 1
+#    define CONFIG_STM32L4_TIM17_CHANNEL1 1
+#    define CONFIG_STM32L4_TIM17_CH1MODE  CONFIG_STM32L4_TIM17_CHMODE
+#    define PWM_TIM17_CH1CFG            GPIO_TIM17_CH1OUT
+#  else
+#    error "Unsupported value of CONFIG_STM32L4_TIM17_CHANNEL"
+#  endif
+#endif
+
+#define PWM_NCHANNELS 1
+
+#endif
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32l4_pwminitialize
+ *
+ * Description:
+ *   Initialize one timer for use with the upper_level PWM driver.
+ *
+ * Input Parameters:
+ *   timer - A number identifying the timer use.  The number of valid timer
+ *     IDs varies with the STM32 MCU and MCU family but is somewhere in
+ *     the range of {1,..,17}.
+ *
+ * Returned Value:
+ *   On success, a pointer to the STM32 lower half PWM driver is returned.
+ *   NULL is returned on any failure.
+ *
+ ************************************************************************************/
+
+FAR struct pwm_lowerhalf_s *stm32l4_pwminitialize(int timer);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* CONFIG_STM32L4_TIMx_PWM */
+#endif /* __ARCH_ARM_SRC_STM32L4_STM32L4_PWM_H */
diff --git a/arch/arm/src/stm32l4/stm32l4_pwr.c b/arch/arm/src/stm32l4/stm32l4_pwr.c
index 7659f73147046ad3bcc9aee9da5f0eccb17ae96c..bc9a022fa0930ff4b7144e9b55ca170009020373 100644
--- a/arch/arm/src/stm32l4/stm32l4_pwr.c
+++ b/arch/arm/src/stm32l4/stm32l4_pwr.c
@@ -138,7 +138,7 @@ bool stm32l4_pwr_enablebkp(bool writable)
   uint16_t regval;
   bool waswritable;
 
-  /* Get the current state of the STM32 PWR control register */
+  /* Get the current state of the STM32L4 PWR control register 1 */
 
   regval      = stm32l4_pwr_getreg(STM32L4_PWR_CR1_OFFSET);
   waswritable = ((regval & PWR_CR1_DBP) != 0);
@@ -166,3 +166,49 @@ bool stm32l4_pwr_enablebkp(bool writable)
 
   return waswritable;
 }
+
+/************************************************************************************
+ * Name: stm32l4_pwr_enableusv
+ *
+ * Description:
+ *   Enables or disables the USB Supply Valid monitoring.  Setting this bit is
+ *   mandatory to use the USB OTG FS peripheral.
+ *
+ * Input Parameters:
+ *   set - True: Vddusb is valid; False: Vddusb is not present. Logical and electrical
+ *         isolation is applied to ignore this supply.
+ *
+ * Returned Value:
+ *   True: The bit was previously set.
+ *
+ ************************************************************************************/
+
+bool stm32l4_pwr_enableusv(bool set)
+{
+  uint16_t regval;
+  bool wasset;
+
+  /* Get the current state of the STM32L4 PWR control register 2 */
+
+  regval      = stm32l4_pwr_getreg(STM32L4_PWR_CR2_OFFSET);
+  wasset = ((regval & PWR_CR2_USV) != 0);
+
+  /* Enable or disable the ability to write */
+
+  if (wasset && !set)
+    {
+      /* Disable the Vddusb monitoring */
+
+      regval &= ~PWR_CR2_USV;
+      stm32l4_pwr_putreg(STM32L4_PWR_CR2_OFFSET, regval);
+    }
+  else if (!wasset && set)
+    {
+      /* Enable the Vddusb monitoring */
+
+      regval |= PWR_CR2_USV;
+      stm32l4_pwr_putreg(STM32L4_PWR_CR2_OFFSET, regval);
+    }
+
+  return wasset;
+}
diff --git a/arch/arm/src/stm32l4/stm32l4_pwr.h b/arch/arm/src/stm32l4/stm32l4_pwr.h
index 6c065f3d4429a0d91bae697ad7b1e62e2de4eff1..14891fe00a403fcfc03614008d0fa0582a93209d 100644
--- a/arch/arm/src/stm32l4/stm32l4_pwr.h
+++ b/arch/arm/src/stm32l4/stm32l4_pwr.h
@@ -101,6 +101,24 @@ bool stm32l4_pwr_enableclk(bool enable);
 
 bool stm32l4_pwr_enablebkp(bool writable);
 
+/************************************************************************************
+ * Name: stm32l4_pwr_enableusv
+ *
+ * Description:
+ *   Enables or disables the USB Supply Valid monitoring.  Setting this bit is
+ *   mandatory to use the USB OTG FS peripheral.
+ *
+ * Input Parameters:
+ *   set - True: Vddusb is valid; False: Vddusb is not present. Logical and electrical
+ *         isolation is applied to ignore this supply.
+ *
+ * Returned Value:
+ *   True: The bit was previously set.
+ *
+ ************************************************************************************/
+
+bool stm32l4_pwr_enableusv(bool set);
+
 #undef EXTERN
 #if defined(__cplusplus)
 }
diff --git a/arch/arm/src/stm32l4/stm32l4_qencoder.c b/arch/arm/src/stm32l4/stm32l4_qencoder.c
new file mode 100644
index 0000000000000000000000000000000000000000..7c65b95d5a9d58fd07c30119c124de9b57828010
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_qencoder.c
@@ -0,0 +1,1157 @@
+/************************************************************************************
+ * arch/arm/src/stm32l4/stm32;4_qencoder.c
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            Diego Sanchez 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "chip.h"
+#include "up_internal.h"
+#include "up_arch.h"
+
+#include "stm32l4.h"
+#include "stm32l4_gpio.h"
+#include "stm32l4_tim.h"
+#include "stm32l4_qencoder.h"
+
+#ifdef CONFIG_QENCODER
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Clocking *************************************************************************/
+
+/* Timers ***************************************************************************/
+
+#undef HAVE_32BIT_TIMERS
+#undef HAVE_16BIT_TIMERS
+
+/* On the L4 series, TIM2 and TIM5 are 32-bit.  All of the rest are 16-bit */
+
+/* If TIM2 or TIM5 are enabled, then we have 32-bit timers */
+
+#if defined(CONFIG_STM32L4_TIM2_QE) || defined(CONFIG_STM32L4_TIM5_QE)
+#  define HAVE_32BIT_TIMERS   1
+#endif
+
+/* If TIM1,3,4, or 8 are enabled, then we have 16-bit timers */
+
+#if defined(CONFIG_STM32L4_TIM1_QE) || defined(CONFIG_STM32L4_TIM3_QE) || \
+    defined(CONFIG_STM32L4_TIM4_QE) || defined(CONFIG_STM32L4_TIM8_QE)
+#  define HAVE_16BIT_TIMERS   1
+#endif
+
+   /* The width in bits of each timer */
+
+#define TIM1_BITWIDTH         16
+#define TIM2_BITWIDTH         32
+#define TIM3_BITWIDTH         16
+#define TIM4_BITWIDTH         16
+#define TIM5_BITWIDTH         32
+#define TIM8_BITWIDTH         16
+
+/* Do we need to support mixed 16- and 32-bit timers */
+
+#undef HAVE_MIXEDWIDTH_TIMERS
+#if defined(HAVE_16BIT_TIMERS) && defined(HAVE_32BIT_TIMERS)
+#  define HAVE_MIXEDWIDTH_TIMERS 1
+#endif
+
+/* Input filter *********************************************************************/
+
+#ifdef CONFIG_STM32L4_QENCODER_FILTER
+#  if defined(CONFIG_STM32L4_QENCODER_SAMPLE_FDTS)
+#    if defined(CONFIG_STM32L4_QENCODER_SAMPLE_EVENT_1)
+#      define STM32L4_QENCODER_ICF GTIM_CCMR_ICF_NOFILT
+#    endif
+#  elif defined(CONFIG_STM32L4_QENCODER_SAMPLE_CKINT)
+#    if defined(CONFIG_STM32L4_QENCODER_SAMPLE_EVENT_2)
+#      define STM32L4_QENCODER_ICF GTIM_CCMR_ICF_FCKINT2
+#    elif defined(CONFIG_STM32L4_QENCODER_SAMPLE_EVENT_4)
+#      define STM32L4_QENCODER_ICF GTIM_CCMR_ICF_FCKINT4
+#    elif defined(CONFIG_STM32L4_QENCODER_SAMPLE_EVENT_8)
+#      define STM32L4_QENCODER_ICF GTIM_CCMR_ICF_FCKINT8
+#    endif
+#  elif defined(CONFIG_STM32L4_QENCODER_SAMPLE_FDTS_2)
+#    if defined(CONFIG_STM32L4_QENCODER_SAMPLE_EVENT_6)
+#      define STM32L4_QENCODER_ICF GTIM_CCMR_ICF_FDTSd26
+#    elif defined(CONFIG_STM32L4_QENCODER_SAMPLE_EVENT_8)
+#      define STM32L4_QENCODER_ICF GTIM_CCMR_ICF_FDTSd28
+#    endif
+#  elif defined(CONFIG_STM32L4_QENCODER_SAMPLE_FDTS_4)
+#    if defined(CONFIG_STM32L4_QENCODER_SAMPLE_EVENT_6)
+#      define STM32L4_QENCODER_ICF GTIM_CCMR_ICF_FDTSd46
+#    elif defined(CONFIG_STM32L4_QENCODER_SAMPLE_EVENT_8)
+#      define STM32L4_QENCODER_ICF GTIM_CCMR_ICF_FDTSd48
+#    endif
+#  elif defined(CONFIG_STM32L4_QENCODER_SAMPLE_FDTS_8)
+#    if defined(CONFIG_STM32L4_QENCODER_SAMPLE_EVENT_6)
+#      define STM32L4_QENCODER_ICF GTIM_CCMR_ICF_FDTSd86
+#    elif defined(CONFIG_STM32L4_QENCODER_SAMPLE_EVENT_8)
+#      define STM32L4_QENCODER_ICF GTIM_CCMR_ICF_FDTSd88
+#    endif
+#  elif defined(CONFIG_STM32L4_QENCODER_SAMPLE_FDTS_16)
+#    if defined(CONFIG_STM32L4_QENCODER_SAMPLE_EVENT_5)
+#      define STM32L4_QENCODER_ICF GTIM_CCMR_ICF_FDTSd165
+#    elif defined(CONFIG_STM32L4_QENCODER_SAMPLE_EVENT_6)
+#      define STM32L4_QENCODER_ICF GTIM_CCMR_ICF_FDTSd166
+#    elif defined(CONFIG_STM32L4_QENCODER_SAMPLE_EVENT_8)
+#      define STM32L4_QENCODER_ICF GTIM_CCMR_ICF_FDTSd168
+#    endif
+#  elif defined(CONFIG_STM32L4_QENCODER_SAMPLE_FDTS_32)
+#    if defined(CONFIG_STM32L4_QENCODER_SAMPLE_EVENT_5)
+#      define STM32L4_QENCODER_ICF GTIM_CCMR_ICF_FDTSd325
+#    elif defined(CONFIG_STM32L4_QENCODER_SAMPLE_EVENT_6)
+#      define STM32L4_QENCODER_ICF GTIM_CCMR_ICF_FDTSd326
+#    elif defined(CONFIG_STM32L4_QENCODER_SAMPLE_EVENT_8)
+#      define STM32L4_QENCODER_ICF GTIM_CCMR_ICF_FDTSd328
+#    endif
+#  endif
+
+#  ifndef STM32L4_QENCODER_ICF
+#    warning "Invalid encoder filter combination, filter disabled"
+#  endif
+#endif
+
+#ifndef STM32L4_QENCODER_ICF
+#  define STM32L4_QENCODER_ICF GTIM_CCMR_ICF_NOFILT
+#endif
+
+#define STM32L4_GPIO_INPUT_FLOAT (GPIO_INPUT | GPIO_FLOAT)
+
+/* Debug ****************************************************************************/
+/* Non-standard debug that may be enabled just for testing the quadrature encoder */
+
+#ifndef CONFIG_DEBUG_FEATURES
+#  undef CONFIG_DEBUG_SENSORS
+#endif
+
+#ifdef CONFIG_DEBUG_SENSORS
+#  ifdef CONFIG_DEBUG_INFO
+#    define qe_dumpgpio(p,m)    stm32l4_dumpgpio(p,m)
+#  else
+#    define qe_dumpgpio(p,m)
+#  endif
+#else
+#  define qe_dumpgpio(p,m)
+#endif
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+
+/* Constant configuration structure that is retained in FLASH */
+
+struct stm32l4_qeconfig_s
+{
+  uint8_t  timid;   /* Timer ID {1,2,3,4,5,8} */
+  uint8_t  irq;     /* Timer update IRQ */
+#ifdef HAVE_MIXEDWIDTH_TIMERS
+  uint8_t  width;   /* Timer width (16- or 32-bits) */
+#endif
+  uint32_t ti1cfg;  /* TI1 input pin configuration (20-bit encoding) */
+  uint32_t ti2cfg;  /* TI2 input pin configuration (20-bit encoding) */
+  uint32_t base;    /* Register base address */
+  uint32_t psc;     /* Encoder pulses prescaler */
+};
+
+/* Overall, RAM-based state structure */
+
+struct stm32l4_lowerhalf_s
+{
+  /* The first field of this state structure must be a pointer to the lower-
+   * half callback structure:
+   */
+
+  FAR const struct qe_ops_s *ops;  /* Lower half callback structure */
+
+  /* STM32 driver-specific fields: */
+
+  FAR const struct stm32l4_qeconfig_s *config; /* static onfiguration */
+
+  bool             inuse;    /* True: The lower-half driver is in-use */
+
+#ifdef HAVE_16BIT_TIMERS
+  volatile int32_t position; /* The current position offset */
+#endif
+};
+
+/************************************************************************************
+ * Private Function Prototypes
+ ************************************************************************************/
+/* Helper functions */
+
+static uint16_t stm32l4_getreg16(FAR struct stm32l4_lowerhalf_s *priv, int offset);
+static void stm32l4_putreg16(FAR struct stm32l4_lowerhalf_s *priv, int offset, uint16_t value);
+static uint32_t stm32l4_getreg32(FAR struct stm32l4_lowerhalf_s *priv, int offset);
+static void stm32l4_putreg32(FAR struct stm32l4_lowerhalf_s *priv, int offset, uint32_t value);
+
+#if defined(CONFIG_DEBUG_SENSORS) && defined(CONFIG_DEBUG_INFO)
+static void stm32l4_dumpregs(FAR struct stm32l4_lowerhalf_s *priv, FAR const char *msg);
+#else
+#  define stm32l4_dumpregs(priv,msg)
+#endif
+
+static FAR struct stm32l4_lowerhalf_s *stm32l4_tim2lower(int tim);
+
+/* Interrupt handling */
+
+#ifdef HAVE_16BIT_TIMERS
+static int stm32l4_interrupt(int irq, FAR void *context, FAR void *arg);
+#endif
+
+/* Lower-half Quadrature Encoder Driver Methods */
+
+static int stm32l4_setup(FAR struct qe_lowerhalf_s *lower);
+static int stm32l4_shutdown(FAR struct qe_lowerhalf_s *lower);
+static int stm32l4_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos);
+static int stm32l4_reset(FAR struct qe_lowerhalf_s *lower);
+static int stm32l4_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, unsigned long arg);
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+/* The lower half callback structure */
+
+static const struct qe_ops_s g_qecallbacks =
+{
+  .setup    = stm32l4_setup,
+  .shutdown = stm32l4_shutdown,
+  .position = stm32l4_position,
+  .reset    = stm32l4_reset,
+  .ioctl    = stm32l4_ioctl,
+};
+
+/* Per-timer state structures */
+
+#ifdef CONFIG_STM32L4_TIM1_QE
+static const struct stm32l4_qeconfig_s g_tim1config =
+{
+  .timid    = 1,
+  .irq      = STM32L4_IRQ_TIM1UP,
+#ifdef HAVE_MIXEDWIDTH_TIMERS
+  .width    = TIM1_BITWIDTH,
+#endif
+  .base     = STM32L4_TIM1_BASE,
+  .psc      = CONFIG_STM32L4_TIM1_QEPSC,
+  .ti1cfg   = GPIO_TIM1_CH1IN,
+  .ti2cfg   = GPIO_TIM1_CH2IN,
+};
+
+static struct stm32l4_lowerhalf_s g_tim1lower =
+{
+  .ops      = &g_qecallbacks,
+  .config   = &g_tim1config,
+  .inuse    = false,
+};
+
+#endif
+
+#ifdef CONFIG_STM32L4_TIM2_QE
+static const struct stm32l4_qeconfig_s g_tim2config =
+{
+  .timid    = 2,
+  .irq      = STM32L4_IRQ_TIM2,
+#ifdef HAVE_MIXEDWIDTH_TIMERS
+  .width    = TIM2_BITWIDTH,
+#endif
+  .base     = STM32L4_TIM2_BASE,
+  .psc      = CONFIG_STM32L4_TIM2_QEPSC,
+  .ti1cfg   = GPIO_TIM2_CH1IN,
+  .ti2cfg   = GPIO_TIM2_CH2IN,
+};
+
+static struct stm32l4_lowerhalf_s g_tim2lower =
+{
+  .ops      = &g_qecallbacks,
+  .config   = &g_tim2config,
+  .inuse    = false,
+};
+
+#endif
+
+#ifdef CONFIG_STM32L4_TIM3_QE
+static const struct stm32l4_qeconfig_s g_tim3config =
+{
+  .timid    = 3,
+  .irq      = STM32L4_IRQ_TIM3,
+#ifdef HAVE_MIXEDWIDTH_TIMERS
+  .width    = TIM3_BITWIDTH,
+#endif
+  .base     = STM32L4_TIM3_BASE,
+  .psc      = CONFIG_STM32L4_TIM3_QEPSC,
+  .ti1cfg   = GPIO_TIM3_CH1IN,
+  .ti2cfg   = GPIO_TIM3_CH2IN,
+};
+
+static struct stm32l4_lowerhalf_s g_tim3lower =
+{
+  .ops      = &g_qecallbacks,
+  .config   = &g_tim3config,
+  .inuse    = false,
+};
+
+#endif
+
+#ifdef CONFIG_STM32L4_TIM4_QE
+static const struct stm32l4_qeconfig_s g_tim4config =
+{
+  .timid    = 4,
+  .irq      = STM32L4_IRQ_TIM4,
+#ifdef HAVE_MIXEDWIDTH_TIMERS
+  .width    = TIM4_BITWIDTH,
+#endif
+  .base     = STM32L4_TIM4_BASE,
+  .psc      = CONFIG_STM32L4_TIM4_QEPSC,
+  .ti1cfg   = GPIO_TIM4_CH1IN,
+  .ti2cfg   = GPIO_TIM4_CH2IN,
+};
+
+static struct stm32l4_lowerhalf_s g_tim4lower =
+{
+  .ops      = &g_qecallbacks,
+  .config   = &g_tim4config,
+  .inuse    = false,
+};
+
+#endif
+
+#ifdef CONFIG_STM32L4_TIM5_QE
+static const struct stm32l4_qeconfig_s g_tim5config =
+{
+  .timid    = 5,
+  .irq      = STM32L4_IRQ_TIM5,
+#ifdef HAVE_MIXEDWIDTH_TIMERS
+  .width    = TIM5_BITWIDTH,
+#endif
+  .base     = STM32L4_TIM5_BASE,
+  .psc      = CONFIG_STM32L4_TIM5_QEPSC,
+  .ti1cfg   = GPIO_TIM5_CH1IN,
+  .ti2cfg   = GPIO_TIM5_CH2IN,
+};
+
+static struct stm32l4_lowerhalf_s g_tim5lower =
+{
+  .ops      = &g_qecallbacks,
+  .config   = &g_tim5config,
+  .inuse    = false,
+};
+
+#endif
+
+#ifdef CONFIG_STM32L4_TIM8_QE
+static const struct stm32l4_qeconfig_s g_tim8config =
+{
+  .timid    = 8,
+  .irq      = STM32L4_IRQ_TIM8UP,
+#ifdef HAVE_MIXEDWIDTH_TIMERS
+  .width    = TIM8_BITWIDTH,
+#endif
+  .base     = STM32L4_TIM8_BASE,
+  .psc      = CONFIG_STM32L4_TIM8_QEPSC,
+  .ti1cfg   = GPIO_TIM8_CH1IN,
+  .ti2cfg   = GPIO_TIM8_CH2IN,
+};
+
+static struct stm32l4_lowerhalf_s g_tim8lower =
+{
+  .ops      = &g_qecallbacks,
+  .config   = &g_tim8config,
+  .inuse    = false,
+};
+
+#endif
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32l4_getreg16
+ *
+ * Description:
+ *   Read the value of a 16-bit timer register.
+ *
+ * Input Parameters:
+ *   priv - A reference to the lower half status
+ *   offset - The offset to the register to read
+ *
+ * Returned Value:
+ *   The current contents of the specified register
+ *
+ ************************************************************************************/
+
+static uint16_t stm32l4_getreg16(struct stm32l4_lowerhalf_s *priv, int offset)
+{
+  return getreg16(priv->config->base + offset);
+}
+
+/************************************************************************************
+ * Name: stm32l4_putreg16
+ *
+ * Description:
+ *   Write a value to a 16-bit timer register.
+ *
+ * Input Parameters:
+ *   priv - A reference to the lower half status
+ *   offset - The offset to the register to read
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+static void stm32l4_putreg16(FAR struct stm32l4_lowerhalf_s *priv, int offset,
+                             uint16_t value)
+{
+  putreg16(value, priv->config->base + offset);
+}
+
+/************************************************************************************
+ * Name: stm32l4_getreg32
+ *
+ * Description:
+ *   Read the value of a 32-bit timer register.  This applies only for the STM32 F4
+ *   32-bit registers (CNT, ARR, CRR1-4) in the 32-bit timers TIM2-5 (but works OK
+ *   with the 16-bit TIM1,8 and F1 registers as well).
+ *
+ * Input Parameters:
+ *   priv - A reference to the lower half status
+ *   offset - The offset to the register to read
+ *
+ * Returned Value:
+ *   The current contents of the specified register
+ *
+ ************************************************************************************/
+
+static uint32_t stm32l4_getreg32(FAR struct stm32l4_lowerhalf_s *priv, int offset)
+{
+  return getreg32(priv->config->base + offset);
+}
+
+/************************************************************************************
+ * Name: stm32l4_putreg16
+ *
+ * Description:
+ *   Write a value to a 32-bit timer register.  This applies only for the STM32 F4
+ *   32-bit registers (CNT, ARR, CRR1-4) in the 32-bit timers TIM2-5 (but works OK
+ *   with the 16-bit TIM1,8 and F1 registers).
+ *
+ * Input Parameters:
+ *   priv - A reference to the lower half status
+ *   offset - The offset to the register to read
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+static void stm32l4_putreg32(FAR struct stm32l4_lowerhalf_s *priv, int offset,
+                             uint32_t value)
+{
+  putreg32(value, priv->config->base + offset);
+}
+
+/****************************************************************************
+ * Name: stm32l4_dumpregs
+ *
+ * Description:
+ *   Dump all timer registers.
+ *
+ * Input parameters:
+ *   priv - A reference to the QENCODER block status
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_DEBUG_SENSORS) && defined(CONFIG_DEBUG_INFO)
+static void stm32l4_dumpregs(FAR struct stm32l4_lowerhalf_s *priv,
+                             FAR const char *msg)
+{
+  sninfo("%s:\n", msg);
+  sninfo("  CR1: %04x CR2:  %04x SMCR:  %08x DIER:  %04x\n",
+         stm32l4_getreg16(priv, STM32L4_GTIM_CR1_OFFSET),
+         stm32l4_getreg16(priv, STM32L4_GTIM_CR2_OFFSET),
+         stm32l4_getreg32(priv, STM32L4_GTIM_SMCR_OFFSET),
+         stm32l4_getreg16(priv, STM32L4_GTIM_DIER_OFFSET));
+  sninfo("   SR: %04x EGR:  %04x CCMR1: %08x CCMR2: %08x\n",
+         stm32l4_getreg16(priv, STM32L4_GTIM_SR_OFFSET),
+         stm32l4_getreg16(priv, STM32L4_GTIM_EGR_OFFSET),
+         stm32l4_getreg32(priv, STM32L4_GTIM_CCMR1_OFFSET),
+         stm32l4_getreg32(priv, STM32L4_GTIM_CCMR2_OFFSET));
+  sninfo(" CCER: %04x CNT:  %08x PSC:   %04x ARR:   %08x\n",
+         stm32l4_getreg16(priv, STM32L4_GTIM_CCER_OFFSET),
+         stm32l4_getreg32(priv, STM32L4_GTIM_CNT_OFFSET),
+         stm32l4_getreg16(priv, STM32L4_GTIM_PSC_OFFSET),
+         stm32l4_getreg32(priv, STM32L4_GTIM_ARR_OFFSET));
+  sninfo(" CCR1: %08x CCR2: %08x\n",
+         stm32l4_getreg32(priv, STM32L4_GTIM_CCR1_OFFSET),
+         stm32l4_getreg32(priv, STM32L4_GTIM_CCR2_OFFSET));
+  sninfo(" CCR3: %08x CCR4: %08x\n",
+         stm32l4_getreg32(priv, STM32L4_GTIM_CCR3_OFFSET),
+         stm32l4_getreg32(priv, STM32L4_GTIM_CCR4_OFFSET));
+#if defined(CONFIG_STM32L4_TIM1_QE) || defined(CONFIG_STM32L4_TIM8_QE)
+  if (priv->config->timid == 1 || priv->config->timid == 8)
+    {
+      sninfo("  RCR: %04x BDTR: %04x DCR:   %04x DMAR:  %04x\n",
+             stm32l4_getreg16(priv, STM32L4_ATIM_RCR_OFFSET),
+             stm32l4_getreg16(priv, STM32L4_ATIM_BDTR_OFFSET),
+             stm32l4_getreg16(priv, STM32L4_ATIM_DCR_OFFSET),
+             stm32l4_getreg16(priv, STM32L4_ATIM_DMAR_OFFSET));
+    }
+  else
+#endif
+    {
+      sninfo("  DCR: %04x DMAR: %04x\n",
+             stm32l4_getreg16(priv, STM32L4_GTIM_DCR_OFFSET),
+             stm32l4_getreg16(priv, STM32L4_GTIM_DMAR_OFFSET));
+    }
+}
+#endif
+
+/************************************************************************************
+ * Name: stm32l4_tim2lower
+ *
+ * Description:
+ *   Map a timer number to a device structure
+ *
+ ************************************************************************************/
+
+static FAR struct stm32l4_lowerhalf_s *stm32l4_tim2lower(int tim)
+{
+  switch (tim)
+    {
+#ifdef CONFIG_STM32L4_TIM1_QE
+    case 1:
+      return &g_tim1lower;
+#endif
+#ifdef CONFIG_STM32L4_TIM2_QE
+    case 2:
+      return &g_tim2lower;
+#endif
+#ifdef CONFIG_STM32L4_TIM3_QE
+    case 3:
+      return &g_tim3lower;
+#endif
+#ifdef CONFIG_STM32L4_TIM4_QE
+    case 4:
+      return &g_tim4lower;
+#endif
+#ifdef CONFIG_STM32L4_TIM5_QE
+    case 5:
+      return &g_tim5lower;
+#endif
+#ifdef CONFIG_STM32L4_TIM8_QE
+    case 8:
+      return &g_tim8lower;
+#endif
+    default:
+      return NULL;
+    }
+}
+
+/************************************************************************************
+ * Name: stm32l4_interrupt
+ *
+ * Description:
+ *   Common timer interrupt handling.  NOTE: Only 16-bit timers require timer
+ *   interrupts.
+ *
+ ************************************************************************************/
+
+#ifdef HAVE_16BIT_TIMERS
+static int stm32l4_interrupt(int irq, FAR void *context, FAR void *arg)
+{
+  FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)arg;
+  uint16_t regval;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Verify that this is an update interrupt.  Nothing else is expected. */
+
+  regval = stm32l4_getreg16(priv, STM32L4_GTIM_SR_OFFSET);
+  DEBUGASSERT((regval & ATIM_SR_UIF) != 0);
+
+  /* Clear the UIF interrupt bit */
+
+  stm32l4_putreg16(priv, STM32L4_GTIM_SR_OFFSET, regval & ~GTIM_SR_UIF);
+
+  /* Check the direction bit in the CR1 register and add or subtract the
+   * maximum value, as appropriate.
+   */
+
+  regval = stm32l4_getreg16(priv, STM32L4_GTIM_CR1_OFFSET);
+  if ((regval & ATIM_CR1_DIR) != 0)
+    {
+      priv->position -= (int32_t)0x0000ffff;
+    }
+   else
+    {
+      priv->position += (int32_t)0x0000ffff;
+    }
+
+  return OK;
+}
+#endif
+
+/************************************************************************************
+ * Name: stm32l4_setup
+ *
+ * Description:
+ *   This method is called when the driver is opened.  The lower half driver
+ *   should configure and initialize the device so that it is ready for use.
+ *   The initial position value should be zero. *
+ *
+ ************************************************************************************/
+
+static int stm32l4_setup(FAR struct qe_lowerhalf_s *lower)
+{
+  FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower;
+  uint16_t dier;
+  uint32_t smcr;
+  uint32_t ccmr1;
+  uint16_t ccer;
+  uint16_t cr1;
+#ifdef HAVE_16BIT_TIMERS
+  uint16_t regval;
+  int ret;
+#endif
+
+  /* NOTE: Clocking should have been enabled in the low-level RCC logic at boot-up */
+
+  /* Timer base configuration */
+
+  cr1 = stm32l4_getreg16(priv, STM32L4_GTIM_CR1_OFFSET);
+
+  /* Clear the direction bit (0=count up) and select the Counter Mode (0=Edge aligned)
+   * (Timers 2-5 and 1-8 only)
+   */
+
+  cr1 &= ~(GTIM_CR1_DIR | GTIM_CR1_CMS_MASK);
+  stm32l4_putreg16(priv, STM32L4_GTIM_CR1_OFFSET, cr1);
+
+  /* Set the Autoreload value */
+
+#if defined(HAVE_MIXEDWIDTH_TIMERS)
+  if (priv->config->width == 32)
+    {
+      stm32l4_putreg32(priv, STM32L4_GTIM_ARR_OFFSET, 0xffffffff);
+    }
+  else
+    {
+      stm32l4_putreg16(priv, STM32L4_GTIM_ARR_OFFSET, 0xffff);
+    }
+#elif defined(HAVE_32BIT_TIMERS)
+  stm32l4_putreg32(priv, STM32L4_GTIM_ARR_OFFSET, 0xffffffff);
+#else
+  stm32l4_putreg16(priv, STM32L4_GTIM_ARR_OFFSET, 0xffff);
+#endif
+
+  /* Set the timer prescaler value.
+   *
+   * Previously, and still in the stm32fx driver, the clock input value (CLKIN)
+   * was based on the peripheral clock (PCLK) and a multiplier.
+   * These CLKIN values are provided in the board.h file.
+   * The prescaler value is then that CLKIN value divided by the configured
+   * CLKOUT value (minus one).
+   *
+   * It was determined that this configuration makes no sense for a qencoder.
+   * If we are doing precise shaft positioning, each qe pulse is important.
+   * So the STM32L4 has direct config control on the pulse count prescaler,
+   * instead of deriving this value from an obscure "output" setting AND the
+   * timer input clock. This input clock just limits the incoming pulse rate,
+   * which should be lower than the peripheral clock due to resynchronization,
+   * but it is the responsibility of the system designer to decide the
+   * correct prescaler value, because it has a direct influence on the
+   * encoder resolution.
+   */
+
+  stm32l4_putreg16(priv, STM32L4_GTIM_PSC_OFFSET, (uint16_t)priv->config->psc);
+
+#if defined(CONFIG_STM32L4_TIM1_QE) || defined(CONFIG_STM32L4_TIM8_QE)
+  if (priv->config->timid == 1 || priv->config->timid == 8)
+    {
+      /* Clear the Repetition Counter value */
+
+      stm32l4_putreg16(priv, STM32L4_ATIM_RCR_OFFSET, 0);
+    }
+#endif
+
+  /* Generate an update event to reload the Prescaler
+   * and the repetition counter (only for TIM1 and TIM8) value immediately
+   */
+
+  stm32l4_putreg16(priv, STM32L4_GTIM_EGR_OFFSET, GTIM_EGR_UG);
+
+  /* GPIO pin configuration */
+
+  stm32l4_configgpio(priv->config->ti1cfg);
+  stm32l4_configgpio(priv->config->ti2cfg);
+
+  /* Set the encoder Mode 3 */
+
+  smcr = stm32l4_getreg32(priv, STM32L4_GTIM_SMCR_OFFSET);
+  smcr &= ~GTIM_SMCR_SMS_MASK;
+  smcr |= GTIM_SMCR_ENCMD3;
+  stm32l4_putreg32(priv, STM32L4_GTIM_SMCR_OFFSET, smcr);
+
+  /* TI1 Channel Configuration */
+  /* Disable the Channel 1: Reset the CC1E Bit */
+
+  ccer  = stm32l4_getreg16(priv, STM32L4_GTIM_CCER_OFFSET);
+  ccer &= ~GTIM_CCER_CC1E;
+  stm32l4_putreg16(priv, STM32L4_GTIM_CCER_OFFSET, ccer);
+
+  ccmr1 = stm32l4_getreg32(priv, STM32L4_GTIM_CCMR1_OFFSET);
+  ccer = stm32l4_getreg16(priv, STM32L4_GTIM_CCER_OFFSET);
+
+  /* Select the Input IC1=TI1 and set the filter fSAMPLING=fDTS/4, N=6 */
+
+  ccmr1 &= ~(GTIM_CCMR1_CC1S_MASK | GTIM_CCMR1_IC1F_MASK);
+  ccmr1 |= GTIM_CCMR_CCS_CCIN1 << GTIM_CCMR1_CC1S_SHIFT;
+  ccmr1 |= STM32L4_QENCODER_ICF << GTIM_CCMR1_IC1F_SHIFT;
+
+  /* Select the Polarity=rising and set the CC1E Bit */
+
+  ccer &= ~(GTIM_CCER_CC1P | GTIM_CCER_CC1NP);
+  ccer |= GTIM_CCER_CC1E;
+
+  /* Write to TIM CCMR1 and CCER registers */
+
+  stm32l4_putreg32(priv, STM32L4_GTIM_CCMR1_OFFSET, ccmr1);
+  stm32l4_putreg16(priv, STM32L4_GTIM_CCER_OFFSET, ccer);
+
+  /* Set the Input Capture Prescaler value: Capture performed each time an
+   * edge is detected on the capture input.
+   */
+
+  ccmr1  = stm32l4_getreg32(priv, STM32L4_GTIM_CCMR1_OFFSET);
+  ccmr1 &= ~GTIM_CCMR1_IC1PSC_MASK;
+  ccmr1 |= (GTIM_CCMR_ICPSC_NOPSC << GTIM_CCMR1_IC1PSC_SHIFT);
+  stm32l4_putreg32(priv, STM32L4_GTIM_CCMR1_OFFSET, ccmr1);
+
+  /* TI2 Channel Configuration */
+  /* Disable the Channel 2: Reset the CC2E Bit */
+
+  ccer  = stm32l4_getreg16(priv, STM32L4_GTIM_CCER_OFFSET);
+  ccer &= ~GTIM_CCER_CC2E;
+  stm32l4_putreg16(priv, STM32L4_GTIM_CCER_OFFSET, ccer);
+
+  ccmr1 = stm32l4_getreg32(priv, STM32L4_GTIM_CCMR1_OFFSET);
+  ccer  = stm32l4_getreg16(priv, STM32L4_GTIM_CCER_OFFSET);
+
+  /* Select the Input IC2=TI2 and set the filter fSAMPLING=fDTS/4, N=6 */
+
+  ccmr1 &= ~(GTIM_CCMR1_CC2S_MASK | GTIM_CCMR1_IC2F_MASK);
+  ccmr1 |= GTIM_CCMR_CCS_CCIN1 << GTIM_CCMR1_CC2S_SHIFT;
+  ccmr1 |= STM32L4_QENCODER_ICF << GTIM_CCMR1_IC2F_SHIFT;
+
+  /* Select the Polarity=rising and set the CC2E Bit */
+
+  ccer &= ~(GTIM_CCER_CC2P | GTIM_CCER_CC2NP);
+  ccer |= GTIM_CCER_CC2E;
+
+  /* Write to TIM CCMR1 and CCER registers */
+
+  stm32l4_putreg32(priv, STM32L4_GTIM_CCMR1_OFFSET, ccmr1);
+  stm32l4_putreg16(priv, STM32L4_GTIM_CCER_OFFSET, ccer);
+
+  /* Set the Input Capture Prescaler value: Capture performed each time an
+   * edge is detected on the capture input.
+   */
+
+  ccmr1  = stm32l4_getreg32(priv, STM32L4_GTIM_CCMR1_OFFSET);
+  ccmr1 &= ~GTIM_CCMR1_IC2PSC_MASK;
+  ccmr1 |= (GTIM_CCMR_ICPSC_NOPSC << GTIM_CCMR1_IC2PSC_SHIFT);
+  stm32l4_putreg32(priv, STM32L4_GTIM_CCMR1_OFFSET, ccmr1);
+
+  /* Disable the update interrupt */
+
+  dier = stm32l4_getreg16(priv, STM32L4_GTIM_DIER_OFFSET);
+  dier &= ~GTIM_DIER_UIE;
+  stm32l4_putreg16(priv, STM32L4_GTIM_DIER_OFFSET, dier);
+
+  /* There is no need for interrupts with 32-bit timers */
+
+#ifdef HAVE_16BIT_TIMERS
+#ifdef HAVE_MIXEDWIDTH_TIMERS
+  if (priv->config->width != 32)
+#endif
+    {
+      /* Attach the interrupt handler */
+
+      ret = irq_attach(priv->config->irq, stm32l4_interrupt, priv);
+      if (ret < 0)
+        {
+          stm32l4_shutdown(lower);
+          return ret;
+        }
+
+      /* Enable the update/global interrupt at the NVIC */
+
+      up_enable_irq(priv->config->irq);
+    }
+#endif
+
+  /* Reset the Update Disable Bit */
+
+  cr1 = stm32l4_getreg16(priv, STM32L4_GTIM_CR1_OFFSET);
+  cr1 &= ~GTIM_CR1_UDIS;
+  stm32l4_putreg16(priv, STM32L4_GTIM_CR1_OFFSET, cr1);
+
+  /* Reset the URS Bit */
+
+  cr1 &= ~GTIM_CR1_URS;
+  stm32l4_putreg16(priv, STM32L4_GTIM_CR1_OFFSET, cr1);
+
+  /* There is no need for interrupts with 32-bit timers */
+
+#ifdef HAVE_16BIT_TIMERS
+#ifdef HAVE_MIXEDWIDTH_TIMERS
+  if (priv->config->width != 32)
+#endif
+    {
+      /* Clear any pending update interrupts */
+
+      regval = stm32l4_getreg16(priv, STM32L4_GTIM_SR_OFFSET);
+      stm32l4_putreg16(priv, STM32L4_GTIM_SR_OFFSET, regval & ~GTIM_SR_UIF);
+
+      /* Then enable the update interrupt */
+
+      dier = stm32l4_getreg16(priv, STM32L4_GTIM_DIER_OFFSET);
+      dier |= GTIM_DIER_UIE;
+      stm32l4_putreg16(priv, STM32L4_GTIM_DIER_OFFSET, dier);
+    }
+#endif
+
+  /* Enable the TIM Counter */
+
+  cr1 = stm32l4_getreg16(priv, STM32L4_GTIM_CR1_OFFSET);
+  cr1 |= GTIM_CR1_CEN;
+  stm32l4_putreg16(priv, STM32L4_GTIM_CR1_OFFSET, cr1);
+
+  stm32l4_dumpregs(priv, "After setup");
+
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32l4_shutdown
+ *
+ * Description:
+ *   This method is called when the driver is closed.  The lower half driver
+ *   should stop data collection, free any resources, disable timer hardware, and
+ *   put the system into the lowest possible power usage state *
+ *
+ ************************************************************************************/
+
+static int stm32l4_shutdown(FAR struct qe_lowerhalf_s *lower)
+{
+  FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower;
+  irqstate_t flags;
+  uint32_t regaddr;
+  uint32_t regval;
+  uint32_t resetbit;
+  uint32_t pincfg;
+
+  /* Disable the update/global interrupt at the NVIC */
+
+  flags = enter_critical_section();
+  up_disable_irq(priv->config->irq);
+
+  /* Detach the interrupt handler */
+
+  (void)irq_detach(priv->config->irq);
+
+  /* Disable interrupts momentary to stop any ongoing timer processing and
+   * to prevent any concurrent access to the reset register.
+   */
+
+  /* Disable further interrupts and stop the timer */
+
+  stm32l4_putreg16(priv, STM32L4_GTIM_DIER_OFFSET, 0);
+  stm32l4_putreg16(priv, STM32L4_GTIM_SR_OFFSET, 0);
+
+  /* Determine which timer to reset */
+
+  switch (priv->config->timid)
+    {
+#ifdef CONFIG_STM32L4_TIM1_QE
+      case 1:
+        regaddr  = STM32L4_RCC_APB2RSTR;
+        resetbit = RCC_APB2RSTR_TIM1RST;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM2_QE
+      case 2:
+        regaddr  = STM32L4_RCC_APB1RSTR1;
+        resetbit = RCC_APB1RSTR1_TIM2RST;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM3_QE
+      case 3:
+        regaddr  = STM32L4_RCC_APB1RSTR1;
+        resetbit = RCC_APB1RSTR1_TIM3RST;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM4_QE
+      case 4:
+        regaddr  = STM32L4_RCC_APB1RSTR1;
+        resetbit = RCC_APB1RSTR1_TIM4RST;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM5_QE
+      case 5:
+        regaddr  = STM32L4_RCC_APB1RSTR1;
+        resetbit = RCC_APB1RSTR1_TIM5RST;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM8_QE
+      case 8:
+        regaddr  = STM32L4_RCC_APB2RSTR;
+        resetbit = RCC_APB2RSTR_TIM8RST;
+        break;
+#endif
+      default:
+        return -EINVAL;
+    }
+
+  /* Reset the timer - stopping the output and putting the timer back
+   * into a state where stm32l4_start() can be called.
+   */
+
+  regval  = getreg32(regaddr);
+  regval |= resetbit;
+  putreg32(regval, regaddr);
+
+  regval &= ~resetbit;
+  putreg32(regval, regaddr);
+  leave_critical_section(flags);
+
+  sninfo("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
+  stm32l4_dumpregs(priv, "After stop");
+
+  /* Put the TI1 GPIO pin back to its default state */
+
+  pincfg  = priv->config->ti1cfg & (GPIO_PORT_MASK | GPIO_PIN_MASK);
+  pincfg |= STM32L4_GPIO_INPUT_FLOAT;
+
+  stm32l4_configgpio(pincfg);
+
+  /* Put the TI2 GPIO pin back to its default state */
+
+  pincfg  = priv->config->ti2cfg & (GPIO_PORT_MASK | GPIO_PIN_MASK);
+  pincfg |= STM32L4_GPIO_INPUT_FLOAT;
+
+  stm32l4_configgpio(pincfg);
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32l4_position
+ *
+ * Description:
+ *   Return the current position measurement.
+ *
+ ************************************************************************************/
+
+static int stm32l4_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos)
+{
+  FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower;
+#ifdef HAVE_16BIT_TIMERS
+  int32_t position;
+  int32_t verify;
+  uint32_t count;
+
+  DEBUGASSERT(lower && priv->inuse);
+
+  /* Loop until we are certain that no interrupt occurred between samples */
+
+  do
+    {
+      /* Don't let another task pre-empt us until we get the measurement.  The timer
+       * interrupt may still be processed
+       */
+
+      sched_lock();
+      position = priv->position;
+      count    = stm32l4_getreg32(priv, STM32L4_GTIM_CNT_OFFSET);
+      verify   = priv->position;
+      sched_unlock();
+    }
+  while (position != verify);
+
+  /* Return the position measurement */
+
+  *pos = position + (int32_t)count;
+#else
+  /* Return the counter value */
+
+  *pos = (int32_t)stm32l4_getreg32(priv, STM32L4_GTIM_CNT_OFFSET);
+#endif
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32l4_reset
+ *
+ * Description:
+ *   Reset the position measurement to zero.
+ *
+ ************************************************************************************/
+
+static int stm32l4_reset(FAR struct qe_lowerhalf_s *lower)
+{
+  FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower;
+#ifdef HAVE_16BIT_TIMERS
+  irqstate_t flags;
+
+  sninfo("Resetting position to zero\n");
+  DEBUGASSERT(lower && priv->inuse);
+
+  /* Reset the timer and the counter.  Interrupts are disabled to make this atomic
+   * (if possible)
+   */
+
+  flags = enter_critical_section();
+  stm32l4_putreg32(priv, STM32L4_GTIM_CNT_OFFSET, 0);
+  priv->position = 0;
+  leave_critical_section(flags);
+#else
+  sninfo("Resetting position to zero\n");
+  DEBUGASSERT(lower && priv->inuse);
+
+  /* Reset the counter to zero */
+
+  stm32l4_putreg32(priv, STM32L4_GTIM_CNT_OFFSET, 0);
+#endif
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32l4_ioctl
+ *
+ * Description:
+ *   Lower-half logic may support platform-specific ioctl commands
+ *
+ ************************************************************************************/
+
+static int stm32l4_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, unsigned long arg)
+{
+  /* No ioctl commands supported */
+
+  /* TODO add an IOCTL to control the encoder pulse count prescaler */
+
+  return -ENOTTY;
+}
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32l4_qeinitialize
+ *
+ * Description:
+ *   Initialize a quadrature encoder interface.  This function must be called from
+ *   board-specific logic.
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/qe0"
+ *   tim     - The timer number to used.  'tim' must be an element of {1,2,3,4,5,8}
+ *
+ * Returned Values:
+ *   Zero on success; A negated errno value is returned on failure.
+ *
+ ************************************************************************************/
+
+int stm32l4_qeinitialize(FAR const char *devpath, int tim)
+{
+  FAR struct stm32l4_lowerhalf_s *priv;
+  int ret;
+
+  /* Find the pre-allocated timer state structure corresponding to this timer */
+
+  priv = stm32l4_tim2lower(tim);
+  if (!priv)
+    {
+      snerr("ERROR: TIM%d support not configured\n", tim);
+      return -ENXIO;
+    }
+
+  /* Make sure that it is available */
+
+  if (priv->inuse)
+    {
+      snerr("ERROR: TIM%d is in-use\n", tim);
+      return -EBUSY;
+    }
+
+  /* Register the priv-half driver */
+
+  ret = qe_register(devpath, (FAR struct qe_lowerhalf_s *)priv);
+  if (ret < 0)
+    {
+      snerr("ERROR: qe_register failed: %d\n", ret);
+      return ret;
+    }
+
+  /* Make sure that the timer is in the shutdown state */
+
+  stm32l4_shutdown((FAR struct qe_lowerhalf_s *)priv);
+
+  /* The driver is now in-use */
+
+  priv->inuse = true;
+  return OK;
+}
+
+#endif /* CONFIG_QENCODER */
diff --git a/arch/arm/src/stm32l4/stm32l4_qencoder.h b/arch/arm/src/stm32l4/stm32l4_qencoder.h
new file mode 100644
index 0000000000000000000000000000000000000000..fca0b88b8bd33efe32eb43f6b8eb30a13e166257
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_qencoder.h
@@ -0,0 +1,141 @@
+/************************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_qencoder.h
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32L4_STM32L4_QENCODER_H
+#define __ARCH_ARM_SRC_STM32L4_STM32L4_QENCODER_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+#ifdef CONFIG_QENCODER
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+/* Timer devices may be used for different purposes.  One special purpose is as
+ * a quadrature encoder input device.  If CONFIG_STM32L4_TIMn is defined then the
+ * CONFIG_STM32L4_TIMn_QE must also be defined to indicate that timer "n" is intended
+ * to be used for as a quadrature encoder.
+ */
+
+#ifndef CONFIG_STM32L4_TIM1
+#  undef CONFIG_STM32L4_TIM1_QE
+#endif
+#ifndef CONFIG_STM32L4_TIM2
+#  undef CONFIG_STM32L4_TIM2_QE
+#endif
+#ifndef CONFIG_STM32L4_TIM3
+#  undef CONFIG_STM32L4_TIM3_QE
+#endif
+#ifndef CONFIG_STM32L4_TIM4
+#  undef CONFIG_STM32L4_TIM4_QE
+#endif
+#ifndef CONFIG_STM32L4_TIM5
+#  undef CONFIG_STM32L4_TIM5_QE
+#endif
+#ifndef CONFIG_STM32L4_TIM8
+#  undef CONFIG_STM32L4_TIM8_QE
+#endif
+
+/* Only timers 2-5, and 1 & 8 can be used as a quadrature encoder
+ */
+
+#undef CONFIG_STM32L4_TIM6_QE
+#undef CONFIG_STM32L4_TIM7_QE
+#undef CONFIG_STM32L4_TIM9_QE
+#undef CONFIG_STM32L4_TIM10_QE
+#undef CONFIG_STM32L4_TIM11_QE
+#undef CONFIG_STM32L4_TIM12_QE
+#undef CONFIG_STM32L4_TIM13_QE
+#undef CONFIG_STM32L4_TIM14_QE
+
+/* Clock out frequency.  This value is used to calculation the timer CLKIN in
+ * prescaler value.
+ */
+
+#ifndef CONFIG_STM32L4_TIM1_QECLKOUT
+#  define CONFIG_STM32L4_TIM1_QECLKOUT 28000000
+#endif
+
+#ifndef CONFIG_STM32L4_TIM2_QECLKOUT
+#  define CONFIG_STM32L4_TIM2_QECLKOUT 28000000
+#endif
+
+#ifndef CONFIG_STM32L4_TIM3_QECLKOUT
+#  define CONFIG_STM32L4_TIM3_QECLKOUT 28000000
+#endif
+
+#ifndef CONFIG_STM32L4_TIM4_QECLKOUT
+#  define CONFIG_STM32L4_TIM4_QECLKOUT 28000000
+#endif
+
+#ifndef CONFIG_STM32L4_TIM5_QECLKOUT
+#  define CONFIG_STM32L4_TIM5_QECLKOUT 28000000
+#endif
+
+#ifndef CONFIG_STM32L4_TIM8_QECLKOUT
+#  define CONFIG_STM32L4_TIM8_QECLKOUT 28000000
+#endif
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32l4_qeinitialize
+ *
+ * Description:
+ *   Initialize a quadrature encoder interface.  This function must be called from
+ *   board-specific logic..
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/qe0"
+ *   tim     - The timer number to used.  'tim' must be an element of {1,2,3,4,5,8}
+ *
+ * Returned Values:
+ *   Zero on success; A negated errno value is returned on failure.
+ *
+ ************************************************************************************/
+
+int stm32l4_qeinitialize(FAR const char *devpath, int tim);
+
+#endif /* CONFIG_QENCODER */
+#endif /* __ARCH_ARM_SRC_STM32L4_STM32L4_QENCODER_H */
+
diff --git a/arch/arm/src/stm32l4/stm32l4_qspi.c b/arch/arm/src/stm32l4/stm32l4_qspi.c
index 57aa85dac0522c3b406c537b29111579df663bdb..0f55e764a0d2b289725a77461ace7e8bc24aa785 100644
--- a/arch/arm/src/stm32l4/stm32l4_qspi.c
+++ b/arch/arm/src/stm32l4/stm32l4_qspi.c
@@ -55,6 +55,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include "up_internal.h"
@@ -85,33 +86,12 @@
 #define IS_ALIGNED(n)     (((uint32_t)(n) & ALIGN_MASK) == 0)
 
 /* Debug *******************************************************************/
-/* Check if QSPI debug is enabled (non-standard.. no support in
- * include/debug.h
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_SPI
-#  undef CONFIG_STM32L4_QSPI_DMADEBUG
-#  undef CONFIG_STM32L4_QSPI_REGDEBUG
-#endif
+/* Check if QSPI debug is enabled */
 
 #ifndef CONFIG_DEBUG_DMA
 #  undef CONFIG_STM32L4_QSPI_DMADEBUG
 #endif
 
-#ifdef CONFIG_DEBUG_SPI
-#  define qspidbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define qspivdbg lldbg
-#  else
-#    define qspivdbg(x...)
-#  endif
-#else
-#  define qspidbg(x...)
-#  define qspivdbg(x...)
-#endif
-
 #define DMA_INITIAL      0
 #define DMA_AFTER_SETUP  1
 #define DMA_AFTER_START  2
@@ -286,13 +266,13 @@ static inline uint32_t qspi_getreg(struct stm32l4_qspidev_s *priv,
 static inline void qspi_putreg(struct stm32l4_qspidev_s *priv, uint32_t value,
                   unsigned int offset);
 
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_SPI_INFO
 static void     qspi_dumpregs(struct stm32l4_qspidev_s *priv, const char *msg);
 #else
 # define        qspi_dumpregs(priv,msg)
 #endif
 
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_GPIO)
+#if defined(CONFIG_DEBUG_SPI_INFO) && defined(CONFIG_DEBUG_GPIO)
 static void     qspi_dumpgpioconfig(const char *msg);
 #else
 # define        qspi_dumpgpioconfig(msg)
@@ -301,7 +281,7 @@ static void     qspi_dumpgpioconfig(const char *msg);
 /* Interrupts */
 
 #ifdef STM32L4_QSPI_INTERRUPTS
-static int     qspi0_interrupt(int irq, void *context);
+static int     qspi0_interrupt(int irq, void *context, FAR void *arg);
 
 #endif
 
@@ -426,7 +406,7 @@ static bool qspi_checkreg(struct stm32l4_qspidev_s *priv, bool wr, uint32_t valu
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", priv->ntimes);
+          spiinfo("...[Repeats %d times]...\n", priv->ntimes);
         }
 
       /* Save information about the new access */
@@ -460,7 +440,7 @@ static inline uint32_t qspi_getreg(struct stm32l4_qspidev_s *priv,
 #ifdef CONFIG_STM32L4_QSPI_REGDEBUG
   if (qspi_checkreg(priv, false, value, address))
     {
-      lldbg("%08x->%08x\n", address, value);
+      spiinfo("%08x->%08x\n", address, value);
     }
 #endif
 
@@ -483,7 +463,7 @@ static inline void qspi_putreg(struct stm32l4_qspidev_s *priv, uint32_t value,
 #ifdef CONFIG_STM32L4_QSPI_REGDEBUG
   if (qspi_checkreg(priv, true, value, address))
     {
-      lldbg("%08x<-%08x\n", address, value);
+      spiinfo("%08x<-%08x\n", address, value);
     }
 #endif
 
@@ -505,11 +485,11 @@ static inline void qspi_putreg(struct stm32l4_qspidev_s *priv, uint32_t value,
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_SPI_INFO
 static void qspi_dumpregs(struct stm32l4_qspidev_s *priv, const char *msg)
 {
   uint32_t regval;
-  qspivdbg("%s:\n", msg);
+  spiinfo("%s:\n", msg);
 
 #if 0
   /* this extra verbose output may be helpful in some cases; you'll need
@@ -517,77 +497,73 @@ static void qspi_dumpregs(struct stm32l4_qspidev_s *priv, const char *msg)
    */
 
   regval = getreg32(priv->base + STM32L4_QUADSPI_CR_OFFSET);    /* Control Register */
-  qspivdbg("CR:%08x\n",regval);
-  qspivdbg("  EN:%1d ABORT:%1d DMAEN:%1d TCEN:%1d SSHIFT:%1d\n"
-           "  FTHRES: %d\n"
-           "  TEIE:%1d TCIE:%1d FTIE:%1d SMIE:%1d TOIE:%1d APMS:%1d PMM:%1d\n"
-           "  PRESCALER: %d\n",
-      (regval&QSPI_CR_EN)?1:0,
-      (regval&QSPI_CR_ABORT)?1:0,
-      (regval&QSPI_CR_DMAEN)?1:0,
-      (regval&QSPI_CR_TCEN)?1:0,
-      (regval&QSPI_CR_SSHIFT)?1:0,
-      (regval&QSPI_CR_FTHRES_MASK)>>QSPI_CR_FTHRES_SHIFT,
-      (regval&QSPI_CR_TEIE)?1:0,
-      (regval&QSPI_CR_TCIE)?1:0,
-      (regval&QSPI_CR_FTIE)?1:0,
-      (regval&QSPI_CR_SMIE)?1:0,
-      (regval&QSPI_CR_TOIE)?1:0,
-      (regval&QSPI_CR_APMS)?1:0,
-      (regval&QSPI_CR_PMM)?1:0,
-      (regval&QSPI_CR_PRESCALER_MASK)>>QSPI_CR_PRESCALER_SHIFT
-      );
+  spiinfo("CR:%08x\n",regval);
+  spiinfo("  EN:%1d ABORT:%1d DMAEN:%1d TCEN:%1d SSHIFT:%1d\n"
+          "  FTHRES: %d\n"
+          "  TEIE:%1d TCIE:%1d FTIE:%1d SMIE:%1d TOIE:%1d APMS:%1d PMM:%1d\n"
+          "  PRESCALER: %d\n",
+          (regval & QSPI_CR_EN) ? 1 : 0,
+          (regval & QSPI_CR_ABORT) ? 1 : 0,
+          (regval & QSPI_CR_DMAEN) ? 1 : 0,
+          (regval & QSPI_CR_TCEN) ? 1 : 0,
+          (regval & QSPI_CR_SSHIFT) ? 1 : 0,
+          (regval & QSPI_CR_FTHRES_MASK) >> QSPI_CR_FTHRES_SHIFT,
+          (regval & QSPI_CR_TEIE) ? 1 : 0,
+          (regval & QSPI_CR_TCIE) ? 1 : 0,
+          (regval & QSPI_CR_FTIE) ? 1 : 0,
+          (regval & QSPI_CR_SMIE) ? 1 : 0,
+          (regval & QSPI_CR_TOIE) ? 1 : 0,
+          (regval & QSPI_CR_APMS) ? 1 : 0,
+          (regval & QSPI_CR_PMM) ? 1 : 0,
+          (regval & QSPI_CR_PRESCALER_MASK) >> QSPI_CR_PRESCALER_SHIFT);
 
   regval = getreg32(priv->base + STM32L4_QUADSPI_DCR_OFFSET);   /* Device Configuration Register */
-  qspivdbg("DCR:%08x\n",regval);
-  qspivdbg("  CKMODE:%1d CSHT:%d FSIZE:%d\n",
-      (regval&QSPI_DCR_CKMODE)?1:0,
-      (regval&QSPI_DCR_CSHT_MASK)>>QSPI_DCR_CSHT_SHIFT,
-      (regval&QSPI_DCR_FSIZE_MASK)>>QSPI_DCR_FSIZE_SHIFT
-      );
+  spiinfo("DCR:%08x\n",regval);
+  spiinfo("  CKMODE:%1d CSHT:%d FSIZE:%d\n",
+          (regval & QSPI_DCR_CKMODE) ? 1 : 0,
+          (regval & QSPI_DCR_CSHT_MASK) >> QSPI_DCR_CSHT_SHIFT,
+          (regval & QSPI_DCR_FSIZE_MASK) >> QSPI_DCR_FSIZE_SHIFT);
 
   regval = getreg32(priv->base + STM32L4_QUADSPI_CCR_OFFSET);   /* Communication Configuration Register */
-  qspivdbg("CCR:%08x\n",regval);
-  qspivdbg("   INST:%02x IMODE:%d ADMODE:%d ADSIZE:%d ABMODE:%d\n"
-           "   ABSIZE:%d DCYC:%d DMODE:%d FMODE:%d\n"
-           "   SIOO:%1d DDRM:%1d\n",
-      (regval&QSPI_CCR_INSTRUCTION_MASK)>>QSPI_CCR_INSTRUCTION_SHIFT,
-      (regval&QSPI_CCR_IMODE_MASK)>>QSPI_CCR_IMODE_SHIFT,
-      (regval&QSPI_CCR_ADMODE_MASK)>>QSPI_CCR_ADMODE_SHIFT,
-      (regval&QSPI_CCR_ADSIZE_MASK)>>QSPI_CCR_ABSIZE_SHIFT,
-      (regval&QSPI_CCR_ABMODE_MASK)>>QSPI_CCR_ABMODE_SHIFT,
-      (regval&QSPI_CCR_ABSIZE_MASK)>>QSPI_CCR_ABSIZE_SHIFT,
-      (regval&QSPI_CCR_DCYC_MASK)>>QSPI_CCR_DCYC_SHIFT,
-      (regval&QSPI_CCR_DMODE_MASK)>>QSPI_CCR_DMODE_SHIFT,
-      (regval&QSPI_CCR_FMODE_MASK)>>QSPI_CCR_FMODE_SHIFT,
-      (regval&QSPI_CCR_SIOO)?1:0,
-      (regval&QSPI_CCR_DDRM)?1:0
-      );
+  spiinfo("CCR:%08x\n",regval);
+  spiinfo("   INST:%02x IMODE:%d ADMODE:%d ADSIZE:%d ABMODE:%d\n"
+          "   ABSIZE:%d DCYC:%d DMODE:%d FMODE:%d\n"
+          "   SIOO:%1d DDRM:%1d\n",
+          (regval & QSPI_CCR_INSTRUCTION_MASK) >> QSPI_CCR_INSTRUCTION_SHIFT,
+          (regval & QSPI_CCR_IMODE_MASK) >> QSPI_CCR_IMODE_SHIFT,
+          (regval & QSPI_CCR_ADMODE_MASK) >> QSPI_CCR_ADMODE_SHIFT,
+          (regval & QSPI_CCR_ADSIZE_MASK) >> QSPI_CCR_ABSIZE_SHIFT,
+          (regval & QSPI_CCR_ABMODE_MASK) >> QSPI_CCR_ABMODE_SHIFT,
+          (regval & QSPI_CCR_ABSIZE_MASK) >> QSPI_CCR_ABSIZE_SHIFT,
+          (regval & QSPI_CCR_DCYC_MASK) >> QSPI_CCR_DCYC_SHIFT,
+          (regval & QSPI_CCR_DMODE_MASK) >> QSPI_CCR_DMODE_SHIFT,
+          (regval & QSPI_CCR_FMODE_MASK) >> QSPI_CCR_FMODE_SHIFT,
+          (regval & QSPI_CCR_SIOO) ? 1 : 0,
+          (regval & QSPI_CCR_DDRM) ? 1 : 0);
 
   regval = getreg32(priv->base + STM32L4_QUADSPI_SR_OFFSET);    /* Status Register */
-  qspivdbg("SR:%08x\n",regval);
-  qspivdbg("  TEF:%1d TCF:%1d FTF:%1d SMF:%1d TOF:%1d BUSY:%1d FLEVEL:%d\n",
-      (regval&QSPI_SR_TEF)?1:0,
-      (regval&QSPI_SR_TCF)?1:0,
-      (regval&QSPI_SR_FTF)?1:0,
-      (regval&QSPI_SR_SMF)?1:0,
-      (regval&QSPI_SR_TOF)?1:0,
-      (regval&QSPI_SR_BUSY)?1:0,
-      (regval&QSPI_SR_FLEVEL_MASK)>>QSPI_SR_FLEVEL_SHIFT
-      );
+  spiinfo("SR:%08x\n",regval);
+  spiinfo("  TEF:%1d TCF:%1d FTF:%1d SMF:%1d TOF:%1d BUSY:%1d FLEVEL:%d\n",
+          (regval & QSPI_SR_TEF) ? 1 : 0,
+          (regval & QSPI_SR_TCF) ? 1 : 0,
+          (regval & QSPI_SR_FTF) ? 1 : 0,
+          (regval & QSPI_SR_SMF) ? 1 : 0,
+          (regval & QSPI_SR_TOF) ? 1 : 0,
+          (regval & QSPI_SR_BUSY) ? 1 : 0,
+          (regval & QSPI_SR_FLEVEL_MASK) >> QSPI_SR_FLEVEL_SHIFT);
 
 #else
-  qspivdbg("    CR:%08x   DCR:%08x   CCR:%08x    SR:%08x\n",
+  spiinfo("    CR:%08x   DCR:%08x   CCR:%08x    SR:%08x\n",
           getreg32(priv->base + STM32L4_QUADSPI_CR_OFFSET),     /* Control Register */
           getreg32(priv->base + STM32L4_QUADSPI_DCR_OFFSET),    /* Device Configuration Register */
           getreg32(priv->base + STM32L4_QUADSPI_CCR_OFFSET),    /* Communication Configuration Register */
           getreg32(priv->base + STM32L4_QUADSPI_SR_OFFSET));    /* Status Register */
-  qspivdbg("   DLR:%08x   ABR:%08x PSMKR:%08x PSMAR:%08x\n",
+  spiinfo("   DLR:%08x   ABR:%08x PSMKR:%08x PSMAR:%08x\n",
           getreg32(priv->base + STM32L4_QUADSPI_DLR_OFFSET),    /* Data Length Register */
           getreg32(priv->base + STM32L4_QUADSPI_ABR_OFFSET),    /* Alternate Bytes Register */
           getreg32(priv->base + STM32L4_QUADSPI_PSMKR_OFFSET),  /* Polling Status mask Register */
           getreg32(priv->base + STM32L4_QUADSPI_PSMAR_OFFSET)); /* Polling Status match Register */
-  qspivdbg("   PIR:%08x  LPTR:%08x\n",
+  spiinfo("   PIR:%08x  LPTR:%08x\n",
           getreg32(priv->base + STM32L4_QUADSPI_PIR_OFFSET),    /* Polling Interval Register */
           getreg32(priv->base + STM32L4_QUADSPI_LPTR_OFFSET));  /* Low-Power Timeout Register */
   (void)regval;
@@ -595,29 +571,29 @@ static void qspi_dumpregs(struct stm32l4_qspidev_s *priv, const char *msg)
 }
 #endif
 
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_GPIO)
+#if defined(CONFIG_DEBUG_SPI_INFO) && defined(CONFIG_DEBUG_GPIO)
 static void qspi_dumpgpioconfig(const char *msg)
 {
   uint32_t regval;
-  qspivdbg("%s:\n", msg);
+  spiinfo("%s:\n", msg);
 
   regval = getreg32(STM32L4_GPIOE_MODER);
-  qspivdbg("E_MODER:%08x\n",regval);
+  spiinfo("E_MODER:%08x\n",regval);
 
   regval = getreg32(STM32L4_GPIOE_OTYPER);
-  qspivdbg("E_OTYPER:%08x\n",regval);
+  spiinfo("E_OTYPER:%08x\n",regval);
 
   regval = getreg32(STM32L4_GPIOE_OSPEED);
-  qspivdbg("E_OSPEED:%08x\n",regval);
+  spiinfo("E_OSPEED:%08x\n",regval);
 
   regval = getreg32(STM32L4_GPIOE_PUPDR);
-  qspivdbg("E_PUPDR:%08x\n",regval);
+  spiinfo("E_PUPDR:%08x\n",regval);
 
   regval = getreg32(STM32L4_GPIOE_AFRL);
-  qspivdbg("E_AFRL:%08x\n",regval);
+  spiinfo("E_AFRL:%08x\n",regval);
 
   regval = getreg32(STM32L4_GPIOE_AFRH);
-  qspivdbg("E_AFRH:%08x\n",regval);
+  spiinfo("E_AFRH:%08x\n",regval);
 }
 #endif
 
@@ -728,21 +704,21 @@ static int qspi_setupxctnfromcmd(struct qspi_xctnspec_s *xctn,
 {
   DEBUGASSERT(xctn != NULL && cmdinfo != NULL);
 
-#ifdef CONFIG_DEBUG_SPI
-  qspivdbg("Transfer:\n");
-  qspivdbg("  flags: %02x\n", cmdinfo->flags);
-  qspivdbg("  cmd: %04x\n", cmdinfo->cmd);
+#ifdef CONFIG_DEBUG_SPI_INFO
+  spiinfo("Transfer:\n");
+  spiinfo("  flags: %02x\n", cmdinfo->flags);
+  spiinfo("  cmd: %04x\n", cmdinfo->cmd);
 
   if (QSPICMD_ISADDRESS(cmdinfo->flags))
     {
-      qspivdbg("  address/length: %08lx/%d\n",
+      spiinfo("  address/length: %08lx/%d\n",
               (unsigned long)cmdinfo->addr, cmdinfo->addrlen);
     }
 
   if (QSPICMD_ISDATA(cmdinfo->flags))
     {
-      qspivdbg("  %s Data:\n", QSPICMD_ISWRITE(cmdinfo->flags) ? "Write" : "Read");
-      qspivdbg("    buffer/length: %p/%d\n", cmdinfo->buffer, cmdinfo->buflen);
+      spiinfo("  %s Data:\n", QSPICMD_ISWRITE(cmdinfo->flags) ? "Write" : "Read");
+      spiinfo("    buffer/length: %p/%d\n", cmdinfo->buffer, cmdinfo->buflen);
     }
 #endif
 
@@ -852,14 +828,14 @@ static int qspi_setupxctnfrommem(struct qspi_xctnspec_s *xctn,
 {
   DEBUGASSERT(xctn != NULL && meminfo != NULL);
 
-#ifdef CONFIG_DEBUG_SPI
-  qspivdbg("Transfer:\n");
-  qspivdbg("  flags: %02x\n", meminfo->flags);
-  qspivdbg("  cmd: %04x\n", meminfo->cmd);
-  qspivdbg("  address/length: %08lx/%d\n",
+#ifdef CONFIG_DEBUG_SPI_INFO
+  spiinfo("Transfer:\n");
+  spiinfo("  flags: %02x\n", meminfo->flags);
+  spiinfo("  cmd: %04x\n", meminfo->cmd);
+  spiinfo("  address/length: %08lx/%d\n",
           (unsigned long)meminfo->addr, meminfo->addrlen);
-  qspivdbg("  %s Data:\n", QSPIMEM_ISWRITE(meminfo->flags) ? "Write" : "Read");
-  qspivdbg("    buffer/length: %p/%d\n", meminfo->buffer, meminfo->buflen);
+  spiinfo("  %s Data:\n", QSPIMEM_ISWRITE(meminfo->flags) ? "Write" : "Read");
+  spiinfo("    buffer/length: %p/%d\n", meminfo->buffer, meminfo->buflen);
 #endif
 
   DEBUGASSERT(meminfo->cmd < 256);
@@ -1091,7 +1067,7 @@ static void qspi_ccrconfig(struct stm32l4_qspidev_s *priv,
  *
  ****************************************************************************/
 
-static int qspi0_interrupt(int irq, void *context)
+static int qspi0_interrupt(int irq, void *context, FAR void *arg)
 {
   uint32_t status;
   uint32_t cr;
@@ -1472,7 +1448,7 @@ static int qspi_memory_dma(struct stm32l4_qspidev_s *priv,
                      (wdentry_t)qspi_dma_timeout, 1, (uint32_t)priv);
       if (ret != OK)
         {
-           qspidbg("ERROR: wd_start failed: %d\n", ret);
+           spierr("ERROR: wd_start failed: %d\n", ret);
         }
 
       /* Wait for the DMA complete */
@@ -1535,7 +1511,7 @@ static int qspi_memory_dma(struct stm32l4_qspidev_s *priv,
 
   if (priv->result)
     {
-      qspidbg("ERROR: DMA failed with result: %d\n", priv->result);
+      spierr("ERROR: DMA failed with result: %d\n", priv->result);
     }
 
   return priv->result;
@@ -1705,7 +1681,7 @@ static int qspi_lock(struct qspi_dev_s *dev, bool lock)
 {
   struct stm32l4_qspidev_s *priv = (struct stm32l4_qspidev_s *)dev;
 
-  qspivdbg("lock=%d\n", lock);
+  spiinfo("lock=%d\n", lock);
   if (lock)
     {
       /* Take the semaphore (perhaps waiting) */
@@ -1758,7 +1734,7 @@ static uint32_t qspi_setfrequency(struct qspi_dev_s *dev, uint32_t frequency)
       return 0;
     }
 
-  qspivdbg("frequency=%d\n", frequency);
+  spiinfo("frequency=%d\n", frequency);
   DEBUGASSERT(priv);
 
   /* Wait till BUSY flag reset */
@@ -1810,14 +1786,14 @@ static uint32_t qspi_setfrequency(struct qspi_dev_s *dev, uint32_t frequency)
   /* Calculate the new actual frequency */
 
   actual = STL32L4_QSPI_CLOCK / prescaler;
-  qspivdbg("prescaler=%d actual=%d\n", prescaler, actual);
+  spiinfo("prescaler=%d actual=%d\n", prescaler, actual);
 
   /* Save the frequency setting */
 
   priv->frequency = frequency;
   priv->actual    = actual;
 
-  qspivdbg("Frequency %d->%d\n", frequency, actual);
+  spiinfo("Frequency %d->%d\n", frequency, actual);
   return actual;
 }
 
@@ -1850,7 +1826,7 @@ static void qspi_setmode(struct qspi_dev_s *dev, enum qspi_mode_e mode)
     return;
   }
   
-  qspivdbg("mode=%d\n", mode);
+  spiinfo("mode=%d\n", mode);
 
   /* Has the mode changed? */
 
@@ -1880,14 +1856,14 @@ static void qspi_setmode(struct qspi_dev_s *dev, enum qspi_mode_e mode)
 
         case QSPIDEV_MODE1: /* CPOL=0; CPHA=1 */
         case QSPIDEV_MODE2: /* CPOL=1; CPHA=0 */
-          qspivdbg("unsupported mode=%d\n", mode);
+          spiinfo("unsupported mode=%d\n", mode);
         default:
           DEBUGASSERT(FALSE);
           return;
         }
 
       qspi_putreg(priv, regval, STM32L4_QUADSPI_DCR);
-      qspivdbg("DCR=%08x\n", regval);
+      spiinfo("DCR=%08x\n", regval);
 
       /* Save the mode so that subsequent re-configurations will be faster */
 
@@ -1917,7 +1893,7 @@ static void qspi_setbits(struct qspi_dev_s *dev, int nbits)
 
   if (8 != nbits)
     {
-      qspivdbg("unsupported nbits=%d\n", nbits);
+      spiinfo("unsupported nbits=%d\n", nbits);
       DEBUGASSERT(FALSE);
     }
 }
@@ -2456,7 +2432,7 @@ struct qspi_dev_s *stm32l4_qspi_initialize(int intf)
 
   /* The STM32L4 has only a single QSPI port */
 
-  qspivdbg("intf: %d\n", intf);
+  spiinfo("intf: %d\n", intf);
   DEBUGASSERT(intf == 0);
 
   /* Select the QSPI interface */
@@ -2497,7 +2473,7 @@ struct qspi_dev_s *stm32l4_qspi_initialize(int intf)
     }
   else
     {
-      qspidbg("ERROR: QSPI%d not supported\n", intf);
+      spierr("ERROR: QSPI%d not supported\n", intf);
       return NULL;
     }
 
@@ -2520,23 +2496,25 @@ struct qspi_dev_s *stm32l4_qspi_initialize(int intf)
           priv->dmach = stm32l4_dmachannel(DMACHAN_QUADSPI);
           if (!priv->dmach)
             {
-              qspidbg("ERROR: Failed to allocate the DMA channel\n");
+              spierr("ERROR: Failed to allocate the DMA channel\n");
               priv->candma = false;
             }
         }
 
       /* Initialize the QSPI semaphore that is used to wake up the waiting
-       * thread when the DMA transfer completes.
+       * thread when the DMA transfer completes.  This semaphore is used for
+       * signaling and, hence, should not have priority inheritance enabled.
        */
 
       sem_init(&priv->dmawait, 0, 0);
+      sem_setprotocol(&priv->dmawait, SEM_PRIO_NONE);
 
       /* Create a watchdog time to catch DMA timeouts */
 
       priv->dmadog = wd_create();
       if (priv->dmadog == NULL)
         {
-          qspidbg("ERROR: Failed to create wdog\n");
+          spierr("ERROR: Failed to create wdog\n");
           goto errout_with_dmahandles;
         }
 #endif
@@ -2544,17 +2522,20 @@ struct qspi_dev_s *stm32l4_qspi_initialize(int intf)
 #ifdef STM32L4_QSPI_INTERRUPTS
       /* Attach the interrupt handler */
 
-      ret = irq_attach(priv->irq, priv->handler);
+      ret = irq_attach(priv->irq, priv->handler, NULL);
       if (ret < 0)
         {
-          qspidbg("ERROR: Failed to attach irq %d\n", priv->irq);
+          spierr("ERROR: Failed to attach irq %d\n", priv->irq);
           goto errout_with_dmadog;
         }
 
-      /* Initialize the semaphore that blocks until the operation completes */
+      /* Initialize the semaphore that blocks until the operation completes.
+       * This semaphore is used for signaling and, hence, should not have
+       * priority inheritance enabled.
+       */
 
       sem_init(&priv->op_sem, 0, 0);
-
+      sem_setprotocol(&priv->op_sem, SEM_PRIO_NONE);
 #endif
 
       /* Perform hardware initialization.  Puts the QSPI into an active
@@ -2564,7 +2545,7 @@ struct qspi_dev_s *stm32l4_qspi_initialize(int intf)
       ret = qspi_hw_initialize(priv);
       if (ret < 0)
         {
-          qspidbg("ERROR: Failed to initialize QSPI hardware\n");
+          spierr("ERROR: Failed to initialize QSPI hardware\n");
           goto errout_with_irq;
         }
 
diff --git a/arch/arm/src/stm32l4/stm32l4_rcc.c b/arch/arm/src/stm32l4/stm32l4_rcc.c
index 0d51d7afd16a25cd3a1678ba96da8cab4f358bda..73abae16c5b2dbee1712f979c3fc7b6496391827 100644
--- a/arch/arm/src/stm32l4/stm32l4_rcc.c
+++ b/arch/arm/src/stm32l4/stm32l4_rcc.c
@@ -88,17 +88,68 @@
  * Public Functions
  ****************************************************************************/
 
-/************************************************************************************
+/****************************************************************************
+ * Name: rcc_resetbkp
+ *
+ * Description:
+ *   The RTC needs to reset the Backup Domain to change RTCSEL and resetting
+ *   the Backup Domain renders to disabling the LSE as consequence.   In order
+ *   to avoid resetting the Backup Domain when we already configured LSE we
+ *   will reset the Backup Domain early (here).
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_STM32L4_PWR) && defined(CONFIG_RTC)
+static inline void rcc_resetbkp(void)
+{
+  bool init_stat;
+
+  /* Check if the RTC is already configured */
+
+  init_stat = rtc_is_inits();
+  if(!init_stat)
+    {
+       /* Enable write access to the backup domain (RTC registers, RTC
+        * backup data registers and backup SRAM).
+        */
+
+      (void)stm32l4_pwr_enablebkp(true);
+
+      /* We might be changing RTCSEL - to ensure such changes work, we must
+       * reset the backup domain (having backed up the RTC_MAGIC token)
+       */
+
+       modifyreg32(STM32L4_RCC_BDCR, 0, RCC_BDCR_BDRST);
+       modifyreg32(STM32L4_RCC_BDCR, RCC_BDCR_BDRST, 0);
+
+       (void)stm32l4_pwr_enablebkp(false);
+    }
+}
+#else
+#  define rcc_resetbkp()
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
  * Name: stm32l4_clockconfig
  *
  * Description:
- *   Called to establish the clock settings based on the values in board.h.  This
- *   function (by default) will reset most everything, enable the PLL, and enable
- *   peripheral clocking for all periperipherals enabled in the NuttX configuration
- *   file.
+ *   Called to establish the clock settings based on the values in board.h.
+ *   This function (by default) will reset most everything, enable the PLL,
+ *   and enable peripheral clocking for all peripherals enabled in the NuttX
+ *   configuration file.
  *
- *   If CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG is defined, then clocking will
- *   be enabled by an externally provided, board-specific function called
+ *   If CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG is defined, then clocking
+ *   will be enabled by an externally provided, board-specific function called
  *   stm32l4_board_clockconfig().
  *
  * Input Parameters:
@@ -107,7 +158,7 @@
  * Returned Value:
  *   None
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 void stm32l4_clockconfig(void)
 {
@@ -115,6 +166,10 @@ void stm32l4_clockconfig(void)
 
   rcc_reset();
 
+  /* Reset backup domain if appropriate */
+
+  rcc_resetbkp();
+
 #if defined(CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG)
 
   /* Invoke Board Custom Clock Configuration */
diff --git a/arch/arm/src/stm32l4/stm32l4_rng.c b/arch/arm/src/stm32l4/stm32l4_rng.c
index b82c42fdc20a96b8dfdd3563c15f21a1d3ac9611..dd0f782f2d053263f02daa6d787987577d6d5529 100644
--- a/arch/arm/src/stm32l4/stm32l4_rng.c
+++ b/arch/arm/src/stm32l4/stm32l4_rng.c
@@ -47,19 +47,23 @@
 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 #include "up_arch.h"
 #include "chip/stm32l4_rng.h"
 #include "up_internal.h"
 
-#ifdef CONFIG_STM32L4_RNG
+#if defined(CONFIG_STM32L4_RNG)
+#if defined(CONFIG_DEV_RANDOM) || defined(CONFIG_DEV_URANDOM_ARCH)
 
 /****************************************************************************
  * Private Function Prototypes
  ****************************************************************************/
 
-static int stm32l4_rnginitialize(void);
-static int stm32l4_rnginterrupt(int irq, void *context);
+static int stm32l4_rng_initialize(void);
+static int stm32l4_rnginterrupt(int irq, void *context, FAR void *arg);
 static void stm32l4_rngenable(void);
 static void stm32l4_rngdisable(void);
 static ssize_t stm32l4_rngread(struct file *filep, char *buffer, size_t);
@@ -105,19 +109,19 @@ static const struct file_operations g_rngops =
  * Private functions
  ****************************************************************************/
 
-static int stm32l4_rnginitialize(void)
+static int stm32l4_rng_initialize(void)
 {
-  vdbg("Initializing RNG\n");
+  _info("Initializing RNG\n");
 
   memset(&g_rngdev, 0, sizeof(struct rng_dev_s));
 
   sem_init(&g_rngdev.rd_devsem, 0, 1);
 
-  if (irq_attach(STM32L4_IRQ_RNG, stm32l4_rnginterrupt))
+  if (irq_attach(STM32L4_IRQ_RNG, stm32l4_rnginterrupt, NULL))
     {
       /* We could not attach the ISR to the interrupt */
 
-      vdbg("Could not attach IRQ.\n");
+      _info("Could not attach IRQ.\n");
 
       return -EAGAIN;
     }
@@ -153,7 +157,7 @@ static void stm32l4_rngdisable()
   putreg32(regval, STM32L4_RNG_CR);
 }
 
-static int stm32l4_rnginterrupt(int irq, void *context)
+static int stm32l4_rnginterrupt(int irq, void *context, FAR void *arg)
 {
   uint32_t rngsr;
   uint32_t data;
@@ -256,11 +260,14 @@ static ssize_t stm32l4_rngread(struct file *filep, char *buffer, size_t buflen)
     {
       /* We've got the device semaphore, proceed with reading */
 
-      /* Initialize the operation semaphore with 0 for blocking until
-       * the buffer is filled from interrupts.
+      /* Initialize the operation semaphore with 0 for blocking until the
+       * buffer is filled from interrupts.  The waitsem semaphore is used
+       * for signaling and, hence, should not have priority inheritance
+       * enabled.
        */
 
       sem_init(&g_rngdev.rd_readsem, 0, 0);
+      sem_setprotocol(&g_rngdev.rd_readsem, SEM_PRIO_NONE);
 
       g_rngdev.rd_buflen = buflen;
       g_rngdev.rd_buf = buffer;
@@ -289,10 +296,52 @@ static ssize_t stm32l4_rngread(struct file *filep, char *buffer, size_t buflen)
  * Public Functions
  ****************************************************************************/
 
-void up_rnginitialize(void)
+/****************************************************************************
+ * Name: devrandom_register
+ *
+ * Description:
+ *   Initialize the RNG hardware and register the /dev/random driver.
+ *   Must be called BEFORE devurandom_register.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEV_RANDOM
+void devrandom_register(void)
+{
+  stm32l4_rng_initialize();
+  (void)register_driver("/dev/random", &g_rngops, 0444, NULL);
+}
+#endif
+
+/****************************************************************************
+ * Name: devurandom_register
+ *
+ * Description:
+ *   Register /dev/urandom
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEV_URANDOM_ARCH
+void devurandom_register(void)
 {
-  stm32l4_rnginitialize();
-  register_driver("/dev/random", &g_rngops, 0444, NULL);
+#ifndef CONFIG_DEV_RANDOM
+  stm32l4_rng_initialize();
+#endif
+  (void)register_driver("/dev/urandom", &g_rngops, 0444, NULL);
 }
+#endif
 
+#endif /* CONFIG_DEV_RANDOM || CONFIG_DEV_URANDOM_ARCH */
 #endif /* CONFIG_STM32L4_RNG */
diff --git a/arch/arm/src/stm32l4/stm32l4_rtc.h b/arch/arm/src/stm32l4/stm32l4_rtc.h
index b155bef8b0b692729cf6fca6d82155d473ae110d..404f8325ad5b5b99ac5d79bfe3866b09b956f70e 100644
--- a/arch/arm/src/stm32l4/stm32l4_rtc.h
+++ b/arch/arm/src/stm32l4/stm32l4_rtc.h
@@ -54,8 +54,8 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-#define STM32_RTC_PRESCALER_SECOND  32767  /* Default prescaler to get a second base */
-#define STM32_RTC_PRESCALER_MIN         1  /* Maximum speed of 16384 Hz */
+#define STM32L4_RTC_PRESCALER_SECOND  32767  /* Default prescaler to get a second base */
+#define STM32L4_RTC_PRESCALER_MIN         1  /* Maximum speed of 16384 Hz */
 
 /****************************************************************************
  * Public Types
@@ -105,6 +105,26 @@ extern "C"
  * Public Functions
  ****************************************************************************/
 
+/************************************************************************************
+ * Name: rtc_is_inits
+ *
+ * Description:
+ *    Returns 'true' if the RTC has been initialized (according to the RTC itself).
+ *    It will be 'false' if the RTC has never been initialized since first time power
+ *    up, and the counters are stopped until it is first initialized.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   bool -- true if the INITS flag is set in the ISR.
+ *
+ ************************************************************************************/
+#ifdef CONFIG_RTC_DRIVER
+bool rtc_is_inits(void);
+#endif
+
+
 /****************************************************************************
  * Name: stm32l4_rtc_getdatetime_with_subseconds
  *
@@ -126,7 +146,7 @@ extern "C"
  *
  ****************************************************************************/
 
-#ifdef CONFIG_STM32_HAVE_RTC_SUBSECONDS
+#ifdef CONFIG_STM32L4_HAVE_RTC_SUBSECONDS
 int stm32l4_rtc_getdatetime_with_subseconds(FAR struct tm *tp, FAR long *nsec);
 #endif
 
diff --git a/arch/arm/src/stm32l4/stm32l4_rtc_lowerhalf.c b/arch/arm/src/stm32l4/stm32l4_rtc_lowerhalf.c
index 558aa2533beda44f0cf1e448c767c00193514540..437faf54f1363a8b2545032d7801d1fe139fa3ff 100644
--- a/arch/arm/src/stm32l4/stm32l4_rtc_lowerhalf.c
+++ b/arch/arm/src/stm32l4/stm32l4_rtc_lowerhalf.c
@@ -57,7 +57,7 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-#define STM32_NALARMS 2
+#define STM32L4_NALARMS 2
 
 /****************************************************************************
  * Private Types
@@ -93,7 +93,7 @@ struct stm32l4_lowerhalf_s
 #ifdef CONFIG_RTC_ALARM
   /* Alarm callback information */
 
-  struct stm32l4_cbinfo_s cbinfo[STM32_NALARMS];
+  struct stm32l4_cbinfo_s cbinfo[STM32L4_NALARMS];
 #endif
 };
 
@@ -200,7 +200,7 @@ static void stm32l4_alarm_callback(FAR void *arg, unsigned int alarmid)
 #endif /* CONFIG_RTC_ALARM */
 
 /****************************************************************************
- * Name: stm32_rdtime
+ * Name: stm32l4_rdtime
  *
  * Description:
  *   Implements the rdtime() method of the RTC driver interface
diff --git a/arch/arm/src/stm32l4/stm32l4_rtcc.c b/arch/arm/src/stm32l4/stm32l4_rtcc.c
index eab4fa45e8103d08423db232406fbdfd3f48cc92..a0221240f7868cb419d6b8edcd9bb15869581b54 100644
--- a/arch/arm/src/stm32l4/stm32l4_rtcc.c
+++ b/arch/arm/src/stm32l4/stm32l4_rtcc.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * arch/arm/src/stm32l4/stm32l4_rtcc.c
  *
- *   Copyright (C) 2012-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *           dev@ziggurat29.com (adaptations to stm32l4)
  *
@@ -83,10 +83,6 @@
 #  error "CONFIG_STM32L4_PWR must selected to use this driver"
 #endif
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_RTC
-#endif
-
 #if !defined(CONFIG_RTC_MAGIC)
 # define CONFIG_RTC_MAGIC (0xfacefeee)
 #endif
@@ -116,20 +112,6 @@
 
 #define RTC_ALRMR_ENABLE              (0x80000000)
 
-/* Debug ****************************************************************************/
-
-#ifdef CONFIG_DEBUG_RTC
-#  define rtcdbg    dbg
-#  define rtcvdbg   vdbg
-#  define rtclldbg  lldbg
-#  define rtcllvdbg llvdbg
-#else
-#  define rtcdbg(x...)
-#  define rtcvdbg(x...)
-#  define rtclldbg(x...)
-#  define rtcllvdbg(x...)
-#endif
-
 /************************************************************************************
  * Private Types
  ************************************************************************************/
@@ -152,6 +134,7 @@ struct alm_cbinfo_s
 /* Callback to use when an EXTI is activated  */
 
 static struct alm_cbinfo_s g_alarmcb[RTC_ALARM_LAST];
+static bool g_alarm_enabled;  /* True: Alarm interrupts are enabled */
 #endif
 
 /************************************************************************************
@@ -171,6 +154,7 @@ static int rtchw_check_alrawf(void);
 static int rtchw_check_alrbwf(void);
 static int rtchw_set_alrmar(rtc_alarmreg_t alarmreg);
 static int rtchw_set_alrmbr(rtc_alarmreg_t alarmreg);
+static inline void rtc_enable_alarm(void);
 #endif
 
 /************************************************************************************
@@ -191,27 +175,27 @@ static int rtchw_set_alrmbr(rtc_alarmreg_t alarmreg);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_RTC
+#ifdef CONFIG_DEBUG_RTC_INFO
 static void rtc_dumpregs(FAR const char *msg)
 {
-  rtclldbg("%s:\n", msg);
-  rtclldbg("      TR: %08x\n", getreg32(STM32L4_RTC_TR));
-  rtclldbg("      DR: %08x\n", getreg32(STM32L4_RTC_DR));
-  rtclldbg("      CR: %08x\n", getreg32(STM32L4_RTC_CR));
-  rtclldbg("     ISR: %08x\n", getreg32(STM32L4_RTC_ISR));
-  rtclldbg("    PRER: %08x\n", getreg32(STM32L4_RTC_PRER));
-  rtclldbg("    WUTR: %08x\n", getreg32(STM32L4_RTC_WUTR));
+  rtcinfo("%s:\n", msg);
+  rtcinfo("      TR: %08x\n", getreg32(STM32L4_RTC_TR));
+  rtcinfo("      DR: %08x\n", getreg32(STM32L4_RTC_DR));
+  rtcinfo("      CR: %08x\n", getreg32(STM32L4_RTC_CR));
+  rtcinfo("     ISR: %08x\n", getreg32(STM32L4_RTC_ISR));
+  rtcinfo("    PRER: %08x\n", getreg32(STM32L4_RTC_PRER));
+  rtcinfo("    WUTR: %08x\n", getreg32(STM32L4_RTC_WUTR));
   
-  rtclldbg("  ALRMAR: %08x\n", getreg32(STM32L4_RTC_ALRMAR));
-  rtclldbg("  ALRMBR: %08x\n", getreg32(STM32L4_RTC_ALRMBR));
-  rtclldbg("  SHIFTR: %08x\n", getreg32(STM32L4_RTC_SHIFTR));
-  rtclldbg("    TSTR: %08x\n", getreg32(STM32L4_RTC_TSTR));
-  rtclldbg("    TSDR: %08x\n", getreg32(STM32L4_RTC_TSDR));
-  rtclldbg("   TSSSR: %08x\n", getreg32(STM32L4_RTC_TSSSR));
-  rtclldbg("    CALR: %08x\n", getreg32(STM32L4_RTC_CALR));
-  rtclldbg("  TAMPCR: %08x\n", getreg32(STM32L4_RTC_TAMPCR));
-  rtclldbg("ALRMASSR: %08x\n", getreg32(STM32L4_RTC_ALRMASSR));
-  rtclldbg("ALRMBSSR: %08x\n", getreg32(STM32L4_RTC_ALRMBSSR));
+  rtcinfo("  ALRMAR: %08x\n", getreg32(STM32L4_RTC_ALRMAR));
+  rtcinfo("  ALRMBR: %08x\n", getreg32(STM32L4_RTC_ALRMBR));
+  rtcinfo("  SHIFTR: %08x\n", getreg32(STM32L4_RTC_SHIFTR));
+  rtcinfo("    TSTR: %08x\n", getreg32(STM32L4_RTC_TSTR));
+  rtcinfo("    TSDR: %08x\n", getreg32(STM32L4_RTC_TSDR));
+  rtcinfo("   TSSSR: %08x\n", getreg32(STM32L4_RTC_TSSSR));
+  rtcinfo("    CALR: %08x\n", getreg32(STM32L4_RTC_CALR));
+  rtcinfo("  TAMPCR: %08x\n", getreg32(STM32L4_RTC_TAMPCR));
+  rtcinfo("ALRMASSR: %08x\n", getreg32(STM32L4_RTC_ALRMASSR));
+  rtcinfo("ALRMBSSR: %08x\n", getreg32(STM32L4_RTC_ALRMBSSR));
 }
 #else
 #  define rtc_dumpregs(msg)
@@ -231,52 +215,27 @@ static void rtc_dumpregs(FAR const char *msg)
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_RTC
+#ifdef CONFIG_DEBUG_RTC_INFO
 static void rtc_dumptime(FAR const struct tm *tp, FAR const char *msg)
 {
-  rtclldbg("%s:\n", msg);
+  rtcinfo("%s:\n", msg);
 #if 0
-  rtclldbg("  tm_sec: %08x\n", tp->tm_sec);
-  rtclldbg("  tm_min: %08x\n", tp->tm_min);
-  rtclldbg(" tm_hour: %08x\n", tp->tm_hour);
-  rtclldbg(" tm_mday: %08x\n", tp->tm_mday);
-  rtclldbg("  tm_mon: %08x\n", tp->tm_mon);
-  rtclldbg(" tm_year: %08x\n", tp->tm_year);
+  rtcinfo("  tm_sec: %08x\n", tp->tm_sec);
+  rtcinfo("  tm_min: %08x\n", tp->tm_min);
+  rtcinfo(" tm_hour: %08x\n", tp->tm_hour);
+  rtcinfo(" tm_mday: %08x\n", tp->tm_mday);
+  rtcinfo("  tm_mon: %08x\n", tp->tm_mon);
+  rtcinfo(" tm_year: %08x\n", tp->tm_year);
 #else
-  rtclldbg("  tm: %04d-%02d-%02d %02d:%02d:%02d\n",
-           tp->tm_year+1900, tp->tm_mon+1, tp->tm_mday,
-           tp->tm_hour, tp->tm_min, tp->tm_sec);
+  rtcinfo("  tm: %04d-%02d-%02d %02d:%02d:%02d\n",
+          tp->tm_year+1900, tp->tm_mon+1, tp->tm_mday,
+          tp->tm_hour, tp->tm_min, tp->tm_sec);
 #endif
 }
 #else
 #  define rtc_dumptime(tp, msg)
 #endif
 
-/************************************************************************************
- * Name: rtc_is_inits
- *
- * Description:
- *    Returns 'true' if the RTC has been initialized (according to the RTC itself).
- *    It will be 'false' if the RTC has never been initialized since first time power
- *    up, and the counters are stopped until it is first initialized.
- *
- * Input Parameters:
- *   None
- *
- * Returned Value:
- *   bool -- true if the INITS flag is set in the ISR.
- *
- ************************************************************************************/
-
-static bool rtc_is_inits(void)
-{
-  uint32_t regval;
-
-  regval = getreg32(STM32L4_RTC_ISR);
-
-  return (regval & RTC_ISR_INITS) ? true : false;
-}
-
 /************************************************************************************
  * Name: rtc_wprunlock
  *
@@ -553,7 +512,7 @@ static void rtc_resume(void)
  ************************************************************************************/
 
 #ifdef CONFIG_RTC_ALARM
-static int stm32l4_rtc_alarm_handler(int irq, void *context)
+static int stm32l4_rtc_alarm_handler(int irq, FAR void *context, FAR void *rtc_handler_arg)
 {
   FAR struct alm_cbinfo_s *cbinfo;
   alm_callback_t cb;
@@ -703,7 +662,7 @@ static int rtchw_check_alrbwf(void)
 #endif
 
 /************************************************************************************
- * Name: stm32_rtchw_set_alrmXr X is a or b
+ * Name: stm32l4_rtchw_set_alrmXr X is a or b
  *
  * Description:
  *   Set the alarm (A or B) hardware registers, using the required hardware access
@@ -750,7 +709,7 @@ static int rtchw_set_alrmar(rtc_alarmreg_t alarmreg)
 
   putreg32(alarmreg, STM32L4_RTC_ALRMAR);
   putreg32(0, STM32L4_RTC_ALRMASSR);
-  rtcvdbg("  TR: %08x ALRMAR: %08x\n",
+  rtcinfo("  TR: %08x ALRMAR: %08x\n",
           getreg32(STM32L4_RTC_TR), getreg32(STM32L4_RTC_ALRMAR));
 
   /* Enable RTC alarm A */
@@ -796,7 +755,7 @@ static int rtchw_set_alrmbr(rtc_alarmreg_t alarmreg)
 
   putreg32(alarmreg, STM32L4_RTC_ALRMBR);
   putreg32(0, STM32L4_RTC_ALRMBSSR);
-  rtcvdbg("  TR: %08x ALRMBR: %08x\n",
+  rtcinfo("  TR: %08x ALRMBR: %08x\n",
           getreg32(STM32L4_RTC_TR), getreg32(STM32L4_RTC_ALRMBR));
 
   /* Enable RTC alarm B */
@@ -809,10 +768,74 @@ rtchw_set_alrmbr_exit:
 }
 #endif
 
+/****************************************************************************
+ * Name: rtc_enable_alarm
+ *
+ * Description:
+ *   Enable ALARM interrupts
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RTC_ALARM
+static inline void rtc_enable_alarm(void)
+{
+  /* Is the alarm already enabled? */
+
+  if (!g_alarm_enabled)
+    {
+      /* Configure RTC interrupt to catch alarm interrupts. All RTC
+       * interrupts are connected to the EXTI controller.  To enable the
+       * RTC Alarm interrupt, the following sequence is required:
+       *
+       * 1. Configure and enable the EXTI Line 18 in interrupt mode and
+       *    select the rising edge sensitivity.
+       *    EXTI line 19 RTC Tamper or Timestamp or CSS_LSE
+       *    EXTI line 20 RTC Wakeup
+       * 2. Configure and enable the RTC_Alarm IRQ channel in the NVIC.
+       * 3. Configure the RTC to generate RTC alarms (Alarm A or Alarm B).
+       */
+
+      (void)stm32l4_exti_alarm(true, false, true, stm32l4_rtc_alarm_handler, NULL);
+      g_alarm_enabled = true;
+    }
+}
+#endif
+
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
+/************************************************************************************
+ * Name: rtc_is_inits
+ *
+ * Description:
+ *    Returns 'true' if the RTC has been initialized (according to the RTC itself).
+ *    It will be 'false' if the RTC has never been initialized since first time power
+ *    up, and the counters are stopped until it is first initialized.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   bool -- true if the INITS flag is set in the ISR.
+ *
+ ************************************************************************************/
+
+bool rtc_is_inits(void)
+{
+  uint32_t regval;
+
+  regval = getreg32(STM32L4_RTC_ISR);
+
+  return (regval & RTC_ISR_INITS) ? true : false;
+}
+
 /************************************************************************************
  * Name: up_rtc_initialize
  *
@@ -850,13 +873,6 @@ int up_rtc_initialize(void)
 
       (void)stm32l4_pwr_enablebkp(true);
 
-#if 0
-      /* Do not reset the backup domain; you will lose your clock setup done in *rcc.c */
-
-      modifyreg32(STM32L4_RCC_BDCR, 0, RCC_BDCR_BDRST);
-      modifyreg32(STM32L4_RCC_BDCR, RCC_BDCR_BDRST, 0);
-#endif
-
 #if defined(CONFIG_STM32L4_RTC_HSECLOCK)
       modifyreg32(STM32L4_RCC_BDCR, RCC_BDCR_RTCSEL_MASK, RCC_BDCR_RTCSEL_HSE);
 #elif defined(CONFIG_STM32L4_RTC_LSICLOCK)
@@ -974,22 +990,6 @@ int up_rtc_initialize(void)
       (void)stm32l4_pwr_enablebkp(false);
     }
 
-#ifdef CONFIG_RTC_ALARM
-  /* Configure RTC interrupt to catch alarm interrupts. All RTC interrupts are
-   * connected to the EXTI controller.  To enable the RTC Alarm interrupt, the
-   * following sequence is required:
-   *
-   * 1. Configure and enable the EXTI Line 18 in interrupt mode and select the
-   *    rising edge sensitivity.
-   *    EXTI line 19 RTC Tamper or Timestamp or CSS_LSE
-   *    EXTI line 20 RTC Wakeup
-   * 2. Configure and enable the RTC_Alarm IRQ channel in the NVIC.
-   * 3. Configure the RTC to generate RTC alarms (Alarm A or Alarm B).
-   */
-
-  stm32l4_exti_alarm(true, false, true, stm32l4_rtc_alarm_handler);
-#endif
-
   g_rtc_enabled = true;
   rtc_dumpregs("After Initialization");
 
@@ -1266,6 +1266,10 @@ int stm32l4_rtc_setalarm(FAR struct alm_setalarm_s *alminfo)
   ASSERT(alminfo != NULL);
   DEBUGASSERT(RTC_ALARM_LAST > alminfo->as_id);
 
+  /* Make sure the the alarm interrupt is enabled at the NVIC */
+
+  rtc_enable_alarm();
+
   /* REVISIT:  Should test that the time is in the future */
 
   rtc_dumptime(&alminfo->as_time, "New alarm time");
@@ -1274,7 +1278,7 @@ int stm32l4_rtc_setalarm(FAR struct alm_setalarm_s *alminfo)
 
   alarmreg = rtc_reg_alrmr_bin2bcd(&alminfo->as_time);
 
-  /* Set the alarm in hardware and enable interrupts */
+  /* Set the alarm in hardware and enable interrupts from the RTC */
 
   switch (alminfo->as_id)
     {
@@ -1309,7 +1313,7 @@ int stm32l4_rtc_setalarm(FAR struct alm_setalarm_s *alminfo)
         break;
 
       default:
-        rtcvdbg("ERROR: Invalid ALARM%d\n", alminfo->as_id);
+        rtcerr("ERROR: Invalid ALARM%d\n", alminfo->as_id);
         break;
     }
 
@@ -1409,7 +1413,7 @@ int stm32l4_rtc_cancelalarm(enum alm_id_e alarmid)
         break;
 
       default:
-        rtcvdbg("ERROR: Invalid ALARM%d\n", alarmid);
+        rtcerr("ERROR: Invalid ALARM%d\n", alarmid);
         break;
     }
 
diff --git a/arch/arm/src/stm32l4/stm32l4_sai.c b/arch/arm/src/stm32l4/stm32l4_sai.c
new file mode 100644
index 0000000000000000000000000000000000000000..f57f2ee593c8078ef1a51caca73462cdc3c88a70
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_sai.c
@@ -0,0 +1,1450 @@
+/****************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_sai.c
+ *
+ *   Copyright (C) 2013-2014, 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *   Copyright (c) 2016 Motorola Mobility, LLC. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "stm32l4_dma.h"
+#include "stm32l4_gpio.h"
+#include "stm32l4_sai.h"
+
+#ifdef CONFIG_STM32L4_SAI
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef CONFIG_SCHED_WORKQUEUE
+#  error Work queue support is required (CONFIG_SCHED_WORKQUEUE)
+#endif
+
+#ifndef CONFIG_AUDIO
+#  error CONFIG_AUDIO required by this driver
+#endif
+
+#ifndef CONFIG_I2S
+#  error CONFIG_I2S required by this driver
+#endif
+
+#ifdef CONFIG_STM32L4_SAI_POLLING
+#  error "Polling SAI not yet supported"
+#endif
+
+#ifdef CONFIG_STM32L4_SAI_INTERRUPTS
+#  error "Interrupt driven SAI not yet supported"
+#endif
+
+#ifndef CONFIG_STM32L4_SAI_DEFAULT_SAMPLERATE
+#  define CONFIG_STM32L4_SAI_DEFAULT_SAMPLERATE  (48000)
+#endif
+
+#ifndef CONFIG_STM32L4_SAI_DEFAULT_DATALEN
+#  define CONFIG_STM32L4_SAI_DEFAULT_DATALEN     (16)
+#endif
+
+#ifndef CONFIG_STM32L4_SAI_MAXINFLIGHT
+#  define CONFIG_STM32L4_SAI_MAXINFLIGHT         (16)
+#endif
+
+#ifdef CONFIG_STM32L4_SAI_DMA
+/* SAI DMA priority */
+
+#  if defined(CONFIG_STM32L4_SAI_DMAPRIO)
+#    define SAI_DMA_PRIO       CONFIG_STM32L4_SAI_DMAPRIO
+#  else
+#    define SAI_DMA_PRIO       DMA_CCR_PRIMED
+#  endif
+
+#  if (SAI_DMA_PRIO & ~DMA_CCR_PL_MASK) != 0
+#    error "Illegal value for CONFIG_STM32L4_SAI_DMAPRIO"
+#  endif
+
+/* DMA channel configuration */
+
+#  define SAI_RXDMA8_CONFIG    (SAI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS |DMA_CCR_MINC            )
+#  define SAI_RXDMA16_CONFIG   (SAI_DMA_PRIO|DMA_CCR_MSIZE_16BITS|DMA_CCR_PSIZE_16BITS|DMA_CCR_MINC            )
+#  define SAI_RXDMA32_CONFIG   (SAI_DMA_PRIO|DMA_CCR_MSIZE_32BITS|DMA_CCR_PSIZE_32BITS|DMA_CCR_MINC            )
+#  define SAI_TXDMA8_CONFIG    (SAI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS |DMA_CCR_MINC|DMA_CCR_DIR)
+#  define SAI_TXDMA16_CONFIG   (SAI_DMA_PRIO|DMA_CCR_MSIZE_16BITS|DMA_CCR_PSIZE_16BITS|DMA_CCR_MINC|DMA_CCR_DIR)
+#  define SAI_TXDMA32_CONFIG   (SAI_DMA_PRIO|DMA_CCR_MSIZE_32BITS|DMA_CCR_PSIZE_32BITS|DMA_CCR_MINC|DMA_CCR_DIR)
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* I2S buffer container */
+
+struct sai_buffer_s
+{
+  struct sai_buffer_s *flink;  /* Supports a singly linked list */
+  i2s_callback_t callback;     /* Function to call when the transfer completes */
+  uint32_t timeout;            /* The timeout value to use with transfers */
+  void *arg;                   /* The argument to be returned with the callback */
+  struct ap_buffer_s *apb;     /* The audio buffer */
+  int result;                  /* The result of the transfer */
+};
+
+/* The state of the one SAI peripheral */
+
+struct stm32l4_sai_s
+{
+  struct i2s_dev_s dev;        /* Externally visible I2S interface */
+  uintptr_t base;              /* SAI block register base address */
+  sem_t exclsem;               /* Assures mutually exclusive acess to SAI */
+  uint32_t frequency;          /* SAI clock frequency */
+  uint32_t syncen;             /* Synchronization setting */
+#ifdef CONFIG_STM32L4_SAI_DMA
+  uint16_t dma_ch;             /* DMA channel number */
+  DMA_HANDLE dma;              /* DMA channel handle */
+  uint32_t dma_ccr;            /* DMA control register */
+#endif
+  uint8_t datalen;             /* Data width */
+  uint32_t samplerate;         /* Data sample rate */
+  uint8_t rxenab:1;            /* True: RX transfers enabled */
+  uint8_t txenab:1;            /* True: TX transfers enabled */
+  WDOG_ID dog;                 /* Watchdog that handles timeouts */
+  sq_queue_t pend;             /* A queue of pending transfers */
+  sq_queue_t act;              /* A queue of active transfers */
+  sq_queue_t done;             /* A queue of completed transfers */
+  struct work_s work;          /* Supports worker thread operations */
+
+  /* Pre-allocated pool of buffer containers */
+
+  sem_t bufsem;                   /* Buffer wait semaphore */
+  struct sai_buffer_s *freelist;  /* A list a free buffer containers */
+  struct sai_buffer_s containers[CONFIG_STM32L4_SAI_MAXINFLIGHT];
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+#ifdef CONFIG_DEBUG_I2S_INFO
+static void     sai_dump_regs(struct stm32l4_sai_s *priv, const char *msg);
+#else
+#  define       sai_dump_regs(s,m)
+#endif
+
+/* Semaphore helpers */
+
+static void     sai_exclsem_take(struct stm32l4_sai_s *priv);
+#define         sai_exclsem_give(priv) sem_post(&priv->exclsem)
+
+static void     sai_bufsem_take(struct stm32l4_sai_s *priv);
+#define         sai_bufsem_give(priv) sem_post(&priv->bufsem)
+
+/* Buffer container helpers */
+
+static struct sai_buffer_s *
+                sai_buf_allocate(struct stm32l4_sai_s *priv);
+static void     sai_buf_free(struct stm32l4_sai_s *priv,
+                  struct sai_buffer_s *bfcontainer);
+static void     sai_buf_initialize(struct stm32l4_sai_s *priv);
+
+/* DMA support */
+
+#ifdef CONFIG_STM32L4_SAI_DMA
+static void     sai_schedule(struct stm32l4_sai_s *priv, int result);
+static void     sai_dma_callback(DMA_HANDLE handle, uint8_t isr, void *arg);
+#endif
+
+/* I2S methods */
+
+static uint32_t sai_samplerate(struct i2s_dev_s *dev, uint32_t rate);
+static uint32_t sai_datawidth(struct i2s_dev_s *dev, int bits);
+static int      sai_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
+                  i2s_callback_t callback, void *arg, uint32_t timeout);
+static int      sai_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
+                  i2s_callback_t callback, void *arg,
+                  uint32_t timeout);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* I2S device operations */
+
+static const struct i2s_ops_s g_i2sops =
+{
+  /* Receiver methods */
+
+  .i2s_rxsamplerate = sai_samplerate,
+  .i2s_rxdatawidth  = sai_datawidth,
+  .i2s_receive      = sai_receive,
+
+  /* Transmitter methods */
+
+  .i2s_txsamplerate = sai_samplerate,
+  .i2s_txdatawidth  = sai_datawidth,
+  .i2s_send         = sai_send,
+};
+
+/* SAI1 state */
+
+#ifdef CONFIG_STM32L4_SAI1_A
+static struct stm32l4_sai_s g_sai1a_priv =
+{
+  .dev.ops     = &g_i2sops,
+  .base        = STM32L4_SAI1_A_BASE,
+  .frequency   = STM32L4_SAI1_FREQUENCY,
+#ifdef CONFIG_STM32L4_SAI1_A_SYNC_WITH_B
+  .syncen      = SAI_CR1_SYNCEN_SYNC_INT,
+#else
+  .syncen      = SAI_CR1_SYNCEN_ASYNC,
+#endif
+#ifdef CONFIG_STM32L4_SAI_DMA
+  .dma_ch      = DMACHAN_SAI1_A,
+#endif
+  .datalen     = CONFIG_STM32L4_SAI_DEFAULT_DATALEN,
+  .samplerate  = CONFIG_STM32L4_SAI_DEFAULT_SAMPLERATE,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_SAI1_B
+static struct stm32l4_sai_s g_sai1b_priv =
+{
+  .dev.ops     = &g_i2sops,
+  .base        = STM32L4_SAI1_B_BASE,
+  .frequency   = STM32L4_SAI1_FREQUENCY,
+#ifdef CONFIG_STM32L4_SAI1_B_SYNC_WITH_A
+  .syncen      = SAI_CR1_SYNCEN_SYNC_INT,
+#else
+  .syncen      = SAI_CR1_SYNCEN_ASYNC,
+#endif
+#ifdef CONFIG_STM32L4_SAI_DMA
+  .dma_ch      = DMACHAN_SAI1_B,
+#endif
+  .datalen     = CONFIG_STM32L4_SAI_DEFAULT_DATALEN,
+  .samplerate  = CONFIG_STM32L4_SAI_DEFAULT_SAMPLERATE,
+};
+#endif
+
+/* SAI2 state */
+
+#ifdef CONFIG_STM32L4_SAI2_A
+static struct stm32l4_sai_s g_sai2a_priv =
+{
+  .dev.ops     = &g_i2sops,
+  .base        = STM32L4_SAI2_A_BASE,
+  .frequency   = STM32L4_SAI2_FREQUENCY,
+#ifdef CONFIG_STM32L4_SAI2_A_SYNC_WITH_B
+  .syncen      = SAI_CR1_SYNCEN_SYNC_INT,
+#else
+  .syncen      = SAI_CR1_SYNCEN_ASYNC,
+#endif
+#ifdef CONFIG_STM32L4_SAI_DMA
+  .dma_ch      = DMACHAN_SAI2_A,
+#endif
+  .datalen     = CONFIG_STM32L4_SAI_DEFAULT_DATALEN,
+  .samplerate  = CONFIG_STM32L4_SAI_DEFAULT_SAMPLERATE,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_SAI2_B
+static struct stm32l4_sai_s g_sai2b_priv =
+{
+  .dev.ops     = &g_i2sops,
+  .base        = STM32L4_SAI2_B_BASE,
+  .frequency   = STM32L4_SAI2_FREQUENCY,
+#ifdef CONFIG_STM32L4_SAI2_B_SYNC_WITH_A
+  .syncen      = SAI_CR1_SYNCEN_SYNC_INT,
+#else
+  .syncen      = SAI_CR1_SYNCEN_ASYNC,
+#endif
+#ifdef CONFIG_STM32L4_SAI_DMA
+  .dma_ch      = DMACHAN_SAI2_B,
+#endif
+  .datalen     = CONFIG_STM32L4_SAI_DEFAULT_DATALEN,
+  .samplerate  = CONFIG_STM32L4_SAI_DEFAULT_SAMPLERATE,
+};
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sai_getbitrate
+ *
+ * Description:
+ *   Get the currently configured bitrate
+ *
+ * Input Parameters:
+ *   priv   - private SAI device structure
+ *
+ * Returned Value:
+ *   The current bitrate
+ *
+ ****************************************************************************/
+
+static inline uint32_t sai_getbitrate(struct stm32l4_sai_s *priv)
+{
+  /* Calculate the bitrate in Hz */
+
+  return priv->samplerate * priv->datalen;
+}
+
+/****************************************************************************
+ * Name: sai_getreg
+ *
+ * Description:
+ *   Get the contents of the SAI register at offset
+ *
+ * Input Parameters:
+ *   priv   - private SAI device structure
+ *   offset - offset to the register of interest
+ *
+ * Returned Value:
+ *   The contents of the 32-bit register
+ *
+ ****************************************************************************/
+
+static inline uint32_t sai_getreg(struct stm32l4_sai_s *priv, uint8_t offset)
+{
+  return getreg32(priv->base + offset);
+}
+
+/****************************************************************************
+ * Name: sai_putreg
+ *
+ * Description:
+ *   Write a 16-bit value to the SAI register at offset
+ *
+ * Input Parameters:
+ *   priv   - private SAI device structure
+ *   offset - offset to the register of interest
+ *   value  - the 32-bit value to be written
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static inline void sai_putreg(struct stm32l4_sai_s *priv, uint8_t offset,
+                              uint32_t value)
+{
+  putreg32(value, priv->base + offset);
+}
+
+/************************************************************************************
+ * Name: sai_modifyreg
+ *
+ * Description:
+ *   Clear and set bits in the SAI register at offset
+ *
+ * Input Parameters:
+ *   priv    - private SAI device structure
+ *   offset  - offset to the register of interest
+ *   clrbits - The bits to clear
+ *   setbits - The bits to set
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+static void sai_modifyreg(struct stm32l4_sai_s *priv, uint8_t offset,
+                          uint32_t clrbits, uint32_t setbits)
+{
+  uint32_t regval;
+
+  regval  = sai_getreg(priv, offset);
+  regval &= ~clrbits;
+  regval |= setbits;
+  sai_putreg(priv, offset, regval);
+}
+
+/****************************************************************************
+ * Name: sai_dump_regs
+ *
+ * Description:
+ *   Dump the contents of all SAI block registers
+ *
+ * Input Parameters:
+ *   priv - The SAI block controller to dump
+ *   msg - Message to print before the register data
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEBUG_I2S_INFO
+static void sai_dump_regs(struct stm32l4_sai_s *priv, const char *msg)
+{
+  if (msg)
+      i2sinfo("%s\n", msg);
+
+  i2sinfo("CR1:%08x CR2:%08x  FRCR:%08x SLOTR:%08x\n",
+          sai_getreg(priv, STM32L4_SAI_CR1_OFFSET),
+          sai_getreg(priv, STM32L4_SAI_CR2_OFFSET),
+          sai_getreg(priv, STM32L4_SAI_FRCR_OFFSET),
+          sai_getreg(priv, STM32L4_SAI_SLOTR_OFFSET));
+  i2sinfo(" IM:%08x  SR:%08x CLRFR:%08x\n",
+          sai_getreg(priv, STM32L4_SAI_IM_OFFSET),
+          sai_getreg(priv, STM32L4_SAI_SR_OFFSET),
+          sai_getreg(priv, STM32L4_SAI_CLRFR_OFFSET));
+}
+#endif
+
+/****************************************************************************
+ * Name: sai_exclsem_take
+ *
+ * Description:
+ *   Take the exclusive access semaphore handling any exceptional conditions
+ *
+ * Input Parameters:
+ *   priv - A reference to the SAI peripheral state
+ *
+ * Returned Value:
+ *  None
+ *
+ ****************************************************************************/
+
+static void sai_exclsem_take(struct stm32l4_sai_s *priv)
+{
+  int ret;
+
+  /* Wait until we successfully get the semaphore.  EINTR is the only
+   * expected 'failure' (meaning that the wait for the semaphore was
+   * interrupted by a signal).
+   */
+
+  do
+    {
+      ret = sem_wait(&priv->exclsem);
+      DEBUGASSERT(ret == 0 || errno == EINTR);
+    }
+  while (ret < 0);
+}
+
+/****************************************************************************
+ * Name: sai_mckdivider
+ *
+ * Description:
+ *   Setup the master clock divider based on the currently selected data width
+ *   and the sample rate
+ *
+ * Input Parameter:
+ *   priv - SAI device structure (only the sample rate and frequency are
+ *          needed at this point).
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void sai_mckdivider(struct stm32l4_sai_s *priv)
+{
+  uint8_t mckdiv;
+
+  DEBUGASSERT(priv && priv->samplerate > 0 && priv->frequency > 0);
+
+  /* Configure Master Clock using the following formula:
+   * MCLK_x = SAI_CK_x / (MCKDIV[3:0] * 2) with MCLK_x = 256 * FS
+   * FS = SAI_CK_x / (MCKDIV[3:0] * 2) * 256
+   * MCKDIV[3:0] = SAI_CK_x / FS * 512
+   */
+
+  mckdiv = priv->frequency / (priv->samplerate * 2 * 256);
+
+  sai_modifyreg(priv, STM32L4_SAI_CR1_OFFSET, SAI_CR1_MCKDIV_MASK,
+                mckdiv << SAI_CR1_MCKDIV_SHIFT);
+}
+
+/****************************************************************************
+ * Name: sai_timeout
+ *
+ * Description:
+ *   The watchdog timeout without completion of the transfer.
+ *
+ * Input Parameters:
+ *   argc   - The number of arguments (should be 1)
+ *   arg    - The argument (state structure reference cast to uint32_t)
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Always called from the interrupt level with interrupts disabled.
+ *
+ ****************************************************************************/
+
+static void sai_timeout(int argc, uint32_t arg)
+{
+  struct stm32l4_sai_s *priv = (struct stm32l4_sai_s *)arg;
+  DEBUGASSERT(priv != NULL);
+
+#ifdef CONFIG_STM32L4_SAI_DMA
+  /* Cancel the DMA */
+
+  stm32l4_dmastop(priv->dma);
+#endif
+
+  /* Then schedule completion of the transfer to occur on the worker thread. */
+
+  sai_schedule(priv, -ETIMEDOUT);
+}
+
+/****************************************************************************
+ * Name: sai_dma_setup
+ *
+ * Description:
+ *   Setup and initiate the next DMA transfer
+ *
+ * Input Parameters:
+ *   priv - SAI state instance
+ *
+ * Returned Value:
+ *   OK on success; a negated errno value on failure
+ *
+ * Assumptions:
+ *   Interrupts are disabled
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32L4_SAI_DMA
+static int sai_dma_setup(struct stm32l4_sai_s *priv)
+{
+  struct sai_buffer_s *bfcontainer;
+  struct ap_buffer_s *apb;
+  uintptr_t samp;
+  apb_samp_t nbytes;
+  size_t ntransfers = 0;
+  int ret;
+
+  /* If there is already an active transmission in progress, then bail
+   * returning success.
+   */
+
+  if (!sq_empty(&priv->act))
+    {
+      return OK;
+    }
+
+  /* If there are no pending transfer, then bail returning success */
+
+  if (sq_empty(&priv->pend))
+    {
+      priv->txenab = priv->rxenab = false;
+      return OK;
+    }
+
+  /* Remove the pending transfer at the head of the pending queue. */
+
+  bfcontainer = (struct sai_buffer_s *)sq_remfirst(&priv->pend);
+  DEBUGASSERT(bfcontainer && bfcontainer->apb);
+
+  apb = bfcontainer->apb;
+
+  /* Get the transfer information, accounting for any data offset */
+
+  samp = (uintptr_t)&apb->samp[apb->curbyte];
+
+  /* Configure the DMA */
+
+  if (priv->txenab)
+    {
+      nbytes = apb->nbytes - apb->curbyte;
+
+      switch (priv->datalen)
+        {
+          case 8:
+            priv->dma_ccr = SAI_TXDMA8_CONFIG;
+            ntransfers = nbytes;
+            break;
+
+          case 16:
+            priv->dma_ccr = SAI_TXDMA16_CONFIG;
+            DEBUGASSERT((nbytes & 0x1) == 0);
+            ntransfers = nbytes >> 1;
+            break;
+
+          case 32:
+            priv->dma_ccr = SAI_TXDMA32_CONFIG;
+            DEBUGASSERT((nbytes & 0x3) == 0);
+            ntransfers = nbytes >> 2;
+            break;
+        }
+    }
+  else if (priv->rxenab)
+    {
+      nbytes = apb->nmaxbytes - apb->curbyte;
+
+      switch (priv->datalen)
+        {
+          case 8:
+            priv->dma_ccr = SAI_RXDMA8_CONFIG;
+            ntransfers = nbytes;
+            break;
+
+          case 16:
+            priv->dma_ccr = SAI_RXDMA16_CONFIG;
+            DEBUGASSERT((nbytes & 0x1) == 0);
+            ntransfers = nbytes >> 1;
+            break;
+
+          case 32:
+            priv->dma_ccr = SAI_RXDMA32_CONFIG;
+            DEBUGASSERT((nbytes & 0x3) == 0);
+            ntransfers = nbytes >> 2;
+            break;
+        }
+    }
+
+  DEBUGASSERT(ntransfers > 0);
+
+  stm32l4_dmasetup(priv->dma, priv->base + STM32L4_SAI_DR_OFFSET,
+                 samp, ntransfers, priv->dma_ccr);
+
+  /* Add the container to the list of active DMAs */
+
+  sq_addlast((sq_entry_t *)bfcontainer, &priv->act);
+
+  /* Start the DMA, saving the container as the current active transfer */
+
+  stm32l4_dmastart(priv->dma, sai_dma_callback, priv, false);
+
+  /* Enable the transmitter */
+
+  sai_modifyreg(priv, STM32L4_SAI_CR1_OFFSET, 0, SAI_CR1_SAIEN);
+
+  /* Start a watchdog to catch DMA timeouts */
+
+  if (bfcontainer->timeout > 0)
+    {
+      ret = wd_start(priv->dog, bfcontainer->timeout, (wdentry_t)sai_timeout,
+                     1, (uint32_t)priv);
+
+      /* Check if we have successfully started the watchdog timer.  Note
+       * that we do nothing in the case of failure to start the timer.  We
+       * are already committed to the DMA anyway.  Let's just hope that the
+       * DMA does not hang.
+       */
+
+      if (ret < 0)
+        {
+          i2serr("ERROR: wd_start failed: %d\n", ret);
+        }
+    }
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: sai_worker
+ *
+ * Description:
+ *   Transfer done worker
+ *
+ * Input Parameters:
+ *   arg - the SAI device instance cast to void*
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void sai_worker(void *arg)
+{
+  struct stm32l4_sai_s *priv = (struct stm32l4_sai_s *)arg;
+  struct sai_buffer_s *bfcontainer;
+  irqstate_t flags;
+
+  DEBUGASSERT(priv);
+
+  /* When the transfer was started, the active buffer containers were removed
+   * from the pend queue and saved in the act queue.  We get here when the
+   * transfer is finished... either successfully, with an error, or with a
+   * timeout.
+   *
+   * In any case, the buffer containers in act will be moved to the end
+   * of the done queue and act will be emptied before this worker is
+   * started.
+   */
+
+  i2sinfo("act.head=%p done.head=%p\n", priv->act.head, priv->done.head);
+
+  /* Check if IDLE */
+
+  if (sq_empty(&priv->act))
+    {
+      /* Then start the next transfer.  This must be done with interrupts
+       * disabled.
+       */
+
+      flags = enter_critical_section();
+#ifdef CONFIG_STM32L4_SAI_DMA
+      (void)sai_dma_setup(priv);
+#endif
+      leave_critical_section(flags);
+    }
+
+  /* Process each buffer in the done queue */
+
+  while (sq_peek(&priv->done) != NULL)
+    {
+      /* Remove the buffer container from the done queue.  NOTE that
+       * interupts must be enabled to do this because the done queue is
+       * also modified from the interrupt level.
+       */
+
+      flags = enter_critical_section();
+      bfcontainer = (struct sai_buffer_s *)sq_remfirst(&priv->done);
+      leave_critical_section(flags);
+
+      /* Perform the transfer done callback */
+
+      DEBUGASSERT(bfcontainer && bfcontainer->callback);
+      bfcontainer->callback(&priv->dev, bfcontainer->apb,
+                            bfcontainer->arg, bfcontainer->result);
+
+      /* Release our reference on the audio buffer.  This may very likely
+       * cause the audio buffer to be freed.
+       */
+
+      apb_free(bfcontainer->apb);
+
+      /* And release the buffer container */
+
+      sai_buf_free(priv, bfcontainer);
+    }
+}
+
+/****************************************************************************
+ * Name: sai_schedule
+ *
+ * Description:
+ *   An transfer completion or timeout has occurred.  Schedule processing on
+ *   the working thread.
+ *
+ * Input Parameters:
+ *   priv   - SAI state instance
+ *   result - The result of the transfer
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   - Interrupts are disabled
+ *   - The timeout has been canceled.
+ *
+ ****************************************************************************/
+
+static void sai_schedule(struct stm32l4_sai_s *priv, int result)
+{
+  struct sai_buffer_s *bfcontainer;
+  int ret;
+
+  /* Move all entries from the act queue to the done queue */
+
+  while (!sq_empty(&priv->act))
+    {
+      /* Remove the next buffer container from the act list */
+
+      bfcontainer = (struct sai_buffer_s *)sq_remfirst(&priv->act);
+
+      /* Report the result of the transfer */
+
+      bfcontainer->result = result;
+
+      /* Add the completed buffer container to the tail of the done queue */
+
+      sq_addlast((sq_entry_t *)bfcontainer, &priv->done);
+    }
+
+  /* If the worker has completed running, then reschedule the working thread.
+   * REVISIT:  There may be a race condition here.  So we do nothing is the
+   * worker is not available.
+   */
+
+  if (work_available(&priv->work))
+    {
+      /* Schedule the done processing to occur on the worker thread. */
+
+      ret = work_queue(HPWORK, &priv->work, sai_worker, priv, 0);
+      if (ret != 0)
+        {
+          i2serr("ERROR: Failed to queue work: %d\n", ret);
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: sai_dma_callback
+ *
+ * Description:
+ *   This callback function is invoked at the completion of the SAI DMA.
+ *
+ * Input Parameters:
+ *   handle - The DMA handler
+ *   isr    - The interrupt status of the DMA transfer
+ *   arg    - A pointer to the SAI state instance
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32L4_SAI_DMA
+static void sai_dma_callback(DMA_HANDLE handle, uint8_t isr, void *arg)
+{
+  struct stm32l4_sai_s *priv = (struct stm32l4_sai_s *)arg;
+  DEBUGASSERT(priv);
+
+  /* Cancel the watchdog timeout */
+
+  (void)wd_cancel(priv->dog);
+
+  /* Then schedule completion of the transfer to occur on the worker thread */
+
+  sai_schedule(priv, (isr & DMA_CHAN_TEIF_BIT) ? -EIO : OK);
+}
+#endif
+
+/****************************************************************************
+ * Name: sai_samplerate
+ *
+ * Description:
+ *   Set the I2S RX/TX sample rate.
+ *
+ * Input Parameters:
+ *   dev  - Device-specific state data
+ *   rate - The I2S sample rate in samples (not bits) per second
+ *
+ * Returned Value:
+ *   Returns the resulting bitrate
+ *
+ ****************************************************************************/
+
+static uint32_t sai_samplerate(struct i2s_dev_s *dev, uint32_t rate)
+{
+  struct stm32l4_sai_s *priv = (struct stm32l4_sai_s *)dev;
+
+  DEBUGASSERT(priv && rate > 0);
+
+  /* Save the new sample rate and update the divider */
+
+  priv->samplerate = rate;
+  sai_mckdivider(priv);
+
+  return sai_getbitrate(priv);
+}
+
+/****************************************************************************
+ * Name: sai_datawidth
+ *
+ * Description:
+ *   Set the I2S data width.  The bitrate is determined by
+ *   sample_rate * data_width.
+ *
+ * Input Parameters:
+ *   dev   - Device-specific state data
+ *   width - The I2S data with in bits.
+ *
+ * Returned Value:
+ *   Returns the resulting bitrate
+ *
+ ****************************************************************************/
+
+static uint32_t sai_datawidth(struct i2s_dev_s *dev, int bits)
+{
+  struct stm32l4_sai_s *priv = (struct stm32l4_sai_s *)dev;
+  uint32_t setbits;
+
+  DEBUGASSERT(priv && bits >= 8);
+
+  switch (bits)
+    {
+      case 8:
+        setbits = SAI_CR1_DS_8BITS;
+        break;
+
+      case 16:
+        setbits = SAI_CR1_DS_16BITS;
+        break;
+
+      case 32:
+        setbits = SAI_CR1_DS_32BITS;
+        break;
+
+      default:
+        i2serr("ERROR: Unsupported or invalid data width: %d\n", bits);
+        return 0;
+    }
+
+  sai_modifyreg(priv, STM32L4_SAI_CR1_OFFSET, SAI_CR1_DS_MASK, setbits);
+
+  sai_modifyreg(priv, STM32L4_SAI_FRCR_OFFSET,
+                SAI_FRCR_FSALL_MASK | SAI_FRCR_FRL_MASK,
+                SAI_FRCR_FSALL(bits) | SAI_FRCR_FRL(bits * 2));
+
+  /* Save the new data width */
+
+  priv->datalen = bits;
+
+  return sai_getbitrate(priv);
+}
+
+/****************************************************************************
+ * Name: sai_receive
+ *
+ * Description:
+ *   Receive a block of data from I2S.
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   apb      - A pointer to the audio buffer in which to recieve data
+ *   callback - A user provided callback function that will be called at
+ *              the completion of the transfer.  The callback will be
+ *              performed in the context of the worker thread.
+ *   arg      - An opaque argument that will be provided to the callback
+ *              when the transfer complete
+ *   timeout  - The timeout value to use.  The transfer will be canceled
+ *              and an ETIMEDOUT error will be reported if this timeout
+ *              elapsed without completion of the DMA transfer.  Units
+ *              are system clock ticks.  Zero means no timeout.
+ *
+ * Returned Value:
+ *   OK on success; a negated errno value on failure.  NOTE:  This function
+ *   only enqueues the transfer and returns immediately.  Success here only
+ *   means that the transfer was enqueued correctly.
+ *
+ *   When the transfer is complete, a 'result' value will be provided as
+ *   an argument to the callback function that will indicate if the transfer
+ *   failed.
+ *
+ ****************************************************************************/
+
+static int sai_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
+                       i2s_callback_t callback, void *arg, uint32_t timeout)
+{
+  struct stm32l4_sai_s *priv = (struct stm32l4_sai_s *)dev;
+  struct sai_buffer_s *bfcontainer;
+  uint32_t mode;
+  irqstate_t flags;
+  int ret;
+
+  DEBUGASSERT(priv && apb);
+  i2sinfo("apb=%p nbytes=%d arg=%p timeout=%d\n",
+          apb, apb->nbytes - apb->curbyte, arg, timeout);
+
+  /* Allocate a buffer container in advance */
+
+  bfcontainer = sai_buf_allocate(priv);
+  DEBUGASSERT(bfcontainer);
+
+  /* Get exclusive access to the SAI driver data */
+
+  sai_exclsem_take(priv);
+
+  /* Verify not already TX'ing */
+
+  if (priv->txenab)
+    {
+      i2serr("ERROR: SAI has no receiver\n");
+      ret = -EAGAIN;
+      goto errout_with_exclsem;
+    }
+
+  mode = priv->syncen ? SAI_CR1_MODE_SLAVE_RX : SAI_CR1_MODE_MASTER_RX;
+  sai_modifyreg(priv, STM32L4_SAI_CR1_OFFSET, SAI_CR1_MODE_MASK, mode);
+  priv->rxenab = true;
+
+  /* Add a reference to the audio buffer */
+
+  apb_reference(apb);
+
+  /* Initialize the buffer container structure */
+
+  bfcontainer->callback = (void *)callback;
+  bfcontainer->timeout  = timeout;
+  bfcontainer->arg      = arg;
+  bfcontainer->apb      = apb;
+  bfcontainer->result   = -EBUSY;
+
+  /* Add the buffer container to the end of the pending queue */
+
+  flags = enter_critical_section();
+  sq_addlast((sq_entry_t *)bfcontainer, &priv->pend);
+
+  /* Then start the next transfer.  If there is already a transfer in progess,
+   * then this will do nothing.
+   */
+
+#ifdef CONFIG_STM32L4_SAI_DMA
+  ret = sai_dma_setup(priv);
+#endif
+  DEBUGASSERT(ret == OK);
+  leave_critical_section(flags);
+  sai_exclsem_give(priv);
+  return OK;
+
+errout_with_exclsem:
+  sai_exclsem_give(priv);
+  sai_buf_free(priv, bfcontainer);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sai_send
+ *
+ * Description:
+ *   Send a block of data on I2S.
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   apb      - A pointer to the audio buffer from which to send data
+ *   callback - A user provided callback function that will be called at
+ *              the completion of the transfer.  The callback will be
+ *              performed in the context of the worker thread.
+ *   arg      - An opaque argument that will be provided to the callback
+ *              when the transfer complete
+ *   timeout  - The timeout value to use.  The transfer will be canceled
+ *              and an ETIMEDOUT error will be reported if this timeout
+ *              elapsed without completion of the DMA transfer.  Units
+ *              are system clock ticks.  Zero means no timeout.
+ *
+ * Returned Value:
+ *   OK on success; a negated errno value on failure.  NOTE:  This function
+ *   only enqueues the transfer and returns immediately.  Success here only
+ *   means that the transfer was enqueued correctly.
+ *
+ *   When the transfer is complete, a 'result' value will be provided as
+ *   an argument to the callback function that will indicate if the transfer
+ *   failed.
+ *
+ ****************************************************************************/
+
+static int sai_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
+                    i2s_callback_t callback, void *arg, uint32_t timeout)
+{
+  struct stm32l4_sai_s *priv = (struct stm32l4_sai_s *)dev;
+  struct sai_buffer_s *bfcontainer;
+  uint32_t mode;
+  irqstate_t flags;
+  int ret;
+
+  DEBUGASSERT(priv && apb);
+  i2sinfo("apb=%p nbytes=%d arg=%p timeout=%d\n",
+          apb, apb->nbytes - apb->curbyte, arg, timeout);
+
+  /* Allocate a buffer container in advance */
+
+  bfcontainer = sai_buf_allocate(priv);
+  DEBUGASSERT(bfcontainer);
+
+  /* Get exclusive access to the SAI driver data */
+
+  sai_exclsem_take(priv);
+
+  /* Verify not already RX'ing */
+
+  if (priv->rxenab)
+    {
+      i2serr("ERROR: SAI has no transmitter\n");
+      ret = -EAGAIN;
+      goto errout_with_exclsem;
+    }
+
+  mode = priv->syncen ? SAI_CR1_MODE_SLAVE_TX : SAI_CR1_MODE_MASTER_TX;
+  sai_modifyreg(priv, STM32L4_SAI_CR1_OFFSET, SAI_CR1_MODE_MASK, mode);
+  priv->txenab = true;
+
+  /* Add a reference to the audio buffer */
+
+  apb_reference(apb);
+
+  /* Initialize the buffer container structure */
+
+  bfcontainer->callback = (void *)callback;
+  bfcontainer->timeout  = timeout;
+  bfcontainer->arg      = arg;
+  bfcontainer->apb      = apb;
+  bfcontainer->result   = -EBUSY;
+
+  /* Add the buffer container to the end of the pending queue */
+
+  flags = enter_critical_section();
+  sq_addlast((sq_entry_t *)bfcontainer, &priv->pend);
+
+  /* Then start the next transfer.  If there is already a transfer in progess,
+   * then this will do nothing.
+   */
+
+#ifdef CONFIG_STM32L4_SAI_DMA
+  ret = sai_dma_setup(priv);
+#endif
+  DEBUGASSERT(ret == OK);
+  leave_critical_section(flags);
+  sai_exclsem_give(priv);
+  return OK;
+
+errout_with_exclsem:
+  sai_exclsem_give(priv);
+  sai_buf_free(priv, bfcontainer);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sai_bufsem_take
+ *
+ * Description:
+ *   Take the buffer semaphore handling any exceptional conditions
+ *
+ * Input Parameters:
+ *   priv - A reference to the SAI peripheral state
+ *
+ * Returned Value:
+ *  None
+ *
+ ****************************************************************************/
+
+static void sai_bufsem_take(struct stm32l4_sai_s *priv)
+{
+  int ret;
+
+  /* Wait until we successfully get the semaphore.  EINTR is the only
+   * expected 'failure' (meaning that the wait for the semaphore was
+   * interrupted by a signal).
+   */
+
+  do
+    {
+      ret = sem_wait(&priv->bufsem);
+      DEBUGASSERT(ret == 0 || errno == EINTR);
+    }
+  while (ret < 0);
+}
+
+/****************************************************************************
+ * Name: sai_buf_allocate
+ *
+ * Description:
+ *   Allocate a buffer container by removing the one at the head of the
+ *   free list
+ *
+ * Input Parameters:
+ *   priv - SAI state instance
+ *
+ * Returned Value:
+ *   A non-NULL pointer to the allocate buffer container on success; NULL if
+ *   there are no available buffer containers.
+ *
+ * Assumptions:
+ *   The caller does NOT have exclusive access to the SAI state structure.
+ *   That would result in a deadlock!
+ *
+ ****************************************************************************/
+
+static struct sai_buffer_s *sai_buf_allocate(struct stm32l4_sai_s *priv)
+{
+  struct sai_buffer_s *bfcontainer;
+  irqstate_t flags;
+
+  /* Set aside a buffer container.  By doing this, we guarantee that we will
+   * have at least one free buffer container.
+   */
+
+  sai_bufsem_take(priv);
+
+  /* Get the buffer from the head of the free list */
+
+  flags = enter_critical_section();
+  bfcontainer = priv->freelist;
+  ASSERT(bfcontainer);
+
+  /* Unlink the buffer from the freelist */
+
+  priv->freelist = bfcontainer->flink;
+  leave_critical_section(flags);
+  return bfcontainer;
+}
+
+/****************************************************************************
+ * Name: sai_buf_free
+ *
+ * Description:
+ *   Free buffer container by adding it to the head of the free list
+ *
+ * Input Parameters:
+ *   priv - SAI state instance
+ *   bfcontainer - The buffer container to be freed
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   The caller has exclusive access to the SAI state structure
+ *
+ ****************************************************************************/
+
+static void sai_buf_free(struct stm32l4_sai_s *priv, struct sai_buffer_s *bfcontainer)
+{
+  irqstate_t flags;
+
+  /* Put the buffer container back on the free list */
+
+  flags = enter_critical_section();
+  bfcontainer->flink  = priv->freelist;
+  priv->freelist = bfcontainer;
+  leave_critical_section(flags);
+
+  /* Wake up any threads waiting for a buffer container */
+
+  sai_bufsem_give(priv);
+}
+
+/****************************************************************************
+ * Name: sai_buf_initialize
+ *
+ * Description:
+ *   Initialize the buffer container allocator by adding all of the
+ *   pre-allocated buffer containers to the free list
+ *
+ * Input Parameters:
+ *   priv - SAI state instance
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Called early in SAI initialization so that there are no issues with
+ *   concurrency.
+ *
+ ****************************************************************************/
+
+static void sai_buf_initialize(struct stm32l4_sai_s *priv)
+{
+  int i;
+
+  priv->freelist = NULL;
+  sem_init(&priv->bufsem, 0, CONFIG_STM32L4_SAI_MAXINFLIGHT);
+
+  for (i = 0; i < CONFIG_STM32L4_SAI_MAXINFLIGHT; i++)
+    {
+      sai_buf_free(priv, &priv->containers[i]);
+    }
+}
+
+/****************************************************************************
+ * Name: sai_portinitialize
+ *
+ * Description:
+ *   Initialize the selected SAI port in its default state
+ *
+ * Input Parameter:
+ *   priv   - private SAI device structure
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void sai_portinitialize(struct stm32l4_sai_s *priv)
+{
+  sai_dump_regs(priv, "Before initialization");
+
+  sem_init(&priv->exclsem, 0, 1);
+
+  /* Create a watchdog timer to catch transfer timeouts */
+
+  priv->dog = wd_create();
+  ASSERT(priv->dog);
+
+  /* Initialize buffering */
+
+  sai_buf_initialize(priv);
+
+  /* Configure the master clock divider */
+
+  sai_mckdivider(priv);
+
+  /* Configure the data width */
+
+  sai_datawidth((struct i2s_dev_s *)priv, CONFIG_STM32L4_SAI_DEFAULT_DATALEN);
+
+#ifdef CONFIG_STM32L4_SAI_DMA
+  /* Get DMA channel */
+
+  priv->dma = stm32l4_dmachannel(priv->dma_ch);
+  DEBUGASSERT(priv->dma);
+
+  sai_modifyreg(priv, STM32L4_SAI_CR1_OFFSET, 0, SAI_CR1_DMAEN);
+#endif
+
+  sai_modifyreg(priv, STM32L4_SAI_CR1_OFFSET, SAI_CR1_SYNCEN_MASK, priv->syncen);
+
+  sai_modifyreg(priv, STM32L4_SAI_CR2_OFFSET, SAI_CR2_FTH_MASK, SAI_CR2_FTH_1QF);
+
+  sai_modifyreg(priv, STM32L4_SAI_FRCR_OFFSET,
+                SAI_FRCR_FSDEF | SAI_FRCR_FSPOL | SAI_FRCR_FSOFF,
+                SAI_FRCR_FSDEF_CHID | SAI_FRCR_FSPOL_LOW | SAI_FRCR_FSOFF_BFB);
+
+  sai_modifyreg(priv, STM32L4_SAI_SLOTR_OFFSET,
+                SAI_SLOTR_NBSLOT_MASK | SAI_SLOTR_SLOTEN_MASK,
+                SAI_SLOTR_NBSLOT(2) | SAI_SLOTR_SLOTEN_0 | SAI_SLOTR_SLOTEN_1);
+
+  sai_dump_regs(priv, "After initialization");
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_sai_initialize
+ *
+ * Description:
+ *   Initialize the selected SAI block
+ *
+ * Input Parameter:
+ *   intf - I2S interface number (identifying the "logical" SAI interface)
+ *
+ * Returned Value:
+ *   Valid I2S device structure reference on success; a NULL on failure
+ *
+ ****************************************************************************/
+
+struct i2s_dev_s *stm32l4_sai_initialize(int intf)
+{
+  struct stm32l4_sai_s *priv;
+  irqstate_t flags;
+
+  flags = enter_critical_section();
+
+  switch (intf)
+    {
+#ifdef CONFIG_STM32L4_SAI1_A
+      case SAI1_BLOCK_A:
+        {
+          i2sinfo("SAI1 Block A Selected\n");
+          priv = &g_sai1a_priv;
+
+          stm32l4_configgpio(GPIO_SAI1_SD_A);
+#  ifndef CONFIG_STM32L4_SAI1_A_SYNC_WITH_B
+          stm32l4_configgpio(GPIO_SAI1_FS_A);
+          stm32l4_configgpio(GPIO_SAI1_SCK_A);
+          stm32l4_configgpio(GPIO_SAI1_MCLK_A);
+#  endif
+          break;
+        }
+#endif
+#ifdef CONFIG_STM32L4_SAI1_B
+      case SAI1_BLOCK_B:
+        {
+          i2sinfo("SAI1 Block B Selected\n");
+          priv = &g_sai1b_priv;
+
+          stm32l4_configgpio(GPIO_SAI1_SD_B);
+#  ifndef CONFIG_STM32L4_SAI1_B_SYNC_WITH_A
+          stm32l4_configgpio(GPIO_SAI1_FS_B);
+          stm32l4_configgpio(GPIO_SAI1_SCK_B);
+          stm32l4_configgpio(GPIO_SAI1_MCLK_B);
+#  endif
+          break;
+        }
+#endif
+#ifdef CONFIG_STM32L4_SAI2_A
+      case SAI2_BLOCK_A:
+        {
+          i2sinfo("SAI2 Block A Selected\n");
+          priv = &g_sai2a_priv;
+
+          stm32l4_configgpio(GPIO_SAI2_SD_A);
+#  ifndef CONFIG_STM32L4_SAI2_A_SYNC_WITH_B
+          stm32l4_configgpio(GPIO_SAI2_FS_A);
+          stm32l4_configgpio(GPIO_SAI2_SCK_A);
+          stm32l4_configgpio(GPIO_SAI2_MCLK_A);
+#  endif
+          break;
+        }
+#endif
+#ifdef CONFIG_STM32L4_SAI2_B
+      case SAI2_BLOCK_B:
+        {
+          i2sinfo("SAI2 Block B Selected\n");
+          priv = &g_sai2b_priv;
+
+          stm32l4_configgpio(GPIO_SAI2_SD_B);
+#  ifndef CONFIG_STM32L4_SAI2_B_SYNC_WITH_A
+          stm32l4_configgpio(GPIO_SAI2_FS_B);
+          stm32l4_configgpio(GPIO_SAI2_SCK_B);
+          stm32l4_configgpio(GPIO_SAI2_MCLK_B);
+#  endif
+          break;
+        }
+#endif
+      default:
+        {
+          i2sinfo("No SAI interface defined\n");
+          goto err;
+        }
+    }
+
+  sai_portinitialize(priv);
+  leave_critical_section(flags);
+
+  return &priv->dev;
+
+err:
+  leave_critical_section(flags);
+  return NULL;
+}
+
+#endif
diff --git a/arch/arm/src/stm32l4/stm32l4_sai.h b/arch/arm/src/stm32l4/stm32l4_sai.h
new file mode 100644
index 0000000000000000000000000000000000000000..b1b4955185e8921c08303341117361c35a80c820
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_sai.h
@@ -0,0 +1,94 @@
+/******************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_sai.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Copyright (c) 2016 Motorola Mobility, LLC. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32L4_STM32L4_SAI_H
+#define __ARCH_ARM_SRC_STM32L4_STM32L4_SAI_H
+
+/******************************************************************************
+ * Included Files
+ ******************************************************************************/
+
+#include 
+
+#include "chip.h"
+#include "chip/stm32l4_sai.h"
+
+#include 
+
+/******************************************************************************
+ * Pre-processor definitions
+ ******************************************************************************/
+
+#define SAI1_BLOCK_A     0
+#define SAI1_BLOCK_B     1
+#define SAI2_BLOCK_A     2
+#define SAI2_BLOCK_B     3
+
+/******************************************************************************
+ * Public Function Prototypes
+ ******************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_sai_initialize
+ *
+ * Description:
+ *   Initialize the selected SAI block
+ *
+ * Input Parameters:
+ *   intf - I2S interface number (identifying the "logical" SAI interface)
+ *
+ * Returned Value:
+ *   Valid I2S device structure reference on success; a NULL on failure
+ *
+ ****************************************************************************/
+
+struct i2s_dev_s *stm32l4_sai_initialize(int intf);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ARCH_ARM_SRC_STM32L4_STM32L4_SAI_H */
diff --git a/arch/arm/src/stm32l4/stm32l4_serial.c b/arch/arm/src/stm32l4/stm32l4_serial.c
index f29a229992e531d5b33b39cadf6d42ad3d1a2918..187a8f8f9bb67860332f251ee3b825bf6335c563 100644
--- a/arch/arm/src/stm32l4/stm32l4_serial.c
+++ b/arch/arm/src/stm32l4/stm32l4_serial.c
@@ -90,13 +90,13 @@
 
 #  if defined(CONFIG_USART2_RXDMA) || defined(CONFIG_USART3_RXDMA)
 #    ifndef CONFIG_STM32L4_DMA1
-#      error STM32 USART2/3 receive DMA requires CONFIG_STM32L4_DMA1
+#      error STM32L4 USART2/3 receive DMA requires CONFIG_STM32L4_DMA1
 #    endif
 #  endif
 
 #  if defined(CONFIG_UART4_RXDMA) || defined(CONFIG_UART5_RXDMA)
 #    ifndef CONFIG_STM32L4_DMA2
-#      error STM32 USART4/5 receive DMA requires CONFIG_STM32L4_DMA2
+#      error STM32L4 UART4/5 receive DMA requires CONFIG_STM32L4_DMA2
 #    endif
 #  endif
 
@@ -139,65 +139,27 @@
 /* DMA priority */
 
 #  ifndef CONFIG_USART_DMAPRIO
-#    if defined(CONFIG_STM32L4_STM32L15XX) || defined(CONFIG_STM32L4_STM32F10XX) || \
-        defined(CONFIG_STM32L4_STM32F30XX) || defined(CONFIG_STM32L4_STM32F37XX)
-#      define CONFIG_USART_DMAPRIO  DMA_CCR_PRIMED
-#    elif defined(CONFIG_STM32L4_STM32F20XX) || defined(CONFIG_STM32L4_STM32F40XX)
-#      define CONFIG_USART_DMAPRIO  DMA_SCR_PRIMED
-#    else
-#      error "Unknown STM32 DMA"
-#    endif
+#    define CONFIG_USART_DMAPRIO  DMA_CCR_PRIMED
 #  endif
-#    if defined(CONFIG_STM32L4_STM32L15XX) || defined(CONFIG_STM32L4_STM32F10XX) || \
-        defined(CONFIG_STM32L4_STM32F30XX) || defined(CONFIG_STM32L4_STM32F37XX)
-#    if (CONFIG_USART_DMAPRIO & ~DMA_CCR_PL_MASK) != 0
-#      error "Illegal value for CONFIG_USART_DMAPRIO"
-#    endif
-#  elif defined(CONFIG_STM32L4_STM32F20XX) || defined(CONFIG_STM32L4_STM32F40XX)
-#    if (CONFIG_USART_DMAPRIO & ~DMA_SCR_PL_MASK) != 0
-#      error "Illegal value for CONFIG_USART_DMAPRIO"
-#    endif
-#  else
-#    error "Unknown STM32 DMA"
+#  if (CONFIG_USART_DMAPRIO & ~DMA_CCR_PL_MASK) != 0
+#    error "Illegal value for CONFIG_USART_DMAPRIO"
 #  endif
 
 /* DMA control words */
 
-#  if defined(CONFIG_STM32L4_STM32F20XX) || defined(CONFIG_STM32L4_STM32F40XX)
-#    define SERIAL_DMA_CONTROL_WORD      \
-                (DMA_SCR_DIR_P2M       | \
-                 DMA_SCR_CIRC          | \
-                 DMA_SCR_MINC          | \
-                 DMA_SCR_PSIZE_8BITS   | \
-                 DMA_SCR_MSIZE_8BITS   | \
-                 CONFIG_USART_DMAPRIO  | \
-                 DMA_SCR_PBURST_SINGLE | \
-                 DMA_SCR_MBURST_SINGLE)
-#    ifdef CONFIG_SERIAL_IFLOWCONTROL
-#      define SERIAL_DMA_IFLOW_CONTROL_WORD \
-                (DMA_SCR_DIR_P2M       | \
-                 DMA_SCR_MINC          | \
-                 DMA_SCR_PSIZE_8BITS   | \
-                 DMA_SCR_MSIZE_8BITS   | \
-                 CONFIG_USART_DMAPRIO  | \
-                 DMA_SCR_PBURST_SINGLE | \
-                 DMA_SCR_MBURST_SINGLE)
-#    endif
-#  else
-#    define SERIAL_DMA_CONTROL_WORD      \
-                (DMA_CCR_CIRC          | \
-                 DMA_CCR_MINC          | \
-                 DMA_CCR_PSIZE_8BITS   | \
-                 DMA_CCR_MSIZE_8BITS   | \
-                 CONFIG_USART_DMAPRIO)
-#    ifdef CONFIG_SERIAL_IFLOWCONTROL
-#      define SERIAL_DMA_IFLOW_CONTROL_WORD \
-                (DMA_CCR_MINC          | \
-                 DMA_CCR_PSIZE_8BITS   | \
-                 DMA_CCR_MSIZE_8BITS   | \
-                 CONFIG_USART_DMAPRIO)
-#    endif
-# endif
+#  define SERIAL_DMA_CONTROL_WORD      \
+              (DMA_CCR_CIRC          | \
+               DMA_CCR_MINC          | \
+               DMA_CCR_PSIZE_8BITS   | \
+               DMA_CCR_MSIZE_8BITS   | \
+               CONFIG_USART_DMAPRIO)
+#  ifdef CONFIG_SERIAL_IFLOWCONTROL
+#    define SERIAL_DMA_IFLOW_CONTROL_WORD \
+              (DMA_CCR_MINC          | \
+               DMA_CCR_PSIZE_8BITS   | \
+               DMA_CCR_MSIZE_8BITS   | \
+               CONFIG_USART_DMAPRIO)
+#  endif
 
 #endif
 
@@ -216,7 +178,7 @@
  *    register. It must not collide with USART_CR1_USED_INTS or USART_CR3_EIE
  * 2) USART_CR3_EIE is also carried in the up_dev_s ie member.
  *
- * See up_restoreusartint where the masking is done.
+ * See stm32l4serial_restoreusartint where the masking is done.
  */
 
 #ifdef CONFIG_STM32L4_SERIALBRK_BSDCOMPAT
@@ -231,7 +193,7 @@
  * Private Types
  ****************************************************************************/
 
-struct up_dev_s
+struct stm32l4_serial_s
 {
   struct uart_dev_s dev;       /* Generic UART device */
   uint16_t          ie;        /* Saved interrupt mask bits value */
@@ -281,8 +243,6 @@ struct up_dev_s
   const unsigned int rxdma_channel; /* DMA channel assigned */
 #endif
 
-  int (*const vector)(int irq, void *context); /* Interrupt handler */
-
   /* RX DMA state */
 
 #ifdef SERIAL_HAVE_DMA
@@ -302,57 +262,47 @@ struct up_dev_s
  * Private Function Prototypes
  ****************************************************************************/
 
-static void up_set_format(struct uart_dev_s *dev);
-static int  up_setup(struct uart_dev_s *dev);
-static void up_shutdown(struct uart_dev_s *dev);
-static int  up_attach(struct uart_dev_s *dev);
-static void up_detach(struct uart_dev_s *dev);
-static int  up_interrupt_common(struct up_dev_s *dev);
-static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
+#ifndef CONFIG_SUPPRESS_UART_CONFIG
+static void stm32l4serial_setformat(FAR struct uart_dev_s *dev);
+#endif
+static int  stm32l4serial_setup(FAR struct uart_dev_s *dev);
+static void stm32l4serial_shutdown(FAR struct uart_dev_s *dev);
+static int  stm32l4serial_attach(FAR struct uart_dev_s *dev);
+static void stm32l4serial_detach(FAR struct uart_dev_s *dev);
+static int  up_interrupt(int irq, FAR void *context, FAR void *arg);
+static int  stm32l4serial_ioctl(FAR struct file *filep, int cmd,
+                                unsigned long arg);
 #ifndef SERIAL_HAVE_ONLY_DMA
-static int  up_receive(struct uart_dev_s *dev, unsigned int *status);
-static void up_rxint(struct uart_dev_s *dev, bool enable);
-static bool up_rxavailable(struct uart_dev_s *dev);
+static int  stm32l4serial_receive(FAR struct uart_dev_s *dev,
+                                  FAR unsigned int *status);
+static void stm32l4serial_rxint(FAR struct uart_dev_s *dev, bool enable);
+static bool stm32l4serial_rxavailable(FAR struct uart_dev_s *dev);
 #endif
 #ifdef CONFIG_SERIAL_IFLOWCONTROL
-static bool up_rxflowcontrol(struct uart_dev_s *dev, unsigned int nbuffered,
-                             bool upper);
+static bool stm32l4serial_rxflowcontrol(FAR struct uart_dev_s *dev,
+                                        unsigned int nbuffered, bool upper);
 #endif
-static void up_send(struct uart_dev_s *dev, int ch);
-static void up_txint(struct uart_dev_s *dev, bool enable);
-static bool up_txready(struct uart_dev_s *dev);
+static void stm32l4serial_send(FAR struct uart_dev_s *dev, int ch);
+static void stm32l4serial_txint(FAR struct uart_dev_s *dev, bool enable);
+static bool stm32l4serial_txready(FAR struct uart_dev_s *dev);
 
 #ifdef SERIAL_HAVE_DMA
-static int  up_dma_setup(struct uart_dev_s *dev);
-static void up_dma_shutdown(struct uart_dev_s *dev);
-static int  up_dma_receive(struct uart_dev_s *dev, unsigned int *status);
-static void up_dma_rxint(struct uart_dev_s *dev, bool enable);
-static bool up_dma_rxavailable(struct uart_dev_s *dev);
+static int  stm32l4serial_dmasetup(FAR struct uart_dev_s *dev);
+static void stm32l4serial_dmashutdown(FAR struct uart_dev_s *dev);
+static int  stm32l4serial_dmareceive(FAR struct uart_dev_s *dev,
+                                     FAR unsigned int *status);
+static void stm32l4serial_dmarxint(FAR struct uart_dev_s *dev, bool enable);
+static bool stm32l4serial_dmarxavailable(struct uart_dev_s *dev);
 
-static void up_dma_rxcallback(DMA_HANDLE handle, uint8_t status, void *arg);
+static void stm32l4serial_dmarxcallback(DMA_HANDLE handle, uint8_t status,
+                                        FAR void *arg);
 #endif
 
 #ifdef CONFIG_PM
-static void up_pm_notify(struct pm_callback_s *cb, int domain,
-                         enum pm_state_e pmstate);
-static int  up_pm_prepare(struct pm_callback_s *cb, int domain,
-                          enum pm_state_e pmstate);
-#endif
-
-#ifdef CONFIG_STM32L4_USART1
-static int up_interrupt_usart1(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32L4_USART2
-static int up_interrupt_usart2(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32L4_USART3
-static int up_interrupt_usart3(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32L4_UART4
-static int up_interrupt_uart4(int irq, void *context);
-#endif
-#ifdef CONFIG_STM32L4_UART5
-static int up_interrupt_uart5(int irq, void *context);
+static void stm32l4serial_pmnotify(FAR struct pm_callback_s *cb, int domain,
+                                   enum pm_state_e pmstate);
+static int  stm32l4serial_pmprepare(FAR struct pm_callback_s *cb, int domain,
+                                    enum pm_state_e pmstate);
 #endif
 
 /****************************************************************************
@@ -362,42 +312,42 @@ static int up_interrupt_uart5(int irq, void *context);
 #ifndef SERIAL_HAVE_ONLY_DMA
 static const struct uart_ops_s g_uart_ops =
 {
-  .setup          = up_setup,
-  .shutdown       = up_shutdown,
-  .attach         = up_attach,
-  .detach         = up_detach,
-  .ioctl          = up_ioctl,
-  .receive        = up_receive,
-  .rxint          = up_rxint,
-  .rxavailable    = up_rxavailable,
+  .setup          = stm32l4serial_setup,
+  .shutdown       = stm32l4serial_shutdown,
+  .attach         = stm32l4serial_attach,
+  .detach         = stm32l4serial_detach,
+  .ioctl          = stm32l4serial_ioctl,
+  .receive        = stm32l4serial_receive,
+  .rxint          = stm32l4serial_rxint,
+  .rxavailable    = stm32l4serial_rxavailable,
 #ifdef CONFIG_SERIAL_IFLOWCONTROL
-  .rxflowcontrol  = up_rxflowcontrol,
+  .rxflowcontrol  = stm32l4serial_rxflowcontrol,
 #endif
-  .send           = up_send,
-  .txint          = up_txint,
-  .txready        = up_txready,
-  .txempty        = up_txready,
+  .send           = stm32l4serial_send,
+  .txint          = stm32l4serial_txint,
+  .txready        = stm32l4serial_txready,
+  .txempty        = stm32l4serial_txready,
 };
 #endif
 
 #ifdef SERIAL_HAVE_DMA
 static const struct uart_ops_s g_uart_dma_ops =
 {
-  .setup          = up_dma_setup,
-  .shutdown       = up_dma_shutdown,
-  .attach         = up_attach,
-  .detach         = up_detach,
-  .ioctl          = up_ioctl,
-  .receive        = up_dma_receive,
-  .rxint          = up_dma_rxint,
-  .rxavailable    = up_dma_rxavailable,
+  .setup          = stm32l4serial_dmasetup,
+  .shutdown       = stm32l4serial_dmashutdown,
+  .attach         = stm32l4serial_attach,
+  .detach         = stm32l4serial_detach,
+  .ioctl          = stm32l4serial_ioctl,
+  .receive        = stm32l4serial_dmareceive,
+  .rxint          = stm32l4serial_dmarxint,
+  .rxavailable    = stm32l4serial_dmarxavailable,
 #ifdef CONFIG_SERIAL_IFLOWCONTROL
-  .rxflowcontrol  = up_rxflowcontrol,
+  .rxflowcontrol  = stm32l4serial_rxflowcontrol,
 #endif
-  .send           = up_send,
-  .txint          = up_txint,
-  .txready        = up_txready,
-  .txempty        = up_txready,
+  .send           = stm32l4serial_send,
+  .txint          = stm32l4serial_txint,
+  .txready        = stm32l4serial_txready,
+  .txempty        = stm32l4serial_txready,
 };
 #endif
 
@@ -446,7 +396,7 @@ static char g_uart5rxfifo[RXDMA_BUFFER_SIZE];
 /* This describes the state of the STM32 USART1 ports. */
 
 #ifdef CONFIG_STM32L4_USART1
-static struct up_dev_s g_usart1priv =
+static struct stm32l4_serial_s g_usart1priv =
 {
   .dev =
     {
@@ -492,7 +442,6 @@ static struct up_dev_s g_usart1priv =
   .rxdma_channel = DMAMAP_USART1_RX,
   .rxfifo        = g_usart1rxfifo,
 #endif
-  .vector        = up_interrupt_usart1,
 
 #ifdef CONFIG_USART1_RS485
   .rs485_dir_gpio = GPIO_USART1_RS485_DIR,
@@ -508,7 +457,7 @@ static struct up_dev_s g_usart1priv =
 /* This describes the state of the STM32 USART2 port. */
 
 #ifdef CONFIG_STM32L4_USART2
-static struct up_dev_s g_usart2priv =
+static struct stm32l4_serial_s g_usart2priv =
 {
   .dev =
     {
@@ -554,7 +503,6 @@ static struct up_dev_s g_usart2priv =
   .rxdma_channel = DMAMAP_USART2_RX,
   .rxfifo        = g_usart2rxfifo,
 #endif
-  .vector        = up_interrupt_usart2,
 
 #ifdef CONFIG_USART2_RS485
   .rs485_dir_gpio = GPIO_USART2_RS485_DIR,
@@ -570,7 +518,7 @@ static struct up_dev_s g_usart2priv =
 /* This describes the state of the STM32 USART3 port. */
 
 #ifdef CONFIG_STM32L4_USART3
-static struct up_dev_s g_usart3priv =
+static struct stm32l4_serial_s g_usart3priv =
 {
   .dev =
     {
@@ -616,7 +564,6 @@ static struct up_dev_s g_usart3priv =
   .rxdma_channel = DMAMAP_USART3_RX,
   .rxfifo        = g_usart3rxfifo,
 #endif
-  .vector        = up_interrupt_usart3,
 
 #ifdef CONFIG_USART3_RS485
   .rs485_dir_gpio = GPIO_USART3_RS485_DIR,
@@ -632,7 +579,7 @@ static struct up_dev_s g_usart3priv =
 /* This describes the state of the STM32 UART4 port. */
 
 #ifdef CONFIG_STM32L4_UART4
-static struct up_dev_s g_uart4priv =
+static struct stm32l4_serial_s g_uart4priv =
 {
   .dev =
     {
@@ -682,7 +629,6 @@ static struct up_dev_s g_uart4priv =
   .rxdma_channel = DMAMAP_UART4_RX,
   .rxfifo        = g_uart4rxfifo,
 #endif
-  .vector        = up_interrupt_uart4,
 
 #ifdef CONFIG_UART4_RS485
   .rs485_dir_gpio = GPIO_UART4_RS485_DIR,
@@ -698,7 +644,7 @@ static struct up_dev_s g_uart4priv =
 /* This describes the state of the STM32 UART5 port. */
 
 #ifdef CONFIG_STM32L4_UART5
-static struct up_dev_s g_uart5priv =
+static struct stm32l4_serial_s g_uart5priv =
 {
   .dev =
     {
@@ -748,7 +694,6 @@ static struct up_dev_s g_uart5priv =
   .rxdma_channel = DMAMAP_UART5_RX,
   .rxfifo        = g_uart5rxfifo,
 #endif
-  .vector         = up_interrupt_uart5,
 
 #ifdef CONFIG_UART5_RS485
   .rs485_dir_gpio = GPIO_UART5_RS485_DIR,
@@ -763,7 +708,7 @@ static struct up_dev_s g_uart5priv =
 
 /* This table lets us iterate over the configured USARTs */
 
-static struct up_dev_s * const uart_devs[STM32L4_NUSART] =
+FAR static struct stm32l4_serial_s * const uart_devs[STM32L4_NUSART+STM32L4_NUART] =
 {
 #ifdef CONFIG_STM32L4_USART1
   [0] = &g_usart1priv,
@@ -785,8 +730,8 @@ static struct up_dev_s * const uart_devs[STM32L4_NUSART] =
 #ifdef CONFIG_PM
 static  struct pm_callback_s g_serialcb =
 {
-  .notify  = up_pm_notify,
-  .prepare = up_pm_prepare,
+  .notify  = stm32l4serial_pmnotify,
+  .prepare = stm32l4serial_pmprepare,
 };
 #endif
 
@@ -795,28 +740,31 @@ static  struct pm_callback_s g_serialcb =
  ****************************************************************************/
 
 /****************************************************************************
- * Name: up_serialin
+ * Name: stm32l4serial_getreg
  ****************************************************************************/
 
-static inline uint32_t up_serialin(struct up_dev_s *priv, int offset)
+static inline uint32_t stm32l4serial_getreg(FAR struct stm32l4_serial_s *priv,
+                                            int offset)
 {
   return getreg32(priv->usartbase + offset);
 }
 
 /****************************************************************************
- * Name: up_serialout
+ * Name: stm32l4serial_putreg
  ****************************************************************************/
 
-static inline void up_serialout(struct up_dev_s *priv, int offset, uint32_t value)
+static inline void stm32l4serial_putreg(FAR struct stm32l4_serial_s *priv,
+                                        int offset, uint32_t value)
 {
   putreg32(value, priv->usartbase + offset);
 }
 
 /****************************************************************************
- * Name: up_restoreusartint
+ * Name: stm32l4serial_restoreusartint
  ****************************************************************************/
 
-static void up_restoreusartint(struct up_dev_s *priv, uint16_t ie)
+static void stm32l4serial_restoreusartint(FAR struct stm32l4_serial_s *priv,
+                                          uint16_t ie)
 {
   uint32_t cr;
 
@@ -826,22 +774,23 @@ static void up_restoreusartint(struct up_dev_s *priv, uint16_t ie)
 
   /* And restore the interrupt state (see the interrupt enable/usage table above) */
 
-  cr = up_serialin(priv, STM32L4_USART_CR1_OFFSET);
+  cr = stm32l4serial_getreg(priv, STM32L4_USART_CR1_OFFSET);
   cr &= ~(USART_CR1_USED_INTS);
   cr |= (ie & (USART_CR1_USED_INTS));
-  up_serialout(priv, STM32L4_USART_CR1_OFFSET, cr);
+  stm32l4serial_putreg(priv, STM32L4_USART_CR1_OFFSET, cr);
 
-  cr = up_serialin(priv, STM32L4_USART_CR3_OFFSET);
+  cr = stm32l4serial_getreg(priv, STM32L4_USART_CR3_OFFSET);
   cr &= ~USART_CR3_EIE;
   cr |= (ie & USART_CR3_EIE);
-  up_serialout(priv, STM32L4_USART_CR3_OFFSET, cr);
+  stm32l4serial_putreg(priv, STM32L4_USART_CR3_OFFSET, cr);
 }
 
 /****************************************************************************
- * Name: up_disableusartint
+ * Name: stm32l4serial_disableusartint
  ****************************************************************************/
 
-static inline void up_disableusartint(struct up_dev_s *priv, uint16_t *ie)
+static inline void stm32l4serial_disableusartint(FAR struct stm32l4_serial_s *priv,
+                                                 FAR uint16_t *ie)
 {
   if (ie)
     {
@@ -866,8 +815,8 @@ static inline void up_disableusartint(struct up_dev_s *priv, uint16_t *ie)
        * USART_CR3_CTSIE    USART_ISR_CTS    CTS flag                       (not used)
        */
 
-      cr1 = up_serialin(priv, STM32L4_USART_CR1_OFFSET);
-      cr3 = up_serialin(priv, STM32L4_USART_CR3_OFFSET);
+      cr1 = stm32l4serial_getreg(priv, STM32L4_USART_CR1_OFFSET);
+      cr3 = stm32l4serial_getreg(priv, STM32L4_USART_CR3_OFFSET);
 
       /* Return the current interrupt mask value for the used interrupts.  Notice
        * that this depends on the fact that none of the used interrupt enable bits
@@ -879,11 +828,11 @@ static inline void up_disableusartint(struct up_dev_s *priv, uint16_t *ie)
 
   /* Disable all interrupts */
 
-  up_restoreusartint(priv, 0);
+  stm32l4serial_restoreusartint(priv, 0);
 }
 
 /****************************************************************************
- * Name: up_dma_nextrx
+ * Name: stm32l4serial_dmanextrx
  *
  * Description:
  *   Returns the index into the RX FIFO where the DMA will place the next
@@ -892,7 +841,7 @@ static inline void up_disableusartint(struct up_dev_s *priv, uint16_t *ie)
  ****************************************************************************/
 
 #ifdef SERIAL_HAVE_DMA
-static int up_dma_nextrx(struct up_dev_s *priv)
+static int stm32l4serial_dmanextrx(FAR struct stm32l4_serial_s *priv)
 {
   size_t dmaresidual;
 
@@ -903,7 +852,7 @@ static int up_dma_nextrx(struct up_dev_s *priv)
 #endif
 
 /****************************************************************************
- * Name: up_set_format
+ * Name: stm32l4serial_setformat
  *
  * Description:
  *   Set the serial line format and speed.
@@ -911,9 +860,9 @@ static int up_dma_nextrx(struct up_dev_s *priv)
  ****************************************************************************/
 
 #ifndef CONFIG_SUPPRESS_UART_CONFIG
-static void up_set_format(struct uart_dev_s *dev)
+static void stm32l4serial_setformat(FAR struct uart_dev_s *dev)
 {
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+  FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
   uint32_t regval;
 
   /* This first implementation is for U[S]ARTs that support oversampling
@@ -942,7 +891,7 @@ static void up_set_format(struct uart_dev_s *dev)
 
   /* Use oversamply by 8 only if the divisor is small.  But what is small? */
 
-  cr1 = up_serialin(priv, STM32L4_USART_CR1_OFFSET);
+  cr1 = stm32l4serial_getreg(priv, STM32L4_USART_CR1_OFFSET);
   if (usartdiv8 > 100)
     {
       /* Use usartdiv16 */
@@ -966,12 +915,12 @@ static void up_set_format(struct uart_dev_s *dev)
       cr1 |= USART_CR1_OVER8;
     }
 
-   up_serialout(priv, STM32L4_USART_CR1_OFFSET, cr1);
-   up_serialout(priv, STM32L4_USART_BRR_OFFSET, brr);
+   stm32l4serial_putreg(priv, STM32L4_USART_CR1_OFFSET, cr1);
+   stm32l4serial_putreg(priv, STM32L4_USART_BRR_OFFSET, brr);
 
   /* Configure parity mode */
 
-  regval  = up_serialin(priv, STM32L4_USART_CR1_OFFSET);
+  regval  = stm32l4serial_getreg(priv, STM32L4_USART_CR1_OFFSET);
   regval &= ~(USART_CR1_PCE | USART_CR1_PS | USART_CR1_M0 | USART_CR1_M1);
 
   if (priv->parity == 1)       /* Odd parity */
@@ -1008,11 +957,11 @@ static void up_set_format(struct uart_dev_s *dev)
    *              1 start, 8 data (no parity), n stop.
    */
 
-  up_serialout(priv, STM32L4_USART_CR1_OFFSET, regval);
+  stm32l4serial_putreg(priv, STM32L4_USART_CR1_OFFSET, regval);
 
   /* Configure STOP bits */
 
-  regval = up_serialin(priv, STM32L4_USART_CR2_OFFSET);
+  regval = stm32l4serial_getreg(priv, STM32L4_USART_CR2_OFFSET);
   regval &= ~(USART_CR2_STOP_MASK);
 
   if (priv->stopbits2)
@@ -1020,11 +969,11 @@ static void up_set_format(struct uart_dev_s *dev)
       regval |= USART_CR2_STOP2;
     }
 
-  up_serialout(priv, STM32L4_USART_CR2_OFFSET, regval);
+  stm32l4serial_putreg(priv, STM32L4_USART_CR2_OFFSET, regval);
 
   /* Configure hardware flow control */
 
-  regval  = up_serialin(priv, STM32L4_USART_CR3_OFFSET);
+  regval  = stm32l4serial_getreg(priv, STM32L4_USART_CR3_OFFSET);
   regval &= ~(USART_CR3_CTSE | USART_CR3_RTSE);
 
 #if defined(CONFIG_SERIAL_IFLOWCONTROL) && !defined(CONFIG_STM32L4_FLOWCONTROL_BROKEN)
@@ -1041,12 +990,12 @@ static void up_set_format(struct uart_dev_s *dev)
     }
 #endif
 
-  up_serialout(priv, STM32L4_USART_CR3_OFFSET, regval);
+  stm32l4serial_putreg(priv, STM32L4_USART_CR3_OFFSET, regval);
 }
 #endif /* CONFIG_SUPPRESS_UART_CONFIG */
 
 /****************************************************************************
- * Name: up_set_apb_clock
+ * Name: stm32l4serial_setapbclock
  *
  * Description:
  *   Enable or disable APB clock for the USART peripheral
@@ -1057,9 +1006,9 @@ static void up_set_format(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static void up_set_apb_clock(struct uart_dev_s *dev, bool on)
+static void stm32l4serial_setapbclock(FAR struct uart_dev_s *dev, bool on)
 {
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+  FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
   uint32_t rcc_en;
   uint32_t regaddr;
 
@@ -1114,7 +1063,7 @@ static void up_set_apb_clock(struct uart_dev_s *dev, bool on)
 }
 
 /****************************************************************************
- * Name: up_setup
+ * Name: stm32l4serial_setup
  *
  * Description:
  *   Configure the USART baud, bits, parity, etc. This method is called the
@@ -1122,9 +1071,9 @@ static void up_set_apb_clock(struct uart_dev_s *dev, bool on)
  *
  ****************************************************************************/
 
-static int up_setup(struct uart_dev_s *dev)
+static int stm32l4serial_setup(FAR struct uart_dev_s *dev)
 {
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+  FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
 
 #ifndef CONFIG_SUPPRESS_UART_CONFIG
   uint32_t regval;
@@ -1135,7 +1084,7 @@ static int up_setup(struct uart_dev_s *dev)
 
   /* Enable USART APB1/2 clock */
 
-  up_set_apb_clock(dev, true);
+  stm32l4serial_setapbclock(dev, true);
 
   /* Configure pins for USART use */
 
@@ -1174,7 +1123,7 @@ static int up_setup(struct uart_dev_s *dev)
   /* Configure CR2 */
   /* Clear STOP, CLKEN, CPOL, CPHA, LBCL, and interrupt enable bits */
 
-  regval  = up_serialin(priv, STM32L4_USART_CR2_OFFSET);
+  regval  = stm32l4serial_getreg(priv, STM32L4_USART_CR2_OFFSET);
   regval &= ~(USART_CR2_STOP_MASK | USART_CR2_CLKEN | USART_CR2_CPOL |
               USART_CR2_CPHA | USART_CR2_LBCL | USART_CR2_LBDIE);
 
@@ -1185,33 +1134,34 @@ static int up_setup(struct uart_dev_s *dev)
       regval |= USART_CR2_STOP2;
     }
 
-  up_serialout(priv, STM32L4_USART_CR2_OFFSET, regval);
+  stm32l4serial_putreg(priv, STM32L4_USART_CR2_OFFSET, regval);
 
   /* Configure CR1 */
   /* Clear TE, REm and all interrupt enable bits */
 
-  regval  = up_serialin(priv, STM32L4_USART_CR1_OFFSET);
+  regval  = stm32l4serial_getreg(priv, STM32L4_USART_CR1_OFFSET);
   regval &= ~(USART_CR1_TE | USART_CR1_RE | USART_CR1_ALLINTS);
 
-  up_serialout(priv, STM32L4_USART_CR1_OFFSET, regval);
+  stm32l4serial_putreg(priv, STM32L4_USART_CR1_OFFSET, regval);
 
   /* Configure CR3 */
   /* Clear CTSE, RTSE, and all interrupt enable bits */
 
-  regval  = up_serialin(priv, STM32L4_USART_CR3_OFFSET);
-  regval &= ~(USART_CR3_CTSIE | USART_CR3_CTSE | USART_CR3_RTSE | USART_CR3_EIE);
+  regval  = stm32l4serial_getreg(priv, STM32L4_USART_CR3_OFFSET);
+  regval &= ~(USART_CR3_CTSIE | USART_CR3_CTSE | USART_CR3_RTSE |
+              USART_CR3_EIE);
 
-  up_serialout(priv, STM32L4_USART_CR3_OFFSET, regval);
+  stm32l4serial_putreg(priv, STM32L4_USART_CR3_OFFSET, regval);
 
   /* Configure the USART line format and speed. */
 
-  up_set_format(dev);
+  stm32l4serial_setformat(dev);
 
   /* Enable Rx, Tx, and the USART */
 
-  regval      = up_serialin(priv, STM32L4_USART_CR1_OFFSET);
+  regval      = stm32l4serial_getreg(priv, STM32L4_USART_CR1_OFFSET);
   regval     |= (USART_CR1_UE | USART_CR1_TE | USART_CR1_RE);
-  up_serialout(priv, STM32L4_USART_CR1_OFFSET, regval);
+  stm32l4serial_putreg(priv, STM32L4_USART_CR1_OFFSET, regval);
 
 #endif /* CONFIG_SUPPRESS_UART_CONFIG */
 
@@ -1222,7 +1172,7 @@ static int up_setup(struct uart_dev_s *dev)
 }
 
 /****************************************************************************
- * Name: up_dma_setup
+ * Name: stm32l4serial_dmasetup
  *
  * Description:
  *   Configure the USART baud, bits, parity, etc. This method is called the
@@ -1231,9 +1181,9 @@ static int up_setup(struct uart_dev_s *dev)
  ****************************************************************************/
 
 #ifdef SERIAL_HAVE_DMA
-static int up_dma_setup(struct uart_dev_s *dev)
+static int stm32l4serial_dmasetup(FAR struct uart_dev_s *dev)
 {
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+  FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
   int result;
   uint32_t regval;
 
@@ -1241,7 +1191,7 @@ static int up_dma_setup(struct uart_dev_s *dev)
 
   if (!dev->isconsole)
     {
-      result = up_setup(dev);
+      result = stm32l4serial_setup(dev);
       if (result != OK)
         {
           return result;
@@ -1283,9 +1233,9 @@ static int up_dma_setup(struct uart_dev_s *dev)
 
   /* Enable receive DMA for the UART */
 
-  regval  = up_serialin(priv, STM32L4_USART_CR3_OFFSET);
+  regval  = stm32l4serial_getreg(priv, STM32L4_USART_CR3_OFFSET);
   regval |= USART_CR3_DMAR;
-  up_serialout(priv, STM32L4_USART_CR3_OFFSET, regval);
+  stm32l4serial_putreg(priv, STM32L4_USART_CR3_OFFSET, regval);
 
 #ifdef CONFIG_SERIAL_IFLOWCONTROL
   if (priv->iflow)
@@ -1295,7 +1245,8 @@ static int up_dma_setup(struct uart_dev_s *dev)
        * in and DMA transfer is stopped.
        */
 
-      stm32l4_dmastart(priv->rxdma, up_dma_rxcallback, (void *)priv, false);
+      stm32l4_dmastart(priv->rxdma, stm32l4serial_dmarxcallback,
+                       (void *)priv, false);
     }
   else
 #endif
@@ -1305,7 +1256,8 @@ static int up_dma_setup(struct uart_dev_s *dev)
        * worth of time to claim bytes before they are overwritten.
        */
 
-      stm32l4_dmastart(priv->rxdma, up_dma_rxcallback, (void *)priv, true);
+      stm32l4_dmastart(priv->rxdma, stm32l4serial_dmarxcallback,
+                       (void *)priv, true);
     }
 
   return OK;
@@ -1313,7 +1265,7 @@ static int up_dma_setup(struct uart_dev_s *dev)
 #endif
 
 /****************************************************************************
- * Name: up_shutdown
+ * Name: stm32l4serial_shutdown
  *
  * Description:
  *   Disable the USART.  This method is called when the serial
@@ -1321,24 +1273,24 @@ static int up_dma_setup(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static void up_shutdown(struct uart_dev_s *dev)
+static void stm32l4serial_shutdown(FAR struct uart_dev_s *dev)
 {
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+  FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
   uint32_t regval;
 
   /* Disable all interrupts */
 
-  up_disableusartint(priv, NULL);
+  stm32l4serial_disableusartint(priv, NULL);
 
   /* Disable USART APB1/2 clock */
 
-  up_set_apb_clock(dev, false);
+  stm32l4serial_setapbclock(dev, false);
 
   /* Disable Rx, Tx, and the UART */
 
-  regval  = up_serialin(priv, STM32L4_USART_CR1_OFFSET);
+  regval  = stm32l4serial_getreg(priv, STM32L4_USART_CR1_OFFSET);
   regval &= ~(USART_CR1_UE | USART_CR1_TE | USART_CR1_RE);
-  up_serialout(priv, STM32L4_USART_CR1_OFFSET, regval);
+  stm32l4serial_putreg(priv, STM32L4_USART_CR1_OFFSET, regval);
 
   /* Release pins. "If the serial-attached device is powered down, the TX
    * pin causes back-powering, potentially confusing the device to the point
@@ -1374,7 +1326,7 @@ static void up_shutdown(struct uart_dev_s *dev)
 }
 
 /****************************************************************************
- * Name: up_dma_shutdown
+ * Name: stm32l4serial_dmashutdown
  *
  * Description:
  *   Disable the USART.  This method is called when the serial
@@ -1383,13 +1335,13 @@ static void up_shutdown(struct uart_dev_s *dev)
  ****************************************************************************/
 
 #ifdef SERIAL_HAVE_DMA
-static void up_dma_shutdown(struct uart_dev_s *dev)
+static void stm32l4serial_dmashutdown(FAR struct uart_dev_s *dev)
 {
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+  FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
 
   /* Perform the normal UART shutdown */
 
-  up_shutdown(dev);
+  stm32l4serial_shutdown(dev);
 
   /* Stop the DMA channel */
 
@@ -1403,7 +1355,7 @@ static void up_dma_shutdown(struct uart_dev_s *dev)
 #endif
 
 /****************************************************************************
- * Name: up_attach
+ * Name: stm32l4serial_attach
  *
  * Description:
  *   Configure the USART to operation in interrupt driven mode.  This method is
@@ -1417,14 +1369,14 @@ static void up_dma_shutdown(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_attach(struct uart_dev_s *dev)
+static int stm32l4serial_attach(FAR struct uart_dev_s *dev)
 {
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+  FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
   int ret;
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, priv->vector);
+  ret = irq_attach(priv->irq, up_interrupt, priv);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
@@ -1437,7 +1389,7 @@ static int up_attach(struct uart_dev_s *dev)
 }
 
 /****************************************************************************
- * Name: up_detach
+ * Name: stm32l4serial_detach
  *
  * Description:
  *   Detach USART interrupts.  This method is called when the serial port is
@@ -1446,15 +1398,15 @@ static int up_attach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static void up_detach(struct uart_dev_s *dev)
+static void stm32l4serial_detach(FAR struct uart_dev_s *dev)
 {
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+  FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
   up_disable_irq(priv->irq);
   irq_detach(priv->irq);
 }
 
 /****************************************************************************
- * Name: up_interrupt_common
+ * Name: up_interrupt
  *
  * Description:
  *   This is the USART interrupt handler.  It will be invoked when an
@@ -1465,11 +1417,14 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_interrupt_common(struct up_dev_s *priv)
+static int up_interrupt(int irq, FAR void *context, FAR void *arg)
 {
+  FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)arg;
   int  passes;
   bool handled;
 
+  DEBUGASSERT(priv != NULL);
+
   /* Report serial activity to the power management logic */
 
 #if defined(CONFIG_PM) && CONFIG_PM_SERIAL_ACTIVITY > 0
@@ -1487,7 +1442,7 @@ static int up_interrupt_common(struct up_dev_s *priv)
 
       /* Get the masked USART status word. */
 
-      priv->sr = up_serialin(priv, STM32L4_USART_ISR_OFFSET);
+      priv->sr = stm32l4serial_getreg(priv, STM32L4_USART_ISR_OFFSET);
 
       /* USART interrupts:
        *
@@ -1522,7 +1477,7 @@ static int up_interrupt_common(struct up_dev_s *priv)
           (priv->ie & USART_CR1_TXEIE) == 0)
         {
           stm32l4_gpiowrite(priv->rs485_dir_gpio, !priv->rs485_dir_polarity);
-          up_restoreusartint(priv, priv->ie & ~USART_CR1_TCIE);
+          stm32l4serial_restoreusartint(priv, priv->ie & ~USART_CR1_TCIE);
         }
 #endif
 
@@ -1548,8 +1503,8 @@ static int up_interrupt_common(struct up_dev_s *priv)
            * interrupt clear register (ICR).
            */
 
-          up_serialout(priv, STM32L4_USART_ICR_OFFSET,
-                      (USART_ICR_NCF | USART_ICR_ORECF | USART_ICR_FECF));
+          stm32l4serial_putreg(priv, STM32L4_USART_ICR_OFFSET,
+                               (USART_ICR_NCF | USART_ICR_ORECF | USART_ICR_FECF));
         }
 
       /* Handle outgoing, transmit bytes */
@@ -1567,22 +1522,22 @@ static int up_interrupt_common(struct up_dev_s *priv)
 }
 
 /****************************************************************************
- * Name: up_ioctl
+ * Name: stm32l4serial_ioctl
  *
  * Description:
  *   All ioctl calls will be routed through this method
  *
  ****************************************************************************/
 
-static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
+static int stm32l4serial_ioctl(FAR struct file *filep, int cmd,
+                               unsigned long arg)
 {
-#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_SERIAL_TIOCSERGSTRUCT) \
-    || defined(CONFIG_STM32F7_SERIALBRK_BSDCOMPAT)
-  struct inode      *inode = filep->f_inode;
-  struct uart_dev_s *dev   = inode->i_private;
+#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_SERIAL_TIOCSERGSTRUCT)
+  FAR struct inode      *inode = filep->f_inode;
+  FAR struct uart_dev_s *dev   = inode->i_private;
 #endif
-#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_STM32F7_SERIALBRK_BSDCOMPAT)
-  struct up_dev_s   *priv  = (struct up_dev_s *)dev->priv;
+#if defined(CONFIG_SERIAL_TERMIOS)
+  FAR struct stm32l4_serial_s   *priv  = (FAR struct stm32l4_serial_s *)dev->priv;
 #endif
   int                ret    = OK;
 
@@ -1591,40 +1546,29 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
 #ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
     case TIOCSERGSTRUCT:
       {
-        struct up_dev_s *user = (struct up_dev_s *)arg;
+        FAR struct stm32l4_serial_s *user = (FAR struct stm32l4_serial_s *)arg;
         if (!user)
           {
             ret = -EINVAL;
           }
         else
           {
-            memcpy(user, dev, sizeof(struct up_dev_s));
+            memcpy(user, dev, sizeof(struct stm32l4_serial_s));
           }
       }
       break;
 #endif
 
 #ifdef CONFIG_STM32L4_USART_SINGLEWIRE
+#warning please review the potential use of ALTERNATE_FUNCTION_OPENDRAIN
     case TIOCSSINGLEWIRE:
       {
         /* Change the TX port to be open-drain/push-pull and enable/disable
          * half-duplex mode.
          */
 
-        uint32_t cr = up_serialin(priv, STM32L4_USART_CR3_OFFSET);
+        uint32_t cr = stm32l4serial_getreg(priv, STM32L4_USART_CR3_OFFSET);
 
-#if defined(CONFIG_STM32L4_STM32F10XX)
-        if (arg == SER_SINGLEWIRE_ENABLED)
-          {
-            stm32l4_configgpio((priv->tx_gpio & ~(GPIO_CNF_MASK)) | GPIO_CNF_AFOD);
-            cr |= USART_CR3_HDSEL;
-          }
-        else
-          {
-            stm32l4_configgpio((priv->tx_gpio & ~(GPIO_CNF_MASK)) | GPIO_CNF_AFPP);
-            cr &= ~USART_CR3_HDSEL;
-          }
-#else
         if (arg == SER_SINGLEWIRE_ENABLED)
           {
             stm32l4_configgpio(priv->tx_gpio | GPIO_OPENDRAIN);
@@ -1635,9 +1579,8 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
             stm32l4_configgpio(priv->tx_gpio | GPIO_PUSHPULL);
             cr &= ~USART_CR3_HDSEL;
           }
-#endif
 
-        up_serialout(priv, STM32L4_USART_CR3_OFFSET, cr);
+        stm32l4serial_putreg(priv, STM32L4_USART_CR3_OFFSET, cr);
       }
      break;
 #endif
@@ -1645,7 +1588,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
 #ifdef CONFIG_SERIAL_TERMIOS
     case TCGETS:
       {
-        struct termios *termiosp = (struct termios *)arg;
+        FAR struct termios *termiosp = (FAR struct termios *)arg;
 
         if (!termiosp)
           {
@@ -1677,7 +1620,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
 
     case TCSETS:
       {
-        struct termios *termiosp = (struct termios *)arg;
+        FAR struct termios *termiosp = (FAR struct termios *)arg;
 
         if (!termiosp)
           {
@@ -1732,7 +1675,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
          * TCSADRAIN / TCSAFLUSH
          */
 
-        up_set_format(dev);
+        stm32l4serial_setformat(dev);
       }
       break;
 #endif /* CONFIG_SERIAL_TERMIOS */
@@ -1750,12 +1693,12 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
 
         priv->ie |= USART_CR1_IE_BREAK_INPROGRESS;
 
-        up_txint(dev, false);
+        stm32l4serial_txint(dev, false);
 
         /* Configure TX as a GPIO output pin and Send a break signal*/
 
         tx_break = GPIO_OUTPUT | (~(GPIO_MODE_MASK|GPIO_OUTPUT_SET) & priv->tx_gpio);
-        stm32_configgpio(tx_break);
+        stm32l4_configgpio(tx_break);
 
         leave_critical_section(flags);
       }
@@ -1769,13 +1712,13 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
 
         /* Configure TX back to U(S)ART */
 
-        stm32_configgpio(priv->tx_gpio);
+        stm32l4_configgpio(priv->tx_gpio);
 
         priv->ie &= ~USART_CR1_IE_BREAK_INPROGRESS;
 
         /* Enable further tx activity */
 
-        up_txint(dev, true);
+        stm32l4serial_txint(dev, true);
 
         leave_critical_section(flags);
       }
@@ -1787,8 +1730,8 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
         irqstate_t flags;
 
         flags = enter_critical_section();
-        cr1   = up_serialin(priv, STM32_USART_CR1_OFFSET);
-        up_serialout(priv, STM32_USART_CR1_OFFSET, cr1 | USART_CR1_SBK);
+        cr1   = stm32l4serial_getreg(priv, STM32L4_USART_CR1_OFFSET);
+        stm32l4serial_putreg(priv, STM32L4_USART_CR1_OFFSET, cr1 | USART_CR1_SBK);
         leave_critical_section(flags);
       }
       break;
@@ -1799,8 +1742,8 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
         irqstate_t flags;
 
         flags = enter_critical_section();
-        cr1   = up_serialin(priv, STM32_USART_CR1_OFFSET);
-        up_serialout(priv, STM32_USART_CR1_OFFSET, cr1 & ~USART_CR1_SBK);
+        cr1   = stm32l4serial_getreg(priv, STM32L4_USART_CR1_OFFSET);
+        stm32l4serial_putreg(priv, STM32L4_USART_CR1_OFFSET, cr1 & ~USART_CR1_SBK);
         leave_critical_section(flags);
       }
       break;
@@ -1816,7 +1759,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
 }
 
 /****************************************************************************
- * Name: up_receive
+ * Name: stm32l4serial_receive
  *
  * Description:
  *   Called (usually) from the interrupt level to receive one
@@ -1826,14 +1769,15 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
  ****************************************************************************/
 
 #ifndef SERIAL_HAVE_ONLY_DMA
-static int up_receive(struct uart_dev_s *dev, unsigned int *status)
+static int stm32l4serial_receive(FAR struct uart_dev_s *dev,
+                                 FAR unsigned int *status)
 {
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+  FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
   uint32_t rdr;
 
   /* Get the Rx byte */
 
-  rdr      = up_serialin(priv, STM32L4_USART_RDR_OFFSET);
+  rdr      = stm32l4serial_getreg(priv, STM32L4_USART_RDR_OFFSET);
 
   /* Get the Rx byte plux error information.  Return those in status */
 
@@ -1847,7 +1791,7 @@ static int up_receive(struct uart_dev_s *dev, unsigned int *status)
 #endif
 
 /****************************************************************************
- * Name: up_rxint
+ * Name: stm32l4serial_rxint
  *
  * Description:
  *   Call to enable or disable RX interrupts
@@ -1855,9 +1799,9 @@ static int up_receive(struct uart_dev_s *dev, unsigned int *status)
  ****************************************************************************/
 
 #ifndef SERIAL_HAVE_ONLY_DMA
-static void up_rxint(struct uart_dev_s *dev, bool enable)
+static void stm32l4serial_rxint(FAR struct uart_dev_s *dev, bool enable)
 {
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+  FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
   irqstate_t flags;
   uint16_t ie;
 
@@ -1899,13 +1843,13 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
 
   /* Then set the new interrupt state */
 
-  up_restoreusartint(priv, ie);
+  stm32l4serial_restoreusartint(priv, ie);
   leave_critical_section(flags);
 }
 #endif
 
 /****************************************************************************
- * Name: up_rxavailable
+ * Name: stm32l4serial_rxavailable
  *
  * Description:
  *   Return true if the receive register is not empty
@@ -1913,15 +1857,15 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
  ****************************************************************************/
 
 #ifndef SERIAL_HAVE_ONLY_DMA
-static bool up_rxavailable(struct uart_dev_s *dev)
+static bool stm32l4serial_rxavailable(FAR struct uart_dev_s *dev)
 {
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
-  return ((up_serialin(priv, STM32L4_USART_ISR_OFFSET) & USART_ISR_RXNE) != 0);
+  FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
+  return ((stm32l4serial_getreg(priv, STM32L4_USART_ISR_OFFSET) & USART_ISR_RXNE) != 0);
 }
 #endif
 
 /****************************************************************************
- * Name: up_rxflowcontrol
+ * Name: stm32l4serial_rxflowcontrol
  *
  * Description:
  *   Called when Rx buffer is full (or exceeds configured watermark levels
@@ -1944,10 +1888,10 @@ static bool up_rxavailable(struct uart_dev_s *dev)
  ****************************************************************************/
 
 #ifdef CONFIG_SERIAL_IFLOWCONTROL
-static bool up_rxflowcontrol(struct uart_dev_s *dev,
-                             unsigned int nbuffered, bool upper)
+static bool stm32l4serial_rxflowcontrol(FAR struct uart_dev_s *dev,
+                                        unsigned int nbuffered, bool upper)
 {
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+  FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
 
 #if defined(CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS) && \
     defined(CONFIG_STM32L4_FLOWCONTROL_BROKEN)
@@ -2001,7 +1945,7 @@ static bool up_rxflowcontrol(struct uart_dev_s *dev,
 #endif
 
 /****************************************************************************
- * Name: up_dma_receive
+ * Name: stm32l4serial_dmareceive
  *
  * Description:
  *   Called (usually) from the interrupt level to receive one
@@ -2011,12 +1955,13 @@ static bool up_rxflowcontrol(struct uart_dev_s *dev,
  ****************************************************************************/
 
 #ifdef SERIAL_HAVE_DMA
-static int up_dma_receive(struct uart_dev_s *dev, unsigned int *status)
+static int stm32l4serial_dmareceive(FAR struct uart_dev_s *dev,
+                                    FAR unsigned int *status)
 {
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+  FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
   int c = 0;
 
-  if (up_dma_nextrx(priv) != priv->rxdmanext)
+  if (stm32l4serial_dmanextrx(priv) != priv->rxdmanext)
     {
       c = priv->rxfifo[priv->rxdmanext];
 
@@ -2043,7 +1988,7 @@ static int up_dma_receive(struct uart_dev_s *dev, unsigned int *status)
 #endif
 
 /****************************************************************************
- * Name: up_dma_reenable
+ * Name: stm32l4serial_dmareenable
  *
  * Description:
  *   Call to re-enable RX DMA.
@@ -2051,7 +1996,7 @@ static int up_dma_receive(struct uart_dev_s *dev, unsigned int *status)
  ****************************************************************************/
 
 #if defined(SERIAL_HAVE_DMA) && defined(CONFIG_SERIAL_IFLOWCONTROL)
-static void up_dma_reenable(struct up_dev_s *priv)
+static void stm32l4serial_dmareenable(FAR struct stm32l4_serial_s *priv)
 {
   /* Configure for non-circular DMA reception into the RX fifo */
 
@@ -2072,12 +2017,13 @@ static void up_dma_reenable(struct up_dev_s *priv)
    * DMA transfer is stopped.
    */
 
-  stm32l4_dmastart(priv->rxdma, up_dma_rxcallback, (void *)priv, false);
+  stm32l4_dmastart(priv->rxdma, stm32l4serial_dmarxcallback, (FAR void *)priv,
+                   false);
 }
 #endif
 
 /****************************************************************************
- * Name: up_dma_rxint
+ * Name: stm32l4serial_dmarxint
  *
  * Description:
  *   Call to enable or disable RX interrupts
@@ -2085,9 +2031,9 @@ static void up_dma_reenable(struct up_dev_s *priv)
  ****************************************************************************/
 
 #ifdef SERIAL_HAVE_DMA
-static void up_dma_rxint(struct uart_dev_s *dev, bool enable)
+static void stm32l4serial_dmarxint(FAR struct uart_dev_s *dev, bool enable)
 {
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+  FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
 
   /* En/disable DMA reception.
    *
@@ -2104,14 +2050,14 @@ static void up_dma_rxint(struct uart_dev_s *dev, bool enable)
     {
       /* Re-enable RX DMA. */
 
-      up_dma_reenable(priv);
+      stm32l4serial_dmareenable(priv);
     }
 #endif
 }
 #endif
 
 /****************************************************************************
- * Name: up_dma_rxavailable
+ * Name: stm32l4serial_dmarxavailable
  *
  * Description:
  *   Return true if the receive register is not empty
@@ -2119,29 +2065,29 @@ static void up_dma_rxint(struct uart_dev_s *dev, bool enable)
  ****************************************************************************/
 
 #ifdef SERIAL_HAVE_DMA
-static bool up_dma_rxavailable(struct uart_dev_s *dev)
+static bool stm32l4serial_dmarxavailable(FAR struct uart_dev_s *dev)
 {
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+  FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
 
   /* Compare our receive pointer to the current DMA pointer, if they
    * do not match, then there are bytes to be received.
    */
 
-  return (up_dma_nextrx(priv) != priv->rxdmanext);
+  return (stm32l4serial_dmanextrx(priv) != priv->rxdmanext);
 }
 #endif
 
 /****************************************************************************
- * Name: up_send
+ * Name: stm32l4serial_send
  *
  * Description:
  *   This method will send one byte on the USART
  *
  ****************************************************************************/
 
-static void up_send(struct uart_dev_s *dev, int ch)
+static void stm32l4serial_send(FAR struct uart_dev_s *dev, int ch)
 {
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+  FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
 
 #ifdef HAVE_RS485
   if (priv->rs485_dir_gpio != 0)
@@ -2150,20 +2096,20 @@ static void up_send(struct uart_dev_s *dev, int ch)
     }
 #endif
 
-  up_serialout(priv, STM32L4_USART_TDR_OFFSET, (uint32_t)ch);
+  stm32l4serial_putreg(priv, STM32L4_USART_TDR_OFFSET, (uint32_t)ch);
 }
 
 /****************************************************************************
- * Name: up_txint
+ * Name: stm32l4serial_txint
  *
  * Description:
  *   Call to enable or disable TX interrupts
  *
  ****************************************************************************/
 
-static void up_txint(struct uart_dev_s *dev, bool enable)
+static void stm32l4serial_txint(FAR struct uart_dev_s *dev, bool enable)
 {
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+  FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
   irqstate_t flags;
 
   /* USART transmit interrupts:
@@ -2201,7 +2147,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
         }
 #  endif
 
-      up_restoreusartint(priv, ie);
+      stm32l4serial_restoreusartint(priv, ie);
 
       /* Fake a TX interrupt here by just calling uart_xmitchars() with
        * interrupts disabled (note this may recurse).
@@ -2214,71 +2160,28 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
     {
       /* Disable the TX interrupt */
 
-      up_restoreusartint(priv, priv->ie & ~USART_CR1_TXEIE);
+      stm32l4serial_restoreusartint(priv, priv->ie & ~USART_CR1_TXEIE);
     }
 
   leave_critical_section(flags);
 }
 
 /****************************************************************************
- * Name: up_txready
+ * Name: stm32l4serial_txready
  *
  * Description:
  *   Return true if the transmit data register is empty
  *
  ****************************************************************************/
 
-static bool up_txready(struct uart_dev_s *dev)
-{
-  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
-  return ((up_serialin(priv, STM32L4_USART_ISR_OFFSET) & USART_ISR_TXE) != 0);
-}
-
-/****************************************************************************
- * Name: up_interrupt_u[s]art[n]
- *
- * Description:
- *   Interrupt handlers for U[S]ART[n] where n=1,..,6.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_STM32L4_USART1
-static int up_interrupt_usart1(int irq, void *context)
-{
-  return up_interrupt_common(&g_usart1priv);
-}
-#endif
-
-#ifdef CONFIG_STM32L4_USART2
-static int up_interrupt_usart2(int irq, void *context)
-{
-  return up_interrupt_common(&g_usart2priv);
-}
-#endif
-
-#ifdef CONFIG_STM32L4_USART3
-static int up_interrupt_usart3(int irq, void *context)
-{
-  return up_interrupt_common(&g_usart3priv);
-}
-#endif
-
-#ifdef CONFIG_STM32L4_UART4
-static int up_interrupt_uart4(int irq, void *context)
-{
-  return up_interrupt_common(&g_uart4priv);
-}
-#endif
-
-#ifdef CONFIG_STM32L4_UART5
-static int up_interrupt_uart5(int irq, void *context)
+static bool stm32l4serial_txready(FAR struct uart_dev_s *dev)
 {
-  return up_interrupt_common(&g_uart5priv);
+  FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
+  return ((stm32l4serial_getreg(priv, STM32L4_USART_ISR_OFFSET) & USART_ISR_TXE) != 0);
 }
-#endif
 
 /****************************************************************************
- * Name: up_dma_rxcallback
+ * Name: stm32l4serial_dmarxcallback
  *
  * Description:
  *   This function checks the current DMA state and calls the generic
@@ -2287,11 +2190,12 @@ static int up_interrupt_uart5(int irq, void *context)
  ****************************************************************************/
 
 #ifdef SERIAL_HAVE_DMA
-static void up_dma_rxcallback(DMA_HANDLE handle, uint8_t status, void *arg)
+static void stm32l4serial_dmarxcallback(DMA_HANDLE handle, uint8_t status,
+                                        FAR void *arg)
 {
-  struct up_dev_s *priv = (struct up_dev_s *)arg;
+  FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)arg;
 
-  if (priv->rxenable && up_dma_rxavailable(&priv->dev))
+  if (priv->rxenable && stm32l4serial_dmarxavailable(&priv->dev))
     {
       uart_recvchars(&priv->dev);
 
@@ -2301,7 +2205,7 @@ static void up_dma_rxcallback(DMA_HANDLE handle, uint8_t status, void *arg)
         {
           /* Re-enable RX DMA. */
 
-          up_dma_reenable(priv);
+          stm32l4serial_dmareenable(priv);
         }
 #endif
     }
@@ -2309,7 +2213,7 @@ static void up_dma_rxcallback(DMA_HANDLE handle, uint8_t status, void *arg)
 #endif
 
 /****************************************************************************
- * Name: up_pm_notify
+ * Name: stm32l4serial_pmnotify
  *
  * Description:
  *   Notify the driver of new power state. This callback is  called after
@@ -2331,8 +2235,8 @@ static void up_dma_rxcallback(DMA_HANDLE handle, uint8_t status, void *arg)
  ****************************************************************************/
 
 #ifdef CONFIG_PM
-static void up_pm_notify(struct pm_callback_s *cb, int domain,
-                         enum pm_state_e pmstate)
+static void stm32l4serial_pmnotify(FAR struct pm_callback_s *cb, int domain,
+                                   enum pm_state_e pmstate)
 {
   switch (pmstate)
     {
@@ -2372,7 +2276,7 @@ static void up_pm_notify(struct pm_callback_s *cb, int domain,
 #endif
 
 /****************************************************************************
- * Name: up_pm_prepare
+ * Name: stm32l4serial_pmprepare
  *
  * Description:
  *   Request the driver to prepare for a new power state. This is a warning
@@ -2405,8 +2309,8 @@ static void up_pm_notify(struct pm_callback_s *cb, int domain,
  ****************************************************************************/
 
 #ifdef CONFIG_PM
-static int up_pm_prepare(struct pm_callback_s *cb, int domain,
-                         enum pm_state_e pmstate)
+static int stm32l4serial_pmprepare(FAR struct pm_callback_s *cb, int domain,
+                                   enum pm_state_e pmstate)
 {
   /* Logic to prepare for a reduced power state goes here. */
 
@@ -2428,7 +2332,7 @@ static int up_pm_prepare(struct pm_callback_s *cb, int domain,
  * Description:
  *   Performs the low level USART initialization early in debug so that the
  *   serial console will be available during bootup.  This must be called
- *   before up_serialinit.
+ *   before stm32l4serial_getregit.
  *
  ****************************************************************************/
 
@@ -2440,25 +2344,25 @@ void up_earlyserialinit(void)
 
   /* Disable all USART interrupts */
 
-  for (i = 0; i < STM32L4_NUSART; i++)
+  for (i = 0; i < STM32L4_NUSART+STM32L4_NUART; i++)
     {
       if (uart_devs[i])
         {
-          up_disableusartint(uart_devs[i], NULL);
+          stm32l4serial_disableusartint(uart_devs[i], NULL);
         }
     }
 
   /* Configure whichever one is the console */
 
 #if CONSOLE_UART > 0
-  up_setup(&uart_devs[CONSOLE_UART - 1]->dev);
+  stm32l4serial_setup(&uart_devs[CONSOLE_UART - 1]->dev);
 #endif
 #endif /* HAVE UART */
 }
 #endif
 
 /****************************************************************************
- * Name: up_serialinit
+ * Name: stm32l4serial_getregit
  *
  * Description:
  *   Register serial console and serial ports.  This assumes
@@ -2501,7 +2405,7 @@ void up_serialinit(void)
 #ifdef SERIAL_HAVE_CONSOLE_DMA
   /* If we need to re-initialise the console to enable DMA do that here. */
 
-  up_dma_setup(&uart_devs[CONSOLE_UART - 1]->dev);
+  stm32l4serial_dmasetup(&uart_devs[CONSOLE_UART - 1]->dev);
 #endif
 #endif /* CONSOLE_UART > 0 */
 
@@ -2509,7 +2413,7 @@ void up_serialinit(void)
 
   strcpy(devname, "/dev/ttySx");
 
-  for (i = 0; i < STM32L4_NUSART; i++)
+  for (i = 0; i < STM32L4_NUSART+STM32L4_NUART; i++)
     {
       /* Don't create a device for non-configured ports. */
 
@@ -2536,7 +2440,7 @@ void up_serialinit(void)
 }
 
 /****************************************************************************
- * Name: stm32l4_serial_dma_poll
+ * Name: stm32l4serial_dmapoll
  *
  * Description:
  *   Checks receive DMA buffers for received bytes that have not accumulated
@@ -2547,7 +2451,7 @@ void up_serialinit(void)
  ****************************************************************************/
 
 #ifdef SERIAL_HAVE_DMA
-void stm32l4_serial_dma_poll(void)
+void stm32l4serial_dmapoll(void)
 {
     irqstate_t flags;
 
@@ -2556,35 +2460,35 @@ void stm32l4_serial_dma_poll(void)
 #ifdef CONFIG_USART1_RXDMA
   if (g_usart1priv.rxdma != NULL)
     {
-      up_dma_rxcallback(g_usart1priv.rxdma, 0, &g_usart1priv);
+      stm32l4serial_dmarxcallback(g_usart1priv.rxdma, 0, &g_usart1priv);
     }
 #endif
 
 #ifdef CONFIG_USART2_RXDMA
   if (g_usart2priv.rxdma != NULL)
     {
-      up_dma_rxcallback(g_usart2priv.rxdma, 0, &g_usart2priv);
+      stm32l4serial_dmarxcallback(g_usart2priv.rxdma, 0, &g_usart2priv);
     }
 #endif
 
 #ifdef CONFIG_USART3_RXDMA
   if (g_usart3priv.rxdma != NULL)
     {
-      up_dma_rxcallback(g_usart3priv.rxdma, 0, &g_usart3priv);
+      stm32l4serial_dmarxcallback(g_usart3priv.rxdma, 0, &g_usart3priv);
     }
 #endif
 
 #ifdef CONFIG_UART4_RXDMA
   if (g_uart4priv.rxdma != NULL)
     {
-      up_dma_rxcallback(g_uart4priv.rxdma, 0, &g_uart4priv);
+      stm32l4serial_dmarxcallback(g_uart4priv.rxdma, 0, &g_uart4priv);
     }
 #endif
 
 #ifdef CONFIG_UART5_RXDMA
   if (g_uart5priv.rxdma != NULL)
     {
-      up_dma_rxcallback(g_uart5priv.rxdma, 0, &g_uart5priv);
+      stm32l4serial_dmarxcallback(g_uart5priv.rxdma, 0, &g_uart5priv);
     }
 #endif
 
@@ -2603,10 +2507,10 @@ void stm32l4_serial_dma_poll(void)
 int up_putc(int ch)
 {
 #if CONSOLE_UART > 0
-  struct up_dev_s *priv = uart_devs[CONSOLE_UART - 1];
+  struct stm32l4_serial_s *priv = uart_devs[CONSOLE_UART - 1];
   uint16_t ie;
 
-  up_disableusartint(priv, &ie);
+  stm32l4serial_disableusartint(priv, &ie);
 
   /* Check for LF */
 
@@ -2618,7 +2522,7 @@ int up_putc(int ch)
     }
 
   up_lowputc(ch);
-  up_restoreusartint(priv, ie);
+  stm32l4serial_restoreusartint(priv, ie);
 #endif
   return ch;
 }
diff --git a/arch/arm/src/stm32l4/stm32l4_spi.c b/arch/arm/src/stm32l4/stm32l4_spi.c
index b6907d5955bf64440470175d6bcee956d893506c..9d9db706e070d7330ad2afe129062713edc2ba40 100644
--- a/arch/arm/src/stm32l4/stm32l4_spi.c
+++ b/arch/arm/src/stm32l4/stm32l4_spi.c
@@ -76,6 +76,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -136,27 +137,6 @@
 #define SPI_TXDMA16NULL_CONFIG    (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_16BITS             |DMA_CCR_DIR)
 #define SPI_TXDMA8NULL_CONFIG     (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS              |DMA_CCR_DIR)
 
-
-/* Debug ****************************************************************************/
-/* Check if (non-standard) SPI debug is enabled */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_SPI
-#endif
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /************************************************************************************
  * Private Types
  ************************************************************************************/
@@ -184,7 +164,7 @@ struct stm32l4_spidev_s
   sem_t            exclsem;    /* Held while chip is selected for mutual exclusion */
   uint32_t         frequency;  /* Requested clock frequency */
   uint32_t         actual;     /* Actual clock frequency */
-  int8_t           nbits;      /* Width of word in bits (8 or 16) */
+  uint8_t          nbits;      /* Width of word in bits (4 through 16) */
   uint8_t          mode;       /* Mode 0,1,2,3 */
 };
 
@@ -224,6 +204,10 @@ static int         spi_lock(FAR struct spi_dev_s *dev, bool lock);
 static uint32_t    spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
 static void        spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
 static void        spi_setbits(FAR struct spi_dev_s *dev, int nbits);
+#ifdef CONFIG_SPI_HWFEATURES
+static int         spi_hwfeatures(FAR struct spi_dev_s *dev,
+                                  spi_hwfeatures_t features);
+#endif
 static uint16_t    spi_send(FAR struct spi_dev_s *dev, uint16_t wd);
 static void        spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
                                 FAR void *rxbuffer, size_t nwords);
@@ -251,7 +235,7 @@ static const struct spi_ops_s g_spi1ops =
   .setmode           = spi_setmode,
   .setbits           = spi_setbits,
 #ifdef CONFIG_SPI_HWFEATURES
-  .hwfeatures        = 0,                   /* Not supported */
+  .hwfeatures        = spi_hwfeatures,
 #endif
   .status            = stm32l4_spi1status,
 #ifdef CONFIG_SPI_CMDDATA
@@ -295,6 +279,9 @@ static const struct spi_ops_s g_spi2ops =
   .setfrequency      = spi_setfrequency,
   .setmode           = spi_setmode,
   .setbits           = spi_setbits,
+#ifdef CONFIG_SPI_HWFEATURES
+  .hwfeatures        = spi_hwfeatures,
+#endif
   .status            = stm32l4_spi2status,
 #ifdef CONFIG_SPI_CMDDATA
   .cmddata           = stm32l4_spi2cmddata,
@@ -336,6 +323,9 @@ static const struct spi_ops_s g_spi3ops =
   .setfrequency      = spi_setfrequency,
   .setmode           = spi_setmode,
   .setbits           = spi_setbits,
+#ifdef CONFIG_SPI_HWFEATURES
+  .hwfeatures        = spi_hwfeatures,
+#endif
   .status            = stm32l4_spi3status,
 #ifdef CONFIG_SPI_CMDDATA
   .cmddata           = stm32l4_spi3cmddata,
@@ -369,12 +359,6 @@ static struct stm32l4_spidev_s g_spi3dev =
 };
 #endif
 
-/*endif?*/
-
-/************************************************************************************
- * Public Data
- ************************************************************************************/
-
 /************************************************************************************
  * Private Functions
  ************************************************************************************/
@@ -578,22 +562,7 @@ static inline void spi_writebyte(FAR struct stm32l4_spidev_s *priv, uint8_t byte
 
 static inline bool spi_16bitmode(FAR struct stm32l4_spidev_s *priv)
 {
-  uint8_t bits = priv->nbits;
-
-  /* Get the real number of bits */
-
-  if (bits < 0)
-    {
-      bits = -bits;
-    }
-
-  return (bits > 8);
-
-  /* Should we read the hardware regs? seems to be equivalent ~~ sebastien lorquet
-   * (20160413)
-   */
-
-//  return ((spi_getreg(priv, STM32L4_SPI_CR2_OFFSET) & SPI_CR2_DS_MASK) == SPI_CR2_DS_16BIT);
+  return (priv->nbits > 8);
 }
 
 /************************************************************************************
@@ -866,7 +835,8 @@ static inline void spi_dmatxstart(FAR struct stm32l4_spidev_s *priv)
  *
  ************************************************************************************/
 
-static void spi_modifycr(uint32_t addr, FAR struct stm32l4_spidev_s *priv, uint16_t setbits, uint16_t clrbits)
+static void spi_modifycr(uint32_t addr, FAR struct stm32l4_spidev_s *priv,
+                         uint16_t setbits, uint16_t clrbits)
 {
   uint16_t cr;
 
@@ -1020,7 +990,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
        * faster.
        */
 
-      spivdbg("Frequency %d->%d\n", frequency, actual);
+      spiinfo("Frequency %d->%d\n", frequency, actual);
 
       priv->frequency = frequency;
       priv->actual    = actual;
@@ -1050,7 +1020,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
   uint16_t setbits;
   uint16_t clrbits;
 
-  spivdbg("mode=%d\n", mode);
+  spiinfo("mode=%d\n", mode);
 
   /* Has the mode changed? */
 
@@ -1113,40 +1083,27 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
 static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
 {
   FAR struct stm32l4_spidev_s *priv = (FAR struct stm32l4_spidev_s *)dev;
-  uint16_t setbits1, setbits2;
-  uint16_t clrbits1, clrbits2;
+  uint16_t setbits;
+  uint16_t clrbits;
   int savbits = nbits;
 
-  spivdbg("nbits=%d\n", nbits);
+  spiinfo("nbits=%d\n", nbits);
 
   /* Has the number of bits changed? */
 
   if (nbits != priv->nbits)
     {
-      /* Yes... Set CR1/2 appropriately */
-      /* Negative sign means LSBFIRST, set this in CR1*/
-
-      if (nbits < 0)
-        {
-          setbits1 = SPI_CR1_LSBFIRST;
-          clrbits1 = 0;
-          nbits    = -nbits;
-        }
-      else
-        {
-          setbits1 = 0;
-          clrbits1 = SPI_CR1_LSBFIRST;
-        }
-
+      /* Yes... Set CR2 appropriately */
       /* Set the number of bits (valid range 4-16) */
 
       if (nbits < 4 || nbits > 16)
         {
+          spierr("ERROR: nbits out of range: %d\n", nbits);
           return;
         }
 
-      clrbits2 = SPI_CR2_DS_MASK;
-      setbits2 = SPI_CR2_DS_VAL(nbits);
+      clrbits = SPI_CR2_DS_MASK;
+      setbits = SPI_CR2_DS_VAL(nbits);
 
       /* If nbits is <=8, then we are in byte mode and FRXTH shall be set
        * (else, transaction will not complete).
@@ -1154,16 +1111,15 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
 
       if (nbits < 9)
         {
-          setbits2 |= SPI_CR2_FRXTH; /* RX FIFO Threshold = 1 byte */
+          setbits |= SPI_CR2_FRXTH; /* RX FIFO Threshold = 1 byte */
         }
       else
         {
-          clrbits2 |= SPI_CR2_FRXTH; /* RX FIFO Threshold = 2 bytes */
+          clrbits |= SPI_CR2_FRXTH; /* RX FIFO Threshold = 2 bytes */
         }
 
       spi_modifycr(STM32L4_SPI_CR1_OFFSET, priv, 0, SPI_CR1_SPE);
-      spi_modifycr(STM32L4_SPI_CR1_OFFSET, priv, setbits1, clrbits1);
-      spi_modifycr(STM32L4_SPI_CR2_OFFSET, priv, setbits2, clrbits2);
+      spi_modifycr(STM32L4_SPI_CR2_OFFSET, priv, setbits, clrbits);
       spi_modifycr(STM32L4_SPI_CR1_OFFSET, priv, SPI_CR1_SPE, 0);
 
       /* Save the selection so the subsequence re-configurations will be faster */
@@ -1172,6 +1128,58 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
     }
 }
 
+/****************************************************************************
+ * Name: spi_hwfeatures
+ *
+ * Description:
+ *   Set hardware-specific feature flags.
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   features - H/W feature flags
+ *
+ * Returned Value:
+ *   Zero (OK) if the selected H/W features are enabled; A negated errno
+ *   value if any H/W feature is not supportable.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI_HWFEATURES
+static int spi_hwfeatures(FAR struct spi_dev_s *dev, spi_hwfeatures_t features)
+{
+#ifdef CONFIG_SPI_BITORDER
+  FAR struct stm32l4_spidev_s *priv = (FAR struct stm32l4_spidev_s *)dev;
+  uint16_t setbits;
+  uint16_t clrbits;
+
+  spiinfo("features=%08x\n", features);
+
+  /* Transfer data LSB first? */
+
+  if ((features & HWFEAT_LSBFIRST) != 0)
+    {
+      setbits = SPI_CR1_LSBFIRST;
+      clrbits = 0;
+    }
+  else
+    {
+      setbits = 0;
+      clrbits = SPI_CR1_LSBFIRST;
+    }
+
+  spi_modifycr(STM32L4_SPI_CR1_OFFSET, priv, 0, SPI_CR1_SPE);
+  spi_modifycr(STM32L4_SPI_CR1_OFFSET, priv, setbits, clrbits);
+  spi_modifycr(STM32L4_SPI_CR1_OFFSET, priv, SPI_CR1_SPE, 0);
+
+  /* Other H/W features are not supported */
+
+  return ((features & ~HWFEAT_LSBFIRST) == 0) ? OK : -ENOSYS;
+#else
+  return -ENOSYS;
+#endif
+}
+#endif
+
 /************************************************************************************
  * Name: spi_send
  *
@@ -1220,11 +1228,11 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
 
   if (spi_16bitmode(priv))
     {
-      spivdbg("Sent: %04x Return: %04x Status: %02x\n", wd, ret, regval);
+      spiinfo("Sent: %04x Return: %04x Status: %02x\n", wd, ret, regval);
     }
   else
     {
-      spivdbg("Sent: %02x Return: %02x Status: %02x\n", wd, ret, regval);
+      spiinfo("Sent: %02x Return: %02x Status: %02x\n", wd, ret, regval);
     }
 
   UNUSED(regval);
@@ -1263,7 +1271,7 @@ static void spi_exchange_nodma(FAR struct spi_dev_s *dev, FAR const void *txbuff
   FAR struct stm32l4_spidev_s *priv = (FAR struct stm32l4_spidev_s *)dev;
   DEBUGASSERT(priv && priv->spibase);
 
-  spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+  spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
 
   /* 8- or 16-bit mode? */
 
@@ -1376,7 +1384,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
       static uint16_t rxdummy = 0xffff;
       static const uint16_t txdummy = 0xffff;
 
-      spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+      spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
       DEBUGASSERT(priv && priv->spibase);
 
       /* Setup DMAs */
@@ -1419,7 +1427,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
 #ifndef CONFIG_SPI_EXCHANGE
 static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer, size_t nwords)
 {
-  spivdbg("txbuffer=%p nwords=%d\n", txbuffer, nwords);
+  spiinfo("txbuffer=%p nwords=%d\n", txbuffer, nwords);
   return spi_exchange(dev, txbuffer, NULL, nwords);
 }
 #endif
@@ -1446,7 +1454,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer, si
 #ifndef CONFIG_SPI_EXCHANGE
 static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *rxbuffer, size_t nwords)
 {
-  spivdbg("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
+  spiinfo("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
   return spi_exchange(dev, NULL, rxbuffer, nwords);
 }
 #endif
@@ -1510,6 +1518,13 @@ static void spi_bus_initialize(FAR struct stm32l4_spidev_s *priv)
   sem_init(&priv->rxsem, 0, 0);
   sem_init(&priv->txsem, 0, 0);
 
+  /* These semaphores are used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->rxsem, SEM_PRIO_NONE);
+  sem_setprotocol(&priv->txsem, SEM_PRIO_NONE);
+
   /* Get DMA channels.  NOTE: stm32l4_dmachannel() will always assign the DMA channel.
    * if the channel is not available, then stm32l4_dmachannel() will block and wait
    * until the channel becomes available.  WARNING: If you have another device sharing
@@ -1522,7 +1537,7 @@ static void spi_bus_initialize(FAR struct stm32l4_spidev_s *priv)
   priv->txdma = stm32l4_dmachannel(priv->txch);
   DEBUGASSERT(priv->rxdma && priv->txdma);
 
-  spi_putreg(priv, STM32L4_SPI_CR2_OFFSET, SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN);
+  spi_modifycr(STM32L4_SPI_CR2_OFFSET, priv, SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN, 0);
 #endif
 
   /* Enable spi */
@@ -1627,7 +1642,7 @@ FAR struct spi_dev_s *stm32l4_spibus_initialize(int bus)
   else
 #endif
     {
-      spidbg("ERROR: Unsupbused SPI bus: %d\n", bus);
+      spierr("ERROR: Unsupported SPI bus: %d\n", bus);
       return NULL;
     }
 
diff --git a/arch/arm/src/stm32l4/stm32l4_start.c b/arch/arm/src/stm32l4/stm32l4_start.c
index 6209cde5418671e0ef56e5dbba093496c1bb43fd..1c391851b4bb4bfb91aa9f647a94c179dda371d7 100644
--- a/arch/arm/src/stm32l4/stm32l4_start.c
+++ b/arch/arm/src/stm32l4/stm32l4_start.c
@@ -120,7 +120,7 @@ static void go_os_start(void *pv, unsigned int nbytes)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 #  define showprogress(c) up_lowputc(c)
 #else
 #  define showprogress(c)
diff --git a/arch/arm/src/stm32l4/stm32l4_tickless.c b/arch/arm/src/stm32l4/stm32l4_tickless.c
new file mode 100644
index 0000000000000000000000000000000000000000..2d742daa1f0f63fdedbde8ec4e76d97f21eaad10
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_tickless.c
@@ -0,0 +1,351 @@
+/****************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_tickless.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           dev@ziggurat29.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+/****************************************************************************
+ * Tickless OS Support.
+ *
+ * When CONFIG_SCHED_TICKLESS is enabled, all support for timer interrupts
+ * is suppressed and the platform specific code is expected to provide the
+ * following custom functions.
+ *
+ *   void arm_timer_initialize(void): Initializes the timer facilities.
+ *     Called early in the initialization sequence (by up_intialize()).
+ *   int up_timer_gettime(FAR struct timespec *ts):  Returns the current
+ *     time from the platform specific time source.
+ *   int up_timer_cancel(void):  Cancels the interval timer.
+ *   int up_timer_start(FAR const struct timespec *ts): Start (or re-starts)
+ *     the interval timer.
+ *
+ * The RTOS will provide the following interfaces for use by the platform-
+ * specific interval timer implementation:
+ *
+ *   void sched_timer_expiration(void):  Called by the platform-specific
+ *     logic when the interval timer expires.
+ *
+ ****************************************************************************/
+/****************************************************************************
+ * STM32L4 Timer Usage
+ *
+ * This current implementation uses two timers:  A one-shot timer to provide
+ * the timed events and a free running timer to provide the current time.
+ * Since timers are a limited resource, that could be an issue on some
+ * systems.
+ *
+ * We could do the job with a single timer if we were to keep the single
+ * timer in a free-running at all times.  The STM32 timer/counters have
+ * 16-bit/32-bit counters with the capability to generate a compare interrupt
+ * when the timer matches a compare value but also to continue counting
+ * without stopping (giving another, different interrupt when the timer
+ * rolls over from 0xffffffff to zero).  So we could potentially just set
+ * the compare at the number of ticks you want PLUS the current value of
+ * timer.  Then you could have both with a single timer:  An interval timer
+ * and a free-running counter with the same timer!
+ *
+ * Patches are welcome!
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "stm32l4_oneshot.h"
+#include "stm32l4_freerun.h"
+
+#ifdef CONFIG_SCHED_TICKLESS
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef CONFIG_STM32L4_ONESHOT
+#  error CONFIG_STM32L4_ONESHOT must be selected for the Tickless OS option
+#endif
+
+#ifndef CONFIG_STM32L4_FREERUN
+#  error CONFIG_STM32L4_FREERUN must be selected for the Tickless OS option
+#endif
+
+#ifndef CONFIG_STM32L4_TICKLESS_FREERUN
+#  error CONFIG_STM32L4_TICKLESS_FREERUN must be selected for the Tickless OS option
+#endif
+
+#ifndef CONFIG_STM32L4_TICKLESS_ONESHOT
+#  error CONFIG_STM32L4_TICKLESS_ONESHOT must be selected for the Tickless OS option
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct stm32l4_tickless_s
+{
+  struct stm32l4_oneshot_s oneshot;
+  struct stm32l4_freerun_s freerun;
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static struct stm32l4_tickless_s g_tickless;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_oneshot_handler
+ *
+ * Description:
+ *   Called when the one shot timer expires
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Called early in the initialization sequence before any special
+ *   concurrency protections are required.
+ *
+ ****************************************************************************/
+
+static void stm32l4_oneshot_handler(FAR void *arg)
+{
+  tmrinfo("Expired...\n");
+  sched_timer_expiration();
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: arm_timer_initialize
+ *
+ * Description:
+ *   Initializes all platform-specific timer facilities.  This function is
+ *   called early in the initialization sequence by up_intialize().
+ *   On return, the current up-time should be available from
+ *   up_timer_gettime() and the interval timer is ready for use (but not
+ *   actively timing.
+ *
+ *   Provided by platform-specific code and called from the architecture-
+ *   specific logic.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Called early in the initialization sequence before any special
+ *   concurrency protections are required.
+ *
+ ****************************************************************************/
+
+void arm_timer_initialize(void)
+{
+#ifdef CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP
+  uint64_t max_delay;
+#endif
+  int ret;
+
+  /* Initialize the one-shot timer */
+
+  ret = stm32l4_oneshot_initialize(&g_tickless.oneshot,
+                                 CONFIG_STM32L4_TICKLESS_ONESHOT,
+                                 CONFIG_USEC_PER_TICK);
+  if (ret < 0)
+    {
+      tmrerr("ERROR: stm32l4_oneshot_initialize failed\n");
+      PANIC();
+    }
+
+#ifdef CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP
+  /* Get the maximum delay of the one-shot timer in microseconds */
+
+  ret = stm32l4_oneshot_max_delay(&g_tickless.oneshot, &max_delay);
+  if (ret < 0)
+    {
+      tmrerr("ERROR: stm32l4_oneshot_max_delay failed\n");
+      PANIC();
+    }
+
+  /* Convert this to configured clock ticks for use by the OS timer logic */
+
+  max_delay /= CONFIG_USEC_PER_TICK;
+  if (max_delay > UINT32_MAX)
+    {
+      g_oneshot_maxticks = UINT32_MAX;
+    }
+  else
+    {
+      g_oneshot_maxticks = max_delay;
+    }
+#endif
+
+  /* Initialize the free-running timer */
+
+  ret = stm32l4_freerun_initialize(&g_tickless.freerun,
+                                 CONFIG_STM32L4_TICKLESS_FREERUN,
+                                 CONFIG_USEC_PER_TICK);
+  if (ret < 0)
+    {
+      tmrerr("ERROR: stm32l4_freerun_initialize failed\n");
+      PANIC();
+    }
+}
+
+/****************************************************************************
+ * Name: up_timer_gettime
+ *
+ * Description:
+ *   Return the elapsed time since power-up (or, more correctly, since
+ *   arm_timer_initialize() was called).  This function is functionally
+ *   equivalent to:
+ *
+ *      int clock_gettime(clockid_t clockid, FAR struct timespec *ts);
+ *
+ *   when clockid is CLOCK_MONOTONIC.
+ *
+ *   This function provides the basis for reporting the current time and
+ *   also is used to eliminate error build-up from small errors in interval
+ *   time calculations.
+ *
+ *   Provided by platform-specific code and called from the RTOS base code.
+ *
+ * Input Parameters:
+ *   ts - Provides the location in which to return the up-time.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure.
+ *
+ * Assumptions:
+ *   Called from the the normal tasking context.  The implementation must
+ *   provide whatever mutual exclusion is necessary for correct operation.
+ *   This can include disabling interrupts in order to assure atomic register
+ *   operations.
+ *
+ ****************************************************************************/
+
+int up_timer_gettime(FAR struct timespec *ts)
+{
+  return stm32l4_freerun_counter(&g_tickless.freerun, ts);
+}
+
+/****************************************************************************
+ * Name: up_timer_cancel
+ *
+ * Description:
+ *   Cancel the interval timer and return the time remaining on the timer.
+ *   These two steps need to be as nearly atomic as possible.
+ *   sched_timer_expiration() will not be called unless the timer is
+ *   restarted with up_timer_start().
+ *
+ *   If, as a race condition, the timer has already expired when this
+ *   function is called, then that pending interrupt must be cleared so
+ *   that up_timer_start() and the remaining time of zero should be
+ *   returned.
+ *
+ *   NOTE: This function may execute at a high rate with no timer running (as
+ *   when pre-emption is enabled and disabled).
+ *
+ *   Provided by platform-specific code and called from the RTOS base code.
+ *
+ * Input Parameters:
+ *   ts - Location to return the remaining time.  Zero should be returned
+ *        if the timer is not active.  ts may be zero in which case the
+ *        time remaining is not returned.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success.  A call to up_timer_cancel() when
+ *   the timer is not active should also return success; a negated errno
+ *   value is returned on any failure.
+ *
+ * Assumptions:
+ *   May be called from interrupt level handling or from the normal tasking
+ *   level.  Interrupts may need to be disabled internally to assure
+ *   non-reentrancy.
+ *
+ ****************************************************************************/
+
+int up_timer_cancel(FAR struct timespec *ts)
+{
+  return stm32l4_oneshot_cancel(&g_tickless.oneshot, ts);
+}
+
+/****************************************************************************
+ * Name: up_timer_start
+ *
+ * Description:
+ *   Start the interval timer.  sched_timer_expiration() will be
+ *   called at the completion of the timeout (unless up_timer_cancel
+ *   is called to stop the timing.
+ *
+ *   Provided by platform-specific code and called from the RTOS base code.
+ *
+ * Input Parameters:
+ *   ts - Provides the time interval until sched_timer_expiration() is
+ *        called.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure.
+ *
+ * Assumptions:
+ *   May be called from interrupt level handling or from the normal tasking
+ *   level.  Interrupts may need to be disabled internally to assure
+ *   non-reentrancy.
+ *
+ ****************************************************************************/
+
+int up_timer_start(FAR const struct timespec *ts)
+{
+  return stm32l4_oneshot_start(&g_tickless.oneshot, stm32l4_oneshot_handler, NULL, ts);
+}
+#endif /* CONFIG_SCHED_TICKLESS */
diff --git a/arch/arm/src/stm32l4/stm32l4_tim.c b/arch/arm/src/stm32l4/stm32l4_tim.c
new file mode 100644
index 0000000000000000000000000000000000000000..938be218ae0813ab5ee703043b30a710de610d22
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_tim.c
@@ -0,0 +1,1471 @@
+/************************************************************************************
+ * arm/arm/src/stm32l4/stm32l4_tim.c
+ *
+ *   Copyright (C) 2011 Uros Platise. All rights reserved.
+ *   Author: Uros Platise 
+ *
+ * With modifications and updates by:
+ *
+ *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "chip.h"
+#include "up_internal.h"
+#include "up_arch.h"
+
+#include "stm32l4.h"
+#include "stm32l4_gpio.h"
+#include "stm32l4_tim.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Configuration ********************************************************************/
+/* Timer devices may be used for different purposes.  Such special purposes include:
+ *
+ * - To generate modulated outputs for such things as motor control.  If CONFIG_STM32L4_TIMn
+ *   is defined then the CONFIG_STM32L4_TIMn_PWM may also be defined to indicate that
+ *   the timer is intended to be used for pulsed output modulation.
+ *
+ * - To control periodic ADC input sampling.  If CONFIG_STM32L4_TIMn is defined then
+ *   CONFIG_STM32L4_TIMn_ADC may also be defined to indicate that timer "n" is intended
+ *   to be used for that purpose.
+ *
+ * - To control periodic DAC outputs.  If CONFIG_STM32L4_TIMn is defined then
+ *   CONFIG_STM32L4_TIMn_DAC may also be defined to indicate that timer "n" is intended
+ *   to be used for that purpose.
+ *
+ * - To use a Quadrature Encoder.  If CONFIG_STM32L4_TIMn is defined then
+ *   CONFIG_STM32L4_TIMn_QE may also be defined to indicate that timer "n" is intended
+ *   to be used for that purpose.
+ *
+ * In any of these cases, the timer will not be used by this timer module.
+ */
+
+#if defined(CONFIG_STM32L4_TIM1_PWM) || defined (CONFIG_STM32L4_TIM1_ADC) || \
+    defined(CONFIG_STM32L4_TIM1_DAC) || defined(CONFIG_STM32L4_TIM1_QE)
+#  undef CONFIG_STM32L4_TIM1
+#endif
+#if defined(CONFIG_STM32L4_TIM2_PWM) || defined (CONFIG_STM32L4_TIM2_ADC) || \
+    defined(CONFIG_STM32L4_TIM2_DAC) || defined(CONFIG_STM32L4_TIM2_QE)
+#  undef CONFIG_STM32L4_TIM2
+#endif
+#if defined(CONFIG_STM32L4_TIM3_PWM) || defined (CONFIG_STM32L4_TIM3_ADC) || \
+    defined(CONFIG_STM32L4_TIM3_DAC) || defined(CONFIG_STM32L4_TIM3_QE)
+#  undef CONFIG_STM32L4_TIM3
+#endif
+#if defined(CONFIG_STM32L4_TIM4_PWM) || defined (CONFIG_STM32L4_TIM4_ADC) || \
+    defined(CONFIG_STM32L4_TIM4_DAC) || defined(CONFIG_STM32L4_TIM4_QE)
+#  undef CONFIG_STM32L4_TIM4
+#endif
+#if defined(CONFIG_STM32L4_TIM5_PWM) || defined (CONFIG_STM32L4_TIM5_ADC) || \
+    defined(CONFIG_STM32L4_TIM5_DAC) || defined(CONFIG_STM32L4_TIM5_QE)
+#  undef CONFIG_STM32L4_TIM5
+#endif
+#if defined(CONFIG_STM32L4_TIM6_PWM) || defined (CONFIG_STM32L4_TIM6_ADC) || \
+    defined(CONFIG_STM32L4_TIM6_DAC) || defined(CONFIG_STM32L4_TIM6_QE)
+#  undef CONFIG_STM32L4_TIM6
+#endif
+#if defined(CONFIG_STM32L4_TIM7_PWM) || defined (CONFIG_STM32L4_TIM7_ADC) || \
+    defined(CONFIG_STM32L4_TIM7_DAC) || defined(CONFIG_STM32L4_TIM7_QE)
+#  undef CONFIG_STM32L4_TIM7
+#endif
+#if defined(CONFIG_STM32L4_TIM8_PWM) || defined (CONFIG_STM32L4_TIM8_ADC) || \
+    defined(CONFIG_STM32L4_TIM8_DAC) || defined(CONFIG_STM32L4_TIM8_QE)
+#  undef CONFIG_STM32L4_TIM8
+#endif
+#if defined(CONFIG_STM32L4_TIM15_PWM) || defined (CONFIG_STM32L4_TIM15_ADC) || \
+    defined(CONFIG_STM32L4_TIM15_DAC) || defined(CONFIG_STM32L4_TIM15_QE)
+#  undef CONFIG_STM32L4_TIM15
+#endif
+#if defined(CONFIG_STM32L4_TIM16_PWM) || defined (CONFIG_STM32L4_TIM16_ADC) || \
+    defined(CONFIG_STM32L4_TIM16_DAC) || defined(CONFIG_STM32L4_TIM16_QE)
+#  undef CONFIG_STM32L4_TIM16
+#endif
+#if defined(CONFIG_STM32L4_TIM17_PWM) || defined (CONFIG_STM32L4_TIM17_ADC) || \
+    defined(CONFIG_STM32L4_TIM17_DAC) || defined(CONFIG_STM32L4_TIM17_QE)
+#  undef CONFIG_STM32L4_TIM17
+#endif
+
+#if defined(CONFIG_STM32L4_TIM1)
+#  if defined(GPIO_TIM1_CH1OUT) ||defined(GPIO_TIM1_CH2OUT)||\
+      defined(GPIO_TIM1_CH3OUT) ||defined(GPIO_TIM1_CH4OUT)
+#    define HAVE_TIM1_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32L4_TIM2)
+#  if defined(GPIO_TIM2_CH1OUT) ||defined(GPIO_TIM2_CH2OUT)||\
+      defined(GPIO_TIM2_CH3OUT) ||defined(GPIO_TIM2_CH4OUT)
+#    define HAVE_TIM2_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32L4_TIM3)
+#  if defined(GPIO_TIM3_CH1OUT) ||defined(GPIO_TIM3_CH2OUT)||\
+      defined(GPIO_TIM3_CH3OUT) ||defined(GPIO_TIM3_CH4OUT)
+#    define HAVE_TIM3_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32L4_TIM4)
+#  if defined(GPIO_TIM4_CH1OUT) ||defined(GPIO_TIM4_CH2OUT)||\
+      defined(GPIO_TIM4_CH3OUT) ||defined(GPIO_TIM4_CH4OUT)
+#    define HAVE_TIM4_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32L4_TIM5)
+#  if defined(GPIO_TIM5_CH1OUT) ||defined(GPIO_TIM5_CH2OUT)||\
+      defined(GPIO_TIM5_CH3OUT) ||defined(GPIO_TIM5_CH4OUT)
+#    define HAVE_TIM5_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32L4_TIM8)
+#  if defined(GPIO_TIM8_CH1OUT) ||defined(GPIO_TIM8_CH2OUT)||\
+      defined(GPIO_TIM8_CH3OUT) ||defined(GPIO_TIM8_CH4OUT)
+#    define HAVE_TIM8_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32L4_TIM15)
+#  if defined(GPIO_TIM15_CH1OUT) ||defined(GPIO_TIM15_CH2OUT)||\
+      defined(GPIO_TIM15_CH3OUT) ||defined(GPIO_TIM15_CH4OUT)
+#    define HAVE_TIM15_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32L4_TIM16)
+#  if defined(GPIO_TIM16_CH1OUT) ||defined(GPIO_TIM16_CH2OUT)||\
+      defined(GPIO_TIM16_CH3OUT) ||defined(GPIO_TIM16_CH4OUT)
+#    define HAVE_TIM16_GPIOCONFIG 1
+#endif
+#endif
+
+#if defined(CONFIG_STM32L4_TIM17)
+#  if defined(GPIO_TIM17_CH1OUT) ||defined(GPIO_TIM17_CH2OUT)||\
+      defined(GPIO_TIM17_CH3OUT) ||defined(GPIO_TIM17_CH4OUT)
+#    define HAVE_TIM17_GPIOCONFIG 1
+#endif
+#endif
+
+/* This module then only compiles if there are enabled timers that are not intended for
+ * some other purpose.
+ */
+
+#if defined(CONFIG_STM32L4_TIM1)  || defined(CONFIG_STM32L4_TIM2)  || \
+    defined(CONFIG_STM32L4_TIM3)  || defined(CONFIG_STM32L4_TIM4)  || \
+    defined(CONFIG_STM32L4_TIM5)  || defined(CONFIG_STM32L4_TIM6)  || \
+    defined(CONFIG_STM32L4_TIM7)  || defined(CONFIG_STM32L4_TIM8)  || \
+    defined(CONFIG_STM32L4_TIM15) || defined(CONFIG_STM32L4_TIM16) || \
+    defined(CONFIG_STM32L4_TIM17)
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+
+/* TIM Device Structure */
+
+struct stm32l4_tim_priv_s
+{
+  FAR const struct stm32l4_tim_ops_s *ops;
+  stm32l4_tim_mode_t mode;
+  uint32_t base;                      /* TIMn base address */
+};
+
+/************************************************************************************
+ * Private Function prototypes
+ ************************************************************************************/
+
+/* Register helpers */
+
+static inline uint16_t stm32l4_getreg16(FAR struct stm32l4_tim_dev_s *dev,
+                                        uint8_t offset);
+static inline void stm32l4_putreg16(FAR struct stm32l4_tim_dev_s *dev, 
+                                    uint8_t offset, uint16_t value);
+static inline void stm32l4_modifyreg16(FAR struct stm32l4_tim_dev_s *dev,
+                                       uint8_t offset, uint16_t clearbits,
+                                       uint16_t setbits);
+static inline uint32_t stm32l4_getreg32(FAR struct stm32l4_tim_dev_s *dev,
+                                        uint8_t offset);
+static inline void stm32l4_putreg32(FAR struct stm32l4_tim_dev_s *dev,
+                                    uint8_t offset, uint32_t value);
+
+/* Timer helpers */
+
+static void stm32l4_tim_reload_counter(FAR struct stm32l4_tim_dev_s *dev);
+static void stm32l4_tim_enable(FAR struct stm32l4_tim_dev_s *dev);
+static void stm32l4_tim_disable(FAR struct stm32l4_tim_dev_s *dev);
+static void stm32l4_tim_reset(FAR struct stm32l4_tim_dev_s *dev);
+#if defined(HAVE_TIM1_GPIOCONFIG)||defined(HAVE_TIM2_GPIOCONFIG)||\
+    defined(HAVE_TIM3_GPIOCONFIG)||defined(HAVE_TIM4_GPIOCONFIG)||\
+    defined(HAVE_TIM5_GPIOCONFIG)||defined(HAVE_TIM8_GPIOCONFIG)
+static void stm32l4_tim_gpioconfig(uint32_t cfg, stm32l4_tim_channel_t mode);
+#endif
+
+/* Timer methods */
+
+static int stm32l4_tim_setmode(FAR struct stm32l4_tim_dev_s *dev,
+                               stm32l4_tim_mode_t mode);
+static int stm32l4_tim_setclock(FAR struct stm32l4_tim_dev_s *dev,
+                                uint32_t freq);
+static void stm32l4_tim_setperiod(FAR struct stm32l4_tim_dev_s *dev,
+                                  uint32_t period);
+static uint32_t stm32l4_tim_getcounter(FAR struct stm32l4_tim_dev_s *dev);
+static int stm32l4_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, 
+                                  uint8_t channel, stm32l4_tim_channel_t mode);
+static int stm32l4_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev, 
+                                  uint8_t channel, uint32_t compare);
+static int stm32l4_tim_getcapture(FAR struct stm32l4_tim_dev_s *dev,
+                                  uint8_t channel);
+static int stm32l4_tim_setisr(FAR struct stm32l4_tim_dev_s *dev,
+                              xcpt_t handler, void *arg, int source);
+static void stm32l4_tim_enableint(FAR struct stm32l4_tim_dev_s *dev,
+                                  int source);
+static void stm32l4_tim_disableint(FAR struct stm32l4_tim_dev_s *dev,
+                                   int source);
+static void stm32l4_tim_ackint(FAR struct stm32l4_tim_dev_s *dev, int source);
+static int stm32l4_tim_checkint(FAR struct stm32l4_tim_dev_s *dev, int source);
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+static const struct stm32l4_tim_ops_s stm32l4_tim_ops =
+{
+  .setmode    = stm32l4_tim_setmode,
+  .setclock   = stm32l4_tim_setclock,
+  .setperiod  = stm32l4_tim_setperiod,
+  .getcounter = stm32l4_tim_getcounter,
+  .setchannel = stm32l4_tim_setchannel,
+  .setcompare = stm32l4_tim_setcompare,
+  .getcapture = stm32l4_tim_getcapture,
+  .setisr     = stm32l4_tim_setisr,
+  .enableint  = stm32l4_tim_enableint,
+  .disableint = stm32l4_tim_disableint,
+  .ackint     = stm32l4_tim_ackint,
+  .checkint   = stm32l4_tim_checkint,
+};
+
+#ifdef CONFIG_STM32L4_TIM1
+struct stm32l4_tim_priv_s stm32l4_tim1_priv =
+{
+  .ops        = &stm32l4_tim_ops,
+  .mode       = STM32L4_TIM_MODE_UNUSED,
+  .base       = STM32L4_TIM1_BASE,
+};
+#endif
+#ifdef CONFIG_STM32L4_TIM2
+struct stm32l4_tim_priv_s stm32l4_tim2_priv =
+{
+  .ops        = &stm32l4_tim_ops,
+  .mode       = STM32L4_TIM_MODE_UNUSED,
+  .base       = STM32L4_TIM2_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM3
+struct stm32l4_tim_priv_s stm32l4_tim3_priv =
+{
+  .ops        = &stm32l4_tim_ops,
+  .mode       = STM32L4_TIM_MODE_UNUSED,
+  .base       = STM32L4_TIM3_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM4
+struct stm32l4_tim_priv_s stm32l4_tim4_priv =
+{
+  .ops        = &stm32l4_tim_ops,
+  .mode       = STM32L4_TIM_MODE_UNUSED,
+  .base       = STM32L4_TIM4_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM5
+struct stm32l4_tim_priv_s stm32l4_tim5_priv =
+{
+  .ops        = &stm32l4_tim_ops,
+  .mode       = STM32L4_TIM_MODE_UNUSED,
+  .base       = STM32L4_TIM5_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM6
+struct stm32l4_tim_priv_s stm32l4_tim6_priv =
+{
+  .ops        = &stm32l4_tim_ops,
+  .mode       = STM32L4_TIM_MODE_UNUSED,
+  .base       = STM32L4_TIM6_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM7
+struct stm32l4_tim_priv_s stm32l4_tim7_priv =
+{
+  .ops        = &stm32l4_tim_ops,
+  .mode       = STM32L4_TIM_MODE_UNUSED,
+  .base       = STM32L4_TIM7_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM8
+struct stm32l4_tim_priv_s stm32l4_tim8_priv =
+{
+  .ops        = &stm32l4_tim_ops,
+  .mode       = STM32L4_TIM_MODE_UNUSED,
+  .base       = STM32L4_TIM8_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM15
+struct stm32l4_tim_priv_s stm32l4_tim15_priv =
+{
+  .ops        = &stm32l4_tim_ops,
+  .mode       = STM32L4_TIM_MODE_UNUSED,
+  .base       = STM32L4_TIM15_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM16
+struct stm32l4_tim_priv_s stm32l4_tim16_priv =
+{
+  .ops        = &stm32l4_tim_ops,
+  .mode       = STM32L4_TIM_MODE_UNUSED,
+  .base       = STM32L4_TIM16_BASE,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM17
+struct stm32l4_tim_priv_s stm32l4_tim17_priv =
+{
+  .ops        = &stm32l4_tim_ops,
+  .mode       = STM32L4_TIM_MODE_UNUSED,
+  .base       = STM32L4_TIM17_BASE,
+};
+#endif
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32l4_getreg16
+ *
+ * Description:
+ *   Get a 16-bit register value by offset
+ *
+ ************************************************************************************/
+
+static inline uint16_t stm32l4_getreg16(FAR struct stm32l4_tim_dev_s *dev,
+                                        uint8_t offset)
+{
+  return getreg16(((struct stm32l4_tim_priv_s *)dev)->base + offset);
+}
+
+/************************************************************************************
+ * Name: stm32l4_putreg16
+ *
+ * Description:
+ *   Put a 16-bit register value by offset
+ *
+ ************************************************************************************/
+
+static inline void stm32l4_putreg16(FAR struct stm32l4_tim_dev_s *dev,
+                                    uint8_t offset, uint16_t value)
+{
+  putreg16(value, ((struct stm32l4_tim_priv_s *)dev)->base + offset);
+}
+
+/************************************************************************************
+ * Name: stm32l4_modifyreg16
+ *
+ * Description:
+ *   Modify a 16-bit register value by offset
+ *
+ ************************************************************************************/
+
+static inline void stm32l4_modifyreg16(FAR struct stm32l4_tim_dev_s *dev,
+                                       uint8_t offset, uint16_t clearbits,
+                                       uint16_t setbits)
+{
+  modifyreg16(((struct stm32l4_tim_priv_s *)dev)->base + offset, clearbits,
+              setbits);
+}
+
+/************************************************************************************
+ * Name: stm32l4_getreg32
+ *
+ * Description:
+ *   Get a 32-bit register value by offset.  This applies only for the STM32 F4
+ *   32-bit registers (CNT, ARR, CRR1-4) in the 32-bit timers TIM2-5.
+ *
+ ************************************************************************************/
+
+static inline uint32_t stm32l4_getreg32(FAR struct stm32l4_tim_dev_s *dev,
+                                        uint8_t offset)
+{
+  return getreg32(((struct stm32l4_tim_priv_s *)dev)->base + offset);
+}
+
+/************************************************************************************
+ * Name: stm32l4_putreg32
+ *
+ * Description:
+ *   Put a 32-bit register value by offset.  This applies only for the STM32 F4
+ *   32-bit registers (CNT, ARR, CRR1-4) in the 32-bit timers TIM2-5.
+ *
+ ************************************************************************************/
+
+static inline void stm32l4_putreg32(FAR struct stm32l4_tim_dev_s *dev,
+                                    uint8_t offset, uint32_t value)
+{
+  putreg32(value, ((struct stm32l4_tim_priv_s *)dev)->base + offset);
+}
+
+/************************************************************************************
+ * Name: stm32l4_tim_reload_counter
+ ************************************************************************************/
+
+static void stm32l4_tim_reload_counter(FAR struct stm32l4_tim_dev_s *dev)
+{
+  uint16_t val = stm32l4_getreg16(dev, STM32L4_BTIM_EGR_OFFSET);
+  val |= ATIM_EGR_UG;
+  stm32l4_putreg16(dev, STM32L4_BTIM_EGR_OFFSET, val);
+}
+
+/************************************************************************************
+ * Name: stm32l4_tim_enable
+ ************************************************************************************/
+
+static void stm32l4_tim_enable(FAR struct stm32l4_tim_dev_s *dev)
+{
+  uint16_t val = stm32l4_getreg16(dev, STM32L4_BTIM_CR1_OFFSET);
+  val |= ATIM_CR1_CEN;
+  stm32l4_tim_reload_counter(dev);
+  stm32l4_putreg16(dev, STM32L4_BTIM_CR1_OFFSET, val);
+}
+
+/************************************************************************************
+ * Name: stm32l4_tim_disable
+ ************************************************************************************/
+
+static void stm32l4_tim_disable(FAR struct stm32l4_tim_dev_s *dev)
+{
+  uint16_t val = stm32l4_getreg16(dev, STM32L4_BTIM_CR1_OFFSET);
+  val &= ~ATIM_CR1_CEN;
+  stm32l4_putreg16(dev, STM32L4_BTIM_CR1_OFFSET, val);
+}
+
+/************************************************************************************
+ * Name: stm32l4_tim_reset
+ *
+ * Description:
+ *   Reset timer into system default state, but do not affect output/input pins
+ *
+ ************************************************************************************/
+
+static void stm32l4_tim_reset(FAR struct stm32l4_tim_dev_s *dev)
+{
+  ((struct stm32l4_tim_priv_s *)dev)->mode = STM32L4_TIM_MODE_DISABLED;
+  stm32l4_tim_disable(dev);
+}
+
+/************************************************************************************
+ * Name: stm32l4_tim_gpioconfig
+ ************************************************************************************/
+
+#if defined(HAVE_TIM1_GPIOCONFIG)||defined(HAVE_TIM2_GPIOCONFIG)||\
+    defined(HAVE_TIM3_GPIOCONFIG)||defined(HAVE_TIM4_GPIOCONFIG)||\
+    defined(HAVE_TIM5_GPIOCONFIG)||defined(HAVE_TIM8_GPIOCONFIG)
+static void stm32l4_tim_gpioconfig(uint32_t cfg, stm32l4_tim_channel_t mode)
+{
+  /* TODO: Add support for input capture and bipolar dual outputs for TIM8 */
+
+  if (mode & STM32L4_TIM_CH_MODE_MASK)
+    {
+      stm32l4_configgpio(cfg);
+    }
+  else
+    {
+      stm32l4_unconfiggpio(cfg);
+    }
+}
+#endif
+
+/************************************************************************************
+ * Name: stm32l4_tim_setmode
+ ************************************************************************************/
+
+static int stm32l4_tim_setmode(FAR struct stm32l4_tim_dev_s *dev,
+                               stm32l4_tim_mode_t mode)
+{
+  uint16_t val = ATIM_CR1_CEN | ATIM_CR1_ARPE;
+
+  DEBUGASSERT(dev != NULL);
+
+  /* This function is not supported on basic timers. To enable or
+   * disable it, simply set its clock to valid frequency or zero.
+   */
+
+#if STM32L4_NBTIM > 0
+  if (((struct stm32l4_tim_priv_s *)dev)->base == STM32L4_TIM6_BASE
+#endif
+#if STM32L4_NBTIM > 1
+      ||  ((struct stm32l4_tim_priv_s *)dev)->base == STM32L4_TIM7_BASE
+#endif
+#if STM32L4_NBTIM > 0
+  )
+    {
+      return -EINVAL;
+    }
+#endif
+
+  /* Decode operational modes */
+
+  switch (mode & STM32L4_TIM_MODE_MASK)
+    {
+      case STM32L4_TIM_MODE_DISABLED:
+        val = 0;
+        break;
+
+      case STM32L4_TIM_MODE_DOWN:
+        val |= ATIM_CR1_DIR;
+
+      case STM32L4_TIM_MODE_UP:
+        break;
+
+      case STM32L4_TIM_MODE_UPDOWN:
+        val |= ATIM_CR1_CENTER1;
+        // Our default: Interrupts are generated on compare, when counting down
+        break;
+
+      case STM32L4_TIM_MODE_PULSE:
+        val |= ATIM_CR1_OPM;
+        break;
+
+      default:
+        return -EINVAL;
+    }
+
+  stm32l4_tim_reload_counter(dev);
+  stm32l4_putreg16(dev, STM32L4_BTIM_CR1_OFFSET, val);
+
+#if STM32L4_NATIM > 0
+  /* Advanced registers require Main Output Enable */
+
+    if (((struct stm32l4_tim_priv_s *)dev)->base == STM32L4_TIM1_BASE ||
+        ((struct stm32l4_tim_priv_s *)dev)->base == STM32L4_TIM8_BASE)
+      {
+        stm32l4_modifyreg16(dev, STM32L4_ATIM_BDTR_OFFSET, 0, ATIM_BDTR_MOE);
+      }
+#endif
+
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32l4_tim_setclock
+ ************************************************************************************/
+
+static int stm32l4_tim_setclock(FAR struct stm32l4_tim_dev_s *dev,
+                                uint32_t freq)
+{
+  uint32_t freqin;
+  int prescaler;
+
+  DEBUGASSERT(dev != NULL);
+
+  /* Disable Timer? */
+
+  if (freq == 0)
+    {
+      stm32l4_tim_disable(dev);
+      return 0;
+    }
+
+  /* Get the input clock frequency for this timer.  These vary with
+   * different timer clock sources, MCU-specific timer configuration, and
+   * board-specific clock configuration.  The correct input clock frequency
+   * must be defined in the board.h header file.
+   */
+
+  switch (((struct stm32l4_tim_priv_s *)dev)->base)
+    {
+#ifdef CONFIG_STM32L4_TIM1
+      case STM32L4_TIM1_BASE:
+        freqin = BOARD_TIM1_FREQUENCY;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM2
+      case STM32L4_TIM2_BASE:
+        freqin = BOARD_TIM2_FREQUENCY;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM3
+      case STM32L4_TIM3_BASE:
+        freqin = BOARD_TIM3_FREQUENCY;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM4
+      case STM32L4_TIM4_BASE:
+        freqin = BOARD_TIM4_FREQUENCY;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM5
+      case STM32L4_TIM5_BASE:
+        freqin = BOARD_TIM5_FREQUENCY;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM6
+      case STM32L4_TIM6_BASE:
+        freqin = BOARD_TIM6_FREQUENCY;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM7
+      case STM32L4_TIM7_BASE:
+        freqin = BOARD_TIM7_FREQUENCY;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM8
+      case STM32L4_TIM8_BASE:
+        freqin = BOARD_TIM8_FREQUENCY;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM15
+      case STM32L4_TIM15_BASE:
+        freqin = BOARD_TIM15_FREQUENCY;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM16
+      case STM32L4_TIM16_BASE:
+        freqin = BOARD_TIM16_FREQUENCY;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM17
+      case STM32L4_TIM17_BASE:
+        freqin = BOARD_TIM17_FREQUENCY;
+        break;
+#endif
+
+      default:
+        return -EINVAL;
+    }
+
+  /* Select a pre-scaler value for this timer using the input clock
+   * frequency.
+   */
+
+  prescaler = freqin / freq;
+
+  /* We need to decrement value for '1', but only, if that will not to
+   * cause underflow.
+   */
+
+  if (prescaler > 0)
+    {
+      prescaler--;
+    }
+
+  /* Check for overflow as well. */
+
+  if (prescaler > 0xffff)
+    {
+      prescaler = 0xffff;
+    }
+
+  stm32l4_putreg16(dev, STM32L4_BTIM_PSC_OFFSET, prescaler);
+  stm32l4_tim_enable(dev);
+
+  return prescaler;
+}
+
+/************************************************************************************
+ * Name: stm32l4_tim_setperiod
+ ************************************************************************************/
+
+static void stm32l4_tim_setperiod(FAR struct stm32l4_tim_dev_s *dev,
+                                uint32_t period)
+{
+  DEBUGASSERT(dev != NULL);
+  stm32l4_putreg32(dev, STM32L4_BTIM_ARR_OFFSET, period);
+}
+
+/************************************************************************************
+ * Name: stm32l4_tim_getcounter
+ ************************************************************************************/
+
+static uint32_t stm32l4_tim_getcounter(FAR struct stm32l4_tim_dev_s *dev)
+{
+  DEBUGASSERT(dev != NULL);
+  return stm32l4_getreg32(dev, STM32L4_BTIM_CNT_OFFSET);
+}
+
+/************************************************************************************
+ * Name: stm32l4_tim_setchannel
+ ************************************************************************************/
+
+static int stm32l4_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev,
+                                  uint8_t channel, stm32l4_tim_channel_t mode)
+{
+  uint16_t ccmr_orig   = 0;
+  uint16_t ccmr_val    = 0;
+  uint16_t ccmr_mask   = 0xff;
+  uint16_t ccer_val    = stm32l4_getreg16(dev, STM32L4_GTIM_CCER_OFFSET);
+  uint8_t  ccmr_offset = STM32L4_GTIM_CCMR1_OFFSET;
+
+  DEBUGASSERT(dev != NULL);
+
+  /* Further we use range as 0..3; if channel=0 it will also overflow here */
+
+  if (--channel > 4)
+    {
+      return -EINVAL;
+    }
+
+  /* Assume that channel is disabled and polarity is active high */
+
+  ccer_val &= ~(3 << (channel << 2));
+
+  /* This function is not supported on basic timers. To enable or
+   * disable it, simply set its clock to valid frequency or zero.
+   */
+
+#if STM32L4_NBTIM > 0
+  if (((struct stm32l4_tim_priv_s *)dev)->base == STM32L4_TIM6_BASE
+#endif
+#if STM32L4_NBTIM > 1
+      || ((struct stm32l4_tim_priv_s *)dev)->base == STM32L4_TIM7_BASE
+#endif
+#if STM32L4_NBTIM > 0
+  )
+    {
+      return -EINVAL;
+    }
+#endif
+
+  /* Decode configuration */
+
+  switch (mode & STM32L4_TIM_CH_MODE_MASK)
+    {
+      case STM32L4_TIM_CH_DISABLED:
+        break;
+
+      case STM32L4_TIM_CH_OUTPWM:
+        ccmr_val  =  (ATIM_CCMR_MODE_PWM1 << ATIM_CCMR1_OC1M_SHIFT) + ATIM_CCMR1_OC1PE;
+        ccer_val |= ATIM_CCER_CC1E << (channel << 2);
+        break;
+
+      default:
+        return -EINVAL;
+    }
+
+  /* Set polarity */
+
+  if (mode & STM32L4_TIM_CH_POLARITY_NEG)
+    {
+      ccer_val |= ATIM_CCER_CC1P << (channel << 2);
+    }
+
+  /* Define its position (shift) and get register offset */
+
+  if (channel & 1)
+    {
+      ccmr_val  <<= 8;
+      ccmr_mask <<= 8;
+    }
+
+  if (channel > 1)
+    {
+      ccmr_offset = STM32L4_GTIM_CCMR2_OFFSET;
+    }
+
+  ccmr_orig  = stm32l4_getreg16(dev, ccmr_offset);
+  ccmr_orig &= ~ccmr_mask;
+  ccmr_orig |= ccmr_val;
+  stm32l4_putreg16(dev, ccmr_offset, ccmr_orig);
+  stm32l4_putreg16(dev, STM32L4_GTIM_CCER_OFFSET, ccer_val);
+
+  /* set GPIO */
+
+  switch (((struct stm32l4_tim_priv_s *)dev)->base)
+    {
+#ifdef CONFIG_STM32L4_TIM1
+      case STM32L4_TIM1_BASE:
+        switch (channel)
+          {
+#if defined(GPIO_TIM1_CH1OUT)
+            case 0:
+              stm32l4_tim_gpioconfig(GPIO_TIM1_CH1OUT, mode); break;
+#endif
+#if defined(GPIO_TIM1_CH2OUT)
+            case 1:
+              stm32l4_tim_gpioconfig(GPIO_TIM1_CH2OUT, mode); break;
+#endif
+#if defined(GPIO_TIM1_CH3OUT)
+            case 2:
+              stm32l4_tim_gpioconfig(GPIO_TIM1_CH3OUT, mode); break;
+#endif
+#if defined(GPIO_TIM1_CH4OUT)
+            case 3:
+              stm32l4_tim_gpioconfig(GPIO_TIM1_CH4OUT, mode); break;
+#endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM2
+      case STM32L4_TIM2_BASE:
+        switch (channel)
+          {
+#if defined(GPIO_TIM2_CH1OUT)
+            case 0:
+              stm32l4_tim_gpioconfig(GPIO_TIM2_CH1OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM2_CH2OUT)
+            case 1:
+              stm32l4_tim_gpioconfig(GPIO_TIM2_CH2OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM2_CH3OUT)
+            case 2:
+              stm32l4_tim_gpioconfig(GPIO_TIM2_CH3OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM2_CH4OUT)
+            case 3:
+              stm32l4_tim_gpioconfig(GPIO_TIM2_CH4OUT, mode);
+              break;
+#endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM3
+      case STM32L4_TIM3_BASE:
+        switch (channel)
+          {
+#if defined(GPIO_TIM3_CH1OUT)
+            case 0:
+              stm32l4_tim_gpioconfig(GPIO_TIM3_CH1OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM3_CH2OUT)
+            case 1:
+              stm32l4_tim_gpioconfig(GPIO_TIM3_CH2OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM3_CH3OUT)
+            case 2:
+              stm32l4_tim_gpioconfig(GPIO_TIM3_CH3OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM3_CH4OUT)
+            case 3:
+              stm32l4_tim_gpioconfig(GPIO_TIM3_CH4OUT, mode);
+              break;
+#endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM4
+      case STM32L4_TIM4_BASE:
+        switch (channel)
+          {
+#if defined(GPIO_TIM4_CH1OUT)
+            case 0:
+              stm32l4_tim_gpioconfig(GPIO_TIM4_CH1OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM4_CH2OUT)
+            case 1:
+              stm32l4_tim_gpioconfig(GPIO_TIM4_CH2OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM4_CH3OUT)
+            case 2:
+              stm32l4_tim_gpioconfig(GPIO_TIM4_CH3OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM4_CH4OUT)
+            case 3:
+              stm32l4_tim_gpioconfig(GPIO_TIM4_CH4OUT, mode);
+              break;
+#endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM5
+      case STM32L4_TIM5_BASE:
+        switch (channel)
+          {
+#if defined(GPIO_TIM5_CH1OUT)
+            case 0:
+              stm32l4_tim_gpioconfig(GPIO_TIM5_CH1OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM5_CH2OUT)
+            case 1:
+              stm32l4_tim_gpioconfig(GPIO_TIM5_CH2OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM5_CH3OUT)
+            case 2:
+              stm32l4_tim_gpioconfig(GPIO_TIM5_CH3OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM5_CH4OUT)
+            case 3:
+              stm32l4_tim_gpioconfig(GPIO_TIM5_CH4OUT, mode);
+              break;
+#endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM8
+      case STM32L4_TIM8_BASE:
+        switch (channel)
+          {
+#if defined(GPIO_TIM8_CH1OUT)
+            case 0:
+              stm32l4_tim_gpioconfig(GPIO_TIM8_CH1OUT, mode); break;
+#endif
+#if defined(GPIO_TIM8_CH2OUT)
+            case 1:
+              stm32l4_tim_gpioconfig(GPIO_TIM8_CH2OUT, mode); break;
+#endif
+#if defined(GPIO_TIM8_CH3OUT)
+            case 2:
+              stm32l4_tim_gpioconfig(GPIO_TIM8_CH3OUT, mode); break;
+#endif
+#if defined(GPIO_TIM8_CH4OUT)
+            case 3:
+              stm32l4_tim_gpioconfig(GPIO_TIM8_CH4OUT, mode); break;
+#endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM15
+      case STM32L4_TIM15_BASE:
+        switch (channel)
+          {
+#if defined(GPIO_TIM15_CH1OUT)
+            case 0:
+              stm32l4_tim_gpioconfig(GPIO_TIM15_CH1OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM15_CH2OUT)
+            case 1:
+              stm32l4_tim_gpioconfig(GPIO_TIM15_CH2OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM15_CH3OUT)
+            case 2:
+              stm32l4_tim_gpioconfig(GPIO_TIM15_CH3OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM15_CH4OUT)
+            case 3:
+              stm32l4_tim_gpioconfig(GPIO_TIM15_CH4OUT, mode);
+              break;
+#endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM16
+      case STM32L4_TIM16_BASE:
+        switch (channel)
+          {
+#if defined(GPIO_TIM16_CH1OUT)
+            case 0:
+              stm32l4_tim_gpioconfig(GPIO_TIM16_CH1OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM16_CH2OUT)
+            case 1:
+              stm32l4_tim_gpioconfig(GPIO_TIM16_CH2OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM16_CH3OUT)
+            case 2:
+              stm32l4_tim_gpioconfig(GPIO_TIM16_CH3OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM16_CH4OUT)
+            case 3:
+              stm32l4_tim_gpioconfig(GPIO_TIM16_CH4OUT, mode);
+              break;
+#endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM17
+      case STM32L4_TIM17_BASE:
+        switch (channel)
+          {
+#if defined(GPIO_TIM17_CH1OUT)
+            case 0:
+              stm32l4_tim_gpioconfig(GPIO_TIM17_CH1OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM17_CH2OUT)
+            case 1:
+              stm32l4_tim_gpioconfig(GPIO_TIM17_CH2OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM17_CH3OUT)
+            case 2:
+              stm32l4_tim_gpioconfig(GPIO_TIM17_CH3OUT, mode);
+              break;
+#endif
+#if defined(GPIO_TIM17_CH4OUT)
+            case 3:
+              stm32l4_tim_gpioconfig(GPIO_TIM17_CH4OUT, mode);
+              break;
+#endif
+            default:
+              return -EINVAL;
+          }
+        break;
+#endif
+      default:
+        return -EINVAL;
+    }
+
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32l4_tim_setcompare
+ ************************************************************************************/
+
+static int stm32l4_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev,
+                                  uint8_t channel, uint32_t compare)
+{
+  DEBUGASSERT(dev != NULL);
+
+  switch (channel)
+    {
+      case 1:
+        stm32l4_putreg32(dev, STM32L4_GTIM_CCR1_OFFSET, compare);
+        break;
+      case 2:
+        stm32l4_putreg32(dev, STM32L4_GTIM_CCR2_OFFSET, compare);
+        break;
+      case 3:
+        stm32l4_putreg32(dev, STM32L4_GTIM_CCR3_OFFSET, compare);
+        break;
+      case 4:
+        stm32l4_putreg32(dev, STM32L4_GTIM_CCR4_OFFSET, compare);
+        break;
+      default:
+        return -EINVAL;
+    }
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32l4_tim_getcapture
+ ************************************************************************************/
+
+static int stm32l4_tim_getcapture(FAR struct stm32l4_tim_dev_s *dev,
+                                  uint8_t channel)
+{
+  DEBUGASSERT(dev != NULL);
+
+  switch (channel)
+    {
+      case 1:
+        return stm32l4_getreg32(dev, STM32L4_GTIM_CCR1_OFFSET);
+      case 2:
+        return stm32l4_getreg32(dev, STM32L4_GTIM_CCR2_OFFSET);
+      case 3:
+        return stm32l4_getreg32(dev, STM32L4_GTIM_CCR3_OFFSET);
+      case 4:
+        return stm32l4_getreg32(dev, STM32L4_GTIM_CCR4_OFFSET);
+    }
+
+  return -EINVAL;
+}
+
+/************************************************************************************
+ * Name: stm32l4_tim_setisr
+ ************************************************************************************/
+
+static int stm32l4_tim_setisr(FAR struct stm32l4_tim_dev_s *dev,
+                              xcpt_t handler, void *arg, int source)
+{
+  int vectorno;
+
+  DEBUGASSERT(dev != NULL);
+  DEBUGASSERT(source == 0);
+
+  switch (((struct stm32l4_tim_priv_s *)dev)->base)
+    {
+#ifdef CONFIG_STM32L4_TIM1
+      case STM32L4_TIM1_BASE:
+        vectorno = STM32L4_IRQ_TIM1UP;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM2
+      case STM32L4_TIM2_BASE:
+        vectorno = STM32L4_IRQ_TIM2;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM3
+      case STM32L4_TIM3_BASE:
+        vectorno = STM32L4_IRQ_TIM3;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM4
+      case STM32L4_TIM4_BASE:
+        vectorno = STM32L4_IRQ_TIM4;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM5
+      case STM32L4_TIM5_BASE:
+        vectorno = STM32L4_IRQ_TIM5;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM6
+      case STM32L4_TIM6_BASE:
+        vectorno = STM32L4_IRQ_TIM6;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM7
+      case STM32L4_TIM7_BASE:
+        vectorno = STM32L4_IRQ_TIM7;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM8
+      case STM32L4_TIM8_BASE:
+        vectorno = STM32L4_IRQ_TIM8UP;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM15
+      case STM32L4_TIM15_BASE:
+        vectorno = STM32L4_IRQ_TIM15;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM16
+      case STM32L4_TIM16_BASE:
+        vectorno = STM32L4_IRQ_TIM16;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM17
+      case STM32L4_TIM17_BASE:
+        vectorno = STM32L4_IRQ_TIM17;
+        break;
+#endif
+
+      default:
+        return -EINVAL;
+    }
+
+  /* Disable interrupt when callback is removed */
+
+  if (!handler)
+    {
+      up_disable_irq(vectorno);
+      irq_detach(vectorno);
+      return OK;
+    }
+
+  /* Otherwise set callback and enable interrupt */
+
+  irq_attach(vectorno, handler, arg);
+  up_enable_irq(vectorno);
+
+#ifdef CONFIG_ARCH_IRQPRIO
+  /* Set the interrupt priority */
+
+  up_prioritize_irq(vectorno, NVIC_SYSH_PRIORITY_DEFAULT);
+#endif
+
+  return OK;
+}
+
+/************************************************************************************
+ * Name: stm32l4_tim_enableint
+ ************************************************************************************/
+
+static void stm32l4_tim_enableint(FAR struct stm32l4_tim_dev_s *dev, int source)
+{
+  DEBUGASSERT(dev != NULL);
+  stm32l4_modifyreg16(dev, STM32L4_BTIM_DIER_OFFSET, 0, ATIM_DIER_UIE);
+}
+
+/************************************************************************************
+ * Name: stm32l4_tim_disableint
+ ************************************************************************************/
+
+static void stm32l4_tim_disableint(FAR struct stm32l4_tim_dev_s *dev,
+                                   int source)
+{
+  DEBUGASSERT(dev != NULL);
+  stm32l4_modifyreg16(dev, STM32L4_BTIM_DIER_OFFSET, ATIM_DIER_UIE, 0);
+}
+
+/************************************************************************************
+ * Name: stm32l4_tim_ackint
+ ************************************************************************************/
+
+static void stm32l4_tim_ackint(FAR struct stm32l4_tim_dev_s *dev, int source)
+{
+  stm32l4_putreg16(dev, STM32L4_BTIM_SR_OFFSET, ~ATIM_SR_UIF);
+}
+
+/************************************************************************************
+ * Name: stm32l4_tim_checkint
+ ************************************************************************************/
+
+static int stm32l4_tim_checkint(FAR struct stm32l4_tim_dev_s *dev, int source)
+{
+  uint16_t regval = stm32l4_getreg16(dev, STM32L4_BTIM_SR_OFFSET);
+  return (regval & ATIM_SR_UIF) ? 1 : 0;
+}
+
+/************************************************************************************
+ * Pubic Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32l4_tim_init
+ ************************************************************************************/
+
+FAR struct stm32l4_tim_dev_s *stm32l4_tim_init(int timer)
+{
+  struct stm32l4_tim_dev_s *dev = NULL;
+
+  /* Get structure and enable power */
+
+  switch (timer)
+    {
+#ifdef CONFIG_STM32L4_TIM1
+      case 1:
+        dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim1_priv;
+        modifyreg32(STM32L4_RCC_APB2ENR, 0, RCC_APB2ENR_TIM1EN);
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM2
+      case 2:
+        dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim2_priv;
+        modifyreg32(STM32L4_RCC_APB1ENR1, 0, RCC_APB1ENR1_TIM2EN);
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM3
+      case 3:
+        dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim3_priv;
+        modifyreg32(STM32L4_RCC_APB1ENR1, 0, RCC_APB1ENR1_TIM3EN);
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM4
+      case 4:
+        dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim4_priv;
+        modifyreg32(STM32L4_RCC_APB1ENR1, 0, RCC_APB1ENR1_TIM4EN);
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM5
+      case 5:
+        dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim5_priv;
+        modifyreg32(STM32L4_RCC_APB1ENR1, 0, RCC_APB1ENR1_TIM5EN);
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM6
+      case 6:
+        dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim6_priv;
+        modifyreg32(STM32L4_RCC_APB1ENR1, 0, RCC_APB1ENR1_TIM6EN);
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM7
+      case 7:
+        dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim7_priv;
+        modifyreg32(STM32L4_RCC_APB1ENR1, 0, RCC_APB1ENR1_TIM7EN);
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM8
+      case 8:
+        dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim8_priv;
+        modifyreg32(STM32L4_RCC_APB2ENR, 0, RCC_APB2ENR_TIM8EN);
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM15
+      case 15:
+        dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim15_priv;
+        modifyreg32(STM32L4_RCC_APB2ENR, 0, RCC_APB2ENR_TIM15EN);
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM16
+      case 16:
+        dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim16_priv;
+        modifyreg32(STM32L4_RCC_APB2ENR, 0, RCC_APB2ENR_TIM16EN);
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM17
+      case 17:
+        dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim17_priv;
+        modifyreg32(STM32L4_RCC_APB2ENR, 0, RCC_APB2ENR_TIM17EN);
+        break;
+#endif
+      default:
+        return NULL;
+    }
+
+  /* Is device already allocated */
+
+  if (((struct stm32l4_tim_priv_s *)dev)->mode != STM32L4_TIM_MODE_UNUSED)
+    {
+      return NULL;
+    }
+
+  stm32l4_tim_reset(dev);
+
+  return dev;
+}
+
+/************************************************************************************
+ * Name: stm32l4_tim_deinit
+ *
+ * TODO: Detach interrupts, and close down all TIM Channels
+ *
+ ************************************************************************************/
+
+int stm32l4_tim_deinit(FAR struct stm32l4_tim_dev_s *dev)
+{
+  DEBUGASSERT(dev != NULL);
+
+  /* Disable power */
+
+  switch (((struct stm32l4_tim_priv_s *)dev)->base)
+    {
+#ifdef CONFIG_STM32L4_TIM1
+      case STM32L4_TIM1_BASE:
+        modifyreg32(STM32L4_RCC_APB2ENR, RCC_APB2ENR_TIM1EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM2
+      case STM32L4_TIM2_BASE:
+        modifyreg32(STM32L4_RCC_APB1ENR1, RCC_APB1ENR1_TIM2EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM3
+      case STM32L4_TIM3_BASE:
+        modifyreg32(STM32L4_RCC_APB1ENR1, RCC_APB1ENR1_TIM3EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM4
+      case STM32L4_TIM4_BASE:
+        modifyreg32(STM32L4_RCC_APB1ENR1, RCC_APB1ENR1_TIM4EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM5
+      case STM32L4_TIM5_BASE:
+        modifyreg32(STM32L4_RCC_APB1ENR1, RCC_APB1ENR1_TIM5EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM6
+      case STM32L4_TIM6_BASE:
+        modifyreg32(STM32L4_RCC_APB1ENR1, RCC_APB1ENR1_TIM6EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM7
+      case STM32L4_TIM7_BASE:
+        modifyreg32(STM32L4_RCC_APB1ENR1, RCC_APB1ENR1_TIM7EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM8
+      case STM32L4_TIM8_BASE:
+        modifyreg32(STM32L4_RCC_APB2ENR, RCC_APB2ENR_TIM8EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM15
+      case STM32L4_TIM15_BASE:
+        modifyreg32(STM32L4_RCC_APB2ENR, RCC_APB2ENR_TIM15EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM16
+      case STM32L4_TIM16_BASE:
+        modifyreg32(STM32L4_RCC_APB2ENR, RCC_APB2ENR_TIM16EN, 0);
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM17
+      case STM32L4_TIM17_BASE:
+        modifyreg32(STM32L4_RCC_APB2ENR, RCC_APB2ENR_TIM17EN, 0);
+        break;
+#endif
+      default:
+        return -EINVAL;
+    }
+
+  /* Mark it as free */
+
+  ((struct stm32l4_tim_priv_s *)dev)->mode = STM32L4_TIM_MODE_UNUSED;
+
+  return OK;
+}
+
+#endif /* defined(CONFIG_STM32L4_TIM1 || ... || TIM17) */
diff --git a/arch/arm/src/stm32l4/stm32l4_tim.h b/arch/arm/src/stm32l4/stm32l4_tim.h
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..8362ef13875d1abe30384886dd8777065dcc7111 100644
--- a/arch/arm/src/stm32l4/stm32l4_tim.h
+++ b/arch/arm/src/stm32l4/stm32l4_tim.h
@@ -0,0 +1,223 @@
+/************************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_tim.h
+ *
+ *   Copyright (C) 2011 Uros Platise. All rights reserved.
+ *   Author: Uros Platise 
+ *
+ * With modifications and updates by:
+ *
+ *   Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           dev@ziggurat29.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32L4_STM32L4_TIM_H
+#define __ARCH_ARM_SRC_STM32L4_STM32L4_TIM_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "chip.h"
+#include "chip/stm32l4_tim.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Helpers **************************************************************************/
+
+#define STM32L4_TIM_SETMODE(d,mode)       ((d)->ops->setmode(d,mode))
+#define STM32L4_TIM_SETCLOCK(d,freq)      ((d)->ops->setclock(d,freq))
+#define STM32L4_TIM_SETPERIOD(d,period)   ((d)->ops->setperiod(d,period))
+#define STM32L4_TIM_GETCOUNTER(d)         ((d)->ops->getcounter(d))
+#define STM32L4_TIM_SETCHANNEL(d,ch,mode) ((d)->ops->setchannel(d,ch,mode))
+#define STM32L4_TIM_SETCOMPARE(d,ch,comp) ((d)->ops->setcompare(d,ch,comp))
+#define STM32L4_TIM_GETCAPTURE(d,ch)      ((d)->ops->getcapture(d,ch))
+#define STM32L4_TIM_SETISR(d,hnd,arg,s)   ((d)->ops->setisr(d,hnd,arg,s))
+#define STM32L4_TIM_ENABLEINT(d,s)        ((d)->ops->enableint(d,s))
+#define STM32L4_TIM_DISABLEINT(d,s)       ((d)->ops->disableint(d,s))
+#define STM32L4_TIM_ACKINT(d,s)           ((d)->ops->ackint(d,s))
+#define STM32L4_TIM_CHECKINT(d,s)         ((d)->ops->checkint(d,s))
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/* TIM Device Structure */
+
+struct stm32l4_tim_dev_s
+{
+  struct stm32l4_tim_ops_s *ops;
+};
+
+/* TIM Modes of Operation */
+
+typedef enum
+{
+  STM32L4_TIM_MODE_UNUSED       = -1,
+
+  /* One of the following */
+
+  STM32L4_TIM_MODE_MASK         = 0x0310,
+  STM32L4_TIM_MODE_DISABLED     = 0x0000,
+  STM32L4_TIM_MODE_UP           = 0x0100,
+  STM32L4_TIM_MODE_DOWN         = 0x0110,
+  STM32L4_TIM_MODE_UPDOWN       = 0x0200,
+  STM32L4_TIM_MODE_PULSE        = 0x0300,
+
+  /* One of the following */
+
+  STM32L4_TIM_MODE_CK_INT       = 0x0000,
+//STM32L4_TIM_MODE_CK_INT_TRIG  = 0x0400,
+//STM32L4_TIM_MODE_CK_EXT       = 0x0800,
+//STM32L4_TIM_MODE_CK_EXT_TRIG  = 0x0C00,
+
+  /* Clock sources, OR'ed with CK_EXT */
+
+//STM32L4_TIM_MODE_CK_CHINVALID = 0x0000,
+//STM32L4_TIM_MODE_CK_CH1       = 0x0001,
+//STM32L4_TIM_MODE_CK_CH2       = 0x0002,
+//STM32L4_TIM_MODE_CK_CH3       = 0x0003,
+//STM32L4_TIM_MODE_CK_CH4       = 0x0004
+
+  /* Todo: external trigger block */
+
+} stm32l4_tim_mode_t;
+
+/* TIM Channel Modes */
+
+typedef enum
+{
+  STM32L4_TIM_CH_DISABLED       = 0x00,
+
+  /* Common configuration */
+
+  STM32L4_TIM_CH_POLARITY_POS   = 0x00,
+  STM32L4_TIM_CH_POLARITY_NEG   = 0x01,
+
+  /* MODES: */
+
+  STM32L4_TIM_CH_MODE_MASK      = 0x06,
+
+  /* Output Compare Modes */
+
+  STM32L4_TIM_CH_OUTPWM         = 0x04,     /** Enable standard PWM mode, active high when counter < compare */
+//STM32L4_TIM_CH_OUTCOMPARE     = 0x06,
+
+  // TODO other modes ... as PWM capture, ENCODER and Hall Sensor
+//STM32L4_TIM_CH_INCAPTURE      = 0x10,
+//STM32L4_TIM_CH_INPWM          = 0x20
+//STM32L4_TIM_CH_DRIVE_OC   -- open collector mode
+
+} stm32l4_tim_channel_t;
+
+/* TIM Operations */
+
+struct stm32l4_tim_ops_s
+{
+  /* Basic Timers */
+
+  int  (*setmode)(FAR struct stm32l4_tim_dev_s *dev, stm32l4_tim_mode_t mode);
+  int  (*setclock)(FAR struct stm32l4_tim_dev_s *dev, uint32_t freq);
+  void (*setperiod)(FAR struct stm32l4_tim_dev_s *dev, uint32_t period);
+  uint32_t (*getcounter)(FAR struct stm32l4_tim_dev_s *dev);
+
+  /* General and Advanced Timers Adds */
+
+  int  (*setchannel)(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel,
+                     stm32l4_tim_channel_t mode);
+  int  (*setcompare)(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel,
+                     uint32_t compare);
+  int  (*getcapture)(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel);
+
+  /* Timer interrupts */
+
+  int  (*setisr)(FAR struct stm32l4_tim_dev_s *dev,
+                 xcpt_t handler, void *arg, int source);
+  void (*enableint)(FAR struct stm32l4_tim_dev_s *dev, int source);
+  void (*disableint)(FAR struct stm32l4_tim_dev_s *dev, int source);
+  void (*ackint)(FAR struct stm32l4_tim_dev_s *dev, int source);
+  int  (*checkint)(FAR struct stm32l4_tim_dev_s *dev, int source);
+};
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/* Power-up timer and get its structure */
+
+FAR struct stm32l4_tim_dev_s *stm32l4_tim_init(int timer);
+
+/* Power-down timer, mark it as unused */
+
+int stm32l4_tim_deinit(FAR struct stm32l4_tim_dev_s *dev);
+
+/****************************************************************************
+ * Name: stm32l4_timer_initialize
+ *
+ * Description:
+ *   Bind the configuration timer to a timer lower half instance and
+ *   register the timer drivers at 'devpath'
+ *
+ * Input Parameters:
+ *   devpath - The full path to the timer device. This should be of the form /dev/timer0
+ *   timer - the timer number.
+ *
+ * Returned Values:
+ *   Zero (OK) is returned on success; A negated errno value is returned
+ *   to indicate the nature of any failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_TIMER
+int stm32l4_timer_initialize(FAR const char *devpath, int timer);
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_STM32L4_STM32L4_TIM_H */
diff --git a/arch/arm/src/stm32l4/stm32l4_tim_lowerhalf.c b/arch/arm/src/stm32l4/stm32l4_tim_lowerhalf.c
new file mode 100644
index 0000000000000000000000000000000000000000..59918c81ba9292ad26e2fa9e6ea98d336dc26af4
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_tim_lowerhalf.c
@@ -0,0 +1,538 @@
+/****************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_tim_lowerhalf.c
+ *
+ *   Copyright (C) 2015 Wail Khemir. All rights reserved.
+ *   Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved.
+ *   Copyright (C) 2016 Sebastien Lorquet All rights reserved.
+ *   Authors: Wail Khemir 
+ *            Paul Alexander Patience 
+ *            dev@ziggurat29.com
+ *            Sebastien Lorquet 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include "stm32l4_tim.h"
+
+#if defined(CONFIG_TIMER) && \
+    (defined(CONFIG_STM32L4_TIM1)  || defined(CONFIG_STM32L4_TIM2)  || \
+     defined(CONFIG_STM32L4_TIM3)  || defined(CONFIG_STM32L4_TIM4)  || \
+     defined(CONFIG_STM32L4_TIM5)  || defined(CONFIG_STM32L4_TIM6)  || \
+     defined(CONFIG_STM32L4_TIM7)  || defined(CONFIG_STM32L4_TIM8)  || \
+     defined(CONFIG_STM32L4_TIM15) || defined(CONFIG_STM32L4_TIM16) || \
+     defined(CONFIG_STM32L4_TIM17))
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define STM32L4_TIM1_RES   16
+#define STM32L4_TIM2_RES   32
+#define STM32L4_TIM3_RES   16
+#define STM32L4_TIM4_RES   16
+#define STM32L4_TIM5_RES   32
+#define STM32L4_TIM6_RES   16
+#define STM32L4_TIM7_RES   16
+#define STM32L4_TIM8_RES   16
+#define STM32L4_TIM15_RES  16
+#define STM32L4_TIM16_RES  16
+#define STM32L4_TIM17_RES  16
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+/* This structure provides the private representation of the "lower-half"
+ * driver state structure.  This structure must be cast-compatible with the
+ * timer_lowerhalf_s structure.
+ */
+
+struct stm32l4_lowerhalf_s
+{
+  FAR const struct timer_ops_s *ops;        /* Lower half operations */
+  FAR struct stm32l4_tim_dev_s *tim;        /* stm32 timer driver */
+  tccb_t                        callback;   /* Current upper half interrupt callback */
+  FAR void                     *arg;        /* Argument passed to upper half callback */
+  bool                          started;    /* True: Timer has been started */
+  const uint8_t                 resolution; /* Number of bits in the timer (16 or 32 bits) */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* Interrupt handling *******************************************************/
+
+static int stm32l4_timer_handler(int irq, void *context, void *arg);
+
+/* "Lower half" driver methods **********************************************/
+
+static int stm32l4_start(FAR struct timer_lowerhalf_s *lower);
+static int stm32l4_stop(FAR struct timer_lowerhalf_s *lower);
+static int stm32l4_settimeout(FAR struct timer_lowerhalf_s *lower,
+                              uint32_t timeout);
+static void stm32l4_setcallback(FAR struct timer_lowerhalf_s *lower,
+                                tccb_t callback, FAR void *arg);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+/* "Lower half" driver methods */
+
+static const struct timer_ops_s g_timer_ops =
+{
+  .start       = stm32l4_start,
+  .stop        = stm32l4_stop,
+  .getstatus   = NULL,
+  .settimeout  = stm32l4_settimeout,
+  .setcallback = stm32l4_setcallback,
+  .ioctl       = NULL,
+};
+
+#ifdef CONFIG_STM32L4_TIM1
+static struct stm32l4_lowerhalf_s g_tim1_lowerhalf =
+{
+  .ops         = &g_timer_ops,
+  .resolution  = STM32L4_TIM1_RES,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM2
+static struct stm32l4_lowerhalf_s g_tim2_lowerhalf =
+{
+  .ops         = &g_timer_ops,
+  .resolution  = STM32L4_TIM2_RES,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM3
+static struct stm32l4_lowerhalf_s g_tim3_lowerhalf =
+{
+  .ops         = &g_timer_ops,
+  .resolution  = STM32L4_TIM3_RES,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM4
+static struct stm32l4_lowerhalf_s g_tim4_lowerhalf =
+{
+  .ops         = &g_timer_ops,
+  .resolution  = STM32L4_TIM4_RES,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM5
+static struct stm32l4_lowerhalf_s g_tim5_lowerhalf =
+{
+  .ops         = &g_timer_ops,
+  .resolution  = STM32L4_TIM5_RES,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM6
+static struct stm32l4_lowerhalf_s g_tim6_lowerhalf =
+{
+  .ops         = &g_timer_ops,
+  .resolution  = STM32L4_TIM6_RES,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM7
+static struct stm32l4_lowerhalf_s g_tim7_lowerhalf =
+{
+  .ops         = &g_timer_ops,
+  .resolution  = STM32L4_TIM7_RES,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM8
+static struct stm32l4_lowerhalf_s g_tim8_lowerhalf =
+{
+  .ops         = &g_timer_ops,
+  .resolution  = STM32L4_TIM8_RES,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM15
+static struct stm32l4_lowerhalf_s g_tim15_lowerhalf =
+{
+  .ops         = &g_timer_ops,
+  .resolution  = STM32L4_TIM15_RES,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM16
+static struct stm32l4_lowerhalf_s g_tim16_lowerhalf =
+{
+  .ops         = &g_timer_ops,
+  .resolution  = STM32L4_TIM16_RES,
+};
+#endif
+
+#ifdef CONFIG_STM32L4_TIM17
+static struct stm32l4_lowerhalf_s g_tim17_lowerhalf =
+{
+  .ops         = &g_timer_ops,
+  .resolution  = STM32L4_TIM17_RES,
+};
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_timer_handler
+ *
+ * Description:
+ *   timer interrupt handler
+ *
+ * Input Parameters:
+ *
+ * Returned Values:
+ *
+ ****************************************************************************/
+
+static int stm32l4_timer_handler(int irq, void *context, void *arg)
+{
+  FAR struct stm32l4_lowerhalf_s *lower = (FAR struct stm32l4_lowerhalf_s *) arg;
+  uint32_t next_interval_us = 0;
+
+  STM32L4_TIM_ACKINT(lower->tim, 0);
+
+  if (lower->callback(&next_interval_us, lower->arg))
+    {
+      if (next_interval_us > 0)
+        {
+          STM32L4_TIM_SETPERIOD(lower->tim, next_interval_us);
+        }
+    }
+  else
+    {
+      stm32l4_stop((struct timer_lowerhalf_s *)lower);
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_start
+ *
+ * Description:
+ *   Start the timer, resetting the time to the current timeout,
+ *
+ * Input Parameters:
+ *   lower - A pointer the publicly visible representation of the "lower-half"
+ *           driver state structure.
+ *
+ * Returned Values:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+static int stm32l4_start(FAR struct timer_lowerhalf_s *lower)
+{
+  FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower;
+
+  if (!priv->started)
+    {
+      STM32L4_TIM_SETMODE(priv->tim, STM32L4_TIM_MODE_UP);
+
+      if (priv->callback != NULL)
+        {
+          STM32L4_TIM_SETISR(priv->tim, stm32l4_timer_handler, priv, 0);
+          STM32L4_TIM_ENABLEINT(priv->tim, 0);
+        }
+
+      priv->started = true;
+      return OK;
+    }
+
+  /* Return EBUSY to indicate that the timer was already running */
+
+  return -EBUSY;
+}
+
+/****************************************************************************
+ * Name: stm32l4_stop
+ *
+ * Description:
+ *   Stop the timer
+ *
+ * Input Parameters:
+ *   lower - A pointer the publicly visible representation of the "lower-half"
+ *           driver state structure.
+ *
+ * Returned Values:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+static int stm32l4_stop(FAR struct timer_lowerhalf_s *lower)
+{
+  FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower;
+
+  if (priv->started)
+    {
+      STM32L4_TIM_SETMODE(priv->tim, STM32L4_TIM_MODE_DISABLED);
+      STM32L4_TIM_DISABLEINT(priv->tim, 0);
+      STM32L4_TIM_SETISR(priv->tim, NULL, NULL, 0);
+      priv->started = false;
+      return OK;
+    }
+
+  /* Return ENODEV to indicate that the timer was not running */
+
+  return -ENODEV;
+}
+
+/****************************************************************************
+ * Name: stm32l4_settimeout
+ *
+ * Description:
+ *   Set a new timeout value (and reset the timer)
+ *
+ * Input Parameters:
+ *   lower   - A pointer the publicly visible representation of the "lower-half"
+ *             driver state structure.
+ *   timeout - The new timeout value in microseconds.
+ *
+ * Returned Values:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+static int stm32l4_settimeout(FAR struct timer_lowerhalf_s *lower,
+                              uint32_t timeout)
+{
+  FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower;
+  uint64_t maxtimeout;
+
+  if (priv->started)
+    {
+      return -EPERM;
+    }
+
+  maxtimeout = (1 << priv->resolution) - 1;
+  if (timeout > maxtimeout)
+    {
+      uint64_t freq = (maxtimeout * 1000000) / timeout;
+      STM32L4_TIM_SETCLOCK(priv->tim, freq);
+      STM32L4_TIM_SETPERIOD(priv->tim, maxtimeout);
+    }
+  else
+    {
+      STM32L4_TIM_SETCLOCK(priv->tim, 1000000);
+      STM32L4_TIM_SETPERIOD(priv->tim, timeout);
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: stm32l4_sethandler
+ *
+ * Description:
+ *   Call this user provided timeout handler.
+ *
+ * Input Parameters:
+ *   lower    - A pointer the publicly visible representation of the "lower-half"
+ *              driver state structure.
+ *   callback - The new timer expiration function pointer.  If this
+ *              function pointer is NULL, then the reset-on-expiration
+ *              behavior is restored,
+ *   arg      - Argument that will be provided in the callback
+ *
+ * Returned Values:
+ *   The previous timer expiration function pointer or NULL is there was
+ *   no previous function pointer.
+ *
+ ****************************************************************************/
+
+static void stm32l4_setcallback(FAR struct timer_lowerhalf_s *lower,
+                                tccb_t callback, FAR void *arg)
+{
+  FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower;
+  irqstate_t flags = enter_critical_section();
+
+  /* Save the new callback */
+
+  priv->callback = callback;
+  priv->arg     = arg;
+
+  if (callback != NULL && priv->started)
+    {
+      STM32L4_TIM_SETISR(priv->tim, stm32l4_timer_handler, priv, 0);
+      STM32L4_TIM_ENABLEINT(priv->tim, 0);
+    }
+  else
+    {
+      STM32L4_TIM_DISABLEINT(priv->tim, 0);
+      STM32L4_TIM_SETISR(priv->tim, NULL, NULL, 0);
+    }
+
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32l4_timer_initialize
+ *
+ * Description:
+ *   Bind the configuration timer to a timer lower half instance and
+ *   register the timer drivers at 'devpath'
+ *
+ * Input Parameters:
+ *   devpath - The full path to the timer device.  This should be of the
+ *     form /dev/timer0
+ *   timer - the timer's number.
+ *
+ * Returned Values:
+ *   Zero (OK) is returned on success; A negated errno value is returned
+ *   to indicate the nature of any failure.
+ *
+ ****************************************************************************/
+
+int stm32l4_timer_initialize(FAR const char *devpath, int timer)
+{
+  FAR struct stm32l4_lowerhalf_s *lower;
+
+  switch (timer)
+    {
+#ifdef CONFIG_STM32L4_TIM1
+      case 1:
+        lower = &g_tim1_lowerhalf;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM2
+      case 2:
+        lower = &g_tim2_lowerhalf;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM3
+      case 3:
+        lower = &g_tim3_lowerhalf;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM4
+      case 4:
+        lower = &g_tim4_lowerhalf;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM5
+      case 5:
+        lower = &g_tim5_lowerhalf;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM6
+      case 6:
+        lower = &g_tim6_lowerhalf;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM7
+      case 7:
+        lower = &g_tim7_lowerhalf;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM8
+      case 8:
+        lower = &g_tim8_lowerhalf;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM15
+      case 15:
+        lower = &g_tim15_lowerhalf;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM16
+      case 16:
+        lower = &g_tim16_lowerhalf;
+        break;
+#endif
+#ifdef CONFIG_STM32L4_TIM17
+      case 17:
+        lower = &g_tim17_lowerhalf;
+        break;
+#endif
+      default:
+        return -ENODEV;
+    }
+
+  /* Initialize the elements of lower half state structure */
+
+  lower->started  = false;
+  lower->callback = NULL;
+  lower->tim      = stm32l4_tim_init(timer);
+
+  if (lower->tim == NULL)
+    {
+      return -EINVAL;
+    }
+
+  /* Register the timer driver as /dev/timerX.  The returned value from
+   * timer_register is a handle that could be used with timer_unregister().
+   * REVISIT: The returned handle is discard here.
+   */
+
+  FAR void *drvr = timer_register(devpath,
+                                  (FAR struct timer_lowerhalf_s *)lower);
+  if (drvr == NULL)
+    {
+      /* The actual cause of the failure may have been a failure to allocate
+       * perhaps a failure to register the timer driver (such as if the
+       * 'depath' were not unique).  We know here but we return EEXIST to
+       * indicate the failure (implying the non-unique devpath).
+       */
+
+      return -EEXIST;
+    }
+
+  return OK;
+}
+
+#endif /* CONFIG_TIMER */
diff --git a/arch/arm/src/stm32l4/stm32l4_timerisr.c b/arch/arm/src/stm32l4/stm32l4_timerisr.c
index ee02fc01fa6861deab43476fe526196d80147d4d..4fdec1a6209730a4e9a455d08bf9893a7b7d7e56 100644
--- a/arch/arm/src/stm32l4/stm32l4_timerisr.c
+++ b/arch/arm/src/stm32l4/stm32l4_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32l4/stm32l4_timerisr.c
  *
- *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -86,19 +86,11 @@
 #endif
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  stm32l4_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -106,7 +98,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int stm32l4_timerisr(int irq, uint32_t *regs, void *arg)
 {
   /* Process timer interrupt */
 
@@ -115,7 +107,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -123,7 +119,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t regval;
 
@@ -152,7 +148,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(STM32L4_IRQ_SYSTICK, (xcpt_t)up_timerisr);
+  (void)irq_attach(STM32L4_IRQ_SYSTICK, (xcpt_t)stm32l4_timerisr, NULL);
 
   /* Enable SysTick interrupts */
 
diff --git a/arch/arm/src/stm32l4/stm32l4_uart.h b/arch/arm/src/stm32l4/stm32l4_uart.h
index 24fc9bd31367ad7243dd20cd29f363784c1a58a2..e66302d8e4d7bd7affa36d8a9b5f1326e8de7385 100644
--- a/arch/arm/src/stm32l4/stm32l4_uart.h
+++ b/arch/arm/src/stm32l4/stm32l4_uart.h
@@ -57,19 +57,19 @@
  * device.
  */
 
-#if STM32L4_NUSART < 5 || !defined(CONFIG_STM32L4_HAVE_UART5)
+#if !defined(CONFIG_STM32L4_HAVE_UART5)
 #  undef CONFIG_STM32L4_UART5
 #endif
-#if STM32L4_NUSART < 4 || !defined(CONFIG_STM32L4_HAVE_UART4)
+#if !defined(CONFIG_STM32L4_HAVE_UART4)
 #  undef CONFIG_STM32L4_UART4
 #endif
-#if STM32L4_NUSART < 3 || !defined(CONFIG_STM32L4_HAVE_USART3)
+#if !defined(CONFIG_STM32L4_HAVE_USART3)
 #  undef CONFIG_STM32L4_USART3
 #endif
-#if STM32L4_NUSART < 2
+#if !defined(CONFIG_STM32L4_HAVE_USART2)
 #  undef CONFIG_STM32L4_USART2
 #endif
-#if STM32L4_NUSART < 1
+#if !defined(CONFIG_STM32L4_HAVE_USART1)
 #  undef CONFIG_STM32L4_USART1
 #endif
 
diff --git a/arch/arm/src/stm32l4/stm32l4_usbhost.h b/arch/arm/src/stm32l4/stm32l4_usbhost.h
new file mode 100644
index 0000000000000000000000000000000000000000..efa910414ccb6bed2fb3e17345fd05c510e0bb71
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_usbhost.h
@@ -0,0 +1,212 @@
+/************************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_usbhost.h
+ *
+ *   Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           dev@ziggurat29.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32L4_STM32L4_USBHOST_H
+#define __ARCH_ARM_SRC_STM32L4_STM32L4_USBHOST_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include 
+#include 
+#include 
+
+#include "chip.h"
+#include "chip/stm32l4x6xx_otgfs.h"
+
+#if defined(CONFIG_STM32L4_OTGFS) && defined(CONFIG_USBHOST)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+#ifdef HAVE_USBHOST_TRACE
+enum usbhost_trace1codes_e
+{
+  __TRACE1_BASEVALUE = 0,           /* This will force the first value to be 1 */
+
+  OTGFS_TRACE1_DEVDISCONN,           /* OTGFS ERROR: Host Port Device disconnected */
+  OTGFS_TRACE1_IRQATTACH,            /* OTGFS ERROR: Failed to attach IRQ */
+  OTGFS_TRACE1_TRNSFRFAILED,         /* OTGFS ERROR: Host Port Transfer Failed */
+  OTGFS_TRACE1_SENDSETUP,            /* OTGFS ERROR: sendsetup() failed with: */
+  OTGFS_TRACE1_SENDDATA,             /* OTGFS ERROR: senddata() failed with: */
+  OTGFS_TRACE1_RECVDATA,             /* OTGFS ERROR: recvdata() failed with: */
+
+#ifdef HAVE_USBHOST_TRACE_VERBOSE
+
+  OTGFS_VTRACE1_CONNECTED,           /* OTGFS Host Port connected */
+  OTGFS_VTRACE1_DISCONNECTED,        /* OTGFS Host Port disconnected */
+  OTGFS_VTRACE1_GINT,                /* OTGFS Handling Interrupt. Entry Point */
+  OTGFS_VTRACE1_GINT_SOF,            /* OTGFS Handle the start of frame interrupt */
+  OTGFS_VTRACE1_GINT_RXFLVL,         /* OTGFS Handle the RxFIFO non-empty interrupt */
+  OTGFS_VTRACE1_GINT_NPTXFE,         /* OTGFS Handle the non-periodic TxFIFO empty interrupt */
+  OTGFS_VTRACE1_GINT_PTXFE,          /* OTGFS Handle the periodic TxFIFO empty interrupt */
+  OTGFS_VTRACE1_GINT_HC,             /* OTGFS Handle the host channels interrupt */
+  OTGFS_VTRACE1_GINT_HPRT,           /* OTGFS Handle the host port interrupt */
+  OTGFS_VTRACE1_GINT_HPRT_POCCHNG,   /* OTGFS  HPRT: Port Over-Current Change*/
+  OTGFS_VTRACE1_GINT_HPRT_PCDET,     /* OTGFS  HPRT: Port Connect Detect */
+  OTGFS_VTRACE1_GINT_HPRT_PENCHNG,   /* OTGFS  HPRT: Port Enable Changed */
+  OTGFS_VTRACE1_GINT_HPRT_LSDEV,     /* OTGFS  HPRT: Low Speed Device Connected */
+  OTGFS_VTRACE1_GINT_HPRT_FSDEV,     /* OTGFS  HPRT: Full Speed Device Connected */
+  OTGFS_VTRACE1_GINT_HPRT_LSFSSW,    /* OTGFS  HPRT: Host Switch: LS -> FS */
+  OTGFS_VTRACE1_GINT_HPRT_FSLSSW,    /* OTGFS  HPRT: Host Switch: FS -> LS */
+  OTGFS_VTRACE1_GINT_DISC,           /* OTGFS Handle the disconnect detected interrupt */
+  OTGFS_VTRACE1_GINT_IPXFR,          /* OTGFS Handle the incomplete periodic transfer */
+
+#endif
+
+  __TRACE1_NSTRINGS,                 /* Separates the format 1 from the format 2 strings */
+
+  OTGFS_TRACE2_CLIP,                 /* OTGFS CLIP: chidx:  buflen: */
+
+#ifdef HAVE_USBHOST_TRACE_VERBOSE
+
+  OTGFS_VTRACE2_CHANWAKEUP_IN,       /* OTGFS IN Channel wake up with result */
+  OTGFS_VTRACE2_CHANWAKEUP_OUT,      /* OTGFS OUT Channel wake up with result */
+  OTGFS_VTRACE2_CTRLIN,              /* OTGFS CTRLIN */
+  OTGFS_VTRACE2_CTRLOUT,             /* OTGFS CTRLOUT */
+  OTGFS_VTRACE2_INTRIN,              /* OTGFS INTRIN */
+  OTGFS_VTRACE2_INTROUT,             /* OTGFS INTROUT */
+  OTGFS_VTRACE2_BULKIN,              /* OTGFS BULKIN */
+  OTGFS_VTRACE2_BULKOUT,             /* OTGFS BULKOUT */
+  OTGFS_VTRACE2_ISOCIN,              /* OTGFS ISOCIN */
+  OTGFS_VTRACE2_ISOCOUT,             /* OTGFS ISOCOUT */
+  OTGFS_VTRACE2_STARTTRANSFER,       /* OTGFS EP buflen */
+  OTGFS_VTRACE2_CHANCONF_CTRL_IN,
+  OTGFS_VTRACE2_CHANCONF_CTRL_OUT,
+  OTGFS_VTRACE2_CHANCONF_INTR_IN,
+  OTGFS_VTRACE2_CHANCONF_INTR_OUT,
+  OTGFS_VTRACE2_CHANCONF_BULK_IN,
+  OTGFS_VTRACE2_CHANCONF_BULK_OUT,
+  OTGFS_VTRACE2_CHANCONF_ISOC_IN,
+  OTGFS_VTRACE2_CHANCONF_ISOC_OUT,
+  OTGFS_VTRACE2_CHANHALT,            /* Channel halted. chidx: , reason:  */
+
+#endif
+
+  __TRACE2_NSTRINGS                  /* Total number of enumeration values */
+};
+
+#  define TRACE1_FIRST     ((int)__TRACE1_BASEVALUE + 1)
+#  define TRACE1_INDEX(id) ((int)(id) - TRACE1_FIRST)
+#  define TRACE1_NSTRINGS  TRACE1_INDEX(__TRACE1_NSTRINGS)
+
+#  define TRACE2_FIRST     ((int)__TRACE1_NSTRINGS + 1)
+#  define TRACE2_INDEX(id) ((int)(id) - TRACE2_FIRST)
+#  define TRACE2_NSTRINGS  TRACE2_INDEX(__TRACE2_NSTRINGS)
+
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+/*
+ * STM32L4 USB OTG FS Host Driver Support
+ *
+ * Pre-requisites
+ *
+ *  CONFIG_USBHOST        - Enable general USB host support
+ *  CONFIG_STM32L4_OTGFS  - Enable the STM32 USB OTG FS block
+ *  CONFIG_STM32L4_SYSCFG - Needed
+ *
+ * Options:
+ *
+ *  CONFIG_STM32L4_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words.
+ *    Default 128 (512 bytes)
+ *  CONFIG_STM32L4_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO
+ *    in 32-bit words.  Default 96 (384 bytes)
+ *  CONFIG_STM32L4_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit
+ *    words.  Default 96 (384 bytes)
+ *  CONFIG_STM32L4_OTGFS_SOFINTR - Enable SOF interrupts.  Why would you ever
+ *    want to do that?
+ *
+ *  CONFIG_STM32L4_USBHOST_REGDEBUG - Enable very low-level register access
+ *    debug.  Depends on CONFIG_DEBUG.
+ */
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/***********************************************************************************
+ * Name: stm32l4_usbhost_vbusdrive
+ *
+ * Description:
+ *   Enable/disable driving of VBUS 5V output.  This function must be provided be
+ *   each platform that implements the STM32L4 OTG FS host interface
+ *
+ *   "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
+ *    or, if 5 V are available on the application board, a basic power switch, must
+ *    be added externally to drive the 5 V VBUS line. The external charge pump can
+ *    be driven by any GPIO output. When the application decides to power on VBUS
+ *    using the chosen GPIO, it must also set the port power bit in the host port
+ *    control and status register (PPWR bit in OTG_FS_HPRT).
+ *
+ *   "The application uses this field to control power to this port, and the core
+ *    clears this bit on an over current condition."
+ *
+ * Input Parameters:
+ *   iface - For future growth to handle multiple USB host interface.  Should be zero.
+ *   enable - true: enable VBUS power; false: disable VBUS power
+ *
+ * Returned Value:
+ *   None
+ *
+ ***********************************************************************************/
+
+void stm32l4_usbhost_vbusdrive(int iface, bool enable);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* CONFIG_STM32L4_OTGFS && CONFIG_USBHOST */
+#endif /* __ARCH_ARM_SRC_STM32L4_STM32L4_USBHOST_H */
diff --git a/arch/arm/src/stm32l4/stm32l4_usbhost_trace.c b/arch/arm/src/stm32l4/stm32l4_usbhost_trace.c
new file mode 100644
index 0000000000000000000000000000000000000000..6ede922c7494cf7ae23fc355a5120e480b6a04a2
--- /dev/null
+++ b/arch/arm/src/stm32l4/stm32l4_usbhost_trace.c
@@ -0,0 +1,189 @@
+/********************************************************************************************
+ * arch/arm/src/stm32l4/stm32l4_usbhost_trace.c
+ *
+ *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           dev@ziggurat29.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Included Files
+ ********************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include "stm32l4_usbhost.h"
+
+#ifdef HAVE_USBHOST_TRACE
+
+/********************************************************************************************
+ * Pre-processor Definitions
+ ********************************************************************************************/
+
+#define TR_FMT1 false
+#define TR_FMT2 true
+
+#define TRENTRY(id,fmt1,string) {string}
+
+#ifndef NULL
+#  define NULL ((FAR void *)0)
+#endif
+
+/********************************************************************************************
+ * Private Types
+ ********************************************************************************************/
+
+struct stm32l4_usbhost_trace_s
+{
+#if 0
+  uint16_t id;
+  bool fmt2;
+#endif
+  FAR const char *string;
+};
+
+/********************************************************************************************
+ * Private Data
+ ********************************************************************************************/
+
+static const struct stm32l4_usbhost_trace_s g_trace1[TRACE1_NSTRINGS] =
+{
+  TRENTRY(OTGFS_TRACE1_DEVDISCONN,         TR_FMT1, "OTGFS ERROR: Host Port %d. Device disconnected\n"),
+  TRENTRY(OTGFS_TRACE1_IRQATTACH,          TR_FMT1, "OTGFS ERROR: Failed to attach IRQ\n"),
+  TRENTRY(OTGFS_TRACE1_TRNSFRFAILED,       TR_FMT1, "OTGFS  ERROR: Transfer Failed. ret=%d\n"),
+  TRENTRY(OTGFS_TRACE1_SENDSETUP,          TR_FMT1, "OTGFS  ERROR: ctrl_sendsetup() failed with: %d\n"),
+  TRENTRY(OTGFS_TRACE1_SENDDATA,           TR_FMT1, "OTGFS  ERROR: ctrl_senddata() failed with: %d\n"),
+  TRENTRY(OTGFS_TRACE1_RECVDATA,           TR_FMT1, "OTGFS  ERROR: ctrl_recvdata() failed with: %d\n"),
+
+#ifdef HAVE_USBHOST_TRACE_VERBOSE
+
+  TRENTRY(OTGFS_VTRACE1_CONNECTED,         TR_FMT1, "OTGFS Host Port %d connected.\n"),
+  TRENTRY(OTGFS_VTRACE1_DISCONNECTED,      TR_FMT1, "OTGFS Host Port %d disconnected.\n"),
+  TRENTRY(OTGFS_VTRACE1_GINT,              TR_FMT1, "OTGFS Handling Interrupt. Entry Point.\n"),
+  TRENTRY(OTGFS_VTRACE1_GINT_SOF,          TR_FMT1, "OTGFS Handle the start of frame interrupt.\n"),
+  TRENTRY(OTGFS_VTRACE1_GINT_RXFLVL,       TR_FMT1, "OTGFS Handle the RxFIFO non-empty interrupt.\n"),
+  TRENTRY(OTGFS_VTRACE1_GINT_NPTXFE,       TR_FMT1, "OTGFS Handle the non-periodic TxFIFO empty interrupt.\n"),
+  TRENTRY(OTGFS_VTRACE1_GINT_PTXFE,        TR_FMT1, "OTGFS Handle the periodic TxFIFO empty interrupt.\n"),
+  TRENTRY(OTGFS_VTRACE1_GINT_HC,           TR_FMT1, "OTGFS Handle the host channels interrupt.\n"),
+  TRENTRY(OTGFS_VTRACE1_GINT_HPRT,         TR_FMT1, "OTGFS Handle the host port interrupt.\n"),
+  TRENTRY(OTGFS_VTRACE1_GINT_HPRT_POCCHNG, TR_FMT1, "OTGFS  HPRT: Port Over-Current Change.\n"),
+  TRENTRY(OTGFS_VTRACE1_GINT_HPRT_PCDET,   TR_FMT1, "OTGFS  HPRT: Port Connect Detect.\n"),
+  TRENTRY(OTGFS_VTRACE1_GINT_HPRT_PENCHNG, TR_FMT1, "OTGFS  HPRT: Port Enable Changed.\n"),
+  TRENTRY(OTGFS_VTRACE1_GINT_HPRT_LSDEV,   TR_FMT1, "OTGFS  HPRT: Low Speed Device Connected.\n"),
+  TRENTRY(OTGFS_VTRACE1_GINT_HPRT_FSDEV,   TR_FMT1, "OTGFS  HPRT: Full Speed Device Connected.\n"),
+  TRENTRY(OTGFS_VTRACE1_GINT_HPRT_LSFSSW,  TR_FMT1, "OTGFS  HPRT: Host Switch: LS -> FS.\n"),
+  TRENTRY(OTGFS_VTRACE1_GINT_HPRT_FSLSSW,  TR_FMT1, "OTGFS  HPRT: Host Switch: FS -> LS.\n"),
+  TRENTRY(OTGFS_VTRACE1_GINT_DISC,         TR_FMT1, "OTGFS Handle the disconnect detected interrupt.\n"),
+  TRENTRY(OTGFS_VTRACE1_GINT_IPXFR,        TR_FMT1, "OTGFS Handle the incomplete periodic transfer.\n"),
+
+#endif
+};
+
+static const struct stm32l4_usbhost_trace_s g_trace2[TRACE2_NSTRINGS] =
+{
+  TRENTRY(OTGFS_TRACE2_CLIP,                TR_FMT2, "OTGFS CLIP: chidx: %d buflen: %d\n"),
+
+#ifdef HAVE_USBHOST_TRACE_VERBOSE
+
+  TRENTRY(OTGFS_VTRACE2_CHANWAKEUP_IN,      TR_FMT2, "OTGFS  EP%d(IN)  wake up with result: %d\n"),
+  TRENTRY(OTGFS_VTRACE2_CHANWAKEUP_OUT,     TR_FMT2, "OTGFS  EP%d(OUT) wake up with result: %d\n"),
+  TRENTRY(OTGFS_VTRACE2_CTRLIN,             TR_FMT2, "OTGFS CTRL_IN  type: %02x req: %02x\n"),
+  TRENTRY(OTGFS_VTRACE2_CTRLOUT,            TR_FMT2, "OTGFS CTRL_OUT type: %02x req: %02x\n"),
+  TRENTRY(OTGFS_VTRACE2_INTRIN,             TR_FMT2, "OTGFS INTR_IN  chidx: %02x len: %02x\n"),
+  TRENTRY(OTGFS_VTRACE2_INTROUT,            TR_FMT2, "OTGFS INTR_OUT chidx: %02x len: %02x\n"),
+  TRENTRY(OTGFS_VTRACE2_BULKIN,             TR_FMT2, "OTGFS BULK_IN  chidx: %02x len: %02x\n"),
+  TRENTRY(OTGFS_VTRACE2_BULKOUT,            TR_FMT2, "OTGFS BULK_OUT chidx: %02x len: %02x\n"),
+  TRENTRY(OTGFS_VTRACE2_ISOCIN,             TR_FMT2, "OTGFS ISOC_IN  chidx: %02x len: %04d\n"),
+  TRENTRY(OTGFS_VTRACE2_ISOCOUT,            TR_FMT2, "OTGFS ISOC_OUT chidx: %02x req: %02x\n"),
+  TRENTRY(OTGFS_VTRACE2_STARTTRANSFER,      TR_FMT2, "OTGFS  Transfer chidx: %d buflen: %d\n"),
+  TRENTRY(OTGFS_VTRACE2_CHANCONF_CTRL_IN,   TR_FMT2, "OTGFS Channel configured. chidx: %d: (EP%d,IN ,CTRL)\n"),
+  TRENTRY(OTGFS_VTRACE2_CHANCONF_CTRL_OUT,  TR_FMT2, "OTGFS Channel configured. chidx: %d: (EP%d,OUT,CTRL)\n"),
+  TRENTRY(OTGFS_VTRACE2_CHANCONF_INTR_IN,   TR_FMT2, "OTGFS Channel configured. chidx: %d: (EP%d,IN ,INTR)\n"),
+  TRENTRY(OTGFS_VTRACE2_CHANCONF_INTR_OUT,  TR_FMT2, "OTGFS Channel configured. chidx: %d: (EP%d,OUT,INTR)\n"),
+  TRENTRY(OTGFS_VTRACE2_CHANCONF_BULK_IN,   TR_FMT2, "OTGFS Channel configured. chidx: %d: (EP%d,IN ,BULK)\n"),
+  TRENTRY(OTGFS_VTRACE2_CHANCONF_BULK_OUT,  TR_FMT2, "OTGFS Channel configured. chidx: %d: (EP%d,OUT,BULK)\n"),
+  TRENTRY(OTGFS_VTRACE2_CHANCONF_ISOC_IN,   TR_FMT2, "OTGFS Channel configured. chidx: %d: (EP%d,IN ,ISOC)\n"),
+  TRENTRY(OTGFS_VTRACE2_CHANCONF_ISOC_OUT,  TR_FMT2, "OTGFS Channel configured. chidx: %d: (EP%d,OUT,ISOC)\n"),
+  TRENTRY(OTGFS_VTRACE2_CHANHALT,           TR_FMT2, "OTGFS Channel halted. chidx: %d, reason: %d\n"),
+
+#endif
+};
+
+/********************************************************************************************
+ * Private Function Prototypes
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Public Functions
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Name: usbhost_trformat1 and usbhost_trformat2
+ *
+ * Description:
+ *   This interface must be provided by platform specific logic that knows
+ *   the HCDs encoding of USB trace data.
+ *
+ *   Given an 9-bit index, return a format string suitable for use with, say,
+ *   printf.  The returned format is expected to handle two unsigned integer
+ *   values.
+ *
+ ********************************************************************************************/
+
+FAR const char *usbhost_trformat1(uint16_t id)
+{
+  int ndx = TRACE1_INDEX(id);
+
+  if (ndx < TRACE1_NSTRINGS)
+    {
+      return g_trace1[ndx].string;
+    }
+
+  return NULL;
+}
+
+FAR const char *usbhost_trformat2(uint16_t id)
+{
+  int ndx = TRACE2_INDEX(id);
+
+  if (ndx < TRACE2_NSTRINGS)
+    {
+      return g_trace2[ndx].string;
+    }
+
+  return NULL;
+}
+
+#endif /* HAVE_USBHOST_TRACE */
diff --git a/arch/arm/src/stm32l4/stm32l4x6xx_dma.c b/arch/arm/src/stm32l4/stm32l4x6xx_dma.c
index eb91e3a7547f819e081465c99ab6f2cd33f8a21d..335e008b182d2863e02417b6cac0083ce8d594c4 100644
--- a/arch/arm/src/stm32l4/stm32l4x6xx_dma.c
+++ b/arch/arm/src/stm32l4/stm32l4x6xx_dma.c
@@ -275,7 +275,7 @@ static void stm32l4_dmachandisable(struct stm32l4_dma_s *dmach)
  *
  ************************************************************************************/
 
-static int stm32l4_dmainterrupt(int irq, void *context)
+static int stm32l4_dmainterrupt(int irq, void *context, FAR void *arg)
 {
   struct stm32l4_dma_s *dmach;
   uint32_t isr;
@@ -351,7 +351,7 @@ void weak_function up_dmainitialize(void)
 
       /* Attach DMA interrupt vectors */
 
-      (void)irq_attach(dmach->irq, stm32l4_dmainterrupt);
+      (void)irq_attach(dmach->irq, stm32l4_dmainterrupt, NULL);
 
       /* Disable the DMA channel */
 
@@ -727,7 +727,7 @@ bool stm32l4_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void stm32l4_dmasample(DMA_HANDLE handle, struct stm32l4_dmaregs_s *regs)
 {
   struct stm32l4_dma_s *dmach = (struct stm32l4_dma_s *)handle;
@@ -755,20 +755,19 @@ void stm32l4_dmasample(DMA_HANDLE handle, struct stm32l4_dmaregs_s *regs)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
 void stm32l4_dmadump(DMA_HANDLE handle, const struct stm32l4_dmaregs_s *regs,
                    const char *msg)
 {
   struct stm32l4_dma_s *dmach = (struct stm32l4_dma_s *)handle;
   uint32_t dmabase = DMA_BASE(dmach->base);
 
-  dmadbg("DMA Registers: %s\n", msg);
-  dmadbg("    ISR[%08x]: %08x\n", dmabase + STM32L4_DMA_ISR_OFFSET, regs->isr);
-  dmadbg("  CSELR[%08x]: %08x\n", dmabase + STM32L4_DMA_CSELR_OFFSET, regs->cselr);
-  dmadbg("    CCR[%08x]: %08x\n", dmach->base + STM32L4_DMACHAN_CCR_OFFSET, regs->ccr);
-  dmadbg("  CNDTR[%08x]: %08x\n", dmach->base + STM32L4_DMACHAN_CNDTR_OFFSET, regs->cndtr);
-  dmadbg("   CPAR[%08x]: %08x\n", dmach->base + STM32L4_DMACHAN_CPAR_OFFSET, regs->cpar);
-  dmadbg("   CMAR[%08x]: %08x\n", dmach->base + STM32L4_DMACHAN_CMAR_OFFSET, regs->cmar);
+  dmainfo("DMA Registers: %s\n", msg);
+  dmainfo("    ISR[%08x]: %08x\n", dmabase + STM32L4_DMA_ISR_OFFSET, regs->isr);
+  dmainfo("  CSELR[%08x]: %08x\n", dmabase + STM32L4_DMA_CSELR_OFFSET, regs->cselr);
+  dmainfo("    CCR[%08x]: %08x\n", dmach->base + STM32L4_DMACHAN_CCR_OFFSET, regs->ccr);
+  dmainfo("  CNDTR[%08x]: %08x\n", dmach->base + STM32L4_DMACHAN_CNDTR_OFFSET, regs->cndtr);
+  dmainfo("   CPAR[%08x]: %08x\n", dmach->base + STM32L4_DMACHAN_CPAR_OFFSET, regs->cpar);
+  dmainfo("   CMAR[%08x]: %08x\n", dmach->base + STM32L4_DMACHAN_CMAR_OFFSET, regs->cmar);
 }
 #endif
-
diff --git a/arch/arm/src/stm32l4/stm32l4x6xx_rcc.c b/arch/arm/src/stm32l4/stm32l4x6xx_rcc.c
index b97fd002dcd2bcf361c0b0a8e188b47da1cc3304..8f6aa209b09da907df910174415e51dc01398a47 100644
--- a/arch/arm/src/stm32l4/stm32l4x6xx_rcc.c
+++ b/arch/arm/src/stm32l4/stm32l4x6xx_rcc.c
@@ -407,18 +407,18 @@ static inline void rcc_enableapb1(void)
   regval |= RCC_APB1ENR1_OPAMPEN;
 #endif
 
+#ifdef CONFIG_STM32L4_LPTIM1
+  /* Low power timer 1 clock enable */
+
+  regval |= RCC_APB1ENR1_LPTIM1EN;
+#endif
+
   putreg32(regval, STM32L4_RCC_APB1ENR1);   /* Enable peripherals */
 
  /* Second APB1 register */
 
   regval = getreg32(STM32L4_RCC_APB1ENR2);
 
-#ifdef CONFIG_STM32L4_LPTIM1
-  /* Low power timer 1 clock enable */
-
-  regval |= RCC_APB1ENR2_LPTIM1EN;
-#endif
-
 #ifdef CONFIG_STM32L4_LPUART1
   /* Low power uart clock enable */
 
diff --git a/arch/arm/src/str71x/Make.defs b/arch/arm/src/str71x/Make.defs
index 00db6c3b8f040171a9eeb4e3d377ecaeef015d32..c9d9fc0869b692e43e812a630d50b79ed908169f 100644
--- a/arch/arm/src/str71x/Make.defs
+++ b/arch/arm/src/str71x/Make.defs
@@ -50,12 +50,6 @@ ifneq ($(CONFIG_DISABLE_SIGNALS),y)
 CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c
 endif
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c
-endif
-
 ifeq ($(CONFIG_STACK_COLORATION),y)
 CMN_CSRCS += up_checkstack.c
 endif
diff --git a/arch/arm/src/str71x/str71x_decodeirq.c b/arch/arm/src/str71x/str71x_decodeirq.c
index c908ae9e3a10110eb97cdf37f4b2db391325ac4f..88751c80c14f56fd424f21098578b517e9e9e5c6 100644
--- a/arch/arm/src/str71x/str71x_decodeirq.c
+++ b/arch/arm/src/str71x/str71x_decodeirq.c
@@ -91,8 +91,8 @@ void up_decodeirq(uint32_t *regs)
 {
 #ifdef CONFIG_SUPPRESS_INTERRUPTS
   board_autoled_on(LED_INIRQ);
-  lowsyslog(LOG_ERR, "Unexpected IRQ\n");
   CURRENT_REGS = regs;
+  err("ERROR: Unexpected IRQ\n");
   PANIC();
 #else
   unsigned int irq;
@@ -132,7 +132,7 @@ void up_decodeirq(uint32_t *regs)
 
       CURRENT_REGS = savestate;
     }
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   else
     {
       PANIC(); /* Normally never happens */
diff --git a/arch/arm/src/str71x/str71x_head.S b/arch/arm/src/str71x/str71x_head.S
index 6a299e8911bb182a95247a80e5447fbc2f9e077a..c35715e02d21e5010ca74a170e2a5b8803573420 100644
--- a/arch/arm/src/str71x/str71x_head.S
+++ b/arch/arm/src/str71x/str71x_head.S
@@ -67,7 +67,7 @@
 #ifdef CONFIG_ARCH_LEDS
 	.globl	board_autoled_initialize	/* Boot LED setup */
 #endif
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 	.globl	up_lowputc					/* Low-level debug output */
 #endif
 	.globl	os_start					/* NuttX entry point */
@@ -86,7 +86,7 @@
  *****************************************************************************/
 
 	.macro	showprogress, code
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 	mov		r0, #\code
 	bl		up_lowputc
 #endif
diff --git a/arch/arm/src/str71x/str71x_serial.c b/arch/arm/src/str71x/str71x_serial.c
index fe98f543aa7f0ea559bbc7c851f6b703ddfabe24..f1688ae3838527615f0c55f5088d25dbbba76266 100644
--- a/arch/arm/src/str71x/str71x_serial.c
+++ b/arch/arm/src/str71x/str71x_serial.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/str71x/str71x_serial.c
  *
- *   Copyright (C) 2008-2009, 2012-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2012-2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -254,7 +254,7 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-static int  up_interrupt(int irq, void *context);
+static int  up_interrupt(int irq, void *context, void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  up_receive(struct uart_dev_s *dev, uint32_t *status);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
@@ -618,7 +618,7 @@ static int up_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, up_interrupt);
+  ret = irq_attach(priv->irq, up_interrupt, dev);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
@@ -667,47 +667,15 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_interrupt(int irq, void *context)
+static int up_interrupt(int irq, void *context, void *arg)
 {
-  struct uart_dev_s *dev = NULL;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct up_dev_s   *priv;
   int                passes;
   bool               handled;
 
-#ifdef CONFIG_STR71X_UART0
-  if (g_uart0priv.irq == irq)
-    {
-      dev = &g_uart0port;
-    }
-  else
-#endif
-#ifdef CONFIG_STR71X_UART1
-  if (g_uart1priv.irq == irq)
-    {
-      dev = &g_uart1port;
-    }
-  else
-#endif
-#ifdef CONFIG_STR71X_UART2
-  if (g_uart2priv.irq == irq)
-    {
-      dev = &g_uart2port;
-    }
-  else
-#endif
-#ifdef CONFIG_STR71X_UART3
-  if (g_uart3priv.irq == irq)
-    {
-      dev = &g_uart3port;
-    }
-  else
-#endif
-    {
-      PANIC();
-    }
-
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct up_dev_s *)dev->priv;
-  DEBUGASSERT(priv && dev);
 
   /* Loop until there are no characters to be transferred or,
    * until we have been looping for a long time.
diff --git a/arch/arm/src/str71x/str71x_timerisr.c b/arch/arm/src/str71x/str71x_timerisr.c
index 3604e6aa73c95181714b160976893de74073e7e1..8fe2bda5aa57f6c95397ce56deef57239f0b9d10 100644
--- a/arch/arm/src/str71x/str71x_timerisr.c
+++ b/arch/arm/src/str71x/str71x_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/str71x/str71x_timerisr.c
  *
- *   Copyright (C) 2007-2009, 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -114,19 +114,11 @@
 #endif
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  str71x_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -134,7 +126,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int str71x_timerisr(int irq, uint32_t *regs, void *arg)
 {
   uint16_t ocar;
 
@@ -158,7 +150,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -166,7 +162,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   irqstate_t flags;
 
@@ -208,7 +204,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(STR71X_IRQ_SYSTIMER, (xcpt_t)up_timerisr);
+  (void)irq_attach(STR71X_IRQ_SYSTIMER, (xcpt_t)str71x_timerisr, NULL);
 
   /* And enable the timer interrupt */
 
diff --git a/arch/arm/src/str71x/str71x_xti.c b/arch/arm/src/str71x/str71x_xti.c
index 1bb42e656b9d22e11b571e5a143fe244d040dc58..386b01784bbe1c1a8b0cf4ae891b5bf749a7f300 100644
--- a/arch/arm/src/str71x/str71x_xti.c
+++ b/arch/arm/src/str71x/str71x_xti.c
@@ -95,7 +95,7 @@ static const struct xtiregs_s g_xtiregs[2] =
  *
  ********************************************************************************/
 
-static int str71x_xtiinterrupt(int irq, FAR void *context)
+static int str71x_xtiinterrupt(int irq, FAR void *context, FAR void *arg)
 {
   uint16_t enabled = (uint16_t)getreg8(STR71X_XTI_MRH) << 8 |
                      (uint16_t)getreg8(STR71X_XTI_MRL);
@@ -168,7 +168,7 @@ int str71x_xtiinitialize(void)
 
   /* Attach the XTI interrupt */
 
-  ret = irq_attach(STR71X_IRQ_XTI, str71x_xtiinterrupt);
+  ret = irq_attach(STR71X_IRQ_XTI, str71x_xtiinterrupt, NULL);
   if (ret == OK)
     {
       /* Enable the XTI interrupt at the XTI */
diff --git a/arch/arm/src/tiva/Kconfig b/arch/arm/src/tiva/Kconfig
index 20be1413092ef246f9b924e31c8a3e535fa4f4ef..fb82d1fb5a3b0b8b89f1a4b46554d4c276e3d850 100644
--- a/arch/arm/src/tiva/Kconfig
+++ b/arch/arm/src/tiva/Kconfig
@@ -783,7 +783,7 @@ config TIVA_I2C_HIGHSPEED
 config TIVA_I2C_REGDEBUG
 	bool "Register level debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_I2C_INFO
 	---help---
 		Enables extremely detailed register access debug output.
 
@@ -840,7 +840,7 @@ endif # TIVA_TIMER_16BIT
 config TIVA_TIMER_REGDEBUG
 	bool "Register level debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_TIMER_INFO
 	---help---
 		Enables extremely detailed register access debug output.
 
@@ -853,7 +853,7 @@ menu "ADC Configuration"
 config TIVA_ADC_REGDEBUG
 	bool "Register level debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_ANALOG_INFO
 	---help---
 		Enables extremely detailed register access debug output.
 
@@ -911,6 +911,26 @@ config TIVA_BADCRC
 	---help---
 		Set to enable bad CRC rejection.
 
+choice
+	prompt "Work queue"
+	default LM3S_ETHERNET_LPWORK if SCHED_LPWORK
+	default LM3S_ETHERNET_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the Ethernet driver.  If the
+		low priority work queue is available, then it should be used by the
+		driver.
+
+config LM3S_ETHERNET_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
+
+config LM3S_ETHERNET_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
+
+endchoice # Work queue
+
 config TIVA_DUMPPACKET
 	bool "Dump Packets"
 	default n
@@ -1100,12 +1120,32 @@ config TIVA_EMAC_HWCHECKSUM
 	---help---
 		Use the hardware checksum capabilities of the Tiva chip
 
+choice
+	prompt "Work queue"
+	default TIVA_ETHERNET_LPWORK if SCHED_LPWORK
+	default TIVA_ETHERNET_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the Ethernet driver.  If the
+		low priority work queue is available, then it should be used by the
+		driver.
+
+config TIVA_ETHERNET_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
+
+config TIVA_ETHERNET_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
+
+endchoice # Work queue
+
 config TIVA_ETHERNET_REGDEBUG
 	bool "Register-Level Debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_NET_INFO
 	---help---
-		Enable very low-level register access debug.  Depends on DEBUG.
+		Enable very low-level register access debug.  Depends on CONFIG_DEBUG_FEATURES.
 
 endmenu # Tiva Ethernet Configuration
 
diff --git a/arch/arm/src/tiva/Make.defs b/arch/arm/src/tiva/Make.defs
index cb5648817586721f50db0450af0946503e54a8a2..d65294d6c51984cac4bf41096183eb6a86c3f2b5 100644
--- a/arch/arm/src/tiva/Make.defs
+++ b/arch/arm/src/tiva/Make.defs
@@ -51,10 +51,6 @@ ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
 CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
 endif
 
-ifeq ($(CONFIG_ARCH_MEMCPY),y)
-CMN_ASRCS += up_memcpy.S
-endif
-
 ifeq ($(CONFIG_STACK_COLORATION),y)
 CMN_CSRCS += up_checkstack.c
 endif
@@ -69,16 +65,13 @@ else
 CMN_CSRCS += up_allocateheap.c
 endif
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += up_elf.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += up_elf.c
-endif
-
 CHIP_ASRCS  =
 CHIP_CSRCS  = tiva_allocateheap.c tiva_start.c tiva_irq.c tiva_gpio.c
 CHIP_CSRCS += tiva_gpioirq.c tiva_lowputc.c tiva_serial.c tiva_ssi.c
+
+ifeq ($(CONFIG_DEBUG_GPIO_INFO),y)
 CHIP_CSRCS += tiva_dumpgpio.c
+endif
 
 ifeq ($(CONFIG_ARCH_CHIP_TM4C129),y)
 CHIP_CSRCS += tm4c129_syscontrol.c
@@ -98,6 +91,14 @@ ifeq ($(CONFIG_TIVA_I2C),y)
 CHIP_CSRCS += tiva_i2c.c
 endif
 
+ifeq ($(CONFIG_TIVA_PWM),y)
+CHIP_CSRCS += tiva_pwm.c
+endif
+
+ifeq ($(CONFIG_TIVA_QEI),y)
+CHIP_CSRCS += tiva_qencoder.c
+endif
+
 ifeq ($(CONFIG_TIVA_TIMER),y)
 CHIP_CSRCS += tiva_timerlib.c
 ifeq ($(CONFIG_TIVA_TIMER32_PERIODIC),y)
diff --git a/arch/arm/src/tiva/chip/tiva_pwm.h b/arch/arm/src/tiva/chip/tiva_pwm.h
new file mode 100644
index 0000000000000000000000000000000000000000..05e2302f3595db740af4f645dfb718c3a1d6bc0b
--- /dev/null
+++ b/arch/arm/src/tiva/chip/tiva_pwm.h
@@ -0,0 +1,129 @@
+/************************************************************************************
+ * arch/arm/src/tiva/chip/tiva_pwm.h
+ *
+ *   Copyright (C) 2016 Young Mu. All rights reserved.
+ *   Author: Young Mu 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_TIVA_CHIP_TIVA_PWM_H
+#define __ARCH_ARM_SRC_TIVA_CHIP_TIVA_PWM_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#define TIVA_PWM_CTL_OFFSET             (0x0)   /* PWM Master Control */
+#define TIVA_PWM_SYNC_OFFSET            (0x4)   /* PWM Time Base Sync */
+#define TIVA_PWM_ENABLE_OFFSET          (0x8)   /* PWM Output Enable */
+#define TIVA_PWM_INVERT_OFFSET          (0xc)   /* PWM Output Inversion */
+#define TIVA_PWM_FAULT_OFFSET           (0x10)  /* PWM Output Fault */
+#define TIVA_PWM_INTEN_OFFSET           (0x14)  /* PWM Interrupt Enable */
+#define TIVA_PWM_RIS_OFFSET             (0x18)  /* PWM Raw Interrupt Status */
+#define TIVA_PWM_ISC_OFFSET             (0x1c)  /* PWM Interrupt Status and Clear */
+#define TIVA_PWM_STATUS_OFFSET          (0x20)  /* PWM Status */
+#define TIVA_PWM_FAULTVAL_OFFSET        (0x24)  /* PWM Fault Condition Value */
+#define TIVA_PWM_ENUPD_OFFSET           (0x28)  /* PWM Enable Update */
+
+#define TIVA_PWMn_BASE                  (0x40)  /* PWMn Base */
+#define TIVA_PWMn_INTERVAL              (0x40)  /* PWMn Interval */
+
+#define TIVA_PWMn_CTL_OFFSET            (0x0)   /* PWMn Control */
+#define TIVA_PWMn_INTEN_OFFSET          (0x4)   /* PWMn Interrupt and Trigger Enable */
+#define TIVA_PWMn_RIS_OFFSET            (0x8)   /* PWMn Raw Interrupt Status */
+#define TIVA_PWMn_ISC_OFFSET            (0xc)   /* PWMn Interrupt Status and Clear */
+#define TIVA_PWMn_LOAD_OFFSET           (0x10)  /* PWMn Load */
+#define TIVA_PWMn_COUNT_OFFSET          (0x14)  /* PWMn Counter */
+#define TIVA_PWMn_CMPA_OFFSET           (0x18)  /* PWMn Compare A */
+#define TIVA_PWMn_CMPB_OFFSET           (0x1c)  /* PWMn Compare B */
+#define TIVA_PWMn_GENA_OFFSET           (0x20)  /* PWMn Generator A Control */
+#define TIVA_PWMn_GENB_OFFSET           (0x24)  /* PWMn Generator B Control */
+#define TIVA_PWMn_DBCTL_OFFSET          (0x28)  /* PWMn Dead-Band Control */
+#define TIVA_PWMn_DBRISE_OFFSET         (0x2c)  /* PWMn Dead-Band Rising-Edge-Delay */
+#define TIVA_PWMn_DBFALL_OFFSET         (0x30)  /* PWMn Dead-Band Falling-Edge-Delay */
+#define TIVA_PWMn_FLTSRC0_OFFSET        (0x34)  /* PWMn Fault Source 0 */
+#define TIVA_PWMn_FLTSRC1_OFFSET        (0x38)  /* PWMn Fault Source 1 */
+#define TIVA_PWMn_MINFLTPER_OFFSET      (0x3c)  /* PWMn Minimum Fault Period */
+
+#define TIVA_PWMn_FAULT_BASE            (0x800) /* PWMn Fault Base */
+#define TIVA_PWMn_FAULT_INTERVAL        (0x80)  /* PWMn Fault Interval */
+
+#define TIVA_PWMn_FAULT_SEN_OFFSET      (0x0)   /* PWMn Fault Pin Logic Sense */
+#define TIVA_PWMn_FAULT_STAT0_OFFSET    (0x4)   /* PWMn Fault Status 0 */
+#define TIVA_PWMn_FAULT_STAT1_OFFSET    (0x8)   /* PWMn Fault Status 1 */
+
+#define TIVA_PWM_PP                     (0xfc0) /* PWM Peripheral Properties */
+#define TIVA_PWM_CC                     (0xfc8) /* PWM Clock Configuration */
+
+#define TIVA_PWMn_GENx_ACTCMPBD         (10)    /* (Bit) Action for Comparator B Down */
+#define TIVA_PWMn_GENx_ACTCMPBU         (8)     /* (Bit) Action for Comparator B Up */
+#define TIVA_PWMn_GENx_ACTCMPAD         (6)     /* (Bit) Action for Comparator A Down */
+#define TIVA_PWMn_GENx_ACTCMPAU         (4)     /* (Bit) Action for Comparator A Up */
+#define TIVA_PWMn_GENx_ACTLOAD          (2)     /* (Bit) Action for Counter equals LOAD */
+#define TIVA_PWMn_GENx_ACTZERO          (0)     /* (Bit) Action for Counter equals ZERO */
+#define GENx_INVERT                     (0x1)   /* (Value) Invert */
+#define GENx_LOW                        (0x2)   /* (Value) Drive Low */
+#define GENx_HIGH                       (0x3)   /* (Value) Drive High */
+
+#define TIVA_PWM_CC_USEPWM              (8)     /* (Bit) Use PWM Clock Divisor */
+#define TIVA_PWM_CC_PWMDIV              (0)     /* (Bit) PWM Clock Divider */
+#define CC_USEPWM                       (0x1)   /* (Value) Use PWM divider as clock source */
+#define CC_PWMDIV_2                     (0x0)   /* (Value) Divided by 2 */
+#define CC_PWMDIV_4                     (0x1)   /* (Value) Divided by 4 */
+#define CC_PWMDIV_8                     (0x2)   /* (Value) Divided by 8 */
+#define CC_PWMDIV_16                    (0x3)   /* (Value) Divided by 16 */
+#define CC_PWMDIV_32                    (0x4)   /* (Value) Divided by 32 */
+#define CC_PWMDIV_64                    (0x5)   /* (Value) Divided by 64 */
+
+#define TIVA_PWMn_CTL_ENABLE            (0)     /* (Bit) PWM Block Enable */
+#define CTL_DISABLE                     (0)     /* (Value) Disable */
+#define CTL_ENABLE                      (1)     /* (Value) Enable */
+
+#define INTEN_GEN3                      (3)     /* (Bit) Enable PWM GEN3 Interrupt */
+#define INTEN_GEN2                      (2)     /* (Bit) Enable PWM GEN2 Interrupt */
+#define INTEN_GEN1                      (1)     /* (Bit) Enable PWM GEN1 Interrupt */
+#define INTEN_GEN0                      (0)     /* (Bit) Enable PWM GEN0 Interrupt */
+#define INT_DISABLE                     (0)     /* (Value) Disable */
+#define INT_ENABLE                      (1)     /* (Value) Enable */
+
+#define INTCMPBD                        (5)     /* (Bit) Interrupt for Counter=PWMnCMPB Down */
+#define INTCMPBU                        (4)     /* (Bit) Interrupt for Counter=PWMnCMPB Up */
+#define INTCMPAD                        (3)     /* (Bit) Interrupt for Counter=PWMnCMPA Down */
+#define INTCMPAU                        (2)     /* (Bit) Interrupt for Counter=PWMnCMPA Up */
+#define INTCNTLOAD                      (1)     /* (Bit) Interrupt for Counter=PWMnLOAD */
+#define INTCNTZERO                      (0)     /* (Bit) Interrupt for Counter=0 */
+#define INT_CLR                         (0)     /* (Value) Bit Clear */
+#define INT_SET                         (1)     /* (Value) Bit Set */
+
+#endif /* __ARCH_ARM_SRC_TIVA_CHIP_TIVA_PWM_H */
diff --git a/arch/arm/src/tiva/chip/tiva_qencoder.h b/arch/arm/src/tiva/chip/tiva_qencoder.h
new file mode 100644
index 0000000000000000000000000000000000000000..4352d2fa8dfaef9edd8ca382e60dff22f43a2e66
--- /dev/null
+++ b/arch/arm/src/tiva/chip/tiva_qencoder.h
@@ -0,0 +1,98 @@
+/************************************************************************************
+ * arch/arm/src/tiva/chip/tiva_qencoder.h
+ *
+ *   Copyright (C) 2016 Young Mu. All rights reserved.
+ *   Author: Young Mu 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_TIVA_CHIP_TIVA_QENCODER_H
+#define __ARCH_ARM_SRC_TIVA_CHIP_TIVA_QENCODER_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#define TIVA_QEI_CTL_OFFSET             (0x0)   /* QEI Control */
+#define TIVA_QEI_STAT_OFFSET            (0x4)   /* QEI Status */
+#define TIVA_QEI_POS_OFFSET             (0x8)   /* QEI Position */
+#define TIVA_QEI_MAXPOS_OFFSET          (0xc)   /* QEI Maximum Position */
+#define TIVA_QEI_LOAD_OFFSET            (0x10)  /* QEI Timer Load */
+#define TIVA_QEI_TIME_OFFSET            (0x14)  /* QEI Timer */
+#define TIVA_QEI_COUNT_OFFSET           (0x18)  /* QEI Velocity Counter */
+#define TIVA_QEI_SPEED_OFFSET           (0x1c)  /* QEI Velocity */
+#define TIVA_QEI_INTEN_OFFSET           (0x20)  /* QEI Interrupt Enable */
+#define TIVA_QEI_RIS_OFFSET             (0x24)  /* QEI Raw Interrupt Status */
+#define TIVA_QEI_ISC_OFFSET             (0x28)  /* QEI Interrupt Status and Clear */
+
+#define TIVA_QEI_CTL_FILTCNT            (16)    /* (Bit) Input Filter Prescale Count */
+#define TIVA_QEI_CTL_FILTEN             (13)    /* (Bit) Enable Input Filter */
+#define TIVA_QEI_CTL_STALLEN            (12)    /* (Bit) Stall QEI */
+#define TIVA_QEI_CTL_INVI               (11)    /* (Bit) Invert Index Pulse */
+#define TIVA_QEI_CTL_INVB               (10)    /* (Bit) Invert PhB */
+#define TIVA_QEI_CTL_INVA               (9)     /* (Bit) Invert PhA */
+#define TIVA_QEI_CTL_SIGMODE            (2)     /* (Bit) Signal Mode */
+#define TIVA_QEI_CTL_SWAP               (1)     /* (Bit) Swap Signals */
+
+#define TIVA_QEI_CTL_VELDIV             (6)     /* (Bit) Predivide Velocity */
+#define VELDIV_1                        (0x0)   /* (Value) Divided by 1 */
+#define VELDIV_2                        (0x1)   /* (Value) Divided by 2 */
+#define VELDIV_4                        (0x2)   /* (Value) Divided by 4 */
+#define VELDIV_8                        (0x3)   /* (Value) Divided by 8 */
+#define VELDIV_16                       (0x4)   /* (Value) Divided by 16 */
+#define VELDIV_32                       (0x5)   /* (Value) Divided by 32 */
+#define VELDIV_64                       (0x6)   /* (Value) Divided by 64 */
+#define VELDIV_128                      (0x7)   /* (Value) Divided by 128 */
+
+#define TIVA_QEI_CTL_VELEN              (5)     /* (Bit) Capture Velocity */
+#define VELEN_DISABLE                   (0)     /* (value) Disable Velocity Capture */
+#define VELEN_ENABLE                    (1)     /* (value) Enable Velocity Capture */
+
+#define TIVA_QEI_CTL_RESMODE            (4)     /* (Bit) Reset Mode */
+#define RESMODE_BY_MAXPOS               (0)     /* (Value) Reset by MAXPOS */
+#define RESMODE_BY_INDEX_PULSE          (1)     /* (Value) Reset by Index Pulse */
+
+#define TIVA_QEI_CTL_CAPMODE            (3)     /* (Bit) Capture Mode */
+#define CAPMODE_ONLY_PHA                (0)     /* (Value) Count PhA both edges */
+#define CAPMODE_PHA_AND_PHB             (1)     /* (Value) Count PhA and PhB both edges */
+
+#define TIVA_QEI_CTL_ENABLE             (0)     /* (Bit) Enable QEI */
+#define QEI_DISABLE                     (0)     /* (Value) Disable QEI */
+#define QEI_ENABLE                      (1)     /* (Value) Enable QEI */
+
+#define TIVA_QEI_STAT_DIRECTION         (1)     /* (Bit) Direction of Rotation */
+#define DIRECTION_FORWARD               (0)     /* (Value) Forward */
+#define DIRECTION_BACKWARD              (1)     /* (Value) Backward */
+
+#endif /* __ARCH_ARM_SRC_TIVA_CHIP_TIVA_QENCODER_H */
diff --git a/arch/arm/src/tiva/chip/tm4c129_syscontrol.h b/arch/arm/src/tiva/chip/tm4c129_syscontrol.h
index 5a4886ec6ccddbd8616bc30cda29bd6b2404ae19..59ab38f169fd661bc6d84d729672a454856a0150 100644
--- a/arch/arm/src/tiva/chip/tm4c129_syscontrol.h
+++ b/arch/arm/src/tiva/chip/tm4c129_syscontrol.h
@@ -254,7 +254,7 @@
 #define TIVA_SYSCON_UNIQUEID2_OFFSET   0x0f28 /* Unique ID 2 */
 #define TIVA_SYSCON_UNIQUEID3_OFFSET   0x0f2c /* Unique ID 3 */
 
-/*( CCM System Control Registers (CCM Control Offset) */
+/* CCM System Control Registers (CCM Control Offset) */
 
 #define TIVA_SYSCON_CCMCGREQ_OFFSET    0x0204 /* Cryptographic Modules Clock Gating Request */
 
@@ -1895,11 +1895,15 @@
 
 /* PWM Power Control */
 
-#define SYSCON_PCPWM_P0                (1 << 0)   /* Bit 0:  PWM Module 0 Power Control */
+#define SYSCON_PCPWM(n)                (1 << (n)) /* Bit n:  PWM module n Power Control */
+#  define SYSCON_PCPWM_P0              (1 << 0)   /* Bit 0:  PWM Module 0 Power Control */
+#  define SYSCON_PCPWM_P1              (1 << 1)   /* Bit 1:  PWM Module 1 Power Control */
 
 /* QE Interface Power Control */
 
-#define SYSCON_PCQEI_P0                (1 << 0)   /* Bit 0: QEI Module 0 Power Control */
+#define SYSCON_PCQEI(n)                (1 << (n)) /* Bit n:  QEI module n Power Control */
+#  define SYSCON_PCQEI_P0              (1 << 0)   /* Bit 0:  QEI Module 0 Power Control */
+#  define SYSCON_PCQEI_P1              (1 << 1)   /* Bit 1:  QEI Module 1 Power Control */
 
 /* EEPROM Power Control */
 
diff --git a/arch/arm/src/tiva/chip/tm4c_pinmap.h b/arch/arm/src/tiva/chip/tm4c_pinmap.h
index ec9bceca5de523dd94e37b394deabb33ad199fd9..5d32959f062e1862adae11a0467385e2a79ea0de 100644
--- a/arch/arm/src/tiva/chip/tm4c_pinmap.h
+++ b/arch/arm/src/tiva/chip/tm4c_pinmap.h
@@ -1186,34 +1186,34 @@
 #  define GPIO_HIB_RTCCLK_2    (GPIO_FUNC_PFOUTPUT | GPIO_ALT_5  | GPIO_PORTK | GPIO_PIN_7)
 #  define GPIO_HIB_RTCCLK_3    (GPIO_FUNC_PFOUTPUT | GPIO_ALT_7  | GPIO_PORTP | GPIO_PIN_3)
 
-#  define GPIO_I2C0_SCL        (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTB | GPIO_PIN_2 | GPIO_PADTYPE_ODWPU)
+#  define GPIO_I2C0_SCL        (GPIO_FUNC_PFOUTPUT | GPIO_ALT_2  | GPIO_PORTB | GPIO_PIN_2)
 #  define GPIO_I2C0_SDA        (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTB | GPIO_PIN_3 | GPIO_PADTYPE_ODWPU)
-#  define GPIO_I2C1_SCL        (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTG | GPIO_PIN_0 | GPIO_PADTYPE_ODWPU)
+#  define GPIO_I2C1_SCL        (GPIO_FUNC_PFOUTPUT | GPIO_ALT_2  | GPIO_PORTG | GPIO_PIN_0)
 #  define GPIO_I2C1_SDA        (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTG | GPIO_PIN_1 | GPIO_PADTYPE_ODWPU)
-#  define GPIO_I2C2_SCL_1      (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTL | GPIO_PIN_1 | GPIO_PADTYPE_ODWPU)
-#  define GPIO_I2C2_SCL_2      (GPIO_FUNC_PFODIO   | GPIO_ALT_3  | GPIO_PORTN | GPIO_PIN_5 | GPIO_PADTYPE_ODWPU)
-#  define GPIO_I2C2_SCL_3      (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTP | GPIO_PIN_5 | GPIO_PADTYPE_ODWPU)
+#  define GPIO_I2C2_SCL_1      (GPIO_FUNC_PFOUTPUT | GPIO_ALT_2  | GPIO_PORTL | GPIO_PIN_1)
+#  define GPIO_I2C2_SCL_2      (GPIO_FUNC_PFOUTPUT | GPIO_ALT_2  | GPIO_PORTP | GPIO_PIN_5)
+#  define GPIO_I2C2_SCL_3      (GPIO_FUNC_PFOUTPUT | GPIO_ALT_3  | GPIO_PORTN | GPIO_PIN_5)
 #  define GPIO_I2C2_SDA_1      (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTL | GPIO_PIN_0 | GPIO_PADTYPE_ODWPU)
 #  define GPIO_I2C2_SDA_2      (GPIO_FUNC_PFODIO   | GPIO_ALT_3  | GPIO_PORTN | GPIO_PIN_4 | GPIO_PADTYPE_ODWPU)
-#  define GPIO_I2C3_SCL        (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTK | GPIO_PIN_4 | GPIO_PADTYPE_ODWPU)
+#  define GPIO_I2C3_SCL        (GPIO_FUNC_PFOUTPUT | GPIO_ALT_2  | GPIO_PORTK | GPIO_PIN_4)
 #  define GPIO_I2C3_SDA        (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTK | GPIO_PIN_5 | GPIO_PADTYPE_ODWPU)
-#  define GPIO_I2C4_SCL        (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTK | GPIO_PIN_6 | GPIO_PADTYPE_ODWPU)
+#  define GPIO_I2C4_SCL        (GPIO_FUNC_PFOUTPUT | GPIO_ALT_2  | GPIO_PORTK | GPIO_PIN_6)
 #  define GPIO_I2C4_SDA        (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTK | GPIO_PIN_7 | GPIO_PADTYPE_ODWPU)
-#  define GPIO_I2C5_SCL_1      (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTB | GPIO_PIN_0 | GPIO_PADTYPE_ODWPU)
-#  define GPIO_I2C5_SCL_2      (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTB | GPIO_PIN_4 | GPIO_PADTYPE_ODWPU)
+#  define GPIO_I2C5_SCL_1      (GPIO_FUNC_PFOUTPUT | GPIO_ALT_2  | GPIO_PORTB | GPIO_PIN_0)
+#  define GPIO_I2C5_SCL_2      (GPIO_FUNC_PFOUTPUT | GPIO_ALT_2  | GPIO_PORTB | GPIO_PIN_4)
 #  define GPIO_I2C5_SDA_1      (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTB | GPIO_PIN_1 | GPIO_PADTYPE_ODWPU)
 #  define GPIO_I2C5_SDA_2      (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTB | GPIO_PIN_5 | GPIO_PADTYPE_ODWPU)
-#  define GPIO_I2C6_SCL        (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTA | GPIO_PIN_6 | GPIO_PADTYPE_ODWPU)
+#  define GPIO_I2C6_SCL        (GPIO_FUNC_PFOUTPUT | GPIO_ALT_2  | GPIO_PORTA | GPIO_PIN_6)
 #  define GPIO_I2C6_SDA        (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTA | GPIO_PIN_7 | GPIO_PADTYPE_ODWPU)
-#  define GPIO_I2C7_SCL_1      (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTA | GPIO_PIN_4 | GPIO_PADTYPE_ODWPU)
-#  define GPIO_I2C7_SCL_2      (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTD | GPIO_PIN_0 | GPIO_PADTYPE_ODWPU)
-#  define GPIO_I2C7_SDA_1      (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTA | GPIO_PIN_5 | GPIO_PADTYPE_ODWPU)
-#  define GPIO_I2C7_SDA_2      (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTD | GPIO_PIN_1 | GPIO_PADTYPE_ODWPU)
-#  define GPIO_I2C8_SCL_1      (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTA | GPIO_PIN_2 | GPIO_PADTYPE_ODWPU)
-#  define GPIO_I2C8_SCL_2      (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTD | GPIO_PIN_2 | GPIO_PADTYPE_ODWPU)
-#  define GPIO_I2C8_SDA_1      (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTA | GPIO_PIN_3 | GPIO_PADTYPE_ODWPU)
-#  define GPIO_I2C8_SDA_2      (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTD | GPIO_PIN_3 | GPIO_PADTYPE_ODWPU)
-#  define GPIO_I2C9_SCL        (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTA | GPIO_PIN_0 | GPIO_PADTYPE_ODWPU)
+#  define GPIO_I2C7_SCL_1      (GPIO_FUNC_PFOUTPUT | GPIO_ALT_2  | GPIO_PORTD | GPIO_PIN_0)
+#  define GPIO_I2C7_SCL_2      (GPIO_FUNC_PFOUTPUT | GPIO_ALT_2  | GPIO_PORTA | GPIO_PIN_4)
+#  define GPIO_I2C7_SDA_1      (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTD | GPIO_PIN_1 | GPIO_PADTYPE_ODWPU)
+#  define GPIO_I2C7_SDA_2      (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTA | GPIO_PIN_5 | GPIO_PADTYPE_ODWPU)
+#  define GPIO_I2C8_SCL_1      (GPIO_FUNC_PFOUTPUT | GPIO_ALT_2  | GPIO_PORTD | GPIO_PIN_2)
+#  define GPIO_I2C8_SCL_2      (GPIO_FUNC_PFOUTPUT | GPIO_ALT_2  | GPIO_PORTA | GPIO_PIN_2)
+#  define GPIO_I2C8_SDA_1      (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTD | GPIO_PIN_3 | GPIO_PADTYPE_ODWPU)
+#  define GPIO_I2C8_SDA_2      (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTA | GPIO_PIN_3 | GPIO_PADTYPE_ODWPU)
+#  define GPIO_I2C9_SCL        (GPIO_FUNC_PFOUTPUT | GPIO_ALT_2  | GPIO_PORTA | GPIO_PIN_0)
 #  define GPIO_I2C9_SDA        (GPIO_FUNC_PFODIO   | GPIO_ALT_2  | GPIO_PORTA | GPIO_PIN_1 | GPIO_PADTYPE_ODWPU)
 
 #  define GPIO_JTAG_SWCLK      (GPIO_FUNC_PFINPUT  | GPIO_ALT_1  | GPIO_PORTC | GPIO_PIN_0)
diff --git a/arch/arm/src/tiva/lm3s_ethernet.c b/arch/arm/src/tiva/lm3s_ethernet.c
index 0acaeb3c07b5c8a4cd44baa95b97601df7696ace..acfa6c7c2e40120ae831e71699f0a68ad93f346f 100644
--- a/arch/arm/src/tiva/lm3s_ethernet.c
+++ b/arch/arm/src/tiva/lm3s_ethernet.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/tiva/lm3s_ethernet.c
  *
- *   Copyright (C) 2009-2010, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009-2010, 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -52,6 +52,8 @@
 #include 
 #include 
 #include 
+#include 
+
 #include 
 #include 
 #include 
@@ -70,10 +72,24 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
-/* Configuration ************************************************************/
 
-#ifdef CONFIG_NET_MULTIBUFFER
-#  error CONFIG_NET_MULTIBUFFER should not be selected
+/* If processing is not done at the interrupt level, then work queue support
+ * is required.
+ */
+
+#if !defined(CONFIG_SCHED_WORKQUEUE)
+#  error Work queue support is required in this configuration (CONFIG_SCHED_WORKQUEUE)
+#else
+
+  /* Use the low priority work queue if possible */
+
+#  if defined(CONFIG_LM3S_ETHERNET_HPWORK)
+#    define ETHWORK HPWORK
+#  elif defined(CONFIG_LM3S_ETHERNET_LPWORK)
+#    define ETHWORK LPWORK
+#  else
+#    error Neither CONFIG_LM3S_ETHERNET_HPWORK nor CONFIG_LM3S_ETHERNET_LPWORK defined
+#  endif
 #endif
 
 /* Half duplex can be forced if CONFIG_TIVA_ETHHDUPLEX is defined. */
@@ -186,6 +202,8 @@ struct tiva_driver_s
   bool     ld_bifup;           /* true:ifup false:ifdown */
   WDOG_ID  ld_txpoll;          /* TX poll timer */
   WDOG_ID  ld_txtimeout;       /* TX timeout timer */
+  struct work_s ld_irqwork;    /* For deferring interrupt work to the work queue */
+  struct work_s ld_pollwork;   /* For deferring poll work to the work queue */
 
   /* This holds the information visible to the NuttX network */
 
@@ -196,6 +214,12 @@ struct tiva_driver_s
  * Private Data
  ****************************************************************************/
 
+/* A single packet buffer is used */
+
+static uint8_t g_pktbuf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
+
+/* Ethernet peripheral state */
+
 static struct tiva_driver_s g_lm3sdev[TIVA_NETHCONTROLLERS];
 
 /****************************************************************************
@@ -226,21 +250,29 @@ static int  tiva_txpoll(struct net_driver_s *dev);
 
 static void tiva_receive(struct tiva_driver_s *priv);
 static void tiva_txdone(struct tiva_driver_s *priv);
-static int  tiva_interrupt(int irq, FAR void *context);
+
+static void tiva_interrupt_work(void *arg);
+static int  tiva_interrupt(int irq, void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
-static void tiva_polltimer(int argc, uint32_t arg, ...);
-static void tiva_txtimeout(int argc, uint32_t arg, ...);
+static void tiva_txtimeout_work(void *arg);
+static void tiva_txtimeout_expiry(int argc, uint32_t arg, ...);
+
+static void tiva_poll_work(void *arg);
+static void tiva_poll_expiry(int argc, uint32_t arg, ...);
 
 /* NuttX callback functions */
 
 static int  tiva_ifup(struct net_driver_s *dev);
 static int  tiva_ifdown(struct net_driver_s *dev);
+
+static void tiva_txavail_work(void *arg);
 static int  tiva_txavail(struct net_driver_s *dev);
+
 #ifdef CONFIG_NET_IGMP
-static int  tiva_addmac(struct net_driver_s *dev, FAR const uint8_t *mac);
-static int  tiva_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac);
+static int  tiva_addmac(struct net_driver_s *dev, const uint8_t *mac);
+static int  tiva_rmmac(struct net_driver_s *dev, const uint8_t *mac);
 #endif
 
 /****************************************************************************
@@ -333,7 +365,7 @@ static void tiva_ethreset(struct tiva_driver_s *priv)
   regval  = getreg32(TIVA_SYSCON_RCGC2);
   regval |= (SYSCON_RCGC2_EMAC0 | SYSCON_RCGC2_EPHY0);
   putreg32(regval, TIVA_SYSCON_RCGC2);
-  nllvdbg("RCGC2: %08x\n", regval);
+  ninfo("RCGC2: %08x\n", regval);
 
   /* Put the Ethernet controller into the reset state */
 
@@ -349,7 +381,7 @@ static void tiva_ethreset(struct tiva_driver_s *priv)
 
   regval &= ~(SYSCON_SRCR2_EMAC0 | SYSCON_SRCR2_EPHY0);
   putreg32(regval, TIVA_SYSCON_SRCR2);
-  nllvdbg("SRCR2: %08x\n", regval);
+  ninfo("SRCR2: %08x\n", regval);
 
   /* Wait just a bit, again.  If we touch the ethernet too soon, we may busfault. */
 
@@ -495,7 +527,7 @@ static int tiva_transmit(struct tiva_driver_s *priv)
        */
 
       pktlen     = priv->ld_dev.d_len;
-      nllvdbg("Sending packet, pktlen: %d\n", pktlen);
+      ninfo("Sending packet, pktlen: %d\n", pktlen);
       DEBUGASSERT(pktlen > ETH_HDRLEN);
 
       dbuf       = priv->ld_dev.d_buf;
@@ -546,7 +578,8 @@ static int tiva_transmit(struct tiva_driver_s *priv)
 
       /* Setup the TX timeout watchdog (perhaps restarting the timer) */
 
-      (void)wd_start(priv->ld_txtimeout, TIVA_TXTIMEOUT, tiva_txtimeout, 1, (uint32_t)priv);
+      (void)wd_start(priv->ld_txtimeout, TIVA_TXTIMEOUT,
+                     tiva_txtimeout_expiry, 1, (uint32_t)priv);
       ret = OK;
     }
 
@@ -584,7 +617,7 @@ static int tiva_txpoll(struct net_driver_s *dev)
    * the field d_len is set to a value > 0.
    */
 
-  nllvdbg("Poll result: d_len=%d\n", priv->ld_dev.d_len);
+  ninfo("Poll result: d_len=%d\n", priv->ld_dev.d_len);
   if (priv->ld_dev.d_len > 0)
     {
       DEBUGASSERT((tiva_ethin(priv, TIVA_MAC_TR_OFFSET) & MAC_TR_NEWTX) == 0);
@@ -672,7 +705,7 @@ static void tiva_receive(struct tiva_driver_s *priv)
 
       regval = tiva_ethin(priv, TIVA_MAC_DATA_OFFSET);
       pktlen = (int)(regval & 0x0000ffff);
-      nllvdbg("Receiving packet, pktlen: %d\n", pktlen);
+      ninfo("Receiving packet, pktlen: %d\n", pktlen);
 
       /* Check if the pktlen is valid.  It should be large enough to hold
        * an Ethernet header and small enough to fit entirely in the I/O
@@ -686,7 +719,7 @@ static void tiva_receive(struct tiva_driver_s *priv)
 
           /* We will have to drop this packet */
 
-          nlldbg("Bad packet size dropped (%d)\n", pktlen);
+          nwarn("WARNING: Bad packet size dropped (%d)\n", pktlen);
           NETDEV_RXERRORS(&priv->ld_dev);
 
           /* The number of bytes and words left to read is pktlen - 4 (including,
@@ -770,7 +803,7 @@ static void tiva_receive(struct tiva_driver_s *priv)
 #ifdef CONFIG_NET_IPv4
       if (ETHBUF->type == HTONS(ETHTYPE_IP))
         {
-          nllvdbg("IPv4 frame\n");
+          ninfo("IPv4 frame\n");
           NETDEV_RXIPV4(&priv->ld_dev);
 
           /* Handle ARP on input then give the IPv4 packet to the network
@@ -811,7 +844,7 @@ static void tiva_receive(struct tiva_driver_s *priv)
 #ifdef CONFIG_NET_IPv6
       if (ETHBUF->type == HTONS(ETHTYPE_IP6))
         {
-          nllvdbg("Iv6 frame\n");
+          ninfo("Iv6 frame\n");
           NETDEV_RXIPV6(&priv->ld_dev);
 
           /* Give the IPv6 packet to the network layer */
@@ -850,7 +883,7 @@ static void tiva_receive(struct tiva_driver_s *priv)
 #ifdef CONFIG_NET_ARP
       if (ETHBUF->type == htons(ETHTYPE_ARP))
         {
-          nllvdbg("ARP packet received (%02x)\n", ETHBUF->type);
+          ninfo("ARP packet received (%02x)\n", ETHBUF->type);
           NETDEV_RXARP(&priv->ld_dev);
 
           arp_arpin(&priv->ld_dev);
@@ -867,7 +900,8 @@ static void tiva_receive(struct tiva_driver_s *priv)
       else
 #endif
         {
-          nlldbg("Unsupported packet type dropped (%02x)\n", htons(ETHBUF->type));
+          nwarn("WARNING: Unsupported packet type dropped (%02x)\n",
+                  htons(ETHBUF->type));
           NETDEV_RXDROPPED(&priv->ld_dev);
         }
     }
@@ -911,32 +945,30 @@ static void tiva_txdone(struct tiva_driver_s *priv)
 }
 
 /****************************************************************************
- * Function: tiva_interrupt
+ * Function: tiva_interrupt_work
  *
  * Description:
- *   Hardware interrupt handler
+ *   Perform interrupt related work from the worker thread
  *
  * Parameters:
- *   irq     - Number of the IRQ that generated the interrupt
- *   context - Interrupt register state save info (architecture-specific)
+ *   arg - The argument passed when work_queue() was called.
  *
  * Returned Value:
  *   OK on success
  *
  * Assumptions:
+ *   The network is locked.
  *
  ****************************************************************************/
 
-static int tiva_interrupt(int irq, FAR void *context)
+static void tiva_interrupt_work(void *arg)
 {
-  register struct tiva_driver_s *priv;
+  struct tiva_driver_s *priv = (struct tiva_driver_s *)arg;
   uint32_t ris;
 
-#if TIVA_NETHCONTROLLERS > 1
-# error "A mechanism to associate and interface with an IRQ is needed"
-#else
-  priv = &g_lm3sdev[0];
-#endif
+  /* Process pending Ethernet interrupts */
+
+  net_lock();
 
   /* Read the raw interrupt status register */
 
@@ -993,38 +1025,106 @@ static int tiva_interrupt(int irq, FAR void *context)
       tiva_txdone(priv);
     }
 
-  /* Enable Ethernet interrupts (perhaps excluding the TX done interrupt if
-   * there are no pending transmissions).
+  net_unlock();
+
+  /* Re-enable Ethernet interrupts */
+
+#if TIVA_NETHCONTROLLERS > 1
+  up_enable_irq(priv->irq);
+#else
+  up_enable_irq(TIVA_IRQ_ETHCON);
+#endif
+}
+
+/****************************************************************************
+ * Function: tiva_interrupt
+ *
+ * Description:
+ *   Hardware interrupt handler
+ *
+ * Parameters:
+ *   irq     - Number of the IRQ that generated the interrupt
+ *   context - Interrupt register state save info (architecture-specific)
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *
+ ****************************************************************************/
+
+static int tiva_interrupt(int irq, void *context, FAR void *arg)
+{
+  struct tiva_driver_s *priv;
+  uint32_t ris;
+
+#if TIVA_NETHCONTROLLERS > 1
+# error "A mechanism to associate and interface with an IRQ is needed"
+#else
+  priv = &g_lm3sdev[0];
+#endif
+
+  /* Disable further Ethernet interrupts.  Because Ethernet interrupts are
+   * also disabled if the TX timeout event occurs, there can be no race
+   * condition here.
    */
 
+#if TIVA_NETHCONTROLLERS > 1
+  up_disable_irq(priv->irq);
+#else
+  up_disable_irq(TIVA_IRQ_ETHCON);
+#endif
+
+  /* Read the raw interrupt status register (masking out any disabled
+   * interrupts).
+   */
+
+  ris  = tiva_ethin(priv, TIVA_MAC_RIS_OFFSET);
+  ris &= tiva_ethin(priv, TIVA_MAC_IM_OFFSET);
+
+  /* Is this an Tx interrupt (meaning that the Tx FIFO is empty)? */
+
+  if ((ris & MAC_RIS_TXEMP) != 0)
+    {
+      /* If a TX transfer just completed, then cancel the TX timeout so
+       * there will be do race condition between any subsequent timeout
+       * expiration and the deferred interrupt processing.
+       */
+
+       wd_cancel(priv->ld_txtimeout);
+    }
+
+  /* Schedule to perform the interrupt processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->ld_irqwork, tiva_interrupt_work, priv, 0);
   return OK;
 }
 
 /****************************************************************************
- * Function: tiva_txtimeout
+ * Function: tiva_txtimeout_work
  *
  * Description:
- *   Our TX watchdog timed out.  Called from the timer interrupt handler.
- *   The last TX never completed.  Reset the hardware and start again.
+ *   Perform TX timeout related work from the worker thread
  *
  * Parameters:
- *   argc - The number of available arguments
- *   arg  - The first argument
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
+ *   The network is locked.
  *
  ****************************************************************************/
 
-static void tiva_txtimeout(int argc, uint32_t arg, ...)
+static void tiva_txtimeout_work(void *arg)
 {
   struct tiva_driver_s *priv = (struct tiva_driver_s *)arg;
 
   /* Increment statistics */
 
-  nlldbg("Tx timeout\n");
+  net_lock();
+  nerr("ERROR: Tx timeout\n");
   NETDEV_TXTIMEOUTS(&priv->ld_dev);
 
   /* Then reset the hardware */
@@ -1036,13 +1136,15 @@ static void tiva_txtimeout(int argc, uint32_t arg, ...)
   /* Then poll the network for new XMIT data */
 
   (void)devif_poll(&priv->ld_dev, tiva_txpoll);
+  net_unlock();
 }
 
 /****************************************************************************
- * Function: tiva_polltimer
+ * Function: tiva_txtimeout_expiry
  *
  * Description:
- *   Periodic timer handler.  Called from the timer interrupt handler.
+ *   Our TX watchdog timed out.  Called from the timer interrupt handler.
+ *   The last TX never completed.  Reset the hardware and start again.
  *
  * Parameters:
  *   argc - The number of available arguments
@@ -1052,10 +1154,48 @@ static void tiva_txtimeout(int argc, uint32_t arg, ...)
  *   None
  *
  * Assumptions:
+ *   Global interrupts are disabled by the watchdog logic.
+ *
+ ****************************************************************************/
+
+static void tiva_txtimeout_expiry(int argc, wdparm_t arg, ...)
+{
+  struct tiva_driver_s *priv = (struct tiva_driver_s *)arg;
+
+  /* Disable further Ethernet interrupts.  This will prevent some race
+   * conditions with interrupt work.  There is still a potential race
+   * condition with interrupt work that is already queued and in progress.
+   */
+
+#if TIVA_NETHCONTROLLERS > 1
+  up_disable_irq(priv->irq);
+#else
+  up_disable_irq(TIVA_IRQ_ETHCON);
+#endif
+
+  /* Schedule to perform the TX timeout processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->ld_irqwork, tiva_txtimeout_work, priv, 0);
+}
+
+/****************************************************************************
+ * Function: tiva_poll_work
+ *
+ * Description:
+ *   Perform periodic polling from the worker thread
+ *
+ * Parameters:
+ *   arg - The argument passed when work_queue() as called.
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *   The network is locked.
  *
  ****************************************************************************/
 
-static void tiva_polltimer(int argc, uint32_t arg, ...)
+static void tiva_poll_work(void *arg)
 {
   struct tiva_driver_s *priv = (struct tiva_driver_s *)arg;
 
@@ -1067,16 +1207,49 @@ static void tiva_polltimer(int argc, uint32_t arg, ...)
    * inaccuracies.
    */
 
+  net_lock();
   if ((tiva_ethin(priv, TIVA_MAC_TR_OFFSET) & MAC_TR_NEWTX) == 0)
     {
-      /* If so, update TCP timing states and poll the network for new XMIT data */
+      /* If so, update TCP timing states and poll the network for new XMIT
+       * data.
+       */
 
       (void)devif_timer(&priv->ld_dev, tiva_txpoll);
 
       /* Setup the watchdog poll timer again */
 
-      (void)wd_start(priv->ld_txpoll, TIVA_WDDELAY, tiva_polltimer, 1, arg);
+      (void)wd_start(priv->ld_txpoll, TIVA_WDDELAY, tiva_poll_expiry,
+                     1, priv);
     }
+
+  net_unlock();
+}
+
+/****************************************************************************
+ * Function: tiva_poll_expiry
+ *
+ * Description:
+ *   Periodic timer handler.  Called from the timer interrupt handler.
+ *
+ * Parameters:
+ *   argc - The number of available arguments
+ *   arg  - The first argument
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Global interrupts are disabled by the watchdog logic.
+ *
+ ****************************************************************************/
+
+static void tiva_poll_expiry(int argc, wdparm_t arg, ...)
+{
+  struct tiva_driver_s *priv = (struct tiva_driver_s *)arg;
+
+  /* Schedule to perform the interrupt processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->ld_pollwork, tiva_poll_work, priv, 0);
 }
 
 /****************************************************************************
@@ -1104,9 +1277,9 @@ static int tiva_ifup(struct net_driver_s *dev)
   uint32_t div;
   uint16_t phyreg;
 
-  nlldbg("Bringing up: %d.%d.%d.%d\n",
-       dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-       (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 
   /* Enable and reset the Ethernet controller */
 
@@ -1125,7 +1298,7 @@ static int tiva_ifup(struct net_driver_s *dev)
 
   div = SYSCLK_FREQUENCY / 2 / TIVA_MAX_MDCCLK;
   tiva_ethout(priv, TIVA_MAC_MDV_OFFSET, div);
-  nllvdbg("MDV:   %08x\n", div);
+  ninfo("MDV:   %08x\n", div);
 
   /* Then configure the Ethernet Controller for normal operation
    *
@@ -1137,7 +1310,7 @@ static int tiva_ifup(struct net_driver_s *dev)
   regval &= ~TIVA_TCTCL_CLRBITS;
   regval |= TIVA_TCTCL_SETBITS;
   tiva_ethout(priv, TIVA_MAC_TCTL_OFFSET, regval);
-  nllvdbg("TCTL:  %08x\n", regval);
+  ninfo("TCTL:  %08x\n", regval);
 
   /* Setup the receive control register (Disable multicast frames, disable
    * promiscuous mode, disable bad CRC rejection).
@@ -1147,7 +1320,7 @@ static int tiva_ifup(struct net_driver_s *dev)
   regval &= ~TIVA_RCTCL_CLRBITS;
   regval |= TIVA_RCTCL_SETBITS;
   tiva_ethout(priv, TIVA_MAC_RCTL_OFFSET, regval);
-  nllvdbg("RCTL:  %08x\n", regval);
+  ninfo("RCTL:  %08x\n", regval);
 
   /* Setup the time stamp configuration register */
 
@@ -1159,7 +1332,7 @@ static int tiva_ifup(struct net_driver_s *dev)
   regval &= ~(MAC_TS_EN);
 #endif
   tiva_ethout(priv, TIVA_MAC_TS_OFFSET, regval);
-  nllvdbg("TS:    %08x\n", regval);
+  ninfo("TS:    %08x\n", regval);
 #endif
 
   /* Wait for the link to come up.  This following is not very conservative
@@ -1168,13 +1341,13 @@ static int tiva_ifup(struct net_driver_s *dev)
    * set
    */
 
-  nlldbg("Waiting for link\n");
+  ninfo("Waiting for link\n");
   do
     {
       phyreg = tiva_phyread(priv, MII_MSR);
     }
   while ((phyreg & MII_MSR_LINKSTATUS) == 0);
-  nlldbg("Link established\n");
+  ninfo("Link established\n");
 
   /* Reset the receive FIFO */
 
@@ -1228,7 +1401,8 @@ static int tiva_ifup(struct net_driver_s *dev)
 
   /* Set and activate a timer process */
 
-  (void)wd_start(priv->ld_txpoll, TIVA_WDDELAY, tiva_polltimer, 1, (uint32_t)priv);
+  (void)wd_start(priv->ld_txpoll, TIVA_WDDELAY, tiva_poll_expiry,
+                 1, (uint32_t)priv);
 
   priv->ld_bifup = true;
   leave_critical_section(flags);
@@ -1258,9 +1432,9 @@ static int tiva_ifdown(struct net_driver_s *dev)
   irqstate_t flags;
   uint32_t regval;
 
-  nlldbg("Taking down: %d.%d.%d.%d\n",
-       dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-       (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Taking down: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 
   /* Cancel the TX poll timer and TX timeout timers */
 
@@ -1319,28 +1493,25 @@ static int tiva_ifdown(struct net_driver_s *dev)
 }
 
 /****************************************************************************
- * Function: tiva_txavail
+ * Function: tiva_txavail_work
  *
  * Description:
- *   Driver callback invoked when new TX data is available.  This is a
- *   stimulus perform an out-of-cycle poll and, thereby, reduce the TX
- *   latency.
+ *   Perform an out-of-cycle poll on the worker thread.
  *
  * Parameters:
- *   dev  - Reference to the NuttX driver state structure
+ *   arg - Reference to the NuttX driver state structure (cast to void*)
  *
  * Returned Value:
  *   None
  *
  * Assumptions:
- *   Called in normal user mode
+ *   Called on the higher priority worker thread.
  *
  ****************************************************************************/
 
-static int tiva_txavail(struct net_driver_s *dev)
+static void tiva_txavail_work(void *arg)
 {
-  struct tiva_driver_s *priv = (struct tiva_driver_s *)dev->d_private;
-  irqstate_t flags;
+  struct tiva_driver_s *priv = (struct tiva_driver_s *)arg;
 
   /* Ignore the notification if the interface is not yet up or if the Tx FIFO
    * hardware is not available at this time.  The NEWTX bit initiates an
@@ -1350,7 +1521,7 @@ static int tiva_txavail(struct net_driver_s *dev)
    * will occur at that time.
    */
 
-  flags = enter_critical_section();
+  net_lock();
   if (priv->ld_bifup && (tiva_ethin(priv, TIVA_MAC_TR_OFFSET) & MAC_TR_NEWTX) == 0)
     {
       /* If the interface is up and we can use the Tx FIFO, then poll the network
@@ -1360,7 +1531,44 @@ static int tiva_txavail(struct net_driver_s *dev)
       (void)devif_poll(&priv->ld_dev, tiva_txpoll);
     }
 
-  leave_critical_section(flags);
+  net_unlock();
+}
+
+/****************************************************************************
+ * Function: tiva_txavail
+ *
+ * Description:
+ *   Driver callback invoked when new TX data is available.  This is a
+ *   stimulus perform an out-of-cycle poll and, thereby, reduce the TX
+ *   latency.
+ *
+ * Parameters:
+ *   dev - Reference to the NuttX driver state structure
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Called in normal user mode
+ *
+ ****************************************************************************/
+
+static int tiva_txavail(struct net_driver_s *dev)
+{
+  struct tiva_driver_s *priv = (struct tiva_driver_s *)dev->d_private;
+
+  /* Is our single work structure available?  It may not be if there are
+   * pending interrupt actions and we will have to ignore the Tx
+   * availability action.
+   */
+
+  if (work_available(&priv->ld_pollwork))
+    {
+      /* Schedule to serialize the poll on the worker thread. */
+
+      work_queue(ETHWORK, &priv->ld_pollwork, tiva_txavail_work, priv, 0);
+    }
+
   return OK;
 }
 
@@ -1383,9 +1591,9 @@ static int tiva_txavail(struct net_driver_s *dev)
  ****************************************************************************/
 
 #ifdef CONFIG_NET_IGMP
-static int tiva_addmac(struct net_driver_s *dev, FAR const uint8_t *mac)
+static int tiva_addmac(struct net_driver_s *dev, const uint8_t *mac)
 {
-  FAR struct tiva_driver_s *priv = (FAR struct tiva_driver_s *)dev->d_private;
+  struct tiva_driver_s *priv = (struct tiva_driver_s *)dev->d_private;
 
   /* Add the MAC address to the hardware multicast routing table */
 
@@ -1413,9 +1621,9 @@ static int tiva_addmac(struct net_driver_s *dev, FAR const uint8_t *mac)
  ****************************************************************************/
 
 #ifdef CONFIG_NET_IGMP
-static int tiva_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac)
+static int tiva_rmmac(struct net_driver_s *dev, const uint8_t *mac)
 {
-  FAR struct tiva_driver_s *priv = (FAR struct tiva_driver_s *)dev->d_private;
+  struct tiva_driver_s *priv = (struct tiva_driver_s *)dev->d_private;
 
   /* Add the MAC address to the hardware multicast routing table */
 
@@ -1455,7 +1663,7 @@ static inline int tiva_ethinitialize(int intf)
 
   /* Check if the Ethernet module is present */
 
-  ndbg("Setting up eth%d\n", intf);
+  ninfo("Setting up eth%d\n", intf);
 
 #if TIVA_NETHCONTROLLERS > 1
 # error "This debug check only works with one interface"
@@ -1468,6 +1676,7 @@ static inline int tiva_ethinitialize(int intf)
   /* Initialize the driver structure */
 
   memset(priv, 0, sizeof(struct tiva_driver_s));
+  priv->ld_dev.d_buf     = g_pktbuf;      /* Single packet buffer */
   priv->ld_dev.d_ifup    = tiva_ifup;     /* I/F down callback */
   priv->ld_dev.d_ifdown  = tiva_ifdown;   /* I/F up (new IP address) callback */
   priv->ld_dev.d_txavail = tiva_txavail;  /* New TX data callback */
@@ -1507,9 +1716,9 @@ static inline int tiva_ethinitialize(int intf)
   /* Attach the IRQ to the driver */
 
 #if TIVA_NETHCONTROLLERS > 1
-  ret = irq_attach(priv->irq, tiva_interrupt);
+  ret = irq_attach(priv->irq, tiva_interrupt, NULL);
 #else
-  ret = irq_attach(TIVA_IRQ_ETHCON, tiva_interrupt);
+  ret = irq_attach(TIVA_IRQ_ETHCON, tiva_interrupt, NULL);
 #endif
   if (ret != 0)
     {
diff --git a/arch/arm/src/tiva/tiva_adc.h b/arch/arm/src/tiva/tiva_adc.h
index 693252ad35d219a3470530cd743652c107fe02c2..7f6edd4f9d8b741146a22623f2c3f6fe06c3d9d3 100644
--- a/arch/arm/src/tiva/tiva_adc.h
+++ b/arch/arm/src/tiva/tiva_adc.h
@@ -52,7 +52,7 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
 #  undef CONFIG_TIVA_ADC_REGDEBUG
 #endif
 
diff --git a/arch/arm/src/tiva/tiva_adclib.c b/arch/arm/src/tiva/tiva_adclib.c
index 64fb93552d25b409a0af644faef10427edcd6489..dc2768fc16300c4b831e15e2bff9a01cef62afc1 100644
--- a/arch/arm/src/tiva/tiva_adclib.c
+++ b/arch/arm/src/tiva/tiva_adclib.c
@@ -209,7 +209,7 @@ void tiva_adc_one_time_init(uint32_t clock, uint8_t sample_rate)
   static bool one_time_init = false;
 
 #ifdef CONFIG_DEBUG_ANALOG
-  avdbg("setting clock=%d MHz sample rate=%d\n",
+  ainfo("setting clock=%d MHz sample rate=%d\n",
          clock, sample_rate);
 #endif
 
@@ -219,7 +219,7 @@ void tiva_adc_one_time_init(uint32_t clock, uint8_t sample_rate)
 
   if (one_time_init == false)
     {
-      avdbg("performing ADC one-time initialization...\n");
+      ainfo("performing ADC one-time initialization...\n");
       /* set clock */
 
       tiva_adc_clock(clock);
@@ -238,7 +238,7 @@ void tiva_adc_one_time_init(uint32_t clock, uint8_t sample_rate)
 #ifdef CONFIG_DEBUG_ANALOG
   else
     {
-      avdbg("one time initialization previously completed\n");
+      ainfo("one time initialization previously completed\n");
     }
 #endif
 }
@@ -257,7 +257,7 @@ void tiva_adc_configure(struct tiva_adc_cfg_s *cfg)
   uint8_t s;
   uint8_t c;
 
-  avdbg("configure ADC%d...\n", cfg->adc);
+  ainfo("configure ADC%d...\n", cfg->adc);
 
   /* Configure each SSE */
 
@@ -270,7 +270,7 @@ void tiva_adc_configure(struct tiva_adc_cfg_s *cfg)
 #ifdef CONFIG_DEBUG_ANALOG
       else
         {
-          avdbg("ADC%d SSE%d has no configuration\n", cfg->adc, s);
+          ainfo("ADC%d SSE%d has no configuration\n", cfg->adc, s);
         }
 #endif
     }
@@ -298,9 +298,9 @@ void tiva_adc_configure(struct tiva_adc_cfg_s *cfg)
 void tiva_adc_sse_cfg(uint8_t adc, uint8_t sse,
                       struct tiva_adc_sse_cfg_s *ssecfg)
 {
-  avdbg("configure ADC%d SSE%d...\n", adc, sse);
+  ainfo("configure ADC%d SSE%d...\n", adc, sse);
 #ifdef CONFIG_DEBUG_ANALOG
-  avdbg("priority=%d trigger=%d...\n", ssecfg->priority, ssecfg->trigger);
+  ainfo("priority=%d trigger=%d...\n", ssecfg->priority, ssecfg->trigger);
 #endif
 
   uint8_t priority = ssecfg->priority;
@@ -327,7 +327,7 @@ void tiva_adc_sse_cfg(uint8_t adc, uint8_t sse,
 void tiva_adc_step_cfg(struct tiva_adc_step_cfg_s *stepcfg)
 {
 #ifdef CONFIG_DEBUG_ANALOG
-  avdbg("  shold=0x%02x flags=0x%02x ain=%d...\n",
+  ainfo("  shold=0x%02x flags=0x%02x ain=%d...\n",
         stepcfg->shold, stepcfg->flags, stepcfg->ain);
 #endif
 
@@ -341,7 +341,7 @@ void tiva_adc_step_cfg(struct tiva_adc_step_cfg_s *stepcfg)
   uint8_t  ain   = stepcfg->ain;
   uint32_t gpio  = ain2gpio[stepcfg->ain];
 
-  avdbg("configure ADC%d SSE%d STEP%d...\n", adc, sse, step);
+  ainfo("configure ADC%d SSE%d STEP%d...\n", adc, sse, step);
 
   /* Configure the AIN GPIO for analog input if not flagged to be muxed to
    * the internal temperature sensor
@@ -410,14 +410,14 @@ void tiva_adc_irq_attach(uint8_t adc, uint8_t sse, xcpt_t isr)
   int irq = sse2irq[SSE_IDX(adc, sse)];
 
 #ifdef CONFIG_DEBUG_ANALOG
-  avdbg("assigning ISR=0x%p to ADC%d SSE%d IRQ=0x%02x...\n",
+  ainfo("assigning ISR=0x%p to ADC%d SSE%d IRQ=0x%02x...\n",
         isr, adc, sse, irq);
 #endif
 
-  ret = irq_attach(irq, isr);
+  ret = irq_attach(irq, isr, NULL);
   if (ret < 0)
     {
-      adbg("ERROR: Failed to attach IRQ %d: %d\n", irq, ret);
+      aerr("ERROR: Failed to attach IRQ %d: %d\n", irq, ret);
       return;
     }
 
@@ -446,7 +446,7 @@ void tiva_adc_irq_detach(uint8_t adc, uint8_t sse)
   ret = irq_detach(irq);
   if (ret < 0)
     {
-      adbg("ERROR: Failed to detach IRQ %d: %d\n", irq, ret);
+      aerr("ERROR: Failed to detach IRQ %d: %d\n", irq, ret);
       return;
     }
 }
@@ -682,7 +682,7 @@ uint32_t tiva_adc_int_status(uint8_t adc)
 
 uint8_t tiva_adc_sse_enable(uint8_t adc, uint8_t sse, bool state)
 {
-  avdbg("ADC%d SSE%d=%01d\n", adc, sse, state);
+  ainfo("ADC%d SSE%d=%01d\n", adc, sse, state);
 
   uintptr_t actssreg = TIVA_ADC_ACTSS(adc);
   if (state == true)
@@ -867,7 +867,7 @@ uint8_t tiva_adc_sse_data(uint8_t adc, uint8_t sse, int32_t *buf)
       ssfstatreg = getreg32(TIVA_ADC_BASE(adc) + TIVA_ADC_SSFSTAT(sse));
     }
 
-  avdbg("fifo=%d\n", fifo_count);
+  ainfo("fifo=%d\n", fifo_count);
 
   return fifo_count;
 }
@@ -1086,20 +1086,20 @@ void tiva_adc_dump_reg_cfg(uint8_t adc, uint8_t sse)
 
   /* Dump register contents */
 
-  avdbg("CC     [0x%08x]=0x%08x\n", ccreg, cc);
-  avdbg("PC     [0x%08x]=0x%08x\n", pcreg, pc);
-  avdbg("ACTSS  [0x%08x]=0x%08x\n", actssreg, actss);
-  avdbg("SSPRI  [0x%08x]=0x%08x\n", ssprireg, sspri);
-  avdbg("EMUX   [0x%08x]=0x%08x\n", emuxreg, emux);
-  avdbg("SSMUX  [0x%08x]=0x%08x\n", ssmuxreg, ssmux);
+  ainfo("CC     [0x%08x]=0x%08x\n", ccreg, cc);
+  ainfo("PC     [0x%08x]=0x%08x\n", pcreg, pc);
+  ainfo("ACTSS  [0x%08x]=0x%08x\n", actssreg, actss);
+  ainfo("SSPRI  [0x%08x]=0x%08x\n", ssprireg, sspri);
+  ainfo("EMUX   [0x%08x]=0x%08x\n", emuxreg, emux);
+  ainfo("SSMUX  [0x%08x]=0x%08x\n", ssmuxreg, ssmux);
 #ifdef CONFIG_ARCH_CHIP_TM4C129
-  avdbg("SSEMUX [0x%08x]=0x%08x\n", ssemuxreg, ssemux);
+  ainfo("SSEMUX [0x%08x]=0x%08x\n", ssemuxreg, ssemux);
 #endif
-  avdbg("SSOP   [0x%08x]=0x%08x\n", ssopreg, ssop);
+  ainfo("SSOP   [0x%08x]=0x%08x\n", ssopreg, ssop);
 #ifdef CONFIG_EXPERIMENTAL
-  avdbg("SSTSH  [0x%08x]=0x%08x\n", sstshreg, sstsh);
+  ainfo("SSTSH  [0x%08x]=0x%08x\n", sstshreg, sstsh);
 #endif
-  avdbg("SSCTL  [0x%08x]=0x%08x\n", ssctlreg, ssctl);
+  ainfo("SSCTL  [0x%08x]=0x%08x\n", ssctlreg, ssctl);
 
 }
 #endif /* CONFIG_DEBUG_ANALOG */
diff --git a/arch/arm/src/tiva/tiva_adclow.c b/arch/arm/src/tiva/tiva_adclow.c
index 7a0b5509ce9b22f90f4b8704c3d9107428e3fd58..46943a07baf91a9916c5a91b65c69aa8be153b58 100644
--- a/arch/arm/src/tiva/tiva_adclow.c
+++ b/arch/arm/src/tiva/tiva_adclow.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/tiva/tiva_adclow.c
  *
- *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
  *   Copyright (C) 2015 TRD2 Inc. All rights reserved.
  *   Author: Calvin Maguranis 
  *           Gregory Nutt 
@@ -58,12 +58,9 @@
  * Included Files
  ****************************************************************************/
 
-#include 
-#include 
-#include 
+#include 
 
 #include 
-
 #include 
 #include 
 #include 
@@ -72,6 +69,11 @@
 #include 
 #include 
 
+#include 
+#include 
+#include 
+#include 
+
 #include 
 
 #include "up_arch.h"
@@ -327,7 +329,7 @@ static int tiva_adc1_sse3_interrupt(int irq, void *context)
 
 static void tiva_adc_irqinitialize(struct tiva_adc_cfg_s *cfg)
 {
-  avdbg("initialize irqs for ADC%d...\n", cfg->adc);
+  ainfo("initialize irqs for ADC%d...\n", cfg->adc);
 
 #ifdef CONFIG_TIVA_ADC0
   if (cfg->adc == 0)
@@ -411,7 +413,7 @@ static int tiva_adc_bind(FAR struct adc_dev_s *dev,
 
 static void tiva_adc_reset(struct adc_dev_s *dev)
 {
-  avdbg("Resetting...\n");
+  ainfo("Resetting...\n");
 
   struct tiva_adc_s *priv = (struct tiva_adc_s *)dev->ad_priv;
   struct tiva_adc_sse_s *sse;
@@ -443,7 +445,7 @@ static void tiva_adc_reset(struct adc_dev_s *dev)
 
 static int tiva_adc_setup(struct adc_dev_s *dev)
 {
-  avdbg("Setup\n");
+  ainfo("Setup\n");
 
   struct tiva_adc_s *priv = (struct tiva_adc_s *)dev->ad_priv;
   struct tiva_adc_sse_s *sse;
@@ -477,7 +479,7 @@ static int tiva_adc_setup(struct adc_dev_s *dev)
 static void tiva_adc_shutdown(struct adc_dev_s *dev)
 {
   struct tiva_adc_s *priv = (struct tiva_adc_s *)dev->ad_priv;
-  avdbg("Shutdown\n");
+  ainfo("Shutdown\n");
 
   DEBUGASSERT(priv->ena);
 
@@ -512,7 +514,7 @@ static void tiva_adc_shutdown(struct adc_dev_s *dev)
 
 static void tiva_adc_rxint(struct adc_dev_s *dev, bool enable)
 {
-  avdbg("RXINT=%d\n", enable);
+  ainfo("RXINT=%d\n", enable);
 
   struct tiva_adc_s *priv = (struct tiva_adc_s *)dev->ad_priv;
   struct tiva_adc_sse_s *sse;
@@ -552,7 +554,7 @@ static int tiva_adc_ioctl(struct adc_dev_s *dev, int cmd, unsigned long arg)
 {
   int ret = OK;
 
-  avdbg("cmd=%d arg=%ld\n", cmd, arg);
+  ainfo("cmd=%d arg=%ld\n", cmd, arg);
 
   switch (cmd)
     {
@@ -686,7 +688,7 @@ static void tiva_adc_read(void *arg)
        * and should cause a full system stop.
        */
 
-      alldbg("PANIC!!! Invalid ADC device number given %d\n", sse->adc);
+      aerr("ERROR: Invalid ADC device number given %d\n", sse->adc);
       PANIC();
       return;
     }
@@ -704,7 +706,7 @@ static void tiva_adc_read(void *arg)
           priv->cb->au_receive(dev,
                                tiva_adc_get_ain(sse->adc, sse->num, i),
                                buf[i]);
-          avdbg("AIN%d = 0x%04x\n",
+          ainfo("AIN%d = 0x%04x\n",
                 tiva_adc_get_ain(sse->adc, sse->num, i), buf[i]);
         }
     }
@@ -753,7 +755,7 @@ static void tiva_adc_interrupt(struct tiva_adc_sse_s *sse)
   ret = work_queue(HPWORK, &sse->work, tiva_adc_read, sse, 0);
   if (ret != 0)
     {
-      adbg("ERROR: Failed to queue work: %d ADC.SSE: %d.%d\n",
+      aerr("ERROR: Failed to queue work: %d ADC.SSE: %d.%d\n",
            ret, sse->adc, sse->num);
     }
 }
@@ -832,9 +834,9 @@ static struct tiva_adc_s *tiva_adc_struct_init(struct tiva_adc_cfg_s *cfg)
     }
 
 tiva_adc_struct_init_error:
-  avdbg("Invalid ADC device number: expected=%d actual=%d\n",
+  ainfo("Invalid ADC device number: expected=%d actual=%d\n",
         0, cfg->adc);
-  avdbg("ADC%d (CONFIG_TIVA_ADC%d) must be enabled in Kconfig first!",
+  ainfo("ADC%d (CONFIG_TIVA_ADC%d) must be enabled in Kconfig first!",
         cfg->adc, cfg->adc);
   return NULL;
 
@@ -872,15 +874,15 @@ int tiva_adc_initialize(const char *devpath, struct tiva_adc_cfg_s *cfg,
   struct tiva_adc_s *adc;
   int ret = 0;
 
-  avdbg("initializing...\n");
+  ainfo("initializing...\n");
 
   /* Initialize the private ADC device data structure */
 
   adc = tiva_adc_struct_init(cfg);
   if (adc == NULL)
     {
-      adbg("Invalid ADC device number: expected=%d actual=%d\n",
-            0, cfg->adc);
+      aerr("ERROR: Invalid ADC device number: expected=%d actual=%d\n",
+           0, cfg->adc);
       return -ENODEV;
     }
 
@@ -888,8 +890,8 @@ int tiva_adc_initialize(const char *devpath, struct tiva_adc_cfg_s *cfg,
 
   if (tiva_adc_enable(adc->devno, true) < 0)
     {
-      adbg("ERROR: failure to power ADC peripheral (devno=%d)\n",
-            cfg->adc);
+      aerr("ERROR: failure to power ADC peripheral (devno=%d)\n",
+           cfg->adc);
       return ret;
     }
 
@@ -912,21 +914,21 @@ int tiva_adc_initialize(const char *devpath, struct tiva_adc_cfg_s *cfg,
 
   if (adc->dev == NULL)
     {
-      adbg("ERROR: Failed to get interface %s\n", devpath);
+      aerr("ERROR: Failed to get interface %s\n", devpath);
       return -ENODEV;
     }
 
-  avdbg("adc_dev_s=0x%08x\n", adc->dev);
+  ainfo("adc_dev_s=0x%08x\n", adc->dev);
 
   /* Register the ADC driver */
 
-  avdbg("Register the ADC driver at %s\n", devpath);
+  ainfo("Register the ADC driver at %s\n", devpath);
 
   ret = adc_register(devpath, adc->dev);
   if (ret < 0)
     {
-      adbg("ERROR: Failed to register %s to character driver: %d\n",
-            devpath, ret);
+      aerr("ERROR: Failed to register %s to character driver: %d\n",
+           devpath, ret);
       return ret;
     }
 
@@ -943,7 +945,7 @@ int tiva_adc_initialize(const char *devpath, struct tiva_adc_cfg_s *cfg,
 
 void tiva_adc_lock(FAR struct tiva_adc_s *priv, int sse)
 {
-  avdbg("Locking...\n");
+  ainfo("Locking...\n");
 
   struct tiva_adc_sse_s *s = g_sses[SSE_IDX(priv->devno, sse)];
   int ret;
@@ -964,7 +966,7 @@ void tiva_adc_lock(FAR struct tiva_adc_s *priv, int sse)
 #ifdef CONFIG_DEBUG_ANALOG
       if (loop_count % 1000)
         {
-          avdbg("loop=%d\n");
+          ainfo("loop=%d\n");
         }
       ++loop_count;
 #endif
@@ -982,7 +984,7 @@ void tiva_adc_lock(FAR struct tiva_adc_s *priv, int sse)
 
 void tiva_adc_unlock(FAR struct tiva_adc_s *priv, int sse)
 {
-  avdbg("Unlocking\n");
+  ainfo("Unlocking\n");
   struct tiva_adc_sse_s *s = g_sses[SSE_IDX(priv->devno, sse)];
   sem_post(&s->exclsem);
 }
@@ -1002,33 +1004,33 @@ void tiva_adc_unlock(FAR struct tiva_adc_s *priv, int sse)
 static void tiva_adc_runtimeobj_ptrs(void)
 {
 #  ifdef CONFIG_TIVA_ADC0
-  avdbg("ADC0 [struct]       [global value]   [array value]\n");
-  avdbg("     adc_dev_s      dev0=0x%08x   g_devs[0]=0x%08x\n",
+  ainfo("ADC0 [struct]       [global value]   [array value]\n");
+  ainfo("     adc_dev_s      dev0=0x%08x   g_devs[0]=0x%08x\n",
         &dev0, g_devs[0]);
-  avdbg("     tiva_adc_s     adc0=0x%08x   g_adcs[0]=0x%08x\n",
+  ainfo("     tiva_adc_s     adc0=0x%08x   g_adcs[0]=0x%08x\n",
         &adc0, g_adcs[0]);
-  avdbg("     tiva_adc_sse_s sse0=0x%08x   g_sses[0,0]=0x%08x\n",
+  ainfo("     tiva_adc_sse_s sse0=0x%08x   g_sses[0,0]=0x%08x\n",
         &sse00, g_sses[SSE_IDX(0, 0)]);
-  avdbg("     tiva_adc_sse_s sse1=0x%08x   g_sses[0,1]=0x%08x\n",
+  ainfo("     tiva_adc_sse_s sse1=0x%08x   g_sses[0,1]=0x%08x\n",
         &sse01, g_sses[SSE_IDX(0, 1)]);
-  avdbg("     tiva_adc_sse_s sse2=0x%08x   g_sses[0,2]=0x%08x\n",
+  ainfo("     tiva_adc_sse_s sse2=0x%08x   g_sses[0,2]=0x%08x\n",
         &sse02, g_sses[SSE_IDX(0, 2)]);
-  avdbg("     tiva_adc_sse_s sse3=0x%08x   g_sses[0,3]=0x%08x\n",
+  ainfo("     tiva_adc_sse_s sse3=0x%08x   g_sses[0,3]=0x%08x\n",
         &sse03, g_sses[SSE_IDX(0, 3)]);
 #  endif
 #  ifdef CONFIG_TIVA_ADC1
-  avdbg("ADC1 [struct]       [global value]   [array value]\n");
-  avdbg("     adc_dev_s      dev1=0x%08x   g_devs[1]=0x%08x\n",
+  ainfo("ADC1 [struct]       [global value]   [array value]\n");
+  ainfo("     adc_dev_s      dev1=0x%08x   g_devs[1]=0x%08x\n",
         &dev1, g_devs[1]);
-  avdbg("     tiva_adc_s     adc1=0x%08x   g_adcs[1]=0x%08x\n",
+  ainfo("     tiva_adc_s     adc1=0x%08x   g_adcs[1]=0x%08x\n",
         &adc1, g_adcs[1]);
-  avdbg("     tiva_adc_sse_s sse0=0x%08x   g_sses[1,0]=0x%08x\n",
+  ainfo("     tiva_adc_sse_s sse0=0x%08x   g_sses[1,0]=0x%08x\n",
         &sse10, g_sses[SSE_IDX(1, 0)]);
-  avdbg("     tiva_adc_sse_s sse1=0x%08x   g_sses[1,1]=0x%08x\n",
+  ainfo("     tiva_adc_sse_s sse1=0x%08x   g_sses[1,1]=0x%08x\n",
         &sse11, g_sses[SSE_IDX(1, 1)]);
-  avdbg("     tiva_adc_sse_s sse2=0x%08x   g_sses[1,2]=0x%08x\n",
+  ainfo("     tiva_adc_sse_s sse2=0x%08x   g_sses[1,2]=0x%08x\n",
         &sse12, g_sses[SSE_IDX(1, 2)]);
-  avdbg("     tiva_adc_sse_s sse3=0x%08x   g_sses[1,3]=0x%08x\n",
+  ainfo("     tiva_adc_sse_s sse3=0x%08x   g_sses[1,3]=0x%08x\n",
         &sse13, g_sses[SSE_IDX(1, 3)]);
 #  endif
 }
@@ -1038,24 +1040,24 @@ static void tiva_adc_runtimeobj_vals(void)
   struct tiva_adc_sse_s *sse;
   uint8_t s;
 #  ifdef CONFIG_TIVA_ADC0
-  avdbg("ADC0 [0x%08x] cfg=%d ena=%d devno=%d\n",
+  ainfo("ADC0 [0x%08x] cfg=%d ena=%d devno=%d\n",
          &adc0, adc0.cfg, adc0.ena, adc0.devno);
 
   for (s = 0; s < 4; ++s)
     {
       sse = g_sses[SSE_IDX(0, s)];
-      avdbg("SSE%d [0x%08x] adc=%d cfg=%d ena=%d num=%d\n",
+      ainfo("SSE%d [0x%08x] adc=%d cfg=%d ena=%d num=%d\n",
              s, sse, sse->adc, sse->cfg, sse->ena, sse->num);
     }
 #  endif
 #  ifdef CONFIG_TIVA_ADC1
-  avdbg("ADC1 [0x%08x] cfg=%d ena=%d devno=%d\n",
+  ainfo("ADC1 [0x%08x] cfg=%d ena=%d devno=%d\n",
          &adc1, adc1.cfg, adc1.ena, adc1.devno);
 
   for (s = 0; s < 4; ++s)
     {
       sse = g_sses[SSE_IDX(1, s)];
-      avdbg("SSE%d [0x%08x] adc=%d cfg=%d ena=%d num=%d\n",
+      ainfo("SSE%d [0x%08x] adc=%d cfg=%d ena=%d num=%d\n",
              s, sse, sse->adc, sse->cfg, sse->ena, sse->num);
     }
 #  endif
@@ -1072,15 +1074,15 @@ static void tiva_adc_runtimeobj_vals(void)
 static void tiva_adc_dump_dev(void)
 {
 #  ifdef CONFIG_TIVA_ADC0
-  avdbg("adc_ops_s  g_adcops=0x%08x adc0.dev->ad_ops=0x%08x\n",
+  ainfo("adc_ops_s  g_adcops=0x%08x adc0.dev->ad_ops=0x%08x\n",
          &g_adcops, adc0.dev->ad_ops);
-  avdbg("tiva_adc_s adc0=0x%08x      adc0.dev->ad_priv=0x%08x\n",
+  ainfo("tiva_adc_s adc0=0x%08x      adc0.dev->ad_priv=0x%08x\n",
          &adc0, adc0.dev->ad_priv);
 #  endif
 #  ifdef CONFIG_TIVA_ADC1
-  avdbg("adc_ops_s  g_adcops=0x%08x adc1.dev->ad_ops=0x%08x\n",
+  ainfo("adc_ops_s  g_adcops=0x%08x adc1.dev->ad_ops=0x%08x\n",
          &g_adcops, adc1.dev->ad_ops);
-  avdbg("tiva_adc_s adc1=0x%08x      adc1.dev->ad_priv=0x%08x\n",
+  ainfo("tiva_adc_s adc1=0x%08x      adc1.dev->ad_priv=0x%08x\n",
          &adc1, adc1.dev->ad_priv);
 #  endif
 }
diff --git a/arch/arm/src/tiva/tiva_dumpgpio.c b/arch/arm/src/tiva/tiva_dumpgpio.c
index 89ae3a462b2f6da0af322c9f0e6ca8661f3f1d77..b50e8fa0f5380235973b3942b6a899f840c06a28 100644
--- a/arch/arm/src/tiva/tiva_dumpgpio.c
+++ b/arch/arm/src/tiva/tiva_dumpgpio.c
@@ -39,6 +39,11 @@
 
 #include 
 
+/* Output debug info even if debug output is not selected. */
+
+#undef  CONFIG_DEBUG_INFO
+#define CONFIG_DEBUG_INFO 1
+
 #include 
 #include 
 #include 
@@ -134,9 +139,9 @@ static inline uint8_t tiva_gpioport(int port)
  *
  ****************************************************************************/
 
+#ifdef CONFIG_DEBUG_GPIO_INFO
 int tiva_dumpgpio(uint32_t pinset, const char *msg)
 {
-#ifdef CONFIG_DEBUG
   irqstate_t   flags;
   unsigned int port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
   uintptr_t    base;
@@ -163,35 +168,34 @@ int tiva_dumpgpio(uint32_t pinset, const char *msg)
   enabled  = ((rcgc2 & SYSCON_RCGC2_GPIO(port)) != 0);
 #endif
 
-  lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
-        tiva_gpioport(port), pinset, base, msg);
+  gpioinfo("GPIO%c pinset: %08x base: %08x -- %s\n",
+           tiva_gpioport(port), pinset, base, msg);
 #ifdef TIVA_SYSCON_RCGCGPIO
-  lldbg("RCGCGPIO: %08x (%s)\n",
-        rcgcgpio, enabled ? "enabled" : "disabled");
+  gpioinfo("RCGCGPIO: %08x (%s)\n",
+           rcgcgpio, enabled ? "enabled" : "disabled");
 #else
-  lldbg("   RCGC2: %08x (%s)\n",
-        rcgc2, enabled ? "enabled" : "disabled");
+  gpioinfo("   RCGC2: %08x (%s)\n",
+           rcgc2, enabled ? "enabled" : "disabled");
 #endif
 
   /* Don't bother with the rest unless the port is enabled */
 
   if (enabled)
     {
-      lldbg("   AFSEL: %02x DEN: %02x DIR: %02x DATA: %02x\n",
-            getreg32(base + TIVA_GPIO_AFSEL_OFFSET), getreg32(base + TIVA_GPIO_DEN_OFFSET),
-            getreg32(base + TIVA_GPIO_DIR_OFFSET), getreg32(base + TIVA_GPIO_DATA_OFFSET + 0x3fc));
-      lldbg("      IS:  %02x IBE: %02x IEV: %02x IM:  %02x RIS: %08x MIS: %08x\n",
-            getreg32(base + TIVA_GPIO_IEV_OFFSET), getreg32(base + TIVA_GPIO_IM_OFFSET),
-            getreg32(base + TIVA_GPIO_RIS_OFFSET), getreg32(base + TIVA_GPIO_MIS_OFFSET));
-      lldbg("     2MA:  %02x 4MA: %02x 8MA: %02x ODR: %02x PUR %02x PDR: %02x SLR: %02x\n",
-            getreg32(base + TIVA_GPIO_DR2R_OFFSET), getreg32(base + TIVA_GPIO_DR4R_OFFSET),
-            getreg32(base + TIVA_GPIO_DR8R_OFFSET), getreg32(base + TIVA_GPIO_ODR_OFFSET),
-            getreg32(base + TIVA_GPIO_PUR_OFFSET), getreg32(base + TIVA_GPIO_PDR_OFFSET),
-            getreg32(base + TIVA_GPIO_SLR_OFFSET));
+      gpioinfo("   AFSEL: %02x DEN: %02x DIR: %02x DATA: %02x\n",
+               getreg32(base + TIVA_GPIO_AFSEL_OFFSET), getreg32(base + TIVA_GPIO_DEN_OFFSET),
+               getreg32(base + TIVA_GPIO_DIR_OFFSET), getreg32(base + TIVA_GPIO_DATA_OFFSET + 0x3fc));
+      gpioinfo("      IS:  %02x IBE: %02x IEV: %02x IM:  %02x RIS: %08x MIS: %08x\n",
+               getreg32(base + TIVA_GPIO_IEV_OFFSET), getreg32(base + TIVA_GPIO_IM_OFFSET),
+               getreg32(base + TIVA_GPIO_RIS_OFFSET), getreg32(base + TIVA_GPIO_MIS_OFFSET));
+      gpioinfo("     2MA:  %02x 4MA: %02x 8MA: %02x ODR: %02x PUR %02x PDR: %02x SLR: %02x\n",
+               getreg32(base + TIVA_GPIO_DR2R_OFFSET), getreg32(base + TIVA_GPIO_DR4R_OFFSET),
+               getreg32(base + TIVA_GPIO_DR8R_OFFSET), getreg32(base + TIVA_GPIO_ODR_OFFSET),
+               getreg32(base + TIVA_GPIO_PUR_OFFSET), getreg32(base + TIVA_GPIO_PDR_OFFSET),
+               getreg32(base + TIVA_GPIO_SLR_OFFSET));
     }
 
   leave_critical_section(flags);
-#endif /* CONFIG_DEBUG */
-
   return OK;
 }
+#endif /* CONFIG_DEBUG_GPIO_INFO */
diff --git a/arch/arm/src/tiva/tiva_flash.c b/arch/arm/src/tiva/tiva_flash.c
index 0dd70dd1dcb313b8f5f51f831c2c48433a6545b1..c606b1888751734f5d9a616bcee6b0dc0ac4e753 100644
--- a/arch/arm/src/tiva/tiva_flash.c
+++ b/arch/arm/src/tiva/tiva_flash.c
@@ -146,7 +146,7 @@ static int tiva_erase(FAR struct mtd_dev_s *dev, off_t startblock,
     {
       pageaddr = TIVA_VIRTUAL_BASE + curpage * TIVA_FLASH_PAGESIZE;
 
-      fvdbg("Erase page at %08x\n", pageaddr);
+      finfo("Erase page at %08x\n", pageaddr);
 
       /* set page address */
 
diff --git a/arch/arm/src/tiva/tiva_gpio.c b/arch/arm/src/tiva/tiva_gpio.c
index 6ce03bdae5595b1022422df19220f9b7cf19c730..5d009d786473820fe1c9884750455f59afebd820 100644
--- a/arch/arm/src/tiva/tiva_gpio.c
+++ b/arch/arm/src/tiva/tiva_gpio.c
@@ -732,15 +732,19 @@ static inline void tiva_interrupt(uint32_t pinset)
 
   modifyreg32(base + TIVA_GPIO_IEV_OFFSET, ievclr, ievset);
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
   uint32_t regval;
-  gpiovdbg("reg expected actual: [interrupt type=%d]\n", inttype);
+
+  gpioinfo("reg expected actual: [interrupt type=%d]\n", inttype);
+
   regval = (getreg32(base+TIVA_GPIO_IS_OFFSET) & pin) ? pin : 0;
-  gpiovdbg("IS  0x%08x 0x%08x\n", isset, regval);
+  gpioinfo("IS  0x%08x 0x%08x\n", isset, regval);
+
   regval = (getreg32(base+TIVA_GPIO_IBE_OFFSET) & pin) ? pin : 0;
-  gpiovdbg("IBE 0x%08x 0x%08x\n", ibeset, regval);
+  gpioinfo("IBE 0x%08x 0x%08x\n", ibeset, regval);
+
   regval = (getreg32(base+TIVA_GPIO_IEV_OFFSET) & pin) ? pin : 0;
-  gpiovdbg("IEV 0x%08x 0x%08x\n", ievset, regval);
+  gpioinfo("IEV 0x%08x 0x%08x\n", ievset, regval);
 #endif
 }
 #endif
@@ -987,16 +991,12 @@ void tiva_gpio_lockport(uint32_t pinset, bool lock)
 
   if (lock)
     {
-#ifdef CONFIG_DEBUG_GPIO
-      gpiovdbg("  locking port=%d pin=%d\n", port, pinno);
-#endif
+      gpioinfo("  locking port=%d pin=%d\n", port, pinno);
       modifyreg32(base + TIVA_GPIO_CR_OFFSET, pinmask, 0);
     }
   else
     {
-#ifdef CONFIG_DEBUG_GPIO
-      gpiovdbg("unlocking port=%d pin=%d\n", port, pinno);
-#endif
+      gpioinfo("unlocking port=%d pin=%d\n", port, pinno);
       modifyreg32(base + TIVA_GPIO_CR_OFFSET, 0, pinmask);
     }
 
diff --git a/arch/arm/src/tiva/tiva_gpio.h b/arch/arm/src/tiva/tiva_gpio.h
index 12b466042e35f3eac46e73555ba0f9bf045af50c..54b12cf37ba944dfc1dd905de61b385b0a256cf0 100644
--- a/arch/arm/src/tiva/tiva_gpio.h
+++ b/arch/arm/src/tiva/tiva_gpio.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/tiva/tiva_gpio.h
  *
- *   Copyright (C) 2009-2010, 2013-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009-2010, 2013-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * With modifications from Calvin Maguranis 
@@ -319,47 +319,17 @@
 #  define GPIO_PIN_6                  (6 << GPIO_PIN_SHIFT)
 #  define GPIO_PIN_7                  (7 << GPIO_PIN_SHIFT)
 
-/* Debug ********************************************************************/
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_GPIO
-#endif
-
-#ifdef CONFIG_DEBUG_GPIO
-# define gpiodbg(format, ...)    dbg(format, ##__VA_ARGS__)
-# define gpiolldbg(format, ...)  lldbg(format, ##__VA_ARGS__)
-# define gpiovdbg(format, ...)   vdbg(format, ##__VA_ARGS__)
-# define gpiollvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
-#else
-# define gpiodbg(x...)
-# define gpiolldbg(x...)
-# define gpiovdbg(x...)
-# define gpiollvdbg(x...)
-#endif
-
 /****************************************************************************
- * Public Types
- ****************************************************************************/
-
-/****************************************************************************
- * Inline Functions
+ * Public Function Prototypes
  ****************************************************************************/
 
 #ifndef __ASSEMBLY__
 
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 #if defined(__cplusplus)
 extern "C"
 {
 #endif
 
-/****************************************************************************
- * Public Function Prototypes
- ****************************************************************************/
-
 uintptr_t tiva_gpiobaseaddress(unsigned int port);
 
 /****************************************************************************
@@ -413,8 +383,18 @@ int tiva_dumpgpio(uint32_t pinset, const char *msg);
 
 void tiva_gpio_lockport(uint32_t pinset, bool lock);
 
-#ifdef CONFIG_DEBUG_GPIO
+/****************************************************************************
+ * Function:  tiva_dumpgpio
+ *
+ * Description:
+ *   Dump all GPIO registers associated with the provided base address
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEBUG_GPIO_INFO
 void tiva_gpio_dumpconfig(uint32_t pinset);
+#else
+# define tiva_gpio_dumpconfig(p)
 #endif
 
 #ifdef CONFIG_TIVA_GPIO_IRQS
@@ -432,15 +412,19 @@ int weak_function tiva_gpioirqinitialize(void);
  * Name: tiva_gpioirqattach
  *
  * Description:
- *   Attach a GPIO interrupt to the provided 'isr'
+ *   Attach in GPIO interrupt to the provided 'isr'. If isr==NULL, then the
+ *   irq_unexpected_isr handler is assigned and the pin's interrupt mask is
+ *   disabled to stop further interrupts. Otherwise, the new isr is linked
+ *   and the pin's interrupt mask is set.
  *
- * Returns:
- *   oldhandler - the old interrupt handler assigned to this pin.
+ * Returned Value:
+ *   Zero (OK) is returned on success.  Otherwise a negated errno value is
+ *   return to indicate the nature of the failure.
  *
  ****************************************************************************/
 
-xcpt_t tiva_gpioirqattach(uint32_t pinset, xcpt_t isr);
-#  define tiva_gpioirqdetach(pinset) tiva_gpioirqattach(pinset, NULL)
+int tiva_gpioirqattach(uint32_t pinset, xcpt_t isr, void *arg);
+#  define tiva_gpioirqdetach(p) tiva_gpioirqattach((p),NULL,NULL)
 
 /****************************************************************************
  * Name: tiva_gpioportirqattach
diff --git a/arch/arm/src/tiva/tiva_gpioirq.c b/arch/arm/src/tiva/tiva_gpioirq.c
index 33b5fa0e3a66dd17f130373cfbfbeaa32e541740..112887f8bf4bd049717188c797c68affeb835871 100644
--- a/arch/arm/src/tiva/tiva_gpioirq.c
+++ b/arch/arm/src/tiva/tiva_gpioirq.c
@@ -67,17 +67,23 @@
 #define TIVA_GPIO_IRQ_IDX(port,pin) ((port*TIVA_NPINS)+(pin))
 
 /****************************************************************************
- * Private Data
+ * Private types
  ****************************************************************************/
 
-/* A table of handlers for each GPIO port interrupt */
-
-static FAR xcpt_t g_gpioportirqvector[TIVA_NIRQ_PINS];
+struct gpio_handler_s
+{
+  xcpt_t isr;    /* Interrupt service routine entry point */
+  void  *arg;    /* The argument that accompanies the interrupt */
+};
 
 /****************************************************************************
- * Public Data
+ * Private Data
  ****************************************************************************/
 
+/* A table of handlers for each GPIO port interrupt */
+
+static struct gpio_handler_s g_gpioportirqvector[TIVA_NIRQ_PINS];
+
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -293,7 +299,7 @@ static int tiva_gpioporthandler(uint8_t port, void *context)
   uint8_t   pin;                                   /* Pin number */
 
   tiva_gpioirqclear(port, 0xff);
-  gpiollvdbg("mis=0b%08b\n", mis & 0xff);
+  gpioinfo("mis=0b%08b\n", mis & 0xff);
 
   /* Now process each IRQ pending in the MIS */
 
@@ -303,12 +309,13 @@ static int tiva_gpioporthandler(uint8_t port, void *context)
         {
           if (((mis >> pin) & 1) != 0)
             {
-              gpiollvdbg("port=%d pin=%d irq=%p index=%d\n",
-                         port, pin,
-                         g_gpioportirqvector[TIVA_GPIO_IRQ_IDX(port, pin)],
-                         TIVA_GPIO_IRQ_IDX(port, pin));
+              int index = TIVA_GPIO_IRQ_IDX(port, pin);
+              FAR struct gpio_handler_s *handler = &g_gpioportirqvector[index];
+
+              gpioinfo("port=%d pin=%d isr=%p arg=%p index=%d\n",
+                       port, pin, handler->isr, handler->arg, index);
 
-              g_gpioportirqvector[TIVA_GPIO_IRQ_IDX(port, pin)](irq, context);
+              handler->isr(irq, context, handler->arg);
             }
         }
     }
@@ -317,7 +324,7 @@ static int tiva_gpioporthandler(uint8_t port, void *context)
 }
 
 #ifdef CONFIG_TIVA_GPIOA_IRQS
-static int tiva_gpioahandler(int irq, FAR void *context)
+static int tiva_gpioahandler(int irq, FAR void *context, FAR void *arg)
 {
   irqstate_t flags;
   flags = enter_critical_section();
@@ -330,7 +337,7 @@ static int tiva_gpioahandler(int irq, FAR void *context)
 #endif
 
 #ifdef CONFIG_TIVA_GPIOB_IRQS
-static int tiva_gpiobhandler(int irq, FAR void *context)
+static int tiva_gpiobhandler(int irq, FAR void *context, FAR void *arg)
 {
   irqstate_t flags;
   flags = enter_critical_section();
@@ -343,7 +350,7 @@ static int tiva_gpiobhandler(int irq, FAR void *context)
 #endif
 
 #ifdef CONFIG_TIVA_GPIOC_IRQS
-static int tiva_gpiochandler(int irq, FAR void *context)
+static int tiva_gpiochandler(int irq, FAR void *context, FAR void *arg)
 {
   irqstate_t flags;
   flags = enter_critical_section();
@@ -356,7 +363,7 @@ static int tiva_gpiochandler(int irq, FAR void *context)
 #endif
 
 #ifdef CONFIG_TIVA_GPIOD_IRQS
-static int tiva_gpiodhandler(int irq, FAR void *context)
+static int tiva_gpiodhandler(int irq, FAR void *context, FAR void *arg)
 {
   irqstate_t flags;
   flags = enter_critical_section();
@@ -369,7 +376,7 @@ static int tiva_gpiodhandler(int irq, FAR void *context)
 #endif
 
 #ifdef CONFIG_TIVA_GPIOE_IRQS
-static int tiva_gpioehandler(int irq, FAR void *context)
+static int tiva_gpioehandler(int irq, FAR void *context, FAR void *arg)
 {
   irqstate_t flags;
   flags = enter_critical_section();
@@ -382,7 +389,7 @@ static int tiva_gpioehandler(int irq, FAR void *context)
 #endif
 
 #ifdef CONFIG_TIVA_GPIOF_IRQS
-static int tiva_gpiofhandler(int irq, FAR void *context)
+static int tiva_gpiofhandler(int irq, FAR void *context, FAR void *arg)
 {
   irqstate_t flags;
   flags = enter_critical_section();
@@ -395,7 +402,7 @@ static int tiva_gpiofhandler(int irq, FAR void *context)
 #endif
 
 #ifdef CONFIG_TIVA_GPIOG_IRQS
-static int tiva_gpioghandler(int irq, FAR void *context)
+static int tiva_gpioghandler(int irq, FAR void *context, FAR void *arg)
 {
   irqstate_t flags;
   flags = enter_critical_section();
@@ -408,7 +415,7 @@ static int tiva_gpioghandler(int irq, FAR void *context)
 #endif
 
 #ifdef CONFIG_TIVA_GPIOH_IRQS
-static int tiva_gpiohhandler(int irq, FAR void *context)
+static int tiva_gpiohhandler(int irq, FAR void *context, FAR void *arg)
 {
   irqstate_t flags;
   flags = enter_critical_section();
@@ -421,7 +428,7 @@ static int tiva_gpiohhandler(int irq, FAR void *context)
 #endif
 
 #ifdef CONFIG_TIVA_GPIOJ_IRQS
-static int tiva_gpiojhandler(int irq, FAR void *context)
+static int tiva_gpiojhandler(int irq, FAR void *context, FAR void *arg)
 {
   irqstate_t flags;
   flags = enter_critical_section();
@@ -434,7 +441,7 @@ static int tiva_gpiojhandler(int irq, FAR void *context)
 #endif
 
 #ifdef CONFIG_TIVA_GPIOK_IRQS
-static int tiva_gpiokhandler(int irq, FAR void *context)
+static int tiva_gpiokhandler(int irq, FAR void *context, FAR void *arg)
 {
   irqstate_t flags;
   flags = enter_critical_section();
@@ -447,7 +454,7 @@ static int tiva_gpiokhandler(int irq, FAR void *context)
 #endif
 
 #ifdef CONFIG_TIVA_GPIOL_IRQS
-static int tiva_gpiolhandler(int irq, FAR void *context)
+static int tiva_gpiolhandler(int irq, FAR void *context, FAR void *arg)
 {
   irqstate_t flags;
   flags = enter_critical_section();
@@ -460,7 +467,7 @@ static int tiva_gpiolhandler(int irq, FAR void *context)
 #endif
 
 #ifdef CONFIG_TIVA_GPIOM_IRQS
-static int tiva_gpiomhandler(int irq, FAR void *context)
+static int tiva_gpiomhandler(int irq, FAR void *context, FAR void *arg)
 {
   irqstate_t flags;
   flags = enter_critical_section();
@@ -473,7 +480,7 @@ static int tiva_gpiomhandler(int irq, FAR void *context)
 #endif
 
 #ifdef CONFIG_TIVA_GPION_IRQS
-static int tiva_gpionhandler(int irq, FAR void *context)
+static int tiva_gpionhandler(int irq, FAR void *context, FAR void *arg)
 {
   irqstate_t flags;
   flags = enter_critical_section();
@@ -486,7 +493,7 @@ static int tiva_gpionhandler(int irq, FAR void *context)
 #endif
 
 #ifdef CONFIG_TIVA_GPIOP_IRQS
-static int tiva_gpiophandler(int irq, FAR void *context)
+static int tiva_gpiophandler(int irq, FAR void *context, FAR void *arg)
 {
   irqstate_t flags;
   flags = enter_critical_section();
@@ -499,7 +506,7 @@ static int tiva_gpiophandler(int irq, FAR void *context)
 #endif
 
 #ifdef CONFIG_TIVA_GPIOQ_IRQS
-static int tiva_gpioqhandler(int irq, FAR void *context)
+static int tiva_gpioqhandler(int irq, FAR void *context, FAR void *arg)
 {
   irqstate_t flags;
   flags = enter_critical_section();
@@ -512,7 +519,7 @@ static int tiva_gpioqhandler(int irq, FAR void *context)
 #endif
 
 #ifdef CONFIG_TIVA_GPIOR_IRQS
-static int tiva_gpiorhandler(int irq, FAR void *context)
+static int tiva_gpiorhandler(int irq, FAR void *context, FAR void *arg)
 {
   irqstate_t flags;
   flags = enter_critical_section();
@@ -525,7 +532,7 @@ static int tiva_gpiorhandler(int irq, FAR void *context)
 #endif
 
 #ifdef CONFIG_TIVA_GPIOS_IRQS
-static int tiva_gpioshandler(int irq, FAR void *context)
+static int tiva_gpioshandler(int irq, FAR void *context, FAR void *arg)
 {
   irqstate_t flags;
   flags = enter_critical_section();
@@ -557,10 +564,11 @@ int tiva_gpioirqinitialize(void)
 
   for (i = 0; i < TIVA_NIRQ_PINS; ++i)
     {
-      g_gpioportirqvector[i] = irq_unexpected_isr;
+      g_gpioportirqvector[i].isr = irq_unexpected_isr;
+      g_gpioportirqvector[i].arg = NULL;
     }
 
-  gpiovdbg("tiva_gpioirqinitialize isr=%d/%d irq_unexpected_isr=%p\n",
+  gpioinfo("tiva_gpioirqinitialize isr=%d/%d irq_unexpected_isr=%p\n",
            i, TIVA_NIRQ_PINS, irq_unexpected_isr);
 
   /* Then attach each GPIO interrupt handlers and enable corresponding GPIO
@@ -568,87 +576,87 @@ int tiva_gpioirqinitialize(void)
    */
 
 #ifdef CONFIG_TIVA_GPIOA_IRQS
-  irq_attach(TIVA_IRQ_GPIOA, tiva_gpioahandler);
+  irq_attach(TIVA_IRQ_GPIOA, tiva_gpioahandler, NULL);
   up_enable_irq(TIVA_IRQ_GPIOA);
 #endif
 
 #ifdef CONFIG_TIVA_GPIOB_IRQS
-  irq_attach(TIVA_IRQ_GPIOB, tiva_gpiobhandler);
+  irq_attach(TIVA_IRQ_GPIOB, tiva_gpiobhandler, NULL);
   up_enable_irq(TIVA_IRQ_GPIOB);
 #endif
 
 #ifdef CONFIG_TIVA_GPIOC_IRQS
-  irq_attach(TIVA_IRQ_GPIOC, tiva_gpiochandler);
+  irq_attach(TIVA_IRQ_GPIOC, tiva_gpiochandler, NULL);
   up_enable_irq(TIVA_IRQ_GPIOC);
 #endif
 
 #ifdef CONFIG_TIVA_GPIOD_IRQS
-  irq_attach(TIVA_IRQ_GPIOD, tiva_gpiodhandler);
+  irq_attach(TIVA_IRQ_GPIOD, tiva_gpiodhandler, NULL);
   up_enable_irq(TIVA_IRQ_GPIOD);
 #endif
 
 #ifdef CONFIG_TIVA_GPIOE_IRQS
-  irq_attach(TIVA_IRQ_GPIOE, tiva_gpioehandler);
+  irq_attach(TIVA_IRQ_GPIOE, tiva_gpioehandler, NULL);
   up_enable_irq(TIVA_IRQ_GPIOE);
 #endif
 
 #ifdef CONFIG_TIVA_GPIOF_IRQS
-  irq_attach(TIVA_IRQ_GPIOF, tiva_gpiofhandler);
+  irq_attach(TIVA_IRQ_GPIOF, tiva_gpiofhandler, NULL);
   up_enable_irq(TIVA_IRQ_GPIOF);
 #endif
 
 #ifdef CONFIG_TIVA_GPIOG_IRQS
-  irq_attach(TIVA_IRQ_GPIOG, tiva_gpioghandler);
+  irq_attach(TIVA_IRQ_GPIOG, tiva_gpioghandler, NULL);
   up_enable_irq(TIVA_IRQ_GPIOG);
 #endif
 
 #ifdef CONFIG_TIVA_GPIOH_IRQS
-  irq_attach(TIVA_IRQ_GPIOH, tiva_gpiohhandler);
+  irq_attach(TIVA_IRQ_GPIOH, tiva_gpiohhandler, NULL);
   up_enable_irq(TIVA_IRQ_GPIOH);
 #endif
 
 #ifdef CONFIG_TIVA_GPIOJ_IRQS
-  irq_attach(TIVA_IRQ_GPIOJ, tiva_gpiojhandler);
+  irq_attach(TIVA_IRQ_GPIOJ, tiva_gpiojhandler, NULL);
   up_enable_irq(TIVA_IRQ_GPIOJ);
 #endif
 
 #ifdef CONFIG_TIVA_GPIOK_IRQS
-  irq_attach(TIVA_IRQ_GPIOK, tiva_gpiokhandler);
+  irq_attach(TIVA_IRQ_GPIOK, tiva_gpiokhandler, NULL);
   up_enable_irq(TIVA_IRQ_GPIOK);
 #endif
 
 #ifdef CONFIG_TIVA_GPIOL_IRQS
-  irq_attach(TIVA_IRQ_GPIOL, tiva_gpiolhandler);
+  irq_attach(TIVA_IRQ_GPIOL, tiva_gpiolhandler, NULL);
   up_enable_irq(TIVA_IRQ_GPIOL);
 #endif
 
 #ifdef CONFIG_TIVA_GPIOM_IRQS
-  irq_attach(TIVA_IRQ_GPIOM, tiva_gpiomhandler);
+  irq_attach(TIVA_IRQ_GPIOM, tiva_gpiomhandler, NULL);
   up_enable_irq(TIVA_IRQ_GPIOM);
 #endif
 
 #ifdef CONFIG_TIVA_GPION_IRQS
-  irq_attach(TIVA_IRQ_GPION, tiva_gpionhandler);
+  irq_attach(TIVA_IRQ_GPION, tiva_gpionhandler, NULL);
   up_enable_irq(TIVA_IRQ_GPION);
 #endif
 
 #ifdef CONFIG_TIVA_GPIOP_IRQS
-  irq_attach(TIVA_IRQ_GPIOP, tiva_gpiophandler);
+  irq_attach(TIVA_IRQ_GPIOP, tiva_gpiophandler, NULL);
   up_enable_irq(TIVA_IRQ_GPIOP);
 #endif
 
 #ifdef CONFIG_TIVA_GPIOQ_IRQS
-  irq_attach(TIVA_IRQ_GPIOQ, tiva_gpioqhandler);
+  irq_attach(TIVA_IRQ_GPIOQ, tiva_gpioqhandler, NULL);
   up_enable_irq(TIVA_IRQ_GPIOQ);
 #endif
 
 #ifdef CONFIG_TIVA_GPIOR_IRQS
-  irq_attach(TIVA_IRQ_GPIOR, tiva_gpiorhandler);
+  irq_attach(TIVA_IRQ_GPIOR, tiva_gpiorhandler, NULL);
   up_enable_irq(TIVA_IRQ_GPIOR);
 #endif
 
 #ifdef CONFIG_TIVA_GPIOS_IRQS
-  irq_attach(TIVA_IRQ_GPIOS, tiva_gpioshandler);
+  irq_attach(TIVA_IRQ_GPIOS, tiva_gpioshandler, NULL);
   up_enable_irq(TIVA_IRQ_GPIOS);
 #endif
 
@@ -665,51 +673,51 @@ int tiva_gpioirqinitialize(void)
  *   and the pin's interrupt mask is set.
  *
  * Returns:
- *   oldhandler - the old interrupt handler assigned to this pin.
+ *   Zero (OK) is returned on success.  Otherwise a negated errno value is
+ *   return to indicate the nature of the failure.
  *
  ****************************************************************************/
 
-xcpt_t tiva_gpioirqattach(uint32_t pinset, xcpt_t isr)
+int tiva_gpioirqattach(uint32_t pinset, xcpt_t isr, void *arg)
 {
+  FAR struct gpio_handler_s *handler;
   irqstate_t flags;
-  xcpt_t     oldhandler = NULL;
   uint8_t    port  = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
   uint8_t    pinno = (pinset & GPIO_PIN_MASK);
   uint8_t    pin   = 1 << pinno;
 
-  /* assign per-pin interrupt handlers */
+  /* Assign per-pin interrupt handlers */
 
   if (port < TIVA_NPORTS)
     {
       flags = enter_critical_section();
 
-      /* store the older handler to return */
-
-      oldhandler = g_gpioportirqvector[TIVA_GPIO_IRQ_IDX(port, pinno)];
-
       /* If the new ISR is NULL, then the ISR is being detached.
        * In this case, disable the ISR and direct any interrupts
        * to the unexpected interrupt handler.
        */
 
-      gpiovdbg("assign port=%d pin=%d function=%p to idx=%d\n",
+      gpioinfo("assign port=%d pin=%d function=%p to idx=%d\n",
                port, pinno, isr, TIVA_GPIO_IRQ_IDX(port, pinno));
 
+      handler = &g_gpioportirqvector[TIVA_GPIO_IRQ_IDX(port, pinno)];
       if (isr == NULL)
         {
           tiva_gpioirqdisable(port, pin);
-          g_gpioportirqvector[TIVA_GPIO_IRQ_IDX(port, pinno)] = irq_unexpected_isr;
+          handler->isr = irq_unexpected_isr;
+          handler->arg = NULL;
         }
       else
         {
-          g_gpioportirqvector[TIVA_GPIO_IRQ_IDX(port, pinno)] = isr;
+          handler->isr = isr;
+          handler->arg = arg;
           tiva_gpioirqenable(port, pin);
         }
 
       leave_critical_section(flags);
     }
 
-  return oldhandler;
+  return OK;
 }
 
 /****************************************************************************
@@ -737,16 +745,16 @@ void tiva_gpioportirqattach(uint8_t port, xcpt_t isr)
        * to the unexpected interrupt handler.
        */
 
-      gpiovdbg("assign function=%p to port=%d\n", isr, port);
+      gpioinfo("assign function=%p to port=%d\n", isr, port);
 
       if (isr == NULL)
         {
           tiva_gpioirqdisable(port, 0xff);
-          irq_attach(irq, irq_unexpected_isr);
+          irq_attach(irq, irq_unexpected_isr, NULL);
         }
       else
         {
-          irq_attach(irq, isr);
+          irq_attach(irq, isr, NULL);
           tiva_gpioirqenable(port, 0xff);
         }
 
diff --git a/arch/arm/src/tiva/tiva_i2c.c b/arch/arm/src/tiva/tiva_i2c.c
index 28450836f844a514bc7a39bc67376405dad16283..558a72554ca74560d79bb9f43ff07090aed9deff 100644
--- a/arch/arm/src/tiva/tiva_i2c.c
+++ b/arch/arm/src/tiva/tiva_i2c.c
@@ -57,8 +57,9 @@
 
 #include 
 #include 
-#include 
 #include 
+#include 
+#include 
 
 #include 
 
@@ -119,17 +120,8 @@
 #define MKI2C_OUTPUT(p) (((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_OUTPUT)
 
 /* Debug ****************************************************************************/
-/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
-
-#ifdef CONFIG_DEBUG_I2C
-#  define i2cdbg dbg
-#  define i2cvdbg vdbg
-#else
-#  define i2cdbg(x...)
-#  define i2cvdbg(x...)
-#endif
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_I2C_INFO
 #  undef CONFIG_TIVA_I2C_REGDEBUG
 #endif
 
@@ -203,7 +195,7 @@ struct tiva_i2c_config_s
   uint32_t scl_pin;           /* GPIO configuration for SCL as SCL */
   uint32_t sda_pin;           /* GPIO configuration for SDA as SDA */
 #ifndef CONFIG_I2C_POLLED
-  int (*isr)(int, void *);    /* Interrupt handler */
+  int (*isr)(int, void *, void *);    /* Interrupt handler */
   uint8_t irq;                /* IRQ number */
 #endif
   uint8_t devno;              /* I2Cn where n = devno */
@@ -294,34 +286,34 @@ static int tiva_i2c_interrupt(struct tiva_i2c_priv_s * priv, uint32_t status);
 
 #ifndef CONFIG_I2C_POLLED
 #ifdef CONFIG_TIVA_I2C0
-static int tiva_i2c0_interrupt(int irq, void *context);
+static int tiva_i2c0_interrupt(int irq, void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_TIVA_I2C1
-static int tiva_i2c1_interrupt(int irq, void *context);
+static int tiva_i2c1_interrupt(int irq, void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_TIVA_I2C2
-static int tiva_i2c2_interrupt(int irq, void *context);
+static int tiva_i2c2_interrupt(int irq, void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_TIVA_I2C3
-static int tiva_i2c3_interrupt(int irq, void *context);
+static int tiva_i2c3_interrupt(int irq, void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_TIVA_I2C4
-static int tiva_i2c4_interrupt(int irq, void *context);
+static int tiva_i2c4_interrupt(int irq, void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_TIVA_I2C5
-static int tiva_i2c5_interrupt(int irq, void *context);
+static int tiva_i2c5_interrupt(int irq, void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_TIVA_I2C6
-static int tiva_i2c6_interrupt(int irq, void *context);
+static int tiva_i2c6_interrupt(int irq, void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_TIVA_I2C7
-static int tiva_i2c7_interrupt(int irq, void *context);
+static int tiva_i2c7_interrupt(int irq, void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_TIVA_I2C8
-static int tiva_i2c8_interrupt(int irq, void *context);
+static int tiva_i2c8_interrupt(int irq, void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_TIVA_I2C9
-static int tiva_i2c9_interrupt(int irq, void *context);
+static int tiva_i2c9_interrupt(int irq, void *context, FAR void *arg);
 #endif
 #endif /* !CONFIG_I2C_POLLED */
 
@@ -609,7 +601,7 @@ static bool tiva_i2c_checkreg(struct tiva_i2c_priv_s *priv, bool wr,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", priv->ntimes);
+          i2cinfo("...[Repeats %d times]...\n", priv->ntimes);
         }
 
       /* Save information about the new access */
@@ -642,7 +634,7 @@ static uint32_t tiva_i2c_getreg(struct tiva_i2c_priv_s *priv, unsigned int offse
 
   if (tiva_i2c_checkreg(priv, false, regval, regaddr))
     {
-      lldbg("%08x->%08x\n", regaddr, regval);
+      i2cinfo("%08x->%08x\n", regaddr, regval);
     }
 
   return regval;
@@ -671,7 +663,7 @@ static void tiva_i2c_putreg(struct tiva_i2c_priv_s *priv, unsigned int offset,
 
   if (tiva_i2c_checkreg(priv, true, regval, regaddr))
     {
-      lldbg("%08x<-%08x\n", regaddr, regval);
+      i2cinfo("%08x<-%08x\n", regaddr, regval);
     }
 
   putreg32(regval, regaddr);
@@ -865,7 +857,7 @@ static inline int tiva_i2c_sem_waitdone(struct tiva_i2c_priv_s *priv)
 
   while (priv->intstate != INTSTATE_DONE && elapsed < timeout);
 
-  i2cvdbg("intstate: %d elapsed: %ld threshold: %ld status: %08x\n",
+  i2cinfo("intstate: %d elapsed: %ld threshold: %ld status: %08x\n",
           priv->intstate, (long)elapsed, (long)timeout, status);
 
   /* Set the interrupt state back to IDLE */
@@ -900,8 +892,14 @@ static inline void tiva_i2c_sem_post(struct tiva_i2c_priv_s *priv)
 static inline void tiva_i2c_sem_init(struct tiva_i2c_priv_s *priv)
 {
   sem_init(&priv->exclsem, 0, 1);
+
 #ifndef CONFIG_I2C_POLLED
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   sem_init(&priv->waitsem, 0, 0);
+  sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
 #endif
 }
 
@@ -968,7 +966,7 @@ static void tiva_i2c_tracenew(struct tiva_i2c_priv_s *priv, uint32_t status)
 
           if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
             {
-              i2cdbg("I2C%d: ERROR: Trace table overflow\n", priv->config->devno);
+              i2cerr("ERROR: I2C%d trace table overflow\n", priv->config->devno);
               return;
             }
 
@@ -1017,7 +1015,7 @@ static void tiva_i2c_traceevent(struct tiva_i2c_priv_s *priv,
 
           if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
             {
-              i2cdbg("I2C%d: ERROR: Trace table overflow\n", priv->config->devno);
+              i2cerr("ERROR: I2C%d trace table overflow\n", priv->config->devno);
               return;
             }
 
@@ -1421,7 +1419,7 @@ static int tiva_i2c_interrupt(struct tiva_i2c_priv_s *priv, uint32_t status)
  ************************************************************************************/
 
 #if !defined(CONFIG_I2C_POLLED) && defined(CONFIG_TIVA_I2C0)
-static int tiva_i2c0_interrupt(int irq, void *context)
+static int tiva_i2c0_interrupt(int irq, void *context, void *arg)
 {
   struct tiva_i2c_priv_s *priv;
   uint32_t status;
@@ -1446,7 +1444,7 @@ static int tiva_i2c0_interrupt(int irq, void *context)
  ************************************************************************************/
 
 #if !defined(CONFIG_I2C_POLLED) && defined(CONFIG_TIVA_I2C1)
-static int tiva_i2c1_interrupt(int irq, void *context)
+static int tiva_i2c1_interrupt(int irq, void *context, FAR void *arg)
 {
   struct tiva_i2c_priv_s *priv;
   uint32_t status;
@@ -1471,7 +1469,7 @@ static int tiva_i2c1_interrupt(int irq, void *context)
  ************************************************************************************/
 
 #if !defined(CONFIG_I2C_POLLED) && defined(CONFIG_TIVA_I2C2)
-static int tiva_i2c2_interrupt(int irq, void *context)
+static int tiva_i2c2_interrupt(int irq, void *context, FAR void *arg)
 {
   struct tiva_i2c_priv_s *priv;
   uint32_t status;
@@ -1496,7 +1494,7 @@ static int tiva_i2c2_interrupt(int irq, void *context)
  ************************************************************************************/
 
 #if !defined(CONFIG_I2C_POLLED) && defined(CONFIG_TIVA_I2C3)
-static int tiva_i2c3_interrupt(int irq, void *context)
+static int tiva_i2c3_interrupt(int irq, void *context, FAR void *arg)
 {
   struct tiva_i2c_priv_s *priv;
   uint32_t status;
@@ -1521,7 +1519,7 @@ static int tiva_i2c3_interrupt(int irq, void *context)
  ************************************************************************************/
 
 #if !defined(CONFIG_I2C_POLLED) && defined(CONFIG_TIVA_I2C4)
-static int tiva_i2c4_interrupt(int irq, void *context)
+static int tiva_i2c4_interrupt(int irq, void *context, FAR void *arg)
 {
   struct tiva_i2c_priv_s *priv;
   uint32_t status;
@@ -1546,7 +1544,7 @@ static int tiva_i2c4_interrupt(int irq, void *context)
  ************************************************************************************/
 
 #if !defined(CONFIG_I2C_POLLED) && defined(CONFIG_TIVA_I2C5)
-static int tiva_i2c5_interrupt(int irq, void *context)
+static int tiva_i2c5_interrupt(int irq, void *context, FAR void *arg)
 {
   struct tiva_i2c_priv_s *priv;
   uint32_t status;
@@ -1571,7 +1569,7 @@ static int tiva_i2c5_interrupt(int irq, void *context)
  ************************************************************************************/
 
 #if !defined(CONFIG_I2C_POLLED) && defined(CONFIG_TIVA_I2C6)
-static int tiva_i2c6_interrupt(int irq, void *context)
+static int tiva_i2c6_interrupt(int irq, void *context, FAR void *arg)
 {
   struct tiva_i2c_priv_s *priv;
   uint32_t status;
@@ -1596,7 +1594,7 @@ static int tiva_i2c6_interrupt(int irq, void *context)
  ************************************************************************************/
 
 #if !defined(CONFIG_I2C_POLLED) && defined(CONFIG_TIVA_I2C7)
-static int tiva_i2c7_interrupt(int irq, void *context)
+static int tiva_i2c7_interrupt(int irq, void *context, FAR void *arg)
 {
   struct tiva_i2c_priv_s *priv;
   uint32_t status;
@@ -1621,7 +1619,7 @@ static int tiva_i2c7_interrupt(int irq, void *context)
  ************************************************************************************/
 
 #if !defined(CONFIG_I2C_POLLED) && defined(CONFIG_TIVA_I2C8)
-static int tiva_i2c8_interrupt(int irq, void *context)
+static int tiva_i2c8_interrupt(int irq, void *context, FAR void *arg)
 {
   struct tiva_i2c_priv_s *priv;
   uint32_t status;
@@ -1646,7 +1644,7 @@ static int tiva_i2c8_interrupt(int irq, void *context)
  ************************************************************************************/
 
 #if !defined(CONFIG_I2C_POLLED) && defined(CONFIG_TIVA_I2C9)
-static int tiva_i2c9_interrupt(int irq, void *context)
+static int tiva_i2c9_interrupt(int irq, void *context, FAR void *arg)
 {
   struct tiva_i2c_priv_s *priv;
   uint32_t status;
@@ -1676,7 +1674,7 @@ static int tiva_i2c_initialize(struct tiva_i2c_priv_s *priv, uint32_t frequency)
   uint32_t regval;
   int ret;
 
-  i2cvdbg("I2C%d: refs=%d\n", config->devno, priv->refs);
+  i2cinfo("I2C%d: refs=%d\n", config->devno, priv->refs);
 
   /* Enable power and clocking to the I2C peripheral.
    *
@@ -1692,12 +1690,12 @@ static int tiva_i2c_initialize(struct tiva_i2c_priv_s *priv, uint32_t frequency)
   tiva_i2c_enablepwr(config->devno);
   tiva_i2c_enableclk(config->devno);
 
-  i2cvdbg("I2C%d: RCGI2C[%08x]=%08x\n",
+  i2cinfo("I2C%d: RCGI2C[%08x]=%08x\n",
           config->devno, TIVA_SYSCON_RCGCI2C, getreg32(TIVA_SYSCON_RCGCI2C));
 #else
   modifyreg32(TIVA_SYSCON_RCGC1, 0, priv->rcgbit);
 
-  i2cvdbg("I2C%d: RCGC1[%08x]=%08x\n",
+  i2cinfo("I2C%d: RCGC1[%08x]=%08x\n",
           config->devno, TIVA_SYSCON_RCGC1, getreg32(TIVA_SYSCON_RCGC1));
 #endif
 
@@ -1713,13 +1711,13 @@ static int tiva_i2c_initialize(struct tiva_i2c_priv_s *priv, uint32_t frequency)
 
   /* Configure pins */
 
-  i2cvdbg("I2C%d: SCL=%08x SDA=%08x\n",
+  i2cinfo("I2C%d: SCL=%08x SDA=%08x\n",
           config->devno, config->scl_pin, config->sda_pin);
 
   ret = tiva_configgpio(config->scl_pin);
   if (ret < 0)
     {
-      i2cvdbg("I2C%d: tiva_configgpio(%08x) failed: %d\n",
+      i2cinfo("I2C%d: tiva_configgpio(%08x) failed: %d\n",
               config->scl_pin, ret);
       return ret;
     }
@@ -1727,7 +1725,7 @@ static int tiva_i2c_initialize(struct tiva_i2c_priv_s *priv, uint32_t frequency)
   ret = tiva_configgpio(config->sda_pin);
   if (ret < 0)
     {
-      i2cvdbg("I2C%d: tiva_configgpio(%08x) failed: %d\n",
+      i2cinfo("I2C%d: tiva_configgpio(%08x) failed: %d\n",
               config->sda_pin, ret);
       tiva_configgpio(MKI2C_INPUT(config->scl_pin));
       return ret;
@@ -1760,7 +1758,7 @@ static int tiva_i2c_initialize(struct tiva_i2c_priv_s *priv, uint32_t frequency)
    */
 
 #ifndef CONFIG_I2C_POLLED
-  (void)irq_attach(config->irq, config->isr);
+  (void)irq_attach(config->irq, config->isr, NULL);
   up_enable_irq(config->irq);
 #endif
 
@@ -1779,7 +1777,7 @@ static int tiva_i2c_uninitialize(struct tiva_i2c_priv_s *priv)
 {
   uint32_t regval;
 
-  i2cvdbg("I2C%d: refs=%d\n", priv->config->devno, priv->refs);
+  i2cinfo("I2C%d: refs=%d\n", priv->config->devno, priv->refs);
 
   /* Disable I2C */
 
@@ -1823,7 +1821,7 @@ static void tiva_i2c_setclock(struct tiva_i2c_priv_s *priv, uint32_t frequency)
   uint32_t regval;
   uint32_t tmp;
 
-  i2cvdbg("I2C%d: frequency: %u\n", priv->config->devno, frequency);
+  i2cinfo("I2C%d: frequency: %u\n", priv->config->devno, frequency);
 
   /* Has the I2C bus frequency changed? */
 
@@ -1876,7 +1874,7 @@ static int tiva_i2c_transfer(struct i2c_master_s *dev, struct i2c_msg_s *msgv,
   int ret = OK;
 
   DEBUGASSERT(priv && priv->config && msgv && msgc > 0);
-  i2cvdbg("I2C%d: msgc=%d\n", priv->config->devno, msgc);
+  i2cinfo("I2C%d: msgc=%d\n", priv->config->devno, msgc);
 
   tiva_i2c_sem_wait(priv);   /* Ensure that address or flags don't change meanwhile */
 
@@ -1916,7 +1914,7 @@ static int tiva_i2c_transfer(struct i2c_master_s *dev, struct i2c_msg_s *msgv,
 
   if (tiva_i2c_sem_waitdone(priv) < 0)
     {
-      i2cdbg("I2C%d: ERROR: Timed out\n", priv->config->devno);
+      i2cerr("ERROR: I2C%d timed out\n", priv->config->devno);
       ret = -ETIMEDOUT;
     }
 #if 0 /* I2CM_CS_CLKTO */
@@ -1925,7 +1923,7 @@ static int tiva_i2c_transfer(struct i2c_master_s *dev, struct i2c_msg_s *msgv,
   else if ((priv->mstatus & (I2CM_CS_ERROR | I2CM_CS_ARBLST)) != 0)
 #endif
     {
-      i2cdbg("I2C%d: ERROR:  I2C error status: %08x\n",
+      i2cerr("ERROR: I2C%d I2C error status: %08x\n",
              priv->config->devno, priv->mstatus);
 
       if ((priv->mstatus & I2CM_CS_ARBLST) != 0)
@@ -1972,7 +1970,7 @@ static int tiva_i2c_transfer(struct i2c_master_s *dev, struct i2c_msg_s *msgv,
        * other bits are valid.
        */
 
-      i2cdbg("I2C%d: ERROR:  I2C still busy: %08x\n",
+      i2cerr("ERROR: I2C%d I2C still busy: %08x\n",
              priv->config->devno, regval);
 
       /* Reset and reinitialize the I2C hardware */
@@ -2027,7 +2025,7 @@ static int tiva_i2c_reset(FAR struct i2c_master_s * dev)
   int ret = ERROR;
 
   DEBUGASSERT(priv && priv->config);
-  i2cvdbg("I2C%d:\n", priv->config->devno);
+  i2cinfo("I2C%d:\n", priv->config->devno);
 
   /* Our caller must own a ref */
 
@@ -2144,7 +2142,7 @@ struct i2c_master_s *tiva_i2cbus_initialize(int port)
   const struct tiva_i2c_config_s *config;
   int flags;
 
-  i2cvdbg("I2C%d: Initialize\n", port);
+  i2cinfo("I2C%d: Initialize\n", port);
 
   /* Get I2C private structure */
 
@@ -2221,7 +2219,7 @@ struct i2c_master_s *tiva_i2cbus_initialize(int port)
 #endif
 
     default:
-      i2cdbg("I2C%d: ERROR: Not supported\n", port);
+      i2cerr("ERROR: I2C%d not supported\n", port);
       return NULL;
     }
 
@@ -2267,7 +2265,7 @@ int tiva_i2cbus_uninitialize(struct i2c_master_s *dev)
 
   DEBUGASSERT(priv && priv->config && priv->refs > 0);
 
-  i2cvdbg("I2C%d: Uninitialize\n", priv->config->devno);
+  i2cinfo("I2C%d: Uninitialize\n", priv->config->devno);
 
   /* Decrement reference count and check for underflow */
 
diff --git a/arch/arm/src/tiva/tiva_irq.c b/arch/arm/src/tiva/tiva_irq.c
index 67f8f1806020490de47f4c30dc6465fc90df2c0c..9099c54a2e9ea0d038cf3960da7c3f24e4658f52 100644
--- a/arch/arm/src/tiva/tiva_irq.c
+++ b/arch/arm/src/tiva/tiva_irq.c
@@ -107,71 +107,71 @@ extern uint32_t _vectors[];
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_IRQ)
+#if defined(CONFIG_DEBUG_IRQ_INFO)
 static void tiva_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
   flags = enter_critical_section();
-  lldbg("NVIC (%s, irq=%d):\n", msg, irq);
-  lldbg("  INTCTRL:    %08x VECTAB: %08x\n",
-        getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
+  irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
+  irqinfo("  INTCTRL:    %08x VECTAB: %08x\n",
+          getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
 #if 0
-  lldbg("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
-        getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
-        getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+  irqinfo("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+          getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
+          getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
 #endif
 
 #if NR_VECTORS < 64
-  lldbg("  IRQ ENABLE: %08x %08x\n",
-        getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE));
+  irqinfo("  IRQ ENABLE: %08x %08x\n",
+          getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE));
 #elif NR_VECTORS < 96
-  lldbg("  IRQ ENABLE: %08x %08x %08x\n",
-        getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
-        getreg32(NVIC_IRQ64_95_ENABLE));
+  irqinfo("  IRQ ENABLE: %08x %08x %08x\n",
+          getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
+          getreg32(NVIC_IRQ64_95_ENABLE));
 #elif NR_VECTORS < 128
-  lldbg("  IRQ ENABLE: %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
-        getreg32(NVIC_IRQ64_95_ENABLE), getreg32(NVIC_IRQ96_127_ENABLE));
+  irqinfo("  IRQ ENABLE: %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
+          getreg32(NVIC_IRQ64_95_ENABLE), getreg32(NVIC_IRQ96_127_ENABLE));
 #endif
 #if NR_VECTORS > 127
 #  warning Missing output
 #endif
 
-  lldbg("  SYSH_PRIO:  %08x %08x %08x\n",
-        getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
-        getreg32(NVIC_SYSH12_15_PRIORITY));
-  lldbg("  IRQ PRIO:   %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
-        getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
-        getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
-        getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+  irqinfo("  SYSH_PRIO:  %08x %08x %08x\n",
+          getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+          getreg32(NVIC_SYSH12_15_PRIORITY));
+  irqinfo("  IRQ PRIO:   %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
+          getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
+          getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
+          getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
 #if NR_VECTORS > 47
-  lldbg("              %08x %08x %08x %08x\n",
-        getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
-        getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+  irqinfo("              %08x %08x %08x %08x\n",
+          getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
+          getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
 #endif
 #if NR_VECTORS > 63
-  lldbg("              %08x %08x %08x %08x\n",
+  irqinfo("              %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
         getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
 #endif
 #if NR_VECTORS > 79
-  lldbg("              %08x %08x %08x %08x\n",
+  irqinfo("              %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ80_83_PRIORITY), getreg32(NVIC_IRQ84_87_PRIORITY),
         getreg32(NVIC_IRQ88_91_PRIORITY), getreg32(NVIC_IRQ92_95_PRIORITY));
 #endif
 #if NR_VECTORS > 95
-  lldbg("              %08x %08x %08x %08x\n",
+  irqinfo("              %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ96_99_PRIORITY), getreg32(NVIC_IRQ100_103_PRIORITY),
         getreg32(NVIC_IRQ104_107_PRIORITY), getreg32(NVIC_IRQ108_111_PRIORITY));
 #endif
 #if NR_VECTORS > 111
-  lldbg("              %08x %08x %08x %08x\n",
+  irqinfo("              %08x %08x %08x %08x\n",
         getreg32(NVIC_IRQ112_115_PRIORITY), getreg32(NVIC_IRQ116_119_PRIORITY),
         getreg32(NVIC_IRQ120_123_PRIORITY), getreg32(NVIC_IRQ124_127_PRIORITY));
 #endif
@@ -195,51 +195,51 @@ static void tiva_dumpnvic(const char *msg, int irq)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
-static int tiva_nmi(int irq, FAR void *context)
+#ifdef CONFIG_DEBUG_FEATURES
+static int tiva_nmi(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! NMI received\n");
+  _err("PANIC!!! NMI received\n");
   PANIC();
   return 0;
 }
 
-static int tiva_busfault(int irq, FAR void *context)
+static int tiva_busfault(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Bus fault recived\n");
+  _err("PANIC!!! Bus fault recived\n");
   PANIC();
   return 0;
 }
 
-static int tiva_usagefault(int irq, FAR void *context)
+static int tiva_usagefault(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Usage fault received\n");
+  _err("PANIC!!! Usage fault received\n");
   PANIC();
   return 0;
 }
 
-static int tiva_pendsv(int irq, FAR void *context)
+static int tiva_pendsv(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! PendSV received\n");
+  _err("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
 }
 
-static int tiva_dbgmonitor(int irq, FAR void *context)
+static int tiva_dbgmonitor(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Debug Monitor received\n");
+  _err("PANIC!!! Debug Monitor received\n");
   PANIC();
   return 0;
 }
 
-static int tiva_reserved(int irq, FAR void *context)
+static int tiva_reserved(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  dbg("PANIC!!! Reserved interrupt\n");
+  _err("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;
 }
@@ -451,8 +451,8 @@ void up_irqinitialize(void)
    * under certain conditions.
    */
 
-  irq_attach(TIVA_IRQ_SVCALL, up_svcall);
-  irq_attach(TIVA_IRQ_HARDFAULT, up_hardfault);
+  irq_attach(TIVA_IRQ_SVCALL, up_svcall, NULL);
+  irq_attach(TIVA_IRQ_HARDFAULT, up_hardfault, NULL);
 
   /* Set the priority of the SVCall interrupt */
 
@@ -468,22 +468,22 @@ void up_irqinitialize(void)
    */
 
 #ifdef CONFIG_ARM_MPU
-  irq_attach(TIVA_IRQ_MEMFAULT, up_memfault);
+  irq_attach(TIVA_IRQ_MEMFAULT, up_memfault, NULL);
   up_enable_irq(TIVA_IRQ_MEMFAULT);
 #endif
 
   /* Attach all other processor exceptions (except reset and sys tick) */
 
-#ifdef CONFIG_DEBUG
-  irq_attach(TIVA_IRQ_NMI, tiva_nmi);
+#ifdef CONFIG_DEBUG_FEATURES
+  irq_attach(TIVA_IRQ_NMI, tiva_nmi, NULL);
 #ifndef CONFIG_ARM_MPU
-  irq_attach(TIVA_IRQ_MEMFAULT, up_memfault);
+  irq_attach(TIVA_IRQ_MEMFAULT, up_memfault, NULL);
 #endif
-  irq_attach(TIVA_IRQ_BUSFAULT, tiva_busfault);
-  irq_attach(TIVA_IRQ_USAGEFAULT, tiva_usagefault);
-  irq_attach(TIVA_IRQ_PENDSV, tiva_pendsv);
-  irq_attach(TIVA_IRQ_DBGMONITOR, tiva_dbgmonitor);
-  irq_attach(TIVA_IRQ_RESERVED, tiva_reserved);
+  irq_attach(TIVA_IRQ_BUSFAULT, tiva_busfault, NULL);
+  irq_attach(TIVA_IRQ_USAGEFAULT, tiva_usagefault, NULL);
+  irq_attach(TIVA_IRQ_PENDSV, tiva_pendsv, NULL);
+  irq_attach(TIVA_IRQ_DBGMONITOR, tiva_dbgmonitor, NULL);
+  irq_attach(TIVA_IRQ_RESERVED, tiva_reserved, NULL);
 #endif
 
   tiva_dumpnvic("initial", NR_IRQS);
diff --git a/arch/arm/src/tiva/tiva_pwm.c b/arch/arm/src/tiva/tiva_pwm.c
new file mode 100644
index 0000000000000000000000000000000000000000..0e882f0f7c11ccfff7b3564d7ebd4babd1a2f1ec
--- /dev/null
+++ b/arch/arm/src/tiva/tiva_pwm.c
@@ -0,0 +1,865 @@
+/************************************************************************************
+ * arch/arm/src/tiva/tiva_pwm.c
+ *
+ *   Copyright (C) 2016 Young Mu. All rights reserved.
+ *   Author: Young Mu 
+ *
+ * The basic structure of this driver derives in spirit (if nothing more) from the
+ * NuttX SAM PWM driver which has:
+ *
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "up_arch.h"
+#include "tiva_gpio.h"
+#include "tiva_pwm.h"
+#include "tiva_enablepwr.h"
+#include "tiva_enableclks.h"
+
+#include "chip/tiva_pwm.h"
+#include "chip/tiva_pinmap.h"
+#include "chip/tm4c_memorymap.h"
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+
+uint32_t g_pwm_pinset[] =
+{
+  GPIO_M0_PWM0,
+  GPIO_M0_PWM1,
+  GPIO_M0_PWM2,
+  GPIO_M0_PWM3,
+  GPIO_M0_PWM4,
+  GPIO_M0_PWM5,
+  GPIO_M0_PWM6,
+  GPIO_M0_PWM7,
+};
+
+struct tiva_pwm_chan_s
+{
+  const struct pwm_ops_s *ops;
+  uint8_t controller_id;
+  uintptr_t controller_base;
+  uint8_t generator_id;
+  uintptr_t generator_base;
+  uint8_t channel_id;
+#ifdef CONFIG_PWM_PULSECOUNT
+  bool inited;
+  uint8_t irq;
+  uint32_t count;
+  uint32_t cur_count;
+  FAR void *handle;
+#endif
+};
+
+/************************************************************************************
+ * Private Function Prototypes
+ ************************************************************************************/
+
+#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN0)
+static int tiva_pwm_gen0_interrupt(int irq, FAR void *context, FAR void *arg);
+#endif
+
+#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN2)
+static int tiva_pwm_gen1_interrupt(int irq, FAR void *context, FAR void *arg);
+#endif
+
+#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN4)
+static int tiva_pwm_gen2_interrupt(int irq, FAR void *context, FAR void *arg);
+#endif
+
+#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN6)
+static int tiva_pwm_gen3_interrupt(int irq, FAR void *context, FAR void *arg);
+#endif
+
+#if defined(CONFIG_PWM_PULSECOUNT) && \
+    (defined(CONFIG_TIVA_PWM0_CHAN0) || defined(CONFIG_TIVA_PWM0_CHAN2) || \
+    defined(CONFIG_TIVA_PWM0_CHAN4) || defined(CONFIG_TIVA_PWM0_CHAN6))
+static int tiva_pwm_interrupt(struct tiva_pwm_chan_s *chan);
+#endif
+
+static inline void tiva_pwm_putreg(struct tiva_pwm_chan_s *chan,
+                                   unsigned int offset, uint32_t regval);
+static inline uint32_t tiva_pwm_getreg(struct tiva_pwm_chan_s *chan,
+                                       unsigned int offset);
+static inline int tiva_pwm_timer(FAR struct tiva_pwm_chan_s *chan,
+                                 FAR const struct pwm_info_s *info);
+
+static int tiva_pwm_setup(FAR struct pwm_lowerhalf_s *dev);
+static int tiva_pwm_shutdown(FAR struct pwm_lowerhalf_s *dev);
+#ifdef CONFIG_PWM_PULSECOUNT
+static int tiva_pwm_start(FAR struct pwm_lowerhalf_s *dev,
+                          FAR const struct pwm_info_s *info, FAR void *handle);
+#else
+static int tiva_pwm_start(FAR struct pwm_lowerhalf_s *dev,
+                          FAR const struct pwm_info_s *info);
+#endif
+static int tiva_pwm_stop(FAR struct pwm_lowerhalf_s *dev);
+static int tiva_pwm_ioctl(FAR struct pwm_lowerhalf_s *dev,
+                          int cmd, unsigned long arg);
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+static uint32_t g_pwm_freq = 1875000;
+static uint32_t g_pwm_counter = (1 << 16);
+
+static const struct pwm_ops_s g_pwm_ops =
+{
+  .setup    = tiva_pwm_setup,
+  .shutdown = tiva_pwm_shutdown,
+  .start    = tiva_pwm_start,
+  .stop     = tiva_pwm_stop,
+  .ioctl    = tiva_pwm_ioctl,
+};
+
+#ifdef CONFIG_TIVA_PWM0_CHAN0
+static struct tiva_pwm_chan_s g_pwm_chan0 =
+{
+  .ops             = &g_pwm_ops,
+  .controller_id   = 0,
+  .controller_base = TIVA_PWM0_BASE,
+  .generator_id    = 0,
+  .generator_base  = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 0,
+  .channel_id      = 0,
+#ifdef CONFIG_PWM_PULSECOUNT
+  .inited          = false,
+  .irq             = TIVA_IRQ_PWM0_GEN0,
+  .count           = 0,
+  .cur_count       = 0,
+  .handle          = NULL,
+#endif
+};
+#endif
+
+#ifdef CONFIG_TIVA_PWM0_CHAN1
+static struct tiva_pwm_chan_s g_pwm_chan1 =
+{
+  .ops             = &g_pwm_ops,
+  .controller_id   = 0,
+  .controller_base = TIVA_PWM0_BASE,
+  .generator_id    = 0,
+  .generator_base  = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 0,
+  .channel_id      = 1,
+#ifdef CONFIG_PWM_PULSECOUNT
+  .inited          = false,
+  .irq             = TIVA_IRQ_PWM0_GEN0,
+  .count           = 0,
+  .cur_count       = 0,
+  .handle          = NULL,
+#endif
+};
+#endif
+
+#ifdef CONFIG_TIVA_PWM0_CHAN2
+static struct tiva_pwm_chan_s g_pwm_chan2 =
+{
+  .ops             = &g_pwm_ops,
+  .controller_id   = 0,
+  .controller_base = TIVA_PWM0_BASE,
+  .generator_id    = 1,
+  .generator_base  = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 1,
+  .channel_id      = 2,
+#ifdef CONFIG_PWM_PULSECOUNT
+  .inited          = false,
+  .irq             = TIVA_IRQ_PWM0_GEN1,
+  .count           = 0,
+  .cur_count       = 0,
+  .handle          = NULL,
+#endif
+};
+#endif
+
+#ifdef CONFIG_TIVA_PWM0_CHAN3
+static struct tiva_pwm_chan_s g_pwm_chan3 =
+{
+  .ops             = &g_pwm_ops,
+  .controller_id   = 0,
+  .controller_base = TIVA_PWM0_BASE,
+  .generator_id    = 1,
+  .generator_base  = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 1,
+  .channel_id      = 3,
+#ifdef CONFIG_PWM_PULSECOUNT
+  .inited          = false,
+  .irq             = TIVA_IRQ_PWM0_GEN1,
+  .count           = 0,
+  .cur_count       = 0,
+  .handle          = NULL,
+#endif
+};
+#endif
+
+#ifdef CONFIG_TIVA_PWM0_CHAN4
+static struct tiva_pwm_chan_s g_pwm_chan4 =
+{
+  .ops             = &g_pwm_ops,
+  .controller_id   = 0,
+  .controller_base = TIVA_PWM0_BASE,
+  .generator_id    = 2,
+  .generator_base  = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 2,
+  .channel_id      = 4,
+#ifdef CONFIG_PWM_PULSECOUNT
+  .inited          = false,
+  .irq             = TIVA_IRQ_PWM0_GEN2,
+  .count           = 0,
+  .cur_count       = 0,
+  .handle          = NULL,
+#endif
+};
+#endif
+
+#ifdef CONFIG_TIVA_PWM0_CHAN5
+static struct tiva_pwm_chan_s g_pwm_chan5 =
+{
+  .ops             = &g_pwm_ops,
+  .controller_id   = 0,
+  .controller_base = TIVA_PWM0_BASE,
+  .generator_id    = 2,
+  .generator_base  = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 2,
+  .channel_id      = 5,
+#ifdef CONFIG_PWM_PULSECOUNT
+  .inited          = false,
+  .irq             = TIVA_IRQ_PWM0_GEN2,
+  .count           = 0,
+  .cur_count       = 0,
+  .handle          = NULL,
+#endif
+};
+#endif
+
+#ifdef CONFIG_TIVA_PWM0_CHAN6
+static struct tiva_pwm_chan_s g_pwm_chan6 =
+{
+  .ops             = &g_pwm_ops,
+  .controller_id   = 0,
+  .controller_base = TIVA_PWM0_BASE,
+  .generator_id    = 3,
+  .generator_base  = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 3,
+  .channel_id      = 6,
+#ifdef CONFIG_PWM_PULSECOUNT
+  .inited          = false,
+  .irq             = TIVA_IRQ_PWM0_GEN3,
+  .count           = 0,
+  .cur_count       = 0,
+  .handle          = NULL,
+#endif
+};
+#endif
+
+#ifdef CONFIG_TIVA_PWM0_CHAN7
+static struct tiva_pwm_chan_s g_pwm_chan7 =
+{
+  .ops             = &g_pwm_ops,
+  .controller_id   = 0,
+  .controller_base = TIVA_PWM0_BASE,
+  .generator_id    = 3,
+  .generator_base  = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 3,
+  .channel_id      = 7,
+#ifdef CONFIG_PWM_PULSECOUNT
+  .inited          = false,
+  .irq             = TIVA_IRQ_PWM0_GEN3,
+  .count           = 0,
+  .cur_count       = 0,
+  .handle          = NULL,
+#endif
+};
+#endif
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: tiva_pwm_gen[n]_interrupt
+ *
+ * Description:
+ *   Pulse count interrupt handlers for PWM[n]
+ *
+ ************************************************************************************/
+
+#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN0)
+static int tiva_pwm_gen0_interrupt(int irq, FAR void *context, FAR void *arg)
+{
+  return tiva_pwm_interrupt(&g_pwm_chan0);
+}
+#endif
+
+#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN2)
+static int tiva_pwm_gen1_interrupt(int irq, FAR void *context, FAR void *arg)
+{
+  return tiva_pwm_interrupt(&g_pwm_chan2);
+}
+#endif
+
+#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN4)
+static int tiva_pwm_gen2_interrupt(int irq, FAR void *context, FAR void *arg)
+{
+  return tiva_pwm_interrupt(&g_pwm_chan4);
+}
+#endif
+
+#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN6)
+static int tiva_pwm_gen3_interrupt(int irq, FAR void *context, FAR void *arg)
+{
+  return tiva_pwm_interrupt(&g_pwm_chan6);
+}
+#endif
+
+/************************************************************************************
+ * Name: tiva_pwm_interrupt
+ *
+ * Description:
+ *   Common pulse count interrupt handler.
+ *
+ ************************************************************************************/
+
+#if defined(CONFIG_PWM_PULSECOUNT) && \
+    (defined(CONFIG_TIVA_PWM0_CHAN0) || defined(CONFIG_TIVA_PWM0_CHAN2) || \
+    defined(CONFIG_TIVA_PWM0_CHAN4) || defined(CONFIG_TIVA_PWM0_CHAN6))
+static int tiva_pwm_interrupt(struct tiva_pwm_chan_s *chan)
+{
+  /* Clear interrupt */
+
+  tiva_pwm_putreg(chan, TIVA_PWMn_ISC_OFFSET, INT_SET << INTCMPAD);
+
+  /* Count down current pulse count */
+
+  chan->cur_count--;
+
+  /* Disable PWM generator and reload current pulse count */
+
+  if (chan->cur_count == 0)
+    {
+      tiva_pwm_putreg(chan, TIVA_PWMn_CTL_OFFSET, CTL_DISABLE << TIVA_PWMn_CTL_ENABLE);
+      chan->cur_count = chan->count;
+      pwm_expired(chan->handle);
+    }
+
+  return 0;
+}
+#endif
+
+/************************************************************************************
+ * Name: tiva_pwm_getreg
+ *
+ * Description:
+ *   Get a 32-bit register value by offset
+ *
+ ************************************************************************************/
+
+static inline uint32_t tiva_pwm_getreg(struct tiva_pwm_chan_s *chan,
+                                       unsigned int offset)
+{
+    uintptr_t regaddr = chan->generator_base + offset;
+    return getreg32(regaddr);
+}
+
+/************************************************************************************
+ * Name: tiva_pwm_putreg
+ *
+ * Description:
+ *  Put a 32-bit register value by offset
+ *
+ ************************************************************************************/
+
+static inline void tiva_pwm_putreg(struct tiva_pwm_chan_s *chan,
+                                   unsigned int offset, uint32_t regval)
+{
+    uintptr_t regaddr = chan->generator_base + offset;
+    putreg32(regval, regaddr);
+}
+
+/****************************************************************************
+ * Name: tiva_pwm_setup
+ *
+ * Description:
+ *   This method is called when the driver is opened.  The lower half driver
+ *   will be configured and initialized the device so that it is ready for
+ *   use.  It will not, however, output pulses until the start method is
+ *   called.
+ *
+ * Input parameters:
+ *   dev - A reference to the lower half PWM driver state structure
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int tiva_pwm_setup(FAR struct pwm_lowerhalf_s *dev)
+{
+  FAR struct tiva_pwm_chan_s *chan = (FAR struct tiva_pwm_chan_s *)dev;
+  pwminfo("setup PWM for channel %d\n", chan->channel_id);
+
+  /* Enable GPIO port, GPIO pin type and GPIO alternate function (refer to
+   * TM4C1294NC 23.4.2-4)
+   */
+
+  int ret = tiva_configgpio(g_pwm_pinset[chan->channel_id]);
+  if (ret < 0)
+    {
+      pwmerr("ERROR: tiva_configgpio failed (%x)\n",
+             g_pwm_pinset[chan->channel_id]);
+      return ret;
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: tiva_pwm_shutdown
+ *
+ * Description:
+ *   This method is called when the driver is closed.  The lower half driver
+ *   stop pulsed output, free any resources, disable the timer hardware, and
+ *   put the system into the lowest possible power usage state
+ *
+ * Input parameters:
+ *   dev - A reference to the lower half PWM driver state structure
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int tiva_pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
+{
+  FAR struct tiva_pwm_chan_s *chan = (FAR struct tiva_pwm_chan_s *)dev;
+  pwminfo("shutdown PWM for channel %d\n", chan->channel_id);
+
+  /* Remove unused-variable warning */
+
+  (void)chan;
+
+  /* Ensure the PWM channel has been stopped */
+
+  tiva_pwm_stop(dev);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: tiva_pwm_start
+ *
+ * Description:
+ *   (Re-)initialize the timer resources and start the pulsed output
+ *
+ * Input parameters:
+ *   dev  - A reference to the lower half PWM driver state structure
+ *   info - A reference to the characteristics of the pulsed output
+ *   handle - This is the handle that was provided to the lower-half
+ *            start() method.
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_PWM_PULSECOUNT
+static int tiva_pwm_start(FAR struct pwm_lowerhalf_s *dev,
+                          FAR const struct pwm_info_s *info, FAR void *handle)
+{
+  FAR struct tiva_pwm_chan_s *chan = (FAR struct tiva_pwm_chan_s *)dev;
+  pwminfo("start PWM for channel %d\n", chan->channel_id);
+
+  /* Save the handle */
+
+  chan->handle = handle;
+
+  /* Load pulse count and current pulse count
+   *
+   * Workaround:
+   *   Count should be add 1 for the first time
+   */
+
+  chan->count = info->count;
+  chan->cur_count = info->count;
+
+  if (!chan->inited)
+    {
+      chan->count++;
+      chan->cur_count++;
+      chan->inited = true;
+    }
+
+  /* Count 0 means to generate indefinite number of pulses */
+
+  if (info->count == 0)
+    {
+      pwm_expired(chan->handle);
+
+      /* Disable interrupt */
+
+      uint32_t enable = getreg32(chan->controller_base + TIVA_PWM_INTEN_OFFSET);
+      enable &= ~(INT_ENABLE << chan->generator_id);
+      putreg32(enable, chan->controller_base + TIVA_PWM_INTEN_OFFSET);
+    }
+  else
+    {
+      /* Enable interrupt */
+
+      uint32_t enable = getreg32(chan->controller_base + TIVA_PWM_INTEN_OFFSET);
+      enable |= (INT_ENABLE << chan->generator_id);
+      putreg32(enable, chan->controller_base + TIVA_PWM_INTEN_OFFSET);
+    }
+
+  /* Start the timer */
+
+  return tiva_pwm_timer(chan, info);
+}
+#else
+static int tiva_pwm_start(FAR struct pwm_lowerhalf_s *dev,
+                          FAR const struct pwm_info_s *info)
+{
+  FAR struct tiva_pwm_chan_s *chan = (FAR struct tiva_pwm_chan_s *)dev;
+  pwminfo("start PWM for channel %d\n", chan->channel_id);
+
+  /* Start the timer */
+
+  return tiva_pwm_timer(chan, info);
+}
+#endif
+
+/****************************************************************************
+ * Name: tiva_pwm_timer
+ *
+ * Description:
+ *   Configure PWM registers and start the PWM timer
+ *
+ * Input parameters:
+ *   dev  - A reference to the lower half PWM driver state structure
+ *   info - A reference to the characteristics of the pulsed output
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static inline int tiva_pwm_timer(FAR struct tiva_pwm_chan_s *chan,
+                                 FAR const struct pwm_info_s *info)
+{
+  uint16_t duty = info->duty;
+  uint32_t frequency = info->frequency;
+
+  pwminfo("> frequency = %d\n", frequency);
+  pwminfo("> duty = %d\n", duty);
+
+  /* Configure PWM countdown mode (refer to TM4C1294NC 23.4.6) */
+
+  tiva_pwm_putreg(chan, TIVA_PWMn_CTL_OFFSET, 0);
+  if (chan->channel_id % 2 == 0)
+    {
+      tiva_pwm_putreg(chan, TIVA_PWMn_GENA_OFFSET,
+                      GENx_LOW << TIVA_PWMn_GENx_ACTCMPAD |
+                      GENx_HIGH << TIVA_PWMn_GENx_ACTLOAD);
+    }
+  else
+    {
+      tiva_pwm_putreg(chan, TIVA_PWMn_GENB_OFFSET,
+                      GENx_LOW << TIVA_PWMn_GENx_ACTCMPBD |
+                      GENx_HIGH << TIVA_PWMn_GENx_ACTLOAD);
+    }
+
+  /* Set the PWM period (refer to TM4C1294NC 23.4.7) */
+
+  uint32_t pwm_min_freq = (uint32_t)(g_pwm_freq / g_pwm_counter) + 1;
+  uint32_t pwm_max_freq = g_pwm_freq;
+  uint32_t load = (uint32_t)(g_pwm_freq / frequency);
+
+  pwminfo("> load = %u (%08x)\n", load, load);
+
+  if (load >= g_pwm_counter || load < 1)
+    {
+      pwmerr("ERROR: frequency should be in [%d, %d] Hz\n",
+              pwm_min_freq, pwm_max_freq);
+      return -ERANGE;
+    }
+
+  tiva_pwm_putreg(chan, TIVA_PWMn_LOAD_OFFSET, load - 1);
+
+  /* Configure PWM duty (refer to TM4C1294NC 23.4.8-9)
+   *
+   * Workaround:
+   *   When comp equals to load, the signal is never pulled down,
+   *   so let comp equals to (comp-1)
+   */
+
+  uint32_t comp = (uint32_t)((1 - (float)duty / g_pwm_counter) * load);
+  comp = (duty == 0) ? (comp - 1) : (comp);
+  pwminfo("> comp = %u (%08x)\n", comp, comp);
+
+  if (chan->channel_id % 2 == 0)
+    {
+      tiva_pwm_putreg(chan, TIVA_PWMn_CMPA_OFFSET, comp - 1);
+    }
+  else
+    {
+      tiva_pwm_putreg(chan, TIVA_PWMn_CMPB_OFFSET, comp - 1);
+    }
+
+  /* Enable the PWM generator (refer to TM4C1294NC 23.4.10) */
+
+  tiva_pwm_putreg(chan, TIVA_PWMn_CTL_OFFSET, CTL_ENABLE << TIVA_PWMn_CTL_ENABLE);
+
+  /* Enable PWM channel (refer to TM4C1294NC 23.4.11) */
+
+  uint32_t enable = getreg32(chan->controller_base + TIVA_PWM_ENABLE_OFFSET);
+  enable |= (1 << chan->channel_id);
+  putreg32(enable, chan->controller_base + TIVA_PWM_ENABLE_OFFSET);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: tiva_pwm_stop
+ *
+ * Description:
+ *   Stop the pulsed output and reset the timer resources
+ *
+ * Input parameters:
+ *   dev - A reference to the lower half PWM driver state structure
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ * Assumptions:
+ *   This function is called to stop the pulsed output at anytime.  This
+ *   method is also called from the timer interrupt handler when a repetition
+ *   count expires... automatically stopping the timer.
+ *
+ ****************************************************************************/
+
+static int tiva_pwm_stop(FAR struct pwm_lowerhalf_s *dev)
+{
+  FAR struct tiva_pwm_chan_s *chan = (FAR struct tiva_pwm_chan_s *)dev;
+  pwminfo("stop PWM for channel %d\n", chan->channel_id);
+
+  /* Disable PWM channel */
+
+  uint32_t value = getreg32(chan->controller_base + TIVA_PWM_ENABLE_OFFSET);
+  value &= ~(1 << chan->channel_id);
+  putreg32(value, chan->controller_base + TIVA_PWM_ENABLE_OFFSET);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: tiva_pwm_ioctl
+ *
+ * Description:
+ *   Lower-half logic may support platform-specific ioctl commands
+ *
+ * Input parameters:
+ *   dev - A reference to the lower half PWM driver state structure
+ *   cmd - The ioctl command
+ *   arg - The argument accompanying the ioctl command
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int tiva_pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd,
+                          unsigned long arg)
+{
+  FAR struct tiva_pwm_chan_s *chan = (FAR struct tiva_pwm_chan_s *)dev;
+  pwminfo("ioctl PWM for channel %d\n", chan->channel_id);
+
+  /* Remove unused-variable warning */
+
+  (void)chan;
+
+  /* There are no platform-specific ioctl commands */
+
+  return -ENOTTY;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: tiva_pwm_initialize
+ *
+ * Description:
+ *   Initialize one PWM channel for use with the upper_level PWM driver.
+ *
+ * Input Parameters:
+ *   channel - A number identifying the PWM channel use.
+ *
+ * Returned Value:
+ *   On success, a pointer to the SAMA5 lower half PWM driver is returned.
+ *   NULL is returned on any failure.
+ *
+ ****************************************************************************/
+
+FAR struct pwm_lowerhalf_s *tiva_pwm_initialize(int channel)
+{
+  assert(channel >= 0 && channel <= 7);
+  FAR struct tiva_pwm_chan_s *chan;
+
+  switch (channel)
+    {
+#ifdef CONFIG_TIVA_PWM0_CHAN0
+    case 0:
+      chan = &g_pwm_chan0;
+      break;
+#endif
+
+#ifdef CONFIG_TIVA_PWM0_CHAN1
+    case 1:
+      chan = &g_pwm_chan1;
+      break;
+#endif
+
+#ifdef CONFIG_TIVA_PWM0_CHAN2
+    case 2:
+      chan = &g_pwm_chan2;
+      break;
+#endif
+
+#ifdef CONFIG_TIVA_PWM0_CHAN3
+    case 3:
+      chan = &g_pwm_chan3;
+      break;
+#endif
+
+#ifdef CONFIG_TIVA_PWM0_CHAN4
+    case 4:
+      chan = &g_pwm_chan4;
+      break;
+#endif
+
+#ifdef CONFIG_TIVA_PWM0_CHAN5
+    case 5:
+      chan = &g_pwm_chan5;
+      break;
+#endif
+
+#ifdef CONFIG_TIVA_PWM0_CHAN6
+    case 6:
+      chan = &g_pwm_chan6;
+      break;
+#endif
+
+#ifdef CONFIG_TIVA_PWM0_CHAN7
+    case 7:
+      chan = &g_pwm_chan7;
+      break;
+#endif
+
+    default:
+      pwmerr("ERROR: invalid channel %d\n", channel);
+      return NULL;
+    }
+
+  pwminfo("channel %d:\n", channel);
+  pwminfo("> channel_id = %d\n", chan->channel_id);
+  pwminfo("> controller_id = %d\n", chan->controller_id);
+  pwminfo("> controller_base = %08x\n", chan->controller_base);
+  pwminfo("> generator_id = %d\n", chan->generator_id);
+  pwminfo("> generator_base = %08x\n", chan->generator_base);
+
+  /* Enable PWM controller (refer to TM4C1294NC 23.4.1) */
+
+  assert(chan->controller_id == 0);
+  tiva_pwm_enablepwr(chan->controller_id);
+  tiva_pwm_enableclk(chan->controller_id);
+
+  /* Configure PWM Clock Configuration (refer to TM4C1294NC 23.4.5)
+   *
+   * On TM4C1294NC, configure the PWM clock source as 1.875MHz (the system
+   * clock 120MHz divided by 64)
+   *
+   * TODO: need an algorithm to choose the best divider and load value combo.
+   */
+
+  putreg32(CC_USEPWM << TIVA_PWM_CC_USEPWM | CC_PWMDIV_64 << TIVA_PWM_CC_PWMDIV,
+           chan->controller_base + TIVA_PWM_CC);
+
+#ifdef CONFIG_PWM_PULSECOUNT
+
+  /* Enable interrupt INTCMPAD mode */
+
+  tiva_pwm_putreg(chan, TIVA_PWMn_INTEN_OFFSET, INT_SET << INTCMPAD);
+
+  /* Attach IRQ handler and enable interrupt*/
+
+  switch (chan->channel_id)
+    {
+#ifdef CONFIG_TIVA_PWM0_CHAN0
+      case 0:
+        irq_attach(chan->irq, tiva_pwm_gen0_interrupt, NULL);
+        up_enable_irq(chan->irq);
+        break;
+#endif
+
+#ifdef CONFIG_TIVA_PWM0_CHAN2
+      case 2:
+        irq_attach(chan->irq, tiva_pwm_gen1_interrupt, NULL);
+        up_enable_irq(chan->irq);
+        break;
+#endif
+
+#ifdef CONFIG_TIVA_PWM0_CHAN4
+      case 4:
+        irq_attach(chan->irq, tiva_pwm_gen2_interrupt, NULL);
+        up_enable_irq(chan->irq);
+        break;
+#endif
+
+#ifdef CONFIG_TIVA_PWM0_CHAN6
+      case 6:
+        irq_attach(chan->irq, tiva_pwm_gen3_interrupt, NULL);
+        up_enable_irq(chan->irq);
+        break;
+#endif
+    }
+
+#endif
+
+  return (FAR struct pwm_lowerhalf_s *)chan;
+}
diff --git a/arch/arm/src/tiva/tiva_pwm.h b/arch/arm/src/tiva/tiva_pwm.h
new file mode 100644
index 0000000000000000000000000000000000000000..c60b37617b2566b7dae1afc6b5c1467655a04d80
--- /dev/null
+++ b/arch/arm/src/tiva/tiva_pwm.h
@@ -0,0 +1,52 @@
+/************************************************************************************
+ * arch/arm/src/tiva/tiva_pwm.h
+ *
+ *   Copyright (C) 2016 Young Mu. All rights reserved.
+ *   Author: Young Mu 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_TIVA_TIVA_PWM_H
+#define __ARCH_ARM_SRC_TIVA_TIVA_PWM_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+FAR struct pwm_lowerhalf_s *tiva_pwm_initialize(int channel);
+void tm4c_pwm_register(int channel);
+
+#endif /* __ARCH_ARM_SRC_TIVA_TIVA_PWM_H */
diff --git a/arch/arm/src/tiva/tiva_qencoder.c b/arch/arm/src/tiva/tiva_qencoder.c
new file mode 100644
index 0000000000000000000000000000000000000000..b25f6dce183f4c4896a9edb1b91bdcefde73aa44
--- /dev/null
+++ b/arch/arm/src/tiva/tiva_qencoder.c
@@ -0,0 +1,536 @@
+/************************************************************************************
+ * arch/arm/src/tiva/tiva_qencoder.c
+ *
+ *   Copyright (C) 2016 Young Mu. All rights reserved.
+ *   Author: Young Mu 
+ *
+ * The basic structure of this driver derives in spirit (if nothing more)
+ * from the NuttX STM32 QEI driver which has:
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            Diego Sanchez 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "up_arch.h"
+#include "tiva_gpio.h"
+#include "tiva_qencoder.h"
+#include "tiva_enablepwr.h"
+#include "tiva_enableclks.h"
+
+#include "chip/tiva_qencoder.h"
+#include "chip/tiva_pinmap.h"
+#include "chip/tm4c_memorymap.h"
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+
+struct tiva_qe_s
+{
+  const struct qe_ops_s *ops;
+  uint8_t id;
+  uintptr_t base;
+  uint32_t idx;
+  uint32_t pha;
+  uint32_t phb;
+  uint32_t maxpos;
+};
+
+/************************************************************************************
+ * Private Function Prototypes
+ ************************************************************************************/
+
+static inline void tiva_qe_putreg(struct tiva_qe_s *qe, unsigned int offset,
+                                  uint32_t regval);
+static inline uint32_t tiva_qe_getreg(struct tiva_qe_s *qe,
+                                      unsigned int offset);
+
+static int tiva_qe_setup(FAR struct qe_lowerhalf_s *lower);
+static int tiva_qe_shutdown(FAR struct qe_lowerhalf_s *lower);
+static int tiva_qe_position(FAR struct qe_lowerhalf_s *lower,
+                            FAR int32_t *pos);
+static int tiva_qe_reset(FAR struct qe_lowerhalf_s *lower);
+static int tiva_qe_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd,
+                         unsigned long arg);
+
+static int tiva_qe_direction(struct tiva_qe_s *qe, unsigned long *dir);
+static int tiva_qe_velocity(struct tiva_qe_s *qe, unsigned long *vel);
+static int tiva_qe_ppr(struct tiva_qe_s *qe, unsigned long ppr);
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+static const struct qe_ops_s g_qe_ops =
+{
+  .setup    = tiva_qe_setup,
+  .shutdown = tiva_qe_shutdown,
+  .position = tiva_qe_position,
+  .reset    = tiva_qe_reset,
+  .ioctl    = tiva_qe_ioctl,
+};
+
+#ifdef CONFIG_TIVA_QEI0
+static struct tiva_qe_s g_qe0 =
+{
+  .ops      = &g_qe_ops,
+  .id       = 0,
+  .base     = TIVA_QEI0_BASE,
+  .idx      = GPIO_QEI0_IDX,
+  .pha      = GPIO_QEI0_PHA,
+  .phb      = GPIO_QEI0_PHB,
+  .maxpos   = 0,
+};
+#endif
+
+#ifdef CONFIG_TIVA_QEI1
+static struct tiva_qe_s g_qe1 =
+{
+  .ops      = &g_qe_ops,
+  .id       = 1,
+  .base     = TIVA_QEI1_BASE,
+  .idx      = GPIO_QEI1_IDX,
+  .pha      = GPIO_QEI1_PHA,
+  .phb      = GPIO_QEI1_PHB,
+  .maxpos   = 0,
+};
+#endif
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: tiva_qe_getreg
+ *
+ * Description:
+ *   Get a 32-bit register value by offset
+ *
+ ************************************************************************************/
+
+static inline uint32_t tiva_qe_getreg(struct tiva_qe_s *qe, unsigned int offset)
+{
+  uintptr_t regaddr = qe->base + offset;
+  return getreg32(regaddr);
+}
+
+/************************************************************************************
+ * Name: tiva_qe_putreg
+ *
+ * Description:
+ *  Put a 32-bit register value by offset
+ *
+ ************************************************************************************/
+
+static inline void tiva_qe_putreg(struct tiva_qe_s *qe, unsigned int offset,
+                                  uint32_t regval)
+{
+  uintptr_t regaddr = qe->base + offset;
+  putreg32(regval, regaddr);
+}
+
+/****************************************************************************
+ * Name: qe_setup
+ *
+ * Description:
+ *   This method is called when the driver is opened.  The lower half driver
+ *   will be configured and initialized the device so that it is ready for
+ *   use.  It will not, however, output pulses until the start method is
+ *   called.
+ *
+ * Input parameters:
+ *   lower - A reference to the lower half QEI driver state structure
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int tiva_qe_setup(FAR struct qe_lowerhalf_s *lower)
+{
+  uint32_t ctlreg = 0;
+  FAR struct tiva_qe_s *qe = (FAR struct tiva_qe_s *)lower;
+  int ret;
+
+  sninfo("setup QEI %d\n", qe->id);
+
+  /* Enable GPIO port, GPIO pin type and GPIO alternate function */
+
+  ret = tiva_configgpio(qe->idx);
+  if (ret < 0)
+    {
+      snerr("ERROR: tiva_configgpio failed (%x)\n", qe->idx);
+      return -1;
+    }
+
+  ret = tiva_configgpio(qe->pha);
+  if (ret < 0)
+    {
+      snerr("ERROR: tiva_configgpio failed (%x)\n", qe->pha);
+      return -1;
+    }
+
+  ret = tiva_configgpio(qe->phb);
+  if (ret < 0)
+    {
+      snerr("ERROR: tiva_configgpio failed (%x)\n", qe->phb);
+      return -1;
+    }
+
+  /* Set reset mode (default as INDEX_PULSE) */
+
+  ctlreg = RESMODE_BY_INDEX_PULSE << TIVA_QEI_CTL_RESMODE;
+  tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
+
+  /* Set capture mode (default as PHA_AND_PHB) */
+
+  ctlreg = tiva_qe_getreg(qe, TIVA_QEI_CTL_OFFSET);
+  ctlreg |= CAPMODE_PHA_AND_PHB << TIVA_QEI_CTL_CAPMODE;
+  tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
+
+  /* Enable velocity capture */
+
+  ctlreg = tiva_qe_getreg(qe, TIVA_QEI_CTL_OFFSET);
+  ctlreg |= VELEN_ENABLE << TIVA_QEI_CTL_VELEN;
+  tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
+
+  /* Set prediv (1) */
+
+  ctlreg = tiva_qe_getreg(qe, TIVA_QEI_CTL_OFFSET);
+  ctlreg |= VELDIV_1 << TIVA_QEI_CTL_VELDIV;
+  tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
+
+  /* Set period load (10ms for TM4C1294NC) */
+
+  tiva_qe_putreg(qe, TIVA_QEI_LOAD_OFFSET, 1200000);
+
+  /* Enable the QEI */
+
+  ctlreg = tiva_qe_getreg(qe, TIVA_QEI_CTL_OFFSET);
+  ctlreg |= QEI_ENABLE << TIVA_QEI_CTL_ENABLE;
+  tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: qe_shutdown
+ *
+ * Description:
+ *   This method is called when the driver is closed.  The lower half driver
+ *   stop data collection, free any resources, disable the timer hardware, and
+ *   put the system into the lowest possible power usage state
+ *
+ * Input parameters:
+ *   lower - A reference to the lower half QEI driver state structure
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int tiva_qe_shutdown(FAR struct qe_lowerhalf_s *lower)
+{
+  FAR struct tiva_qe_s *qe = (FAR struct tiva_qe_s *)lower;
+
+  sninfo("shutdown QEI %d\n", qe->id);
+
+  /* Disable the QEI */
+
+  tiva_qe_putreg(qe, TIVA_SYSCON_SRQEI_OFFSET, SYSCON_SRQEI(qe->id));
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: tiva_qe_reset
+ *
+ * Description:
+ *   Reset the position measurement to zero.
+ *
+ * Input parameters:
+ *   lower - A reference to the lower half QEI driver state structure
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int tiva_qe_reset(FAR struct qe_lowerhalf_s *lower)
+{
+  FAR struct tiva_qe_s *qe = (FAR struct tiva_qe_s *)lower;
+
+  sninfo("reset QEI %d\n", qe->id);
+
+  tiva_qe_putreg(qe, TIVA_QEI_POS_OFFSET, 0);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: tiva_qe_position
+ *
+ * Description:
+ *   Return the position mesaured by QEI.
+ *
+ * Input parameters:
+ *   lower - A reference to the lower half QEI driver state structure
+ *   pos - pointer to the position returned
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int tiva_qe_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos)
+{
+  FAR struct tiva_qe_s *qe = (FAR struct tiva_qe_s *)lower;
+
+  sninfo("get position of QEI %d\n", qe->id);
+
+  *pos = (int32_t) tiva_qe_getreg(qe, TIVA_QEI_POS_OFFSET);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: tiva_qe_ioctl
+ *
+ * Description:
+ *   Lower-half logic may support platform-specific ioctl commands
+ *
+ * Input parameters:
+ *   lower - A reference to the lower half QEI driver state structure
+ *   cmd - The ioctl command
+ *   arg - The argument accompanying the ioctl command
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int tiva_qe_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd,
+                         unsigned long arg)
+{
+  FAR struct tiva_qe_s *qe = (FAR struct tiva_qe_s *)lower;
+
+  sninfo("ioctl QEI %d\n", qe->id);
+
+  switch (cmd)
+    {
+    case QEIOC_DIRECTION:
+      tiva_qe_direction(qe, (unsigned long *)arg);
+      break;
+
+    case QEIOC_VELOCITY:
+      tiva_qe_velocity(qe, (unsigned long *)arg);
+      break;
+
+    case QEIOC_PPR:
+      tiva_qe_ppr(qe, arg);
+      break;
+
+    default:
+      snerr("ERROR: invalid cmd %x\n", cmd);
+      break;
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: tiva_qe_direction
+ *
+ * Description:
+ *   Return the direction mesaured by QEI.
+ *
+ * Input parameters:
+ *   qe - A reference to the TIVA QEI structure
+ *   dir - pointer to the direction returned
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int tiva_qe_direction(FAR struct tiva_qe_s *qe, unsigned long *dir)
+{
+  sninfo("get direction of QEI %d\n", qe->id);
+
+  uint32_t statreg;
+  statreg = tiva_qe_getreg(qe, TIVA_QEI_STAT_OFFSET);
+
+  int32_t dirbit;
+  dirbit =
+    (statreg & (1 << TIVA_QEI_STAT_DIRECTION)) == DIRECTION_FORWARD ? 1 : -1;
+
+  *dir = dirbit;
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: tiva_qe_direction
+ *
+ * Description:
+ *   Return the velocity (A/B pulses per second) mesaured by QEI.
+ *
+ * Input parameters:
+ *   qe - A reference to the TIVA QEI structure
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int tiva_qe_velocity(FAR struct tiva_qe_s *qe, unsigned long *vel)
+{
+  sninfo("get direction of QEI %d\n", qe->id);
+
+  *vel = (int32_t) tiva_qe_getreg(qe, TIVA_QEI_SPEED_OFFSET) * 100 / 4;
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: tiva_qe_ppr
+ *
+ * Description:
+ *   Set reset mode as MAXPOS and also set maxpos value
+ *
+ * Input parameters:
+ *   qe - A reference to the TIVA QEI structure
+ *   ppr - pulses per round of encoder
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int tiva_qe_ppr(FAR struct tiva_qe_s *qe, unsigned long ppr)
+{
+  sninfo("set maxpos reset mode and maxpos value of QEI %d\n", qe->id);
+
+  FAR struct qe_lowerhalf_s *lower;
+  uint32_t ctlreg = 0;
+
+  /* Disable the QEI */
+
+  lower = (FAR struct qe_lowerhalf_s *)qe;
+  tiva_qe_shutdown(lower);
+
+  /* maxpos is 4 times of ppr since we set capture mode as PHA_AND_PHB */
+
+  qe->maxpos = ppr * 4;
+
+  /* Set reset mode as MAXPOS */
+
+  ctlreg = tiva_qe_getreg(qe, TIVA_QEI_CTL_OFFSET);
+  ctlreg &= ~(uint32_t)(1 << TIVA_QEI_CTL_RESMODE);
+  ctlreg |= RESMODE_BY_MAXPOS << TIVA_QEI_CTL_RESMODE;
+  tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
+
+  /* Set maxpos value */
+
+  tiva_qe_putreg(qe, TIVA_QEI_MAXPOS_OFFSET, qe->maxpos);
+
+  /* Enable the QEI */
+
+  ctlreg = tiva_qe_getreg(qe, TIVA_QEI_CTL_OFFSET);
+  ctlreg |= QEI_ENABLE << TIVA_QEI_CTL_ENABLE;
+  tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
+
+  return OK;
+}
+
+/************************************************************************************
+ * Name: tiva_qei_initialize
+ *
+ * Description:
+ *   Enable power and clock for quadrature encoder interface. This function
+ *   must be called from board-specific logic.
+ *
+ * Input Parameters:
+ *   id - A number identifying certain QEI.
+ *
+ * Returned Value:
+ *   On success, a pointer to the lower half QEI driver is returned.
+ *   NULL is returned on any failure.
+ *
+ ************************************************************************************/
+
+FAR struct qe_lowerhalf_s *tiva_qei_initialize(int id)
+{
+  FAR struct tiva_qe_s *qe;
+  FAR struct qe_lowerhalf_s *lower;
+
+  switch (id)
+    {
+#ifdef CONFIG_TIVA_QEI0
+    case 0:
+      qe = &g_qe0;
+      break;
+#endif
+
+#ifdef CONFIG_TIVA_QEI1
+    case 1:
+      qe = &g_qe1;
+      break;
+#endif
+
+    default:
+      snerr("ERROR: invalid QEI %d\n", id);
+      return NULL;
+    }
+
+  /* Enable QEI clock */
+
+  tiva_qei_enablepwr(qe->id);
+  tiva_qei_enableclk(qe->id);
+
+  /* Make sure that the QEI enable bit has been cleared */
+
+  lower = (FAR struct qe_lowerhalf_s *)qe;
+  tiva_qe_shutdown(lower);
+
+  return lower;
+}
diff --git a/arch/arm/src/tiva/tiva_qencoder.h b/arch/arm/src/tiva/tiva_qencoder.h
new file mode 100644
index 0000000000000000000000000000000000000000..828eaba3522b3dc53e656c81d64fb3d0228c02fd
--- /dev/null
+++ b/arch/arm/src/tiva/tiva_qencoder.h
@@ -0,0 +1,59 @@
+/************************************************************************************
+* arch/arm/src/tiva/tiva_qencoder.h
+*
+*   Copyright (C) 2016 Young Mu. All rights reserved.
+*   Author: Young Mu 
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* 1. Redistributions of source code must retain the above copyright
+*    notice, this list of conditions and the following disclaimer.
+* 2. Redistributions in binary form must reproduce the above copyright
+*    notice, this list of conditions and the following disclaimer in
+*    the documentation and/or other materials provided with the
+*    distribution.
+* 3. Neither the name NuttX nor the names of its contributors may be
+*    used to endorse or promote products derived from this software
+*    without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+*
+************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_TIVA_TIVA_QENCODER_H
+#define __ARCH_ARM_SRC_TIVA_TIVA_QENCODER_H
+
+/************************************************************************************
+* Included Files
+************************************************************************************/
+
+#include 
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#define QEIOC_DIRECTION     _QEIOC(QE_TIVA_FIRST)
+#define QEIOC_VELOCITY      _QEIOC(QE_TIVA_FIRST+1)
+#define QEIOC_PPR           _QEIOC(QE_TIVA_FIRST+2)
+
+/****************************************************************************
+* Public Function Prototypes
+****************************************************************************/
+
+FAR struct qe_lowerhalf_s *tiva_qei_initialize(int id);
+
+#endif /* __ARCH_ARM_SRC_TIVA_TIVA_QENCODER_H */
diff --git a/arch/arm/src/tiva/tiva_serial.c b/arch/arm/src/tiva/tiva_serial.c
index fb9ea3ee61aac155eb38b15a7552bf1430f91808..da2aedf70f47f5cf56aa32ebe34b18fb2f7163da 100644
--- a/arch/arm/src/tiva/tiva_serial.c
+++ b/arch/arm/src/tiva/tiva_serial.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/tiva/tiva_serial.c
  *
- *   Copyright (C) 2009-2010, 2012-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009-2010, 2012-2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -109,13 +109,16 @@
 #    define UART4_ASSIGNED      1
 #elif defined(CONFIG_UART5_SERIAL_CONSOLE)
 #    define CONSOLE_DEV         g_uart5port /* UART5 is console */
-#    define TTYS5_DEV           g_uart5port /* UART5 is ttyS0 */
+#    define TTYS0_DEV           g_uart5port /* UART5 is ttyS0 */
+#    define UART5_ASSIGNED      1
 #elif defined(CONFIG_UART6_SERIAL_CONSOLE)
 #    define CONSOLE_DEV         g_uart6port /* UART6 is console */
-#    define TTYS5_DEV           g_uart6port /* UART6 is ttyS0 */
+#    define TTYS0_DEV           g_uart6port /* UART6 is ttyS0 */
+#    define UART6_ASSIGNED      1
 #elif defined(CONFIG_UART7_SERIAL_CONSOLE)
 #    define CONSOLE_DEV         g_uart7port /* UART7 is console */
-#    define TTYS5_DEV           g_uart7port /* UART7 is ttyS0 */
+#    define TTYS0_DEV           g_uart7port /* UART7 is ttyS0 */
+#    define UART7_ASSIGNED      1
 #else
 #  undef CONSOLE_DEV                        /* No console */
 #  if defined(CONFIG_TIVA_UART0)
@@ -302,13 +305,13 @@
 
 struct up_dev_s
 {
-  uint32_t uartbase; /* Base address of UART registers */
-  uint32_t baud;     /* Configured baud */
-  uint32_t im;       /* Saved IM value */
-  uint8_t  irq;      /* IRQ associated with this UART */
-  uint8_t  parity;   /* 0=none, 1=odd, 2=even */
-  uint8_t  bits;     /* Number of bits (7 or 8) */
-  bool    stopbits2; /* true: Configure with 2 stop bits instead of 1 */
+  uint32_t uartbase;  /* Base address of UART registers */
+  uint32_t baud;      /* Configured baud */
+  uint32_t im;        /* Saved IM value */
+  uint8_t  irq;       /* IRQ associated with this UART */
+  uint8_t  parity;    /* 0=none, 1=odd, 2=even */
+  uint8_t  bits;      /* Number of bits (7 or 8) */
+  bool     stopbits2; /* true: Configure with 2 stop bits instead of 1 */
 };
 
 /****************************************************************************
@@ -319,7 +322,7 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-static int  up_interrupt(int irq, void *context);
+static int  up_interrupt(int irq, void *context, void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  up_receive(struct uart_dev_s *dev, uint32_t *status);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
@@ -900,7 +903,7 @@ static int up_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, up_interrupt);
+  ret = irq_attach(priv->irq, up_interrupt, dev);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
@@ -943,74 +946,15 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_interrupt(int irq, void *context)
+static int up_interrupt(int irq, void *context, void *arg)
 {
-  struct uart_dev_s *dev = NULL;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct up_dev_s   *priv;
   uint32_t           mis;
   int                passes;
   bool               handled;
 
-#ifdef CONFIG_TIVA_UART0
-  if (g_uart0priv.irq == irq)
-    {
-      dev = &g_uart0port;
-    }
-  else
-#endif
-#ifdef CONFIG_TIVA_UART1
-  if (g_uart1priv.irq == irq)
-    {
-      dev = &g_uart1port;
-    }
-  else
-#endif
-#ifdef CONFIG_TIVA_UART2
-  if (g_uart2priv.irq == irq)
-    {
-      dev = &g_uart2port;
-    }
-  else
-#endif
-#ifdef CONFIG_TIVA_UART3
-  if (g_uart3priv.irq == irq)
-    {
-      dev = &g_uart3port;
-    }
-  else
-#endif
-#ifdef CONFIG_TIVA_UART4
-  if (g_uart4priv.irq == irq)
-    {
-      dev = &g_uart4port;
-    }
-  else
-#endif
-#ifdef CONFIG_TIVA_UART5
-  if (g_uart5priv.irq == irq)
-    {
-      dev = &g_uart5port;
-    }
-  else
-#endif
-#ifdef CONFIG_TIVA_UART6
-  if (g_uart6priv.irq == irq)
-    {
-      dev = &g_uart6port;
-    }
-  else
-#endif
-#ifdef CONFIG_TIVA_UART7
-  if (g_uart7priv.irq == irq)
-    {
-      dev = &g_uart7port;
-    }
-  else
-#endif
-    {
-      PANIC();
-    }
-
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct up_dev_s *)dev->priv;
 
   /* Loop until there are no characters to be transferred or,
diff --git a/arch/arm/src/tiva/tiva_ssi.c b/arch/arm/src/tiva/tiva_ssi.c
index 6870b9eb374b2a9ad3efd91c10817763e83c1fa0..709850e01a8fe24c78d52830e7e137c87871309c 100644
--- a/arch/arm/src/tiva/tiva_ssi.c
+++ b/arch/arm/src/tiva/tiva_ssi.c
@@ -47,6 +47,7 @@
 #include 
 
 #include 
+#include 
 #include 
 
 #include 
@@ -66,18 +67,12 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* Enables debug output from this file (needs CONFIG_DEBUG with
- * CONFIG_DEBUG_VERBOSE too)
- */
-
-#undef SSI_DEBUG  /* Define to enable debug */
+/* CONFIG_DEBUG_SPI enables debug output from this file */
 
-#ifdef SSI_DEBUG
-#  define ssidbg  lldbg
-#  define ssivdbg llvdbg
+#ifdef CONFIG_DEBUG_SPI
+#  define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
 #else
-#  define ssidbg(x...)
-#  define ssivdbg(x...)
+#  define ssi_dumpgpio(m)
 #endif
 
 /* How many SSI modules does this chip support? The LM3S6918 supports 2 SSI
@@ -272,7 +267,7 @@ static int  ssi_transfer(struct tiva_ssidev_s *priv, const void *txbuffer,
 
 #ifndef CONFIG_SSI_POLLWAIT
 static inline struct tiva_ssidev_s *ssi_mapirq(int irq);
-static int  ssi_interrupt(int irq, void *context);
+static int  ssi_interrupt(int irq, void *context, FAR void *arg);
 #endif
 
 /* SPI methods */
@@ -462,7 +457,7 @@ static uint32_t ssi_disable(struct tiva_ssidev_s *priv)
   retval = ssi_getreg(priv, TIVA_SSI_CR1_OFFSET);
   regval = (retval & ~SSI_CR1_SSE);
   ssi_putreg(priv, TIVA_SSI_CR1_OFFSET, regval);
-  ssivdbg("CR1: %08x\n", regval);
+  spiinfo("CR1: %08x\n", regval);
   return retval;
 }
 
@@ -489,7 +484,7 @@ static void ssi_enable(struct tiva_ssidev_s *priv, uint32_t enable)
   regval &= ~SSI_CR1_SSE;
   regval  |= (enable & SSI_CR1_SSE);
   ssi_putreg(priv, TIVA_SSI_CR1_OFFSET, regval);
-  ssivdbg("CR1: %08x\n", regval);
+  spiinfo("CR1: %08x\n", regval);
 }
 
 /****************************************************************************
@@ -538,14 +533,14 @@ static void ssi_semtake(sem_t *sem)
 
 static void ssi_txnull(struct tiva_ssidev_s *priv)
 {
-  ssivdbg("TX: ->0xffff\n");
+  spiinfo("TX: ->0xffff\n");
   ssi_putreg(priv, TIVA_SSI_DR_OFFSET, 0xffff);
 }
 
 static void ssi_txuint16(struct tiva_ssidev_s *priv)
 {
   uint16_t *ptr    = (uint16_t *)priv->txbuffer;
-  ssivdbg("TX: %p->%04x\n", ptr, *ptr);
+  spiinfo("TX: %p->%04x\n", ptr, *ptr);
   ssi_putreg(priv, TIVA_SSI_DR_OFFSET, (uint32_t)(*ptr++));
   priv->txbuffer = (void *)ptr;
 }
@@ -553,7 +548,7 @@ static void ssi_txuint16(struct tiva_ssidev_s *priv)
 static void ssi_txuint8(struct tiva_ssidev_s *priv)
 {
   uint8_t *ptr   = (uint8_t *)priv->txbuffer;
-  ssivdbg("TX: %p->%02x\n", ptr, *ptr);
+  spiinfo("TX: %p->%02x\n", ptr, *ptr);
   ssi_putreg(priv, TIVA_SSI_DR_OFFSET, (uint32_t)(*ptr++));
   priv->txbuffer = (void *)ptr;
 }
@@ -577,9 +572,9 @@ static void ssi_txuint8(struct tiva_ssidev_s *priv)
 
 static void ssi_rxnull(struct tiva_ssidev_s *priv)
 {
-#if defined(SSI_DEBUG) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_SPI_INFO
   uint32_t regval  = ssi_getreg(priv, TIVA_SSI_DR_OFFSET);
-  ssivdbg("RX: discard %04x\n", regval);
+  spiinfo("RX: discard %04x\n", regval);
 #else
   (void)ssi_getreg(priv, TIVA_SSI_DR_OFFSET);
 #endif
@@ -589,7 +584,7 @@ static void ssi_rxuint16(struct tiva_ssidev_s *priv)
 {
   uint16_t *ptr    = (uint16_t *)priv->rxbuffer;
   *ptr           = (uint16_t)ssi_getreg(priv, TIVA_SSI_DR_OFFSET);
-  ssivdbg("RX: %p<-%04x\n", ptr, *ptr);
+  spiinfo("RX: %p<-%04x\n", ptr, *ptr);
   priv->rxbuffer = (void *)(++ptr);
 }
 
@@ -597,7 +592,7 @@ static void ssi_rxuint8(struct tiva_ssidev_s *priv)
 {
   uint8_t *ptr   = (uint8_t *)priv->rxbuffer;
   *ptr           = (uint8_t)ssi_getreg(priv, TIVA_SSI_DR_OFFSET);
-  ssivdbg("RX: %p<-%02x\n", ptr, *ptr);
+  spiinfo("RX: %p<-%02x\n", ptr, *ptr);
   priv->rxbuffer = (void *)(++ptr);
 }
 
@@ -719,7 +714,7 @@ static int ssi_performtx(struct tiva_ssidev_s *priv)
            * when the Tx FIFO is 1/2 full or less.
            */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
           regval |= (SSI_IM_TX | SSI_RIS_ROR);
 #else
           regval |= SSI_IM_TX;
@@ -792,7 +787,7 @@ static inline void ssi_performrx(struct tiva_ssidev_s *priv)
        * interrupt, probably an Rx timeout).
        */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       regval |= (SSI_IM_RX | SSI_IM_RT | SSI_IM_ROR);
 #else
       regval |= (SSI_IM_RX | SSI_IM_RT);
@@ -841,7 +836,8 @@ static int ssi_transfer(struct tiva_ssidev_s *priv, const void *txbuffer,
 #endif
   int ntxd;
 
-  ssidbg("txbuffer: %p rxbuffer: %p nwords: %d\n", txbuffer, rxbuffer, nwords);
+  spiinfo("txbuffer: %p rxbuffer: %p nwords: %d\n",
+         txbuffer, rxbuffer, nwords);
 
   /* Set up to perform the transfer */
 
@@ -882,7 +878,7 @@ static int ssi_transfer(struct tiva_ssidev_s *priv, const void *txbuffer,
 
 #ifndef CONFIG_SSI_POLLWAIT
   flags = enter_critical_section();
-  ssivdbg("ntxwords: %d nrxwords: %d nwords: %d SR: %08x\n",
+  spiinfo("ntxwords: %d nrxwords: %d nwords: %d SR: %08x\n",
           priv->ntxwords, priv->nrxwords, priv->nwords,
           ssi_getreg(priv, TIVA_SSI_SR_OFFSET));
 
@@ -896,7 +892,7 @@ static int ssi_transfer(struct tiva_ssidev_s *priv, const void *txbuffer,
 
   ssi_performrx(priv);
 
-  ssivdbg("ntxwords: %d nrxwords: %d nwords: %d SR: %08x IM: %08x\n",
+  spiinfo("ntxwords: %d nrxwords: %d nwords: %d SR: %08x IM: %08x\n",
           priv->ntxwords, priv->nrxwords, priv->nwords,
           ssi_getreg(priv, TIVA_SSI_SR_OFFSET),
           ssi_getreg(priv, TIVA_SSI_IM_OFFSET));
@@ -906,14 +902,14 @@ static int ssi_transfer(struct tiva_ssidev_s *priv, const void *txbuffer,
    * with the transfer, so it should be safe with no timeout.
    */
 
-  ssivdbg("Waiting for transfer complete\n");
+  spiinfo("Waiting for transfer complete\n");
   leave_critical_section(flags);
   do
     {
       ssi_semtake(&priv->xfrsem);
     }
   while (priv->nrxwords < priv->nwords);
-  ssidbg("Transfer complete\n");
+  spiinfo("Transfer complete\n");
 
 #else
   /* Perform the transfer using polling logic.  This will totally
@@ -1008,7 +1004,7 @@ static inline struct tiva_ssidev_s *ssi_mapirq(int irq)
  ****************************************************************************/
 
 #ifndef CONFIG_SSI_POLLWAIT
-static int ssi_interrupt(int irq, void *context)
+static int ssi_interrupt(int irq, void *context, FAR void *arg)
 {
   struct tiva_ssidev_s *priv = ssi_mapirq(irq);
   uint32_t regval;
@@ -1022,14 +1018,14 @@ static int ssi_interrupt(int irq, void *context)
 
   /* Check for Rx FIFO overruns */
 
-#ifdef SSI_DEBUG
+#ifdef CONFIG_DEBUG_SPI_ERROR
   if ((regval & SSI_RIS_ROR) != 0)
     {
-      ssidbg("Rx FIFO Overrun!\n");
+      spierr("ERROR: Rx FIFO Overrun!\n");
     }
 #endif
 
-  ssivdbg("ntxwords: %d nrxwords: %d nwords: %d SR: %08x\n",
+  spiinfo("ntxwords: %d nrxwords: %d nwords: %d SR: %08x\n",
           priv->ntxwords, priv->nrxwords, priv->nwords,
           ssi_getreg(priv, TIVA_SSI_SR_OFFSET));
 
@@ -1041,7 +1037,7 @@ static int ssi_interrupt(int irq, void *context)
 
   ssi_performrx(priv);
 
-  ssivdbg("ntxwords: %d nrxwords: %d nwords: %d SR: %08x IM: %08x\n",
+  spiinfo("ntxwords: %d nrxwords: %d nwords: %d SR: %08x IM: %08x\n",
           priv->ntxwords, priv->nrxwords, priv->nwords,
           ssi_getreg(priv, TIVA_SSI_SR_OFFSET),
           ssi_getreg(priv, TIVA_SSI_IM_OFFSET));
@@ -1056,7 +1052,7 @@ static int ssi_interrupt(int irq, void *context)
 
       /* Wake up the waiting thread */
 
-      ssidbg("Transfer complete\n");
+      spiinfo("Transfer complete\n");
       ssi_semgive(&priv->xfrsem);
     }
 
@@ -1137,7 +1133,7 @@ static uint32_t ssi_setfrequencyinternal(struct tiva_ssidev_s *priv,
   uint32_t scr;
   uint32_t actual;
 
-  ssidbg("frequency: %d\n", frequency);
+  spiinfo("frequency: %d\n", frequency);
   DEBUGASSERT(frequency);
 
   /* Has the frequency changed? */
@@ -1207,7 +1203,7 @@ static uint32_t ssi_setfrequencyinternal(struct tiva_ssidev_s *priv,
       regval &= ~SSI_CR0_SCR_MASK;
       regval |= (scr << SSI_CR0_SCR_SHIFT);
       ssi_putreg(priv, TIVA_SSI_CR0_OFFSET, regval);
-      ssivdbg("CR0: %08x CPSR: %08x\n", regval, cpsdvsr);
+      spiinfo("CR0: %08x CPSR: %08x\n", regval, cpsdvsr);
 
       /* Calcluate the actual frequency */
 
@@ -1261,7 +1257,7 @@ static void ssi_setmodeinternal(struct tiva_ssidev_s *priv, enum spi_mode_e mode
   uint32_t modebits;
   uint32_t regval;
 
-  ssidbg("mode: %d\n", mode);
+  spiinfo("mode: %d\n", mode);
   DEBUGASSERT(priv);
 
   /* Has the number of bits per word changed? */
@@ -1298,7 +1294,7 @@ static void ssi_setmodeinternal(struct tiva_ssidev_s *priv, enum spi_mode_e mode
       regval &= ~(SSI_CR0_FRF_MASK | SSI_CR0_SPH | SSI_CR0_SPO);
       regval |= modebits;
       ssi_putreg(priv, TIVA_SSI_CR0_OFFSET, regval);
-      ssivdbg("CR0: %08x\n", regval);
+      spiinfo("CR0: %08x\n", regval);
 
       /* Save the mode so that subsequent re-configuratins will be faster */
 
@@ -1340,7 +1336,7 @@ static void ssi_setbitsinternal(struct tiva_ssidev_s *priv, int nbits)
 {
   uint32_t regval;
 
-  ssidbg("nbits: %d\n", nbits);
+  spiinfo("nbits: %d\n", nbits);
   DEBUGASSERT(priv);
   if (nbits != priv->nbits && nbits >= 4 && nbits <= 16)
     {
@@ -1348,7 +1344,7 @@ static void ssi_setbitsinternal(struct tiva_ssidev_s *priv, int nbits)
       regval &= ~SSI_CR0_DSS_MASK;
       regval |= ((nbits - 1) << SSI_CR0_DSS_SHIFT);
       ssi_putreg(priv, TIVA_SSI_CR0_OFFSET, regval);
-      ssivdbg("CR0: %08x\n", regval);
+      spiinfo("CR0: %08x\n", regval);
 
       priv->nbits = nbits;
     }
@@ -1507,7 +1503,7 @@ FAR struct spi_dev_s *tiva_ssibus_initialize(int port)
   struct tiva_ssidev_s *priv;
   irqstate_t flags;
 
-  ssidbg("port: %d\n", port);
+  spiinfo("port: %d\n", port);
 
   /* Set up for the selected port */
 
@@ -1640,7 +1636,12 @@ FAR struct spi_dev_s *tiva_ssibus_initialize(int port)
   /* Initialize the state structure */
 
 #ifndef CONFIG_SSI_POLLWAIT
+  /* The xfrsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   sem_init(&priv->xfrsem, 0, 0);
+  sem_setprotocol(&priv->xfrsem, SEM_PRIO_NONE);
 #endif
   sem_init(&priv->exclsem, 0, 1);
 
@@ -1681,9 +1682,9 @@ FAR struct spi_dev_s *tiva_ssibus_initialize(int port)
 
 #ifndef CONFIG_SSI_POLLWAIT
 #if NSSI_ENABLED > 1
-  irq_attach(priv->irq, (xcpt_t)ssi_interrupt);
+  irq_attach(priv->irq, (xcpt_t)ssi_interrupt, NULL);
 #else
-  irq_attach(SSI_IRQ, (xcpt_t)ssi_interrupt);
+  irq_attach(SSI_IRQ, (xcpt_t)ssi_interrupt, NULL);
 #endif
 #endif /* CONFIG_SSI_POLLWAIT */
 
diff --git a/arch/arm/src/tiva/tiva_start.c b/arch/arm/src/tiva/tiva_start.c
index 6ecc46223eb8f4c0a7beb824a31d3e79d7e3c868..db2abcc5ec72675dd4a85de8083dd0280ee6b306 100644
--- a/arch/arm/src/tiva/tiva_start.c
+++ b/arch/arm/src/tiva/tiva_start.c
@@ -78,7 +78,7 @@
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 #  define showprogress(c) up_lowputc(c)
 #else
 #  define showprogress(c)
diff --git a/arch/arm/src/tiva/tiva_timer.h b/arch/arm/src/tiva/tiva_timer.h
index 0f262bc73e24039ff52fef4c448a20ac77009f73..2f498581d271b5dd873a37c5ac7a8690245fadfb 100644
--- a/arch/arm/src/tiva/tiva_timer.h
+++ b/arch/arm/src/tiva/tiva_timer.h
@@ -127,20 +127,6 @@
 #define TIMER_ISDMARTCM(c)    ((((c)->flags) & TIMER_FLAG_DMARTCM) != 0)
 #define TIMER_ISDMAMATCH(c)   ((((c)->flags) & TIMER_FLAG_DMAMATCH) != 0)
 
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing the timer
- * driver.  NOTE: that only lldbg types are used so that the output is
- * immediately available.
- */
-
-#ifdef CONFIG_DEBUG_TIMER
-#  define timdbg  lldbg
-#  define timvdbg llvdbg
-#else
-#  define timdbg(x...)
-#  define timvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Types
  ****************************************************************************/
diff --git a/arch/arm/src/tiva/tiva_timerisr.c b/arch/arm/src/tiva/tiva_timerisr.c
index 76fd7e96cbc89c90bf0064a683146ed342bdf4f3..62a90f490258521eda3d0c81e81d6689a3d746ab 100644
--- a/arch/arm/src/tiva/tiva_timerisr.c
+++ b/arch/arm/src/tiva/tiva_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/tiva/tiva_timerisr.c
  *
- *   Copyright (C) 2009, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -76,19 +76,11 @@
 #endif
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  tiva_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -96,7 +88,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int tiva_timerisr(int irq, uint32_t *regs, void *arg)
 {
   /* Process timer interrupt */
 
@@ -105,7 +97,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -113,7 +109,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   uint32_t regval;
 
@@ -130,7 +126,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(TIVA_IRQ_SYSTICK, (xcpt_t)up_timerisr);
+  (void)irq_attach(TIVA_IRQ_SYSTICK, (xcpt_t)tiva_timerisr, NULL);
 
   /* Enable SysTick interrupts */
 
diff --git a/arch/arm/src/tiva/tiva_timerlib.c b/arch/arm/src/tiva/tiva_timerlib.c
index fd6b5805db9d79ae20261d9fcf2c7828772e602c..e2d8bcd0b4a7d94b9f66170d2cd9d6dc2ceb8e4b 100644
--- a/arch/arm/src/tiva/tiva_timerlib.c
+++ b/arch/arm/src/tiva/tiva_timerlib.c
@@ -63,6 +63,10 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
+#ifndef CONFIG_DEBUG_TIMER_INFO
+#  undef CONFIG_TIVA_TIMER_REGDEBUG
+#endif
+
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -122,28 +126,28 @@ static void tiva_putreg(struct tiva_gptmstate_s *priv, unsigned int offset,
 #ifdef CONFIG_TIVA_TIMER_32BIT
 static int  tiva_timer32_interrupt(struct tiva_gptmstate_s *priv);
 #  ifdef CONFIG_TIVA_TIMER0
-static int  tiva_gptm0_interrupt(int irq, FAR void *context);
+static int  tiva_gptm0_interrupt(int irq, FAR void *context, FAR void *arg);
 #  endif
 #  ifdef CONFIG_TIVA_TIMER1
-static int  tiva_gptm1_interrupt(int irq, FAR void *context);
+static int  tiva_gptm1_interrupt(int irq, FAR void *context, FAR void *arg);
 #  endif
 #  ifdef CONFIG_TIVA_TIMER2
-static int  tiva_gptm2_interrupt(int irq, FAR void *context);
+static int  tiva_gptm2_interrupt(int irq, FAR void *context, FAR void *arg);
 #  endif
 #  ifdef CONFIG_TIVA_TIMER3
-static int  tiva_gptm3_interrupt(int irq, FAR void *context);
+static int  tiva_gptm3_interrupt(int irq, FAR void *context, FAR void *arg);
 #  endif
 #  ifdef CONFIG_TIVA_TIMER4
-static int  tiva_gptm4_interrupt(int irq, FAR void *context);
+static int  tiva_gptm4_interrupt(int irq, FAR void *context, FAR void *arg);
 #  endif
 #  ifdef CONFIG_TIVA_TIMER5
-static int  tiva_gptm5_interrupt(int irq, FAR void *context);
+static int  tiva_gptm5_interrupt(int irq, FAR void *context, FAR void *arg);
 #  endif
 #  ifdef CONFIG_TIVA_TIMER6
-static int  tiva_gptm6_interrupt(int irq, FAR void *context);
+static int  tiva_gptm6_interrupt(int irq, FAR void *context, FAR void *arg);
 #  endif
 #  ifdef CONFIG_TIVA_TIMER7
-static int  tiva_gptm7_interrupt(int irq, FAR void *context);
+static int  tiva_gptm7_interrupt(int irq, FAR void *context, FAR void *arg);
 #endif
 #endif /* CONFIG_TIVA_TIMER_32BIT */
 
@@ -151,36 +155,36 @@ static int  tiva_gptm7_interrupt(int irq, FAR void *context);
 static int  tiva_timer16_interrupt(struct tiva_gptmstate_s *priv,
               int tmndx);
 #ifdef CONFIG_TIVA_TIMER0
-static int  tiva_timer0a_interrupt(int irq, FAR void *context);
-static int  tiva_timer0b_interrupt(int irq, FAR void *context);
+static int  tiva_timer0a_interrupt(int irq, FAR void *context, FAR void *arg);
+static int  tiva_timer0b_interrupt(int irq, FAR void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_TIVA_TIMER1
-static int  tiva_timer1a_interrupt(int irq, FAR void *context);
-static int  tiva_timer1b_interrupt(int irq, FAR void *context);
+static int  tiva_timer1a_interrupt(int irq, FAR void *context, FAR void *arg);
+static int  tiva_timer1b_interrupt(int irq, FAR void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_TIVA_TIMER2
-static int  tiva_timer2a_interrupt(int irq, FAR void *context);
-static int  tiva_timer2b_interrupt(int irq, FAR void *context);
+static int  tiva_timer2a_interrupt(int irq, FAR void *context, FAR void *arg);
+static int  tiva_timer2b_interrupt(int irq, FAR void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_TIVA_TIMER3
-static int  tiva_timer3a_interrupt(int irq, FAR void *context);
-static int  tiva_timer3b_interrupt(int irq, FAR void *context);
+static int  tiva_timer3a_interrupt(int irq, FAR void *context, FAR void *arg);
+static int  tiva_timer3b_interrupt(int irq, FAR void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_TIVA_TIMER4
-static int  tiva_timer4a_interrupt(int irq, FAR void *context);
-static int  tiva_timer4b_interrupt(int irq, FAR void *context);
+static int  tiva_timer4a_interrupt(int irq, FAR void *context, FAR void *arg);
+static int  tiva_timer4b_interrupt(int irq, FAR void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_TIVA_TIMER5
-static int  tiva_timer5a_interrupt(int irq, FAR void *context);
-static int  tiva_timer5b_interrupt(int irq, FAR void *context);
+static int  tiva_timer5a_interrupt(int irq, FAR void *context, FAR void *arg);
+static int  tiva_timer5b_interrupt(int irq, FAR void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_TIVA_TIMER6
-static int  tiva_timer6a_interrupt(int irq, FAR void *context);
-static int  tiva_timer6b_interrupt(int irq, FAR void *context);
+static int  tiva_timer6a_interrupt(int irq, FAR void *context, FAR void *arg);
+static int  tiva_timer6b_interrupt(int irq, FAR void *context, FAR void *arg);
 #endif
 #ifdef CONFIG_TIVA_TIMER7
-static int  tiva_timer7a_interrupt(int irq, FAR void *context);
-static int  tiva_timer7b_interrupt(int irq, FAR void *context);
+static int  tiva_timer7a_interrupt(int irq, FAR void *context, FAR void *arg);
+static int  tiva_timer7b_interrupt(int irq, FAR void *context, FAR void *arg);
 #endif
 #endif /* CONFIG_TIVA_TIMER_16BIT */
 
@@ -393,7 +397,7 @@ static bool tiva_timer_checkreg(struct tiva_gptmstate_s *priv, bool wr,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", priv->ntimes);
+          tmrinfo("...[Repeats %d times]...\n", priv->ntimes);
         }
 
       /* Save information about the new access */
@@ -426,7 +430,7 @@ static uint32_t tiva_getreg(struct tiva_gptmstate_s *priv, unsigned int offset)
 #ifdef CONFIG_TIVA_TIMER_REGDEBUG
   if (tiva_timer_checkreg(priv, false, regval, regaddr))
     {
-      lldbg("%08x->%08x\n", regaddr, regval);
+      tmrinfo("%08x->%08x\n", regaddr, regval);
     }
 #endif
 
@@ -449,7 +453,7 @@ static void tiva_putreg(struct tiva_gptmstate_s *priv, unsigned int offset,
 #ifdef CONFIG_TIVA_TIMER_REGDEBUG
   if (tiva_timer_checkreg(priv, true, regval, regaddr))
     {
-       lldbg("%08x<-%08x\n", regaddr, regval);
+       tmrinfo("%08x<-%08x\n", regaddr, regval);
     }
 #endif
 
@@ -553,56 +557,56 @@ static int tiva_timer32_interrupt(struct tiva_gptmstate_s *priv)
 
 #ifdef CONFIG_TIVA_TIMER_32BIT
 #ifdef CONFIG_TIVA_TIMER0
-static int tiva_gptm0_interrupt(int irq, FAR void *context)
+static int tiva_gptm0_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer32_interrupt(&g_gptm0_state);
 }
 #endif
 
 #ifdef CONFIG_TIVA_TIMER1
-static int tiva_gptm1_interrupt(int irq, FAR void *context)
+static int tiva_gptm1_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer32_interrupt(&g_gptm1_state);
 }
 #endif
 
 #ifdef CONFIG_TIVA_TIMER2
-static int tiva_gptm2_interrupt(int irq, FAR void *context)
+static int tiva_gptm2_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer32_interrupt(&g_gptm2_state);
 }
 #endif
 
 #ifdef CONFIG_TIVA_TIMER3
-static int tiva_gptm3_interrupt(int irq, FAR void *context)
+static int tiva_gptm3_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer32_interrupt(&g_gptm3_state);
 }
 #endif
 
 #ifdef CONFIG_TIVA_TIMER4
-static int tiva_gptm4_interrupt(int irq, FAR void *context)
+static int tiva_gptm4_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer32_interrupt(&g_gptm4_state);
 }
 #endif
 
 #ifdef CONFIG_TIVA_TIMER5
-static int tiva_gptm5_interrupt(int irq, FAR void *context)
+static int tiva_gptm5_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer32_interrupt(&g_gptm5_state);
 }
 #endif
 
 #ifdef CONFIG_TIVA_TIMER6
-static int tiva_gptm6_interrupt(int irq, FAR void *context)
+static int tiva_gptm6_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer32_interrupt(&g_gptm6_state);
 }
 #endif
 
 #ifdef CONFIG_TIVA_TIMER7
-static int tiva_gptm7_interrupt(int irq, FAR void *context)
+static int tiva_gptm7_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer32_interrupt(&g_gptm7_state);
 }
@@ -679,96 +683,96 @@ static int tiva_timer16_interrupt(struct tiva_gptmstate_s *priv, int tmndx)
 
 #ifdef CONFIG_TIVA_TIMER_16BIT
 #ifdef CONFIG_TIVA_TIMER0
-static int tiva_timer0a_interrupt(int irq, FAR void *context)
+static int tiva_timer0a_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer16_interrupt(&g_gptm0_state, TIMER16A);
 }
 
-static int tiva_timer0b_interrupt(int irq, FAR void *context)
+static int tiva_timer0b_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer16_interrupt(&g_gptm0_state, TIMER16B);
 }
 #endif
 
 #ifdef CONFIG_TIVA_TIMER1
-static int tiva_timer1a_interrupt(int irq, FAR void *context)
+static int tiva_timer1a_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer16_interrupt(&g_gptm1_state, TIMER16A);
 }
 
-static int tiva_timer1b_interrupt(int irq, FAR void *context)
+static int tiva_timer1b_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer16_interrupt(&g_gptm1_state, TIMER16B);
 }
 #endif
 
 #ifdef CONFIG_TIVA_TIMER2
-static int tiva_timer2a_interrupt(int irq, FAR void *context)
+static int tiva_timer2a_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer16_interrupt(&g_gptm2_state, TIMER16A);
 }
 
-static int tiva_timer2b_interrupt(int irq, FAR void *context)
+static int tiva_timer2b_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer16_interrupt(&g_gptm2_state, TIMER16B);
 }
 #endif
 
 #ifdef CONFIG_TIVA_TIMER3
-static int tiva_timer3a_interrupt(int irq, FAR void *context)
+static int tiva_timer3a_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer16_interrupt(&g_gptm3_state, TIMER16A);
 }
 
-static int tiva_timer3b_interrupt(int irq, FAR void *context)
+static int tiva_timer3b_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer16_interrupt(&g_gptm3_state, TIMER16B);
 }
 #endif
 
 #ifdef CONFIG_TIVA_TIMER4
-static int tiva_timer4a_interrupt(int irq, FAR void *context)
+static int tiva_timer4a_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer16_interrupt(&g_gptm4_state, TIMER16A);
 }
 
-static int tiva_timer4b_interrupt(int irq, FAR void *context)
+static int tiva_timer4b_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer16_interrupt(&g_gptm4_state, TIMER16B);
 }
 #endif
 
 #ifdef CONFIG_TIVA_TIMER5
-static int tiva_timer5a_interrupt(int irq, FAR void *context)
+static int tiva_timer5a_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer16_interrupt(&g_gptm5_state, TIMER16A);
 }
 
-static int tiva_timer5b_interrupt(int irq, FAR void *context)
+static int tiva_timer5b_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer16_interrupt(&g_gptm5_state, TIMER16B);
 }
 #endif
 
 #ifdef CONFIG_TIVA_TIMER6
-static int tiva_timer6a_interrupt(int irq, FAR void *context)
+static int tiva_timer6a_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer16_interrupt(&g_gptm6_state, TIMER16A);
 }
 
-static int tiva_timer6b_interrupt(int irq, FAR void *context)
+static int tiva_timer6b_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer16_interrupt(&g_gptm6_state, TIMER16B);
 }
 #endif
 
 #ifdef CONFIG_TIVA_TIMER7
-static int tiva_timer7a_interrupt(int irq, FAR void *context)
+static int tiva_timer7a_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer16_interrupt(&g_gptm7_state, TIMER16A);
 }
 
-static int tiva_timer7b_interrupt(int irq, FAR void *context)
+static int tiva_timer7b_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   return tiva_timer16_interrupt(&g_gptm7_state, TIMER16B);
 }
@@ -1776,7 +1780,7 @@ TIMER_HANDLE tiva_gptm_configure(const struct tiva_gptmconfig_s *config)
 
       priv->clkin = ALTCLK_FREQUENCY;
 #else
-       timvdbg("tiva_gptm_configure: Error: alternate clock only available on TM4C129 devices\n");
+       tmrinfo("tiva_gptm_configure: Error: alternate clock only available on TM4C129 devices\n");
        return (TIMER_HANDLE)NULL;
 #endif /* CONFIG_ARCH_CHIP_TM4C129 */
     }
@@ -1799,7 +1803,7 @@ TIMER_HANDLE tiva_gptm_configure(const struct tiva_gptmconfig_s *config)
        * the interrupt).
        */
 
-      ret = irq_attach(attr->irq[TIMER32], attr->handler32);
+      ret = irq_attach(attr->irq[TIMER32], attr->handler32, NULL);
       if (ret == OK)
         {
           /* Configure the 32-bit timer */
@@ -1820,10 +1824,10 @@ TIMER_HANDLE tiva_gptm_configure(const struct tiva_gptmconfig_s *config)
        * the interrupts).
        */
 
-      ret = irq_attach(attr->irq[TIMER16A], attr->handler16[TIMER16A]);
+      ret = irq_attach(attr->irq[TIMER16A], attr->handler16[TIMER16A], NULL);
       if (ret == OK)
         {
-          ret = irq_attach(attr->irq[TIMER16B], attr->handler16[TIMER16B]);
+          ret = irq_attach(attr->irq[TIMER16B], attr->handler16[TIMER16B], NULL);
         }
 
       if (ret == OK)
@@ -2378,14 +2382,14 @@ void tiva_timer32_setinterval(TIMER_HANDLE handle, uint32_t interval)
 #ifdef CONFIG_TIVA_TIMER_REGDEBUG
   /* Generate low-level debug output outside of the critical section */
 
-  lldbg("%08x<-%08x\n", loadr, interval);
+  tmrinfo("%08x<-%08x\n", loadr, interval);
   if (toints)
     {
 #  ifdef CONFIG_ARCH_CHIP_TM4C129
-      lldbg("%08x->%08x\n", moder, modev1);
-      lldbg("%08x<-%08x\n", moder, modev2);
+      tmrinfo("%08x->%08x\n", moder, modev1);
+      tmrinfo("%08x<-%08x\n", moder, modev2);
 #  endif /* CONFIG_ARCH_CHIP_TM4C129 */
-      lldbg("%08x<-%08x\n", imrr, priv->imr);
+      tmrinfo("%08x<-%08x\n", imrr, priv->imr);
     }
 #endif
 }
@@ -2525,14 +2529,14 @@ void tiva_timer16_setinterval(TIMER_HANDLE handle, uint16_t interval, int tmndx)
 #ifdef CONFIG_TIVA_TIMER_REGDEBUG
   /* Generate low-level debug output outside of the critical section */
 
-  lldbg("%08x<-%08x\n", loadr, interval);
+  tmrinfo("%08x<-%08x\n", loadr, interval);
   if (toints)
     {
 #ifdef CONFIG_ARCH_CHIP_TM4C129
-      lldbg("%08x->%08x\n", moder, modev1);
-      lldbg("%08x<-%08x\n", moder, modev2);
+      tmrinfo("%08x->%08x\n", moder, modev1);
+      tmrinfo("%08x<-%08x\n", moder, modev2);
 #endif
-      lldbg("%08x<-%08x\n", imrr, priv->imr);
+      tmrinfo("%08x<-%08x\n", imrr, priv->imr);
     }
 #endif
 }
@@ -2564,7 +2568,7 @@ uint32_t tiva_timer32_remaining(TIMER_HANDLE handle)
   uint32_t interval;
   uint32_t remaining;
 
-  timvdbg("Entry\n");
+  tmrinfo("Entry\n");
 
   DEBUGASSERT(priv && priv->attr && priv->config &&
               priv->config->mode != TIMER16_MODE);
@@ -2730,13 +2734,13 @@ void tiva_rtc_setalarm(TIMER_HANDLE handle, uint32_t delay)
 #ifdef CONFIG_TIVA_TIMER_REGDEBUG
   /* Generate low-level debug output outside of the critical section */
 
-  lldbg("%08x->%08x\n", base + TIVA_TIMER_TAR_OFFSET, counter);
-  lldbg("%08x<-%08x\n", base + TIVA_TIMER_TAMATCHR_OFFSET, match);
+  tmrinfo("%08x->%08x\n", base + TIVA_TIMER_TAR_OFFSET, counter);
+  tmrinfo("%08x<-%08x\n", base + TIVA_TIMER_TAMATCHR_OFFSET, match);
 #ifdef CONFIG_ARCH_CHIP_TM4C129
-  lldbg("%08x->%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev);
-  lldbg("%08x<-%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev | adcbits);
+  tmrinfo("%08x->%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev);
+  tmrinfo("%08x<-%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev | adcbits);
 #endif /* CONFIG_ARCH_CHIP_TM4C129 */
-  lldbg("%08x<-%08x\n", base + TIVA_TIMER_IMR_OFFSET, priv->imr);
+  tmrinfo("%08x<-%08x\n", base + TIVA_TIMER_IMR_OFFSET, priv->imr);
 #endif
 }
 #endif
@@ -2834,13 +2838,13 @@ void tiva_timer32_relmatch(TIMER_HANDLE handle, uint32_t relmatch)
 #ifdef CONFIG_TIVA_TIMER_REGDEBUG
   /* Generate low-level debug output outside of the critical section */
 
-  lldbg("%08x->%08x\n", base + TIVA_TIMER_TAR_OFFSET, counter);
-  lldbg("%08x<-%08x\n", base + TIVA_TIMER_TAMATCHR_OFFSET, match);
+  tmrinfo("%08x->%08x\n", base + TIVA_TIMER_TAR_OFFSET, counter);
+  tmrinfo("%08x<-%08x\n", base + TIVA_TIMER_TAMATCHR_OFFSET, match);
 #ifdef CONFIG_ARCH_CHIP_TM4C129
-  lldbg("%08x->%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev);
-  lldbg("%08x<-%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev | adcbits);
+  tmrinfo("%08x->%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev);
+  tmrinfo("%08x<-%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev | adcbits);
 #endif /* CONFIG_ARCH_CHIP_TM4C129 */
-  lldbg("%08x<-%08x\n", base + TIVA_TIMER_IMR_OFFSET, priv->imr);
+  tmrinfo("%08x<-%08x\n", base + TIVA_TIMER_IMR_OFFSET, priv->imr);
 #endif /* CONFIG_TIVA_TIMER_REGDEBUG */
 
 }
@@ -3036,15 +3040,15 @@ void tiva_timer16_relmatch(TIMER_HANDLE handle, uint32_t relmatch, int tmndx)
 #ifdef CONFIG_TIVA_TIMER_REGDEBUG
   /* Generate low-level debug output outside of the critical section */
 
-  lldbg("%08x->%08x\n", timerr, timerv);
-  lldbg("%08x->%08x\n", prescr, prescv);
-  lldbg("%08x<-%08x\n", matchr, matchv);
-  lldbg("%08x<-%08x\n", prematchr, prematchv);
+  tmrinfo("%08x->%08x\n", timerr, timerv);
+  tmrinfo("%08x->%08x\n", prescr, prescv);
+  tmrinfo("%08x<-%08x\n", matchr, matchv);
+  tmrinfo("%08x<-%08x\n", prematchr, prematchv);
 #ifdef CONFIG_ARCH_CHIP_TM4C129
-  lldbg("%08x->%08x\n", adcevr, adcevv);
-  lldbg("%08x<-%08x\n", adcevr, adcevv | adcbits);
+  tmrinfo("%08x->%08x\n", adcevr, adcevv);
+  tmrinfo("%08x<-%08x\n", adcevr, adcevv | adcbits);
 #endif
-  lldbg("%08x<-%08x\n", imr, priv->imr);
+  tmrinfo("%08x<-%08x\n", imr, priv->imr);
 #endif
 }
 #endif
diff --git a/arch/arm/src/tiva/tiva_timerlow32.c b/arch/arm/src/tiva/tiva_timerlow32.c
index ac3ac065f53531fae325d0b3ef5d7e2138be2c13..25478f66419eee49416942682e565d5e095f3173 100644
--- a/arch/arm/src/tiva/tiva_timerlow32.c
+++ b/arch/arm/src/tiva/tiva_timerlow32.c
@@ -57,10 +57,6 @@
 
 #if defined(CONFIG_TIMER) && defined(CONFIG_TIVA_TIMER)
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -74,7 +70,7 @@ struct tiva_lowerhalf_s
   const struct timer_ops_s *ops;     /* Lower half operations */
   struct tiva_gptm32config_s config; /* Persistent timer configuration */
   TIMER_HANDLE handle;               /* Contained timer handle */
-  tccb_t handler;                    /* Current user interrupt handler */
+  tccb_t callback;                    /* Current user interrupt callback */
   uint32_t clkin;                    /* Input clock frequency */
   uint32_t timeout;                  /* The current timeout value (us) */
   uint32_t clkticks;                 /* Actual clock ticks for current interval */
@@ -103,8 +99,8 @@ static int      tiva_getstatus(struct timer_lowerhalf_s *lower,
                   struct timer_status_s *status);
 static int      tiva_settimeout(struct timer_lowerhalf_s *lower,
                   uint32_t timeout);
-static tccb_t   tiva_sethandler(struct timer_lowerhalf_s *lower,
-                  tccb_t handler);
+static void     tiva_setcallback(struct timer_lowerhalf_s *lower,
+                  tccb_t callback, FAR void *arg);
 static int      tiva_ioctl(struct timer_lowerhalf_s *lower, int cmd,
                   unsigned long arg);
 
@@ -115,12 +111,12 @@ static int      tiva_ioctl(struct timer_lowerhalf_s *lower, int cmd,
 
 static const struct timer_ops_s g_timer_ops =
 {
-  .start      = tiva_start,
-  .stop       = tiva_stop,
-  .getstatus  = tiva_getstatus,
-  .settimeout = tiva_settimeout,
-  .sethandler = tiva_sethandler,
-  .ioctl      = tiva_ioctl,
+  .start       = tiva_start,
+  .stop        = tiva_stop,
+  .getstatus   = tiva_getstatus,
+  .settimeout  = tiva_settimeout,
+  .setcallback = tiva_setcallback,
+  .ioctl       = tiva_ioctl,
 };
 
 /****************************************************************************
@@ -200,7 +196,7 @@ static uint32_t tiva_ticks2usec(struct tiva_lowerhalf_s *priv, uint32_t ticks)
 
 static void tiva_timeout(struct tiva_lowerhalf_s *priv, uint32_t timeout)
 {
-  timvdbg("Entry: timeout=%d\n", timeout);
+  tmrinfo("Entry: timeout=%d\n", timeout);
 
   /* Save the desired timeout value */
 
@@ -215,7 +211,7 @@ static void tiva_timeout(struct tiva_lowerhalf_s *priv, uint32_t timeout)
   timeout  = tiva_ticks2usec(priv, priv->clkticks);
   priv->adjustment = priv->timeout - timeout;
 
-  timvdbg("clkin=%d clkticks=%d timeout=%d, adjustment=%d\n",
+  tmrinfo("clkin=%d clkticks=%d timeout=%d, adjustment=%d\n",
           priv->clkin, priv->clkticks, priv->timeout, priv->adjustment);
 }
 
@@ -237,7 +233,7 @@ static void tiva_timer_handler(TIMER_HANDLE handle, void *arg, uint32_t status)
 {
   struct tiva_lowerhalf_s *priv = (struct tiva_lowerhalf_s *)arg;
 
-  timvdbg("Entry: status=%08x\n", status);
+  tmrinfo("Entry: status=%08x\n", status);
   DEBUGASSERT(arg && status);
 
   /* Check if the timeout interrupt is pending */
@@ -246,11 +242,11 @@ static void tiva_timer_handler(TIMER_HANDLE handle, void *arg, uint32_t status)
     {
       uint32_t timeout;
 
-      /* Is there a registered handler?  If the handler has been nullified,
+      /* Is there a registered callback?  If the callback has been nullified,
        * the timer will be stopped.
        */
 
-      if (priv->handler && priv->handler(&priv->timeout))
+      if (priv->callback && priv->callback(&priv->timeout, priv->arg))
         {
           /* Calculate new ticks / dither adjustment */
 
@@ -273,10 +269,10 @@ static void tiva_timer_handler(TIMER_HANDLE handle, void *arg, uint32_t status)
         }
       else
         {
-          /* No handler or the handler returned false.. stop the timer */
+          /* No callback or the callback returned false.. stop the timer */
 
           tiva_timer32_stop(priv->handle);
-          timvdbg("Stopped\n");
+          tmrinfo("Stopped\n");
         }
     }
 }
@@ -300,7 +296,7 @@ static int tiva_start(struct timer_lowerhalf_s *lower)
 {
   struct tiva_lowerhalf_s *priv = (struct tiva_lowerhalf_s *)lower;
 
-  timvdbg("Entry: started %d\n", priv->started);
+  tmrinfo("Entry: started %d\n", priv->started);
 
   /* Has the timer already been started? */
 
@@ -337,7 +333,7 @@ static int tiva_stop(struct timer_lowerhalf_s *lower)
 {
   struct tiva_lowerhalf_s *priv = (struct tiva_lowerhalf_s *)lower;
 
-  timvdbg("Entry: started %d\n", priv->started);
+  tmrinfo("Entry: started %d\n", priv->started);
 
   /* Has the timer already been started? */
 
@@ -377,7 +373,7 @@ static int tiva_getstatus(struct timer_lowerhalf_s *lower,
   struct tiva_lowerhalf_s *priv = (struct tiva_lowerhalf_s *)lower;
   uint32_t remaining;
 
-  timvdbg("Entry\n");
+  tmrinfo("Entry\n");
   DEBUGASSERT(priv);
 
   /* Return the status bit */
@@ -388,7 +384,7 @@ static int tiva_getstatus(struct timer_lowerhalf_s *lower,
       status->flags |= TCFLAGS_ACTIVE;
     }
 
-  if (priv->handler)
+  if (priv->callback)
     {
       status->flags |= TCFLAGS_HANDLER;
     }
@@ -402,9 +398,9 @@ static int tiva_getstatus(struct timer_lowerhalf_s *lower,
   remaining = tiva_timer32_remaining(priv->handle);
   status->timeleft = tiva_ticks2usec(priv, remaining);
 
-  timvdbg("  flags    : %08x\n", status->flags);
-  timvdbg("  timeout  : %d\n",   status->timeout);
-  timvdbg("  timeleft : %d\n",   status->timeleft);
+  tmrinfo("  flags    : %08x\n", status->flags);
+  tmrinfo("  timeout  : %d\n",   status->timeout);
+  tmrinfo("  timeleft : %d\n",   status->timeleft);
   return OK;
 }
 
@@ -435,7 +431,7 @@ static int tiva_settimeout(struct timer_lowerhalf_s *lower, uint32_t timeout)
       return -EPERM;
     }
 
-  timvdbg("Entry: timeout=%d\n", timeout);
+  tmrinfo("Entry: timeout=%d\n", timeout);
 
   /* Calculate the the new time settings */
 
@@ -448,17 +444,17 @@ static int tiva_settimeout(struct timer_lowerhalf_s *lower, uint32_t timeout)
 }
 
 /****************************************************************************
- * Name: tiva_sethandler
+ * Name: tiva_setcallback
  *
  * Description:
- *   Call this user provided timeout handler.
+ *   Call this user provided timeout callback.
  *
  * Input Parameters:
- *   lower      - A pointer the publicly visible representation of the "lower-half"
- *                driver state structure.
- *   newhandler - The new timer expiration function pointer.  If this
- *                function pointer is NULL, then the reset-on-expiration
- *                behavior is restored,
+ *   lower    - A pointer the publicly visible representation of the "lower-half"
+ *              driver state structure.
+ *   callback - The new timer expiration function pointer.  If this
+ *              function pointer is NULL, then the reset-on-expiration
+ *              behavior is restored,
  *
  * Returned Values:
  *   The previous timer expiration function pointer or NULL is there was
@@ -466,28 +462,23 @@ static int tiva_settimeout(struct timer_lowerhalf_s *lower, uint32_t timeout)
  *
  ****************************************************************************/
 
-static tccb_t tiva_sethandler(struct timer_lowerhalf_s *lower,
-                              tccb_t handler)
+static void tiva_setcallback(struct timer_lowerhalf_s *lower,
+                             tccb_t callback, FAR void *arg)
 {
   struct tiva_lowerhalf_s *priv = (struct tiva_lowerhalf_s *)lower;
   irqstate_t flags;
-  tccb_t oldhandler;
 
   flags = enter_critical_section();
 
   DEBUGASSERT(priv);
-  timvdbg("Entry: handler=%p\n", handler);
+  tmrinfo("Entry: callback=%p\n", callback);
 
-  /* Get the old handler return value */
+  /* Save the new callback */
 
-  oldhandler = priv->handler;
-
-  /* Save the new handler */
-
-  priv->handler = handler;
+  priv->callback = callback;
+  priv->arg      = arg;
 
   leave_critical_section(flags);
-  return oldhandler;
 }
 
 /****************************************************************************
@@ -515,8 +506,8 @@ static int tiva_ioctl(struct timer_lowerhalf_s *lower, int cmd,
 {
   int ret = -ENOTTY;
 
-  DEBUGASSERT(priv);
-  timvdbg("Entry: cmd=%d arg=%ld\n", cmd, arg);
+  DEBUGASSERT(lower);
+  tmrinfo("Entry: cmd=%d arg=%ld\n", cmd, arg);
 
   return ret;
 }
@@ -557,7 +548,7 @@ int tiva_timer_initialize(FAR const char *devpath,
   void *drvr;
   int ret;
 
-  timvdbg("\n");
+  tmrinfo("\n");
   DEBUGASSERT(devpath);
 
   /* Allocate an instance of the lower half state structure */
@@ -565,7 +556,7 @@ int tiva_timer_initialize(FAR const char *devpath,
   priv = (struct tiva_lowerhalf_s *)kmm_zalloc(sizeof(struct tiva_lowerhalf_s));
   if (!priv)
     {
-      timdbg("ERROR: Failed to allocate driver structure\n");
+      tmrerr("ERROR: Failed to allocate driver structure\n");
       return -ENOMEM;
     }
 
@@ -577,7 +568,7 @@ int tiva_timer_initialize(FAR const char *devpath,
 #else
   if (config->cmn.alternate)
     {
-      timdbg("ERROR: Alternate clock unsupported on TM4C123 architecture\n");
+      tmrerr("ERROR: Alternate clock unsupported on TM4C123 architecture\n");
       return -ENOMEM;
     }
   else
@@ -599,7 +590,7 @@ int tiva_timer_initialize(FAR const char *devpath,
   priv->handle = tiva_gptm_configure((const struct tiva_gptmconfig_s *)&priv->config);
   if (!priv->handle)
     {
-      timdbg("ERROR: Failed to create timer handle\n");
+      tmrerr("ERROR: Failed to create timer handle\n");
       ret = -EINVAL;
       goto errout_with_alloc;
     }
diff --git a/arch/arm/src/tiva/tm4c_ethernet.c b/arch/arm/src/tiva/tm4c_ethernet.c
index eeb36a32ecc85140c7d93585d920113096d29f5e..f6c6870f4cdebce55738fc3ec110df64490fa241 100644
--- a/arch/arm/src/tiva/tm4c_ethernet.c
+++ b/arch/arm/src/tiva/tm4c_ethernet.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/tiva/tm4c_ethernet.c
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -53,11 +53,7 @@
 #include 
 #include 
 #include 
-
-#ifdef CONFIG_NET_NOINTS
-#  include 
-#endif
-
+#include 
 #include 
 #include 
 #include 
@@ -98,12 +94,23 @@
 #  error Logic to support multiple Ethernet interfaces is incomplete
 #endif
 
-/* If processing is not done at the interrupt level, then high priority
- * work queue support is required.
+/* If processing is not done at the interrupt level, then work queue support
+ * is required.
  */
 
-#if defined(CONFIG_NET_NOINTS) && !defined(CONFIG_SCHED_HPWORK)
-#  error High priority work queue support is required
+#if !defined(CONFIG_SCHED_WORKQUEUE)
+#  error Work queue support is required
+#else
+
+  /* Select work queue */
+
+#  if defined(CONFIG_TIVA_ETHERNET_HPWORK)
+#    define ETHWORK HPWORK
+#  elif defined(CONFIG_TIVA_ETHERNET_LPWORK)
+#    define ETHWORK LPWORK
+#  else
+#    error Neither CONFIG_TIVA_ETHERNET_HPWORK nor CONFIG_TIVA_ETHERNET_LPWORK defined
+#  endif
 #endif
 
 /* Are we using the internal PHY or an external PHY? */
@@ -207,10 +214,6 @@
 
 /* Ethernet buffer sizes, number of buffers, and number of descriptors */
 
-#ifndef CONFIG_NET_MULTIBUFFER
-#  error CONFIG_NET_MULTIBUFFER is required
-#endif
-
 #ifndef CONFIG_TIVA_EMAC_NRXDESC
 #  define CONFIG_TIVA_EMAC_NRXDESC 8
 #endif
@@ -247,7 +250,7 @@
  * enabled.
  */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_INFO
 #  undef CONFIG_TIVA_ETHERNET_REGDEBUG
 #endif
 
@@ -623,11 +626,12 @@ struct tiva_ethmac_s
   uint8_t              fduplex : 1; /* Full (vs. half) duplex */
   WDOG_ID              txpoll;      /* TX poll timer */
   WDOG_ID              txtimeout;   /* TX timeout timer */
-#ifdef CONFIG_NET_NOINTS
-  struct work_s        work;        /* For deferring work to the work queue */
-#endif
+  struct work_s        irqwork;     /* For deferring interrupt work to the work queue */
+  struct work_s        pollwork;    /* For deferring poll work to the work queue */
+
 #ifdef CONFIG_TIVA_PHY_INTERRUPTS
   xcpt_t               handler;     /* Attached PHY interrupt handler */
+  void                *arg;         /* Argument that accompanies the interrupt */
 #endif
 
   /* This holds the information visible to the NuttX network */
@@ -667,7 +671,7 @@ static struct tiva_ethmac_s g_tiva_ethmac[TIVA_NETHCONTROLLERS];
  ****************************************************************************/
 /* Register operations ******************************************************/
 
-#if defined(CONFIG_TIVA_ETHERNET_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_TIVA_ETHERNET_REGDEBUG) && defined(CONFIG_DEBUG_INFO)
 static uint32_t tiva_getreg(uint32_t addr);
 static void tiva_putreg(uint32_t val, uint32_t addr);
 static void tiva_checksetup(void);
@@ -701,35 +705,26 @@ static int  tiva_recvframe(FAR struct tiva_ethmac_s *priv);
 static void tiva_receive(FAR struct tiva_ethmac_s *priv);
 static void tiva_freeframe(FAR struct tiva_ethmac_s *priv);
 static void tiva_txdone(FAR struct tiva_ethmac_s *priv);
-static inline void tiva_interrupt_process(FAR struct tiva_ethmac_s *priv);
-#ifdef CONFIG_NET_NOINTS
+
 static void tiva_interrupt_work(FAR void *arg);
-#endif
-static int  tiva_interrupt(int irq, FAR void *context);
+static int  tiva_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
-static inline void tiva_txtimeout_process(FAR struct tiva_ethmac_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void tiva_txtimeout_work(FAR void *arg);
-#endif
 static void tiva_txtimeout_expiry(int argc, uint32_t arg, ...);
 
-static inline void tiva_poll_process(FAR struct tiva_ethmac_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void tiva_poll_work(FAR void *arg);
-#endif
 static void tiva_poll_expiry(int argc, uint32_t arg, ...);
 
 /* NuttX callback functions */
 
 static int  tiva_ifup(struct net_driver_s *dev);
 static int  tiva_ifdown(struct net_driver_s *dev);
-static inline void tiva_txavail_process(FAR struct tiva_ethmac_s *priv);
-#ifdef CONFIG_NET_NOINTS
+
 static void tiva_txavail_work(FAR void *arg);
-#endif
 static int  tiva_txavail(struct net_driver_s *dev);
+
 #if defined(CONFIG_NET_IGMP) || defined(CONFIG_NET_ICMPv6)
 static int  tiva_addmac(struct net_driver_s *dev, FAR const uint8_t *mac);
 #endif
@@ -787,7 +782,7 @@ static int  tive_emac_configure(FAR struct tiva_ethmac_s *priv);
  *
  ****************************************************************************/
 
-#if defined(CONFIG_TIVA_ETHERNET_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_TIVA_ETHERNET_REGDEBUG) && defined(CONFIG_DEBUG_INFO)
 static uint32_t tiva_getreg(uint32_t addr)
 {
   static uint32_t prevaddr = 0;
@@ -808,7 +803,7 @@ static uint32_t tiva_getreg(uint32_t addr)
         {
           if (count == 4)
             {
-              lldbg("...\n");
+              _info("...\n");
             }
 
           return val;
@@ -825,7 +820,7 @@ static uint32_t tiva_getreg(uint32_t addr)
         {
           /* Yes.. then show how many times the value repeated */
 
-          lldbg("[repeats %d more times]\n", count-3);
+          _info("[repeats %d more times]\n", count-3);
         }
 
       /* Save the new address, value, and count */
@@ -837,7 +832,7 @@ static uint32_t tiva_getreg(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%08x\n", addr, val);
+  _info("%08x->%08x\n", addr, val);
   return val;
 }
 #endif
@@ -859,12 +854,12 @@ static uint32_t tiva_getreg(uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_TIVA_ETHERNET_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_TIVA_ETHERNET_REGDEBUG) && defined(CONFIG_DEBUG_INFO)
 static void tiva_putreg(uint32_t val, uint32_t addr)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", addr, val);
+  _info("%08x<-%08x\n", addr, val);
 
   /* Write the value */
 
@@ -886,7 +881,7 @@ static void tiva_putreg(uint32_t val, uint32_t addr)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_TIVA_ETHERNET_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_TIVA_ETHERNET_REGDEBUG) && defined(CONFIG_DEBUG_INFO)
 static void tiva_checksetup(void)
 {
 }
@@ -1051,7 +1046,7 @@ static int tiva_transmit(FAR struct tiva_ethmac_s *priv)
   txdesc  = priv->txhead;
   txfirst = txdesc;
 
-  nvdbg("d_len: %d d_buf: %p txhead: %p tdes0: %08x\n",
+  ninfo("d_len: %d d_buf: %p txhead: %p tdes0: %08x\n",
         priv->dev.d_len, priv->dev.d_buf, txdesc, txdesc->tdes0);
 
   DEBUGASSERT(txdesc && (txdesc->tdes0 & EMAC_TDES0_OWN) == 0);
@@ -1068,7 +1063,7 @@ static int tiva_transmit(FAR struct tiva_ethmac_s *priv)
       bufcount = (priv->dev.d_len + (OPTIMAL_EMAC_BUFSIZE-1)) / OPTIMAL_EMAC_BUFSIZE;
       lastsize = priv->dev.d_len - (bufcount - 1) * OPTIMAL_EMAC_BUFSIZE;
 
-      nvdbg("bufcount: %d lastsize: %d\n", bufcount, lastsize);
+      ninfo("bufcount: %d lastsize: %d\n", bufcount, lastsize);
 
       /* Set the first segment bit in the first TX descriptor */
 
@@ -1178,7 +1173,7 @@ static int tiva_transmit(FAR struct tiva_ethmac_s *priv)
 
   priv->inflight++;
 
-  nvdbg("txhead: %p txtail: %p inflight: %d\n",
+  ninfo("txhead: %p txtail: %p inflight: %d\n",
         priv->txhead, priv->txtail, priv->inflight);
 
   /* If all TX descriptors are in-flight, then we have to disable receive interrupts
@@ -1477,7 +1472,7 @@ static void tiva_freesegment(FAR struct tiva_ethmac_s *priv,
   struct emac_rxdesc_s *rxdesc;
   int i;
 
-  nvdbg("rxfirst: %p segments: %d\n", rxfirst, segments);
+  ninfo("rxfirst: %p segments: %d\n", rxfirst, segments);
 
   /* Set OWN bit in RX descriptors.  This gives the buffers back to DMA */
 
@@ -1535,7 +1530,7 @@ static int tiva_recvframe(FAR struct tiva_ethmac_s *priv)
   uint8_t *buffer;
   int i;
 
-  nvdbg("rxhead: %p rxcurr: %p segments: %d\n",
+  ninfo("rxhead: %p rxcurr: %p segments: %d\n",
         priv->rxhead, priv->rxcurr, priv->segments);
 
   /* Check if there are free buffers.  We cannot receive new frames in this
@@ -1544,7 +1539,7 @@ static int tiva_recvframe(FAR struct tiva_ethmac_s *priv)
 
   if (!tiva_isfreebuffer(priv))
     {
-      nlldbg("No free buffers\n");
+      nerr("ERROR: No free buffers\n");
       return -ENOMEM;
     }
 
@@ -1601,7 +1596,7 @@ static int tiva_recvframe(FAR struct tiva_ethmac_s *priv)
               rxcurr = priv->rxcurr;
             }
 
-          nvdbg("rxhead: %p rxcurr: %p segments: %d\n",
+          ninfo("rxhead: %p rxcurr: %p segments: %d\n",
                 priv->rxhead, priv->rxcurr, priv->segments);
 
           /* Check if any errors are reported in the frame */
@@ -1640,7 +1635,7 @@ static int tiva_recvframe(FAR struct tiva_ethmac_s *priv)
               priv->rxhead   = (struct emac_rxdesc_s *)rxdesc->rdes3;
               tiva_freesegment(priv, rxcurr, priv->segments);
 
-              nvdbg("rxhead: %p d_buf: %p d_len: %d\n",
+              ninfo("rxhead: %p d_buf: %p d_len: %d\n",
                     priv->rxhead, dev->d_buf, dev->d_len);
 
               return OK;
@@ -1651,7 +1646,7 @@ static int tiva_recvframe(FAR struct tiva_ethmac_s *priv)
                * scanning logic, and continue scanning with the next frame.
                */
 
-              nlldbg("DROPPED: RX descriptor errors: %08x\n", rxdesc->rdes0);
+              nwarn("DROPPED: RX descriptor errors: %08x\n", rxdesc->rdes0);
               tiva_freesegment(priv, rxcurr, priv->segments);
             }
         }
@@ -1667,7 +1662,7 @@ static int tiva_recvframe(FAR struct tiva_ethmac_s *priv)
 
   priv->rxhead = rxdesc;
 
-  nvdbg("rxhead: %p rxcurr: %p segments: %d\n",
+  ninfo("rxhead: %p rxcurr: %p segments: %d\n",
         priv->rxhead, priv->rxcurr, priv->segments);
 
   return -EAGAIN;
@@ -1712,7 +1707,7 @@ static void tiva_receive(FAR struct tiva_ethmac_s *priv)
 
       if (dev->d_len > CONFIG_NET_ETH_MTU)
         {
-          nlldbg("DROPPED: Too big: %d\n", dev->d_len);
+          nwarn("DROPPED: Too big: %d\n", dev->d_len);
         }
       else
 
@@ -1721,7 +1716,7 @@ static void tiva_receive(FAR struct tiva_ethmac_s *priv)
 #ifdef CONFIG_NET_IPv4
       if (BUF->type == HTONS(ETHTYPE_IP))
         {
-          nllvdbg("IPv4 frame\n");
+          ninfo("IPv4 frame\n");
 
           /* Handle ARP on input then give the IPv4 packet to the network
            * layer
@@ -1760,7 +1755,7 @@ static void tiva_receive(FAR struct tiva_ethmac_s *priv)
 #ifdef CONFIG_NET_IPv6
       if (BUF->type == HTONS(ETHTYPE_IP6))
         {
-          nllvdbg("IPv6 frame\n");
+          ninfo("IPv6 frame\n");
 
           /* Give the IPv6 packet to the network layer */
 
@@ -1797,7 +1792,7 @@ static void tiva_receive(FAR struct tiva_ethmac_s *priv)
 #ifdef CONFIG_NET_ARP
       if (BUF->type == htons(ETHTYPE_ARP))
         {
-          nvdbg("ARP frame\n");
+          ninfo("ARP frame\n");
 
           /* Handle ARP packet */
 
@@ -1815,7 +1810,7 @@ static void tiva_receive(FAR struct tiva_ethmac_s *priv)
       else
 #endif
         {
-          nlldbg("DROPPED: Unknown type: %04x\n", BUF->type);
+          nwarn("DROPPED: Unknown type: %04x\n", BUF->type);
         }
 
       /* We are finished with the RX buffer.  NOTE:  If the buffer is
@@ -1856,7 +1851,7 @@ static void tiva_freeframe(FAR struct tiva_ethmac_s *priv)
   FAR struct emac_txdesc_s *txdesc;
   int i;
 
-  nvdbg("txhead: %p txtail: %p inflight: %d\n",
+  ninfo("txhead: %p txtail: %p inflight: %d\n",
         priv->txhead, priv->txtail, priv->inflight);
 
   /* Scan for "in-flight" descriptors owned by the CPU */
@@ -1872,7 +1867,7 @@ static void tiva_freeframe(FAR struct tiva_ethmac_s *priv)
            * TX descriptors.
            */
 
-          nvdbg("txtail: %p tdes0: %08x tdes2: %08x tdes3: %08x\n",
+          ninfo("txtail: %p tdes0: %08x tdes2: %08x tdes3: %08x\n",
                 txdesc, txdesc->tdes0, txdesc->tdes2, txdesc->tdes3);
 
           DEBUGASSERT(txdesc->tdes2 != 0);
@@ -1925,7 +1920,7 @@ static void tiva_freeframe(FAR struct tiva_ethmac_s *priv)
 
       priv->txtail = txdesc;
 
-      nvdbg("txhead: %p txtail: %p inflight: %d\n",
+      ninfo("txhead: %p txtail: %p inflight: %d\n",
             priv->txhead, priv->txtail, priv->inflight);
     }
 }
@@ -1967,14 +1962,6 @@ static void tiva_txdone(FAR struct tiva_ethmac_s *priv)
 
       wd_cancel(priv->txtimeout);
 
-      /* Then make sure that the TX poll timer is running (if it is already
-       * running, the following would restart it).  This is necessary to
-       * avoid certain race conditions where the polling sequence can be
-       * interrupted.
-       */
-
-      (void)wd_start(priv->txpoll, TIVA_WDDELAY, tiva_poll_expiry, 1, (uint32_t)priv);
-
       /* And disable further TX interrupts. */
 
       tiva_disableint(priv, EMAC_DMAINT_TI);
@@ -1986,27 +1973,33 @@ static void tiva_txdone(FAR struct tiva_ethmac_s *priv)
 }
 
 /****************************************************************************
- * Function: tiva_interrupt_process
+ * Function: tiva_interrupt_work
  *
  * Description:
- *   Interrupt processing.  This may be performed either within the interrupt
- *   handler or on the worker thread, depending upon the configuration
+ *   Perform interrupt related work from the worker thread
  *
  * Parameters:
- *   priv  - Reference to the driver state structure
+ *   arg - The argument passed when work_queue() was called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
  *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static inline void tiva_interrupt_process(FAR struct tiva_ethmac_s *priv)
+static void tiva_interrupt_work(FAR void *arg)
 {
+  FAR struct tiva_ethmac_s *priv = (FAR struct tiva_ethmac_s *)arg;
   uint32_t dmaris;
 
+  DEBUGASSERT(priv);
+
+  /* Process pending Ethernet interrupts */
+
+  net_lock();
+
   /* Get the DMA interrupt status bits (no MAC interrupts are expected) */
 
   dmaris = tiva_getreg(TIVA_EMAC_DMARIS);
@@ -2067,7 +2060,7 @@ static inline void tiva_interrupt_process(FAR struct tiva_ethmac_s *priv)
     {
       /* Just let the user know what happened */
 
-      nlldbg("Abnormal event(s): %08x\n", dmaris);
+      nerr("ERROR: Abnormal event(s): %08x\n", dmaris);
 
       /* Clear all pending abnormal events */
 
@@ -2078,44 +2071,13 @@ static inline void tiva_interrupt_process(FAR struct tiva_ethmac_s *priv)
       tiva_putreg(EMAC_DMAINT_AIS, TIVA_EMAC_DMARIS);
     }
 #endif
-}
 
-/****************************************************************************
- * Function: tiva_interrupt_work
- *
- * Description:
- *   Perform interrupt related work from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() was called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void tiva_interrupt_work(FAR void *arg)
-{
-  FAR struct tiva_ethmac_s *priv = (FAR struct tiva_ethmac_s *)arg;
-  net_lock_t state;
-
-  DEBUGASSERT(priv);
-
-  /* Process pending Ethernet interrupts */
-
-  state = net_lock();
-  tiva_interrupt_process(priv);
-  net_unlock(state);
+  net_unlock();
 
   /* Re-enable Ethernet interrupts at the NVIC */
 
   up_enable_irq(TIVA_IRQ_ETHCON);
 }
-#endif
 
 /****************************************************************************
  * Function: tiva_interrupt
@@ -2134,11 +2096,9 @@ static void tiva_interrupt_work(FAR void *arg)
  *
  ****************************************************************************/
 
-static int tiva_interrupt(int irq, FAR void *context)
+static int tiva_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   FAR struct tiva_ethmac_s *priv = &g_tiva_ethmac[0];
-
-#ifdef CONFIG_NET_NOINTS
   uint32_t dmaris;
 
   /* Get the raw interrupt status. */
@@ -2165,21 +2125,11 @@ static int tiva_interrupt(int irq, FAR void *context)
            wd_cancel(priv->txtimeout);
         }
 
-      /* Cancel any pending poll work */
-
-      work_cancel(HPWORK, &priv->work);
-
       /* Schedule to perform the interrupt processing on the worker thread. */
 
-      work_queue(HPWORK, &priv->work, tiva_interrupt_work, priv, 0);
+      work_queue(ETHWORK, &priv->irqwork, tiva_interrupt_work, priv, 0);
     }
 
-#else
-  /* Process the interrupt now */
-
-  tiva_interrupt_process(priv);
-#endif
-
 #ifdef CONFIG_TIVA_PHY_INTERRUPTS
   /* Check for pending PHY interrupts */
 
@@ -2191,9 +2141,9 @@ static int tiva_interrupt(int irq, FAR void *context)
 
       /* Dispatch to the registered handler */
 
-      if (priv->handler)
+      if (priv->handler != NULL)
         {
-          (void)priv->handler(irq, context);
+          (void)priv->handler(irq, context, priv->arg);
         }
     }
 #endif
@@ -2201,38 +2151,6 @@ static int tiva_interrupt(int irq, FAR void *context)
   return OK;
 }
 
-/****************************************************************************
- * Function: tiva_txtimeout_process
- *
- * Description:
- *   Process a TX timeout.  Called from the either the watchdog timer
- *   expiration logic or from the worker thread, depending upon the
- *   configuration.  The timeout means that the last TX never completed.
- *   Reset the hardware and start again.
- *
- * Parameters:
- *   priv  - Reference to the driver state structure
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Global interrupts are disabled by the watchdog logic.
- *
- ****************************************************************************/
-
-static inline void tiva_txtimeout_process(FAR struct tiva_ethmac_s *priv)
-{
-  /* Reset the hardware.  Just take the interface down, then back up again. */
-
-  tiva_ifdown(&priv->dev);
-  tiva_ifup(&priv->dev);
-
-  /* Then poll the network for new XMIT data */
-
-  tiva_dopoll(priv);
-}
-
 /****************************************************************************
  * Function: tiva_txtimeout_work
  *
@@ -2250,19 +2168,21 @@ static inline void tiva_txtimeout_process(FAR struct tiva_ethmac_s *priv)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_NET_NOINTS
 static void tiva_txtimeout_work(FAR void *arg)
 {
   FAR struct tiva_ethmac_s *priv = (FAR struct tiva_ethmac_s *)arg;
-  net_lock_t state;
 
-  /* Process pending Ethernet interrupts */
+  /* Reset the hardware.  Just take the interface down, then back up again. */
 
-  state = net_lock();
-  tiva_txtimeout_process(priv);
-  net_unlock(state);
+  net_lock();
+  tiva_ifdown(&priv->dev);
+  tiva_ifup(&priv->dev);
+
+  /* Then poll the network for new XMIT data */
+
+  tiva_dopoll(priv);
+  net_unlock();
 }
-#endif
 
 /****************************************************************************
  * Function: tiva_txtimeout_expiry
@@ -2287,9 +2207,8 @@ static void tiva_txtimeout_expiry(int argc, uint32_t arg, ...)
 {
   FAR struct tiva_ethmac_s *priv = (FAR struct tiva_ethmac_s *)arg;
 
-  nlldbg("Timeout!\n");
+  nerr("ERROR: Timeout!\n");
 
-#ifdef CONFIG_NET_NOINTS
   /* Disable further Ethernet interrupts.  This will prevent some race
    * conditions with interrupt work.  There is still a potential race
    * condition with interrupt work that is already queued and in progress.
@@ -2299,42 +2218,31 @@ static void tiva_txtimeout_expiry(int argc, uint32_t arg, ...)
 
   up_disable_irq(TIVA_IRQ_ETHCON);
 
-  /* Cancel any pending poll or interrupt work.  This will have no effect
-   * on work that has already been started.
-   */
-
-  work_cancel(HPWORK, &priv->work);
-
   /* Schedule to perform the TX timeout processing on the worker thread. */
 
-  work_queue(HPWORK, &priv->work, tiva_txtimeout_work, priv, 0);
-
-#else
-  /* Process the timeout now */
-
-  tiva_txtimeout_process(priv);
-#endif
+  work_queue(ETHWORK, &priv->irqwork, tiva_txtimeout_work, priv, 0);
 }
 
 /****************************************************************************
- * Function: tiva_poll_process
+ * Function: tiva_poll_work
  *
  * Description:
- *   Perform the periodic poll.  This may be called either from watchdog
- *   timer logic or from the worker thread, depending upon the configuration.
+ *   Perform periodic polling from the worker thread
  *
  * Parameters:
- *   priv  - Reference to the driver state structure
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
+ *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static inline void tiva_poll_process(FAR struct tiva_ethmac_s *priv)
+static void tiva_poll_work(FAR void *arg)
 {
+  FAR struct tiva_ethmac_s *priv = (FAR struct tiva_ethmac_s *)arg;
   FAR struct net_driver_s *dev  = &priv->dev;
 
   /* Check if the next TX descriptor is owned by the Ethernet DMA or CPU.  We
@@ -2348,6 +2256,7 @@ static inline void tiva_poll_process(FAR struct tiva_ethmac_s *priv)
    * CONFIG_TIVA_EMAC_NTXDESC).
    */
 
+  net_lock();
   if ((priv->txhead->tdes0 & EMAC_TDES0_OWN) == 0 &&
        priv->txhead->tdes2 == 0)
     {
@@ -2382,40 +2291,11 @@ static inline void tiva_poll_process(FAR struct tiva_ethmac_s *priv)
 
   /* Setup the watchdog poll timer again */
 
-  (void)wd_start(priv->txpoll, TIVA_WDDELAY, tiva_poll_expiry, 1, (uint32_t)priv);
+  (void)wd_start(priv->txpoll, TIVA_WDDELAY, tiva_poll_expiry,
+                 1, (uint32_t)priv);
+  net_unlock();
 }
 
-/****************************************************************************
- * Function: tiva_poll_work
- *
- * Description:
- *   Perform periodic polling from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() as called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void tiva_poll_work(FAR void *arg)
-{
-  FAR struct tiva_ethmac_s *priv = (FAR struct tiva_ethmac_s *)arg;
-  net_lock_t state;
-
-  /* Perform the poll */
-
-  state = net_lock();
-  tiva_poll_process(priv);
-  net_unlock(state);
-}
-#endif
-
 /****************************************************************************
  * Function: tiva_poll_expiry
  *
@@ -2438,31 +2318,9 @@ static void tiva_poll_expiry(int argc, uint32_t arg, ...)
 {
   FAR struct tiva_ethmac_s *priv = (FAR struct tiva_ethmac_s *)arg;
 
-#ifdef CONFIG_NET_NOINTS
-  /* Is our single work structure available?  It may not be if there are
-   * pending interrupt actions.
-   */
-
-  if (work_available(&priv->work))
-    {
-      /* Schedule to perform the interrupt processing on the worker thread. */
-
-      work_queue(HPWORK, &priv->work, tiva_poll_work, priv, 0);
-    }
-  else
-    {
-      /* No.. Just re-start the watchdog poll timer, missing one polling
-       * cycle.
-       */
-
-      (void)wd_start(priv->txpoll, TIVA_WDDELAY, tiva_poll_expiry, 1, (uint32_t)priv);
-    }
+  /* Schedule to perform the interrupt processing on the worker thread. */
 
-#else
-  /* Process the interrupt now */
-
-  tiva_poll_process(priv);
-#endif
+  work_queue(ETHWORK, &priv->pollwork, tiva_poll_work, priv, 0);
 }
 
 /****************************************************************************
@@ -2488,15 +2346,15 @@ static int tiva_ifup(struct net_driver_s *dev)
   int ret;
 
 #ifdef CONFIG_NET_IPv4
-  ndbg("Bringing up: %d.%d.%d.%d\n",
-       dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-       (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 #endif
 #ifdef CONFIG_NET_IPv6
-  ndbg("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
-       dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
-       dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
-       dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
+  ninfo("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+        dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
+        dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
+        dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
 #endif
 
   /* Configure the Ethernet interface for DMA operation. */
@@ -2509,7 +2367,8 @@ static int tiva_ifup(struct net_driver_s *dev)
 
   /* Set and activate a timer process */
 
-  (void)wd_start(priv->txpoll, TIVA_WDDELAY, tiva_poll_expiry, 1, (uint32_t)priv);
+  (void)wd_start(priv->txpoll, TIVA_WDDELAY, tiva_poll_expiry,
+                 1, (uint32_t)priv);
 
   /* Enable the Ethernet interrupt */
 
@@ -2541,7 +2400,7 @@ static int tiva_ifdown(struct net_driver_s *dev)
   FAR struct tiva_ethmac_s *priv = (FAR struct tiva_ethmac_s *)dev->d_private;
   irqstate_t flags;
 
-  nvdbg("Taking the network down\n");
+  ninfo("Taking the network down\n");
 
   /* Disable the Ethernet interrupt */
 
@@ -2568,66 +2427,40 @@ static int tiva_ifdown(struct net_driver_s *dev)
 }
 
 /****************************************************************************
- * Function: tiva_txavail_process
+ * Function: tiva_txavail_work
  *
  * Description:
- *   Perform an out-of-cycle poll.
+ *   Perform an out-of-cycle poll on the worker thread.
  *
  * Parameters:
- *   priv - Reference to the NuttX driver state structure
+ *   arg  - Reference to the NuttX driver state structure (cast to void*)
  *
  * Returned Value:
  *   None
  *
  * Assumptions:
- *   Called in normal user mode
+ *   Called on the higher priority worker thread.
  *
  ****************************************************************************/
 
-static inline void tiva_txavail_process(FAR struct tiva_ethmac_s *priv)
+static void tiva_txavail_work(FAR void *arg)
 {
-  nvdbg("ifup: %d\n", priv->ifup);
+  FAR struct tiva_ethmac_s *priv = (FAR struct tiva_ethmac_s *)arg;
+
+  ninfo("ifup: %d\n", priv->ifup);
 
   /* Ignore the notification if the interface is not yet up */
 
+  net_lock();
   if (priv->ifup)
     {
       /* Poll the network for new XMIT data */
 
       tiva_dopoll(priv);
     }
-}
 
-/****************************************************************************
- * Function: tiva_txavail_work
- *
- * Description:
- *   Perform an out-of-cycle poll on the worker thread.
- *
- * Parameters:
- *   arg  - Reference to the NuttX driver state structure (cast to void*)
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Called on the higher priority worker thread.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void tiva_txavail_work(FAR void *arg)
-{
-  FAR struct tiva_ethmac_s *priv = (FAR struct tiva_ethmac_s *)arg;
-  net_lock_t state;
-
-  /* Perform the poll */
-
-  state = net_lock();
-  tiva_txavail_process(priv);
-  net_unlock(state);
+  net_unlock();
 }
-#endif
 
 /****************************************************************************
  * Function: tiva_txavail
@@ -2652,34 +2485,18 @@ static int tiva_txavail(struct net_driver_s *dev)
 {
   FAR struct tiva_ethmac_s *priv = (FAR struct tiva_ethmac_s *)dev->d_private;
 
-#ifdef CONFIG_NET_NOINTS
   /* Is our single work structure available?  It may not be if there are
    * pending interrupt actions and we will have to ignore the Tx
    * availability action.
    */
 
-  if (work_available(&priv->work))
+  if (work_available(&priv->pollwork))
     {
       /* Schedule to serialize the poll on the worker thread. */
 
-      work_queue(HPWORK, &priv->work, tiva_txavail_work, priv, 0);
+      work_queue(ETHWORK, &priv->pollwork, tiva_txavail_work, priv, 0);
     }
 
-#else
-  irqstate_t flags;
-
-  /* Disable interrupts because this function may be called from interrupt
-   * level processing.
-   */
-
-  flags = enter_critical_section();
-
-  /* Perform the out-of-cycle poll now */
-
-  tiva_txavail_process(priv);
-  leave_critical_section(flags);
-#endif
-
   return OK;
 }
 
@@ -2753,7 +2570,7 @@ static int tiva_addmac(struct net_driver_s *dev, FAR const uint8_t *mac)
   uint32_t temp;
   uint32_t registeraddress;
 
-  nvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
         mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Add the MAC address to the hardware multicast hash table */
@@ -2810,7 +2627,7 @@ static int tiva_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac)
   uint32_t temp;
   uint32_t registeraddress;
 
-  nvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
         mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Remove the MAC address to the hardware multicast hash table */
@@ -3236,7 +3053,7 @@ static int tiva_phyread(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t *valu
         }
     }
 
-  ndbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n",
+  nerr("ERROR: MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n",
        phydevaddr, phyregaddr);
 
   return -ETIMEDOUT;
@@ -3295,7 +3112,7 @@ static int tiva_phywrite(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t valu
         }
     }
 
-  ndbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n",
+  nerr("ERROR: MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n",
        phydevaddr, phyregaddr, value);
 
   return -ETIMEDOUT;
@@ -3343,7 +3160,7 @@ static int tiva_phyinit(FAR struct tiva_ethmac_s *priv)
   ret = tiva_phywrite(CONFIG_TIVA_PHYADDR, MII_MCR, MII_MCR_RESET);
   if (ret < 0)
     {
-      ndbg("Failed to reset the PHY: %d\n", ret);
+      nerr("ERROR: Failed to reset the PHY: %d\n", ret);
       return ret;
     }
 
@@ -3359,7 +3176,7 @@ static int tiva_phyinit(FAR struct tiva_ethmac_s *priv)
       ret = tiva_phyread(CONFIG_TIVA_PHYADDR, MII_MSR, &phyval);
       if (ret < 0)
         {
-          ndbg("Failed to read the PHY MSR: %d\n", ret);
+          nerr("ERROR: Failed to read the PHY MSR: %d\n", ret);
           return ret;
         }
       else if ((phyval & MII_MSR_LINKSTATUS) != 0)
@@ -3370,7 +3187,7 @@ static int tiva_phyinit(FAR struct tiva_ethmac_s *priv)
 
   if (timeout >= PHY_RETRY_TIMEOUT)
     {
-      ndbg("Timed out waiting for link status: %04x\n", phyval);
+      nerr("ERROR: Timed out waiting for link status: %04x\n", phyval);
       return -ETIMEDOUT;
     }
 
@@ -3379,7 +3196,7 @@ static int tiva_phyinit(FAR struct tiva_ethmac_s *priv)
   ret = tiva_phywrite(CONFIG_TIVA_PHYADDR, MII_MCR, MII_MCR_ANENABLE);
   if (ret < 0)
     {
-      ndbg("Failed to enable auto-negotiation: %d\n", ret);
+      nerr("ERROR: Failed to enable auto-negotiation: %d\n", ret);
       return ret;
     }
 
@@ -3390,7 +3207,7 @@ static int tiva_phyinit(FAR struct tiva_ethmac_s *priv)
       ret = tiva_phyread(CONFIG_TIVA_PHYADDR, MII_MSR, &phyval);
       if (ret < 0)
         {
-          ndbg("Failed to read the PHY MSR: %d\n", ret);
+          nerr("ERROR: Failed to read the PHY MSR: %d\n", ret);
           return ret;
         }
       else if ((phyval & MII_MSR_ANEGCOMPLETE) != 0)
@@ -3401,7 +3218,7 @@ static int tiva_phyinit(FAR struct tiva_ethmac_s *priv)
 
   if (timeout >= PHY_RETRY_TIMEOUT)
     {
-      ndbg("Timed out waiting for auto-negotiation\n");
+      nerr("ERROR: Timed out waiting for auto-negotiation\n");
       return -ETIMEDOUT;
     }
 
@@ -3410,13 +3227,13 @@ static int tiva_phyinit(FAR struct tiva_ethmac_s *priv)
   ret = tiva_phyread(CONFIG_TIVA_PHYADDR, CONFIG_TIVA_PHYSR, &phyval);
   if (ret < 0)
     {
-      ndbg("Failed to read PHY status register\n");
+      nerr("ERROR: Failed to read PHY status register\n");
       return ret;
     }
 
   /* Remember the selected speed and duplex modes */
 
-  nvdbg("PHYSR[%d]: %04x\n", CONFIG_TIVA_PHYSR, phyval);
+  ninfo("PHYSR[%d]: %04x\n", CONFIG_TIVA_PHYSR, phyval);
 
   /* Different PHYs present speed and mode information in different ways.  IF
    * This CONFIG_TIVA_PHYSR_ALTCONFIG is selected, this indicates that the PHY
@@ -3480,7 +3297,7 @@ static int tiva_phyinit(FAR struct tiva_ethmac_s *priv)
   ret = tiva_phywrite(CONFIG_TIVA_PHYADDR, MII_MCR, phyval);
   if (ret < 0)
     {
-     ndbg("Failed to write the PHY MCR: %d\n", ret);
+     nerr("ERROR: Failed to write the PHY MCR: %d\n", ret);
       return ret;
     }
   up_mdelay(PHY_CONFIG_DELAY);
@@ -3495,9 +3312,9 @@ static int tiva_phyinit(FAR struct tiva_ethmac_s *priv)
 #endif
 #endif
 
-  ndbg("Duplex: %s Speed: %d MBps\n",
-       priv->fduplex ? "FULL" : "HALF",
-       priv->mbps100 ? 100 : 10);
+  ninfo("Duplex: %s Speed: %d MBps\n",
+        priv->fduplex ? "FULL" : "HALF",
+        priv->mbps100 ? 100 : 10);
 
   return OK;
 }
@@ -3599,7 +3416,7 @@ static inline void tiva_phy_initialize(FAR struct tiva_ethmac_s *priv)
 {
   /* Enable the clock to the PHY module */
 
-  nllvdbg("Enable EPHY clocking\n");
+  ninfo("Enable EPHY clocking\n");
   tiva_ephy_enableclk();
 
   /* What until the PREPHY register indicates that the PHY is ready before
@@ -3611,7 +3428,7 @@ static inline void tiva_phy_initialize(FAR struct tiva_ethmac_s *priv)
 
   /* Enable power to the Ethernet PHY */
 
-  nllvdbg("Enable EPHY power\n");
+  ninfo("Enable EPHY power\n");
   tiva_ephy_enablepwr();
 
   /* What until the PREPHY register indicates that the PHY registers are ready
@@ -3621,11 +3438,11 @@ static inline void tiva_phy_initialize(FAR struct tiva_ethmac_s *priv)
   while (!tiva_ephy_periphrdy());
   up_udelay(250);
 
-  nllvdbg("RCGCEPHY: %08x PCEPHY: %08x PREPHY: %08x\n",
-          getreg32(TIVA_SYSCON_RCGCEPHY),
-          getreg32(TIVA_SYSCON_PCEPHY),
-          getreg32(TIVA_SYSCON_PREPHY));
-  nllvdbg("Configure PHY GPIOs\n");
+  ninfo("RCGCEPHY: %08x PCEPHY: %08x PREPHY: %08x\n",
+        getreg32(TIVA_SYSCON_RCGCEPHY),
+        getreg32(TIVA_SYSCON_PCEPHY),
+        getreg32(TIVA_SYSCON_PREPHY));
+  ninfo("Configure PHY GPIOs\n");
 
 #ifdef CONFIG_TIVA_PHY_INTERNAL
   /* Integrated PHY:
@@ -3757,7 +3574,6 @@ static inline void tiva_phy_initialize(FAR struct tiva_ethmac_s *priv)
   tiva_configgpio(GPIO_EN0_RMII_RXD1);
   tiva_configgpio(GPIO_EN0_RMII_TXD0);
   tiva_configgpio(GPIO_EN0_RMII_TXD1);
-  /* tiva_configgpio(GPIO_EN0_RMII_TX_CLK); not needed? */
   tiva_configgpio(GPIO_EN0_RMII_TX_EN);
 
 #endif
@@ -3931,7 +3747,7 @@ static void tiva_macaddress(FAR struct tiva_ethmac_s *priv)
   FAR struct net_driver_s *dev = &priv->dev;
   uint32_t regval;
 
-  nvdbg("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+  ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
         dev->d_ifname,
         dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
         dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
@@ -3999,7 +3815,7 @@ static void tiva_ipv6multicast(FAR struct tiva_ethmac_s *priv)
   mac[4] = tmp16 & 0xff;
   mac[5] = tmp16 >> 8;
 
-  nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+  ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
         mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   (void)tiva_addmac(dev, mac);
@@ -4129,12 +3945,12 @@ static int tive_emac_configure(FAR struct tiva_ethmac_s *priv)
 
   /* Reset the Ethernet block */
 
-  nvdbg("Reset the Ethernet block\n");
+  ninfo("Reset the Ethernet block\n");
   tiva_ethreset(priv);
 
   /* Initialize the PHY */
 
-  nvdbg("Initialize the PHY\n");
+  ninfo("Initialize the PHY\n");
   ret = tiva_phyinit(priv);
   if (ret < 0)
     {
@@ -4143,7 +3959,7 @@ static int tive_emac_configure(FAR struct tiva_ethmac_s *priv)
 
   /* Initialize the MAC and DMA */
 
-  nvdbg("Initialize the MAC and DMA\n");
+  ninfo("Initialize the MAC and DMA\n");
   ret = tiva_macconfig(priv);
   if (ret < 0)
     {
@@ -4164,7 +3980,7 @@ static int tive_emac_configure(FAR struct tiva_ethmac_s *priv)
 
   /* Enable normal MAC operation */
 
-  nvdbg("Enable normal operation\n");
+  ninfo("Enable normal operation\n");
   return tiva_macenable(priv);
 }
 
@@ -4201,7 +4017,7 @@ int tiva_ethinitialize(int intf)
   struct tiva_ethmac_s *priv;
   uint32_t regval;
 
-  nllvdbg("intf: %d\n", intf);
+  ninfo("intf: %d\n", intf);
 
   /* Get the interface structure associated with this interface number. */
 
@@ -4247,7 +4063,7 @@ int tiva_ethinitialize(int intf)
    *   bringing it a fully functional state.
    */
 
-  nllvdbg("Enable EMAC clocking\n");
+  ninfo("Enable EMAC clocking\n");
   tiva_emac_enablepwr();   /* Ethernet MAC Power Control */
   tiva_emac_enableclk();   /* Ethernet MAC Run Mode Clock Gating Control */
 
@@ -4260,11 +4076,11 @@ int tiva_ethinitialize(int intf)
 
   /* Show all EMAC clocks */
 
-  nllvdbg("RCGCEMAC: %08x PCEMAC: %08x PREMAC: %08x MOSCCTL: %08x\n",
-          getreg32(TIVA_SYSCON_RCGCEMAC),
-          getreg32(TIVA_SYSCON_PCEMAC),
-          getreg32(TIVA_SYSCON_PREMAC),
-          getreg32(TIVA_SYSCON_MOSCCTL));
+  ninfo("RCGCEMAC: %08x PCEMAC: %08x PREMAC: %08x MOSCCTL: %08x\n",
+        getreg32(TIVA_SYSCON_RCGCEMAC),
+        getreg32(TIVA_SYSCON_PCEMAC),
+        getreg32(TIVA_SYSCON_PREMAC),
+        getreg32(TIVA_SYSCON_MOSCCTL));
 
   /* Configure clocking and GPIOs to support the internal/eternal PHY */
 
@@ -4272,7 +4088,7 @@ int tiva_ethinitialize(int intf)
 
   /* Attach the IRQ to the driver */
 
-  if (irq_attach(TIVA_IRQ_ETHCON, tiva_interrupt))
+  if (irq_attach(TIVA_IRQ_ETHCON, tiva_interrupt, NULL))
     {
       /* We could not attach the ISR to the interrupt */
 
@@ -4309,7 +4125,7 @@ int tiva_ethinitialize(int intf)
 
   /* Register the device with the OS so that socket IOCTLs can be performed */
 
-  nllvdbg("Registering Ethernet device\n");
+  ninfo("Registering Ethernet device\n");
   return netdev_register(&priv->dev, NET_LL_ETHERNET);
 }
 
@@ -4392,26 +4208,25 @@ void up_netinitialize(void)
  *             asserts an interrupt.  Must reside in OS space, but can
  *             signal tasks in user space.  A value of NULL can be passed
  *             in order to detach and disable the PHY interrupt.
+ *   arg     - The argument that will accompany the interrupt
  *   enable  - A function pointer that be unsed to enable or disable the
  *             PHY interrupt.
  *
  * Returned Value:
- *   The previous PHY interrupt handler address is returned.  This allows you
- *   to temporarily replace an interrupt handler, then restore the original
- *   interrupt handler.  NULL is returned if there is was not handler in
- *   place when the call was made.
+ *   Zero (OK) returned on success; a negated errno value is returned on
+ *   failure.
  *
  ****************************************************************************/
 
 #ifdef CONFIG_TIVA_PHY_INTERRUPTS
-xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
+int arch_phy_irq(FAR const char *intf, xcpt_t handler, void *arg,
+                 phy_enable_t *enable)
 {
   struct tiva_ethmac_s *priv;
   irqstate_t flags;
-  xcpt_t oldhandler;
 
   DEBUGASSERT(intf);
-  nvdbg("%s: handler=%p\n", intf, handler);
+  ninfo("%s: handler=%p\n", intf, handler);
 
   /* Get the interface structure associated with this interface. */
 
@@ -4428,10 +4243,10 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
 
   flags = enter_critical_section();
 
-  /* Get the old interrupt handler and save the new one */
+  /* Save the new interrupt handler information */
 
-  oldhandler    = priv->handler;
   priv->handler = handler;
+  priv->arg     = arg;
 
   /* Return with the interrupt disabled in any case */
 
@@ -4444,10 +4259,8 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
       *enable = handler ? tiva_phy_intenable : NULL;
     }
 
-  /* Return the old handler (so that it can be restored) */
-
   leave_critical_section(flags);
-  return oldhandler;
+  return OK;
 }
 #endif /* CONFIG_TIVA_PHY_INTERRUPTS */
 
diff --git a/arch/arm/src/tms570/Make.defs b/arch/arm/src/tms570/Make.defs
index aaabbe4686ca5b64cca7f5117095faa36f930df2..9d1d32f627bcbae1f7cedee949733e3f7f60b49a 100644
--- a/arch/arm/src/tms570/Make.defs
+++ b/arch/arm/src/tms570/Make.defs
@@ -53,10 +53,6 @@ ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_fpuconfig.S
 endif
 
-ifeq ($(CONFIG_ARCH_MEMCPY),y)
-CMN_ASRCS += arm_memcpy.S
-endif
-
 # Common C source files
 
 CMN_CSRCS  = up_allocateheap.c up_initialize.c up_idle.c up_interruptcontext.c
@@ -85,9 +81,9 @@ CMN_CSRCS += arm_l2cc_pl310.c
 endif
 
 ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += arm_elf.c arm_coherent_dcache.c
+CMN_CSRCS += arm_coherent_dcache.c
 else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += arm_elf.c arm_coherent_dcache.c
+CMN_CSRCS += arm_coherent_dcache.c
 endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)
diff --git a/arch/arm/src/tms570/tms570_boot.c b/arch/arm/src/tms570/tms570_boot.c
index 66c92862f55d16a479219c50938fbefe7fb2833f..653825cce4eec077bfa98f566f5f20f523d48a55 100644
--- a/arch/arm/src/tms570/tms570_boot.c
+++ b/arch/arm/src/tms570/tms570_boot.c
@@ -122,7 +122,7 @@ static inline void tms570_event_export(void)
 
 static inline void tms570_check_reset(void)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   uint32_t regval;
 
   /* Read from the system exception status register to identify the cause of
diff --git a/arch/arm/src/tms570/tms570_esm.c b/arch/arm/src/tms570/tms570_esm.c
index a3259e4050f0c4e81a35ee641d85d714298d1c1c..dfecf47e8a73fdce50539ffaf503ab62fec9f84c 100644
--- a/arch/arm/src/tms570/tms570_esm.c
+++ b/arch/arm/src/tms570/tms570_esm.c
@@ -145,7 +145,7 @@ int tms570_esm_initialize(void)
  *
  ****************************************************************************/
 
-int tms570_esm_interrupt(int irq, void *context)
+int tms570_esm_interrupt(int irq, void *context, FAR void *arg)
 {
   /* Save the saved processor context in CURRENT_REGS where it can be accessed
    * for register dumps and possibly context switching.
@@ -155,7 +155,7 @@ int tms570_esm_interrupt(int irq, void *context)
 
   /* Crash -- possibly showing diagnostic debug information. */
 
-  lldbg("ESM Interrupt. PC: %08x\n", CURRENT_REGS[REG_PC]);
+  _err("ERROR: ESM Interrupt. PC: %08x\n", CURRENT_REGS[REG_PC]);
   PANIC();
   return OK; /* To keep the compiler happy */
 }
diff --git a/arch/arm/src/tms570/tms570_esm.h b/arch/arm/src/tms570/tms570_esm.h
index 7222cc17fedd56715dc3296942bd09ea13c747de..a1c93059a8edad2eb1cc20afaf84a5f3df5e436a 100644
--- a/arch/arm/src/tms570/tms570_esm.h
+++ b/arch/arm/src/tms570/tms570_esm.h
@@ -79,7 +79,7 @@ int tms570_esm_initialize(void);
  *
  ****************************************************************************/
 
-int tms570_esm_interrupt(int irq, void *context);
+int tms570_esm_interrupt(int irq, void *context, FAR void *arg);
 
 #undef EXTERN
 #if defined(__cplusplus)
diff --git a/arch/arm/src/tms570/tms570_gio.c b/arch/arm/src/tms570/tms570_gio.c
index 159ee05e4faf863eb45c0a37b3219891316fc48b..34ffb4cfd2107bef4f00d56bd4a350a16aa53abc 100644
--- a/arch/arm/src/tms570/tms570_gio.c
+++ b/arch/arm/src/tms570/tms570_gio.c
@@ -58,7 +58,7 @@
  * Private Data
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 static const char g_portchar[TMS570_NPORTS] =
 {
   'A'
@@ -289,14 +289,14 @@ bool tms570_gioread(gio_pinset_t pinset)
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 int tms570_dumpgio(uint32_t pinset, const char *msg)
 {
   irqstate_t    flags;
   uintptr_t     base;
   unsigned int  port;
 
-  lldbg("GIO%c pinset: %08x base: %08x -- %s\n",
+  _info("GIO%c pinset: %08x base: %08x -- %s\n",
         g_portchar[port], pinset, base, msg);
 
   /* Get the base address associated with the GIO port */
@@ -310,19 +310,19 @@ int tms570_dumpgio(uint32_t pinset, const char *msg)
 
   /* Show global GIO registers */
 
-  lldbg("   GCR0: %08x INTDET: %08x    POL: %08x   ENA: %08x\n",
+  _info("   GCR0: %08x INTDET: %08x    POL: %08x   ENA: %08x\n",
         getreg32(TMS570_GIO_GCR0), getreg32(TMS570_GIO_INTDET),
         getreg32(TMS570_GIO_POL), getreg32(TMS570_GIO_ENASET));
-  lldbg("    LVL: %08x    FLG: %08x   EMU1: %08x   EMU2: %08x\n",
+  _info("    LVL: %08x    FLG: %08x   EMU1: %08x   EMU2: %08x\n",
         getreg32(TMS570_GIO_LVLSET), getreg32(TMS570_GIO_FLG),
         getreg32(TMS570_GIO_EMU1), getreg32(TMS570_GIO_EMU2));
 
   /* Port specific registers */
 
-  lldbg("    DIR: %08x    DIN: %08x   DOUT: %08x    PDR: %08x\n",
+  _info("    DIR: %08x    DIN: %08x   DOUT: %08x    PDR: %08x\n",
         getreg32(base + TMS570_GIO_DIR_OFFSET), getreg32(base + TMS570_GIO_DIN_OFFSET),
         getreg32(base + TMS570_GIO_DOUT_OFFSET), getreg32(base + TMS570_GIO_PDR_OFFSET));
-  lldbg(" PULDIS: %08x    PSL: %08x\n",
+  _info(" PULDIS: %08x    PSL: %08x\n",
         getreg32(base + TMS570_GIO_PULDIS_OFFSET), getreg32(base + TMS570_GIO_PSL_OFFSET));
 
   leave_critical_section(flags);
diff --git a/arch/arm/src/tms570/tms570_gio.h b/arch/arm/src/tms570/tms570_gio.h
index bc59e8b1e22689b3e506b5ed25c30cbafc500968..45fa7073fb0156f01a64309e12c7e287a7412067 100644
--- a/arch/arm/src/tms570/tms570_gio.h
+++ b/arch/arm/src/tms570/tms570_gio.h
@@ -328,7 +328,7 @@ void tms570_gioirqdisable(int irq);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 int tms570_dumpgio(uint32_t pinset, const char *msg);
 #else
 #  define tms570_dumpgio(p,m)
diff --git a/arch/arm/src/tms570/tms570_gioirq.c b/arch/arm/src/tms570/tms570_gioirq.c
index 6eca48e629300c36d746e515792083911079dd48..b4b5cf327b20739b47264fb292cc3ab274d89b9f 100644
--- a/arch/arm/src/tms570/tms570_gioirq.c
+++ b/arch/arm/src/tms570/tms570_gioirq.c
@@ -70,7 +70,7 @@
  *
  ****************************************************************************/
 
-static int tms3570_gio_interrupt(int irq, void *context)
+static int tms3570_gio_interrupt(int irq, void *context, FAR void *arg)
 {
   uint32_t off1;
   int irq2;
@@ -113,7 +113,7 @@ void tms570_gioirq_initialize(void)
 
   /* Attach and enable the GIO level 0 interrupt */
 
-  DEBUGVERIFY(irq_attach(TMS570_REQ_GIO_0, tms3570_gio_interrupt));
+  DEBUGVERIFY(irq_attach(TMS570_REQ_GIO_0, tms3570_gio_interrupt, NULL));
   up_enable_irq(TMS570_REQ_GIO_0);
 }
 
diff --git a/arch/arm/src/tms570/tms570_irq.c b/arch/arm/src/tms570/tms570_irq.c
index da9f8c5656f9b2415258fc66476aa93ed33e340e..9903261199785c345df12bae01d2343f4373074f 100644
--- a/arch/arm/src/tms570/tms570_irq.c
+++ b/arch/arm/src/tms570/tms570_irq.c
@@ -185,8 +185,8 @@ void up_irqinitialize(void)
    * an NMI.
    */
 
-  (void)irq_attach(TMS570_REQ_ESMHIGH, tms570_esm_interrupt);
-  (void)irq_attach(TMS570_REQ_ESMLO, tms570_esm_interrupt);
+  (void)irq_attach(TMS570_REQ_ESMHIGH, tms570_esm_interrupt, NULL);
+  (void)irq_attach(TMS570_REQ_ESMLO, tms570_esm_interrupt, NULL);
   up_enable_irq(TMS570_REQ_ESMHIGH);
   up_enable_irq(TMS570_REQ_ESMLO);
 
diff --git a/arch/arm/src/tms570/tms570_serial.c b/arch/arm/src/tms570/tms570_serial.c
index b52755ac3ec62efe97e86dd91052e521d75e906e..8bb84ed91fdf04386fa7ee77e1ca915cf2593cf9 100644
--- a/arch/arm/src/tms570/tms570_serial.c
+++ b/arch/arm/src/tms570/tms570_serial.c
@@ -132,7 +132,6 @@ struct tms570_dev_s
 {
   const uint32_t scibase;       /* Base address of SCI registers */
   struct sci_config_s config;   /* SCI configuration */
-  xcpt_t handler;               /* Interrupt handler */
   uint8_t irq;                  /* IRQ associated with this SCI */
 };
 
@@ -144,13 +143,7 @@ static int  tms570_setup(struct uart_dev_s *dev);
 static void tms570_shutdown(struct uart_dev_s *dev);
 static int  tms570_attach(struct uart_dev_s *dev);
 static void tms570_detach(struct uart_dev_s *dev);
-static int tms570_interrupt(struct uart_dev_s *dev);
-#ifdef CONFIG_TMS570_SCI1
-static int  tms570_sci1_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_TMS570_SCI2
-static int  tms570_sci2_interrupt(int irq, void *context);
-#endif
+static int  tms570_interrupt(int irq, void *context, FAR void *arg);
 static int  tms570_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  tms570_receive(struct uart_dev_s *dev, uint32_t *status);
 static void tms570_rxint(struct uart_dev_s *dev, bool enable);
@@ -207,7 +200,6 @@ static struct tms570_dev_s g_sci1priv =
     .bits         = CONFIG_SCI1_BITS,
     .stopbits2    = CONFIG_SCI1_2STOP,
   },
-  .handler        = tms570_sci1_interrupt,
   .irq            = TMS570_REQ_SCI1_0,
 };
 
@@ -241,7 +233,6 @@ static struct tms570_dev_s g_sci2priv =
     .bits         = CONFIG_SCI2_BITS,
     .stopbits2    = CONFIG_SCI2_2STOP,
   },
-  .handler        = tms570_sci2_interrupt,
   .irq            = TMS570_REQ_SCI2_0,
 };
 
@@ -387,7 +378,7 @@ static int tms570_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, priv->handler);
+  ret = irq_attach(priv->irq, tms570_interrupt, dev);
   if (ret == OK)
     {
       /* Enable the interrupt (RX and TX interrupts are still disabled
@@ -428,10 +419,11 @@ static void tms570_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int tms570_interrupt(struct uart_dev_s *dev)
+static int tms570_interrupt(int irq, void *context, FAR void *arg)
 {
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct tms570_dev_s *priv;
-  uint32_t          intvec;
+  uint32_t intvec;
 
   DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct tms570_dev_s *)dev->priv;
@@ -514,27 +506,6 @@ static int tms570_interrupt(struct uart_dev_s *dev)
   return OK;
 }
 
-/****************************************************************************
- * Name: tms570_sci[n]_interrupt
- *
- * Description:
- *   SCI interrupt handlers
- *
- ****************************************************************************/
-
-#ifdef CONFIG_TMS570_SCI1
-static int  tms570_sci1_interrupt(int irq, void *context)
-{
-  return tms570_interrupt(&g_sci1port);
-}
-#endif
-#ifdef CONFIG_TMS570_SCI2
-static int  tms570_sci2_interrupt(int irq, void *context)
-{
-  return tms570_interrupt(&g_sci2port);
-}
-#endif
-
 /****************************************************************************
  * Name: tms570_ioctl
  *
diff --git a/arch/arm/src/tms570/tms570_timerisr.c b/arch/arm/src/tms570/tms570_timerisr.c
index 4744ccbdb8f33311ff3e20fd6e87d3fced1d3f6a..3dba2a1eae0b34a2e5fc3f7b26e47195f71b6519 100644
--- a/arch/arm/src/tms570/tms570_timerisr.c
+++ b/arch/arm/src/tms570/tms570_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/tms570/tms570_timerisr.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -118,11 +118,11 @@
 #define RTI_CMP0  ((CONFIG_USEC_PER_TICK * (RTI_FRC0CLK / 100000) + 50) / 100)
 
 /****************************************************************************
- * Public Functions
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name:  up_timerisr
+ * Name:  tms570_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -130,7 +130,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int tms570_timerisr(int irq, uint32_t *regs, void *arg)
 {
   /* Cleear the RTI Compare 0 interrupts */
 
@@ -143,7 +143,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Name:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name:  arm_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize the timer
@@ -151,7 +155,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void arm_timer_initialize(void)
 {
   /* Disable all RTI interrupts */
 
@@ -190,7 +194,7 @@ void up_timer_initialize(void)
 
   /* Attach the interrupt handler to the RTI Compare 0 interrupt */
 
-  DEBUGVERIFY(irq_attach(TMS570_REQ_RTICMP0, (xcpt_t)up_timerisr));
+  DEBUGVERIFY(irq_attach(TMS570_REQ_RTICMP0, (xcpt_t)tms570_timerisr), NULL);
 
   /* Enable RTI compare 0 interrupts at the VIM */
 
diff --git a/arch/avr/include/avr/inttypes.h b/arch/avr/include/avr/inttypes.h
new file mode 100644
index 0000000000000000000000000000000000000000..0b2213533c5a7caf6f8e8250d1ef9c6fef5bd0e4
--- /dev/null
+++ b/arch/avr/include/avr/inttypes.h
@@ -0,0 +1,245 @@
+/****************************************************************************
+ * arch/avr/include/avr/inttypes.h
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_AVR_INCLUDE_AVR_INTTYPES_H
+#define __ARCH_AVR_INCLUDE_AVR_INTTYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define PRId8       "d"
+#define PRId16      "d"
+#define PRId32      "ld"
+#define PRId64      "lld"
+
+#define PRIdLEAST8  "d"
+#define PRIdLEAST16 "d"
+#define PRIdLEAST32 "ld"
+#define PRIdLEAST64 "lld"
+
+#define PRIdFAST8   "d"
+#define PRIdFAST16  "d"
+#define PRIdFAST32  "ld"
+#define PRIdFAST64  "lld"
+
+#define PRIdMAX     "lld"
+#define PRIdPTR     "d"
+
+#define PRIi8       "i"
+#define PRIi16      "i"
+#define PRIi32      "li"
+#define PRIi64      "lli"
+
+#define PRIiLEAST8  "i"
+#define PRIiLEAST16 "i"
+#define PRIiLEAST32 "li"
+#define PRIiLEAST64 "lli"
+
+#define PRIiFAST8   "i"
+#define PRIiFAST16  "i"
+#define PRIiFAST32  "li"
+#define PRIiFAST64  "lli"
+
+#define PRIiMAX     "lli"
+#define PRIiPTR     "i"
+
+#define PRIo8       "o"
+#define PRIo16      "o"
+#define PRIo32      "lo"
+#define PRIo64      "llo"
+
+#define PRIoLEAST8  "o"
+#define PRIoLEAST16 "o"
+#define PRIoLEAST32 "lo"
+#define PRIoLEAST64 "llo"
+
+#define PRIoFAST8   "o"
+#define PRIoFAST16  "o"
+#define PRIoFAST32  "lo"
+#define PRIoFAST64  "llo"
+
+#define PRIoMAX     "llo"
+#define PRIoPTR     "o"
+
+#define PRIu8       "u"
+#define PRIu16      "u"
+#define PRIu32      "lu"
+#define PRIu64      "llu"
+
+#define PRIuLEAST8  "u"
+#define PRIuLEAST16 "u"
+#define PRIuLEAST32 "lu"
+#define PRIuLEAST64 "llu"
+
+#define PRIuFAST8   "u"
+#define PRIuFAST16  "u"
+#define PRIuFAST32  "lu"
+#define PRIuFAST64  "llu"
+
+#define PRIuMAX     "llu"
+#define PRIuPTR     "u"
+
+#define PRIx8       "x"
+#define PRIx16      "x"
+#define PRIx32      "lx"
+#define PRIx64      "llx"
+
+#define PRIxLEAST8  "x"
+#define PRIxLEAST16 "x"
+#define PRIxLEAST32 "lx"
+#define PRIxLEAST64 "llx"
+
+#define PRIxFAST8   "x"
+#define PRIxFAST16  "x"
+#define PRIxFAST32  "lx"
+#define PRIxFAST64  "llx"
+
+#define PRIxMAX     "llx"
+#define PRIxPTR     "x"
+
+#define PRIX8       "X"
+#define PRIX16      "X"
+#define PRIX32      "lX"
+#define PRIX64      "llX"
+
+#define PRIXLEAST8  "X"
+#define PRIXLEAST16 "X"
+#define PRIXLEAST32 "lX"
+#define PRIXLEAST64 "llX"
+
+#define PRIXFAST8   "X"
+#define PRIXFAST16  "X"
+#define PRIXFAST32  "lX"
+#define PRIXFAST64  "llX"
+
+#define PRIXMAX     "llX"
+#define PRIXPTR     "X"
+
+#define SCNd8       "hhd"
+#define SCNd16      "d"
+#define SCNd32      "ld"
+#define SCNd64      "lld"
+
+#define SCNdLEAST8  "hhd"
+#define SCNdLEAST16 "d"
+#define SCNdLEAST32 "ld"
+#define SCNdLEAST64 "lld"
+
+#define SCNdFAST8   "hhd"
+#define SCNdFAST16  "d"
+#define SCNdFAST32  "ld"
+#define SCNdFAST64  "lld"
+
+#define SCNdMAX     "lld"
+#define SCNdPTR     "d"
+
+#define SCNi8       "hhi"
+#define SCNi16      "i"
+#define SCNi32      "li"
+#define SCNi64      "lli"
+
+#define SCNiLEAST8  "hhi"
+#define SCNiLEAST16 "i"
+#define SCNiLEAST32 "li"
+#define SCNiLEAST64 "lli"
+
+#define SCNiFAST8   "hhi"
+#define SCNiFAST16  "i"
+#define SCNiFAST32  "li"
+#define SCNiFAST64  "lli"
+
+#define SCNiMAX     "lli"
+#define SCNiPTR     "i"
+
+#define SCNo8       "hho"
+#define SCNo16      "o"
+#define SCNo32      "lo"
+#define SCNo64      "llo"
+
+#define SCNoLEAST8  "hho"
+#define SCNoLEAST16 "o"
+#define SCNoLEAST32 "lo"
+#define SCNoLEAST64 "llo"
+
+#define SCNoFAST8   "hho"
+#define SCNoFAST16  "o"
+#define SCNoFAST32  "lo"
+#define SCNoFAST64  "llo"
+
+#define SCNoMAX     "llo"
+#define SCNoPTR     "o"
+
+#define SCNu8       "hhu"
+#define SCNu16      "u"
+#define SCNu32      "lu"
+#define SCNu64      "llu"
+
+#define SCNuLEAST8  "hhu"
+#define SCNuLEAST16 "u"
+#define SCNuLEAST32 "lu"
+#define SCNuLEAST64 "llu"
+
+#define SCNuFAST8   "hhu"
+#define SCNuFAST16  "u"
+#define SCNuFAST32  "lu"
+#define SCNuFAST64  "llu"
+
+#define SCNuMAX     "llu"
+#define SCNuPTR     "u"
+
+#define SCNx8       "hhx"
+#define SCNx16      "x"
+#define SCNx32      "lx"
+#define SCNx64      "llx"
+
+#define SCNxLEAST8  "hhx"
+#define SCNxLEAST16 "x"
+#define SCNxLEAST32 "lx"
+#define SCNxLEAST64 "llx"
+
+#define SCNxFAST8   "hhx"
+#define SCNxFAST16  "x"
+#define SCNxFAST32  "lx"
+#define SCNxFAST64  "llx"
+
+#define SCNxMAX     "llx"
+#define SCNxPTR     "x"
+
+#endif /* __ARCH_AVR_INCLUDE_AVR_INTTYPES_H */
diff --git a/arch/avr/include/avr32/inttypes.h b/arch/avr/include/avr32/inttypes.h
new file mode 100644
index 0000000000000000000000000000000000000000..cf6207429b549967f8c5ea8ef9bd462b14510123
--- /dev/null
+++ b/arch/avr/include/avr32/inttypes.h
@@ -0,0 +1,245 @@
+/****************************************************************************
+ * arch/avr/include/avr32/inttypes.h
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_AVR_INCLUDE_AVR32_INTTYPES_H
+#define __ARCH_AVR_INCLUDE_AVR32_INTTYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define PRId8       "d"
+#define PRId16      "d"
+#define PRId32      "d"
+#define PRId64      "lld"
+
+#define PRIdLEAST8  "d"
+#define PRIdLEAST16 "d"
+#define PRIdLEAST32 "d"
+#define PRIdLEAST64 "lld"
+
+#define PRIdFAST8   "d"
+#define PRIdFAST16  "d"
+#define PRIdFAST32  "d"
+#define PRIdFAST64  "lld"
+
+#define PRIdMAX     "lld"
+#define PRIdPTR     "d"
+
+#define PRIi8       "i"
+#define PRIi16      "i"
+#define PRIi32      "i"
+#define PRIi64      "lli"
+
+#define PRIiLEAST8  "i"
+#define PRIiLEAST16 "i"
+#define PRIiLEAST32 "i"
+#define PRIiLEAST64 "lli"
+
+#define PRIiFAST8   "i"
+#define PRIiFAST16  "i"
+#define PRIiFAST32  "i"
+#define PRIiFAST64  "lli"
+
+#define PRIiMAX     "lli"
+#define PRIiPTR     "i"
+
+#define PRIo8       "o"
+#define PRIo16      "o"
+#define PRIo32      "o"
+#define PRIo64      "llo"
+
+#define PRIoLEAST8  "o"
+#define PRIoLEAST16 "o"
+#define PRIoLEAST32 "o"
+#define PRIoLEAST64 "llo"
+
+#define PRIoFAST8   "o"
+#define PRIoFAST16  "o"
+#define PRIoFAST32  "o"
+#define PRIoFAST64  "llo"
+
+#define PRIoMAX     "llo"
+#define PRIoPTR     "o"
+
+#define PRIu8       "u"
+#define PRIu16      "u"
+#define PRIu32      "u"
+#define PRIu64      "llu"
+
+#define PRIuLEAST8  "u"
+#define PRIuLEAST16 "u"
+#define PRIuLEAST32 "u"
+#define PRIuLEAST64 "llu"
+
+#define PRIuFAST8   "u"
+#define PRIuFAST16  "u"
+#define PRIuFAST32  "u"
+#define PRIuFAST64  "llu"
+
+#define PRIuMAX     "llu"
+#define PRIuPTR     "u"
+
+#define PRIx8       "x"
+#define PRIx16      "x"
+#define PRIx32      "x"
+#define PRIx64      "llx"
+
+#define PRIxLEAST8  "x"
+#define PRIxLEAST16 "x"
+#define PRIxLEAST32 "x"
+#define PRIxLEAST64 "llx"
+
+#define PRIxFAST8   "x"
+#define PRIxFAST16  "x"
+#define PRIxFAST32  "x"
+#define PRIxFAST64  "llx"
+
+#define PRIxMAX     "llx"
+#define PRIxPTR     "x"
+
+#define PRIX8       "X"
+#define PRIX16      "X"
+#define PRIX32      "X"
+#define PRIX64      "llX"
+
+#define PRIXLEAST8  "X"
+#define PRIXLEAST16 "X"
+#define PRIXLEAST32 "X"
+#define PRIXLEAST64 "llX"
+
+#define PRIXFAST8   "X"
+#define PRIXFAST16  "X"
+#define PRIXFAST32  "X"
+#define PRIXFAST64  "llX"
+
+#define PRIXMAX     "llX"
+#define PRIXPTR     "X"
+
+#define SCNd8       "hhd"
+#define SCNd16      "hd"
+#define SCNd32      "d"
+#define SCNd64      "lld"
+
+#define SCNdLEAST8  "hhd"
+#define SCNdLEAST16 "hd"
+#define SCNdLEAST32 "d"
+#define SCNdLEAST64 "lld"
+
+#define SCNdFAST8   "hhd"
+#define SCNdFAST16  "hd"
+#define SCNdFAST32  "d"
+#define SCNdFAST64  "lld"
+
+#define SCNdMAX     "lld"
+#define SCNdPTR     "d"
+
+#define SCNi8       "hhi"
+#define SCNi16      "hi"
+#define SCNi32      "i"
+#define SCNi64      "lli"
+
+#define SCNiLEAST8  "hhi"
+#define SCNiLEAST16 "hi"
+#define SCNiLEAST32 "i"
+#define SCNiLEAST64 "lli"
+
+#define SCNiFAST8   "hhi"
+#define SCNiFAST16  "hi"
+#define SCNiFAST32  "i"
+#define SCNiFAST64  "lli"
+
+#define SCNiMAX     "lli"
+#define SCNiPTR     "i"
+
+#define SCNo8       "hho"
+#define SCNo16      "ho"
+#define SCNo32      "o"
+#define SCNo64      "llo"
+
+#define SCNoLEAST8  "hho"
+#define SCNoLEAST16 "ho"
+#define SCNoLEAST32 "o"
+#define SCNoLEAST64 "llo"
+
+#define SCNoFAST8   "hho"
+#define SCNoFAST16  "ho"
+#define SCNoFAST32  "o"
+#define SCNoFAST64  "llo"
+
+#define SCNoMAX     "llo"
+#define SCNoPTR     "o"
+
+#define SCNu8       "hhu"
+#define SCNu16      "hu"
+#define SCNu32      "u"
+#define SCNu64      "llu"
+
+#define SCNuLEAST8  "hhu"
+#define SCNuLEAST16 "hu"
+#define SCNuLEAST32 "u"
+#define SCNuLEAST64 "llu"
+
+#define SCNuFAST8   "hhu"
+#define SCNuFAST16  "hu"
+#define SCNuFAST32  "u"
+#define SCNuFAST64  "llu"
+
+#define SCNuMAX     "llu"
+#define SCNuPTR     "u"
+
+#define SCNx8       "hhx"
+#define SCNx16      "hx"
+#define SCNx32      "x"
+#define SCNx64      "llx"
+
+#define SCNxLEAST8  "hhx"
+#define SCNxLEAST16 "hx"
+#define SCNxLEAST32 "x"
+#define SCNxLEAST64 "llx"
+
+#define SCNxFAST8   "hhx"
+#define SCNxFAST16  "hx"
+#define SCNxFAST32  "x"
+#define SCNxFAST64  "llx"
+
+#define SCNxMAX     "llx"
+#define SCNxPTR     "x"
+
+#endif /* __ARCH_AVR_INCLUDE_AVR32_INTTYPES_H */
diff --git a/arch/avr/include/debug.h b/arch/avr/include/debug.h
index b95e9b9322a0e0486150c508e868da8940f4f19b..05116b4418acfc8a2b3166e3b6c82e6222816017 100644
--- a/arch/avr/include/debug.h
+++ b/arch/avr/include/debug.h
@@ -72,19 +72,15 @@
     } \
   while(0)
 
-/* __arch_syslog() and __arch_lowsyslog() override behavior of NuttX
- * dbg macros. They put the format string into program memory and
- * utilize IPTR (__memx) parameter of syslog to take the format
- * directly from program memory.  This reduces amount of RAM held by
- * the format strings used in debug statements.
+/* __arch_syslog() overrides the behavior of NuttX debug macros. They put
+ * the format string into program memory and utilize IPTR (__memx) parameter
+ * of syslog to take the format directly from program memory.  This reduces
+ * amount of RAM held by the format strings used in debug statements.
  */
 
 #define __arch_syslog(...) \
    __dbg_expand(syslog, ##__VA_ARGS__)
 
-#define __arch_lowsyslog(...) \
-   __dbg_expand(lowsyslog, ##__VA_ARGS__)
-
 #endif /* CONFIG_AVR_HAS_MEMX_PTR */
 
 #endif /* __INCLUDE_ARCH_DEBUG_H */
diff --git a/arch/avr/include/inttypes.h b/arch/avr/include/inttypes.h
new file mode 100644
index 0000000000000000000000000000000000000000..7d5025968a8100f0a73546b0b5bb3e5f60a0f58d
--- /dev/null
+++ b/arch/avr/include/inttypes.h
@@ -0,0 +1,53 @@
+/****************************************************************************
+ * arch/avr/include/inttypes.h
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_AVR_INCLUDE_INTTYPES_H
+#define __ARCH_AVR_INCLUDE_INTTYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_FAMILY_AVR32
+#  include 
+#else
+#  include 
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#endif /* __ARCH_AVR_INCLUDE_INTTYPES_H */
diff --git a/arch/avr/src/at32uc3/at32uc3.h b/arch/avr/src/at32uc3/at32uc3.h
index 47ecb3ad0333b6cfcffc65a0d72b47b7387dc066..4fc12171ed46162a27ccbdf59db5e934118b1696 100644
--- a/arch/avr/src/at32uc3/at32uc3.h
+++ b/arch/avr/src/at32uc3/at32uc3.h
@@ -296,7 +296,7 @@ void weak_function gpio_irqinitialize(void);
  ****************************************************************************/
 
 #ifdef CONFIG_AVR32_GPIOIRQ
-int gpio_irqattach(int irq, xcpt_t newisr, xcpt_t *oldisr);
+int gpio_irqattach(int irq, xcpt_t handler, void *arg);
 #endif
 
 /****************************************************************************
diff --git a/arch/avr/src/at32uc3/at32uc3_config.h b/arch/avr/src/at32uc3/at32uc3_config.h
index 8867fae8694fde919916dc149f27fdd50d85549f..9dd75a24f7ed8e600ae558947305446b1f3527d4 100644
--- a/arch/avr/src/at32uc3/at32uc3_config.h
+++ b/arch/avr/src/at32uc3/at32uc3_config.h
@@ -181,13 +181,6 @@
 #  define USE_SERIALDRIVER 1
 #endif
 
-/* Determine which device to use as the system logging device */
-
-#ifndef CONFIG_SYSLOG
-#  undef CONFIG_SYSLOG_CHAR
-#  undef CONFIG_RAMLOG_SYSLOG
-#endif
-
 /* If GPIO IRQ support is defined, then a set of GPIOs must all be included */
 
 #if CONFIG_AVR32_GPIOIRQSETA == 0 && CONFIG_AVR32_GPIOIRQSETB == 0
diff --git a/arch/avr/src/at32uc3/at32uc3_gpioirq.c b/arch/avr/src/at32uc3/at32uc3_gpioirq.c
index 231af1026d900316b52d77e78c2cd12bccd242e4..66e82476554a7ddedcc92b2e395b74a059a30276 100644
--- a/arch/avr/src/at32uc3/at32uc3_gpioirq.c
+++ b/arch/avr/src/at32uc3/at32uc3_gpioirq.c
@@ -57,20 +57,22 @@
 #ifdef CONFIG_AVR32_GPIOIRQ
 
 /****************************************************************************
- * Pre-processor Definitions
+ * Private Types
  ****************************************************************************/
 
+struct g_gpiohandler_s
+{
+  xcpt_t handler;   /* Interrupt handler entry point */
+  void  *arg;       /* The argument that accompanies the interrupt handler */
+};
+
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
 /* A table of handlers for each GPIO interrupt */
 
-static FAR xcpt_t g_gpiohandler[NR_GPIO_IRQS];
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
+static struct g_gpiohandler_s g_gpiohandler[NR_GPIO_IRQS];
 
 /****************************************************************************
  * Private Functions
@@ -221,15 +223,15 @@ static void gpio_porthandler(uint32_t regbase, int irqbase, uint32_t irqset, voi
 
               /* Dispatch handling for this pin */
 
-              xcpt_t handler = g_gpiohandler[irq];
-              if (handler)
+              xcpt_t handler = g_gpiohandler[irq].handler;
+              if (handler != NULL)
                 {
-                  handler(irq, context);
+                  handler(irq, contex, g_gpiohandler[irq].arg);
                 }
               else
                 {
-                  lldbg("No handler: pin=%d ifr=%08x irqset=%08x",
-                        pin, ifr, irqset);
+                  _err("ERROR: No handler: pin=%d ifr=%08x irqset=%08x",
+                       pin, ifr, irqset);
                 }
             }
 
@@ -247,8 +249,8 @@ static void gpio_porthandler(uint32_t regbase, int irqbase, uint32_t irqset, voi
           putreg32(bit, regbase + AVR32_GPIO_IFRC_OFFSET);
           ifr &= ~bit;
 
-          lldbg("IRQ on unconfigured pin: pin=%d ifr=%08x irqset=%08x",
-                pin, ifr, irqset);
+          warn("WARNING: IRQ on unconfigured pin: pin=%d ifr=%08x irqset=%08x",
+               pin, ifr, irqset);
         }
     }
 }
@@ -262,7 +264,7 @@ static void gpio_porthandler(uint32_t regbase, int irqbase, uint32_t irqset, voi
  ****************************************************************************/
 
 #if CONFIG_AVR32_GPIOIRQSETA != 0
-static int gpio0_interrupt(int irq, FAR void *context)
+static int gpio0_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   gpio_porthandler(AVR32_GPIO0_BASE, __IRQ_GPIO_PA0,
                    CONFIG_AVR32_GPIOIRQSETA, context);
@@ -271,7 +273,7 @@ static int gpio0_interrupt(int irq, FAR void *context)
 #endif
 
 #if CONFIG_AVR32_GPIOIRQSETB != 0
-static int gpio1_interrupt(int irq, FAR void *context)
+static int gpio1_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   gpio_porthandler(AVR32_GPIO1_BASE, __IRQ_GPIO_PB0,
                    CONFIG_AVR32_GPIOIRQSETB, context);
@@ -304,16 +306,17 @@ void gpio_irqinitialize(void)
 
   for (i = 0; i < NR_GPIO_IRQS; i++)
     {
-      g_gpiohandler[i] = irq_unexpected_isr;
+      g_gpiohandler[i].handler = irq_unexpected_isr;
+      g_gpiohandler[i].arg     = NULL;
     }
 
   /* Then attach the GPIO interrupt handlers */
 
 #if CONFIG_AVR32_GPIOIRQSETA != 0
-  irq_attach(AVR32_IRQ_GPIO0, gpio0_interrupt);
+  irq_attach(AVR32_IRQ_GPIO0, gpio0_interrupt, NULL);
 #endif
 #if CONFIG_AVR32_GPIOIRQSETB != 0
-  irq_attach(AVR32_IRQ_GPIO1, gpio1_interrupt);
+  irq_attach(AVR32_IRQ_GPIO1, gpio1_interrupt, NULL);
 #endif
 }
 
@@ -325,7 +328,7 @@ void gpio_irqinitialize(void)
  *
  ****************************************************************************/
 
-int gpio_irqattach(int irq, xcpt_t newisr, xcpt_t *oldisr)
+int gpio_irqattach(int irq, xcpt_t handler, void *arg)
 {
   irqstate_t flags;
   int        ret = -EINVAL;
@@ -338,25 +341,23 @@ int gpio_irqattach(int irq, xcpt_t newisr, xcpt_t *oldisr)
        */
 
       flags = enter_critical_section();
-      if (newisr == NULL)
+      if (handler == NULL)
         {
            gpio_irqdisable(irq);
-           newisr = irq_unexpected_isr;
-        }
-
-      /* Return the old ISR (in case the caller ever wants to restore it) */
 
-      if (oldisr)
-        {
-          *oldisr = g_gpiohandler[irq];
+           handler = irq_unexpected_isr;
+           arg     = NULL;
         }
 
-      /* Then save the new ISR in the table. */
+      /* Save the new ISR in the table. */
+
+      g_gpiohandler[irq].handler = handler;
+      g_gpiohandler[irq].arg     = arg;
 
-      g_gpiohandler[irq] = newisr;
       leave_critical_section(flags);
       ret = OK;
     }
+
   return ret;
 }
 
diff --git a/arch/avr/src/at32uc3/at32uc3_irq.c b/arch/avr/src/at32uc3/at32uc3_irq.c
index 6df9cdf4a6ceb5ee9051a2b0f5bb56e84971e653..179430640cc7ea6e2b285b88493b7590a89b2896 100644
--- a/arch/avr/src/at32uc3/at32uc3_irq.c
+++ b/arch/avr/src/at32uc3/at32uc3_irq.c
@@ -174,10 +174,10 @@ static int up_getgrp(unsigned int irq)
  *
  ****************************************************************************/
 
-static int avr32_xcptn(int irq, FAR void *context)
+static int avr32_xcptn(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  lldbg("PANIC!!! Exception IRQ: %d\n", irq);
+  _alert("PANIC!!! Exception IRQ: %d\n", irq);
   PANIC();
   return 0;
 }
@@ -223,7 +223,7 @@ void up_irqinitialize(void)
 
   for (irq = 0; irq < AVR32_IRQ_NEVENTS; irq++)
     {
-      irq_attach(irq, avr32_xcptn);
+      irq_attach(irq, avr32_xcptn, NULL);
     }
 
   /* Initialize GPIO interrupt facilities */
@@ -321,11 +321,11 @@ unsigned int avr32_intirqno(unsigned int level)
           mask <<= 1;
         }
 
-       lldbg("Spurious interrupt: group=%d IRR=%08x\n", group, irr);
+       _err("ERROR: Spurious interrupt: group=%d IRR=%08x\n", group, irr);
        return -ENODEV;
     }
 
-  lldbg("Bad group: %d\n", group);
+  _err("ERROR: Bad group: %d\n", group);
   return AVR32_IRQ_BADVECTOR;
 }
 
diff --git a/arch/avr/src/at32uc3/at32uc3_serial.c b/arch/avr/src/at32uc3/at32uc3_serial.c
index f01dcc6ac7bcdc8d6739e87fccac93a73df9bd75..db10ae31c4d64764600ecec66c32098bb98739d2 100644
--- a/arch/avr/src/at32uc3/at32uc3_serial.c
+++ b/arch/avr/src/at32uc3/at32uc3_serial.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/avr/src/at32uc3/at32uc3_serial.c
  *
- *   Copyright (C) 2010, 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010, 2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -160,7 +160,7 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-static int  up_interrupt(int irq, void *context);
+static int  up_interrupt(int irq, void *context, void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  up_receive(struct uart_dev_s *dev, uint32_t *status);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
@@ -408,7 +408,7 @@ static int up_attach(struct uart_dev_s *dev)
 
   /* Attach the IRQ */
 
-  return irq_attach(priv->irq, up_interrupt);
+  return irq_attach(priv->irq, up_interrupt, dev);
 }
 
 /****************************************************************************
@@ -440,40 +440,16 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_interrupt(int irq, void *context)
+static int up_interrupt(int irq, void *context, void *arg)
 {
-  struct uart_dev_s *dev = NULL;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct up_dev_s   *priv;
   uint32_t           csr;
   int                passes;
   bool               handled;
 
-#ifdef CONFIG_AVR32_USART0_RS232
-  if (g_usart0priv.irq == irq)
-    {
-      dev = &g_usart0port;
-    }
-  else
-#endif
-#ifdef CONFIG_AVR32_USART1_RS232
-  if (g_usart1priv.irq == irq)
-    {
-      dev = &g_usart1port;
-    }
-  else
-#endif
-#ifdef CONFIG_AVR32_USART2_RS232
-  if (g_usart2priv.irq == irq)
-    {
-      dev = &g_usart2port;
-    }
-  else
-#endif
-    {
-      PANIC();
-    }
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct up_dev_s *)dev->priv;
-  DEBUGASSERT(priv);
 
   /* Loop until there are no characters to be transferred or,
    * until we have been looping for a long time.
diff --git a/arch/avr/src/at32uc3/at32uc3_timerisr.c b/arch/avr/src/at32uc3/at32uc3_timerisr.c
index e0d6cc6c351da44b308a97e5f4cec115e8f06b67..c1cb5ec48fb907fc4d5b716cb46e5149a4fe059a 100644
--- a/arch/avr/src/at32uc3/at32uc3_timerisr.c
+++ b/arch/avr/src/at32uc3/at32uc3_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/avr/src/at32uc3/at32uc3_timerisr.c
  *
- *   Copyright (C) 2010, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010, 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -130,10 +130,6 @@
 #  define AV32_TOP (144-1)
 #endif
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -153,11 +149,7 @@ static void rtc_waitnotbusy(void)
 }
 
 /****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  at32uc3_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -165,7 +157,7 @@ static void rtc_waitnotbusy(void)
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int at32uc3_timerisr(int irq, uint32_t *regs, void *arg)
 {
   /* Clear the pending timer interrupt */
 
@@ -178,7 +170,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  avr_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize the timer
@@ -187,7 +183,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void avr_timer_initialize(void)
 {
   uint32_t regval;
 
@@ -223,7 +219,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(AVR32_IRQ_RTC, (xcpt_t)up_timerisr);
+  (void)irq_attach(AVR32_IRQ_RTC, (xcpt_t)at32uc3_timerisr, NULL);
 
   /* Enable RTC interrupts */
 
diff --git a/arch/avr/src/at90usb/at90usb_config.h b/arch/avr/src/at90usb/at90usb_config.h
index 3f0d80a19d8a819b3a0e2a61d97995536e928bd4..b00fd1e0ba8751bde6117f8ef56b4ab27cf6aeb9 100644
--- a/arch/avr/src/at90usb/at90usb_config.h
+++ b/arch/avr/src/at90usb/at90usb_config.h
@@ -100,13 +100,6 @@
 #  define USE_SERIALDRIVER 1
 #endif
 
-/* Determine which device to use as the system logging device */
-
-#ifndef CONFIG_SYSLOG
-#  undef CONFIG_SYSLOG_CHAR
-#  undef CONFIG_RAMLOG_SYSLOG
-#endif
-
 /************************************************************************************
  * Public Types
  ************************************************************************************/
diff --git a/arch/avr/src/at90usb/at90usb_serial.c b/arch/avr/src/at90usb/at90usb_serial.c
index 25077f5743145f212754cc82bd029266fbae9cef..385211f97e829cf9c2c0d580fb508202b5c631d1 100644
--- a/arch/avr/src/at90usb/at90usb_serial.c
+++ b/arch/avr/src/at90usb/at90usb_serial.c
@@ -90,8 +90,8 @@ static int  usart1_setup(struct uart_dev_s *dev);
 static void usart1_shutdown(struct uart_dev_s *dev);
 static int  usart1_attach(struct uart_dev_s *dev);
 static void usart1_detach(struct uart_dev_s *dev);
-static int  usart1_rxinterrupt(int irq, void *context);
-static int  usart1_txinterrupt(int irq, void *context);
+static int  usart1_rxinterrupt(int irq, void *context, FAR void *arg);
+static int  usart1_txinterrupt(int irq, void *context, FAR void *arg);
 static int  usart1_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  usart1_receive(struct uart_dev_s *dev, FAR unsigned int *status);
 static void usart1_rxint(struct uart_dev_s *dev, bool enable);
@@ -245,9 +245,9 @@ static int usart1_attach(struct uart_dev_s *dev)
    *      written.
    */
 
-  (void)irq_attach(AT90USB_IRQ_U1RX, usart1_rxinterrupt);
-  (void)irq_attach(AT90USB_IRQ_U1DRE, usart1_txinterrupt);
-//(void)irq_attach(AT90USB_IRQ_U1TX, usart1_txinterrupt);
+  (void)irq_attach(AT90USB_IRQ_U1RX, usart1_rxinterrupt, NULL);
+  (void)irq_attach(AT90USB_IRQ_U1DRE, usart1_txinterrupt, NULL);
+//(void)irq_attach(AT90USB_IRQ_U1TX, usart1_txinterrupt, NULL);
   return OK;
 }
 
@@ -284,7 +284,7 @@ static void usart1_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int usart1_rxinterrupt(int irq, void *context)
+static int usart1_rxinterrupt(int irq, void *context, FAR void *arg)
 {
   uint8_t ucsr1a = UCSR1A;
 
@@ -310,7 +310,7 @@ static int usart1_rxinterrupt(int irq, void *context)
  *
  ****************************************************************************/
 
-static int usart1_txinterrupt(int irq, void *context)
+static int usart1_txinterrupt(int irq, void *context, FAR void *arg)
 {
   uint8_t ucsr1a = UCSR1A;
 
diff --git a/arch/avr/src/at90usb/at90usb_timerisr.c b/arch/avr/src/at90usb/at90usb_timerisr.c
index 0c53d2386c75daf5407e8bdd91f90c442a95094f..896fe111b55d8f0febb1067fd2b1e8631e120cb4 100644
--- a/arch/avr/src/at90usb/at90usb_timerisr.c
+++ b/arch/avr/src/at90usb/at90usb_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/avr/src/at90usb/at90usb_timerisr.c
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -101,20 +101,12 @@
  *   MATCH1024   ((   7804 + 50) / 100) =     78  FREQ=100.1Hz
  */
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  at90usb_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -122,7 +114,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int at90usb_timerisr(int irq, uint32_t *regs, void *arg)
 {
   /* Process timer interrupt */
 
@@ -131,7 +123,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  avr_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize the timer
@@ -140,7 +136,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void avr_timer_initialize(void)
 {
   /* Setup timer 1 compare match A to generate a tick interrupt.
    *
@@ -172,7 +168,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(AT90USB_IRQ_T1COMPA, (xcpt_t)up_timerisr);
+  (void)irq_attach(AT90USB_IRQ_T1COMPA, (xcpt_t)at90usb_timerisr, NULL);
 
   /* Enable the interrupt on compare match A */
 
diff --git a/arch/avr/src/at90usb/at90usb_usbdev.c b/arch/avr/src/at90usb/at90usb_usbdev.c
index 7bfe6639b4cd435442038aba446fadb9796bdc37..2d47dd75447b9b998d77e823a0aaa7ff64c26dfe 100644
--- a/arch/avr/src/at90usb/at90usb_usbdev.c
+++ b/arch/avr/src/at90usb/at90usb_usbdev.c
@@ -295,7 +295,7 @@ static void avr_dispatchrequest(FAR const struct usb_ctrlreq_s *ctrl);
 static int avr_ep0configure(void);
 static void avr_setaddress(uint8_t address);
 static void avr_ep0setup(void);
-static int avr_epinterrupt(int irq, FAR void *context);
+static int avr_epinterrupt(int irq, FAR void *context, FAR void *arg);
 
 /* General interrupt handling **************************************************/
 
@@ -305,7 +305,7 @@ static void avr_genvbus(void);
 static inline void avr_gensuspend(void);
 static void avr_genwakeup(void);
 static inline void avr_geneor(void);
-static int avr_geninterrupt(int irq, FAR void *context);
+static int avr_geninterrupt(int irq, FAR void *context, FAR void *arg);
 
 /* USB device controller operations ********************************************/
 
@@ -1399,8 +1399,8 @@ static inline void avr_ep0setup(void)
   index = GETUINT16(ctrl.index);
   len   = GETUINT16(ctrl.len);
 
-  ullvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
-          ctrl.type, ctrl.req, value, index, len);
+  uinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+        ctrl.type, ctrl.req, value, index, len);
 
   /* Dispatch any non-standard requests */
 
@@ -1596,7 +1596,7 @@ static inline void avr_ep0setup(void)
 #ifdef CONFIG_USBDEV_SELFPOWERED
                 if (value == USB_FEATURE_TESTMODE)
                   {
-                    ullvdbg("test mode: %d\n", index);
+                    uinfo("test mode: %d\n", index);
                   }
                 else if (value == USB_FEATURE_REMOTEWAKEUP)
                   {
@@ -1877,7 +1877,7 @@ static inline void avr_epNinterrupt(void)
  *
  ****************************************************************************/
 
-static int avr_epinterrupt(int irq, FAR void *context)
+static int avr_epinterrupt(int irq, FAR void *context, FAR void *arg)
 {
   usbtrace(TRACE_INTENTRY(AVR_TRACEINTID_EPINT), irq);
 
@@ -2061,7 +2061,7 @@ static inline void avr_geneor(void)
  *
  ****************************************************************************/
 
-static int avr_geninterrupt(int irq, FAR void *context)
+static int avr_geninterrupt(int irq, FAR void *context, FAR void *arg)
 {
   usbtrace(TRACE_INTENTRY(AVR_TRACEINTID_GENINT), irq);
 
@@ -2247,7 +2247,7 @@ static int avr_epdisable(FAR struct usbdev_ep_s *ep)
   FAR struct avr_ep_s *privep = (FAR struct avr_ep_s *)ep;
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(AVR_TRACEERR_INVALIDPARMS), 0);
@@ -2279,7 +2279,7 @@ static FAR struct usbdev_req_s *avr_epallocreq(FAR struct usbdev_ep_s *ep)
 {
   FAR struct avr_req_s *privreq;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(AVR_TRACEERR_INVALIDPARMS), 0);
@@ -2312,7 +2312,7 @@ static void avr_epfreereq(FAR struct usbdev_ep_s *ep,
 {
   FAR struct avr_req_s *privreq = (FAR struct avr_req_s *)req;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(AVR_TRACEERR_INVALIDPARMS), 0);
@@ -2382,12 +2382,12 @@ static int avr_epsubmit(FAR struct usbdev_ep_s *ep,
   irqstate_t flags;
   int ret = OK;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!req || !req->callback || !req->buf || !ep)
     {
       usbtrace(TRACE_DEVERROR(AVR_TRACEERR_INVALIDPARMS), 0);
-      ullvdbg("req=%p callback=%p buf=%p ep=%p\n",
-              req, req->callback, req->buf, ep);
+      uinfo("req=%p callback=%p buf=%p ep=%p\n",
+            req, req->callback, req->buf, ep);
       return -EINVAL;
     }
 #endif
@@ -2484,7 +2484,7 @@ static int avr_epcancel(FAR struct usbdev_ep_s *ep,
   FAR struct avr_ep_s *privep = (FAR struct avr_ep_s *)ep;
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(AVR_TRACEERR_INVALIDPARMS), 0);
@@ -2582,7 +2582,7 @@ static FAR struct usbdev_ep_s *avr_allocep(FAR struct usbdev_s *dev,
        * requested 'logical' endpoint.
        */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       if (epno >= AVR_NENDPOINTS)
         {
           usbtrace(TRACE_DEVERROR(AVR_TRACEERR_BADEPNO), (uint16_t)epno);
@@ -2725,7 +2725,7 @@ static int avr_selfpowered(struct usbdev_s *dev, bool selfpowered)
 {
   usbtrace(TRACE_DEVSELFPOWERED, (uint16_t) selfpowered);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(AVR_TRACEERR_INVALIDPARMS), 0);
@@ -2783,7 +2783,7 @@ void up_usbinitialize(void)
 
   /* Attach USB controller general interrupt handler */
 
-  if (irq_attach(AT90USB_IRQ_USBGEN, avr_geninterrupt) != 0)
+  if (irq_attach(AT90USB_IRQ_USBGEN, avr_geninterrupt, NULL) != 0)
     {
       usbtrace(TRACE_DEVERROR(AVR_TRACEERR_IRQREGISTRATION), AT90USB_IRQ_USBGEN);
       goto errout;
@@ -2791,7 +2791,7 @@ void up_usbinitialize(void)
 
   /* Attach USB controller endpoint/pipe interrupt handler */
 
-  if (irq_attach(AT90USB_IRQ_USBEP, avr_epinterrupt) != 0)
+  if (irq_attach(AT90USB_IRQ_USBEP, avr_epinterrupt, NULL) != 0)
     {
       usbtrace(TRACE_DEVERROR(AVR_TRACEERR_IRQREGISTRATION), AT90USB_IRQ_USBEP);
       goto errout;
@@ -2872,7 +2872,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
 
   usbtrace(TRACE_DEVREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !driver->ops->bind || !driver->ops->unbind ||
       !driver->ops->disconnect || !driver->ops->setup)
     {
@@ -2927,7 +2927,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
 {
   usbtrace(TRACE_DEVUNREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (driver != g_usbdev.driver)
     {
       usbtrace(TRACE_DEVERROR(AVR_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/avr/src/atmega/atmega_config.h b/arch/avr/src/atmega/atmega_config.h
index 0390f1c129fb05e8bd41bbe3cc13a79c2dc2f0eb..3d21cd82a79fc05970a65bb9bb1deea2753f227e 100644
--- a/arch/avr/src/atmega/atmega_config.h
+++ b/arch/avr/src/atmega/atmega_config.h
@@ -106,13 +106,6 @@
 #  define USE_SERIALDRIVER 1
 #endif
 
-/* Determine which device to use as the system logging device */
-
-#ifndef CONFIG_SYSLOG
-#  undef CONFIG_SYSLOG_CHAR
-#  undef CONFIG_RAMLOG_SYSLOG
-#endif
-
 /************************************************************************************
  * Public Types
  ************************************************************************************/
diff --git a/arch/avr/src/atmega/atmega_serial.c b/arch/avr/src/atmega/atmega_serial.c
index 9f770363a1db72501b30bfceb081a7339449a472..7c49fab1c1372acfd835ba73510ae99302fc90b4 100644
--- a/arch/avr/src/atmega/atmega_serial.c
+++ b/arch/avr/src/atmega/atmega_serial.c
@@ -114,8 +114,8 @@ static int  usart0_setup(struct uart_dev_s *dev);
 static void usart0_shutdown(struct uart_dev_s *dev);
 static int  usart0_attach(struct uart_dev_s *dev);
 static void usart0_detach(struct uart_dev_s *dev);
-static int  usart0_rxinterrupt(int irq, void *context);
-static int  usart0_txinterrupt(int irq, void *context);
+static int  usart0_rxinterrupt(int irq, void *context, FAR void *arg);
+static int  usart0_txinterrupt(int irq, void *context, FAR void *arg);
 static int  usart0_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  usart0_receive(struct uart_dev_s *dev, FAR unsigned int *status);
 static void usart0_rxint(struct uart_dev_s *dev, bool enable);
@@ -131,8 +131,8 @@ static int  usart1_setup(struct uart_dev_s *dev);
 static void usart1_shutdown(struct uart_dev_s *dev);
 static int  usart1_attach(struct uart_dev_s *dev);
 static void usart1_detach(struct uart_dev_s *dev);
-static int  usart1_rxinterrupt(int irq, void *context);
-static int  usart1_txinterrupt(int irq, void *context);
+static int  usart1_rxinterrupt(int irq, void *context, FAR void *arg);
+static int  usart1_txinterrupt(int irq, void *context, FAR void *arg);
 static int  usart1_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  usart1_receive(struct uart_dev_s *dev, FAR unsigned int *status);
 static void usart1_rxint(struct uart_dev_s *dev, bool enable);
@@ -388,9 +388,9 @@ static int usart0_attach(struct uart_dev_s *dev)
    *      written.
    */
 
-  (void)irq_attach(ATMEGA_IRQ_U0RX, usart0_rxinterrupt);
-  (void)irq_attach(ATMEGA_IRQ_U0DRE, usart0_txinterrupt);
-//(void)irq_attach(ATMEGA_IRQ_U0TX, usart0_txinterrupt);
+  (void)irq_attach(ATMEGA_IRQ_U0RX, usart0_rxinterrupt, NULL);
+  (void)irq_attach(ATMEGA_IRQ_U0DRE, usart0_txinterrupt, NULL);
+//(void)irq_attach(ATMEGA_IRQ_U0TX, usart0_txinterrupt, NULL);
   return OK;
 }
 #endif
@@ -410,9 +410,9 @@ static int usart1_attach(struct uart_dev_s *dev)
    *      written.
    */
 
-  (void)irq_attach(ATMEGA_IRQ_U1RX, usart1_rxinterrupt);
-  (void)irq_attach(ATMEGA_IRQ_U1DRE, usart1_txinterrupt);
-//(void)irq_attach(ATMEGA_IRQ_U1TX, usart1_txinterrupt);
+  (void)irq_attach(ATMEGA_IRQ_U1RX, usart1_rxinterrupt, NULL);
+  (void)irq_attach(ATMEGA_IRQ_U1DRE, usart1_txinterrupt, NULL);
+//(void)irq_attach(ATMEGA_IRQ_U1TX, usart1_txinterrupt, NULL);
   return OK;
 }
 #endif
@@ -468,7 +468,7 @@ static void usart1_detach(struct uart_dev_s *dev)
  ****************************************************************************/
 
 #ifdef CONFIG_AVR_USART0
-static int usart0_rxinterrupt(int irq, void *context)
+static int usart0_rxinterrupt(int irq, void *context, FAR void *arg)
 {
   uint8_t ucsr0a = UCSR0A;
 
@@ -486,7 +486,7 @@ static int usart0_rxinterrupt(int irq, void *context)
 #endif
 
 #ifdef CONFIG_AVR_USART1
-static int usart1_rxinterrupt(int irq, void *context)
+static int usart1_rxinterrupt(int irq, void *context, FAR void *arg)
 {
   uint8_t ucsr1a = UCSR1A;
 
@@ -514,7 +514,7 @@ static int usart1_rxinterrupt(int irq, void *context)
  ****************************************************************************/
 
 #ifdef CONFIG_AVR_USART0
-static int usart0_txinterrupt(int irq, void *context)
+static int usart0_txinterrupt(int irq, void *context, FAR void *arg)
 {
   uint8_t ucsr0a = UCSR0A;
 
@@ -534,7 +534,7 @@ static int usart0_txinterrupt(int irq, void *context)
 #endif
 
 #ifdef CONFIG_AVR_USART1
-static int usart1_txinterrupt(int irq, void *context)
+static int usart1_txinterrupt(int irq, void *context, FAR void *arg)
 {
   uint8_t ucsr1a = UCSR1A;
 
diff --git a/arch/avr/src/atmega/atmega_timerisr.c b/arch/avr/src/atmega/atmega_timerisr.c
index c0572b030a578b6eeb756d5f77c82c1b38db0145..41e38ae51b69ea64e1ad0b29d637328609f98fae 100644
--- a/arch/avr/src/atmega/atmega_timerisr.c
+++ b/arch/avr/src/atmega/atmega_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/avr/src/atmega/atmega_timerisr.c
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -101,20 +101,12 @@
  *   MATCH1024   ((   7804 + 50) / 100) =     78  FREQ=100.1Hz
  */
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  atmega_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -122,7 +114,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int atmega_timerisr(int irq, uint32_t *regs, FAR void *arg)
 {
   /* Process timer interrupt */
 
@@ -131,7 +123,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  avr_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize the timer
@@ -140,7 +136,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void avr_timer_initialize(void)
 {
   /* Setup timer 1 compare match A to generate a tick interrupt.
    *
@@ -173,9 +169,9 @@ void up_timer_initialize(void)
   /* Attach the timer interrupt vector */
 
 #if defined(ATMEGA_IRQ_T1COMPA)
-  (void)irq_attach(ATMEGA_IRQ_T1COMPA, (xcpt_t)up_timerisr);
+  (void)irq_attach(ATMEGA_IRQ_T1COMPA, (xcpt_t)atmega_timerisr, NULL);
 #elif defined(ATMEGA_IRQ_TIM1_COMPA)
-  (void)irq_attach(ATMEGA_IRQ_TIM1_COMPA, (xcpt_t)up_timerisr);
+  (void)irq_attach(ATMEGA_IRQ_TIM1_COMPA, (xcpt_t)atmega_timerisr, NULL);
 #else
 # error "Unable to find IRQ for timer"
 #endif
diff --git a/arch/avr/src/avr/Kconfig b/arch/avr/src/avr/Kconfig
index 496529f32c8a9bffb8b30c1ae6672c397a0b5679..2ddfa4e1949b2170148c83d1b097bcb7fe8f037c 100644
--- a/arch/avr/src/avr/Kconfig
+++ b/arch/avr/src/avr/Kconfig
@@ -8,13 +8,13 @@ comment "AVR Configuration Options"
 
 choice
 	prompt "Toolchain"
-	default AVR_WINAVR_TOOLCHAIN if HOST_WINDOWS
+	default AVR_WINAVR_TOOLCHAIN if TOOLCHAIN_WINDOWS
 	default AVR_BUILDROOT_TOOLCHAIN if HOST_LINUX
 	default AVR_CROSSPACK_TOOLCHAIN if HOST_OSX
 
 config AVR_WINAVR_TOOLCHAIN
 	bool "WinAVR"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 	---help---
 		For Cygwin development environment on Windows machines, you
 		can use WinAVR: http://sourceforge.net/projects/winavr/files/
@@ -29,7 +29,7 @@ config AVR_WINAVR_TOOLCHAIN
 
 config AVR_ATMEL_AVR_TOOLCHAIN
 	bool "Atmel AVR Toolchain"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 	---help---
                 Atmel provides GNU Toolchain for AVR development. It can
                 be obtained by installing Atmel Studio 6 and later or
@@ -55,7 +55,6 @@ config AVR_CROSSPACK_TOOLCHAIN
 
 config AVR_BUILDROOT_TOOLCHAIN
 	bool "Buildroot"
-	depends on HOST_LINUX || HOST_WINDOWS
 	---help---
 		There is a DIY buildroot version for the AVR boards here:
 		http://sourceforge.net/projects/nuttx/files/buildroot/. See
diff --git a/arch/avr/src/avr/up_createstack.c b/arch/avr/src/avr/up_createstack.c
index c2dda4d271d97de33e06569c49afc78907867f2c..54efb1a3fb53f917fb55ac1b18116eda1d513715 100644
--- a/arch/avr/src/avr/up_createstack.c
+++ b/arch/avr/src/avr/up_createstack.c
@@ -122,12 +122,12 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
 
       tcb->stack_alloc_ptr = (uint32_t *)kumm_malloc(stack_size);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       /* Was the allocation successful? */
 
       if (!tcb->stack_alloc_ptr)
         {
-          sdbg("ERROR: Failed to allocate stack, size %d\n", stack_size);
+          serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
         }
 #endif
     }
diff --git a/arch/avr/src/avr/up_dumpstate.c b/arch/avr/src/avr/up_dumpstate.c
index a82b682d35366ea4c392d02cb05842f0404b2d95..5a1660b81b41761182dab67ff4b7bbdcbdfbc154 100644
--- a/arch/avr/src/avr/up_dumpstate.c
+++ b/arch/avr/src/avr/up_dumpstate.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/avr/src/avr/up_dumpstate.c
  *
- *   Copyright (C) 2011, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,13 +39,6 @@
 
 #include 
 
-/* Output debug info -- even if debug is not selected. */
-
-#undef  CONFIG_DEBUG
-#undef  CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
 #include 
 #include 
 #include 
@@ -97,7 +90,7 @@ static void up_stackdump(uint16_t sp, uint16_t stack_base)
   for (stack = sp & ~3; stack < stack_base; stack += 12)
     {
       uint8_t *ptr = (uint8_t *)stack;
-      lldbg("%04x: %02x %02x %02x %02x %02x %02x %02x %02x"
+      _alert("%04x: %02x %02x %02x %02x %02x %02x %02x %02x"
             " %02x %02x %02x %02x\n",
              stack,
              ptr[0], ptr[1], ptr[2], ptr[3], ptr[4], ptr[5], ptr[6], ptr[7],
@@ -115,28 +108,28 @@ static inline void up_registerdump(void)
 
   if (g_current_regs)
     {
-      lldbg("R%02d: %02x %02x %02x %02x %02x %02x %02x %02x\n",
+      _alert("R%02d: %02x %02x %02x %02x %02x %02x %02x %02x\n",
             0,
             g_current_regs[REG_R0],  g_current_regs[REG_R1],
             g_current_regs[REG_R2],  g_current_regs[REG_R3],
             g_current_regs[REG_R4],  g_current_regs[REG_R5],
             g_current_regs[REG_R6],  g_current_regs[REG_R7]);
 
-      lldbg("R%02d: %02x %02x %02x %02x %02x %02x %02x %02x\n",
+      _alert("R%02d: %02x %02x %02x %02x %02x %02x %02x %02x\n",
             8,
             g_current_regs[REG_R8],  g_current_regs[REG_R9],
             g_current_regs[REG_R10], g_current_regs[REG_R11],
             g_current_regs[REG_R12], g_current_regs[REG_R13],
             g_current_regs[REG_R14], g_current_regs[REG_R15]);
 
-      lldbg("R%02d: %02x %02x %02x %02x %02x %02x %02x %02x\n",
+      _alert("R%02d: %02x %02x %02x %02x %02x %02x %02x %02x\n",
             16,
             g_current_regs[REG_R16], g_current_regs[REG_R17],
             g_current_regs[REG_R18], g_current_regs[REG_R19],
             g_current_regs[REG_R20], g_current_regs[REG_R21],
             g_current_regs[REG_R22], g_current_regs[REG_R23]);
 
-      lldbg("R%02d: %02x %02x %02x %02x %02x %02x %02x %02x\n",
+      _alert("R%02d: %02x %02x %02x %02x %02x %02x %02x %02x\n",
             24,
             g_current_regs[REG_R24], g_current_regs[REG_R25],
             g_current_regs[REG_R26], g_current_regs[REG_R27],
@@ -144,12 +137,12 @@ static inline void up_registerdump(void)
             g_current_regs[REG_R30], g_current_regs[REG_R31]);
 
 #if !defined(REG_PC2)
-      lldbg("PC:  %02x%02x  SP: %02x%02x SREG: %02x\n",
+      _alert("PC:  %02x%02x  SP: %02x%02x SREG: %02x\n",
             g_current_regs[REG_PC0], g_current_regs[REG_PC1],
             g_current_regs[REG_SPH], g_current_regs[REG_SPL],
             g_current_regs[REG_SREG]);
 #else
-      lldbg("PC:  %02x%02x%02x  SP: %02x%02x SREG: %02x\n",
+      _alert("PC:  %02x%02x%02x  SP: %02x%02x SREG: %02x\n",
             g_current_regs[REG_PC0], g_current_regs[REG_PC1],
             g_current_regs[REG_PC2], g_current_regs[REG_SPH],
             g_current_regs[REG_SPL], g_current_regs[REG_SREG]);
@@ -197,12 +190,12 @@ void up_dumpstate(void)
 
   /* Show interrupt stack info */
 
-  lldbg("sp:     %04x\n", sp);
-  lldbg("IRQ stack:\n");
-  lldbg("  base: %04x\n", istackbase);
-  lldbg("  size: %04x\n", istacksize);
+  _alert("sp:     %04x\n", sp);
+  _alert("IRQ stack:\n");
+  _alert("  base: %04x\n", istackbase);
+  _alert("  size: %04x\n", istacksize);
 #ifdef CONFIG_STACK_COLORATION
-  lldbg("  used: %08x\n", up_check_intstack());
+  _alert("  used: %08x\n", up_check_intstack());
 #endif
 
   /* Does the current stack pointer lie within the interrupt
@@ -224,14 +217,14 @@ void up_dumpstate(void)
   if (g_current_regs)
     {
       sp = g_current_regs[REG_R13];
-      lldbg("sp:     %04x\n", sp);
+      _alert("sp:     %04x\n", sp);
     }
 
-  lldbg("User stack:\n");
-  lldbg("  base: %04x\n", ustackbase);
-  lldbg("  size: %04x\n", ustacksize);
+  _alert("User stack:\n");
+  _alert("  base: %04x\n", ustackbase);
+  _alert("  size: %04x\n", ustacksize);
 #ifdef CONFIG_STACK_COLORATION
-  lldbg("  used: %08x\n", up_check_tcbstack(rtcb));
+  _alert("  used: %08x\n", up_check_tcbstack(rtcb));
 #endif
 
   /* Dump the user stack if the stack pointer lies within the allocated user
@@ -243,11 +236,11 @@ void up_dumpstate(void)
       up_stackdump(sp, ustackbase);
     }
 #else
-  lldbg("sp:         %04x\n", sp);
-  lldbg("stack base: %04x\n", ustackbase);
-  lldbg("stack size: %04x\n", ustacksize);
+  _alert("sp:         %04x\n", sp);
+  _alert("stack base: %04x\n", ustackbase);
+  _alert("stack size: %04x\n", ustacksize);
 #ifdef CONFIG_STACK_COLORATION
-  lldbg("stack used: %08x\n", up_check_tcbstack(rtcb));
+  _alert("stack used: %08x\n", up_check_tcbstack(rtcb));
 #endif
 
   /* Dump the user stack if the stack pointer lies within the allocated user
@@ -256,7 +249,7 @@ void up_dumpstate(void)
 
   if (sp > ustackbase || sp <= ustackbase - ustacksize)
     {
-      lldbg("ERROR: Stack pointer is not within allocated stack\n");
+      _alert("ERROR: Stack pointer is not within allocated stack\n");
     }
   else
     {
diff --git a/arch/avr/src/avr/up_initialstate.c b/arch/avr/src/avr/up_initialstate.c
index 506b28c6200bd38c5d1f24de80c9c335aa461dd5..057054d437a3c64e7c920d7f72bc8f4f52eaf59c 100644
--- a/arch/avr/src/avr/up_initialstate.c
+++ b/arch/avr/src/avr/up_initialstate.c
@@ -50,18 +50,6 @@
 #include "up_internal.h"
 #include "up_arch.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/arch/avr/src/avr/up_releasepending.c b/arch/avr/src/avr/up_releasepending.c
index 80789fee51dfeb8e2e91d9d1dd9f9fe4de6197db..5b9b05df2be579cb45b27f8912c4e0cfc41b99c7 100644
--- a/arch/avr/src/avr/up_releasepending.c
+++ b/arch/avr/src/avr/up_releasepending.c
@@ -66,7 +66,7 @@ void up_release_pending(void)
 {
   struct tcb_s *rtcb = this_task();
 
-  slldbg("From TCB=%p\n", rtcb);
+  sinfo("From TCB=%p\n", rtcb);
 
   /* Merge the g_pendingtasks list into the ready-to-run task list */
 
diff --git a/arch/avr/src/avr/up_reprioritizertr.c b/arch/avr/src/avr/up_reprioritizertr.c
index 28978a19dabe78cf792553af78e9b0d011e22e9f..846b59becf62f3f90196124d25eae4a734d899d8 100644
--- a/arch/avr/src/avr/up_reprioritizertr.c
+++ b/arch/avr/src/avr/up_reprioritizertr.c
@@ -94,7 +94,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
       struct tcb_s *rtcb = this_task();
       bool switch_needed;
 
-      slldbg("TCB=%p PRI=%d\n", tcb, priority);
+      sinfo("TCB=%p PRI=%d\n", tcb, priority);
 
       /* Remove the tcb task from the ready-to-run list.
        * sched_removereadytorun will return true if we just
diff --git a/arch/avr/src/avr/up_schedulesigaction.c b/arch/avr/src/avr/up_schedulesigaction.c
index 5c6cbf52eee68272e7d17d6c5cfce079a25f5705..16f7a3358709f4639760884ab0b2467be373321d 100644
--- a/arch/avr/src/avr/up_schedulesigaction.c
+++ b/arch/avr/src/avr/up_schedulesigaction.c
@@ -94,7 +94,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
 {
   irqstate_t flags;
 
-  sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+  sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
 
   /* Make sure that interrupts are disabled */
 
@@ -108,7 +108,8 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
        * being delivered to the currently executing task.
        */
 
-      sdbg("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
+      sinfo("rtcb=0x%p g_current_regs=0x%p\n",
+            this_task(), g_current_regs);
 
       if (tcb == this_task())
         {
diff --git a/arch/avr/src/avr/up_sigdeliver.c b/arch/avr/src/avr/up_sigdeliver.c
index e786cba00c6c8edeb9a5429f3324398af182a26a..c73460793e68599793ff2b10058166d115ebce7d 100644
--- a/arch/avr/src/avr/up_sigdeliver.c
+++ b/arch/avr/src/avr/up_sigdeliver.c
@@ -82,7 +82,7 @@ void up_sigdeliver(void)
 
   board_autoled_on(LED_SIGNAL);
 
-  sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
         rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
   ASSERT(rtcb->xcp.sigdeliver != NULL);
 
@@ -117,7 +117,7 @@ void up_sigdeliver(void)
    * errno that is needed by the user logic (it is probably EINTR).
    */
 
-  sdbg("Resuming\n");
+  sinfo("Resuming\n");
   (void)up_irq_save();
   rtcb->pterrno = saved_errno;
 
diff --git a/arch/avr/src/avr/up_spi.c b/arch/avr/src/avr/up_spi.c
index 94de828c1582948d5aa832cf9818890c7dfae54c..bf6eda418edf0c31414850853283371885aa44a6 100644
--- a/arch/avr/src/avr/up_spi.c
+++ b/arch/avr/src/avr/up_spi.c
@@ -62,28 +62,6 @@
 
 #ifdef CONFIG_AVR_SPI
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG     /* Define to enable debug */
-#undef SPI_VERBOSE   /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -269,7 +247,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
       actual          = priv->actual;
     }
 
-  spidbg("Frequency %d->%d\n", frequency, actual);
+  spiinfo("Frequency %d->%d\n", frequency, actual);
   return actual;
 }
 
@@ -408,7 +386,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
 {
   FAR uint8_t *ptr = (FAR uint8_t *)buffer;
 
-  spidbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
   while (nwords-- > 0)
     {
       (void)spi_send(dev, (uint16_t)*ptr++);
@@ -439,7 +417,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
 {
   FAR uint8_t *ptr = (FAR uint8_t *)buffer;
 
-  spidbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
   while (nwords-- > 0)
     {
       *ptr++ = spi_send(dev, (uint16_t)0xff);
diff --git a/arch/avr/src/avr32/Kconfig b/arch/avr/src/avr32/Kconfig
index 14d5c0f33b48365e846075fe2e1b1c7e31fae657..05a056b6984744d4d63a02e4076519cd7a40f3e5 100644
--- a/arch/avr/src/avr32/Kconfig
+++ b/arch/avr/src/avr32/Kconfig
@@ -8,12 +8,12 @@ comment "AVR32 Configuration Options"
 
 choice
 	prompt "Toolchain"
-	default AVR32_AVRTOOLSW if HOST_WINDOWS
+	default AVR32_AVRTOOLSW if TOOLCHAIN_WINDOWS
 	default AVR32_AVRTOOLSL if HOST_LINUX
 
 config AVR32_AVRTOOLSW
 	bool "AVR tools for Windows"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 
 config AVR32_AVRTOOLSL
 	bool "AVR tools for Linux"
diff --git a/arch/avr/src/avr32/up_createstack.c b/arch/avr/src/avr32/up_createstack.c
index db76abc38d9d21f88a75ccb8d56c37c84d9c7d20..6bc17519bc26127bace92f63bb728a02f03f1971 100644
--- a/arch/avr/src/avr32/up_createstack.c
+++ b/arch/avr/src/avr32/up_createstack.c
@@ -140,12 +140,12 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
           tcb->stack_alloc_ptr = (uint32_t *)kumm_malloc(stack_size);
         }
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       /* Was the allocation successful? */
 
       if (!tcb->stack_alloc_ptr)
         {
-          sdbg("ERROR: Failed to allocate stack, size %d\n", stack_size);
+          serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
         }
 #endif
     }
diff --git a/arch/avr/src/avr32/up_dumpstate.c b/arch/avr/src/avr32/up_dumpstate.c
index 31daafdedb78ca8e40223dd46ced62291c453ba8..c15b33144053ed37906d2936e3df71add87a5822 100644
--- a/arch/avr/src/avr32/up_dumpstate.c
+++ b/arch/avr/src/avr32/up_dumpstate.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/avr/src/avr32/up_dumpstate.c
  *
- *   Copyright (C) 2010-2011, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010-2011, 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,13 +39,6 @@
 
 #include 
 
-/* Output debug info -- even if debug is not selected. */
-
-#undef  CONFIG_DEBUG
-#undef  CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
 #include 
 #include 
 #include 
@@ -93,7 +86,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
   for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
     {
       uint32_t *ptr = (uint32_t *)stack;
-      lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+      _alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
              stack, ptr[0], ptr[1], ptr[2], ptr[3],
              ptr[4], ptr[5], ptr[6], ptr[7]);
     }
@@ -109,21 +102,21 @@ static inline void up_registerdump(void)
 
   if (g_current_regs)
     {
-      lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+      _alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
             0,
             g_current_regs[REG_R0], g_current_regs[REG_R1],
             g_current_regs[REG_R2], g_current_regs[REG_R3],
             g_current_regs[REG_R4], g_current_regs[REG_R5],
             g_current_regs[REG_R6], g_current_regs[REG_R7]);
 
-      lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+      _alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
             8,
             g_current_regs[REG_R8],  g_current_regs[REG_R9],
             g_current_regs[REG_R10], g_current_regs[REG_R11],
             g_current_regs[REG_R12], g_current_regs[REG_R13],
             g_current_regs[REG_R14], g_current_regs[REG_R15]);
 
-      lldbg("SR: %08x\n", g_current_regs[REG_SR]);
+      _alert("SR: %08x\n", g_current_regs[REG_SR]);
     }
 }
 
@@ -163,12 +156,12 @@ void up_dumpstate(void)
 
   /* Show interrupt stack info */
 
-  lldbg("sp:     %08x\n", sp);
-  lldbg("IRQ stack:\n");
-  lldbg("  base: %08x\n", istackbase);
-  lldbg("  size: %08x\n", istacksize);
+  _alert("sp:     %08x\n", sp);
+  _alert("IRQ stack:\n");
+  _alert("  base: %08x\n", istackbase);
+  _alert("  size: %08x\n", istacksize);
 #ifdef CONFIG_STACK_COLORATION
-  lldbg("  used: %08x\n", up_check_intstack());
+  _alert("  used: %08x\n", up_check_intstack());
 #endif
 
   /* Does the current stack pointer lie within the interrupt
@@ -190,14 +183,14 @@ void up_dumpstate(void)
   if (g_current_regs)
     {
       sp = g_current_regs[REG_R13];
-      lldbg("sp:     %08x\n", sp);
+      _alert("sp:     %08x\n", sp);
     }
 
-  lldbg("User stack:\n");
-  lldbg("  base: %08x\n", ustackbase);
-  lldbg("  size: %08x\n", ustacksize);
+  _alert("User stack:\n");
+  _alert("  base: %08x\n", ustackbase);
+  _alert("  size: %08x\n", ustacksize);
 #ifdef CONFIG_STACK_COLORATION
-  lldbg("  used: %08x\n", up_check_tcbstack(rtcb));
+  _alert("  used: %08x\n", up_check_tcbstack(rtcb));
 #endif
 
   /* Dump the user stack if the stack pointer lies within the allocated user
@@ -209,11 +202,11 @@ void up_dumpstate(void)
       up_stackdump(sp, ustackbase);
     }
 #else
-  lldbg("sp:         %08x\n", sp);
-  lldbg("stack base: %08x\n", ustackbase);
-  lldbg("stack size: %08x\n", ustacksize);
+  _alert("sp:         %08x\n", sp);
+  _alert("stack base: %08x\n", ustackbase);
+  _alert("stack size: %08x\n", ustacksize);
 #ifdef CONFIG_STACK_COLORATION
-  lldbg("stack used: %08x\n", up_check_tcbstack(rtcb));
+  _alert("stack used: %08x\n", up_check_tcbstack(rtcb));
 #endif
 
   /* Dump the user stack if the stack pointer lies within the allocated user
@@ -222,7 +215,7 @@ void up_dumpstate(void)
 
   if (sp > ustackbase || sp <= ustackbase - ustacksize)
     {
-      lldbg("ERROR: Stack pointer is not within allocated stack\n");
+      _alert("ERROR: Stack pointer is not within allocated stack\n");
     }
   else
     {
diff --git a/arch/avr/src/avr32/up_initialstate.c b/arch/avr/src/avr32/up_initialstate.c
index 821637423ae757dcaf60ca481c0650fac0d001a7..641d6278bda42cdf467bd0dcac79dc29644f51ac 100644
--- a/arch/avr/src/avr32/up_initialstate.c
+++ b/arch/avr/src/avr32/up_initialstate.c
@@ -85,7 +85,7 @@ void up_initial_state(struct tcb_s *tcb)
    * all registers is a good debug helper, but should not be necessary.
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   memset(xcp, 0, sizeof(struct xcptcontext));
 #else
   /* No pending signal delivery */
diff --git a/arch/avr/src/avr32/up_releasepending.c b/arch/avr/src/avr32/up_releasepending.c
index aaae06b59e480c1318a9ee3d660bbdf943ca3274..617c04cc3b9138e5a4309c4615e56cea9593dae0 100644
--- a/arch/avr/src/avr32/up_releasepending.c
+++ b/arch/avr/src/avr32/up_releasepending.c
@@ -67,7 +67,7 @@ void up_release_pending(void)
 {
   struct tcb_s *rtcb = this_task();
 
-  slldbg("From TCB=%p\n", rtcb);
+  sinfo("From TCB=%p\n", rtcb);
 
   /* Merge the g_pendingtasks list into the ready-to-run task list */
 
diff --git a/arch/avr/src/avr32/up_reprioritizertr.c b/arch/avr/src/avr32/up_reprioritizertr.c
index 88732c2b06e167907d86bd72cb128aaacea2632c..1ce7a4c406e1a9c8e2ee83dcf4ff0d760169bd49 100644
--- a/arch/avr/src/avr32/up_reprioritizertr.c
+++ b/arch/avr/src/avr32/up_reprioritizertr.c
@@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
       struct tcb_s *rtcb = this_task();
       bool switch_needed;
 
-      slldbg("TCB=%p PRI=%d\n", tcb, priority);
+      sinfo("TCB=%p PRI=%d\n", tcb, priority);
 
       /* Remove the tcb task from the ready-to-run list.
        * sched_removereadytorun will return true if we just
diff --git a/arch/avr/src/avr32/up_schedulesigaction.c b/arch/avr/src/avr32/up_schedulesigaction.c
index 838c1382c2d643fbc566a7710ad65d25d6e66d6f..4ec759448da6e248a926d89c3246a44ce0781cc2 100644
--- a/arch/avr/src/avr32/up_schedulesigaction.c
+++ b/arch/avr/src/avr32/up_schedulesigaction.c
@@ -94,7 +94,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
 {
   irqstate_t flags;
 
-  sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+  sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
 
   /* Make sure that interrupts are disabled */
 
@@ -108,7 +108,8 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
        * being delivered to the currently executing task.
        */
 
-      sdbg("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
+      sinfo("rtcb=0x%p g_current_regs=0x%p\n",
+            this_task(), g_current_regs);
 
       if (tcb == this_task())
         {
diff --git a/arch/avr/src/avr32/up_sigdeliver.c b/arch/avr/src/avr32/up_sigdeliver.c
index 883bec974204ca75e07f15a245fe76353354f9f7..811e4b031cbda97c689cd4d956b5507d644a4f68 100644
--- a/arch/avr/src/avr32/up_sigdeliver.c
+++ b/arch/avr/src/avr32/up_sigdeliver.c
@@ -86,7 +86,7 @@ void up_sigdeliver(void)
 
   board_autoled_on(LED_SIGNAL);
 
-  sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
         rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
   ASSERT(rtcb->xcp.sigdeliver != NULL);
 
@@ -117,7 +117,7 @@ void up_sigdeliver(void)
    * errno that is needed by the user logic (it is probably EINTR).
    */
 
-  sdbg("Resuming\n");
+  sinfo("Resuming\n");
   (void)up_irq_save();
   rtcb->pterrno = saved_errno;
 
diff --git a/arch/avr/src/common/up_assert.c b/arch/avr/src/common/up_assert.c
index 8ea84f017bc3dd454a3984a328ee0b47f84e8847..92c3bde0175f05fe10e8012ab17b60f41f3a5a25 100644
--- a/arch/avr/src/common/up_assert.c
+++ b/arch/avr/src/common/up_assert.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/avr/src/common/up_assert.c
  *
- *   Copyright (C) 2010-2011, 2013-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010-2011, 2013-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 #include 
@@ -75,23 +64,6 @@
 #  undef CONFIG_ARCH_USBDUMP
 #endif
 
-/* The following is just intended to keep some ugliness out of the mainline
- * code.  We are going to print the task name if:
- *
- *  CONFIG_TASK_NAME_SIZE > 0 &&     <-- The task has a name
- *  (defined(CONFIG_DEBUG)    ||     <-- And the debug is enabled (lldbg used)
- *   defined(CONFIG_ARCH_STACKDUMP)) <-- Or lowsyslog() is used
- */
-
-#undef CONFIG_PRINT_TASKNAME
-#if CONFIG_TASK_NAME_SIZE > 0 && (defined(CONFIG_DEBUG) || defined(CONFIG_ARCH_STACKDUMP))
-#  define CONFIG_PRINT_TASKNAME 1
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -137,7 +109,7 @@ static int usbtrace_syslog(FAR const char *fmt, ...)
   /* Let vsyslog do the real work */
 
   va_start(ap, fmt);
-  ret = lowvsyslog(LOG_INFO, fmt, ap);
+  ret = vsyslog(LOG_EMERG, fmt, ap);
   va_end(ap);
   return ret;
 }
@@ -159,17 +131,17 @@ static int assert_tracecallback(FAR struct usbtrace_s *trace, FAR void *arg)
 
 void up_assert(const uint8_t *filename, int lineno)
 {
-#ifdef CONFIG_PRINT_TASKNAME
+#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
   struct tcb_s *rtcb = this_task();
 #endif
 
   board_autoled_on(LED_ASSERTION);
 
-#ifdef CONFIG_PRINT_TASKNAME
-  lldbg("Assertion failed at file:%s line: %d task: %s\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+  _alert("Assertion failed at file:%s line: %d task: %s\n",
         filename, lineno, rtcb->name);
 #else
-  lldbg("Assertion failed at file:%s line: %d\n",
+  _alert("Assertion failed at file:%s line: %d\n",
         filename, lineno);
 #endif
 
diff --git a/arch/avr/src/common/up_exit.c b/arch/avr/src/common/up_exit.c
index 936a79d2331c7c58f54b5789ed2ef5c985e5cc27..a82c640d69d6c61708404c00c2f55b181ca47e18 100644
--- a/arch/avr/src/common/up_exit.c
+++ b/arch/avr/src/common/up_exit.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/avr/src/common/up_exit.c
  *
- *   Copyright (C) 2010, 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010, 2013-2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -41,10 +41,11 @@
 
 #include 
 #include 
-#include 
 
+#include 
+#include 
 #ifdef CONFIG_DUMP_ON_EXIT
-#include 
+#  include 
 #endif
 
 #include "task/task.h"
@@ -52,6 +53,14 @@
 #include "group/group.h"
 #include "up_internal.h"
 
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef CONFIG_DEBUG_SCHED_INFO
+#  undef CONFIG_DUMP_ON_EXIT
+#endif
+
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -66,7 +75,7 @@
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_DUMP_ON_EXIT
 static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
 {
 #if CONFIG_NFILE_DESCRIPTORS > 0
@@ -77,8 +86,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
   int i;
 #endif
 
-  sdbg("  TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
-  sdbg("    priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
+  sinfo("  TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
+  sinfo("    priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
 
 #if CONFIG_NFILE_DESCRIPTORS > 0
   filelist = tcb->group->tg_filelist;
@@ -87,8 +96,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
       struct inode *inode = filelist->fl_files[i].f_inode;
       if (inode)
         {
-          sdbg("      fd=%d refcount=%d\n",
-               i, inode->i_crefs);
+          sinfo("      fd=%d refcount=%d\n",
+                i, inode->i_crefs);
         }
     }
 #endif
@@ -100,13 +109,18 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
       struct file_struct *filep = &streamlist->sl_streams[i];
       if (filep->fs_fd >= 0)
         {
-#if CONFIG_STDIO_BUFFER_SIZE > 0
-          sdbg("      fd=%d nbytes=%d\n",
-               filep->fs_fd,
-               filep->fs_bufpos - filep->fs_bufstart);
-#else
-          sdbg("      fd=%d\n", filep->fs_fd);
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
+          if (filep->fs_bufstart != NULL)
+            {
+              sinfo("      fd=%d nbytes=%d\n",
+                    filep->fs_fd,
+                    filep->fs_bufpos - filep->fs_bufstart);
+            }
+          else
 #endif
+            {
+              sinfo("      fd=%d\n", filep->fs_fd);
+            }
         }
     }
 #endif
@@ -132,16 +146,16 @@ void _exit(int status)
 {
   struct tcb_s *tcb;
 
-  /* Disable interrupts.  They will be restored when the next
-   * task is started.
+  /* Make sure that we are in a critical section with local interrupts.
+   * The IRQ state will be restored when the next task is started.
    */
 
-  (void)up_irq_save();
+  (void)enter_critical_section();
 
-  slldbg("TCB=%p exiting\n", this_task());
+  sinfo("TCB=%p exiting\n", this_task());
 
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
-  slldbg("Other tasks:\n");
+#ifdef CONFIG_DUMP_ON_EXIT
+  sinfo("Other tasks:\n");
   sched_foreach(_up_dumponexit, NULL);
 #endif
 
diff --git a/arch/avr/src/common/up_initialize.c b/arch/avr/src/common/up_initialize.c
index 5c36cd08144fad14026b9f3e948f6587b3a54068..3db612d2376f163bfc3742929650d001d290994a 100644
--- a/arch/avr/src/common/up_initialize.c
+++ b/arch/avr/src/common/up_initialize.c
@@ -43,13 +43,16 @@
 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
+#include 
+#include 
+#include 
 
 #include 
 
@@ -99,13 +102,6 @@
 #  define USE_SERIALDRIVER 1
 #endif
 
-/* Determine which device to use as the system logging device */
-
-#ifndef CONFIG_SYSLOG
-#  undef CONFIG_SYSLOG_CHAR
-#  undef CONFIG_RAMLOG_SYSLOG
-#endif
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -120,18 +116,18 @@
  *
  ****************************************************************************/
 
-#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG_FEATURES)
 static void up_calibratedelay(void)
 {
   int i;
 
-  lldbg("Beginning 100s delay\n");
+  _warn("Beginning 100s delay\n");
   for (i = 0; i < 100; i++)
     {
       up_mdelay(1000);
     }
 
-  lldbg("End 100s delay\n");
+  _warn("End 100s delay\n");
 }
 #else
 # define up_calibratedelay()
@@ -206,11 +202,21 @@ void up_initialize(void)
 
   up_irqinitialize();
 
-  /* Initialize the DMA subsystem if the weak function stm32_dmainitialize has been
-   * brought into the build
+#ifdef CONFIG_PM
+  /* Initialize the power management subsystem.  This MCU-specific function
+   * must be called *very* early in the initialization sequence *before* any
+   * other device drivers are initialized (since they may attempt to register
+   * with the power management subsystem).
    */
 
+  up_pminitialize();
+#endif
+
 #ifdef CONFIG_ARCH_DMA
+  /* Initialize the DMA subsystem if the weak function up_dmainitialize has been
+   * brought into the build
+   */
+
 #ifdef CONFIG_HAVE_WEAKFUNCTIONS
   if (up_dmainitialize)
 #endif
@@ -222,7 +228,7 @@ void up_initialize(void)
   /* Initialize the system timer interrupt */
 
 #if !defined(CONFIG_SUPPRESS_INTERRUPTS) && !defined(CONFIG_SUPPRESS_TIMER_INTS)
-  up_timer_initialize();
+  avr_timer_initialize();
 #endif
 
   /* Register devices */
@@ -233,6 +239,14 @@ void up_initialize(void)
   devnull_register();   /* Standard /dev/null */
 #endif
 
+#if defined(CONFIG_DEV_RANDOM)
+  devrandom_register(); /* Standard /dev/random */
+#endif
+
+#if defined(CONFIG_DEV_URANDOM)
+  devurandom_register();   /* Standard /dev/urandom */
+#endif
+
 #if defined(CONFIG_DEV_ZERO)
   devzero_register();   /* Standard /dev/zero */
 #endif
@@ -259,19 +273,33 @@ void up_initialize(void)
 
 #if defined(CONFIG_DEV_LOWCONSOLE)
   lowconsole_init();
-#elif defined(CONFIG_SYSLOG_CONSOLE)
+#elif defined(CONFIG_CONSOLE_SYSLOG)
   syslog_console_init();
 #elif defined(CONFIG_RAMLOG_CONSOLE)
   ramlog_consoleinit();
 #endif
 
-  /* Initialize the system logging device */
+#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_PSEUDOTERM_SUSV1)
+  /* Register the master pseudo-terminal multiplexor device */
+
+  (void)ptmx_register();
+#endif
+
+  /* Early initialization of the system logging device.  Some SYSLOG channel
+   * can be initialized early in the initialization sequence because they
+   * depend on only minimal OS initialization.
+   */
+
+  syslog_initialize(SYSLOG_INIT_EARLY);
 
-#ifdef CONFIG_SYSLOG_CHAR
-  syslog_initialize();
+#if defined(CONFIG_CRYPTO)
+  /* Initialize the HW crypto and /dev/crypto */
+
+  up_cryptoinitialize();
 #endif
-#ifdef CONFIG_RAMLOG_SYSLOG
-  ramlog_sysloginit();
+
+#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_CRYPTO_CRYPTODEV)
+  devcrypto_register();
 #endif
 
 #ifndef CONFIG_NETDEV_LATEINIT
diff --git a/arch/avr/src/common/up_internal.h b/arch/avr/src/common/up_internal.h
index 92a160ee90ebf0915b3f7f3164ee4f1c2dcaf759..ded50aec534fea43536f9e5a613ab09ccd784849 100644
--- a/arch/avr/src/common/up_internal.h
+++ b/arch/avr/src/common/up_internal.h
@@ -67,6 +67,10 @@
 #undef  CONFIG_SUPPRESS_UART_CONFIG   /* DEFINED: Do not reconfig UART */
 #undef  CONFIG_DUMP_ON_EXIT           /* DEFINED: Dump task state on exit */
 
+#ifndef CONFIG_DEBUG_SCHED_INFO
+#  undef CONFIG_DUMP_ON_EXIT          /* Needs CONFIG_DEBUG_SCHED_INFO */
+#endif
+
 /* Check if an interrupt stack size is configured */
 
 #ifndef CONFIG_ARCH_INTERRUPTSTACK
@@ -139,7 +143,6 @@ void up_irqinitialize(void);
 void weak_function up_dmainitialize(void);
 #endif
 void up_sigdeliver(void);
-int  up_timerisr(int irq, uint32_t *regs);
 void up_lowputc(char ch);
 void up_puts(const char *str);
 void up_lowputs(const char *str);
@@ -181,7 +184,7 @@ void lowconsole_init(void);
 
 /* Defined in chip/xxx_timerisr.c */
 
-void up_timer_initialize(void);
+void avr_timer_initialize(void);
 
 /* Defined in chip/xxx_ethernet.c */
 
diff --git a/arch/hc/include/inttypes.h b/arch/hc/include/inttypes.h
new file mode 100644
index 0000000000000000000000000000000000000000..2ff0e793697ffc0cf5b11fcd84d500693ea16f54
--- /dev/null
+++ b/arch/hc/include/inttypes.h
@@ -0,0 +1,449 @@
+/****************************************************************************
+ * arch/hc/include/inttypes.h
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_HC_INCLUDE_INTTYPES_H
+#define __ARCH_HC_INCLUDE_INTTYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if __INT__ == 16
+
+#  define PRId8       "d"
+#  define PRId16      "d"
+#  define PRId32      "ld"
+#  define PRId64      "lld"
+
+#  define PRIdLEAST8  "d"
+#  define PRIdLEAST16 "d"
+#  define PRIdLEAST32 "ld"
+#  define PRIdLEAST64 "lld"
+
+#  define PRIdFAST8   "d"
+#  define PRIdFAST16  "d"
+#  define PRIdFAST32  "ld"
+#  define PRIdFAST64  "lld"
+
+#  define PRIdMAX     "lld"
+#  define PRIdPTR     "d"
+
+#  define PRIi8       "i"
+#  define PRIi16      "i"
+#  define PRIi32      "li"
+#  define PRIi64      "lli"
+
+#  define PRIiLEAST8  "i"
+#  define PRIiLEAST16 "i"
+#  define PRIiLEAST32 "li"
+#  define PRIiLEAST64 "lli"
+
+#  define PRIiFAST8   "i"
+#  define PRIiFAST16  "i"
+#  define PRIiFAST32  "li"
+#  define PRIiFAST64  "lli"
+
+#  define PRIiMAX     "lli"
+#  define PRIiPTR     "i"
+
+#  define PRIo8       "o"
+#  define PRIo16      "o"
+#  define PRIo32      "lo"
+#  define PRIo64      "llo"
+
+#  define PRIoLEAST8  "o"
+#  define PRIoLEAST16 "o"
+#  define PRIoLEAST32 "lo"
+#  define PRIoLEAST64 "llo"
+
+#  define PRIoFAST8   "o"
+#  define PRIoFAST16  "o"
+#  define PRIoFAST32  "lo"
+#  define PRIoFAST64  "llo"
+
+#  define PRIoMAX     "llo"
+#  define PRIoPTR     "o"
+
+#  define PRIu8       "u"
+#  define PRIu16      "u"
+#  define PRIu32      "lu"
+#  define PRIu64      "llu"
+
+#  define PRIuLEAST8  "u"
+#  define PRIuLEAST16 "u"
+#  define PRIuLEAST32 "lu"
+#  define PRIuLEAST64 "llu"
+
+#  define PRIuFAST8   "u"
+#  define PRIuFAST16  "u"
+#  define PRIuFAST32  "lu"
+#  define PRIuFAST64  "llu"
+
+#  define PRIuMAX     "llu"
+#  define PRIuPTR     "u"
+
+#  define PRIx8       "x"
+#  define PRIx16      "x"
+#  define PRIx32      "lx"
+#  define PRIx64      "llx"
+
+#  define PRIxLEAST8  "x"
+#  define PRIxLEAST16 "x"
+#  define PRIxLEAST32 "lx"
+#  define PRIxLEAST64 "llx"
+
+#  define PRIxFAST8   "x"
+#  define PRIxFAST16  "x"
+#  define PRIxFAST32  "lx"
+#  define PRIxFAST64  "llx"
+
+#  define PRIxMAX     "llx"
+#  define PRIxPTR     "x"
+
+#  define PRIX8       "X"
+#  define PRIX16      "X"
+#  define PRIX32      "lX"
+#  define PRIX64      "llX"
+
+#  define PRIXLEAST8  "X"
+#  define PRIXLEAST16 "X"
+#  define PRIXLEAST32 "lX"
+#  define PRIXLEAST64 "llX"
+
+#  define PRIXFAST8   "X"
+#  define PRIXFAST16  "X"
+#  define PRIXFAST32  "lX"
+#  define PRIXFAST64  "llX"
+
+#  define PRIXMAX     "llX"
+#  define PRIXPTR     "X"
+
+#  define SCNd8       "hhd"
+#  define SCNd16      "d"
+#  define SCNd32      "ld"
+#  define SCNd64      "lld"
+
+#  define SCNdLEAST8  "hhd"
+#  define SCNdLEAST16 "d"
+#  define SCNdLEAST32 "ld"
+#  define SCNdLEAST64 "lld"
+
+#  define SCNdFAST8   "hhd"
+#  define SCNdFAST16  "d"
+#  define SCNdFAST32  "ld"
+#  define SCNdFAST64  "lld"
+
+#  define SCNdMAX     "lld"
+#  define SCNdPTR     "d"
+
+#  define SCNi8       "hhi"
+#  define SCNi16      "i"
+#  define SCNi32      "li"
+#  define SCNi64      "lli"
+
+#  define SCNiLEAST8  "hhi"
+#  define SCNiLEAST16 "i"
+#  define SCNiLEAST32 "li"
+#  define SCNiLEAST64 "lli"
+
+#  define SCNiFAST8   "hhi"
+#  define SCNiFAST16  "i"
+#  define SCNiFAST32  "li"
+#  define SCNiFAST64  "lli"
+
+#  define SCNiMAX     "lli"
+#  define SCNiPTR     "i"
+
+#  define SCNo8       "hho"
+#  define SCNo16      "o"
+#  define SCNo32      "lo"
+#  define SCNo64      "llo"
+
+#  define SCNoLEAST8  "hho"
+#  define SCNoLEAST16 "o"
+#  define SCNoLEAST32 "lo"
+#  define SCNoLEAST64 "llo"
+
+#  define SCNoFAST8   "hho"
+#  define SCNoFAST16  "o"
+#  define SCNoFAST32  "lo"
+#  define SCNoFAST64  "llo"
+
+#  define SCNoMAX     "llo"
+#  define SCNoPTR     "o"
+
+#  define SCNu8       "hhu"
+#  define SCNu16      "u"
+#  define SCNu32      "lu"
+#  define SCNu64      "llu"
+
+#  define SCNuLEAST8  "hhu"
+#  define SCNuLEAST16 "u"
+#  define SCNuLEAST32 "lu"
+#  define SCNuLEAST64 "llu"
+
+#  define SCNuFAST8   "hhu"
+#  define SCNuFAST16  "u"
+#  define SCNuFAST32  "lu"
+#  define SCNuFAST64  "llu"
+
+#  define SCNuMAX     "llu"
+#  define SCNuPTR     "u"
+
+#  define SCNx8       "hhx"
+#  define SCNx16      "x"
+#  define SCNx32      "lx"
+#  define SCNx64      "llx"
+
+#  define SCNxLEAST8  "hhx"
+#  define SCNxLEAST16 "x"
+#  define SCNxLEAST32 "lx"
+#  define SCNxLEAST64 "llx"
+
+#  define SCNxFAST8   "hhx"
+#  define SCNxFAST16  "x"
+#  define SCNxFAST32  "lx"
+#  define SCNxFAST64  "llx"
+
+#  define SCNxMAX     "llx"
+#  define SCNxPTR     "x"
+
+#else
+
+#  define PRId8       "d"
+#  define PRId16      "d"
+#  define PRId32      "d"
+#  define PRId64      "lld"
+
+#  define PRIdLEAST8  "d"
+#  define PRIdLEAST16 "d"
+#  define PRIdLEAST32 "d"
+#  define PRIdLEAST64 "lld"
+
+#  define PRIdFAST8   "d"
+#  define PRIdFAST16  "d"
+#  define PRIdFAST32  "d"
+#  define PRIdFAST64  "lld"
+
+#  define PRIdMAX     "lld"
+#  define PRIdPTR     "d"
+
+#  define PRIi8       "i"
+#  define PRIi16      "i"
+#  define PRIi32      "i"
+#  define PRIi64      "lli"
+
+#  define PRIiLEAST8  "i"
+#  define PRIiLEAST16 "i"
+#  define PRIiLEAST32 "i"
+#  define PRIiLEAST64 "lli"
+
+#  define PRIiFAST8   "i"
+#  define PRIiFAST16  "i"
+#  define PRIiFAST32  "i"
+#  define PRIiFAST64  "lli"
+
+#  define PRIiMAX     "lli"
+#  define PRIiPTR     "i"
+
+#  define PRIo8       "o"
+#  define PRIo16      "o"
+#  define PRIo32      "o"
+#  define PRIo64      "llo"
+
+#  define PRIoLEAST8  "o"
+#  define PRIoLEAST16 "o"
+#  define PRIoLEAST32 "o"
+#  define PRIoLEAST64 "llo"
+
+#  define PRIoFAST8   "o"
+#  define PRIoFAST16  "o"
+#  define PRIoFAST32  "o"
+#  define PRIoFAST64  "llo"
+
+#  define PRIoMAX     "llo"
+#  define PRIoPTR     "o"
+
+#  define PRIu8       "u"
+#  define PRIu16      "u"
+#  define PRIu32      "u"
+#  define PRIu64      "llu"
+
+#  define PRIuLEAST8  "u"
+#  define PRIuLEAST16 "u"
+#  define PRIuLEAST32 "u"
+#  define PRIuLEAST64 "llu"
+
+#  define PRIuFAST8   "u"
+#  define PRIuFAST16  "u"
+#  define PRIuFAST32  "u"
+#  define PRIuFAST64  "llu"
+
+#  define PRIuMAX     "llu"
+#  define PRIuPTR     "u"
+
+#  define PRIx8       "x"
+#  define PRIx16      "x"
+#  define PRIx32      "x"
+#  define PRIx64      "llx"
+
+#  define PRIxLEAST8  "x"
+#  define PRIxLEAST16 "x"
+#  define PRIxLEAST32 "x"
+#  define PRIxLEAST64 "llx"
+
+#  define PRIxFAST8   "x"
+#  define PRIxFAST16  "x"
+#  define PRIxFAST32  "x"
+#  define PRIxFAST64  "llx"
+
+#  define PRIxMAX     "llx"
+#  define PRIxPTR     "x"
+
+#  define PRIX8       "X"
+#  define PRIX16      "X"
+#  define PRIX32      "X"
+#  define PRIX64      "llX"
+
+#  define PRIXLEAST8  "X"
+#  define PRIXLEAST16 "X"
+#  define PRIXLEAST32 "X"
+#  define PRIXLEAST64 "llX"
+
+#  define PRIXFAST8   "X"
+#  define PRIXFAST16  "X"
+#  define PRIXFAST32  "X"
+#  define PRIXFAST64  "llX"
+
+#  define PRIXMAX     "llX"
+#  define PRIXPTR     "X"
+
+#  define SCNd8       "hhd"
+#  define SCNd16      "hd"
+#  define SCNd32      "d"
+#  define SCNd64      "lld"
+
+#  define SCNdLEAST8  "hhd"
+#  define SCNdLEAST16 "hd"
+#  define SCNdLEAST32 "d"
+#  define SCNdLEAST64 "lld"
+
+#  define SCNdFAST8   "hhd"
+#  define SCNdFAST16  "hd"
+#  define SCNdFAST32  "d"
+#  define SCNdFAST64  "lld"
+
+#  define SCNdMAX     "lld"
+#  define SCNdPTR     "d"
+
+#  define SCNi8       "hhi"
+#  define SCNi16      "hi"
+#  define SCNi32      "i"
+#  define SCNi64      "lli"
+
+#  define SCNiLEAST8  "hhi"
+#  define SCNiLEAST16 "hi"
+#  define SCNiLEAST32 "i"
+#  define SCNiLEAST64 "lli"
+
+#  define SCNiFAST8   "hhi"
+#  define SCNiFAST16  "hi"
+#  define SCNiFAST32  "i"
+#  define SCNiFAST64  "lli"
+
+#  define SCNiMAX     "lli"
+#  define SCNiPTR     "i"
+
+#  define SCNo8       "hho"
+#  define SCNo16      "ho"
+#  define SCNo32      "o"
+#  define SCNo64      "llo"
+
+#  define SCNoLEAST8  "hho"
+#  define SCNoLEAST16 "ho"
+#  define SCNoLEAST32 "o"
+#  define SCNoLEAST64 "llo"
+
+#  define SCNoFAST8   "hho"
+#  define SCNoFAST16  "ho"
+#  define SCNoFAST32  "o"
+#  define SCNoFAST64  "llo"
+
+#  define SCNoMAX     "llo"
+#  define SCNoPTR     "o"
+
+#  define SCNu8       "hhu"
+#  define SCNu16      "hu"
+#  define SCNu32      "u"
+#  define SCNu64      "llu"
+
+#  define SCNuLEAST8  "hhu"
+#  define SCNuLEAST16 "hu"
+#  define SCNuLEAST32 "u"
+#  define SCNuLEAST64 "llu"
+
+#  define SCNuFAST8   "hhu"
+#  define SCNuFAST16  "hu"
+#  define SCNuFAST32  "u"
+#  define SCNuFAST64  "llu"
+
+#  define SCNuMAX     "llu"
+#  define SCNuPTR     "u"
+
+#  define SCNx8       "hhx"
+#  define SCNx16      "hx"
+#  define SCNx32      "x"
+#  define SCNx64      "llx"
+
+#  define SCNxLEAST8  "hhx"
+#  define SCNxLEAST16 "hx"
+#  define SCNxLEAST32 "x"
+#  define SCNxLEAST64 "llx"
+
+#  define SCNxFAST8   "hhx"
+#  define SCNxFAST16  "hx"
+#  define SCNxFAST32  "x"
+#  define SCNxFAST64  "llx"
+
+#  define SCNxMAX     "llx"
+#  define SCNxPTR     "x"
+
+#endif
+
+#endif /* __ARCH_HC_INCLUDE_INTTYPES_H */
diff --git a/arch/hc/include/m9s12/irq.h b/arch/hc/include/m9s12/irq.h
index 63ab556b8e4d658e69ad8940e8e56145de45893a..d70e40de34922c109f23a0cb7efe619bc0257ef9 100644
--- a/arch/hc/include/m9s12/irq.h
+++ b/arch/hc/include/m9s12/irq.h
@@ -108,7 +108,7 @@
  * Port J: Pins 0-3 and 6-7
  */
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_HCS12_GPIOIRQ
 
 /* To conserve space, interrupts must also be configured, port by port */
 
@@ -156,7 +156,7 @@
 # endif
 #else
 #  define HCS12_IRQ_NIRQS     HCS12_IRQ_NVECTORS
-#endif /* CONFIG_GPIO_IRQ */
+#endif /* CONFIG_HCS12_GPIOIRQ */
 
 #define HCS12_IRQ_VILLEGAL    HCS12_IRQ_NIRQS /* Any reserved vector */
 #define NR_IRQS               (HCS12_IRQ_NIRQS+1)
diff --git a/arch/hc/src/common/up_createstack.c b/arch/hc/src/common/up_createstack.c
index 9afb471e470f9a9f5402040bd2577edb26a496cd..f09b98a87a20ad4e710e60609c96a882c2b89e23 100644
--- a/arch/hc/src/common/up_createstack.c
+++ b/arch/hc/src/common/up_createstack.c
@@ -137,12 +137,12 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
           tcb->stack_alloc_ptr = (uint32_t *)kumm_malloc(stack_size);
         }
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       /* Was the allocation successful? */
 
       if (!tcb->stack_alloc_ptr)
         {
-          sdbg("ERROR: Failed to allocate stack, size %d\n", stack_size);
+          serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
         }
 #endif
     }
diff --git a/arch/hc/src/common/up_exit.c b/arch/hc/src/common/up_exit.c
index f80a4c3b0e00850c7de1f5c5d9a813d6c06f2f92..9b20fc8abaf7dd027d4eb8caf5d2218fc6e0cc65 100644
--- a/arch/hc/src/common/up_exit.c
+++ b/arch/hc/src/common/up_exit.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/hc/src/common/up_exit.c
  *
- *   Copyright (C) 2011, 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2013-2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -41,10 +41,11 @@
 
 #include 
 #include 
-#include 
 
+#include 
+#include 
 #ifdef CONFIG_DUMP_ON_EXIT
-#include 
+#  include 
 #endif
 
 #include "task/task.h"
@@ -56,9 +57,9 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
+#ifndef CONFIG_DEBUG_SCHED_INFO
+#  undef CONFIG_DUMP_ON_EXIT
+#endif
 
 /****************************************************************************
  * Private Functions
@@ -74,7 +75,7 @@
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_DUMP_ON_EXIT
 static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
 {
 #if CONFIG_NFILE_DESCRIPTORS > 0
@@ -85,8 +86,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
   int i;
 #endif
 
-  sdbg("  TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
-  sdbg("    priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
+  sinfo("  TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
+  sinfo("    priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
 
 #if CONFIG_NFILE_DESCRIPTORS > 0
   filelist = tcb->group->tg_filelist;
@@ -95,8 +96,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
       struct inode *inode = filelist->fl_files[i].f_inode;
       if (inode)
         {
-          sdbg("      fd=%d refcount=%d\n",
-               i, inode->i_crefs);
+          sinfo("      fd=%d refcount=%d\n",
+                i, inode->i_crefs);
         }
     }
 #endif
@@ -108,13 +109,18 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
       struct file_struct *filep = &streamlist->sl_streams[i];
       if (filep->fs_fd >= 0)
         {
-#if CONFIG_STDIO_BUFFER_SIZE > 0
-          sdbg("      fd=%d nbytes=%d\n",
-               filep->fs_fd,
-               filep->fs_bufpos - filep->fs_bufstart);
-#else
-          sdbg("      fd=%d\n", filep->fs_fd);
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
+          if (filep->fs_bufstart != NULL)
+            {
+              sinfo("      fd=%d nbytes=%d\n",
+                    filep->fs_fd,
+                    filep->fs_bufpos - filep->fs_bufstart);
+            }
+          else
 #endif
+            {
+              sinfo("      fd=%d\n", filep->fs_fd);
+            }
         }
     }
 #endif
@@ -140,16 +146,16 @@ void _exit(int status)
 {
   struct tcb_s* tcb;
 
-  /* Disable interrupts.  They will be restored when the next
-   * task is started.
+  /* Make sure that we are in a critical section with local interrupts.
+   * The IRQ state will be restored when the next task is started.
    */
 
-  (void)up_irq_save();
+  (void)enter_critical_section();
 
-  slldbg("TCB=%p exiting\n", this_task());
+  sinfo("TCB=%p exiting\n", this_task());
 
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
-  slldbg("Other tasks:\n");
+#ifdef CONFIG_DUMP_ON_EXIT
+  sinfo("Other tasks:\n");
   sched_foreach(_up_dumponexit, NULL);
 #endif
 
diff --git a/arch/hc/src/common/up_initialize.c b/arch/hc/src/common/up_initialize.c
index 30daa39ea29ba63289d2e6cdad8aa92006bd9507..b4d3fcde0751c1032514f0c02ef5b137bf89ff7d 100644
--- a/arch/hc/src/common/up_initialize.c
+++ b/arch/hc/src/common/up_initialize.c
@@ -44,13 +44,16 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
+#include 
+#include 
+#include 
 
 #include "up_arch.h"
 #include "up_internal.h"
@@ -69,18 +72,18 @@
  *
  ****************************************************************************/
 
-#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG_FEATURES)
 static void up_calibratedelay(void)
 {
   int i;
 
-  lldbg("Beginning 100s delay\n");
+  _warn("Beginning 100s delay\n");
   for (i = 0; i < 100; i++)
     {
       up_mdelay(1000);
     }
 
-  lldbg("End 100s delay\n");
+  _warn("End 100s delay\n");
 }
 #else
 # define up_calibratedelay()
@@ -125,11 +128,21 @@ void up_initialize(void)
 
   up_irqinitialize();
 
-  /* Initialize the DMA subsystem if the weak function stm32_dmainitialize has been
-   * brought into the build
+#ifdef CONFIG_PM
+  /* Initialize the power management subsystem.  This MCU-specific function
+   * must be called *very* early in the initialization sequence *before* any
+   * other device drivers are initialized (since they may attempt to register
+   * with the power management subsystem).
    */
 
+  up_pminitialize();
+#endif
+
 #ifdef CONFIG_ARCH_DMA
+  /* Initialize the DMA subsystem if the weak function up_dmainitialize has been
+   * brought into the build
+   */
+
 #ifdef CONFIG_HAVE_WEAKFUNCTIONS
   if (up_dmainitialize)
 #endif
@@ -141,7 +154,7 @@ void up_initialize(void)
   /* Initialize the system timer interrupt */
 
 #if !defined(CONFIG_SUPPRESS_INTERRUPTS) && !defined(CONFIG_SUPPRESS_TIMER_INTS)
-  up_timer_initialize();
+  hc_timer_initialize();
 #endif
 
   /* Register devices */
@@ -152,6 +165,14 @@ void up_initialize(void)
   devnull_register();   /* Standard /dev/null */
 #endif
 
+#if defined(CONFIG_DEV_RANDOM)
+  devrandom_register(); /* Standard /dev/random */
+#endif
+
+#if defined(CONFIG_DEV_URANDOM)
+  devurandom_register();   /* Standard /dev/urandom */
+#endif
+
 #if defined(CONFIG_DEV_ZERO)
   devzero_register();   /* Standard /dev/zero */
 #endif
@@ -178,19 +199,33 @@ void up_initialize(void)
 
 #if defined(CONFIG_DEV_LOWCONSOLE)
   lowconsole_init();
-#elif defined(CONFIG_SYSLOG_CONSOLE)
+#elif defined(CONFIG_CONSOLE_SYSLOG)
   syslog_console_init();
 #elif defined(CONFIG_RAMLOG_CONSOLE)
   ramlog_consoleinit();
 #endif
 
-  /* Initialize the system logging device */
+#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_PSEUDOTERM_SUSV1)
+  /* Register the master pseudo-terminal multiplexor device */
+
+  (void)ptmx_register();
+#endif
+
+  /* Early initialization of the system logging device.  Some SYSLOG channel
+   * can be initialized early in the initialization sequence because they
+   * depend on only minimal OS initialization.
+   */
+
+  syslog_initialize(SYSLOG_INIT_EARLY);
 
-#ifdef CONFIG_SYSLOG_CHAR
-  syslog_initialize();
+#if defined(CONFIG_CRYPTO)
+  /* Initialize the HW crypto and /dev/crypto */
+
+  up_cryptoinitialize();
 #endif
-#ifdef CONFIG_RAMLOG_SYSLOG
-  ramlog_sysloginit();
+
+#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_CRYPTO_CRYPTODEV)
+  devcrypto_register();
 #endif
 
 #ifndef CONFIG_NETDEV_LATEINIT
diff --git a/arch/hc/src/common/up_internal.h b/arch/hc/src/common/up_internal.h
index 1650711f3a6c8b47b8c51524e0dc2795f7612824..f6f79a9c42dd5150eef72136af3ded3e060c0079 100644
--- a/arch/hc/src/common/up_internal.h
+++ b/arch/hc/src/common/up_internal.h
@@ -62,6 +62,10 @@
 #undef  CONFIG_SUPPRESS_UART_CONFIG   /* DEFINED: Do not reconfig UART */
 #undef  CONFIG_DUMP_ON_EXIT           /* DEFINED: Dump task state on exit */
 
+#ifndef CONFIG_DEBUG_SCHED_INFO
+#  undef CONFIG_DUMP_ON_EXIT          /* Needs CONFIG_DEBUG_SCHED_INFO */
+#endif
+
 /* Determine which (if any) console driver to use.  If a console is enabled
  * and no other console device is specified, then a serial console is
  * assumed.
@@ -96,13 +100,6 @@
 #    define USE_SERIALDRIVER 1
 #endif
 
-/* Determine which device to use as the system logging device */
-
-#ifndef CONFIG_SYSLOG
-#  undef CONFIG_SYSLOG_CHAR
-#  undef CONFIG_RAMLOG_SYSLOG
-#endif
-
 /* Check if an interrupt stack size is configured */
 
 #ifndef CONFIG_ARCH_INTERRUPTSTACK
@@ -176,8 +173,7 @@ void up_sigdeliver(void);
 
 /* System timer initialization */
 
-void up_timer_initialize(void);
-int  up_timerisr(int irq, uint32_t *regs);
+void hc_timer_initialize(void);
 
 /* Debug output */
 
diff --git a/arch/hc/src/common/up_releasepending.c b/arch/hc/src/common/up_releasepending.c
index d9a209c343765022ac61114163dd75ec94336fc8..f2afeabd794b7611274f18cdbbffd50cfe274c10 100644
--- a/arch/hc/src/common/up_releasepending.c
+++ b/arch/hc/src/common/up_releasepending.c
@@ -66,7 +66,7 @@ void up_release_pending(void)
 {
   struct tcb_s *rtcb = this_task();
 
-  slldbg("From TCB=%p\n", rtcb);
+  sinfo("From TCB=%p\n", rtcb);
 
   /* Merge the g_pendingtasks list into the ready-to-run task list */
 
diff --git a/arch/hc/src/common/up_reprioritizertr.c b/arch/hc/src/common/up_reprioritizertr.c
index efdde667389c5d8490a1ed9e49dd33c2955e37cd..0b0d400d9a536692f9d7b23e657b9e221cc7d2bc 100644
--- a/arch/hc/src/common/up_reprioritizertr.c
+++ b/arch/hc/src/common/up_reprioritizertr.c
@@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
       struct tcb_s *rtcb = this_task();
       bool switch_needed;
 
-      slldbg("TCB=%p PRI=%d\n", tcb, priority);
+      sinfo("TCB=%p PRI=%d\n", tcb, priority);
 
       /* Remove the tcb task from the ready-to-run list.
        * sched_removereadytorun will return true if we just
diff --git a/arch/hc/src/m9s12/Kconfig b/arch/hc/src/m9s12/Kconfig
index 9e05745e49c8d24adb7ad1e3096c9338877aca5e..37c357c79d7b0cc4999fb508e0dcc9788de9d8fe 100644
--- a/arch/hc/src/m9s12/Kconfig
+++ b/arch/hc/src/m9s12/Kconfig
@@ -40,4 +40,12 @@ config HCS12_NONBANKED
 		in memory.
 
 endmenu # HSC12 Build Options
+
+config HCS12_GPIOIRQ
+	bool "GPIO interrupt support"
+	default n
+	depends on EXPERIMENTAL
+	---help---
+		Enable support for GPIO interrupts (not implemented)
+
 endif # ARCH_HSC12
diff --git a/arch/hc/src/m9s12/Make.defs b/arch/hc/src/m9s12/Make.defs
index 809a0696c338b44501fdbf1833119c228ee295df..5b7ffaffea4f0251172e100aea53e4a53f76cfbf 100644
--- a/arch/hc/src/m9s12/Make.defs
+++ b/arch/hc/src/m9s12/Make.defs
@@ -1,5 +1,5 @@
 ############################################################################
-# arch/arm/src/m9s12/Make.defs
+# arch/hc/src/m9s12/Make.defs
 #
 #   Copyright (C) 2009, 2011, 2014 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
@@ -50,6 +50,6 @@ ifneq ($(CONFIG_SCHED_TICKLESS),y)
 CHIP_CSRCS += m9s12_timerisr.c
 endif
 
-ifeq ($(CONFIG_DEBUG_GPIO),y)
+ifeq ($(CONFIG_DEBUG_GPIO_INFO),y)
 CHIP_CSRCS+= m9s12_dumpgpio.c
 endif
diff --git a/arch/hc/src/m9s12/m9s12.h b/arch/hc/src/m9s12/m9s12.h
index e6c98244deda20b850e49e986ba5c71a5cd5cc2f..50e3a14abe7b298a655d28db7cb314d3be994736 100644
--- a/arch/hc/src/m9s12/m9s12.h
+++ b/arch/hc/src/m9s12/m9s12.h
@@ -266,7 +266,7 @@ bool hcs12_gpioread(uint16_t pinset);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_HCS12_GPIOIRQ
 void hcs12_gpioirqenable(int irq);
 #else
 #  define hcs12_gpioirqenable(irq)
@@ -280,7 +280,7 @@ void hcs12_gpioirqenable(int irq);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_HCS12_GPIOIRQ
 void hcs12_gpioirqdisable(int irq);
 #else
 #  define hcs12_gpioirqdisable(irq)
@@ -294,7 +294,7 @@ void hcs12_gpioirqdisable(int irq);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 int hcs12_dumpgpio(uint16_t pinset, const char *msg);
 #else
 #  define hcs12_dumpgpio(p,m)
diff --git a/arch/hc/src/m9s12/m9s12_assert.c b/arch/hc/src/m9s12/m9s12_assert.c
index 1eab6eb4e340eb853404673bb306161d1494a1f7..496b3933a662e9468f4e7c4ba74e9d76e9663b76 100644
--- a/arch/hc/src/m9s12/m9s12_assert.c
+++ b/arch/hc/src/m9s12/m9s12_assert.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/hc/src/m9s12/m9s12_assert.c
  *
- *   Copyright (C) 2011-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 #include 
@@ -75,23 +64,6 @@
 #  undef CONFIG_ARCH_USBDUMP
 #endif
 
-/* The following is just intended to keep some ugliness out of the mainline
- * code.  We are going to print the task name if:
- *
- *  CONFIG_TASK_NAME_SIZE > 0 &&    <-- The task has a name
- *  (defined(CONFIG_DEBUG)    ||    <-- And the debug is enabled (lldbg used)
- *   defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
- */
-
-#undef CONFIG_PRINT_TASKNAME
-#if CONFIG_TASK_NAME_SIZE > 0 && (defined(CONFIG_DEBUG) || defined(CONFIG_ARCH_STACKDUMP))
-#  define CONFIG_PRINT_TASKNAME 1
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -108,7 +80,7 @@ static void up_stackdump(uint16_t sp, uint16_t stack_base)
   for (stack = sp; stack < stack_base; stack += 16)
     {
       uint8_t *ptr = (uint8_t*)stack;
-      lldbg("%04x: %02x %02x %02x %02x %02x %02x %02x %02x"
+      _alert("%04x: %02x %02x %02x %02x %02x %02x %02x %02x"
             "   %02x %02x %02x %02x %02x %02x %02x %02x\n",
              stack, ptr[0], ptr[1], ptr[2], ptr[3], ptr[4], ptr[5], ptr[6], ptr[7],
              ptr[8], ptr[9], ptr[10], ptr[11], ptr[12], ptr[13], ptr[14], ptr[15]);
@@ -129,11 +101,11 @@ static inline void up_registerdump(void)
 
   if (g_current_regs)
     {
-      lldbg("A:%02x B:%02x X:%02x%02x Y:%02x%02x PC:%02x%02x CCR:%02x\n",
+      _alert("A:%02x B:%02x X:%02x%02x Y:%02x%02x PC:%02x%02x CCR:%02x\n",
              g_current_regs[REG_A], g_current_regs[REG_B], g_current_regs[REG_XH],
              g_current_regs[REG_XL], g_current_regs[REG_YH], g_current_regs[REG_YL],
              g_current_regs[REG_PCH], g_current_regs[REG_PCL], g_current_regs[REG_CCR]);
-      lldbg("SP:%02x%02x FRAME:%02x%02x TMP:%02x%02x Z:%02x%02x XY:%02x\n",
+      _alert("SP:%02x%02x FRAME:%02x%02x TMP:%02x%02x Z:%02x%02x XY:%02x\n",
              g_current_regs[REG_SPH], g_current_regs[REG_SPL],
              g_current_regs[REG_FRAMEH], g_current_regs[REG_FRAMEL],
              g_current_regs[REG_TMPL], g_current_regs[REG_TMPH], g_current_regs[REG_ZL],
@@ -142,16 +114,16 @@ static inline void up_registerdump(void)
 #if CONFIG_HCS12_MSOFTREGS > 2
 #  error "Need to save more registers"
 #elif CONFIG_HCS12_MSOFTREGS == 2
-      lldbg("SOFTREGS: %02x%02x :%02x%02x\n",
+      _alert("SOFTREGS: %02x%02x :%02x%02x\n",
             g_current_regs[REG_SOFTREG1], g_current_regs[REG_SOFTREG1+1],
             g_current_regs[REG_SOFTREG2], g_current_regs[REG_SOFTREG2+1]);
 #elif CONFIG_HCS12_MSOFTREGS == 1
-      lldbg("SOFTREGS: %02x%02x\n", g_current_regs[REG_SOFTREG1],
+      _alert("SOFTREGS: %02x%02x\n", g_current_regs[REG_SOFTREG1],
             g_current_regs[REG_SOFTREG1+1]);
 #endif
 
 #ifndef CONFIG_HCS12_NONBANKED
-      lldbg("PPAGE: %02x\n", g_current_regs[REG_PPAGE],);
+      _alert("PPAGE: %02x\n", g_current_regs[REG_PPAGE],);
 #endif
     }
 }
@@ -172,7 +144,7 @@ static int usbtrace_syslog(FAR const char *fmt, ...)
   /* Let vsyslog do the real work */
 
   va_start(ap, fmt);
-  ret = lowvsyslog(LOG_INFO, fmt, ap);
+  ret = vsyslog(LOG_EMERG, fmt, ap);
   va_end(ap);
   return ret;
 }
@@ -221,10 +193,10 @@ static void up_dumpstate(void)
 
   /* Show interrupt stack info */
 
-  lldbg("sp:     %04x\n", sp);
-  lldbg("IRQ stack:\n");
-  lldbg("  base: %04x\n", istackbase);
-  lldbg("  size: %04x\n", istacksize);
+  _alert("sp:     %04x\n", sp);
+  _alert("IRQ stack:\n");
+  _alert("  base: %04x\n", istackbase);
+  _alert("  size: %04x\n", istacksize);
 
   /* Does the current stack pointer lie within the interrupt
    * stack?
@@ -241,18 +213,18 @@ static void up_dumpstate(void)
        */
 
       sp = g_intstackbase;
-      lldbg("sp:     %04x\n", sp);
+      _alert("sp:     %04x\n", sp);
     }
 
   /* Show user stack info */
 
-  lldbg("User stack:\n");
-  lldbg("  base: %04x\n", ustackbase);
-  lldbg("  size: %04x\n", ustacksize);
+  _alert("User stack:\n");
+  _alert("  base: %04x\n", ustackbase);
+  _alert("  size: %04x\n", ustacksize);
 #else
-  lldbg("sp:         %04x\n", sp);
-  lldbg("stack base: %04x\n", ustackbase);
-  lldbg("stack size: %04x\n", ustacksize);
+  _alert("sp:         %04x\n", sp);
+  _alert("stack base: %04x\n", ustackbase);
+  _alert("stack size: %04x\n", ustacksize);
 #endif
 
   /* Dump the user stack if the stack pointer lies within the allocated user
@@ -262,7 +234,7 @@ static void up_dumpstate(void)
   if (sp > ustackbase || sp <= ustackbase - ustacksize)
     {
 #if !defined(CONFIG_ARCH_INTERRUPTSTACK) || CONFIG_ARCH_INTERRUPTSTACK < 4
-      lldbg("ERROR: Stack pointer is not within allocated stack\n");
+      _alert("ERROR: Stack pointer is not within allocated stack\n");
 #endif
     }
   else
@@ -322,17 +294,17 @@ static void _up_assert(int errorcode)
 
 void up_assert(const uint8_t *filename, int lineno)
 {
-#ifdef CONFIG_PRINT_TASKNAME
+#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
   struct tcb_s *rtcb = this_task();
 #endif
 
   board_autoled_on(LED_ASSERTION);
 
-#ifdef CONFIG_PRINT_TASKNAME
-  lldbg("Assertion failed at file:%s line: %d task: %s\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+  _alert("Assertion failed at file:%s line: %d task: %s\n",
         filename, lineno, rtcb->name);
 #else
-  lldbg("Assertion failed at file:%s line: %d\n",
+  _alert("Assertion failed at file:%s line: %d\n",
         filename, lineno);
 #endif
 
diff --git a/arch/hc/src/m9s12/m9s12_atd.h b/arch/hc/src/m9s12/m9s12_atd.h
index 6c6946bceb66319ca895b49b619a25a54b64650c..6df615b31a6510ad8eaaf630e1a0dc433889b4ed 100644
--- a/arch/hc/src/m9s12/m9s12_atd.h
+++ b/arch/hc/src/m9s12/m9s12_atd.h
@@ -1,6 +1,6 @@
 /************************************************************************************
  * arch/hc/src/m9s12/m9s12_atd.h
- * Defintions for ATD10b8c v3
+ * Definitions for ATD10b8c v3
  *
  *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/hc/src/m9s12/m9s12_dumpgpio.c b/arch/hc/src/m9s12/m9s12_dumpgpio.c
index db4261256ba2ca623b2a7dae76dab0dd62c7edcd..4a7d3860fa2c15d0c76e1a7f2600d037075dcfa8 100644
--- a/arch/hc/src/m9s12/m9s12_dumpgpio.c
+++ b/arch/hc/src/m9s12/m9s12_dumpgpio.c
@@ -1,8 +1,7 @@
 /****************************************************************************
- * arch/arm/src/m9s12/m9s12_dumpgpio.c
- * arch/arm/src/chip/m9s12_dumpgpio.c
+ * arch/hc/src/m9s12/m9s12_dumpgpio.c
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +39,13 @@
 
 #include 
 
+/* Output debug info -- even if debug is not selected. */
+
+#undef  CONFIG_DEBUG_FEATURES
+#undef  CONFIG_DEBUG_INFO
+#define CONFIG_DEBUG_FEATURES 1
+#define CONFIG_DEBUG_INFO 1
+
 #include 
 #include 
 #include 
@@ -49,7 +55,7 @@
 #include "m9s12_pim.h"
 #include "m9s12_mebi.h"
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -166,39 +172,39 @@ static inline void hcs12_pimdump(uint8_t portndx)
 
   if (portndx >= HCS12_PIM_NPORTS)
     {
-      lldbg("  Illegal PIM port index: %d\n", portndx);
+      gpioinfo("  Illegal PIM port index: %d\n", portndx);
       return;
     }
 
   ptr = &piminfo[portndx];
-  lldbg(" PIM Port%c:\n", ptr->name);
-  lldbg("   IO:%02x  INP:%02x DDR:%02x RDR:%02x\n",
-        getreg8(ptr->base+HCS12_PIM_IO_OFFSET),
-        getreg8(ptr->base+HCS12_PIM_INPUT_OFFSET),
-        getreg8(ptr->base+HCS12_PIM_DDR_OFFSET),
-        getreg8(ptr->base+HCS12_PIM_RDR_OFFSET));
+  gpioinfo(" PIM Port%c:\n", ptr->name);
+  gpioinfo("   IO:%02x  INP:%02x DDR:%02x RDR:%02x\n",
+           getreg8(ptr->base+HCS12_PIM_IO_OFFSET),
+           getreg8(ptr->base+HCS12_PIM_INPUT_OFFSET),
+           getreg8(ptr->base+HCS12_PIM_DDR_OFFSET),
+           getreg8(ptr->base+HCS12_PIM_RDR_OFFSET));
 
   switch (ptr->form)
     {
     case PIMPORT_FORM1:
-      lldbg("  PER:%02x  PS:%02x\n",
-            getreg8(ptr->base+HCS12_PIM_PER_OFFSET),
-            getreg8(ptr->base+HCS12_PIM_PS_OFFSET));
+      gpioinfo("  PER:%02x  PS:%02x\n",
+               getreg8(ptr->base+HCS12_PIM_PER_OFFSET),
+               getreg8(ptr->base+HCS12_PIM_PS_OFFSET));
       break;
 
     case PIMPORT_FORM2:
-      lldbg("  PER:%02x  PS:%02x WOM:%02x\n",
-            getreg8(ptr->base+HCS12_PIM_PER_OFFSET),
-            getreg8(ptr->base+HCS12_PIM_PS_OFFSET),
-            getreg8(ptr->base+HCS12_PIM_WOM_OFFSET));
+      gpioinfo("  PER:%02x  PS:%02x WOM:%02x\n",
+               getreg8(ptr->base+HCS12_PIM_PER_OFFSET),
+               getreg8(ptr->base+HCS12_PIM_PS_OFFSET),
+               getreg8(ptr->base+HCS12_PIM_WOM_OFFSET));
       break;
 
     case PIMPORT_FORM3:
-      lldbg("  PER:%02x  PS:%02x  IE:%02x  IF:%02x\n",
-            getreg8(ptr->base+HCS12_PIM_PER_OFFSET),
-            getreg8(ptr->base+HCS12_PIM_PS_OFFSET),
-            getreg8(ptr->base+HCS12_PIM_IE_OFFSET),
-            getreg8(ptr->base+HCS12_PIM_IF_OFFSET));
+      gpioinfo("  PER:%02x  PS:%02x  IE:%02x  IF:%02x\n",
+               getreg8(ptr->base+HCS12_PIM_PER_OFFSET),
+               getreg8(ptr->base+HCS12_PIM_PS_OFFSET),
+               getreg8(ptr->base+HCS12_PIM_IE_OFFSET),
+               getreg8(ptr->base+HCS12_PIM_IF_OFFSET));
       break;
 
     default:
@@ -220,30 +226,30 @@ static inline void hcs12_mebidump(uint8_t portndx)
 
   if (portndx >= HCS12_MEBI_NPORTS)
     {
-      lldbg("  Illegal MEBI port index: %d\n", portndx);
+      gpioinfo("  Illegal MEBI port index: %d\n", portndx);
       return;
     }
 
   ptr = &mebiinfo[portndx];
-  lldbg(" MEBI Port%c:\n", ptr->name);
+  gpioinfo(" MEBI Port%c:\n", ptr->name);
 
   switch (ptr->form)
     {
     case MEBIPORT_AB:
-      lldbg("   DATA:%02x DDR:%02x\n",
-            getreg8(ptr->data), getreg8(ptr->ddr));
+      gpioinfo("   DATA:%02x DDR:%02x\n",
+              getreg8(ptr->data), getreg8(ptr->ddr));
       break;
 
     case MEBIPORT_E:
-      lldbg("   DATA:%02x DDR:%02x MODE:%02x PEAR:%02x\n",
-            getreg8(ptr->data), getreg8(ptr->ddr),
-            getreg8(HCS12_MEBI_MODE), getreg8(HCS12_MEBI_PEAR));
+      gpioinfo("   DATA:%02x DDR:%02x MODE:%02x PEAR:%02x\n",
+               getreg8(ptr->data), getreg8(ptr->ddr),
+               getreg8(HCS12_MEBI_MODE), getreg8(HCS12_MEBI_PEAR));
       break;
 
     case MEBIPORT_K:
-      lldbg("   DATA:%02x DDR:%02x MODE:%02x\n",
-            getreg8(ptr->data), getreg8(ptr->ddr),
-            getreg8(HCS12_MEBI_MODE));
+      gpioinfo("   DATA:%02x DDR:%02x MODE:%02x\n",
+               getreg8(ptr->data), getreg8(ptr->ddr),
+               getreg8(HCS12_MEBI_MODE));
       break;
 
     default:
@@ -268,7 +274,7 @@ int hcs12_dumpgpio(uint16_t pinset, const char *msg)
   uint8_t portndx = HCS12_PORTNDX(pinset);
   irqstate_t flags = enter_critical_section();
 
-  lldbg("pinset: %08x -- %s\n", pinset, msg);
+  gpioinfo("pinset: %08x -- %s\n", pinset, msg);
 
   if (HCS12_PIMPORT(pinset))
     {
@@ -283,5 +289,4 @@ int hcs12_dumpgpio(uint16_t pinset, const char *msg)
   return OK;
 }
 
-#endif /* CONFIG_DEBUG_GPIO */
-
+#endif /* CONFIG_DEBUG_GPIO_INFO */
diff --git a/arch/hc/src/m9s12/m9s12_ethernet.c b/arch/hc/src/m9s12/m9s12_ethernet.c
index ad3e1ef6b86d96165bdb3678c10708e4057868d0..2a2673ed5f8d34cd24afac40c00c3765b897bb10 100644
--- a/arch/hc/src/m9s12/m9s12_ethernet.c
+++ b/arch/hc/src/m9s12/m9s12_ethernet.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * drivers/net/m9s12_ethernet.c
+ * arch/hc/src/m9s12/m9s12_ethernet.c
  *
- *   Copyright (C) 2011, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2014-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -106,6 +106,12 @@ struct emac_driver_s
  * Private Data
  ****************************************************************************/
 
+/* A single packet buffer is used */
+
+static uint8_t g_pktbuf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
+
+/* Driver state structure */
+
 static struct emac_driver_s g_emac[CONFIG_HCS12_NINTERFACES];
 
 /****************************************************************************
@@ -121,7 +127,7 @@ static int  emac_txpoll(struct net_driver_s *dev);
 
 static void emac_receive(FAR struct emac_driver_s *priv);
 static void emac_txdone(FAR struct emac_driver_s *priv);
-static int  emac_interrupt(int irq, FAR void *context);
+static int  emac_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
@@ -294,7 +300,7 @@ static void emac_receive(FAR struct emac_driver_s *priv)
 #ifdef CONFIG_NET_IPv4
       if (BUF->type == HTONS(ETHTYPE_IP))
         {
-          nllvdbg("IPv4 frame\n");
+          ninfo("IPv4 frame\n");
 
           /* Handle ARP on input then give the IPv4 packet to the network
            * layer
@@ -334,7 +340,7 @@ static void emac_receive(FAR struct emac_driver_s *priv)
 #ifdef CONFIG_NET_IPv6
       if (BUF->type == HTONS(ETHTYPE_IP6))
         {
-          nllvdbg("Iv6 frame\n");
+          ninfo("Iv6 frame\n");
 
           /* Give the IPv6 packet to the network layer */
 
@@ -436,7 +442,7 @@ static void emac_txdone(FAR struct emac_driver_s *priv)
  *
  ****************************************************************************/
 
-static int emac_interrupt(int irq, FAR void *context)
+static int emac_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   register FAR struct emac_driver_s *priv = &g_emac[0];
 
@@ -549,9 +555,9 @@ static int emac_ifup(struct net_driver_s *dev)
 {
   FAR struct emac_driver_s *priv = (FAR struct emac_driver_s *)dev->d_private;
 
-  ndbg("Bringing up: %d.%d.%d.%d\n",
-       dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-       (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24 );
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24 );
 
   /* Initialize PHYs, the Ethernet interface, and setup up Ethernet interrupts */
 
@@ -746,7 +752,7 @@ int emac_initialize(int intf)
 
   /* Attach the IRQ to the driver */
 
-  if (irq_attach(CONFIG_HCS12_IRQ, emac_interrupt))
+  if (irq_attach(CONFIG_HCS12_IRQ, emac_interrupt, NULL))
     {
       /* We could not attach the ISR to the interrupt */
 
@@ -756,6 +762,7 @@ int emac_initialize(int intf)
   /* Initialize the driver structure */
 
   memset(priv, 0, sizeof(struct emac_driver_s));
+  priv->d_dev.d_buf     = g_pktbuf;      /* Single packet buffer */
   priv->d_dev.d_ifup    = emac_ifup;     /* I/F down callback */
   priv->d_dev.d_ifdown  = emac_ifdown;   /* I/F up (new IP address) callback */
   priv->d_dev.d_txavail = emac_txavail;  /* New TX data callback */
@@ -767,8 +774,8 @@ int emac_initialize(int intf)
 
   /* Create a watchdog for timing polling for and timing of transmisstions */
 
-  priv->d_txpoll       = wd_create();   /* Create periodic poll timer */
-  priv->d_txtimeout    = wd_create();   /* Create TX timeout timer */
+  priv->d_txpoll       = wd_create();    /* Create periodic poll timer */
+  priv->d_txtimeout    = wd_create();    /* Create TX timeout timer */
 
   /* Put the interface in the down state.  This usually amounts to resetting
    * the device and/or calling emac_ifdown().
diff --git a/arch/hc/src/m9s12/m9s12_gpio.c b/arch/hc/src/m9s12/m9s12_gpio.c
index 7d43f0a3d8a6fef99dc18f81e75648d6379315f6..b861ee2b402630092763f72c8bde58c1d29f8710 100644
--- a/arch/hc/src/m9s12/m9s12_gpio.c
+++ b/arch/hc/src/m9s12/m9s12_gpio.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/m9s12/m9s12_gpio.c
+ * arch/hc/src/m9s12/m9s12_gpio.c
  *
  *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -304,7 +304,7 @@ static inline void pim_configgpio(uint16_t cfgset, uint8_t portndx, uint8_t pin)
 
   DEBUGASSERT(portndx < HCS12_PIM_NPORTS);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if ((cfgset & GPIO_INT_ENABLE) != 0)
     {
       /* Yes.. then it must not be tagged as an output */
diff --git a/arch/hc/src/m9s12/m9s12_gpioirq.c b/arch/hc/src/m9s12/m9s12_gpioirq.c
index 4dae0551244d4077256ba7b1240e8269b5d7d4de..e8e5f697830a45ae1d0b591e87c56c159cee1a6d 100644
--- a/arch/hc/src/m9s12/m9s12_gpioirq.c
+++ b/arch/hc/src/m9s12/m9s12_gpioirq.c
@@ -1,6 +1,5 @@
 /****************************************************************************
- * arch/arm/src/m9s12/m9s12_gpioirq.c
- * arch/arm/src/chip/m9s12_gpioirq.c
+ * arch/hc/src/m9s12/m9s12_gpioirq.c
  *
  *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -75,7 +74,7 @@
  *
  ****************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_HCS12_GPIOIRQ
 static int hcs12_mapirq(int irq, uint16_t *regaddr, uint8_t *pin)
 {
   if (irq >= HCC12_IRQ_PGFIRST)
@@ -121,7 +120,7 @@ static int hcs12_mapirq(int irq, uint16_t *regaddr, uint8_t *pin)
     }
   return -EINVAL;
 }
-#endif /* CONFIG_GPIO_IRQ */
+#endif /* CONFIG_HCS12_GPIOIRQ */
 
 /****************************************************************************
  * Name: up_gpioa/b/cinterrupt
@@ -131,7 +130,7 @@ static int hcs12_mapirq(int irq, uint16_t *regaddr, uint8_t *pin)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_HCS12_GPIOIRQ
 static int hcs12_interrupt(uint16_t base, int irq0, uint8_t valid, void *context)
 {
   uint8_t pending;
@@ -182,7 +181,7 @@ static int hcs12_interrupt(uint16_t base, int irq0, uint8_t valid, void *context
 }
 
 #ifdef CONFIG_HCS12_PORTG_INTS
-static int hcs12_pginterrupt(int irq, void *context)
+static int hcs12_pginterrupt(int irq, void *context, FAR void *arg)
 {
   return hcs12_interrupt(HCS12_PIM_PORTG_BASE, HCS12_IRQ_PG0,
                          HCS12_IRQ_PGSET, context);
@@ -190,7 +189,7 @@ static int hcs12_pginterrupt(int irq, void *context)
 #endif
 
 #ifdef CONFIG_HCS12_PORTH_INTS
-static int hcs12_phinterrupt(int irq, void *context)
+static int hcs12_phinterrupt(int irq, void *context, FAR void *arg)
 {
   return hcs12_interrupt(HCS12_PIM_PORTH_BASE, HCS12_IRQ_PH0,
                          HCS12_IRQ_PHSET, context);
@@ -198,13 +197,13 @@ static int hcs12_phinterrupt(int irq, void *context)
 #endif
 
 #ifdef CONFIG_HCS12_PORTJ_INTS
-static int hcs12_pjinterrupt(int irq, void *context)
+static int hcs12_pjinterrupt(int irq, void *context, FAR void *arg)
 {
   return hcs12_interrupt(HCS12_PIM_PORTJ_BASE, HCS12_IRQ_PJ0,
                          HCS12_IRQ_PJSET, context);
 }
 #endif
-#endif /* CONFIG_GPIO_IRQ */
+#endif /* CONFIG_HCS12_GPIOIRQ */
 
 /****************************************************************************
  * Public Functions
@@ -229,17 +228,17 @@ void hcs12_gpioirqinitialize(void)
 
   /* Attach GPIO IRQ interrupt handlers */
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_HCS12_GPIOIRQ
 # ifdef CONFIG_HCS12_PORTG_INTS
-  irq_attach(HCS12_IRQ_VPORTG, hcs12_pginterrupt);
+  irq_attach(HCS12_IRQ_VPORTG, hcs12_pginterrupt, NULL);
 # endif
 # ifdef CONFIG_HCS12_PORTH_INTS
-  irq_attach(HCS12_IRQ_VPORTH, hcs12_phinterrupt);
+  irq_attach(HCS12_IRQ_VPORTH, hcs12_phinterrupt, NULL);
 # endif
 # ifdef CONFIG_HCS12_PORTJ_INTS
-  irq_attach(HCS12_IRQ_VPORTJ, hcs12_pjinterrupt);
+  irq_attach(HCS12_IRQ_VPORTJ, hcs12_pjinterrupt, NULL);
 # endif
-#endif /* CONFIG_GPIO_IRQ */
+#endif /* CONFIG_HCS12_GPIOIRQ */
 }
 
 /****************************************************************************
@@ -250,7 +249,7 @@ void hcs12_gpioirqinitialize(void)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_HCS12_GPIOIRQ
 void hcs12_gpioirqenable(int irq)
 {
   uint16_t regaddr;
@@ -265,7 +264,7 @@ void hcs12_gpioirqenable(int irq)
        leave_critical_section(flags);
     }
 }
-#endif /* CONFIG_GPIO_IRQ */
+#endif /* CONFIG_HCS12_GPIOIRQ */
 
 /****************************************************************************
  * Name: hcs12_gpioirqdisable
@@ -275,7 +274,7 @@ void hcs12_gpioirqenable(int irq)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_HCS12_GPIOIRQ
 void hcs12_gpioirqdisable(int irq)
 {
   uint16_t regaddr;
@@ -290,5 +289,5 @@ void hcs12_gpioirqdisable(int irq)
        leave_critical_section(flags);
     }
 }
-#endif /* CONFIG_GPIO_IRQ */
+#endif /* CONFIG_HCS12_GPIOIRQ */
 
diff --git a/arch/hc/src/m9s12/m9s12_irq.c b/arch/hc/src/m9s12/m9s12_irq.c
index a91c270f099f2927e1b1d2eac477011f93458119..9f95388915c0267bb94b2da5192c8cc0bc25f705 100644
--- a/arch/hc/src/m9s12/m9s12_irq.c
+++ b/arch/hc/src/m9s12/m9s12_irq.c
@@ -1,6 +1,5 @@
 /****************************************************************************
- * arch/arm/src/m9s12/m9s12_irq.c
- * arch/arm/src/chip/m9s12_irq.c
+ * arch/hc/src/m9s12/m9s12_irq.c
  *
  *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -75,7 +74,7 @@ void up_irqinitialize(void)
    * GPIO pins.
    */
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_HCS12_GPIOIRQ
   hcs12_gpioirqinitialize();
 #endif
 
diff --git a/arch/hc/src/m9s12/m9s12_lowputc.S b/arch/hc/src/m9s12/m9s12_lowputc.S
index 1b363435e9ac2b8ef2ffe8fad2b9d1941717f45f..ca7f0647846ba46862cb07a2bae38cca4b2dbe37 100644
--- a/arch/hc/src/m9s12/m9s12_lowputc.S
+++ b/arch/hc/src/m9s12/m9s12_lowputc.S
@@ -1,5 +1,5 @@
 /**************************************************************************
- * arch/arm/src/m9s12/m9s12_lowputc.S
+ * arch/hc/src/m9s12/m9s12_lowputc.S
  *
  *   Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/hc/src/m9s12/m9s12_saveusercontext.S b/arch/hc/src/m9s12/m9s12_saveusercontext.S
index 8538cc1f063ba41deb31010baa6741211f40bbf2..417af5a66e1f80ba54eea7daffd813a4008b7ba7 100644
--- a/arch/hc/src/m9s12/m9s12_saveusercontext.S
+++ b/arch/hc/src/m9s12/m9s12_saveusercontext.S
@@ -1,5 +1,5 @@
 /**************************************************************************
- * arch/arm/src/m9s12/m9s12_saveusercontext.S
+ * arch/hc/src/m9s12/m9s12_saveusercontext.S
  *
  *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/hc/src/m9s12/m9s12_serial.c b/arch/hc/src/m9s12/m9s12_serial.c
index 1bc0091395be3a002deb2a0f584cbdb7b1b78057..a6524534bdaba2d9c0fea7a3d5ac5cf5a71da89c 100644
--- a/arch/hc/src/m9s12/m9s12_serial.c
+++ b/arch/hc/src/m9s12/m9s12_serial.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/hc/src/m9s12/m9s12_serial.c
  *
- *   Copyright (C) 2009, 2011-2012, 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2011-2012, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -123,7 +123,7 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-static int  up_interrupt(int irq, void *context);
+static int  up_interrupt(int irq, void *context, void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  up_receive(struct uart_dev_s *dev, uint32_t *status);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
@@ -422,7 +422,7 @@ static int up_attach(struct uart_dev_s *dev)
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, up_interrupt);
+  ret = irq_attach(priv->irq, up_interrupt, dev);
   if (ret == OK)
     {
        /* Enable the Rx interrupt (the TX interrupt is still disabled
@@ -465,30 +465,14 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_interrupt(int irq, void *context)
+static int up_interrupt(int irq, void *context, void *arg)
 {
-  struct uart_dev_s *dev = NULL;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct up_dev_s   *priv;
   int                passes;
   bool               handled;
 
-#ifndef CONFIG_SCI0_DISABLE
-  if (g_sci0priv.irq == irq)
-    {
-      dev = &g_sci0port;
-    }
-  else
-#endif
-#ifndef CONFIG_SCI1_DISABLE
-  if (g_sci1priv.irq == irq)
-    {
-      dev = &g_sci1port;
-    }
-  else
-#endif
-    {
-      PANIC();
-    }
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct up_dev_s*)dev->priv;
 
   /* Loop until there are no characters to be transferred or,
diff --git a/arch/hc/src/m9s12/m9s12_start.S b/arch/hc/src/m9s12/m9s12_start.S
index 49d31b4e1dde018cda7dabf6c5d5e17904aa228b..f6b54ad58f0400e52c7c5693d1542b5b7d4aebde 100644
--- a/arch/hc/src/m9s12/m9s12_start.S
+++ b/arch/hc/src/m9s12/m9s12_start.S
@@ -1,6 +1,5 @@
 /****************************************************************************
  * arch/hc/src/m9s12/m9s12_start.S
- * arch/hc/src/chip/m9s12_start.S
  *
  *	 Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
  *	 Author: Gregory Nutt 
@@ -82,7 +81,7 @@
  */
 
 	.macro	showprogress, code
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 	ldab	\code
 #ifdef CONFIG_HCS12_SERIALMON
 	jsr		#PutChar
diff --git a/arch/hc/src/m9s12/m9s12_timerisr.c b/arch/hc/src/m9s12/m9s12_timerisr.c
index c0c74697ff1012e0db6a0a2ce2548a45eaec6c6b..f8d570b66d7d6f88a05f86e3ed0c81d075cbcd4b 100644
--- a/arch/hc/src/m9s12/m9s12_timerisr.c
+++ b/arch/hc/src/m9s12/m9s12_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/hc/src/m9s12/m9s12_timerisr.c
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -119,19 +119,11 @@
 #define MODCNT_VALUE  ((((uint32_t)HCS12_OSCCLK  + (MODCNT_DENOM/2))/ MODCNT_DENOM) - 1)
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  m9s12_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -139,7 +131,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int m9s12_timerisr(int irq, uint32_t *regs, void *arg)
 {
   /* Clear real time interrupt flag */
 
@@ -152,7 +144,11 @@ int up_timerisr(int irq, uint32_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  hc_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize the system timer
@@ -160,7 +156,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void hc_timer_initialize(void)
 {
   uint32_t tmp;
   uint8_t  regval;
@@ -175,7 +171,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(HCS12_IRQ_VRTI, (xcpt_t)up_timerisr);
+  (void)irq_attach(HCS12_IRQ_VRTI, (xcpt_t)m9s12_timerisr, NULL);
 
   /* Enable RTI interrupt by setting the RTIE bit */
 
diff --git a/arch/hc/src/m9s12/m9s12_vectors.S b/arch/hc/src/m9s12/m9s12_vectors.S
index fbe4d69f0a7d14a6ea75c89d9f4e5e28bb0b9bf8..10bbe54064873e56c96967533716004f219c6d97 100644
--- a/arch/hc/src/m9s12/m9s12_vectors.S
+++ b/arch/hc/src/m9s12/m9s12_vectors.S
@@ -1,6 +1,5 @@
 /************************************************************************************
  * arch/hc/src/m9s12/m9s12_vectors.S
- * arch/hc/src/chip/m9s12_vectors.S
  *
  *	 Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
  *	 Author: Gregory Nutt 
diff --git a/arch/mips/include/inttypes.h b/arch/mips/include/inttypes.h
new file mode 100644
index 0000000000000000000000000000000000000000..81006c8eacea226633bee18fec62c0869de31e13
--- /dev/null
+++ b/arch/mips/include/inttypes.h
@@ -0,0 +1,245 @@
+/****************************************************************************
+ * arch/mips/include/inttypes.h
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_MIPS_INCLUDE_INTTYPES_H
+#define __ARCH_MIPS_INCLUDE_INTTYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define PRId8       "d"
+#define PRId16      "d"
+#define PRId32      "d"
+#define PRId64      "lld"
+
+#define PRIdLEAST8  "d"
+#define PRIdLEAST16 "d"
+#define PRIdLEAST32 "d"
+#define PRIdLEAST64 "lld"
+
+#define PRIdFAST8   "d"
+#define PRIdFAST16  "d"
+#define PRIdFAST32  "d"
+#define PRIdFAST64  "lld"
+
+#define PRIdMAX     "lld"
+#define PRIdPTR     "d"
+
+#define PRIi8       "i"
+#define PRIi16      "i"
+#define PRIi32      "i"
+#define PRIi64      "lli"
+
+#define PRIiLEAST8  "i"
+#define PRIiLEAST16 "i"
+#define PRIiLEAST32 "i"
+#define PRIiLEAST64 "lli"
+
+#define PRIiFAST8   "i"
+#define PRIiFAST16  "i"
+#define PRIiFAST32  "i"
+#define PRIiFAST64  "lli"
+
+#define PRIiMAX     "lli"
+#define PRIiPTR     "i"
+
+#define PRIo8       "o"
+#define PRIo16      "o"
+#define PRIo32      "o"
+#define PRIo64      "llo"
+
+#define PRIoLEAST8  "o"
+#define PRIoLEAST16 "o"
+#define PRIoLEAST32 "o"
+#define PRIoLEAST64 "llo"
+
+#define PRIoFAST8   "o"
+#define PRIoFAST16  "o"
+#define PRIoFAST32  "o"
+#define PRIoFAST64  "llo"
+
+#define PRIoMAX     "llo"
+#define PRIoPTR     "o"
+
+#define PRIu8       "u"
+#define PRIu16      "u"
+#define PRIu32      "u"
+#define PRIu64      "llu"
+
+#define PRIuLEAST8  "u"
+#define PRIuLEAST16 "u"
+#define PRIuLEAST32 "u"
+#define PRIuLEAST64 "llu"
+
+#define PRIuFAST8   "u"
+#define PRIuFAST16  "u"
+#define PRIuFAST32  "u"
+#define PRIuFAST64  "llu"
+
+#define PRIuMAX     "llu"
+#define PRIuPTR     "u"
+
+#define PRIx8       "x"
+#define PRIx16      "x"
+#define PRIx32      "x"
+#define PRIx64      "llx"
+
+#define PRIxLEAST8  "x"
+#define PRIxLEAST16 "x"
+#define PRIxLEAST32 "x"
+#define PRIxLEAST64 "llx"
+
+#define PRIxFAST8   "x"
+#define PRIxFAST16  "x"
+#define PRIxFAST32  "x"
+#define PRIxFAST64  "llx"
+
+#define PRIxMAX     "llx"
+#define PRIxPTR     "x"
+
+#define PRIX8       "X"
+#define PRIX16      "X"
+#define PRIX32      "X"
+#define PRIX64      "llX"
+
+#define PRIXLEAST8  "X"
+#define PRIXLEAST16 "X"
+#define PRIXLEAST32 "X"
+#define PRIXLEAST64 "llX"
+
+#define PRIXFAST8   "X"
+#define PRIXFAST16  "X"
+#define PRIXFAST32  "X"
+#define PRIXFAST64  "llX"
+
+#define PRIXMAX     "llX"
+#define PRIXPTR     "X"
+
+#define SCNd8       "hhd"
+#define SCNd16      "hd"
+#define SCNd32      "d"
+#define SCNd64      "lld"
+
+#define SCNdLEAST8  "hhd"
+#define SCNdLEAST16 "hd"
+#define SCNdLEAST32 "d"
+#define SCNdLEAST64 "lld"
+
+#define SCNdFAST8   "hhd"
+#define SCNdFAST16  "hd"
+#define SCNdFAST32  "d"
+#define SCNdFAST64  "lld"
+
+#define SCNdMAX     "lld"
+#define SCNdPTR     "d"
+
+#define SCNi8       "hhi"
+#define SCNi16      "hi"
+#define SCNi32      "i"
+#define SCNi64      "lli"
+
+#define SCNiLEAST8  "hhi"
+#define SCNiLEAST16 "hi"
+#define SCNiLEAST32 "i"
+#define SCNiLEAST64 "lli"
+
+#define SCNiFAST8   "hhi"
+#define SCNiFAST16  "hi"
+#define SCNiFAST32  "i"
+#define SCNiFAST64  "lli"
+
+#define SCNiMAX     "lli"
+#define SCNiPTR     "i"
+
+#define SCNo8       "hho"
+#define SCNo16      "ho"
+#define SCNo32      "o"
+#define SCNo64      "llo"
+
+#define SCNoLEAST8  "hho"
+#define SCNoLEAST16 "ho"
+#define SCNoLEAST32 "o"
+#define SCNoLEAST64 "llo"
+
+#define SCNoFAST8   "hho"
+#define SCNoFAST16  "ho"
+#define SCNoFAST32  "o"
+#define SCNoFAST64  "llo"
+
+#define SCNoMAX     "llo"
+#define SCNoPTR     "o"
+
+#define SCNu8       "hhu"
+#define SCNu16      "hu"
+#define SCNu32      "u"
+#define SCNu64      "llu"
+
+#define SCNuLEAST8  "hhu"
+#define SCNuLEAST16 "hu"
+#define SCNuLEAST32 "u"
+#define SCNuLEAST64 "llu"
+
+#define SCNuFAST8   "hhu"
+#define SCNuFAST16  "hu"
+#define SCNuFAST32  "u"
+#define SCNuFAST64  "llu"
+
+#define SCNuMAX     "llu"
+#define SCNuPTR     "u"
+
+#define SCNx8       "hhx"
+#define SCNx16      "hx"
+#define SCNx32      "x"
+#define SCNx64      "llx"
+
+#define SCNxLEAST8  "hhx"
+#define SCNxLEAST16 "hx"
+#define SCNxLEAST32 "x"
+#define SCNxLEAST64 "llx"
+
+#define SCNxFAST8   "hhx"
+#define SCNxFAST16  "hx"
+#define SCNxFAST32  "x"
+#define SCNxFAST64  "llx"
+
+#define SCNxMAX     "llx"
+#define SCNxPTR     "x"
+
+#endif /* __ARCH_MIPS_INCLUDE_INTTYPES_H */
diff --git a/arch/mips/src/common/up_createstack.c b/arch/mips/src/common/up_createstack.c
index 5540b8bc4f8fde821587e2e4d1d15a8545c0f9b1..69d5ff04869639cda3aa6e90a9ee77f871a2ef7a 100644
--- a/arch/mips/src/common/up_createstack.c
+++ b/arch/mips/src/common/up_createstack.c
@@ -158,12 +158,12 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
           tcb->stack_alloc_ptr = (uint32_t *)kumm_malloc(stack_size);
         }
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       /* Was the allocation successful? */
 
       if (!tcb->stack_alloc_ptr)
         {
-          sdbg("ERROR: Failed to allocate stack, size %d\n", stack_size);
+          serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
         }
 #endif
     }
diff --git a/arch/mips/src/common/up_exit.c b/arch/mips/src/common/up_exit.c
index 36a1d2b1704dafae3e1cc0d12bf9b07382d3795e..d21a27e064d060ffaa3f2965eb3d6062b54e17a2 100644
--- a/arch/mips/src/common/up_exit.c
+++ b/arch/mips/src/common/up_exit.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/mips/src/common/up_exit.c
  *
- *   Copyright (C) 2011, 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2013-2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -43,10 +43,11 @@
 #include 
 #include 
 #include 
-#include 
 
+#include 
+#include 
 #ifdef CONFIG_DUMP_ON_EXIT
-#include 
+#  include 
 #endif
 
 #include "task/task.h"
@@ -58,9 +59,9 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
+#ifndef CONFIG_DEBUG_SCHED_INFO
+#  undef CONFIG_DUMP_ON_EXIT
+#endif
 
 /****************************************************************************
  * Private Functions
@@ -76,7 +77,7 @@
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_DUMP_ON_EXIT
 static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
 {
 #if CONFIG_NFILE_DESCRIPTORS > 0
@@ -87,8 +88,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
   int i;
 #endif
 
-  sdbg("  TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
-  sdbg("    priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
+  sinfo("  TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
+  sinfo("    priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
 
 #if CONFIG_NFILE_DESCRIPTORS > 0
   filelist = tcb->group->tg_filelist;
@@ -97,8 +98,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
       struct inode *inode = filelist->fl_files[i].f_inode;
       if (inode)
         {
-          sdbg("      fd=%d refcount=%d\n",
-               i, inode->i_crefs);
+          sinfo("      fd=%d refcount=%d\n",
+                i, inode->i_crefs);
         }
     }
 #endif
@@ -110,13 +111,18 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
       struct file_struct *filep = &streamlist->sl_streams[i];
       if (filep->fs_fd >= 0)
         {
-#if CONFIG_STDIO_BUFFER_SIZE > 0
-          sdbg("      fd=%d nbytes=%d\n",
-               filep->fs_fd,
-               filep->fs_bufpos - filep->fs_bufstart);
-#else
-          sdbg("      fd=%d\n", filep->fs_fd);
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
+          if (filep->fs_bufstart != NULL)
+            {
+              sinfo("      fd=%d nbytes=%d\n",
+                    filep->fs_fd,
+                    filep->fs_bufpos - filep->fs_bufstart);
+            }
+          else
 #endif
+            {
+              sinfo("      fd=%d\n", filep->fs_fd);
+            }
         }
     }
 #endif
@@ -142,16 +148,16 @@ void _exit(int status)
 {
   struct tcb_s *tcb;
 
-  /* Disable interrupts.  They will be restored when the next
-   * task is started.
+  /* Make sure that we are in a critical section with local interrupts.
+   * The IRQ state will be restored when the next task is started.
    */
 
-  (void)up_irq_save();
+  (void)enter_critical_section();
 
-  slldbg("TCB=%p exiting\n", this_task());
+  sinfo("TCB=%p exiting\n", this_task());
 
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
-  slldbg("Other tasks:\n");
+#ifdef CONFIG_DUMP_ON_EXIT
+  sinfo("Other tasks:\n");
   sched_foreach(_up_dumponexit, NULL);
 #endif
 
diff --git a/arch/mips/src/common/up_initialize.c b/arch/mips/src/common/up_initialize.c
index b7df229f2f04c9a6c52b3a38a6a1c8f8541fc5ca..a07c189cf6657639150c45d4cffc7d1089fb8d4a 100644
--- a/arch/mips/src/common/up_initialize.c
+++ b/arch/mips/src/common/up_initialize.c
@@ -44,13 +44,16 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
+#include 
+#include 
+#include 
 
 #include 
 
@@ -71,18 +74,18 @@
  *
  ****************************************************************************/
 
-#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG_FEATURES)
 static void up_calibratedelay(void)
 {
   int i;
 
-  lldbg("Beginning 100s delay\n");
+  _warn("Beginning 100s delay\n");
   for (i = 0; i < 100; i++)
     {
       up_mdelay(1000);
     }
 
-  lldbg("End 100s delay\n");
+  _warn("End 100s delay\n");
 }
 #else
 # define up_calibratedelay()
@@ -127,11 +130,21 @@ void up_initialize(void)
 
   up_irqinitialize();
 
-  /* Initialize the DMA subsystem if the weak function stm32_dmainitialize has been
-   * brought into the build
+#ifdef CONFIG_PM
+  /* Initialize the power management subsystem.  This MCU-specific function
+   * must be called *very* early in the initialization sequence *before* any
+   * other device drivers are initialized (since they may attempt to register
+   * with the power management subsystem).
    */
 
+  up_pminitialize();
+#endif
+
 #ifdef CONFIG_ARCH_DMA
+  /* Initialize the DMA subsystem if the weak function up_dmainitialize has been
+   * brought into the build
+   */
+
 #ifdef CONFIG_HAVE_WEAKFUNCTIONS
   if (up_dmainitialize)
 #endif
@@ -143,7 +156,7 @@ void up_initialize(void)
   /* Initialize the system timer interrupt */
 
 #if !defined(CONFIG_SUPPRESS_INTERRUPTS) && !defined(CONFIG_SUPPRESS_TIMER_INTS)
-  up_timer_initialize();
+  mips_timer_initialize();
 #endif
 
   /* Register devices */
@@ -154,6 +167,14 @@ void up_initialize(void)
   devnull_register();   /* Standard /dev/null */
 #endif
 
+#if defined(CONFIG_DEV_RANDOM)
+  devrandom_register(); /* Standard /dev/random */
+#endif
+
+#if defined(CONFIG_DEV_URANDOM)
+  devurandom_register();   /* Standard /dev/urandom */
+#endif
+
 #if defined(CONFIG_DEV_ZERO)
   devzero_register();   /* Standard /dev/zero */
 #endif
@@ -180,19 +201,33 @@ void up_initialize(void)
 
 #if defined(CONFIG_DEV_LOWCONSOLE)
   lowconsole_init();
-#elif defined(CONFIG_SYSLOG_CONSOLE)
+#elif defined(CONFIG_CONSOLE_SYSLOG)
   syslog_console_init();
 #elif defined(CONFIG_RAMLOG_CONSOLE)
   ramlog_consoleinit();
 #endif
 
-  /* Initialize the system logging device */
+#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_PSEUDOTERM_SUSV1)
+  /* Register the master pseudo-terminal multiplexor device */
+
+  (void)ptmx_register();
+#endif
+
+  /* Early initialization of the system logging device.  Some SYSLOG channel
+   * can be initialized early in the initialization sequence because they
+   * depend on only minimal OS initialization.
+   */
+
+  syslog_initialize(SYSLOG_INIT_EARLY);
 
-#ifdef CONFIG_SYSLOG_CHAR
-  syslog_initialize();
+#if defined(CONFIG_CRYPTO)
+  /* Initialize the HW crypto and /dev/crypto */
+
+  up_cryptoinitialize();
 #endif
-#ifdef CONFIG_RAMLOG_SYSLOG
-  ramlog_sysloginit();
+
+#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_CRYPTO_CRYPTODEV)
+  devcrypto_register();
 #endif
 
 #ifndef CONFIG_NETDEV_LATEINIT
diff --git a/arch/mips/src/common/up_internal.h b/arch/mips/src/common/up_internal.h
index 3b2ca4ccbc396da08c566563de56c1d908ad24e7..39ba820682eeffd69429493bcf0c8cee9d9ef270 100644
--- a/arch/mips/src/common/up_internal.h
+++ b/arch/mips/src/common/up_internal.h
@@ -60,6 +60,10 @@
 #undef  CONFIG_SUPPRESS_UART_CONFIG   /* DEFINED: Do not reconfig UART */
 #undef  CONFIG_DUMP_ON_EXIT           /* DEFINED: Dump task state on exit */
 
+#ifndef CONFIG_DEBUG_SCHED_INFO
+#  undef CONFIG_DUMP_ON_EXIT          /* Needs CONFIG_DEBUG_SCHED_INFO */
+#endif
+
 /* Determine which (if any) console driver to use.  If a console is enabled
  * and no other console device is specified, then a serial console is
  * assumed.
@@ -94,13 +98,6 @@
 #  define USE_SERIALDRIVER 1
 #endif
 
-/* Determine which device to use as the system logging device */
-
-#ifndef CONFIG_SYSLOG
-#  undef CONFIG_SYSLOG_CHAR
-#  undef CONFIG_RAMLOG_SYSLOG
-#endif
-
 /* Check if an interrupt stack size is configured */
 
 #ifndef CONFIG_ARCH_INTERRUPTSTACK
@@ -223,7 +220,7 @@ uint32_t *up_doirq(int irq, uint32_t *regs);
 
 /* Software interrupt 0 handler */
 
-int up_swint0(int irq, FAR void *context);
+int up_swint0(int irq, FAR void *context, FAR void *arg);
 
 /* Signals */
 
@@ -264,7 +261,7 @@ void up_serialinit(void);
 
 /* System timer */
 
-void up_timer_initialize(void);
+void mips_timer_initialize(void);
 
 /* Network */
 
diff --git a/arch/mips/src/mips32/Kconfig b/arch/mips/src/mips32/Kconfig
index 228c28557f4b78eb970ab0da071940fff0fdac3c..5363ecbd543d85bc6967146eacf2c345c78716a3 100644
--- a/arch/mips/src/mips32/Kconfig
+++ b/arch/mips/src/mips32/Kconfig
@@ -8,8 +8,8 @@ comment "MIPS32 Configuration Options"
 
 choice
 	prompt "Toolchain Selection"
-	default MIPS32_TOOLCHAIN_MICROCHIPW_LITE if HOST_WINDOWS
-	default MIPS32_TOOLCHAIN_GNU_ELF if !HOST_WINDOWS
+	default MIPS32_TOOLCHAIN_MICROCHIPW_LITE if TOOLCHAIN_WINDOWS
+	default MIPS32_TOOLCHAIN_GNU_ELF if !TOOLCHAIN_WINDOWS
 
 config MIPS32_TOOLCHAIN_GNU_ELF
 	bool "Generic GNU ELF toolchain"
@@ -31,15 +31,15 @@ config MIPS32_TOOLCHAIN_MICROCHIPL_LITE
 
 config MIPS32_TOOLCHAIN_MICROCHIPW_XC32
 	bool "Microchip XC32 toolchain under Windows"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 
 config MIPS32_TOOLCHAIN_MICROCHIPW
 	bool "Microchip C32 toolchain under Windows"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 
 config MIPS32_TOOLCHAIN_MICROCHIPW_LITE
 	bool "Microchip C32 toolchain under Windows (Lite edition)"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 
 config MIPS32_TOOLCHAIN_MICROCHIPOPENL
 	bool "microchipOpen toolchain under Linux"
@@ -47,7 +47,7 @@ config MIPS32_TOOLCHAIN_MICROCHIPOPENL
 
 config MIPS32_TOOLCHAIN_PINGUINOW
 	bool "Pinguino mips-elf toolchain under Windows"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 
 config MIPS32_TOOLCHAIN_PINGUINOL
 	bool "Pinguino mips-elf toolchain under OS X or Linux"
diff --git a/arch/mips/src/mips32/up_assert.c b/arch/mips/src/mips32/up_assert.c
index 8b4ae3e50aba8d7164bc42bd96ee7f1fa44166ad..5723fe1840504bdfdf11e979ace247cc1c155ec7 100644
--- a/arch/mips/src/mips32/up_assert.c
+++ b/arch/mips/src/mips32/up_assert.c
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 #include 
@@ -75,23 +64,6 @@
 #  undef CONFIG_ARCH_USBDUMP
 #endif
 
-/* The following is just intended to keep some ugliness out of the mainline
- * code.  We are going to print the task name if:
- *
- *  CONFIG_TASK_NAME_SIZE > 0 &&    <-- The task has a name
- *  (defined(CONFIG_DEBUG)    ||    <-- And the debug is enabled (lldbg used)
- *   defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
- */
-
-#undef CONFIG_PRINT_TASKNAME
-#if CONFIG_TASK_NAME_SIZE > 0 && (defined(CONFIG_DEBUG) || defined(CONFIG_ARCH_STACKDUMP))
-#  define CONFIG_PRINT_TASKNAME 1
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -137,7 +109,7 @@ static int usbtrace_syslog(FAR const char *fmt, ...)
   /* Let vsyslog do the real work */
 
   va_start(ap, fmt);
-  ret = lowvsyslog(LOG_INFO, fmt, ap);
+  ret = vsyslog(LOG_EMERG, fmt, ap);
   va_end(ap);
   return ret;
 }
@@ -159,17 +131,17 @@ static int assert_tracecallback(FAR struct usbtrace_s *trace, FAR void *arg)
 
 void up_assert(const uint8_t *filename, int lineno)
 {
-#ifdef CONFIG_PRINT_TASKNAME
+#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
   struct tcb_s *rtcb = this_task();
 #endif
 
   board_autoled_on(LED_ASSERTION);
 
-#ifdef CONFIG_PRINT_TASKNAME
-  lldbg("Assertion failed at file:%s line: %d task: %s\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+  _alert("Assertion failed at file:%s line: %d task: %s\n",
         filename, lineno, rtcb->name);
 #else
-  lldbg("Assertion failed at file:%s line: %d\n",
+  _alert("Assertion failed at file:%s line: %d\n",
         filename, lineno);
 #endif
 
diff --git a/arch/mips/src/mips32/up_dumpstate.c b/arch/mips/src/mips32/up_dumpstate.c
index b56d7f2419b298e5a117b8b0cc3d6f713c4a5139..db9fcda6573e23ee5e2dc0dde10c2e96da29747d 100644
--- a/arch/mips/src/mips32/up_dumpstate.c
+++ b/arch/mips/src/mips32/up_dumpstate.c
@@ -39,13 +39,6 @@
 
 #include 
 
-/* Output debug info -- even if debug is not selected. */
-
-#undef  CONFIG_DEBUG
-#undef  CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
 #include 
 #include 
 #include 
@@ -61,14 +54,6 @@
 
 #ifdef CONFIG_ARCH_STACKDUMP
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -101,7 +86,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
   for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
     {
       uint32_t *ptr = (uint32_t *)stack;
-      lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+      _alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
              stack, ptr[0], ptr[1], ptr[2], ptr[3],
              ptr[4], ptr[5], ptr[6], ptr[7]);
     }
@@ -117,27 +102,27 @@ static inline void up_registerdump(void)
 
   if (g_current_regs)
     {
-      lldbg("MFLO:%08x MFHI:%08x EPC:%08x STATUS:%08x\n",
+      _alert("MFLO:%08x MFHI:%08x EPC:%08x STATUS:%08x\n",
             g_current_regs[REG_MFLO], g_current_regs[REG_MFHI], g_current_regs[REG_EPC],
             g_current_regs[REG_STATUS]);
-      lldbg("AT:%08x V0:%08x V1:%08x A0:%08x A1:%08x A2:%08x A3:%08x\n",
+      _alert("AT:%08x V0:%08x V1:%08x A0:%08x A1:%08x A2:%08x A3:%08x\n",
             g_current_regs[REG_AT], g_current_regs[REG_V0], g_current_regs[REG_V1],
             g_current_regs[REG_A0], g_current_regs[REG_A1], g_current_regs[REG_A2],
             g_current_regs[REG_A3]);
-      lldbg("T0:%08x T1:%08x T2:%08x T3:%08x T4:%08x T5:%08x T6:%08x T7:%08x\n",
+      _alert("T0:%08x T1:%08x T2:%08x T3:%08x T4:%08x T5:%08x T6:%08x T7:%08x\n",
             g_current_regs[REG_T0], g_current_regs[REG_T1], g_current_regs[REG_T2],
             g_current_regs[REG_T3], g_current_regs[REG_T4], g_current_regs[REG_T5],
             g_current_regs[REG_T6], g_current_regs[REG_T7]);
-      lldbg("S0:%08x S1:%08x S2:%08x S3:%08x S4:%08x S5:%08x S6:%08x S7:%08x\n",
+      _alert("S0:%08x S1:%08x S2:%08x S3:%08x S4:%08x S5:%08x S6:%08x S7:%08x\n",
             g_current_regs[REG_S0], g_current_regs[REG_S1], g_current_regs[REG_S2],
             g_current_regs[REG_S3], g_current_regs[REG_S4], g_current_regs[REG_S5],
             g_current_regs[REG_S6], g_current_regs[REG_S7]);
 #ifdef MIPS32_SAVE_GP
-      lldbg("T8:%08x T9:%08x GP:%08x SP:%08x FP:%08x RA:%08x\n",
+      _alert("T8:%08x T9:%08x GP:%08x SP:%08x FP:%08x RA:%08x\n",
             g_current_regs[REG_T8], g_current_regs[REG_T9], g_current_regs[REG_GP],
             g_current_regs[REG_SP], g_current_regs[REG_FP], g_current_regs[REG_RA]);
 #else
-      lldbg("T8:%08x T9:%08x SP:%08x FP:%08x RA:%08x\n",
+      _alert("T8:%08x T9:%08x SP:%08x FP:%08x RA:%08x\n",
             g_current_regs[REG_T8], g_current_regs[REG_T9], g_current_regs[REG_SP],
             g_current_regs[REG_FP], g_current_regs[REG_RA]);
 #endif
@@ -184,10 +169,10 @@ void up_dumpstate(void)
 
   /* Show interrupt stack info */
 
-  lldbg("sp:     %08x\n", sp);
-  lldbg("IRQ stack:\n");
-  lldbg("  base: %08x\n", istackbase);
-  lldbg("  size: %08x\n", istacksize);
+  _alert("sp:     %08x\n", sp);
+  _alert("IRQ stack:\n");
+  _alert("  base: %08x\n", istackbase);
+  _alert("  size: %08x\n", istacksize);
 
   /* Does the current stack pointer lie within the interrupt
    * stack?
@@ -204,18 +189,18 @@ void up_dumpstate(void)
        */
 
       sp = g_intstackbase;
-      lldbg("sp:     %08x\n", sp);
+      _alert("sp:     %08x\n", sp);
     }
 
   /* Show user stack info */
 
-  lldbg("User stack:\n");
-  lldbg("  base: %08x\n", ustackbase);
-  lldbg("  size: %08x\n", ustacksize);
+  _alert("User stack:\n");
+  _alert("  base: %08x\n", ustackbase);
+  _alert("  size: %08x\n", ustacksize);
 #else
-  lldbg("sp:         %08x\n", sp);
-  lldbg("stack base: %08x\n", ustackbase);
-  lldbg("stack size: %08x\n", ustacksize);
+  _alert("sp:         %08x\n", sp);
+  _alert("stack base: %08x\n", ustackbase);
+  _alert("stack size: %08x\n", ustacksize);
 #endif
 
   /* Dump the user stack if the stack pointer lies within the allocated user
@@ -225,7 +210,7 @@ void up_dumpstate(void)
   if (sp > ustackbase || sp <= ustackbase - ustacksize)
     {
 #if !defined(CONFIG_ARCH_INTERRUPTSTACK) || CONFIG_ARCH_INTERRUPTSTACK < 4
-      lldbg("ERROR: Stack pointer is not within allocated stack\n");
+      _alert("ERROR: Stack pointer is not within allocated stack\n");
 #endif
     }
   else
diff --git a/arch/mips/src/mips32/up_releasepending.c b/arch/mips/src/mips32/up_releasepending.c
index 0d4522ba8d8896c4ca9d7304b5074cf1063fa25e..b7e1d8ce9284a2d3642103977bfa6da3f34556d8 100644
--- a/arch/mips/src/mips32/up_releasepending.c
+++ b/arch/mips/src/mips32/up_releasepending.c
@@ -69,7 +69,7 @@ void up_release_pending(void)
 {
   struct tcb_s *rtcb = this_task();
 
-  slldbg("From TCB=%p\n", rtcb);
+  sinfo("From TCB=%p\n", rtcb);
 
   /* Merge the g_pendingtasks list into the ready-to-run task list */
 
diff --git a/arch/mips/src/mips32/up_reprioritizertr.c b/arch/mips/src/mips32/up_reprioritizertr.c
index 3365f8862e23d529c580e296abfe3b74c5b87429..22a204d58bafd42d472bfbe288d13475e5836f01 100644
--- a/arch/mips/src/mips32/up_reprioritizertr.c
+++ b/arch/mips/src/mips32/up_reprioritizertr.c
@@ -97,7 +97,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
       struct tcb_s *rtcb = this_task();
       bool switch_needed;
 
-      slldbg("TCB=%p PRI=%d\n", tcb, priority);
+      sinfo("TCB=%p PRI=%d\n", tcb, priority);
 
       /* Remove the tcb task from the ready-to-run list.
        * sched_removereadytorun will return true if we just
diff --git a/arch/mips/src/mips32/up_schedulesigaction.c b/arch/mips/src/mips32/up_schedulesigaction.c
index 1c8612ffd9396f65996b06d3c750d395dfc12bf6..e44384c5aa5f993d908d46905465245344e476f4 100644
--- a/arch/mips/src/mips32/up_schedulesigaction.c
+++ b/arch/mips/src/mips32/up_schedulesigaction.c
@@ -95,7 +95,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
   irqstate_t flags;
   uint32_t status;
 
-  sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+  sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
 
   /* Make sure that interrupts are disabled */
 
@@ -109,7 +109,8 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
        * being delivered to the currently executing task.
        */
 
-      sdbg("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
+      sinfo("rtcb=0x%p g_current_regs=0x%p\n",
+            this_task(), g_current_regs);
 
       if (tcb == this_task())
         {
@@ -163,7 +164,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
 
               up_savestate(tcb->xcp.regs);
 
-              svdbg("PC/STATUS Saved: %08x/%08x New: %08x/%08x\n",
+              sinfo("PC/STATUS Saved: %08x/%08x New: %08x/%08x\n",
                     tcb->xcp.saved_epc, tcb->xcp.saved_status,
                     g_current_regs[REG_EPC], g_current_regs[REG_STATUS]);
             }
@@ -196,7 +197,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
           status                    |= CP0_STATUS_IM_SWINTS;
           tcb->xcp.regs[REG_STATUS]  = status;
 
-          svdbg("PC/STATUS Saved: %08x/%08x New: %08x/%08x\n",
+          sinfo("PC/STATUS Saved: %08x/%08x New: %08x/%08x\n",
                 tcb->xcp.saved_epc, tcb->xcp.saved_status,
                 tcb->xcp.regs[REG_EPC], tcb->xcp.regs[REG_STATUS]);
         }
diff --git a/arch/mips/src/mips32/up_sigdeliver.c b/arch/mips/src/mips32/up_sigdeliver.c
index a841a941b812b54fd562a541c20d124e1248f868..bf8f8e170820e9635a1169fe5dc065952b2d6798 100644
--- a/arch/mips/src/mips32/up_sigdeliver.c
+++ b/arch/mips/src/mips32/up_sigdeliver.c
@@ -96,7 +96,7 @@ void up_sigdeliver(void)
 
   board_autoled_on(LED_SIGNAL);
 
-  sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
         rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
   ASSERT(rtcb->xcp.sigdeliver != NULL);
 
@@ -127,7 +127,7 @@ void up_sigdeliver(void)
    * errno that is needed by the user logic (it is probably EINTR).
    */
 
-  svdbg("Resuming EPC: %08x STATUS: %08x\n", regs[REG_EPC], regs[REG_STATUS]);
+  sinfo("Resuming EPC: %08x STATUS: %08x\n", regs[REG_EPC], regs[REG_STATUS]);
 
   (void)up_irq_save();
   rtcb->pterrno = saved_errno;
diff --git a/arch/mips/src/mips32/up_swint0.c b/arch/mips/src/mips32/up_swint0.c
index 1d335b179241a209162fd9d5f65c2146c223067c..40cc800592cd1f166b74ae3cc83890ac53870ded 100644
--- a/arch/mips/src/mips32/up_swint0.c
+++ b/arch/mips/src/mips32/up_swint0.c
@@ -52,32 +52,6 @@
 
 #include "up_internal.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-/* Configuration ************************************************************/
-
-/* Debug ********************************************************************/
-/* Debug output from this file may interfere with context switching!  To get
- * debug output you must enabled the following in your NuttX configuration:
- *
- * CONFIG_DEBUG and CONFIG_DEBUG_SYSCALL
- */
-
-#ifdef CONFIG_DEBUG_SYSCALL
-# define swidbg(format, ...) lldbg(format, ##__VA_ARGS__)
-#else
-# define swidbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -86,28 +60,28 @@
  * Name: up_registerdump
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG_SYSCALL
+#ifdef CONFIG_DEBUG_SYSCALL_INFO
 static void up_registerdump(const uint32_t *regs)
 {
-  swidbg("MFLO:%08x MFHI:%08x EPC:%08x STATUS:%08x\n",
-         regs[REG_MFLO], regs[REG_MFHI], regs[REG_EPC], regs[REG_STATUS]);
-  swidbg("AT:%08x V0:%08x V1:%08x A0:%08x A1:%08x A2:%08x A3:%08x\n",
-         regs[REG_AT], regs[REG_V0], regs[REG_V1], regs[REG_A0],
-         regs[REG_A1], regs[REG_A2], regs[REG_A3]);
-  swidbg("T0:%08x T1:%08x T2:%08x T3:%08x T4:%08x T5:%08x T6:%08x T7:%08x\n",
-         regs[REG_T0], regs[REG_T1], regs[REG_T2], regs[REG_T3],
-         regs[REG_T4], regs[REG_T5], regs[REG_T6], regs[REG_T7]);
-  swidbg("S0:%08x S1:%08x S2:%08x S3:%08x S4:%08x S5:%08x S6:%08x S7:%08x\n",
-         regs[REG_S0], regs[REG_S1], regs[REG_S2], regs[REG_S3],
-         regs[REG_S4], regs[REG_S5], regs[REG_S6], regs[REG_S7]);
+  svcinfo("MFLO:%08x MFHI:%08x EPC:%08x STATUS:%08x\n",
+          regs[REG_MFLO], regs[REG_MFHI], regs[REG_EPC], regs[REG_STATUS]);
+  svcinfo("AT:%08x V0:%08x V1:%08x A0:%08x A1:%08x A2:%08x A3:%08x\n",
+          regs[REG_AT], regs[REG_V0], regs[REG_V1], regs[REG_A0],
+          regs[REG_A1], regs[REG_A2], regs[REG_A3]);
+  svcinfo("T0:%08x T1:%08x T2:%08x T3:%08x T4:%08x T5:%08x T6:%08x T7:%08x\n",
+          regs[REG_T0], regs[REG_T1], regs[REG_T2], regs[REG_T3],
+          regs[REG_T4], regs[REG_T5], regs[REG_T6], regs[REG_T7]);
+  svcinfo("S0:%08x S1:%08x S2:%08x S3:%08x S4:%08x S5:%08x S6:%08x S7:%08x\n",
+          regs[REG_S0], regs[REG_S1], regs[REG_S2], regs[REG_S3],
+          regs[REG_S4], regs[REG_S5], regs[REG_S6], regs[REG_S7]);
 #ifdef MIPS32_SAVE_GP
-  swidbg("T8:%08x T9:%08x GP:%08x SP:%08x FP:%08x RA:%08x\n",
-         regs[REG_T8], regs[REG_T9], regs[REG_GP], regs[REG_SP],
-         regs[REG_FP], regs[REG_RA]);
+  svcinfo("T8:%08x T9:%08x GP:%08x SP:%08x FP:%08x RA:%08x\n",
+          regs[REG_T8], regs[REG_T9], regs[REG_GP], regs[REG_SP],
+          regs[REG_FP], regs[REG_RA]);
 #else
-  swidbg("T8:%08x T9:%08x SP:%08x FP:%08x RA:%08x\n",
-         regs[REG_T8], regs[REG_T9], regs[REG_SP], regs[REG_FP],
-         regs[REG_RA]);
+  svcinfo("T8:%08x T9:%08x SP:%08x FP:%08x RA:%08x\n",
+          regs[REG_T8], regs[REG_T9], regs[REG_SP], regs[REG_FP],
+          regs[REG_RA]);
 #endif
 }
 #else
@@ -155,7 +129,7 @@ static void dispatch_syscall(void)
  *
  ****************************************************************************/
 
-int up_swint0(int irq, FAR void *context)
+int up_swint0(int irq, FAR void *context, FAR void *arg)
 {
   uint32_t *regs = (uint32_t *)context;
   uint32_t cause;
@@ -167,8 +141,8 @@ int up_swint0(int irq, FAR void *context)
    * arguments depending on the system call.
    */
 
-#ifdef CONFIG_DEBUG_SYSCALL
-  swidbg("Entry: regs: %p cmd: %d\n", regs, regs[REG_R4]);
+#ifdef CONFIG_DEBUG_SYSCALL_INFO
+  svcinfo("Entry: regs: %p cmd: %d\n", regs, regs[REG_R4]);
   up_registerdump(regs);
 #endif
 
@@ -289,7 +263,7 @@ int up_swint0(int irq, FAR void *context)
 
           g_current_regs[REG_R0] -= CONFIG_SYS_RESERVED;
 #else
-          slldbg("ERROR: Bad SYS call: %d\n", regs[REG_A0]);
+          svcerr("ERROR: Bad SYS call: %d\n", regs[REG_A0]);
 #endif
         }
         break;
@@ -297,15 +271,15 @@ int up_swint0(int irq, FAR void *context)
 
   /* Report what happened.  That might difficult in the case of a context switch */
 
-#ifdef CONFIG_DEBUG_SYSCALL
+#ifdef CONFIG_DEBUG_SYSCALL_INFO
   if (regs != g_current_regs)
     {
-      swidbg("SWInt Return: Context switch!\n");
+      svcinfo("SWInt Return: Context switch!\n");
       up_registerdump((const uint32_t *)g_current_regs);
     }
   else
     {
-      swidbg("SWInt Return: %d\n", regs[REG_V0]);
+      svcinfo("SWInt Return: %d\n", regs[REG_V0]);
     }
 #endif
 
diff --git a/arch/mips/src/mips32/up_vfork.c b/arch/mips/src/mips32/up_vfork.c
index dda54ae1799ccceb613dcdbbb787e45463d04edf..06b79f7bb13743527e02a91b7ccaa3378aa338e6 100644
--- a/arch/mips/src/mips32/up_vfork.c
+++ b/arch/mips/src/mips32/up_vfork.c
@@ -123,26 +123,26 @@ pid_t up_vfork(const struct vfork_s *context)
   uint32_t stackutil;
   int ret;
 
-  svdbg("s0:%08x s1:%08x s2:%08x s3:%08x s4:%08x\n",
+  sinfo("s0:%08x s1:%08x s2:%08x s3:%08x s4:%08x\n",
         context->s0, context->s1, context->s2, context->s3, context->s4);
 #ifdef CONFIG_MIPS32_FRAMEPOINTER
-  svdbg("s5:%08x s6:%08x s7:%08x\n",
+  sinfo("s5:%08x s6:%08x s7:%08x\n",
         context->s5, context->s6, context->s7);
 #ifdef MIPS32_SAVE_GP
-  svdbg("fp:%08x sp:%08x ra:%08x gp:%08x\n",
+  sinfo("fp:%08x sp:%08x ra:%08x gp:%08x\n",
         context->fp, context->sp, context->ra, context->gp);
 #else
-  svdbg("fp:%08x sp:%08x ra:%08x\n",
+  sinfo("fp:%08x sp:%08x ra:%08x\n",
         context->fp context->sp, context->ra);
 #endif
 #else
-  svdbg("s5:%08x s6:%08x s7:%08x s8:%08x\n",
+  sinfo("s5:%08x s6:%08x s7:%08x s8:%08x\n",
         context->s5, context->s6, context->s7, context->s8);
 #ifdef MIPS32_SAVE_GP
-  svdbg("sp:%08x ra:%08x gp:%08x\n",
+  sinfo("sp:%08x ra:%08x gp:%08x\n",
         context->sp, context->ra, context->gp);
 #else
-  svdbg("sp:%08x ra:%08x\n",
+  sinfo("sp:%08x ra:%08x\n",
         context->sp, context->ra);
 #endif
 #endif
@@ -152,11 +152,11 @@ pid_t up_vfork(const struct vfork_s *context)
   child = task_vforksetup((start_t)context->ra);
   if (!child)
     {
-      sdbg("task_vforksetup failed\n");
+      sinfo("task_vforksetup failed\n");
       return (pid_t)ERROR;
     }
 
-  svdbg("Parent=%p Child=%p\n", parent, child);
+  sinfo("Parent=%p Child=%p\n", parent, child);
 
   /* Get the size of the parent task's stack.  Due to alignment operations,
    * the adjusted stack size may be smaller than the stack size originally
@@ -171,7 +171,7 @@ pid_t up_vfork(const struct vfork_s *context)
                         parent->flags & TCB_FLAG_TTYPE_MASK);
   if (ret != OK)
     {
-      sdbg("up_create_stack failed: %d\n", ret);
+      serr("ERROR: up_create_stack failed: %d\n", ret);
       task_vforkabort(child, -ret);
       return (pid_t)ERROR;
     }
@@ -185,7 +185,7 @@ pid_t up_vfork(const struct vfork_s *context)
   DEBUGASSERT((uint32_t)parent->adj_stack_ptr > context->sp);
   stackutil = (uint32_t)parent->adj_stack_ptr - context->sp;
 
-  svdbg("stacksize:%d stackutil:%d\n", stacksize, stackutil);
+  sinfo("stacksize:%d stackutil:%d\n", stacksize, stackutil);
 
   /* Make some feeble effort to perserve the stack contents.  This is
    * feeble because the stack surely contains invalid pointers and other
@@ -211,14 +211,14 @@ pid_t up_vfork(const struct vfork_s *context)
       newfp = context->fp;
     }
 
-  svdbg("Old stack base:%08x SP:%08x FP:%08x\n",
+  sinfo("Old stack base:%08x SP:%08x FP:%08x\n",
         parent->adj_stack_ptr, context->sp, context->fp);
-  svdbg("New stack base:%08x SP:%08x FP:%08x\n",
+  sinfo("New stack base:%08x SP:%08x FP:%08x\n",
         child->cmn.adj_stack_ptr, newsp, newfp);
 #else
-  svdbg("Old stack base:%08x SP:%08x\n",
+  sinfo("Old stack base:%08x SP:%08x\n",
         parent->adj_stack_ptr, context->sp);
-  svdbg("New stack base:%08x SP:%08x\n",
+  sinfo("New stack base:%08x SP:%08x\n",
         child->cmn.adj_stack_ptr, newsp);
 #endif
 
diff --git a/arch/mips/src/pic32mx/Kconfig b/arch/mips/src/pic32mx/Kconfig
index 3da65ead3598a6c60683627b169b5379b85e1635..52dd77456678bb4c441c87b8f0dffd25b862cb31 100644
--- a/arch/mips/src/pic32mx/Kconfig
+++ b/arch/mips/src/pic32mx/Kconfig
@@ -1034,11 +1034,11 @@ config PIC32MX_SPI_ENHBUF
 
 config PIC32MX_SPI_REGDEBUG
 	bool "SPI Register level debug"
-	depends on DEBUG
+	depends on DEBUG_INFO
 	default n
 	---help---
 		Output detailed register-level SPI device debug information.
-		Requires also DEBUG.
+		Requires also CONFIG_DEBUG_FEATURES.
 
 endmenu # SPI Driver Configuration
 
@@ -1094,13 +1094,6 @@ config NET_WOL
 	---help---
 		Enable Wake-up on LAN (not fully implemented).
 
-config NET_REGDEBUG
-	bool "Register level debug"
-	default n
-	depends on PIC32MX_ETHERNET && DEBUG
-	---help---
-		Enabled low level register debug.  Also needs DEBUG.
-
 config NET_HASH
 	bool "Hash"
 	default n
@@ -1116,6 +1109,33 @@ config PIC32MX_MULTICAST
 		Enable receipt of multicast (and unicast) frames. Automatically set if
 		NET_IGMP is selected.
 
+choice
+	prompt "Work queue"
+	default PIC32MX_ETHERNET_LPWORK if SCHED_LPWORK
+	default PIC32MX_ETHERNET_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the Ethernet driver.  If the
+		low priority work queue is available, then it should be used by the
+		driver.
+
+config PIC32MX_ETHERNET_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
+
+config PIC32MX_ETHERNET_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
+
+endchoice # Work queue
+
+config NET_REGDEBUG
+	bool "Register level debug"
+	default n
+	depends on PIC32MX_ETHERNET && DEBUG_NET_INFO
+	---help---
+		Enabled low level register debug.  Also needs CONFIG_DEBUG_FEATURES.
+
 endmenu
 
 menu "Device Configuration 0 (DEVCFG0)"
diff --git a/arch/mips/src/pic32mx/pic32mx-ethernet.c b/arch/mips/src/pic32mx/pic32mx-ethernet.c
index 4c11f5c66083d73b8972549dd63c85627e3d8a9d..5a4b7654d17b9dc935ce1570245d65ef0898b942 100644
--- a/arch/mips/src/pic32mx/pic32mx-ethernet.c
+++ b/arch/mips/src/pic32mx/pic32mx-ethernet.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/arm/src/pic32mx/pic32mx_ethernet.c
+ * arch/mips/src/pic32mx/pic32mx_ethernet.c
  *
- *   Copyright (C) 2012, 2014-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2014-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * This driver derives from the PIC32MX Ethernet Driver
@@ -55,6 +55,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -81,6 +82,25 @@
  * Pre-processor Definitions
  ****************************************************************************/
 /* Configuration ************************************************************/
+/* If processing is not done at the interrupt level, then work queue support
+ * is required.
+ */
+
+#if !defined(CONFIG_SCHED_WORKQUEUE)
+#  error Work queue support is required in this configuration (CONFIG_SCHED_WORKQUEUE)
+#else
+
+  /* Use the low priority work queue if possible */
+
+#  if defined(CONFIG_PIC32MX_ETHERNET_HPWORK)
+#    define ETHWORK HPWORK
+#  elif defined(CONFIG_PIC32MX_ETHERNET_LPWORK)
+#    define ETHWORK LPWORK
+#  else
+#    error Neither CONFIG_PIC32MX_ETHERNET_HPWORK nor CONFIG_PIC32MX_ETHERNET_LPWORK defined
+#  endif
+#endif
+
 /* CONFIG_PIC32MX_NINTERFACES determines the number of physical interfaces
  * that will be supported -- unless it is more than actually supported by the
  * hardware!
@@ -102,12 +122,6 @@
 #  define CONFIG_PIC32MX_NINTERFACES 1
 #endif
 
-/* CONFIG_NET_MULTIBUFFER is required */
-
-#ifndef CONFIG_NET_MULTIBUFFER
-#  error "CONFIG_NET_MULTIBUFFER=y is required"
-#endif
-
 /* If IGMP is enabled, then accept multi-cast frames. */
 
 #if defined(CONFIG_NET_IGMP) && !defined(CONFIG_PIC32MX_MULTICAST)
@@ -141,20 +155,11 @@
 #define PIC32MX_NBUFFERS (CONFIG_NET_NRXDESC + CONFIG_NET_NTXDESC + 1)
 
 /* Debug Configuration *****************************************************/
-/* Register/Descriptor debug -- can only happen of CONFIG_DEBUG is selected.
- * This will probably generate much more output than you care to see.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_NET_REGDEBUG
-#  undef CONFIG_NET_DESCDEBUG
-#endif
-
 /* CONFIG_NET_DUMPPACKET will dump the contents of each packet to the
  * console.
  */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
 #  undef  CONFIG_NET_DUMPPACKET
 #endif
 
@@ -316,6 +321,8 @@ struct pic32mx_driver_s
   uint32_t   pd_inten;          /* Shadow copy of INTEN register */
   WDOG_ID    pd_txpoll;         /* TX poll timer */
   WDOG_ID    pd_txtimeout;      /* TX timeout timer */
+  struct work_s pd_irqwork;     /* For deferring interrupt work to the work queue */
+  struct work_s pd_pollwork;    /* For deferring poll work to the work queue */
 
   sq_queue_t pd_freebuffers;    /* The free buffer list */
 
@@ -387,18 +394,26 @@ static void pic32mx_timerpoll(struct pic32mx_driver_s *priv);
 static void pic32mx_response(struct pic32mx_driver_s *priv);
 static void pic32mx_rxdone(struct pic32mx_driver_s *priv);
 static void pic32mx_txdone(struct pic32mx_driver_s *priv);
-static int  pic32mx_interrupt(int irq, void *context);
+
+static void pic32mx_interrupt_work(void *arg);
+static int  pic32mx_interrupt(int irq, void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
-static void pic32mx_polltimer(int argc, uint32_t arg, ...);
-static void pic32mx_txtimeout(int argc, uint32_t arg, ...);
+static void pic32mx_txtimeout_work(void *arg);
+static void pic32mx_txtimeout_expiry(int argc, uint32_t arg, ...);
+
+static void pic32mx_poll_work(void *arg);
+static void pic32mx_poll_expiry(int argc, uint32_t arg, ...);
 
 /* NuttX callback functions */
 
 static int pic32mx_ifup(struct net_driver_s *dev);
 static int pic32mx_ifdown(struct net_driver_s *dev);
+
+static void pic32mx_txavail_work(void *arg);
 static int pic32mx_txavail(struct net_driver_s *dev);
+
 #ifdef CONFIG_NET_IGMP
 static int pic32mx_addmac(struct net_driver_s *dev, const uint8_t *mac);
 static int pic32mx_rmmac(struct net_driver_s *dev, const uint8_t *mac);
@@ -447,7 +462,7 @@ static void pic32mx_ethreset(struct pic32mx_driver_s *priv);
 #ifdef CONFIG_NET_REGDEBUG
 static void pic32mx_printreg(uint32_t addr, uint32_t val, bool iswrite)
 {
-  lldbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
+  ninfo("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
 }
 #endif
 
@@ -497,7 +512,7 @@ static void pic32mx_checkreg(uint32_t addr, uint32_t val, bool iswrite)
             {
               /* No.. More than one. */
 
-              lldbg("[repeats %d more times]\n", count);
+              ninfo("[repeats %d more times]\n", count);
             }
         }
 
@@ -576,12 +591,12 @@ static void pic32mx_putreg(uint32_t val, uint32_t addr)
 #ifdef CONFIG_NET_DESCDEBUG
 static void pic32mx_dumptxdesc(struct pic32mx_txdesc_s *txdesc, const char *msg)
 {
-  lldbg("TX Descriptor [%p]: %s\n", txdesc, msg);
-  lldbg("   status: %08x\n", txdesc->status);
-  lldbg("  address: %08x [%08x]\n", txdesc->address, VIRT_ADDR(txdesc->address));
-  lldbg("     tsv1: %08x\n", txdesc->tsv1);
-  lldbg("     tsv2: %08x\n", txdesc->tsv2);
-  lldbg("   nexted: %08x [%08x]\n", txdesc->nexted, VIRT_ADDR(txdesc->nexted));
+  ninfo("TX Descriptor [%p]: %s\n", txdesc, msg);
+  ninfo("   status: %08x\n", txdesc->status);
+  ninfo("  address: %08x [%08x]\n", txdesc->address, VIRT_ADDR(txdesc->address));
+  ninfo("     tsv1: %08x\n", txdesc->tsv1);
+  ninfo("     tsv2: %08x\n", txdesc->tsv2);
+  ninfo("   nexted: %08x [%08x]\n", txdesc->nexted, VIRT_ADDR(txdesc->nexted));
 }
 #endif
 
@@ -603,12 +618,12 @@ static void pic32mx_dumptxdesc(struct pic32mx_txdesc_s *txdesc, const char *msg)
 #ifdef CONFIG_NET_DESCDEBUG
 static void pic32mx_dumprxdesc(struct pic32mx_rxdesc_s *rxdesc, const char *msg)
 {
-  lldbg("RX Descriptor [%p]: %s\n", rxdesc, msg);
-  lldbg("   status: %08x\n", rxdesc->status);
-  lldbg("  address: %08x [%08x]\n", rxdesc->address, VIRT_ADDR(rxdesc->address));
-  lldbg("     rsv1: %08x\n", rxdesc->rsv1);
-  lldbg("     rsv2: %08x\n", rxdesc->rsv2);
-  lldbg("   nexted: %08x [%08x]\n", rxdesc->nexted, VIRT_ADDR(rxdesc->nexted));
+  ninfo("RX Descriptor [%p]: %s\n", rxdesc, msg);
+  ninfo("   status: %08x\n", rxdesc->status);
+  ninfo("  address: %08x [%08x]\n", rxdesc->address, VIRT_ADDR(rxdesc->address));
+  ninfo("     rsv1: %08x\n", rxdesc->rsv1);
+  ninfo("     rsv2: %08x\n", rxdesc->rsv2);
+  ninfo("   nexted: %08x [%08x]\n", rxdesc->nexted, VIRT_ADDR(rxdesc->nexted));
 }
 #endif
 
@@ -1070,8 +1085,8 @@ static int pic32mx_transmit(struct pic32mx_driver_s *priv)
 
   /* Setup the TX timeout watchdog (perhaps restarting the timer) */
 
-  (void)wd_start(priv->pd_txtimeout, PIC32MX_TXTIMEOUT, pic32mx_txtimeout,
-                 1, (uint32_t)priv);
+  (void)wd_start(priv->pd_txtimeout, PIC32MX_TXTIMEOUT,
+                 pic32mx_txtimeout_expiry, 1, (uint32_t)priv);
 
   return OK;
 }
@@ -1366,7 +1381,8 @@ static void pic32mx_rxdone(struct pic32mx_driver_s *priv)
 
       if ((rxdesc->rsv2 & RXDESC_RSV2_OK) == 0)
         {
-          nlldbg("ERROR. rsv1: %08x rsv2: %08x\n", rxdesc->rsv1, rxdesc->rsv2);
+          nerr("ERROR. rsv1: %08x rsv2: %08x\n",
+               rxdesc->rsv1, rxdesc->rsv2);
           NETDEV_RXERRORS(&priv->pd_dev);
           pic32mx_rxreturn(rxdesc);
         }
@@ -1379,8 +1395,8 @@ static void pic32mx_rxdone(struct pic32mx_driver_s *priv)
 
       else if (priv->pd_dev.d_len > CONFIG_NET_ETH_MTU)
         {
-          nlldbg("Too big. packet length: %d rxdesc: %08x\n",
-                 priv->pd_dev.d_len, rxdesc->status);
+          nerr("ERROR: Too big. packet length: %d rxdesc: %08x\n",
+               priv->pd_dev.d_len, rxdesc->status);
           NETDEV_RXERRORS(&priv->pd_dev);
           pic32mx_rxreturn(rxdesc);
         }
@@ -1390,7 +1406,8 @@ static void pic32mx_rxdone(struct pic32mx_driver_s *priv)
       else if ((rxdesc->status & (RXDESC_STATUS_EOP | RXDESC_STATUS_SOP)) !=
                (RXDESC_STATUS_EOP | RXDESC_STATUS_SOP))
         {
-          nlldbg("Fragment. packet length: %d rxdesc: %08x\n", priv->pd_dev.d_len, rxdesc->status);
+          nerr("ERROR: Fragment. packet length: %d rxdesc: %08x\n",
+               priv->pd_dev.d_len, rxdesc->status);
           NETDEV_RXFRAGMENTS(&priv->pd_dev);
           pic32mx_rxreturn(rxdesc);
         }
@@ -1428,7 +1445,7 @@ static void pic32mx_rxdone(struct pic32mx_driver_s *priv)
 #ifdef CONFIG_NET_IPv4
           if (BUF->type == HTONS(ETHTYPE_IP))
             {
-              nllvdbg("IPv4 frame\n");
+              ninfo("IPv4 frame\n");
               NETDEV_RXIPV4(&priv->pd_dev);
 
               /* Handle ARP on input then give the IPv4 packet to the network
@@ -1470,7 +1487,7 @@ static void pic32mx_rxdone(struct pic32mx_driver_s *priv)
 #ifdef CONFIG_NET_IPv6
           if (BUF->type == HTONS(ETHTYPE_IP6))
             {
-              nllvdbg("Iv6 frame\n");
+              ninfo("Iv6 frame\n");
               NETDEV_RXIPV6(&priv->pd_dev);
 
               /* Give the IPv6 packet to the network layer */
@@ -1529,7 +1546,8 @@ static void pic32mx_rxdone(struct pic32mx_driver_s *priv)
             {
               /* Unrecognized... drop it. */
 
-              nlldbg("Unrecognized packet type dropped: %04x\n", ntohs(BUF->type));
+              nerr("ERROR: Unrecognized packet type dropped: %04x\n",
+                   ntohs(BUF->type));
               NETDEV_RXDROPPED(&priv->pd_dev);
             }
 
@@ -1646,32 +1664,30 @@ static void pic32mx_txdone(struct pic32mx_driver_s *priv)
 }
 
 /****************************************************************************
- * Function: pic32mx_interrupt
+ * Function: pic32mx_interrupt_work
  *
  * Description:
- *   Hardware interrupt handler
+ *   Perform interrupt related work from the worker thread
  *
  * Parameters:
- *   irq     - Number of the IRQ that generated the interrupt
- *   context - Interrupt register state save info (architecture-specific)
+ *   arg - The argument passed when work_queue() was called.
  *
  * Returned Value:
  *   OK on success
  *
  * Assumptions:
+ *   The network is locked.
  *
  ****************************************************************************/
 
-static int pic32mx_interrupt(int irq, void *context)
+static void pic32mx_interrupt_work(void *arg)
 {
-  register struct pic32mx_driver_s *priv;
+  struct pic32mx_driver_s *priv = (struct pic32mx_driver_s *)arg;
   uint32_t status;
 
-#if CONFIG_PIC32MX_NINTERFACES > 1
-# error "A mechanism to associate and interface with an IRQ is needed"
-#else
-  priv = &g_ethdrvr[0];
-#endif
+  /* Process pending Ethernet interrupts */
+
+  net_lock();
 
   /* Get the interrupt status (zero means no interrupts pending). */
 
@@ -1691,7 +1707,7 @@ static int pic32mx_interrupt(int irq, void *context)
 
       if ((status & ETH_INT_RXOVFLW) != 0)
         {
-          nlldbg("RX Overrun. status: %08x\n", status);
+          nerr("ERROR: RX Overrun. status: %08x\n", status);
           NETDEV_RXERRORS(&priv->pd_dev);
         }
 
@@ -1702,7 +1718,7 @@ static int pic32mx_interrupt(int irq, void *context)
 
       if ((status & ETH_INT_RXBUFNA) != 0)
         {
-          nlldbg("RX buffer descriptor overrun. status: %08x\n", status);
+          nerr("ERROR: RX buffer descriptor overrun. status: %08x\n", status);
           NETDEV_RXERRORS(&priv->pd_dev);
         }
 
@@ -1713,7 +1729,7 @@ static int pic32mx_interrupt(int irq, void *context)
 
       if ((status & ETH_INT_RXBUSE) != 0)
         {
-          nlldbg("RX BVCI bus error. status: %08x\n", status);
+          nerr("ERROR: RX BVCI bus error. status: %08x\n", status);
           NETDEV_RXERRORS(&priv->pd_dev);
         }
 
@@ -1756,7 +1772,7 @@ static int pic32mx_interrupt(int irq, void *context)
 
       if ((status & ETH_INT_TXABORT) != 0)
         {
-          nlldbg("TX abort. status: %08x\n", status);
+          nerr("ERROR: TX abort. status: %08x\n", status);
           NETDEV_TXERRORS(&priv->pd_dev);
         }
 
@@ -1767,7 +1783,7 @@ static int pic32mx_interrupt(int irq, void *context)
 
       if ((status & ETH_INT_TXBUSE) != 0)
         {
-          nlldbg("TX BVCI bus error. status: %08x\n", status);
+          nerr("ERROR: TX BVCI bus error. status: %08x\n", status);
           NETDEV_TXERRORS(&priv->pd_dev);
         }
 
@@ -1801,45 +1817,111 @@ static int pic32mx_interrupt(int irq, void *context)
        * (ETHCON1:0) bit to decrement the BUFCNT counter. Writing a 0 or a
        * 1 has no effect.
        */
-
     }
 
   /* Clear the pending interrupt */
 
-# if CONFIG_PIC32MX_NINTERFACES > 1
+#if CONFIG_PIC32MX_NINTERFACES > 1
   up_clrpend_irq(priv->pd_irqsrc);
-# else
+#else
   up_clrpend_irq(PIC32MX_IRQSRC_ETH);
-# endif
+#endif
+  net_unlock();
+
+  /* Re-enable Ethernet interrupts */
+
+#if CONFIG_PIC32MX_NINTERFACES > 1
+  up_enable_irq(priv->pd_irqsrc);
+#else
+  up_enable_irq(PIC32MX_IRQSRC_ETH);
+#endif
+}
 
+/****************************************************************************
+ * Function: pic32mx_interrupt
+ *
+ * Description:
+ *   Hardware interrupt handler
+ *
+ * Parameters:
+ *   irq     - Number of the IRQ that generated the interrupt
+ *   context - Interrupt register state save info (architecture-specific)
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *
+ ****************************************************************************/
+
+static int pic32mx_interrupt(int irq, void *context, FAR void *arg)
+{
+  struct pic32mx_driver_s *priv;
+  uint32_t status;
+
+#if CONFIG_PIC32MX_NINTERFACES > 1
+# error "A mechanism to associate an interface with an IRQ is needed"
+#else
+  priv = &g_ethdrvr[0];
+#endif
+
+  /* Disable further Ethernet interrupts.  Because Ethernet interrupts are
+   * also disabled if the TX timeout event occurs, there can be no race
+   * condition here.
+   */
+
+#if CONFIG_PIC32MX_NINTERFACES > 1
+  up_disable_irq(priv->pd_irqsrc);
+#else
+  up_disable_irq(PIC32MX_IRQSRC_ETH);
+#endif
+
+  /* Get the interrupt status (zero means no interrupts pending). */
+
+  status = pic32mx_getreg(PIC32MX_ETH_IRQ);
+
+  /* Determine if a TX transfer just completed */
+
+  if ((status & ETH_INT_TXDONE) != 0)
+    {
+      /* If a TX transfer just completed, then cancel the TX timeout so
+       * there will be no race condition between any subsequent timeout
+       * expiration and the deferred interrupt processing.
+       */
+
+       wd_cancel(priv->pd_txtimeout);
+    }
+
+  /* Schedule to perform the interrupt processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->pd_irqwork, pic32mx_interrupt_work, priv, 0);
   return OK;
 }
 
 /****************************************************************************
- * Function: pic32mx_txtimeout
+ * Function: pic32mx_txtimeout_work
  *
  * Description:
- *   Our TX watchdog timed out.  Called from the timer interrupt handler.
- *   The last TX never completed.  Reset the hardware and start again.
+ *   Perform TX timeout related work from the worker thread
  *
  * Parameters:
- *   argc - The number of available arguments
- *   arg  - The first argument
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
- *   Global interrupts are disabled by the watchdog logic.
+ *   The network is locked.
  *
  ****************************************************************************/
 
-static void pic32mx_txtimeout(int argc, uint32_t arg, ...)
+static void pic32mx_txtimeout_work(void *arg)
 {
   struct pic32mx_driver_s *priv = (struct pic32mx_driver_s *)arg;
 
   /* Increment statistics and dump debug info */
 
+  net_lock();
   NETDEV_TXTIMEOUTS(&priv->pd_dev);
   if (priv->pd_ifup)
     {
@@ -1849,19 +1931,22 @@ static void pic32mx_txtimeout(int argc, uint32_t arg, ...)
 
       (void)pic32mx_ifup(&priv->pd_dev);
 
-      /* Then poll the network for new XMIT data (We are guaranteed to have a free
-       * buffer here).
+      /* Then poll the network for new XMIT data (We are guaranteed to have
+       * a free buffer here).
        */
 
       pic32mx_poll(priv);
     }
+
+  net_unlock();
 }
 
 /****************************************************************************
- * Function: pic32mx_polltimer
+ * Function: pic32mx_txtimeout_expiry
  *
  * Description:
- *   Periodic timer handler.  Called from the timer interrupt handler.
+ *   Our TX watchdog timed out.  Called from the timer interrupt handler.
+ *   The last TX never completed.  Reset the hardware and start again.
  *
  * Parameters:
  *   argc - The number of available arguments
@@ -1875,7 +1960,44 @@ static void pic32mx_txtimeout(int argc, uint32_t arg, ...)
  *
  ****************************************************************************/
 
-static void pic32mx_polltimer(int argc, uint32_t arg, ...)
+static void pic32mx_txtimeout_expiry(int argc, wdparm_t arg, ...)
+{
+  struct pic32mx_driver_s *priv = (struct pic32mx_driver_s *)arg;
+
+  /* Disable further Ethernet interrupts.  This will prevent some race
+   * conditions with interrupt work.  There is still a potential race
+   * condition with interrupt work that is already queued and in progress.
+   */
+
+#if CONFIG_PIC32MX_NINTERFACES > 1
+  up_disable_irq(priv->pd_irqsrc);
+#else
+  up_disable_irq(PIC32MX_IRQSRC_ETH);
+#endif
+
+  /* Schedule to perform the TX timeout processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->pd_irqwork, pic32mx_txtimeout_work, priv, 0);
+}
+
+/****************************************************************************
+ * Function: pic32mx_poll_work
+ *
+ * Description:
+ *   Perform periodic polling from the worker thread
+ *
+ * Parameters:
+ *   arg - The argument passed when work_queue() as called.
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *   The network is locked.
+ *
+ ****************************************************************************/
+
+static void pic32mx_poll_work(void *arg)
 {
   struct pic32mx_driver_s *priv = (struct pic32mx_driver_s *)arg;
 
@@ -1883,6 +2005,7 @@ static void pic32mx_polltimer(int argc, uint32_t arg, ...)
    * poll if we are unable to accept another packet for transmission.
    */
 
+  net_lock();
   if (pic32mx_txdesc(priv) != NULL)
     {
       /* If so, update TCP timing states and poll the network for new XMIT data. Hmmm..
@@ -1895,7 +2018,36 @@ static void pic32mx_polltimer(int argc, uint32_t arg, ...)
 
   /* Setup the watchdog poll timer again */
 
-  (void)wd_start(priv->pd_txpoll, PIC32MX_WDDELAY, pic32mx_polltimer, 1, arg);
+  (void)wd_start(priv->pd_txpoll, PIC32MX_WDDELAY, pic32mx_poll_expiry,
+                 1, priv);
+  net_unlock();
+}
+
+/****************************************************************************
+ * Function: pic32mx_poll_expiry
+ *
+ * Description:
+ *   Periodic timer handler.  Called from the timer interrupt handler.
+ *
+ * Parameters:
+ *   argc - The number of available arguments
+ *   arg  - The first argument
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Global interrupts are disabled by the watchdog logic.
+ *
+ ****************************************************************************/
+
+static void pic32mx_poll_expiry(int argc, wdparm_t arg, ...)
+{
+  struct pic32mx_driver_s *priv = (struct pic32mx_driver_s *)arg;
+
+  /* Schedule to perform the interrupt processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->pd_pollwork, pic32mx_poll_work, priv, 0);
 }
 
 /****************************************************************************
@@ -1921,9 +2073,9 @@ static int pic32mx_ifup(struct net_driver_s *dev)
   uint32_t regval;
   int ret;
 
-  ndbg("Bringing up: %d.%d.%d.%d\n",
-       dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-       (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 
   /* Reset the Ethernet controller (again) */
 
@@ -2011,7 +2163,7 @@ static int pic32mx_ifup(struct net_driver_s *dev)
   ret = pic32mx_phyinit(priv);
   if (ret != 0)
     {
-      ndbg("pic32mx_phyinit failed: %d\n", ret);
+      nerr("ERROR: pic32mx_phyinit failed: %d\n", ret);
       return ret;
     }
 
@@ -2187,12 +2339,13 @@ static int pic32mx_ifup(struct net_driver_s *dev)
 
   /* Set and activate a timer process */
 
-  (void)wd_start(priv->pd_txpoll, PIC32MX_WDDELAY, pic32mx_polltimer, 1,
+  (void)wd_start(priv->pd_txpoll, PIC32MX_WDDELAY, pic32mx_poll_expiry, 1,
                 (uint32_t)priv);
 
   /* Finally, enable the Ethernet interrupt at the interrupt controller */
 
   priv->pd_ifup = true;
+
 #if CONFIG_PIC32MX_NINTERFACES > 1
   up_enable_irq(priv->pd_irqsrc);
 #else
@@ -2245,37 +2398,29 @@ static int pic32mx_ifdown(struct net_driver_s *dev)
 }
 
 /****************************************************************************
- * Function: pic32mx_txavail
+ * Function: pic32mx_txavail_work
  *
  * Description:
- *   Driver callback invoked when new TX data is available.  This is a
- *   stimulus perform an out-of-cycle poll and, thereby, reduce the TX
- *   latency.
+ *   Perform an out-of-cycle poll on the worker thread.
  *
  * Parameters:
- *   dev  - Reference to the NuttX driver state structure
+ *   arg - Reference to the NuttX driver state structure (cast to void*)
  *
  * Returned Value:
  *   None
  *
  * Assumptions:
- *   Called in normal user mode
+ *   Called on the higher priority worker thread.
  *
  ****************************************************************************/
 
-static int pic32mx_txavail(struct net_driver_s *dev)
+static void pic32mx_txavail_work(void *arg)
 {
-  struct pic32mx_driver_s *priv = (struct pic32mx_driver_s *)dev->d_private;
-  irqstate_t flags;
-
-  /* Disable interrupts because this function may be called from interrupt
-   * level processing.
-   */
-
-  flags = enter_critical_section();
+  struct pic32mx_driver_s *priv = (struct pic32mx_driver_s *)arg;
 
   /* Ignore the notification if the interface is not yet up */
 
+  net_lock();
   if (priv->pd_ifup)
     {
       /* Check if the next Tx descriptor is available. */
@@ -2290,7 +2435,44 @@ static int pic32mx_txavail(struct net_driver_s *dev)
         }
     }
 
-  leave_critical_section(flags);
+  net_unlock();
+}
+
+/****************************************************************************
+ * Function: pic32mx_txavail
+ *
+ * Description:
+ *   Driver callback invoked when new TX data is available.  This is a
+ *   stimulus perform an out-of-cycle poll and, thereby, reduce the TX
+ *   latency.
+ *
+ * Parameters:
+ *   dev - Reference to the NuttX driver state structure
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Called in normal user mode
+ *
+ ****************************************************************************/
+
+static int pic32mx_txavail(struct net_driver_s *dev)
+{
+  struct pic32mx_driver_s *priv = (struct pic32mx_driver_s *)dev->d_private;
+
+  /* Is our single work structure available?  It may not be if there are
+   * pending interrupt actions and we will have to ignore the Tx
+   * availability action.
+   */
+
+  if (work_available(&priv->pd_pollwork))
+    {
+      /* Schedule to serialize the poll on the worker thread. */
+
+      work_queue(ETHWORK, &priv->pd_pollwork, pic32mx_txavail_work, priv, 0);
+    }
+
   return OK;
 }
 
@@ -2373,14 +2555,14 @@ static int pic32mx_rmmac(struct net_driver_s *dev, const uint8_t *mac)
 #if defined(CONFIG_NET_REGDEBUG) && defined(PIC32MX_HAVE_PHY)
 static void pic32mx_showmii(uint8_t phyaddr, const char *msg)
 {
-  dbg("PHY " PIC32MX_PHYNAME ": %s\n", msg);
-  dbg("  MCR:       %04x\n", pic32mx_phyread(phyaddr, MII_MCR));
-  dbg("  MSR:       %04x\n", pic32mx_phyread(phyaddr, MII_MSR));
-  dbg("  ADVERTISE: %04x\n", pic32mx_phyread(phyaddr, MII_ADVERTISE));
-  dbg("  LPA:       %04x\n", pic32mx_phyread(phyaddr, MII_LPA));
-  dbg("  EXPANSION: %04x\n", pic32mx_phyread(phyaddr, MII_EXPANSION));
+  ninfo("PHY " PIC32MX_PHYNAME ": %s\n", msg);
+  ninfo("  MCR:       %04x\n", pic32mx_phyread(phyaddr, MII_MCR));
+  ninfo("  MSR:       %04x\n", pic32mx_phyread(phyaddr, MII_MSR));
+  ninfo("  ADVERTISE: %04x\n", pic32mx_phyread(phyaddr, MII_ADVERTISE));
+  ninfo("  LPA:       %04x\n", pic32mx_phyread(phyaddr, MII_LPA));
+  ninfo("  EXPANSION: %04x\n", pic32mx_phyread(phyaddr, MII_EXPANSION));
 #ifdef CONFIG_ETH0_PHY_KS8721
-  dbg("  10BTCR:    %04x\n", pic32mx_phyread(phyaddr, MII_KS8721_10BTCR));
+  ninfo("  10BTCR:    %04x\n", pic32mx_phyread(phyaddr, MII_KS8721_10BTCR));
 #endif
 }
 #endif
@@ -2543,7 +2725,7 @@ static inline int pic32mx_phyreset(uint8_t phyaddr)
         }
     }
 
-  ndbg("Reset failed. MCR: %04x\n", phyreg);
+  nerr("ERROR: Reset failed. MCR: %04x\n", phyreg);
   return -ETIMEDOUT;
 }
 #endif
@@ -2590,7 +2772,7 @@ static inline int pic32mx_phyautoneg(uint8_t phyaddr)
         }
     }
 
-  ndbg("Auto-negotiation failed. MSR: %04x\n", phyreg);
+  nerr("ERROR: Auto-negotiation failed. MSR: %04x\n", phyreg);
   return -ETIMEDOUT;
 }
 #endif
@@ -2669,7 +2851,7 @@ static int pic32mx_phymode(uint8_t phyaddr, uint8_t mode)
 #endif
     }
 
-  ndbg("Link failed. MSR: %04x\n", phyreg);
+  nerr("ERROR: Link failed. MSR: %04x\n", phyreg);
   return -ETIMEDOUT;
 }
 #endif
@@ -2738,7 +2920,7 @@ static inline int pic32mx_phyinit(struct pic32mx_driver_s *priv)
       ret = pic32mx_phyreset(phyaddr);
       if (ret < 0)
         {
-          ndbg("Failed to reset PHY at address %d\n", phyaddr);
+          nerr("ERROR: Failed to reset PHY at address %d\n", phyaddr);
           continue;
         }
 
@@ -2751,12 +2933,12 @@ static inline int pic32mx_phyinit(struct pic32mx_driver_s *priv)
        */
 
        phyreg = (unsigned int)pic32mx_phyread(phyaddr, MII_PHYID1);
-       nvdbg("Addr: %d PHY ID1: %04x\n", phyaddr, phyreg);
+       ninfo("Addr: %d PHY ID1: %04x\n", phyaddr, phyreg);
 
        if (phyreg == PIC32MX_PHYID1)
         {
           phyreg = pic32mx_phyread(phyaddr, MII_PHYID2);
-          nvdbg("Addr: %d PHY ID2: %04x\n", phyaddr, phyreg);
+          ninfo("Addr: %d PHY ID2: %04x\n", phyaddr, phyreg);
 
           if (phyreg == PIC32MX_PHYID2)
             {
@@ -2771,10 +2953,10 @@ static inline int pic32mx_phyinit(struct pic32mx_driver_s *priv)
     {
       /* Failed to find PHY at any location */
 
-      ndbg("No PHY detected\n");
+      nerr("ERROR: No PHY detected\n");
       return -ENODEV;
     }
-  nvdbg("phyaddr: %d\n", phyaddr);
+  ninfo("phyaddr: %d\n", phyaddr);
 
   /* Save the discovered PHY device address */
 
@@ -2875,7 +3057,7 @@ static inline int pic32mx_phyinit(struct pic32mx_driver_s *priv)
         priv->pd_mode = PIC32MX_100BASET_FD;
         break;
       default:
-        ndbg("Unrecognized mode: %04x\n", phyreg);
+        nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
         return -ENODEV;
     }
 #elif defined(CONFIG_ETH0_PHY_DP83848C)
@@ -2898,7 +3080,7 @@ static inline int pic32mx_phyinit(struct pic32mx_driver_s *priv)
         priv->pd_mode = PIC32MX_10BASET_FD;
         break;
       default:
-        ndbg("Unrecognized mode: %04x\n", phyreg);
+        nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
         return -ENODEV;
     }
 #elif defined(CONFIG_ETH0_PHY_LAN8720)
@@ -2943,7 +3125,7 @@ static inline int pic32mx_phyinit(struct pic32mx_driver_s *priv)
       }
     else
       {
-        ndbg("Unrecognized mode: %04x\n", phyreg);
+        nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
         return -ENODEV;
       }
   }
@@ -2951,9 +3133,9 @@ static inline int pic32mx_phyinit(struct pic32mx_driver_s *priv)
 #  warning "PHY Unknown: speed and duplex are bogus"
 #endif
 
-  ndbg("%dBase-T %s duplex\n",
-       (priv->pd_mode & PIC32MX_SPEED_MASK) ==  PIC32MX_SPEED_100 ? 100 : 10,
-       (priv->pd_mode & PIC32MX_DUPLEX_MASK) == PIC32MX_DUPLEX_FULL ?"full" : "half");
+  ninfo("%dBase-T %s duplex\n",
+        (priv->pd_mode & PIC32MX_SPEED_MASK) ==  PIC32MX_SPEED_100 ? 100 : 10,
+        (priv->pd_mode & PIC32MX_DUPLEX_MASK) == PIC32MX_DUPLEX_FULL ?"full" : "half");
 
   /* Disable auto-configuration.  Set the fixed speed/duplex mode.
    * (probably more than little redundant).
@@ -3181,9 +3363,9 @@ static inline int pic32mx_ethinitialize(int intf)
   /* Attach the IRQ to the driver */
 
 #if CONFIG_PIC32MX_NINTERFACES > 1
-  ret = irq_attach(priv->pd_irq, pic32mx_interrupt);
+  ret = irq_attach(priv->pd_irq, pic32mx_interrupt, NULL);
 #else
-  ret = irq_attach(PIC32MX_IRQ_ETH, pic32mx_interrupt);
+  ret = irq_attach(PIC32MX_IRQ_ETH, pic32mx_interrupt, NULL);
 #endif
   if (ret != 0)
     {
diff --git a/arch/mips/src/pic32mx/pic32mx-exception.c b/arch/mips/src/pic32mx/pic32mx-exception.c
index b5a058f3a6f4da1b0cb36e7e36e3ba0a21f8a828..86d8ddf133e12aee55960386108f3771208fc526 100644
--- a/arch/mips/src/pic32mx/pic32mx-exception.c
+++ b/arch/mips/src/pic32mx/pic32mx-exception.c
@@ -55,22 +55,6 @@
 #include "pic32mx-int.h"
 #include "pic32mx.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -85,7 +69,7 @@
 
 uint32_t *pic32mx_exception(uint32_t *regs)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   uint32_t cause;
   uint32_t epc;
 #endif
@@ -96,98 +80,98 @@ uint32_t *pic32mx_exception(uint32_t *regs)
 
   board_autoled_on(LED_INIRQ);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   /* Get the cause of the exception from the CAUSE register */
 
   asm volatile("\tmfc0 %0,$13,0\n" : "=r"(cause));
   asm volatile("\tmfc0 %0,$14,0\n" : "=r"(epc));
 
-#ifdef CONFIG_DEBUG_VERBOSE
+#ifdef CONFIG_DEBUG_INFO
   switch (cause & CP0_CAUSE_EXCCODE_MASK)
     {
     case CP0_CAUSE_EXCCODE_INT:      /* Interrupt */
-      llvdbg("EXCEPTION: Interrupt"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Interrupt"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_TLBL:     /* TLB exception (load or instruction fetch) */
-      llvdbg("EXCEPTION: TLB exception (load or instruction fetch)"
-             " CAUSE: %08x EPC:%08x\n", cause, epc);
+      _alert("EXCEPTION: TLB exception (load or instruction fetch)"
+            " CAUSE: %08x EPC:%08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_TLBS:     /* TLB exception (store) */
-      llvdbg("EXCEPTION: TLB exception (store)"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: TLB exception (store)"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_ADEL:     /* Address error exception (load or instruction fetch) */
-      llvdbg("EXCEPTION: Address error exception (load or instruction fetch)"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Address error exception (load or instruction fetch)"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_ADES:     /* Address error exception (store) */
-      llvdbg("EXCEPTION: Address error exception (store)"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Address error exception (store)"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_IBE:      /* Bus error exception (instruction fetch) */
-      llvdbg("EXCEPTION: Bus error exception (instruction fetch)"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Bus error exception (instruction fetch)"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_DBE:      /* Bus error exception (data reference: load or store) */
-      llvdbg("EXCEPTION: Bus error exception (data reference: load or store)"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Bus error exception (data reference: load or store)"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_SYS:      /* Syscall exception */
-      llvdbg("EXCEPTION: Syscall exception"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Syscall exception"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_BP:       /* Breakpoint exception */
-      llvdbg("EXCEPTION: Breakpoint exception"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Breakpoint exception"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_RI:       /* Reserved instruction exception */
-      llvdbg("EXCEPTION: Reserved instruction exception"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Reserved instruction exception"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_CPU:      /* Coprocessor Unusable exception */
-      llvdbg("EXCEPTION: Coprocessor Unusable exception"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Coprocessor Unusable exception"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_OV:       /* Arithmetic Overflow exception */
-      llvdbg("EXCEPTION: Arithmetic Overflow exception"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Arithmetic Overflow exception"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_TR:       /* Trap exception */
-      llvdbg("EXCEPTION: Trap exception"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Trap exception"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_FPE:      /* Floating point exception */
-      llvdbg("EXCEPTION: Floating point exception"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Floating point exception"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_C2E:      /* Precise Coprocessor 2 exceptions */
-      llvdbg("EXCEPTION: Precise Coprocessor 2 exceptions"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Precise Coprocessor 2 exceptions"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_MDMX:     /* MDMX Unusable (MIPS64) */
-      llvdbg("EXCEPTION: MDMX Unusable (MIPS64)"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: MDMX Unusable (MIPS64)"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_WATCH:    /* WatchHi/WatchLo address */
-      llvdbg("EXCEPTION: WatchHi/WatchLo address"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: WatchHi/WatchLo address"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_MCHECK:   /* Machine check */
-      llvdbg("EXCEPTION: Machine check"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Machine check"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_CACHEERR: /* Cache error */
-      llvdbg("EXCEPTION: Cache error"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Cache error"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     default:
-      llvdbg("EXCEPTION: Unknown"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Unknown"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     }
 #else
-  lldbg("EXCEPTION: CAUSE: %08x EPC: %08x\n", cause, epc);
+  _alert("EXCEPTION: CAUSE: %08x EPC: %08x\n", cause, epc);
 #endif
 #endif
 
diff --git a/arch/mips/src/pic32mx/pic32mx-gpio.c b/arch/mips/src/pic32mx/pic32mx-gpio.c
index 78d9acca22a2536ae0d7814e7ba987fd0189b5ef..a672cb35e0212aeb3557e9a12dc6cf2b5d3ac4c7 100644
--- a/arch/mips/src/pic32mx/pic32mx-gpio.c
+++ b/arch/mips/src/pic32mx/pic32mx-gpio.c
@@ -303,7 +303,7 @@ bool pic32mx_gpioread(uint16_t pinset)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_GPIO)
+#ifdef CONFIG_DEBUG_GPIO_INFO
 void pic32mx_dumpgpio(uint32_t pinset, const char *msg)
 {
   unsigned int port = pic32mx_portno(pinset);
@@ -321,17 +321,17 @@ void pic32mx_dumpgpio(uint32_t pinset, const char *msg)
       /* The following requires exclusive access to the GPIO registers */
 
       sched_lock();
-      lldbg("IOPORT%c pinset: %04x base: %08x -- %s\n",
-            'A'+port, pinset, base, msg);
-      lldbg("   TRIS: %08x   PORT: %08x    LAT: %08x    ODC: %08x\n",
-            getreg32(base + PIC32MX_IOPORT_TRIS_OFFSET),
-            getreg32(base + PIC32MX_IOPORT_PORT_OFFSET),
-            getreg32(base + PIC32MX_IOPORT_LAT_OFFSET),
-            getreg32(base + PIC32MX_IOPORT_ODC_OFFSET));
-      lldbg("  CNCON: %08x   CNEN: %08x  CNPUE: %08x\n",
-            getreg32(PIC32MX_IOPORT_CNCON),
-            getreg32(PIC32MX_IOPORT_CNEN),
-            getreg32(PIC32MX_IOPORT_CNPUE));
+      gpioinfo("IOPORT%c pinset: %04x base: %08x -- %s\n",
+               'A'+port, pinset, base, msg);
+      gpioinfo("   TRIS: %08x   PORT: %08x    LAT: %08x    ODC: %08x\n",
+               getreg32(base + PIC32MX_IOPORT_TRIS_OFFSET),
+               getreg32(base + PIC32MX_IOPORT_PORT_OFFSET),
+               getreg32(base + PIC32MX_IOPORT_LAT_OFFSET),
+               getreg32(base + PIC32MX_IOPORT_ODC_OFFSET));
+      gpioinfo("  CNCON: %08x   CNEN: %08x  CNPUE: %08x\n",
+               getreg32(PIC32MX_IOPORT_CNCON),
+               getreg32(PIC32MX_IOPORT_CNEN),
+               getreg32(PIC32MX_IOPORT_CNPUE));
       sched_unlock();
     }
 }
diff --git a/arch/mips/src/pic32mx/pic32mx-gpioirq.c b/arch/mips/src/pic32mx/pic32mx-gpioirq.c
index ce96403da8cc22a5046b52052dbddf6d4f3c1454..9000618c7f6f06821558bad9abb84634e4008969 100644
--- a/arch/mips/src/pic32mx/pic32mx-gpioirq.c
+++ b/arch/mips/src/pic32mx/pic32mx-gpioirq.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/mips/src/pic32mx/pic32mx-gpio.c
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -52,23 +52,21 @@
 
 #ifdef CONFIG_PIC32MX_GPIOIRQ
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
 
-/****************************************************************************
- * Public Data
- ****************************************************************************/
+struct g_cnisrs_s
+{
+  xcpt_t handler;   /* Interrupt handler entry point */
+  void  *arg;       /* The argument that accompanies the interrupt handler */
+};
 
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
-static xcpt_t g_cnisrs[IOPORT_NUMCN];
+static struct g_cnisrs_s g_cnisrs[IOPORT_NUMCN];
 
 /****************************************************************************
  * Private Functions
@@ -113,11 +111,14 @@ static int pic32mx_cninterrupt(int irq, FAR void *context)
     {
       /* Is this one attached */
 
-      if (g_cnisrs[i])
+      if (g_cnisrs[i].handler != NULL)
         {
+          xcpt_t handler = irstab[i].handler;
+          void  *arg     = irstab[i].arg;
+
           /* Call the attached handler */
 
-          status = g_cnisrs[i](irq, context);
+          status = handler(irq, context, arg);
 
           /* Keep track of the status of the last handler that failed */
 
@@ -125,6 +126,7 @@ static int pic32mx_cninterrupt(int irq, FAR void *context)
             {
               ret = status;
             }
+        }
     }
 
   /* Clear the pending interrupt */
@@ -189,21 +191,21 @@ void pic32mx_gpioirqinitialize(void)
  *   In that case, all attached handlers will be called.  Each handler must
  *   maintain state and determine if the unlying GPIO input value changed.
  *
- * Parameters:
- *  - pinset:  GPIO pin configuration
- *  - cn:      The change notification number associated with the pin.
- *  - handler: Interrupt handler (may be NULL to detach)
+ * Input Parameters:
+ *   pinset  - GPIO pin configuration
+ *   cn      - The change notification number associated with the pin.
+ *   handler - Interrupt handler (may be NULL to detach)
+ *   arg     - The argument that accompanies the interrupt
  *
- * Returns:
- *  The previous value of the interrupt handler function pointer.  This
- *  value may, for example, be used to restore the previous handler when
- *  multiple handlers are used.
+ * Returned Value:
+ *   Zero (OK) is returned on success.  A negated error value is returned on
+ *   any failure to indicate the nature of the failure.
  *
  ****************************************************************************/
 
-xcpt_t pic32mx_gpioattach(uint32_t pinset, unsigned int cn, xcpt_t handler)
+int pic32mx_gpioattach(uint32_t pinset, unsigned int cn, xcpt_t handler,
+                       void *arg)
 {
-  xcpt_t oldhandler = NULL;
   irqstate_t flags;
 
   DEBUGASSERT(cn < IOPORT_NUMCN);
@@ -215,7 +217,6 @@ xcpt_t pic32mx_gpioattach(uint32_t pinset, unsigned int cn, xcpt_t handler)
       /* Get the previously attached handler as the return value */
 
       flags = enter_critical_section();
-      oldhandler = g_cnisrs[cn];
 
       /* Are we attaching or detaching? */
 
@@ -250,11 +251,12 @@ xcpt_t pic32mx_gpioattach(uint32_t pinset, unsigned int cn, xcpt_t handler)
 
       /* Set the new handler (perhaps NULLifying the current handler) */
 
-      g_cnisrs[cn] = handler;
+      g_cnisrs[cn].handler = handler;
+      g_cnisrs[cn].arg     = arg;
       leave_critical_section(flags);
     }
 
-  return oldhandler;
+  return OK;
 }
 
 /****************************************************************************
diff --git a/arch/mips/src/pic32mx/pic32mx-irq.c b/arch/mips/src/pic32mx/pic32mx-irq.c
index ded512f6e1ddeb00c052dd62b76bf4f206c55361..f19311889e836d0a32e60460c5ec40c4d2ef7738 100644
--- a/arch/mips/src/pic32mx/pic32mx-irq.c
+++ b/arch/mips/src/pic32mx/pic32mx-irq.c
@@ -1,6 +1,5 @@
 /****************************************************************************
  * arch/mips/src/pic32mx/pic32mx-irq.c
- * arch/mips/src/chip/pic32mx-irq.c
  *
  *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -155,7 +154,7 @@ void up_irqinitialize(void)
 
   /* Attach and enable software interrupts */
 
-  irq_attach(PIC32MX_IRQ_CS0, up_swint0);
+  irq_attach(PIC32MX_IRQ_CS0, up_swint0, NULL);
   up_enable_irq(PIC32MX_IRQSRC_CS0);
 
   /* currents_regs is non-NULL only while processing an interrupt */
diff --git a/arch/mips/src/pic32mx/pic32mx-serial.c b/arch/mips/src/pic32mx/pic32mx-serial.c
index 590c5998a159fd0a664fb7769cafe5594d9af799..8e6582a1452e9569f667f982ae57dde2bbe76460 100644
--- a/arch/mips/src/pic32mx/pic32mx-serial.c
+++ b/arch/mips/src/pic32mx/pic32mx-serial.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/mips/src/pic32mx/pic32mx-serial.c
  *
- *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -173,7 +173,7 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-static int  up_interrupt(int irq, void *context);
+static int  up_interrupt(int irq, void *context, void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  up_receive(struct uart_dev_s *dev, uint32_t *status);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
@@ -413,7 +413,7 @@ static int up_attach(struct uart_dev_s *dev)
 
   /* Attach the IRQ */
 
-  return irq_attach(priv->irq, up_interrupt);
+  return irq_attach(priv->irq, up_interrupt, dev);
 }
 
 /****************************************************************************
@@ -451,32 +451,15 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_interrupt(int irq, void *context)
+static int up_interrupt(int irq, void *context, void *arg)
 {
-  struct uart_dev_s *dev = NULL;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct up_dev_s   *priv;
   int                passes;
   bool               handled;
 
-#ifdef CONFIG_PIC32MX_UART1
-  if (g_uart1priv.irq == irq)
-    {
-      dev = &g_uart1port;
-    }
-  else
-#endif
-#ifdef CONFIG_PIC32MX_UART2
-  if (g_uart2priv.irq == irq)
-    {
-      dev = &g_uart2port;
-    }
-  else
-#endif
-    {
-      PANIC();
-    }
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct up_dev_s *)dev->priv;
-  DEBUGASSERT(priv);
 
   /* Loop until there are no characters to be transferred or,
    * until we have been looping for a long time.
@@ -494,14 +477,14 @@ static int up_interrupt(int irq, void *context)
        *  - Overflow condition for the receive buffer OERR (UxSTA bit 1) occurs
        */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       if (up_pending_irq(priv->irqe))
         {
            /* Clear the pending error interrupt */
 
            up_clrpend_irq(priv->irqe);
-           lldbg("ERROR: interrupt STA: %08x\n",
-                 up_serialin(priv, PIC32MX_UART_STA_OFFSET));
+           _err("ERROR: interrupt STA: %08x\n",
+               up_serialin(priv, PIC32MX_UART_STA_OFFSET));
            handled = true;
         }
 #endif
@@ -700,7 +683,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
        */
 
 #ifndef CONFIG_SUPPRESS_SERIAL_INTS
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       up_enable_irq(priv->irqe);
 #endif
       up_enable_irq(priv->irqrx);
@@ -709,7 +692,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
     }
   else
     {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       up_disable_irq(priv->irqe);
 #endif
       up_disable_irq(priv->irqrx);
diff --git a/arch/mips/src/pic32mx/pic32mx-spi.c b/arch/mips/src/pic32mx/pic32mx-spi.c
index 44e79d6b48492d3ebdfb922e037690ff0538aa4d..1cfd0164d5283867bb315a454b8efbbd5ea394c7 100644
--- a/arch/mips/src/pic32mx/pic32mx-spi.c
+++ b/arch/mips/src/pic32mx/pic32mx-spi.c
@@ -72,20 +72,6 @@
 #  error CONFIG_SPI_EXCHANGE not supported by this driver
 #endif
 
-/* Debug */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -329,7 +315,7 @@ static uint32_t spi_getreg(FAR struct pic32mx_dev_s *priv, unsigned int offset)
         {
            if (count == 4)
              {
-               lldbg("...\n");
+               _info("...\n");
              }
           return value;
         }
@@ -345,7 +331,7 @@ static uint32_t spi_getreg(FAR struct pic32mx_dev_s *priv, unsigned int offset)
          {
            /* Yes.. then show how many times the value repeated */
 
-           lldbg("[repeats %d more times]\n", count-3);
+           _info("[repeats %d more times]\n", count-3);
          }
 
        /* Save the new address, value, and count */
@@ -357,7 +343,7 @@ static uint32_t spi_getreg(FAR struct pic32mx_dev_s *priv, unsigned int offset)
 
   /* Show the register value read */
 
-  lldbg("%08x->%08x\n", addr, value);
+  _info("%08x->%08x\n", addr, value);
   return value;
 }
 #else
@@ -395,7 +381,7 @@ static void spi_putreg(FAR struct pic32mx_dev_s *priv, unsigned int offset,
 
   /* Show the register value being written */
 
-  lldbg("%08x<-%08x\n", addr, value);
+  _info("%08x<-%08x\n", addr, value);
 
   /* Then do the write */
 
@@ -476,7 +462,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
   uint32_t actual;
   uint32_t regval;
 
-  spivdbg("Old frequency: %d actual: %d New frequency: %d\n",
+  spiinfo("Old frequency: %d actual: %d New frequency: %d\n",
           priv->frequency, priv->actual, frequency);
 
   /* Check if the requested frequency is the same as the frequency selection */
@@ -511,7 +497,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
   /* Save the new BRG value */
 
   spi_putreg(priv, PIC32MX_SPI_BRG_OFFSET, regval);
-  spivdbg("PBCLOCK: %d frequency: %d divisor: %d BRG: %d\n",
+  spiinfo("PBCLOCK: %d frequency: %d divisor: %d BRG: %d\n",
           BOARD_PBCLOCK, frequency, divisor, regval);
 
   /* Calculate the new actual frequency.
@@ -526,7 +512,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
   priv->frequency = frequency;
   priv->actual    = actual;
 
-  spidbg("New frequency: %d Actual: %d\n", frequency, actual);
+  spiinfo("New frequency: %d Actual: %d\n", frequency, actual);
   return actual;
 }
 
@@ -550,7 +536,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
   FAR struct pic32mx_dev_s *priv = (FAR struct pic32mx_dev_s *)dev;
   uint32_t regval;
 
-  spivdbg("Old mode: %d New mode: %d\n", priv->mode, mode);
+  spiinfo("Old mode: %d New mode: %d\n", priv->mode, mode);
 
   /* Has the mode changed? */
 
@@ -612,7 +598,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
         }
 
       spi_putreg(priv, PIC32MX_SPI_CON_OFFSET, regval);
-      spivdbg("CON: %08x\n", regval);
+      spiinfo("CON: %08x\n", regval);
 
       /* Save the mode so that subsequent re-configuratins will be faster */
 
@@ -641,7 +627,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
   uint32_t setting;
   uint32_t regval;
 
-  spivdbg("Old nbits: %d New nbits: %d\n", priv->nbits, nbits);
+  spiinfo("Old nbits: %d New nbits: %d\n", priv->nbits, nbits);
 
   /* Has the number of bits changed? */
 
@@ -665,7 +651,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
         }
       else
         {
-          spidbg("Unsupported nbits: %d\n", nbits);
+          spierr("ERROR: Unsupported nbits: %d\n", nbits);
           return;
         }
 
@@ -673,7 +659,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
       regval &= ~SPI_CON_MODE_MASK;
       regval |= setting;
       regval = spi_getreg(priv, PIC32MX_SPI_CON_OFFSET);
-      spivdbg("CON: %08x\n", regval);
+      spiinfo("CON: %08x\n", regval);
 
       /* Save the selection so the subsequence re-configurations will be faster */
 
@@ -701,7 +687,7 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
 {
   FAR struct pic32mx_dev_s *priv = (FAR struct pic32mx_dev_s *)dev;
 
-  spivdbg("wd: %04x\n", wd);
+  spiinfo("wd: %04x\n", wd);
 
   /* Write the data to transmitted to the SPI Data Register */
 
@@ -754,7 +740,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
   uint32_t regval;
   uint8_t data;
 
-  spivdbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
   while (nwords)
     {
       /* Write the data to transmitted to the SPI Data Register */
@@ -809,7 +795,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
   FAR struct pic32mx_dev_s *priv = (FAR struct pic32mx_dev_s *)dev;
   FAR uint8_t *ptr = (FAR uint8_t *)buffer;
 
-  spivdbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
   while (nwords)
     {
       /* Write some dummy data to the SPI Data Register in order to clock the
@@ -864,7 +850,7 @@ FAR struct spi_dev_s *pic32mx_spibus_initialize(int port)
   irqstate_t flags;
   uint32_t regval;
 
-  spivdbg("port: %d\n", port);
+  spiinfo("port: %d\n", port);
 
   /* Select the SPI state structure for this port */
 
@@ -897,7 +883,7 @@ FAR struct spi_dev_s *pic32mx_spibus_initialize(int port)
   else
 #endif
    {
-     spidbg("Unsuppport port: %d\n", port);
+     spierr("ERROR: Unsuppport port: %d\n", port);
      return NULL;
    }
 
@@ -923,10 +909,11 @@ FAR struct spi_dev_s *pic32mx_spibus_initialize(int port)
    * resource is available.
    */
 
-  ret = irq_attach(priv->vector, spi_interrupt);
+  ret = irq_attach(priv->vector, spi_interrupt, NULL);
   if (ret < 0)
     {
-      spidbg("Failed to attach vector: %d port: %d\n", priv->vector, port);
+      spierr("ERROR: Failed to attach vector: %d port: %d\n",
+             priv->vector, port);
       goto errout;
     }
 #endif
@@ -952,7 +939,7 @@ FAR struct spi_dev_s *pic32mx_spibus_initialize(int port)
   regval |= (SPI_CON_ENHBUF | SPI_CON_RTXISEL_HALF | SPI_CON_STXISEL_HALF);
 #endif
   spi_putreg(priv, PIC32MX_SPI_CON_OFFSET, regval);
-  spivdbg("CON: %08x\n", regval);
+  spiinfo("CON: %08x\n", regval);
 
   /* Set the initial SPI configuration */
 
@@ -976,7 +963,7 @@ FAR struct spi_dev_s *pic32mx_spibus_initialize(int port)
   ret = up_prioritize_irq(priv->vector, CONFIG_PIC32MX_SPI_PRIORITY)
   if (ret < 0)
     {
-      spidbg("up_prioritize_irq failed: %d\n", ret);
+      spierr("ERROR: up_prioritize_irq failed: %d\n", ret);
       goto errout;
     }
 #endif
diff --git a/arch/mips/src/pic32mx/pic32mx-timerisr.c b/arch/mips/src/pic32mx/pic32mx-timerisr.c
index 4543c638e4be959c8df91bfd57e2228300ea462f..c34ceb5a9fe75b1168f2ca1e3b8e17f4ad0231fe 100644
--- a/arch/mips/src/pic32mx/pic32mx-timerisr.c
+++ b/arch/mips/src/pic32mx/pic32mx-timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/mips/src/pic32mx/pic32mx_timerisr.c
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -125,19 +125,11 @@
 #define TIMER1_MATCH (TIMER1_SRC_FREQ / TIMER1_PRESCALE / CLOCKS_PER_SEC)
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  pc32mx_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -145,20 +137,24 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int pc32mx_timerisr(int irq, uint32_t *regs, void *arg)
 {
-   /* Clear the pending timer interrupt */
+  /* Clear the pending timer interrupt */
 
-   putreg32(INT_T1, PIC32MX_INT_IFS0CLR);
+  putreg32(INT_T1, PIC32MX_INT_IFS0CLR);
 
-   /* Process timer interrupt */
+  /* Process timer interrupt */
 
-   sched_process_timer();
-   return 0;
+  sched_process_timer();
+  return 0;
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  mips_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -166,7 +162,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void mips_timer_initialize(void)
 {
   /* Configure and enable TIMER1.  Used the computed TCKPS divider and timer
    * match value.  The source will be either the internal PBCLOCK (TCS=0) or
@@ -187,7 +183,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(PIC32MX_IRQ_T1, (xcpt_t)up_timerisr);
+  (void)irq_attach(PIC32MX_IRQ_T1, (xcpt_t)pc32mx_timerisr, NULL);
 
   /* And enable the timer interrupt */
 
diff --git a/arch/mips/src/pic32mx/pic32mx-usbdev.c b/arch/mips/src/pic32mx/pic32mx-usbdev.c
index 00d9f240930d8cfdfe8883500ff9cbce4616d712..b184ff41ecd4221ebc17f5b2a51b73431cb4a2ce 100644
--- a/arch/mips/src/pic32mx/pic32mx-usbdev.c
+++ b/arch/mips/src/pic32mx/pic32mx-usbdev.c
@@ -79,15 +79,6 @@
 #  define CONFIG_USBDEV_EP0_MAXSIZE 64
 #endif
 
-/* Extremely detailed register/BDT debug that you would normally never want
- * enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_PIC32MX_USBDEV_REGDEBUG
-#  undef CONFIG_PIC32MX_USBDEV_BDTDEBUG
-#endif
-
 /* Disable this logic because it is buggy.  It works most of the time but
  * has some lurking issues that keep this higher performance solution from
  * being usable.
@@ -289,19 +280,17 @@
 #  undef CONFIG_PIC32MX_USBDEV_BDTDEBUG
 #  define CONFIG_PIC32MX_USBDEV_BDTDEBUG 1
 
-#  define regdbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define regvdbg lldbg
-#  else
-#    define regvdbg(x...)
-#  endif
+#  define regerr  _err
+#  define regwarn _warn
+#  define reginfo _info
 
 #else
 
 #  define pic32mx_getreg(addr)      getreg16(addr)
 #  define pic32mx_putreg(val,addr)  putreg16(val,addr)
-#  define regdbg(x...)
-#  define regvdbg(x...)
+#  define regerr(x...)
+#  define regwarn(x...)
+#  define reginfo(x...)
 
 #endif
 
@@ -309,17 +298,15 @@
 
 #ifdef CONFIG_PIC32MX_USBDEV_BDTDEBUG
 
-#  define bdtdbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define bdtvdbg lldbg
-#  else
-#    define bdtvdbg(x...)
-#  endif
+#  define bdterr  _err
+#  define bdtwarn _warn
+#  define bdtinfo _info
 
 #else
 
-#  define bdtdbg(x...)
-#  define bdtvdbg(x...)
+#  define bdterr(x...)
+#  define bdtwarn(x...)
+#  define bdtinfo(x...)
 
 #endif
 
@@ -505,7 +492,7 @@ static void   pic32mx_ep0outcomplete(struct pic32mx_usbdev_s *priv);
 static void   pic32mx_ep0incomplete(struct pic32mx_usbdev_s *priv);
 static void   pic32mx_ep0transfer(struct pic32mx_usbdev_s *priv,
                 uint16_t ustat);
-static int    pic32mx_interrupt(int irq, void *context);
+static int    pic32mx_interrupt(int irq, void *context, FAR void *arg);
 
 /* Endpoint helpers *********************************************************/
 
@@ -602,16 +589,13 @@ static volatile struct usbotg_bdtentry_s g_bdt[4*PIC32MX_NENDPOINTS]
   __attribute__ ((aligned(512)));
 
 /****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Private Functions
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
  * Register Operations
  ****************************************************************************/
+
 /****************************************************************************
  * Name: pic32mx_getreg
  ****************************************************************************/
@@ -637,8 +621,9 @@ static uint16_t pic32mx_getreg(uint32_t addr)
         {
            if (count == 4)
              {
-               lldbg("...\n");
+               reginfo("...\n");
              }
+
           return val;
         }
     }
@@ -653,7 +638,7 @@ static uint16_t pic32mx_getreg(uint32_t addr)
          {
            /* Yes.. then show how many times the value repeated */
 
-           lldbg("[repeats %d more times]\n", count-3);
+           reginfo("[repeats %d more times]\n", count-3);
          }
 
        /* Save the new address, value, and count */
@@ -665,7 +650,7 @@ static uint16_t pic32mx_getreg(uint32_t addr)
 
   /* Show the register value read */
 
-  lldbg("%08x->%04x\n", addr, val);
+  reginfo("%08x->%04x\n", addr, val);
   return val;
 }
 #endif
@@ -679,7 +664,7 @@ static void pic32mx_putreg(uint16_t val, uint32_t addr)
 {
   /* Show the register value being written */
 
-  lldbg("%08x<-%04x\n", addr, val);
+  reginfo("%08x<-%04x\n", addr, val);
 
   /* Write the value */
 
@@ -874,8 +859,8 @@ static void pic32mx_epwrite(struct pic32mx_ep_s *privep,
 
   /* And, finally, give the BDT to the USB */
 
-  bdtdbg("EP%d BDT IN [%p] {%08x, %08x}\n",
-         USB_EPNO(privep->ep.eplog), bdt, status, bdt->addr);
+  bdtinfo("EP%d BDT IN [%p] {%08x, %08x}\n",
+          USB_EPNO(privep->ep.eplog), bdt, status, bdt->addr);
 
   bdt->status = status;
 }
@@ -908,15 +893,15 @@ static void pic32mx_wrcomplete(struct pic32mx_usbdev_s *priv,
   epno   = USB_EPNO(privep->ep.eplog);
 
 #ifdef CONFIG_USBDEV_NOWRITEAHEAD
-  ullvdbg("EP%d: len=%d xfrd=%d inflight=%d\n",
-          epno, privreq->req.len, privreq->req.xfrd, privreq->inflight[0]);
+  uinfo("EP%d: len=%d xfrd=%d inflight=%d\n",
+        epno, privreq->req.len, privreq->req.xfrd, privreq->inflight[0]);
 #else
-  ullvdbg("EP%d: len=%d xfrd=%d inflight={%d, %d}\n",
-          epno, privreq->req.len, privreq->req.xfrd,
-          privreq->inflight[0], privreq->inflight[1]);
+  uinfo("EP%d: len=%d xfrd=%d inflight={%d, %d}\n",
+        epno, privreq->req.len, privreq->req.xfrd,
+        privreq->inflight[0], privreq->inflight[1]);
 #endif
-  bdtdbg("EP%d BDT IN [%p] {%08x, %08x}\n",
-         epno, bdtin, bdtin->status, bdtin->addr);
+  bdtinfo("EP%d BDT IN [%p] {%08x, %08x}\n",
+        epno, bdtin, bdtin->status, bdtin->addr);
 
   /* We should own the BDT that just completed. But NULLify the entire BDT IN.
    * Why?  So that we can tell later that the BDT available.  No, it is not
@@ -1224,8 +1209,8 @@ static int pic32mx_wrstart(struct pic32mx_usbdev_s *priv,
       bytesleft = privreq->req.len;
     }
 
-  ullvdbg("epno=%d req=%p: len=%d xfrd=%d index=%d nullpkt=%d\n",
-          epno, privreq, privreq->req.len, xfrd, index, privep->txnullpkt);
+  uinfo("epno=%d req=%p: len=%d xfrd=%d index=%d nullpkt=%d\n",
+        epno, privreq, privreq->req.len, xfrd, index, privep->txnullpkt);
 
   /* Get the number of bytes left to be sent in the packet */
 
@@ -1338,10 +1323,10 @@ static int pic32mx_rdcomplete(struct pic32mx_usbdev_s *priv,
   bdtout = privep->bdtout;
   epno   = USB_EPNO(privep->ep.eplog);
 
-  ullvdbg("EP%d: len=%d xfrd=%d\n",
-          epno, privreq->req.len, privreq->req.xfrd);
-  bdtdbg("EP%d BDT OUT [%p] {%08x, %08x}\n",
-         epno, bdtout, bdtout->status, bdtout->addr);
+  uinfo("EP%d: len=%d xfrd=%d\n",
+        epno, privreq->req.len, privreq->req.xfrd);
+  bdtinfo("EP%d BDT OUT [%p] {%08x, %08x}\n",
+        epno, bdtout, bdtout->status, bdtout->addr);
 
   /* We should own the BDT that just completed */
 
@@ -1484,7 +1469,8 @@ static int pic32mx_ep0rdsetup(struct pic32mx_usbdev_s *priv, uint8_t *dest,
 
   /* Then give the BDT to the USB */
 
-  bdtdbg("EP0 BDT OUT [%p] {%08x, %08x}\n", bdtout, status, bdtout->addr);
+  bdtinfo("EP0 BDT OUT [%p] {%08x, %08x}\n",
+          bdtout, status, bdtout->addr);
   bdtout->status = status;
 
   priv->ctrlstate = CTRLSTATE_RDREQUEST;
@@ -1585,7 +1571,8 @@ static int pic32mx_rdsetup(struct pic32mx_ep_s *privep, uint8_t *dest, int readl
 
   /* Then give the BDT to the USB */
 
-  bdtdbg("EP%d BDT OUT [%p] {%08x, %08x}\n",  epno, bdtout, status, bdtout->addr);
+  bdtinfo("EP%d BDT OUT [%p] {%08x, %08x}\n",
+          epno, bdtout, status, bdtout->addr);
 
   bdtout->status = status;
   return OK;
@@ -1626,7 +1613,7 @@ static int pic32mx_rdrequest(struct pic32mx_usbdev_s *priv,
       return OK;
     }
 
-  ullvdbg("EP%d: len=%d\n", USB_EPNO(privep->ep.eplog), privreq->req.len);
+  uinfo("EP%d: len=%d\n", USB_EPNO(privep->ep.eplog), privreq->req.len);
 
   /* Ignore any attempt to receive a zero length packet */
 
@@ -1915,8 +1902,8 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv)
   index.w = GETUINT16(priv->ctrl.index);
   len.w   = GETUINT16(priv->ctrl.len);
 
-  ullvdbg("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
-          priv->ctrl.type, priv->ctrl.req, value.w, index.w, len.w);
+  uinfo("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+        priv->ctrl.type, priv->ctrl.req, value.w, index.w, len.w);
 
   /* Dispatch any non-standard requests */
 
@@ -2159,7 +2146,7 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv)
               {
                 /* Special case recipient=device test mode */
 
-                ullvdbg("test mode: %d\n", index.w);
+                uinfo("test mode: %d\n", index.w);
               }
             else
               {
@@ -2596,7 +2583,8 @@ static void pic32mx_ep0transfer(struct pic32mx_usbdev_s *priv, uint16_t ustat)
       bdt   = &g_bdt[index];
       priv->eplist[0].bdtout = bdt;
 
-      bdtdbg("EP0 BDT OUT [%p] {%08x, %08x}\n", bdt, bdt->status, bdt->addr);
+      bdtinfo("EP0 BDT OUT [%p] {%08x, %08x}\n",
+              bdt, bdt->status, bdt->addr);
 
       /* Check the current EP0 OUT buffer contains a SETUP packet */
 
@@ -2655,7 +2643,7 @@ static void pic32mx_ep0transfer(struct pic32mx_usbdev_s *priv, uint16_t ustat)
  * Name: pic32mx_interrupt
  ****************************************************************************/
 
-static int pic32mx_interrupt(int irq, void *context)
+static int pic32mx_interrupt(int irq, void *context, FAR void *arg)
 {
   /* For now there is only one USB controller, but we will always refer to
    * it using a pointer to make any future ports to multiple USB controllers
@@ -2832,7 +2820,7 @@ static int pic32mx_interrupt(int irq, void *context)
   if ((usbir & USB_INT_UERR) != 0)
     {
       usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_UERR), usbir);
-      ulldbg("Error: EIR=%04x\n", pic32mx_getreg(PIC32MX_USB_EIR));
+      uerr("ERROR: EIR=%04x\n", pic32mx_getreg(PIC32MX_USB_EIR));
 
       /* Clear all pending USB error interrupts */
 
@@ -3148,11 +3136,11 @@ static int pic32mx_epconfigure(struct usbdev_ep_s *ep,
   bool     bidi;
   int      index;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !desc)
     {
       usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
-      ulldbg("ERROR: ep=%p desc=%p\n");
+      uerr("ERROR: ep=%p desc=%p\n");
       return -EINVAL;
     }
 #endif
@@ -3210,7 +3198,8 @@ static int pic32mx_epconfigure(struct usbdev_ep_s *ep,
       bdt->status = 0;
       bdt->addr   = 0;
 
-      bdtdbg("EP%d BDT IN [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
+      bdtinfo("EP%d BDT IN [%p] {%08x, %08x}\n",
+              epno, bdt, bdt->status, bdt->addr);
 
       /* Now do the same for the other buffer. */
 
@@ -3218,7 +3207,8 @@ static int pic32mx_epconfigure(struct usbdev_ep_s *ep,
       bdt->status = 0;
       bdt->addr   = 0;
 
-      bdtdbg("EP%d BDT IN [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
+      bdtinfo("EP%d BDT IN [%p] {%08x, %08x}\n",
+              epno, bdt, bdt->status, bdt->addr);
     }
 
   if (!epin || bidi)
@@ -3232,7 +3222,8 @@ static int pic32mx_epconfigure(struct usbdev_ep_s *ep,
       bdt->status = 0;
       bdt->addr   = 0;
 
-      bdtdbg("EP%d BDT OUT [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
+      bdtinfo("EP%d BDT OUT [%p] {%08x, %08x}\n",
+              epno, bdt, bdt->status, bdt->addr);
 
       /* Now do the same for the other buffer. */
 
@@ -3240,7 +3231,8 @@ static int pic32mx_epconfigure(struct usbdev_ep_s *ep,
       bdt->status = 0;
       bdt->addr   = 0;
 
-      bdtdbg("EP%d BDT OUT [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
+      bdtinfo("EP%d BDT OUT [%p] {%08x, %08x}\n",
+              epno, bdt, bdt->status, bdt->addr);
     }
 
   /* Get the maxpacket size of the endpoint. */
@@ -3275,11 +3267,11 @@ static int pic32mx_epdisable(struct usbdev_ep_s *ep)
   int i;
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
-      ulldbg("ERROR: ep=%p\n", ep);
+      uerr("ERROR: ep=%p\n", ep);
       return -EINVAL;
     }
 #endif
@@ -3319,7 +3311,7 @@ static struct usbdev_req_s *pic32mx_epallocreq(struct usbdev_ep_s *ep)
 {
   struct pic32mx_req_s *privreq;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
@@ -3347,7 +3339,7 @@ static void pic32mx_epfreereq(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
 {
   struct pic32mx_req_s *privreq = (struct pic32mx_req_s *)req;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
@@ -3372,11 +3364,12 @@ static int pic32mx_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
   uint8_t epno;
   int ret = OK;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!req || !req->callback || !req->buf || !ep)
     {
       usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
-      ulldbg("ERROR: req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+      uerr("ERROR: req=%p callback=%p buf=%p ep=%p\n",
+           req, req->callback, req->buf, ep);
       return -EINVAL;
     }
 #endif
@@ -3384,11 +3377,11 @@ static int pic32mx_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
   usbtrace(TRACE_EPSUBMIT, USB_EPNO(ep->eplog));
   priv = privep->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv->driver)
     {
       usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_NOTCONFIGURED), priv->usbdev.speed);
-      ulldbg("ERROR: driver=%p\n", priv->driver);
+      uerr("ERROR: driver=%p\n", priv->driver);
       return -ESHUTDOWN;
     }
 #endif
@@ -3459,7 +3452,7 @@ static int pic32mx_epcancel(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
   struct pic32mx_ep_s *privep = (struct pic32mx_ep_s *)ep;
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !req)
     {
       usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
@@ -3575,10 +3568,10 @@ static int pic32mx_epbdtstall(struct usbdev_ep_s *ep, bool resume, bool epin)
           bdt->addr          = (uint8_t *)physaddr;
           bdt->status        = (USB_BDT_UOWN | bytecount);
 
-          bdtdbg("EP0 BDT IN [%p] {%08x, %08x}\n",
-                 bdt, bdt->status, bdt->addr);
-          bdtdbg("EP0 BDT IN [%p] {%08x, %08x}\n",
-                 otherbdt, otherbdt->status, otherbdt->addr);
+          bdtinfo("EP0 BDT IN [%p] {%08x, %08x}\n",
+                  bdt, bdt->status, bdt->addr);
+          bdtinfo("EP0 BDT IN [%p] {%08x, %08x}\n",
+                  otherbdt, otherbdt->status, otherbdt->addr);
         }
       else
         {
@@ -3592,10 +3585,11 @@ static int pic32mx_epbdtstall(struct usbdev_ep_s *ep, bool resume, bool epin)
           bdt->addr        = 0;
           bdt->status      = 0;
 
-          bdtdbg("EP%d BDT %s [%p] {%08x, %08x}\n",
-                 epno, epin ? "IN" : "OUT", bdt, bdt->status, bdt->addr);
-          bdtdbg("EP%d BDT %s [%p] {%08x, %08x}\n",
-                 epno, epin ? "IN" : "OUT", otherbdt, otherbdt->status, otherbdt->addr);
+          bdtinfo("EP%d BDT %s [%p] {%08x, %08x}\n",
+                  epno, epin ? "IN" : "OUT", bdt, bdt->status, bdt->addr);
+          bdtinfo("EP%d BDT %s [%p] {%08x, %08x}\n",
+                  epno, epin ? "IN" : "OUT", otherbdt, otherbdt->status,
+                  otherbdt->addr);
 
           /* Restart any queued requests (after a delay so that we can be assured
            * that the hardware has recovered from the stall -- I don't know of any
@@ -3627,10 +3621,11 @@ static int pic32mx_epbdtstall(struct usbdev_ep_s *ep, bool resume, bool epin)
 
       pic32mx_rqstop(privep);
 
-      bdtdbg("EP%d BDT %s [%p] {%08x, %08x}\n",
-             epno, epin ? "IN" : "OUT", bdt, bdt->status, bdt->addr);
-      bdtdbg("EP%d BDT %s [%p] {%08x, %08x}\n",
-             epno, epin ? "IN" : "OUT", otherbdt, otherbdt->status, otherbdt->addr);
+      bdtinfo("EP%d BDT %s [%p] {%08x, %08x}\n",
+              epno, epin ? "IN" : "OUT", bdt, bdt->status, bdt->addr);
+      bdtinfo("EP%d BDT %s [%p] {%08x, %08x}\n",
+              epno, epin ? "IN" : "OUT", otherbdt, otherbdt->status,
+              otherbdt->addr);
     }
 
   return OK;
@@ -3646,7 +3641,7 @@ static int pic32mx_epstall(struct usbdev_ep_s *ep, bool resume)
   irqstate_t flags;
   int ret;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep)
     {
       usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
@@ -3707,7 +3702,7 @@ static struct usbdev_ep_s *pic32mx_allocep(struct usbdev_s *dev, uint8_t epno,
   uint16_t epset = PIC32MX_ENDP_ALLSET;
 
   usbtrace(TRACE_DEVALLOCEP, (uint16_t)epno);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
@@ -3765,7 +3760,7 @@ static void pic32mx_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep)
   struct pic32mx_usbdev_s *priv;
   struct pic32mx_ep_s *privep;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev || !ep)
     {
       usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
@@ -3797,7 +3792,7 @@ static int pic32mx_getframe(struct usbdev_s *dev)
   uint16_t frmh;
   uint16_t tmp;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
@@ -3838,7 +3833,7 @@ static int pic32mx_wakeup(struct usbdev_s *dev)
   struct pic32mx_usbdev_s *priv = (struct pic32mx_usbdev_s *)dev;
 
   usbtrace(TRACE_DEVWAKEUP, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
@@ -3862,7 +3857,7 @@ static int pic32mx_selfpowered(struct usbdev_s *dev, bool selfpowered)
 
   usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev)
     {
       usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
@@ -4302,7 +4297,7 @@ void up_usbinitialize(void)
    * them when we need them later.
    */
 
-  if (irq_attach(PIC32MX_IRQ_USB, pic32mx_interrupt) != 0)
+  if (irq_attach(PIC32MX_IRQ_USB, pic32mx_interrupt, NULL) != 0)
     {
       usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_IRQREGISTRATION),
                (uint16_t)PIC32MX_IRQ_USB);
@@ -4373,7 +4368,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
 
   usbtrace(TRACE_DEVREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !driver->ops->bind || !driver->ops->unbind ||
       !driver->ops->disconnect || !driver->ops->setup)
     {
@@ -4439,7 +4434,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
 
   usbtrace(TRACE_DEVUNREGISTER, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (driver != priv->driver)
     {
       usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/mips/src/pic32mx/pic32mx.h b/arch/mips/src/pic32mx/pic32mx.h
index d636293703b17b93bd5526a26d7e65b79287e812..a2de82ed5aacb5546cabf2039b782299d4b69d11 100644
--- a/arch/mips/src/pic32mx/pic32mx.h
+++ b/arch/mips/src/pic32mx/pic32mx.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * arch/mips/src/pic32mx/pic32mx.h
  *
- *   Copyright (C) 2011-2012, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -324,22 +324,23 @@ void pic32mx_gpioirqinitialize(void);
  *   case, all attached handlers will be called.  Each handler must maintain state
  *   and determine if the underlying GPIO input value changed.
  *
- * Parameters:
- *  - pinset:  GPIO pin configuration
- *  - cn:      The change notification number associated with the pin
- *  - handler: Interrupt handler (may be NULL to detach)
+ * Input Parameters:
+ *   pinset  - GPIO pin configuration
+ *   cn      - The change notification number associated with the pin.
+ *   handler - Interrupt handler (may be NULL to detach)
+ *   arg     - The argument that accompanies the interrupt
  *
- * Returns:
- *  The previous value of the interrupt handler function pointer.  This value may,
- *  for example, be used to restore the previous handler when multiple handlers are
- *  used.
+ * Returned Value:
+ *   Zero (OK) is returned on success.  A negated error value is returned on
+ *   any failure to indicate the nature of the failure.
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 #ifdef CONFIG_PIC32MX_GPIOIRQ
-xcpt_t pic32mx_gpioattach(uint32_t pinset, unsigned int cn, xcpt_t handler);
+int pic32mx_gpioattach(uint32_t pinset, unsigned int cn, xcpt_t handler,
+                       void *arg);
 #else
-#  define pic32mx_gpioattach(p,f) (NULL)
+#  define pic32mx_gpioattach(p,c,h,a) (0)
 #endif
 
 /************************************************************************************
@@ -378,7 +379,7 @@ void pic32mx_gpioirqdisable(unsigned int cn);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 void pic32mx_dumpgpio(uint32_t pinset, const char *msg);
 #else
 #  define pic32mx_dumpgpio(p,m)
diff --git a/arch/mips/src/pic32mz/Kconfig b/arch/mips/src/pic32mz/Kconfig
index ac412b6dc5262c644bb0d48884c948150cc1b0a9..0ea6cfeae4d58c6ec1246dcf2226be90615355ca 100644
--- a/arch/mips/src/pic32mz/Kconfig
+++ b/arch/mips/src/pic32mz/Kconfig
@@ -265,7 +265,7 @@ config PIC32MZ_CTMU
 	bool "Charge Time Measurement Unit (CMTU)"
 	default n
 
-endmenu # PIC32MX Peripheral Support
+endmenu # PIC32MZ Peripheral Support
 
 menuconfig PIC32MZ_GPIOIRQ
 	bool "GPIO Interrupt Support"
@@ -332,11 +332,11 @@ config PIC32MZ_SPI_ENHBUF
 
 config PIC32MZ_SPI_REGDEBUG
 	bool "SPI Register level debug"
-	depends on DEBUG
+	depends on DEBUG_INFO
 	default n
 	---help---
 		Output detailed register-level SPI device debug information.
-		Requires also DEBUG.
+		Requires also CONFIG_DEBUG_FEATURES.
 
 endmenu # SPI Driver Configuration
 
@@ -397,13 +397,6 @@ config NET_WOL
 	---help---
 		Enable Wake-up on LAN (not fully implemented).
 
-config NET_REGDEBUG
-	bool "Register level debug"
-	default n
-	depends on PIC32MZ_ETHERNET && DEBUG
-	---help---
-		Enabled low level register debug.  Also needs DEBUG.
-
 config NET_HASH
 	bool "Hash"
 	default n
@@ -419,14 +412,41 @@ config PIC32MZ_MULTICAST
 		Enable receipt of multicast (and unicast) frames. Automatically set if
 		NET_IGMP is selected.
 
+choice
+	prompt "Work queue"
+	default PIC32MZ_ETHERNET_LPWORK if SCHED_LPWORK
+	default PIC32MZ_ETHERNET_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the Ethernet driver.  If the
+		low priority work queue is available, then it should be used by the
+		driver.
+
+config PIC32MZ_ETHERNET_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
+
+config PIC32MZ_ETHERNET_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
+
+endchoice # Work queue
+
+config NET_REGDEBUG
+	bool "Register level debug"
+	default n
+	depends on PIC32MZ_ETHERNET && DEBUG_NET_INFO
+	---help---
+		Enabled low level register debug.  Also needs CONFIG_DEBUG_FEATURES.
+
 endmenu # PIC32MZ PHY/Ethernet device driver settings
 
 menu "Device Configuration 0 (DEVCFG0)"
 
 config PIC32MZ_DEBUGGER_ENABLE
 	bool "Background debugger enable"
-	default y if DEBUG
-	default n if !DEBUG
+	default y if DEBUG_FEATURES
+	default n if !DEBUG_FEATURES
 	---help---
 		Background Debugger Enable
 
@@ -444,8 +464,8 @@ config PIC32MZ_ICESEL_CH2
 
 config PIC32MZ_TRACE_ENABLE
 	bool "Trace enable"
-	default y if DEBUG
-	default n if !DEBUG
+	default y if DEBUG_FEATURES
+	default n if !DEBUG_FEATURES
 	---help---
 		Trace Enable
 
diff --git a/arch/mips/src/pic32mz/pic32mz-dma.h b/arch/mips/src/pic32mz/pic32mz-dma.h
index 99cc6c47c53846f7efbe94bb001a7e22354f1b18..3bea2172eeec40f1e3f813eb4f1c47a13d3bdc74 100644
--- a/arch/mips/src/pic32mz/pic32mz-dma.h
+++ b/arch/mips/src/pic32mz/pic32mz-dma.h
@@ -224,5 +224,10 @@ void pic32mx_dmadump(DMA_HANDLE handle, const struct pic32mx_dmaregs_s *regs,
 #endif
 #endif
 
+#if defined(__cplusplus)
+}
+#endif
+#undef EXTERN
+
 #endif /* __ASSEMBLY__ */
 #endif /* __ARCH_MIPS_SRC_PIC32MZ_PIC32MZ_DMA_H */
diff --git a/arch/mips/src/pic32mz/pic32mz-ethernet.c b/arch/mips/src/pic32mz/pic32mz-ethernet.c
index 7d531efde9fdaaafd855e9a50a348c0b86824a89..f49da8530dd85076a79b4f7dbcda2976506c24df 100644
--- a/arch/mips/src/pic32mz/pic32mz-ethernet.c
+++ b/arch/mips/src/pic32mz/pic32mz-ethernet.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/arm/src/pic32mz/pic32mz_ethernet.c
+ * arch/mips/src/pic32mz/pic32mz_ethernet.c
  *
- *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * This driver derives from the PIC32MZ Ethernet Driver
@@ -55,6 +55,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -81,6 +82,25 @@
  * Pre-processor Definitions
  ****************************************************************************/
 /* Configuration ************************************************************/
+/* If processing is not done at the interrupt level, then work queue support
+ * is required.
+ */
+
+#if !defined(CONFIG_SCHED_WORKQUEUE)
+#  error Work queue support is required in this configuration (CONFIG_SCHED_WORKQUEUE)
+#else
+
+  /* Use the low priority work queue if possible */
+
+#  if defined(CONFIG_PIC32MZ_ETHERNET_HPWORK)
+#    define ETHWORK HPWORK
+#  elif defined(CONFIG_PIC32MZ_ETHERNET_LPWORK)
+#    define ETHWORK LPWORK
+#  else
+#    error Neither CONFIG_PIC32MZ_ETHERNET_HPWORK nor CONFIG_PIC32MZ_ETHERNET_LPWORK defined
+#  endif
+#endif
+
 /* CONFIG_PIC32MZ_NINTERFACES determines the number of physical interfaces
  * that will be supported -- unless it is more than actually supported by the
  * hardware!
@@ -102,12 +122,6 @@
 #  define CONFIG_PIC32MZ_NINTERFACES 1
 #endif
 
-/* CONFIG_NET_MULTIBUFFER is required */
-
-#ifndef CONFIG_NET_MULTIBUFFER
-#  error "CONFIG_NET_MULTIBUFFER=y is required"
-#endif
-
 /* If IGMP is enabled, then accept multi-cast frames. */
 
 #if defined(CONFIG_NET_IGMP) && !defined(CONFIG_PIC32MZ_MULTICAST)
@@ -141,11 +155,11 @@
 #define PIC32MZ_NBUFFERS (CONFIG_NET_NRXDESC + CONFIG_NET_NTXDESC + 1)
 
 /* Debug Configuration *****************************************************/
-/* Register/Descriptor debug -- can only happen of CONFIG_DEBUG is selected.
+/* Register/Descriptor debug -- can only happen of CONFIG_DEBUG_FEATURES is selected.
  * This will probably generate much more output than you care to see.
  */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
 #  undef CONFIG_NET_REGDEBUG
 #  undef CONFIG_NET_DESCDEBUG
 #endif
@@ -154,7 +168,7 @@
  * console.
  */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
 #  undef  CONFIG_NET_DUMPPACKET
 #endif
 
@@ -334,6 +348,8 @@ struct pic32mz_driver_s
   uint32_t   pd_inten;          /* Shadow copy of INTEN register */
   WDOG_ID    pd_txpoll;         /* TX poll timer */
   WDOG_ID    pd_txtimeout;      /* TX timeout timer */
+  struct work_s pd_irqwork;     /* For deferring interrupt work to the work queue */
+  struct work_s pd_pollwork;    /* For deferring poll work to the work queue */
 
   sq_queue_t pd_freebuffers;    /* The free buffer list */
 
@@ -405,18 +421,26 @@ static void pic32mz_timerpoll(struct pic32mz_driver_s *priv);
 static void pic32mz_response(struct pic32mz_driver_s *priv);
 static void pic32mz_rxdone(struct pic32mz_driver_s *priv);
 static void pic32mz_txdone(struct pic32mz_driver_s *priv);
-static int  pic32mz_interrupt(int irq, void *context);
+
+static void pic32mz_interrupt_work(void *arg);
+static int  pic32mz_interrupt(int irq, void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
-static void pic32mz_polltimer(int argc, uint32_t arg, ...);
-static void pic32mz_txtimeout(int argc, uint32_t arg, ...);
+static void pic32mz_txtimeout_work(void *arg);
+static void pic32mz_txtimeout_expiry(int argc, uint32_t arg, ...);
+
+static void pic32mz_poll_work(void *arg);
+static void pic32mz_poll_expiry(int argc, uint32_t arg, ...);
 
 /* NuttX callback functions */
 
 static int pic32mz_ifup(struct net_driver_s *dev);
 static int pic32mz_ifdown(struct net_driver_s *dev);
+
+static void pic32mz_txavail_work(void *arg);
 static int pic32mz_txavail(struct net_driver_s *dev);
+
 #ifdef CONFIG_NET_IGMP
 static int pic32mz_addmac(struct net_driver_s *dev, const uint8_t *mac);
 static int pic32mz_rmmac(struct net_driver_s *dev, const uint8_t *mac);
@@ -465,7 +489,7 @@ static void pic32mz_ethreset(struct pic32mz_driver_s *priv);
 #ifdef CONFIG_NET_REGDEBUG
 static void pic32mz_printreg(uint32_t addr, uint32_t val, bool iswrite)
 {
-  lldbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
+  ninfo("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
 }
 #endif
 
@@ -515,7 +539,7 @@ static void pic32mz_checkreg(uint32_t addr, uint32_t val, bool iswrite)
             {
               /* No.. More than one. */
 
-              lldbg("[repeats %d more times]\n", count);
+              ninfo("[repeats %d more times]\n", count);
             }
         }
 
@@ -594,12 +618,12 @@ static void pic32mz_putreg(uint32_t val, uint32_t addr)
 #ifdef CONFIG_NET_DESCDEBUG
 static void pic32mz_dumptxdesc(struct pic32mz_txdesc_s *txdesc, const char *msg)
 {
-  lldbg("TX Descriptor [%p]: %s\n", txdesc, msg);
-  lldbg("   status: %08x\n", txdesc->status);
-  lldbg("  address: %08x [%08x]\n", txdesc->address, VIRT_ADDR(txdesc->address));
-  lldbg("     tsv1: %08x\n", txdesc->tsv1);
-  lldbg("     tsv2: %08x\n", txdesc->tsv2);
-  lldbg("   nexted: %08x [%08x]\n", txdesc->nexted, VIRT_ADDR(txdesc->nexted));
+  ninfo("TX Descriptor [%p]: %s\n", txdesc, msg);
+  ninfo("   status: %08x\n", txdesc->status);
+  ninfo("  address: %08x [%08x]\n", txdesc->address, VIRT_ADDR(txdesc->address));
+  ninfo("     tsv1: %08x\n", txdesc->tsv1);
+  ninfo("     tsv2: %08x\n", txdesc->tsv2);
+  ninfo("   nexted: %08x [%08x]\n", txdesc->nexted, VIRT_ADDR(txdesc->nexted));
 }
 #endif
 
@@ -621,12 +645,12 @@ static void pic32mz_dumptxdesc(struct pic32mz_txdesc_s *txdesc, const char *msg)
 #ifdef CONFIG_NET_DESCDEBUG
 static void pic32mz_dumprxdesc(struct pic32mz_rxdesc_s *rxdesc, const char *msg)
 {
-  lldbg("RX Descriptor [%p]: %s\n", rxdesc, msg);
-  lldbg("   status: %08x\n", rxdesc->status);
-  lldbg("  address: %08x [%08x]\n", rxdesc->address, VIRT_ADDR(rxdesc->address));
-  lldbg("     rsv1: %08x\n", rxdesc->rsv1);
-  lldbg("     rsv2: %08x\n", rxdesc->rsv2);
-  lldbg("   nexted: %08x [%08x]\n", rxdesc->nexted, VIRT_ADDR(rxdesc->nexted));
+  ninfo("RX Descriptor [%p]: %s\n", rxdesc, msg);
+  ninfo("   status: %08x\n", rxdesc->status);
+  ninfo("  address: %08x [%08x]\n", rxdesc->address, VIRT_ADDR(rxdesc->address));
+  ninfo("     rsv1: %08x\n", rxdesc->rsv1);
+  ninfo("     rsv2: %08x\n", rxdesc->rsv2);
+  ninfo("   nexted: %08x [%08x]\n", rxdesc->nexted, VIRT_ADDR(rxdesc->nexted));
 }
 #endif
 
@@ -1088,7 +1112,7 @@ static int pic32mz_transmit(struct pic32mz_driver_s *priv)
 
   /* Setup the TX timeout watchdog (perhaps restarting the timer) */
 
-  (void)wd_start(priv->pd_txtimeout, PIC32MZ_TXTIMEOUT, pic32mz_txtimeout,
+  (void)wd_start(priv->pd_txtimeout, PIC32MZ_TXTIMEOUT, pic32mz_txtimeout_expiry,
                  1, (uint32_t)priv);
 
   return OK;
@@ -1384,7 +1408,8 @@ static void pic32mz_rxdone(struct pic32mz_driver_s *priv)
 
       if ((rxdesc->rsv2 & RXDESC_RSV2_OK) == 0)
         {
-          nlldbg("ERROR. rsv1: %08x rsv2: %08x\n", rxdesc->rsv1, rxdesc->rsv2);
+          nwarn("WARNING. rsv1: %08x rsv2: %08x\n",
+                rxdesc->rsv1, rxdesc->rsv2);
           NETDEV_RXERRORS(&priv->pd_dev);
           pic32mz_rxreturn(rxdesc);
         }
@@ -1397,7 +1422,8 @@ static void pic32mz_rxdone(struct pic32mz_driver_s *priv)
 
       else if (priv->pd_dev.d_len > CONFIG_NET_ETH_MTU)
         {
-          nlldbg("Too big. packet length: %d rxdesc: %08x\n", priv->pd_dev.d_len, rxdesc->status);
+          nwarn("WARNING: Too big. packet length: %d rxdesc: %08x\n",
+                priv->pd_dev.d_len, rxdesc->status);
           NETDEV_RXERRORS(&priv->pd_dev);
           pic32mz_rxreturn(rxdesc);
         }
@@ -1407,7 +1433,8 @@ static void pic32mz_rxdone(struct pic32mz_driver_s *priv)
       else if ((rxdesc->status & (RXDESC_STATUS_EOP | RXDESC_STATUS_SOP)) !=
                (RXDESC_STATUS_EOP | RXDESC_STATUS_SOP))
         {
-          nlldbg("Fragment. packet length: %d rxdesc: %08x\n", priv->pd_dev.d_len, rxdesc->status);
+          nwarn("WARNING: Fragment. packet length: %d rxdesc: %08x\n",
+                priv->pd_dev.d_len, rxdesc->status);
           NETDEV_RXFRAGMENTS(&priv->pd_dev);
           pic32mz_rxreturn(rxdesc);
         }
@@ -1445,7 +1472,7 @@ static void pic32mz_rxdone(struct pic32mz_driver_s *priv)
 #ifdef CONFIG_NET_IPv4
           if (BUF->type == HTONS(ETHTYPE_IP))
             {
-              nllvdbg("IPv4 frame\n");
+              ninfo("IPv4 frame\n");
               NETDEV_RXIPV4(&priv->pd_dev);
 
               /* Handle ARP on input then give the IPv4 packet to the network
@@ -1487,7 +1514,7 @@ static void pic32mz_rxdone(struct pic32mz_driver_s *priv)
 #ifdef CONFIG_NET_IPv6
           if (BUF->type == HTONS(ETHTYPE_IP6))
             {
-              nllvdbg("Iv6 frame\n");
+              ninfo("Iv6 frame\n");
               NETDEV_RXIPV6(&priv->pd_dev);
 
               /* Give the IPv6 packet to the network layer */
@@ -1546,7 +1573,8 @@ static void pic32mz_rxdone(struct pic32mz_driver_s *priv)
             {
               /* Unrecognized... drop it. */
 
-              nlldbg("Unrecognized packet type dropped: %04x\n", ntohs(BUF->type));
+              nwarn("WARNING: Unrecognized packet type dropped: %04x\n",
+                    ntohs(BUF->type));
               NETDEV_RXDROPPED(&priv->pd_dev);
             }
 
@@ -1663,32 +1691,30 @@ static void pic32mz_txdone(struct pic32mz_driver_s *priv)
 }
 
 /****************************************************************************
- * Function: pic32mz_interrupt
+ * Function: pic32mz_interrupt_work
  *
  * Description:
- *   Hardware interrupt handler
+ *   Perform interrupt related work from the worker thread
  *
  * Parameters:
- *   irq     - Number of the IRQ that generated the interrupt
- *   context - Interrupt register state save info (architecture-specific)
+ *   arg - The argument passed when work_queue() was called.
  *
  * Returned Value:
  *   OK on success
  *
  * Assumptions:
+ *   The network is locked.
  *
  ****************************************************************************/
 
-static int pic32mz_interrupt(int irq, void *context)
+static void pic32mz_interrupt_work(void *arg)
 {
-  register struct pic32mz_driver_s *priv;
+  struct pic32mz_driver_s *priv = (struct pic32mz_driver_s *)arg;
   uint32_t status;
 
-#if CONFIG_PIC32MZ_NINTERFACES > 1
-# error "A mechanism to associate and interface with an IRQ is needed"
-#else
-  priv = &g_ethdrvr[0];
-#endif
+  /* Process pending Ethernet interrupts */
+
+  net_lock();
 
   /* Get the interrupt status (zero means no interrupts pending). */
 
@@ -1708,7 +1734,7 @@ static int pic32mz_interrupt(int irq, void *context)
 
       if ((status & ETH_INT_RXOVFLW) != 0)
         {
-          nlldbg("RX Overrun. status: %08x\n", status);
+          nerr("ERROR: RX Overrun. status: %08x\n", status);
           NETDEV_RXERRORS(&priv->pd_dev);
         }
 
@@ -1719,7 +1745,7 @@ static int pic32mz_interrupt(int irq, void *context)
 
       if ((status & ETH_INT_RXBUFNA) != 0)
         {
-          nlldbg("RX buffer descriptor overrun. status: %08x\n", status);
+          nerr("ERROR: RX buffer descriptor overrun. status: %08x\n", status);
           NETDEV_RXERRORS(&priv->pd_dev);
         }
 
@@ -1730,7 +1756,7 @@ static int pic32mz_interrupt(int irq, void *context)
 
       if ((status & ETH_INT_RXBUSE) != 0)
         {
-          nlldbg("RX BVCI bus error. status: %08x\n", status);
+          nerr("ERROR: RX BVCI bus error. status: %08x\n", status);
           NETDEV_RXERRORS(&priv->pd_dev);
         }
 
@@ -1773,7 +1799,7 @@ static int pic32mz_interrupt(int irq, void *context)
 
       if ((status & ETH_INT_TXABORT) != 0)
         {
-          nlldbg("TX abort. status: %08x\n", status);
+          nerr("ERROR: TX abort. status: %08x\n", status);
           NETDEV_TXERRORS(&priv->pd_dev);
         }
 
@@ -1784,7 +1810,7 @@ static int pic32mz_interrupt(int irq, void *context)
 
       if ((status & ETH_INT_TXBUSE) != 0)
         {
-          nlldbg("TX BVCI bus error. status: %08x\n", status);
+          nerr("ERROR: TX BVCI bus error. status: %08x\n", status);
           NETDEV_TXERRORS(&priv->pd_dev);
         }
 
@@ -1818,45 +1844,111 @@ static int pic32mz_interrupt(int irq, void *context)
        * (ETHCON1:0) bit to decrement the BUFCNT counter. Writing a 0 or a
        * 1 has no effect.
        */
-
     }
 
   /* Clear the pending interrupt */
 
-# if CONFIG_PIC32MZ_NINTERFACES > 1
+#if CONFIG_PIC32MZ_NINTERFACES > 1
   up_clrpend_irq(priv->pd_irqsrc);
-# else
+#else
   up_clrpend_irq(PIC32MZ_IRQ_ETH);
-# endif
+#endif
+  net_unlock();
+
+  /* Re-enable Ethernet interrupts */
+
+#if CONFIG_PIC32MZ_NINTERFACES > 1
+  up_enable_irq(priv->pd_irqsrc);
+#else
+  up_enable_irq(PIC32MZ_IRQ_ETH);
+#endif
+}
 
+/****************************************************************************
+ * Function: pic32mz_interrupt
+ *
+ * Description:
+ *   Hardware interrupt handler
+ *
+ * Parameters:
+ *   irq     - Number of the IRQ that generated the interrupt
+ *   context - Interrupt register state save info (architecture-specific)
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *
+ ****************************************************************************/
+
+static int pic32mz_interrupt(int irq, void *context, FAR void *arg)
+{
+  struct pic32mz_driver_s *priv;
+  uint32_t status;
+
+#if CONFIG_PIC32MZ_NINTERFACES > 1
+# error "A mechanism to associate an interface with an IRQ is needed"
+#else
+  priv = &g_ethdrvr[0];
+#endif
+
+  /* Disable further Ethernet interrupts.  Because Ethernet interrupts are
+   * also disabled if the TX timeout event occurs, there can be no race
+   * condition here.
+   */
+
+#if CONFIG_PIC32MZ_NINTERFACES > 1
+  up_disable_irq(priv->pd_irqsrc);
+#else
+  up_disable_irq(PIC32MZ_IRQ_ETH);
+#endif
+
+  /* Get the interrupt status (zero means no interrupts pending). */
+
+  status = pic32mz_getreg(PIC32MZ_ETH_IRQ);
+
+  /* Determine if a TX transfer just completed */
+
+  if ((status & ETH_INT_TXDONE) != 0)
+    {
+      /* If a TX transfer just completed, then cancel the TX timeout so
+       * there will be no race condition between any subsequent timeout
+       * expiration and the deferred interrupt processing.
+       */
+
+       wd_cancel(priv->pd_txtimeout);
+    }
+
+  /* Schedule to perform the interrupt processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->pd_irqwork, pic32mz_interrupt_work, priv, 0);
   return OK;
 }
 
 /****************************************************************************
- * Function: pic32mz_txtimeout
+ * Function: pic32mz_txtimeout_work
  *
  * Description:
- *   Our TX watchdog timed out.  Called from the timer interrupt handler.
- *   The last TX never completed.  Reset the hardware and start again.
+ *   Perform TX timeout related work from the worker thread
  *
  * Parameters:
- *   argc - The number of available arguments
- *   arg  - The first argument
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
- *   Global interrupts are disabled by the watchdog logic.
+ *   The network is locked.
  *
  ****************************************************************************/
 
-static void pic32mz_txtimeout(int argc, uint32_t arg, ...)
+static void pic32mz_txtimeout_work(void *arg)
 {
   struct pic32mz_driver_s *priv = (struct pic32mz_driver_s *)arg;
 
   /* Increment statistics and dump debug info */
 
+  net_lock();
   NETDEV_TXTIMEOUTS(&priv->pd_dev);
   if (priv->pd_ifup)
     {
@@ -1872,13 +1964,16 @@ static void pic32mz_txtimeout(int argc, uint32_t arg, ...)
 
       pic32mz_poll(priv);
     }
+
+  net_unlock();
 }
 
 /****************************************************************************
- * Function: pic32mz_polltimer
+ * Function: pic32mz_txtimeout_expiry
  *
  * Description:
- *   Periodic timer handler.  Called from the timer interrupt handler.
+ *   Our TX watchdog timed out.  Called from the timer interrupt handler.
+ *   The last TX never completed.  Reset the hardware and start again.
  *
  * Parameters:
  *   argc - The number of available arguments
@@ -1892,7 +1987,44 @@ static void pic32mz_txtimeout(int argc, uint32_t arg, ...)
  *
  ****************************************************************************/
 
-static void pic32mz_polltimer(int argc, uint32_t arg, ...)
+static void pic32mz_txtimeout_expiry(int argc, wdparm_t arg, ...)
+{
+  struct pic32mz_driver_s *priv = (struct pic32mz_driver_s *)arg;
+
+  /* Disable further Ethernet interrupts.  This will prevent some race
+   * conditions with interrupt work.  There is still a potential race
+   * condition with interrupt work that is already queued and in progress.
+   */
+
+#if CONFIG_PIC32MZ_NINTERFACES > 1
+  up_disable_irq(priv->pd_irqsrc);
+#else
+  up_disable_irq(PIC32MZ_IRQ_ETH);
+#endif
+
+  /* Schedule to perform the TX timeout processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->pd_irqwork, pic32mz_txtimeout_work, priv, 0);
+}
+
+/****************************************************************************
+ * Function: pic32mz_poll_work
+ *
+ * Description:
+ *   Perform periodic polling from the worker thread
+ *
+ * Parameters:
+ *   arg - The argument passed when work_queue() as called.
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *   The network is locked.
+ *
+ ****************************************************************************/
+
+static void pic32mz_poll_work(void *arg)
 {
   struct pic32mz_driver_s *priv = (struct pic32mz_driver_s *)arg;
 
@@ -1900,11 +2032,12 @@ static void pic32mz_polltimer(int argc, uint32_t arg, ...)
    * poll if we are unable to accept another packet for transmission.
    */
 
+  net_lock();
   if (pic32mz_txdesc(priv) != NULL)
     {
-      /* If so, update TCP timing states and poll the network for new XMIT data. Hmmm..
-       * might be bug here.  Does this mean if there is a transmit in progress,
-       * we will missing TCP time state updates?
+      /* If so, update TCP timing states and poll the network for new XMIT
+       * data. Hmmm.. might be bug here.  Does this mean if there is a
+       * transmit in progress, we will missing TCP time state updates?
        */
 
       pic32mz_timerpoll(priv);
@@ -1912,7 +2045,36 @@ static void pic32mz_polltimer(int argc, uint32_t arg, ...)
 
   /* Setup the watchdog poll timer again */
 
-  (void)wd_start(priv->pd_txpoll, PIC32MZ_WDDELAY, pic32mz_polltimer, 1, arg);
+  (void)wd_start(priv->pd_txpoll, PIC32MZ_WDDELAY, pic32mz_poll_expiry,
+                 1, priv);
+  net_unlock();
+}
+
+/****************************************************************************
+ * Function: pic32mz_poll_expiry
+ *
+ * Description:
+ *   Periodic timer handler.  Called from the timer interrupt handler.
+ *
+ * Parameters:
+ *   argc - The number of available arguments
+ *   arg  - The first argument
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Global interrupts are disabled by the watchdog logic.
+ *
+ ****************************************************************************/
+
+static void pic32mz_poll_expiry(int argc, wdparm_t arg, ...)
+{
+  struct pic32mz_driver_s *priv = (struct pic32mz_driver_s *)arg;
+
+  /* Schedule to perform the interrupt processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->pd_pollwork, pic32mz_poll_work, priv, 0);
 }
 
 /****************************************************************************
@@ -1938,9 +2100,9 @@ static int pic32mz_ifup(struct net_driver_s *dev)
   uint32_t regval;
   int ret;
 
-  ndbg("Bringing up: %d.%d.%d.%d\n",
-       dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-       (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 
   /* Reset the Ethernet controller (again) */
 
@@ -2028,7 +2190,7 @@ static int pic32mz_ifup(struct net_driver_s *dev)
   ret = pic32mz_phyinit(priv);
   if (ret != 0)
     {
-      ndbg("pic32mz_phyinit failed: %d\n", ret);
+      nerr("ERROR: pic32mz_phyinit failed: %d\n", ret);
       return ret;
     }
 
@@ -2105,11 +2267,10 @@ static int pic32mz_ifup(struct net_driver_s *dev)
   priv->pd_dev.d_mac.ether_addr_octet[0] = (uint32_t)(regval & 0xff);
   priv->pd_dev.d_mac.ether_addr_octet[1] = (uint32_t)((regval >> 8) & 0xff);
 
-  ndbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
-         dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
-         dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
-         dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
-
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
+        dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
+        dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
 #endif
 
   /* Continue Ethernet Controller Initialization ****************************/
@@ -2210,17 +2371,19 @@ static int pic32mz_ifup(struct net_driver_s *dev)
 
   /* Set and activate a timer process */
 
-  (void)wd_start(priv->pd_txpoll, PIC32MZ_WDDELAY, pic32mz_polltimer, 1,
+  (void)wd_start(priv->pd_txpoll, PIC32MZ_WDDELAY, pic32mz_poll_expiry, 1,
                 (uint32_t)priv);
 
   /* Finally, enable the Ethernet interrupt at the interrupt controller */
 
   priv->pd_ifup = true;
+
 #if CONFIG_PIC32MZ_NINTERFACES > 1
   up_enable_irq(priv->pd_irqsrc);
 #else
   up_enable_irq(PIC32MZ_IRQ_ETH);
 #endif
+
   return OK;
 }
 
@@ -2268,37 +2431,29 @@ static int pic32mz_ifdown(struct net_driver_s *dev)
 }
 
 /****************************************************************************
- * Function: pic32mz_txavail
+ * Function: pic32mz_txavail_work
  *
  * Description:
- *   Driver callback invoked when new TX data is available.  This is a
- *   stimulus perform an out-of-cycle poll and, thereby, reduce the TX
- *   latency.
+ *   Perform an out-of-cycle poll on the worker thread.
  *
  * Parameters:
- *   dev  - Reference to the NuttX driver state structure
+ *   arg - Reference to the NuttX driver state structure (cast to void*)
  *
  * Returned Value:
  *   None
  *
  * Assumptions:
- *   Called in normal user mode
+ *   Called on the higher priority worker thread.
  *
  ****************************************************************************/
 
-static int pic32mz_txavail(struct net_driver_s *dev)
+static void pic32mz_txavail_work(void *arg)
 {
-  struct pic32mz_driver_s *priv = (struct pic32mz_driver_s *)dev->d_private;
-  irqstate_t flags;
-
-  /* Disable interrupts because this function may be called from interrupt
-   * level processing.
-   */
-
-  flags = enter_critical_section();
+  struct pic32mz_driver_s *priv = (struct pic32mz_driver_s *)arg;
 
   /* Ignore the notification if the interface is not yet up */
 
+  net_lock();
   if (priv->pd_ifup)
     {
       /* Check if the next Tx descriptor is available. */
@@ -2313,7 +2468,44 @@ static int pic32mz_txavail(struct net_driver_s *dev)
         }
     }
 
-  leave_critical_section(flags);
+  net_unlock();
+}
+
+/****************************************************************************
+ * Function: pic32mz_txavail
+ *
+ * Description:
+ *   Driver callback invoked when new TX data is available.  This is a
+ *   stimulus perform an out-of-cycle poll and, thereby, reduce the TX
+ *   latency.
+ *
+ * Parameters:
+ *   dev - Reference to the NuttX driver state structure
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Called in normal user mode
+ *
+ ****************************************************************************/
+
+static int pic32mz_txavail(struct net_driver_s *dev)
+{
+  struct pic32mz_driver_s *priv = (struct pic32mz_driver_s *)dev->d_private;
+
+  /* Is our single work structure available?  It may not be if there are
+   * pending interrupt actions and we will have to ignore the Tx
+   * availability action.
+   */
+
+  if (work_available(&priv->pd_pollwork))
+    {
+      /* Schedule to serialize the poll on the worker thread. */
+
+      work_queue(ETHWORK, &priv->pd_pollwork, pic32mz_txavail_work, priv, 0);
+    }
+
   return OK;
 }
 
@@ -2396,14 +2588,14 @@ static int pic32mz_rmmac(struct net_driver_s *dev, const uint8_t *mac)
 #if defined(CONFIG_NET_REGDEBUG) && defined(PIC32MZ_HAVE_PHY)
 static void pic32mz_showmii(uint8_t phyaddr, const char *msg)
 {
-  dbg("PHY " PIC32MZ_PHYNAME ": %s\n", msg);
-  dbg("  MCR:       %04x\n", pic32mz_phyread(phyaddr, MII_MCR));
-  dbg("  MSR:       %04x\n", pic32mz_phyread(phyaddr, MII_MSR));
-  dbg("  ADVERTISE: %04x\n", pic32mz_phyread(phyaddr, MII_ADVERTISE));
-  dbg("  LPA:       %04x\n", pic32mz_phyread(phyaddr, MII_LPA));
-  dbg("  EXPANSION: %04x\n", pic32mz_phyread(phyaddr, MII_EXPANSION));
+  ninfo("PHY " PIC32MZ_PHYNAME ": %s\n", msg);
+  ninfo("  MCR:       %04x\n", pic32mz_phyread(phyaddr, MII_MCR));
+  ninfo("  MSR:       %04x\n", pic32mz_phyread(phyaddr, MII_MSR));
+  ninfo("  ADVERTISE: %04x\n", pic32mz_phyread(phyaddr, MII_ADVERTISE));
+  ninfo("  LPA:       %04x\n", pic32mz_phyread(phyaddr, MII_LPA));
+  ninfo("  EXPANSION: %04x\n", pic32mz_phyread(phyaddr, MII_EXPANSION));
 #ifdef CONFIG_ETH0_PHY_KS8721
-  dbg("  10BTCR:    %04x\n", pic32mz_phyread(phyaddr, MII_KS8721_10BTCR));
+  ninfo("  10BTCR:    %04x\n", pic32mz_phyread(phyaddr, MII_KS8721_10BTCR));
 #endif
 }
 #endif
@@ -2566,7 +2758,7 @@ static inline int pic32mz_phyreset(uint8_t phyaddr)
         }
     }
 
-  ndbg("Reset failed. MCR: %04x\n", phyreg);
+  nerr("ERROR: Reset failed. MCR: %04x\n", phyreg);
   return -ETIMEDOUT;
 }
 #endif
@@ -2613,7 +2805,7 @@ static inline int pic32mz_phyautoneg(uint8_t phyaddr)
         }
     }
 
-  ndbg("Auto-negotiation failed. MSR: %04x\n", phyreg);
+  nerr("ERROR: Auto-negotiation failed. MSR: %04x\n", phyreg);
   return -ETIMEDOUT;
 }
 #endif
@@ -2692,7 +2884,7 @@ static int pic32mz_phymode(uint8_t phyaddr, uint8_t mode)
 #endif
     }
 
-  ndbg("Link failed. MSR: %04x\n", phyreg);
+  nerr("ERROR: Link failed. MSR: %04x\n", phyreg);
   return -ETIMEDOUT;
 }
 #endif
@@ -2761,7 +2953,7 @@ static inline int pic32mz_phyinit(struct pic32mz_driver_s *priv)
       ret = pic32mz_phyreset(phyaddr);
       if (ret < 0)
         {
-          ndbg("Failed to reset PHY at address %d\n", phyaddr);
+          nerr("ERROR: Failed to reset PHY at address %d\n", phyaddr);
           continue;
         }
 
@@ -2774,12 +2966,12 @@ static inline int pic32mz_phyinit(struct pic32mz_driver_s *priv)
        */
 
        phyreg = (unsigned int)pic32mz_phyread(phyaddr, MII_PHYID1);
-       nvdbg("Addr: %d PHY ID1: %04x EXPECT: %04x\n", phyaddr, phyreg, PIC32MZ_PHYID1);
+       ninfo("Addr: %d PHY ID1: %04x EXPECT: %04x\n", phyaddr, phyreg, PIC32MZ_PHYID1);
 
        if (phyreg == PIC32MZ_PHYID1)
         {
           phyreg = pic32mz_phyread(phyaddr, MII_PHYID2);
-          nvdbg("Addr: %d PHY ID2: %04x EXPECT: %04x\n", phyaddr, phyreg, PIC32MZ_PHYID2);
+          ninfo("Addr: %d PHY ID2: %04x EXPECT: %04x\n", phyaddr, phyreg, PIC32MZ_PHYID2);
 
           if (phyreg == PIC32MZ_PHYID2)
             {
@@ -2794,10 +2986,11 @@ static inline int pic32mz_phyinit(struct pic32mz_driver_s *priv)
     {
       /* Failed to find PHY at any location */
 
-      ndbg("No PHY detected\n");
+      nerr("ERROR: No PHY detected\n");
       return -ENODEV;
     }
-  nvdbg("phyaddr: %d\n", phyaddr);
+
+  ninfo("phyaddr: %d\n", phyaddr);
 
   /* Save the discovered PHY device address */
 
@@ -2810,6 +3003,7 @@ static inline int pic32mz_phyinit(struct pic32mz_driver_s *priv)
     {
       return ret;
     }
+
   pic32mz_showmii(phyaddr, "After reset");
 
   /* Set the MII/RMII operation mode. This usually requires access to a
@@ -2898,7 +3092,7 @@ static inline int pic32mz_phyinit(struct pic32mz_driver_s *priv)
         priv->pd_mode = PIC32MZ_100BASET_FD;
         break;
       default:
-        ndbg("Unrecognized mode: %04x\n", phyreg);
+        nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
         return -ENODEV;
     }
 #elif defined(CONFIG_ETH0_PHY_DP83848C)
@@ -2921,7 +3115,7 @@ static inline int pic32mz_phyinit(struct pic32mz_driver_s *priv)
         priv->pd_mode = PIC32MZ_10BASET_FD;
         break;
       default:
-        ndbg("Unrecognized mode: %04x\n", phyreg);
+        nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
         return -ENODEV;
     }
 #elif defined(CONFIG_ETH0_PHY_LAN8720) || defined(CONFIG_ETH0_PHY_LAN8740) || defined(CONFIG_ETH0_PHY_LAN8740A)
@@ -2966,7 +3160,7 @@ static inline int pic32mz_phyinit(struct pic32mz_driver_s *priv)
       }
     else
       {
-        ndbg("Unrecognized mode: %04x\n", phyreg);
+        nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
         return -ENODEV;
       }
   }
@@ -2974,9 +3168,9 @@ static inline int pic32mz_phyinit(struct pic32mz_driver_s *priv)
 #  warning "PHY Unknown: speed and duplex are bogus"
 #endif
 
-  ndbg("%dBase-T %s duplex\n",
-       (priv->pd_mode & PIC32MZ_SPEED_MASK) ==  PIC32MZ_SPEED_100 ? 100 : 10,
-       (priv->pd_mode & PIC32MZ_DUPLEX_MASK) == PIC32MZ_DUPLEX_FULL ?"full" : "half");
+  ninfo("%dBase-T %s duplex\n",
+        (priv->pd_mode & PIC32MZ_SPEED_MASK) ==  PIC32MZ_SPEED_100 ? 100 : 10,
+        (priv->pd_mode & PIC32MZ_DUPLEX_MASK) == PIC32MZ_DUPLEX_FULL ?"full" : "half");
 
   /* Disable auto-configuration.  Set the fixed speed/duplex mode.
    * (probably more than little redundant).
@@ -3208,9 +3402,9 @@ static inline int pic32mz_ethinitialize(int intf)
   /* Attach the IRQ to the driver */
 
 #if CONFIG_PIC32MZ_NINTERFACES > 1
-  ret = irq_attach(priv->pd_irq, pic32mz_interrupt);
+  ret = irq_attach(priv->pd_irq, pic32mz_interrupt, NULL);
 #else
-  ret = irq_attach(PIC32MZ_IRQ_ETH, pic32mz_interrupt);
+  ret = irq_attach(PIC32MZ_IRQ_ETH, pic32mz_interrupt, NULL);
 #endif
   if (ret != 0)
     {
diff --git a/arch/mips/src/pic32mz/pic32mz-exception.c b/arch/mips/src/pic32mz/pic32mz-exception.c
index ec23ff8c3b54b9a176d44a1823e4f506a00f99c7..256010e910aa049341156b280a8b0583cdaeaab7 100644
--- a/arch/mips/src/pic32mz/pic32mz-exception.c
+++ b/arch/mips/src/pic32mz/pic32mz-exception.c
@@ -55,22 +55,6 @@
 
 #include "chip/pic32mz-int.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -85,7 +69,7 @@
 
 uint32_t *pic32mz_exception(uint32_t *regs)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   uint32_t cause;
   uint32_t epc;
 #endif
@@ -96,98 +80,98 @@ uint32_t *pic32mz_exception(uint32_t *regs)
 
   board_autoled_on(LED_INIRQ);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   /* Get the cause of the exception from the CAUSE register */
 
   asm volatile("\tmfc0 %0,$13,0\n" : "=r"(cause));
   asm volatile("\tmfc0 %0,$14,0\n" : "=r"(epc));
 
-#ifdef CONFIG_DEBUG_VERBOSE
+#ifdef CONFIG_DEBUG_INFO
   switch (cause & CP0_CAUSE_EXCCODE_MASK)
     {
     case CP0_CAUSE_EXCCODE_INT:      /* Interrupt */
-      llvdbg("EXCEPTION: Interrupt"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Interrupt"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_TLBL:     /* TLB exception (load or instruction fetch) */
-      llvdbg("EXCEPTION: TLB exception (load or instruction fetch)"
-             " CAUSE: %08x EPC:%08x\n", cause, epc);
+      _alert("EXCEPTION: TLB exception (load or instruction fetch)"
+            " CAUSE: %08x EPC:%08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_TLBS:     /* TLB exception (store) */
-      llvdbg("EXCEPTION: TLB exception (store)"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: TLB exception (store)"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_ADEL:     /* Address error exception (load or instruction fetch) */
-      llvdbg("EXCEPTION: Address error exception (load or instruction fetch)"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Address error exception (load or instruction fetch)"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_ADES:     /* Address error exception (store) */
-      llvdbg("EXCEPTION: Address error exception (store)"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Address error exception (store)"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_IBE:      /* Bus error exception (instruction fetch) */
-      llvdbg("EXCEPTION: Bus error exception (instruction fetch)"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Bus error exception (instruction fetch)"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_DBE:      /* Bus error exception (data reference: load or store) */
-      llvdbg("EXCEPTION: Bus error exception (data reference: load or store)"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Bus error exception (data reference: load or store)"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_SYS:      /* Syscall exception */
-      llvdbg("EXCEPTION: Syscall exception"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Syscall exception"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_BP:       /* Breakpoint exception */
-      llvdbg("EXCEPTION: Breakpoint exception"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Breakpoint exception"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_RI:       /* Reserved instruction exception */
-      llvdbg("EXCEPTION: Reserved instruction exception"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Reserved instruction exception"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_CPU:      /* Coprocessor Unusable exception */
-      llvdbg("EXCEPTION: Coprocessor Unusable exception"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Coprocessor Unusable exception"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_OV:       /* Arithmetic Overflow exception */
-      llvdbg("EXCEPTION: Arithmetic Overflow exception"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Arithmetic Overflow exception"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_TR:       /* Trap exception */
-      llvdbg("EXCEPTION: Trap exception"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Trap exception"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_FPE:      /* Floating point exception */
-      llvdbg("EXCEPTION: Floating point exception"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Floating point exception"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_C2E:      /* Precise Coprocessor 2 exceptions */
-      llvdbg("EXCEPTION: Precise Coprocessor 2 exceptions"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Precise Coprocessor 2 exceptions"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_MDMX:     /* MDMX Unusable (MIPS64) */
-      llvdbg("EXCEPTION: MDMX Unusable (MIPS64)"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: MDMX Unusable (MIPS64)"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_WATCH:    /* WatchHi/WatchLo address */
-      llvdbg("EXCEPTION: WatchHi/WatchLo address"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: WatchHi/WatchLo address"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_MCHECK:   /* Machine check */
-      llvdbg("EXCEPTION: Machine check"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Machine check"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     case CP0_CAUSE_EXCCODE_CACHEERR: /* Cache error */
-      llvdbg("EXCEPTION: Cache error"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Cache error"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     default:
-      llvdbg("EXCEPTION: Unknown"
-             " CAUSE: %08x EPC: %08x\n", cause, epc);
+      _alert("EXCEPTION: Unknown"
+            " CAUSE: %08x EPC: %08x\n", cause, epc);
       break;
     }
 #else
-  lldbg("EXCEPTION: CAUSE: %08x EPC: %08x\n", cause, epc);
+  _alert("EXCEPTION: CAUSE: %08x EPC: %08x\n", cause, epc);
 #endif
 #endif
 
diff --git a/arch/mips/src/pic32mz/pic32mz-gpio.c b/arch/mips/src/pic32mz/pic32mz-gpio.c
index 8bec67734365927778faa106a4826c1316bfeaff..3d247edc5b33b5e183d7ece4c0bf3efde38b63af 100644
--- a/arch/mips/src/pic32mz/pic32mz-gpio.c
+++ b/arch/mips/src/pic32mz/pic32mz-gpio.c
@@ -307,7 +307,7 @@ bool pic32mz_gpioread(pinset_t pinset)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_GPIO)
+#ifdef CONFIG_DEBUG_GPIO_INFO
 void pic32mz_dumpgpio(uint32_t pinset, const char *msg)
 {
   unsigned int port = pic32mz_portno(pinset);
@@ -325,17 +325,17 @@ void pic32mz_dumpgpio(uint32_t pinset, const char *msg)
       /* The following requires exclusive access to the GPIO registers */
 
       sched_lock();
-      lldbg("IOPORT%c pinset: %04x base: %08x -- %s\n",
-            'A'+port, pinset, base, msg);
-      lldbg("   TRIS: %08x   PORT: %08x    LAT: %08x    ODC: %08x\n",
-            getreg32(base + PIC32MZ_IOPORT_TRIS_OFFSET),
-            getreg32(base + PIC32MZ_IOPORT_PORT_OFFSET),
-            getreg32(base + PIC32MZ_IOPORT_LAT_OFFSET),
-            getreg32(base + PIC32MZ_IOPORT_ODC_OFFSET));
-      lldbg("  CNCON: %08x   CNEN: %08x  CNPUE: %08x\n",
-            getreg32(PIC32MZ_IOPORT_CNCON),
-            getreg32(PIC32MZ_IOPORT_CNEN),
-            getreg32(PIC32MZ_IOPORT_CNPUE));
+      gpioinfo("IOPORT%c pinset: %04x base: %08x -- %s\n",
+               'A'+port, pinset, base, msg);
+      gpioinfo("   TRIS: %08x   PORT: %08x    LAT: %08x    ODC: %08x\n",
+               getreg32(base + PIC32MZ_IOPORT_TRIS_OFFSET),
+               getreg32(base + PIC32MZ_IOPORT_PORT_OFFSET),
+               getreg32(base + PIC32MZ_IOPORT_LAT_OFFSET),
+               getreg32(base + PIC32MZ_IOPORT_ODC_OFFSET));
+      gpioinfo("  CNCON: %08x   CNEN: %08x  CNPUE: %08x\n",
+               getreg32(PIC32MZ_IOPORT_CNCON),
+               getreg32(PIC32MZ_IOPORT_CNEN),
+               getreg32(PIC32MZ_IOPORT_CNPUE));
       sched_unlock();
     }
 }
diff --git a/arch/mips/src/pic32mz/pic32mz-gpio.h b/arch/mips/src/pic32mz/pic32mz-gpio.h
index 1c967bc802ae72c3528afc806b311518f08ee716..17e6e6add619730ef7a9ae1a0fd378c9f77ac93d 100644
--- a/arch/mips/src/pic32mz/pic32mz-gpio.h
+++ b/arch/mips/src/pic32mz/pic32mz-gpio.h
@@ -199,22 +199,20 @@ void pic32mz_gpioirqinitialize(void);
  *   case, all attached handlers will be called.  Each handler must maintain state
  *   and determine if the underlying GPIO input value changed.
  *
- * Parameters:
- *  - pinset:  GPIO pin configuration
- *  - cn:      The change notification number associated with the pin
- *  - handler: Interrupt handler (may be NULL to detach)
+ *   pinset  - GPIO pin configuration
+ *   handler - Interrupt handler (may be NULL to detach)
+ *   arg     - The argument that accompanies the interrupt
  *
- * Returns:
- *  The previous value of the interrupt handler function pointer.  This value may,
- *  for example, be used to restore the previous handler when multiple handlers are
- *  used.
+ * Returned Value:
+ *   Zero (OK) is returned on success.  A negated error value is returned on
+ *   any failure to indicate the nature of the failure.
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 #ifdef CONFIG_PIC32MZ_GPIOIRQ
-xcpt_t pic32mz_gpioattach(pinset_t pinset, xcpt_t handler);
+int pic32mz_gpioattach(uint32_t pinset, xcpt_t handler, void *arg);
 #else
-#  define pic32mz_gpioattach(p,f) (NULL)
+#  define pic32mz_gpioattach(p,h,a) (0)
 #endif
 
 /************************************************************************************
@@ -253,7 +251,7 @@ void pic32mz_gpioirqdisable(pinset_t pinset);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 void pic32mz_dumpgpio(uint32_t pinset, const char *msg);
 #else
 #  define pic32mz_dumpgpio(p,m)
diff --git a/arch/mips/src/pic32mz/pic32mz-gpioirq.c b/arch/mips/src/pic32mz/pic32mz-gpioirq.c
index 9b7f8c6808396a753aacf5cea53c27104bc5bee7..ed6d3cdf45994f4b278c143d9ee2eed1141357d0 100644
--- a/arch/mips/src/pic32mz/pic32mz-gpioirq.c
+++ b/arch/mips/src/pic32mz/pic32mz-gpioirq.c
@@ -72,15 +72,21 @@ static inline bool pic32mz_input(pinset_t pinset);
 static inline bool pic32mz_interrupt(pinset_t pinset);
 static inline bool pic32mz_pullup(pinset_t pinset);
 static inline bool pic32mz_pulldown(pinset_t pinset);
-static int pic32mz_cninterrupt(int irq, FAR void *context);
+static int pic32mz_cninterrupt(int irq, FAR void *context, FAR void *arg);
 
 /****************************************************************************
  * Public Data
  ****************************************************************************/
 
+struct ioport_handler_s
+{
+  xcpt_t entry;     /* Interrupt handler entry point */
+  void  *arg;       /* The argument that accompanies the interrupt handler */
+};
+
 struct ioport_level2_s
 {
-  xcpt_t handler[16];
+  struct ioport_handler_s handler[16];
 };
 
 /****************************************************************************
@@ -204,7 +210,7 @@ static inline unsigned int pic32mz_pin(pinset_t pinset)
  *
  ****************************************************************************/
 
-static int pic32mz_cninterrupt(int irq, FAR void *context)
+static int pic32mz_cninterrupt(int irq, FAR void *context, FAR void *arg)
 {
   struct ioport_level2_s *handlers;
   xcpt_t handler;
@@ -260,12 +266,12 @@ static int pic32mz_cninterrupt(int irq, FAR void *context)
             {
               /* Yes.. Has the user attached a handler? */
 
-              handler = handlers->handler[i];
+              handler = handlers->handler[i].entry;
               if (handler)
                 {
                   /* Yes.. call the attached handler */
 
-                  status = handler(irq, context);
+                  status = handler(irq, context, handlers->handler[i].arg);
 
                   /* Keep track of the status of the last handler that
                    * failed.
@@ -334,7 +340,7 @@ void pic32mz_gpioirqinitialize(void)
            * each IRQ number is consecutive beginning with IOPORTA.
            */
 
-          ret = irq_attach(PIC32MZ_IRQ_PORTA + i, pic32mz_cninterrupt);
+          ret = irq_attach(PIC32MZ_IRQ_PORTA + i, pic32mz_cninterrupt, NULL);
           DEBUGASSERT(ret == OK);
           UNUSED(ret);
 
@@ -365,22 +371,21 @@ void pic32mz_gpioirqinitialize(void)
  *   In that case, all attached handlers will be called.  Each handler must
  *   maintain state and determine if the underlying GPIO input value changed.
  *
- * Parameters:
- *  - pinset:  GPIO pin configuration
- *  - pin:      The change notification number associated with the pin.
- *  - handler: Interrupt handler (may be NULL to detach)
+ * Input Parameters:
+ *   pinset  - GPIO pin configuration
+ *   handler - Interrupt handler (may be NULL to detach)
+ *   arg     - The argument that accompanies the interrupt
  *
- * Returns:
- *  The previous value of the interrupt handler function pointer.  This
- *  value may, for example, be used to restore the previous handler when
- *  multiple handlers are used.
+ * Returned Value:
+ *   Zero (OK) is returned on success.  A negated error value is returned on
+ *   any failure to indicate the nature of the failure.
  *
  ****************************************************************************/
 
-xcpt_t pic32mz_gpioattach(pinset_t pinset, xcpt_t handler)
+#ifdef CONFIG_PIC32MZ_GPIOIRQ
+int pic32mz_gpioattach(uint32_t pinset, xcpt_t handler, void *arg)
 {
   struct ioport_level2_s *handlers;
-  xcpt_t oldhandler = NULL;
   irqstate_t flags;
   uintptr_t base;
   int ioport;
@@ -415,7 +420,6 @@ xcpt_t pic32mz_gpioattach(pinset_t pinset, xcpt_t handler)
           /* Get the previously attached handler as the return value */
 
           flags = enter_critical_section();
-          oldhandler = handlers->handler[pin];
 
           /* Are we attaching or detaching? */
 
@@ -467,12 +471,13 @@ xcpt_t pic32mz_gpioattach(pinset_t pinset, xcpt_t handler)
 
           /* Set the new handler (perhaps NULLifying the current handler) */
 
-          handlers->handler[pin] = handler;
+          handlers->handler[pin].entry = handler;
+          handlers->handler[pin].arg   = arg;
           leave_critical_section(flags);
         }
     }
 
-  return oldhandler;
+  return OK;
 }
 
 /****************************************************************************
diff --git a/arch/mips/src/pic32mz/pic32mz-irq.c b/arch/mips/src/pic32mz/pic32mz-irq.c
index 4bb185939eccdda860bba404d095e06a117aa5a3..bb1fda5108e83f3d8b938b62ad4111e158581cd4 100644
--- a/arch/mips/src/pic32mz/pic32mz-irq.c
+++ b/arch/mips/src/pic32mz/pic32mz-irq.c
@@ -236,7 +236,7 @@ void up_irqinitialize(void)
 
   /* Attach and enable software interrupts */
 
-  irq_attach(PIC32MZ_IRQ_CS0, up_swint0);
+  irq_attach(PIC32MZ_IRQ_CS0, up_swint0, NULL);
   up_enable_irq(PIC32MZ_IRQ_CS0);
 
   /* currents_regs is non-NULL only while processing an interrupt */
diff --git a/arch/mips/src/pic32mz/pic32mz-serial.c b/arch/mips/src/pic32mz/pic32mz-serial.c
index 6845ff50352ecbea62faddbf0122192b8a2d910c..cfce690614e62494ed24fbfd85847564d0d0ea29 100644
--- a/arch/mips/src/pic32mz/pic32mz-serial.c
+++ b/arch/mips/src/pic32mz/pic32mz-serial.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/mips/src/pic32mz/pic32mz-serial.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -248,7 +248,6 @@
 struct up_dev_s
 {
   uintptr_t uartbase;  /* Base address of UART registers */
-  xcpt_t    handler;   /* UART interrupt handler */
   uint32_t  baud;      /* Configured baud */
   uint8_t   irqe;      /* Error IRQ associated with this UART (for enable) */
   uint8_t   irqrx;     /* RX IRQ associated with this UART (for enable) */
@@ -276,27 +275,7 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-
-static int  up_interrupt(struct uart_dev_s *priv);
-#ifdef CONFIG_PIC32MZ_UART1
-static int  up_uart1_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_PIC32MZ_UART2
-static int  up_uart2_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_PIC32MZ_UART3
-static int  up_uart3_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_PIC32MZ_UART4
-static int  up_uart4_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_PIC32MZ_UART5
-static int  up_uart5_interrupt(int irq, void *context);
-#endif
-#ifdef CONFIG_PIC32MZ_UART6
-static int  up_uart6_interrupt(int irq, void *context);
-#endif
-
+static int  up_interrupt(int irq, void *context, FAR void *arg);
 static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  up_receive(struct uart_dev_s *dev, uint32_t *status);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
@@ -362,7 +341,6 @@ static char g_uart6txbuffer[CONFIG_UART6_TXBUFSIZE];
 static struct up_dev_s g_uart1priv =
 {
   .uartbase  = PIC32MZ_UART1_K1BASE,
-  .handler   = up_uart1_interrupt,
   .baud      = CONFIG_UART1_BAUD,
   .irqe      = PIC32MZ_IRQ_U1E,
   .irqrx     = PIC32MZ_IRQ_U1RX,
@@ -395,7 +373,6 @@ static uart_dev_t g_uart1port =
 static struct up_dev_s g_uart2priv =
 {
   .uartbase  = PIC32MZ_UART2_K1BASE,
-  .handler   = up_uart2_interrupt,
   .baud      = CONFIG_UART2_BAUD,
   .irqe      = PIC32MZ_IRQ_U2E,
   .irqrx     = PIC32MZ_IRQ_U2RX,
@@ -428,7 +405,6 @@ static uart_dev_t g_uart2port =
 static struct up_dev_s g_uart3priv =
 {
   .uartbase  = PIC32MZ_UART3_K1BASE,
-  .handler   = up_uart3_interrupt,
   .baud      = CONFIG_UART3_BAUD,
   .irqe      = PIC32MZ_IRQ_U3E,
   .irqrx     = PIC32MZ_IRQ_U3RX,
@@ -461,7 +437,6 @@ static uart_dev_t g_uart3port =
 static struct up_dev_s g_uart4priv =
 {
   .uartbase  = PIC32MZ_UART4_K1BASE,
-  .handler   = up_uart4_interrupt,
   .baud      = CONFIG_UART4_BAUD,
   .irqe      = PIC32MZ_IRQ_U4E,
   .irqrx     = PIC32MZ_IRQ_U4RX,
@@ -494,7 +469,6 @@ static uart_dev_t g_uart4port =
 static struct up_dev_s g_uart5priv =
 {
   .uartbase  = PIC32MZ_UART5_K1BASE,
-  .handler   = up_uart5_interrupt,
   .baud      = CONFIG_UART5_BAUD,
   .irqe      = PIC32MZ_IRQ_U5E,
   .irqrx     = PIC32MZ_IRQ_U5RX,
@@ -527,7 +501,6 @@ static uart_dev_t g_uart5port =
 static struct up_dev_s g_uart6priv =
 {
   .uartbase  = PIC32MZ_UART6_K1BASE,
-  .handler   = up_uart6_interrupt,
   .baud      = CONFIG_UART6_BAUD,
   .irqe      = PIC32MZ_IRQ_U6E,
   .irqrx     = PIC32MZ_IRQ_U6RX,
@@ -675,17 +648,19 @@ static int up_attach(struct uart_dev_s *dev)
   struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
   int ret;
 
-  /* Attach the IRQs */
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
+
+  /* Attach the IRQ */
 
-  ret = irq_attach(priv->irqrx, priv->handler);
+  ret = irq_attach(priv->irqrx, up_interrupt, dev);
   if (ret == 0)
     {
-      ret = irq_attach(priv->irqtx, priv->handler);
+      ret = irq_attach(priv->irqtx, up_interrupt, dev);
     }
 
   if (ret == 0)
     {
-      ret = irq_attach(priv->irqe, priv->handler);
+      ret = irq_attach(priv->irqe, up_interrupt, dev);
     }
 
   return ret;
@@ -727,13 +702,14 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int  up_interrupt(struct uart_dev_s *dev)
+static int up_interrupt(int irq, void *context, FAR void *arg)
 {
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct up_dev_s *priv;
-  int              passes;
-  bool             handled;
+  int passes;
+  bool handled;
 
-  DEBUGASSERT(dev && dev->priv);
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct up_dev_s *)dev->priv;
 
   /* Loop until there are no characters to be transferred or,
@@ -752,14 +728,14 @@ static int  up_interrupt(struct uart_dev_s *dev)
        *  - Overflow condition for the receive buffer OERR (UxSTA bit 1) occurs
        */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ERROR
       if (up_pending_irq(priv->irqe))
         {
            /* Clear the pending error interrupt */
 
            up_clrpend_irq(priv->irqe);
-           lldbg("ERROR: interrupt STA: %08x\n",
-                 up_serialin(priv, PIC32MZ_UART_STA_OFFSET));
+           _err("ERROR: interrupt STA: %08x\n",
+                up_serialin(priv, PIC32MZ_UART_STA_OFFSET));
            handled = true;
         }
 #endif
@@ -830,56 +806,6 @@ static int  up_interrupt(struct uart_dev_s *dev)
   return OK;
 }
 
-/****************************************************************************
- * Name: up_uartn_interrupt
- *
- * Description:
- *   These the UART-specific interrupt handlers.  They simply invoke the
- *   common uart interrupt handler with the correct state data.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_PIC32MZ_UART1
-static int  up_uart1_interrupt(int irq, void *context)
-{
-  return up_interrupt(&g_uart1port);
-}
-#endif
-
-#ifdef CONFIG_PIC32MZ_UART2
-static int  up_uart2_interrupt(int irq, void *context)
-{
-  return up_interrupt(&g_uart2port);
-}
-#endif
-
-#ifdef CONFIG_PIC32MZ_UART3
-static int  up_uart3_interrupt(int irq, void *context)
-{
-  return up_interrupt(&g_uart3port);
-}
-#endif
-
-#ifdef CONFIG_PIC32MZ_UART4
-static int  up_uart4_interrupt(int irq, void *context)
-{
-  return up_interrupt(&g_uart4port);
-}
-#endif
-
-#ifdef CONFIG_PIC32MZ_UART5
-static int  up_uart5_interrupt(int irq, void *context)
-{
-  return up_interrupt(&g_uart5port);
-}
-#endif
-#ifdef CONFIG_PIC32MZ_UART6
-static int  up_uart6_interrupt(int irq, void *context)
-{
-  return up_interrupt(&g_uart6port);
-}
-#endif
-
 /****************************************************************************
  * Name: up_ioctl
  *
@@ -1008,7 +934,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
        */
 
 #ifndef CONFIG_SUPPRESS_SERIAL_INTS
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ERROR
       up_enable_irq(priv->irqe);
 #endif
       up_enable_irq(priv->irqrx);
@@ -1017,7 +943,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
     }
   else
     {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ERROR
       up_disable_irq(priv->irqe);
 #endif
       up_disable_irq(priv->irqrx);
diff --git a/arch/mips/src/pic32mz/pic32mz-spi.c b/arch/mips/src/pic32mz/pic32mz-spi.c
index d2f83fb2927e562e56db396d78943f30a7af2408..ff56c7f527dfc22afdc9a2b47d8d6801faf43b74 100644
--- a/arch/mips/src/pic32mz/pic32mz-spi.c
+++ b/arch/mips/src/pic32mz/pic32mz-spi.c
@@ -67,20 +67,6 @@
 
 #define BOARD_PBCLOCK BOARD_PBCLK2
 
-/* Debug */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -496,7 +482,7 @@ static bool spi_checkreg(struct pic32mz_dev_s *priv, uintptr_t regaddr,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", priv->ntimes);
+          _info("...[Repeats %d times]...\n", priv->ntimes);
         }
 
       /* Save information about the new access */
@@ -546,8 +532,8 @@ static uint32_t spi_getreg(FAR struct pic32mz_dev_s *priv,
     {
       /* Yes.. */
 
-      lldbg("%08lx->%08lx\n",
-            (unsigned long)regaddr, (unsigned long)regval);
+      _info("%08lx->%08lx\n",
+           (unsigned long)regaddr, (unsigned long)regval);
     }
 
   /* Return the value read */
@@ -588,8 +574,8 @@ static void spi_putaddr(FAR struct pic32mz_dev_s *priv, uintptr_t regaddr,
     {
       /* Yes.. */
 
-      lldbg("%08lx<-%08lx\n",
-      (unsigned long)regaddr, (unsigned long)regval);
+      _info("%08lx<-%08lx\n",
+           (unsigned long)regaddr, (unsigned long)regval);
     }
 
   /* Write the value to the register */
@@ -652,7 +638,7 @@ static void spi_exchange8(FAR struct pic32mz_dev_s *priv,
   uint32_t regval;
   uint8_t data;
 
-  spivdbg("nbytes: %d\n", nbytes);
+  spiinfo("nbytes: %d\n", nbytes);
   while (nbytes)
     {
       /* Write the data to transmitted to the SPI Data Register */
@@ -723,7 +709,7 @@ static void spi_exchange16(FAR struct pic32mz_dev_s *priv,
   uint32_t regval;
   uint16_t data;
 
-  spivdbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
   while (nwords)
     {
       /* Write the data to transmitted to the SPI Data Register */
@@ -837,7 +823,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
   uint32_t actual;
   uint32_t regval;
 
-  spivdbg("Old frequency: %d actual: %d New frequency: %d\n",
+  spiinfo("Old frequency: %d actual: %d New frequency: %d\n",
           priv->frequency, priv->actual, frequency);
 
   /* Check if the requested frequency is the same as the frequency selection */
@@ -872,7 +858,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
   /* Save the new BRG value */
 
   spi_putreg(priv, PIC32MZ_SPI_BRG_OFFSET, regval);
-  spivdbg("PBCLOCK: %d frequency: %d divisor: %d BRG: %d\n",
+  spiinfo("PBCLOCK: %d frequency: %d divisor: %d BRG: %d\n",
           BOARD_PBCLOCK, frequency, divisor, regval);
 
   /* Calculate the new actual frequency.
@@ -887,7 +873,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
   priv->frequency = frequency;
   priv->actual    = actual;
 
-  spidbg("New frequency: %d Actual: %d\n", frequency, actual);
+  spiinfo("New frequency: %d Actual: %d\n", frequency, actual);
   return actual;
 }
 
@@ -911,7 +897,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
   FAR struct pic32mz_dev_s *priv = (FAR struct pic32mz_dev_s *)dev;
   uint32_t regval;
 
-  spivdbg("Old mode: %d New mode: %d\n", priv->mode, mode);
+  spiinfo("Old mode: %d New mode: %d\n", priv->mode, mode);
 
   /* Has the mode changed? */
 
@@ -973,7 +959,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
         }
 
       spi_putreg(priv, PIC32MZ_SPI_CON_OFFSET, regval);
-      spivdbg("CON: %08x\n", regval);
+      spiinfo("CON: %08x\n", regval);
 
       /* Save the mode so that subsequent re-configuratins will be faster */
 
@@ -1002,7 +988,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
   uint32_t setting;
   uint32_t regval;
 
-  spivdbg("Old nbits: %d New nbits: %d\n", priv->nbits, nbits);
+  spiinfo("Old nbits: %d New nbits: %d\n", priv->nbits, nbits);
 
   /* Has the number of bits changed? */
 
@@ -1025,7 +1011,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
         }
       else
         {
-          spidbg("Unsupported nbits: %d\n", nbits);
+          spierr("ERROR: Unsupported nbits: %d\n", nbits);
           return;
         }
 
@@ -1033,7 +1019,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
       regval &= ~SPI_CON_MODE_MASK;
       regval |= setting;
       regval = spi_getreg(priv, PIC32MZ_SPI_CON_OFFSET);
-      spivdbg("CON: %08x\n", regval);
+      spiinfo("CON: %08x\n", regval);
 
       /* Save the selection so the subsequence re-configurations will be
        * faster
@@ -1075,7 +1061,7 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
       rxword = 0;
       spi_exchange16(priv, &txword, &rxword, 1);
 
-      spivdbg("Sent %04x received %04x\n", txword, rxword);
+      spiinfo("Sent %04x received %04x\n", txword, rxword);
       return rxword;
     }
   else
@@ -1089,7 +1075,7 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
       rxbyte = (uint8_t)0;
       spi_exchange8(priv, &txbyte, &rxbyte, 1);
 
-      spivdbg("Sent %02x received %02x\n", txbyte, rxbyte);
+      spiinfo("Sent %02x received %02x\n", txbyte, rxbyte);
       return (uint16_t)rxbyte;
     }
 }
@@ -1222,7 +1208,7 @@ FAR struct spi_dev_s *pic32mz_spibus_initialize(int port)
   irqstate_t flags;
   uint32_t regval;
 
-  spivdbg("port: %d\n", port);
+  spiinfo("port: %d\n", port);
 
   /* Select the SPI state structure and SDI PPS register for this port */
 
@@ -1275,7 +1261,7 @@ FAR struct spi_dev_s *pic32mz_spibus_initialize(int port)
   else
 #endif
    {
-     spidbg("Unsuppport port: %d\n", port);
+     spierr("ERROR: Unsuppport port: %d\n", port);
      return NULL;
    }
 
@@ -1308,26 +1294,26 @@ FAR struct spi_dev_s *pic32mz_spibus_initialize(int port)
    * resources are available.
    */
 
-  ret = irq_attach(priv->config->rxirq, spi_interrupt);
+  ret = irq_attach(priv->config->rxirq, spi_interrupt, NULL);
   if (ret < 0)
     {
-      spidbg("Failed to attach RX interrupt: %d port: %d\n",
+      spierr("ERROR: Failed to attach RX interrupt: %d port: %d\n",
              priv->config->rxirq, port);
       goto errout;
     }
 
-  ret = irq_attach(priv->config->txirq, spi_interrupt);
+  ret = irq_attach(priv->config->txirq, spi_interrupt, NULL);
   if (ret < 0)
     {
-      spidbg("Failed to attach TX interrupt: %d port: %d\n",
+      spierr("ERROR: Failed to attach TX interrupt: %d port: %d\n",
              priv->tconfig->xirq, port);
       goto errout_with_rxirq;
     }
 
-  ret = irq_attach(priv->config->firq, spi_interrupt);
+  ret = irq_attach(priv->config->firq, spi_interrupt, NULL);
   if (ret < 0)
     {
-      spidbg("Failed to attach fault interrupt: %d port: %d\n",
+      spierr("ERROR: Failed to attach fault interrupt: %d port: %d\n",
              priv->config->firq, port);
       goto errout_with_txirq;
     }
@@ -1354,7 +1340,7 @@ FAR struct spi_dev_s *pic32mz_spibus_initialize(int port)
   regval |= (SPI_CON_ENHBUF | SPI_CON_SRXISEL_HALF | SPI_CON_STXISEL_HALF);
 #endif
   spi_putreg(priv, PIC32MZ_SPI_CON_OFFSET, regval);
-  spivdbg("CON: %08x\n", regval);
+  spiinfo("CON: %08x\n", regval);
 
   /* Set the initial SPI configuration */
 
diff --git a/arch/mips/src/pic32mz/pic32mz-timerisr.c b/arch/mips/src/pic32mz/pic32mz-timerisr.c
index cbbdf886caee5e349bc737da27f4c85510789367..75e35ecf05706c9e27ffebc4a6d6c519dbdc6773 100644
--- a/arch/mips/src/pic32mz/pic32mz-timerisr.c
+++ b/arch/mips/src/pic32mz/pic32mz-timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/mips/src/pic32mz/pic32mz_timerisr.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -124,19 +124,11 @@
 #define TIMER1_MATCH (TIMER1_SRC_FREQ / TIMER1_PRESCALE / CLOCKS_PER_SEC)
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  pc32mz_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -144,20 +136,24 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int pc32mz_timerisr(int irq, uint32_t *regs, void *arg)
 {
-   /* Clear the pending timer interrupt */
+  /* Clear the pending timer interrupt */
 
-   up_clrpend_irq(PIC32MZ_IRQ_T1);
+  up_clrpend_irq(PIC32MZ_IRQ_T1);
 
-   /* Process timer interrupt */
+  /* Process timer interrupt */
 
-   sched_process_timer();
-   return 0;
+  sched_process_timer();
+  return 0;
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  mips_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -165,7 +161,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void mips_timer_initialize(void)
 {
   /* Configure and enable TIMER1.  Used the computed TCKPS divider and timer
    * match value.  The source will be either the internal PBCLOCK (TCS=0) or
@@ -183,7 +179,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(PIC32MZ_IRQ_T1, (xcpt_t)up_timerisr);
+  (void)irq_attach(PIC32MZ_IRQ_T1, (xcpt_t)pc32mz_timerisr, NULL);
 
   /* And enable the timer interrupt */
 
diff --git a/arch/misoc/Kconfig b/arch/misoc/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..eee7005c38ee9017cbeb7638756f8f4e84d4b2a5
--- /dev/null
+++ b/arch/misoc/Kconfig
@@ -0,0 +1,79 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_MISOC
+
+choice
+	prompt "Misoc Chip Selection"
+	default ARCH_CHIP_LM32
+
+config ARCH_CHIP_LM32
+	bool "LM32"
+	select MISOC_HAVE_UART1
+	---help---
+		LM32 Chip Selected
+
+config ARCH_CHIP_MOR1K
+	bool "MOR1K"
+	---help---
+		MOR1K Chip Selected
+
+endchoice # Misoc Chip Selection
+
+config ARCH_CHIP
+	string
+	default "lm32"		if ARCH_CHIP_LM32
+	default "mor1k"		if ARCH_CHIP_MOR1K
+
+menu "MISOC Peripheral Support"
+
+# These "hidden" settings determine is a peripheral option is available for the
+# selection MCU
+
+config MISOC_HAVE_UART1
+	bool
+	default n
+	select UART1_SERIALDRIVER
+
+config MISOC_UART1
+	bool "UART1"
+	default n
+	select ARCH_HAVE_UART1
+	select MISOC_UART
+
+config MISOC_ETHERNET
+	bool "Ethernet"
+	default n
+	select NETDEVICES
+	select ARCH_HAVE_PHY
+	select ARCH_HAVE_NETDEV_STATISTICS
+
+endmenu # MISOC Peripheral Support
+
+config MISOC_UART
+	bool
+
+config MISOC_UART_RX_BUF_SIZE
+	int "UART RX Bufer size"
+	default 64
+	depends on MISOC_UART
+	---help---
+		Size of RX buffers for MISOC UARTs
+
+config MISOC_UART_TX_BUF_SIZE
+	int "UART TX Bufer size"
+	default 64
+	depends on MISOC_UART
+	---help---
+		Size of TX buffers for MISOC UARTs
+
+if ARCH_CHIP_LM32
+source arch/misoc/src/lm32/Kconfig
+endif
+if ARCH_CHIP_MOR1K
+#source arch/misoc/src/mor1k/Kconfig
+endif
+
+endif # ARCH_MISOC
diff --git a/arch/rgmp/include/.gitignore b/arch/misoc/include/.gitignore
similarity index 100%
rename from arch/rgmp/include/.gitignore
rename to arch/misoc/include/.gitignore
diff --git a/arch/misoc/include/arch.h b/arch/misoc/include/arch.h
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/arch/misoc/include/inttypes.h b/arch/misoc/include/inttypes.h
new file mode 100644
index 0000000000000000000000000000000000000000..16c4046f7a7171a611934bb1e9c5bb3e19339eaf
--- /dev/null
+++ b/arch/misoc/include/inttypes.h
@@ -0,0 +1,245 @@
+/****************************************************************************
+ * arch/misoc/include/inttypes.h
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_MISOC_INCLUDE_INTTYPES_H
+#define __ARCH_MISOC_INCLUDE_INTTYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define PRId8       "d"
+#define PRId16      "d"
+#define PRId32      "d"
+#define PRId64      "lld"
+
+#define PRIdLEAST8  "d"
+#define PRIdLEAST16 "d"
+#define PRIdLEAST32 "d"
+#define PRIdLEAST64 "lld"
+
+#define PRIdFAST8   "d"
+#define PRIdFAST16  "d"
+#define PRIdFAST32  "d"
+#define PRIdFAST64  "lld"
+
+#define PRIdMAX     "lld"
+#define PRIdPTR     "d"
+
+#define PRIi8       "i"
+#define PRIi16      "i"
+#define PRIi32      "i"
+#define PRIi64      "lli"
+
+#define PRIiLEAST8  "i"
+#define PRIiLEAST16 "i"
+#define PRIiLEAST32 "i"
+#define PRIiLEAST64 "lli"
+
+#define PRIiFAST8   "i"
+#define PRIiFAST16  "i"
+#define PRIiFAST32  "i"
+#define PRIiFAST64  "lli"
+
+#define PRIiMAX     "lli"
+#define PRIiPTR     "i"
+
+#define PRIo8       "o"
+#define PRIo16      "o"
+#define PRIo32      "o"
+#define PRIo64      "llo"
+
+#define PRIoLEAST8  "o"
+#define PRIoLEAST16 "o"
+#define PRIoLEAST32 "o"
+#define PRIoLEAST64 "llo"
+
+#define PRIoFAST8   "o"
+#define PRIoFAST16  "o"
+#define PRIoFAST32  "o"
+#define PRIoFAST64  "llo"
+
+#define PRIoMAX     "llo"
+#define PRIoPTR     "o"
+
+#define PRIu8       "u"
+#define PRIu16      "u"
+#define PRIu32      "u"
+#define PRIu64      "llu"
+
+#define PRIuLEAST8  "u"
+#define PRIuLEAST16 "u"
+#define PRIuLEAST32 "u"
+#define PRIuLEAST64 "llu"
+
+#define PRIuFAST8   "u"
+#define PRIuFAST16  "u"
+#define PRIuFAST32  "u"
+#define PRIuFAST64  "llu"
+
+#define PRIuMAX     "llu"
+#define PRIuPTR     "u"
+
+#define PRIx8       "x"
+#define PRIx16      "x"
+#define PRIx32      "x"
+#define PRIx64      "llx"
+
+#define PRIxLEAST8  "x"
+#define PRIxLEAST16 "x"
+#define PRIxLEAST32 "x"
+#define PRIxLEAST64 "llx"
+
+#define PRIxFAST8   "x"
+#define PRIxFAST16  "x"
+#define PRIxFAST32  "x"
+#define PRIxFAST64  "llx"
+
+#define PRIxMAX     "llx"
+#define PRIxPTR     "x"
+
+#define PRIX8       "X"
+#define PRIX16      "X"
+#define PRIX32      "X"
+#define PRIX64      "llX"
+
+#define PRIXLEAST8  "X"
+#define PRIXLEAST16 "X"
+#define PRIXLEAST32 "X"
+#define PRIXLEAST64 "llX"
+
+#define PRIXFAST8   "X"
+#define PRIXFAST16  "X"
+#define PRIXFAST32  "X"
+#define PRIXFAST64  "llX"
+
+#define PRIXMAX     "llX"
+#define PRIXPTR     "X"
+
+#define SCNd8       "hhd"
+#define SCNd16      "hd"
+#define SCNd32      "d"
+#define SCNd64      "lld"
+
+#define SCNdLEAST8  "hhd"
+#define SCNdLEAST16 "hd"
+#define SCNdLEAST32 "d"
+#define SCNdLEAST64 "lld"
+
+#define SCNdFAST8   "hhd"
+#define SCNdFAST16  "hd"
+#define SCNdFAST32  "d"
+#define SCNdFAST64  "lld"
+
+#define SCNdMAX     "lld"
+#define SCNdPTR     "d"
+
+#define SCNi8       "hhi"
+#define SCNi16      "hi"
+#define SCNi32      "i"
+#define SCNi64      "lli"
+
+#define SCNiLEAST8  "hhi"
+#define SCNiLEAST16 "hi"
+#define SCNiLEAST32 "i"
+#define SCNiLEAST64 "lli"
+
+#define SCNiFAST8   "hhi"
+#define SCNiFAST16  "hi"
+#define SCNiFAST32  "i"
+#define SCNiFAST64  "lli"
+
+#define SCNiMAX     "lli"
+#define SCNiPTR     "i"
+
+#define SCNo8       "hho"
+#define SCNo16      "ho"
+#define SCNo32      "o"
+#define SCNo64      "llo"
+
+#define SCNoLEAST8  "hho"
+#define SCNoLEAST16 "ho"
+#define SCNoLEAST32 "o"
+#define SCNoLEAST64 "llo"
+
+#define SCNoFAST8   "hho"
+#define SCNoFAST16  "ho"
+#define SCNoFAST32  "o"
+#define SCNoFAST64  "llo"
+
+#define SCNoMAX     "llo"
+#define SCNoPTR     "o"
+
+#define SCNu8       "hhu"
+#define SCNu16      "hu"
+#define SCNu32      "u"
+#define SCNu64      "llu"
+
+#define SCNuLEAST8  "hhu"
+#define SCNuLEAST16 "hu"
+#define SCNuLEAST32 "u"
+#define SCNuLEAST64 "llu"
+
+#define SCNuFAST8   "hhu"
+#define SCNuFAST16  "hu"
+#define SCNuFAST32  "u"
+#define SCNuFAST64  "llu"
+
+#define SCNuMAX     "llu"
+#define SCNuPTR     "u"
+
+#define SCNx8       "hhx"
+#define SCNx16      "hx"
+#define SCNx32      "x"
+#define SCNx64      "llx"
+
+#define SCNxLEAST8  "hhx"
+#define SCNxLEAST16 "hx"
+#define SCNxLEAST32 "x"
+#define SCNxLEAST64 "llx"
+
+#define SCNxFAST8   "hhx"
+#define SCNxFAST16  "hx"
+#define SCNxFAST32  "x"
+#define SCNxFAST64  "llx"
+
+#define SCNxMAX     "llx"
+#define SCNxPTR     "x"
+
+#endif /* __ARCH_MISOC_INCLUDE_INTTYPES_H */
diff --git a/arch/misoc/include/irq.h b/arch/misoc/include/irq.h
new file mode 100644
index 0000000000000000000000000000000000000000..882c37a0fbf9a7a9f3075d4c1b4c56b4241c005f
--- /dev/null
+++ b/arch/misoc/include/irq.h
@@ -0,0 +1,80 @@
+/****************************************************************************
+ * arch/misoc/include/irq.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/irq.h
+ */
+
+#ifndef __ARCH_MISOC_INCLUDE_IRQ_H
+#define __ARCH_MISOC_INCLUDE_IRQ_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+irqstate_t up_irq_save(void);
+void up_irq_restore(irqstate_t flags);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_MISOC_INCLUDE_IRQ_H */
diff --git a/arch/misoc/include/limits.h b/arch/misoc/include/limits.h
new file mode 100644
index 0000000000000000000000000000000000000000..12dd86efb2e59a36e3562d0f4eb0114c3eed4058
--- /dev/null
+++ b/arch/misoc/include/limits.h
@@ -0,0 +1,88 @@
+/****************************************************************************
+ * arch/misoc/include/limits.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_MISOC_INCLUDE_LIMITS_H
+#define __ARCH_MISOC_INCLUDE_LIMITS_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define CHAR_BIT    8
+#define SCHAR_MIN   (-SCHAR_MAX - 1)
+#define SCHAR_MAX   127
+#define UCHAR_MAX   255
+
+/* These could be different on machines where char is unsigned */
+
+#ifdef __CHAR_UNSIGNED__
+#define CHAR_MIN    0
+#define CHAR_MAX    UCHAR_MAX
+#else
+#define CHAR_MIN    SCHAR_MIN
+#define CHAR_MAX    SCHAR_MAX
+#endif
+
+#define SHRT_MIN    (-SHRT_MAX - 1)
+#define SHRT_MAX    32767
+#define USHRT_MAX   65535U
+
+/* Integer is four bytes */
+
+#define INT_MIN     (-INT_MAX - 1)
+#define INT_MAX     2147483647
+#define UINT_MAX    4294967295U
+
+/* These change on 32-bit and 64-bit platforms */
+
+#define LONG_MIN    (-LONG_MAX - 1)
+#define LONG_MAX    2147483647L
+#define ULONG_MAX   4294967295UL
+
+#define LLONG_MIN   (-LLONG_MAX - 1)
+#define LLONG_MAX   9223372036854775807LL
+#define ULLONG_MAX  18446744073709551615ULL
+
+/* A pointer is four bytes */
+
+#define PTR_MIN     (-PTR_MAX - 1)
+#define PTR_MAX     2147483647
+#define UPTR_MAX    4294967295U
+
+#endif /* __ARCH_MISOC_INCLUDE_LIMITS_H */
diff --git a/arch/misoc/include/lm32/irq.h b/arch/misoc/include/lm32/irq.h
new file mode 100644
index 0000000000000000000000000000000000000000..57512bba8840d1ff75beedf304abe3439ed1e0e7
--- /dev/null
+++ b/arch/misoc/include/lm32/irq.h
@@ -0,0 +1,238 @@
+/****************************************************************************
+ * arch/misoc/include/lm32/irq.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_MISOC_INCLUDE_LM32_IRQ_H
+#define __ARCH_MISOC_INCLUDE_LM32_IRQ_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* 32 True interrupts plus the sofware interrupt */
+
+#define LM32_NINTERRUPTS 32
+#define LM32_IRQ_SWINT   32
+#define NR_IRQS          33
+
+/* Registers */
+
+#define REG_X0_NDX    0      /* Holds the value zero */
+#define REG_X1_NDX    1      /* General-purpose/argument 0/return value 0 */
+#define REG_X2_NDX    2      /* General-purpose/argument 1/return value 1 */
+#define REG_X3_NDX    3      /* General-purpose/argument 2 */
+#define REG_X4_NDX    4      /* General-purpose/argument 3 */
+#define REG_X5_NDX    5      /* General-purpose/argument 4 */
+#define REG_X6_NDX    6      /* General-purpose/argument 5 */
+#define REG_X7_NDX    7      /* General-purpose/argument 6 */
+#define REG_X8_NDX    8      /* General-purpose/argument 7 */
+#define REG_X9_NDX    9      /* General-purpose */
+#define REG_X10_NDX   10     /* General-purpose */
+#define REG_X11_NDX   11     /* General-purpose */
+#define REG_X12_NDX   12     /* General-purpose */
+#define REG_X13_NDX   13     /* General-purpose */
+#define REG_X14_NDX   14     /* General-purpose */
+#define REG_X15_NDX   15     /* General-purpose */
+#define REG_X16_NDX   16     /* General-purpose */
+#define REG_X17_NDX   17     /* General-purpose */
+#define REG_X18_NDX   18     /* General-purpose */
+#define REG_X19_NDX   19     /* General-purpose */
+#define REG_X20_NDX   20     /* General-purpose */
+#define REG_X21_NDX   21     /* General-purpose */
+#define REG_X22_NDX   22     /* General-purpose */
+#define REG_X23_NDX   23     /* General-purpose */
+#define REG_X24_NDX   24     /* General-purpose */
+#define REG_X25_NDX   25     /* General-purpose */
+#define REG_X26_NDX   26     /* General-purpose/global pointer */
+#define REG_X27_NDX   27     /* General-purpose/frame pointer */
+#define REG_X28_NDX   28     /* Stack pointer */
+#define REG_X29_NDX   29     /* General-purpose/return address */
+#define REG_X30_NDX   30     /* Exception address */
+#define REG_X31_NDX   31     /* Breakpoint address */
+#define REG_X32_NDX   32     /* Reg IE */
+
+/* Interrupt Context register */
+
+#define XCPTCONTEXT_REGS  33
+#define XCPTCONTEXT_SIZE  (4 * XCPTCONTEXT_REGS)
+
+#ifdef __ASSEMBLY__
+#  define REG_X0      (4*REG_X0_NDX)
+#  define REG_X1      (4*REG_X1_NDX)
+#  define REG_X2      (4*REG_X2_NDX)
+#  define REG_X3      (4*REG_X3_NDX)
+#  define REG_X4      (4*REG_X4_NDX)
+#  define REG_X5      (4*REG_X5_NDX)
+#  define REG_X6      (4*REG_X6_NDX)
+#  define REG_X7      (4*REG_X7_NDX)
+#  define REG_X8      (4*REG_X8_NDX)
+#  define REG_X9      (4*REG_X9_NDX)
+#  define REG_X10     (4*REG_X10_NDX)
+#  define REG_X11     (4*REG_X11_NDX)
+#  define REG_X12     (4*REG_X12_NDX)
+#  define REG_X13     (4*REG_X13_NDX)
+#  define REG_X14     (4*REG_X14_NDX)
+#  define REG_X15     (4*REG_X15_NDX)
+#  define REG_X16     (4*REG_X16_NDX)
+#  define REG_X17     (4*REG_X17_NDX)
+#  define REG_X18     (4*REG_X18_NDX)
+#  define REG_X19     (4*REG_X19_NDX)
+#  define REG_X20     (4*REG_X20_NDX)
+#  define REG_X21     (4*REG_X21_NDX)
+#  define REG_X22     (4*REG_X22_NDX)
+#  define REG_X23     (4*REG_X23_NDX)
+#  define REG_X24     (4*REG_X24_NDX)
+#  define REG_X25     (4*REG_X25_NDX)
+#  define REG_X26     (4*REG_X26_NDX)
+#  define REG_X27     (4*REG_X27_NDX)
+#  define REG_X28     (4*REG_X28_NDX)
+#  define REG_X29     (4*REG_X29_NDX)
+#  define REG_X30     (4*REG_X30_NDX)
+#  define REG_X31     (4*REG_X31_NDX)
+#  define REG_INT_CTX (4*REG_X32_NDX)
+#else
+#  define REG_X0       REG_X0_NDX
+#  define REG_X1       REG_X1_NDX
+#  define REG_X2       REG_X2_NDX
+#  define REG_X3       REG_X3_NDX
+#  define REG_X4       REG_X4_NDX
+#  define REG_X5       REG_X5_NDX
+#  define REG_X6       REG_X6_NDX
+#  define REG_X7       REG_X7_NDX
+#  define REG_X8       REG_X8_NDX
+#  define REG_X9       REG_X9_NDX
+#  define REG_X10      REG_X10_NDX
+#  define REG_X11      REG_X11_NDX
+#  define REG_X12      REG_X12_NDX
+#  define REG_X13      REG_X13_NDX
+#  define REG_X14      REG_X14_NDX
+#  define REG_X15      REG_X15_NDX
+#  define REG_X16      REG_X16_NDX
+#  define REG_X17      REG_X17_NDX
+#  define REG_X18      REG_X18_NDX
+#  define REG_X19      REG_X19_NDX
+#  define REG_X20      REG_X20_NDX
+#  define REG_X21      REG_X21_NDX
+#  define REG_X22      REG_X22_NDX
+#  define REG_X23      REG_X23_NDX
+#  define REG_X24      REG_X24_NDX
+#  define REG_X25      REG_X25_NDX
+#  define REG_X26      REG_X26_NDX
+#  define REG_X27      REG_X27_NDX
+#  define REG_X28      REG_X28_NDX
+#  define REG_X29      REG_X29_NDX
+#  define REG_X30      REG_X30_NDX
+#  define REG_X31      REG_X31_NDX
+#  define REG_INT_CTX  REG_X32_NDX
+#endif
+
+/* Register aliases */
+
+#define REG_GP         REG_X26
+#define REG_FP         REG_X27
+#define REG_SP         REG_X28
+#define REG_RA         REG_X29
+#define REG_EA         REG_X30
+#define REG_BA         REG_X31
+
+#define REG_EPC        REG_X30
+
+#define REG_A0         REG_X1
+#define REG_A1         REG_X2
+#define REG_A2         REG_X3
+#define REG_A3         REG_X4
+#define REG_A4         REG_X5
+#define REG_A5         REG_X6
+#define REG_A6         REG_X7
+#define REG_A7         REG_X8
+
+#define REG_IE         REG_INT_CTX
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+struct xcptcontext
+{
+#ifndef CONFIG_DISABLE_SIGNALS
+  /* The following function pointer is non-NULL if there are pending signals
+   * to be processed.
+   */
+
+  void *sigdeliver;       /* Actual type is sig_deliver_t */
+
+  /* These additional register save locations are used to implement the
+   * signal delivery trampoline.
+   */
+
+  uint32_t saved_epc;     /* Trampoline PC */
+  uint32_t saved_int_ctx; /* Interrupt context with interrupts disabled. */
+
+# ifdef CONFIG_BUILD_KERNEL
+  /* This is the saved address to use when returning from a user-space
+   * signal handler.
+   */
+
+  uint32_t sigreturn;
+
+# endif
+#endif
+
+#ifdef CONFIG_BUILD_KERNEL
+  /* The following array holds information needed to return from each nested
+   * system call.
+   */
+
+  uint8_t nsyscalls;
+  struct xcpt_syscall_s syscall[CONFIG_SYS_NNEST];
+
+#endif
+
+  /* Register save area */
+
+  uint32_t regs[XCPTCONTEXT_REGS];
+};
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_MISOC_INCLUDE_LM32_IRQ_H */
diff --git a/arch/misoc/include/lm32/syscall.h b/arch/misoc/include/lm32/syscall.h
new file mode 100644
index 0000000000000000000000000000000000000000..d0816c7a217a14cef30abb3df77be6edecfa3d91
--- /dev/null
+++ b/arch/misoc/include/lm32/syscall.h
@@ -0,0 +1,208 @@
+/****************************************************************************
+ * arch/misoc/include/lm32/syscall.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through include/syscall.h or include/sys/sycall.h
+ */
+
+#ifndef __ARCH_MISOC_INCLUDE_LM32_SYSCALL_H
+#define __ARCH_MISOC_INCLUDE_LM32_SYSCALL_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#ifndef __ASSEMBLY__
+#  include 
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define SYS_syscall 0x00
+
+/* Configuration ********************************************************************/
+/* SYS call 1 and 2 are defined for internal use by the LM32 port (see
+ * arch/miscoc/include/lm32/syscall.h).  In addition, SYS call 3 is the return from
+ * a SYS call in kernel mode.  The first four syscall values must, therefore, be
+ * reserved (0 is not used).
+ */
+
+#ifdef CONFIG_BUILD_KERNEL
+#  ifndef CONFIG_SYS_RESERVED
+#    error "CONFIG_SYS_RESERVED must be defined to the value 4"
+#  elif CONFIG_SYS_RESERVED != 4
+#    error "CONFIG_SYS_RESERVED must have the value 4"
+#  endif
+#endif
+
+/* sys_call macros ******************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/* Context switching system calls ***************************************************/
+
+/* SYS call 0: (not used) */
+
+/* SYS call 1:
+ *
+ * void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
+ */
+
+#define SYS_restore_context (1)
+#define up_fullcontextrestore(restoreregs) \
+  (void)sys_call1(SYS_restore_context, (uintptr_t)restoreregs)
+
+/* SYS call 2:
+ *
+ * void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
+ */
+
+#define SYS_switch_context (2)
+#define up_switchcontext(saveregs, restoreregs) \
+  (void)sys_call2(SYS_switch_context, (uintptr_t)saveregs, (uintptr_t)restoreregs)
+
+#ifdef CONFIG_BUILD_KERNEL
+/* SYS call 3:
+ *
+ * void up_syscall_return(void);
+ */
+
+#define SYS_syscall_return (3)
+#define up_syscall_return() (void)sys_call0(SYS_syscall_return)
+
+#endif
+#endif /* __ASSEMBLY__ */
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: up_syscall0
+ *
+ * Description:
+ *   System call SYS_ argument and no additional parameters.
+ *
+ ****************************************************************************/
+
+uintptr_t sys_call0(unsigned int nbr);
+
+/****************************************************************************
+ * Name: up_syscall1
+ *
+ * Description:
+ *   System call SYS_ argument and one additional parameter.
+ *
+ ****************************************************************************/
+
+uintptr_t sys_call1(unsigned int nbr, uintptr_t parm1);
+
+/****************************************************************************
+ * Name: up_syscall2
+ *
+ * Description:
+ *   System call SYS_ argument and two additional parameters.
+ *
+ ****************************************************************************/
+
+uintptr_t sys_call2(unsigned int nbr, uintptr_t parm1, uintptr_t parm2);
+
+/****************************************************************************
+ * Name: up_syscall3
+ *
+ * Description:
+ *   System call SYS_ argument and three additional parameters.
+ *
+ ****************************************************************************/
+
+uintptr_t sys_call3(unsigned int nbr, uintptr_t parm1, uintptr_t parm2,
+                    uintptr_t parm3);
+
+/****************************************************************************
+ * Name: up_syscall4
+ *
+ * Description:
+ *   System call SYS_ argument and four additional parameters.
+ *
+ ****************************************************************************/
+
+uintptr_t sys_call4(unsigned int nbr, uintptr_t parm1, uintptr_t parm2,
+                    uintptr_t parm3, uintptr_t parm4);
+
+/****************************************************************************
+ * Name: up_syscall5
+ *
+ * Description:
+ *   System call SYS_ argument and five additional parameters.
+ *
+ ****************************************************************************/
+
+uintptr_t sys_call5(unsigned int nbr, uintptr_t parm1, uintptr_t parm2,
+                    uintptr_t parm3, uintptr_t parm4, uintptr_t parm5);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_MISOC_INCLUDE_LM32_SYSCALL_H */
diff --git a/arch/misoc/include/lm32/types.h b/arch/misoc/include/lm32/types.h
new file mode 100644
index 0000000000000000000000000000000000000000..0e113100f91a276dfc632c2fe898cdce9e92ebfd
--- /dev/null
+++ b/arch/misoc/include/lm32/types.h
@@ -0,0 +1,95 @@
+/****************************************************************************
+ * arch/misoc/include/lm32/types.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through stdint.h
+ */
+
+#ifndef __ARCH_MISOC_INCLUDE_LM32_TYPES_H
+#define __ARCH_MISOC_INCLUDE_LM32_TYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Type Declarations
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/* These are the sizes of the standard integer types.  NOTE that these type
+ * names have a leading underscore character.  This file will be included
+ * (indirectly) by include/stdint.h and typedef'ed to the final name without
+ * the underscore character.  This roundabout way of doings things allows
+ * the stdint.h to be removed from the include/ directory in the event that
+ * the user prefers to use the definitions provided by their toolchain header
+ * files
+ */
+
+typedef signed char        _int8_t;
+typedef unsigned char      _uint8_t;
+
+typedef signed short       _int16_t;
+typedef unsigned short     _uint16_t;
+
+typedef signed int         _int32_t;
+typedef unsigned int       _uint32_t;
+
+typedef signed long long   _int64_t;
+typedef unsigned long long _uint64_t;
+#define __INT64_DEFINED
+
+/* A pointer is 4 bytes */
+
+typedef signed int         _intptr_t;
+typedef unsigned int       _uintptr_t;
+
+/* This is the size of the interrupt state save returned by up_irq_save(). */
+
+typedef unsigned int       irqstate_t;
+
+#endif /* __ASSEMBLY__ */
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#endif /* __ARCH_MISOC_INCLUDE_LM32_TYPES_H */
diff --git a/arch/rgmp/include/arch.h b/arch/misoc/include/syscall.h
similarity index 71%
rename from arch/rgmp/include/arch.h
rename to arch/misoc/include/syscall.h
index af99356ea16a79422950d68cc4cb4abd7f58e494..709ac8fa075539d9f6726263837e95c1e65dd477 100644
--- a/arch/rgmp/include/arch.h
+++ b/arch/misoc/include/syscall.h
@@ -1,12 +1,8 @@
 /****************************************************************************
- * arch/rgmp/include/arch.h
+ * arch/misoc/include/syscall.h
  *
- *   Copyright (C) 2011 Yu Qiang. All rights reserved.
- *   Author: Yu Qiang 
- *
- * This file is a part of NuttX:
- *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -37,27 +33,21 @@
  *
  ****************************************************************************/
 
-#ifndef __RGMP_ARCH_ARCH_H
-#define __RGMP_ARCH_ARCH_H
-
-#include 
-
-#ifndef __ASSEMBLY__
-
-#include 
+/* This file should never be included directed but, rather, only indirectly
+ * through include/syscall.h or include/sys/sycall.h
+ */
 
-struct up_wait {
-    struct up_wait *next;
-    struct tcb_s *task;
-};
+#ifndef __ARCH_MISOC_INCLUDE_SYSCALL_H
+#define __ARCH_MISOC_INCLUDE_SYSCALL_H
 
-extern struct tcb_s *current_task;
-
-void up_sigentry(void);
-
-int up_register_bridge(char *name, int size);
-int up_unregister_bridge(char *name);
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
 
-#endif /* !__ASSEMBLY__ */
+/* Include LM32 architecture-specific syscall macros */
 
+#ifdef CONFIG_ARCH_CHIP_LM32
+# include 
 #endif
+
+#endif /* __ARCH_MISOC_INCLUDE_SYSCALL_H */
diff --git a/arch/misoc/include/types.h b/arch/misoc/include/types.h
new file mode 100644
index 0000000000000000000000000000000000000000..f63ab15f19c9e58b03573f2346bb47ff87fba713
--- /dev/null
+++ b/arch/misoc/include/types.h
@@ -0,0 +1,94 @@
+/****************************************************************************
+ * arch/misoc/include/types.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through stdint.h
+ */
+
+#ifndef __ARCH_MISOC_INCLUDE_TYPESL_H
+#define __ARCH_MISOC_INCLUDE_TYPESL_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Type Declarations
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/* These are the sizes of the standard integer types.  NOTE that these type
+ * names have a leading underscore character.  This file will be included
+ * (indirectly) by include/stdint.h and typedef'ed to the final name without
+ * the underscore character.  This roundabout way of doings things allows
+ * the stdint.h to be removed from the include/ directory in the event that
+ * the user prefers to use the definitions provided by their toolchain header
+ * files
+ */
+
+typedef signed char        _int8_t;
+typedef unsigned char      _uint8_t;
+
+typedef signed short       _int16_t;
+typedef unsigned short     _uint16_t;
+
+typedef signed int         _int32_t;
+typedef unsigned int       _uint32_t;
+
+typedef signed long long   _int64_t;
+typedef unsigned long long _uint64_t;
+#define __INT64_DEFINED
+
+/* A pointer is 4 bytes */
+
+typedef signed int         _intptr_t;
+typedef unsigned int       _uintptr_t;
+
+/* This is the size of the interrupt state save returned by up_irq_save(). */
+
+typedef unsigned int       irqstate_t;
+
+#endif /* __ASSEMBLY__ */
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#endif /* __ARCH_MISOC_INCLUDE_TYPESL_H */
diff --git a/arch/misoc/src/.gitignore b/arch/misoc/src/.gitignore
new file mode 100644
index 0000000000000000000000000000000000000000..dfdfc935431ac8f4a525420ed96ee4f631196522
--- /dev/null
+++ b/arch/misoc/src/.gitignore
@@ -0,0 +1,5 @@
+/.depend
+/Make.dep
+/locked.r
+/board
+/chip
diff --git a/arch/misoc/src/Makefile b/arch/misoc/src/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..19bd124422c778c3f202ad503d414132ce912a61
--- /dev/null
+++ b/arch/misoc/src/Makefile
@@ -0,0 +1,185 @@
+############################################################################
+# arch/misoc/src/Makefile
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+-include chip/Make.defs
+
+ARCH_SUBDIR = lm32
+
+ifeq ($(CONFIG_WINDOWS_NATIVE),y)
+  ARCH_SRCDIR = $(TOPDIR)\arch\$(CONFIG_ARCH)\src
+  NUTTX = "$(TOPDIR)\nuttx$(EXEEXT)"
+  INCLUDES += -I "$(ARCH_SRCDIR)\chip"
+  INCLUDES += -I "$(ARCH_SRCDIR)\common"
+  INCLUDES += -I "$(ARCH_SRCDIR)\$(ARCH_SUBDIR)"
+  INCLUDES += -I "$(TOPDIR)\sched"
+else
+  ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src
+ifeq ($(WINTOOL),y)
+  NUTTX = "${shell cygpath -w $(TOPDIR)/nuttx$(EXEEXT)}"
+  INCLUDES += -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}"
+  INCLUDES += -I "${shell cygpath -w $(ARCH_SRCDIR)/common}"
+  INCLUDES += -I "${shell cygpath -w $(ARCH_SRCDIR)/$(ARCH_SUBDIR)}"
+  INCLUDES += -I "${shell cygpath -w $(TOPDIR)/sched}"
+else
+  NUTTX = "$(TOPDIR)/nuttx$(EXEEXT)"
+  INCLUDES += -I "$(ARCH_SRCDIR)/chip"
+  INCLUDES += -I "$(ARCH_SRCDIR)/common"
+  INCLUDES += -I "$(ARCH_SRCDIR)/$(ARCH_SUBDIR)"
+  INCLUDES += -I "$(TOPDIR)/sched"
+endif
+endif
+
+CPPFLAGS += $(INCLUDES) $(EXTRADEFINES)
+CFLAGS += $(INCLUDES) $(EXTRADEFINES)
+CXXFLAGS += $(INCLUDES) $(EXTRADEFINES)
+AFLAGS += $(INCLUDES) $(EXTRADEFINES)
+
+HEAD_OBJ = $(HEAD_ASRC:.S=$(OBJEXT))
+STARTUP_OBJS ?= $(HEAD_OBJ)
+
+ASRCS = $(CHIP_ASRCS) $(CMN_ASRCS)
+AOBJS = $(ASRCS:.S=$(OBJEXT))
+
+CSRCS = $(CHIP_CSRCS) $(CMN_CSRCS)
+COBJS = $(CSRCS:.c=$(OBJEXT))
+
+SRCS = $(ASRCS) $(CSRCS)
+OBJS = $(AOBJS) $(COBJS)
+
+# Override in Make.defs if linker is not 'ld'
+
+LDSTARTGROUP ?= --start-group
+LDENDGROUP ?= --end-group
+
+LDFLAGS += $(ARCHSCRIPT)
+EXTRA_LIBS ?=
+LINKLIBS ?=
+
+ifeq ($(CONFIG_WINDOWS_NATIVE),y)
+  BOARDMAKE = $(if $(wildcard .\board\Makefile),y,)
+  LIBPATHS += -L"$(TOPDIR)\lib"
+ifeq ($(BOARDMAKE),y)
+  LIBPATHS += -L"$(TOPDIR)\arch\$(CONFIG_ARCH)\src\board"
+endif
+
+else
+  BOARDMAKE = $(if $(wildcard ./board/Makefile),y,)
+
+ifeq ($(WINTOOL),y)
+  LIBPATHS += -L"${shell cygpath -w "$(TOPDIR)/lib"}"
+ifeq ($(BOARDMAKE),y)
+  LIBPATHS += -L"${shell cygpath -w "$(TOPDIR)/arch/$(CONFIG_ARCH)/src/board"}"
+endif
+
+else
+  LIBPATHS += -L"$(TOPDIR)/lib"
+ifeq ($(BOARDMAKE),y)
+  LIBPATHS += -L"$(TOPDIR)/arch/$(CONFIG_ARCH)/src/board"
+endif
+endif
+endif
+
+LDLIBS = $(patsubst %.a,%,$(patsubst lib%,-l%,$(LINKLIBS)))
+ifeq ($(BOARDMAKE),y)
+  LDLIBS += -lboard
+endif
+
+LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}"
+
+VPATH = chip:common:$(ARCH_SUBDIR)
+
+all: $(HEAD_OBJ) libarch$(LIBEXT)
+
+.PHONY: board/libboard$(LIBEXT)
+
+$(AOBJS) $(HEAD_OBJ): %$(OBJEXT): %.S
+	$(call ASSEMBLE, $<, $@)
+
+$(COBJS): %$(OBJEXT): %.c
+	$(call COMPILE, $<, $@)
+
+libarch$(LIBEXT): $(OBJS)
+	$(call ARCHIVE, $@, $(OBJS))
+
+board/libboard$(LIBEXT):
+	$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" libboard$(LIBEXT) EXTRADEFINES=$(EXTRADEFINES)
+
+nuttx$(EXEEXT): $(HEAD_OBJ) board/libboard$(LIBEXT)
+	$(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(NUTTX) $(HEAD_OBJ) $(EXTRA_OBJS) \
+		$(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) $(LDENDGROUP)
+ifneq ($(CONFIG_WINDOWS_NATIVE),y)
+	$(Q) $(NM) $(NUTTX) | \
+	grep -v '\(compiled\)\|\(\$(OBJEXT)$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
+	sort > $(TOPDIR)/System.map
+endif
+
+# This is part of the top-level export target
+
+export_startup: board/libboard$(LIBEXT) $(STARTUP_OBJS)
+	$(Q) if [ -d "$(EXPORT_DIR)/startup" ]; then \
+		cp -f $(STARTUP_OBJS) "$(EXPORT_DIR)/startup"; \
+	 else \
+		echo "$(EXPORT_DIR)/startup does not exist"; \
+		exit 1; \
+	 fi
+
+# Dependencies
+
+.depend: Makefile chip/Make.defs $(SRCS)
+ifeq ($(BOARDMAKE),y)
+	$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" depend
+endif
+	$(Q) $(MKDEP) --dep-path chip --dep-path common --dep-path $(ARCH_SUBDIR) \
+	 "$(CC)" -- $(CFLAGS) -- $(SRCS) >Make.dep
+	$(Q) touch $@
+
+depend: .depend
+
+clean:
+ifeq ($(BOARDMAKE),y)
+	$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" clean
+endif
+	$(call DELFILE, libarch$(LIBEXT))
+	$(call CLEAN)
+
+distclean: clean
+ifeq ($(BOARDMAKE),y)
+	$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" distclean
+endif
+	$(call DELFILE, Make.dep)
+	$(call DELFILE, .depend)
+
+-include Make.dep
diff --git a/arch/misoc/src/common/hw/common.h b/arch/misoc/src/common/hw/common.h
new file mode 100644
index 0000000000000000000000000000000000000000..a6a7a92159f4e2093186abc2dfae6e8ecdc79e85
--- /dev/null
+++ b/arch/misoc/src/common/hw/common.h
@@ -0,0 +1,49 @@
+/****************************************************************************
+ *  arch/misoc/src/common/hw/common.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_MISOC_SRC_COMMON_HW_COMMON_H
+#define __ARCH_MISOC_SRC_COMMON_HW_COMMON_H
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef __ASSEMBLER__
+#  define MMPTR(x) x
+#else
+#  define MMPTR(x) (*((volatile unsigned int *)(x)))
+#endif
+
+#endif /* __ARCH_MISOC_SRC_COMMON_HW_COMMON_H */
diff --git a/arch/misoc/src/common/hw/ethmac_mem.h b/arch/misoc/src/common/hw/ethmac_mem.h
new file mode 100644
index 0000000000000000000000000000000000000000..619648091269340da119e5ade65ed92ee65eb527
--- /dev/null
+++ b/arch/misoc/src/common/hw/ethmac_mem.h
@@ -0,0 +1,54 @@
+/****************************************************************************
+ *  arch/misoc/src/common/hw/emac_mem.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_MISOC_SRC_COMMON_HW_EMAC_MEM_H
+#define __ARCH_MISOC_SRC_COMMON_HW_EMAC_MEM_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define ETHMAC_RX0_BASE	ETHMAC_BASE
+#define ETHMAC_RX1_BASE	(ETHMAC_BASE+0x0800)
+#define ETHMAC_TX0_BASE	(ETHMAC_BASE+0x1000)
+#define ETHMAC_TX1_BASE	(ETHMAC_BASE+0x1800)
+
+#endif /* __ARCH_MISOC_SRC_COMMON_HW_EMAC_MEM_H */
diff --git a/arch/misoc/src/common/hw/flags.h b/arch/misoc/src/common/hw/flags.h
new file mode 100644
index 0000000000000000000000000000000000000000..7ed2f4bf4272300d1fe0b27ad0f807b8226b8b3f
--- /dev/null
+++ b/arch/misoc/src/common/hw/flags.h
@@ -0,0 +1,79 @@
+/****************************************************************************
+ *  arch/misoc/src/common/hw/emac_mem.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_MISOC_SRC_COMMON_HW_FLAGS_H
+#define __ARCH_MISOC_SRC_COMMON_HW_FLAGS_H
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define UART_EV_TX                      0x1
+#define UART_EV_RX                      0x2
+
+#define DFII_CONTROL_SEL                0x01
+#define DFII_CONTROL_CKE                0x02
+#define DFII_CONTROL_ODT                0x04
+#define DFII_CONTROL_RESET_N            0x08
+
+#define DFII_COMMAND_CS                 0x01
+#define DFII_COMMAND_WE                 0x02
+#define DFII_COMMAND_CAS                0x04
+#define DFII_COMMAND_RAS                0x08
+#define DFII_COMMAND_WRDATA             0x10
+#define DFII_COMMAND_RDDATA             0x20
+
+#define ETHMAC_EV_SRAM_WRITER           0x1
+#define ETHMAC_EV_SRAM_READER           0x1
+
+#define CLKGEN_STATUS_BUSY              0x1
+#define CLKGEN_STATUS_PROGDONE          0x2
+#define CLKGEN_STATUS_LOCKED            0x4
+
+#define DVISAMPLER_TOO_LATE             0x1
+#define DVISAMPLER_TOO_EARLY            0x2
+
+#define DVISAMPLER_DELAY_MASTER_CAL     0x01
+#define DVISAMPLER_DELAY_MASTER_RST     0x02
+#define DVISAMPLER_DELAY_SLAVE_CAL      0x04
+#define DVISAMPLER_DELAY_SLAVE_RST      0x08
+#define DVISAMPLER_DELAY_INC            0x10
+#define DVISAMPLER_DELAY_DEC            0x20
+
+#define DVISAMPLER_SLOT_EMPTY           0
+#define DVISAMPLER_SLOT_LOADED          1
+#define DVISAMPLER_SLOT_PENDING         2
+
+#endif /* __ARCH_MISOC_SRC_COMMON_HW_FLAGS_H */
diff --git a/arch/misoc/src/common/misoc.h b/arch/misoc/src/common/misoc.h
new file mode 100644
index 0000000000000000000000000000000000000000..ab99f6aca259854a04ddcd66b1b2ad2e32758a2a
--- /dev/null
+++ b/arch/misoc/src/common/misoc.h
@@ -0,0 +1,170 @@
+/****************************************************************************
+ * arch/misoc/src/common/serial.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_MISOC_SRC_COMMON_MISOC_H
+#define __ARCH_MISOC_SRC_COMMON_MISOC_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Low-level register access */
+
+#define getreg8(a)            (*(volatile uint8_t *)(a))
+#define putreg8(v,a)          (*(volatile uint8_t *)(a) = (v))
+#define getreg16(a)           (*(volatile uint16_t *)(a))
+#define putreg16(v,a)         (*(volatile uint16_t *)(a) = (v))
+#define getreg32(a)           (*(volatile uint32_t *)(a))
+#define putreg32(v,a)         (*(volatile uint32_t *)(a) = (v))
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Name: misoc_timer_initialize
+ *
+ * Description:
+ *   Initialize and start the system timer.
+ *
+ ****************************************************************************/
+
+void misoc_timer_initialize(void);
+
+/****************************************************************************
+ * Name: flush_cpu_dcache
+ *
+ * Description:
+ *  flush cpu cache Data cache
+ *
+ ****************************************************************************/
+
+void flush_cpu_dcache(void);
+
+/****************************************************************************
+ * Name: up_serialinit
+ *
+ * Description:
+ *   Register serial console and serial ports.  This assumes that
+ *   misoc_earlyserialinit was called previously.
+ *
+ ****************************************************************************/
+
+void misoc_serial_initialize(void);
+
+/****************************************************************************
+ * Name: up_net_initialize
+ *
+ * Description:
+ *   Register Network
+ *
+ ****************************************************************************/
+
+int misoc_net_initialize(int intf);
+
+/****************************************************************************
+ * Name: misoc_puts
+ *
+ * Description:
+ *   This is a low-level helper function used to support debug.
+ *
+ ****************************************************************************/
+
+void misoc_puts(const char *str);
+
+/****************************************************************************
+ * Name: misoc_lowputc
+ *
+ * Description:
+ *   Low-level, blocking character output the the serial console.
+ *
+ ****************************************************************************/
+
+void misoc_lowputc(char ch);
+
+/****************************************************************************
+ * Name: misoc_lowputs
+ *
+ * Description:
+ *   This is a low-level helper function used to support debug.
+ *
+ ****************************************************************************/
+
+void misoc_lowputs(const char *str);
+
+/****************************************************************************
+ * Name: modifyreg[N]
+ *
+ * Description:
+ *   Atomic modification of registers.
+ *
+ ****************************************************************************/
+
+void modifyreg8(unsigned int addr, uint8_t clearbits, uint8_t setbits);
+void modifyreg16(unsigned int addr, uint16_t clearbits, uint16_t setbits);
+void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits);
+
+/****************************************************************************
+ * Name: misoc_flush_dcache
+ *
+ * Description:
+ *   Flush the data cache of the cpu
+ *
+ ****************************************************************************/
+
+void misoc_flush_dcache(void);
+
+/****************************************************************************
+ * Name: misoc_flush_icache
+ *
+ * Description:
+ *   Flush the instruction cache of the cpu
+ *
+ ****************************************************************************/
+
+void misoc_flush_icache(void);
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_MISOC_SRC_COMMON_MISOC_H */
diff --git a/arch/misoc/src/common/misoc_flushcache.c b/arch/misoc/src/common/misoc_flushcache.c
new file mode 100644
index 0000000000000000000000000000000000000000..655ba8ab3587f5427da0e6073956441c80e1fd87
--- /dev/null
+++ b/arch/misoc/src/common/misoc_flushcache.c
@@ -0,0 +1,81 @@
+/****************************************************************************
+ * arch/misoc/src/common/misoc_flushcache.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *   Author: Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include "misoc.h"
+
+#ifdef CONFIG_ARCH_CHIP_LM32
+#include "lm32.h"
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: misoc_flush_dcache
+ *
+ * Description:
+ *   Flush the data cache of the cpu
+ *
+ ****************************************************************************/
+
+void misoc_flush_dcache()
+{
+#ifdef CONFIG_ARCH_CHIP_LM32
+  lm32_flush_dcache();
+#endif
+}
+
+/****************************************************************************
+ * Name: misoc_flush_icache
+ *
+ * Description:
+ *   Flush the instruction cache of the cpu
+ *
+ ****************************************************************************/
+
+void misoc_flush_icache()
+{
+#ifdef CONFIG_ARCH_CHIP_LM32
+  lm32_flush_icache();
+#endif
+}
diff --git a/arch/misoc/src/common/misoc_lowputs.c b/arch/misoc/src/common/misoc_lowputs.c
new file mode 100644
index 0000000000000000000000000000000000000000..7b8b962678cb0e3646310000350391c004556c08
--- /dev/null
+++ b/arch/misoc/src/common/misoc_lowputs.c
@@ -0,0 +1,62 @@
+/****************************************************************************
+ * arch/misoc/src/common/misoc_lowputs.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include "misoc.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: misoc_lowputs
+ *
+ * Description:
+ *   This is a low-level helper function used to support debug.
+ *
+ ****************************************************************************/
+
+void misoc_lowputs(const char *str)
+{
+  while (*str)
+    {
+      misoc_lowputc(*str++);
+    }
+}
diff --git a/arch/misoc/src/common/misoc_mdelay.c b/arch/misoc/src/common/misoc_mdelay.c
new file mode 100644
index 0000000000000000000000000000000000000000..2a1ccaa1a140ca0319645a7238a59b2f0c477ff8
--- /dev/null
+++ b/arch/misoc/src/common/misoc_mdelay.c
@@ -0,0 +1,70 @@
+/****************************************************************************
+ *  arch/misoc/src/common/misoc_mdelay.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_mdelay
+ *
+ * Description:
+ *   Delay inline for the requested number of milliseconds.
+ *   *** NOT multi-tasking friendly ***
+ *
+ * ASSUMPTIONS:
+ *   The setting CONFIG_BOARD_LOOPSPERMSEC has been calibrated
+ *
+ ****************************************************************************/
+
+void up_mdelay(unsigned int milliseconds)
+{
+  volatile int i;
+  volatile int j;
+
+  for (i = 0; i < milliseconds; i++)
+    {
+      for (j = 0; j < CONFIG_BOARD_LOOPSPERMSEC; j++)
+        {
+        }
+    }
+}
diff --git a/arch/misoc/src/common/misoc_modifyreg16.c b/arch/misoc/src/common/misoc_modifyreg16.c
new file mode 100644
index 0000000000000000000000000000000000000000..a8502dbe54a6fa8a756bb746c7a6c3842fe1b652
--- /dev/null
+++ b/arch/misoc/src/common/misoc_modifyreg16.c
@@ -0,0 +1,73 @@
+/****************************************************************************
+ * arch/misoc/src/common/misoc_modifyreg16.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "misoc.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: modifyreg16
+ *
+ * Description:
+ *   Atomically modify the specified bits in a memory mapped register
+ *
+ ****************************************************************************/
+
+void modifyreg16(unsigned int addr, uint16_t clearbits, uint16_t setbits)
+{
+  irqstate_t flags;
+  uint16_t   regval;
+
+  flags   = enter_critical_section();
+  regval  = getreg16(addr);
+  regval &= ~clearbits;
+  regval |= setbits;
+  putreg16(regval, addr);
+  leave_critical_section(flags);
+}
diff --git a/arch/misoc/src/common/misoc_modifyreg32.c b/arch/misoc/src/common/misoc_modifyreg32.c
new file mode 100644
index 0000000000000000000000000000000000000000..65eda199abf0585f649fd5fb4ca62d2476504d42
--- /dev/null
+++ b/arch/misoc/src/common/misoc_modifyreg32.c
@@ -0,0 +1,73 @@
+/****************************************************************************
+ * arch/misoc/src/common/misoc_modifyreg32.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "misoc.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: modifyreg32
+ *
+ * Description:
+ *   Atomically modify the specified bits in a memory mapped register
+ *
+ ****************************************************************************/
+
+void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits)
+{
+  irqstate_t flags;
+  uint32_t   regval;
+
+  flags   = enter_critical_section();
+  regval  = getreg32(addr);
+  regval &= ~clearbits;
+  regval |= setbits;
+  putreg32(regval, addr);
+  leave_critical_section(flags);
+}
diff --git a/arch/misoc/src/common/misoc_modifyreg8.c b/arch/misoc/src/common/misoc_modifyreg8.c
new file mode 100644
index 0000000000000000000000000000000000000000..88ba788e7b24d692b5efec4085d098d2bb46d440
--- /dev/null
+++ b/arch/misoc/src/common/misoc_modifyreg8.c
@@ -0,0 +1,73 @@
+/****************************************************************************
+ * arch/misoc/src/common/misoc_modifyreg8.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "misoc.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: modifyreg8
+ *
+ * Description:
+ *   Atomically modify the specified bits in a memory mapped register
+ *
+ ****************************************************************************/
+
+void modifyreg8(unsigned int addr, uint8_t clearbits, uint8_t setbits)
+{
+  irqstate_t flags;
+  uint8_t    regval;
+
+  flags   = enter_critical_section();
+  regval  = getreg8(addr);
+  regval &= ~clearbits;
+  regval |= setbits;
+  putreg8(regval, addr);
+  leave_critical_section(flags);
+}
diff --git a/arch/misoc/src/common/misoc_net.c b/arch/misoc/src/common/misoc_net.c
new file mode 100644
index 0000000000000000000000000000000000000000..6d7b64b62c00f65583732baacc4a6292cd3e103a
--- /dev/null
+++ b/arch/misoc/src/common/misoc_net.c
@@ -0,0 +1,1194 @@
+/****************************************************************************
+ * arch/misoc/src/commong/misoc_net_net.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#if defined(CONFIG_NET) && defined(CONFIG_MISOC_ETHERNET)
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "chip.h"
+#include "hw/flags.h"
+#include "hw/ethmac_mem.h"
+#include "misoc.h"
+
+#ifdef CONFIG_NET_PKT
+#  include 
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* If processing is not done at the interrupt level, then high priority
+ * work queue support is required.
+ */
+
+#if !defined(CONFIG_SCHED_HPWORK)
+  /* REVISIT: The low priority work queue would be preferred if it is avaiable */
+
+#  error High priority work queue support is required
+#endif
+
+/* CONFIG_MISOC_NET_NINTERFACES determines the number of physical interfaces
+ * that will be supported.
+ */
+
+#ifndef CONFIG_MISOC_NET_NINTERFACES
+# define CONFIG_MISOC_NET_NINTERFACES 1
+#endif
+
+/* TX poll delay = 1 seconds. CLK_TCK is the number of clock ticks per second */
+
+#define MISOC_NET_WDDELAY   (1*CLK_TCK)
+
+/* TX timeout = 1 minute */
+
+#define MISOC_NET_TXTIMEOUT (60*CLK_TCK)
+
+/* This is a helper pointer for accessing the contents of the Ethernet header */
+
+#define BUF ((struct eth_hdr_s *)priv->misoc_net_dev.d_buf)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* The misoc_net_driver_s encapsulates all state information for a single hardware
+ * interface
+ */
+
+struct misoc_net_driver_s
+{
+  bool misoc_net_bifup;               /* true:ifup false:ifdown */
+  WDOG_ID misoc_net_txpoll;           /* TX poll timer */
+  WDOG_ID misoc_net_txtimeout;        /* TX timeout timer */
+  struct work_s misoc_net_irqwork;    /* For deferring interrupt work to the work queue */
+  struct work_s misoc_net_pollwork;   /* For deferring poll work to the work queue */
+
+  uint8_t *rx0_buf;                   /* 2 RX and 2 TX buffer */
+  uint8_t *rx1_buf;
+  uint8_t *tx0_buf;
+  uint8_t *tx1_buf;
+
+  uint8_t *tx_buf;
+
+
+  uint8_t tx_slot;                    /* The slot from which we send packet (tx0/tx1) */
+
+  /* This holds the information visible to the NuttX network */
+
+  struct net_driver_s misoc_net_dev;  /* Interface understood by the network */
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* A single packet buffer is used */
+
+static uint8_t g_pktbuf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
+
+/* Driver state structur */
+
+static struct misoc_net_driver_s g_misoc_net[CONFIG_MISOC_NET_NINTERFACES];
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* Common TX logic */
+
+static int  misoc_net_transmit(FAR struct misoc_net_driver_s *priv);
+static int  misoc_net_txpoll(FAR struct net_driver_s *dev);
+
+/* Interrupt handling */
+
+static void misoc_net_receive(FAR struct misoc_net_driver_s *priv);
+static void misoc_net_txdone(FAR struct misoc_net_driver_s *priv);
+
+static void misoc_net_interrupt_work(FAR void *arg);
+static int  misoc_net_interrupt(int irq, FAR void *context, FAR void *arg);
+
+/* Watchdog timer expirations */
+
+static void misoc_net_txtimeout_work(FAR void *arg);
+static void misoc_net_txtimeout_expiry(int argc, wdparm_t arg, ...);
+
+static void misoc_net_poll_work(FAR void *arg);
+static void misoc_net_poll_expiry(int argc, wdparm_t arg, ...);
+
+/* NuttX callback functions */
+
+static int misoc_net_ifup(FAR struct net_driver_s *dev);
+static int misoc_net_ifdown(FAR struct net_driver_s *dev);
+
+static void misoc_net_txavail_work(FAR void *arg);
+static int misoc_net_txavail(FAR struct net_driver_s *dev);
+
+#if defined(CONFIG_NET_IGMP) || defined(CONFIG_NET_ICMPv6)
+static int misoc_net_addmac(FAR struct net_driver_s *dev, FAR const uint8_t *mac);
+#ifdef CONFIG_NET_IGMP
+static int misoc_net_rmmac(FAR struct net_driver_s *dev, FAR const uint8_t *mac);
+#endif
+#ifdef CONFIG_NET_ICMPv6
+static void misoc_net_ipv6multicast(FAR struct misoc_net_driver_s *priv);
+#endif
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function: misoc_net_transmit
+ *
+ * Description:
+ *   Start hardware transmission.  Called either from the txdone interrupt
+ *   handling or from watchdog based polling.
+ *
+ * Parameters:
+ *   priv - Reference to the driver state structure
+ *
+ * Returned Value:
+ *   OK on success; a negated errno on failure
+ *
+ * Assumptions:
+ *   May or may not be called from an interrupt handler.  In either case,
+ *   the network is locked.
+ *
+ ****************************************************************************/
+
+static int misoc_net_transmit(FAR struct misoc_net_driver_s *priv)
+{
+  /* Verify that the hardware is ready to send another packet.  If we get
+   * here, then we are committed to sending a packet; Higher level logic
+   * must have assured that there is no transmission in progress.
+   */
+
+  /* Increment statistics */
+
+  NETDEV_TXPACKETS(priv->misoc_net_dev);
+
+  /* Send the packet: address=priv->misoc_net_dev.d_buf,
+   * length=priv->misoc_net_dev.d_len
+   *
+   * NOTE: This memcpy could be avoided by setting tx_buf
+   * to the d_buf pointer and setting d_buf to an alternate
+   * buffer.  Some additional buffer management logic would
+   * be required.
+   */
+
+  memcpy(priv->tx_buf, priv->misoc_net_dev.d_buf,
+         priv->misoc_net_dev.d_len);
+
+  /* Choose the slot on which we write */
+
+  ethmac_sram_reader_slot_write(priv->tx_slot);
+
+  /* Write the len */
+
+  if (priv->misoc_net_dev.d_len < 60)
+    {
+      ethmac_sram_reader_length_write(60);
+    }
+  else
+    {
+      ethmac_sram_reader_length_write(priv->misoc_net_dev.d_len);
+    }
+
+  /* Trigger the writing */
+
+  ethmac_sram_reader_start_write(1);
+
+  /* switch tx slot */
+
+  priv->tx_slot = (priv->tx_slot+1)%2;
+  if (priv->tx_slot)
+    {
+      priv->tx_buf = priv->tx1_buf;
+    }
+  else
+    {
+      priv->tx_buf = priv->tx0_buf;
+    }
+
+  /* Enable Tx interrupts */
+
+  ethmac_sram_reader_ev_enable_write(1);
+
+  /* Setup the TX timeout watchdog (perhaps restarting the timer) */
+
+  (void)wd_start(priv->misoc_net_txtimeout, MISOC_NET_TXTIMEOUT,
+                 misoc_net_txtimeout_expiry, 1, (wdparm_t)priv);
+  return OK;
+}
+
+/****************************************************************************
+ * Function: misoc_net_txpoll
+ *
+ * Description:
+ *   The transmitter is available, check if the network has any outgoing
+ *   packets ready to send.  This is a callback from devif_poll().
+ *   devif_poll() may be called:
+ *
+ *   1. When the preceding TX packet send is complete,
+ *   2. When the preceding TX packet send timesout and the interface is reset
+ *   3. During normal TX polling
+ *
+ * Parameters:
+ *   dev - Reference to the NuttX driver state structure
+ *
+ * Returned Value:
+ *   OK on success; a negated errno on failure
+ *
+ * Assumptions:
+ *   May or may not be called from an interrupt handler.  In either case,
+ *   the network is locked.
+ *
+ ****************************************************************************/
+
+static int misoc_net_txpoll(FAR struct net_driver_s *dev)
+{
+  FAR struct misoc_net_driver_s *priv = (FAR struct misoc_net_driver_s *)dev->d_private;
+
+  /* If the polling resulted in data that should be sent out on the network,
+   * the field d_len is set to a value > 0.
+   */
+
+  if (priv->misoc_net_dev.d_len > 0)
+    {
+      /* Look up the destination MAC address and add it to the Ethernet
+       * header.
+       */
+
+#ifdef CONFIG_NET_IPv4
+#ifdef CONFIG_NET_IPv6
+      if (IFF_IS_IPv4(priv->misoc_net_dev.d_flags))
+#endif
+        {
+          arp_out(&priv->misoc_net_dev);
+        }
+#endif /* CONFIG_NET_IPv4 */
+
+#ifdef CONFIG_NET_IPv6
+#ifdef CONFIG_NET_IPv4
+      else
+#endif
+        {
+          neighbor_out(&priv->misoc_net_dev);
+        }
+#endif /* CONFIG_NET_IPv6 */
+
+      /* Send the packet */
+
+      misoc_net_transmit(priv);
+
+      /* Check if there is room in the device to hold another packet. If not,
+       * return a non-zero value to terminate the poll.
+       */
+    }
+
+  /* If zero is returned, the polling will continue until all connections have
+   * been examined.
+   */
+
+  return 0;
+}
+
+/****************************************************************************
+ * Function: misoc_net_receive
+ *
+ * Description:
+ *   An interrupt was received indicating the availability of a new RX packet
+ *
+ * Parameters:
+ *   priv - Reference to the driver state structure
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   The network is locked.
+ *
+ ****************************************************************************/
+
+static void misoc_net_receive(FAR struct misoc_net_driver_s *priv)
+{
+  uint8_t rxslot;
+  uint32_t rxlen;
+
+  do
+    {
+      /* Check for errors and update statistics */
+
+      /* Check if the packet is a valid size for the network buffer
+       * configuration.
+       */
+
+      /* Find rx slot */
+
+      rxslot = ethmac_sram_writer_slot_read();
+
+      /* Get rx len */
+
+      rxlen = ethmac_sram_writer_length_read();
+
+      /* Copy the data data from the hardware to priv->misoc_net_dev.d_buf.  Set
+       * amount of data in priv->misoc_net_dev.d_len
+       *
+       * NOTE: These memcpy's could be avoided by simply setting the d_buf
+       * pointer to the rx*_buf containing the received data.  Some additional
+       * buffer management logic would also be required.
+       */
+
+      misoc_flush_dcache();
+
+      if (rxslot)
+        {
+          memcpy(priv->misoc_net_dev.d_buf, priv->rx1_buf, rxlen);
+        }
+      else
+        {
+          memcpy(priv->misoc_net_dev.d_buf, priv->rx0_buf, rxlen);
+        }
+
+      /* Clear event pending */
+
+      ethmac_sram_writer_ev_pending_write(1);
+
+      priv->misoc_net_dev.d_len = rxlen;
+
+#ifdef CONFIG_NET_PKT
+      /* When packet sockets are enabled, feed the frame into the packet tap */
+
+       pkt_input(&priv->misoc_net_dev);
+#endif
+
+      /* We only accept IP packets of the configured type and ARP packets */
+
+#ifdef CONFIG_NET_IPv4
+      if (BUF->type == HTONS(ETHTYPE_IP))
+        {
+          ninfo("IPv4 frame\n");
+          NETDEV_RXIPV4(&priv->misoc_net_dev);
+
+          /* Handle ARP on input then give the IPv4 packet to the network
+           * layer
+           */
+
+          arp_ipin(&priv->misoc_net_dev);
+          ipv4_input(&priv->misoc_net_dev);
+
+          /* If the above function invocation resulted in data that should be
+           * sent out on the network, the field  d_len will set to a value > 0.
+           */
+
+          if (priv->misoc_net_dev.d_len > 0)
+            {
+              /* Update the Ethernet header with the correct MAC address */
+
+#ifdef CONFIG_NET_IPv6
+              if (IFF_IS_IPv4(priv->misoc_net_dev.d_flags))
+#endif
+                {
+                  arp_out(&priv->misoc_net_dev);
+                }
+#ifdef CONFIG_NET_IPv6
+              else
+                {
+                  neighbor_out(&kel->misoc_net_dev);
+                }
+#endif
+
+              /* And send the packet */
+
+              misoc_net_transmit(priv);
+            }
+        }
+      else
+#endif
+#ifdef CONFIG_NET_IPv6
+      if (BUF->type == HTONS(ETHTYPE_IP6))
+        {
+          ninfo("Iv6 frame\n");
+          NETDEV_RXIPV6(&priv->misoc_net_dev);
+
+          /* Give the IPv6 packet to the network layer */
+
+          ipv6_input(&priv->misoc_net_dev);
+
+          /* If the above function invocation resulted in data that should be
+           * sent out on the network, the field  d_len will set to a value > 0.
+           */
+
+          if (priv->misoc_net_dev.d_len > 0)
+            {
+              /* Update the Ethernet header with the correct MAC address */
+
+#ifdef CONFIG_NET_IPv4
+              if (IFF_IS_IPv4(priv->misoc_net_dev.d_flags))
+                {
+                  arp_out(&priv->misoc_net_dev);
+                }
+              else
+#endif
+#ifdef CONFIG_NET_IPv6
+                {
+                  neighbor_out(&priv->misoc_net_dev);
+                }
+#endif
+
+              /* And send the packet */
+
+              misoc_net_transmit(priv);
+            }
+        }
+      else
+#endif
+#ifdef CONFIG_NET_ARP
+      if (BUF->type == htons(ETHTYPE_ARP))
+        {
+          arp_arpin(&priv->misoc_net_dev);
+          NETDEV_RXARP(&priv->misoc_net_dev);
+
+          /* If the above function invocation resulted in data that should be
+           * sent out on the network, the field  d_len will set to a value > 0.
+           */
+
+          if (priv->misoc_net_dev.d_len > 0)
+            {
+              misoc_net_transmit(priv);
+            }
+        }
+#endif
+      else
+        {
+          NETDEV_RXDROPPED(&priv->misoc_net_dev);
+        }
+    }
+  while (ethmac_sram_writer_ev_pending_read() & ETHMAC_EV_SRAM_WRITER);
+}
+
+/****************************************************************************
+ * Function: misoc_net_txdone
+ *
+ * Description:
+ *   An interrupt was received indicating that the last TX packet(s) is done
+ *
+ * Parameters:
+ *   priv - Reference to the driver state structure
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   The network is locked.
+ *
+ ****************************************************************************/
+
+static void misoc_net_txdone(FAR struct misoc_net_driver_s *priv)
+{
+  /* Check for errors and update statistics */
+
+  NETDEV_TXDONE(priv->misoc_net_dev);
+
+  /* Check if there are pending transmissions */
+
+  /* If no further transmissions are pending, then cancel the TX timeout and
+   * disable further Tx interrupts.
+   */
+
+  wd_cancel(priv->misoc_net_txtimeout);
+
+  /* And disable further TX interrupts. */
+
+  ethmac_sram_reader_ev_enable_write(0);
+
+  /* In any event, poll the network for new TX data */
+
+  (void)devif_poll(&priv->misoc_net_dev, misoc_net_txpoll);
+}
+
+/****************************************************************************
+ * Function: misoc_net_interrupt_work
+ *
+ * Description:
+ *   Perform interrupt related work from the worker thread
+ *
+ * Parameters:
+ *   arg - The argument passed when work_queue() was called.
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *   The network is locked.
+ *
+ ****************************************************************************/
+
+static void misoc_net_interrupt_work(FAR void *arg)
+{
+  FAR struct misoc_net_driver_s *priv = (FAR struct misoc_net_driver_s *)arg;
+
+  /* Process pending Ethernet interrupts */
+
+  net_lock();
+
+  /* Check if we received an incoming packet, if so, call misoc_net_receive() */
+
+  if (ethmac_sram_writer_ev_pending_read() & ETHMAC_EV_SRAM_WRITER)
+    {
+      misoc_net_receive(priv);
+    }
+
+  /* Check if a packet transmission just completed.  If so, call misoc_net_txdone.
+   * This may disable further Tx interrupts if there are no pending
+   * transmissions.
+   */
+
+  if (ethmac_sram_reader_ev_pending_read() & ETHMAC_EV_SRAM_READER)
+    {
+      misoc_net_txdone(priv);
+      ethmac_sram_reader_ev_pending_write(1);
+    }
+
+  net_unlock();
+
+  /* Re-enable Ethernet interrupts */
+
+  up_enable_irq(ETHMAC_INTERRUPT);
+}
+
+/****************************************************************************
+ * Function: misoc_net_interrupt
+ *
+ * Description:
+ *   Hardware interrupt handler
+ *
+ * Parameters:
+ *   irq     - Number of the IRQ that generated the interrupt
+ *   context - Interrupt register state save info (architecture-specific)
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *
+ ****************************************************************************/
+
+static int misoc_net_interrupt(int irq, FAR void *context, FAR void *arg)
+{
+  FAR struct misoc_net_driver_s *priv = &g_misoc_net[0];
+
+  /* Disable further Ethernet interrupts.  Because Ethernet interrupts are
+   * also disabled if the TX timeout event occurs, there can be no race
+   * condition here.
+   */
+
+  /* TODO: Determine if a TX transfer just completed */
+
+  if (ethmac_sram_reader_ev_pending_read() & ETHMAC_EV_SRAM_READER)
+    {
+      /* If a TX transfer just completed, then cancel the TX timeout so
+       * there will be do race condition between any subsequent timeout
+       * expiration and the deferred interrupt processing.
+       */
+
+       wd_cancel(priv->misoc_net_txtimeout);
+    }
+
+  /* Schedule to perform the interrupt processing on the worker thread. */
+
+  work_queue(HPWORK, &priv->misoc_net_irqwork, misoc_net_interrupt_work, priv, 0);
+  return OK;
+}
+
+/****************************************************************************
+ * Function: misoc_net_txtimeout_work
+ *
+ * Description:
+ *   Perform TX timeout related work from the worker thread
+ *
+ * Parameters:
+ *   arg - The argument passed when work_queue() as called.
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *   The network is locked.
+ *
+ ****************************************************************************/
+
+static void misoc_net_txtimeout_work(FAR void *arg)
+{
+  FAR struct misoc_net_driver_s *priv = (FAR struct misoc_net_driver_s *)arg;
+
+  /* Increment statistics and dump debug info */
+
+  net_lock();
+  NETDEV_TXTIMEOUTS(priv->misoc_net_dev);
+
+  /* Then reset the hardware */
+
+  /* Then poll the network for new XMIT data */
+
+  (void)devif_poll(&priv->misoc_net_dev, misoc_net_txpoll);
+  net_unlock();
+}
+
+/****************************************************************************
+ * Function: misoc_net_txtimeout_expiry
+ *
+ * Description:
+ *   Our TX watchdog timed out.  Called from the timer interrupt handler.
+ *   The last TX never completed.  Reset the hardware and start again.
+ *
+ * Parameters:
+ *   argc - The number of available arguments
+ *   arg  - The first argument
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Global interrupts are disabled by the watchdog logic.
+ *
+ ****************************************************************************/
+
+static void misoc_net_txtimeout_expiry(int argc, wdparm_t arg, ...)
+{
+  FAR struct misoc_net_driver_s *priv = (FAR struct misoc_net_driver_s *)arg;
+
+  /* Disable further Ethernet interrupts.  This will prevent some race
+   * conditions with interrupt work.  There is still a potential race
+   * condition with interrupt work that is already queued and in progress.
+   */
+
+  //up_disable_irq(ETHMAC_INTERRUPT);
+
+  /* Schedule to perform the TX timeout processing on the worker thread. */
+
+  work_queue(HPWORK, &priv->misoc_net_irqwork, misoc_net_txtimeout_work, priv, 0);
+}
+
+/****************************************************************************
+ * Function: misoc_net_poll_work
+ *
+ * Description:
+ *   Perform periodic polling from the worker thread
+ *
+ * Parameters:
+ *   arg - The argument passed when work_queue() as called.
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *   The network is locked.
+ *
+ ****************************************************************************/
+
+static void misoc_net_poll_work(FAR void *arg)
+{
+  FAR struct misoc_net_driver_s *priv = (FAR struct misoc_net_driver_s *)arg;
+
+  /* Perform the poll */
+
+  net_lock();
+
+  /* Check if there is room in the send another TX packet.  We cannot perform
+   * the TX poll if he are unable to accept another packet for transmission.
+   */
+
+  /* If so, update TCP timing states and poll the network for new XMIT data.
+   * Hmmm.. might be bug here.  Does this mean if there is a transmit in
+   * progress, we will missing TCP time state updates?
+   */
+
+  (void)devif_timer(&priv->misoc_net_dev, misoc_net_txpoll);
+
+  /* Setup the watchdog poll timer again */
+
+  (void)wd_start(priv->misoc_net_txpoll, MISOC_NET_WDDELAY, misoc_net_poll_expiry, 1,
+                 (wdparm_t)priv);
+
+  net_unlock();
+}
+
+/****************************************************************************
+ * Function: misoc_net_poll_expiry
+ *
+ * Description:
+ *   Periodic timer handler.  Called from the timer interrupt handler.
+ *
+ * Parameters:
+ *   argc - The number of available arguments
+ *   arg  - The first argument
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Global interrupts are disabled by the watchdog logic.
+ *
+ ****************************************************************************/
+
+static void misoc_net_poll_expiry(int argc, wdparm_t arg, ...)
+{
+  FAR struct misoc_net_driver_s *priv = (FAR struct misoc_net_driver_s *)arg;
+
+  /* Schedule to perform the interrupt processing on the worker thread. */
+
+  work_queue(HPWORK, &priv->misoc_net_pollwork, misoc_net_poll_work, priv, 0);
+}
+
+/****************************************************************************
+ * Function: misoc_net_ifup
+ *
+ * Description:
+ *   NuttX Callback: Bring up the Ethernet interface when an IP address is
+ *   provided
+ *
+ * Parameters:
+ *   dev - Reference to the NuttX driver state structure
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *
+ ****************************************************************************/
+
+static int misoc_net_ifup(FAR struct net_driver_s *dev)
+{
+  FAR struct misoc_net_driver_s *priv = (FAR struct misoc_net_driver_s *)dev->d_private;
+
+#ifdef CONFIG_NET_IPv4
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+#endif
+#ifdef CONFIG_NET_IPv6
+  ninfo("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+        dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
+        dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
+        dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
+#endif
+
+  /* Initialize PHYs, the Ethernet interface, and setup up Ethernet interrupts */
+
+  /* Instantiate the MAC address from priv->misoc_net_dev.d_mac.ether_addr_octet */
+
+#ifdef CONFIG_NET_ICMPv6
+  /* Set up IPv6 multicast address filtering */
+
+  misoc_net_ipv6multicast(priv);
+#endif
+
+  /* Set and activate a timer process */
+
+  (void)wd_start(priv->misoc_net_txpoll, MISOC_NET_WDDELAY, misoc_net_poll_expiry, 1,
+                 (wdparm_t)priv);
+
+  priv->misoc_net_bifup = true;
+  up_enable_irq(ETHMAC_INTERRUPT);
+
+  /* Enable the RX Event Handler */
+
+  ethmac_sram_writer_ev_enable_write(1);
+  return OK;
+}
+
+/****************************************************************************
+ * Function: misoc_net_ifdown
+ *
+ * Description:
+ *   NuttX Callback: Stop the interface.
+ *
+ * Parameters:
+ *   dev - Reference to the NuttX driver state structure
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *
+ ****************************************************************************/
+
+static int misoc_net_ifdown(FAR struct net_driver_s *dev)
+{
+  FAR struct misoc_net_driver_s *priv = (FAR struct misoc_net_driver_s *)dev->d_private;
+  irqstate_t flags;
+
+  /* Disable the Ethernet interrupt */
+
+  flags = enter_critical_section();
+  up_disable_irq(ETHMAC_INTERRUPT);
+
+  /* Cancel the TX poll timer and TX timeout timers */
+
+  wd_cancel(priv->misoc_net_txpoll);
+  wd_cancel(priv->misoc_net_txtimeout);
+
+  /* Put the EMAC in its reset, non-operational state.  This should be
+   * a known configuration that will guarantee the misoc_net_ifup() always
+   * successfully brings the interface back up.
+   */
+
+  /* Mark the device "down" */
+
+  priv->misoc_net_bifup = false;
+  leave_critical_section(flags);
+  return OK;
+}
+
+/****************************************************************************
+ * Function: misoc_net_txavail_work
+ *
+ * Description:
+ *   Perform an out-of-cycle poll on the worker thread.
+ *
+ * Parameters:
+ *   arg - Reference to the NuttX driver state structure (cast to void*)
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Called on the higher priority worker thread.
+ *
+ ****************************************************************************/
+
+static void misoc_net_txavail_work(FAR void *arg)
+{
+  FAR struct misoc_net_driver_s *priv = (FAR struct misoc_net_driver_s *)arg;
+
+  /* Ignore the notification if the interface is not yet up */
+
+  net_lock();
+  if (priv->misoc_net_bifup)
+    {
+      /* Check if there is room in the hardware to hold another outgoing packet. */
+
+      if (!ethmac_sram_reader_ready_read())
+        {
+          /* If so, then poll the network for new XMIT data */
+
+          (void)devif_poll(&priv->misoc_net_dev, misoc_net_txpoll);
+        }
+    }
+
+  net_unlock();
+}
+
+/****************************************************************************
+ * Function: misoc_net_txavail
+ *
+ * Description:
+ *   Driver callback invoked when new TX data is available.  This is a
+ *   stimulus perform an out-of-cycle poll and, thereby, reduce the TX
+ *   latency.
+ *
+ * Parameters:
+ *   dev - Reference to the NuttX driver state structure
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Called in normal user mode
+ *
+ ****************************************************************************/
+
+static int misoc_net_txavail(FAR struct net_driver_s *dev)
+{
+  FAR struct misoc_net_driver_s *priv = (FAR struct misoc_net_driver_s *)dev->d_private;
+
+  /* Is our single work structure available?  It may not be if there are
+   * pending interrupt actions and we will have to ignore the Tx
+   * availability action.
+   */
+
+  if (work_available(&priv->misoc_net_pollwork))
+    {
+      /* Schedule to serialize the poll on the worker thread. */
+
+      work_queue(HPWORK, &priv->misoc_net_pollwork, misoc_net_txavail_work, priv, 0);
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Function: misoc_net_addmac
+ *
+ * Description:
+ *   NuttX Callback: Add the specified MAC address to the hardware multicast
+ *   address filtering
+ *
+ * Parameters:
+ *   dev  - Reference to the NuttX driver state structure
+ *   mac  - The MAC address to be added
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_NET_IGMP) || defined(CONFIG_NET_ICMPv6)
+static int misoc_net_addmac(FAR struct net_driver_s *dev, FAR const uint8_t *mac)
+{
+  FAR struct misoc_net_driver_s *priv = (FAR struct misoc_net_driver_s *)dev->d_private;
+
+  /* Add the MAC address to the hardware multicast routing table */
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Function: misoc_net_rmmac
+ *
+ * Description:
+ *   NuttX Callback: Remove the specified MAC address from the hardware multicast
+ *   address filtering
+ *
+ * Parameters:
+ *   dev  - Reference to the NuttX driver state structure
+ *   mac  - The MAC address to be removed
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_NET_IGMP
+static int misoc_net_rmmac(FAR struct net_driver_s *dev, FAR const uint8_t *mac)
+{
+  FAR struct misoc_net_driver_s *priv = (FAR struct misoc_net_driver_s *)dev->d_private;
+
+  /* Add the MAC address to the hardware multicast routing table */
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Function: misoc_net_ipv6multicast
+ *
+ * Description:
+ *   Configure the IPv6 multicast MAC address.
+ *
+ * Parameters:
+ *   priv - A reference to the private driver state structure
+ *
+ * Returned Value:
+ *   OK on success; Negated errno on failure.
+ *
+ * Assumptions:
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_NET_ICMPv6
+static void misoc_net_ipv6multicast(FAR struct misoc_net_driver_s *priv)
+{
+  FAR struct net_driver_s *dev;
+  uint16_t tmp16;
+  uint8_t mac[6];
+
+  /* For ICMPv6, we need to add the IPv6 multicast address
+   *
+   * For IPv6 multicast addresses, the Ethernet MAC is derived by
+   * the four low-order octets OR'ed with the MAC 33:33:00:00:00:00,
+   * so for example the IPv6 address FF02:DEAD:BEEF::1:3 would map
+   * to the Ethernet MAC address 33:33:00:01:00:03.
+   *
+   * NOTES:  This appears correct for the ICMPv6 Router Solicitation
+   * Message, but the ICMPv6 Neighbor Solicitation message seems to
+   * use 33:33:ff:01:00:03.
+   */
+
+  mac[0] = 0x33;
+  mac[1] = 0x33;
+
+  dev    = &priv->dev;
+  tmp16  = dev->d_ipv6addr[6];
+  mac[2] = 0xff;
+  mac[3] = tmp16 >> 8;
+
+  tmp16  = dev->d_ipv6addr[7];
+  mac[4] = tmp16 & 0xff;
+  mac[5] = tmp16 >> 8;
+
+  ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+
+  (void)misoc_net_addmac(dev, mac);
+
+#ifdef CONFIG_NET_ICMPv6_AUTOCONF
+  /* Add the IPv6 all link-local nodes Ethernet address.  This is the
+   * address that we expect to receive ICMPv6 Router Advertisement
+   * packets.
+   */
+
+  (void)misoc_net_addmac(dev, g_ipv6_ethallnodes.ether_addr_octet);
+
+#endif /* CONFIG_NET_ICMPv6_AUTOCONF */
+#ifdef CONFIG_NET_ICMPv6_ROUTER
+  /* Add the IPv6 all link-local routers Ethernet address.  This is the
+   * address that we expect to receive ICMPv6 Router Solicitation
+   * packets.
+   */
+
+  (void)misoc_net_addmac(dev, g_ipv6_ethallrouters.ether_addr_octet);
+
+#endif /* CONFIG_NET_ICMPv6_ROUTER */
+}
+#endif /* CONFIG_NET_ICMPv6 */
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function: misoc_net_initialize
+ *
+ * Description:
+ *   Initialize the Ethernet controller and driver
+ *
+ * Parameters:
+ *   intf - In the case where there are multiple EMACs, this value
+ *          identifies which EMAC is to be initialized.
+ *
+ * Returned Value:
+ *   OK on success; Negated errno on failure.
+ *
+ * Assumptions:
+ *
+ ****************************************************************************/
+
+int misoc_net_initialize(int intf)
+{
+  FAR struct misoc_net_driver_s *priv;
+
+  /* Get the interface structure associated with this interface number. */
+
+  DEBUGASSERT(intf < CONFIG_MISOC_NET_NINTERFACES);
+  priv = &g_misoc_net[intf];
+
+  /* Check if a Ethernet chip is recognized at its I/O base */
+
+  /* Attach the IRQ to the driver */
+
+  if (irq_attach(ETHMAC_INTERRUPT, misoc_net_interrupt, NULL))
+    {
+      /* We could not attach the ISR to the interrupt */
+
+      return -EAGAIN;
+    }
+
+  /* clear pending int */
+
+  ethmac_sram_writer_ev_pending_write(1);
+  ethmac_sram_reader_ev_pending_write(1);
+
+  /* Initialize the driver structure */
+
+  memset(priv, 0, sizeof(struct misoc_net_driver_s));
+  priv->rx0_buf = (uint8_t *)ETHMAC_RX0_BASE;
+  priv->rx1_buf = (uint8_t *)ETHMAC_RX1_BASE;
+  priv->tx0_buf = (uint8_t *)ETHMAC_TX0_BASE;
+  priv->tx1_buf = (uint8_t *)ETHMAC_TX1_BASE;
+  priv->tx_buf = priv->tx0_buf;
+  priv->tx_slot=0;
+
+  priv->misoc_net_dev.d_buf     = g_pktbuf;           /* Single packet buffer */
+  priv->misoc_net_dev.d_ifup    = misoc_net_ifup;     /* I/F up (new IP address) callback */
+  priv->misoc_net_dev.d_ifdown  = misoc_net_ifdown;   /* I/F down callback */
+  priv->misoc_net_dev.d_txavail = misoc_net_txavail;  /* New TX data callback */
+#ifdef CONFIG_NET_IGMP
+  priv->misoc_net_dev.d_addmac  = misoc_net_addmac;   /* Add multicast MAC address */
+  priv->misoc_net_dev.d_rmmac   = misoc_net_rmmac;    /* Remove multicast MAC address */
+#endif
+  priv->misoc_net_dev.d_private = (FAR void *)g_misoc_net; /* Used to recover private state from dev */
+
+  /* Create a watchdog for timing polling for and timing of transmisstions */
+
+  priv->misoc_net_txpoll       = wd_create();    /* Create periodic poll timer */
+  priv->misoc_net_txtimeout    = wd_create();    /* Create TX timeout timer */
+
+  /* Put the interface in the down state.  This usually amounts to resetting
+   * the device and/or calling misoc_net_ifdown().
+   */
+
+  /* Read the MAC address from the hardware into
+   * priv->misoc_net_dev.d_mac.ether_addr_octet
+   */
+
+  /* Register the device with the OS so that socket IOCTLs can be performed */
+
+  (void)netdev_register(&priv->misoc_net_dev, NET_LL_ETHERNET);
+  return OK;
+}
+
+#endif /* CONFIG_NET && CONFIG_MISOC_NET_ETHERNET */
diff --git a/arch/misoc/src/common/misoc_puts.c b/arch/misoc/src/common/misoc_puts.c
new file mode 100644
index 0000000000000000000000000000000000000000..f048b74795d197afce8994ed5de9986ba979876f
--- /dev/null
+++ b/arch/misoc/src/common/misoc_puts.c
@@ -0,0 +1,63 @@
+/****************************************************************************
+ * arch/misoc/src/common/misoc_puts.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#include "misoc.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: misoc_puts
+ *
+ * Description:
+ *   This is a low-level helper function used to support debug.
+ *
+ ****************************************************************************/
+
+void misoc_puts(const char *str)
+{
+  while (*str)
+    {
+      up_putc(*str++);
+    }
+}
diff --git a/arch/misoc/src/common/misoc_serial.c b/arch/misoc/src/common/misoc_serial.c
new file mode 100644
index 0000000000000000000000000000000000000000..b64b0ea737bf6b296384de6aae906e5a460cad5c
--- /dev/null
+++ b/arch/misoc/src/common/misoc_serial.c
@@ -0,0 +1,665 @@
+/****************************************************************************
+ * arch/misoc/src/lm32/lm32_blocktask.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+
+#include "chip.h"
+#include "hw/flags.h"
+#include "misoc.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#undef HAVE_UART_DEVICE
+#if defined(CONFIG_MISOC_UART1) || defined(CONFIG_MISOC_UART2)
+#  define HAVE_UART_DEVICE 1
+#endif
+
+/* Is there a serial console?  There should be no more than one defined.  It
+ * could be on any UARTn, n=1,.. CHIP_NUARTS
+ */
+
+#if defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_MISOC_UART1)
+#  undef CONFIG_UART2_SERIAL_CONSOLE
+#  define HAVE_SERIAL_CONSOLE 1
+#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_MISOC_UART2)
+#  undef CONFIG_UART1_SERIAL_CONSOLE
+#  define HAVE_SERIAL_CONSOLE 1
+#else
+#  undef CONFIG_UART1_SERIAL_CONSOLE
+#  undef CONFIG_UART2_SERIAL_CONSOLE
+#  undef HAVE_SERIAL_CONSOLE
+#endif
+
+/* If we are not using the serial driver for the console, then we still must
+ * provide some minimal implementation of misoc_putc.
+ */
+
+#ifdef USE_SERIALDRIVER
+
+/* Which UART with be tty0/console and which tty1?  The console will always
+ * be ttyS0.  If there is no console then will use the lowest numbered UART.
+ */
+
+#ifdef HAVE_SERIAL_CONSOLE
+#  if defined(CONFIG_UART1_SERIAL_CONSOLE)
+#    define CONSOLE_DEV     g_uart1port     /* UART1 is console */
+#    define TTYS0_DEV       g_uart1port     /* UART1 is ttyS0 */
+#    undef  TTYS1_DEV                       /* No ttyS1 */
+#    define SERIAL_CONSOLE  1
+#  else
+#    error "I'm confused... Do we have a serial console or not?"
+#  endif
+#else
+#  undef  CONSOLE_DEV                        /* No console */
+#  undef  CONFIG_UART1_SERIAL_CONSOLE
+#  if defined(CONFIG_NR5_UART1)
+#    define TTYS0_DEV       g_uart1port     /* UART1 is ttyS0 */
+#    undef  TTYS1_DEV                       /* No ttyS1 */
+#    define SERIAL_CONSOLE  1
+#  else
+#    undef  TTYS0_DEV
+#    undef  TTYS1_DEV
+#  endif
+#endif
+
+/* Common initialization logic will not not know that the all of the UARTs
+ * have been disabled.  So, as a result, we may still have to provide
+ * stub implementations of misoc_earlyserialinit(), misoc_serial_initialize(), and
+ * misoc_putc().
+ */
+
+#ifdef HAVE_UART_DEVICE
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct misoc_dev_s
+{
+  uintptr_t uartbase;
+  uintptr_t rxtx_addr;
+  uintptr_t txfull_addr;
+  uintptr_t rxempty_addr;
+  uintptr_t ev_status_addr;
+  uintptr_t ev_pending_addr;
+  uintptr_t ev_enable_addr;
+  uint8_t irq;
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* Low-level helpers */
+
+static void misoc_restoreuartint(struct uart_dev_s *dev, uint8_t im);
+static void misoc_disableuartint(struct uart_dev_s *dev, uint8_t *im);
+
+/* Serial driver methods */
+
+static int  misoc_setup(struct uart_dev_s *dev);
+static void misoc_shutdown(struct uart_dev_s *dev);
+static int  misoc_attach(struct uart_dev_s *dev);
+static void misoc_detach(struct uart_dev_s *dev);
+static int  misoc_uart_interrupt(int irq, void *context, FAR void *arg);
+static int  misoc_ioctl(struct file *filep, int cmd, unsigned long arg);
+static int  misoc_receive(struct uart_dev_s *dev, uint32_t *status);
+static void misoc_rxint(struct uart_dev_s *dev, bool enable);
+static bool misoc_rxavailable(struct uart_dev_s *dev);
+static void misoc_send(struct uart_dev_s *dev, int ch);
+static void misoc_txint(struct uart_dev_s *dev, bool enable);
+static bool misoc_txready(struct uart_dev_s *dev);
+static bool misoc_txempty(struct uart_dev_s *dev);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct uart_ops_s g_uart_ops =
+{
+  .setup          = misoc_setup,
+  .shutdown       = misoc_shutdown,
+  .attach         = misoc_attach,
+  .detach         = misoc_detach,
+  .ioctl          = misoc_ioctl,
+  .receive        = misoc_receive,
+  .rxint          = misoc_rxint,
+  .rxavailable    = misoc_rxavailable,
+#ifdef CONFIG_SERIAL_IFLOWCONTROL
+  .rxflowcontrol  = NULL,
+#endif
+  .send           = misoc_send,
+  .txint          = misoc_txint,
+  .txready        = misoc_txready,
+  .txempty        = misoc_txempty,
+};
+
+/* I/O buffers */
+
+#ifdef CONFIG_MISOC_UART1
+static char g_uart1rxbuffer[CONFIG_UART1_RXBUFSIZE];
+static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE];
+#endif
+
+/* This describes the state of the NR5 UART1 port. */
+
+#ifdef CONFIG_MISOC_UART1
+#ifndef CONFIG_MISOC_UART1PRIO
+# define CONFIG_MISOC_UART1PRIO 4
+#endif
+
+static struct misoc_dev_s g_uart1priv =
+{
+  .uartbase        = CSR_UART_BASE,
+  .irq             = UART_INTERRUPT,
+  .rxtx_addr       = CSR_UART_RXTX_ADDR,
+  .rxempty_addr    = CSR_UART_RXEMPTY_ADDR,
+  .txfull_addr     = CSR_UART_TXFULL_ADDR,
+  .ev_status_addr  = CSR_UART_EV_STATUS_ADDR,
+  .ev_pending_addr = CSR_UART_EV_PENDING_ADDR,
+  .ev_enable_addr  = CSR_UART_EV_ENABLE_ADDR,
+};
+
+static uart_dev_t g_uart1port =
+{
+#if SERIAL_CONSOLE == 1
+  .isconsole = 1,
+#endif
+  .recv      =
+  {
+    .size    = CONFIG_UART1_RXBUFSIZE,
+    .buffer  = g_uart1rxbuffer,
+  },
+  .xmit      =
+  {
+    .size    = CONFIG_UART1_TXBUFSIZE,
+    .buffer  = g_uart1txbuffer,
+   },
+  .ops       = &g_uart_ops,
+  .priv      = &g_uart1priv,
+};
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: misoc_restoreuartint
+ ****************************************************************************/
+
+static void misoc_restoreuartint(struct uart_dev_s *dev, uint8_t im)
+{
+  /* Re-enable/re-disable interrupts corresponding to the state of bits in
+   * im.
+   */
+
+  uart_ev_enable_write(im);
+}
+
+/****************************************************************************
+ * Name: misoc_disableuartint
+ ****************************************************************************/
+
+static void misoc_disableuartint(struct uart_dev_s *dev, uint8_t *im)
+{
+  if (im)
+   {
+     *im = uart_ev_enable_read();
+   }
+
+  misoc_restoreuartint(dev, 0);
+}
+
+/****************************************************************************
+ * Name: misoc_setup
+ *
+ * Description:
+ *   Configure the UART baud, bits, parity, etc. This method is called the
+ *   first time that the serial port is opened.
+ *
+ ****************************************************************************/
+
+static int misoc_setup(struct uart_dev_s *dev)
+{
+  uart_ev_pending_write(uart_ev_pending_read());
+  return OK;
+}
+
+/****************************************************************************
+ * Name: misoc_shutdown
+ *
+ * Description:
+ *   Disable the UART.  This method is called when the serial
+ *   port is closed
+ *
+ ****************************************************************************/
+
+static void misoc_shutdown(struct uart_dev_s *dev)
+{
+}
+
+/****************************************************************************
+ * Name: misoc_attach
+ *
+ * Description:
+ *   Configure the UART to operation in interrupt driven mode.  This method is
+ *   called when the serial port is opened.  Normally, this is just after the
+ *   the setup() method is called, however, the serial console may operate in
+ *   a non-interrupt driven mode during the boot phase.
+ *
+ *   RX and TX interrupts are not enabled by the attach method (unless the
+ *   hardware supports multiple levels of interrupt enabling).  The RX and TX
+ *   interrupts are not enabled until the txint() and rxint() methods are called.
+ *
+ ****************************************************************************/
+
+static int misoc_attach(struct uart_dev_s *dev)
+{
+  struct misoc_dev_s *priv = (struct misoc_dev_s *)dev->priv;
+
+  (void)irq_attach(priv->irq, misoc_uart_interrupt, NULL);
+  up_enable_irq(priv->irq);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: misoc_detach
+ *
+ * Description:
+ *   Detach UART interrupts.  This method is called when the serial port is
+ *   closed normally just before the shutdown method is called.  The exception
+ *   is the serial console which is never shutdown.
+ *
+ ****************************************************************************/
+
+static void misoc_detach(struct uart_dev_s *dev)
+{
+  struct misoc_dev_s *priv = (struct misoc_dev_s *)dev->priv;
+
+  up_disable_irq(priv->irq);
+  irq_detach(priv->irq);
+}
+
+/****************************************************************************
+ * Name: misoc_interrupt
+ *
+ * Description:
+ *   This is the UART interrupt handler.  It will be invoked when an
+ *   interrupt received on the 'irq'  It should call uart_transmitchars or
+ *   uart_receivechar to perform the appropriate data transfers.  The
+ *   interrupt handling logic must be able to map the 'irq' number into the
+ *   approprite uart_dev_s structure in order to call these functions.
+ *
+ ****************************************************************************/
+
+static int misoc_uart_interrupt(int irq, void *context, FAR void *arg)
+{
+  uint32_t stat;
+  struct uart_dev_s *dev = NULL;
+
+  dev = &g_uart1port;
+
+  /* Read as much as we can */
+
+  stat = uart_ev_pending_read();
+  if (stat & UART_EV_RX)
+    {
+      while (!uart_rxempty_read())
+        {
+          uart_recvchars(dev);
+        }
+    }
+
+  /* Try to send all the buffer that were not sent.  Does uart_xmitchars
+   * send only if there is something to send ???
+   */
+
+  if ((stat & UART_EV_TX) != 0)
+    {
+      uart_ev_pending_write(UART_EV_TX);
+      uart_xmitchars(dev);
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: misoc_ioctl
+ *
+ * Description:
+ *   All ioctl calls will be routed through this method
+ *
+ ****************************************************************************/
+
+static int misoc_ioctl(struct file *filep, int cmd, unsigned long arg)
+{
+#ifdef CONFIG_SERIAL_TERMIOS
+  return -ENOSYS;
+#else
+  return -ENOTTY;
+#endif
+}
+
+/****************************************************************************
+ * Name: misoc_receive
+ *
+ * Description:
+ *   Called (usually) from the interrupt level to receive one
+ *   character from the UART.  Error bits associated with the
+ *   receipt are provided in the return 'status'.
+ *
+ ****************************************************************************/
+
+static int misoc_receive(struct uart_dev_s *dev, uint32_t *status)
+{
+  int ret;
+
+  if (status != NULL)
+    {
+      *status = 0;
+    }
+
+  ret = uart_rxtx_read();
+
+  uart_ev_pending_write(UART_EV_RX);
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: misoc_rxint
+ *
+ * Description:
+ *   Call to enable or disable RX interrupts
+ *
+ ****************************************************************************/
+
+static void misoc_rxint(struct uart_dev_s *dev, bool enable)
+{
+  uint8_t im;
+
+  im = uart_ev_enable_read();
+  if (enable)
+    {
+      im |= UART_EV_RX;
+    }
+  else
+    {
+      im &= ~UART_EV_RX;
+    }
+
+  uart_ev_enable_write(im);
+}
+
+/****************************************************************************
+ * Name: misoc_rxavailable
+ *
+ * Description:
+ *   Return true if the receive register is not empty
+ *
+ ****************************************************************************/
+
+static bool misoc_rxavailable(struct uart_dev_s *dev)
+{
+  return !uart_rxempty_read();
+}
+
+/****************************************************************************
+ * Name: misoc_send
+ *
+ * Description:
+ *   This method will send one byte on the UART.
+ *
+ ****************************************************************************/
+
+static void misoc_send(struct uart_dev_s *dev, int ch)
+{
+  uart_rxtx_write(ch);
+}
+
+/****************************************************************************
+ * Name: misoc_txint
+ *
+ * Description:
+ *   Call to enable or disable TX interrupts
+ *
+ ****************************************************************************/
+
+static void misoc_txint(struct uart_dev_s *dev, bool enable)
+{
+  uint8_t im;
+
+  im = uart_ev_enable_read();
+  if (enable)
+    {
+      im |= UART_EV_TX;
+      uart_ev_enable_write(im);
+
+      /* Fake an uart INT */
+
+      uart_xmitchars(dev);
+    }
+  else
+    {
+      im  &= ~UART_EV_TX;
+      uart_ev_enable_write(im);
+    }
+}
+
+/****************************************************************************
+ * Name: misoc_txready
+ *
+ * Description:
+ *   Return true if the tranmsit data register is empty
+ *
+ ****************************************************************************/
+
+static bool misoc_txready(struct uart_dev_s *dev)
+{
+  return !uart_txfull_read();
+}
+
+/****************************************************************************
+ * Name: misoc_txempty
+ *
+ * Description:
+ *   Return true if the tranmsit data register is empty
+ *
+ ****************************************************************************/
+
+static bool misoc_txempty(struct uart_dev_s *dev)
+{
+  return !uart_txfull_read();
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: misoc_earlyserialinit
+ *
+ * Description:
+ *   Performs the low level UART initialization early in debug so that the
+ *   serial console will be available during bootup.  This must be called
+ *   before misoc_serial_initialize.
+ *
+ ****************************************************************************/
+
+void misoc_earlyserialinit(void)
+{
+}
+
+/****************************************************************************
+ * Name: misoc_putc
+ *
+ * Description:
+ *   Provide priority, low-level access to support OS debug  writes
+ *
+ ****************************************************************************/
+
+int up_putc(int ch)
+{
+#ifdef HAVE_SERIAL_CONSOLE
+  struct uart_dev_s *dev = (struct uart_dev_s *)&CONSOLE_DEV;
+  uint8_t imr;
+
+   misoc_disableuartint(dev, &imr);
+
+  /* Check for LF */
+
+  if (ch == '\n')
+    {
+      /* Add CR */
+
+      misoc_lowputc('\r');
+    }
+
+  misoc_lowputc(ch);
+  misoc_restoreuartint(dev, imr);
+#endif
+  return ch;
+}
+
+/****************************************************************************
+ * Name: misoc_earlyserialinit, misoc_serial_initialize, and misoc_putc
+ *
+ * Description:
+ *   stubs that may be needed.  These stubs would be used if all UARTs are
+ *   disabled.  In that case, the logic in common/misoc_initialize() is not
+ *   smart enough to know that there are not UARTs and will still expect
+ *   these interfaces to be provided.
+ *
+ ****************************************************************************/
+
+#else /* HAVE_UART_DEVICE */
+void misoc_earlyserialinit(void)
+{
+}
+
+void misoc_serial_initialize(void)
+{
+}
+
+int up_putc(int ch)
+{
+  return ch;
+}
+
+#endif /* HAVE_UART_DEVICE */
+#else /* USE_SERIALDRIVER */
+
+/****************************************************************************
+ * Name: misoc_putc
+ *
+ * Description:
+ *   Provide priority, low-level access to support OS debug writes
+ *
+ ****************************************************************************/
+
+int up_putc(int ch)
+{
+#ifdef HAVE_SERIAL_CONSOLE
+  /* Check for LF */
+
+  if (ch == '\n')
+    {
+      /* Add CR */
+
+      misoc_lowputc('\r');
+    }
+
+  misoc_lowputc(ch);
+#endif
+
+  return ch;
+}
+
+#endif /* USE_SERIALDRIVER */
+
+void misoc_lowputc(char ch)
+{
+  while (uart_txfull_read());
+  uart_rxtx_write(ch);
+  uart_ev_pending_write(UART_EV_TX);
+}
+
+/****************************************************************************
+ * Name: misoc_serial_initialize
+ *
+ * Description:
+ *   Register serial console and serial ports.  This assumes
+ *   that misoc_earlyserialinit was called previously.
+ *
+ ****************************************************************************/
+
+void misoc_serial_initialize(void)
+{
+#ifdef USE_SERIALDRIVER
+  /* Register the console */
+
+#ifdef HAVE_SERIAL_CONSOLE
+  (void)uart_register("/dev/console", &CONSOLE_DEV);
+#endif
+
+  /* Register all UARTs */
+  (void)uart_register("/dev/ttyS0", &TTYS0_DEV);
+#endif
+}
diff --git a/arch/misoc/src/common/misoc_timerisr.c b/arch/misoc/src/common/misoc_timerisr.c
new file mode 100644
index 0000000000000000000000000000000000000000..3c4b4919d36b6243b2bec4fb5ee054d0cfc6dc10
--- /dev/null
+++ b/arch/misoc/src/common/misoc_timerisr.c
@@ -0,0 +1,151 @@
+/****************************************************************************
+ * arch/risc-v/src/nr5m100/nr5_timerisr.c
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ *   Modified for MISOC:
+ *
+ *   Copyright (C) 2016 Ramtin Amin. All rights reserved.
+ *   Author: Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "chip.h"
+#include "misoc.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* The desired timer interrupt frequency is provided by the definition
+ * CLOCKS_PER_SEC (see include/time.h).  CLOCKS_PER_SEC defines the desired
+ * number of system clock ticks per second.  That value is a user
+ * configurable setting based on CONFIG_USEC_PER_TICK.  It defaults to 100
+ * (100 ticks per second = 10 MS interval).
+ *
+ * Given the timer input frequency (Finput).  The timer correct reload
+ * value is:
+ *
+ *   reload = Finput / CLOCKS_PER_SEC
+ */
+
+#define SYSTICK_RELOAD ((SYSTEM_CLOCK_FREQUENCY / CLOCKS_PER_SEC) - 1)
+
+/* The size of the reload field is 30 bits.  Verify that the reload value
+ * will fit in the reload register.
+ */
+
+#if SYSTICK_RELOAD > 0x3fffffff
+#  error SYSTICK_RELOAD exceeds the range of the RELOAD register
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  misoc_timer_isr
+ *
+ * Description:
+ *   The timer ISR will perform a variety of services for various portions
+ *   of the systems.
+ *
+ ****************************************************************************/
+
+int misoc_timer_isr(int irq, void *context, void *arg)
+{
+  /* Clear event pending */
+
+  timer0_ev_pending_write(timer0_ev_pending_read());
+
+  /* Process timer interrupt */
+
+  sched_process_timer();
+  return 0;
+}
+
+/****************************************************************************
+ * Function:  misoc_timer_initialize
+ *
+ * Description:
+ *   This function is called during start-up to initialize
+ *   the timer interrupt.
+ *
+ ****************************************************************************/
+
+void misoc_timer_initialize(void)
+{
+  /* Clear event pending */
+
+  timer0_ev_pending_write(timer0_ev_pending_read());
+
+  /* Disable timer*/
+
+  timer0_en_write(0);
+
+  /* Setup the timer reload register to generate interrupts at the rate of
+   * CLOCKS_PER_SEC.
+   */
+
+  timer0_reload_write(SYSTICK_RELOAD);
+  timer0_load_write(SYSTICK_RELOAD);
+
+  /* Enable timer */
+
+  timer0_en_write(1);
+
+  /* Attach the timer interrupt vector */
+
+  (void)irq_attach(TIMER0_INTERRUPT, misoc_timer_isr, NULL);
+
+  /* And enable the timer interrupt */
+
+  up_enable_irq(TIMER0_INTERRUPT);
+
+  /* Enable IRQ of the timer core */
+
+  timer0_ev_enable_write(1);
+}
diff --git a/arch/misoc/src/common/misoc_udelay.c b/arch/misoc/src/common/misoc_udelay.c
new file mode 100644
index 0000000000000000000000000000000000000000..42bbc1f95aea0dfe738cfdf2bfee2689342b9c97
--- /dev/null
+++ b/arch/misoc/src/common/misoc_udelay.c
@@ -0,0 +1,117 @@
+/****************************************************************************
+ *  arch/misoc/src/common/up_udelay.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define CONFIG_BOARD_LOOPSPER100USEC ((CONFIG_BOARD_LOOPSPERMSEC+5)/10)
+#define CONFIG_BOARD_LOOPSPER10USEC  ((CONFIG_BOARD_LOOPSPERMSEC+50)/100)
+#define CONFIG_BOARD_LOOPSPERUSEC    ((CONFIG_BOARD_LOOPSPERMSEC+500)/1000)
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_udelay
+ *
+ * Description:
+ *   Delay inline for the requested number of microseconds.  NOTE:  Because
+ *   of all of the setup, several microseconds will be lost before the actual
+ *   timing looop begins.  Thus, the delay will always be a few microseconds
+ *   longer than requested.
+ *
+ *   *** NOT multi-tasking friendly ***
+ *
+ * ASSUMPTIONS:
+ *   The setting CONFIG_BOARD_LOOPSPERMSEC has been calibrated
+ *
+ ****************************************************************************/
+
+void up_udelay(useconds_t microseconds)
+{
+  volatile int i;
+
+  /* We'll do this a little at a time because we expect that the
+   * CONFIG_BOARD_LOOPSPERUSEC is very inaccurate during to truncation in
+   * the divisions of its calculation.  We'll use the largest values that
+   * we can in order to prevent significant error buildup in the loops.
+   */
+
+  while (microseconds > 1000)
+    {
+      for (i = 0; i < CONFIG_BOARD_LOOPSPERMSEC; i++)
+        {
+        }
+
+      microseconds -= 1000;
+    }
+
+  while (microseconds > 100)
+    {
+      for (i = 0; i < CONFIG_BOARD_LOOPSPER100USEC; i++)
+        {
+        }
+
+      microseconds -= 100;
+    }
+
+  while (microseconds > 10)
+    {
+      for (i = 0; i < CONFIG_BOARD_LOOPSPER10USEC; i++)
+        {
+        }
+
+      microseconds -= 10;
+    }
+
+  while (microseconds > 0)
+    {
+      for (i = 0; i < CONFIG_BOARD_LOOPSPERUSEC; i++)
+        {
+        }
+
+      microseconds--;
+    }
+}
diff --git a/arch/misoc/src/lm32/Kconfig b/arch/misoc/src/lm32/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..c10407ef28b9b3da6c13e928e8b7978e6d548554
--- /dev/null
+++ b/arch/misoc/src/lm32/Kconfig
@@ -0,0 +1,32 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_CHIP_LM32
+
+choice
+	prompt "Toolchain Selection"
+	default LM32_TOOLCHAIN_GNUW if TOOLCHAIN_WINDOWS
+	default LM32_TOOLCHAIN_GNUL if !TOOLCHAIN_WINDOWS
+
+config LM32_TOOLCHAIN_BUILDROOT
+	bool "Buildroot (Cygwin or Linux)"
+	depends on !WINDOWS_NATIVE
+
+config LM32_TOOLCHAIN_GNUL
+	bool "Generic GNU toolchain under Linux (or other POSIX environment)"
+	---help---
+		This option should work for any modern GNU toolchain (GCC 4.5 or newer)
+		configured for lm32-elf-.
+
+config LM32_TOOLCHAIN_GNUW
+	bool "Generic GNU toolchain under Windows"
+	depends on TOOLCHAIN_WINDOWS
+	---help---
+		This option should work for any modern GNU toolchain (GCC 4.5 or newer)
+		configured for lm32-elf-.
+
+endchoice # Toolchain Selection
+
+endif # ARCH_CHIP_LM32
diff --git a/arch/misoc/src/lm32/Make.defs b/arch/misoc/src/lm32/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..a2ea84d61c82d05e30e76928baeac2821768ffa4
--- /dev/null
+++ b/arch/misoc/src/lm32/Make.defs
@@ -0,0 +1,54 @@
+############################################################################
+# arch/misoc/src/Makefile
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#           Ramtin Amin 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+HEAD_ASRC   = lm32_vectors.S
+
+CMN_ASRCS   =
+CMN_CSRCS   = misoc_lowputs.c misoc_serial.c misoc_mdelay.c
+CMN_CSRCS  += misoc_modifyreg8.c misoc_modifyreg16.c misoc_modifyreg32.c
+CMN_CSRCS  += misoc_puts.c misoc_udelay.c misoc_timerisr.c misoc_net.c
+CMN_CSRCS  += misoc_flushcache.c
+
+CHIP_ASRCS  = lm32_syscall.S
+
+CHIP_CSRCS  = lm32_allocateheap.c lm32_assert.c lm32_blocktask.c
+CHIP_CSRCS += lm32_copystate.c lm32_createstack.c lm32_decodeirq.c
+CHIP_CSRCS += lm32_doirq.c lm32_dumpstate.c lm32_exit.c lm32_idle.c
+CHIP_CSRCS += lm32_initialize.c lm32_initialstate.c lm32_interruptcontext.c
+CHIP_CSRCS += lm32_irq.c lm32_releasepending.c lm32_releasestack.c
+CHIP_CSRCS += lm32_stackframe.c lm32_swint.c lm32_unblocktask.c
+CHIP_CSRCS += lm32_reprioritizertr.c lm32_schedulesigaction.c lm32_sigdeliver.c
+CHIP_CSRCS += lm32_flushcache.c
\ No newline at end of file
diff --git a/arch/misoc/src/lm32/Toolchain.defs b/arch/misoc/src/lm32/Toolchain.defs
new file mode 100644
index 0000000000000000000000000000000000000000..f59fa1ab45e927243cf0a3aa9fd2b2133982d8af
--- /dev/null
+++ b/arch/misoc/src/lm32/Toolchain.defs
@@ -0,0 +1,104 @@
+############################################################################
+# arch/misco/src/lm32/Toolchain.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+# Setup for the selected toolchain
+
+#
+# Select and allow the selected toolchain to be overridden by a command-line
+#selection.
+#
+
+ifeq ($(filter y, \
+      $(CONFIG_LM32_TOOLCHAIN_BUILDROOT) \
+    ),y)
+  CONFIG_LM32_TOOLCHAIN ?= BUILDROOT
+endif
+
+ifeq ($(filter y, \
+      $(CONFIG_LM32_TOOLCHAIN_GNUL) \
+    ),y)
+  CONFIG_LM32_TOOLCHAIN ?= GNUL
+endif
+
+ifeq ($(filter y, \
+      $(CONFIG_LM32_TOOLCHAIN_GNUW) \
+    ),y)
+  CONFIG_LM32_TOOLCHAIN ?= GNUW
+endif
+
+#
+# Supported toolchains
+#
+# Each toolchain definition should set:
+#
+#  CROSSDEV         The GNU toolchain triple (command prefix)
+#  ARCROSSDEV       If required, an alternative prefix used when
+#                   invoking ar and nm.
+#  ARCHCPUFLAGS     CPU-specific flags selecting the instruction set
+#                   FPU options, etc.
+#  MAXOPTIMIZATION  The maximum optimization level that results in
+#                   reliable code generation.
+#
+
+ifeq ($(CONFIG_DEBUG_CUSTOMOPT),y)
+  MAXOPTIMIZATION := $(CONFIG_DEBUG_OPTLEVEL)
+endif
+
+# NuttX buildroot under Linux or Cygwin
+
+ifeq ($(CONFIG_LM32_TOOLCHAIN),BUILDROOT)
+  CROSSDEV ?= lm32-nuttx-elf-
+  ARCROSSDEV ?= lm32-nuttx-elf-
+  MAXOPTIMIZATION ?= -Os
+endif
+
+# Generic GNU toolchain on OS X, Linux or any typical Posix system
+
+ifeq ($(CONFIG_LM32_TOOLCHAIN),GNUL)
+  CROSSDEV ?= lm32-elf-
+  ARCROSSDEV ?= lm32-elf-
+  MAXOPTIMIZATION ?= -Os
+endif
+
+# Generic GNU toolchain under Windows (native)
+
+ifeq ($(CONFIG_LM32_TOOLCHAIN),GNUW)
+  CROSSDEV ?= lm32-elf--
+  ARCROSSDEV ?= lm32-elf--
+  MAXOPTIMIZATION ?= -Os
+  ifeq ($(CONFIG_WINDOWS_CYGWIN),y)
+    WINTOOL = y
+  endif
+endif
diff --git a/arch/misoc/src/lm32/chip.h b/arch/misoc/src/lm32/chip.h
new file mode 100644
index 0000000000000000000000000000000000000000..78d671f7f940c1e25849cbf03b5b0817127fea4c
--- /dev/null
+++ b/arch/misoc/src/lm32/chip.h
@@ -0,0 +1,95 @@
+/****************************************************************************
+ * arch/misoc/src/lm32/chip.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_MISOC_SRC_LM32_CHIP_H
+#define __ARCH_MISOC_SRC_LM32_CHIP_H 1
+
+/****************************************************************************
+ * Inline Functions
+ ****************************************************************************/
+
+#include "lm32.h"
+
+/****************************************************************************
+ * Inline Functions
+ ****************************************************************************/
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+static inline unsigned int irq_getie(void)
+{
+  unsigned int ie;
+  __asm__ __volatile__("rcsr %0, IE" : "=r" (ie));
+  return ie;
+}
+
+static inline void irq_setie(unsigned int ie)
+{
+  __asm__ __volatile__("wcsr IE, %0" : : "r" (ie));
+}
+
+static inline unsigned int irq_getmask(void)
+{
+
+  unsigned int mask;
+  __asm__ __volatile__("rcsr %0, IM" : "=r" (mask));
+  return mask;
+}
+
+static inline void irq_setmask(unsigned int mask)
+{
+  __asm__ __volatile__("wcsr IM, %0" : : "r" (mask));
+}
+
+static inline unsigned int irq_pending(void)
+{
+  
+  unsigned int pending;
+  __asm__ __volatile__("rcsr %0, IP" : "=r" (pending));
+  return pending;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#endif /* __ARCH_MISOC_SRC_LM32_CHIP_H */
diff --git a/arch/misoc/src/lm32/lm32.h b/arch/misoc/src/lm32/lm32.h
new file mode 100644
index 0000000000000000000000000000000000000000..6d4ef15a073b24be21ed044b30286ba2f84a5c0a
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32.h
@@ -0,0 +1,162 @@
+/****************************************************************************
+ * arch/misoc/src/lm32/lm32.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_MISOC_SRC_LM32_LM32_H
+#define __ARCH_MISOC_SRC_LM32_LM32_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#ifndef __ASSEMBLY__
+#  include 
+#  include 
+#  include 
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* This is the value used to mark the stack for subsequent stack monitoring
+ * logic.
+ */
+
+#define STACK_COLOR             0xdeadbeef
+#define INTSTACK_COLOR          0xdeadbeef
+#define HEAP_COLOR              'h'
+
+/* In the LM32 model, the state is copied from the stack to the TCB, but
+ * only a referenced is passed to get the state from the TCB.
+ */
+
+#define up_savestate(regs)      lm32_copystate(regs, (uint32_t*)g_current_regs)
+#define up_copystate(rega,regb) lm32_copystate(rega, regb)
+#define up_restorestate(regs)   (g_current_regs = regs)
+
+/* Determine which (if any) console driver to use.  If a console is enabled
+ * and no other console device is specified, then a serial console is
+ * assumed.
+ */
+
+#if !defined(CONFIG_DEV_CONSOLE) || CONFIG_NFILE_DESCRIPTORS <= 0
+#  undef  USE_SERIALDRIVER
+#  undef  USE_EARLYSERIALINIT
+#  undef  CONFIG_DEV_LOWCONSOLE
+#  undef  CONFIG_RAMLOG_CONSOLE
+#else
+#  if defined(CONFIG_RAMLOG_CONSOLE)
+#    undef  USE_SERIALDRIVER
+#    undef  USE_EARLYSERIALINIT
+#    undef  CONFIG_DEV_LOWCONSOLE
+#  elif defined(CONFIG_DEV_LOWCONSOLE)
+#    undef  USE_SERIALDRIVER
+#    undef  USE_EARLYSERIALINIT
+#  else
+#    define USE_SERIALDRIVER 1
+#    define USE_EARLYSERIALINIT 1
+#  endif
+#endif
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+extern volatile uint32_t *g_current_regs;
+extern uint32_t g_idle_topstack;
+
+/****************************************************************************
+ * Inline Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/* Low level initialization provided by board-level logic ******************/
+
+void lm32_board_initialize(void);
+
+/* Memory allocation ********************************************************/
+
+#if CONFIG_MM_REGIONS > 1
+void lm32_add_region(void);
+#endif
+
+/* Context switching ********************************************************/
+
+void lm32_copystate(uint32_t *dest, uint32_t *src);
+
+/* IRQ initialization *******************************************************/
+
+void lm32_irq_initialize(void);
+
+/* Interrupt decode *********************************************************/
+
+uint32_t *lm32_decodeirq(uint32_t intstat, uint32_t *regs);
+uint32_t *lm32_doirq(int irq, uint32_t *regs);
+
+/* Software interrupts ******************************************************/
+
+int lm32_swint(int irq, FAR void *context, FAR void *arg);
+
+/* System timer *************************************************************/
+
+void lm32_timer_initialize(void);
+
+/* Signal handling **********************************************************/
+
+void lm32_sigdeliver(void);
+
+/* Cache flushing ***********************************************************/
+
+void lm32_flush_dcache(void);
+void lm32_flush_icache(void);
+
+/* Debug ********************************************************************/
+
+void lm32_dumpstate(void);
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_MISOC_SRC_LM32_LM32_H */
diff --git a/drivers/mtd/flash_eraseall.c b/arch/misoc/src/lm32/lm32_allocateheap.c
similarity index 70%
rename from drivers/mtd/flash_eraseall.c
rename to arch/misoc/src/lm32/lm32_allocateheap.c
index 185da7695c071f9706e6d67221b1543f4b580ee3..882bed891aaa37b3631fb90a861f863756ff9104 100644
--- a/drivers/mtd/flash_eraseall.c
+++ b/arch/misoc/src/lm32/lm32_allocateheap.c
@@ -1,8 +1,9 @@
 /****************************************************************************
- * drivers/mtd/flash_eraseall.c
+ * arch/misoc/src/lm32/lm32_allocateheap.c
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
+ *           Ramtin Amin 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -39,23 +40,17 @@
 
 #include 
 
-#include 
+#include 
 #include 
 
-#include 
-#include 
-#include 
+#include 
+#include 
+#include 
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
+#include "lm32.h"
 
 /****************************************************************************
- * Private Function Prototypes
+ * Pre-processor Definitions
  ****************************************************************************/
 
 /****************************************************************************
@@ -71,47 +66,39 @@
  ****************************************************************************/
 
 /****************************************************************************
- * Name: flash_eraseall
+ * Name: up_allocate_heap
  *
  * Description:
- *   Call a block driver with the MDIOC_BULKERASE ioctl command.  This will
- *   cause the MTD driver to erase all of the flash.
+ *   This function will be called to dynamically set aside the heap region.
+ *
+ *   For the kernel build (CONFIG_BUILD_KERNEL=y) with both kernel- and
+ *   user-space heaps (CONFIG_MM_KERNEL_HEAP=y), this function provides the
+ *   size of the unprotected, user-space heap.
+ *
+ *   If a protected kernel-space heap is provided, the kernel heap must be
+ *   allocated (and protected) by an analogous up_allocate_kheap().
  *
  ****************************************************************************/
 
-int flash_eraseall(FAR const char *driver)
+void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
 {
-  FAR struct inode *inode;
-  FAR const struct block_operations *ops;
-  int ret;
-
-  /* Open the block driver */
-
-  ret = open_blockdriver(driver, 0, &inode);
-  if (ret < 0)
-    {
-      fdbg("ERROR: Failed to open '%s': %d\n", driver, ret);
-      return ret;
-    }
-
-  /* Get the block operations */
-
-  ops = inode->u.i_bops;
-
-  /* Invoke the block driver ioctl method */
-
-  ret = -EPERM;
-  if (ops->ioctl)
-    {
-      ret = ops->ioctl(inode, MTDIOC_BULKERASE, 0);
-      if (ret < 0)
-        {
-          fdbg("ERROR: MTD ioctl(%04x) failed: %d\n", MTDIOC_BULKERASE, ret);
-        }
-    }
+  board_autoled_on(LED_HEAPALLOCATE);
+  *heap_start = (FAR void *)g_idle_topstack;
+  *heap_size = CONFIG_RAM_END - g_idle_topstack;
+}
 
-  /* Close the block driver */
+/****************************************************************************
+ * Name: lm32_add_region
+ *
+ * Description:
+ *   Memory may be added in non-contiguous chunks.  Additional chunks are
+ *   added by calling this function.
+ *
+ ****************************************************************************/
 
-  close_blockdriver(inode);
-  return ret;
+#if CONFIG_MM_REGIONS > 1
+void lm32_add_region(void)
+{
+#warning Missing logic
 }
+#endif
diff --git a/arch/misoc/src/lm32/lm32_assert.c b/arch/misoc/src/lm32/lm32_assert.c
new file mode 100644
index 0000000000000000000000000000000000000000..78e7d2b66804001b0d41c44d7ede205d1cb08d4b
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_assert.c
@@ -0,0 +1,162 @@
+/****************************************************************************
+ * arch/misoc/src/lm32/lm32_assert.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "sched/sched.h"
+#include "lm32.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* USB trace dumping */
+
+#ifndef CONFIG_USBDEV_TRACE
+#  undef CONFIG_ARCH_USBDUMP
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: _up_assert
+ ****************************************************************************/
+
+static void _up_assert(int errorcode) noreturn_function;
+static void _up_assert(int errorcode)
+{
+  /* Are we in an interrupt handler or the idle task? */
+
+  if (g_current_regs || this_task()->pid == 0)
+    {
+       (void)up_irq_save();
+        for (; ; )
+          {
+#ifdef CONFIG_ARCH_LEDS
+            board_autoled_on(LED_PANIC);
+            up_mdelay(250);
+            board_autoled_off(LED_PANIC);
+            up_mdelay(250);
+#endif
+          }
+    }
+  else
+    {
+      exit(errorcode);
+    }
+}
+
+/****************************************************************************
+ * Name: assert_tracecallback
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_USBDUMP
+static int usbtrace_syslog(FAR const char *fmt, ...)
+{
+  va_list ap;
+  int ret;
+
+  /* Let vsyslog do the real work */
+
+  va_start(ap, fmt);
+  ret = vsyslog(LOG_EMERG, fmt, ap);
+  va_end(ap);
+  return ret;
+}
+
+static int assert_tracecallback(FAR struct usbtrace_s *trace, FAR void *arg)
+{
+  usbtrace_trprintf(usbtrace_syslog, trace->event, trace->value);
+  return 0;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_assert
+ ****************************************************************************/
+
+void up_assert(const uint8_t *filename, int lineno)
+{
+#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
+  struct tcb_s *rtcb = this_task();
+#endif
+
+  board_autoled_on(LED_ASSERTION);
+
+#if CONFIG_TASK_NAME_SIZE > 0
+  _alert("Assertion failed at file:%s line: %d task: %s\n",
+        filename, lineno, rtcb->name);
+#else
+  _alert("Assertion failed at file:%s line: %d\n",
+        filename, lineno);
+#endif
+
+  lm32_dumpstate();
+
+#ifdef CONFIG_ARCH_USBDUMP
+  /* Dump USB trace data */
+
+  (void)usbtrace_enumerate(assert_tracecallback, NULL);
+#endif
+
+#ifdef CONFIG_BOARD_CRASHDUMP
+  board_crashdump(up_getsp(), this_task(), filename, lineno);
+#endif
+
+  _up_assert(EXIT_FAILURE);
+}
diff --git a/arch/misoc/src/lm32/lm32_blocktask.c b/arch/misoc/src/lm32/lm32_blocktask.c
new file mode 100644
index 0000000000000000000000000000000000000000..f313da11cca3f3ad37f01a814c2d89b198e85e0b
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_blocktask.c
@@ -0,0 +1,180 @@
+/****************************************************************************
+ * arch/misoc/src/lm32/lm32_blocktask.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "group/group.h"
+#include "lm32.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_block_task
+ *
+ * Description:
+ *   The currently executing task at the head of
+ *   the ready to run list must be stopped.  Save its context
+ *   and move it to the inactive list specified by task_state.
+ *
+ * Inputs:
+ *   tcb: Refers to a task in the ready-to-run list (normally
+ *     the task at the head of the list).  It most be
+ *     stopped, its context saved and moved into one of the
+ *     waiting task lists.  It it was the task at the head
+ *     of the ready-to-run list, then a context to the new
+ *     ready to run task must be performed.
+ *   task_state: Specifies which waiting task list should be
+ *     hold the blocked task TCB.
+ *
+ ****************************************************************************/
+
+void up_block_task(struct tcb_s *tcb, tstate_t task_state)
+{
+  struct tcb_s *rtcb = this_task();
+  bool switch_needed;
+
+  /* Verify that the context switch can be performed */
+
+  ASSERT((tcb->task_state >= FIRST_READY_TO_RUN_STATE) &&
+         (tcb->task_state <= LAST_READY_TO_RUN_STATE));
+
+  /* Remove the tcb task from the ready-to-run list.  If we
+   * are blocking the task at the head of the task list (the
+   * most likely case), then a context switch to the next
+   * ready-to-run task is needed. In this case, it should
+   * also be true that rtcb == tcb.
+   */
+
+  switch_needed = sched_removereadytorun(tcb);
+
+  /* Add the task to the specified blocked task list */
+
+  sched_addblocked(tcb, (tstate_t)task_state);
+
+  /* If there are any pending tasks, then add them to the ready-to-run
+   * task list now
+   */
+
+  if (g_pendingtasks.head)
+    {
+      switch_needed |= sched_mergepending();
+    }
+
+  /* Now, perform the context switch if one is needed */
+
+  if (switch_needed)
+    {
+      /* Update scheduler parameters */
+
+      sched_suspend_scheduler(rtcb);
+
+      /* Are we in an interrupt handler? */
+
+      if (g_current_regs)
+        {
+          /* Yes, then we have to do things differently.
+           * Just copy the g_current_regs into the OLD rtcb.
+           */
+
+          up_savestate(rtcb->xcp.regs);
+
+          /* Restore the exception context of the rtcb at the (new) head
+           * of the ready-to-run task list.
+           */
+
+          rtcb = this_task();
+
+          /* Reset scheduler parameters */
+
+          sched_resume_scheduler(rtcb);
+
+          /* Then switch contexts.  Any necessary address environment
+           * changes will be made when the interrupt returns.
+           */
+
+          up_restorestate(rtcb->xcp.regs);
+        }
+
+      /* No, then we will need to perform the user context switch */
+
+      else
+        {
+          /* Get the context of the task at the head of the ready to
+           * run list.
+           */
+
+          struct tcb_s *nexttcb = this_task();
+
+#ifdef CONFIG_ARCH_ADDRENV
+          /* Make sure that the address environment for the previously
+           * running task is closed down gracefully (data caches dump,
+           * MMU flushed) and set up the address environment for the new
+           * thread at the head of the ready-to-run list.
+           */
+
+          (void)group_addrenv(nexttcb);
+#endif
+          /* Reset scheduler parameters */
+
+          sched_resume_scheduler(nexttcb);
+
+          /* Then switch contexts */
+
+          up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
+
+          /* up_switchcontext forces a context switch to the task at the
+           * head of the ready-to-run list.  It does not 'return' in the
+           * normal sense.  When it does return, it is because the blocked
+           * task is again ready to run and has execution priority.
+           */
+        }
+    }
+}
diff --git a/arch/misoc/src/lm32/lm32_config.h b/arch/misoc/src/lm32/lm32_config.h
new file mode 100644
index 0000000000000000000000000000000000000000..5b0d5d9b03f59ba362762fb0125465739d6381e1
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_config.h
@@ -0,0 +1,97 @@
+/************************************************************************************
+ * arch/misoc/src/lm32/lm32_config.h
+ *
+ *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Modified for LM32:
+ *
+ *   Copyright (C) 2016 Ramin Amin. All rights reserved.
+ *   Author: Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_MISOC_SRC_LM32_LM32_CONFIG_H
+#define __ARCH_MISOC_SRC_LM32_LM32_CONFIG_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* UARTs ****************************************************************************/
+
+/* Are any UARTs enabled? */
+
+#undef HAVE_UART_DEVICE
+#if defined(CONFIG_MISOC_UART1) || defined(CONFIG_MISOC_UART2)
+#  define HAVE_UART_DEVICE 1
+#endif
+
+/* Is there a serial console?  There should be no more than one defined.  It
+ * could be on any UARTn, n=1,.. CHIP_NUARTS
+ */
+
+#if defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_MISOC_UART1)
+#  undef CONFIG_UART2_SERIAL_CONSOLE
+#  define HAVE_SERIAL_CONSOLE 1
+#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_MISOC_UART2)
+#  undef CONFIG_UART1_SERIAL_CONSOLE
+#  define HAVE_SERIAL_CONSOLE 1
+#else
+#  undef CONFIG_UART1_SERIAL_CONSOLE
+#  undef CONFIG_UART2_SERIAL_CONSOLE
+#  undef HAVE_SERIAL_CONSOLE
+#endif
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Inline Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_MISOC_SRC_LM32_LM32_CONFIG_H */
diff --git a/arch/misoc/src/lm32/lm32_copystate.c b/arch/misoc/src/lm32/lm32_copystate.c
new file mode 100644
index 0000000000000000000000000000000000000000..b3afa387b85d6ea0b16c6cd57f04beb4cab00faf
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_copystate.c
@@ -0,0 +1,87 @@
+/****************************************************************************
+ * arch/misoc/src/lm32/lm32_copystate.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include "lm32.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lm32_copystate
+ ****************************************************************************/
+
+/* A little faster than most memcpy's */
+
+void lm32_copystate(uint32_t *dest, uint32_t *src)
+{
+  int i;
+
+  /* In the LM32 model, the state is copied from the stack to the TCB,
+   * but only a reference is passed to get the state from the TCB.  So the
+   * following check avoids copying the TCB save area onto itself:
+   */
+
+  if (src != dest)
+    {
+      for (i = 0; i < XCPTCONTEXT_REGS; i++)
+        {
+          *dest++ = *src++;
+        }
+    }
+}
+
diff --git a/arch/misoc/src/lm32/lm32_createstack.c b/arch/misoc/src/lm32/lm32_createstack.c
new file mode 100644
index 0000000000000000000000000000000000000000..31c7f2422616526e3d2d03c1ddd678a1518a9f11
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_createstack.c
@@ -0,0 +1,214 @@
+/****************************************************************************
+ * arch/misoc/src/lm32/lm32_createstack.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "lm32.h"
+
+/****************************************************************************
+ * Pre-processor Macros
+ ****************************************************************************/
+
+/* LM32 requires at least a 4-byte stack alignment.  For floating point use,
+ * however, the stack must be aligned to 8-byte addresses.
+ */
+
+#ifdef CONFIG_LIBC_FLOATINGPOINT
+#  define STACK_ALIGNMENT   8
+#else
+#  define STACK_ALIGNMENT   4
+#endif
+
+/* Stack alignment macros */
+
+#define STACK_ALIGN_MASK    (STACK_ALIGNMENT-1)
+#define STACK_ALIGN_DOWN(a) ((a) & ~STACK_ALIGN_MASK)
+#define STACK_ALIGN_UP(a)   (((a) + STACK_ALIGN_MASK) & ~STACK_ALIGN_MASK)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_create_stack
+ *
+ * Description:
+ *   Allocate a stack for a new thread and setup up stack-related information
+ *   in the TCB.
+ *
+ *   The following TCB fields must be initialized by this function:
+ *
+ *   - adj_stack_size: Stack size after adjustment for hardware, processor,
+ *     etc.  This value is retained only for debug purposes.
+ *   - stack_alloc_ptr: Pointer to allocated stack
+ *   - adj_stack_ptr: Adjusted stack_alloc_ptr for HW.  The initial value of
+ *     the stack pointer.
+ *
+ * Inputs:
+ *   - tcb: The TCB of new task
+ *   - stack_size:  The requested stack size.  At least this much
+ *     must be allocated.
+ *   - ttype:  The thread type.  This may be one of following (defined in
+ *     include/nuttx/sched.h):
+ *
+ *       TCB_FLAG_TTYPE_TASK     Normal user task
+ *       TCB_FLAG_TTYPE_PTHREAD  User pthread
+ *       TCB_FLAG_TTYPE_KERNEL   Kernel thread
+ *
+ *     This thread type is normally available in the flags field of the TCB,
+ *     however, there are certain contexts where the TCB may not be fully
+ *     initialized when up_create_stack is called.
+ *
+ *     If CONFIG_BUILD_KERNEL is defined, then this thread type may affect
+ *     how the stack is allocated.  For example, kernel thread stacks should
+ *     be allocated from protected kernel memory.  Stacks for user tasks and
+ *     threads must come from memory that is accessible to user code.
+ *
+ ****************************************************************************/
+
+int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
+{
+  /* Is there already a stack allocated of a different size?  Because of
+   * alignment issues, stack_size might erroneously appear to be of a
+   * different size.  Fortunately, this is not a critical operation.
+   */
+
+  if (tcb->stack_alloc_ptr && tcb->adj_stack_size != stack_size)
+    {
+      /* Yes.. Release the old stack */
+
+      up_release_stack(tcb, ttype);
+    }
+
+  /* Do we need to allocate a new stack? */
+
+  if (!tcb->stack_alloc_ptr)
+    {
+      /* Allocate the stack.  If DEBUG is enabled (but not stack debug),
+       * then create a zeroed stack to make stack dumps easier to trace.
+       */
+
+#if defined(CONFIG_BUILD_KERNEL) && defined(CONFIG_MM_KERNEL_HEAP)
+      /* Use the kernel allocator if this is a kernel thread */
+
+      if (ttype == TCB_FLAG_TTYPE_KERNEL)
+        {
+          tcb->stack_alloc_ptr = (uint32_t *)kmm_malloc(stack_size);
+        }
+      else
+#endif
+        {
+          /* Use the user-space allocator if this is a task or pthread */
+
+          tcb->stack_alloc_ptr = (uint32_t *)kumm_malloc(stack_size);
+        }
+
+#ifdef CONFIG_DEBUG_FEATURES
+      /* Was the allocation successful? */
+
+      if (!tcb->stack_alloc_ptr)
+        {
+          serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
+        }
+#endif
+    }
+
+  /* Did we successfully allocate a stack? */
+
+  if (tcb->stack_alloc_ptr)
+    {
+      size_t top_of_stack;
+      size_t size_of_stack;
+
+      /* Yes.. If stack debug is enabled, then fill the stack with a
+       * recognizable value that we can use later to test for high
+       * water marks.
+       */
+
+#ifdef CONFIG_STACK_COLORATION
+      memset(tcb->stack_alloc_ptr, 0xaa, stack_size);
+#endif
+
+      /* LM32 uses a push-down stack:  the stack grows toward lower
+       * addresses in memory.  The stack pointer register points to the
+       * lowest, valid working address (the "top" of the stack).  Items on
+       * the stack are referenced as positive word offsets from sp.
+       */
+
+      top_of_stack = (uint32_t)tcb->stack_alloc_ptr + stack_size - 4;
+
+      /* The LM32 stack must be aligned at word (4 byte) boundaries; for
+       * floating point use, the stack must be aligned to 8-byte addresses.
+       * If necessary top_of_stack must be rounded down to the next
+       * boundary to meet these alignment requirements.
+       */
+
+      top_of_stack = STACK_ALIGN_DOWN(top_of_stack);
+      size_of_stack = top_of_stack - (uint32_t)tcb->stack_alloc_ptr + 4;
+
+      /* Save the adjusted stack values in the struct tcb_s */
+
+      tcb->adj_stack_ptr  = (FAR uint32_t *)top_of_stack;
+      tcb->adj_stack_size = size_of_stack;
+
+      board_autoled_on(LED_STACKCREATED);
+      return OK;
+    }
+
+   return ERROR;
+}
diff --git a/arch/misoc/src/lm32/lm32_decodeirq.c b/arch/misoc/src/lm32/lm32_decodeirq.c
new file mode 100644
index 0000000000000000000000000000000000000000..ea55e3a0b7e14ca32dc1873d650a24b1dccd17cc
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_decodeirq.c
@@ -0,0 +1,106 @@
+/********************************************************************************
+ * arch/misoc/src/lm32/lm32_decodeirq.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************/
+
+/********************************************************************************
+ * Included Files
+ ********************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include "chip.h"
+#include "lm32.h"
+
+/********************************************************************************
+ * Public Functions
+ ********************************************************************************/
+
+/****************************************************************************
+ * Name: lm32_decodeirq
+ *
+ * Description:
+ *   This function is called from the IRQ vector handler in lm32_vectors.S.
+ *   At this point, the interrupt has been taken and the registers have
+ *   been saved on the stack.  This function simply needs to determine the
+ *   the irq number of the interrupt and then to call lm32_doirq to dispatch
+ *   the interrupt.
+ *
+ *  Input parameters:
+ *   regs - A pointer to the register save area on the stack.
+ *
+ ****************************************************************************/
+
+uint32_t *lm32_decodeirq(uint32_t intstat, uint32_t *regs)
+{
+  int irq;
+
+  irqinfo("intstat=%08lx\n", (unsigned long)intstat);
+
+  /* Decode and dispatch interrupts */
+
+  for (irq = 0; irq < LM32_NINTERRUPTS && intstat != 0; irq++)
+    {
+      uint32_t bit = (1 << irq);
+
+      /* Is this interrupt pending? */
+
+      if ((intstat & bit) != 0)
+        {
+          /* Yes.. Dispatch the interrupt */
+          /* REVIST: Do I need to acknowledge the interrupt first? */
+
+          irqinfo("irq=%d\n", irq);
+          regs = lm32_doirq(irq, regs);
+
+          /* Clear the bit in the interrupt status copy so that maybe we can
+           * break out of the loop early.
+           */
+
+          intstat &= ~bit;
+        }
+    }
+
+  /* Return the final task register save area.  This will typically be the
+   * same as the value of regs on input.  In the event of a context switch,
+   * however, it will differ.  It will refere to the register save are in the
+   * TCB of the new thread.
+   */
+
+  return regs;
+}
diff --git a/arch/misoc/src/lm32/lm32_doirq.c b/arch/misoc/src/lm32/lm32_doirq.c
new file mode 100644
index 0000000000000000000000000000000000000000..cf42f4e6997dfbdd28ea9ba5eef77e49355548ed
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_doirq.c
@@ -0,0 +1,131 @@
+/****************************************************************************
+ * arch/misoc/src/lm32/lm32_doirq.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "group/group.h"
+#include "lm32.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+uint32_t *lm32_doirq(int irq, uint32_t *regs)
+{
+  board_autoled_on(LED_INIRQ);
+
+  /* Current regs non-zero indicates that we are processing an interrupt;
+   * g_current_regs is also used to manage interrupt level context switches.
+   *
+   * Nested interrupts are not supported
+   */
+
+  DEBUGASSERT(g_current_regs == NULL);
+  g_current_regs = regs;
+
+  /* Disable further occurrences of this interrupt (until the interrupt sources
+   * have been clear by the driver).
+   */
+
+  up_disable_irq(irq);
+
+  /* Deliver the IRQ */
+
+  irq_dispatch(irq, regs);
+
+#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
+  /* Check for a context switch.  If a context switch occurred, then
+   * g_current_regs will have a different value than it did on entry.  If an
+   * interrupt level context switch has occurred, then restore the floating
+   * point state and the establish the correct address environment before
+   * returning from the interrupt.
+   */
+
+  if (regs != g_current_regs)
+    {
+#ifdef CONFIG_ARCH_FPU
+      /* Restore floating point registers */
+
+      up_restorefpu((uint32_t *)g_current_regs);
+#endif
+
+#ifdef CONFIG_ARCH_ADDRENV
+      /* Make sure that the address environment for the previously
+       * running task is closed down gracefully (data caches dump,
+       * MMU flushed) and set up the address environment for the new
+       * thread at the head of the ready-to-run list.
+       */
+
+      (void)group_addrenv(NULL);
+#endif
+    }
+#endif
+
+  /* If a context switch occurred while processing the interrupt then
+   * g_current_regs may have change value.  If we return any value different
+   * from the input regs, then the lower level will know that a context
+   * switch occurred during interrupt processing.
+   */
+
+  regs = (uint32_t *)g_current_regs;
+
+  /* Set g_current_regs to NULL to indicate that we are no longer in an
+   * interrupt handler.
+   */
+
+  g_current_regs = NULL;
+
+  /* Unmask the last interrupt (global interrupts are still disabled) */
+
+  up_enable_irq(irq);
+  board_autoled_off(LED_INIRQ);
+  return regs;
+}
diff --git a/arch/misoc/src/lm32/lm32_dumpstate.c b/arch/misoc/src/lm32/lm32_dumpstate.c
new file mode 100644
index 0000000000000000000000000000000000000000..229aee8bfd2b96dadf4210e35fc2c36e57f7b5f3
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_dumpstate.c
@@ -0,0 +1,222 @@
+/****************************************************************************
+ * arch/misoc/src/lm32/lm32_dumpstate.c
+ *
+ *  Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *  Author: Gregory Nutt 
+ *          Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "lm32.h"
+
+#ifdef CONFIG_ARCH_STACKDUMP
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_getsp
+ ****************************************************************************/
+
+static inline uint32_t up_getsp(void)
+{
+  register uint32_t sp;
+ 
+  __asm__ __volatile__("addi %0, sp, 0" : "=r" (sp));
+ 
+  return sp;
+}
+
+/****************************************************************************
+ * Name: up_stackdump
+ ****************************************************************************/
+
+static void up_stackdump(uint32_t sp, uint32_t stack_base)
+{
+  uint32_t stack ;
+
+  for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
+    {
+      uint32_t *ptr = (uint32_t *)stack;
+      _alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+             stack, ptr[0], ptr[1], ptr[2], ptr[3],
+             ptr[4], ptr[5], ptr[6], ptr[7]);
+    }
+}
+
+/****************************************************************************
+ * Name: up_registerdump
+ ****************************************************************************/
+
+static inline void up_registerdump(void)
+{
+  /* Are user registers available from interrupt processing? */
+
+  if (g_current_regs)
+    {
+      _alert("EPC:%08x \n",
+            g_current_regs[REG_EPC]);
+      _alert(" X0:%08x  A0:%08x  A1:%08x  A2:%08x  A3:%08x  A4:%08x  A5:%08x  A6:%08x\n",
+            g_current_regs[REG_X0_NDX], g_current_regs[REG_X1_NDX],
+            g_current_regs[REG_X2_NDX], g_current_regs[REG_X3_NDX],
+            g_current_regs[REG_X4_NDX], g_current_regs[REG_X5_NDX],
+            g_current_regs[REG_X6_NDX], g_current_regs[REG_X7_NDX]);
+      _alert(" A7:%08x  X9:%08x X10:%08x X11:%08x X12:%08x X13:%08x X14:%08x X15:%08x\n",
+            g_current_regs[REG_X8_NDX], g_current_regs[REG_X9_NDX],
+            g_current_regs[REG_X10_NDX], g_current_regs[REG_X11_NDX],
+            g_current_regs[REG_X12_NDX], g_current_regs[REG_X13_NDX],
+            g_current_regs[REG_X14_NDX], g_current_regs[REG_X15_NDX]);
+      _alert("X16:%08x X17:%08x X18:%08x X19:%08x X20:%08x X21:%08x X22:%08x X23:%08x\n",
+            g_current_regs[REG_X16_NDX], g_current_regs[REG_X17_NDX],
+            g_current_regs[REG_X18_NDX], g_current_regs[REG_X19_NDX],
+            g_current_regs[REG_X20_NDX], g_current_regs[REG_X21_NDX],
+            g_current_regs[REG_X22_NDX], g_current_regs[REG_X23_NDX]);
+      _alert("X24:%08x X25:%08x  GP:%08x  FP:%08x  SP:%08x  RA:%08x  EA:%08x  BA:%08x\n",
+            g_current_regs[REG_X24_NDX], g_current_regs[REG_X25_NDX],
+            g_current_regs[REG_X26_NDX], g_current_regs[REG_X27_NDX],
+            g_current_regs[REG_X28_NDX], g_current_regs[REG_X29_NDX],
+            g_current_regs[REG_X30_NDX], g_current_regs[REG_X31_NDX]);
+      _alert(" IE:%08x\n",
+            g_current_regs[REG_X32_NDX]);
+    }
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lm32_dumpstate
+ ****************************************************************************/
+
+void lm32_dumpstate(void)
+{
+  struct tcb_s *rtcb = this_task();
+  uint32_t sp = up_getsp();
+  uint32_t ustackbase;
+  uint32_t ustacksize;
+#if CONFIG_ARCH_INTERRUPTSTACK > 3
+  uint32_t istackbase;
+  uint32_t istacksize;
+#endif
+
+  /* Get the limits on the user stack memory */
+
+  if (rtcb->pid == 0)
+    {
+      ustackbase = g_idle_topstack - 4;
+      ustacksize = CONFIG_IDLETHREAD_STACKSIZE;
+    }
+  else
+    {
+      ustackbase = (uint32_t)rtcb->adj_stack_ptr;
+      ustacksize = (uint32_t)rtcb->adj_stack_size;
+    }
+
+  /* Get the limits on the interrupt stack memory */
+
+#if CONFIG_ARCH_INTERRUPTSTACK > 3
+  istackbase = (uint32_t)&g_intstackbase;
+  istacksize = (CONFIG_ARCH_INTERRUPTSTACK & ~3) - 4;
+
+  /* Show interrupt stack info */
+
+  _alert("sp:     %08x\n", sp);
+  _alert("IRQ stack:\n");
+  _alert("  base: %08x\n", istackbase);
+  _alert("  size: %08x\n", istacksize);
+
+  /* Does the current stack pointer lie within the interrupt
+   * stack?
+   */
+
+  if (sp <= istackbase && sp > istackbase - istacksize)
+    {
+      /* Yes.. dump the interrupt stack */
+
+      up_stackdump(sp, istackbase);
+
+      /* Extract the user stack pointer which should lie
+       * at the base of the interrupt stack.
+       */
+
+      sp = g_intstackbase;
+      _alert("sp:     %08x\n", sp);
+    }
+
+  /* Show user stack info */
+
+  _alert("User stack:\n");
+  _alert("  base: %08x\n", ustackbase);
+  _alert("  size: %08x\n", ustacksize);
+#else
+  _alert("sp:         %08x\n", sp);
+  _alert("stack base: %08x\n", ustackbase);
+  _alert("stack size: %08x\n", ustacksize);
+#endif
+
+  /* Dump the user stack if the stack pointer lies within the allocated user
+   * stack memory.
+   */
+
+  if (sp > ustackbase || sp <= ustackbase - ustacksize)
+    {
+#if !defined(CONFIG_ARCH_INTERRUPTSTACK) || CONFIG_ARCH_INTERRUPTSTACK < 4
+      _alert("ERROR: Stack pointer is not within allocated stack\n");
+#endif
+    }
+  else
+    {
+      up_stackdump(sp, ustackbase);
+    }
+
+  /* Then dump the registers (if available) */
+
+  up_registerdump();
+}
+
+#endif /* CONFIG_ARCH_STACKDUMP */
diff --git a/arch/misoc/src/lm32/lm32_exit.c b/arch/misoc/src/lm32/lm32_exit.c
new file mode 100644
index 0000000000000000000000000000000000000000..8dd96b0a3ac493693102a2b75435bb9f8dd81991
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_exit.c
@@ -0,0 +1,184 @@
+/****************************************************************************
+ * arch/misoc/src/lm32/lm32_exit.c
+ *
+ *   Copyright (C) 2010, 2013-2014, 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#ifdef CONFIG_DUMP_ON_EXIT
+#  include 
+#endif
+
+#include 
+
+#include "task/task.h"
+#include "sched/sched.h"
+#include "group/group.h"
+#include "lm32.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: _up_dumponexit
+ *
+ * Description:
+ *   Dump the state of all tasks whenever on task exits.  This is debug
+ *   instrumentation that was added to check file-related reference counting
+ *   but could be useful again sometime in the future.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DUMP_ON_EXIT
+static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
+{
+#if CONFIG_NFILE_DESCRIPTORS > 0
+  FAR struct filelist *filelist;
+#if CONFIG_NFILE_STREAMS > 0
+  FAR struct streamlist *streamlist;
+#endif
+  int i;
+#endif
+
+  sinfo("  TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
+  sinfo("    priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
+
+#if CONFIG_NFILE_DESCRIPTORS > 0
+  filelist = tcb->group->tg_filelist;
+  for (i = 0; i < CONFIG_NFILE_DESCRIPTORS; i++)
+    {
+      struct inode *inode = filelist->fl_files[i].f_inode;
+      if (inode)
+        {
+          sinfo("      fd=%d refcount=%d\n",
+                i, inode->i_crefssinfo);
+        }
+    }
+#endif
+
+#if CONFIG_NFILE_STREAMS > 0
+  streamlist = tcb->group->tg_streamlist;
+  for (i = 0; i < CONFIG_NFILE_STREAMS; i++)
+    {
+      struct file_struct *filep = &streamlist->sl_streams[i];
+      if (filep->fs_fd >= 0)
+        {
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
+          if (filep->fs_bufstart != NULL)
+            {
+              sinfo("      fd=%d nbytes=%d\n",
+                    filep->fs_fd,
+                    filep->fs_bufpos - filep->fs_bufstart);
+            }
+          else
+#endif
+            {
+              sinfo("      fd=%d\n", filep->fs_fd);
+            }
+        }
+    }
+#endif
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: _exit
+ *
+ * Description:
+ *   This function causes the currently executing task to cease
+ *   to exist.  This is a special case of task_delete() where the task to
+ *   be deleted is the currently executing task.  It is more complex because
+ *   a context switch must be perform to the next ready to run task.
+ *
+ ****************************************************************************/
+
+void _exit(int status)
+{
+  struct tcb_s *tcb;
+
+  /* Make sure that we are in a critical section with local interrupts.
+   * The IRQ state will be restored when the next task is started.
+   */
+
+  (void)enter_critical_section();
+
+  sinfo("TCB=%p exiting\n", this_task());
+
+#ifdef CONFIG_DUMP_ON_EXIT
+  sinfo("Other tasks:\n");
+  sched_foreach(_up_dumponexit, NULL);
+#endif
+
+  /* Destroy the task at the head of the ready to run list. */
+
+  (void)task_exit();
+
+  /* Now, perform the context switch to the new ready-to-run task at the
+   * head of the list.
+   */
+
+  tcb = this_task();
+
+#ifdef CONFIG_ARCH_ADDRENV
+  /* Make sure that the address environment for the previously running
+   * task is closed down gracefully (data caches dump, MMU flushed) and
+   * set up the address environment for the new thread at the head of
+   * the ready-to-run list.
+   */
+
+  (void)group_addrenv(tcb);
+#endif
+
+  /* Then switch contexts */
+
+  up_fullcontextrestore(tcb->xcp.regs);
+}
diff --git a/arch/misoc/src/lm32/lm32_flushcache.c b/arch/misoc/src/lm32/lm32_flushcache.c
new file mode 100644
index 0000000000000000000000000000000000000000..8d1d653a6b56717a7e75fa2938a11b85c4bf6da7
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_flushcache.c
@@ -0,0 +1,86 @@
+/****************************************************************************
+ *  arch/misoc/src/lm32/lm32_flushcache.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#include "chip.h"
+#include "lm32.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lm32_flush_dcache
+ *
+ * Description:
+ *   Flush the data cache of the cpu
+ *
+ ****************************************************************************/
+
+void lm32_flush_dcache(void)
+{
+  asm volatile(
+    "wcsr DCC, r0\n"
+    "nop\n"
+    "nop\n"
+    "nop\n"
+    "nop\n"
+    );
+}
+
+/****************************************************************************
+ * Name: lm32_flush_icache
+ *
+ * Description:
+ *   Flush the instruction cache of the cpu
+ *
+ ****************************************************************************/
+
+void lm32_flush_icache(void)
+{
+  asm volatile(
+    "wcsr ICC, r0\n"
+    "nop\n"
+    "nop\n"
+    "nop\n"
+    "nop\n"
+    );
+}
diff --git a/arch/misoc/src/lm32/lm32_idle.c b/arch/misoc/src/lm32/lm32_idle.c
new file mode 100644
index 0000000000000000000000000000000000000000..5b85bcc0c030f47f727f60d24f90a9c7a8e9c8ac
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_idle.c
@@ -0,0 +1,96 @@
+/****************************************************************************
+ *  arch/misoc/src/lm32/lm32_idle.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+#include "lm32.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_idle
+ *
+ * Description:
+ *   up_idle() is the logic that will be executed when their is no other
+ *   ready-to-run task.  This is processor idle time and will continue until
+ *   some interrupt occurs to cause a context switch from the idle task.
+ *
+ *   Processing in this state may be processor-specific. e.g., this is where
+ *   power management operations might be performed.
+ *
+ ****************************************************************************/
+
+void up_idle(void)
+{
+#if defined(CONFIG_SUPPRESS_INTERRUPTS) || defined(CONFIG_SUPPRESS_TIMER_INTS)
+  /* If the system is idle and there are no timer interrupts, then process
+   * "fake" timer interrupts. Hopefully, something will wake up.
+   */
+
+  sched_process_timer();
+#else
+
+  /* This would be an appropriate place to put some MCU-specific logic to
+   * sleep in a reduced power mode until an interrupt occurs to save power
+   */
+
+  /* This is a kludge that I still don't understand.  The call to kmm_trysemaphore()
+   * in the os_start.c IDLE loop seems necessary for the good health of the IDLE
+   * loop.  When the work queue is enabled, this logic is removed from the IDLE
+   * loop and it appears that we are somehow left idling with interrupts non-
+   * functional. The following should be no-op, it just disables then re-enables
+   * interrupts.  But it fixes the problem and will stay here until I understand
+   * the problem/fix better.
+   *
+   * And no, the contents of the CP0 status register are not incorrect.  But for
+   * some reason the status register needs to be re-written again on this thread
+   * for it to take effect.  This might be a PIC32-only issue?
+   */
+
+#ifdef CONFIG_SCHED_WORKQUEUE
+  irqstate_t flags = enter_critical_section();
+  leave_critical_section(flags);
+#endif
+#endif
+}
diff --git a/arch/misoc/src/lm32/lm32_initialize.c b/arch/misoc/src/lm32/lm32_initialize.c
new file mode 100644
index 0000000000000000000000000000000000000000..1c4323215af1e0f9f5f518bee2d350dee1ceeb64
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_initialize.c
@@ -0,0 +1,85 @@
+/****************************************************************************
+ * arch/misoc/src/lm32/lm32_initialize.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "misoc.h"
+#include "lm32.h"
+
+/****************************************************************************
+ * Public Functionis
+ ****************************************************************************/
+
+void up_initialize(void)
+{
+  /* Initialize the System Timer */
+
+  lm32_irq_initialize();
+
+  /* Initialize the serial driver */
+
+  misoc_serial_initialize();
+
+  /* Initialize the system timer */
+
+  misoc_timer_initialize();
+
+  /* Initialize the network cores */
+
+  misoc_net_initialize(0);
+
+}
diff --git a/arch/misoc/src/lm32/lm32_initialstate.c b/arch/misoc/src/lm32/lm32_initialstate.c
new file mode 100644
index 0000000000000000000000000000000000000000..f46d2aaf07b476136dc8c0fd9f1d043a41397679
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_initialstate.c
@@ -0,0 +1,124 @@
+/****************************************************************************
+ * arch/misoc/src/lm32/up_initialstate.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "lm32.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_initial_state
+ *
+ * Description:
+ *   A new thread is being started and a new TCB
+ *   has been created. This function is called to initialize
+ *   the processor specific portions of the new TCB.
+ *
+ *   This function must setup the intial architecture registers
+ *   and/or  stack so that execution will begin at tcb->start
+ *   on the next context switch.
+ *
+ ****************************************************************************/
+
+void up_initial_state(struct tcb_s *tcb)
+{
+  struct xcptcontext *xcp = &tcb->xcp;
+
+  /* Initialize the initial exception register context structure */
+
+  memset(xcp, 0, sizeof(struct xcptcontext));
+
+  /* Save the initial stack pointer.  Hmmm.. the stack is set to the very
+   * beginning of the stack region.  Some functions may want to store data on
+   * the caller's stack and it might be good to reserve some space.  However,
+   * only the start function would do that and we have control over that one
+   */
+
+  xcp->regs[REG_SP]      = (uint32_t)tcb->adj_stack_ptr;
+
+  /* Save the task entry point */
+
+  xcp->regs[REG_EPC]     = (uint32_t)tcb->start;
+
+  /* Initial state of IE:  Interrupts enabled */
+
+  xcp->regs[REG_INT_CTX] = 2;
+
+  /* If this task is running PIC, then set the PIC base register to the
+   * address of the allocated D-Space region.
+   */
+
+#ifdef CONFIG_PIC
+#  warning "Missing logic"
+#endif
+
+  /* Set privileged- or unprivileged-mode, depending on how NuttX is
+   * configured and what kind of thread is being started.
+   *
+   * If the kernel build is not selected, then all threads run in
+   * privileged thread mode.
+   */
+
+#ifdef CONFIG_BUILD_KERNEL
+#  warning "Missing logic"
+#endif
+}
diff --git a/arch/misoc/src/lm32/lm32_interruptcontext.c b/arch/misoc/src/lm32/lm32_interruptcontext.c
new file mode 100644
index 0000000000000000000000000000000000000000..8edd55385326a1ba69b4952369846e689eae29c7
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_interruptcontext.c
@@ -0,0 +1,62 @@
+/****************************************************************************
+ *  arch/misoc/src/lm32/up_interruptcontext.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include "lm32.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_interrupt_context
+ *
+ * Description: Return true is we are currently executing in
+ * the interrupt handler context.
+ ****************************************************************************/
+
+bool up_interrupt_context(void)
+{
+  return g_current_regs != NULL;
+}
diff --git a/arch/misoc/src/lm32/lm32_irq.c b/arch/misoc/src/lm32/lm32_irq.c
new file mode 100644
index 0000000000000000000000000000000000000000..08b6953b081cf2d1a51337f5343c813ca071c119
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_irq.c
@@ -0,0 +1,165 @@
+/****************************************************************************
+ *  arch/misoc/src/lm32/_irq.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "chip.h"
+#include "lm32.h"
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+volatile uint32_t *g_current_regs;
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lm32_irq_initialize
+ ****************************************************************************/
+
+void lm32_irq_initialize(void)
+{
+  /* currents_regs is non-NULL only while processing an interrupt */
+
+  g_current_regs = NULL;
+
+  /* Attach the software interrupt */
+
+  (void)irq_attach(LM32_IRQ_SWINT, lm32_swint, NULL);
+
+  /* Enable interrupts */
+
+  irq_setie(1);
+}
+
+/****************************************************************************
+ * Name: up_irq_save
+ *
+ * Description:
+ *
+ ****************************************************************************/
+
+irqstate_t up_irq_save(void)
+{
+  irqstate_t flags;
+
+  /* Get the previous value of IE */
+
+  flags = irq_getie();
+
+  /* Disable interrupts and return the previous interrupt state */
+
+  irq_setie(0);
+  return flags;
+}
+
+/****************************************************************************
+ * Name: up_irq_restore
+ *
+ * Description:
+ *
+ ****************************************************************************/
+
+void up_irq_restore(irqstate_t flags)
+{
+  /* Restore the interrupt state returned by up_save_irq() */
+
+  irq_setie(flags);
+}
+
+/****************************************************************************
+ * Name: up_disable_irq
+ *
+ * Description:
+ *   Disable the IRQ specified by 'irq'
+ *
+ ****************************************************************************/
+
+void up_disable_irq(int irq)
+{
+  irqstate_t flags;
+
+  DEBUGASSERT(irq >= 0 && irq < NR_IRQS);
+
+  /* Ignore any attempt to disable software interrupts */
+
+  if (irq < LM32_NINTERRUPTS)
+    {
+      /* Disable interrupts by clearing the bit that corresponds to the irq */
+
+      flags  = irq_getmask();
+      flags &= ~(1 << irq);
+      irq_setmask(flags);
+    }
+}
+
+/****************************************************************************
+ * Name: up_enable_irq
+ *
+ * Description:
+ *   Enable the IRQ specified by 'irq'
+ *
+ ****************************************************************************/
+
+void up_enable_irq(int irq)
+{
+  irqstate_t flags;
+  DEBUGASSERT(irq >= 0 && irq < NR_IRQS);
+
+  /* Ignore any attempt to enable software interrupts */
+
+  if (irq < LM32_NINTERRUPTS)
+    {
+      /* Enable interrupts by setting the bit that corresponds to the irq */
+
+      flags  = irq_getmask();
+      flags |= (1 << irq);
+      irq_setmask(flags);
+    }
+}
diff --git a/arch/misoc/src/lm32/lm32_releasepending.c b/arch/misoc/src/lm32/lm32_releasepending.c
new file mode 100644
index 0000000000000000000000000000000000000000..e100dd96ccb0c373fb5e9c850ba838792bb9b0ac
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_releasepending.c
@@ -0,0 +1,149 @@
+/****************************************************************************
+ *  arch/misoc/src/lm32/lm32_releasepending.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "group/group.h"
+#include "lm32.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_release_pending
+ *
+ * Description:
+ *   Release and ready-to-run tasks that have
+ *   collected in the pending task list.  This can call a
+ *   context switch if a new task is placed at the head of
+ *   the ready to run list.
+ *
+ ****************************************************************************/
+
+void up_release_pending(void)
+{
+  struct tcb_s *rtcb = this_task();
+
+  sinfo("From TCB=%p\n", rtcb);
+
+  /* Merge the g_pendingtasks list into the ready-to-run task list */
+
+  /* sched_lock(); */
+  if (sched_mergepending())
+    {
+      /* The currently active task has changed!  We will need to switch
+       * contexts.
+       *
+       * Update scheduler parameters.
+       */
+
+      sched_suspend_scheduler(rtcb);
+
+      /* Are we operating in interrupt context? */
+
+      if (g_current_regs)
+        {
+          /* Yes, then we have to do things differently.
+           * Just copy the g_current_regs into the OLD rtcb.
+           */
+
+           up_savestate(rtcb->xcp.regs);
+
+          /* Restore the exception context of the rtcb at the (new) head
+           * of the ready-to-run task list.
+           */
+
+          rtcb = this_task();
+
+          /* Update scheduler parameters */
+
+          sched_resume_scheduler(rtcb);
+
+          /* Then switch contexts.  Any necessary address environment
+           * changes will be made when the interrupt returns.
+           */
+
+          up_restorestate(rtcb->xcp.regs);
+        }
+
+      /* No, then we will need to perform the user context switch */
+
+      else
+        {
+          /* Switch context to the context of the task at the head of the
+           * ready to run list.
+           */
+
+          struct tcb_s *nexttcb = this_task();
+
+#ifdef CONFIG_ARCH_ADDRENV
+          /* Make sure that the address environment for the previously
+           * running task is closed down gracefully (data caches dump,
+           * MMU flushed) and set up the address environment for the new
+           * thread at the head of the ready-to-run list.
+           */
+
+          (void)group_addrenv(nexttcb);
+#endif
+          /* Update scheduler parameters */
+
+          sched_resume_scheduler(nexttcb);
+
+          /* Then switch contexts */
+
+          up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
+
+          /* up_switchcontext forces a context switch to the task at the
+           * head of the ready-to-run list.  It does not 'return' in the
+           * normal sense.  When it does return, it is because the blocked
+           * task is again ready to run and has execution priority.
+           */
+        }
+    }
+}
diff --git a/arch/misoc/src/lm32/lm32_releasestack.c b/arch/misoc/src/lm32/lm32_releasestack.c
new file mode 100644
index 0000000000000000000000000000000000000000..fa88500bf9d04beff9cfea29695be2db3357d557
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_releasestack.c
@@ -0,0 +1,115 @@
+/****************************************************************************
+ *  arch/misoc/src/lm32/up_releasestack.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "lm32.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_release_stack
+ *
+ * Description:
+ *   A task has been stopped. Free all stack related resources retained in
+ *   the defunct TCB.
+ *
+ * Input Parmeters
+ *   - dtcb:  The TCB containing information about the stack to be released
+ *   - ttype:  The thread type.  This may be one of following (defined in
+ *     include/nuttx/sched.h):
+ *
+ *       TCB_FLAG_TTYPE_TASK     Normal user task
+ *       TCB_FLAG_TTYPE_PTHREAD  User pthread
+ *       TCB_FLAG_TTYPE_KERNEL   Kernel thread
+ *
+ *     This thread type is normally available in the flags field of the TCB,
+ *     however, there are certain error recovery contexts where the TCB may
+ *     not be fully initialized when up_release_stack is called.
+ *
+ *     If CONFIG_BUILD_KERNEL is defined, then this thread type may affect
+ *     how the stack is freed.  For example, kernel thread stacks may have
+ *     been allocated from protected kernel memory.  Stacks for user tasks
+ *     and threads must have come from memory that is accessible to user
+ *     code.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void up_release_stack(FAR struct tcb_s *dtcb, uint8_t ttype)
+{
+  /* Is there a stack allocated? */
+
+  if (dtcb->stack_alloc_ptr)
+    {
+#if defined(CONFIG_BUILD_KERNEL) && defined(CONFIG_MM_KERNEL_HEAP)
+      /* Use the kernel allocator if this is a kernel thread */
+
+      if (ttype == TCB_FLAG_TTYPE_KERNEL)
+        {
+          sched_kfree(dtcb->stack_alloc_ptr);
+        }
+      else
+#endif
+        {
+          /* Use the user-space allocator if this is a task or pthread */
+
+          sched_ufree(dtcb->stack_alloc_ptr);
+        }
+
+      /* Mark the stack freed */
+
+      dtcb->stack_alloc_ptr = NULL;
+    }
+
+  /* The size of the allocated stack is now zero */
+
+  dtcb->adj_stack_size = 0;
+}
diff --git a/arch/misoc/src/lm32/lm32_reprioritizertr.c b/arch/misoc/src/lm32/lm32_reprioritizertr.c
new file mode 100644
index 0000000000000000000000000000000000000000..e6b42611018b928e66eca1b246c1489d6710f721
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_reprioritizertr.c
@@ -0,0 +1,203 @@
+/****************************************************************************
+ *  arch/misoc/src/lm32/lm32_reprioritizertr.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "group/group.h"
+#include "lm32.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_reprioritize_rtr
+ *
+ * Description:
+ *   Called when the priority of a running or
+ *   ready-to-run task changes and the reprioritization will
+ *   cause a context switch.  Two cases:
+ *
+ *   1) The priority of the currently running task drops and the next
+ *      task in the ready to run list has priority.
+ *   2) An idle, ready to run task's priority has been raised above the
+ *      the priority of the current, running task and it now has the
+ *      priority.
+ *
+ * Inputs:
+ *   tcb: The TCB of the task that has been reprioritized
+ *   priority: The new task priority
+ *
+ ****************************************************************************/
+
+void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
+{
+  /* Verify that the caller is sane */
+
+  if (tcb->task_state < FIRST_READY_TO_RUN_STATE ||
+      tcb->task_state > LAST_READY_TO_RUN_STATE
+#if SCHED_PRIORITY_MIN > 0
+      || priority < SCHED_PRIORITY_MIN
+#endif
+#if SCHED_PRIORITY_MAX < UINT8_MAX
+      || priority > SCHED_PRIORITY_MAX
+#endif
+    )
+    {
+       PANIC();
+    }
+  else
+    {
+      struct tcb_s *rtcb = this_task();
+      bool switch_needed;
+
+      sinfo("TCB=%p PRI=%d\n", tcb, priority);
+
+      /* Remove the tcb task from the ready-to-run list.
+       * sched_removereadytorun will return true if we just
+       * remove the head of the ready to run list.
+       */
+
+      switch_needed = sched_removereadytorun(tcb);
+
+      /* Setup up the new task priority */
+
+      tcb->sched_priority = (uint8_t)priority;
+
+      /* Return the task to the specified blocked task list.
+       * sched_addreadytorun will return true if the task was
+       * added to the new list.  We will need to perform a context
+       * switch only if the EXCLUSIVE or of the two calls is non-zero
+       * (i.e., one and only one the calls changes the head of the
+       * ready-to-run list).
+       */
+
+      switch_needed ^= sched_addreadytorun(tcb);
+
+      /* Now, perform the context switch if one is needed */
+
+      if (switch_needed)
+        {
+          /* If we are going to do a context switch, then now is the right
+           * time to add any pending tasks back into the ready-to-run list.
+           * task list now
+           */
+
+          if (g_pendingtasks.head)
+            {
+              sched_mergepending();
+            }
+
+          /* Update scheduler parameters */
+
+          sched_suspend_scheduler(rtcb);
+
+         /* Are we in an interrupt handler? */
+
+          if (g_current_regs)
+            {
+              /* Yes, then we have to do things differently.
+               * Just copy the g_current_regs into the OLD rtcb.
+               */
+
+               up_savestate(rtcb->xcp.regs);
+
+              /* Restore the exception context of the rtcb at the (new) head
+               * of the ready-to-run task list.
+               */
+
+              rtcb = this_task();
+
+              /* Update scheduler parameters */
+
+              sched_resume_scheduler(rtcb);
+
+              /* Then switch contexts.  Any necessary address environment
+               * changes will be made when the interrupt returns.
+               */
+
+              up_restorestate(rtcb->xcp.regs);
+            }
+
+          /* No, then we will need to perform the user context switch */
+
+          else
+            {
+              /* Switch context to the context of the task at the head of the
+               * ready to run list.
+               */
+
+              struct tcb_s *nexttcb = this_task();
+
+#ifdef CONFIG_ARCH_ADDRENV
+              /* Make sure that the address environment for the previously
+               * running task is closed down gracefully (data caches dump,
+               * MMU flushed) and set up the address environment for the new
+               * thread at the head of the ready-to-run list.
+               */
+
+              (void)group_addrenv(nexttcb);
+#endif
+              /* Update scheduler parameters */
+
+              sched_resume_scheduler(nexttcb);
+
+              /* Then switch contexts */
+
+              up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
+
+              /* up_switchcontext forces a context switch to the task at the
+               * head of the ready-to-run list.  It does not 'return' in the
+               * normal sense.  When it does return, it is because the blocked
+               * task is again ready to run and has execution priority.
+               */
+            }
+        }
+    }
+}
diff --git a/arch/misoc/src/lm32/lm32_schedulesigaction.c b/arch/misoc/src/lm32/lm32_schedulesigaction.c
new file mode 100644
index 0000000000000000000000000000000000000000..d72e68cf64c2dc6c2f0cb11a0fddb2c80b26b79e
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_schedulesigaction.c
@@ -0,0 +1,206 @@
+/****************************************************************************
+ * arch/misoc/src/lm32/lm32_schedulesigaction.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ *   Modified for MISOC:
+ *
+ *   Copyright (C) 2016 Ramtin Amin. All rights reserved.
+ *   Author: Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "lm32.h"
+
+#ifndef CONFIG_DISABLE_SIGNALS
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_schedule_sigaction
+ *
+ * Description:
+ *   This function is called by the OS when one or more
+ *   signal handling actions have been queued for execution.
+ *   The architecture specific code must configure things so
+ *   that the 'igdeliver' callback is executed on the thread
+ *   specified by 'tcb' as soon as possible.
+ *
+ *   This function may be called from interrupt handling logic.
+ *
+ *   This operation should not cause the task to be unblocked
+ *   nor should it cause any immediate execution of sigdeliver.
+ *   Typically, a few cases need to be considered:
+ *
+ *   (1) This function may be called from an interrupt handler
+ *       During interrupt processing, all xcptcontext structures
+ *       should be valid for all tasks.  That structure should
+ *       be modified to invoke sigdeliver() either on return
+ *       from (this) interrupt or on some subsequent context
+ *       switch to the recipient task.
+ *   (2) If not in an interrupt handler and the tcb is NOT
+ *       the currently executing task, then again just modify
+ *       the saved xcptcontext structure for the recipient
+ *       task so it will invoke sigdeliver when that task is
+ *       later resumed.
+ *   (3) If not in an interrupt handler and the tcb IS the
+ *       currently executing task -- just call the signal
+ *       handler now.
+ *
+ ****************************************************************************/
+
+void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
+{
+  irqstate_t flags;
+
+  sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+
+  /* Make sure that interrupts are disabled */
+
+  flags = enter_critical_section();
+
+  /* Refuse to handle nested signal actions */
+
+  if (!tcb->xcp.sigdeliver)
+    {
+      /* First, handle some special cases when the signal is
+       * being delivered to the currently executing task.
+       */
+
+      sinfo("rtcb=0x%p g_current_regs=0x%p\n",
+            this_task(), g_current_regs);
+
+      if (tcb == this_task())
+        {
+          /* CASE 1:  We are not in an interrupt handler and
+           * a task is signalling itself for some reason.
+           */
+
+          if (!g_current_regs)
+            {
+              /* In this case just deliver the signal now. */
+
+              sigdeliver(tcb);
+            }
+
+          /* CASE 2:  We are in an interrupt handler AND the
+           * interrupted task is the same as the one that
+           * must receive the signal, then we will have to modify
+           * the return state as well as the state in the TCB.
+           *
+           * Hmmm... there looks like a latent bug here: The following
+           * logic would fail in the strange case where we are in an
+           * interrupt handler, the thread is signalling itself, but
+           * a context switch to another task has occurred so that
+           * g_current_regs does not refer to the thread of this_task()!
+           */
+
+          else
+            {
+              /* Save the return EPC and STATUS registers.  These will be
+               * restored by the signal trampoline after the signals have
+               * been delivered.
+               */
+
+              tcb->xcp.sigdeliver       = sigdeliver;
+              tcb->xcp.saved_epc        = g_current_regs[REG_EPC];
+
+              /* Then set up to vector to the trampoline with interrupts
+               * disabled
+               */
+
+              g_current_regs[REG_EPC]     = (uint32_t)lm32_sigdeliver;
+              g_current_regs[REG_INT_CTX] = 0;
+
+
+              /* And make sure that the saved context in the TCB
+               * is the same as the interrupt return context.
+               */
+
+              up_savestate(tcb->xcp.regs);
+
+              sinfo("PC/STATUS Saved: %08x/%08x New: %08x/%08x\n",
+                    tcb->xcp.saved_epc, tcb->xcp.saved_status,
+                    g_current_regs[REG_EPC], g_current_regs[REG_STATUS]);
+            }
+        }
+
+      /* Otherwise, we are (1) signaling a task is not running
+       * from an interrupt handler or (2) we are not in an
+       * interrupt handler and the running task is signalling
+       * some non-running task.
+       */
+
+      else
+        {
+          /* Save the return EPC and STATUS registers.  These will be
+           * restored by the signal trampoline after the signals have
+           * been delivered.
+           */
+
+          tcb->xcp.sigdeliver       = sigdeliver;
+          tcb->xcp.saved_epc        = tcb->xcp.regs[REG_EPC];
+          tcb->xcp.saved_int_ctx    = tcb->xcp.regs[REG_INT_CTX];
+
+          /* Then set up to vector to the trampoline with interrupts
+           * disabled
+           */
+
+          tcb->xcp.regs[REG_EPC]      = (uint32_t)lm32_sigdeliver;
+          tcb->xcp.regs[REG_INT_CTX]  = 0;
+
+          sinfo("PC/STATUS Saved: %08x/%08x New: %08x/%08x\n",
+                tcb->xcp.saved_epc, tcb->xcp.saved_status,
+                tcb->xcp.regs[REG_EPC], tcb->xcp.regs[REG_STATUS]);
+        }
+    }
+
+  leave_critical_section(flags);
+}
+
+#endif /* !CONFIG_DISABLE_SIGNALS */
diff --git a/arch/misoc/src/lm32/lm32_sigdeliver.c b/arch/misoc/src/lm32/lm32_sigdeliver.c
new file mode 100644
index 0000000000000000000000000000000000000000..f8896914697b3e41fce636d977fb0e6e53197557
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_sigdeliver.c
@@ -0,0 +1,136 @@
+/****************************************************************************
+ * arch/misoc/src/lm32/lm32_sigdeliver.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "lm32.h"
+
+#ifndef CONFIG_DISABLE_SIGNALS
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lm32_sigdeliver
+ *
+ * Description:
+ *   This is the a signal handling trampoline.  When a signal action was
+ *   posted.  The task context was mucked with and forced to branch to this
+ *   location with interrupts disabled.
+ *
+ ****************************************************************************/
+
+void lm32_sigdeliver(void)
+{
+  struct tcb_s *rtcb = this_task();
+  uint32_t regs[XCPTCONTEXT_REGS];
+  sig_deliver_t sigdeliver;
+
+  /* Save the errno.  This must be preserved throughout the signal handling
+   * so that the user code final gets the correct errno value (probably
+   * EINTR).
+   */
+
+  int saved_errno = rtcb->pterrno;
+
+  board_autoled_on(LED_SIGNAL);
+
+  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+        rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
+  ASSERT(rtcb->xcp.sigdeliver != NULL);
+
+  /* Save the real return state on the stack. */
+
+  up_copystate(regs, rtcb->xcp.regs);
+  regs[REG_EPC]        = rtcb->xcp.saved_epc;
+  regs[REG_INT_CTX]    = rtcb->xcp.saved_int_ctx;
+
+  /* Get a local copy of the sigdeliver function pointer. We do this so that
+   * we can nullify the sigdeliver function pointer in the TCB and accept
+   * more signal deliveries while processing the current pending signals.
+   */
+
+  sigdeliver           = rtcb->xcp.sigdeliver;
+  rtcb->xcp.sigdeliver = NULL;
+
+  /* Then restore the task interrupt state */
+
+  up_irq_restore((irqstate_t)regs[REG_INT_CTX]);
+
+  /* Deliver the signals */
+
+  sigdeliver(rtcb);
+
+  /* Output any debug messages BEFORE restoring errno (because they may
+   * alter errno), then disable interrupts again and restore the original
+   * errno that is needed by the user logic (it is probably EINTR).
+   */
+
+  sinfo("Resuming EPC: %08x INT_CTX: %08x\n", regs[REG_EPC], regs[REG_INT_CTX]);
+
+  (void)up_irq_save();
+  rtcb->pterrno = saved_errno;
+
+  /* Then restore the correct state for this thread of
+   * execution.
+   */
+
+  board_autoled_off(LED_SIGNAL);
+  up_fullcontextrestore(regs);
+
+  /* up_fullcontextrestore() should not return but could if the software
+   * interrupts are disabled.
+   */
+
+  PANIC();
+}
+
+#endif /* !CONFIG_DISABLE_SIGNALS */
diff --git a/arch/misoc/src/lm32/lm32_stackframe.c b/arch/misoc/src/lm32/lm32_stackframe.c
new file mode 100644
index 0000000000000000000000000000000000000000..981c655f81f1c5873b4c8ba431a52ba3970ea3cb
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_stackframe.c
@@ -0,0 +1,136 @@
+/****************************************************************************
+ * arch/misoc/src/lm32/lm32_stackframe.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "lm32.h"
+
+/****************************************************************************
+ * Pre-processor Macros
+ ****************************************************************************/
+
+/* LM32 requires at least a 4-byte stack alignment.  For floating point use,
+ * however, the stack must be aligned to 8-byte addresses.
+ */
+
+#ifdef CONFIG_LIBC_FLOATINGPOINT
+#  define STACK_ALIGNMENT   8
+#else
+#  define STACK_ALIGNMENT   4
+#endif
+
+/* Stack alignment macros */
+
+#define STACK_ALIGN_MASK    (STACK_ALIGNMENT-1)
+#define STACK_ALIGN_DOWN(a) ((a) & ~STACK_ALIGN_MASK)
+#define STACK_ALIGN_UP(a)   (((a) + STACK_ALIGN_MASK) & ~STACK_ALIGN_MASK)
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_stack_frame
+ *
+ * Description:
+ *   Allocate a stack frame in the TCB's stack to hold thread-specific data.
+ *   This function may be called anytime after up_create_stack() or
+ *   up_use_stack() have been called but before the task has been started.
+ *
+ *   Thread data may be kept in the stack (instead of in the TCB) if it is
+ *   accessed by the user code directly.  This includes such things as
+ *   argv[].  The stack memory is guaranteed to be in the same protection
+ *   domain as the thread.
+ *
+ *   The following TCB fields will be re-initialized:
+ *
+ *   - adj_stack_size: Stack size after removal of the stack frame from
+ *     the stack
+ *   - adj_stack_ptr: Adjusted initial stack pointer after the frame has
+ *     been removed from the stack.  This will still be the initial value
+ *     of the stack pointer when the task is started.
+ *
+ * Inputs:
+ *   - tcb:  The TCB of new task
+ *   - frame_size:  The size of the stack frame to allocate.
+ *
+ *  Returned Value:
+ *   - A pointer to bottom of the allocated stack frame.  NULL will be
+ *     returned on any failures.  The alignment of the returned value is
+ *     the same as the alignment of the stack itself.
+ *
+ ****************************************************************************/
+
+FAR void *up_stack_frame(FAR struct tcb_s *tcb, size_t frame_size)
+{
+  uintptr_t topaddr;
+
+  /* Align the frame_size */
+
+  frame_size = STACK_ALIGN_UP(frame_size);
+
+  /* Is there already a stack allocated? Is it big enough? */
+
+  if (!tcb->stack_alloc_ptr || tcb->adj_stack_size <= frame_size)
+    {
+      return NULL;
+    }
+
+  /* Save the adjusted stack values in the struct tcb_s */
+
+  topaddr               = (uintptr_t)tcb->adj_stack_ptr - frame_size;
+  tcb->adj_stack_ptr    = (FAR void *)topaddr;
+  tcb->adj_stack_size  -= frame_size;
+
+  /* Reset the initial stack pointer */
+
+  tcb->xcp.regs[REG_SP] = (uint32_t)tcb->adj_stack_ptr;
+
+  /* And return the pointer to the allocated region */
+
+  return (FAR void *)(topaddr + sizeof(uint32_t));
+}
diff --git a/arch/misoc/src/lm32/lm32_swint.c b/arch/misoc/src/lm32/lm32_swint.c
new file mode 100644
index 0000000000000000000000000000000000000000..7a49cdbb3375bb77b66e3336386d4816834d20f2
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_swint.c
@@ -0,0 +1,317 @@
+/****************************************************************************
+ * arch/misoc/src/lm32/lm32_swint.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "lm32.h"
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_registerdump
+ ****************************************************************************/
+
+#ifdef CONFIG_DEBUG_SYSCALL_INFO
+static void up_registerdump(const uint32_t *regs)
+{
+#if 0
+  svcinfo("EPC:%08x\n",
+          regs[REG_EPC]);
+  svcinfo("A0:%08x A1:%08x A2:%08x A3:%08x A4:%08x A5:%08x A6:%08x A7:%08x\n",
+          regs[REG_A0], regs[REG_A1], regs[REG_A2], regs[REG_A3],
+          regs[REG_A4], regs[REG_A5], regs[REG_A6], regs[REG_A7]);
+  svcinfo("T0:%08x T1:%08x T2:%08x T3:%08x T4:%08x T5:%08x T6:%08x\n",
+          regs[REG_T0], regs[REG_T1], regs[REG_T2], regs[REG_T3],
+          regs[REG_T4], regs[REG_T5], regs[REG_T6]);
+  svcinfo("S0:%08x S1:%08x S2:%08x S3:%08x S4:%08x S5:%08x S6:%08x S7:%08x\n",
+          regs[REG_S0], regs[REG_S1], regs[REG_S2], regs[REG_S3],
+          regs[REG_S4], regs[REG_S5], regs[REG_S6], regs[REG_S7]);
+  svcinfo("S8:%08x S9:%08x S10:%08x S11:%08x\n",
+          regs[REG_S8], regs[REG_S9], regs[REG_S10], regs[REG_S11]);
+#ifdef LM3232_SAVE_GP
+  svcinfo("GP:%08x SP:%08x FP:%08x TP:%08x RA:%08x\n",
+          regs[REG_GP], regs[REG_SP], regs[REG_FP], regs[REG_TP], regs[REG_RA]);
+#else
+  svcinfo("SP:%08x FP:%08x TP:%08x RA:%08x\n",
+          regs[REG_SP], regs[REG_FP], regs[REG_TP], regs[REG_RA]);
+#endif
+#endif
+}
+#else
+#  define up_registerdump(regs)
+#endif
+
+/****************************************************************************
+ * Name: dispatch_syscall
+ *
+ * Description:
+ *   Call the stub function corresponding to the system call.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BUILD_KERNEL
+static void dispatch_syscall(void) naked_function;
+static void dispatch_syscall(void)
+{
+#  error "Missing logic"
+
+/* Refer to arch/arm/src/armv7-m/up_svcall.h for how this is done for ARM */
+/*  __asm__ __volatile__ */
+/* ( */
+/*   Save registers */
+/*   Get the base of the stub lookup table */
+/*   Get the offset of the stub for this syscall */
+/*   Load the entry of the stub for this syscall */
+/*   Call the stub */
+/*   Restore regsisters */
+/*   Return from the syscall */
+/* ); */
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lm32_swint
+ *
+ * Description:
+ *   This is software interrupt exception handler that performs context
+ *   switching and manages system calls
+ *
+ ****************************************************************************/
+
+int lm32_swint(int irq, FAR void *context, FAR void *arg)
+{
+  uint32_t *regs = (uint32_t *)context;
+
+  DEBUGASSERT(g_current_regs == NULL);
+  g_current_regs = regs;
+ 
+  /* Software interrupt 0 is invoked with REG_A0 (REG_X10) = system call
+   * command and REG_A1-6 = variable number of
+   * arguments depending on the system call.
+   */
+
+#ifdef CONFIG_DEBUG_SYSCALL_INFO
+  svcinfo("Entry: regs: %p cmd: %d\n", regs, regs[REG_A0]);
+  up_registerdump(regs);
+#endif
+
+  /* Handle the SWInt according to the command in $a0 */
+
+  switch (regs[REG_A0])
+    {
+      /* A0=SYS_restore_context: This a restore context command:
+       *
+       *   void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
+       *
+       * At this point, the following values are saved in context:
+       *
+       *   A0 = SYS_restore_context
+       *   A1 = restoreregs
+       *
+       * In this case, we simply need to set g_current_regs to restore register
+       * area referenced in the saved R1. context == g_current_regs is the normal
+       * exception return.  By setting g_current_regs = context[R1], we force
+       * the return to the saved context referenced in $a1.
+       */
+
+      case SYS_restore_context:
+        {
+          DEBUGASSERT(regs[REG_A1] != 0);
+          g_current_regs = (uint32_t *)regs[REG_A1];
+        }
+        break;
+
+      /* A0=SYS_switch_context: This a switch context command:
+       *
+       *   void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
+       *
+       * At this point, the following values are saved in context:
+       *
+       *   A0 = SYS_switch_context
+       *   A1 = saveregs
+       *   A2 = restoreregs
+       *
+       * In this case, we save the context registers to the save register
+       * area reference by the saved contents of R5 and then set
+       * g_current_regs to to the save register area referenced by the saved
+       * contents of R6.
+       */
+
+      case SYS_switch_context:
+        {
+          DEBUGASSERT(regs[REG_A1] != 0 && regs[REG_A2] != 0);
+          lm32_copystate((uint32_t *)regs[REG_A1], regs);
+          g_current_regs = (uint32_t *)regs[REG_A2];
+        }
+        break;
+
+      /* A0=SYS_syscall_return: This a switch context command:
+       *
+       *   void up_sycall_return(void);
+       *
+       * At this point, the following values are saved in context:
+       *
+       *   A0 = SYS_syscall_return
+       *
+       * We need to restore the saved return address and return in
+       * unprivileged thread mode.
+       */
+
+#ifdef CONFIG_BUILD_KERNEL
+      case SYS_syscall_return:
+        {
+          struct tcb_s *rtcb = sched_self();
+          int index = (int)rtcb->xcp.nsyscalls - 1;
+
+          /* Make sure that there is a saved syscall return address. */
+
+          DEBUGASSERT(index >= 0);
+
+          /* Setup to return to the saved syscall return address in
+           * the original mode.
+           */
+
+          g_current_regs[REG_EPC] = rtcb->xcp.syscall[index].sysreturn;
+#error "Missing logic -- need to restore the original mode"
+          rtcb->xcp.nsyscalls   = index;
+        }
+        break;
+#endif
+
+      /* This is not an architecture-specify system call.  If NuttX is built
+       * as a standalone kernel with a system call interface, then all of the
+       * additional system calls must be handled as in the default case.
+       */
+
+      default:
+        {
+#ifdef CONFIG_BUILD_KERNEL
+          FAR struct tcb_s *rtcb = sched_self();
+          int index = rtcb->xcp.nsyscalls;
+
+          /* Verify that the SYS call number is within range */
+
+          DEBUGASSERT(g_current_regs[REG_A0] < SYS_maxsyscall);
+
+          /* Make sure that we got here that there is a no saved syscall
+           * return address.  We cannot yet handle nested system calls.
+           */
+
+          DEBUGASSERT(index < CONFIG_SYS_NNEST);
+
+          /* Setup to return to dispatch_syscall in privileged mode. */
+
+          rtcb->xcpsyscall[index].sysreturn = regs[REG_EPC];
+#error "Missing logic -- Need to save mode"
+          rtcb->xcp.nsyscalls  = index + 1;
+
+          regs[REG_EPC] = (uint32_t)dispatch_syscall;
+#error "Missing logic -- Need to set privileged mode"
+
+          /* Offset R0 to account for the reserved values */
+
+          g_current_regs[REG_A0] -= CONFIG_SYS_RESERVED;
+#else
+          svcerr("ERROR: Bad SYS call: %d\n", regs[REG_A0]);
+#endif
+        }
+        break;
+    }
+
+  /* Report what happened.  That might difficult in the case of a context switch */
+
+#ifdef CONFIG_DEBUG_SYSCALL_INFO
+  if (regs != g_current_regs)
+    {
+      svcinfo("SWInt Return: Context switch!\n");
+      up_registerdump((const uint32_t *)g_current_regs);
+    }
+  else
+    {
+      svcinfo("SWInt Return: %d\n", regs[REG_A0]);
+    }
+#endif
+
+
+#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
+  /* Check for a context switch.  If a context switch occurred, then
+   * g_current_regs will have a different value than it did on entry.  If an
+   * interrupt level context switch has occurred, then restore the floating
+   * point state and the establish the correct address environment before
+   * returning from the interrupt.
+   */
+
+  if (regs != g_current_regs)
+    {
+#ifdef CONFIG_ARCH_FPU
+      /* Restore floating point registers */
+
+      up_restorefpu((uint32_t *)g_current_regs);
+#endif
+
+#ifdef CONFIG_ARCH_ADDRENV
+      /* Make sure that the address environment for the previously
+       * running task is closed down gracefully (data caches dump,
+       * MMU flushed) and set up the address environment for the new
+       * thread at the head of the ready-to-run list.
+       */
+
+      (void)group_addrenv(NULL);
+#endif
+    }
+#endif
+
+  return OK;
+}
diff --git a/arch/misoc/src/lm32/lm32_syscall.S b/arch/misoc/src/lm32/lm32_syscall.S
new file mode 100644
index 0000000000000000000000000000000000000000..61b0b6ca7cf594d2a6ce3f1de63725403ef650de
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_syscall.S
@@ -0,0 +1,103 @@
+/****************************************************************************
+ * arch/misoc/src/lm32/lm32_syscall.S
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Ramtin Amin 
+ *
+ * Derives from RISC-V version:
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Public Symbols
+ ****************************************************************************/
+
+	.file	"up_syscall.S"
+	.global sys_call0
+	.global sys_call1
+	.global sys_call2
+	.global sys_call3
+	.global sys_call4
+	.global sys_call5
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_syscall0, up_syscall1, up_syscall2, up_syscall3
+ *
+ * Description:
+ *   up_syscall0 - System call SYS_ argument and no additional parameters.
+ *   up_syscall1 - System call SYS_ argument and one additional parameter.
+ *   up_syscall2 - System call SYS_ argument and two additional parameters.
+ *   up_syscall3 - System call SYS_ argument and three additional parameters.
+ *   up_syscall4 - System call SYS_ argument and four additional parameters.
+ *   up_syscall5 - System call SYS_ argument and five additional parameters.
+ *
+ * Assumption:
+ *   All interrupts are disabled except for the software interrupts.
+ *
+ ****************************************************************************/
+
+	.text
+
+sys_call0:	/* a0 holds the syscall number */
+sys_call1:	/* a0 holds the syscall number, argument in a1 */
+sys_call2:	/* a0 holds the syscall number, arguments in a1 and a2 */
+sys_call3:	/* a0 holds the syscall number, arguments in a1, a2, and a3 */
+sys_call4:	/* a0 holds the syscall number, arguments in a1, a2, a3 and a4 */
+sys_call5:	/* a0 holds the syscall number, arguments in a1, a2, a3, a4 and a5 */
+
+	/* Issue the ECALL opcode to perform a SW interrupt to the OS */
+
+   scall
+
+	/* The actual interrupt may not a occur for a few more cycles.  Let's
+	 * put a few nop's here in hope that the SW interrupt occurs during
+	 * the sequence of nops.
+	 */
+
+	nop
+	nop
+
+	/* Then return with the result of the software interrupt in v0 */
+
+	ret
+	nop
diff --git a/arch/misoc/src/lm32/lm32_unblocktask.c b/arch/misoc/src/lm32/lm32_unblocktask.c
new file mode 100644
index 0000000000000000000000000000000000000000..74b1d92472c890453bebf57fbba8725ce48732b3
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_unblocktask.c
@@ -0,0 +1,164 @@
+/****************************************************************************
+ *  arch/misoc/src/lm32/lm32_unblocktask.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "group/group.h"
+#include "clock/clock.h"
+#include "lm32.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_unblock_task
+ *
+ * Description:
+ *   A task is currently in an inactive task list
+ *   but has been prepped to execute.  Move the TCB to the
+ *   ready-to-run list, restore its context, and start execution.
+ *
+ * Inputs:
+ *   tcb: Refers to the tcb to be unblocked.  This tcb is
+ *     in one of the waiting tasks lists.  It must be moved to
+ *     the ready-to-run list and, if it is the highest priority
+ *     ready to run task, executed.
+ *
+ ****************************************************************************/
+
+void up_unblock_task(struct tcb_s *tcb)
+{
+  struct tcb_s *rtcb = this_task();
+
+  /* Verify that the context switch can be performed */
+
+  ASSERT((tcb->task_state >= FIRST_BLOCKED_STATE) &&
+         (tcb->task_state <= LAST_BLOCKED_STATE));
+
+  /* Remove the task from the blocked task list */
+
+  sched_removeblocked(tcb);
+
+  /* Add the task in the correct location in the prioritized
+   * ready-to-run task list
+   */
+
+  if (sched_addreadytorun(tcb))
+    {
+      /* The currently active task has changed! We need to do
+       * a context switch to the new task.
+       */
+
+      /* Update scheduler parameters */
+
+      sched_suspend_scheduler(rtcb);
+
+      /* Are we in an interrupt handler? */
+
+      if (g_current_regs)
+        {
+          /* Yes, then we have to do things differently.
+           * Just copy the g_current_regs into the OLD rtcb.
+           */
+
+          up_savestate(rtcb->xcp.regs);
+
+          /* Restore the exception context of the rtcb at the (new) head
+           * of the ready-to-run task list.
+           */
+
+          rtcb = this_task();
+
+          /* Update scheduler parameters */
+
+          sched_resume_scheduler(rtcb);
+
+          /* Then switch contexts.  Any necessary address environment
+           * changes will be made when the interrupt returns.
+           */
+
+          up_restorestate(rtcb->xcp.regs);
+        }
+
+      /* No, then we will need to perform the user context switch */
+
+      else
+        {
+          /* Restore the exception context of the new task that is ready to
+           * run (probably tcb).  This is the new rtcb at the head of the
+           * ready-to-run task list.
+           */
+
+          struct tcb_s *nexttcb = this_task();
+
+#ifdef CONFIG_ARCH_ADDRENV
+          /* Make sure that the address environment for the previously
+           * running task is closed down gracefully (data caches dump,
+           * MMU flushed) and set up the address environment for the new
+           * thread at the head of the ready-to-run list.
+           */
+
+          (void)group_addrenv(nexttcb);
+#endif
+          /* Update scheduler parameters */
+
+          sched_resume_scheduler(nexttcb);
+
+          /* Then switch contexts */
+
+          up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
+
+          /* up_switchcontext forces a context switch to the task at the
+           * head of the ready-to-run list.  It does not 'return' in the
+           * normal sense.  When it does return, it is because the blocked
+           * task is again ready to run and has execution priority.
+           */
+        }
+    }
+}
diff --git a/arch/misoc/src/lm32/lm32_vectors.S b/arch/misoc/src/lm32/lm32_vectors.S
new file mode 100644
index 0000000000000000000000000000000000000000..45407f0db7dddb30e52d2760eccf80e1bda0365d
--- /dev/null
+++ b/arch/misoc/src/lm32/lm32_vectors.S
@@ -0,0 +1,294 @@
+/****************************************************************************
+ * arch/misoc/src/lm32/lm32_allocateheap.c
+ * LM32 C startup code.
+ *
+ * Adapted for NuttX:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Ramtin Amin 
+ *
+ * Derives from LatticeMico32 C startup code.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* Linker memory organization ***********************************************/
+/* Data memory is organized as follows:
+ *
+ * 1) Initialized data (.data):
+ *    Start:   _sdata
+ *    End(+1): _edata
+ * 2) Uninitialized data (.bss):
+ *    Start:   _sbss
+ *    End(+1): _ebss
+ *
+ * The following are placed outside of the "normal" memory segments -- mostly
+ * so that they do not have to be cleared on power up.
+ *
+ * 3) Idle thread stack:
+ *    Start:   _ebss
+ *    End(+1): _ebss+CONFIG_IDLETHREAD_STACKSIZE
+ * 4) Heap:
+ *    Start:   _ebss+CONFIG_IDLETHREAD_STACKSIZE
+ *    End(+1): to the end of memory
+ */
+
+#define LM32_STACK_BASE    _ebss
+#define LM32_STACK_TOP     _ebss+CONFIG_IDLETHREAD_STACKSIZE
+#define LM32_HEAP_BASE     LM32_STACK_TOP
+
+/****************************************************************************
+ * Exception handlers - Must be 32 bytes long.
+ ****************************************************************************/
+
+	.section	.text, "ax", @progbits
+	.global		g_idle_topstack
+	.global		__start
+
+__start:
+_reset_handler:
+	xor		r0, r0, r0
+	wcsr	IE, r0
+	mvhi	r1, hi(_reset_handler)
+	ori		r1, r1, lo(_reset_handler)
+	wcsr	EBA, r1
+	bi		_do_reset
+	nop
+	nop
+
+_breakpoint_handler:
+	bi		_breakpoint_handler
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+
+_instruction_bus_error_handler:
+	bi		_instruction_bus_error_handler
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+
+_watchpoint_hander:
+	bi		_watchpoint_hander
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+
+_data_bus_error_handler:
+	bi		_data_bus_error_handler
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+
+_divide_by_zero_handler:
+	bi		_divide_by_zero_handler
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+
+_interrupt_handler:
+	sw		(sp+0), ra
+	calli	.save_all
+	rcsr	r1, IP
+	calli	lm32_decodeirq
+	bi		.restore_all_and_eret
+	nop
+	nop
+	nop
+
+_syscall_handler:
+	sw		(sp+0), ra
+	addi	ea, ea, 4
+	calli	.save_all
+	mvi		r1, LM32_IRQ_SWINT
+	calli	lm32_doirq
+	bi		.restore_all_and_eret
+	nop
+	nop
+
+_do_reset:
+	/* Setup stack and global pointer */
+
+	mvhi	sp, hi(LM32_STACK_TOP)
+	ori		sp, sp, lo(LM32_STACK_TOP)
+
+	/* Clear BSS */
+
+	mvhi	r1, hi(_sbss)
+	ori		r1, r1, lo(_sbss)
+	mvhi	r3, hi(_ebss)
+	ori		r3, r3, lo(_ebss)
+
+.clearBSS:
+	be		r1, r3, .callMain
+	sw		(r1+0), r0
+	addi	r1, r1, 4
+	bi		.clearBSS
+
+.callMain:
+	bi		os_start
+
+.save_all:
+	addi	sp, sp, -136
+	sw		(sp+REG_X0), r0
+	sw		(sp+REG_X1), r1
+	sw		(sp+REG_X2), r2
+	sw		(sp+REG_X3), r3
+	sw		(sp+REG_X4), r4
+	sw		(sp+REG_X5), r5
+	sw		(sp+REG_X6), r6
+	sw		(sp+REG_X7), r7
+	sw		(sp+REG_X8), r8
+	sw		(sp+REG_X9), r9
+	sw		(sp+REG_X10), r10
+	sw		(sp+REG_X11), r11
+	sw		(sp+REG_X12), r12
+	sw		(sp+REG_X13), r13
+	sw		(sp+REG_X14), r14
+	sw		(sp+REG_X15), r15
+	sw		(sp+REG_X16), r16
+	sw		(sp+REG_X17), r17
+	sw		(sp+REG_X18), r18
+	sw		(sp+REG_X19), r19
+	sw		(sp+REG_X20), r20
+	sw		(sp+REG_X21), r21
+	sw		(sp+REG_X22), r22
+	sw		(sp+REG_X23), r23
+	sw		(sp+REG_X24), r24
+	sw		(sp+REG_X25), r25
+	sw		(sp+REG_GP), r26
+	sw		(sp+REG_FP), r27
+
+	/* Save SP before we add 136 */
+
+	addi	r1, sp, 136
+	sw		(sp+REG_SP), r1
+
+	/* Reg RA done later */
+
+	sw		(sp+REG_EA), r30
+	sw		(sp+REG_BA), r31
+
+	/* ra needs to be moved from initial stack location */
+
+	lw		r1, (sp+ 136)
+	sw		(sp+REG_RA), r1
+
+	/* Get IE/REG_INT_CTX */
+
+	rcsr	r1, IE
+	sw		(sp+REG_INT_CTX), r1
+
+	/* The 2nd argument is the regs pointer */
+
+	addi	r2, sp, 0
+
+	/* Move sp away from X0 */
+
+	addi	sp, sp, -4
+	ret
+
+.restore_all_and_eret:
+	/* r1 should have the place where we restore ! */
+
+	lw		r3, (r1+REG_X3)
+	lw		r4, (r1+REG_X4)
+	lw		r5, (r1+REG_X5)
+	lw		r6, (r1+REG_X6)
+	lw		r7, (r1+REG_X7)
+	lw		r8, (r1+REG_X8)
+	lw		r9, (r1+REG_X9)
+	lw		r10, (r1+REG_X10)
+	lw		r11, (r1+REG_X11)
+	lw		r12, (r1+REG_X12)
+	lw		r13, (r1+REG_X13)
+	lw		r14, (r1+REG_X14)
+	lw		r15, (r1+REG_X15)
+	lw		r16, (r1+REG_X16)
+	lw		r17, (r1+REG_X17)
+	lw		r18, (r1+REG_X18)
+	lw		r19, (r1+REG_X19)
+	lw		r20, (r1+REG_X20)
+	lw		r21, (r1+REG_X21)
+	lw		r22, (r1+REG_X22)
+	lw		r23, (r1+REG_X23)
+	lw		r24, (r1+REG_X24)
+	lw		r25, (r1+REG_X25)
+	lw		r26, (r1+REG_GP)
+	lw		r27, (r1+REG_FP)
+	lw		r28, (r1+REG_SP)
+	lw		r29, (r1+REG_RA)
+	lw		r30, (r1+REG_EA)
+	lw		r31, (r1+REG_BA)
+	lw		r2, (r1+REG_INT_CTX)
+	wcsr	IE, r2
+	lw		r2, (r1+REG_X2)
+	lw		r1, (r1+REG_X1)
+
+	eret
+
+	/* This global variable is unsigned long g_idle_topstack and is
+	 * exported from here only because of its coupling to other
+	 * uses of _ebss in this file
+	 */
+
+	.data
+	.align	4
+	.type	g_idle_topstack, object
+
+g_idle_topstack:
+	.long	LM32_STACK_TOP
+	.size	g_idle_topstack, .-g_idle_topstack
+	.end
diff --git a/arch/sh/Kconfig b/arch/renesas/Kconfig
similarity index 75%
rename from arch/sh/Kconfig
rename to arch/renesas/Kconfig
index 48c76f3ca03da56f1578e092eb746f00b19ef35d..c8818030d790c860ebe745f269d9dc5e558d45e6 100644
--- a/arch/sh/Kconfig
+++ b/arch/renesas/Kconfig
@@ -3,10 +3,10 @@
 # see the file kconfig-language.txt in the NuttX tools repository.
 #
 
-if ARCH_SH
+if ARCH_RENESAS
 
 choice
-	prompt "SH chip selection"
+	prompt "Renesas chip selection"
 	default ARCH_CHIP_SH7032
 
 config ARCH_CHIP_SH7032
@@ -37,8 +37,8 @@ config ARCH_CHIP
 	default "sh1"		if ARCH_SH1
 	default "m16c"		if ARCH_M16C
 
-source arch/sh/src/common/Kconfig
-source arch/sh/src/m16c/Kconfig
-source arch/sh/src/sh1/Kconfig
+source arch/renesas/src/common/Kconfig
+source arch/renesas/src/m16c/Kconfig
+source arch/renesas/src/sh1/Kconfig
 
-endif # ARCH_SH
+endif # ARCH_RENESAS
diff --git a/arch/sh/include/README.txt b/arch/renesas/include/README.txt
similarity index 100%
rename from arch/sh/include/README.txt
rename to arch/renesas/include/README.txt
diff --git a/arch/sh/include/arch.h b/arch/renesas/include/arch.h
similarity index 95%
rename from arch/sh/include/arch.h
rename to arch/renesas/include/arch.h
index 4b4c7e934d9e39d2b9a3775842d75d866fb4cd7b..a4824ce98419d97256486fd124d29e3acf506d7a 100644
--- a/arch/sh/include/arch.h
+++ b/arch/renesas/include/arch.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/include/arch.h
+ * arch/renesas/include/arch.h
  *
  *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -37,8 +37,8 @@
  * only indirectly through nuttx/arch.h
  */
 
-#ifndef __ARCH_SH_INCLUDE_ARCH_H
-#define __ARCH_SH_INCLUDE_ARCH_H
+#ifndef __ARCH_RENESAS_INCLUDE_ARCH_H
+#define __ARCH_RENESAS_INCLUDE_ARCH_H
 
 /****************************************************************************
  * Included Files
@@ -77,4 +77,4 @@ extern "C"
 }
 #endif
 
-#endif /* __ARCH_SH_INCLUDE_ARCH_H */
+#endif /* __ARCH_RENESAS_INCLUDE_ARCH_H */
diff --git a/arch/renesas/include/inttypes.h b/arch/renesas/include/inttypes.h
new file mode 100644
index 0000000000000000000000000000000000000000..241a7dafe6e602553200ee10e0566c31b0538abb
--- /dev/null
+++ b/arch/renesas/include/inttypes.h
@@ -0,0 +1,49 @@
+/****************************************************************************
+ * arch/renesas/include/inttypes.h
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RENESAS_INCLUDE_INTTYPES_H
+#define __ARCH_RENESAS_INCLUDE_INTTYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#endif /* __ARCH_RENESAS_INCLUDE_INTTYPES_H */
diff --git a/arch/sh/include/irq.h b/arch/renesas/include/irq.h
similarity index 95%
rename from arch/sh/include/irq.h
rename to arch/renesas/include/irq.h
index 78617accce61722ad5a92ffdb8f4c898beb59ba6..4f365ceaa842ddb4a14156bb8f69e529c2e796c5 100644
--- a/arch/sh/include/irq.h
+++ b/arch/renesas/include/irq.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/include/irq.h
+ * arch/renesas/include/irq.h
  *
  *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -37,8 +37,8 @@
  * only indirectly through nuttx/irq.h
  */
 
-#ifndef __ARCH_SH_INCLUDE_IRQ_H
-#define __ARCH_SH_INCLUDE_IRQ_H
+#ifndef __ARCH_RENESAS_INCLUDE_IRQ_H
+#define __ARCH_RENESAS_INCLUDE_IRQ_H
 
 /****************************************************************************
  * Included Files
@@ -82,5 +82,5 @@ extern "C"
 #endif
 #endif
 
-#endif /* __ARCH_SH_INCLUDE_IRQ_H */
+#endif /* __ARCH_RENESAS_INCLUDE_IRQ_H */
 
diff --git a/arch/sh/include/limits.h b/arch/renesas/include/limits.h
similarity index 93%
rename from arch/sh/include/limits.h
rename to arch/renesas/include/limits.h
index feb02e5d6f38f9a7cfc9bcd2ee07b5827577ea94..56c729c0c7478741b53a3eb383b076bc9fe937a0 100644
--- a/arch/sh/include/limits.h
+++ b/arch/renesas/include/limits.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/include/limits.h
+ * arch/renesas/include/limits.h
  *
  *   Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __ARCH_SH_INCLUDE_LIMITS_H
-#define __ARCH_SH_INCLUDE_LIMITS_H
+#ifndef __ARCH_RENESAS_INCLUDE_LIMITS_H
+#define __ARCH_RENESAS_INCLUDE_LIMITS_H
 
 /****************************************************************************
  * Included Files
@@ -46,4 +46,4 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-#endif /* __ARCH_SH_INCLUDE_LIMITS_H */
+#endif /* __ARCH_RENESAS_INCLUDE_LIMITS_H */
diff --git a/arch/renesas/include/m16c/inttypes.h b/arch/renesas/include/m16c/inttypes.h
new file mode 100644
index 0000000000000000000000000000000000000000..9850184734917fcdbbff1c2e16bd111ea268d90b
--- /dev/null
+++ b/arch/renesas/include/m16c/inttypes.h
@@ -0,0 +1,245 @@
+/****************************************************************************
+ * arch/renesas/include/m16c/inttypes.h
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_AVR_INCLUDE_M16C_INTTYPES_H
+#define __ARCH_AVR_INCLUDE_M16C_INTTYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define PRId8       "d"
+#define PRId16      "d"
+#define PRId32      "ld"
+#define PRId64      "lld"
+
+#define PRIdLEAST8  "d"
+#define PRIdLEAST16 "d"
+#define PRIdLEAST32 "ld"
+#define PRIdLEAST64 "lld"
+
+#define PRIdFAST8   "d"
+#define PRIdFAST16  "d"
+#define PRIdFAST32  "ld"
+#define PRIdFAST64  "lld"
+
+#define PRIdMAX     "lld"
+#define PRIdPTR     "d"
+
+#define PRIi8       "i"
+#define PRIi16      "i"
+#define PRIi32      "li"
+#define PRIi64      "lli"
+
+#define PRIiLEAST8  "i"
+#define PRIiLEAST16 "i"
+#define PRIiLEAST32 "li"
+#define PRIiLEAST64 "lli"
+
+#define PRIiFAST8   "i"
+#define PRIiFAST16  "i"
+#define PRIiFAST32  "li"
+#define PRIiFAST64  "lli"
+
+#define PRIiMAX     "lli"
+#define PRIiPTR     "i"
+
+#define PRIo8       "o"
+#define PRIo16      "o"
+#define PRIo32      "lo"
+#define PRIo64      "llo"
+
+#define PRIoLEAST8  "o"
+#define PRIoLEAST16 "o"
+#define PRIoLEAST32 "lo"
+#define PRIoLEAST64 "llo"
+
+#define PRIoFAST8   "o"
+#define PRIoFAST16  "o"
+#define PRIoFAST32  "lo"
+#define PRIoFAST64  "llo"
+
+#define PRIoMAX     "llo"
+#define PRIoPTR     "o"
+
+#define PRIu8       "u"
+#define PRIu16      "u"
+#define PRIu32      "lu"
+#define PRIu64      "llu"
+
+#define PRIuLEAST8  "u"
+#define PRIuLEAST16 "u"
+#define PRIuLEAST32 "lu"
+#define PRIuLEAST64 "llu"
+
+#define PRIuFAST8   "u"
+#define PRIuFAST16  "u"
+#define PRIuFAST32  "lu"
+#define PRIuFAST64  "llu"
+
+#define PRIuMAX     "llu"
+#define PRIuPTR     "u"
+
+#define PRIx8       "x"
+#define PRIx16      "x"
+#define PRIx32      "lx"
+#define PRIx64      "llx"
+
+#define PRIxLEAST8  "x"
+#define PRIxLEAST16 "x"
+#define PRIxLEAST32 "lx"
+#define PRIxLEAST64 "llx"
+
+#define PRIxFAST8   "x"
+#define PRIxFAST16  "x"
+#define PRIxFAST32  "lx"
+#define PRIxFAST64  "llx"
+
+#define PRIxMAX     "llx"
+#define PRIxPTR     "x"
+
+#define PRIX8       "X"
+#define PRIX16      "X"
+#define PRIX32      "lX"
+#define PRIX64      "llX"
+
+#define PRIXLEAST8  "X"
+#define PRIXLEAST16 "X"
+#define PRIXLEAST32 "lX"
+#define PRIXLEAST64 "llX"
+
+#define PRIXFAST8   "X"
+#define PRIXFAST16  "X"
+#define PRIXFAST32  "lX"
+#define PRIXFAST64  "llX"
+
+#define PRIXMAX     "llX"
+#define PRIXPTR     "X"
+
+#define SCNd8       "hhd"
+#define SCNd16      "d"
+#define SCNd32      "ld"
+#define SCNd64      "lld"
+
+#define SCNdLEAST8  "hhd"
+#define SCNdLEAST16 "d"
+#define SCNdLEAST32 "ld"
+#define SCNdLEAST64 "lld"
+
+#define SCNdFAST8   "hhd"
+#define SCNdFAST16  "d"
+#define SCNdFAST32  "ld"
+#define SCNdFAST64  "lld"
+
+#define SCNdMAX     "lld"
+#define SCNdPTR     "d"
+
+#define SCNi8       "hhi"
+#define SCNi16      "i"
+#define SCNi32      "li"
+#define SCNi64      "lli"
+
+#define SCNiLEAST8  "hhi"
+#define SCNiLEAST16 "i"
+#define SCNiLEAST32 "li"
+#define SCNiLEAST64 "lli"
+
+#define SCNiFAST8   "hhi"
+#define SCNiFAST16  "i"
+#define SCNiFAST32  "li"
+#define SCNiFAST64  "lli"
+
+#define SCNiMAX     "lli"
+#define SCNiPTR     "i"
+
+#define SCNo8       "hho"
+#define SCNo16      "o"
+#define SCNo32      "lo"
+#define SCNo64      "llo"
+
+#define SCNoLEAST8  "hho"
+#define SCNoLEAST16 "o"
+#define SCNoLEAST32 "lo"
+#define SCNoLEAST64 "llo"
+
+#define SCNoFAST8   "hho"
+#define SCNoFAST16  "o"
+#define SCNoFAST32  "lo"
+#define SCNoFAST64  "llo"
+
+#define SCNoMAX     "llo"
+#define SCNoPTR     "o"
+
+#define SCNu8       "hhu"
+#define SCNu16      "u"
+#define SCNu32      "lu"
+#define SCNu64      "llu"
+
+#define SCNuLEAST8  "hhu"
+#define SCNuLEAST16 "u"
+#define SCNuLEAST32 "lu"
+#define SCNuLEAST64 "llu"
+
+#define SCNuFAST8   "hhu"
+#define SCNuFAST16  "u"
+#define SCNuFAST32  "lu"
+#define SCNuFAST64  "llu"
+
+#define SCNuMAX     "llu"
+#define SCNuPTR     "u"
+
+#define SCNx8       "hhx"
+#define SCNx16      "x"
+#define SCNx32      "lx"
+#define SCNx64      "llx"
+
+#define SCNxLEAST8  "hhx"
+#define SCNxLEAST16 "x"
+#define SCNxLEAST32 "lx"
+#define SCNxLEAST64 "llx"
+
+#define SCNxFAST8   "hhx"
+#define SCNxFAST16  "x"
+#define SCNxFAST32  "lx"
+#define SCNxFAST64  "llx"
+
+#define SCNxMAX     "llx"
+#define SCNxPTR     "x"
+
+#endif /* __ARCH_AVR_INCLUDE_M16C_INTTYPES_H */
diff --git a/arch/sh/include/m16c/irq.h b/arch/renesas/include/m16c/irq.h
similarity index 98%
rename from arch/sh/include/m16c/irq.h
rename to arch/renesas/include/m16c/irq.h
index 2528e911eb73700f704d880b4cdb070335cab71e..0d000f975f8d767db4b94a89b030baf9ae92e767 100644
--- a/arch/sh/include/m16c/irq.h
+++ b/arch/renesas/include/m16c/irq.h
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/sh/include/m16c/irq.h
+ * arch/renesas/include/m16c/irq.h
  *
  *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -37,8 +37,8 @@
  * only indirectly through nuttx/irq.h
  */
 
-#ifndef __ARCH_SH_INCLUDE_M16C_IRQ_H
-#define __ARCH_SH_INCLUDE_M16C_IRQ_H
+#ifndef __ARCH_RENESAS_INCLUDE_M16C_IRQ_H
+#define __ARCH_RENESAS_INCLUDE_M16C_IRQ_H
 
 /************************************************************************************
  * Included Files
@@ -328,5 +328,5 @@ static inline void up_irq_restore(irqstate_t flags)
 #endif
 #endif
 
-#endif /* __ARCH_SH_INCLUDE_M16C_IRQ_H */
+#endif /* __ARCH_RENESAS_INCLUDE_M16C_IRQ_H */
 
diff --git a/arch/sh/include/m16c/limits.h b/arch/renesas/include/m16c/limits.h
similarity index 94%
rename from arch/sh/include/m16c/limits.h
rename to arch/renesas/include/m16c/limits.h
index 27723d99686748d6b2ce97b7d8389818df5c084f..26cb2726f3674be117a6900a01aa6a013917d45a 100644
--- a/arch/sh/include/m16c/limits.h
+++ b/arch/renesas/include/m16c/limits.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/include/m16c/limits.h
+ * arch/renesas/include/m16c/limits.h
  *
  *   Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __ARCH_SH_INCLUDE_M16C_LIMITS_H
-#define __ARCH_SH_INCLUDE_M16C_LIMITS_H
+#ifndef __ARCH_RENESAS_INCLUDE_M16C_LIMITS_H
+#define __ARCH_RENESAS_INCLUDE_M16C_LIMITS_H
 
 /****************************************************************************
  * Included Files
@@ -85,4 +85,4 @@
 #define PTR_MAX     32767
 #define UPTR_MAX    65535U
 
-#endif /* __ARCH_SH_INCLUDE_M16C_LIMITS_H */
+#endif /* __ARCH_RENESAS_INCLUDE_M16C_LIMITS_H */
diff --git a/arch/sh/include/m16c/types.h b/arch/renesas/include/m16c/types.h
similarity index 95%
rename from arch/sh/include/m16c/types.h
rename to arch/renesas/include/m16c/types.h
index 3211209e93f20e15630605ea9a856d015a1e0c9c..8eb3528833776dbbdf0329128120933270eddc19 100644
--- a/arch/sh/include/m16c/types.h
+++ b/arch/renesas/include/m16c/types.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/include/m16c/types.h
+ * arch/renesas/include/m16c/types.h
  *
  *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -37,8 +37,8 @@
  * through sys/types.h
  */
 
-#ifndef __ARCH_SH_INCLUDE_M16C_TYPES_H
-#define __ARCH_SH_INCLUDE_M16C_TYPES_H
+#ifndef __ARCH_RENESAS_INCLUDE_M16C_TYPES_H
+#define __ARCH_RENESAS_INCLUDE_M16C_TYPES_H
 
 /****************************************************************************
  * Included Files
@@ -95,4 +95,4 @@ typedef _uint16_t          irqstate_t;
  * Public Function Prototypes
  ****************************************************************************/
 
-#endif /* __ARCH_SH_INCLUDE_M16C_TYPES_H */
+#endif /* __ARCH_RENESAS_INCLUDE_M16C_TYPES_H */
diff --git a/arch/sh/include/serial.h b/arch/renesas/include/serial.h
similarity index 94%
rename from arch/sh/include/serial.h
rename to arch/renesas/include/serial.h
index 2ec4ac9054a47ad0918eb69951ea00280da4eec3..224e769c1e0745d2e9d2164cb986dd1e2aff33eb 100644
--- a/arch/sh/include/serial.h
+++ b/arch/renesas/include/serial.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/include/serial.h
+ * arch/renesas/include/serial.h
  *
  *   Copyright (C) 2008, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __ARCH_SH_INCLUDE_SERIAL_H
-#define __ARCH_SH_INCLUDE_SERIAL_H
+#ifndef __ARCH_RENESAS_INCLUDE_SERIAL_H
+#define __ARCH_RENESAS_INCLUDE_SERIAL_H
 
 /****************************************************************************
  * Included Files
@@ -54,4 +54,4 @@
  * Public Functions
  ****************************************************************************/
 
-#endif /* __ARCH_SH_INCLUDE_SERIAL_H */
+#endif /* __ARCH_RENESAS_INCLUDE_SERIAL_H */
diff --git a/arch/renesas/include/sh1/inttypes.h b/arch/renesas/include/sh1/inttypes.h
new file mode 100644
index 0000000000000000000000000000000000000000..e2ceee2e5b4a803eb475e9d869b8ec1436105775
--- /dev/null
+++ b/arch/renesas/include/sh1/inttypes.h
@@ -0,0 +1,245 @@
+/****************************************************************************
+ * arch/renesas/include/sh1/inttypes.h
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_AVR_INCLUDE_SH1_INTTYPES_H
+#define __ARCH_AVR_INCLUDE_SH1_INTTYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define PRId8       "d"
+#define PRId16      "d"
+#define PRId32      "d"
+#define PRId64      "lld"
+
+#define PRIdLEAST8  "d"
+#define PRIdLEAST16 "d"
+#define PRIdLEAST32 "d"
+#define PRIdLEAST64 "lld"
+
+#define PRIdFAST8   "d"
+#define PRIdFAST16  "d"
+#define PRIdFAST32  "d"
+#define PRIdFAST64  "lld"
+
+#define PRIdMAX     "lld"
+#define PRIdPTR     "d"
+
+#define PRIi8       "i"
+#define PRIi16      "i"
+#define PRIi32      "i"
+#define PRIi64      "lli"
+
+#define PRIiLEAST8  "i"
+#define PRIiLEAST16 "i"
+#define PRIiLEAST32 "i"
+#define PRIiLEAST64 "lli"
+
+#define PRIiFAST8   "i"
+#define PRIiFAST16  "i"
+#define PRIiFAST32  "i"
+#define PRIiFAST64  "lli"
+
+#define PRIiMAX     "lli"
+#define PRIiPTR     "i"
+
+#define PRIo8       "o"
+#define PRIo16      "o"
+#define PRIo32      "o"
+#define PRIo64      "llo"
+
+#define PRIoLEAST8  "o"
+#define PRIoLEAST16 "o"
+#define PRIoLEAST32 "o"
+#define PRIoLEAST64 "llo"
+
+#define PRIoFAST8   "o"
+#define PRIoFAST16  "o"
+#define PRIoFAST32  "o"
+#define PRIoFAST64  "llo"
+
+#define PRIoMAX     "llo"
+#define PRIoPTR     "o"
+
+#define PRIu8       "u"
+#define PRIu16      "u"
+#define PRIu32      "u"
+#define PRIu64      "llu"
+
+#define PRIuLEAST8  "u"
+#define PRIuLEAST16 "u"
+#define PRIuLEAST32 "u"
+#define PRIuLEAST64 "llu"
+
+#define PRIuFAST8   "u"
+#define PRIuFAST16  "u"
+#define PRIuFAST32  "u"
+#define PRIuFAST64  "llu"
+
+#define PRIuMAX     "llu"
+#define PRIuPTR     "u"
+
+#define PRIx8       "x"
+#define PRIx16      "x"
+#define PRIx32      "x"
+#define PRIx64      "llx"
+
+#define PRIxLEAST8  "x"
+#define PRIxLEAST16 "x"
+#define PRIxLEAST32 "x"
+#define PRIxLEAST64 "llx"
+
+#define PRIxFAST8   "x"
+#define PRIxFAST16  "x"
+#define PRIxFAST32  "x"
+#define PRIxFAST64  "llx"
+
+#define PRIxMAX     "llx"
+#define PRIxPTR     "x"
+
+#define PRIX8       "X"
+#define PRIX16      "X"
+#define PRIX32      "X"
+#define PRIX64      "llX"
+
+#define PRIXLEAST8  "X"
+#define PRIXLEAST16 "X"
+#define PRIXLEAST32 "X"
+#define PRIXLEAST64 "llX"
+
+#define PRIXFAST8   "X"
+#define PRIXFAST16  "X"
+#define PRIXFAST32  "X"
+#define PRIXFAST64  "llX"
+
+#define PRIXMAX     "llX"
+#define PRIXPTR     "X"
+
+#define SCNd8       "hhd"
+#define SCNd16      "hd"
+#define SCNd32      "d"
+#define SCNd64      "lld"
+
+#define SCNdLEAST8  "hhd"
+#define SCNdLEAST16 "hd"
+#define SCNdLEAST32 "d"
+#define SCNdLEAST64 "lld"
+
+#define SCNdFAST8   "hhd"
+#define SCNdFAST16  "hd"
+#define SCNdFAST32  "d"
+#define SCNdFAST64  "lld"
+
+#define SCNdMAX     "lld"
+#define SCNdPTR     "d"
+
+#define SCNi8       "hhi"
+#define SCNi16      "hi"
+#define SCNi32      "i"
+#define SCNi64      "lli"
+
+#define SCNiLEAST8  "hhi"
+#define SCNiLEAST16 "hi"
+#define SCNiLEAST32 "i"
+#define SCNiLEAST64 "lli"
+
+#define SCNiFAST8   "hhi"
+#define SCNiFAST16  "hi"
+#define SCNiFAST32  "i"
+#define SCNiFAST64  "lli"
+
+#define SCNiMAX     "lli"
+#define SCNiPTR     "i"
+
+#define SCNo8       "hho"
+#define SCNo16      "ho"
+#define SCNo32      "o"
+#define SCNo64      "llo"
+
+#define SCNoLEAST8  "hho"
+#define SCNoLEAST16 "ho"
+#define SCNoLEAST32 "o"
+#define SCNoLEAST64 "llo"
+
+#define SCNoFAST8   "hho"
+#define SCNoFAST16  "ho"
+#define SCNoFAST32  "o"
+#define SCNoFAST64  "llo"
+
+#define SCNoMAX     "llo"
+#define SCNoPTR     "o"
+
+#define SCNu8       "hhu"
+#define SCNu16      "hu"
+#define SCNu32      "u"
+#define SCNu64      "llu"
+
+#define SCNuLEAST8  "hhu"
+#define SCNuLEAST16 "hu"
+#define SCNuLEAST32 "u"
+#define SCNuLEAST64 "llu"
+
+#define SCNuFAST8   "hhu"
+#define SCNuFAST16  "hu"
+#define SCNuFAST32  "u"
+#define SCNuFAST64  "llu"
+
+#define SCNuMAX     "llu"
+#define SCNuPTR     "u"
+
+#define SCNx8       "hhx"
+#define SCNx16      "hx"
+#define SCNx32      "x"
+#define SCNx64      "llx"
+
+#define SCNxLEAST8  "hhx"
+#define SCNxLEAST16 "hx"
+#define SCNxLEAST32 "x"
+#define SCNxLEAST64 "llx"
+
+#define SCNxFAST8   "hhx"
+#define SCNxFAST16  "hx"
+#define SCNxFAST32  "x"
+#define SCNxFAST64  "llx"
+
+#define SCNxMAX     "llx"
+#define SCNxPTR     "x"
+
+#endif /* __ARCH_AVR_INCLUDE_SH1_INTTYPES_H */
diff --git a/arch/sh/include/sh1/irq.h b/arch/renesas/include/sh1/irq.h
similarity index 99%
rename from arch/sh/include/sh1/irq.h
rename to arch/renesas/include/sh1/irq.h
index b4af921bdbbf280d66211ea7f9dc67e58d6f084d..9c82e0b39e0ce88dd8153ed1c221a757fe7e86eb 100644
--- a/arch/sh/include/sh1/irq.h
+++ b/arch/renesas/include/sh1/irq.h
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/sh/include/sh1/irq.h
+ * arch/renesas/include/sh1/irq.h
  *
  *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -37,8 +37,8 @@
  * only indirectly through nuttx/irq.h
  */
 
-#ifndef __ARCH_SH_INCLUDE_SH1_IRQ_H
-#define __ARCH_SH_INCLUDE_SH1_IRQ_H
+#ifndef __ARCH_RENESAS_INCLUDE_SH1_IRQ_H
+#define __ARCH_RENESAS_INCLUDE_SH1_IRQ_H
 
 /************************************************************************************
  * Included Files
@@ -563,5 +563,5 @@ static inline void up_irq_restore(irqstate_t flags)
 #endif
 #endif
 
-#endif /* __ARCH_SH_INCLUDE_SH1_IRQ_H */
+#endif /* __ARCH_RENESAS_INCLUDE_SH1_IRQ_H */
 
diff --git a/arch/sh/include/sh1/limits.h b/arch/renesas/include/sh1/limits.h
similarity index 94%
rename from arch/sh/include/sh1/limits.h
rename to arch/renesas/include/sh1/limits.h
index 071189c4ec1afdf1a77634b6f221620a80be9cec..661ed6bd1ee0507f9e87b89ab275a9512c8a6429 100644
--- a/arch/sh/include/sh1/limits.h
+++ b/arch/renesas/include/sh1/limits.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/include/sh1/limits.h
+ * arch/renesas/include/sh1/limits.h
  *
  *   Copyright (C) 2008, 2009, 2012 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __ARCH_SH_INCLUDE_SH1_LIMITS_H
-#define __ARCH_SH_INCLUDE_SH1_LIMITS_H
+#ifndef __ARCH_RENESAS_INCLUDE_SH1_LIMITS_H
+#define __ARCH_RENESAS_INCLUDE_SH1_LIMITS_H
 
 /****************************************************************************
  * Included Files
@@ -85,4 +85,4 @@
 #define PTR_MAX     2147483647
 #define UPTR_MAX    4294967295U
 
-#endif /* __ARCH_SH_INCLUDE_SH1_LIMITS_H */
+#endif /* __ARCH_RENESAS_INCLUDE_SH1_LIMITS_H */
diff --git a/arch/sh/include/sh1/types.h b/arch/renesas/include/sh1/types.h
similarity index 95%
rename from arch/sh/include/sh1/types.h
rename to arch/renesas/include/sh1/types.h
index aeafe71c3d6cc4eb08971ba29bc3ff8c1e6a152c..86d7b5b9bb39aba7c41566ebebab269c190566ba 100644
--- a/arch/sh/include/sh1/types.h
+++ b/arch/renesas/include/sh1/types.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/include/sh1/types.h
+ * arch/renesas/include/sh1/types.h
  *
  *   Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -37,8 +37,8 @@
  * through sys/types.h
  */
 
-#ifndef __ARCH_SH_INCLUDE_SH1_TYPES_H
-#define __ARCH_SH_INCLUDE_SH1_TYPES_H
+#ifndef __ARCH_RENESAS_INCLUDE_SH1_TYPES_H
+#define __ARCH_RENESAS_INCLUDE_SH1_TYPES_H
 
 /****************************************************************************
  * Included Files
@@ -93,4 +93,4 @@ typedef unsigned long      irqstate_t;
  * Public Function Prototypes
  ****************************************************************************/
 
-#endif /* __ARCH_SH_INCLUDE_SH1_TYPES_H */
+#endif /* __ARCH_RENESAS_INCLUDE_SH1_TYPES_H */
diff --git a/arch/renesas/include/sh1Plimits.h b/arch/renesas/include/sh1Plimits.h
new file mode 100644
index 0000000000000000000000000000000000000000..661ed6bd1ee0507f9e87b89ab275a9512c8a6429
--- /dev/null
+++ b/arch/renesas/include/sh1Plimits.h
@@ -0,0 +1,88 @@
+/****************************************************************************
+ * arch/renesas/include/sh1/limits.h
+ *
+ *   Copyright (C) 2008, 2009, 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RENESAS_INCLUDE_SH1_LIMITS_H
+#define __ARCH_RENESAS_INCLUDE_SH1_LIMITS_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define CHAR_BIT    8
+#define SCHAR_MIN   (-SCHAR_MAX - 1)
+#define SCHAR_MAX   127
+#define UCHAR_MAX   255
+
+/* These could be different on machines where char is unsigned */
+
+#ifdef __CHAR_UNSIGNED__
+#define CHAR_MIN    0
+#define CHAR_MAX    UCHAR_MAX
+#else
+#define CHAR_MIN    SCHAR_MIN
+#define CHAR_MAX    SCHAR_MAX
+#endif
+
+#define SHRT_MIN    (-SHRT_MAX - 1)
+#define SHRT_MAX    32767
+#define USHRT_MAX   65535U
+
+/* On SH-1, type 'int' is 32-bits */
+
+#define INT_MIN     (-INT_MAX - 1)
+#define INT_MAX     2147483647
+#define UINT_MAX    4294967295U
+
+/* On SH-1, type 'long' is the same size as type 'int', 32-bits */
+
+#define LONG_MIN    (-LONG_MAX - 1)
+#define LONG_MAX    2147483647L
+#define ULONG_MAX   4294967295UL
+
+#define LLONG_MIN   (-LLONG_MAX - 1)
+#define LLONG_MAX   9223372036854775807LL
+#define ULLONG_MAX  18446744073709551615ULL
+
+/* A pointer is 4 bytes */
+
+#define PTR_MIN     (-PTR_MAX - 1)
+#define PTR_MAX     2147483647
+#define UPTR_MAX    4294967295U
+
+#endif /* __ARCH_RENESAS_INCLUDE_SH1_LIMITS_H */
diff --git a/arch/rgmp/include/types.h b/arch/renesas/include/sh1Ptypes.h
similarity index 83%
rename from arch/rgmp/include/types.h
rename to arch/renesas/include/sh1Ptypes.h
index 1f515cb70c6ae4be41f911ed7f439f36cb5f96de..86d7b5b9bb39aba7c41566ebebab269c190566ba 100644
--- a/arch/rgmp/include/types.h
+++ b/arch/renesas/include/sh1Ptypes.h
@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/rgmp/include/types.h
+ * arch/renesas/include/sh1/types.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -14,7 +14,7 @@
  *    notice, this list of conditions and the following disclaimer in
  *    the documentation and/or other materials provided with the
  *    distribution.
- * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ * 3. Neither the name NuttX nor the names of its contributors may be
  *    used to endorse or promote products derived from this software
  *    without specific prior written permission.
  *
@@ -33,12 +33,12 @@
  *
  ****************************************************************************/
 
-/* This file should never be included directed but, rather,
- * only indirectly through sys/types.h
+/* This file should never be included directed but, rather, only indirectly\
+ * through sys/types.h
  */
 
-#ifndef __ARCH_RGMP_INCLUDE_TYPES_H
-#define __ARCH_RGMP_INCLUDE_TYPES_H
+#ifndef __ARCH_RENESAS_INCLUDE_SH1_TYPES_H
+#define __ARCH_RENESAS_INCLUDE_SH1_TYPES_H
 
 /****************************************************************************
  * Included Files
@@ -63,29 +63,29 @@
  * files
  */
 
-typedef char               _int8_t;
+typedef signed char        _int8_t;
 typedef unsigned char      _uint8_t;
 
-typedef short              _int16_t;
+typedef signed short       _int16_t;
 typedef unsigned short     _uint16_t;
 
-typedef int                _int32_t;
+typedef signed int         _int32_t;
 typedef unsigned int       _uint32_t;
 
-typedef long long          _int64_t;
+typedef signed long long   _int64_t;
 typedef unsigned long long _uint64_t;
 #define __INT64_DEFINED
 
 /* A pointer is 4 bytes */
 
-typedef unsigned int       _intptr_t;
+typedef signed int         _intptr_t;
 typedef unsigned int       _uintptr_t;
 
 /* This is the size of the interrupt state save returned by
  * up_irq_save()
  */
 
-typedef unsigned int       irqstate_t;
+typedef unsigned long      irqstate_t;
 
 #endif /* __ASSEMBLY__ */
 
@@ -93,4 +93,4 @@ typedef unsigned int       irqstate_t;
  * Public Function Prototypes
  ****************************************************************************/
 
-#endif /* __ARCH_RGMP_INCLUDE_TYPES_H */
+#endif /* __ARCH_RENESAS_INCLUDE_SH1_TYPES_H */
diff --git a/arch/sh/include/syscall.h b/arch/renesas/include/syscall.h
similarity index 95%
rename from arch/sh/include/syscall.h
rename to arch/renesas/include/syscall.h
index b26dffcd39ca1b7d3c3c0597b037a143146f8ac4..afe93f6976178504436fe14f9a4b1dd4517a0a2e 100644
--- a/arch/sh/include/syscall.h
+++ b/arch/renesas/include/syscall.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/include/syscall.h
+ * arch/renesas/include/syscall.h
  *
  *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -37,8 +37,8 @@
  * through include/syscall.h or include/sys/sycall.h
  */
 
-#ifndef __ARCH_SH_INCLUDE_SYSCALL_H
-#define __ARCH_SH_INCLUDE_SYSCALL_H
+#ifndef __ARCH_RENESAS_INCLUDE_SYSCALL_H
+#define __ARCH_RENESAS_INCLUDE_SYSCALL_H
 
 /****************************************************************************
  * Included Files
@@ -79,5 +79,5 @@ extern "C"
 #endif
 #endif
 
-#endif /* __ARCH_SH_INCLUDE_SYSCALL_H */
+#endif /* __ARCH_RENESAS_INCLUDE_SYSCALL_H */
 
diff --git a/arch/sh/include/types.h b/arch/renesas/include/types.h
similarity index 94%
rename from arch/sh/include/types.h
rename to arch/renesas/include/types.h
index db6c6178ad30cc9b66fb14381d45d4edba009a1c..aca5f94463569a07ec1e454feef503a27f81589f 100644
--- a/arch/sh/include/types.h
+++ b/arch/renesas/include/types.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/include/types.h
+ * arch/renesas/include/types.h
  *
  *   Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -37,8 +37,8 @@
  * through sys/types.h
  */
 
-#ifndef __ARCH_SH_INCLUDE_TYPES_H
-#define __ARCH_SH_INCLUDE_TYPES_H
+#ifndef __ARCH_RENESAS_INCLUDE_TYPES_H
+#define __ARCH_RENESAS_INCLUDE_TYPES_H
 
 /****************************************************************************
  * Included Files
@@ -58,4 +58,4 @@
  * Public Function Prototypes
  ****************************************************************************/
 
-#endif /* __ARCH_SH_INCLUDE_TYPES_H */
+#endif /* __ARCH_RENESAS_INCLUDE_TYPES_H */
diff --git a/arch/sh/include/watchdog.h b/arch/renesas/include/watchdog.h
similarity index 94%
rename from arch/sh/include/watchdog.h
rename to arch/renesas/include/watchdog.h
index 091729833cd5c55b7639dc0e3339f83283df08f7..002bc4205955c30d9d4bd90fdb27204d5ace7272 100644
--- a/arch/sh/include/watchdog.h
+++ b/arch/renesas/include/watchdog.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/include/watchdog.h
+ * arch/renesas/include/watchdog.h
  *
  *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __ARCH_SH_INCLUDE_WATCHDOG_H
-#define __ARCH_SH_INCLUDE_WATCHDOG_H
+#ifndef __ARCH_RENESAS_INCLUDE_WATCHDOG_H
+#define __ARCH_RENESAS_INCLUDE_WATCHDOG_H
 
 /****************************************************************************
  * Included Files
@@ -56,4 +56,4 @@
  * Public Functions
  ****************************************************************************/
 
-#endif /* __ARCH_SH_INCLUDE_WATCHDOG_H */
+#endif /* __ARCH_RENESAS_INCLUDE_WATCHDOG_H */
diff --git a/arch/sh/src/.gitignore b/arch/renesas/src/.gitignore
similarity index 100%
rename from arch/sh/src/.gitignore
rename to arch/renesas/src/.gitignore
diff --git a/arch/sh/src/Makefile b/arch/renesas/src/Makefile
similarity index 99%
rename from arch/sh/src/Makefile
rename to arch/renesas/src/Makefile
index 81e0b5b8c14567a82bd382fe9c4314cb84eeba1b..14e4bc23122b7bd1bfb07278cfd033d30640070d 100644
--- a/arch/sh/src/Makefile
+++ b/arch/renesas/src/Makefile
@@ -1,5 +1,5 @@
 ############################################################################
-# arch/sh/src/Makefile
+# arch/renesas/src/Makefile
 #
 #   Copyright (C) 2008, 2011-2012, 2014, 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
diff --git a/arch/renesas/src/README.txt b/arch/renesas/src/README.txt
new file mode 100644
index 0000000000000000000000000000000000000000..77c3cdeca8755b3562b33f9d37080d2dfc869b4b
--- /dev/null
+++ b/arch/renesas/src/README.txt
@@ -0,0 +1,7 @@
+This directory provides a build area for all Renesas and legacy Hitachi
+architectures.  The 'common' subdirectory contains source files shared by
+all Renesas architectures; Source files unique to a specific Renesas chip
+architecture are contained in a subdirectory named after the chip.  At
+configuration time, additional directories will be linked here:  'board'
+will be a link to the configs/*/src directory; 'chip' will be a link to
+the SH chip sub-directory.
diff --git a/arch/sh/src/common/Kconfig b/arch/renesas/src/common/Kconfig
similarity index 89%
rename from arch/sh/src/common/Kconfig
rename to arch/renesas/src/common/Kconfig
index f6c044427debf10bca58f8bfa665ec29b9b44b2d..cb8747aca763913cb0613ec5856f2bcc821bba88 100644
--- a/arch/sh/src/common/Kconfig
+++ b/arch/renesas/src/common/Kconfig
@@ -3,5 +3,5 @@
 # see the file kconfig-language.txt in the NuttX tools repository.
 #
 
-if ARCH_SH
+if ARCH_RENESAS
 endif
diff --git a/arch/sh/src/common/up_allocateheap.c b/arch/renesas/src/common/up_allocateheap.c
similarity index 98%
rename from arch/sh/src/common/up_allocateheap.c
rename to arch/renesas/src/common/up_allocateheap.c
index ddf287983a19badb829b1994dc7c4542daf91abc..4148407fb79bad5675eb279790160ea6498934e8 100644
--- a/arch/sh/src/common/up_allocateheap.c
+++ b/arch/renesas/src/common/up_allocateheap.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/common/up_allocateheap.c
+ * arch/renesas/src/common/up_allocateheap.c
  *
  *   Copyright (C) 2008, 2013, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sh/src/common/up_arch.h b/arch/renesas/src/common/up_arch.h
similarity index 94%
rename from arch/sh/src/common/up_arch.h
rename to arch/renesas/src/common/up_arch.h
index b624da189d5e2128f09c1043fdea0d69aa0efbc1..5637ddf5a2d4948c4a7d6a12a292596e4ccd3855 100644
--- a/arch/sh/src/common/up_arch.h
+++ b/arch/renesas/src/common/up_arch.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/common/up_arch.h
+ * arch/renesas/src/common/up_arch.h
  *
  *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef ___ARCH_SH_SRC_COMMON_UP_ARCH_H
-#define ___ARCH_SH_SRC_COMMON_UP_ARCH_H
+#ifndef ___ARCH_RENESAS_SRC_COMMON_UP_ARCH_H
+#define ___ARCH_RENESAS_SRC_COMMON_UP_ARCH_H
 
 /****************************************************************************
  * Included Files
@@ -67,4 +67,4 @@
 
 #endif
 
-#endif  /* ___ARCH_SH_SRC_COMMON_UP_ARCH_H */
+#endif  /* ___ARCH_RENESAS_SRC_COMMON_UP_ARCH_H */
diff --git a/arch/sh/src/common/up_assert.c b/arch/renesas/src/common/up_assert.c
similarity index 87%
rename from arch/sh/src/common/up_assert.c
rename to arch/renesas/src/common/up_assert.c
index c8303f2995810c5b31acb47b2456ea0859730db6..eaee6f7fec074207f374e56608e4a777c09a2e4a 100644
--- a/arch/sh/src/common/up_assert.c
+++ b/arch/renesas/src/common/up_assert.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/sh/src/common/up_assert.c
+ * arch/renesas/src/common/up_assert.c
  *
- *   Copyright (C) 2008-2009, 2012-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2012-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 #include 
@@ -76,10 +65,6 @@
 #  undef CONFIG_ARCH_USBDUMP
 #endif
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -125,7 +110,7 @@ static int usbtrace_syslog(FAR const char *fmt, ...)
   /* Let vsyslog do the real work */
 
   va_start(ap, fmt);
-  ret = lowvsyslog(LOG_INFO, fmt, ap);
+  ret = vsyslog(LOG_EMERG, fmt, ap);
   va_end(ap);
   return ret;
 }
@@ -147,17 +132,17 @@ static int assert_tracecallback(FAR struct usbtrace_s *trace, FAR void *arg)
 
 void up_assert(const uint8_t *filename, int lineno)
 {
-#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG)
+#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
   struct tcb_s *rtcb = this_task();
 #endif
 
   board_autoled_on(LED_ASSERTION);
 
 #if CONFIG_TASK_NAME_SIZE > 0
-  lldbg("Assertion failed at file:%s line: %d task: %s\n",
+  _alert("Assertion failed at file:%s line: %d task: %s\n",
         filename, lineno, rtcb->name);
 #else
-  lldbg("Assertion failed at file:%s line: %d\n",
+  _alert("Assertion failed at file:%s line: %d\n",
         filename, lineno);
 #endif
 
diff --git a/arch/sh/src/common/up_blocktask.c b/arch/renesas/src/common/up_blocktask.c
similarity index 99%
rename from arch/sh/src/common/up_blocktask.c
rename to arch/renesas/src/common/up_blocktask.c
index 75ecdef5077c7f98b4f0804d5f46385514ab105e..9e8ba57db75b6d0b4c030cd42f7aa0db2267b9bb 100644
--- a/arch/sh/src/common/up_blocktask.c
+++ b/arch/renesas/src/common/up_blocktask.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/common/up_blocktask.c
+ * arch/renesas/src/common/up_blocktask.c
  *
  *   Copyright (C) 2008-2009, 2013-2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sh/src/common/up_createstack.c b/arch/renesas/src/common/up_createstack.c
similarity index 98%
rename from arch/sh/src/common/up_createstack.c
rename to arch/renesas/src/common/up_createstack.c
index f52f03386ed13f260d4e6d48f56187b218d0d3ee..1bbf3cc8e0f20b89b60c820861ba8855c425bdb4 100644
--- a/arch/sh/src/common/up_createstack.c
+++ b/arch/renesas/src/common/up_createstack.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/common/up_createstack.c
+ * arch/renesas/src/common/up_createstack.c
  *
  *   Copyright (C) 2008-2009, 2013-2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -137,12 +137,12 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
           tcb->stack_alloc_ptr = (uint32_t *)kumm_malloc(stack_size);
         }
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       /* Was the allocation successful? */
 
       if (!tcb->stack_alloc_ptr)
         {
-          sdbg("ERROR: Failed to allocate stack, size %d\n", stack_size);
+          serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
         }
 #endif
     }
diff --git a/arch/sh/src/common/up_doirq.c b/arch/renesas/src/common/up_doirq.c
similarity index 99%
rename from arch/sh/src/common/up_doirq.c
rename to arch/renesas/src/common/up_doirq.c
index a2996c9f4820e0cb073938b88fa7bd7944b6e92d..9ac9d99aa004c5972fdd6061473b32e6c655a5c2 100644
--- a/arch/sh/src/common/up_doirq.c
+++ b/arch/renesas/src/common/up_doirq.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/common/up_doirq.c
+ * arch/renesas/src/common/up_doirq.c
  *
  *   Copyright (C) 2008-2009, 2011, 2014-2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sh/src/common/up_exit.c b/arch/renesas/src/common/up_exit.c
similarity index 82%
rename from arch/sh/src/common/up_exit.c
rename to arch/renesas/src/common/up_exit.c
index 84845556e983c96467843fd43f58e19ba7035633..81843c5ccc18ea8cb941a23c6ac87034310e3111 100644
--- a/arch/sh/src/common/up_exit.c
+++ b/arch/renesas/src/common/up_exit.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * common/up_exit.c
+ * arch/renesas/src/=common/up_exit.c
  *
- *   Copyright (C) 2008-2009, 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2013-2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -43,9 +43,9 @@
 #include 
 
 #include 
-
+#include 
 #ifdef CONFIG_DUMP_ON_EXIT
-#include 
+#  include 
 #endif
 
 #include "task/task.h"
@@ -57,9 +57,9 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
+#ifndef CONFIG_DEBUG_SCHED_INFO
+#  undef CONFIG_DUMP_ON_EXIT
+#endif
 
 /****************************************************************************
  * Private Functions
@@ -75,7 +75,7 @@
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_DUMP_ON_EXIT
 static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
 {
 #if CONFIG_NFILE_DESCRIPTORS > 0
@@ -86,8 +86,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
   int i;
 #endif
 
-  sdbg("  TCB=%p name=%s\n", tcb, tcb->argv[0]);
-  sdbg("    priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
+  sinfo("  TCB=%p name=%s\n", tcb, tcb->argv[0]);
+  sinfo("    priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
 
 #if CONFIG_NFILE_DESCRIPTORS > 0
   filelist = tcb->group->tg_filelist;
@@ -96,8 +96,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
       struct inode *inode = filelist->fl_files[i].f_inode;
       if (inode)
         {
-          sdbg("      fd=%d refcount=%d\n",
-               i, inode->i_crefs);
+          sinfo("      fd=%d refcount=%d\n",
+                i, inode->i_crefs);
         }
     }
 #endif
@@ -109,13 +109,18 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
       struct file_struct *filep = &streamlist->sl_streams[i];
       if (filep->fs_fd >= 0)
         {
-#if CONFIG_STDIO_BUFFER_SIZE > 0
-          sdbg("      fd=%d nbytes=%d\n",
-               filep->fs_fd,
-               filep->fs_bufpos - filep->fs_bufstart);
-#else
-          sdbg("      fd=%d\n", filep->fs_fd);
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
+          if (filep->fs_bufstart != NULL)
+            {
+              sinfo("      fd=%d nbytes=%d\n",
+                    filep->fs_fd,
+                    filep->fs_bufpos - filep->fs_bufstart);
+            }
+          else
 #endif
+            {
+              sinfo("      fd=%d\n", filep->fs_fd);
+            }
         }
     }
 #endif
@@ -141,16 +146,16 @@ void _exit(int status)
 {
   struct tcb_s* tcb;
 
-  /* Disable interrupts.  They will be restored when the next
-   * task is started.
+  /* Make sure that we are in a critical section with local interrupts.
+   * The IRQ state will be restored when the next task is started.
    */
 
-  (void)up_irq_save();
+  (void)enter_critical_section();
 
-  slldbg("TCB=%p exiting\n", this_task());
+  sinfo("TCB=%p exiting\n", this_task());
 
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
-  slldbg("Other tasks:\n");
+#ifdef CONFIG_DUMP_ON_EXIT
+  sinfo("Other tasks:\n");
   sched_foreach(_up_dumponexit, NULL);
 #endif
 
diff --git a/arch/sh/src/common/up_idle.c b/arch/renesas/src/common/up_idle.c
similarity index 98%
rename from arch/sh/src/common/up_idle.c
rename to arch/renesas/src/common/up_idle.c
index 0333722347b2df15108151ac1c172bed63c84784..c1fc2ed0ce457243ff190ea988503db217072731 100644
--- a/arch/sh/src/common/up_idle.c
+++ b/arch/renesas/src/common/up_idle.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/sh/src/common/up_idle.c
+ *  arch/renesas/src/common/up_idle.c
  *
  *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sh/src/common/up_initialize.c b/arch/renesas/src/common/up_initialize.c
similarity index 80%
rename from arch/sh/src/common/up_initialize.c
rename to arch/renesas/src/common/up_initialize.c
index 98c6bf273d842474e4d91df99a1267975fb5d252..49fc1f55d104240a528415bbd642847dd0f5e358 100644
--- a/arch/sh/src/common/up_initialize.c
+++ b/arch/renesas/src/common/up_initialize.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/common/up_initialize.c
+ * arch/renesas/src/common/up_initialize.c
  *
  *   Copyright (C) 2008-2010, 2012-2013, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -44,13 +44,16 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
+#include 
+#include 
+#include 
 
 #include "up_arch.h"
 #include "up_internal.h"
@@ -77,18 +80,18 @@
  *
  ****************************************************************************/
 
-#if defined(CONFIG_ARCH_CALIBRATION) & defined(CONFIG_DEBUG)
+#if defined(CONFIG_ARCH_CALIBRATION) & defined(CONFIG_DEBUG_FEATURES)
 static void up_calibratedelay(void)
 {
   int i;
 
-  slldbg("Beginning 100s delay\n");
+  swarn("Beginning 100s delay\n");
   for (i = 0; i < 100; i++)
     {
       up_mdelay(1000);
     }
 
-  slldbg("End 100s delay\n");
+  swarn("End 100s delay\n");
 }
 #else
 # define up_calibratedelay()
@@ -129,10 +132,20 @@ void up_initialize(void)
 
   up_irqinitialize();
 
-  /* Initialize the system timer interrupt */
+#ifdef CONFIG_PM
+  /* Initialize the power management subsystem.  This MCU-specific function
+   * must be called *very* early in the initialization sequence *before* any
+   * other device drivers are initialized (since they may attempt to register
+   * with the power management subsystem).
+   */
+
+  up_pminitialize();
+#endif
 
 #if !defined(CONFIG_SUPPRESS_INTERRUPTS) && !defined(CONFIG_SUPPRESS_TIMER_INTS)
-  up_timer_initialize();
+  /* Initialize the system timer interrupt */
+
+  renesas_timer_initialize();
 #endif
 
   /* Register devices */
@@ -143,6 +156,14 @@ void up_initialize(void)
   devnull_register();   /* Standard /dev/null */
 #endif
 
+#if defined(CONFIG_DEV_RANDOM)
+  devrandom_register(); /* Standard /dev/random */
+#endif
+
+#if defined(CONFIG_DEV_URANDOM)
+  devurandom_register();   /* Standard /dev/urandom */
+#endif
+
 #if defined(CONFIG_DEV_ZERO)
   devzero_register();   /* Standard /dev/zero */
 #endif
@@ -172,19 +193,33 @@ void up_initialize(void)
 
 #if defined(CONFIG_DEV_LOWCONSOLE)
   lowconsole_init();
-#elif defined(CONFIG_SYSLOG_CONSOLE)
+#elif defined(CONFIG_CONSOLE_SYSLOG)
   syslog_console_init();
 #elif defined(CONFIG_RAMLOG_CONSOLE)
   ramlog_consoleinit();
 #endif
 
-  /* Initialize the system logging device */
+#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_PSEUDOTERM_SUSV1)
+  /* Register the master pseudo-terminal multiplexor device */
+
+  (void)ptmx_register();
+#endif
+
+  /* Early initialization of the system logging device.  Some SYSLOG channel
+   * can be initialized early in the initialization sequence because they
+   * depend on only minimal OS initialization.
+   */
+
+  syslog_initialize(SYSLOG_INIT_EARLY);
 
-#ifdef CONFIG_SYSLOG_CHAR
-  syslog_initialize();
+#if defined(CONFIG_CRYPTO)
+  /* Initialize the HW crypto and /dev/crypto */
+
+  up_cryptoinitialize();
 #endif
-#ifdef CONFIG_RAMLOG_SYSLOG
-  ramlog_sysloginit();
+
+#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_CRYPTO_CRYPTODEV)
+  devcrypto_register();
 #endif
 
 #ifndef CONFIG_NETDEV_LATEINIT
diff --git a/arch/sh/src/common/up_internal.h b/arch/renesas/src/common/up_internal.h
similarity index 92%
rename from arch/sh/src/common/up_internal.h
rename to arch/renesas/src/common/up_internal.h
index 5f1a54bb3effb5ee03851ec596dd2d139e1e8432..99bc1188181e6ffda972db85c8eb7acde0afb50b 100644
--- a/arch/sh/src/common/up_internal.h
+++ b/arch/renesas/src/common/up_internal.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/common/up_internal.h
+ * arch/renesas/src/common/up_internal.h
  *
  *   Copyright (C) 2008-2009, 2012-2013, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef ___ARCH_SH_SRC_COMMON_UP_INTERNAL_H
-#define ___ARCH_SH_SRC_COMMON_UP_INTERNAL_H
+#ifndef ___ARCH_RENESAS_SRC_COMMON_UP_INTERNAL_H
+#define ___ARCH_RENESAS_SRC_COMMON_UP_INTERNAL_H
 
 /****************************************************************************
  * Included Files
@@ -101,13 +101,6 @@
 #  define USE_SERIALDRIVER 1
 #endif
 
-/* Determine which device to use as the system logging device */
-
-#ifndef CONFIG_SYSLOG
-#  undef CONFIG_SYSLOG_CHAR
-#  undef CONFIG_RAMLOG_SYSLOG
-#endif
-
 /* Check if an interrupt stack size is configured */
 
 #ifndef CONFIG_ARCH_INTERRUPTSTACK
@@ -165,13 +158,12 @@ void up_prefetchabort(uint32_t *regs);
 int  up_saveusercontext(uint32_t *regs);
 void up_sigdeliver(void);
 void up_syscall(uint32_t *regs);
-int  up_timerisr(int irq, uint32_t *regs);
 void up_undefinedinsn(uint32_t *regs);
 void up_lowputc(char ch);
 void up_puts(const char *str);
 void up_lowputs(const char *str);
 
-/* Defined in up_vectors.S */
+/* Defined in xyz_vectors.S */
 
 void up_vectorundefinsn(void);
 void up_vectorswi(void);
@@ -181,7 +173,7 @@ void up_vectoraddrexcptn(void);
 void up_vectorirq(void);
 void up_vectorfiq(void);
 
-/* Defined in up_serial.c */
+/* Defined in xyz_serial.c */
 
 #if CONFIG_NFILE_DESCRIPTORS > 0
 void up_earlyconsoleinit(void);
@@ -199,15 +191,15 @@ void lowconsole_init(void);
 # define lowconsole_init()
 #endif
 
-/* Defined in up_watchdog.c */
+/* Defined in xyz_watchdog.c */
 
 void up_wdtinit(void);
 
-/* Defined in up_timerisr.c */
+/* Defined in xyz_timerisr.c */
 
-void up_timer_initialize(void);
+void renesas_timer_initialize(void);
 
-/* Defined in board/up_lcd.c */
+/* Defined in board/xyz_lcd.c */
 
 #ifdef CONFIG_LCD_CONSOLE
 void up_lcdinit(void);
@@ -217,7 +209,7 @@ void up_lcdputc(char ch);
 # define up_lcdputc(ch)
 #endif
 
-/* Defined in board/up_network.c */
+/* Defined in board/xyz_network.c */
 
 #ifdef CONFIG_NET
 void up_netinitialize(void);
@@ -244,4 +236,4 @@ void up_dumpstate(void);
 #endif
 
 #endif /* __ASSEMBLY__ */
-#endif  /* ___ARCH_SH_SRC_COMMON_UP_INTERNAL_H */
+#endif  /* ___ARCH_RENESAS_SRC_COMMON_UP_INTERNAL_H */
diff --git a/arch/sh/src/common/up_interruptcontext.c b/arch/renesas/src/common/up_interruptcontext.c
similarity index 98%
rename from arch/sh/src/common/up_interruptcontext.c
rename to arch/renesas/src/common/up_interruptcontext.c
index 56e4f9478ea0becd6ab0614880abb60250b2e186..a67f13d0c306e581b2b5cf2bb911ff37f8800f15 100644
--- a/arch/sh/src/common/up_interruptcontext.c
+++ b/arch/renesas/src/common/up_interruptcontext.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/sh/src/common/up_interruptcontext.c
+ *  arch/renesas/src/common/up_interruptcontext.c
  *
  *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sh/src/common/up_lowputs.c b/arch/renesas/src/common/up_lowputs.c
similarity index 98%
rename from arch/sh/src/common/up_lowputs.c
rename to arch/renesas/src/common/up_lowputs.c
index 592ea8177f70068b833d1c1690b8cb1e1c409f7d..76617901e782863ca8c301e43516608bd34143f6 100644
--- a/arch/sh/src/common/up_lowputs.c
+++ b/arch/renesas/src/common/up_lowputs.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/common/up_lowputs.c
+ * arch/renesas/src/common/up_lowputs.c
  *
  *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sh/src/common/up_mdelay.c b/arch/renesas/src/common/up_mdelay.c
similarity index 98%
rename from arch/sh/src/common/up_mdelay.c
rename to arch/renesas/src/common/up_mdelay.c
index e7ed4f9015626678a767ef762afc8f12b1469a61..e3120ce74b4a195a44ebffa1169002d806cfabe3 100644
--- a/arch/sh/src/common/up_mdelay.c
+++ b/arch/renesas/src/common/up_mdelay.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/sh/src/common/up_mdelay.c
+ *  arch/renesas/src/common/up_mdelay.c
  *
  *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sh/src/common/up_puts.c b/arch/renesas/src/common/up_puts.c
similarity index 98%
rename from arch/sh/src/common/up_puts.c
rename to arch/renesas/src/common/up_puts.c
index 24dccecbe404c3b7e9b9ac3af4955c9fa211ef56..5bc2cc8433f52d84fe98af95a7ea1096714ce4f8 100644
--- a/arch/sh/src/common/up_puts.c
+++ b/arch/renesas/src/common/up_puts.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/common/up_puts.c
+ * arch/renesas/src/common/up_puts.c
  *
  *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sh/src/common/up_releasepending.c b/arch/renesas/src/common/up_releasepending.c
similarity index 98%
rename from arch/sh/src/common/up_releasepending.c
rename to arch/renesas/src/common/up_releasepending.c
index b91503cbe6a3f046514a8195a246a2a90b364ab9..5c3f57482178a62e4db35e648e684294795de8a8 100644
--- a/arch/sh/src/common/up_releasepending.c
+++ b/arch/renesas/src/common/up_releasepending.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/sh/src/common/up_releasepending.c
+ *  arch/renesas/src/common/up_releasepending.c
  *
  *   Copyright (C) 2008-2009, 2014-2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -67,7 +67,7 @@ void up_release_pending(void)
 {
   struct tcb_s *rtcb = this_task();
 
-  slldbg("From TCB=%p\n", rtcb);
+  sinfo("From TCB=%p\n", rtcb);
 
   /* Merge the g_pendingtasks list into the ready-to-run task list */
 
diff --git a/arch/sh/src/common/up_releasestack.c b/arch/renesas/src/common/up_releasestack.c
similarity index 99%
rename from arch/sh/src/common/up_releasestack.c
rename to arch/renesas/src/common/up_releasestack.c
index 8e01456fdbf7cb766b315081e1bbc795461be7fe..e2b5948b142fb84272ab588875403528e17dcefc 100644
--- a/arch/sh/src/common/up_releasestack.c
+++ b/arch/renesas/src/common/up_releasestack.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/sh/src/common/up_releasestack.c
+ *  arch/renesas/src/common/up_releasestack.c
  *
  *   Copyright (C) 2008-2009, 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sh/src/common/up_reprioritizertr.c b/arch/renesas/src/common/up_reprioritizertr.c
similarity index 98%
rename from arch/sh/src/common/up_reprioritizertr.c
rename to arch/renesas/src/common/up_reprioritizertr.c
index e838cff0bba8de83d17c6b920e30c5192a78df79..c476dbad376420d5ff9fc712764c9bdb3d754c0b 100644
--- a/arch/sh/src/common/up_reprioritizertr.c
+++ b/arch/renesas/src/common/up_reprioritizertr.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/sh/src/common/up_reprioritizertr.c
+ *  arch/renesas/src/common/up_reprioritizertr.c
  *
  *   Copyright (C) 2008-2009, 2011, 2013-2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
       struct tcb_s *rtcb = this_task();
       bool switch_needed;
 
-      slldbg("TCB=%p PRI=%d\n", tcb, priority);
+      sinfo("TCB=%p PRI=%d\n", tcb, priority);
 
       /* Remove the tcb task from the ready-to-run list.
        * sched_removereadytorun will return true if we just
diff --git a/arch/sh/src/common/up_stackframe.c b/arch/renesas/src/common/up_stackframe.c
similarity index 99%
rename from arch/sh/src/common/up_stackframe.c
rename to arch/renesas/src/common/up_stackframe.c
index 06d2c218a3464555c6b529e700cc148149cfdd24..811fcd4aad1b007466f7258b522b4dd4a4e8afeb 100644
--- a/arch/sh/src/common/up_stackframe.c
+++ b/arch/renesas/src/common/up_stackframe.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/common/up_stackframe.c
+ * arch/renesas/src/common/up_stackframe.c
  *
  *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sh/src/common/up_udelay.c b/arch/renesas/src/common/up_udelay.c
similarity index 99%
rename from arch/sh/src/common/up_udelay.c
rename to arch/renesas/src/common/up_udelay.c
index 6af5d2f76d471d175a748b7a5bd30d502b53418b..9f9bda30330613796ed6950e1fd10b5d1b448c22 100644
--- a/arch/sh/src/common/up_udelay.c
+++ b/arch/renesas/src/common/up_udelay.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/sh/src/common/up_udelay.c
+ *  arch/renesas/src/common/up_udelay.c
  *
  *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sh/src/common/up_unblocktask.c b/arch/renesas/src/common/up_unblocktask.c
similarity index 99%
rename from arch/sh/src/common/up_unblocktask.c
rename to arch/renesas/src/common/up_unblocktask.c
index d506d97d094cd6fb1408e90eb703336861849862..de3008f98a00bb11ee11c698d95c9d61b94f1c28 100644
--- a/arch/sh/src/common/up_unblocktask.c
+++ b/arch/renesas/src/common/up_unblocktask.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/sh/src/common/up_unblocktask.c
+ *  arch/renesas/src/common/up_unblocktask.c
  *
  *   Copyright (C) 2008-2009, 2013-2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sh/src/common/up_usestack.c b/arch/renesas/src/common/up_usestack.c
similarity index 99%
rename from arch/sh/src/common/up_usestack.c
rename to arch/renesas/src/common/up_usestack.c
index 2da654391ca22b8ac430e5af41d33793058e130c..de4c4aca95f7cdcf5e21539a6badc85171bb01c6 100644
--- a/arch/sh/src/common/up_usestack.c
+++ b/arch/renesas/src/common/up_usestack.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/common/up_usestack.c
+ * arch/renesas/src/common/up_usestack.c
  *
  *   Copyright (C) 2008-2009, 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sh/src/m16c/Kconfig b/arch/renesas/src/m16c/Kconfig
similarity index 100%
rename from arch/sh/src/m16c/Kconfig
rename to arch/renesas/src/m16c/Kconfig
diff --git a/arch/sh/src/m16c/Make.defs b/arch/renesas/src/m16c/Make.defs
similarity index 98%
rename from arch/sh/src/m16c/Make.defs
rename to arch/renesas/src/m16c/Make.defs
index 6995d37b1e456dd320d2ecfb95f42d3e7360b513..d44d9b2f0973dec7c7df7d51744da7626b021c14 100644
--- a/arch/sh/src/m16c/Make.defs
+++ b/arch/renesas/src/m16c/Make.defs
@@ -1,5 +1,5 @@
 ##############################################################################
-# arch/sh/src/m16c/Make.defs
+# arch/renesas/src/m16c/Make.defs
 #
 #   Copyright (C) 2009, 2014 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
diff --git a/arch/sh/src/m16c/chip.h b/arch/renesas/src/m16c/chip.h
similarity index 98%
rename from arch/sh/src/m16c/chip.h
rename to arch/renesas/src/m16c/chip.h
index 695814d4324cb87b47cb7d83a6647752480f12ad..80fbc0e734d6d6b615e93243d6a37124fb5b96c3 100644
--- a/arch/sh/src/m16c/chip.h
+++ b/arch/renesas/src/m16c/chip.h
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/sh/src/m16c/chip.h
+ * arch/renesas/src/m16c/chip.h
  *
  *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_SH_SRC_M16C_CHIP_H
-#define __ARCH_SH_SRC_M16C_CHIP_H
+#ifndef __ARCH_RENESAS_SRC_M16C_CHIP_H
+#define __ARCH_RENESAS_SRC_M16C_CHIP_H
 
 /************************************************************************************
  * Included Files
@@ -278,4 +278,4 @@ extern uint32_t g_idle_topstack; /* Start of the heap */
 
 #endif /* __ASSEMBLY__ */
 
-#endif /* __ARCH_SH_SRC_M16C_CHIP_H */
+#endif /* __ARCH_RENESAS_SRC_M16C_CHIP_H */
diff --git a/arch/sh/src/m16c/m16c_copystate.c b/arch/renesas/src/m16c/m16c_copystate.c
similarity index 98%
rename from arch/sh/src/m16c/m16c_copystate.c
rename to arch/renesas/src/m16c/m16c_copystate.c
index 2aa48d6c72a6b15d478e3d68410050f8ca5b949a..662a6870f634feb42f6d4a137e3ed4d8daa548a2 100644
--- a/arch/sh/src/m16c/m16c_copystate.c
+++ b/arch/renesas/src/m16c/m16c_copystate.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/m16c/up_copystate.c
+ * arch/renesas/src/m16c/up_copystate.c
  *
  *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sh/src/m16c/m16c_dumpstate.c b/arch/renesas/src/m16c/m16c_dumpstate.c
similarity index 83%
rename from arch/sh/src/m16c/m16c_dumpstate.c
rename to arch/renesas/src/m16c/m16c_dumpstate.c
index e80fbcb9f57d62b5d11c63cd7add92cec5c1f0f3..cfd9bd0fdb265403f6c67773b1124f9955748e95 100644
--- a/arch/sh/src/m16c/m16c_dumpstate.c
+++ b/arch/renesas/src/m16c/m16c_dumpstate.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/sh/src/m16c/m16c_assert.c
+ * arch/renesas/src/m16c/m16c_assert.c
  *
- *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,13 +39,6 @@
 
 #include 
 
-/* Output debug info -- even if debug is not selected. */
-
-#undef  CONFIG_DEBUG
-#undef  CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
 #include 
 #include 
 
@@ -59,14 +52,6 @@
 
 #ifdef CONFIG_ARCH_STACKDUMP
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -112,7 +97,7 @@ static void m16c_stackdump(uint16_t sp, uint16_t stack_base)
   for (stack = sp & ~7; stack < stack_base; stack += 8)
     {
       uint8_t *ptr = (uint8_t*)stack;
-      lldbg("%04x: %02x %02x %02x %02x %02x %02x %02x %02x\n",
+      _alert("%04x: %02x %02x %02x %02x %02x %02x %02x %02x\n",
              stack, ptr[0], ptr[1], ptr[2], ptr[3], ptr[4], ptr[5], ptr[6], ptr[7]);
     }
 }
@@ -131,14 +116,14 @@ static inline void m16c_registerdump(void)
     {
       /* Yes.. dump the interrupt registers */
 
-      lldbg("PC: %02x%02x%02x FLG: %02x00%02x FB: %02x%02x SB: %02x%02x SP: %02x%02x\n",
+      _alert("PC: %02x%02x%02x FLG: %02x00%02x FB: %02x%02x SB: %02x%02x SP: %02x%02x\n",
             ptr[REG_FLGPCHI] & 0xff, ptr[REG_PC], ptr[REG_PC+1],
             ptr[REG_FLGPCHI] >> 8, ptr[REG_FLG],
             ptr[REG_FB], ptr[REG_FB+1],
             ptr[REG_SB], ptr[REG_SB+1],
             ptr[REG_SP], ptr[REG_SP+1]);
 
-      lldbg("R0: %02x%02x R1: %02x%02x R2: %02x%02x A0: %02x%02x A1: %02x%02x\n",
+      _alert("R0: %02x%02x R1: %02x%02x R2: %02x%02x A0: %02x%02x A1: %02x%02x\n",
             ptr[REG_R0], ptr[REG_R0+1], ptr[REG_R1], ptr[REG_R1+1],
             ptr[REG_R2], ptr[REG_R2+1], ptr[REG_R3], ptr[REG_R3+1],
             ptr[REG_A0], ptr[REG_A0+1], ptr[REG_A1], ptr[REG_A1+1]);
@@ -194,10 +179,10 @@ void up_dumpstate(void)
 
   /* Show interrupt stack info */
 
-  lldbg("sp:     %04x\n", sp);
-  lldbg("IRQ stack:\n");
-  lldbg("  base: %04x\n", istackbase);
-  lldbg("  size: %04x\n", istacksize);
+  _alert("sp:     %04x\n", sp);
+  _alert("IRQ stack:\n");
+  _alert("  base: %04x\n", istackbase);
+  _alert("  size: %04x\n", istacksize);
 
   /* Does the current stack pointer lie within the interrupt
    * stack?
@@ -212,18 +197,18 @@ void up_dumpstate(void)
       /* Extract the user stack pointer from the register area */
 
       sp = m16c_getusersp();
-      lldbg("sp:     %04x\n", sp);
+      _alert("sp:     %04x\n", sp);
     }
 
   /* Show user stack info */
 
-  lldbg("User stack:\n");
-  lldbg("  base: %04x\n", ustackbase);
-  lldbg("  size: %04x\n", ustacksize);
+  _alert("User stack:\n");
+  _alert("  base: %04x\n", ustackbase);
+  _alert("  size: %04x\n", ustacksize);
 #else
-  lldbg("sp:         %04x\n", sp);
-  lldbg("stack base: %04x\n", ustackbase);
-  lldbg("stack size: %04x\n", ustacksize);
+  _alert("sp:         %04x\n", sp);
+  _alert("stack base: %04x\n", ustackbase);
+  _alert("stack size: %04x\n", ustacksize);
 #endif
 
   /* Dump the user stack if the stack pointer lies within the allocated user
@@ -233,7 +218,7 @@ void up_dumpstate(void)
   if (sp > ustackbase || sp <= ustackbase - ustacksize)
     {
 #if !defined(CONFIG_ARCH_INTERRUPTSTACK) || CONFIG_ARCH_INTERRUPTSTACK < 4
-      lldbg("ERROR: Stack pointer is not within allocated stack\n");
+      _alert("ERROR: Stack pointer is not within allocated stack\n");
 #endif
     }
   else
diff --git a/arch/sh/src/m16c/m16c_head.S b/arch/renesas/src/m16c/m16c_head.S
similarity index 99%
rename from arch/sh/src/m16c/m16c_head.S
rename to arch/renesas/src/m16c/m16c_head.S
index f18da3fe3fe02581a8bd07ca3b8fe5b7635b99fd..2ed97e4853b99e49cc85ed288d13aeeb92d3ee4f 100644
--- a/arch/sh/src/m16c/m16c_head.S
+++ b/arch/renesas/src/m16c/m16c_head.S
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/sh/src/m16c/m16c_head.S
+ * arch/renesas/src/m16c/m16c_head.S
  *
  *	 Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved.
  *	 Author: Gregory Nutt 
@@ -58,7 +58,7 @@
  *****************************************************************************/
 
 	.macro	showprogress, code
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 	.globl	_up_lowputc
 	mov.b	r#\code1l					/* Character to print */
 	jsr.a	_up_lowputc					/* Print it */
diff --git a/arch/sh/src/m16c/m16c_initialstate.c b/arch/renesas/src/m16c/m16c_initialstate.c
similarity index 98%
rename from arch/sh/src/m16c/m16c_initialstate.c
rename to arch/renesas/src/m16c/m16c_initialstate.c
index cc913fde649e8eceac8f519a87b49d90a490b94e..abf31035d106dfb963b730c693db101482d0724c 100644
--- a/arch/sh/src/m16c/m16c_initialstate.c
+++ b/arch/renesas/src/m16c/m16c_initialstate.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/sh/src/m16c/m16c_initialstate.c
+ *  arch/renesas/src/m16c/m16c_initialstate.c
  *
  *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sh/src/m16c/m16c_irq.c b/arch/renesas/src/m16c/m16c_irq.c
similarity index 99%
rename from arch/sh/src/m16c/m16c_irq.c
rename to arch/renesas/src/m16c/m16c_irq.c
index 2951033206e487d8a85fe3463ad160763be0d253..ce94eb4d344ad74962418158904f80e7c64ee923 100644
--- a/arch/sh/src/m16c/m16c_irq.c
+++ b/arch/renesas/src/m16c/m16c_irq.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/m16c/m16c_irq.c
+ * arch/renesas/src/m16c/m16c_irq.c
  *
  *   Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sh/src/m16c/m16c_lowputc.c b/arch/renesas/src/m16c/m16c_lowputc.c
similarity index 99%
rename from arch/sh/src/m16c/m16c_lowputc.c
rename to arch/renesas/src/m16c/m16c_lowputc.c
index 5ec641fbec605d7b09c2139a4e62a521d9101887..ecda7343800ce79cd6bcf216dd63a319338ca714 100644
--- a/arch/sh/src/m16c/m16c_lowputc.c
+++ b/arch/renesas/src/m16c/m16c_lowputc.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/m16c/m16c_lowputc.c
+ * arch/renesas/src/m16c/m16c_lowputc.c
  *
  *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sh/src/m16c/m16c_schedulesigaction.c b/arch/renesas/src/m16c/m16c_schedulesigaction.c
similarity index 97%
rename from arch/sh/src/m16c/m16c_schedulesigaction.c
rename to arch/renesas/src/m16c/m16c_schedulesigaction.c
index 682d3299875c8ebad2da16137073dad542efabf9..699139446636c8f62c106bfa085c1ef619ccd04b 100644
--- a/arch/sh/src/m16c/m16c_schedulesigaction.c
+++ b/arch/renesas/src/m16c/m16c_schedulesigaction.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/m16c/m16c_schedulesigaction.c
+ * arch/renesas/src/m16c/m16c_schedulesigaction.c
  *
  *   Copyright (C) 2009-2010, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -93,7 +93,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
 {
   irqstate_t flags;
 
-  sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+  sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
 
   /* Make sure that interrupts are disabled */
 
@@ -107,7 +107,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
        * being delivered to the currently executing task.
        */
 
-      sdbg("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
+      sinfo("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
 
       if (tcb == this_task())
         {
diff --git a/arch/sh/src/m16c/m16c_serial.c b/arch/renesas/src/m16c/m16c_serial.c
similarity index 95%
rename from arch/sh/src/m16c/m16c_serial.c
rename to arch/renesas/src/m16c/m16c_serial.c
index a366e3b57d399db91ac01473c474652f644338d4..72cf64a3a5de034a9acb3c57a0230688ffcb53d6 100644
--- a/arch/sh/src/m16c/m16c_serial.c
+++ b/arch/renesas/src/m16c/m16c_serial.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/m16c/m16c_serial.c
+ * arch/renesas/src/m16c/m16c_serial.c
  *
  *   Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -267,12 +267,12 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-static int  up_rcvinterrupt(int irq, void *context);
+static int  up_rcvinterrupt(int irq, void *context, void *arg);
 static int  up_receive(struct uart_dev_s *dev, unsigned int *status);
 static void m16c_rxint(struct up_dev_s *dev, bool enable);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
 static bool up_rxavailable(struct uart_dev_s *dev);
-static int  up_xmtinterrupt(int irq, void *context);
+static int  up_xmtinterrupt(int irq, void *context, void *arg);
 static void up_send(struct uart_dev_s *dev, int ch);
 static void m16c_txint(struct up_dev_s *dev, bool enable);
 static void up_txint(struct uart_dev_s *dev, bool enable);
@@ -588,7 +588,7 @@ static int up_setup(struct uart_dev_s *dev)
   else
 #endif
     {
-      dbg("Invalid UART #\n");
+      _err("ERROR: Invalid UART #\n");
     }
 
   /* Set UART transmit/receive control register 1 to enable transmit and receive */
@@ -613,7 +613,7 @@ static int up_setup(struct uart_dev_s *dev)
     }
   else
     {
-      dbg("Invalid bits=%d\n", priv->bits);
+      _err("ERROR: Invalid bits=%d\n", priv->bits);
     }
 
   if (priv->parity != 0)
@@ -665,7 +665,7 @@ static int up_setup(struct uart_dev_s *dev)
   else
 #endif
     {
-      dbg("Invalid UART #\n");
+      _err("ERROR: Invalid UART #\n");
     }
 
   /* Read any data left in the RX fifo */
@@ -711,12 +711,12 @@ static int up_attach(struct uart_dev_s *dev)
 
   /* Attach the UART receive data available IRQ */
 
-  ret = irq_attach(priv->rcvirq, up_rcvinterrupt);
+  ret = irq_attach(priv->rcvirq, up_rcvinterrupt, dev);
   if (ret == OK)
     {
       /* Attach the UART transmit complete IRQ */
 
-      ret = irq_attach(priv->xmtirq, up_xmtinterrupt);
+      ret = irq_attach(priv->xmtirq, up_xmtinterrupt, dev);
       if (ret != OK)
         {
           /* Detach the ERI interrupt on failure */
@@ -764,34 +764,11 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_rcvinterrupt(int irq, void *context)
+static int up_rcvinterrupt(int irq, void *context, void *arg)
 {
-  struct uart_dev_s *dev = NULL;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
 
-#ifdef CONFIG_M16C_UART0
-  if (irq == g_uart0priv.rcvirq)
-    {
-      dev = &g_uart0port;
-    }
-  else
-#endif
-#ifdef CONFIG_M16C_UART1
-  if (irq == g_uart1priv.rcvirq)
-    {
-      dev = &g_uart1port;
-    }
-  else
-#endif
-#ifdef CONFIG_M16C_UART2
-  if (irq = g_uart2priv.rcvirq)
-    {
-      dev = &g_uart2port;
-    }
-  else
-#endif
-    {
-      PANIC();
-    }
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
 
   /* Handle incoming, receive bytes (RDRF: Receive Data Register Full) */
 
@@ -872,7 +849,7 @@ static void m16c_rxint(struct up_dev_s *dev, bool enable)
   else
 #endif
     {
-      dbg("Invalid UART #\n");
+      _err("ERROR: Invalid UART #\n");
       return;
     }
 
@@ -924,40 +901,17 @@ static bool up_rxavailable(struct uart_dev_s *dev)
  *   This is the UART receive interrupt handler.  It will be invoked
  *   when an interrupt received on the 'irq'  It should call
  *   uart_transmitchars or uart_receivechar to perform the
- *   appropriate data transfers.  The interrupt handling logic\
+ *   appropriate data transfers.  The interrupt handling logic
  *   must be able to map the 'irq' number into the approprite
  *   up_dev_s structure in order to call these functions.
  *
  ****************************************************************************/
 
-static int up_xmtinterrupt(int irq, void *context)
+static int up_xmtinterrupt(int irq, void *context, void *arg)
 {
-  struct uart_dev_s *dev = NULL;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
 
-#ifdef CONFIG_M16C_UART0
-  if (irq == g_uart0priv.xmtirq)
-    {
-      dev = &g_uart0port;
-    }
-  else
-#endif
-#ifdef CONFIG_M16C_UART1
-  if (irq == g_uart1priv.xmtirq)
-    {
-      dev = &g_uart1port;
-    }
-  else
-#endif
-#ifdef CONFIG_M16C_UART2
-  if (irq == g_uart2priv.xmtirq)
-    {
-      dev = &g_uart1port;
-    }
-  else
-#endif
-    {
-      PANIC();
-    }
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
 
   /* Handle outgoing, transmit bytes */
 
@@ -1027,7 +981,7 @@ static void m16c_txint(struct up_dev_s *dev, bool enable)
   else
 #endif
     {
-      dbg("Invalid UART #\n");
+      _err("ERROR: Invalid UART #\n");
       return;
     }
 
diff --git a/arch/sh/src/m16c/m16c_sigdeliver.c b/arch/renesas/src/m16c/m16c_sigdeliver.c
similarity index 97%
rename from arch/sh/src/m16c/m16c_sigdeliver.c
rename to arch/renesas/src/m16c/m16c_sigdeliver.c
index 3b595ed7ef7d94bc591ad2000f04e0d1770e2353..a56448c36bc623656919b4d6098270ac0540e377 100644
--- a/arch/sh/src/m16c/m16c_sigdeliver.c
+++ b/arch/renesas/src/m16c/m16c_sigdeliver.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/m16c/m16c_sigdeliver.c
+ * arch/renesas/src/m16c/m16c_sigdeliver.c
  *
  *   Copyright (C) 2009-2010, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -95,7 +95,7 @@ void up_sigdeliver(void)
 
   board_autoled_on(LED_SIGNAL);
 
-  sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
         rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
   ASSERT(rtcb->xcp.sigdeliver != NULL);
 
@@ -128,7 +128,7 @@ void up_sigdeliver(void)
    * errno that is needed by the user logic (it is probably EINTR).
    */
 
-  sdbg("Resuming\n");
+  sinfo("Resuming\n");
   (void)up_irq_save();
   rtcb->pterrno = saved_errno;
 
diff --git a/arch/sh/src/m16c/m16c_timer.h b/arch/renesas/src/m16c/m16c_timer.h
similarity index 98%
rename from arch/sh/src/m16c/m16c_timer.h
rename to arch/renesas/src/m16c/m16c_timer.h
index ff542163222159572d398265906ddc2522a781a0..5c19ff6ed55f4dea43a0c49702fd61d3d24593b6 100644
--- a/arch/sh/src/m16c/m16c_timer.h
+++ b/arch/renesas/src/m16c/m16c_timer.h
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/sh/src/m16c/m16c_timer.h
+ * arch/renesas/src/m16c/m16c_timer.h
  *
  *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_SH_SRC_M16C_M16C_TIMER_H
-#define __ARCH_SH_SRC_M16C_M16C_TIMER_H
+#ifndef __ARCH_RENESAS_SRC_M16C_M16C_TIMER_H
+#define __ARCH_RENESAS_SRC_M16C_M16C_TIMER_H
 
 /************************************************************************************
  * Included Files
@@ -223,4 +223,4 @@
 
 #endif /* __ASSEMBLY__ */
 
-#endif /* __ARCH_SH_SRC_M16C_M16C_TIMER_H */
+#endif /* __ARCH_RENESAS_SRC_M16C_M16C_TIMER_H */
diff --git a/arch/sh/src/m16c/m16c_timerisr.c b/arch/renesas/src/m16c/m16c_timerisr.c
similarity index 90%
rename from arch/sh/src/m16c/m16c_timerisr.c
rename to arch/renesas/src/m16c/m16c_timerisr.c
index adaa18af022ba7270ea7310bd810400dd7ad94a1..6d82add128fe40085d8856a20c08a66fe79bd948 100644
--- a/arch/sh/src/m16c/m16c_timerisr.c
+++ b/arch/renesas/src/m16c/m16c_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/sh/src/m16c/m16c_timerisr.c
+ * arch/renesas/src/m16c/m16c_timerisr.c
  *
- *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -107,19 +107,11 @@
   ((M16C_XIN_FREQ / M16C_PRESCALE_VALUE / CLK_TCK)  - 1)
 
 /****************************************************************************
- * Private Type Definitions
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  m16c_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -127,16 +119,20 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int m16c_timerisr(int irq, uint32_t *regs, void *arg)
 {
-   /* Process timer interrupt */
+  /* Process timer interrupt */
 
-   sched_process_timer();
-   return 0;
+  sched_process_timer();
+  return 0;
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  renesas_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -144,7 +140,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void renesas_timer_initialize(void)
 {
   /* Make sure that no timers are running and that all timer interrupts are
    * disabled.
@@ -170,7 +166,7 @@ void up_timer_initialize(void)
 
   /* Attach the interrupt handler */
 
-  irq_attach(M16C_SYSTIMER_IRQ, (xcpt_t)up_timerisr);
+  irq_attach(M16C_SYSTIMER_IRQ, (xcpt_t)m16c_timerisr, NULL);
 
   /* Enable timer interrupts */
 
diff --git a/arch/sh/src/m16c/m16c_uart.h b/arch/renesas/src/m16c/m16c_uart.h
similarity index 97%
rename from arch/sh/src/m16c/m16c_uart.h
rename to arch/renesas/src/m16c/m16c_uart.h
index 382411538d3be8f5845a051f9122f32a7a66d693..c50d9b90183f5e4df876576e328b6de970abb5e1 100644
--- a/arch/sh/src/m16c/m16c_uart.h
+++ b/arch/renesas/src/m16c/m16c_uart.h
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/sh/src/m16c/m16c_uart.h
+ * arch/renesas/src/m16c/m16c_uart.h
  *
  *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_SH_SRC_M16C_M16C_UART_H
-#define __ARCH_SH_SRC_M16C_M16C_UART_H
+#ifndef __ARCH_RENESAS_SRC_M16C_M16C_UART_H
+#define __ARCH_RENESAS_SRC_M16C_M16C_UART_H
 
 /************************************************************************************
  * Included Files
@@ -142,4 +142,4 @@
 
 #endif /* __ASSEMBLY__ */
 
-#endif /* __ARCH_SH_SRC_M16C_M16C_UART_H */
+#endif /* __ARCH_RENESAS_SRC_M16C_M16C_UART_H */
diff --git a/arch/sh/src/m16c/m16c_vectors.S b/arch/renesas/src/m16c/m16c_vectors.S
similarity index 99%
rename from arch/sh/src/m16c/m16c_vectors.S
rename to arch/renesas/src/m16c/m16c_vectors.S
index b59f179864f811adfe19d4402f19111a18fdaa4a..0925db3e4edabd8819e46155aa011fb785bf2b85 100644
--- a/arch/sh/src/m16c/m16c_vectors.S
+++ b/arch/renesas/src/m16c/m16c_vectors.S
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/sh/src/m16c/m16c_vectors.S
+ * arch/renesas/src/m16c/m16c_vectors.S
  *
  *	 Copyright (C) 2009 Gregory Nutt. All rights reserved.
  *	 Author: Gregory Nutt 
diff --git a/arch/sh/src/sh1/Kconfig b/arch/renesas/src/sh1/Kconfig
similarity index 100%
rename from arch/sh/src/sh1/Kconfig
rename to arch/renesas/src/sh1/Kconfig
diff --git a/arch/sh/src/sh1/Make.defs b/arch/renesas/src/sh1/Make.defs
similarity index 98%
rename from arch/sh/src/sh1/Make.defs
rename to arch/renesas/src/sh1/Make.defs
index 180034a72d26bf124d90e0df7f28e2305b2d6f42..adbfd361986ab7547d37a62677c44163a06ccce6 100644
--- a/arch/sh/src/sh1/Make.defs
+++ b/arch/renesas/src/sh1/Make.defs
@@ -1,5 +1,5 @@
 ##############################################################################
-# arch/sh/src/sh1/Make.defs
+# arch/renesas/src/sh1/Make.defs
 #
 #   Copyright (C) 2008, 2009, 2014 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
diff --git a/arch/sh/src/sh1/chip.h b/arch/renesas/src/sh1/chip.h
similarity index 95%
rename from arch/sh/src/sh1/chip.h
rename to arch/renesas/src/sh1/chip.h
index 490b20973e8d9b6864c08dec100d609f4480604b..4459bdcadb3a12b34872d442b1cc73752913ca17 100644
--- a/arch/sh/src/sh1/chip.h
+++ b/arch/renesas/src/sh1/chip.h
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/sh/src/sh1/chip.h
+ * arch/renesas/src/sh1/chip.h
  *
  *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_SH_SRC_SH1_CHIP_H
-#define __ARCH_SH_SRC_SH1_CHIP_H
+#ifndef __ARCH_RENESAS_SRC_SH1_CHIP_H
+#define __ARCH_RENESAS_SRC_SH1_CHIP_H
 
 /************************************************************************************
  * Included Files
@@ -71,4 +71,4 @@
  * Public Functions
  ************************************************************************************/
 
-#endif /* __ARCH_SH_SRC_SH1_CHIP_H */
+#endif /* __ARCH_RENESAS_SRC_SH1_CHIP_H */
diff --git a/arch/sh/src/sh1/sh1_703x.h b/arch/renesas/src/sh1/sh1_703x.h
similarity index 99%
rename from arch/sh/src/sh1/sh1_703x.h
rename to arch/renesas/src/sh1/sh1_703x.h
index 87f2c1bcd1749d16d2714c403a19c71ab8f9e42d..ba5ab4d627032ba3cab6e931e40012015f30957a 100644
--- a/arch/sh/src/sh1/sh1_703x.h
+++ b/arch/renesas/src/sh1/sh1_703x.h
@@ -1,5 +1,5 @@
 /************************************************************************************
- * arch/sh/src/sh1/sh1_703x.h
+ * arch/renesas/src/sh1/sh1_703x.h
  *
  *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_SH_SRC_SH1_703X_H
-#define __ARCH_SH_SRC_SH1_703X_H
+#ifndef __ARCH_RENESAS_SRC_SH1_703X_H
+#define __ARCH_RENESAS_SRC_SH1_703X_H
 
 /************************************************************************************
  * Included Files
@@ -459,7 +459,7 @@
  * Public Functions
  ************************************************************************************/
 
-#endif /* __ARCH_SH_SRC_SH1_703X_H */
+#endif /* __ARCH_RENESAS_SRC_SH1_703X_H */
 
 
 
diff --git a/arch/sh/src/sh1/sh1_copystate.c b/arch/renesas/src/sh1/sh1_copystate.c
similarity index 98%
rename from arch/sh/src/sh1/sh1_copystate.c
rename to arch/renesas/src/sh1/sh1_copystate.c
index 57fa2d463869126e8733d03102c468488fd739e4..8b2404ca2571d553d2107a8a4451a06d92358a3f 100644
--- a/arch/sh/src/sh1/sh1_copystate.c
+++ b/arch/renesas/src/sh1/sh1_copystate.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/sh1/up_copystate.c
+ * arch/renesas/src/sh1/up_copystate.c
  *
  *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sh/src/sh1/sh1_dumpstate.c b/arch/renesas/src/sh1/sh1_dumpstate.c
similarity index 80%
rename from arch/sh/src/sh1/sh1_dumpstate.c
rename to arch/renesas/src/sh1/sh1_dumpstate.c
index ad165c4d2c87cecc85f400d2b45193e108cab261..4609b4355915ca83ef9b34dfb231060dbe8cf87e 100644
--- a/arch/sh/src/sh1/sh1_dumpstate.c
+++ b/arch/renesas/src/sh1/sh1_dumpstate.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/sh/src/sh1/sh1_assert.c
+ * arch/renesas/src/sh1/sh1_assert.c
  *
- *   Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,13 +39,6 @@
 
 #include 
 
-/* Output debug info -- even if debug is not selected. */
-
-#undef  CONFIG_DEBUG
-#undef  CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
 #include 
 #include 
 
@@ -58,14 +51,6 @@
 
 #ifdef CONFIG_ARCH_STACKDUMP
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -99,7 +84,7 @@ static void sh1_stackdump(uint32_t sp, uint32_t stack_base)
   for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
     {
       uint32_t *ptr = (uint32_t*)stack;
-      lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+      _alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
              stack, ptr[0], ptr[1], ptr[2], ptr[3],
              ptr[4], ptr[5], ptr[6], ptr[7]);
     }
@@ -119,17 +104,17 @@ static inline void sh1_registerdump(void)
     {
       /* Yes.. dump the interrupt registers */
 
-      lldbg("PC: %08x SR=%08x\n",
+      _alert("PC: %08x SR=%08x\n",
             ptr[REG_PC], ptr[REG_SR]);
 
-      lldbg("PR: %08x GBR: %08x MACH: %08x MACL: %08x\n",
+      _alert("PR: %08x GBR: %08x MACH: %08x MACL: %08x\n",
             ptr[REG_PR], ptr[REG_GBR], ptr[REG_MACH], ptr[REG_MACL]);
 
-      lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", 0,
+      _alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", 0,
             ptr[REG_R0], ptr[REG_R1], ptr[REG_R2], ptr[REG_R3],
             ptr[REG_R4], ptr[REG_R5], ptr[REG_R6], ptr[REG_R7]);
 
-      lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", 8,
+      _alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", 8,
             ptr[REG_R8], ptr[REG_R9], ptr[REG_R10], ptr[REG_R11],
             ptr[REG_R12], ptr[REG_R13], ptr[REG_R14], ptr[REG_R15]);
     }
@@ -175,10 +160,10 @@ void up_dumpstate(void)
 
   /* Show interrupt stack info */
 
-  lldbg("sp:     %08x\n", sp);
-  lldbg("IRQ stack:\n");
-  lldbg("  base: %08x\n", istackbase);
-  lldbg("  size: %08x\n", istacksize);
+  _alert("sp:     %08x\n", sp);
+  _alert("IRQ stack:\n");
+  _alert("  base: %08x\n", istackbase);
+  _alert("  size: %08x\n", istacksize);
 
   /* Does the current stack pointer lie within the interrupt
    * stack?
@@ -195,18 +180,18 @@ void up_dumpstate(void)
        */
 
       sp = g_intstackbase;
-      lldbg("sp:     %08x\n", sp);
+      _alert("sp:     %08x\n", sp);
     }
 
   /* Show user stack info */
 
-  lldbg("User stack:\n");
-  lldbg("  base: %08x\n", ustackbase);
-  lldbg("  size: %08x\n", ustacksize);
+  _alert("User stack:\n");
+  _alert("  base: %08x\n", ustackbase);
+  _alert("  size: %08x\n", ustacksize);
 #else
-  lldbg("sp:         %08x\n", sp);
-  lldbg("stack base: %08x\n", ustackbase);
-  lldbg("stack size: %08x\n", ustacksize);
+  _alert("sp:         %08x\n", sp);
+  _alert("stack base: %08x\n", ustackbase);
+  _alert("stack size: %08x\n", ustacksize);
 #endif
 
   /* Dump the user stack if the stack pointer lies within the allocated user
@@ -216,7 +201,7 @@ void up_dumpstate(void)
   if (sp > ustackbase || sp <= ustackbase - ustacksize)
     {
 #if !defined(CONFIG_ARCH_INTERRUPTSTACK) || CONFIG_ARCH_INTERRUPTSTACK < 4
-      lldbg("ERROR: Stack pointer is not within allocated stack\n");
+      _alert("ERROR: Stack pointer is not within allocated stack\n");
 #endif
     }
   else
diff --git a/arch/sh/src/sh1/sh1_head.S b/arch/renesas/src/sh1/sh1_head.S
similarity index 99%
rename from arch/sh/src/sh1/sh1_head.S
rename to arch/renesas/src/sh1/sh1_head.S
index 9bb4efb1f5e17e6c4618b4d6fbc5ffda76d60f2d..695e0d865374bb0e18309c709c9eb0a0efe24486 100644
--- a/arch/sh/src/sh1/sh1_head.S
+++ b/arch/renesas/src/sh1/sh1_head.S
@@ -1,5 +1,5 @@
 /*****************************************************************************
- * arch/sh/src/sh1/sh1_head.S
+ * arch/renesas/src/sh1/sh1_head.S
  *
  *   Copyright (C) 2008-2009, 2012 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -67,7 +67,7 @@
 #ifdef CONFIG_ARCH_LEDS
 	.globl	_board_autoled_initialize	/* Boot LED setup */
 #endif
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 	.globl	_up_lowputc					/* Low-level debug output */
 #endif
 	.globl	_os_start					/* NuttX entry point */
@@ -161,7 +161,7 @@
  *****************************************************************************/
 
 	.macro	showprogress, code
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 	mov.l	.Llowputc, r0				/* Address of up_earlyconsoleinit */
 	jsr		@r0							/* Call it */
 	mov		#\code, r4					/* Delay slot */
@@ -488,7 +488,7 @@ __start0:
 #endif
 .Llowsetup:
 	.long	_up_lowsetup
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 .Llowputc:
 	.long	_up_lowputc
 #endif
diff --git a/arch/sh/src/sh1/sh1_initialstate.c b/arch/renesas/src/sh1/sh1_initialstate.c
similarity index 99%
rename from arch/sh/src/sh1/sh1_initialstate.c
rename to arch/renesas/src/sh1/sh1_initialstate.c
index 984829a370d3fb8f34ba4209028dfe0ffc365cfa..0575b0300f6d2faf06e5465a694b542059daed19 100644
--- a/arch/sh/src/sh1/sh1_initialstate.c
+++ b/arch/renesas/src/sh1/sh1_initialstate.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  arch/sh/src/sh1/sh1_initialstate.c
+ *  arch/renesas/src/sh1/sh1_initialstate.c
  *
  *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sh/src/sh1/sh1_irq.c b/arch/renesas/src/sh1/sh1_irq.c
similarity index 97%
rename from arch/sh/src/sh1/sh1_irq.c
rename to arch/renesas/src/sh1/sh1_irq.c
index 58514a257444c385621964b5dea0d6997c56f5d6..8fe7241c6076bb6b8636c23fae7c7f5cb0695e6c 100644
--- a/arch/sh/src/sh1/sh1_irq.c
+++ b/arch/renesas/src/sh1/sh1_irq.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/sh1/sh1_irq.c
+ * arch/renesas/src/sh1/sh1_irq.c
  *
  *   Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -92,10 +92,10 @@ void up_prioritize_irq(int irq, int priority)
   uint32_t reg;
   int      shift;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if ((unsigned) irq > NR_IRQS || (unsigned)priority > 15)
     {
-      dbg("Invalid parameters\n");
+      _err("ERROR: Invalid parameters\n");
       return;
     }
 #endif
@@ -260,7 +260,7 @@ void up_prioritize_irq(int irq, int priority)
 #endif
 
     default:
-      dbg("Invalid irq=%d\n", irq);
+      _err("ERROR: Invalid irq=%d\n", irq);
       return;
     }
 
diff --git a/arch/sh/src/sh1/sh1_lowputc.c b/arch/renesas/src/sh1/sh1_lowputc.c
similarity index 99%
rename from arch/sh/src/sh1/sh1_lowputc.c
rename to arch/renesas/src/sh1/sh1_lowputc.c
index 8b423b75b8f0030ab6264e53e980c55d83662490..b04612b7024b8d4e0c2ced16798228738b47a4f3 100644
--- a/arch/sh/src/sh1/sh1_lowputc.c
+++ b/arch/renesas/src/sh1/sh1_lowputc.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/sh1/sh1_lowputc.c
+ * arch/renesas/src/sh1/sh1_lowputc.c
  *
  *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sh/src/sh1/sh1_saveusercontext.S b/arch/renesas/src/sh1/sh1_saveusercontext.S
similarity index 99%
rename from arch/sh/src/sh1/sh1_saveusercontext.S
rename to arch/renesas/src/sh1/sh1_saveusercontext.S
index 8084e5bd0d8ccee59ed364d93abfc767c5de2bdd..e2fcebd7ef3a2ed6cf513f7f7a72a458c3629bf4 100644
--- a/arch/sh/src/sh1/sh1_saveusercontext.S
+++ b/arch/renesas/src/sh1/sh1_saveusercontext.S
@@ -1,5 +1,5 @@
 /**************************************************************************
- * arch/sh/src/sh1/sh1_saveusercontext.S
+ * arch/renesas/src/sh1/sh1_saveusercontext.S
  *
  *   Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sh/src/sh1/sh1_schedulesigaction.c b/arch/renesas/src/sh1/sh1_schedulesigaction.c
similarity index 97%
rename from arch/sh/src/sh1/sh1_schedulesigaction.c
rename to arch/renesas/src/sh1/sh1_schedulesigaction.c
index 4c6e7c16595cd8d5cba63d37dfac39ec7ef5566d..503272b5a95baa93364b000c010f33c1df18fc36 100644
--- a/arch/sh/src/sh1/sh1_schedulesigaction.c
+++ b/arch/renesas/src/sh1/sh1_schedulesigaction.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/sh1/sh1_schedulesigaction.c
+ * arch/renesas/src/sh1/sh1_schedulesigaction.c
  *
  *   Copyright (C) 2008-2010, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -93,7 +93,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
 {
   irqstate_t flags;
 
-  sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+  sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
 
   /* Make sure that interrupts are disabled */
 
@@ -107,7 +107,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
        * being delivered to the currently executing task.
        */
 
-      sdbg("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
+      sinfo("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
 
       if (tcb == this_task())
         {
diff --git a/arch/sh/src/sh1/sh1_serial.c b/arch/renesas/src/sh1/sh1_serial.c
similarity index 99%
rename from arch/sh/src/sh1/sh1_serial.c
rename to arch/renesas/src/sh1/sh1_serial.c
index 44c9cf8a93409e59f9a3dde7a5936f41646c8e8c..3dd5c1cff2bc9ab025c4f6a03ac70e11ef597bd1 100644
--- a/arch/sh/src/sh1/sh1_serial.c
+++ b/arch/renesas/src/sh1/sh1_serial.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sh/src/sh1/sh1_serial.c
+ * arch/renesas/src/sh1/sh1_serial.c
  *
  *   Copyright (C) 2008-2009, 2012 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -158,7 +158,7 @@ static int  up_setup(struct uart_dev_s *dev);
 static void up_shutdown(struct uart_dev_s *dev);
 static int  up_attach(struct uart_dev_s *dev);
 static void up_detach(struct uart_dev_s *dev);
-static int  up_interrupt(int irq, void *context);
+static int  up_interrupt(int irq, void *context, FAR void *arg);
 static int  up_receive(struct uart_dev_s *dev, uint32_t *status);
 static void up_rxint(struct uart_dev_s *dev, bool enable);
 static bool up_rxavailable(struct uart_dev_s *dev);
@@ -485,17 +485,17 @@ static int up_attach(struct uart_dev_s *dev)
 
   /* Attach the RDR full IRQ (RXI) that is enabled by the RIE SCR bit */
 
-  ret = irq_attach(priv->irq + SH1_RXI_IRQ_OFFSET, up_interrupt);
+  ret = irq_attach(priv->irq + SH1_RXI_IRQ_OFFSET, up_interrupt, NULL);
   if (ret == OK)
     {
       /* The RIE interrupt enable also enables the receive error interrupt (ERI) */
 
-      ret = irq_attach(priv->irq + SH1_ERI_IRQ_OFFSET, up_interrupt);
+      ret = irq_attach(priv->irq + SH1_ERI_IRQ_OFFSET, up_interrupt, NULL);
       if (ret == OK)
         {
           /* Attach the TDR empty IRQ (TXI) enabled by the TIE SCR bit */
 
-          ret = irq_attach(priv->irq + SH1_TXI_IRQ_OFFSET, up_interrupt);
+          ret = irq_attach(priv->irq + SH1_TXI_IRQ_OFFSET, up_interrupt, NULL);
           if (ret == OK)
             {
 #ifdef CONFIG_ARCH_IRQPRIO
@@ -567,7 +567,7 @@ static void up_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int up_interrupt(int irq, void *context)
+static int up_interrupt(int irq, void *context, FAR void *arg)
 {
   struct uart_dev_s *dev = NULL;
   struct up_dev_s   *priv;
diff --git a/arch/sh/src/sh1/sh1_sigdeliver.c b/arch/renesas/src/sh1/sh1_sigdeliver.c
similarity index 97%
rename from arch/sh/src/sh1/sh1_sigdeliver.c
rename to arch/renesas/src/sh1/sh1_sigdeliver.c
index eead3c06f256866b088bdbe85d497cc3e0a1ab52..8662cb47c5fe19da60be9a19002ebc0d01b55ca8 100644
--- a/arch/sh/src/sh1/sh1_sigdeliver.c
+++ b/arch/renesas/src/sh1/sh1_sigdeliver.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_sigdeliver.c
+ * arch/renesas/src/common/up_sigdeliver.c
  *
  *   Copyright (C) 2008-2010, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -95,7 +95,7 @@ void up_sigdeliver(void)
 
   board_autoled_on(LED_SIGNAL);
 
-  sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
         rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
   ASSERT(rtcb->xcp.sigdeliver != NULL);
 
@@ -127,7 +127,7 @@ void up_sigdeliver(void)
    * errno that is needed by the user logic (it is probably EINTR).
    */
 
-  sdbg("Resuming\n");
+  sinfo("Resuming\n");
   (void)up_irq_save();
   rtcb->pterrno = saved_errno;
 
diff --git a/arch/sh/src/sh1/sh1_timerisr.c b/arch/renesas/src/sh1/sh1_timerisr.c
similarity index 89%
rename from arch/sh/src/sh1/sh1_timerisr.c
rename to arch/renesas/src/sh1/sh1_timerisr.c
index 08647be112f7b77286142583c74b003f42fa2427..a1ec7d3a556468f21a685cf7c75bc3546299e15c 100644
--- a/arch/sh/src/sh1/sh1_timerisr.c
+++ b/arch/renesas/src/sh1/sh1_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/sh/src/sh1/sh1_timerisr.c
+ * arch/renesas/src/sh1/sh1_timerisr.c
  *
- *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -113,19 +113,11 @@
 #define TCNT_PER_TICK    ((TCNT_CLOCK + (CLK_TCK-1))/ CLK_TCK)
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  sh1_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -133,25 +125,29 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int sh1_timerisr(int irq, uint32_t *regs, void *arg)
 {
-   uint8_t reg8;
+  uint8_t reg8;
 
-   /* Process timer interrupt */
+  /* Process timer interrupt */
 
-   sched_process_timer();
+  sched_process_timer();
 
-   /* Clear ITU0 interrupt status flag */
+  /* Clear ITU0 interrupt status flag */
 
-   reg8 = getreg8(SH1_ITU0_TSR);
-   reg8 &= ~SH1_ITUTSR_IMFA;
-   putreg8(reg8, SH1_ITU0_TSR);
+  reg8 = getreg8(SH1_ITU0_TSR);
+  reg8 &= ~SH1_ITUTSR_IMFA;
+  putreg8(reg8, SH1_ITU0_TSR);
 
-   return 0;
+  return 0;
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  renesas_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -159,7 +155,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void renesas_timer_initialize(void)
 {
   uint8_t reg8;
 
@@ -187,7 +183,7 @@ void up_timer_initialize(void)
 
   /* Attach the IMIA0 IRQ */
 
-  irq_attach(SH1_SYSTIMER_IRQ, (xcpt_t)up_timerisr);
+  irq_attach(SH1_SYSTIMER_IRQ, (xcpt_t)sh1_timerisr, NULL);
 
   /* Enable interrupts on GRA compare match */
 
diff --git a/arch/sh/src/sh1/sh1_vector.S b/arch/renesas/src/sh1/sh1_vector.S
similarity index 99%
rename from arch/sh/src/sh1/sh1_vector.S
rename to arch/renesas/src/sh1/sh1_vector.S
index 396e33cd2761b95ae6e76172c391b87f7fc69c31..78ec75f310c3279ca63aa84ed6ab8911a9e8e6eb 100644
--- a/arch/sh/src/sh1/sh1_vector.S
+++ b/arch/renesas/src/sh1/sh1_vector.S
@@ -1,5 +1,5 @@
 /*****************************************************************************
- * arch/sh/src/sh1/sh1_vector.S
+ * arch/renesas/src/sh1/sh1_vector.S
  *
  *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/rgmp/Kconfig b/arch/rgmp/Kconfig
deleted file mode 100644
index 690f88e6145f028ed9fcbefcbfeb5b61e4096021..0000000000000000000000000000000000000000
--- a/arch/rgmp/Kconfig
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# For a description of the syntax of this configuration file,
-# see the file kconfig-language.txt in the NuttX tools repository.
-#
-
-if ARCH_RGMP
-comment "RGMP Configuration Options"
-
-choice
-	prompt "RGMP Architecture"
-	default RGMP_SUBARCH_X86
-
-config RGMP_SUBARCH_ARM
-	bool "ARM"
-	---help---
-		RGMP ARM architecture"
-
-config RGMP_SUBARCH_X86
-	bool "x86"
-	---help---
-		RGMP x86 architecture"
-
-endchoice # RGMP Architecture
-
-config RGMP_SUBARCH
-	string
-	default "arm"		if RGMP_SUBARCH_ARM
-	default "x86"		if RGMP_SUBARCH_X86
-
-menu "x86 Peripheral Selections"
-	depends on RGMP_SUBARCH_X86
-
-config COM1
-	bool "COM1"
-
-config COM2
-	bool "COM1"
-
-config COM3
-	bool "COM1"
-
-config COM4
-	bool "COM1"
-
-endmenu # x86 Peripheral Selections
-endif # ARCH_RGMP
diff --git a/arch/rgmp/include/irq.h b/arch/rgmp/include/irq.h
deleted file mode 100644
index b4c4f37d2d03741bdfd1023b8c3ad35a0cbf6271..0000000000000000000000000000000000000000
--- a/arch/rgmp/include/irq.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/****************************************************************************
- * arch/rgmp/include/irq.h
- *
- *   Copyright (C) 2011 Yu Qiang. All rights reserved.
- *   Author: Yu Qiang 
- *
- * This file is a part of NuttX:
- *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#ifndef __ARCH_RGMP_INCLUDE_IRQ_H
-#define __ARCH_RGMP_INCLUDE_IRQ_H
-
-#define NR_IRQS  0
-
-#ifndef __ASSEMBLY__
-
-#include 
-
-#include 
-#include 
-
-struct xcptcontext
-{
-  struct rgmp_context ctx;
-
-  /* For signal using */
-
-  unsigned int save_eip;
-  unsigned int save_eflags;
-  void *sigdeliver;
-};
-
-void push_xcptcontext(struct xcptcontext *xcp);
-void pop_xcptcontext(struct xcptcontext *xcp);
-
-extern int nest_irq;
-
-/* Name: up_irq_save, up_irq_restore, and friends.
- *
- * NOTE: This function should never be called from application code and,
- * as a general rule unless you really know what you are doing, this
- * function should not be called directly from operation system code either:
- * Typically, the wrapper functions, enter_critical_section() and
- * leave_critical section(), are probably what you really want.
- */
-
-static inline irqstate_t up_irq_save(void)
-{
-  unsigned long flags;
-  local_irq_save(flags);
-  return flags;
-}
-
-static inline void up_irq_restore(irqstate_t flags)
-{
-  local_irq_restore(flags);
-}
-
-#endif /* !__ASSEMBLY__ */
-
-#endif
diff --git a/arch/rgmp/include/math.h b/arch/rgmp/include/math.h
deleted file mode 100644
index e042ba4a3c50c30105d660229360df5c8f286dfe..0000000000000000000000000000000000000000
--- a/arch/rgmp/include/math.h
+++ /dev/null
@@ -1,260 +0,0 @@
-/****************************************************************************
- * arch/rgmp/include/math.h
- *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#ifndef __ARCH_RGMP_INCLUDE_MATH_H
-#define __ARCH_RGMP_INCLUDE_MATH_H
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-/****************************************************************************
- * Type Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Public Function Prototypes
- ****************************************************************************/
-
-#ifdef __cplusplus
-#define EXTERN extern "C"
-extern "C"
-{
-#else
-#define EXTERN extern
-#endif
-
-#include 
-
-// following functions are not implemented by RGMP math library
-// don't use them
-// declared here for cmath
-
-/* General Functions ********************************************************/
-
-float       ceilf (float x);
-#ifdef CONFIG_HAVE_DOUBLE
-//double      ceil  (double x);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double ceill (long double x);
-#endif
-
-float       floorf(float x);
-#ifdef CONFIG_HAVE_DOUBLE
-//double      floor (double x);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double floorl(long double x);
-#endif
-
-float       fabsf (float x);
-#ifdef CONFIG_HAVE_DOUBLE
-//double      fabs  (double x);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double fabsl (long double x);
-#endif
-
-float       modff (float x, float *iptr);
-#ifdef CONFIG_HAVE_DOUBLE
-//double      modf  (double x, double *iptr);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double modfl (long double x, long double *iptr);
-#endif
-
-float       fmodf (float x, float div);
-#ifdef CONFIG_HAVE_DOUBLE
-//double      fmod  (double x, double div);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double fmodl (long double x, long double div);
-#endif
-
-/* Exponential and Logarithmic Functions ************************************/
-
-float       powf  (float b, float e);
-#ifdef CONFIG_HAVE_DOUBLE
-//double      pow   (double b, double e);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double powl  (long double b, long double e);
-#endif
-
-float       expf  (float x);
-#ifdef CONFIG_HAVE_DOUBLE
-//double      exp   (double x);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double expl  (long double x);
-#endif
-
-float       logf  (float x);
-#ifdef CONFIG_HAVE_DOUBLE
-//double      log   (double x);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double logl  (long double x);
-#endif
-
-float       log10f(float x);
-#ifdef CONFIG_HAVE_DOUBLE
-//double      log10 (double x);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double log10l(long double x);
-#endif
-
-float       log2f (float x);
-#ifdef CONFIG_HAVE_DOUBLE
-//double      log2  (double x);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double log2l (long double x);
-#endif
-
-float       sqrtf (float x);
-#ifdef CONFIG_HAVE_DOUBLE
-//double      sqrt  (double x);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double sqrtl (long double x);
-#endif
-
-float       ldexpf(float x, int n);
-#ifdef CONFIG_HAVE_DOUBLE
-double      ldexp (double x, int n);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double ldexpl(long double x, int n);
-#endif
-
-float       frexpf(float x, int *exp);
-#ifdef CONFIG_HAVE_DOUBLE
-double      frexp (double x, int *exp);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double frexpl(long double x, int *exp);
-#endif
-
-/* Trigonometric Functions **************************************************/
-
-float       sinf  (float x);
-#ifdef CONFIG_HAVE_DOUBLE
-//double      sin   (double x);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double sinl  (long double x);
-#endif
-
-float       cosf  (float x);
-#ifdef CONFIG_HAVE_DOUBLE
-//double      cos   (double x);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double cosl  (long double x);
-#endif
-
-float       tanf  (float x);
-#ifdef CONFIG_HAVE_DOUBLE
-//double      tan   (double x);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double tanl  (long double x);
-#endif
-
-float       asinf (float x);
-#ifdef CONFIG_HAVE_DOUBLE
-//double      asin  (double x);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double asinl (long double x);
-#endif
-
-float       acosf (float x);
-#ifdef CONFIG_HAVE_DOUBLE
-//double      acos  (double x);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double acosl (long double x);
-#endif
-
-float       atanf (float x);
-#ifdef CONFIG_HAVE_DOUBLE
-//double      atan  (double x);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double atanl (long double x);
-#endif
-
-float       atan2f(float y, float x);
-#ifdef CONFIG_HAVE_DOUBLE
-//double      atan2 (double y, double x);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double atan2l(long double y, long double x);
-#endif
-
-float       sinhf (float x);
-#ifdef CONFIG_HAVE_DOUBLE
-//double      sinh  (double x);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double sinhl (long double x);
-#endif
-
-float       coshf (float x);
-#ifdef CONFIG_HAVE_DOUBLE
-//double      cosh  (double x);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double coshl (long double x);
-#endif
-
-float       tanhf (float x);
-#ifdef CONFIG_HAVE_DOUBLE
-//double      tanh  (double x);
-#endif
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double tanhl (long double x);
-#endif
-
-#undef EXTERN
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __ARCH_RGMP_INCLUDE_MATH_H */
diff --git a/arch/rgmp/include/stdbool.h b/arch/rgmp/include/stdbool.h
deleted file mode 100644
index eb1bee1adb82a3597c09bcc59eae33a02c534083..0000000000000000000000000000000000000000
--- a/arch/rgmp/include/stdbool.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/****************************************************************************
- * arch/rgmp/include/stdbool.h
- *
- *   Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#ifndef __ARCH_RGMP_INCLUDE_STDBOOL_H
-#define __ARCH_RGMP_INCLUDE_STDBOOL_H
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include 
-#include 
-
-#include 
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* bool, true, and false must be provided as macros so that they can be
- * redefined by the application if necessary.
- *
- * NOTE: Under C99 'bool' is required to be defined to be the intrinsic type
- * _Bool.  However, in this NuttX context, we need backward compatibility
- * to pre-C99 standards where _Bool is not an intrinsic type.  Hence, we
- * use _Bool8 as the underlying type.
- */
-
-#define true  1
-#define false 0
-
-#define __bool_true_false_are_defined 1
-
-/****************************************************************************
- * Public Types
- ****************************************************************************/
-
-/* A byte is the smallest address memory element (at least in architectures
- * that do not support bit banding).  The requirement is only that type _Bool
- * be large enough to hold the values 0 and 1.  We select uint8_t to minimize
- * the RAM footprint of the executable.
- *
- * NOTE: We can't actually define the type _Bool here.  Under C99 _Bool is
- * an intrinsic type and cannot be the target of a typedef.  However, in this
- * NuttX context, we also need backward compatibility to pre-C99 standards
- * where _Bool is not an intrinsic type.  We work around this by using _Bool8
- * as the underlying type.
- */
-
-typedef uint8_t _Bool8;
-
-#endif /* __ARCH_RGMP_INCLUDE_STDBOOL_H */
diff --git a/arch/rgmp/include/stdint.h b/arch/rgmp/include/stdint.h
deleted file mode 100644
index 07b9ffdeeb2d5d45e94daca6f34dc84ee1a27b33..0000000000000000000000000000000000000000
--- a/arch/rgmp/include/stdint.h
+++ /dev/null
@@ -1,277 +0,0 @@
-/****************************************************************************
- * arch/rgmp/include/stdint.h
- *
- *   Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#ifndef __ARCH_RGMP_INCLUDE_STDINTL_H
-#define __ARCH_RGMP_INCLUDE_STDINTL_H
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include 
-#include 
-
-#include 
-#include 
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* Limits of exact-width integer types */
-
-#define INT8_MIN            0x80
-#define INT8_MAX            0x7f
-#define UINT8_MAX           0xff
-
-#define INT16_MIN           0x8000
-#define INT16_MAX           0x7fff
-#define UINT16_MAX          0xffff
-
-#ifdef __INT64_DEFINED
-#  define INT24_MIN         0x800000
-#  define INT24_MAX         0x7fffff
-#  define UINT24_MAX        0xffffff
-#endif
-
-#define INT32_MIN           0x80000000
-#define INT32_MAX           0x7fffffff
-#define UINT32_MAX          0xffffffff
-
-#ifdef __INT64_DEFINED
-#  define INT64_MIN         0x8000000000000000
-#  define INT64_MAX         0x7fffffffffffffff
-#  define UINT64_MAX        0xffffffffffffffff
-#endif
-
-/* Limits of minimum-width integer types */
-
-#define INT8_LEASTN_MIN     0x80
-#define INT8_LEASTN_MAX     0x7f
-#define UINT8_LEASTN_MAX    0xff
-
-#define INT16_LEASTN_MIN    0x8000
-#define INT16_LEASTN_MAX    0x7fff
-#define UINT16_LEASTN_MAX   0xffff
-
-#ifdef __INT64_DEFINED
-#  define INT24_LEASTN_MIN  0x800000
-#  define INT24_LEASTN_MAX  0x7fffff
-#  define UINT24_LEASTN_MAX 0xffffff
-#endif
-
-#define INT32_LEASTN_MIN    0x80000000
-#define INT32_LEASTN_MAX    0x7fffffff
-#define UINT32_LEASTN_MAX   0xffffffff
-
-#ifdef __INT64_DEFINED
-#  define INT64_LEASTN_MIN  0x8000000000000000
-#  define INT64_LEASTN_MAX  0x7fffffffffffffff
-#  define UINT64_LEASTN_MAX 0xffffffffffffffff
-#endif
-
-/* Limits of fastest minimum-width integer types */
-
-#define INT8_FASTN_MIN      0x80
-#define INT8_FASTN_MAX      0x7f
-#define UINT8_FASTN_MAX     0xff
-
-#define INT16_FASTN_MIN     0x8000
-#define INT16_FASTN_MAX     0x7fff
-#define UINT16_FASTN_MAX    0xffff
-
-#ifdef __INT64_DEFINED
-#  define INT24_FASTN_MIN   0x800000
-#  define INT24_FASTN_MAX   0x7fffff
-#  define UINT24_FASTN_MAX  0xffffff
-#endif
-
-#define INT32_FASTN_MIN     0x80000000
-#define INT32_FASTN_MAX     0x7fffffff
-#define UINT32_FASTN_MAX    0xffffffff
-
-#ifdef __INT64_DEFINED
-#  define INT64_FASTN_MIN   0x8000000000000000
-#  define INT64_FASTN_MAX   0x7fffffffffffffff
-#  define UINT64_FASTN_MAX  0xffffffffffffffff
-#endif
-
-/* Limits of integer types capable of holding object pointers */
-
-#define INTPTR_MIN          PTR_MIN
-#define INTPTR_MAX          PTR_MIN
-#define UINTPTR_MAX         UPTR_MAX
-
-/* Limits of greatest-width integer types */
-
-#ifdef __INT64_DEFINED
-#  define INTMAX_MIN        INT64_MIN
-#  define INTMAX_MAX        INT64_MAX
-
-#  define UINTMAX_MIN       UINT64_MIN
-#  define UINTMAX_MAX       UINT64_MAX
-#else
-#  define INTMAX_MIN        INT32_MIN
-#  define INTMAX_MAX        INT32_MAX
-
-#  define UINTMAX_MIN       UINT32_MIN
-#  define UINTMAX_MAX       UINT32_MAX
-#endif
-
-/* Macros for minimum-width integer constant expressions */
-
-#if 0 /* REVISIT: Depends on architecture specific implementation */
-#define INT8_C(x) x
-#define INT16_C(x) x
-#define INT32_C(x) x ## L
-#define INT64_C(x) x ## LL
-
-#define UINT8_C(x) x
-#define UINT16_C(x) x
-#define UINT32_C(x) x ## UL
-#define UINT64_C(x) x ## ULL
-#endif
-
-/* Macros for greatest-width integer constant expressions
-
-#ifdef CONFIG_HAVE_LONG_LONG
-#  define INTMAX_C(x) x ## LL
-#  define UINTMAX_C(x) x ## ULL
-#else
-#  define INTMAX_C(x) x ## L
-#  define UINTMAX_C(x) x ## UL
-#endif
-
-/* Limits of Other Integer Types */
-
-#if 0
-#  define PTRDIFF_MIN
-#  define PTRDIFF_MAX
-#endif
-
-#ifdef CONFIG_SMALL_MEMORY
-#  define SIZE_MAX 0xffff
-#else
-#  define SIZE_MAX 0xffffffff
-#endif
-
-#if 0
-#  define WCHAR_MIN
-#  define WCHAR_MAX
-
-#  define WINT_MIN
-#  define WINT_MAX
-#endif
-
-/****************************************************************************
- * Public Types
- ****************************************************************************/
-
-/* Exact-width integer types.  NOTE that these types are defined in
- * architecture-specific logic with leading underscore character. This file
- * typedef's these to the final name without the underscore character.  This
- * roundabout way of doings things allows the stdint.h to be removed from the
- * include/ directory in the event that the user prefers to use the definitions
- * provided by their toolchain header files.
- */
-
-#include 
-
-/* Minimum-width integer types */
-
-typedef _int8_t      int_least8_t;
-typedef _uint8_t     uint_least8_t;
-
-typedef _int16_t     int_least16_t;
-typedef _uint16_t    uint_least16_t;
-
-#ifdef __INT24_DEFINED
-typedef _int24_t     int_least24_t;
-typedef _uint24_t    uint_least24_t;
-#else
-typedef _int32_t     int_least24_t;
-typedef _uint32_t    uint_least24_t;
-#endif
-
-typedef _int32_t     int_least32_t;
-typedef _uint32_t    uint_least32_t;
-
-#ifdef __INT64_DEFINED
-typedef _int64_t     int_least64_t;
-typedef _uint64_t    uint_least64_t;
-#endif
-
-/* Fastest minimum-width integer types */
-
-typedef _int8_t      int_fast8_t;
-typedef _uint8_t     uint_fast8_t;
-
-typedef int          int_fast16_t;
-typedef unsigned int uint_fast16_t;
-
-#ifdef __INT24_DEFINED
-typedef _int24_t     int_fast24_t;
-typedef _uint24_t    uint_fast24_t;
-#else
-typedef _int32_t     int_fast24_t;
-typedef _uint32_t    uint_fast24_t;
-#endif
-
-typedef _int32_t     int_fast32_t;
-typedef _uint32_t    uint_fast32_t;
-
-#ifdef __INT64_DEFINED
-typedef _int64_t     int_fast64_t;
-typedef _uint64_t    uint_fast64_t;
-#endif
-
-/* Integer types capable of holding object pointers */
-
-#ifndef CONFIG_ARCH_RGMP
-typedef _intptr_t    intptr_t;
-typedef _uintptr_t   uintptr_t;
-#endif
-
-/* Greatest-width integer types */
-
-#ifdef __INT64_DEFINED
-typedef _int64_t     intmax_t;
-typedef _uint64_t    uintmax_t;
-#else
-typedef _int32_t     intmax_t;
-typedef _uint32_t    uintmax_t;
-#endif
-
-#endif /* __ARCH_RGMP_INCLUDE_STDINTL_H */
diff --git a/arch/rgmp/include/x86/arch/com.h b/arch/rgmp/include/x86/arch/com.h
deleted file mode 100644
index 89df901bb3cfd66737eb79d906488ad03c7f128f..0000000000000000000000000000000000000000
--- a/arch/rgmp/include/x86/arch/com.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/****************************************************************************
- * arch/rgmp/include/com.h
- *
- *   Copyright (C) 2011 Yu Qiang. All rights reserved.
- *   Author: Yu Qiang 
- *
- * This file is a part of NuttX:
- *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#ifndef __ARCH_RGMP_INCLUDE_COM_H
-#define __ARCH_RGMP_INCLUDE_COM_H
-
-#define COM_SET_BAUD         1
-#define COM_SET_PARITY       2
-#define   COM_NO_PARITY      0
-#define   COM_ODD_PARITY     1
-#define   COM_EVEN_PARITY    3
-#define COM_SET_STOPBITS     3
-#define   COM_ONE_STOPBITS   0
-#define   COM_TWO_STOPBITS   1
-#define COM_SET_BITS         4
-#define   COM_8_BITS         3
-#define   COM_7_BITS         2
-#define   COM_6_BITS         1
-#define   COM_5_BITS         0
-
-
-#endif
diff --git a/arch/rgmp/include/x86/arch/subarch/arch.h b/arch/rgmp/include/x86/arch/subarch/arch.h
deleted file mode 100644
index b88cb34155c37963d22e366ecbcda86fdf525ae9..0000000000000000000000000000000000000000
--- a/arch/rgmp/include/x86/arch/subarch/arch.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/****************************************************************************
- * arch/rgmp/include/x86/arch/subarch/arch.h
- *
- *   Copyright (C) 2011 Yu Qiang. All rights reserved.
- *   Author: Yu Qiang 
- *
- * This file is a part of NuttX:
- *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#ifndef __RGMP_ARCH_SUBARCH_ARCH_H
-#define __RGMP_ARCH_SUBARCH_ARCH_H
-
-#ifndef __ASSEMBLY__
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-#include 
-
-static inline void up_mdelay(uint32_t msec)
-{
-    hpet_ndelay(msec*1000000);
-}
-
-static inline void up_udelay(uint32_t usec)
-{
-    hpet_ndelay(usec*1000);
-}
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* !__ASSEMBLY__ */
-
-#endif
diff --git a/arch/rgmp/src/Makefile b/arch/rgmp/src/Makefile
deleted file mode 100644
index 4fe3bbfbfd97782b1eb9413f13c3ca2d41d56d1f..0000000000000000000000000000000000000000
--- a/arch/rgmp/src/Makefile
+++ /dev/null
@@ -1,116 +0,0 @@
-############################################################################
-# arch/rgmp/src/Makefile
-#
-#   Copyright (C) 2011-2012, 2014, 2016 Gregory Nutt. All rights reserved.
-#   Author: Gregory Nutt 
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name NuttX nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-############################################################################
-
--include $(TOPDIR)/Make.defs
-include $(CONFIG_RGMP_SUBARCH)/Make.defs
-
-RGMP_ARCH_ASRCS := $(addprefix $(CONFIG_RGMP_SUBARCH)/,$(RGMP_ARCH_ASRCS))
-RGMP_ARCH_CSRCS := $(addprefix $(CONFIG_RGMP_SUBARCH)/,$(RGMP_ARCH_CSRCS))
-
-CPPFLAGS += -I$(TOPDIR)/sched -I$(TOPDIR)/fs $(EXTRADEFINES)
-CFLAGS += -I$(TOPDIR)/sched -I$(TOPDIR)/fs $(EXTRADEFINES)
-CXXFLAGS += -I$(TOPDIR)/sched -I$(TOPDIR)/fs $(EXTRADEFINES)
-
-ASRCS = $(RGMP_ARCH_ASRCS)
-CSRCS = nuttx.c cxx.c $(RGMP_ARCH_CSRCS)
-AOBJS = $(ASRCS:.S=$(OBJEXT))
-COBJS = $(CSRCS:.c=$(OBJEXT))
-
-SRCS = $(ASRCS) $(CSRCS)
-OBJS = $(AOBJS) $(COBJS)
-
-LINKSRCS = rgmp.c bridge.c
-LINKOBJS = $(LINKSRCS:.c=$(OBJEXT))
-
-# Override in Make.defs if linker is not 'ld'
-
-LDSTARTGROUP ?= --start-group
-LDENDGROUP ?= --end-group
-
-LDFLAGS += -T$(RGMPLKSCPT)
-LDLIBS = $(patsubst %.a,%,$(patsubst lib%,-l%,$(LINKLIBS)))
-LIBPATHS += -L"$(TOPDIR)/lib" -L$(RGMPLIBDIR)
-LDLIBS += -lrgmp $(shell "$(CC)" -print-libgcc-file-name)
-
-all: libarch$(LIBEXT)
-
-.PHONY: clean distclean depend
-
-$(AOBJS): %$(OBJEXT): %.S
-	$(call ASSEMBLE, $<, $@)
-
-$(COBJS) $(LINKOBJS): %$(OBJEXT): %.c
-	$(call COMPILE, $<, $@)
-
-# The architecture-specific library
-
-libarch$(LIBEXT): $(OBJS)
-	$(call ARCHIVE, $@, $(OBJS))
-
-# Generate the final NuttX binary by linking the host-specific objects with the NuttX
-# specific objects (with munged names)
-
-nuttx$(EXEEXT): $(LINKOBJS)
-	@echo "LD:  nuttx$(EXEEXT)"
-	@$(LD) $(LDFLAGS) $(LIBPATHS) $(LINKOBJS) $(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LDENDGROUP) -o $(TOPDIR)/$@
-	@$(OBJDUMP) -S $(TOPDIR)/$@ > $(TOPDIR)/nuttx.asm
-	@$(NM) -n $(TOPDIR)/$@ > $(TOPDIR)/nuttx.sym
-	@$(OBJCOPY) -S -O binary $(TOPDIR)/$@ nuttx.img
-	@cp nuttx.img $(TOPDIR)/kernel.img
-
-# This is part of the top-level export target
-
-expport_startup:
-
-# Dependencies
-
-.depend: Makefile $(SRCS) $(LINKSRCS)
-	@$(MKDEP) "$(CC)" -- $(CFLAGS) -- $(SRCS) $(LINKSRCS) >Make.dep
-	@touch $@
-
-depend: .depend
-
-clean:
-	$(call DELFILE, "$(TOPDIR)/arch/rgmp/src/x86/*.o")
-	$(call DELFILE, "$(TOPDIR)/kernel.img")
-	$(call DELFILE, nuttx.img)
-	$(call DELFILE, libarch$(LIBEXT))
-	$(call CLEAN)
-
-distclean: clean
-	$(call DELFILE, Make.dep)
-	$(call DELFILE, .depend)
-
--include Make.dep
diff --git a/arch/rgmp/src/arm/Make.defs b/arch/rgmp/src/arm/Make.defs
deleted file mode 100644
index e21b046e8933a4f20f3f43a1062c22871ca804aa..0000000000000000000000000000000000000000
--- a/arch/rgmp/src/arm/Make.defs
+++ /dev/null
@@ -1,42 +0,0 @@
-############################################################################
-# rgmp/arm/Make.defs
-#
-#   Copyright (C) 2011 Yu Qiang. All rights reserved.
-#   Author: Yu Qiang 
-#
-# This file is a part of NuttX:
-#
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
-#
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name Gregory Nutt nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-############################################################################
-
-RGMP_ARCH_ASRCS = sigentry.S
-RGMP_ARCH_CSRCS = arch_nuttx.c
diff --git a/arch/rgmp/src/arm/arch_nuttx.c b/arch/rgmp/src/arm/arch_nuttx.c
deleted file mode 100644
index dd737946d9d146ca883bd4c86141de358bcff6ad..0000000000000000000000000000000000000000
--- a/arch/rgmp/src/arm/arch_nuttx.c
+++ /dev/null
@@ -1,89 +0,0 @@
-/****************************************************************************
- * arch/rgmp/src/arm/arch_nuttx.c
- *
- *   Copyright (C) 2011 Yu Qiang. All rights reserved.
- *   Author: Yu Qiang 
- *
- * This file is a part of NuttX:
- *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#include 
-#include 
-
-#include 
-#include 
-
-void nuttx_arch_init(void)
-{
-}
-
-void nuttx_arch_exit(void)
-{
-}
-
-void up_initial_state(struct tcb_s *tcb)
-{
-  struct Trapframe *tf;
-
-  if (tcb->pid != 0)
-    {
-      tf = (struct Trapframe *)tcb->adj_stack_ptr-1;
-      memset(tf, 0, sizeof(struct Trapframe));
-      tf->tf_cpsr = SVC_MOD;
-      tf->tf_pc = (uint32_t)tcb->start;
-      tcb->xcp.tf = tf;
-    }
-}
-
-void push_xcptcontext(struct xcptcontext *xcp)
-{
-  xcp->save_eip = xcp->tf->tf_pc;
-  xcp->save_eflags = xcp->tf->tf_cpsr;
-
-  // set  interrupts disabled
-
-  xcp->tf->tf_pc = (uint32_t)up_sigentry;
-  xcp->tf->tf_cpsr |= CPSR_IF;
-}
-
-void pop_xcptcontext(struct xcptcontext *xcp)
-{
-    xcp->tf->tf_pc = xcp->save_eip;
-    xcp->tf->tf_cpsr = xcp->save_eflags;
-}
-
-void raise(void)
-{
-
-}
-
diff --git a/arch/rgmp/src/bridge.c b/arch/rgmp/src/bridge.c
deleted file mode 100644
index 46f45a8f59322934b1bdda5c3b91378f0b48d98d..0000000000000000000000000000000000000000
--- a/arch/rgmp/src/bridge.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/****************************************************************************
- * arch/rgmp/src/bridge.c
- *
- *   Copyright (C) 2011 Yu Qiang. All rights reserved.
- *   Author: Yu Qiang 
- *
- * This file is a part of NuttX:
- *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#include 
-#include 
-#include 
-#include 
-#include "inode/inode.h"
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-struct bridge
-{
-  struct rgmp_bridge *b;
-  sem_t rd_lock;
-  sem_t wr_lock;
-};
-
-static ssize_t up_bridge_read(struct file *filep, char *buffer, size_t len)
-{
-  ssize_t ret;
-  struct bridge *b = filep->f_inode->i_private;
-
-  sem_wait(&b->rd_lock);
-  ret = rgmp_bridge_read(b->b, buffer, len, 0);
-  sem_post(&b->rd_lock);
-  return ret;
-}
-
-static ssize_t up_bridge_write(struct file *filep, const char *buffer, size_t len)
-{
-  ssize_t ret;
-  struct bridge *b = filep->f_inode->i_private;
-
-  sem_wait(&b->wr_lock);
-  ret = rgmp_bridge_write(b->b, (char *)buffer, len, 0);
-  sem_post(&b->wr_lock);
-  return ret;
-}
-
-static int up_bridge_open(struct file *filep)
-{
-  return 0;
-}
-
-static int up_bridge_close(struct file *filep)
-{
-  return 0;
-}
-
-static const struct file_operations up_bridge_fops =
-{
-  .read = up_bridge_read,
-  .write = up_bridge_write,
-  .open = up_bridge_open,
-  .close = up_bridge_close,
-};
-
-int rtos_bridge_init(struct rgmp_bridge *b)
-{
-  int err;
-  struct bridge *bridge;
-  char path[30] = {'/', 'd', 'e', 'v', '/'};
-
-  if ((bridge = kmm_malloc(sizeof(*bridge))) == NULL)
-    goto err0;
-
-  bridge->b = b;
-  if ((err = sem_init(&bridge->rd_lock, 0, 1)) == ERROR)
-    goto err1;
-
-  if ((err = sem_init(&bridge->wr_lock, 0, 1)) == ERROR)
-    goto err1;
-
-  // make rgmp_bridge0 to be the console
-
-  if (strcmp(b->vdev->name, "rgmp_bridge0") == 0)
-      strlcpy(path + 5, "console", 25);
-  else
-      strlcpy(path + 5, b->vdev->name, 25);
-
-  if ((err = register_driver(path, &up_bridge_fops, 0666, bridge)) == ERROR)
-    {
-      cprintf("NuttX: register bridge %s fail\n", b->vdev->name);
-      goto err1;
-    }
-
-  return 0;
-
-err1:
-  kmm_free(bridge);
-err0:
-  return -1;
-}
diff --git a/arch/rgmp/src/cxx.c b/arch/rgmp/src/cxx.c
deleted file mode 100644
index 8dfc6a697bf4803deec01fc204215644df02b259..0000000000000000000000000000000000000000
--- a/arch/rgmp/src/cxx.c
+++ /dev/null
@@ -1,19 +0,0 @@
-#include 
-#include 
-
-int stderr = 2;
-
-void __stack_chk_fail_local(void)
-{
-  panic("stack check fail\n");
-}
-
-int __sprintf_chk(char *str, int flag, size_t strlen, const char *format)
-{
-  return snprintf(str, strlen, format);
-}
-
-int dl_iterate_phdr(void* arg1, void* arg2)
-{
-  return -1;
-}
diff --git a/arch/rgmp/src/nuttx.c b/arch/rgmp/src/nuttx.c
deleted file mode 100644
index 0832e8f9ec03f75860dd9e8f0001b7b2c5382329..0000000000000000000000000000000000000000
--- a/arch/rgmp/src/nuttx.c
+++ /dev/null
@@ -1,676 +0,0 @@
-/****************************************************************************
- * arch/rgmp/src/nuttx.c
- *
- *   Copyright (C) 2011 Yu Qiang. All rights reserved.
- *   Author: Yu Qiang 
- *
- * This file is a part of NuttX:
- *
- *   Copyright (C) 2011, 2014 Gregory Nutt. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include "task/task.h"
-#include "sched/sched.h"
-#include "group/group.h"
-
-struct tcb_s *current_task = NULL;
-
-/* This function is called in non-interrupt context
- * to switch tasks.
- * Assumption: global interrupt is disabled.
- */
-
-static inline void up_switchcontext(struct tcb_s *ctcb, struct tcb_s *ntcb)
-{
-  // do nothing if two tasks are the same
-
-  if (ctcb == ntcb)
-    return;
-
-  // this function can not be called in interrupt
-
-  if (up_interrupt_context()) {
-     panic("%s: try to switch context in interrupt\n", __func__);
-  }
-
-  // start switch
-
-  current_task = ntcb;
-  rgmp_context_switch(ctcb ? &ctcb->xcp.ctx : NULL, &ntcb->xcp.ctx);
-}
-
-void up_initialize(void)
-{
-    extern pidhash_t g_pidhash[];
-    extern void vdev_init(void);
-    extern void nuttx_arch_init(void);
-
-    // initialize the current_task to g_idletcb
-    current_task = g_pidhash[PIDHASH(0)].tcb;
-
-    // OS memory alloc system is ready
-    use_os_kmalloc = 1;
-
-    // rgmp vdev init
-    vdev_init();
-
-    nuttx_arch_init();
-
-    // enable interrupt
-    local_irq_enable();
-}
-
-void up_idle(void)
-{
-    arch_hlt();
-}
-
-void up_allocate_heap(void **heap_start, size_t *heap_size)
-{
-    void *boot_freemem = boot_alloc(0, sizeof(int));
-    *heap_start = boot_freemem;
-    *heap_size = KERNBASE + kmem_size - (uint32_t)boot_freemem;
-}
-
-int up_create_stack(struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
-{
-    uint32_t *stack_alloc_ptr;
-    int ret = ERROR;
-    size_t *adj_stack_ptr;
-
-    /* Move up to next even word boundary if necessary */
-
-    size_t adj_stack_size = (stack_size + 3) & ~3;
-    size_t adj_stack_words = adj_stack_size >> 2;
-
-    /* Allocate the memory for the stack */
-
-#if defined(CONFIG_BUILD_KERNEL) && defined(CONFIG_MM_KERNEL_HEAP)
-    /* Use the kernel allocator if this is a kernel thread */
-
-    if (ttype == TCB_FLAG_TTYPE_KERNEL) {
-        stack_alloc_ptr = (uint32_t *)kmm_malloc(stack_size);
-    } else
-#endif
-    {
-        stack_alloc_ptr = (uint32_t*)kumm_malloc(adj_stack_size);
-    }
-    if (stack_alloc_ptr) {
-        /* This is the address of the last word in the allocation */
-
-        adj_stack_ptr = &stack_alloc_ptr[adj_stack_words - 1];
-
-        /* Save the values in the TCB */
-
-        tcb->adj_stack_size  = adj_stack_size;
-        tcb->stack_alloc_ptr = stack_alloc_ptr;
-        tcb->adj_stack_ptr   = (void *)((unsigned int)adj_stack_ptr & ~7);
-        ret = OK;
-    }
-    return ret;
-}
-
-int up_use_stack(struct tcb_s *tcb, void *stack, size_t stack_size)
-{
-    /* Move up to next even word boundary if necessary */
-
-    size_t adj_stack_size = stack_size & ~3;
-    size_t adj_stack_words = adj_stack_size >> 2;
-
-    /* This is the address of the last word in the allocation */
-
-    size_t *adj_stack_ptr = &((size_t*)stack)[adj_stack_words - 1];
-
-    /* Save the values in the TCB */
-
-    tcb->adj_stack_size  = adj_stack_size;
-    tcb->stack_alloc_ptr = stack;
-    tcb->adj_stack_ptr   = (void *)((unsigned int)adj_stack_ptr & ~7);
-    return OK;
-}
-
-FAR void *up_stack_frame(FAR struct tcb_s *tcb, size_t frame_size)
-{
-  uintptr_t topaddr;
-
-  /* Align the frame_size */
-
-  frame_size = (frame_size + 3) & ~3;
-
-  /* Is there already a stack allocated? Is it big enough? */
-
-  if (!tcb->stack_alloc_ptr || tcb->adj_stack_size <= frame_size) {
-      return NULL;
-  }
-
-  /* Save the adjusted stack values in the struct tcb_s */
-
-  topaddr              = (uintptr_t)tcb->adj_stack_ptr - frame_size;
-  tcb->adj_stack_ptr   = (FAR void *)topaddr;
-  tcb->adj_stack_size -= frame_size;
-
-  /* Reset the initial state */
-
-  up_initial_state(tcb);
-
-  /* And return a pointer to the allocated memory region */
-
-  return (FAR void *)(topaddr + sizeof(uint32_t));
-}
-
-void up_release_stack(struct tcb_s *dtcb, uint8_t ttype)
-{
-  /* Is there a stack allocated? */
-
-  if (dtcb->stack_alloc_ptr) {
-#if defined(CONFIG_BUILD_KERNEL) && defined(CONFIG_MM_KERNEL_HEAP)
-      /* Use the kernel allocator if this is a kernel thread */
-
-      if (ttype == TCB_FLAG_TTYPE_KERNEL) {
-          kmm_free(dtcb->stack_alloc_ptr);
-      } else
-#endif
-      {
-        /* Use the user-space allocator if this is a task or pthread */
-
-        kumm_free(dtcb->stack_alloc_ptr);
-      }
-  }
-
-  /* Mark the stack freed */
-
-  dtcb->stack_alloc_ptr = NULL;
-  dtcb->adj_stack_size  = 0;
-  dtcb->adj_stack_ptr   = NULL;
-}
-
-/****************************************************************************
- * Name: up_block_task
- *
- * Description:
- *   The currently executing task at the head of
- *   the ready to run list must be stopped.  Save its context
- *   and move it to the inactive list specified by task_state.
- *
- *   This function is called only from the NuttX scheduling
- *   logic.  Interrupts will always be disabled when this
- *   function is called.
- *
- * Inputs:
- *   tcb: Refers to a task in the ready-to-run list (normally
- *     the task at the head of the list).  It most be
- *     stopped, its context saved and moved into one of the
- *     waiting task lists.  It it was the task at the head
- *     of the ready-to-run list, then a context to the new
- *     ready to run task must be performed.
- *   task_state: Specifies which waiting task list should be
- *     hold the blocked task TCB.
- *
- ****************************************************************************/
-void up_block_task(struct tcb_s *tcb, tstate_t task_state)
-{
-  /* Verify that the context switch can be performed */
-
-  if ((tcb->task_state < FIRST_READY_TO_RUN_STATE) ||
-      (tcb->task_state > LAST_READY_TO_RUN_STATE))
-    {
-      warn("%s: task sched error\n", __func__);
-      return;
-    }
-  else
-    {
-      struct tcb_s *rtcb = current_task;
-      bool switch_needed;
-
-      /* Remove the tcb task from the ready-to-run list.  If we
-       * are blocking the task at the head of the task list (the
-       * most likely case), then a context switch to the next
-       * ready-to-run task is needed. In this case, it should
-       * also be true that rtcb == tcb.
-       */
-
-      switch_needed = sched_removereadytorun(tcb);
-
-      /* Add the task to the specified blocked task list */
-
-      sched_addblocked(tcb, (tstate_t)task_state);
-
-      /* Now, perform the context switch if one is needed */
-
-      if (switch_needed)
-        {
-          struct tcb_s *nexttcb;
-
-          /* Update scheduler parameters */
-
-          sched_suspend_scheduler(rtcb);
-
-          /* this part should not be executed in interrupt context */
-
-          if (up_interrupt_context())
-            {
-              panic("%s: %d\n", __func__, __LINE__);
-            }
-
-          /* If there are any pending tasks, then add them to the ready-to-run
-           * task list now. It should be the up_realease_pending() called from
-           * sched_unlock() to do this for disable preemption. But it block
-           * itself, so it's OK.
-           */
-
-          if (g_pendingtasks.head)
-            {
-              warn("Disable preemption failed for task block itself\n");
-              sched_mergepending();
-            }
-
-          nexttcb = this_task();
-
-#ifdef CONFIG_ARCH_ADDRENV
-          /* Make sure that the address environment for the previously
-           * running task is closed down gracefully (data caches dump,
-           * MMU flushed) and set up the address environment for the new
-           * thread at the head of the ready-to-run list.
-           */
-
-          (void)group_addrenv(nexttcb);
-#endif
-          /* Reset scheduler parameters */
-
-          sched_resume_scheduler(nexttcb);
-
-          /* context switch */
-
-          up_switchcontext(rtcb, nexttcb);
-        }
-    }
-}
-
-/****************************************************************************
- * Name: up_unblock_task
- *
- * Description:
- *   A task is currently in an inactive task list
- *   but has been prepped to execute.  Move the TCB to the
- *   ready-to-run list, restore its context, and start execution.
- *
- * Inputs:
- *   tcb: Refers to the tcb to be unblocked.  This tcb is
- *     in one of the waiting tasks lists.  It must be moved to
- *     the ready-to-run list and, if it is the highest priority
- *     ready to run taks, executed.
- *
- ****************************************************************************/
-
-void up_unblock_task(struct tcb_s *tcb)
-{
-  /* Verify that the context switch can be performed */
-
-  if ((tcb->task_state < FIRST_BLOCKED_STATE) ||
-      (tcb->task_state > LAST_BLOCKED_STATE))
-    {
-      warn("%s: task sched error\n", __func__);
-      return;
-    }
-  else
-    {
-      struct tcb_s *rtcb = current_task;
-
-      /* Remove the task from the blocked task list */
-
-      sched_removeblocked(tcb);
-
-      /* Add the task in the correct location in the prioritized
-       * ready-to-run task list.
-       */
-
-      if (sched_addreadytorun(tcb) && !up_interrupt_context())
-        {
-          /* The currently active task has changed! */
-          /* Update scheduler parameters */
-
-          sched_suspend_scheduler(rtcb);
-
-          /* Are we in an interrupt handler? */
-
-          struct tcb_s *nexttcb = this_task();
-
-#ifdef CONFIG_ARCH_ADDRENV
-          /* Make sure that the address environment for the previously
-           * running task is closed down gracefully (data caches dump,
-           * MMU flushed) and set up the address environment for the new
-           * thread at the head of the ready-to-run list.
-
-          (void)group_addrenv(nexttcb);
-#endif
-          /* Update scheduler parameters */
-
-          sched_resume_scheduler(nexttcb);
-
-          /* context switch */
-
-          up_switchcontext(rtcb, nexttcb);
-        }
-    }
-}
-
-/* This function is called from sched_unlock() which will check not
- * in interrupt context and disable interrupt.
- */
-
-void up_release_pending(void)
-{
-  struct tcb_s *rtcb = current_task;
-
-  /* Merge the g_pendingtasks list into the ready-to-run task list */
-
-  if (sched_mergepending())
-    {
-      struct tcb_s *nexttcb = this_task();
-
-      /* The currently active task has changed!  We will need to switch
-       * contexts.
-       *
-       * Update scheduler parameters.
-       */
-
-      sched_suspend_scheduler(rtcb);
-
-#ifdef CONFIG_ARCH_ADDRENV
-      /* Make sure that the address environment for the previously
-       * running task is closed down gracefully (data caches dump,
-       * MMU flushed) and set up the address environment for the new
-       * thread at the head of the ready-to-run list.
-       */
-
-      (void)group_addrenv(nexttcb);
-#endif
-      /* Update scheduler parameters */
-
-      sched_resume_scheduler(nexttcb);
-
-      /* context switch */
-
-      up_switchcontext(rtcb, nexttcb);
-    }
-}
-
-void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
-{
-  /* Verify that the caller is sane */
-
-  if (tcb->task_state < FIRST_READY_TO_RUN_STATE ||
-      tcb->task_state > LAST_READY_TO_RUN_STATE
-#if SCHED_PRIORITY_MIN > UINT8_MIN
-      || priority < SCHED_PRIORITY_MIN
-#endif
-#if SCHED_PRIORITY_MAX < UINT8_MAX
-      || priority > SCHED_PRIORITY_MAX
-#endif
-      )
-    {
-      warn("%s: task sched error\n", __func__);
-      return;
-    }
-  else
-    {
-      struct tcb_s *rtcb = current_task;
-      bool switch_needed;
-
-      /* Remove the tcb task from the ready-to-run list.
-       * sched_removereadytorun will return true if we just
-       * remove the head of the ready to run list.
-       */
-
-      switch_needed = sched_removereadytorun(tcb);
-
-      /* Setup up the new task priority */
-
-      tcb->sched_priority = (uint8_t)priority;
-
-      /* Return the task to the specified blocked task list.
-       * sched_addreadytorun will return true if the task was
-       * added to the new list.  We will need to perform a context
-       * switch only if the EXCLUSIVE or of the two calls is non-zero
-       * (i.e., one and only one the calls changes the head of the
-       * ready-to-run list).
-       */
-
-      switch_needed ^= sched_addreadytorun(tcb);
-
-      /* Now, perform the context switch if one is needed */
-
-      if (switch_needed && !up_interrupt_context())
-        {
-          struct tcb_s *nexttcb;
-
-          /* If there are any pending tasks, then add them to the ready-to-run
-           * task list now. It should be the up_realease_pending() called from
-           * sched_unlock() to do this for disable preemption. But it block
-           * itself, so it's OK.
-           */
-
-          if (g_pendingtasks.head)
-            {
-              warn("Disable preemption failed for reprioritize task\n");
-              sched_mergepending();
-            }
-
-          /* Update scheduler parameters */
-
-          sched_suspend_scheduler(rtcb);
-
-          /* Get the TCB of the new task to run */
-
-          nexttcb = this_task();
-
-#ifdef CONFIG_ARCH_ADDRENV
-          /* Make sure that the address environment for the previously
-           * running task is closed down gracefully (data caches dump,
-           * MMU flushed) and set up the address environment for the new
-           * thread at the head of the ready-to-run list.
-           */
-
-          (void)group_addrenv(nexttcb);
-#endif
-          /* Update scheduler parameters */
-
-          sched_resume_scheduler(nexttcb);
-
-          /* context switch */
-
-          up_switchcontext(rtcb, nexttcb);
-        }
-    }
-}
-
-void _exit(int status)
-{
-    struct tcb_s* tcb;
-
-    /* Destroy the task at the head of the ready to run list. */
-
-    (void)task_exit();
-
-    /* Now, perform the context switch to the new ready-to-run task at the
-     * head of the list.
-     */
-
-    tcb = this_task();
-
-#ifdef CONFIG_ARCH_ADDRENV
-    /* Make sure that the address environment for the previously running
-     * task is closed down gracefully (data caches dump, MMU flushed) and
-     * set up the address environment for the new thread at the head of
-     * the ready-to-run list.
-     */
-
-    (void)group_addrenv(tcb);
-#endif
-
-    /* Then switch contexts */
-
-    up_switchcontext(NULL, tcb);
-}
-
-void up_assert(const uint8_t *filename, int line)
-{
-    fprintf(stderr, "Assertion failed at file:%s line: %d\n", filename, line);
-
-#ifdef CONFIG_BOARD_CRASHDUMP
-    board_crashdump(up_getsp(), this_task(), filename, line);
-#endif
-
-    // in interrupt context or idle task means kernel error
-    // which will stop the OS
-    // if in user space just terminate the task
-    if (up_interrupt_context() || current_task->pid == 0) {
-        panic("%s: %d\n", __func__, __LINE__);
-    }
-    else {
-        exit(EXIT_FAILURE);
-    }
-}
-
-#ifndef CONFIG_DISABLE_SIGNALS
-
-void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
-{
-    /* Refuse to handle nested signal actions */
-    if (!tcb->xcp.sigdeliver) {
-        int flags;
-
-        /* Make sure that interrupts are disabled */
-        local_irq_save(flags);
-
-        // First, handle some special cases when the signal is
-        // being delivered to the currently executing task.
-        if (tcb == current_task) {
-            // CASE 1:  We are not in an interrupt handler and
-            // a task is signalling itself for some reason.
-            if (!up_interrupt_context()) {
-                // In this case just deliver the signal now.
-                sigdeliver(tcb);
-            }
-            // CASE 2:  We are in an interrupt handler AND the
-            // interrupted task is the same as the one that
-            // must receive the signal.
-            else {
-                tcb->xcp.sigdeliver = sigdeliver;
-            }
-        }
-
-        // Otherwise, we are (1) signaling a task is not running
-        // from an interrupt handler or (2) we are not in an
-        // interrupt handler and the running task is signalling
-        // some non-running task.
-        else {
-            tcb->xcp.sigdeliver = sigdeliver;
-            push_xcptcontext(&tcb->xcp);
-        }
-
-        local_irq_restore(flags);
-    }
-}
-
-#endif /* !CONFIG_DISABLE_SIGNALS */
-
-
-bool up_interrupt_context(void)
-{
-    if (nest_irq)
-        return true;
-    return false;
-}
-
-#ifndef CONFIG_ARCH_NOINTC
-void up_disable_irq(int irq)
-{
-
-}
-
-void up_enable_irq(int irq)
-{
-
-}
-#endif
-
-#ifdef CONFIG_ARCH_IRQPRIO
-int up_prioritize_irq(int irq, int priority)
-{
-
-}
-#endif
-
-void up_sigdeliver(struct Trapframe *tf)
-{
-    sig_deliver_t sigdeliver;
-
-    pop_xcptcontext(¤t_task->xcp);
-    sigdeliver = current_task->xcp.sigdeliver;
-    current_task->xcp.sigdeliver = NULL;
-    local_irq_enable();
-    sigdeliver(current_task);
-    local_irq_disable();
-}
-
-#if defined(CONFIG_HAVE_CXX) && defined(CONFIG_HAVE_CXXINITIALIZE)
-
-void up_cxxinitialize(void)
-{
-    rgmp_cxx_init();
-}
-
-#endif
-
-
-
-
-
-
-
-
diff --git a/arch/rgmp/src/rgmp.c b/arch/rgmp/src/rgmp.c
deleted file mode 100644
index 40bbed971e056320ad5911cec4fa83a29d7eea2c..0000000000000000000000000000000000000000
--- a/arch/rgmp/src/rgmp.c
+++ /dev/null
@@ -1,172 +0,0 @@
-/****************************************************************************
- * arch/rgmp/src/rgmp.c
- *
- *   Copyright (C) 2011 Yu Qiang. All rights reserved.
- *   Author: Yu Qiang 
- *
- * This file is a part of NuttX:
- *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#include 
-#include 
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-int nest_irq = 0;
-
-// the default time is 10ms
-#ifdef MSEC_PER_TICK
-const unsigned int rtos_tick_time = MSEC_PER_TICK;
-#else
-const unsigned int rtos_tick_time = 10;
-#endif
-
-void rtos_entry(void)
-{
-  os_start();
-}
-
-void *rtos_get_page(void)
-{
-  return memalign(PTMEMSIZE, PTMEMSIZE);
-}
-
-void rtos_free_page(void *page)
-{
-  free(page);
-}
-
-void *rtos_kmalloc(int size)
-{
-  return kmm_malloc(size);
-}
-
-void rtos_kfree(void *addr)
-{
-  kmm_free(addr);
-}
-
-/* The interrupt can be nested. The pair of rtos_enter_interrupt()
- * and rtos_exit_interrupt() make sure the context switch is
- * performed only in the last IRQ exit.
- */
-
-void rtos_enter_interrupt(void)
-{
-  nest_irq++;
-}
-
-void rtos_exit_interrupt(void)
-{
-  local_irq_disable();
-  nest_irq--;
-  if (!nest_irq)
-    {
-      struct tcb_s *rtcb = current_task;
-      struct tcb_s *ntcb;
-
-      if (rtcb->xcp.sigdeliver)
-        {
-          rtcb->xcp.ctx.tf = g_current_regs;
-          push_xcptcontext(&rtcb->xcp);
-        }
-
-      ntcb = this_task();
-
-      /* Switch needed */
-
-      if (rtcb != ntcb)
-        {
-          rtcb->xcp.ctx.tf = g_current_regs;
-          current_task = ntcb;
-          rgmp_switch_to(&ntcb->xcp.ctx);
-        }
-    }
-}
-
-void rtos_timer_isr(void *data)
-{
-  sched_process_timer();
-}
-
-/* RTOS semaphore operation */
-
-int rtos_sem_init(struct semaphore *sem, int val)
-{
-  if ((sem->sem = kmm_malloc(sizeof(sem_t))) == NULL)
-    return -1;
-  return sem_init(sem->sem, 0, val);
-}
-
-int rtos_sem_up(struct semaphore *sem)
-{
-  return sem_post(sem->sem);
-}
-
-int rtos_sem_down(struct semaphore *sem)
-{
-  return sem_wait(sem->sem);
-}
-
-void rtos_stop_running(void)
-{
-  extern void nuttx_arch_exit(void);
-
-  local_irq_disable();
-
-  nuttx_arch_exit();
-
-  while (1)
-    {
-      arch_hlt();
-    }
-}
-
-int rtos_vnet_init(struct rgmp_vnet *vnet)
-{
-  extern int vnet_init(struct rgmp_vnet *vnet);
-
-  return vnet_init(vnet);
-}
diff --git a/arch/rgmp/src/x86/Make.defs b/arch/rgmp/src/x86/Make.defs
deleted file mode 100644
index fcf3180d82f1cbc0f6042224791040115dcb020d..0000000000000000000000000000000000000000
--- a/arch/rgmp/src/x86/Make.defs
+++ /dev/null
@@ -1,42 +0,0 @@
-############################################################################
-# rgmp/x86/Make.defs
-#
-#   Copyright (C) 2011 Yu Qiang. All rights reserved.
-#   Author: Yu Qiang 
-#
-# This file is a part of NuttX:
-#
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
-#
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name Gregory Nutt nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-############################################################################
-
-RGMP_ARCH_ASRCS = sigentry.S
-RGMP_ARCH_CSRCS = com.c arch_nuttx.c
diff --git a/arch/rgmp/src/x86/arch_nuttx.c b/arch/rgmp/src/x86/arch_nuttx.c
deleted file mode 100644
index d5ae6916862eb64afdb85c12cc7d1db7dba22087..0000000000000000000000000000000000000000
--- a/arch/rgmp/src/x86/arch_nuttx.c
+++ /dev/null
@@ -1,103 +0,0 @@
-/****************************************************************************
- * arch/rgmp/src/x86/arch_nuttx.c
- *
- *   Copyright (C) 2011 Yu Qiang. All rights reserved.
- *   Author: Yu Qiang 
- *
- * This file is a part of NuttX:
- *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#include 
-#include 
-#include 
-
-#include 
-#include 
-
-
-void nuttx_arch_init(void)
-{
-    extern void e1000_mod_init(void);
-    extern void up_serialinit(void);
-
-    // setup COM device
-    up_serialinit();
-
-#ifdef CONFIG_NET_E1000
-    // setup e1000
-    e1000_mod_init();
-#endif
-
-}
-
-void nuttx_arch_exit(void)
-{
-  extern void e1000_mod_exit(void);
-
-#ifdef CONFIG_NET_E1000
-  e1000_mod_exit();
-#endif
-}
-
-void up_initial_state(struct tcb_s *tcb)
-{
-  struct Trapframe *tf;
-
-  if (tcb->pid)
-    {
-      tf = (struct Trapframe *)tcb->adj_stack_ptr - 1;
-      rgmp_setup_context(&tcb->xcp.ctx, tf, tcb->start, 1);
-    }
-  else
-    {
-      rgmp_setup_context(&tcb->xcp.ctx, NULL, NULL, 0);
-    }
-}
-
-void push_xcptcontext(struct xcptcontext *xcp)
-{
-  xcp->save_eip = xcp->ctx.tf->tf_eip;
-  xcp->save_eflags = xcp->ctx.tf->tf_eflags;
-
-  // set up signal entry with interrupts disabled
-
-  xcp->ctx.tf->tf_eip = (uint32_t)up_sigentry;
-  xcp->ctx.tf->tf_eflags = 0;
-}
-
-void pop_xcptcontext(struct xcptcontext *xcp)
-{
-    xcp->ctx.tf->tf_eip = xcp->save_eip;
-    xcp->ctx.tf->tf_eflags = xcp->save_eflags;
-}
-
diff --git a/arch/rgmp/src/x86/com.c b/arch/rgmp/src/x86/com.c
deleted file mode 100644
index 8a149bcadc0d50a3a08df7b87289f16983c1a8d6..0000000000000000000000000000000000000000
--- a/arch/rgmp/src/x86/com.c
+++ /dev/null
@@ -1,640 +0,0 @@
-/****************************************************************************
- * arch/rgmp/src/x86/com.c
- *
- *   Copyright (C) 2011 Yu Qiang. All rights reserved.
- *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
- *   Authors: Yu Qiang 
- *            Gregory Nutt 
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-#include 
-#include 
-#include 
-
-#include 
-
-#include 
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-#define COM1            0x3F8
-#define COM2            0x2f8
-#define COM3            0x3e8
-#define COM4            0x2e8
-
-#define COM_RX          0       // In:        Receive buffer (DLAB=0)
-#define COM_DLL         0       // Out: Divisor Latch Low (DLAB=1)
-#define COM_TX          0       // Out: Transmit buffer (DLAB=0)
-#define COM_DLM         1       // Out: Divisor Latch High (DLAB=1)
-#define COM_IER         1       // Out: Interrupt Enable Register
-#define   COM_IER_TEI   0x02    //   Enable transmit buffer empty interrupt
-#define   COM_IER_RDI   0x01    //   Enable receiver data interrupt
-#define COM_IIR         2       // In:        Interrupt ID Register
-#define COM_FCR         2       // Out: FIFO Control Register
-#define COM_LCR         3       // Out: Line Control Register
-#define   COM_LCR_DLAB  0x80    //   Divisor latch access bit
-#define   COM_LCR_WLEN8 0x03    //   Wordlength: 8 bits
-#define COM_MCR         4       // Out: Modem Control Register
-#define   COM_MCR_RTS   0x02    // RTS complement
-#define   COM_MCR_DTR   0x01    // DTR complement
-#define   COM_MCR_OUT2  0x08    // Out2 complement
-#define COM_LSR         5       // In:        Line Status Register
-#define   COM_LSR_DATA  0x01    //   Data available
-#define   COM_LSR_ETR   0x20    //   buffer has space
-#define   COM_LSR_EDR   0x40    //   buffer empty
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-#ifndef CONFIG_COM_RXBUFSIZE
-#define CONFIG_COM_RXBUFSIZE    64
-#endif
-
-#ifndef CONFIG_COM_TXBUFSIZE
-#define CONFIG_COM_TXBUFSIZE    64
-#endif
-
-struct up_dev_s
-{
-    unsigned int         base;          /* Base address of COM registers */
-    unsigned int         baud;                /* Configured baud */
-    int                  irq;                /* IRQ associated with this COM */
-    struct irq_action    action;
-    union {
-        uint8_t val;
-        struct {
-            unsigned bits     : 2;      /* 3=8 bits, 2=7 bits, 1=6 bits, 0=5 bits */
-            unsigned stopbits : 1;      /* 0=1 stop bit, 1=2 stop bits */
-            unsigned parity   : 3;      /* xx0=none, 001=odd, 011=even */
-            unsigned ebreak   : 1;
-            unsigned dlab     : 1;
-        } sep;
-    } lcr;
-    char rxbuff[CONFIG_COM_RXBUFSIZE];  /* receive buffer */
-    char txbuff[CONFIG_COM_TXBUFSIZE];  /* transmit buffer */
-};
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-static int  up_setup(struct uart_dev_s *dev);
-static void up_shutdown(struct uart_dev_s *dev);
-static int  up_attach(struct uart_dev_s *dev);
-static void up_detach(struct uart_dev_s *dev);
-static irqreturn_t up_com_int_handler(int irq, void *dev_id);
-static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
-static int  up_receive(struct uart_dev_s *dev, unsigned int *status);
-static void up_rxint(struct uart_dev_s *dev, bool enable);
-static bool up_rxavailable(struct uart_dev_s *dev);
-static void up_send(struct uart_dev_s *dev, int ch);
-static void up_txint(struct uart_dev_s *dev, bool enable);
-static bool up_txready(struct uart_dev_s *dev);
-static bool up_txempty(struct uart_dev_s *dev);
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-static struct uart_ops_s g_com_ops =
-{
-    .setup          = up_setup,
-    .shutdown       = up_shutdown,
-    .attach         = up_attach,
-    .detach         = up_detach,
-    .ioctl          = up_ioctl,
-    .receive        = up_receive,
-    .rxint          = up_rxint,
-    .rxavailable    = up_rxavailable,
-#ifdef CONFIG_SERIAL_IFLOWCONTROL
-    .rxflowcontrol  = NULL,
-#endif
-    .send           = up_send,
-    .txint          = up_txint,
-    .txready        = up_txready,
-    .txempty        = up_txempty,
-};
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_alloc_com
- ****************************************************************************/
-
-static uart_dev_t *up_alloc_com(unsigned int base, int irq)
-{
-  uart_dev_t *dev;
-  struct up_dev_s *priv;
-
-  priv = kmm_zalloc(sizeof(struct up_dev_s));
-  if (priv == NULL)
-    {
-      goto err0;
-    }
-
-  dev = kmm_zalloc(sizeof(uart_dev_t));
-  if (dev == NULL)
-    {
-      goto err1;
-    }
-
-  priv->base = base;
-  priv->irq = irq;
-  priv->baud = 115200;
-  priv->lcr.val = 0;
-  priv->lcr.sep.parity = 0;
-  priv->lcr.sep.bits = 3;
-  priv->lcr.sep.stopbits = 0;
-  priv->action.handler = up_com_int_handler;
-  priv->action.dev_id = dev;
-
-  dev->recv.size = CONFIG_COM_RXBUFSIZE;
-  dev->recv.buffer = priv->rxbuff;
-  dev->xmit.size = CONFIG_COM_TXBUFSIZE;
-  dev->xmit.buffer = priv->txbuff;
-  dev->ops = &g_com_ops;
-  dev->priv = priv;
-
-  return dev;
-
-err1:
-  kmm_free(priv);
-err0:
-  return NULL;
-}
-
-/****************************************************************************
- * Name: up_alloc_com
- ****************************************************************************/
-
-static inline void up_free_com(uart_dev_t *com)
-{
-    kmm_free(com->priv);
-    kmm_free(com);
-}
-
-/****************************************************************************
- * Name: up_setup
- *
- * Description:
- *   Configure the UART baud, bits, parity, fifos, etc. This
- *   method is called the first time that the serial port is
- *   opened.
- *
- ****************************************************************************/
-
-static int up_setup(struct uart_dev_s *dev)
-{
-    struct up_dev_s *priv = dev->priv;
-    uint16_t base = priv->base;
-    union {
-        uint16_t val;
-        struct {
-            uint8_t low;
-            uint8_t high;
-        } sep;
-    } data;
-
-    // clear and disable FIFO
-    outb(base+COM_FCR, 1);
-    outb(base+COM_FCR, 3);
-    outb(base+COM_FCR, 0);
-
-    // Clear any preexisting overrun indications and interrupts
-    // Serial port doesn't exist if COM_LSR returns 0xFF
-    inb(base+COM_LSR);
-    inb(base+COM_IIR);
-    inb(base+COM_RX);
-    if (inb(base+COM_LSR) == 0xff) {
-        dbg("COM %d does not exist\n", base);
-        return -1;
-    }
-
-    // Set speed; requires DLAB latch
-    outb(base+COM_LCR, COM_LCR_DLAB);
-    data.val = 115200 / priv->baud;
-    outb(base+COM_DLL, data.sep.low);
-    outb(base+COM_DLM, data.sep.high);
-
-    // set data bits, stop bit, parity; turn off DLAB latch
-    outb(base+COM_LCR, priv->lcr.val);
-
-    // OUT2 must be set to enable interrupt
-    outb(base+COM_MCR, COM_MCR_OUT2);
-
-    // setup FIFO
-    outb(base+COM_FCR, 1);
-
-    // disable COM interrupts
-    outb(base+COM_IER, 0);
-
-    return OK;
-}
-
-/****************************************************************************
- * Name: up_shutdown
- *
- * Description:
- *   Disable the UART.  This method is called when the serial port is closed
- *
- ****************************************************************************/
-
-static void up_shutdown(struct uart_dev_s *dev)
-{
-    struct up_dev_s *priv = dev->priv;
-    uint16_t base = priv->base;
-
-    // disable COM interrupts
-    outb(base+COM_IER, 0);
-}
-
-/****************************************************************************
- * Name: up_attach
- *
- * Description:
- *   Configure the UART to operation in interrupt driven mode.  This method is
- *   called when the serial port is opened.  Normally, this is just after the
- *   the setup() method is called, however, the serial console may operate in
- *   a non-interrupt driven mode during the boot phase.
- *
- *   RX and TX interrupts are not enabled when by the attach method (unless the
- *   hardware supports multiple levels of interrupt enabling).  The RX and TX
- *   interrupts are not enabled until the txint() and rxint() methods are called.
- *
- ****************************************************************************/
-
-static int up_attach(struct uart_dev_s *dev)
-{
-    struct up_dev_s *priv = dev->priv;
-    int err;
-
-    err = rgmp_request_irq(priv->irq, &priv->action, 0);
-
-    return err;
-}
-
-/****************************************************************************
- * Name: up_detach
- *
- * Description:
- *   Detach UART interrupts.  This method is called when the serial port is
- *   closed normally just before the shutdown method is called.  The exception is
- *   the serial console which is never shutdown.
- *
- ****************************************************************************/
-
-static void up_detach(struct uart_dev_s *dev)
-{
-    struct up_dev_s *priv = dev->priv;
-
-    rgmp_free_irq(priv->irq, &priv->action);
-}
-
-/****************************************************************************
- * Name: up_com_int_handler
- *
- * Description:
- *   This is the UART interrupt handler.  It will be invoked
- *   when an interrupt received on the 'irq'  It should call
- *   uart_transmitchars or uart_receivechar to perform the
- *   appropriate data transfers.  The interrupt handling logic\
- *   must be able to map the 'irq' number into the approprite
- *   uart_dev_s structure in order to call these functions.
- *
- ****************************************************************************/
-
-static irqreturn_t up_com_int_handler(int irq, void *dev_id)
-{
-    struct uart_dev_s *dev = dev_id;
-    struct up_dev_s   *priv = dev->priv;
-    uint16_t base = priv->base;
-    //uint8_t cause = inb(base+COM_IIR);
-    uint8_t state = inb(base+COM_LSR);
-
-    if (state & COM_LSR_DATA)
-        uart_recvchars(dev);
-
-    if (state & COM_LSR_ETR)
-        uart_xmitchars(dev);
-
-    return IRQ_HANDLED;
-}
-
-/****************************************************************************
- * Name: up_ioctl
- *
- * Description:
- *   All ioctl calls will be routed through this method
- *
- ****************************************************************************/
-
-static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
-{
-    struct inode      *inode = filep->f_inode;
-    struct uart_dev_s *dev   = inode->i_private;
-    struct up_dev_s   *priv  = (struct up_dev_s*)dev->priv;
-
-    switch (cmd) {
-    case COM_SET_BAUD:
-        priv->baud = arg;
-        break;
-    case COM_SET_PARITY:
-        priv->lcr.sep.parity = arg;
-        break;
-    case COM_SET_STOPBITS:
-        priv->lcr.sep.stopbits = arg;
-        break;
-    case COM_SET_BITS:
-        priv->lcr.sep.bits = arg;
-        break;
-    default:
-        return ERROR;
-    }
-
-    if (up_setup(dev) != OK)
-        return ERROR;
-
-    up_rxint(dev, 1);
-
-    return OK;
-}
-
-/****************************************************************************
- * Name: up_receive
- *
- * Description:
- * Called (usually) from the interrupt level to receive one character from
- * the UART.  Error bits associated with the receipt are provided in the
- * the return 'status'.
- *
- ****************************************************************************/
-
-static int up_receive(struct uart_dev_s *dev, unsigned int *status)
-{
-    struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
-    uint16_t base = priv->base;
-
-    return inb(base+COM_RX);
-}
-
-/****************************************************************************
- * Name: up_rxint
- *
- * Description:
- *   Call to enable or disable RX interrupts
- *
- ****************************************************************************/
-
-static void up_rxint(struct uart_dev_s *dev, bool enable)
-{
-    struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
-    uint16_t base = priv->base;
-    uint8_t ier;
-
-    ier = inb(base+COM_IER);
-    if (enable)
-        ier |= COM_IER_RDI;
-    else
-        ier &= ~COM_IER_RDI;
-    outb(base+COM_IER, ier);
-}
-
-/****************************************************************************
- * Name: up_rxavailable
- *
- * Description:
- *   Return true if the receive fifo is not empty
- *
- ****************************************************************************/
-
-static bool up_rxavailable(struct uart_dev_s *dev)
-{
-    struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
-    uint16_t base = priv->base;
-
-    return inb(base+COM_LSR) & COM_LSR_DATA;
-}
-
-/****************************************************************************
- * Name: up_send
- *
- * Description:
- *   This method will send one byte on the UART
- *
- ****************************************************************************/
-
-static void up_send(struct uart_dev_s *dev, int ch)
-{
-    struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
-    uint16_t base = priv->base;
-
-    outb(base+COM_TX, ch);
-}
-
-/****************************************************************************
- * Name: up_txint
- *
- * Description:
- *   Call to enable or disable TX interrupts
- *
- ****************************************************************************/
-
-static void up_txint(struct uart_dev_s *dev, bool enable)
-{
-    struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
-    uint16_t base = priv->base;
-    irqstate_t flags;
-    uint8_t ier;
-
-    flags = enter_critical_section();
-    ier = inb(base+COM_IER);
-    if (enable) {
-        ier |= COM_IER_TEI;
-        outb(base+COM_IER, ier);
-
-        /* Fake a TX interrupt here by just calling uart_xmitchars() with
-         * interrupts disabled (note this may recurse).
-         */
-
-        uart_xmitchars(dev);
-    }
-    else {
-        ier &= ~COM_IER_TEI;
-        outb(base+COM_IER, ier);
-    }
-
-    leave_critical_section(flags);
-}
-
-/****************************************************************************
- * Name: up_txready
- *
- * Description:
- *   Return true if the tranmsit fifo is not full
- *
- ****************************************************************************/
-
-static bool up_txready(struct uart_dev_s *dev)
-{
-    struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
-    uint16_t base = priv->base;
-
-    return inb(base+COM_LSR) & COM_LSR_ETR;
-}
-
-/****************************************************************************
- * Name: up_txempty
- *
- * Description:
- *   Return true if the transmit fifo is empty
- *
- ****************************************************************************/
-
-static bool up_txempty(struct uart_dev_s *dev)
-{
-    struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
-    uint16_t base = priv->base;
-
-    return inb(base+COM_LSR) & COM_LSR_EDR;
-}
-
-/****************************************************************************
- * Public Funtions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_serialinit
- *
- * Description:
- *   Performs the low level UART initialization early in
- *   debug so that the serial console will be available
- *   during bootup.  This must be called before up_serialinit.
- *
- ****************************************************************************/
-
-void up_earlyserialinit(void)
-{
-
-}
-
-/****************************************************************************
- * Name: up_serialinit
- *
- * Description:
- *   Register serial console and serial ports.  This assumes
- *   that up_earlyserialinit was called previously.
- *
- ****************************************************************************/
-
-void up_serialinit(void)
-{
-    uart_dev_t *dev;
-    int err;
-
-#ifdef CONFIG_COM1
-    dev = up_alloc_com(COM1, 4);
-    if (dev == NULL)
-        dbg("alloc com1 fail\n");
-    else {
-        err = uart_register("/dev/ttyS0", dev);
-        if (err)
-            dbg("register com1 fail\n");
-    }
-#endif
-#ifdef CONFIG_COM2
-    dev = up_alloc_com(COM2, 3);
-    if (dev == NULL)
-        dbg("alloc com2 fail\n");
-    else {
-        err = uart_register("/dev/ttyS1", dev);
-        if (err)
-            dbg("register com2 fail\n");
-    }
-#endif
-#ifdef CONFIG_COM3
-    dev = up_alloc_com(COM3, 4);
-    if (dev == NULL)
-        dbg("alloc com3 fail\n");
-    else {
-        err = uart_register("/dev/ttyS2", dev);
-        if (err)
-            dbg("register com3 fail\n");
-    }
-#endif
-#ifdef CONFIG_COM4
-    dev = up_alloc_com(COM4, 3);
-    if (dev == NULL)
-        dbg("alloc com4 fail\n");
-    else {
-        err = uart_register("/dev/ttyS3", dev);
-        if (err)
-            dbg("register com4 fail\n");
-    }
-#endif
-}
-
-/****************************************************************************
- * Name: up_putc
- *
- * Description:
- *   Provide priority, low-level access to support OS debug
- *   writes
- *
- ****************************************************************************/
-extern void cons_putc(int c);
-
-int up_putc(int ch)
-{
-    cons_putc(ch);
-    return ch;
-}
-
diff --git a/arch/risc-v/Kconfig b/arch/risc-v/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..645ad2c88e0ea68585a404c23fc39e3456a3a8f8
--- /dev/null
+++ b/arch/risc-v/Kconfig
@@ -0,0 +1,54 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_RISCV
+comment "RISC-V Options"
+
+choice
+	prompt "RISC-V chip selection"
+	default ARCH_CHIP_NR5M100
+
+config ARCH_CHIP_NR5
+	bool "NEXT NanoRisc5"
+	select ARCH_RV32IM
+	---help---
+		NEXT RISC-V NR5Mxx architectures (RISC-V RV32IM cores).
+
+endchoice
+
+config ARCH_RV32I
+	bool
+	default n
+
+config ARCH_RV32IM
+	bool
+	default n
+
+config ARCH_FAMILY
+	string
+	default "rv32im"	if ARCH_RM32IM
+
+config ARCH_CHIP
+	string
+	default "nr5m100"	if ARCH_CHIP_NR5M100
+
+config NR5_MPU
+	bool "MPU support"
+	default n
+	depends on ARCH_HAVE_MPU
+	select ARCH_USE_MPU
+	---help---
+		Build in support for the RISC-V Memory Protection Unit (MPU).
+		Check your chip specifications first; not all RISC-V architectures
+		support the MPU.
+
+if ARCH_RV32IM
+source arch/risc-v/src/rv32im/Kconfig
+endif
+if ARCH_CHIP_NR5
+source arch/risc-v/src/nr5m100/Kconfig
+endif
+
+endif
diff --git a/arch/risc-v/include/arch.h b/arch/risc-v/include/arch.h
new file mode 100644
index 0000000000000000000000000000000000000000..e0e60b4e1b27507601bc11b43d8bb224b742464e
--- /dev/null
+++ b/arch/risc-v/include/arch.h
@@ -0,0 +1,119 @@
+/****************************************************************************
+ * arch/risc-v/include/arch.h
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather,
+ * only indirectly through nuttx/arch.h
+ */
+
+#ifndef __ARCH_RISCV_INCLUDE_ARCH_H
+#define __ARCH_RISCV_INCLUDE_ARCH_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#ifndef __ASSEMBLY__
+#  include 
+#endif
+
+#ifdef CONFIG_ARCH_RV32IM
+#  include "rv32im/csr.h"
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Macros to get the core and vendor ID, HART, arch and ISA codes, etc.
+ */
+#ifdef CONFIG_RV32IM_SYSTEM_CSRRS_SUPPORT 
+
+uint32_t up_getmisa(void);
+uint32_t up_getarchid(void);
+uint32_t up_getimpid(void);
+uint32_t up_getvendorid(void);
+uint32_t up_gethartid(void);
+
+#else
+
+#define up_getmisa() 0
+#define up_getarchid() 0
+#define up_getimpid() 0
+#define up_getvendorid() 0
+#define up_gethartid() 0
+
+#endif
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Variables
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef CONFIG_RV32IM_HW_MULDIV 
+uint32_t up_hard_mul(uint32_t a, uint32_t b);
+uint32_t up_hard_mulh(uint32_t a, uint32_t b);
+uint32_t up_hard_mulhsu(uint32_t a, uint32_t b);
+uint32_t up_hard_mulhu(uint32_t a, uint32_t b);
+uint32_t up_hard_div(uint32_t a, uint32_t b);
+uint32_t up_hard_rem(uint32_t a, uint32_t b);
+uint32_t up_hard_divu(uint32_t a, uint32_t b);
+uint32_t up_hard_remu(uint32_t a, uint32_t b);
+uint32_t time_hard_mul(uint32_t a, uint32_t b, uint32_t *t);
+#endif
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ARCH_RISCV_INCLUDE_ARCH_H */
+
diff --git a/arch/risc-v/include/inttypes.h b/arch/risc-v/include/inttypes.h
new file mode 100644
index 0000000000000000000000000000000000000000..a87bf6b5b36224700b0d7e19a1ac16bb4832d4c5
--- /dev/null
+++ b/arch/risc-v/include/inttypes.h
@@ -0,0 +1,245 @@
+/****************************************************************************
+ * arch/risc-v/include/inttypes.h
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISCV_INCLUDE_INTTYPES_H
+#define __ARCH_RISCV_INCLUDE_INTTYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define PRId8       "d"
+#define PRId16      "d"
+#define PRId32      "d"
+#define PRId64      "lld"
+
+#define PRIdLEAST8  "d"
+#define PRIdLEAST16 "d"
+#define PRIdLEAST32 "d"
+#define PRIdLEAST64 "lld"
+
+#define PRIdFAST8   "d"
+#define PRIdFAST16  "d"
+#define PRIdFAST32  "d"
+#define PRIdFAST64  "lld"
+
+#define PRIdMAX     "lld"
+#define PRIdPTR     "d"
+
+#define PRIi8       "i"
+#define PRIi16      "i"
+#define PRIi32      "i"
+#define PRIi64      "lli"
+
+#define PRIiLEAST8  "i"
+#define PRIiLEAST16 "i"
+#define PRIiLEAST32 "i"
+#define PRIiLEAST64 "lli"
+
+#define PRIiFAST8   "i"
+#define PRIiFAST16  "i"
+#define PRIiFAST32  "i"
+#define PRIiFAST64  "lli"
+
+#define PRIiMAX     "lli"
+#define PRIiPTR     "i"
+
+#define PRIo8       "o"
+#define PRIo16      "o"
+#define PRIo32      "o"
+#define PRIo64      "llo"
+
+#define PRIoLEAST8  "o"
+#define PRIoLEAST16 "o"
+#define PRIoLEAST32 "o"
+#define PRIoLEAST64 "llo"
+
+#define PRIoFAST8   "o"
+#define PRIoFAST16  "o"
+#define PRIoFAST32  "o"
+#define PRIoFAST64  "llo"
+
+#define PRIoMAX     "llo"
+#define PRIoPTR     "o"
+
+#define PRIu8       "u"
+#define PRIu16      "u"
+#define PRIu32      "u"
+#define PRIu64      "llu"
+
+#define PRIuLEAST8  "u"
+#define PRIuLEAST16 "u"
+#define PRIuLEAST32 "u"
+#define PRIuLEAST64 "llu"
+
+#define PRIuFAST8   "u"
+#define PRIuFAST16  "u"
+#define PRIuFAST32  "u"
+#define PRIuFAST64  "llu"
+
+#define PRIuMAX     "llu"
+#define PRIuPTR     "u"
+
+#define PRIx8       "x"
+#define PRIx16      "x"
+#define PRIx32      "x"
+#define PRIx64      "llx"
+
+#define PRIxLEAST8  "x"
+#define PRIxLEAST16 "x"
+#define PRIxLEAST32 "x"
+#define PRIxLEAST64 "llx"
+
+#define PRIxFAST8   "x"
+#define PRIxFAST16  "x"
+#define PRIxFAST32  "x"
+#define PRIxFAST64  "llx"
+
+#define PRIxMAX     "llx"
+#define PRIxPTR     "x"
+
+#define PRIX8       "X"
+#define PRIX16      "X"
+#define PRIX32      "X"
+#define PRIX64      "llX"
+
+#define PRIXLEAST8  "X"
+#define PRIXLEAST16 "X"
+#define PRIXLEAST32 "X"
+#define PRIXLEAST64 "llX"
+
+#define PRIXFAST8   "X"
+#define PRIXFAST16  "X"
+#define PRIXFAST32  "X"
+#define PRIXFAST64  "llX"
+
+#define PRIXMAX     "llX"
+#define PRIXPTR     "X"
+
+#define SCNd8       "hhd"
+#define SCNd16      "hd"
+#define SCNd32      "d"
+#define SCNd64      "lld"
+
+#define SCNdLEAST8  "hhd"
+#define SCNdLEAST16 "hd"
+#define SCNdLEAST32 "d"
+#define SCNdLEAST64 "lld"
+
+#define SCNdFAST8   "hhd"
+#define SCNdFAST16  "hd"
+#define SCNdFAST32  "d"
+#define SCNdFAST64  "lld"
+
+#define SCNdMAX     "lld"
+#define SCNdPTR     "d"
+
+#define SCNi8       "hhi"
+#define SCNi16      "hi"
+#define SCNi32      "i"
+#define SCNi64      "lli"
+
+#define SCNiLEAST8  "hhi"
+#define SCNiLEAST16 "hi"
+#define SCNiLEAST32 "i"
+#define SCNiLEAST64 "lli"
+
+#define SCNiFAST8   "hhi"
+#define SCNiFAST16  "hi"
+#define SCNiFAST32  "i"
+#define SCNiFAST64  "lli"
+
+#define SCNiMAX     "lli"
+#define SCNiPTR     "i"
+
+#define SCNo8       "hho"
+#define SCNo16      "ho"
+#define SCNo32      "o"
+#define SCNo64      "llo"
+
+#define SCNoLEAST8  "hho"
+#define SCNoLEAST16 "ho"
+#define SCNoLEAST32 "o"
+#define SCNoLEAST64 "llo"
+
+#define SCNoFAST8   "hho"
+#define SCNoFAST16  "ho"
+#define SCNoFAST32  "o"
+#define SCNoFAST64  "llo"
+
+#define SCNoMAX     "llo"
+#define SCNoPTR     "o"
+
+#define SCNu8       "hhu"
+#define SCNu16      "hu"
+#define SCNu32      "u"
+#define SCNu64      "llu"
+
+#define SCNuLEAST8  "hhu"
+#define SCNuLEAST16 "hu"
+#define SCNuLEAST32 "u"
+#define SCNuLEAST64 "llu"
+
+#define SCNuFAST8   "hhu"
+#define SCNuFAST16  "hu"
+#define SCNuFAST32  "u"
+#define SCNuFAST64  "llu"
+
+#define SCNuMAX     "llu"
+#define SCNuPTR     "u"
+
+#define SCNx8       "hhx"
+#define SCNx16      "hx"
+#define SCNx32      "x"
+#define SCNx64      "llx"
+
+#define SCNxLEAST8  "hhx"
+#define SCNxLEAST16 "hx"
+#define SCNxLEAST32 "x"
+#define SCNxLEAST64 "llx"
+
+#define SCNxFAST8   "hhx"
+#define SCNxFAST16  "hx"
+#define SCNxFAST32  "x"
+#define SCNxFAST64  "llx"
+
+#define SCNxMAX     "llx"
+#define SCNxPTR     "x"
+
+#endif /* __ARCH_RISCV_INCLUDE_INTTYPES_H */
diff --git a/arch/risc-v/include/irq.h b/arch/risc-v/include/irq.h
new file mode 100644
index 0000000000000000000000000000000000000000..7de60dc316a57bf432b8989de2a20aeb414b2d90
--- /dev/null
+++ b/arch/risc-v/include/irq.h
@@ -0,0 +1,79 @@
+/****************************************************************************
+ * arch/risc-v/include/irq.h
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/irq.h
+ */
+
+#ifndef __ARCH_RISCV_INCLUDE_IRQ_H
+#define __ARCH_RISCV_INCLUDE_IRQ_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/* Include chip-specific IRQ definitions (including IRQ numbers) */
+
+#include 
+#include 
+#include 
+
+/* Include RISC-V architecture-specific IRQ definitions */
+
+#if defined(CONFIG_ARCH_RV32IM) || defined(CONFIG_ARCH_RV32I)
+#  include 
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+typedef uint32_t  irqstate_t;
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Variables
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+irqstate_t  irqsave(void);
+
+void irqrestore(irqstate_t);
+
+#endif /* __ARCH_RISCV_INCLUDE_IRQ_H */
+
diff --git a/arch/risc-v/include/limits.h b/arch/risc-v/include/limits.h
new file mode 100644
index 0000000000000000000000000000000000000000..6be24b9b417fa6f0559df80f942aee5b18443081
--- /dev/null
+++ b/arch/risc-v/include/limits.h
@@ -0,0 +1,90 @@
+/****************************************************************************
+ * arch/risc-v/include/limits.h
+ *
+ *   Copyright (C) 2007-2009, 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISCV_INCLUDE_LIMITS_H
+#define __ARCH_RISCV_INCLUDE_LIMITS_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define CHAR_BIT    8
+#define SCHAR_MIN  (-SCHAR_MAX - 1)
+#define SCHAR_MAX   127
+#define UCHAR_MAX   255
+
+/* These could be different on machines where char is unsigned */
+
+#ifdef __CHAR_UNSIGNED__
+#define CHAR_MIN    0
+#define CHAR_MAX    UCHAR_MAX
+#else
+#define CHAR_MIN    SCHAR_MIN
+#define CHAR_MAX    SCHAR_MAX
+#endif
+
+#define SHRT_MIN    (-SHRT_MAX - 1)
+#define SHRT_MAX    32767
+#define USHRT_MAX   65535U
+
+#define INT_MIN     (-INT_MAX - 1)
+#define INT_MAX     2147483647
+#define UINT_MAX    4294967295U
+
+/* These change on 32-bit and 64-bit platforms */
+
+#if defined(CONFIG_ARCH_32IM) || defined(CONFIG_ARCH_32I)
+
+#define LONG_MIN    (-LONG_MAX - 1)
+#define LONG_MAX    2147483647L
+#define ULONG_MAX   4294967295UL
+
+#define LLONG_MIN   (-LLONG_MAX - 1)
+#define LLONG_MAX   9223372036854775807LL
+#define ULLONG_MAX  18446744073709551615ULL
+
+/* A pointer is 4 bytes */
+
+#define PTR_MIN     (-PTR_MAX - 1)
+#define PTR_MAX     2147483647
+#define UPTR_MAX    4294967295U
+
+#endif /* defined(CONFIG_ARCH_32IM) || defined(CONFIG_ARCH_32I) */
+
+#endif /* __ARCH_RISCV_INCLUDE_LIMITS_H */
diff --git a/arch/risc-v/include/nr5m100/chip.h b/arch/risc-v/include/nr5m100/chip.h
new file mode 100644
index 0000000000000000000000000000000000000000..79d681f6e220fb7ed3f4f67a2571d5471d402e7f
--- /dev/null
+++ b/arch/risc-v/include/nr5m100/chip.h
@@ -0,0 +1,61 @@
+/****************************************************************************
+ * arch/risc-v/include/nr5m100/chip.h
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/irq.h
+ */
+
+#ifndef __ARCH_RISCV_INCLUDE_NR5M100_CHIP_H
+#define __ARCH_RISCV_INCLUDE_NR5M100_CHIP_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Variables
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#endif /* __ARCH_RISCV_INCLUDE_NR5M100_CHIP_H */
+
diff --git a/arch/risc-v/include/nr5m100/irq.h b/arch/risc-v/include/nr5m100/irq.h
new file mode 100644
index 0000000000000000000000000000000000000000..d8d1806d1e86419521e4450c045bc14930186d8e
--- /dev/null
+++ b/arch/risc-v/include/nr5m100/irq.h
@@ -0,0 +1,73 @@
+/****************************************************************************
+ * arch/risc-v/include/nr5m100/irq.h
+ * include/arch/nr5m100/irq.h
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISCV_INCLUDE_NR5M100_IRQ_H
+#define __ARCH_RISCV_INCLUDE_NR5M100_IRQ_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#if defined(CONFIG_NR5_NR5M1XX)
+#  include 
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define  NR5_IRQ_TRAP      0
+
+#define  EPIC_STATUS_PRI_MASK       0x001C
+#define  EPIC_STATUS_INT_PRI_MASK   0x01C0
+#define  EPIC_STATUS_INT_PRI1       0x0040
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Variables
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+void up_enable_irq(int irq);
+
+irqstate_t up_irq_save(void);
+void up_irq_restore(irqstate_t irqstate);
+
+#endif /* __ARCH_RISCV_INCLUDE_NR5M100_IRQ_H */
+
diff --git a/arch/risc-v/include/nr5m100/nr5m1xx_irq.h b/arch/risc-v/include/nr5m100/nr5m1xx_irq.h
new file mode 100644
index 0000000000000000000000000000000000000000..ceffbb2985dd6de226ac103466acebdef87da9f8
--- /dev/null
+++ b/arch/risc-v/include/nr5m100/nr5m1xx_irq.h
@@ -0,0 +1,71 @@
+/****************************************************************************
+ * arch/risc-v/include/nr5m100/nr5m1xx_irq.h
+ * include/arch/nr5m100/nr5m1xx_irq.h
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISCV_INCLUDE_NR5M100_NR5M1XX_IRQ_H
+#define __ARCH_RISCV_INCLUDE_NR5M100_NR5M1XX_IRQ_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define  NR5_IRQ_SYSTICK     1
+#define  NR5_IRQ_TIMER       2
+#define  NR5_IRQ_SOFTWARE    3
+#define  NR5_IRQ_DEBUG       4
+#define  NR5_IRQ_UART1_RX    5
+#define  NR5_IRQ_UART1_TX    6
+#define  NR5_IRQ_TIMER1_A    7
+#define  NR5_IRQ_TIMER1_B    8
+#define  NR5_IRQ_TIMER2_A    9
+#define  NR5_IRQ_TIMER2_B    10
+
+#define  NR_IRQS             11
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Variables
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#endif /* __ARCH_RISCV_INCLUDE_NR5M100_NR5M1XX_IRQ_H */
+
diff --git a/arch/risc-v/include/rv32im/csr.h b/arch/risc-v/include/rv32im/csr.h
new file mode 100644
index 0000000000000000000000000000000000000000..3aac4173e65e29607f6c7a518485c22c1cf94922
--- /dev/null
+++ b/arch/risc-v/include/rv32im/csr.h
@@ -0,0 +1,100 @@
+/****************************************************************************
+ * arch/risc-v/include/rv32im/csr.h
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/irq.h
+ */
+
+#ifndef __ARCH_RISCV_INCLUDE_RV32IM_CSR_H
+#define __ARCH_RISCV_INCLUDE_RV32IM_CSR_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Machine Information Registers */
+
+#define CSR_MISA          0xF10
+#define CSR_MVENDORID     0xF11
+#define CSR_MARCHID       0xF12
+#define CSR_MIMPID        0xF13
+#define CSR_MHARTID       0xF14
+
+/* Machine Trap Registers */
+
+#define CSR_MSTATUS       0x300
+#define CSR_MTDELEG       0x302
+#define CSR_MIE           0x304
+#define CSR_MTVEC         0x305
+#define CSR_MIVEC         0x30f
+
+/* Machine Trap Handling */
+
+#define CSR_MSCRATCH      0x340
+#define CSR_MEPC          0x341
+#define CSR_MCAUSE        0x342
+#define CSR_MBADADDR      0x343
+#define CSR_MIP           0x344
+
+/* Machine Timers and Counters */
+
+#define CSR_CYCLE         0xF00
+#define CSR_TIME          0xF01
+#define CSR_INSTRET       0xF02
+#define CSR_CYCLEH        0xF80
+#define CSR_TIMEH         0xF81
+#define CSR_INSTRETH      0xF82
+
+/* Debug interface CSRs */
+
+#define CSR_DCSR          0x7B0
+#define CSR_DPC           0x7B1
+#define CSR_DSCRATCH      0x7B2
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Variables
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#endif /* __ARCH_RISCV_INCLUDE_RV32IM_CSR_H */
+
diff --git a/arch/risc-v/include/rv32im/irq.h b/arch/risc-v/include/rv32im/irq.h
new file mode 100644
index 0000000000000000000000000000000000000000..0a9010703f41453b3f63e7429db21e919f0ed1ae
--- /dev/null
+++ b/arch/risc-v/include/rv32im/irq.h
@@ -0,0 +1,347 @@
+/****************************************************************************
+ * arch/risc-v/include/rv32im/irq.h
+ *
+ *   Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ *   Modified for RISC-V:
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/irq.h
+ */
+
+#ifndef __ARCH_RISCV_INCLUDE_RV32IM_IRQ_H
+#define __ARCH_RISCV_INCLUDE_RV32IM_IRQ_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* Configuration ************************************************************/
+
+/* If this is a kernel build, how many nested system calls should we support? */
+
+#ifndef CONFIG_SYS_NNEST
+#  define CONFIG_SYS_NNEST 2
+#endif
+
+/* Processor PC */
+#define REG_EPC_NDX         0
+
+/* General pupose registers */
+/* $0: Zero register does not need to be saved */
+/* $1: ra (return address) */
+
+#define REG_X1_NDX          1
+
+/* $2: Stack POinter
+ * $3: Global Pointer
+ * $4: Thread Pointer
+ */
+
+#define REG_X2_NDX          2
+#define REG_X3_NDX          3
+#define REG_X4_NDX          4
+
+/* $5-$7 = t0-t3: Temporary registers */
+
+#define REG_X5_NDX          5
+#define REG_X6_NDX          6
+#define REG_X7_NDX          7
+
+/* $8: s0 / fp Frame pointer */
+
+#define REG_X8_NDX          8
+
+/* $89 s1 Saved register */
+
+#define REG_X9_NDX          9
+
+/* $10-$17 = a0-a7: Argument registers */
+
+#define REG_X10_NDX         10
+#define REG_X11_NDX         11
+#define REG_X12_NDX         12
+#define REG_X13_NDX         13
+#define REG_X14_NDX         14
+#define REG_X15_NDX         15
+#define REG_X16_NDX         16
+#define REG_X17_NDX         17
+
+/* $18-$27 = s2-s11: Saved registers */
+
+#define REG_X18_NDX         18
+#define REG_X19_NDX         19
+#define REG_X20_NDX         20
+#define REG_X21_NDX         21
+#define REG_X22_NDX         22
+#define REG_X23_NDX         23
+#define REG_X24_NDX         24
+#define REG_X25_NDX         25
+#define REG_X26_NDX         26
+#define REG_X27_NDX         27
+
+/* $28-31 = t3-t6: Temporary (Volatile) registers */
+
+#define REG_X28_NDX         28
+#define REG_X29_NDX         29
+#define REG_X30_NDX         30
+#define REG_X31_NDX         31
+
+/* Interrupt Context register */
+
+#define REG_INT_CTX_NDX     32
+
+#define XCPTCONTEXT_REGS    33
+#define XCPTCONTEXT_SIZE    (4 * XCPTCONTEXT_REGS)
+
+/* In assembly language, values have to be referenced as byte address
+ * offsets.  But in C, it is more convenient to reference registers as
+ * register save table offsets.
+ */
+
+#ifdef __ASSEMBLY__
+#  define REG_EPC           (4*REG_EPC_NDX)
+#  define REG_X1            (4*REG_X1_NDX)
+#  define REG_X2            (4*REG_X2_NDX)
+#  define REG_X3            (4*REG_X3_NDX)
+#  define REG_X4            (4*REG_X4_NDX)
+#  define REG_X5            (4*REG_X5_NDX)
+#  define REG_X6            (4*REG_X6_NDX)
+#  define REG_X7            (4*REG_X7_NDX)
+#  define REG_X8            (4*REG_X8_NDX)
+#  define REG_X9            (4*REG_X9_NDX)
+#  define REG_X10           (4*REG_X10_NDX)
+#  define REG_X11           (4*REG_X11_NDX)
+#  define REG_X12           (4*REG_X12_NDX)
+#  define REG_X13           (4*REG_X13_NDX)
+#  define REG_X14           (4*REG_X14_NDX)
+#  define REG_X15           (4*REG_X15_NDX)
+#  define REG_X16           (4*REG_X16_NDX)
+#  define REG_X17           (4*REG_X17_NDX)
+#  define REG_X18           (4*REG_X18_NDX)
+#  define REG_X19           (4*REG_X19_NDX)
+#  define REG_X20           (4*REG_X20_NDX)
+#  define REG_X21           (4*REG_X21_NDX)
+#  define REG_X22           (4*REG_X22_NDX)
+#  define REG_X23           (4*REG_X23_NDX)
+#  define REG_X24           (4*REG_X24_NDX)
+#  define REG_X25           (4*REG_X25_NDX)
+#  define REG_X26           (4*REG_X26_NDX)
+#  define REG_X27           (4*REG_X27_NDX)
+#  define REG_X28           (4*REG_X28_NDX)
+#  define REG_X29           (4*REG_X29_NDX)
+#  define REG_X30           (4*REG_X30_NDX)
+#  define REG_X31           (4*REG_X31_NDX)
+#  define REG_INT_CTX       (4*REG_INT_CTX_NDX)
+#else
+#  define REG_EPC           REG_EPC_NDX
+#  define REG_X1            REG_X1_NDX
+#  define REG_X2            REG_X2_NDX
+#  define REG_X3            REG_X3_NDX
+#  define REG_X4            REG_X4_NDX
+#  define REG_X5            REG_X5_NDX
+#  define REG_X6            REG_X6_NDX
+#  define REG_X7            REG_X7_NDX
+#  define REG_X8            REG_X8_NDX
+#  define REG_X9            REG_X9_NDX
+#  define REG_X10           REG_X10_NDX
+#  define REG_X11           REG_X11_NDX
+#  define REG_X12           REG_X12_NDX
+#  define REG_X13           REG_X13_NDX
+#  define REG_X14           REG_X14_NDX
+#  define REG_X15           REG_X15_NDX
+#  define REG_X16           REG_X16_NDX
+#  define REG_X17           REG_X17_NDX
+#  define REG_X18           REG_X18_NDX
+#  define REG_X19           REG_X19_NDX
+#  define REG_X20           REG_X20_NDX
+#  define REG_X21           REG_X21_NDX
+#  define REG_X22           REG_X22_NDX
+#  define REG_X23           REG_X23_NDX
+#  define REG_X24           REG_X24_NDX
+#  define REG_X25           REG_X25_NDX
+#  define REG_X26           REG_X26_NDX
+#  define REG_X27           REG_X27_NDX
+#  define REG_X28           REG_X28_NDX
+#  define REG_X29           REG_X29_NDX
+#  define REG_X30           REG_X30_NDX
+#  define REG_X31           REG_X31_NDX
+#  define REG_INT_CTX       REG_INT_CTX_NDX
+#endif
+
+/* Now define more user friendly alternative name that can be used either
+ * in assembly or C contexts.
+ */
+
+/* $1 = ra: Return address */
+
+#define REG_RA              REG_X1
+
+/* $2 = sp:  The value of the stack pointer on return from the exception */
+
+#define REG_SP              REG_X2
+
+/* $3 = gp: Only needs to be saved under conditions where there are
+ * multiple, per-thread values for the GP.
+ */
+
+#define REG_GP              REG_X3
+
+/* $4 = tp:  Thread Pointer */
+
+#define REG_TP              REG_X4
+
+/* $5-$7 = t0-t2: Caller saved temporary registers */
+
+#define REG_T0              REG_X5
+#define REG_T1              REG_X6
+#define REG_T2              REG_X7
+
+/* $8 = either s0 or fp:  Depends if a frame pointer is used or not */
+
+#define REG_S0              REG_X8
+#define REG_FP              REG_X8
+
+/* $9 = s1: Caller saved register */
+
+#define REG_S1              REG_X9
+
+/* $10-$17 = a0-a7: Argument registers */
+
+#define REG_A0              REG_X10
+#define REG_A1              REG_X11
+#define REG_A2              REG_X12
+#define REG_A3              REG_X13
+#define REG_A4              REG_X14
+#define REG_A5              REG_X15
+#define REG_A6              REG_X16
+#define REG_A7              REG_X17
+
+/* $18-$27 = s2-s11: Callee saved registers */
+
+#define REG_S2              REG_X18
+#define REG_S3              REG_X19
+#define REG_S4              REG_X20
+#define REG_S5              REG_X21
+#define REG_S6              REG_X22
+#define REG_S7              REG_X23
+#define REG_S8              REG_X24
+#define REG_S9              REG_X25
+#define REG_S10             REG_X26
+#define REG_S11             REG_X27
+
+/* $28-$31 = t3-t6: Caller saved temporary registers */
+
+#define REG_T3              REG_X28
+#define REG_T4              REG_X29
+#define REG_T5              REG_X30
+#define REG_T6              REG_X31
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/* This structure represents the return state from a system call */
+
+#ifdef CONFIG_BUILD_KERNEL
+struct xcpt_syscall_s
+{
+  uint32_t sysreturn;   /* The return PC */
+};
+#endif
+
+/* The following structure is included in the TCB and defines the complete
+ * state of the thread.
+ */
+
+struct xcptcontext
+{
+#ifndef CONFIG_DISABLE_SIGNALS
+  /* The following function pointer is non-NULL if there are pending signals
+   * to be processed.
+   */
+
+  void *sigdeliver; /* Actual type is sig_deliver_t */
+
+  /* These additional register save locations are used to implement the
+   * signal delivery trampoline.
+   */
+
+  uint32_t saved_epc;     /* Trampoline PC */
+  uint32_t saved_int_ctx; /* Interrupt context with interrupts disabled. */
+
+# ifdef CONFIG_BUILD_KERNEL
+  /* This is the saved address to use when returning from a user-space
+   * signal handler.
+   */
+
+  uint32_t sigreturn;
+
+# endif
+#endif
+
+#ifdef CONFIG_BUILD_KERNEL
+  /* The following array holds information needed to return from each nested
+   * system call.
+   */
+
+  uint8_t nsyscalls;
+  struct xcpt_syscall_s syscall[CONFIG_SYS_NNEST];
+
+#endif
+
+  /* Register save area */
+
+  uint32_t regs[XCPTCONTEXT_REGS];
+};
+
+#endif   /* __ASSEMBLY__ */
+
+/****************************************************************************
+ * Public Variables
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#endif /* __ARCH_RISCV_INCLUDE_RV32IM_IRQ_H */
+
diff --git a/arch/risc-v/include/rv32im/syscall.h b/arch/risc-v/include/rv32im/syscall.h
new file mode 100644
index 0000000000000000000000000000000000000000..5269b21e8770caee0c4c32ac7608da100d8ec81f
--- /dev/null
+++ b/arch/risc-v/include/rv32im/syscall.h
@@ -0,0 +1,208 @@
+/****************************************************************************
+ * arch/risc-v/include/rv32im/syscall.h
+ *
+ *   Copyright (C) 2011-2013, 2015 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through include/syscall.h or include/sys/sycall.h
+ */
+
+#ifndef __ARCH_RISCV_INCLUDE_RV32IM_SYSCALL_H
+#define __ARCH_RISCV_INCLUDE_RV32IM_SYSCALL_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#ifndef __ASSEMBLY__
+#  include 
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define SYS_syscall 0x00
+
+/* Configuration ********************************************************************/
+/* SYS call 1 and 2 are defined for internal use by the RISC-V port (see
+ * arch/riscv/include/mips32/syscall.h).  In addition, SYS call 3 is the return from
+ * a SYS call in kernel mode.  The first four syscall values must, therefore, be
+ * reserved (0 is not used).
+ */
+
+#ifdef CONFIG_BUILD_KERNEL
+#  ifndef CONFIG_SYS_RESERVED
+#    error "CONFIG_SYS_RESERVED must be defined to the value 4"
+#  elif CONFIG_SYS_RESERVED != 4
+#    error "CONFIG_SYS_RESERVED must have the value 4"
+#  endif
+#endif
+
+/* sys_call macros ******************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/* Context switching system calls ***************************************************/
+
+/* SYS call 0: (not used) */
+
+/* SYS call 1:
+ *
+ * void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
+ */
+
+#define SYS_restore_context (1)
+#define up_fullcontextrestore(restoreregs) \
+  (void)sys_call1(SYS_restore_context, (uintptr_t)restoreregs)
+
+/* SYS call 2:
+ *
+ * void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
+ */
+
+#define SYS_switch_context (2)
+#define up_switchcontext(saveregs, restoreregs) \
+  (void)sys_call2(SYS_switch_context, (uintptr_t)saveregs, (uintptr_t)restoreregs)
+
+#ifdef CONFIG_BUILD_KERNEL
+/* SYS call 3:
+ *
+ * void up_syscall_return(void);
+ */
+
+#define SYS_syscall_return (3)
+#define up_syscall_return() (void)sys_call0(SYS_syscall_return)
+
+#endif
+#endif /* __ASSEMBLY__ */
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: up_syscall0
+ *
+ * Description:
+ *   System call SYS_ argument and no additional parameters.
+ *
+ ****************************************************************************/
+
+uintptr_t sys_call0(unsigned int nbr);
+
+/****************************************************************************
+ * Name: up_syscall1
+ *
+ * Description:
+ *   System call SYS_ argument and one additional parameter.
+ *
+ ****************************************************************************/
+
+uintptr_t sys_call1(unsigned int nbr, uintptr_t parm1);
+
+/****************************************************************************
+ * Name: up_syscall2
+ *
+ * Description:
+ *   System call SYS_ argument and two additional parameters.
+ *
+ ****************************************************************************/
+
+uintptr_t sys_call2(unsigned int nbr, uintptr_t parm1, uintptr_t parm2);
+
+/****************************************************************************
+ * Name: up_syscall3
+ *
+ * Description:
+ *   System call SYS_ argument and three additional parameters.
+ *
+ ****************************************************************************/
+
+uintptr_t sys_call3(unsigned int nbr, uintptr_t parm1, uintptr_t parm2,
+                    uintptr_t parm3);
+
+/****************************************************************************
+ * Name: up_syscall4
+ *
+ * Description:
+ *   System call SYS_ argument and four additional parameters.
+ *
+ ****************************************************************************/
+
+uintptr_t sys_call4(unsigned int nbr, uintptr_t parm1, uintptr_t parm2,
+                    uintptr_t parm3, uintptr_t parm4);
+
+/****************************************************************************
+ * Name: up_syscall5
+ *
+ * Description:
+ *   System call SYS_ argument and five additional parameters.
+ *
+ ****************************************************************************/
+
+uintptr_t sys_call5(unsigned int nbr, uintptr_t parm1, uintptr_t parm2,
+                    uintptr_t parm3, uintptr_t parm4, uintptr_t parm5);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_RISCV_INCLUDE_RV32IM_SYSCALL_H */
+
diff --git a/arch/risc-v/include/stdarg.h b/arch/risc-v/include/stdarg.h
new file mode 100644
index 0000000000000000000000000000000000000000..143009f2c21b3458db9e1a916e2a574cfb12350f
--- /dev/null
+++ b/arch/risc-v/include/stdarg.h
@@ -0,0 +1,59 @@
+/****************************************************************************
+ * arch/risc-v/include/stdarg.h
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISCV_INCLUDE_STDARG_H
+#define __ARCH_RISCV_INCLUDE_STDARG_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* This should work with any modern gcc (newer than 3.4 or so) */
+
+#define va_start(v,l)   __builtin_va_start(v,l)
+#define va_end(v)       __builtin_va_end(v)
+#define va_arg(v,l)     __builtin_va_arg(v,l)
+#define va_copy(d,s)    __builtin_va_copy(d,s)
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+typedef __builtin_va_list va_list;
+
+#endif /* __ARCH_RISCV_INCLUDE_STDARG_H */
diff --git a/arch/risc-v/include/syscall.h b/arch/risc-v/include/syscall.h
new file mode 100644
index 0000000000000000000000000000000000000000..1616cb46850475952f79ad77bb113eebeb12b815
--- /dev/null
+++ b/arch/risc-v/include/syscall.h
@@ -0,0 +1,91 @@
+/****************************************************************************
+ * arch/risc-v/include/syscall.h
+ *
+ *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ *   Modified 2016 by Ken Pettit for RISC-V architecture.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through include/syscall.h or include/sys/sycall.h
+ */
+
+#ifndef __ARCH_RISCV_INCLUDE_SYSCALL_H
+#define __ARCH_RISCV_INCLUDE_SYSCALL_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/* Include RISC-V architecture-specific syscall macros */
+
+#ifdef CONFIG_ARCH_RV32IM
+# include 
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_RISCV_INCLUDE_SYSCALL_H */
+
diff --git a/arch/risc-v/include/types.h b/arch/risc-v/include/types.h
new file mode 100644
index 0000000000000000000000000000000000000000..8b7b09457c85d23420bdf0277af0650babee1582
--- /dev/null
+++ b/arch/risc-v/include/types.h
@@ -0,0 +1,96 @@
+/****************************************************************************
+ * arch/risc-v/include/types.h
+ *
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through sys/types.h
+ */
+
+#ifndef __ARCH_RISCV_INCLUDE_TYPES_H
+#define __ARCH_RISCV_INCLUDE_TYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+//#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Type Declarations
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/* These are the sizes of the standard integer types.  NOTE that these type
+ * names have a leading underscore character.  This file will be included
+ * (indirectly) by include/stdint.h and typedef'ed to the final name without
+ * the underscore character.  This roundabout way of doings things allows
+ * the stdint.h to be removed from the include/ directory in the event that
+ * the user prefers to use the definitions provided by their toolchain header
+ * files
+ */
+
+typedef signed char        _int8_t;
+typedef unsigned char      _uint8_t;
+
+typedef signed short       _int16_t;
+typedef unsigned short     _uint16_t;
+
+typedef signed int         _int32_t;
+typedef unsigned int       _uint32_t;
+
+typedef signed long long   _int64_t;
+typedef unsigned long long _uint64_t;
+#define __INT64_DEFINED
+
+/* A pointer is 4 bytes */
+
+typedef signed int         _intptr_t;
+typedef unsigned int       _uintptr_t;
+
+/* This is the size of the interrupt state save returned by irqsave().  */
+
+typedef unsigned int       irqstate_t;
+
+#endif /* __ASSEMBLY__ */
+
+/****************************************************************************
+ * Global Function Prototypes
+ ****************************************************************************/
+
+#endif /* __ARCH_RISCV_INCLUDE_TYPES_H */
diff --git a/arch/risc-v/src/Makefile b/arch/risc-v/src/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..e5916c3534263fc8ad0f869b723a3245827f0f39
--- /dev/null
+++ b/arch/risc-v/src/Makefile
@@ -0,0 +1,232 @@
+############################################################################
+# arch/risc-v/src/Makefile
+#
+#   Copyright (C) 2011-2012, 2014, 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+#   Modified for RISC-V:
+#
+#   Copyright (C) 2016 Ken Pettit. All rights reserved.
+#   Author: Ken Pettit 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include $(TOPDIR)/Make.defs
+include chip/Make.defs
+
+ifeq ($(CONFIG_ARCH_RV32I),y)           # Base Integer support
+ARCH_SUBDIR = rv32i
+else ifeq ($(CONFIG_ARCH_RV32IM),y)     # Integer + math support
+ARCH_SUBDIR = rv32im
+else                                    
+ARCH_SUBDIR = rv32i                     # Default to base RV32I core
+endif
+
+CPPFLAGS += $(EXTRADEFINES)
+CFLAGS += $(EXTRADEFINES)
+CXXFLAGS += $(EXTRADEFINES)
+
+ifeq ($(CONFIG_WINDOWS_NATIVE),y)
+  ARCH_SRCDIR = $(TOPDIR)\arch\$(CONFIG_ARCH)\src
+  NUTTX = "$(TOPDIR)\nuttx$(EXEEXT)"
+  CFLAGS += -I$(ARCH_SRCDIR)\chip
+  CFLAGS += -I$(ARCH_SRCDIR)\common
+  CFLAGS += -I$(ARCH_SRCDIR)\$(ARCH_SUBDIR)
+  CFLAGS += -I$(TOPDIR)\sched
+else
+  ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src
+ifeq ($(WINTOOL),y)
+  NUTTX = "${shell cygpath -w $(TOPDIR)/nuttx$(EXEEXT)}"
+  CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}"
+  CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/common}"
+  CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/$(ARCH_SUBDIR)}"
+  CFLAGS += -I "${shell cygpath -w $(TOPDIR)/sched}"
+else
+  NUTTX = "$(TOPDIR)/nuttx$(EXEEXT)"
+  CFLAGS += -I$(ARCH_SRCDIR)/chip
+  CFLAGS += -I$(ARCH_SRCDIR)/common
+  CFLAGS += -I$(ARCH_SRCDIR)/$(ARCH_SUBDIR)
+  CFLAGS += -I$(TOPDIR)/sched
+endif
+endif
+
+# The "head" object
+
+HEAD_OBJ = $(HEAD_ASRC:.S=$(OBJEXT))
+STARTUP_OBJS ?= $(HEAD_OBJ)
+
+# Flat build or kernel-mode objects
+
+ASRCS = $(CHIP_ASRCS) $(CMN_ASRCS)
+AOBJS = $(ASRCS:.S=$(OBJEXT))
+
+CSRCS = $(CHIP_CSRCS) $(CMN_CSRCS)
+COBJS = $(CSRCS:.c=$(OBJEXT))
+
+SRCS = $(ASRCS) $(CSRCS)
+OBJS = $(AOBJS) $(COBJS)
+
+# User-mode objects
+
+UASRCS = $(CHIP_UASRCS) $(CMN_UASRCS)
+UAOBJS = $(UASRCS:.S=$(OBJEXT))
+
+UCSRCS = $(CHIP_UCSRCS) $(CMN_UCSRCS)
+UCOBJS = $(UCSRCS:.c=$(OBJEXT))
+
+USRCS = $(UASRCS) $(UCSRCS)
+UOBJS = $(UAOBJS) $(UCOBJS)
+
+KBIN = libkarch$(LIBEXT)
+UBIN = libuarch$(LIBEXT)
+BIN  = libarch$(LIBEXT)
+
+LDFLAGS += $(ARCHSCRIPT)
+
+EXTRA_LIBS ?=
+EXTRA_LIBPATHS ?=
+LINKLIBS ?=
+
+AFLAGS += -I$(TOPDIR)/include
+
+ifeq ($(CONFIG_WINDOWS_NATIVE),y)
+  BOARDMAKE = $(if $(wildcard .\board\Makefile),y,)
+  LIBPATHS += -L"$(TOPDIR)\lib"
+ifeq ($(BOARDMAKE),y)
+  LIBPATHS += -L"$(TOPDIR)\arch\$(CONFIG_ARCH)\src\board"
+endif
+
+else
+  BOARDMAKE = $(if $(wildcard ./board/Makefile),y,)
+
+ifeq ($(WINTOOL),y)
+  LIBPATHS += -L"${shell cygpath -w "$(TOPDIR)/lib"}"
+ifeq ($(BOARDMAKE),y)
+  LIBPATHS += -L"${shell cygpath -w "$(TOPDIR)/arch/$(CONFIG_ARCH)/src/board"}"
+endif
+
+else
+  LIBPATHS += -L"$(TOPDIR)/lib"
+ifeq ($(BOARDMAKE),y)
+  LIBPATHS += -L"$(TOPDIR)/arch/$(CONFIG_ARCH)/src/board"
+endif
+endif
+endif
+
+LDLIBS = $(patsubst %.a,%,$(patsubst lib%,-l%,$(LINKLIBS)))
+ifeq ($(BOARDMAKE),y)
+  LDLIBS += -lboard
+endif
+
+LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}"
+GCC_LIBDIR := ${shell dirname $(LIBGCC)}
+
+VPATH += chip
+VPATH += common
+VPATH += $(ARCH_SUBDIR)
+VPATH += $(CHIP_DIR)
+
+all: $(HEAD_OBJ) $(BIN)
+
+.PHONY: board/libboard$(LIBEXT) 
+
+$(AOBJS) $(UAOBJS) $(HEAD_OBJ): %$(OBJEXT): %.S
+	$(call ASSEMBLE, $<, $@)
+
+$(COBJS) $(UCOBJS): %$(OBJEXT): %.c
+	$(call COMPILE, $<, $@)
+
+$(BIN) $(KBIN): $(OBJS)
+	$(call ARCHIVE, $@, $(OBJS))
+	@$(MAKE) depend 
+
+$(UBIN): $(UOBJS)
+	$(call ARCHIVE, $@, $(UOBJS))
+
+board/libboard$(LIBEXT):
+	$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" libboard$(LIBEXT) EXTRADEFINES=$(EXTRADEFINES)
+
+nuttx$(EXEEXT): $(HEAD_OBJ) board/libboard$(LIBEXT)
+	$(Q) echo "LD: nuttx"
+	$(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) $(EXTRA_LIBPATHS) \
+		-o $(NUTTX) $(HEAD_OBJ) $(EXTRA_OBJS) \
+		--start-group $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) --end-group
+ifneq ($(CONFIG_WINDOWS_NATIVE),y)
+	$(Q) $(NM) $(NUTTX) | \
+	grep -v '\(compiled\)\|\(\$(OBJEXT)$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
+	sort > $(TOPDIR)/System.map
+endif
+
+# This is part of the top-level export target
+# Note that there may not be a head object if layout is handled
+# by the linker configuration.
+
+export_startup: board/libboard$(LIBEXT) $(STARTUP_OBJS)
+ifneq ($(STARTUP_OBJS),)
+	$(Q) if [ -d "$(EXPORT_DIR)/startup" ]; then \
+		cp -f $(STARTUP_OBJS) "$(EXPORT_DIR)/startup/."; \
+	 else \
+		echo "$(EXPORT_DIR)/startup does not exist"; \
+	exit 1; \
+	fi
+endif
+
+# Dependencies
+
+.depend: Makefile $(SRCS)
+ifeq ($(BOARDMAKE),y)
+	$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" depend
+endif
+	$(Q) $(MKDEP) $(patsubst %,--dep-path %,$(subst :, ,$(VPATH))) \
+	 "$(CC)" -- $(CFLAGS) -- $(SRCS) > Make.dep
+	$(Q) touch $@
+
+depend: .depend
+
+clean:
+ifeq ($(BOARDMAKE),y)
+	$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" clean
+endif
+	$(call DELFILE, $(KBIN))
+	$(call DELFILE, $(UBIN))
+	$(call DELFILE, $(BIN))
+	$(call DELFILE, $(HEAD_OBJ))
+	$(call CLEAN)
+
+distclean: clean
+ifeq ($(BOARDMAKE),y)
+	$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" distclean
+endif
+	$(call DELFILE, Make.dep)
+	$(call DELFILE, .depend)
+
+info:
+	@echo $(HEAD_OBJ)
+	@echo $(ASRCS)
+	@echo $(CONFIG_ARCH_CHIP)
+
+#-include Make.dep
diff --git a/arch/risc-v/src/common/up_allocateheap.c b/arch/risc-v/src/common/up_allocateheap.c
new file mode 100644
index 0000000000000000000000000000000000000000..002c853cd06f7432b967726cc91d6ad5d7104205
--- /dev/null
+++ b/arch/risc-v/src/common/up_allocateheap.c
@@ -0,0 +1,88 @@
+/****************************************************************************
+ * arch/risc-v/src/common/up_allocateheap.c
+ *
+ *   Copyright (C) 2010, 2013, 2015 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "up_arch.h"
+#include "up_internal.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_allocate_heap
+ *
+ * Description:
+ *   This function will be called to dynamically set aside the heap region.
+ *
+ *   For the kernel build (CONFIG_BUILD_KERNEL=y) with both kernel- and
+ *   user-space heaps (CONFIG_MM_KERNEL_HEAP=y), this function provides the
+ *   size of the unprotected, user-space heap.
+ *
+ *   If a protected kernel-space heap is provided, the kernel heap must be
+ *   allocated (and protected) by an analogous up_allocate_kheap().
+ *
+ ****************************************************************************/
+
+void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
+{
+  board_autoled_on(LED_HEAPALLOCATE);
+  *heap_start = (FAR void *)g_idle_topstack;
+  *heap_size = CONFIG_RAM_END - g_idle_topstack;
+}
diff --git a/arch/risc-v/src/common/up_arch.h b/arch/risc-v/src/common/up_arch.h
new file mode 100644
index 0000000000000000000000000000000000000000..fc602193450c75108b6726a3aa3c81a1fe9917fe
--- /dev/null
+++ b/arch/risc-v/src/common/up_arch.h
@@ -0,0 +1,70 @@
+/****************************************************************************
+ * arch/risc-v/src/common/up_arch.h
+ *
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef ___ARCH_RISCV_SRC_COMMON_UP_ARCH_H
+#define ___ARCH_RISCV_SRC_COMMON_UP_ARCH_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#ifndef __ASSEMBLY__
+# include 
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Inline Functions
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+# define getreg8(a)           (*(volatile uint8_t *)(a))
+# define putreg8(v,a)         (*(volatile uint8_t *)(a) = (v))
+# define getreg16(a)          (*(volatile uint16_t *)(a))
+# define putreg16(v,a)        (*(volatile uint16_t *)(a) = (v))
+# define getreg32(a)          (*(volatile uint32_t *)(a))
+# define putreg32(v,a)        (*(volatile uint32_t *)(a) = (v))
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#endif /* __ASSEMBLY__ */
+#endif  /* ___ARCH_ARM_SRC_COMMON_UP_ARCH_H */
diff --git a/arch/risc-v/src/common/up_createstack.c b/arch/risc-v/src/common/up_createstack.c
new file mode 100644
index 0000000000000000000000000000000000000000..494d54e4abcb3fe16b5809f51dd6a902acd3132d
--- /dev/null
+++ b/arch/risc-v/src/common/up_createstack.c
@@ -0,0 +1,214 @@
+/****************************************************************************
+ * arch/riscv/src/common/up_createstack.c
+ *
+ *   Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "up_arch.h"
+#include "up_internal.h"
+
+/****************************************************************************
+ * Pre-processor Macros
+ ****************************************************************************/
+
+/* MIPS requires at least a 4-byte stack alignment.  For floating point use,
+ * however, the stack must be aligned to 8-byte addresses.
+ */
+
+#ifdef CONFIG_LIBC_FLOATINGPOINT
+#  define STACK_ALIGNMENT   8
+#else
+#  define STACK_ALIGNMENT   4
+#endif
+
+/* Stack alignment macros */
+
+#define STACK_ALIGN_MASK    (STACK_ALIGNMENT-1)
+#define STACK_ALIGN_DOWN(a) ((a) & ~STACK_ALIGN_MASK)
+#define STACK_ALIGN_UP(a)   (((a) + STACK_ALIGN_MASK) & ~STACK_ALIGN_MASK)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_create_stack
+ *
+ * Description:
+ *   Allocate a stack for a new thread and setup up stack-related information
+ *   in the TCB.
+ *
+ *   The following TCB fields must be initialized by this function:
+ *
+ *   - adj_stack_size: Stack size after adjustment for hardware, processor,
+ *     etc.  This value is retained only for debug purposes.
+ *   - stack_alloc_ptr: Pointer to allocated stack
+ *   - adj_stack_ptr: Adjusted stack_alloc_ptr for HW.  The initial value of
+ *     the stack pointer.
+ *
+ * Inputs:
+ *   - tcb: The TCB of new task
+ *   - stack_size:  The requested stack size.  At least this much
+ *     must be allocated.
+ *   - ttype:  The thread type.  This may be one of following (defined in
+ *     include/nuttx/sched.h):
+ *
+ *       TCB_FLAG_TTYPE_TASK     Normal user task
+ *       TCB_FLAG_TTYPE_PTHREAD  User pthread
+ *       TCB_FLAG_TTYPE_KERNEL   Kernel thread
+ *
+ *     This thread type is normally available in the flags field of the TCB,
+ *     however, there are certain contexts where the TCB may not be fully
+ *     initialized when up_create_stack is called.
+ *
+ *     If CONFIG_BUILD_KERNEL is defined, then this thread type may affect
+ *     how the stack is allocated.  For example, kernel thread stacks should
+ *     be allocated from protected kernel memory.  Stacks for user tasks and
+ *     threads must come from memory that is accessible to user code.
+ *
+ ****************************************************************************/
+
+int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
+{
+  /* Is there already a stack allocated of a different size?  Because of
+   * alignment issues, stack_size might erroneously appear to be of a
+   * different size.  Fortunately, this is not a critical operation.
+   */
+
+  if (tcb->stack_alloc_ptr && tcb->adj_stack_size != stack_size)
+    {
+      /* Yes.. Release the old stack */
+
+      up_release_stack(tcb, ttype);
+    }
+
+  /* Do we need to allocate a new stack? */
+
+  if (!tcb->stack_alloc_ptr)
+    {
+      /* Allocate the stack.  If DEBUG is enabled (but not stack debug),
+       * then create a zeroed stack to make stack dumps easier to trace.
+       */
+
+#if defined(CONFIG_BUILD_KERNEL) && defined(CONFIG_MM_KERNEL_HEAP)
+      /* Use the kernel allocator if this is a kernel thread */
+
+      if (ttype == TCB_FLAG_TTYPE_KERNEL)
+        {
+          tcb->stack_alloc_ptr = (uint32_t *)kmm_malloc(stack_size);
+        }
+      else
+#endif
+        {
+          /* Use the user-space allocator if this is a task or pthread */
+
+          tcb->stack_alloc_ptr = (uint32_t *)kumm_malloc(stack_size);
+        }
+
+#ifdef CONFIG_DEBUG_FEATURES
+      /* Was the allocation successful? */
+
+      if (!tcb->stack_alloc_ptr)
+        {
+          serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
+        }
+#endif
+    }
+
+  /* Did we successfully allocate a stack? */
+
+  if (tcb->stack_alloc_ptr)
+    {
+      size_t top_of_stack;
+      size_t size_of_stack;
+
+      /* Yes.. If stack debug is enabled, then fill the stack with a
+       * recognizable value that we can use later to test for high
+       * water marks.
+       */
+
+#ifdef CONFIG_STACK_COLORATION
+      memset(tcb->stack_alloc_ptr, 0xaa, stack_size);
+#endif
+
+      /* MIPS uses a push-down stack:  the stack grows toward lower
+       * addresses in memory.  The stack pointer register points to the
+       * lowest, valid working address (the "top" of the stack).  Items on
+       * the stack are referenced as positive word offsets from sp.
+       */
+
+      top_of_stack = (uint32_t)tcb->stack_alloc_ptr + stack_size - 4;
+
+      /* The MIPS stack must be aligned at word (4 byte) boundaries; for
+       * floating point use, the stack must be aligned to 8-byte addresses.
+       * If necessary top_of_stack must be rounded down to the next
+       * boundary to meet these alignment requirements.
+       */
+
+      top_of_stack = STACK_ALIGN_DOWN(top_of_stack);
+      size_of_stack = top_of_stack - (uint32_t)tcb->stack_alloc_ptr + 4;
+
+      /* Save the adjusted stack values in the struct tcb_s */
+
+      tcb->adj_stack_ptr  = (FAR uint32_t *)top_of_stack;
+      tcb->adj_stack_size = size_of_stack;
+
+      board_autoled_on(LED_STACKCREATED);
+      return OK;
+    }
+
+   return ERROR;
+}
diff --git a/arch/risc-v/src/common/up_exit.c b/arch/risc-v/src/common/up_exit.c
new file mode 100644
index 0000000000000000000000000000000000000000..5456012aeee9a386f598b5a086bcfece405a4734
--- /dev/null
+++ b/arch/risc-v/src/common/up_exit.c
@@ -0,0 +1,194 @@
+/****************************************************************************
+ * arch/risc-v/src/common/up_exit.c
+ *
+ *   Copyright (C) 2011, 2013-2014, 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#ifdef CONFIG_DUMP_ON_EXIT
+#  include 
+#endif
+
+#include "task/task.h"
+#include "sched/sched.h"
+#include "group/group.h"
+#include "up_internal.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef CONFIG_DEBUG_SCHED_INFO
+#  undef CONFIG_DUMP_ON_EXIT
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: _up_dumponexit
+ *
+ * Description:
+ *   Dump the state of all tasks whenever on task exits.  This is debug
+ *   instrumentation that was added to check file-related reference counting
+ *   but could be useful again sometime in the future.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DUMP_ON_EXIT
+static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
+{
+#if CONFIG_NFILE_DESCRIPTORS > 0
+  FAR struct filelist *filelist;
+#if CONFIG_NFILE_STREAMS > 0
+  FAR struct streamlist *streamlist;
+#endif
+  int i;
+#endif
+
+  sinfo("  TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
+  sinfo("    priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
+
+#if CONFIG_NFILE_DESCRIPTORS > 0
+  filelist = tcb->group->tg_filelist;
+  for (i = 0; i < CONFIG_NFILE_DESCRIPTORS; i++)
+    {
+      struct inode *inode = filelist->fl_files[i].f_inode;
+      if (inode)
+        {
+          sinfo("      fd=%d refcount=%d\n",
+                i, inode->i_crefs);
+        }
+    }
+#endif
+
+#if CONFIG_NFILE_STREAMS > 0
+  streamlist = tcb->group->tg_streamlist;
+  for (i = 0; i < CONFIG_NFILE_STREAMS; i++)
+    {
+      struct file_struct *filep = &streamlist->sl_streams[i];
+      if (filep->fs_fd >= 0)
+        {
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
+          if (filep->fs_bufstart != NULL)
+            {
+              sinfo("      fd=%d nbytes=%d\n",
+                    filep->fs_fd,
+                    filep->fs_bufpos - filep->fs_bufstart);
+            }
+          else
+#endif
+            {
+              sinfo("      fd=%d\n", filep->fs_fd);
+            }
+        }
+    }
+#endif
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: _exit
+ *
+ * Description:
+ *   This function causes the currently executing task to cease
+ *   to exist.  This is a special case of task_delete() where the task to
+ *   be deleted is the currently executing task.  It is more complex because
+ *   a context switch must be perform to the next ready to run task.
+ *
+ ****************************************************************************/
+
+void _exit(int status)
+{
+  struct tcb_s *tcb;
+
+  /* Make sure that we are in a critical section with local interrupts.
+   * The IRQ state will be restored when the next task is started.
+   */
+
+  (void)enter_critical_section();
+
+  sinfo("TCB=%p exiting\n", this_task());
+
+#ifdef CONFIG_DUMP_ON_EXIT
+  sinfo("Other tasks:\n");
+  sched_foreach(_up_dumponexit, NULL);
+#endif
+
+  /* Destroy the task at the head of the ready to run list. */
+
+  (void)task_exit();
+
+  /* Now, perform the context switch to the new ready-to-run task at the
+   * head of the list.
+   */
+
+  tcb = this_task();
+
+#ifdef CONFIG_ARCH_ADDRENV
+  /* Make sure that the address environment for the previously running
+   * task is closed down gracefully (data caches dump, MMU flushed) and
+   * set up the address environment for the new thread at the head of
+   * the ready-to-run list.
+   */
+
+  (void)group_addrenv(tcb);
+#endif
+
+  /* Then switch contexts */
+
+  up_fullcontextrestore(tcb->xcp.regs);
+
+  /* up_fullcontextrestore() should not return but could if the software
+   * interrupts are disabled.
+   */
+
+  PANIC();
+}
+
diff --git a/arch/risc-v/src/common/up_idle.c b/arch/risc-v/src/common/up_idle.c
new file mode 100644
index 0000000000000000000000000000000000000000..0c8a867d79f06df3095dbfea5ba76842ae4df8a3
--- /dev/null
+++ b/arch/risc-v/src/common/up_idle.c
@@ -0,0 +1,95 @@
+/****************************************************************************
+ *  arch/risc-v/src/common/up_idle.c
+ *
+ *   Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+#include "up_internal.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_idle
+ *
+ * Description:
+ *   up_idle() is the logic that will be executed when their is no other
+ *   ready-to-run task.  This is processor idle time and will continue until
+ *   some interrupt occurs to cause a context switch from the idle task.
+ *
+ *   Processing in this state may be processor-specific. e.g., this is where
+ *   power management operations might be performed.
+ *
+ ****************************************************************************/
+
+void up_idle(void)
+{
+#if defined(CONFIG_SUPPRESS_INTERRUPTS) || defined(CONFIG_SUPPRESS_TIMER_INTS)
+  /* If the system is idle and there are no timer interrupts, then process
+   * "fake" timer interrupts. Hopefully, something will wake up.
+   */
+
+  sched_process_timer();
+#else
+
+  /* This would be an appropriate place to put some MCU-specific logic to
+   * sleep in a reduced power mode until an interrupt occurs to save power
+   */
+
+  /* This is a kludge that I still don't understand.  The call to kmm_trysemaphore()
+   * in the os_start.c IDLE loop seems necessary for the good health of the IDLE
+   * loop.  When the work queue is enabled, this logic is removed from the IDLE
+   * loop and it appears that we are somehow left idling with interrupts non-
+   * functional. The following should be no-op, it just disables then re-enables
+   * interrupts.  But it fixes the problem and will stay here until I understand
+   * the problem/fix better.
+   *
+   * And no, the contents of the CP0 status register are not incorrect.  But for
+   * some reason the status register needs to be re-written again on this thread
+   * for it to take effect.  This might be a PIC32-only issue?
+   */
+
+#ifdef CONFIG_SCHED_WORKQUEUE
+  irqstate_t flags = enter_critical_section();
+  leave_critical_section(flags);
+#endif
+#endif
+}
diff --git a/arch/risc-v/src/common/up_initialize.c b/arch/risc-v/src/common/up_initialize.c
new file mode 100644
index 0000000000000000000000000000000000000000..205768b00d7898af2cb4d8b33538e0a2a8f341b4
--- /dev/null
+++ b/arch/risc-v/src/common/up_initialize.c
@@ -0,0 +1,203 @@
+/****************************************************************************
+ * arch/risc-v/src/common/up_initialize.c
+ *
+ *   Copyright (C) 2007-2010, 2012-2015 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include "up_arch.h"
+#include "up_internal.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_calibratedelay
+ *
+ * Description:
+ *   Delay loops are provided for short timing loops.  This function, if
+ *   enabled, will just wait for 100 seconds.  Using a stopwatch, you can
+ *   can then determine if the timing loops are properly calibrated.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG)
+static void up_calibratedelay(void)
+{
+  int i;
+  lldbg("Beginning 100s delay\n");
+  for (i = 0; i < 100; i++)
+    {
+      up_mdelay(1000);
+    }
+  lldbg("End 100s delay\n");
+}
+#else
+# define up_calibratedelay()
+#endif
+
+/****************************************************************************
+ * Name: up_color_intstack
+ *
+ * Description:
+ *   Set the interrupt stack to a value so that later we can determine how
+ *   much stack space was used by interrupt handling logic
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 3
+static inline void up_color_intstack(void)
+{
+  uint32_t *ptr = (uint32_t *)&g_intstackalloc;
+  ssize_t size;
+
+  for (size = (CONFIG_ARCH_INTERRUPTSTACK & ~3);
+       size > 0;
+       size -= sizeof(uint32_t))
+    {
+      *ptr++ = INTSTACK_COLOR;
+    }
+}
+#else
+#  define up_color_intstack()
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_initialize
+ *
+ * Description:
+ *   up_initialize will be called once during OS initialization after the
+ *   basic OS services have been initialized.  The architecture specific
+ *   details of initializing the OS will be handled here.  Such things as
+ *   setting up interrupt service routines, starting the clock, and
+ *   registering device drivers are some of the things that are different
+ *   for each processor and hardware platform.
+ *
+ *   up_initialize is called after the OS initialized but before the user
+ *   initialization logic has been started and before the libraries have
+ *   been initialized.  OS services and driver services are available.
+ *
+ ****************************************************************************/
+
+void up_initialize(void)
+{
+  /* Calibrate the timing loop */
+
+  up_calibratedelay();
+
+  /* Colorize the interrupt stack */
+
+  up_color_intstack();
+
+  /* Add any extra memory fragments to the memory manager */
+
+  up_addregion();
+
+  /* Initialize the interrupt subsystem */
+
+  up_irqinitialize();
+
+  /* Initialize the system timer interrupt */
+
+#if !defined(CONFIG_SUPPRESS_INTERRUPTS) && !defined(CONFIG_SUPPRESS_TIMER_INTS) && \
+    !defined(CONFIG_SYSTEMTICK_EXTCLK)
+  riscv_timer_initialize();
+#endif
+
+  /* Register devices */
+
+#if CONFIG_NFILE_DESCRIPTORS > 0
+
+#if defined(CONFIG_DEV_NULL)
+  devnull_register();   /* Standard /dev/null */
+#endif
+
+#if defined(CONFIG_DEV_ZERO)
+  devzero_register();   /* Standard /dev/zero */
+#endif
+
+#endif /* CONFIG_NFILE_DESCRIPTORS */
+
+  /* Initialize the serial device driver */
+
+#ifdef USE_SERIALDRIVER
+  up_serialinit();
+#endif
+
+  /* Initialize the console device driver (if it is other than the standard
+   * serial driver).
+   */
+
+#if defined(CONFIG_DEV_LOWCONSOLE)
+  lowconsole_init();
+#elif defined(CONFIG_SYSLOG_CONSOLE)
+  syslog_console_init();
+#elif defined(CONFIG_RAMLOG_CONSOLE)
+  ramlog_consoleinit();
+#endif
+
+  /* Initialize the system logging device */
+
+#ifdef CONFIG_SYSLOG_CHAR
+  syslog_initialize();
+#endif
+#ifdef CONFIG_RAMLOG_SYSLOG
+  ramlog_sysloginit();
+#endif
+
+  board_autoled_on(LED_IRQSENABLED);
+}
diff --git a/arch/risc-v/src/common/up_internal.h b/arch/risc-v/src/common/up_internal.h
new file mode 100644
index 0000000000000000000000000000000000000000..bf0fa917783669554f5e1e08c822bdbb944bb886
--- /dev/null
+++ b/arch/risc-v/src/common/up_internal.h
@@ -0,0 +1,163 @@
+/****************************************************************************
+ * arch/risc-v/src/common/up_internal.h
+ *
+ *   Copyright (C) 2007-2015 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ *   Modified for RISC-V:
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISCV_SRC_COMMON_UP_INTERNAL_H
+#define __ARCH_RISCV_SRC_COMMON_UP_INTERNAL_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#ifndef __ASSEMBLY__
+#  include 
+#  include 
+#  include 
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* This is the value used to mark the stack for subsequent stack monitoring
+ * logic.
+ */
+
+#define STACK_COLOR    0xdeadbeef
+#define INTSTACK_COLOR 0xdeadbeef
+#define HEAP_COLOR     'h'
+
+/* In the RISC_V model, the state is copied from the stack to the TCB, but
+ * only a referenced is passed to get the state from the TCB.
+ */
+
+#define up_savestate(regs)    up_copystate(regs, (uint32_t*)g_current_regs)
+#define up_restorestate(regs) (g_current_regs = regs)
+
+/* Determine which (if any) console driver to use.  If a console is enabled
+ * and no other console device is specified, then a serial console is
+ * assumed.
+ */
+
+#if !defined(CONFIG_DEV_CONSOLE) || CONFIG_NFILE_DESCRIPTORS <= 0
+#  undef  USE_SERIALDRIVER
+#  undef  USE_EARLYSERIALINIT
+#  undef  CONFIG_DEV_LOWCONSOLE
+#  undef  CONFIG_RAMLOG_CONSOLE
+#else
+#  if defined(CONFIG_RAMLOG_CONSOLE)
+#    undef  USE_SERIALDRIVER
+#    undef  USE_EARLYSERIALINIT
+#    undef  CONFIG_DEV_LOWCONSOLE
+#  elif defined(CONFIG_DEV_LOWCONSOLE)
+#    undef  USE_SERIALDRIVER
+#    undef  USE_EARLYSERIALINIT
+#  else
+#    define USE_SERIALDRIVER 1
+#    define USE_EARLYSERIALINIT 1
+#  endif
+#endif
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Variables
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+EXTERN volatile uint32_t *g_current_regs;
+EXTERN uint32_t g_idle_topstack;
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/* Low level initialization provided by board-level logic ******************/
+
+void up_boot(void);
+
+/* Memory allocation ********************************************************/
+
+void up_addregion(void);
+void up_allocat_eheap(FAR void **heap_start, size_t *heap_size);
+
+/* IRQ initialization *******************************************************/
+
+void up_irqinitialize(void);
+void up_copystate(uint32_t *dest, uint32_t *src);
+void up_dumpstate(void);
+void up_sigdeliver(void);
+int up_swint(int irq, FAR void *context, FAR void *arg);
+uint32_t up_get_newintctx(void);
+
+/* System timer *************************************************************/
+
+void riscv_timer_initialize(void);
+
+/* Low level serial output **************************************************/
+
+void up_lowputc(char ch);
+void up_puts(const char *str);
+void up_lowputs(const char *str);
+
+/* The OS start routine    **************************************************/
+
+void os_start(void);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ARCH_RISCV_SRC_COMMON_UP_INTERNAL_H */
diff --git a/arch/risc-v/src/common/up_interruptcontext.c b/arch/risc-v/src/common/up_interruptcontext.c
new file mode 100644
index 0000000000000000000000000000000000000000..8bdc595529a6d0663af6c0abacb2a657e499a963
--- /dev/null
+++ b/arch/risc-v/src/common/up_interruptcontext.c
@@ -0,0 +1,70 @@
+/****************************************************************************
+ *  arch/risc-v/src/common/up_interruptcontext.c
+ *
+ *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include "up_internal.h"
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_interrupt_context
+ *
+ * Description: Return true is we are currently executing in
+ * the interrupt handler context.
+ ****************************************************************************/
+
+bool up_interrupt_context(void)
+{
+   return g_current_regs != NULL;
+}
diff --git a/arch/risc-v/src/common/up_releasestack.c b/arch/risc-v/src/common/up_releasestack.c
new file mode 100644
index 0000000000000000000000000000000000000000..15301c49d2704a17134c257572df806930f73511
--- /dev/null
+++ b/arch/risc-v/src/common/up_releasestack.c
@@ -0,0 +1,122 @@
+/****************************************************************************
+ *  arch/risc-v/src/common/up_releasestack.c
+ *
+ *   Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "up_internal.h"
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_release_stack
+ *
+ * Description:
+ *   A task has been stopped. Free all stack related resources retained in
+ *   the defunct TCB.
+ *
+ * Input Parmeters
+ *   - dtcb:  The TCB containing information about the stack to be released
+ *   - ttype:  The thread type.  This may be one of following (defined in
+ *     include/nuttx/sched.h):
+ *
+ *       TCB_FLAG_TTYPE_TASK     Normal user task
+ *       TCB_FLAG_TTYPE_PTHREAD  User pthread
+ *       TCB_FLAG_TTYPE_KERNEL   Kernel thread
+ *
+ *     This thread type is normally available in the flags field of the TCB,
+ *     however, there are certain error recovery contexts where the TCB may
+ *     not be fully initialized when up_release_stack is called.
+ *
+ *     If CONFIG_BUILD_KERNEL is defined, then this thread type may affect
+ *     how the stack is freed.  For example, kernel thread stacks may have
+ *     been allocated from protected kernel memory.  Stacks for user tasks
+ *     and threads must have come from memory that is accessible to user
+ *     code.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void up_release_stack(FAR struct tcb_s *dtcb, uint8_t ttype)
+{
+  /* Is there a stack allocated? */
+
+  if (dtcb->stack_alloc_ptr)
+    {
+#if defined(CONFIG_BUILD_KERNEL) && defined(CONFIG_MM_KERNEL_HEAP)
+      /* Use the kernel allocator if this is a kernel thread */
+
+      if (ttype == TCB_FLAG_TTYPE_KERNEL)
+        {
+          sched_kfree(dtcb->stack_alloc_ptr);
+        }
+      else
+#endif
+        {
+          /* Use the user-space allocator if this is a task or pthread */
+
+          sched_ufree(dtcb->stack_alloc_ptr);
+        }
+
+      /* Mark the stack freed */
+
+      dtcb->stack_alloc_ptr = NULL;
+    }
+
+  /* The size of the allocated stack is now zero */
+
+  dtcb->adj_stack_size = 0;
+}
diff --git a/arch/risc-v/src/common/up_stackframe.c b/arch/risc-v/src/common/up_stackframe.c
new file mode 100644
index 0000000000000000000000000000000000000000..b3cb9801d4d2bdb09c73f01b627aa0168b291662
--- /dev/null
+++ b/arch/risc-v/src/common/up_stackframe.c
@@ -0,0 +1,143 @@
+/****************************************************************************
+ * arch/risc-v/src/common/up_stackframe.c
+ *
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "up_internal.h"
+
+/****************************************************************************
+ * Pre-processor Macros
+ ****************************************************************************/
+/* MIPS requires at least a 4-byte stack alignment.  For floating point use,
+ * however, the stack must be aligned to 8-byte addresses.
+ */
+
+#ifdef CONFIG_LIBC_FLOATINGPOINT
+#  define STACK_ALIGNMENT   8
+#else
+#  define STACK_ALIGNMENT   4
+#endif
+
+/* Stack alignment macros */
+
+#define STACK_ALIGN_MASK    (STACK_ALIGNMENT-1)
+#define STACK_ALIGN_DOWN(a) ((a) & ~STACK_ALIGN_MASK)
+#define STACK_ALIGN_UP(a)   (((a) + STACK_ALIGN_MASK) & ~STACK_ALIGN_MASK)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_stack_frame
+ *
+ * Description:
+ *   Allocate a stack frame in the TCB's stack to hold thread-specific data.
+ *   This function may be called anytime after up_create_stack() or
+ *   up_use_stack() have been called but before the task has been started.
+ *
+ *   Thread data may be kept in the stack (instead of in the TCB) if it is
+ *   accessed by the user code directly.  This includes such things as
+ *   argv[].  The stack memory is guaranteed to be in the same protection
+ *   domain as the thread.
+ *
+ *   The following TCB fields will be re-initialized:
+ *
+ *   - adj_stack_size: Stack size after removal of the stack frame from
+ *     the stack
+ *   - adj_stack_ptr: Adjusted initial stack pointer after the frame has
+ *     been removed from the stack.  This will still be the initial value
+ *     of the stack pointer when the task is started.
+ *
+ * Inputs:
+ *   - tcb:  The TCB of new task
+ *   - frame_size:  The size of the stack frame to allocate.
+ *
+ *  Returned Value:
+ *   - A pointer to bottom of the allocated stack frame.  NULL will be
+ *     returned on any failures.  The alignment of the returned value is
+ *     the same as the alignment of the stack itself.
+ *
+ ****************************************************************************/
+
+FAR void *up_stack_frame(FAR struct tcb_s *tcb, size_t frame_size)
+{
+  uintptr_t topaddr;
+
+  /* Align the frame_size */
+
+  frame_size = STACK_ALIGN_UP(frame_size);
+
+  /* Is there already a stack allocated? Is it big enough? */
+
+  if (!tcb->stack_alloc_ptr || tcb->adj_stack_size <= frame_size)
+    {
+      return NULL;
+    }
+
+  /* Save the adjusted stack values in the struct tcb_s */
+
+  topaddr               = (uintptr_t)tcb->adj_stack_ptr - frame_size;
+  tcb->adj_stack_ptr    = (FAR void *)topaddr;
+  tcb->adj_stack_size  -= frame_size;
+
+  /* Reset the initial stack pointer */
+
+  tcb->xcp.regs[REG_SP] = (uint32_t)tcb->adj_stack_ptr;
+
+  /* And return the pointer to the allocated region */
+
+  return (FAR void *)(topaddr + sizeof(uint32_t));
+}
+
diff --git a/arch/risc-v/src/common/up_usestack.c b/arch/risc-v/src/common/up_usestack.c
new file mode 100644
index 0000000000000000000000000000000000000000..605bb79b045ee06b3a29dc9b50571d252cd8aaac
--- /dev/null
+++ b/arch/risc-v/src/common/up_usestack.c
@@ -0,0 +1,152 @@
+/****************************************************************************
+ * arch/risc-v/src/common/up_usestack.c
+ *
+ *   Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "up_internal.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* MIPS requires at least a 4-byte stack alignment.  For floating point use,
+ * however, the stack must be aligned to 8-byte addresses.
+ */
+
+#ifdef CONFIG_LIBC_FLOATINGPOINT
+#  define STACK_ALIGNMENT   8
+#else
+#  define STACK_ALIGNMENT   4
+#endif
+
+/* Stack alignment macros */
+
+#define STACK_ALIGN_MASK    (STACK_ALIGNMENT-1)
+#define STACK_ALIGN_DOWN(a) ((a) & ~STACK_ALIGN_MASK)
+#define STACK_ALIGN_UP(a)   (((a) + STACK_ALIGN_MASK) & ~STACK_ALIGN_MASK)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_use_stack
+ *
+ * Description:
+ *   Setup up stack-related information in the TCB using pre-allocated stack
+ *   memory.  This function is called only from task_init() when a task or
+ *   kernel thread is started (never for pthreads).
+ *
+ *   The following TCB fields must be initialized:
+ *
+ *   - adj_stack_size: Stack size after adjustment for hardware,
+ *     processor, etc.  This value is retained only for debug
+ *     purposes.
+ *   - stack_alloc_ptr: Pointer to allocated stack
+ *   - adj_stack_ptr: Adjusted stack_alloc_ptr for HW.  The
+ *     initial value of the stack pointer.
+ *
+ * Inputs:
+ *   - tcb: The TCB of new task
+ *   - stack_size:  The allocated stack size.
+ *
+ *   NOTE:  Unlike up_stack_create() and up_stack_release, this function
+ *   does not require the task type (ttype) parameter.  The TCB flags will
+ *   always be set to provide the task type to up_use_stack() if it needs
+ *   that information.
+ *
+ ****************************************************************************/
+
+int up_use_stack(struct tcb_s *tcb, void *stack, size_t stack_size)
+{
+  size_t top_of_stack;
+  size_t size_of_stack;
+
+  /* Is there already a stack allocated? */
+
+  if (tcb->stack_alloc_ptr)
+    {
+      /* Yes.. Release the old stack allocation */
+
+      up_release_stack(tcb, tcb->flags & TCB_FLAG_TTYPE_MASK);
+    }
+
+  /* Save the new stack allocation */
+
+  tcb->stack_alloc_ptr = stack;
+
+  /* MIPS uses a push-down stack:  the stack grows toward loweraddresses in
+   * memory.  The stack pointer register, points to the lowest, valid work
+   * address (the "top" of the stack).  Items on the stack are referenced
+   * as positive word offsets from sp.
+   */
+
+  top_of_stack = (uint32_t)tcb->stack_alloc_ptr + stack_size - 4;
+
+  /* The MIPS stack must be aligned at word (4 byte) or double word (8 byte)
+   * boundaries. If necessary top_of_stack must be rounded down to the
+   * next boundary
+   */
+
+  top_of_stack = STACK_ALIGN_DOWN(top_of_stack);
+  size_of_stack = top_of_stack - (uint32_t)tcb->stack_alloc_ptr + 4;
+
+  /* Save the adjusted stack values in the struct tcb_s */
+
+  tcb->adj_stack_ptr  = (uint32_t *)top_of_stack;
+  tcb->adj_stack_size = size_of_stack;
+
+  return OK;
+}
diff --git a/arch/risc-v/src/nr5m100/Kconfig b/arch/risc-v/src/nr5m100/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..c54f950c6274f9b64a7a1fd1450f07df8b01ab6d
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/Kconfig
@@ -0,0 +1,121 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+comment "NanoRisc5 Configuration Options"
+
+choice
+	prompt "NR5 Chip Selection"
+	default ARCH_CHIP_NR5M100
+	depends on ARCH_CHIP_NR5
+
+config ARCH_CHIP_NR5M100
+	bool "NR5M100"
+	select NR5_HAVE_UART1
+	select NR5_HAVE_GPIOA
+	select NR5_HAVE_GPIOB
+	select NR5_HAVE_GPIOC
+	---help---
+		NanoRisc5, RV32IM 128K PROGRAM SRAM, 128K DATA SRAM
+
+endchoice
+
+config NR5_NR5M100
+	bool
+	default y
+	select NR5_NR5M1XX
+	select NR5_HAVE_UART1
+	select NR5_HAVE_TIMER1
+
+config NR5_NR5M1XX
+	bool
+	default n
+
+config NR5_EPIC
+	bool "Has Embedded Priority Interrupt Controller (EPIC)"
+	---help---
+		NanoRisc5 core can have either single vector interrupts or priority
+		encoded interrupts.  Selects if the core was compiled with EPIC.
+
+menu "NR5 Peripheral Support"
+
+# These "hidden" settings determine is a peripheral option is available for the
+# selection MCU
+
+config NR5_HAVE_UART1
+	bool
+	default n
+	select UART1_SERIALDRIVER
+	select ARCH_HAVE_SERIAL_TERMIOS
+
+config NR5_HAVE_TIMER1
+	bool
+	default n
+
+config NR5_HAVE_TIM2
+	bool
+	default n
+
+config NR5_HAVE_I2C1
+	bool
+	default n
+
+config NR5_HAVE_SPI1
+	bool
+	default n
+
+# These are the peripheral selections proper
+
+config NR5_I2C1
+	bool "I2C1"
+	default n
+	select NR5_I2C
+
+config NR5_SPI1
+	bool "SPI1"
+	default n
+	select SPI
+	select NR5_SPI
+
+config NR5_TIMER1
+	bool "TIMER1"
+	default n
+	depends on NR5_HAVE_TIMER1
+
+config NR5_TIMER2
+	bool "TIMER2"
+	default n
+
+config NR5_UART1
+	bool "UART1"
+	default n
+	select ARCH_HAVE_UART1
+	select ARCH_HAVE_SERIAL_TERMIOS
+	select NR5_UART
+
+endmenu
+
+config NR5_SPI
+	bool
+
+config NR5_I2C
+	bool
+
+config NR5_UART
+	bool
+
+config NR5_UART_RX_BUF_SIZE
+	int "UART RX Bufer size"
+	default 64
+	depends on NR5_UART
+	---help---
+		Size of RX buffers for NR5 UARTs
+
+config NR5_UART_TX_BUF_SIZE
+	int "UART TX Bufer size"
+	default 64
+	depends on NR5_UART
+	---help---
+		Size of TX buffers for NR5 UARTs
+
diff --git a/arch/risc-v/src/nr5m100/Make.defs b/arch/risc-v/src/nr5m100/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..8d7b9ee85b498dad8a351121ac86e8a0662a5409
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/Make.defs
@@ -0,0 +1,74 @@
+############################################################################
+# arch/risc-v/src/nr5m100/Make.defs
+#
+#   Copyright (C) 2016 Ken Pettit. All rights reserved.
+#   Author: Ken Pettit 
+#
+# # Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+# Specify our HEAD assembly file.  This will be linked as
+# the first object file, so it will appear at address 0
+HEAD_ASRC = nr5_vectors.S
+
+# Specify our general Assembly files
+CHIP_ASRCS = nr5_head.S nr5_csr.S up_syscall.S
+
+# If we are compiling the NELIB library, then specify it
+# in AFLAGS so we can change up our startup behavior
+ifeq ($(CONFIG_LIB_NEWLIB),y)
+AFLAGS += -DCONFIG_LIB_NEWLIB
+endif
+
+# Override the arch to enable hardware MUL during assembly.
+# This is to support our hardware mul test.  For that test,
+# we have to disable hardware mul for C code so the soft 
+# math libs will be used to compare software mul vs hw mul.
+# But hw mul must be enabled to compile the .S file, or we
+# will get an illegal instruction error.
+ASARCHCPUFLAGS += -march=RV32IMXcustom
+
+# Specify C code within the common directory to be included
+CMN_CSRCS  += up_initialize.c up_swint.c
+CMN_CSRCS  += up_allocateheap.c up_createstack.c up_dumpstate.c up_exit.c up_idle.c
+CMN_CSRCS  += up_assert.c up_blocktask.c up_copystate.c up_initialstate.c
+CMN_CSRCS  += up_interruptcontext.c up_releasepending.c up_reprioritizertr.c
+CMN_CSRCS  += up_releasestack.c up_stackframe.c up_schedulesigaction.c up_sigdeliver.c
+CMN_CSRCS  += up_unblocktask.c up_usestack.c
+
+ifeq ($(CONFIG_ARCH_HAVE_VFORK),y)
+CMN_CSRCS  += up_vfork.c
+endif
+
+# Specify our C code within this directory to be included
+CHIP_CSRCS  = nr5_init.c nr5_arch.c
+CHIP_CSRCS += nr5_lowputc.c nr5_allocateheap.c nr5_serial.c
+CHIP_CSRCS += nr5_timerisr.c nr5_irq.c nr5_irq_dispatch.c
+
+ifeq ($(CONFIG_TIMER),y)
+CHIP_CSRCS += nr5_tim_lowerhalf.c
+endif
+
diff --git a/arch/risc-v/src/nr5m100/chip.h b/arch/risc-v/src/nr5m100/chip.h
new file mode 100644
index 0000000000000000000000000000000000000000..dbe9928c6f68b27d65d4550c31f605dd2bdf5cb2
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/chip.h
@@ -0,0 +1,67 @@
+/************************************************************************************
+ * arch/risc-v/src/nr5m100/chip.h
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_RISCV_SRC_NR5M100_CHIP_H
+#define __ARCH_RISCV_SRC_NR5M100_CHIP_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+/* If the common RV32IM vector handling logic is used, then include the
+ * required vector definitions as well.
+ */
+
+#ifdef CONFIG_RV32IM_CMNVECTOR
+#  if defined(CONFIG_NR5_NR5M1XX)
+#    include "chip/nr5m1xx_vectors.h"
+#  else
+#    error "No vector file for this NanoRisc5 family"
+#  endif
+#endif
+
+/* Include the chip memory map. */
+
+#include "nr5_memorymap.h"
+
+/* Include our custom access routines for ISR masking, priority */
+
+#include "nr5_csr.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#endif /* __ARCH_RISCV_SRC_NR5M100_CHIP_H */
+
diff --git a/arch/risc-v/src/nr5m100/chip/nr5m1xx_epic.h b/arch/risc-v/src/nr5m100/chip/nr5m1xx_epic.h
new file mode 100644
index 0000000000000000000000000000000000000000..3fa13aed104370bf25f4290b2cdfa8eb3e956315
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/chip/nr5m1xx_epic.h
@@ -0,0 +1,41 @@
+/************************************************************************************
+ * arch/risc-v/src/nr5m100/chip/nr5_epic.h
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef ARCH_RISCV_SRC_NR5M100_CHIP_NR5M1XX_EPIC_H
+#define ARCH_RISCV_SRC_NR5M100_CHIP_NR5M1XX_EPIC_H
+
+#define NR5_EPIC_PRI1_REG        0x7E1
+#define NR5_EPIC_PRI2_REG        0x7E2
+#define NR5_EPIC_PRI3_REG        0x7E3
+#define NR5_EPIC_STAT_REG        0x7E4
+
+#endif  /* _ARCH_RISCV_SRC_NR5M100_CHIP_NR5M1XX_EPIC_H */
diff --git a/arch/risc-v/src/nr5m100/chip/nr5m1xx_memorymap.h b/arch/risc-v/src/nr5m100/chip/nr5m1xx_memorymap.h
new file mode 100644
index 0000000000000000000000000000000000000000..4ebc6879d13fbb4afadba01fb9fcdad0c88cd2f9
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/chip/nr5m1xx_memorymap.h
@@ -0,0 +1,57 @@
+/************************************************************************************
+ * arch/risc-v/src/nr5m100/chip/nr5m1xx_memorymap.h
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_RISCV_SRC_NR5M100_CHIP_NR5M1XX_MEMORYMAP_H
+#define __ARCH_RISCV_SRC_NR5M100_CHIP_NR5M1XX_MEMORYMAP_H
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* BOOT ROM, SRAM, PERIPHERALS ******************************************************/
+
+#define STM32_CODE_BASE     0x00000000      /* 0x00000000-0x1fffffff: 512Mb code block */
+#define STM32_SRAM_BASE     0x20000000      /* 0x20000000 - 384Kb SRAM */
+#define STM32_PERIPH_BASE   0x40000000      /* 0x40000000-0x4fffffff: Peripheral block */
+
+/* Register Base Address ************************************************************/
+
+#define NR5_UART1_BASE      0x40000000      /* 0x40000000 - 0x40000fff: UART0 */
+#define NR5_GPIO1_BASE      0x40001000      /* 0x40001000 - 0x40001fff: GPIO1 */
+#define NR5_GPIO2_BASE      0x40002000      /* 0x40002000 - 0x40002fff: GPIO2 */
+#define NR5_GPIO3_BASE      0x40003000      /* 0x40003000 - 0x40003fff: GPIO3 */
+#define NR5_TIMER1_BASE     0x40004000      /* 0x40004000 - 0x40004fff: TIMER0 timer */
+#define NR5_TIMER2_BASE     0x40005000      /* 0x40005000 - 0x40005fff: TIMER1 timer */
+#define NR5_EXTMEM_BASE     0x40006000      /* 0x40006000 - 0x40006fff: EXTMEM Controller*/
+
+#endif /* __ARCH_RISCV_SRC_NR5M100_CHIP_NR5M1XX_MEMORYMAP_H */
+
diff --git a/arch/risc-v/src/nr5m100/chip/nr5m1xx_timer.h b/arch/risc-v/src/nr5m100/chip/nr5m1xx_timer.h
new file mode 100644
index 0000000000000000000000000000000000000000..4739965cf4382b2e5b0d1d46c2dc1325cc962499
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/chip/nr5m1xx_timer.h
@@ -0,0 +1,190 @@
+/************************************************************************************
+ * arch/risc-v/src/nr5m100/chip/nr5_timer.h
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef ARCH_RISCV_SRC_NR5M100_CHIP_NR5M1XX_TIMERA_H
+#define ARCH_RISCV_SRC_NR5M100_CHIP_NR5M1XX_TIMERA_H
+
+#include "nr5m1xx_memorymap.h"
+
+/* The timers used in the NR5M100 are functionally equivalent to
+ * Timer A in the MSP430.  The hardware peripheral in the FPGA uses the BSD
+ * licensed RTL code from the OpenMSP430 project on opencores.org.
+ */
+
+/* TimerA offet definitions */
+
+#define NR5_TIMERA_TACTL_OFFSET           0x00
+#define NR5_TIMERA_TAR_OFFSET             0x04
+#define NR5_TIMERA_TACCTL0_OFFSET         0x08
+#define NR5_TIMERA_TACCR0_OFFSET          0x0C
+#define NR5_TIMERA_TACCTL1_OFFSET         0x10
+#define NR5_TIMERA_TACCR1_OFFSET          0x14
+#define NR5_TIMERA_TACCTL2_OFFSET         0x18
+#define NR5_TIMERA_TACCR2_OFFSET          0x1C
+#define NR5_TIMERA_TAIV_OFFSET            0x20
+
+/* Timer 1 address definitions */
+
+#ifdef CONFIG_NR5_TIMER1 
+#define NR5_TIMER1_TACTL_OFFSET           (NR5_TIMER1_BASE+NR5_TIMERA_TACTL_OFFSET)
+#define NR5_TIMER1_TAR_OFFSET             (NR5_TIMER1_BASE+NR5_TIMERA_TAR_OFFSET)
+#define NR5_TIMER1_TACCTL0_OFFSET         (NR5_TIMER1_BASE+NR5_TIMERA_TACCTL0_OFFSET)
+#define NR5_TIMER1_TACCR0_OFFSET          (NR5_TIMER1_BASE+NR5_TIMERA_TACCR0_OFFSET)
+#define NR5_TIMER1_TACCTL1_OFFSET         (NR5_TIMER1_BASE+NR5_TIMERA_TACCTL1_OFFSET)
+#define NR5_TIMER1_TACCR1_OFFSET          (NR5_TIMER1_BASE+NR5_TIMERA_TACCR1_OFFSET)
+#define NR5_TIMER1_TACCTL2_OFFSET         (NR5_TIMER1_BASE+NR5_TIMERA_TACCTL2_OFFSET)
+#define NR5_TIMER1_TACCR2_OFFSET          (NR5_TIMER1_BASE+NR5_TIMERA_TACCR2_OFFSET)
+#define NR5_TIMER1_TAIV_OFFSET            (NR5_TIMER1_BASE+NR5_TIMERA_TAIV_OFFSET)
+#endif
+
+/* Timer 2 address definitions */
+
+#ifdef CONFIG_NR5_TIMER2 
+#define NR5_TIMER2_TACTL_OFFSET           (NR5_TIMER2_BASE+NR5_TIMERA_TACTL_OFFSET)
+#define NR5_TIMER2_TAR_OFFSET             (NR5_TIMER2_BASE+NR5_TIMERA_TAR_OFFSET)
+#define NR5_TIMER2_TACCTL0_OFFSET         (NR5_TIMER2_BASE+NR5_TIMERA_TACCTL0_OFFSET)
+#define NR5_TIMER2_TACCR0_OFFSET          (NR5_TIMER2_BASE+NR5_TIMERA_TACCR0_OFFSET)
+#define NR5_TIMER2_TACCTL1_OFFSET         (NR5_TIMER2_BASE+NR5_TIMERA_TACCTL1_OFFSET)
+#define NR5_TIMER2_TACCR1_OFFSET          (NR5_TIMER2_BASE+NR5_TIMERA_TACCR1_OFFSET)
+#define NR5_TIMER2_TACCTL2_OFFSET         (NR5_TIMER2_BASE+NR5_TIMERA_TACCTL2_OFFSET)
+#define NR5_TIMER2_TACCR2_OFFSET          (NR5_TIMER2_BASE+NR5_TIMERA_TACCR2_OFFSET)
+#define NR5_TIMER2_TAIV_OFFSET            (NR5_TIMER2_BASE+NR5_TIMERA_TAIV_OFFSET)
+#endif
+
+/* Timer 3 address definitions */
+
+#ifdef CONFIG_NR5_TIMER3 
+#define NR5_TIMER3_TACTL_OFFSET           (NR5_TIMER3_BASE+NR5_TIMERA_TACTL_OFFSET)
+#define NR5_TIMER3_TAR_OFFSET             (NR5_TIMER3_BASE+NR5_TIMERA_TAR_OFFSET)
+#define NR5_TIMER3_TACCTL0_OFFSET         (NR5_TIMER3_BASE+NR5_TIMERA_TACCTL0_OFFSET)
+#define NR5_TIMER3_TACCR0_OFFSET          (NR5_TIMER3_BASE+NR5_TIMERA_TACCR0_OFFSET)
+#define NR5_TIMER3_TACCTL1_OFFSET         (NR5_TIMER3_BASE+NR5_TIMERA_TACCTL1_OFFSET)
+#define NR5_TIMER3_TACCR1_OFFSET          (NR5_TIMER3_BASE+NR5_TIMERA_TACCR1_OFFSET)
+#define NR5_TIMER3_TACCTL2_OFFSET         (NR5_TIMER3_BASE+NR5_TIMERA_TACCTL2_OFFSET)
+#define NR5_TIMER3_TACCR2_OFFSET          (NR5_TIMER3_BASE+NR5_TIMERA_TACCR2_OFFSET)
+#define NR5_TIMER3_TAIV_OFFSET            (NR5_TIMER3_BASE+NR5_TIMERA_TAIV_OFFSET)
+#endif
+
+/* Timer 4 address definitions */
+
+#ifdef CONFIG_NR5_TIMER4 
+#define NR5_TIMER4_TACTL_OFFSET           (NR5_TIMER4_BASE+NR5_TIMERA_TACTL_OFFSET)
+#define NR5_TIMER4_TAR_OFFSET             (NR5_TIMER4_BASE+NR5_TIMERA_TAR_OFFSET)
+#define NR5_TIMER4_TACCTL0_OFFSET         (NR5_TIMER4_BASE+NR5_TIMERA_TACCTL0_OFFSET)
+#define NR5_TIMER4_TACCR0_OFFSET          (NR5_TIMER4_BASE+NR5_TIMERA_TACCR0_OFFSET)
+#define NR5_TIMER4_TACCTL1_OFFSET         (NR5_TIMER4_BASE+NR5_TIMERA_TACCTL1_OFFSET)
+#define NR5_TIMER4_TACCR1_OFFSET          (NR5_TIMER4_BASE+NR5_TIMERA_TACCR1_OFFSET)
+#define NR5_TIMER4_TACCTL2_OFFSET         (NR5_TIMER4_BASE+NR5_TIMERA_TACCTL2_OFFSET)
+#define NR5_TIMER4_TACCR2_OFFSET          (NR5_TIMER4_BASE+NR5_TIMERA_TACCR2_OFFSET)
+#define NR5_TIMER4_TAIV_OFFSET            (NR5_TIMER4_BASE+NR5_TIMERA_TAIV_OFFSET)
+#endif
+
+/* Timer 5 address definitions */
+
+#ifdef CONFIG_NR5_TIMER5 
+#define NR5_TIMER5_TACTL_OFFSET           (NR5_TIMER5_BASE+NR5_TIMERA_TACTL_OFFSET)
+#define NR5_TIMER5_TAR_OFFSET             (NR5_TIMER5_BASE+NR5_TIMERA_TAR_OFFSET)
+#define NR5_TIMER5_TACCTL0_OFFSET         (NR5_TIMER5_BASE+NR5_TIMERA_TACCTL0_OFFSET)
+#define NR5_TIMER5_TACCR0_OFFSET          (NR5_TIMER5_BASE+NR5_TIMERA_TACCR0_OFFSET)
+#define NR5_TIMER5_TACCTL1_OFFSET         (NR5_TIMER5_BASE+NR5_TIMERA_TACCTL1_OFFSET)
+#define NR5_TIMER5_TACCR1_OFFSET          (NR5_TIMER5_BASE+NR5_TIMERA_TACCR1_OFFSET)
+#define NR5_TIMER5_TACCTL2_OFFSET         (NR5_TIMER5_BASE+NR5_TIMERA_TACCTL2_OFFSET)
+#define NR5_TIMER5_TACCR2_OFFSET          (NR5_TIMER5_BASE+NR5_TIMERA_TACCR2_OFFSET)
+#define NR5_TIMER5_TAIV_OFFSET            (NR5_TIMER5_BASE+NR5_TIMERA_TAIV_OFFSET)
+#endif
+
+/* Register Bitfield Definitions ********************************************************/
+
+/* Control register TACTL Bit definitions */
+
+#define TIMERA_TACTL_TAIFG                (1 << 0)    /* Bit 0: Interrupt Pending Flag */       
+#define TIMERA_TACTL_TAIE                 (1 << 1)    /* Bit 1: Interrupt Enable */
+#define TIMERA_TACTL_TACLR                (1 << 2)    /* Bit 2: TAR counter clear */
+#define TIMERA_TACTL_MC_SHIFT             4           /* Bits 4-5: Mode Control */
+#  define TIMERA_TACTL_MC_MASK            (3 << TIMERA_TACTL_MC_SHIFT)
+#  define TIMERA_TACTL_STOP               (0 << TIMERA_TACTL_MC_SHIFT)
+#  define TIMERA_TACTL_UP                 (1 << TIMERA_TACTL_MC_SHIFT)
+#  define TIMERA_TACTL_CONTINUOUS         (2 << TIMERA_TACTL_MC_SHIFT)
+#  define TIMERA_TACTL_UPDOWN             (3 << TIMERA_TACTL_MC_SHIFT)
+#define TIMERA_TACTL_ID_SHIFT             6           /* Bits 6-7: Input Divider */
+#  define TIMERA_TACTL_DIV_1              (0 << TIMERA_TACTL_ID_SHIFT)
+#  define TIMERA_TACTL_DIV_2              (1 << TIMERA_TACTL_ID_SHIFT)
+#  define TIMERA_TACTL_DIV_4              (2 << TIMERA_TACTL_ID_SHIFT)
+#  define TIMERA_TACTL_DIV_8              (3 << TIMERA_TACTL_ID_SHIFT)
+#define TIMERA_TACTL_TASSEL_SHIFT         8           /* Bits 8-9: Clock Source Select */
+#  define TIMERA_TACTL_MED_CLOCK          (0 << TIMERA_TACTL_TASSEL_SHIFT)
+#  define TIMERA_TACTL_SLOW_CLOCK         (1 << TIMERA_TACTL_TASSEL_SHIFT)
+#  define TIMERA_TACTL_SYS_CLOCK          (2 << TIMERA_TACTL_TASSEL_SHIFT)
+#  define TIMERA_TACTL_EXT_CLOCK          (3 << TIMERA_TACTL_TASSEL_SHIFT)
+#define TIMERA_TACTL_TAPRE_SHIFT          10          /* Bits 10-15: Clock Prescaler */
+#define TIMERA_TACTL_TAPRE_MASK           0x3F  
+#  define TIMERA_TACTL_TAPRE(x)           (((x) & TIMERA_TACTL_TAPRE_MASK) << TIMERA_TACTL_TAPRE_SHIFT)
+
+/* Capture / Compare register bit definitions */
+
+#define TIMERA_TACCTL_CCIFG               (1 << 0)    /* Bit 0: Capture/compare interrupt Flag */       
+#define TIMERA_TACCTL_COV                 (1 << 1)    /* Bit 1: Capture overflow */       
+#define TIMERA_TACCTL_OUTVAL              (1 << 2)    /* Bit 2: Output value */       
+#define TIMERA_TACCTL_CCI                 (1 << 3)    /* Bit 3: Capture/compare input value */
+#define TIMERA_TACCTL_CCIE                (1 << 4)    /* Bit 4: Capture/Compare interrupt Enable */
+#define TIMERA_TACCTL_OUTMOD_SHIFT        5           /* Bits 5-7: Output Mode */
+#  define TIMERA_TACCTL_OUT               (0 << TIMERA_TACCTL_OUTMOD_SHIFT)
+#  define TIMERA_TACCTL_SET               (1 << TIMERA_TACCTL_OUTMOD_SHIFT)
+#  define TIMERA_TACCTL_TOGGLE_RESET      (2 << TIMERA_TACCTL_OUTMOD_SHIFT)
+#  define TIMERA_TACCTL_SET_RESET         (3 << TIMERA_TACCTL_OUTMOD_SHIFT)
+#  define TIMERA_TACCTL_TOGGLE            (4 << TIMERA_TACCTL_OUTMOD_SHIFT)
+#  define TIMERA_TACCTL_RESET             (5 << TIMERA_TACCTL_OUTMOD_SHIFT)
+#  define TIMERA_TACCTL_TOGGLE_SET        (6 << TIMERA_TACCTL_OUTMOD_SHIFT)
+#  define TIMERA_TACCTL_RESET_SET         (7 << TIMERA_TACCTL_OUTMOD_SHIFT)
+#define TIMERA_TACCTL_CAP                 (1 << 8)    /* Bit 8: Capture mode select  */       
+#define TIMERA_TACCTL_SCCI                (1 << 10)   /* Bit 10: Synchronized capture input */       
+#define TIMERA_TACCTL_SCS                 (1 << 11)   /* Bit 11: Syncronize capture source */       
+#define TIMERA_TACCTL_CCIS_SHIFT          12          /* Bits 12-13: Capture Input Select */
+#  define TIMERA_TACCTL_CCIS_CCIA         (0 << TIMERA_TACCTL_CCIS_SHIFT)
+#  define TIMERA_TACCTL_CCIS_CCIB         (1 << TIMERA_TACCTL_CCIS_SHIFT)
+#  define TIMERA_TACCTL_CCIS_GND          (2 << TIMERA_TACCTL_CCIS_SHIFT)
+#  define TIMERA_TACCTL_CCIS_VCC          (3 << TIMERA_TACCTL_CCIS_SHIFT)
+#define TIMERA_TACCTL_CM_SHIFT            14          /* Bits 14-15: Capture Mode */
+#  define TIMERA_TACCTL_CM_NO_CAPTURE     (0 << TIMERA_TACCTL_SM_SHIFT)
+#  define TIMERA_TACCTL_CM_RISING         (1 << TIMERA_TACCTL_SM_SHIFT)
+#  define TIMERA_TACCTL_CM_FALLING        (2 << TIMERA_TACCTL_SM_SHIFT)
+#  define TIMERA_TACCTL_CM_BOTH           (3 << TIMERA_TACCTL_SM_SHIFT)
+
+/* Interrupt Vector Register */
+
+#define TIMERA_TAIV_TAIV_SHIFT            1           /* Bits 1-3: Interrupt Source */
+#  define TIMERA_TAIV_TACCR1              (1 << TIMERA_TAIV_TAIV_SHIFT)
+#  define TIMERA_TAIV_TACCR2              (2 << TIMERA_TAIV_TAIV_SHIFT)
+#  define TIMERA_TAIV_TAIFG               (5 << TIMERA_TAIV_TAIV_SHIFT)
+
+#endif  /* _ARCH_RISCV_SRC_NR5M100_CHIP_NR5M1XX_TIMERA_H */
+
diff --git a/arch/risc-v/src/nr5m100/chip/nr5m1xx_uart.h b/arch/risc-v/src/nr5m100/chip/nr5m1xx_uart.h
new file mode 100644
index 0000000000000000000000000000000000000000..5a790782e9867188d9af2d391f1272376748e9f3
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/chip/nr5m1xx_uart.h
@@ -0,0 +1,75 @@
+/************************************************************************************
+ * arch/risc-v/src/nr5m100/chip/nr5_uart.h
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef ARCH_RISCV_SRC_NR5M100_CHIP_NR5M1XX_UART_H
+#define ARCH_RISCV_SRC_NR5M100_CHIP_NR5M1XX_UART_H
+
+/* The UART in NR5M100 is a very small (i.e. dumb) peripheral.  It
+ * only supports the most common mode ever used:
+ *
+ *   8 Data bits
+ *   1 Stop bit
+ *   No parity.
+ *
+ *   It has a programmable baud rate and RX / TX interrupt capability
+ *   and that's about it.  The primary goal for the UART is to provide a 
+ *   debug console to the part.
+ */
+
+#define NR5_UART_BAUD_RATE_OFFSET         0x000
+#define NR5_UART_TX_REG_OFFSET            0x004
+#define NR5_UART_RX_REG_OFFSET            0x008
+#define NR5_UART_STATUS_REG_OFFSET        0x00C
+#define NR5_UART_CTRL_REG_OFFSET          0x010
+
+#ifdef CONFIG_NR5_UART1
+#  define NR5_UART1_BAUD_RATE_REG         (NR5_UART1_BASE+NR5_UART_BAUD_RATE_OFFSET)
+#  define NR5_UART1_TX_REG                (NR5_UART1_BASE+NR5_UART_TX_REG_OFFSET)
+#  define NR5_UART1_RX_REG                (NR5_UART1_BASE+NR5_UART_RX_REG_OFFSET)
+#  define NR5_UART1_STATUS_REG            (NR5_UART1_BASE+NR5_UART_STATUS_REG_OFFSET)
+#  define NR5_UART1_CTRL_REG              (NR5_UART1_BASE+NR5_UART_CTRL_REG_OFFSET)
+#endif
+
+/* Status Register Bit definitions */
+
+#define NR5_UART_STATUS_TX_EMPTY          0x01
+#define NR5_UART_STATUS_RX_AVAIL          0x02
+#define NR5_UART_STATUS_RX_OVERRUN        0x04
+#define NR5_UART_RX_IRQ_PENDING           0x08
+#define NR5_UART_TX_IRQ_PENDING           0x10
+
+/* Control Register Bit definitions */
+
+#define NR5_UART_CTRL_ENABLE_RX_IRQ       0x01
+#define NR5_UART_CTRL_ENABLE_TX_IRQ       0x02
+
+#endif  /* _ARCH_RISCV_SRC_NR5M100_CHIP_NR5M1XX_UART_H */
diff --git a/arch/risc-v/src/nr5m100/nr5.h b/arch/risc-v/src/nr5m100/nr5.h
new file mode 100644
index 0000000000000000000000000000000000000000..f6038a762044d6bad0cca5b55616c844cf4066ca
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/nr5.h
@@ -0,0 +1,68 @@
+/************************************************************************************
+ * arch/risc-v/src/nr5m100/nr5.h
+ *
+ *   Copyright (C) 2011 Uros Platise. All rights reserved.
+ *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Authors: Uros Platise 
+ *            Gregory Nutt 
+ *            Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_RISCV_SRC_NR5M100_NR5_H
+#define __ARCH_RISCV_SRC_NR5M100_NR5_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include "up_internal.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Peripherals **********************************************************************/
+
+#include "chip.h"
+#include "nr5_csr.h"
+#include "nr5_lowputc.h"
+#include "nr5_timer.h"
+#include "nr5_uart.h"
+
+#endif /* __ARCH_RISCV_SRC_NR5_NR5_H */
+
diff --git a/arch/risc-v/src/nr5m100/nr5_allocateheap.c b/arch/risc-v/src/nr5m100/nr5_allocateheap.c
new file mode 100644
index 0000000000000000000000000000000000000000..3467cee05cbf4262f0fac6ebb4cef0820c747ee0
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/nr5_allocateheap.c
@@ -0,0 +1,63 @@
+/************************************************************************************
+ * arch/risc-v/src/nr5m100/nr5_allocateheap.c
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+
+#include "nr5.h"
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: up_addregion
+ *
+ * Descripton:
+ *   RAM may be added in non-contiguous chunks.  This routine adds all chunks
+ *   that may be used for heap.
+ *
+ ************************************************************************************/
+
+void up_addregion(void)
+{
+}
+
diff --git a/arch/risc-v/src/nr5m100/nr5_arch.c b/arch/risc-v/src/nr5m100/nr5_arch.c
new file mode 100644
index 0000000000000000000000000000000000000000..0bc09cacb530815ef57095a050b4f6e755d13df6
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/nr5_arch.c
@@ -0,0 +1,43 @@
+/************************************************************************************
+ * arch/risc-v/src/nr5m100/nr5_arch.c
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#include 
+#include 
+#include "nr5.h"
+
+void up_puts(const char *p)
+{
+	while (*p != 0)
+      up_lowputc(*(p++));
+   up_lowputc('\n');
+}
+
diff --git a/arch/risc-v/src/nr5m100/nr5_config.h b/arch/risc-v/src/nr5m100/nr5_config.h
new file mode 100644
index 0000000000000000000000000000000000000000..36b20d5914b352916b054f36418b67a916d16f56
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/nr5_config.h
@@ -0,0 +1,97 @@
+/************************************************************************************
+ * arch/risc-v/src/nr5m100/nr5_config.h
+ *
+ *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ *   Modified for RISC-V:
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_RISCV_SRC_NR5M100_NR5_CONFIG_H
+#define __ARCH_RISCV_SRC_NR5M100_NR5_CONFIG_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* UARTs ****************************************************************************/
+
+/* Are any UARTs enabled? */
+
+#undef HAVE_UART_DEVICE
+#if defined(CONFIG_NR5_UART1) || defined(CONFIG_NR5_UART2)
+#  define HAVE_UART_DEVICE 1
+#endif
+
+/* Is there a serial console?  There should be no more than one defined.  It
+ * could be on any UARTn, n=1,.. CHIP_NUARTS
+ */
+
+#if defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_NR5_UART1)
+#  undef CONFIG_UART2_SERIAL_CONSOLE
+#  define HAVE_SERIAL_CONSOLE 1
+#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_NR5_UART2)
+#  undef CONFIG_UART1_SERIAL_CONSOLE
+#  define HAVE_SERIAL_CONSOLE 1
+#else
+#  undef CONFIG_UART1_SERIAL_CONSOLE
+#  undef CONFIG_UART2_SERIAL_CONSOLE
+#  undef HAVE_SERIAL_CONSOLE
+#endif
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Inline Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_RISCV_SRC_NR5M100_NR5_CONFIG_H */
diff --git a/arch/risc-v/src/nr5m100/nr5_csr.S b/arch/risc-v/src/nr5m100/nr5_csr.S
new file mode 100644
index 0000000000000000000000000000000000000000..13133005a02f92ecd7a35ca2d8e1666ad17443dc
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/nr5_csr.S
@@ -0,0 +1,289 @@
+/************************************************************************************
+ * arch/risc-v/src/nr5m100/nr5_csr.S
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/*
+ * Provide C level access function to asm only CSR registers
+ */
+
+#define ENABLE_QREGS
+#include "nr5_custom_ops.h"
+#include "nr5_csr.h"
+
+	.global up_getmisa
+	.global up_getarchid
+	.global up_getimpid
+	.global up_getvendorid
+	.global up_gethartid
+	.global up_getepicprimask
+	.global up_setepicprimask
+	.global up_setepicstat
+	.global up_setsystick
+	.global up_setpri1bit
+	.global up_clearpri1bit
+	.global up_setpri2bit
+	.global up_clearpri2bit
+	.global up_setpri3bit
+	.global up_clearpri3bit
+	.global up_setirqmaskbit
+	.global up_clearirqmaskbit
+	.global up_disableints
+	.global up_enableints
+	.global up_getq0
+	.global up_getq1
+	.global up_getq2
+	.global up_setq0
+	.global up_setq1
+	.global up_setq2
+	.global up_lsbenc
+
+	.section .text
+
+/****************************************************************************
+ * Returns the Read Only RV32IM Machine ISA (capabilities)
+ ****************************************************************************/
+
+up_getmisa:
+    csrr  a0, CSR_MISA
+    ret
+
+/****************************************************************************
+ * Returns the Read Only RV32IM Vendor ID
+ ****************************************************************************/
+
+up_getvendorid:
+    csrr  a0, CSR_MVENDORID
+    ret
+
+/****************************************************************************
+ * Returns the Read Only RV32IM ARCH ID
+ ****************************************************************************/
+
+up_getarchid:
+    csrr  a0, CSR_MARCHID
+    ret
+
+/****************************************************************************
+ * Returns the Read Only RV32IM IMP ID
+ ****************************************************************************/
+
+up_getimpid:
+    csrr  a0, CSR_MIMPID
+    ret
+
+/****************************************************************************
+ * Returns the Read Only RV32IM HART ID
+ ****************************************************************************/
+
+up_gethartid:
+    csrr  a0, CSR_MHARTID
+    ret
+
+/****************************************************************************
+ * Returns the NR5M100 specific Embedded Priority Interrupt Controller (EPIC)
+ * IRQ MASK register
+ ****************************************************************************/
+
+up_getepicmask:
+    csrr  a0, NR5_EPIC_IRQ_MASK
+    ret
+
+/****************************************************************************
+ * Returns the NR5M100 specific EPIC IRQ Priority register
+ ****************************************************************************/
+
+up_getepicpri:
+    csrr  a0, NR5_EPIC_PRIMASK
+    ret
+
+/****************************************************************************
+ * Sets the NR5M100 specific EPIC IRQ Priority register
+ ****************************************************************************/
+
+up_setepicpri:
+    csrrw  a0, NR5_EPIC_PRIMASK, a0
+    ret
+
+/****************************************************************************
+ * Sets the NR5M100 specific SYSTICK control register
+ ****************************************************************************/
+
+up_setsystick:
+    csrw  NR5_MSYSTICK_REG, a0
+    ret
+
+/****************************************************************************
+ * Sets bits in the NR5M100 specific PRI1 mask control register
+ ****************************************************************************/
+
+up_setpri1bit:
+    csrrs a0, NR5_EPIC_PRI1, a0
+    ret
+
+/****************************************************************************
+ * Clears bits in the NR5M100 specific PRI1 mask control register
+ ****************************************************************************/
+
+up_clearpri1bit:
+    csrrc a0, NR5_EPIC_PRI1, a0
+    ret
+
+/****************************************************************************
+ * Sets bits in the NR5M100 specific PRI2 mask control register
+ ****************************************************************************/
+
+up_setpri2bit:
+    csrrs a0, NR5_EPIC_PRI2, a0
+    ret
+
+/****************************************************************************
+ * Clears bits in the NR5M100 specific PRI2 mask control register
+ ****************************************************************************/
+
+up_clearpri2bit:
+    csrrc a0, NR5_EPIC_PRI2, a0
+    ret
+
+/****************************************************************************
+ * Sets bits in the NR5M100 specific PRI3 mask control register
+ ****************************************************************************/
+
+up_setpri3bit:
+    csrrs a0, NR5_EPIC_PRI3, a0
+    ret
+
+/****************************************************************************
+ * Clears bits in the NR5M100 specific PRI3 mask control register
+ ****************************************************************************/
+
+up_clearpri3bit:
+    csrrc a0, NR5_EPIC_PRI3, a0
+    ret
+
+/****************************************************************************
+ * Sets bits in the NR5M100 specific IRQ mask control register
+ ****************************************************************************/
+
+up_setirqmaskbit:
+    csrrs a0, NR5_EPIC_IRQ_MASK, a0
+    ret
+
+/****************************************************************************
+ * Clears bits in the NR5M100 specific IRQ mask control register
+ ****************************************************************************/
+
+up_clearirqmaskbit:
+    csrrc a0, NR5_EPIC_IRQ_MASK, a0
+    ret
+
+/****************************************************************************
+ * Disables global interrupts in NR5M100 specific IRQ PRI control register
+ ****************************************************************************/
+
+up_disableints:
+    csrrc a0, NR5_EPIC_PRIMASK, 1
+    ret
+
+/****************************************************************************
+ * Enables global interrupts in NR5M100 specific IRQ PRI control register
+ ****************************************************************************/
+
+up_enableints:
+    csrrs a0, NR5_EPIC_PRIMASK, 1
+    ret
+
+/****************************************************************************
+ * Reads NR5M100 specific Q0 register (used for interrupt processing)
+ ****************************************************************************/
+
+up_getq0:
+    getq a0, q0
+    ret
+
+/****************************************************************************
+ * Reads NR5M100 specific Q1 register (used for interrupt processing)
+ ****************************************************************************/
+
+up_getq1:
+    getq a0, q1
+    ret
+
+/****************************************************************************
+ * Reads NR5M100 specific Q2 register (used for interrupt processing)
+ ****************************************************************************/
+
+up_getq2:
+    getq a0, q2
+    ret
+
+/****************************************************************************
+ * Sets NR5M100 specific Q0 register (used for interrupt processing)
+ ****************************************************************************/
+
+up_setq0:
+    setq q0, a0
+    ret
+
+/****************************************************************************
+ * Sets NR5M100 specific Q1 register (used for interrupt processing)
+ ****************************************************************************/
+
+up_setq1:
+    setq q1, a0
+    ret
+
+/****************************************************************************
+ * Sets NR5M100 specific Q2 register (used for interrupt processing)
+ ****************************************************************************/
+
+up_setq2:
+    setq q2, a0
+    ret
+
+/****************************************************************************
+ * Calls the  NR5M100 specific LSBENC opcode.  This opcode will find the 
+ * first least significant non-zero bit in a0 and return it's ordinal value.
+ ****************************************************************************/
+
+up_lsbenc:
+   lsbenc a0, a0
+   ret
+
+/****************************************************************************
+ * Modeline to set vim formatting options for ASM file.  For this to work,
+ * you must enable moeline processing in your ~/.vimrc file with:
+ *
+ *    ~/.vimrc:
+ *      set modeline
+ *
+ * vim: noet:ts=4:sw=4
+ ****************************************************************************/
+
diff --git a/arch/risc-v/src/nr5m100/nr5_csr.h b/arch/risc-v/src/nr5m100/nr5_csr.h
new file mode 100644
index 0000000000000000000000000000000000000000..025a50988651f55f80e92f7cbea35553e156a2c0
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/nr5_csr.h
@@ -0,0 +1,94 @@
+/************************************************************************************
+ * arch/riscv/src/nr5/nr5_csr.h
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/* CSR Definitions */
+
+#ifndef __ARCH_RISCV_SRC_NR5_NR5_CSR_H
+#define __ARCH_RISCV_SRC_NR5_NR5_CSR_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+#include 
+#endif
+
+#if defined(CONFIG_NR5_NR5M1XX)
+#  include "chip/nr5m1xx_epic.h"
+#endif
+
+#include 
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#define NR5_EPIC_IRQ_MASK        0x7E0
+#define NR5_EPIC_PRI1            0x7E1
+#define NR5_EPIC_PRI2            0x7E2
+#define NR5_EPIC_PRI3            0x7E3
+#define NR5_EPIC_PRIMASK         0x7E4
+#define NR5_MSYSTICK_REG         0x7E5
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+void up_setsystick(uint32_t);
+
+void up_setpri1bit(uint32_t);
+void up_setpri2bit(uint32_t);
+void up_setpri3bit(uint32_t);
+
+void up_clearpri1bit(uint32_t);
+void up_clearpri2bit(uint32_t);
+void up_clearpri3bit(uint32_t);
+
+void up_setirqmaskbit(uint32_t);
+void up_clearirqmaskbit(uint32_t);
+
+void up_disableints(void);
+void up_enableints(void);
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ARCH_RISCV_SRC_NR5_NR5_CSR_H */
+
diff --git a/arch/risc-v/src/nr5m100/nr5_custom_ops.h b/arch/risc-v/src/nr5m100/nr5_custom_ops.h
new file mode 100644
index 0000000000000000000000000000000000000000..0c600eccf525f304aeca8e7b131ea09d4ee14821
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/nr5_custom_ops.h
@@ -0,0 +1,61 @@
+/************************************************************************************
+ * arch/risc-v/src/nr5m100/nr5_custom_ops.h
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define q0 0
+#define q1 1
+#define q2 2
+#define q3 3
+
+/****************************************************************************
+ * Assmebler Macros
+ ****************************************************************************/
+
+.macro getq rd qs
+custom0 \rd,\qs,0,0
+.endm
+
+.macro setq qd rs
+custom0 \qd,\rs,0,1
+.endm
+
+.macro lsbenc rd rs
+custom0 \rd,\rs,0,2
+.endm
+
+.macro timer rd rs
+custom0 \rd,\rs,0,5
+.endm
+
diff --git a/arch/risc-v/src/nr5m100/nr5_head.S b/arch/risc-v/src/nr5m100/nr5_head.S
new file mode 100644
index 0000000000000000000000000000000000000000..cc0d21563210ac6a7d59aabc0adefc77825b2516
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/nr5_head.S
@@ -0,0 +1,607 @@
+/************************************************************************************
+ * arch/risc-v/src/nr5m100/nr5_head.S
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#define ENABLE_QREGS
+
+#include "nr5_custom_ops.h"
+#include "nr5_csr.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* Configuration ************************************************************/
+
+#define NR5M100_STACK_BASE      _ebss
+#define NR5M100_STACK_TOP       _ebss+CONFIG_IDLETHREAD_STACKSIZE-4
+
+#if CONFIG_ARCH_INTERRUPTSTACK > 3
+#  define NR5M100_INTSTACK_BASE NR5M100_STACK_TOP
+#  define NR5M100_INTSTACK_SIZE (CONFIG_ARCH_INTERRUPTSTACK & ~3)
+#  define NR5M100_INTSTACK_TOP  NR5M100_STACK_TOP+NR5M100_INTSTACK_SIZE
+#  define NR5M100_HEAP_BASE     NR5M100_INTSTACK_TOP
+#else
+#  define NR5M100_HEAP_BASE     NR5M100_STACK_TOP
+#endif
+
+/****************************************************************************
+ * Public Symbols
+ ****************************************************************************/
+
+	.global irq_handler
+
+#ifdef CONFIG_RV32IM_HW_MULDIV 
+	.global time_hard_mul
+	.global hard_mul
+	.global hard_mulh
+	.global hard_mulhsu
+	.global hard_div
+	.global hard_divu
+	.global hard_rem
+	.global hard_remu
+	.global hard_mulhu
+#endif
+
+	.global	g_idle_topstack
+
+	/* Imported symbols */
+
+	.extern __reset_vec
+	.extern __trap_vec
+	.extern __stack_start
+	.global os_start
+
+#ifndef CONFIG_LIB_NEWLIB
+
+	.section .text
+	.global __start
+
+__start:
+
+	/* Set IRQ regs address */
+
+	lui 	x1, %hi(irq_regs)
+	addi 	x1, x1, %lo(irq_regs)
+	lui 	x2, %hi(irq_regs_addr)
+	addi 	x2, x2, %lo(irq_regs_addr)
+	sw 		x1, 0(x2)
+
+	/* Set IRQ stack address */
+
+	lui 	x1, %hi(irq_stack)
+	addi 	x1, x1, %lo(irq_stack)
+	lui 	x2, %hi(irq_stack_addr)
+	addi 	x2, x2, %lo(irq_stack_addr)
+	sw 		x1, 0(x2)
+
+	/* Zero out the registers */
+
+	addi 	x1, zero, 0
+	addi 	x2, zero, 0
+	addi 	x3, zero, 0
+	addi 	x4, zero, 0
+	addi 	x5, zero, 0
+	addi 	x6, zero, 0
+	addi 	x7, zero, 0
+	addi 	x8, zero, 0
+	addi 	x9, zero, 0
+	addi 	x10, zero, 0
+	addi 	x11, zero, 0
+	addi 	x12, zero, 0
+	addi 	x13, zero, 0
+	addi 	x14, zero, 0
+	addi 	x15, zero, 0
+	addi 	x16, zero, 0
+	addi 	x17, zero, 0
+	addi 	x18, zero, 0
+	addi 	x19, zero, 0
+	addi 	x20, zero, 0
+	addi 	x21, zero, 0
+	addi 	x22, zero, 0
+	addi 	x23, zero, 0
+	addi 	x24, zero, 0
+	addi 	x25, zero, 0
+	addi 	x26, zero, 0
+	addi 	x27, zero, 0
+	addi 	x28, zero, 0
+	addi 	x29, zero, 0
+	addi 	x30, zero, 0
+	addi 	x31, zero, 0
+
+	/* Set stack pointer */
+
+	lui 	sp,%hi(__stack_start)
+
+	/* Initialize global pointer */
+
+1:	auipc 	gp, %pcrel_hi(_gp)
+	addi  	gp, gp, %pcrel_lo(1b)
+
+	/* Initialize the Machine Trap Vector */
+
+	lui		t0, %hi(__trap_vec)
+	addi	t0, t0, %lo(__trap_vec)
+	csrw	CSR_MTVEC, t0
+
+	/* Initialize the Machine Interrupt Table Vector */
+	lui     t0, %hi(__reset_vec)
+	csrw    CSR_MIVEC, t0
+
+	/* clear the bss segment */
+
+	la		t0, _fbss
+	la		t1, _end
+1:
+#ifdef __riscv64
+	sd		zero,0(t0)
+	addi	t0, t0, 8
+#else
+	sw		zero,0(t0)
+	addi	t0, t0, 4
+#endif
+	bltu	t0, t1, 1b
+
+	lw		a0, 0(sp)				# a0 = argc
+	addi	a1, sp, _RISCV_SZPTR/8	# a1 = argv
+	li		a2, 0					# a2 = envp = NULL
+
+	/* Now jump to the main nr5_init routine to setup interrupts, etc.  */
+
+	la		t0, __nr5_init
+	jr		t0
+   
+	/* We shouldn't return from __nr5_init */
+
+	.global _init
+	.global _fini
+_init:
+_fini:
+	# These don't have to do anything since we use init_array/fini_array.
+	ret
+
+#endif
+
+/*
+==============================================================
+IRQ Handler routine .. save all regs and call the C handler.
+==============================================================
+*/
+
+irq_handler:
+
+	/* save All registers */
+
+#ifdef ENABLE_QREGS
+
+	/* Save x1,x2 in the spare q2,q3 registers */
+
+	setq 	q2, x1
+	setq 	q3, x2
+
+	/* Get pointer to our IRQ REGS save region in RAM */
+
+	lui  	x2, %hi(irq_regs_addr)
+	addi 	x2, x2, %lo(irq_regs_addr)
+	lw   	x1, 0(x2)
+	addi 	x1, x1, 32*4
+	sw   	x1, 0(x2)
+	addi 	x1, x1, -32*4
+
+	/* Save x3 and x4 to hold regs / stack pointer */
+
+	sw   	x3, 3*4(x1)
+	sw   	x4, 4*4(x1)
+	addi 	x4, x1, 0
+
+	/* Save the IRQ pending mask to the irq_regs area */
+
+	getq 	x2, q1
+	sw   	x2, 33*4(x1)
+
+	/* Save the x1 register (which is in q2) */
+
+	getq 	x2, q2
+	sw   	x2, 1*4(x1)
+
+	/* Save the x2 register (which is in q3) */
+
+	getq 	x2, q3
+	sw   	x2, 2*4(x1)
+
+	/* Get a stack region in irq stack space */
+
+	lui  	x3, %hi(irq_stack_addr)
+	addi 	x3, x3, %lo(irq_stack_addr)
+	lw   	x2, 0(x3)
+	addi 	x2, x2, -128*4
+	sw   	x2, 0(x3)
+	addi 	x3, x2, 128*4
+
+	/* Save the return PC.  After the getq of q0,
+	 * the higher priority interrupts will be enabled
+	 * as we are done using the shared resources (Qregs).
+	 */
+
+	getq	x2, q0
+	sw		x2,   0*4(x1)
+
+	sw		x5,   5*4(x1)
+	sw		x6,   6*4(x1)
+	sw		x7,   7*4(x1)
+	sw		x8,   8*4(x1)
+	sw		x9,   9*4(x1)
+	sw		x10, 10*4(x1)
+	sw		x11, 11*4(x1)
+	sw		x12, 12*4(x1)
+	sw		x13, 13*4(x1)
+	sw		x14, 14*4(x1)
+	sw		x15, 15*4(x1)
+	sw		x16, 16*4(x1)
+	sw		x17, 17*4(x1)
+	sw		x18, 18*4(x1)
+	sw		x19, 19*4(x1)
+	sw		x20, 20*4(x1)
+	sw		x21, 21*4(x1)
+	sw		x22, 22*4(x1)
+	sw		x23, 23*4(x1)
+	sw		x24, 24*4(x1)
+	sw		x25, 25*4(x1)
+	sw		x26, 26*4(x1)
+	sw		x27, 27*4(x1)
+	sw		x28, 28*4(x1)
+	sw		x29, 29*4(x1)
+	sw		x30, 30*4(x1)
+	sw		x31, 31*4(x1)
+
+	/* Get the EPIC STATUS */
+
+	csrr	t6, NR5_EPIC_PRIMASK
+	sw		t6,  32*4(x1)
+
+	/* Set ISR Stack pointer */
+
+	addi		sp, x3, 0		# IRQ SP is in x3 from above
+
+#else // ENABLE_QREGS
+
+	sw		gp,   0*4+0x200(zero)
+	sw		x1,   1*4+0x200(zero)
+	sw		x2,   2*4+0x200(zero)
+	sw		x3,   3*4+0x200(zero)
+	sw		x4,   4*4+0x200(zero)
+	sw		x5,   5*4+0x200(zero)
+	sw		x6,   6*4+0x200(zero)
+	sw		x7,   7*4+0x200(zero)
+	sw		x8,   8*4+0x200(zero)
+	sw		x9,   9*4+0x200(zero)
+	sw		x10, 10*4+0x200(zero)
+	sw		x11, 11*4+0x200(zero)
+	sw		x12, 12*4+0x200(zero)
+	sw		x13, 13*4+0x200(zero)
+	sw		x14, 14*4+0x200(zero)
+	sw		x15, 15*4+0x200(zero)
+	sw		x16, 16*4+0x200(zero)
+	sw		x17, 17*4+0x200(zero)
+	sw		x18, 18*4+0x200(zero)
+	sw		x19, 19*4+0x200(zero)
+	sw		x20, 20*4+0x200(zero)
+	sw		x21, 21*4+0x200(zero)
+	sw		x22, 22*4+0x200(zero)
+	sw		x23, 23*4+0x200(zero)
+	sw		x24, 24*4+0x200(zero)
+	sw		x25, 25*4+0x200(zero)
+	sw		x26, 26*4+0x200(zero)
+	sw		x27, 27*4+0x200(zero)
+	sw		x28, 28*4+0x200(zero)
+	sw		x29, 29*4+0x200(zero)
+	sw		x30, 30*4+0x200(zero)
+	sw		x31, 31*4+0x200(zero)
+
+	/* Get the EPIC STATUS */
+
+	csrr	t6, NR5_EPIC_PRIMASK
+	sw		t6,  32*4+0x200(zero)
+
+	/* Set ISR Stack pointer */
+
+	lui 	sp, %hi(irq_stack)
+	addi 	sp, sp, %lo(irq_stack)
+
+#endif // ENABLE_QREGS
+
+	/* Set arg0 = address of regs */
+
+#ifdef ENABLE_QREGS
+	addi	a0, x4, 0			# REG addr in x4 from above
+#else
+	lui		a0, %hi(irq_regs)
+	addi	a0, a0, %lo(irq_regs)
+#endif
+
+  /* Set arg1 = interrupt type */
+
+#ifdef ENABLE_QREGS
+	lw		a1, 33*4(x1)
+#else
+	addi	a1, tp, 0
+#endif
+
+	/* call interrupt handler C function */
+
+	jal 	ra, irq_dispatch_all
+
+	/* restore registers */
+
+#ifdef ENABLE_QREGS
+
+	/* new irq_regs address returned from C code in a0 */
+
+	addi 	x1, a0, 0
+
+	lw		x3,   3*4(x1)
+	lw		x4,   4*4(x1)
+	lw		x5,   5*4(x1)
+	lw		x6,   6*4(x1)
+	lw		x7,   7*4(x1)
+	lw		x8,   8*4(x1)
+	lw		x9,   9*4(x1)
+	lw		x10, 10*4(x1)
+	lw		x11, 11*4(x1)
+	lw		x12, 12*4(x1)
+	lw		x13, 13*4(x1)
+	lw		x14, 14*4(x1)
+	lw		x15, 15*4(x1)
+	lw		x16, 16*4(x1)
+	lw		x17, 17*4(x1)
+	lw		x18, 18*4(x1)
+	lw		x19, 19*4(x1)
+	lw		x20, 20*4(x1)
+	lw		x21, 21*4(x1)
+	lw		x22, 22*4(x1)
+	lw		x23, 23*4(x1)
+	lw		x24, 24*4(x1)
+	lw		x25, 25*4(x1)
+	lw		x26, 26*4(x1)
+	lw		x27, 27*4(x1)
+	lw		x28, 28*4(x1)
+	lw		x29, 29*4(x1)
+	lw		x30, 30*4(x1)
+	lw		x31, 31*4(x1)
+
+	/* Restore return PC to q0.  This will cause the
+	 * processor to enter a critical state where 
+	 * higher priority IRQs won't happen until after
+	 * the mret, thus protecting our shared QREGS.
+	 */
+
+	lw		x2, 0*4(x1)
+	setq	q0, x2
+
+	/* Restore EPIC STATUS (it may have changed) */
+
+	lw		x2, 32*4(x1)
+	csrw	NR5_EPIC_PRIMASK, x2
+
+	/* Restore the IRQ mask so the processor knows
+	 * which interrupts to signal as handled
+	 */
+
+	lw		x2, 33*4(x1)
+	setq	q1, x2
+
+	/* Put original x1 into q2 */
+
+	lw		x2, 1*4(x1)
+	setq	q2, x2
+
+	/* Put original x2 into q3 */
+
+	lw		x2, 2*4(x1)
+	setq	q3, x2
+
+	/* Deallocate the irq_stack space */
+
+	lui		x2, %hi(irq_stack_addr)
+	addi	x2, x2, %lo(irq_stack_addr)
+	lw		x1, 0(x2)
+	addi	x1, x1, 128*4
+	sw		x1, 0(x2)
+
+	/* Deallocate the irq_regs space */
+
+	lui		x2, %hi(irq_regs_addr)
+	addi	x2, x2, %lo(irq_regs_addr)
+	lw		x1, 0(x2)
+	addi	x1, x1, -32*4
+	sw		x1, 0(x2)
+
+	/* Now restore original x1,x2 from q2,q3 */
+
+	getq	x1, q2
+	getq	x2, q3
+
+#else // ENABLE_QREGS
+
+	/* new irq_regs address returned from C code in a0 */
+
+	addi	a1, zero, 0x200
+	beq		a0, a1, 1f
+	sbreak
+1:
+
+	lw		gp,   0*4+0x200(zero)
+	lw		x1,   1*4+0x200(zero)
+	lw		x2,   2*4+0x200(zero)
+	// do not restore x3 (gp)
+	lw		x4,   4*4+0x200(zero)
+	lw		x5,   5*4+0x200(zero)
+	lw		x6,   6*4+0x200(zero)
+	lw		x7,   7*4+0x200(zero)
+	lw		x8,   8*4+0x200(zero)
+	lw		x9,   9*4+0x200(zero)
+	lw		x10, 10*4+0x200(zero)
+	lw		x11, 11*4+0x200(zero)
+	lw		x12, 12*4+0x200(zero)
+	lw		x13, 13*4+0x200(zero)
+	lw		x14, 14*4+0x200(zero)
+	lw		x15, 15*4+0x200(zero)
+	lw		x16, 16*4+0x200(zero)
+	lw		x17, 17*4+0x200(zero)
+	lw		x18, 18*4+0x200(zero)
+	lw		x19, 19*4+0x200(zero)
+	lw		x20, 20*4+0x200(zero)
+	lw		x21, 21*4+0x200(zero)
+	lw		x22, 22*4+0x200(zero)
+	lw		x23, 23*4+0x200(zero)
+	lw		x24, 24*4+0x200(zero)
+	lw		x25, 25*4+0x200(zero)
+	lw		x26, 26*4+0x200(zero)
+	lw		x27, 27*4+0x200(zero)
+	lw		x28, 28*4+0x200(zero)
+	lw		x29, 29*4+0x200(zero)
+	lw		x30, 30*4+0x200(zero)
+	lw		x31, 31*4+0x200(zero)
+
+#endif // ENABLE_QREGS
+
+	/* Return from Machine Interrupt */
+
+    mret
+
+irq_regs:
+	/* registers are saved to this memory region during interrupt handling
+	 * the program counter is saved as register 0
+	 */
+
+	.fill	34*5,4
+
+	/* stack for the interrupt handler */
+
+	.fill	128*5,4
+irq_stack:
+
+irq_regs_addr:
+   .fill	4,4 
+irq_stack_addr:
+   .fill	4,4
+
+
+/****************************************************************************
+ * Hard mul and div functions for multest.  These are C interfaces to
+ * the MUL / DIV opcodes for performing HARD vs SOFT testing.
+ ****************************************************************************/
+
+#ifdef CONFIG_RV32IM_HW_MULDIV 
+
+/* Multiply, return lower 32 bits */
+
+up_hard_mul:
+	mul		a0, a0, a1
+	ret
+
+/* Multiply, return upper 32 bits */
+
+up_hard_mulh:
+	mulh	a0, a0, a1
+	ret
+
+/* Multiply unsigned */
+
+up_hard_mulhsu:
+	mulhsu	a0, a0, a1
+	ret
+
+up_hard_mulhu:
+	mulhu	a0, a0, a1
+	ret
+
+/* Divide */
+
+up_hard_div:
+	div		a0, a0, a1
+	ret
+
+/* Divide, return remainder */
+
+up_hard_rem:
+	rem		a0, a0, a1
+	ret
+
+/* Divide, unsigned */
+
+up_hard_divu:
+	divu	a0, a0, a1
+	ret
+
+/* Remainder, unsigned */
+
+up_hard_remu:
+	remu	a0, a0, a1
+	ret
+
+/* Calculate number of clock cycles requried for MUL */
+
+up_time_hard_mul:
+	rdcycle	a3
+	mul		a0, a0, a1
+	rdcycle	a4
+	sub		a1, a4, a3
+	sw		a1,0(a2)
+	ret
+
+#endif
+
+/****************************************************************************
+ * This global variable is unsigned int g_idle_topstack and is exported here only
+ * because of its coupling to idle thread stack.
+ ****************************************************************************/
+
+	.section .data
+	.type	g_idle_topstack, object
+g_idle_topstack:
+	.long	NR5M100_HEAP_BASE
+	.size	g_idle_topstack, .-g_idle_topstack
+
+/****************************************************************************
+ * Modeline to set vim formatting options for ASM file.  For this to work,
+ * you must enable moeline processing in your ~/.vimrc file with:
+ *
+ *    ~/.vimrc:
+ *      set modeline
+ *
+ * vim: noet:ts=4:sw=4
+ ****************************************************************************/
diff --git a/arch/risc-v/src/nr5m100/nr5_init.c b/arch/risc-v/src/nr5m100/nr5_init.c
new file mode 100644
index 0000000000000000000000000000000000000000..a296ad5a13cced3a5082258362d2000266c2823c
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/nr5_init.c
@@ -0,0 +1,76 @@
+/************************************************************************************
+ * arch/risc-v/src/nr5m100/nr5_init.c
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+
+#include "nr5.h"
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Function - Initialization
+ *
+ * Performs low level board initializaiton tasks.
+ ************************************************************************************/
+
+void __nr5_init(void)
+{
+  /* Configure the UART so we can get debug output */
+
+  nr5_lowsetup();
+
+  /* Do board initialization */
+
+  nr5_boardinitialize();
+
+  /* Call os_start() */
+
+  os_start();
+
+  /* Shouldn't get here */
+
+  for (;;);
+}
+
+
diff --git a/arch/risc-v/src/nr5m100/nr5_irq.c b/arch/risc-v/src/nr5m100/nr5_irq.c
new file mode 100644
index 0000000000000000000000000000000000000000..fd973e74541722837b7c2f41f22aef6c0b9285b8
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/nr5_irq.c
@@ -0,0 +1,320 @@
+/****************************************************************************
+ * arch/risc-v/src/nr5m100/nr5_irq.c
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "nr5.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+volatile uint32_t *g_current_regs;
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: epic_dump
+ *
+ * Description:
+ *   Dump the EPIC priority register settings
+ *
+ ****************************************************************************/
+
+void epic_dump(void)
+{
+   uint32_t reg;
+   char     str[40];
+
+   __asm__ volatile("csrr %0, 0x7e0" : "=r"(reg));
+   sprintf(str, "IRQMASK  = 0x%08X\r", (int) reg);
+   up_puts(str);
+   __asm__ volatile("csrr %0, 0x7e4" : "=r"(reg));
+   sprintf(str, "IRQSTACK = 0x%08X\r", (int) reg);
+   up_puts(str);
+   __asm__ volatile("csrr %0, 0x7e1" : "=r"(reg));
+   sprintf(str, "PRI1     = 0x%08X\r", (int) reg);
+   up_puts(str);
+   __asm__ volatile("csrr %0, 0x7e2" : "=r"(reg));
+   sprintf(str, "PRI2     = 0x%08X\r", (int) reg);
+   up_puts(str);
+   __asm__ volatile("csrr %0, 0x7e3" : "=r"(reg));
+   sprintf(str, "PRI3     = 0x%08X\r", (int) reg);
+   up_puts(str);
+   __asm__ volatile("csrr %0, 0x7e5" : "=r"(reg));
+   sprintf(str, "SYSTICK  = 0x%08X\r", (int) reg);
+   up_puts(str);
+}
+
+/****************************************************************************
+ * Name: nr5_trap
+ *
+ * Description:
+ *   Handler for execptions.  None are handled and all are fatal
+ *   error conditions.  The only advantage these provided over the default
+ *   unexpected interrupt handler is that they provide a diagnostic output.
+ *
+ ****************************************************************************/
+
+#define CONFIG_DEBUG
+
+int nr5_trap_handler(int irq, void *context, FAR void *arg)
+{
+  uint32_t  sp;
+
+  /* Print a PANIC message */
+
+  up_puts("PANIC!!! TRAP received\r\n");
+
+#ifdef CONFIG_DEBUG
+
+  /* restore the SP to that of the bad code */
+
+  sp = g_current_regs[2];
+  __asm__ volatile ("addi x2, %0, 0" ::"r"(sp));
+
+  __asm__ volatile ("ebreak");
+#endif
+  return 0;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_irqinitialize
+ ****************************************************************************/
+
+void up_irqinitialize(void)
+{
+  uint32_t  mask;
+
+  /* Disable all interrupts */
+
+  mask = ~0;
+  __asm__ volatile("csrw %0, %1" :: "i"(NR5_EPIC_IRQ_MASK), "r"(mask));
+
+  /* Colorize the interrupt stack for debug purposes */
+
+#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 3
+  {
+    size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~3);
+    up_stack_color((FAR void *)((uintptr_t)&g_intstackbase - intstack_size),
+                   intstack_size);
+  }
+#endif
+
+  /* Set the location of the vector table */
+
+  /* Set all interrupts (and exceptions) to the default priority */
+
+#ifdef NR5_EPIC_PRI_REG
+  __asm__ volatile (" \
+        csrw %0, 0(zero) \
+        csrw %1, 0(zero) \
+        csrw %2, 0(zero) " ::
+        "i"(NR5_EPIC_PRI1_REG), "i"(NR5_EPIC_PRI2_REG), 
+        "i"(NR5_EPIC_PRI3_REG) );
+#endif
+
+  /* Initialize the IRQ stack to Pri level 5 with interrupts disabled */
+
+  mask = 0x05 << 2;
+  __asm__ volatile("csrw %0, %1" :: "i"(NR5_EPIC_PRIMASK), "r"(mask));
+
+  /* currents_regs is non-NULL only while processing an interrupt */
+
+  g_current_regs = NULL;
+
+  /* Attach the Trap exception handler.  */
+
+  irq_attach(NR5_IRQ_TRAP, nr5_trap_handler, NULL);
+
+  /* Attach software interrupt handler */
+
+  irq_attach(NR5_IRQ_SOFTWARE, up_swint, NULL);
+  up_enable_irq(NR5_IRQ_SOFTWARE);
+
+  /* Set the software interrupt priority higher */
+
+  up_setpri2bit(1 << NR5_IRQ_SOFTWARE);
+
+#ifndef CONFIG_SUPPRESS_INTERRUPTS
+
+  /* And finally, enable interrupts */
+
+  up_enable_irq(NR5_IRQ_TRAP);
+
+#endif
+
+  /* Now enable Global Interrupts */
+
+  __asm__ volatile("csrrs a0, %0, 3" :: "i"(NR5_EPIC_PRIMASK));
+
+}
+
+/****************************************************************************
+ * Name: up_disable_irq
+ *
+ * Description:
+ *   Disable the IRQ specified by 'irq'
+ *
+ ****************************************************************************/
+
+void up_disable_irq(int irq)
+{
+  up_setirqmaskbit(1 << irq);
+}
+
+/****************************************************************************
+ * Name: up_enable_irq
+ *
+ * Description:
+ *   Enable the IRQ specified by 'irq'
+ *
+ ****************************************************************************/
+
+void up_enable_irq(int irq)
+{
+  up_clearirqmaskbit(1 << irq);
+}
+
+/****************************************************************************
+ * Name: up_ack_irq
+ *
+ * Description:
+ *   Acknowledge the IRQ
+ *
+ ****************************************************************************/
+
+void up_ack_irq(int irq)
+{
+}
+
+/****************************************************************************
+ * Name: up_get_newintctx
+ *
+ * Description:
+ *   Acknowledge the IRQ
+ *
+ ****************************************************************************/
+
+uint32_t up_get_newintctx(void)
+{
+  int32_t   regval;
+
+  /* Set priority level 5, enabled upon return from interrupt */
+
+  regval = ((5 << 2) | 2) << 4;
+
+  return regval;
+}
+
+/****************************************************************************
+ * Name: up_prioritize_irq
+ *
+ * Description:
+ *   Set the priority of an IRQ.
+ *
+ *   Since this API is not supported on all architectures, it should be
+ *   avoided in common implementations where possible.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_IRQPRIO
+int up_prioritize_irq(int irq, int priority)
+{
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: irqsave
+ *
+ * Description:
+ *   Disable IRQs while returning the previous IRQ state
+ *
+ ****************************************************************************/
+
+irqstate_t up_irq_save(void)
+{
+  irqstate_t   newIrqPri = (2 << 2) | 3;
+  irqstate_t   oldIrqPri;
+
+  /* Set the new IRQ Priority level to level 2, enabled.
+   * This will allow SW and DEBUG / TRAP interrupts to
+   * continue to fire, but no general purpose ints.
+   */
+
+  __asm__ volatile("csrrw %0, %1, %2" : "=r"(oldIrqPri) : 
+               "i"(NR5_EPIC_PRIMASK), "r"(newIrqPri));
+
+  return oldIrqPri;
+}
+
+/****************************************************************************
+ * Name: irqrestore
+ *
+ * Description:
+ *   Restore previous IRQ mask state
+ *
+ ****************************************************************************/
+
+void up_irq_restore(irqstate_t pri)
+{
+  __asm__ volatile("csrw %0, %1" :: "i"(NR5_EPIC_PRIMASK), "r"(pri));
+}
diff --git a/arch/risc-v/src/nr5m100/nr5_irq_dispatch.c b/arch/risc-v/src/nr5m100/nr5_irq_dispatch.c
new file mode 100644
index 0000000000000000000000000000000000000000..5271d51abf3e617467d3e6e536aa767ef42fcf46
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/nr5_irq_dispatch.c
@@ -0,0 +1,155 @@
+/************************************************************************************
+ * arch/risc-v/src/nr5m100/nr5_irq_dispatch.c
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ *   Modified for RISC-V: 
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "up_arch.h"
+#include "up_internal.h"
+
+#include "group/group.h"
+
+/****************************************************************************
+ * Extern Functions
+ ****************************************************************************/
+
+int up_lsbenc(int);
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+volatile uint32_t * g_current_regs;
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * irq_dispatch_all
+ ****************************************************************************/
+
+uint32_t * irq_dispatch_all(uint32_t *regs, uint32_t irqmask)
+{
+  int next, mask;
+  mask = irqmask & 0xFFFF;
+
+  board_autoled_on(LED_INIRQ);
+
+#ifdef CONFIG_SUPPRESS_INTERRUPTS
+  PANIC();
+#else
+  /* Current regs non-zero indicates that we are processing an interrupt;
+   * g_current_regs is also used to manage interrupt level context switches.
+   *
+   * Nested interrupts are not supported
+   */
+
+  DEBUGASSERT(g_current_regs == NULL);
+  g_current_regs = regs;
+
+  /* Get ordinal index of interrupt number from mask */
+
+  next = up_lsbenc(mask);
+  while (next != -1)
+  {
+    /* Deliver the IRQ */
+
+    irq_dispatch(next, regs);
+
+    /* Clear the IRQ from the mask */
+
+    mask &= !(1 << next);
+    next = up_lsbenc(mask);
+
+#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
+    /* Check for a context switch.  If a context switch occurred, then
+     * g_current_regs will have a different value than it did on entry.  If an
+     * interrupt level context switch has occurred, then restore the floating
+     * point state and the establish the correct address environment before
+     * returning from the interrupt.
+     */
+    if (regs != g_current_regs)
+      {
+#ifdef CONFIG_ARCH_FPU
+        /* Restore floating point registers */
+
+        up_restorefpu((uint32_t *)g_current_regs);
+#endif
+
+#ifdef CONFIG_ARCH_ADDRENV
+        /* Make sure that the address environment for the previously
+         * running task is closed down gracefully (data caches dump,
+         * MMU flushed) and set up the address environment for the new
+         * thread at the head of the ready-to-run list.
+         */
+
+        (void)group_addrenv(NULL);
+#endif
+      }
+#endif
+  }
+
+#endif
+
+  /* If a context switch occurred while processing the interrupt then
+   * g_current_regs may have change value.  If we return any value different
+   * from the input regs, then the lower level will know that a context
+   * switch occurred during interrupt processing.
+   */
+
+  regs = (uint32_t *) g_current_regs;
+  g_current_regs = NULL;
+
+  board_autoled_off(LED_INIRQ);
+
+  /* Return the stack pointer */
+
+  return regs;
+}
+
diff --git a/arch/risc-v/src/nr5m100/nr5_lowputc.c b/arch/risc-v/src/nr5m100/nr5_lowputc.c
new file mode 100644
index 0000000000000000000000000000000000000000..87a665be517567de08a65dc84fa94f9470ee5854
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/nr5_lowputc.c
@@ -0,0 +1,181 @@
+/**************************************************************************
+ * arch/risc-v/src/nr5m100/nr5_lowputc.c
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ *   Modified for RISC-V:
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************/
+
+/**************************************************************************
+ * Included Files
+ **************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+
+#include "up_internal.h"
+#include "up_arch.h"
+
+#include "nr5_config.h"
+#include "nr5.h"
+
+/**************************************************************************
+ * Pre-processor Definitions
+ **************************************************************************/
+
+/* Select UART parameters for the selected console */
+
+#ifdef HAVE_SERIAL_CONSOLE
+#  if defined(CONFIG_UART1_SERIAL_CONSOLE)
+#    define NR5_CONSOLE_BASE        NR5_UART1_BASE
+#    define NR5_CONSOLE_BAUD        CONFIG_UART1_BAUD
+#    define NR5_CONSOLE_BITS        CONFIG_UART1_BITS
+#    define NR5_CONSOLE_PARITY      CONFIG_UART1_PARITY
+#    define NR5_CONSOLE_2STOP       CONFIG_UART1_2STOP
+#    define NR5_CONSOLE_TX          GPIO_UART1_TX
+#    define NR5_CONSOLE_RX          GPIO_UART1_RX
+#    define HAVE_UART
+#  elif defined(CONFIG_UART2_SERIAL_CONSOLE)
+#    define NR5_CONSOLE_BASE        NR5_UART1_BASE
+#    define NR5_CONSOLE_BAUD        CONFIG_UART1_BAUD
+#    define NR5_CONSOLE_BITS        CONFIG_UART1_BITS
+#    define NR5_CONSOLE_PARITY      CONFIG_UART1_PARITY
+#    define NR5_CONSOLE_2STOP       CONFIG_UART1_2STOP
+#    define NR5_CONSOLE_TX          GPIO_UART1_TX
+#    define NR5_CONSOLE_RX          GPIO_UART1_RX
+#    define HAVE_UART
+#  endif
+
+  /* Calculate UART BAUD rate divider */
+
+#  if defined(CONFIG_NR5_NR5M1XX)
+
+    /* Baud rate for standard UART:
+     *
+     * In case of oversampling by 16, the equation is:
+     *   UARTDIV = fCK / 32 / baud
+     */
+
+#    define NR5_UARTDIV \
+      ((NR5_HCLK_FREQUENCY >> 5) / NR5_CONSOLE_BAUD)
+
+#  endif /* CONFIG_NR5_NR5M1XX */
+#endif /* HAVE_CONSOLE */
+
+/**************************************************************************
+ * Private Types
+ **************************************************************************/
+
+/**************************************************************************
+ * Private Function Prototypes
+ **************************************************************************/
+
+/**************************************************************************
+ * Global Variables
+ **************************************************************************/
+
+/**************************************************************************
+ * Private Variables
+ **************************************************************************/
+
+/**************************************************************************
+ * Private Functions
+ **************************************************************************/
+
+/**************************************************************************
+ * Public Functions
+ **************************************************************************/
+
+/**************************************************************************
+ * Name: up_lowputc
+ *
+ * Description:
+ *   Output one byte on the serial console
+ *
+ **************************************************************************/
+
+void up_lowputc(char ch)
+{
+#ifdef HAVE_SERIAL_CONSOLE
+  /* Wait until the TX data register is empty */
+
+  while ((getreg32(NR5_CONSOLE_BASE + NR5_UART_STATUS_REG_OFFSET) & NR5_UART_STATUS_TX_EMPTY) == 0)
+    ;
+
+  /* Then send the character */
+
+  putreg32((uint32_t)ch, NR5_CONSOLE_BASE + NR5_UART_TX_REG_OFFSET);
+
+#endif /* HAVE_CONSOLE */
+}
+
+/**************************************************************************
+ * Name: nr5_lowsetup
+ *
+ * Description:
+ *   This performs basic initialization of the UART used for the serial
+ *   console.  Its purpose is to get the console output availabe as soon
+ *   as possible.
+ *
+ **************************************************************************/
+
+#if defined(CONFIG_NR5_NR5M1XX)
+
+void nr5_lowsetup(void)
+{
+#if defined(HAVE_UART)
+
+  /* Enable and configure the selected console device */
+
+#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
+
+  /* Configure the UART Baud Rate */
+
+  putreg32(NR5_UARTDIV, NR5_CONSOLE_BASE + NR5_UART_BAUD_RATE_OFFSET);
+
+  /* Configure the RX interrupt */
+
+  putreg32(NR5_UART_CTRL_ENABLE_RX_IRQ, NR5_CONSOLE_BASE + NR5_UART_CTRL_REG_OFFSET);
+
+#endif /* HAVE_SERIAL_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
+#endif /* HAVE_UART */
+}
+
+#else
+#  error "Unsupported NR5 chip"
+#endif
diff --git a/arch/risc-v/src/nr5m100/nr5_lowputc.h b/arch/risc-v/src/nr5m100/nr5_lowputc.h
new file mode 100644
index 0000000000000000000000000000000000000000..4ab7ce08374c18be9a20356201f4fc82d6e5ad69
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/nr5_lowputc.h
@@ -0,0 +1,79 @@
+/************************************************************************************
+ * arch/risc-v/src/nr5m100/nr5_lowputc.h
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_RISCV_SRC_NR5M100_NR5_LOWPUTC_H
+#define __ARCH_RISCV_SRC_NR5M100_NR5_LOWPUTC_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "chip.h"
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Name: nr5_lowsetup
+ *
+ * Description:
+ *   Called at the very beginning of __nr5_init.  Performs low level initialization
+ *   of serial console.
+ *
+ ************************************************************************************/
+
+EXTERN void nr5_lowsetup(void);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_RISCV_SRC_NR5M100_NR5_LOWPUTC_H */
+
diff --git a/arch/risc-v/src/nr5m100/nr5_memorymap.h b/arch/risc-v/src/nr5m100/nr5_memorymap.h
new file mode 100644
index 0000000000000000000000000000000000000000..8ebcfedd68503eacaaf5c42a71f3f3d22b12e286
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/nr5_memorymap.h
@@ -0,0 +1,43 @@
+/************************************************************************************
+ * arch/risc-v/src/nr5m100/nr5_memorymap.h
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef _ARCH_RISCV_SRC_NR5M100_NR5_MEMORYMAP_H
+#define _ARCH_RISCV_SRC_NR5M100_NR5_MEMORYMAP_H
+
+//#include 
+
+#ifdef CONFIG_NR5_NR5MXXX
+#include "chip/nr5m1xx_memorymap.h"
+#endif
+
+#endif  /* _ARCH_RISCV_SRC_NR5M100_NR5_MEMORYMAP_H */
+
diff --git a/arch/risc-v/src/nr5m100/nr5_serial.c b/arch/risc-v/src/nr5m100/nr5_serial.c
new file mode 100644
index 0000000000000000000000000000000000000000..32572a5ebc459fd3f6cf25d41781ea49e424d053
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/nr5_serial.c
@@ -0,0 +1,871 @@
+/****************************************************************************
+ * arch/risc-v/src/nr5m100/nr5_serial.c
+ *
+ *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ *   Modified for RISC-V:
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_SERIAL_TERMIOS
+#  include 
+#endif
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "up_arch.h"
+#include "up_internal.h"
+
+#include "nr5_config.h"
+#include "chip.h"
+#include "nr5.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* If we are not using the serial driver for the console, then we still must
+ * provide some minimal implementation of up_putc.
+ */
+
+#ifdef USE_SERIALDRIVER
+
+/* Which UART with be tty0/console and which tty1?  The console will always
+ * be ttyS0.  If there is no console then will use the lowest numbered UART.
+ */
+
+#ifdef HAVE_SERIAL_CONSOLE
+#  if defined(CONFIG_UART1_SERIAL_CONSOLE)
+#    define CONSOLE_DEV     g_uart1port     /* UART1 is console */
+#    define TTYS0_DEV       g_uart1port     /* UART1 is ttyS0 */
+#    undef  TTYS1_DEV                       /* No ttyS1 */
+#    define SERIAL_CONSOLE  1
+#  else
+#    error "I'm confused... Do we have a serial console or not?"
+#  endif
+#else
+#  undef  CONSOLE_DEV                        /* No console */
+#  undef  CONFIG_UART1_SERIAL_CONSOLE
+#  if defined(CONFIG_NR5_UART1)
+#    define TTYS0_DEV       g_uart1port     /* UART1 is ttyS0 */
+#    undef  TTYS1_DEV                       /* No ttyS1 */
+#    define SERIAL_CONSOLE  1
+#  else
+#    undef  TTYS0_DEV
+#    undef  TTYS1_DEV
+#  endif
+#endif
+
+/* Common initialization logic will not not know that the all of the UARTs
+ * have been disabled.  So, as a result, we may still have to provide
+ * stub implementations of up_earlyserialinit(), up_serialinit(), and
+ * up_putc().
+ */
+
+#ifdef HAVE_UART_DEVICE
+
+/* These values describe the set of enabled interrupts */
+
+#define IE_RX    (1 << 0)
+#define IE_TX    (1 << 1)
+
+#define RX_ENABLED(im)    (((im) & IE_RX) != 0)
+#define TX_ENABLED(im)    (((im) & IE_TX) != 0)
+
+#define ENABLE_RX(im)     do { (im) |= IE_RX; } while (0)
+#define ENABLE_TX(im)     do { (im) |= IE_TX; } while (0)
+
+#define DISABLE_RX(im)    do { (im) &= ~IE_RX; } while (0)
+#define DISABLE_TX(im)    do { (im) &= ~IE_TX; } while (0)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct up_dev_s
+{
+  uintptr_t uartbase; /* Base address of UART registers */
+  uint32_t  baud;      /* Configured baud */
+  uint8_t   irqrx;     /* RX IRQ associated with this UART (for enable) */
+  uint8_t   irqtx;     /* TX IRQ associated with this UART (for enable) */
+  uint8_t   irqprio;   /* Interrupt priority */
+  uint8_t   im;        /* Interrupt mask state */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* Low-level helpers */
+
+static inline uint32_t up_serialin(struct up_dev_s *priv, int offset);
+static inline void up_serialout(struct up_dev_s *priv, int offset, uint32_t value);
+static void up_restoreuartint(struct uart_dev_s *dev, uint8_t im);
+static void up_disableuartint(struct uart_dev_s *dev, uint8_t *im);
+
+/* Serial driver methods */
+
+static int  up_setup(struct uart_dev_s *dev);
+static void up_shutdown(struct uart_dev_s *dev);
+static int  up_attach(struct uart_dev_s *dev);
+static void up_detach(struct uart_dev_s *dev);
+static int  up_interrupt(int irq, void *context, FAR void *arg);
+static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
+static int  up_receive(struct uart_dev_s *dev, uint32_t *status);
+static void up_rxint(struct uart_dev_s *dev, bool enable);
+static bool up_rxavailable(struct uart_dev_s *dev);
+static void up_send(struct uart_dev_s *dev, int ch);
+static void up_txint(struct uart_dev_s *dev, bool enable);
+static bool up_txready(struct uart_dev_s *dev);
+static bool up_txempty(struct uart_dev_s *dev);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct uart_ops_s g_uart_ops =
+{
+  .setup          = up_setup,
+  .shutdown       = up_shutdown,
+  .attach         = up_attach,
+  .detach         = up_detach,
+  .ioctl          = up_ioctl,
+  .receive        = up_receive,
+  .rxint          = up_rxint,
+  .rxavailable    = up_rxavailable,
+#ifdef CONFIG_SERIAL_IFLOWCONTROL
+  .rxflowcontrol  = NULL,
+#endif
+  .send           = up_send,
+  .txint          = up_txint,
+  .txready        = up_txready,
+  .txempty        = up_txempty,
+};
+
+/* I/O buffers */
+
+#ifdef CONFIG_NR5_UART1
+static char g_uart1rxbuffer[CONFIG_UART1_RXBUFSIZE];
+static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE];
+#endif
+
+/* This describes the state of the NR5 UART1 port. */
+
+#ifdef CONFIG_NR5_UART1
+#ifndef CONFIG_NR5_UART1PRIO
+# define CONFIG_NR5_UART1PRIO 4
+#endif
+
+static struct up_dev_s g_uart1priv =
+{
+  .uartbase  = NR5_UART1_BASE,
+  .baud      = CONFIG_UART1_BAUD,
+  .irqrx     = NR5_IRQ_UART1_RX,
+  .irqtx     = NR5_IRQ_UART1_TX,
+  .irqprio   = CONFIG_NR5_UART1PRIO,
+};
+
+static uart_dev_t g_uart1port =
+{
+#if SERIAL_CONSOLE == 1
+  .isconsole = 1,
+#endif
+  .recv      =
+  {
+    .size    = CONFIG_UART1_RXBUFSIZE,
+    .buffer  = g_uart1rxbuffer,
+  },
+  .xmit      =
+  {
+    .size    = CONFIG_UART1_TXBUFSIZE,
+    .buffer  = g_uart1txbuffer,
+   },
+  .ops       = &g_uart_ops,
+  .priv      = &g_uart1priv,
+};
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_serialin
+ ****************************************************************************/
+
+static inline uint32_t up_serialin(struct up_dev_s *priv, int offset)
+{
+  return getreg32(priv->uartbase + offset);
+}
+
+/****************************************************************************
+ * Name: up_serialout
+ ****************************************************************************/
+
+static inline void up_serialout(struct up_dev_s *priv, int offset, uint32_t value)
+{
+  putreg32(value, priv->uartbase + offset);
+}
+
+/****************************************************************************
+ * Name: up_restoreuartint
+ ****************************************************************************/
+
+static void up_restoreuartint(struct uart_dev_s *dev, uint8_t im)
+{
+  irqstate_t flags;
+
+  /* Re-enable/re-disable interrupts corresponding to the state of bits in im */
+
+  flags = enter_critical_section();
+  up_rxint(dev, RX_ENABLED(im));
+  up_txint(dev, TX_ENABLED(im));
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: up_disableuartint
+ ****************************************************************************/
+
+static void up_disableuartint(struct uart_dev_s *dev, uint8_t *im)
+{
+  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+  irqstate_t flags;
+
+  flags = enter_critical_section();
+  if (im)
+   {
+     *im = priv->im;
+   }
+  up_restoreuartint(dev, 0);
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: up_setup
+ *
+ * Description:
+ *   Configure the UART baud, bits, parity, etc. This method is called the
+ *   first time that the serial port is opened.
+ *
+ ****************************************************************************/
+
+static int up_setup(struct uart_dev_s *dev)
+{
+#ifndef CONFIG_SUPPRESS_UART_CONFIG
+//  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+
+  /* Configure the UART as an RS-232 UART */
+
+  //pic32mx_uartconfigure(priv->uartbase, priv->baud, priv->parity,
+  //                      priv->bits, priv->stopbits2);
+#endif
+
+#ifdef CONFIG_ARCH_IRQPRIO
+  /* Set up the interrupt priority */
+
+  up_prioritize_irq(priv->irq, priv->irqprio);
+#endif
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: up_shutdown
+ *
+ * Description:
+ *   Disable the UART.  This method is called when the serial
+ *   port is closed
+ *
+ ****************************************************************************/
+
+static void up_shutdown(struct uart_dev_s *dev)
+{
+  //struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+
+  /* Disable interrupts */
+
+  up_disableuartint(dev, NULL);
+
+  /* Reset hardware and disable Rx and Tx */
+
+  //nr5_uartreset(priv->uartbase);
+}
+
+/****************************************************************************
+ * Name: up_attach
+ *
+ * Description:
+ *   Configure the UART to operation in interrupt driven mode.  This method is
+ *   called when the serial port is opened.  Normally, this is just after the
+ *   the setup() method is called, however, the serial console may operate in
+ *   a non-interrupt driven mode during the boot phase.
+ *
+ *   RX and TX interrupts are not enabled by the attach method (unless the
+ *   hardware supports multiple levels of interrupt enabling).  The RX and TX
+ *   interrupts are not enabled until the txint() and rxint() methods are called.
+ *
+ ****************************************************************************/
+
+static int up_attach(struct uart_dev_s *dev)
+{
+  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+
+  /* Initialize interrupt generation on the peripheral */
+
+  up_serialout(priv, NR5_UART_CTRL_REG_OFFSET, IE_RX | IE_TX);
+  irq_attach(priv->irqrx, up_interrupt, dev);
+  irq_attach(priv->irqtx, up_interrupt, dev);
+
+  /* Indicate no interrupts active in EPIC */
+
+  priv->im = 0;
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: up_detach
+ *
+ * Description:
+ *   Detach UART interrupts.  This method is called when the serial port is
+ *   closed normally just before the shutdown method is called.  The exception
+ *   is the serial console which is never shutdown.
+ *
+ ****************************************************************************/
+
+static void up_detach(struct uart_dev_s *dev)
+{
+  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+
+  /* Disable interrupts */
+
+  up_disableuartint(dev, NULL);
+
+  /* Disable interrupt generation on the peripheral */
+
+  up_serialout(priv, NR5_UART_CTRL_REG_OFFSET, 0);
+
+  /* Detach from the interrupt */
+
+  irq_detach(priv->irqrx);
+  irq_detach(priv->irqtx);
+}
+
+/****************************************************************************
+ * Name: up_interrupt
+ *
+ * Description:
+ *   This is the UART interrupt handler.  It will be invoked when an
+ *   interrupt received on the 'irq'  It should call uart_transmitchars or
+ *   uart_receivechar to perform the appropriate data transfers.  The
+ *   interrupt handling logic must be able to map the 'irq' number into the
+ *   approprite uart_dev_s structure in order to call these functions.
+ *
+ ****************************************************************************/
+
+static int up_interrupt(int irq, void *context, FAR void *arg)
+{
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
+  struct up_dev_s   *priv;
+  int                passes;
+  uint32_t           status;
+  bool               handled;
+
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
+  priv = (struct up_dev_s *)dev->priv;
+
+  /* Loop until there are no characters to be transferred or,
+   * until we have been looping for a long time.
+   */
+
+  handled = true;
+  for (passes = 0; passes < 256 && handled; passes++)
+    {
+      handled = false;
+      
+      status = up_serialin(priv, NR5_UART_STATUS_REG_OFFSET);
+
+      /* Handle incoming, received bytes.  The RX FIFO is configured to
+       * interrupt when the RX FIFO is 75% full (that is 6 of 8 for 8-deep
+       * FIFOs or 3 of 4 for 4-deep FIFOS.
+       */
+
+      if (status & NR5_UART_RX_IRQ_PENDING)
+        {
+          /* Process incoming bytes */
+
+          uart_recvchars(dev);
+          handled = true;
+        }
+
+      /* Handle outgoing, transmit bytes  The RT FIFO is configured to
+       * interrupt only when the TX FIFO is empty.  There are not many
+       * options on trigger TX interrupts.  The FIFO-not-full might generate
+       * better through-put but with a higher interrupt rate.  FIFO-empty should
+       * lower the interrupt rate but result in a burstier output.  If
+       * you change this, You will probably need to change the conditions for
+       * clearing the pending TX interrupt below.
+       *
+       * NOTE: When I tried using the FIFO-not-full interrupt trigger, I
+       * had either lost interrupts, or else a window where I might get
+       * infinite interrupts.  The problem is that there is a race condition
+       * with trying to clearing the pending interrupt based on the FIFO
+       * full condition.
+       */
+
+      if (status & NR5_UART_TX_IRQ_PENDING)
+        {
+          /* Process outgoing bytes */
+
+          uart_xmitchars(dev);
+          handled = true;
+        }
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: up_ioctl
+ *
+ * Description:
+ *   All ioctl calls will be routed through this method
+ *
+ ****************************************************************************/
+
+static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
+{
+#ifdef CONFIG_SERIAL_TERMIOS
+  struct inode      *inode;
+  struct uart_dev_s *dev;
+  struct up_dev_s   *priv;
+  int                ret = OK;
+
+  DEBUGASSERT(filep, filep->f_inode);
+  inode = filep->f_inode;
+  dev   = inode->i_private;
+
+  DEBUGASSERT(dev, dev->priv);
+  priv = (struct up_dev_s *)dev->priv;
+
+  switch (cmd)
+    {
+    case xxx: /* Add commands here */
+      break;
+
+    case TCGETS:
+      {
+        struct termios *termiosp = (struct termios *)arg;
+
+        if (!termiosp)
+          {
+            ret = -EINVAL;
+            break;
+          }
+
+        /* TODO:  Other termios fields are not yet returned.
+         * Note that only cfsetospeed is not necessary because we have
+         * knowledge that only one speed is supported.
+         */
+
+        cfsetispeed(termiosp, priv->baud);
+      }
+      break;
+
+    case TCSETS:
+      {
+        struct termios *termiosp = (struct termios *)arg;
+
+        if (!termiosp)
+          {
+            ret = -EINVAL;
+            break;
+          }
+
+        /* TODO:  Handle other termios settings.
+         * Note that only cfgetispeed is used besued we have knowledge
+         * that only one speed is supported.
+         */
+
+        priv->baud = cfgetispeed(termiosp);
+        //pic32mx_uartconfigure(priv->uartbase, priv->baud, priv->parity,
+        //                      priv->bits, priv->stopbits2);
+      }
+      break;
+
+    default:
+      ret = -ENOTTY;
+      break;
+    }
+
+  return ret;
+#else
+  return -ENOTTY;
+#endif
+}
+
+/****************************************************************************
+ * Name: up_receive
+ *
+ * Description:
+ *   Called (usually) from the interrupt level to receive one
+ *   character from the UART.  Error bits associated with the
+ *   receipt are provided in the return 'status'.
+ *
+ ****************************************************************************/
+
+static int up_receive(struct uart_dev_s *dev, uint32_t *status)
+{
+  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+
+  /* Return status information */
+
+  if (status)
+    {
+      *status = 0; /* We are not yet tracking serial errors */
+    }
+
+  /* Then return the actual received byte */
+
+  return  (int)(up_serialin(priv, NR5_UART_RX_REG_OFFSET));
+}
+
+/****************************************************************************
+ * Name: up_rxint
+ *
+ * Description:
+ *   Call to enable or disable RX interrupts
+ *
+ ****************************************************************************/
+
+static void up_rxint(struct uart_dev_s *dev, bool enable)
+{
+  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+  irqstate_t flags;
+  uint8_t im;
+
+  flags = enter_critical_section();
+  im = priv->im;
+  if (enable)
+    {
+      /* Receive an interrupt when their is anything in the Rx data register (or an Rx
+       * timeout occurs).
+       */
+
+#ifndef CONFIG_SUPPRESS_SERIAL_INTS
+      up_enable_irq(priv->irqrx);
+      ENABLE_RX(im);
+#endif
+    }
+  else
+    {
+      up_disable_irq(priv->irqrx);
+      DISABLE_RX(im);
+    }
+  priv->im = im;
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: up_rxavailable
+ *
+ * Description:
+ *   Return true if the receive register is not empty
+ *
+ ****************************************************************************/
+
+static bool up_rxavailable(struct uart_dev_s *dev)
+{
+  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+
+  /* Return true is data is available in the receive data buffer */
+
+  return (up_serialin(priv, NR5_UART_STATUS_REG_OFFSET) & NR5_UART_STATUS_RX_AVAIL) != 0;
+}
+
+/****************************************************************************
+ * Name: up_send
+ *
+ * Description:
+ *   This method will send one byte on the UART.
+ *
+ ****************************************************************************/
+
+static void up_send(struct uart_dev_s *dev, int ch)
+{
+  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+  up_serialout(priv, NR5_UART_TX_REG_OFFSET, (uint32_t)ch);
+}
+
+/****************************************************************************
+ * Name: up_txint
+ *
+ * Description:
+ *   Call to enable or disable TX interrupts
+ *
+ ****************************************************************************/
+
+static void up_txint(struct uart_dev_s *dev, bool enable)
+{
+  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+  irqstate_t flags;
+  uint8_t im;
+
+  flags = enter_critical_section();
+  im = priv->im;
+  if (enable)
+    {
+      /* Enable the TX interrupt */
+
+#ifndef CONFIG_SUPPRESS_SERIAL_INTS
+      up_enable_irq(priv->irqtx);
+      ENABLE_TX(im);
+
+      /* Fake a TX interrupt here by just calling uart_xmitchars() with
+       * interrupts disabled (note this may recurse).
+       */
+
+      uart_xmitchars(dev);
+#endif
+    }
+  else
+    {
+      /* Disable the TX interrupt */
+
+      up_disable_irq(priv->irqtx);
+      DISABLE_TX(im);
+    }
+
+  priv->im = im;
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: up_txready
+ *
+ * Description:
+ *   Return true if the tranmsit data register is empty
+ *
+ ****************************************************************************/
+
+static bool up_txready(struct uart_dev_s *dev)
+{
+  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+
+  /* Return TRUE if the Transmit buffer register is not full */
+
+  return (up_serialin(priv, NR5_UART_STATUS_REG_OFFSET) & NR5_UART_STATUS_TX_EMPTY) != 0;
+}
+
+/****************************************************************************
+ * Name: up_txempty
+ *
+ * Description:
+ *   Return true if the tranmsit data register is empty
+ *
+ ****************************************************************************/
+
+static bool up_txempty(struct uart_dev_s *dev)
+{
+  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
+
+  /* Return TRUE if the Transmit shift register is empty */
+
+  return (up_serialin(priv, NR5_UART_STATUS_REG_OFFSET) & NR5_UART_STATUS_TX_EMPTY) != 0;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_earlyserialinit
+ *
+ * Description:
+ *   Performs the low level UART initialization early in debug so that the
+ *   serial console will be available during bootup.  This must be called
+ *   before up_serialinit.  NOTE:  This function depends on GPIO pin
+ *   configuration performed in up_consoleinit() and main clock iniialization
+ *   performed in up_clkinitialize().
+ *
+ ****************************************************************************/
+
+void up_earlyserialinit(void)
+{
+  /* Disable interrupts from all UARTS.  The console is enabled in
+   * nr5_consoleinit().
+   */
+
+  up_disableuartint(&TTYS0_DEV, NULL);
+#ifdef TTYS1_DEV
+  up_disableuartint(&TTYS1_DEV, NULL);
+#endif
+
+  /* Configuration whichever one is the console */
+
+#ifdef HAVE_SERIAL_CONSOLE
+  CONSOLE_DEV.isconsole = true;
+  up_setup(&CONSOLE_DEV);
+#endif
+}
+
+/****************************************************************************
+ * Name: up_serialinit
+ *
+ * Description:
+ *   Register serial console and serial ports.  This assumes
+ *   that up_earlyserialinit was called previously.
+ *
+ ****************************************************************************/
+
+void up_serialinit(void)
+{
+  /* Register the console */
+
+#ifdef HAVE_SERIAL_CONSOLE
+  (void)uart_register("/dev/console", &CONSOLE_DEV);
+#endif
+
+  /* Register all UARTs */
+
+  (void)uart_register("/dev/ttyS0", &TTYS0_DEV);
+#ifdef TTYS1_DEV
+  (void)uart_register("/dev/ttyS1", &TTYS1_DEV);
+#endif
+}
+
+/****************************************************************************
+ * Name: up_putc
+ *
+ * Description:
+ *   Provide priority, low-level access to support OS debug  writes
+ *
+ ****************************************************************************/
+
+int up_putc(int ch)
+{
+#ifdef HAVE_SERIAL_CONSOLE
+  struct uart_dev_s *dev = (struct uart_dev_s *)&CONSOLE_DEV;
+  uint8_t imr;
+
+  up_disableuartint(dev, &imr);
+
+  /* Check for LF */
+
+  if (ch == '\n')
+    {
+      /* Add CR */
+
+      up_lowputc('\r');
+    }
+
+  up_lowputc(ch);
+  up_restoreuartint(dev, imr);
+#endif
+  return ch;
+}
+
+/****************************************************************************
+ * Name: up_earlyserialinit, up_serialinit, and up_putc
+ *
+ * Description:
+ *   stubs that may be needed.  These stubs would be used if all UARTs are
+ *   disabled.  In that case, the logic in common/up_initialize() is not
+ *   smart enough to know that there are not UARTs and will still expect
+ *   these interfaces to be provided.
+ *
+ ****************************************************************************/
+#else /* HAVE_UART_DEVICE */
+void up_earlyserialinit(void)
+{
+}
+
+void up_serialinit(void)
+{
+}
+
+int up_putc(int ch)
+{
+  return ch;
+}
+
+#endif /* HAVE_UART_DEVICE */
+#else /* USE_SERIALDRIVER */
+
+/****************************************************************************
+ * Name: up_putc
+ *
+ * Description:
+ *   Provide priority, low-level access to support OS debug writes
+ *
+ ****************************************************************************/
+
+int up_putc(int ch)
+{
+#ifdef HAVE_SERIAL_CONSOLE
+  /* Check for LF */
+
+  if (ch == '\n')
+    {
+      /* Add CR */
+
+      up_lowputc('\r');
+    }
+
+  up_lowputc(ch);
+#endif
+  return ch;
+}
+
+#endif /* USE_SERIALDRIVER */
+
diff --git a/arch/risc-v/src/nr5m100/nr5_timer.c b/arch/risc-v/src/nr5m100/nr5_timer.c
new file mode 100644
index 0000000000000000000000000000000000000000..bc4f716e5c6e9c962e88d2979fcfd5f173d0057a
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/nr5_timer.c
@@ -0,0 +1,511 @@
+/************************************************************************************
+ * arm/risc-v/src/nr5m100/nr5_timer.c
+ *
+ *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ *   Modified for RISC-V:
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "chip.h"
+#include "up_internal.h"
+#include "up_arch.h"
+
+#include "nr5.h"
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+/* Configuration ********************************************************************/
+
+/* This module then only compiles if there are enabled timers that are not intended for
+ * some other purpose.
+ */
+
+#if defined(CONFIG_NR5_TIMER0) || defined(CONFIG_NR5_TIMER1) || defined(CONFIG_NR5_TIMER2) || \
+    defined(CONFIG_NR5_TIMER3) || defined(CONFIG_NR5_TIMER4) || defined(CONFIG_NR5_TIMER5)
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+
+/* Timer Device Structure */
+
+struct nr5_timer_priv_s
+{
+  struct nr5_timer_ops_s *ops;
+  nr5_timer_mode_t        mode;
+  uint32_t                base;   /* TIMERn base address */
+};
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/* Get a 16-bit register value by offset */
+
+static inline uint16_t nr5_getreg16(FAR struct nr5_timer_dev_s *dev,
+                                      uint8_t offset)
+{
+  uint16_t  *p16 = (uint16_t *) (((struct nr5_timer_priv_s *)dev)->base + offset);
+  return *p16;
+}
+
+/* Put a 16-bit register value by offset */
+
+static inline void nr5_putreg16(FAR struct nr5_timer_dev_s *dev, uint8_t offset,
+                                  uint16_t value)
+{
+  uint16_t  *p16 = (uint16_t *) (((struct nr5_timer_priv_s *)dev)->base + offset);
+  *p16 = value;
+}
+
+/* Modify a 16-bit register value by offset */
+
+static inline void nr5_modifyreg16(FAR struct nr5_timer_dev_s *dev,
+                                     uint8_t offset, uint16_t clearbits,
+                                     uint16_t setbits)
+{
+  modifyreg16(((struct nr5_timer_priv_s *)dev)->base + offset, clearbits, setbits);
+}
+
+/* Clear the TAR counter */
+
+static void nr5_timer_clear_counter(FAR struct nr5_timer_dev_s *dev)
+{
+  uint16_t val = nr5_getreg16(dev, NR5_TIMERA_TACTL_OFFSET);
+  val |= TIMERA_TACTL_TACLR;
+  nr5_putreg16(dev, NR5_TIMERA_TACTL_OFFSET, val);
+}
+
+static void nr5_timer_enable(FAR struct nr5_timer_dev_s *dev)
+{
+  uint16_t val = nr5_getreg16(dev, NR5_BTIM_CR1_OFFSET);
+  nr5_timer_clear_counter(dev);
+  val |= ATIM_CR1_CEN;
+  nr5_putreg16(dev, NR5_BTIM_CR1_OFFSET, val);
+}
+
+/* Disable the timer by setting the mode to STOP */
+
+static void nr5_timer_disable(FAR struct nr5_timer_dev_s *dev)
+{
+  uint16_t val = nr5_getreg16(dev, NR5_TIMERA_TACTL_OFFSET);
+  val &= ~TIMERA_TACTL_MC_MASK;
+  nr5_putreg16(dev, NR5_TIMERA_TACTL_OFFSET, val);
+}
+
+/* Reset timer into system default state, but do not affect output/input pins */
+
+static void nr5_timer_reset(FAR struct nr5_timer_dev_s *dev)
+{
+  ((struct nr5_timer_priv_s *)dev)->mode = NR5_TIMER_MODE_DISABLED;
+  nr5_timer_disable(dev);
+}
+
+/************************************************************************************
+ * Basic Functions
+ ************************************************************************************/
+
+static int nr5_timer_setclock(FAR struct nr5_timer_dev_s *dev, uint32_t freq)
+{
+  int prescaler;
+
+  ASSERT(dev);
+
+  /* Disable Timer? */
+
+  if (freq == 0)
+    {
+      nr5_timer_disable(dev);
+      return 0;
+    }
+
+#if NR5_NATIM > 0
+  if (((struct nr5_timer_priv_s *)dev)->base == NR5_TIM1_BASE ||
+      ((struct nr5_timer_priv_s *)dev)->base == NR5_TIM8_BASE)
+    {
+      prescaler = NR5_TIM18_FREQUENCY / freq;
+    }
+  else
+#endif
+    {
+      prescaler = NR5_TIM27_FREQUENCY / freq;
+    }
+
+  /* We need to decrement value for '1', but only, if we are allowed to
+   * not to cause underflow. Check for overflow.
+   */
+
+  if (prescaler > 0)
+    {
+      prescaler--;
+    }
+
+  if (prescaler > 0xffff)
+    {
+      prescaler = 0xffff;
+    }
+
+  nr5_putreg16(dev, NR5_BTIM_PSC_OFFSET, prescaler);
+  nr5_timer_enable(dev);
+
+  return prescaler;
+}
+
+static void nr5_timer_setperiod(FAR struct nr5_timer_dev_s *dev,
+                                uint32_t period)
+{
+  ASSERT(dev);
+  nr5_putreg32(dev, NR5_BTIM_ARR_OFFSET, period);
+}
+
+static int nr5_timer_setisr(FAR struct nr5_timer_dev_s *dev,
+                            xcpt_t handler, void * arg, int source)
+{
+  int vectorno;
+
+  ASSERT(dev);
+  ASSERT(source == 0);
+
+  switch (((struct nr5_timer_priv_s *)dev)->base)
+    {
+#ifdef CONFIG_NR5_TIM2
+      case NR5_TIM2_BASE:
+        vectorno = NR5_IRQ_TIM2;
+        break;
+#endif
+#ifdef CONFIG_NR5_TIM3
+      case NR5_TIM3_BASE:
+        vectorno = NR5_IRQ_TIM3;
+        break;
+#endif
+#ifdef CONFIG_NR5_TIM4
+      case NR5_TIM4_BASE:
+        vectorno = NR5_IRQ_TIM4;
+        break;
+#endif
+#ifdef CONFIG_NR5_TIM5
+      case NR5_TIM5_BASE:
+        vectorno = NR5_IRQ_TIM5;
+        break;
+#endif
+#if NR5_NBTIM > 0
+#ifdef CONFIG_NR5_TIM6
+      case NR5_TIM6_BASE:
+        vectorno = NR5_IRQ_TIM6;
+        break;
+#endif
+#endif
+#if NR5_NBTIM > 1
+#ifdef CONFIG_NR5_TIM7
+      case NR5_TIM7_BASE:
+        vectorno = NR5_IRQ_TIM7;
+        break;
+#endif
+#endif
+#if NR5_NATIM > 0
+      /* TODO: add support for multiple sources and callbacks */
+
+#ifdef CONFIG_NR5_TIM1
+      case NR5_TIM1_BASE:
+        vectorno = NR5_IRQ_TIM1UP;
+        break;
+#endif
+#ifdef CONFIG_NR5_TIM8
+      case NR5_TIM8_BASE:
+        vectorno = NR5_IRQ_TIM8UP;
+        break;
+#endif
+#endif
+      default:
+        return ERROR;
+    }
+
+  /* Disable interrupt when callback is removed */
+
+  if (!handler)
+    {
+      up_disable_irq(vectorno);
+      irq_detach(vectorno);
+      return OK;
+    }
+
+  /* Otherwise set callback and enable interrupt */
+
+  irq_attach(vectorno, handler, arg);
+  up_enable_irq(vectorno);
+
+#ifdef CONFIG_ARCH_IRQPRIO
+  /* Set the interrupt priority */
+
+  up_prioritize_irq(vectorno, NVIC_SYSH_PRIORITY_DEFAULT);
+#endif
+
+  return OK;
+}
+
+static void nr5_timer_enableint(FAR struct nr5_timer_dev_s *dev, int source)
+{
+  ASSERT(dev);
+  nr5_modifyreg16(dev, NR5_BTIM_DIER_OFFSET, 0, ATIM_DIER_UIE);
+}
+
+static void nr5_timer_disableint(FAR struct nr5_timer_dev_s *dev, int source)
+{
+  ASSERT(dev);
+  nr5_modifyreg16(dev, NR5_BTIM_DIER_OFFSET, ATIM_DIER_UIE, 0);
+}
+
+static void nr5_timer_ackint(FAR struct nr5_timer_dev_s *dev, int source)
+{
+  nr5_putreg16(dev, NR5_BTIM_SR_OFFSET, ~ATIM_SR_UIF);
+}
+
+/************************************************************************************
+ * General Functions
+ ************************************************************************************/
+
+static int nr5_timer_setmode(FAR struct nr5_timer_dev_s *dev, nr5_timer_mode_t mode)
+{
+  uint16_t val = ATIM_CR1_CEN | ATIM_CR1_ARPE;
+
+  ASSERT(dev);
+
+  /* Decode operational modes */
+
+  switch (mode & NR5_TIMER_MODE_MASK)
+    {
+      case NR5_TIMER_MODE_DISABLED:
+        val = 0;
+        break;
+
+      case NR5_TIMER_MODE_DOWN:
+        val |= ATIM_CR1_DIR;
+
+      case NR5_TIMER_MODE_UP:
+        break;
+
+      case NR5_TIMER_MODE_UPDOWN:
+        val |= ATIM_CR1_CENTER1;
+        // Our default: Interrupts are generated on compare, when counting down
+        break;
+
+      case NR5_TIMER_MODE_PULSE:
+        val |= ATIM_CR1_OPM;
+        break;
+
+      default: return ERROR;
+    }
+
+  nr5_timer_clear_counter(dev);
+  nr5_putreg16(dev, NR5_BTIM_CR1_OFFSET, val);
+
+  return OK;
+}
+
+/************************************************************************************
+ * Device Structures, Instantiation
+ ************************************************************************************/
+
+struct nr5_timer_ops_s nr5_timer_ops =
+{
+  .setmode        = &nr5_timer_setmode,
+  .setclock       = &nr5_timer_setclock,
+  .setperiod      = &nr5_timer_setperiod,
+  .setisr         = &nr5_timer_setisr,
+  .enableint      = &nr5_timer_enableint,
+  .disableint     = &nr5_timer_disableint,
+  .ackint         = &nr5_timer_ackint
+};
+
+#ifdef CONFIG_NR5_TIMER1
+struct nr5_timer_priv_s nr5_timer1_priv =
+{
+  .ops        = &nr5_timer_ops,
+  .mode       = NR5_TIMER_MODE_UNUSED,
+  .base       = NR5_TIMER1_BASE,
+};
+#endif
+
+#ifdef CONFIG_NR5_TIMER2
+struct nr5_timer_priv_s nr5_timer2_priv =
+{
+  .ops        = &nr5_timer_ops,
+  .mode       = NR5_TIMER_MODE_UNUSED,
+  .base       = NR5_TIMER2_BASE,
+};
+#endif
+
+#ifdef CONFIG_NR5_TIMER3
+struct nr5_timer_priv_s nr5_timer3_priv =
+{
+  .ops        = &nr5_timer_ops,
+  .mode       = NR5_TIMER_MODE_UNUSED,
+  .base       = NR5_TIMER3_BASE,
+};
+#endif
+
+#ifdef CONFIG_NR5_TIMER4
+struct nr5_timer_priv_s nr5_timer4_priv =
+{
+  .ops        = &nr5_timer_ops,
+  .mode       = NR5_TIMER_MODE_UNUSED,
+  .base       = NR5_TIMER4_BASE,
+};
+#endif
+
+#ifdef CONFIG_NR5_TIMER5
+struct nr5_timer_priv_s nr5_timer5_priv =
+{
+  .ops        = &nr5_timer_ops,
+  .mode       = NR5_TIMER_MODE_UNUSED,
+  .base       = NR5_TIMER5_BASE,
+};
+#endif
+
+/************************************************************************************
+ * Public Function - Initialization
+ ************************************************************************************/
+
+FAR struct nr5_timer_dev_s *nr5_timer_init(int timer)
+{
+  struct nr5_timer_dev_s *dev = NULL;
+
+  /* Get structure pointer */
+
+  switch (timer)
+    {
+#ifdef CONFIG_NR5_TIMER1
+      case 1:
+        dev = (struct nr5_timer_dev_s *)&nr5_timer1_priv;
+        break;
+#endif
+#ifdef CONFIG_NR5_TIMER2
+      case 2:
+        dev = (struct nr5_timer_dev_s *)&nr5_timer2_priv;
+        break;
+#endif
+#ifdef CONFIG_NR5_TIMER3
+      case 3:
+        dev = (struct nr5_timer_dev_s *)&nr5_timer3_priv;
+        break;
+#endif
+#ifdef CONFIG_NR5_TIMER4
+      case 4:
+        dev = (struct nr5_timer_dev_s *)&nr5_timer4_priv;
+        break;
+#endif
+#ifdef CONFIG_NR5_TIMER5
+      case 5:
+        dev = (struct nr5_timer_dev_s *)&nr5_timer5_priv;
+        break;
+#endif
+
+      default:
+        return NULL;
+    }
+
+  /* Is device already allocated */
+
+  if (((struct nr5_timer_priv_s *)dev)->mode != NR5_TIMER_MODE_UNUSED)
+    {
+      return NULL;
+    }
+
+  nr5_timer_reset(dev);
+
+  return dev;
+}
+
+/* TODO: Detach interrupts, and close down all TIM Channels */
+
+int nr5_timer_deinit(FAR struct nr5_timer_dev_s * dev)
+{
+  ASSERT(dev);
+
+  /* Set timer mode to STOP */
+
+  switch (((struct nr5_timer_priv_s *)dev)->base)
+    {
+#if NR5_NATIM > 0
+#ifdef CONFIG_NR5_TIM1
+      case NR5_TIMER1_BASE:
+        modifyreg32(NR5_RCC_APB2ENR, RCC_APB2ENR_TIM1EN, 0);
+        break;
+#endif
+#ifdef CONFIG_NR5_TIM2
+      case NR5_TIMER2_BASE:
+        modifyreg32(NR5_RCC_APB1ENR, RCC_APB1ENR_TIM2EN, 0);
+        break;
+#endif
+#ifdef CONFIG_NR5_TIM3
+      case NR5_TIMER3_BASE:
+        modifyreg32(NR5_RCC_APB1ENR, RCC_APB1ENR_TIM3EN, 0);
+        break;
+#endif
+#ifdef CONFIG_NR5_TIM4
+      case NR5_TIMER4_BASE:
+        modifyreg32(NR5_RCC_APB1ENR, RCC_APB1ENR_TIM4EN, 0);
+        break;
+#endif
+#ifdef CONFIG_NR5_TIM5
+      case NR5_TIMER5_BASE:
+        modifyreg32(NR5_RCC_APB1ENR, RCC_APB1ENR_TIM5EN, 0);
+        break;
+#endif
+#endif
+
+      default:
+        return ERROR;
+    }
+
+  /* Mark it as free */
+
+  ((struct nr5_timer_priv_s *)dev)->mode = NR5_TIMER_MODE_UNUSED;
+
+  return OK;
+}
+
+#endif /* defined(CONFIG_NR5_TIM1 || ... || TIM8) */
diff --git a/arch/risc-v/src/nr5m100/nr5_timer.h b/arch/risc-v/src/nr5m100/nr5_timer.h
new file mode 100644
index 0000000000000000000000000000000000000000..2a6d15c3e3d874a00aa8b718dc0bfffd28050692
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/nr5_timer.h
@@ -0,0 +1,168 @@
+/************************************************************************************
+ * arch/risc-v/src/nr5m100/nr5_timer.h
+ *
+ *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ *   Modified for RISC-V:
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_RISCV_SRC_NR5M100_NR5_TIMER_H
+#define __ARCH_RISCV_SRC_NR5M100_NR5_TIMER_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include "chip.h"
+#include "chip/nr5m1xx_timer.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Helpers **************************************************************************/
+
+#define NR5_TIMER_SETMODE(d,mode)       ((d)->ops->setmode(d,mode))
+#define NR5_TIMER_SETCLOCK(d,freq)      ((d)->ops->setclock(d,freq))
+#define NR5_TIMER_SETPERIOD(d,period)   ((d)->ops->setperiod(d,period))
+#define NR5_TIMER_SETCOMPARE(d,ch,comp) ((d)->ops->setcompare(d,ch,comp))
+#define NR5_TIMER_SETISR(d,hnd,arg,s)   ((d)->ops->setisr(d,hnd,arg,s))
+#define NR5_TIMER_ENABLEINT(d,s)        ((d)->ops->enableint(d,s))
+#define NR5_TIMER_DISABLEINT(d,s)       ((d)->ops->disableint(d,s))
+#define NR5_TIMER_ACKINT(d,s)           ((d)->ops->ackint(d,s))
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/* Timer Modes of Operation */
+
+typedef enum
+{
+  NR5_TIMER_MODE_UNUSED       = -1,
+
+  /* One of the following */
+
+  NR5_TIMER_MODE_DISABLED     = 0x0000,
+  NR5_TIMER_MODE_UP           = 0x0001,
+  NR5_TIMER_MODE_CONTINUOUS   = 0x0002,
+  NR5_TIMER_MODE_UPDOWN       = 0x0003,
+
+  /* One of the following */
+
+  NR5_TIM_MODE_CK_SLOW        = 0x0000,
+  NR5_TIM_MODE_CK_MED         = 0x0010,
+  NR5_TIM_MODE_CK_SYS         = 0x0020,
+  NR5_TIM_MODE_CK_EXT         = 0x0030,
+
+} nr5_timer_mode_t;
+
+/* Timer Operations */
+
+struct nr5_timer_dev_s;
+
+struct nr5_timer_ops_s
+{
+  /* Basic Timer Operations */
+
+  int  (*setmode)(FAR struct nr5_timer_dev_s *dev, nr5_timer_mode_t mode);
+  int  (*setclock)(FAR struct nr5_timer_dev_s *dev, uint32_t freq);
+  void (*setperiod)(FAR struct nr5_timer_dev_s *dev, uint32_t period);
+
+  /* Timer Interrupt Operations */
+
+  int  (*setisr)(FAR struct nr5_timer_dev_s *dev, xcpt_t handler, void *arg, int source);
+  void (*enableint)(FAR struct nr5_timer_dev_s *dev, int source);
+  void (*disableint)(FAR struct nr5_timer_dev_s *dev, int source);
+  void (*ackint)(FAR struct nr5_timer_dev_s *dev, int source);
+};
+
+/* Timer Device Structure */
+
+struct nr5_timer_dev_s
+{
+  struct nr5_timer_ops_s *ops;
+};
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/* Power-up timer and get its structure */
+
+FAR struct nr5_timer_dev_s *nr5_timer_init(int timer);
+
+/* Power-down timer, mark it as unused */
+
+int nr5_timer_deinit(FAR struct nr5_timer_dev_s *dev);
+
+/****************************************************************************
+ * Name: nr5_timer_initialize
+ *
+ * Description:
+ *   Bind the configuration timer to a timer lower half instance and
+ *   register the timer drivers at 'devpath'
+ *
+ * Input Parameters:
+ *   devpath - The full path to the timer device. This should be of the form /dev/timer0
+ *   timer - the timer number.
+ *
+ * Returned Values:
+ *   Zero (OK) is returned on success; A negated errno value is returned
+ *   to indicate the nature of any failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_TIMER
+int nr5_timer_initialize(FAR const char *devpath, int timer);
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_RISCV_SRC_NR5M100_NR5_TIMER_H */
+
diff --git a/arch/risc-v/src/nr5m100/nr5_timerisr.c b/arch/risc-v/src/nr5m100/nr5_timerisr.c
new file mode 100644
index 0000000000000000000000000000000000000000..93375279ec744ec03c3255d178859fc859c24214
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/nr5_timerisr.c
@@ -0,0 +1,159 @@
+/****************************************************************************
+ * arch/risc-v/src/nr5m100/nr5_timerisr.c
+ *
+ *   Copyright (C) 2009, 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ *   Modified for RISC-V:
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "up_arch.h"
+
+#include "nr5.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* The desired timer interrupt frequency is provided by the definition
+ * CLK_TCK (see include/time.h).  CLK_TCK defines the desired number of
+ * system clock ticks per second.  That value is a user configurable setting
+ * that defaults to 100 (100 ticks per second = 10 MS interval).
+ *
+ * The RCC feeds the Cortex System Timer (SysTick) with the AHB clock (HCLK)
+ * divided by 8.  The SysTick can work either with this clock or with the
+ * Cortex clock (HCLK), configurable in the SysTick Control and Status
+ * register.
+ */
+
+#ifdef CONFIG_NR5_SYSTICK_SCLK
+#  define SYSTICK_RELOAD ((NR5_SCLK_FREQUENCY / CLOCKS_PER_SEC) - 1)
+#else
+#  define SYSTICK_RELOAD ((NR5_HCLK_FREQUENCY / CLOCKS_PER_SEC) - 1)
+#endif
+
+/* The size of the reload field is 30 bits.  Verify that the reload value
+ * will fit in the reload register.
+ */
+
+#if SYSTICK_RELOAD > 0x3fffffff
+#  error SYSTICK_RELOAD exceeds the range of the RELOAD register
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static uint64_t g_systick = 0;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  nr5m100_timerisr
+ *
+ * Description:
+ *   The timer ISR will perform a variety of services for various portions
+ *   of the systems.
+ *
+ ****************************************************************************/
+
+static int nr5m100_timerisr(int irq, void *context, FAR void *arg)
+{
+  /* Process timer interrupt */
+
+  sched_process_timer();
+  return 0;
+}
+
+/****************************************************************************
+ * Global Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  up_get_systick
+ *
+ * Description:
+ *   Returns the current value of systick.
+ *
+ ****************************************************************************/
+
+uint64_t up_get_systick(void)
+{
+  return g_systick;
+}
+
+/****************************************************************************
+ * Function:  riscv_timer_initialize
+ *
+ * Description:
+ *   This function is called during start-up to initialize
+ *   the timer interrupt.
+ *
+ ****************************************************************************/
+
+void riscv_timer_initialize(void)
+{
+  /* Set the SysTick interrupt to the default priority */
+
+  up_clearpri1bit(NR5_IRQ_SYSTICK);
+  up_clearpri2bit(NR5_IRQ_SYSTICK);
+  up_clearpri3bit(NR5_IRQ_SYSTICK);
+
+  /* Attach the timer interrupt vector */
+
+  (void)irq_attach(NR5_IRQ_SYSTICK, nr5m100_timerisr, NULL);
+
+  /* Configure and enable SysTick to interrupt at the requested rate */
+
+  up_setsystick(0x80000000 | SYSTICK_RELOAD);
+
+  /* And enable the timer interrupt */
+
+  up_enable_irq(NR5_IRQ_SYSTICK);
+}
+
diff --git a/arch/risc-v/src/nr5m100/nr5_uart.c b/arch/risc-v/src/nr5m100/nr5_uart.c
new file mode 100644
index 0000000000000000000000000000000000000000..312c6743d176bfc7c5ad998681eefd8610d9c460
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/nr5_uart.c
@@ -0,0 +1,254 @@
+/************************************************************************************
+ * arch/risc-v/src/nr5m100/nr5_uart.c
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#include 
+#include 
+#include 
+
+#include "nr5.h"
+
+#define MAKE_UINT32(a,b,c,d)  (((a) << 24) | ((b) << 16) | ((c) << 8) | d)
+
+struct nr5_uart_buffer_s
+{
+  uint16_t    head;
+  uint16_t    tail;
+  uint16_t    size;
+  char      * buffer;
+};
+
+struct nr5_uart_regs_s
+{
+   uint32_t* pBaud;        // Data status port
+   uint32_t* pStat;        // Data status port
+   uint8_t*  pTx;          // Data TX port
+   uint8_t*  pRx;          // Data RX port
+   uint32_t* pIntCtrl;     // Interrupt enable control
+   int       rx_irq;       // IRQ number
+   int       tx_irq;       // IRQ number
+};
+
+struct nr5_uart_s
+{
+  volatile struct nr5_uart_regs_s * regs;
+  struct nr5_uart_buffer_s        * tx_buf;
+  struct nr5_uart_buffer_s        * rx_buf;
+};
+
+/*
+==============================================================================
+Static global pointers to access the hardware
+==============================================================================
+*/
+
+#ifdef CONFIG_NR5_HAVE_UART1
+static char g_uart1_rx_buf[CONFIG_NR5_UART_RX_BUF_SIZE];
+static char g_uart1_tx_buf[CONFIG_NR5_UART_TX_BUF_SIZE];
+
+static struct nr5_uart_buffer_s g_nr5_uart1_rx_buf =
+{
+  .head = 0,
+  .tail = 0,
+  .size = CONFIG_NR5_UART_RX_BUF_SIZE,
+  .buffer = g_uart1_rx_buf,
+};
+
+static struct nr5_uart_buffer_s g_nr5_uart1_tx_buf =
+{
+  .head = 0,
+  .tail = 0,
+  .size = CONFIG_NR5_UART_TX_BUF_SIZE,
+  .buffer = g_uart1_tx_buf,
+};
+
+static volatile struct nr5_uart_regs_s g_nr5_uart1_regs =
+{
+  .pBaud    = (uint32_t *) NR5_UART1_BAUD_RATE_REG,
+  .pStat    = (uint32_t *) NR5_UART1_STATUS_REG,
+  .pRx      = (uint8_t *)  NR5_UART1_RX_REG,
+  .pTx      = (uint8_t *)  NR5_UART1_TX_REG,
+  .pIntCtrl = (uint32_t *) NR5_UART1_CTRL_REG,
+  .rx_irq   = NR5_IRQ_UART1_RX,
+  .tx_irq   = NR5_IRQ_UART1_TX,
+};
+
+static struct nr5_uart_s g_nr5_uart1 = 
+{
+  .regs = &g_nr5_uart1_regs,
+  .rx_buf = &g_nr5_uart1_rx_buf,
+  .tx_buf = &g_nr5_uart1_tx_buf,
+};
+#endif
+
+/*
+==============================================================================
+ISR for NanoRisc5 UART RX availalbe.
+==============================================================================
+*/
+int nr5_uart_rx_isr(int irq_num, void *context)
+{
+  struct nr5_uart_s *dev = NULL;
+  char rxdata;
+
+#ifdef CONFIG_NR5_HAVE_UART1
+  if (irq_num == g_nr5_uart1_regs.rx_irq)
+    {
+      dev = &g_nr5_uart1;
+    }
+#endif
+
+  /* Process the data */
+
+  if (dev != NULL)
+    {
+      /* Read the RX byte */
+
+      rxdata = *dev->regs->pRx;
+      *dev->regs->pTx = rxdata;
+
+      dev->rx_buf->buffer[dev->rx_buf->head++] = rxdata;
+      if (dev->rx_buf->head == dev->rx_buf->size)
+        dev->rx_buf->head = 0;
+    }
+
+  return 0;
+}
+
+/*
+==============================================================================
+Routine to initialize the HAL layer.  Must be called prior to any other
+HAL function.
+==============================================================================
+*/
+void nr5_uart_init(int uart)
+{
+  volatile struct nr5_uart_s *dev = NULL;
+  uint32_t cmpval = MAKE_UINT32('F', 'P', 'G', 'A');
+
+  switch (uart)
+  {
+#ifdef CONFIG_NR5_HAVE_UART1
+    case 1:
+      dev = &g_nr5_uart1;
+#endif
+  }
+
+  // If a device was selected above, then initilize it
+  //
+  if (dev != NULL)
+    {
+      /* Attache the ISR and enable the IRQ with the EPIC */
+
+      //irq_attach(dev->regs->rx_irq, &nr5_uart_rx_isr, NULL);
+      //up_enable_irq(dev->regs->rx_irq);
+
+      // Set the baud rate
+ 
+      if (up_getimpid() == cmpval)
+        {
+          *dev->regs->pBaud = 0x0d;
+        }
+
+      /* Now enable the RX IRQ in the UART peripheral */
+
+      //*dev->regs->pIntCtrl = NR5_UART_CTRL_ENABLE_RX_IRQ;
+    }
+}
+
+/*
+==============================================================================
+Routine to get RX byte from console UART
+==============================================================================
+*/
+uint8_t nr5_uart_get_rx()
+{
+  uint8_t rxdata = 0;
+
+  up_disableints();
+  if (g_nr5_uart1.rx_buf->head != g_nr5_uart1.rx_buf->tail)
+    {
+      struct nr5_uart_buffer_s *pBuf = g_nr5_uart1.rx_buf;
+
+      rxdata = pBuf->buffer[pBuf->tail++];
+      if (pBuf->tail == pBuf->size)
+        pBuf->tail = 0;    
+    }
+  up_enableints();
+  return rxdata;
+}
+
+/*
+==============================================================================
+Routine to test if RX byte available at console UART
+==============================================================================
+*/
+int nr5_uart_test_rx_avail()
+{
+  struct nr5_uart_buffer_s *pBuf = g_nr5_uart1.rx_buf;
+  int  avail;
+
+  up_disableints();
+  avail= !(pBuf->head == pBuf->tail);
+  up_enableints();
+
+  /* If no RX data available then halt the processor until an interrupt */
+  if (!avail)
+     __asm__ volatile ("wfi");
+
+  return avail;
+}
+
+/*
+==============================================================================
+Routine to test if RX byte available at console UART
+==============================================================================
+*/
+int nr5_uart_test_tx_empty()
+{
+   return *g_nr5_uart1.regs->pStat & NR5_UART_STATUS_TX_EMPTY;
+}
+
+/*
+==============================================================================
+Routine to send TX byte to console UART
+==============================================================================
+*/
+void nr5_uart_put_tx(uint8_t ch)
+{
+   // Wait for TX to be empty
+   while (!(*g_nr5_uart1.regs->pStat & NR5_UART_STATUS_TX_EMPTY))
+      ;
+
+   // Write to TX
+   *g_nr5_uart1.regs->pTx = ch;
+}
+
diff --git a/arch/risc-v/src/nr5m100/nr5_uart.h b/arch/risc-v/src/nr5m100/nr5_uart.h
new file mode 100644
index 0000000000000000000000000000000000000000..7f40dfc0ab35848802d4fe14042f372b11d56d9c
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/nr5_uart.h
@@ -0,0 +1,49 @@
+/************************************************************************************
+ * arch/riscv/src/nr5/nr5_uart.h
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef _ARCH_RISCV_SRC_NR5_NR5_UART_H
+#define _ARCH_RISCV_SRC_NR5_NR5_UART_H
+
+#include 
+
+#ifdef CONFIG_NR5_NR5M1XX
+#include "chip/nr5m1xx_uart.h"
+#endif
+
+void nr5_uart_init(int uart_num);
+uint8_t nr5_uart_get_rx(void);
+int  nr5_uart_test_rx_avail(void);
+int  nr5_uart_test_tx_empty(void);
+void nr5_uart_put_tx(uint8_t ch);
+
+#endif  /* _ARCH_RISCV_SRC_NR5_NR5_UART_H */
+
diff --git a/arch/risc-v/src/nr5m100/nr5_vectors.S b/arch/risc-v/src/nr5m100/nr5_vectors.S
new file mode 100644
index 0000000000000000000000000000000000000000..ea239d91ce7bbc79808edab5219aba16588ac5b0
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/nr5_vectors.S
@@ -0,0 +1,101 @@
+/************************************************************************************
+ * arch/risc-v/src/nr5m100/nr5_vectors.S
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include "nr5_csr.h"
+
+	.section .text.vec
+	.global	__reset_vec
+	.global	__trap_vec
+
+
+/************************************************************************************
+ * ADDR: 00h - RESET
+ ************************************************************************************/
+
+__reset_vec:
+	csrw	NR5_EPIC_PRIMASK, 7    
+	j		__start
+
+/************************************************************************************
+ * ADDR: 08h - PRI0 (Illegal Instruction, Bus Error)
+ ************************************************************************************/
+
+__trap_vec:
+__pri0_vec:
+	j		irq_handler
+	nop
+
+/************************************************************************************
+ * ADDR: 10h - PRI1 Interrupt Handler
+ ************************************************************************************/
+
+__pri1_vec:
+	j		irq_handler
+	nop
+
+/************************************************************************************
+ * ADDR: 18h - PRI2 Interrupt Handler
+ ************************************************************************************/
+
+__pri2_vec:
+	j		irq_handler
+	nop
+
+/************************************************************************************
+ * ADDR: 20h - PRI3 Interrupt Handler
+ ************************************************************************************/
+
+__pri3_vec:
+	j		irq_handler
+	nop
+
+/************************************************************************************
+ * ADDR: 28h - PRI4 Interrupt Handler
+ ************************************************************************************/
+
+__pri4_vec:
+	j		irq_handler
+	nop
+
+/****************************************************************************
+ * Modeline to set vim formatting options for ASM file.  For this to work,
+ * you must enable moeline processing in your ~/.vimrc file with:
+ *
+ *    ~/.vimrc:
+ *      set modeline
+ *
+ * vim: noet:ts=4:sw=4
+ ****************************************************************************/
diff --git a/arch/risc-v/src/nr5m100/up_schedulesigaction.c b/arch/risc-v/src/nr5m100/up_schedulesigaction.c
new file mode 100644
index 0000000000000000000000000000000000000000..d7b8698a56c853c3af0a0eb090a02c0fc2ba9a96
--- /dev/null
+++ b/arch/risc-v/src/nr5m100/up_schedulesigaction.c
@@ -0,0 +1,213 @@
+/****************************************************************************
+ * arch/risc-v/src/nr5m100/up_schedulesigaction.c
+ *
+ *   Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ *   Modified for RISC-V:
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "up_internal.h"
+#include "up_arch.h"
+
+#ifndef CONFIG_DISABLE_SIGNALS
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_schedule_sigaction
+ *
+ * Description:
+ *   This function is called by the OS when one or more
+ *   signal handling actions have been queued for execution.
+ *   The architecture specific code must configure things so
+ *   that the 'igdeliver' callback is executed on the thread
+ *   specified by 'tcb' as soon as possible.
+ *
+ *   This function may be called from interrupt handling logic.
+ *
+ *   This operation should not cause the task to be unblocked
+ *   nor should it cause any immediate execution of sigdeliver.
+ *   Typically, a few cases need to be considered:
+ *
+ *   (1) This function may be called from an interrupt handler
+ *       During interrupt processing, all xcptcontext structures
+ *       should be valid for all tasks.  That structure should
+ *       be modified to invoke sigdeliver() either on return
+ *       from (this) interrupt or on some subsequent context
+ *       switch to the recipient task.
+ *   (2) If not in an interrupt handler and the tcb is NOT
+ *       the currently executing task, then again just modify
+ *       the saved xcptcontext structure for the recipient
+ *       task so it will invoke sigdeliver when that task is
+ *       later resumed.
+ *   (3) If not in an interrupt handler and the tcb IS the
+ *       currently executing task -- just call the signal
+ *       handler now.
+ *
+ ****************************************************************************/
+
+void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
+{
+  irqstate_t flags;
+  uint32_t int_ctx;
+
+  sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+
+  /* Make sure that interrupts are disabled */
+
+  flags = enter_critical_section();
+
+  /* Refuse to handle nested signal actions */
+
+  if (!tcb->xcp.sigdeliver)
+    {
+      /* First, handle some special cases when the signal is
+       * being delivered to the currently executing task.
+       */
+
+      sinfo("rtcb=0x%p g_current_regs=0x%p\n",
+            this_task(), g_current_regs);
+
+      if (tcb == this_task())
+        {
+          /* CASE 1:  We are not in an interrupt handler and
+           * a task is signalling itself for some reason.
+           */
+
+          if (!g_current_regs)
+            {
+              /* In this case just deliver the signal now. */
+
+              sigdeliver(tcb);
+            }
+
+          /* CASE 2:  We are in an interrupt handler AND the
+           * interrupted task is the same as the one that
+           * must receive the signal, then we will have to modify
+           * the return state as well as the state in the TCB.
+           *
+           * Hmmm... there looks like a latent bug here: The following
+           * logic would fail in the strange case where we are in an
+           * interrupt handler, the thread is signalling itself, but
+           * a context switch to another task has occurred so that
+           * g_current_regs does not refer to the thread of this_task()!
+           */
+
+          else
+            {
+              /* Save the return EPC and STATUS registers.  These will be
+               * restored by the signal trampoline after the signals have
+               * been delivered.
+               */
+
+              tcb->xcp.sigdeliver       = sigdeliver;
+              tcb->xcp.saved_epc        = g_current_regs[REG_EPC];
+
+              /* Then set up to vector to the trampoline with interrupts
+               * disabled
+               */
+
+              g_current_regs[REG_EPC]     = (uint32_t)up_sigdeliver;
+              int_ctx                     = g_current_regs[REG_INT_CTX];
+              int_ctx                     &= ~EPIC_STATUS_INT_PRI_MASK;
+              int_ctx                     |= EPIC_STATUS_INT_PRI1;
+              g_current_regs[REG_INT_CTX] = int_ctx;
+
+              /* And make sure that the saved context in the TCB
+               * is the same as the interrupt return context.
+               */
+
+              up_savestate(tcb->xcp.regs);
+
+              sinfo("PC/STATUS Saved: %08x/%08x New: %08x/%08x\n",
+                    tcb->xcp.saved_epc, tcb->xcp.saved_status,
+                    g_current_regs[REG_EPC], g_current_regs[REG_STATUS]);
+            }
+        }
+
+      /* Otherwise, we are (1) signaling a task is not running
+       * from an interrupt handler or (2) we are not in an
+       * interrupt handler and the running task is signalling
+       * some non-running task.
+       */
+
+      else
+        {
+          /* Save the return EPC and STATUS registers.  These will be
+           * restored by the signal trampoline after the signals have
+           * been delivered.
+           */
+
+          tcb->xcp.sigdeliver       = sigdeliver;
+          tcb->xcp.saved_epc        = tcb->xcp.regs[REG_EPC];
+          tcb->xcp.saved_int_ctx    = tcb->xcp.regs[REG_INT_CTX];
+
+          /* Then set up to vector to the trampoline with interrupts
+           * disabled
+           */
+
+          tcb->xcp.regs[REG_EPC]      = (uint32_t)up_sigdeliver;
+          int_ctx                     = tcb->xcp.regs[REG_INT_CTX];
+          int_ctx                     &= ~EPIC_STATUS_INT_PRI_MASK;
+          int_ctx                     |= EPIC_STATUS_INT_PRI1;
+          tcb->xcp.regs[REG_INT_CTX]  = int_ctx;
+
+          sinfo("PC/STATUS Saved: %08x/%08x New: %08x/%08x\n",
+                tcb->xcp.saved_epc, tcb->xcp.saved_status,
+                tcb->xcp.regs[REG_EPC], tcb->xcp.regs[REG_STATUS]);
+        }
+    }
+
+  leave_critical_section(flags);
+}
+
+#endif /* !CONFIG_DISABLE_SIGNALS */
diff --git a/arch/risc-v/src/rv32im/Kconfig b/arch/risc-v/src/rv32im/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..e1607047b0fb56205794d9f72f1de969320b5ee2
--- /dev/null
+++ b/arch/risc-v/src/rv32im/Kconfig
@@ -0,0 +1,51 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+comment "RV32IM Configuration Options"
+
+choice
+	prompt "Toolchain Selection"
+	default RV32IM_TOOLCHAIN_GNU_RVGW if TOOLCHAIN_WINDOWS
+	default RV32IM_TOOLCHAIN_GNU_RVGL if !TOOLCHAIN_WINDOWS
+
+config RV32IM_TOOLCHAIN_GNU_RVGL
+	bool "Generic GNU RVG toolchain under Linux (or other POSIX environment)"
+	---help---
+		This option should work for any modern GNU toolchain (GCC 5.2 or newer)
+		configured for riscv32-unknown-elf.
+
+config RV32IM_TOOLCHAIN_GNU_RVGW
+	bool "Generic GNU RVG toolchain under Windows"
+	depends on TOOLCHAIN_WINDOWS
+	---help---
+		This option should work for any modern GNU toolchain (GCC 5.2 or newer)
+		configured for riscv32-unknown-elf.
+
+endchoice
+
+config RV32IM_HW_MULDIV
+	bool "Supports Hardware MUL and DIV"
+	default n
+	---help---
+		Specifies if the architecture supports hardware multiply and
+		hardware division instructions.  Selecting this will cause the
+		generated code to natively use mul / div instructions for any
+		math operations.
+
+config RV32IM_SYSTEM_CSRRS_SUPPORT
+	bool "Supports RV core feature identification via CSRRS opcode"
+	default n
+	---help---
+		Specifies if the architecture supports the SYSTEM opcode for reading
+		Control Status Registers to obtain the RV core option flags.
+
+config RV32IM_CUSTOM_IRQ_SUPPORT
+	bool "Has custom implementation for IRQ handling"
+	default n
+	---help---
+		Allows overriding the standard IRQ processing as described
+		in the RISC-V architecture documents.  This allows architecture
+		specific code to support non-standard IRQ processing in the core.
+
diff --git a/arch/risc-v/src/rv32im/Toolchain.defs b/arch/risc-v/src/rv32im/Toolchain.defs
new file mode 100644
index 0000000000000000000000000000000000000000..a89cf6cb26697c96b1026efd7c6d7ba784a35a51
--- /dev/null
+++ b/arch/risc-v/src/rv32im/Toolchain.defs
@@ -0,0 +1,104 @@
+############################################################################
+# arch/risc-v/src/rv32im/Toolchain.defs
+#
+#   Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+# 
+#   modified for RISC-V:
+#
+#   Copyright (C) 2016 Ken Pettit. All rights reserved.
+#   Author: Ken Pettit 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+# Setup for the selected toolchain
+
+#
+# Handle old-style chip-specific toolchain names in the absence of
+# a new-style toolchain specification, force the selection of a single
+# toolchain and allow the selected toolchain to be overridden by a
+# command-line selection.
+#
+
+ifeq ($(filter y, $(CONFIG_RV32IM_TOOLCHAIN_GNU_RVGL)),y)
+  CONFIG_RISCV_TOOLCHAIN ?= GNU_RVGL
+endif
+
+ifeq ($(filter y, $(CONFIG_RV32IM_TOOLCHAIN_GNU_RVGW)),y)
+  CONFIG_RISCV_TOOLCHAIN ?= GNU_RVGW
+endif
+
+#
+# Supported toolchains
+#
+# Each toolchain definition should set:
+#
+#  CROSSDEV         The GNU toolchain triple (command prefix)
+#  ARCROSSDEV       If required, an alternative prefix used when
+#                   invoking ar and nm.
+#  ARCHCPUFLAGS     CPU-specific flags selecting the instruction set
+#                   options, etc.
+#  MAXOPTIMIZATION  The maximum optimization level that results in
+#                   reliable code generation.
+#
+
+ifeq ($(CONFIG_DEBUG_CUSTOMOPT),y)
+  MAXOPTIMIZATION := $(CONFIG_DEBUG_OPTLEVEL)
+endif
+
+# Generic GNU RVG toolchain on OS X, Linux or any typical Posix system
+
+ifeq ($(CONFIG_RISCV_TOOLCHAIN),GNU_RVGL)
+  CROSSDEV ?= riscv64-unknown-elf-
+  ARCROSSDEV ?= riscv64-unknown-elf-
+ifeq ($(CONFIG_RV32IM_HW_MULDIV),y)
+  ARCHCPUFLAGS = -march=RV32IMXcustom -m32
+else
+  ARCHCPUFLAGS = -march=RV32IXcustom -m32
+endif
+endif
+
+ifeq ($(CONFIG_RISCV_TOOLCHAIN),GNU_RVGW)
+  CROSSDEV ?= riscv32-unknown-elf-
+  ARCROSSDEV ?= riscv32-unknown-elf-
+  ifneq ($(CONFIG_WINDOWS_NATIVE),y)
+    WINTOOL = y
+  endif
+ifeq ($(CONFIG_RV32IM_HW_MULDIV),y)
+  ARCHCPUFLAGS = -march=RV32IMXcustom -m32 
+else
+  ARCHCPUFLAGS = -march=RV32IXcustom -m32 
+endif
+endif
+
+# Individual tools may limit the optimizatin level but, by default, the
+# optimization level will be set to to -Os
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),)
+MAXOPTIMIZATION ?= -Os
+endif
+
diff --git a/arch/risc-v/src/rv32im/up_assert.c b/arch/risc-v/src/rv32im/up_assert.c
new file mode 100644
index 0000000000000000000000000000000000000000..a5edaa54d18d68ddc8a4c0531a49ac5c72bf1955
--- /dev/null
+++ b/arch/risc-v/src/rv32im/up_assert.c
@@ -0,0 +1,161 @@
+/****************************************************************************
+ * arch/risc-v/src/rv32im/up_assert.c
+ *
+ *   Copyright (C) 2011-2015 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "up_arch.h"
+#include "sched/sched.h"
+#include "up_internal.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* USB trace dumping */
+
+#ifndef CONFIG_USBDEV_TRACE
+#  undef CONFIG_ARCH_USBDUMP
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: _up_assert
+ ****************************************************************************/
+
+static void _up_assert(int errorcode) noreturn_function;
+static void _up_assert(int errorcode)
+{
+  /* Are we in an interrupt handler or the idle task? */
+
+  if (g_current_regs || this_task()->pid == 0)
+    {
+       (void)up_irq_save();
+        for (; ; )
+          {
+#ifdef CONFIG_ARCH_LEDS
+            board_autoled_on(LED_PANIC);
+            up_mdelay(250);
+            board_autoled_off(LED_PANIC);
+            up_mdelay(250);
+#endif
+          }
+    }
+  else
+    {
+      exit(errorcode);
+    }
+}
+
+/****************************************************************************
+ * Name: assert_tracecallback
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_USBDUMP
+static int usbtrace_syslog(FAR const char *fmt, ...)
+{
+  va_list ap;
+  int ret;
+
+  /* Let vsyslog do the real work */
+
+  va_start(ap, fmt);
+  ret = vsyslog(LOG_EMERG, fmt, ap);
+  va_end(ap);
+  return ret;
+}
+
+static int assert_tracecallback(FAR struct usbtrace_s *trace, FAR void *arg)
+{
+  usbtrace_trprintf(usbtrace_syslog, trace->event, trace->value);
+  return 0;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_assert
+ ****************************************************************************/
+
+void up_assert(const uint8_t *filename, int lineno)
+{
+#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
+  struct tcb_s *rtcb = this_task();
+#endif
+
+  board_autoled_on(LED_ASSERTION);
+
+#if CONFIG_TASK_NAME_SIZE > 0
+  _alert("Assertion failed at file:%s line: %d task: %s\n",
+        filename, lineno, rtcb->name);
+#else
+  _alert("Assertion failed at file:%s line: %d\n",
+        filename, lineno);
+#endif
+
+  up_dumpstate();
+
+#ifdef CONFIG_ARCH_USBDUMP
+  /* Dump USB trace data */
+
+  (void)usbtrace_enumerate(assert_tracecallback, NULL);
+#endif
+
+#ifdef CONFIG_BOARD_CRASHDUMP
+  board_crashdump(up_getsp(), this_task(), filename, lineno);
+#endif
+
+  _up_assert(EXIT_FAILURE);
+}
diff --git a/arch/risc-v/src/rv32im/up_blocktask.c b/arch/risc-v/src/rv32im/up_blocktask.c
new file mode 100644
index 0000000000000000000000000000000000000000..530797da2b189fee6e7843c5925bc7c72e266d9a
--- /dev/null
+++ b/arch/risc-v/src/rv32im/up_blocktask.c
@@ -0,0 +1,179 @@
+/****************************************************************************
+ * arch/risc-v/src/rv32im/up_blocktask.c
+ *
+ *   Copyright (C) 2011, 2013-2015 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "group/group.h"
+#include "up_internal.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_block_task
+ *
+ * Description:
+ *   The currently executing task at the head of
+ *   the ready to run list must be stopped.  Save its context
+ *   and move it to the inactive list specified by task_state.
+ *
+ * Inputs:
+ *   tcb: Refers to a task in the ready-to-run list (normally
+ *     the task at the head of the list).  It most be
+ *     stopped, its context saved and moved into one of the
+ *     waiting task lists.  It it was the task at the head
+ *     of the ready-to-run list, then a context to the new
+ *     ready to run task must be performed.
+ *   task_state: Specifies which waiting task list should be
+ *     hold the blocked task TCB.
+ *
+ ****************************************************************************/
+
+void up_block_task(struct tcb_s *tcb, tstate_t task_state)
+{
+  struct tcb_s *rtcb = this_task();
+  bool switch_needed;
+
+  /* Verify that the context switch can be performed */
+
+  ASSERT((tcb->task_state >= FIRST_READY_TO_RUN_STATE) &&
+         (tcb->task_state <= LAST_READY_TO_RUN_STATE));
+
+  /* Remove the tcb task from the ready-to-run list.  If we
+   * are blocking the task at the head of the task list (the
+   * most likely case), then a context switch to the next
+   * ready-to-run task is needed. In this case, it should
+   * also be true that rtcb == tcb.
+   */
+
+  switch_needed = sched_removereadytorun(tcb);
+
+  /* Add the task to the specified blocked task list */
+
+  sched_addblocked(tcb, (tstate_t)task_state);
+
+  /* If there are any pending tasks, then add them to the ready-to-run
+   * task list now
+   */
+
+  if (g_pendingtasks.head)
+    {
+      switch_needed |= sched_mergepending();
+    }
+
+  /* Now, perform the context switch if one is needed */
+
+  if (switch_needed)
+    {
+      /* Update scheduler parameters */
+
+      sched_suspend_scheduler(rtcb);
+
+      /* Are we in an interrupt handler? */
+
+      if (g_current_regs)
+        {
+          /* Yes, then we have to do things differently.
+           * Just copy the g_current_regs into the OLD rtcb.
+           */
+
+          up_savestate(rtcb->xcp.regs);
+
+          /* Restore the exception context of the rtcb at the (new) head
+           * of the ready-to-run task list.
+           */
+
+          rtcb = this_task();
+
+          /* Reset scheduler parameters */
+
+          sched_resume_scheduler(rtcb);
+
+          /* Then switch contexts.  Any necessary address environment
+           * changes will be made when the interrupt returns.
+           */
+
+          up_restorestate(rtcb->xcp.regs);
+        }
+
+      /* No, then we will need to perform the user context switch */
+
+      else
+        {
+          /* Get the context of the task at the head of the ready to
+           * run list.
+           */
+
+          struct tcb_s *nexttcb = this_task();
+
+#ifdef CONFIG_ARCH_ADDRENV
+          /* Make sure that the address environment for the previously
+           * running task is closed down gracefully (data caches dump,
+           * MMU flushed) and set up the address environment for the new
+           * thread at the head of the ready-to-run list.
+           */
+
+          (void)group_addrenv(nexttcb);
+#endif
+          /* Reset scheduler parameters */
+
+          sched_resume_scheduler(nexttcb);
+
+          /* Then switch contexts */
+
+          up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
+
+          /* up_switchcontext forces a context switch to the task at the
+           * head of the ready-to-run list.  It does not 'return' in the
+           * normal sense.  When it does return, it is because the blocked
+           * task is again ready to run and has execution priority.
+           */
+        }
+    }
+}
diff --git a/arch/risc-v/src/rv32im/up_copystate.c b/arch/risc-v/src/rv32im/up_copystate.c
new file mode 100644
index 0000000000000000000000000000000000000000..ca0fa98019aec0873e1585f1c7c469b179195906
--- /dev/null
+++ b/arch/risc-v/src/rv32im/up_copystate.c
@@ -0,0 +1,86 @@
+/****************************************************************************
+ * arch/risc-v/src/rv32im/up_copystate.c
+ *
+ *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include "up_internal.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_copystate
+ ****************************************************************************/
+
+/* A little faster than most memcpy's */
+
+void up_copystate(uint32_t *dest, uint32_t *src)
+{
+  int i;
+
+  /* In the MIPS model, the state is copied from the stack to the TCB,
+   * but only a reference is passed to get the state from the TCB.  So the
+   * following check avoids copying the TCB save area onto itself:
+   */
+
+  if (src != dest)
+    {
+      for (i = 0; i < XCPTCONTEXT_REGS; i++)
+        {
+          *dest++ = *src++;
+        }
+    }
+}
+
diff --git a/arch/risc-v/src/rv32im/up_doirq.c b/arch/risc-v/src/rv32im/up_doirq.c
new file mode 100644
index 0000000000000000000000000000000000000000..70966d12f96c7ed22348330b0d22fa3db023196e
--- /dev/null
+++ b/arch/risc-v/src/rv32im/up_doirq.c
@@ -0,0 +1,148 @@
+/****************************************************************************
+ * arch/risc-v/src/rv32im/up_doirq.c
+ *
+ *   Copyright (C) 2011, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "up_arch.h"
+#include "up_internal.h"
+
+#include "group/group.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+uint32_t *up_doirq(int irq, uint32_t *regs)
+{
+  board_autoled_on(LED_INIRQ);
+#ifdef CONFIG_SUPPRESS_INTERRUPTS
+  PANIC();
+#else
+  /* Current regs non-zero indicates that we are processing an interrupt;
+   * g_current_regs is also used to manage interrupt level context switches.
+   *
+   * Nested interrupts are not supported
+   */
+
+  DEBUGASSERT(g_current_regs == NULL);
+  g_current_regs = regs;
+
+  /* Disable further occurrences of this interrupt (until the interrupt sources
+   * have been clear by the driver).
+   */
+
+  up_disable_irq(irq);
+
+  /* Deliver the IRQ */
+
+  irq_dispatch(irq, regs);
+
+#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
+  /* Check for a context switch.  If a context switch occurred, then
+   * g_current_regs will have a different value than it did on entry.  If an
+   * interrupt level context switch has occurred, then restore the floating
+   * point state and the establish the correct address environment before
+   * returning from the interrupt.
+   */
+
+  if (regs != g_current_regs)
+    {
+#ifdef CONFIG_ARCH_FPU
+      /* Restore floating point registers */
+
+      up_restorefpu((uint32_t *)g_current_regs);
+#endif
+
+#ifdef CONFIG_ARCH_ADDRENV
+      /* Make sure that the address environment for the previously
+       * running task is closed down gracefully (data caches dump,
+       * MMU flushed) and set up the address environment for the new
+       * thread at the head of the ready-to-run list.
+       */
+
+      (void)group_addrenv(NULL);
+#endif
+    }
+#endif
+
+  /* If a context switch occurred while processing the interrupt then
+   * g_current_regs may have change value.  If we return any value different
+   * from the input regs, then the lower level will know that a context
+   * switch occurred during interrupt processing.
+   */
+
+  regs = (uint32_t *)g_current_regs;
+
+  /* Set g_current_regs to NULL to indicate that we are no longer in an
+   * interrupt handler.
+   */
+
+  g_current_regs = NULL;
+
+  /* Unmask the last interrupt (global interrupts are still disabled) */
+
+  up_enable_irq(irq);
+#endif
+  board_autoled_off(LED_INIRQ);
+  return regs;
+}
diff --git a/arch/risc-v/src/rv32im/up_dumpstate.c b/arch/risc-v/src/rv32im/up_dumpstate.c
new file mode 100644
index 0000000000000000000000000000000000000000..97f74c641103a6902343535d9c33c348c43aa2cf
--- /dev/null
+++ b/arch/risc-v/src/rv32im/up_dumpstate.c
@@ -0,0 +1,231 @@
+/****************************************************************************
+ * arch/risc-v/src/rv32im/up_dumpstate.c
+ *
+ *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ *   Updated for RISC-V:
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "up_arch.h"
+#include "sched/sched.h"
+#include "up_internal.h"
+
+#ifdef CONFIG_ARCH_STACKDUMP
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_getsp
+ ****************************************************************************/
+
+static inline uint32_t up_getsp(void)
+{
+  register uint32_t sp;
+  __asm__
+  (
+    "\tadd  %0, x0, x2\n"
+    : "=r"(sp)
+  );
+  return sp;
+}
+
+/****************************************************************************
+ * Name: up_stackdump
+ ****************************************************************************/
+
+static void up_stackdump(uint32_t sp, uint32_t stack_base)
+{
+  uint32_t stack ;
+
+  for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
+    {
+      uint32_t *ptr = (uint32_t *)stack;
+      _alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+             stack, ptr[0], ptr[1], ptr[2], ptr[3],
+             ptr[4], ptr[5], ptr[6], ptr[7]);
+    }
+}
+
+/****************************************************************************
+ * Name: up_registerdump
+ ****************************************************************************/
+
+static inline void up_registerdump(void)
+{
+  /* Are user registers available from interrupt processing? */
+
+  if (g_current_regs)
+    {
+      _alert("EPC:%08x \n",
+            g_current_regs[REG_EPC]);
+      _alert("A0:%08x A1:%08x A2:%08x A3:%08x A4:%08x A5:%08x A6:%08x A7:%08x\n",
+            g_current_regs[REG_A0], g_current_regs[REG_A1], g_current_regs[REG_A2],
+            g_current_regs[REG_A3], g_current_regs[REG_A4], g_current_regs[REG_A5],
+            g_current_regs[REG_A6], g_current_regs[REG_A7]);
+      _alert("T0:%08x T1:%08x T2:%08x T3:%08x T4:%08x T5:%08x T6:%08x\n",
+            g_current_regs[REG_T0], g_current_regs[REG_T1], g_current_regs[REG_T2],
+            g_current_regs[REG_T3], g_current_regs[REG_T4], g_current_regs[REG_T5],
+            g_current_regs[REG_T6]);
+      _alert("S0:%08x S1:%08x S2:%08x S3:%08x S4:%08x S5:%08x S6:%08x S7:%08x\n",
+            g_current_regs[REG_S0], g_current_regs[REG_S1], g_current_regs[REG_S2],
+            g_current_regs[REG_S3], g_current_regs[REG_S4], g_current_regs[REG_S5],
+            g_current_regs[REG_S6], g_current_regs[REG_S7]);
+      _alert("S8:%08x S9:%08x S10:%08x S11:%08x\n",
+            g_current_regs[REG_S8], g_current_regs[REG_S9], g_current_regs[REG_S10],
+            g_current_regs[REG_S11]);
+#ifdef RISCV_SAVE_GP
+      _alert("GP:%08x SP:%08x FP:%08x TP:%08x RA:%08x\n",
+            g_current_regs[REG_GP], g_current_regs[REG_SP], g_current_regs[REG_FP], 
+            g_current_regs[REG_TP], g_current_regs[REG_RA]);
+#else
+      _alert("SP:%08x FP:%08x TP:%08x RA:%08x\n",
+            g_current_regs[REG_SP], g_current_regs[REG_FP], g_current_regs[REG_TP],
+            g_current_regs[REG_RA]);
+#endif
+    }
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_dumpstate
+ ****************************************************************************/
+
+void up_dumpstate(void)
+{
+  struct tcb_s *rtcb = this_task();
+  uint32_t sp = up_getsp();
+  uint32_t ustackbase;
+  uint32_t ustacksize;
+#if CONFIG_ARCH_INTERRUPTSTACK > 3
+  uint32_t istackbase;
+  uint32_t istacksize;
+#endif
+
+  /* Get the limits on the user stack memory */
+
+  if (rtcb->pid == 0)
+    {
+      ustackbase = g_idle_topstack - 4;
+      ustacksize = CONFIG_IDLETHREAD_STACKSIZE;
+    }
+  else
+    {
+      ustackbase = (uint32_t)rtcb->adj_stack_ptr;
+      ustacksize = (uint32_t)rtcb->adj_stack_size;
+    }
+
+  /* Get the limits on the interrupt stack memory */
+
+#if CONFIG_ARCH_INTERRUPTSTACK > 3
+  istackbase = (uint32_t)&g_intstackbase;
+  istacksize = (CONFIG_ARCH_INTERRUPTSTACK & ~3) - 4;
+
+  /* Show interrupt stack info */
+
+  _alert("sp:     %08x\n", sp);
+  _alert("IRQ stack:\n");
+  _alert("  base: %08x\n", istackbase);
+  _alert("  size: %08x\n", istacksize);
+
+  /* Does the current stack pointer lie within the interrupt
+   * stack?
+   */
+
+  if (sp <= istackbase && sp > istackbase - istacksize)
+    {
+      /* Yes.. dump the interrupt stack */
+
+      up_stackdump(sp, istackbase);
+
+      /* Extract the user stack pointer which should lie
+       * at the base of the interrupt stack.
+       */
+
+      sp = g_intstackbase;
+      _alert("sp:     %08x\n", sp);
+    }
+
+  /* Show user stack info */
+
+  _alert("User stack:\n");
+  _alert("  base: %08x\n", ustackbase);
+  _alert("  size: %08x\n", ustacksize);
+#else
+  _alert("sp:         %08x\n", sp);
+  _alert("stack base: %08x\n", ustackbase);
+  _alert("stack size: %08x\n", ustacksize);
+#endif
+
+  /* Dump the user stack if the stack pointer lies within the allocated user
+   * stack memory.
+   */
+
+  if (sp > ustackbase || sp <= ustackbase - ustacksize)
+    {
+#if !defined(CONFIG_ARCH_INTERRUPTSTACK) || CONFIG_ARCH_INTERRUPTSTACK < 4
+      _alert("ERROR: Stack pointer is not within allocated stack\n");
+#endif
+    }
+  else
+    {
+      up_stackdump(sp, ustackbase);
+    }
+
+  /* Then dump the registers (if available) */
+
+  up_registerdump();
+}
+
+#endif /* CONFIG_ARCH_STACKDUMP */
diff --git a/arch/risc-v/src/rv32im/up_initialstate.c b/arch/risc-v/src/rv32im/up_initialstate.c
new file mode 100644
index 0000000000000000000000000000000000000000..492f9f108601043d5a5de345b942f43c86bf049e
--- /dev/null
+++ b/arch/risc-v/src/rv32im/up_initialstate.c
@@ -0,0 +1,133 @@
+/****************************************************************************
+ * arch/risc-v/src/rv32im/up_initialstate.c
+ *
+ *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "up_internal.h"
+#include "up_arch.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_initial_state
+ *
+ * Description:
+ *   A new thread is being started and a new TCB
+ *   has been created. This function is called to initialize
+ *   the processor specific portions of the new TCB.
+ *
+ *   This function must setup the intial architecture registers
+ *   and/or  stack so that execution will begin at tcb->start
+ *   on the next context switch.
+ *
+ ****************************************************************************/
+
+void up_initial_state(struct tcb_s *tcb)
+{
+  struct xcptcontext *xcp = &tcb->xcp;
+  uint32_t regval;
+
+  /* Initialize the initial exception register context structure */
+
+  memset(xcp, 0, sizeof(struct xcptcontext));
+
+  /* Save the initial stack pointer.  Hmmm.. the stack is set to the very
+   * beginning of the stack region.  Some functions may want to store data on
+   * the caller's stack and it might be good to reserve some space.  However,
+   * only the start function would do that and we have control over that one
+   */
+
+  xcp->regs[REG_SP]      = (uint32_t)tcb->adj_stack_ptr;
+
+  /* Save the task entry point */
+
+  xcp->regs[REG_EPC]     = (uint32_t)tcb->start;
+
+  /* If this task is running PIC, then set the PIC base register to the
+   * address of the allocated D-Space region.
+   */
+
+#ifdef CONFIG_PIC
+#  warning "Missing logic"
+#endif
+
+  /* Set privileged- or unprivileged-mode, depending on how NuttX is
+   * configured and what kind of thread is being started.
+   *
+   * If the kernel build is not selected, then all threads run in
+   * privileged thread mode.
+   */
+
+#ifdef CONFIG_BUILD_KERNEL
+#  warning "Missing logic"
+#endif
+
+  /* Set the initial value of the interrupt context register.  
+   *
+   * Since various RISC-V platforms use different interrupt
+   * methodologies, the value of the interrupt context is
+   * part specific.
+   *
+   */
+
+  regval = up_get_newintctx();
+  xcp->regs[REG_INT_CTX] = regval;
+}
+
diff --git a/arch/risc-v/src/rv32im/up_releasepending.c b/arch/risc-v/src/rv32im/up_releasepending.c
new file mode 100644
index 0000000000000000000000000000000000000000..e3fa22d47ed4798830b170fd73087533a78e39ea
--- /dev/null
+++ b/arch/risc-v/src/rv32im/up_releasepending.c
@@ -0,0 +1,148 @@
+/****************************************************************************
+ *  arch/risc-v/src/rv32im/up_releasepending.c
+ *
+ *   Copyright (C) 2011, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "group/group.h"
+#include "up_internal.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_release_pending
+ *
+ * Description:
+ *   Release and ready-to-run tasks that have
+ *   collected in the pending task list.  This can call a
+ *   context switch if a new task is placed at the head of
+ *   the ready to run list.
+ *
+ ****************************************************************************/
+
+void up_release_pending(void)
+{
+  struct tcb_s *rtcb = this_task();
+
+  sinfo("From TCB=%p\n", rtcb);
+
+  /* Merge the g_pendingtasks list into the ready-to-run task list */
+
+  /* sched_lock(); */
+  if (sched_mergepending())
+    {
+      /* The currently active task has changed!  We will need to switch
+       * contexts.
+       *
+       * Update scheduler parameters.
+       */
+
+      sched_suspend_scheduler(rtcb);
+
+      /* Are we operating in interrupt context? */
+
+      if (g_current_regs)
+        {
+          /* Yes, then we have to do things differently.
+           * Just copy the g_current_regs into the OLD rtcb.
+           */
+
+           up_savestate(rtcb->xcp.regs);
+
+          /* Restore the exception context of the rtcb at the (new) head
+           * of the ready-to-run task list.
+           */
+
+          rtcb = this_task();
+
+          /* Update scheduler parameters */
+
+          sched_resume_scheduler(rtcb);
+
+          /* Then switch contexts.  Any necessary address environment
+           * changes will be made when the interrupt returns.
+           */
+
+          up_restorestate(rtcb->xcp.regs);
+        }
+
+      /* No, then we will need to perform the user context switch */
+
+      else
+        {
+          /* Switch context to the context of the task at the head of the
+           * ready to run list.
+           */
+
+          struct tcb_s *nexttcb = this_task();
+
+#ifdef CONFIG_ARCH_ADDRENV
+          /* Make sure that the address environment for the previously
+           * running task is closed down gracefully (data caches dump,
+           * MMU flushed) and set up the address environment for the new
+           * thread at the head of the ready-to-run list.
+           */
+
+          (void)group_addrenv(nexttcb);
+#endif
+          /* Update scheduler parameters */
+
+          sched_resume_scheduler(nexttcb);
+
+          /* Then switch contexts */
+
+          up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
+
+          /* up_switchcontext forces a context switch to the task at the
+           * head of the ready-to-run list.  It does not 'return' in the
+           * normal sense.  When it does return, it is because the blocked
+           * task is again ready to run and has execution priority.
+           */
+        }
+    }
+}
diff --git a/arch/risc-v/src/rv32im/up_reprioritizertr.c b/arch/risc-v/src/rv32im/up_reprioritizertr.c
new file mode 100644
index 0000000000000000000000000000000000000000..26ed4ab2d10a3f62c6a4a16806004f28b5cb4ae0
--- /dev/null
+++ b/arch/risc-v/src/rv32im/up_reprioritizertr.c
@@ -0,0 +1,203 @@
+/****************************************************************************
+ *  arch/risc-v/src/rv32im/up_reprioritizertr.c
+ *
+ *   Copyright (C) 2011, 2013-2015 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "group/group.h"
+#include "up_internal.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_reprioritize_rtr
+ *
+ * Description:
+ *   Called when the priority of a running or
+ *   ready-to-run task changes and the reprioritization will
+ *   cause a context switch.  Two cases:
+ *
+ *   1) The priority of the currently running task drops and the next
+ *      task in the ready to run list has priority.
+ *   2) An idle, ready to run task's priority has been raised above the
+ *      the priority of the current, running task and it now has the
+ *      priority.
+ *
+ * Inputs:
+ *   tcb: The TCB of the task that has been reprioritized
+ *   priority: The new task priority
+ *
+ ****************************************************************************/
+
+void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
+{
+  /* Verify that the caller is sane */
+
+  if (tcb->task_state < FIRST_READY_TO_RUN_STATE ||
+      tcb->task_state > LAST_READY_TO_RUN_STATE
+#if SCHED_PRIORITY_MIN > 0
+      || priority < SCHED_PRIORITY_MIN
+#endif
+#if SCHED_PRIORITY_MAX < UINT8_MAX
+      || priority > SCHED_PRIORITY_MAX
+#endif
+    )
+    {
+       PANIC();
+    }
+  else
+    {
+      struct tcb_s *rtcb = this_task();
+      bool switch_needed;
+
+      sinfo("TCB=%p PRI=%d\n", tcb, priority);
+
+      /* Remove the tcb task from the ready-to-run list.
+       * sched_removereadytorun will return true if we just
+       * remove the head of the ready to run list.
+       */
+
+      switch_needed = sched_removereadytorun(tcb);
+
+      /* Setup up the new task priority */
+
+      tcb->sched_priority = (uint8_t)priority;
+
+      /* Return the task to the specified blocked task list.
+       * sched_addreadytorun will return true if the task was
+       * added to the new list.  We will need to perform a context
+       * switch only if the EXCLUSIVE or of the two calls is non-zero
+       * (i.e., one and only one the calls changes the head of the
+       * ready-to-run list).
+       */
+
+      switch_needed ^= sched_addreadytorun(tcb);
+
+      /* Now, perform the context switch if one is needed */
+
+      if (switch_needed)
+        {
+          /* If we are going to do a context switch, then now is the right
+           * time to add any pending tasks back into the ready-to-run list.
+           * task list now
+           */
+
+          if (g_pendingtasks.head)
+            {
+              sched_mergepending();
+            }
+
+          /* Update scheduler parameters */
+
+          sched_suspend_scheduler(rtcb);
+
+         /* Are we in an interrupt handler? */
+
+          if (g_current_regs)
+            {
+              /* Yes, then we have to do things differently.
+               * Just copy the g_current_regs into the OLD rtcb.
+               */
+
+               up_savestate(rtcb->xcp.regs);
+
+              /* Restore the exception context of the rtcb at the (new) head
+               * of the ready-to-run task list.
+               */
+
+              rtcb = this_task();
+
+              /* Update scheduler parameters */
+
+              sched_resume_scheduler(rtcb);
+
+              /* Then switch contexts.  Any necessary address environment
+               * changes will be made when the interrupt returns.
+               */
+
+              up_restorestate(rtcb->xcp.regs);
+            }
+
+          /* No, then we will need to perform the user context switch */
+
+          else
+            {
+              /* Switch context to the context of the task at the head of the
+               * ready to run list.
+               */
+
+              struct tcb_s *nexttcb = this_task();
+
+#ifdef CONFIG_ARCH_ADDRENV
+              /* Make sure that the address environment for the previously
+               * running task is closed down gracefully (data caches dump,
+               * MMU flushed) and set up the address environment for the new
+               * thread at the head of the ready-to-run list.
+               */
+
+              (void)group_addrenv(nexttcb);
+#endif
+              /* Update scheduler parameters */
+
+              sched_resume_scheduler(nexttcb);
+
+              /* Then switch contexts */
+
+              up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
+
+              /* up_switchcontext forces a context switch to the task at the
+               * head of the ready-to-run list.  It does not 'return' in the
+               * normal sense.  When it does return, it is because the blocked
+               * task is again ready to run and has execution priority.
+               */
+            }
+        }
+    }
+}
diff --git a/arch/risc-v/src/rv32im/up_sigdeliver.c b/arch/risc-v/src/rv32im/up_sigdeliver.c
new file mode 100644
index 0000000000000000000000000000000000000000..6d57a2b4a36a90ec11c85b852ee4ea22295c3aa5
--- /dev/null
+++ b/arch/risc-v/src/rv32im/up_sigdeliver.c
@@ -0,0 +1,155 @@
+/****************************************************************************
+ * arch/risc-v/src/rv32im/up_sigdeliver.c
+ *
+ *   Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ *   Modified for RISC-V:
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "up_internal.h"
+#include "up_arch.h"
+
+#ifndef CONFIG_DISABLE_SIGNALS
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_sigdeliver
+ *
+ * Description:
+ *   This is the a signal handling trampoline.  When a signal action was
+ *   posted.  The task context was mucked with and forced to branch to this
+ *   location with interrupts disabled.
+ *
+ ****************************************************************************/
+
+void up_sigdeliver(void)
+{
+  struct tcb_s *rtcb = this_task();
+  uint32_t regs[XCPTCONTEXT_REGS];
+  sig_deliver_t sigdeliver;
+
+  /* Save the errno.  This must be preserved throughout the signal handling
+   * so that the user code final gets the correct errno value (probably
+   * EINTR).
+   */
+
+  int saved_errno = rtcb->pterrno;
+
+  board_autoled_on(LED_SIGNAL);
+
+  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+        rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
+  ASSERT(rtcb->xcp.sigdeliver != NULL);
+
+  /* Save the real return state on the stack. */
+
+  up_copystate(regs, rtcb->xcp.regs);
+  regs[REG_EPC]        = rtcb->xcp.saved_epc;
+  regs[REG_INT_CTX]    = rtcb->xcp.saved_int_ctx;
+
+  /* Get a local copy of the sigdeliver function pointer. We do this so that
+   * we can nullify the sigdeliver function pointer in the TCB and accept
+   * more signal deliveries while processing the current pending signals.
+   */
+
+  sigdeliver           = rtcb->xcp.sigdeliver;
+  rtcb->xcp.sigdeliver = NULL;
+
+  /* Then restore the task interrupt state */
+
+  up_irq_restore((irqstate_t)regs[REG_INT_CTX]);
+
+  /* Deliver the signals */
+
+  sigdeliver(rtcb);
+
+  /* Output any debug messages BEFORE restoring errno (because they may
+   * alter errno), then disable interrupts again and restore the original
+   * errno that is needed by the user logic (it is probably EINTR).
+   */
+
+  sinfo("Resuming EPC: %08x INT_CTX: %08x\n", regs[REG_EPC], regs[REG_INT_CTX]);
+
+  (void)up_irq_save();
+  rtcb->pterrno = saved_errno;
+
+  /* Then restore the correct state for this thread of
+   * execution.
+   */
+
+  board_autoled_off(LED_SIGNAL);
+  up_fullcontextrestore(regs);
+
+  /* up_fullcontextrestore() should not return but could if the software
+   * interrupts are disabled.
+   */
+
+  PANIC();
+}
+
+#endif /* !CONFIG_DISABLE_SIGNALS */
+
diff --git a/arch/risc-v/src/rv32im/up_swint.c b/arch/risc-v/src/rv32im/up_swint.c
new file mode 100644
index 0000000000000000000000000000000000000000..1ba8c73bbd82739103a05e73ce5ba251b05a4cb7
--- /dev/null
+++ b/arch/risc-v/src/rv32im/up_swint.c
@@ -0,0 +1,285 @@
+/****************************************************************************
+ * arch/riscv/src/rv32im/up_swint.c
+ *
+ *   Copyright (C) 2011-2012, 2015 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+
+#include "up_internal.h"
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_registerdump
+ ****************************************************************************/
+
+#ifdef CONFIG_DEBUG_SYSCALL_INFO
+static void up_registerdump(const uint32_t *regs)
+{
+  svcinfo("EPC:%08x\n",
+          regs[REG_EPC]);
+  svcinfo("A0:%08x A1:%08x A2:%08x A3:%08x A4:%08x A5:%08x A6:%08x A7:%08x\n",
+          regs[REG_A0], regs[REG_A1], regs[REG_A2], regs[REG_A3],
+          regs[REG_A4], regs[REG_A5], regs[REG_A6], regs[REG_A7]);
+  svcinfo("T0:%08x T1:%08x T2:%08x T3:%08x T4:%08x T5:%08x T6:%08x\n",
+          regs[REG_T0], regs[REG_T1], regs[REG_T2], regs[REG_T3],
+          regs[REG_T4], regs[REG_T5], regs[REG_T6]);
+  svcinfo("S0:%08x S1:%08x S2:%08x S3:%08x S4:%08x S5:%08x S6:%08x S7:%08x\n",
+          regs[REG_S0], regs[REG_S1], regs[REG_S2], regs[REG_S3],
+          regs[REG_S4], regs[REG_S5], regs[REG_S6], regs[REG_S7]);
+  svcinfo("S8:%08x S9:%08x S10:%08x S11:%08x\n",
+          regs[REG_S8], regs[REG_S9], regs[REG_S10], regs[REG_S11]);
+#ifdef MIPS32_SAVE_GP
+  svcinfo("GP:%08x SP:%08x FP:%08x TP:%08x RA:%08x\n",
+          regs[REG_GP], regs[REG_SP], regs[REG_FP], regs[REG_TP], regs[REG_RA]);
+#else
+  svcinfo("SP:%08x FP:%08x TP:%08x RA:%08x\n",
+          regs[REG_SP], regs[REG_FP], regs[REG_TP], regs[REG_RA]);
+#endif
+}
+#else
+#  define up_registerdump(regs)
+#endif
+
+/****************************************************************************
+ * Name: dispatch_syscall
+ *
+ * Description:
+ *   Call the stub function corresponding to the system call.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BUILD_KERNEL
+static void dispatch_syscall(void) naked_function;
+static void dispatch_syscall(void)
+{
+#  error "Missing logic"
+
+/* Refer to arch/arm/src/armv7-m/up_svcall.h for how this is done for ARM */
+/*  __asm__ __volatile__ */
+/* ( */
+/*   Save registers */
+/*   Get the base of the stub lookup table */
+/*   Get the offset of the stub for this syscall */
+/*   Load the entry of the stub for this syscall */
+/*   Call the stub */
+/*   Restore regsisters */
+/*   Return from the syscall */
+/* ); */
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_swint
+ *
+ * Description:
+ *   This is software interrupt exception handler that performs context
+ *   switching and manages system calls
+ *
+ ****************************************************************************/
+
+int up_swint(int irq, FAR void *context, FAR void *arg)
+{
+  uint32_t *regs = (uint32_t *)context;
+
+  DEBUGASSERT(regs && regs == g_current_regs);
+
+  /* Software interrupt 0 is invoked with REG_A0 (REG_X10) = system call
+   * command and REG_A1-6 = variable number of
+   * arguments depending on the system call.
+   */
+
+#ifdef CONFIG_DEBUG_SYSCALL_INFO
+  svcinfo("Entry: regs: %p cmd: %d\n", regs, regs[REG_A0]);
+  up_registerdump(regs);
+#endif
+
+  /* Handle the SWInt according to the command in $a0 */
+
+  switch (regs[REG_A0])
+    {
+      /* A0=SYS_restore_context: This a restore context command:
+       *
+       *   void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
+       *
+       * At this point, the following values are saved in context:
+       *
+       *   A0 = SYS_restore_context
+       *   A1 = restoreregs
+       *
+       * In this case, we simply need to set g_current_regs to restore register
+       * area referenced in the saved R1. context == g_current_regs is the normal
+       * exception return.  By setting g_current_regs = context[R1], we force
+       * the return to the saved context referenced in $a1.
+       */
+
+      case SYS_restore_context:
+        {
+          DEBUGASSERT(regs[REG_A1] != 0);
+          g_current_regs = (uint32_t *)regs[REG_A1];
+        }
+        break;
+
+      /* A0=SYS_switch_context: This a switch context command:
+       *
+       *   void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
+       *
+       * At this point, the following values are saved in context:
+       *
+       *   A0 = SYS_switch_context
+       *   A1 = saveregs
+       *   A2 = restoreregs
+       *
+       * In this case, we save the context registers to the save register
+       * area reference by the saved contents of R5 and then set
+       * g_current_regs to to the save register area referenced by the saved
+       * contents of R6.
+       */
+
+      case SYS_switch_context:
+        {
+          DEBUGASSERT(regs[REG_A1] != 0 && regs[REG_A2] != 0);
+          up_copystate((uint32_t *)regs[REG_A1], regs);
+          g_current_regs = (uint32_t *)regs[REG_A2];
+        }
+        break;
+
+      /* A0=SYS_syscall_return: This a switch context command:
+       *
+       *   void up_sycall_return(void);
+       *
+       * At this point, the following values are saved in context:
+       *
+       *   A0 = SYS_syscall_return
+       *
+       * We need to restore the saved return address and return in
+       * unprivileged thread mode.
+       */
+
+#ifdef CONFIG_BUILD_KERNEL
+      case SYS_syscall_return:
+        {
+          struct tcb_s *rtcb = sched_self();
+          int index = (int)rtcb->xcp.nsyscalls - 1;
+
+          /* Make sure that there is a saved syscall return address. */
+
+          DEBUGASSERT(index >= 0);
+
+          /* Setup to return to the saved syscall return address in
+           * the original mode.
+           */
+
+          g_current_regs[REG_EPC] = rtcb->xcp.syscall[index].sysreturn;
+#error "Missing logic -- need to restore the original mode"
+          rtcb->xcp.nsyscalls   = index;
+        }
+        break;
+#endif
+
+      /* This is not an architecture-specify system call.  If NuttX is built
+       * as a standalone kernel with a system call interface, then all of the
+       * additional system calls must be handled as in the default case.
+       */
+
+      default:
+        {
+#ifdef CONFIG_BUILD_KERNEL
+          FAR struct tcb_s *rtcb = sched_self();
+          int index = rtcb->xcp.nsyscalls;
+
+          /* Verify that the SYS call number is within range */
+
+          DEBUGASSERT(g_current_regs[REG_A0] < SYS_maxsyscall);
+
+          /* Make sure that we got here that there is a no saved syscall
+           * return address.  We cannot yet handle nested system calls.
+           */
+
+          DEBUGASSERT(index < CONFIG_SYS_NNEST);
+
+          /* Setup to return to dispatch_syscall in privileged mode. */
+
+          rtcb->xcpsyscall[index].sysreturn = regs[REG_EPC];
+#error "Missing logic -- Need to save mode"
+          rtcb->xcp.nsyscalls  = index + 1;
+
+          regs[REG_EPC] = (uint32_t)dispatch_syscall;
+#error "Missing logic -- Need to set privileged mode"
+
+          /* Offset R0 to account for the reserved values */
+
+          g_current_regs[REG_A0] -= CONFIG_SYS_RESERVED;
+#else
+          svcerr("ERROR: Bad SYS call: %d\n", regs[REG_A0]);
+#endif
+        }
+        break;
+    }
+
+  /* Report what happened.  That might difficult in the case of a context switch */
+
+#ifdef CONFIG_DEBUG_SYSCALL_INFO
+  if (regs != g_current_regs)
+    {
+      svcinfo("SWInt Return: Context switch!\n");
+      up_registerdump((const uint32_t *)g_current_regs);
+    }
+  else
+    {
+      svcinfo("SWInt Return: %d\n", regs[REG_A0]);
+    }
+#endif
+
+  return OK;
+}
diff --git a/arch/risc-v/src/rv32im/up_syscall.S b/arch/risc-v/src/rv32im/up_syscall.S
new file mode 100644
index 0000000000000000000000000000000000000000..1c110db6295f686f6e00829fb7a31267d47196a5
--- /dev/null
+++ b/arch/risc-v/src/rv32im/up_syscall.S
@@ -0,0 +1,112 @@
+/****************************************************************************
+ * arch/riscv/src/rv32im/up_syscall.S
+ *
+ *   Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ *   Modified for RISC-V:
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Public Symbols
+ ****************************************************************************/
+
+	.file	"up_syscall0.S"
+	.global sys_call0
+	.global sys_call1
+	.global sys_call2
+	.global sys_call3
+	.global sys_call4
+	.global sys_call5
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_syscall0, up_syscall1, up_syscall2, up_syscall3
+ *
+ * Description:
+ *   up_syscall0 - System call SYS_ argument and no additional parameters.
+ *   up_syscall1 - System call SYS_ argument and one additional parameter.
+ *   up_syscall2 - System call SYS_ argument and two additional parameters.
+ *   up_syscall3 - System call SYS_ argument and three additional parameters.
+ *   up_syscall4 - System call SYS_ argument and four additional parameters.
+ *   up_syscall5 - System call SYS_ argument and five additional parameters.
+ *
+ * Assumption:
+ *   All interrupts are disabled except for the software interrupts.
+ *
+ ****************************************************************************/
+
+	.text
+
+sys_call0:	/* a0 holds the syscall number */
+sys_call1:	/* a0 holds the syscall number, argument in a1 */
+sys_call2:	/* a0 holds the syscall number, arguments in a1 and a2 */
+sys_call3:	/* a0 holds the syscall number, arguments in a1, a2, and a3 */
+sys_call4:	/* a0 holds the syscall number, arguments in a1, a2, a3 and a4 */
+sys_call5:	/* a0 holds the syscall number, arguments in a1, a2, a3, a4 and a5 */
+
+	/* Issue the ECALL opcode to perform a SW interrupt to the OS */
+
+   ecall
+
+	/* The actual interrupt may not a occur for a few more cycles.  Let's
+	 * put a few nop's here in hope that the SW interrupt occurs during
+	 * the sequence of nops.
+	 */
+
+	nop
+	nop
+
+	/* Then return with the result of the software interrupt in v0 */
+
+	ret
+	nop
+
diff --git a/arch/risc-v/src/rv32im/up_unblocktask.c b/arch/risc-v/src/rv32im/up_unblocktask.c
new file mode 100644
index 0000000000000000000000000000000000000000..1b7350e05b1ced91addcd74d8175b14f6ffddf25
--- /dev/null
+++ b/arch/risc-v/src/rv32im/up_unblocktask.c
@@ -0,0 +1,163 @@
+/****************************************************************************
+ *  arch/risc-v/src/rv32im/up_unblocktask.c
+ *
+ *   Copyright (C) 2011, 2013-2015 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "group/group.h"
+#include "clock/clock.h"
+#include "up_internal.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_unblock_task
+ *
+ * Description:
+ *   A task is currently in an inactive task list
+ *   but has been prepped to execute.  Move the TCB to the
+ *   ready-to-run list, restore its context, and start execution.
+ *
+ * Inputs:
+ *   tcb: Refers to the tcb to be unblocked.  This tcb is
+ *     in one of the waiting tasks lists.  It must be moved to
+ *     the ready-to-run list and, if it is the highest priority
+ *     ready to run task, executed.
+ *
+ ****************************************************************************/
+
+void up_unblock_task(struct tcb_s *tcb)
+{
+  struct tcb_s *rtcb = this_task();
+
+  /* Verify that the context switch can be performed */
+
+  ASSERT((tcb->task_state >= FIRST_BLOCKED_STATE) &&
+         (tcb->task_state <= LAST_BLOCKED_STATE));
+
+  /* Remove the task from the blocked task list */
+
+  sched_removeblocked(tcb);
+
+  /* Add the task in the correct location in the prioritized
+   * ready-to-run task list
+   */
+
+  if (sched_addreadytorun(tcb))
+    {
+      /* The currently active task has changed! We need to do
+       * a context switch to the new task.
+       */
+
+      /* Update scheduler parameters */
+
+      sched_suspend_scheduler(rtcb);
+
+      /* Are we in an interrupt handler? */
+
+      if (g_current_regs)
+        {
+          /* Yes, then we have to do things differently.
+           * Just copy the g_current_regs into the OLD rtcb.
+           */
+
+          up_savestate(rtcb->xcp.regs);
+
+          /* Restore the exception context of the rtcb at the (new) head
+           * of the ready-to-run task list.
+           */
+
+          rtcb = this_task();
+
+          /* Update scheduler parameters */
+
+          sched_resume_scheduler(rtcb);
+
+          /* Then switch contexts.  Any necessary address environment
+           * changes will be made when the interrupt returns.
+           */
+
+          up_restorestate(rtcb->xcp.regs);
+        }
+
+      /* No, then we will need to perform the user context switch */
+
+      else
+        {
+          /* Restore the exception context of the new task that is ready to
+           * run (probably tcb).  This is the new rtcb at the head of the
+           * ready-to-run task list.
+           */
+
+          struct tcb_s *nexttcb = this_task();
+
+#ifdef CONFIG_ARCH_ADDRENV
+          /* Make sure that the address environment for the previously
+           * running task is closed down gracefully (data caches dump,
+           * MMU flushed) and set up the address environment for the new
+           * thread at the head of the ready-to-run list.
+           */
+
+          (void)group_addrenv(nexttcb);
+#endif
+          /* Update scheduler parameters */
+
+          sched_resume_scheduler(nexttcb);
+
+          /* Then switch contexts */
+
+          up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
+
+          /* up_switchcontext forces a context switch to the task at the
+           * head of the ready-to-run list.  It does not 'return' in the
+           * normal sense.  When it does return, it is because the blocked
+           * task is again ready to run and has execution priority.
+           */
+        }
+    }
+}
diff --git a/arch/risc-v/src/rv32im/up_vfork.c b/arch/risc-v/src/rv32im/up_vfork.c
new file mode 100644
index 0000000000000000000000000000000000000000..f2f5332beceb8417ff9261836ccacd6563e9dc7a
--- /dev/null
+++ b/arch/risc-v/src/rv32im/up_vfork.c
@@ -0,0 +1,262 @@
+/****************************************************************************
+ * arch/mips/src/mips32/up_vfork.c
+ *
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "up_vfork.h"
+#include "sched/sched.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef CONFIG_STACK_ALIGNMENT
+#  define CONFIG_STACK_ALIGNMENT 4
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_vfork
+ *
+ * Description:
+ *   The vfork() function has the same effect as fork(), except that the
+ *   behavior is undefined if the process created by vfork() either modifies
+ *   any data other than a variable of type pid_t used to store the return
+ *   value from vfork(), or returns from the function in which vfork() was
+ *   called, or calls any other function before successfully calling _exit()
+ *   or one of the exec family of functions.
+ *
+ *   The overall sequence is:
+ *
+ *   1) User code calls vfork().  vfork() collects context information and
+ *      transfers control up up_vfork().
+ *   2) up_vfork()and calls task_vforksetup().
+ *   3) task_vforksetup() allocates and configures the child task's TCB.  This
+ *      consists of:
+ *      - Allocation of the child task's TCB.
+ *      - Initialization of file descriptors and streams
+ *      - Configuration of environment variables
+ *      - Setup the intput parameters for the task.
+ *      - Initialization of the TCB (including call to up_initial_state()
+ *   4) up_vfork() provides any additional operating context. up_vfork must:
+ *      - Allocate and initialize the stack
+ *      - Initialize special values in any CPU registers that were not
+ *        already configured by up_initial_state()
+ *   5) up_vfork() then calls task_vforkstart()
+ *   6) task_vforkstart() then executes the child thread.
+ *
+ * task_vforkabort() may be called if an error occurs between steps 3 and 6.
+ *
+ * Input Paremeters:
+ *   context - Caller context information saved by vfork()
+ *
+ * Return:
+ *   Upon successful completion, vfork() returns 0 to the child process and
+ *   returns the process ID of the child process to the parent process.
+ *   Otherwise, -1 is returned to the parent, no child process is created,
+ *   and errno is set to indicate the error.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_HAVE_VFORK
+
+#error This part of the port is not done yet!!
+
+pid_t up_vfork(const struct vfork_s *context)
+{
+  struct tcb_s *parent = this_task();
+  struct task_tcb_s *child;
+  size_t stacksize;
+  uint32_t newsp;
+#ifdef CONFIG_MIPS32_FRAMEPOINTER
+  uint32_t newfp;
+#endif
+  uint32_t stackutil;
+  int ret;
+
+  sinfo("s0:%08x s1:%08x s2:%08x s3:%08x s4:%08x\n",
+        context->s0, context->s1, context->s2, context->s3, context->s4);
+#ifdef CONFIG_MIPS32_FRAMEPOINTER
+  sinfo("s5:%08x s6:%08x s7:%08x\n",
+        context->s5, context->s6, context->s7);
+#ifdef MIPS32_SAVE_GP
+  sinfo("fp:%08x sp:%08x ra:%08x gp:%08x\n",
+        context->fp, context->sp, context->ra, context->gp);
+#else
+  sinfo("fp:%08x sp:%08x ra:%08x\n",
+        context->fp context->sp, context->ra);
+#endif
+#else
+  sinfo("s5:%08x s6:%08x s7:%08x s8:%08x\n",
+        context->s5, context->s6, context->s7, context->s8);
+#ifdef MIPS32_SAVE_GP
+  sinfo("sp:%08x ra:%08x gp:%08x\n",
+        context->sp, context->ra, context->gp);
+#else
+  sinfo("sp:%08x ra:%08x\n",
+        context->sp, context->ra);
+#endif
+#endif
+
+  /* Allocate and initialize a TCB for the child task. */
+
+  child = task_vforksetup((start_t)context->ra);
+  if (!child)
+    {
+      sinfo("task_vforksetup failed\n");
+      return (pid_t)ERROR;
+    }
+
+  sinfo("Parent=%p Child=%p\n", parent, child);
+
+  /* Get the size of the parent task's stack.  Due to alignment operations,
+   * the adjusted stack size may be smaller than the stack size originally
+   * requrested.
+   */
+
+  stacksize = parent->adj_stack_size + CONFIG_STACK_ALIGNMENT - 1;
+
+  /* Allocate the stack for the TCB */
+
+  ret = up_create_stack((FAR struct tcb_s *)child, stacksize,
+                        parent->flags & TCB_FLAG_TTYPE_MASK);
+  if (ret != OK)
+    {
+      serr("ERROR: up_create_stack failed: %d\n", ret);
+      task_vforkabort(child, -ret);
+      return (pid_t)ERROR;
+    }
+
+  /* How much of the parent's stack was utilized?  The MIPS uses
+   * a push-down stack so that the current stack pointer should
+   * be lower than the initial, adjusted stack pointer.  The
+   * stack usage should be the difference between those two.
+   */
+
+  DEBUGASSERT((uint32_t)parent->adj_stack_ptr > context->sp);
+  stackutil = (uint32_t)parent->adj_stack_ptr - context->sp;
+
+  sinfo("stacksize:%d stackutil:%d\n", stacksize, stackutil);
+
+  /* Make some feeble effort to perserve the stack contents.  This is
+   * feeble because the stack surely contains invalid pointers and other
+   * content that will not work in the child context.  However, if the
+   * user follows all of the caveats of vfork() usage, even this feeble
+   * effort is overkill.
+   */
+
+  newsp = (uint32_t)child->cmn.adj_stack_ptr - stackutil;
+  memcpy((void *)newsp, (const void *)context->sp, stackutil);
+
+  /* Was there a frame pointer in place before? */
+
+#ifdef CONFIG_MIPS32_FRAMEPOINTER
+  if (context->fp <= (uint32_t)parent->adj_stack_ptr &&
+      context->fp >= (uint32_t)parent->adj_stack_ptr - stacksize)
+    {
+      uint32_t frameutil = (uint32_t)parent->adj_stack_ptr - context->fp;
+      newfp = (uint32_t)child->cmn.adj_stack_ptr - frameutil;
+    }
+  else
+    {
+      newfp = context->fp;
+    }
+
+  sinfo("Old stack base:%08x SP:%08x FP:%08x\n",
+        parent->adj_stack_ptr, context->sp, context->fp);
+  sinfo("New stack base:%08x SP:%08x FP:%08x\n",
+        child->cmn.adj_stack_ptr, newsp, newfp);
+#else
+  sinfo("Old stack base:%08x SP:%08x\n",
+        parent->adj_stack_ptr, context->sp);
+  sinfo("New stack base:%08x SP:%08x\n",
+        child->cmn.adj_stack_ptr, newsp);
+#endif
+
+  /* Update the stack pointer, frame pointer, global pointer and saved
+   * registers.  When the child TCB was initialized, all of the values
+   * were set to zero. up_initial_state() altered a few values, but the
+   * return value in v0 should be cleared to zero, providing the
+   * indication to the newly started child thread.
+   */
+
+  child->cmn.xcp.regs[REG_S0]  = context->s0;  /* Saved register s0 */
+  child->cmn.xcp.regs[REG_S1]  = context->s1;  /* Saved register s1 */
+  child->cmn.xcp.regs[REG_S2]  = context->s2;  /* Saved register s2 */
+  child->cmn.xcp.regs[REG_S3]  = context->s3;  /* Volatile register s3 */
+  child->cmn.xcp.regs[REG_S4]  = context->s4;  /* Volatile register s4 */
+  child->cmn.xcp.regs[REG_S5]  = context->s5;  /* Volatile register s5 */
+  child->cmn.xcp.regs[REG_S6]  = context->s6;  /* Volatile register s6 */
+  child->cmn.xcp.regs[REG_S7]  = context->s7;  /* Volatile register s7 */
+#ifdef CONFIG_MIPS32_FRAMEPOINTER
+  child->cmn.xcp.regs[REG_FP]  = newfp;        /* Frame pointer */
+#else
+  child->cmn.xcp.regs[REG_S8]  = context->s8;  /* Volatile register s8 */
+#endif
+  child->cmn.xcp.regs[REG_SP]  = newsp;        /* Stack pointer */
+#ifdef MIPS32_SAVE_GP
+  child->cmn.xcp.regs[REG_GP]  = newsp;        /* Global pointer */
+#endif
+
+  /* And, finally, start the child task.  On a failure, task_vforkstart()
+   * will discard the TCB by calling task_vforkabort().
+   */
+
+  return task_vforkstart(child);
+}
+
+#endif /* CONFIG_ARCH_HAVE_VFORK */
+
diff --git a/arch/risc-v/src/rv32im/up_vfork.h b/arch/risc-v/src/rv32im/up_vfork.h
new file mode 100644
index 0000000000000000000000000000000000000000..079a744c83058f4b0c59f01b5d4909e423164eba
--- /dev/null
+++ b/arch/risc-v/src/rv32im/up_vfork.h
@@ -0,0 +1,132 @@
+/****************************************************************************
+ * arch/mips/src/mips/up_vfork.h
+ *
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_MIPS_SRC_MIPS32_VFORK_H
+#define __ARCH_MIPS_SRC_MIPS32_VFORK_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* Register r30 may be a frame pointer in some ABIs.  Or may just be saved
+ * register s8.  It makes a difference for vfork handling.
+ */
+
+#undef VFORK_HAVE_FP
+
+/* r0      zero   Always has the value 0.
+ * r1      at     Temporary generally used by assembler.
+ * r2-r3   v0-v1  Used for expression evaluations and to hold the integer and
+ *                pointer type function return values.
+ * r4-r7   a0-a3  Used for passing arguments to functions; values are not
+ *                preserved across function calls.
+ * r8-r15  t0-t7  Temporary registers used for expression evaluation; values
+ *                are not preserved across function calls.
+ * r16-r23 s0-s7  Saved registers; values are preserved across function calls.
+ * r24-r25 t8-t9  Temporary registers used for expression evaluations; values
+ *                are not preserved across function calls. When calling
+ *                position independent functions r25 must contain the address
+ *                of the called function.
+ * r26-r27 k0-k1  Used only by the operating system.
+ * r28     gp     Global pointer and context pointer.
+ * r29     sp     Stack pointer.
+ * r30     s8     Saved register (like s0-s7).  If a frame pointer is used,
+ *                then this is the frame pointer.
+ * r31     ra     Return address.
+ */
+
+#define VFORK_S0_OFFSET   (0*4)   /* Saved register s0 */
+#define VFORK_S1_OFFSET   (1*4)   /* Saved register s1 */
+#define VFORK_S2_OFFSET   (2*4)   /* Saved register s2 */
+#define VFORK_S3_OFFSET   (3*4)   /* Saved register s3 */
+#define VFORK_S4_OFFSET   (4*4)   /* Saved register s4 */
+#define VFORK_S5_OFFSET   (5*4)   /* Saved register s5 */
+#define VFORK_S6_OFFSET   (6*4)   /* Saved register s6 */
+#define VFORK_S7_OFFSET   (7*4)   /* Saved register s7 */
+
+#ifdef CONFIG_MIPS32_FRAMEPOINTER
+#  define VFORK_FP_OFFSET (8*4)   /* Frame pointer */
+#else
+#  define VFORK_S8_OFFSET (8*4)   /* Saved register s8 */
+#endif
+
+#define VFORK_SP_OFFSET   (9*4)   /* Stack pointer*/
+#define VFORK_RA_OFFSET   (10*4)  /* Return address*/
+#ifdef MIPS32_SAVE_GP
+#  define VFORK_GP_OFFSET (11*4)   /* Global pointer */
+#  define VFORK_SIZEOF    (12*4)
+#else
+#  define VFORK_SIZEOF    (11*4)
+#endif
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+struct vfork_s
+{
+  /* CPU registers */
+
+  uint32_t s0;   /* Saved register s0 */
+  uint32_t s1;   /* Saved register s1 */
+  uint32_t s2;   /* Saved register s2 */
+  uint32_t s3;   /* Saved register s3 */
+  uint32_t s4;   /* Saved register s4 */
+  uint32_t s5;   /* Saved register s5 */
+  uint32_t s6;   /* Saved register s6 */
+  uint32_t s7;   /* Saved register s7 */
+#ifdef CONFIG_MIPS32_FRAMEPOINTER
+  uint32_t fp;   /* Frame pointer */
+#else
+  uint32_t s8;   /* Saved register s8 */
+#endif
+  uint32_t sp;   /* Stack pointer*/
+  uint32_t ra;   /* Return address*/
+#ifdef MIPS32_SAVE_GP
+  uint32_t gp;   /* Global pointer */
+#endif
+
+  /* Floating point registers (not yet) */
+};
+#endif
+
+#endif /* __ARCH_MIPS_SRC_MIPS32_VFORK_H */
diff --git a/arch/sh/src/README.txt b/arch/sh/src/README.txt
deleted file mode 100644
index 3cbd17c0fd886419e52664bf67e8b9899cdfb560..0000000000000000000000000000000000000000
--- a/arch/sh/src/README.txt
+++ /dev/null
@@ -1,7 +0,0 @@
-This directory provides a build area for all SH architectures.
-The 'common' subdirectory contains source files shared by all SH
-architectures; Source files unique to a specific SH chip
-architecture are contained in a subdirectory named after the chip.
-At configuration time, additional directories will be linked here:
-'build' will be a link to the configs/*/src directory; 'chip' will
-be a link to the SH chip sub-directory.
diff --git a/arch/sim/Kconfig b/arch/sim/Kconfig
index 7384d3d72304b9bcd55c044a9539e9e334346575..5168c7796eb0a24bf2efd1cfc043007d4d33314d 100644
--- a/arch/sim/Kconfig
+++ b/arch/sim/Kconfig
@@ -37,7 +37,7 @@ config SIM_CYGWIN_DECORATED
 	default n
 	depends on WINDOWS_CYGWIN
 	---help---
-		Older versions of Cygwin toolsdecorated C symbol names by adding an
+		Older versions of Cygwin tools decorated C symbol names by adding an
 		underscore to the beginning of the symbol name.  Newer versions of
 		Cygwin do not seem to do this.
 
@@ -211,8 +211,33 @@ config SIM_TCNWAITERS
 	default 4
 	depends on !POLL_DISABLE && SIM_TOUCHSCREEN
 	---help---
-		The maximum number of threads that can be waiting on poll() for a touchscreen event.
-		Default: 4
+		The maximum number of threads that can be waiting on poll() for a
+		touchscreen event. Default: 4
+
+config SIM_IOEXPANDER
+	bool "Simulated I/O Expander"
+	default n
+	depends on IOEXPANDER
+	select IOEXPANDER_INT_ENABLE
+	---help---
+		Build a simple, simulated I/O Expander chip simulation (for testing
+		purposes only).
+
+if SIM_IOEXPANDER
+
+config SIM_INT_NCALLBACKS
+	int "Max number of interrupt callbacks"
+	default 4
+	---help---
+		This is the maximum number of interrupt callbacks supported
+
+config SIM_INT_POLLDELAY
+	int "Interrupt poll delay (used)"
+	default 500000
+	---help---
+		This microsecond delay defines the polling rate for missed interrupts.
+
+endif # SIM_IOEXPANDER
 
 config SIM_SPIFLASH
 	bool "Simulated SPI FLASH with SMARTFS"
@@ -245,42 +270,148 @@ config SIM_SPIFLASH_128M
 
 endchoice
 
+config SIM_SPIFLASH_SECTORSIZE
+	int "FLASH Sector Erase Size"
+	default 65536
+	depends on SIM_SPIFLASH
+	---help---
+		Sets the large sector erase size that the part simulates.
+		This driver simulates SPI devices that have both a large
+		sector erase as well as a "sub-sector" (per the datasheet)
+		erase size (typically 4K bytes).
+
+config SIM_SPIFLASH_SUBSECTORSIZE
+	int "FLASH Sub-Sector Erase Size"
+	default 4096
+	depends on SIM_SPIFLASH
+	---help---
+		Sets the smaller sub-sector erase size supported by the
+		FLASH emulation
+
+config SIM_SPIFLASH_M25P
+	bool "Enable M25Pxx FLASH"
+	depends on MTD_M25P
+	---help---
+		Enables simulation of an M25P type FLASH
+
+config SIM_SPIFLASH_SST26
+	bool "Enable SST26 FLASH"
+	depends on MTD_SST26
+	---help---
+		Enables simulation of an SST26 type FLASH
+
+config SIM_SPIFLASH_W25
+	bool "Enable W25 FLASH"
+	depends on MTD_W25
+	---help---
+		Enables simulation of a W25 type FLASH
+
+config SIM_SPIFLASH_CUSTOM
+	bool "Enable Emulation of a Custom Manufacturer / ID FLASH"
+	depends on SIM_SPIFLASH
+	---help---
+		Enables simulation of FLASH with a custom Manufacturer, ID and Capacity
+
 config SIM_SPIFLASH_MANUFACTURER
 	hex "Hex ID of the FLASH manufacturer code"
 	default 0x20
-	depends on SIM_SPIFLASH
+	depends on SIM_SPIFLASH_CUSTOM
 	---help---
 		Allows the simulated FLASH Manufacturer ID to be set.
 
 config SIM_SPIFLASH_MEMORY_TYPE
 	hex "Hex ID of the FLASH Memory Type code"
 	default 0x20
+	depends on SIM_SPIFLASH_CUSTOM
+	---help---
+		Allows the simulated FLASH Memory Type code to be set.
+
+config SIM_SPIFLASH_CAPACITY
+	hex "Hex ID of the FLASH capacity code"
+	default 0x14
+	depends on SIM_SPIFLASH_CUSTOM
+	---help---
+		Allows the simulated FLASH Memory Capacity code to be set.
+
+config SIM_SPIFLASH_PAGESIZE
+	int "FLASH Write / Program Page Size"
+	default 256
 	depends on SIM_SPIFLASH
+	---help---
+		Sets the size of a page program operation.  The page size
+		represents the maximum number of bytes that can be sent
+		for a program operation.  If more bytes than this are
+		sent on a single Page Program, then the address will
+		"wrap" causing the initial data sent to be overwritten.
+		This is consistent with standard SPI FLASH operation.
+
+config SIM_QSPIFLASH
+	bool "Simulated QSPI FLASH with SMARTFS"
+	default n
+	select FS_SMARTFS
+	select MTD_SMART
+	---help---
+		Adds a simulated QSPI FLASH that responds to N25QXXX style
+		commands on the QSPI bus.
+
+choice
+	prompt "Simulated QSPI FLASH Size"
+	default SIM_QSPIFLASH_1M
+	depends on SIM_QSPIFLASH
+
+config SIM_QSPIFLASH_1M
+	bool "1 MBit (128K Byte)"
+
+config SIM_QSPIFLASH_8M
+	bool "8 MBit (1M Byte)"
+
+config SIM_QSPIFLASH_32M
+	bool "32 MBit (4M Byte)"
+
+config SIM_QSPIFLASH_64M
+	bool "64 MBit (8M Byte)"
+
+config SIM_QSPIFLASH_128M
+	bool "128 MBit (16M Byte)"
+
+endchoice
+
+config SIM_QSPIFLASH_MANUFACTURER
+	hex "Hex ID of the FLASH manufacturer code"
+	default 0x20
+	depends on SIM_QSPIFLASH
+	---help---
+		Allows the simulated FLASH Manufacturer ID to be set.
+
+config SIM_QSPIFLASH_MEMORY_TYPE
+	hex "Hex ID of the FLASH Memory Type code"
+	default 0xba
+	depends on SIM_QSPIFLASH
 	---help---
 		Allows the simulated FLASH Memory Type code to be set.
 
-config SIM_SPIFLASH_SECTORSIZE
+config SIM_QSPIFLASH_SECTORSIZE
 	int "FLASH Sector Erase Size"
 	default 65536
-	depends on SIM_SPIFLASH
+	depends on SIM_QSPIFLASH
 	---help---
 		Sets the large sector erase size that the part simulates.
-		This driver simulates SPI devices that have both a large
+		This driver simulates QSPI devices that have both a large
 		sector erase as well as a "sub-sector" (per the datasheet)
 		erase size (typically 4K bytes).
 
-config SIM_SPIFLASH_SUBSECTORSIZE
+config SIM_QSPIFLASH_SUBSECTORSIZE
 	int "FLASH Sub-Sector Erase Size"
 	default 4096
-	depends on SIM_SPIFLASH
+	depends on SIM_QSPIFLASH
 	---help---
 		Sets the smaller sub-sector erase size supported by the
 		FLASH emulation
 
-config SIM_SPIFLASH_PAGESIZE
+config SIM_QSPIFLASH_PAGESIZE
 	int "FLASH Write / Program Page Size"
 	default 256
-	depends on SIM_SPIFLASH
+	depends on SIM_QSPIFLASH
 	---help---
 		Sets the size of a page program operation.  The page size
 		represents the maximum number of bytes that can be sent
@@ -289,4 +420,4 @@ config SIM_SPIFLASH_PAGESIZE
 		"wrap" causing the initial data sent to be overwritten.
 		This is consistent with standard SPI FLASH operation.
 
-endif
+endif # ARCH_SIM
diff --git a/arch/sim/include/.gitignore b/arch/sim/include/.gitignore
index 12c22f4f28ae35faec71b131922f800ca8813bea..e6460c4a67846d5801c3600ce961277e3644f647 100644
--- a/arch/sim/include/.gitignore
+++ b/arch/sim/include/.gitignore
@@ -1,2 +1,3 @@
 /board
+/chip
 
diff --git a/arch/sim/include/arch.h b/arch/sim/include/arch.h
index 29cf6495fce21545af5132b51188e3110397e126..83fdc737c45ad528a0067e80da4d760f36fa1884 100644
--- a/arch/sim/include/arch.h
+++ b/arch/sim/include/arch.h
@@ -37,8 +37,8 @@
  * only indirectly through nuttx/arch.h
  */
 
-#ifndef __ARCH_ARCH_H
-#define __ARCH_ARCH_H
+#ifndef __ARCH_SIM_INCLUDE_ARCH_H
+#define __ARCH_SIM_INCLUDE_ARCH_H
 
 /****************************************************************************
  * Included Files
@@ -77,5 +77,5 @@ extern "C"
 }
 #endif
 
-#endif /* __ARCH_ARCH_H */
+#endif /* __ARCH_SIM_INCLUDE_ARCH_H */
 
diff --git a/arch/sim/include/inttypes.h b/arch/sim/include/inttypes.h
new file mode 100644
index 0000000000000000000000000000000000000000..6fcf9a56e7925d74060d71b704540a2c675cf550
--- /dev/null
+++ b/arch/sim/include/inttypes.h
@@ -0,0 +1,449 @@
+/****************************************************************************
+ * arch/sim/include/inttypes.h
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_SIM_INCLUDE_INTTYPES_H
+#define __ARCH_SIM_INCLUDE_INTTYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if defined(CONFIG_HOST_X86_64) && !defined(CONFIG_SIM_M32)
+
+#  define PRId8       "d"
+#  define PRId16      "d"
+#  define PRId32      "d"
+#  define PRId64      "lld"
+
+#  define PRIdLEAST8  "d"
+#  define PRIdLEAST16 "d"
+#  define PRIdLEAST32 "d"
+#  define PRIdLEAST64 "lld"
+
+#  define PRIdFAST8   "d"
+#  define PRIdFAST16  "d"
+#  define PRIdFAST32  "d"
+#  define PRIdFAST64  "lld"
+
+#  define PRIdMAX     "lld"
+#  define PRIdPTR     "lld"
+
+#  define PRIi8       "i"
+#  define PRIi16      "i"
+#  define PRIi32      "i"
+#  define PRIi64      "lli"
+
+#  define PRIiLEAST8  "i"
+#  define PRIiLEAST16 "i"
+#  define PRIiLEAST32 "i"
+#  define PRIiLEAST64 "lli"
+
+#  define PRIiFAST8   "i"
+#  define PRIiFAST16  "i"
+#  define PRIiFAST32  "i"
+#  define PRIiFAST64  "lli"
+
+#  define PRIiMAX     "lli"
+#  define PRIiPTR     "lli"
+
+#  define PRIo8       "o"
+#  define PRIo16      "o"
+#  define PRIo32      "o"
+#  define PRIo64      "llo"
+
+#  define PRIoLEAST8  "o"
+#  define PRIoLEAST16 "o"
+#  define PRIoLEAST32 "o"
+#  define PRIoLEAST64 "llo"
+
+#  define PRIoFAST8   "o"
+#  define PRIoFAST16  "o"
+#  define PRIoFAST32  "o"
+#  define PRIoFAST64  "llo"
+
+#  define PRIoMAX     "llo"
+#  define PRIoPTR     "llo"
+
+#  define PRIu8       "u"
+#  define PRIu16      "u"
+#  define PRIu32      "u"
+#  define PRIu64      "llu"
+
+#  define PRIuLEAST8  "u"
+#  define PRIuLEAST16 "u"
+#  define PRIuLEAST32 "u"
+#  define PRIuLEAST64 "llu"
+
+#  define PRIuFAST8   "u"
+#  define PRIuFAST16  "u"
+#  define PRIuFAST32  "u"
+#  define PRIuFAST64  "llu"
+
+#  define PRIuMAX     "llu"
+#  define PRIuPTR     "llu"
+
+#  define PRIx8       "x"
+#  define PRIx16      "x"
+#  define PRIx32      "x"
+#  define PRIx64      "llx"
+
+#  define PRIxLEAST8  "x"
+#  define PRIxLEAST16 "x"
+#  define PRIxLEAST32 "x"
+#  define PRIxLEAST64 "llx"
+
+#  define PRIxFAST8   "x"
+#  define PRIxFAST16  "x"
+#  define PRIxFAST32  "x"
+#  define PRIxFAST64  "llx"
+
+#  define PRIxMAX     "llx"
+#  define PRIxPTR     "llx"
+
+#  define PRIX8       "X"
+#  define PRIX16      "X"
+#  define PRIX32      "X"
+#  define PRIX64      "llX"
+
+#  define PRIXLEAST8  "X"
+#  define PRIXLEAST16 "X"
+#  define PRIXLEAST32 "X"
+#  define PRIXLEAST64 "llX"
+
+#  define PRIXFAST8   "X"
+#  define PRIXFAST16  "X"
+#  define PRIXFAST32  "X"
+#  define PRIXFAST64  "llX"
+
+#  define PRIXMAX     "llX"
+#  define PRIXPTR     "llX"
+
+#  define SCNd8       "hhd"
+#  define SCNd16      "hd"
+#  define SCNd32      "d"
+#  define SCNd64      "lld"
+
+#  define SCNdLEAST8  "hhd"
+#  define SCNdLEAST16 "hd"
+#  define SCNdLEAST32 "d"
+#  define SCNdLEAST64 "lld"
+
+#  define SCNdFAST8   "hhd"
+#  define SCNdFAST16  "hd"
+#  define SCNdFAST32  "d"
+#  define SCNdFAST64  "lld"
+
+#  define SCNdMAX     "lld"
+#  define SCNdPTR     "lld"
+
+#  define SCNi8       "hhi"
+#  define SCNi16      "hi"
+#  define SCNi32      "i"
+#  define SCNi64      "lli"
+
+#  define SCNiLEAST8  "hhi"
+#  define SCNiLEAST16 "hi"
+#  define SCNiLEAST32 "i"
+#  define SCNiLEAST64 "lli"
+
+#  define SCNiFAST8   "hhi"
+#  define SCNiFAST16  "hi"
+#  define SCNiFAST32  "i"
+#  define SCNiFAST64  "lli"
+
+#  define SCNiMAX     "lli"
+#  define SCNiPTR     "lli"
+
+#  define SCNo8       "hho"
+#  define SCNo16      "ho"
+#  define SCNo32      "o"
+#  define SCNo64      "llo"
+
+#  define SCNoLEAST8  "hho"
+#  define SCNoLEAST16 "ho"
+#  define SCNoLEAST32 "o"
+#  define SCNoLEAST64 "llo"
+
+#  define SCNoFAST8   "hho"
+#  define SCNoFAST16  "ho"
+#  define SCNoFAST32  "o"
+#  define SCNoFAST64  "llo"
+
+#  define SCNoMAX     "llo"
+#  define SCNoPTR     "llo"
+
+#  define SCNu8       "hhu"
+#  define SCNu16      "hu"
+#  define SCNu32      "u"
+#  define SCNu64      "llu"
+
+#  define SCNuLEAST8  "hhu"
+#  define SCNuLEAST16 "hu"
+#  define SCNuLEAST32 "u"
+#  define SCNuLEAST64 "llu"
+
+#  define SCNuFAST8   "hhu"
+#  define SCNuFAST16  "hu"
+#  define SCNuFAST32  "u"
+#  define SCNuFAST64  "llu"
+
+#  define SCNuMAX     "llu"
+#  define SCNuPTR     "llu"
+
+#  define SCNx8       "hhx"
+#  define SCNx16      "hx"
+#  define SCNx32      "x"
+#  define SCNx64      "llx"
+
+#  define SCNxLEAST8  "hhx"
+#  define SCNxLEAST16 "hx"
+#  define SCNxLEAST32 "x"
+#  define SCNxLEAST64 "llx"
+
+#  define SCNxFAST8   "hhx"
+#  define SCNxFAST16  "hx"
+#  define SCNxFAST32  "x"
+#  define SCNxFAST64  "llx"
+
+#  define SCNxMAX     "llx"
+#  define SCNxPTR     "llx"
+
+#else
+
+#  define PRId8       "d"
+#  define PRId16      "d"
+#  define PRId32      "d"
+#  define PRId64      "lld"
+
+#  define PRIdLEAST8  "d"
+#  define PRIdLEAST16 "d"
+#  define PRIdLEAST32 "d"
+#  define PRIdLEAST64 "lld"
+
+#  define PRIdFAST8   "d"
+#  define PRIdFAST16  "d"
+#  define PRIdFAST32  "d"
+#  define PRIdFAST64  "lld"
+
+#  define PRIdMAX     "lld"
+#  define PRIdPTR     "d"
+
+#  define PRIi8       "i"
+#  define PRIi16      "i"
+#  define PRIi32      "i"
+#  define PRIi64      "lli"
+
+#  define PRIiLEAST8  "i"
+#  define PRIiLEAST16 "i"
+#  define PRIiLEAST32 "i"
+#  define PRIiLEAST64 "lli"
+
+#  define PRIiFAST8   "i"
+#  define PRIiFAST16  "i"
+#  define PRIiFAST32  "i"
+#  define PRIiFAST64  "lli"
+
+#  define PRIiMAX     "lli"
+#  define PRIiPTR     "i"
+
+#  define PRIo8       "o"
+#  define PRIo16      "o"
+#  define PRIo32      "o"
+#  define PRIo64      "llo"
+
+#  define PRIoLEAST8  "o"
+#  define PRIoLEAST16 "o"
+#  define PRIoLEAST32 "o"
+#  define PRIoLEAST64 "llo"
+
+#  define PRIoFAST8   "o"
+#  define PRIoFAST16  "o"
+#  define PRIoFAST32  "o"
+#  define PRIoFAST64  "llo"
+
+#  define PRIoMAX     "llo"
+#  define PRIoPTR     "o"
+
+#  define PRIu8       "u"
+#  define PRIu16      "u"
+#  define PRIu32      "u"
+#  define PRIu64      "llu"
+
+#  define PRIuLEAST8  "u"
+#  define PRIuLEAST16 "u"
+#  define PRIuLEAST32 "u"
+#  define PRIuLEAST64 "llu"
+
+#  define PRIuFAST8   "u"
+#  define PRIuFAST16  "u"
+#  define PRIuFAST32  "u"
+#  define PRIuFAST64  "llu"
+
+#  define PRIuMAX     "llu"
+#  define PRIuPTR     "u"
+
+#  define PRIx8       "x"
+#  define PRIx16      "x"
+#  define PRIx32      "x"
+#  define PRIx64      "llx"
+
+#  define PRIxLEAST8  "x"
+#  define PRIxLEAST16 "x"
+#  define PRIxLEAST32 "x"
+#  define PRIxLEAST64 "llx"
+
+#  define PRIxFAST8   "x"
+#  define PRIxFAST16  "x"
+#  define PRIxFAST32  "x"
+#  define PRIxFAST64  "llx"
+
+#  define PRIxMAX     "llx"
+#  define PRIxPTR     "x"
+
+#  define PRIX8       "X"
+#  define PRIX16      "X"
+#  define PRIX32      "X"
+#  define PRIX64      "llX"
+
+#  define PRIXLEAST8  "X"
+#  define PRIXLEAST16 "X"
+#  define PRIXLEAST32 "X"
+#  define PRIXLEAST64 "llX"
+
+#  define PRIXFAST8   "X"
+#  define PRIXFAST16  "X"
+#  define PRIXFAST32  "X"
+#  define PRIXFAST64  "llX"
+
+#  define PRIXMAX     "llX"
+#  define PRIXPTR     "X"
+
+#  define SCNd8       "hhd"
+#  define SCNd16      "hd"
+#  define SCNd32      "d"
+#  define SCNd64      "lld"
+
+#  define SCNdLEAST8  "hhd"
+#  define SCNdLEAST16 "hd"
+#  define SCNdLEAST32 "d"
+#  define SCNdLEAST64 "lld"
+
+#  define SCNdFAST8   "hhd"
+#  define SCNdFAST16  "hd"
+#  define SCNdFAST32  "d"
+#  define SCNdFAST64  "lld"
+
+#  define SCNdMAX     "lld"
+#  define SCNdPTR     "d"
+
+#  define SCNi8       "hhi"
+#  define SCNi16      "hi"
+#  define SCNi32      "i"
+#  define SCNi64      "lli"
+
+#  define SCNiLEAST8  "hhi"
+#  define SCNiLEAST16 "hi"
+#  define SCNiLEAST32 "i"
+#  define SCNiLEAST64 "lli"
+
+#  define SCNiFAST8   "hhi"
+#  define SCNiFAST16  "hi"
+#  define SCNiFAST32  "i"
+#  define SCNiFAST64  "lli"
+
+#  define SCNiMAX     "lli"
+#  define SCNiPTR     "i"
+
+#  define SCNo8       "hho"
+#  define SCNo16      "ho"
+#  define SCNo32      "o"
+#  define SCNo64      "llo"
+
+#  define SCNoLEAST8  "hho"
+#  define SCNoLEAST16 "ho"
+#  define SCNoLEAST32 "o"
+#  define SCNoLEAST64 "llo"
+
+#  define SCNoFAST8   "hho"
+#  define SCNoFAST16  "ho"
+#  define SCNoFAST32  "o"
+#  define SCNoFAST64  "llo"
+
+#  define SCNoMAX     "llo"
+#  define SCNoPTR     "o"
+
+#  define SCNu8       "hhu"
+#  define SCNu16      "hu"
+#  define SCNu32      "u"
+#  define SCNu64      "llu"
+
+#  define SCNuLEAST8  "hhu"
+#  define SCNuLEAST16 "hu"
+#  define SCNuLEAST32 "u"
+#  define SCNuLEAST64 "llu"
+
+#  define SCNuFAST8   "hhu"
+#  define SCNuFAST16  "hu"
+#  define SCNuFAST32  "u"
+#  define SCNuFAST64  "llu"
+
+#  define SCNuMAX     "llu"
+#  define SCNuPTR     "u"
+
+#  define SCNx8       "hhx"
+#  define SCNx16      "hx"
+#  define SCNx32      "x"
+#  define SCNx64      "llx"
+
+#  define SCNxLEAST8  "hhx"
+#  define SCNxLEAST16 "hx"
+#  define SCNxLEAST32 "x"
+#  define SCNxLEAST64 "llx"
+
+#  define SCNxFAST8   "hhx"
+#  define SCNxFAST16  "hx"
+#  define SCNxFAST32  "x"
+#  define SCNxFAST64  "llx"
+
+#  define SCNxMAX     "llx"
+#  define SCNxPTR     "x"
+
+#endif
+
+#endif /* __ARCH_SIM_INCLUDE_INTTYPES_H */
diff --git a/arch/sim/include/irq.h b/arch/sim/include/irq.h
index 9a9781dda46afe2bac55e0502447704bea862c60..ae95625ace73dc39bdeca180feed9c0b99983b3a 100644
--- a/arch/sim/include/irq.h
+++ b/arch/sim/include/irq.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * irq.h
+ * arch/sim/include/irq.h
  *
  *   Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -37,8 +37,8 @@
  * only indirectly through nuttx/irq.h
  */
 
-#ifndef __ARCH_IRQ_H
-#define __ARCH_IRQ_H
+#ifndef __ARCH_SIM_INCLUDE_IRQ_H
+#define __ARCH_SIM_INCLUDE_IRQ_H
 
 /****************************************************************************
  * Included Files
@@ -132,5 +132,5 @@ extern "C"
 }
 #endif
 
-#endif /* __ARCH_IRQ_H */
+#endif /* __ARCH_SIM_INCLUDE_IRQ_H */
 
diff --git a/arch/sim/include/spinlock.h b/arch/sim/include/spinlock.h
index 3c20ffe22afbc2f034accbadd78c7daa89365161..85333276b12cbe4edf8977bf290674292b21c816 100644
--- a/arch/sim/include/spinlock.h
+++ b/arch/sim/include/spinlock.h
@@ -46,6 +46,7 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
 /* Must match definitions in up_testset.c */
 
 #define SP_UNLOCKED false  /* The Un-locked state */
@@ -66,7 +67,7 @@ typedef bool spinlock_t;
  * Name: up_testset
  *
  * Description:
- *   Perform and atomic test and set operation on the provided spinlock.
+ *   Perform an atomic test and set operation on the provided spinlock.
  *
  *   This function must be provided via the architecture-specific logoic.
  *
diff --git a/arch/sim/include/tls.h b/arch/sim/include/tls.h
index ae2cf3b85a243b097a80396a0aeadf204903ae35..6df7505714b39bf9d22d3606c6cd65d284c1d262 100644
--- a/arch/sim/include/tls.h
+++ b/arch/sim/include/tls.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/sin/include/tls.h
+ * arch/sim/include/tls.h
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/sim/src/Makefile b/arch/sim/src/Makefile
index 72401d6c7735565aeb9d90599d54131df19ba493..540c1c6fc87bf0ff17fd733f077eefcbae97b4d5 100644
--- a/arch/sim/src/Makefile
+++ b/arch/sim/src/Makefile
@@ -57,7 +57,7 @@ CSRCS  = up_initialize.c up_idle.c up_interruptcontext.c up_initialstate.c
 CSRCS += up_createstack.c up_usestack.c up_releasestack.c up_stackframe.c
 CSRCS += up_unblocktask.c up_blocktask.c up_releasepending.c
 CSRCS += up_reprioritizertr.c up_exit.c up_schedulesigaction.c up_spiflash.c
-CSRCS += up_allocateheap.c up_devconsole.c
+CSRCS += up_allocateheap.c up_devconsole.c up_qspiflash.c
 
 HOSTSRCS = up_hostusleep.c
 
@@ -85,6 +85,10 @@ ifeq ($(CONFIG_DEV_CONSOLE),y)
   HOSTSRCS += up_simuart.c
 endif
 
+ifeq ($(CONFIG_ONESHOT),y)
+  CSRCS += up_oneshot.c
+endif
+
 ifeq ($(CONFIG_NX_LCDDRIVER),y)
   CSRCS += board_lcd.c
 else
@@ -103,8 +107,8 @@ endif
 endif
 endif
 
-ifeq ($(CONFIG_ELF),y)
-  CSRCS += up_elf.c
+ifeq ($(CONFIG_SIM_IOEXPANDER),y)
+  CSRCS += up_ioexpander.c
 endif
 
 ifeq ($(CONFIG_FS_FAT),y)
diff --git a/arch/sim/src/board_lcd.c b/arch/sim/src/board_lcd.c
index 3760aa195e57a70cb900126ae84c8cd73a1099c3..0467c77b9f4a72b68501b309ef2e572debab677d 100644
--- a/arch/sim/src/board_lcd.c
+++ b/arch/sim/src/board_lcd.c
@@ -100,27 +100,6 @@
 #  error "Unsupported BPP"
 #endif
 
-/* Debug ********************************************************************/
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifdef CONFIG_DEBUG_LCD
-# define lcddbg(format, ...)  vdbg(format, ##__VA_ARGS__)
-#else
-# define lcddbg(x...)
-#endif
-
 /****************************************************************************
  * Private Type Definition
  ****************************************************************************/
@@ -257,7 +236,7 @@ static struct sim_dev_s g_lcddev =
 static int sim_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
                        size_t npixels)
 {
-  lcddbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   return OK;
 }
 
@@ -278,7 +257,7 @@ static int sim_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
 static int sim_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
                        size_t npixels)
 {
-  lcddbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   return -ENOSYS;
 }
 
@@ -294,7 +273,7 @@ static int sim_getvideoinfo(FAR struct lcd_dev_s *dev,
                               FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  gvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+  ginfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
          g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
   memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
   return OK;
@@ -312,7 +291,7 @@ static int sim_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
                               FAR struct lcd_planeinfo_s *pinfo)
 {
   DEBUGASSERT(dev && pinfo && planeno == 0);
-  gvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+  ginfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
   memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
   return OK;
 }
@@ -328,7 +307,7 @@ static int sim_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
 
 static int sim_getpower(struct lcd_dev_s *dev)
 {
-  gvdbg("power: %d\n", 0);
+  ginfo("power: %d\n", 0);
   return g_lcddev.power;
 }
 
@@ -344,7 +323,7 @@ static int sim_getpower(struct lcd_dev_s *dev)
 
 static int sim_setpower(struct lcd_dev_s *dev, int power)
 {
-  gvdbg("power: %d\n", power);
+  ginfo("power: %d\n", power);
   DEBUGASSERT(power <= CONFIG_LCD_MAXPOWER);
 
   /* Set new power level */
@@ -363,7 +342,7 @@ static int sim_setpower(struct lcd_dev_s *dev, int power)
 
 static int sim_getcontrast(struct lcd_dev_s *dev)
 {
-  gvdbg("Not implemented\n");
+  ginfo("Not implemented\n");
   return -ENOSYS;
 }
 
@@ -377,7 +356,7 @@ static int sim_getcontrast(struct lcd_dev_s *dev)
 
 static int sim_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
 {
-  gvdbg("contrast: %d\n", contrast);
+  ginfo("contrast: %d\n", contrast);
   return -ENOSYS;
 }
 
@@ -397,7 +376,7 @@ static int sim_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
 
 int board_lcd_initialize(void)
 {
-  gvdbg("Initializing\n");
+  ginfo("Initializing\n");
   return OK;
 }
 
diff --git a/arch/sim/src/nuttx-names.dat b/arch/sim/src/nuttx-names.dat
index 698df01576456dcaff25f3eff6b718684281ae42..5784beb8707b53ef544c10751ec7133611017505 100644
--- a/arch/sim/src/nuttx-names.dat
+++ b/arch/sim/src/nuttx-names.dat
@@ -1,34 +1,60 @@
+_exit          NX_exit
 accept         NXaccept
+asprintf       NXasprintf
+basename       NXbasename
 calloc         NXcalloc
+chdir          NXchdir
+clearenv       NXclearenv
 clock_gettime  NXclock_gettime
 close          NXclose
 closedir       NXclosedir
 dup            NXdup
+dup2           NXdup2
+exit           NXexit
 free           NXfree
 fclose         NXfclose
+fdopen         NXfdopen
+fgetc          NXfgetc
 fopen          NXfopen
+fprintf        NXfprintf
 fputc          NXfputc
 fcntl          NXfcntl
 fputs          NXfputs
 fread          NXfread
+fseek          NXfseek
 fwrite         NXfwrite
 fsync          NXfsync
+fstat          NXfstat
+ftell          NXftell
 getenv         NXgetenv
+getopt         NXgetopt
+getpid         NXgetpid
 gettimeofday   NXgettimeofday
 ioctl          NXioctl
 isatty         NXisatty
+kill           NXkill
+link           NXlink
 listen         NXlisten
 lseek          NXlseek
+mallinfo       NXmallinfo
 malloc         NXmalloc
 malloc_init    NXmalloc_init
+memcmp         NXmemcmp
+memcpy         NXmemcpy
+memset         NXmemset
+mkfifo         NXmkfifo
+mktime         NXmktime
+mq_close       NXmq_close
 mkdir          NXmkdir
 mount          NXmount
 open           NXopen
 opendir        NXopendir
 nanosleep      NXnanosleep
+pipe           NXpipe
 poll           NXpoll
 printf         NXprintf
 pthread_create NXpthread_create
+pthread_exit   NXpthread_exit
 pthread_getspecific NXpthread_getspecific
 pthread_key_create NXpthread_key_create
 pthread_kill   NXpthread_kill
@@ -38,40 +64,79 @@ pthread_mutex_init NXpthread_mutex_init
 pthread_mutex_lock NXpthread_mutex_lock
 pthread_mutex_unlock NXpthread_mutex_unlock
 pthread_setspecific NXpthread_setspecific
+pthread_setcancelstate NXpthread_setcancelstate
+pthread_setcanceltype NXpthread_setcanceltype
 pthread_sigmask NXpthread_sigmask
+pthread_testcancel NXpthread_testcancel
 pthread_yield  NXpthread_yield
+ptsname        NXptsname
+ptsname_r      NXptsname_r
 puts           NXputs
 read           NXread
 readdir        NXreaddir
+readlink       NXreadlink
 realloc        NXrealloc
 recv           NXrecv
 recvfrom       NXrecvfrom
+rename         NXrename
 rewinddir      NXrewinddir
 rmdir          NXrmdir
 sched_yield    NXsched_yield
 seekdir        NXseekdir
 select         NXselect
+sem_getvalue   NXsem_getvalue
 sem_init       NXsem_init
 sem_post       NXsem_post
 sem_wait       NXsem_wait
 send           NXsend
 sendto         NXsendto
+setenv         NXsetenv
+setlogmask     NXsetlogmask
 setsockopt     NXsetsockopt
+setvbuf        NXsetvbuf
 sigaction      NXsigaction
+sigaddset      NXsigaddset
+sigdelset      NXsigdelset
+sigemptyset    NXsigemptyset
+sigfillset     NXsigfillset
 sighold        NXsighold
+sigismember    NXsigismember
 sigprocmask    NXsigprocmask
 sigtimedwait   NXsigtimedwait
 sigrelse       NXsigrelse
 sleep          NXsleep
+snprintf       NXsnprintf
 socket         NXsocket
+sprintf        NXsprintf
 stat           NXstat
 statfs         NXstatfs
+strcat         NXstrcat
+strchr         NXstrchr
+strcmp         NXstrcmp
+strcpy         NXstrcpy
+strcspn        NXstrcspn
+strdup         NXstrdup
+strftime       NXstrftime
+strlen         NXstrlen
+strncasecmp    NXstrncasecmp
+strncmp        NXstrncmp
+strncpy        NXstrncpy
+strrchr        NXstrrchr
+strtok_r       NXstrtok_r
+strtol         NXstrtol
+strtoul        NXstrtoul
+syslog         NXsyslog
 system         NXsystem
 tcgetattr      NXtcgetattr
 tcsetattr      NXtcsetattr
 umount2        NXumount2
 unlink         NXunlink
+unlockpt       NXunlockpt
+uname          NXuname
+unsetenv       NXunsetenv
 usleep         NXusleep
+vasprintf      NXvasprintf
 vfork          NXvfork
+vfprintf       NXvfprintf
 write          NXwrite
 zmalloc        NXzmalloc
diff --git a/arch/sim/src/up_blockdevice.c b/arch/sim/src/up_blockdevice.c
index 066df0a1dfef23d4eabab29ca1dcd3d659162632..b74480ecc0648e49872267cb460de975748995c8 100644
--- a/arch/sim/src/up_blockdevice.c
+++ b/arch/sim/src/up_blockdevice.c
@@ -44,7 +44,7 @@
 #include 
 #include 
 
-#include 
+#include 
 
 #include "up_internal.h"
 
diff --git a/arch/sim/src/up_blocktask.c b/arch/sim/src/up_blocktask.c
index ccc39204896f78461f88f906752c6a8b3276406f..27223b19c3bc902fbb2758f8a7bc16aa114b6785 100644
--- a/arch/sim/src/up_blocktask.c
+++ b/arch/sim/src/up_blocktask.c
@@ -83,7 +83,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
   ASSERT((tcb->task_state >= FIRST_READY_TO_RUN_STATE) &&
          (tcb->task_state <= LAST_READY_TO_RUN_STATE));
 
-  sdbg("Blocking TCB=%p\n", tcb);
+  //sinfo("Blocking TCB=%p\n", tcb);
 
   /* Remove the tcb task from the ready-to-run list.  If we
    * are blocking the task at the head of the task list (the
@@ -127,7 +127,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
            */
 
           rtcb = this_task();
-          sdbg("New Active Task TCB=%p\n", rtcb);
+          sinfo("New Active Task TCB=%p\n", rtcb);
 
           /* The way that we handle signals in the simulation is kind of
            * a kludge.  This would be unsafe in a truly multi-threaded, interrupt
@@ -136,7 +136,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
 
           if (rtcb->xcp.sigdeliver)
             {
-              sdbg("Delivering signals TCB=%p\n", rtcb);
+              sinfo("Delivering signals TCB=%p\n", rtcb);
               ((sig_deliver_t)rtcb->xcp.sigdeliver)(rtcb);
               rtcb->xcp.sigdeliver = NULL;
             }
diff --git a/arch/sim/src/up_deviceimage.c b/arch/sim/src/up_deviceimage.c
index f50944bd2e1e9772811fdd8ac7108e6c3060b31c..bf3ccc0dc27c81af5cd683df039ea0184d973ca0 100644
--- a/arch/sim/src/up_deviceimage.c
+++ b/arch/sim/src/up_deviceimage.c
@@ -58,7 +58,7 @@
  ****************************************************************************/
 
 #ifdef VFAT_STANDALONE
-# define sdbg(format, ...) printf(format, ##__VA_ARGS__)
+# define serr(format, ...) printf(format, ##__VA_ARGS__)
 # define kmm_malloc(size)   malloc(size)
 # define kmm_free(mem)     free(mem)
 #endif
@@ -223,7 +223,7 @@ char *up_deviceimage(void)
   ret           = inflateInit(&strm);
   if (ret != Z_OK)
     {
-      sdbg("inflateInit FAILED: ret=%d msg=\"%s\"\n",
+      serr("ERROR: inflateInit FAILED: ret=%d msg=\"%s\"\n",
            ret, strm.msg ? strm.msg : "No message");
       return NULL;
     }
@@ -260,7 +260,7 @@ char *up_deviceimage(void)
           case Z_DATA_ERROR:
           case Z_MEM_ERROR:
           case Z_STREAM_ERROR:
-              sdbg("inflate FAILED: ret=%d msg=\"%s\"\n",
+              serr("ERROR: inflate FAILED: ret=%d msg=\"%s\"\n",
                     ret, strm.msg ? strm.msg : "No message");
               (void)inflateEnd(&strm);
               kmm_free(pbuffer);
diff --git a/arch/sim/src/up_exit.c b/arch/sim/src/up_exit.c
index a022405d762deab1395f3804e2f65c425f427ebb..2a17a8075b8bb4f3d48dda2fad052a8f24293100 100644
--- a/arch/sim/src/up_exit.c
+++ b/arch/sim/src/up_exit.c
@@ -67,7 +67,7 @@ void _exit(int status)
 {
   FAR struct tcb_s *tcb;
 
-  sdbg("TCB=%p exiting\n", tcb);
+  sinfo("TCB=%p exiting\n", tcb);
 
   /* Destroy the task at the head of the ready to run list. */
 
@@ -78,7 +78,7 @@ void _exit(int status)
    */
 
   tcb = this_task();
-  sdbg("New Active Task TCB=%p\n", tcb);
+  sinfo("New Active Task TCB=%p\n", tcb);
 
   /* The way that we handle signals in the simulation is kind of
    * a kludge.  This would be unsafe in a truly multi-threaded, interrupt
@@ -87,7 +87,7 @@ void _exit(int status)
 
   if (tcb->xcp.sigdeliver)
     {
-      sdbg("Delivering signals TCB=%p\n", tcb);
+      sinfo("Delivering signals TCB=%p\n", tcb);
       ((sig_deliver_t)tcb->xcp.sigdeliver)(tcb);
       tcb->xcp.sigdeliver = NULL;
     }
@@ -96,4 +96,3 @@ void _exit(int status)
 
   up_longjmp(tcb->xcp.regs, 1);
 }
-
diff --git a/arch/sim/src/up_framebuffer.c b/arch/sim/src/up_framebuffer.c
index 847fcd0b6a76a18d296845dd6ab09545109ed5e5..1de73fd514fd2f4587eaad1a6857c656f658df28 100644
--- a/arch/sim/src/up_framebuffer.c
+++ b/arch/sim/src/up_framebuffer.c
@@ -191,13 +191,14 @@ struct fb_vtable_s g_fbobject =
 static int up_getvideoinfo(FAR struct fb_vtable_s *vtable,
                            FAR struct fb_videoinfo_s *vinfo)
 {
-  dbg("vtable=%p vinfo=%p\n", vtable, vinfo);
+  _info("vtable=%p vinfo=%p\n", vtable, vinfo);
   if (vtable && vinfo)
     {
       memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
       return OK;
     }
-  dbg("Returning EINVAL\n");
+
+  _err("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -208,13 +209,14 @@ static int up_getvideoinfo(FAR struct fb_vtable_s *vtable,
 static int up_getplaneinfo(FAR struct fb_vtable_s *vtable, int planeno,
                            FAR struct fb_planeinfo_s *pinfo)
 {
-  dbg("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
+  _info("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
   if (vtable && planeno == 0 && pinfo)
     {
       memcpy(pinfo, &g_planeinfo, sizeof(struct fb_planeinfo_s));
       return OK;
     }
-  dbg("Returning EINVAL\n");
+
+  _err("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -228,7 +230,7 @@ static int up_getcmap(FAR struct fb_vtable_s *vtable, FAR struct fb_cmap_s *cmap
   int len;
   int i;
 
-  dbg("vtable=%p cmap=%p len=%d\n", vtable, cmap, cmap->len);
+  _info("vtable=%p cmap=%p len=%d\n", vtable, cmap, cmap->len);
   if (vtable && cmap)
     {
       for (i = cmap->first, len = 0; i < 256 && len < cmap->len; i++, len++)
@@ -244,7 +246,8 @@ static int up_getcmap(FAR struct fb_vtable_s *vtable, FAR struct fb_cmap_s *cmap
       cmap->len = len;
       return OK;
     }
-  dbg("Returning EINVAL\n");
+
+  _err("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 #endif
@@ -259,12 +262,13 @@ static int up_putcmap(FAR struct fb_vtable_s *vtable, FAR const struct fb_cmap_s
 #ifdef CONFIG_SIM_X11FB
   return up_x11cmap(cmap->first, cmap->len, cmap->red, cmap->green, cmap->blue, NULL);
 #else
-  dbg("vtable=%p cmap=%p len=%d\n", vtable, cmap, cmap->len);
+  _info("vtable=%p cmap=%p len=%d\n", vtable, cmap, cmap->len);
   if (vtable && cmap)
     {
       return OK;
     }
-  dbg("Returning EINVAL\n");
+
+  _err("ERROR: Returning EINVAL\n");
   return -EINVAL;
 #endif
 }
@@ -278,23 +282,24 @@ static int up_putcmap(FAR struct fb_vtable_s *vtable, FAR const struct fb_cmap_s
 static int up_getcursor(FAR struct fb_vtable_s *vtable,
                         FAR struct fb_cursorattrib_s *attrib)
 {
-  dbg("vtable=%p attrib=%p\n", vtable, attrib);
+  _info("vtable=%p attrib=%p\n", vtable, attrib);
   if (vtable && attrib)
     {
 #ifdef CONFIG_FB_HWCURSORIMAGE
       attrib->fmt      = FB_FMT;
 #endif
-      dbg("pos:      (x=%d, y=%d)\n", g_cpos.x, g_cpos.y);
+      _info("pos:      (x=%d, y=%d)\n", g_cpos.x, g_cpos.y);
       attrib->pos      = g_cpos;
 #ifdef CONFIG_FB_HWCURSORSIZE
       attrib->mxsize.h = CONFIG_SIM_FBHEIGHT;
       attrib->mxsize.w = CONFIG_SIM_FBWIDTH;
-      dbg("size:     (h=%d, w=%d)\n", g_csize.h, g_csize.w);
+      _info("size:     (h=%d, w=%d)\n", g_csize.h, g_csize.w);
       attrib->size     = g_csize;
 #endif
       return OK;
     }
-  dbg("Returning EINVAL\n");
+
+  _err("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 #endif
@@ -307,32 +312,33 @@ static int up_getcursor(FAR struct fb_vtable_s *vtable,
 static int up_setcursor(FAR struct fb_vtable_s *vtable,
                        FAR struct fb_setcursor_s *setttings)
 {
-  dbg("vtable=%p setttings=%p\n", vtable, setttings);
+  _info("vtable=%p setttings=%p\n", vtable, setttings);
   if (vtable && setttings)
     {
-      dbg("flags:   %02x\n", settings->flags);
+      _info("flags:   %02x\n", settings->flags);
       if ((flags & FB_CUR_SETPOSITION) != 0)
         {
           g_cpos = settings->pos;
-          dbg("pos:     (h:%d, w:%d)\n", g_cpos.x, g_cpos.y);
+          _info("pos:     (h:%d, w:%d)\n", g_cpos.x, g_cpos.y);
         }
 #ifdef CONFIG_FB_HWCURSORSIZE
       if ((flags & FB_CUR_SETSIZE) != 0)
         {
           g_csize = settings->size;
-          dbg("size:    (h:%d, w:%d)\n", g_csize.h, g_csize.w);
+          _info("size:    (h:%d, w:%d)\n", g_csize.h, g_csize.w);
         }
 #endif
 #ifdef CONFIG_FB_HWCURSORIMAGE
       if ((flags & FB_CUR_SETIMAGE) != 0)
         {
-          dbg("image:   (h:%d, w:%d) @ %p\n",
-              settings->img.height, settings->img.width, settings->img.image);
+          _info("image:   (h:%d, w:%d) @ %p\n",
+               settings->img.height, settings->img.width, settings->img.image);
         }
 #endif
       return OK;
     }
-  dbg("Returning EINVAL\n");
+
+  _err("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 #endif
diff --git a/arch/sim/src/up_hostfs.c b/arch/sim/src/up_hostfs.c
index f0928ed0dac5f5f7fdff8483ea1cc4a47cb97351..839d951708966e5b63b994ce939e978d6ee4262e 100644
--- a/arch/sim/src/up_hostfs.c
+++ b/arch/sim/src/up_hostfs.c
@@ -36,6 +36,7 @@
 /****************************************************************************
  * Included Files
  ****************************************************************************/
+
 #define _BSD_SOURCE
 
 #include 
@@ -50,57 +51,113 @@
 #include 
 #include 
 
+#define __SIM__ 1
 #include "hostfs.h"
 
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
+/****************************************************************************
+ * Name: host_stat_convert
+ ****************************************************************************/
+
+static void host_stat_convert(struct stat *hostbuf, struct nuttx_stat_s *buf)
+{
+  /* Map the return values */
+
+  buf->st_mode = hostbuf->st_mode & 0777;
+
+  if (hostbuf->st_mode & S_IFDIR)
+    {
+      buf->st_mode |= NUTTX_S_IFDIR;
+    }
+  else if (hostbuf->st_mode & S_IFREG)
+    {
+      buf->st_mode |= NUTTX_S_IFREG;
+    }
+  else if (hostbuf->st_mode & S_IFCHR)
+    {
+      buf->st_mode |= NUTTX_S_IFCHR;
+    }
+  else if (hostbuf->st_mode & S_IFBLK)
+    {
+      buf->st_mode |= NUTTX_S_IFBLK;
+    }
+  else if (hostbuf->st_mode & S_IFLNK)
+    {
+      buf->st_mode |= NUTTX_S_IFLNK;
+    }
+  else /* if (hostbuf->st_mode & S_IFIFO) */
+    {
+      buf->st_mode |= NUTTX_S_IFIFO;
+    }
+
+  buf->st_size    = hostbuf->st_size;
+  buf->st_blksize = hostbuf->st_blksize;
+  buf->st_blocks  = hostbuf->st_blocks;
+  buf->st_atim    = hostbuf->st_atime;
+  buf->st_mtim    = hostbuf->st_mtime;
+  buf->st_ctim    = hostbuf->st_ctime;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: host_open
+ ****************************************************************************/
+
 int host_open(const char *pathname, int flags, int mode)
 {
   int mapflags;
 
   /* Perform flag mapping */
 
-  if ((flags & (HOSTFS_FLAG_RDOK | HOSTFS_FLAG_WROK)) == 
-        (HOSTFS_FLAG_RDOK | HOSTFS_FLAG_WROK))
+  if ((flags & NUTTX_O_RDWR) == NUTTX_O_RDWR)
     {
       mapflags = O_RDWR;
     }
-  else if (flags & HOSTFS_FLAG_RDOK)
+  else if (flags & NUTTX_O_RDONLY)
     {
       mapflags = O_RDONLY;
     }
-  else if (flags & HOSTFS_FLAG_WROK)
+  else if (flags & NUTTX_O_WRONLY)
     {
       mapflags = O_WRONLY;
     }
 
-  if (flags & HOSTFS_FLAG_APPEND)
+  if (flags & NUTTX_O_APPEND)
     {
       mapflags |= O_APPEND;
     }
 
-  if (flags & HOSTFS_FLAG_CREAT)
+  if (flags & NUTTX_O_CREAT)
     {
       mapflags |= O_CREAT;
     }
 
-  if (flags & HOSTFS_FLAG_EXCL)
+  if (flags & NUTTX_O_EXCL)
     {
       mapflags |= O_EXCL;
     }
 
-  if (flags & HOSTFS_FLAG_TRUNC)
+  if (flags & NUTTX_O_TRUNC)
     {
       mapflags |= O_TRUNC;
     }
 
+  if (flags & NUTTX_O_NONBLOCK)
+    {
+      mapflags |= O_NONBLOCK;
+    }
+
   return open(pathname, mapflags, mode);
 }
 
 /****************************************************************************
- * Public Functions
+ * Name: host_close
  ****************************************************************************/
 
 int host_close(int fd)
@@ -111,7 +168,7 @@ int host_close(int fd)
 }
 
 /****************************************************************************
- * Public Functions
+ * Name: host_read
  ****************************************************************************/
 
 ssize_t host_read(int fd, void* buf, size_t count)
@@ -122,7 +179,7 @@ ssize_t host_read(int fd, void* buf, size_t count)
 }
 
 /****************************************************************************
- * Public Functions
+ * Name: host_write
  ****************************************************************************/
 
 ssize_t host_write(int fd, const void *buf, size_t count)
@@ -133,7 +190,7 @@ ssize_t host_write(int fd, const void *buf, size_t count)
 }
 
 /****************************************************************************
- * Public Functions
+ * Name: host_lseek
  ****************************************************************************/
 
 off_t host_lseek(int fd, off_t offset, int whence)
@@ -144,7 +201,7 @@ off_t host_lseek(int fd, off_t offset, int whence)
 }
 
 /****************************************************************************
- * Public Functions
+ * Name: host_ioctl
  ****************************************************************************/
 
 int host_ioctl(int fd, int request, unsigned long arg)
@@ -155,7 +212,7 @@ int host_ioctl(int fd, int request, unsigned long arg)
 }
 
 /****************************************************************************
- * Public Functions
+ * Name: host_sync
  ****************************************************************************/
 
 void host_sync(int fd)
@@ -166,7 +223,7 @@ void host_sync(int fd)
 }
 
 /****************************************************************************
- * Public Functions
+ * Name: host_dup
  ****************************************************************************/
 
 int host_dup(int fd)
@@ -175,66 +232,83 @@ int host_dup(int fd)
 }
 
 /****************************************************************************
- * Public Functions
+ * Name: host_fstat
+ ****************************************************************************/
+
+int host_fstat(int fd, struct nuttx_stat_s *buf)
+{
+  struct stat hostbuf;
+  int ret;
+
+  /* Call the host's stat routine */
+
+  ret = fstat(fd, &hostbuf);
+
+  /* Map the return values */
+
+  host_stat_convert(&hostbuf, buf);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: host_opendir
  ****************************************************************************/
 
 void *host_opendir(const char *name)
 {
-  return (void *) opendir(name);
+  /* Return the host DIR pointer */
+
+  return (void *)opendir(name);
 }
 
 /****************************************************************************
- * Public Functions
+ * Name: host_readdir
  ****************************************************************************/
 
-int host_readdir(void* dirp, struct host_dirent_s* entry)
+int host_readdir(void* dirp, struct nuttx_dirent_s* entry)
 {
-    struct dirent  *ent;
-
-    /* Call the host's readdir routine */
-
-    ent = readdir(dirp);
-
-    if (ent != NULL)
-      {
-        /* Copy the entry name */
-
-        strncpy(entry->d_name, ent->d_name, sizeof(entry->d_name));
-
-        /* Map the type */
-
-        entry->d_type = 0;
-        if (ent->d_type == DT_REG)
-          {
-            entry->d_type = HOSTFS_DTYPE_FILE;
-          }
-        else if (ent->d_type == DT_CHR)
-          {
-            entry->d_type = HOSTFS_DTYPE_CHR;
-          }
-        else if (ent->d_type == DT_BLK)
-          {
-            entry->d_type = HOSTFS_DTYPE_BLK;
-          }
-        else if (ent->d_type == DT_DIR)
-          {
-            entry->d_type = HOSTFS_DTYPE_DIRECTORY;
-          }
-      }
-
-    if (ent)
-      {
-        return 0;
-      }
-
-    return -ENOENT;
+  struct dirent *ent;
+
+  /* Call the host's readdir routine */
+
+  ent = readdir(dirp);
+  if (ent != NULL)
+    {
+      /* Copy the entry name */
+
+      strncpy(entry->d_name, ent->d_name, sizeof(entry->d_name));
+
+      /* Map the type */
+
+      entry->d_type = 0;
+      if (ent->d_type == DT_REG)
+        {
+          entry->d_type = NUTTX_DTYPE_FILE;
+        }
+      else if (ent->d_type == DT_CHR)
+        {
+          entry->d_type = NUTTX_DTYPE_CHR;
+        }
+      else if (ent->d_type == DT_BLK)
+        {
+          entry->d_type = NUTTX_DTYPE_BLK;
+        }
+      else if (ent->d_type == DT_DIR)
+        {
+          entry->d_type = NUTTX_DTYPE_DIRECTORY;
+        }
+
+      return 0;
+    }
+
+  return -ENOENT;
 }
 
 /****************************************************************************
- * Public Functions
+ * Name: host_rewinddir
  ****************************************************************************/
 
-void host_rewinddir(void* dirp)
+void host_rewinddir(void *dirp)
 {
   /* Just call the rewinddir routine */
 
@@ -242,45 +316,43 @@ void host_rewinddir(void* dirp)
 }
 
 /****************************************************************************
- * Public Functions
+ * Name: host_closedir
  ****************************************************************************/
 
-int host_closedir(void* dirp)
+int host_closedir(void *dirp)
 {
   return closedir(dirp);
 }
 
 /****************************************************************************
- * Public Functions
+ * Name: host_statfs
  ****************************************************************************/
 
-int host_statfs(const char *path, struct host_statfs_s *buf)
+int host_statfs(const char *path, struct nuttx_statfs_s *buf)
 {
   int           ret;
-  struct statfs host_buf; 
+  struct statfs hostbuf;
 
   /* Call the host's statfs routine */
 
-  ret = statfs(path, &host_buf);
+  ret = statfs(path, &hostbuf);
 
-  /* Map the return values */
+  /* Map the struct statfs value */
 
-  buf->f_type    = host_buf.f_type;
-  buf->f_bsize   = host_buf.f_bsize;
-  buf->f_blocks  = host_buf.f_blocks;
-  buf->f_bfree   = host_buf.f_bfree;
-  buf->f_bavail  = host_buf.f_bavail;
-  buf->f_files   = host_buf.f_files;
-  buf->f_ffree   = host_buf.f_ffree;
-  buf->f_fsid    = 0;
-  buf->f_namelen = host_buf.f_namelen;
-  buf->f_frsize  = host_buf.f_frsize;
+  buf->f_type    = hostbuf.f_type;
+  buf->f_namelen = hostbuf.f_namelen;
+  buf->f_bsize   = hostbuf.f_bsize;
+  buf->f_blocks  = hostbuf.f_blocks;
+  buf->f_bfree   = hostbuf.f_bfree;
+  buf->f_bavail  = hostbuf.f_bavail;
+  buf->f_files   = hostbuf.f_files;
+  buf->f_ffree   = hostbuf.f_ffree;
 
   return ret;
 }
 
 /****************************************************************************
- * Public Functions
+ * Name: host_unlink
  ****************************************************************************/
 
 int host_unlink(const char *pathname)
@@ -289,7 +361,7 @@ int host_unlink(const char *pathname)
 }
 
 /****************************************************************************
- * Public Functions
+ * Name: host_mkdir
  ****************************************************************************/
 
 int host_mkdir(const char *pathname, mode_t mode)
@@ -300,7 +372,7 @@ int host_mkdir(const char *pathname, mode_t mode)
 }
 
 /****************************************************************************
- * Public Functions
+ * Name: host_rmdir
  ****************************************************************************/
 
 int host_rmdir(const char *pathname)
@@ -309,7 +381,7 @@ int host_rmdir(const char *pathname)
 }
 
 /****************************************************************************
- * Public Functions
+ * Name: host_rename
  ****************************************************************************/
 
 int host_rename(const char *oldpath, const char *newpath)
@@ -318,65 +390,20 @@ int host_rename(const char *oldpath, const char *newpath)
 }
 
 /****************************************************************************
- * Public Functions
+ * Name: host_stat
  ****************************************************************************/
 
-int host_stat(const char *path, struct host_stat_s *buf)
+int host_stat(const char *path, struct nuttx_stat_s *buf)
 {
-  struct stat   host_buf;
-  int           ret;
+  struct stat hostbuf;
+  int ret;
 
   /* Call the host's stat routine */
 
-  ret = stat(path, &host_buf);
-
-  /* Now map the return values to the common struct */
-
-  buf->st_dev     = host_buf.st_dev;      /* ID of the device containing file */
-  buf->st_ino     = host_buf.st_ino;;     /* inode number */
-  buf->st_nlink   = host_buf.st_nlink;    /* number of hard links */
-  buf->st_uid     = host_buf.st_uid;      /* user ID of owner */
-  buf->st_gid     = host_buf.st_gid;      /* group ID of owner */
-  buf->st_rdev    = host_buf.st_rdev;     /* device ID */
-  buf->st_size    = host_buf.st_size;     /* total size, in bytes */
-  buf->st_blksize = host_buf.st_blksize;  /* blocksize for file system I/O */
-  buf->st_blocks  = host_buf.st_blocks;   /* number of 512B blocks allocated */
-  buf->st_atim    = host_buf.st_atime;    /* time of last access */
-  buf->st_mtim    = host_buf.st_mtime;    /* time of last modification */
-  buf->st_ctim    = host_buf.st_ctime;    /* time of last status change */
-
-  /* Map the mode bits */
-
-  buf->st_mode = host_buf.st_mode & 0xFFF;
-  if (S_ISREG(host_buf.st_mode))
-    {
-      buf->st_mode |= HOST_ST_MODE_REG;
-    }
-
-  if (S_ISDIR(host_buf.st_mode))
-    {
-      buf->st_mode |= HOST_ST_MODE_DIR;
-    }
+  ret = stat(path, &hostbuf);
 
-  if (S_ISCHR(host_buf.st_mode))
-    {
-      buf->st_mode |= HOST_ST_MODE_CHR;
-    }
-
-  if (S_ISBLK(host_buf.st_mode))
-    {
-      buf->st_mode |= HOST_ST_MODE_BLK;
-    }
-
-  if (S_ISFIFO(host_buf.st_mode))
-    {
-      buf->st_mode |= HOST_ST_MODE_PIPE;
-    }
-
-  if (S_ISLNK(host_buf.st_mode))
-    {
-      buf->st_mode |= HOST_ST_MODE_LINK;
-    }
+  /* Map the return values */
 
+  host_stat_convert(&hostbuf, buf);
   return ret;
 }
diff --git a/arch/sim/src/up_idle.c b/arch/sim/src/up_idle.c
index 2e218b319dfece58e31cd42addc9a437fac0edef..1912bf755cc7304e5677b04aed54f3c0afd56434 100644
--- a/arch/sim/src/up_idle.c
+++ b/arch/sim/src/up_idle.c
@@ -105,7 +105,7 @@ void up_idle(void)
    * should not matter which, however.
    */
 
-  static volatile spinlock_t lock = SP_UNLOCKED;
+  static volatile spinlock_t lock SP_SECTION = SP_UNLOCKED;
 
   /* The one that gets the lock is the one that executes the IDLE operations */
 
diff --git a/arch/sim/src/up_initialize.c b/arch/sim/src/up_initialize.c
index 7efcfb237382ea1ecb5b6189624fbc3d944c642a..ada5bb33ba01f03feef5e23af4dc9bd50622036f 100644
--- a/arch/sim/src/up_initialize.c
+++ b/arch/sim/src/up_initialize.c
@@ -43,15 +43,18 @@
 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
+#include 
+#include 
+#include 
 
 #include "up_internal.h"
 
@@ -68,32 +71,86 @@
  *
  ****************************************************************************/
 
-#if defined(CONFIG_FS_SMARTFS) && defined(CONFIG_SIM_SPIFLASH)
+#if defined(CONFIG_FS_SMARTFS) && (defined(CONFIG_SIM_SPIFLASH) || defined(CONFIG_SIM_QSPIFLASH))
 static void up_init_smartfs(void)
 {
   FAR struct mtd_dev_s *mtd;
+  int minor = 0;
+#if defined(CONFIG_MTD_M25P) || defined(CONFIG_MTD_W25) || defined(CONFIG_MTD_SST26)
   FAR struct spi_dev_s *spi;
+#endif
+#ifdef CONFIG_MTD_N25QXXX
+  FAR struct qspi_dev_s *qspi;
+#endif
 
+#ifdef CONFIG_SIM_SPIFLASH
 #ifdef CONFIG_MTD_M25P
   /* Initialize a simulated SPI FLASH block device m25p MTD driver */
 
-  spi = up_spiflashinitialize();
-  mtd = m25p_initialize(spi);
+  spi = up_spiflashinitialize("m25p");
+  if (spi != NULL)
+    {
+      mtd = m25p_initialize(spi);
+
+      /* Now initialize a SMART Flash block device and bind it to the MTD device */
+
+      if (mtd != NULL)
+        {
+          smart_initialize(minor++, mtd, "_m25p");
+        }
+    }
+#endif
+
+#ifdef CONFIG_MTD_SST26
+  /* Initialize a simulated SPI FLASH block device sst26 MTD driver */
 
-  /* Now initialize a SMART Flash block device and bind it to the MTD device */
+  spi = up_spiflashinitialize("sst26");
+  if (spi != NULL)
+    {
+      mtd = sst26_initialize_spi(spi);
 
-  smart_initialize(0, mtd, NULL);
+      /* Now initialize a SMART Flash block device and bind it to the MTD device */
+
+      if (mtd != NULL)
+        {
+          smart_initialize(minor++, mtd, "_sst26");
+        }
+    }
 #endif
 
 #ifdef CONFIG_MTD_W25
-  /* Initialize a simulated SPI FLASH block device m25p MTD driver */
+  /* Initialize a simulated SPI FLASH block device w25 MTD driver */
 
-  spi = up_spiflashinitialize();
-  mtd = w25_initialize(spi);
+  spi = up_spiflashinitialize("w25");
+  if (spi != NULL)
+    {
+      mtd = w25_initialize(spi);
 
-  /* Now initialize a SMART Flash block device and bind it to the MTD device */
+      /* Now initialize a SMART Flash block device and bind it to the MTD device */
 
-  smart_initialize(0, mtd, NULL);
+      if (mtd != NULL)
+        {
+          smart_initialize(minor++, mtd, "_w25");
+        }
+    }
+#endif
+#endif      /* CONFIG_SIM_SPIFLASH */
+
+#if defined(CONFIG_MTD_N25QXXX) && defined(CONFIG_SIM_QSPIFLASH)
+  /* Initialize a simulated SPI FLASH block device n25qxxx MTD driver */
+
+  qspi = up_qspiflashinitialize();
+  if (qspi != NULL)
+    {
+      mtd = n25qxxx_initialize(qspi, 0);
+
+      /* Now initialize a SMART Flash block device and bind it to the MTD device */
+
+      if (mtd != NULL)
+        {
+          smart_initialize(minor++, mtd, "_n25q");
+        }
+    }
 #endif
 }
 #endif
@@ -124,15 +181,25 @@ static void up_init_smartfs(void)
 
 void up_initialize(void)
 {
+#ifdef CONFIG_NET
   /* The real purpose of the following is to make sure that syslog
    * is drawn into the link.  It is needed by up_tapdev which is linked
    * separately.
    */
 
-#ifdef CONFIG_NET
   syslog(LOG_INFO, "SIM: Initializing");
 #endif
 
+#ifdef CONFIG_PM
+  /* Initialize the power management subsystem.  This MCU-specific function
+   * must be called *very* early in the initialization sequence *before* any
+   * other device drivers are initialized (since they may attempt to register
+   * with the power management subsystem).
+   */
+
+  up_pminitialize();
+#endif
+
 #if CONFIG_NFILE_DESCRIPTORS > 0
   /* Register devices */
 
@@ -140,6 +207,14 @@ void up_initialize(void)
   devnull_register();       /* Standard /dev/null */
 #endif
 
+#if defined(CONFIG_DEV_RANDOM)
+  devrandom_register(); /* Standard /dev/random */
+#endif
+
+#if defined(CONFIG_DEV_URANDOM)
+  devurandom_register();   /* Standard /dev/urandom */
+#endif
+
 #if defined(CONFIG_DEV_ZERO)
   devzero_register();       /* Standard /dev/zero */
 #endif
@@ -162,17 +237,33 @@ void up_initialize(void)
   /* Register a console (or not) */
 
   up_devconsole();          /* Our private /dev/console */
-#elif defined(CONFIG_SYSLOG_CONSOLE)
+#elif defined(CONFIG_CONSOLE_SYSLOG)
   syslog_console_init();
 #elif defined(CONFIG_RAMLOG_CONSOLE)
   ramlog_consoleinit();
 #endif
 
-#ifdef CONFIG_SYSLOG_CHAR
-  syslog_initialize();
+#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_PSEUDOTERM_SUSV1)
+  /* Register the master pseudo-terminal multiplexor device */
+
+  (void)ptmx_register();
 #endif
-#ifdef CONFIG_RAMLOG_SYSLOG
-  ramlog_sysloginit();      /* System logging device */
+
+  /* Early initialization of the system logging device.  Some SYSLOG channel
+   * can be initialized early in the initialization sequence because they
+   * depend on only minimal OS initialization.
+   */
+
+  syslog_initialize(SYSLOG_INIT_EARLY);
+
+#if defined(CONFIG_CRYPTO)
+  /* Initialize the HW crypto and /dev/crypto */
+
+  up_cryptoinitialize();
+#endif
+
+#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_CRYPTO_CRYPTODEV)
+  devcrypto_register();
 #endif
 
 #if defined(CONFIG_FS_FAT) && !defined(CONFIG_DISABLE_MOUNTPOINT)
@@ -201,7 +292,7 @@ void up_initialize(void)
   (void)telnet_initialize();
 #endif
 
-#if defined(CONFIG_FS_SMARTFS) && defined(CONFIG_SIM_SPIFLASH)
+#if defined(CONFIG_FS_SMARTFS) && (defined(CONFIG_SIM_SPIFLASH) || defined(CONFIG_SIM_QSPIFLASH))
   up_init_smartfs();
 #endif
 }
diff --git a/arch/sim/src/up_internal.h b/arch/sim/src/up_internal.h
index ddae194a6a1abdfd3c6a40f4eaf12763b1c94089..7ca32a479ea876c9e0e83db98c27e83ce6e30b68 100644
--- a/arch/sim/src/up_internal.h
+++ b/arch/sim/src/up_internal.h
@@ -52,7 +52,7 @@
 #  include 
 #  ifdef CONFIG_SMP
 #    include 
-#    include 
+#    include 
 #  endif
 #endif
 
@@ -96,13 +96,6 @@
 #  endif
 #endif
 
-/* Determine which device to use as the system logging device */
-
-#ifndef CONFIG_SYSLOG
-#  undef CONFIG_SYSLOG_CHAR
-#  undef CONFIG_RAMLOG_SYSLOG
-#endif
-
 /* The design for how we signal UART data availability is up in the air */
 
 #undef CONFIG_SIM_UART_DATAPOST
@@ -206,6 +199,25 @@ extern volatile int g_eventloop;
 extern volatile int g_uart_data_available;
 #endif
 
+#ifdef CONFIG_SMP
+/* These spinlocks are used in the SMP configuration in order to implement
+ * up_cpu_pause().  The protocol for CPUn to pause CPUm is as follows
+ *
+ * 1. The up_cpu_pause() implementation on CPUn locks both g_cpu_wait[m]
+ *    and g_cpu_paused[m].  CPUn then waits spinning on g_cpu_paused[m].
+ * 2. CPUm receives the interrupt it (1) unlocks g_cpu_paused[m] and
+ *    (2) locks g_cpu_wait[m].  The first unblocks CPUn and the second
+ *    blocks CPUm in the interrupt handler.
+ *
+ * When CPUm resumes, CPUn unlocks g_cpu_wait[m] and the interrupt handler
+ * on CPUm continues.  CPUm must, of course, also then unlock g_cpu_wait[m]
+ * so that it will be ready for the next pause operation.
+ */
+
+volatile spinlock_t g_cpu_wait[CONFIG_SMP_NCPUS] SP_SECTION;
+volatile spinlock_t g_cpu_paused[CONFIG_SMP_NCPUS] SP_SECTION;
+#endif
+
 /****************************************************************************
  * Public Function Prototypes
  ****************************************************************************/
@@ -303,6 +315,13 @@ int up_buttonevent(int x, int y, int buttons);
 int sim_ajoy_initialize(void);
 #endif
 
+/* up_ioexpander.c ********************************************************/
+
+#ifdef CONFIG_SIM_IOEXPANDER
+struct ioexpander_dev_s;
+FAR struct ioexpander_dev_s *sim_ioexpander_initialize(void);
+#endif
+
 /* up_tapdev.c ************************************************************/
 
 #if defined(CONFIG_NET_ETHERNET) && !defined(__CYGWIN__)
@@ -343,7 +362,12 @@ void netdriver_loop(void);
 
 #ifdef CONFIG_SIM_SPIFLASH
 struct spi_dev_s;
-struct spi_dev_s *up_spiflashinitialize(void);
+struct spi_dev_s *up_spiflashinitialize(FAR const char *name);
+#endif
+
+#ifdef CONFIG_SIM_QSPIFLASH
+struct qspi_dev_s;
+struct qspi_dev_s *up_qspiflashinitialize(void);
 #endif
 
 #endif /* __ASSEMBLY__ */
diff --git a/arch/sim/src/up_ioexpander.c b/arch/sim/src/up_ioexpander.c
new file mode 100644
index 0000000000000000000000000000000000000000..584a2e97f69b98f5e32f14df083c998839cdfa70
--- /dev/null
+++ b/arch/sim/src/up_ioexpander.c
@@ -0,0 +1,866 @@
+/****************************************************************************
+ * arch/sim/src/up_ioexpander.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "up_internal.h"
+
+#ifdef CONFIG_SIM_IOEXPANDER
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define SIM_POLLDELAY   (CONFIG_SIM_INT_POLLDELAY / USEC_PER_TICK)
+
+#define SIM_INT_ENABLED(d,p) \
+  (((d)->intenab  & ((ioe_pinset_t)1 << (p))) != 0)
+#define SIM_INT_DISABLED(d,p) \
+  (((d)->intenab  & ((ioe_pinset_t)1 << (p))) == 0)
+
+#define SIM_LEVEL_SENSITIVE(d,p) \
+  (((d)->trigger  & ((ioe_pinset_t)1 << (p))) == 0)
+#define SIM_LEVEL_HIGH(d,p) \
+  (((d)->level[0] & ((ioe_pinset_t)1 << (p))) != 0)
+#define SIM_LEVEL_LOW(d,p) \
+  (((d)->level[1] & ((ioe_pinset_t)1 << (p))) != 0)
+
+#define SIM_EDGE_SENSITIVE(d,p) \
+  (((d)->trigger  & ((ioe_pinset_t)1 << (p))) != 0)
+#define SIM_EDGE_RISING(d,p) \
+  (((d)->level[0] & ((ioe_pinset_t)1 << (p))) != 0)
+#define SIM_EDGE_FALLING(d,p) \
+  (((d)->level[1] & ((ioe_pinset_t)1 << (p))) != 0)
+#define SIM_EDGE_BOTH(d,p) \
+  (SIM_LEVEL_RISING(d,p) && SIM_LEVEL_FALLING(d,p))
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* This type represents on registered pin interrupt callback */
+
+struct sim_callback_s
+{
+   ioe_pinset_t pinset;              /* Set of pin interrupts that will generate
+                                      * the callback. */
+   ioe_callback_t cbfunc;            /* The saved callback function pointer */
+   FAR void *cbarg;                  /* Callback argument */
+};
+
+/* This structure represents the state of the I/O Expander driver */
+
+struct sim_dev_s
+{
+  struct ioexpander_dev_s dev;       /* Nested structure to allow casting as public gpio
+                                      * expander. */
+  ioe_pinset_t inpins;               /* Pins select as inputs */
+  ioe_pinset_t invert;               /* Pin value inversion */
+  ioe_pinset_t outval;               /* Value of output pins */
+  ioe_pinset_t inval;                /* Simulated input register */
+  ioe_pinset_t intenab;              /* Interrupt enable */
+  ioe_pinset_t last;                 /* Last pin inputs (for detection of changes) */
+  ioe_pinset_t trigger;              /* Bit encoded: 0=level 1=edge */
+  ioe_pinset_t level[2];             /* Bit encoded: 01=high/rising, 10 low/falling, 11 both */
+
+  WDOG_ID wdog;                      /* Timer used to poll for interrupt simulation */
+  struct work_s work;                /* Supports the interrupt handling "bottom half" */
+
+  /* Saved callback information for each I/O expander client */
+
+  struct sim_callback_s cb[CONFIG_SIM_INT_NCALLBACKS];
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* I/O Expander Methods */
+
+static int sim_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+             int dir);
+static int sim_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+             int opt, void *regval);
+static int sim_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+             bool value);
+static int sim_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+             FAR bool *value);
+#ifdef CONFIG_IOEXPANDER_MULTIPIN
+static int sim_multiwritepin(FAR struct ioexpander_dev_s *dev,
+             FAR uint8_t *pins, FAR bool *values, int count);
+static int sim_multireadpin(FAR struct ioexpander_dev_s *dev,
+             FAR uint8_t *pins, FAR bool *values, int count);
+#endif
+static FAR void *sim_attach(FAR struct ioexpander_dev_s *dev,
+             ioe_pinset_t pinset, ioe_callback_t callback, FAR void *arg);
+static int sim_detach(FAR struct ioexpander_dev_s *dev, FAR void *handle);
+
+static ioe_pinset_t sim_int_update(FAR struct sim_dev_s *priv);
+static void sim_interrupt_work(void *arg);
+static void sim_interrupt(int argc, wdparm_t arg1, ...);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Since only single device is supported, the driver state structure may as
+ * well be pre-allocated.
+ */
+
+static struct sim_dev_s g_ioexpander;
+
+/* I/O expander vtable */
+
+static const struct ioexpander_ops_s g_sim_ops =
+{
+  sim_direction,
+  sim_option,
+  sim_writepin,
+  sim_readpin,
+  sim_readpin
+#ifdef CONFIG_IOEXPANDER_MULTIPIN
+  , sim_multiwritepin
+  , sim_multireadpin
+  , sim_multireadpin
+#endif
+  , sim_attach
+  , sim_detach
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sim_direction
+ *
+ * Description:
+ *   Set the direction of an ioexpander pin. Required.
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pin - The index of the pin to alter in this call
+ *   dir - One of the IOEXPANDER_DIRECTION_ macros
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+static int sim_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+                          int direction)
+{
+  FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev;
+
+  DEBUGASSERT(priv != NULL && pin < CONFIG_IOEXPANDER_NPINS &&
+              (direction == IOEXPANDER_DIRECTION_IN ||
+               direction == IOEXPANDER_DIRECTION_OUT));
+
+  gpioinfo("pin=%u direction=%s\n",
+           pin, (direction == IOEXPANDER_DIRECTION_IN) ? "IN" : "OUT");
+
+  /* Set the pin direction */
+
+  if (direction == IOEXPANDER_DIRECTION_IN)
+    {
+      /* Configure pin as input. */
+
+      priv->inpins |= (1 << pin);
+    }
+  else /* if (direction == IOEXPANDER_DIRECTION_OUT) */
+    {
+      /* Configure pin as output.  If a bit in this register is cleared to
+       * 0, the corresponding port pin is enabled as an output.
+       *
+       * REVISIT: The value of output has not been selected!  This might
+       * put a glitch on the output.
+       */
+
+      priv->inpins &= ~(1 << pin);
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: sim_option
+ *
+ * Description:
+ *   Set pin options. Required.
+ *   Since all IO expanders have various pin options, this API allows setting
+ *     pin options in a flexible way.
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pin - The index of the pin to alter in this call
+ *   opt - One of the IOEXPANDER_OPTION_ macros
+ *   val - The option's value
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+static int sim_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+                        int opt, FAR void *value)
+{
+  FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev;
+  int ret = -ENOSYS;
+
+  DEBUGASSERT(priv != NULL);
+
+  gpioinfo("pin=%u option=%u\n", pin, opt);
+
+  /* Check for pin polarity inversion.  The Polarity Inversion Register
+   * allows polarity inversion of pins defined as inputs by the
+   * Configuration Register. If a bit in this register is set, the
+   * corresponding port pin's polarity is inverted. If a bit in this
+   * register is cleared, the corresponding port pin's original polarity
+   * is retained.
+   */
+
+  if (opt == IOEXPANDER_OPTION_INVERT)
+    {
+      if ((uintptr_t)value == IOEXPANDER_OPTION_INVERT)
+        {
+          priv->invert |= (1 << pin);
+        }
+      else
+        {
+          priv->invert &= ~(1 << pin);
+        }
+    }
+
+  /* Interrupt configuration */
+
+  else if (opt == IOEXPANDER_OPTION_INTCFG)
+    {
+      ioe_pinset_t bit = ((ioe_pinset_t)1 << pin);
+
+      ret = OK;
+      switch ((uintptr_t)value)
+        {
+          case IOEXPANDER_VAL_HIGH:    /* Interrupt on high level */
+            priv->intenab  |= bit;
+            priv->trigger  &= ~bit;
+            priv->level[0] |= bit;
+            priv->level[1] &= ~bit;
+            break;
+
+          case IOEXPANDER_VAL_LOW:     /* Interrupt on low level */
+            priv->intenab  |= bit;
+            priv->trigger  &= ~bit;
+            priv->level[0] &= ~bit;
+            priv->level[1] |= bit;
+            break;
+
+          case IOEXPANDER_VAL_RISING:  /* Interrupt on rising edge */
+            priv->intenab  |= bit;
+            priv->trigger  |= bit;
+            priv->level[0] |= bit;
+            priv->level[1] &= ~bit;
+            break;
+
+          case IOEXPANDER_VAL_FALLING: /* Interrupt on falling edge */
+            priv->intenab  |= bit;
+            priv->trigger  |= bit;
+            priv->level[0] &= ~bit;
+            priv->level[1] |= bit;
+            break;
+
+          case IOEXPANDER_VAL_BOTH:    /* Interrupt on both edges */
+            priv->intenab  |= bit;
+            priv->trigger  |= bit;
+            priv->level[0] |= bit;
+            priv->level[1] |= bit;
+            break;
+
+          case IOEXPANDER_VAL_DISABLE:
+            priv->trigger  &= ~bit;
+            break;
+
+          default:
+            ret = -EINVAL;
+            break;
+        }
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sim_writepin
+ *
+ * Description:
+ *   Set the pin level. Required.
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pin - The index of the pin to alter in this call
+ *   val - The pin level. Usually TRUE will set the pin high,
+ *         except if OPTION_INVERT has been set on this pin.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+static int sim_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+                         bool value)
+{
+  FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev;
+
+  DEBUGASSERT(priv != NULL && pin < CONFIG_IOEXPANDER_NPINS);
+
+  gpioinfo("pin=%u value=%u\n", pin, (unsigned int)value);
+
+  /* Set output pins default value (before configuring it as output) The
+   * Output Port Register shows the outgoing logic levels of the pins
+   * defined as outputs by the Configuration Register.
+   */
+
+  if (value && (priv->invert & (1 << pin)) == 0)
+    {
+      priv->outval |= (1 << pin);
+    }
+  else
+    {
+      priv->outval &= ~(1 << pin);
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: sim_readpin
+ *
+ * Description:
+ *   Read the actual PIN level. This can be different from the last value written
+ *   to this pin. Required.
+ *
+ * Input Parameters:
+ *   dev    - Device-specific state data
+ *   pin    - The index of the pin
+ *   valptr - Pointer to a buffer where the pin level is stored. Usually TRUE
+ *            if the pin is high, except if OPTION_INVERT has been set on this pin.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+static int sim_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+                        FAR bool *value)
+{
+  FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev;
+  ioe_pinset_t inval;
+  bool retval;
+
+  DEBUGASSERT(priv != NULL && pin < CONFIG_IOEXPANDER_NPINS && value != NULL);
+
+  gpioinfo("pin=%u\n", pin);
+
+  /* Is this an output pin? */
+
+  if ((priv->inpins & (1 << pin)) != 0)
+    {
+      inval = priv->inval;
+    }
+  else
+    {
+      inval = priv->outval;
+    }
+
+  /* Return 0 or 1 to indicate the state of pin */
+
+  retval = (((inval >> pin) & 1) != 0);
+  *value = ((priv->invert & (1 << pin)) != 0) ? !retval : retval;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: sim_multiwritepin
+ *
+ * Description:
+ *   Set the pin level for multiple pins. This routine may be faster than
+ *   individual pin accesses. Optional.
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pins - The list of pin indexes to alter in this call
+ *   val - The list of pin levels.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_IOEXPANDER_MULTIPIN
+static int sim_multiwritepin(FAR struct ioexpander_dev_s *dev,
+                                 FAR uint8_t *pins, FAR bool *values,
+                                 int count)
+{
+  FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev;
+  uint8_t pin;
+  int i;
+
+  gpioinfo("count=%d\n", count);
+  DEBUGASSERT(priv != NULL && pins != NULL && values != NULL && count > 0);
+
+  /* Apply the user defined changes */
+
+  for (i = 0; i < count; i++)
+    {
+      pin = pins[i];
+      DEBUGASSERT(pin < CONFIG_IOEXPANDER_NPINS);
+
+      if (values[i] && (priv->invert & (1 << pin)) == 0)
+        {
+          priv->outval |= (1 << pin);
+        }
+      else
+        {
+          priv->outval &= ~(1 << pin);
+        }
+    }
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: sim_multireadpin
+ *
+ * Description:
+ *   Read the actual level for multiple pins. This routine may be faster than
+ *   individual pin accesses. Optional.
+ *
+ * Input Parameters:
+ *   dev    - Device-specific state data
+ *   pin    - The list of pin indexes to read
+ *   valptr - Pointer to a buffer where the pin levels are stored.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_IOEXPANDER_MULTIPIN
+static int sim_multireadpin(FAR struct ioexpander_dev_s *dev,
+                                FAR uint8_t *pins, FAR bool *values,
+                                int count)
+{
+  FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev;
+  ioe_pinset_t inval;
+  uint8_t pin;
+  bool pinval;
+  int i;
+
+  gpioinfo("count=%d\n", count);
+  DEBUGASSERT(priv != NULL && pins != NULL && values != NULL && count > 0);
+
+  /* Update the input status with the 8 bits read from the expander */
+
+  for (i = 0; i < count; i++)
+    {
+      pin = pins[i];
+      DEBUGASSERT(pin < CONFIG_IOEXPANDER_NPINS);
+
+      /* Is this an output pin? */
+
+      if ((priv->inpins & (1 << pin)) != 0)
+        {
+          inval = priv->inval;
+        }
+      else
+        {
+          inval = priv->outval;
+        }
+
+      pinval    = ((inval & (1 << pin)) != 0);
+      values[i] = ((priv->invert & (1 << pin)) != 0) ? !pinval : pinval;
+    }
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: sim_attach
+ *
+ * Description:
+ *   Attach and enable a pin interrupt callback function.
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   pinset   - The set of pin events that will generate the callback
+ *   callback - The pointer to callback function.  NULL will detach the
+ *              callback.
+ *   arg      - User-provided callback argument
+ *
+ * Returned Value:
+ *   A non-NULL handle value is returned on success.  This handle may be
+ *   used later to detach and disable the pin interrupt.
+ *
+ ****************************************************************************/
+
+static FAR void *sim_attach(FAR struct ioexpander_dev_s *dev,
+                              ioe_pinset_t pinset, ioe_callback_t callback,
+                              FAR void *arg)
+{
+  FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev;
+  FAR void *handle = NULL;
+  int i;
+
+  gpioinfo("pinset=%lx callback=%p arg=%p\n",
+           (unsigned long)pinset, callback, arg);
+
+  /* Find and available in entry in the callback table */
+
+  for (i = 0; i < CONFIG_SIM_INT_NCALLBACKS; i++)
+    {
+       /* Is this entry available (i.e., no callback attached) */
+
+       if (priv->cb[i].cbfunc == NULL)
+         {
+           /* Yes.. use this entry */
+
+           priv->cb[i].pinset = pinset;
+           priv->cb[i].cbfunc = callback;
+           priv->cb[i].cbarg  = arg;
+           handle             = &priv->cb[i];
+           break;
+         }
+    }
+
+  return handle;
+}
+
+/****************************************************************************
+ * Name: sim_detach
+ *
+ * Description:
+ *   Detach and disable a pin interrupt callback function.
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   handle   - The non-NULL opaque value return by sim_attch()
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+static int sim_detach(FAR struct ioexpander_dev_s *dev, FAR void *handle)
+{
+  FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev;
+  FAR struct sim_callback_s *cb = (FAR struct sim_callback_s *)handle;
+
+  gpioinfo("handle=%p\n", handle);
+
+  DEBUGASSERT(priv != NULL && cb != NULL);
+  DEBUGASSERT((uintptr_t)cb >= (uintptr_t)&priv->cb[0] &&
+              (uintptr_t)cb <= (uintptr_t)&priv->cb[CONFIG_SIM_INT_NCALLBACKS-1]);
+  UNUSED(priv);
+
+  cb->pinset = 0;
+  cb->cbfunc = NULL;
+  cb->cbarg  = NULL;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: sim_int_update
+ *
+ * Description:
+ *   Check for pending interrupts.
+ *
+ ****************************************************************************/
+
+static ioe_pinset_t sim_int_update(FAR struct sim_dev_s *priv)
+{
+  ioe_pinset_t toggles;
+  ioe_pinset_t diff;
+  ioe_pinset_t input;
+  ioe_pinset_t intstat;
+  bool pinval;
+  int pin;
+  int i;
+
+  /* First, toggle all input bits that have associated, attached interrupt
+   * handler.  This is a crude simulation for toggle interrupt inputs.
+   */
+
+  toggles = 0;
+  for (i = 0; i < CONFIG_SIM_INT_NCALLBACKS; i++)
+    {
+      /* Is there a callback attached?  */
+
+      if (priv->cb[i].cbfunc != NULL)
+        {
+          /* Yes, add the input pins to set of pins to toggle */
+
+          toggles |= (priv->cb[i].pinset & priv->inpins);
+        }
+    }
+
+  priv->inval = (priv->inval & ~toggles) | (~priv->inval & toggles);
+
+  /* Check the changed bits from last read (Only applies to input pins) */
+
+  input = priv->inval;
+  diff  = priv->last ^ input;
+  if (diff != 0)
+    {
+      gpioinfo("toggles=%lx inval=%lx last=%lx diff=%lx\n",
+               (unsigned long)toggles, (unsigned long)priv->inval,
+               (unsigned long)priv->last, (unsigned long)diff);
+    }
+
+  priv->last = input;
+  intstat    = 0;
+
+  /* Check for changes in pins that could generate an interrupt. */
+
+  for (pin = 0; pin < CONFIG_IOEXPANDER_NPINS; pin++)
+    {
+      /* Get the value of the pin (accounting for inversion) */
+
+      pinval = ((input & 1) != 0);
+      if ((priv->invert & (1 << pin)) != 0)
+        {
+          pinval = !pinval;
+        }
+
+      if (SIM_INT_DISABLED(priv, pin))
+        {
+          /* Interrupts disabled on this pin.  Do nothing.. just skip to the
+           * next pin.
+           */
+        }
+      else if (SIM_EDGE_SENSITIVE(priv, pin))
+        {
+          /* Edge triggered. Was there a change in the level? */
+
+          if ((diff & 1) != 0)
+            {
+              /* Set interrupt as a function of edge type */
+
+              if ((!pinval && SIM_EDGE_FALLING(priv, pin)) ||
+                  ( pinval && SIM_EDGE_RISING(priv, pin)))
+                {
+                  intstat |= 1 << pin;
+                }
+            }
+        }
+      else /* if (SIM_LEVEL_SENSITIVE(priv, pin)) */
+        {
+          /* Level triggered. Set intstat if match in level type. */
+
+          if ((pinval  && SIM_LEVEL_HIGH(priv, pin)) ||
+              (!pinval && SIM_LEVEL_LOW(priv, pin)))
+            {
+              intstat |= 1 << pin;
+            }
+        }
+
+      diff  >>= 1;
+      input >>= 1;
+    }
+
+  return intstat;
+}
+
+/****************************************************************************
+ * Name: sim_interrupt_work
+ *
+ * Description:
+ *   Handle GPIO interrupt events (this function actually executes in the
+ *   context of the worker thread).
+ *
+ ****************************************************************************/
+
+static void sim_interrupt_work(void *arg)
+{
+  FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)arg;
+  ioe_pinset_t intstat;
+  int ret;
+  int i;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Update the input status with the 32 bits read from the expander */
+
+  intstat = sim_int_update(priv);
+  if (intstat != 0)
+    {
+      gpioinfo("intstat=%lx\n", (unsigned long)intstat);
+
+      /* Perform pin interrupt callbacks */
+
+      for (i = 0; i < CONFIG_SIM_INT_NCALLBACKS; i++)
+        {
+          /* Is this entry valid (i.e., callback attached)?  */
+
+          if (priv->cb[i].cbfunc != NULL)
+            {
+              /* Did any of the requested pin interrupts occur? */
+
+              ioe_pinset_t match = intstat & priv->cb[i].pinset;
+              if (match != 0)
+                {
+                  /* Yes.. perform the callback */
+
+                  (void)priv->cb[i].cbfunc(&priv->dev, match,
+                                           priv->cb[i].cbarg);
+                }
+            }
+        }
+    }
+
+  /* Re-start the poll timer */
+
+  ret = wd_start(priv->wdog, SIM_POLLDELAY, (wdentry_t)sim_interrupt,
+                 1, (wdparm_t)priv);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: Failed to start poll timer\n");
+    }
+}
+
+/****************************************************************************
+ * Name: sim_interrupt
+ *
+ * Description:
+ *   The poll timer has expired; check for missed interrupts
+ *
+ * Input Parameters:
+ *   Standard wdog expiration arguments.
+ *
+ ****************************************************************************/
+
+static void sim_interrupt(int argc, wdparm_t arg1, ...)
+{
+  FAR struct sim_dev_s *priv;
+
+  DEBUGASSERT(argc == 1);
+  priv = (FAR struct sim_dev_s *)arg1;
+  DEBUGASSERT(priv != NULL);
+
+  /* Defer interrupt processing to the worker thread.  This is not only
+   * much kinder in the use of system resources but is probably necessary
+   * to access the I/O expander device.
+   *
+   * Notice that further GPIO interrupts are disabled until the work is
+   * actually performed.  This is to prevent overrun of the worker thread.
+   * Interrupts are re-enabled in sim_interrupt_work() when the work is
+   * completed.
+   */
+
+  if (work_available(&priv->work))
+    {
+      /* Schedule interrupt related work on the high priority worker thread. */
+
+      work_queue(HPWORK, &priv->work, sim_interrupt_work,
+                 (FAR void *)priv, 0);
+    }
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sim_ioexpander_initialize
+ *
+ * Description:
+ *   Instantiate and configure the I/O Expander device driver to use the provided
+ *   I2C device instance.
+ *
+ * Input Parameters:
+ *   i2c     - An I2C driver instance
+ *   minor   - The device i2c address
+ *   config  - Persistent board configuration data
+ *
+ * Returned Value:
+ *   an ioexpander_dev_s instance on success, NULL on failure.
+ *
+ ****************************************************************************/
+
+FAR struct ioexpander_dev_s *sim_ioexpander_initialize(void)
+{
+  FAR struct sim_dev_s *priv = &g_ioexpander;
+  int ret;
+
+  /* Initialize the device state structure */
+
+  priv->dev.ops = &g_sim_ops;
+
+  /* Initial interrupt state:  Edge triggered on both edges */
+
+  priv->trigger  = PINSET_ALL;  /* All edge triggered */
+  priv->level[0] = PINSET_ALL;  /* All rising edge */
+  priv->level[1] = PINSET_ALL;  /* All falling edge */
+
+  /* Set up a timer to poll for simulated interrupts */
+
+  priv->wdog = wd_create();
+  DEBUGASSERT(priv->wdog != NULL);
+
+  ret = wd_start(priv->wdog, SIM_POLLDELAY, (wdentry_t)sim_interrupt,
+                 1, (wdparm_t)priv);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: Failed to start poll timer\n");
+    }
+
+  return &priv->dev;
+}
+
+#endif /* CONFIG_SIM_IOEXPANDER */
diff --git a/arch/sim/src/up_netdriver.c b/arch/sim/src/up_netdriver.c
index c785f4974604edaf82ede354b378a6a1d07b7b3a..d9c12ae3397fe86405d2d966cf805b233b1faea0 100644
--- a/arch/sim/src/up_netdriver.c
+++ b/arch/sim/src/up_netdriver.c
@@ -78,15 +78,18 @@ struct timer
   uint32_t start;
 };
 
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
 static struct timer g_periodic_timer;
+
+/* A single packet buffer is used */
+
+static uint8_t g_pktbuf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
+
+/* Ethernet peripheral state */
+
 static struct net_driver_s g_sim_dev;
 
 /****************************************************************************
@@ -213,7 +216,7 @@ void netdriver_loop(void)
 #ifdef CONFIG_NET_IPv4
           if (eth->type == HTONS(ETHTYPE_IP) && is_ours)
             {
-              nllvdbg("IPv4 frame\n");
+              ninfo("IPv4 frame\n");
 
               /* Handle ARP on input then give the IPv4 packet to the network
                * layer
@@ -254,7 +257,7 @@ void netdriver_loop(void)
 #ifdef CONFIG_NET_IPv6
           if (eth->type == HTONS(ETHTYPE_IP6) && is_ours)
             {
-              nllvdbg("Iv6 frame\n");
+              ninfo("Iv6 frame\n");
 
               /* Give the IPv6 packet to the network layer */
 
@@ -340,6 +343,7 @@ int netdriver_init(void)
 
   /* Set callbacks */
 
+  g_sim_dev.d_buf    = g_pktbuf;         /* Single packet buffer */
   g_sim_dev.d_ifup   = netdriver_ifup;
   g_sim_dev.d_ifdown = netdriver_ifdown;
 
diff --git a/arch/sim/src/up_oneshot.c b/arch/sim/src/up_oneshot.c
new file mode 100644
index 0000000000000000000000000000000000000000..7481e40017b9572d9ee0fd8b49f7c9ee0350fc5c
--- /dev/null
+++ b/arch/sim/src/up_oneshot.c
@@ -0,0 +1,322 @@
+/****************************************************************************
+ *  arch/sim/src/up_oneshot.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* This structure describes the state of the oneshot timer lower-half driver */
+
+struct sim_oneshot_lowerhalf_s
+{
+  /* This is the part of the lower half driver that is visible to the upper-
+   * half client of the driver.  This must be the first thing in this
+   * structure so that pointers to struct oneshot_lowerhalf_s are cast
+   * compatible to struct sim_oneshot_lowerhalf_s and vice versa.
+   */
+
+  struct oneshot_lowerhalf_s lh;  /* Common lower-half driver fields */
+
+  /* Private lower half data follows */
+
+  WDOG_ID wdog;                   /* Simulates oneshot timer */
+  oneshot_callback_t callback;    /* internal handler that receives callback */
+  FAR void *arg;                  /* Argument that is passed to the handler */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static void sim_oneshot_handler(int argc, wdparm_t arg1, ...);
+
+static int sim_max_delay(FAR struct oneshot_lowerhalf_s *lower,
+                         FAR struct timespec *ts);
+static int sim_start(FAR struct oneshot_lowerhalf_s *lower,
+                     oneshot_callback_t callback, FAR void *arg,
+                     FAR const struct timespec *ts);
+static int sim_cancel(FAR struct oneshot_lowerhalf_s *lower,
+                      FAR struct timespec *ts);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Lower half operations */
+
+static const struct oneshot_operations_s g_oneshot_ops =
+{
+  .max_delay = sim_max_delay,
+  .start     = sim_start,
+  .cancel    = sim_cancel,
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sim_oneshot_handler
+ *
+ * Description:
+ *   Timer expiration handler
+ *
+ * Input Parameters:
+ *   arg - Should be the same argument provided when sim_oneshot_start()
+ *         was called.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void sim_oneshot_handler(int argc, wdparm_t arg1, ...)
+{
+  FAR struct sim_oneshot_lowerhalf_s *priv =
+    (FAR struct sim_oneshot_lowerhalf_s *)arg1;
+  oneshot_callback_t callback;
+  FAR void *cbarg;
+
+  DEBUGASSERT(argc == 1 && priv != NULL);
+
+  /* Perhaps the callback was nullified in a race condition with
+   * sim_cancel?
+   */
+
+  if (priv->callback)
+    {
+      /* Sample and nullify BEFORE executing callback (in case the callback
+       * restarts the oneshot).
+       */
+
+      callback       = priv->callback;
+      cbarg          = priv->arg;
+      priv->callback = NULL;
+      priv->arg      = NULL;
+
+      /* Then perform the callback */
+
+      callback(&priv->lh, cbarg);
+    }
+}
+
+/****************************************************************************
+ * Name: sim_max_delay
+ *
+ * Description:
+ *   Determine the maximum delay of the one-shot timer (in microseconds)
+ *
+ * Input Parameters:
+ *   lower   An instance of the lower-half oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           oneshot_initialize();
+ *   ts      The location in which to return the maxumum delay.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+static int sim_max_delay(FAR struct oneshot_lowerhalf_s *lower,
+                         FAR struct timespec *ts)
+{
+  DEBUGASSERT(lower != NULL && ts != NULL);
+
+  ts->tv_sec  = INT_MAX;
+  ts->tv_nsec = 1000000000ul - 1;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: sim_start
+ *
+ * Description:
+ *   Start the oneshot timer
+ *
+ * Input Parameters:
+ *   lower   An instance of the lower-half oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           oneshot_initialize();
+ *   handler The function to call when when the oneshot timer expires.
+ *   arg     An opaque argument that will accompany the callback.
+ *   ts      Provides the duration of the one shot timer.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+static int sim_start(FAR struct oneshot_lowerhalf_s *lower,
+                     oneshot_callback_t callback, FAR void *arg,
+                     FAR const struct timespec *ts)
+{
+  FAR struct sim_oneshot_lowerhalf_s *priv =
+    (FAR struct sim_oneshot_lowerhalf_s *)lower;
+  systime_t ticks;
+  int64_t nsec;
+
+  DEBUGASSERT(priv != NULL && callback != NULL && ts != NULL);
+
+  /* Convert time to ticks */
+
+  nsec = (int64_t)ts->tv_sec * NSEC_PER_SEC +
+         (int64_t)ts->tv_nsec;
+  ticks = (systime_t)((nsec + NSEC_PER_TICK - 1) / NSEC_PER_TICK);
+ 
+  /* Save the callback information and start the timer */
+
+  priv->callback = callback;
+  priv->arg      = arg;
+
+  return wd_start(priv->wdog, ticks, (wdentry_t)sim_oneshot_handler,
+                  1, (wdparm_t)priv);
+}
+
+/****************************************************************************
+ * Name: sim_cancel
+ *
+ * Description:
+ *   Cancel the oneshot timer and return the time remaining on the timer.
+ *
+ *   NOTE: This function may execute at a high rate with no timer running (as
+ *   when pre-emption is enabled and disabled).
+ *
+ * Input Parameters:
+ *   lower   Caller allocated instance of the oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           oneshot_initialize();
+ *   ts      The location in which to return the time remaining on the
+ *           oneshot timer.  A time of zero is returned if the timer is
+ *           not running.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success.  A call to up_timer_cancel() when
+ *   the timer is not active should also return success; a negated errno
+ *   value is returned on any failure.
+ *
+ ****************************************************************************/
+
+static int sim_cancel(FAR struct oneshot_lowerhalf_s *lower,
+                      FAR struct timespec *ts)
+{
+  FAR struct sim_oneshot_lowerhalf_s *priv =
+    (FAR struct sim_oneshot_lowerhalf_s *)lower;
+  int ret;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Cancel the timer */
+
+  ret            = wd_cancel(priv->wdog);
+  priv->callback = NULL;
+  priv->arg      = NULL;
+
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: oneshot_initialize
+ *
+ * Description:
+ *   Initialize the oneshot timer and return a oneshot lower half driver
+ *   instance.
+ *
+ * Input Parameters:
+ *   chan       Timer counter channel to be used.
+ *   resolution The required resolution of the timer in units of
+ *              microseconds.  NOTE that the range is restricted to the
+ *              range of uint16_t (excluding zero).
+ *
+ * Returned Value:
+ *   On success, a non-NULL instance of the oneshot lower-half driver is
+ *   returned.  NULL is return on any failure.
+ *
+ ****************************************************************************/
+
+FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan,
+                                                   uint16_t resolution)
+{
+  FAR struct sim_oneshot_lowerhalf_s *priv;
+
+  /* Allocate an instance of the lower half driver */
+
+  priv = (FAR struct sim_oneshot_lowerhalf_s *)
+    kmm_zalloc(sizeof(struct sim_oneshot_lowerhalf_s));
+
+  if (priv == NULL)
+    {
+      tmrerr("ERROR: Failed to initialized state structure\n");
+      return NULL;
+    }
+
+  /* Initialize the lower-half driver structure */
+
+  priv->lh.ops = &g_oneshot_ops;
+
+  /* Initialize the contained watchdog timer */
+
+  priv->wdog = wd_create();
+  if (priv->wdog == NULL)
+    {
+      tmrerr("ERROR: Failed to create wdog\n");
+      kmm_free(priv);
+      return NULL;
+    }
+
+  return &priv->lh;
+}
\ No newline at end of file
diff --git a/arch/sim/src/up_qspiflash.c b/arch/sim/src/up_qspiflash.c
new file mode 100644
index 0000000000000000000000000000000000000000..c94986b3d388537d3e71afc2eaa689f5461452cb
--- /dev/null
+++ b/arch/sim/src/up_qspiflash.c
@@ -0,0 +1,607 @@
+/************************************************************************************
+ * arch/sim/src/up_qspiflash.c
+ *
+ *   Copyright (C) 2014, 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "up_internal.h"
+
+#if defined(CONFIG_SIM_QSPIFLASH)
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Configuration ********************************************************************/
+
+/* Define the FLASH SIZE in bytes */
+
+#ifdef CONFIG_SIM_QSPIFLASH_1M
+#  define CONFIG_QSPIFLASH_SIZE        (128 * 1024)
+#  define CONFIG_QSPIFLASH_CAPACITY    0x11
+
+#ifndef CONFIG_SIM_QSPIFLASH_SECTORSIZE
+#  define CONFIG_SIM_QSPIFLASH_SECTORSIZE  2048
+#endif
+
+#endif
+
+#ifdef CONFIG_SIM_QSPIFLASH_8M
+#  define CONFIG_QSPIFLASH_SIZE        (1024 * 1024)
+#  define CONFIG_QSPIFLASH_CAPACITY    0x14
+#endif
+
+#ifdef CONFIG_SIM_QSPIFLASH_32M
+#  define CONFIG_QSPIFLASH_SIZE        (4 * 1024 * 1024)
+#  define CONFIG_QSPIFLASH_CAPACITY    0x16
+#endif
+
+#ifdef CONFIG_SIM_QSPIFLASH_64M
+#  define CONFIG_QSPIFLASH_SIZE        (8 * 1024 * 1024)
+#  define CONFIG_QSPIFLASH_CAPACITY    0x17
+#endif
+
+#ifdef CONFIG_SIM_QSPIFLASH_128M
+#  define CONFIG_QSPIFLASH_SIZE        (16 * 1024 * 1024)
+#  define CONFIG_QSPIFLASH_CAPACITY    0x18
+#endif
+
+#ifndef CONFIG_SIM_QSPIFLASH_MANUFACTURER
+#  define CONFIG_SIM_QSPIFLASH_MANUFACTURER  0x20
+#endif
+
+#ifndef CONFIG_SIM_QSPIFLASH_MEMORY_TYPE
+#  define CONFIG_SIM_QSPIFLASH_MEMORY_TYPE  0xba
+#endif
+
+#ifndef CONFIG_SIM_QSPIFLASH_SECTORSIZE
+#  define CONFIG_SIM_QSPIFLASH_SECTORSIZE  65536
+#endif
+
+#ifndef CONFIG_SIM_QSPIFLASH_SUBSECTORSIZE
+#  define CONFIG_SIM_QSPIFLASH_SUBSECTORSIZE  4096
+#endif
+
+#ifndef CONFIG_SIM_QSPIFLASH_SECTORSIZE_MASK
+#  define CONFIG_SIM_QSPIFLASH_SECTORSIZE_MASK  (~(CONFIG_SIM_QSPIFLASH_SECTORSIZE-1))
+#endif
+
+#ifndef CONFIG_SIM_QSPIFLASH_SUBSECTORSIZE_MASK
+#  define CONFIG_SIM_QSPIFLASH_SUBSECTORSIZE_MASK  (~(CONFIG_SIM_QSPIFLASH_SUBSECTORSIZE-1))
+#endif
+
+#ifndef CONFIG_SIM_QSPIFLASH_PAGESIZE
+#  define CONFIG_SIM_QSPIFLASH_PAGESIZE  256
+#endif
+
+#ifndef CONFIG_SIM_QSPIFLASH_PAGESIZE_MASK
+#  define CONFIG_SIM_QSPIFLASH_PAGESIZE_MASK  (CONFIG_SIM_QSPIFLASH_PAGESIZE-1)
+#endif
+
+/* Define FLASH States */
+
+#define QSPIFLASH_STATE_IDLE         0
+#define QSPIFLASH_STATE_RDID1        1
+#define QSPIFLASH_STATE_RDID2        2
+#define QSPIFLASH_STATE_RDID3        3
+#define QSPIFLASH_STATE_WREN         4
+#define QSPIFLASH_STATE_RDSR         5
+#define QSPIFLASH_STATE_SE1          6
+#define QSPIFLASH_STATE_SE2          7
+#define QSPIFLASH_STATE_SE3          8
+#define QSPIFLASH_STATE_PP1          9
+#define QSPIFLASH_STATE_PP2          10
+#define QSPIFLASH_STATE_PP3          11
+#define QSPIFLASH_STATE_PP4          12
+#define QSPIFLASH_STATE_READ1        13
+#define QSPIFLASH_STATE_READ2        14
+#define QSPIFLASH_STATE_READ3        15
+#define QSPIFLASH_STATE_READ4        16
+#define QSPIFLASH_STATE_FREAD_WAIT   17
+
+/* Instructions */
+/*      Command            Value      N Description             Addr Dummy Data   */
+#define QSPIFLASH_WREN      0x06    /* 1 Write Enable              0   0     0     */
+#define QSPIFLASH_WRDI      0x04    /* 1 Write Disable             0   0     0     */
+#define QSPIFLASH_RDID      0x9f    /* 1 Read Identification       0   0     1-3   */
+#define QSPIFLASH_RDSR      0x05    /* 1 Read Status Register      0   0     >=1   */
+#define QSPIFLASH_WRSR      0x01    /* 1 Write Status Register     0   0     1     */
+#define QSPIFLASH_READ      0x03    /* 1 Read Data Bytes           3   0     >=1   */
+#define QSPIFLASH_FAST_READ 0x0b    /* 1 Higher speed read         3   1     >=1   */
+#define QSPIFLASH_PP        0x02    /* 1 Page Program              3   0     1-256 */
+#define QSPIFLASH_SE        0xd8    /* 1 Sector Erase              3   0     0     */
+#define QSPIFLASH_BE        0xc7    /* 1 Bulk Erase                0   0     0     */
+#define QSPIFLASH_DP        0xb9    /* 2 Deep power down           0   0     0     */
+#define QSPIFLASH_RES       0xab    /* 2 Read Electronic Signature 0   3     >=1   */
+#define QSPIFLASH_SSE       0x20    /* 3 Sub-Sector Erase          0   0     0     */
+
+#define QSPIFLASH_ID        0x9f    /* JEDEC ID */
+#define QSPIFLASH_READ_QUAD 0xeb
+
+#define QSPIFLASH_DUMMY     0xa5
+
+#define QSPIFLASH_WREN_SET  0x02
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+
+struct sim_qspiflashdev_s
+{
+  struct qspi_dev_s spidev;     /* Externally visible part of the SPI interface */
+  uint32_t         selected;    /* SPIn base address */
+  int              wren;
+  int              state;
+  uint16_t         read_data;
+  uint8_t          last_cmd;
+  unsigned long    address;
+  unsigned char    data[CONFIG_QSPIFLASH_SIZE];
+};
+
+/************************************************************************************
+ * Private Function Prototypes
+ ************************************************************************************/
+
+/* QSPI methods */
+
+static int         qspiflash_lock(FAR struct qspi_dev_s *dev, bool lock);
+static uint32_t    qspiflash_setfrequency(FAR struct qspi_dev_s *dev,
+                     uint32_t frequency);
+static void        qspiflash_setmode(FAR struct qspi_dev_s *dev,
+                     enum qspi_mode_e mode);
+static void        qspiflash_setbits(FAR struct qspi_dev_s *dev, int nbits);
+static int         qspiflash_command(FAR struct qspi_dev_s *dev,
+                     FAR struct qspi_cmdinfo_s *cmd);
+static int         qspiflash_memory(FAR struct qspi_dev_s *dev,
+                     FAR struct qspi_meminfo_s *mem);
+static FAR void   *qspiflash_alloc(FAR struct qspi_dev_s *dev, size_t buflen);
+static void        qspiflash_free(FAR struct qspi_dev_s *dev, FAR void *buffer);
+
+static void qspiflash_writeword(FAR struct sim_qspiflashdev_s *priv,
+                    uint16_t data, FAR struct qspi_cmdinfo_s *cmdinfo);
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+static const struct qspi_ops_s g_qspiops =
+{
+  .lock              = qspiflash_lock,
+  .setfrequency      = qspiflash_setfrequency,
+  .setmode           = qspiflash_setmode,
+  .setbits           = qspiflash_setbits,
+  .command           = qspiflash_command,
+  .memory            = qspiflash_memory,
+  .alloc             = qspiflash_alloc,
+  .free              = qspiflash_free
+};
+
+struct sim_qspiflashdev_s g_qspidev =
+{
+  .spidev   = { &g_qspiops },
+};
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: qspiflash_lock
+ *
+ * Description:
+ *   On SPI buses where there are multiple devices, it will be necessary to
+ *   lock SPI to have exclusive access to the buses for a sequence of
+ *   transfers.  The bus should be locked before the chip is selected. After
+ *   locking the SPI bus, the caller should then also call the setfrequency,
+ *   setbits, and setmode methods to make sure that the SPI is properly
+ *   configured for the device.  If the SPI buss is being shared, then it
+ *   may have been left in an incompatible state.
+ *
+ * Input Parameters:
+ *   dev  - Device-specific state data
+ *   lock - true: Lock spi bus, false: unlock SPI bus
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+static int qspiflash_lock(FAR struct qspi_dev_s *dev, bool lock)
+{
+  return OK;
+}
+
+/************************************************************************************
+ * Name: qspiflash_memory
+ *
+ * Description:
+ *   Perform QSPI Memory transaction operations
+ *
+ * Returned Value:
+ *   Always returns zero
+ *
+ ************************************************************************************/
+
+int qspiflash_memory(FAR struct qspi_dev_s *dev, FAR struct qspi_meminfo_s *mem)
+{
+  FAR struct sim_qspiflashdev_s *priv = (FAR struct sim_qspiflashdev_s *)dev;
+
+  switch (mem->cmd)
+  {
+    case QSPIFLASH_READ_QUAD:
+      priv->wren = 0;
+      memcpy(mem->buffer, &priv->data[mem->addr], mem->buflen);
+      priv->address += mem->addr + mem->buflen;
+      priv->state = QSPIFLASH_STATE_IDLE;
+      break;
+
+    case QSPIFLASH_PP:
+      if (priv->wren)
+        {
+          memcpy(&priv->data[mem->addr], mem->buffer, mem->buflen);
+        }
+      break;
+
+    default:
+      return -EINVAL;
+  }
+
+  return 0;
+}
+
+/************************************************************************************
+ * Name: qspiflash_setfrequency
+ *
+ * Description:
+ *   Set the SPI frequency.
+ *
+ * Input Parameters:
+ *   dev -       Device-specific state data
+ *   frequency - The SPI frequency requested
+ *
+ * Returned Value:
+ *   Returns the actual frequency selected
+ *
+ ************************************************************************************/
+
+static uint32_t qspiflash_setfrequency(FAR struct qspi_dev_s *dev, uint32_t frequency)
+{
+  return frequency;
+}
+
+/************************************************************************************
+ * Name: qspiflash_setmode
+ *
+ * Description:
+ *   Set the SPI mode.  see enum spi_mode_e for mode definitions
+ *
+ * Input Parameters:
+ *   dev  - Device-specific state data
+ *   mode - The SPI mode requested
+ *
+ * Returned Value:
+ *   Returns the actual frequency selected
+ *
+ ************************************************************************************/
+
+static void qspiflash_setmode(FAR struct qspi_dev_s *dev, enum qspi_mode_e mode)
+{
+}
+
+/************************************************************************************
+ * Name: qspiflash_setbits
+ *
+ * Description:
+ *   Set the number of bits per word.
+ *
+ * Input Parameters:
+ *   dev   - Device-specific state data
+ *   nbits - The number of bits requested
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+static void qspiflash_setbits(FAR struct qspi_dev_s *dev, int nbits)
+{
+}
+
+/************************************************************************************
+ * Name: qspiflash_alloc
+ *
+ * Description:
+ *   Allocate a buffer and associate it with the QSPI device
+ *
+ * Input Parameters:
+ *   dev   - Device-specific state data
+ *   buflen - Length of buffer to allocate
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+static FAR void *qspiflash_alloc(FAR struct qspi_dev_s *dev, size_t buflen)
+{
+  return kmm_malloc(buflen);
+}
+
+/************************************************************************************
+ * Name: qspiflash_free
+ *
+ * Description:
+ *   Allocate a buffer and associate it with the QSPI device
+ *
+ * Input Parameters:
+ *   dev   - Device-specific state data
+ *   buflen - Length of buffer to allocate
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+static void qspiflash_free(FAR struct qspi_dev_s *dev, FAR void *buffer)
+{
+  kmm_free(buffer);
+}
+
+/************************************************************************************
+ * Name: qspiflash_sectorerase
+ *
+ * Description:
+ *   Erase one sector
+ *
+ * Input Parameters:
+ *   priv - Device-specific state data
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+static void qspiflash_sectorerase(FAR struct sim_qspiflashdev_s *priv)
+{
+  uint32_t  address;
+  uint32_t  len;
+
+  /* Ensure the WREN bit is set before any erase operation */
+
+  if (priv->wren)
+    {
+      address = priv->address;
+      if (priv->last_cmd == QSPIFLASH_SE)
+        {
+          address &= CONFIG_SIM_QSPIFLASH_SECTORSIZE_MASK;
+          len = CONFIG_SIM_QSPIFLASH_SECTORSIZE;
+        }
+      else if (priv->last_cmd == QSPIFLASH_SSE)
+        {
+          address &= CONFIG_SIM_QSPIFLASH_SUBSECTORSIZE_MASK;
+          len = CONFIG_SIM_QSPIFLASH_SUBSECTORSIZE;
+        }
+
+      /* Now perform the erase */
+
+      memset(&priv->data[address], 0xFF, len);
+    }
+}
+
+/************************************************************************************
+ * Name: qspiflash_writeword
+ *
+ * Description:
+ *   Write a word (byte in our case) to the FLASH state machine.
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   data     - the data to send to the simulated FLASH
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+static void qspiflash_writeword(FAR struct sim_qspiflashdev_s *priv, uint16_t data,
+                                FAR struct qspi_cmdinfo_s *cmdinfo)
+{
+  switch (priv->state)
+    {
+      case QSPIFLASH_STATE_IDLE:
+        priv->last_cmd = data;
+        priv->read_data = 0xff;
+        switch (data)
+          {
+            case QSPIFLASH_WREN:
+              priv->wren = 1;
+              break;
+
+            case QSPIFLASH_WRDI:
+              priv->wren = 0;
+              break;
+
+            /* Sector / Subsector erase */
+
+            case QSPIFLASH_SE:
+            case QSPIFLASH_SSE:
+              priv->address = cmdinfo->addr;
+
+              /* Now perform the sector or sub-sector erase.  Really this should
+               * be done during the deselect, but this is just a simulation .
+               */
+
+              qspiflash_sectorerase(priv);
+              break;
+
+            /* Bulk Erase */
+
+            case QSPIFLASH_BE:
+              priv->state = QSPIFLASH_STATE_IDLE;
+              if (priv->wren)
+                {
+                  memset(priv->data, 0xff, CONFIG_QSPIFLASH_SIZE);
+                }
+              break;
+
+            default:
+              break;
+          }
+        break;
+
+      default:
+        priv->state = QSPIFLASH_STATE_IDLE;
+        priv->read_data = 0xFF;
+        break;
+    }
+}
+
+/************************************************************************************
+ * Name: qspiflash_command
+ *
+ * Description:
+ *   Perform QSPI Command operations
+ *
+ * Returned Value:
+ *   Always returns zero
+ *
+ ************************************************************************************/
+
+static int qspiflash_command(FAR struct qspi_dev_s *dev, FAR struct qspi_cmdinfo_s *cmdinfo)
+{
+  uint8_t  *pBuf;
+  FAR struct sim_qspiflashdev_s *priv = (FAR struct sim_qspiflashdev_s *)dev;
+
+  DEBUGASSERT(cmdinfo->cmd < 256);
+
+  /* Does data accompany the command? */
+
+  if (QSPICMD_ISDATA(cmdinfo->flags))
+    {
+      DEBUGASSERT(cmdinfo->buffer != NULL && cmdinfo->buflen > 0);
+      pBuf = (uint8_t *) cmdinfo->buffer;
+
+      /* Read or write operation? */
+
+      if (QSPICMD_ISWRITE(cmdinfo->flags))
+        {
+          /* Write data operation */
+
+          qspiflash_writeword(priv, cmdinfo->cmd, cmdinfo);
+        }
+      else
+        {
+          /* Read data operation */
+
+          switch (cmdinfo->cmd)
+          {
+            case QSPIFLASH_ID:
+              pBuf[0] = CONFIG_SIM_QSPIFLASH_MANUFACTURER;
+              pBuf[1] = CONFIG_SIM_QSPIFLASH_MEMORY_TYPE;
+              pBuf[2] = CONFIG_QSPIFLASH_CAPACITY;
+              break;
+
+            case QSPIFLASH_RDSR:
+              if (priv->wren == 1)
+                  pBuf[0] = QSPIFLASH_WREN_SET;
+              else
+                  pBuf[0] = 0;
+              break;
+          }
+        }
+    }
+  else
+    {
+      /* Write data operation */
+
+      qspiflash_writeword(priv, cmdinfo->cmd, cmdinfo);
+    }
+
+  return 0;
+}
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: up_qspiflashinitialize
+ *
+ * Description:
+ *   Initialize the selected SPI port
+ *
+ * Input Parameter:
+ *   Port number (for hardware that has multiple SPI interfaces)
+ *
+ * Returned Value:
+ *   Valid SPI device structure reference on success; a NULL on failure
+ *
+ ************************************************************************************/
+
+FAR struct qspi_dev_s *up_qspiflashinitialize()
+{
+  FAR struct sim_qspiflashdev_s *priv = NULL;
+
+  irqstate_t flags = enter_critical_section();
+
+  priv = &g_qspidev;
+  priv->selected = 0;
+  priv->wren = 0;
+  priv->address = 0;
+  priv->state = QSPIFLASH_STATE_IDLE;
+  priv->read_data = 0xFF;
+  priv->last_cmd = 0xFF;
+  memset(&priv->data[0], 0xFF, sizeof(priv->data));
+
+  leave_critical_section(flags);
+  return (FAR struct qspi_dev_s *)priv;
+}
+
+#endif /* CONFIG_SIM_QSPIFLASH */
diff --git a/arch/sim/src/up_releasepending.c b/arch/sim/src/up_releasepending.c
index 386b58589a38143e6bd5bb24baf9c0e30c3fa70b..7a1df748279a7e838e8ba5afb739a20da55fdf92 100644
--- a/arch/sim/src/up_releasepending.c
+++ b/arch/sim/src/up_releasepending.c
@@ -66,7 +66,7 @@ void up_release_pending(void)
 {
   FAR struct tcb_s *rtcb = this_task();
 
-  sdbg("From TCB=%p\n", rtcb);
+  sinfo("From TCB=%p\n", rtcb);
 
   /* Merge the g_pendingtasks list into the ready-to-run task list */
 
@@ -93,7 +93,7 @@ void up_release_pending(void)
            */
 
           rtcb = this_task();
-          sdbg("New Active Task TCB=%p\n", rtcb);
+          sinfo("New Active Task TCB=%p\n", rtcb);
 
           /* The way that we handle signals in the simulation is kind of
            * a kludge.  This would be unsafe in a truly multi-threaded, interrupt
@@ -102,7 +102,7 @@ void up_release_pending(void)
 
           if (rtcb->xcp.sigdeliver)
             {
-              sdbg("Delivering signals TCB=%p\n", rtcb);
+              sinfo("Delivering signals TCB=%p\n", rtcb);
               ((sig_deliver_t)rtcb->xcp.sigdeliver)(rtcb);
               rtcb->xcp.sigdeliver = NULL;
             }
diff --git a/arch/sim/src/up_reprioritizertr.c b/arch/sim/src/up_reprioritizertr.c
index 39c981c64838ee87872b0517939a4b040d05aa55..048c311559607353625a2e62729997eb22b7ed5a 100644
--- a/arch/sim/src/up_reprioritizertr.c
+++ b/arch/sim/src/up_reprioritizertr.c
@@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
       FAR struct tcb_s *rtcb = this_task();
       bool switch_needed;
 
-      sdbg("TCB=%p PRI=%d\n", tcb, priority);
+      sinfo("TCB=%p PRI=%d\n", tcb, priority);
 
       /* Remove the tcb task from the ready-to-run list.
        * sched_removereadytorun will return true if we just
@@ -148,7 +148,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
                */
 
               rtcb = this_task();
-              sdbg("New Active Task TCB=%p\n", rtcb);
+              sinfo("New Active Task TCB=%p\n", rtcb);
 
               /* The way that we handle signals in the simulation is kind of
                * a kludge.  This would be unsafe in a truly multi-threaded, interrupt
@@ -157,7 +157,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
 
               if (rtcb->xcp.sigdeliver)
                 {
-                  sdbg("Delivering signals TCB=%p\n", rtcb);
+                  sinfo("Delivering signals TCB=%p\n", rtcb);
                   ((sig_deliver_t)rtcb->xcp.sigdeliver)(rtcb);
                   rtcb->xcp.sigdeliver = NULL;
                 }
diff --git a/arch/sim/src/up_schednote.c b/arch/sim/src/up_schednote.c
index 41797969b2c3ae7680a4e1092a4a55f85dbcd152..28e2fd8fbf039fee657ab79727d6836138393cca 100644
--- a/arch/sim/src/up_schednote.c
+++ b/arch/sim/src/up_schednote.c
@@ -68,19 +68,19 @@ void sched_note_start(FAR struct tcb_s *tcb)
 {
 #ifdef CONFIG_SMP
 #if CONFIG_TASK_NAME_SIZE > 0
-  lowsyslog(LOG_INFO, "CPU%d: Start %s, TCB@%p, state=%d\n",
-            tcb->cpu, tcb->name, tcb, tcb->task_state);
+  syslog(LOG_INFO, "CPU%d: Start %s, TCB@%p, state=%d\n",
+         tcb->cpu, tcb->name, tcb, tcb->task_state);
 #else
-  lowsyslog(LOG_INFO, "CPU%d: Start TCB@%p, state=%d\n"
-            tcb->cpu, tcb, tcb->task_state);
+  syslog(LOG_INFO, "CPU%d: Start TCB@%p, state=%d\n"
+         tcb->cpu, tcb, tcb->task_state);
 #endif
 #else
 #if CONFIG_TASK_NAME_SIZE > 0
-  lowsyslog(LOG_INFO, "Start %s, TCB@%p, state=%d\n",
-            tcb->name, tcb, tcb->task_state);
+  syslog(LOG_INFO, "Start %s, TCB@%p, state=%d\n",
+         tcb->name, tcb, tcb->task_state);
 #else
-  lowsyslog(LOG_INFO, "Start TCB@%p, state=%d\n",
-            tcb, tcb->task_state);
+  syslog(LOG_INFO, "Start TCB@%p, state=%d\n",
+         tcb, tcb->task_state);
 #endif
 #endif
 }
@@ -89,19 +89,19 @@ void sched_note_stop(FAR struct tcb_s *tcb)
 {
 #ifdef CONFIG_SMP
 #if CONFIG_TASK_NAME_SIZE > 0
-  lowsyslog(LOG_INFO, "CPU%d: Stop %s, TCB@%p, state=%d\n",
-            tcb->cpu, tcb->name, tcb, tcb->task_state);
+  syslog(LOG_INFO, "CPU%d: Stop %s, TCB@%p, state=%d\n",
+         tcb->cpu, tcb->name, tcb, tcb->task_state);
 #else
-  lowsyslog(LOG_INFO, "CPU%d: Stop TCB@%p, state=%d\n",
-            tcb->cpu, tcb, tcb->task_state);
+  syslog(LOG_INFO, "CPU%d: Stop TCB@%p, state=%d\n",
+         tcb->cpu, tcb, tcb->task_state);
 #endif
 #else
 #if CONFIG_TASK_NAME_SIZE > 0
-  lowsyslog(LOG_INFO, "Stop %s, TCB@%p, state=%d\n",
-            tcb->name, tcb, tcb->task_state);
+  syslog(LOG_INFO, "Stop %s, TCB@%p, state=%d\n",
+         tcb->name, tcb, tcb->task_state);
 #else
-  lowsyslog(LOG_INFO, "Stop TCB@%p, state=%d\n",
-            tcb, tcb->task_state);
+  syslog(LOG_INFO, "Stop TCB@%p, state=%d\n",
+         tcb, tcb->task_state);
 #endif
 #endif
 }
@@ -110,19 +110,19 @@ void sched_note_suspend(FAR struct tcb_s *tcb)
 {
 #ifdef CONFIG_SMP
 #if CONFIG_TASK_NAME_SIZE > 0
-  lowsyslog(LOG_INFO, "CPU%d: Suspend %s, TCB@%p, state=%d\n",
-            tcb->cpu, tcb->name, tcb, tcb->task_state);
+  syslog(LOG_INFO, "CPU%d: Suspend %s, TCB@%p, state=%d\n",
+         tcb->cpu, tcb->name, tcb, tcb->task_state);
 #else
-  lowsyslog(LOG_INFO, "CPU%d: Suspend TCB@%p, state=%d\n",
-            tcb->cpu, tcb, tcb->task_state);
+  syslog(LOG_INFO, "CPU%d: Suspend TCB@%p, state=%d\n",
+         tcb->cpu, tcb, tcb->task_state);
 #endif
 #else
 #if CONFIG_TASK_NAME_SIZE > 0
-  lowsyslog(LOG_INFO, "Suspend %s, TCB@%p, state=%d\n",
-            tcb->name, tcb, tcb->task_state);
+  syslog(LOG_INFO, "Suspend %s, TCB@%p, state=%d\n",
+         tcb->name, tcb, tcb->task_state);
 #else
-  lowsyslog(LOG_INFO, "Suspend TCB@%p, state=%d\n",
-            tcb, tcb->task_state);
+  syslog(LOG_INFO, "Suspend TCB@%p, state=%d\n",
+         tcb, tcb->task_state);
 #endif
 #endif
 }
@@ -131,19 +131,19 @@ void sched_note_resume(FAR struct tcb_s *tcb)
 {
 #ifdef CONFIG_SMP
 #if CONFIG_TASK_NAME_SIZE > 0
-  lowsyslog(LOG_INFO, "CPU%d: Resume %s, TCB@%p, state=%d\n",
-            tcb->cpu, tcb->name, tcb, tcb->task_state);
+  syslog(LOG_INFO, "CPU%d: Resume %s, TCB@%p, state=%d\n",
+         tcb->cpu, tcb->name, tcb, tcb->task_state);
 #else
-  lowsyslog(LOG_INFO, "CPU%d: Resume TCB@%p, state=%d\n",
-            tcb->cpu, tcb, tcb->task_state);
+  syslog(LOG_INFO, "CPU%d: Resume TCB@%p, state=%d\n",
+         tcb->cpu, tcb, tcb->task_state);
 #endif
 #else
 #if CONFIG_TASK_NAME_SIZE > 0
-  lowsyslog(LOG_INFO, "Resume %s, TCB@%p, state=%d\n",
-            tcb->name, tcb, tcb->task_state);
+  syslog(LOG_INFO, "Resume %s, TCB@%p, state=%d\n",
+         tcb->name, tcb, tcb->task_state);
 #else
-  lowsyslog(LOG_INFO, "Resume TCB@%p, state=%d\n",
-            tcb, tcb->task_state);
+  syslog(LOG_INFO, "Resume TCB@%p, state=%d\n",
+         tcb, tcb->task_state);
 #endif
 #endif
 }
@@ -160,19 +160,19 @@ void sched_note_premption(FAR struct tcb_s *tcb, bool locked)
 {
 #ifdef CONFIG_SMP
 #if CONFIG_TASK_NAME_SIZE > 0
-  lowsyslog(LOG_INFO, "CPU%d: Task %s TCB@%p preemption %s\n",
-            tcb->cpu, tcb->name, tcb, locked ? "LOCKED" : "UNLOCKED");
+  syslog(LOG_INFO, "CPU%d: Task %s TCB@%p preemption %s\n",
+         tcb->cpu, tcb->name, tcb, locked ? "LOCKED" : "UNLOCKED");
 #else
-  lowsyslog(LOG_INFO, "CPU%d: TCB@%p preemption %s\n",
-            tcb->cpu, tcb, locked ? "LOCKED" : "UNLOCKED");
+  syslog(LOG_INFO, "CPU%d: TCB@%p preemption %s\n",
+         tcb->cpu, tcb, locked ? "LOCKED" : "UNLOCKED");
 #endif
 #else
 #if CONFIG_TASK_NAME_SIZE > 0
-  lowsyslog(LOG_INFO, "Task %s, TCB@%p preemption %s\n",
-            tcb->name, tcb, locked ? "LOCKED" : "UNLOCKED");
+  syslog(LOG_INFO, "Task %s, TCB@%p preemption %s\n",
+         tcb->name, tcb, locked ? "LOCKED" : "UNLOCKED");
 #else
-  lowsyslog(LOG_INFO, "TCB@%p preemption %s\n",
-            tcb, locked ? "LOCKED" : "UNLOCKED");
+  syslog(LOG_INFO, "TCB@%p preemption %s\n",
+         tcb, locked ? "LOCKED" : "UNLOCKED");
 #endif
 #endif
 }
@@ -190,19 +190,19 @@ void sched_note_csection(FAR struct tcb_s *tcb, bool enter)
 {
 #ifdef CONFIG_SMP
 #if CONFIG_TASK_NAME_SIZE > 0
-  lowsyslog(LOG_INFO, "CPU%d: Task %s TCB@%p critical section %s\n",
-            tcb->cpu, tcb->name, tcb, enter ? "ENTER" : "LEAVE");
+  syslog(LOG_INFO, "CPU%d: Task %s TCB@%p critical section %s\n",
+         tcb->cpu, tcb->name, tcb, enter ? "ENTER" : "LEAVE");
 #else
-  lowsyslog(LOG_INFO, "CPU%d: TCB@%p critical section %s\n",
-            tcb->cpu, tcb, enter ? "ENTER" : "LEAVE");
+  syslog(LOG_INFO, "CPU%d: TCB@%p critical section %s\n",
+         tcb->cpu, tcb, enter ? "ENTER" : "LEAVE");
 #endif
 #else
 #if CONFIG_TASK_NAME_SIZE > 0
-  lowsyslog(LOG_INFO, "Task %s, TCB@%p critical section %s\n",
-            tcb->name, tcb, enter ? "ENTER" : "LEAVE");
+  syslog(LOG_INFO, "Task %s, TCB@%p critical section %s\n",
+         tcb->name, tcb, enter ? "ENTER" : "LEAVE");
 #else
-  lowsyslog(LOG_INFO, "TCB@%p critical section %s\n",
-            tcb, enter ? "ENTER" : "LEAVE");
+  syslog(LOG_INFO, "TCB@%p critical section %s\n",
+         tcb, enter ? "ENTER" : "LEAVE");
 #endif
 #endif
 }
diff --git a/arch/sim/src/up_simsmp.c b/arch/sim/src/up_simsmp.c
index 7ff5cdb6d0d5e9e4956929bcda36a9ba00f1b9df..8a1469976d4d5a9fa6f54a693a7564c15b7f75a9 100644
--- a/arch/sim/src/up_simsmp.c
+++ b/arch/sim/src/up_simsmp.c
@@ -78,16 +78,30 @@ struct sim_cpuinfo_s
 
 static pthread_key_t          g_cpukey;
 static pthread_t              g_sim_cputhread[CONFIG_SMP_NCPUS];
-static volatile unsigned char g_sim_cpupaused[CONFIG_SMP_NCPUS];
-static volatile spinlock_t    g_sim_cpuwait[CONFIG_SMP_NCPUS];
+
+/* These spinlocks are used in the SMP configuration in order to implement
+ * up_cpu_pause().  The protocol for CPUn to pause CPUm is as follows
+ *
+ * 1. The up_cpu_pause() implementation on CPUn locks both g_cpu_wait[m]
+ *    and g_cpu_paused[m].  CPUn then waits spinning on g_cpu_paused[m].
+ * 2. CPUm receives the interrupt it (1) unlocks g_cpu_paused[m] and
+ *    (2) locks g_cpu_wait[m].  The first unblocks CPUn and the second
+ *    blocks CPUm in the interrupt handler.
+ *
+ * When CPUm resumes, CPUn unlocks g_cpu_wait[m] and the interrupt handler
+ * on CPUm continues.  CPUm must, of course, also then unlock g_cpu_wait[m]
+ * so that it will be ready for the next pause operation.
+ */
+
+volatile spinlock_t g_cpu_wait[CONFIG_SMP_NCPUS];
+volatile spinlock_t g_cpu_paused[CONFIG_SMP_NCPUS];
 
 /****************************************************************************
  * NuttX domain function prototypes
  ****************************************************************************/
 
 void os_start(void) __attribute__ ((noreturn));
-void sim_cpu_pause(int cpu, volatile spinlock_t *wait,
-                   volatile unsigned char *paused);
+void up_cpu_paused(int cpu);
 void sim_smp_hook(void);
 
 /****************************************************************************
@@ -222,9 +236,7 @@ static void sim_handle_signal(int signo, siginfo_t *info, void *context)
 {
   int cpu = (int)((uintptr_t)pthread_getspecific(g_cpukey));
 
-  /* We need to perform the actual tasking operations in the NuttX domain */
-
-  sim_cpu_pause(cpu, &g_sim_cpuwait[cpu], &g_sim_cpupaused[cpu]);
+  (void)up_cpu_paused(cpu);
 }
 
 /****************************************************************************
@@ -446,7 +458,8 @@ int up_cpu_pause(int cpu)
 {
   /* Take the spinlock that will prevent the CPU thread from running */
 
-  g_sim_cpuwait[cpu] = SP_LOCKED;
+  g_cpu_wait[cpu]   = SP_LOCKED;
+  g_cpu_paused[cpu] = SP_LOCKED;
 
   /* Signal the CPU thread */
 
@@ -454,7 +467,7 @@ int up_cpu_pause(int cpu)
 
   /* Spin, waiting for the thread to pause */
 
-  while (!g_sim_cpupaused[cpu])
+  while (g_cpu_paused[cpu] != 0)
     {
       pthread_yield();
     }
@@ -485,6 +498,6 @@ int up_cpu_resume(int cpu)
 {
   /* Release the spinlock that will alloc the CPU thread to continue */
 
-  g_sim_cpuwait[cpu] = SP_UNLOCKED;
+  g_cpu_wait[cpu] = SP_UNLOCKED;
   return 0;
 }
diff --git a/arch/sim/src/up_smpsignal.c b/arch/sim/src/up_smpsignal.c
index 58582d0df96bcef5f868fe56602a2fe1afbee8b3..5b5c761a07197ba0f780f71bae49a49b35cecf60 100644
--- a/arch/sim/src/up_smpsignal.c
+++ b/arch/sim/src/up_smpsignal.c
@@ -52,26 +52,53 @@
  ****************************************************************************/
 
 /****************************************************************************
- * Name: sim_cpu_pause
+ * Name: up_cpu_pausereq
  *
  * Description:
- *   This is the SIGUSR1 signal handling logic.  It implements the core
- *   logic of up_cpu_pause() on the thread of execution the simulated CPU.
- *   This is the part of the implementation that must be performed in the
- *   NuttX vs. the host domain.
+ *   Return true if a pause request is pending for this CPU.
  *
  * Input Parameters:
- *   cpu    - The CPU being paused.
- *   wait   - Spinlock to wait on to be un-paused
- *   paused - A boolean to set when we are in the paused state.
+ *   cpu - The index of the CPU to be queried
  *
  * Returned Value:
- *   None
+ *   true   = a pause request is pending.
+ *   false = no pasue request is pending.
  *
  ****************************************************************************/
 
-void sim_cpu_pause(int cpu, volatile spinlock_t *wait,
-                   volatile unsigned char *paused)
+bool up_cpu_pausereq(int cpu)
+{
+  return spin_islocked(&g_cpu_paused[cpu]);
+}
+
+/****************************************************************************
+ * Name: up_cpu_paused
+ *
+ * Description:
+ *   Handle a pause request from another CPU.  Normally, this logic is
+ *   executed from interrupt handling logic within the architecture-specific
+ *   However, it is sometimes necessary necessary to perform the pending
+ *   pause operation in other contexts where the interrupt cannot be taken
+ *   in order to avoid deadlocks.
+ *
+ *   This function performs the following operations:
+ *
+ *   1. It saves the current task state at the head of the current assigned
+ *      task list.
+ *   2. It waits on a spinlock, then
+ *   3. Returns from interrupt, restoring the state of the new task at the
+ *      head of the ready to run list.
+ *
+ * Input Parameters:
+ *   cpu - The index of the CPU to be paused
+ *
+ * Returned Value:
+ *   On success, OK is returned.  Otherwise, a negated errno value indicating
+ *   the nature of the failure is returned.
+ *
+ ****************************************************************************/
+
+int up_cpu_paused(int cpu)
 {
   struct tcb_s *rtcb = current_task(cpu);
 
@@ -86,16 +113,18 @@ void sim_cpu_pause(int cpu, volatile spinlock_t *wait,
 
   if (up_setjmp(rtcb->xcp.regs) == 0)
     {
-      /* Indicate that we are in the paused state */
+      /* Unlock the g_cpu_paused spinlock to indicate that we are in the
+       * paused state
+       */
 
-      *paused = 1;
+      spin_unlock(&g_cpu_paused[cpu]);
 
       /* Spin until we are asked to resume.  When we resume, we need to
        * inicate that we are not longer paused.
        */
 
-      spin_lock(wait);
-      *paused = 0;
+      spin_lock(&g_cpu_wait[cpu]);
+      spin_unlock(&g_cpu_wait[cpu]);
 
       /* While we were paused, logic on a different CPU probably changed
        * the task as that head of the assigned task list.  So now we need
@@ -112,7 +141,7 @@ void sim_cpu_pause(int cpu, volatile spinlock_t *wait,
 
       if (rtcb->xcp.sigdeliver)
         {
-          sdbg("CPU%d: Delivering signals TCB=%p\n", cpu, rtcb);
+          sinfo("CPU%d: Delivering signals TCB=%p\n", cpu, rtcb);
           ((sig_deliver_t)rtcb->xcp.sigdeliver)(rtcb);
           rtcb->xcp.sigdeliver = NULL;
         }
@@ -125,7 +154,8 @@ void sim_cpu_pause(int cpu, volatile spinlock_t *wait,
 
       up_longjmp(rtcb->xcp.regs, 1);
     }
+
+  return OK;
 }
 
 #endif /* CONFIG_SMP */
-
diff --git a/arch/sim/src/up_spiflash.c b/arch/sim/src/up_spiflash.c
index 9c516972f0bf666d620da525bd0c4e0bf4567146..ad367890697a0756847518854a0255a71ca4bc19 100644
--- a/arch/sim/src/up_spiflash.c
+++ b/arch/sim/src/up_spiflash.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * arch/sim/src/up_spiflash.c
  *
- *   Copyright (C) 2014 Ken Pettit. All rights reserved.
+ *   Copyright (C) 2014, 2016 Ken Pettit. All rights reserved.
  *   Author: Ken Pettit 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -60,56 +60,40 @@
  ************************************************************************************/
 /* Configuration ********************************************************************/
 
-/* Debug ****************************************************************************/
-/* Check if (non-standard) SPI debug is enabled */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_SPI
-#endif
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /* Define the FLASH SIZE in bytes */
 
 #ifdef CONFIG_SIM_SPIFLASH_1M
-#  define CONFIG_SPIFLASH_SIZE        (128 * 1024)
-#  define CONFIG_SPIFLASH_CAPACITY    0x11
+#  define CONFIG_SPIFLASH_SIZE            (128 * 1024)
+#  define CONFIG_SPIFLASH_CAPACITY        0x11
 
 #ifndef CONFIG_SIM_SPIFLASH_SECTORSIZE
-#  define CONFIG_SIM_SPIFLASH_SECTORSIZE    2048
+#  define CONFIG_SIM_SPIFLASH_SECTORSIZE  2048
 #endif
 
 #endif
 
 #ifdef CONFIG_SIM_SPIFLASH_8M
-#  define CONFIG_SPIFLASH_SIZE        (1024 * 1024)
-#  define CONFIG_SPIFLASH_CAPACITY    0x14
+#  define CONFIG_SPIFLASH_SIZE            (1024 * 1024)
+#  define CONFIG_SPIFLASH_CAPACITY_SST26  0x3F
+#  define CONFIG_SPIFLASH_CAPACITY        0x14
 #endif
 
 #ifdef CONFIG_SIM_SPIFLASH_32M
-#  define CONFIG_SPIFLASH_SIZE        (4 * 1024 * 1024)
-#  define CONFIG_SPIFLASH_CAPACITY    0x16
+#  define CONFIG_SPIFLASH_SIZE            (4 * 1024 * 1024)
+#  define CONFIG_SPIFLASH_CAPACITY_SST26  0x42
+#  define CONFIG_SPIFLASH_CAPACITY        0x16
 #endif
 
 #ifdef CONFIG_SIM_SPIFLASH_64M
-#  define CONFIG_SPIFLASH_SIZE        (8 * 1024 * 1024)
-#  define CONFIG_SPIFLASH_CAPACITY    0x17
+#  define CONFIG_SPIFLASH_SIZE            (8 * 1024 * 1024)
+#  define CONFIG_SPIFLASH_CAPACITY_SST26  0x43
+#  define CONFIG_SPIFLASH_CAPACITY        0x17
 #endif
 
 #ifdef CONFIG_SIM_SPIFLASH_128M
-#  define CONFIG_SPIFLASH_SIZE        (16 * 1024 * 1024)
-#  define CONFIG_SPIFLASH_CAPACITY    0x18
+#  define CONFIG_SPIFLASH_SIZE            (16 * 1024 * 1024)
+#  define CONFIG_SPIFLASH_CAPACITY_SST26  0x44
+#  define CONFIG_SPIFLASH_CAPACITY        0x18
 #endif
 
 #ifndef CONFIG_SIM_SPIFLASH_MANUFACTURER
@@ -189,14 +173,18 @@
 
 struct sim_spiflashdev_s
 {
-  struct spi_dev_s spidev;     /* Externally visible part of the SPI interface */
-  uint32_t         selected;   /* SPIn base address */
-  int              wren;
-  int              state;
-  uint16_t         read_data;
-  uint8_t          last_cmd;
-  unsigned long    address;
-  unsigned char    data[CONFIG_SPIFLASH_SIZE];
+  struct spi_dev_s  spidev;     /* Externally visible part of the SPI interface */
+  uint32_t          selected;   /* SPIn base address */
+  FAR char *        name;       /* Name of the flash type (m25p, w25, etc.) */
+  int               wren;
+  int               state;
+  uint16_t          read_data;
+  uint8_t           last_cmd;
+  uint8_t           capacity;
+  uint8_t           manuf;
+  uint8_t           type;
+  unsigned long     address;
+  unsigned char     data[CONFIG_SPIFLASH_SIZE];
 };
 
 /************************************************************************************
@@ -256,9 +244,72 @@ static const struct spi_ops_s g_spiops =
   .registercallback  = 0,
 };
 
-struct sim_spiflashdev_s g_spidev =
+#ifdef CONFIG_SIM_SPIFLASH_M25P
+struct sim_spiflashdev_s g_spidev_m25p =
 {
   .spidev   = { &g_spiops },
+  .name     = "m25p",
+  .manuf    = 0x20,
+  .type     = 0x20,
+  .capacity = CONFIG_SPIFLASH_CAPACITY
+};
+#endif
+
+#ifdef CONFIG_SIM_SPIFLASH_SST26
+struct sim_spiflashdev_s g_spidev_sst26 =
+{
+  .spidev   = { &g_spiops },
+  .name     = "sst26",
+  .manuf    = 0xBF,
+#ifdef CONFIG_SST26_MEMORY_TYPE
+  .type     = CONFIG_SST26_MEMORY_TYPE,
+#else
+  .type     = 0x25,
+#endif
+  .capacity = CONFIG_SPIFLASH_CAPACITY_SST26
+};
+#endif
+
+#ifdef CONFIG_SIM_SPIFLASH_W25
+struct sim_spiflashdev_s g_spidev_w25 =
+{
+  .spidev   = { &g_spiops },
+  .name     = "w25",
+  .manuf    = 0xef,
+  .type     = 0x30,
+  .capacity = CONFIG_SPIFLASH_CAPACITY
+};
+#endif
+
+#ifdef CONFIG_SIM_SPIFLASH_CUSTOM
+struct sim_spiflashdev_s g_spidev_custom =
+{
+  .spidev   = { &g_spiops },
+  .name     = "custom",
+  .manuf    = CONFIG_SIM_SPIFLASH_MANUFACTURER,
+  .type     = CONFIG_SIM_SPIFLASH_MEMORY_TYPE,
+  .capacity = CONFIG_SIM_SPIFLASH_CAPACITY
+};
+#endif
+
+struct sim_spiflashdev_s *gp_spidev[] =
+{
+#ifdef CONFIG_SIM_SPIFLASH_M25P
+  &g_spidev_m25p,
+#endif
+#ifdef CONFIG_SIM_SPIFLASH_SST26
+  &g_spidev_sst26,
+#endif
+#ifdef CONFIG_SIM_SPIFLASH_W25
+  &g_spidev_w25,
+#endif
+#ifdef CONFIG_SIM_SPIFLASH_CUSTOM
+  &g_spidev_custom,
+#endif
+
+  /* Null termination pointer at end of list */
+
+  NULL
 };
 
 /************************************************************************************
@@ -479,7 +530,7 @@ static uint16_t spiflash_send(FAR struct spi_dev_s *dev, uint16_t wd)
 static void spiflash_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
                               FAR void *rxbuffer, size_t nwords)
 {
-  spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+  spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
 
   /* 8-bit mode */
 
@@ -536,7 +587,7 @@ static void spiflash_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffe
 #ifndef CONFIG_SPI_EXCHANGE
 static void spiflash_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer, size_t nwords)
 {
-  spivdbg("txbuffer=%p nwords=%d\n", txbuffer, nwords);
+  spiinfo("txbuffer=%p nwords=%d\n", txbuffer, nwords);
   return spiflash_exchange(dev, txbuffer, NULL, nwords);
 }
 #endif
@@ -565,7 +616,7 @@ static void spiflash_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffe
 static void spiflash_recvblock(FAR struct spi_dev_s *dev, FAR void *rxbuffer,
                                size_t nwords)
 {
-  spivdbg("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
+  spiinfo("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
   return spiflash_exchange(dev, NULL, rxbuffer, nwords);
 }
 #endif
@@ -682,17 +733,17 @@ static void spiflash_writeword(FAR struct sim_spiflashdev_s *priv, uint16_t data
       /* Read ID States */
 
       case SPIFLASH_STATE_RDID1:
-        priv->read_data = CONFIG_SIM_SPIFLASH_MANUFACTURER;
+        priv->read_data = priv->manuf;    /* CONFIG_SIM_SPIFLASH_MANUFACTURER; */
         priv->state = SPIFLASH_STATE_RDID2;
         break;
 
       case SPIFLASH_STATE_RDID2:
-        priv->read_data = CONFIG_SIM_SPIFLASH_MEMORY_TYPE;
+        priv->read_data = priv->type;     /* CONFIG_SIM_SPIFLASH_MEMORY_TYPE; */
         priv->state = SPIFLASH_STATE_RDID3;
         break;
 
       case SPIFLASH_STATE_RDID3:
-        priv->read_data = CONFIG_SPIFLASH_CAPACITY;
+        priv->read_data = priv->capacity; /* CONFIG_SPIFLASH_CAPACITY; */
         priv->state = SPIFLASH_STATE_IDLE;
         break;
 
@@ -854,13 +905,44 @@ static uint16_t spiflash_readword(FAR struct sim_spiflashdev_s *priv)
  *
  ************************************************************************************/
 
-FAR struct spi_dev_s *up_spiflashinitialize()
+FAR struct spi_dev_s *up_spiflashinitialize(FAR const char *name)
 {
   FAR struct sim_spiflashdev_s *priv = NULL;
+  int  x;
 
   irqstate_t flags = enter_critical_section();
 
-  priv = &g_spidev;
+  /* Loop through all supported flash devices */
+
+  /* Default to custom FLASH if not specified */
+
+  if (name == NULL)
+    {
+      name = "custom";
+    }
+
+  for (x = 0; gp_spidev[x] != NULL; x++)
+    {
+      /* Search for the specified flash by name */
+
+      if (strcmp(name, gp_spidev[x]->name) == 0)
+        {
+          break;
+        }
+    }
+
+  /* Test if flash device found */
+
+  if (gp_spidev[x] == NULL)
+    {
+      /* Specified device not supported */
+
+      return NULL;
+    }
+
+  /* Configure the selected flash device */
+
+  priv = gp_spidev[x];
   priv->selected = 0;
   priv->wren = 0;
   priv->address = 0;
diff --git a/arch/sim/src/up_testset.c b/arch/sim/src/up_testset.c
index 30cb64c0ef5a5453c4d1cc08cd9c1065a86aaffa..d1b754bca066c9085d07fbd8daa02d6dc3d383ca 100644
--- a/arch/sim/src/up_testset.c
+++ b/arch/sim/src/up_testset.c
@@ -71,7 +71,7 @@ static pthread_mutex_t g_tsmutex = PTHREAD_MUTEX_INITIALIZER;
  * Name: up_testset
  *
  * Description:
- *   Perform and atomic test and set operation on the provided spinlock.
+ *   Perform an atomic test and set operation on the provided spinlock.
  *
  *   This function must be provided via the architecture-specific logoic.
  *
diff --git a/arch/sim/src/up_tickless.c b/arch/sim/src/up_tickless.c
index 11177de5c55fdcf9967f75175e1a03fa743405f7..9097f751f718b824adc422165404fd64db965482 100644
--- a/arch/sim/src/up_tickless.c
+++ b/arch/sim/src/up_tickless.c
@@ -39,7 +39,7 @@
  * is suppressed and the platform specific code is expected to provide the
  * following custom functions.
  *
- *   void up_timer_initialize(void): Initializes the timer facilities.  Called
+ *   void sim_timer_initialize(void): Initializes the timer facilities.  Called
  *     early in the intialization sequence (by up_intialize()).
  *   int up_timer_gettime(FAR struct timespec *ts):  Returns the current
  *     time from the platform specific time source.
@@ -96,7 +96,7 @@ static bool g_timer_active;
  ****************************************************************************/
 
 /****************************************************************************
- * Name: up_timer_initialize
+ * Name: sim_timer_initialize
  *
  * Description:
  *   Initializes all platform-specific timer facilities.  This function is
@@ -120,7 +120,7 @@ static bool g_timer_active;
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void sim_timer_initialize(void)
 {
 }
 
@@ -129,7 +129,7 @@ void up_timer_initialize(void)
  *
  * Description:
  *   Return the elapsed time since power-up (or, more correctly, since
- *   up_timer_initialize() was called).  This function is functionally
+ *   sim_timer_initialize() was called).  This function is functionally
  *   equivalent to:
  *
  *      int clock_gettime(clockid_t clockid, FAR struct timespec *ts);
diff --git a/arch/sim/src/up_touchscreen.c b/arch/sim/src/up_touchscreen.c
index 4b4e598f45f741ccc98088cec22ee38c7785adb4..4c327bb683856d1f7691aa44356c1c7691850a8c 100644
--- a/arch/sim/src/up_touchscreen.c
+++ b/arch/sim/src/up_touchscreen.c
@@ -56,6 +56,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -194,7 +195,7 @@ static void up_notify(FAR struct up_dev_s *priv)
    * that the read data is available.
    */
 
-  ivdbg("contact=%d nwaiters=%d\n", priv->sample.contact, priv->nwaiters);
+  iinfo("contact=%d nwaiters=%d\n", priv->sample.contact, priv->nwaiters);
   if (priv->nwaiters > 0)
     {
       /* After posting this semaphore, we need to exit because the touchscreen
@@ -217,7 +218,7 @@ static void up_notify(FAR struct up_dev_s *priv)
       if (fds)
         {
           fds->revents |= POLLIN;
-          ivdbg("Report events: %02x\n", fds->revents);
+          iinfo("Report events: %02x\n", fds->revents);
           sem_post(fds->sem);
         }
     }
@@ -235,7 +236,7 @@ static int up_sample(FAR struct up_dev_s *priv,
 
   /* Is there new touchscreen sample data available? */
 
-  ivdbg("penchange=%d contact=%d id=%d\n",
+  iinfo("penchange=%d contact=%d id=%d\n",
         priv->penchange, sample->contact, priv->id);
 
   if (priv->penchange)
@@ -263,7 +264,7 @@ static int up_sample(FAR struct up_dev_s *priv,
        }
 
       priv->penchange = false;
-      ivdbg("penchange=%d contact=%d id=%d\n",
+      iinfo("penchange=%d contact=%d id=%d\n",
              priv->penchange, priv->sample.contact, priv->id);
 
       ret = OK;
@@ -308,11 +309,11 @@ static int up_waitsample(FAR struct up_dev_s *priv,
     {
       /* Wait for a change in the touchscreen state */
 
-      ivdbg("Waiting...\n");
+      iinfo("Waiting...\n");
       priv->nwaiters++;
       ret = sem_wait(&priv->waitsem);
       priv->nwaiters--;
-      ivdbg("Awakened...\n");
+      iinfo("Awakened...\n");
 
       if (ret < 0)
         {
@@ -357,7 +358,7 @@ errout:
 
 static int up_open(FAR struct file *filep)
 {
-  ivdbg("Opening...\n");
+  iinfo("Opening...\n");
   return OK;
 }
 
@@ -367,7 +368,7 @@ static int up_open(FAR struct file *filep)
 
 static int up_close(FAR struct file *filep)
 {
-  ivdbg("Closing...\n");
+  iinfo("Closing...\n");
   return OK;
 }
 
@@ -383,7 +384,7 @@ static ssize_t up_read(FAR struct file *filep, FAR char *buffer, size_t len)
   struct up_sample_s         sample;
   int                        ret;
 
-  ivdbg("len=%d\n", len);
+  iinfo("len=%d\n", len);
 
   DEBUGASSERT(filep);
   inode = filep->f_inode;
@@ -480,7 +481,7 @@ static ssize_t up_read(FAR struct file *filep, FAR char *buffer, size_t len)
   ret = SIZEOF_TOUCH_SAMPLE_S(1);
 
 errout:
-  ivdbg("Returning %d\n", ret);
+  iinfo("Returning %d\n", ret);
   sem_post(&priv->devsem);
   return ret;
 }
@@ -495,7 +496,7 @@ static int up_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   FAR struct up_dev_s *priv;
   int                       ret;
 
-  ivdbg("cmd: %d arg: %ld\n", cmd, arg);
+  iinfo("cmd: %d arg: %ld\n", cmd, arg);
   DEBUGASSERT(filep);
   inode = filep->f_inode;
 
@@ -539,7 +540,7 @@ static int up_poll(FAR struct file *filep, FAR struct pollfd *fds,
   int                  ret;
   int                  i;
 
-  ivdbg("setup: %d\n", (int)setup);
+  iinfo("setup: %d\n", (int)setup);
   DEBUGASSERT(filep && fds);
   inode = filep->f_inode;
 
@@ -648,7 +649,7 @@ int board_tsc_setup(int minor)
   char devname[DEV_NAMELEN];
   int ret;
 
-  ivdbg("minor: %d\n", minor);
+  iinfo("minor: %d\n", minor);
 
   /* Debug-only sanity checks */
 
@@ -657,20 +658,29 @@ int board_tsc_setup(int minor)
   /* Initialize the touchscreen device driver instance */
 
   memset(priv, 0, sizeof(struct up_dev_s));
+
+  /* Initialize semaphores */
+
   sem_init(&priv->devsem,  0, 1); /* Initialize device structure semaphore */
   sem_init(&priv->waitsem, 0, 0); /* Initialize pen event wait semaphore */
 
+  /* The waitsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
+
   priv->minor = minor;
 
   /* Register the device as an input device */
 
   (void)snprintf(devname, DEV_NAMELEN, DEV_FORMAT, minor);
-  ivdbg("Registering %s\n", devname);
+  iinfo("Registering %s\n", devname);
 
   ret = register_driver(devname, &up_fops, 0666, priv);
   if (ret < 0)
     {
-      idbg("register_driver() failed: %d\n", ret);
+      ierr("ERROR: register_driver() failed: %d\n", ret);
       goto errout_with_priv;
     }
 
@@ -732,12 +742,12 @@ void board_tsc_teardown(void)
   /* Un-register the device */
 
   (void)snprintf(devname, DEV_NAMELEN, DEV_FORMAT, priv->minor);
-  ivdbg("Un-registering %s\n", devname);
+  iinfo("Un-registering %s\n", devname);
 
   ret = unregister_driver(devname);
   if (ret < 0)
     {
-      idbg("uregister_driver() failed: %d\n", ret);
+      ierr("ERROR: uregister_driver() failed: %d\n", ret);
     }
 
   /* Clean up any resources.  Ouch!  While we are holding the semaphore? */
@@ -755,8 +765,8 @@ int up_buttonevent(int x, int y, int buttons)
   FAR struct up_dev_s *priv = (FAR struct up_dev_s *)&g_simtouchscreen;
   bool                 pendown;  /* true: pen is down */
 
-  ivdbg("x=%d y=%d buttons=%02x\n", x, y, buttons);
-  ivdbg("contact=%d nwaiters=%d\n", priv->sample.contact, priv->nwaiters);
+  iinfo("x=%d y=%d buttons=%02x\n", x, y, buttons);
+  iinfo("contact=%d nwaiters=%d\n", priv->sample.contact, priv->nwaiters);
 
   /* Any button press will count as pendown. */
 
diff --git a/arch/sim/src/up_uartwait.c b/arch/sim/src/up_uartwait.c
index 9f6971711693b46672d2308f1d2ee15e22090b94..681e87dcdd36b892035d4db9ce8badc9d64d6f95 100644
--- a/arch/sim/src/up_uartwait.c
+++ b/arch/sim/src/up_uartwait.c
@@ -39,6 +39,8 @@
 
 #include 
 
+#include 
+
 #include "up_internal.h"
 
 /****************************************************************************
@@ -57,7 +59,12 @@ static sem_t g_uartavail;
 
 void simuart_initialize(void)
 {
+  /* The g_uartavail semaphore is used for signaling and, hence, should not
+   * have priority inheritance enabled.
+   */
+
   sem_init(&g_uartavail, 0, 0);
+  sem_setprotocol(&g_uartavail, SEM_PRIO_NONE);
 }
 
 /****************************************************************************
diff --git a/arch/sim/src/up_unblocktask.c b/arch/sim/src/up_unblocktask.c
index 148b551973bed735fa4302c10c50a87ebc830854..5217efeb8fbe8e4db28d9292b9c712f5788377bd 100644
--- a/arch/sim/src/up_unblocktask.c
+++ b/arch/sim/src/up_unblocktask.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/sim/src/up_unblocktask.c
  *
- *   Copyright (C) 2007-2009, 2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2013, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -77,7 +77,7 @@ void up_unblock_task(FAR struct tcb_s *tcb)
   ASSERT((tcb->task_state >= FIRST_BLOCKED_STATE) &&
          (tcb->task_state <= LAST_BLOCKED_STATE));
 
-  sdbg("Unblocking TCB=%p\n", tcb);
+  sinfo("Unblocking TCB=%p\n", tcb);
 
   /* Remove the task from the blocked task list */
 
@@ -107,7 +107,7 @@ void up_unblock_task(FAR struct tcb_s *tcb)
            */
 
           rtcb = this_task();
-          sdbg("New Active Task TCB=%p\n", rtcb);
+          sinfo("New Active Task TCB=%p\n", rtcb);
 
           /* The way that we handle signals in the simulation is kind of
            * a kludge.  This would be unsafe in a truly multi-threaded, interrupt
@@ -116,7 +116,7 @@ void up_unblock_task(FAR struct tcb_s *tcb)
 
           if (rtcb->xcp.sigdeliver)
             {
-              sdbg("Delivering signals TCB=%p\n", rtcb);
+              sinfo("Delivering signals TCB=%p\n", rtcb);
               ((sig_deliver_t)rtcb->xcp.sigdeliver)(rtcb);
               rtcb->xcp.sigdeliver = NULL;
             }
diff --git a/arch/x86/include/i486/arch.h b/arch/x86/include/i486/arch.h
index 1994e3fda3ceee6c394ded91216e600bbf06bb04..44207e98d4007eaa7be39ff4a0fca6281296cc73 100644
--- a/arch/x86/include/i486/arch.h
+++ b/arch/x86/include/i486/arch.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/x86/include/i486/arch.h
  *
- *   Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -317,7 +317,7 @@
 
 /* This structure defines one segment */
 
-struct gdt_entry_s
+begin_packed_struct struct gdt_entry_s
 {
   uint16_t lowlimit;           /* The lower 16 bits of the limit */
   uint16_t lowbase;            /* The lower 16 bits of the base */
@@ -325,17 +325,17 @@ struct gdt_entry_s
   uint8_t  access;             /* Access flags, determine ring segment can be used in */
   uint8_t  granularity;
   uint8_t  hibase;             /* The last 8 bits of the base */
-} packed_struct;
+} end_packed_struct;
 
 /* This structure refers to the array of GDT entries, and is in the format
  * required by the lgdt instruction.
  */
 
-struct gdt_ptr_s
+begin_packed_struct struct gdt_ptr_s
 {
   uint16_t limit;               /* The upper 16 bits of all selector limits */
   uint32_t base;                /* The address of the first GDT entry */
-} packed_struct;
+} end_packed_struct;
 
 /* IDT data structures ******************************************************
  *
@@ -344,24 +344,24 @@ struct gdt_ptr_s
  * processor to determine the correct response to interrupts and exceptions.
  */
 
-struct idt_entry_s
+begin_packed_struct struct idt_entry_s
 {
   uint16_t lobase;           /* Lower 16-bits of vector address for interrupt */
   uint16_t sel;              /* Kernel segment selector */
   uint8_t  zero;             /* This must always be zero */
   uint8_t  flags;            /* (See documentation) */
   uint16_t hibase;           /* Upper 16-bits of vector address for interrupt */
-} packed_struct;
+} end_packed_struct;
 
 /* A struct describing a pointer to an array of interrupt handlers.  This is
  * in a format suitable for giving to 'lidt'.
  */
 
-struct idt_ptr_s
+begin_packed_struct struct idt_ptr_s
 {
   uint16_t limit;
   uint32_t base;             /* The address of the first GDT entry */
-} packed_struct;
+} end_packed_struct;
 
 /****************************************************************************
  * Inline functions
diff --git a/arch/x86/include/i486/inttypes.h b/arch/x86/include/i486/inttypes.h
new file mode 100644
index 0000000000000000000000000000000000000000..1cfe55f9a90cbfb8f2324c380e2d55011ba42694
--- /dev/null
+++ b/arch/x86/include/i486/inttypes.h
@@ -0,0 +1,245 @@
+/****************************************************************************
+ * arch/x86/include/i486/inttypes.h
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_X86_INCLUDE_I486_INTTYPES_H
+#define __ARCH_X86_INCLUDE_I486_INTTYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define PRId8       "d"
+#define PRId16      "d"
+#define PRId32      "d"
+#define PRId64      "lld"
+
+#define PRIdLEAST8  "d"
+#define PRIdLEAST16 "d"
+#define PRIdLEAST32 "d"
+#define PRIdLEAST64 "lld"
+
+#define PRIdFAST8   "d"
+#define PRIdFAST16  "d"
+#define PRIdFAST32  "d"
+#define PRIdFAST64  "lld"
+
+#define PRIdMAX     "lld"
+#define PRIdPTR     "d"
+
+#define PRIi8       "i"
+#define PRIi16      "i"
+#define PRIi32      "i"
+#define PRIi64      "lli"
+
+#define PRIiLEAST8  "i"
+#define PRIiLEAST16 "i"
+#define PRIiLEAST32 "i"
+#define PRIiLEAST64 "lli"
+
+#define PRIiFAST8   "i"
+#define PRIiFAST16  "i"
+#define PRIiFAST32  "i"
+#define PRIiFAST64  "lli"
+
+#define PRIiMAX     "lli"
+#define PRIiPTR     "i"
+
+#define PRIo8       "o"
+#define PRIo16      "o"
+#define PRIo32      "o"
+#define PRIo64      "llo"
+
+#define PRIoLEAST8  "o"
+#define PRIoLEAST16 "o"
+#define PRIoLEAST32 "o"
+#define PRIoLEAST64 "llo"
+
+#define PRIoFAST8   "o"
+#define PRIoFAST16  "o"
+#define PRIoFAST32  "o"
+#define PRIoFAST64  "llo"
+
+#define PRIoMAX     "llo"
+#define PRIoPTR     "o"
+
+#define PRIu8       "u"
+#define PRIu16      "u"
+#define PRIu32      "u"
+#define PRIu64      "llu"
+
+#define PRIuLEAST8  "u"
+#define PRIuLEAST16 "u"
+#define PRIuLEAST32 "u"
+#define PRIuLEAST64 "llu"
+
+#define PRIuFAST8   "u"
+#define PRIuFAST16  "u"
+#define PRIuFAST32  "u"
+#define PRIuFAST64  "llu"
+
+#define PRIuMAX     "llu"
+#define PRIuPTR     "u"
+
+#define PRIx8       "x"
+#define PRIx16      "x"
+#define PRIx32      "x"
+#define PRIx64      "llx"
+
+#define PRIxLEAST8  "x"
+#define PRIxLEAST16 "x"
+#define PRIxLEAST32 "x"
+#define PRIxLEAST64 "llx"
+
+#define PRIxFAST8   "x"
+#define PRIxFAST16  "x"
+#define PRIxFAST32  "x"
+#define PRIxFAST64  "llx"
+
+#define PRIxMAX     "llx"
+#define PRIxPTR     "x"
+
+#define PRIX8       "X"
+#define PRIX16      "X"
+#define PRIX32      "X"
+#define PRIX64      "llX"
+
+#define PRIXLEAST8  "X"
+#define PRIXLEAST16 "X"
+#define PRIXLEAST32 "X"
+#define PRIXLEAST64 "llX"
+
+#define PRIXFAST8   "X"
+#define PRIXFAST16  "X"
+#define PRIXFAST32  "X"
+#define PRIXFAST64  "llX"
+
+#define PRIXMAX     "llX"
+#define PRIXPTR     "X"
+
+#define SCNd8       "hhd"
+#define SCNd16      "hd"
+#define SCNd32      "d"
+#define SCNd64      "lld"
+
+#define SCNdLEAST8  "hhd"
+#define SCNdLEAST16 "hd"
+#define SCNdLEAST32 "d"
+#define SCNdLEAST64 "lld"
+
+#define SCNdFAST8   "hhd"
+#define SCNdFAST16  "hd"
+#define SCNdFAST32  "d"
+#define SCNdFAST64  "lld"
+
+#define SCNdMAX     "lld"
+#define SCNdPTR     "d"
+
+#define SCNi8       "hhi"
+#define SCNi16      "hi"
+#define SCNi32      "i"
+#define SCNi64      "lli"
+
+#define SCNiLEAST8  "hhi"
+#define SCNiLEAST16 "hi"
+#define SCNiLEAST32 "i"
+#define SCNiLEAST64 "lli"
+
+#define SCNiFAST8   "hhi"
+#define SCNiFAST16  "hi"
+#define SCNiFAST32  "i"
+#define SCNiFAST64  "lli"
+
+#define SCNiMAX     "lli"
+#define SCNiPTR     "i"
+
+#define SCNo8       "hho"
+#define SCNo16      "ho"
+#define SCNo32      "o"
+#define SCNo64      "llo"
+
+#define SCNoLEAST8  "hho"
+#define SCNoLEAST16 "ho"
+#define SCNoLEAST32 "o"
+#define SCNoLEAST64 "llo"
+
+#define SCNoFAST8   "hho"
+#define SCNoFAST16  "ho"
+#define SCNoFAST32  "o"
+#define SCNoFAST64  "llo"
+
+#define SCNoMAX     "llo"
+#define SCNoPTR     "o"
+
+#define SCNu8       "hhu"
+#define SCNu16      "hu"
+#define SCNu32      "u"
+#define SCNu64      "llu"
+
+#define SCNuLEAST8  "hhu"
+#define SCNuLEAST16 "hu"
+#define SCNuLEAST32 "u"
+#define SCNuLEAST64 "llu"
+
+#define SCNuFAST8   "hhu"
+#define SCNuFAST16  "hu"
+#define SCNuFAST32  "u"
+#define SCNuFAST64  "llu"
+
+#define SCNuMAX     "llu"
+#define SCNuPTR     "u"
+
+#define SCNx8       "hhx"
+#define SCNx16      "hx"
+#define SCNx32      "x"
+#define SCNx64      "llx"
+
+#define SCNxLEAST8  "hhx"
+#define SCNxLEAST16 "hx"
+#define SCNxLEAST32 "x"
+#define SCNxLEAST64 "llx"
+
+#define SCNxFAST8   "hhx"
+#define SCNxFAST16  "hx"
+#define SCNxFAST32  "x"
+#define SCNxFAST64  "llx"
+
+#define SCNxMAX     "llx"
+#define SCNxPTR     "x"
+
+#endif /* __ARCH_X86_INCLUDE_I486_INTTYPES_H */
diff --git a/arch/x86/include/i486/io.h b/arch/x86/include/i486/io.h
index 56471b5ab5451642fd323eb24e1a3e8ecb1ed7ac..a6f455b79c35b3fe055a2f3615ec07805760b083 100644
--- a/arch/x86/include/i486/io.h
+++ b/arch/x86/include/i486/io.h
@@ -1,6 +1,5 @@
 /****************************************************************************
  * arch/x86/include/i486/io.h
- * arch/chip/io.h
  *
  *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/x86/include/inttypes.h b/arch/x86/include/inttypes.h
new file mode 100644
index 0000000000000000000000000000000000000000..1ee4484b14821783e37bc78eace802547f959786
--- /dev/null
+++ b/arch/x86/include/inttypes.h
@@ -0,0 +1,51 @@
+/****************************************************************************
+ * arch/x86/include/inttypes.h
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_X86_INCLUDE_INTTYPES_H
+#define __ARCH_X86_INCLUDE_INTTYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_I486
+#  include 
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#endif /* __ARCH_X86_INCLUDE_INTTYPES_H */
diff --git a/arch/x86/src/Makefile b/arch/x86/src/Makefile
index 16fbc8206c13f78b82ead46a736925a4094ac28d..a2d07ac0359aab968ed6f5e0879f4ff9dfb82c74 100644
--- a/arch/x86/src/Makefile
+++ b/arch/x86/src/Makefile
@@ -148,10 +148,10 @@ board/libboard$(LIBEXT):
 
 nuttx$(EXEEXT): $(HEAD_OBJ) board/libboard$(LIBEXT)
 	@echo "LD: nuttx$(EXEEXT)"
-	$(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(NUTTX)$(EXEEXT) $(HEAD_OBJ) $(EXTRA_OBJS) \
+	$(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(NUTTX) $(HEAD_OBJ) $(EXTRA_OBJS) \
 		$(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) $(LDENDGROUP)
 ifneq ($(CONFIG_WINDOWS_NATIVE),y)
-	$(Q) $(NM) $(NUTTX)$(EXEEXT) | \
+	$(Q) $(NM) $(NUTTX) | \
 	grep -v '\(compiled\)\|\(\$(OBJEXT)$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
 	sort > $(TOPDIR)/System.map
 endif
diff --git a/arch/x86/src/common/up_assert.c b/arch/x86/src/common/up_assert.c
index 32eb751c56d3c2b7c5fde27086101f97e1b10dc8..7afec4e4bec97bc679ea3a7346cc5e06d413f66e 100644
--- a/arch/x86/src/common/up_assert.c
+++ b/arch/x86/src/common/up_assert.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/x86/src/common/up_assert.c
  *
- *   Copyright (C) 2011-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 #include 
@@ -76,19 +65,6 @@
 #  undef CONFIG_ARCH_USBDUMP
 #endif
 
-/* The following is just intended to keep some ugliness out of the mainline
- * code.  We are going to print the task name if:
- *
- *  CONFIG_TASK_NAME_SIZE > 0 &&    <-- The task has a name
- *  (defined(CONFIG_DEBUG)    ||    <-- And the debug is enabled (lldbg used)
- *   defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
- */
-
-#undef CONFIG_PRINT_TASKNAME
-#if CONFIG_TASK_NAME_SIZE > 0 && (defined(CONFIG_DEBUG) || defined(CONFIG_ARCH_STACKDUMP))
-#  define CONFIG_PRINT_TASKNAME 1
-#endif
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -105,9 +81,9 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
   for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
     {
       uint32_t *ptr = (uint32_t*)stack;
-      lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-             stack, ptr[0], ptr[1], ptr[2], ptr[3],
-             ptr[4], ptr[5], ptr[6], ptr[7]);
+      _alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+            stack, ptr[0], ptr[1], ptr[2], ptr[3],
+            ptr[4], ptr[5], ptr[6], ptr[7]);
     }
 }
 #else
@@ -127,7 +103,7 @@ static int usbtrace_syslog(FAR const char *fmt, ...)
   /* Let vsyslog do the real work */
 
   va_start(ap, fmt);
-  ret = lowvsyslog(LOG_INFO, fmt, ap);
+  ret = vsyslog(LOG_EMERG, fmt, ap);
   va_end(ap);
   return ret;
 }
@@ -176,10 +152,10 @@ static void up_dumpstate(void)
 
   /* Show interrupt stack info */
 
-  lldbg("sp:     %08x\n", sp);
-  lldbg("IRQ stack:\n");
-  lldbg("  base: %08x\n", istackbase);
-  lldbg("  size: %08x\n", istacksize);
+  _alert("sp:     %08x\n", sp);
+  _alert("IRQ stack:\n");
+  _alert("  base: %08x\n", istackbase);
+  _alert("  size: %08x\n", istacksize);
 
   /* Does the current stack pointer lie within the interrupt
    * stack?
@@ -196,18 +172,18 @@ static void up_dumpstate(void)
        */
 
       sp = g_intstackbase;
-      lldbg("sp:     %08x\n", sp);
+      _alert("sp:     %08x\n", sp);
     }
 
   /* Show user stack info */
 
-  lldbg("User stack:\n");
-  lldbg("  base: %08x\n", ustackbase);
-  lldbg("  size: %08x\n", ustacksize);
+  _alert("User stack:\n");
+  _alert("  base: %08x\n", ustackbase);
+  _alert("  size: %08x\n", ustacksize);
 #else
-  lldbg("sp:         %08x\n", sp);
-  lldbg("stack base: %08x\n", ustackbase);
-  lldbg("stack size: %08x\n", ustacksize);
+  _alert("sp:         %08x\n", sp);
+  _alert("stack base: %08x\n", ustackbase);
+  _alert("stack size: %08x\n", ustacksize);
 #endif
 
   /* Dump the user stack if the stack pointer lies within the allocated user
@@ -217,7 +193,7 @@ static void up_dumpstate(void)
   if (sp > ustackbase || sp <= ustackbase - ustacksize)
     {
 #if !defined(CONFIG_ARCH_INTERRUPTSTACK) || CONFIG_ARCH_INTERRUPTSTACK < 4
-      lldbg("ERROR: Stack pointer is not within allocated stack\n");
+      _alert("ERROR: Stack pointer is not within allocated stack\n");
 #endif
     }
   else
@@ -280,17 +256,17 @@ static void _up_assert(int errorcode)
 
 void up_assert(const uint8_t *filename, int lineno)
 {
-#ifdef CONFIG_PRINT_TASKNAME
+#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
   struct tcb_s *rtcb = this_task();
 #endif
 
   board_autoled_on(LED_ASSERTION);
 
-#ifdef CONFIG_PRINT_TASKNAME
-  lldbg("Assertion failed at file:%s line: %d task: %s\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+  _alert("Assertion failed at file:%s line: %d task: %s\n",
         filename, lineno, rtcb->name);
 #else
-  lldbg("Assertion failed at file:%s line: %d\n",
+  _alert("Assertion failed at file:%s line: %d\n",
         filename, lineno);
 #endif
 
diff --git a/arch/x86/src/common/up_exit.c b/arch/x86/src/common/up_exit.c
index 12779df0248e0cb320e41a946c8331a32226384e..e5bcd30b465418eeda5a985f470390dfb2dff95e 100644
--- a/arch/x86/src/common/up_exit.c
+++ b/arch/x86/src/common/up_exit.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * common/up_exit.c
  *
- *   Copyright (C) 2011, 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2013-2014, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -41,10 +41,11 @@
 
 #include 
 #include 
-#include 
 
+#include 
+#include 
 #ifdef CONFIG_DUMP_ON_EXIT
-#include 
+#  include 
 #endif
 
 #include "task/task.h"
@@ -56,9 +57,9 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
+#ifndef CONFIG_DEBUG_SCHED_INFO
+#  undef CONFIG_DUMP_ON_EXIT
+#endif
 
 /****************************************************************************
  * Private Functions
@@ -74,7 +75,7 @@
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_DUMP_ON_EXIT
 static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
 {
 #if CONFIG_NFILE_DESCRIPTORS > 0
@@ -85,8 +86,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
   int i;
 #endif
 
-  sdbg("  TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
-  sdbg("    priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
+  sinfo("  TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
+  sinfo("    priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
 
 #if CONFIG_NFILE_DESCRIPTORS > 0
   filelist = tcb->group->tg_filelist;
@@ -95,8 +96,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
       struct inode *inode = filelist->fl_files[i].f_inode;
       if (inode)
         {
-          sdbg("      fd=%d refcount=%d\n",
-               i, inode->i_crefs);
+          sinfo("      fd=%d refcount=%d\n",
+                i, inode->i_crefs);
         }
     }
 #endif
@@ -108,13 +109,18 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
       struct file_struct *filep = &streamlist->sl_streams[i];
       if (filep->fs_fd >= 0)
         {
-#if CONFIG_STDIO_BUFFER_SIZE > 0
-          sdbg("      fd=%d nbytes=%d\n",
-               filep->fs_fd,
-               filep->fs_bufpos - filep->fs_bufstart);
-#else
-          sdbg("      fd=%d\n", filep->fs_fd);
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
+          if (filep->fs_bufstart != NULL)
+            {
+              sinfo("      fd=%d nbytes=%d\n",
+                    filep->fs_fd,
+                    filep->fs_bufpos - filep->fs_bufstart);
+            }
+          else
 #endif
+            {
+              sinfo("      fd=%d\n", filep->fs_fd);
+            }
         }
     }
 #endif
@@ -140,16 +146,16 @@ void _exit(int status)
 {
   struct tcb_s* tcb;
 
-  /* Disable interrupts.  They will be restored when the next
-   * task is started.
+  /* Make sure that we are in a critical section with local interrupts.
+   * The IRQ state will be restored when the next task is started.
    */
 
-  (void)up_irq_save();
+  (void)enter_critical_section();
 
-  slldbg("TCB=%p exiting\n", this_task());
+  sinfo("TCB=%p exiting\n", this_task());
 
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
-  slldbg("Other tasks:\n");
+#ifdef CONFIG_DUMP_ON_EXIT
+  sinfo("Other tasks:\n");
   sched_foreach(_up_dumponexit, NULL);
 #endif
 
diff --git a/arch/x86/src/common/up_initialize.c b/arch/x86/src/common/up_initialize.c
index 07697ea078cb4557d8debe047cd5859445b1ad30..281720473408101c0db3ba007bac38b0cd17bb6e 100644
--- a/arch/x86/src/common/up_initialize.c
+++ b/arch/x86/src/common/up_initialize.c
@@ -44,13 +44,16 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
+#include 
+#include 
+#include 
 
 #include 
 
@@ -71,18 +74,18 @@
  *
  ****************************************************************************/
 
-#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG_FEATURES)
 static void up_calibratedelay(void)
 {
   int i;
 
-  lldbg("Beginning 100s delay\n");
+  _warn("Beginning 100s delay\n");
   for (i = 0; i < 100; i++)
     {
       up_mdelay(1000);
     }
 
-  lldbg("End 100s delay\n");
+  _warn("End 100s delay\n");
 }
 #else
 # define up_calibratedelay()
@@ -127,11 +130,21 @@ void up_initialize(void)
 
   up_irqinitialize();
 
+#ifdef CONFIG_PM
+  /* Initialize the power management subsystem.  This MCU-specific function
+   * must be called *very* early in the initialization sequence *before* any
+   * other device drivers are initialized (since they may attempt to register
+   * with the power management subsystem).
+   */
+
+  up_pminitialize();
+#endif
+
+#ifdef CONFIG_ARCH_DMA
   /* Initialize the DMA subsystem if the weak function up_dmainitialize has been
    * brought into the build
    */
 
-#ifdef CONFIG_ARCH_DMA
 #ifdef CONFIG_HAVE_WEAKFUNCTIONS
   if (up_dmainitialize)
 #endif
@@ -143,7 +156,7 @@ void up_initialize(void)
   /* Initialize the system timer interrupt */
 
 #if !defined(CONFIG_SUPPRESS_INTERRUPTS) && !defined(CONFIG_SUPPRESS_TIMER_INTS)
-  up_timer_initialize();
+  x86_timer_initialize();
 #endif
 
   /* Register devices */
@@ -154,6 +167,14 @@ void up_initialize(void)
   devnull_register();   /* Standard /dev/null */
 #endif
 
+#if defined(CONFIG_DEV_RANDOM)
+  devrandom_register(); /* Standard /dev/random */
+#endif
+
+#if defined(CONFIG_DEV_URANDOM)
+  devurandom_register();   /* Standard /dev/urandom */
+#endif
+
 #if defined(CONFIG_DEV_ZERO)
   devzero_register();   /* Standard /dev/zero */
 #endif
@@ -180,19 +201,33 @@ void up_initialize(void)
 
 #if defined(CONFIG_DEV_LOWCONSOLE)
   lowconsole_init();
-#elif defined(CONFIG_SYSLOG_CONSOLE)
+#elif defined(CONFIG_CONSOLE_SYSLOG)
   syslog_console_init();
 #elif defined(CONFIG_RAMLOG_CONSOLE)
   ramlog_consoleinit();
 #endif
 
-  /* Initialize the system logging device */
+#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_PSEUDOTERM_SUSV1)
+  /* Register the master pseudo-terminal multiplexor device */
+
+  (void)ptmx_register();
+#endif
+
+  /* Early initialization of the system logging device.  Some SYSLOG channel
+   * can be initialized early in the initialization sequence because they
+   * depend on only minimal OS initialization.
+   */
+
+  syslog_initialize(SYSLOG_INIT_EARLY);
 
-#ifdef CONFIG_SYSLOG_CHAR
-  syslog_initialize();
+#if defined(CONFIG_CRYPTO)
+  /* Initialize the HW crypto and /dev/crypto */
+
+  up_cryptoinitialize();
 #endif
-#ifdef CONFIG_RAMLOG_SYSLOG
-  ramlog_sysloginit();
+
+#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_CRYPTO_CRYPTODEV)
+  devcrypto_register();
 #endif
 
 #ifndef CONFIG_NETDEV_LATEINIT
diff --git a/arch/x86/src/common/up_internal.h b/arch/x86/src/common/up_internal.h
index d0eb1570c36c35b4f191c58ed40be34e40919836..4d1c4bfe3d88eb4bdc8799136b021fe741582698 100644
--- a/arch/x86/src/common/up_internal.h
+++ b/arch/x86/src/common/up_internal.h
@@ -62,6 +62,10 @@
 #undef  CONFIG_SUPPRESS_UART_CONFIG   /* DEFINED: Do not reconfig UART */
 #undef  CONFIG_DUMP_ON_EXIT           /* DEFINED: Dump task state on exit */
 
+#ifndef CONFIG_DEBUG_SCHED_INFO
+#  undef CONFIG_DUMP_ON_EXIT          /* Needs CONFIG_DEBUG_SCHED_INFO */
+#endif
+
 /* Determine which (if any) console driver to use.  If a console is enabled
  * and no other console device is specified, then a serial console is
  * assumed.
@@ -96,13 +100,6 @@
 #  define USE_SERIALDRIVER 1
 #endif
 
-/* Determine which device to use as the system logging device */
-
-#ifndef CONFIG_SYSLOG
-#  undef CONFIG_SYSLOG_CHAR
-#  undef CONFIG_RAMLOG_SYSLOG
-#endif
-
 /* Check if an interrupt stack size is configured */
 
 #ifndef CONFIG_ARCH_INTERRUPTSTACK
@@ -218,7 +215,7 @@ void up_addregion(void);
 # define up_addregion()
 #endif
 
-/* Defined in up_serial.c */
+/* Defined in xyz_serial.c */
 
 #if CONFIG_NFILE_DESCRIPTORS > 0
 void up_earlyserialinit(void);
@@ -236,13 +233,13 @@ void lowconsole_init(void);
 # define lowconsole_init()
 #endif
 
-/* Defined in up_watchdog.c */
+/* Defined in xyz_watchdog.c */
 
 void up_wdtinit(void);
 
-/* Defined in up_timerisr.c */
+/* Defined in xyz_timerisr.c */
 
-void up_timer_initialize(void);
+void x86_timer_initialize(void);
 
 /* Defined in board/up_network.c */
 
diff --git a/arch/x86/src/common/up_releasepending.c b/arch/x86/src/common/up_releasepending.c
index 76137604bb4e0dec729dbb6193b03d4744e276c3..b0e8890db3ae063e4e68983bcf5d22a63a5417f9 100644
--- a/arch/x86/src/common/up_releasepending.c
+++ b/arch/x86/src/common/up_releasepending.c
@@ -67,7 +67,7 @@ void up_release_pending(void)
 {
   struct tcb_s *rtcb = this_task();
 
-  slldbg("From TCB=%p\n", rtcb);
+  sinfo("From TCB=%p\n", rtcb);
 
   /* Merge the g_pendingtasks list into the ready-to-run task list */
 
diff --git a/arch/x86/src/common/up_reprioritizertr.c b/arch/x86/src/common/up_reprioritizertr.c
index 398199261dea8bbf774ac9f168cd87a7dd996160..110d26a6717924603532138d56d5843e410b851b 100644
--- a/arch/x86/src/common/up_reprioritizertr.c
+++ b/arch/x86/src/common/up_reprioritizertr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  *  arch/arm/src/arm/up_reprioritizertr.c
  *
- *   Copyright (C) 2011, 2013-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2013-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
       struct tcb_s *rtcb = this_task();
       bool switch_needed;
 
-      slldbg("TCB=%p PRI=%d\n", tcb, priority);
+      sinfo("TCB=%p PRI=%d\n", tcb, priority);
 
       /* Remove the tcb task from the ready-to-run list.
        * sched_removereadytorun will return true if we just
diff --git a/arch/x86/src/i486/up_createstack.c b/arch/x86/src/i486/up_createstack.c
index 1d9b1008d09d1a4c67c3142616d1c5766e3f408a..f51d6f2ca2b29e9c31d47b29cd7d79c769e79755 100644
--- a/arch/x86/src/i486/up_createstack.c
+++ b/arch/x86/src/i486/up_createstack.c
@@ -139,12 +139,12 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
           tcb->stack_alloc_ptr = (uint32_t *)kumm_malloc(stack_size);
         }
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       /* Was the allocation successful? */
 
       if (!tcb->stack_alloc_ptr)
         {
-          sdbg("ERROR: Failed to allocate stack, size %d\n", stack_size);
+          serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
         }
 #endif
     }
diff --git a/arch/x86/src/i486/up_regdump.c b/arch/x86/src/i486/up_regdump.c
index 4cc2d8cb3657bcebef7297b1a6999938f6846706..d28ec481edaed9268a1846c944a798ccd453678e 100644
--- a/arch/x86/src/i486/up_regdump.c
+++ b/arch/x86/src/i486/up_regdump.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/x86/src/i486/up_regdump.c
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,46 +39,28 @@
 
 #include 
 
-/* Output debug info -- even if debug is not selected. */
-
-#undef  CONFIG_DEBUG
-#undef  CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
 #include 
 #include 
 
 #include "up_internal.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
+
 /****************************************************************************
  * Name: up_registerdump
  ****************************************************************************/
 
 void up_registerdump(uint32_t *regs)
 {
-  lldbg(" ds:%08x irq:%08x err:%08x\n",
+  _alert(" ds:%08x irq:%08x err:%08x\n",
         regs[REG_DS], regs[REG_IRQNO], regs[REG_ERRCODE]);
-  lldbg("edi:%08x esi:%08x ebp:%08x esp:%08x\n",
+  _alert("edi:%08x esi:%08x ebp:%08x esp:%08x\n",
         regs[REG_EDI], regs[REG_ESI], regs[REG_EBP], regs[REG_ESP]);
-  lldbg("ebx:%08x edx:%08x ecx:%08x eax:%08x\n",
+  _alert("ebx:%08x edx:%08x ecx:%08x eax:%08x\n",
         regs[REG_EBX], regs[REG_EDX], regs[REG_ECX], regs[REG_EAX]);
-  lldbg("eip:%08x  cs:%08x flg:%08x  sp:%08x ss:%08x\n",
+  _alert("eip:%08x  cs:%08x flg:%08x  sp:%08x ss:%08x\n",
         regs[REG_EIP], regs[REG_CS], regs[REG_EFLAGS], regs[REG_SP],
         regs[REG_SS]);
 }
diff --git a/arch/x86/src/i486/up_schedulesigaction.c b/arch/x86/src/i486/up_schedulesigaction.c
index 60604e8827fa4fc733a8f7583d681c48b4d1b0e1..5faf6d1ebd558c58c2ec8c1bf971c1893786c2f8 100644
--- a/arch/x86/src/i486/up_schedulesigaction.c
+++ b/arch/x86/src/i486/up_schedulesigaction.c
@@ -101,7 +101,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
 {
   irqstate_t flags;
 
-  sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+  sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
 
   /* Make sure that interrupts are disabled */
 
@@ -115,7 +115,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
        * to the currently executing task.
        */
 
-      sdbg("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
+      sinfo("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
 
       if (tcb == this_task())
         {
diff --git a/arch/x86/src/i486/up_sigdeliver.c b/arch/x86/src/i486/up_sigdeliver.c
index e807c3d6161c7f184248e5df7e8af8303bdf1cff..b6ec9a09d5c0ceac46478be8b132fb34cb245514 100644
--- a/arch/x86/src/i486/up_sigdeliver.c
+++ b/arch/x86/src/i486/up_sigdeliver.c
@@ -95,7 +95,7 @@ void up_sigdeliver(void)
 
   board_autoled_on(LED_SIGNAL);
 
-  sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
         rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
   ASSERT(rtcb->xcp.sigdeliver != NULL);
 
@@ -126,7 +126,7 @@ void up_sigdeliver(void)
    * errno that is needed by the user logic (it is probably EINTR).
    */
 
-  sdbg("Resuming\n");
+  sinfo("Resuming\n");
   (void)up_irq_save();
   rtcb->pterrno = saved_errno;
 
diff --git a/arch/x86/src/qemu/Kconfig b/arch/x86/src/qemu/Kconfig
index d4bd2e071ba9492d2e3c8f5e60f7f693444f9ada..79cd889fbfcbc4ecc5c4516843690b4aed8c23f0 100644
--- a/arch/x86/src/qemu/Kconfig
+++ b/arch/x86/src/qemu/Kconfig
@@ -25,4 +25,11 @@ config QEMU_VGA
 		graphics subsystem.  Such a conversion to the standard NuttX
 		framebuffer interface would, however, not be a big job.
 
+config QEMU_GPIOIRQ
+	bool "GPIO interrupt support"
+	default n
+	depends on EXPERIMENTAL
+	---help---
+		Enable support for GPIO interrupts (not implemented)
+
 endif
diff --git a/arch/x86/src/qemu/qemu.h b/arch/x86/src/qemu/qemu.h
index 6148180aa9d70f4efb08e21db1c30edf61d21c7f..a42fd0a32856a009ce3ba0dc6b77a82859983adf 100644
--- a/arch/x86/src/qemu/qemu.h
+++ b/arch/x86/src/qemu/qemu.h
@@ -115,7 +115,7 @@ void i486_lowsetup(void);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_QEMU_GPIOIRQ
 void i486_gpioirqinitialize(void);
 #else
 #  define i486_gpioirqinitialize()
@@ -159,7 +159,7 @@ bool i486_gpioread(uint16_t pinset);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_QEMU_GPIOIRQ
 void i486_gpioirqenable(int irq);
 #else
 #  define i486_gpioirqenable(irq)
@@ -173,7 +173,7 @@ void i486_gpioirqenable(int irq);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_QEMU_GPIOIRQ
 void i486_gpioirqdisable(int irq);
 #else
 #  define i486_gpioirqdisable(irq)
@@ -187,7 +187,7 @@ void i486_gpioirqdisable(int irq);
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_GPIO
+#ifdef CONFIG_DEBUG_GPIO_INFO
 int i486_dumpgpio(uint16_t pinset, const char *msg);
 #else
 #  define i486_dumpgpio(p,m)
diff --git a/arch/x86/src/qemu/qemu_fullcontextrestore.S b/arch/x86/src/qemu/qemu_fullcontextrestore.S
index 97a208ad89332f0b094f36f59c600efa7559c6ec..bc55160e3a98f6806b977083f7155e6be7126b9e 100644
--- a/arch/x86/src/qemu/qemu_fullcontextrestore.S
+++ b/arch/x86/src/qemu/qemu_fullcontextrestore.S
@@ -58,7 +58,7 @@
 /* Trace macros, use like trace 'i' to print char to serial port. */
 
 	.macro	chout, addr, ch
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 	mov		$\addr, %dx
 	mov		$\ch, %al
 	out		%al, %dx
@@ -66,7 +66,7 @@
 	.endm
 
 	.macro	trace, ch
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 	push	%eax
 	push	%edx
 	chout	0x3f8, \ch
diff --git a/arch/x86/src/qemu/qemu_head.S b/arch/x86/src/qemu/qemu_head.S
index 82b8d37a8d704089cbb4e6b1dbce0b730538938f..2b205208b3e3af22ae9a47d53a97b21a6f91db0e 100644
--- a/arch/x86/src/qemu/qemu_head.S
+++ b/arch/x86/src/qemu/qemu_head.S
@@ -64,7 +64,7 @@
 /* Trace macros, use like trace 'i' to print char to serial port. */
 
 	.macro	trace, ch
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 	mov		$0x3f8, %dx
 	mov		$\ch, %al
 	out		%al, %dx
diff --git a/arch/x86/src/qemu/qemu_saveusercontext.S b/arch/x86/src/qemu/qemu_saveusercontext.S
index 5b4b78647bc2b2de901b6fa961578be2b12a6e68..0620bbf6582cc383756aaa01c0d70cfa2ff25d47 100644
--- a/arch/x86/src/qemu/qemu_saveusercontext.S
+++ b/arch/x86/src/qemu/qemu_saveusercontext.S
@@ -54,7 +54,7 @@
 /* Trace macros, use like trace 'i' to print char to serial port. */
 
 	.macro	chout, addr, ch
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 	mov		$\addr, %dx
 	mov		$\ch, %al
 	out		%al, %dx
@@ -62,7 +62,7 @@
 	.endm
 
 	.macro	trace, ch
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 	push	%eax
 	push	%edx
 	chout	0x3f8, \ch
diff --git a/arch/x86/src/qemu/qemu_timerisr.c b/arch/x86/src/qemu/qemu_timerisr.c
index adf844d24ca010c00ce0f8424b8825fb80ea2d96..56d5e42a657a57265017363f579990907d3477de 100644
--- a/arch/x86/src/qemu/qemu_timerisr.c
+++ b/arch/x86/src/qemu/qemu_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/x86/src/qemu/qemu_timerisr.c
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  *   Based on Bran's kernel development tutorials. Rewritten for JamesM's
@@ -80,20 +80,12 @@
 
 #define PIT_DIVISOR  ((uint32_t)PIT_CLOCK/(uint32_t)CLK_TCK)
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Function:  up_timerisr
+ * Function: qemu_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -101,12 +93,12 @@
  *
  ****************************************************************************/
 
-static int up_timerisr(int irq, uint32_t *regs)
+static int qemu_timerisr(int irq, uint32_t *regs, void *arg)
 {
-   /* Process timer interrupt */
+  /* Process timer interrupt */
 
-   sched_process_timer();
-   return 0;
+  sched_process_timer();
+  return 0;
 }
 
 /****************************************************************************
@@ -114,7 +106,7 @@ static int up_timerisr(int irq, uint32_t *regs)
  ****************************************************************************/
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Function:  x86_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -122,7 +114,7 @@ static int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void x86_timer_initialize(void)
 {
   /* uint32_t to avoid compile time overflow errors */
 
@@ -131,7 +123,7 @@ void up_timer_initialize(void)
 
   /* Attach to the timer interrupt handler */
 
-  (void)irq_attach(IRQ0, (xcpt_t)up_timerisr);
+  (void)irq_attach(IRQ0, (xcpt_t)qemu_timerisr, NULL);
 
   /* Send the command byte to configure counter 0 */
 
diff --git a/arch/x86/src/qemu/qemu_vga.c b/arch/x86/src/qemu/qemu_vga.c
index ec56c8aaa8781e12e328172f4a556c9199ee1384..151333933207087d0f941465338f757958c862fa 100644
--- a/arch/x86/src/qemu/qemu_vga.c
+++ b/arch/x86/src/qemu/qemu_vga.c
@@ -498,7 +498,7 @@ FAR struct lcd_dev_s *qemu_vga_initialize(void)
   int ret = init_graph_vga(VGA_XRES, VGA_YRES, 1);
   if (ret < 0)
     {
-      gdbg("ERROR: init_graph_vga returned %d\n",ret);
+      gerr("ERROR: init_graph_vga returned %d\n",ret);
     }
 
   memset(g_pscreen, 0, VGA_XRES * VGA_YRES);
@@ -510,7 +510,7 @@ void qemu_vga(void)
   int ret = init_graph_vga(VGA_XRES, VGA_YRES, 1);
   if (ret < 0)
     {
-      gdbg("ERROR: init_graph_vga returned %d\n",ret);
+      gerr("ERROR: init_graph_vga returned %d\n",ret);
     }
 
   memset(g_pscreen, g_bg_color, VGA_XRES * VGA_YRES);
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..b00d8f0d235a1fafe6bc6bf06ebf1f1effd00b02
--- /dev/null
+++ b/arch/xtensa/Kconfig
@@ -0,0 +1,85 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_XTENSA
+
+choice
+	prompt "XTENSA architecture selection"
+	default ARCH_CHIP_ESP32
+
+config ARCH_CHIP_ESP32
+	bool "Expressif ESP32"
+	select ARCH_FAMILY_LX6
+	select XTENSA_HAVE_INTERRUPTS
+	select ARCH_HAVE_MULTICPU
+	---help---
+		The ESP32 is a dual-core system from Expressif with two Harvard
+		architecture Xtensa LX6 CPUs. All embedded memory, external memory
+		and peripherals are located on the data bus and/or the instruction
+		bus of these CPUs. With some minor exceptions, the address mapping
+		of two CPUs is symmetric, meaning they use the same addresses to
+		access the same memory.
+
+		The two CPUs are named "PRO_CPU" and "APP_CPU" (for "protocol" and
+		"application"), however for most purposes the two CPUs are
+		interchangeable.
+
+endchoice # XTENSA chip selection
+
+config ARCH_FAMILY_LX6
+	bool
+	default n
+	---help---
+		Cadence® Tensilica® Xtensa® LX6 data plane processing unit (DPU).
+		The LX6 is a configurable and extensible processor core.
+
+config ARCH_CHIP
+	string
+	default "esp32"		if ARCH_CHIP_ESP32
+
+config XTENSA_CP_LAZY
+	bool "Lazy co-processor state restoration"
+	default n
+	depends on EXPERIMENTAL
+	---help---
+		NuttX logic saves and restores the co-processor enabled (CPENABLE)
+		register on each context switch.  This has disadvantages in that (1)
+		co-processor context will be saved and restored even if the co-
+		processor was never used, and (2) tasks must explicitly enable and
+		disable co-processors.
+
+		An alternative, "lazy" co-processor state restore is enabled with 
+		this option.  That logic works like as follows:
+
+		a. CPENABLE is set to zero on each context switch, disabling all co-
+		   processors.
+		b. If/when the task attempts to use the disabled co-processor, an
+		   exception occurs
+		c. The co-processor exception handler re-enables the co-processor.
+
+config XTENSA_USE_OVLY
+	bool
+	default n
+	---help---
+		Enable code overlay support. This option is currently unsupported.
+
+config XTENSA_CP_INITSET
+	hex "Default co-processor enables"
+	default 0x0001
+	range 0 0xffff
+	depends on !XTENSA_CP_LAZY
+	---help---
+		Co-processors may be enabled on a thread by calling xtensa_coproc_enable()
+		and disabled by calling xtensa_coproc_disable().  Some co-processors
+		should be enabled on all threads by default.  That set of co-processors
+		is provided by CONFIG_XTENSA_CP_INITSET.  Each bit corresponds to one
+		coprocessor with the same bit layout as for the CPENABLE register.
+
+source arch/xtensa/src/lx6/Kconfig
+if ARCH_CHIP_ESP32
+source arch/xtensa/src/esp32/Kconfig
+endif
+
+endif # ARCH_XTENSA
diff --git a/arch/xtensa/include/.gitignore b/arch/xtensa/include/.gitignore
new file mode 100644
index 0000000000000000000000000000000000000000..e6460c4a67846d5801c3600ce961277e3644f647
--- /dev/null
+++ b/arch/xtensa/include/.gitignore
@@ -0,0 +1,3 @@
+/board
+/chip
+
diff --git a/arch/xtensa/include/arch.h b/arch/xtensa/include/arch.h
new file mode 100644
index 0000000000000000000000000000000000000000..760e52ff70956828946a20dbf5fe3dfe44388459
--- /dev/null
+++ b/arch/xtensa/include/arch.h
@@ -0,0 +1,82 @@
+/****************************************************************************
+ * arch/xtensa/include/arch.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/arch.h
+ */
+
+#ifndef __ARCH_XTENSA_INCLUDE_ARCH_H
+#define __ARCH_XTENSA_INCLUDE_ARCH_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ARCH_XTENSA_INCLUDE_ARCH_H */
diff --git a/arch/xtensa/include/esp32/chip.h b/arch/xtensa/include/esp32/chip.h
new file mode 100644
index 0000000000000000000000000000000000000000..e3cbc193c5fb5544a947780855d2c39cdd574cb4
--- /dev/null
+++ b/arch/xtensa/include/esp32/chip.h
@@ -0,0 +1,82 @@
+/****************************************************************************
+ * arch/xtensa/include/esp32/chip.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_INCLUDE_ESP32_CHIP_H
+#define __ARCH_XTENSA_INCLUDE_ESP32_CHIP_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Characterize each supported ESP32 part */
+
+#define ESP32_NSPI   4 /* SPI0-3 */
+#define ESP32_NUARTS 3 /* UART0-2 */
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Inline Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_XTENSA_INCLUDE_ESP32_CHIP_H */
diff --git a/arch/xtensa/include/esp32/core-isa.h b/arch/xtensa/include/esp32/core-isa.h
new file mode 100644
index 0000000000000000000000000000000000000000..1204a26b8d6b5c5d379f62171da9ed78cef001fb
--- /dev/null
+++ b/arch/xtensa/include/esp32/core-isa.h
@@ -0,0 +1,640 @@
+/****************************************************************************
+ * arch/xtensa/include/esp32/core-isa.h
+ * Xtensa processor CORE configuration
+ *
+ * Customer ID=11657; Build=0x5fe96; Copyright (c) 1999-2016 Tensilica Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_INCLUDE_ESP32_CORE_ISA_H
+#define __ARCH_XTENSA_INCLUDE_ESP32_CORE_ISA_H
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* Note:  Macros of the form XCHAL_HAVE_*** have a value of 1 if the option
+ * is configured, and a value of 0 otherwise.  These macros are always
+ * defined.
+ */
+
+/* ISA **********************************************************************/
+
+#define XCHAL_HAVE_BE                    0   /* big-endian byte ordering */
+#define XCHAL_HAVE_WINDOWED              1   /* windowed registers option */
+#define XCHAL_NUM_AREGS                  64  /* num of physical addr regs */
+#define XCHAL_NUM_AREGS_LOG2             6   /* log2(XCHAL_NUM_AREGS) */
+#define XCHAL_MAX_INSTRUCTION_SIZE       3   /* max instr bytes (3..8) */
+#define XCHAL_HAVE_DEBUG                 1   /* debug option */
+#define XCHAL_HAVE_DENSITY               1   /* 16-bit instructions */
+#define XCHAL_HAVE_LOOPS                 1   /* zero-overhead loops */
+#define XCHAL_LOOP_BUFFER_SIZE           256 /* zero-ov. loop instr buffer size */
+#define XCHAL_HAVE_NSA                   1   /* NSA/NSAU instructions */
+#define XCHAL_HAVE_MINMAX                1   /* MIN/MAX instructions */
+#define XCHAL_HAVE_SEXT                  1   /* SEXT instruction */
+#define XCHAL_HAVE_DEPBITS               0   /* DEPBITS instruction */
+#define XCHAL_HAVE_CLAMPS                1   /* CLAMPS instruction */
+#define XCHAL_HAVE_MUL16                 1   /* MUL16S/MUL16U instructions */
+#define XCHAL_HAVE_MUL32                 1   /* MULL instruction */
+#define XCHAL_HAVE_MUL32_HIGH            1   /* MULUH/MULSH instructions */
+#define XCHAL_HAVE_DIV32                 1   /* QUOS/QUOU/REMS/REMU instructions */
+#define XCHAL_HAVE_L32R                  1   /* L32R instruction */
+#define XCHAL_HAVE_ABSOLUTE_LITERALS     0   /* non-PC-rel (extended) L32R */
+#define XCHAL_HAVE_CONST16               0   /* CONST16 instruction */
+#define XCHAL_HAVE_ADDX                  1   /* ADDX#/SUBX# instructions */
+#define XCHAL_HAVE_WIDE_BRANCHES         0   /* B*.W18 or B*.W15 instr's */
+#define XCHAL_HAVE_PREDICTED_BRANCHES    0   /* B[EQ/EQZ/NE/NEZ]T instr's */
+#define XCHAL_HAVE_CALL4AND12            1   /* (obsolete option) */
+#define XCHAL_HAVE_ABS                   1   /* ABS instruction */
+/*#define XCHAL_HAVE_POPC                0*/ /* POPC instruction */
+/*#define XCHAL_HAVE_CRC                 0*/ /* CRC instruction */
+#define XCHAL_HAVE_RELEASE_SYNC          1   /* L32AI/S32RI instructions */
+#define XCHAL_HAVE_S32C1I                1   /* S32C1I instruction */
+#define XCHAL_HAVE_SPECULATION           0   /* speculation */
+#define XCHAL_HAVE_FULL_RESET            1   /* all regs/state reset */
+#define XCHAL_NUM_CONTEXTS               1   /* */
+#define XCHAL_NUM_MISC_REGS              4   /* num of scratch regs (0..4) */
+#define XCHAL_HAVE_TAP_MASTER            0   /* JTAG TAP control instr's */
+#define XCHAL_HAVE_PRID                  1   /* processor ID register */
+#define XCHAL_HAVE_EXTERN_REGS           1   /* WER/RER instructions */
+#define XCHAL_HAVE_MX                    0   /* MX core (Tensilica internal) */
+#define XCHAL_HAVE_MP_INTERRUPTS         0   /* interrupt distributor port */
+#define XCHAL_HAVE_MP_RUNSTALL           0   /* core RunStall control port */
+#define XCHAL_HAVE_PSO                   0   /* Power Shut-Off */
+#define XCHAL_HAVE_PSO_CDM               0   /* core/debug/mem pwr domains */
+#define XCHAL_HAVE_PSO_FULL_RETENTION    0   /* all regs preserved on PSO */
+#define XCHAL_HAVE_THREADPTR             1   /* THREADPTR register */
+#define XCHAL_HAVE_BOOLEANS              1   /* boolean registers */
+#define XCHAL_HAVE_CP                    1   /* CPENABLE reg (coprocessor) */
+#define XCHAL_CP_MAXCFG                  8   /* max allowed cp id plus one */
+#define XCHAL_HAVE_MAC16                 1   /* MAC16 package */
+
+#define XCHAL_HAVE_FUSION                0   /* Fusion*/
+#define XCHAL_HAVE_FUSION_FP             0   /* Fusion FP option */
+#define XCHAL_HAVE_FUSION_LOW_POWER      0   /* Fusion Low Power option */
+#define XCHAL_HAVE_FUSION_AES            0   /* Fusion BLE/Wifi AES-128 CCM option */
+#define XCHAL_HAVE_FUSION_CONVENC        0   /* Fusion Conv Encode option */
+#define XCHAL_HAVE_FUSION_LFSR_CRC       0   /* Fusion LFSR-CRC option */
+#define XCHAL_HAVE_FUSION_BITOPS         0   /* Fusion Bit Operations Support option */
+#define XCHAL_HAVE_FUSION_AVS            0   /* Fusion AVS option */
+#define XCHAL_HAVE_FUSION_16BIT_BASEBAND 0   /* Fusion 16-bit Baseband option */
+#define XCHAL_HAVE_FUSION_VITERBI        0   /* Fusion Viterbi option */
+#define XCHAL_HAVE_FUSION_SOFTDEMAP      0   /* Fusion Soft Bit Demap option */
+#define XCHAL_HAVE_HIFIPRO               0   /* HiFiPro Audio Engine pkg */
+#define XCHAL_HAVE_HIFI4                 0   /* HiFi4 Audio Engine pkg */
+#define XCHAL_HAVE_HIFI4_VFPU            0   /* HiFi4 Audio Engine VFPU option */
+#define XCHAL_HAVE_HIFI3                 0   /* HiFi3 Audio Engine pkg */
+#define XCHAL_HAVE_HIFI3_VFPU            0   /* HiFi3 Audio Engine VFPU option */
+#define XCHAL_HAVE_HIFI2                 0   /* HiFi2 Audio Engine pkg */
+#define XCHAL_HAVE_HIFI2EP               0   /* HiFi2EP */
+#define XCHAL_HAVE_HIFI_MINI             0
+
+#define XCHAL_HAVE_VECTORFPU2005         0   /* vector or user floating-point pkg */
+#define XCHAL_HAVE_USER_DPFPU            0   /* user DP floating-point pkg */
+#define XCHAL_HAVE_USER_SPFPU            0   /* user DP floating-point pkg */
+#define XCHAL_HAVE_FP                    1   /* single prec floating point */
+#define XCHAL_HAVE_FP_DIV                1   /* FP with DIV instructions */
+#define XCHAL_HAVE_FP_RECIP              1   /* FP with RECIP instructions */
+#define XCHAL_HAVE_FP_SQRT               1   /* FP with SQRT instructions */
+#define XCHAL_HAVE_FP_RSQRT              1   /* FP with RSQRT instructions */
+#define XCHAL_HAVE_DFP                   0   /* double precision FP pkg */
+#define XCHAL_HAVE_DFP_DIV               0   /* DFP with DIV instructions */
+#define XCHAL_HAVE_DFP_RECIP             0   /* DFP with RECIP instructions*/
+#define XCHAL_HAVE_DFP_SQRT              0   /* DFP with SQRT instructions */
+#define XCHAL_HAVE_DFP_RSQRT             0   /* DFP with RSQRT instructions*/
+#define XCHAL_HAVE_DFP_ACCEL             1   /* double precision FP acceleration pkg */
+#define XCHAL_HAVE_DFP_accel             XCHAL_HAVE_DFP_ACCEL /* for backward compatibility */
+
+#define XCHAL_HAVE_DFPU_SINGLE_ONLY      1   /* DFPU Coprocessor, single precision only */
+#define XCHAL_HAVE_DFPU_SINGLE_DOUBLE    0   /* DFPU Coprocessor, single and double precision */
+#define XCHAL_HAVE_VECTRA1               0   /* Vectra I  pkg */
+#define XCHAL_HAVE_VECTRALX              0   /* Vectra LX pkg */
+#define XCHAL_HAVE_PDX4                  0   /* PDX4 */
+#define XCHAL_HAVE_CONNXD2               0   /* ConnX D2 pkg */
+#define XCHAL_HAVE_CONNXD2_DUALLSFLIX    0   /* ConnX D2 & Dual LoadStore Flix */
+#define XCHAL_HAVE_BBE16                 0   /* ConnX BBE16 pkg */
+#define XCHAL_HAVE_BBE16_RSQRT           0   /* BBE16 & vector recip sqrt */
+#define XCHAL_HAVE_BBE16_VECDIV          0   /* BBE16 & vector divide */
+#define XCHAL_HAVE_BBE16_DESPREAD        0   /* BBE16 & despread */
+#define XCHAL_HAVE_BBENEP                0   /* ConnX BBENEP pkgs */
+#define XCHAL_HAVE_BSP3                  0   /* ConnX BSP3 pkg */
+#define XCHAL_HAVE_BSP3_TRANSPOSE        0   /* BSP3 & transpose32x32 */
+#define XCHAL_HAVE_SSP16                 0   /* ConnX SSP16 pkg */
+#define XCHAL_HAVE_SSP16_VITERBI         0   /* SSP16 & viterbi */
+#define XCHAL_HAVE_TURBO16               0   /* ConnX Turbo16 pkg */
+#define XCHAL_HAVE_BBP16                 0   /* ConnX BBP16 pkg */
+#define XCHAL_HAVE_FLIX3                 0   /* basic 3-way FLIX option */
+#define XCHAL_HAVE_GRIVPEP               0   /* GRIVPEP is General Release of IVPEP */
+#define XCHAL_HAVE_GRIVPEP_HISTOGRAM     0   /* Histogram option on GRIVPEP */
+
+/* Misc. ********************************************************************/
+
+#define XCHAL_NUM_LOADSTORE_UNITS        1    /* load/store units */
+#define XCHAL_NUM_WRITEBUFFER_ENTRIES    4    /* size of write buffer */
+#define XCHAL_INST_FETCH_WIDTH           4    /* instr-fetch width in bytes */
+#define XCHAL_DATA_WIDTH                 4    /* data width in bytes */
+#define XCHAL_DATA_PIPE_DELAY            2    /* d-side pipeline delay
+                                               * (1 = 5-stage, 2 = 7-stage) */
+#define XCHAL_CLOCK_GATING_GLOBAL        1    /* global clock gating */
+#define XCHAL_CLOCK_GATING_FUNCUNIT      1    /* funct. unit clock gating */
+/* In T1050, applies to selected core load and store instructions (see ISA): */
+#define XCHAL_UNALIGNED_LOAD_EXCEPTION   0    /* unaligned loads cause exc. */
+#define XCHAL_UNALIGNED_STORE_EXCEPTION  0    /* unaligned stores cause exc.*/
+#define XCHAL_UNALIGNED_LOAD_HW          1    /* unaligned loads work in hw */
+#define XCHAL_UNALIGNED_STORE_HW         1    /* unaligned stores work in hw*/
+
+#define XCHAL_SW_VERSION                 1100003 /* sw version of this header */
+
+#define XCHAL_CORE_ID                    "esp32_v3_49_prod"
+                                              /* alphanum core name
+                                               * (CoreID) set in the Xtensa
+                                               * Processor Generator */
+
+#define XCHAL_BUILD_UNIQUE_ID            0x0005fe96 /* 22-bit sw build ID */
+
+/*
+ *  These definitions describe the hardware targeted by this software.
+ */
+#define XCHAL_HW_CONFIGID0                0xc2bcfffe  /* ConfigID hi 32 bits*/
+#define XCHAL_HW_CONFIGID1                0x1cc5fe96  /* ConfigID lo 32 bits*/
+#define XCHAL_HW_VERSION_NAME            "LX6.0.3"    /* full version name */
+#define XCHAL_HW_VERSION_MAJOR            2600    /* major ver# of targeted hw */
+#define XCHAL_HW_VERSION_MINOR            3       /* minor ver# of targeted hw */
+#define XCHAL_HW_VERSION                  260003  /* major*100+minor */
+#define XCHAL_HW_REL_LX6                  1
+#define XCHAL_HW_REL_LX6_0                1
+#define XCHAL_HW_REL_LX6_0_3              1
+#define XCHAL_HW_CONFIGID_RELIABLE        1
+
+/* If software targets a *range* of hardware versions, these are the bounds: */
+
+#define XCHAL_HW_MIN_VERSION_MAJOR        2600    /* major v of earliest tgt hw */
+#define XCHAL_HW_MIN_VERSION_MINOR        3       /* minor v of earliest tgt hw */
+#define XCHAL_HW_MIN_VERSION              260003  /* earliest targeted hw */
+#define XCHAL_HW_MAX_VERSION_MAJOR        2600    /* major v of latest tgt hw */
+#define XCHAL_HW_MAX_VERSION_MINOR        3       /* minor v of latest tgt hw */
+#define XCHAL_HW_MAX_VERSION              260003  /* latest targeted hw */
+
+/* Cache ********************************************************************/
+
+#define XCHAL_ICACHE_LINESIZE            4    /* I-cache line size in bytes */
+#define XCHAL_DCACHE_LINESIZE            4    /* D-cache line size in bytes */
+#define XCHAL_ICACHE_LINEWIDTH           2    /* log2(I line size in bytes) */
+#define XCHAL_DCACHE_LINEWIDTH           2    /* log2(D line size in bytes) */
+
+#define XCHAL_ICACHE_SIZE                0    /* I-cache size in bytes or 0 */
+#define XCHAL_DCACHE_SIZE                0    /* D-cache size in bytes or 0 */
+
+#define XCHAL_DCACHE_IS_WRITEBACK        0    /* writeback feature */
+#define XCHAL_DCACHE_IS_COHERENT         0    /* MP coherence feature */
+
+#define XCHAL_HAVE_PREFETCH              0    /* PREFCTL register */
+#define XCHAL_HAVE_PREFETCH_L1           0    /* prefetch to L1 dcache */
+#define XCHAL_PREFETCH_CASTOUT_LINES     0    /* dcache pref. castout bufsz */
+#define XCHAL_PREFETCH_ENTRIES           0    /* cache prefetch entries */
+#define XCHAL_PREFETCH_BLOCK_ENTRIES     0    /* prefetch block streams */
+#define XCHAL_HAVE_CACHE_BLOCKOPS        0    /* block prefetch for caches */
+#define XCHAL_HAVE_ICACHE_TEST           0    /* Icache test instructions */
+#define XCHAL_HAVE_DCACHE_TEST           0    /* Dcache test instructions */
+#define XCHAL_HAVE_ICACHE_DYN_WAYS       0    /* Icache dynamic way support */
+#define XCHAL_HAVE_DCACHE_DYN_WAYS       0    /* Dcache dynamic way support */
+
+/* Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code */
+
+#ifndef XCHAL_HAL_NON_PRIVILEGED_ONLY
+
+/* Cache ********************************************************************/
+
+#define XCHAL_HAVE_PIF                   1    /* any outbound PIF present */
+#define XCHAL_HAVE_AXI                   0    /* AXI bus */
+
+#define XCHAL_HAVE_PIF_WR_RESP           0    /* pif write response */
+#define XCHAL_HAVE_PIF_REQ_ATTR          0    /* pif attribute */
+
+/* If present, cache size in bytes == (ways * 2^(linewidth + setwidth)). */
+
+/* Number of cache sets in log2(lines per way): */
+
+#define XCHAL_ICACHE_SETWIDTH            0
+#define XCHAL_DCACHE_SETWIDTH            0
+
+/* Cache set associativity (number of ways): */
+
+#define XCHAL_ICACHE_WAYS                1
+#define XCHAL_DCACHE_WAYS                1
+
+/* Cache features: */
+
+#define XCHAL_ICACHE_LINE_LOCKABLE       0
+#define XCHAL_DCACHE_LINE_LOCKABLE       0
+#define XCHAL_ICACHE_ECC_PARITY          0
+#define XCHAL_DCACHE_ECC_PARITY          0
+
+/* Cache access size in bytes (affects operation of SICW instruction): */
+
+#define XCHAL_ICACHE_ACCESS_SIZE         1
+#define XCHAL_DCACHE_ACCESS_SIZE         1
+
+#define XCHAL_DCACHE_BANKS               0    /* number of banks */
+
+/* Number of encoded cache attr bits for decoded bits): */
+
+#define XCHAL_CA_BITS                    4
+
+/* Internal I/D RAM/ROMs and XLMI *******************************************/
+
+#define XCHAL_NUM_INSTROM                1    /* number of core instr. ROMs */
+#define XCHAL_NUM_INSTRAM                2    /* number of core instr. RAMs */
+#define XCHAL_NUM_DATAROM                1    /* number of core data ROMs */
+#define XCHAL_NUM_DATARAM                2    /* number of core data RAMs */
+#define XCHAL_NUM_URAM                   0    /* number of core unified RAMs*/
+#define XCHAL_NUM_XLMI                   1    /* number of core XLMI ports */
+
+/* Instruction ROM 0: */
+
+#define XCHAL_INSTROM0_VADDR             0x40800000 /* virtual address */
+#define XCHAL_INSTROM0_PADDR             0x40800000 /* physical address */
+#define XCHAL_INSTROM0_SIZE              4194304    /* size in bytes */
+#define XCHAL_INSTROM0_ECC_PARITY        0    /* ECC/parity type, 0=none */
+
+/* Instruction RAM 0: */
+
+#define XCHAL_INSTRAM0_VADDR             0x40000000 /* virtual address */
+#define XCHAL_INSTRAM0_PADDR             0x40000000 /* physical address */
+#define XCHAL_INSTRAM0_SIZE              4194304    /* size in bytes */
+#define XCHAL_INSTRAM0_ECC_PARITY        0    /* ECC/parity type, 0=none */
+
+/* Instruction RAM 1: */
+
+#define XCHAL_INSTRAM1_VADDR             0x40400000 /* virtual address */
+#define XCHAL_INSTRAM1_PADDR             0x40400000 /* physical address */
+#define XCHAL_INSTRAM1_SIZE              4194304    /* size in bytes */
+#define XCHAL_INSTRAM1_ECC_PARITY        0    /* ECC/parity type, 0=none */
+
+/* Data ROM 0: */
+
+#define XCHAL_DATAROM0_VADDR             0x3F400000 /* virtual address */
+#define XCHAL_DATAROM0_PADDR             0x3F400000 /* physical address */
+#define XCHAL_DATAROM0_SIZE              4194304    /* size in bytes */
+#define XCHAL_DATAROM0_ECC_PARITY        0    /* ECC/parity type, 0=none */
+#define XCHAL_DATAROM0_BANKS             1    /* number of banks */
+
+/* Data RAM 0: */
+#define XCHAL_DATARAM0_VADDR             0x3FF80000 /* virtual address */
+#define XCHAL_DATARAM0_PADDR             0x3FF80000 /* physical address */
+#define XCHAL_DATARAM0_SIZE              524288     /* size in bytes */
+#define XCHAL_DATARAM0_ECC_PARITY        0    /* ECC/parity type, 0=none */
+#define XCHAL_DATARAM0_BANKS             1    /* number of banks */
+
+/* Data RAM 1: */
+
+#define XCHAL_DATARAM1_VADDR             0x3F800000 /* virtual address */
+#define XCHAL_DATARAM1_PADDR             0x3F800000 /* physical address */
+#define XCHAL_DATARAM1_SIZE              4194304    /* size in bytes */
+#define XCHAL_DATARAM1_ECC_PARITY        0    /* ECC/parity type, 0=none */
+#define XCHAL_DATARAM1_BANKS             1    /* number of banks */
+
+/* XLMI Port 0: */
+
+#define XCHAL_XLMI0_VADDR                0x3FF00000 /* virtual address */
+#define XCHAL_XLMI0_PADDR                0x3FF00000 /* physical address */
+#define XCHAL_XLMI0_SIZE                 524288    /* size in bytes */
+#define XCHAL_XLMI0_ECC_PARITY           0    /* ECC/parity type, 0=none */
+
+#define XCHAL_HAVE_IMEM_LOADSTORE        1    /* can load/store to IROM/IRAM*/
+
+/* Interrupts and Timers ****************************************************/
+
+#define XCHAL_HAVE_INTERRUPTS            1    /* interrupt option */
+#define XCHAL_HAVE_HIGHPRI_INTERRUPTS    1    /* med/high-pri. interrupts */
+#define XCHAL_HAVE_NMI                   1    /* non-maskable interrupt */
+#define XCHAL_HAVE_CCOUNT                1    /* CCOUNT reg. (timer option) */
+#define XCHAL_NUM_TIMERS                 3    /* number of CCOMPAREn regs */
+#define XCHAL_NUM_INTERRUPTS             32   /* number of interrupts */
+#define XCHAL_NUM_INTERRUPTS_LOG2        5    /* ceil(log2(NUM_INTERRUPTS)) */
+#define XCHAL_NUM_EXTINTERRUPTS          26   /* num of external interrupts */
+#define XCHAL_INT_NLEVELS                6    /* number of interrupt levels
+                           (not including level zero) */
+#define XCHAL_EXCM_LEVEL                 3    /* level masked by PS.EXCM */
+    /* (always 1 in XEA1; levels 2 .. EXCM_LEVEL are "medium priority") */
+
+/* Masks of interrupts at each interrupt level: */
+
+#define XCHAL_INTLEVEL1_MASK             0x000637FF
+#define XCHAL_INTLEVEL2_MASK             0x00380000
+#define XCHAL_INTLEVEL3_MASK             0x28C08800
+#define XCHAL_INTLEVEL4_MASK             0x53000000
+#define XCHAL_INTLEVEL5_MASK             0x84010000
+#define XCHAL_INTLEVEL6_MASK             0x00000000
+#define XCHAL_INTLEVEL7_MASK             0x00004000
+
+/* Masks of interrupts at each range 1..n of interrupt levels: */
+
+#define XCHAL_INTLEVEL1_ANDBELOW_MASK    0x000637FF
+#define XCHAL_INTLEVEL2_ANDBELOW_MASK    0x003E37FF
+#define XCHAL_INTLEVEL3_ANDBELOW_MASK    0x28FEBFFF
+#define XCHAL_INTLEVEL4_ANDBELOW_MASK    0x7BFEBFFF
+#define XCHAL_INTLEVEL5_ANDBELOW_MASK    0xFFFFBFFF
+#define XCHAL_INTLEVEL6_ANDBELOW_MASK    0xFFFFBFFF
+#define XCHAL_INTLEVEL7_ANDBELOW_MASK    0xFFFFFFFF
+
+/* Level of each interrupt: */
+
+#define XCHAL_INT0_LEVEL                 1
+#define XCHAL_INT1_LEVEL                 1
+#define XCHAL_INT2_LEVEL                 1
+#define XCHAL_INT3_LEVEL                 1
+#define XCHAL_INT4_LEVEL                 1
+#define XCHAL_INT5_LEVEL                 1
+#define XCHAL_INT6_LEVEL                 1
+#define XCHAL_INT7_LEVEL                 1
+#define XCHAL_INT8_LEVEL                 1
+#define XCHAL_INT9_LEVEL                 1
+#define XCHAL_INT10_LEVEL                1
+#define XCHAL_INT11_LEVEL                3
+#define XCHAL_INT12_LEVEL                1
+#define XCHAL_INT13_LEVEL                1
+#define XCHAL_INT14_LEVEL                7
+#define XCHAL_INT15_LEVEL                3
+#define XCHAL_INT16_LEVEL                5
+#define XCHAL_INT17_LEVEL                1
+#define XCHAL_INT18_LEVEL                1
+#define XCHAL_INT19_LEVEL                2
+#define XCHAL_INT20_LEVEL                2
+#define XCHAL_INT21_LEVEL                2
+#define XCHAL_INT22_LEVEL                3
+#define XCHAL_INT23_LEVEL                3
+#define XCHAL_INT24_LEVEL                4
+#define XCHAL_INT25_LEVEL                4
+#define XCHAL_INT26_LEVEL                5
+#define XCHAL_INT27_LEVEL                3
+#define XCHAL_INT28_LEVEL                4
+#define XCHAL_INT29_LEVEL                3
+#define XCHAL_INT30_LEVEL                4
+#define XCHAL_INT31_LEVEL                5
+#define XCHAL_DEBUGLEVEL                 6    /* debug interrupt level */
+#define XCHAL_HAVE_DEBUG_EXTERN_INT      1    /* OCD external db interrupt */
+#define XCHAL_NMILEVEL                   7    /* NMI "level" (for use with
+                                               * EXCSAVE/EPS/EPC_n, RFI n) */
+
+/* Type of each interrupt: */
+
+#define XCHAL_INT0_TYPE                  XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT1_TYPE                  XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT2_TYPE                  XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT3_TYPE                  XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT4_TYPE                  XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT5_TYPE                  XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT6_TYPE                  XTHAL_INTTYPE_TIMER
+#define XCHAL_INT7_TYPE                  XTHAL_INTTYPE_SOFTWARE
+#define XCHAL_INT8_TYPE                  XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT9_TYPE                  XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT10_TYPE                 XTHAL_INTTYPE_EXTERN_EDGE
+#define XCHAL_INT11_TYPE                 XTHAL_INTTYPE_PROFILING
+#define XCHAL_INT12_TYPE                 XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT13_TYPE                 XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT14_TYPE                 XTHAL_INTTYPE_NMI
+#define XCHAL_INT15_TYPE                 XTHAL_INTTYPE_TIMER
+#define XCHAL_INT16_TYPE                 XTHAL_INTTYPE_TIMER
+#define XCHAL_INT17_TYPE                 XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT18_TYPE                 XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT19_TYPE                 XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT20_TYPE                 XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT21_TYPE                 XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT22_TYPE                 XTHAL_INTTYPE_EXTERN_EDGE
+#define XCHAL_INT23_TYPE                 XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT24_TYPE                 XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT25_TYPE                 XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT26_TYPE                 XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT27_TYPE                 XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT28_TYPE                 XTHAL_INTTYPE_EXTERN_EDGE
+#define XCHAL_INT29_TYPE                 XTHAL_INTTYPE_SOFTWARE
+#define XCHAL_INT30_TYPE                 XTHAL_INTTYPE_EXTERN_EDGE
+#define XCHAL_INT31_TYPE                 XTHAL_INTTYPE_EXTERN_LEVEL
+
+/* Masks of interrupts for each type of interrupt: */
+
+#define XCHAL_INTTYPE_MASK_UNCONFIGURED  0x00000000
+#define XCHAL_INTTYPE_MASK_SOFTWARE      0x20000080
+#define XCHAL_INTTYPE_MASK_EXTERN_EDGE   0x50400400
+#define XCHAL_INTTYPE_MASK_EXTERN_LEVEL  0x8FBE333F
+#define XCHAL_INTTYPE_MASK_TIMER         0x00018040
+#define XCHAL_INTTYPE_MASK_NMI           0x00004000
+#define XCHAL_INTTYPE_MASK_WRITE_ERROR   0x00000000
+#define XCHAL_INTTYPE_MASK_PROFILING     0x00000800
+
+/* Interrupt numbers assigned to specific interrupt sources: */
+
+#define XTHAL_TIMER_UNCONFIGURED         -1    /* REVISIT: should be in hal.h */
+#define XCHAL_TIMER0_INTERRUPT           6     /* CCOMPARE0 */
+#define XCHAL_TIMER1_INTERRUPT           15    /* CCOMPARE1 */
+#define XCHAL_TIMER2_INTERRUPT           16    /* CCOMPARE2 */
+#define XCHAL_TIMER3_INTERRUPT           XTHAL_TIMER_UNCONFIGURED
+#define XCHAL_NMI_INTERRUPT              14    /* non-maskable interrupt */
+#define XCHAL_PROFILING_INTERRUPT        11    /* profiling interrupt */
+
+/* Interrupt numbers for levels at which only one interrupt is configured: */
+
+#define XCHAL_INTLEVEL7_NUM              14
+
+/* (There are many interrupts each at level(s) 1, 2, 3, 4, 5.) */
+
+/* External interrupt mapping.
+ *
+ * These macros describe how Xtensa processor interrupt numbers
+ * (as numbered internally, eg. in INTERRUPT and INTENABLE registers)
+ * map to external BInterrupt pins, for those interrupts
+ * configured as external (level-triggered, edge-triggered, or NMI).
+ * See the Xtensa processor databook for more details.
+ */
+
+/* Core interrupt numbers mapped to each EXTERNAL BInterrupt pin number: */
+
+#define XCHAL_EXTINT0_NUM              0     /* (intlevel 1) */
+#define XCHAL_EXTINT1_NUM              1     /* (intlevel 1) */
+#define XCHAL_EXTINT2_NUM              2     /* (intlevel 1) */
+#define XCHAL_EXTINT3_NUM              3     /* (intlevel 1) */
+#define XCHAL_EXTINT4_NUM              4     /* (intlevel 1) */
+#define XCHAL_EXTINT5_NUM              5     /* (intlevel 1) */
+#define XCHAL_EXTINT6_NUM              8     /* (intlevel 1) */
+#define XCHAL_EXTINT7_NUM              9     /* (intlevel 1) */
+#define XCHAL_EXTINT8_NUM              10    /* (intlevel 1) */
+#define XCHAL_EXTINT9_NUM              12    /* (intlevel 1) */
+#define XCHAL_EXTINT10_NUM             13    /* (intlevel 1) */
+#define XCHAL_EXTINT11_NUM             14    /* (intlevel 7) */
+#define XCHAL_EXTINT12_NUM             17    /* (intlevel 1) */
+#define XCHAL_EXTINT13_NUM             18    /* (intlevel 1) */
+#define XCHAL_EXTINT14_NUM             19    /* (intlevel 2) */
+#define XCHAL_EXTINT15_NUM             20    /* (intlevel 2) */
+#define XCHAL_EXTINT16_NUM             21    /* (intlevel 2) */
+#define XCHAL_EXTINT17_NUM             22    /* (intlevel 3) */
+#define XCHAL_EXTINT18_NUM             23    /* (intlevel 3) */
+#define XCHAL_EXTINT19_NUM             24    /* (intlevel 4) */
+#define XCHAL_EXTINT20_NUM             25    /* (intlevel 4) */
+#define XCHAL_EXTINT21_NUM             26    /* (intlevel 5) */
+#define XCHAL_EXTINT22_NUM             27    /* (intlevel 3) */
+#define XCHAL_EXTINT23_NUM             28    /* (intlevel 4) */
+#define XCHAL_EXTINT24_NUM             30    /* (intlevel 4) */
+#define XCHAL_EXTINT25_NUM             31    /* (intlevel 5) */
+/* EXTERNAL BInterrupt pin numbers mapped to each core interrupt number: */
+#define XCHAL_INT0_EXTNUM              0     /* (intlevel 1) */
+#define XCHAL_INT1_EXTNUM              1     /* (intlevel 1) */
+#define XCHAL_INT2_EXTNUM              2     /* (intlevel 1) */
+#define XCHAL_INT3_EXTNUM              3     /* (intlevel 1) */
+#define XCHAL_INT4_EXTNUM              4     /* (intlevel 1) */
+#define XCHAL_INT5_EXTNUM              5     /* (intlevel 1) */
+#define XCHAL_INT8_EXTNUM              6     /* (intlevel 1) */
+#define XCHAL_INT9_EXTNUM              7     /* (intlevel 1) */
+#define XCHAL_INT10_EXTNUM             8     /* (intlevel 1) */
+#define XCHAL_INT12_EXTNUM             9     /* (intlevel 1) */
+#define XCHAL_INT13_EXTNUM             10    /* (intlevel 1) */
+#define XCHAL_INT14_EXTNUM             11    /* (intlevel 7) */
+#define XCHAL_INT17_EXTNUM             12    /* (intlevel 1) */
+#define XCHAL_INT18_EXTNUM             13    /* (intlevel 1) */
+#define XCHAL_INT19_EXTNUM             14    /* (intlevel 2) */
+#define XCHAL_INT20_EXTNUM             15    /* (intlevel 2) */
+#define XCHAL_INT21_EXTNUM             16    /* (intlevel 2) */
+#define XCHAL_INT22_EXTNUM             17    /* (intlevel 3) */
+#define XCHAL_INT23_EXTNUM             18    /* (intlevel 3) */
+#define XCHAL_INT24_EXTNUM             19    /* (intlevel 4) */
+#define XCHAL_INT25_EXTNUM             20    /* (intlevel 4) */
+#define XCHAL_INT26_EXTNUM             21    /* (intlevel 5) */
+#define XCHAL_INT27_EXTNUM             22    /* (intlevel 3) */
+#define XCHAL_INT28_EXTNUM             23    /* (intlevel 4) */
+#define XCHAL_INT30_EXTNUM             24    /* (intlevel 4) */
+#define XCHAL_INT31_EXTNUM             25    /* (intlevel 5) */
+
+/* Exceptions and Vectors ***************************************************/
+
+#define XCHAL_XEA_VERSION              2    /* Xtensa Exception Architecture
+                                              * number: 1 == XEA1 (old)
+                                              * 2 == XEA2 (new)
+                                              * 0 == XEAX (extern) or TX */
+#define XCHAL_HAVE_XEA1                0    /* Exception Architecture 1 */
+#define XCHAL_HAVE_XEA2                1    /* Exception Architecture 2 */
+#define XCHAL_HAVE_XEAX                0    /* External Exception Arch. */
+#define XCHAL_HAVE_EXCEPTIONS          1    /* exception option */
+#define XCHAL_HAVE_HALT                0    /* halt architecture option */
+#define XCHAL_HAVE_BOOTLOADER          0    /* boot loader (for TX) */
+#define XCHAL_HAVE_MEM_ECC_PARITY      0    /* local memory ECC/parity */
+#define XCHAL_HAVE_VECTOR_SELECT       1    /* relocatable vectors */
+#define XCHAL_HAVE_VECBASE             1    /* relocatable vectors */
+#define XCHAL_VECBASE_RESET_VADDR      0x40000000  /* VECBASE reset value */
+#define XCHAL_VECBASE_RESET_PADDR      0x40000000
+#define XCHAL_RESET_VECBASE_OVERLAP    0
+
+#define XCHAL_RESET_VECTOR0_VADDR      0x50000000
+#define XCHAL_RESET_VECTOR0_PADDR      0x50000000
+#define XCHAL_RESET_VECTOR1_VADDR      0x40000400
+#define XCHAL_RESET_VECTOR1_PADDR      0x40000400
+#define XCHAL_RESET_VECTOR_VADDR       0x40000400
+#define XCHAL_RESET_VECTOR_PADDR       0x40000400
+#define XCHAL_USER_VECOFS              0x00000340
+#define XCHAL_USER_VECTOR_VADDR        0x40000340
+#define XCHAL_USER_VECTOR_PADDR        0x40000340
+#define XCHAL_KERNEL_VECOFS            0x00000300
+#define XCHAL_KERNEL_VECTOR_VADDR      0x40000300
+#define XCHAL_KERNEL_VECTOR_PADDR      0x40000300
+#define XCHAL_DOUBLEEXC_VECOFS         0x000003C0
+#define XCHAL_DOUBLEEXC_VECTOR_VADDR   0x400003C0
+#define XCHAL_DOUBLEEXC_VECTOR_PADDR   0x400003C0
+#define XCHAL_WINDOW_OF4_VECOFS        0x00000000
+#define XCHAL_WINDOW_UF4_VECOFS        0x00000040
+#define XCHAL_WINDOW_OF8_VECOFS        0x00000080
+#define XCHAL_WINDOW_UF8_VECOFS        0x000000C0
+#define XCHAL_WINDOW_OF12_VECOFS       0x00000100
+#define XCHAL_WINDOW_UF12_VECOFS       0x00000140
+#define XCHAL_WINDOW_VECTORS_VADDR     0x40000000
+#define XCHAL_WINDOW_VECTORS_PADDR     0x40000000
+#define XCHAL_INTLEVEL2_VECOFS         0x00000180
+#define XCHAL_INTLEVEL2_VECTOR_VADDR   0x40000180
+#define XCHAL_INTLEVEL2_VECTOR_PADDR   0x40000180
+#define XCHAL_INTLEVEL3_VECOFS         0x000001C0
+#define XCHAL_INTLEVEL3_VECTOR_VADDR   0x400001C0
+#define XCHAL_INTLEVEL3_VECTOR_PADDR   0x400001C0
+#define XCHAL_INTLEVEL4_VECOFS         0x00000200
+#define XCHAL_INTLEVEL4_VECTOR_VADDR   0x40000200
+#define XCHAL_INTLEVEL4_VECTOR_PADDR   0x40000200
+#define XCHAL_INTLEVEL5_VECOFS         0x00000240
+#define XCHAL_INTLEVEL5_VECTOR_VADDR   0x40000240
+#define XCHAL_INTLEVEL5_VECTOR_PADDR   0x40000240
+#define XCHAL_INTLEVEL6_VECOFS         0x00000280
+#define XCHAL_INTLEVEL6_VECTOR_VADDR   0x40000280
+#define XCHAL_INTLEVEL6_VECTOR_PADDR   0x40000280
+#define XCHAL_DEBUG_VECOFS             XCHAL_INTLEVEL6_VECOFS
+#define XCHAL_DEBUG_VECTOR_VADDR       XCHAL_INTLEVEL6_VECTOR_VADDR
+#define XCHAL_DEBUG_VECTOR_PADDR       XCHAL_INTLEVEL6_VECTOR_PADDR
+#define XCHAL_NMI_VECOFS               0x000002C0
+#define XCHAL_NMI_VECTOR_VADDR         0x400002C0
+#define XCHAL_NMI_VECTOR_PADDR         0x400002C0
+#define XCHAL_INTLEVEL7_VECOFS         XCHAL_NMI_VECOFS
+#define XCHAL_INTLEVEL7_VECTOR_VADDR   XCHAL_NMI_VECTOR_VADDR
+#define XCHAL_INTLEVEL7_VECTOR_PADDR   XCHAL_NMI_VECTOR_PADDR
+
+/* Debug Module *************************************************************/
+
+/* Misc */
+
+#define XCHAL_HAVE_DEBUG_ERI              1    /* ERI to debug module */
+#define XCHAL_HAVE_DEBUG_APB              1    /* APB to debug module */
+#define XCHAL_HAVE_DEBUG_JTAG             1    /* JTAG to debug module */
+
+/* On-Chip Debug (OCD) */
+
+#define XCHAL_HAVE_OCD                    1    /* OnChipDebug option */
+#define XCHAL_NUM_IBREAK                  2    /* number of IBREAKn regs */
+#define XCHAL_NUM_DBREAK                  2    /* number of DBREAKn regs */
+#define XCHAL_HAVE_OCD_DIR_ARRAY          0    /* faster OCD option (to LX4) */
+#define XCHAL_HAVE_OCD_LS32DDR            1    /* L32DDR/S32DDR (faster OCD) */
+
+/* TRAX (in core) */
+
+#define XCHAL_HAVE_TRAX                   1     /* TRAX in debug module */
+#define XCHAL_TRAX_MEM_SIZE               16384 /* TRAX memory size in bytes */
+#define XCHAL_TRAX_MEM_SHAREABLE          1     /* start/end regs; ready sig. */
+#define XCHAL_TRAX_ATB_WIDTH              32    /* ATB width (bits), 0=no ATB */
+#define XCHAL_TRAX_TIME_WIDTH             0     /* timestamp bitwidth, 0=none */
+
+/* Perf counters */
+
+#define XCHAL_NUM_PERF_COUNTERS           2    /* performance counters */
+
+/* MMU **********************************************************************/
+
+#define XCHAL_HAVE_TLBS                   1    /* inverse of HAVE_CACHEATTR */
+#define XCHAL_HAVE_SPANNING_WAY           1    /* one way maps I+D 4GB vaddr */
+#define XCHAL_SPANNING_WAY                0    /* TLB spanning way number */
+#define XCHAL_HAVE_IDENTITY_MAP           1    /* vaddr == paddr always */
+#define XCHAL_HAVE_CACHEATTR              0    /* CACHEATTR register present */
+#define XCHAL_HAVE_MIMIC_CACHEATTR        1    /* region protection */
+#define XCHAL_HAVE_XLT_CACHEATTR          0    /* region prot. w/translation */
+#define XCHAL_HAVE_PTP_MMU                0    /* full MMU (with page table
+                                                * [autorefill] and protection)
+                                                * usable for an MMU-based OS */
+/* If none of the above last 4 are set, it's a custom TLB configuration. */
+
+#define XCHAL_MMU_ASID_BITS               0    /* number of bits in ASIDs */
+#define XCHAL_MMU_RINGS                   1    /* number of rings (1..4) */
+#define XCHAL_MMU_RING_BITS               0    /* num of bits in RING field */
+
+#endif /* !XCHAL_HAL_NON_PRIVILEGED_ONLY */
+
+#endif /* __ARCH_XTENSA_INCLUDE_ESP32_CORE_ISA_H */
diff --git a/arch/xtensa/include/esp32/irq.h b/arch/xtensa/include/esp32/irq.h
new file mode 100644
index 0000000000000000000000000000000000000000..6c0373856ddc01a13dd5e63126110e119b7c74a6
--- /dev/null
+++ b/arch/xtensa/include/esp32/irq.h
@@ -0,0 +1,445 @@
+/****************************************************************************
+ * arch/xtensa/include/esp32/irq.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/irq.h
+ */
+
+#ifndef __ARCH_XTENSA_INCLUDE_ESP32_IRQ_H
+#define __ARCH_XTENSA_INCLUDE_ESP32_IRQ_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Interrupt Matrix
+ *
+ * The Interrupt Matrix embedded in the ESP32 independently allocates
+ * peripheral interrupt sources to the two CPUs’ peripheral interrupts. This
+ * configuration is highly flexible in order to meet many different needs.
+ *
+ * Features
+ * - Accepts 71 peripheral interrupt sources as input.
+ * - Generates 26 peripheral interrupt sources per CPU as output (52 total).
+ * - CPU NMI Interrupt Mask.
+ * - Queries current interrupt status of peripheral interrupt sources.
+ *
+ * Peripheral Interrupt Source
+ *
+ * ESP32 has 71 peripheral interrupt sources in total. 67 of 71 ESP32
+ * peripheral interrupt sources can be allocated to either CPU.  The four
+ * remaining peripheral interrupt sources are CPU-specific, two per CPU.
+ *
+ * - GPIO_INTERRUPT_PRO and GPIO_INTERRUPT_PRO_NMI can only be allocated to
+ *   PRO_CPU.
+ * - GPIO_INTERRUPT_APP and GPIO_INTERRUPT_APP_NMI can only be allocated to
+ *   APP_CPU.
+ *
+ * As a result, PRO_CPU and APP_CPU each have 69 peripheral interrupt
+ * sources.
+ */
+
+/* PRO_INTR_STATUS_REG_0 / APP_INTR_STATUS_REG_0 */
+
+#define ESP32_PERIPH_MAC            0  /* INTR_STATUS_REG_0, bit 0 */
+#define ESP32_PERIPH_MAC_NMI        1  /* INTR_STATUS_REG_0, bit 1 */
+#define ESP32_PERIPH_BB             2  /* INTR_STATUS_REG_0, bit 2 */
+#define ESP32_PERIPH_BB_MAC         3  /* INTR_STATUS_REG_0, bit 3 */
+#define ESP32_PERIPH_BT_BB          4  /* INTR_STATUS_REG_0, bit 4 */
+#define ESP32_PERIPH_BT_BB_NMI      5  /* INTR_STATUS_REG_0, bit 5 */
+#define ESP32_PERIPH_RWBT_IRQ       6  /* INTR_STATUS_REG_0, bit 6 */
+#define ESP32_PERIPH_RWBLE_IRQ      7  /* INTR_STATUS_REG_0, bit 7 */
+#define ESP32_PERIPH_RWBT_NMI       8  /* INTR_STATUS_REG_0, bit 8 */
+#define ESP32_PERIPH_RWBLE_NMI      9  /* INTR_STATUS_REG_0, bit 9 */
+
+#define ESP32_PERIPH_SLC0           10 /* INTR_STATUS_REG_0, bit 10 */
+#define ESP32_PERIPH_SLC1           11 /* INTR_STATUS_REG_0, bit 11 */
+#define ESP32_PERIPH_UHCI0          12 /* INTR_STATUS_REG_0, bit 12 */
+#define ESP32_PERIPH_UHCI1          13 /* INTR_STATUS_REG_0, bit 13 */
+#define ESP32_PERIPH_TG_T0_LEVEL    14 /* INTR_STATUS_REG_0, bit 14 */
+#define ESP32_PERIPH_TG_T1_LEVEL    15 /* INTR_STATUS_REG_0, bit 15 */
+#define ESP32_PERIPH_TG_WDT_LEVEL   16 /* INTR_STATUS_REG_0, bit 16 */
+#define ESP32_PERIPH_TG_LACT_LEVEL  17 /* INTR_STATUS_REG_0, bit 17 */
+#define ESP32_PERIPH_TG1_T0_LEVEL   18 /* INTR_STATUS_REG_0, bit 18 */
+#define ESP32_PERIPH_TG1_T1_LEVEL   19 /* INTR_STATUS_REG_0, bit 19 */
+
+#define ESP32_PERIPH_TG1_WDT_LEVEL  20 /* INTR_STATUS_REG_0, bit 20 */
+#define ESP32_PERIPH_G1_LACT_LEVEL  21 /* INTR_STATUS_REG_0, bit 21 */
+#define ESP32_PERIPH_CPU_GPIO       22 /* INTR_STATUS_REG_0, bit 22 */
+#define ESP32_PERIPH_CPU_NMI        23 /* INTR_STATUS_REG_0, bit 23 */
+#define ESP32_PERIPH_CPU_CPU0       24 /* INTR_STATUS_REG_0, bit 24 */
+#define ESP32_PERIPH_CPU_CPU1       25 /* INTR_STATUS_REG_0, bit 25 */
+#define ESP32_PERIPH_CPU_CPU2       26 /* INTR_STATUS_REG_0, bit 26 */
+#define ESP32_PERIPH_CPU_CPU3       27 /* INTR_STATUS_REG_0, bit 27 */
+#define ESP32_PERIPH_SPI0           28 /* INTR_STATUS_REG_0, bit 28 */
+#define ESP32_PERIPH_SPI1           29 /* INTR_STATUS_REG_0, bit 29 */
+
+#define ESP32_PERIPH_SPI2           30 /* INTR_STATUS_REG_0, bit 30 */
+#define ESP32_PERIPH_SPI3           31 /* INTR_STATUS_REG_0, bit 31 */
+
+/* PRO_INTR_STATUS_REG_1 / APP_INTR_STATUS_REG_1 */
+
+#define ESP32_PERIPH_I2S0           32 /* INTR_STATUS_REG_1, bit 0 */
+#define ESP32_PERIPH_I2S1           33 /* INTR_STATUS_REG_1, bit 1 */
+#define ESP32_PERIPH_UART           34 /* INTR_STATUS_REG_1, bit 2 */
+#define ESP32_PERIPH_UART1          35 /* INTR_STATUS_REG_1, bit 3 */
+#define ESP32_PERIPH_UART2          36 /* INTR_STATUS_REG_1, bit 4 */
+#define ESP32_PERIPH_SDIO_HOST      37 /* INTR_STATUS_REG_1, bit 5 */
+#define ESP32_PERIPH_EMAC           38 /* INTR_STATUS_REG_1, bit 6 */
+#define ESP32_PERIPH_PWM0           39 /* INTR_STATUS_REG_1, bit 7 */
+#define ESP32_PERIPH_PWM1           40 /* INTR_STATUS_REG_1, bit 8 */
+#define ESP32_PERIPH_PWM2           41 /* INTR_STATUS_REG_1, bit 9 */
+
+#define ESP32_PERIPH_PWM3           42 /* INTR_STATUS_REG_1, bit 10 */
+#define ESP32_PERIPH_LEDC           43 /* INTR_STATUS_REG_1, bit 11 */
+#define ESP32_PERIPH_EFUSE          44 /* INTR_STATUS_REG_1, bit 12 */
+#define ESP32_PERIPH_CAN            45 /* INTR_STATUS_REG_1, bit 13 */
+#define ESP32_PERIPH_RTC_CORE       46 /* INTR_STATUS_REG_1, bit 14 */
+#define ESP32_PERIPH_RMT            47 /* INTR_STATUS_REG_1, bit 15 */
+#define ESP32_PERIPH_PCNT           48 /* INTR_STATUS_REG_1, bit 16 */
+#define ESP32_PERIPH_I2C_EXT0       49 /* INTR_STATUS_REG_1, bit 17 */
+#define ESP32_PERIPH_I2C_EXT1       50 /* INTR_STATUS_REG_1, bit 18 */
+#define ESP32_PERIPH_RSA            51 /* INTR_STATUS_REG_1, bit 19 */
+
+#define ESP32_PERIPH_SPI1_DMA       52 /* INTR_STATUS_REG_1, bit 20 */
+#define ESP32_PERIPH_SPI2_DMA       53 /* INTR_STATUS_REG_1, bit 21 */
+#define ESP32_PERIPH_SPI3_DMA       54 /* INTR_STATUS_REG_1, bit 22 */
+#define ESP32_PERIPH_WDG            55 /* INTR_STATUS_REG_1, bit 23 */
+#define ESP32_PERIPH_TIMER1         56 /* INTR_STATUS_REG_1, bit 24 */
+#define ESP32_PERIPH_TIMER2         57 /* INTR_STATUS_REG_1, bit 25 */
+#define ESP32_PERIPH_TG_T0_EDGE     58 /* INTR_STATUS_REG_1, bit 26 */
+#define ESP32_PERIPH_TG_T1_EDGE     59 /* INTR_STATUS_REG_1, bit 27 */
+#define ESP32_PERIPH_TG_WDT_EDGE    60 /* INTR_STATUS_REG_1, bit 28 */
+#define ESP32_PERIPH_TG_LACT_EDGE   61 /* INTR_STATUS_REG_1, bit 29 */
+
+#define ESP32_PERIPH_TG1_T0_EDGE    62 /* INTR_STATUS_REG_1, bit 30 */
+#define ESP32_PERIPH_TG1_T1_EDGE    63 /* INTR_STATUS_REG_1, bit 31 */
+
+/* PRO_INTR_STATUS_REG_2 / APP_INTR_STATUS_REG_2 */
+
+#define ESP32_PERIPH_TG1_WDT_EDGE   64 /* INTR_STATUS_REG_2, bit 0 */
+#define ESP32_PERIPH_TG1_LACT_EDGE  65 /* INTR_STATUS_REG_2, bit 1 */
+#define ESP32_PERIPH_MMU_IA         66 /* INTR_STATUS_REG_2, bit 2 */
+#define ESP32_PERIPH_MPU_IA         67 /* INTR_STATUS_REG_2, bit 3 */
+#define ESP32_PERIPH_CACHE_IA       68 /* INTR_STATUS_REG_2, bit 4 */
+
+/* Total number of peripherals */
+
+#define ESP32_NPERIPHERALS          69
+
+/* Exceptions
+ *
+ * IRAM Offset  Description
+ *   0x0000     Windows
+ *   0x0180     Level 2 interrupt
+ *   0x01c0     Level 3 interrupt
+ *   0x0200     Level 4 interrupt
+ *   0x0240     Level 5 interrupt
+ *   0x0280     Debug exception
+ *   0x02c0     NMI exception
+ *   0x0300     Kernel exception
+ *   0x0340     User exception
+ *   0x03c0     Double exception
+ *
+ * REVISIT: In more architectures supported by NuttX, exception errors
+ * tie into the normal interrupt handling via special IRQ numbers.  I
+ * is still to be determined what will be done for the ESP32.
+ */
+
+/* IRQ numbers for internal interrupts that are dispatched like peripheral
+ * interrupts
+ */
+
+#define XTENSA_IRQ_TIMER0           0  /* INTERRUPT, bit 6 */
+#define XTENSA_IRQ_TIMER1           1  /* INTERRUPT, bit 15 */
+#define XTENSA_IRQ_TIMER2           2  /* INTERRUPT, bit 16 */
+#define XTENSA_IRQ_SYSCALL          3  /* User interrupt w/EXCCAUSE=syscall */
+
+#define XTENSA_NIRQ_INTERNAL        4  /* Number of dispatch internal interrupts */
+#define XTENSA_IRQ_FIRSTPERIPH      4  /* First peripheral IRQ number */
+
+/* IRQ numbers for peripheral interrupts coming throught the Interrupt
+ * Matrix.
+ */
+
+#define ESP32_IRQ2PERIPH(irq)       ((irq)-XTENSA_IRQ_FIRSTPERIPH)
+
+/* PRO_INTR_STATUS_REG_0 / APP_INTR_STATUS_REG_0 */
+
+#define ESP32_IRQ_MAC               (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_MAC)
+#define ESP32_IRQ_MAC_NMI           (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_MAC_NMI)
+#define ESP32_IRQ_BB                (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_BB)
+#define ESP32_IRQ_BB_MAC            (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_BB_MAC)
+#define ESP32_IRQ_BT_BB             (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_BT_BB)
+#define ESP32_IRQ_BT_BB_NMI         (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_BT_BB_NMI)
+#define ESP32_IRQ_RWBT_IRQ          (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_RWBT_IRQ)
+#define ESP32_IRQ_RWBLE_IRQ         (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_RWBLE_IRQ)
+#define ESP32_IRQ_RWBT_NMI          (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_RWBT_NMI)
+#define ESP32_IRQ_RWBLE_NMI         (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_RWBLE_NMI)
+#define ESP32_IRQ_SLC0              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_SLC0)
+#define ESP32_IRQ_SLC1              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_SLC1)
+#define ESP32_IRQ_UHCI0             (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_UHCI0)
+#define ESP32_IRQ_UHCI1             (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_UHCI1)
+#define ESP32_IRQ_TG_T0_LEVEL       (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_TG_T0_LEVEL)
+#define ESP32_IRQ_TG_T1_LEVEL       (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_TG_T1_LEVEL)
+#define ESP32_IRQ_TG_WDT_LEVEL      (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_TG_WDT_LEVEL)
+#define ESP32_IRQ_TG_LACT_LEVEL     (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_TG_LACT_LEVEL)
+#define ESP32_IRQ_TG1_T0_LEVEL      (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_TG1_T0_LEVEL)
+#define ESP32_IRQ_TG1_T1_LEVEL      (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_TG1_T1_LEVEL)
+#define ESP32_IRQ_TG1_WDT_LEVEL     (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_TG1_WDT_LEVEL)
+#define ESP32_IRQ_G1_LACT_LEVEL     (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_G1_LACT_LEVEL)
+#define ESP32_IRQ_CPU_GPIO          (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_CPU_GPIO)
+#define ESP32_IRQ_CPU_NMI           (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_CPU_NMI)
+#define ESP32_IRQ_CPU_CPU0          (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_CPU_CPU0)
+#define ESP32_IRQ_CPU_CPU1          (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_CPU_CPU1)
+#define ESP32_IRQ_CPU_CPU2          (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_CPU_CPU2)
+#define ESP32_IRQ_CPU_CPU3          (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_CPU_CPU3)
+#define ESP32_IRQ_SPI0              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_SPI0)
+#define ESP32_IRQ_SPI1              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_SPI1
+#define ESP32_IRQ_SPI2              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_SPI2)
+#define ESP32_IRQ_SPI3              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_SPI3
+
+#define ESP32_IRQ_SREG0             ESP32_IRQ_MAC
+#define ESP32_NIRQS_SREG0           32
+
+/* PRO_INTR_STATUS_REG_1 / APP_INTR_STATUS_REG_1 */
+
+#define ESP32_IRQ_I2S0              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_I2S0)
+#define ESP32_IRQ_I2S1              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_I2S1)
+#define ESP32_IRQ_UART              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_UART)
+#define ESP32_IRQ_UART1             (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_UART1)
+#define ESP32_IRQ_UART2             (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_UART2)
+#define ESP32_IRQ_SDIO_HOST         (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_SDIO_HOST)
+#define ESP32_IRQ_EMAC              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_EMAC)
+#define ESP32_IRQ_PWM0              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_PWM0)
+#define ESP32_IRQ_PWM1              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_PWM1)
+#define ESP32_IRQ_PWM2              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_PWM2)
+#define ESP32_IRQ_PWM3              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_PWM3)
+#define ESP32_IRQ_LEDC              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_LEDC)
+#define ESP32_IRQ_EFUSE             (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_EFUSE)
+#define ESP32_IRQ_CAN               (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_CAN)
+#define ESP32_IRQ_RTC_CORE          (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_RTC_CORE)
+#define ESP32_IRQ_RMT               (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_RMT)
+#define ESP32_IRQ_PCNT              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_PCNT)
+#define ESP32_IRQ_I2C_EXT0          (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_I2C_EXT0)
+#define ESP32_IRQ_I2C_EXT1          (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_I2C_EXT1)
+#define ESP32_IRQ_RSA               (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_RSA)
+#define ESP32_IRQ_SPI1_DMA          (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_SPI1_DMA)
+#define ESP32_IRQ_SPI2_DMA          (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_SPI2_DMA)
+#define ESP32_IRQ_SPI3_DMA          (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_SPI3_DMA)
+#define ESP32_IRQ_WDG               (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_WDG)
+#define ESP32_IRQ_TIMER1            (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_TIMER1)
+#define ESP32_IRQ_TIMER2            (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_TIMER2)
+#define ESP32_IRQ_TG_T0_EDGE        (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_TG_T0_EDGE)
+#define ESP32_IRQ_TG_T1_EDGE        (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_TG_T1_EDGE)
+#define ESP32_IRQ_TG_WDT_EDGE       (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_TG_WDT_EDGE)
+#define ESP32_IRQ_TG_LACT_EDGE      (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_TG_LACT_EDGE)
+#define ESP32_IRQ_TG1_T0_EDGE       (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_TG1_T0_EDGE)
+#define ESP32_IRQ_TG1_T1_EDGE       (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_TG1_T1_EDGE)
+
+#define ESP32_IRQ_SREG1             ESP32_IRQ_I2S0
+#define ESP32_NIRQS_SREG1           32
+
+/* PRO_INTR_STATUS_REG_2 / APP_INTR_STATUS_REG_2 */
+
+#define ESP32_IRQ_TG1_WDT_EDGE      (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_TG1_WDT_EDGE)
+#define ESP32_IRQ_TG1_LACT_EDGE     (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_TG1_LACT_EDGE)
+#define ESP32_IRQ_MMU_IA            (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_MMU_IA)
+#define ESP32_IRQ_MPU_IA            (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_MPU_IA)
+#define ESP32_IRQ_CACHE_IA          (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_CACHE_IA)
+
+#define ESP32_IRQ_SREG2             ESP32_IRQ_TG1_WDT_EDGE
+#define ESP32_NIRQS_SREG2           5
+
+#define ESP32_NIRQ_PERIPH           ESP32_NPERIPHERALS
+
+/* Second level GPIO interrupts.  GPIO interrupts are decoded and dispatched as
+ * a second level of decoding:  The first level dispatches to the GPIO interrupt
+ * handler.  The second to the decoded GPIO interrupt handler.
+ */
+
+#ifdef CONFIG_ESP32_GPIO_IRQ
+#  define ESP32_NIRQ_GPIO           40
+#  define ESP32_FIRST_GPIOIRQ       (XTENSA_NIRQ_INTERNAL+ESP32_NIRQ_PERIPH)
+#  define ESP32_LAST_GPIOIRQ        (ESP32_FIRST_GPIOIRQ+ESP32_NIRQ_GPIO-1)
+#  define ESP32_PIN2IRQ(p)          ((p) + ESP32_FIRST_GPIOIRQ)
+#  define ESP32_IRQ2PIN(i)          ((i) - ESP32_FIRST_GPIOIRQ)
+#else
+#  define ESP32_NIRQ_GPIO           0
+#endif
+
+/* Total number of interrupts */
+
+#define NR_IRQS                     (XTENSA_NIRQ_INTERNAL+ESP32_NIRQ_PERIPH+ESP32_NIRQ_GPIO)
+
+/* Xtensa CPU Interrupts.
+ *
+ * Each of the two CPUs (PRO and APP) have 32 interrupts each, of which
+ * 26 can be mapped to peripheral interrupts:
+ *
+ *   Level triggered peripherals (21 total):
+ *     0-5, 8-9, 12-13, 17-18 - Priority 1
+ *     19-21                  - Priority 2
+ *     23, 27                 - Priority 3
+ *     24-25                  - Priority 4
+ *     26, 31                 - Priority 5
+ *   Edge triggered peripherals (4 total):
+ *     10                     - Priority 1
+ *     22                     - Priority 3
+ *     28, 30                 - Priority 4
+ *   NMI (1 total):
+ *     14                     - NMI
+ *
+ * CPU peripheral interrupts can be a assigned to a CPU interrupt using the
+ * PRO_*_MAP_REG or APP_*_MAP_REG.  There are a pair of these registers for
+ * each peripheral source.  Multiple peripheral interrupt sources can be
+ * mapped to the same.
+ *
+ * The remaining, five, internal CPU interrupts are:
+ *
+ *   6   Timer0    - Priority 1
+ *   7   Software  - Priority 1
+ *   11  Profiling - Priority 3
+ *   15  Timer1    - Priority 3
+ *   16  Timer2    - Priority 5
+ *   29  Software  - Priority 3
+ *
+ * A peripheral interrupt can be disabled
+ */
+
+#define ESP32_CPUINT_LEVELPERIPH_0  0
+#define ESP32_CPUINT_LEVELPERIPH_1  1
+#define ESP32_CPUINT_LEVELPERIPH_2  2
+#define ESP32_CPUINT_LEVELPERIPH_3  3
+#define ESP32_CPUINT_LEVELPERIPH_4  4
+#define ESP32_CPUINT_LEVELPERIPH_5  5
+#define ESP32_CPUINT_LEVELPERIPH_6  8
+#define ESP32_CPUINT_LEVELPERIPH_7  9
+#define ESP32_CPUINT_LEVELPERIPH_8  12
+#define ESP32_CPUINT_LEVELPERIPH_9  13
+#define ESP32_CPUINT_LEVELPERIPH_10 17
+#define ESP32_CPUINT_LEVELPERIPH_11 18
+#define ESP32_CPUINT_LEVELPERIPH_12 19
+#define ESP32_CPUINT_LEVELPERIPH_13 20
+#define ESP32_CPUINT_LEVELPERIPH_14 21
+#define ESP32_CPUINT_LEVELPERIPH_15 23
+#define ESP32_CPUINT_LEVELPERIPH_16 24
+#define ESP32_CPUINT_LEVELPERIPH_17 25
+#define ESP32_CPUINT_LEVELPERIPH_18 26
+#define ESP32_CPUINT_LEVELPERIPH_19 27
+#define ESP32_CPUINT_LEVELPERIPH_20 31
+
+#define ESP32_CPUINT_NLEVELPERIPHS  21
+#define EPS32_CPUINT_LEVELSET       0x8fbe333f
+
+#define ESP32_CPUINT_EDGEPERIPH_0   10
+#define ESP32_CPUINT_EDGEPERIPH_1   22
+#define ESP32_CPUINT_EDGEPERIPH_2   28
+#define ESP32_CPUINT_EDGEPERIPH_3   30
+
+#define ESP32_CPUINT_NEDGEPERIPHS   4
+#define EPS32_CPUINT_EDGESET        0x50400400
+
+#define ESP32_CPUINT_NNMIPERIPHS    1
+#define EPS32_CPUINT_NMISET         0x00004000
+
+#define ESP32_CPUINT_TIMER0         6
+#define ESP32_CPUINT_SOFTWARE0      7
+#define ESP32_CPUINT_PROFILING      11
+#define ESP32_CPUINT_TIMER1         15
+#define ESP32_CPUINT_TIMER2         16
+#define ESP32_CPUINT_SOFTWARE1      29
+
+#define ESP32_CPUINT_NINTERNAL      6
+
+#define ESP32_NCPUINTS              32
+#define ESP32_CPUINT_MAX            (ESP32_NCPUINTS - 1)
+#define EPS32_CPUINT_PERIPHSET      0xdffe773f
+#define EPS32_CPUINT_INTERNALSET    0x200188c0
+
+/* Priority 1:   0-10, 12-13, 17-18    (15)
+ * Priority 2:   19-21                 (3)
+ * Priority 3:   11, 15, 22-23, 27, 29 (6)
+ * Priority 4:   24-25, 28, 30         (4)
+ * Priority 5:   16, 26, 31            (3)
+ * Priority NMI: 14                    (1)
+ */
+
+#define ESP32_INTPRI1_MASK          0x000637ff
+#define ESP32_INTPRI2_MASK          0x00380000
+#define ESP32_INTPRI3_MASK          0x28c08800
+#define ESP32_INTPRI4_MASK          0x53000000
+#define ESP32_INTPRI5_MASK          0x84010000
+#define ESP32_INTNMI_MASK           0x00004000
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_XTENSA_INCLUDE_ESP32_IRQ_H */
diff --git a/arch/xtensa/include/esp32/tie-asm.h b/arch/xtensa/include/esp32/tie-asm.h
new file mode 100644
index 0000000000000000000000000000000000000000..649beaf79e91c89b1d973dcf1adb3e6a8d824269
--- /dev/null
+++ b/arch/xtensa/include/esp32/tie-asm.h
@@ -0,0 +1,401 @@
+/****************************************************************************
+ * arch/xtensa/include/esp32/tie-asm.h
+ * Compile-time assembler definitions dependent on CORE & TIE
+ *
+ * This header file contains assembly-language definitions (assembly
+ * macros, etc.) for this specific Xtensa processor's TIE extensions
+ * and options.  It is customized to this Xtensa processor configuration.
+ *
+ * Customer ID=11657; Build=0x5fe96; Copyright (c) 1999-2016 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_INCLUDE_ESP32_TIE_ASM_H
+#define __ARCH_XTENSA_INCLUDE_ESP32_TIE_ASM_H
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Selection parameter values for save-area save/restore macros: */
+/* Option vs. TIE:
+ */
+
+#define XTHAL_SAS_TIE		0x0001		/* custom extension or coprocessor */
+#define XTHAL_SAS_OPT		0x0002		/* optional (and not a coprocessor) */
+#define XTHAL_SAS_ANYOT		0x0003		/* both of the above */
+
+/* Whether used automatically by compiler: */
+
+#define XTHAL_SAS_NOCC		0x0004		/* not used by compiler w/o special opts/code */
+#define XTHAL_SAS_CC		0x0008		/* used by compiler without special opts/code */
+#define XTHAL_SAS_ANYCC		0x000c		/* both of the above */
+
+/* ABI handling across function calls: */
+
+#define XTHAL_SAS_CALR		0x0010		/* caller-saved */
+#define XTHAL_SAS_CALE		0x0020		/* callee-saved */
+#define XTHAL_SAS_GLOB		0x0040		/* global across function calls (in thread) */
+#define XTHAL_SAS_ANYABI	0x0070		/* all of the above three */
+
+/* Misc */
+
+#define XTHAL_SAS_ALL		0xffff		/* include all default NCP contents */
+#define XTHAL_SAS3(optie,ccuse,abi)	(((optie) & XTHAL_SAS_ANYOT) |  \
+									 ((ccuse) & XTHAL_SAS_ANYCC) | \
+									 ((abi)   & XTHAL_SAS_ANYABI))
+
+/****************************************************************************
+ * Assembly Language Macros
+ ****************************************************************************/
+
+/* Macro to store all non-coprocessor (extra) custom TIE and optional state
+ * (not including zero-overhead loop registers).
+ *
+ * Required parameters:
+ *     ptr         Save area pointer address register (clobbered)
+ *                 (register must contain a 4 byte aligned address).
+ *     at1..at4    Four temporary address registers (first XTENSA_NCP_NUM_ATMPS
+ *                 registers are clobbered, the remaining are unused).
+ *
+ * Optional parameters:
+ *     continue    If macro invoked as part of a larger store sequence, set to 1
+ *                 if this is not the first in the sequence.  Defaults to 0.
+ *     ofs         Offset from start of larger sequence (from value of first ptr
+ *                 in sequence) at which to store.  Defaults to next available space
+ *                 (or 0 if  is 0).
+ *     select      Select what category(ies) of registers to store, as a bitmask
+ *                 (see XTHAL_SAS_xxx constants).  Defaults to all registers.
+ *     alloc       Select what category(ies) of registers to allocate; if any
+ *                 category is selected here that is not in , space for
+ *                 the corresponding registers is skipped without doing any load.
+ */
+
+	.macro xchal_ncp_load  ptr at1 at2 at3 at4  continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
+	xchal_sa_start	\continue, \ofs
+
+	/* Optional global registers used by default by the compiler: */
+
+	.ifeq (XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_GLOB) & ~(\select)
+
+	xchal_sa_align	\ptr, 0, 1016, 4, 4
+	l32i	\at1, \ptr, .Lxchal_ofs_+0
+	wur.THREADPTR	\at1		/* threadptr option */
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 4
+
+	.elseif ((XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_GLOB) & ~(\alloc)) == 0
+
+	xchal_sa_align	\ptr, 0, 1016, 4, 4
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 4
+
+	.endif
+
+	/* Optional caller-saved registers used by default by the compiler: */
+
+	.ifeq (XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_CALR) & ~(\select)
+
+	xchal_sa_align	\ptr, 0, 1012, 4, 4
+	l32i	\at1, \ptr, .Lxchal_ofs_+0
+	wsr.ACCLO	\at1		/* MAC16 option */
+	l32i	\at1, \ptr, .Lxchal_ofs_+4
+	wsr.ACCHI	\at1		/* MAC16 option */
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 8
+
+	.elseif ((XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_CALR) & ~(\alloc)) == 0
+
+	xchal_sa_align	\ptr, 0, 1012, 4, 4
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 8
+
+	.endif
+
+	/* Optional caller-saved registers not used by default by the compiler: */
+
+	.ifeq (XTHAL_SAS_OPT | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\select)
+
+	xchal_sa_align	\ptr, 0, 996, 4, 4
+	l32i	\at1, \ptr, .Lxchal_ofs_+0
+	wsr.BR	\at1		/* boolean option */
+	l32i	\at1, \ptr, .Lxchal_ofs_+4
+	wsr.SCOMPARE1	\at1		/* conditional store option */
+	l32i	\at1, \ptr, .Lxchal_ofs_+8
+	wsr.M0	\at1		/* MAC16 option */
+	l32i	\at1, \ptr, .Lxchal_ofs_+12
+	wsr.M1	\at1		/* MAC16 option */
+	l32i	\at1, \ptr, .Lxchal_ofs_+16
+	wsr.M2	\at1		/* MAC16 option */
+	l32i	\at1, \ptr, .Lxchal_ofs_+20
+	wsr.M3	\at1		/* MAC16 option */
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 24
+
+	.elseif ((XTHAL_SAS_OPT | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\alloc)) == 0
+
+	xchal_sa_align	\ptr, 0, 996, 4, 4
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 24
+
+	.endif
+
+	/* Custom caller-saved registers not used by default by the compiler: */
+
+	.ifeq (XTHAL_SAS_TIE | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\select)
+
+	xchal_sa_align	\ptr, 0, 1008, 4, 4
+	l32i	\at1, \ptr, .Lxchal_ofs_+0
+	wur.F64R_LO	\at1		/* ureg 234 */
+	l32i	\at1, \ptr, .Lxchal_ofs_+4
+	wur.F64R_HI	\at1		/* ureg 235 */
+	l32i	\at1, \ptr, .Lxchal_ofs_+8
+	wur.F64S	\at1		/* ureg 236 */
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 12
+
+	.elseif ((XTHAL_SAS_TIE | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\alloc)) == 0
+
+	xchal_sa_align	\ptr, 0, 1008, 4, 4
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 12
+
+	.endif
+	.endm	/* xchal_ncp_load */
+
+#define XTENSA_NCP_NUM_ATMPS	1
+
+/* Macro to store the state of TIE coprocessor FPU.
+ * Required parameters:
+ *     ptr         Save area pointer address register (clobbered)
+ *                 (register must contain a 4 byte aligned address).
+ *     at1..at4    Four temporary address registers (first XTENSA_CP0_NUM_ATMPS
+ *                 registers are clobbered, the remaining are unused).
+ * Optional parameters are the same as for xchal_ncp_store.
+ */
+
+#define xchal_cp_FPU_store	xchal_cp0_store
+	.macro	xchal_cp0_store  ptr at1 at2 at3 at4  continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
+	xchal_sa_start \continue, \ofs
+
+	/* Custom caller-saved registers not used by default by the compiler: */
+
+	.ifeq (XTHAL_SAS_TIE | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\select)
+
+	xchal_sa_align	\ptr, 0, 948, 4, 4
+	rur.FCR	\at1		/* ureg 232 */
+	s32i	\at1, \ptr, .Lxchal_ofs_+0
+	rur.FSR	\at1		/* ureg 233 */
+	s32i	\at1, \ptr, .Lxchal_ofs_+4
+	ssi	f0, \ptr, .Lxchal_ofs_+8
+	ssi	f1, \ptr, .Lxchal_ofs_+12
+	ssi	f2, \ptr, .Lxchal_ofs_+16
+	ssi	f3, \ptr, .Lxchal_ofs_+20
+	ssi	f4, \ptr, .Lxchal_ofs_+24
+	ssi	f5, \ptr, .Lxchal_ofs_+28
+	ssi	f6, \ptr, .Lxchal_ofs_+32
+	ssi	f7, \ptr, .Lxchal_ofs_+36
+	ssi	f8, \ptr, .Lxchal_ofs_+40
+	ssi	f9, \ptr, .Lxchal_ofs_+44
+	ssi	f10, \ptr, .Lxchal_ofs_+48
+	ssi	f11, \ptr, .Lxchal_ofs_+52
+	ssi	f12, \ptr, .Lxchal_ofs_+56
+	ssi	f13, \ptr, .Lxchal_ofs_+60
+	ssi	f14, \ptr, .Lxchal_ofs_+64
+	ssi	f15, \ptr, .Lxchal_ofs_+68
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 72
+
+	.elseif ((XTHAL_SAS_TIE | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\alloc)) == 0
+
+	xchal_sa_align	\ptr, 0, 948, 4, 4
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 72
+
+	.endif
+	.endm	/* xchal_cp0_store */
+
+/* Macro to load the state of TIE coprocessor FPU.
+ * Required parameters:
+ *     ptr         Save area pointer address register (clobbered)
+ *                 (register must contain a 4 byte aligned address).
+ *     at1..at4    Four temporary address registers (first XTENSA_CP0_NUM_ATMPS
+ *                 registers are clobbered, the remaining are unused).
+ * Optional parameters are the same as for xchal_ncp_load.
+ */
+
+#define xchal_cp_FPU_load	xchal_cp0_load
+	.macro	xchal_cp0_load  ptr at1 at2 at3 at4  continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
+	xchal_sa_start \continue, \ofs
+
+	/* Custom caller-saved registers not used by default by the compiler: */
+
+	.ifeq (XTHAL_SAS_TIE | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\select)
+
+	xchal_sa_align	\ptr, 0, 948, 4, 4
+	l32i	\at1, \ptr, .Lxchal_ofs_+0
+	wur.FCR	\at1		/* ureg 232 */
+	l32i	\at1, \ptr, .Lxchal_ofs_+4
+	wur.FSR	\at1		/* ureg 233 */
+	lsi	f0, \ptr, .Lxchal_ofs_+8
+	lsi	f1, \ptr, .Lxchal_ofs_+12
+	lsi	f2, \ptr, .Lxchal_ofs_+16
+	lsi	f3, \ptr, .Lxchal_ofs_+20
+	lsi	f4, \ptr, .Lxchal_ofs_+24
+	lsi	f5, \ptr, .Lxchal_ofs_+28
+	lsi	f6, \ptr, .Lxchal_ofs_+32
+	lsi	f7, \ptr, .Lxchal_ofs_+36
+	lsi	f8, \ptr, .Lxchal_ofs_+40
+	lsi	f9, \ptr, .Lxchal_ofs_+44
+	lsi	f10, \ptr, .Lxchal_ofs_+48
+	lsi	f11, \ptr, .Lxchal_ofs_+52
+	lsi	f12, \ptr, .Lxchal_ofs_+56
+	lsi	f13, \ptr, .Lxchal_ofs_+60
+	lsi	f14, \ptr, .Lxchal_ofs_+64
+	lsi	f15, \ptr, .Lxchal_ofs_+68
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 72
+
+	.elseif ((XTHAL_SAS_TIE | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\alloc)) == 0
+
+	xchal_sa_align	\ptr, 0, 948, 4, 4
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + 72
+
+	.endif
+	.endm	/* xchal_cp0_load */
+
+#define XTENSA_CP0_NUM_ATMPS	1
+#define XTENSA_SA_NUM_ATMPS		1
+
+	/* Empty macros for unconfigured coprocessors: */
+
+	.macro xchal_cp1_store	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp1_load	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp2_store	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp2_load	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp3_store	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp3_load	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp4_store	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp4_load	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp5_store	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp5_load	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp6_store	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp6_load	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp7_store	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+	.macro xchal_cp7_load	p a b c d continue=0 ofs=-1 select=-1 ; .endm
+
+#endif /*__ARCH_XTENSA_INCLUDE_ESP32_TIE_ASM_H*/
diff --git a/arch/xtensa/include/esp32/tie.h b/arch/xtensa/include/esp32/tie.h
new file mode 100644
index 0000000000000000000000000000000000000000..cd72bfc934c6e7e979d6914f23ab8e6f4fa065a5
--- /dev/null
+++ b/arch/xtensa/include/esp32/tie.h
@@ -0,0 +1,193 @@
+/****************************************************************************
+ * arch/xtensa/include/esp32/tie.h
+ * Compile-time HAL definitions dependent on CORE & TIE configuration
+ *
+ *  NOTE:  This header file is not meant to be included directly.
+ *
+ * This header file describes this specific Xtensa processor's TIE extensions
+ *  that extend basic Xtensa core functionality.  It is customized to this
+ *  Xtensa processor configuration.
+ *
+ *  Customer ID=11657; Build=0x5fe96; Copyright (c) 1999-2016 Cadence Design Systems Inc.
+ *
+ *  Permission is hereby granted, free of charge, to any person obtaining
+ *  a copy of this software and associated documentation files (the
+ *  "Software"), to deal in the Software without restriction, including
+ *  without limitation the rights to use, copy, modify, merge, publish,
+ *  distribute, sublicense, and/or sell copies of the Software, and to
+ *  permit persons to whom the Software is furnished to do so, subject to
+ *  the following conditions:
+ *
+ *  The above copyright notice and this permission notice shall be included
+ *  in all copies or substantial portions of the Software.
+ *
+ *  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ *  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ *  IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ *  CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ *  TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ *  SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ ****************************************************************************/
+
+#ifndef _ARCH_XTENSA_INCLUDE_ESP32_TIE_H
+#define _ARCH_XTENSA_INCLUDE_ESP32_TIE_H
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define XCHAL_CP_NUM               1       /* number of coprocessors */
+#define XCHAL_CP_MAX               1       /* max CP ID + 1 (0 if none) */
+#define XCHAL_CP_MASK              0x01    /* bitmask of all CPs by ID */
+#define XCHAL_CP_PORT_MASK         0x00    /* bitmask of only port CPs */
+
+/* Basic parameters of each coprocessor: */
+
+#define XCHAL_CP0_NAME             "FPU"
+#define XCHAL_CP0_IDENT            FPU
+#define XCHAL_CP0_SA_SIZE          72      /* size of state save area */
+#define XCHAL_CP0_SA_ALIGN         4       /* min alignment of save area */
+#define XCHAL_CP_ID_FPU            0       /* coprocessor ID (0..7) */
+
+/* Filler info for unassigned coprocessors, to simplify arrays etc: */
+
+#define XCHAL_CP1_SA_SIZE          0
+#define XCHAL_CP1_SA_ALIGN         1
+#define XCHAL_CP2_SA_SIZE          0
+#define XCHAL_CP2_SA_ALIGN         1
+#define XCHAL_CP3_SA_SIZE          0
+#define XCHAL_CP3_SA_ALIGN         1
+#define XCHAL_CP4_SA_SIZE          0
+#define XCHAL_CP4_SA_ALIGN         1
+#define XCHAL_CP5_SA_SIZE          0
+#define XCHAL_CP5_SA_ALIGN         1
+#define XCHAL_CP6_SA_SIZE          0
+#define XCHAL_CP6_SA_ALIGN         1
+#define XCHAL_CP7_SA_SIZE          0
+#define XCHAL_CP7_SA_ALIGN         1
+
+/* Save area for non-coprocessor optional and custom (TIE) state: */
+
+#define XCHAL_NCP_SA_SIZE          48
+#define XCHAL_NCP_SA_ALIGN         4
+
+/* Total save area for optional and custom state (NCP + CPn): */
+
+#define XCHAL_TOTAL_SA_SIZE        128     /* With 16-byte align padding */
+#define XCHAL_TOTAL_SA_ALIGN       4       /* Actual minimum alignment */
+
+/* Detailed contents of save areas.
+ * NOTE:  caller must define the XCHAL_SA_REG macro (not defined here)
+ * before expanding the XCHAL_xxx_SA_LIST() macros.
+ *
+ * XCHAL_SA_REG(s,ccused,abikind,kind,opt,name,galign,align,asize,
+ *        dbnum,base,regnum,bitsz,gapsz,reset,x...)
+ *
+ *    s = passed from XCHAL_*_LIST(s), eg. to select how to expand
+ *    ccused = set if used by compiler without special options or code
+ *    abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
+ *    kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
+ *    opt = 0 (custom TIE extension or coprocessor), or 1 (optional reg)
+ *    name = lowercase reg name (no quotes)
+ *    galign = group byte alignment (power of 2) (galign >= align)
+ *    align = register byte alignment (power of 2)
+ *    asize = allocated size in bytes (asize*8 == bitsz + gapsz + padsz)
+ *      (not including any pad bytes required to galign this or next reg)
+ *    dbnum = unique target number f/debug (see )
+ *    base = reg shortname w/o index (or sr=special, ur=TIE user reg)
+ *    regnum = reg index in regfile, or special/TIE-user reg number
+ *    bitsz = number of significant bits (regfile width, or ur/sr mask bits)
+ *    gapsz = intervening bits, if bitsz bits not stored contiguously
+ *    (padsz = pad bits at end [TIE regfile] or at msbits [ur,sr] of asize)
+ *    reset = register reset value (or 0 if undefined at reset)
+ *    x = reserved for future use (0 until then)
+ *
+ *  To filter out certain registers, e.g. to expand only the non-global
+ *  registers used by the compiler, you can do something like this:
+ *
+ *  #define XCHAL_SA_REG(s,ccused,p...)    SELCC##ccused(p)
+ *  #define SELCC0(p...)
+ *  #define SELCC1(abikind,p...)    SELAK##abikind(p)
+ *  #define SELAK0(p...)        REG(p)
+ *  #define SELAK1(p...)        REG(p)
+ *  #define SELAK2(p...)
+ *  #define REG(kind,tie,name,galn,aln,asz,csz,dbnum,base,rnum,bsz,rst,x...) \
+ *        ...what you want to expand...
+ */
+
+#define XCHAL_NCP_SA_NUM    12
+#define XCHAL_NCP_SA_LIST(s)    \
+ XCHAL_SA_REG(s,1,2,1,1,      threadptr, 4, 4, 4,0x03E7,  ur,231, 32,0,0,0) \
+ XCHAL_SA_REG(s,1,0,0,1,          acclo, 4, 4, 4,0x0210,  sr,16 , 32,0,0,0) \
+ XCHAL_SA_REG(s,1,0,0,1,          acchi, 4, 4, 4,0x0211,  sr,17 ,  8,0,0,0) \
+ XCHAL_SA_REG(s,0,0,0,1,             br, 4, 4, 4,0x0204,  sr,4  , 16,0,0,0) \
+ XCHAL_SA_REG(s,0,0,0,1,      scompare1, 4, 4, 4,0x020C,  sr,12 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,0,1,             m0, 4, 4, 4,0x0220,  sr,32 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,0,1,             m1, 4, 4, 4,0x0221,  sr,33 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,0,1,             m2, 4, 4, 4,0x0222,  sr,34 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,0,1,             m3, 4, 4, 4,0x0223,  sr,35 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,        f64r_lo, 4, 4, 4,0x03EA,  ur,234, 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,        f64r_hi, 4, 4, 4,0x03EB,  ur,235, 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,           f64s, 4, 4, 4,0x03EC,  ur,236, 32,0,0,0)
+
+#define XCHAL_CP0_SA_NUM    18
+#define XCHAL_CP0_SA_LIST(s)    \
+ XCHAL_SA_REG(s,0,0,1,0,            fcr, 4, 4, 4,0x03E8,  ur,232, 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,1,0,            fsr, 4, 4, 4,0x03E9,  ur,233, 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             f0, 4, 4, 4,0x0030,   f,0  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             f1, 4, 4, 4,0x0031,   f,1  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             f2, 4, 4, 4,0x0032,   f,2  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             f3, 4, 4, 4,0x0033,   f,3  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             f4, 4, 4, 4,0x0034,   f,4  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             f5, 4, 4, 4,0x0035,   f,5  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             f6, 4, 4, 4,0x0036,   f,6  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             f7, 4, 4, 4,0x0037,   f,7  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             f8, 4, 4, 4,0x0038,   f,8  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,             f9, 4, 4, 4,0x0039,   f,9  , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,            f10, 4, 4, 4,0x003A,   f,10 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,            f11, 4, 4, 4,0x003B,   f,11 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,            f12, 4, 4, 4,0x003C,   f,12 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,            f13, 4, 4, 4,0x003D,   f,13 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,            f14, 4, 4, 4,0x003E,   f,14 , 32,0,0,0) \
+ XCHAL_SA_REG(s,0,0,2,0,            f15, 4, 4, 4,0x003F,   f,15 , 32,0,0,0)
+
+#define XCHAL_CP1_SA_NUM            0
+#define XCHAL_CP1_SA_LIST(s)               /* empty */
+
+#define XCHAL_CP2_SA_NUM            0
+#define XCHAL_CP2_SA_LIST(s)               /* empty */
+
+#define XCHAL_CP3_SA_NUM            0
+#define XCHAL_CP3_SA_LIST(s)               /* empty */
+
+#define XCHAL_CP4_SA_NUM            0
+#define XCHAL_CP4_SA_LIST(s)               /* empty */
+
+#define XCHAL_CP5_SA_NUM            0
+#define XCHAL_CP5_SA_LIST(s)               /* empty */
+
+#define XCHAL_CP6_SA_NUM            0
+#define XCHAL_CP6_SA_LIST(s)               /* empty */
+
+#define XCHAL_CP7_SA_NUM            0
+#define XCHAL_CP7_SA_LIST(s)               /* empty */
+
+/* Byte length of instruction from its first nibble (op0 field), per FLIX. */
+
+#define XCHAL_OP0_FORMAT_LENGTHS    3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3
+
+/* Byte length of instruction from its first byte, per FLIX. */
+
+#define XCHAL_BYTE0_FORMAT_LENGTHS    \
+    3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
+    3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
+    3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
+    3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
+    3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
+    3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
+    3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
+    3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3
+
+#endif /*_ARCH_XTENSA_INCLUDE_ESP32_TIE_H*/
diff --git a/arch/xtensa/include/inttypes.h b/arch/xtensa/include/inttypes.h
new file mode 100644
index 0000000000000000000000000000000000000000..06a5e10591c84497e3dd1bb061839726fcbf28a2
--- /dev/null
+++ b/arch/xtensa/include/inttypes.h
@@ -0,0 +1,245 @@
+/****************************************************************************
+ * arch/xtensa/include/inttypes.h
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_INCLUDE_INTTYPES_H
+#define __ARCH_XTENSA_INCLUDE_INTTYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define PRId8       "d"
+#define PRId16      "d"
+#define PRId32      "d"
+#define PRId64      "lld"
+
+#define PRIdLEAST8  "d"
+#define PRIdLEAST16 "d"
+#define PRIdLEAST32 "d"
+#define PRIdLEAST64 "lld"
+
+#define PRIdFAST8   "d"
+#define PRIdFAST16  "d"
+#define PRIdFAST32  "d"
+#define PRIdFAST64  "lld"
+
+#define PRIdMAX     "lld"
+#define PRIdPTR     "d"
+
+#define PRIi8       "i"
+#define PRIi16      "i"
+#define PRIi32      "i"
+#define PRIi64      "lli"
+
+#define PRIiLEAST8  "i"
+#define PRIiLEAST16 "i"
+#define PRIiLEAST32 "i"
+#define PRIiLEAST64 "lli"
+
+#define PRIiFAST8   "i"
+#define PRIiFAST16  "i"
+#define PRIiFAST32  "i"
+#define PRIiFAST64  "lli"
+
+#define PRIiMAX     "lli"
+#define PRIiPTR     "i"
+
+#define PRIo8       "o"
+#define PRIo16      "o"
+#define PRIo32      "o"
+#define PRIo64      "llo"
+
+#define PRIoLEAST8  "o"
+#define PRIoLEAST16 "o"
+#define PRIoLEAST32 "o"
+#define PRIoLEAST64 "llo"
+
+#define PRIoFAST8   "o"
+#define PRIoFAST16  "o"
+#define PRIoFAST32  "o"
+#define PRIoFAST64  "llo"
+
+#define PRIoMAX     "llo"
+#define PRIoPTR     "o"
+
+#define PRIu8       "u"
+#define PRIu16      "u"
+#define PRIu32      "u"
+#define PRIu64      "llu"
+
+#define PRIuLEAST8  "u"
+#define PRIuLEAST16 "u"
+#define PRIuLEAST32 "u"
+#define PRIuLEAST64 "llu"
+
+#define PRIuFAST8   "u"
+#define PRIuFAST16  "u"
+#define PRIuFAST32  "u"
+#define PRIuFAST64  "llu"
+
+#define PRIuMAX     "llu"
+#define PRIuPTR     "u"
+
+#define PRIx8       "x"
+#define PRIx16      "x"
+#define PRIx32      "x"
+#define PRIx64      "llx"
+
+#define PRIxLEAST8  "x"
+#define PRIxLEAST16 "x"
+#define PRIxLEAST32 "x"
+#define PRIxLEAST64 "llx"
+
+#define PRIxFAST8   "x"
+#define PRIxFAST16  "x"
+#define PRIxFAST32  "x"
+#define PRIxFAST64  "llx"
+
+#define PRIxMAX     "llx"
+#define PRIxPTR     "x"
+
+#define PRIX8       "X"
+#define PRIX16      "X"
+#define PRIX32      "X"
+#define PRIX64      "llX"
+
+#define PRIXLEAST8  "X"
+#define PRIXLEAST16 "X"
+#define PRIXLEAST32 "X"
+#define PRIXLEAST64 "llX"
+
+#define PRIXFAST8   "X"
+#define PRIXFAST16  "X"
+#define PRIXFAST32  "X"
+#define PRIXFAST64  "llX"
+
+#define PRIXMAX     "llX"
+#define PRIXPTR     "X"
+
+#define SCNd8       "hhd"
+#define SCNd16      "hd"
+#define SCNd32      "d"
+#define SCNd64      "lld"
+
+#define SCNdLEAST8  "hhd"
+#define SCNdLEAST16 "hd"
+#define SCNdLEAST32 "d"
+#define SCNdLEAST64 "lld"
+
+#define SCNdFAST8   "hhd"
+#define SCNdFAST16  "hd"
+#define SCNdFAST32  "d"
+#define SCNdFAST64  "lld"
+
+#define SCNdMAX     "lld"
+#define SCNdPTR     "d"
+
+#define SCNi8       "hhi"
+#define SCNi16      "hi"
+#define SCNi32      "i"
+#define SCNi64      "lli"
+
+#define SCNiLEAST8  "hhi"
+#define SCNiLEAST16 "hi"
+#define SCNiLEAST32 "i"
+#define SCNiLEAST64 "lli"
+
+#define SCNiFAST8   "hhi"
+#define SCNiFAST16  "hi"
+#define SCNiFAST32  "i"
+#define SCNiFAST64  "lli"
+
+#define SCNiMAX     "lli"
+#define SCNiPTR     "i"
+
+#define SCNo8       "hho"
+#define SCNo16      "ho"
+#define SCNo32      "o"
+#define SCNo64      "llo"
+
+#define SCNoLEAST8  "hho"
+#define SCNoLEAST16 "ho"
+#define SCNoLEAST32 "o"
+#define SCNoLEAST64 "llo"
+
+#define SCNoFAST8   "hho"
+#define SCNoFAST16  "ho"
+#define SCNoFAST32  "o"
+#define SCNoFAST64  "llo"
+
+#define SCNoMAX     "llo"
+#define SCNoPTR     "o"
+
+#define SCNu8       "hhu"
+#define SCNu16      "hu"
+#define SCNu32      "u"
+#define SCNu64      "llu"
+
+#define SCNuLEAST8  "hhu"
+#define SCNuLEAST16 "hu"
+#define SCNuLEAST32 "u"
+#define SCNuLEAST64 "llu"
+
+#define SCNuFAST8   "hhu"
+#define SCNuFAST16  "hu"
+#define SCNuFAST32  "u"
+#define SCNuFAST64  "llu"
+
+#define SCNuMAX     "llu"
+#define SCNuPTR     "u"
+
+#define SCNx8       "hhx"
+#define SCNx16      "hx"
+#define SCNx32      "x"
+#define SCNx64      "llx"
+
+#define SCNxLEAST8  "hhx"
+#define SCNxLEAST16 "hx"
+#define SCNxLEAST32 "x"
+#define SCNxLEAST64 "llx"
+
+#define SCNxFAST8   "hhx"
+#define SCNxFAST16  "hx"
+#define SCNxFAST32  "x"
+#define SCNxFAST64  "llx"
+
+#define SCNxMAX     "llx"
+#define SCNxPTR     "x"
+
+#endif /* __ARCH_XTENSA_INCLUDE_INTTYPES_H */
diff --git a/arch/xtensa/include/irq.h b/arch/xtensa/include/irq.h
new file mode 100644
index 0000000000000000000000000000000000000000..aee6625ddeacf2473bf298776dab16199c04f2e3
--- /dev/null
+++ b/arch/xtensa/include/irq.h
@@ -0,0 +1,311 @@
+/****************************************************************************
+ * arch/xtensa/include/irq.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/irq.h
+ */
+
+#ifndef __ARCH_XTENSA_INCLUDE_IRQ_H
+#define __ARCH_XTENSA_INCLUDE_IRQ_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/* Include NuttX-specific IRQ definitions */
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+/* Include architecture-specific IRQ definitions */
+
+#ifdef CONFIG_ARCH_FAMILY_LX6
+#  include 
+
+/* Include implementation-specific IRQ definitions (including IRQ numbers) */
+
+#  ifdef CONFIG_ARCH_CHIP_ESP32
+#    include 
+#  else
+#    error Unknown LX6 implementation
+#  endif
+
+#else
+#  error Unknown XTENSA architecture
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* IRQ Stack Frame Format.  Each value is a uint32_t register index */
+
+#define REG_PC              (0)  /* Return PC */
+#define REG_PS              (1)  /* Return PS */
+#define REG_A0              (2)
+#define REG_A1              (3)  /* Stack pointer before interrupt */
+#define REG_A2              (4)
+#define REG_A3              (5)
+#define REG_A4              (6)
+#define REG_A5              (7)
+#define REG_A6              (8)
+#define REG_A7              (9)
+#define REG_A8              (10)
+#define REG_A9              (11)
+#define REG_A10             (12)
+#define REG_A11             (13)
+#define REG_A12             (14)
+#define REG_A13             (15)
+#define REG_A14             (16)
+#define REG_A15             (17)
+#define REG_SAR             (18)
+#define REG_EXCCAUSE        (19)
+#define REG_EXCVADDR        (20)
+
+#define _REG_LOOPS_START    (21)
+
+#ifdef XCHAL_HAVE_LOOPS
+#  define REG_LBEG          (_REG_LOOPS_START + 0)
+#  define REG_LEND          (_REG_LOOPS_START + 1)
+#  define REG_LCOUNT        (_REG_LOOPS_START + 2)
+#  define _REG_WINDOW_TMPS  (_REG_LOOPS_START + 3)
+#else
+#  define _REG_WINDOW_TMPS  _REG_LOOPS_START
+#endif
+
+#ifndef __XTENSA_CALL0_ABI__
+  /* Temporary space for saving stuff during window spill.
+   * REVISIT: I don't think that we need so many temporaries.
+   */
+
+#  define REG_TMP0          (_REG_WINDOW_TMPS + 0)
+#  define REG_TMP1          (_REG_WINDOW_TMPS + 1)
+#  define _REG_OVLY_START   (_REG_WINDOW_TMPS + 2)
+#else
+#  define _REG_OVLY_START   _REG_WINDOW_TMPS
+#endif
+
+#ifdef CONFIG_XTENSA_USE_OVLY
+/* Storage for overlay state */
+
+#  error Overlays not supported
+#  define XCPTCONTEXT_REGS  _REG_OVLY_START
+#else
+#  define XCPTCONTEXT_REGS  _REG_OVLY_START
+#endif
+
+#define XCPTCONTEXT_SIZE    (4 * XCPTCONTEXT_REGS)
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/* This struct defines the way the registers are stored. */
+
+struct xcptcontext
+{
+  /* The following function pointer is non-zero if there are pending signals
+   * to be processed.
+   */
+
+#ifndef CONFIG_DISABLE_SIGNALS
+  void *sigdeliver; /* Actual type is sig_deliver_t */
+
+  /* These are saved copies of registers used during signal processing. */
+
+  uint32_t saved_pc;
+  uint32_t saved_ps;
+#endif
+
+  /* Register save area */
+
+  uint32_t regs[XCPTCONTEXT_REGS];
+
+#if XCHAL_CP_NUM > 0
+  /* Co-processor save area */
+
+  struct xtensa_cpstate_s cpstate;
+#endif
+
+#ifdef CONFIG_LIB_SYSCALL
+  /* The following array holds the return address and the exc_return value
+   * needed to return from each nested system call.
+   */
+
+  uint8_t nsyscalls;
+  struct xcpt_syscall_s syscall[CONFIG_SYS_NNEST];
+#endif
+};
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+/* Return the current value of the PS register */
+
+static inline uint32_t xtensa_getps(void)
+{
+  uint32_t ps;
+
+  __asm__ __volatile__
+  (
+    "rsr %0, PS"  : "=r"(ps)
+  );
+
+  return ps;
+}
+
+/* Set the value of the PS register */
+
+static inline void xtensa_setps(uint32_t ps)
+{
+  __asm__ __volatile__
+  (
+    "wsr %0, PS"  : : "r"(ps)
+  );
+}
+
+/* Restore the value of the PS register */
+
+static inline void up_irq_restore(uint32_t ps)
+{
+  __asm__ __volatile__
+  (
+    "wsr %0, PS"  : : "r"(ps)
+  );
+}
+
+/* Disable interrupts and return the previous value of the PS register */
+
+static inline uint32_t up_irq_save(void)
+{
+  uint32_t ps;
+
+  /* Disable all low- and medium-priority interrupts.  High priority
+   * interrupts should not interfere with ongoing RTOS operations and
+   * are not disabled.
+   */
+
+  __asm__ __volatile__
+  (
+    "rsil %0, %1" : "=r"(ps) : "I"(XCHAL_EXCM_LEVEL)
+  );
+
+  /* Return the previous PS value so that it can be restored with
+   * up_irq_restore().
+   */
+
+  return ps;
+}
+
+/* Enable interrupts at all levels */
+
+static inline void up_irq_enable(void)
+{
+#ifdef __XTENSA_CALL0_ABI__
+  xtensa_setps(PS_INTLEVEL(0) | PS_UM);
+#else
+  xtensa_setps(PS_INTLEVEL(0) | PS_UM | PS_WOE);
+#endif
+}
+
+/* Disable low- and medium- priority interrupts */
+
+static inline void up_irq_disable(void)
+{
+#ifdef __XTENSA_CALL0_ABI__
+  xtensa_setps(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM);
+#else
+  xtensa_setps(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE);
+#endif
+}
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: xtensa_enable_interrupts
+ *
+ * Description:
+ *   Enables a set of interrupts. Does not simply set INTENABLE directly,
+ *   but computes it as a function of the current virtual priority.
+ *   Can be called from interrupt handlers.
+ *
+ ****************************************************************************/
+
+irqstate_t xtensa_enable_interrupts(irqstate_t mask);
+
+/****************************************************************************
+ * Name: xtensa_disable_interrupts
+ *
+ * Description:
+ *   Disables a set of interrupts. Does not simply set INTENABLE directly,
+ *   but computes it as a function of the current virtual priority.
+ *   Can be called from interrupt handlers.
+ *
+ ****************************************************************************/
+
+irqstate_t xtensa_disable_interrupts(irqstate_t mask);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_XTENSA_INCLUDE_IRQ_H */
diff --git a/arch/rgmp/include/limits.h b/arch/xtensa/include/limits.h
similarity index 92%
rename from arch/rgmp/include/limits.h
rename to arch/xtensa/include/limits.h
index a17af23d99c5f55eb18ca12686f5c21732fa3d3b..f3eb3b4795cf28198c6842c17dacc1898fc5ac09 100644
--- a/arch/rgmp/include/limits.h
+++ b/arch/xtensa/include/limits.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/rgmp/include/limits.h
+ * arch/xtensa/include/limits.h
  *
  *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -14,7 +14,7 @@
  *    notice, this list of conditions and the following disclaimer in
  *    the documentation and/or other materials provided with the
  *    distribution.
- * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ * 3. Neither the name NuttX nor the names of its contributors may be
  *    used to endorse or promote products derived from this software
  *    without specific prior written permission.
  *
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __ARCH_RGMP_INCLUDE_LIMITS_H
-#define __ARCH_RGMP_INCLUDE_LIMITS_H
+#ifndef __ARCH_XTENSA_INCLUDE_LIMITS_H
+#define __ARCH_XTENSA_INCLUDE_LIMITS_H
 
 /****************************************************************************
  * Included Files
@@ -83,4 +83,5 @@
 #define PTR_MAX     2147483647
 #define UPTR_MAX    4294967295U
 
-#endif /* __ARCH_RGMP_INCLUDE_LIMITS_H  */
+#endif /* __ARCH_XTENSA_INCLUDE_LIMITS_H */
+
diff --git a/arch/xtensa/include/lx6/chip.h b/arch/xtensa/include/lx6/chip.h
new file mode 100644
index 0000000000000000000000000000000000000000..a3cb0e3e846d6f67e464d909049aa2fa1ab3df0d
--- /dev/null
+++ b/arch/xtensa/include/lx6/chip.h
@@ -0,0 +1,77 @@
+/****************************************************************************
+ * arch/xtensa/include/lx6/chip.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_INCLUDE_LX6_CHIP_H
+#define __ARCH_XTENSA_INCLUDE_LX6_CHIP_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Inline Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_XTENSA_INCLUDE_LX6_CHIP_H */
diff --git a/arch/xtensa/include/lx6/irq.h b/arch/xtensa/include/lx6/irq.h
new file mode 100644
index 0000000000000000000000000000000000000000..ddc87e0c2bc952afd7ab4bd28a5a2f7d20a8f740
--- /dev/null
+++ b/arch/xtensa/include/lx6/irq.h
@@ -0,0 +1,83 @@
+/****************************************************************************
+ * arch/xtensa/include/lx6/irq.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/irq.h
+ */
+
+#ifndef __ARCH_XTENSA_INCLUDE_LX6_IRQ_H
+#define __ARCH_XTENSA_INCLUDE_LX6_IRQ_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_XTENSA_INCLUDE_LX6_IRQ_H */
diff --git a/arch/xtensa/include/serial.h b/arch/xtensa/include/serial.h
new file mode 100644
index 0000000000000000000000000000000000000000..df5b4b7ce786de74b62ec2e9241953461ee7f647
--- /dev/null
+++ b/arch/xtensa/include/serial.h
@@ -0,0 +1,58 @@
+/****************************************************************************
+ * arch/xtensa/include/serial.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_INCLUDE_SERIAL_H
+#define __ARCH_XTENSA_INCLUDE_SERIAL_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#endif /* __ARCH_XTENSA_INCLUDE_SERIAL_H */
diff --git a/arch/xtensa/include/spinlock.h b/arch/xtensa/include/spinlock.h
new file mode 100644
index 0000000000000000000000000000000000000000..9d0ef213d01b15e9c3865cfc1e020a34765ab799
--- /dev/null
+++ b/arch/xtensa/include/spinlock.h
@@ -0,0 +1,99 @@
+/****************************************************************************
+ * arch/xtensa/include/spinlock.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_INCLUDE_SPINLOCK_H
+#define __ARCH_ARM_INCLUDE_SPINLOCK_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+#  include 
+#endif /* __ASSEMBLY__ */
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define SP_UNLOCKED 0  /* The Un-locked state */
+#define SP_LOCKED   1  /* The Locked state */
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/* The Type of a spinlock.
+ *
+ * This must be a uint32_ becaue it will be set using S32C1I instruction.
+ * That instruction atomically stores to a memory location only if its
+ * current value is the expected one.  The state register (SCOMPARE1) is
+ * used to provide the additional comparison operand. Some implementations
+ * also have a state register (ATOMCTL) for further control of the atomic
+ * operation in cache and on the PIF bus.
+ */
+
+typedef uint32_t spinlock_t;
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_testset
+ *
+ * Description:
+ *   Perform an atomic test and set operation on the provided spinlock.
+ *
+ *   This function must be provided via the architecture-specific logoic.
+ *
+ * Input Parameters:
+ *   lock - The address of spinlock object.
+ *
+ * Returned Value:
+ *   The spinlock is always locked upon return.  The value of previous value
+ *   of the spinlock variable is returned, either SP_LOCKED if the spinlock
+ *   as previously locked (meaning that the test-and-set operation failed to
+ *   obtain the lock) or SP_UNLOCKED if the spinlock was previously unlocked
+ *   (meaning that we successfully obtained the lock)
+ *
+ ****************************************************************************/
+
+/* See prototype in nuttx/include/nuttx/spinlock.h */
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_INCLUDE_SPINLOCK_H */
diff --git a/arch/xtensa/include/syscall.h b/arch/xtensa/include/syscall.h
new file mode 100644
index 0000000000000000000000000000000000000000..fe2d71e6def5aa9e8294634764f799a826831a2f
--- /dev/null
+++ b/arch/xtensa/include/syscall.h
@@ -0,0 +1,82 @@
+/****************************************************************************
+ * arch/xtensa/include/syscall.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through include/syscall.h or include/sys/sycall.h
+ */
+
+#ifndef __ARCH_XTENSA_INCLUDE_SYSCALL_H
+#define __ARCH_XTENSA_INCLUDE_SYSCALL_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_XTENSA_INCLUDE_SYSCALL_H */
diff --git a/arch/xtensa/include/types.h b/arch/xtensa/include/types.h
new file mode 100644
index 0000000000000000000000000000000000000000..55d2fee188dd45948370105eac6d76e312bd0aa7
--- /dev/null
+++ b/arch/xtensa/include/types.h
@@ -0,0 +1,94 @@
+/****************************************************************************
+ * arch/xtensa/include/types.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through stdint.h
+ */
+
+#ifndef __ARCH_XTENSA_INCLUDE_TYPES_H
+#define __ARCH_XTENSA_INCLUDE_TYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Type Declarations
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/* These are the sizes of the standard integer types.  NOTE that these type
+ * names have a leading underscore character.  This file will be included
+ * (indirectly) by include/stdint.h and typedef'ed to the final name without
+ * the underscore character.  This roundabout way of doings things allows
+ * the stdint.h to be removed from the include/ directory in the event that
+ * the user prefers to use the definitions provided by their toolchain header
+ * files
+ */
+
+typedef signed char        _int8_t;
+typedef unsigned char      _uint8_t;
+
+typedef signed short       _int16_t;
+typedef unsigned short     _uint16_t;
+
+typedef signed long        _int32_t;
+typedef unsigned long      _uint32_t;
+
+typedef signed long long   _int64_t;
+typedef unsigned long long _uint64_t;
+#define __INT64_DEFINED
+
+/* A pointer is 4 bytes */
+
+typedef signed long        _intptr_t;
+typedef unsigned long      _uintptr_t;
+
+/* This is the size of the interrupt state save returned by up_irq_save(). */
+
+typedef unsigned int       irqstate_t;
+
+#endif /* __ASSEMBLY__ */
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#endif /* __ARCH_XTENSA_INCLUDE_TYPES_H */
diff --git a/arch/xtensa/include/xtensa/core.h b/arch/xtensa/include/xtensa/core.h
new file mode 100644
index 0000000000000000000000000000000000000000..b138aa558a454da8bf028be1ef7ebe9c0d56f4bc
--- /dev/null
+++ b/arch/xtensa/include/xtensa/core.h
@@ -0,0 +1,1443 @@
+/****************************************************************************
+ * arch/xtensa/include/core.h
+ *
+ * Leveraged to NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *
+ * This file derives from code provided  Cadence Design Systems, Inc.:
+ *
+ *   Copyright (c) 2005-2014 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ ****************************************************************************/
+
+/* This header file is sometimes referred to as the "compile-time HAL" or CHAL.
+ * It pulls definitions tailored for a specific Xtensa processor configuration.
+ *
+ * Sources for binaries meant to be configuration-independent generally avoid
+ * including this file (they may use the configuration-specific HAL library).
+ * It is normal for the HAL library source itself to include this file.
+ */
+
+#ifndef __ARCH_XTENSA_INCUDE_XTENSA_CORE_H
+#define __ARCH_XTENSA_INCUDE_XTENSA_CORE_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* General ******************************************************************/
+
+/* Separators for macros that expand into arrays.
+ * These can be predefined by files that #include this one,
+ * when different separators are required.
+ */
+
+/* Element separator for macros that expand into 1-dimensional arrays: */
+#ifndef XCHAL_SEP
+#  define XCHAL_SEP                  ,
+#endif
+
+/* Array separator for macros that expand into 2-dimensional arrays: */
+#ifndef XCHAL_SEP2
+#  define XCHAL_SEP2                    },{
+#endif
+
+/* ISA **********************************************************************/
+
+#if XCHAL_HAVE_BE
+#  define XCHAL_HAVE_LE                 0
+#  define XCHAL_MEMORY_ORDER            XTHAL_BIGENDIAN
+#else
+#  define XCHAL_HAVE_LE                 1
+#  define XCHAL_MEMORY_ORDER            XTHAL_LITTLEENDIAN
+#endif
+
+/* Interrupts ***************************************************************/
+
+/* Indexing macros: */
+
+#define _XCHAL_INTLEVEL_MASK(n)         XCHAL_INTLEVEL ## n ## _MASK
+#define XCHAL_INTLEVEL_MASK(n)          _XCHAL_INTLEVEL_MASK(n) /* n = 0 .. 15 */
+#define _XCHAL_INTLEVEL_ANDBELOWMASK(n) XCHAL_INTLEVEL ## n ## _ANDBELOW_MASK
+#define XCHAL_INTLEVEL_ANDBELOW_MASK(n) _XCHAL_INTLEVEL_ANDBELOWMASK(n)    /* n = 0 .. 15 */
+#define _XCHAL_INTLEVEL_NUM(n)          XCHAL_INTLEVEL ## n ## _NUM
+#define XCHAL_INTLEVEL_NUM(n)           _XCHAL_INTLEVEL_NUM(n)   /* n = 0 .. 15 */
+#define _XCHAL_INT_LEVEL(n)              XCHAL_INT ## n ## _LEVEL
+#define XCHAL_INT_LEVEL(n)              _XCHAL_INT_LEVEL(n) /* n = 0 .. 31 */
+#define _XCHAL_INT_TYPE(n)              XCHAL_INT ## n ## _TYPE
+#define XCHAL_INT_TYPE(n)               _XCHAL_INT_TYPE(n)   /* n = 0 .. 31 */
+#define _XCHAL_TIMER_INTERRUPT(n)       XCHAL_TIMER ## n ## _INTERRUPT
+#define XCHAL_TIMER_INTERRUPT(n)        _XCHAL_TIMER_INTERRUPT(n) /* n = 0 .. 3 */
+
+#define XCHAL_HAVE_HIGHLEVEL_INTERRUPTS XCHAL_HAVE_HIGHPRI_INTERRUPTS
+#define XCHAL_NUM_LOWPRI_LEVELS         1      /* Number of low-priority
+                                                * interrupt levels (always 1) */
+#define XCHAL_FIRST_HIGHPRI_LEVEL       (XCHAL_NUM_LOWPRI_LEVELS+1)
+                                               /* Level of first high-priority
+                                                * interrupt (always 2) */
+
+/* Note:  1 <= LOWPRI_LEVELS <= EXCM_LEVEL < DEBUGLEVEL <= NUM_INTLEVELS < NMILEVEL <= 15 */
+
+/* These values are constant for existing Xtensa processor implementations: */
+
+#define XCHAL_INTLEVEL0_MASK            0x00000000
+#define XCHAL_INTLEVEL8_MASK            0x00000000
+#define XCHAL_INTLEVEL9_MASK            0x00000000
+#define XCHAL_INTLEVEL10_MASK           0x00000000
+#define XCHAL_INTLEVEL11_MASK           0x00000000
+#define XCHAL_INTLEVEL12_MASK           0x00000000
+#define XCHAL_INTLEVEL13_MASK           0x00000000
+#define XCHAL_INTLEVEL14_MASK           0x00000000
+#define XCHAL_INTLEVEL15_MASK           0x00000000
+
+/* Array of masks of interrupts at each interrupt level: */
+
+#define XCHAL_INTLEVEL_MASKS XCHAL_INTLEVEL0_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL1_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL2_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL3_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL4_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL5_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL6_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL7_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL8_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL9_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL10_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL11_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL12_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL13_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL14_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL15_MASK
+
+/* These values are constant for existing Xtensa processor implementations: */
+
+#define XCHAL_INTLEVEL0_ANDBELOW_MASK   0x00000000
+#define XCHAL_INTLEVEL8_ANDBELOW_MASK   XCHAL_INTLEVEL7_ANDBELOW_MASK
+#define XCHAL_INTLEVEL9_ANDBELOW_MASK   XCHAL_INTLEVEL7_ANDBELOW_MASK
+#define XCHAL_INTLEVEL10_ANDBELOW_MASK  XCHAL_INTLEVEL7_ANDBELOW_MASK
+#define XCHAL_INTLEVEL11_ANDBELOW_MASK  XCHAL_INTLEVEL7_ANDBELOW_MASK
+#define XCHAL_INTLEVEL12_ANDBELOW_MASK  XCHAL_INTLEVEL7_ANDBELOW_MASK
+#define XCHAL_INTLEVEL13_ANDBELOW_MASK  XCHAL_INTLEVEL7_ANDBELOW_MASK
+#define XCHAL_INTLEVEL14_ANDBELOW_MASK  XCHAL_INTLEVEL7_ANDBELOW_MASK
+#define XCHAL_INTLEVEL15_ANDBELOW_MASK  XCHAL_INTLEVEL7_ANDBELOW_MASK
+
+/* Mask of all low-priority interrupts: */
+
+#define XCHAL_LOWPRI_MASK               XCHAL_INTLEVEL1_ANDBELOW_MASK
+
+/* Mask of all interrupts masked by PS.EXCM (or CEXCM): */
+
+#define XCHAL_EXCM_MASK                 XCHAL_INTLEVEL_ANDBELOW_MASK(XCHAL_EXCM_LEVEL)
+
+/* Array of masks of interrupts at each range 1..n of interrupt levels: */
+
+#define XCHAL_INTLEVEL_ANDBELOW_MASKS XCHAL_INTLEVEL0_ANDBELOW_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL1_ANDBELOW_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL2_ANDBELOW_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL3_ANDBELOW_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL4_ANDBELOW_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL5_ANDBELOW_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL6_ANDBELOW_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL7_ANDBELOW_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL8_ANDBELOW_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL9_ANDBELOW_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL10_ANDBELOW_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL11_ANDBELOW_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL12_ANDBELOW_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL13_ANDBELOW_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL14_ANDBELOW_MASK \
+  XCHAL_SEP XCHAL_INTLEVEL15_ANDBELOW_MASK
+
+#if 0 /* XCHAL_HAVE_NMI */
+
+/* NMI "interrupt level" (for use with EXCSAVE_n, EPS_n, EPC_n, RFI n): */
+
+#  define XCHAL_NMILEVEL                (XCHAL_NUM_INTLEVELS+1)
+#endif
+
+/* Array of levels of each possible interrupt: */
+
+#define XCHAL_INT_LEVELS XCHAL_INT0_LEVEL \
+  XCHAL_SEP XCHAL_INT1_LEVEL \
+  XCHAL_SEP XCHAL_INT2_LEVEL \
+  XCHAL_SEP XCHAL_INT3_LEVEL \
+  XCHAL_SEP XCHAL_INT4_LEVEL \
+  XCHAL_SEP XCHAL_INT5_LEVEL \
+  XCHAL_SEP XCHAL_INT6_LEVEL \
+  XCHAL_SEP XCHAL_INT7_LEVEL \
+  XCHAL_SEP XCHAL_INT8_LEVEL \
+  XCHAL_SEP XCHAL_INT9_LEVEL \
+  XCHAL_SEP XCHAL_INT10_LEVEL \
+  XCHAL_SEP XCHAL_INT11_LEVEL \
+  XCHAL_SEP XCHAL_INT12_LEVEL \
+  XCHAL_SEP XCHAL_INT13_LEVEL \
+  XCHAL_SEP XCHAL_INT14_LEVEL \
+  XCHAL_SEP XCHAL_INT15_LEVEL \
+  XCHAL_SEP XCHAL_INT16_LEVEL \
+  XCHAL_SEP XCHAL_INT17_LEVEL \
+  XCHAL_SEP XCHAL_INT18_LEVEL \
+  XCHAL_SEP XCHAL_INT19_LEVEL \
+  XCHAL_SEP XCHAL_INT20_LEVEL \
+  XCHAL_SEP XCHAL_INT21_LEVEL \
+  XCHAL_SEP XCHAL_INT22_LEVEL \
+  XCHAL_SEP XCHAL_INT23_LEVEL \
+  XCHAL_SEP XCHAL_INT24_LEVEL \
+  XCHAL_SEP XCHAL_INT25_LEVEL \
+  XCHAL_SEP XCHAL_INT26_LEVEL \
+  XCHAL_SEP XCHAL_INT27_LEVEL \
+  XCHAL_SEP XCHAL_INT28_LEVEL \
+  XCHAL_SEP XCHAL_INT29_LEVEL \
+  XCHAL_SEP XCHAL_INT30_LEVEL \
+  XCHAL_SEP XCHAL_INT31_LEVEL
+
+/* Array of types of each possible interrupt: */
+
+#define XCHAL_INT_TYPES XCHAL_INT0_TYPE \
+  XCHAL_SEP XCHAL_INT1_TYPE \
+  XCHAL_SEP XCHAL_INT2_TYPE \
+  XCHAL_SEP XCHAL_INT3_TYPE \
+  XCHAL_SEP XCHAL_INT4_TYPE \
+  XCHAL_SEP XCHAL_INT5_TYPE \
+  XCHAL_SEP XCHAL_INT6_TYPE \
+  XCHAL_SEP XCHAL_INT7_TYPE \
+  XCHAL_SEP XCHAL_INT8_TYPE \
+  XCHAL_SEP XCHAL_INT9_TYPE \
+  XCHAL_SEP XCHAL_INT10_TYPE \
+  XCHAL_SEP XCHAL_INT11_TYPE \
+  XCHAL_SEP XCHAL_INT12_TYPE \
+  XCHAL_SEP XCHAL_INT13_TYPE \
+  XCHAL_SEP XCHAL_INT14_TYPE \
+  XCHAL_SEP XCHAL_INT15_TYPE \
+  XCHAL_SEP XCHAL_INT16_TYPE \
+  XCHAL_SEP XCHAL_INT17_TYPE \
+  XCHAL_SEP XCHAL_INT18_TYPE \
+  XCHAL_SEP XCHAL_INT19_TYPE \
+  XCHAL_SEP XCHAL_INT20_TYPE \
+  XCHAL_SEP XCHAL_INT21_TYPE \
+  XCHAL_SEP XCHAL_INT22_TYPE \
+  XCHAL_SEP XCHAL_INT23_TYPE \
+  XCHAL_SEP XCHAL_INT24_TYPE \
+  XCHAL_SEP XCHAL_INT25_TYPE \
+  XCHAL_SEP XCHAL_INT26_TYPE \
+  XCHAL_SEP XCHAL_INT27_TYPE \
+  XCHAL_SEP XCHAL_INT28_TYPE \
+  XCHAL_SEP XCHAL_INT29_TYPE \
+  XCHAL_SEP XCHAL_INT30_TYPE \
+  XCHAL_SEP XCHAL_INT31_TYPE
+
+/* Array of masks of interrupts for each type of interrupt: */
+
+#define XCHAL_INTTYPE_MASKS XCHAL_INTTYPE_MASK_UNCONFIGURED \
+  XCHAL_SEP XCHAL_INTTYPE_MASK_SOFTWARE \
+  XCHAL_SEP XCHAL_INTTYPE_MASK_EXTERN_EDGE \
+  XCHAL_SEP XCHAL_INTTYPE_MASK_EXTERN_LEVEL \
+  XCHAL_SEP XCHAL_INTTYPE_MASK_TIMER \
+  XCHAL_SEP XCHAL_INTTYPE_MASK_NMI \
+  XCHAL_SEP XCHAL_INTTYPE_MASK_WRITE_ERROR
+
+/* Interrupts that can be cleared using the INTCLEAR special register: */
+
+#define XCHAL_INTCLEARABLE_MASK \
+  (XCHAL_INTTYPE_MASK_SOFTWARE+XCHAL_INTTYPE_MASK_EXTERN_EDGE+XCHAL_INTTYPE_MASK_WRITE_ERROR)
+
+/* Interrupts that can be triggered using the INTSET special register: */
+
+#define XCHAL_INTSETTABLE_MASK          XCHAL_INTTYPE_MASK_SOFTWARE
+
+/* Array of interrupts assigned to each timer (CCOMPARE0 to CCOMPARE3): */
+
+#define XCHAL_TIMER_INTERRUPTS XCHAL_TIMER0_INTERRUPT \
+  XCHAL_SEP XCHAL_TIMER1_INTERRUPT \
+  XCHAL_SEP XCHAL_TIMER2_INTERRUPT \
+  XCHAL_SEP XCHAL_TIMER3_INTERRUPT
+
+/* For backward compatibility and for the array macros, define macros for
+ * each unconfigured interrupt number (unfortunately, the value of
+ * XTHAL_INTTYPE_UNCONFIGURED is not zero):
+ */
+
+#if XCHAL_NUM_INTERRUPTS == 0
+#  define XCHAL_INT0_LEVEL              0
+#  define XCHAL_INT0_TYPE               XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 1
+#  define XCHAL_INT1_LEVEL              0
+#  define XCHAL_INT1_TYPE               XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 2
+#  define XCHAL_INT2_LEVEL              0
+#  define XCHAL_INT2_TYPE               XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 3
+#  define XCHAL_INT3_LEVEL              0
+#  define XCHAL_INT3_TYPE               XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 4
+#  define XCHAL_INT4_LEVEL              0
+#  define XCHAL_INT4_TYPE               XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 5
+#  define XCHAL_INT5_LEVEL              0
+#  define XCHAL_INT5_TYPE               XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 6
+#  define XCHAL_INT6_LEVEL              0
+#  define XCHAL_INT6_TYPE               XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 7
+#  define XCHAL_INT7_LEVEL              0
+#  define XCHAL_INT7_TYPE               XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 8
+#  define XCHAL_INT8_LEVEL              0
+#  define XCHAL_INT8_TYPE               XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 9
+#  define XCHAL_INT9_LEVEL              0
+#  define XCHAL_INT9_TYPE               XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 10
+#  define XCHAL_INT10_LEVEL             0
+#  define XCHAL_INT10_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 11
+#  define XCHAL_INT11_LEVEL             0
+#  define XCHAL_INT11_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 12
+#  define XCHAL_INT12_LEVEL             0
+#  define XCHAL_INT12_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 13
+#  define XCHAL_INT13_LEVEL             0
+#  define XCHAL_INT13_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 14
+#  define XCHAL_INT14_LEVEL             0
+#  define XCHAL_INT14_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 15
+#  define XCHAL_INT15_LEVEL             0
+#  define XCHAL_INT15_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 16
+#  define XCHAL_INT16_LEVEL             0
+#  define XCHAL_INT16_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 17
+#  define XCHAL_INT17_LEVEL             0
+#  define XCHAL_INT17_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 18
+#  define XCHAL_INT18_LEVEL             0
+#  define XCHAL_INT18_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 19
+#  define XCHAL_INT19_LEVEL             0
+#  define XCHAL_INT19_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 20
+#  define XCHAL_INT20_LEVEL             0
+#  define XCHAL_INT20_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 21
+#  define XCHAL_INT21_LEVEL             0
+#  define XCHAL_INT21_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 22
+#  define XCHAL_INT22_LEVEL             0
+#  define XCHAL_INT22_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 23
+#  define XCHAL_INT23_LEVEL             0
+#  define XCHAL_INT23_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 24
+#  define XCHAL_INT24_LEVEL             0
+#  define XCHAL_INT24_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 25
+#  define XCHAL_INT25_LEVEL             0
+#  define XCHAL_INT25_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 26
+#  define XCHAL_INT26_LEVEL             0
+#  define XCHAL_INT26_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 27
+#  define XCHAL_INT27_LEVEL             0
+#  define XCHAL_INT27_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 28
+#  define XCHAL_INT28_LEVEL             0
+#  define XCHAL_INT28_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 29
+#  define XCHAL_INT29_LEVEL             0
+#  define XCHAL_INT29_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 30
+#  define XCHAL_INT30_LEVEL             0
+#  define XCHAL_INT30_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+#if XCHAL_NUM_INTERRUPTS <= 31
+#  define XCHAL_INT31_LEVEL             0
+#  define XCHAL_INT31_TYPE              XTHAL_INTTYPE_UNCONFIGURED
+#endif
+
+/* Masks and levels corresponding to each *external* interrupt. */
+
+#define XCHAL_EXTINT0_MASK              (1 << XCHAL_EXTINT0_NUM)
+#define XCHAL_EXTINT0_LEVEL             XCHAL_INT_LEVEL(XCHAL_EXTINT0_NUM)
+#define XCHAL_EXTINT1_MASK              (1 << XCHAL_EXTINT1_NUM)
+#define XCHAL_EXTINT1_LEVEL             XCHAL_INT_LEVEL(XCHAL_EXTINT1_NUM)
+#define XCHAL_EXTINT2_MASK              (1 << XCHAL_EXTINT2_NUM)
+#define XCHAL_EXTINT2_LEVEL             XCHAL_INT_LEVEL(XCHAL_EXTINT2_NUM)
+#define XCHAL_EXTINT3_MASK              (1 << XCHAL_EXTINT3_NUM)
+#define XCHAL_EXTINT3_LEVEL             XCHAL_INT_LEVEL(XCHAL_EXTINT3_NUM)
+#define XCHAL_EXTINT4_MASK              (1 << XCHAL_EXTINT4_NUM)
+#define XCHAL_EXTINT4_LEVEL             XCHAL_INT_LEVEL(XCHAL_EXTINT4_NUM)
+#define XCHAL_EXTINT5_MASK              (1 << XCHAL_EXTINT5_NUM)
+#define XCHAL_EXTINT5_LEVEL             XCHAL_INT_LEVEL(XCHAL_EXTINT5_NUM)
+#define XCHAL_EXTINT6_MASK              (1 << XCHAL_EXTINT6_NUM)
+#define XCHAL_EXTINT6_LEVEL             XCHAL_INT_LEVEL(XCHAL_EXTINT6_NUM)
+#define XCHAL_EXTINT7_MASK              (1 << XCHAL_EXTINT7_NUM)
+#define XCHAL_EXTINT7_LEVEL             XCHAL_INT_LEVEL(XCHAL_EXTINT7_NUM)
+#define XCHAL_EXTINT8_MASK              (1 << XCHAL_EXTINT8_NUM)
+#define XCHAL_EXTINT8_LEVEL             XCHAL_INT_LEVEL(XCHAL_EXTINT8_NUM)
+#define XCHAL_EXTINT9_MASK              (1 << XCHAL_EXTINT9_NUM)
+#define XCHAL_EXTINT9_LEVEL             XCHAL_INT_LEVEL(XCHAL_EXTINT9_NUM)
+#define XCHAL_EXTINT10_MASK             (1 << XCHAL_EXTINT10_NUM)
+#define XCHAL_EXTINT10_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT10_NUM)
+#define XCHAL_EXTINT11_MASK             (1 << XCHAL_EXTINT11_NUM)
+#define XCHAL_EXTINT11_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT11_NUM)
+#define XCHAL_EXTINT12_MASK             (1 << XCHAL_EXTINT12_NUM)
+#define XCHAL_EXTINT12_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT12_NUM)
+#define XCHAL_EXTINT13_MASK             (1 << XCHAL_EXTINT13_NUM)
+#define XCHAL_EXTINT13_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT13_NUM)
+#define XCHAL_EXTINT14_MASK             (1 << XCHAL_EXTINT14_NUM)
+#define XCHAL_EXTINT14_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT14_NUM)
+#define XCHAL_EXTINT15_MASK             (1 << XCHAL_EXTINT15_NUM)
+#define XCHAL_EXTINT15_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT15_NUM)
+#define XCHAL_EXTINT16_MASK             (1 << XCHAL_EXTINT16_NUM)
+#define XCHAL_EXTINT16_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT16_NUM)
+#define XCHAL_EXTINT17_MASK             (1 << XCHAL_EXTINT17_NUM)
+#define XCHAL_EXTINT17_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT17_NUM)
+#define XCHAL_EXTINT18_MASK             (1 << XCHAL_EXTINT18_NUM)
+#define XCHAL_EXTINT18_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT18_NUM)
+#define XCHAL_EXTINT19_MASK             (1 << XCHAL_EXTINT19_NUM)
+#define XCHAL_EXTINT19_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT19_NUM)
+#define XCHAL_EXTINT20_MASK             (1 << XCHAL_EXTINT20_NUM)
+#define XCHAL_EXTINT20_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT20_NUM)
+#define XCHAL_EXTINT21_MASK             (1 << XCHAL_EXTINT21_NUM)
+#define XCHAL_EXTINT21_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT21_NUM)
+#define XCHAL_EXTINT22_MASK             (1 << XCHAL_EXTINT22_NUM)
+#define XCHAL_EXTINT22_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT22_NUM)
+#define XCHAL_EXTINT23_MASK             (1 << XCHAL_EXTINT23_NUM)
+#define XCHAL_EXTINT23_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT23_NUM)
+#define XCHAL_EXTINT24_MASK             (1 << XCHAL_EXTINT24_NUM)
+#define XCHAL_EXTINT24_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT24_NUM)
+#define XCHAL_EXTINT25_MASK             (1 << XCHAL_EXTINT25_NUM)
+#define XCHAL_EXTINT25_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT25_NUM)
+#define XCHAL_EXTINT26_MASK             (1 << XCHAL_EXTINT26_NUM)
+#define XCHAL_EXTINT26_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT26_NUM)
+#define XCHAL_EXTINT27_MASK             (1 << XCHAL_EXTINT27_NUM)
+#define XCHAL_EXTINT27_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT27_NUM)
+#define XCHAL_EXTINT28_MASK             (1 << XCHAL_EXTINT28_NUM)
+#define XCHAL_EXTINT28_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT28_NUM)
+#define XCHAL_EXTINT29_MASK             (1 << XCHAL_EXTINT29_NUM)
+#define XCHAL_EXTINT29_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT29_NUM)
+#define XCHAL_EXTINT30_MASK             (1 << XCHAL_EXTINT30_NUM)
+#define XCHAL_EXTINT30_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT30_NUM)
+#define XCHAL_EXTINT31_MASK             (1 << XCHAL_EXTINT31_NUM)
+#define XCHAL_EXTINT31_LEVEL            XCHAL_INT_LEVEL(XCHAL_EXTINT31_NUM)
+
+/* Exceptions and Vectors ***************************************************/
+
+/* For backward compatibility ONLY -- DO NOT USE (will be removed in future release): */
+
+#define XCHAL_HAVE_OLD_EXC_ARCH         XCHAL_HAVE_XEA1 /* (DEPRECATED) 1 if
+                                                         * old exception
+                                                         * architecture (XEA1), 
+                                                         * 0 otherwise (eg.
+                                                         * XEA2) */
+#define XCHAL_HAVE_EXCM                 XCHAL_HAVE_XEA2 /* (DEPRECATED) 1 if
+                                                         * PS.EXCM bit exists
+                                                         * (currently equals
+                                                         * XCHAL_HAVE_TLBS) */
+#ifdef XCHAL_USER_VECTOR_VADDR
+#  define XCHAL_PROGRAMEXC_VECTOR_VADDR XCHAL_USER_VECTOR_VADDR
+#  define XCHAL_USEREXC_VECTOR_VADDR    XCHAL_USER_VECTOR_VADDR
+#endif
+#ifdef XCHAL_USER_VECTOR_PADDR
+#  define XCHAL_PROGRAMEXC_VECTOR_PADDR XCHAL_USER_VECTOR_PADDR
+#  define XCHAL_USEREXC_VECTOR_PADDR    XCHAL_USER_VECTOR_PADDR
+#endif
+#ifdef XCHAL_KERNEL_VECTOR_VADDR
+#  define XCHAL_STACKEDEXC_VECTOR_VADDR XCHAL_KERNEL_VECTOR_VADDR
+#  define XCHAL_KERNELEXC_VECTOR_VADDR  XCHAL_KERNEL_VECTOR_VADDR
+#endif
+#ifdef XCHAL_KERNEL_VECTOR_PADDR
+#  define XCHAL_STACKEDEXC_VECTOR_PADDR XCHAL_KERNEL_VECTOR_PADDR
+#  define XCHAL_KERNELEXC_VECTOR_PADDR  XCHAL_KERNEL_VECTOR_PADDR
+#endif
+
+#if 0
+#  if XCHAL_HAVE_DEBUG
+#    define XCHAL_DEBUG_VECTOR_VADDR    XCHAL_INTLEVEL_VECTOR_VADDR(XCHAL_DEBUGLEVEL)
+
+/* This one should only get defined if the corresponding intlevel paddr macro exists: */
+
+#    define XCHAL_DEBUG_VECTOR_PADDR    XCHAL_INTLEVEL_VECTOR_PADDR(XCHAL_DEBUGLEVEL)
+#  endif
+#endif
+
+/* Indexing macros: */
+
+#define _XCHAL_INTLEVEL_VECTOR_VADDR(n) XCHAL_INTLEVEL ## n ## _VECTOR_VADDR
+#define XCHAL_INTLEVEL_VECTOR_VADDR(n)  _XCHAL_INTLEVEL_VECTOR_VADDR(n) /* n = 0  .. 15 */
+
+/* General Exception Causes:
+ *
+ * Values of EXCCAUSE special register set by general exceptions,
+ * which vector to the user, kernel, or double-exception vectors.
+ *
+ * DEPRECATED.  Please use the equivalent EXCCAUSE_xxx macros
+ * defined in .  (Note that these have slightly
+ * different names, they don't just have the XCHAL_ prefix removed.)
+ */
+
+#define XCHAL_EXCCAUSE_ILLEGAL_INSTRUCTION     0  /* Illegal Instruction */
+#define XCHAL_EXCCAUSE_SYSTEM_CALL             1  /* System Call */
+#define XCHAL_EXCCAUSE_INSTRUCTION_FETCH_ERROR 2  /* Instruction Fetch Error */
+#define XCHAL_EXCCAUSE_LOAD_STORE_ERROR        3  /* Load Store Error */
+#define XCHAL_EXCCAUSE_LEVEL1_INTERRUPT        4  /* Level 1 Interrupt */
+#define XCHAL_EXCCAUSE_ALLOCA                  5  /* Stack Extension Assist */
+#define XCHAL_EXCCAUSE_INTEGER_DIVIDE_BY_ZERO  6  /* Integer Divide by Zero */
+#define XCHAL_EXCCAUSE_SPECULATION             7  /* Speculation */
+#define XCHAL_EXCCAUSE_PRIVILEGED              8  /* Privileged Instruction */
+#define XCHAL_EXCCAUSE_UNALIGNED               9  /* Unaligned Load Store */
+                                                  /* 10..15 reserved */
+#define XCHAL_EXCCAUSE_ITLB_MISS               16 /* ITlb Miss Exception */
+#define XCHAL_EXCCAUSE_ITLB_MULTIHIT           17 /* ITlb Mutltihit Exception */
+#define XCHAL_EXCCAUSE_ITLB_PRIVILEGE          18 /* ITlb Privilege Exception */
+#define XCHAL_EXCCAUSE_ITLB_SIZE_RESTRICTION   19 /* ITlb Size Restriction Exception */
+#define XCHAL_EXCCAUSE_FETCH_CACHE_ATTRIBUTE   20 /* Fetch Cache Attribute Exception */
+                                                  /* 21..23 reserved */
+#define XCHAL_EXCCAUSE_DTLB_MISS               24 /* DTlb Miss Exception */
+#define XCHAL_EXCCAUSE_DTLB_MULTIHIT           25 /* DTlb Multihit Exception */
+#define XCHAL_EXCCAUSE_DTLB_PRIVILEGE          26 /* DTlb Privilege Exception */
+#define XCHAL_EXCCAUSE_DTLB_SIZE_RESTRICTION   27 /* DTlb Size Restriction Exception */
+#define XCHAL_EXCCAUSE_LOAD_CACHE_ATTRIBUTE    28 /* Load Cache Attribute  Exception */
+#define XCHAL_EXCCAUSE_STORE_CACHE_ATTRIBUTE   29 /* Store Cache Attribute Exception */
+                                                  /* 30..31 reserved */
+#define XCHAL_EXCCAUSE_COPROCESSOR0_DISABLED   32 /* Coprocessor 0 disabled */
+#define XCHAL_EXCCAUSE_COPROCESSOR1_DISABLED   33 /* Coprocessor 1 disabled */
+#define XCHAL_EXCCAUSE_COPROCESSOR2_DISABLED   34 /* Coprocessor 2 disabled */
+#define XCHAL_EXCCAUSE_COPROCESSOR3_DISABLED   35 /* Coprocessor 3 disabled */
+#define XCHAL_EXCCAUSE_COPROCESSOR4_DISABLED   36 /* Coprocessor 4 disabled */
+#define XCHAL_EXCCAUSE_COPROCESSOR5_DISABLED   37 /* Coprocessor 5 disabled */
+#define XCHAL_EXCCAUSE_COPROCESSOR6_DISABLED   38 /* Coprocessor 6 disabled */
+#define XCHAL_EXCCAUSE_COPROCESSOR7_DISABLED   39 /* Coprocessor 7 disabled */
+                                                  /* 40..63 reserved */
+
+/* Miscellaneous special register fields.
+ *
+ * For each special register, and each field within each register:
+ *   XCHAL__VALIDMASK is the set of bits defined in the register.
+ *   XCHAL___BITS is the number of bits in the field.
+ *   XCHAL___NUM is 2^bits, the number of possible values
+ *           of the field.
+ *   XCHAL___SHIFT is the position of the field within
+ *           the register, starting from the least significant bit.
+ *
+ * DEPRECATED.  Please use the equivalent macros defined in
+ * .  (Note that these have different names.)
+ */
+
+/* DBREAKC (special register number 160): */
+
+#define XCHAL_DBREAKC_VALIDMASK         0xC000003F
+#define XCHAL_DBREAKC_MASK_BITS         6
+#define XCHAL_DBREAKC_MASK_NUM          64
+#define XCHAL_DBREAKC_MASK_SHIFT        0
+#define XCHAL_DBREAKC_MASK_MASK         0x0000003F
+#define XCHAL_DBREAKC_LOADBREAK_BITS    1
+#define XCHAL_DBREAKC_LOADBREAK_NUM     2
+#define XCHAL_DBREAKC_LOADBREAK_SHIFT   30
+#define XCHAL_DBREAKC_LOADBREAK_MASK    0x40000000
+#define XCHAL_DBREAKC_STOREBREAK_BITS   1
+#define XCHAL_DBREAKC_STOREBREAK_NUM    2
+#define XCHAL_DBREAKC_STOREBREAK_SHIFT  31
+#define XCHAL_DBREAKC_STOREBREAK_MASK   0x80000000
+
+/* PS (special register number 230): */
+
+#define XCHAL_PS_VALIDMASK              0x00070F3F
+#define XCHAL_PS_INTLEVEL_BITS          4
+#define XCHAL_PS_INTLEVEL_NUM           16
+#define XCHAL_PS_INTLEVEL_SHIFT         0
+#define XCHAL_PS_INTLEVEL_MASK          0x0000000F
+#define XCHAL_PS_EXCM_BITS              1
+#define XCHAL_PS_EXCM_NUM               2
+#define XCHAL_PS_EXCM_SHIFT             4
+#define XCHAL_PS_EXCM_MASK              0x00000010
+#define XCHAL_PS_UM_BITS                1
+#define XCHAL_PS_UM_NUM                 2
+#define XCHAL_PS_UM_SHIFT               5
+#define XCHAL_PS_UM_MASK                0x00000020
+#define XCHAL_PS_RING_BITS              2
+#define XCHAL_PS_RING_NUM               4
+#define XCHAL_PS_RING_SHIFT             6
+#define XCHAL_PS_RING_MASK              0x000000C0
+#define XCHAL_PS_OWB_BITS               4
+#define XCHAL_PS_OWB_NUM                16
+#define XCHAL_PS_OWB_SHIFT              8
+#define XCHAL_PS_OWB_MASK               0x00000F00
+#define XCHAL_PS_CALLINC_BITS           2
+#define XCHAL_PS_CALLINC_NUM            4
+#define XCHAL_PS_CALLINC_SHIFT          16
+#define XCHAL_PS_CALLINC_MASK           0x00030000
+#define XCHAL_PS_WOE_BITS               1
+#define XCHAL_PS_WOE_NUM                2
+#define XCHAL_PS_WOE_SHIFT              18
+#define XCHAL_PS_WOE_MASK               0x00040000
+
+/* EXCCAUSE (special register number 232): */
+
+#define XCHAL_EXCCAUSE_VALIDMASK        0x0000003F
+#define XCHAL_EXCCAUSE_BITS             6
+#define XCHAL_EXCCAUSE_NUM              64
+#define XCHAL_EXCCAUSE_SHIFT            0
+#define XCHAL_EXCCAUSE_MASK             0x0000003F
+
+/* DEBUGCAUSE (special register number 233): */
+
+#define XCHAL_DEBUGCAUSE_VALIDMASK      0x0000003F
+#define XCHAL_DEBUGCAUSE_ICOUNT_BITS    1
+#define XCHAL_DEBUGCAUSE_ICOUNT_NUM     2
+#define XCHAL_DEBUGCAUSE_ICOUNT_SHIFT   0
+#define XCHAL_DEBUGCAUSE_ICOUNT_MASK    0x00000001
+#define XCHAL_DEBUGCAUSE_IBREAK_BITS    1
+#define XCHAL_DEBUGCAUSE_IBREAK_NUM     2
+#define XCHAL_DEBUGCAUSE_IBREAK_SHIFT   1
+#define XCHAL_DEBUGCAUSE_IBREAK_MASK    0x00000002
+#define XCHAL_DEBUGCAUSE_DBREAK_BITS    1
+#define XCHAL_DEBUGCAUSE_DBREAK_NUM     2
+#define XCHAL_DEBUGCAUSE_DBREAK_SHIFT   2
+#define XCHAL_DEBUGCAUSE_DBREAK_MASK    0x00000004
+#define XCHAL_DEBUGCAUSE_BREAK_BITS     1
+#define XCHAL_DEBUGCAUSE_BREAK_NUM      2
+#define XCHAL_DEBUGCAUSE_BREAK_SHIFT    3
+#define XCHAL_DEBUGCAUSE_BREAK_MASK     0x00000008
+#define XCHAL_DEBUGCAUSE_BREAKN_BITS    1
+#define XCHAL_DEBUGCAUSE_BREAKN_NUM     2
+#define XCHAL_DEBUGCAUSE_BREAKN_SHIFT   4
+#define XCHAL_DEBUGCAUSE_BREAKN_MASK    0x00000010
+#define XCHAL_DEBUGCAUSE_DEBUGINT_BITS  1
+#define XCHAL_DEBUGCAUSE_DEBUGINT_NUM   2
+#define XCHAL_DEBUGCAUSE_DEBUGINT_SHIFT 5
+#define XCHAL_DEBUGCAUSE_DEBUGINT_MASK  0x00000020
+
+/* Timers *******************************************************************/
+
+/* #define XCHAL_HAVE_TIMERS        XCHAL_HAVE_CCOUNT */
+
+/* Internal I/D RAMS/ROMS and XLMI ******************************************/
+
+#define XCHAL_NUM_IROM                  XCHAL_NUM_INSTROM     /* (DEPRECATED) */
+#define XCHAL_NUM_IRAM                  XCHAL_NUM_INSTRAM     /* (DEPRECATED) */
+#define XCHAL_NUM_DROM                  XCHAL_NUM_DATAROM     /* (DEPRECATED) */
+#define XCHAL_NUM_DRAM                  XCHAL_NUM_DATARAM     /* (DEPRECATED) */
+
+#define XCHAL_IROM0_VADDR               XCHAL_INSTROM0_VADDR  /* (DEPRECATED) */
+#define XCHAL_IROM0_PADDR               XCHAL_INSTROM0_PADDR  /* (DEPRECATED) */
+#define XCHAL_IROM0_SIZE                XCHAL_INSTROM0_SIZE   /* (DEPRECATED) */
+#define XCHAL_IROM1_VADDR               XCHAL_INSTROM1_VADDR  /* (DEPRECATED) */
+#define XCHAL_IROM1_PADDR               XCHAL_INSTROM1_PADDR  /* (DEPRECATED) */
+#define XCHAL_IROM1_SIZE                XCHAL_INSTROM1_SIZE   /* (DEPRECATED) */
+#define XCHAL_IRAM0_VADDR               XCHAL_INSTRAM0_VADDR  /* (DEPRECATED) */
+#define XCHAL_IRAM0_PADDR               XCHAL_INSTRAM0_PADDR  /* (DEPRECATED) */
+#define XCHAL_IRAM0_SIZE                XCHAL_INSTRAM0_SIZE   /* (DEPRECATED) */
+#define XCHAL_IRAM1_VADDR               XCHAL_INSTRAM1_VADDR  /* (DEPRECATED) */
+#define XCHAL_IRAM1_PADDR               XCHAL_INSTRAM1_PADDR  /* (DEPRECATED) */
+#define XCHAL_IRAM1_SIZE                XCHAL_INSTRAM1_SIZE   /* (DEPRECATED) */
+#define XCHAL_DROM0_VADDR               XCHAL_DATAROM0_VADDR  /* (DEPRECATED) */
+#define XCHAL_DROM0_PADDR               XCHAL_DATAROM0_PADDR  /* (DEPRECATED) */
+#define XCHAL_DROM0_SIZE                XCHAL_DATAROM0_SIZE   /* (DEPRECATED) */
+#define XCHAL_DROM1_VADDR               XCHAL_DATAROM1_VADDR  /* (DEPRECATED) */
+#define XCHAL_DROM1_PADDR               XCHAL_DATAROM1_PADDR  /* (DEPRECATED) */
+#define XCHAL_DROM1_SIZE                XCHAL_DATAROM1_SIZE   /* (DEPRECATED) */
+#define XCHAL_DRAM0_VADDR               XCHAL_DATARAM0_VADDR  /* (DEPRECATED) */
+#define XCHAL_DRAM0_PADDR               XCHAL_DATARAM0_PADDR  /* (DEPRECATED) */
+#define XCHAL_DRAM0_SIZE                XCHAL_DATARAM0_SIZE   /* (DEPRECATED) */
+#define XCHAL_DRAM1_VADDR               XCHAL_DATARAM1_VADDR  /* (DEPRECATED) */
+#define XCHAL_DRAM1_PADDR               XCHAL_DATARAM1_PADDR  /* (DEPRECATED) */
+#define XCHAL_DRAM1_SIZE                XCHAL_DATARAM1_SIZE   /* (DEPRECATED) */
+
+/* Cache ********************************************************************/
+
+/* Default PREFCTL value to enable prefetch. */
+
+#if XCHAL_HW_MIN_VERSION < XTENSA_HWVERSION_RE_2012_0
+#  define XCHAL_CACHE_PREFCTL_DEFAULT   0x00044  /* Enabled, not aggressive */
+#elif XCHAL_HW_MIN_VERSION < XTENSA_HWVERSION_RF_2014_0
+#  define XCHAL_CACHE_PREFCTL_DEFAULT   0x01044  /* + enable prefetch to L1 */
+#elif XCHAL_PREFETCH_ENTRIES >= 16
+#  define XCHAL_CACHE_PREFCTL_DEFAULT   0x81044  /* 12 entries for block ops */
+#elif XCHAL_PREFETCH_ENTRIES >= 8
+#  define XCHAL_CACHE_PREFCTL_DEFAULT   0x51044  /* 5 entries for block ops */
+#else
+#  define XCHAL_CACHE_PREFCTL_DEFAULT   0x01044  /* 0 entries for block ops */
+#endif
+
+/* Max for both I-cache and D-cache (used for general alignment): */
+
+#if XCHAL_ICACHE_LINESIZE > XCHAL_DCACHE_LINESIZE
+#  define XCHAL_CACHE_LINEWIDTH_MAX     XCHAL_ICACHE_LINEWIDTH
+#  define XCHAL_CACHE_LINESIZE_MAX      XCHAL_ICACHE_LINESIZE
+#else
+#  define XCHAL_CACHE_LINEWIDTH_MAX     XCHAL_DCACHE_LINEWIDTH
+#  define XCHAL_CACHE_LINESIZE_MAX      XCHAL_DCACHE_LINESIZE
+#endif
+
+#define XCHAL_ICACHE_SETSIZE            (1 << XCHAL_ICACHE_SETWIDTH)
+#define XCHAL_DCACHE_SETSIZE            (1 << XCHAL_DCACHE_SETWIDTH)
+
+/* Max for both I and D caches (used for cache-coherency page alignment): */
+
+#if XCHAL_ICACHE_SETWIDTH > XCHAL_DCACHE_SETWIDTH
+#  define XCHAL_CACHE_SETWIDTH_MAX      XCHAL_ICACHE_SETWIDTH
+#  define XCHAL_CACHE_SETSIZE_MAX       XCHAL_ICACHE_SETSIZE
+#else
+#  define XCHAL_CACHE_SETWIDTH_MAX      XCHAL_DCACHE_SETWIDTH
+#  define XCHAL_CACHE_SETSIZE_MAX       XCHAL_DCACHE_SETSIZE
+#endif
+
+/* Instruction cache tag bits: */
+
+#define XCHAL_ICACHE_TAG_V_SHIFT        0
+#define XCHAL_ICACHE_TAG_V              0x1  /* Valid bit */
+#if XCHAL_ICACHE_WAYS > 1
+#  define XCHAL_ICACHE_TAG_F_SHIFT      1
+#  define XCHAL_ICACHE_TAG_F            0x2  /* Fill (LRU) bit */
+#else
+#  define XCHAL_ICACHE_TAG_F_SHIFT      0
+#  define XCHAL_ICACHE_TAG_F            0    /* No fill (LRU) bit */
+#endif
+#if XCHAL_ICACHE_LINE_LOCKABLE
+#  define XCHAL_ICACHE_TAG_L_SHIFT      (XCHAL_ICACHE_TAG_F_SHIFT+1)
+#  define XCHAL_ICACHE_TAG_L            (1 << XCHAL_ICACHE_TAG_L_SHIFT)  /* Lock bit */
+#else
+#  define XCHAL_ICACHE_TAG_L_SHIFT      XCHAL_ICACHE_TAG_F_SHIFT
+#  define XCHAL_ICACHE_TAG_L            0    /* No lock bit */
+#endif
+
+/* Data cache tag bits: */
+
+#define XCHAL_DCACHE_TAG_V_SHIFT        0
+#define XCHAL_DCACHE_TAG_V              0x1  /* Valid bit */
+#if XCHAL_DCACHE_WAYS > 1
+#  define XCHAL_DCACHE_TAG_F_SHIFT      1
+#  define XCHAL_DCACHE_TAG_F            0x2  /* Fill (LRU) bit */
+#else
+#  define XCHAL_DCACHE_TAG_F_SHIFT      0
+#  define XCHAL_DCACHE_TAG_F            0    /* No fill (LRU) bit */
+#endif
+#if XCHAL_DCACHE_IS_WRITEBACK
+#  define XCHAL_DCACHE_TAG_D_SHIFT      (XCHAL_DCACHE_TAG_F_SHIFT+1)
+#  define XCHAL_DCACHE_TAG_D            (1 << XCHAL_DCACHE_TAG_D_SHIFT) /* Dirty  bit */
+#else
+#  define XCHAL_DCACHE_TAG_D_SHIFT      XCHAL_DCACHE_TAG_F_SHIFT
+#  define XCHAL_DCACHE_TAG_D            0  /* No dirty bit */
+#endif
+#if XCHAL_DCACHE_LINE_LOCKABLE
+#  define XCHAL_DCACHE_TAG_L_SHIFT      (XCHAL_DCACHE_TAG_D_SHIFT+1)
+#  define XCHAL_DCACHE_TAG_L            (1 << XCHAL_DCACHE_TAG_L_SHIFT) /* Lock bit */
+#else
+#  define XCHAL_DCACHE_TAG_L_SHIFT      XCHAL_DCACHE_TAG_D_SHIFT
+#  define XCHAL_DCACHE_TAG_L            0 /* No lock bit */
+#endif
+
+/* Whether MEMCTL register has anything useful */
+
+#define XCHAL_USE_MEMCTL \
+  (((XCHAL_LOOP_BUFFER_SIZE > 0) || \
+    XCHAL_DCACHE_IS_COHERENT || \
+    XCHAL_HAVE_ICACHE_DYN_WAYS || \
+    XCHAL_HAVE_DCACHE_DYN_WAYS) && \
+   (XCHAL_HW_MIN_VERSION >= XTENSA_HWVERSION_RE_2012_0))
+
+/* Default MEMCTL values: */
+
+#if XCHAL_HAVE_ICACHE_DYN_WAYS || XCHAL_HAVE_DCACHE_DYN_WAYS
+
+/* NOTE: constant defined this way to allow movi instead of l32r in reset code. */
+
+#  define XCHAL_CACHE_MEMCTL_DEFAULT    0xFFFFFF00  /* Init all possible ways */
+#else
+#  define XCHAL_CACHE_MEMCTL_DEFAULT    0x00000000  /* Nothing to do */
+#endif
+
+#if XCHAL_DCACHE_IS_COHERENT
+#  define _MEMCTL_SNOOP_EN              0x02  /* Enable snoop */
+#else
+#  define _MEMCTL_SNOOP_EN              0x00  /* Don't enable snoop */
+#endif
+
+#if (XCHAL_LOOP_BUFFER_SIZE == 0) || XCHAL_ERRATUM_453
+#  define _MEMCTL_L0IBUF_EN             0x00  /* No loop buffer or don't enable */
+#else
+#  define _MEMCTL_L0IBUF_EN             0x01  /* Enable loop buffer */
+#endif
+
+#define XCHAL_SNOOP_LB_MEMCTL_DEFAULT   (_MEMCTL_SNOOP_EN | _MEMCTL_L0IBUF_EN)
+
+/* MMU **********************************************************************/
+
+/* See  for more details. */
+
+/* Has different semantic in open source headers (where it means HAVE_PTP_MMU),
+ * so comment out starting with RB-2008.3 release; later, might get
+ * get reintroduced as a synonym for XCHAL_HAVE_PTP_MMU instead:
+ */
+
+/* #define XCHAL_HAVE_MMU               XCHAL_HAVE_TLBS*//* (DEPRECATED; use XCHAL_HAVE_TLBS instead) */
+
+/* Indexing macros: */
+
+#define _XCHAL_ITLB_SET(n,_what)        XCHAL_ITLB_SET ## n ## _what
+#define XCHAL_ITLB_SET(n,what)          _XCHAL_ITLB_SET(n, _ ## what )
+#define _XCHAL_ITLB_SET_E(n,i,_what)    XCHAL_ITLB_SET ## n ## _E ## i ## _what
+#define XCHAL_ITLB_SET_E(n,i,what)      _XCHAL_ITLB_SET_E(n,i, _ ## what )
+#define _XCHAL_DTLB_SET(n,_what)        XCHAL_DTLB_SET ## n ## _what
+#define XCHAL_DTLB_SET(n,what)          _XCHAL_DTLB_SET(n, _ ## what )
+#define _XCHAL_DTLB_SET_E(n,i,_what)    XCHAL_DTLB_SET ## n ## _E ## i ## _what
+#define XCHAL_DTLB_SET_E(n,i,what)      _XCHAL_DTLB_SET_E(n,i, _ ## what )
+
+/* Example use:  XCHAL_ITLB_SET(XCHAL_ITLB_ARF_SET0,ENTRIES)
+ * to get the value of XCHAL_ITLB_SET_ENTRIES where  is the first auto-refill set.
+ */
+
+/* Number of entries per autorefill way: */
+
+#define XCHAL_ITLB_ARF_ENTRIES          (1 << XCHAL_ITLB_ARF_ENTRIES_LOG2)
+#define XCHAL_DTLB_ARF_ENTRIES          (1 << XCHAL_DTLB_ARF_ENTRIES_LOG2)
+
+/* Determine whether we have a full MMU (with Page Table and Protection)
+ * usable for an MMU-based OS:
+ */
+
+#if 0
+#  if XCHAL_HAVE_TLBS && !XCHAL_HAVE_SPANNING_WAY && XCHAL_ITLB_ARF_WAYS > 0 && \
+      XCHAL_DTLB_ARF_WAYS > 0 && XCHAL_MMU_RINGS >= 2
+#    define XCHAL_HAVE_PTP_MMU          1  /* Have full MMU (with page table
+                                            * [autorefill] and protection) */
+#  else
+#    define XCHAL_HAVE_PTP_MMU          0  /* Don't have full MMU */
+#  endif
+#endif
+
+/* For full MMUs, report kernel RAM segment and kernel I/O segment static
+ * page mappings:
+ */
+
+#if XCHAL_HAVE_PTP_MMU && !XCHAL_HAVE_SPANNING_WAY
+#  define XCHAL_KSEG_CACHED_VADDR       0xD0000000 /* virt.addr of kernel
+                                                    * RAM cached static
+                                                    * map */
+#  define XCHAL_KSEG_CACHED_PADDR       0x00000000 /* phys.addr of
+                                                    * kseg_cached */
+#  define XCHAL_KSEG_CACHED_SIZE        0x08000000 /* size in bytes of
+                                                    * kseg_cached (assumed 
+                                                    * power of 2!!!) */
+#  define XCHAL_KSEG_BYPASS_VADDR       0xD8000000 /* virt.addr of kernel
+                                                    * RAM bypass
+                                                    * (uncached) static
+                                                    * map */
+#  define XCHAL_KSEG_BYPASS_PADDR       0x00000000 /* phys.addr of
+                                                    * kseg_bypass */
+#  define XCHAL_KSEG_BYPASS_SIZE        0x08000000 /* size in bytes of
+                                                    * kseg_bypass (assumed 
+                                                    * power of 2!!!) */
+#  define XCHAL_KIO_CACHED_VADDR        0xE0000000 /* virt.addr of kernel
+                                                    * I/O cached static
+                                                    * map */
+#  define XCHAL_KIO_CACHED_PADDR        0xF0000000 /* phys.addr of
+                                                    * kio_cached */
+#  define XCHAL_KIO_CACHED_SIZE         0x10000000 /* size in bytes of kio_cached
+                                                    * (assumed power of 2!!!) */
+#  define XCHAL_KIO_BYPASS_VADDR        0xF0000000 /* virt.addr of kernel
+                                                    * I/O bypass
+                                                    * (uncached) static
+                                                    * map */
+#  define XCHAL_KIO_BYPASS_PADDR        0xF0000000 /* phys.addr of
+                                                    * kio_bypass */
+#  define XCHAL_KIO_BYPASS_SIZE         0x10000000 /* size in bytes of kio_bypass
+                                                    * (assumed power of 2!!!) */
+#  define XCHAL_SEG_MAPPABLE_VADDR      0x00000000 /* start of largest
+                                                    * non-static-mapped virtual
+                                                    * addr area */
+#  define XCHAL_SEG_MAPPABLE_SIZE       0xD0000000 /* size in bytes of " */
+
+/* define XCHAL_SEG_MAPPABLE2_xxx if more areas present, sorted in order of
+ * descending size.
+ */
+#endif
+
+/* Misc. ****************************************************
+
+/* Data alignment required if used for instructions: */
+
+#if XCHAL_INST_FETCH_WIDTH > XCHAL_DATA_WIDTH
+#  define XCHAL_ALIGN_MAX               XCHAL_INST_FETCH_WIDTH
+#else
+#  define XCHAL_ALIGN_MAX               XCHAL_DATA_WIDTH
+#endif
+
+/* Names kept for backward compatibility.
+ * (Here "RELEASE" is now a misnomer; these are product *versions*, not the releases
+ *  under which they are released.  In the T10##.# era there was no distinction.)
+ */
+
+#define XCHAL_HW_RELEASE_MAJOR          XCHAL_HW_VERSION_MAJOR
+#define XCHAL_HW_RELEASE_MINOR          XCHAL_HW_VERSION_MINOR
+#define XCHAL_HW_RELEASE_NAME           XCHAL_HW_VERSION_NAME
+
+/* Co-processors and extra state ********************************************/
+
+#define XCHAL_EXTRA_SA_SIZE             XCHAL_NCP_SA_SIZE
+#define XCHAL_EXTRA_SA_ALIGN            XCHAL_NCP_SA_ALIGN
+#define XCHAL_CPEXTRA_SA_SIZE           XCHAL_TOTAL_SA_SIZE
+#define XCHAL_CPEXTRA_SA_ALIGN          XCHAL_TOTAL_SA_ALIGN
+
+#ifdef __ASSEMBLY__
+
+/* Invoked at start of save area load/store sequence macro to setup macro
+ * internal offsets.  Not usually invoked directly.  continue 0 for 1st
+ * sequence, 1 for subsequent consecutive ones.  totofs offset from
+ * original ptr to next load/store location.
+ */
+
+	.macro	xchal_sa_start	continue totofs
+	.ifeq	\continue
+	.set	.Lxchal_pofs_, 0						/* offset from original ptr to current \ptr */
+	.set	.Lxchal_ofs_, 0							/* offset from current \ptr to next load/store location */
+	.endif
+	.if		\totofs + 1								/* if totofs specified (not -1) */
+	.set	.Lxchal_ofs_, \totofs - .Lxchal_pofs_	/* specific offset from original ptr */
+	.endif
+	.endm
+
+/* Align portion of save area and bring ptr in range if necessary.  Used by 
+ * save area load/store sequences.  Not usually invoked directly.  Allows
+ * combining multiple (sub-)sequences arbitrarily.  ptr pointer to save
+ * area (may be off, see .Lxchal_pofs_) minofs,maxofs range of offset from
+ * cur ptr to next load/store loc; minofs <= 0 <= maxofs (0 must always be
+ * valid offset) range must be within +/- 30kB or so.  ofsalign alignment
+ * granularity of minofs .. maxofs (pow of 2) (restriction on offset from
+ * ptr to next load/store loc) totalign align from orig ptr to next
+ * load/store loc (pow of 2)
+ */
+
+	.macro  xchal_sa_align  ptr minofs maxofs ofsalign totalign
+
+	/*  First align where we start accessing the next register
+	 *  per \totalign relative to original ptr (i.e. start of the save area):
+	 */
+
+	.set    .Lxchal_ofs_, ((.Lxchal_pofs_ + .Lxchal_ofs_ + \totalign - 1) & -\totalign) - .Lxchal_pofs_
+
+	/*  If necessary, adjust \ptr to bring .Lxchal_ofs_ in acceptable range:  */
+
+	.if		(((\maxofs) - .Lxchal_ofs_) & 0xC0000000) | ((.Lxchal_ofs_ - (\minofs)) & 0xC0000000) | (.Lxchal_ofs_ & (\ofsalign-1))
+	.set	.Ligmask, 0xFFFFFFFF    /* TODO: optimize to addmi, per aligns and .Lxchal_ofs_ */
+	addi	\ptr, \ptr, (.Lxchal_ofs_ & .Ligmask)
+	.set	.Lxchal_pofs_, .Lxchal_pofs_ + (.Lxchal_ofs_ & .Ligmask)
+	.set	.Lxchal_ofs_, (.Lxchal_ofs_ & ~.Ligmask)
+	.endif
+	.endm
+
+/* We could optimize for addi to expand to only addmi instead of
+ * "addmi;addi", where possible.  Here's a partial example how:
+ *
+ * .set    .Lmaxmask, -(\ofsalign) & -(\totalign)
+ * .if (((\maxofs) + ~.Lmaxmask + 1) & 0xFFFFFF00) && ((.Lxchal_ofs_ & ~.Lmaxmask) == 0)
+ *  .set    .Ligmask, 0xFFFFFF00
+ * .elif ... ditto for negative ofs range ...
+ *  .set .Ligmask, 0xFFFFFF00
+ *  .set ... adjust per offset ...
+ * .else
+ *  .set .Ligmask, 0xFFFFFFFF
+ * .endif
+ *
+
+/* Invoke this after xchal_XXX_{load,store} macros to restore \ptr. */
+
+	.macro	xchal_sa_ptr_restore	ptr
+	.if		.Lxchal_pofs_
+	addi	\ptr, \ptr, - .Lxchal_pofs_
+	.set	.Lxchal_ofs_, .Lxchal_ofs_ + .Lxchal_pofs_
+	.set	.Lxchal_pofs_, 0
+	.endif
+	.endm
+
+/* Use as eg:
+ *   xchal_atmps_store a1, SOMEOFS, XCHAL_SA_NUM_ATMPS, a4, a5
+ *   xchal_ncp_load a2, a0,a3,a4,a5
+ *   xchal_atmps_load  a1, SOMEOFS, XCHAL_SA_NUM_ATMPS, a4, a5
+ *
+ * Specify only the ARs you *haven't* saved/restored already, up to 4.
+ * They *must* be the *last* ARs (in same order) specified to save area
+ * load/store sequences.  In the example above, a0 and a3 were already
+ * saved/restored and unused (thus available) but a4 and a5 were not.
+ */
+
+#define xchal_atmps_store               xchal_atmps_loadstore s32i,
+#define xchal_atmps_load                xchal_atmps_loadstore l32i,
+
+	.macro	xchal_atmps_loadstore	inst ptr offset nreq aa=0 ab=0 ac=0 ad=0
+	.set	.Lnsaved_, 0
+	.irp	reg,\aa,\ab,\ac,\ad
+	.ifeq	0x\reg ; .set .Lnsaved_,.Lnsaved_+1 ; .endif
+	.endr
+	.set	.Laofs_, 0
+	.irp	reg,\aa,\ab,\ac,\ad
+	.ifgt	(\nreq)-.Lnsaved_
+	\inst	\reg, \ptr, .Laofs_+\offset
+	.set	.Laofs_,.Laofs_+4
+	.set	.Lnsaved_,.Lnsaved_+1
+	.endif
+	.endr
+	.endm
+
+
+/* #define xchal_ncp_load_a2            xchal_ncp_load		a2,a3,a4,a5,a6 */
+/* #define xchal_ncp_store_a2           xchal_ncp_store		a2,a3,a4,a5,a6 */
+#  define xchal_extratie_load           xchal_ncptie_load
+#  define xchal_extratie_store          xchal_ncptie_store
+#  define xchal_extratie_load_a2        xchal_ncptie_load	a2,a3,a4,a5,a6
+#  define xchal_extratie_store_a2       xchal_ncptie_store	a2,a3,a4,a5,a6
+#  define xchal_extra_load              xchal_ncp_load
+#  define xchal_extra_store             xchal_ncp_store
+#  define xchal_extra_load_a2           xchal_ncp_load		a2,a3,a4,a5,a6
+#  define xchal_extra_store_a2          xchal_ncp_store		a2,a3,a4,a5,a6
+#  define xchal_extra_load_funcbody     xchal_ncp_load		a2,a3,a4,a5,a6
+#  define xchal_extra_store_funcbody    xchal_ncp_store		a2,a3,a4,a5,a6
+#  define xchal_cp0_store_a2            xchal_cp0_store		a2,a3,a4,a5,a6
+#  define xchal_cp0_load_a2             xchal_cp0_load		a2,a3,a4,a5,a6
+#  define xchal_cp1_store_a2            xchal_cp1_store		a2,a3,a4,a5,a6
+#  define xchal_cp1_load_a2             xchal_cp1_load		a2,a3,a4,a5,a6
+#  define xchal_cp2_store_a2            xchal_cp2_store		a2,a3,a4,a5,a6
+#  define xchal_cp2_load_a2             xchal_cp2_load		a2,a3,a4,a5,a6
+#  define xchal_cp3_store_a2            xchal_cp3_store		a2,a3,a4,a5,a6
+#  define xchal_cp3_load_a2             xchal_cp3_load		a2,a3,a4,a5,a6
+#  define xchal_cp4_store_a2            xchal_cp4_store		a2,a3,a4,a5,a6
+#  define xchal_cp4_load_a2             xchal_cp4_load		a2,a3,a4,a5,a6
+#  define xchal_cp5_store_a2            xchal_cp5_store		a2,a3,a4,a5,a6
+#  define xchal_cp5_load_a2             xchal_cp5_load		a2,a3,a4,a5,a6
+#  define xchal_cp6_store_a2            xchal_cp6_store		a2,a3,a4,a5,a6
+#  define xchal_cp6_load_a2             xchal_cp6_load		a2,a3,a4,a5,a6
+#  define xchal_cp7_store_a2            xchal_cp7_store		a2,a3,a4,a5,a6
+#  define xchal_cp7_load_a2             xchal_cp7_load		a2,a3,a4,a5,a6
+
+/* Empty placeholder macros for undefined coprocessors: */
+
+#if (XCHAL_CP_MASK & ~XCHAL_CP_PORT_MASK) == 0
+# if XCHAL_CP0_SA_SIZE == 0
+    .macro xchal_cp0_store  p a b c d continue=0 ofs=-1 select=-1 ; .endm
+    .macro xchal_cp0_load   p a b c d continue=0 ofs=-1 select=-1 ; .endm
+# endif
+# if XCHAL_CP1_SA_SIZE == 0
+    .macro xchal_cp1_store  p a b c d continue=0 ofs=-1 select=-1 ; .endm
+    .macro xchal_cp1_load   p a b c d continue=0 ofs=-1 select=-1 ; .endm
+# endif
+# if XCHAL_CP2_SA_SIZE == 0
+    .macro xchal_cp2_store  p a b c d continue=0 ofs=-1 select=-1 ; .endm
+    .macro xchal_cp2_load   p a b c d continue=0 ofs=-1 select=-1 ; .endm
+# endif
+# if XCHAL_CP3_SA_SIZE == 0
+    .macro xchal_cp3_store  p a b c d continue=0 ofs=-1 select=-1 ; .endm
+    .macro xchal_cp3_load   p a b c d continue=0 ofs=-1 select=-1 ; .endm
+# endif
+# if XCHAL_CP4_SA_SIZE == 0
+    .macro xchal_cp4_store  p a b c d continue=0 ofs=-1 select=-1 ; .endm
+    .macro xchal_cp4_load   p a b c d continue=0 ofs=-1 select=-1 ; .endm
+# endif
+# if XCHAL_CP5_SA_SIZE == 0
+    .macro xchal_cp5_store  p a b c d continue=0 ofs=-1 select=-1 ; .endm
+    .macro xchal_cp5_load   p a b c d continue=0 ofs=-1 select=-1 ; .endm
+# endif
+# if XCHAL_CP6_SA_SIZE == 0
+    .macro xchal_cp6_store  p a b c d continue=0 ofs=-1 select=-1 ; .endm
+    .macro xchal_cp6_load   p a b c d continue=0 ofs=-1 select=-1 ; .endm
+# endif
+# if XCHAL_CP7_SA_SIZE == 0
+    .macro xchal_cp7_store  p a b c d continue=0 ofs=-1 select=-1 ; .endm
+    .macro xchal_cp7_load   p a b c d continue=0 ofs=-1 select=-1 ; .endm
+# endif
+#endif
+
+/* Macros to create functions that save and restore the state of *any* TIE
+ *  coprocessor (by dynamic index).
+ */
+
+/* Macro that expands to the body of a function that stores the selected
+ * coprocessor's state (registers etc).
+ *
+ * Entry: a2 = ptr to save area in which to save cp state
+ *        a3 = coprocessor number
+ * Exit:  any register a2-a15 (?) may have been clobbered.
+ */
+
+	.macro	xchal_cpi_store_funcbody
+#if (XCHAL_CP_MASK & ~XCHAL_CP_PORT_MASK)
+# if XCHAL_CP0_SA_SIZE
+	bnez	a3, 99f
+	xchal_cp0_store_a2
+	j		90f
+99:
+# endif
+# if XCHAL_CP1_SA_SIZE
+	bnei    a3, 1, 99f
+	xchal_cp1_store_a2
+	j		90f
+99:
+# endif
+# if XCHAL_CP2_SA_SIZE
+	bnei    a3, 2, 99f
+	xchal_cp2_store_a2
+	j		90f
+99:
+# endif
+# if XCHAL_CP3_SA_SIZE
+	bnei	a3, 3, 99f
+	xchal_cp3_store_a2
+	j		90f
+99:
+# endif
+# if XCHAL_CP4_SA_SIZE
+	bnei	a3, 4, 99f
+	xchal_cp4_store_a2
+	j		90f
+99:
+# endif
+# if XCHAL_CP5_SA_SIZE
+	bnei	a3, 5, 99f
+	xchal_cp5_store_a2
+	j		90f
+99:
+# endif
+# if XCHAL_CP6_SA_SIZE
+	bnei	a3, 6, 99f
+	xchal_cp6_store_a2
+	j		90f
+99:
+# endif
+# if XCHAL_CP7_SA_SIZE
+	bnei	a3, 7, 99f
+	xchal_cp7_store_a2
+	j		90f
+99:
+# endif
+90:
+#endif
+	.endm
+
+/* Macro that expands to the body of a function that loads the selected coprocessor's state
+ * (registers etc).
+ *
+ * Entry: a2 = ptr to save area from which to restore cp state
+ *        a3 = coprocessor number
+ * Exit:  any register a2-a15 (?) may have been clobbered.
+ */
+
+	.macro  xchal_cpi_load_funcbody
+#if (XCHAL_CP_MASK & ~XCHAL_CP_PORT_MASK)
+# if XCHAL_CP0_SA_SIZE
+	bnez	a3, 99f
+	xchal_cp0_load_a2
+	j		90f
+99:
+# endif
+# if XCHAL_CP1_SA_SIZE
+	bnei	a3, 1, 99f
+	xchal_cp1_load_a2
+	j		90f
+99:
+# endif
+# if XCHAL_CP2_SA_SIZE
+	bnei	a3, 2, 99f
+	xchal_cp2_load_a2
+	j		90f
+99:
+# endif
+# if XCHAL_CP3_SA_SIZE
+	bnei	a3, 3, 99f
+	xchal_cp3_load_a2
+	j		90f
+99:
+# endif
+# if XCHAL_CP4_SA_SIZE
+	bnei	a3, 4, 99f
+	xchal_cp4_load_a2
+	j		90f
+99:
+# endif
+# if XCHAL_CP5_SA_SIZE
+	bnei	a3, 5, 99f
+	xchal_cp5_load_a2
+	j		90f
+99:
+# endif
+# if XCHAL_CP6_SA_SIZE
+	bnei	a3, 6, 99f
+	xchal_cp6_load_a2
+	j		90f
+99:
+# endif
+# if XCHAL_CP7_SA_SIZE
+	bnei	a3, 7, 99f
+	xchal_cp7_load_a2
+	j		90f
+99:
+# endif
+90:
+#endif
+	.endm
+
+#endif /* __ASSEMBLY__ */
+
+/* Other default macros for undefined coprocessors: */
+
+#ifndef XCHAL_CP0_NAME
+#  define XCHAL_CP0_NAME                  0
+#  define XCHAL_CP0_SA_CONTENTS_LIBDB_NUM 0
+#  define XCHAL_CP0_SA_CONTENTS_LIBDB     /* empty */
+#endif
+#ifndef XCHAL_CP1_NAME
+#  define XCHAL_CP1_NAME                  0
+#  define XCHAL_CP1_SA_CONTENTS_LIBDB_NUM 0
+#  define XCHAL_CP1_SA_CONTENTS_LIBDB     /* empty */
+#endif
+#ifndef XCHAL_CP2_NAME
+#  define XCHAL_CP2_NAME                  0
+#  define XCHAL_CP2_SA_CONTENTS_LIBDB_NUM 0
+#  define XCHAL_CP2_SA_CONTENTS_LIBDB     /* empty */
+#endif
+#ifndef XCHAL_CP3_NAME
+#  define XCHAL_CP3_NAME                  0
+#  define XCHAL_CP3_SA_CONTENTS_LIBDB_NUM 0
+#  define XCHAL_CP3_SA_CONTENTS_LIBDB     /* empty */
+#endif
+#ifndef XCHAL_CP4_NAME
+#  define XCHAL_CP4_NAME                  0
+#  define XCHAL_CP4_SA_CONTENTS_LIBDB_NUM 0
+#  define XCHAL_CP4_SA_CONTENTS_LIBDB     /* empty */
+#endif
+#ifndef XCHAL_CP5_NAME
+#  define XCHAL_CP5_NAME                  0
+#  define XCHAL_CP5_SA_CONTENTS_LIBDB_NUM 0
+#  define XCHAL_CP5_SA_CONTENTS_LIBDB     /* empty */
+#endif
+#ifndef XCHAL_CP6_NAME
+#  define XCHAL_CP6_NAME                  0
+#  define XCHAL_CP6_SA_CONTENTS_LIBDB_NUM 0
+#  define XCHAL_CP6_SA_CONTENTS_LIBDB     /* empty */
+#endif
+#ifndef XCHAL_CP7_NAME
+#  define XCHAL_CP7_NAME                  0
+#  define XCHAL_CP7_SA_CONTENTS_LIBDB_NUM 0
+#  define XCHAL_CP7_SA_CONTENTS_LIBDB     /* empty */
+#endif
+
+#if XCHAL_CP_MASK == 0
+/* Filler info for unassigned coprocessors, to simplify arrays etc: */
+
+#  define XCHAL_CP0_SA_SIZE             0
+#  define XCHAL_CP0_SA_ALIGN            1
+#  define XCHAL_CP1_SA_SIZE             0
+#  define XCHAL_CP1_SA_ALIGN            1
+#  define XCHAL_CP2_SA_SIZE             0
+#  define XCHAL_CP2_SA_ALIGN            1
+#  define XCHAL_CP3_SA_SIZE             0
+#  define XCHAL_CP3_SA_ALIGN            1
+#  define XCHAL_CP4_SA_SIZE             0
+#  define XCHAL_CP4_SA_ALIGN            1
+#  define XCHAL_CP5_SA_SIZE             0
+#  define XCHAL_CP5_SA_ALIGN            1
+#  define XCHAL_CP6_SA_SIZE             0
+#  define XCHAL_CP6_SA_ALIGN            1
+#  define XCHAL_CP7_SA_SIZE             0
+#  define XCHAL_CP7_SA_ALIGN            1
+#endif
+
+/* Indexing macros: */
+
+#define _XCHAL_CP_SA_SIZE(n)            XCHAL_CP ## n ## _SA_SIZE
+#define XCHAL_CP_SA_SIZE(n)            _XCHAL_CP_SA_SIZE(n)  /* n = 0 .. 7 */
+#define _XCHAL_CP_SA_ALIGN(n)          XCHAL_CP ## n ## _SA_ALIGN
+#define XCHAL_CP_SA_ALIGN(n)           _XCHAL_CP_SA_ALIGN(n) /* n = 0 .. 7 */
+#define XCHAL_CPEXTRA_SA_SIZE_TOR2     XCHAL_CPEXTRA_SA_SIZE /* Tor2Beta only - do not use */
+
+/* Link-time HAL global variables that report coprocessor numbers by name
+ * (names are case-preserved from the original TIE):
+ */
+
+ #if !defined(_ASMLANGUAGE) && !defined(_NOCLANGUAGE) && !defined(__ASSEMBLER__)
+#  define _XCJOIN(a,b)                 a ## b
+#  define XCJOIN(a,b)                  _XCJOIN(a,b)
+#  ifdef XCHAL_CP0_NAME
+     extern const unsigned char XCJOIN(Xthal_cp_id_, XCHAL_CP0_IDENT);
+     extern const unsigned int XCJOIN(Xthal_cp_mask_, XCHAL_CP0_IDENT);
+#  endif
+#  ifdef XCHAL_CP1_NAME
+     extern const unsigned char XCJOIN(Xthal_cp_id_, XCHAL_CP1_IDENT);
+     extern const unsigned int XCJOIN(Xthal_cp_mask_, XCHAL_CP1_IDENT);
+#  endif
+#  ifdef XCHAL_CP2_NAME
+     extern const unsigned char XCJOIN(Xthal_cp_id_, XCHAL_CP2_IDENT);
+     extern const unsigned int XCJOIN(Xthal_cp_mask_, XCHAL_CP2_IDENT);
+#  endif
+#  ifdef XCHAL_CP3_NAME
+     extern const unsigned char XCJOIN(Xthal_cp_id_, XCHAL_CP3_IDENT);
+     extern const unsigned int XCJOIN(Xthal_cp_mask_, XCHAL_CP3_IDENT);
+#  endif
+#  ifdef XCHAL_CP4_NAME
+     extern const unsigned char XCJOIN(Xthal_cp_id_, XCHAL_CP4_IDENT);
+     extern const unsigned int XCJOIN(Xthal_cp_mask_, XCHAL_CP4_IDENT);
+#  endif
+#  ifdef XCHAL_CP5_NAME
+     extern const unsigned char XCJOIN(Xthal_cp_id_, XCHAL_CP5_IDENT);
+     extern const unsigned int XCJOIN(Xthal_cp_mask_, XCHAL_CP5_IDENT);
+#  endif
+#  ifdef XCHAL_CP6_NAME
+     extern const unsigned char XCJOIN(Xthal_cp_id_, XCHAL_CP6_IDENT);
+     extern const unsigned int XCJOIN(Xthal_cp_mask_, XCHAL_CP6_IDENT);
+#  endif
+#  ifdef XCHAL_CP7_NAME
+     extern const unsigned char XCJOIN(Xthal_cp_id_, XCHAL_CP7_IDENT);
+     extern const unsigned int XCJOIN(Xthal_cp_mask_, XCHAL_CP7_IDENT);
+#  endif
+#endif
+
+/* Derived ******************************************************************/
+
+#if XCHAL_HAVE_BE
+#  define XCHAL_INST_ILLN               0xD60F /* 2-byte illegal instruction,
+                                                * msb-first */
+#  define XCHAL_INST_ILLN_BYTE0         0xD6   /* 2-byte illegal instruction,
+                                                * 1st byte */
+#  define XCHAL_INST_ILLN_BYTE1         0x0F   /* 2-byte illegal instruction,
+                                                * 2nd byte */
+#else
+#  define XCHAL_INST_ILLN               0xF06D /* 2-byte illegal instruction,
+                                                * lsb-first */
+#  define XCHAL_INST_ILLN_BYTE0         0x6D   /* 2-byte illegal instruction,
+                                                * 1st byte */
+#  define XCHAL_INST_ILLN_BYTE1         0xF0   /* 2-byte illegal instruction,
+                                                * 2nd byte */
+#endif
+
+/* Belongs in xtensa/hal.h: */
+
+#define XTHAL_INST_ILL            0x000000    /* 3-byte illegal instruction */
+
+/* Because information as to exactly which hardware version is targeted
+ * by a given software build is not always available, compile-time HAL
+ * Hardware-Release "_AT" macros are fuzzy (return 0, 1, or XCHAL_MAYBE):
+ * (Here "RELEASE" is now a misnomer; these are product *versions*, not the releases
+ *  under which they are released.  In the T10##.# era there was no distinction.)
+ */
+
+#if XCHAL_HW_CONFIGID_RELIABLE
+# define XCHAL_HW_RELEASE_AT_OR_BELOW(major,minor)      (XTHAL_REL_LE( XCHAL_HW_VERSION_MAJOR,XCHAL_HW_VERSION_MINOR, major,minor ) ? 1 : 0)
+# define XCHAL_HW_RELEASE_AT_OR_ABOVE(major,minor)      (XTHAL_REL_GE( XCHAL_HW_VERSION_MAJOR,XCHAL_HW_VERSION_MINOR, major,minor ) ? 1 : 0)
+# define XCHAL_HW_RELEASE_AT(major,minor)               (XTHAL_REL_EQ( XCHAL_HW_VERSION_MAJOR,XCHAL_HW_VERSION_MINOR, major,minor ) ? 1 : 0)
+# define XCHAL_HW_RELEASE_MAJOR_AT(major)               ((XCHAL_HW_VERSION_MAJOR == (major)) ? 1 : 0)
+#else
+# define XCHAL_HW_RELEASE_AT_OR_BELOW(major,minor)      ( ((major) < 1040 && XCHAL_HAVE_XEA2) ? 0 \
+                                                        : ((major) > 1050 && XCHAL_HAVE_XEA1) ? 1 \
+                                                        : XTHAL_MAYBE )
+# define XCHAL_HW_RELEASE_AT_OR_ABOVE(major,minor)      ( ((major) >= 2000 && XCHAL_HAVE_XEA1) ? 0 \
+                                                        : (XTHAL_REL_LE(major,minor, 1040,0) && XCHAL_HAVE_XEA2) ? 1 \
+                                                        : XTHAL_MAYBE )
+# define XCHAL_HW_RELEASE_AT(major,minor)               ( (((major) < 1040 && XCHAL_HAVE_XEA2) || \
+                                                           ((major) >= 2000 && XCHAL_HAVE_XEA1)) ? 0 : XTHAL_MAYBE)
+# define XCHAL_HW_RELEASE_MAJOR_AT(major)               XCHAL_HW_RELEASE_AT(major,0)
+#endif
+
+/*  Specific errata: */
+
+/* Erratum T1020.H13, T1030.H7, T1040.H10, T1050.H4 (fixed in T1040.3 and T1050.1;
+ * relevant only in XEA1, kernel-vector mode, level-one interrupts and overflows enabled):
+ */
+
+#define XCHAL_MAYHAVE_ERRATUM_XEA1KWIN \
+  (XCHAL_HAVE_XEA1 && \
+  (XCHAL_HW_RELEASE_AT_OR_BELOW(1040,2) != 0 || \
+   XCHAL_HW_RELEASE_AT(1050,0)))
+
+/* Erratum 453 present in RE-2013.2 up to RF-2014.0, fixed in RF-2014.1.
+ * Applies to specific set of configuration options.
+ * Part of the workaround is to add ISYNC at certain points in the code.
+ * The workaround gated by this macro can be disabled if not needed, e.g. if
+ * zero-overhead loop buffer will be disabled, by defining _NO_ERRATUM_453.
+ */
+
+#if (XCHAL_HW_MAX_VERSION >= XTENSA_HWVERSION_RE_2013_2 && \
+     XCHAL_HW_MIN_VERSION <= XTENSA_HWVERSION_RF_2014_0 && \
+     XCHAL_ICACHE_SIZE != 0 && XCHAL_HAVE_PIF /*covers also AXI/AHB*/ && \
+     XCHAL_HAVE_LOOPS && XCHAL_LOOP_BUFFER_SIZE != 0 && \
+     XCHAL_CLOCK_GATING_GLOBAL && !defined(_NO_ERRATUM_453))
+#  define XCHAL_ERRATUM_453    1
+#else
+#  define XCHAL_ERRATUM_453    0
+#endif
+
+/* Erratum 497 present in RE-2012.2 up to RG/RF-2015.2
+ * Applies to specific set of configuration options.
+ * Workaround is to add MEMWs after at most 8 cache WB instructions
+ */
+
+#if (((XCHAL_HW_MAX_VERSION >= XTENSA_HWVERSION_RE_2012_0 && \
+        XCHAL_HW_MIN_VERSION <= XTENSA_HWVERSION_RF_2015_2) || \
+       (XCHAL_HW_MAX_VERSION >= XTENSA_HWVERSION_RG_2015_0 && \
+        XCHAL_HW_MIN_VERSION <= XTENSA_HWVERSION_RG_2015_2)) && \
+      XCHAL_DCACHE_IS_WRITEBACK && \
+      XCHAL_HAVE_AXI && \
+      XCHAL_HAVE_PIF_WR_RESP && \
+      XCHAL_HAVE_PIF_REQ_ATTR &&  !defined(_NO_ERRATUM_497))
+#  define XCHAL_ERRATUM_497    1
+#else
+#  define XCHAL_ERRATUM_497    0
+#endif
+
+#endif /*__ARCH_XTENSA_INCUDE_XTENSA_CORE_H*/
diff --git a/arch/xtensa/include/xtensa/xtensa_coproc.h b/arch/xtensa/include/xtensa/xtensa_coproc.h
new file mode 100644
index 0000000000000000000000000000000000000000..26829a7a3a43257f798bdb770b85160a264792ff
--- /dev/null
+++ b/arch/xtensa/include/xtensa/xtensa_coproc.h
@@ -0,0 +1,177 @@
+/****************************************************************************
+ * arch/xtensa/include/xtensa/xtensa_coproc.h
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from logic originally provided by Cadence Design Systems Inc.
+ *
+ *   Copyright (c) 2006-2015 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_INCLUDE_XTENSA_XTENSA_COPROC_H
+#define __ARCH_XTENSA_INCLUDE_XTENSA_XTENSA_COPROC_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if XCHAL_CP_NUM > 0
+
+/* Align a value up/down to nearest n-byte boundary, where n is a power of 2. */
+
+#define _CP_MASK(n)           ((n) - 1)
+#define _CP_ALIGNUP(n,val)   (((val) + _CP_MASK(n)) & ~_CP_MASK(n))
+#define _CP_ALIGNDOWN(n,val) ((val) & ~_CP_MASK(n))
+
+/* A set of all co-processors */
+
+#define XTENSA_CP_ALLSET     ((1 << XCHAL_CP_NUM) - 1)
+
+/* CO-PROCESSOR STATE SAVE AREA FOR A THREAD
+ *
+ * NuttX provides an area per thread to save the state of co-processors when
+ * that thread does not have control.  Co-processors are context-switched
+ * lazily (on demand) only when a new thread uses a co-processor instruction,
+ * otherwise a thread retains ownership of the co-processor even when it
+ * loses control of the processor. An Xtensa co-processor exception is
+ * triggered when any co-processor instruction is executed by a thread that
+ * is not the owner, and the context switch of that co-processor is then
+ * peformed by the handler. Ownership represents which thread's state is
+ * currently in the co-processor.
+ *
+ * Co-processors may not be used by interrupt or exception handlers. If an
+ * co-processor instruction is executed by an interrupt or exception handler,
+ * the co-processor exception handler will trigger a kernel panic and freeze.
+ * This restriction is introduced to reduce the overhead of saving and
+ * restoring co-processor state (which can be quite large) and in particular
+ * remove that overhead from interrupt handlers.
+ * 
+ * The co-processor state save area may be in any convenient per-thread
+ * location such as in the thread control block or above the thread stack
+ * area. It need not be in the interrupt stack frame since interrupts don't
+ * use co-processors.
+ *
+ * Along with the save area for each co-processor, two bitmasks with flags
+ * per co-processor (laid out as in the CPENABLE reg) help manage context-
+ * switching co-processors as efficiently as possible:
+ *
+ * XTENSA_CPENABLE
+ *   The contents of a non-running thread's CPENABLE register.
+ *   It represents the co-processors owned (and whose state is still needed)
+ *   by the thread. When a thread is preempted, its CPENABLE is saved here.
+ *   When a thread solicits a context-swtich, its CPENABLE is cleared - the
+ *   compiler has saved the (caller-saved) co-proc state if it needs to.
+ *   When a non-running thread loses ownership of a CP, its bit is cleared.
+ *   When a thread runs, it's XTENSA_CPENABLE is loaded into the CPENABLE reg.
+ *   Avoids co-processor exceptions when no change of ownership is needed.
+ *
+ * XTENSA_CPSTORED
+ *   A bitmask with the same layout as CPENABLE, a bit per co-processor.
+ *   Indicates whether the state of each co-processor is saved in the state
+ *   save area. When the state of a thread is saved, only the state of co-procs
+ *   still enabled in CPENABLE is saved. When the co-processor state is
+ *   is restored, the state is only resotred for a co-processor if this bit
+ *   is set.  This bist set is cleared after after co-processor state has
+ *   been restored.
+ *
+ * XTENSA_CPASA
+ *   Pointer to the aligned save area.  Allows it to be aligned more than
+ *   the overall save area (which might only be stack-aligned or TCB-aligned).
+ *   Especially relevant for Xtensa cores configured with a very large data
+ *   path that requires alignment greater than 16 bytes (ABI stack alignment).
+ */
+
+/* Offsets of each coprocessor save area within the 'aligned save area': */
+
+#define XTENSA_CP0_SA     0
+#define XTENSA_CP1_SA     _CP_ALIGNUP(XCHAL_CP1_SA_ALIGN, XTENSA_CP0_SA + XCHAL_CP0_SA_SIZE)
+#define XTENSA_CP2_SA     _CP_ALIGNUP(XCHAL_CP2_SA_ALIGN, XTENSA_CP1_SA + XCHAL_CP1_SA_SIZE)
+#define XTENSA_CP3_SA     _CP_ALIGNUP(XCHAL_CP3_SA_ALIGN, XTENSA_CP2_SA + XCHAL_CP2_SA_SIZE)
+#define XTENSA_CP4_SA     _CP_ALIGNUP(XCHAL_CP4_SA_ALIGN, XTENSA_CP3_SA + XCHAL_CP3_SA_SIZE)
+#define XTENSA_CP5_SA     _CP_ALIGNUP(XCHAL_CP5_SA_ALIGN, XTENSA_CP4_SA + XCHAL_CP4_SA_SIZE)
+#define XTENSA_CP6_SA     _CP_ALIGNUP(XCHAL_CP6_SA_ALIGN, XTENSA_CP5_SA + XCHAL_CP5_SA_SIZE)
+#define XTENSA_CP7_SA     _CP_ALIGNUP(XCHAL_CP7_SA_ALIGN, XTENSA_CP6_SA + XCHAL_CP6_SA_SIZE)
+#define XTENSA_CP_SA_SIZE _CP_ALIGNUP(16, XTENSA_CP7_SA + XCHAL_CP7_SA_SIZE)
+
+/* Offsets within the overall save area: */
+
+#define XTENSA_CPENABLE   0  /* (2 bytes) coprocessors active for this thread */
+#define XTENSA_CPSTORED   2  /* (2 bytes) coprocessors saved for this thread */
+#define XTENSA_CPASA      4  /* (4 bytes) ptr to aligned save area */
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+struct xtensa_cpstate_s
+{
+  uint16_t cpenable;  /* (2 bytes) Co-processors active for this thread */
+  uint16_t cpstored;  /* (2 bytes) Co-processors saved for this thread */
+  uint32_t *cpasa;    /* (4 bytes) Pointer to aligned save area */
+};
+
+/****************************************************************************
+ * Inline Functions
+ ****************************************************************************/
+
+/* Return the current value of the CPENABLE register */
+
+static inline uint32_t xtensa_get_cpenable(void)
+{
+  uint32_t cpenable;
+
+  __asm__ __volatile__
+  (
+    "\trsr %0, CPENABLE\n"
+    : "=r"(cpenable)
+  );
+
+  return cpenable;
+}
+
+/* Set the value of the CPENABLE register */
+
+static inline void xtensa_set_cpenable(uint32_t cpenable)
+{
+  __asm__ __volatile__
+  (
+    "\twsr %0, CPENABLE\n"
+    "\trsync\n"
+    : : "r"(cpenable)
+  );
+}
+
+#endif /* __ASSEMBLY__ */
+#endif /* #if XCHAL_CP_NUM > 0 */
+#endif /* __ARCH_XTENSA_INCLUDE_XTENSA_XTENSA_COPROC_H */
diff --git a/arch/xtensa/include/xtensa/xtensa_corebits.h b/arch/xtensa/include/xtensa/xtensa_corebits.h
new file mode 100644
index 0000000000000000000000000000000000000000..24f92d9a586b784785e829a80245b59ecb3d5e35
--- /dev/null
+++ b/arch/xtensa/include/xtensa/xtensa_corebits.h
@@ -0,0 +1,206 @@
+/****************************************************************************
+ * arch/xtensa/include/xtensa/xtensa_corebits.h
+ * Xtensa Special Register field positions, masks, values.
+ * NOTE: This file may be processor configuration dependent.
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from logic originally provided by Tensilica Inc.
+ *
+ *   Copyright (c) 2005-2011 Tensilica Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_EXTENSA_INCLUDE_XTENSA_XTENSA_COREBITS_H
+#define __ARCH_EXTENSA_INCLUDE_XTENSA_XTENSA_COREBITS_H
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* EXCCAUSE register fields: */
+
+#define EXCCAUSE_EXCCAUSE_SHIFT    0
+#define EXCCAUSE_EXCCAUSE_MASK     0x3f
+
+/*  EXCCAUSE register values:
+ *
+ *  General Exception Causes
+ *  (values of EXCCAUSE special register set by general exceptions,
+ *   which vector to the user, kernel, or double-exception vectors).
+ */
+
+#define EXCCAUSE_ILLEGAL           0  /* Illegal Instruction */
+#define EXCCAUSE_SYSCALL           1  /* System Call (SYSCALL instruction) */
+#define EXCCAUSE_INSTR_ERROR       2  /* Instruction Fetch Error */
+# define EXCCAUSE_IFETCHERROR      2  /* (backward compatibility macro, deprecated, avoid) */
+#define EXCCAUSE_LOAD_STORE_ERROR  3  /* Load Store Error */
+# define EXCCAUSE_LOADSTOREERROR   3  /* (backward compatibility macro, deprecated, avoid) */
+#define EXCCAUSE_LEVEL1_INTERRUPT  4  /* Level 1 Interrupt */
+# define EXCCAUSE_LEVEL1INTERRUPT  4  /* (backward compatibility macro, deprecated, avoid) */
+#define EXCCAUSE_ALLOCA            5  /* Stack Extension Assist (MOVSP instruction) for alloca */
+#define EXCCAUSE_DIVIDE_BY_ZERO    6  /* Integer Divide by Zero */
+#define EXCCAUSE_SPECULATION       7  /* Use of Failed Speculative Access (not implemented) */
+#define EXCCAUSE_PRIVILEGED        8  /* Privileged Instruction */
+#define EXCCAUSE_UNALIGNED         9  /* Unaligned Load or Store */
+/* Reserved                        10-11 */
+#define EXCCAUSE_INSTR_DATA_ERROR  12  /* PIF Data Error on Instruction Fetch (RB-200x and later) */
+#define EXCCAUSE_LOAD_STORE_DATA_ERROR 13 /* PIF Data Error on Load or Store (RB-200x and later) */
+#define EXCCAUSE_INSTR_ADDR_ERROR  14  /* PIF Address Error on Instruction Fetch (RB-200x and later) */
+#define EXCCAUSE_LOAD_STORE_ADDR_ERROR 15 /* PIF Address Error on Load or Store (RB-200x and later) */
+#define EXCCAUSE_ITLB_MISS         16  /* ITLB Miss (no ITLB entry matches, hw refill also missed) */
+#define EXCCAUSE_ITLB_MULTIHIT     17  /* ITLB Multihit (multiple ITLB entries match) */
+#define EXCCAUSE_INSTR_RING        18  /* Ring Privilege Violation on Instruction Fetch */
+/* Reserved                        19 *//* Size Restriction on IFetch (not implemented) */
+#define EXCCAUSE_INSTR_PROHIBITED  20  /* Cache Attribute does not allow Instruction Fetch */
+/* Reserved                21..23 */
+#define EXCCAUSE_DTLB_MISS         24  /* DTLB Miss (no DTLB entry matches, hw refill also missed) */
+#define EXCCAUSE_DTLB_MULTIHIT     25  /* DTLB Multihit (multiple DTLB entries match) */
+#define EXCCAUSE_LOAD_STORE_RING   26  /* Ring Privilege Violation on Load or Store */
+/* Reserved                        27 *//* Size Restriction on Load/Store (not implemented) */
+#define EXCCAUSE_LOAD_PROHIBITED   28  /* Cache Attribute does not allow Load */
+#define EXCCAUSE_STORE_PROHIBITED  29  /* Cache Attribute does not allow Store */
+/* Reserved                        30-31 */
+#define EXCCAUSE_CP_DISABLED(n)    (32+(n)) /* Access to Coprocessor 'n' when disabled */
+#  define EXCCAUSE_CP0_DISABLED    32  /* Access to Coprocessor 0 when disabled */
+#  define EXCCAUSE_CP1_DISABLED    33  /* Access to Coprocessor 1 when disabled */
+#  define EXCCAUSE_CP2_DISABLED    34  /* Access to Coprocessor 2 when disabled */
+#  define EXCCAUSE_CP3_DISABLED    35  /* Access to Coprocessor 3 when disabled */
+#  define EXCCAUSE_CP4_DISABLED    36  /* Access to Coprocessor 4 when disabled */
+#  define EXCCAUSE_CP5_DISABLED    37  /* Access to Coprocessor 5 when disabled */
+#  define EXCCAUSE_CP6_DISABLED    38  /* Access to Coprocessor 6 when disabled */
+#  define EXCCAUSE_CP7_DISABLED    39  /* Access to Coprocessor 7 when disabled */
+/* Reserved                        40..63 */
+
+/* PS register fields: */
+
+#define PS_WOE_SHIFT               18
+#define PS_WOE_MASK                0x00040000
+#define PS_WOE                     PS_WOE_MASK
+
+#define PS_CALLINC_SHIFT           16
+#define PS_CALLINC_MASK            0x00030000
+#define PS_CALLINC(n)              (((n)&3)<
+ *
+ * Derives from logic originally provided by Tensilica Inc.
+ *
+ *   Copyright (c) 2005-2011 Tensilica Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_INCLUDE_XTENSA_XTENSA_SPECREGS_H
+#define __ARCH_XTENSA_INCLUDE_XTENSA_XTENSA_SPECREGS_H
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/*  Special registers:  */
+
+#define LBEG          0
+#define LEND          1
+#define LCOUNT        2
+#define SAR           3
+#define BR            4
+#define LITBASE       5
+#define SCOMPARE1     12
+#define ACCLO         16
+#define ACCHI         17
+#define MR_0          32
+#define MR_1          33
+#define MR_2          34
+#define MR_3          35
+#define PREFCTL       40
+#define WINDOWBASE    72
+#define WINDOWSTART   73
+#define PTEVADDR      83
+#define RASID         90
+#define ITLBCFG       91
+#define DTLBCFG       92
+#define IBREAKENABLE  96
+#define MEMCTL        97
+#define CACHEATTR     98
+#define ATOMCTL       99
+#define DDR           104
+#define MECR          110
+#define IBREAKA_0     128
+#define IBREAKA_1     129
+#define DBREAKA_0     144
+#define DBREAKA_1     145
+#define DBREAKC_0     160
+#define DBREAKC_1     161
+#define CONFIGID0     176
+#define EPC_1         177
+#define EPC_2         178
+#define EPC_3         179
+#define EPC_4         180
+#define EPC_5         181
+#define EPC_6         182
+#define EPC_7         183
+#define DEPC          192
+#define EPS_2         194
+#define EPS_3         195
+#define EPS_4         196
+#define EPS_5         197
+#define EPS_6         198
+#define EPS_7         199
+#define CONFIGID1     208
+#define EXCSAVE_1     209
+#define EXCSAVE_2     210
+#define EXCSAVE_3     211
+#define EXCSAVE_4     212
+#define EXCSAVE_5     213
+#define EXCSAVE_6     214
+#define EXCSAVE_7     215
+#define CPENABLE      224
+#define INTERRUPT     226
+#define INTREAD       INTERRUPT  /* Alternate name for backward compatibility */
+#define INTSET        INTERRUPT  /* Alternate name for backward compatibility */
+#define INTCLEAR      227
+#define INTENABLE     228
+#define PS            230
+#define VECBASE       231
+#define EXCCAUSE      232
+#define DEBUGCAUSE    233
+#define CCOUNT        234
+#define PRID          235
+#define ICOUNT        236
+#define ICOUNTLEVEL   237
+#define EXCVADDR      238
+#define CCOMPARE_0    240
+#define CCOMPARE_1    241
+#define CCOMPARE_2    242
+#define MISC_REG_0    244
+#define MISC_REG_1    245
+#define MISC_REG_2    246
+#define MISC_REG_3    247
+
+/*  Special cases (bases of special register series):  */
+
+#define MR            32
+#define IBREAKA       128
+#define DBREAKA       144
+#define DBREAKC       160
+#define EPC           176
+#define EPS           192
+#define EXCSAVE       208
+#define CCOMPARE      240
+#define MISC_REG      244
+
+/*  Tensilica-defined user registers:  */
+
+#if 0
+/*#define ...     21..24 */  /* (545CK) */
+/*#define ...    140..143 */ /* (545CK) */
+#define EXPSTATE      230    /* Diamond */
+#define THREADPTR     231    /* threadptr option */
+#define FCR           232    /* FPU */
+#define FSR           233    /* FPU */
+#define AE_OVF_SAR    240    /* HiFi2 */
+#define AE_BITHEAD    241    /* HiFi2 */
+#define AE_TS_FTS_BU_BP 242 /* HiFi2 */
+#define AE_SD_NO      243    /* HiFi2 */
+#define VSAR          240    /* VectraLX */
+#define ROUND_LO      242    /* VectraLX */
+#define ROUND_HI      243    /* VectraLX */
+#define CBEGIN        246    /* VectraLX */
+#define CEND          247    /* VectraLX */
+#endif
+
+#endif /* __ARCH_XTENSA_INCLUDE_XTENSA_XTENSA_SPECREGS_H */
diff --git a/arch/rgmp/src/.gitignore b/arch/xtensa/src/.gitignore
similarity index 100%
rename from arch/rgmp/src/.gitignore
rename to arch/xtensa/src/.gitignore
diff --git a/arch/xtensa/src/Makefile b/arch/xtensa/src/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..e6f288ebc5db49dfdfe64d02ca773ce4fa788623
--- /dev/null
+++ b/arch/xtensa/src/Makefile
@@ -0,0 +1,188 @@
+############################################################################
+# arch/xtensa/src/Makefile
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+-include chip/Make.defs
+
+ifeq ($(CONFIG_ARCH_FAMILY_LX6),y)
+ARCH_SUBDIR = lx6
+endif
+
+CPPFLAGS += $(EXTRADEFINES)
+CFLAGS += $(EXTRADEFINES)
+CXXFLAGS += $(EXTRADEFINES)
+
+ifeq ($(CONFIG_WINDOWS_NATIVE),y)
+  ARCH_SRCDIR = $(TOPDIR)\arch\$(CONFIG_ARCH)\src
+  NUTTX = $(TOPDIR)\nuttx$(EXEEXT)
+  CFLAGS += -I$(ARCH_SRCDIR)\chip
+  CFLAGS += -I$(ARCH_SRCDIR)\common
+  CFLAGS += -I$(ARCH_SRCDIR)\$(ARCH_SUBDIR)
+  CFLAGS += -I$(TOPDIR)\sched
+else
+  ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src
+ifeq ($(WINTOOL),y)
+  NUTTX = "${shell cygpath -w $(TOPDIR)/nuttx$(EXEEXT)}"
+  CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}"
+  CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/common}"
+  CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/$(ARCH_SUBDIR)}"
+  CFLAGS += -I "${shell cygpath -w $(TOPDIR)/sched}"
+else
+  NUTTX = $(TOPDIR)/nuttx$(EXEEXT)
+  CFLAGS += -I$(ARCH_SRCDIR)/chip
+  CFLAGS += -I$(ARCH_SRCDIR)/common
+  CFLAGS += -I$(ARCH_SRCDIR)/$(ARCH_SUBDIR)
+  CFLAGS += -I$(TOPDIR)/sched
+endif
+endif
+
+HEAD_AOBJ = $(HEAD_ASRC:.S=$(OBJEXT))
+HEAD_COBJ = $(HEAD_CSRC:.c=$(OBJEXT))
+STARTUP_OBJS ?= $(HEAD_AOBJ) $(HEAD_COBJ)
+
+ASRCS = $(CHIP_ASRCS) $(CMN_ASRCS)
+AOBJS = $(ASRCS:.S=$(OBJEXT))
+
+CSRCS = $(CHIP_CSRCS) $(CMN_CSRCS)
+COBJS = $(CSRCS:.c=$(OBJEXT))
+
+SRCS = $(ASRCS) $(CSRCS)
+OBJS = $(AOBJS) $(COBJS)
+
+# Override in Make.defs if linker is not 'ld'
+
+LDSTARTGROUP ?= --start-group
+LDENDGROUP ?= --end-group
+
+LDFLAGS += $(ARCHSCRIPT)
+EXTRA_LIBS ?=
+LINKLIBS ?=
+
+ifeq ($(CONFIG_WINDOWS_NATIVE),y)
+  BOARDMAKE = $(if $(wildcard .\board\Makefile),y,)
+  LIBPATHS += -L"$(TOPDIR)\lib"
+ifeq ($(BOARDMAKE),y)
+  LIBPATHS += -L"$(TOPDIR)\arch\$(CONFIG_ARCH)\src\board"
+endif
+
+else
+  BOARDMAKE = $(if $(wildcard ./board/Makefile),y,)
+
+ifeq ($(WINTOOL),y)
+  LIBPATHS += -L"${shell cygpath -w "$(TOPDIR)/lib"}"
+ifeq ($(BOARDMAKE),y)
+  LIBPATHS += -L"${shell cygpath -w "$(TOPDIR)/arch/$(CONFIG_ARCH)/src/board"}"
+endif
+
+else
+  LIBPATHS += -L"$(TOPDIR)/lib"
+ifeq ($(BOARDMAKE),y)
+  LIBPATHS += -L"$(TOPDIR)/arch/$(CONFIG_ARCH)/src/board"
+endif
+endif
+endif
+
+LDLIBS = $(patsubst %.a,%,$(patsubst lib%,-l%,$(LINKLIBS)))
+ifeq ($(BOARDMAKE),y)
+  LDLIBS += -lboard
+endif
+
+LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}"
+
+VPATH = chip:common:$(ARCH_SUBDIR)
+
+all: $(STARTUP_OBJS) libarch$(LIBEXT)
+
+.PHONY: board/libboard$(LIBEXT)
+
+$(AOBJS) $(HEAD_AOBJ): %$(OBJEXT): %.S
+	$(call ASSEMBLE, $<, $@)
+
+$(COBJS) $(HEAD_COBJ): %$(OBJEXT): %.c
+	$(call COMPILE, $<, $@)
+
+libarch$(LIBEXT): $(OBJS)
+	$(call ARCHIVE, $@, $(OBJS))
+
+board/libboard$(LIBEXT):
+	$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" libboard$(LIBEXT) EXTRADEFINES=$(EXTRADEFINES)
+
+nuttx$(EXEEXT): $(STARTUP_OBJS) board/libboard$(LIBEXT)
+	@echo "LD: nuttx"
+	$(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(NUTTX)$(EXEEXT) $(STARTUP_OBJS) $(EXTRA_OBJS) \
+		$(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) $(LDENDGROUP)
+ifneq ($(CONFIG_WINDOWS_NATIVE),y)
+	$(Q) $(NM) $(NUTTX)$(EXEEXT) | \
+	grep -v '\(compiled\)\|\(\$(OBJEXT)$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
+	sort > $(TOPDIR)/System.map
+endif
+
+# This is part of the top-level export target
+
+export_startup: board/libboard$(LIBEXT) $(STARTUP_OBJS)
+	$(Q) if [ -d "$(EXPORT_DIR)/startup" ]; then \
+		cp -f $(STARTUP_OBJS) "$(EXPORT_DIR)/startup"; \
+	 else \
+		echo "$(EXPORT_DIR)/startup does not exist"; \
+		exit 1; \
+	 fi
+
+# Dependencies
+
+.depend: Makefile chip/Make.defs $(SRCS)
+ifeq ($(BOARDMAKE),y)
+	$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" depend
+endif
+	$(Q) $(MKDEP) --dep-path chip --dep-path common --dep-path $(ARCH_SUBDIR) \
+	 "$(CC)" -- $(CFLAGS) -- $(SRCS) >Make.dep
+	$(Q) touch $@
+
+depend: .depend
+
+clean:
+ifeq ($(BOARDMAKE),y)
+	$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" clean
+endif
+	$(call DELFILE, libarch$(LIBEXT))
+	$(call CLEAN)
+
+distclean: clean
+ifeq ($(BOARDMAKE),y)
+	$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" distclean
+endif
+	$(call DELFILE, Make.dep)
+	$(call DELFILE, .depend)
+
+-include Make.dep
diff --git a/arch/xtensa/src/common/xtensa.h b/arch/xtensa/src/common/xtensa.h
new file mode 100644
index 0000000000000000000000000000000000000000..133903d19411f3ff358f92eea3cd21ddf2f14ff4
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa.h
@@ -0,0 +1,379 @@
+/****************************************************************************
+ * arch/xtensa/common/xtensa.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_COMMON_XTENSA_H
+#define __ARCH_XTENSA_SRC_COMMON_XTENSA_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+#  include 
+#  include 
+#endif
+
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Bring-up debug configurations.  These are here (vs Kconfig)
+ * because these should only be controlled during low level
+ * board bring-up and not part of normal platform configuration.
+ */
+
+#undef  CONFIG_SUPPRESS_INTERRUPTS     /* DEFINED: Do not enable interrupts */
+#undef  CONFIG_SUPPRESS_TIMER_INTS     /* DEFINED: No timer */
+#undef  CONFIG_SUPPRESS_SERIAL_INTS    /* DEFINED: Console will poll */
+#undef  CONFIG_SUPPRESS_UART_CONFIG    /* DEFINED: Do not reconfigure UART */
+#define CONFIG_SUPPRESS_CLOCK_CONFIG 1 /* DEFINED: Do not reconfigure clocking */
+#undef  CONFIG_DUMP_ON_EXIT            /* DEFINED: Dump task state on exit */
+
+#ifndef CONFIG_DEBUG_SCHED_INFO
+#  undef CONFIG_DUMP_ON_EXIT          /* Needs CONFIG_DEBUG_SCHED_INFO */
+#endif
+
+/* Determine which (if any) console driver to use.  If a console is enabled
+ * and no other console device is specified, then a serial console is
+ * assumed.
+ */
+
+#if !defined(CONFIG_DEV_CONSOLE) || CONFIG_NFILE_DESCRIPTORS <= 0
+#  undef  USE_SERIALDRIVER
+#  undef  USE_EARLYSERIALINIT
+#  undef  CONFIG_DEV_LOWCONSOLE
+#  undef  CONFIG_RAMLOG_CONSOLE
+#else
+#  if defined(CONFIG_RAMLOG_CONSOLE)
+#    undef  USE_SERIALDRIVER
+#    undef  USE_EARLYSERIALINIT
+#    undef  CONFIG_DEV_LOWCONSOLE
+#  elif defined(CONFIG_DEV_LOWCONSOLE)
+#    undef  USE_SERIALDRIVER
+#    undef  USE_EARLYSERIALINIT
+#  else
+#    define USE_SERIALDRIVER 1
+#    define USE_EARLYSERIALINIT 1
+#  endif
+#endif
+
+/* If some other device is used as the console, then the serial driver may
+ * still be needed.  Let's assume that if the upper half serial driver is
+ * built, then the lower half will also be needed.  There is no need for
+ * the early serial initialization in this case.
+ */
+
+#if !defined(USE_SERIALDRIVER) && defined(CONFIG_STANDARD_SERIAL)
+#  define USE_SERIALDRIVER 1
+#endif
+
+/* Check if an interrupt stack size is configured */
+
+#define HAVE_INTERRUPTSTACK 1
+
+#if !defined(CONFIG_ARCH_INTERRUPTSTACK)
+#  define CONFIG_ARCH_INTERRUPTSTACK 0
+#  undef  HAVE_INTERRUPTSTACK
+#elif CONFIG_ARCH_INTERRUPTSTACK < 16
+#  warning CONFIG_ARCH_INTERRUPTSTACK is to small
+#  undef  HAVE_INTERRUPTSTACK
+#endif
+
+#define INTERRUPTSTACK_SIZE  ((CONFIG_ARCH_INTERRUPTSTACK + 15) & ~15)
+#define INTERRUPT_STACKWORDS (INTERRUPTSTACK_SIZE >> 2)
+
+/* An IDLE thread stack size for CPU0 must be defined */
+
+#if !defined(CONFIG_IDLETHREAD_STACKSIZE)
+#  error CONFIG_IDLETHREAD_STACKSIZE is not defined
+#elif CONFIG_IDLETHREAD_STACKSIZE < 16
+#  error CONFIG_IDLETHREAD_STACKSIZE is to small
+#endif
+
+#define IDLETHREAD_STACKSIZE  ((CONFIG_IDLETHREAD_STACKSIZE + 15) & ~15)
+#define IDLETHREAD_STACKWORDS (IDLETHREAD_STACKSIZE >> 2)
+
+/* Used for stack usage measurements */
+
+#define STACK_COLOR 0xdeadbeef
+
+/* In the XTENSA model, the state is copied from the stack to the TCB, but
+ * only a referenced is passed to get the state from the TCB.
+ *
+ * REVISIT: It would not be too difficult to save only a pointer to the
+ * state save area in the TCB and thus avoid the copy.
+ */
+
+#define xtensa_savestate(regs)    xtensa_copystate(regs, (uint32_t*)CURRENT_REGS)
+#define xtensa_restorestate(regs) do { CURRENT_REGS = regs; } while (0)
+
+/* Interrupt codes from other CPUs: */
+
+#define CPU_INTCODE_NONE  0
+#define CPU_INTCODE_PAUSE 1
+
+/* Exception Codes that may be received by xtensa_panic(). */
+
+#define XTENSA_NMI_EXCEPTION     0
+#define XTENSA_DEBUG_EXCEPTION   1
+#define XTENSA_DOUBLE_EXCEPTION  2
+#define XTENSA_KERNEL_EXCEPTION  3
+#define XTENSA_COPROC_EXCEPTION  4
+#define XTENSA_LEVEL2_EXCEPTION  5
+#define XTENSA_LEVEL3_EXCEPTION  6
+#define XTENSA_LEVEL4_EXCEPTION  7
+#define XTENSA_LEVEL5_EXCEPTION  8
+#define XTENSA_LEVEL6_EXCEPTION  9
+
+/* Register access macros */
+
+#define getreg8(a)        (*(volatile uint8_t *)(a))
+#define putreg8(v,a)      (*(volatile uint8_t *)(a) = (v))
+#define getreg16(a)       (*(volatile uint16_t *)(a))
+#define putreg16(v,a)     (*(volatile uint16_t *)(a) = (v))
+#define getreg32(a)       (*(volatile uint32_t *)(a))
+#define putreg32(v,a)     (*(volatile uint32_t *)(a) = (v))
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+/* g_current_regs[] holds a references to the current interrupt level
+ * register storage structure.  If is non-NULL only during interrupt
+ * processing.  Access to g_current_regs[] must be through the macro
+ * CURRENT_REGS for portability.
+ */
+
+#ifdef CONFIG_SMP
+/* For the case of architectures with multiple CPUs, then there must be one
+ * such value for each processor that can receive an interrupt.
+ */
+
+int up_cpu_index(void); /* See include/nuttx/arch.h */
+extern volatile uint32_t *g_current_regs[CONFIG_SMP_NCPUS];
+#  define CURRENT_REGS (g_current_regs[up_cpu_index()])
+
+#else
+
+extern volatile uint32_t *g_current_regs[1];
+#  define CURRENT_REGS (g_current_regs[0])
+
+#endif
+
+#ifdef HAVE_INTERRUPTSTACK
+/* The (optional) interrupt stack */
+
+extern uint32_t g_intstack[INTERRUPT_STACKWORDS];
+#endif
+
+/* Address of the CPU0 IDLE thread */
+
+extern uint32_t g_idlestack[IDLETHREAD_STACKWORDS];
+
+/* These 'addresses' of these values are setup by the linker script.  They are
+ * not actual uint32_t storage locations! They are only used meaningfully in the
+ * following way:
+ *
+ *  - The linker script defines, for example, the symbol_sdata.
+ *  - The declaration extern uint32_t _sdata; makes C happy.  C will believe
+ *    that the value _sdata is the address of a uint32_t variable _data (it is
+ *    not!).
+ *  - We can recoved the linker value then by simply taking the address of
+ *    of _data.  like:  uint32_t *pdata = &_sdata;
+ */
+
+extern uint32_t _init_start;        /* Start of initialization logic */
+extern uint32_t _stext;             /* Start of .text */
+extern uint32_t _etext;             /* End+1 of .text + .rodata */
+extern uint32_t _sdata;             /* Start of .data */
+extern uint32_t _edata;             /* End+1 of .data */
+extern uint32_t _srodata;           /* Start of .rodata */
+extern uint32_t _erodata;           /* End+1 of .rodata */
+extern uint32_t _sbss;              /* Start of .bss */
+extern uint32_t _ebss;              /* End+1 of .bss */
+extern uint32_t _sheap;             /* Start of heap */
+extern uint32_t _eheap;             /* End+1 of heap */
+
+/****************************************************************************
+ * Inline Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/* Common Functions *********************************************************/
+/* Common functions defined in arch/xtensa/src/common.  These may be replaced
+ * with chip-specific functions of the same name if needed.  See also
+ * functions prototyped in include/nuttx/arch.h.
+ */
+
+/* Atomic modification of registers */
+
+void modifyreg8(unsigned int addr, uint8_t clearbits, uint8_t setbits);
+void modifyreg16(unsigned int addr, uint16_t clearbits, uint16_t setbits);
+void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits);
+
+/* Context switching */
+
+void xtensa_copystate(uint32_t *dest, uint32_t *src);
+
+/* Serial output */
+
+void up_puts(const char *str);
+void up_lowputs(const char *str);
+
+/* Defined in drivers/lowconsole.c */
+
+#ifdef CONFIG_DEV_LOWCONSOLE
+void lowconsole_init(void);
+#else
+# define lowconsole_init()
+#endif
+
+/* Debug */
+
+#ifdef CONFIG_ARCH_STACKDUMP
+void xtensa_dumpstate(void);
+#else
+#  define xtensa_dumpstate()
+#endif
+
+/* Common XTENSA functions */
+/* Initialization */
+
+#if XCHAL_CP_NUM > 0
+struct xtensa_cpstate_s;
+void xtensa_coproc_enable(struct xtensa_cpstate_s *cpstate, int cpset);
+void xtensa_coproc_disable(struct xtensa_cpstate_s *cpstate, int cpset);
+#endif
+
+/* IRQs */
+
+uint32_t *xtensa_int_decode(uint32_t cpuints, uint32_t *regs);
+uint32_t *xtensa_irq_dispatch(int irq, uint32_t *regs);
+uint32_t xtensa_enable_cpuint(uint32_t *shadow, uint32_t intmask);
+uint32_t xtensa_disable_cpuint(uint32_t *shadow, uint32_t intmask);
+void xtensa_panic(int xptcode, uint32_t *regs) noreturn_function;
+void xtensa_user(int exccause, uint32_t *regs) noreturn_function;
+
+/* Software interrupt handler */
+
+#ifdef CONFIG_SMP
+void __cpu1_start(void) noreturn_function;
+int xtensa_intercpu_interrupt(int tocpu, int intcode);
+void xtensa_pause_handler(void);
+#endif
+
+/* Synchronous context switching */
+
+int xtensa_context_save(uint32_t *regs);
+void xtensa_context_restore(uint32_t *regs) noreturn_function;
+
+#if XCHAL_CP_NUM > 0
+void xtensa_coproc_savestate(struct xtensa_cpstate_s *cpstate);
+void xtensa_coproc_restorestate(struct xtensa_cpstate_s *cpstate);
+#endif
+
+/* Signals */
+
+void _xtensa_sig_trampoline(void);
+void xtensa_sig_deliver(void);
+
+/* Chip-specific functions **************************************************/
+/* Chip specific functions defined in arch/xtensa/src/ */
+/* IRQs */
+
+void xtensa_irq_initialize(void);
+bool xtensa_pending_irq(int irq);
+void xtensa_clrpend_irq(int irq);
+
+/* DMA */
+
+#ifdef CONFIG_ARCH_DMA
+void weak_function xtensa_dma_initialize(void);
+#endif
+
+/* Memory management */
+
+#if CONFIG_MM_REGIONS > 1
+void xtensa_add_region(void);
+#else
+# define xtensa_add_region()
+#endif
+
+/* Serial output */
+
+void up_lowputc(char ch);
+#if CONFIG_NFILE_DESCRIPTORS > 0
+void xtensa_early_serial_initialize(void);
+void xtensa_serial_initialize(void);
+#else
+# define xtensa_earlyserialinit()
+# define xtensa_serial_initialize()
+#endif
+
+/* System timer */
+
+void xtensa_timer_initialize(void);
+
+/* Network */
+
+#ifdef CONFIG_NET
+void up_netinitialize(void);
+#else
+# define up_netinitialize()
+#endif
+
+/* USB */
+
+#ifdef CONFIG_USBDEV
+void up_usbinitialize(void);
+void up_usbuninitialize(void);
+#else
+# define up_usbinitialize()
+# define up_usbuninitialize()
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif  /* __ARCH_XTENSA_SRC_COMMON_XTENSA_H */
diff --git a/arch/xtensa/src/common/xtensa_abi.h b/arch/xtensa/src/common/xtensa_abi.h
new file mode 100644
index 0000000000000000000000000000000000000000..db5ab5d55217c4c4505fcce7483238e2c60f0f93
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_abi.h
@@ -0,0 +1,165 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_cpuint.S
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from logic originally provided by Cadence Design Systems Inc.
+ *
+ *   Copyright (c) 2006-2015 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_COMMON_XTENSA_ABI_H
+#define __ARCH_XTENSA_SRC_COMMON_XTENSA_ABI_H 1
+
+/* Windowed ABI
+ *
+ *   The Windowed Register Option replaces the simple 16-entry AR register
+ *   file with a larger register file from which a window of 16 entries is
+ *   visible at any given time.  The window is rotated on subroutine entry
+ *   and exit, automatically saving and restoring some registers.  When the
+ *   window is rotated far enough to require registers to be saved to or
+ *   restored from the program stack, an exception is raised to move some
+ *   of the register values between the register file and the program stack.
+ *
+ *   Windowed Register Usage:
+ *     ---------------- ----------------------------------
+ *     Callee Register  Usage
+ *     Register Name
+ *     ---------------- ----------------------------------
+ *     a0               Return address
+ *     a1/sp            Stack pointer
+ *     a2..a7           In, out, inout, and return values
+ *     ---------------- ----------------------------------
+ *
+ *   Calls to routines that use only a2..a3 as parameters may use the CALL4,
+ *   CALL8, or CALL12 instructions to save 4, 8, or 12 live registers. Calls
+ *   to routines that use a2..a7 for parameters may use only CALL8 or CALL12.
+ *
+ *   Arguments are passed in both registers and memory. The first six incoming
+ *   arguments are stored in registers a2 through a7, and additional arguments
+ *   are stored on the stack starting at the current stack pointer a1.  Because
+ *   Xtensa uses register windows that rotate during a function call, outgoing
+ *   arguments that will become the incoming arguments must be stored to
+ *   different register numbers. Depending on the call instruction and, thus,
+ *   the rotation of the register window, the arguments are passed starting
+ *   starting with register a(2+N), where N is the size of the window rotation.
+ *   Therefore, the first argument in case of a call4 instruction is placed into
+ *   a6, and for a call8 instruction into a10. Large arguments (8-bytes) are
+ *   always passed in an even/odd register pair even if that means to omit a
+ *   register for alignment. The return values are stored in a2 through a7.
+ *
+ *          return addr  stack ptr  arg0, arg1, arg2, arg3, arg4, arg5
+ *          -----------  ---------  ----------------------------------
+ *            a0           a1         a2,   a3,   a4,   a5,   a6,   a7
+ *
+ *   call4    a4           a5         a6,   a7,   a8,   a9,  a10,  a11
+ *   call8    a8           a9        a10,  a11,  a12,  a13,  a14,  a15
+ *   call12  a12          a13        a14,  a15   ---   ---   ---   ---
+ *
+ *   The stack pointer SP should only be modified by ENTRY and MOVSP
+ *   instructions (except for initialization and restoration). If some other
+ *   instruction modifies SP, any values in the register-spill area will not
+ *   be moved.
+ *
+ * Call 0 ABI
+ *
+ *   CALL0 AR Register Usage
+ *     ---------------- ----------------------------------
+ *     Callee Register  Usage
+ *     Register Name
+ *     ---------------- ----------------------------------
+ *     a0               Return Address
+ *     a1/sp            Stack pointer
+ *     a2..a7           In, out, inout, and return values
+ *     a8               Static Chain
+ *     a12..a15         Callee-saved
+ *     a15              Stack-Frame Pointer (optional)
+ *
+ *     a0, a2-a11       Caller-saved
+ *     a1, a12..a15     Callee-saved
+ *     ---------------- ----------------------------------
+ *
+ *   CALL0 is used.  The return address is placed in A0 and the CPU simply
+ *   jumps to the CALL0 function entry point.
+ */
+
+/****************************************************************************
+ * Pre-processor Defintions
+ ****************************************************************************/
+
+/* MACROS TO HANDLE ABI SPECIFICS OF FUNCTION ENTRY AND RETURN
+ *
+ * Convenient where the frame size requirements are the same for both ABIs.
+ *   ENTRY(sz), RET(sz) are for framed functions (have locals or make calls).
+ *   ENTRY0,    RET0    are for frameless functions (no locals, no calls).
+ *
+ * where size = size of stack frame in bytes (must be >0 and aligned to 16).
+ * For framed functions the frame is created and the return address saved at
+ * base of frame (Call0 ABI) or as determined by hardware (Windowed ABI).
+ * For frameless functions, there is no frame and return address remains in a0.
+ * Note: Because CPP macros expand to a single line, macros requiring multi-line
+ * expansions are implemented as assembler macros.
+ */
+
+#ifdef __ASSEMBLY__
+/* Function prologues and epilogues */
+
+#ifdef __XTENSA_CALL0_ABI__
+  /* Call0 */
+
+	.macro	entry1 size=0x10
+	addi	sp, sp, -\size
+	s32i	a0, sp, 0
+	.endm
+
+	.macro	ret1 size=0x10
+	l32i	a0, sp, 0
+	addi	sp, sp, \size
+	ret
+	.endm
+
+#  define ENTRY(sz)     entry1  sz
+#  define ENTRY0
+#  define RET(sz)       ret1    sz
+#  define RET0          ret
+
+#else
+  /* Windowed */
+
+#  define ENTRY(sz)     entry   sp, sz
+#  define ENTRY0        entry   sp, 0x10
+#  define RET(sz)       retw
+#  define RET0          retw
+
+#endif
+
+/* Index into stack frame (skipping over saved A0) */
+
+#define LOCAL_OFFSET(n) ((n) << 2)  /* n = 1 .. ((size >> 2) - 1) */
+
+#endif /*  __ASSEMBLY_ */
+
+#endif /* __ARCH_XTENSA_SRC_COMMON_XTENSA_ABI_H */
diff --git a/arch/xtensa/src/common/xtensa_assert.c b/arch/xtensa/src/common/xtensa_assert.c
new file mode 100644
index 0000000000000000000000000000000000000000..24b7fd7e23b70761a06b0ffa71cf32ccef61ec04
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_assert.c
@@ -0,0 +1,311 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_assert.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "sched/sched.h"
+#include "xtensa.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* USB trace dumping */
+
+#ifndef CONFIG_USBDEV_TRACE
+#  undef CONFIG_ARCH_USBDUMP
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: assert_tracecallback
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_USBDUMP
+static int usbtrace_syslog(FAR const char *fmt, ...)
+{
+  va_list ap;
+  int ret;
+
+  /* Let vsyslog do the real work */
+
+  va_start(ap, fmt);
+  ret = vsyslog(LOG_EMERG, fmt, ap);
+  va_end(ap);
+  return ret;
+}
+
+static int assert_tracecallback(FAR struct usbtrace_s *trace, FAR void *arg)
+{
+  usbtrace_trprintf(usbtrace_syslog, trace->event, trace->value);
+  return 0;
+}
+#endif
+
+/****************************************************************************
+ * Name: xtensa_assert
+ ****************************************************************************/
+
+static void xtensa_assert(int errorcode) noreturn_function;
+static void xtensa_assert(int errorcode)
+{
+  /* Dump the processor state */
+
+  xtensa_dumpstate();
+
+#ifdef CONFIG_ARCH_USBDUMP
+  /* Dump USB trace data */
+
+  (void)usbtrace_enumerate(assert_tracecallback, NULL);
+#endif
+
+#ifdef CONFIG_BOARD_CRASHDUMP
+  /* Perform board-specific crash dump */
+
+  board_crashdump(up_getsp(), this_task(), filename, lineno);
+#endif
+
+  /* Are we in an interrupt handler or the idle task? */
+
+  if (CURRENT_REGS || this_task()->pid == 0)
+    {
+       /* Blink the LEDs forever */
+
+       (void)up_irq_save();
+        for (; ; )
+          {
+#ifdef CONFIG_ARCH_LEDS
+            board_autoled_on(LED_PANIC);
+            up_mdelay(250);
+            board_autoled_off(LED_PANIC);
+            up_mdelay(250);
+#endif
+          }
+    }
+  else
+    {
+      /* Assertions in other contexts only cause the thread to exit */
+
+      exit(errorcode);
+    }
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_assert
+ ****************************************************************************/
+
+void up_assert(const uint8_t *filename, int lineno)
+{
+#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
+  struct tcb_s *rtcb = this_task();
+#endif
+
+  board_autoled_on(LED_ASSERTION);
+
+#if CONFIG_TASK_NAME_SIZE > 0
+  _alert("Assertion failed at file:%s line: %d task: %s\n",
+        filename, lineno, rtcb->name);
+#else
+  _alert("Assertion failed at file:%s line: %d\n",
+        filename, lineno);
+#endif
+
+  xtensa_assert(EXIT_FAILURE);
+}
+
+/****************************************************************************
+ * Name: xtensa_panic
+ *
+ * Description:
+ *   PANIC if an unhandled exception is received:
+ *
+ *   - NMI exception
+ *   - Debug exception
+ *   - Double exception
+ *   - Kernel exception
+ *   - Co-processor exception
+ *   - High priority level2-6 Exception.
+ *
+ * Input parameters:
+ *   xcptcode - Identifies the unhandled exception (see include/esp32/irq.h)
+ *   regs - The register save are at the time of the interrupt.
+ *
+ * Returned Value:
+ *   Does not return
+ *
+ ****************************************************************************/
+
+void xtensa_panic(int xptcode, uint32_t *regs)
+{
+#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
+  struct tcb_s *rtcb = this_task();
+#endif
+
+  /* We get here when a un-dispatch-able, irrecoverable exception occurs */
+
+  board_autoled_on(LED_ASSERTION);
+
+#if CONFIG_TASK_NAME_SIZE > 0
+  _alert("Unhandled Exception %d task: %s\n", xptcode, rtcb->name);
+#else
+  _alert("Unhandled Exception %d\n", xptcode);
+#endif
+
+  CURRENT_REGS = regs;
+  xtensa_assert(EXIT_FAILURE); /* Should not return */
+  for (; ; );
+}
+
+/****************************************************************************
+ * Name: xtensa_user
+ *
+ * Description:
+ *   PANIC if certain User Exceptions are received received.  All values for
+ *   EXCCAUSE are listed below (not all generate PANICs):
+ *
+ *   0  IllegalInstructionCause
+ *      Illegal instruction
+ *   1  SyscallCause
+ *      SYSCALL instruction
+ *   2  InstructionFetchErrorCause
+ *      Processor internal physical address or data error during instruction
+ *      fetch.
+ *   3  LoadStoreErrorCause
+ *      Processor internal physical address or data error during load or
+ *      store.
+ *   4  Level1InterruptCause
+ *      Level-1 interrupt as indicated by set level-1 bits in the INTERRUPT
+ *      register.
+ *   5  AllocaCause
+ *      MOVSP instruction, if caller’s registers are not in the register file.
+ *   6  IntegerDivideByZeroCause
+ *      QUOS, QUOU, REMS, or REMU divisor operand is zero.
+ *   7  PCValueErrorCause Next PC Value Illegal
+ *   8  PrivilegedCause
+ *      Attempt to execute a privileged operation when CRING != 0
+ *   9  LoadStoreAlignmentCause
+ *      Load or store to an unaligned address.
+ *   10..11 Reserved for Cadence
+ *   12 InstrPIFDataErrorCause
+ *      PIF data error during instruction fetch.
+ *   13 LoadStorePIFDataErrorCause
+ *      Synchronous PIF data error during LoadStore access.
+ *   14 InstrPIFAddrErrorCause
+ *      PIF address error during instruction fetch.
+ *   15 LoadStorePIFAddrErrorCause
+ *      Synchronous PIF address error during LoadStore access.
+ *   16 InstTLBMissCause
+ *      Error during Instruction TLB refill
+ *   17 InstTLBMultiHitCause
+ *      Multiple instruction TLB entries matched
+ *   18 InstFetchPrivilegeCause
+ *      An instruction fetch referenced a virtual address at a ring leve
+ *      less than CRING.
+ *   19 Reserved for Cadence
+ *   20 InstFetchProhibitedCause
+ *       An instruction fetch referenced a page mapped with an attribute
+ *      that does not permit instruction fetch.
+ *   21..23 Reserved for Cadence
+ *   24 LoadStoreTLBMissCause
+ *      Error during TLB refill for a load or store.
+ *   25 LoadStoreTLBMultiHitCause
+ *      Multiple TLB entries matched for a load or store.
+ *   26 LoadStorePrivilegeCause
+ *      A load or store referenced a virtual address at a ring level less
+ *      than CRING.
+ *   27 Reserved for Cadence
+ *   28 LoadProhibitedCause
+ *      A load referenced a page mapped with an attribute that does not
+ *      permit loads.
+ *   29 StoreProhibitedCause
+ *     A store referenced a page mapped with an attribute that does not
+ *     permit stores.
+ *   30..31 Reserved for Cadence
+ *   32..39 CoprocessornDisabled
+ *     Coprocessor n instruction when cpn disabled. n varies 0..7 as the
+ *     cause varies 32..39.
+ *   40..63 Reserved
+ *
+ * Input parameters:
+ *   exccause - Identifies the EXCCAUSE of the user exception
+ *   regs - The register save are at the time of the interrupt.
+ *
+ * Returned Value:
+ *   Does not return
+ *
+ ****************************************************************************/
+
+void xtensa_user(int exccause, uint32_t *regs)
+{
+#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
+  struct tcb_s *rtcb = this_task();
+#endif
+
+  /* We get here when a un-dispatch-able, irrecoverable exception occurs */
+
+  board_autoled_on(LED_ASSERTION);
+
+#if CONFIG_TASK_NAME_SIZE > 0
+  _alert("User Exception: EXCCAUSE=%04x task: %s\n", exccause, rtcb->name);
+#else
+  _alert("User Exception: EXCCAUSE=%04x\n", exccause);
+#endif
+
+  CURRENT_REGS = regs;
+  xtensa_assert(EXIT_FAILURE); /* Should not return */
+  for (; ; );
+}
diff --git a/arch/xtensa/src/common/xtensa_attr.h b/arch/xtensa/src/common/xtensa_attr.h
new file mode 100644
index 0000000000000000000000000000000000000000..72cce41da91e4b4ce2cb63891facb246cbdb2527
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_attr.h
@@ -0,0 +1,65 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_irq.S
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from logic originally provided by Espressif Systems:
+ *
+ *   Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_COMMON_XTENSA_ATTR_H
+#define __ARCH_XTENSA_SRC_COMMON_XTENSA_ATTR_H
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define ROMFN_ATTR
+
+/* Normally, the linker script will put all code and rodata in flash,
+ * and all variables in shared RAM. These macros can be used to redirect
+ * particular functions/variables to other memory regions.
+ */
+
+/* Forces code into IRAM instead of flash */
+
+#define IRAM_ATTR __attribute__((section(".iram1")))
+
+/* Forces data into DRAM instead of flash */
+
+#define DRAM_ATTR __attribute__((section(".dram1")))
+
+/* Forces code into RTC fast memory */
+
+#define RTC_IRAM_ATTR __attribute__((section(".rtc.text")))
+
+/* Forces data into RTC slow memory
+ * Any variable marked with this attribute will keep its value
+ * during a deep sleep / wake cycle. */
+
+#define RTC_DATA_ATTR __attribute__((section(".rtc.data")))
+
+/* Forces read-only data into RTC slow memory
+ * Makes constant data available to RTC wake stubs.
+ */
+
+#define RTC_RODATA_ATTR __attribute__((section(".rtc.rodata")))
+
+#endif /* __ARCH_XTENSA_SRC_COMMON_XTENSA_ATTR_H */
diff --git a/arch/xtensa/src/common/xtensa_blocktask.c b/arch/xtensa/src/common/xtensa_blocktask.c
new file mode 100644
index 0000000000000000000000000000000000000000..fb1c0f910bb1fb8993753da2b643df287c209d1d
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_blocktask.c
@@ -0,0 +1,190 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_blocktask.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "group/group.h"
+#include "xtensa.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_block_task
+ *
+ * Description:
+ *   The currently executing task at the head of
+ *   the ready to run list must be stopped.  Save its context
+ *   and move it to the inactive list specified by task_state.
+ *
+ * Inputs:
+ *   tcb: Refers to a task in the ready-to-run list (normally
+ *     the task at the head of the list).  It most be
+ *     stopped, its context saved and moved into one of the
+ *     waiting task lists.  It it was the task at the head
+ *     of the ready-to-run list, then a context to the new
+ *     ready to run task must be performed.
+ *   task_state: Specifies which waiting task list should be
+ *     hold the blocked task TCB.
+ *
+ ****************************************************************************/
+
+void up_block_task(struct tcb_s *tcb, tstate_t task_state)
+{
+  struct tcb_s *rtcb = this_task();
+  bool switch_needed;
+
+  /* Verify that the context switch can be performed */
+
+  ASSERT((tcb->task_state >= FIRST_READY_TO_RUN_STATE) &&
+         (tcb->task_state <= LAST_READY_TO_RUN_STATE));
+
+  /* Remove the tcb task from the ready-to-run list.  If we
+   * are blocking the task at the head of the task list (the
+   * most likely case), then a context switch to the next
+   * ready-to-run task is needed. In this case, it should
+   * also be true that rtcb == tcb.
+   */
+
+  switch_needed = sched_removereadytorun(tcb);
+
+  /* Add the task to the specified blocked task list */
+
+  sched_addblocked(tcb, (tstate_t)task_state);
+
+  /* If there are any pending tasks, then add them to the ready-to-run
+   * task list now
+   */
+
+  if (g_pendingtasks.head)
+    {
+      switch_needed |= sched_mergepending();
+    }
+
+  /* Now, perform the context switch if one is needed */
+
+  if (switch_needed)
+    {
+      /* Update scheduler parameters */
+
+      sched_suspend_scheduler(rtcb);
+
+      /* Are we in an interrupt handler? */
+
+      if (CURRENT_REGS)
+        {
+          /* Yes, then we have to do things differently.
+           * Just copy the CURRENT_REGS into the OLD rtcb.
+           */
+
+          xtensa_savestate(rtcb->xcp.regs);
+
+          /* Restore the exception context of the rtcb at the (new) head
+           * of the ready-to-run task list.
+           */
+
+          rtcb = this_task();
+
+          /* Reset scheduler parameters */
+
+          sched_resume_scheduler(rtcb);
+
+          /* Then switch contexts.  Any necessary address environment
+           * changes will be made when the interrupt returns.
+           */
+
+          xtensa_restorestate(rtcb->xcp.regs);
+        }
+
+      /* Copy the user C context into the TCB at the (old) head of the
+       * ready-to-run Task list. if up_saveusercontext returns a non-zero
+       * value, then this is really the previously running task restarting!
+       */
+
+      else if (!xtensa_context_save(rtcb->xcp.regs))
+        {
+#if XCHAL_CP_NUM > 0
+          /* Save the co-processor state in in the suspended thread's co-
+           * processor save area.
+           */
+
+          xtensa_coproc_savestate(&rtcb->xcp.cpstate);
+#endif
+
+          /* Restore the exception context of the rtcb at the (new) head
+           * of the ready-to-run task list.
+           */
+
+          rtcb = this_task();
+
+#if XCHAL_CP_NUM > 0
+          /* Set up the co-processor state for the newly started thread. */
+
+          xtensa_coproc_restorestate(&rtcb->xcp.cpstate);
+#endif
+
+#ifdef CONFIG_ARCH_ADDRENV
+          /* Make sure that the address environment for the previously
+           * running task is closed down gracefully (data caches dump,
+           * MMU flushed) and set up the address environment for the new
+           * thread at the head of the ready-to-run list.
+           */
+
+          (void)group_addrenv(rtcb);
+#endif
+          /* Reset scheduler parameters */
+
+          sched_resume_scheduler(rtcb);
+
+          /* Then switch contexts */
+
+          xtensa_context_restore(rtcb->xcp.regs);
+        }
+    }
+}
diff --git a/arch/xtensa/src/common/xtensa_checkstack.c b/arch/xtensa/src/common/xtensa_checkstack.c
new file mode 100644
index 0000000000000000000000000000000000000000..4853513905721cc9b8242c6eb550ed6cc28ec9a7
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_checkstack.c
@@ -0,0 +1,214 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_checkstack.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "xtensa.h"
+#include "sched/sched.h"
+
+#ifdef CONFIG_STACK_COLORATION
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static size_t do_stackcheck(uintptr_t alloc, size_t size);
+
+/****************************************************************************
+ * Name: do_stackcheck
+ *
+ * Description:
+ *   Determine (approximately) how much stack has been used be searching the
+ *   stack memory for a high water mark.  That is, the deepest level of the
+ *   stack that clobbered some recognizable marker in the stack memory.
+ *
+ * Input Parameters:
+ *   alloc - Allocation base address of the stack
+ *   size - The size of the stack in bytes
+ *
+ * Returned value:
+ *   The estimated amount of stack space used.
+ *
+ ****************************************************************************/
+
+static size_t do_stackcheck(uintptr_t alloc, size_t size)
+{
+  FAR uintptr_t start;
+  FAR uintptr_t end;
+  FAR uint32_t *ptr;
+  size_t mark;
+
+  if (size == 0)
+    {
+      return 0;
+    }
+
+  /* Get aligned addresses of the top and bottom of the stack */
+
+#ifdef CONFIG_TLS
+  /* Skip over the TLS data structure at the bottom of the stack */
+
+  DEBUGASSERT((alloc & TLS_STACK_MASK) == 0);
+  start = alloc + sizeof(struct tls_info_s);
+#else
+  start = alloc & ~3;
+#endif
+  end   = (alloc + size + 3) & ~3;
+
+  /* Get the adjusted size based on the top and bottom of the stack */
+
+  size  = end - start;
+
+  /* The Xtensa CPUs use a push-down stack:  the stack grows toward lower
+   * addresses in memory.  We need to start at the lowest address in the
+   * stack memory allocation and search to higher addresses.  The first word
+   * we encounter that does not have the magic value is the high water mark.
+   */
+
+  for (ptr = (FAR uint32_t *)start, mark = (size >> 2);
+       *ptr == STACK_COLOR && mark > 0;
+       ptr++, mark--);
+
+  /* If the stack is completely used, then this might mean that the stack
+   * overflowed from above (meaning that the stack is too small), or may
+   * have been overwritten from below meaning that some other stack or data
+   * structure overflowed.
+   *
+   * If you see returned values saying that the entire stack is being used
+   * then enable the following logic to see it there are unused areas in the
+   * middle of the stack.
+   */
+
+#if 0
+  if (mark + 16 > nwords)
+    {
+      int i;
+      int j;
+
+      ptr = (FAR uint32_t *)start;
+      for (i = 0; i < size; i += 4*64)
+        {
+          for (j = 0; j < 64; j++)
+            {
+              int ch;
+              if (*ptr++ == STACK_COLOR)
+                {
+                  ch = '.';
+                }
+              else
+                {
+                  ch = 'X';
+                }
+
+              up_putc(ch);
+            }
+
+          up_putc('\n');
+        }
+    }
+#endif
+
+  /* Return our guess about how much stack space was used */
+
+  return mark << 2;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_check_stack and friends
+ *
+ * Description:
+ *   Determine (approximately) how much stack has been used be searching the
+ *   stack memory for a high water mark.  That is, the deepest level of the
+ *   stack that clobbered some recognizable marker in the stack memory.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned value:
+ *   The estimated amount of stack space used.
+ *
+ ****************************************************************************/
+
+size_t up_check_tcbstack(FAR struct tcb_s *tcb)
+{
+  return do_stackcheck((uintptr_t)tcb->stack_alloc_ptr, tcb->adj_stack_size);
+}
+
+ssize_t up_check_tcbstack_remain(FAR struct tcb_s *tcb)
+{
+  return (ssize_t)tcb->adj_stack_size - (ssize_t)up_check_tcbstack(tcb);
+}
+
+size_t up_check_stack(void)
+{
+  return up_check_tcbstack(this_task());
+}
+
+ssize_t up_check_stack_remain(void)
+{
+  return up_check_tcbstack_remain(this_task());
+}
+
+#if CONFIG_ARCH_INTERRUPTSTACK > 3
+size_t up_check_intstack(void)
+{
+  return do_stackcheck((uintptr_t)&g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~3));
+}
+
+size_t up_check_intstack_remain(void)
+{
+  return (CONFIG_ARCH_INTERRUPTSTACK & ~3) - up_check_intstack();
+}
+#endif
+
+#endif /* CONFIG_STACK_COLORATION */
diff --git a/arch/xtensa/src/common/xtensa_context.S b/arch/xtensa/src/common/xtensa_context.S
new file mode 100644
index 0000000000000000000000000000000000000000..aa0306cb5a25451e18d6b7384890b794203d37de
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_context.S
@@ -0,0 +1,583 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_context.S
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from logic originally provided by Cadence Design Systems Inc.
+ *
+ *   Copyright (c) 2006-2015 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ ****************************************************************************/
+
+	.file	"xtensa_context.S"
+
+/* XTENSA CONTEXT SAVE AND RESTORE ROUTINES
+ *
+ * Low-level Call0 functions for handling generic context save and restore
+ * of registers not specifically addressed by the interrupt vectors and
+ * handlers.  Those registers (not handled by these functions) are PC, PS,
+ * A0, A1 (SP).
+ *
+ * Note that in Call0 ABI, interrupt handlers are expected to preserve the callee-
+ * save regs (A12-A15), which is always the case if the handlers are coded in C.
+ * However A12, A13 are made available as scratch registers for interrupt dispatch
+ * code, so are presumed saved anyway, and are always restored even in Call0 ABI.
+ * Only A14, A15 are truly handled as callee-save regs.
+ *
+ * Because Xtensa is a configurable architecture, this port supports all user
+ * generated configurations (except restrictions stated in the release notes).
+ * This is accomplished by conditional compilation using macros and functions
+ * defined in the Xtensa HAL (hardware adaptation layer) for your configuration.
+ * Only the processor state included in your configuration is saved and restored,
+ * including any processor state added by user configuration options or TIE.
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "xtensa_abi.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+	.text
+
+/****************************************************************************
+ * Name: _xtensa_context_save
+ *
+ * Description:
+ *
+ *   NOTE: MUST BE CALLED ONLY BY 'CALL0' INSTRUCTION!
+ *
+ *   This function saves Xtensa processor state:  xtensa_context_save
+ *   saves all registers except PC, PS, A0, A1 (SP), and A2
+ *
+ *   This function is called directly by interrupt handling logic and from
+ *   xtensa_context_save() below with interrupts disabled.  In either calling
+ *   context, caller saves saves PC, PS, A0, A1 (SP), and A2.  This
+ *   logic also executes indirectly from xtena_context_save() by falling
+ *   through from above.
+ *
+ *   The counterpart to this function is _xtensa_context_restore().
+ *
+ * Entry Conditions:
+ *   - A0  = Return address to caller.
+ *   - A2  = Pointer to the processor state save area
+ *   - Other processor state except PC, PS, A0, A1 (SP), and A2 are as at
+ *     the point of interruption.
+ *
+ * Exit conditions:
+ *   - A0  = Return address in caller.
+ *   - A2, A12-A15 as at entry (preserved).
+ *
+ * Assumptions:
+ *   - Caller is expected to have saved PC, PS, A0, A1 (SP), and A2.
+ *   - If windowed ABI, PS.EXCM = 1 (exceptions disabled).
+ *
+ ****************************************************************************/
+
+	.global	_xtensa_context_save
+	.type	_xtensa_context_save, @function
+
+	.align	4
+	.literal_position
+	.align	4
+
+_xtensa_context_save:
+
+	s32i	a3,  a2, (4 * REG_A3)
+	s32i	a4,  a2, (4 * REG_A4)
+	s32i	a5,  a2, (4 * REG_A5)
+	s32i	a6,  a2, (4 * REG_A6)
+	s32i	a7,  a2, (4 * REG_A7)
+	s32i	a8,  a2, (4 * REG_A8)
+	s32i	a9,  a2, (4 * REG_A9)
+	s32i	a10, a2, (4 * REG_A10)
+	s32i	a11, a2, (4 * REG_A11)
+
+	/* Call0 ABI callee-saved regs a12-15 */
+
+	s32i	a12, a2, (4 * REG_A12)
+	s32i	a13, a2, (4 * REG_A13)
+	s32i	a14, a2, (4 * REG_A14)
+	s32i	a15, a2, (4 * REG_A15)
+
+	rsr		a3, SAR
+	s32i	a3, a2, (4 * REG_SAR)
+
+#ifdef XCHAL_HAVE_LOOPS
+	rsr		a3, LBEG
+	s32i	a3, a2, (4 * REG_LBEG)
+	rsr		a3, LEND
+	s32i	a3, a2, (4 * REG_LEND)
+	rsr		a3, LCOUNT
+	s32i	a3, a2, (4 * REG_LCOUNT)
+#endif
+
+#ifndef __XTENSA_CALL0_ABI__
+	/* To spill the reg windows, temp. need pre-interrupt stack ptr and
+	 * a4-15.  Interrupts need to be disabled below XCHAL_EXCM_LEVEL and
+	 * window overflow and underflow exceptions disabled (assured by
+	 * PS.EXCM == 1).
+	 */
+
+#ifdef CONFIG_XTENSA_USE_OVLY
+	/* Save the overlay state if we are supporting overlays. Since we just
+	 * saved three registers, we can conveniently use them here. Note that
+	 * as of now, overlays only work for windowed calling ABI.
+	 */
+
+#error Overly support is not implemented
+#endif
+
+	s32i	a0, a2, (4 * REG_TMP0)			/* Save return address */
+	s32i	sp, a2, (4 * REG_TMP1)			/* Save current stack pointer */
+	wsr		a2, EXCSAVE_1					/* Preserve register save area */
+
+	l32i	sp, a2, (4 * REG_A1)			/* Restore the interruptee's SP */
+	call0	_xtensa_window_spill			/* Preserves only a4-a5, a8-a9, a12-a13 */
+
+	rsr		a2, EXCSAVE_1					/* Save interruptee's a0 */
+	l32i	a0, a2, (4 * REG_TMP0)			/* Save return address */
+	l32i	sp, a2, (4 * REG_TMP1)			/* Save current stack pointer */
+#endif
+
+	ret
+
+	.size	_xtensa_context_save, . - _xtensa_context_save
+
+/****************************************************************************
+ * Name: xtensa_context_save
+ *
+ * Description:
+ *
+ *   This functions implements the moral equivalent of setjmp().  It is
+ *   called from user code (with interrupts disabled) to save the current
+ *   state of the running thread.  This function always returns zero.
+ *   However, it sets the saved value of the return address (A2) to 1.
+ *   If the thread is s via _xtensa_context_restore or
+ *   xtensa_context_restore, it will appear as a second return from
+ *   xtensa_context_save but with the returned value of 1 to distinguish
+ *   the two cases.
+ *
+ *   The counterpart to this function is xtensa_context_restore().
+ *
+ * Entry Conditions:
+ *   - A0  = Return address to caller.
+ *   - A2  = Pointer to the processor state save area
+ *
+ * Exit conditions:
+ *   - A0  = Return address in caller.
+ *   - A2  = 0
+ *
+ * Assumptions:
+ *   - Interrupts are disabled.
+ *
+ ****************************************************************************/
+
+#ifdef __XTENSA_CALL0_ABI__
+
+/****************************************************************************
+ * Name: xtensa_context_save:
+ *
+ * Description:
+ *   This implementation of xtensa_context_save for the case of the CALL0 ABI
+ *
+ * Input State:
+ *   a0 = The return value to the caller.
+ *   a2 = The address of the register state state structure
+ *
+ * Return state:
+ *   a0 = The return value to the caller.
+ *   a2, a12-a15 preserved as at entry
+ *
+ ****************************************************************************/
+
+	.global	xtensa_context_save
+	.type	xtensa_context_save, @function
+
+	.align	4
+	.literal_position
+	.align	4
+
+xtensa_context_save:
+	ENTRY(16)
+
+	/* Set up for (potential) call to _xtensa_context_save() */
+
+	s32i	a3,  a2, (4 * REG_A3)			/* Get  scratch register */
+	rsr		a3, PS							/* Save callee's PS */
+	s32i	a3, a2, (4 * REG_PS)
+	s32i	a0, a2, (4 * REG_PC)			/* Save Return address as PC */
+
+	s32i	a0, a2, (4 * REG_A0)			/* Save callee's a0 */
+	s32i	sp, a2, (4 * REG_A1)			/* Save callee's SP */
+	movi	a3, 1							/* Set saved A2 to 1 */
+	s32i	a3, a2, (4 * REG_A2)
+
+	/* Save the rest of the processor state.  For the CALL0 ABI, we can user
+	 * _xtensa_context_save(),  Otherwise we duplicate the context save here
+	 * to avoid the window spill.
+	 */
+
+	l32i	r3, a2, (4 * REG_A3)			/* Recover original a3 */
+	call0	_xtensa_context_save			/* Save full register state */
+
+	/* Recover the return address and return zero */
+
+	l32i	a0, a2, (4 * REG_A0)			/* Recover return addess */
+	movi	a2, 0							/* Return zero */
+	RET(16)
+
+	.size	xtensa_context_save, . - xtensa_context_save
+#endif
+
+/****************************************************************************
+ * This implementation of xtensa_context_save for the case of the window ABI.
+ * This case is more complex.  For the Window ABI, there is a "hook" that
+ * performs the low level state state.  xtensa_context_save() is a simply
+ * trampoline function that performs the window oeprations in that
+ * configuration.
+ ****************************************************************************/
+
+#ifndef __XTENSA_CALL0_ABI__
+
+/****************************************************************************
+ * Name: _xtensa_save_hook:
+ *
+ * Input State:
+ *   True return value has already been saved
+ *   a0 = The return value into xtensa_context_save()
+ *   a2 = The address of the register state state structure
+ *
+ * Return state:
+ *   a0, a3 modified.
+ *   Other values as on entry
+ *   Returned value is in a3 (non-stanadard)
+ *
+ ****************************************************************************/
+
+	.type	_xtensa_save_hook, @function
+
+	.align	4
+	.literal_position
+	.align	4
+
+_xtensa_save_hook:
+
+	/* Save the return value of 1 that will be used when returning from a
+	 * context switch.  NOTE that the returned value from this function is
+	 * expected in a3 (not the usual a2). This also frees up a3 for a use
+	 * as a scratch register.
+	 */
+
+	movi	a3,  1							/* Set saved a3 to 1 */
+	s32i	a3,  a2, (4 * REG_A3)
+
+	/* Save the rest of the processor state.
+	 *
+	 * REVISIT: We could save a lot here.  It should not be necessary to
+	 * preserve all of these registers.  The ABI permits volatile, callee-
+	 * saved, registers to be clobbered on function calls.  We save the
+	 * whole tamale here mostly for debug purposes.
+	 *
+	 * NOTE that a3 was saved above.  The true a0 return value was saved
+	 * in xtensa_context_save.  The a0 value saved below is the return into
+	 * xtensa_context_save.
+	 */
+
+	rsr		a3,  PS							/* Save callee's PS */
+	s32i	a3,  a2, (4 * REG_PS)
+	s32i	a0,  a2, (4 * REG_PC)			/* Save Return address as PC */
+
+	s32i	sp,  a2, (4 * REG_A1)			/* Save callee's SP */
+	s32i	a2,  a2, (4 * REG_A2)
+	s32i	a4,  a2, (4 * REG_A4)			/* Save remaining registers */
+	s32i	a5,  a2, (4 * REG_A5)
+	s32i	a6,  a2, (4 * REG_A6)
+	s32i	a7,  a2, (4 * REG_A7)
+	s32i	a8,  a2, (4 * REG_A8)
+	s32i	a9,  a2, (4 * REG_A9)
+	s32i	a10, a2, (4 * REG_A10)
+	s32i	a11, a2, (4 * REG_A11)
+
+	/* Call0 ABI callee-saved regs a12-15 */
+
+	s32i	a12, a2, (4 * REG_A12)
+	s32i	a13, a2, (4 * REG_A13)
+	s32i	a14, a2, (4 * REG_A14)
+	s32i	a15, a2, (4 * REG_A15)
+
+	rsr		a3, SAR
+	s32i	a3, a2, (4 * REG_SAR)
+
+#ifdef XCHAL_HAVE_LOOPS
+	rsr		a3, LBEG
+	s32i	a3, a2, (4 * REG_LBEG)
+	rsr		a3, LEND
+	s32i	a3, a2, (4 * REG_LEND)
+	rsr		a3, LCOUNT
+	s32i	a3, a2, (4 * REG_LCOUNT)
+#endif
+
+	/* NOTE that the returned value is through a3 */
+
+	movi	a3, 0							/* Return zero, no context switch */
+	ret
+
+	.size	_xtensa_save_hook, . - _xtensa_save_hook
+
+/****************************************************************************
+ * Name: xtensa_context_save:
+ *
+ * Description:
+ *   This is the implementation of xtensa_context_save for the case of the
+ *   window ABI.  In the window ABI configuration, xtensa_context_save is a
+ *   thin  "trampoline" layer.  It performs the ENTRY window operations on
+ *   entry and the exit.  A call0 is used to force the retun from the context
+ *   switch to the window return within this trampoline.
+ *
+ * Input State:
+ *   a0 = The true return value to the caller.
+ *   a2 = The address of the register state state structure
+ *
+ * Return state:
+ *   a0, a2, and a3 modified.
+ *   Returned value is in a2
+ *
+ ****************************************************************************/
+
+	.global	xtensa_context_save
+	.type	xtensa_context_save, @function
+
+	.align	4
+	.literal_position
+	.align	4
+
+xtensa_context_save:
+	ENTRY(16)
+
+	/* Save the true return address in the register save structure (a0). */
+
+	s32i	a0, a2, (4 * REG_A0)		/* Save true return address (a0) */
+
+	/* Then perform the actual state save in _xtensa_save_hook.  The saved
+	 * EPC will be set to the return from this function then we will do the
+	 * RET(16) window fix-up.
+	 */
+
+	call0	_xtensa_save_hook			/* Save full register state */
+
+	/* a0 and a2 will be automatically restored in the context switch case
+	 * with  a3=1.  In the non-context switch return with a2=0, a2 will still
+	 * be valid, but we have to restore	 a0 ourself.  The following should
+	 * work in either case.
+	 */
+
+	l32i	a0, a2, (4 * REG_A0)		/* Recover the true return address (a0) */
+	mov		a2, a3						/* Move a3 to the correct register for return */
+	RET(16)
+
+	.size	xtensa_context_save, . - xtensa_context_save
+#endif
+
+/****************************************************************************
+ * Name: _xtensa_context_restore
+ *
+ * Description:
+ *
+ *   NOTE: MUST BE CALLED ONLY BY 'CALL0' INSTRUCTION!
+ *
+ *   These functions restores Xtensa processor state and differ in which
+ *   registers are saved: _xtensa_context_restore() restores all registers
+ *   except PC, PS, A0, and A2
+ *
+ *   The caller is responsible for restoring PC, PS, A0, and A2.
+ *
+ *   _xtensa_context_save is the counterpart to this function.
+ *
+ * Entry Conditions:
+ *   - A0  = Return address in caller.
+ *   - A2  = Pointer to the processor state save area
+ *
+ * Exit conditions:
+ *   - A0  = Return address in caller.
+ *   - Other registers are restored as detailed above
+ *   - A2 is preserved
+ *
+ ****************************************************************************/
+
+	.global _xtensa_context_restore
+	.type	xtensa_context_restore,@function
+
+	.align  4
+	.literal_position
+	.align  4
+
+_xtensa_context_restore:
+
+#ifdef XCHAL_HAVE_LOOPS
+	l32i	a3, a2, (4 * REG_LBEG)
+	l32i	a4, a2, (4 * REG_LEND)
+	wsr		a3, LBEG
+	l32i	a3, a2, (4 * REG_LCOUNT)
+	wsr		a4, LEND
+	wsr		a3, LCOUNT
+#endif
+
+#ifdef CONFIG_XTENSA_USE_OVLY
+	/* If we are using overlays, this is a good spot to check if we need
+	 * to restore an overlay for the incoming task. Here we have a bunch
+	 * of registers to spare. Note that this step is going to use a few
+	 * bytes of storage below SP (SP-20 to SP-32) if an overlay is going
+	 * to be restored.
+	 */
+
+#error Overly support is not implemented
+#endif
+
+	l32i	a3, a2, (4 * REG_SAR)
+	l32i	sp, a2, (4 * REG_A1)
+	wsr		a3, SAR
+	l32i	a3, a2, (4 * REG_A3)
+	l32i	a4, a2, (4 * REG_A4)
+	l32i	a5, a2, (4 * REG_A5)
+	l32i	a6, a2, (4 * REG_A6)
+	l32i	a7, a2, (4 * REG_A7)
+	l32i	a8, a2, (4 * REG_A8)
+	l32i	a9, a2, (4 * REG_A9)
+	l32i	a10, a2, (4 * REG_A10)
+	l32i	a11, a2, (4 * REG_A11)
+
+	/* Call0 ABI callee-saved regs a12-15 */
+
+	l32i	a12, a2, (4 * REG_A12)
+	l32i	a13, a2, (4 * REG_A13)
+	l32i	a14, a2, (4 * REG_A14)
+	l32i	a15, a2, (4 * REG_A15)
+
+	ret
+
+	.size	_xtensa_context_restore, . - _xtensa_context_restore
+
+/****************************************************************************
+ * Name: xtensa_context_restore
+ *
+ * Description:
+ *
+ *   This functions implements the moral equivalent of longjmp().  It is
+ *   called from user code (with interrupts disabled) to restor the current
+ *   state of the running thread.  This function always appears to be a
+ *   second return from xtensa_context_save except that that it returns the
+ *   value 1 (because the saved value of A2 was set to 1
+ *   inxtensa_context_save()).
+ *
+ *   The counterpart to this function is xtensa_context_save().
+ *
+ * Entry Conditions:
+ *   - A0  = Return address to caller.
+ *   - A2  = Pointer to the processor state save area
+ *
+ * Exit conditions:
+ *   NOTE: That this function does NOT return to the caller but rather
+ *   to a new threading context.  It is not necessary to save any of the
+ *   caller's registers.
+ *
+ * Assumptions:
+ *   - Interrupts are disabled.
+ *
+ ****************************************************************************/
+
+	.global	xtensa_context_restore
+	.type	xtensa_context_restore, @function
+
+	.align	4
+	.literal_position
+	.align	4
+
+xtensa_context_restore:
+	ENTRY(16)
+
+#ifndef __XTENSA_CALL0_ABI__
+	/* Force a spill of the live registers of the thread that has been
+	 * suspended.
+	 *
+	 * _xtensa_window_spill return state:
+	 *   a2, a3: clobbered
+	 *   a4,a5,a8,a9,a12,a13: preserved
+	 *   a6,a7,a10,a11,a14,a15 clobbered if they were part of window(s)
+	 *      to be spilled, otherwise they are the same as on entry
+	 *   loop registers: Perserved
+	 *   SAR: clobbered
+	 *
+	 * We need to preserve only a2 for _xtensa_context_restore
+	 */
+
+	mov		a4, a2							/* Save a2 in a preserved register */
+	rsr		a5, PS							/* Save PS in preserved register */
+
+	movi	a3, ~(PS_WOE_MASK | PS_INTLEVEL_MASK)
+	and		a2, a5, a3						/* Clear WOE, INTLEVEL */
+	addi	a2, a2, XCHAL_EXCM_LEVEL		/* Set INTLEVEL = XCHAL_EXCM_LEVEL */
+	wsr		a2, PS							/* Apply to PS */
+	rsync
+
+	call0	_xtensa_window_spill
+	wsr		a5, PS							/* Restore PS */
+	rsync
+
+	mov		a2, a4							/* Recover a2 */
+#endif
+
+	/* Restore the processor state for the newly started thread */
+
+	call0	_xtensa_context_restore			/* Restore full register state */
+
+	/* Restore PC, PS, A0, and A2. */
+
+	l32i	a0, a2, (4 * REG_PS)			/* Restore PS */
+	wsr		a0, PS
+	l32i	a0, a2, (4 * REG_PC)			/* Set up for RFE */
+	wsr		a0, EPC_1
+	l32i	a0, a2, (4 * REG_A0)			/* Restore a0 */
+	l32i	a2, a2, (4 * REG_A2)			/* Restore A2 */
+
+	/* Return from exception. RFE returns from either the UserExceptionVector
+	 * or the KernelExceptionVector.  RFE sets PS.EXCM back to 0, and then
+	 * jumps to the address in EPC[1]. PS.UM and PS.WOE are left unchanged.
+	 */
+
+	rfe										/* And return from "exception" */
+
+	.size	xtensa_context_restore, . - xtensa_context_restore
diff --git a/arch/xtensa/src/common/xtensa_coproc.S b/arch/xtensa/src/common/xtensa_coproc.S
new file mode 100644
index 0000000000000000000000000000000000000000..6af4849ceeabf2b58136ab30cd36ed248575d976
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_coproc.S
@@ -0,0 +1,472 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_coproc.S
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from logic originally provided by Cadence Design Systems Inc.
+ *
+ *   Copyright (c) 2006-2015 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ ****************************************************************************/
+
+	.file	"xtensa_coproc.S"
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "xtensa_abi.h"
+
+#if XCHAL_CP_NUM > 0
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+	.section .rodata, "a"
+
+	/* Offset to CP n save area in thread's CP save area. */
+
+	.global	_xtensa_coproc_saoffsets
+	.type	_xtensa_coproc_saoffsets, @object
+	.align	16                      /* Minimize crossing cache boundaries */
+
+_xtensa_coproc_saoffsets:
+
+	.word	XTENSA_CP0_SA, XTENSA_CP1_SA, XTENSA_CP2_SA, XTENSA_CP3_SA
+	.word	XTENSA_CP4_SA, XTENSA_CP5_SA, XTENSA_CP6_SA, XTENSA_CP7_SA
+
+	.size	_xtensa_coproc_saoffsets, . - _xtensa_coproc_saoffsets
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+	.text
+
+/****************************************************************************
+ * Name: _xtensa_coproc_savestate
+ *
+ * Description:
+ *   If there is a current thread and it has a coprocessor state save area,
+ *   then save all callee-saved state into this area. This function is
+ *   called from the solicited context switch handler. It calls a system-
+ *   specific function to get the coprocessor save area base address.
+ *
+ *   It is also called from xtensa_coproc_savestate() for synchronous
+ *   context switches.  xtensa_coproc_savestate() is simply a C wrapper
+ *   around the assembly language call to _xtensa_coproc_savestate.
+ *
+ * Entry Conditions:
+ *   - A2 holds the address of the co-processor state save area
+ *   - The thread being switched out is still the current thread.
+ *   - CPENABLE state reflects which coprocessors are active.
+ *   - Registers have been saved/spilled already.
+ *
+ * Exit conditions:
+ *   - All necessary CP callee-saved state has been saved.
+ *   - Registers a2-a7, a13-a15 have been trashed.
+ *
+ * Must be called from assembly code only, using CALL0.
+ *
+ ****************************************************************************/
+
+	.global	_xtensa_coproc_savestate
+	.type	_xtensa_coproc_savestate, @function
+
+	.align	4
+	.literal_position
+	.align	4
+
+_xtensa_coproc_savestate:
+
+	/* Move the address of the thread state save area to R15 */
+
+	mov		a15, a2							/* A15 is now the address of the save area */
+
+	/* CPENABLE should show which CPs are enabled. */
+
+	rsr		a2, CPENABLE					/* a2 = which CPs are enabled */
+	beqz	a2, .Ldone1						/* Quick exit if none */
+
+	s16i	a2, a15, XTENSA_CPSTORED		/* Save mask of CPs being stored */
+	movi	a13, _xtensa_coproc_saoffsets	/* Array of CP save offsets */
+	l32i	a15, a15, XTENSA_CPASA			/* a15 = base of aligned save area */
+
+#if XCHAL_CP0_SA_SIZE > 0
+	bbci.l	a2, 0, 2f						/* CP 0 not enabled */
+	l32i	a14, a13, 0						/* a14 = _xtensa_coproc_saoffsets[0] */
+	add		a3, a14, a15					/* a3 = save area for CP 0 */
+	xchal_cp0_store	a3, a4, a5, a6, a7 continue=0 ofs=-1 select=XTHAL_SAS_TIE|XTHAL_SAS_NOCC|XTHAL_SAS_CALE alloc=XTHAL_SAS_ALL
+2:
+#endif
+
+#if XCHAL_CP1_SA_SIZE > 0
+	bbci.l	a2, 1, 2f						/* CP 1 not enabled */
+	l32i	a14, a13, 4						/* a14 = _xtensa_coproc_saoffsets[1] */
+	add		a3, a14, a15					/* a3 = save area for CP 1 */
+	xchal_cp1_store	a3, a4, a5, a6, a7 continue=0 ofs=-1 select=XTHAL_SAS_TIE|XTHAL_SAS_NOCC|XTHAL_SAS_CALE alloc=XTHAL_SAS_ALL
+2:
+#endif
+
+#if XCHAL_CP2_SA_SIZE > 0
+	bbci.l	a2, 2, 2f
+	l32i	a14, a13, 8
+	add		a3, a14, a15
+	xchal_cp2_store	a3, a4, a5, a6, a7 continue=0 ofs=-1 select=XTHAL_SAS_TIE|XTHAL_SAS_NOCC|XTHAL_SAS_CALE alloc=XTHAL_SAS_ALL
+2:
+#endif
+
+#if XCHAL_CP3_SA_SIZE > 0
+	bbci.l	a2, 3, 2f
+	l32i	a14, a13, 12
+	add		a3, a14, a15
+	xchal_cp3store	a3, a4, a5, a6, a7 continue=0 ofs=-1 select=XTHAL_SAS_TIE|XTHAL_SAS_NOCC|XTHAL_SAS_CALE alloc=XTHAL_SAS_ALL
+2:
+#endif
+
+#if XCHAL_CP4_SA_SIZE > 0
+	bbci.l	a2, 4, 2f
+	l32i	a14, a13, 16
+	add		a3, a14, a15
+	xchal_cp4store	a3, a4, a5, a6, a7 continue=0 ofs=-1 select=XTHAL_SAS_TIE|XTHAL_SAS_NOCC|XTHAL_SAS_CALE alloc=XTHAL_SAS_ALL
+2:
+#endif
+
+#if XCHAL_CP5_SA_SIZE > 0
+	bbci.l	a2, 5, 2f
+	l32i	a14, a13, 20
+	add		a3, a14, a15
+	xchal_cp5store	a3, a4, a5, a6, a7 continue=0 ofs=-1 select=XTHAL_SAS_TIE|XTHAL_SAS_NOCC|XTHAL_SAS_CALE alloc=XTHAL_SAS_ALL
+2:
+#endif
+
+#if XCHAL_CP6_SA_SIZE > 0
+	bbci.l	a2, 6, 2f
+	l32i	a14, a13, 24
+	add		a3, a14, a15
+	xchal_cp6store	a3, a4, a5, a6, a7 continue=0 ofs=-1 select=XTHAL_SAS_TIE|XTHAL_SAS_NOCC|XTHAL_SAS_CALE alloc=XTHAL_SAS_ALL
+2:
+#endif
+
+#if XCHAL_CP7_SA_SIZE > 0
+	bbci.l	a2, 7, 2f
+	l32i	a14, a13, 28
+	add		a3, a14, a15
+	xchal_cp7store	a3, a4, a5, a6, a7 continue=0 ofs=-1 select=XTHAL_SAS_TIE|XTHAL_SAS_NOCC|XTHAL_SAS_CALE alloc=XTHAL_SAS_ALL
+2:
+#endif
+
+.Ldone1:
+	ret
+
+	.size	_xtensa_coproc_savestate, . - _xtensa_coproc_savestate
+
+/****************************************************************************
+ * Name: xtensa_coproc_savestate
+ *
+ * Description:
+ *   If there is a current thread and it has a coprocessor state save area,
+ *   then save all callee-saved state into this area. xtensa_coproc_savestate()
+ *   is simply a C wrapper around the assembly language call to
+ *   _xtensa_coproc_savestate.
+ *
+ * Input Parameters:
+ *   A2 - Address of co-processor save area
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Called with interrupts disabled.
+ *
+ ****************************************************************************/
+
+	.global	xtensa_coproc_savestate
+	.type	xtensa_coproc_savestate, @function
+
+	.align	4
+	.literal_position
+	.align	4
+
+xtensa_coproc_savestate:
+
+#ifdef __XTENSA_CALL0_ABI__
+
+	/* Need to preserve a8-11.  _xtensa_coproc_savestate modifies a2-a7,
+	 * a13-a15. a12-a15 are callee saved registers so a13-a14 must be
+	 * preserved.
+	 */
+
+	ENTRY(16)
+	s32i	a13, sp, LOCAL_OFFSET(1)		/* Save clobbered registers */
+	s32i	a14, sp, LOCAL_OFFSET(2)
+	s32i	a15, sp, LOCAL_OFFSET(3)
+
+	/* Call _xtensa_coproc_savestate() with A2=address of co-processor
+	 * save area.
+	 */
+
+	call0 _xtensa_coproc_savestate
+
+	/* Restore a13-15 and return */
+
+	l32i	a13, sp, LOCAL_OFFSET(1)		/* Restore clobbered registers */
+	l32i	a14, sp, LOCAL_OFFSET(2)
+	l32i	a15, sp, LOCAL_OFFSET(3)
+	RET(16)
+
+#else
+	/* Need to preserve a8-15.  _xtensa_coproc_savestate modifies a2-a7,
+	 * a13-a15.  So a13-a15 may need to be preserved.
+	 */
+
+	ENTRY(32 /*16*/)						/* REVISIT: Why 32? */
+	s32i	a0,  sp, LOCAL_OFFSET(1)		/* Save return address */
+
+	/* Call _xtensa_coproc_savestate() with A2=address of co-processor
+	 * save area.
+	 */
+
+	call0 _xtensa_coproc_savestate
+
+	/* Restore a0 and return */
+
+	l32i	a0,  sp, LOCAL_OFFSET(1)		/* Recover return address */
+	RET(32 /*16*/)							/* REVISIT: Why 32? */
+
+#endif
+
+	.size	xtensa_coproc_savestate, . - xtensa_coproc_savestate
+
+/****************************************************************************
+ * Name: _xtensa_coproc_restorestate
+ *
+ * Description:
+ *   Restore any callee-saved coprocessor state for the incoming thread.
+ *   This function is called from coprocessor exception handling, when
+ *   giving ownership to a thread that solicited a context switch earlier.
+ *   It calls a system-specific function to get the coprocessor save area
+ *   base address.
+ *
+ *   It is also called from xtensa_coproc_restorestate() for synchronous
+ *   context switches.  xtensa_coproc_restorestate() is simply a C wrapper
+ *   around the assembly language call to _xtensa_coproc_restorestate.
+ *
+ * Entry Conditions:
+ *   - A2 holds the address of the co-processor state save area
+ *   - The incoming thread is set as the current thread.
+ *
+ * Exit conditions:
+ *   - All necessary CP callee-saved state has been restored.
+ *   - CPENABLE - Set up correctly for the current thread.
+ *   - Registers a2-a7, a13-a15 have been trashed.
+ *
+ * Must be called from assembly code only, using CALL0.
+ *
+ ****************************************************************************/
+
+	.global	_xtensa_coproc_restorestate
+	.type	_xtensa_coproc_restorestate, @function
+
+	.align	4
+	.literal_position
+	.align	4
+
+_xtensa_coproc_restorestate:
+
+	/* Move the address of the thread state save area to R15 */
+
+	mov		a15, a2							/* A15 is now the address of the save area */
+
+#ifdef CONFIG_XTENSA_CP_LAZY
+	movi	a2, 0							/* a2 = Will disable all coprocessors */
+#else
+	l16ui	a2, a15, XTENSA_CPENABLE		/* a2 = Which CPs have been enable for this thread? */
+#endif
+	wsr		a2, CPENABLE					/* Set CPENABLE correctly for this thread */
+	l16ui	a2, a15, XTENSA_CPSTORED		/* a2 = Which CPs have been saved for this thread? */
+	movi	a3, 0							/* Clear the ones being restored (all of them) */
+	s16i	a3, a15, XTENSA_CPSTORED		/* Clear saved CP mask */
+
+	movi	a13, _xtensa_coproc_saoffsets	/* Array of CP save offsets */
+	l32i	a15, a15, XTENSA_CPASA			/* a15 = base of aligned save area */
+
+#if XCHAL_CP0_SA_SIZE
+	bbci.l	a2, 0, 2f						/* CP 0 not enabled */
+	l32i	a14, a13, 0						/* a14 = _xtensa_coproc_saoffsets[0] */
+	add		a3, a14, a15					/* a3 = save area for CP 0 */
+	xchal_cp0_load	a3, a4, a5, a6, a7 continue=0 ofs=-1 select=XTHAL_SAS_TIE|XTHAL_SAS_NOCC|XTHAL_SAS_CALE alloc=XTHAL_SAS_ALL
+2:
+#endif
+
+#if XCHAL_CP1_SA_SIZE
+	bbci.l	a2, 1, 2f						/* CP 1 not enabled */
+	l32i	a14, a13, 4						/* a14 = _xtensa_coproc_saoffsets[1] */
+	add		a3, a14, a15					/* a3 = save area for CP 1 */
+	xchal_cp1_load	a3, a4, a5, a6, a7 continue=0 ofs=-1 select=XTHAL_SAS_TIE|XTHAL_SAS_NOCC|XTHAL_SAS_CALE alloc=XTHAL_SAS_ALL
+2:
+#endif
+
+#if XCHAL_CP2_SA_SIZE
+	bbci.l	a2, 2, 2f
+	l32i	a14, a13, 8
+	add		a3, a14, a15
+	xchal_cp2_load	a3, a4, a5, a6, a7 continue=0 ofs=-1 select=XTHAL_SAS_TIE|XTHAL_SAS_NOCC|XTHAL_SAS_CALE alloc=XTHAL_SAS_ALL
+2:
+#endif
+
+#if XCHAL_CP3_SA_SIZE
+	bbci.l	a2, 3, 2f
+	l32i	a14, a13, 12
+	add		a3, a14, a15
+	xchal_cp3_load	a3, a4, a5, a6, a7 continue=0 ofs=-1 select=XTHAL_SAS_TIE|XTHAL_SAS_NOCC|XTHAL_SAS_CALE alloc=XTHAL_SAS_ALL
+2:
+#endif
+
+#if XCHAL_CP4_SA_SIZE
+	bbci.l	a2, 4, 2f
+	l32i	a14, a13, 16
+	add		a3, a14, a15
+	xchal_cp4_load	a3, a4, a5, a6, a7 continue=0 ofs=-1 select=XTHAL_SAS_TIE|XTHAL_SAS_NOCC|XTHAL_SAS_CALE alloc=XTHAL_SAS_ALL
+2:
+#endif
+
+#if XCHAL_CP5_SA_SIZE
+	bbci.l	a2, 5, 2f
+	l32i	a14, a13, 20
+	add		a3, a14, a15
+	xchal_cp5_load	a3, a4, a5, a6, a7 continue=0 ofs=-1 select=XTHAL_SAS_TIE|XTHAL_SAS_NOCC|XTHAL_SAS_CALE alloc=XTHAL_SAS_ALL
+2:
+#endif
+
+#if XCHAL_CP6_SA_SIZE
+	bbci.l	a2, 6, 2f
+	l32i	a14, a13, 24
+	add		a3, a14, a15
+	xchal_cp6_load	a3, a4, a5, a6, a7 continue=0 ofs=-1 select=XTHAL_SAS_TIE|XTHAL_SAS_NOCC|XTHAL_SAS_CALE alloc=XTHAL_SAS_ALL
+2:
+#endif
+
+#if XCHAL_CP7_SA_SIZE
+	bbci.l	a2, 7, 2f
+	l32i	a14, a13, 28
+	add		a3, a14, a15
+	xchal_cp7_load	a3, a4, a5, a6, a7 continue=0 ofs=-1 select=XTHAL_SAS_TIE|XTHAL_SAS_NOCC|XTHAL_SAS_CALE alloc=XTHAL_SAS_ALL
+2:
+#endif
+	/* Ensure wsr.CPENABLE has completed. */
+
+	rsync
+	ret
+
+	.size	_xtensa_coproc_restorestate, . - _xtensa_coproc_restorestate
+
+/****************************************************************************
+ * Name: xtensa_coproc_restorestate
+ *
+ * Description:
+ *   Restore any callee-saved coprocessor state for the incoming thread.
+ *   xtensa_coproc_restorestate() is simply a C wrapper around the assembly
+ *   language call to _xtensa_coproc_restorestate.
+ *
+ * Input Parameters:
+ *   - A2 holds the address of the threads state save area
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Called with interrupts disabled.
+ *
+ ****************************************************************************/
+
+	.global	xtensa_coproc_restorestate
+	.type	xtensa_coproc_restorestate, @function
+
+	.align	4
+	.literal_position
+	.align	4
+
+xtensa_coproc_restorestate:
+
+#ifdef __XTENSA_CALL0_ABI__
+
+	/* Need to preserve a8-11.  _xtensa_coproc_restorestate modifies a2-a7,
+	 * a13-a15. a12-a15 are callee saved registers so a13-a14 must be
+	 * preserved.
+	 */
+
+	ENTRY(16)
+	s32i	a13, sp, LOCAL_OFFSET(1)		/* Save clobbered values */
+	s32i	a14, sp, LOCAL_OFFSET(2)
+	s32i	a15, sp, LOCAL_OFFSET(3)
+
+	/* Call _xtensa_coproc_restorestate() with A2=address of co-processor
+	 * save area.   Registers a0, a2-a7, a13-a15 have been trashed.
+	 */
+
+	call0 _xtensa_coproc_restorestate
+
+	/* Restore a13-a15 and return */
+
+	l32i	a13, sp, LOCAL_OFFSET(1)		/* Restore clobbered registers */
+	l32i	a14, sp, LOCAL_OFFSET(2)
+	l32i	a15, sp, LOCAL_OFFSET(3)
+	RET(16)
+
+#else
+	/* Need to preserve a8-15.  _xtensa_coproc_savestate modifies a2-a7,
+	 * a13-a15.  So a13-a15 may need to be preserved.
+	 */
+
+	ENTRY(32 /*16*/)						/* REVISIT: Why 32? */
+	s32i	a0,  sp, LOCAL_OFFSET(1)		/* Save return address */
+
+	/* Call _xtensa_coproc_restorestate() with A2=address of co-processor
+	 * save area.   Registers a0, a2-a7, a13-a15 have been trashed.
+	 */
+
+	call0 _xtensa_coproc_restorestate
+
+	/* Restore a0 and return */
+
+	l32i	a0,  sp, LOCAL_OFFSET(1)		/* Recover return address */
+	RET(32 /*16*/)							/* REVISIT: Why 32? */
+
+#endif
+
+	.size	xtensa_coproc_restorestate, . - xtensa_coproc_restorestate
+
+#endif /* XCHAL_CP_NUM > 0 */
diff --git a/arch/xtensa/src/common/xtensa_copystate.c b/arch/xtensa/src/common/xtensa_copystate.c
new file mode 100644
index 0000000000000000000000000000000000000000..1e8cfa8c14aea940d6d1f82e7212bb0e6d21a135
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_copystate.c
@@ -0,0 +1,74 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_copystate.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include "xtensa.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: xtensa_copystate
+ ****************************************************************************/
+
+/* A little faster than most memcpy's */
+
+void xtensa_copystate(uint32_t *dest, uint32_t *src)
+{
+  int i;
+
+  /* In the XTENSA model, the state is copied from the stack to the TCB,
+   * but only a reference is passed to get the state from the TCB.  So the
+   * following check avoids copying the TCB save area onto itself:
+   */
+
+  if (src != dest)
+    {
+      for (i = 0; i < XCPTCONTEXT_REGS; i++)
+        {
+          *dest++ = *src++;
+        }
+    }
+}
+
diff --git a/arch/xtensa/src/common/xtensa_cpenable.c b/arch/xtensa/src/common/xtensa_cpenable.c
new file mode 100644
index 0000000000000000000000000000000000000000..894cb028bcac4da7507fe7d9e01696414a3503c2
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_cpenable.c
@@ -0,0 +1,158 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_cpenable.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "xtensa.h"
+
+#if XCHAL_CP_NUM > 0
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: xtensa_coproc_enable
+ *
+ * Description:
+ *   Enable a set of co-processors.
+ *
+ * Input Parameters:
+ *   cpstate - A pointer to the Co-processor state save structure.
+ *   cpset   - A bit set of co-processors to be enabled.  Matches bit layout
+ *             of the CPENABLE register.  Bit 0-XCHAL_CP_NUM:  0 = no change
+ *             1 = enable
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void xtensa_coproc_enable(struct xtensa_cpstate_s *cpstate, int cpset)
+{
+  irqstate_t flags;
+  uint32_t cpenable;
+
+  /* These operations must be atomic */
+
+  flags = enter_critical_section();
+
+  /* Don't enable co-processors that may already be enabled
+   *
+   *          cpenable
+   *            0   1
+   *          --- ---
+   *  cpset 0 | 0   0
+   *        1 | 1   0
+   */
+
+  cpset ^= (cpset & cpstate->cpenable);
+  if (cpset != 0)
+    {
+      /* Enable the co-processors */
+
+      cpenable = xtensa_get_cpenable();
+      cpenable |= cpset;
+      xtensa_set_cpenable(cpenable);
+
+      cpstate->cpenable  = cpenable;
+      cpstate->cpstored &= ~cpset;
+    }
+
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: xtensa_coproc_disable
+ *
+ * Description:
+ *   Enable a set of co-processors.
+ *
+ * Input Parameters:
+ *   cpstate - A pointer to the Co-processor state save structure.
+ *   cpset   - A bit set of co-processors to be enabled.  Matches bit layout
+ *             of the CPENABLE register.  Bit 0-XCHAL_CP_NUM:  0 = no change
+ *             1 = disable
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void xtensa_coproc_disable(struct xtensa_cpstate_s *cpstate, int cpset)
+{
+  irqstate_t flags;
+  uint32_t cpenable;
+
+  /* These operations must be atomic */
+
+  flags = enter_critical_section();
+
+  /* Don't disable co-processors that are already be disabled.
+   *
+   *          cpenable
+   *            0   1
+   *          --- ---
+   *  cpset 0 | 0   0
+   *        1 | 0   1
+   */
+
+  cpset &= cpstate->cpenable;
+  if (cpset != 0)
+    {
+      /* Disable the co-processors */
+
+      cpenable = xtensa_get_cpenable();
+      cpenable &= ~cpset;
+      xtensa_set_cpenable(cpenable);
+
+      cpstate->cpenable  = cpenable;
+      cpstate->cpstored &= ~cpset;
+    }
+
+  leave_critical_section(flags);
+}
+
+#endif /* XCHAL_CP_NUM */
diff --git a/arch/xtensa/src/common/xtensa_cpuint.S b/arch/xtensa/src/common/xtensa_cpuint.S
new file mode 100644
index 0000000000000000000000000000000000000000..9c7e28260b562670cdb961bb3fe30bd5b970a74f
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_cpuint.S
@@ -0,0 +1,130 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_cpuint.S
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from logic originally provided by Cadence Design Systems Inc.
+ *
+ *   Copyright (c) 2006-2015 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ ****************************************************************************/
+
+	.file	"xtensa_cpuint.S"
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#include "xtensa_abi.h"
+
+#if XCHAL_HAVE_INTERRUPTS
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: xtensa_enable_cpuint
+ *
+ * C Prototype:
+ *   uint32_t xtensa_enable_cpuint(uint32_t *shadow, unsigned int intmask)
+ *
+ * Description:
+ *   Enables a set of interrupts. Does not simply set INTENABLE directly,
+ *   but operates on a shadow copy of the CPU INTENABLE register then
+ *   writes that value to the hardware INTENABLE register.  Can be called
+ *   from interrupt handlers.
+ *
+ *   NOTE: It is possible only to enable interrupts on the current CPU
+ *   because there is an INTENABLE register implemented in each CPU.
+ *
+ ****************************************************************************/
+
+	.text
+	.global	xtensa_enable_cpuint
+	.type	xtensa_enable_cpuint, @function
+	.align	4
+
+xtensa_enable_cpuint:
+	ENTRY(16)
+
+	movi	a4, 0
+	xsr		a4, INTENABLE		/* Disables all interrupts */
+	rsync
+
+	l32i	a4, a2, 0			/* a4 = value of INTENABLE shadow */
+	or		a5, a4, a3			/* a5 = shadow | mask */
+	s32i	a5, a2, 0			/* shadow |= mask */
+
+	wsr		a5, INTENABLE		/* Set CPU INTENABLE to shadow */
+	mov		a3, a4				/* Return previous shadow content */
+	RET(16)
+
+	.size	xtensa_enable_cpuint, . - xtensa_enable_cpuint
+
+/****************************************************************************
+ * Name: xtensa_disable_cpuint
+ *
+ * C Prototype:
+ *   uint32_t xtensa_disable_cpuint(uint32_t *shadow, unsigned int intmask)
+ *
+ * Description:
+ *   Disables a set of interrupts. Does not simply set INTENABLE directly,
+ *   but operates on a shadow copy of the CPU INTENABLE register then
+ *   writes that value to the hardware INTENABLE register.  Can be called
+ *   from interrupt handlers.
+ *
+ *   NOTE: It is possible only to enable interrupts on the current CPU
+ *   because there is an INTENABLE register implemented in each CPU.
+ *
+ ****************************************************************************/
+
+	.text
+	.global	xtensa_disable_cpuint
+	.type	xtensa_disable_cpuint, @function
+	.align	4
+
+xtensa_disable_cpuint:
+	ENTRY(16)
+
+	movi	a4, 0
+	xsr		a4, INTENABLE		/* Disables all interrupts */
+	rsync
+
+	l32i	a4, a2, 0			/* a4 = value of INTENABLE shadow */
+	or		a5, a4, a3			/* a5 = shadow | mask */
+	xor		a5, a5, a3			/* a5 = shadow & ~mask */
+	s32i	a5, a2, 0			/* shadow &= ~mask */
+
+	wsr		a5, INTENABLE		/* Set CPU INTENABLE to shadow */
+	mov		a3, a4				/* Return previous shadow content */
+	RET(16)
+
+	.size	xtensa_disable_cpuint, . - xtensa_disable_cpuint
+
+#endif /* XCHAL_HAVE_INTERRUPTS */
diff --git a/arch/xtensa/src/common/xtensa_cpupause.c b/arch/xtensa/src/common/xtensa_cpupause.c
new file mode 100644
index 0000000000000000000000000000000000000000..370054d5c746661e2f5261df8597f493f9f3b65f
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_cpupause.c
@@ -0,0 +1,309 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_cpupause.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "xtensa.h"
+#include "sched/sched.h"
+
+#ifdef CONFIG_SMP
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static spinlock_t g_cpu_wait[CONFIG_SMP_NCPUS] SP_SECTION;
+static spinlock_t g_cpu_paused[CONFIG_SMP_NCPUS] SP_SECTION;
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_cpu_pausereq
+ *
+ * Description:
+ *   Return true if a pause request is pending for this CPU.
+ *
+ * Input Parameters:
+ *   cpu - The index of the CPU to be queried
+ *
+ * Returned Value:
+ *   true   = a pause request is pending.
+ *   false = no pasue request is pending.
+ *
+ ****************************************************************************/
+
+bool up_cpu_pausereq(int cpu)
+{
+  return spin_islocked(&g_cpu_paused[cpu]);
+}
+
+/****************************************************************************
+ * Name: up_cpu_paused
+ *
+ * Description:
+ *   Handle a pause request from another CPU.  Normally, this logic is
+ *   executed from interrupt handling logic within the architecture-specific
+ *   However, it is sometimes necessary necessary to perform the pending
+ *   pause operation in other contexts where the interrupt cannot be taken
+ *   in order to avoid deadlocks.
+ *
+ *   This function performs the following operations:
+ *
+ *   1. It saves the current task state at the head of the current assigned
+ *      task list.
+ *   2. It waits on a spinlock, then
+ *   3. Returns from interrupt, restoring the state of the new task at the
+ *      head of the ready to run list.
+ *
+ * Input Parameters:
+ *   cpu - The index of the CPU to be paused
+ *
+ * Returned Value:
+ *   On success, OK is returned.  Otherwise, a negated errno value indicating
+ *   the nature of the failure is returned.
+ *
+ ****************************************************************************/
+
+int up_cpu_paused(int cpu)
+{
+  FAR struct tcb_s *otcb = this_task();
+  FAR struct tcb_s *ntcb;
+
+  /* Update scheduler parameters */
+
+  sched_suspend_scheduler(otcb);
+
+#ifdef CONFIG_SCHED_INSTRUMENTATION
+  /* Notify that we are paused */
+
+  sched_note_cpu_paused(otcb);
+#endif
+
+  /* Copy the CURRENT_REGS into the OLD TCB (otcb).  The co-processor state
+   * will be saved as part of the return from xtensa_irq_dispatch().
+   */
+
+  xtensa_savestate(otcb->xcp.regs);
+
+  /* Wait for the spinlock to be released */
+
+  spin_unlock(&g_cpu_paused[cpu]);
+  spin_lock(&g_cpu_wait[cpu]);
+
+  /* Upon return, we will restore the exception context of the new TCB
+   * (ntcb) at the head of the ready-to-run task list.
+   */
+
+  ntcb = this_task();
+
+#ifdef CONFIG_SCHED_INSTRUMENTATION
+  /* Notify that we have resumed */
+
+  sched_note_cpu_resumed(ntcb);
+#endif
+
+  /* Reset scheduler parameters */
+
+  sched_resume_scheduler(ntcb);
+
+  /* Did the task at the head of the list change? */
+
+  if (otcb != ntcb)
+    {
+      /* Set CURRENT_REGS to the context save are of the new TCB to start.
+       * This will inform the return-from-interrupt logic that a context
+       * switch must be performed.
+       */
+
+      xtensa_restorestate(ntcb->xcp.regs);
+    }
+
+  spin_unlock(&g_cpu_wait[cpu]);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: xtensa_pause_handler
+ *
+ * Description:
+ *   This is the handler for CPU_INTCODE_PAUSE CPU interrupt.  This
+ *   implements up_cpu_pause() by performing the following operations:
+ *
+ *   1. The current task state at the head of the current assigned task
+ *      list was saved when the interrupt was entered.
+ *   2. This function simply waits on a spinlock, then returns.
+ *   3. Upon return, the interrupt exit logic will restore the state of
+ *      the new task at the head of the ready to run list.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void xtensa_pause_handler(void)
+{
+  (void)up_cpu_paused(up_cpu_index());
+}
+
+/****************************************************************************
+ * Name: up_cpu_pause
+ *
+ * Description:
+ *   Save the state of the current task at the head of the
+ *   g_assignedtasks[cpu] task list and then pause task execution on the
+ *   CPU.
+ *
+ *   This function is called by the OS when the logic executing on one CPU
+ *   needs to modify the state of the g_assignedtasks[cpu] list for another
+ *   CPU.
+ *
+ * Input Parameters:
+ *   cpu - The index of the CPU to be stopped.
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int up_cpu_pause(int cpu)
+{
+  int ret;
+
+#ifdef CONFIG_SCHED_INSTRUMENTATION
+  /* Notify of the pause event */
+
+  sched_note_cpu_pause(this_task(), cpu);
+#endif
+
+  DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu());
+
+  /* Take the both spinlocks.  The g_cpu_wait spinlock will prevent the SGI2
+   * handler from returning until up_cpu_resume() is called; g_cpu_paused
+   * is a handshake that will prefent this function from returning until
+   * the CPU is actually paused.
+   */
+
+  DEBUGASSERT(!spin_islocked(&g_cpu_wait[cpu]) &&
+              !spin_islocked(&g_cpu_paused[cpu]));
+
+  spin_lock(&g_cpu_wait[cpu]);
+  spin_lock(&g_cpu_paused[cpu]);
+
+  /* Execute SGI2 */
+
+  ret = xtensa_intercpu_interrupt(cpu, CPU_INTCODE_PAUSE);
+  if (ret < 0)
+    {
+      /* What happened?  Unlock the g_cpu_wait spinlock */
+
+      spin_unlock(&g_cpu_wait[cpu]);
+    }
+  else
+    {
+      /* Wait for the other CPU to unlock g_cpu_paused meaning that
+       * it is fully paused and ready for up_cpu_resume();
+       */
+
+      spin_lock(&g_cpu_paused[cpu]);
+    }
+
+  spin_unlock(&g_cpu_paused[cpu]);
+
+  /* On successful return g_cpu_wait will be locked, the other CPU will be
+   * spinninf on g_cpu_wait and will not continue until g_cpu_resume() is
+   * called.  g_cpu_paused will be unlocked in any case.
+   */
+
+ return ret;
+}
+
+/****************************************************************************
+ * Name: up_cpu_resume
+ *
+ * Description:
+ *   Restart the cpu after it was paused via up_cpu_pause(), restoring the
+ *   state of the task at the head of the g_assignedtasks[cpu] list, and
+ *   resume normal tasking.
+ *
+ *   This function is called after up_cpu_pause in order resume operation of
+ *   the CPU after modifying its g_assignedtasks[cpu] list.
+ *
+ * Input Parameters:
+ *   cpu - The index of the CPU being re-started.
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int up_cpu_resume(int cpu)
+{
+#ifdef CONFIG_SCHED_INSTRUMENTATION
+  /* Notify of the resume event */
+
+  sched_note_cpu_resume(this_task(), cpu);
+#endif
+
+  DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu());
+
+  /* Release the spinlock.  Releasing the spinlock will cause the SGI2
+   * handler on 'cpu' to continue and return from interrupt to the newly
+   * established thread.
+   */
+
+  DEBUGASSERT(spin_islocked(&g_cpu_wait[cpu]) &&
+              !spin_islocked(&g_cpu_paused[cpu]));
+
+  spin_unlock(&g_cpu_wait[cpu]);
+  return OK;
+}
+
+#endif /* CONFIG_SMP */
diff --git a/arch/xtensa/src/common/xtensa_createstack.c b/arch/xtensa/src/common/xtensa_createstack.c
new file mode 100644
index 0000000000000000000000000000000000000000..68308fb527e2316f18cd32847bd177f2de460a4a
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_createstack.c
@@ -0,0 +1,250 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_createstack.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "xtensa.h"
+
+/****************************************************************************
+ * Pre-processor Macros
+ ****************************************************************************/
+
+/* XTENSA requires at least a 4-byte stack alignment.  For floating point use,
+ * however, the stack must be aligned to 8-byte addresses.
+ *
+ * REVIST: Is this true?  Comes from ARM EABI
+ */
+
+#define STACK_ALIGNMENT     8
+
+/* Stack alignment macros */
+
+#define STACK_ALIGN_MASK    (STACK_ALIGNMENT-1)
+#define STACK_ALIGN_DOWN(a) ((a) & ~STACK_ALIGN_MASK)
+#define STACK_ALIGN_UP(a)   (((a) + STACK_ALIGN_MASK) & ~STACK_ALIGN_MASK)
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_create_stack
+ *
+ * Description:
+ *   Allocate a stack for a new thread and setup up stack-related information
+ *   in the TCB.
+ *
+ *   The following TCB fields must be initialized by this function:
+ *
+ *   - adj_stack_size: Stack size after adjustment for hardware, processor,
+ *     etc.  This value is retained only for debug purposes.
+ *   - stack_alloc_ptr: Pointer to allocated stack
+ *   - adj_stack_ptr: Adjusted stack_alloc_ptr for HW.  The initial value of
+ *     the stack pointer.
+ *
+ * Inputs:
+ *   - tcb: The TCB of new task
+ *   - stack_size:  The requested stack size.  At least this much
+ *     must be allocated.
+ *   - ttype:  The thread type.  This may be one of following (defined in
+ *     include/nuttx/sched.h):
+ *
+ *       TCB_FLAG_TTYPE_TASK     Normal user task
+ *       TCB_FLAG_TTYPE_PTHREAD  User pthread
+ *       TCB_FLAG_TTYPE_KERNEL   Kernel thread
+ *
+ *     This thread type is normally available in the flags field of the TCB,
+ *     however, there are certain contexts where the TCB may not be fully
+ *     initialized when up_create_stack is called.
+ *
+ *     If CONFIG_BUILD_KERNEL is defined, then this thread type may affect
+ *     how the stack is allocated.  For example, kernel thread stacks should
+ *     be allocated from protected kernel memory.  Stacks for user tasks and
+ *     threads must come from memory that is accessible to user code.
+ *
+ ****************************************************************************/
+
+int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
+{
+#if XCHAL_CP_NUM > 0
+  struct xcptcontext *xcp;
+  uintptr_t cpstart;
+#endif
+
+  /* Is there already a stack allocated of a different size?  Because of
+   * alignment issues, stack_size might erroneously appear to be of a
+   * different size.  Fortunately, this is not a critical operation.
+   */
+
+  if (tcb->stack_alloc_ptr && tcb->adj_stack_size != stack_size)
+    {
+      /* Yes.. Release the old stack */
+
+      up_release_stack(tcb, ttype);
+    }
+
+#if XCHAL_CP_NUM > 0
+  /* Add the size of the co-processor save area to the stack allocation.
+   * REVISIT:  This may waste memory.  Increasing the caller's requested
+   * stack size should only be necessary if the requested size could not
+   * hold the co-processor save area.
+   */
+
+  stack_size += XTENSA_CP_SA_SIZE;
+#endif
+
+  /* Do we need to allocate a new stack? */
+
+  if (!tcb->stack_alloc_ptr)
+    {
+      /* Allocate the stack.  If DEBUG is enabled (but not stack debug),
+       * then create a zeroed stack to make stack dumps easier to trace.
+       */
+
+#if defined(CONFIG_BUILD_KERNEL) && defined(CONFIG_MM_KERNEL_HEAP)
+      /* Use the kernel allocator if this is a kernel thread */
+
+      if (ttype == TCB_FLAG_TTYPE_KERNEL)
+        {
+          tcb->stack_alloc_ptr = (uint32_t *)kmm_malloc(stack_size);
+        }
+      else
+#endif
+        {
+          /* Use the user-space allocator if this is a task or pthread */
+
+          tcb->stack_alloc_ptr = (uint32_t *)kumm_malloc(stack_size);
+        }
+
+#ifdef CONFIG_DEBUG_FEATURES
+      /* Was the allocation successful? */
+
+      if (!tcb->stack_alloc_ptr)
+        {
+          serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
+        }
+#endif
+    }
+
+  /* Did we successfully allocate a stack? */
+
+  if (tcb->stack_alloc_ptr)
+    {
+      uintptr_t top_of_stack;
+      size_t size_of_stack;
+
+#ifdef CONFIG_STACK_COLORATION
+      uint32_t *ptr;
+      int i;
+
+      /* Yes.. If stack debug is enabled, then fill the stack with a
+       * recognizable value that we can use later to test for high
+       * water marks.
+       */
+
+      for (i = 0, ptr = (uint32_t *)tcb->stack_alloc_ptr;
+           i < stack_size;
+           i += sizeof(uint32_t))
+        {
+          *ptr++ = STACK_COLOR;
+        }
+#endif
+
+      /* XTENSA uses a push-down stack:  the stack grows toward lower
+       * addresses in memory.  The stack pointer register points to the
+       * lowest, valid working address (the "top" of the stack).  Items on
+       * the stack are referenced as positive word offsets from sp.
+       */
+
+      top_of_stack = (uintptr_t)tcb->stack_alloc_ptr + stack_size - 4;
+
+#if XCHAL_CP_NUM > 0
+      /* Allocate the co-processor save area at the top of the (push down)
+       * stack.
+       *
+       * REVISIT:  This is not secure.  In secure built configurations it
+       * be more appropriate to use kmm_memalign() to allocte protected
+       * memory rather than using the stack.
+       */
+
+      cpstart      = (uintptr_t)_CP_ALIGNDOWN(XCHAL_CP0_SA_ALIGN,
+                                              top_of_stack - XCHAL_CP1_SA_ALIGN);
+      top_of_stack = cpstart;
+
+      /* Initialize the coprocessor save area (see xtensa_coproc.h) */
+
+      xcp                   = &tcb->xcp;
+      xcp->cpstate.cpenable = 0;  /* No coprocessors active for this thread */
+      xcp->cpstate.cpstored = 0;  /* No coprocessors saved for this thread */
+      xcp->cpstate.cpasa    = (uint32_t *)cpstart; /* Start of aligned save area */
+#endif
+
+      /* The XTENSA stack must be aligned.  If necessary top_of_stack must be
+       * rounded down to the next boundary to meet this alignment requirement.
+       *
+       * NOTE: Co-processor save area not included in the size of the stack.
+       */
+
+      top_of_stack  = STACK_ALIGN_DOWN(top_of_stack);
+      size_of_stack = top_of_stack - (uint32_t)tcb->stack_alloc_ptr + 4;
+
+      /* Save the adjusted stack values in the struct tcb_s */
+
+      tcb->adj_stack_ptr  = (FAR uint32_t *)top_of_stack;
+      tcb->adj_stack_size = size_of_stack;
+
+      board_autoled_on(LED_STACKCREATED);
+      return OK;
+    }
+
+   return ERROR;
+}
diff --git a/arch/xtensa/src/common/xtensa_dumpstate.c b/arch/xtensa/src/common/xtensa_dumpstate.c
new file mode 100644
index 0000000000000000000000000000000000000000..ce2808162de4af4cd7d345799e1f3e0afe1a8563
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_dumpstate.c
@@ -0,0 +1,289 @@
+/****************************************************************************
+ * arch/xtensa/src/mips32/xtensa_dumpstate.c
+ *
+ *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "xtensa.h"
+
+#ifdef CONFIG_DEBUG_ALERT
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: xtensa_getsp
+ ****************************************************************************/
+
+/* I don't know if the builtin to get SP is enabled */
+
+static inline uint32_t xtensa_getsp(void)
+{
+  register uint32_t sp;
+
+  __asm__ __volatile__
+  (
+    "mov %0, sp\n"
+    : "=r" (sp)
+  );
+
+  return sp;
+}
+
+/****************************************************************************
+ * Name: up_taskdump
+ ****************************************************************************/
+
+#ifdef CONFIG_STACK_COLORATION
+static void up_taskdump(FAR struct tcb_s *tcb, FAR void *arg)
+{
+  /* Dump interesting properties of this task */
+
+#if CONFIG_TASK_NAME_SIZE > 0
+  _alert("%s: PID=%d Stack Used=%lu of %lu\n",
+        tcb->name, tcb->pid, (unsigned long)up_check_tcbstack(tcb),
+        (unsigned long)tcb->adj_stack_size);
+#else
+  _alert("PID: %d Stack Used=%lu of %lu\n",
+        tcb->pid, (unsigned long)up_check_tcbstack(tcb),
+        (unsigned long)tcb->adj_stack_size);
+#endif
+}
+#endif
+
+/****************************************************************************
+ * Name: up_showtasks
+ ****************************************************************************/
+
+#ifdef CONFIG_STACK_COLORATION
+static inline void up_showtasks(void)
+{
+  /* Dump interesting properties of each task in the crash environment */
+
+  sched_foreach(up_taskdump, NULL);
+}
+#else
+#  define up_showtasks()
+#endif
+
+/****************************************************************************
+ * Name: xtensa_stackdump
+ ****************************************************************************/
+
+static void xtensa_stackdump(uint32_t sp, uint32_t stack_base)
+{
+  uint32_t stack ;
+
+  for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
+    {
+      uint32_t *ptr = (uint32_t *)stack;
+      _alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+             stack, ptr[0], ptr[1], ptr[2], ptr[3],
+             ptr[4], ptr[5], ptr[6], ptr[7]);
+    }
+}
+
+/****************************************************************************
+ * Name: xtensa_registerdump
+ ****************************************************************************/
+
+static inline void xtensa_registerdump(void)
+{
+  uint32_t *regs = (uint32_t *)CURRENT_REGS; /* Don't need volatile here */
+
+  /* Are user registers available from interrupt processing? */
+
+  if (regs != NULL)
+    {
+      _alert("   PC: %08lx    PS: %08lx\n",
+             (unsigned long)regs[REG_PC], (unsigned long)regs[REG_PS]);
+      _alert("   A0: %08lx    A1: %08lx    A2: %08lx    A3: %08lx\n",
+             (unsigned long)regs[REG_A0], (unsigned long)regs[REG_A1],
+             (unsigned long)regs[REG_A2], (unsigned long)regs[REG_A3]);
+      _alert("   A4: %08lx    A5: %08lx    A6: %08lx    A7: %08lx\n",
+             (unsigned long)regs[REG_A4], (unsigned long)regs[REG_A5],
+             (unsigned long)regs[REG_A6], (unsigned long)regs[REG_A7]);
+      _alert("   A8: %08lx    A9: %08lx   A10: %08lx   A11: %08lx\n",
+             (unsigned long)regs[REG_A8], (unsigned long)regs[REG_A9],
+             (unsigned long)regs[REG_A10], (unsigned long)regs[REG_A11]);
+      _alert("  A12: %08lx   A13: %08lx   A14: %08lx   A15: %08lx\n",
+             (unsigned long)regs[REG_A12], (unsigned long)regs[REG_A13],
+             (unsigned long)regs[REG_A14], (unsigned long)regs[REG_A15]);
+      _alert("  SAR: %08lx CAUSE: %08lx VADDR: %08lx\n",
+             (unsigned long)regs[REG_SAR], (unsigned long)regs[REG_EXCCAUSE],
+             (unsigned long)regs[REG_EXCVADDR]);
+#ifdef XCHAL_HAVE_LOOPS
+      _alert(" LBEG: %08lx  LEND: %08lx  LCNT: %08lx\n",
+             (unsigned long)regs[REG_LBEG], (unsigned long)regs[REG_LEND],
+             (unsigned long)regs[REG_LCOUNT]);
+#endif
+#ifndef __XTENSA_CALL0_ABI__
+      _alert(" TMP0: %08lx  TMP1: %08lx\n",
+             (unsigned long)regs[REG_TMP0], (unsigned long)regs[REG_TMP1]);
+#endif
+    }
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: xtensa_dumpstate
+ ****************************************************************************/
+
+void xtensa_dumpstate(void)
+{
+  struct tcb_s *rtcb = this_task();
+  uint32_t sp = xtensa_getsp();
+  uint32_t ustackbase;
+  uint32_t ustacksize;
+#ifdef HAVE_INTERRUPTSTACK
+  uint32_t istackbase;
+  uint32_t istacksize;
+#endif
+
+#ifdef CONFIG_SMP
+  /* Show the CPU number */
+
+  _alert("CPU%d:\n", up_cpu_index());
+#endif
+
+  /* Get the limits on the user stack memory */
+
+  if (rtcb->pid == 0)
+    {
+      ustackbase = (uint32_t)&g_idlestack[IDLETHREAD_STACKWORDS-1];
+      ustacksize = IDLETHREAD_STACKSIZE;
+    }
+  else
+    {
+      ustackbase = (uint32_t)rtcb->adj_stack_ptr;
+      ustacksize = (uint32_t)rtcb->adj_stack_size;
+    }
+
+  /* Get the limits on the interrupt stack memory */
+
+#warning REVISIT interrupt stack
+#ifdef HAVE_INTERRUPTSTACK
+  istackbase = (uint32_t)&g_intstack[INTERRUPT_STACKWORDS-1];
+  istacksize = INTERRUPTSTACK_SIZE;
+
+  /* Show interrupt stack info */
+
+  _alert("sp:     %08x\n", sp);
+  _alert("IRQ stack:\n");
+  _alert("  base: %08x\n", istackbase);
+  _alert("  size: %08x\n", istacksize);
+#ifdef CONFIG_STACK_COLORATION
+  _alert("  used: %08x\n", up_check_intstack());
+#endif
+
+  /* Does the current stack pointer lie within the interrupt
+   * stack?
+   */
+
+  if (sp <= istackbase && sp > istackbase - istacksize)
+    {
+      /* Yes.. dump the interrupt stack */
+
+      xtensa_stackdump(sp, istackbase);
+
+      /* Extract the user stack pointer which should lie
+       * at the base of the interrupt stack.
+       */
+
+      sp = &g_instack[INTERRUPTSTACK_SIZE - sizeof(uint32_t)];
+      _alert("sp:     %08x\n", sp);
+    }
+
+  /* Show user stack info */
+
+  _alert("User stack:\n");
+  _alert("  base: %08x\n", ustackbase);
+  _alert("  size: %08x\n", ustacksize);
+#ifdef CONFIG_STACK_COLORATION
+  _alert("  used: %08x\n", up_check_tcbstack(rtcb));
+#endif
+#else
+  _alert("sp:         %08x\n", sp);
+  _alert("stack base: %08x\n", ustackbase);
+  _alert("stack size: %08x\n", ustacksize);
+#ifdef CONFIG_STACK_COLORATION
+  _alert("stack used: %08x\n", up_check_tcbstack(rtcb));
+#endif
+#endif
+
+  /* Dump the user stack if the stack pointer lies within the allocated user
+   * stack memory.
+   */
+
+  if (sp > ustackbase || sp <= ustackbase - ustacksize)
+    {
+#ifdef HAVE_INTERRUPTSTACK
+      _alert("ERROR: Stack pointer is not within allocated stack\n");
+#endif
+    }
+  else
+    {
+      xtensa_stackdump(sp, ustackbase);
+    }
+
+  /* Then dump the registers (if available) */
+
+  xtensa_registerdump();
+
+  /* Dump the state of all tasks (if available) */
+
+  up_showtasks();
+}
+
+#endif /* CONFIG_ARCH_STACKDUMP */
diff --git a/arch/xtensa/src/common/xtensa_etherstub.c b/arch/xtensa/src/common/xtensa_etherstub.c
new file mode 100644
index 0000000000000000000000000000000000000000..9174a0e6d68aec6b2dc19d9cd28cf84aeebb7103
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_etherstub.c
@@ -0,0 +1,70 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_etherstub.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include "xtensa.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_netinitialize (stub)
+ *
+ * Description:
+ *   This is a stub version os up_netinitialize.  Normally, up_netinitialize
+ *   is defined in board/xyz_network.c for board-specific Ethernet
+ *   implementations, or chip/xyx_ethernet.c for chip-specific Ethernet
+ *   implementations.  The stub version here is used in the corner case where
+ *   the network is enable yet there is no Ethernet driver to be initialized.
+ *   In this case, up_initialize will still try to call up_netinitialize()
+ *   when one does not exist.  This corner case would occur if, for example,
+ *   only a USB network interface is being used or perhaps if a SLIP is
+ *   being used).
+ *
+ *   Use of this stub is deprecated.  The preferred mechanism is to use
+ *   CONFIG_NETDEV_LATEINIT=y to suppress the call to up_netinitialize() in
+ *   up_initialize().  Then this stub would not be needed.
+ *
+ ****************************************************************************/
+
+void up_netinitialize(void)
+{
+}
diff --git a/arch/xtensa/src/common/xtensa_exit.c b/arch/xtensa/src/common/xtensa_exit.c
new file mode 100644
index 0000000000000000000000000000000000000000..d8dafeb20c9ca9e5421f835912baafb3bf1b09ed
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_exit.c
@@ -0,0 +1,206 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_exit.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#ifdef CONFIG_DUMP_ON_EXIT
+#  include 
+#endif
+
+#include "task/task.h"
+#include "sched/sched.h"
+#include "group/group.h"
+#include "xtensa.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef CONFIG_DEBUG_SCHED_INFO
+#  undef CONFIG_DUMP_ON_EXIT
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: _xtensa_dumponexit
+ *
+ * Description:
+ *   Dump the state of all tasks whenever on task exits.  This is debug
+ *   instrumentation that was added to check file-related reference counting
+ *   but could be useful again sometime in the future.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DUMP_ON_EXIT
+static void _xtensa_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
+{
+#if CONFIG_NFILE_DESCRIPTORS > 0
+  FAR struct filelist *filelist;
+#if CONFIG_NFILE_STREAMS > 0
+  FAR struct streamlist *streamlist;
+#endif
+  int i;
+#endif
+
+  sinfo("  TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
+  sinfo("    priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
+
+#if CONFIG_NFILE_DESCRIPTORS > 0
+  filelist = tcb->group->tg_filelist;
+  for (i = 0; i < CONFIG_NFILE_DESCRIPTORS; i++)
+    {
+      struct inode *inode = filelist->fl_files[i].f_inode;
+      if (inode)
+        {
+          sinfo("      fd=%d refcount=%d\n",
+                i, inode->i_crefs);
+        }
+    }
+#endif
+
+#if CONFIG_NFILE_STREAMS > 0
+  streamlist = tcb->group->tg_streamlist;
+  for (i = 0; i < CONFIG_NFILE_STREAMS; i++)
+    {
+      struct file_struct *filep = &streamlist->sl_streams[i];
+      if (filep->fs_fd >= 0)
+        {
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
+          if (filep->fs_bufstart != NULL)
+            {
+              sinfo("      fd=%d nbytes=%d\n",
+                    filep->fs_fd,
+                    filep->fs_bufpos - filep->fs_bufstart);
+            }
+          else
+#endif
+            {
+              sinfo("      fd=%d\n", filep->fs_fd);
+            }
+        }
+    }
+#endif
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: _exit
+ *
+ * Description:
+ *   This function causes the currently executing task to cease
+ *   to exist.  This is a special case of task_delete() where the task to
+ *   be deleted is the currently executing task.  It is more complex because
+ *   a context switch must be perform to the next ready to run task.
+ *
+ ****************************************************************************/
+
+void _exit(int status)
+{
+  struct tcb_s *tcb;
+
+  /* Make sure that we are in a critical section with local interrupts.
+   * The IRQ state will be restored when the next task is started.
+   */
+
+  (void)enter_critical_section();
+
+  sinfo("TCB=%p exiting\n", this_task());
+
+#ifdef CONFIG_DUMP_ON_EXIT
+  sinfo("Other tasks:\n");
+  sched_foreach(_xtensa_dumponexit, NULL);
+#endif
+
+#if XCHAL_CP_NUM > 0
+  /* Disable co-processor support for the task that is exit-ing. */
+
+  tcb = this_task();
+  xtensa_coproc_disable(&tcb->xcp.cpstate, XTENSA_CP_ALLSET);
+#endif
+
+  /* Destroy the task at the head of the ready to run list. */
+
+  (void)task_exit();
+
+  /* Now, perform the context switch to the new ready-to-run task at the
+   * head of the list.
+   */
+
+  tcb = this_task();
+
+#if XCHAL_CP_NUM > 0
+  /* Set up the co-processor state for the newly started thread. */
+
+  xtensa_coproc_restorestate(&tcb->xcp.cpstate);
+#endif
+
+#ifdef CONFIG_ARCH_ADDRENV
+  /* Make sure that the address environment for the previously running
+   * task is closed down gracefully (data caches dump, MMU flushed) and
+   * set up the address environment for the new thread at the head of
+   * the ready-to-run list.
+   */
+
+  (void)group_addrenv(tcb);
+#endif
+
+  /* Then switch contexts */
+
+  xtensa_context_restore(tcb->xcp.regs);
+
+  /* xtensa_full_context_restore() should not return but could if the software
+   * interrupts are disabled.
+   */
+
+  PANIC();
+}
diff --git a/arch/xtensa/src/common/xtensa_idle.c b/arch/xtensa/src/common/xtensa_idle.c
new file mode 100644
index 0000000000000000000000000000000000000000..894cdb606b5592a61b2eb1cc18ee80b3a9e47035
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_idle.c
@@ -0,0 +1,95 @@
+/****************************************************************************
+ *  arch/xtensa/src/common/xtensa_idle.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+#include "xtensa.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_idle
+ *
+ * Description:
+ *   up_idle() is the logic that will be executed when their is no other
+ *   ready-to-run task.  This is processor idle time and will continue until
+ *   some interrupt occurs to cause a context switch from the idle task.
+ *
+ *   Processing in this state may be processor-specific. e.g., this is where
+ *   power management operations might be performed.
+ *
+ ****************************************************************************/
+
+void up_idle(void)
+{
+#if defined(CONFIG_SUPPRESS_INTERRUPTS) || defined(CONFIG_SUPPRESS_TIMER_INTS)
+  /* If the system is idle and there are no timer interrupts, then process
+   * "fake" timer interrupts. Hopefully, something will wake up.
+   */
+
+  sched_process_timer();
+#else
+
+  /* This would be an appropriate place to put some MCU-specific logic to
+   * sleep in a reduced power mode until an interrupt occurs to save power
+   */
+
+  /* This is a kludge that I still don't understand.  The call to kmm_trysemaphore()
+   * in the os_start.c IDLE loop seems necessary for the good health of the IDLE
+   * loop.  When the work queue is enabled, this logic is removed from the IDLE
+   * loop and it appears that we are somehow left idling with interrupts non-
+   * functional. The following should be no-op, it just disables then re-enables
+   * interrupts.  But it fixes the problem and will stay here until I understand
+   * the problem/fix better.
+   *
+   * And no, the contents of the CP0 status register are not incorrect.  But for
+   * some reason the status register needs to be re-written again on this thread
+   * for it to take effect.  This might be a PIC32-only issue?
+   */
+
+#ifdef CONFIG_SCHED_WORKQUEUE
+  irqstate_t flags = enter_critical_section();
+  leave_critical_section(flags);
+#endif
+#endif
+}
diff --git a/arch/xtensa/src/common/xtensa_initialize.c b/arch/xtensa/src/common/xtensa_initialize.c
new file mode 100644
index 0000000000000000000000000000000000000000..2041548b1750bb77e7d4d61523d7dce960cc5801
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_initialize.c
@@ -0,0 +1,269 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_initialize.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "xtensa.h"
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_calibratedelay
+ *
+ * Description:
+ *   Delay loops are provided for short timing loops.  This function, if
+ *   enabled, will just wait for 100 seconds.  Using a stopwatch, you can
+ *   can then determine if the timing loops are properly calibrated.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG_FEATURES)
+static void up_calibratedelay(void)
+{
+  int i;
+
+  _warn("Beginning 100s delay\n");
+  for (i = 0; i < 100; i++)
+    {
+      up_mdelay(1000);
+    }
+
+  _warn("End 100s delay\n");
+}
+#else
+# define up_calibratedelay()
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_initialize
+ *
+ * Description:
+ *   up_initialize will be called once during OS initialization after the
+ *   basic OS services have been initialized.  The architecture specific
+ *   details of initializing the OS will be handled here.  Such things as
+ *   setting up interrupt service routines, starting the clock, and
+ *   registering device drivers are some of the things that are different
+ *   for each processor and hardware platform.
+ *
+ *   up_initialize is called after the OS initialized but before the user
+ *   initialization logic has been started and before the libraries have
+ *   been initialized.  OS services and driver services are available.
+ *
+ ****************************************************************************/
+
+void up_initialize(void)
+{
+#ifdef CONFIG_SMP
+  int i;
+
+  /* Initialize global variables */
+
+  for (i = 0; i < CONFIG_SMP_NCPUS; i++)
+    {
+      g_current_regs[i] = NULL;
+    }
+#else
+  CURRENT_REGS = NULL;
+#endif
+
+  /* Calibrate the timing loop */
+
+  up_calibratedelay();
+
+  /* Add any extra memory fragments to the memory manager */
+
+  xtensa_add_region();
+
+  /* Initialize the interrupt subsystem */
+
+  xtensa_irq_initialize();
+
+#ifdef CONFIG_PM
+  /* Initialize the power management subsystem.  This MCU-specific function
+   * must be called *very* early in the initialization sequence *before* any
+   * other device drivers are initialized (since they may attempt to register
+   * with the power management subsystem).
+   */
+
+  up_pminitialize();
+#endif
+
+#ifdef CONFIG_ARCH_DMA
+  /* Initialize the DMA subsystem if the weak function xtensa_dma_initialize
+   * has been brought into the build
+   */
+
+#ifdef CONFIG_HAVE_WEAKFUNCTIONS
+  if (xtensa_dma_initialize)
+#endif
+    {
+      xtensa_dma_initialize();
+    }
+#endif
+
+  /* Initialize the system timer interrupt */
+
+#if !defined(CONFIG_SUPPRESS_INTERRUPTS) && !defined(CONFIG_SUPPRESS_TIMER_INTS)
+  xtensa_timer_initialize();
+#endif
+
+  /* Register devices */
+
+#if CONFIG_NFILE_DESCRIPTORS > 0
+
+#if defined(CONFIG_DEV_NULL)
+  devnull_register();   /* Standard /dev/null */
+#endif
+
+#if defined(CONFIG_DEV_RANDOM)
+  devrandom_register(); /* Standard /dev/random */
+#endif
+
+#if defined(CONFIG_DEV_URANDOM)
+  devurandom_register();   /* Standard /dev/urandom */
+#endif
+
+#if defined(CONFIG_DEV_ZERO)
+  devzero_register();   /* Standard /dev/zero */
+#endif
+
+#if defined(CONFIG_DEV_LOOP)
+  loop_register();      /* Standard /dev/loop */
+#endif
+#endif /* CONFIG_NFILE_DESCRIPTORS */
+
+#if defined(CONFIG_SCHED_INSTRUMENTATION_BUFFER) && \
+    defined(CONFIG_DRIVER_NOTE)
+  note_register();      /* Non-standard /dev/note */
+#endif
+
+  /* Initialize the serial device driver */
+
+#ifdef USE_SERIALDRIVER
+  xtensa_serial_initialize();
+#endif
+
+  /* Initialize the console device driver (if it is other than the standard
+   * serial driver).
+   */
+
+#if defined(CONFIG_DEV_LOWCONSOLE)
+  lowconsole_init();
+#elif defined(CONFIG_CONSOLE_SYSLOG)
+  syslog_console_init();
+#elif defined(CONFIG_RAMLOG_CONSOLE)
+  ramlog_consoleinit();
+#endif
+
+#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_PSEUDOTERM_SUSV1)
+  /* Register the master pseudo-terminal multiplexor device */
+
+  (void)ptmx_register();
+#endif
+
+  /* Early initialization of the system logging device.  Some SYSLOG channel
+   * can be initialized early in the initialization sequence because they
+   * depend on only minimal OS initialization.
+   */
+
+  syslog_initialize(SYSLOG_INIT_EARLY);
+
+#if defined(CONFIG_CRYPTO)
+  /* Initialize the HW crypto and /dev/crypto */
+
+  up_cryptoinitialize();
+#endif
+
+#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_CRYPTO_CRYPTODEV)
+  devcrypto_register();
+#endif
+
+#ifndef CONFIG_NETDEV_LATEINIT
+  /* Initialize the network */
+
+  up_netinitialize();
+#endif
+
+#ifdef CONFIG_NETDEV_LOOPBACK
+  /* Initialize the local loopback device */
+
+  (void)localhost_initialize();
+#endif
+
+#ifdef CONFIG_NET_TUN
+  /* Initialize the TUN device */
+
+  (void)tun_initialize();
+#endif
+
+#ifdef CONFIG_NETDEV_TELNET
+  /* Initialize the Telnet session factory */
+
+  (void)telnet_initialize();
+#endif
+
+  /* Initialize USB -- device and/or host */
+
+  up_usbinitialize();
+  board_autoled_on(LED_IRQSENABLED);
+}
diff --git a/arch/xtensa/src/common/xtensa_initialstate.c b/arch/xtensa/src/common/xtensa_initialstate.c
new file mode 100644
index 0000000000000000000000000000000000000000..b8e14e516121fe2070e56a003df0325096de2a72
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_initialstate.c
@@ -0,0 +1,112 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_initialstate.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "xtensa.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_initial_state
+ *
+ * Description:
+ *   A new thread is being started and a new TCB has been created. This
+ *   function is called to initialize the processor specific portions of the
+ *   new TCB.
+ *
+ *   This function must setup the intial architecture registers and/or stack
+ *   so that execution will begin at tcb->start on the next context switch.
+ *
+ ****************************************************************************/
+
+void up_initial_state(struct tcb_s *tcb)
+{
+  struct xcptcontext *xcp = &tcb->xcp;
+
+  /* Initialize the initial exception register context structure */
+
+  memset(xcp, 0, sizeof(struct xcptcontext));
+
+  /* Set initial values of registers */
+
+  xcp->regs[REG_PC]   = (uint32_t)tcb->start;         /* Task entrypoint                */
+  xcp->regs[REG_A0]   = 0;                            /* To terminate GDB backtrace     */
+  xcp->regs[REG_A1]   = (uint32_t)tcb->adj_stack_ptr; /* Physical top of stack frame    */
+
+  /* Set initial PS to int level 0, EXCM disabled ('rfe' will enable), user
+   * mode.
+   */
+
+#ifdef __XTENSA_CALL0_ABI__
+  xcp->regs[REG_PS]   = PS_UM | PS_EXCM;
+
+#else
+  /* For windowed ABI set WOE and CALLINC (pretend task was 'call4'd). */
+
+  xcp->regs[REG_PS]   = PS_UM | PS_EXCM | PS_WOE | PS_CALLINC(1);
+#endif
+
+#if XCHAL_CP_NUM > 0
+  /* Set up the co-processors that will be enabled initially when the thread
+   * starts (see xtensa_coproc.h).  If the lazy co-processor state restore
+   * logic is selected, that would be the empty set.
+   */
+
+#ifdef CONFIG_XTENSA_CP_LAZY
+  xcp->cpstate.cpenable = 0;  /* No co-processors are enabled */
+#else
+  xcp->cpstate.cpenable = (CONFIG_XTENSA_CP_INITSET & XTENSA_CP_ALLSET);
+#endif
+  xcp->cpstate.cpstored = 0;  /* No co-processors haved state saved */
+#endif
+}
diff --git a/arch/xtensa/src/common/xtensa_int_handlers.S b/arch/xtensa/src/common/xtensa_int_handlers.S
new file mode 100644
index 0000000000000000000000000000000000000000..f84992d2127bee883322b8458f04a82e0ceb7a58
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_int_handlers.S
@@ -0,0 +1,845 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_int_handlers.S
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from logic originally provided by Cadence Design Systems Inc.
+ *
+ *   Copyright (c) 2006-2015 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ ****************************************************************************/
+
+	.file	"xtensa_int_handlers.S"
+
+/* NOTES on the use of 'call0' for long jumps instead of 'j':
+ *
+ *  1. This file should be assembled with the -mlongcalls option to xt-xcc.
+ *
+ *  2. The -mlongcalls compiler option causes 'call0 dest' to be expanded to
+ *     a sequence 'l32r a0, dest' 'callx0 a0' which works regardless of the
+ *     distance from the call to the destination. The linker then relaxes
+ *     it back to 'call0 dest' if it determines that dest is within range.
+ *     This allows more flexibility in locating code without the performance
+ *     overhead of the 'l32r' literal data load in cases where the destination
+ *     is in range of 'call0'. There is an additional benefit in that 'call0'
+ *     has a longer range than 'j' due to the target being word-aligned, so
+ *     the 'l32r' sequence is less likely needed.
+ *
+ *  3. The use of 'call0' with -mlongcalls requires that register a0 not be
+ *     live at the time of the call, which is always the case for a function
+ *     call but needs to be ensured if 'call0' is used as a jump in lieu of 'j'.
+ *
+ *  4. This use of 'call0' is independent of the C function call ABI.
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include "xtensa.h"
+#include "xtensa_abi.h"
+#include "chip_macros.h"
+#include "xtensa_timer.h"
+
+/****************************************************************************
+ * Assembly Language Macros
+ ****************************************************************************/
+
+/****************************************************************************
+ * Macro extract_msb - return the input with only the highest bit set.
+ *
+ * Entry Conditions/Side Effects:
+ *   Input  : "ain"  - Input value, clobbered.
+ *   Output : "aout" - Output value, has only one bit set, MSB of "ain".
+ *
+ * The two arguments must be different AR registers.
+ *
+ ****************************************************************************/
+
+	.macro	extract_msb	aout ain
+1:
+	addi	\aout, \ain, -1				/* aout = ain - 1 */
+	and		\ain, \ain, \aout			/* ain  = ain & aout */
+	bnez	\ain, 1b					/* Repeat until ain == 0 */
+	addi	\aout, \aout, 1				/* Return aout + 1 */
+	.endm
+
+/****************************************************************************
+ * Macro dispatch_c_isr level mask
+ *
+ * Description:
+ *
+ * This will dispatch to user handlers (if any) that are registered in the
+ * XTOS dispatch table (_xtos_interrupt_table). These handlers would have
+ * been registered by calling _xtos_set_interrupt_handler(). There is one
+ * exception - the timer interrupt used by the OS will not be dispatched
+ * to a user handler - this must be handled by the caller of this macro.
+ *
+ * Level triggered and software interrupts are automatically deasserted by
+ * this code.
+ *
+ * Assumptions:
+ *   - PS.INTLEVEL is set to "level" at entry
+ *   - PS.EXCM = 0, C calling enabled
+ *
+ * Entry Conditions/Side Effects:
+ *   level - interrupt level
+ *   mask  - interrupt bitmask for this level
+ *
+ * Exit Conditions:
+ *   This macro will use registers a0 and a2-a5 and a12.
+ *   a1  - May point to the new thread's SP
+ *   a12 - Points to the register save area (which may not be on the stack).
+ *
+ ****************************************************************************/
+
+	.macro	dispatch_c_isr	level mask
+
+	/* Initially the register save area is in SP, but that could change as
+	 * a consequence of context switching.
+	 */
+
+	mov		a12, sp						/* Address of save area */
+
+#ifdef __XTENSA_CALL0_ABI__
+	/* Get mask of pending, enabled interrupts at this level into a2. */
+
+	rsr		a2, INTENABLE
+	rsr		a3, INTERRUPT
+	movi	a4, \mask
+	and		a2, a2, a3
+	and		a2, a2, a4					/* a2 = Set of pending, enabled interrupts for this level */
+	beqz	a2, 1f						/* Nothing to do */
+
+	/* Call xtensa_int_decode with, passing that address of the register save
+	 * area as a parameter (A2).
+	 */
+
+										/* Argument 1: Set of CPU interrupt to dispatch */
+	mov		a3, sp						/* Argument 2: Top of stack = register save area */
+	call0	xtensa_int_decode			/* Call xtensa_int_decode */
+
+	/* On return from xtensa_int_decode, a2 will contain the address of the new
+	 * register save area.  Usually this would be the same as the current SP.
+	 * But in the event of a context switch, a2 will instead refer to the TCB
+	 * register save area.  This may or may not reside on a stack.
+	 */
+
+	mov		a12, a2						/* Switch to the save area of the new thread */
+
+#else
+	/* Get mask of pending, enabled interrupts at this level into a2. */
+
+	rsr		a6, INTENABLE
+	rsr		a2, INTERRUPT
+	movi	a3, \mask
+	and		a6, a6, a2
+	and		a6, a6, a3					/* a6 = Set of pending, enabled interrupts for this level */
+	beqz	a6, 1f						/* Nothing to do */
+
+	/* Call xtensa_int_decode with, passing that address of the register save
+	 * area as a parameter (A2).
+	 */
+
+										/* Argument 1: Set of CPU interrupt to dispatch */
+	mov		a7, sp						/* Argument 2: Top of stack = register save area */
+	call4	xtensa_int_decode			/* Call xtensa_int_decode */
+
+	/* On return from xtensa_int_decode, a6 will contain the address of the new
+	 * register save area.  Usually this would be the same as the current SP.
+	 * But in the event of a context switch, a2 will instead refer to the TCB
+	 * register save area.  This may or may not reside on a stack.
+	 */
+
+	mov		a12, a6						/* Switch to the save area of the new thread */
+#endif
+
+
+	/* Done */
+1:
+	.endm
+
+/****************************************************************************
+ * Macro: ps_setup
+ *
+ * Description:
+ *   Set up PS for C, enable interrupts above this level and clear EXCM.
+ *
+ * Entry Conditions:
+ *   level - interrupt level
+ *   tmp   - scratch register
+ *
+ * Side Effects:
+ *   PS and scratch register modified
+ *
+ * Assumptions:
+ *   - PS.EXCM = 1, C calling disabled
+ *
+ ****************************************************************************/
+
+	.macro	ps_setup	level tmp
+
+#if 0 /* Nested interrupts no yet supported */
+#  ifdef __XTENSA_CALL0_ABI__
+	/* Disable interrupts at level and below */
+
+	movi	\tmp, PS_INTLEVEL(\level) | PS_UM
+#  else
+	movi	\tmp, PS_INTLEVEL(\level) | PS_UM | PS_WOE
+#  endif
+#else
+#  ifdef __XTENSA_CALL0_ABI__
+	/* Disable all low- and medium-priority interrupts.  Nested are not yet
+	 * supported.
+	 */
+
+	movi	\tmp, PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM
+#  else
+	movi	\tmp, PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE
+#  endif
+#endif
+
+	wsr		\tmp, PS
+	rsync
+
+	.endm
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * LEVEL 1 INTERRUPT HANDLER
+ ****************************************************************************/
+/* The level1 interrupt vector is invoked via the User exception vector. */
+
+	.section HANDLER_SECTION, "ax"
+	.type	_xtensa_level1_handler, @function
+	.global	_xtensa_level1_handler
+	.align	4
+
+_xtensa_level1_handler:
+
+	mov		a0, sp							/* sp == a1 */
+	addi	sp, sp, -(4 * XCPTCONTEXT_SIZE)	/* Allocate interrupt stack frame */
+	s32i	a0, sp, (4 * REG_A1)			/* Save pre-interrupt SP */
+	rsr		a0, PS							/* Save interruptee's PS */
+	s32i	a0, sp, (4 * REG_PS)
+	rsr		a0, EPC_1						/* Save interruptee's PC */
+	s32i	a0, sp, (4 * REG_PC)
+	rsr		a0, EXCSAVE_1					/* Save interruptee's a0 */
+	s32i	a0, sp, (4 * REG_A0)
+
+	/* Save rest of interrupt context. */
+
+	s32i	a2, sp, (4 * REG_A2)
+	mov		a2, sp							/* Address of state save on stack */
+	call0	_xtensa_context_save			/* Save full register state */
+
+	/* Set up PS for C, enable interrupts above this level and clear EXCM. */
+
+	ps_setup	1 a0
+
+	/* Decode and dispatch the interrupt.  In the event of an interrupt
+	 * level context dispatch_c_isr() will (1) switch stacks to the new
+	 * thread's and (2) provide the address of the register state save
+	 * area in a12.  NOTE that the state save area may or may not lie
+	 * in the new thread's stack.
+	 */
+
+	dispatch_c_isr	1 XCHAL_INTLEVEL1_MASK
+
+	/* Restore registers in preparation to return from interrupt */
+
+	mov		a2, a12							/* a2 = address of new state save area */
+	call0	_xtensa_context_restore			/* (preserves a2) */
+
+	/* Restore only level-specific regs (the rest were already restored) */
+
+	l32i	a0, a2, (4 * REG_PS)			/* Retrieve interruptee's PS */
+	wsr		a0, PS
+	l32i	a0, a2, (4 * REG_PC)			/* Retrieve interruptee's PC */
+	wsr		a0, EPC_1
+	l32i	a0, a2, (4 * REG_A0)			/* Retrieve interruptee's A0 */
+    l32i    sp, a2, (4 * REG_A1)            /* Remove interrupt stack frame */
+	l32i	a2, a2, (4 * REG_A2)			/* Retrieve interruptee's A2 */
+	rsync									/* Ensure PS and EPC written */
+
+	/* Return from exception. RFE returns from either the UserExceptionVector
+	 * or the KernelExceptionVector.  RFE sets PS.EXCM back to 0, and then
+	 * jumps to the address in EPC[1]. PS.UM and PS.WOE are left unchanged.
+	 */
+
+	rfe										/* And return from "exception" */
+
+/****************************************************************************
+ * MEDIUM PRIORITY (LEVEL 2+) INTERRUPT LOW LEVEL HANDLERS.
+ *
+ * C Prototype:
+ *   void _xtensa_levelN_handler(void)
+ *
+ * Description:
+ *   Medium priority interrupts are by definition those with priority greater
+ *   than 1 and not greater than XCHAL_EXCM_LEVEL. These are disabled
+ *   by setting PS.EXCM and therefore can easily support a C environment for
+ *   handlers in C, and interact safely with NuttX.
+ *
+ *   Each vector goes at a predetermined location according to the Xtensa
+ *   hardware configuration, which is ensured by its placement in a special
+ *   section known to the NuttX linker script.  The vector logic performs
+ *   the minimum necessary operations before jumping to the handler via
+ *   a CALL0 instruction.  See "NOTES on the use of call0 ..." above.
+ *
+ *   The corresponding handler sets up the appropriate stack frame, saves
+ *   a few vector-specific registers and calls _xtensa_context_save()
+ *   to save the rest of the interrupted context.  It then calls the C
+ *   logic to decode the specific interrupt source and dispatch to the
+ *   appropriate C interrupt handler.
+ *
+ ****************************************************************************/
+
+#if XCHAL_EXCM_LEVEL >= 2
+	.section HANDLER_SECTION, "ax"
+	.type	_xtensa_level2_handler, @function
+	.global	_xtensa_level2_handler
+	.align	4
+
+_xtensa_level2_handler:
+
+	mov		a0, sp							/* sp == a1 */
+	addi	sp, sp, -(4 * XCPTCONTEXT_SIZE)	/* Allocate interrupt stack frame */
+	s32i	a0, sp, (4 * REG_A1)			/* Save pre-interrupt SP */
+	rsr		a0, EPS_2						/* Save interruptee's PS */
+	s32i	a0, sp, (4 * REG_PS)
+	rsr		a0, EPC_2						/* Save interruptee's PC */
+	s32i	a0, sp, (4 * REG_PC)
+	rsr		a0, EXCSAVE_2					/* Save interruptee's a0 */
+	s32i	a0, sp, (4 * REG_A0)
+
+	/* Save rest of interrupt context. */
+
+	s32i	a2, sp, (4 * REG_A2)
+	mov		a2, sp							/* Address of state save on stack */
+	call0	_xtensa_context_save			/* Save full register state */
+
+	/* Set up PS for C, enable interrupts above this level and clear EXCM. */
+
+	ps_setup	2 a0
+
+	/* Decode and dispatch the interrupt.  In the event of an interrupt
+	 * level context dispatch_c_isr() will (1) switch stacks to the new
+	 * thread's and (2) provide the address of the register state save
+	 * area in a12.  NOTE that the state save area may or may not lie
+	 * in the new thread's stack.
+	 */
+
+	dispatch_c_isr	2 XCHAL_INTLEVEL2_MASK
+
+	/* Restore registers in preparation to return from interrupt */
+
+	mov		a2, a12							/* a2 = address of new state save area */
+	call0	_xtensa_context_restore			/* (preserves a2) */
+
+	/* Restore only level-specific regs (the rest were already restored) */
+
+	l32i	a0, a2, (4 * REG_PS)			/* Retrieve interruptee's PS */
+	wsr		a0, EPS_2
+	l32i	a0, a2, (4 * REG_PC)			/* Retrieve interruptee's PC */
+	wsr		a0, EPC_2
+	l32i	a0, a2, (4 * REG_A0)			/* Retrieve interruptee's A0 */
+	l32i	sp, a2, (4 * REG_A1)			/* Remove interrupt stack frame */
+	l32i	a2, a2, (4 * REG_A2)			/* Retrieve interruptee's A2 */
+	rsync									/* Ensure EPS and EPC written */
+
+	/* Return from interrupt.  RFI  restores the PS from EPS_2 and jumps to
+	 * the address in EPC_2.
+	 */
+
+	rfi		2
+
+#endif /* XCHAL_EXCM_LEVEL >= 2 */
+
+#if XCHAL_EXCM_LEVEL >= 3
+	.section HANDLER_SECTION, "ax"
+	.type	_xtensa_level3_handler, @function
+	.global	_xtensa_level3_handler
+	.align	4
+
+_xtensa_level3_handler:
+
+	mov		a0, sp							/* sp == a1 */
+	addi	sp, sp, -(4 * XCPTCONTEXT_SIZE)	/* Allocate interrupt stack frame */
+	s32i	a0, sp, (4 * REG_A1)			/* Save pre-interrupt SP */
+	rsr		a0, EPS_3						/* Save interruptee's PS */
+	s32i	a0, sp, (4 * REG_PS)
+	rsr		a0, EPC_3						/* Save interruptee's PC */
+	s32i	a0, sp, (4 * REG_PC)
+	rsr		a0, EXCSAVE_3					/* Save interruptee's a0 */
+	s32i	a0, sp, (4 * REG_A0)
+
+	/* Save rest of interrupt context. */
+
+	s32i	a2, sp, (4 * REG_A2)
+	mov		a2, sp							/* Address of state save on stack */
+	call0	_xtensa_context_save			/* Save full register state */
+
+	/* Set up PS for C, enable interrupts above this level and clear EXCM. */
+
+	ps_setup	3 a0
+
+	/* Decode and dispatch the interrupt.  In the event of an interrupt
+	 * level context dispatch_c_isr() will (1) switch stacks to the new
+	 * thread's and (2) provide the address of the register state save
+	 * area in a12.  NOTE that the state save area may or may not lie
+	 * in the new thread's stack.
+	 */
+
+	dispatch_c_isr	3 XCHAL_INTLEVEL3_MASK
+
+	/* Restore registers in preparation to return from interrupt */
+
+	mov		a2, a12							/* a2 = address of new state save area */
+	call0	_xtensa_context_restore			/* (preserves a2) */
+
+	/* Restore only level-specific regs (the rest were already restored) */
+
+	l32i	a0, a2, (4 * REG_PS)			/* Retrieve interruptee's PS */
+	wsr		a0, EPS_3
+	l32i	a0, a2, (4 * REG_PC)			/* Retrieve interruptee's PC */
+	wsr		a0, EPC_3
+	l32i	a0, a2, (4 * REG_A0)			/* Retrieve interruptee's A0 */
+	l32i	sp, a2, (4 * REG_A1)			/* Remove interrupt stack frame */
+	l32i	a2, a2, (4 * REG_A2)			/* Retrieve interruptee's A2 */
+	rsync									/* Ensure EPS and EPC written */
+
+	/* Return from interrupt.  RFI  restores the PS from EPS_3 and jumps to
+	 * the address in EPC_3.
+	 */
+
+	rfi		3
+
+#endif /* XCHAL_EXCM_LEVEL >= 3 */
+
+#if XCHAL_EXCM_LEVEL >= 4
+	.section HANDLER_SECTION, "ax"
+	.type	_xtensa_level4_handler, @function
+	.global	_xtensa_level4_handler
+	.align	4
+
+_xtensa_level4_handler:
+
+	mov		a0, sp							/* sp == a1 */
+	addi	sp, sp, -(4 * XCPTCONTEXT_SIZE)	/* Allocate interrupt stack frame */
+	s32i	a0, sp, (4 * REG_A1)			/* Save pre-interrupt SP */
+	rsr		a0, EPS_4						/* Save interruptee's PS */
+	s32i	a0, sp, (4 * REG_PS)
+	rsr		a0, EPC_4						/* Save interruptee's PC */
+	s32i	a0, sp, (4 * REG_PC)
+	rsr		a0, EXCSAVE_4					/* Save interruptee's a0 */
+	s32i	a0, sp, (4 * REG_A0)
+
+	/* Save rest of interrupt context. */
+
+	s32i	a2, sp, (4 * REG_A2)
+	mov		a2, sp							/* Address of state save on stack */
+	call0	_xtensa_context_save			/* Save full register state */
+
+	/* Set up PS for C, enable interrupts above this level and clear EXCM. */
+
+	ps_setup	4 a0
+
+	/* Decode and dispatch the interrupt.  In the event of an interrupt
+	 * level context dispatch_c_isr() will (1) switch stacks to the new
+	 * thread's and (2) provide the address of the register state save
+	 * area in a12.  NOTE that the state save area may or may not lie
+	 * in the new thread's stack.
+	 */
+
+	dispatch_c_isr	4 XCHAL_INTLEVEL4_MASK
+
+	/* Restore registers in preparation to return from interrupt */
+
+	mov		a2, a12							/* a2 = address of new state save area */
+	call0	_xtensa_context_restore			/* (presevers a2) */
+
+	/* Restore only level-specific regs (the rest were already restored) */
+
+	l32i	a0, a2, (4 * REG_PS)			/* Retrieve interruptee's PS */
+	wsr		a0, EPS_4
+	l32i	a0, a2, (4 * REG_PC)			/* Retrieve interruptee's PC */
+	wsr		a0, EPC_4
+	l32i	a0, a2, (4 * REG_A0)			/* Retrieve interruptee's A0 */
+	l32i	sp, a2, (4 * REG_A1)			/* Remove interrupt stack frame */
+	l32i	a2, a2, (4 * REG_A2)			/* Retrieve interruptee's A2 */
+	rsync									/* Ensure EPS and EPC written */
+
+	/* Return from interrupt.  RFI  restores the PS from EPS_4 and jumps to
+	 * the address in EPC_4.
+	 */
+
+	rfi		4
+
+#endif /* XCHAL_EXCM_LEVEL >= 4 */
+
+#if XCHAL_EXCM_LEVEL >= 5
+	.section HANDLER_SECTION, "ax"
+	.type	_xtensa_level5_handler, @function
+	.global	_xtensa_level5_handler
+	.align	4
+
+_xtensa_level5_handler:
+
+	mov		a0, sp							/* sp == a1 */
+	addi	sp, sp, -(4 * XCPTCONTEXT_SIZE)	/* Allocate interrupt stack frame */
+	s32i	a0, sp, (4 * REG_A1)			/* Save pre-interrupt SP */
+	rsr		a0, EPS_5						/* Save interruptee's PS */
+	s32i	a0, sp, (4 * REG_PS)
+	rsr		a0, EPC_5						/* Save interruptee's PC */
+	s32i	a0, sp, (4 * REG_PC)
+	rsr		a0, EXCSAVE_5					/* Save interruptee's a0 */
+	s32i	a0, sp, (4 * REG_A0)
+
+	/* Save rest of interrupt context. */
+
+	s32i	a2, sp, (4 * REG_A2)
+	mov		a2, sp							/* Address of state save on stack */
+	call0	_xtensa_context_save			/* Save full register state */
+
+	/* Set up PS for C, enable interrupts above this level and clear EXCM. */
+
+	ps_setup	5 a0
+
+	/* Decode and dispatch the interrupt.  In the event of an interrupt
+	 * level context dispatch_c_isr() will (1) switch stacks to the new
+	 * thread's and (2) provide the address of the register state save
+	 * area in a12.  NOTE that the state save area may or may not lie
+	 * in the new thread's stack.
+	 */
+
+	dispatch_c_isr	5 XCHAL_INTLEVEL5_MASK
+
+	/* Restore registers in preparation to return from interrupt */
+
+	mov		a2, a12							/* a2 = address of new state save area */
+	call0	_xtensa_context_restore			/* (preserves a2) */
+
+	/* Restore only level-specific regs (the rest were already restored) */
+
+	l32i	a0, a2, (4 * REG_PS)			/* Retrieve interruptee's PS */
+	wsr		a0, EPS_5
+	l32i	a0, a2, (4 * REG_PC)			/* Retrieve interruptee's PC */
+	wsr		a0, EPC_5
+	l32i	a0, a2, (4 * REG_A0)			/* Retrieve interruptee's A0 */
+	l32i	sp, a2, (4 * REG_A1)			/* Remove interrupt stack frame */
+	l32i	a2, a2, (4 * REG_A2)			/* Retrieve interruptee's A2 */
+	rsync									/* Ensure EPS and EPC written */
+
+	/* Return from interrupt.  RFI  restores the PS from EPS_5 and jumps to
+	 * the address in EPC_5.
+	 */
+
+	rfi		5
+
+#endif /* XCHAL_EXCM_LEVEL >= 2 */
+
+#if XCHAL_EXCM_LEVEL >= 6
+	.section HANDLER_SECTION, "ax"
+	.type	_xtensa_level6_handler, @function
+	.global	_xtensa_level6_handler
+	.align	4
+
+_xtensa_level6_handler:
+
+	mov		a0, sp							/* sp == a1 */
+	addi	sp, sp, -(4 * XCPTCONTEXT_SIZE)	/* Allocate interrupt stack frame */
+	s32i	a0, sp, (4 * REG_A1)			/* Save pre-interrupt SP */
+	rsr		a0, EPS_6						/* Save interruptee's PS */
+	s32i	a0, sp, (4 * REG_PS)
+	rsr		a0, EPC_6						/* Save interruptee's PC */
+	s32i	a0, sp, (4 * REG_PC)
+	rsr		a0, EXCSAVE_6					/* Save interruptee's a0 */
+	s32i	a0, sp, (4 * REG_A0)
+
+	/* Save rest of interrupt context. */
+
+	s32i	a2, sp, (4 * REG_A2)
+	mov		a2, sp							/* Address of state save on stack */
+	call0	_xtensa_context_save			/* Save full register state */
+
+	/* Set up PS for C, enable interrupts above this level and clear EXCM. */
+
+	ps_setup	6 a0
+
+	/* Decode and dispatch the interrupt.  In the event of an interrupt
+	 * level context dispatch_c_isr() will (1) switch stacks to the new
+	 * thread's and (2) provide the address of the register state save
+	 * area in a12.  NOTE that the state save area may or may not lie
+	 * in the new thread's stack.
+	 */
+
+	dispatch_c_isr	6 XCHAL_INTLEVEL6_MASK
+
+	/* Restore registers in preparation to return from interrupt */
+
+	mov		a2, a12							/* a2 = address of new state save area */
+	call0	_xtensa_context_restore			/* (preserves a2) */
+
+	/* Restore only level-specific regs (the rest were already restored) */
+
+	l32i	a0, a2, (4 * REG_PS)			/* Retrieve interruptee's PS */
+	wsr		a0, EPS_6
+	l32i	a0, a2, (4 * REG_PC)			/* Retrieve interruptee's PC */
+	wsr		a0, EPC_6
+	l32i	a0, a2, (4 * REG_A0)			/* Retrieve interruptee's A0 */
+	l32i	sp, a2, (4 * REG_A1)			/* Remove interrupt stack frame */
+	l32i	a2, a2, (4 * REG_A2)			/* Retrieve interruptee's A2 */
+	rsync									/* Ensure EPS and EPC written */
+
+	/* Return from interrupt.  RFI  restores the PS from EPS_6 and jumps to
+	 * the address in EPC_6.
+	 */
+
+	rfi		6
+
+#endif /* XCHAL_EXCM_LEVEL >= 6 */
+
+/****************************************************************************
+ * HIGH PRIORITY (LEVEL > XCHAL_EXCM_LEVEL) LOW-LEVEL HANDLERS
+ *
+ * High priority interrupts are by definition those with priorities greater
+ * than XCHAL_EXCM_LEVEL. This includes non-maskable (NMI). High priority
+ * interrupts cannot interact with NuttX, that is they must save all regs
+ * they use and not call any NuttX function.
+ *
+ * A further restriction imposed by the Xtensa windowed architecture is that
+ * high priority interrupts must not modify the stack area even logically
+ * "above" the top of the interrupted stack (they need to provide their
+ * own stack or static save area).
+ *
+ * Cadence Design Systems recommends high priority interrupt handlers be
+ * coded in assembly and used for purposes requiring very short service
+ * times.
+ *
+ * Here are templates for high priority (level 2+) interrupt vectors.
+ * They assume only one interrupt per level to avoid the burden of
+ * identifying which interrupts at this level are pending and enabled. This
+ * allows for  minimum latency and avoids having to save/restore a2 in
+ * addition to a0.  If more than one interrupt per high priority level is
+ * configured, this burden is on the handler which in any case must provide
+ * a way to save and restore registers it uses without touching the
+ * interrupted stack.
+ *
+ * A template and example can be found in the Cadence Design Systems tools
+ * documentation: "Microprocessor Programmer's Guide".
+ *
+ * Each vector goes at a predetermined location according to the Xtensa
+ * hardware configuration, which is ensured by its placement in a special
+ * section known to the Xtensa linker support package (LSP). It performs
+ * the minimum necessary before jumping to the handler in the .text section.
+ *
+ ****************************************************************************/
+
+#if XCHAL_INT_NLEVELS >=2 && XCHAL_EXCM_LEVEL < 2 && XCHAL_DEBUGLEVEL !=2
+	.section	HANDLER_SECTION, "ax"
+	.type		_xtensa_level2_handler, @function
+	.global		_xtensa_level2_handler
+	.align		4
+
+_xtensa_level2_handler:
+
+#if 1
+	/* For now, just panic */
+
+	mov		a0, sp							/* sp == a1 */
+	addi	sp, sp, -(4 * XCPTCONTEXT_SIZE)	/* Allocate interrupt stack frame */
+	s32i	a0, sp, (4 * REG_A1)			/* Save pre-interrupt SP */
+	rsr		a0, EPS_2						/* Save interruptee's PS */
+	s32i	a0, sp, (4 * REG_PS)
+	rsr		a0, EPC_2						/* Save interruptee's PC */
+	s32i	a0, sp, (4 * REG_PC)
+	rsr		a0, EXCSAVE_2					/* Save interruptee's a0 */
+	s32i	a0, sp, (4 * REG_A0)
+
+	s32i	a2, sp, (4 * REG_A2)
+	movi	a2, XTENSA_LEVEL2_EXCEPTION	/* Address of state save on stack */
+	call0	_xtensa_panic				/* Does not return */
+
+#else
+	/* Add high priority level 2 interrupt handler code here. */
+
+	rsr		a0, EXCSAVE_2				/* Restore a0 */
+	rfi		2
+
+#endif
+#endif  /* XCHAL_INT_NLEVELS >=2 && XCHAL_EXCM_LEVEL < 2 && XCHAL_DEBUGLEVEL !=2 */
+
+#if XCHAL_INT_NLEVELS >=3 && XCHAL_EXCM_LEVEL < 3 && XCHAL_DEBUGLEVEL !=3
+	.section	HANDLER_SECTION, "ax"
+	.type		_xtensa_level3_handler, @function
+	.global		_xtensa_level3_handler
+	.align		4
+
+_xtensa_level3_handler:
+
+#if 1
+	/* For now, just panic */
+
+	mov		a0, sp							/* sp == a1 */
+	addi	sp, sp, -(4 * XCPTCONTEXT_SIZE)	/* Allocate interrupt stack frame */
+	s32i	a0, sp, (4 * REG_A1)			/* Save pre-interrupt SP */
+	rsr		a0, EPS_3						/* Save interruptee's PS */
+	s32i	a0, sp, (4 * REG_PS)
+	rsr		a0, EPC_3						/* Save interruptee's PC */
+	s32i	a0, sp, (4 * REG_PC)
+	rsr		a0, EXCSAVE_3					/* Save interruptee's a0 */
+	s32i	a0, sp, (4 * REG_A0)
+
+	s32i	a2, sp, (4 * REG_A2)
+	movi	a2, XTENSA_LEVEL3_EXCEPTION	/* Address of state save on stack */
+	call0	_xtensa_panic				/* Does not return */
+
+#else
+	wsr		a0, EXCSAVE_3				/* Save a0 */
+
+	/* Add high priority level 2 interrupt handler code here. */
+
+	rsr		a0, EXCSAVE_3				/* Restore a0 */
+	rfi		3
+
+#endif
+#endif /* XCHAL_INT_NLEVELS >=3 && XCHAL_EXCM_LEVEL < 3 && XCHAL_DEBUGLEVEL !=3 */
+
+#if XCHAL_INT_NLEVELS >=4 && XCHAL_EXCM_LEVEL < 4 && XCHAL_DEBUGLEVEL !=4
+	.section	HANDLER_SECTION, "ax"
+	.type		_xtensa_level4_handler, @function
+	.global		_xtensa_level4_handler
+	.align		4
+
+_xtensa_level4_handler:
+
+#if 1
+	/* For now, just panic */
+
+	mov		a0, sp							/* sp == a1 */
+	addi	sp, sp, -(4 * XCPTCONTEXT_SIZE)	/* Allocate interrupt stack frame */
+	s32i	a0, sp, (4 * REG_A1)			/* Save pre-interrupt SP */
+	rsr		a0, EPS_4						/* Save interruptee's PS */
+	s32i	a0, sp, (4 * REG_PS)
+	rsr		a0, EPC_4						/* Save interruptee's PC */
+	s32i	a0, sp, (4 * REG_PC)
+	rsr		a0, EXCSAVE_4					/* Save interruptee's a0 */
+	s32i	a0, sp, (4 * REG_A0)
+
+	s32i	a2, sp, (4 * REG_A2)
+	movi	a2, XTENSA_LEVEL4_EXCEPTION	/* Address of state save on stack */
+	call0	_xtensa_panic				/* Does not return */
+
+#else
+	wsr		a0, EXCSAVE_4				/* Save a0 */
+
+	/* Add high priority level 2 interrupt handler code here. */
+
+	rsr		a0, EXCSAVE_4				/* Restore a0 */
+	rfi		4
+
+#endif
+#endif /* XCHAL_INT_NLEVELS >=4 && XCHAL_EXCM_LEVEL < 4 && XCHAL_DEBUGLEVEL !=4 */
+
+#if XCHAL_INT_NLEVELS >=5 && XCHAL_EXCM_LEVEL < 5 && XCHAL_DEBUGLEVEL !=5
+	.section	HANDLER_SECTION, "ax"
+	.type		_xtensa_level5_handler, @function
+	.global		_xtensa_level5_handler
+	.align		4
+
+_xtensa_level5_handler:
+
+#if 1
+	/* For now, just panic */
+
+	mov		a0, sp							/* sp == a1 */
+	addi	sp, sp, -(4 * XCPTCONTEXT_SIZE)	/* Allocate interrupt stack frame */
+	s32i	a0, sp, (4 * REG_A1)			/* Save pre-interrupt SP */
+	rsr		a0, EPS_5						/* Save interruptee's PS */
+	s32i	a0, sp, (4 * REG_PS)
+	rsr		a0, EPC_5						/* Save interruptee's PC */
+	s32i	a0, sp, (4 * REG_PC)
+	rsr		a0, EXCSAVE_5					/* Save interruptee's a0 */
+	s32i	a0, sp, (4 * REG_A0)
+
+	s32i	a2, sp, (4 * REG_A2)
+	movi	a2, XTENSA_LEVEL5_EXCEPTION	/* Address of state save on stack */
+	call0	_xtensa_panic				/* Does not return */
+
+#else
+	wsr		a0, EXCSAVE_5				/* Save a0 */
+
+	/* Add high priority level 2 interrupt handler code here. */
+
+	rsr		a0, EXCSAVE_5				/* Restore a0 */
+	rfi		5
+
+#endif
+#endif /* XCHAL_INT_NLEVELS >=5 && XCHAL_EXCM_LEVEL < 5 && XCHAL_DEBUGLEVEL !=5 */
+
+#if XCHAL_INT_NLEVELS >=6 && XCHAL_EXCM_LEVEL < 6 && XCHAL_DEBUGLEVEL !=6
+	.section	HANDLER_SECTION, "ax"
+	.type		_xtensa_level6_handler, @function
+	.global		_xtensa_level6_handler
+	.align		4
+
+_xtensa_level6_handler:
+
+#if 1
+	/* For now, just panic */
+
+	mov		a0, sp							/* sp == a1 */
+	addi	sp, sp, -(4 * XCPTCONTEXT_SIZE)	/* Allocate interrupt stack frame */
+	s32i	a0, sp, (4 * REG_A1)			/* Save pre-interrupt SP */
+	rsr		a0, EPS_6						/* Save interruptee's PS */
+	s32i	a0, sp, (4 * REG_PS)
+	rsr		a0, EPC_6						/* Save interruptee's PC */
+	s32i	a0, sp, (4 * REG_PC)
+	rsr		a0, EXCSAVE_6					/* Save interruptee's a0 */
+	s32i	a0, sp, (4 * REG_A0)
+
+	s32i	a2, sp, (4 * REG_A2)
+	movi	a2, XTENSA_LEVEL6_EXCEPTION	/* Address of state save on stack */
+	call0	_xtensa_panic				/* Does not return */
+
+#else
+	wsr		a0, EXCSAVE_6				/* Save a0 */
+
+	/* Add high priority level 2 interrupt handler code here. */
+
+	rsr		a0, EXCSAVE_6				/* Restore a0 */
+	rfi		6
+
+#endif
+#endif /* XCHAL_INT_NLEVELS >=6 && XCHAL_EXCM_LEVEL < 6 && XCHAL_DEBUGLEVEL !=6 */
diff --git a/arch/xtensa/src/common/xtensa_interruptcontext.c b/arch/xtensa/src/common/xtensa_interruptcontext.c
new file mode 100644
index 0000000000000000000000000000000000000000..8cf096f725e32251ad39633a9f141907467708f9
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_interruptcontext.c
@@ -0,0 +1,63 @@
+/****************************************************************************
+ *  arch/xtensa/src/common/xtensa_interruptcontext.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include "xtensa.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_interrupt_context
+ *
+ * Description:  Return true is we are currently executing in
+ * the interrupt handler context on this CPU.
+ *
+ ****************************************************************************/
+
+bool up_interrupt_context(void)
+{
+   return CURRENT_REGS != NULL;
+}
diff --git a/arch/xtensa/src/common/xtensa_irqdispatch.c b/arch/xtensa/src/common/xtensa_irqdispatch.c
new file mode 100644
index 0000000000000000000000000000000000000000..813846e76e860696bac9dd7c4e5ce01060a03cfa
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_irqdispatch.c
@@ -0,0 +1,145 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtena_irqdispatch.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "xtensa.h"
+
+#include "group/group.h"
+#include "sched/sched.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+uint32_t *xtensa_irq_dispatch(int irq, uint32_t *regs)
+{
+#ifdef CONFIG_SUPPRESS_INTERRUPTS
+  board_autoled_on(LED_INIRQ);
+  PANIC();
+
+#else
+#if XCHAL_CP_NUM > 0
+  /* Save the TCB of in case we need to save co-processor state */
+
+  struct tcb_s *tcb = this_task();
+#endif
+
+  board_autoled_on(LED_INIRQ);
+
+  /* Nested interrupts are not supported */
+
+  DEBUGASSERT(CURRENT_REGS == NULL);
+
+  /* Current regs non-zero indicates that we are processing an interrupt;
+   * CURRENT_REGS is also used to manage interrupt level context switches.
+   */
+
+  CURRENT_REGS = regs;
+
+  /* Deliver the IRQ
+   *
+   * NOTE: Co-process state has not been saved yet (see below).  As a
+   * consequence, no interrupt level logic may perform co-processor
+   * operations.  This includes use of the FPU.
+   */
+
+  irq_dispatch(irq, regs);
+
+#if XCHAL_CP_NUM > 0 || defined(CONFIG_ARCH_ADDRENV)
+  /* Check for a context switch.  If a context switch occurred, then
+   * CURRENT_REGS will have a different value than it did on entry.
+   */
+
+  if (regs != CURRENT_REGS)
+    {
+#if XCHAL_CP_NUM > 0
+       /* If an interrupt level context switch has occurred, then save the
+        * co-processor state in in the suspended thread's co-processor save
+        * area.
+        *
+        * NOTE 1. The state of the co-processor has not been altered and
+        *         still represents the to-be-suspended thread.
+        * NOTE 2. We saved a reference  TCB of the original thread on entry.
+        */
+
+       xtensa_coproc_savestate(&tcb->xcp.cpstate);
+
+       /* Then set up the co-processor state for the to-be-started thread.
+        *
+        * NOTE: The current thread for this CPU is the to-be-started
+        * thread.
+        */
+
+       tcb = this_task();
+       xtensa_coproc_restorestate(&tcb->xcp.cpstate);
+#endif
+
+#ifdef CONFIG_ARCH_ADDRENV
+      /* Make sure that the address environment for the previously
+       * running task is closed down gracefully (data caches dump,
+       * MMU flushed) and set up the address environment for the new
+       * thread at the head of the ready-to-run list.
+       */
+
+      (void)group_addrenv(NULL);
+#endif
+    }
+#endif
+
+  /* Set CURRENT_REGS to NULL to indicate that we are no longer in an
+   * interrupt handler.
+   */
+
+  regs         = (uint32_t *)CURRENT_REGS;
+  CURRENT_REGS = NULL;
+#endif
+
+  board_autoled_off(LED_INIRQ);
+  return regs;
+}
diff --git a/arch/xtensa/src/common/xtensa_lowputs.c b/arch/xtensa/src/common/xtensa_lowputs.c
new file mode 100644
index 0000000000000000000000000000000000000000..3daeadc3ef94a56b083534277334bea5ddf8f7dd
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_lowputs.c
@@ -0,0 +1,62 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_lowputs.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include "xtensa.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_lowputs
+ *
+ * Description:
+ *   This is a low-level helper function used to support debug.
+ *
+ ****************************************************************************/
+
+void up_lowputs(const char *str)
+{
+  while (*str)
+    {
+      up_lowputc(*str++);
+    }
+}
diff --git a/arch/xtensa/src/common/xtensa_mdelay.c b/arch/xtensa/src/common/xtensa_mdelay.c
new file mode 100644
index 0000000000000000000000000000000000000000..094ba97a79d4d0cb15dd2562e2222b071697a9ec
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_mdelay.c
@@ -0,0 +1,70 @@
+/****************************************************************************
+ *  arch/xtensa/src/common/xtensa_mdelay.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_mdelay
+ *
+ * Description:
+ *   Delay inline for the requested number of milliseconds.
+ *   *** NOT multi-tasking friendly ***
+ *
+ * ASSUMPTIONS:
+ *   The setting CONFIG_BOARD_LOOPSPERMSEC has been calibrated
+ *
+ ****************************************************************************/
+
+void up_mdelay(unsigned int milliseconds)
+{
+  volatile int i;
+  volatile int j;
+
+  for (i = 0; i < milliseconds; i++)
+    {
+      for (j = 0; j < CONFIG_BOARD_LOOPSPERMSEC; j++)
+        {
+        }
+    }
+}
diff --git a/arch/xtensa/src/common/xtensa_modifyreg16.c b/arch/xtensa/src/common/xtensa_modifyreg16.c
new file mode 100644
index 0000000000000000000000000000000000000000..8554fda46fa9c861c65209de65f5360d1f7594e6
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_modifyreg16.c
@@ -0,0 +1,73 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_modifyreg16.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "xtensa.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: modifyreg16
+ *
+ * Description:
+ *   Atomically modify the specified bits in a memory mapped register
+ *
+ ****************************************************************************/
+
+void modifyreg16(unsigned int addr, uint16_t clearbits, uint16_t setbits)
+{
+  irqstate_t flags;
+  uint16_t   regval;
+
+  flags   = enter_critical_section();
+  regval  = getreg16(addr);
+  regval &= ~clearbits;
+  regval |= setbits;
+  putreg16(regval, addr);
+  leave_critical_section(flags);
+}
diff --git a/arch/xtensa/src/common/xtensa_modifyreg32.c b/arch/xtensa/src/common/xtensa_modifyreg32.c
new file mode 100644
index 0000000000000000000000000000000000000000..599e39db4bf9ada9ccaec2d2529dc0717fb3566a
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_modifyreg32.c
@@ -0,0 +1,73 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_modifyreg32.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "xtensa.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: modifyreg32
+ *
+ * Description:
+ *   Atomically modify the specified bits in a memory mapped register
+ *
+ ****************************************************************************/
+
+void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits)
+{
+  irqstate_t flags;
+  uint32_t   regval;
+
+  flags   = enter_critical_section();
+  regval  = getreg32(addr);
+  regval &= ~clearbits;
+  regval |= setbits;
+  putreg32(regval, addr);
+  leave_critical_section(flags);
+}
diff --git a/arch/xtensa/src/common/xtensa_modifyreg8.c b/arch/xtensa/src/common/xtensa_modifyreg8.c
new file mode 100644
index 0000000000000000000000000000000000000000..24201b5e97ae96b5a7fe3b6e8e396cccc6a2811f
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_modifyreg8.c
@@ -0,0 +1,73 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_modifyreg8.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "xtensa.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: modifyreg8
+ *
+ * Description:
+ *   Atomically modify the specified bits in a memory mapped register
+ *
+ ****************************************************************************/
+
+void modifyreg8(unsigned int addr, uint8_t clearbits, uint8_t setbits)
+{
+  irqstate_t flags;
+  uint8_t    regval;
+
+  flags   = enter_critical_section();
+  regval  = getreg8(addr);
+  regval &= ~clearbits;
+  regval |= setbits;
+  putreg8(regval, addr);
+  leave_critical_section(flags);
+}
diff --git a/arch/xtensa/src/common/xtensa_panic.S b/arch/xtensa/src/common/xtensa_panic.S
new file mode 100644
index 0000000000000000000000000000000000000000..c526eab6d4fa41544a1481729f77a9f99885aabb
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_panic.S
@@ -0,0 +1,144 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_panic.S
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from logic originally provided by Cadence Design Systems Inc.
+ *
+ *   Copyright (c) 2006-2015 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ ****************************************************************************/
+
+	.file	"xtensa_panic.S"
+
+/* NOTES on the use of 'call0' for long jumps instead of 'j':
+ *
+ *  1. This file should be assembled with the -mlongcalls option to xt-xcc.
+ *
+ *  2. The -mlongcalls compiler option causes 'call0 dest' to be expanded to
+ *     a sequence 'l32r a0, dest' 'callx0 a0' which works regardless of the
+ *     distance from the call to the destination. The linker then relaxes
+ *     it back to 'call0 dest' if it determines that dest is within range.
+ *     This allows more flexibility in locating code without the performance
+ *     overhead of the 'l32r' literal data load in cases where the destination
+ *     is in range of 'call0'. There is an additional benefit in that 'call0'
+ *     has a longer range than 'j' due to the target being word-aligned, so
+ *     the 'l32r' sequence is less likely needed.
+ *
+ *  3. The use of 'call0' with -mlongcalls requires that register a0 not be
+ *     live at the time of the call, which is always the case for a function
+ *     call but needs to be ensured if 'call0' is used as a jump in lieu of 'j'.
+ *
+ *  4. This use of 'call0' is independent of the C function call ABI.
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include "chip_macros.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: _xtensa_panic
+ *
+ * Description:
+ *   Should be reached by call0 (preferable) or jump only. If call0, a0 says
+ *   where from. If on simulator, display panic message and abort, else loop
+ *   indefinitely.
+ *
+ * Entry Conditions:
+ *   - A1 = Stack frame already allocated.  SP points to beginning of the
+ *          register frame.
+ *   - A0, A1, A2, PC and PS  = Already saved in the stack frame
+ *   - A2  = Exception code
+ *
+ * Exit conditions:
+ *   Does not return.
+ *
+ ****************************************************************************/
+
+	.section HANDLER_SECTION, "ax"
+	.global	_xtensa_panic
+	.type	_xtensa_panic, @function
+
+	.align	4
+	.literal_position
+	.align	4
+
+_xtensa_panic:
+	/* Save the exception code */
+
+	wsr		a2, EXCSAVE_1
+
+	/* Save rest of interrupt context (A2=address of state save area on
+	 * stack.
+	 */
+
+	mov		a2, sp							/* Address of state save on stack */
+	call0	_xtensa_context_save			/* Save full register state */
+
+	/* Save exc cause and vaddr into exception frame */
+
+	rsr		a0, EXCCAUSE
+	s32i	a0, sp, (4 * REG_EXCCAUSE)
+	rsr		a0, EXCVADDR
+	s32i	a0, sp, (4 * REG_EXCVADDR)
+
+	/* Set up PS for C, reenable hi-pri interrupts, and clear EXCM. */
+
+#ifdef __XTENSA_CALL0_ABI__
+	movi	a0, PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM
+#else
+	movi	a0, PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE
+#endif
+
+	wsr		a0, PS
+
+	/* Call C panic handler:  Arg1 (A2) = Exception code; Arg 2 (A3) = start
+	 * of the register save area.
+	 */
+
+#ifdef __XTENSA_CALL0_ABI__
+	rsr		a2, EXCSAVE_1
+	mov		a3, sp
+	call0	xtensa_panic					/* Call xtensa_panic. Should not return */
+#else
+	rsr		a6, EXCSAVE_1
+	mov		a7, sp
+	call4	xtensa_panic					/* Call xtensa_panic. Should not return */
+#endif
+
+1:	j		1b								/* loop infinitely */
+	retw
diff --git a/arch/xtensa/src/common/xtensa_puts.c b/arch/xtensa/src/common/xtensa_puts.c
new file mode 100644
index 0000000000000000000000000000000000000000..d9449f7ffdbe40d1e6ae3d72397e9b53b4d362aa
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_puts.c
@@ -0,0 +1,63 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_puts.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#include "xtensa.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_puts
+ *
+ * Description:
+ *   This is a low-level helper function used to support debug.
+ *
+ ****************************************************************************/
+
+void up_puts(const char *str)
+{
+  while (*str)
+    {
+      up_putc(*str++);
+    }
+}
diff --git a/arch/xtensa/src/common/xtensa_releasepending.c b/arch/xtensa/src/common/xtensa_releasepending.c
new file mode 100644
index 0000000000000000000000000000000000000000..cae473243f3a81ae4288f450a6d52ee9ef7cb885
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_releasepending.c
@@ -0,0 +1,159 @@
+/****************************************************************************
+ *  arch/xtensa/src/common/arm_releasepending.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "group/group.h"
+#include "xtensa.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_release_pending
+ *
+ * Description:
+ *   Release and ready-to-run tasks that have
+ *   collected in the pending task list.  This can call a
+ *   context switch if a new task is placed at the head of
+ *   the ready to run list.
+ *
+ ****************************************************************************/
+
+void up_release_pending(void)
+{
+  struct tcb_s *rtcb = this_task();
+
+  sinfo("From TCB=%p\n", rtcb);
+
+  /* Merge the g_pendingtasks list into the ready-to-run task list */
+
+  /* sched_lock(); */
+  if (sched_mergepending())
+    {
+      /* The currently active task has changed!  We will need to
+       * switch contexts.
+       */
+
+      /* Update scheduler parameters */
+
+      sched_suspend_scheduler(rtcb);
+
+      /* Are we operating in interrupt context? */
+
+      if (CURRENT_REGS)
+        {
+          /* Yes, then we have to do things differently.
+           * Just copy the CURRENT_REGS into the OLD rtcb.
+           */
+
+           xtensa_savestate(rtcb->xcp.regs);
+
+          /* Restore the exception context of the rtcb at the (new) head
+           * of the ready-to-run task list.
+           */
+
+          rtcb = this_task();
+
+          /* Update scheduler parameters */
+
+          sched_resume_scheduler(rtcb);
+
+          /* Then switch contexts.  Any necessary address environment
+           * changes will be made when the interrupt returns.
+           */
+
+          xtensa_restorestate(rtcb->xcp.regs);
+        }
+
+      /* Copy the exception context into the TCB of the task that
+       * was currently active. if up_saveusercontext returns a non-zero
+       * value, then this is really the previously running task
+       * restarting!
+       */
+
+      else if (!xtensa_context_save(rtcb->xcp.regs))
+        {
+#if XCHAL_CP_NUM > 0
+          /* Save the co-processor state in in the suspended thread's co-
+           * processor save area.
+           */
+
+          xtensa_coproc_savestate(&rtcb->xcp.cpstate);
+#endif
+          /* Restore the exception context of the rtcb at the (new) head
+           * of the ready-to-run task list.
+           */
+
+          rtcb = this_task();
+
+#if XCHAL_CP_NUM > 0
+          /* Set up the co-processor state for the newly started thread. */
+
+          xtensa_coproc_restorestate(&rtcb->xcp.cpstate);
+#endif
+
+#ifdef CONFIG_ARCH_ADDRENV
+          /* Make sure that the address environment for the previously
+           * running task is closed down gracefully (data caches dump,
+           * MMU flushed) and set up the address environment for the new
+           * thread at the head of the ready-to-run list.
+           */
+
+          (void)group_addrenv(rtcb);
+#endif
+          /* Update scheduler parameters */
+
+          sched_resume_scheduler(rtcb);
+
+          /* Then switch contexts */
+
+          xtensa_context_restore(rtcb->xcp.regs);
+        }
+    }
+}
diff --git a/arch/xtensa/src/common/xtensa_releasestack.c b/arch/xtensa/src/common/xtensa_releasestack.c
new file mode 100644
index 0000000000000000000000000000000000000000..94bb2d8cd8ad91c7164b3871c48525b49766e4cc
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_releasestack.c
@@ -0,0 +1,114 @@
+/****************************************************************************
+ *  arch/xtensa/src/common/xtensa_releasestack.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "xtensa.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_release_stack
+ *
+ * Description:
+ *   A task has been stopped. Free all stack related resources retained in
+ *   the defunct TCB.
+ *
+ * Input Parmeters
+ *   - dtcb:  The TCB containing information about the stack to be released
+ *   - ttype:  The thread type.  This may be one of following (defined in
+ *     include/nuttx/sched.h):
+ *
+ *       TCB_FLAG_TTYPE_TASK     Normal user task
+ *       TCB_FLAG_TTYPE_PTHREAD  User pthread
+ *       TCB_FLAG_TTYPE_KERNEL   Kernel thread
+ *
+ *     This thread type is normally available in the flags field of the TCB,
+ *     however, there are certain error recovery contexts where the TCB may
+ *     not be fully initialized when up_release_stack is called.
+ *
+ *     If CONFIG_BUILD_KERNEL is defined, then this thread type may affect
+ *     how the stack is freed.  For example, kernel thread stacks may have
+ *     been allocated from protected kernel memory.  Stacks for user tasks
+ *     and threads must have come from memory that is accessible to user
+ *     code.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void up_release_stack(FAR struct tcb_s *dtcb, uint8_t ttype)
+{
+  /* Is there a stack allocated? */
+
+  if (dtcb->stack_alloc_ptr)
+    {
+#if defined(CONFIG_BUILD_KERNEL) && defined(CONFIG_MM_KERNEL_HEAP)
+      /* Use the kernel allocator if this is a kernel thread */
+
+      if (ttype == TCB_FLAG_TTYPE_KERNEL)
+        {
+          sched_kfree(dtcb->stack_alloc_ptr);
+        }
+      else
+#endif
+        {
+          /* Use the user-space allocator if this is a task or pthread */
+
+          sched_ufree(dtcb->stack_alloc_ptr);
+        }
+
+      /* Mark the stack freed */
+
+      dtcb->stack_alloc_ptr = NULL;
+    }
+
+  /* The size of the allocated stack is now zero */
+
+  dtcb->adj_stack_size = 0;
+}
diff --git a/arch/xtensa/src/common/xtensa_reprioritizertr.c b/arch/xtensa/src/common/xtensa_reprioritizertr.c
new file mode 100644
index 0000000000000000000000000000000000000000..0226d18f7250ca3bb09143ca126358f6df17ec6e
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_reprioritizertr.c
@@ -0,0 +1,213 @@
+/****************************************************************************
+ *  arch/xtensa/src/common/arm_reprioritizertr.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "group/group.h"
+#include "xtensa.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_reprioritize_rtr
+ *
+ * Description:
+ *   Called when the priority of a running or
+ *   ready-to-run task changes and the reprioritization will
+ *   cause a context switch.  Two cases:
+ *
+ *   1) The priority of the currently running task drops and the next
+ *      task in the ready to run list has priority.
+ *   2) An idle, ready to run task's priority has been raised above the
+ *      the priority of the current, running task and it now has the
+ *      priority.
+ *
+ * Inputs:
+ *   tcb: The TCB of the task that has been reprioritized
+ *   priority: The new task priority
+ *
+ ****************************************************************************/
+
+void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
+{
+  /* Verify that the caller is sane */
+
+  if (tcb->task_state < FIRST_READY_TO_RUN_STATE ||
+      tcb->task_state > LAST_READY_TO_RUN_STATE
+#if SCHED_PRIORITY_MIN > 0
+      || priority < SCHED_PRIORITY_MIN
+#endif
+#if SCHED_PRIORITY_MAX < UINT8_MAX
+      || priority > SCHED_PRIORITY_MAX
+#endif
+    )
+    {
+       PANIC();
+    }
+  else
+    {
+      struct tcb_s *rtcb = this_task();
+      bool switch_needed;
+
+      sinfo("TCB=%p PRI=%d\n", tcb, priority);
+
+      /* Remove the tcb task from the ready-to-run list.
+       * sched_removereadytorun will return true if we just
+       * remove the head of the ready to run list.
+       */
+
+      switch_needed = sched_removereadytorun(tcb);
+
+      /* Setup up the new task priority */
+
+      tcb->sched_priority = (uint8_t)priority;
+
+      /* Return the task to the specified blocked task list.
+       * sched_addreadytorun will return true if the task was
+       * added to the new list.  We will need to perform a context
+       * switch only if the EXCLUSIVE or of the two calls is non-zero
+       * (i.e., one and only one the calls changes the head of the
+       * ready-to-run list).
+       */
+
+      switch_needed ^= sched_addreadytorun(tcb);
+
+      /* Now, perform the context switch if one is needed */
+
+      if (switch_needed)
+        {
+          /* If we are going to do a context switch, then now is the right
+           * time to add any pending tasks back into the ready-to-run list.
+           * task list now
+           */
+
+          if (g_pendingtasks.head)
+            {
+              sched_mergepending();
+            }
+
+          /* Update scheduler parameters */
+
+          sched_suspend_scheduler(rtcb);
+
+          /* Are we in an interrupt handler? */
+
+          if (CURRENT_REGS)
+            {
+              /* Yes, then we have to do things differently.
+               * Just copy the CURRENT_REGS into the OLD rtcb.
+               */
+
+               xtensa_savestate(rtcb->xcp.regs);
+
+              /* Restore the exception context of the rtcb at the (new) head
+               * of the ready-to-run task list.
+               */
+
+              rtcb = this_task();
+
+              /* Update scheduler parameters */
+
+              sched_resume_scheduler(rtcb);
+
+              /* Then switch contexts.  Any necessary address environment
+               * changes will be made when the interrupt returns.
+               */
+
+              xtensa_restorestate(rtcb->xcp.regs);
+            }
+
+          /* Copy the exception context into the TCB at the (old) head of the
+           * ready-to-run Task list. if up_saveusercontext returns a non-zero
+           * value, then this is really the previously running task restarting!
+           */
+
+          else if (!xtensa_context_save(rtcb->xcp.regs))
+            {
+#if XCHAL_CP_NUM > 0
+              /* Save the co-processor state in in the suspended thread's co-
+               * processor save area.
+               */
+
+              xtensa_coproc_savestate(&rtcb->xcp.cpstate);
+#endif
+              /* Restore the exception context of the rtcb at the (new) head
+               * of the ready-to-run task list.
+               */
+
+              rtcb = this_task();
+
+#if XCHAL_CP_NUM > 0
+              /* Set up the co-processor state for the newly started thread. */
+
+              xtensa_coproc_restorestate(&rtcb->xcp.cpstate);
+#endif
+
+#ifdef CONFIG_ARCH_ADDRENV
+              /* Make sure that the address environment for the previously
+               * running task is closed down gracefully (data caches dump,
+               * MMU flushed) and set up the address environment for the new
+               * thread at the head of the ready-to-run list.
+               */
+
+              (void)group_addrenv(rtcb);
+#endif
+              /* Update scheduler parameters */
+
+              sched_resume_scheduler(rtcb);
+
+              /* Then switch contexts */
+
+              xtensa_context_restore(rtcb->xcp.regs);
+            }
+        }
+    }
+}
diff --git a/arch/xtensa/src/common/xtensa_schedsigaction.c b/arch/xtensa/src/common/xtensa_schedsigaction.c
new file mode 100644
index 0000000000000000000000000000000000000000..2dd39913351909eadf1a93a5a0c0c4c363b40f5b
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_schedsigaction.c
@@ -0,0 +1,381 @@
+/****************************************************************************
+ * arch/xtensa/src/common/arm_schedulesigaction.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "xtensa.h"
+
+#include "irq/irq.h"
+
+#ifndef CONFIG_DISABLE_SIGNALS
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_schedule_sigaction
+ *
+ * Description:
+ *   This function is called by the OS when one or more
+ *   signal handling actions have been queued for execution.
+ *   The architecture specific code must configure things so
+ *   that the 'sigdeliver' callback is executed on the thread
+ *   specified by 'tcb' as soon as possible.
+ *
+ *   This function may be called from interrupt handling logic.
+ *
+ *   This operation should not cause the task to be unblocked
+ *   nor should it cause any immediate execution of sigdeliver.
+ *   Typically, a few cases need to be considered:
+ *
+ *   (1) This function may be called from an interrupt handler
+ *       During interrupt processing, all xcptcontext structures
+ *       should be valid for all tasks.  That structure should
+ *       be modified to invoke sigdeliver() either on return
+ *       from (this) interrupt or on some subsequent context
+ *       switch to the recipient task.
+ *   (2) If not in an interrupt handler and the tcb is NOT
+ *       the currently executing task, then again just modify
+ *       the saved xcptcontext structure for the recipient
+ *       task so it will invoke sigdeliver when that task is
+ *       later resumed.
+ *   (3) If not in an interrupt handler and the tcb IS the
+ *       currently executing task -- just call the signal
+ *       handler now.
+ *
+ ****************************************************************************/
+
+#ifndef CONFIG_SMP
+void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
+{
+  irqstate_t flags;
+
+  sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+
+  /* Make sure that interrupts are disabled */
+
+  flags = enter_critical_section();
+
+  /* Refuse to handle nested signal actions */
+
+  if (!tcb->xcp.sigdeliver)
+    {
+      /* First, handle some special cases when the signal is being delivered
+       * to the currently executing task.
+       */
+
+      sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
+
+      if (tcb == this_task())
+        {
+          /* CASE 1:  We are not in an interrupt handler and a task is
+           * signalling itself for some reason.
+           */
+
+          if (!CURRENT_REGS)
+            {
+              /* In this case just deliver the signal now. */
+
+              sigdeliver(tcb);
+            }
+
+          /* CASE 2:  We are in an interrupt handler AND the interrupted
+           * task is the same as the one that must receive the signal, then
+           * we will have to modify the return state as well as the state
+           * in the TCB.
+           *
+           * Hmmm... there looks like a latent bug here: The following logic
+           * would fail in the strange case where we are in an interrupt
+           * handler, the thread is signalling itself, but a context switch
+           * to another task has occurred so that CURRENT_REGS does not
+           * refer to the thread of this_task()!
+           */
+
+          else
+            {
+              /* Save the return pc and ps.  These will be restored by the
+               * signal trampoline after the signals have been delivered.
+               *
+               * NOTE: that hi-priority interrupts are not disabled.
+               */
+
+              tcb->xcp.sigdeliver  = sigdeliver;
+              tcb->xcp.saved_pc    = CURRENT_REGS[REG_PC];
+              tcb->xcp.saved_ps    = CURRENT_REGS[REG_PS];
+
+              /* Then set up to vector to the trampoline with interrupts
+               * disabled
+               */
+
+              CURRENT_REGS[REG_PC] = (uint32_t)_xtensa_sig_trampoline;
+#ifdef __XTENSA_CALL0_ABI__
+              CURRENT_REGS[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM);
+#else
+              CURRENT_REGS[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE);
+#endif
+
+              /* And make sure that the saved context in the TCB is the same
+               * as the interrupt return context.
+               */
+
+              xtensa_savestate(tcb->xcp.regs);
+            }
+        }
+
+      /* Otherwise, we are (1) signaling a task is not running from an
+       * interrupt handler or (2) we are not in an interrupt handler and the
+       * running task is signalling some non-running task.
+       */
+
+      else
+        {
+          /* Save the return pc and ps.  These will be restored by the
+           * signal trampoline after the signals have been delivered.
+           *
+           * NOTE: that hi-priority interrupts are not disabled.
+           */
+
+          tcb->xcp.sigdeliver   = sigdeliver;
+          tcb->xcp.saved_pc     = CURRENT_REGS[REG_PC];
+          tcb->xcp.saved_ps     = CURRENT_REGS[REG_PS];
+
+          /* Then set up to vector to the trampoline with interrupts
+           * disabled
+           */
+
+          tcb->xcp.regs[REG_PC] = (uint32_t)_xtensa_sig_trampoline;
+#ifdef __XTENSA_CALL0_ABI__
+          tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM);
+#else
+          tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE);
+#endif
+        }
+    }
+
+  leave_critical_section(flags);
+}
+#endif /* !CONFIG_SMP */
+
+#ifdef CONFIG_SMP
+void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
+{
+  irqstate_t flags;
+  int cpu;
+  int me;
+
+  sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+
+  /* Make sure that interrupts are disabled */
+
+  flags = enter_critical_section();
+
+  /* Refuse to handle nested signal actions */
+
+  if (!tcb->xcp.sigdeliver)
+    {
+      /* First, handle some special cases when the signal is being delivered
+       * to task that is currently executing on any CPU.
+       */
+
+      sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
+
+      if (tcb->task_state == TSTATE_TASK_RUNNING)
+        {
+          me  = this_cpu();
+          cpu = tcb->cpu;
+
+          /* CASE 1:  We are not in an interrupt handler and a task is
+           * signalling itself for some reason.
+           */
+
+          if (cpu == me && !CURRENT_REGS)
+            {
+              /* In this case just deliver the signal now. */
+
+              sigdeliver(tcb);
+            }
+
+          /* CASE 2:  The task that needs to receive the signal is running.
+           * This could happen if the task is running on another CPU OR if
+           * we are in an interrupt handler and the task is running on this
+           * CPU.  In the former case, we will have to PAUSE the other CPU
+           * first.  But in either case, we will have to modify the return
+           * state as well as the state in the TCB.
+           *
+           * Hmmm... there looks like a latent bug here: The following logic
+           * would fail in the strange case where we are in an interrupt
+           * handler, the thread is signalling itself, but a context switch
+           * to another task has occurred so that CURRENT_REGS does not
+           * refer to the thread of this_task()!
+           */
+
+          else
+            {
+              /* If we signalling a task running on the other CPU, we have
+               * to PAUSE the other CPU.
+               */
+
+              if (cpu != me)
+                {
+                  up_cpu_pause(cpu);
+                }
+
+              /* Save the return pc and ps.  These will be restored by the
+               * signal trampoline after the signals have been delivered.
+               *
+               * NOTE: that hi-priority interrupts are not disabled.
+               */
+
+              tcb->xcp.sigdeliver = sigdeliver;
+              tcb->xcp.saved_pc   = CURRENT_REGS[REG_PC];
+              tcb->xcp.saved_ps   = CURRENT_REGS[REG_PS];
+
+              /* Increment the IRQ lock count so that when the task is restarted,
+               * it will hold the IRQ spinlock.
+               */
+
+              DEBUGASSERT(tcb->irqcount < INT16_MAX);
+              tcb->irqcount++;
+
+              /* Handle a possible race condition where the TCB was suspended
+               * just before we paused the other CPU.  The critical section
+               * established above will prevent new threads from running on
+               * that CPU, but it will not guarantee that the running thread
+               * did not suspend itself (allowing any threads "assigned" to
+               * the CPU to run).
+               */
+
+              if (tcb->task_state != TSTATE_TASK_RUNNING)
+                {
+                  tcb->xcp.regs[REG_PC] = (uint32_t)_xtensa_sig_trampoline;
+#ifdef __XTENSA_CALL0_ABI__
+                  tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM);
+#else
+                  tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE);
+#endif
+                }
+              else
+                {
+                  /* Then set up to vector to the trampoline with interrupts
+                   * disabled
+                   */
+
+                  CURRENT_REGS[REG_PC] = (uint32_t)_xtensa_sig_trampoline;
+#ifdef __XTENSA_CALL0_ABI__
+                  CURRENT_REGS[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM);
+#else
+                  CURRENT_REGS[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE);
+#endif
+                  /* In an SMP configuration, the interrupt disable logic also
+                   * involves spinlocks that are configured per the TCB irqcount
+                   * field.  This is logically equivalent to enter_critical_section().
+                   * The matching call to leave_critical_section() will be
+                   * performed in up_sigdeliver().
+                   */
+
+                  spin_setbit(&g_cpu_irqset, cpu, &g_cpu_irqsetlock,
+                              &g_cpu_irqlock);
+
+                  /* And make sure that the saved context in the TCB is the same
+                   * as the interrupt return context.
+                   */
+
+                  xtensa_savestate(tcb->xcp.regs);
+                }
+
+              /* RESUME the other CPU if it was PAUSED */
+
+              if (cpu != me)
+                {
+                  up_cpu_resume(cpu);
+                }
+            }
+        }
+
+      /* Otherwise, we are (1) signaling a task is not running from an
+       * interrupt handler or (2) we are not in an interrupt handler and the
+       * running task is signalling some other non-running task.
+       */
+
+      else
+        {
+          /* Save the return pc and ps.  These will be restored by the
+           * signal trampoline after the signals have been delivered.
+           *
+           * NOTE: that hi-priority interrupts are not disabled.
+           */
+
+          tcb->xcp.sigdeliver   = sigdeliver;
+          tcb->xcp.saved_pc     = CURRENT_REGS[REG_PC];
+          tcb->xcp.saved_ps     = CURRENT_REGS[REG_PS];
+
+          /* Increment the IRQ lock count so that when the task is restarted,
+           * it will hold the IRQ spinlock.
+           */
+
+          DEBUGASSERT(tcb->irqcount < INT16_MAX);
+          tcb->irqcount++;
+
+          /* Then set up to vector to the trampoline with interrupts
+           * disabled
+           */
+
+          tcb->xcp.regs[REG_PC] = (uint32_t)_xtensa_sig_trampoline;
+#ifdef __XTENSA_CALL0_ABI__
+          tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM);
+#else
+          tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE);
+#endif
+        }
+    }
+
+  leave_critical_section(flags);
+}
+#endif /* CONFIG_SMP */
+
+#endif /* !CONFIG_DISABLE_SIGNALS */
diff --git a/arch/xtensa/src/common/xtensa_sigdeliver.c b/arch/xtensa/src/common/xtensa_sigdeliver.c
new file mode 100644
index 0000000000000000000000000000000000000000..ec6e6c56ddfcea6ee0dac8fd92432ac8f82f8959
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_sigdeliver.c
@@ -0,0 +1,128 @@
+/****************************************************************************
+ * arch/xtensa/src/common/arm_sigdeliver.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "xtensa.h"
+
+#ifndef CONFIG_DISABLE_SIGNALS
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: xtensa_sig_deliver
+ *
+ * Description:
+ *   This is the a signal handling trampoline.  When a signal action was
+ *   posted.  The task context was mucked with and forced to branch to this
+ *   location with interrupts disabled.
+ *
+ ****************************************************************************/
+
+void xtensa_sig_deliver(void)
+{
+  struct tcb_s  *rtcb = this_task();
+  uint32_t regs[XCPTCONTEXT_REGS];
+  sig_deliver_t sigdeliver;
+
+  /* Save the errno.  This must be preserved throughout the signal handling
+   * so that the user code final gets the correct errno value (probably
+   * EINTR).
+   */
+
+  int saved_errno = rtcb->pterrno;
+
+  board_autoled_on(LED_SIGNAL);
+
+  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+        rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
+  ASSERT(rtcb->xcp.sigdeliver != NULL);
+
+  /* Save the real return state on the stack. */
+
+  xtensa_copystate(regs, rtcb->xcp.regs);
+  regs[REG_PC]         = rtcb->xcp.saved_pc;
+  regs[REG_PS]         = rtcb->xcp.saved_ps;
+
+  /* Get a local copy of the sigdeliver function pointer. we do this so that
+   * we can nullify the sigdeliver function pointer in the TCB and accept
+   * more signal deliveries while processing the current pending signals.
+   */
+
+  sigdeliver           = rtcb->xcp.sigdeliver;
+  rtcb->xcp.sigdeliver = NULL;
+
+  /* Then restore the task interrupt state */
+
+  up_irq_restore(regs[REG_PS]);
+
+  /* Deliver the signals */
+
+  sigdeliver(rtcb);
+
+  /* Output any debug messages BEFORE restoring errno (because they may
+   * alter errno), then disable interrupts again and restore the original
+   * errno that is needed by the user logic (it is probably EINTR).
+   */
+
+  sinfo("Resuming\n");
+  (void)up_irq_save();
+  rtcb->pterrno = saved_errno;
+
+  /* Then restore the correct state for this thread of execution.
+   * NOTE: The co-processor state should already be correct.
+   */
+
+  board_autoled_off(LED_SIGNAL);
+  xtensa_context_restore(regs);
+}
+
+#endif /* !CONFIG_DISABLE_SIGNALS */
diff --git a/arch/xtensa/src/common/xtensa_sigtramp.S b/arch/xtensa/src/common/xtensa_sigtramp.S
new file mode 100644
index 0000000000000000000000000000000000000000..cf91a302aa171a36fcdc2a15cb4732a4724dd41f
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_sigtramp.S
@@ -0,0 +1,83 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_sigtramp.S
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+	.file	"xtensa_sigtramp.S"
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include "xtensa_abi.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: _xtensa_sig_trampoline
+ *
+ * Description:
+ *   Just sets up a proper window call to xtensa_sig_deliver().  We get
+ *   here via a context switch setup in up_schedule_signaction.  Which
+ *   re-vectors the context switch to this location.
+ *
+ *   Here we just call xtensa_sig_deliver() using the proper ABI.  NOTE
+ *   that this function cannot return and depends on the fact that
+ *   xtensa_sig_deliver() does not return.
+ *
+ *
+ ****************************************************************************/
+
+	.text
+	.global	_xtensa_sig_trampoline
+	.type	_xtensa_sig_trampoline, @function
+	.align	4
+
+_xtensa_sig_trampoline:
+	ENTRY(16)						/* REVISIT: This should not be here */
+
+#ifdef __XTENSA_CALL0_ABI__
+	cali0	xtensa_sig_deliver		/* Call xtensa_sig_deliver */
+#else
+	call4	xtensa_sig_deliver		/* Call xtensa_sig_deliver */
+#endif
+
+1:	j		1b						/* xtensa_sig_deliver does not return */
+
+	.size	_xtensa_sig_trampoline, . - _xtensa_sig_trampoline
diff --git a/arch/xtensa/src/common/xtensa_stackframe.c b/arch/xtensa/src/common/xtensa_stackframe.c
new file mode 100644
index 0000000000000000000000000000000000000000..388238d8de342597a4dfaa962aef5d31f8da488d
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_stackframe.c
@@ -0,0 +1,134 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_stackframe.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "xtensa.h"
+
+/****************************************************************************
+ * Pre-processor Macros
+ ****************************************************************************/
+/* XTENSA requires at least a 4-byte stack alignment.  For floating point use,
+ * however, the stack must be aligned to 8-byte addresses.
+ */
+
+#ifdef CONFIG_LIBC_FLOATINGPOINT
+#  define STACK_ALIGNMENT   8
+#else
+#  define STACK_ALIGNMENT   4
+#endif
+
+/* Stack alignment macros */
+
+#define STACK_ALIGN_MASK    (STACK_ALIGNMENT-1)
+#define STACK_ALIGN_DOWN(a) ((a) & ~STACK_ALIGN_MASK)
+#define STACK_ALIGN_UP(a)   (((a) + STACK_ALIGN_MASK) & ~STACK_ALIGN_MASK)
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_stack_frame
+ *
+ * Description:
+ *   Allocate a stack frame in the TCB's stack to hold thread-specific data.
+ *   This function may be called anytime after up_create_stack() or
+ *   up_use_stack() have been called but before the task has been started.
+ *
+ *   Thread data may be kept in the stack (instead of in the TCB) if it is
+ *   accessed by the user code directly.  This includes such things as
+ *   argv[].  The stack memory is guaranteed to be in the same protection
+ *   domain as the thread.
+ *
+ *   The following TCB fields will be re-initialized:
+ *
+ *   - adj_stack_size: Stack size after removal of the stack frame from
+ *     the stack
+ *   - adj_stack_ptr: Adjusted initial stack pointer after the frame has
+ *     been removed from the stack.  This will still be the initial value
+ *     of the stack pointer when the task is started.
+ *
+ * Inputs:
+ *   - tcb:  The TCB of new task
+ *   - frame_size:  The size of the stack frame to allocate.
+ *
+ *  Returned Value:
+ *   - A pointer to bottom of the allocated stack frame.  NULL will be
+ *     returned on any failures.  The alignment of the returned value is
+ *     the same as the alignment of the stack itself.
+ *
+ ****************************************************************************/
+
+FAR void *up_stack_frame(FAR struct tcb_s *tcb, size_t frame_size)
+{
+  uintptr_t topaddr;
+
+  /* Align the frame_size */
+
+  frame_size = STACK_ALIGN_UP(frame_size);
+
+  /* Is there already a stack allocated? Is it big enough? */
+
+  if (!tcb->stack_alloc_ptr || tcb->adj_stack_size <= frame_size)
+    {
+      return NULL;
+    }
+
+  /* Save the adjusted stack values in the struct tcb_s */
+
+  topaddr               = (uintptr_t)tcb->adj_stack_ptr - frame_size;
+  tcb->adj_stack_ptr    = (FAR void *)topaddr;
+  tcb->adj_stack_size  -= frame_size;
+
+  /* Reset the initial stack pointer (A1) */
+
+  tcb->xcp.regs[REG_A1] = (uint32_t)tcb->adj_stack_ptr;
+
+  /* And return the pointer to the allocated region */
+
+  return (FAR void *)(topaddr + sizeof(uint32_t));
+}
diff --git a/arch/xtensa/src/common/xtensa_testset.c b/arch/xtensa/src/common/xtensa_testset.c
new file mode 100644
index 0000000000000000000000000000000000000000..8dd15fdec90a4bcb85568894073d425260b0f059
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_testset.c
@@ -0,0 +1,142 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_testset.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include "xtensa.h"
+
+#ifdef CONFIG_SPINLOCK
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: xtensa_compareset
+ *
+ * Description:
+ *   Wrapper for the Xtensa compare-and-set instruction. This function will
+ *   atomically compare *addr to compare, and if it's the same, will set
+ *   *addr to set. It will return the old value of *addr.
+ *
+ *   Warning: From the ISA docs: in some (unspecified) cases, the s32c1i
+ *   instruction may return the *bitwise inverse* of the old mem if the
+ *   mem wasn't written. This doesn't seem to happen on the ESP32, though.
+ *   (Would show up directly if it did because the magic wouldn't match.)
+ *
+ ****************************************************************************/
+
+static inline uint32_t xtensa_compareset(FAR volatile uint32_t *addr,
+                                         uint32_t compare,
+                                         uint32_t set)
+{
+  __asm__ __volatile__
+  (
+    "WSR    %2, SCOMPARE1\n" /* Initialize SCOMPARE1 */
+    "ISYNC\n"                /* Wait sync */
+    "S32C1I %0, %1, 0\n"     /* Store id into the lock, if the lock is the
+                              * same as comparel. Otherwise, no write-access */
+    : "=r"(set) : "r"(addr), "r"(compare), "0"(set)
+  );
+
+  return set;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_testset
+ *
+ * Description:
+ *   Perform an atomic test and set operation on the provided spinlock.
+ *
+ *   This function must be provided via the architecture-specific logoic.
+ *
+ * Input Parameters:
+ *   lock - The address of spinlock object.
+ *
+ * Returned Value:
+ *   The spinlock is always locked upon return.  The value of previous value
+ *   of the spinlock variable is returned, either SP_LOCKED if the spinlock
+ *   was previously locked (meaning that the test-and-set operation failed to
+ *   obtain the lock) or SP_UNLOCKED if the spinlock was previously unlocked
+ *   (meaning that we successfully obtained the lock)
+ *
+ ****************************************************************************/
+
+spinlock_t up_testset(volatile FAR spinlock_t *lock)
+{
+  spinlock_t prev;
+
+  /* Perform the 32-bit compare and set operation */
+
+  prev = xtensa_compareset((FAR volatile uint32_t *)lock,
+                           SP_UNLOCKED, SP_LOCKED);
+
+  /* xtensa_compareset() should return either SP_UNLOCKED if the spinlock
+   * was locked or SP_LOCKED or possibly ~SP_UNLOCKED if the spinlock was
+   * not locked:
+   *
+   * "In the RE-2013.0 release and after, there is a slight change in the
+   *  semantics of the S32C1I instruction.  Nothing is changed about the
+   *  operation on memory.  In rare cases the resulting value in register
+   *  at can be different in this and later releases. The rule still holds
+   *  that memory has been written if and only if the register result
+   *  equals SCOMPARE1.
+   *
+   * "The difference is that in some cases where memory has not been
+   *  written, the instruction returns ~SCOMPARE1 instead of the current
+   *  value of memory.  Although this change can, in principle, affect
+   *  the operation of code, scanning all internal Cadence code produced
+   *  no examples where this change would change the operation of the
+   *  code."
+   *
+   * In any case, the return value of SP_UNLOCKED can be trusted and will
+   * always mean that the the spinlock was set.
+   */
+
+  return (prev == SP_UNLOCKED) ? SP_UNLOCKED : SP_LOCKED;
+}
+
+#endif /* CONFIG_SPINLOCK */
diff --git a/arch/xtensa/src/common/xtensa_timer.h b/arch/xtensa/src/common/xtensa_timer.h
new file mode 100644
index 0000000000000000000000000000000000000000..f44c1738ad4b540e9df0d197e710642dfeabffb6
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_timer.h
@@ -0,0 +1,148 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_timer.h
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from logic originally provided by Cadence Design Systems Inc.
+ * Copyright (c) 2003-2015 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ *******************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_COMMON_XTENSA_TIMER_H
+#define __ARCH_XTENSA_SRC_COMMON_XTENSA_TIMER_H
+
+#ifdef __ASSEMBLER__
+//#  include 
+#endif
+
+#include 
+#include 
+#include 
+
+/* Select timer to use for periodic tick, and determine its interrupt number
+ * and priority. User may specify a timer by defining XT_TIMER_INDEX with -D,
+ * in which case its validity is checked (it must exist in this core and must
+ * not be on a high priority interrupt - an error will be reported in invalid).
+ * Otherwise select the first low or medium priority interrupt timer available.
+ */
+
+#if XCHAL_NUM_TIMERS == 0
+
+#  error "This Xtensa configuration is unsupported, it has no timers."
+
+#else
+
+#ifndef XT_TIMER_INDEX
+#  if XCHAL_TIMER3_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
+#    if XCHAL_INT_LEVEL(XCHAL_TIMER3_INTERRUPT) <= XCHAL_EXCM_LEVEL
+#      undef  XT_TIMER_INDEX
+#      define XT_TIMER_INDEX    3
+#    endif
+#  endif
+#  if XCHAL_TIMER2_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
+#    if XCHAL_INT_LEVEL(XCHAL_TIMER2_INTERRUPT) <= XCHAL_EXCM_LEVEL
+#      undef  XT_TIMER_INDEX
+#      define XT_TIMER_INDEX    2
+#    endif
+#  endif
+#  if XCHAL_TIMER1_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
+#    if XCHAL_INT_LEVEL(XCHAL_TIMER1_INTERRUPT) <= XCHAL_EXCM_LEVEL
+#      undef  XT_TIMER_INDEX
+#      define XT_TIMER_INDEX    1
+#    endif
+#  endif
+#  if XCHAL_TIMER0_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
+#    if XCHAL_INT_LEVEL(XCHAL_TIMER0_INTERRUPT) <= XCHAL_EXCM_LEVEL
+#      undef  XT_TIMER_INDEX
+#      define XT_TIMER_INDEX    0
+#    endif
+#  endif
+#endif
+#ifndef XT_TIMER_INDEX
+#  error "There is no suitable timer in this Xtensa configuration."
+#endif
+
+#define XT_CCOMPARE             (CCOMPARE + XT_TIMER_INDEX)
+#define XT_TIMER_INTNUM         XCHAL_TIMER_INTERRUPT(XT_TIMER_INDEX)
+#define XT_TIMER_INTPRI         XCHAL_INT_LEVEL(XT_TIMER_INTNUM)
+#define XT_TIMER_INTEN          (1 << XT_TIMER_INTNUM)
+
+#if XT_TIMER_INTNUM == XTHAL_TIMER_UNCONFIGURED
+#  error "The timer selected by XT_TIMER_INDEX does not exist in this core."
+#elif XT_TIMER_INTPRI > XCHAL_EXCM_LEVEL
+#  error "The timer interrupt cannot be high priority (use medium or low)."
+#endif
+
+#endif /* XCHAL_NUM_TIMERS */
+
+/* Set processor clock frequency, used to determine clock divisor for timer
+ * tick. User should BE SURE TO ADJUST THIS for the Xtensa platform being
+ * used. If using a supported board via the board-independent API defined in
+ * xtbsp.h, this may be left undefined and frequency and tick divisor will
+ * be computed and cached during run-time initialization.
+ *
+ * NOTE ON SIMULATOR:
+ * Under the Xtensa instruction set simulator, the frequency can only be
+ * estimated because it depends on the speed of the host and the version of
+ * the simulator.  Also because it runs much slower than hardware, it is not
+ * possible to achieve real-time performance for most applications under the
+ * simulator. A frequency too low does not allow enough time between timer
+ * interrupts, starving threads.  To obtain a more convenient but non-real-
+ * time tick duration on the simulator, compile with xt-xcc option
+ * "-DXT_SIMULATOR".  Adjust this frequency to taste (it's not real-time
+ * anyway!).
+ */
+
+#if defined(XT_SIMULATOR) && !defined(BOARD_CLOCK_FREQUENCY)
+#  define BOARD_CLOCK_FREQUENCY
+#endif
+
+#if !defined(BOARD_CLOCK_FREQUENCY) && !defined(XT_BOARD)
+#  warning "BOARD_CLOCK_FREQUENCY must be defined for the target platform."
+#endif
+
+/* Default number of timer "ticks" per second (default 100 for 10ms tick).
+ * RTOS may define this in its own way (if applicable) in xtensa_rtos.h.
+ * User may redefine this to an optimal value for the application, either by
+ * editing this here or in xtensa_rtos.h, or compiling with xt-xcc option
+ * "-DXT_TICK_PER_SEC=" where  is a suitable number.
+ */
+
+#ifndef XT_TICK_PER_SEC
+#  define XT_TICK_PER_SEC   (1000000 / CONFIG_USEC_PER_TICK)
+#endif
+
+/* Derivation of clock divisor for timer tick and interrupt (one per tick). */
+
+#ifdef BOARD_CLOCK_FREQUENCY
+#  define XT_TICK_DIVISOR   (BOARD_CLOCK_FREQUENCY / XT_TICK_PER_SEC)
+#endif
+
+#ifndef __ASSEMBLER__
+extern unsigned _xt_tick_divisor;
+void _xt_tick_divisor_init(void);
+#endif
+
+#endif  /* __ARCH_XTENSA_SRC_COMMON_XTENSA_TIMER_H */
diff --git a/arch/xtensa/src/common/xtensa_udelay.c b/arch/xtensa/src/common/xtensa_udelay.c
new file mode 100644
index 0000000000000000000000000000000000000000..09d16d5d4de419399748e7a49c1e1d3bde2e5721
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_udelay.c
@@ -0,0 +1,113 @@
+/****************************************************************************
+ *  arch/xtensa/src/common/xtensa_udelay.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define CONFIG_BOARD_LOOPSPER100USEC ((CONFIG_BOARD_LOOPSPERMSEC+5)/10)
+#define CONFIG_BOARD_LOOPSPER10USEC  ((CONFIG_BOARD_LOOPSPERMSEC+50)/100)
+#define CONFIG_BOARD_LOOPSPERUSEC    ((CONFIG_BOARD_LOOPSPERMSEC+500)/1000)
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_udelay
+ *
+ * Description:
+ *   Delay inline for the requested number of microseconds.  NOTE:  Because
+ *   of all of the setup, several microseconds will be lost before the actual
+ *   timing looop begins.  Thus, the delay will always be a few microseconds
+ *   longer than requested.
+ *
+ *   *** NOT multi-tasking friendly ***
+ *
+ * ASSUMPTIONS:
+ *   The setting CONFIG_BOARD_LOOPSPERMSEC has been calibrated
+ *
+ ****************************************************************************/
+
+void up_udelay(useconds_t microseconds)
+{
+  volatile int i;
+
+  /* We'll do this a little at a time because we expect that the
+   * CONFIG_BOARD_LOOPSPERUSEC is very inaccurate during to truncation in
+   * the divisions of its calculation.  We'll use the largest values that
+   * we can in order to prevent significant error buildup in the loops.
+   */
+
+  while (microseconds > 1000)
+    {
+      for (i = 0; i < CONFIG_BOARD_LOOPSPERMSEC; i++)
+        {
+        }
+      microseconds -= 1000;
+    }
+
+  while (microseconds > 100)
+    {
+      for (i = 0; i < CONFIG_BOARD_LOOPSPER100USEC; i++)
+        {
+        }
+      microseconds -= 100;
+    }
+
+  while (microseconds > 10)
+    {
+      for (i = 0; i < CONFIG_BOARD_LOOPSPER10USEC; i++)
+        {
+        }
+      microseconds -= 10;
+    }
+
+  while (microseconds > 0)
+    {
+      for (i = 0; i < CONFIG_BOARD_LOOPSPERUSEC; i++)
+        {
+        }
+      microseconds--;
+    }
+}
diff --git a/arch/xtensa/src/common/xtensa_unblocktask.c b/arch/xtensa/src/common/xtensa_unblocktask.c
new file mode 100644
index 0000000000000000000000000000000000000000..40ecf73c56b8dbaaf6c1318c84ffe958f6760243
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_unblocktask.c
@@ -0,0 +1,175 @@
+/****************************************************************************
+ *  arch/xtensa/src/common/arm_unblocktask.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "group/group.h"
+#include "clock/clock.h"
+#include "xtensa.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_unblock_task
+ *
+ * Description:
+ *   A task is currently in an inactive task list
+ *   but has been prepped to execute.  Move the TCB to the
+ *   ready-to-run list, restore its context, and start execution.
+ *
+ * Inputs:
+ *   tcb: Refers to the tcb to be unblocked.  This tcb is
+ *     in one of the waiting tasks lists.  It must be moved to
+ *     the ready-to-run list and, if it is the highest priority
+ *     ready to run task, executed.
+ *
+ ****************************************************************************/
+
+void up_unblock_task(struct tcb_s *tcb)
+{
+  struct tcb_s *rtcb = this_task();
+
+  /* Verify that the context switch can be performed */
+
+  ASSERT((tcb->task_state >= FIRST_BLOCKED_STATE) &&
+         (tcb->task_state <= LAST_BLOCKED_STATE));
+
+  /* Remove the task from the blocked task list */
+
+  sched_removeblocked(tcb);
+
+  /* Add the task in the correct location in the prioritized
+   * ready-to-run task list
+   */
+
+  if (sched_addreadytorun(tcb))
+    {
+      /* The currently active task has changed! We need to do
+       * a context switch to the new task.
+       */
+
+      /* Update scheduler parameters */
+
+      sched_suspend_scheduler(rtcb);
+
+      /* Are we in an interrupt handler? */
+
+      if (CURRENT_REGS)
+        {
+          /* Yes, then we have to do things differently.
+           * Just copy the CURRENT_REGS into the OLD rtcb.
+           */
+
+          xtensa_savestate(rtcb->xcp.regs);
+
+          /* Restore the exception context of the rtcb at the (new) head
+           * of the ready-to-run task list.
+           */
+
+          rtcb = this_task();
+
+          /* Update scheduler parameters */
+
+          sched_resume_scheduler(rtcb);
+
+          /* Then switch contexts.  Any necessary address environment
+           * changes will be made when the interrupt returns.
+           */
+
+          xtensa_restorestate(rtcb->xcp.regs);
+        }
+
+      /* We are not in an interrupt handler.  Copy the user C context
+       * into the TCB of the task that was previously active.  if
+       * up_saveusercontext returns a non-zero value, then this is really the
+       * previously running task restarting!
+       */
+
+      else if (!xtensa_context_save(rtcb->xcp.regs))
+        {
+#if XCHAL_CP_NUM > 0
+          /* Save the co-processor state in in the suspended thread's co-
+           * processor save area.
+           */
+
+          xtensa_coproc_savestate(&rtcb->xcp.cpstate);
+#endif
+
+          /* Restore the exception context of the new task that is ready to
+           * run (probably tcb).  This is the new rtcb at the head of the
+           * ready-to-run task list.
+           */
+
+          rtcb = this_task();
+
+#if XCHAL_CP_NUM > 0
+          /* Set up the co-processor state for the newly started thread. */
+
+          xtensa_coproc_restorestate(&rtcb->xcp.cpstate);
+#endif
+
+#ifdef CONFIG_ARCH_ADDRENV
+          /* Make sure that the address environment for the previously
+           * running task is closed down gracefully (data caches dump,
+           * MMU flushed) and set up the address environment for the new
+           * thread at the head of the ready-to-run list.
+           */
+
+          (void)group_addrenv(rtcb);
+#endif
+          /* Update scheduler parameters */
+
+          sched_resume_scheduler(rtcb);
+
+          /* Then switch contexts */
+
+          xtensa_context_restore(rtcb->xcp.regs);
+        }
+    }
+}
diff --git a/arch/xtensa/src/common/xtensa_user_handler.S b/arch/xtensa/src/common/xtensa_user_handler.S
new file mode 100644
index 0000000000000000000000000000000000000000..39c9eb1c7f96c7a58dd416bccb39430fe8524eac
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_user_handler.S
@@ -0,0 +1,485 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_user_handler.S
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from logic originally provided by Cadence Design Systems Inc.
+ *
+ *   Copyright (c) 2006-2015 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ ****************************************************************************/
+
+	.file	"xtensa_user_handler.S"
+
+/* NOTES on the use of 'call0' for long jumps instead of 'j':
+ *
+ *  1. This file should be assembled with the -mlongcalls option to xt-xcc.
+ *
+ *  2. The -mlongcalls compiler option causes 'call0 dest' to be expanded to
+ *     a sequence 'l32r a0, dest' 'callx0 a0' which works regardless of the
+ *     distance from the call to the destination. The linker then relaxes
+ *     it back to 'call0 dest' if it determines that dest is within range.
+ *     This allows more flexibility in locating code without the performance
+ *     overhead of the 'l32r' literal data load in cases where the destination
+ *     is in range of 'call0'. There is an additional benefit in that 'call0'
+ *     has a longer range than 'j' due to the target being word-aligned, so
+ *     the 'l32r' sequence is less likely needed.
+ *
+ *  3. The use of 'call0' with -mlongcalls requires that register a0 not be
+ *     live at the time of the call, which is always the case for a function
+ *     call but needs to be ensured if 'call0' is used as a jump in lieu of 'j'.
+ *
+ *  4. This use of 'call0' is independent of the C function call ABI.
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include "chip_macros.h"
+
+/****************************************************************************
+ * Assembly Language Macros
+ ****************************************************************************/
+
+/****************************************************************************
+ * Macro: ps_setup
+ *
+ * Description:
+ *   Set up PS for C, enable interrupts above this level and clear EXCM.
+ *
+ * Entry Conditions:
+ *   level - interrupt level
+ *   tmp   - scratch register
+ *
+ * Side Effects:
+ *   PS and scratch register modified
+ *
+ * Assumptions:
+ *   - PS.EXCM = 1, C calling disabled
+ *
+ ****************************************************************************/
+
+	.macro	ps_setup	level tmp
+
+#if 0 /* Nested interrupts no yet supported */
+#  ifdef __XTENSA_CALL0_ABI__
+	/* Disable interrupts at level and below */
+
+	movi	\tmp, PS_INTLEVEL(\level) | PS_UM
+#  else
+	movi	\tmp, PS_INTLEVEL(\level) | PS_UM | PS_WOE
+#  endif
+#else
+#  ifdef __XTENSA_CALL0_ABI__
+	/* Disable all low- and medium-priority interrupts.  Nested are not yet
+	 * supported.
+	 */
+
+	movi	\tmp, PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM
+#  else
+	movi	\tmp, PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE
+#  endif
+#endif
+
+	wsr		\tmp, PS
+	rsync
+
+	.endm
+
+/****************************************************************************
+ * Waypoints
+ ****************************************************************************/
+
+/* Insert some waypoints for jumping beyond the signed 8-bit range of
+ * conditional branch instructions, so the conditional branchces to specific
+ * exception handlers are not taken in the mainline. Saves some cycles in the
+ * mainline.
+ */
+
+	.section HANDLER_SECTION, "ax"
+
+	.align	4
+_xtensa_to_level1_handler:
+	call0	_xtensa_level1_handler			/* Jump to level1 interrupt handler */
+
+#if XCHAL_HAVE_WINDOWED
+	.align	4
+_xtensa_to_alloca_handler:
+	call0	_xtensa_alloca_handler			/* Jump to window vectors section */
+#endif
+
+	.align	4
+_xtensa_to_syscall_handler:
+	call0	_xtensa_syscall_handler			/* Jump to syscall exception handler */
+
+#ifdef CONFIG_XTENSA_CP_LAZY
+#if XCHAL_CP_NUM > 0
+	.align	4
+_xtensa_to_coproc_handler:
+	call0	_xtensa_coproc_handler			/* Jump to copressor exception handler */
+#endif
+#endif /* CONFIG_XTENSA_CP_LAZY */
+
+/****************************************************************************
+ * Name: _xtensa_user_handler
+ *
+ * Description:
+ *   User exception handler.
+ *
+ * Entry Conditions:
+ *   A0 saved in EXCSAVE_1.  All other register as upon exception.
+ *
+ ****************************************************************************/
+
+	.type	_xtensa_user_handler, @function
+	.global	_xtensa_user_handler
+	.align	4
+
+_xtensa_user_handler:
+
+	/* If level 1 interrupt then jump to the dispatcher */
+
+	rsr		a0, EXCCAUSE
+	beqi	a0, EXCCAUSE_LEVEL1INTERRUPT, _xtensa_to_level1_handler
+
+#ifdef CONFIG_XTENSA_CP_LAZY
+#if XCHAL_CP_NUM > 0
+	/* Handle any coprocessor exceptions. Rely on the fact that exception
+	 * numbers above EXCCAUSE_CP0_DISABLED all relate to the coprocessors.
+	 */
+
+	bgeui	a0, EXCCAUSE_CP0_DISABLED, _xtensa_to_coproc_handler
+#endif
+#endif /* CONFIG_XTENSA_CP_LAZY */
+
+	/* Handle alloca and syscall exceptions */
+
+#if XCHAL_HAVE_WINDOWED
+	beqi	a0, EXCCAUSE_ALLOCA, _xtensa_to_alloca_handler
+#endif
+	beqi	a0, EXCCAUSE_SYSCALL, _xtensa_to_syscall_handler
+
+	/* Handle all other exceptions. All can have user-defined handlers. */
+	/* NOTE: we'll stay on the user stack for exception handling. */
+
+	/* Allocate exception frame and save minimal context. */
+
+	mov		a0, sp							/* sp == a1 */
+	addi	sp, sp, -(4 * XCPTCONTEXT_SIZE)	/* Allocate interrupt stack frame */
+	s32i	a0, sp, (4 * REG_A1)			/* Save pre-interrupt SP */
+	rsr		a0, EPS							/* Save interruptee's PS */
+	s32i	a0, sp, (4 * REG_PS)
+	rsr		a0, EPC_1						/* Save interruptee's PC */
+	s32i	a0, sp, (4 * REG_PC)
+	rsr		a0, EXCSAVE_1					/* Save interruptee's a0 */
+	s32i	a0, sp, (4 * REG_A0)
+
+	/* Save rest of interrupt context. */
+
+	s32i	a2, sp, (4 * REG_A2)
+	mov		a2, sp							/* Address of state save on stack */
+	call0	_xtensa_context_save			/* Save full register state */
+
+	/* Save exc cause and vaddr into exception frame */
+
+	rsr		a0, EXCCAUSE
+	s32i	a0, sp, (4 * REG_EXCCAUSE)
+	rsr		a0, EXCVADDR
+	s32i	a0, sp, (4 * REG_EXCVADDR)
+
+	/* Set up PS for C, reenable hi-pri interrupts, and clear EXCM. */
+
+#ifdef __XTENSA_CALL0_ABI__
+	movi	a0, PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM
+#else
+	movi	a0, PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE
+#endif
+	wsr		a0, PS
+
+	/* Call xtensa_user, passing both the EXCCAUSE and a pointer to the
+	 * beginning of the register save area.
+	 */
+
+#ifdef __XTENSA_CALL0_ABI__
+	rsr		a2, EXCCAUSE					/* Argument 1 (a2) = EXCCAUSE */
+	mov		a3, sp							/* Argument 2 (a2) = pointer to register save area */
+	calx0	xtensa_user						/* Call xtensa_user */
+#else
+	rsr		a6, EXCCAUSE					/* Argument 1 (a2) = EXCCAUSE */
+	mov		a7, sp							/* Argument 2 (a2) = pointer to register save area */
+	call4	xtensa_user						/* Call xtensa_user */
+#endif
+
+	/* xtensa_user should not return */
+
+1:	j		1b
+
+/****************************************************************************
+ * Name: _xtensa_syscall_handler
+ *
+ * Description:
+ *   Syscall Exception Handler (jumped to from User Exception Handler).
+ *   Syscall 0 is required to spill the register windows (no-op in Call 0 ABI).
+ *   Only syscall 0 is handled here. Other syscalls return -1 to caller in a2.
+ *
+ * Entry Conditions:
+ *   A0 saved in EXCSAVE_1.  All other register as upon exception.
+ *
+ ****************************************************************************/
+
+	.section HANDLER_SECTION, "ax"
+	.type       _xtensa_syscall_handler, @function
+	.align      4
+
+_xtensa_syscall_handler:
+
+	/* Allocate stack frame and save A0, A1, and PS */
+
+	mov		a0, sp							/* sp == a1 */
+	addi	sp, sp, -(4 * XCPTCONTEXT_SIZE)	/* Allocate interrupt stack frame */
+	s32i	a0, sp, (4 * REG_A1)			/* Save pre-interrupt SP */
+	rsr		a0, EPS							/* Save interruptee's PS */
+	s32i	a0, sp, (4 * REG_PS)
+	rsr		a0, EXCSAVE_1					/* Save interruptee's a0 */
+	s32i	a0, sp, (4 * REG_A0)
+
+	/* Save EPC */
+
+#ifdef XCHAL_HAVE_LOOPS
+	/* Save A2 and A3 now to give us some registers to work with.  A0, A2
+	 * and A3 are now available.  NOTE that A3 will get saved again in
+	 * _xtensa_context_save().
+	 */
+
+	s32i	a2, sp, (4 * REG_A2)			/* Save interruptee's A2 */
+	s32i	a2, sp, (4 * REG_A2)			/* Save interruptee's A2 */
+
+	/* Get the interruptee's PC and skip over the 'syscall' instruction.
+	 * If it's at the end of a zero-overhead loop and it's not on the last
+	 * iteration, decrement loop counter and skip to beginning of loop.
+	 */
+
+	rsr		a2, EPC_1						/* a2 = PC of 'syscall' */
+	addi	a3, a2, 3						/* Increment PC */
+
+	rsr		a0, LEND						/* Skip if PC != LEND */
+	bne		a3, a0, 1f
+
+	rsr		a0, LCOUNT						/* Skip if LCOUNT == 0 */
+	beqz	a0, 1f
+
+	addi	a0, a0, -1						/* Decrement LCOUNT */
+	rsr		a3, LBEG						/* Set PC = LBEG */
+	wsr		a0, LCOUNT						/* Save the new LCOUNT */
+
+1:
+	wsr		a3, EPC_1						/* Update PC */
+	s32i	a3, sp, (4 * REG_PC)
+
+#else
+	/* Get the interruptee's PC and skip over the 'syscall' instruction. */
+
+	rsr		a1, EPC_1						/* a2 = PC of 'syscall' */
+	addi	a0, a1, 3						/* ++PC */
+
+	wsr		a0, EPC_1						/* Update PC */
+	s32i	a0, sp, (4 * REG_PC)
+
+	/* Save a2 which will hold the argument to _xtensa_context_save*/
+
+	s32i	a2, sp, (4 * REG_A2)			/* Save interruptee's A2 */
+#endif
+
+	/* Save rest of interrupt context. */
+
+	mov		a2, sp							/* Address of state save on stack */
+	call0	_xtensa_context_save			/* Save full register state */
+
+	/* Set up PS for C, enable interrupts above this level and clear EXCM. */
+
+	ps_setup	1 a0
+
+	/* Dispatch the sycall as with other interrupts. */
+
+	mov		a12, sp							/* a12 = address of register save area */
+
+#ifdef __XTENSA_CALL0_ABI__
+	movi	a2, XTENSA_IRQ_SYSCALL			/* Argument 1: IRQ number */
+	mov		a3, sp							/* Argument 2: Top of stack = register save area */
+	call0	xtensa_irq_dispatch				/* Call xtensa_int_decode */
+
+	/* On return from xtensa_irq_dispatch, a2 will contain the address of the new
+	 * register save area.  Usually this would be the same as the current SP.
+	 * But in the event of a context switch, A2 will instead refer to the TCB
+	 * register save area.
+	 */
+
+#else
+	movi	a6, XTENSA_IRQ_SYSCALL			/* Argument 1: IRQ number */
+	mov		a7, sp							/* Argument 2: Top of stack = register save area */
+	call4	xtensa_irq_dispatch				/* Call xtensa_int_decode */
+
+	/* On return from xtensa_irq_dispatch, a5 will contain the address of the new
+	 * register save area.  Usually this would be the same as the current SP.
+	 * But in the event of a context switch, A2 will instead refer to the TCB
+	 * register save area.
+	 */
+
+	mov		a2, a6							/* Switch to the new register save area */
+#endif
+
+	/* Restore registers in preparation to return from interrupt */
+
+	call0	_xtensa_context_restore			/* (Preserves a2) */
+
+	/* Restore only level-specific regs (the rest were already restored) */
+
+	l32i	a0, a2, (4 * REG_PS)			/* Retrieve interruptee's PS */
+	wsr		a0, PS
+	l32i	a0, a2, (4 * REG_PC)			/* Retrieve interruptee's PC */
+	wsr		a0, EPC_1
+	l32i	a0, a2, (4 * REG_A0)			/* Retrieve interruptee's A0 */
+	l32i	sp, a2, (4 * REG_A1)			/* Remove interrupt stack frame */
+	l32i	a2, a2, (4 * REG_A2)			/* Retrieve interruptee's A2 */
+	rsync									/* Ensure EPS and EPC written */
+
+	/* Return from exception. RFE returns from either the UserExceptionVector
+	 * or the KernelExceptionVector.  RFE sets PS.EXCM back to 0, and then
+	 * jumps to the address in EPC[1]. PS.UM and PS.WOE are left unchanged.
+	 */
+
+	rfe
+
+/****************************************************************************
+ * Name: _xtensa_coproc_handler
+ *
+ * Description:
+ *   Co-Processor Exception Handler (jumped to from User Exception Handler).
+ *   This logic handlers handles the User Coprocessor[n]Disabled exceptions,
+ *   n=0-7.  A User Coprocessor[n]Disabled exception occurs when if logic
+ *   executes a co-processor n instruction while coprocessor n is disabled.
+ *
+ *   This exception allows for lazy context switch of co-processor state:
+ *   CPENABLE can be cleared on each context switch.  When logic on the
+ *   thread next accesses the co-processor, this exception will occur and
+ *   the exception handler may then enable the co-processor on behalf of
+ *   the thread.
+ *
+ *   NuttX does not currently implement this lazy co-process enable.  Rather,
+ *   NuttX follows the model:
+ *
+ *   1. A set of co-processors may be enable when each thread starts as
+ *      determined by CONFIG_XTENSA_CP_INITSET.
+ *   2. Additional co-processors may be enabled for the thread by explicitly
+ *      setting the CPENABLE register when the thread starts.
+ *   3. Co-processor state, including CPENABLE, is saved an restored on each
+ *      context switch.
+ *   4. Any Coprocessor[n]Disabled exceptions result in a system PANIC.
+ *
+ *   These exceptions are generated by co-processor instructions, which are
+ *   only allowed in thread code (not in interrupts or kernel code).  This
+ *   restriction is deliberately imposed to reduce the burden of state-save/
+ *   restore in interrupts.
+ *
+ * Entry Conditions:
+ *   A0 saved in EXCSAVE_1.  All other register as upon exception.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_XTENSA_CP_LAZY
+/* Lazy co-processor restoration is not implemented.  Below, the logic simply
+ * calls xtensa_user() which will crash the system with an unhandled error
+ * Duplicates logic above.
+ */
+
+#error Lazy co-processor restoration is not implemented
+
+#if XCHAL_CP_NUM > 0
+	.type	_xtensa_coproc_handler, @function
+	.align	4
+
+_xtensa_coproc_handler:
+
+	/* For now, just panic */
+
+	mov		a0, sp							/* sp == a1 */
+	addi	sp, sp, -(4 * XCPTCONTEXT_SIZE)	/* Allocate interrupt stack frame */
+	s32i	a0, sp, (4 * REG_A1)			/* Save pre-interrupt SP */
+	rsr		a0, EPS							/* Save interruptee's PS */
+	s32i	a0, sp, (4 * REG_PS)
+	rsr		a0, EPC_1						/* Save interruptee's PC */
+	s32i	a0, sp, (4 * REG_PC)
+	rsr		a0, EXCSAVE_1					/* Save interruptee's a0 */
+	s32i	a0, sp, (4 * REG_A0)
+
+	/* Save rest of interrupt context. */
+
+	s32i	a2, sp, (4 * REG_A2)
+	mov		a2, sp							/* Address of state save on stack */
+	call0	_xtensa_context_save			/* Save full register state */
+
+	/* Save exc cause and vaddr into exception frame */
+
+	rsr		a0, EXCCAUSE
+	s32i	a0, sp, (4 * REG_EXCCAUSE)
+	rsr		a0, EXCVADDR
+	s32i	a0, sp, (4 * REG_EXCVADDR)
+
+	/* Set up PS for C, reenable hi-pri interrupts, and clear EXCM. */
+
+#ifdef __XTENSA_CALL0_ABI__
+	movi	a0, PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM
+#else
+	movi	a0, PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE
+#endif
+	wsr		a0, PS
+
+	/* Call xtensa_user, passing both the EXCCAUSE and a pointer to the
+	 * beginning of the register save area.
+	 */
+
+#ifdef __XTENSA_CALL0_ABI__
+	rsr		a2, EXCCAUSE					/* Argument 1 (a2) = EXCCAUSE */
+	mov		a3, sp							/* Argument 2 (a2) = pointer to register save area */
+	calx0	xtensa_user						/* Call xtensa_user */
+#else
+	rsr		a6, EXCCAUSE					/* Argument 1 (a2) = EXCCAUSE */
+	mov		a7, sp							/* Argument 2 (a2) = pointer to register save area */
+	call4	xtensa_user						/* Call xtensa_user */
+#endif
+
+	/* xtensa_user should not return */
+
+1:	j		1b
+
+#endif /* XCHAL_CP_NUM */
+#endif /* CONFIG_XTENSA_CP_LAZY */
diff --git a/arch/xtensa/src/common/xtensa_usestack.c b/arch/xtensa/src/common/xtensa_usestack.c
new file mode 100644
index 0000000000000000000000000000000000000000..0b5db031e91d93d942f11ab484edadb36b066072
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_usestack.c
@@ -0,0 +1,144 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_usestack.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "xtensa.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* XTENSA requires at least a 4-byte stack alignment.  For floating point use,
+ * however, the stack must be aligned to 8-byte addresses.
+ */
+
+#ifdef CONFIG_LIBC_FLOATINGPOINT
+#  define STACK_ALIGNMENT   8
+#else
+#  define STACK_ALIGNMENT   4
+#endif
+
+/* Stack alignment macros */
+
+#define STACK_ALIGN_MASK    (STACK_ALIGNMENT-1)
+#define STACK_ALIGN_DOWN(a) ((a) & ~STACK_ALIGN_MASK)
+#define STACK_ALIGN_UP(a)   (((a) + STACK_ALIGN_MASK) & ~STACK_ALIGN_MASK)
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_use_stack
+ *
+ * Description:
+ *   Setup up stack-related information in the TCB using pre-allocated stack
+ *   memory.  This function is called only from task_init() when a task or
+ *   kernel thread is started (never for pthreads).
+ *
+ *   The following TCB fields must be initialized:
+ *
+ *   - adj_stack_size: Stack size after adjustment for hardware,
+ *     processor, etc.  This value is retained only for debug
+ *     purposes.
+ *   - stack_alloc_ptr: Pointer to allocated stack
+ *   - adj_stack_ptr: Adjusted stack_alloc_ptr for HW.  The
+ *     initial value of the stack pointer.
+ *
+ * Inputs:
+ *   - tcb: The TCB of new task
+ *   - stack_size:  The allocated stack size.
+ *
+ *   NOTE:  Unlike up_stack_create() and up_stack_release, this function
+ *   does not require the task type (ttype) parameter.  The TCB flags will
+ *   always be set to provide the task type to up_use_stack() if it needs
+ *   that information.
+ *
+ ****************************************************************************/
+
+int up_use_stack(struct tcb_s *tcb, void *stack, size_t stack_size)
+{
+  size_t top_of_stack;
+  size_t size_of_stack;
+
+  /* Is there already a stack allocated? */
+
+  if (tcb->stack_alloc_ptr)
+    {
+      /* Yes.. Release the old stack allocation */
+
+      up_release_stack(tcb, tcb->flags & TCB_FLAG_TTYPE_MASK);
+    }
+
+  /* Save the new stack allocation */
+
+  tcb->stack_alloc_ptr = stack;
+
+  /* XTENSA uses a push-down stack:  the stack grows toward loweraddresses in
+   * memory.  The stack pointer register, points to the lowest, valid work
+   * address (the "top" of the stack).  Items on the stack are referenced
+   * as positive word offsets from sp.
+   */
+
+  top_of_stack = (uint32_t)tcb->stack_alloc_ptr + stack_size - 4;
+
+  /* The XTENSA stack must be aligned at word (4 byte) or double word (8 byte)
+   * boundaries. If necessary top_of_stack must be rounded down to the
+   * next boundary
+   */
+
+  top_of_stack = STACK_ALIGN_DOWN(top_of_stack);
+  size_of_stack = top_of_stack - (uint32_t)tcb->stack_alloc_ptr + 4;
+
+  /* Save the adjusted stack values in the struct tcb_s */
+
+  tcb->adj_stack_ptr  = (uint32_t *)top_of_stack;
+  tcb->adj_stack_size = size_of_stack;
+
+  return OK;
+}
diff --git a/arch/xtensa/src/common/xtensa_vectors.S b/arch/xtensa/src/common/xtensa_vectors.S
new file mode 100644
index 0000000000000000000000000000000000000000..9dfc4869f671a924fa749737f860ea81326e1c2b
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_vectors.S
@@ -0,0 +1,353 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_vectors.S
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from logic originally provided by Cadence Design Systems Inc.
+ *
+ *   Copyright (c) 2006-2015 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ ****************************************************************************/
+
+	.file	"xtensa_vectors.S"
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include "xtensa.h"
+#include "xtensa_abi.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: _xtensa_level[n]_vector, n=2..6
+ *
+ * Description:
+ *   Xtensa medium/nigh priority interrupt vectors.  Each vector goes at a
+ *   predetermined location according to the Xtensa hardware configuration,
+ *   which is ensured by its placement in a special section known to the
+ *   NuttX linker script.  The vector logic performs the minimum necessary
+ *   operations before jumping to the handler.
+ *
+ ****************************************************************************/
+
+#if XCHAL_EXCM_LEVEL >= 2
+	.begin		literal_prefix .xtensa_level2_vector
+	.section	.xtensa_level2_vector.text, "ax"
+	.global		_xtensa_level2_vector
+	.global		_xtensa_level2_handler
+	.type		_xtensa_level2_vector, @function
+	.align		4
+
+_xtensa_level2_vector:
+	wsr			a0, EXCSAVE_2			/* Preserve a0 */
+	call0		_xtensa_level2_handler	/* Call level 2 interrupt handling */
+
+	/* Never returns here - call0 is used as a jump */
+
+	.end		literal_prefix
+
+	.size	_xtensa_level2_vector, . - _xtensa_level2_vector
+#endif
+
+#if XCHAL_EXCM_LEVEL >= 3
+	.begin		literal_prefix .xtensa_level3_vector
+	.section	.xtensa_level3_vector.text, "ax"
+	.global		_xtensa_level3_vector
+	.global		_xtensa_level3_handler
+	.type		_xtensa_level3_vector, @function
+	.align		4
+
+_xtensa_level3_vector:
+	wsr			a0, EXCSAVE_3			/* Preserve a0 */
+	call0		_xtensa_level3_handler	/* Call level 3 interrupt handling */
+
+	/* Never returns here - call0 is used as a jump */
+
+	.end		literal_prefix
+
+	.size	_xtensa_level3_vector, . - _xtensa_level3_vector
+#endif
+
+#if XCHAL_EXCM_LEVEL >= 4
+	.begin		literal_prefix .xtensa_level4_vector
+	.section	.xtensa_level4_vector.text, "ax"
+	.global		_xtensa_level4_vector
+	.global		_xtensa_level4_handler
+	.type		_xtensa_level4_vector, @function
+	.align		4
+
+_xtensa_level4_vector:
+	wsr			a0, EXCSAVE_4			/* Preserve a0 */
+	call0		_xtensa_level4_handler	/* Call level 5 interrupt handling */
+
+	/* Never returns here - call0 is used as a jump */
+
+	.end		literal_prefix
+
+	.size	_xtensa_level5_vector, . - _xtensa_level5_vector
+#endif
+
+#if XCHAL_EXCM_LEVEL >= 5
+	.begin		literal_prefix .xtensa_level5_vector
+	.section	.xtensa_level5_vector.text, "ax"
+	.global		_xtensa_level5_vector
+	.global		_xtensa_level5_handler
+	.type		_xtensa_level5_vector, @function
+	.align		4
+
+_xtensa_level5_vector:
+	wsr			a0, EXCSAVE_5			/* Preserve a0 */
+	call0		_xtensa_level5_handler	/* Call level 5 interrupt handling */
+
+	/* Never returns here - call0 is used as a jump */
+
+	.size		_xtensa_level5_vector, . - _xtensa_level5_vector
+	.end		literal_prefix
+#endif
+
+#if XCHAL_EXCM_LEVEL >= 6
+	.begin		literal_prefix .xtensa_level6_vector
+	.section	.xtensa_level6_vector.text, "ax"
+	.global		_xtensa_level6_vector
+	.global		_xtensa_level6_handler
+	.type		_xtensa_level6_vector, @function
+	.align		4
+
+_xtensa_level6_vector:
+	wsr			a0, EXCSAVE_6			/* Preserve a0 */
+	call0		_xtensa_level6_handler	/* Call level 6 interrupt handling */
+
+	/* Never returns here - call0 is used as a jump */
+
+	.size		_xtensa_level6_vector, . - _xtensa_level6_vector
+	.end		literal_prefix
+#endif
+
+/****************************************************************************
+ * Exception Vectors (except User, Co-processor and window exception
+ * vectors).
+ *
+ * Each vector goes at a predetermined location according to the Xtensa
+ * hardware configuration, which is ensured by its placement in a special
+ * section known to the Xtensa linker support package (LSP). It performs
+ * the minimum necessary before jumping to the handler in the .text section.
+ *
+ * The corresponding handler goes in the normal .text section. It sets up
+ * the appropriate stack frame, saves a few vector-specific registers and
+ * calls _xtensa_panic() to save the rest of the interrupted context
+ * and enter the NuttX panic handler
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: _xtensa_nmi_vector
+ *
+ * Description:
+ *   NMI Exception
+ *
+ ****************************************************************************/
+
+#if XCHAL_HAVE_NMI
+	.begin		literal_prefix .nmi_vector
+	.section	.nmi_vector.text, "ax"
+	.global		_xtensa_nmi_vector
+	.type		_xtensa_nmi_vector, @function
+	.align		4
+
+_xtensa_nmi_vector:
+
+#if 1
+	/* For now, just panic */
+
+	wsr		a0, EXCSAVE + XCHAL_NMILEVEL	/* Preserve a0 */
+
+	mov		a0, sp							/* sp == a1 */
+	addi	sp, sp, -(4 * XCPTCONTEXT_SIZE)	/* Allocate interrupt stack frame */
+	s32i	a0, sp, (4 * REG_A1)			/* Save pre-interrupt SP */
+	rsr		a0, EPS + XCHAL_NMILEVEL		/* Save interruptee's PS */
+	s32i	a0, sp, (4 * REG_PS)
+	rsr		a0, EPC_2						/* Save interruptee's PC */
+	s32i	a0, sp, (4 * REG_PC)
+	rsr		a0, EXCSAVE + XCHAL_NMILEVEL	/* Save interruptee's a0 */
+	s32i	a0, sp, (4 * REG_A0)
+
+	s32i	a2, sp, (4 * REG_A2)
+	movi	a2, XTENSA_NMI_EXCEPTION		/* Argument 1: Error code */
+	call0	_xtensa_panic					/* Does not return */
+
+#else
+	/* Add high priority non-maskable interrupt (NMI) handler code here. */
+
+	rfi		XCHAL_NMILEVEL
+
+#endif
+
+	.size		_xtensa_nmi_vector, . - _xtensa_nmi_vector
+	.end		literal_prefix
+
+#endif /* XCHAL_HAVE_NMI */
+
+/****************************************************************************
+ * Name: _debug_exception_vector
+ *
+ * Description:
+ *   Debug exception vector
+ *
+ ****************************************************************************/
+
+#if XCHAL_HAVE_DEBUG
+	.begin		literal_prefix .debug_exception_vector
+	.section	.debug_exception_vector.text, "ax"
+	.global		_debug_exception_vector
+	.align		4
+
+_debug_exception_vector:
+
+	mov		a0, sp							/* sp == a1 */
+	addi	sp, sp, -(4 * XCPTCONTEXT_SIZE)	/* Allocate interrupt stack frame */
+	s32i	a0, sp, (4 * REG_A1)			/* Save pre-interrupt SP */
+	rsr		a0, EPS + XCHAL_DEBUGLEVEL		/* Save interruptee's PS */
+	s32i	a0, sp, (4 * REG_PS)
+	rsr		a0, EPC + XCHAL_DEBUGLEVEL		/* Save interruptee's PC */
+	s32i	a0, sp, (4 * REG_PC)
+	rsr		a0, EXCSAVE + XCHAL_DEBUGLEVEL	/* Save interruptee's a0 */
+	s32i	a0, sp, (4 * REG_A0)
+
+	s32i	a2, sp, (4 * REG_A2)
+	movi	a2, XTENSA_DEBUG_EXCEPTION		/* Argument 1: Error code */
+	call0	_xtensa_panic					/* Does not return */
+
+	.end	literal_prefix
+
+#endif /* XCHAL_HAVE_DEBUG */
+
+/****************************************************************************
+ * Name: _double_exception_vector
+ *
+ * Description:
+ *   Double Exception Vector. Double exceptions are not a normal occurrence.
+ *   They indicate a bug of some kind.
+ *
+ ****************************************************************************/
+
+#ifdef XCHAL_DOUBLEEXC_VECTOR_VADDR
+	.begin		literal_prefix .double_exception_vector
+	.section	.double_exception_vector.text, "ax"
+	.global		_double_exception_vector
+	.align		4
+
+_double_exception_vector:
+
+#if XCHAL_HAVE_DEBUG
+	break	1, 4							/* Unhandled double exception */
+#endif
+
+	mov		a0, sp							/* sp == a1 */
+	addi	sp, sp, -(4 * XCPTCONTEXT_SIZE)	/* Allocate interrupt stack frame */
+	s32i	a0, sp, (4 * REG_A1)			/* Save pre-interrupt SP */
+	rsr		a0, EPS							/* Save interruptee's PS -- REVISIT */
+	s32i	a0, sp, (4 * REG_PS)
+	rsr		a0, DEPC						/* Save interruptee's PC */
+	s32i	a0, sp, (4 * REG_PC)
+	rsr		a0, EXCSAVE						/* Save interruptee's a0 -- REVISIT */
+	s32i	a0, sp, (4 * REG_A0)
+
+	rsr		a0, EXCCAUSE					/* Save the EXCCAUSE register */
+	s32i	a0, sp, (4 * REG_EXCCAUSE)
+	rsr		a0, EXCVADDR					/* Save the EXCVADDR register */
+	s32i	a0, sp, (4 * REG_EXCVADDR)
+
+	s32i	a2, sp, (4 * REG_A2)
+	movi	a2, XTENSA_DOUBLE_EXCEPTION		/* Argument 1: Error code */
+	call0	_xtensa_panic					/* Does not return */
+
+	.end	literal_prefix
+
+#endif /* XCHAL_DOUBLEEXC_VECTOR_VADDR */
+
+/****************************************************************************
+ * Name: _kernel_exception_vector
+ *
+ * Description:
+ *   Kernel Exception (including Level 1 Interrupt from kernel mode).
+ *
+ ****************************************************************************/
+
+	.begin		literal_prefix .kernel_exception_vector
+	.section	.kernel_exception_vector.text, "ax"
+	.global		_kernel_exception_vector
+	.align		4
+
+_kernel_exception_vector:
+
+#if XCHAL_HAVE_DEBUG
+	break	1, 0							/* Unhandled kernel exception */
+#endif
+
+	mov		a0, sp							/* sp == a1 */
+	addi	sp, sp, -(4 * XCPTCONTEXT_SIZE)	/* Allocate interrupt stack frame */
+	s32i	a0, sp, (4 * REG_A1)			/* Save pre-interrupt SP */
+	rsr		a0, EPS							/* Save interruptee's PS */
+	s32i	a0, sp, (4 * REG_PS)
+	rsr		a0, EPC_1						/* Save interruptee's PC */
+	s32i	a0, sp, (4 * REG_PC)
+	rsr		a0, EXCSAVE_1					/* Save interruptee's a0 */
+	s32i	a0, sp, (4 * REG_A0)
+
+	s32i	a2, sp, (4 * REG_A2)
+	movi	a2, XTENSA_KERNEL_EXCEPTION		/* Argument 1: Error code */
+	call0	_xtensa_panic					/* Does not return */
+
+	.end	literal_prefix
+
+/****************************************************************************
+ * Name: _user_exception_vector
+ *
+ * Description:
+ *   User Exception (including Level 1 Interrupt from user mode).
+ *
+ ****************************************************************************/
+
+	.begin		literal_prefix .user_exception_vector
+	.section	.user_exception_vector.text, "ax"
+	.global		_user_exception_vector
+	.type		_user_exception_vector, @function
+	.align		4
+
+_user_exception_vector:
+
+	wsr		a0, EXCSAVE_1					/* Preserve a0 */
+	call0	_xtensa_user_handler			/* And jump to user exception handler */
+
+	.end	literal_prefix
diff --git a/arch/xtensa/src/common/xtensa_window_vector.S b/arch/xtensa/src/common/xtensa_window_vector.S
new file mode 100644
index 0000000000000000000000000000000000000000..853e1210c3e6ecd0d9453fc2be6efc069aa34abe
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_window_vector.S
@@ -0,0 +1,277 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_window_vector.S
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from logic originally provided by Cadence Design Systems Inc.
+ *
+ *   Copyright (c) 2006-2015 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ ****************************************************************************/
+
+	.file	"xtensa_vectors.S"
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+/****************************************************************************
+ * Window Vectors
+ ****************************************************************************/
+
+/* WINDOW OVERFLOW AND UNDERFLOW EXCEPTION VECTORS AND ALLOCA EXCEPTION HANDLER
+ *
+ * Here is the code for each window overflow/underflow exception vector and
+ * (interspersed) efficient code for handling the alloca exception cause.
+ * Window exceptions are handled entirely in the vector area and are very
+ * tight for performance. The alloca exception is also handled entirely in
+ * the window vector area so comes at essentially no cost in code size.
+ * Users should never need to modify them and Cadence Design Systems recommends
+ * they do not.
+ *
+ * Window handlers go at predetermined vector locations according to the
+ * Xtensa hardware configuration, which is ensured by their placement in a
+ * special section known to the Xtensa linker support package (LSP). Since
+ * their offsets in that section are always the same, the LSPs do not define
+ * a section per vector.
+ *
+ * These things are coded for XEA2 only (XEA1 is not supported).
+ *
+ * Note on Underflow Handlers:
+ * The underflow handler for returning from call[i+1] to call[i]
+ * must preserve all the registers from call[i+1]'s window.
+ * In particular, a0 and a1 must be preserved because the RETW instruction
+ * will be reexecuted (and may even underflow if an intervening exception
+ * has flushed call[i]'s registers).
+ * Registers a2 and up may contain return values.
+ */
+
+#if XCHAL_HAVE_WINDOWED
+
+	.section .window_vectors.text, "ax"
+
+/* Window Overflow Exception for Call4.
+ *
+ * Invoked if a call[i] referenced a register (a4-a15) that contains data from
+ * ancestor call[j]; call[j] had done a call4 to call[j+1].
+ *
+ * On entry here:
+ *   window rotated to call[j] start point;
+ *   a0-a3 are registers to be saved;
+ *   a4-a15 must be preserved;
+ *   a5 is call[j+1]'s stack pointer.
+ */
+
+	.org	0x0
+	.global	_window_overflow4
+_window_overflow4:
+
+	s32e	a0, a5, -16		/* Save a0 to call[j+1]'s stack frame */
+	s32e	a1, a5, -12		/* Save a1 to call[j+1]'s stack frame */
+	s32e	a2, a5,  -8		/* Save a2 to call[j+1]'s stack frame */
+	s32e	a3, a5,  -4		/* Save a3 to call[j+1]'s stack frame */
+	rfwo					/* Rotates back to call[i] position */
+
+/* Window Underflow Exception for Call4
+ *
+ * Invoked by RETW returning from call[i+1] to call[i] where call[i]'s
+ * registers must be reloaded (not live in ARs); where call[i] had done a
+ * call4 to call[i+1].
+ *
+ * On entry here:
+ *   window rotated to call[i] start point;
+ *   a0-a3 are undefined, must be reloaded with call[i].reg[0..3];
+ *   a4-a15 must be preserved (they are call[i+1].reg[0..11]);
+ *   a5 is call[i+1]'s stack pointer.
+ */
+
+	.org	0x40
+	.global	_window_underflow4
+_window_underflow4:
+
+	l32e	a0, a5, -16		/* Restore a0 from call[i+1]'s stack frame */
+	l32e	a1, a5, -12		/* Restore a1 from call[i+1]'s stack frame */
+	l32e	a2, a5,  -8		/* Restore a2 from call[i+1]'s stack frame */
+	l32e	a3, a5,  -4		/* Restore a3 from call[i+1]'s stack frame */
+	rfwu
+
+/* Handle alloca exception generated by interruptee executing 'movsp'.
+ * This uses space between the window vectors, so is essentially "free".
+ * All interruptee's regs are intact except a0 which is saved in EXCSAVE_1,
+ * and PS.EXCM has been set by the exception hardware (can't be interrupted).
+ * The fact the alloca exception was taken means the registers associated with
+ * the base-save area have been spilled and will be restored by the underflow
+ * handler, so those 4 registers are available for scratch.
+ * The code is optimized to avoid unaligned branches and minimize cache misses.
+ */
+
+	.align	4
+	.global	_xtensa_alloca_handler
+_xtensa_alloca_handler:
+
+	rsr		a0, WINDOWBASE	/* Grab WINDOWBASE before rotw changes it */
+	rotw	-1				/* WINDOWBASE goes to a4, new a0-a3 are scratch */
+	rsr		a2, PS
+	extui	a3, a2, XCHAL_PS_OWB_SHIFT, XCHAL_PS_OWB_BITS
+	xor		a3, a3, a4		/* Bits changed from old to current windowbase */
+	rsr		a4, EXCSAVE_1	/* Restore original a0 (now in a4) */
+	slli	a3, a3, XCHAL_PS_OWB_SHIFT
+	xor		a2, a2, a3		/* Flip changed bits in old window base */
+	wsr		a2, PS			/* Update PS.OWB to new window base */
+	rsync
+
+	_bbci.l	a4, 31, _window_underflow4
+	rotw	-1				/* Original a0 goes to a8 */
+	_bbci.l	a8, 30, _window_underflow8
+	rotw	-1
+	j		_window_underflow12
+
+/* Window Overflow Exception for Call8
+ *
+ * Invoked if a call[i] referenced a register (a4-a15) that contains data from
+ * ancestor call[j]; call[j] had done a call8 to call[j+1].
+ *
+ * On entry here:
+ *   window rotated to call[j] start point;
+ *   a0-a7 are registers to be saved;
+ *   a8-a15 must be preserved;
+ *   a9 is call[j+1]'s stack pointer.
+ */
+
+	.org	0x80
+	.global	_window_overflow8
+_window_overflow8:
+
+	s32e	a0, a9, -16		/* Save a0 to call[j+1]'s stack frame */
+	l32e	a0, a1, -12		/* a0 <- call[j-1]'s sp
+							 * (used to find end of call[j]'s frame) */
+	s32e	a1, a9, -12		/* Save a1 to call[j+1]'s stack frame */
+	s32e	a2, a9,  -8		/* Save a2 to call[j+1]'s stack frame */
+	s32e	a3, a9,  -4		/* Save a3 to call[j+1]'s stack frame */
+	s32e	a4, a0, -32		/* Save a4 to call[j]'s stack frame */
+	s32e	a5, a0, -28		/* Save a5 to call[j]'s stack frame */
+	s32e	a6, a0, -24		/* Save a6 to call[j]'s stack frame */
+	s32e	a7, a0, -20		/* Save a7 to call[j]'s stack frame */
+	rfwo					/* Rotates back to call[i] position */
+
+/* Window Underflow Exception for Call8
+ *
+ * Invoked by RETW returning from call[i+1] to call[i] where call[i]'s
+ * registers must be reloaded (not live in ARs); where call[i] had done a
+ * call8 to call[i+1].
+ *
+ * On entry here:
+ *   window rotated to call[i] start point;
+ *   a0-a7 are undefined, must be reloaded with call[i].reg[0..7];
+ *   a8-a15 must be preserved (they are call[i+1].reg[0..7]);
+ *   a9 is call[i+1]'s stack pointer.
+ */
+
+	.org	0xC0
+	.global	_window_underflow8
+_window_underflow8:
+
+	l32e	a0, a9, -16		/* Restore a0 from call[i+1]'s stack frame */
+	l32e	a1, a9, -12		/* Restore a1 from call[i+1]'s stack frame */
+	l32e	a2, a9,  -8		/* Restore a2 from call[i+1]'s stack frame */
+	l32e	a7, a1, -12		/* a7 <- call[i-1]'s sp
+							 * (used to find end of call[i]'s frame) */
+	l32e	a3, a9,  -4		/* Restore a3 from call[i+1]'s stack frame */
+	l32e	a4, a7, -32		/* Restore a4 from call[i]'s stack frame */
+	l32e	a5, a7, -28		/* Restore a5 from call[i]'s stack frame */
+	l32e	a6, a7, -24		/* Restore a6 from call[i]'s stack frame */
+	l32e	a7, a7, -20		/* Restore a7 from call[i]'s stack frame */
+	rfwu
+
+/* Window Overflow Exception for Call12
+ *
+ * Invoked if a call[i] referenced a register (a4-a15) that contains data
+ * from ancestor call[j]; call[j] had done a call12 to call[j+1].
+ *
+ * On entry here:
+ *   window rotated to call[j] start point;
+ *   a0-a11 are registers to be saved;
+ *   a12-a15 must be preserved;
+ *   a13 is call[j+1]'s stack pointer.
+ */
+
+	.org	0x100
+	.global	_window_overflow12
+_window_overflow12:
+
+	s32e	a0,  a13, -16	/* Save a0 to call[j+1]'s stack frame */
+	l32e	a0,  a1,  -12	/* a0 <- call[j-1]'s sp
+							 * (used to find end of call[j]'s frame) */
+	s32e	a1,  a13, -12	/* Save a1 to call[j+1]'s stack frame */
+	s32e	a2,  a13,  -8	/* Save a2 to call[j+1]'s stack frame */
+	s32e	a3,  a13,  -4	/* Save a3 to call[j+1]'s stack frame */
+	s32e	a4,  a0,  -48	/* Save a4 to end of call[j]'s stack frame */
+	s32e	a5,  a0,  -44	/* Save a5 to end of call[j]'s stack frame */
+	s32e	a6,  a0,  -40	/* Save a6 to end of call[j]'s stack frame */
+	s32e	a7,  a0,  -36	/* Save a7 to end of call[j]'s stack frame */
+	s32e	a8,  a0,  -32	/* Save a8 to end of call[j]'s stack frame */
+	s32e	a9,  a0,  -28	/* Save a9 to end of call[j]'s stack frame */
+	s32e	a10, a0,  -24	/* Save a10 to end of call[j]'s stack frame */
+	s32e	a11, a0,  -20	/* Save a11 to end of call[j]'s stack frame */
+	rfwo					/* Rotates back to call[i] position */
+
+/* Window Underflow Exception for Call12
+ *
+ * Invoked by RETW returning from call[i+1] to call[i] where call[i]'s
+ * registers must be reloaded (not live in ARs); where call[i] had done a
+ * call12 to call[i+1].
+ *
+ * On entry here:
+ *   window rotated to call[i] start point;
+ *   a0-a11 are undefined, must be reloaded with call[i].reg[0..11];
+ *   a12-a15 must be preserved (they are call[i+1].reg[0..3]);
+ *   a13 is call[i+1]'s stack pointer.
+ */
+
+	.org 0x140
+	.global	_window_underflow12
+_window_underflow12:
+
+	l32e	a0,  a13, -16	/* Restore a0 from call[i+1]'s stack frame */
+	l32e	a1,  a13, -12	/* Restore a1 from call[i+1]'s stack frame */
+	l32e	a2,  a13,  -8	/* Restore a2 from call[i+1]'s stack frame */
+	l32e	a11, a1,  -12	/* a11 <- call[i-1]'s sp
+							 * (used to find end of call[i]'s frame) */
+	l32e	a3,  a13,  -4	/* Restore a3 from call[i+1]'s stack frame */
+	l32e	a4,  a11, -48	/* Restore a4 from end of call[i]'s stack frame */
+	l32e	a5,  a11, -44	/* Restore a5 from end of call[i]'s stack frame */
+	l32e	a6,  a11, -40	/* Restore a6 from end of call[i]'s stack frame */
+	l32e	a7,  a11, -36	/* Restore a7 from end of call[i]'s stack frame */
+	l32e	a8,  a11, -32	/* Restore a8 from end of call[i]'s stack frame */
+	l32e	a9,  a11, -28	/* Restore a9 from end of call[i]'s stack frame */
+	l32e	a10, a11, -24	/* Restore a10 from end of call[i]'s stack frame */
+	l32e	a11, a11, -20	/* Restore a11 from end of call[i]'s stack frame */
+	rfwu
+
+#endif /* XCHAL_HAVE_WINDOWED */
diff --git a/arch/xtensa/src/common/xtensa_windowspill.S b/arch/xtensa/src/common/xtensa_windowspill.S
new file mode 100644
index 0000000000000000000000000000000000000000..336e5cd431ab489d3eabee7870421623ff21ed6d
--- /dev/null
+++ b/arch/xtensa/src/common/xtensa_windowspill.S
@@ -0,0 +1,422 @@
+/****************************************************************************
+ * arch/xtensa/src/common/xtensa_windowspill.S
+ * Register window spill routine
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from logic originally provided by Tensilica Inc.
+ *
+ *   $Id: //depot/rel/Eaglenest/Xtensa/OS/hal/windowspill_asm.S#1 $
+ *   Copyright (c) 1999-2010 Tensilica Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ ****************************************************************************/
+
+	.file   "xtensa_windowspill.S"
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include "xtensa_abi.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: _xtensa_window_spill
+ *
+ * Description:
+ *   Spill live register windows to the stack.
+ *
+ *   All non-spilled register windows will be spilled.  Beware that this may
+ *   include a4..a15 of the current window, so generally these should not
+ *   have been clobbered by the caller if it is at all possible that these
+ *   registers are part of an unspilled window (it often is possible)
+ *   (otherwise the spilled stack would be invalid).
+ *
+ *   THIS MEANS: the caller is responsible for saving a0-a15 but the caller
+ *   must leave a4-a15 intact when control is transferred here.
+ *
+ *   It may be reentrant (but stack pointer is invalid during execution due
+ *   to window rotations, so can't take interrupts and exceptions in the
+ *   usual manner, so ... what does reentrancy really mean here?).
+ *
+ * Required entry conditions:
+ *   PS.WOE = 0
+ *   PS.INTLEVEL >= XCHAL_EXCM_LEVEL
+ *   a1 = valid stack pointer (note: some regs may be spilled at a1-16)
+ *   a0 = return PC (usually set by call0 or callx0 when calling this function)
+ *   a2,a3 undefined
+ *   a4 thru a15 valid, if they are part of window(s) to be spilled
+ *     (Current window a0..a15 saved if necessary.)
+ *   WINDOWSTART[WINDOWBASE] = 1
+ *
+ * Exit conditions:
+ *   PS.WOE, PS.INTLEVEL = same as on entry
+ *   WINDOWBASE = same as on entry
+ *   WINDOWSTART updated to reflect spilled windows
+ *     (equals 1< successful
+ *              (WINDOWSTART = 1< invalid WINDOWSTART (WINDOWBASE bit not set)
+ *              (WINDOWSTART unchanged)
+ *        2 --> invalid window size (not 4, 8 or 12 regs)
+ *              (WINDOWSTART bits of successfully spilled
+ *              windows are cleared, others left intact)
+ *   a3 clobbered
+ *   a4,a5,a8,a9,a12,a13 = same as on entry
+ *   a6,a7,a10,a11,a14,a15 clobbered if they were part of window(s)
+ *     to be spilled, otherwise they are the same as on entry
+ *   loop registers (LCOUNT,LBEG,LEND) are NOT affected (they were in
+ *     earlier versions)
+ *   SAR clobbered
+ *
+ ****************************************************************************/
+
+	.text
+	.align	4
+	.global	_xtensa_window_spill
+
+_xtensa_window_spill:
+
+#ifndef XCHAL_HAVE_WINDOWED
+	/* Nothing to do -- window option was not selected. */
+
+	movi	a2, 0						/* Always report success */
+	ret
+
+#else /* XCHAL_HAVE_WINDOWED */
+#  define WSBITS  (XCHAL_NUM_AREGS / 4)			/* Width of WINDOWSTART register in bits */
+#  define WBBITS  (XCHAL_NUM_AREGS_LOG2 - 2)	/* Width of WINDOWBASE register in bits */
+
+	/*
+	 * Rearrange (rotate) window start bits relative to the current
+	 * window (WINDOWBASE).  WINDOWSTART currently looks like this:
+	 *
+	 *          a15-a0
+	 * NAREG-1   |  |    0
+	 *    |      vvvv    |
+	 *    xxxxxxxxxx1yyyyy
+	 *              ^
+	 *              |
+	 *              WINDOWBASE
+	 *
+	 * The start bit pointed to by WINDOWBASE must be set
+	 * (we return an error if it isn't), as it corresponds
+	 * to the start of the current window (shown as a0-a15).
+	 *
+	 * We want the window start bits rotated to look like this:
+	 *              1yyyyyxxxxxxxxxx
+	 *
+	 * Note that there is one start bit for every four registers;
+	 * and the total number of registers (NAREG) can be 32 or 64;
+	 * so the number of start bits in WINDOWSTART is NAREG/4,
+	 * and the size of WINDOWSTART can be 8 or 16.
+	 */
+
+	rsr		a2, WINDOWBASE
+	addi	a2, a2, 1
+	ssr		a2						/* sar = WINDOWBASE + 1 */
+	rsr		a3, WINDOWSTART
+	srl		a2, a3					/* a2 is 0... | 000000xxxxxxxxxx = WINDOWSTART >> sar */
+	sll		a3, a3					/* a3 is 1yyyyy0000000000 | 0... = WINDOWSTART << (32 - sar) */
+	bgez	a3, .Linvalid_ws		/* verify that msbit is indeed set */
+
+	srli	a3, a3, 32-WSBITS		/* a3 is 0... | 1yyyyy0000000000 = a3 >> (32-NAREG/4) */
+	or		a2, a2, a3				/* a2 is 0... | 1yyyyyxxxxxxxxxx */
+
+	/* FIND THE FIRST ONE
+	 *
+	 * Now we have (in a2) the window start bits rotated in order
+	 * from oldest (closest to lsbit) to current (msbit set).
+	 * Each start bit (that is set), other than the current one,
+	 * corresponds to a window frame to spill.
+	 *
+	 * Now find the first start bit, ie. the first frame to spill,
+	 * by looking for the first bit set in a2 (from lsbit side).
+	 */
+
+#if XCHAL_HAVE_NSA
+	neg		a3, a2					/* Keep only the least-significant bit set of a2 ... */
+	and		a3, a3, a2				/* ... in a3 */
+	nsau	a3, a3					/* Get index of that bit, numbered from msbit (32 if absent) */
+	ssl		a3						/* Set sar = 32 - a3 = bit index numbered from lsbit + 1 */
+#else /* XCHAL_HAVE_NSA */
+	wsr		a2, WINDOWSTART			/* temporarily save rotated start bits
+									 * (we can use WINDOWSTART because WOE=0) */
+
+	/* NOTE:  this could be optimized a bit, by explicit coding rather than the macro.
+	 */
+
+	find_ls_one	a3, a2				/* Set a3 to index of lsmost bit set in a2 (a2 clobbered) */
+
+	addi	a2, a3, 1				/* Index+1 */
+	ssr		a2						/* Set sar = index + 1 */
+	rsr		a2, WINDOWSTART			/* Restore a2 (rotated start bits) */
+#endif /* XCHAL_HAVE_NSA */
+
+	srl		a2, a2					/* Right-justify the rotated start bits (dropping lsbit set) */
+	wsr		a2, WINDOWSTART			/* Save rotated + justified window start bits,
+									 * because a2 will disappear when modifying WINDOWBASE
+									 * again, we can use WINDOWSTART because WOE=0 */
+
+	/* Rotate WindowBase so that a0 of the next window to spill is in a4
+	 * (ie. leaving us with a2 and a3 to play with, because a0 and a1
+	 * may be those of the original window which we must preserve).
+	 */
+
+	rsr	a2, WINDOWBASE
+
+#if XCHAL_HAVE_NSA
+	addi	a2, a2, 31
+	sub		a3, a2, a3				/* a3 = WINDOWBASE + index = WINDOWBASE + (31 - msbit_index) */
+#else /* XCHAL_HAVE_NSA */
+	add		a3, a2, a3				/* a3 = WINDOWBASE + index */
+#endif /* XCHAL_HAVE_NSA */
+
+	wsr		a3, WINDOWBASE			/* Effectively do:  rotw index */
+	rsync							/* Wait for write to WINDOWBASE to complete */
+
+	/* Now our registers have changed! */
+
+	rsr		a2, WINDOWSTART			/* Restore a2 (rotated + justified window start bits) */
+
+	/* We are now ready to start the window spill loop.
+	 * Relative to the above, a2 and WINDOWBASE are now as follows:
+	 *
+	 *        1yyyyyxxxxxxxxxx = rotated start bits as shown above
+	 *        1yyyyyxxxx100000 = actual rotated start bits (example)
+	 *  0000001yyyyyxxxx ^     = a2 = rotated + justified start bits
+	 *        ^      xxx1^     = window being spilled
+	 *        ^          ^
+	 *        |          |
+	 *    original    current
+	 *   WINDOWBASE  WINDOWBASE
+	 *
+	 * The first window to spill (save) starts at what is now a4.
+	 * The spill loop maintains the adjusted start bits in a2,
+	 * shifting them right as each window is spilled.
+	 */
+
+.Lspill_loop:
+	/* Top of save loop. */
+	/* Find the size of this call and branch to the appropriate save routine. */
+
+	beqz	a2, .Ldone				/* If no start bit remaining, we're done */
+	bbsi.l	a2, 0, .Lspill4			/* If next start bit is set, it's a call4 */
+	bbsi.l	a2, 1, .Lspill8			/* If 2nd next bit set, it's a call8 */
+	bbsi.l	a2, 2, .Lspill12		/* If 3rd next bit set, it's a call12 */
+	j		.Linvalid_window		/* Else it's an invalid window! */
+
+	/* SAVE A CALL4 */
+
+.Lspill4:
+	addi	a3, a9, -16				/* a3 gets call[i+1]'s sp - 16 */
+	s32i	a4, a3, 0				/* Store call[i]'s a0 */
+	s32i	a5, a3, 4				/* Store call[i]'s a1 */
+	s32i	a6, a3, 8				/* Store call[i]'s a2 */
+	s32i	a7, a3, 12				/* Store call[i]'s a3 */
+
+	srli	a6, a2, 1				/* Move and shift the start bits */
+	rotw	1						/* Rotate the window */
+
+	j		.Lspill_loop
+
+	/* SAVE A CALL8 */
+
+.Lspill8:
+	addi	a3, a13, -16			/* a0 gets call[i+1]'s sp - 16 */
+	s32i	a4, a3, 0				/* Store call[i]'s a0 */
+	s32i	a5, a3, 4				/* Store call[i]'s a1 */
+	s32i	a6, a3, 8				/* Store call[i]'s a2 */
+	s32i	a7, a3, 12				/* Store call[i]'s a3 */
+
+	addi	a3, a5, -12				/* Call[i-1]'s sp address */
+	l32i	a3, a3, 0				/* a3 is call[i-1]'s sp
+									 * (load slot) */
+	addi	a3, a3, -32				/* a3 points to our spill area */
+
+	s32i	a8, a3, 0				/* Store call[i]'s a4 */
+	s32i	a9, a3, 4				/* Store call[i]'s a5 */
+	s32i	a10, a3, 8				/* Store call[i]'s a6 */
+	s32i	a11, a3, 12				/* Store call[i]'s a7 */
+
+	srli	a10, a2, 2				/* Move and shift the start bits */
+	rotw	2						/* Rotate the window */
+
+	j		.Lspill_loop
+
+	/* SAVE A CALL12 */
+
+.Lspill12:
+	rotw	1						/* Rotate to see call[i+1]'s sp */
+
+	addi	a13, a13, -16			/* Set to the reg save area */
+	s32i	a0, a13, 0				/* Store call[i]'s a0 */
+	s32i	a1, a13, 4				/* Store call[i]'s a1 */
+	s32i	a2, a13, 8				/* Store call[i]'s a2 */
+	s32i	a3, a13, 12				/* Store call[i]'s a3 */
+
+	addi	a3, a1, -12				/* Call[i-1]'s sp address */
+	l32i	a3, a3, 0				/* a3 has call[i-1]'s sp */
+	addi	a13, a13, 16			/* Restore call[i+1]'s sp (here to fill load slot) */
+	addi	a3, a3, -48				/* a3 points to our save area */
+
+	s32i	a4, a3, 0				/* Store call[i]'s a4 */
+	s32i	a5, a3, 4				/* Store call[i]'s a5 */
+	s32i	a6, a3, 8				/* Store call[i]'s a6 */
+	s32i	a7, a3, 12				/* Store call[i]'s a7 */
+	s32i	a8, a3, 16				/* Store call[i]'s a4 */
+	s32i	a9, a3, 20				/* Store call[i]'s a5 */
+	s32i	a10, a3, 24				/* Store call[i]'s a6 */
+	s32i	a11, a3, 28				/* Store call[i]'s a7 */
+
+	rotw	-1						/* Rotate to see start bits (a2) */
+	srli	a14, a2, 3				/* Move and shift the start bits */
+	rotw	3						/* Rotate to next window */
+
+	j		.Lspill_loop
+
+.Ldone:
+	rotw	1						/* Back to the original window */
+	rsr		a2, WINDOWBASE			/* Get (original) window base */
+	ssl		a2						/* Setup for shift left by WINDOWBASE */
+	movi	a2, 1
+	sll		a2, a2					/* Compute new WINDOWSTART = 1<
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+# The start-up, "head", file.  May be either a .S or a .c file.
+
+HEAD_ASRC  = xtensa_vectors.S xtensa_window_vector.S xtensa_windowspill.S
+HEAD_ASRC += xtensa_int_handlers.S  xtensa_user_handler.S
+HEAD_CSRC  = esp32_start.c
+
+# Common XTENSA files (arch/xtensa/src/common)
+
+CMN_ASRCS  = xtensa_context.S xtensa_coproc.S xtensa_cpuint.S xtensa_panic.S
+CMN_ASRCS += xtensa_sigtramp.S
+
+CMN_CSRCS  = xtensa_assert.c xtensa_blocktask.c xtensa_copystate.c
+CMN_CSRCS += xtensa_cpenable.c xtensa_createstack.c xtensa_exit.c xtensa_idle.c
+CMN_CSRCS += xtensa_initialize.c xtensa_initialstate.c xtensa_interruptcontext.c
+CMN_CSRCS += xtensa_irqdispatch.c xtensa_lowputs.c xtensa_mdelay.c
+CMN_CSRCS += xtensa_modifyreg8.c xtensa_modifyreg16.c xtensa_modifyreg32.c
+CMN_CSRCS += xtensa_puts.c xtensa_releasepending.c xtensa_releasestack.c
+CMN_CSRCS += xtensa_reprioritizertr.c xtensa_schedsigaction.c
+CMN_CSRCS += xtensa_sigdeliver.c xtensa_stackframe.c xtensa_udelay.c
+CMN_CSRCS += xtensa_unblocktask.c xtensa_usestack.c
+
+# Configuration-dependent common XTENSA files
+
+ifeq ($(CONFIG_DEBUG_ALERT),y)
+  CMN_CSRCS += xtensa_dumpstate.c
+endif
+
+ifeq ($(CONFIG_SPINLOCK),y)
+  CMN_CSRCS += xtensa_testset.c
+endif
+
+ifeq ($(CONFIG_SMP),y)
+  CMN_CSRCS += xtensa_cpupause.c
+endif
+
+ifeq ($(CONFIG_STACK_COLORATION),y)
+  CMN_CSRCS += xtensa_checkstack.c
+endif
+
+
+# Use of common/xtensa_etherstub.c is deprecated.  The preferred mechanism
+# is to use CONFIG_NETDEV_LATEINIT=y to suppress the call to
+# up_netinitialize() in xtensa_initialize.c.  Then this stub would not be
+# needed.
+
+ifneq ($(CONFIG_LX6_ETHERNET),y)
+ifeq ($(CONFIG_NET),y)
+  CMN_CSRCS += xtensa_etherstub.c
+endif
+endif
+
+# Required ESP32 files (arch/xtensa/src/lx6)
+
+CHIP_ASRCS  =
+CHIP_CSRCS  = esp32_allocateheap.c esp32_clockconfig.c esp32_cpuint.c
+CHIP_CSRCS += esp32_gpio.c esp32_intdecode.c esp32_irq.c esp32_region.c
+CHIP_CSRCS += esp32_timerisr.c
+
+# Configuration-dependent ESP32 files
+
+ifeq ($(CONFIG_SMP),y)
+CHIP_ASRCS  = esp32_cpuindex.S
+CMN_CSRCS  += esp32_cpuidlestack.c esp32_cpustart.c esp32_intercpu_interrupt.c
+endif
+
+ifeq ($(CONFIG_ESP32_UART),y)
+CMN_CSRCS += esp32_serial.c
+endif
diff --git a/arch/xtensa/src/esp32/chip/esp32_dport.h b/arch/xtensa/src/esp32/chip/esp32_dport.h
new file mode 100644
index 0000000000000000000000000000000000000000..6175b29f0d38fe008aeab00f34707b542844b7a4
--- /dev/null
+++ b/arch/xtensa/src/esp32/chip/esp32_dport.h
@@ -0,0 +1,4862 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/chip/esp32_dport.h
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from logic originally provided by Espressif Systems:
+ *
+ *   Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_DPORT_H
+#define __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_DPORT_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include "chip/esp32_soc.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define DPORT_PRO_BOOT_REMAP_CTRL_REG          (DR_REG_DPORT_BASE + 0x000)
+
+/* DPORT_PRO_BOOT_REMAP : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_BOOT_REMAP  (BIT(0))
+#define DPORT_PRO_BOOT_REMAP_M  (BIT(0))
+#define DPORT_PRO_BOOT_REMAP_V  0x1
+#define DPORT_PRO_BOOT_REMAP_S  0
+
+#define DPORT_APP_BOOT_REMAP_CTRL_REG          (DR_REG_DPORT_BASE + 0x004)
+
+/* DPORT_APP_BOOT_REMAP : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_BOOT_REMAP  (BIT(0))
+#define DPORT_APP_BOOT_REMAP_M  (BIT(0))
+#define DPORT_APP_BOOT_REMAP_V  0x1
+#define DPORT_APP_BOOT_REMAP_S  0
+
+#define DPORT_ACCESS_CHECK_REG          (DR_REG_DPORT_BASE + 0x008)
+
+/* DPORT_ACCESS_CHECK_APP : RO ;bitpos:[8] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_ACCESS_CHECK_APP  (BIT(8))
+#define DPORT_ACCESS_CHECK_APP_M  (BIT(8))
+#define DPORT_ACCESS_CHECK_APP_V  0x1
+#define DPORT_ACCESS_CHECK_APP_S  8
+
+/* DPORT_ACCESS_CHECK_PRO : RO ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_ACCESS_CHECK_PRO  (BIT(0))
+#define DPORT_ACCESS_CHECK_PRO_M  (BIT(0))
+#define DPORT_ACCESS_CHECK_PRO_V  0x1
+#define DPORT_ACCESS_CHECK_PRO_S  0
+
+#define DPORT_PRO_DPORT_APB_MASK0_REG          (DR_REG_DPORT_BASE + 0x00C)
+
+/* DPORT_PRODPORT_APB_MASK0 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/* Description: */
+
+#define DPORT_PRODPORT_APB_MASK0  0xFFFFFFFF
+#define DPORT_PRODPORT_APB_MASK0_M  ((DPORT_PRODPORT_APB_MASK0_V)<<(DPORT_PRODPORT_APB_MASK0_S))
+#define DPORT_PRODPORT_APB_MASK0_V  0xFFFFFFFF
+#define DPORT_PRODPORT_APB_MASK0_S  0
+
+#define DPORT_PRO_DPORT_APB_MASK1_REG          (DR_REG_DPORT_BASE + 0x010)
+
+/* DPORT_PRODPORT_APB_MASK1 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/* Description: */
+
+#define DPORT_PRODPORT_APB_MASK1  0xFFFFFFFF
+#define DPORT_PRODPORT_APB_MASK1_M  ((DPORT_PRODPORT_APB_MASK1_V)<<(DPORT_PRODPORT_APB_MASK1_S))
+#define DPORT_PRODPORT_APB_MASK1_V  0xFFFFFFFF
+#define DPORT_PRODPORT_APB_MASK1_S  0
+
+#define DPORT_APP_DPORT_APB_MASK0_REG          (DR_REG_DPORT_BASE + 0x014)
+
+/* DPORT_APPDPORT_APB_MASK0 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/* Description: */
+
+#define DPORT_APPDPORT_APB_MASK0  0xFFFFFFFF
+#define DPORT_APPDPORT_APB_MASK0_M  ((DPORT_APPDPORT_APB_MASK0_V)<<(DPORT_APPDPORT_APB_MASK0_S))
+#define DPORT_APPDPORT_APB_MASK0_V  0xFFFFFFFF
+#define DPORT_APPDPORT_APB_MASK0_S  0
+
+#define DPORT_APP_DPORT_APB_MASK1_REG          (DR_REG_DPORT_BASE + 0x018)
+
+/* DPORT_APPDPORT_APB_MASK1 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/* Description: */
+
+#define DPORT_APPDPORT_APB_MASK1  0xFFFFFFFF
+#define DPORT_APPDPORT_APB_MASK1_M  ((DPORT_APPDPORT_APB_MASK1_V)<<(DPORT_APPDPORT_APB_MASK1_S))
+#define DPORT_APPDPORT_APB_MASK1_V  0xFFFFFFFF
+#define DPORT_APPDPORT_APB_MASK1_S  0
+
+#define DPORT_PERI_CLK_EN_REG          (DR_REG_DPORT_BASE + 0x01C)
+
+/* DPORT_PERI_CLK_EN : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/* Description: */
+
+#define DPORT_PERI_CLK_EN  0xFFFFFFFF
+#define DPORT_PERI_CLK_EN_M  ((DPORT_PERI_CLK_EN_V)<<(DPORT_PERI_CLK_EN_S))
+#define DPORT_PERI_CLK_EN_V  0xFFFFFFFF
+#define DPORT_PERI_CLK_EN_S  0
+
+#define DPORT_PERI_RST_EN_REG          (DR_REG_DPORT_BASE + 0x020)
+
+/* DPORT_PERI_RST_EN : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/* Description: */
+
+#define DPORT_PERI_RST_EN  0xFFFFFFFF
+#define DPORT_PERI_RST_EN_M  ((DPORT_PERI_RST_EN_V)<<(DPORT_PERI_RST_EN_S))
+#define DPORT_PERI_RST_EN_V  0xFFFFFFFF
+#define DPORT_PERI_RST_EN_S  0
+
+#define DPORT_WIFI_BB_CFG_REG          (DR_REG_DPORT_BASE + 0x024)
+
+/* DPORT_WIFI_BB_CFG : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/* Description: */
+
+#define DPORT_WIFI_BB_CFG  0xFFFFFFFF
+#define DPORT_WIFI_BB_CFG_M  ((DPORT_WIFI_BB_CFG_V)<<(DPORT_WIFI_BB_CFG_S))
+#define DPORT_WIFI_BB_CFG_V  0xFFFFFFFF
+#define DPORT_WIFI_BB_CFG_S  0
+
+#define DPORT_WIFI_BB_CFG_2_REG          (DR_REG_DPORT_BASE + 0x028)
+
+/* DPORT_WIFI_BB_CFG_2 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/* Description: */
+
+#define DPORT_WIFI_BB_CFG_2  0xFFFFFFFF
+#define DPORT_WIFI_BB_CFG_2_M  ((DPORT_WIFI_BB_CFG_2_V)<<(DPORT_WIFI_BB_CFG_2_S))
+#define DPORT_WIFI_BB_CFG_2_V  0xFFFFFFFF
+#define DPORT_WIFI_BB_CFG_2_S  0
+
+#define DPORT_APPCPU_CTRL_A_REG          (DR_REG_DPORT_BASE + 0x02C)
+
+/* DPORT_APPCPU_RESETTING : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_APPCPU_RESETTING  (BIT(0))
+#define DPORT_APPCPU_RESETTING_M  (BIT(0))
+#define DPORT_APPCPU_RESETTING_V  0x1
+#define DPORT_APPCPU_RESETTING_S  0
+
+#define DPORT_APPCPU_CTRL_B_REG          (DR_REG_DPORT_BASE + 0x030)
+
+/* DPORT_APPCPU_CLKGATE_EN : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APPCPU_CLKGATE_EN  (BIT(0))
+#define DPORT_APPCPU_CLKGATE_EN_M  (BIT(0))
+#define DPORT_APPCPU_CLKGATE_EN_V  0x1
+#define DPORT_APPCPU_CLKGATE_EN_S  0
+
+#define DPORT_APPCPU_CTRL_C_REG          (DR_REG_DPORT_BASE + 0x034)
+
+/* DPORT_APPCPU_RUNSTALL : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APPCPU_RUNSTALL  (BIT(0))
+#define DPORT_APPCPU_RUNSTALL_M  (BIT(0))
+#define DPORT_APPCPU_RUNSTALL_V  0x1
+#define DPORT_APPCPU_RUNSTALL_S  0
+
+#define DPORT_APPCPU_CTRL_D_REG          (DR_REG_DPORT_BASE + 0x038)
+
+/* DPORT_APPCPU_BOOT_ADDR : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/* Description: */
+
+#define DPORT_APPCPU_BOOT_ADDR  0xFFFFFFFF
+#define DPORT_APPCPU_BOOT_ADDR_M  ((DPORT_APPCPU_BOOT_ADDR_V)<<(DPORT_APPCPU_BOOT_ADDR_S))
+#define DPORT_APPCPU_BOOT_ADDR_V  0xFFFFFFFF
+#define DPORT_APPCPU_BOOT_ADDR_S  0
+
+#define DPORT_CPU_PER_CONF_REG          (DR_REG_DPORT_BASE + 0x03C)
+
+/* DPORT_FAST_CLK_RTC_SEL : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_FAST_CLK_RTC_SEL  (BIT(3))
+#define DPORT_FAST_CLK_RTC_SEL_M  (BIT(3))
+#define DPORT_FAST_CLK_RTC_SEL_V  0x1
+#define DPORT_FAST_CLK_RTC_SEL_S  3
+
+/* DPORT_LOWSPEED_CLK_SEL : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_LOWSPEED_CLK_SEL  (BIT(2))
+#define DPORT_LOWSPEED_CLK_SEL_M  (BIT(2))
+#define DPORT_LOWSPEED_CLK_SEL_V  0x1
+#define DPORT_LOWSPEED_CLK_SEL_S  2
+
+/* DPORT_CPUPERIOD_SEL : R/W ;bitpos:[1:0] ;default: 2'b0 ; */
+/* Description: */
+
+#define DPORT_CPUPERIOD_SEL  0x00000003
+#define DPORT_CPUPERIOD_SEL_M  ((DPORT_CPUPERIOD_SEL_V)<<(DPORT_CPUPERIOD_SEL_S))
+#define DPORT_CPUPERIOD_SEL_V  0x3
+#define DPORT_CPUPERIOD_SEL_S  0
+
+#define DPORT_PRO_CACHE_CTRL_REG          (DR_REG_DPORT_BASE + 0x040)
+
+/* DPORT_PRO_DRAM_HL : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_DRAM_HL  (BIT(16))
+#define DPORT_PRO_DRAM_HL_M  (BIT(16))
+#define DPORT_PRO_DRAM_HL_V  0x1
+#define DPORT_PRO_DRAM_HL_S  16
+
+/* DPORT_SLAVE_REQ : RO ;bitpos:[15] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_SLAVE_REQ  (BIT(15))
+#define DPORT_SLAVE_REQ_M  (BIT(15))
+#define DPORT_SLAVE_REQ_V  0x1
+#define DPORT_SLAVE_REQ_S  15
+
+/* DPORT_AHB_SPI_REQ : RO ;bitpos:[14] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_AHB_SPI_REQ  (BIT(14))
+#define DPORT_AHB_SPI_REQ_M  (BIT(14))
+#define DPORT_AHB_SPI_REQ_V  0x1
+#define DPORT_AHB_SPI_REQ_S  14
+
+/* DPORT_PRO_SLAVE_REQ : RO ;bitpos:[13] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_SLAVE_REQ  (BIT(13))
+#define DPORT_PRO_SLAVE_REQ_M  (BIT(13))
+#define DPORT_PRO_SLAVE_REQ_V  0x1
+#define DPORT_PRO_SLAVE_REQ_S  13
+
+/* DPORT_PRO_AHB_SPI_REQ : RO ;bitpos:[12] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_AHB_SPI_REQ  (BIT(12))
+#define DPORT_PRO_AHB_SPI_REQ_M  (BIT(12))
+#define DPORT_PRO_AHB_SPI_REQ_V  0x1
+#define DPORT_PRO_AHB_SPI_REQ_S  12
+
+/* DPORT_PRO_DRAM_SPLIT : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_DRAM_SPLIT  (BIT(11))
+#define DPORT_PRO_DRAM_SPLIT_M  (BIT(11))
+#define DPORT_PRO_DRAM_SPLIT_V  0x1
+#define DPORT_PRO_DRAM_SPLIT_S  11
+
+/* DPORT_PRO_SINGLE_IRAM_ENA : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_SINGLE_IRAM_ENA  (BIT(10))
+#define DPORT_PRO_SINGLE_IRAM_ENA_M  (BIT(10))
+#define DPORT_PRO_SINGLE_IRAM_ENA_V  0x1
+#define DPORT_PRO_SINGLE_IRAM_ENA_S  10
+
+/* DPORT_PRO_CACHE_LOCK_3_EN : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_LOCK_3_EN  (BIT(9))
+#define DPORT_PRO_CACHE_LOCK_3_EN_M  (BIT(9))
+#define DPORT_PRO_CACHE_LOCK_3_EN_V  0x1
+#define DPORT_PRO_CACHE_LOCK_3_EN_S  9
+
+/* DPORT_PRO_CACHE_LOCK_2_EN : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_LOCK_2_EN  (BIT(8))
+#define DPORT_PRO_CACHE_LOCK_2_EN_M  (BIT(8))
+#define DPORT_PRO_CACHE_LOCK_2_EN_V  0x1
+#define DPORT_PRO_CACHE_LOCK_2_EN_S  8
+
+/* DPORT_PRO_CACHE_LOCK_1_EN : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_LOCK_1_EN  (BIT(7))
+#define DPORT_PRO_CACHE_LOCK_1_EN_M  (BIT(7))
+#define DPORT_PRO_CACHE_LOCK_1_EN_V  0x1
+#define DPORT_PRO_CACHE_LOCK_1_EN_S  7
+
+/* DPORT_PRO_CACHE_LOCK_0_EN : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_LOCK_0_EN  (BIT(6))
+#define DPORT_PRO_CACHE_LOCK_0_EN_M  (BIT(6))
+#define DPORT_PRO_CACHE_LOCK_0_EN_V  0x1
+#define DPORT_PRO_CACHE_LOCK_0_EN_S  6
+
+/* DPORT_PRO_CACHE_FLUSH_DONE : RO ;bitpos:[5] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_FLUSH_DONE  (BIT(5))
+#define DPORT_PRO_CACHE_FLUSH_DONE_M  (BIT(5))
+#define DPORT_PRO_CACHE_FLUSH_DONE_V  0x1
+#define DPORT_PRO_CACHE_FLUSH_DONE_S  5
+
+/* DPORT_PRO_CACHE_FLUSH_ENA : R/W ;bitpos:[4] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_FLUSH_ENA  (BIT(4))
+#define DPORT_PRO_CACHE_FLUSH_ENA_M  (BIT(4))
+#define DPORT_PRO_CACHE_FLUSH_ENA_V  0x1
+#define DPORT_PRO_CACHE_FLUSH_ENA_S  4
+
+/* DPORT_PRO_CACHE_ENABLE : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_ENABLE  (BIT(3))
+#define DPORT_PRO_CACHE_ENABLE_M  (BIT(3))
+#define DPORT_PRO_CACHE_ENABLE_V  0x1
+#define DPORT_PRO_CACHE_ENABLE_S  3
+
+/* DPORT_PRO_CACHE_MODE : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_MODE  (BIT(2))
+#define DPORT_PRO_CACHE_MODE_M  (BIT(2))
+#define DPORT_PRO_CACHE_MODE_V  0x1
+#define DPORT_PRO_CACHE_MODE_S  2
+
+#define DPORT_PRO_CACHE_CTRL1_REG          (DR_REG_DPORT_BASE + 0x044)
+
+/* DPORT_PRO_CACHE_MMU_IA_CLR : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_MMU_IA_CLR  (BIT(13))
+#define DPORT_PRO_CACHE_MMU_IA_CLR_M  (BIT(13))
+#define DPORT_PRO_CACHE_MMU_IA_CLR_V  0x1
+#define DPORT_PRO_CACHE_MMU_IA_CLR_S  13
+
+/* DPORT_PRO_CMMU_PD : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_CMMU_PD  (BIT(12))
+#define DPORT_PRO_CMMU_PD_M  (BIT(12))
+#define DPORT_PRO_CMMU_PD_V  0x1
+#define DPORT_PRO_CMMU_PD_S  12
+
+/* DPORT_PRO_CMMU_FORCE_ON : R/W ;bitpos:[11] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_PRO_CMMU_FORCE_ON  (BIT(11))
+#define DPORT_PRO_CMMU_FORCE_ON_M  (BIT(11))
+#define DPORT_PRO_CMMU_FORCE_ON_V  0x1
+#define DPORT_PRO_CMMU_FORCE_ON_S  11
+
+/* DPORT_PRO_CMMU_FLASH_PAGE_MODE : R/W ;bitpos:[10:9] ;default: 2'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_CMMU_FLASH_PAGE_MODE  0x00000003
+#define DPORT_PRO_CMMU_FLASH_PAGE_MODE_M  ((DPORT_PRO_CMMU_FLASH_PAGE_MODE_V)<<(DPORT_PRO_CMMU_FLASH_PAGE_MODE_S))
+#define DPORT_PRO_CMMU_FLASH_PAGE_MODE_V  0x3
+#define DPORT_PRO_CMMU_FLASH_PAGE_MODE_S  9
+
+/* DPORT_PRO_CMMU_SRAM_PAGE_MODE : R/W ;bitpos:[8:6] ;default: 3'd3 ; */
+/* Description: */
+
+#define DPORT_PRO_CMMU_SRAM_PAGE_MODE  0x00000007
+#define DPORT_PRO_CMMU_SRAM_PAGE_MODE_M  ((DPORT_PRO_CMMU_SRAM_PAGE_MODE_V)<<(DPORT_PRO_CMMU_SRAM_PAGE_MODE_S))
+#define DPORT_PRO_CMMU_SRAM_PAGE_MODE_V  0x7
+#define DPORT_PRO_CMMU_SRAM_PAGE_MODE_S  6
+
+/* DPORT_PRO_CACHE_MASK_OPSDRAM : R/W ;bitpos:[5] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_MASK_OPSDRAM  (BIT(5))
+#define DPORT_PRO_CACHE_MASK_OPSDRAM_M  (BIT(5))
+#define DPORT_PRO_CACHE_MASK_OPSDRAM_V  0x1
+#define DPORT_PRO_CACHE_MASK_OPSDRAM_S  5
+
+/* DPORT_PRO_CACHE_MASK_DROM0 : R/W ;bitpos:[4] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_MASK_DROM0  (BIT(4))
+#define DPORT_PRO_CACHE_MASK_DROM0_M  (BIT(4))
+#define DPORT_PRO_CACHE_MASK_DROM0_V  0x1
+#define DPORT_PRO_CACHE_MASK_DROM0_S  4
+
+/* DPORT_PRO_CACHE_MASK_DRAM1 : R/W ;bitpos:[3] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_MASK_DRAM1  (BIT(3))
+#define DPORT_PRO_CACHE_MASK_DRAM1_M  (BIT(3))
+#define DPORT_PRO_CACHE_MASK_DRAM1_V  0x1
+#define DPORT_PRO_CACHE_MASK_DRAM1_S  3
+
+/* DPORT_PRO_CACHE_MASK_IROM0 : R/W ;bitpos:[2] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_MASK_IROM0  (BIT(2))
+#define DPORT_PRO_CACHE_MASK_IROM0_M  (BIT(2))
+#define DPORT_PRO_CACHE_MASK_IROM0_V  0x1
+#define DPORT_PRO_CACHE_MASK_IROM0_S  2
+
+/* DPORT_PRO_CACHE_MASK_IRAM1 : R/W ;bitpos:[1] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_MASK_IRAM1  (BIT(1))
+#define DPORT_PRO_CACHE_MASK_IRAM1_M  (BIT(1))
+#define DPORT_PRO_CACHE_MASK_IRAM1_V  0x1
+#define DPORT_PRO_CACHE_MASK_IRAM1_S  1
+
+/* DPORT_PRO_CACHE_MASK_IRAM0 : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_MASK_IRAM0  (BIT(0))
+#define DPORT_PRO_CACHE_MASK_IRAM0_M  (BIT(0))
+#define DPORT_PRO_CACHE_MASK_IRAM0_V  0x1
+#define DPORT_PRO_CACHE_MASK_IRAM0_S  0
+
+#define DPORT_PRO_CACHE_LOCK_0_ADDR_REG          (DR_REG_DPORT_BASE + 0x048)
+
+/* DPORT_PRO_CACHE_LOCK_0_ADDR_MAX : R/W ;bitpos:[21:18] ;default: 4'h0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_LOCK_0_ADDR_MAX  0x0000000F
+#define DPORT_PRO_CACHE_LOCK_0_ADDR_MAX_M  ((DPORT_PRO_CACHE_LOCK_0_ADDR_MAX_V)<<(DPORT_PRO_CACHE_LOCK_0_ADDR_MAX_S))
+#define DPORT_PRO_CACHE_LOCK_0_ADDR_MAX_V  0xF
+#define DPORT_PRO_CACHE_LOCK_0_ADDR_MAX_S  18
+
+/* DPORT_PRO_CACHE_LOCK_0_ADDR_MIN : R/W ;bitpos:[17:14] ;default: 4'h0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_LOCK_0_ADDR_MIN  0x0000000F
+#define DPORT_PRO_CACHE_LOCK_0_ADDR_MIN_M  ((DPORT_PRO_CACHE_LOCK_0_ADDR_MIN_V)<<(DPORT_PRO_CACHE_LOCK_0_ADDR_MIN_S))
+#define DPORT_PRO_CACHE_LOCK_0_ADDR_MIN_V  0xF
+#define DPORT_PRO_CACHE_LOCK_0_ADDR_MIN_S  14
+
+/* DPORT_PRO_CACHE_LOCK_0_ADDR_PRE : R/W ;bitpos:[13:0] ;default: 14'h0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_LOCK_0_ADDR_PRE  0x00003FFF
+#define DPORT_PRO_CACHE_LOCK_0_ADDR_PRE_M  ((DPORT_PRO_CACHE_LOCK_0_ADDR_PRE_V)<<(DPORT_PRO_CACHE_LOCK_0_ADDR_PRE_S))
+#define DPORT_PRO_CACHE_LOCK_0_ADDR_PRE_V  0x3FFF
+#define DPORT_PRO_CACHE_LOCK_0_ADDR_PRE_S  0
+
+#define DPORT_PRO_CACHE_LOCK_1_ADDR_REG          (DR_REG_DPORT_BASE + 0x04C)
+
+/* DPORT_PRO_CACHE_LOCK_1_ADDR_MAX : R/W ;bitpos:[21:18] ;default: 4'h0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_LOCK_1_ADDR_MAX  0x0000000F
+#define DPORT_PRO_CACHE_LOCK_1_ADDR_MAX_M  ((DPORT_PRO_CACHE_LOCK_1_ADDR_MAX_V)<<(DPORT_PRO_CACHE_LOCK_1_ADDR_MAX_S))
+#define DPORT_PRO_CACHE_LOCK_1_ADDR_MAX_V  0xF
+#define DPORT_PRO_CACHE_LOCK_1_ADDR_MAX_S  18
+
+/* DPORT_PRO_CACHE_LOCK_1_ADDR_MIN : R/W ;bitpos:[17:14] ;default: 4'h0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_LOCK_1_ADDR_MIN  0x0000000F
+#define DPORT_PRO_CACHE_LOCK_1_ADDR_MIN_M  ((DPORT_PRO_CACHE_LOCK_1_ADDR_MIN_V)<<(DPORT_PRO_CACHE_LOCK_1_ADDR_MIN_S))
+#define DPORT_PRO_CACHE_LOCK_1_ADDR_MIN_V  0xF
+#define DPORT_PRO_CACHE_LOCK_1_ADDR_MIN_S  14
+
+/* DPORT_PRO_CACHE_LOCK_1_ADDR_PRE : R/W ;bitpos:[13:0] ;default: 14'h0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_LOCK_1_ADDR_PRE  0x00003FFF
+#define DPORT_PRO_CACHE_LOCK_1_ADDR_PRE_M  ((DPORT_PRO_CACHE_LOCK_1_ADDR_PRE_V)<<(DPORT_PRO_CACHE_LOCK_1_ADDR_PRE_S))
+#define DPORT_PRO_CACHE_LOCK_1_ADDR_PRE_V  0x3FFF
+#define DPORT_PRO_CACHE_LOCK_1_ADDR_PRE_S  0
+
+#define DPORT_PRO_CACHE_LOCK_2_ADDR_REG          (DR_REG_DPORT_BASE + 0x050)
+
+/* DPORT_PRO_CACHE_LOCK_2_ADDR_MAX : R/W ;bitpos:[21:18] ;default: 4'h0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_LOCK_2_ADDR_MAX  0x0000000F
+#define DPORT_PRO_CACHE_LOCK_2_ADDR_MAX_M  ((DPORT_PRO_CACHE_LOCK_2_ADDR_MAX_V)<<(DPORT_PRO_CACHE_LOCK_2_ADDR_MAX_S))
+#define DPORT_PRO_CACHE_LOCK_2_ADDR_MAX_V  0xF
+#define DPORT_PRO_CACHE_LOCK_2_ADDR_MAX_S  18
+
+/* DPORT_PRO_CACHE_LOCK_2_ADDR_MIN : R/W ;bitpos:[17:14] ;default: 4'h0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_LOCK_2_ADDR_MIN  0x0000000F
+#define DPORT_PRO_CACHE_LOCK_2_ADDR_MIN_M  ((DPORT_PRO_CACHE_LOCK_2_ADDR_MIN_V)<<(DPORT_PRO_CACHE_LOCK_2_ADDR_MIN_S))
+#define DPORT_PRO_CACHE_LOCK_2_ADDR_MIN_V  0xF
+#define DPORT_PRO_CACHE_LOCK_2_ADDR_MIN_S  14
+
+/* DPORT_PRO_CACHE_LOCK_2_ADDR_PRE : R/W ;bitpos:[13:0] ;default: 14'h0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_LOCK_2_ADDR_PRE  0x00003FFF
+#define DPORT_PRO_CACHE_LOCK_2_ADDR_PRE_M  ((DPORT_PRO_CACHE_LOCK_2_ADDR_PRE_V)<<(DPORT_PRO_CACHE_LOCK_2_ADDR_PRE_S))
+#define DPORT_PRO_CACHE_LOCK_2_ADDR_PRE_V  0x3FFF
+#define DPORT_PRO_CACHE_LOCK_2_ADDR_PRE_S  0
+
+#define DPORT_PRO_CACHE_LOCK_3_ADDR_REG          (DR_REG_DPORT_BASE + 0x054)
+
+/* DPORT_PRO_CACHE_LOCK_3_ADDR_MAX : R/W ;bitpos:[21:18] ;default: 4'h0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_LOCK_3_ADDR_MAX  0x0000000F
+#define DPORT_PRO_CACHE_LOCK_3_ADDR_MAX_M  ((DPORT_PRO_CACHE_LOCK_3_ADDR_MAX_V)<<(DPORT_PRO_CACHE_LOCK_3_ADDR_MAX_S))
+#define DPORT_PRO_CACHE_LOCK_3_ADDR_MAX_V  0xF
+#define DPORT_PRO_CACHE_LOCK_3_ADDR_MAX_S  18
+
+/* DPORT_PRO_CACHE_LOCK_3_ADDR_MIN : R/W ;bitpos:[17:14] ;default: 4'h0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_LOCK_3_ADDR_MIN  0x0000000F
+#define DPORT_PRO_CACHE_LOCK_3_ADDR_MIN_M  ((DPORT_PRO_CACHE_LOCK_3_ADDR_MIN_V)<<(DPORT_PRO_CACHE_LOCK_3_ADDR_MIN_S))
+#define DPORT_PRO_CACHE_LOCK_3_ADDR_MIN_V  0xF
+#define DPORT_PRO_CACHE_LOCK_3_ADDR_MIN_S  14
+
+/* DPORT_PRO_CACHE_LOCK_3_ADDR_PRE : R/W ;bitpos:[13:0] ;default: 14'h0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_LOCK_3_ADDR_PRE  0x00003FFF
+#define DPORT_PRO_CACHE_LOCK_3_ADDR_PRE_M  ((DPORT_PRO_CACHE_LOCK_3_ADDR_PRE_V)<<(DPORT_PRO_CACHE_LOCK_3_ADDR_PRE_S))
+#define DPORT_PRO_CACHE_LOCK_3_ADDR_PRE_V  0x3FFF
+#define DPORT_PRO_CACHE_LOCK_3_ADDR_PRE_S  0
+
+#define DPORT_APP_CACHE_CTRL_REG          (DR_REG_DPORT_BASE + 0x058)
+
+/* DPORT_APP_DRAM_HL : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_DRAM_HL  (BIT(14))
+#define DPORT_APP_DRAM_HL_M  (BIT(14))
+#define DPORT_APP_DRAM_HL_V  0x1
+#define DPORT_APP_DRAM_HL_S  14
+
+/* DPORT_APP_SLAVE_REQ : RO ;bitpos:[13] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_SLAVE_REQ  (BIT(13))
+#define DPORT_APP_SLAVE_REQ_M  (BIT(13))
+#define DPORT_APP_SLAVE_REQ_V  0x1
+#define DPORT_APP_SLAVE_REQ_S  13
+
+/* DPORT_APP_AHB_SPI_REQ : RO ;bitpos:[12] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_AHB_SPI_REQ  (BIT(12))
+#define DPORT_APP_AHB_SPI_REQ_M  (BIT(12))
+#define DPORT_APP_AHB_SPI_REQ_V  0x1
+#define DPORT_APP_AHB_SPI_REQ_S  12
+
+/* DPORT_APP_DRAM_SPLIT : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_DRAM_SPLIT  (BIT(11))
+#define DPORT_APP_DRAM_SPLIT_M  (BIT(11))
+#define DPORT_APP_DRAM_SPLIT_V  0x1
+#define DPORT_APP_DRAM_SPLIT_S  11
+
+/* DPORT_APP_SINGLE_IRAM_ENA : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_SINGLE_IRAM_ENA  (BIT(10))
+#define DPORT_APP_SINGLE_IRAM_ENA_M  (BIT(10))
+#define DPORT_APP_SINGLE_IRAM_ENA_V  0x1
+#define DPORT_APP_SINGLE_IRAM_ENA_S  10
+
+/* DPORT_APP_CACHE_LOCK_3_EN : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_LOCK_3_EN  (BIT(9))
+#define DPORT_APP_CACHE_LOCK_3_EN_M  (BIT(9))
+#define DPORT_APP_CACHE_LOCK_3_EN_V  0x1
+#define DPORT_APP_CACHE_LOCK_3_EN_S  9
+
+/* DPORT_APP_CACHE_LOCK_2_EN : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_LOCK_2_EN  (BIT(8))
+#define DPORT_APP_CACHE_LOCK_2_EN_M  (BIT(8))
+#define DPORT_APP_CACHE_LOCK_2_EN_V  0x1
+#define DPORT_APP_CACHE_LOCK_2_EN_S  8
+
+/* DPORT_APP_CACHE_LOCK_1_EN : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_LOCK_1_EN  (BIT(7))
+#define DPORT_APP_CACHE_LOCK_1_EN_M  (BIT(7))
+#define DPORT_APP_CACHE_LOCK_1_EN_V  0x1
+#define DPORT_APP_CACHE_LOCK_1_EN_S  7
+
+/* DPORT_APP_CACHE_LOCK_0_EN : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_LOCK_0_EN  (BIT(6))
+#define DPORT_APP_CACHE_LOCK_0_EN_M  (BIT(6))
+#define DPORT_APP_CACHE_LOCK_0_EN_V  0x1
+#define DPORT_APP_CACHE_LOCK_0_EN_S  6
+
+/* DPORT_APP_CACHE_FLUSH_DONE : RO ;bitpos:[5] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_FLUSH_DONE  (BIT(5))
+#define DPORT_APP_CACHE_FLUSH_DONE_M  (BIT(5))
+#define DPORT_APP_CACHE_FLUSH_DONE_V  0x1
+#define DPORT_APP_CACHE_FLUSH_DONE_S  5
+
+/* DPORT_APP_CACHE_FLUSH_ENA : R/W ;bitpos:[4] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_FLUSH_ENA  (BIT(4))
+#define DPORT_APP_CACHE_FLUSH_ENA_M  (BIT(4))
+#define DPORT_APP_CACHE_FLUSH_ENA_V  0x1
+#define DPORT_APP_CACHE_FLUSH_ENA_S  4
+
+/* DPORT_APP_CACHE_ENABLE : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_ENABLE  (BIT(3))
+#define DPORT_APP_CACHE_ENABLE_M  (BIT(3))
+#define DPORT_APP_CACHE_ENABLE_V  0x1
+#define DPORT_APP_CACHE_ENABLE_S  3
+
+/* DPORT_APP_CACHE_MODE : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_MODE  (BIT(2))
+#define DPORT_APP_CACHE_MODE_M  (BIT(2))
+#define DPORT_APP_CACHE_MODE_V  0x1
+#define DPORT_APP_CACHE_MODE_S  2
+
+#define DPORT_APP_CACHE_CTRL1_REG          (DR_REG_DPORT_BASE + 0x05C)
+
+/* DPORT_APP_CACHE_MMU_IA_CLR : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_MMU_IA_CLR  (BIT(13))
+#define DPORT_APP_CACHE_MMU_IA_CLR_M  (BIT(13))
+#define DPORT_APP_CACHE_MMU_IA_CLR_V  0x1
+#define DPORT_APP_CACHE_MMU_IA_CLR_S  13
+
+/* DPORT_APP_CMMU_PD : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_CMMU_PD  (BIT(12))
+#define DPORT_APP_CMMU_PD_M  (BIT(12))
+#define DPORT_APP_CMMU_PD_V  0x1
+#define DPORT_APP_CMMU_PD_S  12
+
+/* DPORT_APP_CMMU_FORCE_ON : R/W ;bitpos:[11] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_APP_CMMU_FORCE_ON  (BIT(11))
+#define DPORT_APP_CMMU_FORCE_ON_M  (BIT(11))
+#define DPORT_APP_CMMU_FORCE_ON_V  0x1
+#define DPORT_APP_CMMU_FORCE_ON_S  11
+
+/* DPORT_APP_CMMU_FLASH_PAGE_MODE : R/W ;bitpos:[10:9] ;default: 2'b0 ; */
+/* Description: */
+
+#define DPORT_APP_CMMU_FLASH_PAGE_MODE  0x00000003
+#define DPORT_APP_CMMU_FLASH_PAGE_MODE_M  ((DPORT_APP_CMMU_FLASH_PAGE_MODE_V)<<(DPORT_APP_CMMU_FLASH_PAGE_MODE_S))
+#define DPORT_APP_CMMU_FLASH_PAGE_MODE_V  0x3
+#define DPORT_APP_CMMU_FLASH_PAGE_MODE_S  9
+
+/* DPORT_APP_CMMU_SRAM_PAGE_MODE : R/W ;bitpos:[8:6] ;default: 3'd3 ; */
+/* Description: */
+
+#define DPORT_APP_CMMU_SRAM_PAGE_MODE  0x00000007
+#define DPORT_APP_CMMU_SRAM_PAGE_MODE_M  ((DPORT_APP_CMMU_SRAM_PAGE_MODE_V)<<(DPORT_APP_CMMU_SRAM_PAGE_MODE_S))
+#define DPORT_APP_CMMU_SRAM_PAGE_MODE_V  0x7
+#define DPORT_APP_CMMU_SRAM_PAGE_MODE_S  6
+
+/* DPORT_APP_CACHE_MASK_OPSDRAM : R/W ;bitpos:[5] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_MASK_OPSDRAM  (BIT(5))
+#define DPORT_APP_CACHE_MASK_OPSDRAM_M  (BIT(5))
+#define DPORT_APP_CACHE_MASK_OPSDRAM_V  0x1
+#define DPORT_APP_CACHE_MASK_OPSDRAM_S  5
+
+/* DPORT_APP_CACHE_MASK_DROM0 : R/W ;bitpos:[4] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_MASK_DROM0  (BIT(4))
+#define DPORT_APP_CACHE_MASK_DROM0_M  (BIT(4))
+#define DPORT_APP_CACHE_MASK_DROM0_V  0x1
+#define DPORT_APP_CACHE_MASK_DROM0_S  4
+
+/* DPORT_APP_CACHE_MASK_DRAM1 : R/W ;bitpos:[3] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_MASK_DRAM1  (BIT(3))
+#define DPORT_APP_CACHE_MASK_DRAM1_M  (BIT(3))
+#define DPORT_APP_CACHE_MASK_DRAM1_V  0x1
+#define DPORT_APP_CACHE_MASK_DRAM1_S  3
+
+/* DPORT_APP_CACHE_MASK_IROM0 : R/W ;bitpos:[2] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_MASK_IROM0  (BIT(2))
+#define DPORT_APP_CACHE_MASK_IROM0_M  (BIT(2))
+#define DPORT_APP_CACHE_MASK_IROM0_V  0x1
+#define DPORT_APP_CACHE_MASK_IROM0_S  2
+
+/* DPORT_APP_CACHE_MASK_IRAM1 : R/W ;bitpos:[1] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_MASK_IRAM1  (BIT(1))
+#define DPORT_APP_CACHE_MASK_IRAM1_M  (BIT(1))
+#define DPORT_APP_CACHE_MASK_IRAM1_V  0x1
+#define DPORT_APP_CACHE_MASK_IRAM1_S  1
+
+/* DPORT_APP_CACHE_MASK_IRAM0 : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_MASK_IRAM0  (BIT(0))
+#define DPORT_APP_CACHE_MASK_IRAM0_M  (BIT(0))
+#define DPORT_APP_CACHE_MASK_IRAM0_V  0x1
+#define DPORT_APP_CACHE_MASK_IRAM0_S  0
+
+#define DPORT_APP_CACHE_LOCK_0_ADDR_REG          (DR_REG_DPORT_BASE + 0x060)
+
+/* DPORT_APP_CACHE_LOCK_0_ADDR_MAX : R/W ;bitpos:[21:18] ;default: 4'h0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_LOCK_0_ADDR_MAX  0x0000000F
+#define DPORT_APP_CACHE_LOCK_0_ADDR_MAX_M  ((DPORT_APP_CACHE_LOCK_0_ADDR_MAX_V)<<(DPORT_APP_CACHE_LOCK_0_ADDR_MAX_S))
+#define DPORT_APP_CACHE_LOCK_0_ADDR_MAX_V  0xF
+#define DPORT_APP_CACHE_LOCK_0_ADDR_MAX_S  18
+
+/* DPORT_APP_CACHE_LOCK_0_ADDR_MIN : R/W ;bitpos:[17:14] ;default: 4'h0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_LOCK_0_ADDR_MIN  0x0000000F
+#define DPORT_APP_CACHE_LOCK_0_ADDR_MIN_M  ((DPORT_APP_CACHE_LOCK_0_ADDR_MIN_V)<<(DPORT_APP_CACHE_LOCK_0_ADDR_MIN_S))
+#define DPORT_APP_CACHE_LOCK_0_ADDR_MIN_V  0xF
+#define DPORT_APP_CACHE_LOCK_0_ADDR_MIN_S  14
+
+/* DPORT_APP_CACHE_LOCK_0_ADDR_PRE : R/W ;bitpos:[13:0] ;default: 14'h0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_LOCK_0_ADDR_PRE  0x00003FFF
+#define DPORT_APP_CACHE_LOCK_0_ADDR_PRE_M  ((DPORT_APP_CACHE_LOCK_0_ADDR_PRE_V)<<(DPORT_APP_CACHE_LOCK_0_ADDR_PRE_S))
+#define DPORT_APP_CACHE_LOCK_0_ADDR_PRE_V  0x3FFF
+#define DPORT_APP_CACHE_LOCK_0_ADDR_PRE_S  0
+
+#define DPORT_APP_CACHE_LOCK_1_ADDR_REG          (DR_REG_DPORT_BASE + 0x064)
+
+/* DPORT_APP_CACHE_LOCK_1_ADDR_MAX : R/W ;bitpos:[21:18] ;default: 4'h0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_LOCK_1_ADDR_MAX  0x0000000F
+#define DPORT_APP_CACHE_LOCK_1_ADDR_MAX_M  ((DPORT_APP_CACHE_LOCK_1_ADDR_MAX_V)<<(DPORT_APP_CACHE_LOCK_1_ADDR_MAX_S))
+#define DPORT_APP_CACHE_LOCK_1_ADDR_MAX_V  0xF
+#define DPORT_APP_CACHE_LOCK_1_ADDR_MAX_S  18
+
+/* DPORT_APP_CACHE_LOCK_1_ADDR_MIN : R/W ;bitpos:[17:14] ;default: 4'h0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_LOCK_1_ADDR_MIN  0x0000000F
+#define DPORT_APP_CACHE_LOCK_1_ADDR_MIN_M  ((DPORT_APP_CACHE_LOCK_1_ADDR_MIN_V)<<(DPORT_APP_CACHE_LOCK_1_ADDR_MIN_S))
+#define DPORT_APP_CACHE_LOCK_1_ADDR_MIN_V  0xF
+#define DPORT_APP_CACHE_LOCK_1_ADDR_MIN_S  14
+
+/* DPORT_APP_CACHE_LOCK_1_ADDR_PRE : R/W ;bitpos:[13:0] ;default: 14'h0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_LOCK_1_ADDR_PRE  0x00003FFF
+#define DPORT_APP_CACHE_LOCK_1_ADDR_PRE_M  ((DPORT_APP_CACHE_LOCK_1_ADDR_PRE_V)<<(DPORT_APP_CACHE_LOCK_1_ADDR_PRE_S))
+#define DPORT_APP_CACHE_LOCK_1_ADDR_PRE_V  0x3FFF
+#define DPORT_APP_CACHE_LOCK_1_ADDR_PRE_S  0
+
+#define DPORT_APP_CACHE_LOCK_2_ADDR_REG          (DR_REG_DPORT_BASE + 0x068)
+
+/* DPORT_APP_CACHE_LOCK_2_ADDR_MAX : R/W ;bitpos:[21:18] ;default: 4'h0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_LOCK_2_ADDR_MAX  0x0000000F
+#define DPORT_APP_CACHE_LOCK_2_ADDR_MAX_M  ((DPORT_APP_CACHE_LOCK_2_ADDR_MAX_V)<<(DPORT_APP_CACHE_LOCK_2_ADDR_MAX_S))
+#define DPORT_APP_CACHE_LOCK_2_ADDR_MAX_V  0xF
+#define DPORT_APP_CACHE_LOCK_2_ADDR_MAX_S  18
+
+/* DPORT_APP_CACHE_LOCK_2_ADDR_MIN : R/W ;bitpos:[17:14] ;default: 4'h0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_LOCK_2_ADDR_MIN  0x0000000F
+#define DPORT_APP_CACHE_LOCK_2_ADDR_MIN_M  ((DPORT_APP_CACHE_LOCK_2_ADDR_MIN_V)<<(DPORT_APP_CACHE_LOCK_2_ADDR_MIN_S))
+#define DPORT_APP_CACHE_LOCK_2_ADDR_MIN_V  0xF
+#define DPORT_APP_CACHE_LOCK_2_ADDR_MIN_S  14
+
+/* DPORT_APP_CACHE_LOCK_2_ADDR_PRE : R/W ;bitpos:[13:0] ;default: 14'h0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_LOCK_2_ADDR_PRE  0x00003FFF
+#define DPORT_APP_CACHE_LOCK_2_ADDR_PRE_M  ((DPORT_APP_CACHE_LOCK_2_ADDR_PRE_V)<<(DPORT_APP_CACHE_LOCK_2_ADDR_PRE_S))
+#define DPORT_APP_CACHE_LOCK_2_ADDR_PRE_V  0x3FFF
+#define DPORT_APP_CACHE_LOCK_2_ADDR_PRE_S  0
+
+#define DPORT_APP_CACHE_LOCK_3_ADDR_REG          (DR_REG_DPORT_BASE + 0x06C)
+
+/* DPORT_APP_CACHE_LOCK_3_ADDR_MAX : R/W ;bitpos:[21:18] ;default: 4'h0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_LOCK_3_ADDR_MAX  0x0000000F
+#define DPORT_APP_CACHE_LOCK_3_ADDR_MAX_M  ((DPORT_APP_CACHE_LOCK_3_ADDR_MAX_V)<<(DPORT_APP_CACHE_LOCK_3_ADDR_MAX_S))
+#define DPORT_APP_CACHE_LOCK_3_ADDR_MAX_V  0xF
+#define DPORT_APP_CACHE_LOCK_3_ADDR_MAX_S  18
+
+/* DPORT_APP_CACHE_LOCK_3_ADDR_MIN : R/W ;bitpos:[17:14] ;default: 4'h0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_LOCK_3_ADDR_MIN  0x0000000F
+#define DPORT_APP_CACHE_LOCK_3_ADDR_MIN_M  ((DPORT_APP_CACHE_LOCK_3_ADDR_MIN_V)<<(DPORT_APP_CACHE_LOCK_3_ADDR_MIN_S))
+#define DPORT_APP_CACHE_LOCK_3_ADDR_MIN_V  0xF
+#define DPORT_APP_CACHE_LOCK_3_ADDR_MIN_S  14
+
+/* DPORT_APP_CACHE_LOCK_3_ADDR_PRE : R/W ;bitpos:[13:0] ;default: 14'h0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_LOCK_3_ADDR_PRE  0x00003FFF
+#define DPORT_APP_CACHE_LOCK_3_ADDR_PRE_M  ((DPORT_APP_CACHE_LOCK_3_ADDR_PRE_V)<<(DPORT_APP_CACHE_LOCK_3_ADDR_PRE_S))
+#define DPORT_APP_CACHE_LOCK_3_ADDR_PRE_V  0x3FFF
+#define DPORT_APP_CACHE_LOCK_3_ADDR_PRE_S  0
+
+#define DPORT_TRACEMEM_MUX_MODE_REG          (DR_REG_DPORT_BASE + 0x070)
+
+/* DPORT_TRACEMEM_MUX_MODE : R/W ;bitpos:[1:0] ;default: 2'b0 ; */
+/* Description: */
+
+#define DPORT_TRACEMEM_MUX_MODE  0x00000003
+#define DPORT_TRACEMEM_MUX_MODE_M  ((DPORT_TRACEMEM_MUX_MODE_V)<<(DPORT_TRACEMEM_MUX_MODE_S))
+#define DPORT_TRACEMEM_MUX_MODE_V  0x3
+#define DPORT_TRACEMEM_MUX_MODE_S  0
+
+#define DPORT_PRO_TRACEMEM_ENA_REG          (DR_REG_DPORT_BASE + 0x074)
+
+/* DPORT_PRO_TRACEMEM_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_TRACEMEM_ENA  (BIT(0))
+#define DPORT_PRO_TRACEMEM_ENA_M  (BIT(0))
+#define DPORT_PRO_TRACEMEM_ENA_V  0x1
+#define DPORT_PRO_TRACEMEM_ENA_S  0
+
+#define DPORT_APP_TRACEMEM_ENA_REG          (DR_REG_DPORT_BASE + 0x078)
+
+/* DPORT_APP_TRACEMEM_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_TRACEMEM_ENA  (BIT(0))
+#define DPORT_APP_TRACEMEM_ENA_M  (BIT(0))
+#define DPORT_APP_TRACEMEM_ENA_V  0x1
+#define DPORT_APP_TRACEMEM_ENA_S  0
+
+#define DPORT_CACHE_MUX_MODE_REG          (DR_REG_DPORT_BASE + 0x07C)
+
+/* DPORT_CACHE_MUX_MODE : R/W ;bitpos:[1:0] ;default: 2'b0 ; */
+/* Description: */
+
+#define DPORT_CACHE_MUX_MODE  0x00000003
+#define DPORT_CACHE_MUX_MODE_M  ((DPORT_CACHE_MUX_MODE_V)<<(DPORT_CACHE_MUX_MODE_S))
+#define DPORT_CACHE_MUX_MODE_V  0x3
+#define DPORT_CACHE_MUX_MODE_S  0
+
+#define DPORT_IMMU_PAGE_MODE_REG          (DR_REG_DPORT_BASE + 0x080)
+
+/* DPORT_IMMU_PAGE_MODE : R/W ;bitpos:[2:1] ;default: 2'b0 ; */
+/* Description: */
+
+#define DPORT_IMMU_PAGE_MODE  0x00000003
+#define DPORT_IMMU_PAGE_MODE_M  ((DPORT_IMMU_PAGE_MODE_V)<<(DPORT_IMMU_PAGE_MODE_S))
+#define DPORT_IMMU_PAGE_MODE_V  0x3
+#define DPORT_IMMU_PAGE_MODE_S  1
+
+/* DPORT_INTERNAL_SRAM_IMMU_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_INTERNAL_SRAM_IMMU_ENA  (BIT(0))
+#define DPORT_INTERNAL_SRAM_IMMU_ENA_M  (BIT(0))
+#define DPORT_INTERNAL_SRAM_IMMU_ENA_V  0x1
+#define DPORT_INTERNAL_SRAM_IMMU_ENA_S  0
+
+#define DPORT_DMMU_PAGE_MODE_REG          (DR_REG_DPORT_BASE + 0x084)
+
+/* DPORT_DMMU_PAGE_MODE : R/W ;bitpos:[2:1] ;default: 2'b0 ; */
+/* Description: */
+
+#define DPORT_DMMU_PAGE_MODE  0x00000003
+#define DPORT_DMMU_PAGE_MODE_M  ((DPORT_DMMU_PAGE_MODE_V)<<(DPORT_DMMU_PAGE_MODE_S))
+#define DPORT_DMMU_PAGE_MODE_V  0x3
+#define DPORT_DMMU_PAGE_MODE_S  1
+
+/* DPORT_INTERNAL_SRAM_DMMU_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_INTERNAL_SRAM_DMMU_ENA  (BIT(0))
+#define DPORT_INTERNAL_SRAM_DMMU_ENA_M  (BIT(0))
+#define DPORT_INTERNAL_SRAM_DMMU_ENA_V  0x1
+#define DPORT_INTERNAL_SRAM_DMMU_ENA_S  0
+
+#define DPORT_ROM_MPU_ENA_REG          (DR_REG_DPORT_BASE + 0x088)
+
+/* DPORT_APP_ROM_MPU_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_ROM_MPU_ENA  (BIT(2))
+#define DPORT_APP_ROM_MPU_ENA_M  (BIT(2))
+#define DPORT_APP_ROM_MPU_ENA_V  0x1
+#define DPORT_APP_ROM_MPU_ENA_S  2
+
+/* DPORT_PRO_ROM_MPU_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_ROM_MPU_ENA  (BIT(1))
+#define DPORT_PRO_ROM_MPU_ENA_M  (BIT(1))
+#define DPORT_PRO_ROM_MPU_ENA_V  0x1
+#define DPORT_PRO_ROM_MPU_ENA_S  1
+
+/* DPORT_SHARE_ROM_MPU_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_SHARE_ROM_MPU_ENA  (BIT(0))
+#define DPORT_SHARE_ROM_MPU_ENA_M  (BIT(0))
+#define DPORT_SHARE_ROM_MPU_ENA_V  0x1
+#define DPORT_SHARE_ROM_MPU_ENA_S  0
+
+#define DPORT_MEM_PD_MASK_REG          (DR_REG_DPORT_BASE + 0x08C)
+
+/* DPORT_LSLP_MEM_PD_MASK : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_LSLP_MEM_PD_MASK  (BIT(0))
+#define DPORT_LSLP_MEM_PD_MASK_M  (BIT(0))
+#define DPORT_LSLP_MEM_PD_MASK_V  0x1
+#define DPORT_LSLP_MEM_PD_MASK_S  0
+
+#define DPORT_ROM_PD_CTRL_REG          (DR_REG_DPORT_BASE + 0x090)
+
+/* DPORT_SHARE_ROM_PD : R/W ;bitpos:[7:2] ;default: 6'h0 ; */
+/* Description: */
+
+#define DPORT_SHARE_ROM_PD  0x0000003F
+#define DPORT_SHARE_ROM_PD_M  ((DPORT_SHARE_ROM_PD_V)<<(DPORT_SHARE_ROM_PD_S))
+#define DPORT_SHARE_ROM_PD_V  0x3F
+#define DPORT_SHARE_ROM_PD_S  2
+
+/* DPORT_APP_ROM_PD : R/W ;bitpos:[1] ;default: 1'h0 ; */
+/* Description: */
+
+#define DPORT_APP_ROM_PD  (BIT(1))
+#define DPORT_APP_ROM_PD_M  (BIT(1))
+#define DPORT_APP_ROM_PD_V  0x1
+#define DPORT_APP_ROM_PD_S  1
+
+/* DPORT_PRO_ROM_PD : R/W ;bitpos:[0] ;default: 1'h0 ; */
+/* Description: */
+
+#define DPORT_PRO_ROM_PD  (BIT(0))
+#define DPORT_PRO_ROM_PD_M  (BIT(0))
+#define DPORT_PRO_ROM_PD_V  0x1
+#define DPORT_PRO_ROM_PD_S  0
+
+#define DPORT_ROM_FO_CTRL_REG          (DR_REG_DPORT_BASE + 0x094)
+
+/* DPORT_SHARE_ROM_FO : R/W ;bitpos:[7:2] ;default: 6'h0 ; */
+/* Description: */
+
+#define DPORT_SHARE_ROM_FO  0x0000003F
+#define DPORT_SHARE_ROM_FO_M  ((DPORT_SHARE_ROM_FO_V)<<(DPORT_SHARE_ROM_FO_S))
+#define DPORT_SHARE_ROM_FO_V  0x3F
+#define DPORT_SHARE_ROM_FO_S  2
+
+/* DPORT_APP_ROM_FO : R/W ;bitpos:[1] ;default: 1'h1 ; */
+/* Description: */
+
+#define DPORT_APP_ROM_FO  (BIT(1))
+#define DPORT_APP_ROM_FO_M  (BIT(1))
+#define DPORT_APP_ROM_FO_V  0x1
+#define DPORT_APP_ROM_FO_S  1
+
+/* DPORT_PRO_ROM_FO : R/W ;bitpos:[0] ;default: 1'h1 ; */
+/* Description: */
+
+#define DPORT_PRO_ROM_FO  (BIT(0))
+#define DPORT_PRO_ROM_FO_M  (BIT(0))
+#define DPORT_PRO_ROM_FO_V  0x1
+#define DPORT_PRO_ROM_FO_S  0
+
+#define DPORT_SRAM_PD_CTRL_0_REG          (DR_REG_DPORT_BASE + 0x098)
+
+/* DPORT_SRAM_PD_0 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/* Description: */
+
+#define DPORT_SRAM_PD_0  0xFFFFFFFF
+#define DPORT_SRAM_PD_0_M  ((DPORT_SRAM_PD_0_V)<<(DPORT_SRAM_PD_0_S))
+#define DPORT_SRAM_PD_0_V  0xFFFFFFFF
+#define DPORT_SRAM_PD_0_S  0
+
+#define DPORT_SRAM_PD_CTRL_1_REG          (DR_REG_DPORT_BASE + 0x09C)
+
+/* DPORT_SRAM_PD_1 : R/W ;bitpos:[0] ;default: 1'h0 ; */
+/* Description: */
+
+#define DPORT_SRAM_PD_1  (BIT(0))
+#define DPORT_SRAM_PD_1_M  (BIT(0))
+#define DPORT_SRAM_PD_1_V  0x1
+#define DPORT_SRAM_PD_1_S  0
+
+#define DPORT_SRAM_FO_CTRL_0_REG          (DR_REG_DPORT_BASE + 0x0A0)
+
+/* DPORT_SRAM_FO_0 : R/W ;bitpos:[31:0] ;default: 32'hffffffff ; */
+/* Description: */
+
+#define DPORT_SRAM_FO_0  0xFFFFFFFF
+#define DPORT_SRAM_FO_0_M  ((DPORT_SRAM_FO_0_V)<<(DPORT_SRAM_FO_0_S))
+#define DPORT_SRAM_FO_0_V  0xFFFFFFFF
+#define DPORT_SRAM_FO_0_S  0
+
+#define DPORT_SRAM_FO_CTRL_1_REG          (DR_REG_DPORT_BASE + 0x0A4)
+
+/* DPORT_SRAM_FO_1 : R/W ;bitpos:[0] ;default: 1'h1 ; */
+/* Description: */
+
+#define DPORT_SRAM_FO_1  (BIT(0))
+#define DPORT_SRAM_FO_1_M  (BIT(0))
+#define DPORT_SRAM_FO_1_V  0x1
+#define DPORT_SRAM_FO_1_S  0
+
+#define DPORT_IRAM_DRAM_AHB_SEL_REG          (DR_REG_DPORT_BASE + 0x0A8)
+
+/* DPORT_MAC_DUMP_MODE : R/W ;bitpos:[6:5] ;default: 2'h0 ; */
+/* Description: */
+
+#define DPORT_MAC_DUMP_MODE  0x00000003
+#define DPORT_MAC_DUMP_MODE_M  ((DPORT_MAC_DUMP_MODE_V)<<(DPORT_MAC_DUMP_MODE_S))
+#define DPORT_MAC_DUMP_MODE_V  0x3
+#define DPORT_MAC_DUMP_MODE_S  5
+
+/* DPORT_MASK_AHB : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_MASK_AHB  (BIT(4))
+#define DPORT_MASK_AHB_M  (BIT(4))
+#define DPORT_MASK_AHB_V  0x1
+#define DPORT_MASK_AHB_S  4
+
+/* DPORT_MASK_APP_DRAM : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_MASK_APP_DRAM  (BIT(3))
+#define DPORT_MASK_APP_DRAM_M  (BIT(3))
+#define DPORT_MASK_APP_DRAM_V  0x1
+#define DPORT_MASK_APP_DRAM_S  3
+
+/* DPORT_MASK_PRO_DRAM : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_MASK_PRO_DRAM  (BIT(2))
+#define DPORT_MASK_PRO_DRAM_M  (BIT(2))
+#define DPORT_MASK_PRO_DRAM_V  0x1
+#define DPORT_MASK_PRO_DRAM_S  2
+
+/* DPORT_MASK_APP_IRAM : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_MASK_APP_IRAM  (BIT(1))
+#define DPORT_MASK_APP_IRAM_M  (BIT(1))
+#define DPORT_MASK_APP_IRAM_V  0x1
+#define DPORT_MASK_APP_IRAM_S  1
+
+/* DPORT_MASK_PRO_IRAM : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_MASK_PRO_IRAM  (BIT(0))
+#define DPORT_MASK_PRO_IRAM_M  (BIT(0))
+#define DPORT_MASK_PRO_IRAM_V  0x1
+#define DPORT_MASK_PRO_IRAM_S  0
+
+#define DPORT_TAG_FO_CTRL_REG          (DR_REG_DPORT_BASE + 0x0AC)
+
+/* DPORT_APP_CACHE_TAG_PD : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_TAG_PD  (BIT(9))
+#define DPORT_APP_CACHE_TAG_PD_M  (BIT(9))
+#define DPORT_APP_CACHE_TAG_PD_V  0x1
+#define DPORT_APP_CACHE_TAG_PD_S  9
+
+/* DPORT_APP_CACHE_TAG_FORCE_ON : R/W ;bitpos:[8] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_TAG_FORCE_ON  (BIT(8))
+#define DPORT_APP_CACHE_TAG_FORCE_ON_M  (BIT(8))
+#define DPORT_APP_CACHE_TAG_FORCE_ON_V  0x1
+#define DPORT_APP_CACHE_TAG_FORCE_ON_S  8
+
+/* DPORT_PRO_CACHE_TAG_PD : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_TAG_PD  (BIT(1))
+#define DPORT_PRO_CACHE_TAG_PD_M  (BIT(1))
+#define DPORT_PRO_CACHE_TAG_PD_V  0x1
+#define DPORT_PRO_CACHE_TAG_PD_S  1
+
+/* DPORT_PRO_CACHE_TAG_FORCE_ON : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_TAG_FORCE_ON  (BIT(0))
+#define DPORT_PRO_CACHE_TAG_FORCE_ON_M  (BIT(0))
+#define DPORT_PRO_CACHE_TAG_FORCE_ON_V  0x1
+#define DPORT_PRO_CACHE_TAG_FORCE_ON_S  0
+
+#define DPORT_AHB_LITE_MASK_REG          (DR_REG_DPORT_BASE + 0x0B0)
+
+/* DPORT_AHB_LITE_SDHOST_PID_REG : R/W ;bitpos:[13:11] ;default: 3'b0 ; */
+/* Description: */
+
+#define DPORT_AHB_LITE_SDHOST_PID_REG  0x00000007
+#define DPORT_AHB_LITE_SDHOST_PID_REG_M  ((DPORT_AHB_LITE_SDHOST_PID_REG_V)<<(DPORT_AHB_LITE_SDHOST_PID_REG_S))
+#define DPORT_AHB_LITE_SDHOST_PID_REG_V  0x7
+#define DPORT_AHB_LITE_SDHOST_PID_REG_S  11
+
+/* DPORT_AHB_LITE_MASK_APPDPORT : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_AHB_LITE_MASK_APPDPORT  (BIT(10))
+#define DPORT_AHB_LITE_MASK_APPDPORT_M  (BIT(10))
+#define DPORT_AHB_LITE_MASK_APPDPORT_V  0x1
+#define DPORT_AHB_LITE_MASK_APPDPORT_S  10
+
+/* DPORT_AHB_LITE_MASK_PRODPORT : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_AHB_LITE_MASK_PRODPORT  (BIT(9))
+#define DPORT_AHB_LITE_MASK_PRODPORT_M  (BIT(9))
+#define DPORT_AHB_LITE_MASK_PRODPORT_V  0x1
+#define DPORT_AHB_LITE_MASK_PRODPORT_S  9
+
+/* DPORT_AHB_LITE_MASK_SDIO : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_AHB_LITE_MASK_SDIO  (BIT(8))
+#define DPORT_AHB_LITE_MASK_SDIO_M  (BIT(8))
+#define DPORT_AHB_LITE_MASK_SDIO_V  0x1
+#define DPORT_AHB_LITE_MASK_SDIO_S  8
+
+/* DPORT_AHB_LITE_MASK_APP : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_AHB_LITE_MASK_APP  (BIT(4))
+#define DPORT_AHB_LITE_MASK_APP_M  (BIT(4))
+#define DPORT_AHB_LITE_MASK_APP_V  0x1
+#define DPORT_AHB_LITE_MASK_APP_S  4
+
+/* DPORT_AHB_LITE_MASK_PRO : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_AHB_LITE_MASK_PRO  (BIT(0))
+#define DPORT_AHB_LITE_MASK_PRO_M  (BIT(0))
+#define DPORT_AHB_LITE_MASK_PRO_V  0x1
+#define DPORT_AHB_LITE_MASK_PRO_S  0
+
+#define DPORT_AHB_MPU_TABLE_0_REG          (DR_REG_DPORT_BASE + 0x0B4)
+
+/* DPORT_AHB_ACCESS_GRANT_0 : R/W ;bitpos:[31:0] ;default: 32'hffffffff ; */
+/* Description: */
+
+#define DPORT_AHB_ACCESS_GRANT_0  0xFFFFFFFF
+#define DPORT_AHB_ACCESS_GRANT_0_M  ((DPORT_AHB_ACCESS_GRANT_0_V)<<(DPORT_AHB_ACCESS_GRANT_0_S))
+#define DPORT_AHB_ACCESS_GRANT_0_V  0xFFFFFFFF
+#define DPORT_AHB_ACCESS_GRANT_0_S  0
+
+#define DPORT_AHB_MPU_TABLE_1_REG          (DR_REG_DPORT_BASE + 0x0B8)
+
+/* DPORT_AHB_ACCESS_GRANT_1 : R/W ;bitpos:[8:0] ;default: 9'h1ff ; */
+/* Description: */
+
+#define DPORT_AHB_ACCESS_GRANT_1  0x000001FF
+#define DPORT_AHB_ACCESS_GRANT_1_M  ((DPORT_AHB_ACCESS_GRANT_1_V)<<(DPORT_AHB_ACCESS_GRANT_1_S))
+#define DPORT_AHB_ACCESS_GRANT_1_V  0x1FF
+#define DPORT_AHB_ACCESS_GRANT_1_S  0
+
+#define DPORT_HOST_INF_SEL_REG          (DR_REG_DPORT_BASE + 0x0BC)
+
+/* DPORT_LINK_DEVICE_SEL : R/W ;bitpos:[15:8] ;default: 8'h0 ; */
+/* Description: */
+
+#define DPORT_LINK_DEVICE_SEL  0x000000FF
+#define DPORT_LINK_DEVICE_SEL_M  ((DPORT_LINK_DEVICE_SEL_V)<<(DPORT_LINK_DEVICE_SEL_S))
+#define DPORT_LINK_DEVICE_SEL_V  0xFF
+#define DPORT_LINK_DEVICE_SEL_S  8
+
+/* DPORT_PERI_IO_SWAP : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/* Description: */
+
+#define DPORT_PERI_IO_SWAP  0x000000FF
+#define DPORT_PERI_IO_SWAP_M  ((DPORT_PERI_IO_SWAP_V)<<(DPORT_PERI_IO_SWAP_S))
+#define DPORT_PERI_IO_SWAP_V  0xFF
+#define DPORT_PERI_IO_SWAP_S  0
+
+#define DPORT_PERIP_CLK_EN_REG          (DR_REG_DPORT_BASE + 0x0C0)
+
+/* DPORT_PERIP_CLK_EN : R/W ;bitpos:[31:0] ;default: 32'hf9c1e06f ; */
+/* Description: */
+
+#define DPORT_PERIP_CLK_EN  0xFFFFFFFF
+#define DPORT_PERIP_CLK_EN_M  ((DPORT_PERIP_CLK_EN_V)<<(DPORT_PERIP_CLK_EN_S))
+#define DPORT_PERIP_CLK_EN_V  0xFFFFFFFF
+#define DPORT_PERIP_CLK_EN_S  0
+
+#define DPORT_PWM3_CLK_EN (BIT(26))
+#define DPORT_PWM2_CLK_EN (BIT(25))
+#define DPORT_UART_MEM_CLK_EN   (BIT(24))
+#define DPORT_UART2_CLK_EN   (BIT(23))
+#define DPORT_SPI_DMA_CLK_EN   (BIT(22))
+#define DPORT_I2S1_CLK_EN   (BIT(21))
+#define DPORT_PWM1_CLK_EN   (BIT(20))
+#define DPORT_CAN_CLK_EN   (BIT(19))
+#define DPORT_I2C_EXT1_CLK_EN   (BIT(18))
+#define DPORT_PWM0_CLK_EN   (BIT(17))
+#define DPORT_SPI_CLK_EN   (BIT(16))
+#define DPORT_TIMERGROUP1_CLK_EN   (BIT(15))
+#define DPORT_EFUSE_CLK_EN   (BIT(14))
+#define DPORT_TIMERGROUP_CLK_EN   (BIT(13))
+#define DPORT_UHCI1_CLK_EN   (BIT(12))
+#define DPORT_LEDC_CLK_EN   (BIT(11))
+#define DPORT_PCNT_CLK_EN   (BIT(10))
+#define DPORT_RMT_CLK_EN   (BIT(9))
+#define DPORT_UHCI0_CLK_EN   (BIT(8))
+#define DPORT_I2C_EXT0_CLK_EN   (BIT(7))
+#define DPORT_SPI_CLK_EN_2   (BIT(6))
+#define DPORT_UART1_CLK_EN   (BIT(5))
+#define DPORT_I2S0_CLK_EN   (BIT(4))
+#define DPORT_WDG_CLK_EN   (BIT(3))
+#define DPORT_UART_CLK_EN   (BIT(2))
+#define DPORT_SPI_CLK_EN_1   (BIT(1))
+#define DPORT_TIMERS_CLK_EN   (BIT(0))
+#define DPORT_PERIP_RST_EN_REG          (DR_REG_DPORT_BASE + 0x0C4)
+
+/* DPORT_PERIP_RST : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/* Description: */
+
+#define DPORT_PERIP_RST  0xFFFFFFFF
+#define DPORT_PERIP_RST_M  ((DPORT_PERIP_RST_V)<<(DPORT_PERIP_RST_S))
+#define DPORT_PERIP_RST_V  0xFFFFFFFF
+#define DPORT_PERIP_RST_S  0
+#define DPORT_PWM3_RST (BIT(26))
+#define DPORT_PWM2_RST (BIT(25))
+#define DPORT_UART_MEM_RST   (BIT(24))
+#define DPORT_UART2_RST   (BIT(23))
+#define DPORT_SPI_DMA_RST   (BIT(22))
+#define DPORT_I2S1_RST   (BIT(21))
+#define DPORT_PWM1_RST   (BIT(20))
+#define DPORT_CAN_RST   (BIT(19))
+#define DPORT_I2C_EXT1_RST   (BIT(18))
+#define DPORT_PWM0_RST   (BIT(17))
+#define DPORT_SPI_RST   (BIT(16))
+#define DPORT_TIMERGROUP1_RST   (BIT(15))
+#define DPORT_EFUSE_RST   (BIT(14))
+#define DPORT_TIMERGROUP_RST   (BIT(13))
+#define DPORT_UHCI1_RST   (BIT(12))
+#define DPORT_LEDC_RST   (BIT(11))
+#define DPORT_PCNT_RST   (BIT(10))
+#define DPORT_RMT_RST   (BIT(9))
+#define DPORT_UHCI0_RST   (BIT(8))
+#define DPORT_I2C_EXT0_RST   (BIT(7))
+#define DPORT_SPI_RST_2   (BIT(6))
+#define DPORT_UART1_RST   (BIT(5))
+#define DPORT_I2S0_RST   (BIT(4))
+#define DPORT_WDG_RST   (BIT(3))
+#define DPORT_UART_RST   (BIT(2))
+#define DPORT_SPI_RST_1   (BIT(1))
+#define DPORT_TIMERS_RST   (BIT(0))
+#define DPORT_SLAVE_SPI_CONFIG_REG          (DR_REG_DPORT_BASE + 0x0C8)
+
+/* DPORT_SPI_DECRYPT_ENABLE : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_SPI_DECRYPT_ENABLE  (BIT(12))
+#define DPORT_SPI_DECRYPT_ENABLE_M  (BIT(12))
+#define DPORT_SPI_DECRYPT_ENABLE_V  0x1
+#define DPORT_SPI_DECRYPT_ENABLE_S  12
+
+/* DPORT_SPI_ENCRYPT_ENABLE : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_SPI_ENCRYPT_ENABLE  (BIT(8))
+#define DPORT_SPI_ENCRYPT_ENABLE_M  (BIT(8))
+#define DPORT_SPI_ENCRYPT_ENABLE_V  0x1
+#define DPORT_SPI_ENCRYPT_ENABLE_S  8
+
+/* DPORT_SLAVE_SPI_MASK_APP : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_SLAVE_SPI_MASK_APP  (BIT(4))
+#define DPORT_SLAVE_SPI_MASK_APP_M  (BIT(4))
+#define DPORT_SLAVE_SPI_MASK_APP_V  0x1
+#define DPORT_SLAVE_SPI_MASK_APP_S  4
+
+/* DPORT_SLAVE_SPI_MASK_PRO : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_SLAVE_SPI_MASK_PRO  (BIT(0))
+#define DPORT_SLAVE_SPI_MASK_PRO_M  (BIT(0))
+#define DPORT_SLAVE_SPI_MASK_PRO_V  0x1
+#define DPORT_SLAVE_SPI_MASK_PRO_S  0
+
+#define DPORT_WIFI_CLK_EN_REG          (DR_REG_DPORT_BASE + 0x0CC)
+
+/* DPORT_WIFI_CLK_EN : R/W ;bitpos:[31:0] ;default: 32'hfffce030 ; */
+/* Description: */
+
+#define DPORT_WIFI_CLK_EN  0xFFFFFFFF
+#define DPORT_WIFI_CLK_EN_M  ((DPORT_WIFI_CLK_EN_V)<<(DPORT_WIFI_CLK_EN_S))
+#define DPORT_WIFI_CLK_EN_V  0xFFFFFFFF
+#define DPORT_WIFI_CLK_EN_S  0
+
+#define DPORT_WIFI_RST_EN_REG          (DR_REG_DPORT_BASE + 0x0D0)
+
+/* DPORT_WIFI_RST : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/* Description: */
+
+#define DPORT_WIFI_RST  0xFFFFFFFF
+#define DPORT_WIFI_RST_M  ((DPORT_WIFI_RST_V)<<(DPORT_WIFI_RST_S))
+#define DPORT_WIFI_RST_V  0xFFFFFFFF
+#define DPORT_WIFI_RST_S  0
+
+#define DPORT_BT_LPCK_DIV_INT_REG          (DR_REG_DPORT_BASE + 0x0D4)
+
+/* DPORT_BTEXTWAKEUP_REQ : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_BTEXTWAKEUP_REQ  (BIT(12))
+#define DPORT_BTEXTWAKEUP_REQ_M  (BIT(12))
+#define DPORT_BTEXTWAKEUP_REQ_V  0x1
+#define DPORT_BTEXTWAKEUP_REQ_S  12
+
+/* DPORT_BT_LPCK_DIV_NUM : R/W ;bitpos:[11:0] ;default: 12'd255 ; */
+/* Description: */
+
+#define DPORT_BT_LPCK_DIV_NUM  0x00000FFF
+#define DPORT_BT_LPCK_DIV_NUM_M  ((DPORT_BT_LPCK_DIV_NUM_V)<<(DPORT_BT_LPCK_DIV_NUM_S))
+#define DPORT_BT_LPCK_DIV_NUM_V  0xFFF
+#define DPORT_BT_LPCK_DIV_NUM_S  0
+
+#define DPORT_BT_LPCK_DIV_FRAC_REG          (DR_REG_DPORT_BASE + 0x0D8)
+
+/* DPORT_LPCLK_SEL_XTAL32K : R/W ;bitpos:[27] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_LPCLK_SEL_XTAL32K  (BIT(27))
+#define DPORT_LPCLK_SEL_XTAL32K_M  (BIT(27))
+#define DPORT_LPCLK_SEL_XTAL32K_V  0x1
+#define DPORT_LPCLK_SEL_XTAL32K_S  27
+
+/* DPORT_LPCLK_SEL_XTAL : R/W ;bitpos:[26] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_LPCLK_SEL_XTAL  (BIT(26))
+#define DPORT_LPCLK_SEL_XTAL_M  (BIT(26))
+#define DPORT_LPCLK_SEL_XTAL_V  0x1
+#define DPORT_LPCLK_SEL_XTAL_S  26
+
+/* DPORT_LPCLK_SEL_8M : R/W ;bitpos:[25] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_LPCLK_SEL_8M  (BIT(25))
+#define DPORT_LPCLK_SEL_8M_M  (BIT(25))
+#define DPORT_LPCLK_SEL_8M_V  0x1
+#define DPORT_LPCLK_SEL_8M_S  25
+
+/* DPORT_LPCLK_SEL_RTC_SLOW : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_LPCLK_SEL_RTC_SLOW  (BIT(24))
+#define DPORT_LPCLK_SEL_RTC_SLOW_M  (BIT(24))
+#define DPORT_LPCLK_SEL_RTC_SLOW_V  0x1
+#define DPORT_LPCLK_SEL_RTC_SLOW_S  24
+
+/* DPORT_BT_LPCK_DIV_A : R/W ;bitpos:[23:12] ;default: 12'd1 ; */
+/* Description: */
+
+#define DPORT_BT_LPCK_DIV_A  0x00000FFF
+#define DPORT_BT_LPCK_DIV_A_M  ((DPORT_BT_LPCK_DIV_A_V)<<(DPORT_BT_LPCK_DIV_A_S))
+#define DPORT_BT_LPCK_DIV_A_V  0xFFF
+#define DPORT_BT_LPCK_DIV_A_S  12
+
+/* DPORT_BT_LPCK_DIV_B : R/W ;bitpos:[11:0] ;default: 12'd1 ; */
+/* Description: */
+
+#define DPORT_BT_LPCK_DIV_B  0x00000FFF
+#define DPORT_BT_LPCK_DIV_B_M  ((DPORT_BT_LPCK_DIV_B_V)<<(DPORT_BT_LPCK_DIV_B_S))
+#define DPORT_BT_LPCK_DIV_B_V  0xFFF
+#define DPORT_BT_LPCK_DIV_B_S  0
+
+#define DPORT_CPU_INTR_FROM_CPU_0_REG          (DR_REG_DPORT_BASE + 0x0DC)
+
+/* DPORT_CPU_INTR_FROM_CPU_0 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_CPU_INTR_FROM_CPU_0  (BIT(0))
+#define DPORT_CPU_INTR_FROM_CPU_0_M  (BIT(0))
+#define DPORT_CPU_INTR_FROM_CPU_0_V  0x1
+#define DPORT_CPU_INTR_FROM_CPU_0_S  0
+
+#define DPORT_CPU_INTR_FROM_CPU_1_REG          (DR_REG_DPORT_BASE + 0x0E0)
+
+/* DPORT_CPU_INTR_FROM_CPU_1 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_CPU_INTR_FROM_CPU_1  (BIT(0))
+#define DPORT_CPU_INTR_FROM_CPU_1_M  (BIT(0))
+#define DPORT_CPU_INTR_FROM_CPU_1_V  0x1
+#define DPORT_CPU_INTR_FROM_CPU_1_S  0
+
+#define DPORT_CPU_INTR_FROM_CPU_2_REG          (DR_REG_DPORT_BASE + 0x0E4)
+
+/* DPORT_CPU_INTR_FROM_CPU_2 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_CPU_INTR_FROM_CPU_2  (BIT(0))
+#define DPORT_CPU_INTR_FROM_CPU_2_M  (BIT(0))
+#define DPORT_CPU_INTR_FROM_CPU_2_V  0x1
+#define DPORT_CPU_INTR_FROM_CPU_2_S  0
+
+#define DPORT_CPU_INTR_FROM_CPU_3_REG          (DR_REG_DPORT_BASE + 0x0E8)
+
+/* DPORT_CPU_INTR_FROM_CPU_3 : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_CPU_INTR_FROM_CPU_3  (BIT(0))
+#define DPORT_CPU_INTR_FROM_CPU_3_M  (BIT(0))
+#define DPORT_CPU_INTR_FROM_CPU_3_V  0x1
+#define DPORT_CPU_INTR_FROM_CPU_3_S  0
+
+#define DPORT_PRO_INTR_STATUS_0_REG          (DR_REG_DPORT_BASE + 0x0EC)
+
+/* DPORT_PRO_INTR_STATUS_0 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/* Description: */
+
+#define DPORT_PRO_INTR_STATUS_0  0xFFFFFFFF
+#define DPORT_PRO_INTR_STATUS_0_M  ((DPORT_PRO_INTR_STATUS_0_V)<<(DPORT_PRO_INTR_STATUS_0_S))
+#define DPORT_PRO_INTR_STATUS_0_V  0xFFFFFFFF
+#define DPORT_PRO_INTR_STATUS_0_S  0
+
+#define DPORT_PRO_INTR_STATUS_1_REG          (DR_REG_DPORT_BASE + 0x0F0)
+
+/* DPORT_PRO_INTR_STATUS_1 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/* Description: */
+
+#define DPORT_PRO_INTR_STATUS_1  0xFFFFFFFF
+#define DPORT_PRO_INTR_STATUS_1_M  ((DPORT_PRO_INTR_STATUS_1_V)<<(DPORT_PRO_INTR_STATUS_1_S))
+#define DPORT_PRO_INTR_STATUS_1_V  0xFFFFFFFF
+#define DPORT_PRO_INTR_STATUS_1_S  0
+
+#define DPORT_PRO_INTR_STATUS_2_REG          (DR_REG_DPORT_BASE + 0x0F4)
+
+/* DPORT_PRO_INTR_STATUS_2 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/* Description: */
+
+#define DPORT_PRO_INTR_STATUS_2  0xFFFFFFFF
+#define DPORT_PRO_INTR_STATUS_2_M  ((DPORT_PRO_INTR_STATUS_2_V)<<(DPORT_PRO_INTR_STATUS_2_S))
+#define DPORT_PRO_INTR_STATUS_2_V  0xFFFFFFFF
+#define DPORT_PRO_INTR_STATUS_2_S  0
+
+#define DPORT_APP_INTR_STATUS_0_REG          (DR_REG_DPORT_BASE + 0x0F8)
+
+/* DPORT_APP_INTR_STATUS_0 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/* Description: */
+
+#define DPORT_APP_INTR_STATUS_0  0xFFFFFFFF
+#define DPORT_APP_INTR_STATUS_0_M  ((DPORT_APP_INTR_STATUS_0_V)<<(DPORT_APP_INTR_STATUS_0_S))
+#define DPORT_APP_INTR_STATUS_0_V  0xFFFFFFFF
+#define DPORT_APP_INTR_STATUS_0_S  0
+
+#define DPORT_APP_INTR_STATUS_1_REG          (DR_REG_DPORT_BASE + 0x0FC)
+
+/* DPORT_APP_INTR_STATUS_1 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/* Description: */
+
+#define DPORT_APP_INTR_STATUS_1  0xFFFFFFFF
+#define DPORT_APP_INTR_STATUS_1_M  ((DPORT_APP_INTR_STATUS_1_V)<<(DPORT_APP_INTR_STATUS_1_S))
+#define DPORT_APP_INTR_STATUS_1_V  0xFFFFFFFF
+#define DPORT_APP_INTR_STATUS_1_S  0
+
+#define DPORT_APP_INTR_STATUS_2_REG          (DR_REG_DPORT_BASE + 0x100)
+
+/* DPORT_APP_INTR_STATUS_2 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/* Description: */
+
+#define DPORT_APP_INTR_STATUS_2  0xFFFFFFFF
+#define DPORT_APP_INTR_STATUS_2_M  ((DPORT_APP_INTR_STATUS_2_V)<<(DPORT_APP_INTR_STATUS_2_S))
+#define DPORT_APP_INTR_STATUS_2_V  0xFFFFFFFF
+#define DPORT_APP_INTR_STATUS_2_S  0
+
+#define DPORT_PRO_MAC_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x104)
+
+/* DPORT_PRO_MAC_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_MAC_INTR_MAP  0x0000001F
+#define DPORT_PRO_MAC_INTR_MAP_M  ((DPORT_PRO_MAC_INTR_MAP_V)<<(DPORT_PRO_MAC_INTR_MAP_S))
+#define DPORT_PRO_MAC_INTR_MAP_V  0x1F
+#define DPORT_PRO_MAC_INTR_MAP_S  0
+
+#define DPORT_PRO_MAC_NMI_MAP_REG          (DR_REG_DPORT_BASE + 0x108)
+
+/* DPORT_PRO_MAC_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_MAC_NMI_MAP  0x0000001F
+#define DPORT_PRO_MAC_NMI_MAP_M  ((DPORT_PRO_MAC_NMI_MAP_V)<<(DPORT_PRO_MAC_NMI_MAP_S))
+#define DPORT_PRO_MAC_NMI_MAP_V  0x1F
+#define DPORT_PRO_MAC_NMI_MAP_S  0
+
+#define DPORT_PRO_BB_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x10C)
+
+/* DPORT_PRO_BB_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_BB_INT_MAP  0x0000001F
+#define DPORT_PRO_BB_INT_MAP_M  ((DPORT_PRO_BB_INT_MAP_V)<<(DPORT_PRO_BB_INT_MAP_S))
+#define DPORT_PRO_BB_INT_MAP_V  0x1F
+#define DPORT_PRO_BB_INT_MAP_S  0
+
+#define DPORT_PRO_BT_MAC_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x110)
+
+/* DPORT_PRO_BT_MAC_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_BT_MAC_INT_MAP  0x0000001F
+#define DPORT_PRO_BT_MAC_INT_MAP_M  ((DPORT_PRO_BT_MAC_INT_MAP_V)<<(DPORT_PRO_BT_MAC_INT_MAP_S))
+#define DPORT_PRO_BT_MAC_INT_MAP_V  0x1F
+#define DPORT_PRO_BT_MAC_INT_MAP_S  0
+
+#define DPORT_PRO_BT_BB_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x114)
+
+/* DPORT_PRO_BT_BB_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_BT_BB_INT_MAP  0x0000001F
+#define DPORT_PRO_BT_BB_INT_MAP_M  ((DPORT_PRO_BT_BB_INT_MAP_V)<<(DPORT_PRO_BT_BB_INT_MAP_S))
+#define DPORT_PRO_BT_BB_INT_MAP_V  0x1F
+#define DPORT_PRO_BT_BB_INT_MAP_S  0
+
+#define DPORT_PRO_BT_BB_NMI_MAP_REG          (DR_REG_DPORT_BASE + 0x118)
+
+/* DPORT_PRO_BT_BB_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_BT_BB_NMI_MAP  0x0000001F
+#define DPORT_PRO_BT_BB_NMI_MAP_M  ((DPORT_PRO_BT_BB_NMI_MAP_V)<<(DPORT_PRO_BT_BB_NMI_MAP_S))
+#define DPORT_PRO_BT_BB_NMI_MAP_V  0x1F
+#define DPORT_PRO_BT_BB_NMI_MAP_S  0
+
+#define DPORT_PRO_RWBT_IRQ_MAP_REG          (DR_REG_DPORT_BASE + 0x11C)
+
+/* DPORT_PRO_RWBT_IRQ_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_RWBT_IRQ_MAP  0x0000001F
+#define DPORT_PRO_RWBT_IRQ_MAP_M  ((DPORT_PRO_RWBT_IRQ_MAP_V)<<(DPORT_PRO_RWBT_IRQ_MAP_S))
+#define DPORT_PRO_RWBT_IRQ_MAP_V  0x1F
+#define DPORT_PRO_RWBT_IRQ_MAP_S  0
+
+#define DPORT_PRO_RWBLE_IRQ_MAP_REG          (DR_REG_DPORT_BASE + 0x120)
+
+/* DPORT_PRO_RWBLE_IRQ_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_RWBLE_IRQ_MAP  0x0000001F
+#define DPORT_PRO_RWBLE_IRQ_MAP_M  ((DPORT_PRO_RWBLE_IRQ_MAP_V)<<(DPORT_PRO_RWBLE_IRQ_MAP_S))
+#define DPORT_PRO_RWBLE_IRQ_MAP_V  0x1F
+#define DPORT_PRO_RWBLE_IRQ_MAP_S  0
+
+#define DPORT_PRO_RWBT_NMI_MAP_REG          (DR_REG_DPORT_BASE + 0x124)
+
+/* DPORT_PRO_RWBT_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_RWBT_NMI_MAP  0x0000001F
+#define DPORT_PRO_RWBT_NMI_MAP_M  ((DPORT_PRO_RWBT_NMI_MAP_V)<<(DPORT_PRO_RWBT_NMI_MAP_S))
+#define DPORT_PRO_RWBT_NMI_MAP_V  0x1F
+#define DPORT_PRO_RWBT_NMI_MAP_S  0
+
+#define DPORT_PRO_RWBLE_NMI_MAP_REG          (DR_REG_DPORT_BASE + 0x128)
+
+/* DPORT_PRO_RWBLE_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_RWBLE_NMI_MAP  0x0000001F
+#define DPORT_PRO_RWBLE_NMI_MAP_M  ((DPORT_PRO_RWBLE_NMI_MAP_V)<<(DPORT_PRO_RWBLE_NMI_MAP_S))
+#define DPORT_PRO_RWBLE_NMI_MAP_V  0x1F
+#define DPORT_PRO_RWBLE_NMI_MAP_S  0
+
+#define DPORT_PRO_SLC0_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x12C)
+
+/* DPORT_PRO_SLC0_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_SLC0_INTR_MAP  0x0000001F
+#define DPORT_PRO_SLC0_INTR_MAP_M  ((DPORT_PRO_SLC0_INTR_MAP_V)<<(DPORT_PRO_SLC0_INTR_MAP_S))
+#define DPORT_PRO_SLC0_INTR_MAP_V  0x1F
+#define DPORT_PRO_SLC0_INTR_MAP_S  0
+
+#define DPORT_PRO_SLC1_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x130)
+
+/* DPORT_PRO_SLC1_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_SLC1_INTR_MAP  0x0000001F
+#define DPORT_PRO_SLC1_INTR_MAP_M  ((DPORT_PRO_SLC1_INTR_MAP_V)<<(DPORT_PRO_SLC1_INTR_MAP_S))
+#define DPORT_PRO_SLC1_INTR_MAP_V  0x1F
+#define DPORT_PRO_SLC1_INTR_MAP_S  0
+
+#define DPORT_PRO_UHCI0_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x134)
+
+/* DPORT_PRO_UHCI0_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_UHCI0_INTR_MAP  0x0000001F
+#define DPORT_PRO_UHCI0_INTR_MAP_M  ((DPORT_PRO_UHCI0_INTR_MAP_V)<<(DPORT_PRO_UHCI0_INTR_MAP_S))
+#define DPORT_PRO_UHCI0_INTR_MAP_V  0x1F
+#define DPORT_PRO_UHCI0_INTR_MAP_S  0
+
+#define DPORT_PRO_UHCI1_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x138)
+
+/* DPORT_PRO_UHCI1_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_UHCI1_INTR_MAP  0x0000001F
+#define DPORT_PRO_UHCI1_INTR_MAP_M  ((DPORT_PRO_UHCI1_INTR_MAP_V)<<(DPORT_PRO_UHCI1_INTR_MAP_S))
+#define DPORT_PRO_UHCI1_INTR_MAP_V  0x1F
+#define DPORT_PRO_UHCI1_INTR_MAP_S  0
+
+#define DPORT_PRO_TG_T0_LEVEL_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x13C)
+
+/* DPORT_PRO_TG_T0_LEVEL_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_TG_T0_LEVEL_INT_MAP  0x0000001F
+#define DPORT_PRO_TG_T0_LEVEL_INT_MAP_M  ((DPORT_PRO_TG_T0_LEVEL_INT_MAP_V)<<(DPORT_PRO_TG_T0_LEVEL_INT_MAP_S))
+#define DPORT_PRO_TG_T0_LEVEL_INT_MAP_V  0x1F
+#define DPORT_PRO_TG_T0_LEVEL_INT_MAP_S  0
+
+#define DPORT_PRO_TG_T1_LEVEL_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x140)
+
+/* DPORT_PRO_TG_T1_LEVEL_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_TG_T1_LEVEL_INT_MAP  0x0000001F
+#define DPORT_PRO_TG_T1_LEVEL_INT_MAP_M  ((DPORT_PRO_TG_T1_LEVEL_INT_MAP_V)<<(DPORT_PRO_TG_T1_LEVEL_INT_MAP_S))
+#define DPORT_PRO_TG_T1_LEVEL_INT_MAP_V  0x1F
+#define DPORT_PRO_TG_T1_LEVEL_INT_MAP_S  0
+
+#define DPORT_PRO_TG_WDT_LEVEL_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x144)
+
+/* DPORT_PRO_TG_WDT_LEVEL_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_TG_WDT_LEVEL_INT_MAP  0x0000001F
+#define DPORT_PRO_TG_WDT_LEVEL_INT_MAP_M  ((DPORT_PRO_TG_WDT_LEVEL_INT_MAP_V)<<(DPORT_PRO_TG_WDT_LEVEL_INT_MAP_S))
+#define DPORT_PRO_TG_WDT_LEVEL_INT_MAP_V  0x1F
+#define DPORT_PRO_TG_WDT_LEVEL_INT_MAP_S  0
+
+#define DPORT_PRO_TG_LACT_LEVEL_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x148)
+
+/* DPORT_PRO_TG_LACT_LEVEL_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_TG_LACT_LEVEL_INT_MAP  0x0000001F
+#define DPORT_PRO_TG_LACT_LEVEL_INT_MAP_M  ((DPORT_PRO_TG_LACT_LEVEL_INT_MAP_V)<<(DPORT_PRO_TG_LACT_LEVEL_INT_MAP_S))
+#define DPORT_PRO_TG_LACT_LEVEL_INT_MAP_V  0x1F
+#define DPORT_PRO_TG_LACT_LEVEL_INT_MAP_S  0
+
+#define DPORT_PRO_TG1_T0_LEVEL_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x14C)
+
+/* DPORT_PRO_TG1_T0_LEVEL_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_TG1_T0_LEVEL_INT_MAP  0x0000001F
+#define DPORT_PRO_TG1_T0_LEVEL_INT_MAP_M  ((DPORT_PRO_TG1_T0_LEVEL_INT_MAP_V)<<(DPORT_PRO_TG1_T0_LEVEL_INT_MAP_S))
+#define DPORT_PRO_TG1_T0_LEVEL_INT_MAP_V  0x1F
+#define DPORT_PRO_TG1_T0_LEVEL_INT_MAP_S  0
+
+#define DPORT_PRO_TG1_T1_LEVEL_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x150)
+
+/* DPORT_PRO_TG1_T1_LEVEL_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_TG1_T1_LEVEL_INT_MAP  0x0000001F
+#define DPORT_PRO_TG1_T1_LEVEL_INT_MAP_M  ((DPORT_PRO_TG1_T1_LEVEL_INT_MAP_V)<<(DPORT_PRO_TG1_T1_LEVEL_INT_MAP_S))
+#define DPORT_PRO_TG1_T1_LEVEL_INT_MAP_V  0x1F
+#define DPORT_PRO_TG1_T1_LEVEL_INT_MAP_S  0
+
+#define DPORT_PRO_TG1_WDT_LEVEL_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x154)
+
+/* DPORT_PRO_TG1_WDT_LEVEL_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_TG1_WDT_LEVEL_INT_MAP  0x0000001F
+#define DPORT_PRO_TG1_WDT_LEVEL_INT_MAP_M  ((DPORT_PRO_TG1_WDT_LEVEL_INT_MAP_V)<<(DPORT_PRO_TG1_WDT_LEVEL_INT_MAP_S))
+#define DPORT_PRO_TG1_WDT_LEVEL_INT_MAP_V  0x1F
+#define DPORT_PRO_TG1_WDT_LEVEL_INT_MAP_S  0
+
+#define DPORT_PRO_TG1_LACT_LEVEL_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x158)
+
+/* DPORT_PRO_TG1_LACT_LEVEL_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_TG1_LACT_LEVEL_INT_MAP  0x0000001F
+#define DPORT_PRO_TG1_LACT_LEVEL_INT_MAP_M  ((DPORT_PRO_TG1_LACT_LEVEL_INT_MAP_V)<<(DPORT_PRO_TG1_LACT_LEVEL_INT_MAP_S))
+#define DPORT_PRO_TG1_LACT_LEVEL_INT_MAP_V  0x1F
+#define DPORT_PRO_TG1_LACT_LEVEL_INT_MAP_S  0
+
+#define DPORT_PRO_GPIO_INTERRUPT_MAP_REG          (DR_REG_DPORT_BASE + 0x15C)
+
+/* DPORT_PRO_GPIO_INTERRUPT_PRO_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_GPIO_INTERRUPT_PRO_MAP  0x0000001F
+#define DPORT_PRO_GPIO_INTERRUPT_PRO_MAP_M  ((DPORT_PRO_GPIO_INTERRUPT_PRO_MAP_V)<<(DPORT_PRO_GPIO_INTERRUPT_PRO_MAP_S))
+#define DPORT_PRO_GPIO_INTERRUPT_PRO_MAP_V  0x1F
+#define DPORT_PRO_GPIO_INTERRUPT_PRO_MAP_S  0
+
+#define DPORT_PRO_GPIO_INTERRUPT_NMI_MAP_REG          (DR_REG_DPORT_BASE + 0x160)
+
+/* DPORT_PRO_GPIO_INTERRUPT_PRO_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_GPIO_INTERRUPT_PRO_NMI_MAP  0x0000001F
+#define DPORT_PRO_GPIO_INTERRUPT_PRO_NMI_MAP_M  ((DPORT_PRO_GPIO_INTERRUPT_PRO_NMI_MAP_V)<<(DPORT_PRO_GPIO_INTERRUPT_PRO_NMI_MAP_S))
+#define DPORT_PRO_GPIO_INTERRUPT_PRO_NMI_MAP_V  0x1F
+#define DPORT_PRO_GPIO_INTERRUPT_PRO_NMI_MAP_S  0
+
+#define DPORT_PRO_CPU_INTR_FROM_CPU_0_MAP_REG          (DR_REG_DPORT_BASE + 0x164)
+
+/* DPORT_PRO_CPU_INTR_FROM_CPU_0_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_CPU_INTR_FROM_CPU_0_MAP  0x0000001F
+#define DPORT_PRO_CPU_INTR_FROM_CPU_0_MAP_M  ((DPORT_PRO_CPU_INTR_FROM_CPU_0_MAP_V)<<(DPORT_PRO_CPU_INTR_FROM_CPU_0_MAP_S))
+#define DPORT_PRO_CPU_INTR_FROM_CPU_0_MAP_V  0x1F
+#define DPORT_PRO_CPU_INTR_FROM_CPU_0_MAP_S  0
+
+#define DPORT_PRO_CPU_INTR_FROM_CPU_1_MAP_REG          (DR_REG_DPORT_BASE + 0x168)
+
+/* DPORT_PRO_CPU_INTR_FROM_CPU_1_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_CPU_INTR_FROM_CPU_1_MAP  0x0000001F
+#define DPORT_PRO_CPU_INTR_FROM_CPU_1_MAP_M  ((DPORT_PRO_CPU_INTR_FROM_CPU_1_MAP_V)<<(DPORT_PRO_CPU_INTR_FROM_CPU_1_MAP_S))
+#define DPORT_PRO_CPU_INTR_FROM_CPU_1_MAP_V  0x1F
+#define DPORT_PRO_CPU_INTR_FROM_CPU_1_MAP_S  0
+
+#define DPORT_PRO_CPU_INTR_FROM_CPU_2_MAP_REG          (DR_REG_DPORT_BASE + 0x16C)
+
+/* DPORT_PRO_CPU_INTR_FROM_CPU_2_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_CPU_INTR_FROM_CPU_2_MAP  0x0000001F
+#define DPORT_PRO_CPU_INTR_FROM_CPU_2_MAP_M  ((DPORT_PRO_CPU_INTR_FROM_CPU_2_MAP_V)<<(DPORT_PRO_CPU_INTR_FROM_CPU_2_MAP_S))
+#define DPORT_PRO_CPU_INTR_FROM_CPU_2_MAP_V  0x1F
+#define DPORT_PRO_CPU_INTR_FROM_CPU_2_MAP_S  0
+
+#define DPORT_PRO_CPU_INTR_FROM_CPU_3_MAP_REG          (DR_REG_DPORT_BASE + 0x170)
+
+/* DPORT_PRO_CPU_INTR_FROM_CPU_3_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_CPU_INTR_FROM_CPU_3_MAP  0x0000001F
+#define DPORT_PRO_CPU_INTR_FROM_CPU_3_MAP_M  ((DPORT_PRO_CPU_INTR_FROM_CPU_3_MAP_V)<<(DPORT_PRO_CPU_INTR_FROM_CPU_3_MAP_S))
+#define DPORT_PRO_CPU_INTR_FROM_CPU_3_MAP_V  0x1F
+#define DPORT_PRO_CPU_INTR_FROM_CPU_3_MAP_S  0
+
+#define DPORT_PRO_SPI_INTR_0_MAP_REG          (DR_REG_DPORT_BASE + 0x174)
+
+/* DPORT_PRO_SPI_INTR_0_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_SPI_INTR_0_MAP  0x0000001F
+#define DPORT_PRO_SPI_INTR_0_MAP_M  ((DPORT_PRO_SPI_INTR_0_MAP_V)<<(DPORT_PRO_SPI_INTR_0_MAP_S))
+#define DPORT_PRO_SPI_INTR_0_MAP_V  0x1F
+#define DPORT_PRO_SPI_INTR_0_MAP_S  0
+
+#define DPORT_PRO_SPI_INTR_1_MAP_REG          (DR_REG_DPORT_BASE + 0x178)
+
+/* DPORT_PRO_SPI_INTR_1_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_SPI_INTR_1_MAP  0x0000001F
+#define DPORT_PRO_SPI_INTR_1_MAP_M  ((DPORT_PRO_SPI_INTR_1_MAP_V)<<(DPORT_PRO_SPI_INTR_1_MAP_S))
+#define DPORT_PRO_SPI_INTR_1_MAP_V  0x1F
+#define DPORT_PRO_SPI_INTR_1_MAP_S  0
+
+#define DPORT_PRO_SPI_INTR_2_MAP_REG          (DR_REG_DPORT_BASE + 0x17C)
+
+/* DPORT_PRO_SPI_INTR_2_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_SPI_INTR_2_MAP  0x0000001F
+#define DPORT_PRO_SPI_INTR_2_MAP_M  ((DPORT_PRO_SPI_INTR_2_MAP_V)<<(DPORT_PRO_SPI_INTR_2_MAP_S))
+#define DPORT_PRO_SPI_INTR_2_MAP_V  0x1F
+#define DPORT_PRO_SPI_INTR_2_MAP_S  0
+
+#define DPORT_PRO_SPI_INTR_3_MAP_REG          (DR_REG_DPORT_BASE + 0x180)
+
+/* DPORT_PRO_SPI_INTR_3_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_SPI_INTR_3_MAP  0x0000001F
+#define DPORT_PRO_SPI_INTR_3_MAP_M  ((DPORT_PRO_SPI_INTR_3_MAP_V)<<(DPORT_PRO_SPI_INTR_3_MAP_S))
+#define DPORT_PRO_SPI_INTR_3_MAP_V  0x1F
+#define DPORT_PRO_SPI_INTR_3_MAP_S  0
+
+#define DPORT_PRO_I2S0_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x184)
+
+/* DPORT_PRO_I2S0_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_I2S0_INT_MAP  0x0000001F
+#define DPORT_PRO_I2S0_INT_MAP_M  ((DPORT_PRO_I2S0_INT_MAP_V)<<(DPORT_PRO_I2S0_INT_MAP_S))
+#define DPORT_PRO_I2S0_INT_MAP_V  0x1F
+#define DPORT_PRO_I2S0_INT_MAP_S  0
+
+#define DPORT_PRO_I2S1_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x188)
+
+/* DPORT_PRO_I2S1_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_I2S1_INT_MAP  0x0000001F
+#define DPORT_PRO_I2S1_INT_MAP_M  ((DPORT_PRO_I2S1_INT_MAP_V)<<(DPORT_PRO_I2S1_INT_MAP_S))
+#define DPORT_PRO_I2S1_INT_MAP_V  0x1F
+#define DPORT_PRO_I2S1_INT_MAP_S  0
+
+#define DPORT_PRO_UART_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x18C)
+
+/* DPORT_PRO_UART_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_UART_INTR_MAP  0x0000001F
+#define DPORT_PRO_UART_INTR_MAP_M  ((DPORT_PRO_UART_INTR_MAP_V)<<(DPORT_PRO_UART_INTR_MAP_S))
+#define DPORT_PRO_UART_INTR_MAP_V  0x1F
+#define DPORT_PRO_UART_INTR_MAP_S  0
+
+#define DPORT_PRO_UART1_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x190)
+
+/* DPORT_PRO_UART1_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_UART1_INTR_MAP  0x0000001F
+#define DPORT_PRO_UART1_INTR_MAP_M  ((DPORT_PRO_UART1_INTR_MAP_V)<<(DPORT_PRO_UART1_INTR_MAP_S))
+#define DPORT_PRO_UART1_INTR_MAP_V  0x1F
+#define DPORT_PRO_UART1_INTR_MAP_S  0
+
+#define DPORT_PRO_UART2_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x194)
+
+/* DPORT_PRO_UART2_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_UART2_INTR_MAP  0x0000001F
+#define DPORT_PRO_UART2_INTR_MAP_M  ((DPORT_PRO_UART2_INTR_MAP_V)<<(DPORT_PRO_UART2_INTR_MAP_S))
+#define DPORT_PRO_UART2_INTR_MAP_V  0x1F
+#define DPORT_PRO_UART2_INTR_MAP_S  0
+
+#define DPORT_PRO_SDIO_HOST_INTERRUPT_MAP_REG          (DR_REG_DPORT_BASE + 0x198)
+
+/* DPORT_PRO_SDIO_HOST_INTERRUPT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_SDIO_HOST_INTERRUPT_MAP  0x0000001F
+#define DPORT_PRO_SDIO_HOST_INTERRUPT_MAP_M  ((DPORT_PRO_SDIO_HOST_INTERRUPT_MAP_V)<<(DPORT_PRO_SDIO_HOST_INTERRUPT_MAP_S))
+#define DPORT_PRO_SDIO_HOST_INTERRUPT_MAP_V  0x1F
+#define DPORT_PRO_SDIO_HOST_INTERRUPT_MAP_S  0
+
+#define DPORT_PRO_EMAC_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x19C)
+
+/* DPORT_PRO_EMAC_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_EMAC_INT_MAP  0x0000001F
+#define DPORT_PRO_EMAC_INT_MAP_M  ((DPORT_PRO_EMAC_INT_MAP_V)<<(DPORT_PRO_EMAC_INT_MAP_S))
+#define DPORT_PRO_EMAC_INT_MAP_V  0x1F
+#define DPORT_PRO_EMAC_INT_MAP_S  0
+
+#define DPORT_PRO_PWM0_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x1A0)
+
+/* DPORT_PRO_PWM0_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_PWM0_INTR_MAP  0x0000001F
+#define DPORT_PRO_PWM0_INTR_MAP_M  ((DPORT_PRO_PWM0_INTR_MAP_V)<<(DPORT_PRO_PWM0_INTR_MAP_S))
+#define DPORT_PRO_PWM0_INTR_MAP_V  0x1F
+#define DPORT_PRO_PWM0_INTR_MAP_S  0
+
+#define DPORT_PRO_PWM1_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x1A4)
+
+/* DPORT_PRO_PWM1_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_PWM1_INTR_MAP  0x0000001F
+#define DPORT_PRO_PWM1_INTR_MAP_M  ((DPORT_PRO_PWM1_INTR_MAP_V)<<(DPORT_PRO_PWM1_INTR_MAP_S))
+#define DPORT_PRO_PWM1_INTR_MAP_V  0x1F
+#define DPORT_PRO_PWM1_INTR_MAP_S  0
+
+#define DPORT_PRO_PWM2_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x1A8)
+
+/* DPORT_PRO_PWM2_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_PWM2_INTR_MAP  0x0000001F
+#define DPORT_PRO_PWM2_INTR_MAP_M  ((DPORT_PRO_PWM2_INTR_MAP_V)<<(DPORT_PRO_PWM2_INTR_MAP_S))
+#define DPORT_PRO_PWM2_INTR_MAP_V  0x1F
+#define DPORT_PRO_PWM2_INTR_MAP_S  0
+
+#define DPORT_PRO_PWM3_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x1AC)
+
+/* DPORT_PRO_PWM3_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_PWM3_INTR_MAP  0x0000001F
+#define DPORT_PRO_PWM3_INTR_MAP_M  ((DPORT_PRO_PWM3_INTR_MAP_V)<<(DPORT_PRO_PWM3_INTR_MAP_S))
+#define DPORT_PRO_PWM3_INTR_MAP_V  0x1F
+#define DPORT_PRO_PWM3_INTR_MAP_S  0
+
+#define DPORT_PRO_LEDC_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x1B0)
+
+/* DPORT_PRO_LEDC_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_LEDC_INT_MAP  0x0000001F
+#define DPORT_PRO_LEDC_INT_MAP_M  ((DPORT_PRO_LEDC_INT_MAP_V)<<(DPORT_PRO_LEDC_INT_MAP_S))
+#define DPORT_PRO_LEDC_INT_MAP_V  0x1F
+#define DPORT_PRO_LEDC_INT_MAP_S  0
+
+#define DPORT_PRO_EFUSE_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x1B4)
+
+/* DPORT_PRO_EFUSE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_EFUSE_INT_MAP  0x0000001F
+#define DPORT_PRO_EFUSE_INT_MAP_M  ((DPORT_PRO_EFUSE_INT_MAP_V)<<(DPORT_PRO_EFUSE_INT_MAP_S))
+#define DPORT_PRO_EFUSE_INT_MAP_V  0x1F
+#define DPORT_PRO_EFUSE_INT_MAP_S  0
+
+#define DPORT_PRO_CAN_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x1B8)
+
+/* DPORT_PRO_CAN_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_CAN_INT_MAP  0x0000001F
+#define DPORT_PRO_CAN_INT_MAP_M  ((DPORT_PRO_CAN_INT_MAP_V)<<(DPORT_PRO_CAN_INT_MAP_S))
+#define DPORT_PRO_CAN_INT_MAP_V  0x1F
+#define DPORT_PRO_CAN_INT_MAP_S  0
+
+#define DPORT_PRO_RTC_CORE_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x1BC)
+
+/* DPORT_PRO_RTC_CORE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_RTC_CORE_INTR_MAP  0x0000001F
+#define DPORT_PRO_RTC_CORE_INTR_MAP_M  ((DPORT_PRO_RTC_CORE_INTR_MAP_V)<<(DPORT_PRO_RTC_CORE_INTR_MAP_S))
+#define DPORT_PRO_RTC_CORE_INTR_MAP_V  0x1F
+#define DPORT_PRO_RTC_CORE_INTR_MAP_S  0
+
+#define DPORT_PRO_RMT_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x1C0)
+
+/* DPORT_PRO_RMT_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_RMT_INTR_MAP  0x0000001F
+#define DPORT_PRO_RMT_INTR_MAP_M  ((DPORT_PRO_RMT_INTR_MAP_V)<<(DPORT_PRO_RMT_INTR_MAP_S))
+#define DPORT_PRO_RMT_INTR_MAP_V  0x1F
+#define DPORT_PRO_RMT_INTR_MAP_S  0
+
+#define DPORT_PRO_PCNT_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x1C4)
+
+/* DPORT_PRO_PCNT_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_PCNT_INTR_MAP  0x0000001F
+#define DPORT_PRO_PCNT_INTR_MAP_M  ((DPORT_PRO_PCNT_INTR_MAP_V)<<(DPORT_PRO_PCNT_INTR_MAP_S))
+#define DPORT_PRO_PCNT_INTR_MAP_V  0x1F
+#define DPORT_PRO_PCNT_INTR_MAP_S  0
+
+#define DPORT_PRO_I2C_EXT0_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x1C8)
+
+/* DPORT_PRO_I2C_EXT0_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_I2C_EXT0_INTR_MAP  0x0000001F
+#define DPORT_PRO_I2C_EXT0_INTR_MAP_M  ((DPORT_PRO_I2C_EXT0_INTR_MAP_V)<<(DPORT_PRO_I2C_EXT0_INTR_MAP_S))
+#define DPORT_PRO_I2C_EXT0_INTR_MAP_V  0x1F
+#define DPORT_PRO_I2C_EXT0_INTR_MAP_S  0
+
+#define DPORT_PRO_I2C_EXT1_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x1CC)
+
+/* DPORT_PRO_I2C_EXT1_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_I2C_EXT1_INTR_MAP  0x0000001F
+#define DPORT_PRO_I2C_EXT1_INTR_MAP_M  ((DPORT_PRO_I2C_EXT1_INTR_MAP_V)<<(DPORT_PRO_I2C_EXT1_INTR_MAP_S))
+#define DPORT_PRO_I2C_EXT1_INTR_MAP_V  0x1F
+#define DPORT_PRO_I2C_EXT1_INTR_MAP_S  0
+
+#define DPORT_PRO_RSA_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x1D0)
+
+/* DPORT_PRO_RSA_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_RSA_INTR_MAP  0x0000001F
+#define DPORT_PRO_RSA_INTR_MAP_M  ((DPORT_PRO_RSA_INTR_MAP_V)<<(DPORT_PRO_RSA_INTR_MAP_S))
+#define DPORT_PRO_RSA_INTR_MAP_V  0x1F
+#define DPORT_PRO_RSA_INTR_MAP_S  0
+
+#define DPORT_PRO_SPI1_DMA_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x1D4)
+
+/* DPORT_PRO_SPI1_DMA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_SPI1_DMA_INT_MAP  0x0000001F
+#define DPORT_PRO_SPI1_DMA_INT_MAP_M  ((DPORT_PRO_SPI1_DMA_INT_MAP_V)<<(DPORT_PRO_SPI1_DMA_INT_MAP_S))
+#define DPORT_PRO_SPI1_DMA_INT_MAP_V  0x1F
+#define DPORT_PRO_SPI1_DMA_INT_MAP_S  0
+
+#define DPORT_PRO_SPI2_DMA_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x1D8)
+
+/* DPORT_PRO_SPI2_DMA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_SPI2_DMA_INT_MAP  0x0000001F
+#define DPORT_PRO_SPI2_DMA_INT_MAP_M  ((DPORT_PRO_SPI2_DMA_INT_MAP_V)<<(DPORT_PRO_SPI2_DMA_INT_MAP_S))
+#define DPORT_PRO_SPI2_DMA_INT_MAP_V  0x1F
+#define DPORT_PRO_SPI2_DMA_INT_MAP_S  0
+
+#define DPORT_PRO_SPI3_DMA_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x1DC)
+
+/* DPORT_PRO_SPI3_DMA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_SPI3_DMA_INT_MAP  0x0000001F
+#define DPORT_PRO_SPI3_DMA_INT_MAP_M  ((DPORT_PRO_SPI3_DMA_INT_MAP_V)<<(DPORT_PRO_SPI3_DMA_INT_MAP_S))
+#define DPORT_PRO_SPI3_DMA_INT_MAP_V  0x1F
+#define DPORT_PRO_SPI3_DMA_INT_MAP_S  0
+
+#define DPORT_PRO_WDG_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x1E0)
+
+/* DPORT_PRO_WDG_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_WDG_INT_MAP  0x0000001F
+#define DPORT_PRO_WDG_INT_MAP_M  ((DPORT_PRO_WDG_INT_MAP_V)<<(DPORT_PRO_WDG_INT_MAP_S))
+#define DPORT_PRO_WDG_INT_MAP_V  0x1F
+#define DPORT_PRO_WDG_INT_MAP_S  0
+
+#define DPORT_PRO_TIMER_INT1_MAP_REG          (DR_REG_DPORT_BASE + 0x1E4)
+
+/* DPORT_PRO_TIMER_INT1_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_TIMER_INT1_MAP  0x0000001F
+#define DPORT_PRO_TIMER_INT1_MAP_M  ((DPORT_PRO_TIMER_INT1_MAP_V)<<(DPORT_PRO_TIMER_INT1_MAP_S))
+#define DPORT_PRO_TIMER_INT1_MAP_V  0x1F
+#define DPORT_PRO_TIMER_INT1_MAP_S  0
+
+#define DPORT_PRO_TIMER_INT2_MAP_REG          (DR_REG_DPORT_BASE + 0x1E8)
+
+/* DPORT_PRO_TIMER_INT2_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_TIMER_INT2_MAP  0x0000001F
+#define DPORT_PRO_TIMER_INT2_MAP_M  ((DPORT_PRO_TIMER_INT2_MAP_V)<<(DPORT_PRO_TIMER_INT2_MAP_S))
+#define DPORT_PRO_TIMER_INT2_MAP_V  0x1F
+#define DPORT_PRO_TIMER_INT2_MAP_S  0
+
+#define DPORT_PRO_TG_T0_EDGE_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x1EC)
+
+/* DPORT_PRO_TG_T0_EDGE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_TG_T0_EDGE_INT_MAP  0x0000001F
+#define DPORT_PRO_TG_T0_EDGE_INT_MAP_M  ((DPORT_PRO_TG_T0_EDGE_INT_MAP_V)<<(DPORT_PRO_TG_T0_EDGE_INT_MAP_S))
+#define DPORT_PRO_TG_T0_EDGE_INT_MAP_V  0x1F
+#define DPORT_PRO_TG_T0_EDGE_INT_MAP_S  0
+
+#define DPORT_PRO_TG_T1_EDGE_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x1F0)
+
+/* DPORT_PRO_TG_T1_EDGE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_TG_T1_EDGE_INT_MAP  0x0000001F
+#define DPORT_PRO_TG_T1_EDGE_INT_MAP_M  ((DPORT_PRO_TG_T1_EDGE_INT_MAP_V)<<(DPORT_PRO_TG_T1_EDGE_INT_MAP_S))
+#define DPORT_PRO_TG_T1_EDGE_INT_MAP_V  0x1F
+#define DPORT_PRO_TG_T1_EDGE_INT_MAP_S  0
+
+#define DPORT_PRO_TG_WDT_EDGE_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x1F4)
+
+/* DPORT_PRO_TG_WDT_EDGE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_TG_WDT_EDGE_INT_MAP  0x0000001F
+#define DPORT_PRO_TG_WDT_EDGE_INT_MAP_M  ((DPORT_PRO_TG_WDT_EDGE_INT_MAP_V)<<(DPORT_PRO_TG_WDT_EDGE_INT_MAP_S))
+#define DPORT_PRO_TG_WDT_EDGE_INT_MAP_V  0x1F
+#define DPORT_PRO_TG_WDT_EDGE_INT_MAP_S  0
+
+#define DPORT_PRO_TG_LACT_EDGE_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x1F8)
+
+/* DPORT_PRO_TG_LACT_EDGE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_TG_LACT_EDGE_INT_MAP  0x0000001F
+#define DPORT_PRO_TG_LACT_EDGE_INT_MAP_M  ((DPORT_PRO_TG_LACT_EDGE_INT_MAP_V)<<(DPORT_PRO_TG_LACT_EDGE_INT_MAP_S))
+#define DPORT_PRO_TG_LACT_EDGE_INT_MAP_V  0x1F
+#define DPORT_PRO_TG_LACT_EDGE_INT_MAP_S  0
+
+#define DPORT_PRO_TG1_T0_EDGE_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x1FC)
+
+/* DPORT_PRO_TG1_T0_EDGE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_TG1_T0_EDGE_INT_MAP  0x0000001F
+#define DPORT_PRO_TG1_T0_EDGE_INT_MAP_M  ((DPORT_PRO_TG1_T0_EDGE_INT_MAP_V)<<(DPORT_PRO_TG1_T0_EDGE_INT_MAP_S))
+#define DPORT_PRO_TG1_T0_EDGE_INT_MAP_V  0x1F
+#define DPORT_PRO_TG1_T0_EDGE_INT_MAP_S  0
+
+#define DPORT_PRO_TG1_T1_EDGE_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x200)
+
+/* DPORT_PRO_TG1_T1_EDGE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_TG1_T1_EDGE_INT_MAP  0x0000001F
+#define DPORT_PRO_TG1_T1_EDGE_INT_MAP_M  ((DPORT_PRO_TG1_T1_EDGE_INT_MAP_V)<<(DPORT_PRO_TG1_T1_EDGE_INT_MAP_S))
+#define DPORT_PRO_TG1_T1_EDGE_INT_MAP_V  0x1F
+#define DPORT_PRO_TG1_T1_EDGE_INT_MAP_S  0
+
+#define DPORT_PRO_TG1_WDT_EDGE_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x204)
+
+/* DPORT_PRO_TG1_WDT_EDGE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_TG1_WDT_EDGE_INT_MAP  0x0000001F
+#define DPORT_PRO_TG1_WDT_EDGE_INT_MAP_M  ((DPORT_PRO_TG1_WDT_EDGE_INT_MAP_V)<<(DPORT_PRO_TG1_WDT_EDGE_INT_MAP_S))
+#define DPORT_PRO_TG1_WDT_EDGE_INT_MAP_V  0x1F
+#define DPORT_PRO_TG1_WDT_EDGE_INT_MAP_S  0
+
+#define DPORT_PRO_TG1_LACT_EDGE_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x208)
+
+/* DPORT_PRO_TG1_LACT_EDGE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_TG1_LACT_EDGE_INT_MAP  0x0000001F
+#define DPORT_PRO_TG1_LACT_EDGE_INT_MAP_M  ((DPORT_PRO_TG1_LACT_EDGE_INT_MAP_V)<<(DPORT_PRO_TG1_LACT_EDGE_INT_MAP_S))
+#define DPORT_PRO_TG1_LACT_EDGE_INT_MAP_V  0x1F
+#define DPORT_PRO_TG1_LACT_EDGE_INT_MAP_S  0
+
+#define DPORT_PRO_MMU_IA_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x20C)
+
+/* DPORT_PRO_MMU_IA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_MMU_IA_INT_MAP  0x0000001F
+#define DPORT_PRO_MMU_IA_INT_MAP_M  ((DPORT_PRO_MMU_IA_INT_MAP_V)<<(DPORT_PRO_MMU_IA_INT_MAP_S))
+#define DPORT_PRO_MMU_IA_INT_MAP_V  0x1F
+#define DPORT_PRO_MMU_IA_INT_MAP_S  0
+
+#define DPORT_PRO_MPU_IA_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x210)
+
+/* DPORT_PRO_MPU_IA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_MPU_IA_INT_MAP  0x0000001F
+#define DPORT_PRO_MPU_IA_INT_MAP_M  ((DPORT_PRO_MPU_IA_INT_MAP_V)<<(DPORT_PRO_MPU_IA_INT_MAP_S))
+#define DPORT_PRO_MPU_IA_INT_MAP_V  0x1F
+#define DPORT_PRO_MPU_IA_INT_MAP_S  0
+
+#define DPORT_PRO_CACHE_IA_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x214)
+
+/* DPORT_PRO_CACHE_IA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_IA_INT_MAP  0x0000001F
+#define DPORT_PRO_CACHE_IA_INT_MAP_M  ((DPORT_PRO_CACHE_IA_INT_MAP_V)<<(DPORT_PRO_CACHE_IA_INT_MAP_S))
+#define DPORT_PRO_CACHE_IA_INT_MAP_V  0x1F
+#define DPORT_PRO_CACHE_IA_INT_MAP_S  0
+
+#define DPORT_APP_MAC_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x218)
+
+/* DPORT_APP_MAC_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_MAC_INTR_MAP  0x0000001F
+#define DPORT_APP_MAC_INTR_MAP_M  ((DPORT_APP_MAC_INTR_MAP_V)<<(DPORT_APP_MAC_INTR_MAP_S))
+#define DPORT_APP_MAC_INTR_MAP_V  0x1F
+#define DPORT_APP_MAC_INTR_MAP_S  0
+
+#define DPORT_APP_MAC_NMI_MAP_REG          (DR_REG_DPORT_BASE + 0x21C)
+
+/* DPORT_APP_MAC_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_MAC_NMI_MAP  0x0000001F
+#define DPORT_APP_MAC_NMI_MAP_M  ((DPORT_APP_MAC_NMI_MAP_V)<<(DPORT_APP_MAC_NMI_MAP_S))
+#define DPORT_APP_MAC_NMI_MAP_V  0x1F
+#define DPORT_APP_MAC_NMI_MAP_S  0
+
+#define DPORT_APP_BB_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x220)
+
+/* DPORT_APP_BB_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_BB_INT_MAP  0x0000001F
+#define DPORT_APP_BB_INT_MAP_M  ((DPORT_APP_BB_INT_MAP_V)<<(DPORT_APP_BB_INT_MAP_S))
+#define DPORT_APP_BB_INT_MAP_V  0x1F
+#define DPORT_APP_BB_INT_MAP_S  0
+
+#define DPORT_APP_BT_MAC_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x224)
+
+/* DPORT_APP_BT_MAC_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_BT_MAC_INT_MAP  0x0000001F
+#define DPORT_APP_BT_MAC_INT_MAP_M  ((DPORT_APP_BT_MAC_INT_MAP_V)<<(DPORT_APP_BT_MAC_INT_MAP_S))
+#define DPORT_APP_BT_MAC_INT_MAP_V  0x1F
+#define DPORT_APP_BT_MAC_INT_MAP_S  0
+
+#define DPORT_APP_BT_BB_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x228)
+
+/* DPORT_APP_BT_BB_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_BT_BB_INT_MAP  0x0000001F
+#define DPORT_APP_BT_BB_INT_MAP_M  ((DPORT_APP_BT_BB_INT_MAP_V)<<(DPORT_APP_BT_BB_INT_MAP_S))
+#define DPORT_APP_BT_BB_INT_MAP_V  0x1F
+#define DPORT_APP_BT_BB_INT_MAP_S  0
+
+#define DPORT_APP_BT_BB_NMI_MAP_REG          (DR_REG_DPORT_BASE + 0x22C)
+
+/* DPORT_APP_BT_BB_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_BT_BB_NMI_MAP  0x0000001F
+#define DPORT_APP_BT_BB_NMI_MAP_M  ((DPORT_APP_BT_BB_NMI_MAP_V)<<(DPORT_APP_BT_BB_NMI_MAP_S))
+#define DPORT_APP_BT_BB_NMI_MAP_V  0x1F
+#define DPORT_APP_BT_BB_NMI_MAP_S  0
+
+#define DPORT_APP_RWBT_IRQ_MAP_REG          (DR_REG_DPORT_BASE + 0x230)
+
+/* DPORT_APP_RWBT_IRQ_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_RWBT_IRQ_MAP  0x0000001F
+#define DPORT_APP_RWBT_IRQ_MAP_M  ((DPORT_APP_RWBT_IRQ_MAP_V)<<(DPORT_APP_RWBT_IRQ_MAP_S))
+#define DPORT_APP_RWBT_IRQ_MAP_V  0x1F
+#define DPORT_APP_RWBT_IRQ_MAP_S  0
+
+#define DPORT_APP_RWBLE_IRQ_MAP_REG          (DR_REG_DPORT_BASE + 0x234)
+
+/* DPORT_APP_RWBLE_IRQ_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_RWBLE_IRQ_MAP  0x0000001F
+#define DPORT_APP_RWBLE_IRQ_MAP_M  ((DPORT_APP_RWBLE_IRQ_MAP_V)<<(DPORT_APP_RWBLE_IRQ_MAP_S))
+#define DPORT_APP_RWBLE_IRQ_MAP_V  0x1F
+#define DPORT_APP_RWBLE_IRQ_MAP_S  0
+
+#define DPORT_APP_RWBT_NMI_MAP_REG          (DR_REG_DPORT_BASE + 0x238)
+
+/* DPORT_APP_RWBT_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_RWBT_NMI_MAP  0x0000001F
+#define DPORT_APP_RWBT_NMI_MAP_M  ((DPORT_APP_RWBT_NMI_MAP_V)<<(DPORT_APP_RWBT_NMI_MAP_S))
+#define DPORT_APP_RWBT_NMI_MAP_V  0x1F
+#define DPORT_APP_RWBT_NMI_MAP_S  0
+
+#define DPORT_APP_RWBLE_NMI_MAP_REG          (DR_REG_DPORT_BASE + 0x23C)
+
+/* DPORT_APP_RWBLE_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_RWBLE_NMI_MAP  0x0000001F
+#define DPORT_APP_RWBLE_NMI_MAP_M  ((DPORT_APP_RWBLE_NMI_MAP_V)<<(DPORT_APP_RWBLE_NMI_MAP_S))
+#define DPORT_APP_RWBLE_NMI_MAP_V  0x1F
+#define DPORT_APP_RWBLE_NMI_MAP_S  0
+
+#define DPORT_APP_SLC0_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x240)
+
+/* DPORT_APP_SLC0_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_SLC0_INTR_MAP  0x0000001F
+#define DPORT_APP_SLC0_INTR_MAP_M  ((DPORT_APP_SLC0_INTR_MAP_V)<<(DPORT_APP_SLC0_INTR_MAP_S))
+#define DPORT_APP_SLC0_INTR_MAP_V  0x1F
+#define DPORT_APP_SLC0_INTR_MAP_S  0
+
+#define DPORT_APP_SLC1_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x244)
+
+/* DPORT_APP_SLC1_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_SLC1_INTR_MAP  0x0000001F
+#define DPORT_APP_SLC1_INTR_MAP_M  ((DPORT_APP_SLC1_INTR_MAP_V)<<(DPORT_APP_SLC1_INTR_MAP_S))
+#define DPORT_APP_SLC1_INTR_MAP_V  0x1F
+#define DPORT_APP_SLC1_INTR_MAP_S  0
+
+#define DPORT_APP_UHCI0_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x248)
+
+/* DPORT_APP_UHCI0_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_UHCI0_INTR_MAP  0x0000001F
+#define DPORT_APP_UHCI0_INTR_MAP_M  ((DPORT_APP_UHCI0_INTR_MAP_V)<<(DPORT_APP_UHCI0_INTR_MAP_S))
+#define DPORT_APP_UHCI0_INTR_MAP_V  0x1F
+#define DPORT_APP_UHCI0_INTR_MAP_S  0
+
+#define DPORT_APP_UHCI1_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x24C)
+
+/* DPORT_APP_UHCI1_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_UHCI1_INTR_MAP  0x0000001F
+#define DPORT_APP_UHCI1_INTR_MAP_M  ((DPORT_APP_UHCI1_INTR_MAP_V)<<(DPORT_APP_UHCI1_INTR_MAP_S))
+#define DPORT_APP_UHCI1_INTR_MAP_V  0x1F
+#define DPORT_APP_UHCI1_INTR_MAP_S  0
+
+#define DPORT_APP_TG_T0_LEVEL_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x250)
+
+/* DPORT_APP_TG_T0_LEVEL_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_TG_T0_LEVEL_INT_MAP  0x0000001F
+#define DPORT_APP_TG_T0_LEVEL_INT_MAP_M  ((DPORT_APP_TG_T0_LEVEL_INT_MAP_V)<<(DPORT_APP_TG_T0_LEVEL_INT_MAP_S))
+#define DPORT_APP_TG_T0_LEVEL_INT_MAP_V  0x1F
+#define DPORT_APP_TG_T0_LEVEL_INT_MAP_S  0
+
+#define DPORT_APP_TG_T1_LEVEL_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x254)
+
+/* DPORT_APP_TG_T1_LEVEL_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_TG_T1_LEVEL_INT_MAP  0x0000001F
+#define DPORT_APP_TG_T1_LEVEL_INT_MAP_M  ((DPORT_APP_TG_T1_LEVEL_INT_MAP_V)<<(DPORT_APP_TG_T1_LEVEL_INT_MAP_S))
+#define DPORT_APP_TG_T1_LEVEL_INT_MAP_V  0x1F
+#define DPORT_APP_TG_T1_LEVEL_INT_MAP_S  0
+
+#define DPORT_APP_TG_WDT_LEVEL_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x258)
+
+/* DPORT_APP_TG_WDT_LEVEL_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_TG_WDT_LEVEL_INT_MAP  0x0000001F
+#define DPORT_APP_TG_WDT_LEVEL_INT_MAP_M  ((DPORT_APP_TG_WDT_LEVEL_INT_MAP_V)<<(DPORT_APP_TG_WDT_LEVEL_INT_MAP_S))
+#define DPORT_APP_TG_WDT_LEVEL_INT_MAP_V  0x1F
+#define DPORT_APP_TG_WDT_LEVEL_INT_MAP_S  0
+
+#define DPORT_APP_TG_LACT_LEVEL_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x25C)
+
+/* DPORT_APP_TG_LACT_LEVEL_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_TG_LACT_LEVEL_INT_MAP  0x0000001F
+#define DPORT_APP_TG_LACT_LEVEL_INT_MAP_M  ((DPORT_APP_TG_LACT_LEVEL_INT_MAP_V)<<(DPORT_APP_TG_LACT_LEVEL_INT_MAP_S))
+#define DPORT_APP_TG_LACT_LEVEL_INT_MAP_V  0x1F
+#define DPORT_APP_TG_LACT_LEVEL_INT_MAP_S  0
+
+#define DPORT_APP_TG1_T0_LEVEL_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x260)
+
+/* DPORT_APP_TG1_T0_LEVEL_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_TG1_T0_LEVEL_INT_MAP  0x0000001F
+#define DPORT_APP_TG1_T0_LEVEL_INT_MAP_M  ((DPORT_APP_TG1_T0_LEVEL_INT_MAP_V)<<(DPORT_APP_TG1_T0_LEVEL_INT_MAP_S))
+#define DPORT_APP_TG1_T0_LEVEL_INT_MAP_V  0x1F
+#define DPORT_APP_TG1_T0_LEVEL_INT_MAP_S  0
+
+#define DPORT_APP_TG1_T1_LEVEL_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x264)
+
+/* DPORT_APP_TG1_T1_LEVEL_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_TG1_T1_LEVEL_INT_MAP  0x0000001F
+#define DPORT_APP_TG1_T1_LEVEL_INT_MAP_M  ((DPORT_APP_TG1_T1_LEVEL_INT_MAP_V)<<(DPORT_APP_TG1_T1_LEVEL_INT_MAP_S))
+#define DPORT_APP_TG1_T1_LEVEL_INT_MAP_V  0x1F
+#define DPORT_APP_TG1_T1_LEVEL_INT_MAP_S  0
+
+#define DPORT_APP_TG1_WDT_LEVEL_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x268)
+
+/* DPORT_APP_TG1_WDT_LEVEL_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_TG1_WDT_LEVEL_INT_MAP  0x0000001F
+#define DPORT_APP_TG1_WDT_LEVEL_INT_MAP_M  ((DPORT_APP_TG1_WDT_LEVEL_INT_MAP_V)<<(DPORT_APP_TG1_WDT_LEVEL_INT_MAP_S))
+#define DPORT_APP_TG1_WDT_LEVEL_INT_MAP_V  0x1F
+#define DPORT_APP_TG1_WDT_LEVEL_INT_MAP_S  0
+
+#define DPORT_APP_TG1_LACT_LEVEL_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x26C)
+
+/* DPORT_APP_TG1_LACT_LEVEL_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_TG1_LACT_LEVEL_INT_MAP  0x0000001F
+#define DPORT_APP_TG1_LACT_LEVEL_INT_MAP_M  ((DPORT_APP_TG1_LACT_LEVEL_INT_MAP_V)<<(DPORT_APP_TG1_LACT_LEVEL_INT_MAP_S))
+#define DPORT_APP_TG1_LACT_LEVEL_INT_MAP_V  0x1F
+#define DPORT_APP_TG1_LACT_LEVEL_INT_MAP_S  0
+
+#define DPORT_APP_GPIO_INTERRUPT_MAP_REG          (DR_REG_DPORT_BASE + 0x270)
+
+/* DPORT_APP_GPIO_INTERRUPT_APP_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_GPIO_INTERRUPT_APP_MAP  0x0000001F
+#define DPORT_APP_GPIO_INTERRUPT_APP_MAP_M  ((DPORT_APP_GPIO_INTERRUPT_APP_MAP_V)<<(DPORT_APP_GPIO_INTERRUPT_APP_MAP_S))
+#define DPORT_APP_GPIO_INTERRUPT_APP_MAP_V  0x1F
+#define DPORT_APP_GPIO_INTERRUPT_APP_MAP_S  0
+
+#define DPORT_APP_GPIO_INTERRUPT_NMI_MAP_REG          (DR_REG_DPORT_BASE + 0x274)
+
+/* DPORT_APP_GPIO_INTERRUPT_APP_NMI_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_GPIO_INTERRUPT_APP_NMI_MAP  0x0000001F
+#define DPORT_APP_GPIO_INTERRUPT_APP_NMI_MAP_M  ((DPORT_APP_GPIO_INTERRUPT_APP_NMI_MAP_V)<<(DPORT_APP_GPIO_INTERRUPT_APP_NMI_MAP_S))
+#define DPORT_APP_GPIO_INTERRUPT_APP_NMI_MAP_V  0x1F
+#define DPORT_APP_GPIO_INTERRUPT_APP_NMI_MAP_S  0
+
+#define DPORT_APP_CPU_INTR_FROM_CPU_0_MAP_REG          (DR_REG_DPORT_BASE + 0x278)
+
+/* DPORT_APP_CPU_INTR_FROM_CPU_0_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_CPU_INTR_FROM_CPU_0_MAP  0x0000001F
+#define DPORT_APP_CPU_INTR_FROM_CPU_0_MAP_M  ((DPORT_APP_CPU_INTR_FROM_CPU_0_MAP_V)<<(DPORT_APP_CPU_INTR_FROM_CPU_0_MAP_S))
+#define DPORT_APP_CPU_INTR_FROM_CPU_0_MAP_V  0x1F
+#define DPORT_APP_CPU_INTR_FROM_CPU_0_MAP_S  0
+
+#define DPORT_APP_CPU_INTR_FROM_CPU_1_MAP_REG          (DR_REG_DPORT_BASE + 0x27C)
+
+/* DPORT_APP_CPU_INTR_FROM_CPU_1_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_CPU_INTR_FROM_CPU_1_MAP  0x0000001F
+#define DPORT_APP_CPU_INTR_FROM_CPU_1_MAP_M  ((DPORT_APP_CPU_INTR_FROM_CPU_1_MAP_V)<<(DPORT_APP_CPU_INTR_FROM_CPU_1_MAP_S))
+#define DPORT_APP_CPU_INTR_FROM_CPU_1_MAP_V  0x1F
+#define DPORT_APP_CPU_INTR_FROM_CPU_1_MAP_S  0
+
+#define DPORT_APP_CPU_INTR_FROM_CPU_2_MAP_REG          (DR_REG_DPORT_BASE + 0x280)
+
+/* DPORT_APP_CPU_INTR_FROM_CPU_2_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_CPU_INTR_FROM_CPU_2_MAP  0x0000001F
+#define DPORT_APP_CPU_INTR_FROM_CPU_2_MAP_M  ((DPORT_APP_CPU_INTR_FROM_CPU_2_MAP_V)<<(DPORT_APP_CPU_INTR_FROM_CPU_2_MAP_S))
+#define DPORT_APP_CPU_INTR_FROM_CPU_2_MAP_V  0x1F
+#define DPORT_APP_CPU_INTR_FROM_CPU_2_MAP_S  0
+
+#define DPORT_APP_CPU_INTR_FROM_CPU_3_MAP_REG          (DR_REG_DPORT_BASE + 0x284)
+
+/* DPORT_APP_CPU_INTR_FROM_CPU_3_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_CPU_INTR_FROM_CPU_3_MAP  0x0000001F
+#define DPORT_APP_CPU_INTR_FROM_CPU_3_MAP_M  ((DPORT_APP_CPU_INTR_FROM_CPU_3_MAP_V)<<(DPORT_APP_CPU_INTR_FROM_CPU_3_MAP_S))
+#define DPORT_APP_CPU_INTR_FROM_CPU_3_MAP_V  0x1F
+#define DPORT_APP_CPU_INTR_FROM_CPU_3_MAP_S  0
+
+#define DPORT_APP_SPI_INTR_0_MAP_REG          (DR_REG_DPORT_BASE + 0x288)
+
+/* DPORT_APP_SPI_INTR_0_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_SPI_INTR_0_MAP  0x0000001F
+#define DPORT_APP_SPI_INTR_0_MAP_M  ((DPORT_APP_SPI_INTR_0_MAP_V)<<(DPORT_APP_SPI_INTR_0_MAP_S))
+#define DPORT_APP_SPI_INTR_0_MAP_V  0x1F
+#define DPORT_APP_SPI_INTR_0_MAP_S  0
+
+#define DPORT_APP_SPI_INTR_1_MAP_REG          (DR_REG_DPORT_BASE + 0x28C)
+
+/* DPORT_APP_SPI_INTR_1_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_SPI_INTR_1_MAP  0x0000001F
+#define DPORT_APP_SPI_INTR_1_MAP_M  ((DPORT_APP_SPI_INTR_1_MAP_V)<<(DPORT_APP_SPI_INTR_1_MAP_S))
+#define DPORT_APP_SPI_INTR_1_MAP_V  0x1F
+#define DPORT_APP_SPI_INTR_1_MAP_S  0
+
+#define DPORT_APP_SPI_INTR_2_MAP_REG          (DR_REG_DPORT_BASE + 0x290)
+
+/* DPORT_APP_SPI_INTR_2_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_SPI_INTR_2_MAP  0x0000001F
+#define DPORT_APP_SPI_INTR_2_MAP_M  ((DPORT_APP_SPI_INTR_2_MAP_V)<<(DPORT_APP_SPI_INTR_2_MAP_S))
+#define DPORT_APP_SPI_INTR_2_MAP_V  0x1F
+#define DPORT_APP_SPI_INTR_2_MAP_S  0
+
+#define DPORT_APP_SPI_INTR_3_MAP_REG          (DR_REG_DPORT_BASE + 0x294)
+
+/* DPORT_APP_SPI_INTR_3_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_SPI_INTR_3_MAP  0x0000001F
+#define DPORT_APP_SPI_INTR_3_MAP_M  ((DPORT_APP_SPI_INTR_3_MAP_V)<<(DPORT_APP_SPI_INTR_3_MAP_S))
+#define DPORT_APP_SPI_INTR_3_MAP_V  0x1F
+#define DPORT_APP_SPI_INTR_3_MAP_S  0
+
+#define DPORT_APP_I2S0_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x298)
+
+/* DPORT_APP_I2S0_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_I2S0_INT_MAP  0x0000001F
+#define DPORT_APP_I2S0_INT_MAP_M  ((DPORT_APP_I2S0_INT_MAP_V)<<(DPORT_APP_I2S0_INT_MAP_S))
+#define DPORT_APP_I2S0_INT_MAP_V  0x1F
+#define DPORT_APP_I2S0_INT_MAP_S  0
+
+#define DPORT_APP_I2S1_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x29C)
+
+/* DPORT_APP_I2S1_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_I2S1_INT_MAP  0x0000001F
+#define DPORT_APP_I2S1_INT_MAP_M  ((DPORT_APP_I2S1_INT_MAP_V)<<(DPORT_APP_I2S1_INT_MAP_S))
+#define DPORT_APP_I2S1_INT_MAP_V  0x1F
+#define DPORT_APP_I2S1_INT_MAP_S  0
+
+#define DPORT_APP_UART_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x2A0)
+
+/* DPORT_APP_UART_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_UART_INTR_MAP  0x0000001F
+#define DPORT_APP_UART_INTR_MAP_M  ((DPORT_APP_UART_INTR_MAP_V)<<(DPORT_APP_UART_INTR_MAP_S))
+#define DPORT_APP_UART_INTR_MAP_V  0x1F
+#define DPORT_APP_UART_INTR_MAP_S  0
+
+#define DPORT_APP_UART1_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x2A4)
+
+/* DPORT_APP_UART1_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_UART1_INTR_MAP  0x0000001F
+#define DPORT_APP_UART1_INTR_MAP_M  ((DPORT_APP_UART1_INTR_MAP_V)<<(DPORT_APP_UART1_INTR_MAP_S))
+#define DPORT_APP_UART1_INTR_MAP_V  0x1F
+#define DPORT_APP_UART1_INTR_MAP_S  0
+
+#define DPORT_APP_UART2_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x2A8)
+
+/* DPORT_APP_UART2_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_UART2_INTR_MAP  0x0000001F
+#define DPORT_APP_UART2_INTR_MAP_M  ((DPORT_APP_UART2_INTR_MAP_V)<<(DPORT_APP_UART2_INTR_MAP_S))
+#define DPORT_APP_UART2_INTR_MAP_V  0x1F
+#define DPORT_APP_UART2_INTR_MAP_S  0
+
+#define DPORT_APP_SDIO_HOST_INTERRUPT_MAP_REG          (DR_REG_DPORT_BASE + 0x2AC)
+
+/* DPORT_APP_SDIO_HOST_INTERRUPT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_SDIO_HOST_INTERRUPT_MAP  0x0000001F
+#define DPORT_APP_SDIO_HOST_INTERRUPT_MAP_M  ((DPORT_APP_SDIO_HOST_INTERRUPT_MAP_V)<<(DPORT_APP_SDIO_HOST_INTERRUPT_MAP_S))
+#define DPORT_APP_SDIO_HOST_INTERRUPT_MAP_V  0x1F
+#define DPORT_APP_SDIO_HOST_INTERRUPT_MAP_S  0
+
+#define DPORT_APP_EMAC_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x2B0)
+
+/* DPORT_APP_EMAC_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_EMAC_INT_MAP  0x0000001F
+#define DPORT_APP_EMAC_INT_MAP_M  ((DPORT_APP_EMAC_INT_MAP_V)<<(DPORT_APP_EMAC_INT_MAP_S))
+#define DPORT_APP_EMAC_INT_MAP_V  0x1F
+#define DPORT_APP_EMAC_INT_MAP_S  0
+
+#define DPORT_APP_PWM0_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x2B4)
+
+/* DPORT_APP_PWM0_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_PWM0_INTR_MAP  0x0000001F
+#define DPORT_APP_PWM0_INTR_MAP_M  ((DPORT_APP_PWM0_INTR_MAP_V)<<(DPORT_APP_PWM0_INTR_MAP_S))
+#define DPORT_APP_PWM0_INTR_MAP_V  0x1F
+#define DPORT_APP_PWM0_INTR_MAP_S  0
+
+#define DPORT_APP_PWM1_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x2B8)
+
+/* DPORT_APP_PWM1_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_PWM1_INTR_MAP  0x0000001F
+#define DPORT_APP_PWM1_INTR_MAP_M  ((DPORT_APP_PWM1_INTR_MAP_V)<<(DPORT_APP_PWM1_INTR_MAP_S))
+#define DPORT_APP_PWM1_INTR_MAP_V  0x1F
+#define DPORT_APP_PWM1_INTR_MAP_S  0
+
+#define DPORT_APP_PWM2_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x2BC)
+
+/* DPORT_APP_PWM2_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_PWM2_INTR_MAP  0x0000001F
+#define DPORT_APP_PWM2_INTR_MAP_M  ((DPORT_APP_PWM2_INTR_MAP_V)<<(DPORT_APP_PWM2_INTR_MAP_S))
+#define DPORT_APP_PWM2_INTR_MAP_V  0x1F
+#define DPORT_APP_PWM2_INTR_MAP_S  0
+
+#define DPORT_APP_PWM3_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x2C0)
+
+/* DPORT_APP_PWM3_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_PWM3_INTR_MAP  0x0000001F
+#define DPORT_APP_PWM3_INTR_MAP_M  ((DPORT_APP_PWM3_INTR_MAP_V)<<(DPORT_APP_PWM3_INTR_MAP_S))
+#define DPORT_APP_PWM3_INTR_MAP_V  0x1F
+#define DPORT_APP_PWM3_INTR_MAP_S  0
+
+#define DPORT_APP_LEDC_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x2C4)
+
+/* DPORT_APP_LEDC_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_LEDC_INT_MAP  0x0000001F
+#define DPORT_APP_LEDC_INT_MAP_M  ((DPORT_APP_LEDC_INT_MAP_V)<<(DPORT_APP_LEDC_INT_MAP_S))
+#define DPORT_APP_LEDC_INT_MAP_V  0x1F
+#define DPORT_APP_LEDC_INT_MAP_S  0
+
+#define DPORT_APP_EFUSE_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x2C8)
+
+/* DPORT_APP_EFUSE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_EFUSE_INT_MAP  0x0000001F
+#define DPORT_APP_EFUSE_INT_MAP_M  ((DPORT_APP_EFUSE_INT_MAP_V)<<(DPORT_APP_EFUSE_INT_MAP_S))
+#define DPORT_APP_EFUSE_INT_MAP_V  0x1F
+#define DPORT_APP_EFUSE_INT_MAP_S  0
+
+#define DPORT_APP_CAN_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x2CC)
+
+/* DPORT_APP_CAN_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_CAN_INT_MAP  0x0000001F
+#define DPORT_APP_CAN_INT_MAP_M  ((DPORT_APP_CAN_INT_MAP_V)<<(DPORT_APP_CAN_INT_MAP_S))
+#define DPORT_APP_CAN_INT_MAP_V  0x1F
+#define DPORT_APP_CAN_INT_MAP_S  0
+
+#define DPORT_APP_RTC_CORE_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x2D0)
+
+/* DPORT_APP_RTC_CORE_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_RTC_CORE_INTR_MAP  0x0000001F
+#define DPORT_APP_RTC_CORE_INTR_MAP_M  ((DPORT_APP_RTC_CORE_INTR_MAP_V)<<(DPORT_APP_RTC_CORE_INTR_MAP_S))
+#define DPORT_APP_RTC_CORE_INTR_MAP_V  0x1F
+#define DPORT_APP_RTC_CORE_INTR_MAP_S  0
+
+#define DPORT_APP_RMT_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x2D4)
+
+/* DPORT_APP_RMT_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_RMT_INTR_MAP  0x0000001F
+#define DPORT_APP_RMT_INTR_MAP_M  ((DPORT_APP_RMT_INTR_MAP_V)<<(DPORT_APP_RMT_INTR_MAP_S))
+#define DPORT_APP_RMT_INTR_MAP_V  0x1F
+#define DPORT_APP_RMT_INTR_MAP_S  0
+
+#define DPORT_APP_PCNT_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x2D8)
+
+/* DPORT_APP_PCNT_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_PCNT_INTR_MAP  0x0000001F
+#define DPORT_APP_PCNT_INTR_MAP_M  ((DPORT_APP_PCNT_INTR_MAP_V)<<(DPORT_APP_PCNT_INTR_MAP_S))
+#define DPORT_APP_PCNT_INTR_MAP_V  0x1F
+#define DPORT_APP_PCNT_INTR_MAP_S  0
+
+#define DPORT_APP_I2C_EXT0_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x2DC)
+
+/* DPORT_APP_I2C_EXT0_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_I2C_EXT0_INTR_MAP  0x0000001F
+#define DPORT_APP_I2C_EXT0_INTR_MAP_M  ((DPORT_APP_I2C_EXT0_INTR_MAP_V)<<(DPORT_APP_I2C_EXT0_INTR_MAP_S))
+#define DPORT_APP_I2C_EXT0_INTR_MAP_V  0x1F
+#define DPORT_APP_I2C_EXT0_INTR_MAP_S  0
+
+#define DPORT_APP_I2C_EXT1_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x2E0)
+
+/* DPORT_APP_I2C_EXT1_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_I2C_EXT1_INTR_MAP  0x0000001F
+#define DPORT_APP_I2C_EXT1_INTR_MAP_M  ((DPORT_APP_I2C_EXT1_INTR_MAP_V)<<(DPORT_APP_I2C_EXT1_INTR_MAP_S))
+#define DPORT_APP_I2C_EXT1_INTR_MAP_V  0x1F
+#define DPORT_APP_I2C_EXT1_INTR_MAP_S  0
+
+#define DPORT_APP_RSA_INTR_MAP_REG          (DR_REG_DPORT_BASE + 0x2E4)
+
+/* DPORT_APP_RSA_INTR_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_RSA_INTR_MAP  0x0000001F
+#define DPORT_APP_RSA_INTR_MAP_M  ((DPORT_APP_RSA_INTR_MAP_V)<<(DPORT_APP_RSA_INTR_MAP_S))
+#define DPORT_APP_RSA_INTR_MAP_V  0x1F
+#define DPORT_APP_RSA_INTR_MAP_S  0
+
+#define DPORT_APP_SPI1_DMA_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x2E8)
+
+/* DPORT_APP_SPI1_DMA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_SPI1_DMA_INT_MAP  0x0000001F
+#define DPORT_APP_SPI1_DMA_INT_MAP_M  ((DPORT_APP_SPI1_DMA_INT_MAP_V)<<(DPORT_APP_SPI1_DMA_INT_MAP_S))
+#define DPORT_APP_SPI1_DMA_INT_MAP_V  0x1F
+#define DPORT_APP_SPI1_DMA_INT_MAP_S  0
+
+#define DPORT_APP_SPI2_DMA_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x2EC)
+
+/* DPORT_APP_SPI2_DMA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_SPI2_DMA_INT_MAP  0x0000001F
+#define DPORT_APP_SPI2_DMA_INT_MAP_M  ((DPORT_APP_SPI2_DMA_INT_MAP_V)<<(DPORT_APP_SPI2_DMA_INT_MAP_S))
+#define DPORT_APP_SPI2_DMA_INT_MAP_V  0x1F
+#define DPORT_APP_SPI2_DMA_INT_MAP_S  0
+
+#define DPORT_APP_SPI3_DMA_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x2F0)
+
+/* DPORT_APP_SPI3_DMA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_SPI3_DMA_INT_MAP  0x0000001F
+#define DPORT_APP_SPI3_DMA_INT_MAP_M  ((DPORT_APP_SPI3_DMA_INT_MAP_V)<<(DPORT_APP_SPI3_DMA_INT_MAP_S))
+#define DPORT_APP_SPI3_DMA_INT_MAP_V  0x1F
+#define DPORT_APP_SPI3_DMA_INT_MAP_S  0
+
+#define DPORT_APP_WDG_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x2F4)
+
+/* DPORT_APP_WDG_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_WDG_INT_MAP  0x0000001F
+#define DPORT_APP_WDG_INT_MAP_M  ((DPORT_APP_WDG_INT_MAP_V)<<(DPORT_APP_WDG_INT_MAP_S))
+#define DPORT_APP_WDG_INT_MAP_V  0x1F
+#define DPORT_APP_WDG_INT_MAP_S  0
+
+#define DPORT_APP_TIMER_INT1_MAP_REG          (DR_REG_DPORT_BASE + 0x2F8)
+
+/* DPORT_APP_TIMER_INT1_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_TIMER_INT1_MAP  0x0000001F
+#define DPORT_APP_TIMER_INT1_MAP_M  ((DPORT_APP_TIMER_INT1_MAP_V)<<(DPORT_APP_TIMER_INT1_MAP_S))
+#define DPORT_APP_TIMER_INT1_MAP_V  0x1F
+#define DPORT_APP_TIMER_INT1_MAP_S  0
+
+#define DPORT_APP_TIMER_INT2_MAP_REG          (DR_REG_DPORT_BASE + 0x2FC)
+
+/* DPORT_APP_TIMER_INT2_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_TIMER_INT2_MAP  0x0000001F
+#define DPORT_APP_TIMER_INT2_MAP_M  ((DPORT_APP_TIMER_INT2_MAP_V)<<(DPORT_APP_TIMER_INT2_MAP_S))
+#define DPORT_APP_TIMER_INT2_MAP_V  0x1F
+#define DPORT_APP_TIMER_INT2_MAP_S  0
+
+#define DPORT_APP_TG_T0_EDGE_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x300)
+
+/* DPORT_APP_TG_T0_EDGE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_TG_T0_EDGE_INT_MAP  0x0000001F
+#define DPORT_APP_TG_T0_EDGE_INT_MAP_M  ((DPORT_APP_TG_T0_EDGE_INT_MAP_V)<<(DPORT_APP_TG_T0_EDGE_INT_MAP_S))
+#define DPORT_APP_TG_T0_EDGE_INT_MAP_V  0x1F
+#define DPORT_APP_TG_T0_EDGE_INT_MAP_S  0
+
+#define DPORT_APP_TG_T1_EDGE_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x304)
+
+/* DPORT_APP_TG_T1_EDGE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_TG_T1_EDGE_INT_MAP  0x0000001F
+#define DPORT_APP_TG_T1_EDGE_INT_MAP_M  ((DPORT_APP_TG_T1_EDGE_INT_MAP_V)<<(DPORT_APP_TG_T1_EDGE_INT_MAP_S))
+#define DPORT_APP_TG_T1_EDGE_INT_MAP_V  0x1F
+#define DPORT_APP_TG_T1_EDGE_INT_MAP_S  0
+
+#define DPORT_APP_TG_WDT_EDGE_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x308)
+
+/* DPORT_APP_TG_WDT_EDGE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_TG_WDT_EDGE_INT_MAP  0x0000001F
+#define DPORT_APP_TG_WDT_EDGE_INT_MAP_M  ((DPORT_APP_TG_WDT_EDGE_INT_MAP_V)<<(DPORT_APP_TG_WDT_EDGE_INT_MAP_S))
+#define DPORT_APP_TG_WDT_EDGE_INT_MAP_V  0x1F
+#define DPORT_APP_TG_WDT_EDGE_INT_MAP_S  0
+
+#define DPORT_APP_TG_LACT_EDGE_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x30C)
+
+/* DPORT_APP_TG_LACT_EDGE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_TG_LACT_EDGE_INT_MAP  0x0000001F
+#define DPORT_APP_TG_LACT_EDGE_INT_MAP_M  ((DPORT_APP_TG_LACT_EDGE_INT_MAP_V)<<(DPORT_APP_TG_LACT_EDGE_INT_MAP_S))
+#define DPORT_APP_TG_LACT_EDGE_INT_MAP_V  0x1F
+#define DPORT_APP_TG_LACT_EDGE_INT_MAP_S  0
+
+#define DPORT_APP_TG1_T0_EDGE_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x310)
+
+/* DPORT_APP_TG1_T0_EDGE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_TG1_T0_EDGE_INT_MAP  0x0000001F
+#define DPORT_APP_TG1_T0_EDGE_INT_MAP_M  ((DPORT_APP_TG1_T0_EDGE_INT_MAP_V)<<(DPORT_APP_TG1_T0_EDGE_INT_MAP_S))
+#define DPORT_APP_TG1_T0_EDGE_INT_MAP_V  0x1F
+#define DPORT_APP_TG1_T0_EDGE_INT_MAP_S  0
+
+#define DPORT_APP_TG1_T1_EDGE_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x314)
+
+/* DPORT_APP_TG1_T1_EDGE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_TG1_T1_EDGE_INT_MAP  0x0000001F
+#define DPORT_APP_TG1_T1_EDGE_INT_MAP_M  ((DPORT_APP_TG1_T1_EDGE_INT_MAP_V)<<(DPORT_APP_TG1_T1_EDGE_INT_MAP_S))
+#define DPORT_APP_TG1_T1_EDGE_INT_MAP_V  0x1F
+#define DPORT_APP_TG1_T1_EDGE_INT_MAP_S  0
+
+#define DPORT_APP_TG1_WDT_EDGE_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x318)
+
+/* DPORT_APP_TG1_WDT_EDGE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_TG1_WDT_EDGE_INT_MAP  0x0000001F
+#define DPORT_APP_TG1_WDT_EDGE_INT_MAP_M  ((DPORT_APP_TG1_WDT_EDGE_INT_MAP_V)<<(DPORT_APP_TG1_WDT_EDGE_INT_MAP_S))
+#define DPORT_APP_TG1_WDT_EDGE_INT_MAP_V  0x1F
+#define DPORT_APP_TG1_WDT_EDGE_INT_MAP_S  0
+
+#define DPORT_APP_TG1_LACT_EDGE_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x31C)
+
+/* DPORT_APP_TG1_LACT_EDGE_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_TG1_LACT_EDGE_INT_MAP  0x0000001F
+#define DPORT_APP_TG1_LACT_EDGE_INT_MAP_M  ((DPORT_APP_TG1_LACT_EDGE_INT_MAP_V)<<(DPORT_APP_TG1_LACT_EDGE_INT_MAP_S))
+#define DPORT_APP_TG1_LACT_EDGE_INT_MAP_V  0x1F
+#define DPORT_APP_TG1_LACT_EDGE_INT_MAP_S  0
+
+#define DPORT_APP_MMU_IA_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x320)
+
+/* DPORT_APP_MMU_IA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_MMU_IA_INT_MAP  0x0000001F
+#define DPORT_APP_MMU_IA_INT_MAP_M  ((DPORT_APP_MMU_IA_INT_MAP_V)<<(DPORT_APP_MMU_IA_INT_MAP_S))
+#define DPORT_APP_MMU_IA_INT_MAP_V  0x1F
+#define DPORT_APP_MMU_IA_INT_MAP_S  0
+
+#define DPORT_APP_MPU_IA_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x324)
+
+/* DPORT_APP_MPU_IA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_MPU_IA_INT_MAP  0x0000001F
+#define DPORT_APP_MPU_IA_INT_MAP_M  ((DPORT_APP_MPU_IA_INT_MAP_V)<<(DPORT_APP_MPU_IA_INT_MAP_S))
+#define DPORT_APP_MPU_IA_INT_MAP_V  0x1F
+#define DPORT_APP_MPU_IA_INT_MAP_S  0
+
+#define DPORT_APP_CACHE_IA_INT_MAP_REG          (DR_REG_DPORT_BASE + 0x328)
+
+/* DPORT_APP_CACHE_IA_INT_MAP : R/W ;bitpos:[4:0] ;default: 5'd16 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_IA_INT_MAP  0x0000001F
+#define DPORT_APP_CACHE_IA_INT_MAP_M  ((DPORT_APP_CACHE_IA_INT_MAP_V)<<(DPORT_APP_CACHE_IA_INT_MAP_S))
+#define DPORT_APP_CACHE_IA_INT_MAP_V  0x1F
+#define DPORT_APP_CACHE_IA_INT_MAP_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_UART_REG          (DR_REG_DPORT_BASE + 0x32C)
+
+/* DPORT_UART_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_UART_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_UART_ACCESS_GRANT_CONFIG_M  ((DPORT_UART_ACCESS_GRANT_CONFIG_V)<<(DPORT_UART_ACCESS_GRANT_CONFIG_S))
+#define DPORT_UART_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_UART_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_SPI1_REG          (DR_REG_DPORT_BASE + 0x330)
+
+/* DPORT_SPI1_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_SPI1_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_SPI1_ACCESS_GRANT_CONFIG_M  ((DPORT_SPI1_ACCESS_GRANT_CONFIG_V)<<(DPORT_SPI1_ACCESS_GRANT_CONFIG_S))
+#define DPORT_SPI1_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_SPI1_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_SPI0_REG          (DR_REG_DPORT_BASE + 0x334)
+
+/* DPORT_SPI0_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_SPI0_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_SPI0_ACCESS_GRANT_CONFIG_M  ((DPORT_SPI0_ACCESS_GRANT_CONFIG_V)<<(DPORT_SPI0_ACCESS_GRANT_CONFIG_S))
+#define DPORT_SPI0_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_SPI0_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_GPIO_REG          (DR_REG_DPORT_BASE + 0x338)
+
+/* DPORT_GPIO_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_GPIO_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_GPIO_ACCESS_GRANT_CONFIG_M  ((DPORT_GPIO_ACCESS_GRANT_CONFIG_V)<<(DPORT_GPIO_ACCESS_GRANT_CONFIG_S))
+#define DPORT_GPIO_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_GPIO_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_FE2_REG          (DR_REG_DPORT_BASE + 0x33C)
+
+/* DPORT_FE2_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_FE2_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_FE2_ACCESS_GRANT_CONFIG_M  ((DPORT_FE2_ACCESS_GRANT_CONFIG_V)<<(DPORT_FE2_ACCESS_GRANT_CONFIG_S))
+#define DPORT_FE2_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_FE2_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_FE_REG          (DR_REG_DPORT_BASE + 0x340)
+
+/* DPORT_FE_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_FE_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_FE_ACCESS_GRANT_CONFIG_M  ((DPORT_FE_ACCESS_GRANT_CONFIG_V)<<(DPORT_FE_ACCESS_GRANT_CONFIG_S))
+#define DPORT_FE_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_FE_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_TIMER_REG          (DR_REG_DPORT_BASE + 0x344)
+
+/* DPORT_TIMER_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_TIMER_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_TIMER_ACCESS_GRANT_CONFIG_M  ((DPORT_TIMER_ACCESS_GRANT_CONFIG_V)<<(DPORT_TIMER_ACCESS_GRANT_CONFIG_S))
+#define DPORT_TIMER_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_TIMER_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_RTC_REG          (DR_REG_DPORT_BASE + 0x348)
+
+/* DPORT_RTC_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_RTC_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_RTC_ACCESS_GRANT_CONFIG_M  ((DPORT_RTC_ACCESS_GRANT_CONFIG_V)<<(DPORT_RTC_ACCESS_GRANT_CONFIG_S))
+#define DPORT_RTC_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_RTC_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_IO_MUX_REG          (DR_REG_DPORT_BASE + 0x34C)
+
+/* DPORT_IOMUX_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_IOMUX_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_IOMUX_ACCESS_GRANT_CONFIG_M  ((DPORT_IOMUX_ACCESS_GRANT_CONFIG_V)<<(DPORT_IOMUX_ACCESS_GRANT_CONFIG_S))
+#define DPORT_IOMUX_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_IOMUX_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_WDG_REG          (DR_REG_DPORT_BASE + 0x350)
+
+/* DPORT_WDG_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_WDG_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_WDG_ACCESS_GRANT_CONFIG_M  ((DPORT_WDG_ACCESS_GRANT_CONFIG_V)<<(DPORT_WDG_ACCESS_GRANT_CONFIG_S))
+#define DPORT_WDG_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_WDG_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_HINF_REG          (DR_REG_DPORT_BASE + 0x354)
+
+/* DPORT_HINF_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_HINF_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_HINF_ACCESS_GRANT_CONFIG_M  ((DPORT_HINF_ACCESS_GRANT_CONFIG_V)<<(DPORT_HINF_ACCESS_GRANT_CONFIG_S))
+#define DPORT_HINF_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_HINF_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_UHCI1_REG          (DR_REG_DPORT_BASE + 0x358)
+
+/* DPORT_UHCI1_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_UHCI1_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_UHCI1_ACCESS_GRANT_CONFIG_M  ((DPORT_UHCI1_ACCESS_GRANT_CONFIG_V)<<(DPORT_UHCI1_ACCESS_GRANT_CONFIG_S))
+#define DPORT_UHCI1_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_UHCI1_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_MISC_REG          (DR_REG_DPORT_BASE + 0x35C)
+
+/* DPORT_MISC_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_MISC_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_MISC_ACCESS_GRANT_CONFIG_M  ((DPORT_MISC_ACCESS_GRANT_CONFIG_V)<<(DPORT_MISC_ACCESS_GRANT_CONFIG_S))
+#define DPORT_MISC_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_MISC_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_I2C_REG          (DR_REG_DPORT_BASE + 0x360)
+
+/* DPORT_I2C_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_I2C_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_I2C_ACCESS_GRANT_CONFIG_M  ((DPORT_I2C_ACCESS_GRANT_CONFIG_V)<<(DPORT_I2C_ACCESS_GRANT_CONFIG_S))
+#define DPORT_I2C_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_I2C_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_I2S0_REG          (DR_REG_DPORT_BASE + 0x364)
+
+/* DPORT_I2S0_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_I2S0_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_I2S0_ACCESS_GRANT_CONFIG_M  ((DPORT_I2S0_ACCESS_GRANT_CONFIG_V)<<(DPORT_I2S0_ACCESS_GRANT_CONFIG_S))
+#define DPORT_I2S0_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_I2S0_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_UART1_REG          (DR_REG_DPORT_BASE + 0x368)
+
+/* DPORT_UART1_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_UART1_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_UART1_ACCESS_GRANT_CONFIG_M  ((DPORT_UART1_ACCESS_GRANT_CONFIG_V)<<(DPORT_UART1_ACCESS_GRANT_CONFIG_S))
+#define DPORT_UART1_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_UART1_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_BT_REG          (DR_REG_DPORT_BASE + 0x36C)
+
+/* DPORT_BT_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_BT_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_BT_ACCESS_GRANT_CONFIG_M  ((DPORT_BT_ACCESS_GRANT_CONFIG_V)<<(DPORT_BT_ACCESS_GRANT_CONFIG_S))
+#define DPORT_BT_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_BT_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_BT_BUFFER_REG          (DR_REG_DPORT_BASE + 0x370)
+
+/* DPORT_BTBUFFER_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_BTBUFFER_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_BTBUFFER_ACCESS_GRANT_CONFIG_M  ((DPORT_BTBUFFER_ACCESS_GRANT_CONFIG_V)<<(DPORT_BTBUFFER_ACCESS_GRANT_CONFIG_S))
+#define DPORT_BTBUFFER_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_BTBUFFER_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_I2C_EXT0_REG          (DR_REG_DPORT_BASE + 0x374)
+
+/* DPORT_I2CEXT0_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_I2CEXT0_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_I2CEXT0_ACCESS_GRANT_CONFIG_M  ((DPORT_I2CEXT0_ACCESS_GRANT_CONFIG_V)<<(DPORT_I2CEXT0_ACCESS_GRANT_CONFIG_S))
+#define DPORT_I2CEXT0_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_I2CEXT0_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_UHCI0_REG          (DR_REG_DPORT_BASE + 0x378)
+
+/* DPORT_UHCI0_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_UHCI0_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_UHCI0_ACCESS_GRANT_CONFIG_M  ((DPORT_UHCI0_ACCESS_GRANT_CONFIG_V)<<(DPORT_UHCI0_ACCESS_GRANT_CONFIG_S))
+#define DPORT_UHCI0_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_UHCI0_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_SLCHOST_REG          (DR_REG_DPORT_BASE + 0x37C)
+
+/* DPORT_SLCHOST_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_SLCHOST_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_SLCHOST_ACCESS_GRANT_CONFIG_M  ((DPORT_SLCHOST_ACCESS_GRANT_CONFIG_V)<<(DPORT_SLCHOST_ACCESS_GRANT_CONFIG_S))
+#define DPORT_SLCHOST_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_SLCHOST_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_RMT_REG          (DR_REG_DPORT_BASE + 0x380)
+
+/* DPORT_RMT_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_RMT_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_RMT_ACCESS_GRANT_CONFIG_M  ((DPORT_RMT_ACCESS_GRANT_CONFIG_V)<<(DPORT_RMT_ACCESS_GRANT_CONFIG_S))
+#define DPORT_RMT_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_RMT_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_PCNT_REG          (DR_REG_DPORT_BASE + 0x384)
+
+/* DPORT_PCNT_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_PCNT_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_PCNT_ACCESS_GRANT_CONFIG_M  ((DPORT_PCNT_ACCESS_GRANT_CONFIG_V)<<(DPORT_PCNT_ACCESS_GRANT_CONFIG_S))
+#define DPORT_PCNT_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_PCNT_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_SLC_REG          (DR_REG_DPORT_BASE + 0x388)
+
+/* DPORT_SLC_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_SLC_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_SLC_ACCESS_GRANT_CONFIG_M  ((DPORT_SLC_ACCESS_GRANT_CONFIG_V)<<(DPORT_SLC_ACCESS_GRANT_CONFIG_S))
+#define DPORT_SLC_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_SLC_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_LEDC_REG          (DR_REG_DPORT_BASE + 0x38C)
+
+/* DPORT_LEDC_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_LEDC_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_LEDC_ACCESS_GRANT_CONFIG_M  ((DPORT_LEDC_ACCESS_GRANT_CONFIG_V)<<(DPORT_LEDC_ACCESS_GRANT_CONFIG_S))
+#define DPORT_LEDC_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_LEDC_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_EFUSE_REG          (DR_REG_DPORT_BASE + 0x390)
+
+/* DPORT_EFUSE_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_EFUSE_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_EFUSE_ACCESS_GRANT_CONFIG_M  ((DPORT_EFUSE_ACCESS_GRANT_CONFIG_V)<<(DPORT_EFUSE_ACCESS_GRANT_CONFIG_S))
+#define DPORT_EFUSE_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_EFUSE_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_SPI_ENCRYPT_REG          (DR_REG_DPORT_BASE + 0x394)
+
+/* DPORT_SPI_ENCRYPY_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_SPI_ENCRYPY_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_SPI_ENCRYPY_ACCESS_GRANT_CONFIG_M  ((DPORT_SPI_ENCRYPY_ACCESS_GRANT_CONFIG_V)<<(DPORT_SPI_ENCRYPY_ACCESS_GRANT_CONFIG_S))
+#define DPORT_SPI_ENCRYPY_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_SPI_ENCRYPY_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_BB_REG          (DR_REG_DPORT_BASE + 0x398)
+
+/* DPORT_BB_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_BB_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_BB_ACCESS_GRANT_CONFIG_M  ((DPORT_BB_ACCESS_GRANT_CONFIG_V)<<(DPORT_BB_ACCESS_GRANT_CONFIG_S))
+#define DPORT_BB_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_BB_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_PWM0_REG          (DR_REG_DPORT_BASE + 0x39C)
+
+/* DPORT_PWM0_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_PWM0_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_PWM0_ACCESS_GRANT_CONFIG_M  ((DPORT_PWM0_ACCESS_GRANT_CONFIG_V)<<(DPORT_PWM0_ACCESS_GRANT_CONFIG_S))
+#define DPORT_PWM0_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_PWM0_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_TIMERGROUP_REG          (DR_REG_DPORT_BASE + 0x3A0)
+
+/* DPORT_TIMERGROUP_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_TIMERGROUP_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_TIMERGROUP_ACCESS_GRANT_CONFIG_M  ((DPORT_TIMERGROUP_ACCESS_GRANT_CONFIG_V)<<(DPORT_TIMERGROUP_ACCESS_GRANT_CONFIG_S))
+#define DPORT_TIMERGROUP_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_TIMERGROUP_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_TIMERGROUP1_REG          (DR_REG_DPORT_BASE + 0x3A4)
+
+/* DPORT_TIMERGROUP1_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_TIMERGROUP1_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_TIMERGROUP1_ACCESS_GRANT_CONFIG_M  ((DPORT_TIMERGROUP1_ACCESS_GRANT_CONFIG_V)<<(DPORT_TIMERGROUP1_ACCESS_GRANT_CONFIG_S))
+#define DPORT_TIMERGROUP1_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_TIMERGROUP1_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_SPI2_REG          (DR_REG_DPORT_BASE + 0x3A8)
+
+/* DPORT_SPI2_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_SPI2_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_SPI2_ACCESS_GRANT_CONFIG_M  ((DPORT_SPI2_ACCESS_GRANT_CONFIG_V)<<(DPORT_SPI2_ACCESS_GRANT_CONFIG_S))
+#define DPORT_SPI2_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_SPI2_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_SPI3_REG          (DR_REG_DPORT_BASE + 0x3AC)
+
+/* DPORT_SPI3_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_SPI3_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_SPI3_ACCESS_GRANT_CONFIG_M  ((DPORT_SPI3_ACCESS_GRANT_CONFIG_V)<<(DPORT_SPI3_ACCESS_GRANT_CONFIG_S))
+#define DPORT_SPI3_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_SPI3_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_APB_CTRL_REG          (DR_REG_DPORT_BASE + 0x3B0)
+
+/* DPORT_APBCTRL_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_APBCTRL_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_APBCTRL_ACCESS_GRANT_CONFIG_M  ((DPORT_APBCTRL_ACCESS_GRANT_CONFIG_V)<<(DPORT_APBCTRL_ACCESS_GRANT_CONFIG_S))
+#define DPORT_APBCTRL_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_APBCTRL_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_I2C_EXT1_REG          (DR_REG_DPORT_BASE + 0x3B4)
+
+/* DPORT_I2CEXT1_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_I2CEXT1_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_I2CEXT1_ACCESS_GRANT_CONFIG_M  ((DPORT_I2CEXT1_ACCESS_GRANT_CONFIG_V)<<(DPORT_I2CEXT1_ACCESS_GRANT_CONFIG_S))
+#define DPORT_I2CEXT1_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_I2CEXT1_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_SDIO_HOST_REG          (DR_REG_DPORT_BASE + 0x3B8)
+
+/* DPORT_SDIOHOST_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_SDIOHOST_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_SDIOHOST_ACCESS_GRANT_CONFIG_M  ((DPORT_SDIOHOST_ACCESS_GRANT_CONFIG_V)<<(DPORT_SDIOHOST_ACCESS_GRANT_CONFIG_S))
+#define DPORT_SDIOHOST_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_SDIOHOST_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_EMAC_REG          (DR_REG_DPORT_BASE + 0x3BC)
+
+/* DPORT_EMAC_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_EMAC_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_EMAC_ACCESS_GRANT_CONFIG_M  ((DPORT_EMAC_ACCESS_GRANT_CONFIG_V)<<(DPORT_EMAC_ACCESS_GRANT_CONFIG_S))
+#define DPORT_EMAC_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_EMAC_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_CAN_REG          (DR_REG_DPORT_BASE + 0x3C0)
+
+/* DPORT_CAN_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_CAN_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_CAN_ACCESS_GRANT_CONFIG_M  ((DPORT_CAN_ACCESS_GRANT_CONFIG_V)<<(DPORT_CAN_ACCESS_GRANT_CONFIG_S))
+#define DPORT_CAN_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_CAN_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_PWM1_REG          (DR_REG_DPORT_BASE + 0x3C4)
+
+/* DPORT_PWM1_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_PWM1_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_PWM1_ACCESS_GRANT_CONFIG_M  ((DPORT_PWM1_ACCESS_GRANT_CONFIG_V)<<(DPORT_PWM1_ACCESS_GRANT_CONFIG_S))
+#define DPORT_PWM1_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_PWM1_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_I2S1_REG          (DR_REG_DPORT_BASE + 0x3C8)
+
+/* DPORT_I2S1_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_I2S1_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_I2S1_ACCESS_GRANT_CONFIG_M  ((DPORT_I2S1_ACCESS_GRANT_CONFIG_V)<<(DPORT_I2S1_ACCESS_GRANT_CONFIG_S))
+#define DPORT_I2S1_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_I2S1_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_UART2_REG          (DR_REG_DPORT_BASE + 0x3CC)
+
+/* DPORT_UART2_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_UART2_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_UART2_ACCESS_GRANT_CONFIG_M  ((DPORT_UART2_ACCESS_GRANT_CONFIG_V)<<(DPORT_UART2_ACCESS_GRANT_CONFIG_S))
+#define DPORT_UART2_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_UART2_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_PWM2_REG          (DR_REG_DPORT_BASE + 0x3D0)
+
+/* DPORT_PWM2_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_PWM2_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_PWM2_ACCESS_GRANT_CONFIG_M  ((DPORT_PWM2_ACCESS_GRANT_CONFIG_V)<<(DPORT_PWM2_ACCESS_GRANT_CONFIG_S))
+#define DPORT_PWM2_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_PWM2_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_PWM3_REG          (DR_REG_DPORT_BASE + 0x3D4)
+
+/* DPORT_PWM3_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_PWM3_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_PWM3_ACCESS_GRANT_CONFIG_M  ((DPORT_PWM3_ACCESS_GRANT_CONFIG_V)<<(DPORT_PWM3_ACCESS_GRANT_CONFIG_S))
+#define DPORT_PWM3_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_PWM3_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_RWBT_REG          (DR_REG_DPORT_BASE + 0x3D8)
+
+/* DPORT_RWBT_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_RWBT_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_RWBT_ACCESS_GRANT_CONFIG_M  ((DPORT_RWBT_ACCESS_GRANT_CONFIG_V)<<(DPORT_RWBT_ACCESS_GRANT_CONFIG_S))
+#define DPORT_RWBT_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_RWBT_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_BTMAC_REG          (DR_REG_DPORT_BASE + 0x3DC)
+
+/* DPORT_BTMAC_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_BTMAC_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_BTMAC_ACCESS_GRANT_CONFIG_M  ((DPORT_BTMAC_ACCESS_GRANT_CONFIG_V)<<(DPORT_BTMAC_ACCESS_GRANT_CONFIG_S))
+#define DPORT_BTMAC_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_BTMAC_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_WIFIMAC_REG          (DR_REG_DPORT_BASE + 0x3E0)
+
+/* DPORT_WIFIMAC_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_WIFIMAC_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_WIFIMAC_ACCESS_GRANT_CONFIG_M  ((DPORT_WIFIMAC_ACCESS_GRANT_CONFIG_V)<<(DPORT_WIFIMAC_ACCESS_GRANT_CONFIG_S))
+#define DPORT_WIFIMAC_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_WIFIMAC_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_AHBLITE_MPU_TABLE_PWR_REG          (DR_REG_DPORT_BASE + 0x3E4)
+
+/* DPORT_PWR_ACCESS_GRANT_CONFIG : R/W ;bitpos:[5:0] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_PWR_ACCESS_GRANT_CONFIG  0x0000003F
+#define DPORT_PWR_ACCESS_GRANT_CONFIG_M  ((DPORT_PWR_ACCESS_GRANT_CONFIG_V)<<(DPORT_PWR_ACCESS_GRANT_CONFIG_S))
+#define DPORT_PWR_ACCESS_GRANT_CONFIG_V  0x3F
+#define DPORT_PWR_ACCESS_GRANT_CONFIG_S  0
+
+#define DPORT_MEM_ACCESS_DBUG0_REG          (DR_REG_DPORT_BASE + 0x3E8)
+
+/* DPORT_INTERNAL_SRAM_MMU_MULTI_HIT : RO ;bitpos:[29:26] ;default: 4'b0 ; */
+/* Description: */
+
+#define DPORT_INTERNAL_SRAM_MMU_MULTI_HIT  0x0000000F
+#define DPORT_INTERNAL_SRAM_MMU_MULTI_HIT_M  ((DPORT_INTERNAL_SRAM_MMU_MULTI_HIT_V)<<(DPORT_INTERNAL_SRAM_MMU_MULTI_HIT_S))
+#define DPORT_INTERNAL_SRAM_MMU_MULTI_HIT_V  0xF
+#define DPORT_INTERNAL_SRAM_MMU_MULTI_HIT_S  26
+
+/* DPORT_INTERNAL_SRAM_IA : RO ;bitpos:[25:14] ;default: 12'b0 ; */
+/* Description: */
+
+#define DPORT_INTERNAL_SRAM_IA  0x00000FFF
+#define DPORT_INTERNAL_SRAM_IA_M  ((DPORT_INTERNAL_SRAM_IA_V)<<(DPORT_INTERNAL_SRAM_IA_S))
+#define DPORT_INTERNAL_SRAM_IA_V  0xFFF
+#define DPORT_INTERNAL_SRAM_IA_S  14
+
+/* DPORT_INTERNAL_SRAM_MMU_AD : RO ;bitpos:[13:10] ;default: 4'b0 ; */
+/* Description: */
+
+#define DPORT_INTERNAL_SRAM_MMU_AD  0x0000000F
+#define DPORT_INTERNAL_SRAM_MMU_AD_M  ((DPORT_INTERNAL_SRAM_MMU_AD_V)<<(DPORT_INTERNAL_SRAM_MMU_AD_S))
+#define DPORT_INTERNAL_SRAM_MMU_AD_V  0xF
+#define DPORT_INTERNAL_SRAM_MMU_AD_S  10
+
+/* DPORT_SHARE_ROM_IA : RO ;bitpos:[9:6] ;default: 4'b0 ; */
+/* Description: */
+
+#define DPORT_SHARE_ROM_IA  0x0000000F
+#define DPORT_SHARE_ROM_IA_M  ((DPORT_SHARE_ROM_IA_V)<<(DPORT_SHARE_ROM_IA_S))
+#define DPORT_SHARE_ROM_IA_V  0xF
+#define DPORT_SHARE_ROM_IA_S  6
+
+/* DPORT_SHARE_ROM_MPU_AD : RO ;bitpos:[5:4] ;default: 2'b0 ; */
+/* Description: */
+
+#define DPORT_SHARE_ROM_MPU_AD  0x00000003
+#define DPORT_SHARE_ROM_MPU_AD_M  ((DPORT_SHARE_ROM_MPU_AD_V)<<(DPORT_SHARE_ROM_MPU_AD_S))
+#define DPORT_SHARE_ROM_MPU_AD_V  0x3
+#define DPORT_SHARE_ROM_MPU_AD_S  4
+
+/* DPORT_APP_ROM_IA : RO ;bitpos:[3] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_ROM_IA  (BIT(3))
+#define DPORT_APP_ROM_IA_M  (BIT(3))
+#define DPORT_APP_ROM_IA_V  0x1
+#define DPORT_APP_ROM_IA_S  3
+
+/* DPORT_APP_ROM_MPU_AD : RO ;bitpos:[2] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_ROM_MPU_AD  (BIT(2))
+#define DPORT_APP_ROM_MPU_AD_M  (BIT(2))
+#define DPORT_APP_ROM_MPU_AD_V  0x1
+#define DPORT_APP_ROM_MPU_AD_S  2
+
+/* DPORT_PRO_ROM_IA : RO ;bitpos:[1] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_ROM_IA  (BIT(1))
+#define DPORT_PRO_ROM_IA_M  (BIT(1))
+#define DPORT_PRO_ROM_IA_V  0x1
+#define DPORT_PRO_ROM_IA_S  1
+
+/* DPORT_PRO_ROM_MPU_AD : RO ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_ROM_MPU_AD  (BIT(0))
+#define DPORT_PRO_ROM_MPU_AD_M  (BIT(0))
+#define DPORT_PRO_ROM_MPU_AD_V  0x1
+#define DPORT_PRO_ROM_MPU_AD_S  0
+
+#define DPORT_MEM_ACCESS_DBUG1_REG          (DR_REG_DPORT_BASE + 0x3EC)
+
+/* DPORT_AHBLITE_IA : RO ;bitpos:[10] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_AHBLITE_IA  (BIT(10))
+#define DPORT_AHBLITE_IA_M  (BIT(10))
+#define DPORT_AHBLITE_IA_V  0x1
+#define DPORT_AHBLITE_IA_S  10
+
+/* DPORT_AHBLITE_ACCESS_DENY : RO ;bitpos:[9] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_AHBLITE_ACCESS_DENY  (BIT(9))
+#define DPORT_AHBLITE_ACCESS_DENY_M  (BIT(9))
+#define DPORT_AHBLITE_ACCESS_DENY_V  0x1
+#define DPORT_AHBLITE_ACCESS_DENY_S  9
+
+/* DPORT_AHB_ACCESS_DENY : RO ;bitpos:[8] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_AHB_ACCESS_DENY  (BIT(8))
+#define DPORT_AHB_ACCESS_DENY_M  (BIT(8))
+#define DPORT_AHB_ACCESS_DENY_V  0x1
+#define DPORT_AHB_ACCESS_DENY_S  8
+
+/* DPORT_PIDGEN_IA : RO ;bitpos:[7:6] ;default: 2'b0 ; */
+/* Description: */
+
+#define DPORT_PIDGEN_IA  0x00000003
+#define DPORT_PIDGEN_IA_M  ((DPORT_PIDGEN_IA_V)<<(DPORT_PIDGEN_IA_S))
+#define DPORT_PIDGEN_IA_V  0x3
+#define DPORT_PIDGEN_IA_S  6
+
+/* DPORT_ARB_IA : RO ;bitpos:[5:4] ;default: 2'b0 ; */
+/* Description: */
+
+#define DPORT_ARB_IA  0x00000003
+#define DPORT_ARB_IA_M  ((DPORT_ARB_IA_V)<<(DPORT_ARB_IA_S))
+#define DPORT_ARB_IA_V  0x3
+#define DPORT_ARB_IA_S  4
+
+/* DPORT_INTERNAL_SRAM_MMU_MISS : RO ;bitpos:[3:0] ;default: 4'b0 ; */
+/* Description: */
+
+#define DPORT_INTERNAL_SRAM_MMU_MISS  0x0000000F
+#define DPORT_INTERNAL_SRAM_MMU_MISS_M  ((DPORT_INTERNAL_SRAM_MMU_MISS_V)<<(DPORT_INTERNAL_SRAM_MMU_MISS_S))
+#define DPORT_INTERNAL_SRAM_MMU_MISS_V  0xF
+#define DPORT_INTERNAL_SRAM_MMU_MISS_S  0
+
+#define DPORT_PRO_DCACHE_DBUG0_REG          (DR_REG_DPORT_BASE + 0x3F0)
+
+/* DPORT_PRO_RX_END : RO ;bitpos:[23] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_RX_END  (BIT(23))
+#define DPORT_PRO_RX_END_M  (BIT(23))
+#define DPORT_PRO_RX_END_V  0x1
+#define DPORT_PRO_RX_END_S  23
+
+/* DPORT_PRO_SLAVE_WDATA_V : RO ;bitpos:[22] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_SLAVE_WDATA_V  (BIT(22))
+#define DPORT_PRO_SLAVE_WDATA_V_M  (BIT(22))
+#define DPORT_PRO_SLAVE_WDATA_V_V  0x1
+#define DPORT_PRO_SLAVE_WDATA_V_S  22
+
+/* DPORT_PRO_SLAVE_WR : RO ;bitpos:[21] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_SLAVE_WR  (BIT(21))
+#define DPORT_PRO_SLAVE_WR_M  (BIT(21))
+#define DPORT_PRO_SLAVE_WR_V  0x1
+#define DPORT_PRO_SLAVE_WR_S  21
+
+/* DPORT_PRO_TX_END : RO ;bitpos:[20] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_TX_END  (BIT(20))
+#define DPORT_PRO_TX_END_M  (BIT(20))
+#define DPORT_PRO_TX_END_V  0x1
+#define DPORT_PRO_TX_END_S  20
+
+/* DPORT_PRO_WR_BAK_TO_READ : RO ;bitpos:[19] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_WR_BAK_TO_READ  (BIT(19))
+#define DPORT_PRO_WR_BAK_TO_READ_M  (BIT(19))
+#define DPORT_PRO_WR_BAK_TO_READ_V  0x1
+#define DPORT_PRO_WR_BAK_TO_READ_S  19
+
+/* DPORT_PRO_CACHE_STATE : RO ;bitpos:[18:7] ;default: 12'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_STATE  0x00000FFF
+#define DPORT_PRO_CACHE_STATE_M  ((DPORT_PRO_CACHE_STATE_V)<<(DPORT_PRO_CACHE_STATE_S))
+#define DPORT_PRO_CACHE_STATE_V  0xFFF
+#define DPORT_PRO_CACHE_STATE_S  7
+
+/* DPORT_PRO_CACHE_IA : RO ;bitpos:[6:1] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_IA  0x0000003F
+#define DPORT_PRO_CACHE_IA_M  ((DPORT_PRO_CACHE_IA_V)<<(DPORT_PRO_CACHE_IA_S))
+#define DPORT_PRO_CACHE_IA_V  0x3F
+#define DPORT_PRO_CACHE_IA_S  1
+
+/* DPORT_PRO_CACHE_MMU_IA : RO ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_MMU_IA  (BIT(0))
+#define DPORT_PRO_CACHE_MMU_IA_M  (BIT(0))
+#define DPORT_PRO_CACHE_MMU_IA_V  0x1
+#define DPORT_PRO_CACHE_MMU_IA_S  0
+
+#define DPORT_PRO_DCACHE_DBUG1_REG          (DR_REG_DPORT_BASE + 0x3F4)
+
+/* DPORT_PRO_CTAG_RAM_RDATA : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_CTAG_RAM_RDATA  0xFFFFFFFF
+#define DPORT_PRO_CTAG_RAM_RDATA_M  ((DPORT_PRO_CTAG_RAM_RDATA_V)<<(DPORT_PRO_CTAG_RAM_RDATA_S))
+#define DPORT_PRO_CTAG_RAM_RDATA_V  0xFFFFFFFF
+#define DPORT_PRO_CTAG_RAM_RDATA_S  0
+
+#define DPORT_PRO_DCACHE_DBUG2_REG          (DR_REG_DPORT_BASE + 0x3F8)
+
+/* DPORT_PRO_CACHE_VADDR : RO ;bitpos:[26:0] ;default: 27'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_VADDR  0x07FFFFFF
+#define DPORT_PRO_CACHE_VADDR_M  ((DPORT_PRO_CACHE_VADDR_V)<<(DPORT_PRO_CACHE_VADDR_S))
+#define DPORT_PRO_CACHE_VADDR_V  0x7FFFFFF
+#define DPORT_PRO_CACHE_VADDR_S  0
+
+#define DPORT_PRO_DCACHE_DBUG3_REG          (DR_REG_DPORT_BASE + 0x3FC)
+
+/* DPORT_PRO_CACHE_IRAM0_PID_ERROR : RO ;bitpos:[15] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_CACHE_IRAM0_PID_ERROR  (BIT(15))
+#define DPORT_PRO_CACHE_IRAM0_PID_ERROR_M  (BIT(15))
+#define DPORT_PRO_CACHE_IRAM0_PID_ERROR_V  0x1
+#define DPORT_PRO_CACHE_IRAM0_PID_ERROR_S  15
+
+/* DPORT_PRO_CPU_DISABLED_CACHE_IA : RO ;bitpos:[14:9] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_CPU_DISABLED_CACHE_IA  0x0000003F
+#define DPORT_PRO_CPU_DISABLED_CACHE_IA_M  ((DPORT_PRO_CPU_DISABLED_CACHE_IA_V)<<(DPORT_PRO_CPU_DISABLED_CACHE_IA_S))
+#define DPORT_PRO_CPU_DISABLED_CACHE_IA_V  0x3F
+#define DPORT_PRO_CPU_DISABLED_CACHE_IA_S  9
+
+/* DPORT_PRO_MMU_RDATA : RO ;bitpos:[8:0] ;default: 9'h0 ; */
+/* Description: */
+
+#define DPORT_PRO_MMU_RDATA  0x000001FF
+#define DPORT_PRO_MMU_RDATA_M  ((DPORT_PRO_MMU_RDATA_V)<<(DPORT_PRO_MMU_RDATA_S))
+#define DPORT_PRO_MMU_RDATA_V  0x1FF
+#define DPORT_PRO_MMU_RDATA_S  0
+
+#define DPORT_PRO_DCACHE_DBUG4_REG          (DR_REG_DPORT_BASE + 0x400)
+
+/* DPORT_PRO_DRAM1ADDR0_IA : RO ;bitpos:[19:0] ;default: 20'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_DRAM1ADDR0_IA  0x000FFFFF
+#define DPORT_PRO_DRAM1ADDR0_IA_M  ((DPORT_PRO_DRAM1ADDR0_IA_V)<<(DPORT_PRO_DRAM1ADDR0_IA_S))
+#define DPORT_PRO_DRAM1ADDR0_IA_V  0xFFFFF
+#define DPORT_PRO_DRAM1ADDR0_IA_S  0
+
+#define DPORT_PRO_DCACHE_DBUG5_REG          (DR_REG_DPORT_BASE + 0x404)
+
+/* DPORT_PRO_DROM0ADDR0_IA : RO ;bitpos:[19:0] ;default: 20'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_DROM0ADDR0_IA  0x000FFFFF
+#define DPORT_PRO_DROM0ADDR0_IA_M  ((DPORT_PRO_DROM0ADDR0_IA_V)<<(DPORT_PRO_DROM0ADDR0_IA_S))
+#define DPORT_PRO_DROM0ADDR0_IA_V  0xFFFFF
+#define DPORT_PRO_DROM0ADDR0_IA_S  0
+
+#define DPORT_PRO_DCACHE_DBUG6_REG          (DR_REG_DPORT_BASE + 0x408)
+
+/* DPORT_PRO_IRAM0ADDR_IA : RO ;bitpos:[19:0] ;default: 20'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_IRAM0ADDR_IA  0x000FFFFF
+#define DPORT_PRO_IRAM0ADDR_IA_M  ((DPORT_PRO_IRAM0ADDR_IA_V)<<(DPORT_PRO_IRAM0ADDR_IA_S))
+#define DPORT_PRO_IRAM0ADDR_IA_V  0xFFFFF
+#define DPORT_PRO_IRAM0ADDR_IA_S  0
+
+#define DPORT_PRO_DCACHE_DBUG7_REG          (DR_REG_DPORT_BASE + 0x40C)
+
+/* DPORT_PRO_IRAM1ADDR_IA : RO ;bitpos:[19:0] ;default: 20'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_IRAM1ADDR_IA  0x000FFFFF
+#define DPORT_PRO_IRAM1ADDR_IA_M  ((DPORT_PRO_IRAM1ADDR_IA_V)<<(DPORT_PRO_IRAM1ADDR_IA_S))
+#define DPORT_PRO_IRAM1ADDR_IA_V  0xFFFFF
+#define DPORT_PRO_IRAM1ADDR_IA_S  0
+
+#define DPORT_PRO_DCACHE_DBUG8_REG          (DR_REG_DPORT_BASE + 0x410)
+
+/* DPORT_PRO_IROM0ADDR_IA : RO ;bitpos:[19:0] ;default: 20'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_IROM0ADDR_IA  0x000FFFFF
+#define DPORT_PRO_IROM0ADDR_IA_M  ((DPORT_PRO_IROM0ADDR_IA_V)<<(DPORT_PRO_IROM0ADDR_IA_S))
+#define DPORT_PRO_IROM0ADDR_IA_V  0xFFFFF
+#define DPORT_PRO_IROM0ADDR_IA_S  0
+
+#define DPORT_PRO_DCACHE_DBUG9_REG          (DR_REG_DPORT_BASE + 0x414)
+
+/* DPORT_PRO_OPSDRAMADDR_IA : RO ;bitpos:[19:0] ;default: 20'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_OPSDRAMADDR_IA  0x000FFFFF
+#define DPORT_PRO_OPSDRAMADDR_IA_M  ((DPORT_PRO_OPSDRAMADDR_IA_V)<<(DPORT_PRO_OPSDRAMADDR_IA_S))
+#define DPORT_PRO_OPSDRAMADDR_IA_V  0xFFFFF
+#define DPORT_PRO_OPSDRAMADDR_IA_S  0
+
+#define DPORT_APP_DCACHE_DBUG0_REG          (DR_REG_DPORT_BASE + 0x418)
+
+/* DPORT_APP_RX_END : RO ;bitpos:[23] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_RX_END  (BIT(23))
+#define DPORT_APP_RX_END_M  (BIT(23))
+#define DPORT_APP_RX_END_V  0x1
+#define DPORT_APP_RX_END_S  23
+
+/* DPORT_APP_SLAVE_WDATA_V : RO ;bitpos:[22] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_SLAVE_WDATA_V  (BIT(22))
+#define DPORT_APP_SLAVE_WDATA_V_M  (BIT(22))
+#define DPORT_APP_SLAVE_WDATA_V_V  0x1
+#define DPORT_APP_SLAVE_WDATA_V_S  22
+
+/* DPORT_APP_SLAVE_WR : RO ;bitpos:[21] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_SLAVE_WR  (BIT(21))
+#define DPORT_APP_SLAVE_WR_M  (BIT(21))
+#define DPORT_APP_SLAVE_WR_V  0x1
+#define DPORT_APP_SLAVE_WR_S  21
+
+/* DPORT_APP_TX_END : RO ;bitpos:[20] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_TX_END  (BIT(20))
+#define DPORT_APP_TX_END_M  (BIT(20))
+#define DPORT_APP_TX_END_V  0x1
+#define DPORT_APP_TX_END_S  20
+
+/* DPORT_APP_WR_BAK_TO_READ : RO ;bitpos:[19] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_WR_BAK_TO_READ  (BIT(19))
+#define DPORT_APP_WR_BAK_TO_READ_M  (BIT(19))
+#define DPORT_APP_WR_BAK_TO_READ_V  0x1
+#define DPORT_APP_WR_BAK_TO_READ_S  19
+
+/* DPORT_APP_CACHE_STATE : RO ;bitpos:[18:7] ;default: 12'b0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_STATE  0x00000FFF
+#define DPORT_APP_CACHE_STATE_M  ((DPORT_APP_CACHE_STATE_V)<<(DPORT_APP_CACHE_STATE_S))
+#define DPORT_APP_CACHE_STATE_V  0xFFF
+#define DPORT_APP_CACHE_STATE_S  7
+
+/* DPORT_APP_CACHE_IA : RO ;bitpos:[6:1] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_IA  0x0000003F
+#define DPORT_APP_CACHE_IA_M  ((DPORT_APP_CACHE_IA_V)<<(DPORT_APP_CACHE_IA_S))
+#define DPORT_APP_CACHE_IA_V  0x3F
+#define DPORT_APP_CACHE_IA_S  1
+
+/* DPORT_APP_CACHE_MMU_IA : RO ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_MMU_IA  (BIT(0))
+#define DPORT_APP_CACHE_MMU_IA_M  (BIT(0))
+#define DPORT_APP_CACHE_MMU_IA_V  0x1
+#define DPORT_APP_CACHE_MMU_IA_S  0
+
+#define DPORT_APP_DCACHE_DBUG1_REG          (DR_REG_DPORT_BASE + 0x41C)
+
+/* DPORT_APP_CTAG_RAM_RDATA : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/* Description: */
+
+#define DPORT_APP_CTAG_RAM_RDATA  0xFFFFFFFF
+#define DPORT_APP_CTAG_RAM_RDATA_M  ((DPORT_APP_CTAG_RAM_RDATA_V)<<(DPORT_APP_CTAG_RAM_RDATA_S))
+#define DPORT_APP_CTAG_RAM_RDATA_V  0xFFFFFFFF
+#define DPORT_APP_CTAG_RAM_RDATA_S  0
+
+#define DPORT_APP_DCACHE_DBUG2_REG          (DR_REG_DPORT_BASE + 0x420)
+
+/* DPORT_APP_CACHE_VADDR : RO ;bitpos:[26:0] ;default: 27'b0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_VADDR  0x07FFFFFF
+#define DPORT_APP_CACHE_VADDR_M  ((DPORT_APP_CACHE_VADDR_V)<<(DPORT_APP_CACHE_VADDR_S))
+#define DPORT_APP_CACHE_VADDR_V  0x7FFFFFF
+#define DPORT_APP_CACHE_VADDR_S  0
+
+#define DPORT_APP_DCACHE_DBUG3_REG          (DR_REG_DPORT_BASE + 0x424)
+
+/* DPORT_APP_CACHE_IRAM0_PID_ERROR : RO ;bitpos:[15] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_CACHE_IRAM0_PID_ERROR  (BIT(15))
+#define DPORT_APP_CACHE_IRAM0_PID_ERROR_M  (BIT(15))
+#define DPORT_APP_CACHE_IRAM0_PID_ERROR_V  0x1
+#define DPORT_APP_CACHE_IRAM0_PID_ERROR_S  15
+
+/* DPORT_APP_CPU_DISABLED_CACHE_IA : RO ;bitpos:[14:9] ;default: 6'b0 ; */
+/* Description: */
+
+#define DPORT_APP_CPU_DISABLED_CACHE_IA  0x0000003F
+#define DPORT_APP_CPU_DISABLED_CACHE_IA_M  ((DPORT_APP_CPU_DISABLED_CACHE_IA_V)<<(DPORT_APP_CPU_DISABLED_CACHE_IA_S))
+#define DPORT_APP_CPU_DISABLED_CACHE_IA_V  0x3F
+#define DPORT_APP_CPU_DISABLED_CACHE_IA_S  9
+
+/* DPORT_APP_MMU_RDATA : RO ;bitpos:[8:0] ;default: 9'h0 ; */
+/* Description: */
+
+#define DPORT_APP_MMU_RDATA  0x000001FF
+#define DPORT_APP_MMU_RDATA_M  ((DPORT_APP_MMU_RDATA_V)<<(DPORT_APP_MMU_RDATA_S))
+#define DPORT_APP_MMU_RDATA_V  0x1FF
+#define DPORT_APP_MMU_RDATA_S  0
+
+#define DPORT_APP_DCACHE_DBUG4_REG          (DR_REG_DPORT_BASE + 0x428)
+
+/* DPORT_APP_DRAM1ADDR0_IA : RO ;bitpos:[19:0] ;default: 20'b0 ; */
+/* Description: */
+
+#define DPORT_APP_DRAM1ADDR0_IA  0x000FFFFF
+#define DPORT_APP_DRAM1ADDR0_IA_M  ((DPORT_APP_DRAM1ADDR0_IA_V)<<(DPORT_APP_DRAM1ADDR0_IA_S))
+#define DPORT_APP_DRAM1ADDR0_IA_V  0xFFFFF
+#define DPORT_APP_DRAM1ADDR0_IA_S  0
+
+#define DPORT_APP_DCACHE_DBUG5_REG          (DR_REG_DPORT_BASE + 0x42C)
+
+/* DPORT_APP_DROM0ADDR0_IA : RO ;bitpos:[19:0] ;default: 20'b0 ; */
+/* Description: */
+
+#define DPORT_APP_DROM0ADDR0_IA  0x000FFFFF
+#define DPORT_APP_DROM0ADDR0_IA_M  ((DPORT_APP_DROM0ADDR0_IA_V)<<(DPORT_APP_DROM0ADDR0_IA_S))
+#define DPORT_APP_DROM0ADDR0_IA_V  0xFFFFF
+#define DPORT_APP_DROM0ADDR0_IA_S  0
+
+#define DPORT_APP_DCACHE_DBUG6_REG          (DR_REG_DPORT_BASE + 0x430)
+
+/* DPORT_APP_IRAM0ADDR_IA : RO ;bitpos:[19:0] ;default: 20'b0 ; */
+/* Description: */
+
+#define DPORT_APP_IRAM0ADDR_IA  0x000FFFFF
+#define DPORT_APP_IRAM0ADDR_IA_M  ((DPORT_APP_IRAM0ADDR_IA_V)<<(DPORT_APP_IRAM0ADDR_IA_S))
+#define DPORT_APP_IRAM0ADDR_IA_V  0xFFFFF
+#define DPORT_APP_IRAM0ADDR_IA_S  0
+
+#define DPORT_APP_DCACHE_DBUG7_REG          (DR_REG_DPORT_BASE + 0x434)
+
+/* DPORT_APP_IRAM1ADDR_IA : RO ;bitpos:[19:0] ;default: 20'b0 ; */
+/* Description: */
+
+#define DPORT_APP_IRAM1ADDR_IA  0x000FFFFF
+#define DPORT_APP_IRAM1ADDR_IA_M  ((DPORT_APP_IRAM1ADDR_IA_V)<<(DPORT_APP_IRAM1ADDR_IA_S))
+#define DPORT_APP_IRAM1ADDR_IA_V  0xFFFFF
+#define DPORT_APP_IRAM1ADDR_IA_S  0
+
+#define DPORT_APP_DCACHE_DBUG8_REG          (DR_REG_DPORT_BASE + 0x438)
+
+/* DPORT_APP_IROM0ADDR_IA : RO ;bitpos:[19:0] ;default: 20'b0 ; */
+/* Description: */
+
+#define DPORT_APP_IROM0ADDR_IA  0x000FFFFF
+#define DPORT_APP_IROM0ADDR_IA_M  ((DPORT_APP_IROM0ADDR_IA_V)<<(DPORT_APP_IROM0ADDR_IA_S))
+#define DPORT_APP_IROM0ADDR_IA_V  0xFFFFF
+#define DPORT_APP_IROM0ADDR_IA_S  0
+
+#define DPORT_APP_DCACHE_DBUG9_REG          (DR_REG_DPORT_BASE + 0x43C)
+
+/* DPORT_APP_OPSDRAMADDR_IA : RO ;bitpos:[19:0] ;default: 20'b0 ; */
+/* Description: */
+
+#define DPORT_APP_OPSDRAMADDR_IA  0x000FFFFF
+#define DPORT_APP_OPSDRAMADDR_IA_M  ((DPORT_APP_OPSDRAMADDR_IA_V)<<(DPORT_APP_OPSDRAMADDR_IA_S))
+#define DPORT_APP_OPSDRAMADDR_IA_V  0xFFFFF
+#define DPORT_APP_OPSDRAMADDR_IA_S  0
+
+#define DPORT_PRO_CPU_RECORD_CTRL_REG          (DR_REG_DPORT_BASE + 0x440)
+
+/* DPORT_PRO_CPU_PDEBUG_ENABLE : R/W ;bitpos:[8] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_PRO_CPU_PDEBUG_ENABLE  (BIT(8))
+#define DPORT_PRO_CPU_PDEBUG_ENABLE_M  (BIT(8))
+#define DPORT_PRO_CPU_PDEBUG_ENABLE_V  0x1
+#define DPORT_PRO_CPU_PDEBUG_ENABLE_S  8
+
+/* DPORT_PRO_CPU_RECORD_DISABLE : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_CPU_RECORD_DISABLE  (BIT(4))
+#define DPORT_PRO_CPU_RECORD_DISABLE_M  (BIT(4))
+#define DPORT_PRO_CPU_RECORD_DISABLE_V  0x1
+#define DPORT_PRO_CPU_RECORD_DISABLE_S  4
+
+/* DPORT_PRO_CPU_RECORD_ENABLE : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_CPU_RECORD_ENABLE  (BIT(0))
+#define DPORT_PRO_CPU_RECORD_ENABLE_M  (BIT(0))
+#define DPORT_PRO_CPU_RECORD_ENABLE_V  0x1
+#define DPORT_PRO_CPU_RECORD_ENABLE_S  0
+
+#define DPORT_PRO_CPU_RECORD_STATUS_REG          (DR_REG_DPORT_BASE + 0x444)
+
+/* DPORT_PRO_CPU_RECORDING : RO ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_CPU_RECORDING  (BIT(0))
+#define DPORT_PRO_CPU_RECORDING_M  (BIT(0))
+#define DPORT_PRO_CPU_RECORDING_V  0x1
+#define DPORT_PRO_CPU_RECORDING_S  0
+
+#define DPORT_PRO_CPU_RECORD_PID_REG          (DR_REG_DPORT_BASE + 0x448)
+
+/* DPORT_RECORD_PRO_PID : RO ;bitpos:[2:0] ;default: 3'd0 ; */
+/* Description: */
+
+#define DPORT_RECORD_PRO_PID  0x00000007
+#define DPORT_RECORD_PRO_PID_M  ((DPORT_RECORD_PRO_PID_V)<<(DPORT_RECORD_PRO_PID_S))
+#define DPORT_RECORD_PRO_PID_V  0x7
+#define DPORT_RECORD_PRO_PID_S  0
+
+#define DPORT_PRO_CPU_RECORD_PDEBUGINST_REG          (DR_REG_DPORT_BASE + 0x44C)
+
+/* DPORT_RECORD_PRO_PDEBUGINST : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/* Description: */
+
+#define DPORT_RECORD_PRO_PDEBUGINST  0xFFFFFFFF
+#define DPORT_RECORD_PRO_PDEBUGINST_M  ((DPORT_RECORD_PRO_PDEBUGINST_V)<<(DPORT_RECORD_PRO_PDEBUGINST_S))
+#define DPORT_RECORD_PRO_PDEBUGINST_V  0xFFFFFFFF
+#define DPORT_RECORD_PRO_PDEBUGINST_S  0
+
+#define DPORT_PRO_CPU_RECORD_PDEBUGSTATUS_REG          (DR_REG_DPORT_BASE + 0x450)
+
+/* DPORT_RECORD_PRO_PDEBUGSTATUS : RO ;bitpos:[7:0] ;default: 8'b0 ; */
+/* Description: */
+
+#define DPORT_RECORD_PRO_PDEBUGSTATUS  0x000000FF
+#define DPORT_RECORD_PRO_PDEBUGSTATUS_M  ((DPORT_RECORD_PRO_PDEBUGSTATUS_V)<<(DPORT_RECORD_PRO_PDEBUGSTATUS_S))
+#define DPORT_RECORD_PRO_PDEBUGSTATUS_V  0xFF
+#define DPORT_RECORD_PRO_PDEBUGSTATUS_S  0
+
+#define DPORT_PRO_CPU_RECORD_PDEBUGDATA_REG          (DR_REG_DPORT_BASE + 0x454)
+
+/* DPORT_RECORD_PRO_PDEBUGDATA : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/* Description: */
+
+#define DPORT_RECORD_PRO_PDEBUGDATA  0xFFFFFFFF
+#define DPORT_RECORD_PRO_PDEBUGDATA_M  ((DPORT_RECORD_PRO_PDEBUGDATA_V)<<(DPORT_RECORD_PRO_PDEBUGDATA_S))
+#define DPORT_RECORD_PRO_PDEBUGDATA_V  0xFFFFFFFF
+#define DPORT_RECORD_PRO_PDEBUGDATA_S  0
+
+#define DPORT_PRO_CPU_RECORD_PDEBUGPC_REG          (DR_REG_DPORT_BASE + 0x458)
+
+/* DPORT_RECORD_PRO_PDEBUGPC : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/* Description: */
+
+#define DPORT_RECORD_PRO_PDEBUGPC  0xFFFFFFFF
+#define DPORT_RECORD_PRO_PDEBUGPC_M  ((DPORT_RECORD_PRO_PDEBUGPC_V)<<(DPORT_RECORD_PRO_PDEBUGPC_S))
+#define DPORT_RECORD_PRO_PDEBUGPC_V  0xFFFFFFFF
+#define DPORT_RECORD_PRO_PDEBUGPC_S  0
+
+#define DPORT_PRO_CPU_RECORD_PDEBUGLS0STAT_REG          (DR_REG_DPORT_BASE + 0x45C)
+
+/* DPORT_RECORD_PRO_PDEBUGLS0STAT : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/* Description: */
+
+#define DPORT_RECORD_PRO_PDEBUGLS0STAT  0xFFFFFFFF
+#define DPORT_RECORD_PRO_PDEBUGLS0STAT_M  ((DPORT_RECORD_PRO_PDEBUGLS0STAT_V)<<(DPORT_RECORD_PRO_PDEBUGLS0STAT_S))
+#define DPORT_RECORD_PRO_PDEBUGLS0STAT_V  0xFFFFFFFF
+#define DPORT_RECORD_PRO_PDEBUGLS0STAT_S  0
+
+#define DPORT_PRO_CPU_RECORD_PDEBUGLS0ADDR_REG          (DR_REG_DPORT_BASE + 0x460)
+
+/* DPORT_RECORD_PRO_PDEBUGLS0ADDR : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/* Description: */
+
+#define DPORT_RECORD_PRO_PDEBUGLS0ADDR  0xFFFFFFFF
+#define DPORT_RECORD_PRO_PDEBUGLS0ADDR_M  ((DPORT_RECORD_PRO_PDEBUGLS0ADDR_V)<<(DPORT_RECORD_PRO_PDEBUGLS0ADDR_S))
+#define DPORT_RECORD_PRO_PDEBUGLS0ADDR_V  0xFFFFFFFF
+#define DPORT_RECORD_PRO_PDEBUGLS0ADDR_S  0
+
+#define DPORT_PRO_CPU_RECORD_PDEBUGLS0DATA_REG          (DR_REG_DPORT_BASE + 0x464)
+
+/* DPORT_RECORD_PRO_PDEBUGLS0DATA : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/* Description: */
+
+#define DPORT_RECORD_PRO_PDEBUGLS0DATA  0xFFFFFFFF
+#define DPORT_RECORD_PRO_PDEBUGLS0DATA_M  ((DPORT_RECORD_PRO_PDEBUGLS0DATA_V)<<(DPORT_RECORD_PRO_PDEBUGLS0DATA_S))
+#define DPORT_RECORD_PRO_PDEBUGLS0DATA_V  0xFFFFFFFF
+#define DPORT_RECORD_PRO_PDEBUGLS0DATA_S  0
+
+#define DPORT_APP_CPU_RECORD_CTRL_REG          (DR_REG_DPORT_BASE + 0x468)
+
+/* DPORT_APP_CPU_PDEBUG_ENABLE : R/W ;bitpos:[8] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_APP_CPU_PDEBUG_ENABLE  (BIT(8))
+#define DPORT_APP_CPU_PDEBUG_ENABLE_M  (BIT(8))
+#define DPORT_APP_CPU_PDEBUG_ENABLE_V  0x1
+#define DPORT_APP_CPU_PDEBUG_ENABLE_S  8
+
+/* DPORT_APP_CPU_RECORD_DISABLE : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_CPU_RECORD_DISABLE  (BIT(4))
+#define DPORT_APP_CPU_RECORD_DISABLE_M  (BIT(4))
+#define DPORT_APP_CPU_RECORD_DISABLE_V  0x1
+#define DPORT_APP_CPU_RECORD_DISABLE_S  4
+
+/* DPORT_APP_CPU_RECORD_ENABLE : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_CPU_RECORD_ENABLE  (BIT(0))
+#define DPORT_APP_CPU_RECORD_ENABLE_M  (BIT(0))
+#define DPORT_APP_CPU_RECORD_ENABLE_V  0x1
+#define DPORT_APP_CPU_RECORD_ENABLE_S  0
+
+#define DPORT_APP_CPU_RECORD_STATUS_REG          (DR_REG_DPORT_BASE + 0x46C)
+
+/* DPORT_APP_CPU_RECORDING : RO ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_APP_CPU_RECORDING  (BIT(0))
+#define DPORT_APP_CPU_RECORDING_M  (BIT(0))
+#define DPORT_APP_CPU_RECORDING_V  0x1
+#define DPORT_APP_CPU_RECORDING_S  0
+
+#define DPORT_APP_CPU_RECORD_PID_REG          (DR_REG_DPORT_BASE + 0x470)
+
+/* DPORT_RECORD_APP_PID : RO ;bitpos:[2:0] ;default: 3'd0 ; */
+/* Description: */
+
+#define DPORT_RECORD_APP_PID  0x00000007
+#define DPORT_RECORD_APP_PID_M  ((DPORT_RECORD_APP_PID_V)<<(DPORT_RECORD_APP_PID_S))
+#define DPORT_RECORD_APP_PID_V  0x7
+#define DPORT_RECORD_APP_PID_S  0
+
+#define DPORT_APP_CPU_RECORD_PDEBUGINST_REG          (DR_REG_DPORT_BASE + 0x474)
+
+/* DPORT_RECORD_APP_PDEBUGINST : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/* Description: */
+
+#define DPORT_RECORD_APP_PDEBUGINST  0xFFFFFFFF
+#define DPORT_RECORD_APP_PDEBUGINST_M  ((DPORT_RECORD_APP_PDEBUGINST_V)<<(DPORT_RECORD_APP_PDEBUGINST_S))
+#define DPORT_RECORD_APP_PDEBUGINST_V  0xFFFFFFFF
+#define DPORT_RECORD_APP_PDEBUGINST_S  0
+
+#define DPORT_APP_CPU_RECORD_PDEBUGSTATUS_REG          (DR_REG_DPORT_BASE + 0x478)
+
+/* DPORT_RECORD_APP_PDEBUGSTATUS : RO ;bitpos:[7:0] ;default: 8'b0 ; */
+/* Description: */
+
+#define DPORT_RECORD_APP_PDEBUGSTATUS  0x000000FF
+#define DPORT_RECORD_APP_PDEBUGSTATUS_M  ((DPORT_RECORD_APP_PDEBUGSTATUS_V)<<(DPORT_RECORD_APP_PDEBUGSTATUS_S))
+#define DPORT_RECORD_APP_PDEBUGSTATUS_V  0xFF
+#define DPORT_RECORD_APP_PDEBUGSTATUS_S  0
+
+#define DPORT_APP_CPU_RECORD_PDEBUGDATA_REG          (DR_REG_DPORT_BASE + 0x47C)
+
+/* DPORT_RECORD_APP_PDEBUGDATA : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/* Description: */
+
+#define DPORT_RECORD_APP_PDEBUGDATA  0xFFFFFFFF
+#define DPORT_RECORD_APP_PDEBUGDATA_M  ((DPORT_RECORD_APP_PDEBUGDATA_V)<<(DPORT_RECORD_APP_PDEBUGDATA_S))
+#define DPORT_RECORD_APP_PDEBUGDATA_V  0xFFFFFFFF
+#define DPORT_RECORD_APP_PDEBUGDATA_S  0
+
+#define DPORT_APP_CPU_RECORD_PDEBUGPC_REG          (DR_REG_DPORT_BASE + 0x480)
+
+/* DPORT_RECORD_APP_PDEBUGPC : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/* Description: */
+
+#define DPORT_RECORD_APP_PDEBUGPC  0xFFFFFFFF
+#define DPORT_RECORD_APP_PDEBUGPC_M  ((DPORT_RECORD_APP_PDEBUGPC_V)<<(DPORT_RECORD_APP_PDEBUGPC_S))
+#define DPORT_RECORD_APP_PDEBUGPC_V  0xFFFFFFFF
+#define DPORT_RECORD_APP_PDEBUGPC_S  0
+
+#define DPORT_APP_CPU_RECORD_PDEBUGLS0STAT_REG          (DR_REG_DPORT_BASE + 0x484)
+
+/* DPORT_RECORD_APP_PDEBUGLS0STAT : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/* Description: */
+
+#define DPORT_RECORD_APP_PDEBUGLS0STAT  0xFFFFFFFF
+#define DPORT_RECORD_APP_PDEBUGLS0STAT_M  ((DPORT_RECORD_APP_PDEBUGLS0STAT_V)<<(DPORT_RECORD_APP_PDEBUGLS0STAT_S))
+#define DPORT_RECORD_APP_PDEBUGLS0STAT_V  0xFFFFFFFF
+#define DPORT_RECORD_APP_PDEBUGLS0STAT_S  0
+
+#define DPORT_APP_CPU_RECORD_PDEBUGLS0ADDR_REG          (DR_REG_DPORT_BASE + 0x488)
+
+/* DPORT_RECORD_APP_PDEBUGLS0ADDR : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/* Description: */
+
+#define DPORT_RECORD_APP_PDEBUGLS0ADDR  0xFFFFFFFF
+#define DPORT_RECORD_APP_PDEBUGLS0ADDR_M  ((DPORT_RECORD_APP_PDEBUGLS0ADDR_V)<<(DPORT_RECORD_APP_PDEBUGLS0ADDR_S))
+#define DPORT_RECORD_APP_PDEBUGLS0ADDR_V  0xFFFFFFFF
+#define DPORT_RECORD_APP_PDEBUGLS0ADDR_S  0
+
+#define DPORT_APP_CPU_RECORD_PDEBUGLS0DATA_REG          (DR_REG_DPORT_BASE + 0x48C)
+
+/* DPORT_RECORD_APP_PDEBUGLS0DATA : RO ;bitpos:[31:0] ;default: 32'b0 ; */
+/* Description: */
+
+#define DPORT_RECORD_APP_PDEBUGLS0DATA  0xFFFFFFFF
+#define DPORT_RECORD_APP_PDEBUGLS0DATA_M  ((DPORT_RECORD_APP_PDEBUGLS0DATA_V)<<(DPORT_RECORD_APP_PDEBUGLS0DATA_S))
+#define DPORT_RECORD_APP_PDEBUGLS0DATA_V  0xFFFFFFFF
+#define DPORT_RECORD_APP_PDEBUGLS0DATA_S  0
+
+#define DPORT_RSA_PD_CTRL_REG          (DR_REG_DPORT_BASE + 0x490)
+
+/* DPORT_RSA_PD : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_RSA_PD  (BIT(0))
+#define DPORT_RSA_PD_M  (BIT(0))
+#define DPORT_RSA_PD_V  0x1
+#define DPORT_RSA_PD_S  0
+
+#define DPORT_ROM_MPU_TABLE0_REG          (DR_REG_DPORT_BASE + 0x494)
+
+/* DPORT_ROM_MPU_TABLE0 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_ROM_MPU_TABLE0  0x00000003
+#define DPORT_ROM_MPU_TABLE0_M  ((DPORT_ROM_MPU_TABLE0_V)<<(DPORT_ROM_MPU_TABLE0_S))
+#define DPORT_ROM_MPU_TABLE0_V  0x3
+#define DPORT_ROM_MPU_TABLE0_S  0
+
+#define DPORT_ROM_MPU_TABLE1_REG          (DR_REG_DPORT_BASE + 0x498)
+
+/* DPORT_ROM_MPU_TABLE1 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_ROM_MPU_TABLE1  0x00000003
+#define DPORT_ROM_MPU_TABLE1_M  ((DPORT_ROM_MPU_TABLE1_V)<<(DPORT_ROM_MPU_TABLE1_S))
+#define DPORT_ROM_MPU_TABLE1_V  0x3
+#define DPORT_ROM_MPU_TABLE1_S  0
+
+#define DPORT_ROM_MPU_TABLE2_REG          (DR_REG_DPORT_BASE + 0x49C)
+
+/* DPORT_ROM_MPU_TABLE2 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_ROM_MPU_TABLE2  0x00000003
+#define DPORT_ROM_MPU_TABLE2_M  ((DPORT_ROM_MPU_TABLE2_V)<<(DPORT_ROM_MPU_TABLE2_S))
+#define DPORT_ROM_MPU_TABLE2_V  0x3
+#define DPORT_ROM_MPU_TABLE2_S  0
+
+#define DPORT_ROM_MPU_TABLE3_REG          (DR_REG_DPORT_BASE + 0x4A0)
+
+/* DPORT_ROM_MPU_TABLE3 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_ROM_MPU_TABLE3  0x00000003
+#define DPORT_ROM_MPU_TABLE3_M  ((DPORT_ROM_MPU_TABLE3_V)<<(DPORT_ROM_MPU_TABLE3_S))
+#define DPORT_ROM_MPU_TABLE3_V  0x3
+#define DPORT_ROM_MPU_TABLE3_S  0
+
+#define DPORT_SHROM_MPU_TABLE0_REG          (DR_REG_DPORT_BASE + 0x4A4)
+
+/* DPORT_SHROM_MPU_TABLE0 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE0  0x00000003
+#define DPORT_SHROM_MPU_TABLE0_M  ((DPORT_SHROM_MPU_TABLE0_V)<<(DPORT_SHROM_MPU_TABLE0_S))
+#define DPORT_SHROM_MPU_TABLE0_V  0x3
+#define DPORT_SHROM_MPU_TABLE0_S  0
+
+#define DPORT_SHROM_MPU_TABLE1_REG          (DR_REG_DPORT_BASE + 0x4A8)
+
+/* DPORT_SHROM_MPU_TABLE1 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE1  0x00000003
+#define DPORT_SHROM_MPU_TABLE1_M  ((DPORT_SHROM_MPU_TABLE1_V)<<(DPORT_SHROM_MPU_TABLE1_S))
+#define DPORT_SHROM_MPU_TABLE1_V  0x3
+#define DPORT_SHROM_MPU_TABLE1_S  0
+
+#define DPORT_SHROM_MPU_TABLE2_REG          (DR_REG_DPORT_BASE + 0x4AC)
+
+/* DPORT_SHROM_MPU_TABLE2 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE2  0x00000003
+#define DPORT_SHROM_MPU_TABLE2_M  ((DPORT_SHROM_MPU_TABLE2_V)<<(DPORT_SHROM_MPU_TABLE2_S))
+#define DPORT_SHROM_MPU_TABLE2_V  0x3
+#define DPORT_SHROM_MPU_TABLE2_S  0
+
+#define DPORT_SHROM_MPU_TABLE3_REG          (DR_REG_DPORT_BASE + 0x4B0)
+
+/* DPORT_SHROM_MPU_TABLE3 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE3  0x00000003
+#define DPORT_SHROM_MPU_TABLE3_M  ((DPORT_SHROM_MPU_TABLE3_V)<<(DPORT_SHROM_MPU_TABLE3_S))
+#define DPORT_SHROM_MPU_TABLE3_V  0x3
+#define DPORT_SHROM_MPU_TABLE3_S  0
+
+#define DPORT_SHROM_MPU_TABLE4_REG          (DR_REG_DPORT_BASE + 0x4B4)
+
+/* DPORT_SHROM_MPU_TABLE4 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE4  0x00000003
+#define DPORT_SHROM_MPU_TABLE4_M  ((DPORT_SHROM_MPU_TABLE4_V)<<(DPORT_SHROM_MPU_TABLE4_S))
+#define DPORT_SHROM_MPU_TABLE4_V  0x3
+#define DPORT_SHROM_MPU_TABLE4_S  0
+
+#define DPORT_SHROM_MPU_TABLE5_REG          (DR_REG_DPORT_BASE + 0x4B8)
+
+/* DPORT_SHROM_MPU_TABLE5 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE5  0x00000003
+#define DPORT_SHROM_MPU_TABLE5_M  ((DPORT_SHROM_MPU_TABLE5_V)<<(DPORT_SHROM_MPU_TABLE5_S))
+#define DPORT_SHROM_MPU_TABLE5_V  0x3
+#define DPORT_SHROM_MPU_TABLE5_S  0
+
+#define DPORT_SHROM_MPU_TABLE6_REG          (DR_REG_DPORT_BASE + 0x4BC)
+
+/* DPORT_SHROM_MPU_TABLE6 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE6  0x00000003
+#define DPORT_SHROM_MPU_TABLE6_M  ((DPORT_SHROM_MPU_TABLE6_V)<<(DPORT_SHROM_MPU_TABLE6_S))
+#define DPORT_SHROM_MPU_TABLE6_V  0x3
+#define DPORT_SHROM_MPU_TABLE6_S  0
+
+#define DPORT_SHROM_MPU_TABLE7_REG          (DR_REG_DPORT_BASE + 0x4C0)
+
+/* DPORT_SHROM_MPU_TABLE7 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE7  0x00000003
+#define DPORT_SHROM_MPU_TABLE7_M  ((DPORT_SHROM_MPU_TABLE7_V)<<(DPORT_SHROM_MPU_TABLE7_S))
+#define DPORT_SHROM_MPU_TABLE7_V  0x3
+#define DPORT_SHROM_MPU_TABLE7_S  0
+
+#define DPORT_SHROM_MPU_TABLE8_REG          (DR_REG_DPORT_BASE + 0x4C4)
+
+/* DPORT_SHROM_MPU_TABLE8 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE8  0x00000003
+#define DPORT_SHROM_MPU_TABLE8_M  ((DPORT_SHROM_MPU_TABLE8_V)<<(DPORT_SHROM_MPU_TABLE8_S))
+#define DPORT_SHROM_MPU_TABLE8_V  0x3
+#define DPORT_SHROM_MPU_TABLE8_S  0
+
+#define DPORT_SHROM_MPU_TABLE9_REG          (DR_REG_DPORT_BASE + 0x4C8)
+
+/* DPORT_SHROM_MPU_TABLE9 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE9  0x00000003
+#define DPORT_SHROM_MPU_TABLE9_M  ((DPORT_SHROM_MPU_TABLE9_V)<<(DPORT_SHROM_MPU_TABLE9_S))
+#define DPORT_SHROM_MPU_TABLE9_V  0x3
+#define DPORT_SHROM_MPU_TABLE9_S  0
+
+#define DPORT_SHROM_MPU_TABLE10_REG          (DR_REG_DPORT_BASE + 0x4CC)
+
+/* DPORT_SHROM_MPU_TABLE10 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE10  0x00000003
+#define DPORT_SHROM_MPU_TABLE10_M  ((DPORT_SHROM_MPU_TABLE10_V)<<(DPORT_SHROM_MPU_TABLE10_S))
+#define DPORT_SHROM_MPU_TABLE10_V  0x3
+#define DPORT_SHROM_MPU_TABLE10_S  0
+
+#define DPORT_SHROM_MPU_TABLE11_REG          (DR_REG_DPORT_BASE + 0x4D0)
+
+/* DPORT_SHROM_MPU_TABLE11 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE11  0x00000003
+#define DPORT_SHROM_MPU_TABLE11_M  ((DPORT_SHROM_MPU_TABLE11_V)<<(DPORT_SHROM_MPU_TABLE11_S))
+#define DPORT_SHROM_MPU_TABLE11_V  0x3
+#define DPORT_SHROM_MPU_TABLE11_S  0
+
+#define DPORT_SHROM_MPU_TABLE12_REG          (DR_REG_DPORT_BASE + 0x4D4)
+
+/* DPORT_SHROM_MPU_TABLE12 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE12  0x00000003
+#define DPORT_SHROM_MPU_TABLE12_M  ((DPORT_SHROM_MPU_TABLE12_V)<<(DPORT_SHROM_MPU_TABLE12_S))
+#define DPORT_SHROM_MPU_TABLE12_V  0x3
+#define DPORT_SHROM_MPU_TABLE12_S  0
+
+#define DPORT_SHROM_MPU_TABLE13_REG          (DR_REG_DPORT_BASE + 0x4D8)
+
+/* DPORT_SHROM_MPU_TABLE13 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE13  0x00000003
+#define DPORT_SHROM_MPU_TABLE13_M  ((DPORT_SHROM_MPU_TABLE13_V)<<(DPORT_SHROM_MPU_TABLE13_S))
+#define DPORT_SHROM_MPU_TABLE13_V  0x3
+#define DPORT_SHROM_MPU_TABLE13_S  0
+
+#define DPORT_SHROM_MPU_TABLE14_REG          (DR_REG_DPORT_BASE + 0x4DC)
+
+/* DPORT_SHROM_MPU_TABLE14 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE14  0x00000003
+#define DPORT_SHROM_MPU_TABLE14_M  ((DPORT_SHROM_MPU_TABLE14_V)<<(DPORT_SHROM_MPU_TABLE14_S))
+#define DPORT_SHROM_MPU_TABLE14_V  0x3
+#define DPORT_SHROM_MPU_TABLE14_S  0
+
+#define DPORT_SHROM_MPU_TABLE15_REG          (DR_REG_DPORT_BASE + 0x4E0)
+
+/* DPORT_SHROM_MPU_TABLE15 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE15  0x00000003
+#define DPORT_SHROM_MPU_TABLE15_M  ((DPORT_SHROM_MPU_TABLE15_V)<<(DPORT_SHROM_MPU_TABLE15_S))
+#define DPORT_SHROM_MPU_TABLE15_V  0x3
+#define DPORT_SHROM_MPU_TABLE15_S  0
+
+#define DPORT_SHROM_MPU_TABLE16_REG          (DR_REG_DPORT_BASE + 0x4E4)
+
+/* DPORT_SHROM_MPU_TABLE16 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE16  0x00000003
+#define DPORT_SHROM_MPU_TABLE16_M  ((DPORT_SHROM_MPU_TABLE16_V)<<(DPORT_SHROM_MPU_TABLE16_S))
+#define DPORT_SHROM_MPU_TABLE16_V  0x3
+#define DPORT_SHROM_MPU_TABLE16_S  0
+
+#define DPORT_SHROM_MPU_TABLE17_REG          (DR_REG_DPORT_BASE + 0x4E8)
+
+/* DPORT_SHROM_MPU_TABLE17 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE17  0x00000003
+#define DPORT_SHROM_MPU_TABLE17_M  ((DPORT_SHROM_MPU_TABLE17_V)<<(DPORT_SHROM_MPU_TABLE17_S))
+#define DPORT_SHROM_MPU_TABLE17_V  0x3
+#define DPORT_SHROM_MPU_TABLE17_S  0
+
+#define DPORT_SHROM_MPU_TABLE18_REG          (DR_REG_DPORT_BASE + 0x4EC)
+
+/* DPORT_SHROM_MPU_TABLE18 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE18  0x00000003
+#define DPORT_SHROM_MPU_TABLE18_M  ((DPORT_SHROM_MPU_TABLE18_V)<<(DPORT_SHROM_MPU_TABLE18_S))
+#define DPORT_SHROM_MPU_TABLE18_V  0x3
+#define DPORT_SHROM_MPU_TABLE18_S  0
+
+#define DPORT_SHROM_MPU_TABLE19_REG          (DR_REG_DPORT_BASE + 0x4F0)
+
+/* DPORT_SHROM_MPU_TABLE19 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE19  0x00000003
+#define DPORT_SHROM_MPU_TABLE19_M  ((DPORT_SHROM_MPU_TABLE19_V)<<(DPORT_SHROM_MPU_TABLE19_S))
+#define DPORT_SHROM_MPU_TABLE19_V  0x3
+#define DPORT_SHROM_MPU_TABLE19_S  0
+
+#define DPORT_SHROM_MPU_TABLE20_REG          (DR_REG_DPORT_BASE + 0x4F4)
+
+/* DPORT_SHROM_MPU_TABLE20 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE20  0x00000003
+#define DPORT_SHROM_MPU_TABLE20_M  ((DPORT_SHROM_MPU_TABLE20_V)<<(DPORT_SHROM_MPU_TABLE20_S))
+#define DPORT_SHROM_MPU_TABLE20_V  0x3
+#define DPORT_SHROM_MPU_TABLE20_S  0
+
+#define DPORT_SHROM_MPU_TABLE21_REG          (DR_REG_DPORT_BASE + 0x4F8)
+
+/* DPORT_SHROM_MPU_TABLE21 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE21  0x00000003
+#define DPORT_SHROM_MPU_TABLE21_M  ((DPORT_SHROM_MPU_TABLE21_V)<<(DPORT_SHROM_MPU_TABLE21_S))
+#define DPORT_SHROM_MPU_TABLE21_V  0x3
+#define DPORT_SHROM_MPU_TABLE21_S  0
+
+#define DPORT_SHROM_MPU_TABLE22_REG          (DR_REG_DPORT_BASE + 0x4FC)
+
+/* DPORT_SHROM_MPU_TABLE22 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE22  0x00000003
+#define DPORT_SHROM_MPU_TABLE22_M  ((DPORT_SHROM_MPU_TABLE22_V)<<(DPORT_SHROM_MPU_TABLE22_S))
+#define DPORT_SHROM_MPU_TABLE22_V  0x3
+#define DPORT_SHROM_MPU_TABLE22_S  0
+
+#define DPORT_SHROM_MPU_TABLE23_REG          (DR_REG_DPORT_BASE + 0x500)
+
+/* DPORT_SHROM_MPU_TABLE23 : R/W ;bitpos:[1:0] ;default: 2'b1 ; */
+/* Description: */
+
+#define DPORT_SHROM_MPU_TABLE23  0x00000003
+#define DPORT_SHROM_MPU_TABLE23_M  ((DPORT_SHROM_MPU_TABLE23_V)<<(DPORT_SHROM_MPU_TABLE23_S))
+#define DPORT_SHROM_MPU_TABLE23_V  0x3
+#define DPORT_SHROM_MPU_TABLE23_S  0
+
+#define DPORT_IMMU_TABLE0_REG          (DR_REG_DPORT_BASE + 0x504)
+
+/* DPORT_IMMU_TABLE0 : R/W ;bitpos:[6:0] ;default: 7'd0 ; */
+/* Description: */
+
+#define DPORT_IMMU_TABLE0  0x0000007F
+#define DPORT_IMMU_TABLE0_M  ((DPORT_IMMU_TABLE0_V)<<(DPORT_IMMU_TABLE0_S))
+#define DPORT_IMMU_TABLE0_V  0x7F
+#define DPORT_IMMU_TABLE0_S  0
+
+#define DPORT_IMMU_TABLE1_REG          (DR_REG_DPORT_BASE + 0x508)
+
+/* DPORT_IMMU_TABLE1 : R/W ;bitpos:[6:0] ;default: 7'd1 ; */
+/* Description: */
+
+#define DPORT_IMMU_TABLE1  0x0000007F
+#define DPORT_IMMU_TABLE1_M  ((DPORT_IMMU_TABLE1_V)<<(DPORT_IMMU_TABLE1_S))
+#define DPORT_IMMU_TABLE1_V  0x7F
+#define DPORT_IMMU_TABLE1_S  0
+
+#define DPORT_IMMU_TABLE2_REG          (DR_REG_DPORT_BASE + 0x50C)
+
+/* DPORT_IMMU_TABLE2 : R/W ;bitpos:[6:0] ;default: 7'd2 ; */
+/* Description: */
+
+#define DPORT_IMMU_TABLE2  0x0000007F
+#define DPORT_IMMU_TABLE2_M  ((DPORT_IMMU_TABLE2_V)<<(DPORT_IMMU_TABLE2_S))
+#define DPORT_IMMU_TABLE2_V  0x7F
+#define DPORT_IMMU_TABLE2_S  0
+
+#define DPORT_IMMU_TABLE3_REG          (DR_REG_DPORT_BASE + 0x510)
+
+/* DPORT_IMMU_TABLE3 : R/W ;bitpos:[6:0] ;default: 7'd3 ; */
+/* Description: */
+
+#define DPORT_IMMU_TABLE3  0x0000007F
+#define DPORT_IMMU_TABLE3_M  ((DPORT_IMMU_TABLE3_V)<<(DPORT_IMMU_TABLE3_S))
+#define DPORT_IMMU_TABLE3_V  0x7F
+#define DPORT_IMMU_TABLE3_S  0
+
+#define DPORT_IMMU_TABLE4_REG          (DR_REG_DPORT_BASE + 0x514)
+
+/* DPORT_IMMU_TABLE4 : R/W ;bitpos:[6:0] ;default: 7'd4 ; */
+/* Description: */
+
+#define DPORT_IMMU_TABLE4  0x0000007F
+#define DPORT_IMMU_TABLE4_M  ((DPORT_IMMU_TABLE4_V)<<(DPORT_IMMU_TABLE4_S))
+#define DPORT_IMMU_TABLE4_V  0x7F
+#define DPORT_IMMU_TABLE4_S  0
+
+#define DPORT_IMMU_TABLE5_REG          (DR_REG_DPORT_BASE + 0x518)
+
+/* DPORT_IMMU_TABLE5 : R/W ;bitpos:[6:0] ;default: 7'd5 ; */
+/* Description: */
+
+#define DPORT_IMMU_TABLE5  0x0000007F
+#define DPORT_IMMU_TABLE5_M  ((DPORT_IMMU_TABLE5_V)<<(DPORT_IMMU_TABLE5_S))
+#define DPORT_IMMU_TABLE5_V  0x7F
+#define DPORT_IMMU_TABLE5_S  0
+
+#define DPORT_IMMU_TABLE6_REG          (DR_REG_DPORT_BASE + 0x51C)
+
+/* DPORT_IMMU_TABLE6 : R/W ;bitpos:[6:0] ;default: 7'd6 ; */
+/* Description: */
+
+#define DPORT_IMMU_TABLE6  0x0000007F
+#define DPORT_IMMU_TABLE6_M  ((DPORT_IMMU_TABLE6_V)<<(DPORT_IMMU_TABLE6_S))
+#define DPORT_IMMU_TABLE6_V  0x7F
+#define DPORT_IMMU_TABLE6_S  0
+
+#define DPORT_IMMU_TABLE7_REG          (DR_REG_DPORT_BASE + 0x520)
+
+/* DPORT_IMMU_TABLE7 : R/W ;bitpos:[6:0] ;default: 7'd7 ; */
+/* Description: */
+
+#define DPORT_IMMU_TABLE7  0x0000007F
+#define DPORT_IMMU_TABLE7_M  ((DPORT_IMMU_TABLE7_V)<<(DPORT_IMMU_TABLE7_S))
+#define DPORT_IMMU_TABLE7_V  0x7F
+#define DPORT_IMMU_TABLE7_S  0
+
+#define DPORT_IMMU_TABLE8_REG          (DR_REG_DPORT_BASE + 0x524)
+
+/* DPORT_IMMU_TABLE8 : R/W ;bitpos:[6:0] ;default: 7'd8 ; */
+/* Description: */
+
+#define DPORT_IMMU_TABLE8  0x0000007F
+#define DPORT_IMMU_TABLE8_M  ((DPORT_IMMU_TABLE8_V)<<(DPORT_IMMU_TABLE8_S))
+#define DPORT_IMMU_TABLE8_V  0x7F
+#define DPORT_IMMU_TABLE8_S  0
+
+#define DPORT_IMMU_TABLE9_REG          (DR_REG_DPORT_BASE + 0x528)
+
+/* DPORT_IMMU_TABLE9 : R/W ;bitpos:[6:0] ;default: 7'd9 ; */
+/* Description: */
+
+#define DPORT_IMMU_TABLE9  0x0000007F
+#define DPORT_IMMU_TABLE9_M  ((DPORT_IMMU_TABLE9_V)<<(DPORT_IMMU_TABLE9_S))
+#define DPORT_IMMU_TABLE9_V  0x7F
+#define DPORT_IMMU_TABLE9_S  0
+
+#define DPORT_IMMU_TABLE10_REG          (DR_REG_DPORT_BASE + 0x52C)
+
+/* DPORT_IMMU_TABLE10 : R/W ;bitpos:[6:0] ;default: 7'd10 ; */
+/* Description: */
+
+#define DPORT_IMMU_TABLE10  0x0000007F
+#define DPORT_IMMU_TABLE10_M  ((DPORT_IMMU_TABLE10_V)<<(DPORT_IMMU_TABLE10_S))
+#define DPORT_IMMU_TABLE10_V  0x7F
+#define DPORT_IMMU_TABLE10_S  0
+
+#define DPORT_IMMU_TABLE11_REG          (DR_REG_DPORT_BASE + 0x530)
+
+/* DPORT_IMMU_TABLE11 : R/W ;bitpos:[6:0] ;default: 7'd11 ; */
+/* Description: */
+
+#define DPORT_IMMU_TABLE11  0x0000007F
+#define DPORT_IMMU_TABLE11_M  ((DPORT_IMMU_TABLE11_V)<<(DPORT_IMMU_TABLE11_S))
+#define DPORT_IMMU_TABLE11_V  0x7F
+#define DPORT_IMMU_TABLE11_S  0
+
+#define DPORT_IMMU_TABLE12_REG          (DR_REG_DPORT_BASE + 0x534)
+
+/* DPORT_IMMU_TABLE12 : R/W ;bitpos:[6:0] ;default: 7'd12 ; */
+/* Description: */
+
+#define DPORT_IMMU_TABLE12  0x0000007F
+#define DPORT_IMMU_TABLE12_M  ((DPORT_IMMU_TABLE12_V)<<(DPORT_IMMU_TABLE12_S))
+#define DPORT_IMMU_TABLE12_V  0x7F
+#define DPORT_IMMU_TABLE12_S  0
+
+#define DPORT_IMMU_TABLE13_REG          (DR_REG_DPORT_BASE + 0x538)
+
+/* DPORT_IMMU_TABLE13 : R/W ;bitpos:[6:0] ;default: 7'd13 ; */
+/* Description: */
+
+#define DPORT_IMMU_TABLE13  0x0000007F
+#define DPORT_IMMU_TABLE13_M  ((DPORT_IMMU_TABLE13_V)<<(DPORT_IMMU_TABLE13_S))
+#define DPORT_IMMU_TABLE13_V  0x7F
+#define DPORT_IMMU_TABLE13_S  0
+
+#define DPORT_IMMU_TABLE14_REG          (DR_REG_DPORT_BASE + 0x53C)
+
+/* DPORT_IMMU_TABLE14 : R/W ;bitpos:[6:0] ;default: 7'd14 ; */
+/* Description: */
+
+#define DPORT_IMMU_TABLE14  0x0000007F
+#define DPORT_IMMU_TABLE14_M  ((DPORT_IMMU_TABLE14_V)<<(DPORT_IMMU_TABLE14_S))
+#define DPORT_IMMU_TABLE14_V  0x7F
+#define DPORT_IMMU_TABLE14_S  0
+
+#define DPORT_IMMU_TABLE15_REG          (DR_REG_DPORT_BASE + 0x540)
+
+/* DPORT_IMMU_TABLE15 : R/W ;bitpos:[6:0] ;default: 7'd15 ; */
+/* Description: */
+
+#define DPORT_IMMU_TABLE15  0x0000007F
+#define DPORT_IMMU_TABLE15_M  ((DPORT_IMMU_TABLE15_V)<<(DPORT_IMMU_TABLE15_S))
+#define DPORT_IMMU_TABLE15_V  0x7F
+#define DPORT_IMMU_TABLE15_S  0
+
+#define DPORT_DMMU_TABLE0_REG          (DR_REG_DPORT_BASE + 0x544)
+
+/* DPORT_DMMU_TABLE0 : R/W ;bitpos:[6:0] ;default: 7'd0 ; */
+/* Description: */
+
+#define DPORT_DMMU_TABLE0  0x0000007F
+#define DPORT_DMMU_TABLE0_M  ((DPORT_DMMU_TABLE0_V)<<(DPORT_DMMU_TABLE0_S))
+#define DPORT_DMMU_TABLE0_V  0x7F
+#define DPORT_DMMU_TABLE0_S  0
+
+#define DPORT_DMMU_TABLE1_REG          (DR_REG_DPORT_BASE + 0x548)
+
+/* DPORT_DMMU_TABLE1 : R/W ;bitpos:[6:0] ;default: 7'd1 ; */
+/* Description: */
+
+#define DPORT_DMMU_TABLE1  0x0000007F
+#define DPORT_DMMU_TABLE1_M  ((DPORT_DMMU_TABLE1_V)<<(DPORT_DMMU_TABLE1_S))
+#define DPORT_DMMU_TABLE1_V  0x7F
+#define DPORT_DMMU_TABLE1_S  0
+
+#define DPORT_DMMU_TABLE2_REG          (DR_REG_DPORT_BASE + 0x54C)
+
+/* DPORT_DMMU_TABLE2 : R/W ;bitpos:[6:0] ;default: 7'd2 ; */
+/* Description: */
+
+#define DPORT_DMMU_TABLE2  0x0000007F
+#define DPORT_DMMU_TABLE2_M  ((DPORT_DMMU_TABLE2_V)<<(DPORT_DMMU_TABLE2_S))
+#define DPORT_DMMU_TABLE2_V  0x7F
+#define DPORT_DMMU_TABLE2_S  0
+
+#define DPORT_DMMU_TABLE3_REG          (DR_REG_DPORT_BASE + 0x550)
+
+/* DPORT_DMMU_TABLE3 : R/W ;bitpos:[6:0] ;default: 7'd3 ; */
+/* Description: */
+
+#define DPORT_DMMU_TABLE3  0x0000007F
+#define DPORT_DMMU_TABLE3_M  ((DPORT_DMMU_TABLE3_V)<<(DPORT_DMMU_TABLE3_S))
+#define DPORT_DMMU_TABLE3_V  0x7F
+#define DPORT_DMMU_TABLE3_S  0
+
+#define DPORT_DMMU_TABLE4_REG          (DR_REG_DPORT_BASE + 0x554)
+
+/* DPORT_DMMU_TABLE4 : R/W ;bitpos:[6:0] ;default: 7'd4 ; */
+/* Description: */
+
+#define DPORT_DMMU_TABLE4  0x0000007F
+#define DPORT_DMMU_TABLE4_M  ((DPORT_DMMU_TABLE4_V)<<(DPORT_DMMU_TABLE4_S))
+#define DPORT_DMMU_TABLE4_V  0x7F
+#define DPORT_DMMU_TABLE4_S  0
+
+#define DPORT_DMMU_TABLE5_REG          (DR_REG_DPORT_BASE + 0x558)
+
+/* DPORT_DMMU_TABLE5 : R/W ;bitpos:[6:0] ;default: 7'd5 ; */
+/* Description: */
+
+#define DPORT_DMMU_TABLE5  0x0000007F
+#define DPORT_DMMU_TABLE5_M  ((DPORT_DMMU_TABLE5_V)<<(DPORT_DMMU_TABLE5_S))
+#define DPORT_DMMU_TABLE5_V  0x7F
+#define DPORT_DMMU_TABLE5_S  0
+
+#define DPORT_DMMU_TABLE6_REG          (DR_REG_DPORT_BASE + 0x55C)
+
+/* DPORT_DMMU_TABLE6 : R/W ;bitpos:[6:0] ;default: 7'd6 ; */
+/* Description: */
+
+#define DPORT_DMMU_TABLE6  0x0000007F
+#define DPORT_DMMU_TABLE6_M  ((DPORT_DMMU_TABLE6_V)<<(DPORT_DMMU_TABLE6_S))
+#define DPORT_DMMU_TABLE6_V  0x7F
+#define DPORT_DMMU_TABLE6_S  0
+
+#define DPORT_DMMU_TABLE7_REG          (DR_REG_DPORT_BASE + 0x560)
+
+/* DPORT_DMMU_TABLE7 : R/W ;bitpos:[6:0] ;default: 7'd7 ; */
+/* Description: */
+
+#define DPORT_DMMU_TABLE7  0x0000007F
+#define DPORT_DMMU_TABLE7_M  ((DPORT_DMMU_TABLE7_V)<<(DPORT_DMMU_TABLE7_S))
+#define DPORT_DMMU_TABLE7_V  0x7F
+#define DPORT_DMMU_TABLE7_S  0
+
+#define DPORT_DMMU_TABLE8_REG          (DR_REG_DPORT_BASE + 0x564)
+
+/* DPORT_DMMU_TABLE8 : R/W ;bitpos:[6:0] ;default: 7'd8 ; */
+/* Description: */
+
+#define DPORT_DMMU_TABLE8  0x0000007F
+#define DPORT_DMMU_TABLE8_M  ((DPORT_DMMU_TABLE8_V)<<(DPORT_DMMU_TABLE8_S))
+#define DPORT_DMMU_TABLE8_V  0x7F
+#define DPORT_DMMU_TABLE8_S  0
+
+#define DPORT_DMMU_TABLE9_REG          (DR_REG_DPORT_BASE + 0x568)
+
+/* DPORT_DMMU_TABLE9 : R/W ;bitpos:[6:0] ;default: 7'd9 ; */
+/* Description: */
+
+#define DPORT_DMMU_TABLE9  0x0000007F
+#define DPORT_DMMU_TABLE9_M  ((DPORT_DMMU_TABLE9_V)<<(DPORT_DMMU_TABLE9_S))
+#define DPORT_DMMU_TABLE9_V  0x7F
+#define DPORT_DMMU_TABLE9_S  0
+
+#define DPORT_DMMU_TABLE10_REG          (DR_REG_DPORT_BASE + 0x56C)
+
+/* DPORT_DMMU_TABLE10 : R/W ;bitpos:[6:0] ;default: 7'd10 ; */
+/* Description: */
+
+#define DPORT_DMMU_TABLE10  0x0000007F
+#define DPORT_DMMU_TABLE10_M  ((DPORT_DMMU_TABLE10_V)<<(DPORT_DMMU_TABLE10_S))
+#define DPORT_DMMU_TABLE10_V  0x7F
+#define DPORT_DMMU_TABLE10_S  0
+
+#define DPORT_DMMU_TABLE11_REG          (DR_REG_DPORT_BASE + 0x570)
+
+/* DPORT_DMMU_TABLE11 : R/W ;bitpos:[6:0] ;default: 7'd11 ; */
+/* Description: */
+
+#define DPORT_DMMU_TABLE11  0x0000007F
+#define DPORT_DMMU_TABLE11_M  ((DPORT_DMMU_TABLE11_V)<<(DPORT_DMMU_TABLE11_S))
+#define DPORT_DMMU_TABLE11_V  0x7F
+#define DPORT_DMMU_TABLE11_S  0
+
+#define DPORT_DMMU_TABLE12_REG          (DR_REG_DPORT_BASE + 0x574)
+
+/* DPORT_DMMU_TABLE12 : R/W ;bitpos:[6:0] ;default: 7'd12 ; */
+/* Description: */
+
+#define DPORT_DMMU_TABLE12  0x0000007F
+#define DPORT_DMMU_TABLE12_M  ((DPORT_DMMU_TABLE12_V)<<(DPORT_DMMU_TABLE12_S))
+#define DPORT_DMMU_TABLE12_V  0x7F
+#define DPORT_DMMU_TABLE12_S  0
+
+#define DPORT_DMMU_TABLE13_REG          (DR_REG_DPORT_BASE + 0x578)
+
+/* DPORT_DMMU_TABLE13 : R/W ;bitpos:[6:0] ;default: 7'd13 ; */
+/* Description: */
+
+#define DPORT_DMMU_TABLE13  0x0000007F
+#define DPORT_DMMU_TABLE13_M  ((DPORT_DMMU_TABLE13_V)<<(DPORT_DMMU_TABLE13_S))
+#define DPORT_DMMU_TABLE13_V  0x7F
+#define DPORT_DMMU_TABLE13_S  0
+
+#define DPORT_DMMU_TABLE14_REG          (DR_REG_DPORT_BASE + 0x57C)
+
+/* DPORT_DMMU_TABLE14 : R/W ;bitpos:[6:0] ;default: 7'd14 ; */
+/* Description: */
+
+#define DPORT_DMMU_TABLE14  0x0000007F
+#define DPORT_DMMU_TABLE14_M  ((DPORT_DMMU_TABLE14_V)<<(DPORT_DMMU_TABLE14_S))
+#define DPORT_DMMU_TABLE14_V  0x7F
+#define DPORT_DMMU_TABLE14_S  0
+
+#define DPORT_DMMU_TABLE15_REG          (DR_REG_DPORT_BASE + 0x580)
+
+/* DPORT_DMMU_TABLE15 : R/W ;bitpos:[6:0] ;default: 7'd15 ; */
+/* Description: */
+
+#define DPORT_DMMU_TABLE15  0x0000007F
+#define DPORT_DMMU_TABLE15_M  ((DPORT_DMMU_TABLE15_V)<<(DPORT_DMMU_TABLE15_S))
+#define DPORT_DMMU_TABLE15_V  0x7F
+#define DPORT_DMMU_TABLE15_S  0
+
+#define DPORT_PRO_INTRUSION_CTRL_REG          (DR_REG_DPORT_BASE + 0x584)
+
+/* DPORT_PRO_INTRUSION_RECORD_RESET_N : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_PRO_INTRUSION_RECORD_RESET_N  (BIT(0))
+#define DPORT_PRO_INTRUSION_RECORD_RESET_N_M  (BIT(0))
+#define DPORT_PRO_INTRUSION_RECORD_RESET_N_V  0x1
+#define DPORT_PRO_INTRUSION_RECORD_RESET_N_S  0
+
+#define DPORT_PRO_INTRUSION_STATUS_REG          (DR_REG_DPORT_BASE + 0x588)
+
+/* DPORT_PRO_INTRUSION_RECORD : RO ;bitpos:[3:0] ;default: 4'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_INTRUSION_RECORD  0x0000000F
+#define DPORT_PRO_INTRUSION_RECORD_M  ((DPORT_PRO_INTRUSION_RECORD_V)<<(DPORT_PRO_INTRUSION_RECORD_S))
+#define DPORT_PRO_INTRUSION_RECORD_V  0xF
+#define DPORT_PRO_INTRUSION_RECORD_S  0
+
+#define DPORT_APP_INTRUSION_CTRL_REG          (DR_REG_DPORT_BASE + 0x58C)
+
+/* DPORT_APP_INTRUSION_RECORD_RESET_N : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_APP_INTRUSION_RECORD_RESET_N  (BIT(0))
+#define DPORT_APP_INTRUSION_RECORD_RESET_N_M  (BIT(0))
+#define DPORT_APP_INTRUSION_RECORD_RESET_N_V  0x1
+#define DPORT_APP_INTRUSION_RECORD_RESET_N_S  0
+
+#define DPORT_APP_INTRUSION_STATUS_REG          (DR_REG_DPORT_BASE + 0x590)
+
+/* DPORT_APP_INTRUSION_RECORD : RO ;bitpos:[3:0] ;default: 4'b0 ; */
+/* Description: */
+
+#define DPORT_APP_INTRUSION_RECORD  0x0000000F
+#define DPORT_APP_INTRUSION_RECORD_M  ((DPORT_APP_INTRUSION_RECORD_V)<<(DPORT_APP_INTRUSION_RECORD_S))
+#define DPORT_APP_INTRUSION_RECORD_V  0xF
+#define DPORT_APP_INTRUSION_RECORD_S  0
+
+#define DPORT_FRONT_END_MEM_PD_REG          (DR_REG_DPORT_BASE + 0x594)
+
+/* DPORT_PBUS_MEM_FORCE_PD : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_PBUS_MEM_FORCE_PD  (BIT(3))
+#define DPORT_PBUS_MEM_FORCE_PD_M  (BIT(3))
+#define DPORT_PBUS_MEM_FORCE_PD_V  0x1
+#define DPORT_PBUS_MEM_FORCE_PD_S  3
+
+/* DPORT_PBUS_MEM_FORCE_PU : R/W ;bitpos:[2] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_PBUS_MEM_FORCE_PU  (BIT(2))
+#define DPORT_PBUS_MEM_FORCE_PU_M  (BIT(2))
+#define DPORT_PBUS_MEM_FORCE_PU_V  0x1
+#define DPORT_PBUS_MEM_FORCE_PU_S  2
+
+/* DPORT_AGC_MEM_FORCE_PD : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_AGC_MEM_FORCE_PD  (BIT(1))
+#define DPORT_AGC_MEM_FORCE_PD_M  (BIT(1))
+#define DPORT_AGC_MEM_FORCE_PD_V  0x1
+#define DPORT_AGC_MEM_FORCE_PD_S  1
+
+/* DPORT_AGC_MEM_FORCE_PU : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/* Description: */
+
+#define DPORT_AGC_MEM_FORCE_PU  (BIT(0))
+#define DPORT_AGC_MEM_FORCE_PU_M  (BIT(0))
+#define DPORT_AGC_MEM_FORCE_PU_V  0x1
+#define DPORT_AGC_MEM_FORCE_PU_S  0
+
+#define DPORT_MMU_IA_INT_EN_REG          (DR_REG_DPORT_BASE + 0x598)
+
+/* DPORT_MMU_IA_INT_EN : R/W ;bitpos:[23:0] ;default: 24'b0 ; */
+/* Description: */
+
+#define DPORT_MMU_IA_INT_EN  0x00FFFFFF
+#define DPORT_MMU_IA_INT_EN_M  ((DPORT_MMU_IA_INT_EN_V)<<(DPORT_MMU_IA_INT_EN_S))
+#define DPORT_MMU_IA_INT_EN_V  0xFFFFFF
+#define DPORT_MMU_IA_INT_EN_S  0
+
+#define DPORT_MPU_IA_INT_EN_REG          (DR_REG_DPORT_BASE + 0x59C)
+
+/* DPORT_MPU_IA_INT_EN : R/W ;bitpos:[16:0] ;default: 17'b0 ; */
+/* Description: */
+
+#define DPORT_MPU_IA_INT_EN  0x0001FFFF
+#define DPORT_MPU_IA_INT_EN_M  ((DPORT_MPU_IA_INT_EN_V)<<(DPORT_MPU_IA_INT_EN_S))
+#define DPORT_MPU_IA_INT_EN_V  0x1FFFF
+#define DPORT_MPU_IA_INT_EN_S  0
+
+#define DPORT_CACHE_IA_INT_EN_REG          (DR_REG_DPORT_BASE + 0x5A0)
+
+/* DPORT_CACHE_IA_INT_EN : R/W ;bitpos:[27:0] ;default: 28'b0 ; */
+/* Description: */
+
+#define DPORT_CACHE_IA_INT_EN  0x0FFFFFFF
+#define DPORT_CACHE_IA_INT_EN_M  ((DPORT_CACHE_IA_INT_EN_V)<<(DPORT_CACHE_IA_INT_EN_S))
+#define DPORT_CACHE_IA_INT_EN_V  0xFFFFFFF
+#define DPORT_CACHE_IA_INT_EN_S  0
+
+#define DPORT_SECURE_BOOT_CTRL_REG          (DR_REG_DPORT_BASE + 0x5A4)
+
+/* DPORT_SW_BOOTLOADER_SEL : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: */
+
+#define DPORT_SW_BOOTLOADER_SEL  (BIT(0))
+#define DPORT_SW_BOOTLOADER_SEL_M  (BIT(0))
+#define DPORT_SW_BOOTLOADER_SEL_V  0x1
+#define DPORT_SW_BOOTLOADER_SEL_S  0
+
+#define DPORT_SPI_DMA_CHAN_SEL_REG          (DR_REG_DPORT_BASE + 0x5A8)
+
+/* DPORT_SPI3_DMA_CHAN_SEL : R/W ;bitpos:[5:4] ;default: 2'b00 ; */
+/* Description: */
+
+#define DPORT_SPI3_DMA_CHAN_SEL  0x00000003
+#define DPORT_SPI3_DMA_CHAN_SEL_M  ((DPORT_SPI3_DMA_CHAN_SEL_V)<<(DPORT_SPI3_DMA_CHAN_SEL_S))
+#define DPORT_SPI3_DMA_CHAN_SEL_V  0x3
+#define DPORT_SPI3_DMA_CHAN_SEL_S  4
+
+/* DPORT_SPI2_DMA_CHAN_SEL : R/W ;bitpos:[3:2] ;default: 2'b00 ; */
+/* Description: */
+
+#define DPORT_SPI2_DMA_CHAN_SEL  0x00000003
+#define DPORT_SPI2_DMA_CHAN_SEL_M  ((DPORT_SPI2_DMA_CHAN_SEL_V)<<(DPORT_SPI2_DMA_CHAN_SEL_S))
+#define DPORT_SPI2_DMA_CHAN_SEL_V  0x3
+#define DPORT_SPI2_DMA_CHAN_SEL_S  2
+
+/* DPORT_SPI1_DMA_CHAN_SEL : R/W ;bitpos:[1:0] ;default: 2'b00 ; */
+/* Description: */
+
+#define DPORT_SPI1_DMA_CHAN_SEL  0x00000003
+#define DPORT_SPI1_DMA_CHAN_SEL_M  ((DPORT_SPI1_DMA_CHAN_SEL_V)<<(DPORT_SPI1_DMA_CHAN_SEL_S))
+#define DPORT_SPI1_DMA_CHAN_SEL_V  0x3
+#define DPORT_SPI1_DMA_CHAN_SEL_S  0
+
+#define DPORT_PRO_VECBASE_CTRL_REG          (DR_REG_DPORT_BASE + 0x5AC)
+
+/* DPORT_PRO_OUT_VECBASE_SEL : R/W ;bitpos:[1:0] ;default: 2'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_OUT_VECBASE_SEL  0x00000003
+#define DPORT_PRO_OUT_VECBASE_SEL_M  ((DPORT_PRO_OUT_VECBASE_SEL_V)<<(DPORT_PRO_OUT_VECBASE_SEL_S))
+#define DPORT_PRO_OUT_VECBASE_SEL_V  0x3
+#define DPORT_PRO_OUT_VECBASE_SEL_S  0
+
+#define DPORT_PRO_VECBASE_SET_REG          (DR_REG_DPORT_BASE + 0x5B0)
+
+/* DPORT_PRO_OUT_VECBASE_REG : R/W ;bitpos:[21:0] ;default: 22'b0 ; */
+/* Description: */
+
+#define DPORT_PRO_OUT_VECBASE_REG  0x003FFFFF
+#define DPORT_PRO_OUT_VECBASE_REG_M  ((DPORT_PRO_OUT_VECBASE_REG_V)<<(DPORT_PRO_OUT_VECBASE_REG_S))
+#define DPORT_PRO_OUT_VECBASE_REG_V  0x3FFFFF
+#define DPORT_PRO_OUT_VECBASE_REG_S  0
+
+#define DPORT_APP_VECBASE_CTRL_REG          (DR_REG_DPORT_BASE + 0x5B4)
+
+/* DPORT_APP_OUT_VECBASE_SEL : R/W ;bitpos:[1:0] ;default: 2'b0 ; */
+/* Description: */
+
+#define DPORT_APP_OUT_VECBASE_SEL  0x00000003
+#define DPORT_APP_OUT_VECBASE_SEL_M  ((DPORT_APP_OUT_VECBASE_SEL_V)<<(DPORT_APP_OUT_VECBASE_SEL_S))
+#define DPORT_APP_OUT_VECBASE_SEL_V  0x3
+#define DPORT_APP_OUT_VECBASE_SEL_S  0
+
+#define DPORT_APP_VECBASE_SET_REG          (DR_REG_DPORT_BASE + 0x5B8)
+
+/* DPORT_APP_OUT_VECBASE_REG : R/W ;bitpos:[21:0] ;default: 22'b0 ; */
+/* Description: */
+
+#define DPORT_APP_OUT_VECBASE_REG  0x003FFFFF
+#define DPORT_APP_OUT_VECBASE_REG_M  ((DPORT_APP_OUT_VECBASE_REG_V)<<(DPORT_APP_OUT_VECBASE_REG_S))
+#define DPORT_APP_OUT_VECBASE_REG_V  0x3FFFFF
+#define DPORT_APP_OUT_VECBASE_REG_S  0
+
+#define DPORT_DATE_REG          (DR_REG_DPORT_BASE + 0xFFC)
+
+/* DPORT_DATE : R/W ;bitpos:[27:0] ;default: 28'h1605190 ; */
+/* Description: */
+
+#define DPORT_DATE  0x0FFFFFFF
+#define DPORT_DATE_M  ((DPORT_DATE_V)<<(DPORT_DATE_S))
+#define DPORT_DATE_V  0xFFFFFFF
+#define DPORT_DATE_S  0
+#define DPORT_DPORT_DATE_VERSION 0x1605190
+
+#endif /*__ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_DPORT_H */
diff --git a/arch/xtensa/src/esp32/chip/esp32_gpio.h b/arch/xtensa/src/esp32/chip/esp32_gpio.h
new file mode 100644
index 0000000000000000000000000000000000000000..17cc102ed4a6599a6a29bfc4da5ab87f3a0f6f87
--- /dev/null
+++ b/arch/xtensa/src/esp32/chip/esp32_gpio.h
@@ -0,0 +1,11643 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/chip/esp32_gpio.h
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from logic originally provided by Espressif Systems:
+ *
+ *   Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_GPIO_H
+#define __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_GPIO_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include "chip/esp32_soc.h"
+
+/****************************************************************************
+ * Pre-preprocessor Definitions
+ ****************************************************************************/
+
+#define GPIO_BT_SELECT_REG          (DR_REG_GPIO_BASE + 0x0000)
+
+/* GPIO_BT_SEL : R/W ;bitpos:[31:0] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_BT_SEL    0xFFFFFFFF
+#define GPIO_BT_SEL_M  ((GPIO_BT_SEL_V)<<(GPIO_BT_SEL_S))
+#define GPIO_BT_SEL_V  0xFFFFFFFF
+#define GPIO_BT_SEL_S  0
+
+#define GPIO_OUT_REG          (DR_REG_GPIO_BASE + 0x0004)
+
+/* GPIO_OUT_DATA : R/W ;bitpos:[31:0] ;default: x ; */
+/* Description: GPIO0~31 output value */
+
+#define GPIO_OUT_DATA  0xFFFFFFFF
+#define GPIO_OUT_DATA_M  ((GPIO_OUT_DATA_V)<<(GPIO_OUT_DATA_S))
+#define GPIO_OUT_DATA_V  0xFFFFFFFF
+#define GPIO_OUT_DATA_S  0
+
+#define GPIO_OUT_W1TS_REG          (DR_REG_GPIO_BASE + 0x0008)
+
+/* GPIO_OUT_DATA_W1TS : R/W ;bitpos:[31:0] ;default: x ; */
+/* Description: GPIO0~31 output value write 1 to set */
+
+#define GPIO_OUT_DATA_W1TS  0xFFFFFFFF
+#define GPIO_OUT_DATA_W1TS_M  ((GPIO_OUT_DATA_W1TS_V)<<(GPIO_OUT_DATA_W1TS_S))
+#define GPIO_OUT_DATA_W1TS_V  0xFFFFFFFF
+#define GPIO_OUT_DATA_W1TS_S  0
+
+#define GPIO_OUT_W1TC_REG          (DR_REG_GPIO_BASE + 0x000c)
+
+/* GPIO_OUT_DATA_W1TC : R/W ;bitpos:[31:0] ;default: x ; */
+/* Description: GPIO0~31 output value write 1 to clear */
+
+#define GPIO_OUT_DATA_W1TC  0xFFFFFFFF
+#define GPIO_OUT_DATA_W1TC_M  ((GPIO_OUT_DATA_W1TC_V)<<(GPIO_OUT_DATA_W1TC_S))
+#define GPIO_OUT_DATA_W1TC_V  0xFFFFFFFF
+#define GPIO_OUT_DATA_W1TC_S  0
+
+#define GPIO_OUT1_REG          (DR_REG_GPIO_BASE + 0x0010)
+
+/* GPIO_OUT1_DATA : R/W ;bitpos:[7:0] ;default: x ; */
+/* Description: GPIO32~39 output value */
+
+#define GPIO_OUT1_DATA  0x000000FF
+#define GPIO_OUT1_DATA_M  ((GPIO_OUT1_DATA_V)<<(GPIO_OUT1_DATA_S))
+#define GPIO_OUT1_DATA_V  0xFF
+#define GPIO_OUT1_DATA_S  0
+
+#define GPIO_OUT1_W1TS_REG          (DR_REG_GPIO_BASE + 0x0014)
+
+/* GPIO_OUT1_DATA_W1TS : R/W ;bitpos:[7:0] ;default: x ; */
+/* Description: GPIO32~39 output value write 1 to set */
+
+#define GPIO_OUT1_DATA_W1TS  0x000000FF
+#define GPIO_OUT1_DATA_W1TS_M  ((GPIO_OUT1_DATA_W1TS_V)<<(GPIO_OUT1_DATA_W1TS_S))
+#define GPIO_OUT1_DATA_W1TS_V  0xFF
+#define GPIO_OUT1_DATA_W1TS_S  0
+
+#define GPIO_OUT1_W1TC_REG          (DR_REG_GPIO_BASE + 0x0018)
+
+/* GPIO_OUT1_DATA_W1TC : R/W ;bitpos:[7:0] ;default: x ; */
+/* Description: GPIO32~39 output value write 1 to clear */
+
+#define GPIO_OUT1_DATA_W1TC  0x000000FF
+#define GPIO_OUT1_DATA_W1TC_M  ((GPIO_OUT1_DATA_W1TC_V)<<(GPIO_OUT1_DATA_W1TC_S))
+#define GPIO_OUT1_DATA_W1TC_V  0xFF
+#define GPIO_OUT1_DATA_W1TC_S  0
+
+#define GPIO_SDIO_SELECT_REG          (DR_REG_GPIO_BASE + 0x001c)
+
+/* GPIO_SDIO_SEL : R/W ;bitpos:[7:0] ;default: x ; */
+/* Description: SDIO PADS on/off control from outside */
+
+#define GPIO_SDIO_SEL    0x000000FF
+#define GPIO_SDIO_SEL_M  ((GPIO_SDIO_SEL_V)<<(GPIO_SDIO_SEL_S))
+#define GPIO_SDIO_SEL_V  0xFF
+#define GPIO_SDIO_SEL_S  0
+
+#define GPIO_ENABLE_REG          (DR_REG_GPIO_BASE + 0x0020)
+
+/* GPIO_ENABLE_DATA : R/W ;bitpos:[31:0] ;default: x ; */
+/* Description: GPIO0~31 output enable */
+
+#define GPIO_ENABLE_DATA  0xFFFFFFFF
+#define GPIO_ENABLE_DATA_M  ((GPIO_ENABLE_DATA_V)<<(GPIO_ENABLE_DATA_S))
+#define GPIO_ENABLE_DATA_V  0xFFFFFFFF
+#define GPIO_ENABLE_DATA_S  0
+
+#define GPIO_ENABLE_W1TS_REG          (DR_REG_GPIO_BASE + 0x0024)
+
+/* GPIO_ENABLE_DATA_W1TS : R/W ;bitpos:[31:0] ;default: x ; */
+/* Description: GPIO0~31 output enable write 1 to set */
+
+#define GPIO_ENABLE_DATA_W1TS  0xFFFFFFFF
+#define GPIO_ENABLE_DATA_W1TS_M  ((GPIO_ENABLE_DATA_W1TS_V)<<(GPIO_ENABLE_DATA_W1TS_S))
+#define GPIO_ENABLE_DATA_W1TS_V  0xFFFFFFFF
+#define GPIO_ENABLE_DATA_W1TS_S  0
+
+#define GPIO_ENABLE_W1TC_REG          (DR_REG_GPIO_BASE + 0x0028)
+
+/* GPIO_ENABLE_DATA_W1TC : R/W ;bitpos:[31:0] ;default: x ; */
+/* Description: GPIO0~31 output enable write 1 to clear */
+
+#define GPIO_ENABLE_DATA_W1TC  0xFFFFFFFF
+#define GPIO_ENABLE_DATA_W1TC_M  ((GPIO_ENABLE_DATA_W1TC_V)<<(GPIO_ENABLE_DATA_W1TC_S))
+#define GPIO_ENABLE_DATA_W1TC_V  0xFFFFFFFF
+#define GPIO_ENABLE_DATA_W1TC_S  0
+
+#define GPIO_ENABLE1_REG          (DR_REG_GPIO_BASE + 0x002c)
+
+/* GPIO_ENABLE1_DATA : R/W ;bitpos:[7:0] ;default: x ; */
+/* Description: GPIO32~39 output enable */
+
+#define GPIO_ENABLE1_DATA  0x000000FF
+#define GPIO_ENABLE1_DATA_M  ((GPIO_ENABLE1_DATA_V)<<(GPIO_ENABLE1_DATA_S))
+#define GPIO_ENABLE1_DATA_V  0xFF
+#define GPIO_ENABLE1_DATA_S  0
+
+#define GPIO_ENABLE1_W1TS_REG          (DR_REG_GPIO_BASE + 0x0030)
+
+/* GPIO_ENABLE1_DATA_W1TS : R/W ;bitpos:[7:0] ;default: x ; */
+/* Description: GPIO32~39 output enable write 1 to set */
+
+#define GPIO_ENABLE1_DATA_W1TS  0x000000FF
+#define GPIO_ENABLE1_DATA_W1TS_M  ((GPIO_ENABLE1_DATA_W1TS_V)<<(GPIO_ENABLE1_DATA_W1TS_S))
+#define GPIO_ENABLE1_DATA_W1TS_V  0xFF
+#define GPIO_ENABLE1_DATA_W1TS_S  0
+
+#define GPIO_ENABLE1_W1TC_REG          (DR_REG_GPIO_BASE + 0x0034)
+
+/* GPIO_ENABLE1_DATA_W1TC : R/W ;bitpos:[7:0] ;default: x ; */
+/* Description: GPIO32~39 output enable write 1 to clear */
+
+#define GPIO_ENABLE1_DATA_W1TC  0x000000FF
+#define GPIO_ENABLE1_DATA_W1TC_M  ((GPIO_ENABLE1_DATA_W1TC_V)<<(GPIO_ENABLE1_DATA_W1TC_S))
+#define GPIO_ENABLE1_DATA_W1TC_V  0xFF
+#define GPIO_ENABLE1_DATA_W1TC_S  0
+
+#define GPIO_STRAP_REG          (DR_REG_GPIO_BASE + 0x0038)
+
+/* GPIO_STRAPPING : RO ;bitpos:[15:0] ;default:  ; */
+/* Description: GPIO strapping results: {2'd0  boot_sel_dig[7:1]
+ * vsdio_boot_sel boot_sel_chip[5:0]}.   Boot_sel_dig[7:1]: {U0RXD  SD_CLK
+ * SD_CMD  SD_DATA0  SD_DATA1  SD_DATA2  SD_DATA3}.  vsdio_boot_sel: MTDI.
+ *  boot_sel_chip[5:0]: {GPIO0  U0TXD  GPIO2  GPIO4  MTDO  GPIO5}
+ */
+
+#define GPIO_STRAPPING  0x0000FFFF
+#define GPIO_STRAPPING_M  ((GPIO_STRAPPING_V)<<(GPIO_STRAPPING_S))
+#define GPIO_STRAPPING_V  0xFFFF
+#define GPIO_STRAPPING_S  0
+
+#define GPIO_IN_REG          (DR_REG_GPIO_BASE + 0x003c)
+
+/* GPIO_IN_DATA : RO ;bitpos:[31:0] ;default:  ; */
+/* Description: GPIO0~31 input value */
+
+#define GPIO_IN_DATA  0xFFFFFFFF
+#define GPIO_IN_DATA_M  ((GPIO_IN_DATA_V)<<(GPIO_IN_DATA_S))
+#define GPIO_IN_DATA_V  0xFFFFFFFF
+#define GPIO_IN_DATA_S  0
+
+#define GPIO_IN1_REG          (DR_REG_GPIO_BASE + 0x0040)
+
+/* GPIO_IN1_DATA : RO ;bitpos:[7:0] ;default:  ; */
+/* Description: GPIO32~39 input value */
+
+#define GPIO_IN1_DATA  0x000000FF
+#define GPIO_IN1_DATA_M  ((GPIO_IN1_DATA_V)<<(GPIO_IN1_DATA_S))
+#define GPIO_IN1_DATA_V  0xFF
+#define GPIO_IN1_DATA_S  0
+
+#define GPIO_STATUS_REG          (DR_REG_GPIO_BASE + 0x0044)
+
+/* GPIO_STATUS_INT : R/W ;bitpos:[31:0] ;default: x ; */
+/* Description: GPIO0~31 interrupt status */
+
+#define GPIO_STATUS_INT  0xFFFFFFFF
+#define GPIO_STATUS_INT_M  ((GPIO_STATUS_INT_V)<<(GPIO_STATUS_INT_S))
+#define GPIO_STATUS_INT_V  0xFFFFFFFF
+#define GPIO_STATUS_INT_S  0
+
+#define GPIO_STATUS_W1TS_REG          (DR_REG_GPIO_BASE + 0x0048)
+
+/* GPIO_STATUS_INT_W1TS : R/W ;bitpos:[31:0] ;default: x ; */
+/* Description: GPIO0~31 interrupt status write 1 to set */
+
+#define GPIO_STATUS_INT_W1TS  0xFFFFFFFF
+#define GPIO_STATUS_INT_W1TS_M  ((GPIO_STATUS_INT_W1TS_V)<<(GPIO_STATUS_INT_W1TS_S))
+#define GPIO_STATUS_INT_W1TS_V  0xFFFFFFFF
+#define GPIO_STATUS_INT_W1TS_S  0
+
+#define GPIO_STATUS_W1TC_REG          (DR_REG_GPIO_BASE + 0x004c)
+
+/* GPIO_STATUS_INT_W1TC : R/W ;bitpos:[31:0] ;default: x ; */
+/* Description: GPIO0~31 interrupt status write 1 to clear */
+
+#define GPIO_STATUS_INT_W1TC  0xFFFFFFFF
+#define GPIO_STATUS_INT_W1TC_M  ((GPIO_STATUS_INT_W1TC_V)<<(GPIO_STATUS_INT_W1TC_S))
+#define GPIO_STATUS_INT_W1TC_V  0xFFFFFFFF
+#define GPIO_STATUS_INT_W1TC_S  0
+
+#define GPIO_STATUS1_REG          (DR_REG_GPIO_BASE + 0x0050)
+
+/* GPIO_STATUS1_INT : R/W ;bitpos:[7:0] ;default: x ; */
+/* Description: GPIO32~39 interrupt status */
+
+#define GPIO_STATUS1_INT  0x000000FF
+#define GPIO_STATUS1_INT_M  ((GPIO_STATUS1_INT_V)<<(GPIO_STATUS1_INT_S))
+#define GPIO_STATUS1_INT_V  0xFF
+#define GPIO_STATUS1_INT_S  0
+
+#define GPIO_STATUS1_W1TS_REG          (DR_REG_GPIO_BASE + 0x0054)
+
+/* GPIO_STATUS1_INT_W1TS : R/W ;bitpos:[7:0] ;default: x ; */
+/* Description: GPIO32~39 interrupt status write 1 to set */
+
+#define GPIO_STATUS1_INT_W1TS  0x000000FF
+#define GPIO_STATUS1_INT_W1TS_M  ((GPIO_STATUS1_INT_W1TS_V)<<(GPIO_STATUS1_INT_W1TS_S))
+#define GPIO_STATUS1_INT_W1TS_V  0xFF
+#define GPIO_STATUS1_INT_W1TS_S  0
+
+#define GPIO_STATUS1_W1TC_REG          (DR_REG_GPIO_BASE + 0x0058)
+
+/* GPIO_STATUS1_INT_W1TC : R/W ;bitpos:[7:0] ;default: x ; */
+/* Description: GPIO32~39 interrupt status write 1 to clear */
+
+#define GPIO_STATUS1_INT_W1TC  0x000000FF
+#define GPIO_STATUS1_INT_W1TC_M  ((GPIO_STATUS1_INT_W1TC_V)<<(GPIO_STATUS1_INT_W1TC_S))
+#define GPIO_STATUS1_INT_W1TC_V  0xFF
+#define GPIO_STATUS1_INT_W1TC_S  0
+
+#define GPIO_ACPU_INT_REG          (DR_REG_GPIO_BASE + 0x0060)
+
+/* GPIO_APPCPU_INT : RO ;bitpos:[31:0] ;default: x ; */
+/* Description: GPIO0~31 APP CPU interrupt status */
+
+#define GPIO_APPCPU_INT  0xFFFFFFFF
+#define GPIO_APPCPU_INT_M  ((GPIO_APPCPU_INT_V)<<(GPIO_APPCPU_INT_S))
+#define GPIO_APPCPU_INT_V  0xFFFFFFFF
+#define GPIO_APPCPU_INT_S  0
+
+#define GPIO_ACPU_NMI_INT_REG          (DR_REG_GPIO_BASE + 0x0064)
+
+/* GPIO_APPCPU_NMI_INT : RO ;bitpos:[31:0] ;default: x ; */
+/* Description: GPIO0~31 APP CPU non-maskable interrupt status */
+
+#define GPIO_APPCPU_NMI_INT  0xFFFFFFFF
+#define GPIO_APPCPU_NMI_INT_M  ((GPIO_APPCPU_NMI_INT_V)<<(GPIO_APPCPU_NMI_INT_S))
+#define GPIO_APPCPU_NMI_INT_V  0xFFFFFFFF
+#define GPIO_APPCPU_NMI_INT_S  0
+
+#define GPIO_PCPU_INT_REG          (DR_REG_GPIO_BASE + 0x0068)
+
+/* GPIO_PROCPU_INT : RO ;bitpos:[31:0] ;default: x ; */
+/* Description: GPIO0~31 PRO CPU interrupt status */
+
+#define GPIO_PROCPU_INT  0xFFFFFFFF
+#define GPIO_PROCPU_INT_M  ((GPIO_PROCPU_INT_V)<<(GPIO_PROCPU_INT_S))
+#define GPIO_PROCPU_INT_V  0xFFFFFFFF
+#define GPIO_PROCPU_INT_S  0
+
+#define GPIO_PCPU_NMI_INT_REG          (DR_REG_GPIO_BASE + 0x006c)
+
+/* GPIO_PROCPU_NMI_INT : RO ;bitpos:[31:0] ;default: x ; */
+/* Description: GPIO0~31 PRO CPU non-maskable interrupt status */
+
+#define GPIO_PROCPU_NMI_INT  0xFFFFFFFF
+#define GPIO_PROCPU_NMI_INT_M  ((GPIO_PROCPU_NMI_INT_V)<<(GPIO_PROCPU_NMI_INT_S))
+#define GPIO_PROCPU_NMI_INT_V  0xFFFFFFFF
+#define GPIO_PROCPU_NMI_INT_S  0
+
+#define GPIO_CPUSDIO_INT_REG          (DR_REG_GPIO_BASE + 0x0070)
+
+/* GPIO_SDIO_INT : RO ;bitpos:[31:0] ;default: x ; */
+/* Description: SDIO's extent GPIO0~31 interrupt */
+
+#define GPIO_SDIO_INT  0xFFFFFFFF
+#define GPIO_SDIO_INT_M  ((GPIO_SDIO_INT_V)<<(GPIO_SDIO_INT_S))
+#define GPIO_SDIO_INT_V  0xFFFFFFFF
+#define GPIO_SDIO_INT_S  0
+
+#define GPIO_ACPU_INT1_REG          (DR_REG_GPIO_BASE + 0x0074)
+
+/* GPIO_APPCPU_INT_H : RO ;bitpos:[7:0] ;default: x ; */
+/* Description: GPIO32~39 APP CPU interrupt status */
+
+#define GPIO_APPCPU_INT_H  0x000000FF
+#define GPIO_APPCPU_INT_H_M  ((GPIO_APPCPU_INT_H_V)<<(GPIO_APPCPU_INT_H_S))
+#define GPIO_APPCPU_INT_H_V  0xFF
+#define GPIO_APPCPU_INT_H_S  0
+
+#define GPIO_ACPU_NMI_INT1_REG          (DR_REG_GPIO_BASE + 0x0078)
+
+/* GPIO_APPCPU_NMI_INT_H : RO ;bitpos:[7:0] ;default: x ; */
+/* Description: GPIO32~39 APP CPU non-maskable interrupt status */
+
+#define GPIO_APPCPU_NMI_INT_H  0x000000FF
+#define GPIO_APPCPU_NMI_INT_H_M  ((GPIO_APPCPU_NMI_INT_H_V)<<(GPIO_APPCPU_NMI_INT_H_S))
+#define GPIO_APPCPU_NMI_INT_H_V  0xFF
+#define GPIO_APPCPU_NMI_INT_H_S  0
+
+#define GPIO_PCPU_INT1_REG          (DR_REG_GPIO_BASE + 0x007c)
+
+/* GPIO_PROCPU_INT_H : RO ;bitpos:[7:0] ;default: x ; */
+/* Description: GPIO32~39 PRO CPU interrupt status */
+
+#define GPIO_PROCPU_INT_H  0x000000FF
+#define GPIO_PROCPU_INT_H_M  ((GPIO_PROCPU_INT_H_V)<<(GPIO_PROCPU_INT_H_S))
+#define GPIO_PROCPU_INT_H_V  0xFF
+#define GPIO_PROCPU_INT_H_S  0
+
+#define GPIO_PCPU_NMI_INT1_REG          (DR_REG_GPIO_BASE + 0x0080)
+
+/* GPIO_PROCPU_NMI_INT_H : RO ;bitpos:[7:0] ;default: x ; */
+/* Description: GPIO32~39 PRO CPU non-maskable interrupt status */
+
+#define GPIO_PROCPU_NMI_INT_H  0x000000FF
+#define GPIO_PROCPU_NMI_INT_H_M  ((GPIO_PROCPU_NMI_INT_H_V)<<(GPIO_PROCPU_NMI_INT_H_S))
+#define GPIO_PROCPU_NMI_INT_H_V  0xFF
+#define GPIO_PROCPU_NMI_INT_H_S  0
+
+#define GPIO_CPUSDIO_INT1_REG          (DR_REG_GPIO_BASE + 0x0084)
+
+/* GPIO_SDIO_INT_H : RO ;bitpos:[7:0] ;default: x ; */
+/* Description: SDIO's extent GPIO32~39 interrupt */
+
+#define GPIO_SDIO_INT_H    0x000000FF
+#define GPIO_SDIO_INT_H_M  ((GPIO_SDIO_INT_H_V)<<(GPIO_SDIO_INT_H_S))
+#define GPIO_SDIO_INT_H_V  0xFF
+#define GPIO_SDIO_INT_H_S  0
+
+#define GPIO_REG(io_num)   (GPIO_PIN0_REG + (io_num)*0x4)
+#define GPIO_PIN_INT_ENA   0x0000001F
+#define GPIO_PIN_INT_ENA_M ((GPIO_PIN_INT_ENA_V)<<(GPIO_PIN_INT_ENA_S))
+#define GPIO_PIN_INT_ENA_V 0x0000001F
+#define GPIO_PIN_INT_ENA_S 13
+
+#define GPIO_PIN_CONFIG   0x00000003
+#define GPIO_PIN_CONFIG_M ((GPIO_PIN_CONFIG_V)<<(GPIO_PIN_CONFIG_S))
+#define GPIO_PIN_CONFIG_V 0x00000003
+#define GPIO_PIN_CONFIG_S 11
+
+#define GPIO_PIN_WAKEUP_ENABLE   (BIT(10))
+#define GPIO_PIN_WAKEUP_ENABLE_M (BIT(10))
+#define GPIO_PIN_WAKEUP_ENABLE_V 0x1
+#define GPIO_PIN_WAKEUP_ENABLE_S 10
+
+#define GPIO_PIN_INT_TYPE   0x00000007
+#define GPIO_PIN_INT_TYPE_M ((GPIO_PIN_INT_TYPE_V)<<(GPIO_PIN_INT_TYPE_S))
+#define GPIO_PIN_INT_TYPE_V 0x00000007
+#define GPIO_PIN_INT_TYPE_S 7
+
+#define GPIO_PIN_PAD_DRIVER   (BIT(2))
+#define GPIO_PIN_PAD_DRIVER_M (BIT(2))
+#define GPIO_PIN_PAD_DRIVER_V 0x1
+#define GPIO_PIN_PAD_DRIVER_S 2
+
+#define GPIO_PIN0_REG          (DR_REG_GPIO_BASE + 0x0088)
+
+/* GPIO_PIN0_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN0_INT_ENA    0x0000001F
+#define GPIO_PIN0_INT_ENA_M  ((GPIO_PIN0_INT_ENA_V)<<(GPIO_PIN0_INT_ENA_S))
+#define GPIO_PIN0_INT_ENA_V  0x1F
+#define GPIO_PIN0_INT_ENA_S  13
+
+/* GPIO_PIN0_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN0_CONFIG    0x00000003
+#define GPIO_PIN0_CONFIG_M  ((GPIO_PIN0_CONFIG_V)<<(GPIO_PIN0_CONFIG_S))
+#define GPIO_PIN0_CONFIG_V  0x3
+#define GPIO_PIN0_CONFIG_S  11
+
+/* GPIO_PIN0_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN0_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN0_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN0_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN0_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN0_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN0_INT_TYPE    0x00000007
+#define GPIO_PIN0_INT_TYPE_M  ((GPIO_PIN0_INT_TYPE_V)<<(GPIO_PIN0_INT_TYPE_S))
+#define GPIO_PIN0_INT_TYPE_V  0x7
+#define GPIO_PIN0_INT_TYPE_S  7
+
+/* GPIO_PIN0_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN0_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN0_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN0_PAD_DRIVER_V  0x1
+#define GPIO_PIN0_PAD_DRIVER_S  2
+
+#define GPIO_PIN1_REG          (DR_REG_GPIO_BASE + 0x008c)
+
+/* GPIO_PIN1_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN1_INT_ENA    0x0000001F
+#define GPIO_PIN1_INT_ENA_M  ((GPIO_PIN1_INT_ENA_V)<<(GPIO_PIN1_INT_ENA_S))
+#define GPIO_PIN1_INT_ENA_V  0x1F
+#define GPIO_PIN1_INT_ENA_S  13
+
+/* GPIO_PIN1_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN1_CONFIG    0x00000003
+#define GPIO_PIN1_CONFIG_M  ((GPIO_PIN1_CONFIG_V)<<(GPIO_PIN1_CONFIG_S))
+#define GPIO_PIN1_CONFIG_V  0x3
+#define GPIO_PIN1_CONFIG_S  11
+
+/* GPIO_PIN1_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN1_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN1_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN1_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN1_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN1_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN1_INT_TYPE    0x00000007
+#define GPIO_PIN1_INT_TYPE_M  ((GPIO_PIN1_INT_TYPE_V)<<(GPIO_PIN1_INT_TYPE_S))
+#define GPIO_PIN1_INT_TYPE_V  0x7
+#define GPIO_PIN1_INT_TYPE_S  7
+
+/* GPIO_PIN1_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN1_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN1_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN1_PAD_DRIVER_V  0x1
+#define GPIO_PIN1_PAD_DRIVER_S  2
+
+#define GPIO_PIN2_REG          (DR_REG_GPIO_BASE + 0x0090)
+
+/* GPIO_PIN2_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN2_INT_ENA    0x0000001F
+#define GPIO_PIN2_INT_ENA_M  ((GPIO_PIN2_INT_ENA_V)<<(GPIO_PIN2_INT_ENA_S))
+#define GPIO_PIN2_INT_ENA_V  0x1F
+#define GPIO_PIN2_INT_ENA_S  13
+
+/* GPIO_PIN2_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN2_CONFIG    0x00000003
+#define GPIO_PIN2_CONFIG_M  ((GPIO_PIN2_CONFIG_V)<<(GPIO_PIN2_CONFIG_S))
+#define GPIO_PIN2_CONFIG_V  0x3
+#define GPIO_PIN2_CONFIG_S  11
+
+/* GPIO_PIN2_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN2_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN2_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN2_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN2_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN2_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN2_INT_TYPE    0x00000007
+#define GPIO_PIN2_INT_TYPE_M  ((GPIO_PIN2_INT_TYPE_V)<<(GPIO_PIN2_INT_TYPE_S))
+#define GPIO_PIN2_INT_TYPE_V  0x7
+#define GPIO_PIN2_INT_TYPE_S  7
+
+/* GPIO_PIN2_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN2_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN2_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN2_PAD_DRIVER_V  0x1
+#define GPIO_PIN2_PAD_DRIVER_S  2
+
+#define GPIO_PIN3_REG          (DR_REG_GPIO_BASE + 0x0094)
+
+/* GPIO_PIN3_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN3_INT_ENA    0x0000001F
+#define GPIO_PIN3_INT_ENA_M  ((GPIO_PIN3_INT_ENA_V)<<(GPIO_PIN3_INT_ENA_S))
+#define GPIO_PIN3_INT_ENA_V  0x1F
+#define GPIO_PIN3_INT_ENA_S  13
+
+/* GPIO_PIN3_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN3_CONFIG    0x00000003
+#define GPIO_PIN3_CONFIG_M  ((GPIO_PIN3_CONFIG_V)<<(GPIO_PIN3_CONFIG_S))
+#define GPIO_PIN3_CONFIG_V  0x3
+#define GPIO_PIN3_CONFIG_S  11
+
+/* GPIO_PIN3_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN3_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN3_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN3_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN3_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN3_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN3_INT_TYPE    0x00000007
+#define GPIO_PIN3_INT_TYPE_M  ((GPIO_PIN3_INT_TYPE_V)<<(GPIO_PIN3_INT_TYPE_S))
+#define GPIO_PIN3_INT_TYPE_V  0x7
+#define GPIO_PIN3_INT_TYPE_S  7
+
+/* GPIO_PIN3_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN3_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN3_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN3_PAD_DRIVER_V  0x1
+#define GPIO_PIN3_PAD_DRIVER_S  2
+
+#define GPIO_PIN4_REG          (DR_REG_GPIO_BASE + 0x0098)
+
+/* GPIO_PIN4_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN4_INT_ENA    0x0000001F
+#define GPIO_PIN4_INT_ENA_M  ((GPIO_PIN4_INT_ENA_V)<<(GPIO_PIN4_INT_ENA_S))
+#define GPIO_PIN4_INT_ENA_V  0x1F
+#define GPIO_PIN4_INT_ENA_S  13
+
+/* GPIO_PIN4_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN4_CONFIG    0x00000003
+#define GPIO_PIN4_CONFIG_M  ((GPIO_PIN4_CONFIG_V)<<(GPIO_PIN4_CONFIG_S))
+#define GPIO_PIN4_CONFIG_V  0x3
+#define GPIO_PIN4_CONFIG_S  11
+
+/* GPIO_PIN4_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN4_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN4_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN4_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN4_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN4_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN4_INT_TYPE    0x00000007
+#define GPIO_PIN4_INT_TYPE_M  ((GPIO_PIN4_INT_TYPE_V)<<(GPIO_PIN4_INT_TYPE_S))
+#define GPIO_PIN4_INT_TYPE_V  0x7
+#define GPIO_PIN4_INT_TYPE_S  7
+
+/* GPIO_PIN4_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN4_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN4_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN4_PAD_DRIVER_V  0x1
+#define GPIO_PIN4_PAD_DRIVER_S  2
+
+#define GPIO_PIN5_REG          (DR_REG_GPIO_BASE + 0x009c)
+
+/* GPIO_PIN5_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN5_INT_ENA    0x0000001F
+#define GPIO_PIN5_INT_ENA_M  ((GPIO_PIN5_INT_ENA_V)<<(GPIO_PIN5_INT_ENA_S))
+#define GPIO_PIN5_INT_ENA_V  0x1F
+#define GPIO_PIN5_INT_ENA_S  13
+
+/* GPIO_PIN5_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN5_CONFIG    0x00000003
+#define GPIO_PIN5_CONFIG_M  ((GPIO_PIN5_CONFIG_V)<<(GPIO_PIN5_CONFIG_S))
+#define GPIO_PIN5_CONFIG_V  0x3
+#define GPIO_PIN5_CONFIG_S  11
+
+/* GPIO_PIN5_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN5_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN5_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN5_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN5_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN5_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN5_INT_TYPE    0x00000007
+#define GPIO_PIN5_INT_TYPE_M  ((GPIO_PIN5_INT_TYPE_V)<<(GPIO_PIN5_INT_TYPE_S))
+#define GPIO_PIN5_INT_TYPE_V  0x7
+#define GPIO_PIN5_INT_TYPE_S  7
+
+/* GPIO_PIN5_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN5_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN5_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN5_PAD_DRIVER_V  0x1
+#define GPIO_PIN5_PAD_DRIVER_S  2
+
+#define GPIO_PIN6_REG          (DR_REG_GPIO_BASE + 0x00a0)
+
+/* GPIO_PIN6_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN6_INT_ENA    0x0000001F
+#define GPIO_PIN6_INT_ENA_M  ((GPIO_PIN6_INT_ENA_V)<<(GPIO_PIN6_INT_ENA_S))
+#define GPIO_PIN6_INT_ENA_V  0x1F
+#define GPIO_PIN6_INT_ENA_S  13
+
+/* GPIO_PIN6_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN6_CONFIG    0x00000003
+#define GPIO_PIN6_CONFIG_M  ((GPIO_PIN6_CONFIG_V)<<(GPIO_PIN6_CONFIG_S))
+#define GPIO_PIN6_CONFIG_V  0x3
+#define GPIO_PIN6_CONFIG_S  11
+
+/* GPIO_PIN6_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN6_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN6_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN6_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN6_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN6_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN6_INT_TYPE    0x00000007
+#define GPIO_PIN6_INT_TYPE_M  ((GPIO_PIN6_INT_TYPE_V)<<(GPIO_PIN6_INT_TYPE_S))
+#define GPIO_PIN6_INT_TYPE_V  0x7
+#define GPIO_PIN6_INT_TYPE_S  7
+
+/* GPIO_PIN6_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN6_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN6_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN6_PAD_DRIVER_V  0x1
+#define GPIO_PIN6_PAD_DRIVER_S  2
+
+#define GPIO_PIN7_REG          (DR_REG_GPIO_BASE + 0x00a4)
+
+/* GPIO_PIN7_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN7_INT_ENA    0x0000001F
+#define GPIO_PIN7_INT_ENA_M  ((GPIO_PIN7_INT_ENA_V)<<(GPIO_PIN7_INT_ENA_S))
+#define GPIO_PIN7_INT_ENA_V  0x1F
+#define GPIO_PIN7_INT_ENA_S  13
+
+/* GPIO_PIN7_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN7_CONFIG    0x00000003
+#define GPIO_PIN7_CONFIG_M  ((GPIO_PIN7_CONFIG_V)<<(GPIO_PIN7_CONFIG_S))
+#define GPIO_PIN7_CONFIG_V  0x3
+#define GPIO_PIN7_CONFIG_S  11
+
+/* GPIO_PIN7_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN7_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN7_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN7_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN7_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN7_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN7_INT_TYPE    0x00000007
+#define GPIO_PIN7_INT_TYPE_M  ((GPIO_PIN7_INT_TYPE_V)<<(GPIO_PIN7_INT_TYPE_S))
+#define GPIO_PIN7_INT_TYPE_V  0x7
+#define GPIO_PIN7_INT_TYPE_S  7
+
+/* GPIO_PIN7_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN7_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN7_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN7_PAD_DRIVER_V  0x1
+#define GPIO_PIN7_PAD_DRIVER_S  2
+
+#define GPIO_PIN8_REG          (DR_REG_GPIO_BASE + 0x00a8)
+
+/* GPIO_PIN8_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN8_INT_ENA    0x0000001F
+#define GPIO_PIN8_INT_ENA_M  ((GPIO_PIN8_INT_ENA_V)<<(GPIO_PIN8_INT_ENA_S))
+#define GPIO_PIN8_INT_ENA_V  0x1F
+#define GPIO_PIN8_INT_ENA_S  13
+
+/* GPIO_PIN8_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN8_CONFIG    0x00000003
+#define GPIO_PIN8_CONFIG_M  ((GPIO_PIN8_CONFIG_V)<<(GPIO_PIN8_CONFIG_S))
+#define GPIO_PIN8_CONFIG_V  0x3
+#define GPIO_PIN8_CONFIG_S  11
+
+/* GPIO_PIN8_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN8_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN8_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN8_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN8_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN8_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN8_INT_TYPE    0x00000007
+#define GPIO_PIN8_INT_TYPE_M  ((GPIO_PIN8_INT_TYPE_V)<<(GPIO_PIN8_INT_TYPE_S))
+#define GPIO_PIN8_INT_TYPE_V  0x7
+#define GPIO_PIN8_INT_TYPE_S  7
+
+/* GPIO_PIN8_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN8_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN8_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN8_PAD_DRIVER_V  0x1
+#define GPIO_PIN8_PAD_DRIVER_S  2
+
+#define GPIO_PIN9_REG          (DR_REG_GPIO_BASE + 0x00ac)
+
+/* GPIO_PIN9_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN9_INT_ENA    0x0000001F
+#define GPIO_PIN9_INT_ENA_M  ((GPIO_PIN9_INT_ENA_V)<<(GPIO_PIN9_INT_ENA_S))
+#define GPIO_PIN9_INT_ENA_V  0x1F
+#define GPIO_PIN9_INT_ENA_S  13
+
+/* GPIO_PIN9_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN9_CONFIG    0x00000003
+#define GPIO_PIN9_CONFIG_M  ((GPIO_PIN9_CONFIG_V)<<(GPIO_PIN9_CONFIG_S))
+#define GPIO_PIN9_CONFIG_V  0x3
+#define GPIO_PIN9_CONFIG_S  11
+
+/* GPIO_PIN9_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN9_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN9_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN9_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN9_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN9_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN9_INT_TYPE    0x00000007
+#define GPIO_PIN9_INT_TYPE_M  ((GPIO_PIN9_INT_TYPE_V)<<(GPIO_PIN9_INT_TYPE_S))
+#define GPIO_PIN9_INT_TYPE_V  0x7
+#define GPIO_PIN9_INT_TYPE_S  7
+
+/* GPIO_PIN9_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN9_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN9_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN9_PAD_DRIVER_V  0x1
+#define GPIO_PIN9_PAD_DRIVER_S  2
+
+#define GPIO_PIN10_REG          (DR_REG_GPIO_BASE + 0x00b0)
+
+/* GPIO_PIN10_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN10_INT_ENA    0x0000001F
+#define GPIO_PIN10_INT_ENA_M  ((GPIO_PIN10_INT_ENA_V)<<(GPIO_PIN10_INT_ENA_S))
+#define GPIO_PIN10_INT_ENA_V  0x1F
+#define GPIO_PIN10_INT_ENA_S  13
+
+/* GPIO_PIN10_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN10_CONFIG    0x00000003
+#define GPIO_PIN10_CONFIG_M  ((GPIO_PIN10_CONFIG_V)<<(GPIO_PIN10_CONFIG_S))
+#define GPIO_PIN10_CONFIG_V  0x3
+#define GPIO_PIN10_CONFIG_S  11
+
+/* GPIO_PIN10_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN10_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN10_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN10_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN10_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN10_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN10_INT_TYPE    0x00000007
+#define GPIO_PIN10_INT_TYPE_M  ((GPIO_PIN10_INT_TYPE_V)<<(GPIO_PIN10_INT_TYPE_S))
+#define GPIO_PIN10_INT_TYPE_V  0x7
+#define GPIO_PIN10_INT_TYPE_S  7
+
+/* GPIO_PIN10_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN10_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN10_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN10_PAD_DRIVER_V  0x1
+#define GPIO_PIN10_PAD_DRIVER_S  2
+
+#define GPIO_PIN11_REG          (DR_REG_GPIO_BASE + 0x00b4)
+
+/* GPIO_PIN11_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN11_INT_ENA    0x0000001F
+#define GPIO_PIN11_INT_ENA_M  ((GPIO_PIN11_INT_ENA_V)<<(GPIO_PIN11_INT_ENA_S))
+#define GPIO_PIN11_INT_ENA_V  0x1F
+#define GPIO_PIN11_INT_ENA_S  13
+
+/* GPIO_PIN11_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN11_CONFIG    0x00000003
+#define GPIO_PIN11_CONFIG_M  ((GPIO_PIN11_CONFIG_V)<<(GPIO_PIN11_CONFIG_S))
+#define GPIO_PIN11_CONFIG_V  0x3
+#define GPIO_PIN11_CONFIG_S  11
+
+/* GPIO_PIN11_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN11_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN11_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN11_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN11_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN11_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN11_INT_TYPE    0x00000007
+#define GPIO_PIN11_INT_TYPE_M  ((GPIO_PIN11_INT_TYPE_V)<<(GPIO_PIN11_INT_TYPE_S))
+#define GPIO_PIN11_INT_TYPE_V  0x7
+#define GPIO_PIN11_INT_TYPE_S  7
+
+/* GPIO_PIN11_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN11_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN11_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN11_PAD_DRIVER_V  0x1
+#define GPIO_PIN11_PAD_DRIVER_S  2
+
+#define GPIO_PIN12_REG          (DR_REG_GPIO_BASE + 0x00b8)
+
+/* GPIO_PIN12_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN12_INT_ENA    0x0000001F
+#define GPIO_PIN12_INT_ENA_M  ((GPIO_PIN12_INT_ENA_V)<<(GPIO_PIN12_INT_ENA_S))
+#define GPIO_PIN12_INT_ENA_V  0x1F
+#define GPIO_PIN12_INT_ENA_S  13
+
+/* GPIO_PIN12_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN12_CONFIG    0x00000003
+#define GPIO_PIN12_CONFIG_M  ((GPIO_PIN12_CONFIG_V)<<(GPIO_PIN12_CONFIG_S))
+#define GPIO_PIN12_CONFIG_V  0x3
+#define GPIO_PIN12_CONFIG_S  11
+
+/* GPIO_PIN12_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN12_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN12_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN12_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN12_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN12_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN12_INT_TYPE    0x00000007
+#define GPIO_PIN12_INT_TYPE_M  ((GPIO_PIN12_INT_TYPE_V)<<(GPIO_PIN12_INT_TYPE_S))
+#define GPIO_PIN12_INT_TYPE_V  0x7
+#define GPIO_PIN12_INT_TYPE_S  7
+
+/* GPIO_PIN12_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN12_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN12_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN12_PAD_DRIVER_V  0x1
+#define GPIO_PIN12_PAD_DRIVER_S  2
+
+#define GPIO_PIN13_REG          (DR_REG_GPIO_BASE + 0x00bc)
+
+/* GPIO_PIN13_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN13_INT_ENA    0x0000001F
+#define GPIO_PIN13_INT_ENA_M  ((GPIO_PIN13_INT_ENA_V)<<(GPIO_PIN13_INT_ENA_S))
+#define GPIO_PIN13_INT_ENA_V  0x1F
+#define GPIO_PIN13_INT_ENA_S  13
+
+/* GPIO_PIN13_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN13_CONFIG    0x00000003
+#define GPIO_PIN13_CONFIG_M  ((GPIO_PIN13_CONFIG_V)<<(GPIO_PIN13_CONFIG_S))
+#define GPIO_PIN13_CONFIG_V  0x3
+#define GPIO_PIN13_CONFIG_S  11
+
+/* GPIO_PIN13_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN13_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN13_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN13_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN13_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN13_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN13_INT_TYPE    0x00000007
+#define GPIO_PIN13_INT_TYPE_M  ((GPIO_PIN13_INT_TYPE_V)<<(GPIO_PIN13_INT_TYPE_S))
+#define GPIO_PIN13_INT_TYPE_V  0x7
+#define GPIO_PIN13_INT_TYPE_S  7
+
+/* GPIO_PIN13_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN13_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN13_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN13_PAD_DRIVER_V  0x1
+#define GPIO_PIN13_PAD_DRIVER_S  2
+
+#define GPIO_PIN14_REG          (DR_REG_GPIO_BASE + 0x00c0)
+
+/* GPIO_PIN14_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN14_INT_ENA    0x0000001F
+#define GPIO_PIN14_INT_ENA_M  ((GPIO_PIN14_INT_ENA_V)<<(GPIO_PIN14_INT_ENA_S))
+#define GPIO_PIN14_INT_ENA_V  0x1F
+#define GPIO_PIN14_INT_ENA_S  13
+
+/* GPIO_PIN14_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN14_CONFIG    0x00000003
+#define GPIO_PIN14_CONFIG_M  ((GPIO_PIN14_CONFIG_V)<<(GPIO_PIN14_CONFIG_S))
+#define GPIO_PIN14_CONFIG_V  0x3
+#define GPIO_PIN14_CONFIG_S  11
+
+/* GPIO_PIN14_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN14_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN14_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN14_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN14_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN14_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN14_INT_TYPE    0x00000007
+#define GPIO_PIN14_INT_TYPE_M  ((GPIO_PIN14_INT_TYPE_V)<<(GPIO_PIN14_INT_TYPE_S))
+#define GPIO_PIN14_INT_TYPE_V  0x7
+#define GPIO_PIN14_INT_TYPE_S  7
+
+/* GPIO_PIN14_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN14_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN14_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN14_PAD_DRIVER_V  0x1
+#define GPIO_PIN14_PAD_DRIVER_S  2
+
+#define GPIO_PIN15_REG          (DR_REG_GPIO_BASE + 0x00c4)
+
+/* GPIO_PIN15_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN15_INT_ENA    0x0000001F
+#define GPIO_PIN15_INT_ENA_M  ((GPIO_PIN15_INT_ENA_V)<<(GPIO_PIN15_INT_ENA_S))
+#define GPIO_PIN15_INT_ENA_V  0x1F
+#define GPIO_PIN15_INT_ENA_S  13
+
+/* GPIO_PIN15_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN15_CONFIG    0x00000003
+#define GPIO_PIN15_CONFIG_M  ((GPIO_PIN15_CONFIG_V)<<(GPIO_PIN15_CONFIG_S))
+#define GPIO_PIN15_CONFIG_V  0x3
+#define GPIO_PIN15_CONFIG_S  11
+
+/* GPIO_PIN15_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN15_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN15_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN15_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN15_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN15_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN15_INT_TYPE    0x00000007
+#define GPIO_PIN15_INT_TYPE_M  ((GPIO_PIN15_INT_TYPE_V)<<(GPIO_PIN15_INT_TYPE_S))
+#define GPIO_PIN15_INT_TYPE_V  0x7
+#define GPIO_PIN15_INT_TYPE_S  7
+
+/* GPIO_PIN15_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN15_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN15_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN15_PAD_DRIVER_V  0x1
+#define GPIO_PIN15_PAD_DRIVER_S  2
+
+#define GPIO_PIN16_REG          (DR_REG_GPIO_BASE + 0x00c8)
+
+/* GPIO_PIN16_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN16_INT_ENA    0x0000001F
+#define GPIO_PIN16_INT_ENA_M  ((GPIO_PIN16_INT_ENA_V)<<(GPIO_PIN16_INT_ENA_S))
+#define GPIO_PIN16_INT_ENA_V  0x1F
+#define GPIO_PIN16_INT_ENA_S  13
+
+/* GPIO_PIN16_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN16_CONFIG    0x00000003
+#define GPIO_PIN16_CONFIG_M  ((GPIO_PIN16_CONFIG_V)<<(GPIO_PIN16_CONFIG_S))
+#define GPIO_PIN16_CONFIG_V  0x3
+#define GPIO_PIN16_CONFIG_S  11
+
+/* GPIO_PIN16_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN16_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN16_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN16_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN16_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN16_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN16_INT_TYPE    0x00000007
+#define GPIO_PIN16_INT_TYPE_M  ((GPIO_PIN16_INT_TYPE_V)<<(GPIO_PIN16_INT_TYPE_S))
+#define GPIO_PIN16_INT_TYPE_V  0x7
+#define GPIO_PIN16_INT_TYPE_S  7
+
+/* GPIO_PIN16_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN16_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN16_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN16_PAD_DRIVER_V  0x1
+#define GPIO_PIN16_PAD_DRIVER_S  2
+
+#define GPIO_PIN17_REG          (DR_REG_GPIO_BASE + 0x00cc)
+
+/* GPIO_PIN17_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN17_INT_ENA    0x0000001F
+#define GPIO_PIN17_INT_ENA_M  ((GPIO_PIN17_INT_ENA_V)<<(GPIO_PIN17_INT_ENA_S))
+#define GPIO_PIN17_INT_ENA_V  0x1F
+#define GPIO_PIN17_INT_ENA_S  13
+
+/* GPIO_PIN17_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN17_CONFIG    0x00000003
+#define GPIO_PIN17_CONFIG_M  ((GPIO_PIN17_CONFIG_V)<<(GPIO_PIN17_CONFIG_S))
+#define GPIO_PIN17_CONFIG_V  0x3
+#define GPIO_PIN17_CONFIG_S  11
+
+/* GPIO_PIN17_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN17_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN17_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN17_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN17_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN17_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN17_INT_TYPE    0x00000007
+#define GPIO_PIN17_INT_TYPE_M  ((GPIO_PIN17_INT_TYPE_V)<<(GPIO_PIN17_INT_TYPE_S))
+#define GPIO_PIN17_INT_TYPE_V  0x7
+#define GPIO_PIN17_INT_TYPE_S  7
+
+/* GPIO_PIN17_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN17_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN17_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN17_PAD_DRIVER_V  0x1
+#define GPIO_PIN17_PAD_DRIVER_S  2
+
+#define GPIO_PIN18_REG          (DR_REG_GPIO_BASE + 0x00d0)
+
+/* GPIO_PIN18_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN18_INT_ENA    0x0000001F
+#define GPIO_PIN18_INT_ENA_M  ((GPIO_PIN18_INT_ENA_V)<<(GPIO_PIN18_INT_ENA_S))
+#define GPIO_PIN18_INT_ENA_V  0x1F
+#define GPIO_PIN18_INT_ENA_S  13
+
+/* GPIO_PIN18_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN18_CONFIG    0x00000003
+#define GPIO_PIN18_CONFIG_M  ((GPIO_PIN18_CONFIG_V)<<(GPIO_PIN18_CONFIG_S))
+#define GPIO_PIN18_CONFIG_V  0x3
+#define GPIO_PIN18_CONFIG_S  11
+
+/* GPIO_PIN18_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN18_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN18_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN18_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN18_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN18_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN18_INT_TYPE    0x00000007
+#define GPIO_PIN18_INT_TYPE_M  ((GPIO_PIN18_INT_TYPE_V)<<(GPIO_PIN18_INT_TYPE_S))
+#define GPIO_PIN18_INT_TYPE_V  0x7
+#define GPIO_PIN18_INT_TYPE_S  7
+
+/* GPIO_PIN18_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN18_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN18_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN18_PAD_DRIVER_V  0x1
+#define GPIO_PIN18_PAD_DRIVER_S  2
+
+#define GPIO_PIN19_REG          (DR_REG_GPIO_BASE + 0x00d4)
+
+/* GPIO_PIN19_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN19_INT_ENA    0x0000001F
+#define GPIO_PIN19_INT_ENA_M  ((GPIO_PIN19_INT_ENA_V)<<(GPIO_PIN19_INT_ENA_S))
+#define GPIO_PIN19_INT_ENA_V  0x1F
+#define GPIO_PIN19_INT_ENA_S  13
+
+/* GPIO_PIN19_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN19_CONFIG    0x00000003
+#define GPIO_PIN19_CONFIG_M  ((GPIO_PIN19_CONFIG_V)<<(GPIO_PIN19_CONFIG_S))
+#define GPIO_PIN19_CONFIG_V  0x3
+#define GPIO_PIN19_CONFIG_S  11
+
+/* GPIO_PIN19_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN19_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN19_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN19_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN19_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN19_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN19_INT_TYPE    0x00000007
+#define GPIO_PIN19_INT_TYPE_M  ((GPIO_PIN19_INT_TYPE_V)<<(GPIO_PIN19_INT_TYPE_S))
+#define GPIO_PIN19_INT_TYPE_V  0x7
+#define GPIO_PIN19_INT_TYPE_S  7
+
+/* GPIO_PIN19_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN19_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN19_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN19_PAD_DRIVER_V  0x1
+#define GPIO_PIN19_PAD_DRIVER_S  2
+
+#define GPIO_PIN20_REG          (DR_REG_GPIO_BASE + 0x00d8)
+
+/* GPIO_PIN20_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN20_INT_ENA    0x0000001F
+#define GPIO_PIN20_INT_ENA_M  ((GPIO_PIN20_INT_ENA_V)<<(GPIO_PIN20_INT_ENA_S))
+#define GPIO_PIN20_INT_ENA_V  0x1F
+#define GPIO_PIN20_INT_ENA_S  13
+
+/* GPIO_PIN20_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN20_CONFIG    0x00000003
+#define GPIO_PIN20_CONFIG_M  ((GPIO_PIN20_CONFIG_V)<<(GPIO_PIN20_CONFIG_S))
+#define GPIO_PIN20_CONFIG_V  0x3
+#define GPIO_PIN20_CONFIG_S  11
+
+/* GPIO_PIN20_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN20_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN20_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN20_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN20_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN20_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN20_INT_TYPE    0x00000007
+#define GPIO_PIN20_INT_TYPE_M  ((GPIO_PIN20_INT_TYPE_V)<<(GPIO_PIN20_INT_TYPE_S))
+#define GPIO_PIN20_INT_TYPE_V  0x7
+#define GPIO_PIN20_INT_TYPE_S  7
+
+/* GPIO_PIN20_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN20_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN20_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN20_PAD_DRIVER_V  0x1
+#define GPIO_PIN20_PAD_DRIVER_S  2
+
+#define GPIO_PIN21_REG          (DR_REG_GPIO_BASE + 0x00dc)
+
+/* GPIO_PIN21_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN21_INT_ENA    0x0000001F
+#define GPIO_PIN21_INT_ENA_M  ((GPIO_PIN21_INT_ENA_V)<<(GPIO_PIN21_INT_ENA_S))
+#define GPIO_PIN21_INT_ENA_V  0x1F
+#define GPIO_PIN21_INT_ENA_S  13
+
+/* GPIO_PIN21_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN21_CONFIG    0x00000003
+#define GPIO_PIN21_CONFIG_M  ((GPIO_PIN21_CONFIG_V)<<(GPIO_PIN21_CONFIG_S))
+#define GPIO_PIN21_CONFIG_V  0x3
+#define GPIO_PIN21_CONFIG_S  11
+
+/* GPIO_PIN21_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN21_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN21_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN21_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN21_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN21_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN21_INT_TYPE    0x00000007
+#define GPIO_PIN21_INT_TYPE_M  ((GPIO_PIN21_INT_TYPE_V)<<(GPIO_PIN21_INT_TYPE_S))
+#define GPIO_PIN21_INT_TYPE_V  0x7
+#define GPIO_PIN21_INT_TYPE_S  7
+
+/* GPIO_PIN21_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN21_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN21_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN21_PAD_DRIVER_V  0x1
+#define GPIO_PIN21_PAD_DRIVER_S  2
+
+#define GPIO_PIN22_REG          (DR_REG_GPIO_BASE + 0x00e0)
+
+/* GPIO_PIN22_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: */
+
+#define GPIO_PIN22_INT_ENA    0x0000001F
+#define GPIO_PIN22_INT_ENA_M  ((GPIO_PIN22_INT_ENA_V)<<(GPIO_PIN22_INT_ENA_S))
+#define GPIO_PIN22_INT_ENA_V  0x1F
+#define GPIO_PIN22_INT_ENA_S  13
+
+/* GPIO_PIN22_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN22_CONFIG    0x00000003
+#define GPIO_PIN22_CONFIG_M  ((GPIO_PIN22_CONFIG_V)<<(GPIO_PIN22_CONFIG_S))
+#define GPIO_PIN22_CONFIG_V  0x3
+#define GPIO_PIN22_CONFIG_S  11
+
+/* GPIO_PIN22_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN22_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN22_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN22_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN22_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN22_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN22_INT_TYPE    0x00000007
+#define GPIO_PIN22_INT_TYPE_M  ((GPIO_PIN22_INT_TYPE_V)<<(GPIO_PIN22_INT_TYPE_S))
+#define GPIO_PIN22_INT_TYPE_V  0x7
+#define GPIO_PIN22_INT_TYPE_S  7
+
+/* GPIO_PIN22_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: */
+
+#define GPIO_PIN22_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN22_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN22_PAD_DRIVER_V  0x1
+#define GPIO_PIN22_PAD_DRIVER_S  2
+
+#define GPIO_PIN23_REG          (DR_REG_GPIO_BASE + 0x00e4)
+
+/* GPIO_PIN23_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN23_INT_ENA    0x0000001F
+#define GPIO_PIN23_INT_ENA_M  ((GPIO_PIN23_INT_ENA_V)<<(GPIO_PIN23_INT_ENA_S))
+#define GPIO_PIN23_INT_ENA_V  0x1F
+#define GPIO_PIN23_INT_ENA_S  13
+
+/* GPIO_PIN23_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN23_CONFIG    0x00000003
+#define GPIO_PIN23_CONFIG_M  ((GPIO_PIN23_CONFIG_V)<<(GPIO_PIN23_CONFIG_S))
+#define GPIO_PIN23_CONFIG_V  0x3
+#define GPIO_PIN23_CONFIG_S  11
+
+/* GPIO_PIN23_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN23_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN23_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN23_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN23_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN23_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN23_INT_TYPE    0x00000007
+#define GPIO_PIN23_INT_TYPE_M  ((GPIO_PIN23_INT_TYPE_V)<<(GPIO_PIN23_INT_TYPE_S))
+#define GPIO_PIN23_INT_TYPE_V  0x7
+#define GPIO_PIN23_INT_TYPE_S  7
+
+/* GPIO_PIN23_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN23_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN23_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN23_PAD_DRIVER_V  0x1
+#define GPIO_PIN23_PAD_DRIVER_S  2
+
+#define GPIO_PIN24_REG          (DR_REG_GPIO_BASE + 0x00e8)
+
+/* GPIO_PIN24_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN24_INT_ENA    0x0000001F
+#define GPIO_PIN24_INT_ENA_M  ((GPIO_PIN24_INT_ENA_V)<<(GPIO_PIN24_INT_ENA_S))
+#define GPIO_PIN24_INT_ENA_V  0x1F
+#define GPIO_PIN24_INT_ENA_S  13
+
+/* GPIO_PIN24_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN24_CONFIG    0x00000003
+#define GPIO_PIN24_CONFIG_M  ((GPIO_PIN24_CONFIG_V)<<(GPIO_PIN24_CONFIG_S))
+#define GPIO_PIN24_CONFIG_V  0x3
+#define GPIO_PIN24_CONFIG_S  11
+
+/* GPIO_PIN24_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN24_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN24_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN24_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN24_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN24_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN24_INT_TYPE    0x00000007
+#define GPIO_PIN24_INT_TYPE_M  ((GPIO_PIN24_INT_TYPE_V)<<(GPIO_PIN24_INT_TYPE_S))
+#define GPIO_PIN24_INT_TYPE_V  0x7
+#define GPIO_PIN24_INT_TYPE_S  7
+
+/* GPIO_PIN24_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN24_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN24_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN24_PAD_DRIVER_V  0x1
+#define GPIO_PIN24_PAD_DRIVER_S  2
+
+#define GPIO_PIN25_REG          (DR_REG_GPIO_BASE + 0x00ec)
+
+/* GPIO_PIN25_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN25_INT_ENA    0x0000001F
+#define GPIO_PIN25_INT_ENA_M  ((GPIO_PIN25_INT_ENA_V)<<(GPIO_PIN25_INT_ENA_S))
+#define GPIO_PIN25_INT_ENA_V  0x1F
+#define GPIO_PIN25_INT_ENA_S  13
+
+/* GPIO_PIN25_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN25_CONFIG    0x00000003
+#define GPIO_PIN25_CONFIG_M  ((GPIO_PIN25_CONFIG_V)<<(GPIO_PIN25_CONFIG_S))
+#define GPIO_PIN25_CONFIG_V  0x3
+#define GPIO_PIN25_CONFIG_S  11
+
+/* GPIO_PIN25_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN25_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN25_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN25_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN25_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN25_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN25_INT_TYPE    0x00000007
+#define GPIO_PIN25_INT_TYPE_M  ((GPIO_PIN25_INT_TYPE_V)<<(GPIO_PIN25_INT_TYPE_S))
+#define GPIO_PIN25_INT_TYPE_V  0x7
+#define GPIO_PIN25_INT_TYPE_S  7
+
+/* GPIO_PIN25_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN25_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN25_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN25_PAD_DRIVER_V  0x1
+#define GPIO_PIN25_PAD_DRIVER_S  2
+
+#define GPIO_PIN26_REG          (DR_REG_GPIO_BASE + 0x00f0)
+
+/* GPIO_PIN26_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN26_INT_ENA    0x0000001F
+#define GPIO_PIN26_INT_ENA_M  ((GPIO_PIN26_INT_ENA_V)<<(GPIO_PIN26_INT_ENA_S))
+#define GPIO_PIN26_INT_ENA_V  0x1F
+#define GPIO_PIN26_INT_ENA_S  13
+
+/* GPIO_PIN26_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN26_CONFIG    0x00000003
+#define GPIO_PIN26_CONFIG_M  ((GPIO_PIN26_CONFIG_V)<<(GPIO_PIN26_CONFIG_S))
+#define GPIO_PIN26_CONFIG_V  0x3
+#define GPIO_PIN26_CONFIG_S  11
+
+/* GPIO_PIN26_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN26_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN26_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN26_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN26_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN26_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN26_INT_TYPE    0x00000007
+#define GPIO_PIN26_INT_TYPE_M  ((GPIO_PIN26_INT_TYPE_V)<<(GPIO_PIN26_INT_TYPE_S))
+#define GPIO_PIN26_INT_TYPE_V  0x7
+#define GPIO_PIN26_INT_TYPE_S  7
+
+/* GPIO_PIN26_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN26_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN26_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN26_PAD_DRIVER_V  0x1
+#define GPIO_PIN26_PAD_DRIVER_S  2
+
+#define GPIO_PIN27_REG          (DR_REG_GPIO_BASE + 0x00f4)
+
+/* GPIO_PIN27_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN27_INT_ENA    0x0000001F
+#define GPIO_PIN27_INT_ENA_M  ((GPIO_PIN27_INT_ENA_V)<<(GPIO_PIN27_INT_ENA_S))
+#define GPIO_PIN27_INT_ENA_V  0x1F
+#define GPIO_PIN27_INT_ENA_S  13
+
+/* GPIO_PIN27_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN27_CONFIG    0x00000003
+#define GPIO_PIN27_CONFIG_M  ((GPIO_PIN27_CONFIG_V)<<(GPIO_PIN27_CONFIG_S))
+#define GPIO_PIN27_CONFIG_V  0x3
+#define GPIO_PIN27_CONFIG_S  11
+
+/* GPIO_PIN27_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN27_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN27_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN27_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN27_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN27_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN27_INT_TYPE    0x00000007
+#define GPIO_PIN27_INT_TYPE_M  ((GPIO_PIN27_INT_TYPE_V)<<(GPIO_PIN27_INT_TYPE_S))
+#define GPIO_PIN27_INT_TYPE_V  0x7
+#define GPIO_PIN27_INT_TYPE_S  7
+
+/* GPIO_PIN27_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN27_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN27_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN27_PAD_DRIVER_V  0x1
+#define GPIO_PIN27_PAD_DRIVER_S  2
+
+#define GPIO_PIN28_REG          (DR_REG_GPIO_BASE + 0x00f8)
+
+/* GPIO_PIN28_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN28_INT_ENA    0x0000001F
+#define GPIO_PIN28_INT_ENA_M  ((GPIO_PIN28_INT_ENA_V)<<(GPIO_PIN28_INT_ENA_S))
+#define GPIO_PIN28_INT_ENA_V  0x1F
+#define GPIO_PIN28_INT_ENA_S  13
+
+/* GPIO_PIN28_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN28_CONFIG    0x00000003
+#define GPIO_PIN28_CONFIG_M  ((GPIO_PIN28_CONFIG_V)<<(GPIO_PIN28_CONFIG_S))
+#define GPIO_PIN28_CONFIG_V  0x3
+#define GPIO_PIN28_CONFIG_S  11
+
+/* GPIO_PIN28_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN28_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN28_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN28_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN28_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN28_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN28_INT_TYPE    0x00000007
+#define GPIO_PIN28_INT_TYPE_M  ((GPIO_PIN28_INT_TYPE_V)<<(GPIO_PIN28_INT_TYPE_S))
+#define GPIO_PIN28_INT_TYPE_V  0x7
+#define GPIO_PIN28_INT_TYPE_S  7
+
+/* GPIO_PIN28_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN28_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN28_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN28_PAD_DRIVER_V  0x1
+#define GPIO_PIN28_PAD_DRIVER_S  2
+
+#define GPIO_PIN29_REG          (DR_REG_GPIO_BASE + 0x00fc)
+
+/* GPIO_PIN29_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN29_INT_ENA    0x0000001F
+#define GPIO_PIN29_INT_ENA_M  ((GPIO_PIN29_INT_ENA_V)<<(GPIO_PIN29_INT_ENA_S))
+#define GPIO_PIN29_INT_ENA_V  0x1F
+#define GPIO_PIN29_INT_ENA_S  13
+
+/* GPIO_PIN29_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN29_CONFIG    0x00000003
+#define GPIO_PIN29_CONFIG_M  ((GPIO_PIN29_CONFIG_V)<<(GPIO_PIN29_CONFIG_S))
+#define GPIO_PIN29_CONFIG_V  0x3
+#define GPIO_PIN29_CONFIG_S  11
+
+/* GPIO_PIN29_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN29_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN29_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN29_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN29_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN29_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN29_INT_TYPE    0x00000007
+#define GPIO_PIN29_INT_TYPE_M  ((GPIO_PIN29_INT_TYPE_V)<<(GPIO_PIN29_INT_TYPE_S))
+#define GPIO_PIN29_INT_TYPE_V  0x7
+#define GPIO_PIN29_INT_TYPE_S  7
+
+/* GPIO_PIN29_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN29_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN29_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN29_PAD_DRIVER_V  0x1
+#define GPIO_PIN29_PAD_DRIVER_S  2
+
+#define GPIO_PIN30_REG          (DR_REG_GPIO_BASE + 0x0100)
+
+/* GPIO_PIN30_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN30_INT_ENA    0x0000001F
+#define GPIO_PIN30_INT_ENA_M  ((GPIO_PIN30_INT_ENA_V)<<(GPIO_PIN30_INT_ENA_S))
+#define GPIO_PIN30_INT_ENA_V  0x1F
+#define GPIO_PIN30_INT_ENA_S  13
+
+/* GPIO_PIN30_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN30_CONFIG    0x00000003
+#define GPIO_PIN30_CONFIG_M  ((GPIO_PIN30_CONFIG_V)<<(GPIO_PIN30_CONFIG_S))
+#define GPIO_PIN30_CONFIG_V  0x3
+#define GPIO_PIN30_CONFIG_S  11
+
+/* GPIO_PIN30_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN30_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN30_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN30_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN30_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN30_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN30_INT_TYPE    0x00000007
+#define GPIO_PIN30_INT_TYPE_M  ((GPIO_PIN30_INT_TYPE_V)<<(GPIO_PIN30_INT_TYPE_S))
+#define GPIO_PIN30_INT_TYPE_V  0x7
+#define GPIO_PIN30_INT_TYPE_S  7
+
+/* GPIO_PIN30_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN30_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN30_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN30_PAD_DRIVER_V  0x1
+#define GPIO_PIN30_PAD_DRIVER_S  2
+
+#define GPIO_PIN31_REG          (DR_REG_GPIO_BASE + 0x0104)
+
+/* GPIO_PIN31_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN31_INT_ENA    0x0000001F
+#define GPIO_PIN31_INT_ENA_M  ((GPIO_PIN31_INT_ENA_V)<<(GPIO_PIN31_INT_ENA_S))
+#define GPIO_PIN31_INT_ENA_V  0x1F
+#define GPIO_PIN31_INT_ENA_S  13
+
+/* GPIO_PIN31_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN31_CONFIG    0x00000003
+#define GPIO_PIN31_CONFIG_M  ((GPIO_PIN31_CONFIG_V)<<(GPIO_PIN31_CONFIG_S))
+#define GPIO_PIN31_CONFIG_V  0x3
+#define GPIO_PIN31_CONFIG_S  11
+
+/* GPIO_PIN31_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN31_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN31_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN31_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN31_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN31_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN31_INT_TYPE    0x00000007
+#define GPIO_PIN31_INT_TYPE_M  ((GPIO_PIN31_INT_TYPE_V)<<(GPIO_PIN31_INT_TYPE_S))
+#define GPIO_PIN31_INT_TYPE_V  0x7
+#define GPIO_PIN31_INT_TYPE_S  7
+
+/* GPIO_PIN31_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN31_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN31_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN31_PAD_DRIVER_V  0x1
+#define GPIO_PIN31_PAD_DRIVER_S  2
+
+#define GPIO_PIN32_REG          (DR_REG_GPIO_BASE + 0x0108)
+
+/* GPIO_PIN32_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN32_INT_ENA    0x0000001F
+#define GPIO_PIN32_INT_ENA_M  ((GPIO_PIN32_INT_ENA_V)<<(GPIO_PIN32_INT_ENA_S))
+#define GPIO_PIN32_INT_ENA_V  0x1F
+#define GPIO_PIN32_INT_ENA_S  13
+
+/* GPIO_PIN32_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN32_CONFIG    0x00000003
+#define GPIO_PIN32_CONFIG_M  ((GPIO_PIN32_CONFIG_V)<<(GPIO_PIN32_CONFIG_S))
+#define GPIO_PIN32_CONFIG_V  0x3
+#define GPIO_PIN32_CONFIG_S  11
+
+/* GPIO_PIN32_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN32_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN32_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN32_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN32_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN32_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN32_INT_TYPE    0x00000007
+#define GPIO_PIN32_INT_TYPE_M  ((GPIO_PIN32_INT_TYPE_V)<<(GPIO_PIN32_INT_TYPE_S))
+#define GPIO_PIN32_INT_TYPE_V  0x7
+#define GPIO_PIN32_INT_TYPE_S  7
+
+/* GPIO_PIN32_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN32_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN32_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN32_PAD_DRIVER_V  0x1
+#define GPIO_PIN32_PAD_DRIVER_S  2
+
+#define GPIO_PIN33_REG          (DR_REG_GPIO_BASE + 0x010c)
+
+/* GPIO_PIN33_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN33_INT_ENA    0x0000001F
+#define GPIO_PIN33_INT_ENA_M  ((GPIO_PIN33_INT_ENA_V)<<(GPIO_PIN33_INT_ENA_S))
+#define GPIO_PIN33_INT_ENA_V  0x1F
+#define GPIO_PIN33_INT_ENA_S  13
+
+/* GPIO_PIN33_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN33_CONFIG    0x00000003
+#define GPIO_PIN33_CONFIG_M  ((GPIO_PIN33_CONFIG_V)<<(GPIO_PIN33_CONFIG_S))
+#define GPIO_PIN33_CONFIG_V  0x3
+#define GPIO_PIN33_CONFIG_S  11
+
+/* GPIO_PIN33_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN33_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN33_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN33_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN33_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN33_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN33_INT_TYPE    0x00000007
+#define GPIO_PIN33_INT_TYPE_M  ((GPIO_PIN33_INT_TYPE_V)<<(GPIO_PIN33_INT_TYPE_S))
+#define GPIO_PIN33_INT_TYPE_V  0x7
+#define GPIO_PIN33_INT_TYPE_S  7
+
+/* GPIO_PIN33_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN33_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN33_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN33_PAD_DRIVER_V  0x1
+#define GPIO_PIN33_PAD_DRIVER_S  2
+
+#define GPIO_PIN34_REG          (DR_REG_GPIO_BASE + 0x0110)
+
+/* GPIO_PIN34_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN34_INT_ENA    0x0000001F
+#define GPIO_PIN34_INT_ENA_M  ((GPIO_PIN34_INT_ENA_V)<<(GPIO_PIN34_INT_ENA_S))
+#define GPIO_PIN34_INT_ENA_V  0x1F
+#define GPIO_PIN34_INT_ENA_S  13
+
+/* GPIO_PIN34_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN34_CONFIG    0x00000003
+#define GPIO_PIN34_CONFIG_M  ((GPIO_PIN34_CONFIG_V)<<(GPIO_PIN34_CONFIG_S))
+#define GPIO_PIN34_CONFIG_V  0x3
+#define GPIO_PIN34_CONFIG_S  11
+
+/* GPIO_PIN34_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN34_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN34_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN34_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN34_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN34_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN34_INT_TYPE    0x00000007
+#define GPIO_PIN34_INT_TYPE_M  ((GPIO_PIN34_INT_TYPE_V)<<(GPIO_PIN34_INT_TYPE_S))
+#define GPIO_PIN34_INT_TYPE_V  0x7
+#define GPIO_PIN34_INT_TYPE_S  7
+
+/* GPIO_PIN34_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN34_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN34_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN34_PAD_DRIVER_V  0x1
+#define GPIO_PIN34_PAD_DRIVER_S  2
+
+#define GPIO_PIN35_REG          (DR_REG_GPIO_BASE + 0x0114)
+
+/* GPIO_PIN35_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN35_INT_ENA    0x0000001F
+#define GPIO_PIN35_INT_ENA_M  ((GPIO_PIN35_INT_ENA_V)<<(GPIO_PIN35_INT_ENA_S))
+#define GPIO_PIN35_INT_ENA_V  0x1F
+#define GPIO_PIN35_INT_ENA_S  13
+
+/* GPIO_PIN35_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN35_CONFIG    0x00000003
+#define GPIO_PIN35_CONFIG_M  ((GPIO_PIN35_CONFIG_V)<<(GPIO_PIN35_CONFIG_S))
+#define GPIO_PIN35_CONFIG_V  0x3
+#define GPIO_PIN35_CONFIG_S  11
+
+/* GPIO_PIN35_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN35_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN35_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN35_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN35_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN35_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN35_INT_TYPE    0x00000007
+#define GPIO_PIN35_INT_TYPE_M  ((GPIO_PIN35_INT_TYPE_V)<<(GPIO_PIN35_INT_TYPE_S))
+#define GPIO_PIN35_INT_TYPE_V  0x7
+#define GPIO_PIN35_INT_TYPE_S  7
+
+/* GPIO_PIN35_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN35_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN35_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN35_PAD_DRIVER_V  0x1
+#define GPIO_PIN35_PAD_DRIVER_S  2
+
+#define GPIO_PIN36_REG          (DR_REG_GPIO_BASE + 0x0118)
+
+/* GPIO_PIN36_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN36_INT_ENA    0x0000001F
+#define GPIO_PIN36_INT_ENA_M  ((GPIO_PIN36_INT_ENA_V)<<(GPIO_PIN36_INT_ENA_S))
+#define GPIO_PIN36_INT_ENA_V  0x1F
+#define GPIO_PIN36_INT_ENA_S  13
+
+/* GPIO_PIN36_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN36_CONFIG    0x00000003
+#define GPIO_PIN36_CONFIG_M  ((GPIO_PIN36_CONFIG_V)<<(GPIO_PIN36_CONFIG_S))
+#define GPIO_PIN36_CONFIG_V  0x3
+#define GPIO_PIN36_CONFIG_S  11
+
+/* GPIO_PIN36_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN36_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN36_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN36_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN36_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN36_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN36_INT_TYPE    0x00000007
+#define GPIO_PIN36_INT_TYPE_M  ((GPIO_PIN36_INT_TYPE_V)<<(GPIO_PIN36_INT_TYPE_S))
+#define GPIO_PIN36_INT_TYPE_V  0x7
+#define GPIO_PIN36_INT_TYPE_S  7
+
+/* GPIO_PIN36_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN36_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN36_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN36_PAD_DRIVER_V  0x1
+#define GPIO_PIN36_PAD_DRIVER_S  2
+
+#define GPIO_PIN37_REG          (DR_REG_GPIO_BASE + 0x011c)
+
+/* GPIO_PIN37_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN37_INT_ENA    0x0000001F
+#define GPIO_PIN37_INT_ENA_M  ((GPIO_PIN37_INT_ENA_V)<<(GPIO_PIN37_INT_ENA_S))
+#define GPIO_PIN37_INT_ENA_V  0x1F
+#define GPIO_PIN37_INT_ENA_S  13
+
+/* GPIO_PIN37_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN37_CONFIG    0x00000003
+#define GPIO_PIN37_CONFIG_M  ((GPIO_PIN37_CONFIG_V)<<(GPIO_PIN37_CONFIG_S))
+#define GPIO_PIN37_CONFIG_V  0x3
+#define GPIO_PIN37_CONFIG_S  11
+
+/* GPIO_PIN37_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN37_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN37_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN37_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN37_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN37_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN37_INT_TYPE    0x00000007
+#define GPIO_PIN37_INT_TYPE_M  ((GPIO_PIN37_INT_TYPE_V)<<(GPIO_PIN37_INT_TYPE_S))
+#define GPIO_PIN37_INT_TYPE_V  0x7
+#define GPIO_PIN37_INT_TYPE_S  7
+
+/* GPIO_PIN37_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN37_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN37_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN37_PAD_DRIVER_V  0x1
+#define GPIO_PIN37_PAD_DRIVER_S  2
+
+#define GPIO_PIN38_REG          (DR_REG_GPIO_BASE + 0x0120)
+
+/* GPIO_PIN38_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN38_INT_ENA    0x0000001F
+#define GPIO_PIN38_INT_ENA_M  ((GPIO_PIN38_INT_ENA_V)<<(GPIO_PIN38_INT_ENA_S))
+#define GPIO_PIN38_INT_ENA_V  0x1F
+#define GPIO_PIN38_INT_ENA_S  13
+
+/* GPIO_PIN38_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN38_CONFIG    0x00000003
+#define GPIO_PIN38_CONFIG_M  ((GPIO_PIN38_CONFIG_V)<<(GPIO_PIN38_CONFIG_S))
+#define GPIO_PIN38_CONFIG_V  0x3
+#define GPIO_PIN38_CONFIG_S  11
+
+/* GPIO_PIN38_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN38_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN38_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN38_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN38_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN38_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN38_INT_TYPE    0x00000007
+#define GPIO_PIN38_INT_TYPE_M  ((GPIO_PIN38_INT_TYPE_V)<<(GPIO_PIN38_INT_TYPE_S))
+#define GPIO_PIN38_INT_TYPE_V  0x7
+#define GPIO_PIN38_INT_TYPE_S  7
+
+/* GPIO_PIN38_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN38_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN38_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN38_PAD_DRIVER_V  0x1
+#define GPIO_PIN38_PAD_DRIVER_S  2
+
+#define GPIO_PIN39_REG          (DR_REG_GPIO_BASE + 0x0124)
+
+/* GPIO_PIN39_INT_ENA : R/W ;bitpos:[17:13] ;default: x ; */
+/* Description: bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable
+ * interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU
+ * non-maskable interrupt enable  bit5: SDIO's extent interrupt enable.
+ */
+
+#define GPIO_PIN39_INT_ENA    0x0000001F
+#define GPIO_PIN39_INT_ENA_M  ((GPIO_PIN39_INT_ENA_V)<<(GPIO_PIN39_INT_ENA_S))
+#define GPIO_PIN39_INT_ENA_V  0x1F
+#define GPIO_PIN39_INT_ENA_S  13
+
+/* GPIO_PIN39_CONFIG : R/W ;bitpos:[12:11] ;default: x ; */
+/* Description: NA */
+
+#define GPIO_PIN39_CONFIG    0x00000003
+#define GPIO_PIN39_CONFIG_M  ((GPIO_PIN39_CONFIG_V)<<(GPIO_PIN39_CONFIG_S))
+#define GPIO_PIN39_CONFIG_V  0x3
+#define GPIO_PIN39_CONFIG_S  11
+
+/* GPIO_PIN39_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: x ; */
+/* Description: GPIO wake up enable  only available in light sleep */
+
+#define GPIO_PIN39_WAKEUP_ENABLE    (BIT(10))
+#define GPIO_PIN39_WAKEUP_ENABLE_M  (BIT(10))
+#define GPIO_PIN39_WAKEUP_ENABLE_V  0x1
+#define GPIO_PIN39_WAKEUP_ENABLE_S  10
+
+/* GPIO_PIN39_INT_TYPE : R/W ;bitpos:[9:7] ;default: x ; */
+/* Description: if set to 0: GPIO interrupt disable  if set to 1: rising edge
+ * trigger if set to 2: falling edge trigger if set to 3: any edge
+ * trigger if set to 4: low level trigger if set to 5: high level trigger.
+ */
+
+#define GPIO_PIN39_INT_TYPE    0x00000007
+#define GPIO_PIN39_INT_TYPE_M  ((GPIO_PIN39_INT_TYPE_V)<<(GPIO_PIN39_INT_TYPE_S))
+#define GPIO_PIN39_INT_TYPE_V  0x7
+#define GPIO_PIN39_INT_TYPE_S  7
+
+/* GPIO_PIN39_PAD_DRIVER : R/W ;bitpos:[2] ;default: x ; */
+/* Description: if set to 0: normal output  if set to 1: open drain */
+
+#define GPIO_PIN39_PAD_DRIVER    (BIT(2))
+#define GPIO_PIN39_PAD_DRIVER_M  (BIT(2))
+#define GPIO_PIN39_PAD_DRIVER_V  0x1
+#define GPIO_PIN39_PAD_DRIVER_S  2
+
+#define GPIO_cali_conf_REG          (DR_REG_GPIO_BASE + 0x0128)
+
+/* GPIO_CALI_START : R/W ;bitpos:[31] ;default: x ; */
+/* Description: */
+
+#define GPIO_CALI_START  (BIT(31))
+#define GPIO_CALI_START_M  (BIT(31))
+#define GPIO_CALI_START_V  0x1
+#define GPIO_CALI_START_S  31
+
+/* GPIO_CALI_RTC_MAX : R/W ;bitpos:[9:0] ;default: x ; */
+/* Description: */
+
+#define GPIO_CALI_RTC_MAX  0x000003FF
+#define GPIO_CALI_RTC_MAX_M  ((GPIO_CALI_RTC_MAX_V)<<(GPIO_CALI_RTC_MAX_S))
+#define GPIO_CALI_RTC_MAX_V  0x3FF
+#define GPIO_CALI_RTC_MAX_S  0
+
+#define GPIO_cali_data_REG          (DR_REG_GPIO_BASE + 0x012c)
+
+/* GPIO_CALI_RDY_SYNC2 : RO ;bitpos:[31] ;default:  ; */
+/* Description: */
+
+#define GPIO_CALI_RDY_SYNC2  (BIT(31))
+#define GPIO_CALI_RDY_SYNC2_M  (BIT(31))
+#define GPIO_CALI_RDY_SYNC2_V  0x1
+#define GPIO_CALI_RDY_SYNC2_S  31
+
+/* GPIO_CALI_RDY_REAL : RO ;bitpos:[30] ;default:  ; */
+/* Description: */
+
+#define GPIO_CALI_RDY_REAL  (BIT(30))
+#define GPIO_CALI_RDY_REAL_M  (BIT(30))
+#define GPIO_CALI_RDY_REAL_V  0x1
+#define GPIO_CALI_RDY_REAL_S  30
+
+/* GPIO_CALI_VALUE_SYNC2 : RO ;bitpos:[19:0] ;default:  ; */
+/* Description: */
+
+#define GPIO_CALI_VALUE_SYNC2  0x000FFFFF
+#define GPIO_CALI_VALUE_SYNC2_M  ((GPIO_CALI_VALUE_SYNC2_V)<<(GPIO_CALI_VALUE_SYNC2_S))
+#define GPIO_CALI_VALUE_SYNC2_V  0xFFFFF
+#define GPIO_CALI_VALUE_SYNC2_S  0
+
+#define GPIO_FUNC0_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0130)
+
+/* GPIO_SIG0_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG0_IN_SEL    (BIT(7))
+#define GPIO_SIG0_IN_SEL_M  (BIT(7))
+#define GPIO_SIG0_IN_SEL_V  0x1
+#define GPIO_SIG0_IN_SEL_S  7
+
+/* GPIO_FUNC0_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC0_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC0_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC0_IN_INV_SEL_V  0x1
+#define GPIO_FUNC0_IN_INV_SEL_S  6
+
+/* GPIO_FUNC0_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC0_IN_SEL    0x0000003F
+#define GPIO_FUNC0_IN_SEL_M  ((GPIO_FUNC0_IN_SEL_V)<<(GPIO_FUNC0_IN_SEL_S))
+#define GPIO_FUNC0_IN_SEL_V  0x3F
+#define GPIO_FUNC0_IN_SEL_S  0
+
+#define GPIO_FUNC1_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0134)
+
+/* GPIO_SIG1_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG1_IN_SEL    (BIT(7))
+#define GPIO_SIG1_IN_SEL_M  (BIT(7))
+#define GPIO_SIG1_IN_SEL_V  0x1
+#define GPIO_SIG1_IN_SEL_S  7
+
+/* GPIO_FUNC1_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC1_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC1_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC1_IN_INV_SEL_V  0x1
+#define GPIO_FUNC1_IN_INV_SEL_S  6
+
+/* GPIO_FUNC1_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC1_IN_SEL    0x0000003F
+#define GPIO_FUNC1_IN_SEL_M  ((GPIO_FUNC1_IN_SEL_V)<<(GPIO_FUNC1_IN_SEL_S))
+#define GPIO_FUNC1_IN_SEL_V  0x3F
+#define GPIO_FUNC1_IN_SEL_S  0
+
+#define GPIO_FUNC2_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0138)
+
+/* GPIO_SIG2_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG2_IN_SEL    (BIT(7))
+#define GPIO_SIG2_IN_SEL_M  (BIT(7))
+#define GPIO_SIG2_IN_SEL_V  0x1
+#define GPIO_SIG2_IN_SEL_S  7
+
+/* GPIO_FUNC2_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC2_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC2_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC2_IN_INV_SEL_V  0x1
+#define GPIO_FUNC2_IN_INV_SEL_S  6
+
+/* GPIO_FUNC2_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC2_IN_SEL    0x0000003F
+#define GPIO_FUNC2_IN_SEL_M  ((GPIO_FUNC2_IN_SEL_V)<<(GPIO_FUNC2_IN_SEL_S))
+#define GPIO_FUNC2_IN_SEL_V  0x3F
+#define GPIO_FUNC2_IN_SEL_S  0
+
+#define GPIO_FUNC3_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x013c)
+
+/* GPIO_SIG3_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG3_IN_SEL    (BIT(7))
+#define GPIO_SIG3_IN_SEL_M  (BIT(7))
+#define GPIO_SIG3_IN_SEL_V  0x1
+#define GPIO_SIG3_IN_SEL_S  7
+
+/* GPIO_FUNC3_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC3_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC3_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC3_IN_INV_SEL_V  0x1
+#define GPIO_FUNC3_IN_INV_SEL_S  6
+
+/* GPIO_FUNC3_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC3_IN_SEL    0x0000003F
+#define GPIO_FUNC3_IN_SEL_M  ((GPIO_FUNC3_IN_SEL_V)<<(GPIO_FUNC3_IN_SEL_S))
+#define GPIO_FUNC3_IN_SEL_V  0x3F
+#define GPIO_FUNC3_IN_SEL_S  0
+
+#define GPIO_FUNC4_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0140)
+
+/* GPIO_SIG4_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG4_IN_SEL    (BIT(7))
+#define GPIO_SIG4_IN_SEL_M  (BIT(7))
+#define GPIO_SIG4_IN_SEL_V  0x1
+#define GPIO_SIG4_IN_SEL_S  7
+
+/* GPIO_FUNC4_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC4_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC4_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC4_IN_INV_SEL_V  0x1
+#define GPIO_FUNC4_IN_INV_SEL_S  6
+
+/* GPIO_FUNC4_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC4_IN_SEL    0x0000003F
+#define GPIO_FUNC4_IN_SEL_M  ((GPIO_FUNC4_IN_SEL_V)<<(GPIO_FUNC4_IN_SEL_S))
+#define GPIO_FUNC4_IN_SEL_V  0x3F
+#define GPIO_FUNC4_IN_SEL_S  0
+
+#define GPIO_FUNC5_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0144)
+
+/* GPIO_SIG5_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG5_IN_SEL    (BIT(7))
+#define GPIO_SIG5_IN_SEL_M  (BIT(7))
+#define GPIO_SIG5_IN_SEL_V  0x1
+#define GPIO_SIG5_IN_SEL_S  7
+
+/* GPIO_FUNC5_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC5_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC5_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC5_IN_INV_SEL_V  0x1
+#define GPIO_FUNC5_IN_INV_SEL_S  6
+
+/* GPIO_FUNC5_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC5_IN_SEL    0x0000003F
+#define GPIO_FUNC5_IN_SEL_M  ((GPIO_FUNC5_IN_SEL_V)<<(GPIO_FUNC5_IN_SEL_S))
+#define GPIO_FUNC5_IN_SEL_V  0x3F
+#define GPIO_FUNC5_IN_SEL_S  0
+
+#define GPIO_FUNC6_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0148)
+
+/* GPIO_SIG6_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG6_IN_SEL    (BIT(7))
+#define GPIO_SIG6_IN_SEL_M  (BIT(7))
+#define GPIO_SIG6_IN_SEL_V  0x1
+#define GPIO_SIG6_IN_SEL_S  7
+
+/* GPIO_FUNC6_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC6_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC6_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC6_IN_INV_SEL_V  0x1
+#define GPIO_FUNC6_IN_INV_SEL_S  6
+
+/* GPIO_FUNC6_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC6_IN_SEL    0x0000003F
+#define GPIO_FUNC6_IN_SEL_M  ((GPIO_FUNC6_IN_SEL_V)<<(GPIO_FUNC6_IN_SEL_S))
+#define GPIO_FUNC6_IN_SEL_V  0x3F
+#define GPIO_FUNC6_IN_SEL_S  0
+
+#define GPIO_FUNC7_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x014c)
+
+/* GPIO_SIG7_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG7_IN_SEL    (BIT(7))
+#define GPIO_SIG7_IN_SEL_M  (BIT(7))
+#define GPIO_SIG7_IN_SEL_V  0x1
+#define GPIO_SIG7_IN_SEL_S  7
+
+/* GPIO_FUNC7_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC7_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC7_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC7_IN_INV_SEL_V  0x1
+#define GPIO_FUNC7_IN_INV_SEL_S  6
+
+/* GPIO_FUNC7_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC7_IN_SEL    0x0000003F
+#define GPIO_FUNC7_IN_SEL_M  ((GPIO_FUNC7_IN_SEL_V)<<(GPIO_FUNC7_IN_SEL_S))
+#define GPIO_FUNC7_IN_SEL_V  0x3F
+#define GPIO_FUNC7_IN_SEL_S  0
+
+#define GPIO_FUNC8_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0150)
+
+/* GPIO_SIG8_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG8_IN_SEL    (BIT(7))
+#define GPIO_SIG8_IN_SEL_M  (BIT(7))
+#define GPIO_SIG8_IN_SEL_V  0x1
+#define GPIO_SIG8_IN_SEL_S  7
+
+/* GPIO_FUNC8_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC8_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC8_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC8_IN_INV_SEL_V  0x1
+#define GPIO_FUNC8_IN_INV_SEL_S  6
+
+/* GPIO_FUNC8_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC8_IN_SEL    0x0000003F
+#define GPIO_FUNC8_IN_SEL_M  ((GPIO_FUNC8_IN_SEL_V)<<(GPIO_FUNC8_IN_SEL_S))
+#define GPIO_FUNC8_IN_SEL_V  0x3F
+#define GPIO_FUNC8_IN_SEL_S  0
+
+#define GPIO_FUNC9_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0154)
+
+/* GPIO_SIG9_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG9_IN_SEL    (BIT(7))
+#define GPIO_SIG9_IN_SEL_M  (BIT(7))
+#define GPIO_SIG9_IN_SEL_V  0x1
+#define GPIO_SIG9_IN_SEL_S  7
+
+/* GPIO_FUNC9_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC9_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC9_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC9_IN_INV_SEL_V  0x1
+#define GPIO_FUNC9_IN_INV_SEL_S  6
+
+/* GPIO_FUNC9_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC9_IN_SEL    0x0000003F
+#define GPIO_FUNC9_IN_SEL_M  ((GPIO_FUNC9_IN_SEL_V)<<(GPIO_FUNC9_IN_SEL_S))
+#define GPIO_FUNC9_IN_SEL_V  0x3F
+#define GPIO_FUNC9_IN_SEL_S  0
+
+#define GPIO_FUNC10_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0158)
+
+/* GPIO_SIG10_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG10_IN_SEL    (BIT(7))
+#define GPIO_SIG10_IN_SEL_M  (BIT(7))
+#define GPIO_SIG10_IN_SEL_V  0x1
+#define GPIO_SIG10_IN_SEL_S  7
+
+/* GPIO_FUNC10_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC10_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC10_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC10_IN_INV_SEL_V  0x1
+#define GPIO_FUNC10_IN_INV_SEL_S  6
+
+/* GPIO_FUNC10_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC10_IN_SEL    0x0000003F
+#define GPIO_FUNC10_IN_SEL_M  ((GPIO_FUNC10_IN_SEL_V)<<(GPIO_FUNC10_IN_SEL_S))
+#define GPIO_FUNC10_IN_SEL_V  0x3F
+#define GPIO_FUNC10_IN_SEL_S  0
+
+#define GPIO_FUNC11_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x015c)
+
+/* GPIO_SIG11_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG11_IN_SEL    (BIT(7))
+#define GPIO_SIG11_IN_SEL_M  (BIT(7))
+#define GPIO_SIG11_IN_SEL_V  0x1
+#define GPIO_SIG11_IN_SEL_S  7
+
+/* GPIO_FUNC11_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC11_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC11_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC11_IN_INV_SEL_V  0x1
+#define GPIO_FUNC11_IN_INV_SEL_S  6
+
+/* GPIO_FUNC11_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC11_IN_SEL    0x0000003F
+#define GPIO_FUNC11_IN_SEL_M  ((GPIO_FUNC11_IN_SEL_V)<<(GPIO_FUNC11_IN_SEL_S))
+#define GPIO_FUNC11_IN_SEL_V  0x3F
+#define GPIO_FUNC11_IN_SEL_S  0
+
+#define GPIO_FUNC12_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0160)
+
+/* GPIO_SIG12_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG12_IN_SEL    (BIT(7))
+#define GPIO_SIG12_IN_SEL_M  (BIT(7))
+#define GPIO_SIG12_IN_SEL_V  0x1
+#define GPIO_SIG12_IN_SEL_S  7
+
+/* GPIO_FUNC12_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC12_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC12_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC12_IN_INV_SEL_V  0x1
+#define GPIO_FUNC12_IN_INV_SEL_S  6
+
+/* GPIO_FUNC12_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC12_IN_SEL    0x0000003F
+#define GPIO_FUNC12_IN_SEL_M  ((GPIO_FUNC12_IN_SEL_V)<<(GPIO_FUNC12_IN_SEL_S))
+#define GPIO_FUNC12_IN_SEL_V  0x3F
+#define GPIO_FUNC12_IN_SEL_S  0
+
+#define GPIO_FUNC13_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0164)
+
+/* GPIO_SIG13_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG13_IN_SEL    (BIT(7))
+#define GPIO_SIG13_IN_SEL_M  (BIT(7))
+#define GPIO_SIG13_IN_SEL_V  0x1
+#define GPIO_SIG13_IN_SEL_S  7
+
+/* GPIO_FUNC13_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC13_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC13_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC13_IN_INV_SEL_V  0x1
+#define GPIO_FUNC13_IN_INV_SEL_S  6
+
+/* GPIO_FUNC13_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC13_IN_SEL    0x0000003F
+#define GPIO_FUNC13_IN_SEL_M  ((GPIO_FUNC13_IN_SEL_V)<<(GPIO_FUNC13_IN_SEL_S))
+#define GPIO_FUNC13_IN_SEL_V  0x3F
+#define GPIO_FUNC13_IN_SEL_S  0
+
+#define GPIO_FUNC14_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0168)
+
+/* GPIO_SIG14_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG14_IN_SEL    (BIT(7))
+#define GPIO_SIG14_IN_SEL_M  (BIT(7))
+#define GPIO_SIG14_IN_SEL_V  0x1
+#define GPIO_SIG14_IN_SEL_S  7
+
+/* GPIO_FUNC14_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC14_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC14_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC14_IN_INV_SEL_V  0x1
+#define GPIO_FUNC14_IN_INV_SEL_S  6
+
+/* GPIO_FUNC14_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC14_IN_SEL    0x0000003F
+#define GPIO_FUNC14_IN_SEL_M  ((GPIO_FUNC14_IN_SEL_V)<<(GPIO_FUNC14_IN_SEL_S))
+#define GPIO_FUNC14_IN_SEL_V  0x3F
+#define GPIO_FUNC14_IN_SEL_S  0
+
+#define GPIO_FUNC15_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x016c)
+
+/* GPIO_SIG15_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG15_IN_SEL    (BIT(7))
+#define GPIO_SIG15_IN_SEL_M  (BIT(7))
+#define GPIO_SIG15_IN_SEL_V  0x1
+#define GPIO_SIG15_IN_SEL_S  7
+
+/* GPIO_FUNC15_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC15_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC15_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC15_IN_INV_SEL_V  0x1
+#define GPIO_FUNC15_IN_INV_SEL_S  6
+
+/* GPIO_FUNC15_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC15_IN_SEL    0x0000003F
+#define GPIO_FUNC15_IN_SEL_M  ((GPIO_FUNC15_IN_SEL_V)<<(GPIO_FUNC15_IN_SEL_S))
+#define GPIO_FUNC15_IN_SEL_V  0x3F
+#define GPIO_FUNC15_IN_SEL_S  0
+
+#define GPIO_FUNC16_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0170)
+
+/* GPIO_SIG16_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG16_IN_SEL    (BIT(7))
+#define GPIO_SIG16_IN_SEL_M  (BIT(7))
+#define GPIO_SIG16_IN_SEL_V  0x1
+#define GPIO_SIG16_IN_SEL_S  7
+
+/* GPIO_FUNC16_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC16_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC16_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC16_IN_INV_SEL_V  0x1
+#define GPIO_FUNC16_IN_INV_SEL_S  6
+
+/* GPIO_FUNC16_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC16_IN_SEL    0x0000003F
+#define GPIO_FUNC16_IN_SEL_M  ((GPIO_FUNC16_IN_SEL_V)<<(GPIO_FUNC16_IN_SEL_S))
+#define GPIO_FUNC16_IN_SEL_V  0x3F
+#define GPIO_FUNC16_IN_SEL_S  0
+
+#define GPIO_FUNC17_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0174)
+
+/* GPIO_SIG17_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG17_IN_SEL    (BIT(7))
+#define GPIO_SIG17_IN_SEL_M  (BIT(7))
+#define GPIO_SIG17_IN_SEL_V  0x1
+#define GPIO_SIG17_IN_SEL_S  7
+
+/* GPIO_FUNC17_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC17_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC17_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC17_IN_INV_SEL_V  0x1
+#define GPIO_FUNC17_IN_INV_SEL_S  6
+
+/* GPIO_FUNC17_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC17_IN_SEL    0x0000003F
+#define GPIO_FUNC17_IN_SEL_M  ((GPIO_FUNC17_IN_SEL_V)<<(GPIO_FUNC17_IN_SEL_S))
+#define GPIO_FUNC17_IN_SEL_V  0x3F
+#define GPIO_FUNC17_IN_SEL_S  0
+
+#define GPIO_FUNC18_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0178)
+
+/* GPIO_SIG18_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG18_IN_SEL    (BIT(7))
+#define GPIO_SIG18_IN_SEL_M  (BIT(7))
+#define GPIO_SIG18_IN_SEL_V  0x1
+#define GPIO_SIG18_IN_SEL_S  7
+
+/* GPIO_FUNC18_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC18_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC18_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC18_IN_INV_SEL_V  0x1
+#define GPIO_FUNC18_IN_INV_SEL_S  6
+
+/* GPIO_FUNC18_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC18_IN_SEL    0x0000003F
+#define GPIO_FUNC18_IN_SEL_M  ((GPIO_FUNC18_IN_SEL_V)<<(GPIO_FUNC18_IN_SEL_S))
+#define GPIO_FUNC18_IN_SEL_V  0x3F
+#define GPIO_FUNC18_IN_SEL_S  0
+
+#define GPIO_FUNC19_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x017c)
+
+/* GPIO_SIG19_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG19_IN_SEL    (BIT(7))
+#define GPIO_SIG19_IN_SEL_M  (BIT(7))
+#define GPIO_SIG19_IN_SEL_V  0x1
+#define GPIO_SIG19_IN_SEL_S  7
+
+/* GPIO_FUNC19_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC19_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC19_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC19_IN_INV_SEL_V  0x1
+#define GPIO_FUNC19_IN_INV_SEL_S  6
+
+/* GPIO_FUNC19_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC19_IN_SEL    0x0000003F
+#define GPIO_FUNC19_IN_SEL_M  ((GPIO_FUNC19_IN_SEL_V)<<(GPIO_FUNC19_IN_SEL_S))
+#define GPIO_FUNC19_IN_SEL_V  0x3F
+#define GPIO_FUNC19_IN_SEL_S  0
+
+#define GPIO_FUNC20_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0180)
+
+/* GPIO_SIG20_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG20_IN_SEL    (BIT(7))
+#define GPIO_SIG20_IN_SEL_M  (BIT(7))
+#define GPIO_SIG20_IN_SEL_V  0x1
+#define GPIO_SIG20_IN_SEL_S  7
+
+/* GPIO_FUNC20_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC20_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC20_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC20_IN_INV_SEL_V  0x1
+#define GPIO_FUNC20_IN_INV_SEL_S  6
+
+/* GPIO_FUNC20_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC20_IN_SEL    0x0000003F
+#define GPIO_FUNC20_IN_SEL_M  ((GPIO_FUNC20_IN_SEL_V)<<(GPIO_FUNC20_IN_SEL_S))
+#define GPIO_FUNC20_IN_SEL_V  0x3F
+#define GPIO_FUNC20_IN_SEL_S  0
+
+#define GPIO_FUNC21_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0184)
+
+/* GPIO_SIG21_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG21_IN_SEL    (BIT(7))
+#define GPIO_SIG21_IN_SEL_M  (BIT(7))
+#define GPIO_SIG21_IN_SEL_V  0x1
+#define GPIO_SIG21_IN_SEL_S  7
+
+/* GPIO_FUNC21_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC21_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC21_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC21_IN_INV_SEL_V  0x1
+#define GPIO_FUNC21_IN_INV_SEL_S  6
+
+/* GPIO_FUNC21_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC21_IN_SEL    0x0000003F
+#define GPIO_FUNC21_IN_SEL_M  ((GPIO_FUNC21_IN_SEL_V)<<(GPIO_FUNC21_IN_SEL_S))
+#define GPIO_FUNC21_IN_SEL_V  0x3F
+#define GPIO_FUNC21_IN_SEL_S  0
+
+#define GPIO_FUNC22_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0188)
+
+/* GPIO_SIG22_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG22_IN_SEL    (BIT(7))
+#define GPIO_SIG22_IN_SEL_M  (BIT(7))
+#define GPIO_SIG22_IN_SEL_V  0x1
+#define GPIO_SIG22_IN_SEL_S  7
+
+/* GPIO_FUNC22_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC22_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC22_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC22_IN_INV_SEL_V  0x1
+#define GPIO_FUNC22_IN_INV_SEL_S  6
+
+/* GPIO_FUNC22_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC22_IN_SEL    0x0000003F
+#define GPIO_FUNC22_IN_SEL_M  ((GPIO_FUNC22_IN_SEL_V)<<(GPIO_FUNC22_IN_SEL_S))
+#define GPIO_FUNC22_IN_SEL_V  0x3F
+#define GPIO_FUNC22_IN_SEL_S  0
+
+#define GPIO_FUNC23_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x018c)
+
+/* GPIO_SIG23_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG23_IN_SEL    (BIT(7))
+#define GPIO_SIG23_IN_SEL_M  (BIT(7))
+#define GPIO_SIG23_IN_SEL_V  0x1
+#define GPIO_SIG23_IN_SEL_S  7
+
+/* GPIO_FUNC23_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC23_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC23_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC23_IN_INV_SEL_V  0x1
+#define GPIO_FUNC23_IN_INV_SEL_S  6
+
+/* GPIO_FUNC23_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC23_IN_SEL    0x0000003F
+#define GPIO_FUNC23_IN_SEL_M  ((GPIO_FUNC23_IN_SEL_V)<<(GPIO_FUNC23_IN_SEL_S))
+#define GPIO_FUNC23_IN_SEL_V  0x3F
+#define GPIO_FUNC23_IN_SEL_S  0
+
+#define GPIO_FUNC24_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0190)
+
+/* GPIO_SIG24_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG24_IN_SEL    (BIT(7))
+#define GPIO_SIG24_IN_SEL_M  (BIT(7))
+#define GPIO_SIG24_IN_SEL_V  0x1
+#define GPIO_SIG24_IN_SEL_S  7
+
+/* GPIO_FUNC24_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC24_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC24_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC24_IN_INV_SEL_V  0x1
+#define GPIO_FUNC24_IN_INV_SEL_S  6
+
+/* GPIO_FUNC24_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC24_IN_SEL    0x0000003F
+#define GPIO_FUNC24_IN_SEL_M  ((GPIO_FUNC24_IN_SEL_V)<<(GPIO_FUNC24_IN_SEL_S))
+#define GPIO_FUNC24_IN_SEL_V  0x3F
+#define GPIO_FUNC24_IN_SEL_S  0
+
+#define GPIO_FUNC25_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0194)
+
+/* GPIO_SIG25_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG25_IN_SEL    (BIT(7))
+#define GPIO_SIG25_IN_SEL_M  (BIT(7))
+#define GPIO_SIG25_IN_SEL_V  0x1
+#define GPIO_SIG25_IN_SEL_S  7
+
+/* GPIO_FUNC25_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC25_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC25_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC25_IN_INV_SEL_V  0x1
+#define GPIO_FUNC25_IN_INV_SEL_S  6
+
+/* GPIO_FUNC25_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC25_IN_SEL    0x0000003F
+#define GPIO_FUNC25_IN_SEL_M  ((GPIO_FUNC25_IN_SEL_V)<<(GPIO_FUNC25_IN_SEL_S))
+#define GPIO_FUNC25_IN_SEL_V  0x3F
+#define GPIO_FUNC25_IN_SEL_S  0
+
+#define GPIO_FUNC26_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0198)
+
+/* GPIO_SIG26_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG26_IN_SEL    (BIT(7))
+#define GPIO_SIG26_IN_SEL_M  (BIT(7))
+#define GPIO_SIG26_IN_SEL_V  0x1
+#define GPIO_SIG26_IN_SEL_S  7
+
+/* GPIO_FUNC26_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC26_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC26_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC26_IN_INV_SEL_V  0x1
+#define GPIO_FUNC26_IN_INV_SEL_S  6
+
+/* GPIO_FUNC26_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC26_IN_SEL    0x0000003F
+#define GPIO_FUNC26_IN_SEL_M  ((GPIO_FUNC26_IN_SEL_V)<<(GPIO_FUNC26_IN_SEL_S))
+#define GPIO_FUNC26_IN_SEL_V  0x3F
+#define GPIO_FUNC26_IN_SEL_S  0
+
+#define GPIO_FUNC27_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x019c)
+
+/* GPIO_SIG27_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG27_IN_SEL    (BIT(7))
+#define GPIO_SIG27_IN_SEL_M  (BIT(7))
+#define GPIO_SIG27_IN_SEL_V  0x1
+#define GPIO_SIG27_IN_SEL_S  7
+
+/* GPIO_FUNC27_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC27_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC27_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC27_IN_INV_SEL_V  0x1
+#define GPIO_FUNC27_IN_INV_SEL_S  6
+
+/* GPIO_FUNC27_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC27_IN_SEL    0x0000003F
+#define GPIO_FUNC27_IN_SEL_M  ((GPIO_FUNC27_IN_SEL_V)<<(GPIO_FUNC27_IN_SEL_S))
+#define GPIO_FUNC27_IN_SEL_V  0x3F
+#define GPIO_FUNC27_IN_SEL_S  0
+
+#define GPIO_FUNC28_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01a0)
+
+/* GPIO_SIG28_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG28_IN_SEL    (BIT(7))
+#define GPIO_SIG28_IN_SEL_M  (BIT(7))
+#define GPIO_SIG28_IN_SEL_V  0x1
+#define GPIO_SIG28_IN_SEL_S  7
+
+/* GPIO_FUNC28_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC28_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC28_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC28_IN_INV_SEL_V  0x1
+#define GPIO_FUNC28_IN_INV_SEL_S  6
+
+/* GPIO_FUNC28_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC28_IN_SEL    0x0000003F
+#define GPIO_FUNC28_IN_SEL_M  ((GPIO_FUNC28_IN_SEL_V)<<(GPIO_FUNC28_IN_SEL_S))
+#define GPIO_FUNC28_IN_SEL_V  0x3F
+#define GPIO_FUNC28_IN_SEL_S  0
+
+#define GPIO_FUNC29_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01a4)
+
+/* GPIO_SIG29_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG29_IN_SEL    (BIT(7))
+#define GPIO_SIG29_IN_SEL_M  (BIT(7))
+#define GPIO_SIG29_IN_SEL_V  0x1
+#define GPIO_SIG29_IN_SEL_S  7
+
+/* GPIO_FUNC29_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC29_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC29_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC29_IN_INV_SEL_V  0x1
+#define GPIO_FUNC29_IN_INV_SEL_S  6
+
+/* GPIO_FUNC29_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC29_IN_SEL    0x0000003F
+#define GPIO_FUNC29_IN_SEL_M  ((GPIO_FUNC29_IN_SEL_V)<<(GPIO_FUNC29_IN_SEL_S))
+#define GPIO_FUNC29_IN_SEL_V  0x3F
+#define GPIO_FUNC29_IN_SEL_S  0
+
+#define GPIO_FUNC30_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01a8)
+
+/* GPIO_SIG30_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG30_IN_SEL    (BIT(7))
+#define GPIO_SIG30_IN_SEL_M  (BIT(7))
+#define GPIO_SIG30_IN_SEL_V  0x1
+#define GPIO_SIG30_IN_SEL_S  7
+
+/* GPIO_FUNC30_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC30_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC30_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC30_IN_INV_SEL_V  0x1
+#define GPIO_FUNC30_IN_INV_SEL_S  6
+
+/* GPIO_FUNC30_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC30_IN_SEL    0x0000003F
+#define GPIO_FUNC30_IN_SEL_M  ((GPIO_FUNC30_IN_SEL_V)<<(GPIO_FUNC30_IN_SEL_S))
+#define GPIO_FUNC30_IN_SEL_V  0x3F
+#define GPIO_FUNC30_IN_SEL_S  0
+
+#define GPIO_FUNC31_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01ac)
+
+/* GPIO_SIG31_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG31_IN_SEL    (BIT(7))
+#define GPIO_SIG31_IN_SEL_M  (BIT(7))
+#define GPIO_SIG31_IN_SEL_V  0x1
+#define GPIO_SIG31_IN_SEL_S  7
+
+/* GPIO_FUNC31_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC31_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC31_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC31_IN_INV_SEL_V  0x1
+#define GPIO_FUNC31_IN_INV_SEL_S  6
+
+/* GPIO_FUNC31_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC31_IN_SEL    0x0000003F
+#define GPIO_FUNC31_IN_SEL_M  ((GPIO_FUNC31_IN_SEL_V)<<(GPIO_FUNC31_IN_SEL_S))
+#define GPIO_FUNC31_IN_SEL_V  0x3F
+#define GPIO_FUNC31_IN_SEL_S  0
+
+#define GPIO_FUNC32_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01b0)
+
+/* GPIO_SIG32_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG32_IN_SEL    (BIT(7))
+#define GPIO_SIG32_IN_SEL_M  (BIT(7))
+#define GPIO_SIG32_IN_SEL_V  0x1
+#define GPIO_SIG32_IN_SEL_S  7
+
+/* GPIO_FUNC32_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC32_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC32_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC32_IN_INV_SEL_V  0x1
+#define GPIO_FUNC32_IN_INV_SEL_S  6
+
+/* GPIO_FUNC32_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC32_IN_SEL    0x0000003F
+#define GPIO_FUNC32_IN_SEL_M  ((GPIO_FUNC32_IN_SEL_V)<<(GPIO_FUNC32_IN_SEL_S))
+#define GPIO_FUNC32_IN_SEL_V  0x3F
+#define GPIO_FUNC32_IN_SEL_S  0
+
+#define GPIO_FUNC33_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01b4)
+
+/* GPIO_SIG33_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG33_IN_SEL    (BIT(7))
+#define GPIO_SIG33_IN_SEL_M  (BIT(7))
+#define GPIO_SIG33_IN_SEL_V  0x1
+#define GPIO_SIG33_IN_SEL_S  7
+
+/* GPIO_FUNC33_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC33_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC33_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC33_IN_INV_SEL_V  0x1
+#define GPIO_FUNC33_IN_INV_SEL_S  6
+
+/* GPIO_FUNC33_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC33_IN_SEL    0x0000003F
+#define GPIO_FUNC33_IN_SEL_M  ((GPIO_FUNC33_IN_SEL_V)<<(GPIO_FUNC33_IN_SEL_S))
+#define GPIO_FUNC33_IN_SEL_V  0x3F
+#define GPIO_FUNC33_IN_SEL_S  0
+
+#define GPIO_FUNC34_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01b8)
+
+/* GPIO_SIG34_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG34_IN_SEL    (BIT(7))
+#define GPIO_SIG34_IN_SEL_M  (BIT(7))
+#define GPIO_SIG34_IN_SEL_V  0x1
+#define GPIO_SIG34_IN_SEL_S  7
+
+/* GPIO_FUNC34_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC34_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC34_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC34_IN_INV_SEL_V  0x1
+#define GPIO_FUNC34_IN_INV_SEL_S  6
+
+/* GPIO_FUNC34_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC34_IN_SEL    0x0000003F
+#define GPIO_FUNC34_IN_SEL_M  ((GPIO_FUNC34_IN_SEL_V)<<(GPIO_FUNC34_IN_SEL_S))
+#define GPIO_FUNC34_IN_SEL_V  0x3F
+#define GPIO_FUNC34_IN_SEL_S  0
+
+#define GPIO_FUNC35_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01bc)
+
+/* GPIO_SIG35_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG35_IN_SEL    (BIT(7))
+#define GPIO_SIG35_IN_SEL_M  (BIT(7))
+#define GPIO_SIG35_IN_SEL_V  0x1
+#define GPIO_SIG35_IN_SEL_S  7
+
+/* GPIO_FUNC35_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC35_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC35_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC35_IN_INV_SEL_V  0x1
+#define GPIO_FUNC35_IN_INV_SEL_S  6
+
+/* GPIO_FUNC35_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC35_IN_SEL    0x0000003F
+#define GPIO_FUNC35_IN_SEL_M  ((GPIO_FUNC35_IN_SEL_V)<<(GPIO_FUNC35_IN_SEL_S))
+#define GPIO_FUNC35_IN_SEL_V  0x3F
+#define GPIO_FUNC35_IN_SEL_S  0
+
+#define GPIO_FUNC36_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01c0)
+
+/* GPIO_SIG36_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG36_IN_SEL    (BIT(7))
+#define GPIO_SIG36_IN_SEL_M  (BIT(7))
+#define GPIO_SIG36_IN_SEL_V  0x1
+#define GPIO_SIG36_IN_SEL_S  7
+
+/* GPIO_FUNC36_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC36_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC36_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC36_IN_INV_SEL_V  0x1
+#define GPIO_FUNC36_IN_INV_SEL_S  6
+
+/* GPIO_FUNC36_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC36_IN_SEL    0x0000003F
+#define GPIO_FUNC36_IN_SEL_M  ((GPIO_FUNC36_IN_SEL_V)<<(GPIO_FUNC36_IN_SEL_S))
+#define GPIO_FUNC36_IN_SEL_V  0x3F
+#define GPIO_FUNC36_IN_SEL_S  0
+
+#define GPIO_FUNC37_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01c4)
+
+/* GPIO_SIG37_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG37_IN_SEL    (BIT(7))
+#define GPIO_SIG37_IN_SEL_M  (BIT(7))
+#define GPIO_SIG37_IN_SEL_V  0x1
+#define GPIO_SIG37_IN_SEL_S  7
+
+/* GPIO_FUNC37_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC37_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC37_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC37_IN_INV_SEL_V  0x1
+#define GPIO_FUNC37_IN_INV_SEL_S  6
+
+/* GPIO_FUNC37_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC37_IN_SEL    0x0000003F
+#define GPIO_FUNC37_IN_SEL_M  ((GPIO_FUNC37_IN_SEL_V)<<(GPIO_FUNC37_IN_SEL_S))
+#define GPIO_FUNC37_IN_SEL_V  0x3F
+#define GPIO_FUNC37_IN_SEL_S  0
+
+#define GPIO_FUNC38_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01c8)
+
+/* GPIO_SIG38_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG38_IN_SEL    (BIT(7))
+#define GPIO_SIG38_IN_SEL_M  (BIT(7))
+#define GPIO_SIG38_IN_SEL_V  0x1
+#define GPIO_SIG38_IN_SEL_S  7
+
+/* GPIO_FUNC38_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC38_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC38_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC38_IN_INV_SEL_V  0x1
+#define GPIO_FUNC38_IN_INV_SEL_S  6
+
+/* GPIO_FUNC38_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC38_IN_SEL    0x0000003F
+#define GPIO_FUNC38_IN_SEL_M  ((GPIO_FUNC38_IN_SEL_V)<<(GPIO_FUNC38_IN_SEL_S))
+#define GPIO_FUNC38_IN_SEL_V  0x3F
+#define GPIO_FUNC38_IN_SEL_S  0
+
+#define GPIO_FUNC39_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01cc)
+
+/* GPIO_SIG39_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG39_IN_SEL    (BIT(7))
+#define GPIO_SIG39_IN_SEL_M  (BIT(7))
+#define GPIO_SIG39_IN_SEL_V  0x1
+#define GPIO_SIG39_IN_SEL_S  7
+
+/* GPIO_FUNC39_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC39_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC39_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC39_IN_INV_SEL_V  0x1
+#define GPIO_FUNC39_IN_INV_SEL_S  6
+
+/* GPIO_FUNC39_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC39_IN_SEL    0x0000003F
+#define GPIO_FUNC39_IN_SEL_M  ((GPIO_FUNC39_IN_SEL_V)<<(GPIO_FUNC39_IN_SEL_S))
+#define GPIO_FUNC39_IN_SEL_V  0x3F
+#define GPIO_FUNC39_IN_SEL_S  0
+
+#define GPIO_FUNC40_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01d0)
+
+/* GPIO_SIG40_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG40_IN_SEL    (BIT(7))
+#define GPIO_SIG40_IN_SEL_M  (BIT(7))
+#define GPIO_SIG40_IN_SEL_V  0x1
+#define GPIO_SIG40_IN_SEL_S  7
+
+/* GPIO_FUNC40_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC40_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC40_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC40_IN_INV_SEL_V  0x1
+#define GPIO_FUNC40_IN_INV_SEL_S  6
+
+/* GPIO_FUNC40_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC40_IN_SEL    0x0000003F
+#define GPIO_FUNC40_IN_SEL_M  ((GPIO_FUNC40_IN_SEL_V)<<(GPIO_FUNC40_IN_SEL_S))
+#define GPIO_FUNC40_IN_SEL_V  0x3F
+#define GPIO_FUNC40_IN_SEL_S  0
+
+#define GPIO_FUNC41_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01d4)
+
+/* GPIO_SIG41_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG41_IN_SEL    (BIT(7))
+#define GPIO_SIG41_IN_SEL_M  (BIT(7))
+#define GPIO_SIG41_IN_SEL_V  0x1
+#define GPIO_SIG41_IN_SEL_S  7
+
+/* GPIO_FUNC41_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC41_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC41_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC41_IN_INV_SEL_V  0x1
+#define GPIO_FUNC41_IN_INV_SEL_S  6
+
+/* GPIO_FUNC41_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC41_IN_SEL    0x0000003F
+#define GPIO_FUNC41_IN_SEL_M  ((GPIO_FUNC41_IN_SEL_V)<<(GPIO_FUNC41_IN_SEL_S))
+#define GPIO_FUNC41_IN_SEL_V  0x3F
+#define GPIO_FUNC41_IN_SEL_S  0
+
+#define GPIO_FUNC42_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01d8)
+
+/* GPIO_SIG42_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG42_IN_SEL    (BIT(7))
+#define GPIO_SIG42_IN_SEL_M  (BIT(7))
+#define GPIO_SIG42_IN_SEL_V  0x1
+#define GPIO_SIG42_IN_SEL_S  7
+
+/* GPIO_FUNC42_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC42_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC42_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC42_IN_INV_SEL_V  0x1
+#define GPIO_FUNC42_IN_INV_SEL_S  6
+
+/* GPIO_FUNC42_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC42_IN_SEL    0x0000003F
+#define GPIO_FUNC42_IN_SEL_M  ((GPIO_FUNC42_IN_SEL_V)<<(GPIO_FUNC42_IN_SEL_S))
+#define GPIO_FUNC42_IN_SEL_V  0x3F
+#define GPIO_FUNC42_IN_SEL_S  0
+
+#define GPIO_FUNC43_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01dc)
+
+/* GPIO_SIG43_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG43_IN_SEL    (BIT(7))
+#define GPIO_SIG43_IN_SEL_M  (BIT(7))
+#define GPIO_SIG43_IN_SEL_V  0x1
+#define GPIO_SIG43_IN_SEL_S  7
+
+/* GPIO_FUNC43_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC43_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC43_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC43_IN_INV_SEL_V  0x1
+#define GPIO_FUNC43_IN_INV_SEL_S  6
+
+/* GPIO_FUNC43_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC43_IN_SEL    0x0000003F
+#define GPIO_FUNC43_IN_SEL_M  ((GPIO_FUNC43_IN_SEL_V)<<(GPIO_FUNC43_IN_SEL_S))
+#define GPIO_FUNC43_IN_SEL_V  0x3F
+#define GPIO_FUNC43_IN_SEL_S  0
+
+#define GPIO_FUNC44_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01e0)
+
+/* GPIO_SIG44_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG44_IN_SEL    (BIT(7))
+#define GPIO_SIG44_IN_SEL_M  (BIT(7))
+#define GPIO_SIG44_IN_SEL_V  0x1
+#define GPIO_SIG44_IN_SEL_S  7
+
+/* GPIO_FUNC44_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC44_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC44_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC44_IN_INV_SEL_V  0x1
+#define GPIO_FUNC44_IN_INV_SEL_S  6
+
+/* GPIO_FUNC44_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC44_IN_SEL    0x0000003F
+#define GPIO_FUNC44_IN_SEL_M  ((GPIO_FUNC44_IN_SEL_V)<<(GPIO_FUNC44_IN_SEL_S))
+#define GPIO_FUNC44_IN_SEL_V  0x3F
+#define GPIO_FUNC44_IN_SEL_S  0
+
+#define GPIO_FUNC45_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01e4)
+
+/* GPIO_SIG45_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG45_IN_SEL    (BIT(7))
+#define GPIO_SIG45_IN_SEL_M  (BIT(7))
+#define GPIO_SIG45_IN_SEL_V  0x1
+#define GPIO_SIG45_IN_SEL_S  7
+
+/* GPIO_FUNC45_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC45_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC45_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC45_IN_INV_SEL_V  0x1
+#define GPIO_FUNC45_IN_INV_SEL_S  6
+
+/* GPIO_FUNC45_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC45_IN_SEL    0x0000003F
+#define GPIO_FUNC45_IN_SEL_M  ((GPIO_FUNC45_IN_SEL_V)<<(GPIO_FUNC45_IN_SEL_S))
+#define GPIO_FUNC45_IN_SEL_V  0x3F
+#define GPIO_FUNC45_IN_SEL_S  0
+
+#define GPIO_FUNC46_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01e8)
+
+/* GPIO_SIG46_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG46_IN_SEL    (BIT(7))
+#define GPIO_SIG46_IN_SEL_M  (BIT(7))
+#define GPIO_SIG46_IN_SEL_V  0x1
+#define GPIO_SIG46_IN_SEL_S  7
+
+/* GPIO_FUNC46_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC46_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC46_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC46_IN_INV_SEL_V  0x1
+#define GPIO_FUNC46_IN_INV_SEL_S  6
+
+/* GPIO_FUNC46_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC46_IN_SEL    0x0000003F
+#define GPIO_FUNC46_IN_SEL_M  ((GPIO_FUNC46_IN_SEL_V)<<(GPIO_FUNC46_IN_SEL_S))
+#define GPIO_FUNC46_IN_SEL_V  0x3F
+#define GPIO_FUNC46_IN_SEL_S  0
+
+#define GPIO_FUNC47_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01ec)
+
+/* GPIO_SIG47_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG47_IN_SEL    (BIT(7))
+#define GPIO_SIG47_IN_SEL_M  (BIT(7))
+#define GPIO_SIG47_IN_SEL_V  0x1
+#define GPIO_SIG47_IN_SEL_S  7
+
+/* GPIO_FUNC47_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC47_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC47_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC47_IN_INV_SEL_V  0x1
+#define GPIO_FUNC47_IN_INV_SEL_S  6
+
+/* GPIO_FUNC47_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC47_IN_SEL    0x0000003F
+#define GPIO_FUNC47_IN_SEL_M  ((GPIO_FUNC47_IN_SEL_V)<<(GPIO_FUNC47_IN_SEL_S))
+#define GPIO_FUNC47_IN_SEL_V  0x3F
+#define GPIO_FUNC47_IN_SEL_S  0
+
+#define GPIO_FUNC48_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01f0)
+
+/* GPIO_SIG48_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG48_IN_SEL    (BIT(7))
+#define GPIO_SIG48_IN_SEL_M  (BIT(7))
+#define GPIO_SIG48_IN_SEL_V  0x1
+#define GPIO_SIG48_IN_SEL_S  7
+
+/* GPIO_FUNC48_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC48_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC48_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC48_IN_INV_SEL_V  0x1
+#define GPIO_FUNC48_IN_INV_SEL_S  6
+
+/* GPIO_FUNC48_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC48_IN_SEL    0x0000003F
+#define GPIO_FUNC48_IN_SEL_M  ((GPIO_FUNC48_IN_SEL_V)<<(GPIO_FUNC48_IN_SEL_S))
+#define GPIO_FUNC48_IN_SEL_V  0x3F
+#define GPIO_FUNC48_IN_SEL_S  0
+
+#define GPIO_FUNC49_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01f4)
+
+/* GPIO_SIG49_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG49_IN_SEL    (BIT(7))
+#define GPIO_SIG49_IN_SEL_M  (BIT(7))
+#define GPIO_SIG49_IN_SEL_V  0x1
+#define GPIO_SIG49_IN_SEL_S  7
+
+/* GPIO_FUNC49_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+.
+ */
+
+#define GPIO_FUNC49_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC49_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC49_IN_INV_SEL_V  0x1
+#define GPIO_FUNC49_IN_INV_SEL_S  6
+
+/* GPIO_FUNC49_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC49_IN_SEL    0x0000003F
+#define GPIO_FUNC49_IN_SEL_M  ((GPIO_FUNC49_IN_SEL_V)<<(GPIO_FUNC49_IN_SEL_S))
+#define GPIO_FUNC49_IN_SEL_V  0x3F
+#define GPIO_FUNC49_IN_SEL_S  0
+
+#define GPIO_FUNC50_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01f8)
+
+/* GPIO_SIG50_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG50_IN_SEL    (BIT(7))
+#define GPIO_SIG50_IN_SEL_M  (BIT(7))
+#define GPIO_SIG50_IN_SEL_V  0x1
+#define GPIO_SIG50_IN_SEL_S  7
+
+/* GPIO_FUNC50_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC50_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC50_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC50_IN_INV_SEL_V  0x1
+#define GPIO_FUNC50_IN_INV_SEL_S  6
+
+/* GPIO_FUNC50_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC50_IN_SEL    0x0000003F
+#define GPIO_FUNC50_IN_SEL_M  ((GPIO_FUNC50_IN_SEL_V)<<(GPIO_FUNC50_IN_SEL_S))
+#define GPIO_FUNC50_IN_SEL_V  0x3F
+#define GPIO_FUNC50_IN_SEL_S  0
+
+#define GPIO_FUNC51_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x01fc)
+
+/* GPIO_SIG51_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG51_IN_SEL    (BIT(7))
+#define GPIO_SIG51_IN_SEL_M  (BIT(7))
+#define GPIO_SIG51_IN_SEL_V  0x1
+#define GPIO_SIG51_IN_SEL_S  7
+
+/* GPIO_FUNC51_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+.
+ */
+
+#define GPIO_FUNC51_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC51_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC51_IN_INV_SEL_V  0x1
+#define GPIO_FUNC51_IN_INV_SEL_S  6
+
+/* GPIO_FUNC51_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC51_IN_SEL    0x0000003F
+#define GPIO_FUNC51_IN_SEL_M  ((GPIO_FUNC51_IN_SEL_V)<<(GPIO_FUNC51_IN_SEL_S))
+#define GPIO_FUNC51_IN_SEL_V  0x3F
+#define GPIO_FUNC51_IN_SEL_S  0
+
+#define GPIO_FUNC52_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0200)
+
+/* GPIO_SIG52_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG52_IN_SEL    (BIT(7))
+#define GPIO_SIG52_IN_SEL_M  (BIT(7))
+#define GPIO_SIG52_IN_SEL_V  0x1
+#define GPIO_SIG52_IN_SEL_S  7
+
+/* GPIO_FUNC52_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC52_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC52_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC52_IN_INV_SEL_V  0x1
+#define GPIO_FUNC52_IN_INV_SEL_S  6
+
+/* GPIO_FUNC52_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC52_IN_SEL    0x0000003F
+#define GPIO_FUNC52_IN_SEL_M  ((GPIO_FUNC52_IN_SEL_V)<<(GPIO_FUNC52_IN_SEL_S))
+#define GPIO_FUNC52_IN_SEL_V  0x3F
+#define GPIO_FUNC52_IN_SEL_S  0
+
+#define GPIO_FUNC53_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0204)
+
+/* GPIO_SIG53_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG53_IN_SEL    (BIT(7))
+#define GPIO_SIG53_IN_SEL_M  (BIT(7))
+#define GPIO_SIG53_IN_SEL_V  0x1
+#define GPIO_SIG53_IN_SEL_S  7
+
+/* GPIO_FUNC53_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC53_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC53_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC53_IN_INV_SEL_V  0x1
+#define GPIO_FUNC53_IN_INV_SEL_S  6
+
+/* GPIO_FUNC53_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC53_IN_SEL    0x0000003F
+#define GPIO_FUNC53_IN_SEL_M  ((GPIO_FUNC53_IN_SEL_V)<<(GPIO_FUNC53_IN_SEL_S))
+#define GPIO_FUNC53_IN_SEL_V  0x3F
+#define GPIO_FUNC53_IN_SEL_S  0
+
+#define GPIO_FUNC54_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0208)
+
+/* GPIO_SIG54_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG54_IN_SEL    (BIT(7))
+#define GPIO_SIG54_IN_SEL_M  (BIT(7))
+#define GPIO_SIG54_IN_SEL_V  0x1
+#define GPIO_SIG54_IN_SEL_S  7
+
+/* GPIO_FUNC54_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC54_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC54_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC54_IN_INV_SEL_V  0x1
+#define GPIO_FUNC54_IN_INV_SEL_S  6
+
+/* GPIO_FUNC54_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC54_IN_SEL    0x0000003F
+#define GPIO_FUNC54_IN_SEL_M  ((GPIO_FUNC54_IN_SEL_V)<<(GPIO_FUNC54_IN_SEL_S))
+#define GPIO_FUNC54_IN_SEL_V  0x3F
+#define GPIO_FUNC54_IN_SEL_S  0
+
+#define GPIO_FUNC55_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x020c)
+
+/* GPIO_SIG55_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG55_IN_SEL    (BIT(7))
+#define GPIO_SIG55_IN_SEL_M  (BIT(7))
+#define GPIO_SIG55_IN_SEL_V  0x1
+#define GPIO_SIG55_IN_SEL_S  7
+
+/* GPIO_FUNC55_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC55_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC55_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC55_IN_INV_SEL_V  0x1
+#define GPIO_FUNC55_IN_INV_SEL_S  6
+
+/* GPIO_FUNC55_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC55_IN_SEL    0x0000003F
+#define GPIO_FUNC55_IN_SEL_M  ((GPIO_FUNC55_IN_SEL_V)<<(GPIO_FUNC55_IN_SEL_S))
+#define GPIO_FUNC55_IN_SEL_V  0x3F
+#define GPIO_FUNC55_IN_SEL_S  0
+
+#define GPIO_FUNC56_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0210)
+
+/* GPIO_SIG56_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG56_IN_SEL    (BIT(7))
+#define GPIO_SIG56_IN_SEL_M  (BIT(7))
+#define GPIO_SIG56_IN_SEL_V  0x1
+#define GPIO_SIG56_IN_SEL_S  7
+
+/* GPIO_FUNC56_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC56_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC56_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC56_IN_INV_SEL_V  0x1
+#define GPIO_FUNC56_IN_INV_SEL_S  6
+
+/* GPIO_FUNC56_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC56_IN_SEL    0x0000003F
+#define GPIO_FUNC56_IN_SEL_M  ((GPIO_FUNC56_IN_SEL_V)<<(GPIO_FUNC56_IN_SEL_S))
+#define GPIO_FUNC56_IN_SEL_V  0x3F
+#define GPIO_FUNC56_IN_SEL_S  0
+
+#define GPIO_FUNC57_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0214)
+
+/* GPIO_SIG57_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG57_IN_SEL    (BIT(7))
+#define GPIO_SIG57_IN_SEL_M  (BIT(7))
+#define GPIO_SIG57_IN_SEL_V  0x1
+#define GPIO_SIG57_IN_SEL_S  7
+
+/* GPIO_FUNC57_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC57_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC57_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC57_IN_INV_SEL_V  0x1
+#define GPIO_FUNC57_IN_INV_SEL_S  6
+
+/* GPIO_FUNC57_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC57_IN_SEL    0x0000003F
+#define GPIO_FUNC57_IN_SEL_M  ((GPIO_FUNC57_IN_SEL_V)<<(GPIO_FUNC57_IN_SEL_S))
+#define GPIO_FUNC57_IN_SEL_V  0x3F
+#define GPIO_FUNC57_IN_SEL_S  0
+
+#define GPIO_FUNC58_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0218)
+
+/* GPIO_SIG58_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG58_IN_SEL    (BIT(7))
+#define GPIO_SIG58_IN_SEL_M  (BIT(7))
+#define GPIO_SIG58_IN_SEL_V  0x1
+#define GPIO_SIG58_IN_SEL_S  7
+
+/* GPIO_FUNC58_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC58_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC58_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC58_IN_INV_SEL_V  0x1
+#define GPIO_FUNC58_IN_INV_SEL_S  6
+
+/* GPIO_FUNC58_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC58_IN_SEL    0x0000003F
+#define GPIO_FUNC58_IN_SEL_M  ((GPIO_FUNC58_IN_SEL_V)<<(GPIO_FUNC58_IN_SEL_S))
+#define GPIO_FUNC58_IN_SEL_V  0x3F
+#define GPIO_FUNC58_IN_SEL_S  0
+
+#define GPIO_FUNC59_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x021c)
+
+/* GPIO_SIG59_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG59_IN_SEL    (BIT(7))
+#define GPIO_SIG59_IN_SEL_M  (BIT(7))
+#define GPIO_SIG59_IN_SEL_V  0x1
+#define GPIO_SIG59_IN_SEL_S  7
+
+/* GPIO_FUNC59_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC59_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC59_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC59_IN_INV_SEL_V  0x1
+#define GPIO_FUNC59_IN_INV_SEL_S  6
+
+/* GPIO_FUNC59_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC59_IN_SEL    0x0000003F
+#define GPIO_FUNC59_IN_SEL_M  ((GPIO_FUNC59_IN_SEL_V)<<(GPIO_FUNC59_IN_SEL_S))
+#define GPIO_FUNC59_IN_SEL_V  0x3F
+#define GPIO_FUNC59_IN_SEL_S  0
+
+#define GPIO_FUNC60_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0220)
+
+/* GPIO_SIG60_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG60_IN_SEL    (BIT(7))
+#define GPIO_SIG60_IN_SEL_M  (BIT(7))
+#define GPIO_SIG60_IN_SEL_V  0x1
+#define GPIO_SIG60_IN_SEL_S  7
+
+/* GPIO_FUNC60_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC60_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC60_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC60_IN_INV_SEL_V  0x1
+#define GPIO_FUNC60_IN_INV_SEL_S  6
+
+/* GPIO_FUNC60_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC60_IN_SEL    0x0000003F
+#define GPIO_FUNC60_IN_SEL_M  ((GPIO_FUNC60_IN_SEL_V)<<(GPIO_FUNC60_IN_SEL_S))
+#define GPIO_FUNC60_IN_SEL_V  0x3F
+#define GPIO_FUNC60_IN_SEL_S  0
+
+#define GPIO_FUNC61_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0224)
+
+/* GPIO_SIG61_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG61_IN_SEL    (BIT(7))
+#define GPIO_SIG61_IN_SEL_M  (BIT(7))
+#define GPIO_SIG61_IN_SEL_V  0x1
+#define GPIO_SIG61_IN_SEL_S  7
+
+/* GPIO_FUNC61_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC61_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC61_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC61_IN_INV_SEL_V  0x1
+#define GPIO_FUNC61_IN_INV_SEL_S  6
+
+/* GPIO_FUNC61_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC61_IN_SEL    0x0000003F
+#define GPIO_FUNC61_IN_SEL_M  ((GPIO_FUNC61_IN_SEL_V)<<(GPIO_FUNC61_IN_SEL_S))
+#define GPIO_FUNC61_IN_SEL_V  0x3F
+#define GPIO_FUNC61_IN_SEL_S  0
+
+#define GPIO_FUNC62_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0228)
+
+/* GPIO_SIG62_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG62_IN_SEL    (BIT(7))
+#define GPIO_SIG62_IN_SEL_M  (BIT(7))
+#define GPIO_SIG62_IN_SEL_V  0x1
+#define GPIO_SIG62_IN_SEL_S  7
+
+/* GPIO_FUNC62_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC62_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC62_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC62_IN_INV_SEL_V  0x1
+#define GPIO_FUNC62_IN_INV_SEL_S  6
+
+/* GPIO_FUNC62_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC62_IN_SEL    0x0000003F
+#define GPIO_FUNC62_IN_SEL_M  ((GPIO_FUNC62_IN_SEL_V)<<(GPIO_FUNC62_IN_SEL_S))
+#define GPIO_FUNC62_IN_SEL_V  0x3F
+#define GPIO_FUNC62_IN_SEL_S  0
+
+#define GPIO_FUNC63_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x022c)
+
+/* GPIO_SIG63_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG63_IN_SEL    (BIT(7))
+#define GPIO_SIG63_IN_SEL_M  (BIT(7))
+#define GPIO_SIG63_IN_SEL_V  0x1
+#define GPIO_SIG63_IN_SEL_S  7
+
+/* GPIO_FUNC63_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC63_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC63_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC63_IN_INV_SEL_V  0x1
+#define GPIO_FUNC63_IN_INV_SEL_S  6
+
+/* GPIO_FUNC63_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC63_IN_SEL    0x0000003F
+#define GPIO_FUNC63_IN_SEL_M  ((GPIO_FUNC63_IN_SEL_V)<<(GPIO_FUNC63_IN_SEL_S))
+#define GPIO_FUNC63_IN_SEL_V  0x3F
+#define GPIO_FUNC63_IN_SEL_S  0
+
+#define GPIO_FUNC64_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0230)
+
+/* GPIO_SIG64_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG64_IN_SEL    (BIT(7))
+#define GPIO_SIG64_IN_SEL_M  (BIT(7))
+#define GPIO_SIG64_IN_SEL_V  0x1
+#define GPIO_SIG64_IN_SEL_S  7
+
+/* GPIO_FUNC64_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC64_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC64_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC64_IN_INV_SEL_V  0x1
+#define GPIO_FUNC64_IN_INV_SEL_S  6
+
+/* GPIO_FUNC64_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC64_IN_SEL    0x0000003F
+#define GPIO_FUNC64_IN_SEL_M  ((GPIO_FUNC64_IN_SEL_V)<<(GPIO_FUNC64_IN_SEL_S))
+#define GPIO_FUNC64_IN_SEL_V  0x3F
+#define GPIO_FUNC64_IN_SEL_S  0
+
+#define GPIO_FUNC65_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0234)
+
+/* GPIO_SIG65_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG65_IN_SEL    (BIT(7))
+#define GPIO_SIG65_IN_SEL_M  (BIT(7))
+#define GPIO_SIG65_IN_SEL_V  0x1
+#define GPIO_SIG65_IN_SEL_S  7
+
+/* GPIO_FUNC65_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC65_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC65_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC65_IN_INV_SEL_V  0x1
+#define GPIO_FUNC65_IN_INV_SEL_S  6
+
+/* GPIO_FUNC65_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC65_IN_SEL    0x0000003F
+#define GPIO_FUNC65_IN_SEL_M  ((GPIO_FUNC65_IN_SEL_V)<<(GPIO_FUNC65_IN_SEL_S))
+#define GPIO_FUNC65_IN_SEL_V  0x3F
+#define GPIO_FUNC65_IN_SEL_S  0
+
+#define GPIO_FUNC66_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0238)
+
+/* GPIO_SIG66_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG66_IN_SEL    (BIT(7))
+#define GPIO_SIG66_IN_SEL_M  (BIT(7))
+#define GPIO_SIG66_IN_SEL_V  0x1
+#define GPIO_SIG66_IN_SEL_S  7
+
+/* GPIO_FUNC66_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC66_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC66_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC66_IN_INV_SEL_V  0x1
+#define GPIO_FUNC66_IN_INV_SEL_S  6
+
+/* GPIO_FUNC66_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC66_IN_SEL    0x0000003F
+#define GPIO_FUNC66_IN_SEL_M  ((GPIO_FUNC66_IN_SEL_V)<<(GPIO_FUNC66_IN_SEL_S))
+#define GPIO_FUNC66_IN_SEL_V  0x3F
+#define GPIO_FUNC66_IN_SEL_S  0
+
+#define GPIO_FUNC67_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x023c)
+
+/* GPIO_SIG67_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG67_IN_SEL    (BIT(7))
+#define GPIO_SIG67_IN_SEL_M  (BIT(7))
+#define GPIO_SIG67_IN_SEL_V  0x1
+#define GPIO_SIG67_IN_SEL_S  7
+
+/* GPIO_FUNC67_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC67_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC67_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC67_IN_INV_SEL_V  0x1
+#define GPIO_FUNC67_IN_INV_SEL_S  6
+
+/* GPIO_FUNC67_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC67_IN_SEL    0x0000003F
+#define GPIO_FUNC67_IN_SEL_M  ((GPIO_FUNC67_IN_SEL_V)<<(GPIO_FUNC67_IN_SEL_S))
+#define GPIO_FUNC67_IN_SEL_V  0x3F
+#define GPIO_FUNC67_IN_SEL_S  0
+
+#define GPIO_FUNC68_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0240)
+
+/* GPIO_SIG68_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG68_IN_SEL    (BIT(7))
+#define GPIO_SIG68_IN_SEL_M  (BIT(7))
+#define GPIO_SIG68_IN_SEL_V  0x1
+#define GPIO_SIG68_IN_SEL_S  7
+
+/* GPIO_FUNC68_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC68_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC68_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC68_IN_INV_SEL_V  0x1
+#define GPIO_FUNC68_IN_INV_SEL_S  6
+
+/* GPIO_FUNC68_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC68_IN_SEL    0x0000003F
+#define GPIO_FUNC68_IN_SEL_M  ((GPIO_FUNC68_IN_SEL_V)<<(GPIO_FUNC68_IN_SEL_S))
+#define GPIO_FUNC68_IN_SEL_V  0x3F
+#define GPIO_FUNC68_IN_SEL_S  0
+
+#define GPIO_FUNC69_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0244)
+
+/* GPIO_SIG69_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG69_IN_SEL    (BIT(7))
+#define GPIO_SIG69_IN_SEL_M  (BIT(7))
+#define GPIO_SIG69_IN_SEL_V  0x1
+#define GPIO_SIG69_IN_SEL_S  7
+
+/* GPIO_FUNC69_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC69_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC69_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC69_IN_INV_SEL_V  0x1
+#define GPIO_FUNC69_IN_INV_SEL_S  6
+
+/* GPIO_FUNC69_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC69_IN_SEL    0x0000003F
+#define GPIO_FUNC69_IN_SEL_M  ((GPIO_FUNC69_IN_SEL_V)<<(GPIO_FUNC69_IN_SEL_S))
+#define GPIO_FUNC69_IN_SEL_V  0x3F
+#define GPIO_FUNC69_IN_SEL_S  0
+
+#define GPIO_FUNC70_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0248)
+
+/* GPIO_SIG70_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG70_IN_SEL    (BIT(7))
+#define GPIO_SIG70_IN_SEL_M  (BIT(7))
+#define GPIO_SIG70_IN_SEL_V  0x1
+#define GPIO_SIG70_IN_SEL_S  7
+
+/* GPIO_FUNC70_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC70_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC70_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC70_IN_INV_SEL_V  0x1
+#define GPIO_FUNC70_IN_INV_SEL_S  6
+
+/* GPIO_FUNC70_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC70_IN_SEL    0x0000003F
+#define GPIO_FUNC70_IN_SEL_M  ((GPIO_FUNC70_IN_SEL_V)<<(GPIO_FUNC70_IN_SEL_S))
+#define GPIO_FUNC70_IN_SEL_V  0x3F
+#define GPIO_FUNC70_IN_SEL_S  0
+
+#define GPIO_FUNC71_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x024c)
+
+/* GPIO_SIG71_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG71_IN_SEL    (BIT(7))
+#define GPIO_SIG71_IN_SEL_M  (BIT(7))
+#define GPIO_SIG71_IN_SEL_V  0x1
+#define GPIO_SIG71_IN_SEL_S  7
+
+/* GPIO_FUNC71_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC71_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC71_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC71_IN_INV_SEL_V  0x1
+#define GPIO_FUNC71_IN_INV_SEL_S  6
+
+/* GPIO_FUNC71_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC71_IN_SEL    0x0000003F
+#define GPIO_FUNC71_IN_SEL_M  ((GPIO_FUNC71_IN_SEL_V)<<(GPIO_FUNC71_IN_SEL_S))
+#define GPIO_FUNC71_IN_SEL_V  0x3F
+#define GPIO_FUNC71_IN_SEL_S  0
+
+#define GPIO_FUNC72_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0250)
+
+/* GPIO_SIG72_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG72_IN_SEL    (BIT(7))
+#define GPIO_SIG72_IN_SEL_M  (BIT(7))
+#define GPIO_SIG72_IN_SEL_V  0x1
+#define GPIO_SIG72_IN_SEL_S  7
+
+/* GPIO_FUNC72_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC72_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC72_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC72_IN_INV_SEL_V  0x1
+#define GPIO_FUNC72_IN_INV_SEL_S  6
+
+/* GPIO_FUNC72_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC72_IN_SEL    0x0000003F
+#define GPIO_FUNC72_IN_SEL_M  ((GPIO_FUNC72_IN_SEL_V)<<(GPIO_FUNC72_IN_SEL_S))
+#define GPIO_FUNC72_IN_SEL_V  0x3F
+#define GPIO_FUNC72_IN_SEL_S  0
+
+#define GPIO_FUNC73_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0254)
+
+/* GPIO_SIG73_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG73_IN_SEL    (BIT(7))
+#define GPIO_SIG73_IN_SEL_M  (BIT(7))
+#define GPIO_SIG73_IN_SEL_V  0x1
+#define GPIO_SIG73_IN_SEL_S  7
+
+/* GPIO_FUNC73_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC73_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC73_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC73_IN_INV_SEL_V  0x1
+#define GPIO_FUNC73_IN_INV_SEL_S  6
+
+/* GPIO_FUNC73_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC73_IN_SEL    0x0000003F
+#define GPIO_FUNC73_IN_SEL_M  ((GPIO_FUNC73_IN_SEL_V)<<(GPIO_FUNC73_IN_SEL_S))
+#define GPIO_FUNC73_IN_SEL_V  0x3F
+#define GPIO_FUNC73_IN_SEL_S  0
+
+#define GPIO_FUNC74_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0258)
+
+/* GPIO_SIG74_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG74_IN_SEL    (BIT(7))
+#define GPIO_SIG74_IN_SEL_M  (BIT(7))
+#define GPIO_SIG74_IN_SEL_V  0x1
+#define GPIO_SIG74_IN_SEL_S  7
+
+/* GPIO_FUNC74_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC74_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC74_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC74_IN_INV_SEL_V  0x1
+#define GPIO_FUNC74_IN_INV_SEL_S  6
+
+/* GPIO_FUNC74_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC74_IN_SEL    0x0000003F
+#define GPIO_FUNC74_IN_SEL_M  ((GPIO_FUNC74_IN_SEL_V)<<(GPIO_FUNC74_IN_SEL_S))
+#define GPIO_FUNC74_IN_SEL_V  0x3F
+#define GPIO_FUNC74_IN_SEL_S  0
+
+#define GPIO_FUNC75_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x025c)
+
+/* GPIO_SIG75_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG75_IN_SEL    (BIT(7))
+#define GPIO_SIG75_IN_SEL_M  (BIT(7))
+#define GPIO_SIG75_IN_SEL_V  0x1
+#define GPIO_SIG75_IN_SEL_S  7
+
+/* GPIO_FUNC75_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC75_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC75_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC75_IN_INV_SEL_V  0x1
+#define GPIO_FUNC75_IN_INV_SEL_S  6
+
+/* GPIO_FUNC75_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC75_IN_SEL    0x0000003F
+#define GPIO_FUNC75_IN_SEL_M  ((GPIO_FUNC75_IN_SEL_V)<<(GPIO_FUNC75_IN_SEL_S))
+#define GPIO_FUNC75_IN_SEL_V  0x3F
+#define GPIO_FUNC75_IN_SEL_S  0
+
+#define GPIO_FUNC76_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0260)
+
+/* GPIO_SIG76_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG76_IN_SEL    (BIT(7))
+#define GPIO_SIG76_IN_SEL_M  (BIT(7))
+#define GPIO_SIG76_IN_SEL_V  0x1
+#define GPIO_SIG76_IN_SEL_S  7
+
+/* GPIO_FUNC76_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC76_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC76_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC76_IN_INV_SEL_V  0x1
+#define GPIO_FUNC76_IN_INV_SEL_S  6
+
+/* GPIO_FUNC76_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC76_IN_SEL    0x0000003F
+#define GPIO_FUNC76_IN_SEL_M  ((GPIO_FUNC76_IN_SEL_V)<<(GPIO_FUNC76_IN_SEL_S))
+#define GPIO_FUNC76_IN_SEL_V  0x3F
+#define GPIO_FUNC76_IN_SEL_S  0
+
+#define GPIO_FUNC77_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0264)
+
+/* GPIO_SIG77_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG77_IN_SEL    (BIT(7))
+#define GPIO_SIG77_IN_SEL_M  (BIT(7))
+#define GPIO_SIG77_IN_SEL_V  0x1
+#define GPIO_SIG77_IN_SEL_S  7
+
+/* GPIO_FUNC77_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC77_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC77_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC77_IN_INV_SEL_V  0x1
+#define GPIO_FUNC77_IN_INV_SEL_S  6
+
+/* GPIO_FUNC77_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC77_IN_SEL    0x0000003F
+#define GPIO_FUNC77_IN_SEL_M  ((GPIO_FUNC77_IN_SEL_V)<<(GPIO_FUNC77_IN_SEL_S))
+#define GPIO_FUNC77_IN_SEL_V  0x3F
+#define GPIO_FUNC77_IN_SEL_S  0
+
+#define GPIO_FUNC78_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0268)
+
+/* GPIO_SIG78_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG78_IN_SEL    (BIT(7))
+#define GPIO_SIG78_IN_SEL_M  (BIT(7))
+#define GPIO_SIG78_IN_SEL_V  0x1
+#define GPIO_SIG78_IN_SEL_S  7
+
+/* GPIO_FUNC78_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC78_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC78_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC78_IN_INV_SEL_V  0x1
+#define GPIO_FUNC78_IN_INV_SEL_S  6
+
+/* GPIO_FUNC78_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC78_IN_SEL    0x0000003F
+#define GPIO_FUNC78_IN_SEL_M  ((GPIO_FUNC78_IN_SEL_V)<<(GPIO_FUNC78_IN_SEL_S))
+#define GPIO_FUNC78_IN_SEL_V  0x3F
+#define GPIO_FUNC78_IN_SEL_S  0
+
+#define GPIO_FUNC79_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x026c)
+
+/* GPIO_SIG79_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG79_IN_SEL    (BIT(7))
+#define GPIO_SIG79_IN_SEL_M  (BIT(7))
+#define GPIO_SIG79_IN_SEL_V  0x1
+#define GPIO_SIG79_IN_SEL_S  7
+
+/* GPIO_FUNC79_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC79_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC79_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC79_IN_INV_SEL_V  0x1
+#define GPIO_FUNC79_IN_INV_SEL_S  6
+
+/* GPIO_FUNC79_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC79_IN_SEL    0x0000003F
+#define GPIO_FUNC79_IN_SEL_M  ((GPIO_FUNC79_IN_SEL_V)<<(GPIO_FUNC79_IN_SEL_S))
+#define GPIO_FUNC79_IN_SEL_V  0x3F
+#define GPIO_FUNC79_IN_SEL_S  0
+
+#define GPIO_FUNC80_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0270)
+
+/* GPIO_SIG80_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG80_IN_SEL    (BIT(7))
+#define GPIO_SIG80_IN_SEL_M  (BIT(7))
+#define GPIO_SIG80_IN_SEL_V  0x1
+#define GPIO_SIG80_IN_SEL_S  7
+
+/* GPIO_FUNC80_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC80_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC80_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC80_IN_INV_SEL_V  0x1
+#define GPIO_FUNC80_IN_INV_SEL_S  6
+
+/* GPIO_FUNC80_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC80_IN_SEL    0x0000003F
+#define GPIO_FUNC80_IN_SEL_M  ((GPIO_FUNC80_IN_SEL_V)<<(GPIO_FUNC80_IN_SEL_S))
+#define GPIO_FUNC80_IN_SEL_V  0x3F
+#define GPIO_FUNC80_IN_SEL_S  0
+
+#define GPIO_FUNC81_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0274)
+
+/* GPIO_SIG81_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG81_IN_SEL    (BIT(7))
+#define GPIO_SIG81_IN_SEL_M  (BIT(7))
+#define GPIO_SIG81_IN_SEL_V  0x1
+#define GPIO_SIG81_IN_SEL_S  7
+
+/* GPIO_FUNC81_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC81_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC81_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC81_IN_INV_SEL_V  0x1
+#define GPIO_FUNC81_IN_INV_SEL_S  6
+
+/* GPIO_FUNC81_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC81_IN_SEL    0x0000003F
+#define GPIO_FUNC81_IN_SEL_M  ((GPIO_FUNC81_IN_SEL_V)<<(GPIO_FUNC81_IN_SEL_S))
+#define GPIO_FUNC81_IN_SEL_V  0x3F
+#define GPIO_FUNC81_IN_SEL_S  0
+
+#define GPIO_FUNC82_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0278)
+
+/* GPIO_SIG82_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG82_IN_SEL    (BIT(7))
+#define GPIO_SIG82_IN_SEL_M  (BIT(7))
+#define GPIO_SIG82_IN_SEL_V  0x1
+#define GPIO_SIG82_IN_SEL_S  7
+
+/* GPIO_FUNC82_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC82_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC82_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC82_IN_INV_SEL_V  0x1
+#define GPIO_FUNC82_IN_INV_SEL_S  6
+
+/* GPIO_FUNC82_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC82_IN_SEL    0x0000003F
+#define GPIO_FUNC82_IN_SEL_M  ((GPIO_FUNC82_IN_SEL_V)<<(GPIO_FUNC82_IN_SEL_S))
+#define GPIO_FUNC82_IN_SEL_V  0x3F
+#define GPIO_FUNC82_IN_SEL_S  0
+
+#define GPIO_FUNC83_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x027c)
+
+/* GPIO_SIG83_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG83_IN_SEL    (BIT(7))
+#define GPIO_SIG83_IN_SEL_M  (BIT(7))
+#define GPIO_SIG83_IN_SEL_V  0x1
+#define GPIO_SIG83_IN_SEL_S  7
+
+/* GPIO_FUNC83_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC83_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC83_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC83_IN_INV_SEL_V  0x1
+#define GPIO_FUNC83_IN_INV_SEL_S  6
+
+/* GPIO_FUNC83_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC83_IN_SEL    0x0000003F
+#define GPIO_FUNC83_IN_SEL_M  ((GPIO_FUNC83_IN_SEL_V)<<(GPIO_FUNC83_IN_SEL_S))
+#define GPIO_FUNC83_IN_SEL_V  0x3F
+#define GPIO_FUNC83_IN_SEL_S  0
+
+#define GPIO_FUNC84_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0280)
+
+/* GPIO_SIG84_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG84_IN_SEL    (BIT(7))
+#define GPIO_SIG84_IN_SEL_M  (BIT(7))
+#define GPIO_SIG84_IN_SEL_V  0x1
+#define GPIO_SIG84_IN_SEL_S  7
+
+/* GPIO_FUNC84_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC84_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC84_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC84_IN_INV_SEL_V  0x1
+#define GPIO_FUNC84_IN_INV_SEL_S  6
+
+/* GPIO_FUNC84_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC84_IN_SEL    0x0000003F
+#define GPIO_FUNC84_IN_SEL_M  ((GPIO_FUNC84_IN_SEL_V)<<(GPIO_FUNC84_IN_SEL_S))
+#define GPIO_FUNC84_IN_SEL_V  0x3F
+#define GPIO_FUNC84_IN_SEL_S  0
+
+#define GPIO_FUNC85_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0284)
+
+/* GPIO_SIG85_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG85_IN_SEL    (BIT(7))
+#define GPIO_SIG85_IN_SEL_M  (BIT(7))
+#define GPIO_SIG85_IN_SEL_V  0x1
+#define GPIO_SIG85_IN_SEL_S  7
+
+/* GPIO_FUNC85_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC85_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC85_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC85_IN_INV_SEL_V  0x1
+#define GPIO_FUNC85_IN_INV_SEL_S  6
+
+/* GPIO_FUNC85_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC85_IN_SEL    0x0000003F
+#define GPIO_FUNC85_IN_SEL_M  ((GPIO_FUNC85_IN_SEL_V)<<(GPIO_FUNC85_IN_SEL_S))
+#define GPIO_FUNC85_IN_SEL_V  0x3F
+#define GPIO_FUNC85_IN_SEL_S  0
+
+#define GPIO_FUNC86_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0288)
+
+/* GPIO_SIG86_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG86_IN_SEL    (BIT(7))
+#define GPIO_SIG86_IN_SEL_M  (BIT(7))
+#define GPIO_SIG86_IN_SEL_V  0x1
+#define GPIO_SIG86_IN_SEL_S  7
+
+/* GPIO_FUNC86_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC86_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC86_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC86_IN_INV_SEL_V  0x1
+#define GPIO_FUNC86_IN_INV_SEL_S  6
+
+/* GPIO_FUNC86_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC86_IN_SEL    0x0000003F
+#define GPIO_FUNC86_IN_SEL_M  ((GPIO_FUNC86_IN_SEL_V)<<(GPIO_FUNC86_IN_SEL_S))
+#define GPIO_FUNC86_IN_SEL_V  0x3F
+#define GPIO_FUNC86_IN_SEL_S  0
+
+#define GPIO_FUNC87_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x028c)
+
+/* GPIO_SIG87_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG87_IN_SEL    (BIT(7))
+#define GPIO_SIG87_IN_SEL_M  (BIT(7))
+#define GPIO_SIG87_IN_SEL_V  0x1
+#define GPIO_SIG87_IN_SEL_S  7
+
+/* GPIO_FUNC87_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC87_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC87_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC87_IN_INV_SEL_V  0x1
+#define GPIO_FUNC87_IN_INV_SEL_S  6
+
+/* GPIO_FUNC87_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC87_IN_SEL    0x0000003F
+#define GPIO_FUNC87_IN_SEL_M  ((GPIO_FUNC87_IN_SEL_V)<<(GPIO_FUNC87_IN_SEL_S))
+#define GPIO_FUNC87_IN_SEL_V  0x3F
+#define GPIO_FUNC87_IN_SEL_S  0
+
+#define GPIO_FUNC88_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0290)
+
+/* GPIO_SIG88_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG88_IN_SEL    (BIT(7))
+#define GPIO_SIG88_IN_SEL_M  (BIT(7))
+#define GPIO_SIG88_IN_SEL_V  0x1
+#define GPIO_SIG88_IN_SEL_S  7
+
+/* GPIO_FUNC88_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC88_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC88_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC88_IN_INV_SEL_V  0x1
+#define GPIO_FUNC88_IN_INV_SEL_S  6
+
+/* GPIO_FUNC88_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC88_IN_SEL    0x0000003F
+#define GPIO_FUNC88_IN_SEL_M  ((GPIO_FUNC88_IN_SEL_V)<<(GPIO_FUNC88_IN_SEL_S))
+#define GPIO_FUNC88_IN_SEL_V  0x3F
+#define GPIO_FUNC88_IN_SEL_S  0
+
+#define GPIO_FUNC89_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0294)
+
+/* GPIO_SIG89_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG89_IN_SEL    (BIT(7))
+#define GPIO_SIG89_IN_SEL_M  (BIT(7))
+#define GPIO_SIG89_IN_SEL_V  0x1
+#define GPIO_SIG89_IN_SEL_S  7
+
+/* GPIO_FUNC89_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC89_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC89_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC89_IN_INV_SEL_V  0x1
+#define GPIO_FUNC89_IN_INV_SEL_S  6
+
+/* GPIO_FUNC89_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC89_IN_SEL    0x0000003F
+#define GPIO_FUNC89_IN_SEL_M  ((GPIO_FUNC89_IN_SEL_V)<<(GPIO_FUNC89_IN_SEL_S))
+#define GPIO_FUNC89_IN_SEL_V  0x3F
+#define GPIO_FUNC89_IN_SEL_S  0
+
+#define GPIO_FUNC90_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0298)
+
+/* GPIO_SIG90_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG90_IN_SEL    (BIT(7))
+#define GPIO_SIG90_IN_SEL_M  (BIT(7))
+#define GPIO_SIG90_IN_SEL_V  0x1
+#define GPIO_SIG90_IN_SEL_S  7
+
+/* GPIO_FUNC90_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC90_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC90_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC90_IN_INV_SEL_V  0x1
+#define GPIO_FUNC90_IN_INV_SEL_S  6
+
+/* GPIO_FUNC90_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC90_IN_SEL    0x0000003F
+#define GPIO_FUNC90_IN_SEL_M  ((GPIO_FUNC90_IN_SEL_V)<<(GPIO_FUNC90_IN_SEL_S))
+#define GPIO_FUNC90_IN_SEL_V  0x3F
+#define GPIO_FUNC90_IN_SEL_S  0
+
+#define GPIO_FUNC91_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x029c)
+
+/* GPIO_SIG91_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG91_IN_SEL    (BIT(7))
+#define GPIO_SIG91_IN_SEL_M  (BIT(7))
+#define GPIO_SIG91_IN_SEL_V  0x1
+#define GPIO_SIG91_IN_SEL_S  7
+
+/* GPIO_FUNC91_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC91_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC91_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC91_IN_INV_SEL_V  0x1
+#define GPIO_FUNC91_IN_INV_SEL_S  6
+
+/* GPIO_FUNC91_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC91_IN_SEL    0x0000003F
+#define GPIO_FUNC91_IN_SEL_M  ((GPIO_FUNC91_IN_SEL_V)<<(GPIO_FUNC91_IN_SEL_S))
+#define GPIO_FUNC91_IN_SEL_V  0x3F
+#define GPIO_FUNC91_IN_SEL_S  0
+
+#define GPIO_FUNC92_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02a0)
+
+/* GPIO_SIG92_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG92_IN_SEL    (BIT(7))
+#define GPIO_SIG92_IN_SEL_M  (BIT(7))
+#define GPIO_SIG92_IN_SEL_V  0x1
+#define GPIO_SIG92_IN_SEL_S  7
+
+/* GPIO_FUNC92_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC92_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC92_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC92_IN_INV_SEL_V  0x1
+#define GPIO_FUNC92_IN_INV_SEL_S  6
+
+/* GPIO_FUNC92_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC92_IN_SEL    0x0000003F
+#define GPIO_FUNC92_IN_SEL_M  ((GPIO_FUNC92_IN_SEL_V)<<(GPIO_FUNC92_IN_SEL_S))
+#define GPIO_FUNC92_IN_SEL_V  0x3F
+#define GPIO_FUNC92_IN_SEL_S  0
+
+#define GPIO_FUNC93_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02a4)
+
+/* GPIO_SIG93_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG93_IN_SEL    (BIT(7))
+#define GPIO_SIG93_IN_SEL_M  (BIT(7))
+#define GPIO_SIG93_IN_SEL_V  0x1
+#define GPIO_SIG93_IN_SEL_S  7
+
+/* GPIO_FUNC93_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC93_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC93_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC93_IN_INV_SEL_V  0x1
+#define GPIO_FUNC93_IN_INV_SEL_S  6
+
+/* GPIO_FUNC93_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC93_IN_SEL    0x0000003F
+#define GPIO_FUNC93_IN_SEL_M  ((GPIO_FUNC93_IN_SEL_V)<<(GPIO_FUNC93_IN_SEL_S))
+#define GPIO_FUNC93_IN_SEL_V  0x3F
+#define GPIO_FUNC93_IN_SEL_S  0
+
+#define GPIO_FUNC94_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02a8)
+
+/* GPIO_SIG94_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG94_IN_SEL    (BIT(7))
+#define GPIO_SIG94_IN_SEL_M  (BIT(7))
+#define GPIO_SIG94_IN_SEL_V  0x1
+#define GPIO_SIG94_IN_SEL_S  7
+
+/* GPIO_FUNC94_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC94_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC94_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC94_IN_INV_SEL_V  0x1
+#define GPIO_FUNC94_IN_INV_SEL_S  6
+
+/* GPIO_FUNC94_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC94_IN_SEL    0x0000003F
+#define GPIO_FUNC94_IN_SEL_M  ((GPIO_FUNC94_IN_SEL_V)<<(GPIO_FUNC94_IN_SEL_S))
+#define GPIO_FUNC94_IN_SEL_V  0x3F
+#define GPIO_FUNC94_IN_SEL_S  0
+
+#define GPIO_FUNC95_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02ac)
+
+/* GPIO_SIG95_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG95_IN_SEL    (BIT(7))
+#define GPIO_SIG95_IN_SEL_M  (BIT(7))
+#define GPIO_SIG95_IN_SEL_V  0x1
+#define GPIO_SIG95_IN_SEL_S  7
+
+/* GPIO_FUNC95_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC95_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC95_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC95_IN_INV_SEL_V  0x1
+#define GPIO_FUNC95_IN_INV_SEL_S  6
+
+/* GPIO_FUNC95_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC95_IN_SEL    0x0000003F
+#define GPIO_FUNC95_IN_SEL_M  ((GPIO_FUNC95_IN_SEL_V)<<(GPIO_FUNC95_IN_SEL_S))
+#define GPIO_FUNC95_IN_SEL_V  0x3F
+#define GPIO_FUNC95_IN_SEL_S  0
+
+#define GPIO_FUNC96_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02b0)
+
+/* GPIO_SIG96_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG96_IN_SEL    (BIT(7))
+#define GPIO_SIG96_IN_SEL_M  (BIT(7))
+#define GPIO_SIG96_IN_SEL_V  0x1
+#define GPIO_SIG96_IN_SEL_S  7
+
+/* GPIO_FUNC96_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC96_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC96_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC96_IN_INV_SEL_V  0x1
+#define GPIO_FUNC96_IN_INV_SEL_S  6
+
+/* GPIO_FUNC96_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC96_IN_SEL    0x0000003F
+#define GPIO_FUNC96_IN_SEL_M  ((GPIO_FUNC96_IN_SEL_V)<<(GPIO_FUNC96_IN_SEL_S))
+#define GPIO_FUNC96_IN_SEL_V  0x3F
+#define GPIO_FUNC96_IN_SEL_S  0
+
+#define GPIO_FUNC97_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02b4)
+
+/* GPIO_SIG97_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG97_IN_SEL    (BIT(7))
+#define GPIO_SIG97_IN_SEL_M  (BIT(7))
+#define GPIO_SIG97_IN_SEL_V  0x1
+#define GPIO_SIG97_IN_SEL_S  7
+
+/* GPIO_FUNC97_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC97_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC97_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC97_IN_INV_SEL_V  0x1
+#define GPIO_FUNC97_IN_INV_SEL_S  6
+
+/* GPIO_FUNC97_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC97_IN_SEL    0x0000003F
+#define GPIO_FUNC97_IN_SEL_M  ((GPIO_FUNC97_IN_SEL_V)<<(GPIO_FUNC97_IN_SEL_S))
+#define GPIO_FUNC97_IN_SEL_V  0x3F
+#define GPIO_FUNC97_IN_SEL_S  0
+
+#define GPIO_FUNC98_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02b8)
+
+/* GPIO_SIG98_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG98_IN_SEL    (BIT(7))
+#define GPIO_SIG98_IN_SEL_M  (BIT(7))
+#define GPIO_SIG98_IN_SEL_V  0x1
+#define GPIO_SIG98_IN_SEL_S  7
+
+/* GPIO_FUNC98_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC98_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC98_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC98_IN_INV_SEL_V  0x1
+#define GPIO_FUNC98_IN_INV_SEL_S  6
+
+/* GPIO_FUNC98_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC98_IN_SEL    0x0000003F
+#define GPIO_FUNC98_IN_SEL_M  ((GPIO_FUNC98_IN_SEL_V)<<(GPIO_FUNC98_IN_SEL_S))
+#define GPIO_FUNC98_IN_SEL_V  0x3F
+#define GPIO_FUNC98_IN_SEL_S  0
+
+#define GPIO_FUNC99_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02bc)
+
+/* GPIO_SIG99_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG99_IN_SEL    (BIT(7))
+#define GPIO_SIG99_IN_SEL_M  (BIT(7))
+#define GPIO_SIG99_IN_SEL_V  0x1
+#define GPIO_SIG99_IN_SEL_S  7
+
+/* GPIO_FUNC99_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC99_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC99_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC99_IN_INV_SEL_V  0x1
+#define GPIO_FUNC99_IN_INV_SEL_S  6
+
+/* GPIO_FUNC99_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC99_IN_SEL    0x0000003F
+#define GPIO_FUNC99_IN_SEL_M  ((GPIO_FUNC99_IN_SEL_V)<<(GPIO_FUNC99_IN_SEL_S))
+#define GPIO_FUNC99_IN_SEL_V  0x3F
+#define GPIO_FUNC99_IN_SEL_S  0
+
+#define GPIO_FUNC100_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02c0)
+
+/* GPIO_SIG100_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG100_IN_SEL    (BIT(7))
+#define GPIO_SIG100_IN_SEL_M  (BIT(7))
+#define GPIO_SIG100_IN_SEL_V  0x1
+#define GPIO_SIG100_IN_SEL_S  7
+
+/* GPIO_FUNC100_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC100_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC100_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC100_IN_INV_SEL_V  0x1
+#define GPIO_FUNC100_IN_INV_SEL_S  6
+
+/* GPIO_FUNC100_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC100_IN_SEL    0x0000003F
+#define GPIO_FUNC100_IN_SEL_M  ((GPIO_FUNC100_IN_SEL_V)<<(GPIO_FUNC100_IN_SEL_S))
+#define GPIO_FUNC100_IN_SEL_V  0x3F
+#define GPIO_FUNC100_IN_SEL_S  0
+
+#define GPIO_FUNC101_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02c4)
+
+/* GPIO_SIG101_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG101_IN_SEL    (BIT(7))
+#define GPIO_SIG101_IN_SEL_M  (BIT(7))
+#define GPIO_SIG101_IN_SEL_V  0x1
+#define GPIO_SIG101_IN_SEL_S  7
+
+/* GPIO_FUNC101_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC101_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC101_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC101_IN_INV_SEL_V  0x1
+#define GPIO_FUNC101_IN_INV_SEL_S  6
+
+/* GPIO_FUNC101_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC101_IN_SEL    0x0000003F
+#define GPIO_FUNC101_IN_SEL_M  ((GPIO_FUNC101_IN_SEL_V)<<(GPIO_FUNC101_IN_SEL_S))
+#define GPIO_FUNC101_IN_SEL_V  0x3F
+#define GPIO_FUNC101_IN_SEL_S  0
+
+#define GPIO_FUNC102_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02c8)
+
+/* GPIO_SIG102_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG102_IN_SEL    (BIT(7))
+#define GPIO_SIG102_IN_SEL_M  (BIT(7))
+#define GPIO_SIG102_IN_SEL_V  0x1
+#define GPIO_SIG102_IN_SEL_S  7
+
+/* GPIO_FUNC102_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC102_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC102_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC102_IN_INV_SEL_V  0x1
+#define GPIO_FUNC102_IN_INV_SEL_S  6
+
+/* GPIO_FUNC102_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC102_IN_SEL    0x0000003F
+#define GPIO_FUNC102_IN_SEL_M  ((GPIO_FUNC102_IN_SEL_V)<<(GPIO_FUNC102_IN_SEL_S))
+#define GPIO_FUNC102_IN_SEL_V  0x3F
+#define GPIO_FUNC102_IN_SEL_S  0
+
+#define GPIO_FUNC103_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02cc)
+
+/* GPIO_SIG103_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG103_IN_SEL    (BIT(7))
+#define GPIO_SIG103_IN_SEL_M  (BIT(7))
+#define GPIO_SIG103_IN_SEL_V  0x1
+#define GPIO_SIG103_IN_SEL_S  7
+
+/* GPIO_FUNC103_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC103_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC103_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC103_IN_INV_SEL_V  0x1
+#define GPIO_FUNC103_IN_INV_SEL_S  6
+
+/* GPIO_FUNC103_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC103_IN_SEL    0x0000003F
+#define GPIO_FUNC103_IN_SEL_M  ((GPIO_FUNC103_IN_SEL_V)<<(GPIO_FUNC103_IN_SEL_S))
+#define GPIO_FUNC103_IN_SEL_V  0x3F
+#define GPIO_FUNC103_IN_SEL_S  0
+
+#define GPIO_FUNC104_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02d0)
+
+/* GPIO_SIG104_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG104_IN_SEL    (BIT(7))
+#define GPIO_SIG104_IN_SEL_M  (BIT(7))
+#define GPIO_SIG104_IN_SEL_V  0x1
+#define GPIO_SIG104_IN_SEL_S  7
+
+/* GPIO_FUNC104_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC104_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC104_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC104_IN_INV_SEL_V  0x1
+#define GPIO_FUNC104_IN_INV_SEL_S  6
+
+/* GPIO_FUNC104_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC104_IN_SEL    0x0000003F
+#define GPIO_FUNC104_IN_SEL_M  ((GPIO_FUNC104_IN_SEL_V)<<(GPIO_FUNC104_IN_SEL_S))
+#define GPIO_FUNC104_IN_SEL_V  0x3F
+#define GPIO_FUNC104_IN_SEL_S  0
+
+#define GPIO_FUNC105_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02d4)
+
+/* GPIO_SIG105_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG105_IN_SEL    (BIT(7))
+#define GPIO_SIG105_IN_SEL_M  (BIT(7))
+#define GPIO_SIG105_IN_SEL_V  0x1
+#define GPIO_SIG105_IN_SEL_S  7
+
+/* GPIO_FUNC105_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC105_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC105_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC105_IN_INV_SEL_V  0x1
+#define GPIO_FUNC105_IN_INV_SEL_S  6
+
+/* GPIO_FUNC105_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC105_IN_SEL    0x0000003F
+#define GPIO_FUNC105_IN_SEL_M  ((GPIO_FUNC105_IN_SEL_V)<<(GPIO_FUNC105_IN_SEL_S))
+#define GPIO_FUNC105_IN_SEL_V  0x3F
+#define GPIO_FUNC105_IN_SEL_S  0
+
+#define GPIO_FUNC106_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02d8)
+
+/* GPIO_SIG106_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG106_IN_SEL    (BIT(7))
+#define GPIO_SIG106_IN_SEL_M  (BIT(7))
+#define GPIO_SIG106_IN_SEL_V  0x1
+#define GPIO_SIG106_IN_SEL_S  7
+
+/* GPIO_FUNC106_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC106_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC106_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC106_IN_INV_SEL_V  0x1
+#define GPIO_FUNC106_IN_INV_SEL_S  6
+
+/* GPIO_FUNC106_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC106_IN_SEL    0x0000003F
+#define GPIO_FUNC106_IN_SEL_M  ((GPIO_FUNC106_IN_SEL_V)<<(GPIO_FUNC106_IN_SEL_S))
+#define GPIO_FUNC106_IN_SEL_V  0x3F
+#define GPIO_FUNC106_IN_SEL_S  0
+
+#define GPIO_FUNC107_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02dc)
+
+/* GPIO_SIG107_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG107_IN_SEL    (BIT(7))
+#define GPIO_SIG107_IN_SEL_M  (BIT(7))
+#define GPIO_SIG107_IN_SEL_V  0x1
+#define GPIO_SIG107_IN_SEL_S  7
+
+/* GPIO_FUNC107_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC107_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC107_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC107_IN_INV_SEL_V  0x1
+#define GPIO_FUNC107_IN_INV_SEL_S  6
+
+/* GPIO_FUNC107_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC107_IN_SEL    0x0000003F
+#define GPIO_FUNC107_IN_SEL_M  ((GPIO_FUNC107_IN_SEL_V)<<(GPIO_FUNC107_IN_SEL_S))
+#define GPIO_FUNC107_IN_SEL_V  0x3F
+#define GPIO_FUNC107_IN_SEL_S  0
+
+#define GPIO_FUNC108_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02e0)
+
+/* GPIO_SIG108_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG108_IN_SEL    (BIT(7))
+#define GPIO_SIG108_IN_SEL_M  (BIT(7))
+#define GPIO_SIG108_IN_SEL_V  0x1
+#define GPIO_SIG108_IN_SEL_S  7
+
+/* GPIO_FUNC108_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC108_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC108_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC108_IN_INV_SEL_V  0x1
+#define GPIO_FUNC108_IN_INV_SEL_S  6
+
+/* GPIO_FUNC108_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC108_IN_SEL    0x0000003F
+#define GPIO_FUNC108_IN_SEL_M  ((GPIO_FUNC108_IN_SEL_V)<<(GPIO_FUNC108_IN_SEL_S))
+#define GPIO_FUNC108_IN_SEL_V  0x3F
+#define GPIO_FUNC108_IN_SEL_S  0
+
+#define GPIO_FUNC109_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02e4)
+
+/* GPIO_SIG109_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG109_IN_SEL    (BIT(7))
+#define GPIO_SIG109_IN_SEL_M  (BIT(7))
+#define GPIO_SIG109_IN_SEL_V  0x1
+#define GPIO_SIG109_IN_SEL_S  7
+
+/* GPIO_FUNC109_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC109_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC109_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC109_IN_INV_SEL_V  0x1
+#define GPIO_FUNC109_IN_INV_SEL_S  6
+
+/* GPIO_FUNC109_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC109_IN_SEL    0x0000003F
+#define GPIO_FUNC109_IN_SEL_M  ((GPIO_FUNC109_IN_SEL_V)<<(GPIO_FUNC109_IN_SEL_S))
+#define GPIO_FUNC109_IN_SEL_V  0x3F
+#define GPIO_FUNC109_IN_SEL_S  0
+
+#define GPIO_FUNC110_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02e8)
+
+/* GPIO_SIG110_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG110_IN_SEL    (BIT(7))
+#define GPIO_SIG110_IN_SEL_M  (BIT(7))
+#define GPIO_SIG110_IN_SEL_V  0x1
+#define GPIO_SIG110_IN_SEL_S  7
+
+/* GPIO_FUNC110_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC110_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC110_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC110_IN_INV_SEL_V  0x1
+#define GPIO_FUNC110_IN_INV_SEL_S  6
+
+/* GPIO_FUNC110_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC110_IN_SEL    0x0000003F
+#define GPIO_FUNC110_IN_SEL_M  ((GPIO_FUNC110_IN_SEL_V)<<(GPIO_FUNC110_IN_SEL_S))
+#define GPIO_FUNC110_IN_SEL_V  0x3F
+#define GPIO_FUNC110_IN_SEL_S  0
+
+#define GPIO_FUNC111_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02ec)
+
+/* GPIO_SIG111_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG111_IN_SEL    (BIT(7))
+#define GPIO_SIG111_IN_SEL_M  (BIT(7))
+#define GPIO_SIG111_IN_SEL_V  0x1
+#define GPIO_SIG111_IN_SEL_S  7
+
+/* GPIO_FUNC111_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC111_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC111_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC111_IN_INV_SEL_V  0x1
+#define GPIO_FUNC111_IN_INV_SEL_S  6
+
+/* GPIO_FUNC111_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC111_IN_SEL    0x0000003F
+#define GPIO_FUNC111_IN_SEL_M  ((GPIO_FUNC111_IN_SEL_V)<<(GPIO_FUNC111_IN_SEL_S))
+#define GPIO_FUNC111_IN_SEL_V  0x3F
+#define GPIO_FUNC111_IN_SEL_S  0
+
+#define GPIO_FUNC112_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02f0)
+
+/* GPIO_SIG112_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG112_IN_SEL    (BIT(7))
+#define GPIO_SIG112_IN_SEL_M  (BIT(7))
+#define GPIO_SIG112_IN_SEL_V  0x1
+#define GPIO_SIG112_IN_SEL_S  7
+
+/* GPIO_FUNC112_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC112_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC112_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC112_IN_INV_SEL_V  0x1
+#define GPIO_FUNC112_IN_INV_SEL_S  6
+
+/* GPIO_FUNC112_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC112_IN_SEL    0x0000003F
+#define GPIO_FUNC112_IN_SEL_M  ((GPIO_FUNC112_IN_SEL_V)<<(GPIO_FUNC112_IN_SEL_S))
+#define GPIO_FUNC112_IN_SEL_V  0x3F
+#define GPIO_FUNC112_IN_SEL_S  0
+
+#define GPIO_FUNC113_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02f4)
+
+/* GPIO_SIG113_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG113_IN_SEL    (BIT(7))
+#define GPIO_SIG113_IN_SEL_M  (BIT(7))
+#define GPIO_SIG113_IN_SEL_V  0x1
+#define GPIO_SIG113_IN_SEL_S  7
+
+/* GPIO_FUNC113_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC113_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC113_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC113_IN_INV_SEL_V  0x1
+#define GPIO_FUNC113_IN_INV_SEL_S  6
+
+/* GPIO_FUNC113_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC113_IN_SEL    0x0000003F
+#define GPIO_FUNC113_IN_SEL_M  ((GPIO_FUNC113_IN_SEL_V)<<(GPIO_FUNC113_IN_SEL_S))
+#define GPIO_FUNC113_IN_SEL_V  0x3F
+#define GPIO_FUNC113_IN_SEL_S  0
+
+#define GPIO_FUNC114_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02f8)
+
+/* GPIO_SIG114_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG114_IN_SEL    (BIT(7))
+#define GPIO_SIG114_IN_SEL_M  (BIT(7))
+#define GPIO_SIG114_IN_SEL_V  0x1
+#define GPIO_SIG114_IN_SEL_S  7
+
+/* GPIO_FUNC114_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC114_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC114_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC114_IN_INV_SEL_V  0x1
+#define GPIO_FUNC114_IN_INV_SEL_S  6
+
+/* GPIO_FUNC114_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC114_IN_SEL    0x0000003F
+#define GPIO_FUNC114_IN_SEL_M  ((GPIO_FUNC114_IN_SEL_V)<<(GPIO_FUNC114_IN_SEL_S))
+#define GPIO_FUNC114_IN_SEL_V  0x3F
+#define GPIO_FUNC114_IN_SEL_S  0
+
+#define GPIO_FUNC115_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x02fc)
+
+/* GPIO_SIG115_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG115_IN_SEL    (BIT(7))
+#define GPIO_SIG115_IN_SEL_M  (BIT(7))
+#define GPIO_SIG115_IN_SEL_V  0x1
+#define GPIO_SIG115_IN_SEL_S  7
+
+/* GPIO_FUNC115_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC115_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC115_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC115_IN_INV_SEL_V  0x1
+#define GPIO_FUNC115_IN_INV_SEL_S  6
+
+/* GPIO_FUNC115_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC115_IN_SEL    0x0000003F
+#define GPIO_FUNC115_IN_SEL_M  ((GPIO_FUNC115_IN_SEL_V)<<(GPIO_FUNC115_IN_SEL_S))
+#define GPIO_FUNC115_IN_SEL_V  0x3F
+#define GPIO_FUNC115_IN_SEL_S  0
+
+#define GPIO_FUNC116_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0300)
+
+/* GPIO_SIG116_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG116_IN_SEL    (BIT(7))
+#define GPIO_SIG116_IN_SEL_M  (BIT(7))
+#define GPIO_SIG116_IN_SEL_V  0x1
+#define GPIO_SIG116_IN_SEL_S  7
+
+/* GPIO_FUNC116_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC116_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC116_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC116_IN_INV_SEL_V  0x1
+#define GPIO_FUNC116_IN_INV_SEL_S  6
+
+/* GPIO_FUNC116_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC116_IN_SEL    0x0000003F
+#define GPIO_FUNC116_IN_SEL_M  ((GPIO_FUNC116_IN_SEL_V)<<(GPIO_FUNC116_IN_SEL_S))
+#define GPIO_FUNC116_IN_SEL_V  0x3F
+#define GPIO_FUNC116_IN_SEL_S  0
+
+#define GPIO_FUNC117_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0304)
+
+/* GPIO_SIG117_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG117_IN_SEL    (BIT(7))
+#define GPIO_SIG117_IN_SEL_M  (BIT(7))
+#define GPIO_SIG117_IN_SEL_V  0x1
+#define GPIO_SIG117_IN_SEL_S  7
+
+/* GPIO_FUNC117_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC117_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC117_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC117_IN_INV_SEL_V  0x1
+#define GPIO_FUNC117_IN_INV_SEL_S  6
+
+/* GPIO_FUNC117_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC117_IN_SEL    0x0000003F
+#define GPIO_FUNC117_IN_SEL_M  ((GPIO_FUNC117_IN_SEL_V)<<(GPIO_FUNC117_IN_SEL_S))
+#define GPIO_FUNC117_IN_SEL_V  0x3F
+#define GPIO_FUNC117_IN_SEL_S  0
+
+#define GPIO_FUNC118_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0308)
+
+/* GPIO_SIG118_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG118_IN_SEL    (BIT(7))
+#define GPIO_SIG118_IN_SEL_M  (BIT(7))
+#define GPIO_SIG118_IN_SEL_V  0x1
+#define GPIO_SIG118_IN_SEL_S  7
+
+/* GPIO_FUNC118_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC118_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC118_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC118_IN_INV_SEL_V  0x1
+#define GPIO_FUNC118_IN_INV_SEL_S  6
+
+/* GPIO_FUNC118_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC118_IN_SEL    0x0000003F
+#define GPIO_FUNC118_IN_SEL_M  ((GPIO_FUNC118_IN_SEL_V)<<(GPIO_FUNC118_IN_SEL_S))
+#define GPIO_FUNC118_IN_SEL_V  0x3F
+#define GPIO_FUNC118_IN_SEL_S  0
+
+#define GPIO_FUNC119_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x030c)
+
+/* GPIO_SIG119_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG119_IN_SEL    (BIT(7))
+#define GPIO_SIG119_IN_SEL_M  (BIT(7))
+#define GPIO_SIG119_IN_SEL_V  0x1
+#define GPIO_SIG119_IN_SEL_S  7
+
+/* GPIO_FUNC119_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC119_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC119_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC119_IN_INV_SEL_V  0x1
+#define GPIO_FUNC119_IN_INV_SEL_S  6
+
+/* GPIO_FUNC119_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC119_IN_SEL    0x0000003F
+#define GPIO_FUNC119_IN_SEL_M  ((GPIO_FUNC119_IN_SEL_V)<<(GPIO_FUNC119_IN_SEL_S))
+#define GPIO_FUNC119_IN_SEL_V  0x3F
+#define GPIO_FUNC119_IN_SEL_S  0
+
+#define GPIO_FUNC120_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0310)
+
+/* GPIO_SIG120_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG120_IN_SEL    (BIT(7))
+#define GPIO_SIG120_IN_SEL_M  (BIT(7))
+#define GPIO_SIG120_IN_SEL_V  0x1
+#define GPIO_SIG120_IN_SEL_S  7
+
+/* GPIO_FUNC120_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC120_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC120_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC120_IN_INV_SEL_V  0x1
+#define GPIO_FUNC120_IN_INV_SEL_S  6
+
+/* GPIO_FUNC120_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC120_IN_SEL    0x0000003F
+#define GPIO_FUNC120_IN_SEL_M  ((GPIO_FUNC120_IN_SEL_V)<<(GPIO_FUNC120_IN_SEL_S))
+#define GPIO_FUNC120_IN_SEL_V  0x3F
+#define GPIO_FUNC120_IN_SEL_S  0
+
+#define GPIO_FUNC121_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0314)
+
+/* GPIO_SIG121_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG121_IN_SEL    (BIT(7))
+#define GPIO_SIG121_IN_SEL_M  (BIT(7))
+#define GPIO_SIG121_IN_SEL_V  0x1
+#define GPIO_SIG121_IN_SEL_S  7
+
+/* GPIO_FUNC121_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC121_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC121_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC121_IN_INV_SEL_V  0x1
+#define GPIO_FUNC121_IN_INV_SEL_S  6
+
+/* GPIO_FUNC121_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC121_IN_SEL    0x0000003F
+#define GPIO_FUNC121_IN_SEL_M  ((GPIO_FUNC121_IN_SEL_V)<<(GPIO_FUNC121_IN_SEL_S))
+#define GPIO_FUNC121_IN_SEL_V  0x3F
+#define GPIO_FUNC121_IN_SEL_S  0
+
+#define GPIO_FUNC122_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0318)
+
+/* GPIO_SIG122_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG122_IN_SEL    (BIT(7))
+#define GPIO_SIG122_IN_SEL_M  (BIT(7))
+#define GPIO_SIG122_IN_SEL_V  0x1
+#define GPIO_SIG122_IN_SEL_S  7
+
+/* GPIO_FUNC122_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC122_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC122_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC122_IN_INV_SEL_V  0x1
+#define GPIO_FUNC122_IN_INV_SEL_S  6
+
+/* GPIO_FUNC122_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC122_IN_SEL    0x0000003F
+#define GPIO_FUNC122_IN_SEL_M  ((GPIO_FUNC122_IN_SEL_V)<<(GPIO_FUNC122_IN_SEL_S))
+#define GPIO_FUNC122_IN_SEL_V  0x3F
+#define GPIO_FUNC122_IN_SEL_S  0
+
+#define GPIO_FUNC123_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x031c)
+
+/* GPIO_SIG123_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG123_IN_SEL    (BIT(7))
+#define GPIO_SIG123_IN_SEL_M  (BIT(7))
+#define GPIO_SIG123_IN_SEL_V  0x1
+#define GPIO_SIG123_IN_SEL_S  7
+
+/* GPIO_FUNC123_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC123_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC123_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC123_IN_INV_SEL_V  0x1
+#define GPIO_FUNC123_IN_INV_SEL_S  6
+
+/* GPIO_FUNC123_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC123_IN_SEL    0x0000003F
+#define GPIO_FUNC123_IN_SEL_M  ((GPIO_FUNC123_IN_SEL_V)<<(GPIO_FUNC123_IN_SEL_S))
+#define GPIO_FUNC123_IN_SEL_V  0x3F
+#define GPIO_FUNC123_IN_SEL_S  0
+
+#define GPIO_FUNC124_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0320)
+
+/* GPIO_SIG124_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG124_IN_SEL    (BIT(7))
+#define GPIO_SIG124_IN_SEL_M  (BIT(7))
+#define GPIO_SIG124_IN_SEL_V  0x1
+#define GPIO_SIG124_IN_SEL_S  7
+
+/* GPIO_FUNC124_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC124_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC124_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC124_IN_INV_SEL_V  0x1
+#define GPIO_FUNC124_IN_INV_SEL_S  6
+
+/* GPIO_FUNC124_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC124_IN_SEL    0x0000003F
+#define GPIO_FUNC124_IN_SEL_M  ((GPIO_FUNC124_IN_SEL_V)<<(GPIO_FUNC124_IN_SEL_S))
+#define GPIO_FUNC124_IN_SEL_V  0x3F
+#define GPIO_FUNC124_IN_SEL_S  0
+
+#define GPIO_FUNC125_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0324)
+
+/* GPIO_SIG125_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG125_IN_SEL    (BIT(7))
+#define GPIO_SIG125_IN_SEL_M  (BIT(7))
+#define GPIO_SIG125_IN_SEL_V  0x1
+#define GPIO_SIG125_IN_SEL_S  7
+
+/* GPIO_FUNC125_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC125_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC125_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC125_IN_INV_SEL_V  0x1
+#define GPIO_FUNC125_IN_INV_SEL_S  6
+
+/* GPIO_FUNC125_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC125_IN_SEL    0x0000003F
+#define GPIO_FUNC125_IN_SEL_M  ((GPIO_FUNC125_IN_SEL_V)<<(GPIO_FUNC125_IN_SEL_S))
+#define GPIO_FUNC125_IN_SEL_V  0x3F
+#define GPIO_FUNC125_IN_SEL_S  0
+
+#define GPIO_FUNC126_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0328)
+
+/* GPIO_SIG126_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG126_IN_SEL    (BIT(7))
+#define GPIO_SIG126_IN_SEL_M  (BIT(7))
+#define GPIO_SIG126_IN_SEL_V  0x1
+#define GPIO_SIG126_IN_SEL_S  7
+
+/* GPIO_FUNC126_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC126_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC126_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC126_IN_INV_SEL_V  0x1
+#define GPIO_FUNC126_IN_INV_SEL_S  6
+
+/* GPIO_FUNC126_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC126_IN_SEL    0x0000003F
+#define GPIO_FUNC126_IN_SEL_M  ((GPIO_FUNC126_IN_SEL_V)<<(GPIO_FUNC126_IN_SEL_S))
+#define GPIO_FUNC126_IN_SEL_V  0x3F
+#define GPIO_FUNC126_IN_SEL_S  0
+
+#define GPIO_FUNC127_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x032c)
+
+/* GPIO_SIG127_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG127_IN_SEL    (BIT(7))
+#define GPIO_SIG127_IN_SEL_M  (BIT(7))
+#define GPIO_SIG127_IN_SEL_V  0x1
+#define GPIO_SIG127_IN_SEL_S  7
+
+/* GPIO_FUNC127_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC127_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC127_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC127_IN_INV_SEL_V  0x1
+#define GPIO_FUNC127_IN_INV_SEL_S  6
+
+/* GPIO_FUNC127_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC127_IN_SEL    0x0000003F
+#define GPIO_FUNC127_IN_SEL_M  ((GPIO_FUNC127_IN_SEL_V)<<(GPIO_FUNC127_IN_SEL_S))
+#define GPIO_FUNC127_IN_SEL_V  0x3F
+#define GPIO_FUNC127_IN_SEL_S  0
+
+#define GPIO_FUNC128_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0330)
+
+/* GPIO_SIG128_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG128_IN_SEL    (BIT(7))
+#define GPIO_SIG128_IN_SEL_M  (BIT(7))
+#define GPIO_SIG128_IN_SEL_V  0x1
+#define GPIO_SIG128_IN_SEL_S  7
+
+/* GPIO_FUNC128_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC128_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC128_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC128_IN_INV_SEL_V  0x1
+#define GPIO_FUNC128_IN_INV_SEL_S  6
+
+/* GPIO_FUNC128_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC128_IN_SEL    0x0000003F
+#define GPIO_FUNC128_IN_SEL_M  ((GPIO_FUNC128_IN_SEL_V)<<(GPIO_FUNC128_IN_SEL_S))
+#define GPIO_FUNC128_IN_SEL_V  0x3F
+#define GPIO_FUNC128_IN_SEL_S  0
+
+#define GPIO_FUNC129_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0334)
+
+/* GPIO_SIG129_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG129_IN_SEL    (BIT(7))
+#define GPIO_SIG129_IN_SEL_M  (BIT(7))
+#define GPIO_SIG129_IN_SEL_V  0x1
+#define GPIO_SIG129_IN_SEL_S  7
+
+/* GPIO_FUNC129_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC129_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC129_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC129_IN_INV_SEL_V  0x1
+#define GPIO_FUNC129_IN_INV_SEL_S  6
+
+/* GPIO_FUNC129_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC129_IN_SEL    0x0000003F
+#define GPIO_FUNC129_IN_SEL_M  ((GPIO_FUNC129_IN_SEL_V)<<(GPIO_FUNC129_IN_SEL_S))
+#define GPIO_FUNC129_IN_SEL_V  0x3F
+#define GPIO_FUNC129_IN_SEL_S  0
+
+#define GPIO_FUNC130_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0338)
+
+/* GPIO_SIG130_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG130_IN_SEL    (BIT(7))
+#define GPIO_SIG130_IN_SEL_M  (BIT(7))
+#define GPIO_SIG130_IN_SEL_V  0x1
+#define GPIO_SIG130_IN_SEL_S  7
+
+/* GPIO_FUNC130_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC130_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC130_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC130_IN_INV_SEL_V  0x1
+#define GPIO_FUNC130_IN_INV_SEL_S  6
+
+/* GPIO_FUNC130_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC130_IN_SEL    0x0000003F
+#define GPIO_FUNC130_IN_SEL_M  ((GPIO_FUNC130_IN_SEL_V)<<(GPIO_FUNC130_IN_SEL_S))
+#define GPIO_FUNC130_IN_SEL_V  0x3F
+#define GPIO_FUNC130_IN_SEL_S  0
+
+#define GPIO_FUNC131_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x033c)
+
+/* GPIO_SIG131_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG131_IN_SEL    (BIT(7))
+#define GPIO_SIG131_IN_SEL_M  (BIT(7))
+#define GPIO_SIG131_IN_SEL_V  0x1
+#define GPIO_SIG131_IN_SEL_S  7
+
+/* GPIO_FUNC131_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC131_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC131_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC131_IN_INV_SEL_V  0x1
+#define GPIO_FUNC131_IN_INV_SEL_S  6
+
+/* GPIO_FUNC131_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC131_IN_SEL    0x0000003F
+#define GPIO_FUNC131_IN_SEL_M  ((GPIO_FUNC131_IN_SEL_V)<<(GPIO_FUNC131_IN_SEL_S))
+#define GPIO_FUNC131_IN_SEL_V  0x3F
+#define GPIO_FUNC131_IN_SEL_S  0
+
+#define GPIO_FUNC132_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0340)
+
+/* GPIO_SIG132_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG132_IN_SEL    (BIT(7))
+#define GPIO_SIG132_IN_SEL_M  (BIT(7))
+#define GPIO_SIG132_IN_SEL_V  0x1
+#define GPIO_SIG132_IN_SEL_S  7
+
+/* GPIO_FUNC132_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC132_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC132_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC132_IN_INV_SEL_V  0x1
+#define GPIO_FUNC132_IN_INV_SEL_S  6
+
+/* GPIO_FUNC132_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC132_IN_SEL    0x0000003F
+#define GPIO_FUNC132_IN_SEL_M  ((GPIO_FUNC132_IN_SEL_V)<<(GPIO_FUNC132_IN_SEL_S))
+#define GPIO_FUNC132_IN_SEL_V  0x3F
+#define GPIO_FUNC132_IN_SEL_S  0
+
+#define GPIO_FUNC133_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0344)
+
+/* GPIO_SIG133_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG133_IN_SEL    (BIT(7))
+#define GPIO_SIG133_IN_SEL_M  (BIT(7))
+#define GPIO_SIG133_IN_SEL_V  0x1
+#define GPIO_SIG133_IN_SEL_S  7
+
+/* GPIO_FUNC133_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC133_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC133_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC133_IN_INV_SEL_V  0x1
+#define GPIO_FUNC133_IN_INV_SEL_S  6
+
+/* GPIO_FUNC133_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC133_IN_SEL    0x0000003F
+#define GPIO_FUNC133_IN_SEL_M  ((GPIO_FUNC133_IN_SEL_V)<<(GPIO_FUNC133_IN_SEL_S))
+#define GPIO_FUNC133_IN_SEL_V  0x3F
+#define GPIO_FUNC133_IN_SEL_S  0
+
+#define GPIO_FUNC134_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0348)
+
+/* GPIO_SIG134_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG134_IN_SEL    (BIT(7))
+#define GPIO_SIG134_IN_SEL_M  (BIT(7))
+#define GPIO_SIG134_IN_SEL_V  0x1
+#define GPIO_SIG134_IN_SEL_S  7
+
+/* GPIO_FUNC134_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC134_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC134_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC134_IN_INV_SEL_V  0x1
+#define GPIO_FUNC134_IN_INV_SEL_S  6
+
+/* GPIO_FUNC134_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC134_IN_SEL    0x0000003F
+#define GPIO_FUNC134_IN_SEL_M  ((GPIO_FUNC134_IN_SEL_V)<<(GPIO_FUNC134_IN_SEL_S))
+#define GPIO_FUNC134_IN_SEL_V  0x3F
+#define GPIO_FUNC134_IN_SEL_S  0
+
+#define GPIO_FUNC135_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x034c)
+
+/* GPIO_SIG135_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG135_IN_SEL    (BIT(7))
+#define GPIO_SIG135_IN_SEL_M  (BIT(7))
+#define GPIO_SIG135_IN_SEL_V  0x1
+#define GPIO_SIG135_IN_SEL_S  7
+
+/* GPIO_FUNC135_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC135_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC135_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC135_IN_INV_SEL_V  0x1
+#define GPIO_FUNC135_IN_INV_SEL_S  6
+
+/* GPIO_FUNC135_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC135_IN_SEL    0x0000003F
+#define GPIO_FUNC135_IN_SEL_M  ((GPIO_FUNC135_IN_SEL_V)<<(GPIO_FUNC135_IN_SEL_S))
+#define GPIO_FUNC135_IN_SEL_V  0x3F
+#define GPIO_FUNC135_IN_SEL_S  0
+
+#define GPIO_FUNC136_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0350)
+
+/* GPIO_SIG136_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG136_IN_SEL    (BIT(7))
+#define GPIO_SIG136_IN_SEL_M  (BIT(7))
+#define GPIO_SIG136_IN_SEL_V  0x1
+#define GPIO_SIG136_IN_SEL_S  7
+
+/* GPIO_FUNC136_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC136_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC136_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC136_IN_INV_SEL_V  0x1
+#define GPIO_FUNC136_IN_INV_SEL_S  6
+
+/* GPIO_FUNC136_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC136_IN_SEL    0x0000003F
+#define GPIO_FUNC136_IN_SEL_M  ((GPIO_FUNC136_IN_SEL_V)<<(GPIO_FUNC136_IN_SEL_S))
+#define GPIO_FUNC136_IN_SEL_V  0x3F
+#define GPIO_FUNC136_IN_SEL_S  0
+
+#define GPIO_FUNC137_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0354)
+
+/* GPIO_SIG137_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG137_IN_SEL    (BIT(7))
+#define GPIO_SIG137_IN_SEL_M  (BIT(7))
+#define GPIO_SIG137_IN_SEL_V  0x1
+#define GPIO_SIG137_IN_SEL_S  7
+
+/* GPIO_FUNC137_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC137_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC137_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC137_IN_INV_SEL_V  0x1
+#define GPIO_FUNC137_IN_INV_SEL_S  6
+
+/* GPIO_FUNC137_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC137_IN_SEL    0x0000003F
+#define GPIO_FUNC137_IN_SEL_M  ((GPIO_FUNC137_IN_SEL_V)<<(GPIO_FUNC137_IN_SEL_S))
+#define GPIO_FUNC137_IN_SEL_V  0x3F
+#define GPIO_FUNC137_IN_SEL_S  0
+
+#define GPIO_FUNC138_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0358)
+
+/* GPIO_SIG138_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG138_IN_SEL    (BIT(7))
+#define GPIO_SIG138_IN_SEL_M  (BIT(7))
+#define GPIO_SIG138_IN_SEL_V  0x1
+#define GPIO_SIG138_IN_SEL_S  7
+
+/* GPIO_FUNC138_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC138_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC138_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC138_IN_INV_SEL_V  0x1
+#define GPIO_FUNC138_IN_INV_SEL_S  6
+
+/* GPIO_FUNC138_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC138_IN_SEL    0x0000003F
+#define GPIO_FUNC138_IN_SEL_M  ((GPIO_FUNC138_IN_SEL_V)<<(GPIO_FUNC138_IN_SEL_S))
+#define GPIO_FUNC138_IN_SEL_V  0x3F
+#define GPIO_FUNC138_IN_SEL_S  0
+
+#define GPIO_FUNC139_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x035c)
+
+/* GPIO_SIG139_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG139_IN_SEL    (BIT(7))
+#define GPIO_SIG139_IN_SEL_M  (BIT(7))
+#define GPIO_SIG139_IN_SEL_V  0x1
+#define GPIO_SIG139_IN_SEL_S  7
+
+/* GPIO_FUNC139_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC139_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC139_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC139_IN_INV_SEL_V  0x1
+#define GPIO_FUNC139_IN_INV_SEL_S  6
+
+/* GPIO_FUNC139_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC139_IN_SEL    0x0000003F
+#define GPIO_FUNC139_IN_SEL_M  ((GPIO_FUNC139_IN_SEL_V)<<(GPIO_FUNC139_IN_SEL_S))
+#define GPIO_FUNC139_IN_SEL_V  0x3F
+#define GPIO_FUNC139_IN_SEL_S  0
+
+#define GPIO_FUNC140_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0360)
+
+/* GPIO_SIG140_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG140_IN_SEL    (BIT(7))
+#define GPIO_SIG140_IN_SEL_M  (BIT(7))
+#define GPIO_SIG140_IN_SEL_V  0x1
+#define GPIO_SIG140_IN_SEL_S  7
+
+/* GPIO_FUNC140_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC140_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC140_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC140_IN_INV_SEL_V  0x1
+#define GPIO_FUNC140_IN_INV_SEL_S  6
+
+/* GPIO_FUNC140_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC140_IN_SEL    0x0000003F
+#define GPIO_FUNC140_IN_SEL_M  ((GPIO_FUNC140_IN_SEL_V)<<(GPIO_FUNC140_IN_SEL_S))
+#define GPIO_FUNC140_IN_SEL_V  0x3F
+#define GPIO_FUNC140_IN_SEL_S  0
+
+#define GPIO_FUNC141_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0364)
+
+/* GPIO_SIG141_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG141_IN_SEL    (BIT(7))
+#define GPIO_SIG141_IN_SEL_M  (BIT(7))
+#define GPIO_SIG141_IN_SEL_V  0x1
+#define GPIO_SIG141_IN_SEL_S  7
+
+/* GPIO_FUNC141_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC141_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC141_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC141_IN_INV_SEL_V  0x1
+#define GPIO_FUNC141_IN_INV_SEL_S  6
+
+/* GPIO_FUNC141_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC141_IN_SEL    0x0000003F
+#define GPIO_FUNC141_IN_SEL_M  ((GPIO_FUNC141_IN_SEL_V)<<(GPIO_FUNC141_IN_SEL_S))
+#define GPIO_FUNC141_IN_SEL_V  0x3F
+#define GPIO_FUNC141_IN_SEL_S  0
+
+#define GPIO_FUNC142_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0368)
+
+/* GPIO_SIG142_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG142_IN_SEL    (BIT(7))
+#define GPIO_SIG142_IN_SEL_M  (BIT(7))
+#define GPIO_SIG142_IN_SEL_V  0x1
+#define GPIO_SIG142_IN_SEL_S  7
+
+/* GPIO_FUNC142_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC142_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC142_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC142_IN_INV_SEL_V  0x1
+#define GPIO_FUNC142_IN_INV_SEL_S  6
+
+/* GPIO_FUNC142_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC142_IN_SEL    0x0000003F
+#define GPIO_FUNC142_IN_SEL_M  ((GPIO_FUNC142_IN_SEL_V)<<(GPIO_FUNC142_IN_SEL_S))
+#define GPIO_FUNC142_IN_SEL_V  0x3F
+#define GPIO_FUNC142_IN_SEL_S  0
+
+#define GPIO_FUNC143_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x036c)
+
+/* GPIO_SIG143_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG143_IN_SEL    (BIT(7))
+#define GPIO_SIG143_IN_SEL_M  (BIT(7))
+#define GPIO_SIG143_IN_SEL_V  0x1
+#define GPIO_SIG143_IN_SEL_S  7
+
+/* GPIO_FUNC143_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC143_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC143_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC143_IN_INV_SEL_V  0x1
+#define GPIO_FUNC143_IN_INV_SEL_S  6
+
+/* GPIO_FUNC143_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC143_IN_SEL    0x0000003F
+#define GPIO_FUNC143_IN_SEL_M  ((GPIO_FUNC143_IN_SEL_V)<<(GPIO_FUNC143_IN_SEL_S))
+#define GPIO_FUNC143_IN_SEL_V  0x3F
+#define GPIO_FUNC143_IN_SEL_S  0
+
+#define GPIO_FUNC144_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0370)
+
+/* GPIO_SIG144_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG144_IN_SEL    (BIT(7))
+#define GPIO_SIG144_IN_SEL_M  (BIT(7))
+#define GPIO_SIG144_IN_SEL_V  0x1
+#define GPIO_SIG144_IN_SEL_S  7
+
+/* GPIO_FUNC144_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC144_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC144_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC144_IN_INV_SEL_V  0x1
+#define GPIO_FUNC144_IN_INV_SEL_S  6
+
+/* GPIO_FUNC144_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC144_IN_SEL    0x0000003F
+#define GPIO_FUNC144_IN_SEL_M  ((GPIO_FUNC144_IN_SEL_V)<<(GPIO_FUNC144_IN_SEL_S))
+#define GPIO_FUNC144_IN_SEL_V  0x3F
+#define GPIO_FUNC144_IN_SEL_S  0
+
+#define GPIO_FUNC145_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0374)
+
+/* GPIO_SIG145_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG145_IN_SEL    (BIT(7))
+#define GPIO_SIG145_IN_SEL_M  (BIT(7))
+#define GPIO_SIG145_IN_SEL_V  0x1
+#define GPIO_SIG145_IN_SEL_S  7
+
+/* GPIO_FUNC145_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC145_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC145_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC145_IN_INV_SEL_V  0x1
+#define GPIO_FUNC145_IN_INV_SEL_S  6
+
+/* GPIO_FUNC145_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC145_IN_SEL    0x0000003F
+#define GPIO_FUNC145_IN_SEL_M  ((GPIO_FUNC145_IN_SEL_V)<<(GPIO_FUNC145_IN_SEL_S))
+#define GPIO_FUNC145_IN_SEL_V  0x3F
+#define GPIO_FUNC145_IN_SEL_S  0
+
+#define GPIO_FUNC146_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0378)
+
+/* GPIO_SIG146_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG146_IN_SEL    (BIT(7))
+#define GPIO_SIG146_IN_SEL_M  (BIT(7))
+#define GPIO_SIG146_IN_SEL_V  0x1
+#define GPIO_SIG146_IN_SEL_S  7
+
+/* GPIO_FUNC146_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC146_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC146_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC146_IN_INV_SEL_V  0x1
+#define GPIO_FUNC146_IN_INV_SEL_S  6
+
+/* GPIO_FUNC146_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC146_IN_SEL    0x0000003F
+#define GPIO_FUNC146_IN_SEL_M  ((GPIO_FUNC146_IN_SEL_V)<<(GPIO_FUNC146_IN_SEL_S))
+#define GPIO_FUNC146_IN_SEL_V  0x3F
+#define GPIO_FUNC146_IN_SEL_S  0
+
+#define GPIO_FUNC147_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x037c)
+
+/* GPIO_SIG147_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG147_IN_SEL    (BIT(7))
+#define GPIO_SIG147_IN_SEL_M  (BIT(7))
+#define GPIO_SIG147_IN_SEL_V  0x1
+#define GPIO_SIG147_IN_SEL_S  7
+
+/* GPIO_FUNC147_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC147_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC147_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC147_IN_INV_SEL_V  0x1
+#define GPIO_FUNC147_IN_INV_SEL_S  6
+
+/* GPIO_FUNC147_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC147_IN_SEL    0x0000003F
+#define GPIO_FUNC147_IN_SEL_M  ((GPIO_FUNC147_IN_SEL_V)<<(GPIO_FUNC147_IN_SEL_S))
+#define GPIO_FUNC147_IN_SEL_V  0x3F
+#define GPIO_FUNC147_IN_SEL_S  0
+
+#define GPIO_FUNC148_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0380)
+
+/* GPIO_SIG148_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG148_IN_SEL    (BIT(7))
+#define GPIO_SIG148_IN_SEL_M  (BIT(7))
+#define GPIO_SIG148_IN_SEL_V  0x1
+#define GPIO_SIG148_IN_SEL_S  7
+
+/* GPIO_FUNC148_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC148_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC148_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC148_IN_INV_SEL_V  0x1
+#define GPIO_FUNC148_IN_INV_SEL_S  6
+
+/* GPIO_FUNC148_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC148_IN_SEL    0x0000003F
+#define GPIO_FUNC148_IN_SEL_M  ((GPIO_FUNC148_IN_SEL_V)<<(GPIO_FUNC148_IN_SEL_S))
+#define GPIO_FUNC148_IN_SEL_V  0x3F
+#define GPIO_FUNC148_IN_SEL_S  0
+
+#define GPIO_FUNC149_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0384)
+
+/* GPIO_SIG149_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG149_IN_SEL    (BIT(7))
+#define GPIO_SIG149_IN_SEL_M  (BIT(7))
+#define GPIO_SIG149_IN_SEL_V  0x1
+#define GPIO_SIG149_IN_SEL_S  7
+
+/* GPIO_FUNC149_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC149_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC149_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC149_IN_INV_SEL_V  0x1
+#define GPIO_FUNC149_IN_INV_SEL_S  6
+
+/* GPIO_FUNC149_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC149_IN_SEL    0x0000003F
+#define GPIO_FUNC149_IN_SEL_M  ((GPIO_FUNC149_IN_SEL_V)<<(GPIO_FUNC149_IN_SEL_S))
+#define GPIO_FUNC149_IN_SEL_V  0x3F
+#define GPIO_FUNC149_IN_SEL_S  0
+
+#define GPIO_FUNC150_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0388)
+
+/* GPIO_SIG150_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG150_IN_SEL    (BIT(7))
+#define GPIO_SIG150_IN_SEL_M  (BIT(7))
+#define GPIO_SIG150_IN_SEL_V  0x1
+#define GPIO_SIG150_IN_SEL_S  7
+
+/* GPIO_FUNC150_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC150_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC150_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC150_IN_INV_SEL_V  0x1
+#define GPIO_FUNC150_IN_INV_SEL_S  6
+
+/* GPIO_FUNC150_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC150_IN_SEL    0x0000003F
+#define GPIO_FUNC150_IN_SEL_M  ((GPIO_FUNC150_IN_SEL_V)<<(GPIO_FUNC150_IN_SEL_S))
+#define GPIO_FUNC150_IN_SEL_V  0x3F
+#define GPIO_FUNC150_IN_SEL_S  0
+
+#define GPIO_FUNC151_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x038c)
+
+/* GPIO_SIG151_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG151_IN_SEL    (BIT(7))
+#define GPIO_SIG151_IN_SEL_M  (BIT(7))
+#define GPIO_SIG151_IN_SEL_V  0x1
+#define GPIO_SIG151_IN_SEL_S  7
+
+/* GPIO_FUNC151_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC151_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC151_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC151_IN_INV_SEL_V  0x1
+#define GPIO_FUNC151_IN_INV_SEL_S  6
+
+/* GPIO_FUNC151_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC151_IN_SEL    0x0000003F
+#define GPIO_FUNC151_IN_SEL_M  ((GPIO_FUNC151_IN_SEL_V)<<(GPIO_FUNC151_IN_SEL_S))
+#define GPIO_FUNC151_IN_SEL_V  0x3F
+#define GPIO_FUNC151_IN_SEL_S  0
+
+#define GPIO_FUNC152_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0390)
+
+/* GPIO_SIG152_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG152_IN_SEL    (BIT(7))
+#define GPIO_SIG152_IN_SEL_M  (BIT(7))
+#define GPIO_SIG152_IN_SEL_V  0x1
+#define GPIO_SIG152_IN_SEL_S  7
+
+/* GPIO_FUNC152_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC152_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC152_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC152_IN_INV_SEL_V  0x1
+#define GPIO_FUNC152_IN_INV_SEL_S  6
+
+/* GPIO_FUNC152_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC152_IN_SEL    0x0000003F
+#define GPIO_FUNC152_IN_SEL_M  ((GPIO_FUNC152_IN_SEL_V)<<(GPIO_FUNC152_IN_SEL_S))
+#define GPIO_FUNC152_IN_SEL_V  0x3F
+#define GPIO_FUNC152_IN_SEL_S  0
+
+#define GPIO_FUNC153_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0394)
+
+/* GPIO_SIG153_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG153_IN_SEL    (BIT(7))
+#define GPIO_SIG153_IN_SEL_M  (BIT(7))
+#define GPIO_SIG153_IN_SEL_V  0x1
+#define GPIO_SIG153_IN_SEL_S  7
+
+/* GPIO_FUNC153_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC153_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC153_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC153_IN_INV_SEL_V  0x1
+#define GPIO_FUNC153_IN_INV_SEL_S  6
+
+/* GPIO_FUNC153_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC153_IN_SEL    0x0000003F
+#define GPIO_FUNC153_IN_SEL_M  ((GPIO_FUNC153_IN_SEL_V)<<(GPIO_FUNC153_IN_SEL_S))
+#define GPIO_FUNC153_IN_SEL_V  0x3F
+#define GPIO_FUNC153_IN_SEL_S  0
+
+#define GPIO_FUNC154_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0398)
+
+/* GPIO_SIG154_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG154_IN_SEL    (BIT(7))
+#define GPIO_SIG154_IN_SEL_M  (BIT(7))
+#define GPIO_SIG154_IN_SEL_V  0x1
+#define GPIO_SIG154_IN_SEL_S  7
+
+/* GPIO_FUNC154_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC154_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC154_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC154_IN_INV_SEL_V  0x1
+#define GPIO_FUNC154_IN_INV_SEL_S  6
+
+/* GPIO_FUNC154_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC154_IN_SEL    0x0000003F
+#define GPIO_FUNC154_IN_SEL_M  ((GPIO_FUNC154_IN_SEL_V)<<(GPIO_FUNC154_IN_SEL_S))
+#define GPIO_FUNC154_IN_SEL_V  0x3F
+#define GPIO_FUNC154_IN_SEL_S  0
+
+#define GPIO_FUNC155_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x039c)
+
+/* GPIO_SIG155_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG155_IN_SEL    (BIT(7))
+#define GPIO_SIG155_IN_SEL_M  (BIT(7))
+#define GPIO_SIG155_IN_SEL_V  0x1
+#define GPIO_SIG155_IN_SEL_S  7
+
+/* GPIO_FUNC155_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC155_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC155_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC155_IN_INV_SEL_V  0x1
+#define GPIO_FUNC155_IN_INV_SEL_S  6
+
+/* GPIO_FUNC155_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC155_IN_SEL    0x0000003F
+#define GPIO_FUNC155_IN_SEL_M  ((GPIO_FUNC155_IN_SEL_V)<<(GPIO_FUNC155_IN_SEL_S))
+#define GPIO_FUNC155_IN_SEL_V  0x3F
+#define GPIO_FUNC155_IN_SEL_S  0
+
+#define GPIO_FUNC156_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03a0)
+
+/* GPIO_SIG156_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG156_IN_SEL    (BIT(7))
+#define GPIO_SIG156_IN_SEL_M  (BIT(7))
+#define GPIO_SIG156_IN_SEL_V  0x1
+#define GPIO_SIG156_IN_SEL_S  7
+
+/* GPIO_FUNC156_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC156_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC156_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC156_IN_INV_SEL_V  0x1
+#define GPIO_FUNC156_IN_INV_SEL_S  6
+
+/* GPIO_FUNC156_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC156_IN_SEL    0x0000003F
+#define GPIO_FUNC156_IN_SEL_M  ((GPIO_FUNC156_IN_SEL_V)<<(GPIO_FUNC156_IN_SEL_S))
+#define GPIO_FUNC156_IN_SEL_V  0x3F
+#define GPIO_FUNC156_IN_SEL_S  0
+
+#define GPIO_FUNC157_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03a4)
+
+/* GPIO_SIG157_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG157_IN_SEL    (BIT(7))
+#define GPIO_SIG157_IN_SEL_M  (BIT(7))
+#define GPIO_SIG157_IN_SEL_V  0x1
+#define GPIO_SIG157_IN_SEL_S  7
+
+/* GPIO_FUNC157_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC157_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC157_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC157_IN_INV_SEL_V  0x1
+#define GPIO_FUNC157_IN_INV_SEL_S  6
+
+/* GPIO_FUNC157_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC157_IN_SEL    0x0000003F
+#define GPIO_FUNC157_IN_SEL_M  ((GPIO_FUNC157_IN_SEL_V)<<(GPIO_FUNC157_IN_SEL_S))
+#define GPIO_FUNC157_IN_SEL_V  0x3F
+#define GPIO_FUNC157_IN_SEL_S  0
+
+#define GPIO_FUNC158_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03a8)
+
+/* GPIO_SIG158_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG158_IN_SEL    (BIT(7))
+#define GPIO_SIG158_IN_SEL_M  (BIT(7))
+#define GPIO_SIG158_IN_SEL_V  0x1
+#define GPIO_SIG158_IN_SEL_S  7
+
+/* GPIO_FUNC158_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC158_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC158_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC158_IN_INV_SEL_V  0x1
+#define GPIO_FUNC158_IN_INV_SEL_S  6
+
+/* GPIO_FUNC158_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC158_IN_SEL    0x0000003F
+#define GPIO_FUNC158_IN_SEL_M  ((GPIO_FUNC158_IN_SEL_V)<<(GPIO_FUNC158_IN_SEL_S))
+#define GPIO_FUNC158_IN_SEL_V  0x3F
+#define GPIO_FUNC158_IN_SEL_S  0
+
+#define GPIO_FUNC159_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03ac)
+
+/* GPIO_SIG159_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG159_IN_SEL    (BIT(7))
+#define GPIO_SIG159_IN_SEL_M  (BIT(7))
+#define GPIO_SIG159_IN_SEL_V  0x1
+#define GPIO_SIG159_IN_SEL_S  7
+
+/* GPIO_FUNC159_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC159_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC159_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC159_IN_INV_SEL_V  0x1
+#define GPIO_FUNC159_IN_INV_SEL_S  6
+
+/* GPIO_FUNC159_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC159_IN_SEL    0x0000003F
+#define GPIO_FUNC159_IN_SEL_M  ((GPIO_FUNC159_IN_SEL_V)<<(GPIO_FUNC159_IN_SEL_S))
+#define GPIO_FUNC159_IN_SEL_V  0x3F
+#define GPIO_FUNC159_IN_SEL_S  0
+
+#define GPIO_FUNC160_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03b0)
+
+/* GPIO_SIG160_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG160_IN_SEL    (BIT(7))
+#define GPIO_SIG160_IN_SEL_M  (BIT(7))
+#define GPIO_SIG160_IN_SEL_V  0x1
+#define GPIO_SIG160_IN_SEL_S  7
+
+/* GPIO_FUNC160_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC160_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC160_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC160_IN_INV_SEL_V  0x1
+#define GPIO_FUNC160_IN_INV_SEL_S  6
+
+/* GPIO_FUNC160_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC160_IN_SEL    0x0000003F
+#define GPIO_FUNC160_IN_SEL_M  ((GPIO_FUNC160_IN_SEL_V)<<(GPIO_FUNC160_IN_SEL_S))
+#define GPIO_FUNC160_IN_SEL_V  0x3F
+#define GPIO_FUNC160_IN_SEL_S  0
+
+#define GPIO_FUNC161_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03b4)
+
+/* GPIO_SIG161_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG161_IN_SEL    (BIT(7))
+#define GPIO_SIG161_IN_SEL_M  (BIT(7))
+#define GPIO_SIG161_IN_SEL_V  0x1
+#define GPIO_SIG161_IN_SEL_S  7
+
+/* GPIO_FUNC161_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC161_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC161_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC161_IN_INV_SEL_V  0x1
+#define GPIO_FUNC161_IN_INV_SEL_S  6
+
+/* GPIO_FUNC161_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC161_IN_SEL    0x0000003F
+#define GPIO_FUNC161_IN_SEL_M  ((GPIO_FUNC161_IN_SEL_V)<<(GPIO_FUNC161_IN_SEL_S))
+#define GPIO_FUNC161_IN_SEL_V  0x3F
+#define GPIO_FUNC161_IN_SEL_S  0
+
+#define GPIO_FUNC162_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03b8)
+
+/* GPIO_SIG162_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG162_IN_SEL    (BIT(7))
+#define GPIO_SIG162_IN_SEL_M  (BIT(7))
+#define GPIO_SIG162_IN_SEL_V  0x1
+#define GPIO_SIG162_IN_SEL_S  7
+
+/* GPIO_FUNC162_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC162_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC162_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC162_IN_INV_SEL_V  0x1
+#define GPIO_FUNC162_IN_INV_SEL_S  6
+
+/* GPIO_FUNC162_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC162_IN_SEL    0x0000003F
+#define GPIO_FUNC162_IN_SEL_M  ((GPIO_FUNC162_IN_SEL_V)<<(GPIO_FUNC162_IN_SEL_S))
+#define GPIO_FUNC162_IN_SEL_V  0x3F
+#define GPIO_FUNC162_IN_SEL_S  0
+
+#define GPIO_FUNC163_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03bc)
+
+/* GPIO_SIG163_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG163_IN_SEL    (BIT(7))
+#define GPIO_SIG163_IN_SEL_M  (BIT(7))
+#define GPIO_SIG163_IN_SEL_V  0x1
+#define GPIO_SIG163_IN_SEL_S  7
+
+/* GPIO_FUNC163_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC163_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC163_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC163_IN_INV_SEL_V  0x1
+#define GPIO_FUNC163_IN_INV_SEL_S  6
+
+/* GPIO_FUNC163_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC163_IN_SEL    0x0000003F
+#define GPIO_FUNC163_IN_SEL_M  ((GPIO_FUNC163_IN_SEL_V)<<(GPIO_FUNC163_IN_SEL_S))
+#define GPIO_FUNC163_IN_SEL_V  0x3F
+#define GPIO_FUNC163_IN_SEL_S  0
+
+#define GPIO_FUNC164_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03c0)
+
+/* GPIO_SIG164_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG164_IN_SEL    (BIT(7))
+#define GPIO_SIG164_IN_SEL_M  (BIT(7))
+#define GPIO_SIG164_IN_SEL_V  0x1
+#define GPIO_SIG164_IN_SEL_S  7
+
+/* GPIO_FUNC164_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC164_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC164_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC164_IN_INV_SEL_V  0x1
+#define GPIO_FUNC164_IN_INV_SEL_S  6
+
+/* GPIO_FUNC164_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC164_IN_SEL    0x0000003F
+#define GPIO_FUNC164_IN_SEL_M  ((GPIO_FUNC164_IN_SEL_V)<<(GPIO_FUNC164_IN_SEL_S))
+#define GPIO_FUNC164_IN_SEL_V  0x3F
+#define GPIO_FUNC164_IN_SEL_S  0
+
+#define GPIO_FUNC165_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03c4)
+
+/* GPIO_SIG165_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG165_IN_SEL    (BIT(7))
+#define GPIO_SIG165_IN_SEL_M  (BIT(7))
+#define GPIO_SIG165_IN_SEL_V  0x1
+#define GPIO_SIG165_IN_SEL_S  7
+
+/* GPIO_FUNC165_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC165_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC165_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC165_IN_INV_SEL_V  0x1
+#define GPIO_FUNC165_IN_INV_SEL_S  6
+
+/* GPIO_FUNC165_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC165_IN_SEL    0x0000003F
+#define GPIO_FUNC165_IN_SEL_M  ((GPIO_FUNC165_IN_SEL_V)<<(GPIO_FUNC165_IN_SEL_S))
+#define GPIO_FUNC165_IN_SEL_V  0x3F
+#define GPIO_FUNC165_IN_SEL_S  0
+
+#define GPIO_FUNC166_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03c8)
+
+/* GPIO_SIG166_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG166_IN_SEL    (BIT(7))
+#define GPIO_SIG166_IN_SEL_M  (BIT(7))
+#define GPIO_SIG166_IN_SEL_V  0x1
+#define GPIO_SIG166_IN_SEL_S  7
+
+/* GPIO_FUNC166_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC166_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC166_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC166_IN_INV_SEL_V  0x1
+#define GPIO_FUNC166_IN_INV_SEL_S  6
+
+/* GPIO_FUNC166_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC166_IN_SEL    0x0000003F
+#define GPIO_FUNC166_IN_SEL_M  ((GPIO_FUNC166_IN_SEL_V)<<(GPIO_FUNC166_IN_SEL_S))
+#define GPIO_FUNC166_IN_SEL_V  0x3F
+#define GPIO_FUNC166_IN_SEL_S  0
+
+#define GPIO_FUNC167_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03cc)
+
+/* GPIO_SIG167_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG167_IN_SEL    (BIT(7))
+#define GPIO_SIG167_IN_SEL_M  (BIT(7))
+#define GPIO_SIG167_IN_SEL_V  0x1
+#define GPIO_SIG167_IN_SEL_S  7
+
+/* GPIO_FUNC167_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC167_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC167_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC167_IN_INV_SEL_V  0x1
+#define GPIO_FUNC167_IN_INV_SEL_S  6
+
+/* GPIO_FUNC167_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC167_IN_SEL    0x0000003F
+#define GPIO_FUNC167_IN_SEL_M  ((GPIO_FUNC167_IN_SEL_V)<<(GPIO_FUNC167_IN_SEL_S))
+#define GPIO_FUNC167_IN_SEL_V  0x3F
+#define GPIO_FUNC167_IN_SEL_S  0
+
+#define GPIO_FUNC168_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03d0)
+
+/* GPIO_SIG168_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG168_IN_SEL    (BIT(7))
+#define GPIO_SIG168_IN_SEL_M  (BIT(7))
+#define GPIO_SIG168_IN_SEL_V  0x1
+#define GPIO_SIG168_IN_SEL_S  7
+
+/* GPIO_FUNC168_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC168_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC168_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC168_IN_INV_SEL_V  0x1
+#define GPIO_FUNC168_IN_INV_SEL_S  6
+
+/* GPIO_FUNC168_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC168_IN_SEL    0x0000003F
+#define GPIO_FUNC168_IN_SEL_M  ((GPIO_FUNC168_IN_SEL_V)<<(GPIO_FUNC168_IN_SEL_S))
+#define GPIO_FUNC168_IN_SEL_V  0x3F
+#define GPIO_FUNC168_IN_SEL_S  0
+
+#define GPIO_FUNC169_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03d4)
+
+/* GPIO_SIG169_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG169_IN_SEL    (BIT(7))
+#define GPIO_SIG169_IN_SEL_M  (BIT(7))
+#define GPIO_SIG169_IN_SEL_V  0x1
+#define GPIO_SIG169_IN_SEL_S  7
+
+/* GPIO_FUNC169_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC169_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC169_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC169_IN_INV_SEL_V  0x1
+#define GPIO_FUNC169_IN_INV_SEL_S  6
+
+/* GPIO_FUNC169_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC169_IN_SEL    0x0000003F
+#define GPIO_FUNC169_IN_SEL_M  ((GPIO_FUNC169_IN_SEL_V)<<(GPIO_FUNC169_IN_SEL_S))
+#define GPIO_FUNC169_IN_SEL_V  0x3F
+#define GPIO_FUNC169_IN_SEL_S  0
+
+#define GPIO_FUNC170_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03d8)
+
+/* GPIO_SIG170_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG170_IN_SEL    (BIT(7))
+#define GPIO_SIG170_IN_SEL_M  (BIT(7))
+#define GPIO_SIG170_IN_SEL_V  0x1
+#define GPIO_SIG170_IN_SEL_S  7
+
+/* GPIO_FUNC170_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC170_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC170_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC170_IN_INV_SEL_V  0x1
+#define GPIO_FUNC170_IN_INV_SEL_S  6
+
+/* GPIO_FUNC170_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC170_IN_SEL    0x0000003F
+#define GPIO_FUNC170_IN_SEL_M  ((GPIO_FUNC170_IN_SEL_V)<<(GPIO_FUNC170_IN_SEL_S))
+#define GPIO_FUNC170_IN_SEL_V  0x3F
+#define GPIO_FUNC170_IN_SEL_S  0
+
+#define GPIO_FUNC171_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03dc)
+
+/* GPIO_SIG171_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG171_IN_SEL    (BIT(7))
+#define GPIO_SIG171_IN_SEL_M  (BIT(7))
+#define GPIO_SIG171_IN_SEL_V  0x1
+#define GPIO_SIG171_IN_SEL_S  7
+
+/* GPIO_FUNC171_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC171_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC171_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC171_IN_INV_SEL_V  0x1
+#define GPIO_FUNC171_IN_INV_SEL_S  6
+
+/* GPIO_FUNC171_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC171_IN_SEL    0x0000003F
+#define GPIO_FUNC171_IN_SEL_M  ((GPIO_FUNC171_IN_SEL_V)<<(GPIO_FUNC171_IN_SEL_S))
+#define GPIO_FUNC171_IN_SEL_V  0x3F
+#define GPIO_FUNC171_IN_SEL_S  0
+
+#define GPIO_FUNC172_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03e0)
+
+/* GPIO_SIG172_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG172_IN_SEL    (BIT(7))
+#define GPIO_SIG172_IN_SEL_M  (BIT(7))
+#define GPIO_SIG172_IN_SEL_V  0x1
+#define GPIO_SIG172_IN_SEL_S  7
+
+/* GPIO_FUNC172_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC172_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC172_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC172_IN_INV_SEL_V  0x1
+#define GPIO_FUNC172_IN_INV_SEL_S  6
+
+/* GPIO_FUNC172_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC172_IN_SEL    0x0000003F
+#define GPIO_FUNC172_IN_SEL_M  ((GPIO_FUNC172_IN_SEL_V)<<(GPIO_FUNC172_IN_SEL_S))
+#define GPIO_FUNC172_IN_SEL_V  0x3F
+#define GPIO_FUNC172_IN_SEL_S  0
+
+#define GPIO_FUNC173_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03e4)
+
+/* GPIO_SIG173_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG173_IN_SEL    (BIT(7))
+#define GPIO_SIG173_IN_SEL_M  (BIT(7))
+#define GPIO_SIG173_IN_SEL_V  0x1
+#define GPIO_SIG173_IN_SEL_S  7
+
+/* GPIO_FUNC173_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC173_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC173_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC173_IN_INV_SEL_V  0x1
+#define GPIO_FUNC173_IN_INV_SEL_S  6
+
+/* GPIO_FUNC173_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC173_IN_SEL    0x0000003F
+#define GPIO_FUNC173_IN_SEL_M  ((GPIO_FUNC173_IN_SEL_V)<<(GPIO_FUNC173_IN_SEL_S))
+#define GPIO_FUNC173_IN_SEL_V  0x3F
+#define GPIO_FUNC173_IN_SEL_S  0
+
+#define GPIO_FUNC174_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03e8)
+
+/* GPIO_SIG174_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG174_IN_SEL    (BIT(7))
+#define GPIO_SIG174_IN_SEL_M  (BIT(7))
+#define GPIO_SIG174_IN_SEL_V  0x1
+#define GPIO_SIG174_IN_SEL_S  7
+
+/* GPIO_FUNC174_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC174_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC174_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC174_IN_INV_SEL_V  0x1
+#define GPIO_FUNC174_IN_INV_SEL_S  6
+
+/* GPIO_FUNC174_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC174_IN_SEL    0x0000003F
+#define GPIO_FUNC174_IN_SEL_M  ((GPIO_FUNC174_IN_SEL_V)<<(GPIO_FUNC174_IN_SEL_S))
+#define GPIO_FUNC174_IN_SEL_V  0x3F
+#define GPIO_FUNC174_IN_SEL_S  0
+
+#define GPIO_FUNC175_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03ec)
+
+/* GPIO_SIG175_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG175_IN_SEL    (BIT(7))
+#define GPIO_SIG175_IN_SEL_M  (BIT(7))
+#define GPIO_SIG175_IN_SEL_V  0x1
+#define GPIO_SIG175_IN_SEL_S  7
+
+/* GPIO_FUNC175_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC175_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC175_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC175_IN_INV_SEL_V  0x1
+#define GPIO_FUNC175_IN_INV_SEL_S  6
+
+/* GPIO_FUNC175_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC175_IN_SEL    0x0000003F
+#define GPIO_FUNC175_IN_SEL_M  ((GPIO_FUNC175_IN_SEL_V)<<(GPIO_FUNC175_IN_SEL_S))
+#define GPIO_FUNC175_IN_SEL_V  0x3F
+#define GPIO_FUNC175_IN_SEL_S  0
+
+#define GPIO_FUNC176_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03f0)
+
+/* GPIO_SIG176_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG176_IN_SEL    (BIT(7))
+#define GPIO_SIG176_IN_SEL_M  (BIT(7))
+#define GPIO_SIG176_IN_SEL_V  0x1
+#define GPIO_SIG176_IN_SEL_S  7
+
+/* GPIO_FUNC176_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC176_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC176_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC176_IN_INV_SEL_V  0x1
+#define GPIO_FUNC176_IN_INV_SEL_S  6
+
+/* GPIO_FUNC176_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC176_IN_SEL    0x0000003F
+#define GPIO_FUNC176_IN_SEL_M  ((GPIO_FUNC176_IN_SEL_V)<<(GPIO_FUNC176_IN_SEL_S))
+#define GPIO_FUNC176_IN_SEL_V  0x3F
+#define GPIO_FUNC176_IN_SEL_S  0
+
+#define GPIO_FUNC177_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03f4)
+
+/* GPIO_SIG177_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG177_IN_SEL    (BIT(7))
+#define GPIO_SIG177_IN_SEL_M  (BIT(7))
+#define GPIO_SIG177_IN_SEL_V  0x1
+#define GPIO_SIG177_IN_SEL_S  7
+
+/* GPIO_FUNC177_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC177_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC177_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC177_IN_INV_SEL_V  0x1
+#define GPIO_FUNC177_IN_INV_SEL_S  6
+
+/* GPIO_FUNC177_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC177_IN_SEL    0x0000003F
+#define GPIO_FUNC177_IN_SEL_M  ((GPIO_FUNC177_IN_SEL_V)<<(GPIO_FUNC177_IN_SEL_S))
+#define GPIO_FUNC177_IN_SEL_V  0x3F
+#define GPIO_FUNC177_IN_SEL_S  0
+
+#define GPIO_FUNC178_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03f8)
+
+/* GPIO_SIG178_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG178_IN_SEL    (BIT(7))
+#define GPIO_SIG178_IN_SEL_M  (BIT(7))
+#define GPIO_SIG178_IN_SEL_V  0x1
+#define GPIO_SIG178_IN_SEL_S  7
+
+/* GPIO_FUNC178_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC178_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC178_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC178_IN_INV_SEL_V  0x1
+#define GPIO_FUNC178_IN_INV_SEL_S  6
+
+/* GPIO_FUNC178_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC178_IN_SEL    0x0000003F
+#define GPIO_FUNC178_IN_SEL_M  ((GPIO_FUNC178_IN_SEL_V)<<(GPIO_FUNC178_IN_SEL_S))
+#define GPIO_FUNC178_IN_SEL_V  0x3F
+#define GPIO_FUNC178_IN_SEL_S  0
+
+#define GPIO_FUNC179_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x03fc)
+
+/* GPIO_SIG179_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG179_IN_SEL    (BIT(7))
+#define GPIO_SIG179_IN_SEL_M  (BIT(7))
+#define GPIO_SIG179_IN_SEL_V  0x1
+#define GPIO_SIG179_IN_SEL_S  7
+
+/* GPIO_FUNC179_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC179_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC179_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC179_IN_INV_SEL_V  0x1
+#define GPIO_FUNC179_IN_INV_SEL_S  6
+
+/* GPIO_FUNC179_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC179_IN_SEL    0x0000003F
+#define GPIO_FUNC179_IN_SEL_M  ((GPIO_FUNC179_IN_SEL_V)<<(GPIO_FUNC179_IN_SEL_S))
+#define GPIO_FUNC179_IN_SEL_V  0x3F
+#define GPIO_FUNC179_IN_SEL_S  0
+
+#define GPIO_FUNC180_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0400)
+
+/* GPIO_SIG180_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG180_IN_SEL    (BIT(7))
+#define GPIO_SIG180_IN_SEL_M  (BIT(7))
+#define GPIO_SIG180_IN_SEL_V  0x1
+#define GPIO_SIG180_IN_SEL_S  7
+
+/* GPIO_FUNC180_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC180_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC180_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC180_IN_INV_SEL_V  0x1
+#define GPIO_FUNC180_IN_INV_SEL_S  6
+
+/* GPIO_FUNC180_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC180_IN_SEL    0x0000003F
+#define GPIO_FUNC180_IN_SEL_M  ((GPIO_FUNC180_IN_SEL_V)<<(GPIO_FUNC180_IN_SEL_S))
+#define GPIO_FUNC180_IN_SEL_V  0x3F
+#define GPIO_FUNC180_IN_SEL_S  0
+
+#define GPIO_FUNC181_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0404)
+
+/* GPIO_SIG181_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG181_IN_SEL    (BIT(7))
+#define GPIO_SIG181_IN_SEL_M  (BIT(7))
+#define GPIO_SIG181_IN_SEL_V  0x1
+#define GPIO_SIG181_IN_SEL_S  7
+
+/* GPIO_FUNC181_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC181_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC181_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC181_IN_INV_SEL_V  0x1
+#define GPIO_FUNC181_IN_INV_SEL_S  6
+
+/* GPIO_FUNC181_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC181_IN_SEL    0x0000003F
+#define GPIO_FUNC181_IN_SEL_M  ((GPIO_FUNC181_IN_SEL_V)<<(GPIO_FUNC181_IN_SEL_S))
+#define GPIO_FUNC181_IN_SEL_V  0x3F
+#define GPIO_FUNC181_IN_SEL_S  0
+
+#define GPIO_FUNC182_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0408)
+
+/* GPIO_SIG182_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG182_IN_SEL    (BIT(7))
+#define GPIO_SIG182_IN_SEL_M  (BIT(7))
+#define GPIO_SIG182_IN_SEL_V  0x1
+#define GPIO_SIG182_IN_SEL_S  7
+
+/* GPIO_FUNC182_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC182_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC182_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC182_IN_INV_SEL_V  0x1
+#define GPIO_FUNC182_IN_INV_SEL_S  6
+
+/* GPIO_FUNC182_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC182_IN_SEL    0x0000003F
+#define GPIO_FUNC182_IN_SEL_M  ((GPIO_FUNC182_IN_SEL_V)<<(GPIO_FUNC182_IN_SEL_S))
+#define GPIO_FUNC182_IN_SEL_V  0x3F
+#define GPIO_FUNC182_IN_SEL_S  0
+
+#define GPIO_FUNC183_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x040c)
+
+/* GPIO_SIG183_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG183_IN_SEL    (BIT(7))
+#define GPIO_SIG183_IN_SEL_M  (BIT(7))
+#define GPIO_SIG183_IN_SEL_V  0x1
+#define GPIO_SIG183_IN_SEL_S  7
+
+/* GPIO_FUNC183_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC183_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC183_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC183_IN_INV_SEL_V  0x1
+#define GPIO_FUNC183_IN_INV_SEL_S  6
+
+/* GPIO_FUNC183_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC183_IN_SEL    0x0000003F
+#define GPIO_FUNC183_IN_SEL_M  ((GPIO_FUNC183_IN_SEL_V)<<(GPIO_FUNC183_IN_SEL_S))
+#define GPIO_FUNC183_IN_SEL_V  0x3F
+#define GPIO_FUNC183_IN_SEL_S  0
+
+#define GPIO_FUNC184_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0410)
+
+/* GPIO_SIG184_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG184_IN_SEL    (BIT(7))
+#define GPIO_SIG184_IN_SEL_M  (BIT(7))
+#define GPIO_SIG184_IN_SEL_V  0x1
+#define GPIO_SIG184_IN_SEL_S  7
+
+/* GPIO_FUNC184_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC184_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC184_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC184_IN_INV_SEL_V  0x1
+#define GPIO_FUNC184_IN_INV_SEL_S  6
+
+/* GPIO_FUNC184_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC184_IN_SEL    0x0000003F
+#define GPIO_FUNC184_IN_SEL_M  ((GPIO_FUNC184_IN_SEL_V)<<(GPIO_FUNC184_IN_SEL_S))
+#define GPIO_FUNC184_IN_SEL_V  0x3F
+#define GPIO_FUNC184_IN_SEL_S  0
+
+#define GPIO_FUNC185_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0414)
+
+/* GPIO_SIG185_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG185_IN_SEL    (BIT(7))
+#define GPIO_SIG185_IN_SEL_M  (BIT(7))
+#define GPIO_SIG185_IN_SEL_V  0x1
+#define GPIO_SIG185_IN_SEL_S  7
+
+/* GPIO_FUNC185_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC185_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC185_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC185_IN_INV_SEL_V  0x1
+#define GPIO_FUNC185_IN_INV_SEL_S  6
+
+/* GPIO_FUNC185_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC185_IN_SEL    0x0000003F
+#define GPIO_FUNC185_IN_SEL_M  ((GPIO_FUNC185_IN_SEL_V)<<(GPIO_FUNC185_IN_SEL_S))
+#define GPIO_FUNC185_IN_SEL_V  0x3F
+#define GPIO_FUNC185_IN_SEL_S  0
+
+#define GPIO_FUNC186_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0418)
+
+/* GPIO_SIG186_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG186_IN_SEL    (BIT(7))
+#define GPIO_SIG186_IN_SEL_M  (BIT(7))
+#define GPIO_SIG186_IN_SEL_V  0x1
+#define GPIO_SIG186_IN_SEL_S  7
+
+/* GPIO_FUNC186_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC186_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC186_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC186_IN_INV_SEL_V  0x1
+#define GPIO_FUNC186_IN_INV_SEL_S  6
+
+/* GPIO_FUNC186_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC186_IN_SEL    0x0000003F
+#define GPIO_FUNC186_IN_SEL_M  ((GPIO_FUNC186_IN_SEL_V)<<(GPIO_FUNC186_IN_SEL_S))
+#define GPIO_FUNC186_IN_SEL_V  0x3F
+#define GPIO_FUNC186_IN_SEL_S  0
+
+#define GPIO_FUNC187_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x041c)
+
+/* GPIO_SIG187_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG187_IN_SEL    (BIT(7))
+#define GPIO_SIG187_IN_SEL_M  (BIT(7))
+#define GPIO_SIG187_IN_SEL_V  0x1
+#define GPIO_SIG187_IN_SEL_S  7
+
+/* GPIO_FUNC187_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC187_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC187_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC187_IN_INV_SEL_V  0x1
+#define GPIO_FUNC187_IN_INV_SEL_S  6
+
+/* GPIO_FUNC187_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC187_IN_SEL    0x0000003F
+#define GPIO_FUNC187_IN_SEL_M  ((GPIO_FUNC187_IN_SEL_V)<<(GPIO_FUNC187_IN_SEL_S))
+#define GPIO_FUNC187_IN_SEL_V  0x3F
+#define GPIO_FUNC187_IN_SEL_S  0
+
+#define GPIO_FUNC188_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0420)
+
+/* GPIO_SIG188_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG188_IN_SEL    (BIT(7))
+#define GPIO_SIG188_IN_SEL_M  (BIT(7))
+#define GPIO_SIG188_IN_SEL_V  0x1
+#define GPIO_SIG188_IN_SEL_S  7
+
+/* GPIO_FUNC188_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC188_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC188_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC188_IN_INV_SEL_V  0x1
+#define GPIO_FUNC188_IN_INV_SEL_S  6
+
+/* GPIO_FUNC188_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC188_IN_SEL    0x0000003F
+#define GPIO_FUNC188_IN_SEL_M  ((GPIO_FUNC188_IN_SEL_V)<<(GPIO_FUNC188_IN_SEL_S))
+#define GPIO_FUNC188_IN_SEL_V  0x3F
+#define GPIO_FUNC188_IN_SEL_S  0
+
+#define GPIO_FUNC189_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0424)
+
+/* GPIO_SIG189_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG189_IN_SEL    (BIT(7))
+#define GPIO_SIG189_IN_SEL_M  (BIT(7))
+#define GPIO_SIG189_IN_SEL_V  0x1
+#define GPIO_SIG189_IN_SEL_S  7
+
+/* GPIO_FUNC189_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC189_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC189_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC189_IN_INV_SEL_V  0x1
+#define GPIO_FUNC189_IN_INV_SEL_S  6
+
+/* GPIO_FUNC189_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC189_IN_SEL    0x0000003F
+#define GPIO_FUNC189_IN_SEL_M  ((GPIO_FUNC189_IN_SEL_V)<<(GPIO_FUNC189_IN_SEL_S))
+#define GPIO_FUNC189_IN_SEL_V  0x3F
+#define GPIO_FUNC189_IN_SEL_S  0
+
+#define GPIO_FUNC190_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0428)
+
+/* GPIO_SIG190_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG190_IN_SEL    (BIT(7))
+#define GPIO_SIG190_IN_SEL_M  (BIT(7))
+#define GPIO_SIG190_IN_SEL_V  0x1
+#define GPIO_SIG190_IN_SEL_S  7
+
+/* GPIO_FUNC190_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC190_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC190_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC190_IN_INV_SEL_V  0x1
+#define GPIO_FUNC190_IN_INV_SEL_S  6
+
+/* GPIO_FUNC190_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC190_IN_SEL    0x0000003F
+#define GPIO_FUNC190_IN_SEL_M  ((GPIO_FUNC190_IN_SEL_V)<<(GPIO_FUNC190_IN_SEL_S))
+#define GPIO_FUNC190_IN_SEL_V  0x3F
+#define GPIO_FUNC190_IN_SEL_S  0
+
+#define GPIO_FUNC191_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x042c)
+
+/* GPIO_SIG191_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG191_IN_SEL    (BIT(7))
+#define GPIO_SIG191_IN_SEL_M  (BIT(7))
+#define GPIO_SIG191_IN_SEL_V  0x1
+#define GPIO_SIG191_IN_SEL_S  7
+
+/* GPIO_FUNC191_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC191_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC191_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC191_IN_INV_SEL_V  0x1
+#define GPIO_FUNC191_IN_INV_SEL_S  6
+
+/* GPIO_FUNC191_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC191_IN_SEL    0x0000003F
+#define GPIO_FUNC191_IN_SEL_M  ((GPIO_FUNC191_IN_SEL_V)<<(GPIO_FUNC191_IN_SEL_S))
+#define GPIO_FUNC191_IN_SEL_V  0x3F
+#define GPIO_FUNC191_IN_SEL_S  0
+
+#define GPIO_FUNC192_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0430)
+
+/* GPIO_SIG192_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG192_IN_SEL    (BIT(7))
+#define GPIO_SIG192_IN_SEL_M  (BIT(7))
+#define GPIO_SIG192_IN_SEL_V  0x1
+#define GPIO_SIG192_IN_SEL_S  7
+
+/* GPIO_FUNC192_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC192_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC192_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC192_IN_INV_SEL_V  0x1
+#define GPIO_FUNC192_IN_INV_SEL_S  6
+
+/* GPIO_FUNC192_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC192_IN_SEL    0x0000003F
+#define GPIO_FUNC192_IN_SEL_M  ((GPIO_FUNC192_IN_SEL_V)<<(GPIO_FUNC192_IN_SEL_S))
+#define GPIO_FUNC192_IN_SEL_V  0x3F
+#define GPIO_FUNC192_IN_SEL_S  0
+
+#define GPIO_FUNC193_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0434)
+
+/* GPIO_SIG193_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG193_IN_SEL    (BIT(7))
+#define GPIO_SIG193_IN_SEL_M  (BIT(7))
+#define GPIO_SIG193_IN_SEL_V  0x1
+#define GPIO_SIG193_IN_SEL_S  7
+
+/* GPIO_FUNC193_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC193_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC193_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC193_IN_INV_SEL_V  0x1
+#define GPIO_FUNC193_IN_INV_SEL_S  6
+
+/* GPIO_FUNC193_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC193_IN_SEL    0x0000003F
+#define GPIO_FUNC193_IN_SEL_M  ((GPIO_FUNC193_IN_SEL_V)<<(GPIO_FUNC193_IN_SEL_S))
+#define GPIO_FUNC193_IN_SEL_V  0x3F
+#define GPIO_FUNC193_IN_SEL_S  0
+
+#define GPIO_FUNC194_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0438)
+
+/* GPIO_SIG194_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG194_IN_SEL    (BIT(7))
+#define GPIO_SIG194_IN_SEL_M  (BIT(7))
+#define GPIO_SIG194_IN_SEL_V  0x1
+#define GPIO_SIG194_IN_SEL_S  7
+
+/* GPIO_FUNC194_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC194_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC194_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC194_IN_INV_SEL_V  0x1
+#define GPIO_FUNC194_IN_INV_SEL_S  6
+
+/* GPIO_FUNC194_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC194_IN_SEL    0x0000003F
+#define GPIO_FUNC194_IN_SEL_M  ((GPIO_FUNC194_IN_SEL_V)<<(GPIO_FUNC194_IN_SEL_S))
+#define GPIO_FUNC194_IN_SEL_V  0x3F
+#define GPIO_FUNC194_IN_SEL_S  0
+
+#define GPIO_FUNC195_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x043c)
+
+/* GPIO_SIG195_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG195_IN_SEL    (BIT(7))
+#define GPIO_SIG195_IN_SEL_M  (BIT(7))
+#define GPIO_SIG195_IN_SEL_V  0x1
+#define GPIO_SIG195_IN_SEL_S  7
+
+/* GPIO_FUNC195_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC195_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC195_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC195_IN_INV_SEL_V  0x1
+#define GPIO_FUNC195_IN_INV_SEL_S  6
+
+/* GPIO_FUNC195_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC195_IN_SEL    0x0000003F
+#define GPIO_FUNC195_IN_SEL_M  ((GPIO_FUNC195_IN_SEL_V)<<(GPIO_FUNC195_IN_SEL_S))
+#define GPIO_FUNC195_IN_SEL_V  0x3F
+#define GPIO_FUNC195_IN_SEL_S  0
+
+#define GPIO_FUNC196_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0440)
+
+/* GPIO_SIG196_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG196_IN_SEL    (BIT(7))
+#define GPIO_SIG196_IN_SEL_M  (BIT(7))
+#define GPIO_SIG196_IN_SEL_V  0x1
+#define GPIO_SIG196_IN_SEL_S  7
+
+/* GPIO_FUNC196_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC196_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC196_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC196_IN_INV_SEL_V  0x1
+#define GPIO_FUNC196_IN_INV_SEL_S  6
+
+/* GPIO_FUNC196_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC196_IN_SEL    0x0000003F
+#define GPIO_FUNC196_IN_SEL_M  ((GPIO_FUNC196_IN_SEL_V)<<(GPIO_FUNC196_IN_SEL_S))
+#define GPIO_FUNC196_IN_SEL_V  0x3F
+#define GPIO_FUNC196_IN_SEL_S  0
+
+#define GPIO_FUNC197_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0444)
+
+/* GPIO_SIG197_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG197_IN_SEL    (BIT(7))
+#define GPIO_SIG197_IN_SEL_M  (BIT(7))
+#define GPIO_SIG197_IN_SEL_V  0x1
+#define GPIO_SIG197_IN_SEL_S  7
+
+/* GPIO_FUNC197_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC197_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC197_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC197_IN_INV_SEL_V  0x1
+#define GPIO_FUNC197_IN_INV_SEL_S  6
+
+/* GPIO_FUNC197_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC197_IN_SEL    0x0000003F
+#define GPIO_FUNC197_IN_SEL_M  ((GPIO_FUNC197_IN_SEL_V)<<(GPIO_FUNC197_IN_SEL_S))
+#define GPIO_FUNC197_IN_SEL_V  0x3F
+#define GPIO_FUNC197_IN_SEL_S  0
+
+#define GPIO_FUNC198_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0448)
+
+/* GPIO_SIG198_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG198_IN_SEL    (BIT(7))
+#define GPIO_SIG198_IN_SEL_M  (BIT(7))
+#define GPIO_SIG198_IN_SEL_V  0x1
+#define GPIO_SIG198_IN_SEL_S  7
+
+/* GPIO_FUNC198_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC198_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC198_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC198_IN_INV_SEL_V  0x1
+#define GPIO_FUNC198_IN_INV_SEL_S  6
+
+/* GPIO_FUNC198_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC198_IN_SEL    0x0000003F
+#define GPIO_FUNC198_IN_SEL_M  ((GPIO_FUNC198_IN_SEL_V)<<(GPIO_FUNC198_IN_SEL_S))
+#define GPIO_FUNC198_IN_SEL_V  0x3F
+#define GPIO_FUNC198_IN_SEL_S  0
+
+#define GPIO_FUNC199_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x044c)
+
+/* GPIO_SIG199_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG199_IN_SEL    (BIT(7))
+#define GPIO_SIG199_IN_SEL_M  (BIT(7))
+#define GPIO_SIG199_IN_SEL_V  0x1
+#define GPIO_SIG199_IN_SEL_S  7
+
+/* GPIO_FUNC199_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC199_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC199_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC199_IN_INV_SEL_V  0x1
+#define GPIO_FUNC199_IN_INV_SEL_S  6
+
+/* GPIO_FUNC199_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC199_IN_SEL    0x0000003F
+#define GPIO_FUNC199_IN_SEL_M  ((GPIO_FUNC199_IN_SEL_V)<<(GPIO_FUNC199_IN_SEL_S))
+#define GPIO_FUNC199_IN_SEL_V  0x3F
+#define GPIO_FUNC199_IN_SEL_S  0
+
+#define GPIO_FUNC200_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0450)
+
+/* GPIO_SIG200_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG200_IN_SEL    (BIT(7))
+#define GPIO_SIG200_IN_SEL_M  (BIT(7))
+#define GPIO_SIG200_IN_SEL_V  0x1
+#define GPIO_SIG200_IN_SEL_S  7
+
+/* GPIO_FUNC200_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC200_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC200_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC200_IN_INV_SEL_V  0x1
+#define GPIO_FUNC200_IN_INV_SEL_S  6
+
+/* GPIO_FUNC200_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC200_IN_SEL    0x0000003F
+#define GPIO_FUNC200_IN_SEL_M  ((GPIO_FUNC200_IN_SEL_V)<<(GPIO_FUNC200_IN_SEL_S))
+#define GPIO_FUNC200_IN_SEL_V  0x3F
+#define GPIO_FUNC200_IN_SEL_S  0
+
+#define GPIO_FUNC201_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0454)
+
+/* GPIO_SIG201_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG201_IN_SEL    (BIT(7))
+#define GPIO_SIG201_IN_SEL_M  (BIT(7))
+#define GPIO_SIG201_IN_SEL_V  0x1
+#define GPIO_SIG201_IN_SEL_S  7
+
+/* GPIO_FUNC201_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC201_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC201_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC201_IN_INV_SEL_V  0x1
+#define GPIO_FUNC201_IN_INV_SEL_S  6
+
+/* GPIO_FUNC201_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC201_IN_SEL    0x0000003F
+#define GPIO_FUNC201_IN_SEL_M  ((GPIO_FUNC201_IN_SEL_V)<<(GPIO_FUNC201_IN_SEL_S))
+#define GPIO_FUNC201_IN_SEL_V  0x3F
+#define GPIO_FUNC201_IN_SEL_S  0
+
+#define GPIO_FUNC202_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0458)
+
+/* GPIO_SIG202_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG202_IN_SEL    (BIT(7))
+#define GPIO_SIG202_IN_SEL_M  (BIT(7))
+#define GPIO_SIG202_IN_SEL_V  0x1
+#define GPIO_SIG202_IN_SEL_S  7
+
+/* GPIO_FUNC202_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC202_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC202_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC202_IN_INV_SEL_V  0x1
+#define GPIO_FUNC202_IN_INV_SEL_S  6
+
+/* GPIO_FUNC202_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC202_IN_SEL    0x0000003F
+#define GPIO_FUNC202_IN_SEL_M  ((GPIO_FUNC202_IN_SEL_V)<<(GPIO_FUNC202_IN_SEL_S))
+#define GPIO_FUNC202_IN_SEL_V  0x3F
+#define GPIO_FUNC202_IN_SEL_S  0
+
+#define GPIO_FUNC203_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x045c)
+
+/* GPIO_SIG203_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG203_IN_SEL    (BIT(7))
+#define GPIO_SIG203_IN_SEL_M  (BIT(7))
+#define GPIO_SIG203_IN_SEL_V  0x1
+#define GPIO_SIG203_IN_SEL_S  7
+
+/* GPIO_FUNC203_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC203_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC203_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC203_IN_INV_SEL_V  0x1
+#define GPIO_FUNC203_IN_INV_SEL_S  6
+
+/* GPIO_FUNC203_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC203_IN_SEL    0x0000003F
+#define GPIO_FUNC203_IN_SEL_M  ((GPIO_FUNC203_IN_SEL_V)<<(GPIO_FUNC203_IN_SEL_S))
+#define GPIO_FUNC203_IN_SEL_V  0x3F
+#define GPIO_FUNC203_IN_SEL_S  0
+
+#define GPIO_FUNC204_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0460)
+
+/* GPIO_SIG204_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG204_IN_SEL    (BIT(7))
+#define GPIO_SIG204_IN_SEL_M  (BIT(7))
+#define GPIO_SIG204_IN_SEL_V  0x1
+#define GPIO_SIG204_IN_SEL_S  7
+
+/* GPIO_FUNC204_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC204_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC204_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC204_IN_INV_SEL_V  0x1
+#define GPIO_FUNC204_IN_INV_SEL_S  6
+
+/* GPIO_FUNC204_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC204_IN_SEL    0x0000003F
+#define GPIO_FUNC204_IN_SEL_M  ((GPIO_FUNC204_IN_SEL_V)<<(GPIO_FUNC204_IN_SEL_S))
+#define GPIO_FUNC204_IN_SEL_V  0x3F
+#define GPIO_FUNC204_IN_SEL_S  0
+
+#define GPIO_FUNC205_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0464)
+
+/* GPIO_SIG205_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG205_IN_SEL    (BIT(7))
+#define GPIO_SIG205_IN_SEL_M  (BIT(7))
+#define GPIO_SIG205_IN_SEL_V  0x1
+#define GPIO_SIG205_IN_SEL_S  7
+
+/* GPIO_FUNC205_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC205_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC205_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC205_IN_INV_SEL_V  0x1
+#define GPIO_FUNC205_IN_INV_SEL_S  6
+
+/* GPIO_FUNC205_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC205_IN_SEL    0x0000003F
+#define GPIO_FUNC205_IN_SEL_M  ((GPIO_FUNC205_IN_SEL_V)<<(GPIO_FUNC205_IN_SEL_S))
+#define GPIO_FUNC205_IN_SEL_V  0x3F
+#define GPIO_FUNC205_IN_SEL_S  0
+
+#define GPIO_FUNC206_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0468)
+
+/* GPIO_SIG206_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG206_IN_SEL    (BIT(7))
+#define GPIO_SIG206_IN_SEL_M  (BIT(7))
+#define GPIO_SIG206_IN_SEL_V  0x1
+#define GPIO_SIG206_IN_SEL_S  7
+
+/* GPIO_FUNC206_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC206_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC206_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC206_IN_INV_SEL_V  0x1
+#define GPIO_FUNC206_IN_INV_SEL_S  6
+
+/* GPIO_FUNC206_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC206_IN_SEL    0x0000003F
+#define GPIO_FUNC206_IN_SEL_M  ((GPIO_FUNC206_IN_SEL_V)<<(GPIO_FUNC206_IN_SEL_S))
+#define GPIO_FUNC206_IN_SEL_V  0x3F
+#define GPIO_FUNC206_IN_SEL_S  0
+
+#define GPIO_FUNC207_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x046c)
+
+/* GPIO_SIG207_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG207_IN_SEL    (BIT(7))
+#define GPIO_SIG207_IN_SEL_M  (BIT(7))
+#define GPIO_SIG207_IN_SEL_V  0x1
+#define GPIO_SIG207_IN_SEL_S  7
+
+/* GPIO_FUNC207_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC207_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC207_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC207_IN_INV_SEL_V  0x1
+#define GPIO_FUNC207_IN_INV_SEL_S  6
+
+/* GPIO_FUNC207_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC207_IN_SEL    0x0000003F
+#define GPIO_FUNC207_IN_SEL_M  ((GPIO_FUNC207_IN_SEL_V)<<(GPIO_FUNC207_IN_SEL_S))
+#define GPIO_FUNC207_IN_SEL_V  0x3F
+#define GPIO_FUNC207_IN_SEL_S  0
+
+#define GPIO_FUNC208_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0470)
+
+/* GPIO_SIG208_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG208_IN_SEL    (BIT(7))
+#define GPIO_SIG208_IN_SEL_M  (BIT(7))
+#define GPIO_SIG208_IN_SEL_V  0x1
+#define GPIO_SIG208_IN_SEL_S  7
+
+/* GPIO_FUNC208_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC208_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC208_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC208_IN_INV_SEL_V  0x1
+#define GPIO_FUNC208_IN_INV_SEL_S  6
+
+/* GPIO_FUNC208_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC208_IN_SEL    0x0000003F
+#define GPIO_FUNC208_IN_SEL_M  ((GPIO_FUNC208_IN_SEL_V)<<(GPIO_FUNC208_IN_SEL_S))
+#define GPIO_FUNC208_IN_SEL_V  0x3F
+#define GPIO_FUNC208_IN_SEL_S  0
+
+#define GPIO_FUNC209_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0474)
+
+/* GPIO_SIG209_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG209_IN_SEL    (BIT(7))
+#define GPIO_SIG209_IN_SEL_M  (BIT(7))
+#define GPIO_SIG209_IN_SEL_V  0x1
+#define GPIO_SIG209_IN_SEL_S  7
+
+/* GPIO_FUNC209_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC209_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC209_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC209_IN_INV_SEL_V  0x1
+#define GPIO_FUNC209_IN_INV_SEL_S  6
+
+/* GPIO_FUNC209_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC209_IN_SEL    0x0000003F
+#define GPIO_FUNC209_IN_SEL_M  ((GPIO_FUNC209_IN_SEL_V)<<(GPIO_FUNC209_IN_SEL_S))
+#define GPIO_FUNC209_IN_SEL_V  0x3F
+#define GPIO_FUNC209_IN_SEL_S  0
+
+#define GPIO_FUNC210_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0478)
+
+/* GPIO_SIG210_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG210_IN_SEL    (BIT(7))
+#define GPIO_SIG210_IN_SEL_M  (BIT(7))
+#define GPIO_SIG210_IN_SEL_V  0x1
+#define GPIO_SIG210_IN_SEL_S  7
+
+/* GPIO_FUNC210_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC210_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC210_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC210_IN_INV_SEL_V  0x1
+#define GPIO_FUNC210_IN_INV_SEL_S  6
+
+/* GPIO_FUNC210_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC210_IN_SEL    0x0000003F
+#define GPIO_FUNC210_IN_SEL_M  ((GPIO_FUNC210_IN_SEL_V)<<(GPIO_FUNC210_IN_SEL_S))
+#define GPIO_FUNC210_IN_SEL_V  0x3F
+#define GPIO_FUNC210_IN_SEL_S  0
+
+#define GPIO_FUNC211_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x047c)
+
+/* GPIO_SIG211_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG211_IN_SEL    (BIT(7))
+#define GPIO_SIG211_IN_SEL_M  (BIT(7))
+#define GPIO_SIG211_IN_SEL_V  0x1
+#define GPIO_SIG211_IN_SEL_S  7
+
+/* GPIO_FUNC211_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC211_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC211_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC211_IN_INV_SEL_V  0x1
+#define GPIO_FUNC211_IN_INV_SEL_S  6
+
+/* GPIO_FUNC211_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC211_IN_SEL    0x0000003F
+#define GPIO_FUNC211_IN_SEL_M  ((GPIO_FUNC211_IN_SEL_V)<<(GPIO_FUNC211_IN_SEL_S))
+#define GPIO_FUNC211_IN_SEL_V  0x3F
+#define GPIO_FUNC211_IN_SEL_S  0
+
+#define GPIO_FUNC212_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0480)
+
+/* GPIO_SIG212_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG212_IN_SEL    (BIT(7))
+#define GPIO_SIG212_IN_SEL_M  (BIT(7))
+#define GPIO_SIG212_IN_SEL_V  0x1
+#define GPIO_SIG212_IN_SEL_S  7
+
+/* GPIO_FUNC212_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC212_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC212_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC212_IN_INV_SEL_V  0x1
+#define GPIO_FUNC212_IN_INV_SEL_S  6
+
+/* GPIO_FUNC212_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC212_IN_SEL    0x0000003F
+#define GPIO_FUNC212_IN_SEL_M  ((GPIO_FUNC212_IN_SEL_V)<<(GPIO_FUNC212_IN_SEL_S))
+#define GPIO_FUNC212_IN_SEL_V  0x3F
+#define GPIO_FUNC212_IN_SEL_S  0
+
+#define GPIO_FUNC213_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0484)
+
+/* GPIO_SIG213_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG213_IN_SEL    (BIT(7))
+#define GPIO_SIG213_IN_SEL_M  (BIT(7))
+#define GPIO_SIG213_IN_SEL_V  0x1
+#define GPIO_SIG213_IN_SEL_S  7
+
+/* GPIO_FUNC213_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC213_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC213_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC213_IN_INV_SEL_V  0x1
+#define GPIO_FUNC213_IN_INV_SEL_S  6
+
+/* GPIO_FUNC213_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC213_IN_SEL    0x0000003F
+#define GPIO_FUNC213_IN_SEL_M  ((GPIO_FUNC213_IN_SEL_V)<<(GPIO_FUNC213_IN_SEL_S))
+#define GPIO_FUNC213_IN_SEL_V  0x3F
+#define GPIO_FUNC213_IN_SEL_S  0
+
+#define GPIO_FUNC214_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0488)
+
+/* GPIO_SIG214_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG214_IN_SEL    (BIT(7))
+#define GPIO_SIG214_IN_SEL_M  (BIT(7))
+#define GPIO_SIG214_IN_SEL_V  0x1
+#define GPIO_SIG214_IN_SEL_S  7
+
+/* GPIO_FUNC214_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC214_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC214_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC214_IN_INV_SEL_V  0x1
+#define GPIO_FUNC214_IN_INV_SEL_S  6
+
+/* GPIO_FUNC214_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC214_IN_SEL    0x0000003F
+#define GPIO_FUNC214_IN_SEL_M  ((GPIO_FUNC214_IN_SEL_V)<<(GPIO_FUNC214_IN_SEL_S))
+#define GPIO_FUNC214_IN_SEL_V  0x3F
+#define GPIO_FUNC214_IN_SEL_S  0
+
+#define GPIO_FUNC215_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x048c)
+
+/* GPIO_SIG215_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG215_IN_SEL    (BIT(7))
+#define GPIO_SIG215_IN_SEL_M  (BIT(7))
+#define GPIO_SIG215_IN_SEL_V  0x1
+#define GPIO_SIG215_IN_SEL_S  7
+
+/* GPIO_FUNC215_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC215_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC215_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC215_IN_INV_SEL_V  0x1
+#define GPIO_FUNC215_IN_INV_SEL_S  6
+
+/* GPIO_FUNC215_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC215_IN_SEL    0x0000003F
+#define GPIO_FUNC215_IN_SEL_M  ((GPIO_FUNC215_IN_SEL_V)<<(GPIO_FUNC215_IN_SEL_S))
+#define GPIO_FUNC215_IN_SEL_V  0x3F
+#define GPIO_FUNC215_IN_SEL_S  0
+
+#define GPIO_FUNC216_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0490)
+
+/* GPIO_SIG216_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG216_IN_SEL    (BIT(7))
+#define GPIO_SIG216_IN_SEL_M  (BIT(7))
+#define GPIO_SIG216_IN_SEL_V  0x1
+#define GPIO_SIG216_IN_SEL_S  7
+
+/* GPIO_FUNC216_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC216_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC216_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC216_IN_INV_SEL_V  0x1
+#define GPIO_FUNC216_IN_INV_SEL_S  6
+
+/* GPIO_FUNC216_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC216_IN_SEL    0x0000003F
+#define GPIO_FUNC216_IN_SEL_M  ((GPIO_FUNC216_IN_SEL_V)<<(GPIO_FUNC216_IN_SEL_S))
+#define GPIO_FUNC216_IN_SEL_V  0x3F
+#define GPIO_FUNC216_IN_SEL_S  0
+
+#define GPIO_FUNC217_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0494)
+
+/* GPIO_SIG217_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG217_IN_SEL    (BIT(7))
+#define GPIO_SIG217_IN_SEL_M  (BIT(7))
+#define GPIO_SIG217_IN_SEL_V  0x1
+#define GPIO_SIG217_IN_SEL_S  7
+
+/* GPIO_FUNC217_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC217_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC217_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC217_IN_INV_SEL_V  0x1
+#define GPIO_FUNC217_IN_INV_SEL_S  6
+
+/* GPIO_FUNC217_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC217_IN_SEL    0x0000003F
+#define GPIO_FUNC217_IN_SEL_M  ((GPIO_FUNC217_IN_SEL_V)<<(GPIO_FUNC217_IN_SEL_S))
+#define GPIO_FUNC217_IN_SEL_V  0x3F
+#define GPIO_FUNC217_IN_SEL_S  0
+
+#define GPIO_FUNC218_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0498)
+
+/* GPIO_SIG218_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG218_IN_SEL    (BIT(7))
+#define GPIO_SIG218_IN_SEL_M  (BIT(7))
+#define GPIO_SIG218_IN_SEL_V  0x1
+#define GPIO_SIG218_IN_SEL_S  7
+
+/* GPIO_FUNC218_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC218_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC218_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC218_IN_INV_SEL_V  0x1
+#define GPIO_FUNC218_IN_INV_SEL_S  6
+
+/* GPIO_FUNC218_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC218_IN_SEL    0x0000003F
+#define GPIO_FUNC218_IN_SEL_M  ((GPIO_FUNC218_IN_SEL_V)<<(GPIO_FUNC218_IN_SEL_S))
+#define GPIO_FUNC218_IN_SEL_V  0x3F
+#define GPIO_FUNC218_IN_SEL_S  0
+
+#define GPIO_FUNC219_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x049c)
+
+/* GPIO_SIG219_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG219_IN_SEL    (BIT(7))
+#define GPIO_SIG219_IN_SEL_M  (BIT(7))
+#define GPIO_SIG219_IN_SEL_V  0x1
+#define GPIO_SIG219_IN_SEL_S  7
+
+/* GPIO_FUNC219_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC219_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC219_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC219_IN_INV_SEL_V  0x1
+#define GPIO_FUNC219_IN_INV_SEL_S  6
+
+/* GPIO_FUNC219_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC219_IN_SEL    0x0000003F
+#define GPIO_FUNC219_IN_SEL_M  ((GPIO_FUNC219_IN_SEL_V)<<(GPIO_FUNC219_IN_SEL_S))
+#define GPIO_FUNC219_IN_SEL_V  0x3F
+#define GPIO_FUNC219_IN_SEL_S  0
+
+#define GPIO_FUNC220_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04a0)
+
+/* GPIO_SIG220_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG220_IN_SEL    (BIT(7))
+#define GPIO_SIG220_IN_SEL_M  (BIT(7))
+#define GPIO_SIG220_IN_SEL_V  0x1
+#define GPIO_SIG220_IN_SEL_S  7
+
+/* GPIO_FUNC220_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC220_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC220_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC220_IN_INV_SEL_V  0x1
+#define GPIO_FUNC220_IN_INV_SEL_S  6
+
+/* GPIO_FUNC220_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC220_IN_SEL    0x0000003F
+#define GPIO_FUNC220_IN_SEL_M  ((GPIO_FUNC220_IN_SEL_V)<<(GPIO_FUNC220_IN_SEL_S))
+#define GPIO_FUNC220_IN_SEL_V  0x3F
+#define GPIO_FUNC220_IN_SEL_S  0
+
+#define GPIO_FUNC221_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04a4)
+
+/* GPIO_SIG221_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG221_IN_SEL    (BIT(7))
+#define GPIO_SIG221_IN_SEL_M  (BIT(7))
+#define GPIO_SIG221_IN_SEL_V  0x1
+#define GPIO_SIG221_IN_SEL_S  7
+
+/* GPIO_FUNC221_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC221_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC221_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC221_IN_INV_SEL_V  0x1
+#define GPIO_FUNC221_IN_INV_SEL_S  6
+
+/* GPIO_FUNC221_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC221_IN_SEL    0x0000003F
+#define GPIO_FUNC221_IN_SEL_M  ((GPIO_FUNC221_IN_SEL_V)<<(GPIO_FUNC221_IN_SEL_S))
+#define GPIO_FUNC221_IN_SEL_V  0x3F
+#define GPIO_FUNC221_IN_SEL_S  0
+
+#define GPIO_FUNC222_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04a8)
+
+/* GPIO_SIG222_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG222_IN_SEL    (BIT(7))
+#define GPIO_SIG222_IN_SEL_M  (BIT(7))
+#define GPIO_SIG222_IN_SEL_V  0x1
+#define GPIO_SIG222_IN_SEL_S  7
+
+/* GPIO_FUNC222_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC222_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC222_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC222_IN_INV_SEL_V  0x1
+#define GPIO_FUNC222_IN_INV_SEL_S  6
+
+/* GPIO_FUNC222_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC222_IN_SEL    0x0000003F
+#define GPIO_FUNC222_IN_SEL_M  ((GPIO_FUNC222_IN_SEL_V)<<(GPIO_FUNC222_IN_SEL_S))
+#define GPIO_FUNC222_IN_SEL_V  0x3F
+#define GPIO_FUNC222_IN_SEL_S  0
+
+#define GPIO_FUNC223_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04ac)
+
+/* GPIO_SIG223_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG223_IN_SEL    (BIT(7))
+#define GPIO_SIG223_IN_SEL_M  (BIT(7))
+#define GPIO_SIG223_IN_SEL_V  0x1
+#define GPIO_SIG223_IN_SEL_S  7
+
+/* GPIO_FUNC223_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC223_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC223_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC223_IN_INV_SEL_V  0x1
+#define GPIO_FUNC223_IN_INV_SEL_S  6
+
+/* GPIO_FUNC223_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC223_IN_SEL    0x0000003F
+#define GPIO_FUNC223_IN_SEL_M  ((GPIO_FUNC223_IN_SEL_V)<<(GPIO_FUNC223_IN_SEL_S))
+#define GPIO_FUNC223_IN_SEL_V  0x3F
+#define GPIO_FUNC223_IN_SEL_S  0
+
+#define GPIO_FUNC224_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04b0)
+
+/* GPIO_SIG224_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG224_IN_SEL    (BIT(7))
+#define GPIO_SIG224_IN_SEL_M  (BIT(7))
+#define GPIO_SIG224_IN_SEL_V  0x1
+#define GPIO_SIG224_IN_SEL_S  7
+
+/* GPIO_FUNC224_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC224_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC224_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC224_IN_INV_SEL_V  0x1
+#define GPIO_FUNC224_IN_INV_SEL_S  6
+
+/* GPIO_FUNC224_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC224_IN_SEL    0x0000003F
+#define GPIO_FUNC224_IN_SEL_M  ((GPIO_FUNC224_IN_SEL_V)<<(GPIO_FUNC224_IN_SEL_S))
+#define GPIO_FUNC224_IN_SEL_V  0x3F
+#define GPIO_FUNC224_IN_SEL_S  0
+
+#define GPIO_FUNC225_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04b4)
+
+/* GPIO_SIG225_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG225_IN_SEL    (BIT(7))
+#define GPIO_SIG225_IN_SEL_M  (BIT(7))
+#define GPIO_SIG225_IN_SEL_V  0x1
+#define GPIO_SIG225_IN_SEL_S  7
+
+/* GPIO_FUNC225_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC225_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC225_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC225_IN_INV_SEL_V  0x1
+#define GPIO_FUNC225_IN_INV_SEL_S  6
+
+/* GPIO_FUNC225_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC225_IN_SEL    0x0000003F
+#define GPIO_FUNC225_IN_SEL_M  ((GPIO_FUNC225_IN_SEL_V)<<(GPIO_FUNC225_IN_SEL_S))
+#define GPIO_FUNC225_IN_SEL_V  0x3F
+#define GPIO_FUNC225_IN_SEL_S  0
+
+#define GPIO_FUNC226_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04b8)
+
+/* GPIO_SIG226_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG226_IN_SEL    (BIT(7))
+#define GPIO_SIG226_IN_SEL_M  (BIT(7))
+#define GPIO_SIG226_IN_SEL_V  0x1
+#define GPIO_SIG226_IN_SEL_S  7
+
+/* GPIO_FUNC226_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC226_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC226_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC226_IN_INV_SEL_V  0x1
+#define GPIO_FUNC226_IN_INV_SEL_S  6
+
+/* GPIO_FUNC226_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC226_IN_SEL    0x0000003F
+#define GPIO_FUNC226_IN_SEL_M  ((GPIO_FUNC226_IN_SEL_V)<<(GPIO_FUNC226_IN_SEL_S))
+#define GPIO_FUNC226_IN_SEL_V  0x3F
+#define GPIO_FUNC226_IN_SEL_S  0
+
+#define GPIO_FUNC227_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04bc)
+
+/* GPIO_SIG227_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG227_IN_SEL    (BIT(7))
+#define GPIO_SIG227_IN_SEL_M  (BIT(7))
+#define GPIO_SIG227_IN_SEL_V  0x1
+#define GPIO_SIG227_IN_SEL_S  7
+
+/* GPIO_FUNC227_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC227_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC227_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC227_IN_INV_SEL_V  0x1
+#define GPIO_FUNC227_IN_INV_SEL_S  6
+
+/* GPIO_FUNC227_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC227_IN_SEL    0x0000003F
+#define GPIO_FUNC227_IN_SEL_M  ((GPIO_FUNC227_IN_SEL_V)<<(GPIO_FUNC227_IN_SEL_S))
+#define GPIO_FUNC227_IN_SEL_V  0x3F
+#define GPIO_FUNC227_IN_SEL_S  0
+
+#define GPIO_FUNC228_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04c0)
+
+/* GPIO_SIG228_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG228_IN_SEL    (BIT(7))
+#define GPIO_SIG228_IN_SEL_M  (BIT(7))
+#define GPIO_SIG228_IN_SEL_V  0x1
+#define GPIO_SIG228_IN_SEL_S  7
+
+/* GPIO_FUNC228_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC228_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC228_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC228_IN_INV_SEL_V  0x1
+#define GPIO_FUNC228_IN_INV_SEL_S  6
+
+/* GPIO_FUNC228_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC228_IN_SEL    0x0000003F
+#define GPIO_FUNC228_IN_SEL_M  ((GPIO_FUNC228_IN_SEL_V)<<(GPIO_FUNC228_IN_SEL_S))
+#define GPIO_FUNC228_IN_SEL_V  0x3F
+#define GPIO_FUNC228_IN_SEL_S  0
+
+#define GPIO_FUNC229_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04c4)
+
+/* GPIO_SIG229_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG229_IN_SEL    (BIT(7))
+#define GPIO_SIG229_IN_SEL_M  (BIT(7))
+#define GPIO_SIG229_IN_SEL_V  0x1
+#define GPIO_SIG229_IN_SEL_S  7
+
+/* GPIO_FUNC229_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC229_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC229_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC229_IN_INV_SEL_V  0x1
+#define GPIO_FUNC229_IN_INV_SEL_S  6
+
+/* GPIO_FUNC229_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC229_IN_SEL    0x0000003F
+#define GPIO_FUNC229_IN_SEL_M  ((GPIO_FUNC229_IN_SEL_V)<<(GPIO_FUNC229_IN_SEL_S))
+#define GPIO_FUNC229_IN_SEL_V  0x3F
+#define GPIO_FUNC229_IN_SEL_S  0
+
+#define GPIO_FUNC230_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04c8)
+
+/* GPIO_SIG230_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG230_IN_SEL    (BIT(7))
+#define GPIO_SIG230_IN_SEL_M  (BIT(7))
+#define GPIO_SIG230_IN_SEL_V  0x1
+#define GPIO_SIG230_IN_SEL_S  7
+
+/* GPIO_FUNC230_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC230_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC230_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC230_IN_INV_SEL_V  0x1
+#define GPIO_FUNC230_IN_INV_SEL_S  6
+
+/* GPIO_FUNC230_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC230_IN_SEL    0x0000003F
+#define GPIO_FUNC230_IN_SEL_M  ((GPIO_FUNC230_IN_SEL_V)<<(GPIO_FUNC230_IN_SEL_S))
+#define GPIO_FUNC230_IN_SEL_V  0x3F
+#define GPIO_FUNC230_IN_SEL_S  0
+
+#define GPIO_FUNC231_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04cc)
+
+/* GPIO_SIG231_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG231_IN_SEL    (BIT(7))
+#define GPIO_SIG231_IN_SEL_M  (BIT(7))
+#define GPIO_SIG231_IN_SEL_V  0x1
+#define GPIO_SIG231_IN_SEL_S  7
+
+/* GPIO_FUNC231_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC231_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC231_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC231_IN_INV_SEL_V  0x1
+#define GPIO_FUNC231_IN_INV_SEL_S  6
+
+/* GPIO_FUNC231_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC231_IN_SEL    0x0000003F
+#define GPIO_FUNC231_IN_SEL_M  ((GPIO_FUNC231_IN_SEL_V)<<(GPIO_FUNC231_IN_SEL_S))
+#define GPIO_FUNC231_IN_SEL_V  0x3F
+#define GPIO_FUNC231_IN_SEL_S  0
+
+#define GPIO_FUNC232_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04d0)
+
+/* GPIO_SIG232_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG232_IN_SEL    (BIT(7))
+#define GPIO_SIG232_IN_SEL_M  (BIT(7))
+#define GPIO_SIG232_IN_SEL_V  0x1
+#define GPIO_SIG232_IN_SEL_S  7
+
+/* GPIO_FUNC232_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC232_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC232_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC232_IN_INV_SEL_V  0x1
+#define GPIO_FUNC232_IN_INV_SEL_S  6
+
+/* GPIO_FUNC232_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC232_IN_SEL    0x0000003F
+#define GPIO_FUNC232_IN_SEL_M  ((GPIO_FUNC232_IN_SEL_V)<<(GPIO_FUNC232_IN_SEL_S))
+#define GPIO_FUNC232_IN_SEL_V  0x3F
+#define GPIO_FUNC232_IN_SEL_S  0
+
+#define GPIO_FUNC233_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04d4)
+
+/* GPIO_SIG233_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG233_IN_SEL    (BIT(7))
+#define GPIO_SIG233_IN_SEL_M  (BIT(7))
+#define GPIO_SIG233_IN_SEL_V  0x1
+#define GPIO_SIG233_IN_SEL_S  7
+
+/* GPIO_FUNC233_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC233_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC233_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC233_IN_INV_SEL_V  0x1
+#define GPIO_FUNC233_IN_INV_SEL_S  6
+
+/* GPIO_FUNC233_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC233_IN_SEL    0x0000003F
+#define GPIO_FUNC233_IN_SEL_M  ((GPIO_FUNC233_IN_SEL_V)<<(GPIO_FUNC233_IN_SEL_S))
+#define GPIO_FUNC233_IN_SEL_V  0x3F
+#define GPIO_FUNC233_IN_SEL_S  0
+
+#define GPIO_FUNC234_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04d8)
+
+/* GPIO_SIG234_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG234_IN_SEL    (BIT(7))
+#define GPIO_SIG234_IN_SEL_M  (BIT(7))
+#define GPIO_SIG234_IN_SEL_V  0x1
+#define GPIO_SIG234_IN_SEL_S  7
+
+/* GPIO_FUNC234_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC234_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC234_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC234_IN_INV_SEL_V  0x1
+#define GPIO_FUNC234_IN_INV_SEL_S  6
+
+/* GPIO_FUNC234_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC234_IN_SEL    0x0000003F
+#define GPIO_FUNC234_IN_SEL_M  ((GPIO_FUNC234_IN_SEL_V)<<(GPIO_FUNC234_IN_SEL_S))
+#define GPIO_FUNC234_IN_SEL_V  0x3F
+#define GPIO_FUNC234_IN_SEL_S  0
+
+#define GPIO_FUNC235_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04dc)
+
+/* GPIO_SIG235_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG235_IN_SEL    (BIT(7))
+#define GPIO_SIG235_IN_SEL_M  (BIT(7))
+#define GPIO_SIG235_IN_SEL_V  0x1
+#define GPIO_SIG235_IN_SEL_S  7
+
+/* GPIO_FUNC235_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC235_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC235_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC235_IN_INV_SEL_V  0x1
+#define GPIO_FUNC235_IN_INV_SEL_S  6
+
+/* GPIO_FUNC235_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC235_IN_SEL    0x0000003F
+#define GPIO_FUNC235_IN_SEL_M  ((GPIO_FUNC235_IN_SEL_V)<<(GPIO_FUNC235_IN_SEL_S))
+#define GPIO_FUNC235_IN_SEL_V  0x3F
+#define GPIO_FUNC235_IN_SEL_S  0
+
+#define GPIO_FUNC236_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04e0)
+
+/* GPIO_SIG236_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG236_IN_SEL    (BIT(7))
+#define GPIO_SIG236_IN_SEL_M  (BIT(7))
+#define GPIO_SIG236_IN_SEL_V  0x1
+#define GPIO_SIG236_IN_SEL_S  7
+
+/* GPIO_FUNC236_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC236_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC236_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC236_IN_INV_SEL_V  0x1
+#define GPIO_FUNC236_IN_INV_SEL_S  6
+
+/* GPIO_FUNC236_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC236_IN_SEL    0x0000003F
+#define GPIO_FUNC236_IN_SEL_M  ((GPIO_FUNC236_IN_SEL_V)<<(GPIO_FUNC236_IN_SEL_S))
+#define GPIO_FUNC236_IN_SEL_V  0x3F
+#define GPIO_FUNC236_IN_SEL_S  0
+
+#define GPIO_FUNC237_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04e4)
+
+/* GPIO_SIG237_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG237_IN_SEL    (BIT(7))
+#define GPIO_SIG237_IN_SEL_M  (BIT(7))
+#define GPIO_SIG237_IN_SEL_V  0x1
+#define GPIO_SIG237_IN_SEL_S  7
+
+/* GPIO_FUNC237_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC237_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC237_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC237_IN_INV_SEL_V  0x1
+#define GPIO_FUNC237_IN_INV_SEL_S  6
+
+/* GPIO_FUNC237_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC237_IN_SEL    0x0000003F
+#define GPIO_FUNC237_IN_SEL_M  ((GPIO_FUNC237_IN_SEL_V)<<(GPIO_FUNC237_IN_SEL_S))
+#define GPIO_FUNC237_IN_SEL_V  0x3F
+#define GPIO_FUNC237_IN_SEL_S  0
+
+#define GPIO_FUNC238_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04e8)
+
+/* GPIO_SIG238_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG238_IN_SEL    (BIT(7))
+#define GPIO_SIG238_IN_SEL_M  (BIT(7))
+#define GPIO_SIG238_IN_SEL_V  0x1
+#define GPIO_SIG238_IN_SEL_S  7
+
+/* GPIO_FUNC238_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC238_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC238_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC238_IN_INV_SEL_V  0x1
+#define GPIO_FUNC238_IN_INV_SEL_S  6
+
+/* GPIO_FUNC238_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC238_IN_SEL    0x0000003F
+#define GPIO_FUNC238_IN_SEL_M  ((GPIO_FUNC238_IN_SEL_V)<<(GPIO_FUNC238_IN_SEL_S))
+#define GPIO_FUNC238_IN_SEL_V  0x3F
+#define GPIO_FUNC238_IN_SEL_S  0
+
+#define GPIO_FUNC239_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04ec)
+
+/* GPIO_SIG239_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG239_IN_SEL    (BIT(7))
+#define GPIO_SIG239_IN_SEL_M  (BIT(7))
+#define GPIO_SIG239_IN_SEL_V  0x1
+#define GPIO_SIG239_IN_SEL_S  7
+
+/* GPIO_FUNC239_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC239_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC239_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC239_IN_INV_SEL_V  0x1
+#define GPIO_FUNC239_IN_INV_SEL_S  6
+
+/* GPIO_FUNC239_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC239_IN_SEL    0x0000003F
+#define GPIO_FUNC239_IN_SEL_M  ((GPIO_FUNC239_IN_SEL_V)<<(GPIO_FUNC239_IN_SEL_S))
+#define GPIO_FUNC239_IN_SEL_V  0x3F
+#define GPIO_FUNC239_IN_SEL_S  0
+
+#define GPIO_FUNC240_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04f0)
+
+/* GPIO_SIG240_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG240_IN_SEL    (BIT(7))
+#define GPIO_SIG240_IN_SEL_M  (BIT(7))
+#define GPIO_SIG240_IN_SEL_V  0x1
+#define GPIO_SIG240_IN_SEL_S  7
+
+/* GPIO_FUNC240_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC240_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC240_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC240_IN_INV_SEL_V  0x1
+#define GPIO_FUNC240_IN_INV_SEL_S  6
+
+/* GPIO_FUNC240_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC240_IN_SEL    0x0000003F
+#define GPIO_FUNC240_IN_SEL_M  ((GPIO_FUNC240_IN_SEL_V)<<(GPIO_FUNC240_IN_SEL_S))
+#define GPIO_FUNC240_IN_SEL_V  0x3F
+#define GPIO_FUNC240_IN_SEL_S  0
+
+#define GPIO_FUNC241_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04f4)
+
+/* GPIO_SIG241_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG241_IN_SEL    (BIT(7))
+#define GPIO_SIG241_IN_SEL_M  (BIT(7))
+#define GPIO_SIG241_IN_SEL_V  0x1
+#define GPIO_SIG241_IN_SEL_S  7
+
+/* GPIO_FUNC241_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC241_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC241_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC241_IN_INV_SEL_V  0x1
+#define GPIO_FUNC241_IN_INV_SEL_S  6
+
+/* GPIO_FUNC241_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC241_IN_SEL    0x0000003F
+#define GPIO_FUNC241_IN_SEL_M  ((GPIO_FUNC241_IN_SEL_V)<<(GPIO_FUNC241_IN_SEL_S))
+#define GPIO_FUNC241_IN_SEL_V  0x3F
+#define GPIO_FUNC241_IN_SEL_S  0
+
+#define GPIO_FUNC242_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04f8)
+
+/* GPIO_SIG242_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG242_IN_SEL    (BIT(7))
+#define GPIO_SIG242_IN_SEL_M  (BIT(7))
+#define GPIO_SIG242_IN_SEL_V  0x1
+#define GPIO_SIG242_IN_SEL_S  7
+
+/* GPIO_FUNC242_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC242_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC242_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC242_IN_INV_SEL_V  0x1
+#define GPIO_FUNC242_IN_INV_SEL_S  6
+
+/* GPIO_FUNC242_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC242_IN_SEL    0x0000003F
+#define GPIO_FUNC242_IN_SEL_M  ((GPIO_FUNC242_IN_SEL_V)<<(GPIO_FUNC242_IN_SEL_S))
+#define GPIO_FUNC242_IN_SEL_V  0x3F
+#define GPIO_FUNC242_IN_SEL_S  0
+
+#define GPIO_FUNC243_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x04fc)
+
+/* GPIO_SIG243_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG243_IN_SEL    (BIT(7))
+#define GPIO_SIG243_IN_SEL_M  (BIT(7))
+#define GPIO_SIG243_IN_SEL_V  0x1
+#define GPIO_SIG243_IN_SEL_S  7
+
+/* GPIO_FUNC243_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC243_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC243_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC243_IN_INV_SEL_V  0x1
+#define GPIO_FUNC243_IN_INV_SEL_S  6
+
+/* GPIO_FUNC243_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC243_IN_SEL    0x0000003F
+#define GPIO_FUNC243_IN_SEL_M  ((GPIO_FUNC243_IN_SEL_V)<<(GPIO_FUNC243_IN_SEL_S))
+#define GPIO_FUNC243_IN_SEL_V  0x3F
+#define GPIO_FUNC243_IN_SEL_S  0
+
+#define GPIO_FUNC244_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0500)
+
+/* GPIO_SIG244_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG244_IN_SEL    (BIT(7))
+#define GPIO_SIG244_IN_SEL_M  (BIT(7))
+#define GPIO_SIG244_IN_SEL_V  0x1
+#define GPIO_SIG244_IN_SEL_S  7
+
+/* GPIO_FUNC244_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC244_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC244_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC244_IN_INV_SEL_V  0x1
+#define GPIO_FUNC244_IN_INV_SEL_S  6
+
+/* GPIO_FUNC244_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC244_IN_SEL    0x0000003F
+#define GPIO_FUNC244_IN_SEL_M  ((GPIO_FUNC244_IN_SEL_V)<<(GPIO_FUNC244_IN_SEL_S))
+#define GPIO_FUNC244_IN_SEL_V  0x3F
+#define GPIO_FUNC244_IN_SEL_S  0
+
+#define GPIO_FUNC245_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0504)
+
+/* GPIO_SIG245_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG245_IN_SEL    (BIT(7))
+#define GPIO_SIG245_IN_SEL_M  (BIT(7))
+#define GPIO_SIG245_IN_SEL_V  0x1
+#define GPIO_SIG245_IN_SEL_S  7
+
+/* GPIO_FUNC245_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC245_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC245_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC245_IN_INV_SEL_V  0x1
+#define GPIO_FUNC245_IN_INV_SEL_S  6
+
+/* GPIO_FUNC245_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC245_IN_SEL    0x0000003F
+#define GPIO_FUNC245_IN_SEL_M  ((GPIO_FUNC245_IN_SEL_V)<<(GPIO_FUNC245_IN_SEL_S))
+#define GPIO_FUNC245_IN_SEL_V  0x3F
+#define GPIO_FUNC245_IN_SEL_S  0
+
+#define GPIO_FUNC246_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0508)
+
+/* GPIO_SIG246_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG246_IN_SEL    (BIT(7))
+#define GPIO_SIG246_IN_SEL_M  (BIT(7))
+#define GPIO_SIG246_IN_SEL_V  0x1
+#define GPIO_SIG246_IN_SEL_S  7
+
+/* GPIO_FUNC246_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC246_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC246_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC246_IN_INV_SEL_V  0x1
+#define GPIO_FUNC246_IN_INV_SEL_S  6
+
+/* GPIO_FUNC246_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC246_IN_SEL    0x0000003F
+#define GPIO_FUNC246_IN_SEL_M  ((GPIO_FUNC246_IN_SEL_V)<<(GPIO_FUNC246_IN_SEL_S))
+#define GPIO_FUNC246_IN_SEL_V  0x3F
+#define GPIO_FUNC246_IN_SEL_S  0
+
+#define GPIO_FUNC247_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x050c)
+
+/* GPIO_SIG247_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG247_IN_SEL    (BIT(7))
+#define GPIO_SIG247_IN_SEL_M  (BIT(7))
+#define GPIO_SIG247_IN_SEL_V  0x1
+#define GPIO_SIG247_IN_SEL_S  7
+
+/* GPIO_FUNC247_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC247_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC247_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC247_IN_INV_SEL_V  0x1
+#define GPIO_FUNC247_IN_INV_SEL_S  6
+
+/* GPIO_FUNC247_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC247_IN_SEL    0x0000003F
+#define GPIO_FUNC247_IN_SEL_M  ((GPIO_FUNC247_IN_SEL_V)<<(GPIO_FUNC247_IN_SEL_S))
+#define GPIO_FUNC247_IN_SEL_V  0x3F
+#define GPIO_FUNC247_IN_SEL_S  0
+
+#define GPIO_FUNC248_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0510)
+
+/* GPIO_SIG248_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG248_IN_SEL    (BIT(7))
+#define GPIO_SIG248_IN_SEL_M  (BIT(7))
+#define GPIO_SIG248_IN_SEL_V  0x1
+#define GPIO_SIG248_IN_SEL_S  7
+
+/* GPIO_FUNC248_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC248_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC248_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC248_IN_INV_SEL_V  0x1
+#define GPIO_FUNC248_IN_INV_SEL_S  6
+
+/* GPIO_FUNC248_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC248_IN_SEL    0x0000003F
+#define GPIO_FUNC248_IN_SEL_M  ((GPIO_FUNC248_IN_SEL_V)<<(GPIO_FUNC248_IN_SEL_S))
+#define GPIO_FUNC248_IN_SEL_V  0x3F
+#define GPIO_FUNC248_IN_SEL_S  0
+
+#define GPIO_FUNC249_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0514)
+
+/* GPIO_SIG249_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG249_IN_SEL    (BIT(7))
+#define GPIO_SIG249_IN_SEL_M  (BIT(7))
+#define GPIO_SIG249_IN_SEL_V  0x1
+#define GPIO_SIG249_IN_SEL_S  7
+
+/* GPIO_FUNC249_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC249_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC249_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC249_IN_INV_SEL_V  0x1
+#define GPIO_FUNC249_IN_INV_SEL_S  6
+
+/* GPIO_FUNC249_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC249_IN_SEL    0x0000003F
+#define GPIO_FUNC249_IN_SEL_M  ((GPIO_FUNC249_IN_SEL_V)<<(GPIO_FUNC249_IN_SEL_S))
+#define GPIO_FUNC249_IN_SEL_V  0x3F
+#define GPIO_FUNC249_IN_SEL_S  0
+
+#define GPIO_FUNC250_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0518)
+
+/* GPIO_SIG250_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG250_IN_SEL    (BIT(7))
+#define GPIO_SIG250_IN_SEL_M  (BIT(7))
+#define GPIO_SIG250_IN_SEL_V  0x1
+#define GPIO_SIG250_IN_SEL_S  7
+
+/* GPIO_FUNC250_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC250_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC250_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC250_IN_INV_SEL_V  0x1
+#define GPIO_FUNC250_IN_INV_SEL_S  6
+
+/* GPIO_FUNC250_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC250_IN_SEL    0x0000003F
+#define GPIO_FUNC250_IN_SEL_M  ((GPIO_FUNC250_IN_SEL_V)<<(GPIO_FUNC250_IN_SEL_S))
+#define GPIO_FUNC250_IN_SEL_V  0x3F
+#define GPIO_FUNC250_IN_SEL_S  0
+
+#define GPIO_FUNC251_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x051c)
+
+/* GPIO_SIG251_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG251_IN_SEL    (BIT(7))
+#define GPIO_SIG251_IN_SEL_M  (BIT(7))
+#define GPIO_SIG251_IN_SEL_V  0x1
+#define GPIO_SIG251_IN_SEL_S  7
+
+/* GPIO_FUNC251_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC251_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC251_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC251_IN_INV_SEL_V  0x1
+#define GPIO_FUNC251_IN_INV_SEL_S  6
+
+/* GPIO_FUNC251_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC251_IN_SEL    0x0000003F
+#define GPIO_FUNC251_IN_SEL_M  ((GPIO_FUNC251_IN_SEL_V)<<(GPIO_FUNC251_IN_SEL_S))
+#define GPIO_FUNC251_IN_SEL_V  0x3F
+#define GPIO_FUNC251_IN_SEL_S  0
+
+#define GPIO_FUNC252_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0520)
+
+/* GPIO_SIG252_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG252_IN_SEL    (BIT(7))
+#define GPIO_SIG252_IN_SEL_M  (BIT(7))
+#define GPIO_SIG252_IN_SEL_V  0x1
+#define GPIO_SIG252_IN_SEL_S  7
+
+/* GPIO_FUNC252_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC252_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC252_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC252_IN_INV_SEL_V  0x1
+#define GPIO_FUNC252_IN_INV_SEL_S  6
+
+/* GPIO_FUNC252_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC252_IN_SEL    0x0000003F
+#define GPIO_FUNC252_IN_SEL_M  ((GPIO_FUNC252_IN_SEL_V)<<(GPIO_FUNC252_IN_SEL_S))
+#define GPIO_FUNC252_IN_SEL_V  0x3F
+#define GPIO_FUNC252_IN_SEL_S  0
+
+#define GPIO_FUNC253_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0524)
+
+/* GPIO_SIG253_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG253_IN_SEL    (BIT(7))
+#define GPIO_SIG253_IN_SEL_M  (BIT(7))
+#define GPIO_SIG253_IN_SEL_V  0x1
+#define GPIO_SIG253_IN_SEL_S  7
+
+/* GPIO_FUNC253_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC253_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC253_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC253_IN_INV_SEL_V  0x1
+#define GPIO_FUNC253_IN_INV_SEL_S  6
+
+/* GPIO_FUNC253_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC253_IN_SEL    0x0000003F
+#define GPIO_FUNC253_IN_SEL_M  ((GPIO_FUNC253_IN_SEL_V)<<(GPIO_FUNC253_IN_SEL_S))
+#define GPIO_FUNC253_IN_SEL_V  0x3F
+#define GPIO_FUNC253_IN_SEL_S  0
+
+#define GPIO_FUNC254_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0528)
+
+/* GPIO_SIG254_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG254_IN_SEL    (BIT(7))
+#define GPIO_SIG254_IN_SEL_M  (BIT(7))
+#define GPIO_SIG254_IN_SEL_V  0x1
+#define GPIO_SIG254_IN_SEL_S  7
+
+/* GPIO_FUNC254_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC254_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC254_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC254_IN_INV_SEL_V  0x1
+#define GPIO_FUNC254_IN_INV_SEL_S  6
+
+/* GPIO_FUNC254_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC254_IN_SEL    0x0000003F
+#define GPIO_FUNC254_IN_SEL_M  ((GPIO_FUNC254_IN_SEL_V)<<(GPIO_FUNC254_IN_SEL_S))
+#define GPIO_FUNC254_IN_SEL_V  0x3F
+#define GPIO_FUNC254_IN_SEL_S  0
+
+#define GPIO_FUNC255_IN_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x052c)
+
+/* GPIO_SIG255_IN_SEL : R/W ;bitpos:[7] ;default: x ; */
+/* Description: if the slow signal bypass the io matrix or not if you want
+ * setting the value to 1.
+ */
+
+#define GPIO_SIG255_IN_SEL    (BIT(7))
+#define GPIO_SIG255_IN_SEL_M  (BIT(7))
+#define GPIO_SIG255_IN_SEL_V  0x1
+#define GPIO_SIG255_IN_SEL_S  7
+
+/* GPIO_FUNC255_IN_INV_SEL : R/W ;bitpos:[6] ;default: x ; */
+/* Description: revert the value of the input if you want to revert please
+ * set the value to 1.
+ */
+
+#define GPIO_FUNC255_IN_INV_SEL    (BIT(6))
+#define GPIO_FUNC255_IN_INV_SEL_M  (BIT(6))
+#define GPIO_FUNC255_IN_INV_SEL_V  0x1
+#define GPIO_FUNC255_IN_INV_SEL_S  6
+
+/* GPIO_FUNC255_IN_SEL : R/W ;bitpos:[5:0] ;default: x ; */
+/* Description: select one of the 256 inputs */
+
+#define GPIO_FUNC255_IN_SEL    0x0000003F
+#define GPIO_FUNC255_IN_SEL_M  ((GPIO_FUNC255_IN_SEL_V)<<(GPIO_FUNC255_IN_SEL_S))
+#define GPIO_FUNC255_IN_SEL_V  0x3F
+#define GPIO_FUNC255_IN_SEL_S  0
+
+#define GPIO_FUNC0_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0530)
+
+/* GPIO_FUNC0_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC0_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC0_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC0_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC0_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC0_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC0_OEN_SEL    (BIT(10))
+#define GPIO_FUNC0_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC0_OEN_SEL_V  0x1
+#define GPIO_FUNC0_OEN_SEL_S  10
+
+/* GPIO_FUNC0_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC0_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC0_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC0_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC0_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC0_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC0_OUT_SEL    0x000001FF
+#define GPIO_FUNC0_OUT_SEL_M  ((GPIO_FUNC0_OUT_SEL_V)<<(GPIO_FUNC0_OUT_SEL_S))
+#define GPIO_FUNC0_OUT_SEL_V  0x1FF
+#define GPIO_FUNC0_OUT_SEL_S  0
+
+#define GPIO_FUNC1_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0534)
+
+/* GPIO_FUNC1_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC1_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC1_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC1_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC1_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC1_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC1_OEN_SEL    (BIT(10))
+#define GPIO_FUNC1_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC1_OEN_SEL_V  0x1
+#define GPIO_FUNC1_OEN_SEL_S  10
+
+/* GPIO_FUNC1_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC1_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC1_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC1_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC1_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC1_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC1_OUT_SEL    0x000001FF
+#define GPIO_FUNC1_OUT_SEL_M  ((GPIO_FUNC1_OUT_SEL_V)<<(GPIO_FUNC1_OUT_SEL_S))
+#define GPIO_FUNC1_OUT_SEL_V  0x1FF
+#define GPIO_FUNC1_OUT_SEL_S  0
+
+#define GPIO_FUNC2_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0538)
+
+/* GPIO_FUNC2_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC2_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC2_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC2_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC2_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC2_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC2_OEN_SEL    (BIT(10))
+#define GPIO_FUNC2_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC2_OEN_SEL_V  0x1
+#define GPIO_FUNC2_OEN_SEL_S  10
+
+/* GPIO_FUNC2_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC2_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC2_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC2_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC2_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC2_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC2_OUT_SEL    0x000001FF
+#define GPIO_FUNC2_OUT_SEL_M  ((GPIO_FUNC2_OUT_SEL_V)<<(GPIO_FUNC2_OUT_SEL_S))
+#define GPIO_FUNC2_OUT_SEL_V  0x1FF
+#define GPIO_FUNC2_OUT_SEL_S  0
+
+#define GPIO_FUNC3_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x053c)
+
+/* GPIO_FUNC3_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC3_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC3_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC3_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC3_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC3_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC3_OEN_SEL    (BIT(10))
+#define GPIO_FUNC3_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC3_OEN_SEL_V  0x1
+#define GPIO_FUNC3_OEN_SEL_S  10
+
+/* GPIO_FUNC3_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC3_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC3_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC3_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC3_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC3_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC3_OUT_SEL    0x000001FF
+#define GPIO_FUNC3_OUT_SEL_M  ((GPIO_FUNC3_OUT_SEL_V)<<(GPIO_FUNC3_OUT_SEL_S))
+#define GPIO_FUNC3_OUT_SEL_V  0x1FF
+#define GPIO_FUNC3_OUT_SEL_S  0
+
+#define GPIO_FUNC4_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0540)
+
+/* GPIO_FUNC4_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC4_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC4_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC4_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC4_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC4_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC4_OEN_SEL    (BIT(10))
+#define GPIO_FUNC4_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC4_OEN_SEL_V  0x1
+#define GPIO_FUNC4_OEN_SEL_S  10
+
+/* GPIO_FUNC4_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC4_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC4_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC4_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC4_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC4_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC4_OUT_SEL    0x000001FF
+#define GPIO_FUNC4_OUT_SEL_M  ((GPIO_FUNC4_OUT_SEL_V)<<(GPIO_FUNC4_OUT_SEL_S))
+#define GPIO_FUNC4_OUT_SEL_V  0x1FF
+#define GPIO_FUNC4_OUT_SEL_S  0
+
+#define GPIO_FUNC5_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0544)
+
+/* GPIO_FUNC5_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC5_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC5_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC5_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC5_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC5_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC5_OEN_SEL    (BIT(10))
+#define GPIO_FUNC5_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC5_OEN_SEL_V  0x1
+#define GPIO_FUNC5_OEN_SEL_S  10
+
+/* GPIO_FUNC5_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC5_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC5_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC5_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC5_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC5_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC5_OUT_SEL    0x000001FF
+#define GPIO_FUNC5_OUT_SEL_M  ((GPIO_FUNC5_OUT_SEL_V)<<(GPIO_FUNC5_OUT_SEL_S))
+#define GPIO_FUNC5_OUT_SEL_V  0x1FF
+#define GPIO_FUNC5_OUT_SEL_S  0
+
+#define GPIO_FUNC6_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0548)
+
+/* GPIO_FUNC6_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC6_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC6_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC6_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC6_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC6_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC6_OEN_SEL    (BIT(10))
+#define GPIO_FUNC6_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC6_OEN_SEL_V  0x1
+#define GPIO_FUNC6_OEN_SEL_S  10
+
+/* GPIO_FUNC6_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC6_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC6_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC6_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC6_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC6_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC6_OUT_SEL    0x000001FF
+#define GPIO_FUNC6_OUT_SEL_M  ((GPIO_FUNC6_OUT_SEL_V)<<(GPIO_FUNC6_OUT_SEL_S))
+#define GPIO_FUNC6_OUT_SEL_V  0x1FF
+#define GPIO_FUNC6_OUT_SEL_S  0
+
+#define GPIO_FUNC7_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x054c)
+
+/* GPIO_FUNC7_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC7_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC7_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC7_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC7_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC7_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC7_OEN_SEL    (BIT(10))
+#define GPIO_FUNC7_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC7_OEN_SEL_V  0x1
+#define GPIO_FUNC7_OEN_SEL_S  10
+
+/* GPIO_FUNC7_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC7_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC7_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC7_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC7_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC7_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC7_OUT_SEL    0x000001FF
+#define GPIO_FUNC7_OUT_SEL_M  ((GPIO_FUNC7_OUT_SEL_V)<<(GPIO_FUNC7_OUT_SEL_S))
+#define GPIO_FUNC7_OUT_SEL_V  0x1FF
+#define GPIO_FUNC7_OUT_SEL_S  0
+
+#define GPIO_FUNC8_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0550)
+
+/* GPIO_FUNC8_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC8_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC8_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC8_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC8_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC8_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC8_OEN_SEL    (BIT(10))
+#define GPIO_FUNC8_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC8_OEN_SEL_V  0x1
+#define GPIO_FUNC8_OEN_SEL_S  10
+
+/* GPIO_FUNC8_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC8_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC8_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC8_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC8_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC8_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC8_OUT_SEL    0x000001FF
+#define GPIO_FUNC8_OUT_SEL_M  ((GPIO_FUNC8_OUT_SEL_V)<<(GPIO_FUNC8_OUT_SEL_S))
+#define GPIO_FUNC8_OUT_SEL_V  0x1FF
+#define GPIO_FUNC8_OUT_SEL_S  0
+
+#define GPIO_FUNC9_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0554)
+
+/* GPIO_FUNC9_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC9_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC9_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC9_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC9_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC9_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC9_OEN_SEL    (BIT(10))
+#define GPIO_FUNC9_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC9_OEN_SEL_V  0x1
+#define GPIO_FUNC9_OEN_SEL_S  10
+
+/* GPIO_FUNC9_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC9_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC9_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC9_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC9_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC9_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC9_OUT_SEL    0x000001FF
+#define GPIO_FUNC9_OUT_SEL_M  ((GPIO_FUNC9_OUT_SEL_V)<<(GPIO_FUNC9_OUT_SEL_S))
+#define GPIO_FUNC9_OUT_SEL_V  0x1FF
+#define GPIO_FUNC9_OUT_SEL_S  0
+
+#define GPIO_FUNC10_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0558)
+
+/* GPIO_FUNC10_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC10_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC10_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC10_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC10_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC10_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC10_OEN_SEL    (BIT(10))
+#define GPIO_FUNC10_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC10_OEN_SEL_V  0x1
+#define GPIO_FUNC10_OEN_SEL_S  10
+
+/* GPIO_FUNC10_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC10_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC10_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC10_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC10_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC10_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC10_OUT_SEL    0x000001FF
+#define GPIO_FUNC10_OUT_SEL_M  ((GPIO_FUNC10_OUT_SEL_V)<<(GPIO_FUNC10_OUT_SEL_S))
+#define GPIO_FUNC10_OUT_SEL_V  0x1FF
+#define GPIO_FUNC10_OUT_SEL_S  0
+
+#define GPIO_FUNC11_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x055c)
+
+/* GPIO_FUNC11_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC11_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC11_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC11_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC11_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC11_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC11_OEN_SEL    (BIT(10))
+#define GPIO_FUNC11_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC11_OEN_SEL_V  0x1
+#define GPIO_FUNC11_OEN_SEL_S  10
+
+/* GPIO_FUNC11_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC11_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC11_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC11_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC11_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC11_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC11_OUT_SEL    0x000001FF
+#define GPIO_FUNC11_OUT_SEL_M  ((GPIO_FUNC11_OUT_SEL_V)<<(GPIO_FUNC11_OUT_SEL_S))
+#define GPIO_FUNC11_OUT_SEL_V  0x1FF
+#define GPIO_FUNC11_OUT_SEL_S  0
+
+#define GPIO_FUNC12_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0560)
+
+/* GPIO_FUNC12_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC12_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC12_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC12_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC12_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC12_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC12_OEN_SEL    (BIT(10))
+#define GPIO_FUNC12_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC12_OEN_SEL_V  0x1
+#define GPIO_FUNC12_OEN_SEL_S  10
+
+/* GPIO_FUNC12_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC12_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC12_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC12_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC12_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC12_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC12_OUT_SEL    0x000001FF
+#define GPIO_FUNC12_OUT_SEL_M  ((GPIO_FUNC12_OUT_SEL_V)<<(GPIO_FUNC12_OUT_SEL_S))
+#define GPIO_FUNC12_OUT_SEL_V  0x1FF
+#define GPIO_FUNC12_OUT_SEL_S  0
+
+#define GPIO_FUNC13_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0564)
+
+/* GPIO_FUNC13_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC13_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC13_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC13_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC13_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC13_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC13_OEN_SEL    (BIT(10))
+#define GPIO_FUNC13_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC13_OEN_SEL_V  0x1
+#define GPIO_FUNC13_OEN_SEL_S  10
+
+/* GPIO_FUNC13_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC13_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC13_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC13_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC13_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC13_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC13_OUT_SEL    0x000001FF
+#define GPIO_FUNC13_OUT_SEL_M  ((GPIO_FUNC13_OUT_SEL_V)<<(GPIO_FUNC13_OUT_SEL_S))
+#define GPIO_FUNC13_OUT_SEL_V  0x1FF
+#define GPIO_FUNC13_OUT_SEL_S  0
+
+#define GPIO_FUNC14_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0568)
+
+/* GPIO_FUNC14_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC14_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC14_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC14_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC14_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC14_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC14_OEN_SEL    (BIT(10))
+#define GPIO_FUNC14_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC14_OEN_SEL_V  0x1
+#define GPIO_FUNC14_OEN_SEL_S  10
+
+/* GPIO_FUNC14_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC14_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC14_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC14_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC14_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC14_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC14_OUT_SEL    0x000001FF
+#define GPIO_FUNC14_OUT_SEL_M  ((GPIO_FUNC14_OUT_SEL_V)<<(GPIO_FUNC14_OUT_SEL_S))
+#define GPIO_FUNC14_OUT_SEL_V  0x1FF
+#define GPIO_FUNC14_OUT_SEL_S  0
+
+#define GPIO_FUNC15_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x056c)
+
+/* GPIO_FUNC15_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC15_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC15_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC15_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC15_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC15_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC15_OEN_SEL    (BIT(10))
+#define GPIO_FUNC15_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC15_OEN_SEL_V  0x1
+#define GPIO_FUNC15_OEN_SEL_S  10
+
+/* GPIO_FUNC15_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC15_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC15_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC15_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC15_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC15_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC15_OUT_SEL    0x000001FF
+#define GPIO_FUNC15_OUT_SEL_M  ((GPIO_FUNC15_OUT_SEL_V)<<(GPIO_FUNC15_OUT_SEL_S))
+#define GPIO_FUNC15_OUT_SEL_V  0x1FF
+#define GPIO_FUNC15_OUT_SEL_S  0
+
+#define GPIO_FUNC16_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0570)
+
+/* GPIO_FUNC16_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC16_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC16_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC16_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC16_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC16_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC16_OEN_SEL    (BIT(10))
+#define GPIO_FUNC16_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC16_OEN_SEL_V  0x1
+#define GPIO_FUNC16_OEN_SEL_S  10
+
+/* GPIO_FUNC16_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC16_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC16_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC16_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC16_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC16_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC16_OUT_SEL    0x000001FF
+#define GPIO_FUNC16_OUT_SEL_M  ((GPIO_FUNC16_OUT_SEL_V)<<(GPIO_FUNC16_OUT_SEL_S))
+#define GPIO_FUNC16_OUT_SEL_V  0x1FF
+#define GPIO_FUNC16_OUT_SEL_S  0
+
+#define GPIO_FUNC17_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0574)
+
+/* GPIO_FUNC17_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC17_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC17_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC17_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC17_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC17_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC17_OEN_SEL    (BIT(10))
+#define GPIO_FUNC17_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC17_OEN_SEL_V  0x1
+#define GPIO_FUNC17_OEN_SEL_S  10
+
+/* GPIO_FUNC17_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC17_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC17_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC17_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC17_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC17_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC17_OUT_SEL    0x000001FF
+#define GPIO_FUNC17_OUT_SEL_M  ((GPIO_FUNC17_OUT_SEL_V)<<(GPIO_FUNC17_OUT_SEL_S))
+#define GPIO_FUNC17_OUT_SEL_V  0x1FF
+#define GPIO_FUNC17_OUT_SEL_S  0
+
+#define GPIO_FUNC18_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0578)
+
+/* GPIO_FUNC18_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC18_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC18_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC18_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC18_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC18_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC18_OEN_SEL    (BIT(10))
+#define GPIO_FUNC18_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC18_OEN_SEL_V  0x1
+#define GPIO_FUNC18_OEN_SEL_S  10
+
+/* GPIO_FUNC18_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC18_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC18_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC18_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC18_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC18_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC18_OUT_SEL    0x000001FF
+#define GPIO_FUNC18_OUT_SEL_M  ((GPIO_FUNC18_OUT_SEL_V)<<(GPIO_FUNC18_OUT_SEL_S))
+#define GPIO_FUNC18_OUT_SEL_V  0x1FF
+#define GPIO_FUNC18_OUT_SEL_S  0
+
+#define GPIO_FUNC19_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x057c)
+
+/* GPIO_FUNC19_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC19_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC19_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC19_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC19_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC19_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC19_OEN_SEL    (BIT(10))
+#define GPIO_FUNC19_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC19_OEN_SEL_V  0x1
+#define GPIO_FUNC19_OEN_SEL_S  10
+
+/* GPIO_FUNC19_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC19_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC19_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC19_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC19_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC19_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC19_OUT_SEL    0x000001FF
+#define GPIO_FUNC19_OUT_SEL_M  ((GPIO_FUNC19_OUT_SEL_V)<<(GPIO_FUNC19_OUT_SEL_S))
+#define GPIO_FUNC19_OUT_SEL_V  0x1FF
+#define GPIO_FUNC19_OUT_SEL_S  0
+
+#define GPIO_FUNC20_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0580)
+
+/* GPIO_FUNC20_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC20_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC20_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC20_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC20_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC20_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC20_OEN_SEL    (BIT(10))
+#define GPIO_FUNC20_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC20_OEN_SEL_V  0x1
+#define GPIO_FUNC20_OEN_SEL_S  10
+
+/* GPIO_FUNC20_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC20_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC20_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC20_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC20_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC20_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC20_OUT_SEL    0x000001FF
+#define GPIO_FUNC20_OUT_SEL_M  ((GPIO_FUNC20_OUT_SEL_V)<<(GPIO_FUNC20_OUT_SEL_S))
+#define GPIO_FUNC20_OUT_SEL_V  0x1FF
+#define GPIO_FUNC20_OUT_SEL_S  0
+
+#define GPIO_FUNC21_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0584)
+
+/* GPIO_FUNC21_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC21_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC21_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC21_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC21_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC21_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC21_OEN_SEL    (BIT(10))
+#define GPIO_FUNC21_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC21_OEN_SEL_V  0x1
+#define GPIO_FUNC21_OEN_SEL_S  10
+
+/* GPIO_FUNC21_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC21_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC21_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC21_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC21_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC21_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC21_OUT_SEL    0x000001FF
+#define GPIO_FUNC21_OUT_SEL_M  ((GPIO_FUNC21_OUT_SEL_V)<<(GPIO_FUNC21_OUT_SEL_S))
+#define GPIO_FUNC21_OUT_SEL_V  0x1FF
+#define GPIO_FUNC21_OUT_SEL_S  0
+
+#define GPIO_FUNC22_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0588)
+
+/* GPIO_FUNC22_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC22_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC22_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC22_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC22_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC22_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC22_OEN_SEL    (BIT(10))
+#define GPIO_FUNC22_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC22_OEN_SEL_V  0x1
+#define GPIO_FUNC22_OEN_SEL_S  10
+
+/* GPIO_FUNC22_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC22_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC22_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC22_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC22_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC22_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC22_OUT_SEL    0x000001FF
+#define GPIO_FUNC22_OUT_SEL_M  ((GPIO_FUNC22_OUT_SEL_V)<<(GPIO_FUNC22_OUT_SEL_S))
+#define GPIO_FUNC22_OUT_SEL_V  0x1FF
+#define GPIO_FUNC22_OUT_SEL_S  0
+
+#define GPIO_FUNC23_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x058c)
+
+/* GPIO_FUNC23_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC23_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC23_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC23_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC23_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC23_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC23_OEN_SEL    (BIT(10))
+#define GPIO_FUNC23_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC23_OEN_SEL_V  0x1
+#define GPIO_FUNC23_OEN_SEL_S  10
+
+/* GPIO_FUNC23_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC23_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC23_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC23_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC23_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC23_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC23_OUT_SEL    0x000001FF
+#define GPIO_FUNC23_OUT_SEL_M  ((GPIO_FUNC23_OUT_SEL_V)<<(GPIO_FUNC23_OUT_SEL_S))
+#define GPIO_FUNC23_OUT_SEL_V  0x1FF
+#define GPIO_FUNC23_OUT_SEL_S  0
+
+#define GPIO_FUNC24_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0590)
+
+/* GPIO_FUNC24_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC24_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC24_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC24_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC24_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC24_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC24_OEN_SEL    (BIT(10))
+#define GPIO_FUNC24_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC24_OEN_SEL_V  0x1
+#define GPIO_FUNC24_OEN_SEL_S  10
+
+/* GPIO_FUNC24_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC24_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC24_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC24_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC24_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC24_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC24_OUT_SEL    0x000001FF
+#define GPIO_FUNC24_OUT_SEL_M  ((GPIO_FUNC24_OUT_SEL_V)<<(GPIO_FUNC24_OUT_SEL_S))
+#define GPIO_FUNC24_OUT_SEL_V  0x1FF
+#define GPIO_FUNC24_OUT_SEL_S  0
+
+#define GPIO_FUNC25_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0594)
+
+/* GPIO_FUNC25_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC25_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC25_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC25_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC25_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC25_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC25_OEN_SEL    (BIT(10))
+#define GPIO_FUNC25_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC25_OEN_SEL_V  0x1
+#define GPIO_FUNC25_OEN_SEL_S  10
+
+/* GPIO_FUNC25_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC25_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC25_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC25_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC25_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC25_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC25_OUT_SEL    0x000001FF
+#define GPIO_FUNC25_OUT_SEL_M  ((GPIO_FUNC25_OUT_SEL_V)<<(GPIO_FUNC25_OUT_SEL_S))
+#define GPIO_FUNC25_OUT_SEL_V  0x1FF
+#define GPIO_FUNC25_OUT_SEL_S  0
+
+#define GPIO_FUNC26_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x0598)
+
+/* GPIO_FUNC26_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC26_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC26_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC26_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC26_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC26_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC26_OEN_SEL    (BIT(10))
+#define GPIO_FUNC26_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC26_OEN_SEL_V  0x1
+#define GPIO_FUNC26_OEN_SEL_S  10
+
+/* GPIO_FUNC26_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC26_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC26_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC26_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC26_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC26_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC26_OUT_SEL    0x000001FF
+#define GPIO_FUNC26_OUT_SEL_M  ((GPIO_FUNC26_OUT_SEL_V)<<(GPIO_FUNC26_OUT_SEL_S))
+#define GPIO_FUNC26_OUT_SEL_V  0x1FF
+#define GPIO_FUNC26_OUT_SEL_S  0
+
+#define GPIO_FUNC27_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x059c)
+
+/* GPIO_FUNC27_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC27_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC27_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC27_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC27_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC27_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC27_OEN_SEL    (BIT(10))
+#define GPIO_FUNC27_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC27_OEN_SEL_V  0x1
+#define GPIO_FUNC27_OEN_SEL_S  10
+
+/* GPIO_FUNC27_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC27_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC27_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC27_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC27_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC27_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC27_OUT_SEL    0x000001FF
+#define GPIO_FUNC27_OUT_SEL_M  ((GPIO_FUNC27_OUT_SEL_V)<<(GPIO_FUNC27_OUT_SEL_S))
+#define GPIO_FUNC27_OUT_SEL_V  0x1FF
+#define GPIO_FUNC27_OUT_SEL_S  0
+
+#define GPIO_FUNC28_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x05a0)
+
+/* GPIO_FUNC28_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC28_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC28_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC28_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC28_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC28_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC28_OEN_SEL    (BIT(10))
+#define GPIO_FUNC28_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC28_OEN_SEL_V  0x1
+#define GPIO_FUNC28_OEN_SEL_S  10
+
+/* GPIO_FUNC28_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC28_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC28_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC28_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC28_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC28_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC28_OUT_SEL    0x000001FF
+#define GPIO_FUNC28_OUT_SEL_M  ((GPIO_FUNC28_OUT_SEL_V)<<(GPIO_FUNC28_OUT_SEL_S))
+#define GPIO_FUNC28_OUT_SEL_V  0x1FF
+#define GPIO_FUNC28_OUT_SEL_S  0
+
+#define GPIO_FUNC29_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x05a4)
+
+/* GPIO_FUNC29_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC29_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC29_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC29_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC29_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC29_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC29_OEN_SEL    (BIT(10))
+#define GPIO_FUNC29_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC29_OEN_SEL_V  0x1
+#define GPIO_FUNC29_OEN_SEL_S  10
+
+/* GPIO_FUNC29_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC29_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC29_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC29_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC29_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC29_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC29_OUT_SEL    0x000001FF
+#define GPIO_FUNC29_OUT_SEL_M  ((GPIO_FUNC29_OUT_SEL_V)<<(GPIO_FUNC29_OUT_SEL_S))
+#define GPIO_FUNC29_OUT_SEL_V  0x1FF
+#define GPIO_FUNC29_OUT_SEL_S  0
+
+#define GPIO_FUNC30_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x05a8)
+
+/* GPIO_FUNC30_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC30_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC30_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC30_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC30_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC30_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC30_OEN_SEL    (BIT(10))
+#define GPIO_FUNC30_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC30_OEN_SEL_V  0x1
+#define GPIO_FUNC30_OEN_SEL_S  10
+
+/* GPIO_FUNC30_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC30_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC30_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC30_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC30_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC30_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC30_OUT_SEL    0x000001FF
+#define GPIO_FUNC30_OUT_SEL_M  ((GPIO_FUNC30_OUT_SEL_V)<<(GPIO_FUNC30_OUT_SEL_S))
+#define GPIO_FUNC30_OUT_SEL_V  0x1FF
+#define GPIO_FUNC30_OUT_SEL_S  0
+
+#define GPIO_FUNC31_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x05ac)
+
+/* GPIO_FUNC31_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC31_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC31_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC31_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC31_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC31_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC31_OEN_SEL    (BIT(10))
+#define GPIO_FUNC31_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC31_OEN_SEL_V  0x1
+#define GPIO_FUNC31_OEN_SEL_S  10
+
+/* GPIO_FUNC31_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC31_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC31_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC31_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC31_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC31_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC31_OUT_SEL    0x000001FF
+#define GPIO_FUNC31_OUT_SEL_M  ((GPIO_FUNC31_OUT_SEL_V)<<(GPIO_FUNC31_OUT_SEL_S))
+#define GPIO_FUNC31_OUT_SEL_V  0x1FF
+#define GPIO_FUNC31_OUT_SEL_S  0
+
+#define GPIO_FUNC32_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x05b0)
+
+/* GPIO_FUNC32_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC32_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC32_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC32_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC32_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC32_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC32_OEN_SEL    (BIT(10))
+#define GPIO_FUNC32_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC32_OEN_SEL_V  0x1
+#define GPIO_FUNC32_OEN_SEL_S  10
+
+/* GPIO_FUNC32_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC32_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC32_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC32_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC32_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC32_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC32_OUT_SEL    0x000001FF
+#define GPIO_FUNC32_OUT_SEL_M  ((GPIO_FUNC32_OUT_SEL_V)<<(GPIO_FUNC32_OUT_SEL_S))
+#define GPIO_FUNC32_OUT_SEL_V  0x1FF
+#define GPIO_FUNC32_OUT_SEL_S  0
+
+#define GPIO_FUNC33_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x05b4)
+
+/* GPIO_FUNC33_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC33_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC33_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC33_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC33_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC33_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC33_OEN_SEL    (BIT(10))
+#define GPIO_FUNC33_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC33_OEN_SEL_V  0x1
+#define GPIO_FUNC33_OEN_SEL_S  10
+
+/* GPIO_FUNC33_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC33_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC33_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC33_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC33_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC33_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC33_OUT_SEL    0x000001FF
+#define GPIO_FUNC33_OUT_SEL_M  ((GPIO_FUNC33_OUT_SEL_V)<<(GPIO_FUNC33_OUT_SEL_S))
+#define GPIO_FUNC33_OUT_SEL_V  0x1FF
+#define GPIO_FUNC33_OUT_SEL_S  0
+
+#define GPIO_FUNC34_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x05b8)
+
+/* GPIO_FUNC34_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC34_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC34_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC34_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC34_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC34_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC34_OEN_SEL    (BIT(10))
+#define GPIO_FUNC34_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC34_OEN_SEL_V  0x1
+#define GPIO_FUNC34_OEN_SEL_S  10
+
+/* GPIO_FUNC34_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC34_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC34_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC34_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC34_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC34_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC34_OUT_SEL    0x000001FF
+#define GPIO_FUNC34_OUT_SEL_M  ((GPIO_FUNC34_OUT_SEL_V)<<(GPIO_FUNC34_OUT_SEL_S))
+#define GPIO_FUNC34_OUT_SEL_V  0x1FF
+#define GPIO_FUNC34_OUT_SEL_S  0
+
+#define GPIO_FUNC35_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x05bc)
+
+/* GPIO_FUNC35_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC35_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC35_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC35_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC35_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC35_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC35_OEN_SEL    (BIT(10))
+#define GPIO_FUNC35_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC35_OEN_SEL_V  0x1
+#define GPIO_FUNC35_OEN_SEL_S  10
+
+/* GPIO_FUNC35_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC35_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC35_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC35_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC35_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC35_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC35_OUT_SEL    0x000001FF
+#define GPIO_FUNC35_OUT_SEL_M  ((GPIO_FUNC35_OUT_SEL_V)<<(GPIO_FUNC35_OUT_SEL_S))
+#define GPIO_FUNC35_OUT_SEL_V  0x1FF
+#define GPIO_FUNC35_OUT_SEL_S  0
+
+#define GPIO_FUNC36_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x05c0)
+
+/* GPIO_FUNC36_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC36_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC36_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC36_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC36_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC36_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC36_OEN_SEL    (BIT(10))
+#define GPIO_FUNC36_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC36_OEN_SEL_V  0x1
+#define GPIO_FUNC36_OEN_SEL_S  10
+
+/* GPIO_FUNC36_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC36_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC36_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC36_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC36_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC36_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC36_OUT_SEL    0x000001FF
+#define GPIO_FUNC36_OUT_SEL_M  ((GPIO_FUNC36_OUT_SEL_V)<<(GPIO_FUNC36_OUT_SEL_S))
+#define GPIO_FUNC36_OUT_SEL_V  0x1FF
+#define GPIO_FUNC36_OUT_SEL_S  0
+
+#define GPIO_FUNC37_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x05c4)
+
+/* GPIO_FUNC37_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC37_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC37_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC37_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC37_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC37_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC37_OEN_SEL    (BIT(10))
+#define GPIO_FUNC37_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC37_OEN_SEL_V  0x1
+#define GPIO_FUNC37_OEN_SEL_S  10
+
+/* GPIO_FUNC37_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC37_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC37_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC37_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC37_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC37_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC37_OUT_SEL    0x000001FF
+#define GPIO_FUNC37_OUT_SEL_M  ((GPIO_FUNC37_OUT_SEL_V)<<(GPIO_FUNC37_OUT_SEL_S))
+#define GPIO_FUNC37_OUT_SEL_V  0x1FF
+#define GPIO_FUNC37_OUT_SEL_S  0
+
+#define GPIO_FUNC38_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x05c8)
+
+/* GPIO_FUNC38_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC38_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC38_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC38_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC38_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC38_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC38_OEN_SEL    (BIT(10))
+#define GPIO_FUNC38_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC38_OEN_SEL_V  0x1
+#define GPIO_FUNC38_OEN_SEL_S  10
+
+/* GPIO_FUNC38_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC38_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC38_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC38_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC38_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC38_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC38_OUT_SEL    0x000001FF
+#define GPIO_FUNC38_OUT_SEL_M  ((GPIO_FUNC38_OUT_SEL_V)<<(GPIO_FUNC38_OUT_SEL_S))
+#define GPIO_FUNC38_OUT_SEL_V  0x1FF
+#define GPIO_FUNC38_OUT_SEL_S  0
+
+#define GPIO_FUNC39_OUT_SEL_CFG_REG          (DR_REG_GPIO_BASE + 0x05cc)
+
+/* GPIO_FUNC39_OEN_INV_SEL : R/W ;bitpos:[11] ;default: x ; */
+/* Description: invert the output enable value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC39_OEN_INV_SEL    (BIT(11))
+#define GPIO_FUNC39_OEN_INV_SEL_M  (BIT(11))
+#define GPIO_FUNC39_OEN_INV_SEL_V  0x1
+#define GPIO_FUNC39_OEN_INV_SEL_S  11
+
+/* GPIO_FUNC39_OEN_SEL : R/W ;bitpos:[10] ;default: x ; */
+/* Description: weather using the logical oen signal or not using the
+ * value setting by the register.
+ */
+
+#define GPIO_FUNC39_OEN_SEL    (BIT(10))
+#define GPIO_FUNC39_OEN_SEL_M  (BIT(10))
+#define GPIO_FUNC39_OEN_SEL_V  0x1
+#define GPIO_FUNC39_OEN_SEL_S  10
+
+/* GPIO_FUNC39_OUT_INV_SEL : R/W ;bitpos:[9] ;default: x ; */
+/* Description: invert the output value if you want to revert the
+ * output enable value setting the value to 1.
+ */
+
+#define GPIO_FUNC39_OUT_INV_SEL    (BIT(9))
+#define GPIO_FUNC39_OUT_INV_SEL_M  (BIT(9))
+#define GPIO_FUNC39_OUT_INV_SEL_V  0x1
+#define GPIO_FUNC39_OUT_INV_SEL_S  9
+
+/* GPIO_FUNC39_OUT_SEL : R/W ;bitpos:[8:0] ;default: x ; */
+/* Description: select one of the 256 output to 40 GPIO */
+
+#define GPIO_FUNC39_OUT_SEL    0x000001FF
+#define GPIO_FUNC39_OUT_SEL_M  ((GPIO_FUNC39_OUT_SEL_V)<<(GPIO_FUNC39_OUT_SEL_S))
+#define GPIO_FUNC39_OUT_SEL_V  0x1FF
+#define GPIO_FUNC39_OUT_SEL_S  0
+
+#endif /* __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_GPIO_H */
diff --git a/arch/xtensa/src/esp32/chip/esp32_gpio_sigmap.h b/arch/xtensa/src/esp32/chip/esp32_gpio_sigmap.h
new file mode 100644
index 0000000000000000000000000000000000000000..f6a6ce7ba8829c905a2c5d73b96fb594ffdd975b
--- /dev/null
+++ b/arch/xtensa/src/esp32/chip/esp32_gpio_sigmap.h
@@ -0,0 +1,439 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/chip/esp32_gpio_sigmap.h
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from logic originally provided by Espressif Systems:
+ *
+ *   Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_GPIO_SIGMAP_H
+#define __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_GPIO_SIGMAP_H
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define SPICLK_IN_IDX                 0
+#define SPICLK_OUT_IDX                0
+#define SPIQ_IN_IDX                   1
+#define SPIQ_OUT_IDX                  1
+#define SPID_IN_IDX                   2
+#define SPID_OUT_IDX                  2
+#define SPIHD_IN_IDX                  3
+#define SPIHD_OUT_IDX                 3
+#define SPIWP_IN_IDX                  4
+#define SPIWP_OUT_IDX                 4
+#define SPICS0_IN_IDX                 5
+#define SPICS0_OUT_IDX                5
+#define SPICS1_IN_IDX                 6
+#define SPICS1_OUT_IDX                6
+#define SPICS2_IN_IDX                 7
+#define SPICS2_OUT_IDX                7
+#define HSPICLK_IN_IDX                8
+#define HSPICLK_OUT_IDX               8
+#define HSPIQ_IN_IDX                  9
+#define HSPIQ_OUT_IDX                 9
+#define HSPID_IN_IDX                  10
+#define HSPID_OUT_IDX                 10
+#define HSPICS0_IN_IDX                11
+#define HSPICS0_OUT_IDX               11
+#define HSPIHD_IN_IDX                 12
+#define HSPIHD_OUT_IDX                12
+#define HSPIWP_IN_IDX                 13
+#define HSPIWP_OUT_IDX                13
+#define U0RXD_IN_IDX                  14
+#define U0TXD_OUT_IDX                 14
+#define U0CTS_IN_IDX                  15
+#define U0RTS_OUT_IDX                 15
+#define U0DSR_IN_IDX                  16
+#define U0DTR_OUT_IDX                 16
+#define U1RXD_IN_IDX                  17
+#define U1TXD_OUT_IDX                 17
+#define U1CTS_IN_IDX                  18
+#define U1RTS_OUT_IDX                 18
+#define I2CM_SCL_O_IDX                19
+#define I2CM_SDA_I_IDX                20
+#define I2CM_SDA_O_IDX                20
+#define EXT_I2C_SCL_O_IDX             21
+#define EXT_I2C_SDA_O_IDX             22
+#define EXT_I2C_SDA_I_IDX             22
+#define I2S0O_BCK_IN_IDX              23
+#define I2S0O_BCK_OUT_IDX             23
+#define I2S1O_BCK_IN_IDX              24
+#define I2S1O_BCK_OUT_IDX             24
+#define I2S0O_WS_IN_IDX               25
+#define I2S0O_WS_OUT_IDX              25
+#define I2S1O_WS_IN_IDX               26
+#define I2S1O_WS_OUT_IDX              26
+#define I2S0I_BCK_IN_IDX              27
+#define I2S0I_BCK_OUT_IDX             27
+#define I2S0I_WS_IN_IDX               28
+#define I2S0I_WS_OUT_IDX              28
+#define I2CEXT0_SCL_IN_IDX            29
+#define I2CEXT0_SCL_OUT_IDX           29
+#define I2CEXT0_SDA_IN_IDX            30
+#define I2CEXT0_SDA_OUT_IDX           30
+#define PWM0_SYNC0_IN_IDX             31
+#define SDIO_TOHOST_INT_OUT_IDX       31
+#define PWM0_SYNC1_IN_IDX             32
+#define PWM0_OUT0A_IDX                32
+#define PWM0_SYNC2_IN_IDX             33
+#define PWM0_OUT0B_IDX                33
+#define PWM0_F0_IN_IDX                34
+#define PWM0_OUT1A_IDX                34
+#define PWM0_F1_IN_IDX                35
+#define PWM0_OUT1B_IDX                35
+#define PWM0_F2_IN_IDX                36
+#define PWM0_OUT2A_IDX                36
+#define GPIO_BT_ACTIVE_IDX            37
+#define PWM0_OUT2B_IDX                37
+#define GPIO_BT_PRIORITY_IDX          38
+#define PCNT_SIG_CH0_IN0_IDX          39
+#define PCNT_SIG_CH1_IN0_IDX          40
+#define GPIO_WLAN_ACTIVE_IDX          40
+#define PCNT_CTRL_CH0_IN0_IDX         41
+#define BB_DIAG0_IDX                  41
+#define PCNT_CTRL_CH1_IN0_IDX         42
+#define BB_DIAG1_IDX                  42
+#define PCNT_SIG_CH0_IN1_IDX          43
+#define BB_DIAG2_IDX                  43
+#define PCNT_SIG_CH1_IN1_IDX          44
+#define BB_DIAG3_IDX                  44
+#define PCNT_CTRL_CH0_IN1_IDX         45
+#define BB_DIAG4_IDX                  45
+#define PCNT_CTRL_CH1_IN1_IDX         46
+#define BB_DIAG5_IDX                  46
+#define PCNT_SIG_CH0_IN2_IDX          47
+#define BB_DIAG6_IDX                  47
+#define PCNT_SIG_CH1_IN2_IDX          48
+#define BB_DIAG7_IDX                  48
+#define PCNT_CTRL_CH0_IN2_IDX         49
+#define BB_DIAG8_IDX                  49
+#define PCNT_CTRL_CH1_IN2_IDX         50
+#define BB_DIAG9_IDX                  50
+#define PCNT_SIG_CH0_IN3_IDX          51
+#define BB_DIAG10_IDX                 51
+#define PCNT_SIG_CH1_IN3_IDX          52
+#define BB_DIAG11_IDX                 52
+#define PCNT_CTRL_CH0_IN3_IDX         53
+#define BB_DIAG12_IDX                 53
+#define PCNT_CTRL_CH1_IN3_IDX         54
+#define BB_DIAG13_IDX                 54
+#define PCNT_SIG_CH0_IN4_IDX          55
+#define BB_DIAG14_IDX                 55
+#define PCNT_SIG_CH1_IN4_IDX          56
+#define BB_DIAG15_IDX                 56
+#define PCNT_CTRL_CH0_IN4_IDX         57
+#define BB_DIAG16_IDX                 57
+#define PCNT_CTRL_CH1_IN4_IDX         58
+#define BB_DIAG17_IDX                 58
+#define BB_DIAG18_IDX                 59
+#define BB_DIAG19_IDX                 60
+#define HSPICS1_IN_IDX                61
+#define HSPICS1_OUT_IDX               61
+#define HSPICS2_IN_IDX                62
+#define HSPICS2_OUT_IDX               62
+#define VSPICLK_IN_IDX                63
+#define VSPICLK_OUT_MUX_IDX           63
+#define VSPIQ_IN_IDX                  64
+#define VSPIQ_OUT_IDX                 64
+#define VSPID_IN_IDX                  65
+#define VSPID_OUT_IDX                 65
+#define VSPIHD_IN_IDX                 66
+#define VSPIHD_OUT_IDX                66
+#define VSPIWP_IN_IDX                 67
+#define VSPIWP_OUT_IDX                67
+#define VSPICS0_IN_IDX                68
+#define VSPICS0_OUT_IDX               68
+#define VSPICS1_IN_IDX                69
+#define VSPICS1_OUT_IDX               69
+#define VSPICS2_IN_IDX                70
+#define VSPICS2_OUT_IDX               70
+#define PCNT_SIG_CH0_IN5_IDX          71
+#define LEDC_HS_SIG_OUT0_IDX          71
+#define PCNT_SIG_CH1_IN5_IDX          72
+#define LEDC_HS_SIG_OUT1_IDX          72
+#define PCNT_CTRL_CH0_IN5_IDX         73
+#define LEDC_HS_SIG_OUT2_IDX          73
+#define PCNT_CTRL_CH1_IN5_IDX         74
+#define LEDC_HS_SIG_OUT3_IDX          74
+#define PCNT_SIG_CH0_IN6_IDX          75
+#define LEDC_HS_SIG_OUT4_IDX          75
+#define PCNT_SIG_CH1_IN6_IDX          76
+#define LEDC_HS_SIG_OUT5_IDX          76
+#define PCNT_CTRL_CH0_IN6_IDX         77
+#define LEDC_HS_SIG_OUT6_IDX          77
+#define PCNT_CTRL_CH1_IN6_IDX         78
+#define LEDC_HS_SIG_OUT7_IDX          78
+#define PCNT_SIG_CH0_IN7_IDX          79
+#define LEDC_LS_SIG_OUT0_IDX          79
+#define PCNT_SIG_CH1_IN7_IDX          80
+#define LEDC_LS_SIG_OUT1_IDX          80
+#define PCNT_CTRL_CH0_IN7_IDX         81
+#define LEDC_LS_SIG_OUT2_IDX          81
+#define PCNT_CTRL_CH1_IN7_IDX         82
+#define LEDC_LS_SIG_OUT3_IDX          82
+#define RMT_SIG_IN0_IDX               83
+#define LEDC_LS_SIG_OUT4_IDX          83
+#define RMT_SIG_IN1_IDX               84
+#define LEDC_LS_SIG_OUT5_IDX          84
+#define RMT_SIG_IN2_IDX               85
+#define LEDC_LS_SIG_OUT6_IDX          85
+#define RMT_SIG_IN3_IDX               86
+#define LEDC_LS_SIG_OUT7_IDX          86
+#define RMT_SIG_IN4_IDX               87
+#define RMT_SIG_OUT0_IDX              87
+#define RMT_SIG_IN5_IDX               88
+#define RMT_SIG_OUT1_IDX              88
+#define RMT_SIG_IN6_IDX               89
+#define RMT_SIG_OUT2_IDX              89
+#define RMT_SIG_IN7_IDX               90
+#define RMT_SIG_OUT3_IDX              90
+#define RMT_SIG_OUT4_IDX              91
+#define RMT_SIG_OUT5_IDX              92
+#define EXT_ADC_START_IDX             93
+#define RMT_SIG_OUT6_IDX              93
+#define CAN_RX_IDX                    94
+#define RMT_SIG_OUT7_IDX              94
+#define I2CEXT1_SCL_IN_IDX            95
+#define I2CEXT1_SCL_OUT_IDX           95
+#define I2CEXT1_SDA_IN_IDX            96
+#define I2CEXT1_SDA_OUT_IDX           96
+#define HOST_CARD_DETECT_N_1_IDX      97
+#define HOST_CCMD_OD_PULLUP_EN_N_IDX  97
+#define HOST_CARD_DETECT_N_2_IDX      98
+#define HOST_RST_N_1_IDX              98
+#define HOST_CARD_WRITE_PRT_1_IDX     99
+#define HOST_RST_N_2_IDX              99
+#define HOST_CARD_WRITE_PRT_2_IDX     100
+#define GPIO_SD0_OUT_IDX              100
+#define HOST_CARD_INT_N_1_IDX         101
+#define GPIO_SD1_OUT_IDX              101
+#define HOST_CARD_INT_N_2_IDX         102
+#define GPIO_SD2_OUT_IDX              102
+#define PWM1_SYNC0_IN_IDX             103
+#define GPIO_SD3_OUT_IDX              103
+#define PWM1_SYNC1_IN_IDX             104
+#define GPIO_SD4_OUT_IDX              104
+#define PWM1_SYNC2_IN_IDX             105
+#define GPIO_SD5_OUT_IDX              105
+#define PWM1_F0_IN_IDX                106
+#define GPIO_SD6_OUT_IDX              106
+#define PWM1_F1_IN_IDX                107
+#define GPIO_SD7_OUT_IDX              107
+#define PWM1_F2_IN_IDX                108
+#define PWM1_OUT0A_IDX                108
+#define PWM0_CAP0_IN_IDX              109
+#define PWM1_OUT0B_IDX                109
+#define PWM0_CAP1_IN_IDX              110
+#define PWM1_OUT1A_IDX                110
+#define PWM0_CAP2_IN_IDX              111
+#define PWM1_OUT1B_IDX                111
+#define PWM1_CAP0_IN_IDX              112
+#define PWM1_OUT2A_IDX                112
+#define PWM1_CAP1_IN_IDX              113
+#define PWM1_OUT2B_IDX                113
+#define PWM1_CAP2_IN_IDX              114
+#define PWM2_OUT1H_IDX                114
+#define PWM2_FLTA_IDX                 115
+#define PWM2_OUT1L_IDX                115
+#define PWM2_FLTB_IDX                 116
+#define PWM2_OUT2H_IDX                116
+#define PWM2_CAP1_IN_IDX              117
+#define PWM2_OUT2L_IDX                117
+#define PWM2_CAP2_IN_IDX              118
+#define PWM2_OUT3H_IDX                118
+#define PWM2_CAP3_IN_IDX              119
+#define PWM2_OUT3L_IDX                119
+#define PWM3_FLTA_IDX                 120
+#define PWM2_OUT4H_IDX                120
+#define PWM3_FLTB_IDX                 121
+#define PWM2_OUT4L_IDX                121
+#define PWM3_CAP1_IN_IDX              122
+#define PWM3_CAP2_IN_IDX              123
+#define CAN_TX_IDX                    123
+#define PWM3_CAP3_IN_IDX              124
+#define CAN_BUS_OFF_ON_IDX            124
+#define CAN_CLKOUT_IDX                125
+#define SPID4_IN_IDX                  128
+#define SPID4_OUT_IDX                 128
+#define SPID5_IN_IDX                  129
+#define SPID5_OUT_IDX                 129
+#define SPID6_IN_IDX                  130
+#define SPID6_OUT_IDX                 130
+#define SPID7_IN_IDX                  131
+#define SPID7_OUT_IDX                 131
+#define HSPID4_IN_IDX                 132
+#define HSPID4_OUT_IDX                132
+#define HSPID5_IN_IDX                 133
+#define HSPID5_OUT_IDX                133
+#define HSPID6_IN_IDX                 134
+#define HSPID6_OUT_IDX                134
+#define HSPID7_IN_IDX                 135
+#define HSPID7_OUT_IDX                135
+#define VSPID4_IN_IDX                 136
+#define VSPID4_OUT_IDX                136
+#define VSPID5_IN_IDX                 137
+#define VSPID5_OUT_IDX                137
+#define VSPID6_IN_IDX                 138
+#define VSPID6_OUT_IDX                138
+#define VSPID7_IN_IDX                 139
+#define VSPID7_OUT_IDX                139
+#define I2S0I_DATA_IN0_IDX            140
+#define I2S0O_DATA_OUT0_IDX           140
+#define I2S0I_DATA_IN1_IDX            141
+#define I2S0O_DATA_OUT1_IDX           141
+#define I2S0I_DATA_IN2_IDX            142
+#define I2S0O_DATA_OUT2_IDX           142
+#define I2S0I_DATA_IN3_IDX            143
+#define I2S0O_DATA_OUT3_IDX           143
+#define I2S0I_DATA_IN4_IDX            144
+#define I2S0O_DATA_OUT4_IDX           144
+#define I2S0I_DATA_IN5_IDX            145
+#define I2S0O_DATA_OUT5_IDX           145
+#define I2S0I_DATA_IN6_IDX            146
+#define I2S0O_DATA_OUT6_IDX           146
+#define I2S0I_DATA_IN7_IDX            147
+#define I2S0O_DATA_OUT7_IDX           147
+#define I2S0I_DATA_IN8_IDX            148
+#define I2S0O_DATA_OUT8_IDX           148
+#define I2S0I_DATA_IN9_IDX            149
+#define I2S0O_DATA_OUT9_IDX           149
+#define I2S0I_DATA_IN10_IDX           150
+#define I2S0O_DATA_OUT10_IDX          150
+#define I2S0I_DATA_IN11_IDX           151
+#define I2S0O_DATA_OUT11_IDX          151
+#define I2S0I_DATA_IN12_IDX           152
+#define I2S0O_DATA_OUT12_IDX          152
+#define I2S0I_DATA_IN13_IDX           153
+#define I2S0O_DATA_OUT13_IDX          153
+#define I2S0I_DATA_IN14_IDX           154
+#define I2S0O_DATA_OUT14_IDX          154
+#define I2S0I_DATA_IN15_IDX           155
+#define I2S0O_DATA_OUT15_IDX          155
+#define I2S0O_DATA_OUT16_IDX          156
+#define I2S0O_DATA_OUT17_IDX          157
+#define I2S0O_DATA_OUT18_IDX          158
+#define I2S0O_DATA_OUT19_IDX          159
+#define I2S0O_DATA_OUT20_IDX          160
+#define I2S0O_DATA_OUT21_IDX          161
+#define I2S0O_DATA_OUT22_IDX          162
+#define I2S0O_DATA_OUT23_IDX          163
+#define I2S1I_BCK_IN_IDX              164
+#define I2S1I_BCK_OUT_IDX             164
+#define I2S1I_WS_IN_IDX               165
+#define I2S1I_WS_OUT_IDX              165
+#define I2S1I_DATA_IN0_IDX            166
+#define I2S1O_DATA_OUT0_IDX           166
+#define I2S1I_DATA_IN1_IDX            167
+#define I2S1O_DATA_OUT1_IDX           167
+#define I2S1I_DATA_IN2_IDX            168
+#define I2S1O_DATA_OUT2_IDX           168
+#define I2S1I_DATA_IN3_IDX            169
+#define I2S1O_DATA_OUT3_IDX           169
+#define I2S1I_DATA_IN4_IDX            170
+#define I2S1O_DATA_OUT4_IDX           170
+#define I2S1I_DATA_IN5_IDX            171
+#define I2S1O_DATA_OUT5_IDX           171
+#define I2S1I_DATA_IN6_IDX            172
+#define I2S1O_DATA_OUT6_IDX           172
+#define I2S1I_DATA_IN7_IDX            173
+#define I2S1O_DATA_OUT7_IDX           173
+#define I2S1I_DATA_IN8_IDX            174
+#define I2S1O_DATA_OUT8_IDX           174
+#define I2S1I_DATA_IN9_IDX            175
+#define I2S1O_DATA_OUT9_IDX           175
+#define I2S1I_DATA_IN10_IDX           176
+#define I2S1O_DATA_OUT10_IDX          176
+#define I2S1I_DATA_IN11_IDX           177
+#define I2S1O_DATA_OUT11_IDX          177
+#define I2S1I_DATA_IN12_IDX           178
+#define I2S1O_DATA_OUT12_IDX          178
+#define I2S1I_DATA_IN13_IDX           179
+#define I2S1O_DATA_OUT13_IDX          179
+#define I2S1I_DATA_IN14_IDX           180
+#define I2S1O_DATA_OUT14_IDX          180
+#define I2S1I_DATA_IN15_IDX           181
+#define I2S1O_DATA_OUT15_IDX          181
+#define I2S1O_DATA_OUT16_IDX          182
+#define I2S1O_DATA_OUT17_IDX          183
+#define I2S1O_DATA_OUT18_IDX          184
+#define I2S1O_DATA_OUT19_IDX          185
+#define I2S1O_DATA_OUT20_IDX          186
+#define I2S1O_DATA_OUT21_IDX          187
+#define I2S1O_DATA_OUT22_IDX          188
+#define I2S1O_DATA_OUT23_IDX          189
+#define I2S0I_H_SYNC_IDX              190
+#define PWM3_OUT1H_IDX                190
+#define I2S0I_V_SYNC_IDX              191
+#define PWM3_OUT1L_IDX                191
+#define I2S0I_H_ENABLE_IDX            192
+#define PWM3_OUT2H_IDX                192
+#define I2S1I_H_SYNC_IDX              193
+#define PWM3_OUT2L_IDX                193
+#define I2S1I_V_SYNC_IDX              194
+#define PWM3_OUT3H_IDX                194
+#define I2S1I_H_ENABLE_IDX            195
+#define PWM3_OUT3L_IDX                195
+#define PWM3_OUT4H_IDX                196
+#define PWM3_OUT4L_IDX                197
+#define U2RXD_IN_IDX                  198
+#define U2TXD_OUT_IDX                 198
+#define U2CTS_IN_IDX                  199
+#define U2RTS_OUT_IDX                 199
+#define EMAC_MDC_I_IDX                200
+#define EMAC_MDC_O_IDX                200
+#define EMAC_MDI_I_IDX                201
+#define EMAC_MDO_O_IDX                201
+#define EMAC_CRS_I_IDX                202
+#define EMAC_CRS_O_IDX                202
+#define EMAC_COL_I_IDX                203
+#define EMAC_COL_O_IDX                203
+#define PCMFSYNC_IN_IDX               204
+#define BT_AUDIO0_IRQ_IDX             204
+#define PCMCLK_IN_IDX                 205
+#define BT_AUDIO1_IRQ_IDX             205
+#define PCMDIN_IDX                    206
+#define BT_AUDIO2_IRQ_IDX             206
+#define BLE_AUDIO0_IRQ_IDX            207
+#define BLE_AUDIO1_IRQ_IDX            208
+#define BLE_AUDIO2_IRQ_IDX            209
+#define PCMFSYNC_OUT_IDX              210
+#define PCMCLK_OUT_IDX                211
+#define PCMDOUT_IDX                   212
+#define BLE_AUDIO_SYNC0_P_IDX         213
+#define BLE_AUDIO_SYNC1_P_IDX         214
+#define BLE_AUDIO_SYNC2_P_IDX         215
+#define ANT_SEL0_IDX                  216
+#define ANT_SEL1_IDX                  217
+#define ANT_SEL2_IDX                  218
+#define ANT_SEL3_IDX                  219
+#define ANT_SEL4_IDX                  220
+#define ANT_SEL5_IDX                  221
+#define ANT_SEL6_IDX                  222
+#define ANT_SEL7_IDX                  223
+#define SIG_IN_FUNC224_IDX            224
+#define SIG_IN_FUNC225_IDX            225
+#define SIG_IN_FUNC226_IDX            226
+#define SIG_IN_FUNC227_IDX            227
+#define SIG_IN_FUNC228_IDX            228
+
+#endif /* __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_GPIO_SIGMAP_H */
diff --git a/arch/xtensa/src/esp32/chip/esp32_iomux.h b/arch/xtensa/src/esp32/chip/esp32_iomux.h
new file mode 100644
index 0000000000000000000000000000000000000000..f424fae1e2f07926067735b94d8b3f92ff728069
--- /dev/null
+++ b/arch/xtensa/src/esp32/chip/esp32_iomux.h
@@ -0,0 +1,288 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_gpio.c
+ *
+ * Developed for NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derivies from sample code provided by Expressif Systems:
+ *
+ *   Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_MUX_H
+#define __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_MUX_H 1
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include "chip/esp32_soc.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define SLP_OE                            (BIT(0))
+#define SLP_SEL                           (BIT(1))
+#define SLP_PD                            (BIT(2))
+#define SLP_PU                            (BIT(3))
+#define SLP_IE                            (BIT(4))
+#define SLP_DRV                           0x3
+#define SLP_DRV_S                         5
+#define FUN_PD                            (BIT(7))
+#define FUN_PU                            (BIT(8))
+#define FUN_IE                            (BIT(9))
+#define FUN_DRV                           0x3
+#define FUN_DRV_S                         10
+#define MCU_SEL                           0x7
+#define MCU_SEL_S                         12
+
+#define PIN_INPUT_ENABLE(PIN_NAME)        SET_PERI_REG_MASK(PIN_NAME,FUN_IE)
+#define PIN_INPUT_DISABLE(PIN_NAME)       CLEAR_PERI_REG_MASK(PIN_NAME,FUN_IE)
+#define PIN_SET_DRV(PIN_NAME, drv)        REG_SET_FIELD(PIN_NAME, FUN_DRV, (drv));
+#define PIN_PULLUP_DIS(PIN_NAME)          REG_CLR_BIT(PIN_NAME, FUN_PU)
+#define PIN_PULLUP_EN(PIN_NAME)           REG_SET_BIT(PIN_NAME, FUN_PU)
+#define PIN_PULLDWN_DIS(PIN_NAME)         REG_CLR_BIT(PIN_NAME, FUN_PD)
+#define PIN_PULLDWN_EN(PIN_NAME)          REG_SET_BIT(PIN_NAME, FUN_PD)
+#define PIN_FUNC_SELECT(PIN_NAME, FUNC)   REG_SET_FIELD(PIN_NAME, MCU_SEL, FUNC)
+
+#define PIN_FUNC_GPIO                     2
+
+#define PIN_CTRL                          (DR_REG_IO_MUX_BASE +0x00)
+#define CLK_OUT3                          0xf
+#define CLK_OUT3_S                        8
+#define CLK_OUT2                          0xf
+#define CLK_OUT2_S                        4
+#define CLK_OUT1                          0xf
+#define CLK_OUT1_S                        0
+
+#define PERIPHS_IO_MUX_GPIO0_U            (DR_REG_IO_MUX_BASE +0x44)
+#define FUNC_GPIO0_EMAC_TX_CLK            5
+#define FUNC_GPIO0_GPIO0                  2
+#define FUNC_GPIO0_CLK_OUT1               1
+#define FUNC_GPIO0_GPIO0_0                0
+
+#define PERIPHS_IO_MUX_U0TXD_U            (DR_REG_IO_MUX_BASE +0x88)
+#define FUNC_U0TXD_EMAC_RXD2              3
+#define FUNC_U0TXD_GPIO1                  2
+#define FUNC_U0TXD_CLK_OUT3               1
+#define FUNC_U0TXD_U0TXD                  0
+
+#define PERIPHS_IO_MUX_GPIO2_U            (DR_REG_IO_MUX_BASE +0x40)
+#define FUNC_GPIO2_SD_DATA0               4
+#define FUNC_GPIO2_HS2_DATA0              3
+#define FUNC_GPIO2_GPIO2                  2
+#define FUNC_GPIO2_HSPIWP                 1
+#define FUNC_GPIO2_GPIO2_0                0
+
+#define PERIPHS_IO_MUX_U0RXD_U            (DR_REG_IO_MUX_BASE +0x84)
+#define FUNC_U0RXD_GPIO3                  2
+#define FUNC_U0RXD_CLK_OUT2               1
+#define FUNC_U0RXD_U0RXD                  0
+
+#define PERIPHS_IO_MUX_GPIO4_U            (DR_REG_IO_MUX_BASE +0x48)
+#define FUNC_GPIO4_EMAC_TX_ER             5
+#define FUNC_GPIO4_SD_DATA1               4
+#define FUNC_GPIO4_HS2_DATA1              3
+#define FUNC_GPIO4_GPIO4                  2
+#define FUNC_GPIO4_HSPIHD                 1
+#define FUNC_GPIO4_GPIO4_0                0
+
+#define PERIPHS_IO_MUX_GPIO5_U            (DR_REG_IO_MUX_BASE +0x6c)
+#define FUNC_GPIO5_EMAC_RX_CLK            5
+#define FUNC_GPIO5_HS1_DATA6              3
+#define FUNC_GPIO5_GPIO5                  2
+#define FUNC_GPIO5_VSPICS0                1
+#define FUNC_GPIO5_GPIO5_0                0
+
+#define PERIPHS_IO_MUX_SD_CLK_U           (DR_REG_IO_MUX_BASE +0x60)
+#define FUNC_SD_CLK_U1CTS                 4
+#define FUNC_SD_CLK_HS1_CLK               3
+#define FUNC_SD_CLK_GPIO6                 2
+#define FUNC_SD_CLK_SPICLK                1
+#define FUNC_SD_CLK_SD_CLK                0
+
+#define PERIPHS_IO_MUX_SD_DATA0_U         (DR_REG_IO_MUX_BASE +0x64)
+#define FUNC_SD_DATA0_U2RTS               4
+#define FUNC_SD_DATA0_HS1_DATA0           3
+#define FUNC_SD_DATA0_GPIO7               2
+#define FUNC_SD_DATA0_SPIQ                1
+#define FUNC_SD_DATA0_SD_DATA0            0
+
+#define PERIPHS_IO_MUX_SD_DATA1_U         (DR_REG_IO_MUX_BASE +0x68)
+#define FUNC_SD_DATA1_U2CTS               4
+#define FUNC_SD_DATA1_HS1_DATA1           3
+#define FUNC_SD_DATA1_GPIO8               2
+#define FUNC_SD_DATA1_SPID                1
+#define FUNC_SD_DATA1_SD_DATA1            0
+
+#define PERIPHS_IO_MUX_SD_DATA2_U         (DR_REG_IO_MUX_BASE +0x54)
+#define FUNC_SD_DATA2_U1RXD               4
+#define FUNC_SD_DATA2_HS1_DATA2           3
+#define FUNC_SD_DATA2_GPIO9               2
+#define FUNC_SD_DATA2_SPIHD               1
+#define FUNC_SD_DATA2_SD_DATA2            0
+
+#define PERIPHS_IO_MUX_SD_DATA3_U         (DR_REG_IO_MUX_BASE +0x58)
+#define FUNC_SD_DATA3_U1TXD               4
+#define FUNC_SD_DATA3_HS1_DATA3           3
+#define FUNC_SD_DATA3_GPIO10              2
+#define FUNC_SD_DATA3_SPIWP               1
+#define FUNC_SD_DATA3_SD_DATA3            0
+
+#define PERIPHS_IO_MUX_SD_CMD_U           (DR_REG_IO_MUX_BASE +0x5c)
+#define FUNC_SD_CMD_U1RTS                 4
+#define FUNC_SD_CMD_HS1_CMD               3
+#define FUNC_SD_CMD_GPIO11                2
+#define FUNC_SD_CMD_SPICS0                1
+#define FUNC_SD_CMD_SD_CMD                0
+
+#define PERIPHS_IO_MUX_MTDI_U             (DR_REG_IO_MUX_BASE +0x34)
+#define FUNC_MTDI_EMAC_TXD3               5
+#define FUNC_MTDI_SD_DATA2                4
+#define FUNC_MTDI_HS2_DATA2               3
+#define FUNC_MTDI_GPIO12                  2
+#define FUNC_MTDI_HSPIQ                   1
+#define FUNC_MTDI_MTDI                    0
+
+#define PERIPHS_IO_MUX_MTCK_U             (DR_REG_IO_MUX_BASE +0x38)
+#define FUNC_MTCK_EMAC_RX_ER              5
+#define FUNC_MTCK_SD_DATA3                4
+#define FUNC_MTCK_HS2_DATA3               3
+#define FUNC_MTCK_GPIO13                  2
+#define FUNC_MTCK_HSPID                   1
+#define FUNC_MTCK_MTCK                    0
+
+#define PERIPHS_IO_MUX_MTMS_U             (DR_REG_IO_MUX_BASE +0x30)
+#define FUNC_MTMS_EMAC_TXD2               5
+#define FUNC_MTMS_SD_CLK                  4
+#define FUNC_MTMS_HS2_CLk                 3
+#define FUNC_MTMS_GPIO14                  2
+#define FUNC_MTMS_HSPICLK                 1
+#define FUNC_MTMS_MTMS                    0
+
+#define PERIPHS_IO_MUX_MTDO_U             (DR_REG_IO_MUX_BASE +0x3c)
+#define FUNC_MTDO_EMAC_RXD3               5
+#define FUNC_MTDO_SD_CMD                  4
+#define FUNC_MTDO_HS2_CMD                 3
+#define FUNC_MTDO_GPIO15                  2
+#define FUNC_MTDO_HSPICS0                 1
+#define FUNC_MTDO_MTDO                    0
+
+#define PERIPHS_IO_MUX_GPIO16_U           (DR_REG_IO_MUX_BASE +0x4c)
+#define FUNC_GPIO16_EMAC_CLK_OUT          5
+#define FUNC_GPIO16_U2RXD                 4
+#define FUNC_GPIO16_HS1_DATA4             3
+#define FUNC_GPIO16_GPIO16                2
+#define FUNC_GPIO16_GPIO16_0              0
+
+#define PERIPHS_IO_MUX_GPIO17_U           (DR_REG_IO_MUX_BASE +0x50)
+#define FUNC_GPIO17_EMAC_CLK_OUT_180      5
+#define FUNC_GPIO17_U2TXD                 4
+#define FUNC_GPIO17_HS1_DATA5             3
+#define FUNC_GPIO17_GPIO17                2
+#define FUNC_GPIO17_GPIO17_0              0
+
+#define PERIPHS_IO_MUX_GPIO18_U           (DR_REG_IO_MUX_BASE +0x70)
+#define FUNC_GPIO18_HS1_DATA7             3
+#define FUNC_GPIO18_GPIO18                2
+#define FUNC_GPIO18_VSPICLK               1
+#define FUNC_GPIO18_GPIO18_0              0
+
+#define PERIPHS_IO_MUX_GPIO19_U           (DR_REG_IO_MUX_BASE +0x74)
+#define FUNC_GPIO19_EMAC_TXD0             5
+#define FUNC_GPIO19_U0CTS                 3
+#define FUNC_GPIO19_GPIO19                2
+#define FUNC_GPIO19_VSPIQ                 1
+#define FUNC_GPIO19_GPIO19_0              0
+
+#define PERIPHS_IO_MUX_GPIO20_U           (DR_REG_IO_MUX_BASE +0x78)
+#define FUNC_GPIO20_GPIO20                2
+#define FUNC_GPIO20_GPIO20_0              0
+
+#define PERIPHS_IO_MUX_GPIO21_U           (DR_REG_IO_MUX_BASE +0x7c)
+#define FUNC_GPIO21_EMAC_TX_EN            5
+#define FUNC_GPIO21_GPIO21                2
+#define FUNC_GPIO21_VSPIHD                1
+#define FUNC_GPIO21_GPIO21_0              0
+
+#define PERIPHS_IO_MUX_GPIO22_U           (DR_REG_IO_MUX_BASE +0x80)
+#define FUNC_GPIO22_EMAC_TXD1             5
+#define FUNC_GPIO22_U0RTS                 3
+#define FUNC_GPIO22_GPIO22                2
+#define FUNC_GPIO22_VSPIWP                1
+#define FUNC_GPIO22_GPIO22_0              0
+
+#define PERIPHS_IO_MUX_GPIO23_U           (DR_REG_IO_MUX_BASE +0x8c)
+#define FUNC_GPIO23_HS1_STROBE            3
+#define FUNC_GPIO23_GPIO23                2
+#define FUNC_GPIO23_VSPID                 1
+#define FUNC_GPIO23_GPIO23_0              0
+
+#define PERIPHS_IO_MUX_GPIO24_U           (DR_REG_IO_MUX_BASE +0x90)
+#define FUNC_GPIO24_GPIO24                2
+#define FUNC_GPIO24_GPIO24_0              0
+
+#define PERIPHS_IO_MUX_GPIO25_U           (DR_REG_IO_MUX_BASE +0x24)
+#define FUNC_GPIO25_EMAC_RXD0             5
+#define FUNC_GPIO25_GPIO25                2
+#define FUNC_GPIO25_GPIO25_0              0
+
+#define PERIPHS_IO_MUX_GPIO26_U           (DR_REG_IO_MUX_BASE +0x28)
+#define FUNC_GPIO26_EMAC_RXD1             5
+#define FUNC_GPIO26_GPIO26                2
+#define FUNC_GPIO26_GPIO26_0              0
+
+#define PERIPHS_IO_MUX_GPIO27_U           (DR_REG_IO_MUX_BASE +0x2c)
+#define FUNC_GPIO27_EMAC_RX_DV            5
+#define FUNC_GPIO27_GPIO27                2
+#define FUNC_GPIO27_GPIO27_0              0
+
+#define PERIPHS_IO_MUX_GPIO32_U           (DR_REG_IO_MUX_BASE +0x1c)
+#define FUNC_GPIO32_GPIO32                2
+#define FUNC_GPIO32_GPIO32_0              0
+
+#define PERIPHS_IO_MUX_GPIO33_U           (DR_REG_IO_MUX_BASE +0x20)
+#define FUNC_GPIO33_GPIO33                2
+#define FUNC_GPIO33_GPIO33_0              0
+
+#define PERIPHS_IO_MUX_GPIO34_U           (DR_REG_IO_MUX_BASE +0x14)
+#define FUNC_GPIO34_GPIO34                2
+#define FUNC_GPIO34_GPIO34_0              0
+
+#define PERIPHS_IO_MUX_GPIO35_U           (DR_REG_IO_MUX_BASE +0x18)
+#define FUNC_GPIO35_GPIO35                2
+#define FUNC_GPIO35_GPIO35_0              0
+
+#define PERIPHS_IO_MUX_GPIO36_U           (DR_REG_IO_MUX_BASE +0x04)
+#define FUNC_GPIO36_GPIO36                2
+#define FUNC_GPIO36_GPIO36_0              0
+
+#define PERIPHS_IO_MUX_GPIO37_U           (DR_REG_IO_MUX_BASE +0x08)
+#define FUNC_GPIO37_GPIO37                2
+#define FUNC_GPIO37_GPIO37_0              0
+
+#define PERIPHS_IO_MUX_GPIO38_U           (DR_REG_IO_MUX_BASE +0x0c)
+#define FUNC_GPIO38_GPIO38                2
+#define FUNC_GPIO38_GPIO38_0              0
+
+#define PERIPHS_IO_MUX_GPIO39_U           (DR_REG_IO_MUX_BASE +0x10)
+#define FUNC_GPIO39_GPIO39                2
+#define FUNC_GPIO39_GPIO39_0              0
+
+#endif /* __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_MUX_H */
diff --git a/arch/xtensa/src/esp32/chip/esp32_rtccntl.h b/arch/xtensa/src/esp32/chip/esp32_rtccntl.h
new file mode 100644
index 0000000000000000000000000000000000000000..23a0102234c40fa60d9b6e814199ff67d1e63534
--- /dev/null
+++ b/arch/xtensa/src/esp32/chip/esp32_rtccntl.h
@@ -0,0 +1,2004 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/chip/esp32_rtccnt.h
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from logic originally provided by Espressif Systems:
+ *
+ *    Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_ESP32_CHIP_XTENSA_ESP32_H
+#define __ARCH_XTENSA_SRC_ESP32_CHIP_XTENSA_ESP32_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include "chip/esp32_soc.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define RTC_CNTL_OPTIONS0_REG          (DR_REG_RTCCNTL_BASE + 0x0)
+/* RTC_CNTL_SW_SYS_RST : WO ;bitpos:[31] ;default: 1'd0 ; */
+/*description: SW system reset*/
+#define RTC_CNTL_SW_SYS_RST  (BIT(31))
+#define RTC_CNTL_SW_SYS_RST_M  (BIT(31))
+#define RTC_CNTL_SW_SYS_RST_V  0x1
+#define RTC_CNTL_SW_SYS_RST_S  31
+/* RTC_CNTL_DG_WRAP_FORCE_NORST : R/W ;bitpos:[30] ;default: 1'd0 ; */
+/*description: digital core force no reset in deep sleep*/
+#define RTC_CNTL_DG_WRAP_FORCE_NORST  (BIT(30))
+#define RTC_CNTL_DG_WRAP_FORCE_NORST_M  (BIT(30))
+#define RTC_CNTL_DG_WRAP_FORCE_NORST_V  0x1
+#define RTC_CNTL_DG_WRAP_FORCE_NORST_S  30
+/* RTC_CNTL_DG_WRAP_FORCE_RST : R/W ;bitpos:[29] ;default: 1'd0 ; */
+/*description: digital wrap force reset in deep sleep*/
+#define RTC_CNTL_DG_WRAP_FORCE_RST  (BIT(29))
+#define RTC_CNTL_DG_WRAP_FORCE_RST_M  (BIT(29))
+#define RTC_CNTL_DG_WRAP_FORCE_RST_V  0x1
+#define RTC_CNTL_DG_WRAP_FORCE_RST_S  29
+/* RTC_CNTL_ANALOG_FORCE_NOISO : R/W ;bitpos:[28] ;default: 1'd1 ; */
+/*description: */
+#define RTC_CNTL_ANALOG_FORCE_NOISO  (BIT(28))
+#define RTC_CNTL_ANALOG_FORCE_NOISO_M  (BIT(28))
+#define RTC_CNTL_ANALOG_FORCE_NOISO_V  0x1
+#define RTC_CNTL_ANALOG_FORCE_NOISO_S  28
+/* RTC_CNTL_PLL_FORCE_NOISO : R/W ;bitpos:[27] ;default: 1'd1 ; */
+/*description: */
+#define RTC_CNTL_PLL_FORCE_NOISO  (BIT(27))
+#define RTC_CNTL_PLL_FORCE_NOISO_M  (BIT(27))
+#define RTC_CNTL_PLL_FORCE_NOISO_V  0x1
+#define RTC_CNTL_PLL_FORCE_NOISO_S  27
+/* RTC_CNTL_XTL_FORCE_NOISO : R/W ;bitpos:[26] ;default: 1'd1 ; */
+/*description: */
+#define RTC_CNTL_XTL_FORCE_NOISO  (BIT(26))
+#define RTC_CNTL_XTL_FORCE_NOISO_M  (BIT(26))
+#define RTC_CNTL_XTL_FORCE_NOISO_V  0x1
+#define RTC_CNTL_XTL_FORCE_NOISO_S  26
+/* RTC_CNTL_ANALOG_FORCE_ISO : R/W ;bitpos:[25] ;default: 1'd0 ; */
+/*description: */
+#define RTC_CNTL_ANALOG_FORCE_ISO  (BIT(25))
+#define RTC_CNTL_ANALOG_FORCE_ISO_M  (BIT(25))
+#define RTC_CNTL_ANALOG_FORCE_ISO_V  0x1
+#define RTC_CNTL_ANALOG_FORCE_ISO_S  25
+/* RTC_CNTL_PLL_FORCE_ISO : R/W ;bitpos:[24] ;default: 1'd0 ; */
+/*description: */
+#define RTC_CNTL_PLL_FORCE_ISO  (BIT(24))
+#define RTC_CNTL_PLL_FORCE_ISO_M  (BIT(24))
+#define RTC_CNTL_PLL_FORCE_ISO_V  0x1
+#define RTC_CNTL_PLL_FORCE_ISO_S  24
+/* RTC_CNTL_XTL_FORCE_ISO : R/W ;bitpos:[23] ;default: 1'd0 ; */
+/*description: */
+#define RTC_CNTL_XTL_FORCE_ISO  (BIT(23))
+#define RTC_CNTL_XTL_FORCE_ISO_M  (BIT(23))
+#define RTC_CNTL_XTL_FORCE_ISO_V  0x1
+#define RTC_CNTL_XTL_FORCE_ISO_S  23
+/* RTC_CNTL_BIAS_CORE_FORCE_PU : R/W ;bitpos:[22] ;default: 1'd1 ; */
+/*description: BIAS_CORE force power up*/
+#define RTC_CNTL_BIAS_CORE_FORCE_PU  (BIT(22))
+#define RTC_CNTL_BIAS_CORE_FORCE_PU_M  (BIT(22))
+#define RTC_CNTL_BIAS_CORE_FORCE_PU_V  0x1
+#define RTC_CNTL_BIAS_CORE_FORCE_PU_S  22
+/* RTC_CNTL_BIAS_CORE_FORCE_PD : R/W ;bitpos:[21] ;default: 1'b0 ; */
+/*description: BIAS_CORE force power down*/
+#define RTC_CNTL_BIAS_CORE_FORCE_PD  (BIT(21))
+#define RTC_CNTL_BIAS_CORE_FORCE_PD_M  (BIT(21))
+#define RTC_CNTL_BIAS_CORE_FORCE_PD_V  0x1
+#define RTC_CNTL_BIAS_CORE_FORCE_PD_S  21
+/* RTC_CNTL_BIAS_CORE_FOLW_8M : R/W ;bitpos:[20] ;default: 1'd0 ; */
+/*description: BIAS_CORE follow CK8M*/
+#define RTC_CNTL_BIAS_CORE_FOLW_8M  (BIT(20))
+#define RTC_CNTL_BIAS_CORE_FOLW_8M_M  (BIT(20))
+#define RTC_CNTL_BIAS_CORE_FOLW_8M_V  0x1
+#define RTC_CNTL_BIAS_CORE_FOLW_8M_S  20
+/* RTC_CNTL_BIAS_I2C_FORCE_PU : R/W ;bitpos:[19] ;default: 1'd1 ; */
+/*description: BIAS_I2C force power up*/
+#define RTC_CNTL_BIAS_I2C_FORCE_PU  (BIT(19))
+#define RTC_CNTL_BIAS_I2C_FORCE_PU_M  (BIT(19))
+#define RTC_CNTL_BIAS_I2C_FORCE_PU_V  0x1
+#define RTC_CNTL_BIAS_I2C_FORCE_PU_S  19
+/* RTC_CNTL_BIAS_I2C_FORCE_PD : R/W ;bitpos:[18] ;default: 1'b0 ; */
+/*description: BIAS_I2C force power down*/
+#define RTC_CNTL_BIAS_I2C_FORCE_PD  (BIT(18))
+#define RTC_CNTL_BIAS_I2C_FORCE_PD_M  (BIT(18))
+#define RTC_CNTL_BIAS_I2C_FORCE_PD_V  0x1
+#define RTC_CNTL_BIAS_I2C_FORCE_PD_S  18
+/* RTC_CNTL_BIAS_I2C_FOLW_8M : R/W ;bitpos:[17] ;default: 1'd0 ; */
+/*description: BIAS_I2C follow CK8M*/
+#define RTC_CNTL_BIAS_I2C_FOLW_8M  (BIT(17))
+#define RTC_CNTL_BIAS_I2C_FOLW_8M_M  (BIT(17))
+#define RTC_CNTL_BIAS_I2C_FOLW_8M_V  0x1
+#define RTC_CNTL_BIAS_I2C_FOLW_8M_S  17
+/* RTC_CNTL_BIAS_FORCE_NOSLEEP : R/W ;bitpos:[16] ;default: 1'd1 ; */
+/*description: BIAS_SLEEP force no sleep*/
+#define RTC_CNTL_BIAS_FORCE_NOSLEEP  (BIT(16))
+#define RTC_CNTL_BIAS_FORCE_NOSLEEP_M  (BIT(16))
+#define RTC_CNTL_BIAS_FORCE_NOSLEEP_V  0x1
+#define RTC_CNTL_BIAS_FORCE_NOSLEEP_S  16
+/* RTC_CNTL_BIAS_FORCE_SLEEP : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: BIAS_SLEEP force sleep*/
+#define RTC_CNTL_BIAS_FORCE_SLEEP  (BIT(15))
+#define RTC_CNTL_BIAS_FORCE_SLEEP_M  (BIT(15))
+#define RTC_CNTL_BIAS_FORCE_SLEEP_V  0x1
+#define RTC_CNTL_BIAS_FORCE_SLEEP_S  15
+/* RTC_CNTL_BIAS_SLEEP_FOLW_8M : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/*description: BIAS_SLEEP follow CK8M*/
+#define RTC_CNTL_BIAS_SLEEP_FOLW_8M  (BIT(14))
+#define RTC_CNTL_BIAS_SLEEP_FOLW_8M_M  (BIT(14))
+#define RTC_CNTL_BIAS_SLEEP_FOLW_8M_V  0x1
+#define RTC_CNTL_BIAS_SLEEP_FOLW_8M_S  14
+/* RTC_CNTL_XTL_FORCE_PU : R/W ;bitpos:[13] ;default: 1'd1 ; */
+/*description: crystall force power up*/
+#define RTC_CNTL_XTL_FORCE_PU  (BIT(13))
+#define RTC_CNTL_XTL_FORCE_PU_M  (BIT(13))
+#define RTC_CNTL_XTL_FORCE_PU_V  0x1
+#define RTC_CNTL_XTL_FORCE_PU_S  13
+/* RTC_CNTL_XTL_FORCE_PD : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: crystall force power down*/
+#define RTC_CNTL_XTL_FORCE_PD  (BIT(12))
+#define RTC_CNTL_XTL_FORCE_PD_M  (BIT(12))
+#define RTC_CNTL_XTL_FORCE_PD_V  0x1
+#define RTC_CNTL_XTL_FORCE_PD_S  12
+/* RTC_CNTL_BBPLL_FORCE_PU : R/W ;bitpos:[11] ;default: 1'd0 ; */
+/*description: BB_PLL force power up*/
+#define RTC_CNTL_BBPLL_FORCE_PU  (BIT(11))
+#define RTC_CNTL_BBPLL_FORCE_PU_M  (BIT(11))
+#define RTC_CNTL_BBPLL_FORCE_PU_V  0x1
+#define RTC_CNTL_BBPLL_FORCE_PU_S  11
+/* RTC_CNTL_BBPLL_FORCE_PD : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: BB_PLL force power down*/
+#define RTC_CNTL_BBPLL_FORCE_PD  (BIT(10))
+#define RTC_CNTL_BBPLL_FORCE_PD_M  (BIT(10))
+#define RTC_CNTL_BBPLL_FORCE_PD_V  0x1
+#define RTC_CNTL_BBPLL_FORCE_PD_S  10
+/* RTC_CNTL_BBPLL_I2C_FORCE_PU : R/W ;bitpos:[9] ;default: 1'd0 ; */
+/*description: BB_PLL_I2C force power up*/
+#define RTC_CNTL_BBPLL_I2C_FORCE_PU  (BIT(9))
+#define RTC_CNTL_BBPLL_I2C_FORCE_PU_M  (BIT(9))
+#define RTC_CNTL_BBPLL_I2C_FORCE_PU_V  0x1
+#define RTC_CNTL_BBPLL_I2C_FORCE_PU_S  9
+/* RTC_CNTL_BBPLL_I2C_FORCE_PD : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: BB_PLL _I2C force power down*/
+#define RTC_CNTL_BBPLL_I2C_FORCE_PD  (BIT(8))
+#define RTC_CNTL_BBPLL_I2C_FORCE_PD_M  (BIT(8))
+#define RTC_CNTL_BBPLL_I2C_FORCE_PD_V  0x1
+#define RTC_CNTL_BBPLL_I2C_FORCE_PD_S  8
+/* RTC_CNTL_BB_I2C_FORCE_PU : R/W ;bitpos:[7] ;default: 1'd0 ; */
+/*description: BB_I2C force power up*/
+#define RTC_CNTL_BB_I2C_FORCE_PU  (BIT(7))
+#define RTC_CNTL_BB_I2C_FORCE_PU_M  (BIT(7))
+#define RTC_CNTL_BB_I2C_FORCE_PU_V  0x1
+#define RTC_CNTL_BB_I2C_FORCE_PU_S  7
+/* RTC_CNTL_BB_I2C_FORCE_PD : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: BB_I2C force power down*/
+#define RTC_CNTL_BB_I2C_FORCE_PD  (BIT(6))
+#define RTC_CNTL_BB_I2C_FORCE_PD_M  (BIT(6))
+#define RTC_CNTL_BB_I2C_FORCE_PD_V  0x1
+#define RTC_CNTL_BB_I2C_FORCE_PD_S  6
+/* RTC_CNTL_SW_PROCPU_RST : WO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: PRO CPU SW reset*/
+#define RTC_CNTL_SW_PROCPU_RST  (BIT(5))
+#define RTC_CNTL_SW_PROCPU_RST_M  (BIT(5))
+#define RTC_CNTL_SW_PROCPU_RST_V  0x1
+#define RTC_CNTL_SW_PROCPU_RST_S  5
+/* RTC_CNTL_SW_APPCPU_RST : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: APP CPU SW reset*/
+#define RTC_CNTL_SW_APPCPU_RST  (BIT(4))
+#define RTC_CNTL_SW_APPCPU_RST_M  (BIT(4))
+#define RTC_CNTL_SW_APPCPU_RST_V  0x1
+#define RTC_CNTL_SW_APPCPU_RST_S  4
+/* RTC_CNTL_SW_STALL_PROCPU_C0 : R/W ;bitpos:[3:2] ;default: 2'b0 ; */
+/*description: {reg_sw_stall_procpu_c1[5:0]   reg_sw_stall_procpu_c0[1:0]} ==
+ 0x86 will stall PRO CPU*/
+#define RTC_CNTL_SW_STALL_PROCPU_C0  0x00000003
+#define RTC_CNTL_SW_STALL_PROCPU_C0_M  ((RTC_CNTL_SW_STALL_PROCPU_C0_V)<<(RTC_CNTL_SW_STALL_PROCPU_C0_S))
+#define RTC_CNTL_SW_STALL_PROCPU_C0_V  0x3
+#define RTC_CNTL_SW_STALL_PROCPU_C0_S  2
+/* RTC_CNTL_SW_STALL_APPCPU_C0 : R/W ;bitpos:[1:0] ;default: 2'b0 ; */
+/*description: {reg_sw_stall_appcpu_c1[5:0]   reg_sw_stall_appcpu_c0[1:0]} ==
+ 0x86 will stall APP CPU*/
+#define RTC_CNTL_SW_STALL_APPCPU_C0  0x00000003
+#define RTC_CNTL_SW_STALL_APPCPU_C0_M  ((RTC_CNTL_SW_STALL_APPCPU_C0_V)<<(RTC_CNTL_SW_STALL_APPCPU_C0_S))
+#define RTC_CNTL_SW_STALL_APPCPU_C0_V  0x3
+#define RTC_CNTL_SW_STALL_APPCPU_C0_S  0
+
+#define RTC_CNTL_SLP_TIMER0_REG          (DR_REG_RTCCNTL_BASE + 0x4)
+/* RTC_CNTL_SLP_VAL_LO : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: RTC sleep timer low 32 bits*/
+#define RTC_CNTL_SLP_VAL_LO  0xFFFFFFFF
+#define RTC_CNTL_SLP_VAL_LO_M  ((RTC_CNTL_SLP_VAL_LO_V)<<(RTC_CNTL_SLP_VAL_LO_S))
+#define RTC_CNTL_SLP_VAL_LO_V  0xFFFFFFFF
+#define RTC_CNTL_SLP_VAL_LO_S  0
+
+#define RTC_CNTL_SLP_TIMER1_REG          (DR_REG_RTCCNTL_BASE + 0x8)
+/* RTC_CNTL_MAIN_TIMER_ALARM_EN : R/W ;bitpos:[16] ;default: 1'h0 ; */
+/*description: timer alarm enable bit*/
+#define RTC_CNTL_MAIN_TIMER_ALARM_EN  (BIT(16))
+#define RTC_CNTL_MAIN_TIMER_ALARM_EN_M  (BIT(16))
+#define RTC_CNTL_MAIN_TIMER_ALARM_EN_V  0x1
+#define RTC_CNTL_MAIN_TIMER_ALARM_EN_S  16
+/* RTC_CNTL_SLP_VAL_HI : R/W ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: RTC sleep timer high 16 bits*/
+#define RTC_CNTL_SLP_VAL_HI  0x0000FFFF
+#define RTC_CNTL_SLP_VAL_HI_M  ((RTC_CNTL_SLP_VAL_HI_V)<<(RTC_CNTL_SLP_VAL_HI_S))
+#define RTC_CNTL_SLP_VAL_HI_V  0xFFFF
+#define RTC_CNTL_SLP_VAL_HI_S  0
+
+#define RTC_CNTL_TIME_UPDATE_REG          (DR_REG_RTCCNTL_BASE + 0xc)
+/* RTC_CNTL_TIME_UPDATE : WO ;bitpos:[31] ;default: 1'h0 ; */
+/*description: Set 1: to update register with RTC timer*/
+#define RTC_CNTL_TIME_UPDATE  (BIT(31))
+#define RTC_CNTL_TIME_UPDATE_M  (BIT(31))
+#define RTC_CNTL_TIME_UPDATE_V  0x1
+#define RTC_CNTL_TIME_UPDATE_S  31
+/* RTC_CNTL_TIME_VALID : RO ;bitpos:[30] ;default: 1'b0 ; */
+/*description: To indicate the register is updated*/
+#define RTC_CNTL_TIME_VALID  (BIT(30))
+#define RTC_CNTL_TIME_VALID_M  (BIT(30))
+#define RTC_CNTL_TIME_VALID_V  0x1
+#define RTC_CNTL_TIME_VALID_S  30
+
+#define RTC_CNTL_TIME0_REG          (DR_REG_RTCCNTL_BASE + 0x10)
+/* RTC_CNTL_TIME_LO : RO ;bitpos:[31:0] ;default: 32'h0 ; */
+/*description: RTC timer low 32 bits*/
+#define RTC_CNTL_TIME_LO  0xFFFFFFFF
+#define RTC_CNTL_TIME_LO_M  ((RTC_CNTL_TIME_LO_V)<<(RTC_CNTL_TIME_LO_S))
+#define RTC_CNTL_TIME_LO_V  0xFFFFFFFF
+#define RTC_CNTL_TIME_LO_S  0
+
+#define RTC_CNTL_TIME1_REG          (DR_REG_RTCCNTL_BASE + 0x14)
+/* RTC_CNTL_TIME_HI : RO ;bitpos:[15:0] ;default: 16'h0 ; */
+/*description: RTC timer high 16 bits*/
+#define RTC_CNTL_TIME_HI  0x0000FFFF
+#define RTC_CNTL_TIME_HI_M  ((RTC_CNTL_TIME_HI_V)<<(RTC_CNTL_TIME_HI_S))
+#define RTC_CNTL_TIME_HI_V  0xFFFF
+#define RTC_CNTL_TIME_HI_S  0
+
+#define RTC_CNTL_STATE0_REG          (DR_REG_RTCCNTL_BASE + 0x18)
+/* RTC_CNTL_SLEEP_EN : R/W ;bitpos:[31] ;default: 1'd0 ; */
+/*description: sleep enable bit*/
+#define RTC_CNTL_SLEEP_EN  (BIT(31))
+#define RTC_CNTL_SLEEP_EN_M  (BIT(31))
+#define RTC_CNTL_SLEEP_EN_V  0x1
+#define RTC_CNTL_SLEEP_EN_S  31
+/* RTC_CNTL_SLP_REJECT : R/W ;bitpos:[30] ;default: 1'd0 ; */
+/*description: sleep reject bit*/
+#define RTC_CNTL_SLP_REJECT  (BIT(30))
+#define RTC_CNTL_SLP_REJECT_M  (BIT(30))
+#define RTC_CNTL_SLP_REJECT_V  0x1
+#define RTC_CNTL_SLP_REJECT_S  30
+/* RTC_CNTL_SLP_WAKEUP : R/W ;bitpos:[29] ;default: 1'd0 ; */
+/*description: sleep wakeup bit*/
+#define RTC_CNTL_SLP_WAKEUP  (BIT(29))
+#define RTC_CNTL_SLP_WAKEUP_M  (BIT(29))
+#define RTC_CNTL_SLP_WAKEUP_V  0x1
+#define RTC_CNTL_SLP_WAKEUP_S  29
+/* RTC_CNTL_SDIO_ACTIVE_IND : RO ;bitpos:[28] ;default: 1'd0 ; */
+/*description: SDIO active indication*/
+#define RTC_CNTL_SDIO_ACTIVE_IND  (BIT(28))
+#define RTC_CNTL_SDIO_ACTIVE_IND_M  (BIT(28))
+#define RTC_CNTL_SDIO_ACTIVE_IND_V  0x1
+#define RTC_CNTL_SDIO_ACTIVE_IND_S  28
+/* RTC_CNTL_ULP_CP_SLP_TIMER_EN : R/W ;bitpos:[24] ;default: 1'd0 ; */
+/*description: ULP-coprocessor timer enable bit*/
+#define RTC_CNTL_ULP_CP_SLP_TIMER_EN  (BIT(24))
+#define RTC_CNTL_ULP_CP_SLP_TIMER_EN_M  (BIT(24))
+#define RTC_CNTL_ULP_CP_SLP_TIMER_EN_V  0x1
+#define RTC_CNTL_ULP_CP_SLP_TIMER_EN_S  24
+/* RTC_CNTL_TOUCH_SLP_TIMER_EN : R/W ;bitpos:[23] ;default: 1'd0 ; */
+/*description: touch timer enable bit*/
+#define RTC_CNTL_TOUCH_SLP_TIMER_EN  (BIT(23))
+#define RTC_CNTL_TOUCH_SLP_TIMER_EN_M  (BIT(23))
+#define RTC_CNTL_TOUCH_SLP_TIMER_EN_V  0x1
+#define RTC_CNTL_TOUCH_SLP_TIMER_EN_S  23
+/* RTC_CNTL_APB2RTC_BRIDGE_SEL : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: 1: APB to RTC using bridge   0: APB to RTC using sync*/
+#define RTC_CNTL_APB2RTC_BRIDGE_SEL  (BIT(22))
+#define RTC_CNTL_APB2RTC_BRIDGE_SEL_M  (BIT(22))
+#define RTC_CNTL_APB2RTC_BRIDGE_SEL_V  0x1
+#define RTC_CNTL_APB2RTC_BRIDGE_SEL_S  22
+/* RTC_CNTL_ULP_CP_WAKEUP_FORCE_EN : R/W ;bitpos:[21] ;default: 1'd1 ; */
+/*description: ULP-coprocessor force wake up*/
+#define RTC_CNTL_ULP_CP_WAKEUP_FORCE_EN  (BIT(21))
+#define RTC_CNTL_ULP_CP_WAKEUP_FORCE_EN_M  (BIT(21))
+#define RTC_CNTL_ULP_CP_WAKEUP_FORCE_EN_V  0x1
+#define RTC_CNTL_ULP_CP_WAKEUP_FORCE_EN_S  21
+/* RTC_CNTL_TOUCH_WAKEUP_FORCE_EN : R/W ;bitpos:[20] ;default: 1'd1 ; */
+/*description: touch controller force wake up*/
+#define RTC_CNTL_TOUCH_WAKEUP_FORCE_EN  (BIT(20))
+#define RTC_CNTL_TOUCH_WAKEUP_FORCE_EN_M  (BIT(20))
+#define RTC_CNTL_TOUCH_WAKEUP_FORCE_EN_V  0x1
+#define RTC_CNTL_TOUCH_WAKEUP_FORCE_EN_S  20
+
+#define RTC_CNTL_TIMER1_REG          (DR_REG_RTCCNTL_BASE + 0x1c)
+/* RTC_CNTL_PLL_BUF_WAIT : R/W ;bitpos:[31:24] ;default: 8'd40 ; */
+/*description: PLL wait cycles in slow_clk_rtc*/
+#define RTC_CNTL_PLL_BUF_WAIT  0x000000FF
+#define RTC_CNTL_PLL_BUF_WAIT_M  ((RTC_CNTL_PLL_BUF_WAIT_V)<<(RTC_CNTL_PLL_BUF_WAIT_S))
+#define RTC_CNTL_PLL_BUF_WAIT_V  0xFF
+#define RTC_CNTL_PLL_BUF_WAIT_S  24
+/* RTC_CNTL_XTL_BUF_WAIT : R/W ;bitpos:[23:14] ;default: 10'd80 ; */
+/*description: XTAL wait cycles in slow_clk_rtc*/
+#define RTC_CNTL_XTL_BUF_WAIT  0x000003FF
+#define RTC_CNTL_XTL_BUF_WAIT_M  ((RTC_CNTL_XTL_BUF_WAIT_V)<<(RTC_CNTL_XTL_BUF_WAIT_S))
+#define RTC_CNTL_XTL_BUF_WAIT_V  0x3FF
+#define RTC_CNTL_XTL_BUF_WAIT_S  14
+/* RTC_CNTL_CK8M_WAIT : R/W ;bitpos:[13:6] ;default: 8'h10 ; */
+/*description: CK8M wait cycles in slow_clk_rtc*/
+#define RTC_CNTL_CK8M_WAIT  0x000000FF
+#define RTC_CNTL_CK8M_WAIT_M  ((RTC_CNTL_CK8M_WAIT_V)<<(RTC_CNTL_CK8M_WAIT_S))
+#define RTC_CNTL_CK8M_WAIT_V  0xFF
+#define RTC_CNTL_CK8M_WAIT_S  6
+/* RTC_CNTL_CPU_STALL_WAIT : R/W ;bitpos:[5:1] ;default: 5'd1 ; */
+/*description: CPU stall wait cycles in fast_clk_rtc*/
+#define RTC_CNTL_CPU_STALL_WAIT  0x0000001F
+#define RTC_CNTL_CPU_STALL_WAIT_M  ((RTC_CNTL_CPU_STALL_WAIT_V)<<(RTC_CNTL_CPU_STALL_WAIT_S))
+#define RTC_CNTL_CPU_STALL_WAIT_V  0x1F
+#define RTC_CNTL_CPU_STALL_WAIT_S  1
+/* RTC_CNTL_CPU_STALL_EN : R/W ;bitpos:[0] ;default: 1'd1 ; */
+/*description: CPU stall enable bit*/
+#define RTC_CNTL_CPU_STALL_EN  (BIT(0))
+#define RTC_CNTL_CPU_STALL_EN_M  (BIT(0))
+#define RTC_CNTL_CPU_STALL_EN_V  0x1
+#define RTC_CNTL_CPU_STALL_EN_S  0
+
+#define RTC_CNTL_TIMER2_REG          (DR_REG_RTCCNTL_BASE + 0x20)
+/* RTC_CNTL_MIN_TIME_CK8M_OFF : R/W ;bitpos:[31:24] ;default: 8'h1 ; */
+/*description: minimal cycles in slow_clk_rtc for CK8M in power down state*/
+#define RTC_CNTL_MIN_TIME_CK8M_OFF  0x000000FF
+#define RTC_CNTL_MIN_TIME_CK8M_OFF_M  ((RTC_CNTL_MIN_TIME_CK8M_OFF_V)<<(RTC_CNTL_MIN_TIME_CK8M_OFF_S))
+#define RTC_CNTL_MIN_TIME_CK8M_OFF_V  0xFF
+#define RTC_CNTL_MIN_TIME_CK8M_OFF_S  24
+/* RTC_CNTL_ULPCP_TOUCH_START_WAIT : R/W ;bitpos:[23:15] ;default: 9'h10 ; */
+/*description: wait cycles in slow_clk_rtc before ULP-coprocessor / touch controller
+ start to work*/
+#define RTC_CNTL_ULPCP_TOUCH_START_WAIT  0x000001FF
+#define RTC_CNTL_ULPCP_TOUCH_START_WAIT_M  ((RTC_CNTL_ULPCP_TOUCH_START_WAIT_V)<<(RTC_CNTL_ULPCP_TOUCH_START_WAIT_S))
+#define RTC_CNTL_ULPCP_TOUCH_START_WAIT_V  0x1FF
+#define RTC_CNTL_ULPCP_TOUCH_START_WAIT_S  15
+
+#define RTC_CNTL_TIMER3_REG          (DR_REG_RTCCNTL_BASE + 0x24)
+/* RTC_CNTL_ROM_RAM_POWERUP_TIMER : R/W ;bitpos:[31:25] ;default: 7'd10 ; */
+/*description: */
+#define RTC_CNTL_ROM_RAM_POWERUP_TIMER  0x0000007F
+#define RTC_CNTL_ROM_RAM_POWERUP_TIMER_M  ((RTC_CNTL_ROM_RAM_POWERUP_TIMER_V)<<(RTC_CNTL_ROM_RAM_POWERUP_TIMER_S))
+#define RTC_CNTL_ROM_RAM_POWERUP_TIMER_V  0x7F
+#define RTC_CNTL_ROM_RAM_POWERUP_TIMER_S  25
+/* RTC_CNTL_ROM_RAM_WAIT_TIMER : R/W ;bitpos:[24:16] ;default: 9'h16 ; */
+/*description: */
+#define RTC_CNTL_ROM_RAM_WAIT_TIMER  0x000001FF
+#define RTC_CNTL_ROM_RAM_WAIT_TIMER_M  ((RTC_CNTL_ROM_RAM_WAIT_TIMER_V)<<(RTC_CNTL_ROM_RAM_WAIT_TIMER_S))
+#define RTC_CNTL_ROM_RAM_WAIT_TIMER_V  0x1FF
+#define RTC_CNTL_ROM_RAM_WAIT_TIMER_S  16
+/* RTC_CNTL_WIFI_POWERUP_TIMER : R/W ;bitpos:[15:9] ;default: 7'h5 ; */
+/*description: */
+#define RTC_CNTL_WIFI_POWERUP_TIMER  0x0000007F
+#define RTC_CNTL_WIFI_POWERUP_TIMER_M  ((RTC_CNTL_WIFI_POWERUP_TIMER_V)<<(RTC_CNTL_WIFI_POWERUP_TIMER_S))
+#define RTC_CNTL_WIFI_POWERUP_TIMER_V  0x7F
+#define RTC_CNTL_WIFI_POWERUP_TIMER_S  9
+/* RTC_CNTL_WIFI_WAIT_TIMER : R/W ;bitpos:[8:0] ;default: 9'h8 ; */
+/*description: */
+#define RTC_CNTL_WIFI_WAIT_TIMER  0x000001FF
+#define RTC_CNTL_WIFI_WAIT_TIMER_M  ((RTC_CNTL_WIFI_WAIT_TIMER_V)<<(RTC_CNTL_WIFI_WAIT_TIMER_S))
+#define RTC_CNTL_WIFI_WAIT_TIMER_V  0x1FF
+#define RTC_CNTL_WIFI_WAIT_TIMER_S  0
+
+#define RTC_CNTL_TIMER4_REG          (DR_REG_RTCCNTL_BASE + 0x28)
+/* RTC_CNTL_DG_WRAP_POWERUP_TIMER : R/W ;bitpos:[31:25] ;default: 7'h8 ; */
+/*description: */
+#define RTC_CNTL_DG_WRAP_POWERUP_TIMER  0x0000007F
+#define RTC_CNTL_DG_WRAP_POWERUP_TIMER_M  ((RTC_CNTL_DG_WRAP_POWERUP_TIMER_V)<<(RTC_CNTL_DG_WRAP_POWERUP_TIMER_S))
+#define RTC_CNTL_DG_WRAP_POWERUP_TIMER_V  0x7F
+#define RTC_CNTL_DG_WRAP_POWERUP_TIMER_S  25
+/* RTC_CNTL_DG_WRAP_WAIT_TIMER : R/W ;bitpos:[24:16] ;default: 9'h20 ; */
+/*description: */
+#define RTC_CNTL_DG_WRAP_WAIT_TIMER  0x000001FF
+#define RTC_CNTL_DG_WRAP_WAIT_TIMER_M  ((RTC_CNTL_DG_WRAP_WAIT_TIMER_V)<<(RTC_CNTL_DG_WRAP_WAIT_TIMER_S))
+#define RTC_CNTL_DG_WRAP_WAIT_TIMER_V  0x1FF
+#define RTC_CNTL_DG_WRAP_WAIT_TIMER_S  16
+/* RTC_CNTL_POWERUP_TIMER : R/W ;bitpos:[15:9] ;default: 7'h5 ; */
+/*description: */
+#define RTC_CNTL_POWERUP_TIMER  0x0000007F
+#define RTC_CNTL_POWERUP_TIMER_M  ((RTC_CNTL_POWERUP_TIMER_V)<<(RTC_CNTL_POWERUP_TIMER_S))
+#define RTC_CNTL_POWERUP_TIMER_V  0x7F
+#define RTC_CNTL_POWERUP_TIMER_S  9
+/* RTC_CNTL_WAIT_TIMER : R/W ;bitpos:[8:0] ;default: 9'h8 ; */
+/*description: */
+#define RTC_CNTL_WAIT_TIMER  0x000001FF
+#define RTC_CNTL_WAIT_TIMER_M  ((RTC_CNTL_WAIT_TIMER_V)<<(RTC_CNTL_WAIT_TIMER_S))
+#define RTC_CNTL_WAIT_TIMER_V  0x1FF
+#define RTC_CNTL_WAIT_TIMER_S  0
+
+#define RTC_CNTL_TIMER5_REG          (DR_REG_RTCCNTL_BASE + 0x2c)
+/* RTC_CNTL_RTCMEM_POWERUP_TIMER : R/W ;bitpos:[31:25] ;default: 7'h9 ; */
+/*description: */
+#define RTC_CNTL_RTCMEM_POWERUP_TIMER  0x0000007F
+#define RTC_CNTL_RTCMEM_POWERUP_TIMER_M  ((RTC_CNTL_RTCMEM_POWERUP_TIMER_V)<<(RTC_CNTL_RTCMEM_POWERUP_TIMER_S))
+#define RTC_CNTL_RTCMEM_POWERUP_TIMER_V  0x7F
+#define RTC_CNTL_RTCMEM_POWERUP_TIMER_S  25
+/* RTC_CNTL_RTCMEM_WAIT_TIMER : R/W ;bitpos:[24:16] ;default: 9'h14 ; */
+/*description: */
+#define RTC_CNTL_RTCMEM_WAIT_TIMER  0x000001FF
+#define RTC_CNTL_RTCMEM_WAIT_TIMER_M  ((RTC_CNTL_RTCMEM_WAIT_TIMER_V)<<(RTC_CNTL_RTCMEM_WAIT_TIMER_S))
+#define RTC_CNTL_RTCMEM_WAIT_TIMER_V  0x1FF
+#define RTC_CNTL_RTCMEM_WAIT_TIMER_S  16
+/* RTC_CNTL_MIN_SLP_VAL : R/W ;bitpos:[15:8] ;default: 8'h80 ; */
+/*description: minimal sleep cycles in slow_clk_rtc*/
+#define RTC_CNTL_MIN_SLP_VAL  0x000000FF
+#define RTC_CNTL_MIN_SLP_VAL_M  ((RTC_CNTL_MIN_SLP_VAL_V)<<(RTC_CNTL_MIN_SLP_VAL_S))
+#define RTC_CNTL_MIN_SLP_VAL_V  0xFF
+#define RTC_CNTL_MIN_SLP_VAL_S  8
+/* RTC_CNTL_ULP_CP_SUBTIMER_PREDIV : R/W ;bitpos:[7:0] ;default: 8'd1 ; */
+/*description: */
+#define RTC_CNTL_ULP_CP_SUBTIMER_PREDIV  0x000000FF
+#define RTC_CNTL_ULP_CP_SUBTIMER_PREDIV_M  ((RTC_CNTL_ULP_CP_SUBTIMER_PREDIV_V)<<(RTC_CNTL_ULP_CP_SUBTIMER_PREDIV_S))
+#define RTC_CNTL_ULP_CP_SUBTIMER_PREDIV_V  0xFF
+#define RTC_CNTL_ULP_CP_SUBTIMER_PREDIV_S  0
+
+#define RTC_CNTL_ANA_CONF_REG          (DR_REG_RTCCNTL_BASE + 0x30)
+/* RTC_CNTL_PLL_I2C_PU : R/W ;bitpos:[31] ;default: 1'd0 ; */
+/*description: 1: PLL_I2C power up   otherwise power down*/
+#define RTC_CNTL_PLL_I2C_PU  (BIT(31))
+#define RTC_CNTL_PLL_I2C_PU_M  (BIT(31))
+#define RTC_CNTL_PLL_I2C_PU_V  0x1
+#define RTC_CNTL_PLL_I2C_PU_S  31
+/* RTC_CNTL_CKGEN_I2C_PU : R/W ;bitpos:[30] ;default: 1'd0 ; */
+/*description: 1: CKGEN_I2C power up   otherwise power down*/
+#define RTC_CNTL_CKGEN_I2C_PU  (BIT(30))
+#define RTC_CNTL_CKGEN_I2C_PU_M  (BIT(30))
+#define RTC_CNTL_CKGEN_I2C_PU_V  0x1
+#define RTC_CNTL_CKGEN_I2C_PU_S  30
+/* RTC_CNTL_RFRX_PBUS_PU : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: 1: RFRX_PBUS power up   otherwise power down*/
+#define RTC_CNTL_RFRX_PBUS_PU  (BIT(28))
+#define RTC_CNTL_RFRX_PBUS_PU_M  (BIT(28))
+#define RTC_CNTL_RFRX_PBUS_PU_V  0x1
+#define RTC_CNTL_RFRX_PBUS_PU_S  28
+/* RTC_CNTL_TXRF_I2C_PU : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: 1: TXRF_I2C power up   otherwise power down*/
+#define RTC_CNTL_TXRF_I2C_PU  (BIT(27))
+#define RTC_CNTL_TXRF_I2C_PU_M  (BIT(27))
+#define RTC_CNTL_TXRF_I2C_PU_V  0x1
+#define RTC_CNTL_TXRF_I2C_PU_S  27
+/* RTC_CNTL_PVTMON_PU : R/W ;bitpos:[26] ;default: 1'b0 ; */
+/*description: 1: PVTMON power up   otherwise power down*/
+#define RTC_CNTL_PVTMON_PU  (BIT(26))
+#define RTC_CNTL_PVTMON_PU_M  (BIT(26))
+#define RTC_CNTL_PVTMON_PU_V  0x1
+#define RTC_CNTL_PVTMON_PU_S  26
+/* RTC_CNTL_BBPLL_CAL_SLP_START : R/W ;bitpos:[25] ;default: 1'b0 ; */
+/*description: start BBPLL calibration during sleep*/
+#define RTC_CNTL_BBPLL_CAL_SLP_START  (BIT(25))
+#define RTC_CNTL_BBPLL_CAL_SLP_START_M  (BIT(25))
+#define RTC_CNTL_BBPLL_CAL_SLP_START_V  0x1
+#define RTC_CNTL_BBPLL_CAL_SLP_START_S  25
+/* RTC_CNTL_PLLA_FORCE_PU : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: PLLA force power up*/
+#define RTC_CNTL_PLLA_FORCE_PU  (BIT(24))
+#define RTC_CNTL_PLLA_FORCE_PU_M  (BIT(24))
+#define RTC_CNTL_PLLA_FORCE_PU_V  0x1
+#define RTC_CNTL_PLLA_FORCE_PU_S  24
+/* RTC_CNTL_PLLA_FORCE_PD : R/W ;bitpos:[23] ;default: 1'b1 ; */
+/*description: PLLA force power down*/
+#define RTC_CNTL_PLLA_FORCE_PD  (BIT(23))
+#define RTC_CNTL_PLLA_FORCE_PD_M  (BIT(23))
+#define RTC_CNTL_PLLA_FORCE_PD_V  0x1
+#define RTC_CNTL_PLLA_FORCE_PD_S  23
+
+#define RTC_CNTL_RESET_STATE_REG          (DR_REG_RTCCNTL_BASE + 0x34)
+/* RTC_CNTL_PROCPU_STAT_VECTOR_SEL : R/W ;bitpos:[13] ;default: 1'b1 ; */
+/*description: PRO CPU state vector sel*/
+#define RTC_CNTL_PROCPU_STAT_VECTOR_SEL  (BIT(13))
+#define RTC_CNTL_PROCPU_STAT_VECTOR_SEL_M  (BIT(13))
+#define RTC_CNTL_PROCPU_STAT_VECTOR_SEL_V  0x1
+#define RTC_CNTL_PROCPU_STAT_VECTOR_SEL_S  13
+/* RTC_CNTL_APPCPU_STAT_VECTOR_SEL : R/W ;bitpos:[12] ;default: 1'b1 ; */
+/*description: APP CPU state vector sel*/
+#define RTC_CNTL_APPCPU_STAT_VECTOR_SEL  (BIT(12))
+#define RTC_CNTL_APPCPU_STAT_VECTOR_SEL_M  (BIT(12))
+#define RTC_CNTL_APPCPU_STAT_VECTOR_SEL_V  0x1
+#define RTC_CNTL_APPCPU_STAT_VECTOR_SEL_S  12
+/* RTC_CNTL_RESET_CAUSE_APPCPU : RO ;bitpos:[11:6] ;default: 0 ; */
+/*description: reset cause of APP CPU*/
+#define RTC_CNTL_RESET_CAUSE_APPCPU  0x0000003F
+#define RTC_CNTL_RESET_CAUSE_APPCPU_M  ((RTC_CNTL_RESET_CAUSE_APPCPU_V)<<(RTC_CNTL_RESET_CAUSE_APPCPU_S))
+#define RTC_CNTL_RESET_CAUSE_APPCPU_V  0x3F
+#define RTC_CNTL_RESET_CAUSE_APPCPU_S  6
+/* RTC_CNTL_RESET_CAUSE_PROCPU : RO ;bitpos:[5:0] ;default: 0 ; */
+/*description: reset cause of PRO CPU*/
+#define RTC_CNTL_RESET_CAUSE_PROCPU  0x0000003F
+#define RTC_CNTL_RESET_CAUSE_PROCPU_M  ((RTC_CNTL_RESET_CAUSE_PROCPU_V)<<(RTC_CNTL_RESET_CAUSE_PROCPU_S))
+#define RTC_CNTL_RESET_CAUSE_PROCPU_V  0x3F
+#define RTC_CNTL_RESET_CAUSE_PROCPU_S  0
+
+#define RTC_CNTL_WAKEUP_STATE_REG          (DR_REG_RTCCNTL_BASE + 0x38)
+/* RTC_CNTL_GPIO_WAKEUP_FILTER : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: enable filter for gpio wakeup event*/
+#define RTC_CNTL_GPIO_WAKEUP_FILTER  (BIT(22))
+#define RTC_CNTL_GPIO_WAKEUP_FILTER_M  (BIT(22))
+#define RTC_CNTL_GPIO_WAKEUP_FILTER_V  0x1
+#define RTC_CNTL_GPIO_WAKEUP_FILTER_S  22
+/* RTC_CNTL_WAKEUP_ENA : R/W ;bitpos:[21:11] ;default: 11'b1100 ; */
+/*description: wakeup enable bitmap*/
+#define RTC_CNTL_WAKEUP_ENA  0x000007FF
+#define RTC_CNTL_WAKEUP_ENA_M  ((RTC_CNTL_WAKEUP_ENA_V)<<(RTC_CNTL_WAKEUP_ENA_S))
+#define RTC_CNTL_WAKEUP_ENA_V  0x7FF
+#define RTC_CNTL_WAKEUP_ENA_S  11
+/* RTC_CNTL_WAKEUP_CAUSE : RO ;bitpos:[10:0] ;default: 11'h0 ; */
+/*description: wakeup cause*/
+#define RTC_CNTL_WAKEUP_CAUSE  0x000007FF
+#define RTC_CNTL_WAKEUP_CAUSE_M  ((RTC_CNTL_WAKEUP_CAUSE_V)<<(RTC_CNTL_WAKEUP_CAUSE_S))
+#define RTC_CNTL_WAKEUP_CAUSE_V  0x7FF
+#define RTC_CNTL_WAKEUP_CAUSE_S  0
+
+#define RTC_CNTL_INT_ENA_REG          (DR_REG_RTCCNTL_BASE + 0x3c)
+/* RTC_CNTL_MAIN_TIMER_INT_ENA : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: enable RTC main timer interrupt*/
+#define RTC_CNTL_MAIN_TIMER_INT_ENA  (BIT(8))
+#define RTC_CNTL_MAIN_TIMER_INT_ENA_M  (BIT(8))
+#define RTC_CNTL_MAIN_TIMER_INT_ENA_V  0x1
+#define RTC_CNTL_MAIN_TIMER_INT_ENA_S  8
+/* RTC_CNTL_BROWN_OUT_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: enable brown out interrupt*/
+#define RTC_CNTL_BROWN_OUT_INT_ENA  (BIT(7))
+#define RTC_CNTL_BROWN_OUT_INT_ENA_M  (BIT(7))
+#define RTC_CNTL_BROWN_OUT_INT_ENA_V  0x1
+#define RTC_CNTL_BROWN_OUT_INT_ENA_S  7
+/* RTC_CNTL_TOUCH_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: enable touch interrupt*/
+#define RTC_CNTL_TOUCH_INT_ENA  (BIT(6))
+#define RTC_CNTL_TOUCH_INT_ENA_M  (BIT(6))
+#define RTC_CNTL_TOUCH_INT_ENA_V  0x1
+#define RTC_CNTL_TOUCH_INT_ENA_S  6
+/* RTC_CNTL_ULP_CP_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: enable ULP-coprocessor interrupt*/
+#define RTC_CNTL_ULP_CP_INT_ENA  (BIT(5))
+#define RTC_CNTL_ULP_CP_INT_ENA_M  (BIT(5))
+#define RTC_CNTL_ULP_CP_INT_ENA_V  0x1
+#define RTC_CNTL_ULP_CP_INT_ENA_S  5
+/* RTC_CNTL_TIME_VALID_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: enable RTC time valid interrupt*/
+#define RTC_CNTL_TIME_VALID_INT_ENA  (BIT(4))
+#define RTC_CNTL_TIME_VALID_INT_ENA_M  (BIT(4))
+#define RTC_CNTL_TIME_VALID_INT_ENA_V  0x1
+#define RTC_CNTL_TIME_VALID_INT_ENA_S  4
+/* RTC_CNTL_WDT_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: enable RTC WDT interrupt*/
+#define RTC_CNTL_WDT_INT_ENA  (BIT(3))
+#define RTC_CNTL_WDT_INT_ENA_M  (BIT(3))
+#define RTC_CNTL_WDT_INT_ENA_V  0x1
+#define RTC_CNTL_WDT_INT_ENA_S  3
+/* RTC_CNTL_SDIO_IDLE_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: enable SDIO idle interrupt*/
+#define RTC_CNTL_SDIO_IDLE_INT_ENA  (BIT(2))
+#define RTC_CNTL_SDIO_IDLE_INT_ENA_M  (BIT(2))
+#define RTC_CNTL_SDIO_IDLE_INT_ENA_V  0x1
+#define RTC_CNTL_SDIO_IDLE_INT_ENA_S  2
+/* RTC_CNTL_SLP_REJECT_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: enable sleep reject interrupt*/
+#define RTC_CNTL_SLP_REJECT_INT_ENA  (BIT(1))
+#define RTC_CNTL_SLP_REJECT_INT_ENA_M  (BIT(1))
+#define RTC_CNTL_SLP_REJECT_INT_ENA_V  0x1
+#define RTC_CNTL_SLP_REJECT_INT_ENA_S  1
+/* RTC_CNTL_SLP_WAKEUP_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: enable sleep wakeup interrupt*/
+#define RTC_CNTL_SLP_WAKEUP_INT_ENA  (BIT(0))
+#define RTC_CNTL_SLP_WAKEUP_INT_ENA_M  (BIT(0))
+#define RTC_CNTL_SLP_WAKEUP_INT_ENA_V  0x1
+#define RTC_CNTL_SLP_WAKEUP_INT_ENA_S  0
+
+#define RTC_CNTL_INT_RAW_REG          (DR_REG_RTCCNTL_BASE + 0x40)
+/* RTC_CNTL_MAIN_TIMER_INT_RAW : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: RTC main timer interrupt raw*/
+#define RTC_CNTL_MAIN_TIMER_INT_RAW  (BIT(8))
+#define RTC_CNTL_MAIN_TIMER_INT_RAW_M  (BIT(8))
+#define RTC_CNTL_MAIN_TIMER_INT_RAW_V  0x1
+#define RTC_CNTL_MAIN_TIMER_INT_RAW_S  8
+/* RTC_CNTL_BROWN_OUT_INT_RAW : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: brown out interrupt raw*/
+#define RTC_CNTL_BROWN_OUT_INT_RAW  (BIT(7))
+#define RTC_CNTL_BROWN_OUT_INT_RAW_M  (BIT(7))
+#define RTC_CNTL_BROWN_OUT_INT_RAW_V  0x1
+#define RTC_CNTL_BROWN_OUT_INT_RAW_S  7
+/* RTC_CNTL_TOUCH_INT_RAW : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: touch interrupt raw*/
+#define RTC_CNTL_TOUCH_INT_RAW  (BIT(6))
+#define RTC_CNTL_TOUCH_INT_RAW_M  (BIT(6))
+#define RTC_CNTL_TOUCH_INT_RAW_V  0x1
+#define RTC_CNTL_TOUCH_INT_RAW_S  6
+/* RTC_CNTL_ULP_CP_INT_RAW : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: ULP-coprocessor interrupt raw*/
+#define RTC_CNTL_ULP_CP_INT_RAW  (BIT(5))
+#define RTC_CNTL_ULP_CP_INT_RAW_M  (BIT(5))
+#define RTC_CNTL_ULP_CP_INT_RAW_V  0x1
+#define RTC_CNTL_ULP_CP_INT_RAW_S  5
+/* RTC_CNTL_TIME_VALID_INT_RAW : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: RTC time valid interrupt raw*/
+#define RTC_CNTL_TIME_VALID_INT_RAW  (BIT(4))
+#define RTC_CNTL_TIME_VALID_INT_RAW_M  (BIT(4))
+#define RTC_CNTL_TIME_VALID_INT_RAW_V  0x1
+#define RTC_CNTL_TIME_VALID_INT_RAW_S  4
+/* RTC_CNTL_WDT_INT_RAW : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: RTC WDT interrupt raw*/
+#define RTC_CNTL_WDT_INT_RAW  (BIT(3))
+#define RTC_CNTL_WDT_INT_RAW_M  (BIT(3))
+#define RTC_CNTL_WDT_INT_RAW_V  0x1
+#define RTC_CNTL_WDT_INT_RAW_S  3
+/* RTC_CNTL_SDIO_IDLE_INT_RAW : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: SDIO idle interrupt raw*/
+#define RTC_CNTL_SDIO_IDLE_INT_RAW  (BIT(2))
+#define RTC_CNTL_SDIO_IDLE_INT_RAW_M  (BIT(2))
+#define RTC_CNTL_SDIO_IDLE_INT_RAW_V  0x1
+#define RTC_CNTL_SDIO_IDLE_INT_RAW_S  2
+/* RTC_CNTL_SLP_REJECT_INT_RAW : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: sleep reject interrupt raw*/
+#define RTC_CNTL_SLP_REJECT_INT_RAW  (BIT(1))
+#define RTC_CNTL_SLP_REJECT_INT_RAW_M  (BIT(1))
+#define RTC_CNTL_SLP_REJECT_INT_RAW_V  0x1
+#define RTC_CNTL_SLP_REJECT_INT_RAW_S  1
+/* RTC_CNTL_SLP_WAKEUP_INT_RAW : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: sleep wakeup interrupt raw*/
+#define RTC_CNTL_SLP_WAKEUP_INT_RAW  (BIT(0))
+#define RTC_CNTL_SLP_WAKEUP_INT_RAW_M  (BIT(0))
+#define RTC_CNTL_SLP_WAKEUP_INT_RAW_V  0x1
+#define RTC_CNTL_SLP_WAKEUP_INT_RAW_S  0
+
+#define RTC_CNTL_INT_ST_REG          (DR_REG_RTCCNTL_BASE + 0x44)
+/* RTC_CNTL_MAIN_TIMER_INT_ST : RO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: RTC main timer interrupt state*/
+#define RTC_CNTL_MAIN_TIMER_INT_ST  (BIT(8))
+#define RTC_CNTL_MAIN_TIMER_INT_ST_M  (BIT(8))
+#define RTC_CNTL_MAIN_TIMER_INT_ST_V  0x1
+#define RTC_CNTL_MAIN_TIMER_INT_ST_S  8
+/* RTC_CNTL_BROWN_OUT_INT_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: brown out interrupt state*/
+#define RTC_CNTL_BROWN_OUT_INT_ST  (BIT(7))
+#define RTC_CNTL_BROWN_OUT_INT_ST_M  (BIT(7))
+#define RTC_CNTL_BROWN_OUT_INT_ST_V  0x1
+#define RTC_CNTL_BROWN_OUT_INT_ST_S  7
+/* RTC_CNTL_TOUCH_INT_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: touch interrupt state*/
+#define RTC_CNTL_TOUCH_INT_ST  (BIT(6))
+#define RTC_CNTL_TOUCH_INT_ST_M  (BIT(6))
+#define RTC_CNTL_TOUCH_INT_ST_V  0x1
+#define RTC_CNTL_TOUCH_INT_ST_S  6
+/* RTC_CNTL_SAR_INT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: ULP-coprocessor interrupt state*/
+#define RTC_CNTL_SAR_INT_ST  (BIT(5))
+#define RTC_CNTL_SAR_INT_ST_M  (BIT(5))
+#define RTC_CNTL_SAR_INT_ST_V  0x1
+#define RTC_CNTL_SAR_INT_ST_S  5
+/* RTC_CNTL_TIME_VALID_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: RTC time valid interrupt state*/
+#define RTC_CNTL_TIME_VALID_INT_ST  (BIT(4))
+#define RTC_CNTL_TIME_VALID_INT_ST_M  (BIT(4))
+#define RTC_CNTL_TIME_VALID_INT_ST_V  0x1
+#define RTC_CNTL_TIME_VALID_INT_ST_S  4
+/* RTC_CNTL_WDT_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: RTC WDT interrupt state*/
+#define RTC_CNTL_WDT_INT_ST  (BIT(3))
+#define RTC_CNTL_WDT_INT_ST_M  (BIT(3))
+#define RTC_CNTL_WDT_INT_ST_V  0x1
+#define RTC_CNTL_WDT_INT_ST_S  3
+/* RTC_CNTL_SDIO_IDLE_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: SDIO idle interrupt state*/
+#define RTC_CNTL_SDIO_IDLE_INT_ST  (BIT(2))
+#define RTC_CNTL_SDIO_IDLE_INT_ST_M  (BIT(2))
+#define RTC_CNTL_SDIO_IDLE_INT_ST_V  0x1
+#define RTC_CNTL_SDIO_IDLE_INT_ST_S  2
+/* RTC_CNTL_SLP_REJECT_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: sleep reject interrupt state*/
+#define RTC_CNTL_SLP_REJECT_INT_ST  (BIT(1))
+#define RTC_CNTL_SLP_REJECT_INT_ST_M  (BIT(1))
+#define RTC_CNTL_SLP_REJECT_INT_ST_V  0x1
+#define RTC_CNTL_SLP_REJECT_INT_ST_S  1
+/* RTC_CNTL_SLP_WAKEUP_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: sleep wakeup interrupt state*/
+#define RTC_CNTL_SLP_WAKEUP_INT_ST  (BIT(0))
+#define RTC_CNTL_SLP_WAKEUP_INT_ST_M  (BIT(0))
+#define RTC_CNTL_SLP_WAKEUP_INT_ST_V  0x1
+#define RTC_CNTL_SLP_WAKEUP_INT_ST_S  0
+
+#define RTC_CNTL_INT_CLR_REG          (DR_REG_RTCCNTL_BASE + 0x48)
+/* RTC_CNTL_MAIN_TIMER_INT_CLR : WO ;bitpos:[8] ;default: 1'b0 ; */
+/*description: Clear RTC main timer interrupt state*/
+#define RTC_CNTL_MAIN_TIMER_INT_CLR  (BIT(8))
+#define RTC_CNTL_MAIN_TIMER_INT_CLR_M  (BIT(8))
+#define RTC_CNTL_MAIN_TIMER_INT_CLR_V  0x1
+#define RTC_CNTL_MAIN_TIMER_INT_CLR_S  8
+/* RTC_CNTL_BROWN_OUT_INT_CLR : WO ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Clear brown out interrupt state*/
+#define RTC_CNTL_BROWN_OUT_INT_CLR  (BIT(7))
+#define RTC_CNTL_BROWN_OUT_INT_CLR_M  (BIT(7))
+#define RTC_CNTL_BROWN_OUT_INT_CLR_V  0x1
+#define RTC_CNTL_BROWN_OUT_INT_CLR_S  7
+/* RTC_CNTL_TOUCH_INT_CLR : WO ;bitpos:[6] ;default: 1'b0 ; */
+/*description: Clear touch interrupt state*/
+#define RTC_CNTL_TOUCH_INT_CLR  (BIT(6))
+#define RTC_CNTL_TOUCH_INT_CLR_M  (BIT(6))
+#define RTC_CNTL_TOUCH_INT_CLR_V  0x1
+#define RTC_CNTL_TOUCH_INT_CLR_S  6
+/* RTC_CNTL_SAR_INT_CLR : WO ;bitpos:[5] ;default: 1'b0 ; */
+/*description: Clear ULP-coprocessor interrupt state*/
+#define RTC_CNTL_SAR_INT_CLR  (BIT(5))
+#define RTC_CNTL_SAR_INT_CLR_M  (BIT(5))
+#define RTC_CNTL_SAR_INT_CLR_V  0x1
+#define RTC_CNTL_SAR_INT_CLR_S  5
+/* RTC_CNTL_TIME_VALID_INT_CLR : WO ;bitpos:[4] ;default: 1'b0 ; */
+/*description: Clear RTC time valid interrupt state*/
+#define RTC_CNTL_TIME_VALID_INT_CLR  (BIT(4))
+#define RTC_CNTL_TIME_VALID_INT_CLR_M  (BIT(4))
+#define RTC_CNTL_TIME_VALID_INT_CLR_V  0x1
+#define RTC_CNTL_TIME_VALID_INT_CLR_S  4
+/* RTC_CNTL_WDT_INT_CLR : WO ;bitpos:[3] ;default: 1'b0 ; */
+/*description: Clear RTC WDT interrupt state*/
+#define RTC_CNTL_WDT_INT_CLR  (BIT(3))
+#define RTC_CNTL_WDT_INT_CLR_M  (BIT(3))
+#define RTC_CNTL_WDT_INT_CLR_V  0x1
+#define RTC_CNTL_WDT_INT_CLR_S  3
+/* RTC_CNTL_SDIO_IDLE_INT_CLR : WO ;bitpos:[2] ;default: 1'b0 ; */
+/*description: Clear SDIO idle interrupt state*/
+#define RTC_CNTL_SDIO_IDLE_INT_CLR  (BIT(2))
+#define RTC_CNTL_SDIO_IDLE_INT_CLR_M  (BIT(2))
+#define RTC_CNTL_SDIO_IDLE_INT_CLR_V  0x1
+#define RTC_CNTL_SDIO_IDLE_INT_CLR_S  2
+/* RTC_CNTL_SLP_REJECT_INT_CLR : WO ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Clear sleep reject interrupt state*/
+#define RTC_CNTL_SLP_REJECT_INT_CLR  (BIT(1))
+#define RTC_CNTL_SLP_REJECT_INT_CLR_M  (BIT(1))
+#define RTC_CNTL_SLP_REJECT_INT_CLR_V  0x1
+#define RTC_CNTL_SLP_REJECT_INT_CLR_S  1
+/* RTC_CNTL_SLP_WAKEUP_INT_CLR : WO ;bitpos:[0] ;default: 1'b0 ; */
+/*description: Clear sleep wakeup interrupt state*/
+#define RTC_CNTL_SLP_WAKEUP_INT_CLR  (BIT(0))
+#define RTC_CNTL_SLP_WAKEUP_INT_CLR_M  (BIT(0))
+#define RTC_CNTL_SLP_WAKEUP_INT_CLR_V  0x1
+#define RTC_CNTL_SLP_WAKEUP_INT_CLR_S  0
+
+#define RTC_CNTL_STORE0_REG          (DR_REG_RTCCNTL_BASE + 0x4c)
+/* RTC_CNTL_SCRATCH0 : R/W ;bitpos:[31:0] ;default: 0 ; */
+/*description: 32-bit general purpose retention register*/
+#define RTC_CNTL_SCRATCH0  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH0_M  ((RTC_CNTL_SCRATCH0_V)<<(RTC_CNTL_SCRATCH0_S))
+#define RTC_CNTL_SCRATCH0_V  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH0_S  0
+
+#define RTC_CNTL_STORE1_REG          (DR_REG_RTCCNTL_BASE + 0x50)
+/* RTC_CNTL_SCRATCH1 : R/W ;bitpos:[31:0] ;default: 0 ; */
+/*description: 32-bit general purpose retention register*/
+#define RTC_CNTL_SCRATCH1  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH1_M  ((RTC_CNTL_SCRATCH1_V)<<(RTC_CNTL_SCRATCH1_S))
+#define RTC_CNTL_SCRATCH1_V  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH1_S  0
+
+#define RTC_CNTL_STORE2_REG          (DR_REG_RTCCNTL_BASE + 0x54)
+/* RTC_CNTL_SCRATCH2 : R/W ;bitpos:[31:0] ;default: 0 ; */
+/*description: 32-bit general purpose retention register*/
+#define RTC_CNTL_SCRATCH2  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH2_M  ((RTC_CNTL_SCRATCH2_V)<<(RTC_CNTL_SCRATCH2_S))
+#define RTC_CNTL_SCRATCH2_V  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH2_S  0
+
+#define RTC_CNTL_STORE3_REG          (DR_REG_RTCCNTL_BASE + 0x58)
+/* RTC_CNTL_SCRATCH3 : R/W ;bitpos:[31:0] ;default: 0 ; */
+/*description: 32-bit general purpose retention register*/
+#define RTC_CNTL_SCRATCH3  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH3_M  ((RTC_CNTL_SCRATCH3_V)<<(RTC_CNTL_SCRATCH3_S))
+#define RTC_CNTL_SCRATCH3_V  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH3_S  0
+
+#define RTC_CNTL_EXT_XTL_CONF_REG          (DR_REG_RTCCNTL_BASE + 0x5c)
+/* RTC_CNTL_XTL_EXT_CTR_EN : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: enable control XTAL by external pads*/
+#define RTC_CNTL_XTL_EXT_CTR_EN  (BIT(31))
+#define RTC_CNTL_XTL_EXT_CTR_EN_M  (BIT(31))
+#define RTC_CNTL_XTL_EXT_CTR_EN_V  0x1
+#define RTC_CNTL_XTL_EXT_CTR_EN_S  31
+/* RTC_CNTL_XTL_EXT_CTR_LV : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: 0: power down XTAL at high level  1: power down XTAL at low level*/
+#define RTC_CNTL_XTL_EXT_CTR_LV  (BIT(30))
+#define RTC_CNTL_XTL_EXT_CTR_LV_M  (BIT(30))
+#define RTC_CNTL_XTL_EXT_CTR_LV_V  0x1
+#define RTC_CNTL_XTL_EXT_CTR_LV_S  30
+
+#define RTC_CNTL_EXT_WAKEUP_CONF_REG          (DR_REG_RTCCNTL_BASE + 0x60)
+/* RTC_CNTL_EXT_WAKEUP1_LV : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/*description: 0: external wakeup at low level  1: external wakeup at high level*/
+#define RTC_CNTL_EXT_WAKEUP1_LV  (BIT(31))
+#define RTC_CNTL_EXT_WAKEUP1_LV_M  (BIT(31))
+#define RTC_CNTL_EXT_WAKEUP1_LV_V  0x1
+#define RTC_CNTL_EXT_WAKEUP1_LV_S  31
+/* RTC_CNTL_EXT_WAKEUP0_LV : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: 0: external wakeup at low level  1: external wakeup at high level*/
+#define RTC_CNTL_EXT_WAKEUP0_LV  (BIT(30))
+#define RTC_CNTL_EXT_WAKEUP0_LV_M  (BIT(30))
+#define RTC_CNTL_EXT_WAKEUP0_LV_V  0x1
+#define RTC_CNTL_EXT_WAKEUP0_LV_S  30
+
+#define RTC_CNTL_SLP_REJECT_CONF_REG          (DR_REG_RTCCNTL_BASE + 0x64)
+/* RTC_CNTL_REJECT_CAUSE : RO ;bitpos:[31:28] ;default: 4'b0 ; */
+/*description: sleep reject cause*/
+#define RTC_CNTL_REJECT_CAUSE  0x0000000F
+#define RTC_CNTL_REJECT_CAUSE_M  ((RTC_CNTL_REJECT_CAUSE_V)<<(RTC_CNTL_REJECT_CAUSE_S))
+#define RTC_CNTL_REJECT_CAUSE_V  0xF
+#define RTC_CNTL_REJECT_CAUSE_S  28
+/* RTC_CNTL_DEEP_SLP_REJECT_EN : R/W ;bitpos:[27] ;default: 1'b0 ; */
+/*description: enable reject for deep sleep*/
+#define RTC_CNTL_DEEP_SLP_REJECT_EN  (BIT(27))
+#define RTC_CNTL_DEEP_SLP_REJECT_EN_M  (BIT(27))
+#define RTC_CNTL_DEEP_SLP_REJECT_EN_V  0x1
+#define RTC_CNTL_DEEP_SLP_REJECT_EN_S  27
+/* RTC_CNTL_LIGHT_SLP_REJECT_EN : R/W ;bitpos:[26] ;default: 1'b0 ; */
+/*description: enable reject for light sleep*/
+#define RTC_CNTL_LIGHT_SLP_REJECT_EN  (BIT(26))
+#define RTC_CNTL_LIGHT_SLP_REJECT_EN_M  (BIT(26))
+#define RTC_CNTL_LIGHT_SLP_REJECT_EN_V  0x1
+#define RTC_CNTL_LIGHT_SLP_REJECT_EN_S  26
+/* RTC_CNTL_SDIO_REJECT_EN : R/W ;bitpos:[25] ;default: 1'b0 ; */
+/*description: enable SDIO reject*/
+#define RTC_CNTL_SDIO_REJECT_EN  (BIT(25))
+#define RTC_CNTL_SDIO_REJECT_EN_M  (BIT(25))
+#define RTC_CNTL_SDIO_REJECT_EN_V  0x1
+#define RTC_CNTL_SDIO_REJECT_EN_S  25
+/* RTC_CNTL_GPIO_REJECT_EN : R/W ;bitpos:[24] ;default: 1'b0 ; */
+/*description: enable GPIO reject*/
+#define RTC_CNTL_GPIO_REJECT_EN  (BIT(24))
+#define RTC_CNTL_GPIO_REJECT_EN_M  (BIT(24))
+#define RTC_CNTL_GPIO_REJECT_EN_V  0x1
+#define RTC_CNTL_GPIO_REJECT_EN_S  24
+
+#define RTC_CNTL_CPU_PERIOD_CONF_REG          (DR_REG_RTCCNTL_BASE + 0x68)
+/* RTC_CNTL_CPUPERIOD_SEL : R/W ;bitpos:[31:30] ;default: 2'b00 ; */
+/*description: CPU period sel*/
+#define RTC_CNTL_CPUPERIOD_SEL  0x00000003
+#define RTC_CNTL_CPUPERIOD_SEL_M  ((RTC_CNTL_CPUPERIOD_SEL_V)<<(RTC_CNTL_CPUPERIOD_SEL_S))
+#define RTC_CNTL_CPUPERIOD_SEL_V  0x3
+#define RTC_CNTL_CPUPERIOD_SEL_S  30
+/* RTC_CNTL_CPUSEL_CONF : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description: CPU sel option*/
+#define RTC_CNTL_CPUSEL_CONF  (BIT(29))
+#define RTC_CNTL_CPUSEL_CONF_M  (BIT(29))
+#define RTC_CNTL_CPUSEL_CONF_V  0x1
+#define RTC_CNTL_CPUSEL_CONF_S  29
+
+#define RTC_CNTL_SDIO_ACT_CONF_REG          (DR_REG_RTCCNTL_BASE + 0x6c)
+/* RTC_CNTL_SDIO_ACT_DNUM : R/W ;bitpos:[31:22] ;default: 10'b0 ; */
+/*description: */
+#define RTC_CNTL_SDIO_ACT_DNUM  0x000003FF
+#define RTC_CNTL_SDIO_ACT_DNUM_M  ((RTC_CNTL_SDIO_ACT_DNUM_V)<<(RTC_CNTL_SDIO_ACT_DNUM_S))
+#define RTC_CNTL_SDIO_ACT_DNUM_V  0x3FF
+#define RTC_CNTL_SDIO_ACT_DNUM_S  22
+
+#define RTC_CNTL_CLK_CONF_REG          (DR_REG_RTCCNTL_BASE + 0x70)
+/* RTC_CNTL_ANA_CLK_RTC_SEL : R/W ;bitpos:[31:30] ;default: 2'd0 ; */
+/*description: slow_clk_rtc sel. 0: SLOW_CK  1: CK_XTAL_32K  2: CK8M_D256_OUT*/
+#define RTC_CNTL_ANA_CLK_RTC_SEL  0x00000003
+#define RTC_CNTL_ANA_CLK_RTC_SEL_M  ((RTC_CNTL_ANA_CLK_RTC_SEL_V)<<(RTC_CNTL_ANA_CLK_RTC_SEL_S))
+#define RTC_CNTL_ANA_CLK_RTC_SEL_V  0x3
+#define RTC_CNTL_ANA_CLK_RTC_SEL_S  30
+/* RTC_CNTL_FAST_CLK_RTC_SEL : R/W ;bitpos:[29] ;default: 1'b0 ; */
+/*description: fast_clk_rtc sel. 0: XTAL div 4  1: CK8M*/
+#define RTC_CNTL_FAST_CLK_RTC_SEL  (BIT(29))
+#define RTC_CNTL_FAST_CLK_RTC_SEL_M  (BIT(29))
+#define RTC_CNTL_FAST_CLK_RTC_SEL_V  0x1
+#define RTC_CNTL_FAST_CLK_RTC_SEL_S  29
+/* RTC_CNTL_SOC_CLK_SEL : R/W ;bitpos:[28:27] ;default: 2'd0 ; */
+/*description: SOC clock sel. 0: XTAL  1: PLL  2: CK8M  3: APLL*/
+#define RTC_CNTL_SOC_CLK_SEL  0x00000003
+#define RTC_CNTL_SOC_CLK_SEL_M  ((RTC_CNTL_SOC_CLK_SEL_V)<<(RTC_CNTL_SOC_CLK_SEL_S))
+#define RTC_CNTL_SOC_CLK_SEL_V  0x3
+#define RTC_CNTL_SOC_CLK_SEL_S  27
+/* RTC_CNTL_CK8M_FORCE_PU : R/W ;bitpos:[26] ;default: 1'd0 ; */
+/*description: CK8M force power up*/
+#define RTC_CNTL_CK8M_FORCE_PU  (BIT(26))
+#define RTC_CNTL_CK8M_FORCE_PU_M  (BIT(26))
+#define RTC_CNTL_CK8M_FORCE_PU_V  0x1
+#define RTC_CNTL_CK8M_FORCE_PU_S  26
+/* RTC_CNTL_CK8M_FORCE_PD : R/W ;bitpos:[25] ;default: 1'd0 ; */
+/*description: CK8M force power down*/
+#define RTC_CNTL_CK8M_FORCE_PD  (BIT(25))
+#define RTC_CNTL_CK8M_FORCE_PD_M  (BIT(25))
+#define RTC_CNTL_CK8M_FORCE_PD_V  0x1
+#define RTC_CNTL_CK8M_FORCE_PD_S  25
+/* RTC_CNTL_CK8M_DFREQ : R/W ;bitpos:[24:17] ;default: 8'd0 ; */
+/*description: CK8M_DFREQ*/
+#define RTC_CNTL_CK8M_DFREQ  0x000000FF
+#define RTC_CNTL_CK8M_DFREQ_M  ((RTC_CNTL_CK8M_DFREQ_V)<<(RTC_CNTL_CK8M_DFREQ_S))
+#define RTC_CNTL_CK8M_DFREQ_V  0xFF
+#define RTC_CNTL_CK8M_DFREQ_S  17
+/* RTC_CNTL_CK8M_FORCE_NOGATING : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: CK8M force no gating during sleep*/
+#define RTC_CNTL_CK8M_FORCE_NOGATING  (BIT(16))
+#define RTC_CNTL_CK8M_FORCE_NOGATING_M  (BIT(16))
+#define RTC_CNTL_CK8M_FORCE_NOGATING_V  0x1
+#define RTC_CNTL_CK8M_FORCE_NOGATING_S  16
+/* RTC_CNTL_XTAL_FORCE_NOGATING : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: XTAL force no gating during sleep*/
+#define RTC_CNTL_XTAL_FORCE_NOGATING  (BIT(15))
+#define RTC_CNTL_XTAL_FORCE_NOGATING_M  (BIT(15))
+#define RTC_CNTL_XTAL_FORCE_NOGATING_V  0x1
+#define RTC_CNTL_XTAL_FORCE_NOGATING_S  15
+/* RTC_CNTL_CK8M_DIV_SEL : R/W ;bitpos:[14:12] ;default: 3'd2 ; */
+/*description: divider = reg_ck8m_div_sel + 1*/
+#define RTC_CNTL_CK8M_DIV_SEL  0x00000007
+#define RTC_CNTL_CK8M_DIV_SEL_M  ((RTC_CNTL_CK8M_DIV_SEL_V)<<(RTC_CNTL_CK8M_DIV_SEL_S))
+#define RTC_CNTL_CK8M_DIV_SEL_V  0x7
+#define RTC_CNTL_CK8M_DIV_SEL_S  12
+/* RTC_CNTL_CK8M_DFREQ_FORCE : R/W ;bitpos:[11] ;default: 1'd0 ; */
+/*description: */
+#define RTC_CNTL_CK8M_DFREQ_FORCE  (BIT(11))
+#define RTC_CNTL_CK8M_DFREQ_FORCE_M  (BIT(11))
+#define RTC_CNTL_CK8M_DFREQ_FORCE_V  0x1
+#define RTC_CNTL_CK8M_DFREQ_FORCE_S  11
+/* RTC_CNTL_DIG_CLK8M_EN : R/W ;bitpos:[10] ;default: 1'd0 ; */
+/*description: enable CK8M for digital core (no relationship with RTC core)*/
+#define RTC_CNTL_DIG_CLK8M_EN  (BIT(10))
+#define RTC_CNTL_DIG_CLK8M_EN_M  (BIT(10))
+#define RTC_CNTL_DIG_CLK8M_EN_V  0x1
+#define RTC_CNTL_DIG_CLK8M_EN_S  10
+/* RTC_CNTL_DIG_CLK8M_D256_EN : R/W ;bitpos:[9] ;default: 1'd1 ; */
+/*description: enable CK8M_D256_OUT for digital core (no relationship with RTC core)*/
+#define RTC_CNTL_DIG_CLK8M_D256_EN  (BIT(9))
+#define RTC_CNTL_DIG_CLK8M_D256_EN_M  (BIT(9))
+#define RTC_CNTL_DIG_CLK8M_D256_EN_V  0x1
+#define RTC_CNTL_DIG_CLK8M_D256_EN_S  9
+/* RTC_CNTL_DIG_XTAL32K_EN : R/W ;bitpos:[8] ;default: 1'd0 ; */
+/*description: enable CK_XTAL_32K for digital core (no relationship with RTC core)*/
+#define RTC_CNTL_DIG_XTAL32K_EN  (BIT(8))
+#define RTC_CNTL_DIG_XTAL32K_EN_M  (BIT(8))
+#define RTC_CNTL_DIG_XTAL32K_EN_V  0x1
+#define RTC_CNTL_DIG_XTAL32K_EN_S  8
+/* RTC_CNTL_ENB_CK8M_DIV : R/W ;bitpos:[7] ;default: 1'd0 ; */
+/*description: 1: CK8M_D256_OUT is actually CK8M  0: CK8M_D256_OUT is CK8M divided by 256*/
+#define RTC_CNTL_ENB_CK8M_DIV  (BIT(7))
+#define RTC_CNTL_ENB_CK8M_DIV_M  (BIT(7))
+#define RTC_CNTL_ENB_CK8M_DIV_V  0x1
+#define RTC_CNTL_ENB_CK8M_DIV_S  7
+/* RTC_CNTL_ENB_CK8M : R/W ;bitpos:[6] ;default: 1'd0 ; */
+/*description: disable CK8M and CK8M_D256_OUT*/
+#define RTC_CNTL_ENB_CK8M  (BIT(6))
+#define RTC_CNTL_ENB_CK8M_M  (BIT(6))
+#define RTC_CNTL_ENB_CK8M_V  0x1
+#define RTC_CNTL_ENB_CK8M_S  6
+/* RTC_CNTL_CK8M_DIV : R/W ;bitpos:[5:4] ;default: 2'b01 ; */
+/*description: CK8M_D256_OUT divider. 00: div128  01: div256  10: div512  11: div1024.*/
+#define RTC_CNTL_CK8M_DIV  0x00000003
+#define RTC_CNTL_CK8M_DIV_M  ((RTC_CNTL_CK8M_DIV_V)<<(RTC_CNTL_CK8M_DIV_S))
+#define RTC_CNTL_CK8M_DIV_V  0x3
+#define RTC_CNTL_CK8M_DIV_S  4
+
+#define RTC_CNTL_SDIO_CONF_REG          (DR_REG_RTCCNTL_BASE + 0x74)
+/* RTC_CNTL_XPD_SDIO_REG : R/W ;bitpos:[31] ;default: 1'd0 ; */
+/*description: SW option for XPD_SDIO_REG. Only active when reg_sdio_force = 1*/
+#define RTC_CNTL_XPD_SDIO_REG  (BIT(31))
+#define RTC_CNTL_XPD_SDIO_REG_M  (BIT(31))
+#define RTC_CNTL_XPD_SDIO_REG_V  0x1
+#define RTC_CNTL_XPD_SDIO_REG_S  31
+/* RTC_CNTL_DREFH_SDIO : R/W ;bitpos:[30:29] ;default: 2'b00 ; */
+/*description: SW option for DREFH_SDIO. Only active when reg_sdio_force = 1*/
+#define RTC_CNTL_DREFH_SDIO  0x00000003
+#define RTC_CNTL_DREFH_SDIO_M  ((RTC_CNTL_DREFH_SDIO_V)<<(RTC_CNTL_DREFH_SDIO_S))
+#define RTC_CNTL_DREFH_SDIO_V  0x3
+#define RTC_CNTL_DREFH_SDIO_S  29
+/* RTC_CNTL_DREFM_SDIO : R/W ;bitpos:[28:27] ;default: 2'b00 ; */
+/*description: SW option for DREFM_SDIO. Only active when reg_sdio_force = 1*/
+#define RTC_CNTL_DREFM_SDIO  0x00000003
+#define RTC_CNTL_DREFM_SDIO_M  ((RTC_CNTL_DREFM_SDIO_V)<<(RTC_CNTL_DREFM_SDIO_S))
+#define RTC_CNTL_DREFM_SDIO_V  0x3
+#define RTC_CNTL_DREFM_SDIO_S  27
+/* RTC_CNTL_DREFL_SDIO : R/W ;bitpos:[26:25] ;default: 2'b01 ; */
+/*description: SW option for DREFL_SDIO. Only active when reg_sdio_force = 1*/
+#define RTC_CNTL_DREFL_SDIO  0x00000003
+#define RTC_CNTL_DREFL_SDIO_M  ((RTC_CNTL_DREFL_SDIO_V)<<(RTC_CNTL_DREFL_SDIO_S))
+#define RTC_CNTL_DREFL_SDIO_V  0x3
+#define RTC_CNTL_DREFL_SDIO_S  25
+/* RTC_CNTL_REG1P8_READY : RO ;bitpos:[24] ;default: 1'd0 ; */
+/*description: read only register for REG1P8_READY*/
+#define RTC_CNTL_REG1P8_READY  (BIT(24))
+#define RTC_CNTL_REG1P8_READY_M  (BIT(24))
+#define RTC_CNTL_REG1P8_READY_V  0x1
+#define RTC_CNTL_REG1P8_READY_S  24
+/* RTC_CNTL_SDIO_TIEH : R/W ;bitpos:[23] ;default: 1'd1 ; */
+/*description: SW option for SDIO_TIEH. Only active when reg_sdio_force = 1*/
+#define RTC_CNTL_SDIO_TIEH  (BIT(23))
+#define RTC_CNTL_SDIO_TIEH_M  (BIT(23))
+#define RTC_CNTL_SDIO_TIEH_V  0x1
+#define RTC_CNTL_SDIO_TIEH_S  23
+/* RTC_CNTL_SDIO_FORCE : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: 1: use SW option to control SDIO_REG  0: use state machine*/
+#define RTC_CNTL_SDIO_FORCE  (BIT(22))
+#define RTC_CNTL_SDIO_FORCE_M  (BIT(22))
+#define RTC_CNTL_SDIO_FORCE_V  0x1
+#define RTC_CNTL_SDIO_FORCE_S  22
+/* RTC_CNTL_SDIO_PD_EN : R/W ;bitpos:[21] ;default: 1'd1 ; */
+/*description: power down SDIO_REG in sleep. Only active when reg_sdio_force = 0*/
+#define RTC_CNTL_SDIO_PD_EN  (BIT(21))
+#define RTC_CNTL_SDIO_PD_EN_M  (BIT(21))
+#define RTC_CNTL_SDIO_PD_EN_V  0x1
+#define RTC_CNTL_SDIO_PD_EN_S  21
+
+#define RTC_CNTL_BIAS_CONF_REG          (DR_REG_RTCCNTL_BASE + 0x78)
+/* RTC_CNTL_RST_BIAS_I2C : R/W ;bitpos:[31] ;default: 1'd0 ; */
+/*description: RST_BIAS_I2C*/
+#define RTC_CNTL_RST_BIAS_I2C  (BIT(31))
+#define RTC_CNTL_RST_BIAS_I2C_M  (BIT(31))
+#define RTC_CNTL_RST_BIAS_I2C_V  0x1
+#define RTC_CNTL_RST_BIAS_I2C_S  31
+/* RTC_CNTL_DEC_HEARTBEAT_WIDTH : R/W ;bitpos:[30] ;default: 1'd0 ; */
+/*description: DEC_HEARTBEAT_WIDTH*/
+#define RTC_CNTL_DEC_HEARTBEAT_WIDTH  (BIT(30))
+#define RTC_CNTL_DEC_HEARTBEAT_WIDTH_M  (BIT(30))
+#define RTC_CNTL_DEC_HEARTBEAT_WIDTH_V  0x1
+#define RTC_CNTL_DEC_HEARTBEAT_WIDTH_S  30
+/* RTC_CNTL_INC_HEARTBEAT_PERIOD : R/W ;bitpos:[29] ;default: 1'd0 ; */
+/*description: INC_HEARTBEAT_PERIOD*/
+#define RTC_CNTL_INC_HEARTBEAT_PERIOD  (BIT(29))
+#define RTC_CNTL_INC_HEARTBEAT_PERIOD_M  (BIT(29))
+#define RTC_CNTL_INC_HEARTBEAT_PERIOD_V  0x1
+#define RTC_CNTL_INC_HEARTBEAT_PERIOD_S  29
+/* RTC_CNTL_DEC_HEARTBEAT_PERIOD : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: DEC_HEARTBEAT_PERIOD*/
+#define RTC_CNTL_DEC_HEARTBEAT_PERIOD  (BIT(28))
+#define RTC_CNTL_DEC_HEARTBEAT_PERIOD_M  (BIT(28))
+#define RTC_CNTL_DEC_HEARTBEAT_PERIOD_V  0x1
+#define RTC_CNTL_DEC_HEARTBEAT_PERIOD_S  28
+/* RTC_CNTL_INC_HEARTBEAT_REFRESH : R/W ;bitpos:[27] ;default: 1'd0 ; */
+/*description: INC_HEARTBEAT_REFRESH*/
+#define RTC_CNTL_INC_HEARTBEAT_REFRESH  (BIT(27))
+#define RTC_CNTL_INC_HEARTBEAT_REFRESH_M  (BIT(27))
+#define RTC_CNTL_INC_HEARTBEAT_REFRESH_V  0x1
+#define RTC_CNTL_INC_HEARTBEAT_REFRESH_S  27
+/* RTC_CNTL_ENB_SCK_XTAL : R/W ;bitpos:[26] ;default: 1'd0 ; */
+/*description: ENB_SCK_XTAL*/
+#define RTC_CNTL_ENB_SCK_XTAL  (BIT(26))
+#define RTC_CNTL_ENB_SCK_XTAL_M  (BIT(26))
+#define RTC_CNTL_ENB_SCK_XTAL_V  0x1
+#define RTC_CNTL_ENB_SCK_XTAL_S  26
+/* RTC_CNTL_DBG_ATTEN : R/W ;bitpos:[25:24] ;default: 2'b00 ; */
+/*description: DBG_ATTEN*/
+#define RTC_CNTL_DBG_ATTEN  0x00000003
+#define RTC_CNTL_DBG_ATTEN_M  ((RTC_CNTL_DBG_ATTEN_V)<<(RTC_CNTL_DBG_ATTEN_S))
+#define RTC_CNTL_DBG_ATTEN_V  0x3
+#define RTC_CNTL_DBG_ATTEN_S  24
+
+#define RTC_CNTL_REG          (DR_REG_RTCCNTL_BASE + 0x7c)
+/* RTC_CNTL_FORCE_PU : R/W ;bitpos:[31] ;default: 1'd1 ; */
+/*description: RTC_REG force power up*/
+#define RTC_CNTL_FORCE_PU  (BIT(31))
+#define RTC_CNTL_FORCE_PU_M  (BIT(31))
+#define RTC_CNTL_FORCE_PU_V  0x1
+#define RTC_CNTL_FORCE_PU_S  31
+/* RTC_CNTL_FORCE_PD : R/W ;bitpos:[30] ;default: 1'd0 ; */
+/*description: RTC_REG force power down (for RTC_REG power down means decrease
+ the voltage to 0.8v or lower )*/
+#define RTC_CNTL_FORCE_PD  (BIT(30))
+#define RTC_CNTL_FORCE_PD_M  (BIT(30))
+#define RTC_CNTL_FORCE_PD_V  0x1
+#define RTC_CNTL_FORCE_PD_S  30
+/* RTC_CNTL_DBOOST_FORCE_PU : R/W ;bitpos:[29] ;default: 1'd1 ; */
+/*description: RTC_DBOOST force power up*/
+#define RTC_CNTL_DBOOST_FORCE_PU  (BIT(29))
+#define RTC_CNTL_DBOOST_FORCE_PU_M  (BIT(29))
+#define RTC_CNTL_DBOOST_FORCE_PU_V  0x1
+#define RTC_CNTL_DBOOST_FORCE_PU_S  29
+/* RTC_CNTL_DBOOST_FORCE_PD : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: RTC_DBOOST force power down*/
+#define RTC_CNTL_DBOOST_FORCE_PD  (BIT(28))
+#define RTC_CNTL_DBOOST_FORCE_PD_M  (BIT(28))
+#define RTC_CNTL_DBOOST_FORCE_PD_V  0x1
+#define RTC_CNTL_DBOOST_FORCE_PD_S  28
+/* RTC_CNTL_DBIAS_WAK : R/W ;bitpos:[27:25] ;default: 3'd4 ; */
+/*description: RTC_DBIAS during wakeup*/
+#define RTC_CNTL_DBIAS_WAK  0x00000007
+#define RTC_CNTL_DBIAS_WAK_M  ((RTC_CNTL_DBIAS_WAK_V)<<(RTC_CNTL_DBIAS_WAK_S))
+#define RTC_CNTL_DBIAS_WAK_V  0x7
+#define RTC_CNTL_DBIAS_WAK_S  25
+/* RTC_CNTL_DBIAS_SLP : R/W ;bitpos:[24:22] ;default: 3'd4 ; */
+/*description: RTC_DBIAS during sleep*/
+#define RTC_CNTL_DBIAS_SLP  0x00000007
+#define RTC_CNTL_DBIAS_SLP_M  ((RTC_CNTL_DBIAS_SLP_V)<<(RTC_CNTL_DBIAS_SLP_S))
+#define RTC_CNTL_DBIAS_SLP_V  0x7
+#define RTC_CNTL_DBIAS_SLP_S  22
+/* RTC_CNTL_SCK_DCAP : R/W ;bitpos:[21:14] ;default: 8'd0 ; */
+/*description: SCK_DCAP*/
+#define RTC_CNTL_SCK_DCAP  0x000000FF
+#define RTC_CNTL_SCK_DCAP_M  ((RTC_CNTL_SCK_DCAP_V)<<(RTC_CNTL_SCK_DCAP_S))
+#define RTC_CNTL_SCK_DCAP_V  0xFF
+#define RTC_CNTL_SCK_DCAP_S  14
+/* RTC_CNTL_DIG_DBIAS_WAK : R/W ;bitpos:[13:11] ;default: 3'd4 ; */
+/*description: DIG_REG_DBIAS during wakeup*/
+#define RTC_CNTL_DIG_DBIAS_WAK  0x00000007
+#define RTC_CNTL_DIG_DBIAS_WAK_M  ((RTC_CNTL_DIG_DBIAS_WAK_V)<<(RTC_CNTL_DIG_DBIAS_WAK_S))
+#define RTC_CNTL_DIG_DBIAS_WAK_V  0x7
+#define RTC_CNTL_DIG_DBIAS_WAK_S  11
+/* RTC_CNTL_DIG_DBIAS_SLP : R/W ;bitpos:[10:8] ;default: 3'd4 ; */
+/*description: DIG_REG_DBIAS during sleep*/
+#define RTC_CNTL_DIG_DBIAS_SLP  0x00000007
+#define RTC_CNTL_DIG_DBIAS_SLP_M  ((RTC_CNTL_DIG_DBIAS_SLP_V)<<(RTC_CNTL_DIG_DBIAS_SLP_S))
+#define RTC_CNTL_DIG_DBIAS_SLP_V  0x7
+#define RTC_CNTL_DIG_DBIAS_SLP_S  8
+/* RTC_CNTL_SCK_DCAP_FORCE : R/W ;bitpos:[7] ;default: 1'd0 ; */
+/*description: N/A*/
+#define RTC_CNTL_SCK_DCAP_FORCE  (BIT(7))
+#define RTC_CNTL_SCK_DCAP_FORCE_M  (BIT(7))
+#define RTC_CNTL_SCK_DCAP_FORCE_V  0x1
+#define RTC_CNTL_SCK_DCAP_FORCE_S  7
+
+#define RTC_CNTL_PWC_REG          (DR_REG_RTCCNTL_BASE + 0x80)
+/* RTC_CNTL_PD_EN : R/W ;bitpos:[20] ;default: 1'd0 ; */
+/*description: enable power down rtc_peri in sleep*/
+#define RTC_CNTL_PD_EN  (BIT(20))
+#define RTC_CNTL_PD_EN_M  (BIT(20))
+#define RTC_CNTL_PD_EN_V  0x1
+#define RTC_CNTL_PD_EN_S  20
+/* RTC_CNTL_FORCE_PU : R/W ;bitpos:[19] ;default: 1'd0 ; */
+/*description: rtc_peri force power up*/
+#define RTC_CNTL_PWC_FORCE_PU  (BIT(19))
+#define RTC_CNTL_PWC_FORCE_PU_M  (BIT(19))
+#define RTC_CNTL_PWC_FORCE_PU_V  0x1
+#define RTC_CNTL_PWC_FORCE_PU_S  19
+/* RTC_CNTL_FORCE_PD : R/W ;bitpos:[18] ;default: 1'b0 ; */
+/*description: rtc_peri force power down*/
+#define RTC_CNTL_PWC_FORCE_PD  (BIT(18))
+#define RTC_CNTL_PWC_FORCE_PD_M  (BIT(18))
+#define RTC_CNTL_PWC_FORCE_PD_V  0x1
+#define RTC_CNTL_PWC_FORCE_PD_S  18
+/* RTC_CNTL_SLOWMEM_PD_EN : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: enable power down RTC memory in sleep*/
+#define RTC_CNTL_SLOWMEM_PD_EN  (BIT(17))
+#define RTC_CNTL_SLOWMEM_PD_EN_M  (BIT(17))
+#define RTC_CNTL_SLOWMEM_PD_EN_V  0x1
+#define RTC_CNTL_SLOWMEM_PD_EN_S  17
+/* RTC_CNTL_SLOWMEM_FORCE_PU : R/W ;bitpos:[16] ;default: 1'b1 ; */
+/*description: RTC memory force power up*/
+#define RTC_CNTL_SLOWMEM_FORCE_PU  (BIT(16))
+#define RTC_CNTL_SLOWMEM_FORCE_PU_M  (BIT(16))
+#define RTC_CNTL_SLOWMEM_FORCE_PU_V  0x1
+#define RTC_CNTL_SLOWMEM_FORCE_PU_S  16
+/* RTC_CNTL_SLOWMEM_FORCE_PD : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: RTC memory force power down*/
+#define RTC_CNTL_SLOWMEM_FORCE_PD  (BIT(15))
+#define RTC_CNTL_SLOWMEM_FORCE_PD_M  (BIT(15))
+#define RTC_CNTL_SLOWMEM_FORCE_PD_V  0x1
+#define RTC_CNTL_SLOWMEM_FORCE_PD_S  15
+/* RTC_CNTL_FASTMEM_PD_EN : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/*description: enable power down fast RTC memory in sleep*/
+#define RTC_CNTL_FASTMEM_PD_EN  (BIT(14))
+#define RTC_CNTL_FASTMEM_PD_EN_M  (BIT(14))
+#define RTC_CNTL_FASTMEM_PD_EN_V  0x1
+#define RTC_CNTL_FASTMEM_PD_EN_S  14
+/* RTC_CNTL_FASTMEM_FORCE_PU : R/W ;bitpos:[13] ;default: 1'b1 ; */
+/*description: Fast RTC memory force power up*/
+#define RTC_CNTL_FASTMEM_FORCE_PU  (BIT(13))
+#define RTC_CNTL_FASTMEM_FORCE_PU_M  (BIT(13))
+#define RTC_CNTL_FASTMEM_FORCE_PU_V  0x1
+#define RTC_CNTL_FASTMEM_FORCE_PU_S  13
+/* RTC_CNTL_FASTMEM_FORCE_PD : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: Fast RTC memory force power down*/
+#define RTC_CNTL_FASTMEM_FORCE_PD  (BIT(12))
+#define RTC_CNTL_FASTMEM_FORCE_PD_M  (BIT(12))
+#define RTC_CNTL_FASTMEM_FORCE_PD_V  0x1
+#define RTC_CNTL_FASTMEM_FORCE_PD_S  12
+/* RTC_CNTL_SLOWMEM_FORCE_LPU : R/W ;bitpos:[11] ;default: 1'b1 ; */
+/*description: RTC memory force no PD*/
+#define RTC_CNTL_SLOWMEM_FORCE_LPU  (BIT(11))
+#define RTC_CNTL_SLOWMEM_FORCE_LPU_M  (BIT(11))
+#define RTC_CNTL_SLOWMEM_FORCE_LPU_V  0x1
+#define RTC_CNTL_SLOWMEM_FORCE_LPU_S  11
+/* RTC_CNTL_SLOWMEM_FORCE_LPD : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: RTC memory force PD*/
+#define RTC_CNTL_SLOWMEM_FORCE_LPD  (BIT(10))
+#define RTC_CNTL_SLOWMEM_FORCE_LPD_M  (BIT(10))
+#define RTC_CNTL_SLOWMEM_FORCE_LPD_V  0x1
+#define RTC_CNTL_SLOWMEM_FORCE_LPD_S  10
+/* RTC_CNTL_SLOWMEM_FOLW_CPU : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: 1: RTC memory  PD following CPU  0: RTC memory PD following RTC state machine*/
+#define RTC_CNTL_SLOWMEM_FOLW_CPU  (BIT(9))
+#define RTC_CNTL_SLOWMEM_FOLW_CPU_M  (BIT(9))
+#define RTC_CNTL_SLOWMEM_FOLW_CPU_V  0x1
+#define RTC_CNTL_SLOWMEM_FOLW_CPU_S  9
+/* RTC_CNTL_FASTMEM_FORCE_LPU : R/W ;bitpos:[8] ;default: 1'b1 ; */
+/*description: Fast RTC memory force no PD*/
+#define RTC_CNTL_FASTMEM_FORCE_LPU  (BIT(8))
+#define RTC_CNTL_FASTMEM_FORCE_LPU_M  (BIT(8))
+#define RTC_CNTL_FASTMEM_FORCE_LPU_V  0x1
+#define RTC_CNTL_FASTMEM_FORCE_LPU_S  8
+/* RTC_CNTL_FASTMEM_FORCE_LPD : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: Fast RTC memory force PD*/
+#define RTC_CNTL_FASTMEM_FORCE_LPD  (BIT(7))
+#define RTC_CNTL_FASTMEM_FORCE_LPD_M  (BIT(7))
+#define RTC_CNTL_FASTMEM_FORCE_LPD_V  0x1
+#define RTC_CNTL_FASTMEM_FORCE_LPD_S  7
+/* RTC_CNTL_FASTMEM_FOLW_CPU : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: 1: Fast RTC memory PD following CPU  0: fast RTC memory PD following
+ RTC state machine*/
+#define RTC_CNTL_FASTMEM_FOLW_CPU  (BIT(6))
+#define RTC_CNTL_FASTMEM_FOLW_CPU_M  (BIT(6))
+#define RTC_CNTL_FASTMEM_FOLW_CPU_V  0x1
+#define RTC_CNTL_FASTMEM_FOLW_CPU_S  6
+/* RTC_CNTL_FORCE_NOISO : R/W ;bitpos:[5] ;default: 1'd1 ; */
+/*description: rtc_peri force no ISO*/
+#define RTC_CNTL_FORCE_NOISO  (BIT(5))
+#define RTC_CNTL_FORCE_NOISO_M  (BIT(5))
+#define RTC_CNTL_FORCE_NOISO_V  0x1
+#define RTC_CNTL_FORCE_NOISO_S  5
+/* RTC_CNTL_FORCE_ISO : R/W ;bitpos:[4] ;default: 1'd0 ; */
+/*description: rtc_peri force ISO*/
+#define RTC_CNTL_FORCE_ISO  (BIT(4))
+#define RTC_CNTL_FORCE_ISO_M  (BIT(4))
+#define RTC_CNTL_FORCE_ISO_V  0x1
+#define RTC_CNTL_FORCE_ISO_S  4
+/* RTC_CNTL_SLOWMEM_FORCE_ISO : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: RTC memory force ISO*/
+#define RTC_CNTL_SLOWMEM_FORCE_ISO  (BIT(3))
+#define RTC_CNTL_SLOWMEM_FORCE_ISO_M  (BIT(3))
+#define RTC_CNTL_SLOWMEM_FORCE_ISO_V  0x1
+#define RTC_CNTL_SLOWMEM_FORCE_ISO_S  3
+/* RTC_CNTL_SLOWMEM_FORCE_NOISO : R/W ;bitpos:[2] ;default: 1'b1 ; */
+/*description: RTC memory force no ISO*/
+#define RTC_CNTL_SLOWMEM_FORCE_NOISO  (BIT(2))
+#define RTC_CNTL_SLOWMEM_FORCE_NOISO_M  (BIT(2))
+#define RTC_CNTL_SLOWMEM_FORCE_NOISO_V  0x1
+#define RTC_CNTL_SLOWMEM_FORCE_NOISO_S  2
+/* RTC_CNTL_FASTMEM_FORCE_ISO : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: Fast RTC memory force ISO*/
+#define RTC_CNTL_FASTMEM_FORCE_ISO  (BIT(1))
+#define RTC_CNTL_FASTMEM_FORCE_ISO_M  (BIT(1))
+#define RTC_CNTL_FASTMEM_FORCE_ISO_V  0x1
+#define RTC_CNTL_FASTMEM_FORCE_ISO_S  1
+/* RTC_CNTL_FASTMEM_FORCE_NOISO : R/W ;bitpos:[0] ;default: 1'b1 ; */
+/*description: Fast RTC memory force no ISO*/
+#define RTC_CNTL_FASTMEM_FORCE_NOISO  (BIT(0))
+#define RTC_CNTL_FASTMEM_FORCE_NOISO_M  (BIT(0))
+#define RTC_CNTL_FASTMEM_FORCE_NOISO_V  0x1
+#define RTC_CNTL_FASTMEM_FORCE_NOISO_S  0
+
+#define RTC_CNTL_DIG_PWC_REG          (DR_REG_RTCCNTL_BASE + 0x84)
+/* RTC_CNTL_DG_WRAP_PD_EN : R/W ;bitpos:[31] ;default: 0 ; */
+/*description: enable power down digital core in sleep*/
+#define RTC_CNTL_DG_WRAP_PD_EN  (BIT(31))
+#define RTC_CNTL_DG_WRAP_PD_EN_M  (BIT(31))
+#define RTC_CNTL_DG_WRAP_PD_EN_V  0x1
+#define RTC_CNTL_DG_WRAP_PD_EN_S  31
+/* RTC_CNTL_WIFI_PD_EN : R/W ;bitpos:[30] ;default: 0 ; */
+/*description: enable power down wifi in sleep*/
+#define RTC_CNTL_WIFI_PD_EN  (BIT(30))
+#define RTC_CNTL_WIFI_PD_EN_M  (BIT(30))
+#define RTC_CNTL_WIFI_PD_EN_V  0x1
+#define RTC_CNTL_WIFI_PD_EN_S  30
+/* RTC_CNTL_INTER_RAM4_PD_EN : R/W ;bitpos:[29] ;default: 0 ; */
+/*description: enable power down internal SRAM 4 in sleep*/
+#define RTC_CNTL_INTER_RAM4_PD_EN  (BIT(29))
+#define RTC_CNTL_INTER_RAM4_PD_EN_M  (BIT(29))
+#define RTC_CNTL_INTER_RAM4_PD_EN_V  0x1
+#define RTC_CNTL_INTER_RAM4_PD_EN_S  29
+/* RTC_CNTL_INTER_RAM3_PD_EN : R/W ;bitpos:[28] ;default: 0 ; */
+/*description: enable power down internal SRAM 3 in sleep*/
+#define RTC_CNTL_INTER_RAM3_PD_EN  (BIT(28))
+#define RTC_CNTL_INTER_RAM3_PD_EN_M  (BIT(28))
+#define RTC_CNTL_INTER_RAM3_PD_EN_V  0x1
+#define RTC_CNTL_INTER_RAM3_PD_EN_S  28
+/* RTC_CNTL_INTER_RAM2_PD_EN : R/W ;bitpos:[27] ;default: 0 ; */
+/*description: enable power down internal SRAM 2 in sleep*/
+#define RTC_CNTL_INTER_RAM2_PD_EN  (BIT(27))
+#define RTC_CNTL_INTER_RAM2_PD_EN_M  (BIT(27))
+#define RTC_CNTL_INTER_RAM2_PD_EN_V  0x1
+#define RTC_CNTL_INTER_RAM2_PD_EN_S  27
+/* RTC_CNTL_INTER_RAM1_PD_EN : R/W ;bitpos:[26] ;default: 0 ; */
+/*description: enable power down internal SRAM 1 in sleep*/
+#define RTC_CNTL_INTER_RAM1_PD_EN  (BIT(26))
+#define RTC_CNTL_INTER_RAM1_PD_EN_M  (BIT(26))
+#define RTC_CNTL_INTER_RAM1_PD_EN_V  0x1
+#define RTC_CNTL_INTER_RAM1_PD_EN_S  26
+/* RTC_CNTL_INTER_RAM0_PD_EN : R/W ;bitpos:[25] ;default: 0 ; */
+/*description: enable power down internal SRAM 0 in sleep*/
+#define RTC_CNTL_INTER_RAM0_PD_EN  (BIT(25))
+#define RTC_CNTL_INTER_RAM0_PD_EN_M  (BIT(25))
+#define RTC_CNTL_INTER_RAM0_PD_EN_V  0x1
+#define RTC_CNTL_INTER_RAM0_PD_EN_S  25
+/* RTC_CNTL_ROM0_PD_EN : R/W ;bitpos:[24] ;default: 0 ; */
+/*description: enable power down ROM in sleep*/
+#define RTC_CNTL_ROM0_PD_EN  (BIT(24))
+#define RTC_CNTL_ROM0_PD_EN_M  (BIT(24))
+#define RTC_CNTL_ROM0_PD_EN_V  0x1
+#define RTC_CNTL_ROM0_PD_EN_S  24
+/* RTC_CNTL_DG_WRAP_FORCE_PU : R/W ;bitpos:[20] ;default: 1'd1 ; */
+/*description: digital core force power up*/
+#define RTC_CNTL_DG_WRAP_FORCE_PU  (BIT(20))
+#define RTC_CNTL_DG_WRAP_FORCE_PU_M  (BIT(20))
+#define RTC_CNTL_DG_WRAP_FORCE_PU_V  0x1
+#define RTC_CNTL_DG_WRAP_FORCE_PU_S  20
+/* RTC_CNTL_DG_WRAP_FORCE_PD : R/W ;bitpos:[19] ;default: 1'b0 ; */
+/*description: digital core force power down*/
+#define RTC_CNTL_DG_WRAP_FORCE_PD  (BIT(19))
+#define RTC_CNTL_DG_WRAP_FORCE_PD_M  (BIT(19))
+#define RTC_CNTL_DG_WRAP_FORCE_PD_V  0x1
+#define RTC_CNTL_DG_WRAP_FORCE_PD_S  19
+/* RTC_CNTL_WIFI_FORCE_PU : R/W ;bitpos:[18] ;default: 1'd1 ; */
+/*description: wifi force power up*/
+#define RTC_CNTL_WIFI_FORCE_PU  (BIT(18))
+#define RTC_CNTL_WIFI_FORCE_PU_M  (BIT(18))
+#define RTC_CNTL_WIFI_FORCE_PU_V  0x1
+#define RTC_CNTL_WIFI_FORCE_PU_S  18
+/* RTC_CNTL_WIFI_FORCE_PD : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: wifi force power down*/
+#define RTC_CNTL_WIFI_FORCE_PD  (BIT(17))
+#define RTC_CNTL_WIFI_FORCE_PD_M  (BIT(17))
+#define RTC_CNTL_WIFI_FORCE_PD_V  0x1
+#define RTC_CNTL_WIFI_FORCE_PD_S  17
+/* RTC_CNTL_INTER_RAM4_FORCE_PU : R/W ;bitpos:[16] ;default: 1'd1 ; */
+/*description: internal SRAM 4 force power up*/
+#define RTC_CNTL_INTER_RAM4_FORCE_PU  (BIT(16))
+#define RTC_CNTL_INTER_RAM4_FORCE_PU_M  (BIT(16))
+#define RTC_CNTL_INTER_RAM4_FORCE_PU_V  0x1
+#define RTC_CNTL_INTER_RAM4_FORCE_PU_S  16
+/* RTC_CNTL_INTER_RAM4_FORCE_PD : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: internal SRAM 4 force power down*/
+#define RTC_CNTL_INTER_RAM4_FORCE_PD  (BIT(15))
+#define RTC_CNTL_INTER_RAM4_FORCE_PD_M  (BIT(15))
+#define RTC_CNTL_INTER_RAM4_FORCE_PD_V  0x1
+#define RTC_CNTL_INTER_RAM4_FORCE_PD_S  15
+/* RTC_CNTL_INTER_RAM3_FORCE_PU : R/W ;bitpos:[14] ;default: 1'd1 ; */
+/*description: internal SRAM 3 force power up*/
+#define RTC_CNTL_INTER_RAM3_FORCE_PU  (BIT(14))
+#define RTC_CNTL_INTER_RAM3_FORCE_PU_M  (BIT(14))
+#define RTC_CNTL_INTER_RAM3_FORCE_PU_V  0x1
+#define RTC_CNTL_INTER_RAM3_FORCE_PU_S  14
+/* RTC_CNTL_INTER_RAM3_FORCE_PD : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/*description: internal SRAM 3 force power down*/
+#define RTC_CNTL_INTER_RAM3_FORCE_PD  (BIT(13))
+#define RTC_CNTL_INTER_RAM3_FORCE_PD_M  (BIT(13))
+#define RTC_CNTL_INTER_RAM3_FORCE_PD_V  0x1
+#define RTC_CNTL_INTER_RAM3_FORCE_PD_S  13
+/* RTC_CNTL_INTER_RAM2_FORCE_PU : R/W ;bitpos:[12] ;default: 1'd1 ; */
+/*description: internal SRAM 2 force power up*/
+#define RTC_CNTL_INTER_RAM2_FORCE_PU  (BIT(12))
+#define RTC_CNTL_INTER_RAM2_FORCE_PU_M  (BIT(12))
+#define RTC_CNTL_INTER_RAM2_FORCE_PU_V  0x1
+#define RTC_CNTL_INTER_RAM2_FORCE_PU_S  12
+/* RTC_CNTL_INTER_RAM2_FORCE_PD : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: internal SRAM 2 force power down*/
+#define RTC_CNTL_INTER_RAM2_FORCE_PD  (BIT(11))
+#define RTC_CNTL_INTER_RAM2_FORCE_PD_M  (BIT(11))
+#define RTC_CNTL_INTER_RAM2_FORCE_PD_V  0x1
+#define RTC_CNTL_INTER_RAM2_FORCE_PD_S  11
+/* RTC_CNTL_INTER_RAM1_FORCE_PU : R/W ;bitpos:[10] ;default: 1'd1 ; */
+/*description: internal SRAM 1 force power up*/
+#define RTC_CNTL_INTER_RAM1_FORCE_PU  (BIT(10))
+#define RTC_CNTL_INTER_RAM1_FORCE_PU_M  (BIT(10))
+#define RTC_CNTL_INTER_RAM1_FORCE_PU_V  0x1
+#define RTC_CNTL_INTER_RAM1_FORCE_PU_S  10
+/* RTC_CNTL_INTER_RAM1_FORCE_PD : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: internal SRAM 1 force power down*/
+#define RTC_CNTL_INTER_RAM1_FORCE_PD  (BIT(9))
+#define RTC_CNTL_INTER_RAM1_FORCE_PD_M  (BIT(9))
+#define RTC_CNTL_INTER_RAM1_FORCE_PD_V  0x1
+#define RTC_CNTL_INTER_RAM1_FORCE_PD_S  9
+/* RTC_CNTL_INTER_RAM0_FORCE_PU : R/W ;bitpos:[8] ;default: 1'd1 ; */
+/*description: internal SRAM 0 force power up*/
+#define RTC_CNTL_INTER_RAM0_FORCE_PU  (BIT(8))
+#define RTC_CNTL_INTER_RAM0_FORCE_PU_M  (BIT(8))
+#define RTC_CNTL_INTER_RAM0_FORCE_PU_V  0x1
+#define RTC_CNTL_INTER_RAM0_FORCE_PU_S  8
+/* RTC_CNTL_INTER_RAM0_FORCE_PD : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: internal SRAM 0 force power down*/
+#define RTC_CNTL_INTER_RAM0_FORCE_PD  (BIT(7))
+#define RTC_CNTL_INTER_RAM0_FORCE_PD_M  (BIT(7))
+#define RTC_CNTL_INTER_RAM0_FORCE_PD_V  0x1
+#define RTC_CNTL_INTER_RAM0_FORCE_PD_S  7
+/* RTC_CNTL_ROM0_FORCE_PU : R/W ;bitpos:[6] ;default: 1'd1 ; */
+/*description: ROM force power up*/
+#define RTC_CNTL_ROM0_FORCE_PU  (BIT(6))
+#define RTC_CNTL_ROM0_FORCE_PU_M  (BIT(6))
+#define RTC_CNTL_ROM0_FORCE_PU_V  0x1
+#define RTC_CNTL_ROM0_FORCE_PU_S  6
+/* RTC_CNTL_ROM0_FORCE_PD : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: ROM force power down*/
+#define RTC_CNTL_ROM0_FORCE_PD  (BIT(5))
+#define RTC_CNTL_ROM0_FORCE_PD_M  (BIT(5))
+#define RTC_CNTL_ROM0_FORCE_PD_V  0x1
+#define RTC_CNTL_ROM0_FORCE_PD_S  5
+/* RTC_CNTL_LSLP_MEM_FORCE_PU : R/W ;bitpos:[4] ;default: 1'b1 ; */
+/*description: memories in digital core force no PD in sleep*/
+#define RTC_CNTL_LSLP_MEM_FORCE_PU  (BIT(4))
+#define RTC_CNTL_LSLP_MEM_FORCE_PU_M  (BIT(4))
+#define RTC_CNTL_LSLP_MEM_FORCE_PU_V  0x1
+#define RTC_CNTL_LSLP_MEM_FORCE_PU_S  4
+/* RTC_CNTL_LSLP_MEM_FORCE_PD : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: memories in digital core force PD in sleep*/
+#define RTC_CNTL_LSLP_MEM_FORCE_PD  (BIT(3))
+#define RTC_CNTL_LSLP_MEM_FORCE_PD_M  (BIT(3))
+#define RTC_CNTL_LSLP_MEM_FORCE_PD_V  0x1
+#define RTC_CNTL_LSLP_MEM_FORCE_PD_S  3
+
+#define RTC_CNTL_DIG_ISO_REG          (DR_REG_RTCCNTL_BASE + 0x88)
+/* RTC_CNTL_DG_WRAP_FORCE_NOISO : R/W ;bitpos:[31] ;default: 1'd1 ; */
+/*description: digital core force no ISO*/
+#define RTC_CNTL_DG_WRAP_FORCE_NOISO  (BIT(31))
+#define RTC_CNTL_DG_WRAP_FORCE_NOISO_M  (BIT(31))
+#define RTC_CNTL_DG_WRAP_FORCE_NOISO_V  0x1
+#define RTC_CNTL_DG_WRAP_FORCE_NOISO_S  31
+/* RTC_CNTL_DG_WRAP_FORCE_ISO : R/W ;bitpos:[30] ;default: 1'd0 ; */
+/*description: digital core force ISO*/
+#define RTC_CNTL_DG_WRAP_FORCE_ISO  (BIT(30))
+#define RTC_CNTL_DG_WRAP_FORCE_ISO_M  (BIT(30))
+#define RTC_CNTL_DG_WRAP_FORCE_ISO_V  0x1
+#define RTC_CNTL_DG_WRAP_FORCE_ISO_S  30
+/* RTC_CNTL_WIFI_FORCE_NOISO : R/W ;bitpos:[29] ;default: 1'd1 ; */
+/*description: wifi force no ISO*/
+#define RTC_CNTL_WIFI_FORCE_NOISO  (BIT(29))
+#define RTC_CNTL_WIFI_FORCE_NOISO_M  (BIT(29))
+#define RTC_CNTL_WIFI_FORCE_NOISO_V  0x1
+#define RTC_CNTL_WIFI_FORCE_NOISO_S  29
+/* RTC_CNTL_WIFI_FORCE_ISO : R/W ;bitpos:[28] ;default: 1'd0 ; */
+/*description: wifi force ISO*/
+#define RTC_CNTL_WIFI_FORCE_ISO  (BIT(28))
+#define RTC_CNTL_WIFI_FORCE_ISO_M  (BIT(28))
+#define RTC_CNTL_WIFI_FORCE_ISO_V  0x1
+#define RTC_CNTL_WIFI_FORCE_ISO_S  28
+/* RTC_CNTL_INTER_RAM4_FORCE_NOISO : R/W ;bitpos:[27] ;default: 1'd1 ; */
+/*description: internal SRAM 4 force no ISO*/
+#define RTC_CNTL_INTER_RAM4_FORCE_NOISO  (BIT(27))
+#define RTC_CNTL_INTER_RAM4_FORCE_NOISO_M  (BIT(27))
+#define RTC_CNTL_INTER_RAM4_FORCE_NOISO_V  0x1
+#define RTC_CNTL_INTER_RAM4_FORCE_NOISO_S  27
+/* RTC_CNTL_INTER_RAM4_FORCE_ISO : R/W ;bitpos:[26] ;default: 1'd0 ; */
+/*description: internal SRAM 4 force ISO*/
+#define RTC_CNTL_INTER_RAM4_FORCE_ISO  (BIT(26))
+#define RTC_CNTL_INTER_RAM4_FORCE_ISO_M  (BIT(26))
+#define RTC_CNTL_INTER_RAM4_FORCE_ISO_V  0x1
+#define RTC_CNTL_INTER_RAM4_FORCE_ISO_S  26
+/* RTC_CNTL_INTER_RAM3_FORCE_NOISO : R/W ;bitpos:[25] ;default: 1'd1 ; */
+/*description: internal SRAM 3 force no ISO*/
+#define RTC_CNTL_INTER_RAM3_FORCE_NOISO  (BIT(25))
+#define RTC_CNTL_INTER_RAM3_FORCE_NOISO_M  (BIT(25))
+#define RTC_CNTL_INTER_RAM3_FORCE_NOISO_V  0x1
+#define RTC_CNTL_INTER_RAM3_FORCE_NOISO_S  25
+/* RTC_CNTL_INTER_RAM3_FORCE_ISO : R/W ;bitpos:[24] ;default: 1'd0 ; */
+/*description: internal SRAM 3 force ISO*/
+#define RTC_CNTL_INTER_RAM3_FORCE_ISO  (BIT(24))
+#define RTC_CNTL_INTER_RAM3_FORCE_ISO_M  (BIT(24))
+#define RTC_CNTL_INTER_RAM3_FORCE_ISO_V  0x1
+#define RTC_CNTL_INTER_RAM3_FORCE_ISO_S  24
+/* RTC_CNTL_INTER_RAM2_FORCE_NOISO : R/W ;bitpos:[23] ;default: 1'd1 ; */
+/*description: internal SRAM 2 force no ISO*/
+#define RTC_CNTL_INTER_RAM2_FORCE_NOISO  (BIT(23))
+#define RTC_CNTL_INTER_RAM2_FORCE_NOISO_M  (BIT(23))
+#define RTC_CNTL_INTER_RAM2_FORCE_NOISO_V  0x1
+#define RTC_CNTL_INTER_RAM2_FORCE_NOISO_S  23
+/* RTC_CNTL_INTER_RAM2_FORCE_ISO : R/W ;bitpos:[22] ;default: 1'd0 ; */
+/*description: internal SRAM 2 force ISO*/
+#define RTC_CNTL_INTER_RAM2_FORCE_ISO  (BIT(22))
+#define RTC_CNTL_INTER_RAM2_FORCE_ISO_M  (BIT(22))
+#define RTC_CNTL_INTER_RAM2_FORCE_ISO_V  0x1
+#define RTC_CNTL_INTER_RAM2_FORCE_ISO_S  22
+/* RTC_CNTL_INTER_RAM1_FORCE_NOISO : R/W ;bitpos:[21] ;default: 1'd1 ; */
+/*description: internal SRAM 1 force no ISO*/
+#define RTC_CNTL_INTER_RAM1_FORCE_NOISO  (BIT(21))
+#define RTC_CNTL_INTER_RAM1_FORCE_NOISO_M  (BIT(21))
+#define RTC_CNTL_INTER_RAM1_FORCE_NOISO_V  0x1
+#define RTC_CNTL_INTER_RAM1_FORCE_NOISO_S  21
+/* RTC_CNTL_INTER_RAM1_FORCE_ISO : R/W ;bitpos:[20] ;default: 1'd0 ; */
+/*description: internal SRAM 1 force ISO*/
+#define RTC_CNTL_INTER_RAM1_FORCE_ISO  (BIT(20))
+#define RTC_CNTL_INTER_RAM1_FORCE_ISO_M  (BIT(20))
+#define RTC_CNTL_INTER_RAM1_FORCE_ISO_V  0x1
+#define RTC_CNTL_INTER_RAM1_FORCE_ISO_S  20
+/* RTC_CNTL_INTER_RAM0_FORCE_NOISO : R/W ;bitpos:[19] ;default: 1'd1 ; */
+/*description: internal SRAM 0 force no ISO*/
+#define RTC_CNTL_INTER_RAM0_FORCE_NOISO  (BIT(19))
+#define RTC_CNTL_INTER_RAM0_FORCE_NOISO_M  (BIT(19))
+#define RTC_CNTL_INTER_RAM0_FORCE_NOISO_V  0x1
+#define RTC_CNTL_INTER_RAM0_FORCE_NOISO_S  19
+/* RTC_CNTL_INTER_RAM0_FORCE_ISO : R/W ;bitpos:[18] ;default: 1'd0 ; */
+/*description: internal SRAM 0 force ISO*/
+#define RTC_CNTL_INTER_RAM0_FORCE_ISO  (BIT(18))
+#define RTC_CNTL_INTER_RAM0_FORCE_ISO_M  (BIT(18))
+#define RTC_CNTL_INTER_RAM0_FORCE_ISO_V  0x1
+#define RTC_CNTL_INTER_RAM0_FORCE_ISO_S  18
+/* RTC_CNTL_ROM0_FORCE_NOISO : R/W ;bitpos:[17] ;default: 1'd1 ; */
+/*description: ROM force no ISO*/
+#define RTC_CNTL_ROM0_FORCE_NOISO  (BIT(17))
+#define RTC_CNTL_ROM0_FORCE_NOISO_M  (BIT(17))
+#define RTC_CNTL_ROM0_FORCE_NOISO_V  0x1
+#define RTC_CNTL_ROM0_FORCE_NOISO_S  17
+/* RTC_CNTL_ROM0_FORCE_ISO : R/W ;bitpos:[16] ;default: 1'd0 ; */
+/*description: ROM force ISO*/
+#define RTC_CNTL_ROM0_FORCE_ISO  (BIT(16))
+#define RTC_CNTL_ROM0_FORCE_ISO_M  (BIT(16))
+#define RTC_CNTL_ROM0_FORCE_ISO_V  0x1
+#define RTC_CNTL_ROM0_FORCE_ISO_S  16
+/* RTC_CNTL_DG_PAD_FORCE_HOLD : R/W ;bitpos:[15] ;default: 1'd0 ; */
+/*description: digital pad force hold*/
+#define RTC_CNTL_DG_PAD_FORCE_HOLD  (BIT(15))
+#define RTC_CNTL_DG_PAD_FORCE_HOLD_M  (BIT(15))
+#define RTC_CNTL_DG_PAD_FORCE_HOLD_V  0x1
+#define RTC_CNTL_DG_PAD_FORCE_HOLD_S  15
+/* RTC_CNTL_DG_PAD_FORCE_UNHOLD : R/W ;bitpos:[14] ;default: 1'd1 ; */
+/*description: digital pad force un-hold*/
+#define RTC_CNTL_DG_PAD_FORCE_UNHOLD  (BIT(14))
+#define RTC_CNTL_DG_PAD_FORCE_UNHOLD_M  (BIT(14))
+#define RTC_CNTL_DG_PAD_FORCE_UNHOLD_V  0x1
+#define RTC_CNTL_DG_PAD_FORCE_UNHOLD_S  14
+/* RTC_CNTL_DG_PAD_FORCE_ISO : R/W ;bitpos:[13] ;default: 1'd0 ; */
+/*description: digital pad force ISO*/
+#define RTC_CNTL_DG_PAD_FORCE_ISO  (BIT(13))
+#define RTC_CNTL_DG_PAD_FORCE_ISO_M  (BIT(13))
+#define RTC_CNTL_DG_PAD_FORCE_ISO_V  0x1
+#define RTC_CNTL_DG_PAD_FORCE_ISO_S  13
+/* RTC_CNTL_DG_PAD_FORCE_NOISO : R/W ;bitpos:[12] ;default: 1'd1 ; */
+/*description: digital pad force no ISO*/
+#define RTC_CNTL_DG_PAD_FORCE_NOISO  (BIT(12))
+#define RTC_CNTL_DG_PAD_FORCE_NOISO_M  (BIT(12))
+#define RTC_CNTL_DG_PAD_FORCE_NOISO_V  0x1
+#define RTC_CNTL_DG_PAD_FORCE_NOISO_S  12
+/* RTC_CNTL_DG_PAD_AUTOHOLD_EN : R/W ;bitpos:[11] ;default: 1'd0 ; */
+/*description: digital pad enable auto-hold*/
+#define RTC_CNTL_DG_PAD_AUTOHOLD_EN  (BIT(11))
+#define RTC_CNTL_DG_PAD_AUTOHOLD_EN_M  (BIT(11))
+#define RTC_CNTL_DG_PAD_AUTOHOLD_EN_V  0x1
+#define RTC_CNTL_DG_PAD_AUTOHOLD_EN_S  11
+/* RTC_CNTL_CLR_DG_PAD_AUTOHOLD : WO ;bitpos:[10] ;default: 1'd0 ; */
+/*description: wtite only register to clear digital pad auto-hold*/
+#define RTC_CNTL_CLR_DG_PAD_AUTOHOLD  (BIT(10))
+#define RTC_CNTL_CLR_DG_PAD_AUTOHOLD_M  (BIT(10))
+#define RTC_CNTL_CLR_DG_PAD_AUTOHOLD_V  0x1
+#define RTC_CNTL_CLR_DG_PAD_AUTOHOLD_S  10
+/* RTC_CNTL_DG_PAD_AUTOHOLD : RO ;bitpos:[9] ;default: 1'd0 ; */
+/*description: read only register to indicate digital pad auto-hold status*/
+#define RTC_CNTL_DG_PAD_AUTOHOLD  (BIT(9))
+#define RTC_CNTL_DG_PAD_AUTOHOLD_M  (BIT(9))
+#define RTC_CNTL_DG_PAD_AUTOHOLD_V  0x1
+#define RTC_CNTL_DG_PAD_AUTOHOLD_S  9
+/* RTC_CNTL_DIG_ISO_FORCE_ON : R/W ;bitpos:[8] ;default: 1'd0 ; */
+/*description: */
+#define RTC_CNTL_DIG_ISO_FORCE_ON  (BIT(8))
+#define RTC_CNTL_DIG_ISO_FORCE_ON_M  (BIT(8))
+#define RTC_CNTL_DIG_ISO_FORCE_ON_V  0x1
+#define RTC_CNTL_DIG_ISO_FORCE_ON_S  8
+/* RTC_CNTL_DIG_ISO_FORCE_OFF : R/W ;bitpos:[7] ;default: 1'd0 ; */
+/*description: */
+#define RTC_CNTL_DIG_ISO_FORCE_OFF  (BIT(7))
+#define RTC_CNTL_DIG_ISO_FORCE_OFF_M  (BIT(7))
+#define RTC_CNTL_DIG_ISO_FORCE_OFF_V  0x1
+#define RTC_CNTL_DIG_ISO_FORCE_OFF_S  7
+
+#define RTC_CNTL_WDTCONFIG0_REG          (DR_REG_RTCCNTL_BASE + 0x8c)
+/* RTC_CNTL_WDT_EN : R/W ;bitpos:[31] ;default: 1'h0 ; */
+/*description: enable RTC WDT*/
+#define RTC_CNTL_WDT_EN  (BIT(31))
+#define RTC_CNTL_WDT_EN_M  (BIT(31))
+#define RTC_CNTL_WDT_EN_V  0x1
+#define RTC_CNTL_WDT_EN_S  31
+/* RTC_CNTL_WDT_STG0 : R/W ;bitpos:[30:28] ;default: 3'h0 ; */
+/*description: 1: interrupt stage en  2: CPU reset stage en  3: system reset
+ stage en  4: RTC reset stage en*/
+#define RTC_CNTL_WDT_STG0  0x00000007
+#define RTC_CNTL_WDT_STG0_M  ((RTC_CNTL_WDT_STG0_V)<<(RTC_CNTL_WDT_STG0_S))
+#define RTC_CNTL_WDT_STG0_V  0x7
+#define RTC_CNTL_WDT_STG0_S  28
+/* RTC_CNTL_WDT_STG1 : R/W ;bitpos:[27:25] ;default: 3'h0 ; */
+/*description: 1: interrupt stage en  2: CPU reset stage en  3: system reset
+ stage en  4: RTC reset stage en*/
+#define RTC_CNTL_WDT_STG1  0x00000007
+#define RTC_CNTL_WDT_STG1_M  ((RTC_CNTL_WDT_STG1_V)<<(RTC_CNTL_WDT_STG1_S))
+#define RTC_CNTL_WDT_STG1_V  0x7
+#define RTC_CNTL_WDT_STG1_S  25
+/* RTC_CNTL_WDT_STG2 : R/W ;bitpos:[24:22] ;default: 3'h0 ; */
+/*description: 1: interrupt stage en  2: CPU reset stage en  3: system reset
+ stage en  4: RTC reset stage en*/
+#define RTC_CNTL_WDT_STG2  0x00000007
+#define RTC_CNTL_WDT_STG2_M  ((RTC_CNTL_WDT_STG2_V)<<(RTC_CNTL_WDT_STG2_S))
+#define RTC_CNTL_WDT_STG2_V  0x7
+#define RTC_CNTL_WDT_STG2_S  22
+/* RTC_CNTL_WDT_STG3 : R/W ;bitpos:[21:19] ;default: 3'h0 ; */
+/*description: 1: interrupt stage en  2: CPU reset stage en  3: system reset
+ stage en  4: RTC reset stage en*/
+#define RTC_CNTL_WDT_STG3  0x00000007
+#define RTC_CNTL_WDT_STG3_M  ((RTC_CNTL_WDT_STG3_V)<<(RTC_CNTL_WDT_STG3_S))
+#define RTC_CNTL_WDT_STG3_V  0x7
+#define RTC_CNTL_WDT_STG3_S  19
+/* RTC_CNTL_WDT_EDGE_INT_EN : R/W ;bitpos:[18] ;default: 1'h0 ; */
+/*description: N/A*/
+#define RTC_CNTL_WDT_EDGE_INT_EN  (BIT(18))
+#define RTC_CNTL_WDT_EDGE_INT_EN_M  (BIT(18))
+#define RTC_CNTL_WDT_EDGE_INT_EN_V  0x1
+#define RTC_CNTL_WDT_EDGE_INT_EN_S  18
+/* RTC_CNTL_WDT_LEVEL_INT_EN : R/W ;bitpos:[17] ;default: 1'h0 ; */
+/*description: N/A*/
+#define RTC_CNTL_WDT_LEVEL_INT_EN  (BIT(17))
+#define RTC_CNTL_WDT_LEVEL_INT_EN_M  (BIT(17))
+#define RTC_CNTL_WDT_LEVEL_INT_EN_V  0x1
+#define RTC_CNTL_WDT_LEVEL_INT_EN_S  17
+/* RTC_CNTL_WDT_CPU_RESET_LENGTH : R/W ;bitpos:[16:14] ;default: 3'h1 ; */
+/*description: CPU reset counter length*/
+#define RTC_CNTL_WDT_CPU_RESET_LENGTH  0x00000007
+#define RTC_CNTL_WDT_CPU_RESET_LENGTH_M  ((RTC_CNTL_WDT_CPU_RESET_LENGTH_V)<<(RTC_CNTL_WDT_CPU_RESET_LENGTH_S))
+#define RTC_CNTL_WDT_CPU_RESET_LENGTH_V  0x7
+#define RTC_CNTL_WDT_CPU_RESET_LENGTH_S  14
+/* RTC_CNTL_WDT_SYS_RESET_LENGTH : R/W ;bitpos:[13:11] ;default: 3'h1 ; */
+/*description: system reset counter length*/
+#define RTC_CNTL_WDT_SYS_RESET_LENGTH  0x00000007
+#define RTC_CNTL_WDT_SYS_RESET_LENGTH_M  ((RTC_CNTL_WDT_SYS_RESET_LENGTH_V)<<(RTC_CNTL_WDT_SYS_RESET_LENGTH_S))
+#define RTC_CNTL_WDT_SYS_RESET_LENGTH_V  0x7
+#define RTC_CNTL_WDT_SYS_RESET_LENGTH_S  11
+/* RTC_CNTL_WDT_FLASHBOOT_MOD_EN : R/W ;bitpos:[10] ;default: 1'h1 ; */
+/*description: enable WDT in flash boot*/
+#define RTC_CNTL_WDT_FLASHBOOT_MOD_EN  (BIT(10))
+#define RTC_CNTL_WDT_FLASHBOOT_MOD_EN_M  (BIT(10))
+#define RTC_CNTL_WDT_FLASHBOOT_MOD_EN_V  0x1
+#define RTC_CNTL_WDT_FLASHBOOT_MOD_EN_S  10
+/* RTC_CNTL_WDT_PROCPU_RESET_EN : R/W ;bitpos:[9] ;default: 1'd0 ; */
+/*description: enable WDT reset PRO CPU*/
+#define RTC_CNTL_WDT_PROCPU_RESET_EN  (BIT(9))
+#define RTC_CNTL_WDT_PROCPU_RESET_EN_M  (BIT(9))
+#define RTC_CNTL_WDT_PROCPU_RESET_EN_V  0x1
+#define RTC_CNTL_WDT_PROCPU_RESET_EN_S  9
+/* RTC_CNTL_WDT_APPCPU_RESET_EN : R/W ;bitpos:[8] ;default: 1'd0 ; */
+/*description: enable WDT reset APP CPU*/
+#define RTC_CNTL_WDT_APPCPU_RESET_EN  (BIT(8))
+#define RTC_CNTL_WDT_APPCPU_RESET_EN_M  (BIT(8))
+#define RTC_CNTL_WDT_APPCPU_RESET_EN_V  0x1
+#define RTC_CNTL_WDT_APPCPU_RESET_EN_S  8
+/* RTC_CNTL_WDT_PAUSE_IN_SLP : R/W ;bitpos:[7] ;default: 1'd1 ; */
+/*description: pause WDT in sleep*/
+#define RTC_CNTL_WDT_PAUSE_IN_SLP  (BIT(7))
+#define RTC_CNTL_WDT_PAUSE_IN_SLP_M  (BIT(7))
+#define RTC_CNTL_WDT_PAUSE_IN_SLP_V  0x1
+#define RTC_CNTL_WDT_PAUSE_IN_SLP_S  7
+
+#define RTC_CNTL_WDTCONFIG1_REG          (DR_REG_RTCCNTL_BASE + 0x90)
+/* RTC_CNTL_WDT_STG0_HOLD : R/W ;bitpos:[31:0] ;default: 32'd128000 ; */
+/*description: */
+#define RTC_CNTL_WDT_STG0_HOLD  0xFFFFFFFF
+#define RTC_CNTL_WDT_STG0_HOLD_M  ((RTC_CNTL_WDT_STG0_HOLD_V)<<(RTC_CNTL_WDT_STG0_HOLD_S))
+#define RTC_CNTL_WDT_STG0_HOLD_V  0xFFFFFFFF
+#define RTC_CNTL_WDT_STG0_HOLD_S  0
+
+#define RTC_CNTL_WDTCONFIG2_REG          (DR_REG_RTCCNTL_BASE + 0x94)
+/* RTC_CNTL_WDT_STG1_HOLD : R/W ;bitpos:[31:0] ;default: 32'd80000 ; */
+/*description: */
+#define RTC_CNTL_WDT_STG1_HOLD  0xFFFFFFFF
+#define RTC_CNTL_WDT_STG1_HOLD_M  ((RTC_CNTL_WDT_STG1_HOLD_V)<<(RTC_CNTL_WDT_STG1_HOLD_S))
+#define RTC_CNTL_WDT_STG1_HOLD_V  0xFFFFFFFF
+#define RTC_CNTL_WDT_STG1_HOLD_S  0
+
+#define RTC_CNTL_WDTCONFIG3_REG          (DR_REG_RTCCNTL_BASE + 0x98)
+/* RTC_CNTL_WDT_STG2_HOLD : R/W ;bitpos:[31:0] ;default: 32'hfff ; */
+/*description: */
+#define RTC_CNTL_WDT_STG2_HOLD  0xFFFFFFFF
+#define RTC_CNTL_WDT_STG2_HOLD_M  ((RTC_CNTL_WDT_STG2_HOLD_V)<<(RTC_CNTL_WDT_STG2_HOLD_S))
+#define RTC_CNTL_WDT_STG2_HOLD_V  0xFFFFFFFF
+#define RTC_CNTL_WDT_STG2_HOLD_S  0
+
+#define RTC_CNTL_WDTCONFIG4_REG          (DR_REG_RTCCNTL_BASE + 0x9c)
+/* RTC_CNTL_WDT_STG3_HOLD : R/W ;bitpos:[31:0] ;default: 32'hfff ; */
+/*description: */
+#define RTC_CNTL_WDT_STG3_HOLD  0xFFFFFFFF
+#define RTC_CNTL_WDT_STG3_HOLD_M  ((RTC_CNTL_WDT_STG3_HOLD_V)<<(RTC_CNTL_WDT_STG3_HOLD_S))
+#define RTC_CNTL_WDT_STG3_HOLD_V  0xFFFFFFFF
+#define RTC_CNTL_WDT_STG3_HOLD_S  0
+
+#define RTC_CNTL_WDTFEED_REG          (DR_REG_RTCCNTL_BASE + 0xa0)
+/* RTC_CNTL_WDT_FEED : WO ;bitpos:[31] ;default: 1'd0 ; */
+/*description: */
+#define RTC_CNTL_WDT_FEED  (BIT(31))
+#define RTC_CNTL_WDT_FEED_M  (BIT(31))
+#define RTC_CNTL_WDT_FEED_V  0x1
+#define RTC_CNTL_WDT_FEED_S  31
+
+#define RTC_CNTL_WDTWPROTECT_REG          (DR_REG_RTCCNTL_BASE + 0xa4)
+/* RTC_CNTL_WDT_WKEY : R/W ;bitpos:[31:0] ;default: 32'h50d83aa1 ; */
+/*description: */
+#define RTC_CNTL_WDT_WKEY  0xFFFFFFFF
+#define RTC_CNTL_WDT_WKEY_M  ((RTC_CNTL_WDT_WKEY_V)<<(RTC_CNTL_WDT_WKEY_S))
+#define RTC_CNTL_WDT_WKEY_V  0xFFFFFFFF
+#define RTC_CNTL_WDT_WKEY_S  0
+
+#define RTC_CNTL_TEST_MUX_REG          (DR_REG_RTCCNTL_BASE + 0xa8)
+/* RTC_CNTL_DTEST_RTC : R/W ;bitpos:[31:30] ;default: 2'd0 ; */
+/*description: DTEST_RTC*/
+#define RTC_CNTL_DTEST_RTC  0x00000003
+#define RTC_CNTL_DTEST_RTC_M  ((RTC_CNTL_DTEST_RTC_V)<<(RTC_CNTL_DTEST_RTC_S))
+#define RTC_CNTL_DTEST_RTC_V  0x3
+#define RTC_CNTL_DTEST_RTC_S  30
+/* RTC_CNTL_ENT_RTC : R/W ;bitpos:[29] ;default: 1'd0 ; */
+/*description: ENT_RTC*/
+#define RTC_CNTL_ENT_RTC  (BIT(29))
+#define RTC_CNTL_ENT_RTC_M  (BIT(29))
+#define RTC_CNTL_ENT_RTC_V  0x1
+#define RTC_CNTL_ENT_RTC_S  29
+
+#define RTC_CNTL_SW_CPU_STALL_REG          (DR_REG_RTCCNTL_BASE + 0xac)
+/* RTC_CNTL_SW_STALL_PROCPU_C1 : R/W ;bitpos:[31:26] ;default: 6'b0 ; */
+/*description: {reg_sw_stall_procpu_c1[5:0]   reg_sw_stall_procpu_c0[1:0]} ==
+ 0x86 will stall PRO CPU*/
+#define RTC_CNTL_SW_STALL_PROCPU_C1  0x0000003F
+#define RTC_CNTL_SW_STALL_PROCPU_C1_M  ((RTC_CNTL_SW_STALL_PROCPU_C1_V)<<(RTC_CNTL_SW_STALL_PROCPU_C1_S))
+#define RTC_CNTL_SW_STALL_PROCPU_C1_V  0x3F
+#define RTC_CNTL_SW_STALL_PROCPU_C1_S  26
+/* RTC_CNTL_SW_STALL_APPCPU_C1 : R/W ;bitpos:[25:20] ;default: 6'b0 ; */
+/*description: {reg_sw_stall_appcpu_c1[5:0]   reg_sw_stall_appcpu_c0[1:0]} ==
+ 0x86 will stall APP CPU*/
+#define RTC_CNTL_SW_STALL_APPCPU_C1  0x0000003F
+#define RTC_CNTL_SW_STALL_APPCPU_C1_M  ((RTC_CNTL_SW_STALL_APPCPU_C1_V)<<(RTC_CNTL_SW_STALL_APPCPU_C1_S))
+#define RTC_CNTL_SW_STALL_APPCPU_C1_V  0x3F
+#define RTC_CNTL_SW_STALL_APPCPU_C1_S  20
+
+#define RTC_CNTL_STORE4_REG          (DR_REG_RTCCNTL_BASE + 0xb0)
+/* RTC_CNTL_SCRATCH4 : R/W ;bitpos:[31:0] ;default: 0 ; */
+/*description: 32-bit general purpose retention register*/
+#define RTC_CNTL_SCRATCH4  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH4_M  ((RTC_CNTL_SCRATCH4_V)<<(RTC_CNTL_SCRATCH4_S))
+#define RTC_CNTL_SCRATCH4_V  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH4_S  0
+
+#define RTC_CNTL_STORE5_REG          (DR_REG_RTCCNTL_BASE + 0xb4)
+/* RTC_CNTL_SCRATCH5 : R/W ;bitpos:[31:0] ;default: 0 ; */
+/*description: 32-bit general purpose retention register*/
+#define RTC_CNTL_SCRATCH5  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH5_M  ((RTC_CNTL_SCRATCH5_V)<<(RTC_CNTL_SCRATCH5_S))
+#define RTC_CNTL_SCRATCH5_V  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH5_S  0
+
+#define RTC_CNTL_STORE6_REG          (DR_REG_RTCCNTL_BASE + 0xb8)
+/* RTC_CNTL_SCRATCH6 : R/W ;bitpos:[31:0] ;default: 0 ; */
+/*description: 32-bit general purpose retention register*/
+#define RTC_CNTL_SCRATCH6  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH6_M  ((RTC_CNTL_SCRATCH6_V)<<(RTC_CNTL_SCRATCH6_S))
+#define RTC_CNTL_SCRATCH6_V  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH6_S  0
+
+#define RTC_CNTL_STORE7_REG          (DR_REG_RTCCNTL_BASE + 0xbc)
+/* RTC_CNTL_SCRATCH7 : R/W ;bitpos:[31:0] ;default: 0 ; */
+/*description: 32-bit general purpose retention register*/
+#define RTC_CNTL_SCRATCH7  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH7_M  ((RTC_CNTL_SCRATCH7_V)<<(RTC_CNTL_SCRATCH7_S))
+#define RTC_CNTL_SCRATCH7_V  0xFFFFFFFF
+#define RTC_CNTL_SCRATCH7_S  0
+
+#define RTC_CNTL_DIAG0_REG          (DR_REG_RTCCNTL_BASE + 0xc0)
+/* RTC_CNTL_LOW_POWER_DIAG0 : RO ;bitpos:[31:0] ;default: 0 ; */
+/*description: */
+#define RTC_CNTL_LOW_POWER_DIAG0  0xFFFFFFFF
+#define RTC_CNTL_LOW_POWER_DIAG0_M  ((RTC_CNTL_LOW_POWER_DIAG0_V)<<(RTC_CNTL_LOW_POWER_DIAG0_S))
+#define RTC_CNTL_LOW_POWER_DIAG0_V  0xFFFFFFFF
+#define RTC_CNTL_LOW_POWER_DIAG0_S  0
+
+#define RTC_CNTL_DIAG1_REG          (DR_REG_RTCCNTL_BASE + 0xc4)
+/* RTC_CNTL_LOW_POWER_DIAG1 : RO ;bitpos:[31:0] ;default: 0 ; */
+/*description: */
+#define RTC_CNTL_LOW_POWER_DIAG1  0xFFFFFFFF
+#define RTC_CNTL_LOW_POWER_DIAG1_M  ((RTC_CNTL_LOW_POWER_DIAG1_V)<<(RTC_CNTL_LOW_POWER_DIAG1_S))
+#define RTC_CNTL_LOW_POWER_DIAG1_V  0xFFFFFFFF
+#define RTC_CNTL_LOW_POWER_DIAG1_S  0
+
+#define RTC_CNTL_HOLD_FORCE_REG          (DR_REG_RTCCNTL_BASE + 0xc8)
+/* RTC_CNTL_X32N_HOLD_FORCE : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/*description: */
+#define RTC_CNTL_X32N_HOLD_FORCE  (BIT(17))
+#define RTC_CNTL_X32N_HOLD_FORCE_M  (BIT(17))
+#define RTC_CNTL_X32N_HOLD_FORCE_V  0x1
+#define RTC_CNTL_X32N_HOLD_FORCE_S  17
+/* RTC_CNTL_X32P_HOLD_FORCE : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/*description: */
+#define RTC_CNTL_X32P_HOLD_FORCE  (BIT(16))
+#define RTC_CNTL_X32P_HOLD_FORCE_M  (BIT(16))
+#define RTC_CNTL_X32P_HOLD_FORCE_V  0x1
+#define RTC_CNTL_X32P_HOLD_FORCE_S  16
+/* RTC_CNTL_TOUCH_PAD7_HOLD_FORCE : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: */
+#define RTC_CNTL_TOUCH_PAD7_HOLD_FORCE  (BIT(15))
+#define RTC_CNTL_TOUCH_PAD7_HOLD_FORCE_M  (BIT(15))
+#define RTC_CNTL_TOUCH_PAD7_HOLD_FORCE_V  0x1
+#define RTC_CNTL_TOUCH_PAD7_HOLD_FORCE_S  15
+/* RTC_CNTL_TOUCH_PAD6_HOLD_FORCE : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/*description: */
+#define RTC_CNTL_TOUCH_PAD6_HOLD_FORCE  (BIT(14))
+#define RTC_CNTL_TOUCH_PAD6_HOLD_FORCE_M  (BIT(14))
+#define RTC_CNTL_TOUCH_PAD6_HOLD_FORCE_V  0x1
+#define RTC_CNTL_TOUCH_PAD6_HOLD_FORCE_S  14
+/* RTC_CNTL_TOUCH_PAD5_HOLD_FORCE : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/*description: */
+#define RTC_CNTL_TOUCH_PAD5_HOLD_FORCE  (BIT(13))
+#define RTC_CNTL_TOUCH_PAD5_HOLD_FORCE_M  (BIT(13))
+#define RTC_CNTL_TOUCH_PAD5_HOLD_FORCE_V  0x1
+#define RTC_CNTL_TOUCH_PAD5_HOLD_FORCE_S  13
+/* RTC_CNTL_TOUCH_PAD4_HOLD_FORCE : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/*description: */
+#define RTC_CNTL_TOUCH_PAD4_HOLD_FORCE  (BIT(12))
+#define RTC_CNTL_TOUCH_PAD4_HOLD_FORCE_M  (BIT(12))
+#define RTC_CNTL_TOUCH_PAD4_HOLD_FORCE_V  0x1
+#define RTC_CNTL_TOUCH_PAD4_HOLD_FORCE_S  12
+/* RTC_CNTL_TOUCH_PAD3_HOLD_FORCE : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/*description: */
+#define RTC_CNTL_TOUCH_PAD3_HOLD_FORCE  (BIT(11))
+#define RTC_CNTL_TOUCH_PAD3_HOLD_FORCE_M  (BIT(11))
+#define RTC_CNTL_TOUCH_PAD3_HOLD_FORCE_V  0x1
+#define RTC_CNTL_TOUCH_PAD3_HOLD_FORCE_S  11
+/* RTC_CNTL_TOUCH_PAD2_HOLD_FORCE : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/*description: */
+#define RTC_CNTL_TOUCH_PAD2_HOLD_FORCE  (BIT(10))
+#define RTC_CNTL_TOUCH_PAD2_HOLD_FORCE_M  (BIT(10))
+#define RTC_CNTL_TOUCH_PAD2_HOLD_FORCE_V  0x1
+#define RTC_CNTL_TOUCH_PAD2_HOLD_FORCE_S  10
+/* RTC_CNTL_TOUCH_PAD1_HOLD_FORCE : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/*description: */
+#define RTC_CNTL_TOUCH_PAD1_HOLD_FORCE  (BIT(9))
+#define RTC_CNTL_TOUCH_PAD1_HOLD_FORCE_M  (BIT(9))
+#define RTC_CNTL_TOUCH_PAD1_HOLD_FORCE_V  0x1
+#define RTC_CNTL_TOUCH_PAD1_HOLD_FORCE_S  9
+/* RTC_CNTL_TOUCH_PAD0_HOLD_FORCE : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/*description: */
+#define RTC_CNTL_TOUCH_PAD0_HOLD_FORCE  (BIT(8))
+#define RTC_CNTL_TOUCH_PAD0_HOLD_FORCE_M  (BIT(8))
+#define RTC_CNTL_TOUCH_PAD0_HOLD_FORCE_V  0x1
+#define RTC_CNTL_TOUCH_PAD0_HOLD_FORCE_S  8
+/* RTC_CNTL_SENSE4_HOLD_FORCE : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/*description: */
+#define RTC_CNTL_SENSE4_HOLD_FORCE  (BIT(7))
+#define RTC_CNTL_SENSE4_HOLD_FORCE_M  (BIT(7))
+#define RTC_CNTL_SENSE4_HOLD_FORCE_V  0x1
+#define RTC_CNTL_SENSE4_HOLD_FORCE_S  7
+/* RTC_CNTL_SENSE3_HOLD_FORCE : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/*description: */
+#define RTC_CNTL_SENSE3_HOLD_FORCE  (BIT(6))
+#define RTC_CNTL_SENSE3_HOLD_FORCE_M  (BIT(6))
+#define RTC_CNTL_SENSE3_HOLD_FORCE_V  0x1
+#define RTC_CNTL_SENSE3_HOLD_FORCE_S  6
+/* RTC_CNTL_SENSE2_HOLD_FORCE : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/*description: */
+#define RTC_CNTL_SENSE2_HOLD_FORCE  (BIT(5))
+#define RTC_CNTL_SENSE2_HOLD_FORCE_M  (BIT(5))
+#define RTC_CNTL_SENSE2_HOLD_FORCE_V  0x1
+#define RTC_CNTL_SENSE2_HOLD_FORCE_S  5
+/* RTC_CNTL_SENSE1_HOLD_FORCE : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/*description: */
+#define RTC_CNTL_SENSE1_HOLD_FORCE  (BIT(4))
+#define RTC_CNTL_SENSE1_HOLD_FORCE_M  (BIT(4))
+#define RTC_CNTL_SENSE1_HOLD_FORCE_V  0x1
+#define RTC_CNTL_SENSE1_HOLD_FORCE_S  4
+/* RTC_CNTL_PDAC2_HOLD_FORCE : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/*description: */
+#define RTC_CNTL_PDAC2_HOLD_FORCE  (BIT(3))
+#define RTC_CNTL_PDAC2_HOLD_FORCE_M  (BIT(3))
+#define RTC_CNTL_PDAC2_HOLD_FORCE_V  0x1
+#define RTC_CNTL_PDAC2_HOLD_FORCE_S  3
+/* RTC_CNTL_PDAC1_HOLD_FORCE : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/*description: */
+#define RTC_CNTL_PDAC1_HOLD_FORCE  (BIT(2))
+#define RTC_CNTL_PDAC1_HOLD_FORCE_M  (BIT(2))
+#define RTC_CNTL_PDAC1_HOLD_FORCE_V  0x1
+#define RTC_CNTL_PDAC1_HOLD_FORCE_S  2
+/* RTC_CNTL_ADC2_HOLD_FORCE : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/*description: */
+#define RTC_CNTL_ADC2_HOLD_FORCE  (BIT(1))
+#define RTC_CNTL_ADC2_HOLD_FORCE_M  (BIT(1))
+#define RTC_CNTL_ADC2_HOLD_FORCE_V  0x1
+#define RTC_CNTL_ADC2_HOLD_FORCE_S  1
+/* RTC_CNTL_ADC1_HOLD_FORCE : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/*description: */
+#define RTC_CNTL_ADC1_HOLD_FORCE  (BIT(0))
+#define RTC_CNTL_ADC1_HOLD_FORCE_M  (BIT(0))
+#define RTC_CNTL_ADC1_HOLD_FORCE_V  0x1
+#define RTC_CNTL_ADC1_HOLD_FORCE_S  0
+
+#define RTC_CNTL_EXT_WAKEUP1_REG          (DR_REG_RTCCNTL_BASE + 0xcc)
+/* RTC_CNTL_EXT_WAKEUP1_STATUS_CLR : WO ;bitpos:[18] ;default: 1'd0 ; */
+/*description: clear ext wakeup1 status*/
+#define RTC_CNTL_EXT_WAKEUP1_STATUS_CLR  (BIT(18))
+#define RTC_CNTL_EXT_WAKEUP1_STATUS_CLR_M  (BIT(18))
+#define RTC_CNTL_EXT_WAKEUP1_STATUS_CLR_V  0x1
+#define RTC_CNTL_EXT_WAKEUP1_STATUS_CLR_S  18
+/* RTC_CNTL_EXT_WAKEUP1_SEL : R/W ;bitpos:[17:0] ;default: 18'd0 ; */
+/*description: Bitmap to select RTC pads for ext wakeup1*/
+#define RTC_CNTL_EXT_WAKEUP1_SEL  0x0003FFFF
+#define RTC_CNTL_EXT_WAKEUP1_SEL_M  ((RTC_CNTL_EXT_WAKEUP1_SEL_V)<<(RTC_CNTL_EXT_WAKEUP1_SEL_S))
+#define RTC_CNTL_EXT_WAKEUP1_SEL_V  0x3FFFF
+#define RTC_CNTL_EXT_WAKEUP1_SEL_S  0
+
+#define RTC_CNTL_EXT_WAKEUP1_STATUS_REG          (DR_REG_RTCCNTL_BASE + 0xd0)
+/* RTC_CNTL_EXT_WAKEUP1_STATUS : RO ;bitpos:[17:0] ;default: 18'd0 ; */
+/*description: ext wakeup1 status*/
+#define RTC_CNTL_EXT_WAKEUP1_STATUS  0x0003FFFF
+#define RTC_CNTL_EXT_WAKEUP1_STATUS_M  ((RTC_CNTL_EXT_WAKEUP1_STATUS_V)<<(RTC_CNTL_EXT_WAKEUP1_STATUS_S))
+#define RTC_CNTL_EXT_WAKEUP1_STATUS_V  0x3FFFF
+#define RTC_CNTL_EXT_WAKEUP1_STATUS_S  0
+
+#define RTC_CNTL_BROWN_OUT_REG          (DR_REG_RTCCNTL_BASE + 0xd4)
+/* RTC_CNTL_BROWN_OUT_DET : RO ;bitpos:[31] ;default: 1'b0 ; */
+/*description: brown out detect*/
+#define RTC_CNTL_BROWN_OUT_DET  (BIT(31))
+#define RTC_CNTL_BROWN_OUT_DET_M  (BIT(31))
+#define RTC_CNTL_BROWN_OUT_DET_V  0x1
+#define RTC_CNTL_BROWN_OUT_DET_S  31
+/* RTC_CNTL_BROWN_OUT_ENA : R/W ;bitpos:[30] ;default: 1'b0 ; */
+/*description: enable brown out*/
+#define RTC_CNTL_BROWN_OUT_ENA  (BIT(30))
+#define RTC_CNTL_BROWN_OUT_ENA_M  (BIT(30))
+#define RTC_CNTL_BROWN_OUT_ENA_V  0x1
+#define RTC_CNTL_BROWN_OUT_ENA_S  30
+/* RTC_CNTL_DBROWN_OUT_THRES : R/W ;bitpos:[29:27] ;default: 3'b010 ; */
+/*description: brown out threshold*/
+#define RTC_CNTL_DBROWN_OUT_THRES  0x00000007
+#define RTC_CNTL_DBROWN_OUT_THRES_M  ((RTC_CNTL_DBROWN_OUT_THRES_V)<<(RTC_CNTL_DBROWN_OUT_THRES_S))
+#define RTC_CNTL_DBROWN_OUT_THRES_V  0x7
+#define RTC_CNTL_DBROWN_OUT_THRES_S  27
+/* RTC_CNTL_BROWN_OUT_RST_ENA : R/W ;bitpos:[26] ;default: 1'b0 ; */
+/*description: enable brown out reset*/
+#define RTC_CNTL_BROWN_OUT_RST_ENA  (BIT(26))
+#define RTC_CNTL_BROWN_OUT_RST_ENA_M  (BIT(26))
+#define RTC_CNTL_BROWN_OUT_RST_ENA_V  0x1
+#define RTC_CNTL_BROWN_OUT_RST_ENA_S  26
+/* RTC_CNTL_BROWN_OUT_RST_WAIT : R/W ;bitpos:[25:16] ;default: 10'h3ff ; */
+/*description: brown out reset wait cycles*/
+#define RTC_CNTL_BROWN_OUT_RST_WAIT  0x000003FF
+#define RTC_CNTL_BROWN_OUT_RST_WAIT_M  ((RTC_CNTL_BROWN_OUT_RST_WAIT_V)<<(RTC_CNTL_BROWN_OUT_RST_WAIT_S))
+#define RTC_CNTL_BROWN_OUT_RST_WAIT_V  0x3FF
+#define RTC_CNTL_BROWN_OUT_RST_WAIT_S  16
+/* RTC_CNTL_BROWN_OUT_PD_RF_ENA : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/*description: enable power down RF when brown out happens*/
+#define RTC_CNTL_BROWN_OUT_PD_RF_ENA  (BIT(15))
+#define RTC_CNTL_BROWN_OUT_PD_RF_ENA_M  (BIT(15))
+#define RTC_CNTL_BROWN_OUT_PD_RF_ENA_V  0x1
+#define RTC_CNTL_BROWN_OUT_PD_RF_ENA_S  15
+/* RTC_CNTL_BROWN_OUT_CLOSE_FLASH_ENA : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/*description: enable close flash when brown out happens*/
+#define RTC_CNTL_BROWN_OUT_CLOSE_FLASH_ENA  (BIT(14))
+#define RTC_CNTL_BROWN_OUT_CLOSE_FLASH_ENA_M  (BIT(14))
+#define RTC_CNTL_BROWN_OUT_CLOSE_FLASH_ENA_V  0x1
+#define RTC_CNTL_BROWN_OUT_CLOSE_FLASH_ENA_S  14
+
+#define RTC_MEM_CONF            (DR_REG_RTCCNTL_BASE + 0x40 * 4)
+#define RTC_MEM_CRC_FINISH      (BIT(31))
+#define RTC_MEM_CRC_FINISH_M    (BIT(31))
+#define RTC_MEM_CRC_FINISH_V    0x1
+#define RTC_MEM_CRC_FINISH_S    (31)
+#define RTC_MEM_CRC_LEN         (0x7ff)
+#define RTC_MEM_CRC_LEN_M       ((RTC_MEM_CRC_LEN_V)<<(RTC_MEM_CRC_LEN_S))
+#define RTC_MEM_CRC_LEN_V       (0x7ff)
+#define RTC_MEM_CRC_LEN_S       (20)
+#define RTC_MEM_CRC_ADDR        (0x7ff)
+#define RTC_MEM_CRC_ADDR_M      ((RTC_MEM_CRC_ADDR_V)<<(RTC_MEM_CRC_ADDR_S))
+#define RTC_MEM_CRC_ADDR_V      (0x7ff)
+#define RTC_MEM_CRC_ADDR_S      (9)
+#define RTC_MEM_CRC_START       (BIT(8))
+#define RTC_MEM_CRC_START_M     (BIT(8))
+#define RTC_MEM_CRC_START_V     0x1
+#define RTC_MEM_CRC_START_S     (8)
+#define RTC_MEM_PID_CONF        (0xff)
+#define RTC_MEM_PID_CONF_M      (0xff)
+#define RTC_MEM_PID_CONF_V      (0xff)
+#define RTC_MEM_PID_CONF_S      (0)
+
+#define RTC_MEM_CRC_RES         (DR_REG_RTCCNTL_BASE + 0x41 * 4)
+
+#define RTC_CNTL_DATE_REG          (DR_REG_RTCCNTL_BASE + 0x13c)
+/* RTC_CNTL_CNTL_DATE : R/W ;bitpos:[27:0] ;default: 28'h1604280 ; */
+/*description: */
+#define RTC_CNTL_CNTL_DATE  0x0FFFFFFF
+#define RTC_CNTL_CNTL_DATE_M  ((RTC_CNTL_CNTL_DATE_V)<<(RTC_CNTL_CNTL_DATE_S))
+#define RTC_CNTL_CNTL_DATE_V  0xFFFFFFF
+#define RTC_CNTL_CNTL_DATE_S  0
+#define RTC_CNTL_RTC_CNTL_DATE_VERSION 0x1604280
+
+#endif /*__ARCH_XTENSA_SRC_ESP32_CHIP_XTENSA_ESP32_H */
diff --git a/arch/xtensa/src/esp32/chip/esp32_soc.h b/arch/xtensa/src/esp32/chip/esp32_soc.h
new file mode 100644
index 0000000000000000000000000000000000000000..0073508ab6aaf7b2c00df0dc1aec4435dc724cb7
--- /dev/null
+++ b/arch/xtensa/src/esp32/chip/esp32_soc.h
@@ -0,0 +1,357 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/chip/esp32_soc.h
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from logic originally provided by Espressif Systems:
+ *
+ *   Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_SOC_H
+#define __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_SOC_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Register Bits */
+
+#define BIT31   0x80000000
+#define BIT30   0x40000000
+#define BIT29   0x20000000
+#define BIT28   0x10000000
+#define BIT27   0x08000000
+#define BIT26   0x04000000
+#define BIT25   0x02000000
+#define BIT24   0x01000000
+#define BIT23   0x00800000
+#define BIT22   0x00400000
+#define BIT21   0x00200000
+#define BIT20   0x00100000
+#define BIT19   0x00080000
+#define BIT18   0x00040000
+#define BIT17   0x00020000
+#define BIT16   0x00010000
+#define BIT15   0x00008000
+#define BIT14   0x00004000
+#define BIT13   0x00002000
+#define BIT12   0x00001000
+#define BIT11   0x00000800
+#define BIT10   0x00000400
+#define BIT9     0x00000200
+#define BIT8     0x00000100
+#define BIT7     0x00000080
+#define BIT6     0x00000040
+#define BIT5     0x00000020
+#define BIT4     0x00000010
+#define BIT3     0x00000008
+#define BIT2     0x00000004
+#define BIT1     0x00000002
+#define BIT0     0x00000001
+
+#define PRO_CPU_NUM (0)
+#define APP_CPU_NUM (1)
+
+/* Registers Operation */
+
+#define ETS_UNCACHED_ADDR(addr) (addr)
+#define ETS_CACHED_ADDR(addr) (addr)
+
+#define BIT(nr)                 (1UL << (nr))
+
+/* Write value to register */
+
+#define REG_WRITE(_r, _v)    (*(volatile uint32_t *)(_r)) = (_v)
+
+/* Read value from register */
+
+#define REG_READ(_r) (*(volatile uint32_t *)(_r))
+
+/* Get bit or get bits from register */
+
+#define REG_GET_BIT(_r, _b)  (*(volatile uint32_t*)(_r) & (_b))
+
+/* Set bit or set bits to register */
+
+#define REG_SET_BIT(_r, _b)  (*(volatile uint32_t*)(_r) |= (_b))
+
+/* Clear bit or clear bits of register */
+
+#define REG_CLR_BIT(_r, _b)  (*(volatile uint32_t*)(_r) &= ~(_b))
+
+/* Set bits of register controlled by mask */
+
+#define REG_SET_BITS(_r, _b, _m) (*(volatile uint32_t*)(_r) = (*(volatile uint32_t*)(_r) & ~(_m)) | ((_b) & (_m)))
+
+/* Get field from register, used when _f is not left shifted by _f##_S */
+
+#define REG_GET_FIELD(_r, _f) ((REG_READ(_r) >> (_f##_S)) & (_f))
+
+/* Set field to register, used when _f is not left shifted by _f##_S */
+
+#define REG_SET_FIELD(_r, _f, _v) (REG_WRITE((_r),((REG_READ(_r) & ~((_f) << (_f##_S)))|(((_v) & (_f))<<(_f##_S)))))
+
+/* Set field value from a variable, used when _f is not left shifted by _f##_S */
+
+#define VALUE_GET_FIELD(_r, _f) (((_r) >> (_f##_S)) & (_f))
+
+/* Get field value from a variable, used when _f is left shifted by _f##_S */
+
+#define VALUE_GET_FIELD2(_r, _f) (((_r) & (_f))>> (_f##_S))
+
+/* Set field value to a variable, used when _f is not left shifted by _f##_S */
+
+#define VALUE_SET_FIELD(_r, _f, _v) ((_r)=(((_r) & ~((_f) << (_f##_S)))|((_v)<<(_f##_S))))
+
+/* Set field value to a variable, used when _f is left shifted by _f##_S */
+
+#define VALUE_SET_FIELD2(_r, _f, _v) ((_r)=(((_r) & ~(_f))|((_v)<<(_f##_S))))
+
+/* Generate a value from a field value, used when _f is not left shifted by _f##_S */
+
+#define FIELD_TO_VALUE(_f, _v) (((_v)&(_f))<<_f##_S)
+
+/* Generate a value from a field value, used when _f is left shifted by _f##_S */
+
+#define FIELD_TO_VALUE2(_f, _v) (((_v)<<_f##_S) & (_f))
+
+/* Read value from register */
+
+#define READ_PERI_REG(addr) (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr)))
+
+/* Write value to register */
+
+#define WRITE_PERI_REG(addr, val) (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr))) = (uint32_t)(val)
+
+/* Clear bits of register controlled by mask */
+
+#define CLEAR_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask))))
+
+/* Set bits of register controlled by mask */
+
+#define SET_PERI_REG_MASK(reg, mask)   WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask))) */
+
+/* Get bits of register controlled by mask */
+
+#define GET_PERI_REG_MASK(reg, mask)   (READ_PERI_REG(reg) & (mask))
+
+/* Get bits of register controlled by highest bit and lowest bit */
+
+#define GET_PERI_REG_BITS(reg, hipos,lowpos)      ((READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1))
+
+/* Set bits of register controlled by mask and shift */
+
+#define SET_PERI_REG_BITS(reg,bit_map,value,shift) (WRITE_PERI_REG((reg),(READ_PERI_REG(reg)&(~((bit_map)<<(shift))))|(((value) & bit_map)<<(shift)) ))
+
+/* Get field of register */
+
+#define GET_PERI_REG_BITS2(reg, mask,shift)      ((READ_PERI_REG(reg)>>(shift))&(mask))
+
+/* Periheral Clock */
+
+#define APB_CLK_FREQ_ROM                        26*1000000
+#define CPU_CLK_FREQ_ROM                        APB_CLK_FREQ_ROM
+#define CPU_CLK_FREQ                            APB_CLK_FREQ
+#define APB_CLK_FREQ                            80*1000000       /* Unit: Hz */
+#define UART_CLK_FREQ                           APB_CLK_FREQ
+#define WDT_CLK_FREQ                            APB_CLK_FREQ
+#define TIMER_CLK_FREQ                          (80000000>>4)    /* 80MHz divided by 16 */
+#define SPI_CLK_DIV                             4
+#define TICKS_PER_US_ROM                        26               /* CPU is 80MHz */
+
+#define DR_REG_DPORT_BASE                       0x3ff00000
+#define DR_REG_UART_BASE                        0x3ff40000
+#define DR_REG_SPI1_BASE                        0x3ff42000
+#define DR_REG_SPI0_BASE                        0x3ff43000
+#define DR_REG_GPIO_BASE                        0x3ff44000
+#define DR_REG_GPIO_SD_BASE                     0x3ff44f00
+#define DR_REG_FE2_BASE                         0x3ff45000
+#define DR_REG_FE_BASE                          0x3ff46000
+#define DR_REG_RTCCNTL_BASE                     0x3ff48000
+#define DR_REG_RTCIO_BASE                       0x3ff48400
+#define DR_REG_SARADC_BASE                      0x3ff48800
+#define DR_REG_IO_MUX_BASE                      0x3ff49000
+#define DR_REG_RTCMEM0_BASE                     0x3ff61000
+#define DR_REG_RTCMEM1_BASE                     0x3ff62000
+#define DR_REG_RTCMEM2_BASE                     0x3ff63000
+#define DR_REG_HINF_BASE                        0x3ff4B000
+#define DR_REG_UHCI1_BASE                       0x3ff4C000
+#define DR_REG_I2S_BASE                         0x3ff4F000
+#define DR_REG_UART1_BASE                       0x3ff50000
+#define DR_REG_BT_BASE                          0x3ff51000
+#define DR_REG_I2C_EXT_BASE                     0x3ff53000
+#define DR_REG_UHCI0_BASE                       0x3ff54000
+#define DR_REG_SLCHOST_BASE                     0x3ff55000
+#define DR_REG_RMT_BASE                         0x3ff56000
+#define DR_REG_PCNT_BASE                        0x3ff57000
+#define DR_REG_SLC_BASE                         0x3ff58000
+#define DR_REG_LEDC_BASE                        0x3ff59000
+#define DR_REG_EFUSE_BASE                       0x3ff5A000
+#define DR_REG_SPI_ENCRYPT_BASE                 0x3ff5B000
+#define DR_REG_PWM_BASE                         0x3ff5E000
+#define DR_REG_TIMERGROUP0_BASE                 0x3ff5F000
+#define DR_REG_TIMERGROUP1_BASE                 0x3ff60000
+#define DR_REG_SPI2_BASE                        0x3ff64000
+#define DR_REG_SPI3_BASE                        0x3ff65000
+#define DR_REG_I2C1_EXT_BASE                    0x3ff67000
+#define DR_REG_SDMMC_BASE                       0x3ff68000
+#define DR_REG_EMAC_BASE                        0x3ff69000
+#define DR_REG_PWM1_BASE                        0x3ff6C000
+#define DR_REG_I2S1_BASE                        0x3ff6D000
+#define DR_REG_UART2_BASE                       0x3ff6E000
+#define DR_REG_PWM2_BASE                        0x3ff6F000
+#define DR_REG_PWM3_BASE                        0x3ff70000
+#define PERIPHS_SPI_ENCRYPT_BASEADDR            DR_REG_SPI_ENCRYPT_BASE
+
+/* Interrupt hardware source table
+ * This table is decided by hardware, don't touch this.
+ */
+
+#define ETS_WIFI_MAC_INTR_SOURCE                0  /* Interrupt of WiFi MAC, level */
+#define ETS_WIFI_MAC_NMI_SOURCE                 1  /* Interrupt of WiFi MAC, NMI, use if MAC have bug to fix in NMI */
+#define ETS_WIFI_BB_INTR_SOURCE                 2  /* Interrupt of WiFi BB, level, we can do some calibartion */
+#define ETS_BT_MAC_INTR_SOURCE                  3  /* will be cancelled */
+#define ETS_BT_BB_INTR_SOURCE                   4  /* Interrupt of BT BB, level */
+#define ETS_BT_BB_NMI_SOURCE                    5  /* Interrupt of BT BB, NMI, use if BB have bug to fix in NMI */
+#define ETS_RWBT_INTR_SOURCE                    6  /* Interrupt of RWBT, level */
+#define ETS_RWBLE_INTR_SOURCE                   7  /* Interrupt of RWBLE, level */
+#define ETS_RWBT_NMI_SOURCE                     8  /* Interrupt of RWBT, NMI, use if RWBT have bug to fix in NMI */
+#define ETS_RWBLE_NMI_SOURCE                    9  /* Interrupt of RWBLE, NMI, use if RWBT have bug to fix in NMI */
+#define ETS_SLC0_INTR_SOURCE                    10 /* Interrupt of SLC0, level */
+#define ETS_SLC1_INTR_SOURCE                    11 /* Interrupt of SLC1, level */
+#define ETS_UHCI0_INTR_SOURCE                   12 /* Interrupt of UHCI0, level */
+#define ETS_UHCI1_INTR_SOURCE                   13 /* Interrupt of UHCI1, level */
+#define ETS_TG0_T0_LEVEL_INTR_SOURCE            14 /* Interrupt of TIMER_GROUP0, TIMER0, level, we would like use EDGE for timer if permission */
+#define ETS_TG0_T1_LEVEL_INTR_SOURCE            15 /* Interrupt of TIMER_GROUP0, TIMER1, level, we would like use EDGE for timer if permission */
+#define ETS_TG0_WDT_LEVEL_INTR_SOURCE           16 /* Interrupt of TIMER_GROUP0, WATCHDOG, level */
+#define ETS_TG0_LACT_LEVEL_INTR_SOURCE          17 /* Interrupt of TIMER_GROUP0, LACT, level */
+#define ETS_TG1_T0_LEVEL_INTR_SOURCE            18 /* Interrupt of TIMER_GROUP1, TIMER0, level, we would like use EDGE for timer if permission */
+#define ETS_TG1_T1_LEVEL_INTR_SOURCE            19 /* Interrupt of TIMER_GROUP1, TIMER1, level, we would like use EDGE for timer if permission */
+#define ETS_TG1_WDT_LEVEL_INTR_SOURCE           20 /* Interrupt of TIMER_GROUP1, WATCHDOG, level */
+#define ETS_TG1_LACT_LEVEL_INTR_SOURCE          21 /* Interrupt of TIMER_GROUP1, LACT, level */
+#define ETS_GPIO_INTR_SOURCE                    22 /* Interrupt of GPIO, level */
+#define ETS_GPIO_NMI_SOURCE                     23 /* Interrupt of GPIO, NMI */
+#define ETS_FROM_CPU_INTR0_SOURCE               24 /* Interrupt0 generated from a CPU, level */
+#define ETS_FROM_CPU_INTR1_SOURCE               25 /* Interrupt1 generated from a CPU, level */
+#define ETS_FROM_CPU_INTR2_SOURCE               26 /* Interrupt2 generated from a CPU, level */
+#define ETS_FROM_CPU_INTR3_SOURCE               27 /* Interrupt3 generated from a CPU, level */
+#define ETS_SPI0_INTR_SOURCE                    28 /* Interrupt of SPI0, level, SPI0 is for Cache Access, do not use this */
+#define ETS_SPI1_INTR_SOURCE                    29 /* Interrupt of SPI1, level, SPI1 is for flash read/write, do not use this */
+#define ETS_SPI2_INTR_SOURCE                    30 /* Interrupt of SPI2, level */
+#define ETS_SPI3_INTR_SOURCE                    31 /* Interrupt of SPI3, level */
+#define ETS_I2S0_INTR_SOURCE                    32 /* Interrupt of I2S0, level */
+#define ETS_I2S1_INTR_SOURCE                    33 /* Interrupt of I2S1, level */
+#define ETS_UART0_INTR_SOURCE                   34 /* Interrupt of UART0, level */
+#define ETS_UART1_INTR_SOURCE                   35 /* Interrupt of UART1, level */
+#define ETS_UART2_INTR_SOURCE                   36 /* Interrupt of UART2, level */
+#define ETS_SDIO_HOST_INTR_SOURCE               37 /* Interrupt of SD/SDIO/MMC HOST, level */
+#define ETS_ETH_MAC_INTR_SOURCE                 38 /* Interrupt of ethernet mac, level */
+#define ETS_PWM0_INTR_SOURCE                    39 /* Interrupt of PWM0, level, Reserved */
+#define ETS_PWM1_INTR_SOURCE                    40 /* Interrupt of PWM1, level, Reserved */
+#define ETS_PWM2_INTR_SOURCE                    41 /* Interrupt of PWM2, level */
+#define ETS_PWM3_INTR_SOURCE                    42 /* Interruot of PWM3, level */
+#define ETS_LEDC_INTR_SOURCE                    43 /* Interrupt of LED PWM, level */
+#define ETS_EFUSE_INTR_SOURCE                   44 /* Interrupt of efuse, level, not likely to use */
+#define ETS_CAN_INTR_SOURCE                     45 /* Interrupt of can, level */
+#define ETS_RTC_CORE_INTR_SOURCE                46 /* Interrupt of rtc core, level, include rtc watchdog */
+#define ETS_RMT_INTR_SOURCE                     47 /* Interrupt of remote controller, level */
+#define ETS_PCNT_INTR_SOURCE                    48 /* Interrupt of pluse count, level */
+#define ETS_I2C_EXT0_INTR_SOURCE                49 /* Interrupt of I2C controller1, level */
+#define ETS_I2C_EXT1_INTR_SOURCE                50 /* Interrupt of I2C controller0, level */
+#define ETS_RSA_INTR_SOURCE                     51 /* Interrupt of RSA accelerator, level */
+#define ETS_SPI1_DMA_INTR_SOURCE                52 /* Interrupt of SPI1 DMA, SPI1 is for flash read/write, do not use this */
+#define ETS_SPI2_DMA_INTR_SOURCE                53 /* Interrupt of SPI2 DMA, level */
+#define ETS_SPI3_DMA_INTR_SOURCE                54 /* Interrupt of SPI3 DMA, level */
+#define ETS_WDT_INTR_SOURCE                     55 /* will be cancelled */
+#define ETS_TIMER1_INTR_SOURCE                  56 /* will be cancelled */
+#define ETS_TIMER2_INTR_SOURCE                  57 /* will be cancelled */
+#define ETS_TG0_T0_EDGE_INTR_SOURCE             58 /* Interrupt of TIMER_GROUP0, TIMER0, EDGE */
+#define ETS_TG0_T1_EDGE_INTR_SOURCE             59 /* Interrupt of TIMER_GROUP0, TIMER1, EDGE */
+#define ETS_TG0_WDT_EDGE_INTR_SOURCE            60 /* Interrupt of TIMER_GROUP0, WATCH DOG, EDGE */
+#define ETS_TG0_LACT_EDGE_INTR_SOURCE           61 /* Interrupt of TIMER_GROUP0, LACT, EDGE */
+#define ETS_TG1_T0_EDGE_INTR_SOURCE             62 /* Interrupt of TIMER_GROUP1, TIMER0, EDGE */
+#define ETS_TG1_T1_EDGE_INTR_SOURCE             63 /* Interrupt of TIMER_GROUP1, TIMER1, EDGE */
+#define ETS_TG1_WDT_EDGE_INTR_SOURCE            64 /* Interrupt of TIMER_GROUP1, WATCHDOG, EDGE */
+#define ETS_TG1_LACT_EDGE_INTR_SOURCE           65 /* Interrupt of TIMER_GROUP0, LACT, EDGE */
+#define ETS_MMU_IA_INTR_SOURCE                  66 /* Interrupt of MMU Invalid Access, LEVEL */
+#define ETS_MPU_IA_INTR_SOURCE                  67 /* Interrupt of MPU Invalid Access, LEVEL */
+#define ETS_CACHE_IA_INTR_SOURCE                68 /* Interrupt of Cache Invalied Access, LEVEL */
+
+/* Interrupt cpu using table */
+/*************************************************************************************************************
+ *      Intr num                Level           Type                    PRO CPU usage           APP CPU uasge
+ *      0                       1               extern level            WMAC                    Reserved
+ *      1                       1               extern level            BT/BLE Host VHCI        Reserved
+ *      2                       1               extern level            FROM_CPU                FROM_CPU
+ *      3                       1               extern level            TG0_WDT                 Reserved
+ *      4                       1               extern level            WBB
+ *      5                       1               extern level            BT Controller
+ *      6                       1               timer                   RTOS Tick               RTOS Tick
+ *      7                       1               software                Reserved                Reserved
+ *      8                       1               extern level            BLE Controller
+ *      9                       1               extern level
+ *      10                      1               extern edge             Internal Timer
+ *      11                      3               profiling
+ *      12                      1               extern level
+ *      13                      1               extern level
+ *      14                      7               nmi                     Reserved                Reserved
+ *      15                      3               timer                   Internal Timer
+ *      16                      5               timer
+ *      17                      1               extern level
+ *      18                      1               extern level
+ *      19                      2               extern level
+ *      20                      2               extern level
+ *      21                      2               extern level
+ *      22                      3               extern edge
+ *      23                      3               extern level
+ *      24                      4               extern level
+ *      25                      4               extern level            Reserved                Reserved
+ *      26                      5               extern level            Reserved                Reserved
+ *      27                      3               extern level            Reserved                Reserved
+ *      28                      4               extern edge
+ *      29                      3               software                Reserved                Reserved
+ *      30                      4               extern edge             Reserved                Reserved
+ *      31                      5               extern level            Reserved                Reserved
+ *************************************************************************************************************/
+
+/* CPU0 Interrupt number reserved, not touch this. */
+
+#define ETS_WMAC_INUM                           0
+#define ETS_BT_HOST_INUM                        1
+#define ETS_FROM_CPU_INUM                       2
+#define ETS_T0_WDT_INUM                         3
+#define ETS_WBB_INUM                            4
+#define ETS_TG0_T1_INUM                         10 /* Use edge interrupt */
+
+/* CPU0 Intrrupt number used in ROM, should be cancelled in SDK */
+
+#define ETS_SLC_INUM                            1
+#define ETS_UART0_INUM                          5
+#define ETS_UART1_INUM                          5
+
+/* Other interrupt numbers should be managed by the user */
+
+#endif /* __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_SOC_H */
diff --git a/arch/xtensa/src/esp32/chip/esp32_uart.h b/arch/xtensa/src/esp32/chip/esp32_uart.h
new file mode 100644
index 0000000000000000000000000000000000000000..0e248a4ea9df5b07755641cd04ecf336a9210769
--- /dev/null
+++ b/arch/xtensa/src/esp32/chip/esp32_uart.h
@@ -0,0 +1,1698 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/chip/esp32_uart.h
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from logic originally provided by Espressif Systems:
+ *
+ *   Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_UART_H
+#define __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_UART_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include "chip/esp32_soc.h"
+
+/****************************************************************************
+ * Pre-processor Macros
+ ****************************************************************************/
+
+#define REG_UART_BASE(i)                 (DR_REG_UART_BASE + (i) * 0x10000 + (i > 1 ? 0xe000 : 0))
+
+#define UART_FIFO_OFFSET                 0x00
+#define UART_FIFO_REG(i)                 (REG_UART_BASE(i) + UART_FIFO_OFFSET)
+
+/* UART_RXFIFO_RD_BYTE : RO ;bitpos:[7:0] ;default: 8'b0 ; */
+/* Description: This register stores one byte data read by rx fifo.*/
+
+#define UART_RXFIFO_RD_BYTE              0x000000FF
+#define UART_RXFIFO_RD_BYTE_M            ((UART_RXFIFO_RD_BYTE_V) << (UART_RXFIFO_RD_BYTE_S))
+#define UART_RXFIFO_RD_BYTE_V            0xFF
+#define UART_RXFIFO_RD_BYTE_S            0
+
+#define UART_INT_RAW_OFFSET              0x04
+#define UART_INT_RAW_REG(i)              (REG_UART_BASE(i) + UART_INT_RAW_OFFSET)
+
+/* UART_AT_CMD_CHAR_DET_INT_RAW : RO ;bitpos:[18] ;default: 1'b0 ; */
+/* Description: This interrupt raw bit turns to high level when receiver
+ * detects the configured at_cmd chars.
+ */
+
+#define UART_AT_CMD_CHAR_DET_INT_RAW     (BIT(18))
+#define UART_AT_CMD_CHAR_DET_INT_RAW_M   (BIT(18))
+#define UART_AT_CMD_CHAR_DET_INT_RAW_V   0x1
+#define UART_AT_CMD_CHAR_DET_INT_RAW_S   18
+
+/* UART_RS485_CLASH_INT_RAW : RO ;bitpos:[17] ;default: 1'b0 ; */
+/* Description: This interrupt raw bit turns to high level when rs485 detects
+ * the clash between transmitter and receiver.
+ */
+
+#define UART_RS485_CLASH_INT_RAW        (BIT(17))
+#define UART_RS485_CLASH_INT_RAW_M      (BIT(17))
+#define UART_RS485_CLASH_INT_RAW_V      0x1
+#define UART_RS485_CLASH_INT_RAW_S      17
+
+/* UART_RS485_FRM_ERR_INT_RAW : RO ;bitpos:[16] ;default: 1'b0 ; */
+/* Description: This interrupt raw bit turns to high level when rs485 detects
+ * the data frame error.
+ */
+
+#define UART_RS485_FRM_ERR_INT_RAW      (BIT(16))
+#define UART_RS485_FRM_ERR_INT_RAW_M    (BIT(16))
+#define UART_RS485_FRM_ERR_INT_RAW_V    0x1
+#define UART_RS485_FRM_ERR_INT_RAW_S    16
+
+/* UART_RS485_PARITY_ERR_INT_RAW : RO ;bitpos:[15] ;default: 1'b0 ; */
+/* Description: This interrupt raw bit turns to high level when rs485
+ * detects the parity error.
+ */
+
+#define UART_RS485_PARITY_ERR_INT_RAW   (BIT(15))
+#define UART_RS485_PARITY_ERR_INT_RAW_M (BIT(15))
+#define UART_RS485_PARITY_ERR_INT_RAW_V 0x1
+#define UART_RS485_PARITY_ERR_INT_RAW_S 15
+
+/* UART_TX_DONE_INT_RAW : RO ;bitpos:[14] ;default: 1'b0 ; */
+/* Description: This interrupt raw bit turns to high level when transmitter
+ * has send all the data in fifo.
+ */
+
+#define UART_TX_DONE_INT_RAW            (BIT(14))
+#define UART_TX_DONE_INT_RAW_M          (BIT(14))
+#define UART_TX_DONE_INT_RAW_V          0x1
+#define UART_TX_DONE_INT_RAW_S          14
+
+/* UART_TX_BRK_IDLE_DONE_INT_RAW : RO ;bitpos:[13] ;default: 1'b0 ; */
+/* Description: This interrupt raw bit turns to high level when transmitter
+ * has kept the shortest duration after the  last data has been send.
+ */
+
+#define UART_TX_BRK_IDLE_DONE_INT_RAW   (BIT(13))
+#define UART_TX_BRK_IDLE_DONE_INT_RAW_M (BIT(13))
+#define UART_TX_BRK_IDLE_DONE_INT_RAW_V 0x1
+#define UART_TX_BRK_IDLE_DONE_INT_RAW_S 13
+
+/* UART_TX_BRK_DONE_INT_RAW : RO ;bitpos:[12] ;default: 1'b0 ; */
+/* Description: This interrupt raw bit turns to high level when transmitter
+ * completes sending  0 after all the datas in transmitter's fifo are send.
+ */
+
+#define UART_TX_BRK_DONE_INT_RAW        (BIT(12))
+#define UART_TX_BRK_DONE_INT_RAW_M      (BIT(12))
+#define UART_TX_BRK_DONE_INT_RAW_V      0x1
+#define UART_TX_BRK_DONE_INT_RAW_S      12
+
+/* UART_GLITCH_DET_INT_RAW : RO ;bitpos:[11] ;default: 1'b0 ; */
+/* Description: This interrupt raw bit turns to high level when receiver
+ * detects the start bit.
+ */
+
+#define UART_GLITCH_DET_INT_RAW         (BIT(11))
+#define UART_GLITCH_DET_INT_RAW_M       (BIT(11))
+#define UART_GLITCH_DET_INT_RAW_V       0x1
+#define UART_GLITCH_DET_INT_RAW_S       11
+
+/* UART_SW_XOFF_INT_RAW : RO ;bitpos:[10] ;default: 1'b0 ; */
+/* Description: This interrupt raw bit turns to high level when receiver
+ * receives xon char with uart_sw_flow_con_en is set to 1.
+ */
+
+#define UART_SW_XOFF_INT_RAW            (BIT(10))
+#define UART_SW_XOFF_INT_RAW_M          (BIT(10))
+#define UART_SW_XOFF_INT_RAW_V          0x1
+#define UART_SW_XOFF_INT_RAW_S          10
+
+/* UART_SW_XON_INT_RAW : RO ;bitpos:[9] ;default: 1'b0 ; */
+/* Description: This interrupt raw bit turns to high level when receiver
+ * receives xoff char with uart_sw_flow_con_en is set to 1.
+ */
+
+#define UART_SW_XON_INT_RAW             (BIT(9))
+#define UART_SW_XON_INT_RAW_M           (BIT(9))
+#define UART_SW_XON_INT_RAW_V           0x1
+#define UART_SW_XON_INT_RAW_S           9
+
+/* UART_RXFIFO_TOUT_INT_RAW : RO ;bitpos:[8] ;default: 1'b0 ; */
+/* Description: This interrupt raw bit turns to high level when receiver
+ * takes more time than rx_tout_thrhd to receive a byte.
+ */
+
+#define UART_RXFIFO_TOUT_INT_RAW        (BIT(8))
+#define UART_RXFIFO_TOUT_INT_RAW_M      (BIT(8))
+#define UART_RXFIFO_TOUT_INT_RAW_V      0x1
+#define UART_RXFIFO_TOUT_INT_RAW_S      8
+
+/* UART_BRK_DET_INT_RAW : RO ;bitpos:[7] ;default: 1'b0 ; */
+/* Description: This interrupt raw bit turns to high level when receiver
+ * detects the 0 after the stop bit.
+ */
+
+#define UART_BRK_DET_INT_RAW            (BIT(7))
+#define UART_BRK_DET_INT_RAW_M          (BIT(7))
+#define UART_BRK_DET_INT_RAW_V          0x1
+#define UART_BRK_DET_INT_RAW_S          7
+
+/* UART_CTS_CHG_INT_RAW : RO ;bitpos:[6] ;default: 1'b0 ; */
+/* Description: This interrupt raw bit turns to high level when receiver
+ * detects the edge change of ctsn signal.
+ */
+
+#define UART_CTS_CHG_INT_RAW            (BIT(6))
+#define UART_CTS_CHG_INT_RAW_M          (BIT(6))
+#define UART_CTS_CHG_INT_RAW_V          0x1
+#define UART_CTS_CHG_INT_RAW_S          6
+
+/* UART_DSR_CHG_INT_RAW : RO ;bitpos:[5] ;default: 1'b0 ; */
+/* Description: This interrupt raw bit turns to high level when receiver
+ * detects the edge change of dsrn signal.
+ */
+
+#define UART_DSR_CHG_INT_RAW            (BIT(5))
+#define UART_DSR_CHG_INT_RAW_M          (BIT(5))
+#define UART_DSR_CHG_INT_RAW_V          0x1
+#define UART_DSR_CHG_INT_RAW_S          5
+
+/* UART_RXFIFO_OVF_INT_RAW : RO ;bitpos:[4] ;default: 1'b0 ; */
+/* Description: This interrupt raw bit turns to high level when receiver
+ * receives more data than the fifo can store.
+ */
+
+#define UART_RXFIFO_OVF_INT_RAW         (BIT(4))
+#define UART_RXFIFO_OVF_INT_RAW_M       (BIT(4))
+#define UART_RXFIFO_OVF_INT_RAW_V       0x1
+#define UART_RXFIFO_OVF_INT_RAW_S       4
+
+/* UART_FRM_ERR_INT_RAW : RO ;bitpos:[3] ;default: 1'b0 ; */
+/* Description: This interrupt raw bit turns to high level when receiver
+ * detects data's frame error.
+ */
+
+#define UART_FRM_ERR_INT_RAW            (BIT(3))
+#define UART_FRM_ERR_INT_RAW_M          (BIT(3))
+#define UART_FRM_ERR_INT_RAW_V          0x1
+#define UART_FRM_ERR_INT_RAW_S          3
+
+/* UART_PARITY_ERR_INT_RAW : RO ;bitpos:[2] ;default: 1'b0 ; */
+/* Description: This interrupt raw bit turns to high level when receiver
+ * detects the parity error of data.
+ */
+
+#define UART_PARITY_ERR_INT_RAW         (BIT(2))
+#define UART_PARITY_ERR_INT_RAW_M       (BIT(2))
+#define UART_PARITY_ERR_INT_RAW_V       0x1
+#define UART_PARITY_ERR_INT_RAW_S       2
+
+/* UART_TXFIFO_EMPTY_INT_RAW : RO ;bitpos:[1] ;default: 1'b0 ; */
+/* Description: This interrupt raw bit turns to high level when the amount
+ * of data in transmitter's fifo is less than ((tx_mem_cnttxfifo_cnt).
+ */
+
+#define UART_TXFIFO_EMPTY_INT_RAW       (BIT(1))
+#define UART_TXFIFO_EMPTY_INT_RAW_M     (BIT(1))
+#define UART_TXFIFO_EMPTY_INT_RAW_V     0x1
+#define UART_TXFIFO_EMPTY_INT_RAW_S     1
+
+/* UART_RXFIFO_FULL_INT_RAW : RO ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: This interrupt raw bit turns to high level when receiver
+ * receives more data than (rx_flow_thrhd_h3 rx_flow_thrhd).
+ */
+
+#define UART_RXFIFO_FULL_INT_RAW        (BIT(0))
+#define UART_RXFIFO_FULL_INT_RAW_M      (BIT(0))
+#define UART_RXFIFO_FULL_INT_RAW_V      0x1
+#define UART_RXFIFO_FULL_INT_RAW_S      0
+
+#define UART_INT_ST_OFFSET              0x08
+#define UART_INT_ST_REG(i)              (REG_UART_BASE(i) + UART_INT_ST_OFFSET)
+
+/* UART_AT_CMD_CHAR_DET_INT_ST : RO ;bitpos:[18] ;default: 1'b0 ; */
+/* Description: This is the status bit for at_cmd_det_int_raw when
+ * at_cmd_char_det_int_ena is set to 1.
+ */
+
+#define UART_AT_CMD_CHAR_DET_INT_ST     (BIT(18))
+#define UART_AT_CMD_CHAR_DET_INT_ST_M   (BIT(18))
+#define UART_AT_CMD_CHAR_DET_INT_ST_V   0x1
+#define UART_AT_CMD_CHAR_DET_INT_ST_S   18
+
+/* UART_RS485_CLASH_INT_ST : RO ;bitpos:[17] ;default: 1'b0 ; */
+/* Description: This is the status bit for rs485_clash_int_raw when
+ * rs485_clash_int_ena is set to 1.
+ */
+
+#define UART_RS485_CLASH_INT_ST         (BIT(17))
+#define UART_RS485_CLASH_INT_ST_M       (BIT(17))
+#define UART_RS485_CLASH_INT_ST_V       0x1
+#define UART_RS485_CLASH_INT_ST_S       17
+
+/* UART_RS485_FRM_ERR_INT_ST : RO ;bitpos:[16] ;default: 1'b0 ; */
+/* Description: This is the status bit for rs485_fm_err_int_raw when
+ * rs485_fm_err_int_ena is set to 1.
+ */
+
+#define UART_RS485_FRM_ERR_INT_ST       (BIT(16))
+#define UART_RS485_FRM_ERR_INT_ST_M     (BIT(16))
+#define UART_RS485_FRM_ERR_INT_ST_V     0x1
+#define UART_RS485_FRM_ERR_INT_ST_S     16
+
+/* UART_RS485_PARITY_ERR_INT_ST : RO ;bitpos:[15] ;default: 1'b0 ; */
+/* Description: This is the status bit for rs485_parity_err_int_raw when
+ * rs485_parity_int_ena is set to 1.
+ */
+
+#define UART_RS485_PARITY_ERR_INT_ST    (BIT(15))
+#define UART_RS485_PARITY_ERR_INT_ST_M  (BIT(15))
+#define UART_RS485_PARITY_ERR_INT_ST_V  0x1
+#define UART_RS485_PARITY_ERR_INT_ST_S  15
+
+/* UART_TX_DONE_INT_ST : RO ;bitpos:[14] ;default: 1'b0 ; */
+/* Description: This is the status bit for tx_done_int_raw when
+ * tx_done_int_ena is set to 1.
+ */
+
+#define UART_TX_DONE_INT_ST             (BIT(14))
+#define UART_TX_DONE_INT_ST_M           (BIT(14))
+#define UART_TX_DONE_INT_ST_V           0x1
+#define UART_TX_DONE_INT_ST_S           14
+
+/* UART_TX_BRK_IDLE_DONE_INT_ST : RO ;bitpos:[13] ;default: 1'b0 ; */
+/* Description: This is the stauts bit for tx_brk_idle_done_int_raw when
+ * tx_brk_idle_done_int_ena is set to 1.
+ */
+
+#define UART_TX_BRK_IDLE_DONE_INT_ST    (BIT(13))
+#define UART_TX_BRK_IDLE_DONE_INT_ST_M  (BIT(13))
+#define UART_TX_BRK_IDLE_DONE_INT_ST_V  0x1
+#define UART_TX_BRK_IDLE_DONE_INT_ST_S  13
+
+/* UART_TX_BRK_DONE_INT_ST : RO ;bitpos:[12] ;default: 1'b0 ; */
+/* Description: This is the status bit for tx_brk_done_int_raw when
+ * tx_brk_done_int_ena is set to 1.
+ */
+
+#define UART_TX_BRK_DONE_INT_ST         (BIT(12))
+#define UART_TX_BRK_DONE_INT_ST_M       (BIT(12))
+#define UART_TX_BRK_DONE_INT_ST_V       0x1
+#define UART_TX_BRK_DONE_INT_ST_S       12
+
+/* UART_GLITCH_DET_INT_ST : RO ;bitpos:[11] ;default: 1'b0 ; */
+/* Description: This is the status bit for glitch_det_int_raw when
+ * glitch_det_int_ena is set to 1.
+ */
+
+#define UART_GLITCH_DET_INT_ST          (BIT(11))
+#define UART_GLITCH_DET_INT_ST_M        (BIT(11))
+#define UART_GLITCH_DET_INT_ST_V        0x1
+#define UART_GLITCH_DET_INT_ST_S        11
+
+/* UART_SW_XOFF_INT_ST : RO ;bitpos:[10] ;default: 1'b0 ; */
+/* Description: This is the status bit for sw_xoff_int_raw when
+ * sw_xoff_int_ena is set to 1.
+ */
+
+#define UART_SW_XOFF_INT_ST             (BIT(10))
+#define UART_SW_XOFF_INT_ST_M           (BIT(10))
+#define UART_SW_XOFF_INT_ST_V           0x1
+#define UART_SW_XOFF_INT_ST_S           10
+
+/* UART_SW_XON_INT_ST : RO ;bitpos:[9] ;default: 1'b0 ; */
+/* Description: This is the status bit for sw_xon_int_raw when
+ * sw_xon_int_ena is set to 1.
+ */
+
+#define UART_SW_XON_INT_ST              (BIT(9))
+#define UART_SW_XON_INT_ST_M            (BIT(9))
+#define UART_SW_XON_INT_ST_V            0x1
+#define UART_SW_XON_INT_ST_S            9
+
+/* UART_RXFIFO_TOUT_INT_ST : RO ;bitpos:[8] ;default: 1'b0 ; */
+/* Description: This is the status bit for rxfifo_tout_int_raw when
+ * rxfifo_tout_int_ena is set to 1.
+ */
+
+#define UART_RXFIFO_TOUT_INT_ST         (BIT(8))
+#define UART_RXFIFO_TOUT_INT_ST_M       (BIT(8))
+#define UART_RXFIFO_TOUT_INT_ST_V       0x1
+#define UART_RXFIFO_TOUT_INT_ST_S       8
+
+/* UART_BRK_DET_INT_ST : RO ;bitpos:[7] ;default: 1'b0 ; */
+/* Description: This is the status bit for brk_det_int_raw when
+ * brk_det_int_ena is set to 1.
+ */
+
+#define UART_BRK_DET_INT_ST             (BIT(7))
+#define UART_BRK_DET_INT_ST_M           (BIT(7))
+#define UART_BRK_DET_INT_ST_V           0x1
+#define UART_BRK_DET_INT_ST_S           7
+
+/* UART_CTS_CHG_INT_ST : RO ;bitpos:[6] ;default: 1'b0 ; */
+/* Description: This is the status bit for cts_chg_int_raw when
+ * cts_chg_int_ena is set to 1.
+ */
+
+#define UART_CTS_CHG_INT_ST             (BIT(6))
+#define UART_CTS_CHG_INT_ST_M           (BIT(6))
+#define UART_CTS_CHG_INT_ST_V           0x1
+#define UART_CTS_CHG_INT_ST_S           6
+
+/* UART_DSR_CHG_INT_ST : RO ;bitpos:[5] ;default: 1'b0 ; */
+/* Description: This is the status bit for dsr_chg_int_raw when
+ * dsr_chg_int_ena is set to 1.
+ */
+
+#define UART_DSR_CHG_INT_ST             (BIT(5))
+#define UART_DSR_CHG_INT_ST_M           (BIT(5))
+#define UART_DSR_CHG_INT_ST_V           0x1
+#define UART_DSR_CHG_INT_ST_S           5
+
+/* UART_RXFIFO_OVF_INT_ST : RO ;bitpos:[4] ;default: 1'b0 ; */
+/* Description: This is the status bit for rxfifo_ovf_int_raw when
+ * rxfifo_ovf_int_ena is set to 1.
+ */
+
+#define UART_RXFIFO_OVF_INT_ST          (BIT(4))
+#define UART_RXFIFO_OVF_INT_ST_M        (BIT(4))
+#define UART_RXFIFO_OVF_INT_ST_V        0x1
+#define UART_RXFIFO_OVF_INT_ST_S        4
+
+/* UART_FRM_ERR_INT_ST : RO ;bitpos:[3] ;default: 1'b0 ; */
+/* Description: This is the status bit for frm_err_int_raw when
+ * fm_err_int_ena is set to 1.
+ */
+
+#define UART_FRM_ERR_INT_ST             (BIT(3))
+#define UART_FRM_ERR_INT_ST_M           (BIT(3))
+#define UART_FRM_ERR_INT_ST_V           0x1
+#define UART_FRM_ERR_INT_ST_S           3
+
+/* UART_PARITY_ERR_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
+/* Description: This is the status bit for parity_err_int_raw when
+ * parity_err_int_ena is set to 1.
+ */
+
+#define UART_PARITY_ERR_INT_ST          (BIT(2))
+#define UART_PARITY_ERR_INT_ST_M        (BIT(2))
+#define UART_PARITY_ERR_INT_ST_V        0x1
+#define UART_PARITY_ERR_INT_ST_S        2
+
+/* UART_TXFIFO_EMPTY_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
+/* Description: This is the status bit for txfifo_empty_int_raw when
+ * txfifo_empty_int_ena is set to 1.
+ */
+
+#define UART_TXFIFO_EMPTY_INT_ST        (BIT(1))
+#define UART_TXFIFO_EMPTY_INT_ST_M      (BIT(1))
+#define UART_TXFIFO_EMPTY_INT_ST_V      0x1
+#define UART_TXFIFO_EMPTY_INT_ST_S      1
+
+/* UART_RXFIFO_FULL_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: This is the status bit for rxfifo_full_int_raw when
+ * rxfifo_full_int_ena is set to 1.*/
+
+#define UART_RXFIFO_FULL_INT_ST         (BIT(0))
+#define UART_RXFIFO_FULL_INT_ST_M       (BIT(0))
+#define UART_RXFIFO_FULL_INT_ST_V       0x1
+#define UART_RXFIFO_FULL_INT_ST_S       0
+
+#define UART_INT_ENA_OFFSET             0x0c
+#define UART_INT_ENA_REG(i)             (REG_UART_BASE(i) + UART_INT_ENA_OFFSET)
+
+/* UART_AT_CMD_CHAR_DET_INT_ENA : R/W ;bitpos:[18] ;default: 1'b0 ; */
+/* Description: This is the enable bit for at_cmd_char_det_int_st register.*/
+
+#define UART_AT_CMD_CHAR_DET_INT_ENA    (BIT(18))
+#define UART_AT_CMD_CHAR_DET_INT_ENA_M  (BIT(18))
+#define UART_AT_CMD_CHAR_DET_INT_ENA_V  0x1
+#define UART_AT_CMD_CHAR_DET_INT_ENA_S  18
+
+/* UART_RS485_CLASH_INT_ENA : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/* Description: This is the enable bit for rs485_clash_int_st register.*/
+
+#define UART_RS485_CLASH_INT_ENA        (BIT(17))
+#define UART_RS485_CLASH_INT_ENA_M      (BIT(17))
+#define UART_RS485_CLASH_INT_ENA_V      0x1
+#define UART_RS485_CLASH_INT_ENA_S      17
+
+/* UART_RS485_FRM_ERR_INT_ENA : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/* Description: This is the enable bit for rs485_parity_err_int_st register.*/
+
+#define UART_RS485_FRM_ERR_INT_ENA      (BIT(16))
+#define UART_RS485_FRM_ERR_INT_ENA_M    (BIT(16))
+#define UART_RS485_FRM_ERR_INT_ENA_V    0x1
+#define UART_RS485_FRM_ERR_INT_ENA_S    16
+
+/* UART_RS485_PARITY_ERR_INT_ENA : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/* Description: This is the enable bit for rs485_parity_err_int_st register.*/
+
+#define UART_RS485_PARITY_ERR_INT_ENA   (BIT(15))
+#define UART_RS485_PARITY_ERR_INT_ENA_M (BIT(15))
+#define UART_RS485_PARITY_ERR_INT_ENA_V 0x1
+#define UART_RS485_PARITY_ERR_INT_ENA_S 15
+
+/* UART_TX_DONE_INT_ENA : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/* Description: This is the enable bit for tx_done_int_st register.*/
+
+#define UART_TX_DONE_INT_ENA            (BIT(14))
+#define UART_TX_DONE_INT_ENA_M          (BIT(14))
+#define UART_TX_DONE_INT_ENA_V          0x1
+#define UART_TX_DONE_INT_ENA_S          14
+
+/* UART_TX_BRK_IDLE_DONE_INT_ENA : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/* Description: This is the enable bit for tx_brk_idle_done_int_st register.*/
+
+#define UART_TX_BRK_IDLE_DONE_INT_ENA   (BIT(13))
+#define UART_TX_BRK_IDLE_DONE_INT_ENA_M (BIT(13))
+#define UART_TX_BRK_IDLE_DONE_INT_ENA_V 0x1
+#define UART_TX_BRK_IDLE_DONE_INT_ENA_S 13
+
+/* UART_TX_BRK_DONE_INT_ENA : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/* Description: This is the enable bit for tx_brk_done_int_st register.*/
+
+#define UART_TX_BRK_DONE_INT_ENA        (BIT(12))
+#define UART_TX_BRK_DONE_INT_ENA_M      (BIT(12))
+#define UART_TX_BRK_DONE_INT_ENA_V      0x1
+#define UART_TX_BRK_DONE_INT_ENA_S      12
+
+/* UART_GLITCH_DET_INT_ENA : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/* Description: This is the enable bit for glitch_det_int_st register.*/
+
+#define UART_GLITCH_DET_INT_ENA         (BIT(11))
+#define UART_GLITCH_DET_INT_ENA_M       (BIT(11))
+#define UART_GLITCH_DET_INT_ENA_V       0x1
+#define UART_GLITCH_DET_INT_ENA_S       11
+
+/* UART_SW_XOFF_INT_ENA : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/* Description: This is the enable bit for sw_xoff_int_st register.*/
+
+#define UART_SW_XOFF_INT_ENA            (BIT(10))
+#define UART_SW_XOFF_INT_ENA_M          (BIT(10))
+#define UART_SW_XOFF_INT_ENA_V          0x1
+#define UART_SW_XOFF_INT_ENA_S          10
+
+/* UART_SW_XON_INT_ENA : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/* Description: This is the enable bit for sw_xon_int_st register.*/
+
+#define UART_SW_XON_INT_ENA             (BIT(9))
+#define UART_SW_XON_INT_ENA_M           (BIT(9))
+#define UART_SW_XON_INT_ENA_V           0x1
+#define UART_SW_XON_INT_ENA_S           9
+
+/* UART_RXFIFO_TOUT_INT_ENA : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/* Description: This is the enable bit for rxfifo_tout_int_st register.*/
+
+#define UART_RXFIFO_TOUT_INT_ENA        (BIT(8))
+#define UART_RXFIFO_TOUT_INT_ENA_M      (BIT(8))
+#define UART_RXFIFO_TOUT_INT_ENA_V      0x1
+#define UART_RXFIFO_TOUT_INT_ENA_S      8
+
+/* UART_BRK_DET_INT_ENA : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/* Description: This is the enable bit for brk_det_int_st register.*/
+
+#define UART_BRK_DET_INT_ENA            (BIT(7))
+#define UART_BRK_DET_INT_ENA_M          (BIT(7))
+#define UART_BRK_DET_INT_ENA_V          0x1
+#define UART_BRK_DET_INT_ENA_S          7
+
+/* UART_CTS_CHG_INT_ENA : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/* Description: This is the enable bit for cts_chg_int_st register.*/
+
+#define UART_CTS_CHG_INT_ENA            (BIT(6))
+#define UART_CTS_CHG_INT_ENA_M          (BIT(6))
+#define UART_CTS_CHG_INT_ENA_V          0x1
+#define UART_CTS_CHG_INT_ENA_S          6
+
+/* UART_DSR_CHG_INT_ENA : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/* Description: This is the enable bit for dsr_chg_int_st register.*/
+
+#define UART_DSR_CHG_INT_ENA            (BIT(5))
+#define UART_DSR_CHG_INT_ENA_M          (BIT(5))
+#define UART_DSR_CHG_INT_ENA_V          0x1
+#define UART_DSR_CHG_INT_ENA_S          5
+
+/* UART_RXFIFO_OVF_INT_ENA : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/* Description: This is the enable bit for rxfifo_ovf_int_st register.*/
+
+#define UART_RXFIFO_OVF_INT_ENA         (BIT(4))
+#define UART_RXFIFO_OVF_INT_ENA_M       (BIT(4))
+#define UART_RXFIFO_OVF_INT_ENA_V       0x1
+#define UART_RXFIFO_OVF_INT_ENA_S       4
+
+/* UART_FRM_ERR_INT_ENA : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/* Description: This is the enable bit for frm_err_int_st register.*/
+
+#define UART_FRM_ERR_INT_ENA            (BIT(3))
+#define UART_FRM_ERR_INT_ENA_M          (BIT(3))
+#define UART_FRM_ERR_INT_ENA_V          0x1
+#define UART_FRM_ERR_INT_ENA_S          3
+
+/* UART_PARITY_ERR_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/* Description: This is the enable bit for parity_err_int_st register.*/
+
+#define UART_PARITY_ERR_INT_ENA         (BIT(2))
+#define UART_PARITY_ERR_INT_ENA_M       (BIT(2))
+#define UART_PARITY_ERR_INT_ENA_V       0x1
+#define UART_PARITY_ERR_INT_ENA_S       2
+
+/* UART_TXFIFO_EMPTY_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/* Description: This is the enable bit for txfifo_fifo_int_st register.*/
+
+#define UART_TXFIFO_EMPTY_INT_ENA       (BIT(1))
+#define UART_TXFIFO_EMPTY_INT_ENA_M     (BIT(1))
+#define UART_TXFIFO_EMPTY_INT_ENA_V     0x1
+#define UART_TXFIFO_EMPTY_INT_ENA_S     1
+
+/* UART_RXFIFO_FULL_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: This is the enable bit for rxfifo_full_int_st register.*/
+
+#define UART_RXFIFO_FULL_INT_ENA        (BIT(0))
+#define UART_RXFIFO_FULL_INT_ENA_M      (BIT(0))
+#define UART_RXFIFO_FULL_INT_ENA_V      0x1
+#define UART_RXFIFO_FULL_INT_ENA_S      0
+
+#define UART_INT_CLR_OFFSET             0x10
+#define UART_INT_CLR_REG(i)             (REG_UART_BASE(i) + UART_INT_CLR_OFFSET)
+
+/* UART_AT_CMD_CHAR_DET_INT_CLR : WO ;bitpos:[18] ;default: 1'b0 ; */
+/* Description: Set this bit to clear the at_cmd_char_det_int_raw interrupt.*/
+
+#define UART_AT_CMD_CHAR_DET_INT_CLR    (BIT(18))
+#define UART_AT_CMD_CHAR_DET_INT_CLR_M  (BIT(18))
+#define UART_AT_CMD_CHAR_DET_INT_CLR_V  0x1
+#define UART_AT_CMD_CHAR_DET_INT_CLR_S  18
+
+/* UART_RS485_CLASH_INT_CLR : WO ;bitpos:[17] ;default: 1'b0 ; */
+/* Description: Set this bit to clear the rs485_clash_int_raw interrupt.*/
+
+#define UART_RS485_CLASH_INT_CLR        (BIT(17))
+#define UART_RS485_CLASH_INT_CLR_M      (BIT(17))
+#define UART_RS485_CLASH_INT_CLR_V      0x1
+#define UART_RS485_CLASH_INT_CLR_S      17
+
+/* UART_RS485_FRM_ERR_INT_CLR : WO ;bitpos:[16] ;default: 1'b0 ; */
+/* Description: Set this bit to clear the rs485_frm_err_int_raw interrupt.*/
+
+#define UART_RS485_FRM_ERR_INT_CLR      (BIT(16))
+#define UART_RS485_FRM_ERR_INT_CLR_M    (BIT(16))
+#define UART_RS485_FRM_ERR_INT_CLR_V    0x1
+#define UART_RS485_FRM_ERR_INT_CLR_S    16
+
+/* UART_RS485_PARITY_ERR_INT_CLR : WO ;bitpos:[15] ;default: 1'b0 ; */
+/* Description: Set this bit to clear the rs485_parity_err_int_raw
+ * interrupt.
+ */
+
+#define UART_RS485_PARITY_ERR_INT_CLR   (BIT(15))
+#define UART_RS485_PARITY_ERR_INT_CLR_M (BIT(15))
+#define UART_RS485_PARITY_ERR_INT_CLR_V 0x1
+#define UART_RS485_PARITY_ERR_INT_CLR_S 15
+
+/* UART_TX_DONE_INT_CLR : WO ;bitpos:[14] ;default: 1'b0 ; */
+/* Description: Set this bit to clear the tx_done_int_raw interrupt.*/
+
+#define UART_TX_DONE_INT_CLR            (BIT(14))
+#define UART_TX_DONE_INT_CLR_M          (BIT(14))
+#define UART_TX_DONE_INT_CLR_V          0x1
+#define UART_TX_DONE_INT_CLR_S          14
+
+/* UART_TX_BRK_IDLE_DONE_INT_CLR : WO ;bitpos:[13] ;default: 1'b0 ; */
+/* Description: Set this bit to clear the tx_brk_idle_done_int_raw
+ * interrupt.
+ */
+
+#define UART_TX_BRK_IDLE_DONE_INT_CLR   (BIT(13))
+#define UART_TX_BRK_IDLE_DONE_INT_CLR_M (BIT(13))
+#define UART_TX_BRK_IDLE_DONE_INT_CLR_V 0x1
+#define UART_TX_BRK_IDLE_DONE_INT_CLR_S 13
+
+/* UART_TX_BRK_DONE_INT_CLR : WO ;bitpos:[12] ;default: 1'b0 ; */
+/* Description: Set this bit to clear the tx_brk_done_int_raw interrupt. */
+
+#define UART_TX_BRK_DONE_INT_CLR        (BIT(12))
+#define UART_TX_BRK_DONE_INT_CLR_M      (BIT(12))
+#define UART_TX_BRK_DONE_INT_CLR_V      0x1
+#define UART_TX_BRK_DONE_INT_CLR_S      12
+
+/* UART_GLITCH_DET_INT_CLR : WO ;bitpos:[11] ;default: 1'b0 ; */
+/* Description: Set this bit to clear the glitch_det_int_raw interrupt.*/
+
+#define UART_GLITCH_DET_INT_CLR         (BIT(11))
+#define UART_GLITCH_DET_INT_CLR_M       (BIT(11))
+#define UART_GLITCH_DET_INT_CLR_V       0x1
+#define UART_GLITCH_DET_INT_CLR_S       11
+
+/* UART_SW_XOFF_INT_CLR : WO ;bitpos:[10] ;default: 1'b0 ; */
+/* Description: Set this bit to clear the sw_xon_int_raw interrupt.*/
+
+#define UART_SW_XOFF_INT_CLR            (BIT(10))
+#define UART_SW_XOFF_INT_CLR_M          (BIT(10))
+#define UART_SW_XOFF_INT_CLR_V          0x1
+#define UART_SW_XOFF_INT_CLR_S          10
+
+/* UART_SW_XON_INT_CLR : WO ;bitpos:[9] ;default: 1'b0 ; */
+/* Description: Set this bit to clear the sw_xon_int_raw interrupt.*/
+
+#define UART_SW_XON_INT_CLR             (BIT(9))
+#define UART_SW_XON_INT_CLR_M           (BIT(9))
+#define UART_SW_XON_INT_CLR_V           0x1
+#define UART_SW_XON_INT_CLR_S           9
+
+/* UART_RXFIFO_TOUT_INT_CLR : WO ;bitpos:[8] ;default: 1'b0 ; */
+/* Description: Set this bit to clear the rxfifo_tout_int_raw interrupt.*/
+
+#define UART_RXFIFO_TOUT_INT_CLR        (BIT(8))
+#define UART_RXFIFO_TOUT_INT_CLR_M      (BIT(8))
+#define UART_RXFIFO_TOUT_INT_CLR_V      0x1
+#define UART_RXFIFO_TOUT_INT_CLR_S      8
+
+/* UART_BRK_DET_INT_CLR : WO ;bitpos:[7] ;default: 1'b0 ; */
+/* Description: Set this bit to clear the brk_det_int_raw interrupt.*/
+
+#define UART_BRK_DET_INT_CLR            (BIT(7))
+#define UART_BRK_DET_INT_CLR_M          (BIT(7))
+#define UART_BRK_DET_INT_CLR_V          0x1
+#define UART_BRK_DET_INT_CLR_S          7
+
+/* UART_CTS_CHG_INT_CLR : WO ;bitpos:[6] ;default: 1'b0 ; */
+/* Description: Set this bit to clear the cts_chg_int_raw interrupt.*/
+
+#define UART_CTS_CHG_INT_CLR            (BIT(6))
+#define UART_CTS_CHG_INT_CLR_M          (BIT(6))
+#define UART_CTS_CHG_INT_CLR_V          0x1
+#define UART_CTS_CHG_INT_CLR_S          6
+
+/* UART_DSR_CHG_INT_CLR : WO ;bitpos:[5] ;default: 1'b0 ; */
+/* Description: Set this bit to clear the dsr_chg_int_raw interrupt.*/
+
+#define UART_DSR_CHG_INT_CLR            (BIT(5))
+#define UART_DSR_CHG_INT_CLR_M          (BIT(5))
+#define UART_DSR_CHG_INT_CLR_V          0x1
+#define UART_DSR_CHG_INT_CLR_S          5
+
+/* UART_RXFIFO_OVF_INT_CLR : WO ;bitpos:[4] ;default: 1'b0 ; */
+/* Description: Set this bit to clear rxfifo_ovf_int_raw interrupt.*/
+
+#define UART_RXFIFO_OVF_INT_CLR         (BIT(4))
+#define UART_RXFIFO_OVF_INT_CLR_M       (BIT(4))
+#define UART_RXFIFO_OVF_INT_CLR_V       0x1
+#define UART_RXFIFO_OVF_INT_CLR_S       4
+
+/* UART_FRM_ERR_INT_CLR : WO ;bitpos:[3] ;default: 1'b0 ; */
+/* Description: Set this bit to clear frm_err_int_raw interrupt.*/
+
+#define UART_FRM_ERR_INT_CLR            (BIT(3))
+#define UART_FRM_ERR_INT_CLR_M          (BIT(3))
+#define UART_FRM_ERR_INT_CLR_V          0x1
+#define UART_FRM_ERR_INT_CLR_S          3
+
+/* UART_PARITY_ERR_INT_CLR : WO ;bitpos:[2] ;default: 1'b0 ; */
+/* Description: Set this bit to clear parity_err_int_raw interrupt.*/
+
+#define UART_PARITY_ERR_INT_CLR         (BIT(2))
+#define UART_PARITY_ERR_INT_CLR_M       (BIT(2))
+#define UART_PARITY_ERR_INT_CLR_V       0x1
+#define UART_PARITY_ERR_INT_CLR_S       2
+
+/* UART_TXFIFO_EMPTY_INT_CLR : WO ;bitpos:[1] ;default: 1'b0 ; */
+/* Description: Set this bit to clear txfifo_empty_int_raw interrupt.*/
+
+#define UART_TXFIFO_EMPTY_INT_CLR       (BIT(1))
+#define UART_TXFIFO_EMPTY_INT_CLR_M     (BIT(1))
+#define UART_TXFIFO_EMPTY_INT_CLR_V     0x1
+#define UART_TXFIFO_EMPTY_INT_CLR_S     1
+
+/* UART_RXFIFO_FULL_INT_CLR : WO ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: Set this bit to clear the rxfifo_full_int_raw interrupt.*/
+
+#define UART_RXFIFO_FULL_INT_CLR        (BIT(0))
+#define UART_RXFIFO_FULL_INT_CLR_M      (BIT(0))
+#define UART_RXFIFO_FULL_INT_CLR_V      0x1
+#define UART_RXFIFO_FULL_INT_CLR_S      0
+
+#define UART_CLKDIV_OFFSET              0x14
+#define UART_CLKDIV_REG(i)              (REG_UART_BASE(i) + UART_CLKDIV_OFFSET)
+
+/* UART_CLKDIV_FRAG : R/W ;bitpos:[23:20] ;default: 4'h0 ; */
+/* Description: The register  value is the decimal part of the frequency
+ * divider's factor.
+ */
+
+#define UART_CLKDIV_FRAG                0x0000000F
+#define UART_CLKDIV_FRAG_M              ((UART_CLKDIV_FRAG_V) << (UART_CLKDIV_FRAG_S))
+#define UART_CLKDIV_FRAG_V              0xF
+#define UART_CLKDIV_FRAG_S              20
+
+/* UART_CLKDIV : R/W ;bitpos:[19:0] ;default: 20'h2B6 ; */
+/* Description: The register value is  the  integer part of the frequency
+ * divider's factor.
+ */
+
+#define UART_CLKDIV                     0x000FFFFF
+#define UART_CLKDIV_M                   ((UART_CLKDIV_V) << (UART_CLKDIV_S))
+#define UART_CLKDIV_V                   0xFFFFF
+#define UART_CLKDIV_S                   0
+
+#define UART_AUTOBAUD_OFFSET            0x18
+#define UART_AUTOBAUD_REG(i)            (REG_UART_BASE(i) + UART_AUTOBAUD_OFFSET)
+
+/* UART_GLITCH_FILT : R/W ;bitpos:[15:8] ;default: 8'h10 ; */
+/* Description: when input pulse width is lower then this value igore this
+ * pulse.  This register is used in autobaud detect process.
+ */
+
+#define UART_GLITCH_FILT                0x000000FF
+#define UART_GLITCH_FILT_M              ((UART_GLITCH_FILT_V) << (UART_GLITCH_FILT_S))
+#define UART_GLITCH_FILT_V              0xFF
+#define UART_GLITCH_FILT_S              8
+
+/* UART_AUTOBAUD_EN : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: This is the enable bit for detecting baudrate.*/
+
+#define UART_AUTOBAUD_EN                (BIT(0))
+#define UART_AUTOBAUD_EN_M              (BIT(0))
+#define UART_AUTOBAUD_EN_V              0x1
+#define UART_AUTOBAUD_EN_S              0
+
+#define UART_STATUS_OFFSET              0x1c
+#define UART_STATUS_REG(i)              (REG_UART_BASE(i) + UART_STATUS_OFFSET)
+
+/* UART_TXD : RO ;bitpos:[31] ;default: 8'h0 ; */
+/* Description: This register represent the level value of the internal
+ * uart rxd signal.
+ */
+
+#define UART_TXD                        (BIT(31))
+#define UART_TXD_M                      (BIT(31))
+#define UART_TXD_V                      0x1
+#define UART_TXD_S                      31
+
+/* UART_RTSN : RO ;bitpos:[30] ;default: 1'b0 ; */
+/* Description: This register represent the level value of the internal uart
+ * cts signal.
+ */
+
+#define UART_RTSN                       (BIT(30))
+#define UART_RTSN_M                     (BIT(30))
+#define UART_RTSN_V                     0x1
+#define UART_RTSN_S                     30
+
+/* UART_DTRN : RO ;bitpos:[29] ;default: 1'b0 ; */
+/* Description: The register represent the level value of the internal uart
+ * dsr signal.
+ */
+
+#define UART_DTRN                       (BIT(29))
+#define UART_DTRN_M                     (BIT(29))
+#define UART_DTRN_V                     0x1
+#define UART_DTRN_S                     29
+
+/* UART_ST_UTX_OUT : RO ;bitpos:[27:24] ;default: 4'b0 ; */
+/* Description: This register stores the value of transmitter's finite state
+ * machine. 0:TX_IDLE  1:TX_STRT  2:TX_DAT0  3:TX_DAT1  4:TX_DAT2
+ * 5:TX_DAT3 6:TX_DAT4  7:TX_DAT5  8:TX_DAT6 9:TX_DAT7  10:TX_PRTY
+ * 11:TX_STP1  12:TX_STP2  13:TX_DL0   14:TX_DL1
+ */
+
+#define UART_ST_UTX_OUT                 0x0000000F
+#define UART_ST_UTX_OUT_M               ((UART_ST_UTX_OUT_V) << (UART_ST_UTX_OUT_S))
+#define UART_ST_UTX_OUT_V               0xF
+#define UART_ST_UTX_OUT_S               24
+
+/* UART_TXFIFO_CNT : RO ;bitpos:[23:16] ;default: 8'b0 ; */
+/* Description: (tx_mem_cnt txfifo_cnt) stores the byte num of valid datas
+ * in transmitter's fifo.  tx_mem_cnt stores the 3 most significant bits
+ * txfifo_cnt stores the 8 least significant bits.
+ */
+
+#define UART_TXFIFO_CNT                 0x000000FF
+#define UART_TXFIFO_CNT_M               ((UART_TXFIFO_CNT_V) << (UART_TXFIFO_CNT_S))
+#define UART_TXFIFO_CNT_V               0xFF
+#define UART_TXFIFO_CNT_S               16
+
+/* UART_RXD : RO ;bitpos:[15] ;default: 1'b0 ; */
+/* Description: This register stores the level value of the internal uart
+ * rxd signal.
+ */
+
+#define UART_RXD                        (BIT(15))
+#define UART_RXD_M                      (BIT(15))
+#define UART_RXD_V                      0x1
+#define UART_RXD_S                      15
+
+/* UART_CTSN : RO ;bitpos:[14] ;default: 1'b0 ; */
+/* Description: This register stores the level value of the internal uart
+ * cts signal.
+ */
+
+#define UART_CTSN                       (BIT(14))
+#define UART_CTSN_M                     (BIT(14))
+#define UART_CTSN_V                     0x1
+#define UART_CTSN_S                     14
+
+/* UART_DSRN : RO ;bitpos:[13] ;default: 1'b0 ; */
+/* Description: This register stores the level value of the internal uart
+ * dsr signal.
+ */
+
+#define UART_DSRN                       (BIT(13))
+#define UART_DSRN_M                     (BIT(13))
+#define UART_DSRN_V                     0x1
+#define UART_DSRN_S                     13
+
+/* UART_ST_URX_OUT : RO ;bitpos:[11:8] ;default: 4'b0 ; */
+/* Description: This register stores the value of receiver's finite state
+ * machine.
+ * 0:RX_IDLE  1:RX_STRT  2:RX_DAT0  3:RX_DAT1  4:RX_DAT2  5:RX_DAT3
+ * 6:RX_DAT4  7:RX_DAT5  8:RX_DAT6  9:RX_DAT7   10:RX_PRTY   11:RX_STP1
+ * 12:RX_STP2 13:RX_DL1
+ */
+
+#define UART_ST_URX_OUT                 0x0000000F
+#define UART_ST_URX_OUT_M               ((UART_ST_URX_OUT_V) << (UART_ST_URX_OUT_S))
+#define UART_ST_URX_OUT_V               0xF
+#define UART_ST_URX_OUT_S               8
+
+/* UART_RXFIFO_CNT : RO ;bitpos:[7:0] ;default: 8'b0 ; */
+/* Description: (rx_mem_cnt rxfifo_cnt) stores the byte num of valid datas
+ * in receiver's fifo. rx_mem_cnt register stores the 3 most significant
+ * bits rxfifo_cnt stores the 8 least significant bits.
+ */
+
+#define UART_RXFIFO_CNT                 0x000000FF
+#define UART_RXFIFO_CNT_M               ((UART_RXFIFO_CNT_V) << (UART_RXFIFO_CNT_S))
+#define UART_RXFIFO_CNT_V               0xFF
+#define UART_RXFIFO_CNT_S               0
+
+#define UART_CONF0_OFFSET               0x20
+#define UART_CONF0_REG(i)               (REG_UART_BASE(i) + UART_CONF0_OFFSET)
+
+/* UART_TICK_REF_ALWAYS_ON : R/W ;bitpos:[27] ;default: 1'b1 ; */
+/* Description: This register is used to select the clock.1.apb clock
+ * 0:ref_tick
+ */
+
+#define UART_TICK_REF_ALWAYS_ON         (BIT(27))
+#define UART_TICK_REF_ALWAYS_ON_M       (BIT(27))
+#define UART_TICK_REF_ALWAYS_ON_V       0x1
+#define UART_TICK_REF_ALWAYS_ON_S       27
+
+/* UART_ERR_WR_MASK : R/W ;bitpos:[26] ;default: 1'b0 ; */
+/* Description: 1.receiver stops storing data int fifo when data is wrong.
+ * 0.receiver stores the data even if the  received data is wrong.*/
+
+#define UART_ERR_WR_MASK                (BIT(26))
+#define UART_ERR_WR_MASK_M              (BIT(26))
+#define UART_ERR_WR_MASK_V              0x1
+#define UART_ERR_WR_MASK_S              26
+
+/* UART_CLK_EN : R/W ;bitpos:[25] ;default: 1'h0 ; */
+/* Description: 1.force clock on for registers.support clock only when write
+ * registers
+ */
+
+#define UART_CLK_EN                     (BIT(25))
+#define UART_CLK_EN_M                   (BIT(25))
+#define UART_CLK_EN_V                   0x1
+#define UART_CLK_EN_S                   25
+
+/* UART_DTR_INV : R/W ;bitpos:[24] ;default: 1'h0 ; */
+/* Description: Set this bit to inverse the level value of uart dtr signal.*/
+
+#define UART_DTR_INV                    (BIT(24))
+#define UART_DTR_INV_M                  (BIT(24))
+#define UART_DTR_INV_V                  0x1
+#define UART_DTR_INV_S                  24
+
+/* UART_RTS_INV : R/W ;bitpos:[23] ;default: 1'h0 ; */
+/* Description: Set this bit to inverse the level value of uart rts signal.*/
+
+#define UART_RTS_INV                    (BIT(23))
+#define UART_RTS_INV_M                  (BIT(23))
+#define UART_RTS_INV_V                  0x1
+#define UART_RTS_INV_S                  23
+
+/* UART_TXD_INV : R/W ;bitpos:[22] ;default: 1'h0 ; */
+/* Description: Set this bit to inverse the level value of uart txd signal.*/
+
+#define UART_TXD_INV                    (BIT(22))
+#define UART_TXD_INV_M                  (BIT(22))
+#define UART_TXD_INV_V                  0x1
+#define UART_TXD_INV_S                  22
+
+/* UART_DSR_INV : R/W ;bitpos:[21] ;default: 1'h0 ; */
+/* Description: Set this bit to inverse the level value of uart dsr signal.*/
+
+#define UART_DSR_INV                    (BIT(21))
+#define UART_DSR_INV_M                  (BIT(21))
+#define UART_DSR_INV_V                  0x1
+#define UART_DSR_INV_S                  21
+
+/* UART_CTS_INV : R/W ;bitpos:[20] ;default: 1'h0 ; */
+/* Description: Set this bit to inverse the level value of uart cts signal.*/
+
+#define UART_CTS_INV                    (BIT(20))
+#define UART_CTS_INV_M                  (BIT(20))
+#define UART_CTS_INV_V                  0x1
+#define UART_CTS_INV_S                  20
+
+/* UART_RXD_INV : R/W ;bitpos:[19] ;default: 1'h0 ; */
+/* Description: Set this bit to inverse the level value of uart rxd signal.*/
+
+#define UART_RXD_INV                    (BIT(19))
+#define UART_RXD_INV_M                  (BIT(19))
+#define UART_RXD_INV_V                  0x1
+#define UART_RXD_INV_S                  19
+
+/* UART_TXFIFO_RST : R/W ;bitpos:[18] ;default: 1'h0 ; */
+/* Description: Set this bit to reset uart transmitter's fifo.*/
+
+#define UART_TXFIFO_RST                 (BIT(18))
+#define UART_TXFIFO_RST_M               (BIT(18))
+#define UART_TXFIFO_RST_V               0x1
+#define UART_TXFIFO_RST_S               18
+
+/* UART_RXFIFO_RST : R/W ;bitpos:[17] ;default: 1'h0 ; */
+/* Description: Set this bit to reset uart receiver's fifo.*/
+
+#define UART_RXFIFO_RST                 (BIT(17))
+#define UART_RXFIFO_RST_M               (BIT(17))
+#define UART_RXFIFO_RST_V               0x1
+#define UART_RXFIFO_RST_S               17
+
+/* UART_IRDA_EN : R/W ;bitpos:[16] ;default: 1'h0 ; */
+/* Description: Set this bit to enable irda protocol.*/
+
+#define UART_IRDA_EN                    (BIT(16))
+#define UART_IRDA_EN_M                  (BIT(16))
+#define UART_IRDA_EN_V                  0x1
+#define UART_IRDA_EN_S                  16
+
+/* UART_TX_FLOW_EN : R/W ;bitpos:[15] ;default: 1'b0 ; */
+/* Description: Set this bit to enable transmitter's flow control function.*/
+
+#define UART_TX_FLOW_EN                 (BIT(15))
+#define UART_TX_FLOW_EN_M               (BIT(15))
+#define UART_TX_FLOW_EN_V               0x1
+#define UART_TX_FLOW_EN_S               15
+
+/* UART_LOOPBACK : R/W ;bitpos:[14] ;default: 1'b0 ; */
+/* Description: Set this bit to enable uart loopback test mode.*/
+
+#define UART_LOOPBACK                   (BIT(14))
+#define UART_LOOPBACK_M                 (BIT(14))
+#define UART_LOOPBACK_V                 0x1
+#define UART_LOOPBACK_S                 14
+
+/* UART_IRDA_RX_INV : R/W ;bitpos:[13] ;default: 1'b0 ; */
+/* Description: Set this bit to inverse the level value of irda receiver's
+ * level.
+ */
+
+#define UART_IRDA_RX_INV                (BIT(13))
+#define UART_IRDA_RX_INV_M              (BIT(13))
+#define UART_IRDA_RX_INV_V              0x1
+#define UART_IRDA_RX_INV_S              13
+
+/* UART_IRDA_TX_INV : R/W ;bitpos:[12] ;default: 1'b0 ; */
+/* Description: Set this bit to inverse the level value of irda
+ * transmitter's level.
+ */
+
+#define UART_IRDA_TX_INV                (BIT(12))
+#define UART_IRDA_TX_INV_M              (BIT(12))
+#define UART_IRDA_TX_INV_V              0x1
+#define UART_IRDA_TX_INV_S              12
+
+/* UART_IRDA_WCTL : R/W ;bitpos:[11] ;default: 1'b0 ; */
+/* Description: 1.the irda transmitter's 11th bit is the same to the 10th
+ * bit. 0.set irda transmitter's 11th bit to 0.*/
+
+#define UART_IRDA_WCTL                  (BIT(11))
+#define UART_IRDA_WCTL_M                (BIT(11))
+#define UART_IRDA_WCTL_V                0x1
+#define UART_IRDA_WCTL_S                11
+
+/* UART_IRDA_TX_EN : R/W ;bitpos:[10] ;default: 1'b0 ; */
+/* Description: This is the start enable bit for irda transmitter.*/
+
+#define UART_IRDA_TX_EN                 (BIT(10))
+#define UART_IRDA_TX_EN_M               (BIT(10))
+#define UART_IRDA_TX_EN_V               0x1
+#define UART_IRDA_TX_EN_S               10
+
+/* UART_IRDA_DPLX : R/W ;bitpos:[9] ;default: 1'b0 ; */
+/* Description: Set this bit to enable irda loopback mode.*/
+
+#define UART_IRDA_DPLX                  (BIT(9))
+#define UART_IRDA_DPLX_M                (BIT(9))
+#define UART_IRDA_DPLX_V                0x1
+#define UART_IRDA_DPLX_S                9
+
+/* UART_TXD_BRK : R/W ;bitpos:[8] ;default: 1'b0 ; */
+/* Description: Set this bit to enbale transmitter to  send 0 when the
+ * process of sending data is done.
+ */
+
+#define UART_TXD_BRK                    (BIT(8))
+#define UART_TXD_BRK_M                  (BIT(8))
+#define UART_TXD_BRK_V                  0x1
+#define UART_TXD_BRK_S                  8
+
+/* UART_SW_DTR : R/W ;bitpos:[7] ;default: 1'b0 ; */
+/* Description: This register is used to configure the software dtr signal
+ * which is used in software flow control.
+ */
+
+#define UART_SW_DTR                     (BIT(7))
+#define UART_SW_DTR_M                   (BIT(7))
+#define UART_SW_DTR_V                   0x1
+#define UART_SW_DTR_S                   7
+
+/* UART_SW_RTS : R/W ;bitpos:[6] ;default: 1'b0 ; */
+/* Description: This register is used to configure the software rts signal
+ * which is used in software flow control.
+ */
+
+#define UART_SW_RTS                     (BIT(6))
+#define UART_SW_RTS_M                   (BIT(6))
+#define UART_SW_RTS_V                   0x1
+#define UART_SW_RTS_S                   6
+
+/* UART_STOP_BIT_NUM : R/W ;bitpos:[5:4] ;default: 2'd1 ; */
+/* Description: This register is used to set the length of stop bit.
+ * 1:1bit  2:1.5bits  3:2bits
+ */
+
+#define UART_STOP_BIT_NUM               0x00000003
+#define UART_STOP_BIT_NUM_M             ((UART_STOP_BIT_NUM_V) << (UART_STOP_BIT_NUM_S))
+#define UART_STOP_BIT_NUM_V             0x3
+#define UART_STOP_BIT_NUM_S             4
+
+/* UART_BIT_NUM : R/W ;bitpos:[3:2] ;default: 2'd3 ; */
+/* Description: This registe is used to set the length of data:
+ * 0:5bits 1:6bits 2:7bits 3:8bits
+ */
+
+#define UART_BIT_NUM                    0x00000003
+#define UART_BIT_NUM_M                  ((UART_BIT_NUM_V) << (UART_BIT_NUM_S))
+#define UART_BIT_NUM_V                  0x3
+#define UART_BIT_NUM_S                  2
+
+/* UART_PARITY_EN : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/* Description: Set this bit to enable uart parity check.*/
+
+#define UART_PARITY_EN                  (BIT(1))
+#define UART_PARITY_EN_M                (BIT(1))
+#define UART_PARITY_EN_V                0x1
+#define UART_PARITY_EN_S                1
+
+/* UART_PARITY : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: This register is used to configure the parity check mode.
+ * 0:even 1:odd
+ */
+
+#define UART_PARITY                     (BIT(0))
+#define UART_PARITY_M                   (BIT(0))
+#define UART_PARITY_V                   0x1
+#define UART_PARITY_S                   0
+
+#define UART_CONF1_OFFSET               0x24
+#define UART_CONF1_REG(i)               (REG_UART_BASE(i) + UART_CONF1_OFFSET)
+
+/* UART_RX_TOUT_EN : R/W ;bitpos:[31] ;default: 1'b0 ; */
+/* Description: This is the enble bit for uart receiver's timeout function.*/
+
+#define UART_RX_TOUT_EN                 (BIT(31))
+#define UART_RX_TOUT_EN_M               (BIT(31))
+#define UART_RX_TOUT_EN_V               0x1
+#define UART_RX_TOUT_EN_S               31
+
+/* UART_RX_TOUT_THRHD : R/W ;bitpos:[30:24] ;default: 7'b0 ; */
+/* Description: This register is used to configure the timeout value for
+ * uart receiver receiving a byte.
+ */
+
+#define UART_RX_TOUT_THRHD              0x0000007F
+#define UART_RX_TOUT_THRHD_M            ((UART_RX_TOUT_THRHD_V) << (UART_RX_TOUT_THRHD_S))
+#define UART_RX_TOUT_THRHD_V            0x7F
+#define UART_RX_TOUT_THRHD_S            24
+
+/* UART_RX_FLOW_EN : R/W ;bitpos:[23] ;default: 1'b0 ; */
+/* Description: This is the flow enable bit for uart receiver. 1:choose
+ * software flow control with configuring sw_rts signal
+ */
+
+#define UART_RX_FLOW_EN                 (BIT(23))
+#define UART_RX_FLOW_EN_M               (BIT(23))
+#define UART_RX_FLOW_EN_V               0x1
+#define UART_RX_FLOW_EN_S               23
+
+/* UART_RX_FLOW_THRHD : R/W ;bitpos:[22:16] ;default: 7'h0 ; */
+/* Description: when receiver receives more data than its threshold value.
+ * receiver produce signal to tell the transmitter stop transferring data.
+ * the threshold value is (rx_flow_thrhd_h3 rx_flow_thrhd).
+ */
+
+#define UART_RX_FLOW_THRHD              0x0000007F
+#define UART_RX_FLOW_THRHD_M            ((UART_RX_FLOW_THRHD_V) << (UART_RX_FLOW_THRHD_S))
+#define UART_RX_FLOW_THRHD_V            0x7F
+#define UART_RX_FLOW_THRHD_S            16
+
+/* UART_TXFIFO_EMPTY_THRHD : R/W ;bitpos:[14:8] ;default: 7'h60 ; */
+/* Description: when the data amount in transmitter fifo is less than its
+ * threshold value. it will produce txfifo_empty_int_raw interrupt. the
+ * threshold value is (tx_mem_empty_thrhd txfifo_empty_thrhd)
+ */
+
+#define UART_TXFIFO_EMPTY_THRHD         0x0000007F
+#define UART_TXFIFO_EMPTY_THRHD_M       ((UART_TXFIFO_EMPTY_THRHD_V) << (UART_TXFIFO_EMPTY_THRHD_S))
+#define UART_TXFIFO_EMPTY_THRHD_V       0x7F
+#define UART_TXFIFO_EMPTY_THRHD_S       8
+
+/* UART_RXFIFO_FULL_THRHD : R/W ;bitpos:[6:0] ;default: 7'h60 ; */
+/* Description: When receiver receives more data than its threshold
+ * value.receiver will produce rxfifo_full_int_raw interrupt.the threshold
+ * value is (rx_flow_thrhd_h3 rxfifo_full_thrhd).
+ */
+
+#define UART_RXFIFO_FULL_THRHD          0x0000007F
+#define UART_RXFIFO_FULL_THRHD_M        ((UART_RXFIFO_FULL_THRHD_V) << (UART_RXFIFO_FULL_THRHD_S))
+#define UART_RXFIFO_FULL_THRHD_V        0x7F
+#define UART_RXFIFO_FULL_THRHD_S        0
+
+#define UART_LOWPULSE_OFFSET            0x28
+#define UART_LOWPULSE_REG(i)            (REG_UART_BASE(i) + UART_LOWPULSE_OFFSET)
+
+/* UART_LOWPULSE_MIN_CNT : RO ;bitpos:[19:0] ;default: 20'hFFFFF ; */
+/* Description: This register stores the value of the minimum duration time
+ * for the low level pulse. it is used in baudrate-detect process.
+ */
+
+#define UART_LOWPULSE_MIN_CNT           0x000FFFFF
+#define UART_LOWPULSE_MIN_CNT_M         ((UART_LOWPULSE_MIN_CNT_V) << (UART_LOWPULSE_MIN_CNT_S))
+#define UART_LOWPULSE_MIN_CNT_V         0xFFFFF
+#define UART_LOWPULSE_MIN_CNT_S         0
+
+#define UART_HIGHPULSE_OFFSET           0x2c
+#define UART_HIGHPULSE_REG(i)           (REG_UART_BASE(i) + UART_HIGHPULSE_OFFSET)
+
+/* UART_HIGHPULSE_MIN_CNT : RO ;bitpos:[19:0] ;default: 20'hFFFFF ; */
+/* Description: This register stores  the value of the maxinum duration time
+ * for the high level pulse. it is used in baudrate-detect process.
+ */
+
+#define UART_HIGHPULSE_MIN_CNT          0x000FFFFF
+#define UART_HIGHPULSE_MIN_CNT_M        ((UART_HIGHPULSE_MIN_CNT_V) << (UART_HIGHPULSE_MIN_CNT_S))
+#define UART_HIGHPULSE_MIN_CNT_V        0xFFFFF
+#define UART_HIGHPULSE_MIN_CNT_S        0
+
+#define UART_RXD_CNT_OFFSET             0x30
+#define UART_RXD_CNT_REG(i)             (REG_UART_BASE(i) + UART_RXD_CNT_OFFSET)
+
+/* UART_RXD_EDGE_CNT : RO ;bitpos:[9:0] ;default: 10'h0 ; */
+/* Description: This register stores the count of rxd edge change. it is
+ * used in baudrate-detect process.
+ */
+
+#define UART_RXD_EDGE_CNT               0x000003FF
+#define UART_RXD_EDGE_CNT_M             ((UART_RXD_EDGE_CNT_V) << (UART_RXD_EDGE_CNT_S))
+#define UART_RXD_EDGE_CNT_V             0x3FF
+#define UART_RXD_EDGE_CNT_S             0
+
+#define UART_FLOW_CONF_OFFSET           0x34
+#define UART_FLOW_CONF_REG(i)           (REG_UART_BASE(i) + UART_FLOW_CONF_OFFSET)
+
+/* UART_SEND_XOFF : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/* Description: Set this bit to send xoff char. it is cleared by hardware
+ * automatically.
+ */
+
+#define UART_SEND_XOFF                  (BIT(5))
+#define UART_SEND_XOFF_M                (BIT(5))
+#define UART_SEND_XOFF_V                0x1
+#define UART_SEND_XOFF_S                5
+
+/* UART_SEND_XON : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/* Description: Set this bit to send xon char. it is cleared by hardware
+ * automatically.
+ */
+
+#define UART_SEND_XON                   (BIT(4))
+#define UART_SEND_XON_M                 (BIT(4))
+#define UART_SEND_XON_V                 0x1
+#define UART_SEND_XON_S                 4
+
+/* UART_FORCE_XOFF : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/* Description: Set this bit to set ctsn to enable the transmitter to go on
+ * sending data.
+ */
+
+#define UART_FORCE_XOFF                 (BIT(3))
+#define UART_FORCE_XOFF_M               (BIT(3))
+#define UART_FORCE_XOFF_V               0x1
+#define UART_FORCE_XOFF_S               3
+
+/* UART_FORCE_XON : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/* Description: Set this bit to clear ctsn to stop the  transmitter from
+ * sending data.
+ */
+
+#define UART_FORCE_XON                  (BIT(2))
+#define UART_FORCE_XON_M                (BIT(2))
+#define UART_FORCE_XON_V                0x1
+#define UART_FORCE_XON_S                2
+
+/* UART_XONOFF_DEL : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/* Description: Set this bit to remove flow control char from the received
+ * data.
+ */
+
+#define UART_XONOFF_DEL                 (BIT(1))
+#define UART_XONOFF_DEL_M               (BIT(1))
+#define UART_XONOFF_DEL_V               0x1
+#define UART_XONOFF_DEL_S               1
+
+/* UART_SW_FLOW_CON_EN : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: Set this bit to enable software  flow control. it is used
+ * with register sw_xon or sw_xoff.
+ */
+
+#define UART_SW_FLOW_CON_EN             (BIT(0))
+#define UART_SW_FLOW_CON_EN_M           (BIT(0))
+#define UART_SW_FLOW_CON_EN_V           0x1
+#define UART_SW_FLOW_CON_EN_S           0
+
+#define UART_SLEEP_CONF_OFFSET          0x38
+#define UART_SLEEP_CONF_REG(i)          (REG_UART_BASE(i) + UART_SLEEP_CONF_OFFSET)
+
+/* UART_ACTIVE_THRESHOLD : R/W ;bitpos:[9:0] ;default: 10'hf0 ; */
+/* Description: When the input rxd edge changes more than this register
+ * value. the uart is active from light sleeping mode.
+ */
+
+#define UART_ACTIVE_THRESHOLD           0x000003FF
+#define UART_ACTIVE_THRESHOLD_M         ((UART_ACTIVE_THRESHOLD_V) << (UART_ACTIVE_THRESHOLD_S))
+#define UART_ACTIVE_THRESHOLD_V         0x3FF
+#define UART_ACTIVE_THRESHOLD_S         0
+
+#define UART_SWFC_CONF_OFFSET           0x3c
+#define UART_SWFC_CONF_REG(i)           (REG_UART_BASE(i) + UART_SWFC_CONF_OFFSET)
+
+/* UART_XOFF_CHAR : R/W ;bitpos:[31:24] ;default: 8'h13 ; */
+/* Description: This register stores the xoff flow control char.*/
+
+#define UART_XOFF_CHAR                  0x000000FF
+#define UART_XOFF_CHAR_M                ((UART_XOFF_CHAR_V) << (UART_XOFF_CHAR_S))
+#define UART_XOFF_CHAR_V                0xFF
+#define UART_XOFF_CHAR_S                24
+
+/* UART_XON_CHAR : R/W ;bitpos:[23:16] ;default: 8'h11 ; */
+/* Description: This register stores the xon flow control char.*/
+
+#define UART_XON_CHAR                   0x000000FF
+#define UART_XON_CHAR_M                 ((UART_XON_CHAR_V) << (UART_XON_CHAR_S))
+#define UART_XON_CHAR_V                 0xFF
+#define UART_XON_CHAR_S                 16
+
+/* UART_XOFF_THRESHOLD : R/W ;bitpos:[15:8] ;default: 8'he0 ; */
+/* Description: When the data amount in receiver's fifo is less than this
+ * register value. it will send a xon char with uart_sw_flow_con_en set to
+ * 1.
+ */
+
+#define UART_XOFF_THRESHOLD             0x000000FF
+#define UART_XOFF_THRESHOLD_M           ((UART_XOFF_THRESHOLD_V) << (UART_XOFF_THRESHOLD_S))
+#define UART_XOFF_THRESHOLD_V           0xFF
+#define UART_XOFF_THRESHOLD_S           8
+
+/* UART_XON_THRESHOLD : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
+/* Description: when the data amount in receiver's fifo is more than this
+ * register value. it will send a xoff char with uart_sw_flow_con_en set to
+ * 1.
+ */
+
+#define UART_XON_THRESHOLD              0x000000FF
+#define UART_XON_THRESHOLD_M            ((UART_XON_THRESHOLD_V) << (UART_XON_THRESHOLD_S))
+#define UART_XON_THRESHOLD_V            0xFF
+#define UART_XON_THRESHOLD_S            0
+
+#define UART_IDLE_CONF_OFFSET           0x40
+#define UART_IDLE_CONF_REG(i)           (REG_UART_BASE(i) + UART_IDLE_CONF_OFFSET)
+
+/* UART_TX_BRK_NUM : R/W ;bitpos:[27:20] ;default: 8'ha ; */
+/* Description: This register is used to configure the num of 0 send after
+ * the process of sending data is done. it is active when txd_brk is set to
+ * 1.
+ */
+
+#define UART_TX_BRK_NUM                 0x000000FF
+#define UART_TX_BRK_NUM_M               ((UART_TX_BRK_NUM_V) << (UART_TX_BRK_NUM_S))
+#define UART_TX_BRK_NUM_V               0xFF
+#define UART_TX_BRK_NUM_S               20
+
+/* UART_TX_IDLE_NUM : R/W ;bitpos:[19:10] ;default: 10'h100 ; */
+/* Description: This register is used to configure the duration time
+ * between transfers.
+ */
+
+#define UART_TX_IDLE_NUM                0x000003FF
+#define UART_TX_IDLE_NUM_M              ((UART_TX_IDLE_NUM_V) << (UART_TX_IDLE_NUM_S))
+#define UART_TX_IDLE_NUM_V              0x3FF
+#define UART_TX_IDLE_NUM_S              10
+
+/* UART_RX_IDLE_THRHD : R/W ;bitpos:[9:0] ;default: 10'h100 ; */
+/* Description: when receiver takes more time than this register value to
+ * receive a byte data. it will produce frame end signal for uhci to stop
+ * receiving data.
+ */
+
+#define UART_RX_IDLE_THRHD              0x000003FF
+#define UART_RX_IDLE_THRHD_M            ((UART_RX_IDLE_THRHD_V) << (UART_RX_IDLE_THRHD_S))
+#define UART_RX_IDLE_THRHD_V            0x3FF
+#define UART_RX_IDLE_THRHD_S            0
+
+#define UART_RS485_CONF_OFFSET          0x44
+#define UART_RS485_CONF_REG(i)          (REG_UART_BASE(i) + UART_RS485_CONF_OFFSET)
+
+/* UART_RS485_TX_DLY_NUM : R/W ;bitpos:[9:6] ;default: 4'b0 ; */
+/* Description: This register is used to delay the transmitter's internal
+ * data signal.
+ */
+
+#define UART_RS485_TX_DLY_NUM           0x0000000F
+#define UART_RS485_TX_DLY_NUM_M         ((UART_RS485_TX_DLY_NUM_V) << (UART_RS485_TX_DLY_NUM_S))
+#define UART_RS485_TX_DLY_NUM_V         0xF
+#define UART_RS485_TX_DLY_NUM_S         6
+
+/* UART_RS485_RX_DLY_NUM : R/W ;bitpos:[5] ;default: 1'b0 ; */
+/* Description: This register is used to delay the receiver's internal data
+ * signal.
+ */
+
+#define UART_RS485_RX_DLY_NUM           (BIT(5))
+#define UART_RS485_RX_DLY_NUM_M         (BIT(5))
+#define UART_RS485_RX_DLY_NUM_V         0x1
+#define UART_RS485_RX_DLY_NUM_S         5
+
+/* UART_RS485RXBY_TX_EN : R/W ;bitpos:[4] ;default: 1'b0 ; */
+/* Description: 1: enable rs485's transmitter to send data when rs485's
+ * receiver is busy. 0:rs485's transmitter should not send data when its
+ * receiver is busy.
+ */
+
+#define UART_RS485RXBY_TX_EN            (BIT(4))
+#define UART_RS485RXBY_TX_EN_M          (BIT(4))
+#define UART_RS485RXBY_TX_EN_V          0x1
+#define UART_RS485RXBY_TX_EN_S          4
+
+/* UART_RS485TX_RX_EN : R/W ;bitpos:[3] ;default: 1'b0 ; */
+/* Description: Set this bit to enable loopback transmitter's output data
+ * signal to receiver's input data signal.
+ */
+
+#define UART_RS485TX_RX_EN              (BIT(3))
+#define UART_RS485TX_RX_EN_M            (BIT(3))
+#define UART_RS485TX_RX_EN_V            0x1
+#define UART_RS485TX_RX_EN_S            3
+
+/* UART_DL1_EN : R/W ;bitpos:[2] ;default: 1'b0 ; */
+/* Description: Set this bit to delay the stop bit by 1 bit.*/
+
+#define UART_DL1_EN                     (BIT(2))
+#define UART_DL1_EN_M                   (BIT(2))
+#define UART_DL1_EN_V                   0x1
+#define UART_DL1_EN_S                   2
+
+/* UART_DL0_EN : R/W ;bitpos:[1] ;default: 1'b0 ; */
+/* Description: Set this bit to delay the stop bit by 1 bit.*/
+
+#define UART_DL0_EN                     (BIT(1))
+#define UART_DL0_EN_M                   (BIT(1))
+#define UART_DL0_EN_V                   0x1
+#define UART_DL0_EN_S                   1
+
+/* UART_RS485_EN : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: Set this bit to choose rs485 mode.*/
+
+#define UART_RS485_EN                   (BIT(0))
+#define UART_RS485_EN_M                 (BIT(0))
+#define UART_RS485_EN_V                 0x1
+#define UART_RS485_EN_S                 0
+
+#define UART_AT_CMD_PRECNT_OFFSET       0x48
+#define UART_AT_CMD_PRECNT_REG(i)       (REG_UART_BASE(i) + 0x48)
+
+/* UART_PRE_IDLE_NUM : R/W ;bitpos:[23:0] ;default: 24'h186a00 ; */
+/* Description: This register is used to configure the idle duration time
+ * before the first at_cmd is received by receiver. when the the duration
+ * is less than this register value it will not take the next data received
+ * as at_cmd char.
+ */
+
+#define UART_PRE_IDLE_NUM               0x00FFFFFF
+#define UART_PRE_IDLE_NUM_M             ((UART_PRE_IDLE_NUM_V) << (UART_PRE_IDLE_NUM_S))
+#define UART_PRE_IDLE_NUM_V             0xFFFFFF
+#define UART_PRE_IDLE_NUM_S             0
+
+#define UART_AT_CMD_POSTCNT_OFFSET      0x4c
+#define UART_AT_CMD_POSTCNT_REG(i)      (REG_UART_BASE(i) + UART_AT_CMD_POSTCNT_OFFSET)
+
+/* UART_POST_IDLE_NUM : R/W ;bitpos:[23:0] ;default: 24'h186a00 ; */
+/* Description: This register is used to configure the duration time between
+ * the last at_cmd and the next data. when the duration is less than this
+ * register value  it will not take the previous data as at_cmd char.
+ */
+
+#define UART_POST_IDLE_NUM              0x00FFFFFF
+#define UART_POST_IDLE_NUM_M            ((UART_POST_IDLE_NUM_V) << (UART_POST_IDLE_NUM_S))
+#define UART_POST_IDLE_NUM_V            0xFFFFFF
+#define UART_POST_IDLE_NUM_S            0
+
+#define UART_AT_CMD_GAPTOUT_OFFSET      0x50
+#define UART_AT_CMD_GAPTOUT_REG(i)      (REG_UART_BASE(i) + 0x50)
+
+/* UART_RX_GAP_TOUT : R/W ;bitpos:[23:0] ;default: 24'h1e00 ; */
+/* Description: This register is used to configure the duration time between
+ * the at_cmd chars. when the duration time is less than this register
+ * value it will not take the datas as continous at_cmd chars.
+ */
+
+#define UART_RX_GAP_TOUT                0x00FFFFFF
+#define UART_RX_GAP_TOUT_M              ((UART_RX_GAP_TOUT_V) << (UART_RX_GAP_TOUT_S))
+#define UART_RX_GAP_TOUT_V              0xFFFFFF
+#define UART_RX_GAP_TOUT_S              0
+
+#define UART_AT_CMD_CHAR_OFFSET         0x54
+#define UART_AT_CMD_CHAR_REG(i)         (REG_UART_BASE(i) + UART_AT_CMD_CHAR_OFFSET)
+
+/* UART_CHAR_NUM : R/W ;bitpos:[15:8] ;default: 8'h3 ; */
+/* Description: This register is used to configure the num of continous
+ * at_cmd chars received by receiver.
+ */
+
+#define UART_CHAR_NUM                   0x000000FF
+#define UART_CHAR_NUM_M                 ((UART_CHAR_NUM_V) << (UART_CHAR_NUM_S))
+#define UART_CHAR_NUM_V                 0xFF
+#define UART_CHAR_NUM_S                 8
+
+/* UART_AT_CMD_CHAR : R/W ;bitpos:[7:0] ;default: 8'h2b ; */
+/* Description: This register is used to configure the content of at_cmd
+ * char.
+ */
+
+#define UART_AT_CMD_CHAR                0x000000FF
+#define UART_AT_CMD_CHAR_M              ((UART_AT_CMD_CHAR_V) << (UART_AT_CMD_CHAR_S))
+#define UART_AT_CMD_CHAR_V              0xFF
+#define UART_AT_CMD_CHAR_S              0
+
+#define UART_MEM_CONF_OFFSET            0x58
+#define UART_MEM_CONF_REG(i)            (REG_UART_BASE(i) + UART_MEM_CONF_OFFSET)
+
+/* UART_TX_MEM_EMPTY_THRHD : R/W ;bitpos:[30:28] ;default: 3'h0 ; */
+/* Description: refer to txfifo_empty_thrhd 's describtion.*/
+
+#define UART_TX_MEM_EMPTY_THRHD         0x00000007
+#define UART_TX_MEM_EMPTY_THRHD_M       ((UART_TX_MEM_EMPTY_THRHD_V) << (UART_TX_MEM_EMPTY_THRHD_S))
+#define UART_TX_MEM_EMPTY_THRHD_V       0x7
+#define UART_TX_MEM_EMPTY_THRHD_S       28
+
+/* UART_RX_MEM_FULL_THRHD : R/W ;bitpos:[27:25] ;default: 3'h0 ; */
+/* Description: refer to the rxfifo_full_thrhd's describtion.*/
+
+#define UART_RX_MEM_FULL_THRHD          0x00000007
+#define UART_RX_MEM_FULL_THRHD_M        ((UART_RX_MEM_FULL_THRHD_V) << (UART_RX_MEM_FULL_THRHD_S))
+#define UART_RX_MEM_FULL_THRHD_V        0x7
+#define UART_RX_MEM_FULL_THRHD_S        25
+
+/* UART_XOFF_THRESHOLD_H2 : R/W ;bitpos:[24:23] ;default: 2'h0 ; */
+/* Description: refer to the uart_xoff_threshold's describtion.*/
+
+#define UART_XOFF_THRESHOLD_H2          0x00000003
+#define UART_XOFF_THRESHOLD_H2_M        ((UART_XOFF_THRESHOLD_H2_V) << (UART_XOFF_THRESHOLD_H2_S))
+#define UART_XOFF_THRESHOLD_H2_V        0x3
+#define UART_XOFF_THRESHOLD_H2_S        23
+
+/* UART_XON_THRESHOLD_H2 : R/W ;bitpos:[22:21] ;default: 2'h0 ; */
+/* Description: refer to the uart_xon_threshold's describtion.*/
+
+#define UART_XON_THRESHOLD_H2           0x00000003
+#define UART_XON_THRESHOLD_H2_M         ((UART_XON_THRESHOLD_H2_V) << (UART_XON_THRESHOLD_H2_S))
+#define UART_XON_THRESHOLD_H2_V         0x3
+#define UART_XON_THRESHOLD_H2_S         21
+
+/* UART_RX_TOUT_THRHD_H3 : R/W ;bitpos:[20:18] ;default: 3'h0 ; */
+/* Description: refer to the rx_tout_thrhd's describtion.*/
+
+#define UART_RX_TOUT_THRHD_H3           0x00000007
+#define UART_RX_TOUT_THRHD_H3_M         ((UART_RX_TOUT_THRHD_H3_V) << (UART_RX_TOUT_THRHD_H3_S))
+#define UART_RX_TOUT_THRHD_H3_V         0x7
+#define UART_RX_TOUT_THRHD_H3_S         18
+
+/* UART_RX_FLOW_THRHD_H3 : R/W ;bitpos:[17:15] ;default: 3'h0 ; */
+/* Description: refer to the rx_flow_thrhd's describtion.*/
+
+#define UART_RX_FLOW_THRHD_H3           0x00000007
+#define UART_RX_FLOW_THRHD_H3_M         ((UART_RX_FLOW_THRHD_H3_V) << (UART_RX_FLOW_THRHD_H3_S))
+#define UART_RX_FLOW_THRHD_H3_V         0x7
+#define UART_RX_FLOW_THRHD_H3_S         15
+
+/* UART_TX_SIZE : R/W ;bitpos:[10:7] ;default: 4'h1 ; */
+/* Description: This register is used to configure the amount of mem
+ * allocated to transmitter's fifo.the default byte num is 128.
+ */
+
+#define UART_TX_SIZE                    0x0000000F
+#define UART_TX_SIZE_M                  ((UART_TX_SIZE_V) << (UART_TX_SIZE_S))
+#define UART_TX_SIZE_V                  0xF
+#define UART_TX_SIZE_S                  7
+
+/* UART_RX_SIZE : R/W ;bitpos:[6:3] ;default: 4'h1 ; */
+/* Description: This register is used to configure the amount of mem
+ * allocated to receiver's fifo. the default byte num is 128.
+ */
+
+#define UART_RX_SIZE                    0x0000000F
+#define UART_RX_SIZE_M                  ((UART_RX_SIZE_V) << (UART_RX_SIZE_S))
+#define UART_RX_SIZE_V                  0xF
+#define UART_RX_SIZE_S                  3
+
+/* UART_MEM_PD : R/W ;bitpos:[0] ;default: 1'b0 ; */
+/* Description: Set this bit to power down mem.when reg_mem_pd registers in
+ * the 3 uarts are all set to 1  mem will enter low power mode.
+ */
+
+#define UART_MEM_PD                     (BIT(0))
+#define UART_MEM_PD_M                   (BIT(0))
+#define UART_MEM_PD_V                   0x1
+#define UART_MEM_PD_S                   0
+
+#define UART_MEM_TX_STATUS_OFFSET       0x5c
+#define UART_MEM_TX_STATUS_REG(i)       (REG_UART_BASE(i) + UART_MEM_TX_STATUS_OFFSET)
+
+/* UART_MEM_TX_STATUS : RO ;bitpos:[23:0] ;default: 24'h0 ; */
+/* Description: */
+
+#define UART_MEM_TX_STATUS              0x00FFFFFF
+#define UART_MEM_TX_STATUS_M            ((UART_MEM_TX_STATUS_V) << (UART_MEM_TX_STATUS_S))
+#define UART_MEM_TX_STATUS_V            0xFFFFFF
+#define UART_MEM_TX_STATUS_S            0
+
+#define UART_MEM_RX_STATUS_OFFSET       0x60
+#define UART_MEM_RX_STATUS_REG(i)       (REG_UART_BASE(i) + UART_MEM_RX_STATUS_OFFSET)
+
+/* UART_MEM_RX_STATUS : RO ;bitpos:[23:0] ;default: 24'h0 ; */
+/* Description: */
+
+#define UART_MEM_RX_STATUS              0x00FFFFFF
+#define UART_MEM_RX_STATUS_M            ((UART_MEM_RX_STATUS_V) << (UART_MEM_RX_STATUS_S))
+#define UART_MEM_RX_STATUS_V            0xFFFFFF
+#define UART_MEM_RX_STATUS_S            0
+
+#define UART_MEM_CNT_STATUS_OFFSET      0x64
+#define UART_MEM_CNT_STATUS_REG(i)      (REG_UART_BASE(i) + UART_MEM_CNT_STATUS_OFFSET)
+
+/* UART_TX_MEM_CNT : RO ;bitpos:[5:3] ;default: 3'b0 ; */
+/* Description: refer to the txfifo_cnt's describtion.*/
+
+#define UART_TX_MEM_CNT                 0x00000007
+#define UART_TX_MEM_CNT_M               ((UART_TX_MEM_CNT_V) << (UART_TX_MEM_CNT_S))
+#define UART_TX_MEM_CNT_V               0x7
+#define UART_TX_MEM_CNT_S               3
+
+/* UART_RX_MEM_CNT : RO ;bitpos:[2:0] ;default: 3'b0 ; */
+/* Description: refer to the rxfifo_cnt's describtion.*/
+
+#define UART_RX_MEM_CNT                 0x00000007
+#define UART_RX_MEM_CNT_M               ((UART_RX_MEM_CNT_V) << (UART_RX_MEM_CNT_S))
+#define UART_RX_MEM_CNT_V               0x7
+#define UART_RX_MEM_CNT_S               0
+
+#define UART_POSPULSE_OFFSET            0x68
+#define UART_POSPULSE_REG(i)            (REG_UART_BASE(i) + 0x68)
+
+/* UART_POSEDGE_MIN_CNT : RO ;bitpos:[19:0] ;default: 20'hFFFFF ; */
+/* Description: This register stores the count of rxd posedge edge. it is
+ * used in boudrate-detect process.
+ */
+
+#define UART_POSEDGE_MIN_CNT            0x000FFFFF
+#define UART_POSEDGE_MIN_CNT_M          ((UART_POSEDGE_MIN_CNT_V) << (UART_POSEDGE_MIN_CNT_S))
+#define UART_POSEDGE_MIN_CNT_V          0xFFFFF
+#define UART_POSEDGE_MIN_CNT_S          0
+
+#define UART_NEGPULSE_OFFSET            0x6c
+#define UART_NEGPULSE_REG(i)            (REG_UART_BASE(i) + UART_NEGPULSE_OFFSET)
+
+/* UART_NEGEDGE_MIN_CNT : RO ;bitpos:[19:0] ;default: 20'hFFFFF ; */
+/* Description: This register stores the count of rxd negedge edge. it is
+ * used in boudrate-detect process.
+ */
+
+#define UART_NEGEDGE_MIN_CNT            0x000FFFFF
+#define UART_NEGEDGE_MIN_CNT_M          ((UART_NEGEDGE_MIN_CNT_V) << (UART_NEGEDGE_MIN_CNT_S))
+#define UART_NEGEDGE_MIN_CNT_V          0xFFFFF
+#define UART_NEGEDGE_MIN_CNT_S          0
+
+#define UART_DATE_OFFSET                0x78
+#define UART_DATE_REG(i)                (REG_UART_BASE(i) + 0x78)
+
+/* UART_DATE : R/W ;bitpos:[31:0] ;default: 32'h15122500 ; */
+/* Description: */
+
+#define UART_DATE                       0xFFFFFFFF
+#define UART_DATE_M                     ((UART_DATE_V) << (UART_DATE_S))
+#define UART_DATE_V                     0xFFFFFFFF
+#define UART_DATE_S                     0
+
+#define UART_ID_OFFSET                  0x7c
+#define UART_ID_REG(i)                  (REG_UART_BASE(i) + UART_ID_OFFSET)
+
+/* UART_ID : R/W ;bitpos:[31:0] ;default: 32'h0500 ; */
+/* Description: */
+
+#define UART_ID                         0xFFFFFFFF
+#define UART_ID_M                       ((UART_ID_V) << (UART_ID_S))
+#define UART_ID_V                       0xFFFFFFFF
+#define UART_ID_S                       0
+
+#endif /*__ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_UART_H */
diff --git a/arch/xtensa/src/esp32/chip_macros.h b/arch/xtensa/src/esp32/chip_macros.h
new file mode 100644
index 0000000000000000000000000000000000000000..62add87fa231cbc3108d31c385ed97483b19161c
--- /dev/null
+++ b/arch/xtensa/src/esp32/chip_macros.h
@@ -0,0 +1,75 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/chip_macros.h
+ *
+ * Adapted from use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from logic originally provided by Cadence Design Systems Inc.
+ *
+ *   Copyright (c) 2006-2015 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_ESP32_CHIP_MACROS_H
+#define __ARCH_XTENSA_SRC_ESP32_CHIP_MACROS_H 1
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* This is the name of the section containing the Xtensa low level handlers
+ * that is used by the board linker scripts.
+ */
+
+#define HANDLER_SECTION .iram1
+
+/****************************************************************************
+ * Assembly Language Macros
+ ****************************************************************************/
+
+#ifdef __ASSEMBLY__
+
+/* Macro to get the current core ID. Only uses the reg given as an argument.
+ * Reading PRID on the ESP108 architecture gives us 0xcdcd on the PRO
+ * processor and 0xabab on the APP CPU. We distinguish between the two by
+ * simply checking bit 1: it's 1 on the APP and 0 on the PRO processor.
+ */
+
+	.macro		getcoreid reg
+	rsr.prid	\reg
+	bbci		\reg, 1, 1f
+	movi		\reg, 1
+	j			2f
+1:
+	movi		\reg, 0
+2:
+	.endm
+
+#endif /* __ASSEMBLY */
+#endif /* __ARCH_XTENSA_SRC_ESP32_CHIP_MACROS_H */
diff --git a/arch/xtensa/src/esp32/esp32_allocateheap.c b/arch/xtensa/src/esp32/esp32_allocateheap.c
new file mode 100644
index 0000000000000000000000000000000000000000..c0b3b8221845431baaddc020065875a350983ae3
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_allocateheap.c
@@ -0,0 +1,92 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_allocateheap.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "xtensa.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_allocate_heap
+ *
+ * Description:
+ *   This function will be called to dynamically set aside the heap region.
+ *
+ *   For the kernel build (CONFIG_BUILD_KERNEL=y) with both kernel- and
+ *   user-space heaps (CONFIG_MM_KERNEL_HEAP=y), this function provides the
+ *   size of the unprotected, user-space heap.
+ *
+ *   If a protected kernel-space heap is provided, the kernel heap must be
+ *   allocated (and protected) by an analogous up_allocate_kheap().
+ *
+ ****************************************************************************/
+
+#warning REVISIT heap.  Do what with non-heterogeneous memory?
+
+void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
+{
+  board_autoled_on(LED_HEAPALLOCATE);
+  *heap_start = (FAR void *)&_sheap;
+  *heap_size = (size_t)((uintptr_t)&_eheap - (uintptr_t)&_sheap);
+}
+
+/****************************************************************************
+ * Name: xtensa_add_region
+ *
+ * Description:
+ *   Memory may be added in non-contiguous chunks.  Additional chunks are
+ *   added by calling this function.
+ *
+ ****************************************************************************/
+
+#if CONFIG_MM_REGIONS > 1
+void xtensa_add_region(void)
+{
+}
+#endif
diff --git a/arch/xtensa/src/esp32/esp32_clockconfig.c b/arch/xtensa/src/esp32/esp32_clockconfig.c
new file mode 100644
index 0000000000000000000000000000000000000000..cabcb1197b29c9b6a5c7d5988ae1b40672c6bbe4
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_clockconfig.c
@@ -0,0 +1,113 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_clockconfig.C
+ *
+ * Mofidifed by use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from software originally provided by Expressif Systems:
+ *
+ * Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include "xtensa.h"
+
+#ifndef CONFIG_SUPPRESS_CLOCK_CONFIG
+#warning REVISIT ... function prototypes
+
+void phy_get_romfunc_addr(void);
+void rtc_init_lite(void);
+void rtc_set_cpu_freq(xtal_freq_t xtal_freq, enum xtal_freq_e cpu_freq);
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+#ifndef CONFIG_SUPPRESS_CLOCK_CONFIG
+enum xtal_freq_e
+{
+  XTAL_40M = 40,
+  XTAL_26M = 26,
+  XTAL_24M = 24,
+  XTAL_AUTO = 0
+};
+
+enum xtal_freq_e
+{
+  CPU_80M = 1,
+  CPU_160M = 2,
+  CPU_240M = 3,
+};
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32_clockconfig
+ *
+ * Description:
+ *   Called to initialize the ESP32.  This does whatever setup is needed to
+ *   put the  SoC in a usable state.  This includes the initialization of
+ *   clocking using the settings in board.h.
+ *
+ ****************************************************************************/
+
+void esp32_clockconfig(void)
+{
+#ifdef CONFIG_SUPPRESS_CLOCK_CONFIG
+#  warning WARNING: Clock configuration disabled
+#else
+  uint32_t freq_mhz = CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ;
+  enum xtal_freq_e freq;
+
+  phy_get_romfunc_addr();
+
+  /* Frequency will be changed to 40MHz in rtc_init_lite */
+
+  rtc_init_lite();
+
+  freq = CPU_80M;
+  switch (freq_mhz)
+    {
+    case 240:
+      freq = CPU_240M;
+      break;
+    case 160:
+      freq = CPU_160M;
+      break;
+    default:
+      freq_mhz = 80;
+      /* no break */
+    case 80:
+      freq = CPU_80M;
+      break;
+    }
+
+  /* Frequency will be changed to freq in rtc_set_cpu_freq */
+
+  rtc_set_cpu_freq(XTAL_AUTO, freq);
+  ets_update_cpu_frequency(freq_mhz);
+#endif
+}
diff --git a/arch/xtensa/src/esp32/esp32_clockconfig.h b/arch/xtensa/src/esp32/esp32_clockconfig.h
new file mode 100644
index 0000000000000000000000000000000000000000..a552f9b33d24cf87eb2ff7dd40cc9c48df7c86c1
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_clockconfig.h
@@ -0,0 +1,63 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_clockconfig.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt >
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_ESP32_ESP32_CLOCKCONFIG_H
+#define __ARCH_XTENSA_SRC_ESP32_ESP32_CLOCKCONFIG_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32_clockconfig
+ *
+ * Description:
+ *   Called to initialize the ESP32.  This does whatever setup is needed to
+ *   put the  SoC in a usable state.  This includes the initialization of
+ *   clocking using the settings in board.h.
+ *
+ ****************************************************************************/
+
+void esp32_clockconfig(void);
+
+#endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_CLOCKCONFIG_H */
diff --git a/arch/xtensa/src/esp32/esp32_config.h b/arch/xtensa/src/esp32/esp32_config.h
new file mode 100644
index 0000000000000000000000000000000000000000..23c0d06169882da7cac11f3e2d55c48d244bd61e
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_config.h
@@ -0,0 +1,130 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_config.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_ESP32_ESP32_CONFIG_H
+#define __ARCH_XTENSA_SRC_ESP32_ESP32_CONFIG_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* GPIO IRQs ****************************************************************/
+
+/* UARTs ********************************************************************/
+/* Don't enable UARTs not supported by the chip. */
+
+#if ESP32_NUARTS < 1
+#  undef CONFIG_ESP32_UART0
+#  undef CONFIG_ESP32_UART1
+#  undef CONFIG_ESP32_UART2
+#elif ESP32_NUARTS < 2
+#  undef CONFIG_ESP32_UART1
+#  undef CONFIG_ESP32_UART2
+#elif ESP32_NUARTS < 3
+#  undef CONFIG_ESP32_UART2
+#endif
+
+/* Are any UARTs enabled? */
+
+#undef HAVE_UART_DEVICE
+#if defined(CONFIG_ESP32_UART0) || defined(CONFIG_ESP32_UART1) || \
+    defined(CONFIG_ESP32_UART2)
+#  define HAVE_UART_DEVICE 1
+#endif
+
+/* UART Flow Control ********************************************************/
+
+#ifndef CONFIG_ESP32_UART0
+#  undef CONFIG_UART0_IFLOWCONTROL
+#endif
+#ifndef CONFIG_ESP32_UART1
+#  undef CONFIG_UART1_IFLOWCONTROL
+#endif
+#ifndef CONFIG_ESP32_UART2
+#  undef CONFIG_UART2_IFLOWCONTROL
+#endif
+
+/* Serial Console ***********************************************************/
+/* Is there a serial console?  There should be no more than one defined.  It
+ * could be on any UARTn, n=1,..,ESP32_NUART, or USARTn, n=1,.., ESP32_NUSART
+ */
+
+#undef HAVE_SERIAL_CONSOLE
+#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_ESP32_UART0)
+#  undef CONFIG_UART1_SERIAL_CONSOLE
+#  undef CONFIG_UART2_SERIAL_CONSOLE
+#  define HAVE_SERIAL_CONSOLE 1
+#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_ESP32_UART1)
+#  undef CONFIG_UART0_SERIAL_CONSOLE
+#  undef CONFIG_UART2_SERIAL_CONSOLE
+#  define HAVE_SERIAL_CONSOLE 1
+#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_ESP32_UART2)
+#  undef CONFIG_UART0_SERIAL_CONSOLE
+#  undef CONFIG_UART1_SERIAL_CONSOLE
+#  define HAVE_SERIAL_CONSOLE 1
+#else
+#  undef CONFIG_UART0_SERIAL_CONSOLE
+#  undef CONFIG_UART1_SERIAL_CONSOLE
+#  undef CONFIG_UART2_SERIAL_CONSOLE
+#endif
+
+/* SPI ******************************************************************************/
+/* Don't enable SPI peripherals not supported by the chip. */
+
+#if ESP32_NSPI < 1
+#  undef CONFIG_ESP32_SPI0
+#  undef CONFIG_ESP32_SPI1
+#  undef CONFIG_ESP32_SPI2
+#  undef CONFIG_ESP32_SPI3
+#elif ESP32_NSPI < 2
+#  undef CONFIG_ESP32_SPI1
+#  undef CONFIG_ESP32_SPI2
+#  undef CONFIG_ESP32_SPI3
+#elif ESP32_NSPI < 3
+#  undef CONFIG_ESP32_SPI2
+#  undef CONFIG_ESP32_SPI3
+#elif ESP32_NSPI < 4
+#  undef CONFIG_ESP32_SPI3
+#endif
+
+#endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_CONFIG_H */
diff --git a/arch/xtensa/src/esp32/esp32_cpuidlestack.c b/arch/xtensa/src/esp32/esp32_cpuidlestack.c
new file mode 100644
index 0000000000000000000000000000000000000000..ea475b79b3f6f21036565f6730bd32d29e9a6acb
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_cpuidlestack.c
@@ -0,0 +1,122 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_cpuidlestack.c
+ *
+ * Mofidifed by use in NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from software originally provided by Expressif Systems:
+ *
+ * Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#include "xtensa.h"
+#include "esp32_smp.h"
+
+#ifdef CONFIG_SMP
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* Address of the CPU0 IDLE thread */
+
+uint32_t g_cpu1_idlestack[CPU1_IDLETHREAD_STACKWORDS]
+  __attribute__((aligned(16) section(".noinit")));
+
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_cpu_idlestack
+ *
+ * Description:
+ *   Allocate a stack for the CPU[n] IDLE task (n > 0) if appropriate and
+ *   setup up stack-related information in the IDLE task's TCB.  This
+ *   function is always called before up_cpu_start().  This function is
+ *   only called for the CPU's initial IDLE task; up_create_task is used for
+ *   all normal tasks, pthreads, and kernel threads for all CPUs.
+ *
+ *   The initial IDLE task is a special case because the CPUs can be started
+ *   in different wans in different environments:
+ *
+ *   1. The CPU may already have been started and waiting in a low power
+ *      state for up_cpu_start().  In this case, the IDLE thread's stack
+ *      has already been allocated and is already in use.  Here
+ *      up_cpu_idlestack() only has to provide information about the
+ *      already allocated stack.
+ *
+ *   2. The CPU may be disabled but started when up_cpu_start() is called.
+ *      In this case, a new stack will need to be created for the IDLE
+ *      thread and this function is then equivalent to:
+ *
+ *      return up_create_stack(tcb, stack_size, TCB_FLAG_TTYPE_KERNEL);
+ *
+ *   The following TCB fields must be initialized by this function:
+ *
+ *   - adj_stack_size: Stack size after adjustment for hardware, processor,
+ *     etc.  This value is retained only for debug purposes.
+ *   - stack_alloc_ptr: Pointer to allocated stack
+ *   - adj_stack_ptr: Adjusted stack_alloc_ptr for HW.  The initial value of
+ *     the stack pointer.
+ *
+ * Inputs:
+ *   - cpu:         CPU index that indicates which CPU the IDLE task is
+ *                  being created for.
+ *   - tcb:         The TCB of new CPU IDLE task
+ *   - stack_size:  The requested stack size for the IDLE task.  At least
+ *                  this much must be allocated.  This should be
+ *                  CONFIG_SMP_IDLETHREAD_STACKSIZE.
+ *
+ ****************************************************************************/
+
+int up_cpu_idlestack(int cpu, FAR struct tcb_s *tcb, size_t stack_size)
+{
+  uintptr_t topofstack;
+
+  /* XTENSA uses a push-down stack:  the stack grows toward lower* addresses
+   * in memory.  The stack pointer register points to the lowest, valid
+   * working address (the "top" of the stack).  Items on the stack are
+   * referenced as positive word offsets from sp.
+   */
+
+  /* Save information about pre-allocated IDLE thread stack */
+
+
+  tcb->stack_alloc_ptr = g_cpu1_idlestack;
+  tcb->adj_stack_size  = CPU1_IDLETHREAD_STACKSIZE;
+  topofstack           = (uintptr_t)g_cpu1_idlestack + CPU1_IDLETHREAD_STACKSIZE;
+  tcb->adj_stack_ptr   = (uint32_t *)topofstack;
+
+#if XCHAL_CP_NUM > 0
+  /* REVISIT: Does it make since to have co-processors enabled on the IDLE thread? */
+#endif
+
+  return OK;
+}
+
+#endif /* CONFIG_SMP */
+
diff --git a/arch/xtensa/src/esp32/esp32_cpuindex.S b/arch/xtensa/src/esp32/esp32_cpuindex.S
new file mode 100644
index 0000000000000000000000000000000000000000..0a9abc27fd80a6878f92bb9085f0d9da09f51d6a
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_cpuindex.S
@@ -0,0 +1,79 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_cpuindex.S
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+	.file	"xtensa_cpumacros.S"
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include "xtensa_abi.h"
+#include "chip_macros.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_cpu_index
+ *
+ * Description:
+ *   Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ *   corresponds to the currently executing CPU.
+ *
+ *   If TLS is enabled, then the RTOS can get this information from the TLS
+ *   info structure.  Otherwise, the MCU-specific logic must provide some
+ *   mechanism to provide the CPU index.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ *   corresponds to the currently executing CPU.
+ *
+ ****************************************************************************/
+
+	.text
+	.align	4
+	.global	up_cpu_index
+	.type	up_cpu_index, @function
+
+up_cpu_index:
+	ENTRY(16)
+	getcoreid	a2
+	RET(16)
+
+	.size	up_cpu_index, . - up_cpu_index
diff --git a/arch/xtensa/src/esp32/esp32_cpuint.c b/arch/xtensa/src/esp32/esp32_cpuint.c
new file mode 100644
index 0000000000000000000000000000000000000000..8d43741ac035aa5552df8c73236cee072936ee3e
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_cpuint.c
@@ -0,0 +1,635 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_irq.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "chip/esp32_dport.h"
+#include "esp32_cpuint.h"
+#include "xtensa.h"
+
+#include "sched/sched.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Mapping Peripheral IDs to map register addresses
+ *
+ * PERIPHERAL ID                  DPORT REGISTER OFFSET
+ * MNEMONIC                   VAL PRO CPU APP CPU
+ * -------------------------- --- ------- -------
+ * ESP32_PERIPH_MAC            0  0x104   0x218
+ * ESP32_PERIPH_MAC_NMI        1  0x108   0x21c
+ * ESP32_PERIPH_BB             2  0x10c   0x220
+ * ESP32_PERIPH_BB_MAC         3  0x110   0x224
+ * ESP32_PERIPH_BT_BB          4  0x114   0x228
+ * ESP32_PERIPH_BT_BB_NMI      5  0x118   0x22c
+ * ESP32_PERIPH_RWBT_IRQ       6  0x11c   0x230
+ * ESP32_PERIPH_RWBLE_IRQ      7  0x120   0x234
+ * ESP32_PERIPH_RWBT_NMI       8  0x124   0x238
+ * ESP32_PERIPH_RWBLE_NMI      9  0x128   0x23c
+ * ESP32_PERIPH_SLC0           10 0x12c   0x240
+ * ESP32_PERIPH_SLC1           11 0x130   0x244
+ * ESP32_PERIPH_UHCI0          12 0x134   0x248
+ * ESP32_PERIPH_UHCI1          13 0x138   0x24c
+ * ESP32_PERIPH_TG_T0_LEVEL    14 0x13c   0x250
+ * ESP32_PERIPH_TG_T1_LEVEL    15 0x140   0x254
+ * ESP32_PERIPH_TG_WDT_LEVEL   16 0x144   0x258
+ * ESP32_PERIPH_TG_LACT_LEVEL  17 0x148   0x25c
+ * ESP32_PERIPH_TG1_T0_LEVEL   18 0x14c   0x260
+ * ESP32_PERIPH_TG1_T1_LEVEL   19 0x150   0x264
+ * ESP32_PERIPH_TG1_WDT_LEVEL  20 0x154   0x268
+ * ESP32_PERIPH_G1_LACT_LEVEL  21 0x158   0x26c
+ * ESP32_PERIPH_CPU_GPIO       22 0x15c   0x270
+ * ESP32_PERIPH_CPU_NMI        23 0x160   0x274
+ * ESP32_PERIPH_CPU_CPU0       24 0x164   0x278
+ * ESP32_PERIPH_CPU_CPU1       25 0x168   0x27c
+ * ESP32_PERIPH_CPU_CPU2       26 0x16c   0x280
+ * ESP32_PERIPH_CPU_CPU3       27 0x170   0x284
+ * ESP32_PERIPH_SPI0           28 0x174   0x288
+ * ESP32_PERIPH_SPI1           29 0x178   0x28c
+ * ESP32_PERIPH_SPI2           30 0x17c   0x290
+ * ESP32_PERIPH_SPI3           31 0x180   0x294
+ * ESP32_PERIPH_I2S0           32 0x184   0x298
+ * ESP32_PERIPH_I2S1           33 0x188   0x29c
+ * ESP32_PERIPH_UART           34 0x18c   0x2a0
+ * ESP32_PERIPH_UART1          35 0x190   0x2a4
+ * ESP32_PERIPH_UART2          36 0x194   0x2a8
+ * ESP32_PERIPH_SDIO_HOST      37 0x198   0x2ac
+ * ESP32_PERIPH_EMAC           38 0x19c   0x2b0
+ * ESP32_PERIPH_PWM0           39 0x1a0   0x2b4
+ * ESP32_PERIPH_PWM1           40 0x1a4   0x2b8
+ * ESP32_PERIPH_PWM2           41 0x1a8   0x2bc
+ * ESP32_PERIPH_PWM3           42 0x1ac   0x2c0
+ * ESP32_PERIPH_LEDC           43 0x1b0   0x2c4
+ * ESP32_PERIPH_EFUSE          44 0x1b4   0x2c8
+ * ESP32_PERIPH_CAN            45 0x1b8   0x2cc
+ * ESP32_PERIPH_RTC_CORE       46 0x1bc   0x2d0
+ * ESP32_PERIPH_RMT            47 0x1c0   0x2d4
+ * ESP32_PERIPH_PCNT           48 0x1c4   0x2d8
+ * ESP32_PERIPH_I2C_EXT0       49 0x1c8   0x2dc
+ * ESP32_PERIPH_I2C_EXT1       50 0x1cc   0x2e0
+ * ESP32_PERIPH_RSA            51 0x1d0   0x2e4
+ * ESP32_PERIPH_SPI1_DMA       52 0x1d4   0x2e8
+ * ESP32_PERIPH_SPI2_DMA       53 0x1d8   0x2ec
+ * ESP32_PERIPH_SPI3_DMA       54 0x1dc   0x2f0
+ * ESP32_PERIPH_WDG            55 0x1e0   0x2f4
+ * ESP32_PERIPH_TIMER1         56 0x1e4   0x2f8
+ * ESP32_PERIPH_TIMER2         57 0x1e8   0x2fc
+ * ESP32_PERIPH_TG_T0_EDGE     58 0x1ec   0x300
+ * ESP32_PERIPH_TG_T1_EDGE     59 0x1f0   0x304
+ * ESP32_PERIPH_TG_WDT_EDGE    60 0x1F4   0x308
+ * ESP32_PERIPH_TG_LACT_EDGE   61 0x1F8   0x30c
+ * ESP32_PERIPH_TG1_T0_EDGE    62 0x1fc   0x310
+ * ESP32_PERIPH_TG1_T1_EDGE    63 0x200   0x314
+ * ESP32_PERIPH_TG1_WDT_EDGE   64 0x204   0x318
+ * ESP32_PERIPH_TG1_LACT_EDGE  65 0x208   0x31c
+ * ESP32_PERIPH_MMU_IA         66 0x20c   0x320
+ * ESP32_PERIPH_MPU_IA         67 0x210   0x324
+ * ESP32_PERIPH_CACHE_IA       68 0x214   0x328
+ */
+
+#define DPORT_PRO_MAP_REGADDR(n) (DR_REG_DPORT_BASE + 0x104 + ((n) << 2))
+#define DPORT_APP_MAP_REGADDR(n) (DR_REG_DPORT_BASE + 0x218 + ((n) << 2))
+
+/* CPU interrupts can be detached from any peripheral source by setting the
+ * map register to an internal CPU interrupt (6, 7, 11, 15, 16, or 29).
+ */
+
+#define NO_CPUINT  ESP32_CPUINT_TIMER0
+
+/* Priority range is 1-5 */
+
+#define ESP32_MIN_PRIORITY     1
+#define ESP32_MAX_PRIORITY     5
+#define ESP32_PRIO_INDEX(p)    ((p) - ESP32_MIN_PRIORITY)
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* Maps a CPU interrupt to the IRQ of the attached peripheral interrupt */
+
+uint8_t g_cpu0_intmap[ESP32_NCPUINTS];
+#ifdef CONFIG_SMP
+uint8_t g_cpu1_intmap[ESP32_NCPUINTS];
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* g_intenable[] is a shadow copy of the per-CPU INTENABLE register
+ * content.
+ */
+
+#ifdef CONFIG_SMP
+static uint32_t g_intenable[CONFIG_SMP_NCPUS];
+#else
+static uint32_t g_intenable[1];
+#endif
+
+/* Bitsets for free, unallocated CPU interrupts available to peripheral
+ * devices.
+ */
+
+static uint32_t g_cpu0_freeints = EPS32_CPUINT_PERIPHSET;
+#ifdef CONFIG_SMP
+static uint32_t g_cpu1_freeints = EPS32_CPUINT_PERIPHSET;
+#endif
+
+/* Bitsets for each interrupt priority 1-5 */
+
+static const uint32_t g_priority[5] =
+{
+  ESP32_INTPRI1_MASK,
+  ESP32_INTPRI2_MASK,
+  ESP32_INTPRI3_MASK,
+  ESP32_INTPRI4_MASK,
+  ESP32_INTPRI5_MASK
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: xtensa_disable_all
+ ****************************************************************************/
+
+static inline void xtensa_disable_all(void)
+{
+  __asm__ __volatile__
+  (
+    "movi a2, 0\n"
+    "xsr a2, INTENABLE\n"
+    : : : "a2"
+  );
+}
+
+/****************************************************************************
+ * Name:  esp32_alloc_cpuint
+ *
+ * Description:
+ *   Allocate a CPU interrupt for a peripheral device.  This function will
+ *   not allocate any of the pre-allocated CPU interrupts for internal
+ *   devices.
+ *
+ * Input Parameters:
+ *   intmask - mask of candidate CPU interrupts.  The CPU interrupt will be
+ *             be allocated from free interrupts within this set
+ *
+ * Returned Value:
+ *   On success, the allocated level-sensitive, CPU interrupt numbr is
+ *   returned.  A negated errno is returned on failure.  The only possible
+ *   failure is that all level-sensitive CPU interrupts have already been
+ *   allocated.
+ *
+ ****************************************************************************/
+
+int esp32_alloc_cpuint(uint32_t intmask)
+{
+  irqstate_t flags;
+  uint32_t *freeints;
+  uint32_t bitmask;
+  uint32_t intset;
+  int cpuint;
+  int ret = -ENOMEM;
+
+  /* Check if there are is CPU interrupts with the requrested properties
+   * available.
+   */
+
+  flags = enter_critical_section();
+
+#ifdef CONFIG_SMP
+  if (this_cpu() != 0)
+    {
+      freeints = &g_cpu1_freeints;
+    }
+  else
+#endif
+    {
+      freeints = &g_cpu0_freeints;
+    }
+
+  intset = *freeints & intmask;
+  if (intset != 0)
+    {
+      /* Skip over initial unavailable CPU interrupts quickly in groups
+       * of 8 interrupt.
+       */
+
+      for (cpuint = 0, bitmask = 0xff;
+           cpuint <= ESP32_CPUINT_MAX && (intset & bitmask) == 0;
+           cpuint += 8, bitmask <<= 8);
+
+      /* Search for an unallocated CPU interrupt number in the remaining
+       * intset.
+       */
+
+      for (; cpuint <= ESP32_CPUINT_MAX; cpuint++)
+        {
+          /* If the bit corresponding to the CPU interrupt is '1', then
+           * that CPU interrupt is available.
+           */
+
+          bitmask = (1ul << cpuint);
+          if ((intset & bitmask) != 0)
+            {
+              /* Got it! */
+
+              *freeints &= ~bitmask;
+              ret = cpuint;
+              break;
+            }
+        }
+    }
+
+  leave_critical_section(flags);
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name:  esp32_cpuint_initialize
+ *
+ * Description:
+ *   Initialize CPU interrupts
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; A negated errno value is returned on
+ *   any failre.
+ *
+ ****************************************************************************/
+
+int esp32_cpuint_initialize(void)
+{
+  uintptr_t regaddr;
+  uint8_t *intmap;
+#ifdef CONFIG_SMP
+  int cpu;
+#endif
+  int i;
+
+#ifdef CONFIG_SMP
+  /* Which CPU are we initializing */
+
+  cpu = up_cpu_index();
+  DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS);
+#endif
+
+  /* Disable all CPU interrupts on this CPU */
+
+  xtensa_disable_all();
+
+  /* Detach all peripheral sources PRO CPU interrupts */
+
+  for (i = 0; i < ESP32_NPERIPHERALS; i++)
+    {
+#ifdef CONFIG_SMP
+      if (cpu != 0)
+        {
+          regaddr = DPORT_APP_MAP_REGADDR(i);
+        }
+      else
+#endif
+        {
+          regaddr = DPORT_PRO_MAP_REGADDR(i);
+        }
+
+      putreg32(NO_CPUINT, regaddr);
+    }
+
+  /* Initialize CPU interrupt-to-IRQ mapping table */
+
+#ifdef CONFIG_SMP
+  if (cpu != 0)
+    {
+      intmap = g_cpu1_intmap;
+    }
+  else
+#endif
+    {
+      intmap = g_cpu0_intmap;
+    }
+
+  /* Indiate that no peripheral interrupts are assigned to CPU interrupts */
+
+  memset(intmap, CPUINT_UNASSIGNED, ESP32_NCPUINTS);
+
+  /* Special case the 6 internal interrupts.
+   *
+   *   CPU interrupt bit           IRQ number
+   *   --------------------------- ---------------------
+   *   ESP32_CPUINT_TIMER0      6  XTENSA_IRQ_TIMER0  0
+   *   SP32_CPUINT_SOFTWARE0    7  Not yet defined
+   *   ESP32_CPUINT_PROFILING  11  Not yet defined
+   *   ESP32_CPUINT_TIMER1     15  XTENSA_IRQ_TIMER1  1
+   *   ESP32_CPUINT_TIMER2     16  XTENSA_IRQ_TIMER2  2
+   *   ESP32_CPUINT_SOFTWARE1  29  Not yet defined
+   */
+
+  intmap[ESP32_CPUINT_TIMER0] = XTENSA_IRQ_TIMER0;
+  intmap[ESP32_CPUINT_TIMER1] = XTENSA_IRQ_TIMER1;
+  intmap[ESP32_CPUINT_TIMER2] = XTENSA_IRQ_TIMER2;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: up_disable_irq
+ *
+ * Description:
+ *   Disable the CPU interrupt specified by 'cpuint'
+ *
+ ****************************************************************************/
+
+void up_disable_irq(int cpuint)
+{
+#ifdef CONFIG_SMP
+  int cpu;
+#endif
+
+  DEBUGASSERT(cpuint >= 0 && cpuint <= ESP32_CPUINT_MAX);
+
+#ifdef CONFIG_SMP
+  cpu = up_cpu_index();
+  (void)xtensa_disable_cpuint(&g_intenable[cpu], (1ul << cpuint));
+#else
+  (void)xtensa_disable_cpuint(&g_intenable[0], (1ul << cpuint));
+#endif
+}
+
+/****************************************************************************
+ * Name: up_enable_irq
+ *
+ * Description:
+ *   Ensable the CPU interrupt specified by 'cpuint'
+ *
+ ****************************************************************************/
+
+void up_enable_irq(int cpuint)
+{
+#ifdef CONFIG_SMP
+  int cpu;
+#endif
+
+  DEBUGASSERT(cpuint >= 0 && cpuint <= ESP32_CPUINT_MAX);
+
+#ifdef CONFIG_SMP
+  cpu = up_cpu_index();
+  (void)xtensa_enable_cpuint(&g_intenable[cpu], (1ul << cpuint));
+#else
+  (void)xtensa_enable_cpuint(&g_intenable[0], (1ul << cpuint));
+#endif
+}
+
+/****************************************************************************
+ * Name:  esp32_alloc_levelint
+ *
+ * Description:
+ *   Allocate a level CPU interrupt
+ *
+ * Input Parameters:
+ *   priority - Priority of the CPU interrupt (1-5)
+ *
+ * Returned Value:
+ *   On success, the allocated level-sensitive, CPU interrupt numbr is
+ *   returned.  A negated errno is returned on failure.  The only possible
+ *   failure is that all level-sensitive CPU interrupts have already been
+ *   allocated.
+ *
+ ****************************************************************************/
+
+int esp32_alloc_levelint(int priority)
+{
+  uint32_t intmask;
+
+  DEBUGASSERT(priority >= ESP32_MIN_PRIORITY &&
+              priority <= ESP32_MAX_PRIORITY);
+
+  /* Check if there are any level CPU interrupts available at the requested
+   * interrupt priority.
+   */
+
+  intmask = g_priority[ESP32_PRIO_INDEX(priority)] & EPS32_CPUINT_LEVELSET;
+  return esp32_alloc_cpuint(intmask);
+}
+
+/****************************************************************************
+ * Name:  esp32_alloc_edgeint
+ *
+ * Description:
+ *   Allocate an edge CPU interrupt
+ *
+ * Input Parameters:
+ *   priority - Priority of the CPU interrupt (1-5)
+ *
+ * Returned Value:
+ *   On success, the allocated edge-sensitive, CPU interrupt numbr is
+ *   returned.  A negated errno is returned on failure.  The only possible
+ *   failure is that all edge-sensitive CPU interrupts have already been
+ *   allocated.
+ *
+ ****************************************************************************/
+
+int esp32_alloc_edgeint(int priority)
+{
+  uint32_t intmask;
+
+  DEBUGASSERT(priority >= ESP32_MIN_PRIORITY &&
+              priority <= ESP32_MAX_PRIORITY);
+
+  /* Check if there are any edge CPU interrupts available at the requested
+   * interrupt priority.
+   */
+
+  intmask = g_priority[ESP32_PRIO_INDEX(priority)] & EPS32_CPUINT_EDGESET;
+  return esp32_alloc_cpuint(intmask);
+}
+
+/****************************************************************************
+ * Name:  esp32_free_cpuint
+ *
+ * Description:
+ *   Free a previoulsy allocated CPU interrupt
+ *
+ * Input Parameters:
+ *   The CPU interrupt number to be freed
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void esp32_free_cpuint(int cpuint)
+{
+  irqstate_t flags;
+  uint32_t *freeints;
+  uint32_t bitmask;
+
+  DEBUGASSERT(cpuint >= 0 && cpuint < ESP32_CPUINT_NEDGEPERIPHS);
+
+  /* Mark the CPU interrupt as available */
+
+  bitmask  = (1ul << cpuint);
+  flags = enter_critical_section();
+
+#ifdef CONFIG_SMP
+  if (this_cpu() != 0)
+    {
+      freeints = &g_cpu1_freeints;
+    }
+  else
+#endif
+    {
+      freeints = &g_cpu0_freeints;
+    }
+
+  DEBUGASSERT((*freeints & bitmask) == 0);
+  *freeints |= bitmask;
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name:  esp32_attach_peripheral
+ *
+ * Description:
+ *   Attach a peripheral interupt to a CPU interrupt.
+ *
+ * Input Parameters:
+ *   cpu      - The CPU to receive the interrupt 0=PRO CPU 1=APP CPU
+ *   periphid - The peripheral number from ira.h to be assigned to
+ *              a CPU interrupt.
+ *   cpuint   - The CPU interrupt to receive the peripheral interrupt
+ *              assignment.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void esp32_attach_peripheral(int cpu, int periphid, int cpuint)
+{
+  uintptr_t regaddr;
+  uint8_t *intmap;
+
+  DEBUGASSERT(periphid >= 0 && periphid < ESP32_NPERIPHERALS);
+  DEBUGASSERT(cpuint >= 0 && cpuint <= ESP32_CPUINT_MAX);
+#ifdef CONFIG_SMP
+  DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS);
+
+  if (cpu != 0)
+    {
+      regaddr = DPORT_APP_MAP_REGADDR(periphid);
+      intmap  = g_cpu1_intmap;
+    }
+  else
+#endif
+    {
+      regaddr = DPORT_PRO_MAP_REGADDR(periphid);
+      intmap  = g_cpu0_intmap;
+    }
+
+  DEBUGASSERT(intmap[cpuint] == CPUINT_UNASSIGNED);
+  intmap[cpuint] = periphid + XTENSA_IRQ_FIRSTPERIPH;
+
+  putreg32(cpuint, regaddr);
+}
+
+/****************************************************************************
+ * Name:  esp32_detach_peripheral
+ *
+ * Description:
+ *   Detach a peripheral interupt from a CPU interrupt.
+ *
+ * Input Parameters:
+ *   cpu      - The CPU to receive the interrupt 0=PRO CPU 1=APP CPU
+ *   periphid - The peripheral number from irq.h to be detached from the
+ *              CPU interrupt.
+ *   cpuint   - The CPU interrupt from which the peripheral interrupt will
+ *              be detached.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void esp32_detach_peripheral(int cpu, int periphid, int cpuint)
+{
+  uintptr_t regaddr;
+  uint8_t *intmap;
+
+  DEBUGASSERT(periphid >= 0 && periphid < ESP32_NPERIPHERALS);
+#ifdef CONFIG_SMP
+  DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS);
+
+  if (cpu != 0)
+    {
+      regaddr = DPORT_APP_MAP_REGADDR(periphid);
+      intmap  = g_cpu1_intmap;
+    }
+  else
+#endif
+    {
+      regaddr = DPORT_PRO_MAP_REGADDR(periphid);
+      intmap  = g_cpu0_intmap;
+    }
+
+  DEBUGASSERT(intmap[cpuint] != CPUINT_UNASSIGNED);
+  intmap[cpuint] = CPUINT_UNASSIGNED;
+
+  putreg32(NO_CPUINT, regaddr);
+}
diff --git a/arch/xtensa/src/esp32/esp32_cpuint.h b/arch/xtensa/src/esp32/esp32_cpuint.h
new file mode 100644
index 0000000000000000000000000000000000000000..0132ce807185b6ab1a7015031cfac168ff055bd9
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_cpuint.h
@@ -0,0 +1,179 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_cpuint.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_ESP32_ESP32_CPUINT_H
+#define __ARCH_XTENSA_SRC_ESP32_ESP32_CPUINT_H 1
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define CPUINT_UNASSIGNED 0xff  /* No peripheral assigned to this CPU interrupt */
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* Maps a CPU interrupt to the IRQ of the attached peripheral interrupt */
+
+extern uint8_t g_cpu0_intmap[ESP32_NCPUINTS];
+#ifdef CONFIG_SMP
+extern uint8_t g_cpu1_intmap[ESP32_NCPUINTS];
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name:  esp32_cpuint_initialize
+ *
+ * Description:
+ *   Initialize CPU interrupts
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; A negated errno value is returned on
+ *   any failre.
+ *
+ ****************************************************************************/
+
+int esp32_cpuint_initialize(void);
+
+/****************************************************************************
+ * Name:  esp32_alloc_levelint
+ *
+ * Description:
+ *   Allocate a level CPU interrupt
+ *
+ * Input Parameters:
+ *   priority - Priority of the CPU interrupt (1-5)
+ *
+ * Returned Value:
+ *   On success, the allocated level-sensitive, CPU interrupt numbr is
+ *   returned.  A negated errno is returned on failure.  The only possible
+ *   failure is that all level-sensitive CPU interrupts have already been
+ *   allocated.
+ *
+ ****************************************************************************/
+
+int esp32_alloc_levelint(int priority);
+
+/****************************************************************************
+ * Name:  esp32_alloc_edgeint
+ *
+ * Description:
+ *   Allocate an edge CPU interrupt
+ *
+ * Input Parameters:
+ *   priority - Priority of the CPU interrupt (1-5)
+ *
+ * Returned Value:
+ *   On success, the allocated edge-sensitive, CPU interrupt numbr is
+ *   returned.  A negated errno is returned on failure.  The only possible
+ *   failure is that all edge-sensitive CPU interrupts have already been
+ *   allocated.
+ *
+ ****************************************************************************/
+
+int esp32_alloc_edgeint(int priority);
+
+/****************************************************************************
+ * Name:  esp32_free_cpuint
+ *
+ * Description:
+ *   Free a previoulsy allocated CPU interrupt
+ *
+ * Input Parameters:
+ *   cpuint - The CPU interrupt number to be freed
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void esp32_free_cpuint(int cpuint);
+
+/****************************************************************************
+ * Name:  esp32_attach_peripheral
+ *
+ * Description:
+ *   Attach a peripheral interupt to a CPU interrupt.
+ *
+ * Input Parameters:
+ *   cpu      - The CPU to receive the interrupt 0=PRO CPU 1=APP CPU
+ *   periphid - The peripheral number from ira.h to be assigned to
+ *              a CPU interrupt.
+ *   cpuint   - The CPU interrupt to receive the peripheral interrupt
+ *              assignment.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void esp32_attach_peripheral(int cpu, int periphid, int cpuint);
+
+/****************************************************************************
+ * Name:  esp32_detach_peripheral
+ *
+ * Description:
+ *   Detach a peripheral interupt from a CPU interrupt.
+ *
+ * Input Parameters:
+ *   cpu      - The CPU to receive the interrupt 0=PRO CPU 1=APP CPU
+ *   periphid - The peripheral number from irq.h to be detached from the
+ *              CPU interrupt.
+ *   cpuint   - The CPU interrupt from which the peripheral interrupt will
+ *              be detached.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void esp32_detach_peripheral(int cpu, int periphid, int cpuint);
+
+#endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_CPUINT_H */
diff --git a/arch/xtensa/src/esp32/esp32_cpustart.c b/arch/xtensa/src/esp32/esp32_cpustart.c
new file mode 100644
index 0000000000000000000000000000000000000000..e79e7c3345b558a13012908c8213ddd2c05b89ca
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_cpustart.c
@@ -0,0 +1,340 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_cpustart.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "xtensa.h"
+#include "chip/esp32_dport.h"
+#include "chip/esp32_rtccntl.h"
+#include "esp32_region.h"
+#include "esp32_cpuint.h"
+#include "esp32_smp.h"
+
+#ifdef CONFIG_SMP
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static volatile bool g_appcpu_started;
+static volatile spinlock_t g_appcpu_interlock SP_SECTION;
+
+/****************************************************************************
+ * ROM function prototypes
+ ****************************************************************************/
+
+void Cache_Flush(int cpu);
+void Cache_Read_Enable(int cpu);
+void ets_set_appcpu_boot_addr(uint32_t start);
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: xtensa_registerdump
+ ****************************************************************************/
+
+#if 0 /* Was useful in solving some startup problems */
+static inline void xtensa_registerdump(FAR struct tcb_s *tcb)
+{
+  _info("CPU%d:\n", up_cpu_index());
+
+  /* Dump the startup registers */
+  /* To be provided */
+}
+#else
+# define xtensa_registerdump(tcb)
+#endif
+
+/****************************************************************************
+ * Name: xtensa_attach_fromcpu0_interrupt
+ ****************************************************************************/
+
+#ifdef CONFIG_SMP
+static inline void xtensa_attach_fromcpu0_interrupt(void)
+{
+  int cpuint;
+
+  /* Allocate a level-sensitive, priority 1 CPU interrupt for the UART */
+
+  cpuint = esp32_alloc_levelint(1);
+  DEBUGASSERT(cpuint >= 0);
+
+  /* Connect all CPU peripheral source to allocated CPU interrupt */
+
+  up_disable_irq(cpuint);
+  esp32_attach_peripheral(1, ESP32_PERIPH_CPU_CPU0, cpuint);
+
+  /* Attach the inter-CPU interrupt. */
+
+  (void)irq_attach(ESP32_IRQ_CPU_CPU0, (xcpt_t)esp32_fromcpu0_interrupt, NULL);
+
+  /* Enable the inter 0 CPU interrupts. */
+
+  up_enable_irq(cpuint);
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: xtensa_appcpu_start
+ *
+ * Description:
+ *   This is the entry point used with the APP CPU was started  via
+ *   up_cpu_start().  The actually start-up logic in in ROM and we boot up
+ *   in C code.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None, does not return
+ *
+ ****************************************************************************/
+
+void xtensa_appcpu_start(void)
+{
+  FAR struct tcb_s *tcb = this_task();
+  register uint32_t sp;
+
+#ifdef CONFIG_STACK_COLORATION
+  {
+    register uint32_t *ptr;
+    register int i;
+
+      /* If stack debug is enabled, then fill the stack with a recognizable value
+       * that we can use later to test for high water marks.
+       */
+
+      for (i = 0, ptr = (uint32_t *)tcb->stack_alloc_ptr;
+           i < tcb->adj_stack_size;
+           i += sizeof(uint32_t))
+        {
+          *ptr++ = STACK_COLOR;
+        }
+  }
+#endif
+
+  /* Move to the stack assigned to us by up_smp_start immediately.  Although
+   * we were give a stack pointer at start-up, we don't know where that stack
+   * pointer is positioned respect to our memory map.  The only safe option
+   * is to switch to a well-known IDLE thread stack.
+   */
+
+  sp = (uint32_t)tcb->adj_stack_ptr;
+  __asm__ __volatile__("mov sp, %0\n" : : "r"(sp));
+
+  sinfo("CPU%d Started\n", up_cpu_index());
+
+#ifdef CONFIG_SCHED_INSTRUMENTATION
+  /* Notify that this CPU has started */
+
+  sched_note_cpu_started(tcb);
+#endif
+
+  /* Handle interlock*/
+
+  g_appcpu_started = true;
+  spin_unlock(&g_appcpu_interlock);
+
+  /* Reset scheduler parameters */
+
+  sched_resume_scheduler(tcb);
+
+  /* Move CPU0 exception vectors to IRAM */
+
+  asm volatile ("wsr %0, vecbase\n"::"r" (&_init_start));
+
+  /* Make page 0 access raise an exception */
+
+  esp32_region_protection();
+
+  /* Initialize CPU interrupts */
+
+  (void)esp32_cpuint_initialize();
+
+  /* Attach and emable internal interrupts */
+
+#ifdef CONFIG_SMP
+  /* Attach and enable the inter-CPU interrupt */
+
+  xtensa_attach_fromcpu0_interrupt();
+#endif
+
+#if 0 /* Does it make since to have co-processors enabled on the IDLE thread? */
+#if XTENSA_CP_ALLSET != 0
+  /* Set initial co-processor state */
+
+  xtensa_coproc_enable(struct xtensa_cpstate_s *cpstate, int cpset);
+#endif
+#endif
+
+  /* Dump registers so that we can see what is going to happen on return */
+
+  xtensa_registerdump(tcb);
+
+#ifndef CONFIG_SUPPRESS_INTERRUPTS
+  /* And Enable interrupts */
+
+  up_irq_enable();
+#endif
+
+  /* Then switch contexts. This instantiates the exception context of the
+   * tcb at the head of the assigned task list.  In this case, this should
+   * be the CPUs NULL task.
+   */
+
+  xtensa_context_restore(tcb->xcp.regs);
+}
+
+/****************************************************************************
+ * Name: up_cpu_start
+ *
+ * Description:
+ *   In an SMP configution, only one CPU is initially active (CPU 0). System
+ *   initialization occurs on that single thread. At the completion of the
+ *   initialization of the OS, just before beginning normal multitasking,
+ *   the additional CPUs would be started by calling this function.
+ *
+ *   Each CPU is provided the entry point to is IDLE task when started.  A
+ *   TCB for each CPU's IDLE task has been initialized and placed in the
+ *   CPU's g_assignedtasks[cpu] list.  Not stack has been alloced or
+ *   initialized.
+ *
+ *   The OS initialization logic calls this function repeatedly until each
+ *   CPU has been started, 1 through (CONFIG_SMP_NCPUS-1).
+ *
+ * Input Parameters:
+ *   cpu - The index of the CPU being started.  This will be a numeric
+ *         value in the range of from one to (CONFIG_SMP_NCPUS-1).  (CPU
+ *         0 is already active)
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int up_cpu_start(int cpu)
+{
+  DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu());
+
+  if (!g_appcpu_started)
+    {
+      uint32_t regval;
+
+      /* Start CPU1 */
+
+      sinfo("Starting CPU%d\n", cpu);
+
+#ifdef CONFIG_SCHED_INSTRUMENTATION
+      /* Notify of the start event */
+
+      sched_note_cpu_start(this_task(), cpu);
+#endif
+
+      /* The waitsem semaphore is used for signaling and, hence, should not
+       * have priority inheritance enabled.
+       */
+
+      spin_initialize(&g_appcpu_interlock, SP_LOCKED);
+
+      /* Flush and enable I-cache for APP CPU */
+
+      Cache_Flush(cpu);
+      Cache_Read_Enable(cpu);
+
+      /* Unstall the APP CPU */
+
+      regval  = getreg32(RTC_CNTL_SW_CPU_STALL_REG);
+      regval &= ~RTC_CNTL_SW_STALL_APPCPU_C1_M;
+      putreg32(regval, RTC_CNTL_SW_CPU_STALL_REG);
+
+      regval  = getreg32(RTC_CNTL_OPTIONS0_REG);
+      regval &= ~RTC_CNTL_SW_STALL_APPCPU_C0_M;
+      putreg32(regval, RTC_CNTL_OPTIONS0_REG);
+
+      /* Enable clock gating for the APP CPU */
+
+      regval  = getreg32(DPORT_APPCPU_CTRL_B_REG);
+      regval |= DPORT_APPCPU_CLKGATE_EN;
+      putreg32(regval, DPORT_APPCPU_CTRL_B_REG);
+
+      regval  = getreg32(DPORT_APPCPU_CTRL_C_REG);
+      regval &= ~DPORT_APPCPU_RUNSTALL;
+      putreg32(regval, DPORT_APPCPU_CTRL_C_REG);
+
+      /* Reset the APP CPU */
+
+      regval  = getreg32(DPORT_APPCPU_CTRL_A_REG);
+      regval |= DPORT_APPCPU_RESETTING;
+      putreg32(regval, DPORT_APPCPU_CTRL_A_REG);
+
+      regval  = getreg32(DPORT_APPCPU_CTRL_A_REG);
+      regval &= ~DPORT_APPCPU_RESETTING;
+      putreg32(regval, DPORT_APPCPU_CTRL_A_REG);
+
+      /* Set the CPU1 start address */
+
+      ets_set_appcpu_boot_addr((uint32_t)xtensa_appcpu_start);
+
+      /* And wait for the initial task to run on CPU1 */
+
+      spin_lock(&g_appcpu_interlock);
+      DEBUGASSERT(g_appcpu_started);
+    }
+
+  return OK;
+}
+
+#endif /* CONFIG_SMP */
diff --git a/arch/xtensa/src/esp32/esp32_gpio.c b/arch/xtensa/src/esp32/esp32_gpio.c
new file mode 100644
index 0000000000000000000000000000000000000000..892b87d51c5170d091b37598801e3782eb87a4f8
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_gpio.c
@@ -0,0 +1,436 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_gpio.c
+ *
+ * Developed for NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derivies from sample code provided by Expressif Systems:
+ *
+ *   Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "xtensa.h"
+#include "chip/esp32_iomux.h"
+#include "chip/esp32_gpio.h"
+#include "esp32_cpuint.h"
+#include "esp32_gpio.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define NGPIO_HPINS  (ESP32_NIRQ_GPIO - 32)
+#define NGPIO_HMASK  ((1ul << NGPIO_HPINS) - 1)
+#define _NA_         0xff
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32_GPIO_IRQ
+static uint8_t g_gpio_cpuint;
+#endif
+
+static const uint8_t g_pin2func[40] =
+{
+  0x44, 0x88, 0x40, 0x84, 0x48, 0x6c, 0x60, 0x64,  /* 0-7 */
+  0x68, 0x54, 0x58, 0x5c, 0x34, 0x38, 0x30, 0x3c,  /* 8-15 */
+  0x4c, 0x50, 0x70, 0x74, 0x78, 0x7c, 0x80, 0x8c,  /* 16-23 */
+  _NA_, 0x24, 0x28, 0x2c, _NA_, _NA_, _NA_, _NA_,  /* N/A, 25-27, N/A, N/A, N/A, N/A */
+  0x1c, 0x20, 0x14, 0x18, 0x04, 0x08, 0x0c, 0x10   /* 32-39 */
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: gpio_dispatch
+ *
+ * Description:
+ *   Second level dispatch for GPIO interrupt handling.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32_GPIO_IRQ
+static void gpio_dispatch(int irq, uint32_t status, uint32_t *regs)
+{
+  uint32_t mask;
+  int i;
+
+  /* Check each bit in the status register */
+
+  for (i = 0; i < 32 && status != 0; i++)
+    {
+      /* Check if there is an interrupt pending for this pin */
+
+      mask = (1ul << i);
+      if ((status & mask) != 0)
+        {
+          /* Yes... perform the second level dispatch */
+
+          irq_dispatch(irq + i, regs);
+
+          /* Clear the bit in the status so that we might execute this loop
+           * sooner.
+           */
+
+          status &= ~mask;
+        }
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: gpio_interrupt
+ *
+ * Description:
+ *   GPIO interrupt handler.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32_GPIO_IRQ
+static int gpio_interrupt(int irq, FAR void *context, FAR void *arg)
+{
+  uint32_t status;
+
+  /* Read and clear the lower GPIO interrupt status */
+
+  status = getreg32(GPIO_STATUS_REG);
+  putreg32(status, GPIO_STATUS_W1TC_REG);
+
+  /* Dispatch pending interrupts in the lower GPIO status register */
+
+  gpio_dispatch(ESP32_FIRST_GPIOIRQ, status, (uint32_t *)context);
+
+  /* Read and clear the upper GPIO interrupt status */
+
+  status = getreg32(GPIO_STATUS1_REG) & NGPIO_HMASK;
+  putreg32(status, GPIO_STATUS1_W1TC_REG);
+
+  /* Dispatch pending interrupts in the lower GPIO status register */
+
+  gpio_dispatch(ESP32_FIRST_GPIOIRQ + 32, status, (uint32_t *)context);
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32_configgpio
+ *
+ * Description:
+ *   Configure a GPIO pin based on encoded pin attributes.
+ *
+ ****************************************************************************/
+
+int esp32_configgpio(int pin, gpio_pinattr_t attr)
+{
+  uintptr_t regaddr;
+  uint32_t func;
+  uint32_t cntrl;
+  unsigned int pinmode;
+
+  DEBUGASSERT(pin >=0 && pin <= ESP32_NIRQ_GPIO);
+
+  /* Handle input pins */
+
+  func  = 0;
+  cntrl = 0;
+
+  if ((attr & INPUT) != 0)
+    {
+      if (pin < 32)
+        {
+          putreg32((1ul << pin), GPIO_ENABLE_W1TC_REG);
+        }
+      else
+        {
+          putreg32((1ul << (pin - 32)), GPIO_ENABLE1_DATA_W1TC);
+        }
+
+      if ((attr & PULLUP) != 0)
+        {
+          func |= FUN_PU;
+        }
+      else if (attr & PULLDOWN)
+        {
+          func |= FUN_PD;
+        }
+    }
+
+  /* Handle output pins */
+
+  else if ((attr & OUTPUT) != 0)
+    {
+      if (pin < 32)
+        {
+          putreg32((1ul << pin), GPIO_ENABLE_DATA_W1TS);
+        }
+      else
+        {
+          putreg32((1ul << (pin - 32)), GPIO_ENABLE1_DATA_W1TS);
+        }
+    }
+
+  /* Add drivers */
+
+  func |= (uint32_t)(2ul << FUN_DRV_S);
+
+  /* Input enable... Required for output as well? */
+
+  func |= FUN_IE;
+
+  pinmode = (attr & PINMODE_MASK);
+  if (pinmode == INPUT || pinmode == OUTPUT)
+    {
+      func |= (uint32_t)(2 << MCU_SEL_S);
+    }
+  else if ((attr & FUNCTION_MASK) == SPECIAL)
+    {
+      func |= (uint32_t)((((pin) == 1 || (pin) == 3) ? 0 : 1) << MCU_SEL_S);
+    }
+  else /* if ((attr & FUNCTION) != 0) */
+    {
+      func |= (uint32_t)((attr >> FUNCTION_SHIFT) << MCU_SEL_S);
+    }
+
+  if ((attr & OPEN_DRAIN) != 0)
+    {
+      cntrl = (1 << GPIO_PIN_PAD_DRIVER_S);
+    }
+
+  regaddr = DR_REG_IO_MUX_BASE + g_pin2func[pin];
+  putreg32(func, regaddr);
+
+  regaddr = GPIO_REG(pin);
+  putreg32(cntrl, regaddr);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: esp32_gpiowrite
+ *
+ * Description:
+ *   Write one or zero to the selected GPIO pin
+ *
+ ****************************************************************************/
+
+void esp32_gpiowrite(int pin, bool value)
+{
+  DEBUGASSERT(pin >=0 && pin <= ESP32_NIRQ_GPIO);
+
+  if (value)
+    {
+      if (pin < 32)
+        {
+          putreg32((uint32_t)(1ul << pin), GPIO_OUT_W1TS_REG);
+        }
+      else
+        {
+          putreg32((uint32_t)(1ul << (pin - 32)), GPIO_OUT1_W1TS_REG);
+        }
+    }
+  else
+    {
+      if (pin < 32)
+        {
+          putreg32((uint32_t)(1ul << pin), GPIO_OUT_W1TC_REG);
+        }
+      else
+        {
+          putreg32((uint32_t)(1ul << (pin - 32)), GPIO_OUT1_W1TC_REG);
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: esp32_gpioread
+ *
+ * Description:
+ *   Read one or zero from the selected GPIO pin
+ *
+ ****************************************************************************/
+
+bool esp32_gpioread(int pin)
+{
+  uint32_t regval;
+ 
+  DEBUGASSERT(pin >=0 && pin <= ESP32_NIRQ_GPIO);
+
+  if (pin < 32)
+    {
+      regval = getreg32(GPIO_IN_REG);
+      return ((regval >> pin) & 1) != 0;
+    }
+  else
+    {
+      regval = getreg32(GPIO_IN1_REG);
+      return ((regval >> (pin - 32)) & 1) != 0;
+    }
+}
+
+/****************************************************************************
+ * Name: esp32_gpioirqinitialize
+ *
+ * Description:
+ *   Initialize logic to support a second level of interrupt decoding for
+ *   GPIO pins.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32_GPIO_IRQ
+void esp32_gpioirqinitialize(void)
+{
+  int cpu;
+
+  /* Allocate a level-sensitive, priority 1 CPU interrupt */
+
+  g_gpio_cpuint = esp32_alloc_levelint(1);
+  DEBUGASSERT(g_gpio_cpuint >= 0);
+
+  /* Set up to receive peripheral interrupts on the current CPU */
+
+#ifdef CONFIG_SMP
+  cpu = up_cpu_index();
+#else
+  cpu = 0;
+#endif
+
+  /* Attach the GPIO peripheral to the allocated CPU interrupt */
+
+  up_disable_irq(g_gpio_cpuint);
+  esp32_attach_peripheral(cpu, ESP32_PERIPH_CPU_GPIO, g_gpio_cpuint);
+
+  /* Attach and enable the interrupt handler */
+
+  DEBUGVERIFY(irq_attach(ESP32_IRQ_CPU_GPIO, gpio_interrupt, NULL));
+  up_enable_irq(g_gpio_cpuint);
+}
+#endif
+
+/****************************************************************************
+ * Name: esp32_gpioirqenable
+ *
+ * Description:
+ *   Enable the COPY interrupt for specified GPIO IRQ
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32_GPIO_IRQ
+void esp32_gpioirqenable(int irq, gpio_intrtype_t intrtype)
+{
+  uintptr_t regaddr;
+  uint32_t regval;
+  int cpu;
+  int pin;
+
+  DEBUGASSERT(irq <= ESP32_FIRST_GPIOIRQ && irq <= ESP32_LAST_GPIOIRQ);
+
+  /* Convert the IRQ number to a pin number */
+
+  pin = ESP32_IRQ2PIN(irq);
+
+  /* Get the address of the GPIO PIN register for this pin */
+
+  up_disable_irq(g_gpio_cpuint);
+
+  regaddr = GPIO_REG(pin);
+  regval  = getreg32(regaddr);
+  regval &= ~(GPIO_PIN_INT_ENA_M | GPIO_PIN_INT_TYPE_M);
+
+  /* Set the pin ENA field:
+   *
+   *   Bit 0: APP CPU interrupt enable
+   *   Bit 1: APP CPU non-maskable interrupt enable
+   *   Bit 3: PRO CPU interrupt enable
+   *   Bit 4: PRO CPU non-maskable interrupt enable
+   *   Bit 5: SDIO's extent interrupt enable.
+   */
+
+  cpu = up_cpu_index();
+  if (cpu == 0)
+    {
+      /* PRO_CPU */
+
+      regval |= ((1 << 2) << GPIO_PIN_INT_ENA_S);
+    }
+  else
+    {
+      /* APP_CPU */
+
+      regval |= ((1 << 0) << GPIO_PIN_INT_ENA_S);
+    }
+
+  regval |= (intrtype << GPIO_PIN_INT_TYPE_S);
+  putreg32(regval, regaddr);
+
+  up_enable_irq(g_gpio_cpuint);
+}
+#endif
+
+/****************************************************************************
+ * Name: esp32_gpioirqdisable
+ *
+ * Description:
+ *   Disable the interrupt for specified GPIO IRQ
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32_GPIO_IRQ
+void esp32_gpioirqdisable(int irq)
+{
+  uintptr_t regaddr;
+  uint32_t regval;
+  int pin;
+
+  DEBUGASSERT(irq <= ESP32_FIRST_GPIOIRQ && irq <= ESP32_LAST_GPIOIRQ);
+
+  /* Convert the IRQ number to a pin number */
+
+  pin = ESP32_IRQ2PIN(irq);
+
+  /* Get the address of the GPIO PIN register for this pin */
+
+  up_disable_irq(g_gpio_cpuint);
+
+  regaddr = GPIO_REG(pin);
+  regval  = getreg32(regaddr);
+  regval &= ~(GPIO_PIN_INT_ENA_M | GPIO_PIN_INT_TYPE_M);
+  putreg32(regval, regaddr);
+
+  up_enable_irq(g_gpio_cpuint);
+}
+#endif
diff --git a/arch/xtensa/src/esp32/esp32_gpio.h b/arch/xtensa/src/esp32/esp32_gpio.h
new file mode 100644
index 0000000000000000000000000000000000000000..e4b647b976492b3dfa5036f61f4a269674b8f8cc
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_gpio.h
@@ -0,0 +1,213 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_gpio.h
+ *
+ * Developed for NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derivies in part from sample code provided by Expressif Systems:
+ *
+ *   Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_ESP32_ESP32_GPIO_H
+#define __ARCH_XTENSA_SRC_ESP32_ESP32_GPIO_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Bit-encoded input to esp32_configgpio() **********************************/
+
+/* Encoded pin attributes used with esp32_configgpio()
+ *
+ * 8  7  6  5  4  3  2  1  0
+ * -- -- -- -- -- -- -- -- --
+ * FN FN FN OD PD PU F  O  I
+ */
+
+#define PINMODE_SHIFT       0
+#define PINMODE_MASK        (7 << PINMODE_SHIFT)
+#  define INPUT             (1 << 0)
+#  define OUTPUT            (1 << 1)
+#  define FUNCTION          (1 << 2)
+
+#define PULLUP              (1 << 3)
+#define PULLDOWN            (1 << 4)
+#define OPEN_DRAIN          (1 << 5)
+#define FUNCTION_SHIFT      6
+#define FUNCTION_MASK       (7 << FUNCTION_SHIFT)
+#  define FUNCTION_0        (0 << FUNCTION_SHIFT)
+#  define FUNCTION_1        (1 << FUNCTION_SHIFT)
+#  define FUNCTION_2        (2 << FUNCTION_SHIFT)
+#  define FUNCTION_3        (3 << FUNCTION_SHIFT)
+#  define FUNCTION_4        (4 << FUNCTION_SHIFT)
+#  define SPECIAL           (7 << FUNCTION_SHIFT)
+
+#define INPUT_PULLUP        (INPUT | PULLUP)
+#define INPUT_PULLDOWN      (INPUT | PULLDOWN)
+#define OUTPUT_OPEN_DRAIN   (OUTPUT | OPEN_DRAIN)
+#define INPUT_FUNCTION      (INPUT | FUNCTION)
+#  define INPUT_FUNCTION_0  (INPUT_FUNCTION | FUNCTION_0)
+#  define INPUT_FUNCTION_1  (INPUT_FUNCTION | FUNCTION_1)
+#  define INPUT_FUNCTION_2  (INPUT_FUNCTION | FUNCTION_2)
+#  define INPUT_FUNCTION_3  (INPUT_FUNCTION | FUNCTION_3)
+#  define INPUT_FUNCTION_4  (INPUT_FUNCTION | FUNCTION_4)
+#define OUTPUT_FUNCTION     (OUTPUT | FUNCTION)
+#  define OUTPUT_FUNCTION_0 (OUTPUT_FUNCTION | FUNCTION_0)
+#  define OUTPUT_FUNCTION_1 (OUTPUT_FUNCTION | FUNCTION_1)
+#  define OUTPUT_FUNCTION_2 (OUTPUT_FUNCTION | FUNCTION_2)
+#  define OUTPUT_FUNCTION_3 (OUTPUT_FUNCTION | FUNCTION_3)
+#  define OUTPUT_FUNCTION_4 (OUTPUT_FUNCTION | FUNCTION_4)
+
+/* Interrupt type used with esp32_gpioirqenable() */
+
+#define DISABLED          0x00
+#define RISING            0x01
+#define FALLING           0x02
+#define CHANGE            0x03
+#define ONLOW             0x04
+#define ONHIGH            0x05
+#define ONLOW_WE          0x0c
+#define ONHIGH_WE         0x0d
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/* Must be big enough to hold the the above encodings */
+
+typedef uint16_t gpio_pinattr_t;
+typedef uint8_t gpio_intrtype_t;
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Inline Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32_gpioirqinitialize
+ *
+ * Description:
+ *   Initialize logic to support a second level of interrupt decoding for
+ *   GPIO pins.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32_GPIO_IRQ
+void esp32_gpioirqinitialize(void);
+#else
+#  define esp32_gpioirqinitialize()
+#endif
+
+/****************************************************************************
+ * Name: esp32_configgpio
+ *
+ * Description:
+ *   Configure a GPIO pin based on encoded pin attributes.
+ *
+ ****************************************************************************/
+
+int esp32_configgpio(int pin, gpio_pinattr_t attr);
+
+/****************************************************************************
+ * Name: esp32_gpiowrite
+ *
+ * Description:
+ *   Write one or zero to the selected GPIO pin
+ *
+ ****************************************************************************/
+
+void esp32_gpiowrite(int pin, bool value);
+
+/****************************************************************************
+ * Name: esp32_gpioread
+ *
+ * Description:
+ *   Read one or zero from the selected GPIO pin
+ *
+ ****************************************************************************/
+
+bool esp32_gpioread(int pin);
+
+/****************************************************************************
+ * Name: esp32_gpioirqenable
+ *
+ * Description:
+ *   Enable the interrupt for specified GPIO IRQ
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32_GPIO_IRQ
+void esp32_gpioirqenable(int irq, gpio_intrtype_t intrtype);
+#else
+#  define esp32_gpioirqenable(irq,intrtype)
+#endif
+
+/****************************************************************************
+ * Name: esp32_gpioirqdisable
+ *
+ * Description:
+ *   Disable the interrupt for specified GPIO IRQ
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32_GPIO_IRQ
+void esp32_gpioirqdisable(int irq);
+#else
+#  define esp32_gpioirqdisable(irq)
+#endif
+
+int digitalRead(uint8_t pin);
+
+void attachInterrupt(uint8_t pin, void (*)(void), int mode);
+void detachInterrupt(uint8_t pin);
+
+#ifdef __cplusplus
+}
+#endif
+#undef EXTERN
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_GPIO_H */
diff --git a/arch/xtensa/src/esp32/esp32_intdecode.c b/arch/xtensa/src/esp32/esp32_intdecode.c
new file mode 100644
index 0000000000000000000000000000000000000000..0bc4041524699de8ee791918f55d0b4d2066c50b
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_intdecode.c
@@ -0,0 +1,153 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_intdecode.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "xtensa.h"
+#include "esp32_cpuint.h"
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: xtensa_intclear
+ ****************************************************************************/
+
+static inline void xtensa_intclear(uint32_t mask)
+{
+  __asm__ __volatile__
+  (
+    "movi a2, 0\n"
+    "wsr %0, INTCLEAR\n"
+    : "=r"(mask) : :
+  );
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: xtensa_int_decode
+ *
+ * Description:
+ *   Determine the peripheral that geneated the interrupt and dispatch
+ *   handling to the registered interrupt handler via xtensa_irq_dispatch().
+ *
+ * Input Parameters:
+ *   cpuints - Set of pending interrupts valid for this level
+ *   regs    - Saves processor state on the stack
+ *
+ * Returned Value:
+ *   Normally the same value as regs is returned.  But, in the event of an
+ *   interrupt level context switch, the returned value will, instead point
+ *   to the saved processor state in the TCB of the newly started task.
+ *
+ ****************************************************************************/
+
+uint32_t *xtensa_int_decode(uint32_t cpuints, uint32_t *regs)
+{
+  uint8_t *intmap;
+  uint32_t mask;
+  int bit;
+#ifdef CONFIG_SMP
+  int cpu;
+#endif
+
+#ifdef CONFIG_SMP
+  /* Select PRO or APP CPU interrupt mapping table */
+
+  cpu = up_cpu_index();
+  if (cpu != 0)
+    {
+      intmap = g_cpu1_intmap;
+    }
+  else
+#endif
+    {
+      intmap = g_cpu0_intmap;
+    }
+
+  /* Skip over zero bits, eight at a time */
+
+  for (bit = 0, mask = 0xff;
+       bit < ESP32_NCPUINTS && (cpuints & mask) == 0;
+       bit += 8, mask <<= 8);
+
+  /* Process each pending CPU interrupt */
+
+  for (; bit < ESP32_NCPUINTS && cpuints != 0; bit++)
+    {
+      mask = (1 << bit);
+      if ((cpuints & mask) != 0)
+        {
+          /* Extract the IRQ number from the mapping table */
+
+          uint8_t irq = intmap[bit];
+          DEBUGASSERT(irq != CPUINT_UNASSIGNED);
+
+          /* Clear software or edge-triggered interrupt */
+
+           xtensa_intclear(mask);
+
+          /* Dispatch the CPU interrupt.
+           *
+           * NOTE that regs may be altered in the case of an interrupt
+           * level context switch.
+           */
+
+          regs = xtensa_irq_dispatch((int)irq, regs);
+
+          /* Clear the bit in the pending interrupt so that perhaps
+           * we can exit the look early.
+           */
+
+          cpuints &= ~mask;
+        }
+    }
+
+  return regs;
+}
diff --git a/arch/xtensa/src/esp32/esp32_intercpu_interrupt.c b/arch/xtensa/src/esp32/esp32_intercpu_interrupt.c
new file mode 100644
index 0000000000000000000000000000000000000000..779aa3d7465898b855435c7b9072aaee18482c16
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_intercpu_interrupt.c
@@ -0,0 +1,194 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_intercpu_interrupt.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt >
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "chip/esp32_dport.h"
+#include "xtensa.h"
+
+#ifdef CONFIG_SMP
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Single parameter passed with the inter-CPU interrupt */
+
+static volatile uint8_t g_intcode[CONFIG_SMP_NCPUS] SP_SECTION;
+
+/* Spinlock protects parameter array */
+
+static volatile spinlock_t g_intercpu_spin[CONFIG_SMP_NCPUS] SP_SECTION =
+{
+  SP_UNLOCKED, SP_UNLOCKED
+};
+
+/****************************************************************************
+ * Private Function
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32_fromcpu_interrupt
+ *
+ * Description:
+ *   Common logic called to handle the from CPU0/1 interrupts.
+ *
+ ****************************************************************************/
+
+static int esp32_fromcpu_interrupt(int fromcpu)
+{
+  uintptr_t regaddr;
+  int intcode;
+  int tocpu;
+
+  DEBUGASSERT((unsigned)fromcpu < CONFIG_SMP_NCPUS);
+
+  /* Clear the interrupt from the other CPU */
+
+  regaddr = (fromcpu == 0) ? DPORT_CPU_INTR_FROM_CPU_0_REG :
+                             DPORT_CPU_INTR_FROM_CPU_1_REG;
+  putreg32(0, regaddr);
+
+  /* Get the the inter-CPU interrupt code */
+
+  tocpu            = up_cpu_index();
+  intcode          = g_intcode[tocpu];
+  g_intcode[tocpu] = CPU_INTCODE_NONE;
+
+  spin_unlock(&g_intercpu_spin[tocpu]);
+
+  /* Dispatch the inter-CPU interrupt based on the intcode value */
+
+  switch (intcode)
+    {
+      case CPU_INTCODE_NONE:
+        break;
+
+      case CPU_INTCODE_PAUSE:
+        xtensa_pause_handler();
+        break;
+
+      default:
+        DEBUGPANIC();
+        break;
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32_fromcpu[0,1]_interrupt
+ *
+ * Description:
+ *   Called to handle the from CPU0/1 interrupts.
+ *
+ ****************************************************************************/
+
+int esp32_fromcpu0_interrupt(int irq, FAR void *context, FAR void *arg)
+{
+  return esp32_fromcpu_interrupt(0);
+}
+
+int esp32_fromcpu1_interrupt(int irq, FAR void *context, FAR void *arg)
+{
+  return esp32_fromcpu_interrupt(1);
+}
+
+/****************************************************************************
+ * Name: xtensa_intercpu_interrupt
+ *
+ * Description:
+ *   Called to trigger a CPU interrupt
+ *
+ ****************************************************************************/
+
+int xtensa_intercpu_interrupt(int tocpu, int intcode)
+{
+  int fromcpu;
+
+  DEBUGASSERT((unsigned)tocpu < CONFIG_SMP_NCPUS &&
+              (unsigned)intcode <= UINT8_MAX);
+
+  /* Make sure that each inter-cpu event is atomic.  The spinlock should
+   * only be locked if we just completed sending an interrupt to this
+   * CPU but the other CPU has not yet processed it.
+   */
+
+  spin_lock(&g_intercpu_spin[tocpu]);
+
+  /* Save the passed parameter.  The previous interrupt code should be
+   * CPU_INTCODE_NONE or we have overrun the other CPU.
+   */
+
+  DEBUGASSERT(g_intcode[tocpu] == CPU_INTCODE_NONE);
+  g_intcode[tocpu] = intcode;
+
+  /* Interrupt the other CPU (tocpu) form this CPU.  NOTE: that this logic
+   * fails in numerous ways if fromcpu == tocpu (for example because non-
+   * reentrant spinlocks are used).
+   */
+
+  fromcpu = up_cpu_index();
+  DEBUGASSERT(fromcpu != tocpu);
+
+  if (fromcpu == 0)
+    {
+      putreg32(DPORT_CPU_INTR_FROM_CPU_0, DPORT_CPU_INTR_FROM_CPU_0_REG);
+    }
+  else
+    {
+      putreg32(DPORT_CPU_INTR_FROM_CPU_1, DPORT_CPU_INTR_FROM_CPU_1_REG);
+    }
+
+  return OK;
+}
+
+#endif /* CONFIG_SMP */
diff --git a/arch/xtensa/src/esp32/esp32_irq.c b/arch/xtensa/src/esp32/esp32_irq.c
new file mode 100644
index 0000000000000000000000000000000000000000..c5a43a3d55e0a538b4ee45d34a9828272ff5f6be
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_irq.c
@@ -0,0 +1,171 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_irq.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "xtensa.h"
+#include "esp32_cpuint.h"
+#include "esp32_smp.h"
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* g_current_regs[] holds a references to the current interrupt level
+ * register storage structure.  If is non-NULL only during interrupt
+ * processing.  Access to g_current_regs[] must be through the macro
+ * CURRENT_REGS for portability.
+ */
+
+#ifdef CONFIG_SMP
+/* For the case of architectures with multiple CPUs, then there must be one
+ * such value for each processor that can receive an interrupt.
+ */
+
+volatile uint32_t *g_current_regs[CONFIG_SMP_NCPUS];
+
+#else
+
+volatile uint32_t *g_current_regs[1];
+
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32_irq_dump
+ *
+ * Description:
+ *   Dump some interesting NVIC registers
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_DEBUG_IRQ_INFO)
+static void esp32_irq_dump(const char *msg, int irq)
+{
+  irqstate_t flags;
+
+  flags = enter_critical_section();
+#warning Missing logic
+  leave_critical_section(flags);
+}
+#else
+#  define esp32_irq_dump(msg, irq)
+#endif
+
+/****************************************************************************
+ * Name: xtensa_attach_fromcpu1_interrupt
+ ****************************************************************************/
+
+#ifdef CONFIG_SMP
+static inline void xtensa_attach_fromcpu1_interrupt(void)
+{
+  int cpuint;
+
+  /* Allocate a level-sensitive, priority 1 CPU interrupt for the UART */
+
+  cpuint = esp32_alloc_levelint(1);
+  DEBUGASSERT(cpuint >= 0);
+
+  /* Connect all CPU peripheral source to allocated CPU interrupt */
+
+  up_disable_irq(cpuint);
+  esp32_attach_peripheral(0, ESP32_PERIPH_CPU_CPU1, cpuint);
+
+  /* Attach the inter-CPU interrupt. */
+
+  (void)irq_attach(ESP32_IRQ_CPU_CPU1, (xcpt_t)esp32_fromcpu1_interrupt, NULL);
+
+  /* Enable the inter 0 CPU interrupt. */
+
+  up_enable_irq(cpuint);
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: xtensa_irq_initialize
+ ****************************************************************************/
+
+void xtensa_irq_initialize(void)
+{
+  /* Initialize CPU interrupts */
+
+  (void)esp32_cpuint_initialize();
+
+#if defined(CONFIG_STACK_COLORATION) && defined(HAVE_INTERRUPTSTACK)
+  /* Colorize the interrupt stack for debug purposes */
+
+#warning Missing logic
+#endif
+
+  /* Attach and emable internal interrupts */
+
+#ifdef CONFIG_SMP
+  /* Attach and enable the inter-CPU interrupt */
+
+  xtensa_attach_fromcpu1_interrupt();
+#endif
+
+  esp32_irq_dump("initial", NR_IRQS);
+
+#ifdef CONFIG_ESP32_GPIO_IRQ
+  /* Initialize GPIO interrupt support */
+
+  esp32_gpioirqinitialize();
+#endif
+
+#ifndef CONFIG_SUPPRESS_INTERRUPTS
+  /* And finally, enable interrupts.  Also clears PS.EXCM */
+
+  up_irq_enable();
+#endif
+}
diff --git a/arch/xtensa/src/esp32/esp32_region.c b/arch/xtensa/src/esp32/esp32_region.c
new file mode 100644
index 0000000000000000000000000000000000000000..1e64aa7e32f76328c43013eb1637b00ddcd2a618
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_region.c
@@ -0,0 +1,108 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_region.c
+ *
+ * Developed for NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from code originally provided Espressif Systems:
+ *
+ * C  opyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const uint32_t g_protected_pages[] =
+{
+  0x00000000, 0x80000000, 0xa0000000, 0xc0000000, 0xe0000000
+};
+
+#define NPROTECTED_PAGES (sizeof(g_protected_pages)/sizeof(uint32_t))
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: xtensa_write_dtlb and xtensa_write_itlb
+ *
+ * Description:
+ *   Functions to set page attributes for Region Protection option in the
+ *   CPU.  See Xtensa ISA Reference manual for explanation of arguments
+ *   (section 4.6.3.2).
+ *
+ ****************************************************************************/
+
+static inline void xtensa_write_dtlb(uint32_t vpn, unsigned int attr)
+{
+   __asm__ __volatile__
+   (
+     "wdtlb  %1, %0\n"
+     "dsync\n"
+     : : "r" (vpn), "r" (attr)
+   );
+}
+
+static inline void xtensa_write_itlb(unsigned vpn, unsigned int attr)
+{
+   __asm__ __volatile__
+   (
+     "witlb  %1, %0\n"
+     "isync\n"
+     : : "r" (vpn), "r" (attr)
+   );
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32_region_protection
+ *
+ * Description:
+ *   Make page 0 access raise an exception.  Also protect some other unused
+ *   pages so we can catch weirdness.
+ *
+ *   Useful attribute values:
+ *     0  — cached, RW
+ *     2  — bypass cache, RWX (default value after CPU reset)
+ *     15 — no access, raise exception
+ *
+ ****************************************************************************/
+
+void esp32_region_protection(void)
+{
+  int i;
+
+  for (i = 0; i < NPROTECTED_PAGES; ++i)
+    {
+      xtensa_write_dtlb(g_protected_pages[i], 0xf);
+      xtensa_write_itlb(g_protected_pages[i], 0xf);
+    }
+
+  xtensa_write_dtlb(0x20000000, 0);
+  xtensa_write_itlb(0x20000000, 0);
+}
diff --git a/arch/xtensa/src/esp32/esp32_region.h b/arch/xtensa/src/esp32/esp32_region.h
new file mode 100644
index 0000000000000000000000000000000000000000..6a39afad09ddb8972faedfedff7d3a7ececd697c
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_region.h
@@ -0,0 +1,67 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_region.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt >
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_ESP32_ESP32_REGION_H
+#define __ARCH_XTENSA_SRC_ESP32_ESP32_REGION_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32_region_protection
+ *
+ * Description:
+ *   Make page 0 access raise an exception.  Also protect some other unused
+ *   pages so we can catch weirdness.
+ *
+ *   Useful attribute values:
+ *     0  — cached, RW
+ *     2  — bypass cache, RWX (default value after CPU reset)
+ *     15 — no access, raise exception
+ *
+ ****************************************************************************/
+
+void esp32_region_protection(void);
+
+#endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_REGION_H */
diff --git a/arch/xtensa/src/esp32/esp32_serial.c b/arch/xtensa/src/esp32/esp32_serial.c
new file mode 100644
index 0000000000000000000000000000000000000000..a5b132487dd24fe8d8e57ac5818b168471233481
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_serial.c
@@ -0,0 +1,1271 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_serial.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_SERIAL_TERMIOS
+#  include 
+#endif
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "xtensa.h"
+#include "chip/esp32_soc.h"
+#include "chip/esp32_iomux.h"
+#include "chip/esp32_gpio_sigmap.h"
+#include "chip/esp32_uart.h"
+#include "rom/esp32_gpio.h"
+#include "esp32_config.h"
+#include "esp32_gpio.h"
+#include "esp32_cpuint.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef USE_SERIALDRIVER
+
+/* Which UART with be tty0/console and which tty1-2? */
+
+/* First pick the console and ttys0.  This could be any of UART0-5 */
+
+#if defined(CONFIG_UART0_SERIAL_CONSOLE)
+#    define CONSOLE_DEV         g_uart0port  /* UART0 is console */
+#    define TTYS0_DEV           g_uart0port  /* UART0 is ttyS0 */
+#    define UART0_ASSIGNED      1
+#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
+#    define CONSOLE_DEV         g_uart1port  /* UART1 is console */
+#    define TTYS0_DEV           g_uart1port  /* UART1 is ttyS0 */
+#    define UART1_ASSIGNED      1
+#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
+#    define CONSOLE_DEV         g_uart2port  /* UART2 is console */
+#    define TTYS0_DEV           g_uart2port  /* UART2 is ttyS0 */
+#    define UART2_ASSIGNED      1
+#else
+#  undef CONSOLE_DEV                         /* No console */
+#  if defined(CONFIG_ESP32_UART0)
+#    define TTYS0_DEV           g_uart0port  /* UART0 is ttyS0 */
+#    define UART0_ASSIGNED      1
+#  elif defined(CONFIG_ESP32_UART1)
+#    define TTYS0_DEV           g_uart1port  /* UART1 is ttyS0 */
+#    define UART1_ASSIGNED      1
+#  elif defined(CONFIG_ESP32_UART2)
+#    define TTYS0_DEV           g_uart2port  /* UART2 is ttyS0 */
+#    define UART2_ASSIGNED      1
+#  endif
+#endif
+
+/* Pick ttys1.  This could be any of UART0-2 excluding the console
+ * UART.
+ */
+
+#if defined(CONFIG_ESP32_UART0) && !defined(UART0_ASSIGNED)
+#  define TTYS1_DEV           g_uart0port  /* UART0 is ttyS1 */
+#  define UART0_ASSIGNED      1
+#elif defined(CONFIG_ESP32_UART1) && !defined(UART1_ASSIGNED)
+#  define TTYS1_DEV           g_uart1port  /* UART1 is ttyS1 */
+#  define UART1_ASSIGNED      1
+#elif defined(CONFIG_ESP32_UART2) && !defined(UART2_ASSIGNED)
+#  define TTYS1_DEV           g_uart2port  /* UART2 is ttyS1 */
+#  define UART2_ASSIGNED      1
+#endif
+
+/* Pick ttys2.  This could be one of UART1-2. It can't be UART0
+ * because that was either assigned as ttyS0 or ttys1.  One of these
+ * could also be the console.
+ */
+
+#if defined(CONFIG_ESP32_UART1) && !defined(UART1_ASSIGNED)
+#  define TTYS2_DEV           g_uart1port  /* UART1 is ttyS2 */
+#  define UART1_ASSIGNED      1
+#elif defined(CONFIG_ESP32_UART2) && !defined(UART2_ASSIGNED)
+#  define TTYS2_DEV           g_uart2port  /* UART2 is ttyS2 */
+#  define UART2_ASSIGNED      1
+#endif
+
+/* UART source clock for BAUD generation */
+
+#define UART_CLK_FREQ         APB_CLK_FREQ
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+/* Constant properties of the UART.  Other configuration setting may be
+ * changable via Termios IOCTL calls.
+ */
+
+struct esp32_config_s
+{
+  const uint32_t uartbase;      /* Base address of UART registers */
+  uint8_t  periph;              /* UART peripheral ID */
+  uint8_t  irq;                 /* IRQ number assigned to the peripheral */
+  uint8_t  txpin;               /* Tx pin number (0-39) */
+  uint8_t  rxpin;               /* Rx pin number (0-39) */
+  uint8_t  txsig;               /* Tx signal */
+  uint8_t  rxsig;               /* Rx signal */
+#if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL)
+  uint8_t  rtspin;              /* RTS pin number (0-39) */
+  uint8_t  ctspin;              /* CTS pin number (0-39) */
+  uint8_t  rtssig;              /* RTS signal */
+  uint8_t  ctssig;              /* CTS signal */
+#endif
+};
+
+/* Current state of the UART */
+
+struct esp32_dev_s
+{
+  const struct esp32_config_s *config; /* Constant configuration */
+  uint32_t baud;                /* Configured baud */
+  uint32_t status;              /* Saved status bits */
+  uint8_t  cpuint;              /* CPU interrupt assigned to this UART */
+  uint8_t  parity;              /* 0=none, 1=odd, 2=even */
+  uint8_t  bits;                /* Number of bits (5-9) */
+  bool     stopbits2;           /* true: Configure with 2 stop bits instead of 1 */
+#if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL)
+  bool     flowc;               /* Input flow control (RTS) enabled */
+#endif
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int  esp32_setup(struct uart_dev_s *dev);
+static void esp32_shutdown(struct uart_dev_s *dev);
+static int  esp32_attach(struct uart_dev_s *dev);
+static void esp32_detach(struct uart_dev_s *dev);
+static int  esp32_interrupt(int cpuint, void *context, FAR void *arg);
+static int  esp32_ioctl(struct file *filep, int cmd, unsigned long arg);
+static int  esp32_receive(struct uart_dev_s *dev, unsigned int *status);
+static void esp32_rxint(struct uart_dev_s *dev, bool enable);
+static bool esp32_rxavailable(struct uart_dev_s *dev);
+static void esp32_send(struct uart_dev_s *dev, int ch);
+static void esp32_txint(struct uart_dev_s *dev, bool enable);
+static bool esp32_txready(struct uart_dev_s *dev);
+static bool esp32_txempty(struct uart_dev_s *dev);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct uart_ops_s g_uart_ops =
+{
+  .setup          = esp32_setup,
+  .shutdown       = esp32_shutdown,
+  .attach         = esp32_attach,
+  .detach         = esp32_detach,
+  .ioctl          = esp32_ioctl,
+  .receive        = esp32_receive,
+  .rxint          = esp32_rxint,
+  .rxavailable    = esp32_rxavailable,
+#ifdef CONFIG_SERIAL_IFLOWCONTROL
+  .rxflowcontrol  = NULL,
+#endif
+  .send           = esp32_send,
+  .txint          = esp32_txint,
+  .txready        = esp32_txready,
+  .txempty        = esp32_txempty,
+};
+
+/* I/O buffers */
+
+#ifdef CONFIG_ESP32_UART0
+static char g_uart0rxbuffer[CONFIG_UART0_RXBUFSIZE];
+static char g_uart0txbuffer[CONFIG_UART0_TXBUFSIZE];
+#endif
+#ifdef CONFIG_ESP32_UART1
+static char g_uart1rxbuffer[CONFIG_UART1_RXBUFSIZE];
+static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE];
+#endif
+#ifdef CONFIG_ESP32_UART2
+static char g_uart2rxbuffer[CONFIG_UART2_RXBUFSIZE];
+static char g_uart2txbuffer[CONFIG_UART2_TXBUFSIZE];
+#endif
+
+/* This describes the state of the UART0 port. */
+
+#ifdef CONFIG_ESP32_UART0
+static const struct esp32_config_s g_uart0config =
+{
+  .uartbase       = DR_REG_UART_BASE,
+  .periph         = ESP32_PERIPH_UART,
+  .irq            = ESP32_IRQ_UART,
+  .txpin          = CONFIG_ESP32_UART0_TXPIN,
+  .rxpin          = CONFIG_ESP32_UART0_RXPIN,
+  .txsig          = U0TXD_OUT_IDX,
+  .rxsig          = U0RXD_IN_IDX,
+#if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL)
+  .rtspin         = CONFIG_ESP32_UART0_RTSPIN,
+  .ctspin         = CONFIG_ESP32_UART0_CTSPIN,
+  .rtssig         = U0RTS_OUT_IDX,
+  .ctssig         = U0CTS_IN_IDX,
+#endif
+};
+
+static struct esp32_dev_s g_uart0priv =
+{
+  .config         = &g_uart0config,
+  .baud           = CONFIG_UART0_BAUD,
+  .parity         = CONFIG_UART0_PARITY,
+  .bits           = CONFIG_UART0_BITS,
+  .stopbits2      = CONFIG_UART0_2STOP,
+};
+
+static uart_dev_t g_uart0port =
+{
+  .recv     =
+  {
+    .size   = CONFIG_UART0_RXBUFSIZE,
+    .buffer = g_uart0rxbuffer,
+  },
+  .xmit     =
+  {
+    .size   = CONFIG_UART0_TXBUFSIZE,
+    .buffer = g_uart0txbuffer,
+  },
+  .ops      = &g_uart_ops,
+  .priv     = &g_uart0priv,
+};
+#endif
+
+/* This describes the state of the UART1 port. */
+
+#ifdef CONFIG_ESP32_UART1
+static const struct esp32_config_s g_uart1config =
+{
+  .uartbase       = DR_REG_UART1_BASE,
+  .periph         = ESP32_PERIPH_UART1,
+  .irq            = ESP32_IRQ_UART1,
+  .txpin          = CONFIG_ESP32_UART1_TXPIN,
+  .rxpin          = CONFIG_ESP32_UART1_RXPIN,
+  .txsig          = U1TXD_OUT_IDX,
+  .rxsig          = U1RXD_IN_IDX,
+#if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL)
+  .rtspin         = CONFIG_ESP32_UART1_RTSPIN,
+  .ctspin         = CONFIG_ESP32_UART1_CTSPIN,
+  .rtssig         = U1RTS_OUT_IDX,
+  .ctssig         = U1CTS_IN_IDX,
+#endif
+};
+
+static struct esp32_dev_s g_uart1priv =
+{
+  .config         = &g_uart1config,
+  .baud           = CONFIG_UART1_BAUD,
+  .parity         = CONFIG_UART1_PARITY,
+  .bits           = CONFIG_UART1_BITS,
+  .stopbits2      = CONFIG_UART1_2STOP,
+};
+
+static uart_dev_t g_uart1port =
+{
+  .recv     =
+  {
+    .size   = CONFIG_UART1_RXBUFSIZE,
+    .buffer = g_uart1rxbuffer,
+  },
+  .xmit     =
+  {
+    .size   = CONFIG_UART1_TXBUFSIZE,
+    .buffer = g_uart1txbuffer,
+  },
+  .ops      = &g_uart_ops,
+  .priv     = &g_uart1priv,
+};
+#endif
+
+/* This describes the state of the UART2 port. */
+
+#ifdef CONFIG_ESP32_UART2
+static const struct esp32_config_s g_uart2config =
+{
+  .uartbase       = DR_REG_UART2_BASE,
+  .periph         = ESP32_PERIPH_UART2,
+  .irq            = ESP32_IRQ_UART2,
+  .txpin          = CONFIG_ESP32_UART2_TXPIN,
+  .rxpin          = CONFIG_ESP32_UART2_RXPIN,
+  .txsig          = U2TXD_OUT_IDX,
+  .rxsig          = U2RXD_IN_IDX,
+#if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL)
+  .rtspin         = CONFIG_ESP32_UART2_RTSPIN,
+  .ctspin         = CONFIG_ESP32_UART2_CTSPIN,
+  .rtssig         = U2RTS_OUT_IDX,
+  .ctssig         = U2CTS_IN_IDX,
+#endif
+};
+
+static struct esp32_dev_s g_uart2priv =
+{
+  .config         = &g_uart2config,
+  .baud           = CONFIG_UART2_BAUD,
+  .parity         = CONFIG_UART2_PARITY,
+  .bits           = CONFIG_UART2_BITS,
+  .stopbits2      = CONFIG_UART2_2STOP,
+};
+
+static uart_dev_t g_uart2port =
+{
+  .recv     =
+  {
+    .size   = CONFIG_UART2_RXBUFSIZE,
+    .buffer = g_uart2rxbuffer,
+  },
+  .xmit     =
+  {
+    .size   = CONFIG_UART2_TXBUFSIZE,
+    .buffer = g_uart2txbuffer,
+  },
+  .ops      = &g_uart_ops,
+  .priv     = &g_uart2priv,
+};
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32_serialin
+ ****************************************************************************/
+
+static inline uint32_t esp32_serialin(struct esp32_dev_s *priv, int offset)
+{
+  return getreg32(priv->config->uartbase + offset);
+}
+
+/****************************************************************************
+ * Name: esp32_serialout
+ ****************************************************************************/
+
+static inline void esp32_serialout(struct esp32_dev_s *priv, int offset,
+                                   uint32_t value)
+{
+  putreg32(value, priv->config->uartbase + offset);
+}
+
+/****************************************************************************
+ * Name: esp32_restoreuartint
+ ****************************************************************************/
+
+static inline void esp32_restoreuartint(struct esp32_dev_s *priv,
+                                        uint32_t intena)
+{
+  /* Restore the previous interrupt state (assuming all interrupts disabled) */
+
+  esp32_serialout(priv, UART_INT_ENA_OFFSET, intena);
+}
+
+/****************************************************************************
+ * Name: esp32_disableallints
+ ****************************************************************************/
+
+static void esp32_disableallints(struct esp32_dev_s *priv, uint32_t *intena)
+{
+  irqstate_t flags;
+
+  /* The following must be atomic */
+
+  flags = enter_critical_section();
+
+  if (intena)
+    {
+      /* Return the current interrupt mask */
+
+      *intena = esp32_serialin(priv, UART_INT_ENA_OFFSET);
+    }
+
+  /* Disable all interrupts */
+
+  esp32_serialout(priv, UART_INT_ENA_OFFSET, 0);
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: esp32_setup
+ *
+ * Description:
+ *   Configure the UART baud, bits, parity, etc. This method is called the
+ *   first time that the serial port is opened.
+ *
+ ****************************************************************************/
+
+static int esp32_setup(struct uart_dev_s *dev)
+{
+#ifndef CONFIG_SUPPRESS_UART_CONFIG
+  struct esp32_dev_s *priv = (struct esp32_dev_s *)dev->priv;
+  uint32_t clkdiv;
+  uint32_t regval;
+  uint32_t conf0;
+
+  /* Note: The logic here depends on the fact that that the UART module
+   * was enabled and the pins were configured in esp32_lowsetup().
+   */
+
+  /* The shutdown method will put the UART in a known, disabled state */
+
+  esp32_shutdown(dev);
+
+  /* Set up the CONF0 register. */
+
+  conf0 = UART_TICK_REF_ALWAYS_ON;
+
+#if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL)
+  /* Check if flow control is enabled */
+
+  if (priv->flowc)
+    {
+      /* Enable hardware flow control */
+
+      conf0 |= UART_TX_FLOW_EN;
+    }
+#endif
+
+  /* OR in settings for the selected number of bits */
+
+  if (priv->bits == 5)
+    {
+                                       /* 0=5 bits */
+    }
+  else if (priv->bits == 6)
+    {
+      conf0 |= (1 << UART_BIT_NUM_S);  /* 1=6 bits */
+    }
+  else if (priv->bits == 7)
+    {
+      conf0 |= (2 << UART_BIT_NUM_S);  /* 2=7 bits */
+    }
+  else /* if (priv->bits == 8) */
+    {
+      conf0 |= (3 << UART_BIT_NUM_S);  /* 3=8 bits */
+    }
+
+  /* OR in settings for the selected parity */
+
+  if (priv->parity == 1)
+    {
+      conf0 |= UART_PARITY_EN;
+    }
+  else if (priv->parity == 2)
+    {
+      conf0 |= UART_PARITY_EN | UART_PARITY;
+    }
+
+  /* OR in settings for the number of stop bits */
+
+  if (priv->stopbits2)
+    {
+      conf0 |= 3 << UART_STOP_BIT_NUM_S;
+    }
+  else
+    {
+      conf0 |= 1 << UART_STOP_BIT_NUM_S;
+    }
+
+  /* Configure the UART BAUD */
+
+  clkdiv  = (UART_CLK_FREQ << 4) / priv->baud;
+
+  regval  = (clkdiv >> 4) << UART_CLKDIV_S;
+  regval |= (clkdiv & 15) << UART_CLKDIV_FRAG_S;
+  esp32_serialout(priv, UART_CLKDIV_OFFSET, regval);
+
+  /* Configure UART pins
+   *
+   * Internal signals can be output to multiple GPIO pads.
+   * But only one GPIO pad can connect with input signal
+   */
+
+  esp32_configgpio(priv->config->txpin, OUTPUT_FUNCTION_2);
+  gpio_matrix_out(priv->config->txpin, priv->config->txsig, 0, 0);
+
+  esp32_configgpio(priv->config->rxpin, INPUT_FUNCTION_2);
+  gpio_matrix_in(priv->config->rxpin, priv->config->rxsig, 0);
+
+#if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL)
+  esp32_configgpio(priv->config->rtspin, OUTPUT_FUNCTION_2);
+  gpio_matrix_out(priv->config->rtspin, priv->config->rtssig, 0, 0);
+
+  esp32_configgpio(priv->config->ctspin, INPUT_FUNCTION_2);
+  gpio_matrix_in(priv->config->ctspin, priv->config->ctssig, 0);
+#endif
+
+  /* Enable RX and error interrupts.  Clear and pending interrtupt */
+
+  regval = UART_RXFIFO_FULL_INT_ENA | UART_FRM_ERR_INT_ENA |
+           UART_RXFIFO_TOUT_INT_ENA;
+  esp32_serialout(priv, UART_INT_ENA_OFFSET, regval);
+
+  esp32_serialout(priv, UART_INT_CLR_OFFSET, 0xffffffff);
+
+  /* Configure and enable the UART */
+
+  esp32_serialout(priv, UART_CONF0_OFFSET, conf0);
+  regval = (112 << UART_RXFIFO_FULL_THRHD_S) |
+           (0x02 << UART_RX_TOUT_THRHD_S) |
+            UART_RX_TOUT_EN;
+  esp32_serialout(priv, UART_CONF1_OFFSET, regval);
+#endif
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: esp32_shutdown
+ *
+ * Description:
+ *   Disable the UART.  This method is called when the serial port is
+ *   closed.  It is assumed that esp32_detach was called earlier in the
+ *   shutdown sequence.
+ *
+ ****************************************************************************/
+
+static void esp32_shutdown(struct uart_dev_s *dev)
+{
+  struct esp32_dev_s *priv = (struct esp32_dev_s *)dev->priv;
+  uint32_t status;
+
+  /* Wait for outgoing FIFO to clear.   The ROM bootloader does not flush
+   * the FIFO before handing over to user code, so some of this output is
+   * not currently seen when the UART is reconfigured in early stages of
+   * startup.
+   */
+
+  do
+    {
+      status = esp32_serialin(priv, UART_STATUS_OFFSET);
+    }
+  while ((status & UART_TXFIFO_CNT_M) != 0);
+
+  /* Disable all UART interrupts */
+
+  esp32_disableallints(priv, NULL);
+
+  /* Revert pins to inputs and detach UART signals */
+
+  esp32_configgpio(priv->config->txpin, INPUT);
+  gpio_matrix_out(MATRIX_DETACH_OUT_SIG, priv->config->txsig, true, false);
+
+  esp32_configgpio(priv->config->rxpin, INPUT);
+  gpio_matrix_in(MATRIX_DETACH_IN_LOW_PIN, priv->config->rxsig, false);
+
+#if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL)
+  esp32_configgpio(priv->config->rtspin, INPUT);
+  gpio_matrix_out(MATRIX_DETACH_OUT_SIG, priv->config->rtssig, true, false);
+
+  esp32_configgpio(priv->config->ctspin, INPUT);
+  gpio_matrix_in(MATRIX_DETACH_IN_LOW_PIN, priv->config->ctssig, false);
+#endif
+
+  /* Unconfigure and disable the UART */
+
+  esp32_serialout(priv, UART_CONF0_OFFSET, 0);
+  esp32_serialout(priv, UART_CONF1_OFFSET, 0);
+
+  esp32_serialout(priv, UART_INT_ENA_OFFSET, 0);
+  esp32_serialout(priv, UART_INT_CLR_OFFSET, 0xffffffff);
+}
+
+/****************************************************************************
+ * Name: esp32_attach
+ *
+ * Description:
+ *   Configure the UART to operation in interrupt driven mode.  This method is
+ *   called when the serial port is opened.  Normally, this is just after the
+ *   the setup() method is called, however, the serial console may operate in
+ *   a non-interrupt driven mode during the boot phase.
+ *
+ *   RX and TX interrupts are not enabled when by the attach method (unless the
+ *   hardware supports multiple levels of interrupt enabling).  The RX and TX
+ *   interrupts are not enabled until the txint() and rxint() methods are called.
+ *
+ ****************************************************************************/
+
+static int esp32_attach(struct uart_dev_s *dev)
+{
+  struct esp32_dev_s *priv = (struct esp32_dev_s *)dev->priv;
+  int cpu;
+  int ret = OK;
+
+  /* Allocate a level-sensitive, priority 1 CPU interrupt for the UART */
+
+  priv->cpuint = esp32_alloc_levelint(1);
+  if (priv->cpuint < 0)
+    {
+      /* Failed to allocate a CPU interrupt of this type */
+
+      return priv->cpuint;
+    }
+
+  /* Set up to receive peripheral interrupts on the current CPU */
+
+#ifdef CONFIG_SMP
+  cpu = up_cpu_index();
+#else
+  cpu = 0;
+#endif
+
+  /* Attach the GPIO peripheral to the allocated CPU interrupt */
+
+  up_disable_irq(priv->cpuint);
+  esp32_attach_peripheral(cpu, priv->config->periph, priv->cpuint);
+
+  /* Attach and enable the IRQ */
+
+  ret = irq_attach(priv->config->irq, esp32_interrupt, dev);
+  if (ret == OK)
+    {
+      /* Enable the CPU interrupt (RX and TX interrupts are still disabled
+       * in the UART
+       */
+
+      up_enable_irq(priv->cpuint);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: esp32_detach
+ *
+ * Description:
+ *   Detach UART interrupts.  This method is called when the serial port is
+ *   closed normally just before the shutdown method is called.  The exception
+ *   is the serial console which is never shutdown.
+ *
+ ****************************************************************************/
+
+static void esp32_detach(struct uart_dev_s *dev)
+{
+  struct esp32_dev_s *priv = (struct esp32_dev_s *)dev->priv;
+  int cpu;
+
+  /* Disable and detach the CPU interrupt */
+
+  up_disable_irq(priv->cpuint);
+  irq_detach(priv->config->irq);
+
+  /* Disassociate the peripheral interrupt from the CPU interrupt */
+
+#ifdef CONFIG_SMP
+  cpu = up_cpu_index();
+#else
+  cpu = 0;
+#endif
+
+  esp32_detach_peripheral(cpu, priv->config->periph, priv->cpuint);
+
+  /* And release the CPU interrupt */
+
+  esp32_free_cpuint(priv->cpuint);
+  priv->cpuint = 0xff;
+}
+
+/****************************************************************************
+ * Name: esp32_interrupt
+ *
+ * Description:
+ *   This is the common UART interrupt handler.  It will be invoked
+ *   when an interrupt received on the device.  It should call
+ *   uart_transmitchars or uart_receivechar to perform the appropriate data
+ *   transfers.
+ *
+ ****************************************************************************/
+
+static int esp32_interrupt(int cpuint, void *context, FAR void *arg)
+{
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
+  struct esp32_dev_s *priv;
+  uint32_t regval;
+  uint32_t status;
+  uint32_t enabled;
+  unsigned int nfifo;
+  int passes;
+  bool handled;
+
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
+  priv = (struct esp32_dev_s *)dev->priv;
+
+  /* Loop until there are no characters to be transferred or, until we have
+   * been looping for a long time.
+   */
+
+  handled = true;
+  for (passes = 0; passes < 256 && handled; passes++)
+    {
+      handled      = false;
+      priv->status = esp32_serialin(priv, UART_INT_RAW_OFFSET);
+      status       = esp32_serialin(priv, UART_STATUS_OFFSET);
+      enabled      = esp32_serialin(priv, UART_INT_ENA_OFFSET);
+
+      /* Clear pending interrupts */
+
+      regval = (UART_RXFIFO_FULL_INT_CLR | UART_FRM_ERR_INT_CLR |
+                UART_RXFIFO_TOUT_INT_CLR | UART_TX_DONE_INT_CLR |
+                UART_TXFIFO_EMPTY_INT_CLR);
+      esp32_serialout(priv, UART_INT_CLR_OFFSET, regval);
+
+      /* Are Rx interrupts enabled?  The upper layer may hold off Rx input
+       * by disabling the Rx interrupts if there is no place to saved the
+       * data, possibly resulting in an overrun error.
+       */
+
+     if ((enabled & (UART_RXFIFO_FULL_INT_ENA | UART_RXFIFO_TOUT_INT_ENA)) != 0)
+       {
+         /* Is there any data waiting in the Rx FIFO? */
+
+         nfifo = (status & UART_RXFIFO_CNT_M) >> UART_RXFIFO_CNT_S;
+         if (nfifo > 0)
+            {
+              /* Received data in the RXFIFO! ... Process incoming bytes */
+
+              uart_recvchars(dev);
+              handled = true;
+            }
+       }
+
+      /* Are Tx interrupts enabled?  The upper layer will disable Tx interrupts
+       * when it has nothing to send.
+       */
+
+      if ((enabled & (UART_TX_DONE_INT_ENA | UART_TXFIFO_EMPTY_INT_ENA)) != 0)
+        {
+          nfifo = (status & UART_TXFIFO_CNT_M) >> UART_TXFIFO_CNT_S;
+          if (nfifo < 0x7f)
+            {
+              /* The TXFIFO is not full ... process outgoing bytes */
+
+              uart_xmitchars(dev);
+              handled = true;
+            }
+        }
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: esp32_ioctl
+ *
+ * Description:
+ *   All ioctl calls will be routed through this method
+ *
+ ****************************************************************************/
+
+static int esp32_ioctl(struct file *filep, int cmd, unsigned long arg)
+{
+#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_SERIAL_TIOCSERGSTRUCT)
+  struct inode      *inode = filep->f_inode;
+  struct uart_dev_s *dev   = inode->i_private;
+#endif
+  int                ret    = OK;
+
+  switch (cmd)
+    {
+#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
+    case TIOCSERGSTRUCT:
+      {
+         struct esp32_dev_s *user = (struct esp32_dev_s *)arg;
+         if (!user)
+           {
+             ret = -EINVAL;
+           }
+         else
+           {
+             memcpy(user, dev, sizeof(struct esp32_dev_s));
+           }
+       }
+       break;
+#endif
+
+#ifdef CONFIG_SERIAL_TERMIOS
+    case TCGETS:
+      {
+        struct termios  *termiosp = (struct termios *)arg;
+        struct esp32_dev_s *priv    = (struct esp32_dev_s *)dev->priv;
+
+        if (!termiosp)
+          {
+            ret = -EINVAL;
+            break;
+          }
+
+        /* Return baud */
+
+        cfsetispeed(termiosp, priv->baud);
+
+        /* Return parity */
+
+        termiosp->c_cflag = ((priv->parity != 0) ? PARENB : 0) |
+                            ((priv->parity == 1) ? PARODD : 0);
+
+        /* Return stop bits */
+
+        termiosp->c_cflag |= (priv->stopbits2) ? CSTOPB : 0;
+
+        /* Return flow control */
+
+#if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL)
+        termiosp->c_cflag |= (priv->flowc) ? (CCTS_OFLOW | CRTS_IFLOW): 0;
+#endif
+        /* Return number of bits */
+
+        switch (priv->bits)
+          {
+          case 5:
+            termiosp->c_cflag |= CS5;
+            break;
+
+          case 6:
+            termiosp->c_cflag |= CS6;
+            break;
+
+          case 7:
+            termiosp->c_cflag |= CS7;
+            break;
+
+          default:
+          case 8:
+            termiosp->c_cflag |= CS8;
+            break;
+
+          case 9:
+            termiosp->c_cflag |= CS8 /* CS9 */;
+            break;
+          }
+      }
+      break;
+
+    case TCSETS:
+      {
+        struct termios  *termiosp = (struct termios *)arg;
+        struct esp32_dev_s *priv    = (struct esp32_dev_s *)dev->priv;
+        uint32_t baud;
+        uint32_t intena;
+        uint8_t parity;
+        uint8_t nbits;
+        bool stop2;
+#if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL)
+        bool flowc;
+#endif
+
+        if (!termiosp)
+          {
+            ret = -EINVAL;
+            break;
+          }
+
+        /* Decode baud. */
+
+        ret = OK;
+        baud = cfgetispeed(termiosp);
+
+        /* Decode number of bits */
+
+        switch (termiosp->c_cflag & CSIZE)
+          {
+          case CS5:
+            nbits = 5;
+            break;
+
+          case CS6:
+            nbits = 6;
+            break;
+
+          case CS7:
+            nbits = 7;
+            break;
+
+          case CS8:
+            nbits = 8;
+            break;
+#if 0
+          case CS9:
+            nbits = 9;
+            break;
+#endif
+          default:
+            ret = -EINVAL;
+            break;
+          }
+
+        /* Decode parity */
+
+        if ((termiosp->c_cflag & PARENB) != 0)
+          {
+            parity = (termiosp->c_cflag & PARODD) ? 1 : 2;
+          }
+        else
+          {
+            parity = 0;
+          }
+
+        /* Decode stop bits */
+
+        stop2 = (termiosp->c_cflag & CSTOPB) != 0;
+
+        /* Decode flow control */
+
+#if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL)
+        flowc = (termiosp->c_cflag & (CCTS_OFLOW | CRTS_IFLOW)) != 0;
+#endif
+        /* Verify that all settings are valid before committing */
+
+        if (ret == OK)
+          {
+            /* Commit */
+
+            priv->baud      = baud;
+            priv->parity    = parity;
+            priv->bits      = nbits;
+            priv->stopbits2 = stop2;
+#if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL)
+            priv->flowc     = flowc;
+#endif
+            /* effect the changes immediately - note that we do not
+             * implement TCSADRAIN / TCSAFLUSH
+             */
+
+            esp32_disableallints(priv, &intena);
+            ret = esp32_setup(dev);
+
+            /* Restore the interrupt state */
+
+            esp32_restoreuartint(priv, intena);
+          }
+      }
+      break;
+#endif /* CONFIG_SERIAL_TERMIOS */
+
+    default:
+      ret = -ENOTTY;
+      break;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: esp32_receive
+ *
+ * Description:
+ *   Called (usually) from the interrupt level to receive one
+ *   character from the UART.  Error bits associated with the
+ *   receipt are provided in the return 'status'.
+ *
+ ****************************************************************************/
+
+static int  esp32_receive(struct uart_dev_s *dev, unsigned int *status)
+{
+  struct esp32_dev_s *priv = (struct esp32_dev_s *)dev->priv;
+
+  /* Return the error information in the saved status */
+
+  *status      = (unsigned int)priv->status;
+  priv->status = 0;
+
+  /* Then return the actual received byte */
+
+  return (int)(esp32_serialin(priv, UART_FIFO_OFFSET) & UART_RXFIFO_RD_BYTE_M);
+}
+
+/****************************************************************************
+ * Name: esp32_rxint
+ *
+ * Description:
+ *   Call to enable or disable RXRDY interrupts
+ *
+ ****************************************************************************/
+
+static void esp32_rxint(struct uart_dev_s *dev, bool enable)
+{
+  struct esp32_dev_s *priv = (struct esp32_dev_s *)dev->priv;
+  irqstate_t flags;
+  int regval;
+
+  flags = enter_critical_section();
+
+  if (enable)
+    {
+      /* Receive an interrupt when their is anything in the Rx data register (or an Rx
+       * timeout occurs).
+       */
+
+#ifndef CONFIG_SUPPRESS_SERIAL_INTS
+      regval  = esp32_serialin(priv, UART_INT_ENA_OFFSET);
+      regval |= (UART_RXFIFO_FULL_INT_ENA | UART_FRM_ERR_INT_ENA |
+                 UART_RXFIFO_TOUT_INT_ENA);
+      esp32_serialout(priv, UART_INT_ENA_OFFSET, regval);
+#endif
+    }
+  else
+    {
+      /* Disable the RX interrupts */
+
+      regval  = esp32_serialin(priv, UART_INT_ENA_OFFSET);
+      regval &= ~(UART_RXFIFO_FULL_INT_ENA | UART_FRM_ERR_INT_ENA |
+                  UART_RXFIFO_TOUT_INT_ENA);
+      esp32_serialout(priv, UART_INT_ENA_OFFSET, regval);
+    }
+
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: esp32_rxavailable
+ *
+ * Description:
+ *   Return true if the receive holding register is not empty
+ *
+ ****************************************************************************/
+
+static bool esp32_rxavailable(struct uart_dev_s *dev)
+{
+  struct esp32_dev_s *priv = (struct esp32_dev_s *)dev->priv;
+
+  return ((esp32_serialin(priv, UART_STATUS_OFFSET) & UART_RXFIFO_CNT_M) > 0);
+}
+
+/****************************************************************************
+ * Name: esp32_send
+ *
+ * Description:
+ *   This method will send one byte on the UART.
+ *
+ ****************************************************************************/
+
+static void esp32_send(struct uart_dev_s *dev, int ch)
+{
+  struct esp32_dev_s *priv = (struct esp32_dev_s *)dev->priv;
+
+  esp32_serialout(priv, UART_FIFO_OFFSET, (uint32_t)ch);
+}
+
+/****************************************************************************
+ * Name: esp32_txint
+ *
+ * Description:
+ *   Call to enable or disable TX interrupts
+ *
+ ****************************************************************************/
+
+static void esp32_txint(struct uart_dev_s *dev, bool enable)
+{
+  struct esp32_dev_s *priv = (struct esp32_dev_s *)dev->priv;
+  irqstate_t flags;
+  int regval;
+
+  flags = enter_critical_section();
+
+  if (enable)
+    {
+      /* Set to receive an interrupt when the TX holding register register
+       * is empty
+       */
+
+#ifndef CONFIG_SUPPRESS_SERIAL_INTS
+      regval  = esp32_serialin(priv, UART_INT_ENA_OFFSET);
+      regval |= (UART_TX_DONE_INT_ENA | UART_TXFIFO_EMPTY_INT_ENA);
+      esp32_serialout(priv, UART_INT_ENA_OFFSET, regval);
+
+      /* Fake a TX interrupt here by just calling uart_xmitchars() with
+       * interrupts disabled (note this may recurse).
+       */
+
+      uart_xmitchars(dev);
+#endif
+    }
+  else
+    {
+      /* Disable the TX interrupt */
+
+      regval  = esp32_serialin(priv, UART_INT_ENA_OFFSET);
+      regval &= ~(UART_TX_DONE_INT_ENA | UART_TXFIFO_EMPTY_INT_ENA);
+      esp32_serialout(priv, UART_INT_ENA_OFFSET, regval);
+    }
+
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: esp32_txready
+ *
+ * Description:
+ *   Return true if the transmit holding register is empty (TXRDY)
+ *
+ ****************************************************************************/
+
+static bool esp32_txready(struct uart_dev_s *dev)
+{
+  struct esp32_dev_s *priv = (struct esp32_dev_s *)dev->priv;
+
+  return ((esp32_serialin(priv, UART_STATUS_OFFSET) & UART_TXFIFO_CNT_M) < 0x7f);
+}
+
+/****************************************************************************
+ * Name: esp32_txempty
+ *
+ * Description:
+ *   Return true if the transmit holding and shift registers are empty
+ *
+ ****************************************************************************/
+
+static bool esp32_txempty(struct uart_dev_s *dev)
+{
+  struct esp32_dev_s *priv = (struct esp32_dev_s *)dev->priv;
+
+  return ((esp32_serialin(priv, UART_STATUS_OFFSET) & UART_TXFIFO_CNT_M) > 0);
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: xtensa_early_serial_initialize
+ *
+ * Description:
+ *   Performs the low level UART initialization early in debug so that the
+ *   serial console will be available during bootup.  This must be called
+ *   before up_serialinit.
+ *
+ ****************************************************************************/
+
+#ifdef USE_EARLYSERIALINIT
+void xtensa_early_serial_initialize(void)
+{
+  /* NOTE:  All GPIO configuration for the UARTs was performed in
+   * esp32_lowsetup
+   */
+
+  /* Disable all UARTS */
+
+  esp32_disableallints(TTYS0_DEV.priv, NULL);
+#ifdef TTYS1_DEV
+  esp32_disableallints(TTYS1_DEV.priv, NULL);
+#endif
+#ifdef TTYS2_DEV
+  esp32_disableallints(TTYS2_DEV.priv, NULL);
+#endif
+
+  /* Configuration whichever one is the console */
+
+#ifdef HAVE_SERIAL_CONSOLE
+  CONSOLE_DEV.isconsole = true;
+  esp32_setup(&CONSOLE_DEV);
+#endif
+}
+#endif
+
+/****************************************************************************
+ * Name: xtensa_serial_initialize
+ *
+ * Description:
+ *   Register serial console and serial ports.  This assumes
+ *   that up_earlyserialinit was called previously.
+ *
+ ****************************************************************************/
+
+void xtensa_serial_initialize(void)
+{
+  /* Register the console */
+
+#ifdef HAVE_SERIAL_CONSOLE
+  (void)uart_register("/dev/console", &CONSOLE_DEV);
+#endif
+
+  /* Register all UARTs */
+
+  (void)uart_register("/dev/ttyS0", &TTYS0_DEV);
+#ifdef TTYS1_DEV
+  (void)uart_register("/dev/ttyS1", &TTYS1_DEV);
+#endif
+#ifdef TTYS2_DEV
+  (void)uart_register("/dev/ttyS2", &TTYS2_DEV);
+#endif
+}
+
+/****************************************************************************
+ * Name: up_putc
+ *
+ * Description:
+ *   Provide priority, low-level access to support OS debug writes
+ *
+ ****************************************************************************/
+
+int up_putc(int ch)
+{
+#ifdef HAVE_SERIAL_CONSOLE
+  uint32_t intena;
+
+  esp32_disableallints(CONSOLE_DEV.priv, &intena);
+
+  /* Check for LF */
+
+  if (ch == '\n')
+    {
+      /* Add CR */
+
+      while(!esp32_txready(&CONSOLE_DEV));
+      esp32_send(&CONSOLE_DEV, '\r');
+    }
+
+  while(!esp32_txready(&CONSOLE_DEV));
+  esp32_send(&CONSOLE_DEV, ch);
+
+  esp32_restoreuartint(CONSOLE_DEV.priv, intena);
+#endif
+
+  return ch;
+}
+#endif /* USE_SERIALDRIVER */
diff --git a/arch/xtensa/src/esp32/esp32_smp.h b/arch/xtensa/src/esp32/esp32_smp.h
new file mode 100644
index 0000000000000000000000000000000000000000..14da3164ac95906c9d2181a3f328aaaa7948796c
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_smp.h
@@ -0,0 +1,86 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_smp.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt >
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_ESP32_ESP32_SMP_H
+#define __ARCH_XTENSA_SRC_ESP32_ESP32_SMP_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#ifdef CONFIG_SMP
+
+/****************************************************************************
+ * Pre-procesor Definitions
+ ****************************************************************************/
+
+/* An IDLE thread stack size for CPU0 must be defined */
+
+#if !defined(CONFIG_SMP_IDLETHREAD_STACKSIZE)
+#  error CONFIG_SMP_IDLETHREAD_STACKSIZE is not defined
+#elif CONFIG_SMP_IDLETHREAD_STACKSIZE < 16
+#  error CONFIG_SMP_IDLETHREAD_STACKSIZE is to small
+#endif
+
+#define CPU1_IDLETHREAD_STACKSIZE ((CONFIG_SMP_IDLETHREAD_STACKSIZE + 15) & ~15)
+#define CPU1_IDLETHREAD_STACKWORDS (CPU1_IDLETHREAD_STACKSIZE >> 2)
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* This is the CPU1 IDLE stack */
+
+extern uint32_t g_cpu1_idlestack[CPU1_IDLETHREAD_STACKWORDS];
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32_fromcpu[0,1]_interrupt
+ *
+ * Description:
+ *   Called to handle the from CPU0/1 interrupts.
+ *
+ ****************************************************************************/
+
+int esp32_fromcpu0_interrupt(int irq, FAR void *context, FAR void *arg);
+int esp32_fromcpu1_interrupt(int irq, FAR void *context, FAR void *arg);
+
+#endif /* CONFIG_SMP */
+#endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_SMP_H */
diff --git a/arch/xtensa/src/esp32/esp32_start.c b/arch/xtensa/src/esp32/esp32_start.c
new file mode 100644
index 0000000000000000000000000000000000000000..b0d9a5844394f4a40e8f895f5c3ff432aa4b1d33
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_start.c
@@ -0,0 +1,157 @@
+/****************************************************************************
+ * arch/xtensa/src/common/esp32_start.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Basic initialize sequence derives from logic originally provided by
+ * Espressif Systems:
+ *
+ *   Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "xtensa.h"
+#include "xtensa_attr.h"
+
+#include "chip/esp32_dport.h"
+#include "chip/esp32_rtccntl.h"
+#include "esp32_clockconfig.h"
+#include "esp32_region.h"
+#include "esp32_start.h"
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* Address of the CPU0 IDLE thread */
+
+uint32_t g_idlestack[IDLETHREAD_STACKWORDS]
+  __attribute__((aligned(16) section(".noinit")));
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: __start
+ *
+ * Description:
+ *   We arrive here after the bootloader finished loading the program from
+ *   flash. The hardware is mostly uninitialized, and the app CPU is in
+ *   reset. We do have a stack, so we can do the initialization in C.
+ *
+ *   The app CPU will remain in reset unless CONFIG_SMP is selected and
+ *   up_cpu_start() is called later in the bring-up sequeuence.
+ *
+ ****************************************************************************/
+
+void IRAM_ATTR __start(void)
+{
+  uint32_t regval;
+  uint32_t sp;
+
+  /* Kill the watchdog timer */
+
+  regval  = getreg32(RTC_CNTL_WDTCONFIG0_REG);
+  regval &= ~RTC_CNTL_WDT_FLASHBOOT_MOD_EN;
+  putreg32(regval, RTC_CNTL_WDTCONFIG0_REG);
+
+  regval  = getreg32(0x6001f048); /* DR_REG_BB_BASE+48 */
+  regval &= ~(1 << 14);
+  putreg32(regval, 0x6001f048);
+
+  /* Make sure that normal interrupts are disabled.  This is really only an
+   * issue when we are started in un-usual ways (such as from IRAM).  In this
+   * case, we can at least defer some unexpected interrupts left over from the
+   * last program execution.
+   */
+
+  up_irq_disable();
+
+#ifdef CONFIG_STACK_COLORATION
+  {
+    register uint32_t *ptr;
+    register int i;
+
+      /* If stack debug is enabled, then fill the stack with a recognizable value
+       * that we can use later to test for high water marks.
+       */
+
+      for (i = 0, ptr = g_idlestack;  i < IDLETHREAD_STACKWORDS; i++)
+        {
+          *ptr++ = STACK_COLOR;
+        }
+  }
+#endif
+
+  /* Move the stack to a known location.  Although we were give a stack
+   * pointer at start-up, we don't know where that stack pointer is positioned
+   * respect to our memory map.  The only safe option is to switch to a well-
+   * known IDLE thread stack.
+   */
+
+  sp = (uint32_t)g_idlestack + IDLETHREAD_STACKSIZE;
+  __asm__ __volatile__("mov sp, %0\n" : : "r"(sp));
+
+  /* Make page 0 access raise an exception */
+
+  esp32_region_protection();
+
+  /* Move CPU0 exception vectors to IRAM */
+
+  asm volatile ("wsr %0, vecbase\n"::"r" (&_init_start));
+
+  /* Set .bss to zero */
+
+  memset(&_sbss, 0, (&_ebss - &_sbss) * sizeof(_sbss));
+
+  /* Make sure that the APP_CPU is disabled for now */
+
+  regval  = getreg32(DPORT_APPCPU_CTRL_B_REG);
+  regval &= ~DPORT_APPCPU_CLKGATE_EN;
+  putreg32(regval, DPORT_APPCPU_CTRL_B_REG);
+
+  /* Set CPU frequency configured in board.h */
+
+  esp32_clockconfig();
+
+#ifdef USE_EARLYSERIALINIT
+ /* Perform early serial initialization */
+
+  xtensa_early_serial_initialize();
+#endif
+
+  /* Initialize onboard resources */
+
+  esp32_board_initialize();
+
+  /* Bring up NuttX */
+
+  os_start();
+  for(; ; ); /* Should not return */
+}
diff --git a/arch/xtensa/src/esp32/esp32_start.h b/arch/xtensa/src/esp32/esp32_start.h
new file mode 100644
index 0000000000000000000000000000000000000000..d836f40147f136c0ec32d65dfca9d638f2c250a7
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_start.h
@@ -0,0 +1,69 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_start.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt >
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_ESP32_ESP32_START_H
+#define __ARCH_XTENSA_SRC_ESP32_ESP32_START_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32_board_initialize
+ *
+ * Description:
+ *   All ESP32 architectures must provide the following entry point.  This
+ *   entry point is called early in the initialization -- after all memory
+ *   has been configured but before any devices have been initialized.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void esp32_board_initialize(void);
+
+#endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_START_H */
diff --git a/arch/xtensa/src/esp32/esp32_timerisr.c b/arch/xtensa/src/esp32/esp32_timerisr.c
new file mode 100644
index 0000000000000000000000000000000000000000..777d037732311e33dcdee8ef03b2636e5b95267f
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_timerisr.c
@@ -0,0 +1,200 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_timerisr.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "clock/clock.h"
+#include "xtensa_timer.h"
+#include "xtensa.h"
+
+/****************************************************************************
+ * Private data
+ ****************************************************************************/
+
+static uint32_t g_tick_divisor;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  xtensa_getcount, xtensa_getcompare, and xtensa_setcompare
+ *
+ * Description:
+ *   Lower level operations on Xtensa special registers.
+ *
+ ****************************************************************************/
+
+/* Return the current value of the cyle count register */
+
+static inline uint32_t xtensa_getcount(void)
+{
+  uint32_t count;
+
+  __asm__ __volatile__
+  (
+    "rsr %0, CCOUNT"  : "=r"(count)
+  );
+
+  return count;
+}
+
+/* Return the old value of the compare register */
+
+static inline uint32_t xtensa_getcompare(void)
+{
+  uint32_t compare;
+
+  __asm__ __volatile__
+  (
+    "rsr %0, %1"  : "=r"(compare) : "I"(XT_CCOMPARE)
+  );
+
+  return compare;
+}
+
+/* Set the value of the compare register */
+
+static inline void xtensa_setcompare(uint32_t compare)
+{
+  __asm__ __volatile__
+  (
+    "wsr %0, %1" : : "r"(compare), "I"(XT_CCOMPARE)
+  );
+}
+
+/****************************************************************************
+ * Function:  esp32_timerisr
+ *
+ * Description:
+ *   The timer ISR will perform a variety of services for various portions
+ *   of the systems.
+ *
+ *   Xtensa timers work by comparing a cycle counter with a preset value.
+ *   Once the match occurs an interrupt is generated, and the handler has to
+ *   set a new cycle count into the comparator.  To avoid clock drift due to
+ *   interrupt latency, the new cycle count is computed from the old, not the
+ *   time the interrupt was serviced. However if a timer interrupt is ever
+ *   serviced more than one tick late, it is necessary to process multiple
+ *   ticks until the new cycle count is in the future, otherwise the next
+ *   timer interrupt would not occur until after the cycle counter had
+ *   wrapped (2^32 cycles later).
+ *
+ ****************************************************************************/
+
+static int esp32_timerisr(int irq, uint32_t *regs, FAR void *arg)
+{
+  uint32_t divisor;
+  uint32_t compare;
+  uint32_t diff;
+
+  divisor = g_tick_divisor;
+  do
+    {
+      /* Increment the compare register for the next tick */
+
+      compare = xtensa_getcompare();
+      xtensa_setcompare(compare + divisor);
+
+      /* Process one timer tick */
+
+      sched_process_timer();
+
+      /* Check if we are falling behind and need to process multiple timer
+       * interrupts.
+       */
+
+      diff = xtensa_getcount() - compare;
+    }
+  while (diff < divisor);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  xtensa_timer_initialize
+ *
+ * Description:
+ *   This function is called during start-up to initialize
+ *   the timer interrupt.
+ *
+ ****************************************************************************/
+
+void xtensa_timer_initialize(void)
+{
+  uint32_t divisor;
+  uint32_t count;
+
+  /* Configured the timer0 as the system timer.
+   *
+   *   divisor = BOARD_CLOCK_FREQUENCY / ticks_per_sec
+   */
+
+  divisor = BOARD_CLOCK_FREQUENCY / CLOCKS_PER_SEC;
+  g_tick_divisor = divisor;
+
+  /* Set up periodic timer */
+
+  count = xtensa_getcount();
+  xtensa_setcompare(count + divisor);
+
+  /* NOTE: Timer 0 is an internal interrupt source so we do not need to
+   * attach any peripheral ID to the dedicated CPU interrupt.
+   */
+
+  /* Attach the timer interrupt */
+
+  (void)irq_attach(XTENSA_IRQ_TIMER0, (xcpt_t)esp32_timerisr, NULL);
+
+  /* Enable the timer 0 CPU interrupt. */
+
+  up_enable_irq(ESP32_CPUINT_TIMER0);
+}
diff --git a/arch/xtensa/src/esp32/rom/esp32_gpio.h b/arch/xtensa/src/esp32/rom/esp32_gpio.h
new file mode 100644
index 0000000000000000000000000000000000000000..00680ff995c8d9f7cb9b9ba3543b1c8e700a6a37
--- /dev/null
+++ b/arch/xtensa/src/esp32/rom/esp32_gpio.h
@@ -0,0 +1,432 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/rom/esp32_gpio.h
+ *
+ * Developed for NuttX by:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derivies from sample code provided by Expressif Systems:
+ *
+ * Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __XTENSA_SRC_ESP32_ROM_ESP32_GPIO_H
+#define __XTENSA_SRC_ESP32_ROM_ESP32_GPIO_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include "chip/esp32_gpio.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define MATRIX_DETACH_OUT_SIG     0x100  /* Detach an OUTPUT signal */
+#define MATRIX_DETACH_IN_LOW_PIN  0x30   /* Detach non-inverted INPUT signal */
+#define MATRIX_DETACH_IN_LOW_HIGH 0x38   /* Detach inverted INPUT signal */
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+enum gpio_inttype_e
+{
+  GPIO_PIN_INTR_DISABLE = 0,
+  GPIO_PIN_INTR_POSEDGE = 1,
+  GPIO_PIN_INTR_NEGEDGE = 2,
+  GPIO_PIN_INTR_ANYEGDE = 3,
+  GPIO_PIN_INTR_LOLEVEL = 4,
+  GPIO_PIN_INTR_HILEVEL = 5
+};
+
+typedef enum gpio_inttype_e GPIO_INT_TYPE;
+
+/* GPIO interrupt handler, registered through gpio_intr_handler_register */
+
+typedef void (*gpio_intr_handler_fn_t)(uint32_t intr_mask, bool high, void *arg);
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/****************************************************************************
+ * Name: gpio_init
+ *
+ * Description:
+ *   Initialize GPIO. This includes reading the GPIO Configuration DataSet
+ *   to initialize "output enables" and pin configurations for each gpio pin.
+ *   Please do not call this function in SDK.
+ *
+ * Input Parameters:
+ *    None
+ *
+ * Returned Value:
+ *  None
+ *
+ ****************************************************************************/
+
+void gpio_init(void);
+
+/****************************************************************************
+ * Name: gpio_output_set
+ *
+ * Description:
+ *   Change GPIO(0-31) pin output by setting, clearing, or disabling pins,
+ *   GPIO0<->BIT(0).  There is no particular ordering guaranteed; so if the
+ *   order of writes is significant, calling code should divide a single
+ *   call into multiple calls.
+ *
+ * Input Parameters:
+ *   set_mask     - the gpios that need high level.
+ *   clear_mask   - the gpios that need low level.
+ *   enable_mask  - the gpios that need be changed.
+ *   disable_mask - the gpios that need diable output.
+ *
+ * Returned Value:
+ *  None
+ *
+ ****************************************************************************/
+
+void gpio_output_set(uint32_t set_mask, uint32_t clear_mask,
+                     uint32_t enable_mask, uint32_t disable_mask);
+
+/****************************************************************************
+ * Name: gpio_output_set_high
+ *
+ * Description:
+ *   Change GPIO(32-39) pin output by setting, clearing, or disabling pins,
+ *   GPIO32<->BIT(0).  There is no particular ordering guaranteed; so if the
+ *   order of writes is significant, calling code should divide a single call
+ *   into multiple calls.
+ *
+ * Input Parameters:
+ *   set_mask     - the gpios that need high level.
+ *   clear_mask   - the gpios that need low level.
+ *   enable_mask  - the gpios that need be changed.
+ *   disable_mask - the gpios that need diable output.
+ *
+ * Returned Value:
+ *  None
+ *
+ ****************************************************************************/
+
+void gpio_output_set_high(uint32_t set_mask, uint32_t clear_mask,
+                          uint32_t enable_mask, uint32_t disable_mask);
+
+/****************************************************************************
+ * Name: gpio_input_get
+ *
+ * Description:
+ *   Sample the value of GPIO input pins(0-31) and returns a bitmask.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Bitmask for GPIO input pins, BIT(0) for GPIO0.
+ *
+ ****************************************************************************/
+
+uint32_t gpio_input_get(void);
+
+/****************************************************************************
+ * Name: gpio_input_get_high
+ *
+ * Description:
+ *   Sample the value of GPIO input pins(32-39) and returns a bitmask.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Bitmask for GPIO input pins, BIT(0) for GPIO32.
+ *
+ ****************************************************************************/
+
+uint32_t gpio_input_get_high(void);
+
+/****************************************************************************
+ * Name: gpio_intr_handler_register
+ *
+ * Description:
+ *   Register an application-specific interrupt handler for GPIO pin
+ *   interrupts.  Once the interrupt handler is called, it will not be
+ *   called again until after a call to gpio_intr_ack.
+ *
+ * Input Parameters:
+ *   fn  - gpio application-specific interrupt handler
+ *   arg - gpio application-specific interrupt handler argument.
+ *
+ * Returned Value:
+ *  None
+ *
+ ****************************************************************************/
+
+void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg);
+
+/****************************************************************************
+ * Name: gpio_intr_pending
+ *
+ * Description:
+ *   Get gpio interrupts which happens but not processed.
+ *
+ * Input Parameters:
+ *
+ * Returned Value:
+ *   Bitmask for GPIO pending interrupts, BIT(0) for GPIO0.
+ *
+ ****************************************************************************/
+
+uint32_t gpio_intr_pending(void);
+
+/****************************************************************************
+ * Name: gpio_intr_pending_high
+ *
+ * Description:
+ *   Get gpio interrupts which happens but not processed.
+ *
+ * Input Parameters:
+ *
+ * Returned Value:
+ *   Bitmask for GPIO pending interrupts, BIT(0) for GPIO32.
+ *
+ ****************************************************************************/
+
+uint32_t gpio_intr_pending_high(void);
+
+/****************************************************************************
+ * Name: gpio_intr_ack
+ *
+ * Description:
+ *   Ack gpio interrupts to process pending interrupts.
+ *
+ * Input Parameters:
+ *   ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO0.
+ *
+ * Returned Value:
+ *  None
+ *
+ ****************************************************************************/
+
+void gpio_intr_ack(uint32_t ack_mask);
+
+/****************************************************************************
+ * Name: gpio_intr_ack_high
+ *
+ * Description:
+ *   Ack gpio interrupts to process pending interrupts.
+ *
+ * Input Parameters:
+ *   ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO32.
+ *
+ * Returned Value:
+ *  None
+ *
+ ****************************************************************************/
+
+void gpio_intr_ack_high(uint32_t ack_mask);
+
+/****************************************************************************
+ * Name: gpio_pin_wakeup_enable
+ *
+ * Description:
+ *   Set GPIO to wakeup the ESP32.
+ *
+ * Input Parameters:
+ *   i          - gpio number.
+ *   intr_state - only GPIO_PIN_INTR_LOLEVEL\GPIO_PIN_INTR_HILEVEL can be used
+ *
+ * Returned Value:
+ *  None
+ *
+ ****************************************************************************/
+
+void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state);
+
+/****************************************************************************
+ * Name: gpio_pin_wakeup_disable
+ *
+ * Description:
+ *   disable GPIOs to wakeup the ESP32.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *  None
+ *
+ ****************************************************************************/
+
+void gpio_pin_wakeup_disable(void);
+
+/****************************************************************************
+ * Name: gpio_matrix_in
+ *
+ * Description:
+ *   Set gpio input to a signal, one gpio can input to several signals.
+ *
+ * Input Parameters:
+ *   gpio - gpio number, 0~0x27
+ *                        gpio == 0x30, input 0 to signal
+ *                        gpio == 0x34, ???
+ *                        gpio == 0x38, input 1 to signal
+ *
+ *   signal_idx - signal index.
+ *   inv - the signal is inv or not
+ *
+ * Returned Value:
+ *  None
+ *
+ ****************************************************************************/
+
+void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv);
+
+/****************************************************************************
+ * Name: gpio_matrix_out
+ *
+ * Description:
+ *   Set signal output to gpio, one signal can output to several gpios.
+ *
+ * Input Parameters:
+ *   gpio - gpio number, 0~0x27
+ *   signal_idx - signal index.
+ *                signal_idx == 0x100, cancel output put to the gpio
+ *   out_inv - the signal output is inv or not
+ *   oen_inv - the signal output enable is inv or not
+ *
+ * Returned Value:
+ *  None
+ *
+ ****************************************************************************/
+
+void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv,
+                     bool oen_inv);
+
+/****************************************************************************
+ * Name: 
+ *
+ * Description:
+ *   Select pad as a gpio function from IOMUX.
+ *
+ * Input Parameters:
+ *   gpio_num - gpio number, 0~0x27
+ *
+ * Returned Value:
+ *  None
+ *
+ ****************************************************************************/
+
+void gpio_pad_select_gpio(uint8_t gpio_num);
+
+/****************************************************************************
+ * Name: gpio_pad_set_drv
+ *
+ * Description:
+ *   Set pad driver capability.
+ *
+ * Input Parameters:
+ *   gpio_num - gpio number, 0~0x27
+ *   drv      - 0-3
+ *
+ * Returned Value:
+ *  None
+ *
+ ****************************************************************************/
+
+void gpio_pad_set_drv(uint8_t gpio_num, uint8_t drv);
+
+/****************************************************************************
+ * Name: gpio_pad_pullup
+ *
+ * Description:
+ *   Pull up the pad from gpio number.
+ *
+ * Input Parameters:
+ *   gpio_num - gpio number, 0~0x27
+ *
+ * Returned Value:
+ *  None
+ *
+ ****************************************************************************/
+
+void gpio_pad_pullup(uint8_t gpio_num);
+
+/****************************************************************************
+ * Name: gpio_pad_pulldown
+ *
+ * Description:
+ *   Pull down the pad from gpio number.
+ *
+ * Input Parameters:
+ *   gpio_num - gpio number, 0~0x27
+ *
+ * Returned Value:
+ *  None
+ *
+ ****************************************************************************/
+
+void gpio_pad_pulldown(uint8_t gpio_num);
+
+/****************************************************************************
+ * Name: gpio_pad_unhold
+ *
+ * Description:
+ *   Unhold the pad from gpio number.
+ *
+ * Input Parameters:
+ *   gpio_num - gpio number, 0~0x27
+ *
+ * Returned Value:
+ *  None
+ *
+ ****************************************************************************/
+
+void gpio_pad_unhold(uint8_t gpio_num);
+
+/****************************************************************************
+ * Name: gpio_pad_hold
+ *
+ * Description:
+ *   Hold the pad from gpio number.
+ *
+ * Input Parameters:
+ *   gpio_num - gpio number, 0~0x27
+ *
+ * Returned Value:
+ *  None
+ *
+ ****************************************************************************/
+
+void gpio_pad_hold(uint8_t gpio_num);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XTENSA_SRC_ESP32_ROM_ESP32_GPIO_H */
diff --git a/configs/rgmp/Kconfig b/arch/xtensa/src/lx6/Kconfig
similarity index 75%
rename from configs/rgmp/Kconfig
rename to arch/xtensa/src/lx6/Kconfig
index ba62632ecbe0b57dd6e60fcedcb6fba49fb3e38a..9edff0ce33e3ce836ef494a9e6aedec8a319d8e8 100644
--- a/configs/rgmp/Kconfig
+++ b/arch/xtensa/src/lx6/Kconfig
@@ -3,6 +3,6 @@
 # see the file kconfig-language.txt in the NuttX tools repository.
 #
 
-if ARCH_BOARD_RGMP
+if ARCH_CHIP_LX6
 
-endif # ARCH_BOARD_RGMP
+endif # ARCH_CHIP_LX6
diff --git a/arch/xtensa/src/lx6/Toolchain.defs b/arch/xtensa/src/lx6/Toolchain.defs
new file mode 100644
index 0000000000000000000000000000000000000000..7e810c54983fd4ea20d4b457e405f793e2fa458a
--- /dev/null
+++ b/arch/xtensa/src/lx6/Toolchain.defs
@@ -0,0 +1,58 @@
+############################################################################
+# arch/xtensa/src/lx6/Toolchain.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+
+# Supported toolchains
+#
+# Each toolchain definition should set:
+#
+#  CROSSDEV         The GNU toolchain triple (command prefix)
+#  ARCROSSDEV       If required, an alternative prefix used when
+#                   invoking ar and nm.
+#  ARCHCPUFLAGS     CPU-specific flags selecting the instruction set
+#                   FPU options, etc.
+#  MAXOPTIMIZATION  The maximum optimization level that results in
+#                   reliable code generation.
+#
+
+CROSSDEV = xtensa-esp32-elf-
+
+ARCHCPUFLAGS =
+
+ifeq ($(CONFIG_DEBUG_CUSTOMOPT),y)
+  MAXOPTIMIZATION := $(CONFIG_DEBUG_OPTLEVEL)
+else
+ MAXOPTIMIZATION := -Os
+endif
diff --git a/arch/z16/include/arch.h b/arch/z16/include/arch.h
index cb574663df12b708fb79f5f8ef185c5f3af93711..350a94b419637ae7943527438fb905b31fd5a730 100644
--- a/arch/z16/include/arch.h
+++ b/arch/z16/include/arch.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arch.h
+ * arch/z16/include/arch/arch.h
  *
  *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -37,8 +37,8 @@
  * only indirectly through nuttx/arch.h
  */
 
-#ifndef __ARCH_ARCH_H
-#define __ARCH_ARCH_H
+#ifndef __ARCH_Z16_INCLUDE_ARCH_H
+#define __ARCH_Z16_INCLUDE_ARCH_H
 
 /****************************************************************************
  * Included Files
@@ -77,5 +77,5 @@ extern "C"
 }
 #endif
 
-#endif /* __ARCH_ARCH_H */
+#endif /* __ARCH_Z16_INCLUDE_ARCH_H */
 
diff --git a/arch/z16/include/inttypes.h b/arch/z16/include/inttypes.h
new file mode 100644
index 0000000000000000000000000000000000000000..93664c594785c0a3be29f6b65e3d1825be70af45
--- /dev/null
+++ b/arch/z16/include/inttypes.h
@@ -0,0 +1,212 @@
+/****************************************************************************
+ * arch/z16/include/inttypes.h
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_Z16_INCLUDE_INTTYPES_H
+#define __ARCH_Z16_INCLUDE_INTTYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define PRId8       "d"
+#define PRId16      "d"
+#define PRId32      "d"
+
+#define PRIdLEAST8  "d"
+#define PRIdLEAST16 "d"
+#define PRIdLEAST32 "d"
+
+#define PRIdFAST8   "d"
+#define PRIdFAST16  "d"
+#define PRIdFAST32  "d"
+
+#define PRIdMAX     "d"
+#define PRIdPTR     "d"
+
+#define PRIi8       "i"
+#define PRIi16      "i"
+#define PRIi32      "i"
+
+#define PRIiLEAST8  "i"
+#define PRIiLEAST16 "i"
+#define PRIiLEAST32 "i"
+
+#define PRIiFAST8   "i"
+#define PRIiFAST16  "i"
+#define PRIiFAST32  "i"
+
+#define PRIiMAX     "i"
+#define PRIiPTR     "i"
+
+#define PRIo8       "o"
+#define PRIo16      "o"
+#define PRIo32      "o"
+
+#define PRIoLEAST8  "o"
+#define PRIoLEAST16 "o"
+#define PRIoLEAST32 "o"
+
+#define PRIoFAST8   "o"
+#define PRIoFAST16  "o"
+#define PRIoFAST32  "o"
+
+#define PRIoMAX     "o"
+#define PRIoPTR     "o"
+
+#define PRIu8       "u"
+#define PRIu16      "u"
+#define PRIu32      "u"
+
+#define PRIuLEAST8  "u"
+#define PRIuLEAST16 "u"
+#define PRIuLEAST32 "u"
+
+#define PRIuFAST8   "u"
+#define PRIuFAST16  "u"
+#define PRIuFAST32  "u"
+
+#define PRIuMAX     "u"
+#define PRIuPTR     "u"
+
+#define PRIx8       "x"
+#define PRIx16      "x"
+#define PRIx32      "x"
+
+#define PRIxLEAST8  "x"
+#define PRIxLEAST16 "x"
+#define PRIxLEAST32 "x"
+
+#define PRIxFAST8   "x"
+#define PRIxFAST16  "x"
+#define PRIxFAST32  "x"
+
+#define PRIxMAX     "x"
+#define PRIxPTR     "x"
+
+#define PRIX8       "X"
+#define PRIX16      "X"
+#define PRIX32      "X"
+
+#define PRIXLEAST8  "X"
+#define PRIXLEAST16 "X"
+#define PRIXLEAST32 "X"
+
+#define PRIXFAST8   "X"
+#define PRIXFAST16  "X"
+#define PRIXFAST32  "X"
+
+#define PRIXMAX     "X"
+#define PRIXPTR     "X"
+
+#define SCNd8       "hhd"
+#define SCNd16      "hd"
+#define SCNd32      "d"
+
+#define SCNdLEAST8  "hhd"
+#define SCNdLEAST16 "hd"
+#define SCNdLEAST32 "d"
+
+#define SCNdFAST8   "hhd"
+#define SCNdFAST16  "hd"
+#define SCNdFAST32  "d"
+
+#define SCNdMAX     "d"
+#define SCNdPTR     "d"
+
+#define SCNi8       "hhi"
+#define SCNi16      "hi"
+#define SCNi32      "i"
+
+#define SCNiLEAST8  "hhi"
+#define SCNiLEAST16 "hi"
+#define SCNiLEAST32 "i"
+
+#define SCNiFAST8   "hhi"
+#define SCNiFAST16  "hi"
+#define SCNiFAST32  "i"
+
+#define SCNiMAX     "i"
+#define SCNiPTR     "i"
+
+#define SCNo8       "hho"
+#define SCNo16      "ho"
+#define SCNo32      "o"
+
+#define SCNoLEAST8  "hho"
+#define SCNoLEAST16 "ho"
+#define SCNoLEAST32 "o"
+
+#define SCNoFAST8   "hho"
+#define SCNoFAST16  "ho"
+#define SCNoFAST32  "o"
+
+#define SCNoMAX     "o"
+#define SCNoPTR     "o"
+
+#define SCNu8       "hhu"
+#define SCNu16      "hu"
+#define SCNu32      "u"
+
+#define SCNuLEAST8  "hhu"
+#define SCNuLEAST16 "hu"
+#define SCNuLEAST32 "u"
+
+#define SCNuFAST8   "hhu"
+#define SCNuFAST16  "hu"
+#define SCNuFAST32  "u"
+
+#define SCNuMAX     "u"
+#define SCNuPTR     "u"
+
+#define SCNx8       "hhx"
+#define SCNx16      "hx"
+#define SCNx32      "x"
+
+#define SCNxLEAST8  "hhx"
+#define SCNxLEAST16 "hx"
+#define SCNxLEAST32 "x"
+
+#define SCNxFAST8   "hhx"
+#define SCNxFAST16  "hx"
+#define SCNxFAST32  "x"
+
+#define SCNxMAX     "x"
+#define SCNxPTR     "x"
+
+#endif /* __ARCH_Z16_INCLUDE_INTTYPES_H */
diff --git a/arch/z16/include/irq.h b/arch/z16/include/irq.h
index 9aab0cc1331ebd4ec8664fb8e5cfab39e01bd04c..5fcd165487ff9ed5a0c5da70340d247a4be4399f 100644
--- a/arch/z16/include/irq.h
+++ b/arch/z16/include/irq.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/irq.h
+ * arch/z16/include/irq.h
  *
  *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -37,8 +37,8 @@
  * only indirectly through nuttx/irq.h
  */
 
-#ifndef __ARCH_IRQ_H
-#define __ARCH_IRQ_H
+#ifndef __ARCH_Z16_INCLUDE_IRQ_H
+#define __ARCH_Z16_INCLUDE_IRQ_H
 
 /****************************************************************************
  * Included Files
@@ -78,5 +78,5 @@ extern "C"
 #endif
 #endif
 
-#endif /* __ARCH_IRQ_H */
+#endif /* __ARCH_Z16_INCLUDE_IRQ_H */
 
diff --git a/arch/z16/include/serial.h b/arch/z16/include/serial.h
index c1ce4aa1f18f4d534fde74c461bb798c07253970..ced8e9e596f313185742755f4d70bb5f556fcd94 100644
--- a/arch/z16/include/serial.h
+++ b/arch/z16/include/serial.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/serial.h
+ * arch/z16/include/serial.h
  *
  *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __ARCH_SERIAL_H
-#define __ARCH_SERIAL_H
+#ifndef __ARCH_Z16_INCLUDE_SERIAL_H
+#define __ARCH_Z16_INCLUDE_SERIAL_H
 
 /****************************************************************************
  * Included Files
@@ -52,4 +52,4 @@
  * Public Functions
  ****************************************************************************/
 
-#endif /* __ARCH_SERIAL_H */
+#endif /* __ARCH_Z16_INCLUDE_SERIAL_H */
diff --git a/arch/z16/src/common/up_allocateheap.c b/arch/z16/src/common/up_allocateheap.c
index f307a8a73e22461f435b9cc7d126227cbc33ec76..948f770210acb802238d7ca73253fa4f1ef0bb19 100644
--- a/arch/z16/src/common/up_allocateheap.c
+++ b/arch/z16/src/common/up_allocateheap.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_allocateheap.c
+ * arch/z16/src/common/up_allocateheap.c
  *
  *   Copyright (C) 2008, 2013, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/z16/src/common/up_arch.h b/arch/z16/src/common/up_arch.h
index be1f77d67de37176113c5105dee3ade5065944d4..1b98ccc2aea8a5ca6810972335f6a747b60da36f 100644
--- a/arch/z16/src/common/up_arch.h
+++ b/arch/z16/src/common/up_arch.h
@@ -1,5 +1,5 @@
 /************************************************************************************
- * common/up_arch.h
+ * arch/z16/src/common/up_arch.h
  *
  *   Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/z16/src/common/up_assert.c b/arch/z16/src/common/up_assert.c
index fbd73d2579cef3bf5eeeda8daa3ca1ceb214424d..5346e9d48c9b93b60aff2225770f3d581d088e14 100644
--- a/arch/z16/src/common/up_assert.c
+++ b/arch/z16/src/common/up_assert.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * common/up_assert.c
  *
- *   Copyright (C) 2008-2009, 2012-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2012-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 #include 
@@ -120,7 +109,7 @@ static int usbtrace_syslog(FAR const char *fmt, ...)
   /* Let vsyslog do the real work */
 
   va_start(ap, fmt);
-  ret = lowvsyslog(LOG_INFO, fmt, ap);
+  ret = vsyslog(LOG_EMERG, fmt, ap);
   va_end(ap);
   return ret;
 }
@@ -146,7 +135,7 @@ void up_assert(const uint8_t *filename, int lineno)
 void up_assert(void)
 #endif
 {
-#if CONFIG_TASK_NAME_SIZE > 0
+#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
   struct tcb_s *rtcb = this_task();
 #endif
 
@@ -154,17 +143,17 @@ void up_assert(void)
 
 #ifdef CONFIG_HAVE_FILENAME
 #if CONFIG_TASK_NAME_SIZE > 0
-  lldbg("Assertion failed at file:%s line: %d task: %s\n",
+  _alert("Assertion failed at file:%s line: %d task: %s\n",
         filename, lineno, rtcb->name);
 #else
-  lldbg("Assertion failed at file:%s line: %d\n",
+  _alert("Assertion failed at file:%s line: %d\n",
         filename, lineno);
 #endif
 #else
-#if CONFIG_TASK_NAME_SIZE > 0
-  lldbg("Assertion failed: task: %s\n", rtcb->name);
+#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
+  _alert("Assertion failed: task: %s\n", rtcb->name);
 #else
-  lldbg("Assertion failed\n");
+  _alert("Assertion failed\n");
 #endif
 #endif
 
diff --git a/arch/z16/src/common/up_blocktask.c b/arch/z16/src/common/up_blocktask.c
index e165e74a73097470c544b44ba8c65c4fca135f6a..8328086de622b75e53dbc2e6b9fde822e465520a 100644
--- a/arch/z16/src/common/up_blocktask.c
+++ b/arch/z16/src/common/up_blocktask.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_blocktask.c
+ * arch/z16/src/common/up_blocktask.c
  *
  *   Copyright (C) 2008-2009, 2013, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -83,7 +83,7 @@ void up_block_task(FAR struct tcb_s *tcb, tstate_t task_state)
   ASSERT((tcb->task_state >= FIRST_READY_TO_RUN_STATE) &&
          (tcb->task_state <= LAST_READY_TO_RUN_STATE));
 
-  /* dbg("Blocking TCB=%p\n", tcb); */
+  /* sinfo("Blocking TCB=%p\n", tcb); */
 
   /* Remove the tcb task from the ready-to-run list.  If we
    * are blocking the task at the head of the task list (the
diff --git a/arch/z16/src/common/up_copystate.c b/arch/z16/src/common/up_copystate.c
index f9240c7445082c0f72301bd89d5246b9af58c651..8ef14c7394719601b835361431986078ec6d1159 100644
--- a/arch/z16/src/common/up_copystate.c
+++ b/arch/z16/src/common/up_copystate.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_copystate.c
+ * arch/z16/src/common/up_copystate.c
  *
  *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -43,18 +43,6 @@
 
 #include "up_internal.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/arch/z16/src/common/up_createstack.c b/arch/z16/src/common/up_createstack.c
index c4d55370408db9a4e2a28eecc525e73f4a868949..2c35e68aef8e40c9bf28c181542b4a2874e44220 100644
--- a/arch/z16/src/common/up_createstack.c
+++ b/arch/z16/src/common/up_createstack.c
@@ -120,12 +120,12 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
 
       tcb->stack_alloc_ptr = (uint32_t *)kumm_malloc(stack_size);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       /* Was the allocation successful? */
 
       if (!tcb->stack_alloc_ptr)
         {
-          sdbg("ERROR: Failed to allocate stack, size %d\n", stack_size);
+          serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
         }
 #endif
     }
diff --git a/arch/z16/src/common/up_doirq.c b/arch/z16/src/common/up_doirq.c
index d401f580f6b573ae0cd8bb078c995fa97309b5e7..fb4954fc61839392e2d26fd8e992eb775ee08898 100644
--- a/arch/z16/src/common/up_doirq.c
+++ b/arch/z16/src/common/up_doirq.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_doirq.c
+ * arch/z16/src/common/up_doirq.c
  *
  *   Copyright (C) 2008-2009, 2011, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -49,22 +49,6 @@
 #include "chip/chip.h"
 #include "up_internal.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/arch/z16/src/common/up_exit.c b/arch/z16/src/common/up_exit.c
index 7c238b249971094274c686f1e5f60e1ea67bef42..58b2a5428695d2f4eee6ca8d7393875ad5935792 100644
--- a/arch/z16/src/common/up_exit.c
+++ b/arch/z16/src/common/up_exit.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * common/up_exit.c
+ * arch/z16/src/common/up_exit.c
  *
- *   Copyright (C) 2008-2009, 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -43,9 +43,9 @@
 #include 
 
 #include 
-
+#include 
 #ifdef CONFIG_DUMP_ON_EXIT
-#include 
+#  include 
 #endif
 
 #include "chip/chip.h"
@@ -53,6 +53,14 @@
 #include "sched/sched.h"
 #include "up_internal.h"
 
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef CONFIG_DEBUG_SCHED_INFO
+#  undef CONFIG_DUMP_ON_EXIT
+#endif
+
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -67,7 +75,7 @@
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_DUMP_ON_EXIT
 static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
 {
 #if CONFIG_NFILE_DESCRIPTORS > 0
@@ -78,8 +86,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
   int i;
 #endif
 
-  lldbg("  TCB=%p name=%s\n", tcb, tcb->argv[0]);
-  lldbg("    priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
+  sinfo("  TCB=%p name=%s\n", tcb, tcb->argv[0]);
+  sinfo("    priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
 
 #if CONFIG_NFILE_DESCRIPTORS > 0
   filelist = tcb->group->tg_filelist;
@@ -88,7 +96,7 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
       struct inode *inode = filelist->fl_files[i].f_inode;
       if (inode)
         {
-          lldbg("      fd=%d refcount=%d\n",
+          sinfo("      fd=%d refcount=%d\n",
                 i, inode->i_crefs);
         }
     }
@@ -101,13 +109,18 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
       struct file_struct *filep = &streamlist->sl_streams[i];
       if (filep->fs_fd >= 0)
         {
-#if CONFIG_STDIO_BUFFER_SIZE > 0
-          lldbg("      fd=%d nbytes=%d\n",
-                filep->fs_fd,
-                filep->fs_bufpos - filep->fs_bufstart);
-#else
-          lldbg("      fd=%d\n", filep->fs_fd);
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
+          if (filep->fs_bufstart != NULL)
+            {
+              sinfo("      fd=%d nbytes=%d\n",
+                    filep->fs_fd,
+                    filep->fs_bufpos - filep->fs_bufstart);
+            }
+          else
 #endif
+            {
+              sinfo("      fd=%d\n", filep->fs_fd);
+            }
         }
     }
 #endif
@@ -133,16 +146,16 @@ void _exit(int status)
 {
   FAR struct tcb_s* tcb;
 
-  /* Disable interrupts.  Interrupts will remain disabled until
-   * the new task is resumed below.
+  /* Make sure that we are in a critical section with local interrupts.
+   * The IRQ state will be restored when the next task is started.
    */
 
-  (void)up_irq_save();
+  (void)enter_critical_section();
 
-  slldbg("TCB=%p exiting\n", tcb);
+  sinfo("TCB=%p exiting\n", tcb);
 
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
-  lldbg("Other tasks:\n");
+#ifdef CONFIG_DUMP_ON_EXIT
+  sinfo("Other tasks:\n");
   sched_foreach(_up_dumponexit, NULL);
 #endif
 
@@ -155,7 +168,7 @@ void _exit(int status)
    */
 
   tcb = this_task();
-  slldbg("New Active Task TCB=%p\n", tcb);
+  sinfo("New Active Task TCB=%p\n", tcb);
 
   /* Then switch contexts */
 
diff --git a/arch/z16/src/common/up_idle.c b/arch/z16/src/common/up_idle.c
index 01aa0f8d6d893f20ae90c8de3636b3a706a3f689..58ddb4d455e424b0a5fbb7618d5ce7a32aa3a8e8 100644
--- a/arch/z16/src/common/up_idle.c
+++ b/arch/z16/src/common/up_idle.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_idle.c
+ * arch/z16/src/common/up_idle.c
  *
  *   Copyright (C) 2008-2009, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -47,10 +47,6 @@
 
 #include "up_internal.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
@@ -59,10 +55,6 @@
 static uint8_t g_ledtoggle = 0;
 #endif
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/arch/z16/src/common/up_initialize.c b/arch/z16/src/common/up_initialize.c
index 50b287d08a69f0d0afd5d32c32b1a2ffa9c2f025..59ee8138cde68ea1bbcca7d8282a10fe47156f71 100644
--- a/arch/z16/src/common/up_initialize.c
+++ b/arch/z16/src/common/up_initialize.c
@@ -44,13 +44,16 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
+#include 
+#include 
+#include 
 
 #include 
 
@@ -82,18 +85,18 @@ volatile FAR chipreg_t *g_current_regs;
  *
  ****************************************************************************/
 
-#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG_FEATURES)
 static void up_calibratedelay(void)
 {
   int i;
 
-  lldbg("Beginning 100s delay\n");
+  _warn("Beginning 100s delay\n");
   for (i = 0; i < 100; i++)
     {
       up_mdelay(1000);
     }
 
-  lldbg("End 100s delay\n");
+  _warn("End 100s delay\n");
 }
 #else
 # define up_calibratedelay()
@@ -130,9 +133,9 @@ void up_initialize(void)
 
   up_calibratedelay();
 
+#if CONFIG_MM_REGIONS > 1
   /* Add any extra memory fragments to the memory manager */
 
-#if CONFIG_MM_REGIONS > 1
   up_addregion();
 #endif
 
@@ -140,10 +143,20 @@ void up_initialize(void)
 
   up_irqinitialize();
 
-  /* Initialize the system timer interrupt */
+#ifdef CONFIG_PM
+  /* Initialize the power management subsystem.  This MCU-specific function
+   * must be called *very* early in the initialization sequence *before* any
+   * other device drivers are initialized (since they may attempt to register
+   * with the power management subsystem).
+   */
+
+  up_pminitialize();
+#endif
 
 #if !defined(CONFIG_SUPPRESS_INTERRUPTS) && !defined(CONFIG_SUPPRESS_TIMER_INTS)
-  up_timer_initialize();
+  /* Initialize the system timer interrupt */
+
+  z16_timer_initialize();
 #endif
 
   /* Register devices */
@@ -154,6 +167,14 @@ void up_initialize(void)
   devnull_register();   /* Standard /dev/null */
 #endif
 
+#if defined(CONFIG_DEV_RANDOM)
+  devrandom_register(); /* Standard /dev/random */
+#endif
+
+#if defined(CONFIG_DEV_URANDOM)
+  devurandom_register();   /* Standard /dev/urandom */
+#endif
+
 #if defined(CONFIG_DEV_ZERO)
   devzero_register();   /* Standard /dev/zero */
 #endif
@@ -180,19 +201,33 @@ void up_initialize(void)
 
 #if defined(CONFIG_DEV_LOWCONSOLE)
   lowconsole_init();
-#elif defined(CONFIG_SYSLOG_CONSOLE)
+#elif defined(CONFIG_CONSOLE_SYSLOG)
   syslog_console_init();
 #elif defined(CONFIG_RAMLOG_CONSOLE)
   ramlog_consoleinit();
 #endif
 
-  /* Initialize the system logging device */
+#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_PSEUDOTERM_SUSV1)
+  /* Register the master pseudo-terminal multiplexor device */
 
-#ifdef CONFIG_SYSLOG_CHAR
-  syslog_initialize();
+  (void)ptmx_register();
 #endif
-#ifdef CONFIG_RAMLOG_SYSLOG
-  ramlog_sysloginit();
+
+  /* Early initialization of the system logging device.  Some SYSLOG channel
+   * can be initialized early in the initialization sequence because they
+   * depend on only minimal OS initialization.
+   */
+
+  syslog_initialize(SYSLOG_INIT_EARLY);
+
+#if defined(CONFIG_CRYPTO)
+  /* Initialize the HW crypto and /dev/crypto */
+
+  up_cryptoinitialize();
+#endif
+
+#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_CRYPTO_CRYPTODEV)
+  devcrypto_register();
 #endif
 
 #ifndef CONFIG_NETDEV_LATEINIT
diff --git a/arch/z16/src/common/up_initialstate.c b/arch/z16/src/common/up_initialstate.c
index 246dc3dc53b8d61772ded4cfca62c33cd3399ca9..4509e1eba0eba7288645d2f29dd786b099272b4e 100644
--- a/arch/z16/src/common/up_initialstate.c
+++ b/arch/z16/src/common/up_initialstate.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_initialstate.c
+ * arch/z16/src/common/up_initialstate.c
  *
  *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -46,18 +46,6 @@
 #include "chip/chip.h"
 #include "up_internal.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/arch/z16/src/common/up_internal.h b/arch/z16/src/common/up_internal.h
index bd6f36ca9f8343c5f869d614a0b669adfb099978..caf7bf826ef516fdcc8860f44133928f8a5691a5 100644
--- a/arch/z16/src/common/up_internal.h
+++ b/arch/z16/src/common/up_internal.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_internal.h
+ * arch/z16/src/common/up_internal.h
  *
  *   Copyright (C) 2008-2009, 2011-2013, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __UP_INTERNAL_H
-#define __UP_INTERNAL_H
+#ifndef __ARCH_Z16_SRC_COMMON_UP_INTERNAL_H
+#define __ARCH_Z16_SRC_COMMON_UP_INTERNAL_H
 
 /****************************************************************************
  * Included Files
@@ -58,7 +58,11 @@
 #undef  CONFIG_SUPPRESS_UART_CONFIG   /* Do not reconfig UART */
 #undef  CONFIG_DUMP_ON_EXIT           /* Dump task state on exit */
 #undef  CONFIG_Z16_LOWPUTC            /* Support up_lowputc for debug */
-#undef  CONFIG_Z16_LOWGETC            /* support up_lowgetc for debug */
+#undef  CONFIG_Z16_LOWGETC            /* support z16_lowgetc for debug */
+
+#ifndef CONFIG_DEBUG_SCHED_INFO
+#  undef CONFIG_DUMP_ON_EXIT          /* Needs CONFIG_DEBUG_SCHED_INFO */
+#endif
 
 /* Determine which (if any) console driver to use.  If a console is enabled
  * and no other console device is specified, then a serial console is
@@ -98,13 +102,6 @@
 #  define USE_SERIALDRIVER 1
 #endif
 
-/* Determine which device to use as the system logging device */
-
-#ifndef CONFIG_SYSLOG
-#  undef CONFIG_SYSLOG_CHAR
-#  undef CONFIG_RAMLOG_SYSLOG
-#endif
-
 /* Macros for portability */
 
 #define IN_INTERRUPT             (g_current_regs != NULL)
@@ -149,7 +146,6 @@ void up_restoreusercontext(FAR chipreg_t *regs);
 void up_irqinitialize(void);
 int  up_saveusercontext(FAR chipreg_t *regs);
 void up_sigdeliver(void);
-int  up_timerisr(int irq, FAR chipreg_t *regs);
 
 #if defined(CONFIG_Z16_LOWPUTC) || defined(CONFIG_Z16_LOWGETC)
 void up_lowputc(char ch);
@@ -157,13 +153,13 @@ void up_lowputc(char ch);
 # define up_lowputc(ch)
 #endif
 
-/* Defined in up_allocateheap.c */
+/* Defined in xyz_allocateheap.c */
 
 #if CONFIG_MM_REGIONS > 1
 void up_addregion(void);
 #endif
 
-/* Defined in up_serial.c */
+/* Defined in xyz_serial.c */
 
 #ifdef USE_SERIALDRIVER
 void up_earlyserialinit(void);
@@ -174,15 +170,15 @@ void up_serialinit(void);
 void lowconsole_init(void);
 #endif
 
-/* Defined in up_timerisr.c */
+/* Defined in xyz_timerisr.c */
 
-void up_timer_initialize(void);
+void z16_timer_initialize(void);
 
-/* Defined in up_irq.c */
+/* Defined in xyz_irq.c */
 
 void up_ack_irq(int irq);
 
-/* Defined in board/up_network.c */
+/* Defined in board/xyz_network.c */
 
 #ifdef CONFIG_NET
 void up_netinitialize(void);
@@ -206,4 +202,4 @@ void up_registerdump(void);
 
 #endif /* __ASSEMBLY__ */
 
-#endif  /* __UP_INTERNAL_H */
+#endif  /* __ARCH_Z16_SRC_COMMON_UP_INTERNAL_H */
diff --git a/arch/z16/src/common/up_interruptcontext.c b/arch/z16/src/common/up_interruptcontext.c
index c45cf376e5c6ecff37c025865047998296e3059e..96c9521b0d7dcd47656a20d81027319c377fac76 100644
--- a/arch/z16/src/common/up_interruptcontext.c
+++ b/arch/z16/src/common/up_interruptcontext.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_interruptcontext.c
+ * arch/z16/src/common/up_interruptcontext.c
  *
  *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -46,14 +46,6 @@
 
 #include "up_internal.h"
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/arch/z16/src/common/up_mdelay.c b/arch/z16/src/common/up_mdelay.c
index 810754dd908646c3ecfc36db0885bcdbc0958bc2..b4981ac04f5a656b28da9dde0cc9babb6d33714d 100644
--- a/arch/z16/src/common/up_mdelay.c
+++ b/arch/z16/src/common/up_mdelay.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_mdelay.c
+ * arch/z16/src/common/up_mdelay.c
  *
  *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -42,26 +42,6 @@
 
 #ifdef CONFIG_BOARD_LOOPSPERMSEC
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/arch/z16/src/common/up_registerdump.c b/arch/z16/src/common/up_registerdump.c
index a4047d56f0171a4109300f4b461bc1d8c6de16a5..4e3088bf5792fd4f50f4634ecd3f026cf91f31ef 100644
--- a/arch/z16/src/common/up_registerdump.c
+++ b/arch/z16/src/common/up_registerdump.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * common/up_registerdump.c
+ * arch/z16/src/common/up_registerdump.c
  *
- *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if
- * debug is not selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-#  undef  CONFIG_DEBUG
-#  undef  CONFIG_DEBUG_VERBOSE
-#  define CONFIG_DEBUG 1
-#  define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 
@@ -60,14 +49,6 @@
 
 #ifdef CONFIG_ARCH_STACKDUMP
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -78,16 +59,19 @@
 
 static void up_registerdump(void)
 {
+#ifdef CONFIG_DEBUG_INFO
   FAR uint32_t *regs32 = (FAR uint32_t*)g_current_regs;
-  lldbg("R0 :%08x R1 :%08x R2 :%08x R3 :%08x "
+
+  _alert("R0 :%08x R1 :%08x R2 :%08x R3 :%08x "
         "R4 :%08x R5 :%08x R6 :%08x R7 :%08x\n"
         regs32[REG_R0/2],  regs32[REG_R1/2], regs32[REG_R2/2], regs32[REG_R3/2],
         regs32[REG_R4/2],  regs32[REG_R5/2], regs32[REG_R6/2], regs32[REG_R7/2]);
-  lldbg("R8 :%08x R9 :%08x R10:%08x R11:%08x R12:%08x R13:%08x\n"
+  _alert("R8 :%08x R9 :%08x R10:%08x R11:%08x R12:%08x R13:%08x\n"
         regs32[REG_R8/2],  regs32[REG_R9/2], regs32[REG_R10/2], regs3[REG_R11/2],
         regs32[REG_R12/2], regs32[REG_R13/2]);
-  lldbg("FP :%08x SP :%08x FLG:%04x\n"
+  _alert("FP :%08x SP :%08x FLG:%04x\n"
         regs32[REG_R14/2], regs32[REG_R15/2], g_current_regs[REG_FLAGS]);
+#endif
 }
 
 #endif /* CONFIG_ARCH_STACKDUMP */
diff --git a/arch/z16/src/common/up_releasepending.c b/arch/z16/src/common/up_releasepending.c
index 2d0e09b5ac30f97d6945fa467e66514db74f4dae..41ee99c7ed17ea8775e68adc1a412446b749ef9a 100644
--- a/arch/z16/src/common/up_releasepending.c
+++ b/arch/z16/src/common/up_releasepending.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_releasepending.c
+ * arch/z16/src/common/up_releasepending.c
  *
  *   Copyright (C) 2008-2009, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -68,7 +68,7 @@ void up_release_pending(void)
 {
   FAR struct tcb_s *rtcb = this_task();
 
-  slldbg("From TCB=%p\n", rtcb);
+  sinfo("From TCB=%p\n", rtcb);
 
   /* Merge the g_pendingtasks list into the ready-to-run task list */
 
diff --git a/arch/z16/src/common/up_releasestack.c b/arch/z16/src/common/up_releasestack.c
index f1ab953741c28295b9a4868d1da7d405c2545d65..e0f4c4b27fe33a9a0a836ac8ac6af289298029f1 100644
--- a/arch/z16/src/common/up_releasestack.c
+++ b/arch/z16/src/common/up_releasestack.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_releasestack.c
+ * arch/z16/src/common/up_releasestack.c
  *
  *   Copyright (C) 2008-2009, 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/z16/src/common/up_reprioritizertr.c b/arch/z16/src/common/up_reprioritizertr.c
index 4872db37f2634ce6db9a3dcbe10880e9c96a5fbb..d4fde47f31d7a94150486ed4db78c776c79c9c69 100644
--- a/arch/z16/src/common/up_reprioritizertr.c
+++ b/arch/z16/src/common/up_reprioritizertr.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_reprioritizertr.c
+ * arch/z16/src/common/up_reprioritizertr.c
  *
  *   Copyright (C) 2008-2009, 2013, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -96,7 +96,7 @@ void up_reprioritize_rtr(FAR struct tcb_s *tcb, uint8_t priority)
       FAR struct tcb_s *rtcb = this_task();
       bool switch_needed;
 
-      slldbg("TCB=%p PRI=%d\n", tcb, priority);
+      sinfo("TCB=%p PRI=%d\n", tcb, priority);
 
       /* Remove the tcb task from the ready-to-run list.
        * sched_removereadytorun will return true if we just
diff --git a/arch/z16/src/common/up_schedulesigaction.c b/arch/z16/src/common/up_schedulesigaction.c
index 0592b883352a9a13d4f1bdf45f211175aab48e72..8fde953c393ed542a65675adc6f7f11f16663565 100644
--- a/arch/z16/src/common/up_schedulesigaction.c
+++ b/arch/z16/src/common/up_schedulesigaction.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_schedulesigaction.c
+ * arch/z16/src/common/up_schedulesigaction.c
  *
  *   Copyright (C) 2008-2010, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -92,7 +92,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver)
 {
   irqstate_t flags;
 
-  dbg("tcb=0x%p sigdeliver=0x%06x\n", tcb, (uint32_t)sigdeliver);
+  sinfo("tcb=0x%p sigdeliver=0x%06x\n", tcb, (uint32_t)sigdeliver);
 
   /* Make sure that interrupts are disabled */
 
@@ -106,7 +106,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver)
        * being delivered to the currently executing task.
        */
 
-      dbg("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
+      sinfo("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
 
       if (tcb == this_task())
         {
diff --git a/arch/z16/src/common/up_sigdeliver.c b/arch/z16/src/common/up_sigdeliver.c
index 9861f0096e0208d2775dac3149e231d226dc1071..f9429d041b571ae44897cc96d5554b30aa0ed008 100644
--- a/arch/z16/src/common/up_sigdeliver.c
+++ b/arch/z16/src/common/up_sigdeliver.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_sigdeliver.c
+ * arch/z16/src/common/up_sigdeliver.c
  *
  *   Copyright (C) 2008-2010, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -84,7 +84,7 @@ void up_sigdeliver(void)
 
   board_autoled_on(LED_SIGNAL);
 
-  sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
         rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
   ASSERT(rtcb->xcp.sigdeliver != NULL);
 
@@ -119,7 +119,7 @@ void up_sigdeliver(void)
    * errno that is needed by the user logic (it is probably EINTR).
    */
 
-  sdbg("Resuming\n");
+  sinfo("Resuming\n");
   (void)up_irq_save();
   rtcb->pterrno = saved_errno;
 
diff --git a/arch/z16/src/common/up_stackdump.c b/arch/z16/src/common/up_stackdump.c
index f6d9e41236da561befedd4ee55b304605f43200c..e9eb80ef9440083cdf3f71fa471ba84c776387c8 100644
--- a/arch/z16/src/common/up_stackdump.c
+++ b/arch/z16/src/common/up_stackdump.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * common/up_stackdump.c
+ * arch/z16/src/common/up_stackdump.c
  *
- *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,13 +39,6 @@
 
 #include 
 
-/* Output debug info -- even if debug is not selected. */
-
-#undef  CONFIG_DEBUG
-#undef  CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
 #include 
 
 #include "chip/chip.h"
@@ -74,13 +67,13 @@ static void up_stackdump(void)
   chipreg_t stack_base = (chipreg_t)rtcb->adj_stack_ptr;
   chipreg_t stack_size = (chipreg_t)rtcb->adj_stack_size;
 
-  lldbg("stack_base: %08x\n", stack_base);
-  lldbg("stack_size: %08x\n", stack_size);
-  lldbg("sp:         %08x\n", sp);
+  _alert("stack_base: %08x\n", stack_base);
+  _alert("stack_size: %08x\n", stack_size);
+  _alert("sp:         %08x\n", sp);
 
   if (sp >= stack_base || sp < stack_base - stack_size)
     {
-      lldbg("ERROR: Stack pointer is not within allocated stack\n");
+      _err("ERROR: Stack pointer is not within allocated stack\n");
       return;
     }
   else
@@ -90,9 +83,9 @@ static void up_stackdump(void)
       for (stack = sp & ~0x0f; stack < stack_base; stack += 8*sizeof(chipreg_t))
         {
           chipreg_t *ptr = (chipreg_t*)stack;
-          lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-                 stack, ptr[0], ptr[1], ptr[2], ptr[3],
-                 ptr[4], ptr[5], ptr[6], ptr[7]);
+          _alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+                stack, ptr[0], ptr[1], ptr[2], ptr[3],
+                ptr[4], ptr[5], ptr[6], ptr[7]);
         }
     }
 }
diff --git a/arch/z16/src/common/up_udelay.c b/arch/z16/src/common/up_udelay.c
index 54545ac072c23ba995d189c3d84edab6e9cd37a0..4b36bc2d3c4c4ec92ac03ab18731d48453d8af81 100644
--- a/arch/z16/src/common/up_udelay.c
+++ b/arch/z16/src/common/up_udelay.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_udelay.c
+ * arch/z16/src/common/up_udelay.c
  *
  *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/z16/src/common/up_unblocktask.c b/arch/z16/src/common/up_unblocktask.c
index 96eb7675ac550bcb3a69bbd1cd3d3614ac2b62d0..d9de4e43b95030761a314d7869f5ffea4f033f25 100644
--- a/arch/z16/src/common/up_unblocktask.c
+++ b/arch/z16/src/common/up_unblocktask.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_unblocktask.c
+ * arch/z16/src/common/up_unblocktask.c
  *
  *   Copyright (C) 2008-2009, 2013, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -79,7 +79,7 @@ void up_unblock_task(FAR struct tcb_s *tcb)
   ASSERT((tcb->task_state >= FIRST_BLOCKED_STATE) &&
          (tcb->task_state <= LAST_BLOCKED_STATE));
 
-  /* dbg("Unblocking TCB=%p\n", tcb); */
+  /* sinfo("Unblocking TCB=%p\n", tcb); */
 
   /* Remove the task from the blocked task list */
 
diff --git a/arch/z16/src/z16f/Kconfig b/arch/z16/src/z16f/Kconfig
index 8861726aee32ab65025216d389b175e0f96d1dfb..56067cae663f9ee0e71481a35bdc8bebb54bbf0d 100644
--- a/arch/z16/src/z16f/Kconfig
+++ b/arch/z16/src/z16f/Kconfig
@@ -33,7 +33,7 @@ menu "Z16F ESPI Configuration"
 config Z16F_ESPI_REGDEBUG
 	bool "ESPI register-level debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_FEATURES
 
 endmenu # Z16F ESPI Configuration
 endif # ARCH_CHIP_Z16F
diff --git a/arch/z16/src/z16f/z16f_clkinit.c b/arch/z16/src/z16f/z16f_clkinit.c
index 15371646bc5e2d9060c0096bf5affef9465e751d..314020257bb872f9eb261bfe07395eda9ca14443 100644
--- a/arch/z16/src/z16f/z16f_clkinit.c
+++ b/arch/z16/src/z16f/z16f_clkinit.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * z16f/z16f_clkinit.c
+ * arch/z16/src/z16f/z16f_clkinit.c
  *
  *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -59,7 +59,7 @@ extern _Erom unsigned long SYS_CLK_FREQ;
  * Private Functions
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 /****************************************************************************
  *  System clock initialization--DEBUG. Code Using Frequency Input from
  *  ZDS IDE.
@@ -206,7 +206,7 @@ static void z16f_sysclkinit(int clockid, uint32_t frequency)
     for (count = 0; count < 10000; count++);
 }
 
-#else /* CONFIG_DEBUG */
+#else /* CONFIG_DEBUG_FEATURES */
 /****************************************************************************
  * System Clock Initialization Recommended for Release Code
  *
@@ -247,7 +247,7 @@ static void z16f_sysclkinit(int clockid, uint32_t frequency)
        putreg8(0xe0 | 1, Z16F_OSC_CTL); /* Use the external osc/clock as system clock */
     }
 }
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_FEATURES */
 
 /****************************************************************************
  * Public Functions
diff --git a/arch/z16/src/z16f/z16f_espi.c b/arch/z16/src/z16f/z16f_espi.c
index 869cbb79cbbcf52434b9b0ad54585a4b92e809dd..60db49a88b1f8e2f1d6e1b1d5e6e35f8d16c5393 100644
--- a/arch/z16/src/z16f/z16f_espi.c
+++ b/arch/z16/src/z16f/z16f_espi.c
@@ -55,32 +55,6 @@
 
 #ifdef CONFIG_Z16F_ESPI
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-/* Debug *******************************************************************/
-/* Check if SPI debug is enabled (non-standard.. no support in
- * include/debug.h
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_SPI
-#  undef CONFIG_Z16F_ESPI_REGDEBUG
-#endif
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg    lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg (void)
-#  endif
-#else
-#  define spidbg    (void)
-#  define spivdbg   (void)
-#endif
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -127,7 +101,7 @@ static void     spi_putreg16(FAR struct z16f_spi_s *priv, uint16_t regval,
 # define        spi_putreg16(priv,regval,regaddr) putreg16(regval, regaddr)
 #endif
 
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_SPI_INFO
 static void     spi_dumpregs(FAR struct z16f_spi_s *priv, const char *msg);
 #else
 # define        spi_dumpregs(priv,msg)
@@ -231,7 +205,7 @@ static bool spi_checkreg(FAR struct z16f_spi_s *priv, bool wr, uint16_t regval,
         {
           /* Yes... show how many times we did it */
 
-          lldbg("...[Repeats %d times]...\n", priv->ntimes);
+          syslog(LOG_INFO, "...[Repeats %d times]...\n", priv->ntimes);
         }
 
       /* Save information about the new access */
@@ -263,7 +237,7 @@ static uint8_t spi_getreg8(FAR struct z16f_spi_s *priv, uintptr_t regaddr)
 
   if (spi_checkreg(priv, false, (uint16_t)regval, regaddr))
     {
-      lldbg("%06x->%02x\n", regaddr, regval);
+      syslog(LOG_INFO, "%06x->%02x\n", regaddr, regval);
     }
 
   return regval;
@@ -284,7 +258,7 @@ static void spi_putreg8(FAR struct z16f_spi_s *priv, uint8_t regval,
 {
   if (spi_checkreg(priv, true, (uint16_t)regval, regaddr))
     {
-      lldbg("%06x<-%02x\n", regaddr, regval);
+      syslog(LOG_INFO, "%06x<-%02x\n", regaddr, regval);
     }
 
   putreg8(regval, regaddr);
@@ -305,7 +279,7 @@ static void spi_putreg16(FAR struct z16f_spi_s *priv, uint16_t regval,
 {
   if (spi_checkreg(priv, true, regval, regaddr))
     {
-      lldbg("%06x<-%04x\n", regaddr, regval);
+      syslog(LOG_INFO, "%06x<-%04x\n", regaddr, regval);
     }
 
   putreg8(regval, regaddr);
@@ -327,14 +301,14 @@ static void spi_putreg16(FAR struct z16f_spi_s *priv, uint16_t regval,
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_SPI_INFO
 static void spi_dumpregs(FAR struct z16f_spi_s *priv, FAR const char *msg)
 {
-  spivdbg("%s:\n", msg);
-  spivdbg("   DCR: %02x  CTL: %02x MODE: %02x STAT: %02x\n",
+  spiinfo("%s:\n", msg);
+  spiinfo("   DCR: %02x  CTL: %02x MODE: %02x STAT: %02x\n",
           getreg8(Z16F_ESPI_DCR),  getreg8(Z16F_ESPI_CTL),
           getreg8(Z16F_ESPI_MODE), getreg8(Z16F_ESPI_STAT));
-  spivdbg(" STATE: %02x   BR: %02x %02x\n",
+  spiinfo(" STATE: %02x   BR: %02x %02x\n",
           getreg8(Z16F_ESPI_STATE),  getreg8(Z16F_ESPI_BRH),
           getreg8(Z16F_ESPI_BRL));
 }
@@ -395,7 +369,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
 {
   FAR struct z16f_spi_s *priv = (FAR struct z16f_spi_s *)dev;
 
-  spivdbg("lock=%d\n", lock);
+  spiinfo("lock=%d\n", lock);
   if (lock)
     {
       /* Take the semaphore (perhaps waiting) */
@@ -438,7 +412,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
   uint32_t actual;
   uint32_t brg;
 
-  spivdbg("frequency=%d\n", frequency);
+  spiinfo("frequency=%d\n", frequency);
 
   /* Check if the requested frequency is the same as the frequency selection */
 
@@ -469,14 +443,14 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
   /* Calculate the new actual frequency */
 
   actual = (BOARD_SYSTEM_FREQUENCY >> 1) / brg;
-  spivdbg("BR=%04x actual=%ld\n", (unsigned int)brg, (long)actual);
+  spiinfo("BR=%04x actual=%ld\n", (unsigned int)brg, (long)actual);
 
   /* Save the frequency setting */
 
   priv->frequency = frequency;
   priv->actual    = actual;
 
-  spidbg("Frequency %d->%d\n", frequency, actual);
+  spiinfo("Frequency %d->%d\n", frequency, actual);
   return actual;
 }
 
@@ -500,7 +474,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
   FAR struct z16f_spi_s *priv = (FAR struct z16f_spi_s *)dev;
   uint8_t regval;
 
-  spivdbg("mode=%d\n", mode);
+  spiinfo("mode=%d\n", mode);
 
   /* Has the mode changed? */
 
@@ -542,7 +516,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
         }
 
       spi_putreg8(priv, regval, Z16F_ESPI_CTL);
-      spivdbg("ESPI CTL: %02x\n", regval);
+      spiinfo("ESPI CTL: %02x\n", regval);
 
       /* Save the mode so that subsequent re-configurations will be faster */
 
@@ -570,7 +544,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
   FAR struct z16f_spi_s *priv = (FAR struct z16f_spi_s *)dev;
   uint8_t regval;
 
-  spivdbg("nbits=%d\n", nbits);
+  spiinfo("nbits=%d\n", nbits);
   DEBUGASSERT(priv && nbits > 0 && nbits <= 8);
 
   /* Has the number of bits changed? */
@@ -590,7 +564,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
         }
 
       spi_putreg8(priv, regval, Z16F_ESPI_MODE);
-      spivdbg("ESPI MODE: %02x\n", regval);
+      spiinfo("ESPI MODE: %02x\n", regval);
 
       /* Save the selection so the subsequence re-configurations will be faster */
 
@@ -628,7 +602,7 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
   rxbyte = (uint8_t)0;
   spi_exchange(dev, &txbyte, &rxbyte, 1);
 
-  spivdbg("Sent %02x received %02x\n", txbyte, rxbyte);
+  spiinfo("Sent %02x received %02x\n", txbyte, rxbyte);
   return (uint16_t)rxbyte;
 }
 
@@ -661,7 +635,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
   FAR uint8_t *rxptr = rxbuffer;
   FAR const uint8_t *txptr = txbuffer;
 
-  spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+  spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
 
   /* Make sure that any previous transfer is flushed from the hardware */
 
@@ -823,7 +797,7 @@ FAR struct spi_dev_s *z16_spibus_initialize(int port)
   irqstate_t flags;
   uint8_t regval;
 
-  spivdbg("port: %d\n", port);
+  spiinfo("port: %d\n", port);
   DEBUGASSERT(port == 0);
 
   /* Check if we have already initialized the ESPI */
diff --git a/arch/z16/src/z16f/z16f_lowuart.S b/arch/z16/src/z16f/z16f_lowuart.S
index 161d5ac9243c50a269ba738ff596bba69bae59cb..ef7c31a6ca4872f4d48be3cee53911625baab5f9 100644
--- a/arch/z16/src/z16f/z16f_lowuart.S
+++ b/arch/z16/src/z16f/z16f_lowuart.S
@@ -70,7 +70,7 @@
 	xdef	_up_lowputc
 #endif
 #ifdef CONFIG_Z16_LOWGETC
-	xdef	_up_lowgetc
+	xdef	_z16_lowgetc
 #endif
 
 /*************************************************************************
@@ -222,7 +222,7 @@ _z16f_xmitc1:
 #endif /* CONFIG_Z16_LOWPUTC */
 
 /*************************************************************************
- * Name: _up_lowgetc
+ * Name: _z16_lowgetc
  *
  * Description:
  *   Get a character from the serial port
@@ -236,34 +236,34 @@ _z16f_xmitc1:
  *************************************************************************/
 
 #ifdef CONFIG_Z16_LOWGETC
-_up_lowgetc:
-_up_lowgetc1:
+_z16_lowgetc:
+_z16_lowgetc1:
 
 #ifdef HAVE_Z16F_SERIAL_CONSOLE
 	ld		r0, #Z16F_UARTSTAT0_RDA	/* RDA=Receive data available */
 
 #ifdef CONFIG_UART1_SERIAL_CONSOLE
 	tm.b	Z16F_UART1_STAT0, r0
-	jp		eq, _up_lowgetc1		/* While (!Z16F_UART1_STAT0 & RDA)) */
+	jp		eq, _z16_lowgetc1		/* While (!Z16F_UART1_STAT0 & RDA)) */
 	ld.ub	r0, Z16F_UART1_RXD		/* r0 = Z16F_UART1_RXD */
 
 #else
 	tm.b	Z16F_UART0_STAT0,r0		/* While (!Z16F_UART0_STAT0 & RDA) */
-	jp		eq, _up_lowgetc1
+	jp		eq, _z16_lowgetc1
 	ld.ub	r0, Z16F_UART0_RXD		/* r0 = Z16F_UART0_RXD */
 
 #endif
 
 	cp		r0, #%0d				/* Test for '\r' */
-	jp		eq, _up_lowgetc2
+	jp		eq, _z16_lowgetc2
 
 	cp		r0, #%0d				/* Test \r + high bit */
-	jp		ne, _up_lowgetc3
+	jp		ne, _z16_lowgetc3
 
-_up_lowgetc2:
+_z16_lowgetc2:
 	ld		r0, #%0a				/* Convert '\r' to '\n' */
 
-_up_lowgetc3:						/* Return value in r0 */
+_z16_lowgetc3:						/* Return value in r0 */
 #endif /* HAVE_Z16F_SERIAL_CONSOLE */
 
 	ret								/* Return */
diff --git a/arch/z16/src/z16f/z16f_serial.c b/arch/z16/src/z16f/z16f_serial.c
index dcbcff5ceffb955c4ca9f103263c88ef3e9773e7..1e24c165d1751f217bcad5336e4c64e9476cd2b2 100644
--- a/arch/z16/src/z16f/z16f_serial.c
+++ b/arch/z16/src/z16f/z16f_serial.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/z16/src/z16f/z16f_serial.c
  *
- *   Copyright (C) 2008-2009, 2012, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2012, 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -95,8 +95,8 @@ static int  z16f_setup(struct uart_dev_s *dev);
 static void z16f_shutdown(struct uart_dev_s *dev);
 static int  z16f_attach(struct uart_dev_s *dev);
 static void z16f_detach(struct uart_dev_s *dev);
-static int  z16f_rxinterrupt(int irq, void *context);
-static int  z16f_txinterrupt(int irq, void *context);
+static int  z16f_rxinterrupt(int irq, void *context, void *arg);
+static int  z16f_txinterrupt(int irq, void *context, void *arg);
 static int  z16f_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  z16f_receive(struct uart_dev_s *dev, uint32_t *status);
 static void z16f_rxint(struct uart_dev_s *dev, bool enable);
@@ -426,12 +426,12 @@ static int z16f_attach(struct uart_dev_s *dev)
 
   /* Attach the RX IRQ */
 
-  ret = irq_attach(priv->rxirq, z16f_rxinterrupt);
+  ret = irq_attach(priv->rxirq, z16f_rxinterrupt, dev);
   if (ret == OK)
     {
       /* Attach the TX IRQ */
 
-      ret = irq_attach(priv->txirq, z16f_txinterrupt);
+      ret = irq_attach(priv->txirq, z16f_txinterrupt, dev);
       if (ret != OK)
         {
           irq_detach(priv->rxirq);
@@ -471,30 +471,13 @@ static void z16f_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int z16f_rxinterrupt(int irq, void *context)
+static int z16f_rxinterrupt(int irq, void *context, void *arg)
 {
-  struct uart_dev_s  *dev = NULL;
+  struct uart_dev_s  *dev = (struct uart_dev_s *)arg;
   struct z16f_uart_s *priv;
   uint8_t            status;
 
-#ifdef CONFIG_Z16F_UART1
-  if (g_uart1priv.rxirq == irq)
-    {
-      dev = &g_uart1port;
-    }
-  else
-#endif
-#ifdef CONFIG_Z16F_UART0
-  if (g_uart0priv.rxirq == irq)
-    {
-      dev = &g_uart0port;
-    }
-  else
-#endif
-    {
-      PANIC();
-    }
-
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct z16f_uart_s*)dev->priv;
 
   /* Check the LIN-UART status 0 register to determine whether the source of
@@ -526,30 +509,13 @@ static int z16f_rxinterrupt(int irq, void *context)
  *
  ****************************************************************************/
 
-static int z16f_txinterrupt(int irq, void *context)
+static int z16f_txinterrupt(int irq, void *context, FAR void *arg)
 {
-  struct uart_dev_s  *dev = NULL;
+  struct uart_dev_s  *dev = (struct uart_dev_s *)arg;
   struct z16f_uart_s *priv;
   uint8_t            status;
 
-#ifdef CONFIG_Z16F_UART1
-  if (g_uart1priv.txirq == irq)
-    {
-      dev = &g_uart1port;
-    }
-  else
-#endif
-#ifdef CONFIG_Z16F_UART0
-  if (g_uart0priv.txirq == irq)
-    {
-      dev = &g_uart0port;
-    }
-  else
-#endif
-    {
-      PANIC();
-    }
-
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct z16f_uart_s*)dev->priv;
 
   /* Verify that the transmit data register is empty */
diff --git a/arch/z16/src/z16f/z16f_sysexec.c b/arch/z16/src/z16f/z16f_sysexec.c
index d7ac63175133bea4c3aee1226e409386b80c6f60..86ed1e4eb0b29164e712ccd90217fb3a9b3f65b5 100644
--- a/arch/z16/src/z16f/z16f_sysexec.c
+++ b/arch/z16/src/z16f/z16f_sysexec.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * z16f/z16f_sysexec.c
+ * arch/z16/src/1`z16f/z16f_sysexec.c
  *
  *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -47,18 +47,6 @@
 #include "chip/chip.h"
 #include "up_internal.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -88,42 +76,42 @@ void z16f_sysexec(FAR chipreg_t *regs)
   excp = getreg16(Z16F_SYSEXCP);
   if ((excp & Z16F_SYSEXCP_SPOVF) != 0)
     {
-      lowsyslog(LOG_ERR, "SP OVERFLOW\n");
+      err("ERROR: SP OVERFLOW\n");
     }
 
   if ((excp & Z16F_SYSEXCP_PCOVF) != 0)
     {
-      lowsyslog(LOG_ERR, "PC OVERFLOW\n");
+      err("ERROR: PC OVERFLOW\n");
     }
 
   if ((excp & Z16F_SYSEXCP_DIV0) != 0)
     {
-      lowsyslog(LOG_ERR, "Divide by zero\n");
+      err("ERROR: Divide by zero\n");
     }
 
   if ((excp & Z16F_SYSEXCP_DIVOVF) != 0)
     {
-      lowsyslog(LOG_ERR, "Divide overflow\n");
+      err("ERROR: Divide overflow\n");
     }
 
   if ((excp & Z16F_SYSEXCP_ILL) != 0)
     {
-      lowsyslog(LOG_ERR, "Illegal instruction\n");
+      err("ERROR: Illegal instruction\n");
     }
 
   if ((excp & Z16F_SYSEXCP_WDTOSC) != 0)
     {
-      lowsyslog(LOG_ERR, "WDT oscillator failure\n");
+      err("ERROR: WDT oscillator failure\n");
     }
 
   if ((excp & Z16F_SYSEXCP_PRIOSC) != 0)
     {
-      lowsyslog(LOG_ERR, "Primary Oscillator Failure\n");
+      err("ERROR: Primary Oscillator Failure\n");
     }
 
   if ((excp & Z16F_SYSEXCP_WDT) != 0)
     {
-      lowsyslog(LOG_ERR, "Watchdog timeout\n");
+      err("ERROR: Watchdog timeout\n");
       z16f_reset();
     }
 
diff --git a/arch/z16/src/z16f/z16f_timerisr.c b/arch/z16/src/z16f/z16f_timerisr.c
index 24b12a46953a2e49283c60c6374c39a7229c2952..19fca1f1b241a94bb6f93fdec0dd804f93ba2e98 100644
--- a/arch/z16/src/z16f/z16f_timerisr.c
+++ b/arch/z16/src/z16f/z16f_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * z16f/z16f_timerisr.c
+ * arch/z16/src/z16f/z16f_timerisr.c
  *
- *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -70,19 +70,11 @@ extern _Erom uint8_t SYS_CLK_FREQ;
 #define _DEFCLK ((uint32_t)&SYS_CLK_FREQ)
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  z16f_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -90,16 +82,20 @@ extern _Erom uint8_t SYS_CLK_FREQ;
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int z16f_timerisr(int irq, uint32_t *regs, void *arg)
 {
-   /* Process timer interrupt */
+  /* Process timer interrupt */
 
-   sched_process_timer();
-   return 0;
+  sched_process_timer();
+  return 0;
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  z16_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize
@@ -107,7 +103,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void z16_timer_initialize(void)
 {
   uint32_t reload;
   uint32_t scaledfreq;
@@ -228,6 +224,6 @@ void up_timer_initialize(void)
 
   /* Attach and enable the timer interrupt (leaving at priority 0) */
 
-  irq_attach(Z16F_IRQ_SYSTIMER, (xcpt_t)up_timerisr);
+  irq_attach(Z16F_IRQ_SYSTIMER, (xcpt_t)z16f_timerisr, NULL);
   up_enable_irq(Z16F_IRQ_SYSTIMER);
 }
diff --git a/arch/z80/include/arch.h b/arch/z80/include/arch.h
index 123ea4bada34bc513e90ba5c3cf5b743593879a7..a99247972c14ecdc0ecb644cb5618ad139ce3bea 100644
--- a/arch/z80/include/arch.h
+++ b/arch/z80/include/arch.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arch.h
+ * arch/z80/include/arch.h
  *
  *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/z80/include/ez80/arch.h b/arch/z80/include/ez80/arch.h
index f210332399c31ba1323a3baa77c1b9a24a48c574..b8e3eecc8a2c2ffef4615aeba3234700991d8c78 100644
--- a/arch/z80/include/ez80/arch.h
+++ b/arch/z80/include/ez80/arch.h
@@ -1,6 +1,5 @@
 /****************************************************************************
- * arch/ez80/arch.h
- * arch/chip/arch.h
+ * arch/z80/include/ez80/arch.h
  *
  *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -38,8 +37,8 @@
  * only indirectly through nuttx/arch.h (via arch/arch.h)
  */
 
-#ifndef __ARCH_EZ80_ARCH_H
-#define __ARCH_EZ80_ARCH_H
+#ifndef __ARCH_Z80_INCLUDE_EZ80_ARCH_H
+#define __ARCH_Z80_INCLUDE_EZ80_ARCH_H
 
 /****************************************************************************
  * Included Files
@@ -74,5 +73,5 @@ extern "C"
 }
 #endif
 
-#endif /* __ARCH_EZ80_ARCH_H */
+#endif /* __ARCH_Z80_INCLUDE_EZ80_ARCH_H */
 
diff --git a/arch/z80/include/ez80/inttypes.h b/arch/z80/include/ez80/inttypes.h
new file mode 100644
index 0000000000000000000000000000000000000000..b4b0766293cf938e9e43d7db49eba9dd924bf868
--- /dev/null
+++ b/arch/z80/include/ez80/inttypes.h
@@ -0,0 +1,383 @@
+/****************************************************************************
+ * arch/z80/include/ez80/inttypes.h
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_Z80_INCLUDE_EZ80_INTTYPES_H
+#define __ARCH_Z80_INCLUDE_EZ80_INTTYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_EZ80_Z80MODE
+
+#  define PRId8       "d"
+#  define PRId16      "d"
+#  define PRId32      "ld"
+
+#  define PRIdLEAST8  "d"
+#  define PRIdLEAST16 "d"
+#  define PRIdLEAST32 "ld"
+
+#  define PRIdFAST8   "d"
+#  define PRIdFAST16  "d"
+#  define PRIdFAST32  "ld"
+
+#  define PRIdMAX     "ld"
+#  define PRIdPTR     "d"
+
+#  define PRIi8       "i"
+#  define PRIi16      "i"
+#  define PRIi32      "li"
+
+#  define PRIiLEAST8  "i"
+#  define PRIiLEAST16 "i"
+#  define PRIiLEAST32 "li"
+
+#  define PRIiFAST8   "i"
+#  define PRIiFAST16  "i"
+#  define PRIiFAST32  "li"
+
+#  define PRIiMAX     "li"
+#  define PRIiPTR     "i"
+
+#  define PRIo8       "o"
+#  define PRIo16      "o"
+#  define PRIo32      "lo"
+
+#  define PRIoLEAST8  "o"
+#  define PRIoLEAST16 "o"
+#  define PRIoLEAST32 "lo"
+
+#  define PRIoFAST8   "o"
+#  define PRIoFAST16  "o"
+#  define PRIoFAST32  "lo"
+
+#  define PRIoMAX     "lo"
+#  define PRIoPTR     "o"
+
+#  define PRIu8       "u"
+#  define PRIu16      "u"
+#  define PRIu32      "lu"
+
+#  define PRIuLEAST8  "u"
+#  define PRIuLEAST16 "u"
+#  define PRIuLEAST32 "lu"
+
+#  define PRIuFAST8   "u"
+#  define PRIuFAST16  "u"
+#  define PRIuFAST32  "lu"
+
+#  define PRIuMAX     "lu"
+#  define PRIuPTR     "u"
+
+#  define PRIx8       "x"
+#  define PRIx16      "x"
+#  define PRIx32      "lx"
+
+#  define PRIxLEAST8  "x"
+#  define PRIxLEAST16 "x"
+#  define PRIxLEAST32 "lx"
+
+#  define PRIxFAST8   "x"
+#  define PRIxFAST16  "x"
+#  define PRIxFAST32  "lx"
+
+#  define PRIxMAX     "lx"
+#  define PRIxPTR     "x"
+
+#  define PRIX8       "X"
+#  define PRIX16      "X"
+#  define PRIX32      "lX"
+
+#  define PRIXLEAST8  "X"
+#  define PRIXLEAST16 "X"
+#  define PRIXLEAST32 "lX"
+
+#  define PRIXFAST8   "X"
+#  define PRIXFAST16  "X"
+#  define PRIXFAST32  "lX"
+
+#  define PRIXMAX     "lX"
+#  define PRIXPTR     "X"
+
+#  define SCNd8       "hhd"
+#  define SCNd16      "hd"
+#  define SCNd32      "ld"
+
+#  define SCNdLEAST8  "hhd"
+#  define SCNdLEAST16 "hd"
+#  define SCNdLEAST32 "ld"
+
+#  define SCNdFAST8   "hhd"
+#  define SCNdFAST16  "hd"
+#  define SCNdFAST32  "ld"
+
+#  define SCNdMAX     "ld"
+#  define SCNdPTR     "hd"
+
+#  define SCNi8       "hhi"
+#  define SCNi16      "hi"
+#  define SCNi32      "li"
+
+#  define SCNiLEAST8  "hhi"
+#  define SCNiLEAST16 "hi"
+#  define SCNiLEAST32 "li"
+
+#  define SCNiFAST8   "hhi"
+#  define SCNiFAST16  "hi"
+#  define SCNiFAST32  "li"
+
+#  define SCNiMAX     "li"
+#  define SCNiPTR     "hi"
+
+#  define SCNo8       "hho"
+#  define SCNo16      "ho"
+#  define SCNo32      "lo"
+
+#  define SCNoLEAST8  "hho"
+#  define SCNoLEAST16 "ho"
+#  define SCNoLEAST32 "lo"
+
+#  define SCNoFAST8   "hho"
+#  define SCNoFAST16  "ho"
+#  define SCNoFAST32  "lo"
+
+#  define SCNoMAX     "lo"
+#  define SCNoPTR     "ho"
+
+#  define SCNu8       "hhu"
+#  define SCNu16      "hu"
+#  define SCNu32      "lu"
+
+#  define SCNuLEAST8  "hhu"
+#  define SCNuLEAST16 "hu"
+#  define SCNuLEAST32 "lu"
+
+#  define SCNuFAST8   "hhu"
+#  define SCNuFAST16  "hu"
+#  define SCNuFAST32  "lu"
+
+#  define SCNuMAX     "lu"
+#  define SCNuPTR     "hu"
+
+#  define SCNx8       "hhx"
+#  define SCNx16      "hx"
+#  define SCNx32      "lx"
+
+#  define SCNxLEAST8  "hhx"
+#  define SCNxLEAST16 "hx"
+#  define SCNxLEAST32 "lx"
+
+#  define SCNxFAST8   "hhx"
+#  define SCNxFAST16  "hx"
+#  define SCNxFAST32  "lx"
+
+#  define SCNxMAX     "lx"
+#  define SCNxPTR     "hx"
+
+#else
+
+#  define PRId8       "d"
+#  define PRId16      "d"
+#  define PRId32      "ld"
+
+#  define PRIdLEAST8  "d"
+#  define PRIdLEAST16 "d"
+#  define PRIdLEAST32 "ld"
+
+#  define PRIdFAST8   "d"
+#  define PRIdFAST16  "d"
+#  define PRIdFAST32  "ld"
+
+#  define PRIdMAX     "ld"
+#  define PRIdPTR     "d"
+
+#  define PRIi8       "i"
+#  define PRIi16      "i"
+#  define PRIi32      "li"
+
+#  define PRIiLEAST8  "i"
+#  define PRIiLEAST16 "i"
+#  define PRIiLEAST32 "li"
+
+#  define PRIiFAST8   "i"
+#  define PRIiFAST16  "i"
+#  define PRIiFAST32  "li"
+
+#  define PRIiMAX     "li"
+#  define PRIiPTR     "i"
+
+#  define PRIo8       "o"
+#  define PRIo16      "o"
+#  define PRIo32      "lo"
+
+#  define PRIoLEAST8  "o"
+#  define PRIoLEAST16 "o"
+#  define PRIoLEAST32 "lo"
+
+#  define PRIoFAST8   "o"
+#  define PRIoFAST16  "o"
+#  define PRIoFAST32  "lo"
+
+#  define PRIoMAX     "lo"
+#  define PRIoPTR     "o"
+
+#  define PRIu8       "u"
+#  define PRIu16      "u"
+#  define PRIu32      "lu"
+
+#  define PRIuLEAST8  "u"
+#  define PRIuLEAST16 "u"
+#  define PRIuLEAST32 "lu"
+
+#  define PRIuFAST8   "u"
+#  define PRIuFAST16  "u"
+#  define PRIuFAST32  "lu"
+
+#  define PRIuMAX     "lu"
+#  define PRIuPTR     "u"
+
+#  define PRIx8       "x"
+#  define PRIx16      "x"
+#  define PRIx32      "lx"
+
+#  define PRIxLEAST8  "x"
+#  define PRIxLEAST16 "x"
+#  define PRIxLEAST32 "lx"
+
+#  define PRIxFAST8   "x"
+#  define PRIxFAST16  "x"
+#  define PRIxFAST32  "lx"
+
+#  define PRIxMAX     "lx"
+#  define PRIxPTR     "x"
+
+#  define PRIX8       "X"
+#  define PRIX16      "X"
+#  define PRIX32      "lX"
+
+#  define PRIXLEAST8  "X"
+#  define PRIXLEAST16 "X"
+#  define PRIXLEAST32 "lX"
+
+#  define PRIXFAST8   "X"
+#  define PRIXFAST16  "X"
+#  define PRIXFAST32  "lX"
+
+#  define PRIXMAX     "lX"
+#  define PRIXPTR     "X"
+
+#  define SCNd8       "hhd"
+#  define SCNd16      "hd"
+#  define SCNd32      "ld"
+
+#  define SCNdLEAST8  "hhd"
+#  define SCNdLEAST16 "hd"
+#  define SCNdLEAST32 "ld"
+
+#  define SCNdFAST8   "hhd"
+#  define SCNdFAST16  "hd"
+#  define SCNdFAST32  "ld"
+
+#  define SCNdMAX     "ld"
+#  define SCNdPTR     "d"
+
+#  define SCNi8       "hhi"
+#  define SCNi16      "hi"
+#  define SCNi32      "li"
+
+#  define SCNiLEAST8  "hhi"
+#  define SCNiLEAST16 "hi"
+#  define SCNiLEAST32 "li"
+
+#  define SCNiFAST8   "hhi"
+#  define SCNiFAST16  "hi"
+#  define SCNiFAST32  "li"
+
+#  define SCNiMAX     "li"
+#  define SCNiPTR     "i"
+
+#  define SCNo8       "hho"
+#  define SCNo16      "ho"
+#  define SCNo32      "lo"
+
+#  define SCNoLEAST8  "hho"
+#  define SCNoLEAST16 "ho"
+#  define SCNoLEAST32 "lo"
+
+#  define SCNoFAST8   "hho"
+#  define SCNoFAST16  "ho"
+#  define SCNoFAST32  "lo"
+
+#  define SCNoMAX     "lo"
+#  define SCNoPTR     "o"
+
+#  define SCNu8       "hhu"
+#  define SCNu16      "hu"
+#  define SCNu32      "lu"
+
+#  define SCNuLEAST8  "hhu"
+#  define SCNuLEAST16 "hu"
+#  define SCNuLEAST32 "lu"
+
+#  define SCNuFAST8   "hhu"
+#  define SCNuFAST16  "hu"
+#  define SCNuFAST32  "lu"
+
+#  define SCNuMAX     "lu"
+#  define SCNuPTR     "u"
+
+#  define SCNx8       "hhx"
+#  define SCNx16      "hx"
+#  define SCNx32      "lx"
+
+#  define SCNxLEAST8  "hhx"
+#  define SCNxLEAST16 "hx"
+#  define SCNxLEAST32 "lx"
+
+#  define SCNxFAST8   "hhx"
+#  define SCNxFAST16  "hx"
+#  define SCNxFAST32  "lx"
+
+#  define SCNxMAX     "lx"
+#  define SCNxPTR     "x"
+
+#endif
+
+#endif /* __ARCH_Z80_INCLUDE_EZ80_INTTYPES_H */
diff --git a/arch/z80/include/ez80/io.h b/arch/z80/include/ez80/io.h
index 2ae92c8ba5f62e02bd155fdef90568fefe219c99..e843db3567d4f0ff82ab58c8ed317315b8d18ba5 100644
--- a/arch/z80/include/ez80/io.h
+++ b/arch/z80/include/ez80/io.h
@@ -1,6 +1,5 @@
 /****************************************************************************
  * arch/z80/include/ez80/io.h
- * arch/chip/io.h
  *
  *   Copyright (C) 2008-2009, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -38,8 +37,8 @@
  * through arch/io.h
  */
 
-#ifndef __ARCH_EZ80_IO_H
-#define __ARCH_EZ80_IO_H
+#ifndef __ARCH_Z80_INCLUDE_EZ80_IO_H
+#define __ARCH_Z80_INCLUDE_EZ80_IO_H
 
 /****************************************************************************
  * Included Files
@@ -85,4 +84,4 @@ uint8_t inp(uint16_t p);
 #endif
 #endif
 
-#endif /* __ARCH_EZ80_IO_H */
+#endif /* __ARCH_Z80_INCLUDE_EZ80_IO_H */
diff --git a/arch/z80/include/ez80/irq.h b/arch/z80/include/ez80/irq.h
index 33b00783effbd7ee0d3ee1b1e93217b76d9243d5..ace37f74b9b8bd9a42de337099b67c03fce0a6cc 100644
--- a/arch/z80/include/ez80/irq.h
+++ b/arch/z80/include/ez80/irq.h
@@ -1,6 +1,5 @@
 /****************************************************************************
- * arch/ez80/include/ez80/irq.h
- * arch/chip/irq.h
+ * arch/z80/include/ez80/irq.h
  *
  *   Copyright (C) 2008-2009, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/z80/include/ez80/types.h b/arch/z80/include/ez80/types.h
index 1f0d46957d263d2ec177c31c5995344eedc263c1..21f256d6ef8e0652799b243a80a9a5f65257d4d6 100644
--- a/arch/z80/include/ez80/types.h
+++ b/arch/z80/include/ez80/types.h
@@ -1,6 +1,5 @@
 /****************************************************************************
  * arch/z80/include/ez80/types.h
- * include/arch/chip/types.h
  *
  *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/arm/include/calypso/armio.h b/arch/z80/include/inttypes.h
similarity index 84%
rename from arch/arm/include/calypso/armio.h
rename to arch/z80/include/inttypes.h
index 2f232beb22ade32761d28aed29498ff5ec51ac55..0ff8561a31daf1a35a45f752fdfbb14d71f32004 100644
--- a/arch/arm/include/calypso/armio.h
+++ b/arch/z80/include/inttypes.h
@@ -1,8 +1,8 @@
 /****************************************************************************
- * Driver for Calypso ARMIO
+ * arch/z80/include/inttypes.h
  *
- *   Copyright (C) 2011 Stefan Richter. All rights reserved.
- *   Author: Stefan Richter 
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -33,17 +33,17 @@
  *
  ****************************************************************************/
 
-#include 
-#include 
+#ifndef __ARCH_Z80_INCLUDE_INTTYPES_H
+#define __ARCH_Z80_INCLUDE_INTTYPES_H
 
 /****************************************************************************
- * Prototypes for interrupt handling
+ * Included Files
  ****************************************************************************/
 
-inline int calypso_kbd_irq(int irq, uint32_t *regs);
+#include 
 
 /****************************************************************************
- * Initialize device, add /dev/... nodes
+ * Pre-processor Definitions
  ****************************************************************************/
 
-void calypso_armio(void);
+#endif /* __ARCH_Z80_INCLUDE_INTTYPES_H */
diff --git a/arch/z80/include/io.h b/arch/z80/include/io.h
index bd97c3792fa60e30519b8364646ac3078ac551de..27cdae39c21f17524930f92e8dbf02e735d5b100 100644
--- a/arch/z80/include/io.h
+++ b/arch/z80/include/io.h
@@ -1,6 +1,5 @@
 /****************************************************************************
  * arch/z80/include/io.h
- * arch/chip/io.h
  *
  *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/z80/include/z180/chip.h b/arch/z80/include/z180/chip.h
index 88df7a2b4b17d4873a0d0bb1602b3fee75c885fe..9d8775f938118f7bdc4f1ffd0c8651f17af769bd 100644
--- a/arch/z80/include/z180/chip.h
+++ b/arch/z80/include/z180/chip.h
@@ -1,6 +1,5 @@
 /****************************************************************************
  * arch/z80/include/z180/chip.h
- * arch/chip/io.h
  *
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/z80/include/z180/inttypes.h b/arch/z80/include/z180/inttypes.h
new file mode 100644
index 0000000000000000000000000000000000000000..efd4cdca2f40998d1a84993b2c000a6dd63e3bd1
--- /dev/null
+++ b/arch/z80/include/z180/inttypes.h
@@ -0,0 +1,212 @@
+/****************************************************************************
+ * arch/z80/include/z180/inttypes.h
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_Z80_INCLUDE_Z180_INTTYPES_H
+#define __ARCH_Z80_INCLUDE_Z180_INTTYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define PRId8       "d"
+#define PRId16      "d"
+#define PRId32      "ld"
+
+#define PRIdLEAST8  "d"
+#define PRIdLEAST16 "d"
+#define PRIdLEAST32 "ld"
+
+#define PRIdFAST8   "d"
+#define PRIdFAST16  "d"
+#define PRIdFAST32  "ld"
+
+#define PRIdMAX     "ld"
+#define PRIdPTR     "d"
+
+#define PRIi8       "i"
+#define PRIi16      "i"
+#define PRIi32      "li"
+
+#define PRIiLEAST8  "i"
+#define PRIiLEAST16 "i"
+#define PRIiLEAST32 "li"
+
+#define PRIiFAST8   "i"
+#define PRIiFAST16  "i"
+#define PRIiFAST32  "li"
+
+#define PRIiMAX     "li"
+#define PRIiPTR     "i"
+
+#define PRIo8       "o"
+#define PRIo16      "o"
+#define PRIo32      "lo"
+
+#define PRIoLEAST8  "o"
+#define PRIoLEAST16 "o"
+#define PRIoLEAST32 "lo"
+
+#define PRIoFAST8   "o"
+#define PRIoFAST16  "o"
+#define PRIoFAST32  "lo"
+
+#define PRIoMAX     "lo"
+#define PRIoPTR     "o"
+
+#define PRIu8       "u"
+#define PRIu16      "u"
+#define PRIu32      "lu"
+
+#define PRIuLEAST8  "u"
+#define PRIuLEAST16 "u"
+#define PRIuLEAST32 "lu"
+
+#define PRIuFAST8   "u"
+#define PRIuFAST16  "u"
+#define PRIuFAST32  "lu"
+
+#define PRIuMAX     "lu"
+#define PRIuPTR     "u"
+
+#define PRIx8       "x"
+#define PRIx16      "x"
+#define PRIx32      "lx"
+
+#define PRIxLEAST8  "x"
+#define PRIxLEAST16 "x"
+#define PRIxLEAST32 "lx"
+
+#define PRIxFAST8   "x"
+#define PRIxFAST16  "x"
+#define PRIxFAST32  "lx"
+
+#define PRIxMAX     "lx"
+#define PRIxPTR     "x"
+
+#define PRIX8       "X"
+#define PRIX16      "X"
+#define PRIX32      "lX"
+
+#define PRIXLEAST8  "X"
+#define PRIXLEAST16 "X"
+#define PRIXLEAST32 "lX"
+
+#define PRIXFAST8   "X"
+#define PRIXFAST16  "X"
+#define PRIXFAST32  "lX"
+
+#define PRIXMAX     "lX"
+#define PRIXPTR     "X"
+
+#define SCNd8       "hhd"
+#define SCNd16      "d"
+#define SCNd32      "ld"
+
+#define SCNdLEAST8  "hhd"
+#define SCNdLEAST16 "d"
+#define SCNdLEAST32 "ld"
+
+#define SCNdFAST8   "hhd"
+#define SCNdFAST16  "d"
+#define SCNdFAST32  "ld"
+
+#define SCNdMAX     "ld"
+#define SCNdPTR     "d"
+
+#define SCNi8       "hhi"
+#define SCNi16      "i"
+#define SCNi32      "li"
+
+#define SCNiLEAST8  "hhi"
+#define SCNiLEAST16 "i"
+#define SCNiLEAST32 "li"
+
+#define SCNiFAST8   "hhi"
+#define SCNiFAST16  "i"
+#define SCNiFAST32  "li"
+
+#define SCNiMAX     "li"
+#define SCNiPTR     "i"
+
+#define SCNo8       "hho"
+#define SCNo16      "o"
+#define SCNo32      "lo"
+
+#define SCNoLEAST8  "hho"
+#define SCNoLEAST16 "o"
+#define SCNoLEAST32 "lo"
+
+#define SCNoFAST8   "hho"
+#define SCNoFAST16  "o"
+#define SCNoFAST32  "lo"
+
+#define SCNoMAX     "lo"
+#define SCNoPTR     "o"
+
+#define SCNu8       "hhu"
+#define SCNu16      "u"
+#define SCNu32      "lu"
+
+#define SCNuLEAST8  "hhu"
+#define SCNuLEAST16 "u"
+#define SCNuLEAST32 "lu"
+
+#define SCNuFAST8   "hhu"
+#define SCNuFAST16  "u"
+#define SCNuFAST32  "lu"
+
+#define SCNuMAX     "lu"
+#define SCNuPTR     "u"
+
+#define SCNx8       "hhx"
+#define SCNx16      "x"
+#define SCNx32      "lx"
+
+#define SCNxLEAST8  "hhx"
+#define SCNxLEAST16 "x"
+#define SCNxLEAST32 "lx"
+
+#define SCNxFAST8   "hhx"
+#define SCNxFAST16  "x"
+#define SCNxFAST32  "lx"
+
+#define SCNxMAX     "lx"
+#define SCNxPTR     "x"
+
+#endif /* __ARCH_Z80_INCLUDE_Z180_INTTYPES_H */
diff --git a/arch/z80/include/z180/io.h b/arch/z80/include/z180/io.h
index 12bf6219e31b3ea8e87242a0c639b5aa8c8316c7..d976b0aa5ed0a3b89ce02b8acacf25e092c3984a 100644
--- a/arch/z80/include/z180/io.h
+++ b/arch/z80/include/z180/io.h
@@ -1,6 +1,5 @@
 /****************************************************************************
  * arch/z80/include/z80/io.h
- * arch/chip/io.h
  *
  *   Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/z80/include/z180/irq.h b/arch/z80/include/z180/irq.h
index ec2dbb7b57354d3b538088617a9882d0257794be..a467a7b307c917243c8347ee1f034c405f27926d 100644
--- a/arch/z80/include/z180/irq.h
+++ b/arch/z80/include/z180/irq.h
@@ -1,6 +1,5 @@
 /****************************************************************************
  * arch/z80/include/z180/irq.h
- * arch/chip/irq.h
  *
  *   Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/z80/include/z180/types.h b/arch/z80/include/z180/types.h
index 39498a9002b6583674cd875a3dfa4271f668299e..16460dca5c26ed7077d61f57933be01a9546cc79 100644
--- a/arch/z80/include/z180/types.h
+++ b/arch/z80/include/z180/types.h
@@ -1,6 +1,5 @@
 /****************************************************************************
  * arch/z80/include/z180/types.h
- * include/arch/chip/types.h
  *
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -38,8 +37,8 @@
  * through sys/types.h
  */
 
-#ifndef __ARC_Z80_INCLUDE_Z180_TYPES_H
-#define __ARC_Z80_INCLUDE_Z180_TYPES_H
+#ifndef __ARCH_Z80_INCLUDE_Z180_TYPES_H
+#define __ARCH_Z80_INCLUDE_Z180_TYPES_H
 
 /****************************************************************************
  * Included Files
@@ -96,4 +95,4 @@ typedef _uint16_t          irqstate_t;
  * Public Function Prototypes
  ****************************************************************************/
 
-#endif /* __ARC_Z80_INCLUDE_Z180_TYPES_H */
+#endif /* __ARCH_Z80_INCLUDE_Z180_TYPES_H */
diff --git a/arch/z80/include/z8/arch.h b/arch/z80/include/z8/arch.h
index 8d913a73499562f036225cd4bcd86570fbfa5459..3d03dea67bdc0fcd701ec6f4bfefaaeeeb51797e 100644
--- a/arch/z80/include/z8/arch.h
+++ b/arch/z80/include/z8/arch.h
@@ -1,6 +1,5 @@
 /****************************************************************************
- * arch/z8/arch.h
- * arch/chip/arch.h
+ * arch/z80/include/z8/arch.h
  *
  *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -38,8 +37,8 @@
  * only indirectly through nuttx/arch.h (via arch/arch.h)
  */
 
-#ifndef __ARCH_Z8_ARCH_H
-#define __ARCH_Z8_ARCH_H
+#ifndef __ARCH_Z80_INCLUDE_Z8_ARCH_H
+#define __ARCH_Z80_INCLUDE_Z8_ARCH_H
 
 /****************************************************************************
  * Included Files
@@ -74,5 +73,5 @@ extern "C"
 }
 #endif
 
-#endif /* __ARCH_Z8_ARCH_H */
+#endif /* __ARCH_Z80_INCLUDE_Z8_ARCH_H */
 
diff --git a/arch/z80/include/z8/inttypes.h b/arch/z80/include/z8/inttypes.h
new file mode 100644
index 0000000000000000000000000000000000000000..9f7eb0a3e42e17dec00055d9c69bf83509d7e7e7
--- /dev/null
+++ b/arch/z80/include/z8/inttypes.h
@@ -0,0 +1,212 @@
+/****************************************************************************
+ * arch/z80/include/z8/inttypes.h
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_Z80_INCLUDE_Z8_INTTYPES_H
+#define __ARCH_Z80_INCLUDE_Z8_INTTYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define PRId8       "d"
+#define PRId16      "d"
+#define PRId32      "ld"
+
+#define PRIdLEAST8  "d"
+#define PRIdLEAST16 "d"
+#define PRIdLEAST32 "ld"
+
+#define PRIdFAST8   "d"
+#define PRIdFAST16  "d"
+#define PRIdFAST32  "ld"
+
+#define PRIdMAX     "ld"
+#define PRIdPTR     "d"
+
+#define PRIi8       "i"
+#define PRIi16      "i"
+#define PRIi32      "li"
+
+#define PRIiLEAST8  "i"
+#define PRIiLEAST16 "i"
+#define PRIiLEAST32 "li"
+
+#define PRIiFAST8   "i"
+#define PRIiFAST16  "i"
+#define PRIiFAST32  "li"
+
+#define PRIiMAX     "li"
+#define PRIiPTR     "i"
+
+#define PRIo8       "o"
+#define PRIo16      "o"
+#define PRIo32      "lo"
+
+#define PRIoLEAST8  "o"
+#define PRIoLEAST16 "o"
+#define PRIoLEAST32 "lo"
+
+#define PRIoFAST8   "o"
+#define PRIoFAST16  "o"
+#define PRIoFAST32  "lo"
+
+#define PRIoMAX     "lo"
+#define PRIoPTR     "o"
+
+#define PRIu8       "u"
+#define PRIu16      "u"
+#define PRIu32      "lu"
+
+#define PRIuLEAST8  "u"
+#define PRIuLEAST16 "u"
+#define PRIuLEAST32 "lu"
+
+#define PRIuFAST8   "u"
+#define PRIuFAST16  "u"
+#define PRIuFAST32  "lu"
+
+#define PRIuMAX     "lu"
+#define PRIuPTR     "u"
+
+#define PRIx8       "x"
+#define PRIx16      "x"
+#define PRIx32      "lx"
+
+#define PRIxLEAST8  "x"
+#define PRIxLEAST16 "x"
+#define PRIxLEAST32 "lx"
+
+#define PRIxFAST8   "x"
+#define PRIxFAST16  "x"
+#define PRIxFAST32  "lx"
+
+#define PRIxMAX     "lx"
+#define PRIxPTR     "x"
+
+#define PRIX8       "X"
+#define PRIX16      "X"
+#define PRIX32      "lX"
+
+#define PRIXLEAST8  "X"
+#define PRIXLEAST16 "X"
+#define PRIXLEAST32 "lX"
+
+#define PRIXFAST8   "X"
+#define PRIXFAST16  "X"
+#define PRIXFAST32  "lX"
+
+#define PRIXMAX     "lX"
+#define PRIXPTR     "X"
+
+#define SCNd8       "hhd"
+#define SCNd16      "d"
+#define SCNd32      "ld"
+
+#define SCNdLEAST8  "hhd"
+#define SCNdLEAST16 "d"
+#define SCNdLEAST32 "ld"
+
+#define SCNdFAST8   "hhd"
+#define SCNdFAST16  "d"
+#define SCNdFAST32  "ld"
+
+#define SCNdMAX     "ld"
+#define SCNdPTR     "d"
+
+#define SCNi8       "hhi"
+#define SCNi16      "i"
+#define SCNi32      "li"
+
+#define SCNiLEAST8  "hhi"
+#define SCNiLEAST16 "i"
+#define SCNiLEAST32 "li"
+
+#define SCNiFAST8   "hhi"
+#define SCNiFAST16  "i"
+#define SCNiFAST32  "li"
+
+#define SCNiMAX     "li"
+#define SCNiPTR     "i"
+
+#define SCNo8       "hho"
+#define SCNo16      "o"
+#define SCNo32      "lo"
+
+#define SCNoLEAST8  "hho"
+#define SCNoLEAST16 "o"
+#define SCNoLEAST32 "lo"
+
+#define SCNoFAST8   "hho"
+#define SCNoFAST16  "o"
+#define SCNoFAST32  "lo"
+
+#define SCNoMAX     "lo"
+#define SCNoPTR     "o"
+
+#define SCNu8       "hhu"
+#define SCNu16      "u"
+#define SCNu32      "lu"
+
+#define SCNuLEAST8  "hhu"
+#define SCNuLEAST16 "u"
+#define SCNuLEAST32 "lu"
+
+#define SCNuFAST8   "hhu"
+#define SCNuFAST16  "u"
+#define SCNuFAST32  "lu"
+
+#define SCNuMAX     "lu"
+#define SCNuPTR     "u"
+
+#define SCNx8       "hhx"
+#define SCNx16      "x"
+#define SCNx32      "lx"
+
+#define SCNxLEAST8  "hhx"
+#define SCNxLEAST16 "x"
+#define SCNxLEAST32 "lx"
+
+#define SCNxFAST8   "hhx"
+#define SCNxFAST16  "x"
+#define SCNxFAST32  "lx"
+
+#define SCNxMAX     "lx"
+#define SCNxPTR     "x"
+
+#endif /* __ARCH_Z80_INCLUDE_Z8_INTTYPES_H */
diff --git a/arch/z80/include/z8/irq.h b/arch/z80/include/z8/irq.h
index 7088234f6b5b9ccec3a4d8ec08804e41b11520e8..10693fd517c66ca8623e31c546162170448f0f43 100644
--- a/arch/z80/include/z8/irq.h
+++ b/arch/z80/include/z8/irq.h
@@ -1,6 +1,5 @@
 /****************************************************************************
- * arch/z8/include/z8/irq.h
- * arch/chip/irq.h
+ * arch/z80/include/z8/irq.h
  *
  *   Copyright (C) 2008-2009, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -38,8 +37,8 @@
  * only indirectly through nuttx/irq.h (via arch/irq.h)
  */
 
-#ifndef __ARCH_Z8_IRQ_H
-#define __ARCH_Z8_IRQ_H
+#ifndef __ARCH_Z80_INCLUDE_Z8_IRQ_H
+#define __ARCH_Z80_INCLUDE_Z8_IRQ_H
 
 /****************************************************************************
  * Included Files
@@ -374,5 +373,5 @@ void up_irq_restore(irqstate_t flags);
 #endif
 #endif
 
-#endif /* __ARCH_Z8_IRQ_H */
+#endif /* __ARCH_Z80_INCLUDE_Z8_IRQ_H */
 
diff --git a/arch/z80/include/z8/types.h b/arch/z80/include/z8/types.h
index 4c66f56871027e858b6f453a2cf3f3a1c6d99622..01e642cc6dda10c08e562693219b44b531d64d35 100644
--- a/arch/z80/include/z8/types.h
+++ b/arch/z80/include/z8/types.h
@@ -1,6 +1,5 @@
 /****************************************************************************
  * arch/z80/include/z8/types.h
- * include/arch/chip/types.h
  *
  *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/z80/include/z80/arch.h b/arch/z80/include/z80/arch.h
index d40c84b4d67977ebb1afb52de5dc4954330358be..b3aebc5ca0eea1e13f18aff0633598c8798c3bfa 100644
--- a/arch/z80/include/z80/arch.h
+++ b/arch/z80/include/z80/arch.h
@@ -1,6 +1,5 @@
 /****************************************************************************
- * arch/z80/arch.h
- * arch/chip/arch.h
+ * arch/z80/include/arch.h
  *
  *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/z80/include/z80/inttypes.h b/arch/z80/include/z80/inttypes.h
new file mode 100644
index 0000000000000000000000000000000000000000..b8c3964355de4d3c8e7caab4ae31493cd1c9b4c1
--- /dev/null
+++ b/arch/z80/include/z80/inttypes.h
@@ -0,0 +1,212 @@
+/****************************************************************************
+ * arch/z80/include/z80/inttypes.h
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_Z80_INCLUDE_Z80_INTTYPES_H
+#define __ARCH_Z80_INCLUDE_Z80_INTTYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define PRId8       "d"
+#define PRId16      "d"
+#define PRId32      "ld"
+
+#define PRIdLEAST8  "d"
+#define PRIdLEAST16 "d"
+#define PRIdLEAST32 "ld"
+
+#define PRIdFAST8   "d"
+#define PRIdFAST16  "d"
+#define PRIdFAST32  "ld"
+
+#define PRIdMAX     "ld"
+#define PRIdPTR     "d"
+
+#define PRIi8       "i"
+#define PRIi16      "i"
+#define PRIi32      "li"
+
+#define PRIiLEAST8  "i"
+#define PRIiLEAST16 "i"
+#define PRIiLEAST32 "li"
+
+#define PRIiFAST8   "i"
+#define PRIiFAST16  "i"
+#define PRIiFAST32  "li"
+
+#define PRIiMAX     "li"
+#define PRIiPTR     "i"
+
+#define PRIo8       "o"
+#define PRIo16      "o"
+#define PRIo32      "lo"
+
+#define PRIoLEAST8  "o"
+#define PRIoLEAST16 "o"
+#define PRIoLEAST32 "lo"
+
+#define PRIoFAST8   "o"
+#define PRIoFAST16  "o"
+#define PRIoFAST32  "lo"
+
+#define PRIoMAX     "lo"
+#define PRIoPTR     "o"
+
+#define PRIu8       "u"
+#define PRIu16      "u"
+#define PRIu32      "lu"
+
+#define PRIuLEAST8  "u"
+#define PRIuLEAST16 "u"
+#define PRIuLEAST32 "lu"
+
+#define PRIuFAST8   "u"
+#define PRIuFAST16  "u"
+#define PRIuFAST32  "lu"
+
+#define PRIuMAX     "lu"
+#define PRIuPTR     "u"
+
+#define PRIx8       "x"
+#define PRIx16      "x"
+#define PRIx32      "lx"
+
+#define PRIxLEAST8  "x"
+#define PRIxLEAST16 "x"
+#define PRIxLEAST32 "lx"
+
+#define PRIxFAST8   "x"
+#define PRIxFAST16  "x"
+#define PRIxFAST32  "lx"
+
+#define PRIxMAX     "lx"
+#define PRIxPTR     "x"
+
+#define PRIX8       "X"
+#define PRIX16      "X"
+#define PRIX32      "lX"
+
+#define PRIXLEAST8  "X"
+#define PRIXLEAST16 "X"
+#define PRIXLEAST32 "lX"
+
+#define PRIXFAST8   "X"
+#define PRIXFAST16  "X"
+#define PRIXFAST32  "lX"
+
+#define PRIXMAX     "lX"
+#define PRIXPTR     "X"
+
+#define SCNd8       "hhd"
+#define SCNd16      "d"
+#define SCNd32      "ld"
+
+#define SCNdLEAST8  "hhd"
+#define SCNdLEAST16 "d"
+#define SCNdLEAST32 "ld"
+
+#define SCNdFAST8   "hhd"
+#define SCNdFAST16  "d"
+#define SCNdFAST32  "ld"
+
+#define SCNdMAX     "ld"
+#define SCNdPTR     "d"
+
+#define SCNi8       "hhi"
+#define SCNi16      "i"
+#define SCNi32      "li"
+
+#define SCNiLEAST8  "hhi"
+#define SCNiLEAST16 "i"
+#define SCNiLEAST32 "li"
+
+#define SCNiFAST8   "hhi"
+#define SCNiFAST16  "i"
+#define SCNiFAST32  "li"
+
+#define SCNiMAX     "li"
+#define SCNiPTR     "i"
+
+#define SCNo8       "hho"
+#define SCNo16      "o"
+#define SCNo32      "lo"
+
+#define SCNoLEAST8  "hho"
+#define SCNoLEAST16 "o"
+#define SCNoLEAST32 "lo"
+
+#define SCNoFAST8   "hho"
+#define SCNoFAST16  "o"
+#define SCNoFAST32  "lo"
+
+#define SCNoMAX     "lo"
+#define SCNoPTR     "o"
+
+#define SCNu8       "hhu"
+#define SCNu16      "u"
+#define SCNu32      "lu"
+
+#define SCNuLEAST8  "hhu"
+#define SCNuLEAST16 "u"
+#define SCNuLEAST32 "lu"
+
+#define SCNuFAST8   "hhu"
+#define SCNuFAST16  "u"
+#define SCNuFAST32  "lu"
+
+#define SCNuMAX     "lu"
+#define SCNuPTR     "u"
+
+#define SCNx8       "hhx"
+#define SCNx16      "x"
+#define SCNx32      "lx"
+
+#define SCNxLEAST8  "hhx"
+#define SCNxLEAST16 "x"
+#define SCNxLEAST32 "lx"
+
+#define SCNxFAST8   "hhx"
+#define SCNxFAST16  "x"
+#define SCNxFAST32  "lx"
+
+#define SCNxMAX     "lx"
+#define SCNxPTR     "x"
+
+#endif /* __ARCH_Z80_INCLUDE_Z80_INTTYPES_H */
diff --git a/arch/z80/include/z80/io.h b/arch/z80/include/z80/io.h
index e8545a719cc92b5c86692a675bad16d1cd5a6885..d69381d1343b8c2456f012a1309f05e5d4ae9d4e 100644
--- a/arch/z80/include/z80/io.h
+++ b/arch/z80/include/z80/io.h
@@ -1,6 +1,5 @@
 /****************************************************************************
  * arch/z80/include/z80/io.h
- * arch/chip/io.h
  *
  *   Copyright (C) 2008-2009, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/z80/include/z80/irq.h b/arch/z80/include/z80/irq.h
index 020c777a1c6f0dedc86125195d4516c5343c09e9..9a88a8084d1781925167cd3f9ed6854eb6170af5 100644
--- a/arch/z80/include/z80/irq.h
+++ b/arch/z80/include/z80/irq.h
@@ -1,6 +1,5 @@
 /****************************************************************************
  * arch/z80/include/z80/irq.h
- * arch/chip/irq.h
  *
  *   Copyright (C) 2007-2009, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/z80/include/z80/types.h b/arch/z80/include/z80/types.h
index 4d6d8ed5b1168bd2ebb2087ba0ec772d5d8a278a..ecf2cc4132b1ceb0ad2bda7ac58942b18da58487 100644
--- a/arch/z80/include/z80/types.h
+++ b/arch/z80/include/z80/types.h
@@ -1,6 +1,5 @@
 /****************************************************************************
  * arch/z80/include/z80/types.h
- * include/arch/chip/types.h
  *
  *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -38,8 +37,8 @@
  * through sys/types.h
  */
 
-#ifndef __ARC_Z80_INCLUDE_Z80_TYPES_H
-#define __ARC_Z80_INCLUDE_Z80_TYPES_H
+#ifndef __ARCH_Z80_INCLUDE_Z80_TYPES_H
+#define __ARCH_Z80_INCLUDE_Z80_TYPES_H
 
 /****************************************************************************
  * Included Files
@@ -96,4 +95,4 @@ typedef _uint16_t          irqstate_t;
  * Public Function Prototypes
  ****************************************************************************/
 
-#endif /* __ARC_Z80_INCLUDE_Z80_TYPES_H */
+#endif /* __ARCH_Z80_INCLUDE_Z80_TYPES_H */
diff --git a/arch/z80/src/common/up_allocateheap.c b/arch/z80/src/common/up_allocateheap.c
index 7ea677c5f943271732d70ffbefa93c8b3df0c5d2..818739cedab715d5cd4bcc715cf0b414ced1210d 100644
--- a/arch/z80/src/common/up_allocateheap.c
+++ b/arch/z80/src/common/up_allocateheap.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_allocateheap.c
+ * arch/z80/src/common/up_allocateheap.c
  *
  *   Copyright (C) 2007, 2008, 2013, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/z80/src/common/up_assert.c b/arch/z80/src/common/up_assert.c
index 78e114d35d9e476ca8bf9cfc488e11c03e357817..8a2765af90da4398bbcabc19cf3f7887a57aa0e6 100644
--- a/arch/z80/src/common/up_assert.c
+++ b/arch/z80/src/common/up_assert.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * common/up_assert.c
+ * arch/z80/src/common/up_assert.c
  *
- *   Copyright (C) 2007-2009, 2012-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2012-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
 
 #include 
 
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef  CONFIG_DEBUG
-# undef  CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
 #include 
 #include 
 #include 
@@ -75,10 +64,6 @@
 #  undef CONFIG_ARCH_USBDUMP
 #endif
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -123,7 +108,7 @@ static int usbtrace_syslog(FAR const char *fmt, ...)
   /* Let vsyslog do the real work */
 
   va_start(ap, fmt);
-  ret = lowvsyslog(LOG_INFO, fmt, ap);
+  ret = vsyslog(LOG_EMERG, fmt, ap);
   va_end(ap);
   return ret;
 }
@@ -149,7 +134,7 @@ void up_assert(const uint8_t *filename, int lineno)
 void up_assert(void)
 #endif
 {
-#if CONFIG_TASK_NAME_SIZE > 0
+#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
   struct tcb_s *rtcb = this_task();
 #endif
 
@@ -157,17 +142,17 @@ void up_assert(void)
 
 #ifdef CONFIG_HAVE_FILENAME
 #if CONFIG_TASK_NAME_SIZE > 0
-  lldbg("Assertion failed at file:%s line: %d task: %s\n",
+  _alert("Assertion failed at file:%s line: %d task: %s\n",
         filename, lineno, rtcb->name);
 #else
-  lldbg("Assertion failed at file:%s line: %d\n",
+  _alert("Assertion failed at file:%s line: %d\n",
         filename, lineno);
 #endif
 #else
 #if CONFIG_TASK_NAME_SIZE > 0
-  lldbg("Assertion failed: task: %s\n", rtcb->name);
+  _alert("Assertion failed: task: %s\n", rtcb->name);
 #else
-  lldbg("Assertion failed\n");
+  _alert("Assertion failed\n");
 #endif
 #endif
 
diff --git a/arch/z80/src/common/up_blocktask.c b/arch/z80/src/common/up_blocktask.c
index 831de41317d39ce12bd7e3a29c0c268fc0045397..a4aa7b8ed507c28b6f84b03dd56cd6e9445ea59a 100644
--- a/arch/z80/src/common/up_blocktask.c
+++ b/arch/z80/src/common/up_blocktask.c
@@ -85,7 +85,7 @@ void up_block_task(FAR struct tcb_s *tcb, tstate_t task_state)
   ASSERT((tcb->task_state >= FIRST_READY_TO_RUN_STATE) &&
          (tcb->task_state <= LAST_READY_TO_RUN_STATE));
 
-  /* dbg("Blocking TCB=%p\n", tcb); */
+  /* _info("Blocking TCB=%p\n", tcb); */
 
   /* Remove the tcb task from the ready-to-run list.  If we
    * are blocking the task at the head of the task list (the
diff --git a/arch/z80/src/common/up_createstack.c b/arch/z80/src/common/up_createstack.c
index 60c4733d99e232d2f91f07d594591530975f15ae..a0a2bc2507d029d3a0fd996d2736c10e2b466171 100644
--- a/arch/z80/src/common/up_createstack.c
+++ b/arch/z80/src/common/up_createstack.c
@@ -137,12 +137,12 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
           tcb->stack_alloc_ptr = (uint32_t *)kumm_malloc(stack_size);
         }
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       /* Was the allocation successful? */
 
       if (!tcb->stack_alloc_ptr)
         {
-          sdbg("ERROR: Failed to allocate stack, size %d\n", stack_size);
+          serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
         }
 #endif
     }
diff --git a/arch/z80/src/common/up_doirq.c b/arch/z80/src/common/up_doirq.c
index 30e2caf9fd1489b5fe2f2b82e7192119a8ed5883..878594a126c811cf0816658b48c25aece48f5180 100644
--- a/arch/z80/src/common/up_doirq.c
+++ b/arch/z80/src/common/up_doirq.c
@@ -78,8 +78,8 @@ FAR chipreg_t *up_doirq(uint8_t irq, FAR chipreg_t *regs)
 
 #ifdef CONFIG_SUPPRESS_INTERRUPTS
 
-  lowsyslog(LOG_ERR, "Unexpected IRQ\n");
   IRQ_ENTER(regs);
+  err("ERROR: Unexpected IRQ\n");
   PANIC();
   return NULL; /* Won't get here */
 
diff --git a/arch/z80/src/common/up_exit.c b/arch/z80/src/common/up_exit.c
index 82f647c18c99aaea4edb441214eeb43e328dd805..af42e69ce9a35b338933d5bb4b0e5e791b8caaf9 100644
--- a/arch/z80/src/common/up_exit.c
+++ b/arch/z80/src/common/up_exit.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * common/up_exit.c
+ * arch/z80/src/common/up_exit.c
  *
- *   Copyright (C) 2007-2009, 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2013-2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -44,9 +44,9 @@
 #include 
 
 #include 
-
+#include 
 #ifdef CONFIG_DUMP_ON_EXIT
-#include 
+#  include 
 #endif
 
 #include "chip/chip.h"
@@ -59,9 +59,9 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
+#ifndef CONFIG_DEBUG_SCHED_INFO
+#  undef CONFIG_DUMP_ON_EXIT
+#endif
 
 /****************************************************************************
  * Private Functions
@@ -77,7 +77,7 @@
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
+#ifdef CONFIG_DUMP_ON_EXIT
 static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
 {
 #if CONFIG_NFILE_DESCRIPTORS > 0
@@ -88,8 +88,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
   int i;
 #endif
 
-  lldbg("  TCB=%p name=%s\n", tcb, tcb->argv[0]);
-  lldbg("    priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
+  sinfo("  TCB=%p name=%s\n", tcb, tcb->argv[0]);
+  sinfo("    priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
 
 #if CONFIG_NFILE_DESCRIPTORS > 0
   filelist = tcb->group->tg_filelist;
@@ -98,7 +98,7 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
       struct inode *inode = filelist->fl_files[i].f_inode;
       if (inode)
         {
-          lldbg("      fd=%d refcount=%d\n",
+          sinfo("      fd=%d refcount=%d\n",
                 i, inode->i_crefs);
         }
     }
@@ -111,13 +111,18 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
       struct file_struct *filep = &streamlist->sl_streams[i];
       if (filep->fs_fd >= 0)
         {
-#if CONFIG_STDIO_BUFFER_SIZE > 0
-          lldbg("      fd=%d nbytes=%d\n",
-                filep->fs_fd,
-                filep->fs_bufpos - filep->fs_bufstart);
-#else
-          lldbg("      fd=%d\n", filep->fs_fd);
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
+          if (filep->fs_bufstart != NULL)
+            {
+              sinfo("      fd=%d nbytes=%d\n",
+                    filep->fs_fd,
+                    filep->fs_bufpos - filep->fs_bufstart);
+            }
+          else
 #endif
+            {
+              sinfo("      fd=%d\n", filep->fs_fd);
+            }
         }
     }
 #endif
@@ -143,16 +148,16 @@ void _exit(int status)
 {
   FAR struct tcb_s* tcb;
 
-  /* Disable interrupts.  Interrupts will remain disabled until
-   * the new task is resumed below.
+  /* Make sure that we are in a critical section with local interrupts.
+   * The IRQ state will be restored when the next task is started.
    */
 
-  (void)up_irq_save();
+  (void)enter_critical_section();
 
-  slldbg("TCB=%p exiting\n", tcb);
+  sinfo("TCB=%p exiting\n", tcb);
 
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
-  lldbg("Other tasks:\n");
+#ifdef CONFIG_DUMP_ON_EXIT
+  sinfo("Other tasks:\n");
   sched_foreach(_up_dumponexit, NULL);
 #endif
 
@@ -165,7 +170,7 @@ void _exit(int status)
    */
 
   tcb = this_task();
-  slldbg("New Active Task TCB=%p\n", tcb);
+  sinfo("New Active Task TCB=%p\n", tcb);
 
 #ifdef CONFIG_ARCH_ADDRENV
   /* Make sure that the address environment for the previously running
diff --git a/arch/z80/src/common/up_idle.c b/arch/z80/src/common/up_idle.c
index 43deca5aa0f7cbfa73008c624126d061038a1e57..7d18a454f830dbe6c85330d0c79c823a45aa831a 100644
--- a/arch/z80/src/common/up_idle.c
+++ b/arch/z80/src/common/up_idle.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_idle.c
+ * arch/z80/src/common/up_idle.c
  *
  *   Copyright (C) 2007-2009, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/z80/src/common/up_initialize.c b/arch/z80/src/common/up_initialize.c
index 218a78232663302543378c313a897da7d681c701..036ce03b3775d02821234f954a6e3d0059066606 100644
--- a/arch/z80/src/common/up_initialize.c
+++ b/arch/z80/src/common/up_initialize.c
@@ -44,11 +44,15 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
-#include 
+#include 
+#include 
+#include 
+#include 
+#include 
 
 #include 
 
@@ -70,18 +74,18 @@
  *
  ****************************************************************************/
 
-#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG_FEATURES)
 static void up_calibratedelay(void)
 {
   int i;
 
-  lldbg("Beginning 100s delay\n");
+  _warn("Beginning 100s delay\n");
   for (i = 0; i < 100; i++)
     {
       up_mdelay(1000);
     }
 
-  lldbg("End 100s delay\n");
+  _warn("End 100s delay\n");
 }
 #else
 # define up_calibratedelay()
@@ -118,9 +122,9 @@ void up_initialize(void)
 
   up_calibratedelay();
 
+#if CONFIG_MM_REGIONS > 1
   /* Add any extra memory fragments to the memory manager */
 
-#if CONFIG_MM_REGIONS > 1
   up_addregion();
 #endif
 
@@ -128,10 +132,20 @@ void up_initialize(void)
 
   up_irqinitialize();
 
-  /* Initialize the system timer interrupt */
+#ifdef CONFIG_PM
+  /* Initialize the power management subsystem.  This MCU-specific function
+   * must be called *very* early in the initialization sequence *before* any
+   * other device drivers are initialized (since they may attempt to register
+   * with the power management subsystem).
+   */
+
+  up_pminitialize();
+#endif
 
 #if !defined(CONFIG_SUPPRESS_INTERRUPTS) && !defined(CONFIG_SUPPRESS_TIMER_INTS)
-  up_timer_initialize();
+  /* Initialize the system timer interrupt */
+
+  z80_timer_initialize();
 #endif
 
   /* Initialize the CPU for those that use it (only for the Z180).  This
@@ -150,6 +164,14 @@ void up_initialize(void)
   devnull_register();   /* Standard /dev/null */
 #endif
 
+#if defined(CONFIG_DEV_RANDOM)
+  devrandom_register(); /* Standard /dev/random */
+#endif
+
+#if defined(CONFIG_DEV_URANDOM)
+  devurandom_register();   /* Standard /dev/urandom */
+#endif
+
 #if defined(CONFIG_DEV_ZERO)
   devzero_register();   /* Standard /dev/zero */
 #endif
@@ -176,12 +198,35 @@ void up_initialize(void)
 
 #if defined(CONFIG_DEV_LOWCONSOLE)
   lowconsole_init();
-#elif defined(CONFIG_SYSLOG_CONSOLE)
+#elif defined(CONFIG_CONSOLE_SYSLOG)
   syslog_console_init();
 #elif defined(CONFIG_RAMLOG_CONSOLE)
   ramlog_consoleinit();
 #endif
 
+#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_PSEUDOTERM_SUSV1)
+  /* Register the master pseudo-terminal multiplexor device */
+
+  (void)ptmx_register();
+#endif
+
+  /* Early initialization of the system logging device.  Some SYSLOG channel
+   * can be initialized early in the initialization sequence because they
+   * depend on minimal OS initialization.
+   */
+
+  syslog_initialize(SYSLOG_INIT_EARLY);
+
+#if defined(CONFIG_CRYPTO)
+  /* Initialize the HW crypto and /dev/crypto */
+
+  up_cryptoinitialize();
+#endif
+
+#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_CRYPTO_CRYPTODEV)
+  devcrypto_register();
+#endif
+
 #ifndef CONFIG_NETDEV_LATEINIT
   /* Initialize the network */
 
diff --git a/arch/z80/src/common/up_internal.h b/arch/z80/src/common/up_internal.h
index 76deaa34b7b7d4b0a993236713b85ca39a3371f1..d12d8373415b6b0c2ef356e13bd5be0bbf5b8544 100644
--- a/arch/z80/src/common/up_internal.h
+++ b/arch/z80/src/common/up_internal.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/z80/src/common/up_internal.h
  *
- *   Copyright (C) 2007-2009, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -51,6 +51,10 @@
 #undef  CONFIG_SUPPRESS_UART_CONFIG   /* Do not reconfig UART */
 #undef  CONFIG_DUMP_ON_EXIT           /* Dump task state on exit */
 
+#ifndef CONFIG_DEBUG_SCHED_INFO
+#  undef CONFIG_DUMP_ON_EXIT          /* Needs CONFIG_DEBUG_SCHED_INFO */
+#endif
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -88,7 +92,7 @@
 #  if defined(CONFIG_RAMLOG_CONSOLE)
 #    undef  USE_SERIALDRIVER
 #    undef  CONFIG_DEV_LOWCONSOLE
-#  elif defined(CONFIG_SYSLOG_CONSOLE)
+#  elif defined(CONFIG_CONSOLE_SYSLOG)
 #    undef  USE_SERIALDRIVER
 #    undef  CONFIG_DEV_LOWCONSOLE
 #  elif defined(CONFIG_DEV_LOWCONSOLE)
@@ -129,7 +133,6 @@ extern "C"
 /* Supplied by chip- or board-specific logic */
 
 void up_irqinitialize(void);
-int  up_timerisr(int irq, FAR chipreg_t *regs);
 
 #ifdef USE_LOWSERIALINIT
 void up_lowserialinit(void);
@@ -139,7 +142,7 @@ void up_lowserialinit(void);
 
 FAR chipreg_t *up_doirq(uint8_t irq, FAR chipreg_t *regs);
 
-/* Define in up_sigdeliver */
+/* Define in zyz_sigdeliver */
 
 void up_sigdeliver(void);
 
@@ -149,13 +152,13 @@ void up_sigdeliver(void);
 int up_mmuinit(void);
 #endif
 
-/* Defined in up_allocateheap.c */
+/* Defined in xyz_allocateheap.c */
 
 #if CONFIG_MM_REGIONS > 1
 void up_addregion(void);
 #endif
 
-/* Defined in up_serial.c */
+/* Defined in xyz_serial.c */
 
 #ifdef USE_SERIALDRIVER
 void up_serialinit(void);
@@ -173,7 +176,7 @@ void lowconsole_init(void);
 
 /* Defined in drivers/syslog_console.c */
 
-#ifdef CONFIG_SYSLOG_CONSOLE
+#ifdef CONFIG_CONSOLE_SYSLOG
 void syslog_console_init();
 #else
 # define syslog_console_init()
@@ -191,9 +194,9 @@ void ramlog_consoleinit(void);
 
 void up_puts(const char *str);
 
-/* Defined in up_timerisr.c */
+/* Defined in xyz_timerisr.c */
 
-void up_timer_initialize(void);
+void z80_timer_initialize(void);
 
 /* Architecture specific hook into the timer interrupt handler */
 
diff --git a/arch/z80/src/common/up_mdelay.c b/arch/z80/src/common/up_mdelay.c
index 607ce484538540521c9c3a8b55cabf9c8a7de0d4..24566b93e3c9df1e55ed8646d83995308f6737d3 100644
--- a/arch/z80/src/common/up_mdelay.c
+++ b/arch/z80/src/common/up_mdelay.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_mdelay.c
+ * arch/z80/src/common/up_mdelay.c
  *
  *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/z80/src/common/up_releasepending.c b/arch/z80/src/common/up_releasepending.c
index e4bc07a78fb7d9522f3ed8387d5dcce3324c67ef..3a3974863f7dac3d06d71f83ed403e22da2f5c43 100644
--- a/arch/z80/src/common/up_releasepending.c
+++ b/arch/z80/src/common/up_releasepending.c
@@ -70,7 +70,7 @@ void up_release_pending(void)
 {
   FAR struct tcb_s *rtcb = this_task();
 
-  slldbg("From TCB=%p\n", rtcb);
+  sinfo("From TCB=%p\n", rtcb);
 
   /* Merge the g_pendingtasks list into the ready-to-run task list */
 
diff --git a/arch/z80/src/common/up_releasestack.c b/arch/z80/src/common/up_releasestack.c
index 63b55720306d27ee4adbb0b6dc28f905bfd6cbef..31237a3ee669a3750855fb37b1a6e5bbd2b36be3 100644
--- a/arch/z80/src/common/up_releasestack.c
+++ b/arch/z80/src/common/up_releasestack.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_releasestack.c
+ * arch/z80/src/common/up_releasestack.c
  *
  *   Copyright (C) 2007-2009, 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/z80/src/common/up_reprioritizertr.c b/arch/z80/src/common/up_reprioritizertr.c
index d7102775631a35b569c4e6550ec0855a759c981c..12c4bcef99c1a96e9aa1eaca7e746ca3b711458d 100644
--- a/arch/z80/src/common/up_reprioritizertr.c
+++ b/arch/z80/src/common/up_reprioritizertr.c
@@ -98,7 +98,7 @@ void up_reprioritize_rtr(FAR struct tcb_s *tcb, uint8_t priority)
       FAR struct tcb_s *rtcb = this_task();
       bool switch_needed;
 
-      slldbg("TCB=%p PRI=%d\n", tcb, priority);
+      sinfo("TCB=%p PRI=%d\n", tcb, priority);
 
       /* Remove the tcb task from the ready-to-run list.
        * sched_removereadytorun will return true if we just
diff --git a/arch/z80/src/common/up_stackdump.c b/arch/z80/src/common/up_stackdump.c
index 32a3fc68302cad1f05cde59fb9c2ba9bd41f8b9a..ccb8cbd8ddd0b70f413cea347bdd18031a15c59a 100644
--- a/arch/z80/src/common/up_stackdump.c
+++ b/arch/z80/src/common/up_stackdump.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * common/up_stackdump.c
+ * arch/z80/src/common/up_stackdump.c
  *
- *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,13 +39,6 @@
 
 #include 
 
-/* Output debug info -- even if debug is not selected. */
-
-#undef  CONFIG_DEBUG
-#undef  CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
 #include 
 #include 
 
@@ -55,14 +48,6 @@
 
 #ifdef CONFIG_ARCH_STACKDUMP
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -83,13 +68,13 @@ static void up_stackdump(void)
   uint16_t stack_base = (uint16_t)rtcb->adj_stack_ptr;
   uint16_t stack_size = (uint16_t)rtcb->adj_stack_size;
 
-  lldbg("stack_base: %04x\n", stack_base);
-  lldbg("stack_size: %04x\n", stack_size);
-  lldbg("sp:         %04x\n", sp);
+  _alert("stack_base: %04x\n", stack_base);
+  _alert("stack_size: %04x\n", stack_size);
+  _alert("sp:         %04x\n", sp);
 
   if (sp >= stack_base || sp < stack_base - stack_size)
     {
-      lldbg("ERROR: Stack pointer is not within allocated stack\n");
+      _alert("ERROR: Stack pointer is not within allocated stack\n");
       return;
     }
   else
@@ -99,9 +84,9 @@ static void up_stackdump(void)
       for (stack = sp & ~0x0f; stack < stack_base; stack += 8*sizeof(uint16_t))
         {
           uint16_t *ptr = (uint16_t*)stack;
-          lldbg("%04x: %04x %04x %04x %04x %04x %04x %04x %04x\n",
-                 stack, ptr[0], ptr[1], ptr[2], ptr[3],
-                 ptr[4], ptr[5], ptr[6], ptr[7]);
+          _alert("%04x: %04x %04x %04x %04x %04x %04x %04x %04x\n",
+                stack, ptr[0], ptr[1], ptr[2], ptr[3],
+                ptr[4], ptr[5], ptr[6], ptr[7]);
         }
     }
 }
diff --git a/arch/z80/src/common/up_stackframe.c b/arch/z80/src/common/up_stackframe.c
index 9da978a4f7d41b2a4598310012b25233012b849c..8f4a0f180623672827930602707ca523647bce2a 100644
--- a/arch/z80/src/common/up_stackframe.c
+++ b/arch/z80/src/common/up_stackframe.c
@@ -63,14 +63,6 @@
 #define STACK_ALIGN_DOWN(a) ((a) & ~STACK_ALIGN_MASK)
 #define STACK_ALIGN_UP(a)   (((a) + STACK_ALIGN_MASK) & ~STACK_ALIGN_MASK)
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/arch/z80/src/common/up_udelay.c b/arch/z80/src/common/up_udelay.c
index be5224a20d2690ec96b39cb395f272c268aebed5..85a1494b2fa3df6cec14a8a149935129b41602d7 100644
--- a/arch/z80/src/common/up_udelay.c
+++ b/arch/z80/src/common/up_udelay.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * common/up_udelay.c
+ * arch/z80/src/common/up_udelay.c
  *
  *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/z80/src/common/up_unblocktask.c b/arch/z80/src/common/up_unblocktask.c
index f110172052b5c3043cfd696e7e5749f29864fcde..3539ef404d9214010f5465198b4143bc69a4bd45 100644
--- a/arch/z80/src/common/up_unblocktask.c
+++ b/arch/z80/src/common/up_unblocktask.c
@@ -81,7 +81,7 @@ void up_unblock_task(FAR struct tcb_s *tcb)
   ASSERT((tcb->task_state >= FIRST_BLOCKED_STATE) &&
          (tcb->task_state <= LAST_BLOCKED_STATE));
 
-  /* dbg("Unblocking TCB=%p\n", tcb); */
+  /* _info("Unblocking TCB=%p\n", tcb); */
 
   /* Remove the task from the blocked task list */
 
diff --git a/arch/z80/src/ez80/Kconfig b/arch/z80/src/ez80/Kconfig
index 7529e2c7adc79f5704b166f3817611ed8613620b..759160a512f72289b947df285b05e6e9cda26dec 100644
--- a/arch/z80/src/ez80/Kconfig
+++ b/arch/z80/src/ez80/Kconfig
@@ -117,6 +117,26 @@ config ARCH_MCFILTER
 	---help---
 		Enables multicast MAC address filtering (not fully implemented)
 
+choice
+	prompt "Work queue"
+	default EZ80_EMAC_LPWORK if SCHED_LPWORK
+	default EZ80_EMAC_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the Ethernet driver.  If the
+		low priority work queue is available, then it should be used by the
+		driver.
+
+config EZ80_EMAC_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
+
+config EZ80_EMAC_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
+
+endchoice # Work queue
+
 endif # EZ80_EMAC
 
 config ARCH_TIMERHOOK
diff --git a/arch/z80/src/ez80/Make.defs b/arch/z80/src/ez80/Make.defs
index 7e79e19d657b2854fe71e1ca3d05e89b24018e0f..5b4defd8e78247228be8ddef4e006a20d5ee6034 100644
--- a/arch/z80/src/ez80/Make.defs
+++ b/arch/z80/src/ez80/Make.defs
@@ -44,7 +44,7 @@ CMN_CSRCS += up_reprioritizertr.c up_idle.c up_assert.c up_doirq.c
 CMN_CSRCS += up_mdelay.c up_stackframe.c up_udelay.c up_usestack.c
 CMN_CSRCS += up_puts.c
 
-CHIP_ASRCS  = ez80_startup.asm ez80_io.asm ez80_up_irq_save.asm
+CHIP_ASRCS  = ez80_startup.asm ez80_io.asm ez80_irqsave.asm
 CHIP_ASRCS += ez80_saveusercontext.asm ez80_restorecontext.asm
 ifeq ($(CONFIG_ARCH_CHIP_EZ80F91),y)
 CHIP_ASRCS += ez80f91_init.asm
diff --git a/arch/z80/src/ez80/ez80_emac.c b/arch/z80/src/ez80/ez80_emac.c
index 0584aa0464d6bbe62017d3145f48379cb7d42d01..5da9255416a027627496d8723a5e0410e526848e 100644
--- a/arch/z80/src/ez80/ez80_emac.c
+++ b/arch/z80/src/ez80/ez80_emac.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * drivers/net/ez80_emac.c
+ * arch/z80/src/ez80/ez80_emac.c
  *
- *   Copyright (C) 2009-2010, 2012, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009-2010, 2012, 2014-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * References:
@@ -56,6 +56,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -75,6 +76,25 @@
 
 /* Configuration ************************************************************/
 
+/* If processing is not done at the interrupt level, then work queue support
+ * is required.
+ */
+
+#if !defined(CONFIG_SCHED_WORKQUEUE)
+#  error Work queue support is required in this configuration (CONFIG_SCHED_WORKQUEUE)
+#else
+
+  /* Use the low priority work queue if possible */
+
+#  if defined(CONFIG_EZ80_EMAC_HPWORK)
+#    define ETHWORK HPWORK
+#  elif defined(CONFIG_EZ80_EMAC_LPWORK)
+#    define ETHWORK LPWORK
+#  else
+#    error Neither CONFIG_EZ80_EMAC_HPWORK nor CONFIG_EZ80_EMAC_LPWORK defined
+#  endif
+#endif
+
 #ifndef CONFIG_EZ80_RAMADDR
 #  define CONFIG_EZ80_RAMADDR EZ80_EMACSRAM
 #endif
@@ -244,7 +264,7 @@
 
 /* EMAC statistics (debug only) */
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_NET)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_NET)
 struct ez80mac_statistics_s
 {
   uint32_t rx_int;         /* Number of Rx interrupts received */
@@ -321,7 +341,11 @@ struct ez80emac_driver_s
   WDOG_ID txpoll;           /* TX poll timer */
   WDOG_ID txtimeout;        /* TX timeout timer */
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_NET)
+  struct work_s txwork;     /* For deferring Tx-related work to the work queue */
+  struct work_s rxwork;     /* For deferring Rx-related work to the work queue */
+  struct work_s syswork;    /* For deferring system work to the work queue */
+
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_NET)
   struct ez80mac_statistics_s stat;
 #endif
 
@@ -334,6 +358,10 @@ struct ez80emac_driver_s
  * Private Data
  ****************************************************************************/
 
+/* A single packet buffer is used */
+
+static uint8_t g_pktbuf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
+
 /* There is only a single instance of driver private data (because there is
  * only one EMAC interface.
  */
@@ -371,20 +399,31 @@ static int  ez80emac_receive(struct ez80emac_driver_s *priv);
 
 /* Interrupt handling */
 
-static int  ez80emac_txinterrupt(int irq, FAR void *context);
-static int  ez80emac_rxinterrupt(int irq, FAR void *context);
-static int  ez80emac_sysinterrupt(int irq, FAR void *context);
+static void ez80emac_txinterrupt_work(FAR void *arg);
+static int  ez80emac_txinterrupt(int irq, FAR void *context, FAR void *arg);
+
+static void ez80emac_rxinterrupt_work(FAR void *arg);
+static int  ez80emac_rxinterrupt(int irq, FAR void *context, FAR void *arg);
+
+static void ez80emac_sysinterrupt_work(FAR void *arg);
+static int  ez80emac_sysinterrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
-static void ez80emac_polltimer(int argc, uint32_t arg, ...);
-static void ez80emac_txtimeout(int argc, uint32_t arg, ...);
+static void ez80emac_txtimeout_work(FAR void *arg);
+static void ez80emac_txtimeout_expiry(int argc, uint32_t arg, ...);
+
+static void ez80emac_poll_work(FAR void *arg);
+static void ez80emac_poll_expiry(int argc, uint32_t arg, ...);
 
 /* NuttX callback functions */
 
 static int  ez80emac_ifup(struct net_driver_s *dev);
 static int  ez80emac_ifdown(struct net_driver_s *dev);
+
+static void ez80emac_txavail_work(FAR void *arg);
 static int  ez80emac_txavail(struct net_driver_s *dev);
+
 #ifdef CONFIG_NET_IGMP
 static int ez80emac_addmac(struct net_driver_s *dev, FAR const uint8_t *mac);
 static int ez80emac_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac);
@@ -574,11 +613,11 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
 
   /* Verify that the detect PHY is an AMD Am87c874 as expected */
 
-#ifdef CONFIG_DEBUG /* Parameter checking only done when DEBUG is enabled */
+#ifdef CONFIG_DEBUG_FEATURES /* Parameter checking only done when DEBUG is enabled */
   phyval = ez80emac_miiread(priv, MII_PHYID1);
   if (phyval != MII_PHYID1_AM79C874)
     {
-      ndbg("Not an Am79c874 PHY: PHY1=%04x vs %04x\n", phyval, MII_PHYID1_AM79C874);
+      nerr("ERROR: Not an Am79c874 PHY: PHY1=%04x vs %04x\n", phyval, MII_PHYID1_AM79C874);
       ret = -ENODEV;
       goto dumpregs;
     }
@@ -586,7 +625,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
   phyval = ez80emac_miiread(priv, MII_PHYID2);
   if (phyval != MII_PHYID2_AM79C874)
     {
-      ndbg("Not an Am79c874 PHY: PHY2=%04x vs %04x\n", phyval, MII_PHYID2_AM79C874);
+      nerr("ERROR: Not an Am79c874 PHY: PHY2=%04x vs %04x\n", phyval, MII_PHYID2_AM79C874);
       ret = -ENODEV;
       goto dumpregs;
     }
@@ -618,7 +657,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
 
 #if CONFIG_EZ80_PHYCONFIG == EZ80_EMAC_AUTONEG
 
-   ndbg("Configure autonegotiation\n");
+   ninfo("Configure autonegotiation\n");
    if (bauto)
     {
       ez80emac_miiwrite(priv, MII_ADVERTISE,
@@ -628,12 +667,12 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
     }
   else
     {
-      ndbg("Am79c784 is not capable of autonegotiation\n");
+      nerr("ERROR: Am79c784 is not capable of autonegotiation\n");
     }
 
 #elif CONFIG_EZ80_PHYCONFIG == EZ80_EMAC_100BFD
 
-  ndbg("100BASETX full duplex\n");
+  ninfo("100BASETX full duplex\n");
   phyval |= MII_MCR_SPEED100 | MII_MCR_FULLDPLX;
   ez80emac_miiwrite(priv, MII_ADVERTISE,
                     MII_ADVERTISE_100BASETXFULL|MII_ADVERTISE_100BASETXHALF|
@@ -642,7 +681,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
 
 #elif CONFIG_EZ80_PHYCONFIG == EZ80_EMAC_100BHD
 
-  ndbg("100BASETX half duplex\n");
+  ninfo("100BASETX half duplex\n");
   phyval |= MII_MCR_SPEED100;
   ez80emac_miiwrite(priv, MII_ADVERTISE,
                     MII_ADVERTISE_100BASETXHALF|MII_ADVERTISE_10BASETXFULL|
@@ -650,14 +689,14 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
 
 #elif CONFIG_EZ80_PHYCONFIG == EZ80_EMAC_10BFD
 
-  ndbg("10BASETX full duplex\n");
+  ninfo("10BASETX full duplex\n");
   phyval |= MII_MCR_FULLDPLX;
   ez80emac_miiwrite(priv, MII_ADVERTISE,
                     MII_ADVERTISE_10BASETXFULL|MII_ADVERTISE_10BASETXHALF|MII_ADVERTISE_CSMA);
 
 #elif CONFIG_EZ80_PHYCONFIG == EZ80_EMAC_10BHD
 
-  ndbg("10BASETX half duplex\n");
+  ninfo("10BASETX half duplex\n");
   ez80emac_miiwrite(priv, MII_ADVERTISE,
                     MII_ADVERTISE_10BASETXHALF|MII_ADVERTISE_CSMA);
 
@@ -681,7 +720,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
 
   if ((phyval & MII_MSR_LINKSTATUS) == 0)
     {
-      ndbg("Failed to establish link\n");
+      nerr("ERROR: Failed to establish link\n");
       ret = -ETIMEDOUT;
     }
   else
@@ -700,16 +739,16 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
     }
 
 dumpregs:
-  nvdbg("Am79c874 MII registers (FIAD=%lx)\n", CONFIG_EZ80_FIAD);
-  nvdbg("  MII_MCR:         %04x\n", ez80emac_miiread(priv, MII_MCR));
-  nvdbg("  MII_MSR:         %04x\n", ez80emac_miiread(priv, MII_MSR));
-  nvdbg("  MII_PHYID1:      %04x\n", ez80emac_miiread(priv, MII_PHYID1));
-  nvdbg("  MII_PHYID2:      %04x\n", ez80emac_miiread(priv, MII_PHYID2));
-  nvdbg("  MII_ADVERTISE:   %04x\n", ez80emac_miiread(priv, MII_ADVERTISE));
-  nvdbg("  MII_LPA:         %04x\n", ez80emac_miiread(priv, MII_LPA));
-  nvdbg("  MII_EXPANSION:   %04x\n", ez80emac_miiread(priv, MII_EXPANSION));
-  nvdbg("  MII_DIAGNOSTICS: %04x\n", ez80emac_miiread(priv, MII_AM79C874_DIAGNOSTIC));
-  nvdbg("EMAC CFG1:         %02x\n", inp(EZ80_EMAC_CFG1));
+  ninfo("Am79c874 MII registers (FIAD=%lx)\n", CONFIG_EZ80_FIAD);
+  ninfo("  MII_MCR:         %04x\n", ez80emac_miiread(priv, MII_MCR));
+  ninfo("  MII_MSR:         %04x\n", ez80emac_miiread(priv, MII_MSR));
+  ninfo("  MII_PHYID1:      %04x\n", ez80emac_miiread(priv, MII_PHYID1));
+  ninfo("  MII_PHYID2:      %04x\n", ez80emac_miiread(priv, MII_PHYID2));
+  ninfo("  MII_ADVERTISE:   %04x\n", ez80emac_miiread(priv, MII_ADVERTISE));
+  ninfo("  MII_LPA:         %04x\n", ez80emac_miiread(priv, MII_LPA));
+  ninfo("  MII_EXPANSION:   %04x\n", ez80emac_miiread(priv, MII_EXPANSION));
+  ninfo("  MII_DIAGNOSTICS: %04x\n", ez80emac_miiread(priv, MII_AM79C874_DIAGNOSTIC));
+  ninfo("EMAC CFG1:         %02x\n", inp(EZ80_EMAC_CFG1));
   return ret;
 }
 #else
@@ -731,21 +770,21 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
 
   if (!ez80emac_miipoll(priv, MII_MCR, MII_MCR_ANRESTART, false))
     {
-      ndbg("Autonegotiation didn't start.\n");
+      nerr("ERROR: Autonegotiation didn't start.\n");
     }
 
   /* Wait for auto-negotiation to complete */
 
   if (!ez80emac_miipoll(priv, MII_MSR, MII_MSR_ANEGCOMPLETE, true))
     {
-      ndbg("Autonegotiation didn't complete.\n");
+      nerr("ERROR: Autonegotiation didn't complete.\n");
     }
 
   /* Wait link */
 
   if (!ez80emac_miipoll(priv, MII_MSR, MII_MSR_LINKSTATUS, true))
     {
-      ndbg("Link is down!\n");
+      nwarn("WARNING: Link is down!\n");
       priv->blinkok = false;
     }
   else
@@ -763,7 +802,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
 
   if ((advertise & MII_ADVERTISE_100BASETXFULL) && (lpa & MII_LPA_100BASETXFULL))
     {
-      ndbg("100BASETX full duplex\n");
+      ninfo("100BASETX full duplex\n");
       regval            = inp(EZ80_EMAC_CFG1);
       regval           |= EMAC_CFG1_FULLHD; /* Enable full duplex mode */
       outp(EZ80_EMAC_CFG1, regval);
@@ -775,7 +814,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
 
   else if ((advertise & MII_ADVERTISE_100BASETXHALF) && (lpa & MII_LPA_100BASETXHALF))
     {
-      ndbg("100BASETX half duplex\n");
+      ninfo("100BASETX half duplex\n");
       regval            = inp(EZ80_EMAC_CFG1);
       regval           &= ~EMAC_CFG1_FULLHD; /* Disable full duplex mode */
       outp(EZ80_EMAC_CFG1, regval);
@@ -787,7 +826,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
 
   else if ((advertise & MII_ADVERTISE_10BASETXFULL) && (lpa & MII_LPA_10BASETXFULL))
     {
-      ndbg("10BASETX full duplex\n");
+      ninfo("10BASETX full duplex\n");
       regval            = inp(EZ80_EMAC_CFG1);
       regval           |= EMAC_CFG1_FULLHD; /* Enable full duplex mode */
       outp(EZ80_EMAC_CFG1, regval);
@@ -799,7 +838,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
 
   else if ((advertise & MII_ADVERTISE_10BASETXHALF) && (lpa & MII_LPA_10BASETXHALF))
     {
-      ndbg("10BASETX half duplex\n");
+      ninfo("10BASETX half duplex\n");
       regval            = inp(EZ80_EMAC_CFG1);
       regval           &= ~EMAC_CFG1_FULLHD; /* Disable full duplex mode */
       outp(EZ80_EMAC_CFG1, regval);
@@ -808,7 +847,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
     }
   else
     {
-      ndbg("No valid connection; force 10Mbps half-duplex.\n");
+      nwarn("WARNING: No valid connection; force 10Mbps half-duplex.\n");
       regval            = inp(EZ80_EMAC_CFG1);
       regval           &= ~EMAC_CFG1_FULLHD; /* Disable full duplex mode */
       outp(EZ80_EMAC_CFG1, regval);
@@ -838,15 +877,15 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
   mcr |= MII_MCR_ANENABLE;
   ez80emac_miiwrite(priv, MII_MCR, mcr);
 
-  nvdbg("MII registers (FIAD=%lx)\n", CONFIG_EZ80_FIAD);
-  nvdbg("  MII_MCR:       %04x\n", ez80emac_miiread(priv, MII_MCR));
-  nvdbg("  MII_MSR:       %04x\n", ez80emac_miiread(priv, MII_MSR));
-  nvdbg("  MII_PHYID1:    %04x\n", ez80emac_miiread(priv, MII_PHYID1));
-  nvdbg("  MII_PHYID2:    %04x\n", ez80emac_miiread(priv, MII_PHYID2));
-  nvdbg("  MII_ADVERTISE: %04x\n", ez80emac_miiread(priv, MII_ADVERTISE));
-  nvdbg("  MII_LPA:       %04x\n", ez80emac_miiread(priv, MII_LPA));
-  nvdbg("  MII_EXPANSION: %04x\n", ez80emac_miiread(priv, MII_EXPANSION));
-  nvdbg("EMAC CFG1:         %02x\n", inp(EZ80_EMAC_CFG11));
+  ninfo("MII registers (FIAD=%lx)\n", CONFIG_EZ80_FIAD);
+  ninfo("  MII_MCR:       %04x\n", ez80emac_miiread(priv, MII_MCR));
+  ninfo("  MII_MSR:       %04x\n", ez80emac_miiread(priv, MII_MSR));
+  ninfo("  MII_PHYID1:    %04x\n", ez80emac_miiread(priv, MII_PHYID1));
+  ninfo("  MII_PHYID2:    %04x\n", ez80emac_miiread(priv, MII_PHYID2));
+  ninfo("  MII_ADVERTISE: %04x\n", ez80emac_miiread(priv, MII_ADVERTISE));
+  ninfo("  MII_LPA:       %04x\n", ez80emac_miiread(priv, MII_LPA));
+  ninfo("  MII_EXPANSION: %04x\n", ez80emac_miiread(priv, MII_EXPANSION));
+  ninfo("EMAC CFG1:         %02x\n", inp(EZ80_EMAC_CFG11));
   return OK;
 }
 #endif
@@ -960,9 +999,9 @@ static int ez80emac_transmit(struct ez80emac_driver_s *priv)
    * handler and, therefore, may be suspended when debug output is generated!
    */
 
-  nllvdbg("txnext=%p {%06x, %u, %04x} trp=%02x%02x\n",
-          priv->txnext, priv->txnext->np, priv->txnext->pktsize, priv->txnext->stat,
-          inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L));
+  ninfo("txnext=%p {%06x, %u, %04x} trp=%02x%02x\n",
+        priv->txnext, priv->txnext->np, priv->txnext->pktsize, priv->txnext->stat,
+        inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L));
 
   /* Increment statistics */
 
@@ -1039,15 +1078,16 @@ static int ez80emac_transmit(struct ez80emac_driver_s *priv)
   outp(EZ80_EMAC_PTMR, EMAC_PTMR);
   leave_critical_section(flags);
 
-  nllvdbg("txdesc=%p {%06x, %u, %04x}\n",
-          txdesc, txdesc->np, txdesc->pktsize, txdesc->stat);
-  nllvdbg("txnext=%p {%06x, %u, %04x} trp=%02x%02x\n",
-          txnext, txnext->np, txnext->pktsize, txnext->stat,
-          inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L));
+  ninfo("txdesc=%p {%06x, %u, %04x}\n",
+        txdesc, txdesc->np, txdesc->pktsize, txdesc->stat);
+  ninfo("txnext=%p {%06x, %u, %04x} trp=%02x%02x\n",
+        txnext, txnext->np, txnext->pktsize, txnext->stat,
+        inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L));
 
   /* Setup the TX timeout watchdog (perhaps restarting the timer) */
 
-  (void)wd_start(priv->txtimeout, EMAC_TXTIMEOUT, ez80emac_txtimeout, 1, (uint32_t)priv);
+  (void)wd_start(priv->txtimeout, EMAC_TXTIMEOUT,
+                 ez80emac_txtimeout_expiry, 1, (uint32_t)priv);
   return OK;
 }
 
@@ -1082,7 +1122,7 @@ static int ez80emac_txpoll(struct net_driver_s *dev)
    * the field d_len is set to a value > 0.
    */
 
-  nvdbg("Poll result: d_len=%d\n", priv->dev.d_len);
+  ninfo("Poll result: d_len=%d\n", priv->dev.d_len);
   if (priv->dev.d_len > 0)
     {
       /* Look up the destination MAC address and add it to the Ethernet
@@ -1197,7 +1237,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
    */
 
   rwp = ez80emac_rwp();
-  nvdbg("rxnext=%p {%06x, %u, %04x} rrp=%06x rwp=%06x blkslft=%02x\n",
+  ninfo("rxnext=%p {%06x, %u, %04x} rrp=%06x rwp=%06x blkslft=%02x\n",
         rxdesc, rxdesc->np, rxdesc->pktsize, rxdesc->stat,
         ez80emac_rrp(), rwp,
         inp(EZ80_EMAC_BLKSLFT_H), inp(EZ80_EMAC_BLKSLFT_L));
@@ -1222,7 +1262,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
 
       if ((rxdesc->stat & EMAC_RXDESC_OK) == 0)
         {
-          nvdbg("Skipping bad RX pkt: %04x\n", rxdesc->stat);
+          ninfo("Skipping bad RX pkt: %04x\n", rxdesc->stat);
           EMAC_STAT(priv, rx_errors);
           EMAC_STAT(priv, rx_nok);
           continue;
@@ -1234,7 +1274,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
 
       if (rxdesc->pktsize > CONFIG_NET_ETH_MTU)
         {
-          nvdbg("Truncated oversize RX pkt: %d->%d\n", rxdesc->pktsize, CONFIG_NET_ETH_MTU);
+          ninfo("Truncated oversize RX pkt: %d->%d\n", rxdesc->pktsize, CONFIG_NET_ETH_MTU);
           pktlen = CONFIG_NET_ETH_MTU;
         }
       else
@@ -1252,7 +1292,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
      if ((FAR uint8_t*)(psrc + pktlen) > (FAR uint8_t*)priv->rxendp1)
         {
           int nbytes = (int)((FAR uint8_t*)priv->rxendp1 - (FAR uint8_t*)psrc);
-          nvdbg("RX wraps after %d bytes\n", nbytes + SIZEOF_EMACSDESC);
+          ninfo("RX wraps after %d bytes\n", nbytes + SIZEOF_EMACSDESC);
 
           memcpy(pdest, psrc, nbytes);
           memcpy(&pdest[nbytes], priv->rxstart, pktlen - nbytes);
@@ -1288,7 +1328,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
       outp(EZ80_EMAC_RRP_L, (uint8_t)((uint24_t)rxdesc & 0xff));
       outp(EZ80_EMAC_RRP_H, (uint8_t)(((uint24_t)rxdesc >> 8) & 0xff));
 
-      nvdbg("rxnext=%p {%06x, %u, %04x} rrp=%06x rwp=%06x blkslft=%02x\n",
+      ninfo("rxnext=%p {%06x, %u, %04x} rrp=%06x rwp=%06x blkslft=%02x\n",
             rxdesc, rxdesc->np, rxdesc->pktsize, rxdesc->stat,
             ez80emac_rrp(), rwp,
             inp(EZ80_EMAC_BLKSLFT_H), inp(EZ80_EMAC_BLKSLFT_L));
@@ -1304,7 +1344,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
 #ifdef CONFIG_NET_IPv4
       if (ETHBUF->type == HTONS(ETHTYPE_IP))
         {
-          nllvdbg("IPv4 frame\n");
+          ninfo("IPv4 frame\n");
 
           /* Handle ARP on input then give the IPv4 packet to the network
            * layer
@@ -1345,7 +1385,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
 #ifdef CONFIG_NET_IPv6
       if (ETHBUF->type == HTONS(ETHTYPE_IP6))
         {
-          nllvdbg("Iv6 frame\n");
+          ninfo("Iv6 frame\n");
 
           /* Give the IPv6 packet to the network layer */
 
@@ -1383,7 +1423,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
 #ifdef CONFIG_NET_ARP
       if (ETHBUF->type == htons(ETHTYPE_ARP))
         {
-          nvdbg("ARP packet received (%02x)\n", ETHBUF->type);
+          ninfo("ARP packet received (%02x)\n", ETHBUF->type);
           EMAC_STAT(priv, rx_arp);
 
           arp_arpin(&priv->dev);
@@ -1400,7 +1440,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
       else
 #endif
         {
-          ndbg("Unsupported packet type dropped (%02x)\n", ETHBUF->type);
+          ninfo("Unsupported packet type dropped (%02x)\n", ETHBUF->type);
           EMAC_STAT(priv, rx_dropped);
         }
 
@@ -1410,27 +1450,33 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
 }
 
 /****************************************************************************
- * Function: ez80emac_txinterrupt
+ * Function: ez80emac_txinterrupt_work
  *
  * Description:
- *   Process Rx-related interrupt events
+ *   Perform Tx interrupt related work from the worker thread
  *
  * Parameters:
- *   priv  - Driver data instance
- *   istat - Snapshot of ISTAT register containing Rx events to provess
+ *   arg - The argument passed when work_queue() was called.
  *
  * Returned Value:
- *  None
+ *   OK on success
+ *
+ * Assumptions:
+ *   The network is locked.
  *
  ****************************************************************************/
 
-static int ez80emac_txinterrupt(int irq, FAR void *context)
+static void ez80emac_txinterrupt_work(FAR void *arg)
 {
-  FAR struct ez80emac_driver_s *priv = &g_emac;
+  FAR struct ez80emac_driver_s *priv = (FAR struct ez80emac_driver_s *)arg;
   FAR struct ez80emac_desc_s *txhead = priv->txhead;
   uint8_t regval;
   uint8_t istat;
 
+  /* Process pending Ethernet Tx interrupts */
+
+  net_lock();
+
   /* EMAC Tx interrupts:
    *
    * EMAC_ISTAT_TXDONE   - Bit 0: 1=Transmit done interrupt
@@ -1448,7 +1494,7 @@ static int ez80emac_txinterrupt(int irq, FAR void *context)
 
   /* All events are packet/control frame transmit complete events */
 
-  nvdbg("txhead=%p {%06x, %u, %04x} trp=%02x%02x istat=%02x\n",
+  ninfo("txhead=%p {%06x, %u, %04x} trp=%02x%02x istat=%02x\n",
         txhead, txhead->np, txhead->pktsize, txhead->stat,
         inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L), istat);
 
@@ -1458,9 +1504,9 @@ static int ez80emac_txinterrupt(int irq, FAR void *context)
     {
       if ((txhead->stat & EMAC_TXDESC_ABORT) != 0)
         {
-          ndbg("Descriptor %p aborted {%06x, %u, %04x} trp=%02x%02x\n",
-               txhead, txhead->np, txhead->pktsize, txhead->stat,
-               inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L));
+          nwarn("WARNING: Descriptor %p aborted {%06x, %u, %04x} trp=%02x%02x\n",
+                txhead, txhead->np, txhead->pktsize, txhead->stat,
+                inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L));
 
           EMAC_STAT(priv, tx_errors);
           EMAC_STAT(priv, tx_abterrors);
@@ -1471,7 +1517,7 @@ static int ez80emac_txinterrupt(int irq, FAR void *context)
       txhead = (FAR struct ez80emac_desc_s *)txhead->np;
       if (txhead)
         {
-          nvdbg("txhead=%p {%06x, %u, %04x} trp=%02x%02x\n",
+          ninfo("txhead=%p {%06x, %u, %04x} trp=%02x%02x\n",
                 txhead, txhead->np, txhead->pktsize, txhead->stat,
                 inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L));
         }
@@ -1484,7 +1530,7 @@ static int ez80emac_txinterrupt(int irq, FAR void *context)
   priv->txhead = txhead;
   if (!priv->txhead)
     {
-      nvdbg("No pending Tx.. Stopping XMIT function.\n");
+      ninfo("No pending Tx.. Stopping XMIT function.\n");
 
       /* Stop the Tx poll timer. (It will get restarted when we have
        * something to send
@@ -1511,29 +1557,88 @@ static int ez80emac_txinterrupt(int irq, FAR void *context)
       wd_cancel(priv->txtimeout);
     }
 
+  net_unlock();
+
+  /* Re-enable Ethernet Tx interrupts */
+
+  up_enable_irq(EZ80_EMACRX_IRQ);
+}
+
+/****************************************************************************
+ * Function: ez80emac_txinterrupt
+ *
+ * Description:
+ *   Process Tx-related interrupt events
+ *
+ * Parameters:
+ *   irq     - Number of the IRQ that generated the interrupt
+ *   context - Interrupt register state save info (architecture-specific)
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *
+ ****************************************************************************/
+
+static int ez80emac_txinterrupt(int irq, FAR void *context, FAR void *arg)
+{
+  FAR struct ez80emac_driver_s *priv = &g_emac;
+  uint8_t istat;
+
+  /* Disable further Ethernet Tx interrupts.  Because Ethernet interrupts are
+   * also disabled if the TX timeout event occurs, there can be no race
+   * condition here.
+   */
+
+  up_disable_irq(EZ80_EMACTX_IRQ);
+
+  /* Determine if a TX transfer just completed */
+
+  istat = inp(EZ80_EMAC_ISTAT);
+  if ((istat & EMAC_ISTAT_TXDONE) != 0)
+    {
+      /* If a TX transfer just completed, then cancel the TX timeout so
+       * there will be no race condition between any subsequent timeout
+       * expiration and the deferred interrupt processing.
+       */
+
+       wd_cancel(priv->txtimeout);
+    }
+
+  /* Schedule to perform the Tx interrupt processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->txwork, ez80emac_txinterrupt_work, priv, 0);
+
   return OK;
 }
 
 /****************************************************************************
- * Function: ez80emac_rxinterrupt
+ * Function: ez80emac_rxinterrupt_work
  *
  * Description:
- *   Process Rx-related interrupt events
+ *   Perform Rx interrupt related work from the worker thread
  *
  * Parameters:
- *   priv  - Driver data instance
- *   istat - Snapshot of ISTAT register containing Rx events to provess
+ *   arg - The argument passed when work_queue() was called.
  *
  * Returned Value:
- *   None
+ *   OK on success
+ *
+ * Assumptions:
+ *   The network is locked.
  *
  ****************************************************************************/
 
-static int ez80emac_rxinterrupt(int irq, FAR void *context)
+static void ez80emac_rxinterrupt_work(FAR void *arg)
 {
-  FAR struct ez80emac_driver_s *priv   = &g_emac;
+  FAR struct ez80emac_driver_s *priv = (FAR struct ez80emac_driver_s *)arg;
   uint8_t  istat;
 
+  /* Process pending Ethernet Rx interrupts */
+
+  net_lock();
+
   /* EMAC Rx interrupts:
    *
    * EMAC_ISTAT_RXDONE   - Bit 3: 1=Receive done interrupt
@@ -1554,14 +1659,18 @@ static int ez80emac_rxinterrupt(int irq, FAR void *context)
   /* Process any RX packets pending the RX buffer */
 
   (void)ez80emac_receive(priv);
-  return OK;
+  net_unlock();
+
+  /* Re-enable Ethernet Rx interrupts */
+
+  up_enable_irq(EZ80_EMACRX_IRQ);
 }
 
 /****************************************************************************
- * Function: ez80emac_sysinterrupt
+ * Function: ez80emac_rxinterrupt
  *
  * Description:
- *   Hardware interrupt handler
+ *   Process Rx-related interrupt events
  *
  * Parameters:
  *   irq     - Number of the IRQ that generated the interrupt
@@ -1574,12 +1683,50 @@ static int ez80emac_rxinterrupt(int irq, FAR void *context)
  *
  ****************************************************************************/
 
-static int ez80emac_sysinterrupt(int irq, FAR void *context)
+static int ez80emac_rxinterrupt(int irq, FAR void *context, FAR void *arg)
 {
   FAR struct ez80emac_driver_s *priv = &g_emac;
+
+  /* Disable further Ethernet Rx interrupts.  Because Ethernet interrupts are
+   * also disabled if the TX timeout event occurs, there can be no race
+   * condition here.
+   */
+
+  up_disable_irq(EZ80_EMACRX_IRQ);
+
+  /* Schedule to perform the Rx interrupt processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->rxwork,  ez80emac_rxinterrupt_work, priv, 0);
+  return OK;
+}
+
+/****************************************************************************
+ * Function: ez80emac_sysinterrupt_work
+ *
+ * Description:
+ *   Perform system interrupt related work from the worker thread
+ *
+ * Parameters:
+ *   arg - The argument passed when work_queue() was called.
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *   The network is locked.
+ *
+ ****************************************************************************/
+
+static void ez80emac_sysinterrupt_work(FAR void *arg)
+{
+  FAR struct ez80emac_driver_s *priv = (FAR struct ez80emac_driver_s *)arg;
   uint8_t events;
   uint8_t istat;
 
+  /* Process pending system interrupts */
+
+  net_lock();
+
   /* EMAC system interrupts :
    *
    * EMAC_ISTAT_TXFSMERR - Bit 7: 1=Transmit state machine error interrupt
@@ -1604,7 +1751,7 @@ static int ez80emac_sysinterrupt(int irq, FAR void *context)
 
   if ((istat & EMAC_ISTAT_TXFSMERR) != 0)
     {
-      ndbg("Tx FSMERR txhead=%p {%06x, %u, %04x} trp=%02x%02x istat=%02x\n",
+      nwarn("WARNING: Tx FSMERR txhead=%p {%06x, %u, %04x} trp=%02x%02x istat=%02x\n",
            priv->txhead, priv->txhead->np, priv->txhead->pktsize, priv->txhead->stat,
            inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L), istat);
 
@@ -1620,7 +1767,7 @@ static int ez80emac_sysinterrupt(int irq, FAR void *context)
 
   if ((istat & EMAC_ISTAT_RXOVR) != 0)
     {
-      ndbg("Rx OVR rxnext=%p {%06x, %u, %04x} rrp=%02x%02x rwp=%02x%02x blkslft=%02x istat=%02x\n",
+      nwarn("WARNING: Rx OVR rxnext=%p {%06x, %u, %04x} rrp=%02x%02x rwp=%02x%02x blkslft=%02x istat=%02x\n",
            priv->rxnext, priv->rxnext->np, priv->rxnext->pktsize, priv->rxnext->stat,
            inp(EZ80_EMAC_RRP_H), inp(EZ80_EMAC_RRP_L),
            inp(EZ80_EMAC_RWP_H), inp(EZ80_EMAC_RWP_L),
@@ -1632,32 +1779,74 @@ static int ez80emac_sysinterrupt(int irq, FAR void *context)
       EMAC_STAT(priv, rx_errors);
       EMAC_STAT(priv, rx_ovrerrors);
     }
+
+  net_unlock();
+
+  /* Re-enable Ethernet system interrupts */
+
+  up_enable_irq(EZ80_EMACSYS_IRQ);
+}
+
+/****************************************************************************
+ * Function: ez80emac_sysinterrupt
+ *
+ * Description:
+ *   System interrupt handler
+ *
+ * Parameters:
+ *   irq     - Number of the IRQ that generated the interrupt
+ *   context - Interrupt register state save info (architecture-specific)
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *
+ ****************************************************************************/
+
+static int ez80emac_sysinterrupt(int irq, FAR void *context, FAR void *arg)
+{
+  FAR struct ez80emac_driver_s *priv = &g_emac;
+
+  /* Disable further Ethernet interrupts.  Because Ethernet interrupts are
+   * also disabled if the TX timeout event occurs, there can be no race
+   * condition here.
+   */
+
+  up_disable_irq(EZ80_EMACSYS_IRQ);
+
+  /* Schedule to perform the interrupt processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->syswork,  ez80emac_sysinterrupt_work, priv, 0);
   return OK;
 }
 
 /****************************************************************************
- * Function: ez80emac_txtimeout
+ * Function: ez80emac_txtimeout_work
  *
  * Description:
- *   Our TX watchdog timed out.  Called from the timer interrupt handler.
- *   The last TX never completed.  Reset the hardware and start again.
+ *   Perform TX timeout related work from the worker thread
  *
  * Parameters:
- *   argc - The number of available arguments
- *   arg  - The first argument
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
+ *   The network is locked.
  *
  ****************************************************************************/
 
-static void ez80emac_txtimeout(int argc, uint32_t arg, ...)
+static void ez80emac_txtimeout_work(FAR void *arg)
 {
   FAR struct ez80emac_driver_s *priv = (FAR struct ez80emac_driver_s *)arg;
   irqstate_t flags;
 
+  /* Process pending Ethernet interrupts */
+
+  net_lock();
+
   /* Increment statistics and dump debug info */
 
   EMAC_STAT(priv, tx_errors);
@@ -1673,13 +1862,15 @@ static void ez80emac_txtimeout(int argc, uint32_t arg, ...)
   /* Then poll the network for new XMIT data */
 
   (void)devif_poll(&priv->dev, ez80emac_txpoll);
+  net_unlock();
 }
 
 /****************************************************************************
- * Function: ez80emac_polltimer
+ * Function: ez80emac_txtimeout_expiry
  *
  * Description:
- *   Periodic timer handler.  Called from the timer interrupt handler.
+ *   Our TX watchdog timed out.  Called from the timer interrupt handler.
+ *   The last TX never completed.  Reset the hardware and start again.
  *
  * Parameters:
  *   argc - The number of available arguments
@@ -1689,20 +1880,99 @@ static void ez80emac_txtimeout(int argc, uint32_t arg, ...)
  *   None
  *
  * Assumptions:
+ *   Global interrupts are disabled by the watchdog logic.
+ *
+ ****************************************************************************/
+
+static void ez80emac_txtimeout_expiry(int argc, wdparm_t arg, ...)
+{
+  FAR struct ez80emac_driver_s *priv = (FAR struct ez80emac_driver_s *)arg;
+
+  /* Disable further Ethernet Tx interrupts.  This will prevent some race
+   * conditions with interrupt work.  There is still a potential race
+   * condition with interrupt work that is already queued and in progress.
+   */
+
+  up_disable_irq(EZ80_EMACTX_IRQ);
+
+  /* Schedule to perform the TX timeout processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->txwork, ez80emac_txtimeout_work, priv, 0);
+}
+
+/****************************************************************************
+ * Function: ez80emac_poll_work
+ *
+ * Description:
+ *   Perform periodic polling from the worker thread
+ *
+ * Parameters:
+ *   arg - The argument passed when work_queue() as called.
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *   The network is locked.
  *
  ****************************************************************************/
 
-static void ez80emac_polltimer(int argc, uint32_t arg, ...)
+static void ez80emac_poll_work(FAR void *arg)
 {
-  struct ez80emac_driver_s *priv = (struct ez80emac_driver_s *)arg;
+  FAR struct ez80emac_driver_s *priv = (FAR struct ez80emac_driver_s *)arg;
 
   /* Poll the network for new XMIT data */
 
+  net_lock();
   (void)devif_timer(&priv->dev, ez80emac_txpoll);
 
   /* Setup the watchdog poll timer again */
 
-  (void)wd_start(priv->txpoll, EMAC_WDDELAY, ez80emac_polltimer, 1, arg);
+  (void)wd_start(priv->txpoll, EMAC_WDDELAY, ez80emac_poll_expiry, 1, priv);
+  net_unlock();
+}
+
+/****************************************************************************
+ * Function: ez80emac_poll_expiry
+ *
+ * Description:
+ *   Periodic timer handler.  Called from the timer interrupt handler.
+ *
+ * Parameters:
+ *   argc - The number of available arguments
+ *   arg  - The first argument
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Global interrupts are disabled by the watchdog logic.
+ *
+ ****************************************************************************/
+
+static void ez80emac_poll_expiry(int argc, wdparm_t arg, ...)
+{
+  FAR struct ez80emac_driver_s *priv = (FAR struct ez80emac_driver_s *)arg;
+
+  /* Is our single work structure available?  It may not be if there are
+   * pending interrupt actions.
+   */
+
+  if (work_available(&priv->syswork))
+    {
+      /* Schedule to perform the interrupt processing on the worker thread. */
+
+      work_queue(ETHWORK, &priv->syswork, ez80emac_poll_work, priv, 0);
+    }
+  else
+    {
+      /* No.. Just re-start the watchdog poll timer, missing one polling
+       * cycle.
+       */
+
+      (void)wd_start(priv->txpoll, EMAC_WDDELAY, ez80emac_poll_expiry,
+                     1, arg);
+    }
 }
 
 /****************************************************************************
@@ -1728,13 +1998,13 @@ static int ez80emac_ifup(FAR struct net_driver_s *dev)
   uint8_t regval;
   int ret;
 
-  ndbg("Bringing up: MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
-       dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
-       dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
-       dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
-  ndbg("             IP  %d.%d.%d.%d\n",
-       dev->d_ipaddr >> 24,       (dev->d_ipaddr >> 16) & 0xff,
-      (dev->d_ipaddr >> 8) & 0xff, dev->d_ipaddr & 0xff);
+  ninfo("Bringing up: MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
+        dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
+        dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
+        dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
+  ninfo("             IP  %d.%d.%d.%d\n",
+        dev->d_ipaddr >> 24,       (dev->d_ipaddr >> 16) & 0xff,
+       (dev->d_ipaddr >> 8) & 0xff, dev->d_ipaddr & 0xff);
 
   /* Bring up the interface -- Must be down right now */
 
@@ -1788,7 +2058,8 @@ static int ez80emac_ifup(FAR struct net_driver_s *dev)
 
       /* Set and activate a timer process */
 
-     (void)wd_start(priv->txpoll, EMAC_WDDELAY, ez80emac_polltimer, 1, (uint32_t)priv);
+     (void)wd_start(priv->txpoll, EMAC_WDDELAY, ez80emac_poll_expiry,
+                    1, (uint32_t)priv);
 
       /* Enable the Ethernet interrupts */
 
@@ -1851,36 +2122,31 @@ static int ez80emac_ifdown(struct net_driver_s *dev)
 }
 
 /****************************************************************************
- * Function: ez80emac_txavail
+ * Function: ez80emac_txavail_work
  *
  * Description:
- *   Driver callback invoked when new TX data is available.  This is a
- *   stimulus perform an out-of-cycle poll and, thereby, reduce the TX
- *   latency.
+ *   Perform an out-of-cycle poll on the worker thread.
  *
  * Parameters:
- *   dev  - Reference to the NuttX driver state structure
+ *   arg - Reference to the NuttX driver state structure (cast to void*)
  *
  * Returned Value:
  *   None
  *
  * Assumptions:
- *   Called in normal user mode
+ *   Called on the higher priority worker thread.
  *
  ****************************************************************************/
 
-static int ez80emac_txavail(struct net_driver_s *dev)
+static void ez80emac_txavail_work(FAR void *arg)
 {
-  struct ez80emac_driver_s *priv = (struct ez80emac_driver_s *)dev->d_private;
-  irqstate_t flags;
-
-  flags = enter_critical_section();
+  FAR struct ez80emac_driver_s *priv = (FAR struct ez80emac_driver_s *)arg;
 
   /* Ignore the notification if the interface is not yet up */
 
+  net_lock();
   if (priv->bifup)
     {
-
       /* Check if there is room in the hardware to hold another outgoing packet. */
 
       /* If so, then poll the network for new XMIT data */
@@ -1888,7 +2154,44 @@ static int ez80emac_txavail(struct net_driver_s *dev)
       (void)devif_poll(&priv->dev, ez80emac_txpoll);
     }
 
-  leave_critical_section(flags);
+  net_unlock();
+}
+
+/****************************************************************************
+ * Function: ez80emac_txavail
+ *
+ * Description:
+ *   Driver callback invoked when new TX data is available.  This is a
+ *   stimulus perform an out-of-cycle poll and, thereby, reduce the TX
+ *   latency.
+ *
+ * Parameters:
+ *   dev - Reference to the NuttX driver state structure
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Called in normal user mode
+ *
+ ****************************************************************************/
+
+static int ez80emac_txavail(FAR struct net_driver_s *dev)
+{
+  FAR struct ez80emac_driver_s *priv = (FAR struct ez80emac_driver_s *)dev->d_private;
+
+  /* Is our single work structure available?  It may not be if there are
+   * pending interrupt actions and we will have to ignore the Tx
+   * availability action.
+   */
+
+  if (work_available(&priv->syswork))
+    {
+      /* Schedule to serialize the poll on the worker thread. */
+
+      work_queue(ETHWORK, &priv->syswork, ez80emac_txavail_work, priv, 0);
+    }
+
   return OK;
 }
 
@@ -2009,7 +2312,7 @@ static int ez80_emacinitialize(void)
   priv->txnext->pktsize = 0;
   priv->txnext->stat    = 0;
 
-  nvdbg("txnext=%p {%06x, %u, %04x} tlbp=%02x%02x trp=%02x%02x\n",
+  ninfo("txnext=%p {%06x, %u, %04x} tlbp=%02x%02x trp=%02x%02x\n",
         priv->txnext, priv->txnext->np, priv->txnext->pktsize, priv->txnext->stat,
         inp(EZ80_EMAC_TLBP_H), inp(EZ80_EMAC_TLBP_L),
         inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L));
@@ -2030,7 +2333,7 @@ static int ez80_emacinitialize(void)
   priv->rxnext->pktsize = 0;
   priv->rxnext->stat    = 0;
 
-  nvdbg("rxnext=%p {%06x, %u, %04x} bp=%02x%02x\n",
+  ninfo("rxnext=%p {%06x, %u, %04x} bp=%02x%02x\n",
         priv->rxnext, priv->rxnext->np, priv->rxnext->pktsize, priv->rxnext->stat,
         inp(EZ80_EMAC_BP_H), inp(EZ80_EMAC_BP_L));
 
@@ -2050,7 +2353,7 @@ static int ez80_emacinitialize(void)
   outp(EZ80_EMAC_RRP_L, (uint8_t)(addr & 0xff));
   outp(EZ80_EMAC_RRP_H, (uint8_t)((addr >> 8) & 0xff));
 
-  nvdbg("rrp=%02x%02x rwp=%02x%02x\n",
+  ninfo("rrp=%02x%02x rwp=%02x%02x\n",
         inp(EZ80_EMAC_RRP_H), inp(EZ80_EMAC_RRP_L),
         inp(EZ80_EMAC_RWP_H), inp(EZ80_EMAC_RWP_L));
 
@@ -2063,7 +2366,7 @@ static int ez80_emacinitialize(void)
   outp(EZ80_EMAC_RHBP_H, (uint8_t)((addr >> 8) & 0xff));
   priv->rxendp1 = (FAR struct ez80emac_desc_s *)addr;
 
-  nvdbg("rxendp1=%p rhbp=%02x%02x\n",
+  ninfo("rxendp1=%p rhbp=%02x%02x\n",
         priv->rxendp1,
         inp(EZ80_EMAC_RHBP_H), inp(EZ80_EMAC_RHBP_L));
 
@@ -2072,7 +2375,7 @@ static int ez80_emacinitialize(void)
    */
 
   outp(EZ80_EMAC_BUFSZ, EMAC_BUFSZ);
-  nvdbg("bufsz=%02x blksleft=%02x%02x\n",
+  ninfo("bufsz=%02x blksleft=%02x%02x\n",
         inp(EZ80_EMAC_BUFSZ), inp(EZ80_EMAC_BLKSLFT_H), inp(EZ80_EMAC_BLKSLFT_L));
 
   /* Software reset */
@@ -2084,7 +2387,7 @@ static int ez80_emacinitialize(void)
   regval &= ~EMAC_RST_SRST;
   outp(EZ80_EMAC_RST, regval);
 
-  nvdbg("After soft reset: rwp=%02x%02x trp=%02x%02x\n",
+  ninfo("After soft reset: rwp=%02x%02x trp=%02x%02x\n",
         inp(EZ80_EMAC_RWP_H), inp(EZ80_EMAC_RWP_L),
         inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L));
 
@@ -2094,7 +2397,7 @@ static int ez80_emacinitialize(void)
   ez80emac_miiwrite(priv, MII_MCR, MII_MCR_RESET);
   if (!ez80emac_miipoll(priv, MII_MCR, MII_MCR_RESET, false))
     {
-      ndbg("PHY reset error.\n");
+      nerr("ERROR: PHY reset error.\n");
     }
 
   /*  Initialize MAC */
@@ -2149,7 +2452,7 @@ static int ez80_emacinitialize(void)
   ez80emac_miiwrite(priv, MII_MCR, MII_MCR_RESET);
   if (!ez80emac_miipoll(priv, MII_MCR, MII_MCR_RESET, false))
     {
-      ndbg("PHY reset error.\n");
+      nerr("ERROR: PHY reset error.\n");
       ret = -EIO;
       goto errout;
     }
@@ -2197,26 +2500,26 @@ int up_netinitialize(void)
 
   /* Attach IRQs */
 
-  ret = irq_attach(EZ80_EMACSYS_IRQ, ez80emac_sysinterrupt);
+  ret = irq_attach(EZ80_EMACSYS_IRQ, ez80emac_sysinterrupt, NULL);
   if (ret < 0)
     {
-      nlldbg("Unable to attach IRQ %d\n", EZ80_EMACSYS_IRQ);
+      nerr("ERROR: Unable to attach IRQ %d\n", EZ80_EMACSYS_IRQ);
       ret = -EAGAIN;
       goto errout;
     }
 
-  ret = irq_attach(EZ80_EMACRX_IRQ, ez80emac_rxinterrupt);
+  ret = irq_attach(EZ80_EMACRX_IRQ, ez80emac_rxinterrupt, NULL);
   if (ret < 0)
     {
-      nlldbg("Unable to attach IRQ %d\n", EZ80_EMACRX_IRQ);
+      nerr("ERROR: Unable to attach IRQ %d\n", EZ80_EMACRX_IRQ);
       ret = -EAGAIN;
       goto errout;
     }
 
-  ret = irq_attach(EZ80_EMACTX_IRQ, ez80emac_txinterrupt);
+  ret = irq_attach(EZ80_EMACTX_IRQ, ez80emac_txinterrupt, NULL);
   if (ret < 0)
     {
-      nlldbg("Unable to attach IRQ %d\n", EZ80_EMACTX_IRQ);
+      nerr("ERROR: Unable to attach IRQ %d\n", EZ80_EMACTX_IRQ);
       ret = -EAGAIN;
       goto errout;
     }
@@ -2224,6 +2527,7 @@ int up_netinitialize(void)
   /* Initialize the driver structure */
 
   memset(&g_emac, 0, sizeof(struct ez80emac_driver_s));
+  priv->dev.d_buf     = g_pktbuf;           /* Single packet buffer */
   priv->dev.d_ifup    = ez80emac_ifup;      /* I/F down callback */
   priv->dev.d_ifdown  = ez80emac_ifdown;    /* I/F up (new IP address) callback */
   priv->dev.d_txavail = ez80emac_txavail;   /* New TX data callback */
diff --git a/arch/z80/src/ez80/ez80_i2c.c b/arch/z80/src/ez80/ez80_i2c.c
index f1c8a2bcd1a5f506dbbf2c5d205eb03a2d02f5a4..0e4bdb1b28a5f23b547fc0635987fc1e20785503 100644
--- a/arch/z80/src/ez80/ez80_i2c.c
+++ b/arch/z80/src/ez80/ez80_i2c.c
@@ -399,12 +399,12 @@ static int ez80_i2c_sendaddr(struct ez80_i2cdev_s *priv, uint8_t readbit)
    */
 
   sr = ez80_i2c_waitiflg();
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (sr != I2C_SR_MSTART)
     {
       /* This error should never occur */
 
-      dbg("Bad START status: %02x\n", sr);
+      _err("ERROR: Bad START status: %02x\n", sr);
       ez80_i2c_clriflg();
       return -EIO;
     }
@@ -426,7 +426,7 @@ static int ez80_i2c_sendaddr(struct ez80_i2cdev_s *priv, uint8_t readbit)
       sr = ez80_i2c_waitiflg();
       if (sr != I2C_SR_MADDRWRACK && sr != I2C_SR_MADDRWR)
         {
-          dbg("Bad ADDR8 status: %02x\n", sr);
+          _err("ERROR: Bad ADDR8 status: %02x\n", sr);
           goto failure;
         }
     }
@@ -445,7 +445,7 @@ static int ez80_i2c_sendaddr(struct ez80_i2cdev_s *priv, uint8_t readbit)
       sr = ez80_i2c_waitiflg();
       if (sr != I2C_SR_MADDRWRACK && sr != I2C_SR_MADDRWR)
         {
-         dbg("Bad ADDR10H status: %02x\n", sr);
+         _err("ERROR: Bad ADDR10H status: %02x\n", sr);
          goto failure;
         }
 
@@ -459,7 +459,7 @@ static int ez80_i2c_sendaddr(struct ez80_i2cdev_s *priv, uint8_t readbit)
       sr = ez80_i2c_waitiflg();
       if (sr != I2C_SR_MADDR2WRACK && sr != I2C_SR_MADDR2WR)
         {
-          dbg("Bad ADDR10L status: %02x\n", sr);
+          _err("ERROR: Bad ADDR10L status: %02x\n", sr);
           goto failure;
         }
     }
@@ -469,7 +469,7 @@ static int ez80_i2c_sendaddr(struct ez80_i2cdev_s *priv, uint8_t readbit)
   /* We don't attempt any fancy status-based error recovery */
 
 failure:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   switch (sr)
     {
       case I2C_SR_ARBLOST1: /* Arbitration lost in address or data byte */
@@ -479,12 +479,12 @@ failure:
                              * Call address received, ACK transmitted */
       case I2C_SR_ARBLOST4: /* Arbitration lost in address as master, slave
                              * address and Read bit received, ACK transmitted */
-        dbg("Arbitration lost: %02x\n", sr);
+        _err("ERROR: Arbitration lost: %02x\n", sr);
         ez80_i2c_clriflg();
         return -EAGAIN;
 
       default:
-        dbg("Unexpected status: %02x\n", sr);
+        _err("ERROR: Unexpected status: %02x\n", sr);
         ez80_i2c_clriflg();
         return -EIO;
     }
@@ -634,7 +634,7 @@ static int ez80_i2c_read_transfer(FAR struct ez80_i2cdev_s *priv,
              * this will cause the whole transfer to start over
              */
 
-            dbg("Arbitration lost: %02x\n", regval);
+            _err("ERROR: Arbitration lost: %02x\n", regval);
             ez80_i2c_clriflg();
             break;
           }
@@ -643,7 +643,7 @@ static int ez80_i2c_read_transfer(FAR struct ez80_i2cdev_s *priv,
 
         else
           {
-            dbg("Unexpected status: %02x\n", regval);
+            _err("ERROR: Unexpected status: %02x\n", regval);
             ez80_i2c_clriflg();
             return-EIO;
           }
@@ -731,7 +731,7 @@ static int ez80_i2c_write_transfer(FAR struct ez80_i2cdev_s *priv,
           sr = ez80_i2c_waitiflg();
           if (sr != I2C_SR_MDATAWRACK && sr != I2C_SR_MDATAWR)
             {
-              dbg("Bad DATA status: %02x\n", sr);
+              _err("ERROR: Bad DATA status: %02x\n", sr);
               ez80_i2c_clriflg();
               if (sr == I2C_SR_ARBLOST1)
                 {
diff --git a/arch/z80/src/ez80/ez80_irqsave.asm b/arch/z80/src/ez80/ez80_irqsave.asm
index de3ad4a6e23bc08f1b55855b3c4fb8adedbde9a4..25edb630df39eca68d0caf9bb3a6a62c9fd78cd3 100644
--- a/arch/z80/src/ez80/ez80_irqsave.asm
+++ b/arch/z80/src/ez80/ez80_irqsave.asm
@@ -1,5 +1,5 @@
 ;**************************************************************************
-; arch/z80/src/ez80/ez80_up_irq_save.asm
+; arch/z80/src/ez80/ez80_irqsave.asm
 ;
 ;   Copyright (C) 2008 Gregory Nutt. All rights reserved.
 ;   Author: Gregory Nutt 
diff --git a/arch/z80/src/ez80/ez80_registerdump.c b/arch/z80/src/ez80/ez80_registerdump.c
index 0e523b693a7553568ddc4eb8027302830e4ed4d9..7257627a81db8ff39949b1ccd30bfa54550ae3bb 100644
--- a/arch/z80/src/ez80/ez80_registerdump.c
+++ b/arch/z80/src/ez80/ez80_registerdump.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/z80/src/ez80/ez80_registerdump.c
  *
- *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,13 +39,6 @@
 
 #include 
 
-/* Output debug info -- even if debug is not selected. */
-
-#undef  CONFIG_DEBUG
-#undef  CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
 #include 
 
 #include 
@@ -77,22 +70,22 @@ static void ez80_registerdump(void)
   if (g_current_regs)
     {
 #ifdef CONFIG_EZ80_Z80MODE
-      lldbg("AF: %04x  I: %04x\n",
+      _alert("AF: %04x  I: %04x\n",
             g_current_regs[XCPT_AF], g_current_regs[XCPT_I]);
-      lldbg("BC: %04x DE: %04x HL: %04x\n",
+      _alert("BC: %04x DE: %04x HL: %04x\n",
             g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]);
-      lldbg("IX: %04x IY: %04x\n",
+      _alert("IX: %04x IY: %04x\n",
             g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]);
-      lldbg("SP: %04x PC: %04x\n"
+      _alert("SP: %04x PC: %04x\n"
             g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]);
 #else
-      lldbg("AF: %06x  I: %06x\n",
+      _alert("AF: %06x  I: %06x\n",
             g_current_regs[XCPT_AF], g_current_regs[XCPT_I]);
-      lldbg("BC: %06x DE: %06x HL: %06x\n",
+      _alert("BC: %06x DE: %06x HL: %06x\n",
             g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]);
-      lldbg("IX: %06x IY: %06x\n",
+      _alert("IX: %06x IY: %06x\n",
             g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]);
-      lldbg("SP: %06x PC: %06x\n"
+      _alert("SP: %06x PC: %06x\n"
             g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]);
 #endif
     }
diff --git a/arch/z80/src/ez80/ez80_schedulesigaction.c b/arch/z80/src/ez80/ez80_schedulesigaction.c
index 33d6c11b5f2a0b45ac61e6bb774f5e7eeddc32c9..6cc6b57c66bd8b949b6fe82752b7b7c57ddc8beb 100644
--- a/arch/z80/src/ez80/ez80_schedulesigaction.c
+++ b/arch/z80/src/ez80/ez80_schedulesigaction.c
@@ -125,7 +125,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver)
 {
   irqstate_t flags;
 
-  sdbg("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
+  sinfo("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
 
   /* Make sure that interrupts are disabled */
 
diff --git a/arch/z80/src/ez80/ez80_serial.c b/arch/z80/src/ez80/ez80_serial.c
index 4fbfdda7d57f196a6088a49b135cb41831b066c7..fa64bb32c2b2c14b35edfb3e3774c409d44272f1 100644
--- a/arch/z80/src/ez80/ez80_serial.c
+++ b/arch/z80/src/ez80/ez80_serial.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/z80/src/ez08/ez80_serial.c
  *
- *   Copyright (C) 2008-2009, 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -85,7 +85,7 @@ static int  ez80_setup(struct uart_dev_s *dev);
 static void ez80_shutdown(struct uart_dev_s *dev);
 static int  ez80_attach(struct uart_dev_s *dev);
 static void ez80_detach(struct uart_dev_s *dev);
-static int  ez80_interrupt(int irq, void *context);
+static int  ez80_interrupt(int irq, void *context, void *arg);
 static int  ez80_ioctl(struct file *filep, int cmd, unsigned long arg);
 static int  ez80_receive(struct uart_dev_s *dev, unsigned int *status);
 static void ez80_rxint(struct uart_dev_s *dev, bool enable);
@@ -438,7 +438,7 @@ static int ez80_attach(struct uart_dev_s *dev)
 
   /* Attach the IRQ */
 
-  return irq_attach(priv->irq, ez80_interrupt);
+  return irq_attach(priv->irq, ez80_interrupt, dev);
 }
 
 /****************************************************************************
@@ -471,29 +471,13 @@ static void ez80_detach(struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int ez80_interrupt(int irq, void *context)
+static int ez80_interrupt(int irq, void *context, void *arg)
 {
-  struct uart_dev_s *dev = NULL;
-  struct ez80_dev_s   *priv;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
+  struct ez80_dev_s *priv;
   volatile uint32_t  cause;
 
-#ifdef CONFIG_EZ80_UART0
-  if (g_uart0priv.irq == irq)
-    {
-      dev = &g_uart0port;
-    }
-  else
-#endif
-#ifdef CONFIG_EZ80_UART1
-  if (g_uart1priv.irq == irq)
-    {
-      dev = &g_uart1port;
-    }
-  else
-#endif
-    {
-      PANIC();
-    }
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct ez80_dev_s*)dev->priv;
 
   cause = ez80_serialin(priv, EZ80_UART_IIR) & EZ80_UARTIIR_CAUSEMASK;
diff --git a/arch/z80/src/ez80/ez80_sigdeliver.c b/arch/z80/src/ez80/ez80_sigdeliver.c
index 657961ce59eb36a80e96c2329f63db2f8b808246..694b3c018657042c166fac25a2660b48c13bb8cf 100644
--- a/arch/z80/src/ez80/ez80_sigdeliver.c
+++ b/arch/z80/src/ez80/ez80_sigdeliver.c
@@ -95,8 +95,8 @@ void up_sigdeliver(void)
 
   board_autoled_on(LED_SIGNAL);
 
-  sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
-        rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
+  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+         rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
   ASSERT(rtcb->xcp.sigdeliver != NULL);
 
   /* Save the real return state on the stack. */
@@ -127,7 +127,7 @@ void up_sigdeliver(void)
    * errno that is needed by the user logic (it is probably EINTR).
    */
 
-  sdbg("Resuming\n");
+  sinfo("Resuming\n");
   (void)up_irq_save();
   rtcb->pterrno = saved_errno;
 
diff --git a/arch/z80/src/ez80/ez80_spi.c b/arch/z80/src/ez80/ez80_spi.c
index a2f1c4c535dbdb4841a925ba635932db3903e7e9..0e3b9d07be8c7895a08b005a8dcedf8bcb54855e 100644
--- a/arch/z80/src/ez80/ez80_spi.c
+++ b/arch/z80/src/ez80/ez80_spi.c
@@ -446,7 +446,7 @@ FAR struct spi_dev_s *ez80_spibus_initialize(int port)
 
   /* Only the SPI1 interface is supported */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (port != 1)
     {
       return NULL;
diff --git a/arch/z80/src/ez80/ez80_timerisr.c b/arch/z80/src/ez80/ez80_timerisr.c
index 26a4fae447a92afcd3bee993afa498d8d0c4658a..16730bf598451abda27af4729a6064291d7c8da7 100644
--- a/arch/z80/src/ez80/ez80_timerisr.c
+++ b/arch/z80/src/ez80/ez80_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/z80/src/ez80/ez80_timerisr.c
  *
- *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -49,24 +49,12 @@
 #include "clock/clock.h"
 #include "up_internal.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function:  up_timerisr
+ * Function:  ez80_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -74,7 +62,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, chipreg_t *regs)
+static int ez80_timerisr(int irq, chipreg_t *regs, void *arg)
 {
   /* Read the appropriate timer0 register to clear the interrupt */
 
@@ -100,7 +88,11 @@ int up_timerisr(int irq, chipreg_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  z80_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize the timer
@@ -108,7 +100,7 @@ int up_timerisr(int irq, chipreg_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void z80_timer_initialize(void)
 {
   uint16_t reload;
 
@@ -118,7 +110,7 @@ void up_timer_initialize(void)
 
   /* Attach system timer interrupts */
 
-  irq_attach(EZ80_IRQ_SYSTIMER, (xcpt_t)up_timerisr);
+  irq_attach(EZ80_IRQ_SYSTIMER, (xcpt_t)ez80_timerisr, NULL);
 
   /* Set up the timer reload value */
   /* Write to the timer reload register to set the reload value.
diff --git a/arch/z80/src/ez80/switch.h b/arch/z80/src/ez80/switch.h
index a6e46204d952b0431f9333bef3ba6802e1f99982..fae313befd359747c42d294cf8ebcdd3373169e5 100644
--- a/arch/z80/src/ez80/switch.h
+++ b/arch/z80/src/ez80/switch.h
@@ -1,6 +1,5 @@
 /************************************************************************************
  * arch/z80/src/ez80/switch.h
- * arch/z80/src/chip/switch.h
  *
  *   Copyright (C) 2008-2009, 2011-2012 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -34,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __EZ80_SWITCH_H
-#define __EZ80_SWITCH_H
+#ifndef __ARCH_Z80_SRC_EZ80_SWITCH_H
+#define __ARCH_Z80_SRC_EZ80_SWITCH_H
 
 /************************************************************************************
  * Included Files
@@ -168,4 +167,4 @@ void ez80_registerdump(void);
 #endif
 #endif
 
-#endif  /* __EZ80_SWITCH_H */
+#endif  /* __ARCH_Z80_SRC_EZ80_SWITCH_H */
diff --git a/arch/z80/src/ez80/up_mem.h b/arch/z80/src/ez80/up_mem.h
index 9f65b5d084203797c6747edc665281b9cc9cf1dd..a64bddb73b2b59891d113bf934862fb261c61367 100644
--- a/arch/z80/src/ez80/up_mem.h
+++ b/arch/z80/src/ez80/up_mem.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __EZ80_UP_MEM_H
-#define __EZ80_UP_MEM_H
+#ifndef __ARCH_Z80_SRC_EZ80_UP_MEM_H
+#define __ARCH_Z80_SRC_EZ80_UP_MEM_H
 
 /************************************************************************************
  * Included Files
@@ -86,4 +86,4 @@ extern "C"
 #endif
 #endif
 
-#endif  /* __EZ80_UP_MEM_H */
+#endif  /* __ARCH_Z80_SRC_EZ80_UP_MEM_H */
diff --git a/arch/z80/src/z180/Kconfig b/arch/z80/src/z180/Kconfig
index ce26721f761d2cea412e88f828219868ee76dfcf..f2359d4694e3f63076a0f5f68397d97e38c19562 100644
--- a/arch/z80/src/z180/Kconfig
+++ b/arch/z80/src/z180/Kconfig
@@ -7,8 +7,8 @@ if ARCH_CHIP_Z180
 
 choice
 	prompt "Toolchain Selection"
-	default Z180_TOOLCHAIN_SDCCW if HOST_WINDOWS
-	default Z180_TOOLCHAIN_SDCCL if !HOST_WINDOWS
+	default Z180_TOOLCHAIN_SDCCW if TOOLCHAIN_WINDOWS
+	default Z180_TOOLCHAIN_SDCCL if !TOOLCHAIN_WINDOWS
 
 config Z180_TOOLCHAIN_SDCCL
         bool "SDCC for Linux, MAC OSX, or Cygwin"
@@ -16,7 +16,7 @@ config Z180_TOOLCHAIN_SDCCL
 
 config Z180_TOOLCHAIN_SDCCW
 	bool "SDCC for Windows"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 
 endchoice
 
diff --git a/arch/z80/src/z180/up_mem.h b/arch/z80/src/z180/up_mem.h
index 351c1f2205efffaf651fb4b277d2d8f9643e383f..8a1389ee22f870dd0ee3d8e1abf9659cad8f04cf 100644
--- a/arch/z80/src/z180/up_mem.h
+++ b/arch/z80/src/z180/up_mem.h
@@ -1,5 +1,5 @@
 /************************************************************************************
- * common/sdcc.h
+ * arch/z80/common/sdcc.h
  *
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_Z180_SRC_COMMON_UP_MEM_H
-#define __ARCH_Z180_SRC_COMMON_UP_MEM_H
+#ifndef __ARCH_Z80_SRC_Z180_UP_MEM_H
+#define __ARCH_Z80_SRC_Z180_UP_MEM_H
 
 /************************************************************************************
  * Included Files
@@ -72,4 +72,4 @@
 
 extern const uint16_t g_heapbase;
 
-#endif  /* __ARCH_Z180_SRC_COMMON_UP_MEM_H */
+#endif  /* __ARCH_Z80_SRC_Z180_UP_MEM_H */
diff --git a/arch/z80/src/z180/z180_mmu.c b/arch/z80/src/z180/z180_mmu.c
index e3612dc9f024d9064799e9766e5dbd3e6921b3da..53e6183d0b42279258ae4a0372f01600d69f0e92 100644
--- a/arch/z80/src/z180/z180_mmu.c
+++ b/arch/z80/src/z180/z180_mmu.c
@@ -258,7 +258,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
     {
       /* No address environment... but I suppose that is not an error */
 
-      sdbg("ERROR: npages is zero\n");
+      serr("ERROR: npages is zero\n");
       return OK;
     }
 
@@ -273,7 +273,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
   cbr = z180_mmu_alloccbr();
   if (!cbr)
     {
-      sdbg("ERROR: No free CBR structures\n");
+      serr("ERROR: No free CBR structures\n");
       ret = -ENOMEM;
       goto errout_with_irq;
     }
@@ -287,7 +287,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
 #endif
   if (!alloc)
     {
-      sdbg("ERROR: Failed to allocate %d pages\n", npages);
+      serr("ERROR: Failed to allocate %d pages\n", npages);
       ret = -ENOMEM;
       goto errout_with_cbr;
     }
diff --git a/arch/z80/src/z180/z180_modifiyreg8.c b/arch/z80/src/z180/z180_modifiyreg8.c
index bfeec463eeb7a5474a2e787235f329c6d899aaa3..a7b45d5f5c5807119426c6b21a65d27d334784f1 100644
--- a/arch/z80/src/z180/z180_modifiyreg8.c
+++ b/arch/z80/src/z180/z180_modifiyreg8.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/common/up_modifyreg8.c
+ * arch/z80/src/common/up_modifyreg8.c
  *
  *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/z80/src/z180/z180_registerdump.c b/arch/z80/src/z180/z180_registerdump.c
index 1c3a4c73be35a182838ab6e35ebe423cf492238f..00be16de85e30d745a613d65ec43698c73136481 100644
--- a/arch/z80/src/z180/z180_registerdump.c
+++ b/arch/z80/src/z180/z180_registerdump.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/z80/src/z180/z180_registerdump.c
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,13 +39,6 @@
 
 #include 
 
-/* Output debug info -- even if debug is not selected. */
-
-#undef  CONFIG_DEBUG
-#undef  CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
 #include 
 
 #include 
@@ -56,14 +49,6 @@
 
 #ifdef CONFIG_ARCH_STACKDUMP
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -76,15 +61,15 @@ static void z180_registerdump(void)
 {
   if (g_current_regs)
     {
-      lldbg("AF: %04x  I: %04x\n",
+      _alert("AF: %04x  I: %04x\n",
             g_current_regs[XCPT_AF], g_current_regs[XCPT_I]);
-      lldbg("BC: %04x DE: %04x HL: %04x\n",
+      _alert("BC: %04x DE: %04x HL: %04x\n",
             g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]);
-      lldbg("IX: %04x IY: %04x\n",
+      _alert("IX: %04x IY: %04x\n",
             g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]);
-      lldbg("SP: %04x PC: %04x\n"
+      _alert("SP: %04x PC: %04x\n"
             g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]);
-      lldbg("CBAR: %02x BBR: %02x CBR: %02x\n"
+      _alert("CBAR: %02x BBR: %02x CBR: %02x\n"
             inp(Z180_MMU_CBAR), inp(Z180_MMU_BBR), inp(Z180_MMU_CBR));
     }
 }
diff --git a/arch/z80/src/z180/z180_schedulesigaction.c b/arch/z80/src/z180/z180_schedulesigaction.c
index a29a4b9d8a3935a436768e753501b685ef350b67..c53663f783be6becdbd3d619f3e0a662c4d2667a 100644
--- a/arch/z80/src/z180/z180_schedulesigaction.c
+++ b/arch/z80/src/z180/z180_schedulesigaction.c
@@ -125,7 +125,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver)
 {
   irqstate_t flags;
 
-  dbg("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
+  _info("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
 
   /* Make sure that interrupts are disabled */
 
diff --git a/arch/z80/src/z180/z180_sigdeliver.c b/arch/z80/src/z180/z180_sigdeliver.c
index e058d5a116d381d52cc8cbf509a0e26ac7c8504d..3a67b345f8b5dacc0e0e908f5a6169e98d67b4f8 100644
--- a/arch/z80/src/z180/z180_sigdeliver.c
+++ b/arch/z80/src/z180/z180_sigdeliver.c
@@ -94,8 +94,8 @@ void up_sigdeliver(void)
 
   board_autoled_on(LED_SIGNAL);
 
-  sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
-       rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
+  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+        rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
   ASSERT(rtcb->xcp.sigdeliver != NULL);
 
   /* Save the real return state on the stack. */
@@ -126,7 +126,7 @@ void up_sigdeliver(void)
    * errno that is needed by the user logic (it is probably EINTR).
    */
 
-  sdbg("Resuming\n");
+  sinfo("Resuming\n");
   (void)up_irq_save();
   rtcb->pterrno = saved_errno;
 
diff --git a/arch/z80/src/z180/z180_timerisr.c b/arch/z80/src/z180/z180_timerisr.c
index 11f0bc92ce4f34b86525c081186ba993a8bb4dd2..0e1ac95da0137c5d7ea72f903812888ff31dedfc 100644
--- a/arch/z80/src/z180/z180_timerisr.c
+++ b/arch/z80/src/z180/z180_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/z80/src/z180/z180_timerisr.c
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -72,19 +72,11 @@
 #define A180_PRT0_RELOAD (Z180_PRT_CLOCK / CLK_TCK)
 
 /****************************************************************************
- * Private Types
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function: up_timerisr
+ * Function: z180_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -92,7 +84,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, chipreg_t *regs)
+static int z180_timerisr(int irq, chipreg_t *regs, void *arg)
 {
   /* "When TMDR0 decrements to 0, TIF0 is set to 1. This generates an interrupt
    * request if enabled by TIE0 = 1. TIF0 is reset to 0 when TCR is read and
@@ -110,7 +102,11 @@ int up_timerisr(int irq, chipreg_t *regs)
 }
 
 /****************************************************************************
- * Function: up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function: z80_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize the timer
@@ -118,7 +114,7 @@ int up_timerisr(int irq, chipreg_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void z80_timer_initialize(void)
 {
   uint8_t regval;
 
@@ -146,7 +142,7 @@ void up_timer_initialize(void)
 
   /* Attach the timer interrupt vector */
 
-  (void)irq_attach(Z180_PRT0, (xcpt_t)up_timerisr);
+  (void)irq_attach(Z180_PRT0, (xcpt_t)z180_timerisr, NULL);
 
   /* And enable the timer interrupt */
 
diff --git a/arch/z80/src/z8/chip.h b/arch/z80/src/z8/chip.h
index b85b478f13829167ee4aff56b21cdd708780c456..1e9035a3bf142ea0033a24dc4cf35ced3839dbff 100644
--- a/arch/z80/src/z8/chip.h
+++ b/arch/z80/src/z8/chip.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __Z8_CHIP_H
-#define __Z8_CHIP_H
+#ifndef __ARCH_Z80_SRC_Z8_CHIP_H
+#define __ARCH_Z80_SRC_Z8_CHIP_H
 
 /************************************************************************************
  * Included Files
@@ -236,4 +236,4 @@ extern "C"
 #endif
 #endif
 
-#endif  /* __Z8_CHIP_H */
+#endif  /* __ARCH_Z80_SRC_Z8_CHIP_H */
diff --git a/arch/z80/src/z8/switch.h b/arch/z80/src/z8/switch.h
index b8e23f597b8fc2049943223bc9d8cdbdd06da12f..7c54e34ca5ec71566f8bfabb0a14eca8c23913bd 100644
--- a/arch/z80/src/z8/switch.h
+++ b/arch/z80/src/z8/switch.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __Z80_SWITCH_H
-#define __Z80_SWITCH_H
+#ifndef __ARCH_Z80_SRC_Z8_SWITCH_H
+#define __ARCH_Z80_SRC_Z8_SWITCH_H
 
 /************************************************************************************
  * Included Files
@@ -255,4 +255,4 @@ void z8_registerdump(void);
 #endif
 #endif
 
-#endif  /* __Z80_SWITCH_H */
+#endif  /* __ARCH_Z80_SRC_Z8_SWITCH_H */
diff --git a/arch/z80/src/z8/up_mem.h b/arch/z80/src/z8/up_mem.h
index fe6854b4764e51d3c5ff6450646834951810b673..ffe3b2210e06f8f7b52730d2dcb245cac0f061ea 100644
--- a/arch/z80/src/z8/up_mem.h
+++ b/arch/z80/src/z8/up_mem.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __Z8_UP_MEM_H
-#define __Z8_UP_MEM_H
+#ifndef __ARCH_Z80_SRC_Z8_UP_MEM_H
+#define __ARCH_Z80_SRC_Z8_UP_MEM_H
 
 /************************************************************************************
  * Included Files
@@ -86,4 +86,4 @@ extern "C"
 #endif
 #endif
 
-#endif  /* __Z8_UP_MEM_H */
+#endif  /* __ARCH_Z80_SRC_Z8_UP_MEM_H */
diff --git a/arch/z80/src/z8/z8_i2c.c b/arch/z80/src/z8/z8_i2c.c
index cc3508a564ce7549ddb2fc9ac9cfabf7534bcfdd..e8c2a0e046fedee65a8784d5c8c7548eca04ff08 100644
--- a/arch/z80/src/z8/z8_i2c.c
+++ b/arch/z80/src/z8/z8_i2c.c
@@ -236,7 +236,7 @@ static uint16_t z8_i2c_getbrg(uint32_t frequency)
 
   if (frequency > 400*1000)
     {
-      dbg("Invalid inputs\n");
+      _err("ERROR: Invalid inputs\n");
       frequency = 400*1000;
     }
 
diff --git a/arch/z80/src/z8/z8_registerdump.c b/arch/z80/src/z8/z8_registerdump.c
index df6c761a7c942243ad0f02eb9327607c7507376a..0b0cdc6c2e41c5140abf5af8cf7e051dea7a452e 100644
--- a/arch/z80/src/z8/z8_registerdump.c
+++ b/arch/z80/src/z8/z8_registerdump.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/z80/src/z8/z8_registerdump.c
  *
- *   Copyright (C) 2008-2009,2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,13 +39,6 @@
 
 #include 
 
-/* Output debug info -- even if debug is not selected. */
-
-#undef  CONFIG_DEBUG
-#undef  CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
 #include 
 #include 
 
@@ -57,29 +50,21 @@
 
 #ifdef CONFIG_ARCH_STACKDUMP
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
 
 static inline void z8_dumpregs(FAR chipret_t *regs)
 {
-  lldbg("REGS: %04x %04x %04x %04x %04x %04x %04x %04x\n",
-         regs[XCPT_RR0], regs[XCPT_RR2], regs[XCPT_RR4], regs[XCPT_RR6],
-         regs[XCPT_RR8], regs[XCPT_RR10], regs[XCPT_RR12], regs[XCPT_RR14]);
+  _alert("REGS: %04x %04x %04x %04x %04x %04x %04x %04x\n",
+        regs[XCPT_RR0], regs[XCPT_RR2], regs[XCPT_RR4], regs[XCPT_RR6],
+        regs[XCPT_RR8], regs[XCPT_RR10], regs[XCPT_RR12], regs[XCPT_RR14]);
 }
 
 static inline void z8_dumpstate(chipreg_t sp, chipreg_t pc, uint8_t irqctl,
                                 chipreg_t rpflags)
 {
-  lldbg("SP: %04x PC: %04x IRQCTL: %02x RP: %02x FLAGS: %02x\n",
+  _alert("SP: %04x PC: %04x IRQCTL: %02x RP: %02x FLAGS: %02x\n",
         sp, pc, irqctl & 0xff, rpflags >> 8, rpflags & 0xff);
 }
 
diff --git a/arch/z80/src/z8/z8_schedulesigaction.c b/arch/z80/src/z8/z8_schedulesigaction.c
index 2e6de089ec572a16d1af398a9185a737d57493db..338bf3096a3aeabaf3e036d1a6af6764699c551d 100644
--- a/arch/z80/src/z8/z8_schedulesigaction.c
+++ b/arch/z80/src/z8/z8_schedulesigaction.c
@@ -125,7 +125,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver)
 {
   irqstate_t flags;
 
-  dbg("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
+  _info("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
 
   /* Make sure that interrupts are disabled */
 
diff --git a/arch/z80/src/z8/z8_serial.c b/arch/z80/src/z8/z8_serial.c
index f7fe721ac033a8a6bc0b06e21fb826b7b0214783..6f6df0efae9735a0e7bc762b924c28224aec508b 100644
--- a/arch/z80/src/z8/z8_serial.c
+++ b/arch/z80/src/z8/z8_serial.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/z80/src/z8/z8_serial.c
  *
- *   Copyright (C) 2008-2009, 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -96,8 +96,8 @@ static int  z8_setup(FAR struct uart_dev_s *dev);
 static void z8_shutdown(FAR struct uart_dev_s *dev);
 static int  z8_attach(FAR struct uart_dev_s *dev);
 static void z8_detach(FAR struct uart_dev_s *dev);
-static int  z8_rxinterrupt(int irq, FAR void *context);
-static int  z8_txinterrupt(int irq, FAR void *context);
+static int  z8_rxinterrupt(int irq, FAR void *context, FAR void *arg);
+static int  z8_txinterrupt(int irq, FAR void *context, FAR void *arg);
 static int  z8_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
 static int  z8_receive(FAR struct uart_dev_s *dev, FAR uint32_t *status);
 static void z8_rxint(FAR struct uart_dev_s *dev, bool enable);
@@ -446,12 +446,12 @@ static int z8_attach(FAR struct uart_dev_s *dev)
 
   /* Attach the RX IRQ */
 
-  ret = irq_attach(priv->rxirq, z8_rxinterrupt);
+  ret = irq_attach(priv->rxirq, z8_rxinterrupt, dev);
   if (ret == OK)
     {
       /* Attach the TX IRQ */
 
-      ret = irq_attach(priv->txirq, z8_txinterrupt);
+      ret = irq_attach(priv->txirq, z8_txinterrupt, dev);
       if (ret != OK)
         {
           irq_detach(priv->rxirq);
@@ -488,25 +488,13 @@ static void z8_detach(FAR struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-static int z8_rxinterrupt(int irq, FAR void *context)
+static int z8_rxinterrupt(int irq, FAR void *context, FAR void *arg)
 {
-  struct uart_dev_s  *dev = NULL;
-  struct z8_uart_s *priv;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
+  struct z8_uart_s  *priv;
   uint8_t            status;
 
-  if (g_uart1priv.rxirq == irq)
-    {
-      dev = &g_uart1port;
-    }
-  else if (g_uart0priv.rxirq == irq)
-    {
-      dev = &g_uart0port;
-    }
-  else
-    {
-      PANIC();
-    }
-
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct z8_uart_s*)dev->priv;
 
   /* Check the LIN-UART status 0 register to determine whether the source of
@@ -537,25 +525,13 @@ static int z8_rxinterrupt(int irq, FAR void *context)
  *
  ****************************************************************************/
 
-static int z8_txinterrupt(int irq, FAR void *context)
+static int z8_txinterrupt(int irq, FAR void *context, FAR void *arg)
 {
-  struct uart_dev_s  *dev = NULL;
-  struct z8_uart_s *priv;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
+  struct z8_uart_s  *priv;
   uint8_t            status;
 
-  if (g_uart1priv.txirq == irq)
-    {
-      dev = &g_uart1port;
-    }
-  else if (g_uart0priv.txirq == irq)
-    {
-      dev = &g_uart0port;
-    }
-  else
-    {
-      PANIC();
-    }
-
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (struct z8_uart_s*)dev->priv;
 
   /* Verify that the transmit data register is empty */
diff --git a/arch/z80/src/z8/z8_sigdeliver.c b/arch/z80/src/z8/z8_sigdeliver.c
index 1cbb7e21590a4897113af077dafd6010bd92cee3..b6abac296a05d71535ccce5369a78733ed603f62 100644
--- a/arch/z80/src/z8/z8_sigdeliver.c
+++ b/arch/z80/src/z8/z8_sigdeliver.c
@@ -109,8 +109,8 @@ void up_sigdeliver(void)
 
   board_autoled_on(LED_SIGNAL);
 
-  sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
-       rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
+  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+        rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
   ASSERT(rtcb->xcp.sigdeliver != NULL);
 
   /* Save the real return state on the stack. */
@@ -141,7 +141,7 @@ void up_sigdeliver(void)
    * errno that is needed by the user logic (it is probably EINTR).
    */
 
-  sdbg("Resuming\n");
+  sinfo("Resuming\n");
   (void)up_irq_save();
   rtcb->pterrno = saved_errno;
 
diff --git a/arch/z80/src/z8/z8_timerisr.c b/arch/z80/src/z8/z8_timerisr.c
index d387c770c6e620db973c5e0cf09a1157dbb27f9a..e3fd1e48580a785d5c9827021a3317ceab4b9265 100644
--- a/arch/z80/src/z8/z8_timerisr.c
+++ b/arch/z80/src/z8/z8_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/z80/src/z8/z8_timerisr.c
  *
- *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -49,18 +49,6 @@
 #include "clock/clock.h"
 #include "up_internal.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -70,7 +58,11 @@
 extern uint32_t get_freq(void);
 
 /****************************************************************************
- * Function:  up_timerisr
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  z8_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions
@@ -78,16 +70,20 @@ extern uint32_t get_freq(void);
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, uint32_t *regs)
+static int z8_timerisr(int irq, uint32_t *regs, void *arg)
 {
-   /* Process timer interrupt */
+  /* Process timer interrupt */
 
-   sched_process_timer();
-   return 0;
+  sched_process_timer();
+  return 0;
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  z80_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize the timer
@@ -95,7 +91,7 @@ int up_timerisr(int irq, uint32_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void z80_timer_initialize(void)
 {
   uint32_t reload;
 
@@ -141,7 +137,7 @@ void up_timer_initialize(void)
 
   /* Attach and enable the timer interrupt (leaving at priority 0 */
 
-  irq_attach(Z8_IRQ_SYSTIMER, (xcpt_t)up_timerisr);
+  irq_attach(Z8_IRQ_SYSTIMER, (xcpt_t)z8_timerisr, NULL);
   up_enable_irq(Z8_IRQ_SYSTIMER);
 }
 
diff --git a/arch/z80/src/z80/Kconfig b/arch/z80/src/z80/Kconfig
index 7a05eb08ef75b377d3e5ab3e0467fc1aa4733b05..46b9f8c08a1eb30c6e60c8e89f00eb7b4708772e 100644
--- a/arch/z80/src/z80/Kconfig
+++ b/arch/z80/src/z80/Kconfig
@@ -7,8 +7,8 @@ if ARCH_CHIP_Z80
 
 choice
 	prompt "Toolchain Selection"
-	default Z80_TOOLCHAIN_SDCCW if HOST_WINDOWS
-	default Z80_TOOLCHAIN_SDCCL if !HOST_WINDOWS
+	default Z80_TOOLCHAIN_SDCCW if TOOLCHAIN_WINDOWS
+	default Z80_TOOLCHAIN_SDCCL if !TOOLCHAIN_WINDOWS
 
 config Z80_TOOLCHAIN_SDCCL
         bool "SDCC for Linux, MAC OSX, or Cygwin"
@@ -16,7 +16,7 @@ config Z80_TOOLCHAIN_SDCCL
 
 config Z80_TOOLCHAIN_SDCCW
 	bool "SDCC for Windows"
-	depends on HOST_WINDOWS
+	depends on TOOLCHAIN_WINDOWS
 
 endchoice
 
diff --git a/arch/z80/src/z80/switch.h b/arch/z80/src/z80/switch.h
index f277893a33d4f8710c63e5f698226e2d7dc154e8..c3403e1ea78a86d03e4546237078e95cb2b6395f 100644
--- a/arch/z80/src/z80/switch.h
+++ b/arch/z80/src/z80/switch.h
@@ -34,8 +34,8 @@
  *
  ************************************************************************************/
 
-#ifndef __Z80_SWITCH_H
-#define __Z80_SWITCH_H
+#ifndef __ARCH_Z80_SRC_Z80_SWITCH_H
+#define __ARCH_Z80_SRC_Z80_SWITCH_H
 
 /************************************************************************************
  * Included Files
@@ -167,4 +167,4 @@ void z80_registerdump(void);
 #endif
 #endif
 
-#endif  /* __Z80_SWITCH_H */
+#endif  /* __ARCH_Z80_SRC_Z80_SWITCH_H */
diff --git a/arch/z80/src/z80/up_mem.h b/arch/z80/src/z80/up_mem.h
index 2b9c356779607b53ac673791b0b3839df0fa1187..af2ee81a0740166683a3bfe39055cecc4ef70eec 100644
--- a/arch/z80/src/z80/up_mem.h
+++ b/arch/z80/src/z80/up_mem.h
@@ -1,5 +1,5 @@
 /************************************************************************************
- * common/sdcc.h
+ * arch/z80/src/common/sdcc.h
  *
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/arch/z80/src/z80/z80_registerdump.c b/arch/z80/src/z80/z80_registerdump.c
index dd83a1eb8c7358f1f6a2da070bd5e095667fc3d1..9d87ccc9c073bbd6c9140e596faf60c078f30ae7 100644
--- a/arch/z80/src/z80/z80_registerdump.c
+++ b/arch/z80/src/z80/z80_registerdump.c
@@ -39,13 +39,6 @@
 
 #include 
 
-/* Output debug info -- even if debug is not selected. */
-
-#undef  CONFIG_DEBUG
-#undef  CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
 #include 
 
 #include 
@@ -56,14 +49,6 @@
 
 #ifdef CONFIG_ARCH_STACKDUMP
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -76,13 +61,13 @@ static void z80_registerdump(void)
 {
   if (g_current_regs)
     {
-      lldbg("AF: %04x  I: %04x\n",
+      _alert("AF: %04x  I: %04x\n",
             g_current_regs[XCPT_AF], g_current_regs[XCPT_I]);
-      lldbg("BC: %04x DE: %04x HL: %04x\n",
+      _alert("BC: %04x DE: %04x HL: %04x\n",
             g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]);
-      lldbg("IX: %04x IY: %04x\n",
+      _alert("IX: %04x IY: %04x\n",
             g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]);
-      lldbg("SP: %04x PC: %04x\n"
+      _alert("SP: %04x PC: %04x\n"
             g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]);
     }
 }
diff --git a/arch/z80/src/z80/z80_schedulesigaction.c b/arch/z80/src/z80/z80_schedulesigaction.c
index eb0c9c5554d818cde70d32e4cafbf446fe1ab61f..439808b0cadfd362b3ac0a73c01455237d7149a4 100644
--- a/arch/z80/src/z80/z80_schedulesigaction.c
+++ b/arch/z80/src/z80/z80_schedulesigaction.c
@@ -125,7 +125,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver)
 {
   irqstate_t flags;
 
-  dbg("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
+  _info("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
 
   /* Make sure that interrupts are disabled */
 
diff --git a/arch/z80/src/z80/z80_sigdeliver.c b/arch/z80/src/z80/z80_sigdeliver.c
index b56d1afd32a76fdd3e3a9a32fdeb18858c409f66..232eb4be98d4cec97b79123a204595b10de483c8 100644
--- a/arch/z80/src/z80/z80_sigdeliver.c
+++ b/arch/z80/src/z80/z80_sigdeliver.c
@@ -94,8 +94,8 @@ void up_sigdeliver(void)
 
   board_autoled_on(LED_SIGNAL);
 
-  sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
-       rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
+  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+        rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
   ASSERT(rtcb->xcp.sigdeliver != NULL);
 
   /* Save the real return state on the stack. */
@@ -126,7 +126,7 @@ void up_sigdeliver(void)
    * errno that is needed by the user logic (it is probably EINTR).
    */
 
-  sdbg("Resuming\n");
+  sinfo("Resuming\n");
   (void)up_irq_save();
   rtcb->pterrno = saved_errno;
 
diff --git a/audio/audio.c b/audio/audio.c
index a1f0db3834ca97b08b16d815567767fd064cb772..b8194908ab94225a5e29fd7ac9141418a92c34db 100644
--- a/audio/audio.c
+++ b/audio/audio.c
@@ -146,7 +146,7 @@ static int audio_open(FAR struct file *filep)
   uint8_t tmp;
   int ret;
 
-  audvdbg("crefs: %d\n", upper->crefs);
+  audinfo("crefs: %d\n", upper->crefs);
 
   /* Get exclusive access to the device structures */
 
@@ -198,7 +198,7 @@ static int audio_close(FAR struct file *filep)
   FAR struct audio_upperhalf_s *upper = inode->i_private;
   int ret;
 
-  audvdbg("crefs: %d\n", upper->crefs);
+  audinfo("crefs: %d\n", upper->crefs);
 
   /* Get exclusive access to the device structures */
 
@@ -228,7 +228,7 @@ static int audio_close(FAR struct file *filep)
       /* Disable the Audio device */
 
       DEBUGASSERT(lower->ops->shutdown != NULL);
-      audvdbg("calling shutdown: %d\n");
+      audinfo("calling shutdown: %d\n");
 
       lower->ops->shutdown(lower);
     }
@@ -358,7 +358,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 #endif
   int ret;
 
-  audvdbg("cmd: %d arg: %ld\n", cmd, arg);
+  audinfo("cmd: %d arg: %ld\n", cmd, arg);
 
   /* Get exclusive access to the device structures */
 
@@ -382,7 +382,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
           FAR struct audio_caps_s *caps = (FAR struct audio_caps_s *)((uintptr_t)arg);
           DEBUGASSERT(lower->ops->getcaps != NULL);
 
-          audvdbg("AUDIOIOC_GETCAPS: Device=%d\n", caps->ac_type);
+          audinfo("AUDIOIOC_GETCAPS: Device=%d\n", caps->ac_type);
 
           /* Call the lower-half driver capabilities handler */
 
@@ -396,7 +396,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
             (FAR const struct audio_caps_desc_s *)((uintptr_t)arg);
           DEBUGASSERT(lower->ops->configure != NULL);
 
-          audvdbg("AUDIOIOC_INITIALIZE: Device=%d\n", caps->caps.ac_type);
+          audinfo("AUDIOIOC_INITIALIZE: Device=%d\n", caps->caps.ac_type);
 
           /* Call the lower-half driver configure handler */
 
@@ -412,7 +412,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
         {
           DEBUGASSERT(lower->ops->shutdown != NULL);
 
-          audvdbg("AUDIOIOC_SHUTDOWN\n");
+          audinfo("AUDIOIOC_SHUTDOWN\n");
 
           /* Call the lower-half driver initialize handler */
           ret = lower->ops->shutdown(lower);
@@ -427,7 +427,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case AUDIOIOC_START:
         {
-          audvdbg("AUDIOIOC_START\n");
+          audinfo("AUDIOIOC_START\n");
           DEBUGASSERT(lower->ops->start != NULL);
 
           /* Start the audio stream */
@@ -449,7 +449,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 #ifndef CONFIG_AUDIO_EXCLUDE_STOP
       case AUDIOIOC_STOP:
         {
-          audvdbg("AUDIOIOC_STOP\n");
+          audinfo("AUDIOIOC_STOP\n");
           DEBUGASSERT(lower->ops->stop != NULL);
 
           if (upper->started)
@@ -475,7 +475,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case AUDIOIOC_PAUSE:
         {
-          audvdbg("AUDIOIOC_PAUSE\n");
+          audinfo("AUDIOIOC_PAUSE\n");
           DEBUGASSERT(lower->ops->pause != NULL);
 
           if (upper->started)
@@ -497,7 +497,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case AUDIOIOC_RESUME:
         {
-          audvdbg("AUDIOIOC_RESUME\n");
+          audinfo("AUDIOIOC_RESUME\n");
           DEBUGASSERT(lower->ops->resume != NULL);
 
           if (upper->started)
@@ -521,7 +521,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case AUDIOIOC_ALLOCBUFFER:
         {
-          audvdbg("AUDIOIOC_ALLOCBUFFER\n");
+          audinfo("AUDIOIOC_ALLOCBUFFER\n");
 
           bufdesc = (FAR struct audio_buf_desc_s *) arg;
           if (lower->ops->allocbuffer)
@@ -544,7 +544,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case AUDIOIOC_FREEBUFFER:
         {
-          audvdbg("AUDIOIOC_FREEBUFFER\n");
+          audinfo("AUDIOIOC_FREEBUFFER\n");
 
           bufdesc = (FAR struct audio_buf_desc_s *) arg;
           if (lower->ops->freebuffer)
@@ -569,7 +569,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case AUDIOIOC_ENQUEUEBUFFER:
         {
-          audvdbg("AUDIOIOC_ENQUEUEBUFFER\n");
+          audinfo("AUDIOIOC_ENQUEUEBUFFER\n");
 
           DEBUGASSERT(lower->ops->enqueuebuffer != NULL);
 
@@ -585,7 +585,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case AUDIOIOC_REGISTERMQ:
         {
-          audvdbg("AUDIOIOC_REGISTERMQ\n");
+          audinfo("AUDIOIOC_REGISTERMQ\n");
 
           upper->usermq = (mqd_t) arg;
           ret = OK;
@@ -599,7 +599,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case AUDIOIOC_UNREGISTERMQ:
         {
-          audvdbg("AUDIOIOC_UNREGISTERMQ\n");
+          audinfo("AUDIOIOC_UNREGISTERMQ\n");
 
           upper->usermq = NULL;
           ret = OK;
@@ -613,7 +613,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case AUDIOIOC_RESERVE:
         {
-          audvdbg("AUDIOIOC_RESERVE\n");
+          audinfo("AUDIOIOC_RESERVE\n");
           DEBUGASSERT(lower->ops->reserve != NULL);
 
           /* Call lower-half to perform the reservation */
@@ -633,7 +633,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case AUDIOIOC_RELEASE:
         {
-          audvdbg("AUDIOIOC_RELEASE\n");
+          audinfo("AUDIOIOC_RELEASE\n");
           DEBUGASSERT(lower->ops->release != NULL);
 
           /* Call lower-half to perform the release */
@@ -650,7 +650,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       default:
         {
-          audvdbg("Forwarding unrecognized cmd: %d arg: %ld\n", cmd, arg);
+          audinfo("Forwarding unrecognized cmd: %d arg: %ld\n", cmd, arg);
           DEBUGASSERT(lower->ops->ioctl != NULL);
           ret = lower->ops->ioctl(lower, cmd, arg);
         }
@@ -704,7 +704,7 @@ static inline void audio_dequeuebuffer(FAR struct audio_upperhalf_s *upper,
 {
   struct audio_msg_s    msg;
 
-  audllvdbg("Entry\n");
+  audinfo("Entry\n");
 
   /* Send a dequeue message to the user if a message queue is registered */
 
@@ -742,7 +742,7 @@ static inline void audio_complete(FAR struct audio_upperhalf_s *upper,
 {
   struct audio_msg_s    msg;
 
-  audllvdbg("Entry\n");
+  audinfo("Entry\n");
 
   /* Send a dequeue message to the user if a message queue is registered */
 
@@ -791,7 +791,7 @@ static void audio_callback(FAR void *handle, uint16_t reason,
 {
   FAR struct audio_upperhalf_s *upper = (FAR struct audio_upperhalf_s *)handle;
 
-  audllvdbg("Entry\n");
+  audinfo("Entry\n");
 
   /* Perform operation based on reason code */
 
@@ -832,7 +832,7 @@ static void audio_callback(FAR void *handle, uint16_t reason,
 
       default:
         {
-          auddbg("Unknown callback reason code %d\n", reason);
+          auderr("ERROR: Unknown callback reason code %d\n", reason);
           break;
         }
     }
@@ -885,7 +885,7 @@ int audio_register(FAR const char *name, FAR struct audio_lowerhalf_s *dev)
   upper = (FAR struct audio_upperhalf_s *)kmm_zalloc(sizeof(struct audio_upperhalf_s));
   if (!upper)
     {
-      auddbg("Allocation failed\n");
+      auderr("ERROR: Allocation failed\n");
       return -ENOMEM;
     }
 
@@ -995,7 +995,7 @@ int audio_register(FAR const char *name, FAR struct audio_lowerhalf_s *dev)
   dev->upper = audio_callback;
   dev->priv = upper;
 
-  audvdbg("Registering %s\n", path);
+  audinfo("Registering %s\n", path);
   return register_driver(path, &g_audioops, 0666, upper);
 }
 
diff --git a/audio/pcm_decode.c b/audio/pcm_decode.c
index d57d5dbb9b25a694eb58797540f25cbc34dc348f..383d8ef261368d64633a2a294e711568b1e2da67 100644
--- a/audio/pcm_decode.c
+++ b/audio/pcm_decode.c
@@ -259,23 +259,23 @@ static void pcm_callback(FAR void *arg, uint16_t reason,
 #ifdef CONFIG_PCM_DEBUG
 static void pcm_dump(FAR const struct wav_header_s *wav)
 {
-  dbg("Wave file header\n");
-  dbg("  Header Chunk:\n");
-  dbg("    Chunk ID:        0x%08x\n", wav->hdr.chunkid);
-  dbg("    Chunk Size:      %u\n",     wav->hdr.chunklen);
-  dbg("    Format:          0x%08x\n", wav->hdr.format);
-  dbg("  Format Chunk:\n");
-  dbg("    Chunk ID:        0x%08x\n", wav->fmt.chunkid);
-  dbg("    Chunk Size:      %u\n",     wav->fmt.chunklen);
-  dbg("    Audio Format:    0x%04x\n", wav->fmt.format);
-  dbg("    Num. Channels:   %d\n",     wav->fmt.nchannels);
-  dbg("    Sample Rate:     %u\n",     wav->fmt.samprate);
-  dbg("    Byte Rate:       %u\n",     wav->fmt.byterate);
-  dbg("    Block Align:     %d\n",     wav->fmt.align);
-  dbg("    Bits Per Sample: %d\n",     wav->fmt.bpsamp);
-  dbg("  Data Chunk:\n");
-  dbg("    Chunk ID:        0x%08x\n", wav->data.chunkid);
-  dbg("    Chunk Size:      %u\n",     wav->data.chunklen);
+  _info("Wave file header\n");
+  _info("  Header Chunk:\n");
+  _info("    Chunk ID:        0x%08x\n", wav->hdr.chunkid);
+  _info("    Chunk Size:      %u\n",     wav->hdr.chunklen);
+  _info("    Format:          0x%08x\n", wav->hdr.format);
+  _info("  Format Chunk:\n");
+  _info("    Chunk ID:        0x%08x\n", wav->fmt.chunkid);
+  _info("    Chunk Size:      %u\n",     wav->fmt.chunklen);
+  _info("    Audio Format:    0x%04x\n", wav->fmt.format);
+  _info("    Num. Channels:   %d\n",     wav->fmt.nchannels);
+  _info("    Sample Rate:     %u\n",     wav->fmt.samprate);
+  _info("    Byte Rate:       %u\n",     wav->fmt.byterate);
+  _info("    Block Align:     %d\n",     wav->fmt.align);
+  _info("    Bits Per Sample: %d\n",     wav->fmt.bpsamp);
+  _info("  Data Chunk:\n");
+  _info("    Chunk ID:        0x%08x\n", wav->data.chunkid);
+  _info("    Chunk Size:      %u\n",     wav->data.chunklen);
 }
 #endif
 
@@ -398,14 +398,14 @@ static bool pcm_parsewav(FAR struct pcm_decode_s *priv, uint8_t *data)
 
       if (priv->bpsamp != 8 && priv->bpsamp != 16)
         {
-          auddbg("ERROR: Cannot support bits per sample of %d in this mode\n",
+          auderr("ERROR: Cannot support bits per sample of %d in this mode\n",
                  priv->bpsamp);
           return -EINVAL;
         }
 
       if (priv->nchannels != 1 && priv->nchannels != 2)
         {
-          auddbg("ERROR: Cannot support number of channles of %d in this mode\n",
+          auderr("ERROR: Cannot support number of channles of %d in this mode\n",
                  priv->nchannels);
           return -EINVAL;
         }
@@ -432,7 +432,7 @@ static bool pcm_parsewav(FAR struct pcm_decode_s *priv, uint8_t *data)
 static void pcm_subsample_configure(FAR struct pcm_decode_s *priv,
                                     uint8_t subsample)
 {
-  audvdbg("subsample: %d\n", subsample);
+  audinfo("subsample: %d\n", subsample);
 
   /* Three possibilities:
    *
@@ -448,7 +448,7 @@ static void pcm_subsample_configure(FAR struct pcm_decode_s *priv,
 
       if (subsample != AUDIO_SUBSAMPLE_NONE)
         {
-          audvdbg("Start sub-sampling\n");
+          audinfo("Start sub-sampling\n");
 
           /* Save the current subsample setting. Subsampling will begin on
            * then next audio buffer that we receive.
@@ -466,7 +466,7 @@ static void pcm_subsample_configure(FAR struct pcm_decode_s *priv,
 
   else if (subsample == AUDIO_SUBSAMPLE_NONE)
     {
-      audvdbg("Stop sub-sampling\n");
+      audinfo("Stop sub-sampling\n");
 
       /* Indicate that we are in normal play mode.  This will take effect
        * when the next audio buffer is received.
@@ -691,7 +691,7 @@ static int pcm_getcaps(FAR struct audio_lowerhalf_s *dev, int type,
   ret = lower->ops->getcaps(lower, type, caps);
   if (ret < 0)
     {
-      auddbg("Lower getcaps() failed: %d\n", ret);
+      auderr("ERROR: Lower getcaps() failed: %d\n", ret);
       return ret;
     }
 
@@ -758,7 +758,7 @@ static int pcm_configure(FAR struct audio_lowerhalf_s *dev,
   lower = priv->lower;
   DEBUGASSERT(lower && lower->ops->configure);
 
-  audvdbg("Defer to lower configure\n");
+  audinfo("Defer to lower configure\n");
 #ifdef CONFIG_AUDIO_MULTI_SESSION
   return lower->ops->configure(lower, session, caps);
 #else
@@ -796,7 +796,7 @@ static int pcm_shutdown(FAR struct audio_lowerhalf_s *dev)
   lower = priv->lower;
   DEBUGASSERT(lower && lower->ops->start);
 
-  audvdbg("Defer to lower shutdown\n");
+  audinfo("Defer to lower shutdown\n");
   return lower->ops->shutdown(lower);
 }
 
@@ -827,7 +827,7 @@ static int pcm_start(FAR struct audio_lowerhalf_s *dev)
   lower = priv->lower;
   DEBUGASSERT(lower && lower->ops->start);
 
-  audvdbg("Defer to lower start\n");
+  audinfo("Defer to lower start\n");
 #ifdef CONFIG_AUDIO_MULTI_SESSION
   return lower->ops->start(lower, session);
 #else
@@ -866,7 +866,7 @@ static int pcm_stop(FAR struct audio_lowerhalf_s *dev)
   lower = priv->lower;
   DEBUGASSERT(lower && lower->ops->stop);
 
-  audvdbg("Defer to lower stop\n");
+  audinfo("Defer to lower stop\n");
 #ifdef CONFIG_AUDIO_MULTI_SESSION
   return lower->ops->stop(lower, session);
 #else
@@ -900,7 +900,7 @@ static int pcm_pause(FAR struct audio_lowerhalf_s *dev)
   lower = priv->lower;
   DEBUGASSERT(lower && lower->ops->pause);
 
-  audvdbg("Defer to lower pause\n");
+  audinfo("Defer to lower pause\n");
 #ifdef CONFIG_AUDIO_MULTI_SESSION
   return lower->ops->pause(lower, session);
 #else
@@ -933,7 +933,7 @@ static int pcm_resume(FAR struct audio_lowerhalf_s *dev)
   lower = priv->lower;
   DEBUGASSERT(lower && lower->ops->resume);
 
-  audvdbg("Defer to lower resume\n");
+  audinfo("Defer to lower resume\n");
 #ifdef CONFIG_AUDIO_MULTI_SESSION
   return lower->ops->resume(lower, session);
 #else
@@ -967,7 +967,7 @@ static int pcm_allocbuffer(FAR struct audio_lowerhalf_s *dev,
   lower = priv->lower;
   DEBUGASSERT(lower && lower->ops->allocbuffer);
 
-  audvdbg("Defer to lower allocbuffer\n");
+  audinfo("Defer to lower allocbuffer\n");
   return lower->ops->allocbuffer(lower, apb);
 }
 
@@ -994,7 +994,7 @@ static int pcm_freebuffer(FAR struct audio_lowerhalf_s *dev,
   lower = priv->lower;
   DEBUGASSERT(lower && lower->ops->freebuffer);
 
-  audvdbg("Defer to lower freebuffer, apb=%p\n", apb);
+  audinfo("Defer to lower freebuffer, apb=%p\n", apb);
   return lower->ops->freebuffer(lower, apb);
 }
 
@@ -1026,7 +1026,7 @@ static int pcm_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
   int ret;
 
   DEBUGASSERT(priv);
-  audvdbg("Received buffer %p, streaming=%d\n", apb, priv->streaming);
+  audinfo("Received buffer %p, streaming=%d\n", apb, priv->streaming);
 
   lower = priv->lower;
   DEBUGASSERT(lower && lower->ops->enqueuebuffer && lower->ops->configure);
@@ -1046,7 +1046,7 @@ static int pcm_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
         }
 
 #ifndef CONFIG_AUDIO_EXCLUDE_FFORWARD
-      audvdbg("Received: apb=%p curbyte=%d nbytes=%d flags=%04x\n",
+      audinfo("Received: apb=%p curbyte=%d nbytes=%d flags=%04x\n",
               apb, apb->curbyte, apb->nbytes, apb->flags);
 
       /* Perform any necessary sub-sampling operations */
@@ -1056,7 +1056,7 @@ static int pcm_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
 
       /* Then give the audio buffer to the lower driver */
 
-      audvdbg("Pass to lower enqueuebuffer: apb=%p curbyte=%d nbytes=%d\n",
+      audinfo("Pass to lower enqueuebuffer: apb=%p curbyte=%d nbytes=%d\n",
               apb, apb->curbyte, apb->nbytes);
 
       return lower->ops->enqueuebuffer(lower, apb);
@@ -1069,7 +1069,7 @@ static int pcm_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
    */
 
   bytesleft = apb->nbytes - apb->curbyte;
-  audvdbg("curbyte=%d nbytes=%d nmaxbytes=%d bytesleft=%d\n",
+  audinfo("curbyte=%d nbytes=%d nmaxbytes=%d bytesleft=%d\n",
           apb->curbyte, apb->nbytes, apb->nmaxbytes, bytesleft);
 
   if (bytesleft >= sizeof(struct wav_header_s))
@@ -1100,7 +1100,7 @@ static int pcm_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
 #endif
           if (ret < 0)
             {
-              auddbg("ERROR: Failed to set PCM configuration: %d\n", ret);
+              auderr("ERROR: Failed to set PCM configuration: %d\n", ret);
               return ret;
             }
 
@@ -1109,7 +1109,7 @@ static int pcm_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
           apb->curbyte += sizeof(struct wav_header_s);
 
 #ifndef CONFIG_AUDIO_EXCLUDE_FFORWARD
-          audvdbg("Begin streaming: apb=%p curbyte=%d nbytes=%d\n",
+          audinfo("Begin streaming: apb=%p curbyte=%d nbytes=%d\n",
                   apb, apb->curbyte, apb->nbytes);
 
           /* Perform any necessary sub-sampling operations */
@@ -1119,7 +1119,7 @@ static int pcm_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
 
           /* Then give the audio buffer to the lower driver */
 
-          audvdbg("Pass to lower enqueuebuffer: apb=%p curbyte=%d nbytes=%d\n",
+          audinfo("Pass to lower enqueuebuffer: apb=%p curbyte=%d nbytes=%d\n",
                   apb, apb->curbyte, apb->nbytes);
 
           ret = lower->ops->enqueuebuffer(lower, apb);
@@ -1135,7 +1135,7 @@ static int pcm_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
             }
         }
 
-      auddbg("ERROR: Invalid PCM WAV file\n");
+      auderr("ERROR: Invalid PCM WAV file\n");
 
       /* The normal protocol for streaming errors is as follows:
        *
@@ -1161,7 +1161,7 @@ static int pcm_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
 
   /* This is not a WAV file! */
 
-  auddbg("ERROR: Invalid PCM WAV file\n");
+  auderr("ERROR: Invalid PCM WAV file\n");
   return -EINVAL;
 }
 
@@ -1186,7 +1186,7 @@ static int pcm_cancelbuffer(FAR struct audio_lowerhalf_s *dev,
   lower = priv->lower;
   DEBUGASSERT(lower && lower->ops->cancelbuffer);
 
-  audvdbg("Defer to lower cancelbuffer, apb=%p\n", apb);
+  audinfo("Defer to lower cancelbuffer, apb=%p\n", apb);
   return lower->ops->cancelbuffer(lower, apb);
 }
 
@@ -1211,7 +1211,7 @@ static int pcm_ioctl(FAR struct audio_lowerhalf_s *dev, int cmd,
   lower = priv->lower;
   DEBUGASSERT(lower && lower->ops->ioctl);
 
-  audvdbg("Defer to lower ioctl, cmd=%d arg=%ld\n");
+  audinfo("Defer to lower ioctl, cmd=%d arg=%ld\n");
   return lower->ops->ioctl(lower, cmd, arg);
 }
 
@@ -1256,7 +1256,7 @@ static int pcm_reserve(FAR struct audio_lowerhalf_s *dev)
   lower = priv->lower;
   DEBUGASSERT(lower && lower->ops->reserve);
 
-  audvdbg("Defer to lower reserve\n");
+  audinfo("Defer to lower reserve\n");
 #ifdef CONFIG_AUDIO_MULTI_SESSION
   ret = lower->ops->reserve(lower, &priv->session);
 
@@ -1298,7 +1298,7 @@ static int pcm_release(FAR struct audio_lowerhalf_s *dev)
   lower = priv->lower;
   DEBUGASSERT(lower && lower->ops->release);
 
-  audvdbg("Defer to lower release\n");
+  audinfo("Defer to lower release\n");
 #ifdef CONFIG_AUDIO_MULTI_SESSION
   return lower->ops->release(lower, session);
 #else
@@ -1378,7 +1378,7 @@ FAR struct audio_lowerhalf_s *
   priv = (FAR struct pcm_decode_s *)kmm_zalloc(sizeof(struct pcm_decode_s));
   if (!priv)
     {
-      auddbg("ERROR: Failed to allocate driver structure\n");
+      auderr("ERROR: Failed to allocate driver structure\n");
       return NULL;
     }
 
diff --git a/binfmt/Kconfig b/binfmt/Kconfig
index fc2b457f89116608fb2886c927e7037b2ce6aca4..61746221c987a265342f3d7afbbe5fa4116b2834 100644
--- a/binfmt/Kconfig
+++ b/binfmt/Kconfig
@@ -42,6 +42,7 @@ endif
 config ELF
 	bool "Enable the ELF Binary Format"
 	default n
+	select LIBC_ARCH_ELF
 	---help---
 		Enable support for the ELF binary format.  Default: n
 
@@ -69,10 +70,10 @@ if BUILTIN
 source binfmt/libbuiltin/Kconfig
 endif
 
-config PCODE
+config BINFMT_PCODE
 	bool "Support P-Code Applications"
 	default n
-	depends on INTERPRETERS_PCODE && SYSTEM_PRUN && ((!BUILD_PROTECTED && !BUILD_KERNEL) || EXPERIMENTAL)
+	depends on INTERPRETERS_PCODE && ((!BUILD_PROTECTED && !BUILD_KERNEL) || EXPERIMENTAL)
 	---help---
 		Enable support for interpreted P-Code binaries.  P-Code binaries are
 		generated by the NuttX Pascal compiler.
@@ -84,12 +85,12 @@ config PCODE
 		Pascal package directory for more details.  The correct installation
 		directory is: apps/interpreters.
 
-		ISSUES:  This feature is highly coupled with logic in the apps/subdirectory
-		and, as a consequence, cannot be used in environments that do not
-		include the standard NuttX apps/ nor in build configurations using
-		UILD_PROTECTED or BUILD_KERNEL..
+		ISSUES:  This feature is highly coupled with logic in the apps/
+		directory and, as a consequence, cannot be used in environments that
+		do not include the standard NuttX apps/ directory nor in build
+		configurations using BUILD_PROTECTED or BUILD_KERNEL.
 
-if PCODE
+if BINFMT_PCODE
 source binfmt/libpcode/Kconfig
 endif
 
diff --git a/binfmt/binfmt.h b/binfmt/binfmt.h
index 370ef57eaebcabe67c62a976163e8c0983a0fff5..cfde554d4e453f3262db9bed85b9e01685fd4a36 100644
--- a/binfmt/binfmt.h
+++ b/binfmt/binfmt.h
@@ -86,7 +86,7 @@ EXTERN FAR struct binfmt_s *g_binfmts;
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_BINFMT)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_BINFMT)
 int dump_module(FAR const struct binary_s *bin);
 #else
 #  define dump_module(bin)
diff --git a/binfmt/binfmt_copyargv.c b/binfmt/binfmt_copyargv.c
index 2fee46d047d460aba7f739efc4b2f59a9ddc876b..f0a594f5a6d20e2408aad0874d1a207852373aa5 100644
--- a/binfmt/binfmt_copyargv.c
+++ b/binfmt/binfmt_copyargv.c
@@ -114,12 +114,12 @@ int binfmt_copyargv(FAR struct binary_s *bin, FAR char * const *argv)
 
           if (nargs > MAX_EXEC_ARGS)
             {
-              bdbg("ERROR: Too many arguments: %lu\n", (unsigned long)argvsize);
+              berr("ERROR: Too many arguments: %lu\n", (unsigned long)argvsize);
               return -E2BIG;
             }
         }
 
-      bvdbg("args=%d argsize=%lu\n", nargs, (unsigned long)argsize);
+      binfo("args=%d argsize=%lu\n", nargs, (unsigned long)argsize);
 
       /* Allocate the argv array and an argument buffer */
 
@@ -129,7 +129,7 @@ int binfmt_copyargv(FAR struct binary_s *bin, FAR char * const *argv)
           bin->argbuffer = (FAR char *)kmm_malloc(argvsize + argsize);
           if (!bin->argbuffer)
             {
-              bdbg("ERROR: Failed to allocate the argument buffer\n");
+              berr("ERROR: Failed to allocate the argument buffer\n");
               return -ENOMEM;
             }
 
diff --git a/binfmt/binfmt_dumpmodule.c b/binfmt/binfmt_dumpmodule.c
index c69fed83c4398b844364bf8150c09c74f7e082c6..a28f4cefeeda07e02242082ec35f17645b94d4cd 100644
--- a/binfmt/binfmt_dumpmodule.c
+++ b/binfmt/binfmt_dumpmodule.c
@@ -47,7 +47,7 @@
 
 #include "binfmt.h"
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_BINFMT) && !defined(CONFIG_BINFMT_DISABLE)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_BINFMT) && !defined(CONFIG_BINFMT_DISABLE)
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -86,21 +86,21 @@ int dump_module(FAR const struct binary_s *bin)
 {
   if (bin)
     {
-      bdbg("Module:\n");
-      bdbg("  filename:  %s\n", bin->filename);
-      bdbg("  argv:      %p\n", bin->argv);
-      bdbg("  entrypt:   %p\n", bin->entrypt);
-      bdbg("  mapped:    %p size=%d\n", bin->mapped, bin->mapsize);
-      bdbg("  alloc:     %p %p %p\n", bin->alloc[0], bin->alloc[1], bin->alloc[2]);
+      berr("Module:\n");
+      berr("  filename:  %s\n", bin->filename);
+      berr("  argv:      %p\n", bin->argv);
+      berr("  entrypt:   %p\n", bin->entrypt);
+      berr("  mapped:    %p size=%d\n", bin->mapped, bin->mapsize);
+      berr("  alloc:     %p %p %p\n", bin->alloc[0], bin->alloc[1], bin->alloc[2]);
 #ifdef CONFIG_BINFMT_CONSTRUCTORS
-      bdbg("  ctors:     %p nctors=%d\n", bin->ctors, bin->nctors);
-      bdbg("  dtors:     %p ndtors=%d\n", bin->dtors, bin->ndtors);
+      berr("  ctors:     %p nctors=%d\n", bin->ctors, bin->nctors);
+      berr("  dtors:     %p ndtors=%d\n", bin->dtors, bin->ndtors);
 #endif
 #ifdef CONFIG_ARCH_ADDRENV
-      bdbg("  addrenv:   %p\n", bin->addrenv);
+      berr("  addrenv:   %p\n", bin->addrenv);
 #endif
-      bdbg("  stacksize: %d\n", bin->stacksize);
-      bdbg("  unload:    %p\n", bin->unload);
+      berr("  stacksize: %d\n", bin->stacksize);
+      berr("  unload:    %p\n", bin->unload);
     }
 
   return OK;
diff --git a/binfmt/binfmt_exec.c b/binfmt/binfmt_exec.c
index f3f62027ebfb7cc564330b4f46ed868c60910ba1..2e6f074b79a342deb98b9f88e8e2e4e36a66ec26 100644
--- a/binfmt/binfmt_exec.c
+++ b/binfmt/binfmt_exec.c
@@ -86,7 +86,7 @@ int exec(FAR const char *filename, FAR char * const *argv,
 #if defined(CONFIG_SCHED_ONEXIT) && defined(CONFIG_SCHED_HAVE_PARENT)
   FAR struct binary_s *bin;
   int pid;
-  int err;
+  int errcode;
   int ret;
 
   /* Allocate the load information */
@@ -94,8 +94,8 @@ int exec(FAR const char *filename, FAR char * const *argv,
   bin = (FAR struct binary_s *)kmm_zalloc(sizeof(struct binary_s));
   if (!bin)
     {
-      bdbg("ERROR: Failed to allocate binary_s\n");
-      err = ENOMEM;
+      berr("ERROR: Failed to allocate binary_s\n");
+      errcode = ENOMEM;
       goto errout;
     }
 
@@ -110,8 +110,8 @@ int exec(FAR const char *filename, FAR char * const *argv,
   ret = binfmt_copyargv(bin, argv);
   if (ret < 0)
     {
-      err = -ret;
-      bdbg("ERROR: Failed to copy argv[]: %d\n", err);
+      errcode = -ret;
+      berr("ERROR: Failed to copy argv[]: %d\n", errcode);
       goto errout_with_bin;
     }
 
@@ -120,8 +120,8 @@ int exec(FAR const char *filename, FAR char * const *argv,
   ret = load_module(bin);
   if (ret < 0)
     {
-      err = get_errno();
-      bdbg("ERROR: Failed to load program '%s': %d\n", filename, err);
+      errcode = get_errno();
+      berr("ERROR: Failed to load program '%s': %d\n", filename, errcode);
       goto errout_with_argv;
     }
 
@@ -137,8 +137,8 @@ int exec(FAR const char *filename, FAR char * const *argv,
   pid = exec_module(bin);
   if (pid < 0)
     {
-      err = get_errno();
-      bdbg("ERROR: Failed to execute program '%s': %d\n", filename, err);
+      errcode = get_errno();
+      berr("ERROR: Failed to execute program '%s': %d\n", filename, errcode);
       goto errout_with_lock;
     }
 
@@ -149,8 +149,8 @@ int exec(FAR const char *filename, FAR char * const *argv,
   ret = schedule_unload(pid, bin);
   if (ret < 0)
     {
-      err = get_errno();
-      bdbg("ERROR: Failed to schedule unload '%s': %d\n", filename, err);
+      errcode = get_errno();
+      berr("ERROR: Failed to schedule unload '%s': %d\n", filename, errcode);
     }
 
   sched_unlock();
@@ -164,12 +164,12 @@ errout_with_argv:
 errout_with_bin:
   kmm_free(bin);
 errout:
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 
 #else
   struct binary_s bin;
-  int err;
+  int errcode;
   int ret;
 
   /* Load the module into memory */
@@ -182,8 +182,8 @@ errout:
   ret = load_module(&bin);
   if (ret < 0)
     {
-      err = get_errno();
-      bdbg("ERROR: Failed to load program '%s': %d\n", filename, err);
+      errcode = get_errno();
+      berr("ERROR: Failed to load program '%s': %d\n", filename, errcode);
       goto errout;
     }
 
@@ -192,8 +192,8 @@ errout:
   ret = exec_module(&bin);
   if (ret < 0)
     {
-      err = get_errno();
-      bdbg("ERROR: Failed to execute program '%s': %d\n", filename, err);
+      errcode = get_errno();
+      berr("ERROR: Failed to execute program '%s': %d\n", filename, errcode);
       goto errout_with_module;
     }
 
@@ -204,10 +204,9 @@ errout:
 errout_with_module:
   unload_module(&bin);
 errout:
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 #endif
 }
 
 #endif /* !CONFIG_BINFMT_DISABLE */
-
diff --git a/binfmt/binfmt_execmodule.c b/binfmt/binfmt_execmodule.c
index 971c47123cce10c1b8f0477b99c1ca9141bcc800..eef50068a538b895fbf0412c98d59e7c2af26398 100644
--- a/binfmt/binfmt_execmodule.c
+++ b/binfmt/binfmt_execmodule.c
@@ -109,7 +109,7 @@ static void exec_ctors(FAR void *arg)
 
   for (i = 0; i < binp->nctors; i++)
     {
-      bvdbg("Calling ctor %d at %p\n", i, (FAR void *)ctor);
+      binfo("Calling ctor %d at %p\n", i, (FAR void *)ctor);
 
       (*ctor)();
       ctor++;
@@ -142,27 +142,27 @@ int exec_module(FAR const struct binary_s *binp)
 #endif
   FAR uint32_t *stack;
   pid_t pid;
-  int err;
+  int errcode;
   int ret;
 
   /* Sanity checking */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!binp || !binp->entrypt || binp->stacksize <= 0)
     {
-      err = EINVAL;
+      errcode = EINVAL;
       goto errout;
     }
 #endif
 
-  bvdbg("Executing %s\n", binp->filename);
+  binfo("Executing %s\n", binp->filename);
 
   /* Allocate a TCB for the new task. */
 
   tcb = (FAR struct task_tcb_s *)kmm_zalloc(sizeof(struct task_tcb_s));
   if (!tcb)
     {
-      err = ENOMEM;
+      errcode = ENOMEM;
       goto errout;
     }
 
@@ -172,8 +172,8 @@ int exec_module(FAR const struct binary_s *binp)
   ret = up_addrenv_select(&binp->addrenv, &oldenv);
   if (ret < 0)
     {
-      bdbg("ERROR: up_addrenv_select() failed: %d\n", ret);
-      err = -ret;
+      berr("ERROR: up_addrenv_select() failed: %d\n", ret);
+      errcode = -ret;
       goto errout_with_tcb;
     }
 
@@ -192,7 +192,7 @@ int exec_module(FAR const struct binary_s *binp)
   stack = (FAR uint32_t *)kumm_malloc(binp->stacksize);
   if (!stack)
     {
-      err = ENOMEM;
+      errcode = ENOMEM;
       goto errout_with_addrenv;
     }
 
@@ -202,8 +202,8 @@ int exec_module(FAR const struct binary_s *binp)
                   stack, binp->stacksize, binp->entrypt, binp->argv);
   if (ret < 0)
     {
-      err = get_errno();
-      bdbg("task_init() failed: %d\n", err);
+      errcode = get_errno();
+      berr("task_init() failed: %d\n", errcode);
       goto errout_with_addrenv;
     }
 
@@ -224,8 +224,8 @@ int exec_module(FAR const struct binary_s *binp)
   ret = up_addrenv_kstackalloc(&tcb->cmn);
   if (ret < 0)
     {
-      bdbg("ERROR: up_addrenv_select() failed: %d\n", ret);
-      err = -ret;
+      berr("ERROR: up_addrenv_select() failed: %d\n", ret);
+      errcode = -ret;
       goto errout_with_tcbinit;
     }
 #endif
@@ -236,8 +236,8 @@ int exec_module(FAR const struct binary_s *binp)
   ret = shm_group_initialize(tcb->cmn.group);
   if (ret < 0)
     {
-      bdbg("ERROR: shm_group_initialize() failed: %d\n", ret);
-      err = -ret;
+      berr("ERROR: shm_group_initialize() failed: %d\n", ret);
+      errcode = -ret;
       goto errout_with_tcbinit;
     }
 #endif
@@ -260,8 +260,8 @@ int exec_module(FAR const struct binary_s *binp)
   ret = up_addrenv_clone(&binp->addrenv, &tcb->cmn.group->tg_addrenv);
   if (ret < 0)
     {
-      err = -ret;
-      bdbg("ERROR: up_addrenv_clone() failed: %d\n", ret);
+      errcode = -ret;
+      berr("ERROR: up_addrenv_clone() failed: %d\n", ret);
       goto errout_with_tcbinit;
     }
 
@@ -288,8 +288,8 @@ int exec_module(FAR const struct binary_s *binp)
   ret = task_activate((FAR struct tcb_s *)tcb);
   if (ret < 0)
     {
-      err = get_errno();
-      bdbg("task_activate() failed: %d\n", err);
+      errcode = get_errno();
+      berr("task_activate() failed: %d\n", errcode);
       goto errout_with_tcbinit;
     }
 
@@ -299,8 +299,8 @@ int exec_module(FAR const struct binary_s *binp)
   ret = up_addrenv_restore(&oldenv);
   if (ret < 0)
     {
-      bdbg("ERROR: up_addrenv_select() failed: %d\n", ret);
-      err = -ret;
+      berr("ERROR: up_addrenv_select() failed: %d\n", ret);
+      errcode = -ret;
       goto errout_with_tcbinit;
     }
 #endif
@@ -322,8 +322,8 @@ errout_with_tcb:
   kmm_free(tcb);
 
 errout:
-  set_errno(err);
-  bdbg("returning errno: %d\n", err);
+  set_errno(errcode);
+  berr("returning errno: %d\n", errcode);
   return ERROR;
 }
 
diff --git a/binfmt/binfmt_loadmodule.c b/binfmt/binfmt_loadmodule.c
index 1b614838e6afb59fe4f9565397d5906b3a45cac3..9cd80a8f42ceb8ada57c0152a6c187f246ec5816 100644
--- a/binfmt/binfmt_loadmodule.c
+++ b/binfmt/binfmt_loadmodule.c
@@ -91,7 +91,7 @@ static int load_default_priority(FAR struct binary_s *bin)
   ret = sched_getparam(0, ¶m);
   if (ret < 0)
     {
-      bdbg("ERROR: sched_getparam failed: %d\n", get_errno());
+      berr("ERROR: sched_getparam failed: %d\n", get_errno());
       return ERROR;
     }
 
@@ -120,7 +120,7 @@ static int load_absmodule(FAR struct binary_s *bin)
   FAR struct binfmt_s *binfmt;
   int ret = -ENOENT;
 
-  bvdbg("Loading %s\n", bin->filename);
+  binfo("Loading %s\n", bin->filename);
 
   /* Disabling pre-emption should be sufficient protection while accessing
    * the list of registered binary format handlers.
@@ -142,7 +142,7 @@ static int load_absmodule(FAR struct binary_s *bin)
         {
           /* Successfully loaded -- break out with ret == 0 */
 
-          bvdbg("Successfully loaded module %s\n", bin->filename);
+          binfo("Successfully loaded module %s\n", bin->filename);
 
           /* Save the unload method for use by unload_module */
 
@@ -180,7 +180,7 @@ int load_module(FAR struct binary_s *bin)
 
   /* Verify that we were provided something to work with */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (bin && bin->filename)
 #endif
     {
@@ -262,7 +262,7 @@ int load_module(FAR struct binary_s *bin)
 
   if (ret < 0)
     {
-      bdbg("ERROR: Returning errno %d\n", -ret);
+      berr("ERROR: Returning errno %d\n", -ret);
       set_errno(-ret);
       return ERROR;
     }
diff --git a/binfmt/binfmt_schedunload.c b/binfmt/binfmt_schedunload.c
index f9da1349f6b96688f47315b30567c0cbf4ef4498..5121e975eacdf89bd547982b7d7614fb760b1411 100644
--- a/binfmt/binfmt_schedunload.c
+++ b/binfmt/binfmt_schedunload.c
@@ -209,7 +209,7 @@ static void unload_callback(int signo, siginfo_t *info, void *ucontext)
 
   if (!info || signo != SIGCHLD)
     {
-      blldbg("ERROR:Bad signal callback: signo=%d info=%p\n", signo, info);
+      berr("ERROR:Bad signal callback: signo=%d info=%p\n", signo, info);
       return;
     }
 
@@ -218,7 +218,7 @@ static void unload_callback(int signo, siginfo_t *info, void *ucontext)
   bin = unload_list_remove(info->si_pid);
   if (!bin)
     {
-      blldbg("ERROR: Could not find load info for PID=%d\n", info->si_pid);
+      berr("ERROR: Could not find load info for PID=%d\n", info->si_pid);
       return;
     }
 
@@ -227,7 +227,7 @@ static void unload_callback(int signo, siginfo_t *info, void *ucontext)
   ret = unload_module(bin);
   if (ret < 0)
     {
-      blldbg("ERROR: unload_module failed: %d\n", get_errno());
+      berr("ERROR: unload_module failed: %d\n", get_errno());
     }
 
   /* Free the load structure */
@@ -284,7 +284,7 @@ int schedule_unload(pid_t pid, FAR struct binary_s *bin)
       /* The errno value will get trashed by the following debug output */
 
       errorcode = get_errno();
-      bvdbg("ERROR: sigprocmask failed: %d\n", ret);
+      berr("ERROR: sigprocmask failed: %d\n", ret);
       goto errout;
     }
 
@@ -310,14 +310,14 @@ int schedule_unload(pid_t pid, FAR struct binary_s *bin)
       /* The errno value will get trashed by the following debug output */
 
       errorcode = get_errno();
-      bvdbg("ERROR: sigaction failed: %d\n" , ret);
+      berr("ERROR: sigaction failed: %d\n" , ret);
 
       /* Emergency removal from the list */
 
       flags = enter_critical_section();
       if (unload_list_remove(pid) != bin)
         {
-          blldbg("ERROR: Failed to remove structure\n");
+          berr("ERROR: Failed to remove structure\n");
         }
 
       leave_critical_section(flags);
diff --git a/binfmt/binfmt_unloadmodule.c b/binfmt/binfmt_unloadmodule.c
index 887d6d66c09a84aad65f2d533bf0c9e2af4e7311..25b9cef121f2ec6f2b73db5aa45af517e516a9e1 100644
--- a/binfmt/binfmt_unloadmodule.c
+++ b/binfmt/binfmt_unloadmodule.c
@@ -99,7 +99,7 @@ static inline int exec_dtors(FAR struct binary_s *binp)
   ret = up_addrenv_select(&binp->addrenv, &oldenv);
   if (ret < 0)
     {
-      bdbg("ERROR: up_addrenv_select() failed: %d\n", ret);
+      berr("ERROR: up_addrenv_select() failed: %d\n", ret);
       return ret;
     }
 #endif
@@ -108,7 +108,7 @@ static inline int exec_dtors(FAR struct binary_s *binp)
 
   for (i = 0; i < binp->ndtors; i++)
     {
-      bvdbg("Calling dtor %d at %p\n", i, (FAR void *)dtor);
+      binfo("Calling dtor %d at %p\n", i, (FAR void *)dtor);
 
       (*dtor)();
       dtor++;
@@ -161,7 +161,7 @@ int unload_module(FAR struct binary_s *binp)
           ret = binp->unload(binp);
           if (ret < 0)
             {
-              bdbg("binp->unload() failed: %d\n", ret);
+              berr("binp->unload() failed: %d\n", ret);
               set_errno(-ret);
               return ERROR;
             }
@@ -173,7 +173,7 @@ int unload_module(FAR struct binary_s *binp)
       ret = exec_dtors(binp);
       if (ret < 0)
         {
-          bdbg("exec_ctors() failed: %d\n", ret);
+          berr("exec_ctors() failed: %d\n", ret);
           set_errno(-ret);
           return ERROR;
         }
@@ -187,7 +187,7 @@ int unload_module(FAR struct binary_s *binp)
 
       if (binp->mapped)
         {
-          bvdbg("Unmapping address space: %p\n", binp->mapped);
+          binfo("Unmapping address space: %p\n", binp->mapped);
 
           munmap(binp->mapped, binp->mapsize);
         }
@@ -198,7 +198,7 @@ int unload_module(FAR struct binary_s *binp)
         {
           if (binp->alloc[i])
             {
-              bvdbg("Freeing alloc[%d]: %p\n", i, binp->alloc[i]);
+              binfo("Freeing alloc[%d]: %p\n", i, binp->alloc[i]);
               kumm_free((FAR void *)binp->alloc[i]);
             }
         }
diff --git a/binfmt/builtin.c b/binfmt/builtin.c
index 537556136b65b956e2b119e691841304025d2606..88ad846c7fc21031d826d79cabb4dcfbb2bef721 100644
--- a/binfmt/builtin.c
+++ b/binfmt/builtin.c
@@ -95,7 +95,7 @@ static int builtin_loadbinary(struct binary_s *binp)
   int index;
   int ret;
 
-  bvdbg("Loading file: %s\n", binp->filename);
+  binfo("Loading file: %s\n", binp->filename);
 
   /* Open the binary file for reading (only) */
 
@@ -103,7 +103,7 @@ static int builtin_loadbinary(struct binary_s *binp)
   if (fd < 0)
     {
       int errval = get_errno();
-      bdbg("ERROR: Failed to open binary %s: %d\n", binp->filename, errval);
+      berr("ERROR: Failed to open binary %s: %d\n", binp->filename, errval);
       return -errval;
     }
 
@@ -115,7 +115,7 @@ static int builtin_loadbinary(struct binary_s *binp)
   if (ret < 0)
     {
       int errval = get_errno();
-      bdbg("ERROR: FIOC_FILENAME ioctl failed: %d\n", errval);
+      berr("ERROR: FIOC_FILENAME ioctl failed: %d\n", errval);
       close(fd);
       return -errval;
     }
@@ -128,7 +128,7 @@ static int builtin_loadbinary(struct binary_s *binp)
   if (index < 0)
     {
       int errval = get_errno();
-      bdbg("ERROR: %s is not a builtin application\n", filename);
+      berr("ERROR: %s is not a builtin application\n", filename);
       close(fd);
       return -errval;
 
@@ -171,12 +171,12 @@ int builtin_initialize(void)
 
   /* Register ourselves as a binfmt loader */
 
-  bvdbg("Registering Builtin Loader\n");
+  binfo("Registering Builtin Loader\n");
 
   ret = register_binfmt(&g_builtin_binfmt);
   if (ret != 0)
     {
-      bdbg("Failed to register binfmt: %d\n", ret);
+      berr("Failed to register binfmt: %d\n", ret);
     }
 
   return ret;
diff --git a/binfmt/elf.c b/binfmt/elf.c
index 7291389ebade37dbbcddd933ccfcd75cdef41df3..37b1e117cd4f4271fe461921ff9318de47a0cc0a 100644
--- a/binfmt/elf.c
+++ b/binfmt/elf.c
@@ -60,11 +60,11 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, and CONFIG_DEBUG_BINFMT have to be
+/* CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO, and CONFIG_DEBUG_BINFMT have to be
  * defined or CONFIG_ELF_DUMPBUFFER does nothing.
  */
 
-#if !defined(CONFIG_DEBUG_VERBOSE) || !defined (CONFIG_DEBUG_BINFMT)
+#if !defined(CONFIG_DEBUG_INFO) || !defined (CONFIG_DEBUG_BINFMT)
 #  undef CONFIG_ELF_DUMPBUFFER
 #endif
 
@@ -73,7 +73,7 @@
 #endif
 
 #ifdef CONFIG_ELF_DUMPBUFFER
-# define elf_dumpbuffer(m,b,n) bvdbgdumpbuffer(m,b,n)
+# define elf_dumpbuffer(m,b,n) binfodumpbuffer(m,b,n)
 #else
 # define elf_dumpbuffer(m,b,n)
 #endif
@@ -87,7 +87,7 @@
  ****************************************************************************/
 
 static int elf_loadbinary(FAR struct binary_s *binp);
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_BINFMT)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_BINFMT)
 static void elf_dumploadinfo(FAR struct elf_loadinfo_s *loadinfo);
 #endif
 
@@ -110,63 +110,63 @@ static struct binfmt_s g_elfbinfmt =
  * Name: elf_dumploadinfo
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_BINFMT)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_BINFMT)
 static void elf_dumploadinfo(FAR struct elf_loadinfo_s *loadinfo)
 {
   int i;
 
-  bdbg("LOAD_INFO:\n");
-  bdbg("  textalloc:    %08lx\n", (long)loadinfo->textalloc);
-  bdbg("  dataalloc:    %08lx\n", (long)loadinfo->dataalloc);
-  bdbg("  textsize:     %ld\n",   (long)loadinfo->textsize);
-  bdbg("  datasize:     %ld\n",   (long)loadinfo->datasize);
-  bdbg("  filelen:      %ld\n",   (long)loadinfo->filelen);
+  berr("LOAD_INFO:\n");
+  berr("  textalloc:    %08lx\n", (long)loadinfo->textalloc);
+  berr("  dataalloc:    %08lx\n", (long)loadinfo->dataalloc);
+  berr("  textsize:     %ld\n",   (long)loadinfo->textsize);
+  berr("  datasize:     %ld\n",   (long)loadinfo->datasize);
+  berr("  filelen:      %ld\n",   (long)loadinfo->filelen);
 #ifdef CONFIG_BINFMT_CONSTRUCTORS
-  bdbg("  ctoralloc:    %08lx\n", (long)loadinfo->ctoralloc);
-  bdbg("  ctors:        %08lx\n", (long)loadinfo->ctors);
-  bdbg("  nctors:       %d\n",    loadinfo->nctors);
-  bdbg("  dtoralloc:    %08lx\n", (long)loadinfo->dtoralloc);
-  bdbg("  dtors:        %08lx\n", (long)loadinfo->dtors);
-  bdbg("  ndtors:       %d\n",    loadinfo->ndtors);
+  berr("  ctoralloc:    %08lx\n", (long)loadinfo->ctoralloc);
+  berr("  ctors:        %08lx\n", (long)loadinfo->ctors);
+  berr("  nctors:       %d\n",    loadinfo->nctors);
+  berr("  dtoralloc:    %08lx\n", (long)loadinfo->dtoralloc);
+  berr("  dtors:        %08lx\n", (long)loadinfo->dtors);
+  berr("  ndtors:       %d\n",    loadinfo->ndtors);
 #endif
-  bdbg("  filfd:        %d\n",    loadinfo->filfd);
-  bdbg("  symtabidx:    %d\n",    loadinfo->symtabidx);
-  bdbg("  strtabidx:    %d\n",    loadinfo->strtabidx);
+  berr("  filfd:        %d\n",    loadinfo->filfd);
+  berr("  symtabidx:    %d\n",    loadinfo->symtabidx);
+  berr("  strtabidx:    %d\n",    loadinfo->strtabidx);
 
-  bdbg("ELF Header:\n");
-  bdbg("  e_ident:      %02x %02x %02x %02x\n",
+  berr("ELF Header:\n");
+  berr("  e_ident:      %02x %02x %02x %02x\n",
     loadinfo->ehdr.e_ident[0], loadinfo->ehdr.e_ident[1],
     loadinfo->ehdr.e_ident[2], loadinfo->ehdr.e_ident[3]);
-  bdbg("  e_type:       %04x\n",  loadinfo->ehdr.e_type);
-  bdbg("  e_machine:    %04x\n",  loadinfo->ehdr.e_machine);
-  bdbg("  e_version:    %08x\n",  loadinfo->ehdr.e_version);
-  bdbg("  e_entry:      %08lx\n", (long)loadinfo->ehdr.e_entry);
-  bdbg("  e_phoff:      %d\n",    loadinfo->ehdr.e_phoff);
-  bdbg("  e_shoff:      %d\n",    loadinfo->ehdr.e_shoff);
-  bdbg("  e_flags:      %08x\n" , loadinfo->ehdr.e_flags);
-  bdbg("  e_ehsize:     %d\n",    loadinfo->ehdr.e_ehsize);
-  bdbg("  e_phentsize:  %d\n",    loadinfo->ehdr.e_phentsize);
-  bdbg("  e_phnum:      %d\n",    loadinfo->ehdr.e_phnum);
-  bdbg("  e_shentsize:  %d\n",    loadinfo->ehdr.e_shentsize);
-  bdbg("  e_shnum:      %d\n",    loadinfo->ehdr.e_shnum);
-  bdbg("  e_shstrndx:   %d\n",    loadinfo->ehdr.e_shstrndx);
+  berr("  e_type:       %04x\n",  loadinfo->ehdr.e_type);
+  berr("  e_machine:    %04x\n",  loadinfo->ehdr.e_machine);
+  berr("  e_version:    %08x\n",  loadinfo->ehdr.e_version);
+  berr("  e_entry:      %08lx\n", (long)loadinfo->ehdr.e_entry);
+  berr("  e_phoff:      %d\n",    loadinfo->ehdr.e_phoff);
+  berr("  e_shoff:      %d\n",    loadinfo->ehdr.e_shoff);
+  berr("  e_flags:      %08x\n" , loadinfo->ehdr.e_flags);
+  berr("  e_ehsize:     %d\n",    loadinfo->ehdr.e_ehsize);
+  berr("  e_phentsize:  %d\n",    loadinfo->ehdr.e_phentsize);
+  berr("  e_phnum:      %d\n",    loadinfo->ehdr.e_phnum);
+  berr("  e_shentsize:  %d\n",    loadinfo->ehdr.e_shentsize);
+  berr("  e_shnum:      %d\n",    loadinfo->ehdr.e_shnum);
+  berr("  e_shstrndx:   %d\n",    loadinfo->ehdr.e_shstrndx);
 
   if (loadinfo->shdr && loadinfo->ehdr.e_shnum > 0)
     {
       for (i = 0; i < loadinfo->ehdr.e_shnum; i++)
         {
           FAR Elf32_Shdr *shdr = &loadinfo->shdr[i];
-          bdbg("Sections %d:\n", i);
-          bdbg("  sh_name:      %08x\n", shdr->sh_name);
-          bdbg("  sh_type:      %08x\n", shdr->sh_type);
-          bdbg("  sh_flags:     %08x\n", shdr->sh_flags);
-          bdbg("  sh_addr:      %08x\n", shdr->sh_addr);
-          bdbg("  sh_offset:    %d\n",   shdr->sh_offset);
-          bdbg("  sh_size:      %d\n",   shdr->sh_size);
-          bdbg("  sh_link:      %d\n",   shdr->sh_link);
-          bdbg("  sh_info:      %d\n",   shdr->sh_info);
-          bdbg("  sh_addralign: %d\n",   shdr->sh_addralign);
-          bdbg("  sh_entsize:   %d\n",   shdr->sh_entsize);
+          berr("Sections %d:\n", i);
+          berr("  sh_name:      %08x\n", shdr->sh_name);
+          berr("  sh_type:      %08x\n", shdr->sh_type);
+          berr("  sh_flags:     %08x\n", shdr->sh_flags);
+          berr("  sh_addr:      %08x\n", shdr->sh_addr);
+          berr("  sh_offset:    %d\n",   shdr->sh_offset);
+          berr("  sh_size:      %d\n",   shdr->sh_size);
+          berr("  sh_link:      %d\n",   shdr->sh_link);
+          berr("  sh_info:      %d\n",   shdr->sh_info);
+          berr("  sh_addralign: %d\n",   shdr->sh_addralign);
+          berr("  sh_entsize:   %d\n",   shdr->sh_entsize);
         }
     }
 }
@@ -193,7 +193,7 @@ static void elf_dumpentrypt(FAR struct binary_s *binp,
   ret = elf_addrenv_select(loadinfo);
   if (ret < 0)
     {
-      bdbg("ERROR: elf_addrenv_select() failed: %d\n", ret);
+      berr("ERROR: elf_addrenv_select() failed: %d\n", ret);
       return;
     }
 #endif
@@ -207,7 +207,7 @@ static void elf_dumpentrypt(FAR struct binary_s *binp,
   ret = elf_addrenv_restore(loadinfo);
   if (ret < 0)
     {
-      bdbg("ERROR: elf_addrenv_restore() failed: %d\n", ret);
+      berr("ERROR: elf_addrenv_restore() failed: %d\n", ret);
     }
 #endif
 }
@@ -229,7 +229,7 @@ static int elf_loadbinary(FAR struct binary_s *binp)
   struct elf_loadinfo_s loadinfo;  /* Contains globals for libelf */
   int                   ret;
 
-  bvdbg("Loading file: %s\n", binp->filename);
+  binfo("Loading file: %s\n", binp->filename);
 
   /* Initialize the ELF library to load the program binary. */
 
@@ -237,7 +237,7 @@ static int elf_loadbinary(FAR struct binary_s *binp)
   elf_dumploadinfo(&loadinfo);
   if (ret != 0)
     {
-      bdbg("Failed to initialize for load of ELF program: %d\n", ret);
+      berr("Failed to initialize for load of ELF program: %d\n", ret);
       goto errout;
     }
 
@@ -247,7 +247,7 @@ static int elf_loadbinary(FAR struct binary_s *binp)
   elf_dumploadinfo(&loadinfo);
   if (ret != 0)
     {
-      bdbg("Failed to load ELF program binary: %d\n", ret);
+      berr("Failed to load ELF program binary: %d\n", ret);
       goto errout_with_init;
     }
 
@@ -256,7 +256,7 @@ static int elf_loadbinary(FAR struct binary_s *binp)
   ret = elf_bind(&loadinfo, binp->exports, binp->nexports);
   if (ret != 0)
     {
-      bdbg("Failed to bind symbols program binary: %d\n", ret);
+      berr("Failed to bind symbols program binary: %d\n", ret);
       goto errout_with_load;
     }
 
@@ -338,12 +338,12 @@ int elf_initialize(void)
 
   /* Register ourselves as a binfmt loader */
 
-  bvdbg("Registering ELF\n");
+  binfo("Registering ELF\n");
 
   ret = register_binfmt(&g_elfbinfmt);
   if (ret != 0)
     {
-      bdbg("Failed to register binfmt: %d\n", ret);
+      berr("Failed to register binfmt: %d\n", ret);
     }
 
   return ret;
diff --git a/binfmt/libelf/Kconfig b/binfmt/libelf/Kconfig
index 4437914ec3988223b15f329935dd2b94b5d3b8e9..5580a70a4751628ea7f109d93e7e0dba072b8ae6 100644
--- a/binfmt/libelf/Kconfig
+++ b/binfmt/libelf/Kconfig
@@ -35,7 +35,7 @@ config ELF_BUFFERINCR
 config ELF_DUMPBUFFER
 	bool "Dump ELF buffers"
 	default n
-	depends on DEBUG && DEBUG_VERBOSE
+	depends on DEBUG_INFO
 	---help---
 		Dump various ELF buffers for debug purposes
 
diff --git a/binfmt/libelf/libelf_addrenv.c b/binfmt/libelf/libelf_addrenv.c
index 3c01279b2c2b7d959978df03ad88f5b733754896..5e358f58e47455b69512a3cc5aa5abf6a80de2d5 100644
--- a/binfmt/libelf/libelf_addrenv.c
+++ b/binfmt/libelf/libelf_addrenv.c
@@ -101,7 +101,7 @@ int elf_addrenv_alloc(FAR struct elf_loadinfo_s *loadinfo, size_t textsize,
   ret = up_addrenv_create(textsize, datasize, heapsize, &loadinfo->addrenv);
   if (ret < 0)
     {
-      bdbg("ERROR: up_addrenv_create failed: %d\n", ret);
+      berr("ERROR: up_addrenv_create failed: %d\n", ret);
       return ret;
     }
 
@@ -114,14 +114,14 @@ int elf_addrenv_alloc(FAR struct elf_loadinfo_s *loadinfo, size_t textsize,
   ret = up_addrenv_vtext(&loadinfo->addrenv, &vtext);
   if (ret < 0)
     {
-      bdbg("ERROR: up_addrenv_vtext failed: %d\n", ret);
+      berr("ERROR: up_addrenv_vtext failed: %d\n", ret);
       return ret;
     }
 
   ret = up_addrenv_vdata(&loadinfo->addrenv, textsize, &vdata);
   if (ret < 0)
     {
-      bdbg("ERROR: up_adup_addrenv_vdatadrenv_vtext failed: %d\n", ret);
+      berr("ERROR: up_adup_addrenv_vdatadrenv_vtext failed: %d\n", ret);
       return ret;
     }
 
@@ -170,7 +170,7 @@ void elf_addrenv_free(FAR struct elf_loadinfo_s *loadinfo)
   ret = up_addrenv_destroy(&loadinfo->addrenv);
   if (ret < 0)
     {
-      bdbg("ERROR: up_addrenv_destroy failed: %d\n", ret);
+      berr("ERROR: up_addrenv_destroy failed: %d\n", ret);
     }
 #else
   /* If there is an allocation for the ELF image, free it */
diff --git a/binfmt/libelf/libelf_bind.c b/binfmt/libelf/libelf_bind.c
index a4fd589613bc1d222acefb27f04e1c7b37f35d6c..5239f0523c72c513291e67fc6e097d5f6bbe7acd 100644
--- a/binfmt/libelf/libelf_bind.c
+++ b/binfmt/libelf/libelf_bind.c
@@ -55,11 +55,11 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, and CONFIG_DEBUG_BINFMT have to be
+/* CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO, and CONFIG_DEBUG_BINFMT have to be
  * defined or CONFIG_ELF_DUMPBUFFER does nothing.
  */
 
-#if !defined(CONFIG_DEBUG_VERBOSE) || !defined (CONFIG_DEBUG_BINFMT)
+#if !defined(CONFIG_DEBUG_INFO) || !defined (CONFIG_DEBUG_BINFMT)
 #  undef CONFIG_ELF_DUMPBUFFER
 #endif
 
@@ -68,7 +68,7 @@
 #endif
 
 #ifdef CONFIG_ELF_DUMPBUFFER
-# define elf_dumpbuffer(m,b,n) bvdbgdumpbuffer(m,b,n)
+# define elf_dumpbuffer(m,b,n) binfodumpbuffer(m,b,n)
 #else
 # define elf_dumpbuffer(m,b,n)
 #endif
@@ -103,7 +103,7 @@ static inline int elf_readrel(FAR struct elf_loadinfo_s *loadinfo,
 
   if (index < 0 || index > (relsec->sh_size / sizeof(Elf32_Rel)))
     {
-      bdbg("Bad relocation symbol index: %d\n", index);
+      berr("Bad relocation symbol index: %d\n", index);
       return -EINVAL;
     }
 
@@ -156,7 +156,7 @@ static int elf_relocate(FAR struct elf_loadinfo_s *loadinfo, int relidx,
       ret = elf_readrel(loadinfo, relsec, i, &rel);
       if (ret < 0)
         {
-          bdbg("Section %d reloc %d: Failed to read relocation entry: %d\n",
+          berr("Section %d reloc %d: Failed to read relocation entry: %d\n",
                relidx, i, ret);
           return ret;
         }
@@ -172,7 +172,7 @@ static int elf_relocate(FAR struct elf_loadinfo_s *loadinfo, int relidx,
       ret = elf_readsym(loadinfo, symidx, &sym);
       if (ret < 0)
         {
-          bdbg("Section %d reloc %d: Failed to read symbol[%d]: %d\n",
+          berr("Section %d reloc %d: Failed to read symbol[%d]: %d\n",
                relidx, i, symidx, ret);
           return ret;
         }
@@ -194,13 +194,13 @@ static int elf_relocate(FAR struct elf_loadinfo_s *loadinfo, int relidx,
 
           if (ret == -ESRCH)
             {
-              bdbg("Section %d reloc %d: Undefined symbol[%d] has no name: %d\n",
+              berr("Section %d reloc %d: Undefined symbol[%d] has no name: %d\n",
                   relidx, i, symidx, ret);
               psym = NULL;
             }
           else
             {
-              bdbg("Section %d reloc %d: Failed to get value of symbol[%d]: %d\n",
+              berr("Section %d reloc %d: Failed to get value of symbol[%d]: %d\n",
                   relidx, i, symidx, ret);
               return ret;
             }
@@ -210,7 +210,7 @@ static int elf_relocate(FAR struct elf_loadinfo_s *loadinfo, int relidx,
 
       if (rel.r_offset < 0 || rel.r_offset > dstsec->sh_size - sizeof(uint32_t))
         {
-          bdbg("Section %d reloc %d: Relocation address out of range, offset %d size %d\n",
+          berr("Section %d reloc %d: Relocation address out of range, offset %d size %d\n",
                relidx, i, rel.r_offset, dstsec->sh_size);
           return -EINVAL;
         }
@@ -222,7 +222,7 @@ static int elf_relocate(FAR struct elf_loadinfo_s *loadinfo, int relidx,
       ret = up_relocate(&rel, psym, addr);
       if (ret < 0)
         {
-          bdbg("ERROR: Section %d reloc %d: Relocation failed: %d\n", relidx, i, ret);
+          berr("ERROR: Section %d reloc %d: Relocation failed: %d\n", relidx, i, ret);
           return ret;
         }
     }
@@ -233,7 +233,7 @@ static int elf_relocate(FAR struct elf_loadinfo_s *loadinfo, int relidx,
 static int elf_relocateadd(FAR struct elf_loadinfo_s *loadinfo, int relidx,
                            FAR const struct symtab_s *exports, int nexports)
 {
-  bdbg("Not implemented\n");
+  berr("Not implemented\n");
   return -ENOSYS;
 }
 
@@ -278,7 +278,7 @@ int elf_bind(FAR struct elf_loadinfo_s *loadinfo,
   ret = elf_allocbuffer(loadinfo);
   if (ret < 0)
     {
-      bdbg("elf_allocbuffer failed: %d\n", ret);
+      berr("elf_allocbuffer failed: %d\n", ret);
       return -ENOMEM;
     }
 
@@ -291,7 +291,7 @@ int elf_bind(FAR struct elf_loadinfo_s *loadinfo,
   ret = elf_addrenv_select(loadinfo);
   if (ret < 0)
     {
-      bdbg("ERROR: elf_addrenv_select() failed: %d\n", ret);
+      berr("ERROR: elf_addrenv_select() failed: %d\n", ret);
       return ret;
     }
 #endif
@@ -352,7 +352,7 @@ int elf_bind(FAR struct elf_loadinfo_s *loadinfo,
   status = elf_addrenv_restore(loadinfo);
   if (status < 0)
     {
-      bdbg("ERROR: elf_addrenv_restore() failed: %d\n", status);
+      berr("ERROR: elf_addrenv_restore() failed: %d\n", status);
       if (ret == OK)
         {
           ret = status;
diff --git a/binfmt/libelf/libelf_ctors.c b/binfmt/libelf/libelf_ctors.c
index 95f3884135f67bc6aae2b6a92ff7cf72baf82eb3..b957038bc3a0cbbb80697d6ee5c33b09014df02f 100644
--- a/binfmt/libelf/libelf_ctors.c
+++ b/binfmt/libelf/libelf_ctors.c
@@ -103,7 +103,7 @@ int elf_loadctors(FAR struct elf_loadinfo_s *loadinfo)
   ret = elf_allocbuffer(loadinfo);
   if (ret < 0)
     {
-      bdbg("elf_allocbuffer failed: %d\n", ret);
+      berr("elf_allocbuffer failed: %d\n", ret);
       return -ENOMEM;
     }
 
@@ -121,7 +121,7 @@ int elf_loadctors(FAR struct elf_loadinfo_s *loadinfo)
        * static constructor section.
        */
 
-      bvdbg("elf_findsection .ctors section failed: %d\n", ctoridx);
+      binfo("elf_findsection .ctors section failed: %d\n", ctoridx);
       return ret == -ENOENT ? OK : ret;
     }
 
@@ -138,7 +138,7 @@ int elf_loadctors(FAR struct elf_loadinfo_s *loadinfo)
   ctorsize         = shdr->sh_size;
   loadinfo->nctors = ctorsize / sizeof(binfmt_ctor_t);
 
-  bvdbg("ctoridx=%d ctorsize=%d sizeof(binfmt_ctor_t)=%d nctors=%d\n",
+  binfo("ctoridx=%d ctorsize=%d sizeof(binfmt_ctor_t)=%d nctors=%d\n",
         ctoridx, ctorsize,  sizeof(binfmt_ctor_t), loadinfo->nctors);
 
   /* Check if there are any constructors.  It is not an error if there
@@ -166,7 +166,7 @@ int elf_loadctors(FAR struct elf_loadinfo_s *loadinfo)
           loadinfo->ctoralloc = (binfmt_ctor_t *)kumm_malloc(ctorsize);
           if (!loadinfo->ctoralloc)
             {
-              bdbg("Failed to allocate memory for .ctors\n");
+              berr("Failed to allocate memory for .ctors\n");
               return -ENOMEM;
             }
 
@@ -178,7 +178,7 @@ int elf_loadctors(FAR struct elf_loadinfo_s *loadinfo)
                          shdr->sh_offset);
           if (ret < 0)
             {
-              bdbg("Failed to allocate .ctors: %d\n", ret);
+              berr("Failed to allocate .ctors: %d\n", ret);
               return ret;
             }
 
@@ -191,7 +191,7 @@ int elf_loadctors(FAR struct elf_loadinfo_s *loadinfo)
             {
               FAR uintptr_t *ptr = (uintptr_t *)((FAR void *)(&loadinfo->ctors)[i]);
 
-              bvdbg("ctor %d: %08lx + %08lx = %08lx\n",
+              binfo("ctor %d: %08lx + %08lx = %08lx\n",
                     i, *ptr, (unsigned long)loadinfo->textalloc,
                     (unsigned long)(*ptr + loadinfo->textalloc));
 
diff --git a/binfmt/libelf/libelf_dtors.c b/binfmt/libelf/libelf_dtors.c
index 1f4cdab7e3e27cf673f4bf90e05f2c51d34f67b1..6d0b0cff1a449f6a200584adcb955b66d130fbef 100644
--- a/binfmt/libelf/libelf_dtors.c
+++ b/binfmt/libelf/libelf_dtors.c
@@ -103,7 +103,7 @@ int elf_loaddtors(FAR struct elf_loadinfo_s *loadinfo)
   ret = elf_allocbuffer(loadinfo);
   if (ret < 0)
     {
-      bdbg("elf_allocbuffer failed: %d\n", ret);
+      berr("elf_allocbuffer failed: %d\n", ret);
       return -ENOMEM;
     }
 
@@ -121,7 +121,7 @@ int elf_loaddtors(FAR struct elf_loadinfo_s *loadinfo)
        * static destructor section.
        */
 
-      bvdbg("elf_findsection .dtors section failed: %d\n", dtoridx);
+      binfo("elf_findsection .dtors section failed: %d\n", dtoridx);
       return ret == -ENOENT ? OK : ret;
     }
 
@@ -138,7 +138,7 @@ int elf_loaddtors(FAR struct elf_loadinfo_s *loadinfo)
   dtorsize         = shdr->sh_size;
   loadinfo->ndtors = dtorsize / sizeof(binfmt_dtor_t);
 
-  bvdbg("dtoridx=%d dtorsize=%d sizeof(binfmt_dtor_t)=%d ndtors=%d\n",
+  binfo("dtoridx=%d dtorsize=%d sizeof(binfmt_dtor_t)=%d ndtors=%d\n",
         dtoridx, dtorsize,  sizeof(binfmt_dtor_t), loadinfo->ndtors);
 
   /* Check if there are any destructors.  It is not an error if there
@@ -166,7 +166,7 @@ int elf_loaddtors(FAR struct elf_loadinfo_s *loadinfo)
           loadinfo->ctoralloc = (binfmt_dtor_t *)kumm_malloc(dtorsize);
           if (!loadinfo->ctoralloc)
             {
-              bdbg("Failed to allocate memory for .dtors\n");
+              berr("Failed to allocate memory for .dtors\n");
               return -ENOMEM;
             }
 
@@ -178,7 +178,7 @@ int elf_loaddtors(FAR struct elf_loadinfo_s *loadinfo)
                          shdr->sh_offset);
           if (ret < 0)
             {
-              bdbg("Failed to allocate .dtors: %d\n", ret);
+              berr("Failed to allocate .dtors: %d\n", ret);
               return ret;
             }
 
@@ -191,7 +191,7 @@ int elf_loaddtors(FAR struct elf_loadinfo_s *loadinfo)
             {
               FAR uintptr_t *ptr = (uintptr_t *)((FAR void *)(&loadinfo->dtors)[i]);
 
-              bvdbg("dtor %d: %08lx + %08lx = %08lx\n",
+              binfo("dtor %d: %08lx + %08lx = %08lx\n",
                     i, *ptr, (unsigned long)loadinfo->textalloc,
                     (unsigned long)(*ptr + loadinfo->textalloc));
 
diff --git a/binfmt/libelf/libelf_init.c b/binfmt/libelf/libelf_init.c
index 35414fca18371ada5ae84427e64863da73e52144..7307261df623eedaec37ecfde97ef1922c96a9d7 100644
--- a/binfmt/libelf/libelf_init.c
+++ b/binfmt/libelf/libelf_init.c
@@ -56,16 +56,16 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, and CONFIG_DEBUG_BINFMT have to be
+/* CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO, and CONFIG_DEBUG_BINFMT have to be
  * defined or CONFIG_ELF_DUMPBUFFER does nothing.
  */
 
-#if !defined(CONFIG_DEBUG_VERBOSE) || !defined (CONFIG_DEBUG_BINFMT)
+#if !defined(CONFIG_DEBUG_INFO) || !defined (CONFIG_DEBUG_BINFMT)
 #  undef CONFIG_ELF_DUMPBUFFER
 #endif
 
 #ifdef CONFIG_ELF_DUMPBUFFER
-# define elf_dumpbuffer(m,b,n) bvdbgdumpbuffer(m,b,n)
+# define elf_dumpbuffer(m,b,n) binfodumpbuffer(m,b,n)
 #else
 # define elf_dumpbuffer(m,b,n)
 #endif
@@ -102,7 +102,7 @@ static inline int elf_filelen(FAR struct elf_loadinfo_s *loadinfo,
   if (ret < 0)
     {
       int errval = errno;
-      bdbg("Failed to stat file: %d\n", errval);
+      berr("Failed to stat file: %d\n", errval);
       return -errval;
     }
 
@@ -110,7 +110,7 @@ static inline int elf_filelen(FAR struct elf_loadinfo_s *loadinfo,
 
   if (!S_ISREG(buf.st_mode))
     {
-      bdbg("Not a regular file.  mode: %d\n", buf.st_mode);
+      berr("Not a regular file.  mode: %d\n", buf.st_mode);
       return -ENOENT;
     }
 
@@ -145,7 +145,7 @@ int elf_init(FAR const char *filename, FAR struct elf_loadinfo_s *loadinfo)
 {
   int ret;
 
-  bvdbg("filename: %s loadinfo: %p\n", filename, loadinfo);
+  binfo("filename: %s loadinfo: %p\n", filename, loadinfo);
 
   /* Clear the load info structure */
 
@@ -156,7 +156,7 @@ int elf_init(FAR const char *filename, FAR struct elf_loadinfo_s *loadinfo)
   ret = elf_filelen(loadinfo, filename);
   if (ret < 0)
     {
-      bdbg("elf_filelen failed: %d\n", ret);
+      berr("elf_filelen failed: %d\n", ret);
       return ret;
     }
 
@@ -166,7 +166,7 @@ int elf_init(FAR const char *filename, FAR struct elf_loadinfo_s *loadinfo)
   if (loadinfo->filfd < 0)
     {
       int errval = errno;
-      bdbg("Failed to open ELF binary %s: %d\n", filename, errval);
+      berr("Failed to open ELF binary %s: %d\n", filename, errval);
       return -errval;
     }
 
@@ -175,7 +175,7 @@ int elf_init(FAR const char *filename, FAR struct elf_loadinfo_s *loadinfo)
   ret = elf_read(loadinfo, (FAR uint8_t *)&loadinfo->ehdr, sizeof(Elf32_Ehdr), 0);
   if (ret < 0)
     {
-      bdbg("Failed to read ELF header: %d\n", ret);
+      berr("Failed to read ELF header: %d\n", ret);
       return ret;
     }
 
@@ -193,7 +193,7 @@ int elf_init(FAR const char *filename, FAR struct elf_loadinfo_s *loadinfo)
        * is not correctly formed.
        */
 
-      bdbg("Bad ELF header: %d\n", ret);
+      berr("Bad ELF header: %d\n", ret);
       return ret;
     }
 
diff --git a/binfmt/libelf/libelf_iobuffer.c b/binfmt/libelf/libelf_iobuffer.c
index 6e97781a37afbf3b70f2db4bf7cee85d9d450f4d..29abb492deebbc862fcbce184512fcff4f4dc3b2 100644
--- a/binfmt/libelf/libelf_iobuffer.c
+++ b/binfmt/libelf/libelf_iobuffer.c
@@ -87,7 +87,7 @@ int elf_allocbuffer(FAR struct elf_loadinfo_s *loadinfo)
       loadinfo->iobuffer = (FAR uint8_t *)kmm_malloc(CONFIG_ELF_BUFFERSIZE);
       if (!loadinfo->iobuffer)
         {
-          bdbg("Failed to allocate an I/O buffer\n");
+          berr("Failed to allocate an I/O buffer\n");
           return -ENOMEM;
         }
 
@@ -123,7 +123,7 @@ int elf_reallocbuffer(FAR struct elf_loadinfo_s *loadinfo, size_t increment)
    buffer = kmm_realloc((FAR void *)loadinfo->iobuffer, newsize);
    if (!buffer)
     {
-      bdbg("Failed to reallocate the I/O buffer\n");
+      berr("Failed to reallocate the I/O buffer\n");
       return -ENOMEM;
     }
 
diff --git a/binfmt/libelf/libelf_load.c b/binfmt/libelf/libelf_load.c
index b5cef6c6e9c6ac25a88d92e568384cc548338c8d..5b589323f013535f4e899f9fce9ae979aa8cc724 100644
--- a/binfmt/libelf/libelf_load.c
+++ b/binfmt/libelf/libelf_load.c
@@ -156,7 +156,7 @@ static inline int elf_loadfile(FAR struct elf_loadinfo_s *loadinfo)
 
   /* Read each section into memory that is marked SHF_ALLOC + SHT_NOBITS */
 
-  bvdbg("Loaded sections:\n");
+  binfo("Loaded sections:\n");
   text = (FAR uint8_t *)loadinfo->textalloc;
   data = (FAR uint8_t *)loadinfo->dataalloc;
 
@@ -196,7 +196,7 @@ static inline int elf_loadfile(FAR struct elf_loadinfo_s *loadinfo)
           ret = elf_read(loadinfo, *pptr, shdr->sh_size, shdr->sh_offset);
           if (ret < 0)
             {
-              bdbg("ERROR: Failed to read section %d: %d\n", i, ret);
+              berr("ERROR: Failed to read section %d: %d\n", i, ret);
               return ret;
             }
         }
@@ -212,7 +212,7 @@ static inline int elf_loadfile(FAR struct elf_loadinfo_s *loadinfo)
 
       /* Update sh_addr to point to copy in memory */
 
-      bvdbg("%d. %08lx->%08lx\n", i,
+      binfo("%d. %08lx->%08lx\n", i,
             (unsigned long)shdr->sh_addr, (unsigned long)*pptr);
 
       shdr->sh_addr = (uintptr_t)*pptr;
@@ -250,7 +250,7 @@ int elf_load(FAR struct elf_loadinfo_s *loadinfo)
 #endif
   int ret;
 
-  bvdbg("loadinfo: %p\n", loadinfo);
+  binfo("loadinfo: %p\n", loadinfo);
   DEBUGASSERT(loadinfo && loadinfo->filfd >= 0);
 
   /* Load section headers into memory */
@@ -258,7 +258,7 @@ int elf_load(FAR struct elf_loadinfo_s *loadinfo)
   ret = elf_loadshdrs(loadinfo);
   if (ret < 0)
     {
-      bdbg("ERROR: elf_loadshdrs failed: %d\n", ret);
+      berr("ERROR: elf_loadshdrs failed: %d\n", ret);
       goto errout_with_buffers;
     }
 
@@ -286,7 +286,7 @@ int elf_load(FAR struct elf_loadinfo_s *loadinfo)
   ret = elf_addrenv_alloc(loadinfo, loadinfo->textsize, loadinfo->datasize, heapsize);
   if (ret < 0)
     {
-      bdbg("ERROR: elf_addrenv_alloc() failed: %d\n", ret);
+      berr("ERROR: elf_addrenv_alloc() failed: %d\n", ret);
       goto errout_with_buffers;
     }
 
@@ -299,7 +299,7 @@ int elf_load(FAR struct elf_loadinfo_s *loadinfo)
   ret = elf_addrenv_select(loadinfo);
   if (ret < 0)
     {
-      bdbg("ERROR: elf_addrenv_select() failed: %d\n", ret);
+      berr("ERROR: elf_addrenv_select() failed: %d\n", ret);
       goto errout_with_buffers;
     }
 #endif
@@ -309,7 +309,7 @@ int elf_load(FAR struct elf_loadinfo_s *loadinfo)
   ret = elf_loadfile(loadinfo);
   if (ret < 0)
     {
-      bdbg("ERROR: elf_loadfile failed: %d\n", ret);
+      berr("ERROR: elf_loadfile failed: %d\n", ret);
       goto errout_with_addrenv;
     }
 
@@ -319,14 +319,14 @@ int elf_load(FAR struct elf_loadinfo_s *loadinfo)
   ret = elf_loadctors(loadinfo);
   if (ret < 0)
     {
-      bdbg("ERROR: elf_loadctors failed: %d\n", ret);
+      berr("ERROR: elf_loadctors failed: %d\n", ret);
       goto errout_with_addrenv;
     }
 
   ret = elf_loaddtors(loadinfo);
   if (ret < 0)
     {
-      bdbg("ERROR: elf_loaddtors failed: %d\n", ret);
+      berr("ERROR: elf_loaddtors failed: %d\n", ret);
       goto errout_with_addrenv;
     }
 #endif
@@ -335,7 +335,7 @@ int elf_load(FAR struct elf_loadinfo_s *loadinfo)
   exidx = elf_findsection(loadinfo, CONFIG_ELF_EXIDX_SECTNAME);
   if (exidx < 0)
     {
-      bvdbg("elf_findsection: Exception Index section not found: %d\n", exidx);
+      binfo("elf_findsection: Exception Index section not found: %d\n", exidx);
     }
   else
     {
@@ -349,7 +349,7 @@ int elf_load(FAR struct elf_loadinfo_s *loadinfo)
   ret = elf_addrenv_restore(loadinfo);
   if (ret < 0)
     {
-      bdbg("ERROR: elf_addrenv_restore() failed: %d\n", ret);
+      berr("ERROR: elf_addrenv_restore() failed: %d\n", ret);
       goto errout_with_buffers;
     }
 #endif
diff --git a/binfmt/libelf/libelf_read.c b/binfmt/libelf/libelf_read.c
index 420c8f1808932c39f72164d98b7ad0976cd95ba0..cdadf4444e381bb753e6a7b3d18bd8a9bcf6a77a 100644
--- a/binfmt/libelf/libelf_read.c
+++ b/binfmt/libelf/libelf_read.c
@@ -115,7 +115,7 @@ int elf_read(FAR struct elf_loadinfo_s *loadinfo, FAR uint8_t *buffer,
   ssize_t nbytes;      /* Number of bytes read */
   off_t   rpos;        /* Position returned by lseek */
 
-  bvdbg("Read %ld bytes from offset %ld\n", (long)readsize, (long)offset);
+  binfo("Read %ld bytes from offset %ld\n", (long)readsize, (long)offset);
 
   /* Loop until all of the requested data has been read. */
 
@@ -127,7 +127,7 @@ int elf_read(FAR struct elf_loadinfo_s *loadinfo, FAR uint8_t *buffer,
       if (rpos != offset)
         {
           int errval = errno;
-          bdbg("Failed to seek to position %lu: %d\n",
+          berr("Failed to seek to position %lu: %d\n",
                (unsigned long)offset, errval);
           return -errval;
         }
@@ -143,14 +143,14 @@ int elf_read(FAR struct elf_loadinfo_s *loadinfo, FAR uint8_t *buffer,
 
            if (errval != EINTR)
              {
-               bdbg("Read from offset %lu failed: %d\n",
+               berr("Read from offset %lu failed: %d\n",
                     (unsigned long)offset, errval);
                return -errval;
              }
          }
        else if (nbytes == 0)
          {
-           bdbg("Unexpected end of file\n");
+           berr("Unexpected end of file\n");
            return -ENODATA;
          }
        else
diff --git a/binfmt/libelf/libelf_sections.c b/binfmt/libelf/libelf_sections.c
index 26189d72479788c3679de5e6cfef4e227b6a5964..8f4369d367dc3cc970534be20d450b9318d3750d 100644
--- a/binfmt/libelf/libelf_sections.c
+++ b/binfmt/libelf/libelf_sections.c
@@ -93,7 +93,7 @@ static inline int elf_sectname(FAR struct elf_loadinfo_s *loadinfo,
   shstrndx = loadinfo->ehdr.e_shstrndx;
   if (shstrndx == SHN_UNDEF)
     {
-      bdbg("No section header string table\n");
+      berr("No section header string table\n");
       return -EINVAL;
     }
 
@@ -126,7 +126,7 @@ static inline int elf_sectname(FAR struct elf_loadinfo_s *loadinfo,
         {
           if (loadinfo->filelen <= offset)
             {
-              bdbg("At end of file\n");
+              berr("At end of file\n");
               return -EINVAL;
             }
 
@@ -139,7 +139,7 @@ static inline int elf_sectname(FAR struct elf_loadinfo_s *loadinfo,
       ret = elf_read(loadinfo, buffer, readlen, offset);
       if (ret < 0)
         {
-          bdbg("Failed to read section name\n");
+          berr("Failed to read section name\n");
           return ret;
         }
 
@@ -159,7 +159,7 @@ static inline int elf_sectname(FAR struct elf_loadinfo_s *loadinfo,
       ret = elf_reallocbuffer(loadinfo, CONFIG_ELF_BUFFERINCR);
       if (ret < 0)
         {
-          bdbg("elf_reallocbuffer failed: %d\n", ret);
+          berr("elf_reallocbuffer failed: %d\n", ret);
           return ret;
         }
     }
@@ -196,7 +196,7 @@ int elf_loadshdrs(FAR struct elf_loadinfo_s *loadinfo)
 
   if (loadinfo->ehdr.e_shnum < 1)
     {
-      bdbg("No sections(?)\n");
+      berr("No sections(?)\n");
       return -EINVAL;
     }
 
@@ -205,7 +205,7 @@ int elf_loadshdrs(FAR struct elf_loadinfo_s *loadinfo)
   shdrsize = (size_t)loadinfo->ehdr.e_shentsize * (size_t)loadinfo->ehdr.e_shnum;
   if (loadinfo->ehdr.e_shoff + shdrsize > loadinfo->filelen)
     {
-      bdbg("Insufficent space in file for section header table\n");
+      berr("Insufficent space in file for section header table\n");
       return -ESPIPE;
     }
 
@@ -214,7 +214,7 @@ int elf_loadshdrs(FAR struct elf_loadinfo_s *loadinfo)
   loadinfo->shdr = (FAR FAR Elf32_Shdr *)kmm_malloc(shdrsize);
   if (!loadinfo->shdr)
     {
-      bdbg("Failed to allocate the section header table. Size: %ld\n",
+      berr("Failed to allocate the section header table. Size: %ld\n",
            (long)shdrsize);
       return -ENOMEM;
     }
@@ -225,7 +225,7 @@ int elf_loadshdrs(FAR struct elf_loadinfo_s *loadinfo)
                  loadinfo->ehdr.e_shoff);
   if (ret < 0)
     {
-      bdbg("Failed to read section header table: %d\n", ret);
+      berr("Failed to read section header table: %d\n", ret);
     }
 
   return ret;
@@ -264,13 +264,13 @@ int elf_findsection(FAR struct elf_loadinfo_s *loadinfo,
       ret  = elf_sectname(loadinfo, shdr);
       if (ret < 0)
         {
-          bdbg("elf_sectname failed: %d\n", ret);
+          berr("elf_sectname failed: %d\n", ret);
           return ret;
         }
 
       /* Check if the name of this section is 'sectname' */
 
-      bvdbg("%d. Comparing \"%s\" and .\"%s\"\n",
+      binfo("%d. Comparing \"%s\" and .\"%s\"\n",
             i, loadinfo->iobuffer, sectname);
 
       if (strcmp((FAR const char *)loadinfo->iobuffer, sectname) == 0)
diff --git a/binfmt/libelf/libelf_symbols.c b/binfmt/libelf/libelf_symbols.c
index 17694815585b72ce7f6d63944cd7dc3b3789d606..ba67034e540f60c443e40afae96561965b7d572f 100644
--- a/binfmt/libelf/libelf_symbols.c
+++ b/binfmt/libelf/libelf_symbols.c
@@ -97,7 +97,7 @@ static int elf_symname(FAR struct elf_loadinfo_s *loadinfo,
 
   if (sym->st_name == 0)
     {
-      bdbg("Symbol has no name\n");
+      berr("Symbol has no name\n");
       return -ESRCH;
     }
 
@@ -116,7 +116,7 @@ static int elf_symname(FAR struct elf_loadinfo_s *loadinfo,
         {
           if (loadinfo->filelen <= offset)
             {
-              bdbg("At end of file\n");
+              berr("At end of file\n");
               return -EINVAL;
             }
 
@@ -129,7 +129,7 @@ static int elf_symname(FAR struct elf_loadinfo_s *loadinfo,
       ret = elf_read(loadinfo, buffer, readlen, offset);
       if (ret < 0)
         {
-          bdbg("elf_read failed: %d\n", ret);
+          berr("elf_read failed: %d\n", ret);
           return ret;
         }
 
@@ -149,7 +149,7 @@ static int elf_symname(FAR struct elf_loadinfo_s *loadinfo,
       ret = elf_reallocbuffer(loadinfo, CONFIG_ELF_BUFFERINCR);
       if (ret < 0)
         {
-          bdbg("elf_reallocbuffer failed: %d\n", ret);
+          berr("elf_reallocbuffer failed: %d\n", ret);
           return ret;
         }
     }
@@ -195,7 +195,7 @@ int elf_findsymtab(FAR struct elf_loadinfo_s *loadinfo)
 
   if (loadinfo->symtabidx == 0)
     {
-      bdbg("No symbols in ELF file\n");
+      berr("No symbols in ELF file\n");
       return -EINVAL;
     }
 
@@ -229,7 +229,7 @@ int elf_readsym(FAR struct elf_loadinfo_s *loadinfo, int index,
 
   if (index < 0 || index > (symtab->sh_size / sizeof(Elf32_Sym)))
     {
-      bdbg("Bad relocation symbol index: %d\n", index);
+      berr("Bad relocation symbol index: %d\n", index);
       return -EINVAL;
     }
 
@@ -278,7 +278,7 @@ int elf_symvalue(FAR struct elf_loadinfo_s *loadinfo, FAR Elf32_Sym *sym,
       {
         /* NuttX ELF modules should be compiled with -fno-common. */
 
-        bdbg("SHN_COMMON: Re-compile with -fno-common\n");
+        berr("SHN_COMMON: Re-compile with -fno-common\n");
         return -ENOSYS;
       }
 
@@ -286,7 +286,7 @@ int elf_symvalue(FAR struct elf_loadinfo_s *loadinfo, FAR Elf32_Sym *sym,
       {
         /* st_value already holds the correct value */
 
-        bvdbg("SHN_ABS: st_value=%08lx\n", (long)sym->st_value);
+        binfo("SHN_ABS: st_value=%08lx\n", (long)sym->st_value);
         return OK;
       }
 
@@ -303,7 +303,7 @@ int elf_symvalue(FAR struct elf_loadinfo_s *loadinfo, FAR Elf32_Sym *sym,
              * indicate the nameless symbol.
              */
 
-            bdbg("SHN_UNDEF: Failed to get symbol name: %d\n", ret);
+            berr("SHN_UNDEF: Failed to get symbol name: %d\n", ret);
             return ret;
           }
 
@@ -316,13 +316,13 @@ int elf_symvalue(FAR struct elf_loadinfo_s *loadinfo, FAR Elf32_Sym *sym,
 #endif
         if (!symbol)
           {
-            bdbg("SHN_UNDEF: Exported symbol \"%s\" not found\n", loadinfo->iobuffer);
+            berr("SHN_UNDEF: Exported symbol \"%s\" not found\n", loadinfo->iobuffer);
             return -ENOENT;
           }
 
         /* Yes... add the exported symbol value to the ELF symbol table entry */
 
-        bvdbg("SHN_ABS: name=%s %08x+%08x=%08x\n",
+        binfo("SHN_ABS: name=%s %08x+%08x=%08x\n",
               loadinfo->iobuffer, sym->st_value, symbol->sym_value,
               sym->st_value + symbol->sym_value);
 
@@ -334,7 +334,7 @@ int elf_symvalue(FAR struct elf_loadinfo_s *loadinfo, FAR Elf32_Sym *sym,
       {
         secbase = loadinfo->shdr[sym->st_shndx].sh_addr;
 
-        bvdbg("Other: %08x+%08x=%08x\n",
+        binfo("Other: %08x+%08x=%08x\n",
               sym->st_value, secbase, sym->st_value + secbase);
 
         sym->st_value += secbase;
diff --git a/binfmt/libelf/libelf_verify.c b/binfmt/libelf/libelf_verify.c
index 015d9d39fe191d0ad9bd2b1c7f27e9b637c81db7..26cb51ae7c26f43f1f9e91e649992940a819d395 100644
--- a/binfmt/libelf/libelf_verify.c
+++ b/binfmt/libelf/libelf_verify.c
@@ -87,7 +87,7 @@ int elf_verifyheader(FAR const Elf32_Ehdr *ehdr)
 {
   if (!ehdr)
     {
-      bdbg("NULL ELF header!");
+      berr("NULL ELF header!");
       return -ENOEXEC;
     }
 
@@ -95,7 +95,7 @@ int elf_verifyheader(FAR const Elf32_Ehdr *ehdr)
 
   if (memcmp(ehdr->e_ident, g_elfmagic, EI_MAGIC_SIZE) != 0)
     {
-      bvdbg("Not ELF magic {%02x, %02x, %02x, %02x}\n",
+      binfo("Not ELF magic {%02x, %02x, %02x, %02x}\n",
             ehdr->e_ident[0], ehdr->e_ident[1], ehdr->e_ident[2], ehdr->e_ident[3]);
       return -ENOEXEC;
     }
@@ -104,7 +104,7 @@ int elf_verifyheader(FAR const Elf32_Ehdr *ehdr)
 
   if (ehdr->e_type != ET_REL)
     {
-      bdbg("Not a relocatable file: e_type=%d\n", ehdr->e_type);
+      berr("Not a relocatable file: e_type=%d\n", ehdr->e_type);
       return -EINVAL;
     }
 
@@ -112,7 +112,7 @@ int elf_verifyheader(FAR const Elf32_Ehdr *ehdr)
 
   if (up_checkarch(ehdr))
     {
-      bdbg("Not a supported architecture\n");
+      berr("Not a supported architecture\n");
       return -ENOEXEC;
     }
 
diff --git a/binfmt/libnxflat/Kconfig b/binfmt/libnxflat/Kconfig
index 0a11f8c083bbe390e385fb28329d6e54acbe0b46..66c0031528e0192ca9e0bd9180210f8675e8c166 100644
--- a/binfmt/libnxflat/Kconfig
+++ b/binfmt/libnxflat/Kconfig
@@ -6,4 +6,4 @@
 config NXFLAT_DUMPBUFFER
 	bool "Dump NXFLAT buffers"
 	default n
-	depends on DEBUG && DEBUG_VERBOSE
+	depends on DEBUG_INFO
diff --git a/binfmt/libnxflat/libnxflat_addrenv.c b/binfmt/libnxflat/libnxflat_addrenv.c
index 92840dc02d5369417db2e1dfb92be52089886637..9ca8add7cce40350736ecf9eb6236f283818ff3f 100644
--- a/binfmt/libnxflat/libnxflat_addrenv.c
+++ b/binfmt/libnxflat/libnxflat_addrenv.c
@@ -103,7 +103,7 @@ int nxflat_addrenv_alloc(FAR struct nxflat_loadinfo_s *loadinfo, size_t envsize)
   dspace = (FAR struct dspace_s *)kmm_malloc(sizeof(struct dspace_s));
   if (dspace == 0)
     {
-      bdbg("ERROR: Failed to allocate DSpace\n");
+      berr("ERROR: Failed to allocate DSpace\n");
       return -ENOMEM;
     }
 
@@ -124,7 +124,7 @@ int nxflat_addrenv_alloc(FAR struct nxflat_loadinfo_s *loadinfo, size_t envsize)
   ret = up_addrenv_create(0, envsize, heapsize, &loadinfo->addrenv);
   if (ret < 0)
     {
-      bdbg("ERROR: up_addrenv_create failed: %d\n", ret);
+      berr("ERROR: up_addrenv_create failed: %d\n", ret);
       goto errout_with_dspace;
     }
 
@@ -137,7 +137,7 @@ int nxflat_addrenv_alloc(FAR struct nxflat_loadinfo_s *loadinfo, size_t envsize)
   ret = up_addrenv_vdata(&loadinfo->addrenv, 0, &vdata);
   if (ret < 0)
     {
-      bdbg("ERROR: up_addrenv_vdata failed: %d\n", ret);
+      berr("ERROR: up_addrenv_vdata failed: %d\n", ret);
       goto errout_with_addrenv;
     }
 
@@ -148,7 +148,7 @@ int nxflat_addrenv_alloc(FAR struct nxflat_loadinfo_s *loadinfo, size_t envsize)
   ret = up_addrenv_select(loadinfo->addrenv, &oldenv);
   if (ret < 0)
     {
-      bdbg("ERROR: up_addrenv_select failed: %d\n", ret);
+      berr("ERROR: up_addrenv_select failed: %d\n", ret);
       goto errout_with_addrenv;
     }
 
@@ -157,7 +157,7 @@ int nxflat_addrenv_alloc(FAR struct nxflat_loadinfo_s *loadinfo, size_t envsize)
   ret = up_addrenv_restore(oldenv);
   if (ret < 0)
     {
-      bdbg("ERROR: up_addrenv_restore failed: %d\n", ret);
+      berr("ERROR: up_addrenv_restore failed: %d\n", ret);
       goto errout_with_addrenv;
     }
 
@@ -227,7 +227,7 @@ void nxflat_addrenv_free(FAR struct nxflat_loadinfo_s *loadinfo)
       ret = up_addrenv_destroy(loadinfo->addrenv);
       if (ret < 0)
         {
-          bdbg("ERROR: up_addrenv_destroy failed: %d\n", ret);
+          berr("ERROR: up_addrenv_destroy failed: %d\n", ret);
         }
 
       loadinfo->addrenv = 0;
diff --git a/binfmt/libnxflat/libnxflat_bind.c b/binfmt/libnxflat/libnxflat_bind.c
index 3c1709b2a5be2ee0bbb0a00debbf6fed82d3abaa..71c3b8d57d139f062db6062c2b780431dde3d84d 100644
--- a/binfmt/libnxflat/libnxflat_bind.c
+++ b/binfmt/libnxflat/libnxflat_bind.c
@@ -58,16 +58,16 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, and CONFIG_DEBUG_BINFMT have to be
+/* CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO, and CONFIG_DEBUG_BINFMT have to be
  * defined or CONFIG_NXFLAT_DUMPBUFFER does nothing.
  */
 
-#if !defined(CONFIG_DEBUG_VERBOSE) || !defined (CONFIG_DEBUG_BINFMT)
+#if !defined(CONFIG_DEBUG_INFO) || !defined (CONFIG_DEBUG_BINFMT)
 #  undef CONFIG_NXFLAT_DUMPBUFFER
 #endif
 
 #ifdef CONFIG_NXFLAT_DUMPBUFFER
-# define nxflat_dumpbuffer(m,b,n) bvdbgdumpbuffer(m,b,n)
+# define nxflat_dumpbuffer(m,b,n) binfodumpbuffer(m,b,n)
 #else
 # define nxflat_dumpbuffer(m,b,n)
 #endif
@@ -104,20 +104,20 @@ static inline int nxflat_bindrel32i(FAR struct nxflat_loadinfo_s *loadinfo,
 {
   FAR uint32_t *addr;
 
-  bvdbg("NXFLAT_RELOC_TYPE_REL32I Offset: %08x I-Space: %p\n",
+  binfo("NXFLAT_RELOC_TYPE_REL32I Offset: %08x I-Space: %p\n",
         offset, loadinfo->ispace + sizeof(struct nxflat_hdr_s));
 
   if (offset < loadinfo->dsize)
     {
       addr = (FAR uint32_t *)(offset + loadinfo->dspace->region);
-      bvdbg("  Before: %08x\n", *addr);
+      binfo("  Before: %08x\n", *addr);
      *addr += (uint32_t)(loadinfo->ispace + sizeof(struct nxflat_hdr_s));
-      bvdbg("  After: %08x\n", *addr);
+      binfo("  After: %08x\n", *addr);
       return OK;
     }
   else
     {
-      bdbg("Offset: %08 does not lie in D-Space size: %08x\n",
+      berr("Offset: %08 does not lie in D-Space size: %08x\n",
            offset, loadinfo->dsize);
       return -EINVAL;
     }
@@ -143,20 +143,20 @@ static inline int nxflat_bindrel32d(FAR struct nxflat_loadinfo_s *loadinfo,
 {
   FAR uint32_t *addr;
 
-  bvdbg("NXFLAT_RELOC_TYPE_REL32D Offset: %08x D-Space: %p\n",
+  binfo("NXFLAT_RELOC_TYPE_REL32D Offset: %08x D-Space: %p\n",
         offset, loadinfo->dspace->region);
 
   if (offset < loadinfo->dsize)
     {
       addr = (FAR uint32_t *)(offset + loadinfo->dspace->region);
-      bvdbg("  Before: %08x\n", *addr);
+      binfo("  Before: %08x\n", *addr);
      *addr += (uint32_t)(loadinfo->dspace->region);
-      bvdbg("  After: %08x\n", *addr);
+      binfo("  After: %08x\n", *addr);
       return OK;
     }
   else
     {
-      bdbg("Offset: %08 does not lie in D-Space size: %08x\n",
+      berr("Offset: %08 does not lie in D-Space size: %08x\n",
            offset, loadinfo->dsize);
       return -EINVAL;
     }
@@ -185,20 +185,20 @@ static inline int nxflat_bindrel32id(FAR struct nxflat_loadinfo_s *loadinfo,
 {
   FAR uint32_t *addr;
 
-  bvdbg("NXFLAT_RELOC_TYPE_REL32D Offset: %08x D-Space: %p\n",
+  binfo("NXFLAT_RELOC_TYPE_REL32D Offset: %08x D-Space: %p\n",
         offset, loadinfo->dspace->region);
 
   if (offset < loadinfo->dsize)
     {
       addr = (FAR uint32_t *)(offset + loadinfo->dspace->region);
-      bvdbg("  Before: %08x\n", *addr);
+      binfo("  Before: %08x\n", *addr);
      *addr += ((uint32_t)loadinfo->ispace - (uint32_t)(loadinfo->dspace->region));
-      bvdbg("  After: %08x\n", *addr);
+      binfo("  After: %08x\n", *addr);
       return OK;
     }
   else
     {
-      bdbg("Offset: %08 does not lie in D-Space size: %08x\n",
+      berr("Offset: %08 does not lie in D-Space size: %08x\n",
            offset, loadinfo->dsize);
       return -EINVAL;
     }
@@ -237,7 +237,7 @@ static inline int nxflat_gotrelocs(FAR struct nxflat_loadinfo_s *loadinfo)
 
   offset  = ntohl(hdr->h_relocstart);
   nrelocs = ntohs(hdr->h_reloccount);
-  bvdbg("offset: %08lx nrelocs: %d\n", (long)offset, nrelocs);
+  binfo("offset: %08lx nrelocs: %d\n", (long)offset, nrelocs);
 
   /* The value of the relocation list that we get from the header is a
    * file offset.  We will have to convert this to an offset into the
@@ -251,7 +251,7 @@ static inline int nxflat_gotrelocs(FAR struct nxflat_loadinfo_s *loadinfo)
 
   relocs = (FAR struct nxflat_reloc_s *)
         (offset - loadinfo->isize + loadinfo->dspace->region);
-  bvdbg("isize: %08lx dpsace: %p relocs: %p\n",
+  binfo("isize: %08lx dpsace: %p relocs: %p\n",
         (long)loadinfo->isize, loadinfo->dspace->region, relocs);
 
   /* All relocations are performed within the D-Space allocation.  If
@@ -265,7 +265,7 @@ static inline int nxflat_gotrelocs(FAR struct nxflat_loadinfo_s *loadinfo)
   ret = nxflat_addrenv_select(loadinfo);
   if (ret < 0)
     {
-      bdbg("ERROR: nxflat_addrenv_select() failed: %d\n", ret);
+      berr("ERROR: nxflat_addrenv_select() failed: %d\n", ret);
       return ret;
     }
 #endif
@@ -329,7 +329,7 @@ static inline int nxflat_gotrelocs(FAR struct nxflat_loadinfo_s *loadinfo)
 
         default:
           {
-            bdbg("ERROR: Unrecognized relocation type: %d\n", NXFLAT_RELOC_TYPE(reloc.r_info));
+            berr("ERROR: Unrecognized relocation type: %d\n", NXFLAT_RELOC_TYPE(reloc.r_info));
             result = -EINVAL;
           }
           break;
@@ -359,7 +359,7 @@ static inline int nxflat_gotrelocs(FAR struct nxflat_loadinfo_s *loadinfo)
   ret = nxflat_addrenv_restore(loadinfo);
   if (ret < 0)
     {
-      bdbg("ERROR: nxflat_addrenv_restore() failed: %d\n", ret);
+      berr("ERROR: nxflat_addrenv_restore() failed: %d\n", ret);
     }
 #endif
 
@@ -405,7 +405,7 @@ static inline int nxflat_bindimports(FAR struct nxflat_loadinfo_s *loadinfo,
 
   offset   = ntohl(hdr->h_importsymbols);
   nimports = ntohs(hdr->h_importcount);
-  bvdbg("Imports offset: %08x nimports: %d\n", offset, nimports);
+  binfo("Imports offset: %08x nimports: %d\n", offset, nimports);
 
   /* The import[] table resides within the D-Space allocation.  If
    * CONFIG_ARCH_ADDRENV=y, then that D-Space allocation lies in an address
@@ -418,7 +418,7 @@ static inline int nxflat_bindimports(FAR struct nxflat_loadinfo_s *loadinfo,
   ret = nxflat_addrenv_select(loadinfo);
   if (ret < 0)
     {
-      bdbg("ERROR: nxflat_addrenv_select() failed: %d\n", ret);
+      berr("ERROR: nxflat_addrenv_select() failed: %d\n", ret);
       return ret;
     }
 #endif
@@ -450,7 +450,7 @@ static inline int nxflat_bindimports(FAR struct nxflat_loadinfo_s *loadinfo,
 
       for (i = 0; i < nimports; i++)
         {
-          bvdbg("Import[%d] (%08p) offset: %08x func: %08x\n",
+          binfo("Import[%d] (%08p) offset: %08x func: %08x\n",
                 i, &imports[i], imports[i].i_funcname, imports[i].i_funcaddress);
 
           /* Get a pointer to the imported symbol name.  The name itself
@@ -473,7 +473,7 @@ static inline int nxflat_bindimports(FAR struct nxflat_loadinfo_s *loadinfo,
 #endif
           if (!symbol)
             {
-              bdbg("Exported symbol \"%s\" not found\n", symname);
+              berr("Exported symbol \"%s\" not found\n", symname);
 #ifdef CONFIG_ARCH_ADDRENV
               (void)nxflat_addrenv_restore(loadinfo);
 #endif
@@ -484,7 +484,7 @@ static inline int nxflat_bindimports(FAR struct nxflat_loadinfo_s *loadinfo,
 
           imports[i].i_funcaddress =  (uint32_t)symbol->sym_value;
 
-          bvdbg("Bound import[%d] (%08p) to export '%s' (%08x)\n",
+          binfo("Bound import[%d] (%08p) to export '%s' (%08x)\n",
                 i, &imports[i], symname, imports[i].i_funcaddress);
         }
     }
@@ -504,7 +504,7 @@ static inline int nxflat_bindimports(FAR struct nxflat_loadinfo_s *loadinfo,
   ret = nxflat_addrenv_restore(loadinfo);
   if (ret < 0)
     {
-      bdbg("ERROR: nxflat_addrenv_restore() failed: %d\n", ret);
+      berr("ERROR: nxflat_addrenv_restore() failed: %d\n", ret);
     }
 
   return ret;
@@ -542,7 +542,7 @@ static inline int nxflat_clearbss(FAR struct nxflat_loadinfo_s *loadinfo)
   ret = nxflat_addrenv_select(loadinfo);
   if (ret < 0)
     {
-      bdbg("ERROR: nxflat_addrenv_select() failed: %d\n", ret);
+      berr("ERROR: nxflat_addrenv_select() failed: %d\n", ret);
       return ret;
     }
 #endif
@@ -558,7 +558,7 @@ static inline int nxflat_clearbss(FAR struct nxflat_loadinfo_s *loadinfo)
   ret = nxflat_addrenv_restore(loadinfo);
   if (ret < 0)
     {
-      bdbg("ERROR: nxflat_addrenv_restore() failed: %d\n", ret);
+      berr("ERROR: nxflat_addrenv_restore() failed: %d\n", ret);
     }
 
   return ret;
diff --git a/binfmt/libnxflat/libnxflat_init.c b/binfmt/libnxflat/libnxflat_init.c
index 52159c5f03199c9f29c4903c88cab884fb3c07df..eff6cd8b29dad8065a2e190cdb41b62edafd352f 100644
--- a/binfmt/libnxflat/libnxflat_init.c
+++ b/binfmt/libnxflat/libnxflat_init.c
@@ -54,16 +54,16 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, and CONFIG_DEBUG_BINFMT have to be
+/* CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO, and CONFIG_DEBUG_BINFMT have to be
  * defined or CONFIG_NXFLAT_DUMPBUFFER does nothing.
  */
 
-#if !defined(CONFIG_DEBUG_VERBOSE) || !defined (CONFIG_DEBUG_BINFMT)
+#if !defined(CONFIG_DEBUG_INFO) || !defined (CONFIG_DEBUG_BINFMT)
 #  undef CONFIG_NXFLAT_DUMPBUFFER
 #endif
 
 #ifdef CONFIG_NXFLAT_DUMPBUFFER
-# define nxflat_dumpbuffer(m,b,n) bvdbgdumpbuffer(m,b,n)
+# define nxflat_dumpbuffer(m,b,n) binfodumpbuffer(m,b,n)
 #else
 # define nxflat_dumpbuffer(m,b,n)
 #endif
@@ -100,7 +100,7 @@ int nxflat_init(const char *filename, struct nxflat_loadinfo_s *loadinfo)
   uint32_t bssend;
   int      ret;
 
-  bvdbg("filename: %s loadinfo: %p\n", filename, loadinfo);
+  binfo("filename: %s loadinfo: %p\n", filename, loadinfo);
 
   /* Clear the load info structure */
 
@@ -112,7 +112,7 @@ int nxflat_init(const char *filename, struct nxflat_loadinfo_s *loadinfo)
   if (loadinfo->filfd < 0)
     {
       int errval = errno;
-      bdbg("Failed to open NXFLAT binary %s: %d\n", filename, errval);
+      berr("Failed to open NXFLAT binary %s: %d\n", filename, errval);
       return -errval;
     }
 
@@ -122,7 +122,7 @@ int nxflat_init(const char *filename, struct nxflat_loadinfo_s *loadinfo)
                     sizeof(struct nxflat_hdr_s), 0);
   if (ret < 0)
     {
-      bdbg("Failed to read NXFLAT header: %d\n", ret);
+      berr("Failed to read NXFLAT header: %d\n", ret);
       return ret;
     }
 
@@ -140,7 +140,7 @@ int nxflat_init(const char *filename, struct nxflat_loadinfo_s *loadinfo)
        * done so.
        */
 
-      bdbg("Bad NXFLAT header\n");
+      berr("Bad NXFLAT header\n");
       return -ENOEXEC;
     }
 
diff --git a/binfmt/libnxflat/libnxflat_load.c b/binfmt/libnxflat/libnxflat_load.c
index a3e49d3ce1d245f7397759dcc6bd548ff233cd9d..c849daf7de2e1e51203178df24f00e7a33b0efef 100644
--- a/binfmt/libnxflat/libnxflat_load.c
+++ b/binfmt/libnxflat/libnxflat_load.c
@@ -150,11 +150,11 @@ int nxflat_load(struct nxflat_loadinfo_s *loadinfo)
                                     MAP_SHARED | MAP_FILE, loadinfo->filfd, 0);
   if (loadinfo->ispace == (uint32_t)MAP_FAILED)
     {
-      bdbg("Failed to map NXFLAT ISpace: %d\n", errno);
+      berr("Failed to map NXFLAT ISpace: %d\n", errno);
       return -errno;
     }
 
-  bvdbg("Mapped ISpace (%d bytes) at %08x\n", loadinfo->isize, loadinfo->ispace);
+  binfo("Mapped ISpace (%d bytes) at %08x\n", loadinfo->isize, loadinfo->ispace);
 
   /* The following call allocate D-Space memory and will provide a pointer
    * to the allocated (but still uninitialized) D-Space memory.
@@ -163,11 +163,11 @@ int nxflat_load(struct nxflat_loadinfo_s *loadinfo)
   ret = nxflat_addrenv_alloc(loadinfo, loadinfo->dsize);
   if (ret < 0)
     {
-      bdbg("ERROR: nxflat_addrenv_alloc() failed: %d\n", ret);
+      berr("ERROR: nxflat_addrenv_alloc() failed: %d\n", ret);
       return ret;
     }
 
-  bvdbg("Allocated DSpace (%d bytes) at %p\n",
+  binfo("Allocated DSpace (%d bytes) at %p\n",
         loadinfo->dsize, loadinfo->dspace->region);
 
   /* If CONFIG_ARCH_ADDRENV=y, then the D-Space allocation lies in an address
@@ -180,7 +180,7 @@ int nxflat_load(struct nxflat_loadinfo_s *loadinfo)
   ret = nxflat_addrenv_select(loadinfo);
   if (ret < 0)
     {
-      bdbg("ERROR: nxflat_addrenv_select() failed: %d\n", ret);
+      berr("ERROR: nxflat_addrenv_select() failed: %d\n", ret);
       return ret;
     }
 #endif
@@ -193,11 +193,11 @@ int nxflat_load(struct nxflat_loadinfo_s *loadinfo)
                     dreadsize, doffset);
   if (ret < 0)
     {
-      bdbg("Failed to read .data section: %d\n", ret);
+      berr("Failed to read .data section: %d\n", ret);
       goto errout;
     }
 
-  bvdbg("TEXT: %08x Entry point offset: %08x Data offset: %08x\n",
+  binfo("TEXT: %08x Entry point offset: %08x Data offset: %08x\n",
       loadinfo->ispace, loadinfo->entryoffs, doffset);
 
   /* Restore the original address environment */
@@ -206,7 +206,7 @@ int nxflat_load(struct nxflat_loadinfo_s *loadinfo)
   ret = nxflat_addrenv_restore(loadinfo);
   if (ret < 0)
     {
-      bdbg("ERROR: nxflat_addrenv_restore() failed: %d\n", ret);
+      berr("ERROR: nxflat_addrenv_restore() failed: %d\n", ret);
       return ret;
     }
 #endif
diff --git a/binfmt/libnxflat/libnxflat_read.c b/binfmt/libnxflat/libnxflat_read.c
index 023b7c07e4f8d07c54f263d6891a98dd0506ce1f..678dd6d67182e48f89da296d4c98694073fd2e2a 100644
--- a/binfmt/libnxflat/libnxflat_read.c
+++ b/binfmt/libnxflat/libnxflat_read.c
@@ -114,7 +114,7 @@ int nxflat_read(struct nxflat_loadinfo_s *loadinfo, char *buffer, int readsize,
   int     bytesleft;   /* Number of bytes of .data left to read */
   int     bytesread;   /* Total number of bytes read */
 
-  bvdbg("Read %d bytes from offset %d\n", readsize, offset);
+  binfo("Read %d bytes from offset %d\n", readsize, offset);
 
   /* Seek to the position in the object file where the initialized
    * data is saved.
@@ -129,7 +129,7 @@ int nxflat_read(struct nxflat_loadinfo_s *loadinfo, char *buffer, int readsize,
       if (rpos != offset)
         {
           int errval = errno;
-          bdbg("Failed to seek to position %d: %d\n", offset, errval);
+          berr("Failed to seek to position %d: %d\n", offset, errval);
           return -errval;
         }
 
@@ -141,13 +141,13 @@ int nxflat_read(struct nxflat_loadinfo_s *loadinfo, char *buffer, int readsize,
            int errval = errno;
            if (errval != EINTR)
              {
-               bdbg("Read from offset %d failed: %d\n", offset, errval);
+               berr("Read from offset %d failed: %d\n", offset, errval);
                return -errval;
              }
          }
        else if (nbytes == 0)
          {
-           bdbg("Unexpected end of file\n");
+           berr("Unexpected end of file\n");
            return -ENODATA;
          }
        else
diff --git a/binfmt/libnxflat/libnxflat_verify.c b/binfmt/libnxflat/libnxflat_verify.c
index e645fdf925c9be4bea96b0afab2f736b32fac91a..76d8354edf429ababce4ac4fa0cdcb86fcdee8c7 100644
--- a/binfmt/libnxflat/libnxflat_verify.c
+++ b/binfmt/libnxflat/libnxflat_verify.c
@@ -79,7 +79,7 @@ int nxflat_verifyheader(const struct nxflat_hdr_s *header)
 {
   if (!header)
     {
-      bdbg("NULL NXFLAT header!");
+      berr("NULL NXFLAT header!");
       return -ENOEXEC;
     }
 
@@ -91,7 +91,7 @@ int nxflat_verifyheader(const struct nxflat_hdr_s *header)
 
   if (strncmp(header->h_magic, NXFLAT_MAGIC, 4) != 0)
     {
-      bdbg("Unrecognized magic=\"%c%c%c%c\"\n",
+      berr("Unrecognized magic=\"%c%c%c%c\"\n",
       header->h_magic[0], header->h_magic[1],
       header->h_magic[2], header->h_magic[3]);
       return -ENOEXEC;
diff --git a/binfmt/libpcode/Kconfig b/binfmt/libpcode/Kconfig
index 92b09650ff20d84a61c04f4aeaea7a8719599113..12bc6665c05070a992924795948b557dce3e6428 100644
--- a/binfmt/libpcode/Kconfig
+++ b/binfmt/libpcode/Kconfig
@@ -3,67 +3,70 @@
 # see the file kconfig-language.txt in the NuttX tools repository.
 #
 
-config PCODE_STACKSIZE
+config BINFMT_PCODE_STACKSIZE
 	int "P-code interpreter stack size"
 	default 2048
 	---help---
 		This is the stack size that will be used when starting P-code interpreter.
 
-config PCODE_PRIORITY
+config BINFMT_PCODE_PRIORITY
 	int "P-code interpreter priority"
 	default 100
 	---help---
 		This is the task_priority that will be used when starting P-code interpreter.
 
-config PCODE_VARSTACKSIZE
+config BINFMT_PCODE_VARSTACKSIZE
 	int "P-code variable stack size"
 	default 1024
 	---help---
 		This size of the P-Code variable storage area to be allocated by the
 		P-Code runtime.
 
-config PCODE_STRSTACKSIZE
+config BINFMT_PCODE_STRSTACKSIZE
 	int "P-code string stack size"
 	default 128
 	---help---
 		This size of the P-Code string stack area to be allocated by the
 		P-Code runtime.
 
-config PCODE_TEST_FS
+config BINFMT_PCODE_TEST_FS
 	bool "Mount a test file system"
 	depends on FS_ROMFS && !DISABLE_MOUNTPOINT
 	---help---
-		Mount a test file system.  This test file system was used to verify the P-Code binary format.
+		Mount a test file system.  This test file system was used to verify
+		the P-Code binary format.
 
-if PCODE_TEST_FS
+if BINFMT_PCODE_TEST_FS
 
-config PCODE_TEST_DEVMINOR
+config BINFMT_PCODE_TEST_DEVMINOR
 	int "Test file system minor device number"
 	default 0
 	---help---
-		The minor device number of the ROMFS block. For example, the N in /dev/ramN.
-		Used for registering the RAM block driver that will hold the ROMFS file system
-		containing the P-code files to be tested.  Default: 0
+		The minor device number of the ROMFS block. For example, the N in
+		/dev/ramN.  Used for registering the RAM block driver that will hold
+		the ROMFS file system containing the P-code files to be tested.
+		Default: 0
 
-config PCODE_TEST_DEVPATH
+config BINFMT_PCODE_TEST_DEVPATH
 	string "Test file system device Path"
 	default "/dev/ram0"
 	---help---
-		The path to the ROMFS block driver device.  This must match PCODE_TEST_DEVMINOR.
-		Used for registering the RAM block driver that will hold the ROMFS file system
-		containing the P-code files to be tested.  Default: "/dev/ram0"
+		The path to the ROMFS block driver device.  This must match
+		BINFMT_PCODE_TEST_DEVMINOR.  Used for registering the RAM block
+		driver that will hold the ROMFS file system containing the P-code
+		files to be tested.  Default: "/dev/ram0"
 
-config PCODE_TEST_MOUNTPOINT
+config BINFMT_PCODE_TEST_MOUNTPOINT
 	string "Test file system mount point"
 	default "/bin"
 	---help---
 		Location where the test file system will be mounted
 
-endif # PCODE_TEST_FS
+endif # BINFMT_PCODE_TEST_FS
 
-config PCODE_DUMPBUFFER
+config BINFMT_PCODE_DUMPBUFFER
 	bool "Dump P-code buffers"
 	default n
-	depends on DEBUG && DEBUG_VERBOSE
+	depends on DEBUG_INFO
 	---help---
 		Dump various P-code buffers for debug purposes
diff --git a/binfmt/libpcode/Make.defs b/binfmt/libpcode/Make.defs
index e84d0d325704125f6c6fca5c54fa269372b2e207..5b0107c39a2f507904c743a590218c97e1d0d961 100644
--- a/binfmt/libpcode/Make.defs
+++ b/binfmt/libpcode/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # binfmt/libpcode/Make.defs
 #
-#   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -33,7 +33,7 @@
 #
 ############################################################################
 
-ifeq ($(CONFIG_PCODE),y)
+ifeq ($(CONFIG_BINFMT_PCODE),y)
 
 # P-code application interfaces
 
@@ -46,7 +46,15 @@ BINFMT_CSRCS += pcode.c
 # Add an include path so that P-Code related header files may reside in
 # the libpcode sub-directory
 
-CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" "$(TOPDIR)$(DELIM)binfmt$(DELIM)libpcode"}
+CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" \
+	"$(TOPDIR)$(DELIM)binfmt$(DELIM)libpcode"}
+
+# FIXME: This also depends upon header files installed at
+# apps/interpreters/pcode
+
+PCODE_DIR = $(TOPDIR)$(DELIM)$(CONFIG_APPS_DIR)$(DELIM)interpreters$(DELIM)pcode
+CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" \
+	"$(PCODE_DIR)$(DELIM)include" "$(PCODE_DIR)$(DELIM)insn$(DELIM)include"}
 
 # Hook the libpcode subdirectory into the build
 
diff --git a/binfmt/libpcode/README.txt b/binfmt/libpcode/README.txt
index d0bbb4ffc3c8c45f76bbec78ae16f17d28c35098..4e0724ee07c9f7c2d617441a90fc5860358fe0f8 100644
--- a/binfmt/libpcode/README.txt
+++ b/binfmt/libpcode/README.txt
@@ -14,7 +14,7 @@ Other required configuration settings:
 
   CONFIG_NFILE_DESCRIPTORS > 3
   CONFIG_BINFMT_DISABLE=n
-  CONFIG_PCODE=y
+  CONFIG_BINFMT_PCODE=y
 
 Directory Contents
 ------------------
@@ -83,22 +83,22 @@ Here is a simple test configuration using the NuttX simulator:
 
    This enables building the PCODE binary format
 
-     CONFIG_PCODE=y
-     CONFIG_PCODE_PRIORITY=100
-     CONFIG_PCODE_STACKSIZE=2048
+     CONFIG_BINFMT_PCODE=y
+     CONFIG_BINFMT_PCODE_PRIORITY=100
+     CONFIG_BINFMT_PCODE_STACKSIZE=2048
 
    This enables building and mount a test filesystem:
 
-     CONFIG_PCODE_TEST_FS=y
-     CONFIG_PCODE_TEST_DEVMINOR=3
-     CONFIG_PCODE_TEST_DEVPATH="/dev/ram3"
-     CONFIG_PCODE_TEST_MOUNTPOINT="/bin"
+     CONFIG_BINFMT_PCODE_TEST_FS=y
+     CONFIG_BINFMT_PCODE_TEST_DEVMINOR=3
+     CONFIG_BINFMT_PCODE_TEST_DEVPATH="/dev/ram3"
+     CONFIG_BINFMT_PCODE_TEST_MOUNTPOINT="/bin"
 
    Debug options can also be enabled with:
 
-    CONFIG_DEBUG=y
+    CONFIG_DEBUG_FEATURES=y
     CONFIG_DEBUG_BINFMT=y
-    CONFIG_DEBUG_VERBOSE=y
+    CONFIG_DEBUG_INFO=y
 
 4. In lieu of a a real test application, this Quick'n'Dirty patch can be used
    to initialize the P-Code binary format:
@@ -127,23 +127,24 @@ Here is a simple test configuration using the NuttX simulator:
 Issues
 ------
 
-1. As implemented now, there is a tight coupling between the nuttx/directory
-   and the apps/ directory.  That should not be the case; the nuttx/ logic
-   should be completely independent of apps/ logic (but not vice versa).
+1. As implemented now, there is a tight coupling between the nuttx/binfmt
+   directory and the apps/interpreters/pcode directory.  That should not
+   be the case; the nuttx/ logic should be completely independent of apps/
+   logic (but not vice versa).
 
 2. The current implementation will not work in the CONFIG_BUILD_PROTECTED or
    CONFIG_BUILD_KERNEL configurations.  That is because of the little proxy
-   logic (function pcode_proxy() in the file pcode.c).  (a) That logic would
-   attempt to link with P-code logic that resides in user space.  That will
-   not work.  And (2) that proxy would be started in user mode but in the
-   kernel address space which will certainly crash immediately.
+   logic (function pcode_proxy() and prun() in the file pcode.c).  (a) That
+   logic would attempt to link with P-code logic that resides in user space.
+   That will not work.  And (2) that proxy would be started in user mode but
+   in the kernel address space which will certainly crash immediately.
 
 The general idea to fix both of these problems is as follows:
 
 1. Eliminate the pcode_proxy.  Instead start a P-Code execution program that
    resides in the file system.  That P-Code execution program already
-   exists.  It is in apps/system/prun.  This program should be built as,
-   say, an ELF binary and installed in a file system.
+   exists.  This program should be built as, say, an ELF binary and
+   installed in a file system.
 
 2. Add a configuration setting that gives the full path to where the pexec
    program is stored in the filesystem.
diff --git a/binfmt/nxflat.c b/binfmt/nxflat.c
index 1c4b454ff99a003142e619a39f82cac8ac8f6c8e..c2f1c06f78b0f0385f73ea9f33f2317d480ee4b7 100644
--- a/binfmt/nxflat.c
+++ b/binfmt/nxflat.c
@@ -56,16 +56,16 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, and CONFIG_DEBUG_BINFMT have to be
+/* CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO, and CONFIG_DEBUG_BINFMT have to be
  * defined or CONFIG_NXFLAT_DUMPBUFFER does nothing.
  */
 
-#if !defined(CONFIG_DEBUG_VERBOSE) || !defined (CONFIG_DEBUG_BINFMT)
+#if !defined(CONFIG_DEBUG_INFO) || !defined (CONFIG_DEBUG_BINFMT)
 #  undef CONFIG_NXFLAT_DUMPBUFFER
 #endif
 
 #ifdef CONFIG_NXFLAT_DUMPBUFFER
-# define nxflat_dumpbuffer(m,b,n) bvdbgdumpbuffer(m,b,n)
+# define nxflat_dumpbuffer(m,b,n) binfodumpbuffer(m,b,n)
 #else
 # define nxflat_dumpbuffer(m,b,n)
 #endif
@@ -79,7 +79,7 @@
  ****************************************************************************/
 
 static int nxflat_loadbinary(struct binary_s *binp);
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_BINFMT)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_BINFMT)
 static void nxflat_dumploadinfo(struct nxflat_loadinfo_s *loadinfo);
 #endif
 
@@ -102,36 +102,36 @@ static struct binfmt_s g_nxflatbinfmt =
  * Name: nxflat_dumploadinfo
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_BINFMT)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_BINFMT)
 static void nxflat_dumploadinfo(struct nxflat_loadinfo_s *loadinfo)
 {
   unsigned long dsize = loadinfo->datasize + loadinfo->bsssize;
 
-  bdbg("LOAD_INFO:\n");
-  bdbg("  ISPACE:\n");
-  bdbg("    ispace:       %08lx\n", loadinfo->ispace);
-  bdbg("    entryoffs:    %08lx\n", loadinfo->entryoffs);
-  bdbg("    isize:        %08lx\n", loadinfo->isize);
+  berr("LOAD_INFO:\n");
+  berr("  ISPACE:\n");
+  berr("    ispace:       %08lx\n", loadinfo->ispace);
+  berr("    entryoffs:    %08lx\n", loadinfo->entryoffs);
+  berr("    isize:        %08lx\n", loadinfo->isize);
 
-  bdbg("  DSPACE:\n");
-  bdbg("    dspace:       %08lx\n", loadinfo->dspace);
+  berr("  DSPACE:\n");
+  berr("    dspace:       %08lx\n", loadinfo->dspace);
   if (loadinfo->dspace != NULL)
     {
-      bdbg("      crefs:      %d\n",    loadinfo->dspace->crefs);
-      bdbg("      region:     %08lx\n", loadinfo->dspace->region);
+      berr("      crefs:      %d\n",    loadinfo->dspace->crefs);
+      berr("      region:     %08lx\n", loadinfo->dspace->region);
     }
-  bdbg("    datasize:     %08lx\n", loadinfo->datasize);
-  bdbg("    bsssize:      %08lx\n", loadinfo->bsssize);
-  bdbg("      (pad):      %08lx\n", loadinfo->dsize - dsize);
-  bdbg("    stacksize:    %08lx\n", loadinfo->stacksize);
-  bdbg("    dsize:        %08lx\n", loadinfo->dsize);
-
-  bdbg("  RELOCS:\n");
-  bdbg("    relocstart:   %08lx\n", loadinfo->relocstart);
-  bdbg("    reloccount:   %d\n",    loadinfo->reloccount);
-
-  bdbg("  HANDLES:\n");
-  bdbg("    filfd:        %d\n",    loadinfo->filfd);
+  berr("    datasize:     %08lx\n", loadinfo->datasize);
+  berr("    bsssize:      %08lx\n", loadinfo->bsssize);
+  berr("      (pad):      %08lx\n", loadinfo->dsize - dsize);
+  berr("    stacksize:    %08lx\n", loadinfo->stacksize);
+  berr("    dsize:        %08lx\n", loadinfo->dsize);
+
+  berr("  RELOCS:\n");
+  berr("    relocstart:   %08lx\n", loadinfo->relocstart);
+  berr("    reloccount:   %d\n",    loadinfo->reloccount);
+
+  berr("  HANDLES:\n");
+  berr("    filfd:        %d\n",    loadinfo->filfd);
 }
 #else
 # define nxflat_dumploadinfo(i)
@@ -151,7 +151,7 @@ static int nxflat_loadbinary(struct binary_s *binp)
   struct nxflat_loadinfo_s loadinfo;  /* Contains globals for libnxflat */
   int                      ret;
 
-  bvdbg("Loading file: %s\n", binp->filename);
+  binfo("Loading file: %s\n", binp->filename);
 
   /* Initialize the xflat library to load the program binary. */
 
@@ -159,7 +159,7 @@ static int nxflat_loadbinary(struct binary_s *binp)
   nxflat_dumploadinfo(&loadinfo);
   if (ret != 0)
     {
-      bdbg("Failed to initialize for load of NXFLAT program: %d\n", ret);
+      berr("Failed to initialize for load of NXFLAT program: %d\n", ret);
       goto errout;
     }
 
@@ -169,7 +169,7 @@ static int nxflat_loadbinary(struct binary_s *binp)
   nxflat_dumploadinfo(&loadinfo);
   if (ret != 0)
     {
-      bdbg("Failed to load NXFLAT program binary: %d\n", ret);
+      berr("Failed to load NXFLAT program binary: %d\n", ret);
       goto errout_with_init;
     }
 
@@ -178,7 +178,7 @@ static int nxflat_loadbinary(struct binary_s *binp)
   ret = nxflat_bind(&loadinfo, binp->exports, binp->nexports);
   if (ret != 0)
     {
-      bdbg("Failed to bind symbols program binary: %d\n", ret);
+      berr("Failed to bind symbols program binary: %d\n", ret);
       goto errout_with_load;
     }
 
@@ -252,11 +252,11 @@ int nxflat_initialize(void)
 
   /* Register ourselves as a binfmt loader */
 
-  bvdbg("Registering NXFLAT\n");
+  binfo("Registering NXFLAT\n");
   ret = register_binfmt(&g_nxflatbinfmt);
   if (ret != 0)
     {
-      bdbg("Failed to register binfmt: %d\n", ret);
+      berr("Failed to register binfmt: %d\n", ret);
     }
   return ret;
 }
diff --git a/binfmt/pcode.c b/binfmt/pcode.c
index 6023622440e0a23cf54000b6b38c068b89b4e8c8..7215a94457017aa0d986890fd4d0e390b1d9a200 100644
--- a/binfmt/pcode.c
+++ b/binfmt/pcode.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * binfmt/pcode.c
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -47,15 +47,16 @@
 #include 
 #include 
 
-#include 
-
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 
-#ifdef CONFIG_PCODE
+#include "pexec.h"
+#include "pedefs.h"
+
+#ifdef CONFIG_BINFMT_PCODE
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -72,23 +73,19 @@
 #  error The binary loader is disabled (CONFIG_BINFMT_DISABLE)!
 #endif
 
-#ifndef CONFIG_PCODE
-#  error You must select CONFIG_PCODE in your configuration file
-#endif
-
 #ifndef CONFIG_SCHED_ONEXIT
 #  error CONFIG_SCHED_ONEXIT is required
 #endif
 
-#ifndef CONFIG_PCODE_VARSTACKSIZE
-# define CONFIG_PCODE_VARSTACKSIZE 1024
+#ifndef CONFIG_BINFMT_PCODE_VARSTACKSIZE
+# define CONFIG_BINFMT_PCODE_VARSTACKSIZE 1024
 #endif
 
-#ifndef CONFIG_PCODE_STRSTACKSIZE
-# define CONFIG_PCODE_STRSTACKSIZE 128
+#ifndef CONFIG_BINFMT_PCODE_STRSTACKSIZE
+# define CONFIG_BINFMT_PCODE_STRSTACKSIZE 128
 #endif
 
-#ifdef CONFIG_PCODE_TEST_FS
+#ifdef CONFIG_BINFMT_PCODE_TEST_FS
 #  ifndef CONFIG_FS_ROMFS
 #    error You must select CONFIG_FS_ROMFS in your configuration file
 #  endif
@@ -97,16 +94,16 @@
 #    error You must not disable mountpoints via CONFIG_DISABLE_MOUNTPOINT in your configuration file
 #  endif
 
-#  ifndef CONFIG_PCODE_TEST_DEVMINOR
-#    define CONFIG_PCODE_TEST_DEVMINOR 0
+#  ifndef CONFIG_BINFMT_PCODE_TEST_DEVMINOR
+#    define CONFIG_BINFMT_PCODE_TEST_DEVMINOR 0
 #  endif
 
-#  ifndef CONFIG_PCODE_TEST_DEVPATH
-#    define CONFIG_PCODE_TEST_DEVPATH "/dev/ram0"
+#  ifndef CONFIG_BINFMT_PCODE_TEST_DEVPATH
+#    define CONFIG_BINFMT_PCODE_TEST_DEVPATH "/dev/ram0"
 #  endif
 
-#  ifndef CONFIG_PCODE_TEST_MOUNTPOINT
-#    define CONFIG_PCODE_TEST_MOUNTPOINT "/bin"
+#  ifndef CONFIG_BINFMT_PCODE_TEST_MOUNTPOINT
+#    define CONFIG_BINFMT_PCODE_TEST_MOUNTPOINT "/bin"
 #  endif
 #endif
 
@@ -130,6 +127,16 @@ struct binfmt_handoff_s
  * Private Function Prototypes
  ****************************************************************************/
 
+static int pcode_run(FAR char *exepath, size_t varsize, size_t strsize);
+#ifdef CONFIG_BINFMT_PCODE_TEST_FS
+static int pcode_mount_testfs(void);
+#endif
+#if !defined(CONFIG_BUILD_PROTECTED) && !defined(CONFIG_BUILD_KERNEL)
+static void pcode_onexit(int exitcode, FAR void *arg);
+#endif
+#if !defined(CONFIG_BUILD_PROTECTED) && !defined(CONFIG_BUILD_KERNEL)
+static int pcode_proxy(int argc, char **argv);
+#endif
 static int pcode_load(FAR struct binary_s *binp);
 static int pcode_unload(FAR struct binary_s *binp);
 
@@ -146,7 +153,7 @@ static struct binfmt_s g_pcode_binfmt =
 
 struct binfmt_handoff_s g_pcode_handoff;
 
-#ifdef CONFIG_PCODE_TEST_FS
+#ifdef CONFIG_BINFMT_PCODE_TEST_FS
 #  include "romfs.h"
 #endif
 
@@ -154,6 +161,69 @@ struct binfmt_handoff_s g_pcode_handoff;
  * Private Functions
  ****************************************************************************/
 
+/****************************************************************************
+ * Name: pcode_run
+ *
+ * Description:
+ *   Execute/interpret a P-Code file.  This function does not return until
+ *   the P-code program terminates or until a fatal error occurs.
+ *
+ * Input Parameters:
+ *   exepath - The full path to the P-Code binary.
+ *   varsize - Size of the P-Code variable stack
+ *   strsize - the size of the P-Code string stack.
+ *
+ * Returned Value:
+ *   OK if the P-Code program successfully terminated; A negated errno value
+ *   is returned on the event of any failure.
+ *
+ ****************************************************************************/
+
+static int pcode_run(FAR char *exepath, size_t varsize, size_t strsize)
+{
+  FAR struct pexec_s *st;
+  int errcode;
+  int ret = OK;
+
+  /* Load the POFF file into memory */
+
+  st = pload(exepath, varsize, varsize);
+  if (!st)
+    {
+      berr("ERROR: Could not load %s\n", exepath);
+      return -ENOEXEC;
+    }
+
+  binfo("Loaded %s\n", exepath);
+
+  /* Execute the P-Code program until a stopping condition occurs */
+
+  for (;;)
+    {
+      /* Execute the instruction; Check for exceptional conditions */
+
+      errcode = pexec(st);
+      if (errcode != eNOERROR)
+        {
+          break;
+        }
+    }
+
+  if (errcode != eEXIT)
+    {
+      /* REVISIT: Select a more appropriated return errocode */
+
+      berr("ERROR: Runtime error 0x%02x -- Execution Stopped\n", errcode);
+      ret = -ENOEXEC;
+    }
+
+  /* Clean up resources used by the interpreter */
+
+  binfo("Execution terminated\n");
+  pexec_release(st);
+  return ret;
+}
+
 /****************************************************************************
  * Name: pcode_mount_testfs
  *
@@ -162,36 +232,40 @@ struct binfmt_handoff_s g_pcode_handoff;
  *
  ****************************************************************************/
 
-#ifdef CONFIG_PCODE_TEST_FS
+#ifdef CONFIG_BINFMT_PCODE_TEST_FS
 static int pcode_mount_testfs(void)
 {
   int ret;
 
   /* Create a ROM disk for the ROMFS filesystem */
 
-  bvdbg("Registering romdisk at /dev/ram%d\n", CONFIG_PCODE_TEST_DEVMINOR);
-  ret = romdisk_register(CONFIG_PCODE_TEST_DEVMINOR, (FAR uint8_t *)romfs_img,
+  binfo("Registering romdisk at /dev/ram%d\n", CONFIG_BINFMT_PCODE_TEST_DEVMINOR);
+  ret = romdisk_register(CONFIG_BINFMT_PCODE_TEST_DEVMINOR, (FAR uint8_t *)romfs_img,
                          NSECTORS(ROMFS_IMG_LEN), SECTORSIZE);
   if (ret < 0)
     {
-      bdbg("ERROR: romdisk_register failed: %d\n", ret);
+      berr("ERROR: romdisk_register failed: %d\n", ret);
       return ret;
     }
 
   /* Mount the test file system */
 
-  bvdbg("Mounting ROMFS filesystem at target=%s with source=%s\n",
-         CONFIG_PCODE_TEST_MOUNTPOINT, CONFIG_PCODE_TEST_DEVPATH);
+  binfo("Mounting ROMFS filesystem at target=%s with source=%s\n",
+         CONFIG_BINFMT_PCODE_TEST_MOUNTPOINT,
+         CONFIG_BINFMT_PCODE_TEST_DEVPATH);
 
-  ret = mount(CONFIG_PCODE_TEST_DEVPATH, CONFIG_PCODE_TEST_MOUNTPOINT,
+  ret = mount(CONFIG_BINFMT_PCODE_TEST_DEVPATH,
+              CONFIG_BINFMT_PCODE_TEST_MOUNTPOINT,
               "romfs", MS_RDONLY, NULL);
   if (ret < 0)
     {
       int errval = get_errno();
       DEBUGASSERT(errval > 0);
 
-      bdbg("ERROR: mount(%s,%s,romfs) failed: %d\n",
-           CONFIG_PCODE_TEST_DEVPATH, CONFIG_PCODE_TEST_MOUNTPOINT, errval);
+      berr("ERROR: mount(%s,%s,romfs) failed: %d\n",
+           CONFIG_BINFMT_PCODE_TEST_DEVPATH,
+           CONFIG_BINFMT_PCODE_TEST_MOUNTPOINT, errval);
+
       return -errval;
     }
 
@@ -201,7 +275,7 @@ static int pcode_mount_testfs(void)
    */
 
 #if defined(CONFIG_BINFMT_EXEPATH) && !defined(CONFIG_PATH_INITIAL)
-  (void)setenv("PATH", CONFIG_PCODE_TEST_MOUNTPOINT, 1);
+  (void)setenv("PATH", CONFIG_BINFMT_PCODE_TEST_MOUNTPOINT, 1);
 #endif
 
   return OK;
@@ -259,21 +333,22 @@ static int pcode_proxy(int argc, char **argv)
   sem_post(&g_pcode_handoff.exclsem);
   DEBUGASSERT(binp && fullpath);
 
-  bvdbg("Executing %s\n", fullpath);
+  binfo("Executing %s\n", fullpath);
 
   /* Set-up the on-exit handler that will unload the module on exit */
 
   ret = on_exit(pcode_onexit, binp);
   if (ret < 0)
     {
-      bdbg("ERROR: on_exit failed: %d\n", get_errno());
+      berr("ERROR: on_exit failed: %d\n", get_errno());
       kmm_free(fullpath);
       return EXIT_FAILURE;
     }
 
   /* Load the P-code file and execute it */
 
-  ret = prun(fullpath, CONFIG_PCODE_VARSTACKSIZE, CONFIG_PCODE_STRSTACKSIZE);
+  ret = pcode_run(fullpath, CONFIG_BINFMT_PCODE_VARSTACKSIZE,
+                  CONFIG_BINFMT_PCODE_STRSTACKSIZE);
 
   /* We no longer need the fullpath */
 
@@ -283,7 +358,7 @@ static int pcode_proxy(int argc, char **argv)
 
   if (ret < 0)
     {
-      bdbg("ERROR: Execution failed\n");
+      berr("ERROR: Execution failed\n");
       return EXIT_FAILURE;
     }
 
@@ -310,7 +385,7 @@ static int pcode_load(struct binary_s *binp)
   int fd;
   int ret;
 
-  bvdbg("Loading file: %s\n", binp->filename);
+  binfo("Loading file: %s\n", binp->filename);
 
   /* Open the binary file for reading (only) */
 
@@ -318,14 +393,14 @@ static int pcode_load(struct binary_s *binp)
   if (fd < 0)
     {
       int errval = get_errno();
-      bdbg("ERROR: Failed to open binary %s: %d\n", binp->filename, errval);
+      berr("ERROR: Failed to open binary %s: %d\n", binp->filename, errval);
       return -errval;
     }
 
   /* Read the POFF file header */
 
-  for (remaining = sizeof(struct poff_fileheader_s), ptr = (FAR uint8_t *)&hdr;
-       remaining > 0; )
+  for (remaining = sizeof(struct poff_fileheader_s),
+       ptr = (FAR uint8_t *)&hdr; remaining > 0; )
     {
       /* Read the next GULP */
 
@@ -341,12 +416,12 @@ static int pcode_load(struct binary_s *binp)
 
           if (errval != EINTR)
             {
-              bdbg("ERROR: read failed: %d\n", errval);
+              berr("ERROR: read failed: %d\n", errval);
               ret = -errval;
               goto errout_with_fd;
             }
 
-          bdbg("Interrupted by a signal\n");
+          berr("Interrupted by a signal\n");
         }
       else
         {
@@ -358,7 +433,7 @@ static int pcode_load(struct binary_s *binp)
         }
     }
 
-#ifdef CONFIG_PCODE_DUMPBUFFER
+#ifdef CONFIG_BINFMT_PCODE_DUMPBUFFER
   lib_dumpbuffer("POFF File Header", &hdr, sizeof(poff_fileheader_s));
 #endif
 
@@ -366,7 +441,7 @@ static int pcode_load(struct binary_s *binp)
 
   if (memcmp(&hdr.fh_ident, FHI_POFF_MAG, 4) != 0 || hdr.fh_type != FHT_EXEC)
     {
-      dbg("ERROR: File is not a P-code executable: %d\n");
+      _err("ERROR: File is not a P-code executable: %d\n");
       ret = -ENOEXEC;
       goto errout_with_fd;
     }
@@ -377,8 +452,8 @@ static int pcode_load(struct binary_s *binp)
    */
 
   binp->entrypt   = pcode_proxy;
-  binp->stacksize = CONFIG_PCODE_STACKSIZE;
-  binp->priority  = CONFIG_PCODE_PRIORITY;
+  binp->stacksize = CONFIG_BINFMT_PCODE_STACKSIZE;
+  binp->priority  = CONFIG_BINFMT_PCODE_PRIORITY;
 
   /* Get exclusive access to the p-code handoff structure */
 
@@ -399,7 +474,7 @@ static int pcode_load(struct binary_s *binp)
   g_pcode_handoff.fullpath = strdup(binp->filename);
   if (!g_pcode_handoff.fullpath)
     {
-      bdbg("ERROR: Failed to duplicate the full path: %d\n",
+      berr("ERROR: Failed to duplicate the full path: %d\n",
            binp->filename);
 
       sem_post(&g_pcode_handoff.exclsem);
@@ -473,18 +548,18 @@ int pcode_initialize(void)
   ret = pcode_mount_testfs();
   if (ret < 0)
     {
-      bdbg("ERROR: Failed to mount test file system: %d\n", ret);
+      berr("ERROR: Failed to mount test file system: %d\n", ret);
       return ret;
     }
 
   /* Register ourselves as a binfmt loader */
 
-  bvdbg("Registering P-Code Loader\n");
+  binfo("Registering P-Code Loader\n");
 
   ret = register_binfmt(&g_pcode_binfmt);
   if (ret != 0)
     {
-      bdbg("Failed to register binfmt: %d\n", ret);
+      berr("Failed to register binfmt: %d\n", ret);
     }
 
   return ret;
@@ -513,18 +588,19 @@ void pcode_uninitialize(void)
       int errval = get_errno();
       DEBUGASSERT(errval > 0);
 
-      bdbg("ERROR: unregister_binfmt() failed: %d\n", errval);
+      berr("ERROR: unregister_binfmt() failed: %d\n", errval);
       UNUSED(errval);
     }
 
-#ifdef CONFIG_PCODE_TEST_FS
-  ret = umount(CONFIG_PCODE_TEST_MOUNTPOINT);
+#ifdef CONFIG_BINFMT_PCODE_TEST_FS
+  ret = umount(CONFIG_BINFMT_PCODE_TEST_MOUNTPOINT);
   if (ret < 0)
     {
       int errval = get_errno();
       DEBUGASSERT(errval > 0);
 
-      bdbg("ERROR: umount(%s) failed: %d\n", CONFIG_PCODE_TEST_MOUNTPOINT, errval);
+      berr("ERROR: umount(%s) failed: %d\n",
+           CONFIG_BINFMT_PCODE_TEST_MOUNTPOINT, errval);
       UNUSED(errval);
     }
 #endif
@@ -534,4 +610,4 @@ void pcode_uninitialize(void)
   sem_destroy(&g_pcode_handoff.exclsem);
 }
 
-#endif /* CONFIG_PCODE */
+#endif /* CONFIG_BINFMT_PCODE */
diff --git a/configs/Board.mk b/configs/Board.mk
index a04da6642708c4e123855979d9705c83d1b0549c..680b37ebcb2f5149ca6d25390984bc796d7a173b 100644
--- a/configs/Board.mk
+++ b/configs/Board.mk
@@ -43,6 +43,7 @@ else
 AOBJS = $(ASRCS:$(ASMEXT)=$(OBJEXT))
 endif
 COBJS = $(CSRCS:.c=$(OBJEXT))
+CXXOBJS = $(CXXSRCS:.cxx=$(OBJEXT))
 
 SRCS = $(ASRCS) $(CSRCS)
 OBJS = $(AOBJS) $(COBJS)
@@ -108,28 +109,40 @@ $(AOBJS): %$(OBJEXT): %$(ASMEXT)
 $(COBJS) $(LINKOBJS): %$(OBJEXT): %.c
 	$(call COMPILE, $<, $@)
 
-libboard$(LIBEXT): $(OBJS)
+$(CXXOBJS) $(LINKOBJS): %$(OBJEXT): %.cxx
+	$(call COMPILEXX, $<, $@)
+
+libboard$(LIBEXT): $(OBJS) $(CXXOBJS)
 	$(Q) $(AR) $@ # Create an empty archive
 ifneq ($(OBJS),)
-	$(call ARCHIVE, $@, $(OBJS))
+	$(call ARCHIVE, $@, $(OBJS) $(CXXOBJS))
 endif
 
-.depend: Makefile $(SRCS)
+.depend: Makefile $(SRCS) $(CXXSRCS)
 ifneq ($(ZDSVERSION),)
 	$(Q) $(MKDEP) "$(CC)" -- $(CFLAGS) -- $(SRCS) >Make.dep
 else
 	$(Q) $(MKDEP) $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
+endif
+ifneq ($(CXXSRCS),)
+	$(Q) $(MKDEP) "$(CXX)" -- $(CXXFLAGS) -- $(CXXSRCS) >>Make.dep
 endif
 	$(Q) touch $@
 
 depend: .depend
 
+ifneq ($(BOARD_CONTEXT),y)
+context:
+endif
+
 clean:
 	$(call DELFILE, libboard$(LIBEXT))
 	$(call CLEAN)
+	$(EXTRA_CLEAN)
 
 distclean: clean
 	$(call DELFILE, Make.dep)
 	$(call DELFILE, .depend)
+	$(EXTRA_DISTCLEAN)
 
 -include Make.dep
diff --git a/configs/Kconfig b/configs/Kconfig
index c8169d0086fc0173406ba56ebea0989cc40c25d0..42a35438668c75c0f240d56eb64592635d323cd3 100644
--- a/configs/Kconfig
+++ b/configs/Kconfig
@@ -70,39 +70,13 @@ config ARCH_BOARD_CLOUDCTRL
 		Small network relay development board. Based on the Shenzhou IV development
 		board design.
 
-config ARCH_BOARD_COMPALE86
-	bool "Compal e86 phone"
-	depends on ARCH_CHIP_CALYPSO
-	---help---
-		This configuration enables board support for Compal e86 phone.
-		This port derives from the Compal E88 port and was provided by Craig
-		Comstock.
-
-config ARCH_BOARD_COMPALE88
-	bool "Compal e88 phone"
-	depends on ARCH_CHIP_CALYPSO
-	---help---
-		This configuration enables board support for compal e88 phone.
-		This ports is based on patches contributed by Denis Carikli for both the
-		compal e99 and e88.  The patches were made by Alan Carvalho de Assis and
-		Denis Carikli using the Stefan Richter's Osmocom-bb patches.
-
-config ARCH_BOARD_COMPALE99
-	bool "Compal e99 phone"
-	depends on ARCH_CHIP_CALYPSO
-	---help---
-		This configuration enables board support for compal e88 and e99 phones.
-		This port is based on patches contributed by Denis Carikli for both the
-		compal e99 and e88.  The patches were made by Alan Carvalho de Assis and
-		Denis Carikli using the Stefan Richter's Osmocom-bb patches.
-
 config ARCH_BOARD_DEMOS92S12NEC64
-	bool "Freescale DMO9S12NE64 board"
+	bool "NXP/FreeScale DMO9S12NE64 board"
 	depends on ARCH_CHIP_MCS92S12NEC64
 	select ARCH_HAVE_LEDS
 	select ARCH_HAVE_BUTTONS
 	---help---
-	Freescale DMO9S12NE64 board based on the MC9S12NE64 hcs12 cpu.  This
+	NXP/FreeScale DMO9S12NE64 board based on the MC9S12NE64 hcs12 cpu.  This
 	port uses the m9s12x GCC toolchain.  STATUS:  (Still) under development; it
 	is code complete but has not yet been verified.
 
@@ -170,14 +144,16 @@ config ARCH_BOARD_EKKLM3S9B96
 		TI/Stellaris EKK-LM3S9B96 board.  This board is based on the
 		an EKK-LM3S9B96 which is a Cortex-M3.
 
-config ARCH_BOARD_EZ80F910200KITG
-	bool "ZiLOG ez80f910200kitg development kit"
-	depends on ARCH_CHIP_EZ80F91
-	select ARCH_HAVE_LEDS
+config ARCH_BOARD_ESP32CORE
+	bool "Expressif ESP32 Core board V2"
+	depends on ARCH_CHIP_ESP32
 	---help---
-		ez80Acclaim! Microcontroller.  This port use the ZiLOG ez80f910200kitg
-		development kit, eZ80F091 part, and the Zilog ZDS-II Windows command line
-		tools.  The development environment is Cygwin under WinXP.
+		The ESP32 is a dual-core system from Expressif with two Harvard
+		architecture Xtensa LX6 CPUs. All embedded memory, external memory
+		and peripherals are located on the data bus and/or the instruction
+		bus of these CPUs. With some minor exceptions, the address mapping
+		of two CPUs is symmetric, meaning they use the same addresses to
+		access the same memory.
 
 config ARCH_BOARD_EZ80F910200ZCO
 	bool "ZiLOG ez80f910200zco development kit"
@@ -201,20 +177,42 @@ config ARCH_BOARD_FIRE_STM32
 		and 3 of the boards are supported but only version 2 has been
 		tested.
 
+config ARCH_BOARD_FREEDOM_K64F
+	bool "NXP Freedom-k64f development board"
+	depends on ARCH_CHIP_MK64FN1M0VLL12
+	select ARCH_HAVE_LEDS
+	select ARCH_HAVE_BUTTONS
+	select ARCH_HAVE_IRQBUTTONS
+	---help---
+		development board.
+		This port uses the NXP/FreeScale FREEDOM-K64F development board. This
+		board uses the Kinetis K64 MK64FN1M0VLL12 Cortex-M4 MCU.
+
+config ARCH_BOARD_FREEDOM_K66F
+	bool "NXP Freedom-k66f development board"
+	depends on ARCH_CHIP_MK66FN2M0VMD18
+	select ARCH_HAVE_LEDS
+	select ARCH_HAVE_BUTTONS
+	select ARCH_HAVE_IRQBUTTONS
+	---help---
+		development board.
+		This port uses the NXP/FreeScale FREEDOM-K66F development board. This
+		board uses the Kinetis K66 MK66FN2M0VMD18 Cortex-M4 MCU.
+
 config ARCH_BOARD_FREEDOM_KL25Z
-	bool "Freescale Freedom KL25Z"
+	bool "NXP/FreeScale Freedom KL25Z"
 	depends on ARCH_CHIP_MKL25Z128
 	select ARCH_HAVE_LEDS
 	---help---
-		This is the configuration for the Freescale Freedom KL25Z board.  This
+		This is the configuration for the NXP/FreeScale Freedom KL25Z board.  This
 		board has the K25Z120LE3AN chip with a built-in SDA debugger.
 
 config ARCH_BOARD_FREEDOM_KL26Z
-	bool "Freescale Freedom KL26Z"
+	bool "NXP/FreeScale Freedom KL26Z"
 	depends on ARCH_CHIP_MKL26Z128
 	select ARCH_HAVE_LEDS
 	---help---
-		This is the configuration for the Freescale Freedom KL26Z board.  This
+		This is the configuration for the NXP/FreeScale Freedom KL26Z board.  This
 		board has the K26Z128VLH4 chip with a built-in SDA debugger.
 
 config ARCH_BOARD_HYMINI_STM32V
@@ -237,13 +235,13 @@ config ARCH_BOARD_LINCOLN60
 		Micromint Lincoln 60 board using the NXP LPC1769 MCU.
 
 config ARCH_BOARD_KWIKSTIK_K40
-	bool "FreeScale KwikStik-K40 development board"
+	bool "NXP/FreeScale KwikStik-K40 development board"
 	depends on ARCH_CHIP_MK40X256VLQ100
 	select ARCH_HAVE_LEDS
 	select ARCH_HAVE_BUTTONS
 	select ARCH_HAVE_IRQBUTTONS
 	---help---
-		Kinetis K40 Cortex-M4 MCU.  This port uses the FreeScale KwikStik-K40
+		Kinetis K40 Cortex-M4 MCU.  This port uses the NXP/FreeScale KwikStik-K40
 		development board.
 
 config ARCH_BOARD_LAUNCHXL_TMS57004
@@ -305,6 +303,15 @@ config ARCH_BOARD_LPCXPRESSO
 		Embedded Artists base board with NXP LPCExpresso LPC1768.  This board
 		is based on the NXP LPC1768.  The Code Red toolchain is used by default.
 
+config ARCH_BOARD_BAMBINO_200E
+	bool "Micromint Bambino 200E"
+	depends on ARCH_CHIP_LPC4330FBD144
+	select ARCH_HAVE_LEDS
+	select ARCH_HAVE_BUTTONS
+	select ARCH_HAVE_IRQBUTTONS
+	---help---
+		Micromint Bambino board. This board is based on the LPC4330FBD144.
+
 config ARCH_BOARD_LPC4330_XPLORER
 	bool "NXG LPC4330-Xplorer"
 	depends on ARCH_CHIP_LPC4330FET100
@@ -380,7 +387,7 @@ config ARCH_BOARD_MX1ADS
 	select ARCH_HAVE_LEDS
 	---help---
 		This is a port to the Motorola MX1ADS development board.  That board
-		is based on the Freescale i.MX1 processor.  The i.MX1 is an ARM920T.
+		is based on the NXP/FreeScale i.MX1 processor.  The i.MX1 is an ARM920T.
 		STATUS:  This port is nearly code complete but was never fully
 		integrated due to tool-related issues.
 
@@ -444,6 +451,12 @@ config ARCH_BOARD_MIRTOO
 		This is the port to the DTX1-4000L "Mirtoo" module.  This module uses MicroChip
 		PIC32MX250F128D.  See http://www.dimitech.com/ for further information.
 
+config ARCH_BOARD_MOXA
+	bool "Moxa board"
+	depends on ARCH_CHIP_MOXART
+	---help---
+		Moxa
+
 config ARCH_BOARD_NUTINY_NUC120
 	bool "Nuvoton NuTiny NUC120"
 	depends on ARCH_CHIP_NUC120LE3AN
@@ -512,6 +525,15 @@ config ARCH_BOARD_OLIMEX_STM32H407
 		toolchain* under Linux or Cygwin. See the http://www.olimex.com for
 		further information. This board features the STMicro STM32F407ZGT6 (144pins).
 
+config ARCH_BOARD_OLIMEX_STM32E407
+	bool "Olimex STM32 E407 board"
+	depends on ARCH_CHIP_STM32F407ZG
+	select ARCH_HAVE_LEDS
+	select ARCH_HAVE_BUTTONS
+	select ARCH_HAVE_IRQBUTTONS
+	---help---
+		Olimex STM32 E407 board based on the STMicro STM32F407ZGT6 (144pins).
+
 config ARCH_BOARD_OLIMEX_STM32P107
 	bool "Olimex STM32 P107 board"
 	depends on ARCH_CHIP_STM32F107VC
@@ -531,6 +553,17 @@ config ARCH_BOARD_OLIMEX_STM32P207
 		toolchain under Linux or Cygwin. See the http://www.olimex.com for
 		further information. This board features the STMicro STM32F207ZE MCU
 
+config ARCH_BOARD_OLIMEX_STM32P407
+	bool "Olimex STM32 P407 board"
+	depends on ARCH_CHIP_STM32F407ZG
+	select ARCH_HAVE_LEDS
+	select ARCH_HAVE_BUTTONS
+	select ARCH_HAVE_IRQBUTTONS
+	---help---
+		This port uses the Olimex STM32 P407 board and a GNU arm-nuttx-elf
+		toolchain under Linux or Cygwin. See the http://www.olimex.com for
+		further information. This board features the STMicro STM32F407ZG MCU
+
 config ARCH_BOARD_OLIMEXINO_STM32
 	bool "Olimexino STM32 board"
 	depends on ARCH_CHIP_STM32F103RB
@@ -640,23 +673,37 @@ config ARCH_BOARD_PIC32MZ_STARTERKIT
 
 		See www.microchip.com for further information.
 
-config ARCH_BOARD_PIRELLI_DPL10
-	bool "Pirelli DPL10 phone"
-	depends on ARCH_CHIP_CALYPSO
+config ARCH_BOARD_NR5M100_NEXYS4
+	bool "NEXT RISC-V NR5M100 on Nexys-4 board"
+	depends on ARCH_CHIP_NR5M100
+	select UART_SERIALDRIVER
 	---help---
-		This directory contains the board support for Pirelli dpl10 phones.  The
-		additions were made by Craig Comstock (with help form Alan Carvalho de Assis).
+		This is the port NuttX to the NEXT RISC-V processor runnining on a Digilent
+		Nexys-4 (non DDR version) FPGA board.
 
 config ARCH_BOARD_NUCLEO_144
 	bool "STMicro NUCLEO-144"
-	depends on ARCH_CHIP_STM32F746
+	depends on ARCH_CHIP_STM32F746ZG || ARCH_CHIP_STM32F767ZI
 	select ARCH_HAVE_LEDS
 	select ARCH_HAVE_BUTTONS
 	select ARCH_HAVE_IRQBUTTONS
 	---help---
-		STMicro Nucleo-144 development board featuring the STM32F746ZGT6U
-		MCU. The STM32F746ZGT6U is a 216MHz Cortex-M7 operation with 1024Kb Flash
-		memory and 300Kb SRAM.
+		STMicro Nucleo-144 development board featuring STMicroelectronics
+		F2, F3, F4 and F7 MCU families.  The board is a "Hardware pattern"
+		that can be populated with the 144 pin package of the following MCUs:
+
+			Target STM32    Order code
+			STM32F207ZGT6   NUCLEO-F207ZG
+			STM32F303ZET6   NUCLEO-F303ZE
+			STM32F429ZIT6   NUCLEO-F429ZI
+			STM32F446ZET6   NUCLEO-F446ZE
+
+		Supported in this release are:
+
+			NUCLEO-F746ZG - STM32F746ZGT6 a 216MHz Cortex-M7, w/FPU - 1024KiB
+				Flash memory and 320KiB SRAM.
+			NUCLEO-F767ZI - STM32F767ZIT6 a 216MHz Cortex-M7, w/DPFPU -
+				2048KiB Flash memory and 512KiB SRAM.
 
 config ARCH_BOARD_NUCLEO_F303RE
 	bool "STM32F303 Nucleo F303RE"
@@ -667,6 +714,15 @@ config ARCH_BOARD_NUCLEO_F303RE
 	---help---
 		STMicro Nucleo F303RE board based on the STMicro STM32F303RET6 MCU.
 
+config ARCH_BOARD_NUCLEO_F334R8
+	bool "STM32F334 Nucleo F334R8"
+	depends on ARCH_CHIP_STM32F334R8
+	select ARCH_HAVE_LEDS
+	select ARCH_HAVE_BUTTONS
+	select ARCH_HAVE_IRQBUTTONS
+	---help---
+		STMicro Nucleo F334R8 board based on the STMicro STM32F334R8 MCU.
+
 config ARCH_BOARD_NUCLEO_F401RE
 	bool "STM32F401 Nucleo F401RE"
 	depends on ARCH_CHIP_STM32F401RE
@@ -703,19 +759,6 @@ config ARCH_BOARD_QEMU_I486
 		Port of NuttX to QEMU in i486 mode.  This port will also run on real i486
 		hardwared (Google the Bifferboard).
 
-config ARCH_BOARD_RGMP
-	bool "RGMP"
-	depends on ARCH_RGMP
-	---help---
-		RGMP stands for RTOS and GPOS on Multi-Processor.  RGMP is a project for
-		running GPOS and RTOS simultaneously on multi-processor platforms. You can
-		port your favorite RTOS to RGMP together with an unmodified Linux to form a
-		hybrid operating system. This makes your application able to use both RTOS
-		and GPOS features.
-
-		See http://rgmp.sourceforge.net/wiki/index.php/Main_Page for further information
-		about RGMP.
-
 config ARCH_BOARD_SABRE_6QUAD
 	bool "NXP/Freescale i.MX6 Sabre-6Quad board"
 	depends on ARCH_CHIP_IMX6_6QUAD
@@ -807,6 +850,12 @@ config ARCH_BOARD_SAM3UEK
 	---help---
 		The port of NuttX to the Atmel SAM3U-EK development board.
 
+config ARCH_BOARD_SAM4CMP_DB
+	bool "Atmel SAM4CMP-DB development board"
+	depends on ARCH_CHIP_ATSAM4CMP16B
+	---help---
+		The port of NuttX to the Atmel SAM4CMP-DB development board.
+
 config ARCH_BOARD_SAM4EEK
 	bool "Atmel SAM4E-EK development board"
 	depends on ARCH_CHIP_ATSAM4E16E
@@ -897,6 +946,17 @@ config ARCH_BOARD_SPARK
 		(http://www.spark.io).  This board features the STM32103CBT6
 		MCU from STMicro.
 
+config ARCH_BOARD_STM32_BUTTERFLY2
+	bool "Kamami STM32Butterfly2 development board"
+	depends on ARCH_CHIP_STM32F107VC
+	select ARCH_HAVE_LEDS
+	select ARCH_HAVE_BUTTONS
+	---help---
+		A configuration for the Kamami STM32Butterfly2 development board
+		based on STM32F107VC micro-controler chip with optional ETH
+		board.  See
+		https://kamami.pl/zestawy-uruchomieniowe-stm32/178507-stm32butterfly2.html
+
 config ARCH_BOARD_STM32_TINY
 	bool "STM32-Tiny board"
 	depends on ARCH_CHIP_STM32F103C8
@@ -910,6 +970,8 @@ config ARCH_BOARD_STM32F103_MINIMUM
 	bool "STM32F103C8T6 Minimum ARM Development Board"
 	depends on ARCH_CHIP_STM32F103C8
 	select ARCH_HAVE_LEDS
+	select ARCH_HAVE_BUTTONS
+	select ARCH_HAVE_IRQBUTTONS
 	---help---
 		A configuration for the STM32F103 Minimum board.
 
@@ -984,7 +1046,7 @@ config ARCH_BOARD_STM32F429I_DISCO
 
 config ARCH_BOARD_STM32F746G_DISCO
 	bool "STMicro STM32F746G-Discovery board"
-	depends on ARCH_CHIP_STM32F746
+	depends on ARCH_CHIP_STM32F746NG
 	select ARCH_HAVE_LEDS
 	select ARCH_HAVE_BUTTONS
 	select ARCH_HAVE_IRQBUTTONS
@@ -993,8 +1055,14 @@ config ARCH_BOARD_STM32F746G_DISCO
 		MCU. The STM32F746NGH6  is a 216MHz Cortex-M7 operation with 1024Kb Flash
 		memory and 320Kb SRAM.
 
+config ARCH_BOARD_STM32F746_WS
+	bool "Waveshare STM32F746 board"
+	depends on ARCH_CHIP_STM32F746IG
+	---help---
+		Waveshare STM32F746 development board featuring the STM32F746IG MCU.
+
 config ARCH_BOARD_STM32L476VG_DISCO
-	bool "STMicro STM32F746VG-Discovery board"
+	bool "STMicro STM32L476VG -Discovery board"
 	depends on ARCH_CHIP_STM32L476RG
 	select ARCH_HAVE_LEDS
 	select ARCH_HAVE_BUTTONS
@@ -1004,6 +1072,17 @@ config ARCH_BOARD_STM32L476VG_DISCO
 		MCU. The STM32L476VG  is a Cortex-M4 optimised for low-power operation
 		at up to 80MHz operation with 1024Kb Flash memory and 96+32Kb SRAM.
 
+config ARCH_BOARD_STM32L476_MDK
+	bool "Motorola Mods Development Kit (MDK)"
+	depends on ARCH_CHIP_STM32L476RG
+	select ARCH_HAVE_LEDS
+	select ARCH_HAVE_BUTTONS
+	select ARCH_HAVE_IRQBUTTONS
+	---help---
+		Motorola Mods Development Board (MDK) features  STM32L476ME MCU.
+		The STM32L476ME  is a Cortex-M4 optimised for low-power operation
+		at up to 80MHz operation with 1024Kb Flash memory and 96+32Kb SRAM.
+
 config ARCH_BOARD_STM32L_DISCOVERY
 	bool "STMicro STM32L-Discovery board"
 	depends on ARCH_CHIP_STM32L152RB
@@ -1110,7 +1189,7 @@ config ARCH_BOARD_CC3200_LAUNCHPAD
 		Tiva CC3200 Launchpad.
 
 config ARCH_BOARD_TWR_K60N512
-	bool "FreeScale TWR-K60N512d evelopment board"
+	bool "FreeScale TWR-K60N512 development board"
 	depends on ARCH_CHIP_MK60N512VMD100
 	select ARCH_HAVE_LEDS
 	select ARCH_HAVE_BUTTONS
@@ -1119,6 +1198,16 @@ config ARCH_BOARD_TWR_K60N512
 		Kinetis K60 Cortex-M4 MCU.  This port uses the FreeScale TWR-K60N512
 		development board.
 
+config ARCH_BOARD_TWR_K64F120M
+	bool "Freescale TWR-K64F120M development board"
+	depends on ARCH_CHIP_MK64FN1M0VMD12
+	select ARCH_HAVE_LEDS
+	select ARCH_HAVE_BUTTONS
+	select ARCH_HAVE_IRQBUTTONS
+	---help---
+		Kinetis K64 Cortex-M4 MCU. This port uses the Freescale TWR-K64F120M
+		development board.
+
 config ARCH_BOARD_U_BLOX_C027
 	bool "u-blox C027"
 	depends on ARCH_CHIP_LPC1768
@@ -1238,12 +1327,6 @@ config ARCH_BOARD_CUSTOM
 		Don't see the board you want?  You must first select the exact MCU part
 		number, then the boards supporting that part will be available for selection.
 
-config ARCH_BOARD_MOXA
-	bool "Moxa board"
-	depends on ARCH_CHIP_MOXART
-	---help---
-		Moxa
-
 endchoice
 
 if ARCH_BOARD_CUSTOM
@@ -1258,6 +1341,7 @@ config ARCH_BOARD_CUSTOM_NAME
 
 config ARCH_BOARD_CUSTOM_DIR
 	string "Custom board directory"
+	default ""
 	---help---
 		If the custom board configuration is selected, then it is necessary
 		to also tell the build system where it can find the board directory
@@ -1270,34 +1354,10 @@ config ARCH_BOARD_CUSTOM_DIR
 
 config ARCH_BOARD_CUSTOM_DIR_RELPATH
 	bool "Relative custom board directory"
+	default y
 	---help---
 		Specifies that the board directory is relative to the NuttX directory.
 
-config BOARD_CRASHDUMP
-	bool "Enable Board level logging of crash dumps"
-	default n
-	---help---
-		If selected up_asseert will call out to board_crashdump, in the case
-		of an assertion failure, prior to calling exit. Or in the
-		case of a hardfault prior to looping indefinitely. board_crashdump
-		then has a chance to save the state of the machine.
-
-		The purpose of board_crashdump is to save as much information as it can
-		about the cause of the fault and then most likely reset the system.
-
-		 N.B. There is limited system resources that can be used, who knows
-		 what memory is trashed? So all we can expect to do is save the
-		"machine state" in a place where on the next reset can write it
-		to more sophisticated storage in a sane operating environment.
-
-config BOARD_RESET_ON_CRASH
-	bool "Eanble Board Reset after the crashdump is saved"
-	default n
-	depends on BOARD_CRASHDUMP
-	---help---
-		If selected the board_crashdump should reset the machine after
-		saveing the state of the machine
-
 config BOARD_CUSTOM_LEDS
 	bool "Custom board LEDs"
 	default n
@@ -1331,11 +1391,9 @@ config ARCH_BOARD
 	default "arduino-mega2560"         if ARCH_BOARD_ARDUINO_MEGA2560
 	default "arduino-due"              if ARCH_BOARD_ARDUINO_DUE
 	default "avr32dev1"                if ARCH_BOARD_AVR32DEV1
+	default "bambino-200e"             if ARCH_BOARD_BAMBINO_200E
 	default "c5471evm"                 if ARCH_BOARD_C5471EVM
 	default "cloudctrl"                if ARCH_BOARD_CLOUDCTRL
-	default "compal_e86"               if ARCH_BOARD_COMPALE86
-	default "compal_e88"               if ARCH_BOARD_COMPALE88
-	default "compal_e99"               if ARCH_BOARD_COMPALE99
 	default "demo9s12ne64"             if ARCH_BOARD_DEMOS92S12NEC64
 	default "dk-tm4c129x"              if ARCH_BOARD_DK_TM4C129X
 	default "ea3131"                   if ARCH_BOARD_EA3131
@@ -1344,9 +1402,12 @@ config ARCH_BOARD
 	default "efm32-g8xx-stk"           if ARCH_BOARD_EFM32G8XXSTK
 	default "efm32gg-stk3700"          if ARCH_BOARD_EFM32GG_STK3700
 	default "ekk-lm3s9b96"             if ARCH_BOARD_EKKLM3S9B96
+	default "esp32-core"               if ARCH_BOARD_ESP32CORE
 	default "ez80f910200kitg"          if ARCH_BOARD_EZ80F910200KITG
 	default "ez80f910200zco"           if ARCH_BOARD_EZ80F910200ZCO
 	default "fire-stm32v2"             if ARCH_BOARD_FIRE_STM32
+	default "freedom-k64f"             if ARCH_BOARD_FREEDOM_K64F
+	default "freedom-k66f"             if ARCH_BOARD_FREEDOM_K66F
 	default "freedom-kl25z"            if ARCH_BOARD_FREEDOM_KL25Z
 	default "freedom-kl26z"            if ARCH_BOARD_FREEDOM_KL26Z
 	default "hymini-stm32v"            if ARCH_BOARD_HYMINI_STM32V
@@ -1373,14 +1434,17 @@ config ARCH_BOARD
 	default "ne64badge"                if ARCH_BOARD_NE64BADGE
 	default "ntosd-dm320"              if ARCH_BOARD_NTOSD_DM320
 	default "nutiny-nuc120"            if ARCH_BOARD_NUTINY_NUC120
+	default "nr5m100-nexys4"           if ARCH_BOARD_NR5M100_NEXYS4
 	default "olimex-efm32g880f128-stk" if ARCH_BOARD_OLIMEX_EFM32G880F128_STK
 	default "olimex-lpc1766stk"        if ARCH_BOARD_LPC1766STK
 	default "olimex-lpc2378"           if ARCH_BOARD_OLIMEXLPC2378
 	default "olimex-lpc-h3131"         if ARCH_BOARD_OLIMEX_LPC_H3131
 	default "olimex-stm32-h405"        if ARCH_BOARD_OLIMEX_STM32H405
 	default "olimex-stm32-h407"        if ARCH_BOARD_OLIMEX_STM32H407
+	default "olimex-stm32-e407"        if ARCH_BOARD_OLIMEX_STM32E407
 	default "olimex-stm32-p107"        if ARCH_BOARD_OLIMEX_STM32P107
 	default "olimex-stm32-p207"        if ARCH_BOARD_OLIMEX_STM32P207
+	default "olimex-stm32-p407"        if ARCH_BOARD_OLIMEX_STM32P407
 	default "olimex-strp711"           if ARCH_BOARD_OLIMEX_STRP711
 	default "olimexino-stm32"          if ARCH_BOARD_OLIMEXINO_STM32
 	default "open1788"                 if ARCH_BOARD_OPEN1788
@@ -1390,13 +1454,12 @@ config ARCH_BOARD
 	default "pic32mx-starterkit"       if ARCH_BOARD_PIC32MX_STARTERKIT
 	default "pic32mx7mmb"              if ARCH_BOARD_PIC32MX7MMB
 	default "pic32mz-starterkit"       if ARCH_BOARD_PIC32MZ_STARTERKIT
-	default "pirelli_dpl10"            if ARCH_BOARD_PIRELLI_DPL10
 	default "nucleo-144"               if ARCH_BOARD_NUCLEO_144
 	default "nucleo-f303re"            if ARCH_BOARD_NUCLEO_F303RE
+	default "nucleo-f334r8"            if ARCH_BOARD_NUCLEO_F334R8
 	default "nucleo-f4x1re"            if ARCH_BOARD_NUCLEO_F401RE || ARCH_BOARD_NUCLEO_F411RE
 	default "nucleo-l476rg"            if ARCH_BOARD_NUCLEO_L476RG
 	default "qemu-i486"                if ARCH_BOARD_QEMU_I486
-	default "rgmp"                     if ARCH_BOARD_RGMP
 	default "sabre-6quad"              if ARCH_BOARD_SABRE_6QUAD
 	default "sama5d2-xult"             if ARCH_BOARD_SAMA5D2_XULT
 	default "sama5d3x-ek"              if ARCH_BOARD_SAMA5D3X_EK
@@ -1406,6 +1469,7 @@ config ARCH_BOARD
 	default "samd21-xplained"          if ARCH_BOARD_SAMD21_XPLAINED
 	default "saml21-xplained"          if ARCH_BOARD_SAML21_XPLAINED
 	default "sam3u-ek"                 if ARCH_BOARD_SAM3UEK
+	default "sam4cmp-db"               if ARCH_BOARD_SAM4CMP_DB
 	default "sam4e-ek"                 if ARCH_BOARD_SAM4EEK
 	default "sam4l-xplained"           if ARCH_BOARD_SAM4L_XPLAINED
 	default "sam4s-xplained"           if ARCH_BOARD_SAM4S_XPLAINED
@@ -1415,6 +1479,7 @@ config ARCH_BOARD
 	default "shenzhou"                 if ARCH_BOARD_SHENZHOU
 	default "skp16c26"                 if ARCH_BOARD_SKP16C26
 	default "spark"                    if ARCH_BOARD_SPARK
+	default "stm32butterfly2"          if ARCH_BOARD_STM32_BUTTERFLY2
 	default "stm32_tiny"               if ARCH_BOARD_STM32_TINY
 	default "stm32f103-minimum"        if ARCH_BOARD_STM32F103_MINIMUM
 	default "stm3210e-eval"            if ARCH_BOARD_STM3210E_EVAL
@@ -1425,7 +1490,9 @@ config ARCH_BOARD
 	default "stm32f411e-disco"         if ARCH_BOARD_STM32F411E_DISCO
 	default "stm32f429i-disco"         if ARCH_BOARD_STM32F429I_DISCO
 	default "stm32f746g-disco"         if ARCH_BOARD_STM32F746G_DISCO
+	default "stm32f746-ws"             if ARCH_BOARD_STM32F746_WS
 	default "stm32l476vg-disco"        if ARCH_BOARD_STM32L476VG_DISCO
+	default "stm32l476-mdk"            if ARCH_BOARD_STM32L476_MDK
 	default "stm32ldiscovery"          if ARCH_BOARD_STM32L_DISCOVERY
 	default "stm32vldiscovery"         if ARCH_BOARD_STM32VL_DISCOVERY
 	default "mikroe-stm32f4"           if ARCH_BOARD_MIKROE_STM32F4
@@ -1437,6 +1504,7 @@ config ARCH_BOARD
 	default "tm4c1294-launchpad"       if ARCH_BOARD_TM4C1294_LAUNCHPAD
 	default "cc3200-launchpad"         if ARCH_BOARD_CC3200_LAUNCHPAD
 	default "twr-k60n512"              if ARCH_BOARD_TWR_K60N512
+	default "twr-k64f120m"             if ARCH_BOARD_TWR_K64F120M
 	default "u-blox-c027"              if ARCH_BOARD_U_BLOX_C027
 	default "ubw32"                    if ARCH_BOARD_UBW32
 	default "us7032evb1"               if ARCH_BOARD_US7032EVB1
@@ -1457,7 +1525,7 @@ config ARCH_HAVE_LEDS
 	bool
 
 config ARCH_LEDS
-	bool "Board LED support"
+	bool "Board LED Status support"
 	default y
 	depends on ARCH_HAVE_LEDS
 	---help---
@@ -1483,34 +1551,9 @@ config ARCH_IRQBUTTONS
 	---help---
 		"Support interrupts on button presses and releases."
 
-config NSH_MMCSDMINOR
-	int "MMC/SD minor number"
-	default 0
-	depends on NSH_LIBRARY && MMCSD
-	---help---
-		If board-specific NSH start-up logic needs to mount an MMC/SD device, then the
-		setting should be provided to identify the MMC/SD minor device number (i.e., the N ini
-		/dev/mmcsdN).  Default 0
-
-config NSH_MMCSDSLOTNO
-	int "MMC/SD slot number"
-	default 0
-	depends on NSH_LIBRARY && MMCSD
-	---help---
-		If board-specific NSH start-up supports more than one MMC/SD slot, then this setting
-		should be provided to indicate which slot should be used.  Default: 0.
-
-config NSH_MMCSDSPIPORTNO
-	int "MMC/SD SPI device number"
-	default 0
-	depends on NSH_LIBRARY && MMCSD && MMCSD_SPI
-	---help---
-		If board-specif NSH start-up logic will mount an SPI-based MMC/SD volume, then this
-		setting may be needed to tell the board logic which SPI bus to use.  Default: 0
-		(meaning is board-specific).
-
 comment "Board-Specific Options"
 
+
 if ARCH_BOARD_AMBER
 source "configs/amber/Kconfig"
 endif
@@ -1523,21 +1566,15 @@ endif
 if ARCH_BOARD_AVR32DEV1
 source "configs/avr32dev1/Kconfig"
 endif
+if ARCH_BOARD_BAMBINO_200E
+source "configs/bambino-200e/Kconfig"
+endif
 if ARCH_BOARD_C5471EVM
 source "configs/c5471evm/Kconfig"
 endif
 if ARCH_BOARD_CLOUDCTRL
 source "configs/cloudctrl/Kconfig"
 endif
-if ARCH_BOARD_COMPALE86
-source "configs/compal_e86/Kconfig"
-endif
-if ARCH_BOARD_COMPALE88
-source "configs/compal_e88/Kconfig"
-endif
-if ARCH_BOARD_COMPALE99
-source "configs/compal_e99/Kconfig"
-endif
 if ARCH_BOARD_DEMOS92S12NEC64
 source "configs/demo9s12ne64/Kconfig"
 endif
@@ -1562,6 +1599,9 @@ endif
 if ARCH_BOARD_EKKLM3S9B96
 source "configs/ekk-lm3s9b96/Kconfig"
 endif
+if ARCH_BOARD_ESP32CORE
+source "configs/esp32-core/Kconfig"
+endif
 if ARCH_BOARD_EZ80F910200KITG
 source "configs/ez80f910200kitg/Kconfig"
 endif
@@ -1571,6 +1611,12 @@ endif
 if ARCH_BOARD_FIRE_STM32
 source "configs/fire-stm32v2/Kconfig"
 endif
+if ARCH_BOARD_FREEDOM_K64F
+source "configs/freedom-k64f/Kconfig"
+endif
+if ARCH_BOARD_FREEDOM_K66F
+source "configs/freedom-k66f/Kconfig"
+endif
 if ARCH_BOARD_FREEDOM_KL25Z
 source "configs/freedom-kl25z/Kconfig"
 endif
@@ -1637,6 +1683,9 @@ endif
 if ARCH_BOARD_MOTEINO_MEGA
 source "configs/moteino-mega/Kconfig"
 endif
+if ARCH_BOARD_MOXA
+source "configs/moxa/Kconfig"
+endif
 if ARCH_BOARD_MX1ADS
 source "configs/mx1ads/Kconfig"
 endif
@@ -1667,12 +1716,18 @@ endif
 if ARCH_BOARD_OLIMEX_STM32H407
 source "configs/olimex-stm32-h407/Kconfig"
 endif
+if ARCH_BOARD_OLIMEX_STM32E407
+source "configs/olimex-stm32-e407/Kconfig"
+endif
 if ARCH_BOARD_OLIMEX_STM32P107
 source "configs/olimex-stm32-p107/Kconfig"
 endif
 if ARCH_BOARD_OLIMEX_STM32P207
 source "configs/olimex-stm32-p207/Kconfig"
 endif
+if ARCH_BOARD_OLIMEX_STM32P407
+source "configs/olimex-stm32-p407/Kconfig"
+endif
 if ARCH_BOARD_OLIMEX_STRP711
 source "configs/olimex-strp711/Kconfig"
 endif
@@ -1697,15 +1752,15 @@ endif
 if ARCH_BOARD_PIC32MZ_STARTERKIT
 source "configs/pic32mz-starterkit/Kconfig"
 endif
-if ARCH_BOARD_PIRELLI_DPL10
-source "configs/pirelli_dpl10/Kconfig"
-endif
 if ARCH_BOARD_NUCLEO_144
 source "configs/nucleo-144/Kconfig"
 endif
 if ARCH_BOARD_NUCLEO_F303RE
 source "configs/nucleo-f303re/Kconfig"
 endif
+if ARCH_BOARD_NUCLEO_F334R8
+source "configs/nucleo-f334r8/Kconfig"
+endif
 if ARCH_BOARD_NUCLEO_F401RE || ARCH_BOARD_NUCLEO_F411RE
 source "configs/nucleo-f4x1re/Kconfig"
 endif
@@ -1715,9 +1770,6 @@ endif
 if ARCH_BOARD_QEMU_I486
 source "configs/qemu-i486/Kconfig"
 endif
-if ARCH_BOARD_RGMP
-source "configs/rgmp/Kconfig"
-endif
 if ARCH_BOARD_SABRE_6QUAD
 source "configs/sabre-6quad/Kconfig"
 endif
@@ -1745,6 +1797,9 @@ endif
 if ARCH_BOARD_SAM3UEK
 source "configs/sam3u-ek/Kconfig"
 endif
+if ARCH_BOARD_SAM4CMP_DB
+source "configs/sam4cmp-db/Kconfig"
+endif
 if ARCH_BOARD_SAM4EEK
 source "configs/sam4e-ek/Kconfig"
 endif
@@ -1772,6 +1827,9 @@ endif
 if ARCH_BOARD_SPARK
 source "configs/spark/Kconfig"
 endif
+if ARCH_BOARD_STM32_BUTTERFLY2
+source "configs/stm32butterfly2/Kconfig"
+endif
 if ARCH_BOARD_STM32_TINY
 source "configs/stm32_tiny/Kconfig"
 endif
@@ -1799,9 +1857,15 @@ endif
 if ARCH_BOARD_STM32F746G_DISCO
 source "configs/stm32f746g-disco/Kconfig"
 endif
+if ARCH_BOARD_STM32F746_WS
+source "configs/stm32f746-ws/Kconfig"
+endif
 if ARCH_BOARD_STM32L476VG_DISCO
 source "configs/stm32l476vg-disco/Kconfig"
 endif
+if ARCH_BOARD_STM32L476_MDK
+source "configs/stm32l476-mdk/Kconfig"
+endif
 if ARCH_BOARD_STM32L_DISCOVERY
 source "configs/stm32ldiscovery/Kconfig"
 endif
@@ -1832,6 +1896,9 @@ endif
 if ARCH_BOARD_TWR_K60N512
 source "configs/twr-k60n512/Kconfig"
 endif
+if ARCH_BOARD_TWR_K64F120M
+source "configs/twr-k64f120m/Kconfig"
+endif
 if ARCH_BOARD_U_BLOX_C027
 source "configs/u-blox-c027/Kconfig"
 endif
@@ -1868,10 +1935,35 @@ endif
 if ARCH_BOARD_SIM
 source "configs/sim/Kconfig"
 endif
-if ARCH_BOARD_MOXA
-source "configs/moxa/Kconfig"
+if ARCH_BOARD_CUSTOM
+source "configs/dummy/Kconfig"
 endif
 
+config BOARD_CRASHDUMP
+	bool "Enable Board level logging of crash dumps"
+	default n
+	---help---
+		If selected up_assert will call out to board_crashdump, in the case
+		of an assertion failure, prior to calling exit. Or in the
+		case of a hardfault prior to looping indefinitely. board_crashdump
+		then has a chance to save the state of the machine.
+
+		The purpose of board_crashdump is to save as much information as it can
+		about the cause of the fault and then most likely reset the system.
+
+		 N.B. There is limited system resources that can be used, who knows
+		 what memory is trashed? So all we can expect to do is save the
+		"machine state" in a place where on the next reset can write it
+		to more sophisticated storage in a sane operating environment.
+
+config BOARD_RESET_ON_CRASH
+	bool "Enable Board Reset after the crashdump is saved"
+	default n
+	depends on BOARD_CRASHDUMP
+	---help---
+		If selected the board_crashdump should reset the machine after
+		saveing the state of the machine
+
 config LIB_BOARDCTL
 	bool "Enable boardctl() interface"
 	default n
@@ -1945,31 +2037,6 @@ config BOARDCTL_TSCTEST
 		specific logic must provide board_tsc_setup() and
 		board_tsc_teardown() interfaces.
 
-config BOARDCTL_ADCTEST
-	bool "Enable ADC test interfaces"
-	default n
-	---help---
-		Enables support for the BOARDIOC_ADCTEST_SETUP boardctl() command.
-		Architecture specific logic must provide board_adc_setup()
-		interface.
-
-config BOARDCTL_PWMTEST
-	bool "Enable PWM test interfaces"
-	default n
-	---help---
-		Enables support for the BOARDIOC_PWMTEST_SETUP boardctl() command.
-		Architecture specific logic must provide board_pwm_setup()
-		interface.
-
-config BOARDCTL_CANINIT
-	bool "Enable CAN initialize interface"
-	default n
-	depends on CAN
-	---help---
-		Enables support for the BOARDIOC_CAN_INITIALIZE boardctl() command.
-		Architecture specific logic must provide board_can_initialize()
-		interface.
-
 config BOARDCTL_GRAPHICS
 	bool "Enable custom graphics initialization interfaces"
 	default n
diff --git a/configs/Makefile b/configs/Makefile
index 496601da0b05f2040c0cb20213e98f1e8f6b8805..f430e137e885fb1ee055c1a91b49ae98e1c71a86 100644
--- a/configs/Makefile
+++ b/configs/Makefile
@@ -35,10 +35,38 @@
 
 -include $(TOPDIR)/Make.defs
 
+# Determine if there is a Kconfig file for any custom board configuration
+
+ifeq ($(CONFIG_ARCH_BOARD_CUSTOM),y)
+  CUSTOM_DIR = $(patsubst "%",%,$(CONFIG_ARCH_BOARD_CUSTOM_DIR))
+  ifeq ($(CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH),y)
+    CUSTOM_KPATH = $(TOPDIR)$(DELIM)$(CUSTOM_DIR)$(DELIM)Kconfig
+  else
+    CUSTOM_KPATH = $(CUSTOM_DIR)$(DELIM)Kconfig
+  endif
+  CUSTOM_KCONFIG = $(if $(wildcard $(CUSTOM_KPATH)),y,)
+else
+  CUSTOM_KCONFIG =
+endif
+
+ifeq ($(CUSTOM_KCONFIG),y)
+  BOARD_KCONFIG = $(CUSTOM_KPATH)
+else
+  BOARD_KCONFIG = $(TOPDIR)$(DELIM)configs$(DELIM)dummy$(DELIM)dummy_kconfig
+endif
+
+DUMMY_KCONFIG = $(TOPDIR)$(DELIM)configs$(DELIM)dummy$(DELIM)Kconfig
+
+# The board configuration should be installed in the arch/ directory
+
+BOARD_DIR = $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board
+BOARD_INSTALLED = $(if $(wildcard $(BOARD_DIR)$(DELIM)Makefile),y,)
+
 # Basic
 
 CONFIG_ASRCS =
 CONFIG_CSRCS =
+CONFIG_CXXSRCS =
 
 # boardctl support
 
@@ -52,13 +80,16 @@ AOBJS = $(ASRCS:.S=$(OBJEXT))
 CSRCS = $(CONFIG_CSRCS)
 COBJS = $(CSRCS:.c=$(OBJEXT))
 
+CXXSRCS = $(CONFIG_CXXSRCS)
+CXXOBJS = $(CXXSRCS:.cxx=$(OBJEXT))
+
 SRCS = $(ASRCS) $(CSRCS)
 OBJS = $(AOBJS) $(COBJS)
 
 BIN = libconfigs$(LIBEXT)
 
 all: $(BIN)
-.PHONY: depend clean distclean
+.PHONY: depend ccontext clean_context clean distclean
 
 $(AOBJS): %$(OBJEXT): %.S
 	$(call ASSEMBLE, $<, $@)
@@ -66,18 +97,38 @@ $(AOBJS): %$(OBJEXT): %.S
 $(COBJS): %$(OBJEXT): %.c
 	$(call COMPILE, $<, $@)
 
-$(BIN): $(OBJS)
-	$(call ARCHIVE, $@, $(OBJS))
+$(CXXOBJS): %$(OBJEXT): %.cxx
+	$(call COMPILEXX, $<, $@)
 
-.depend: Makefile $(SRCS)
+$(BIN): $(OBJS) $(CXXOBJS)
+	$(call ARCHIVE, $@, $(OBJS) $(CXXOBJS))
+
+.depend: Makefile $(SRCS) $(CXXSRCS)
 ifneq ($(SRCS),)
 	$(Q) $(MKDEP) --dep-path . "$(CC)" -- $(CFLAGS) -- $(SRCS) >Make.dep
+endif
+ifneq ($(CXXSRCS),)
+	$(Q) $(MKDEP) --dep-path . "$(CXX)" -- $(CXXFLAGS) -- $(CXXSRCS) >>Make.dep
 endif
 	$(Q) touch $@
 
 depend: .depend
 
-clean:
+$(DUMMY_KCONFIG): $(BOARD_KCONFIG)
+	$(call DELFILE, $(DUMMY_KCONFIG))
+	$(Q) cp -f $(BOARD_KCONFIG) $(DUMMY_KCONFIG)
+
+dirlinks: $(DUMMY_KCONFIG)
+
+context: $(DUMMY_KCONFIG)
+ifeq ($(BOARD_INSTALLED),y)
+	$(Q) $(MAKE) -C $(BOARD_DIR) TOPDIR="$(TOPDIR)" context
+endif
+
+clean_context:
+	$(call DELFILE, $(DUMMY_KCONFIG))
+
+clean: clean_context
 	$(call DELFILE, $(BIN))
 	$(call CLEAN)
 
diff --git a/configs/README.txt b/configs/README.txt
index 9b1c8486bac2551d012ec604212528d34a1725d1..a4ce0ded1959979d490f7f6afe7a3614776beacb 100644
--- a/configs/README.txt
+++ b/configs/README.txt
@@ -123,7 +123,7 @@ Make.defs -- This makefile fragment provides architecture and
 
   Definitions in the Make.defs file probably depend on some of the
   settings in the .config file.  For example, the CFLAGS will most likely be
-  different if CONFIG_DEBUG=y.
+  different if CONFIG_DEBUG_FEATURES=y.
 
   The included tools/Config.mk file contains additional definitions that may
   be overriden in the architecture-specific Make.defs file as necessary:
@@ -191,6 +191,9 @@ configs/avr32dev1
   Atmel website.  STATUS: This port is functional but very basic.  There
   are configurations for NSH and the OS test.
 
+configs/bambino-200e
+  Micromint Bambino board. This board is based on the LPC4330FBD144.
+
 configs/c5471evm
   This is a port to the Spectrum Digital C5471 evaluation board.  The
   TMS320C5471 is a dual core processor from TI with an ARM7TDMI general
@@ -203,15 +206,8 @@ configs/cloudctrl
   board. Based on the Shenzhou IV development board design.  It is based on
   the STM32F107VC MCU.
 
-configs/compal_e86, compal_e88 and compal_e99
-  These directories contain the board support for compal e86, e88 and e99 phones.
-  These ports are based on patches contributed by Denis Carikli for both the
-  compal e99 and e88.  The patches were made by Alan Carvalho de Assis and
-  Denis Carikli using the Stefan Richter's Osmocom-bb patches.  The variant
-  for the e86 was submitted by Craig Comstock.
-
 configs/demo9s12ne64
-  Freescale DMO9S12NE64 board based on the MC9S12NE64 hcs12 cpu.  This
+  NXP/FreeScale DMO9S12NE64 board based on the MC9S12NE64 hcs12 cpu.  This
   port uses the m9s12x GCC toolchain.  STATUS:  (Still) under development; it
   is code complete but has not yet been verified.
 
@@ -246,6 +242,14 @@ configs/ekk-lm3s9b96
   TI/Stellaris EKK-LM3S9B96 board.  This board is based on the
   an EKK-LM3S9B96 which is a Cortex-M3.
 
+configs/esp-core
+  The ESP32 is a dual-core system from Expressif with two Harvard
+  architecture Xtensa LX6 CPUs. All embedded memory, external memory and
+  nd peripherals are located on the data bus and/or the instruction bus of
+  bus of these CPUs. With some minor exceptions, the address mapping of two
+  CPUs is symmetric, meaning they use the same addresses to access the same
+  memory.
+
 configs/ez80f0910200kitg
   ez80Acclaim! Microcontroller.  This port use the Zilog ez80f0910200kitg
   development kit, eZ80F091 part, and the Zilog ZDS-II Windows command line
@@ -261,9 +265,13 @@ configs/fire-stm32v2
   STM32F103VET6 chip.  See http://firestm32.taobao.com .  Version 2 and 3 of
   the boards are supported but only version 2 has been tested.
 
+configs/freedom-k64f
+  This port uses the NXP/FreeScale FREEDOM-K64F development board. This board
+  uses the Kinetis K64 MK64FN1M0VLL12 Cortex-M4 MCU.
+
 configs/freedom-kl25z
 configs/freedom-kl26z
-  These configurations are for the Freescale Freedom KL25Z and very similar
+  These configurations are for the NXP/FreeScale Freedom KL25Z and very similar
   KL26Z board.  The Freedom-KL25Z features the K25Z120LE3AN chip; the
   Freedom-KL26Z has the K26Z128VLH4 chip.  These are separate configurations
   because of minor differences in the on-board logic.  Both include a
@@ -274,7 +282,7 @@ configs/hymini-stm32v
   STM32F103VCT chip.
 
 configs/kwikstik-k40.
-  Kinetis K40 Cortex-M4 MCU.  This port uses the FreeScale KwikStik-K40
+  Kinetis K40 Cortex-M4 MCU.  This port uses the NXP/FreeScale KwikStik-K40
   development board.
 
 configs/launchxl-tms57004
@@ -367,7 +375,7 @@ configs/moxa
 
 configs/mx1ads
   This is a port to the Motorola MX1ADS development board.  That board
-  is based on the Freescale i.MX1 processor.  The i.MX1 is an ARM920T.
+  is based on the NXP/FreeScale i.MX1 processor.  The i.MX1 is an ARM920T.
   STATUS:  This port is nearly code complete but was never fully
   integrated due to tool-related issues.
 
@@ -393,9 +401,12 @@ configs/ntosd-dm320
   NuttX 0.2.1 release.
 
 configs/nucleo-144
-  STMicro Nucleo-144 development board featuring the STM32F746ZGT6U MCU. The
-  STM32F746ZGT6U is a 216MHz Cortex-M7 operation with 1024Kb Flash memory
-  and 300Kb SRAM.
+  STMicro Nucleo-144 development board family.  Included support for (1) the
+  Nucleo-F767ZG board featuring the STM32F746ZGT6U MCU. The STM32F746ZGT6U
+  is a 216MHz Cortex-M7 operation with 1024Kb Flash memory and 320Kb SRAM.
+  And (2) the Nucleo-F746ZG board featuring the STM32F767ZIT6 MCU. The
+  STM32F767ZIT6 is a 216MHz Cortex-M7 operation with 2048Kb Flash memory
+  and 512Kb SRAM.
 
 configs/nucleo-f4x1re
   STMicro ST Nucleo F401RE and F411RE boards.  See
@@ -435,6 +446,10 @@ configs/olimex-stm32-h407
   further information. This board features the STMicro STM32F407ZGT6 (144
   pins). Contributed by Neil Hancock.
 
+configs/olimex-stm32-e407
+  Olimex STM32 E407 board based on the STMicro STM32F407ZGT6 (144pins).
+  Contributed by Mateusz Szafoni.
+
 configs/olimex-stm32-p107
   This port uses the Olimex STM32-P107 board (STM32F107VC) and a GNU arm-nuttx-elf
   toolchain* under Linux or Cygwin. See the https://www.olimex.com/dev/stm32-p107.html
@@ -445,6 +460,11 @@ configs/olimex-stm32-p207
   toolchain under Linux or Cygwin. See the https://www.olimex.com/dev/stm32-p207.html
   for further information.  Contributed by Martin Lederhilger.
 
+configs/olimex-stm32-p407
+  This port uses the Olimex STM32-P407 board (STM32F407ZG) and a GNU arm-nuttx-elf
+  toolchain under Linux or Cygwin. See the https://www.olimex.com/dev/stm32-p407.html
+  for further information.
+
 configs/olimexino-stm32
   This port uses the Olimexino STM32 board (STM32F103RBT6) and a GNU arm-nuttx-elf
   toolchain* under Linux or Cygwin. See the http://www.olimex.com for further\
@@ -509,7 +529,6 @@ configs/pic32mx7mmb
   Mikroelektronika PIC32MX7 Multimedia Board (MMB).  See
   http://www.mikroe.com/ for further information.
 
-configs/pirelli_dpl10
 configs/pic32mz-starterkit
   This directory contains the port of NuttX to the Microchip PIC32MZ
   Embedded Connectivity (EC) Starter Kit.  There are two configurations of
@@ -522,23 +541,12 @@ configs/pic32mz-starterkit
 
   See www.microchip.com for further information.
 
-  This directory contains the board support for Pirelli "Discus" DP-L10 phones.
-  It is a variant of the compal_e88 config with the small changes for the
-  differences in the board.
-
 configs/qemu-i486
   Port of NuttX to QEMU in i486 mode.  This port will also run on real i486
   hardwared (Google the Bifferboard).
 
-configs/rgmp
-  RGMP stands for RTOS and GPOS on Multi-Processor.  RGMP is a project for
-  running GPOS and RTOS simultaneously on multi-processor platforms. You can
-  port your favorite RTOS to RGMP together with an unmodified Linux to form a
-  hybrid operating system. This makes your application able to use both RTOS
-  and GPOS features.
-
-  See http://rgmp.sourceforge.net/wiki/index.php/Main_Page for further
-  information about RGMP.
+configs/nr5m100-nexys4
+  Port of NuttX to RISC-V platform on IQ-Analog NR5M100 RISC-V FPGA platform.
 
 configs/sabre-6quad
   This directory holds a port of NuttX to the NXP/Freescale Sabre board
@@ -585,6 +593,9 @@ configs/samd21-xplained
 configs/sam3u-ek
   The port of NuttX to the Atmel SAM3U-EK development board.
 
+configs/sam4cmp-db
+  The port of NuttX to the Atmel SAM4CMP-DB development board.
+
 configs/sam4e-ek
   The port of NuttX to the Atmel SAM4E-EK development board.  This board
   features the SAM4E16 MCU running at up to 120MHz.
@@ -637,6 +648,10 @@ configs/stm3240g-eval
   microcontroller (ARM Cortex-M4 with FPU).  This port uses a GNU Cortex-M4
   toolchain (such as CodeSourcery).
 
+configs/stm32butterfly2
+  Kamami stm32butterfly2 development board with optional ETH phy.  See
+  https://kamami.pl/zestawy-uruchomieniowe-stm32/178507-stm32butterfly2.html
+
 configs/stm32f103-minimum
   Generic STM32F103C8T6 Minimum ARM Development Board.
 
@@ -655,6 +670,14 @@ configs/stm32f746g-disco
   MCU. The STM32F746NGH6  is a 216MHz Cortex-M7 operation with 1024Kb Flash
   memory and 300Kb SRAM.
 
+configs/stm32f746g-ws
+  Waveshare STM32F746 development board featuring the STM32F746IG MCU.
+
+configs/stm32l476-mdk
+  Motorola Mods Development Board (MDK) features  STM32L476ME MCU.
+  The STM32L476ME  is a Cortex-M4 optimised for low-power operation
+  at up to 80MHz operation with 1024Kb Flash memory and 96+32Kb SRAM.
+
 configs/stm32l476vg-disco
   STMicro STM32L476VG_DISCO development board featuring the STM32L476VG
   MCU. The STM32L476VG  is a Cortex-M4 optimised for low-power operation
@@ -714,6 +737,10 @@ configs/twr-k60n512
   Kinetis K60 Cortex-M4 MCU.  This port uses the FreeScale TWR-K60N512
   development board.
 
+configs/twr-k64f120m
+  Kinetis K64 Cortex-M4 MCU.  This port uses the FreeScale TWR-K64F120M
+  development board.
+
 configs/ubw32
 
   This is the port to the Sparkfun UBW32 board.  This port uses the original v2.4
diff --git a/configs/amber/hello/Make.defs b/configs/amber/hello/Make.defs
index d618c22cd3bd15e615667f56e0ff1acd326fa0d1..f29c795612df11edd22cb56883911e08156a60e2 100644
--- a/configs/amber/hello/Make.defs
+++ b/configs/amber/hello/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/amber/hello/defconfig b/configs/amber/hello/defconfig
index 5c62c54f88638c70fe654a76da06daaaf6d0557d..4d117408be0e63463d891fee654003ecbd597a98 100644
--- a/configs/amber/hello/defconfig
+++ b/configs/amber/hello/defconfig
@@ -42,7 +42,7 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
@@ -58,8 +58,7 @@ CONFIG_DEBUG_FULLOPT=y
 CONFIG_ARCH_AVR=y
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -234,7 +233,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
 # CONFIG_16550_UART is not set
@@ -298,7 +296,6 @@ CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
 # System Logging
 #
 
-# CONFIG_SYSLOG is not set
 
 #
 # Graphics Support
@@ -355,7 +352,6 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Non-standard Library Support
@@ -414,7 +410,6 @@ CONFIG_EXAMPLES_HELLO=y
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
diff --git a/configs/arduino-due/README.txt b/configs/arduino-due/README.txt
index e128fb71d6833652935a4dd83be9f934d7e0d9d0..e886b558898a263a2933fc5fd5ec4d8a49a6ff23 100644
--- a/configs/arduino-due/README.txt
+++ b/configs/arduino-due/README.txt
@@ -1072,8 +1072,8 @@ Configuration sub-directories
        debug output on USART0 can be enabled with:
 
        Build Setup:
-         CONFIG_DEBUG=y                    : Enable debug features
-         CONFIG_DEBUG_VERBOSE=y            : Enable verbose debug output
+         CONFIG_DEBUG_FEATURES=y           : Enable debug features
+         CONFIG_DEBUG_INFO=y               : Enable verbose debug output
          CONFIG_DEBUG_INPUT=y              : Enable debug output from input devices
 
        STATUS:
diff --git a/configs/arduino-due/nsh/Make.defs b/configs/arduino-due/nsh/Make.defs
index d31a08dd18a8e3f9a28cc637c4c0ba55b5e36f2a..b4601eb781b6d257166ed67e17bda284c0a35c41 100644
--- a/configs/arduino-due/nsh/Make.defs
+++ b/configs/arduino-due/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/arduino-due/nsh/defconfig b/configs/arduino-due/nsh/defconfig
index 51cf6e0923d956b47d0dbc93a61596e61c89a1f8..f7e26ded521a7f0300144d39e034afca37ed1785 100644
--- a/configs/arduino-due/nsh/defconfig
+++ b/configs/arduino-due/nsh/defconfig
@@ -42,10 +42,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,10 +72,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +94,7 @@ CONFIG_ARCH_CHIP_SAM34=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,12 +116,15 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="sam34"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
@@ -131,6 +135,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -473,7 +478,12 @@ CONFIG_DEV_NULL=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -481,6 +491,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -489,9 +500,10 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -515,10 +527,6 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -545,15 +553,18 @@ CONFIG_UART0_2STOP=0
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -585,12 +596,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -652,12 +657,14 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -700,10 +707,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -713,35 +720,33 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -763,8 +768,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -775,6 +780,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -886,12 +892,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -899,6 +905,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/arduino-due/src/sam_autoleds.c b/configs/arduino-due/src/sam_autoleds.c
index 8921c2d04c5034f3354340e40f3d028ac88ce400..f3fcdbdca97fd1658e8fa39450e3bfb4771d1f47 100644
--- a/configs/arduino-due/src/sam_autoleds.c
+++ b/configs/arduino-due/src/sam_autoleds.c
@@ -95,26 +95,6 @@
  * at approximately 2Hz, then a fatal error has been detected and the system
  */
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/arduino-due/src/sam_mmcsd.c b/configs/arduino-due/src/sam_mmcsd.c
index 23787dd7dd146bc2942264a4eb81d6175167480c..b7556ea082fd422de719d79b0b1b83ac65b25428 100644
--- a/configs/arduino-due/src/sam_mmcsd.c
+++ b/configs/arduino-due/src/sam_mmcsd.c
@@ -254,31 +254,31 @@ int sam_sdinitialize(int minor)
 
   /* Get the SPI driver instance for the SD chip select */
 
-  fvdbg("Initializing bit bang SPI for the MMC/SD slot\n");
+  finfo("Initializing bit bang SPI for the MMC/SD slot\n");
 
   spi = sam_mmcsd_spiinitialize();
   if (!spi)
     {
-      fdbg("Failed to bit bang SPI for the MMC/SD slot\n");
+      ferr("ERROR: Failed to bit bang SPI for the MMC/SD slot\n");
       return -ENODEV;
     }
 
-  fvdbg("Successfully initialized bit bang SPI for the MMC/SD slot\n");
+  finfo("Successfully initialized bit bang SPI for the MMC/SD slot\n");
 
   /* Bind the SPI device for the chip select to the slot */
 
-  fvdbg("Binding bit bang SPI device to MMC/SD slot %d\n",
+  finfo("Binding bit bang SPI device to MMC/SD slot %d\n",
         SAM34_MMCSDSLOTNO);
 
   ret = mmcsd_spislotinitialize(minor, SAM34_MMCSDSLOTNO, spi);
   if (ret < 0)
     {
-      fdbg("Failed to bind  bit bang SPI device to MMC/SD slot %d: %d\n",
+      ferr("ERROR: Failed to bind  bit bang SPI device to MMC/SD slot %d: %d\n",
             SAM34_MMCSDSLOTNO, ret);
       return ret;
     }
 
-  fvdbg("Successfuly bound  bit bang SPI device to MMC/SD slot %d\n",
+  finfo("Successfuly bound  bit bang SPI device to MMC/SD slot %d\n",
         SAM34_MMCSDSLOTNO);
 
   return OK;
diff --git a/configs/arduino-due/src/sam_touchscreen.c b/configs/arduino-due/src/sam_touchscreen.c
index d2a2c408ff0bccf9ae1af08f9351826f03a2b25f..b93aa11f68862e7000f14b61b542acdd12f37890 100644
--- a/configs/arduino-due/src/sam_touchscreen.c
+++ b/configs/arduino-due/src/sam_touchscreen.c
@@ -266,15 +266,15 @@ static int tsc_attach(FAR struct ads7843e_config_s *state, xcpt_t isr)
 {
   /* Attach the XPT2046 interrupt */
 
-  ivdbg("Attaching %p to IRQ %d\n", isr, SAM_TSC_IRQ);
-  return irq_attach(SAM_TSC_IRQ, isr);
+  iinfo("Attaching %p to IRQ %d\n", isr, SAM_TSC_IRQ);
+  return irq_attach(SAM_TSC_IRQ, isr, NULL);
 }
 
 static void tsc_enable(FAR struct ads7843e_config_s *state, bool enable)
 {
   /* Attach and enable, or detach and disable */
 
-  ivdbg("IRQ:%d enable:%d\n", SAM_TSC_IRQ, enable);
+  iinfo("IRQ:%d enable:%d\n", SAM_TSC_IRQ, enable);
   if (enable)
     {
       sam_gpioirqenable(SAM_TSC_IRQ);
@@ -300,7 +300,7 @@ static bool tsc_pendown(FAR struct ads7843e_config_s *state)
   /* The /PENIRQ value is active low */
 
   bool pendown = !sam_gpioread(GPIO_TSC_IRQ);
-  ivdbg("pendown:%d\n", pendown);
+  iinfo("pendown:%d\n", pendown);
   return pendown;
 }
 
@@ -359,7 +359,7 @@ int board_tsc_setup(int minor)
   static bool initialized = false;
   int ret;
 
-  idbg("minor %d\n", minor);
+  iinfo("minor %d\n", minor);
   DEBUGASSERT(minor == 0);
 
   /* Have we already initialized?  Since we never uninitialize we must prevent
@@ -383,7 +383,7 @@ int board_tsc_setup(int minor)
       dev = sam_tsc_spiinitialize();
       if (!dev)
         {
-          idbg("Failed to initialize bit bang SPI\n");
+          ierr("ERROR: Failed to initialize bit bang SPI\n");
           return -ENODEV;
         }
 
@@ -392,7 +392,7 @@ int board_tsc_setup(int minor)
       ret = ads7843e_register(dev, &g_tscinfo, CONFIG_ADS7843E_DEVMINOR);
       if (ret < 0)
         {
-          idbg("Failed to register touchscreen device\n");
+          ierr("ERROR: Failed to register touchscreen device\n");
           /* up_spiuninitialize(dev); */
           return -ENODEV;
         }
diff --git a/configs/arduino-due/src/sam_userleds.c b/configs/arduino-due/src/sam_userleds.c
index b461812e50e698c5ca672a2f46cf5d5c41e1f7e7..2d86511b7855a44d27ba4fa75f726d080b314ab9 100644
--- a/configs/arduino-due/src/sam_userleds.c
+++ b/configs/arduino-due/src/sam_userleds.c
@@ -51,38 +51,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Protototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/arduino-mega2560/hello/Make.defs b/configs/arduino-mega2560/hello/Make.defs
index 9eb35f515d0ab8492afaa4b96d96177709bc56a0..6371c1a5888d9c52351c0ba10c015e139fa877e1 100644
--- a/configs/arduino-mega2560/hello/Make.defs
+++ b/configs/arduino-mega2560/hello/Make.defs
@@ -73,7 +73,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/arduino-mega2560/hello/defconfig b/configs/arduino-mega2560/hello/defconfig
index 4459053ee1b4d3a0f4c0f572801cc74a4d8e5bba..59bccf8e6c70b6d988af46ac5b65ddb58bf4de0d 100644
--- a/configs/arduino-mega2560/hello/defconfig
+++ b/configs/arduino-mega2560/hello/defconfig
@@ -45,7 +45,7 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
@@ -62,8 +62,7 @@ CONFIG_DEBUG_FULLOPT=y
 CONFIG_ARCH_AVR=y
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -297,7 +296,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
 # CONFIG_16550_UART is not set
@@ -360,7 +358,7 @@ CONFIG_USART0_2STOP=0
 # System Logging
 #
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
 
 #
 # Networking Support
@@ -393,7 +391,6 @@ CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 # CONFIG_SYSLOG_TIMESTAMP is not set
 
 #
@@ -453,7 +450,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
@@ -511,7 +507,6 @@ CONFIG_EXAMPLES_HELLO=y
 # CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -578,7 +573,7 @@ CONFIG_EXAMPLES_HELLO=y
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_RAMTEST is not set
diff --git a/configs/arduino-mega2560/nsh/Make.defs b/configs/arduino-mega2560/nsh/Make.defs
index b007c01f8abc44bf36419806425c3bff0e7260f1..b18a53d33cf70c1801179afa3aca157b97f806f7 100644
--- a/configs/arduino-mega2560/nsh/Make.defs
+++ b/configs/arduino-mega2560/nsh/Make.defs
@@ -73,7 +73,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/arduino-mega2560/nsh/defconfig b/configs/arduino-mega2560/nsh/defconfig
index 9aee289d6d74ebb06b9e0d0423cb32a9211599ae..11c40ba855b267ec94d5a723621de3f45d3ab250 100644
--- a/configs/arduino-mega2560/nsh/defconfig
+++ b/configs/arduino-mega2560/nsh/defconfig
@@ -46,7 +46,7 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
@@ -63,8 +63,7 @@ CONFIG_DEBUG_FULLOPT=y
 CONFIG_ARCH_AVR=y
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -305,7 +304,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 # CONFIG_16550_UART is not set
@@ -369,7 +367,7 @@ CONFIG_USART0_2STOP=0
 # System Logging
 #
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
 
 #
 # Networking Support
@@ -402,7 +400,6 @@ CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 # CONFIG_SYSLOG_TIMESTAMP is not set
 
 #
@@ -462,7 +459,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
@@ -520,7 +516,6 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -669,7 +664,7 @@ CONFIG_NSH_CONSOLE=y
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_RAMTEST is not set
diff --git a/configs/arduino-mega2560/src/Makefile b/configs/arduino-mega2560/src/Makefile
index 1f7743da6f5113677cd6620c06fd71fed5648b3d..7e5911999ee7cf81b6e6b4eeb286d82e25a12814 100644
--- a/configs/arduino-mega2560/src/Makefile
+++ b/configs/arduino-mega2560/src/Makefile
@@ -87,6 +87,8 @@ libboard$(LIBEXT): $(OBJS)
 
 depend: .depend
 
+context:
+
 clean:
 	$(call DELFILE, libboard$(LIBEXT))
 	$(call CLEAN)
diff --git a/configs/avr32dev1/nsh/Make.defs b/configs/avr32dev1/nsh/Make.defs
index 6b1f20c0a3c556505946ac248653e4e3adc199ed..e6326948d0330d27b848303d21c2ee8aacb8e1a2 100644
--- a/configs/avr32dev1/nsh/Make.defs
+++ b/configs/avr32dev1/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin -muse-rodata-section
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/avr32dev1/nsh/defconfig b/configs/avr32dev1/nsh/defconfig
index 0f87f20046180b408e1c452b5729e31394177f7c..23ba00f22cb401dbf94f475dde9077dc33f008c2 100644
--- a/configs/avr32dev1/nsh/defconfig
+++ b/configs/avr32dev1/nsh/defconfig
@@ -20,7 +20,7 @@ CONFIG_WINDOWS_CYGWIN=y
 #
 # Build Configuration
 #
-CONFIG_APPS_DIR="../apps"
+# CONFIG_APPS_DIR="../apps"
 # CONFIG_BUILD_2PASS is not set
 
 #
@@ -42,7 +42,7 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
@@ -58,8 +58,7 @@ CONFIG_DEBUG_FULLOPT=y
 CONFIG_ARCH_AVR=y
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -272,7 +271,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 # CONFIG_16550_UART is not set
@@ -345,7 +343,6 @@ CONFIG_FS_FAT=y
 # System Logging
 #
 
-# CONFIG_SYSLOG is not set
 
 #
 # Graphics Support
@@ -404,7 +401,6 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Non-standard Library Support
@@ -464,7 +460,6 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
diff --git a/configs/avr32dev1/ostest/Make.defs b/configs/avr32dev1/ostest/Make.defs
index d3265550b1e107999d4930633c9a5f40789310bc..148184d6e88dc29576f00c09d7fe66c93f9442bc 100644
--- a/configs/avr32dev1/ostest/Make.defs
+++ b/configs/avr32dev1/ostest/Make.defs
@@ -88,7 +88,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin -muse-rodata-section
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/avr32dev1/ostest/defconfig b/configs/avr32dev1/ostest/defconfig
index 6fc2eed59f499df469eb1dbcf28b7e6ca928afce..a4b438e02fe15e0a6f041d982e0628d24407ec03 100644
--- a/configs/avr32dev1/ostest/defconfig
+++ b/configs/avr32dev1/ostest/defconfig
@@ -42,7 +42,7 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
@@ -58,8 +58,7 @@ CONFIG_DEBUG_FULLOPT=y
 CONFIG_ARCH_AVR=y
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -271,7 +270,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
 # CONFIG_16550_UART is not set
@@ -335,7 +333,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # System Logging
 #
 
-# CONFIG_SYSLOG is not set
 
 #
 # Graphics Support
@@ -392,7 +389,6 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Non-standard Library Support
@@ -457,7 +453,6 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
diff --git a/configs/avr32dev1/src/avr32_buttons.c b/configs/avr32dev1/src/avr32_buttons.c
index 49a227d8a10d685fc6ac62dcd577ae6dacb4b132..72191bb5855c314847a04ed292fab28c5f673615 100644
--- a/configs/avr32dev1/src/avr32_buttons.c
+++ b/configs/avr32dev1/src/avr32_buttons.c
@@ -42,6 +42,7 @@
 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -55,14 +56,6 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -77,28 +70,26 @@
 
 #if defined(CONFIG_AVR32_GPIOIRQ) && defined(CONFIG_ARCH_IRQBUTTONS) && \
    (defined(CONFIG_AVR32DEV_BUTTON1_IRQ) || defined(CONFIG_AVR32DEV_BUTTON2_IRQ))
-static xcpt_t board_button_irqx(int irq, xcpt_t irqhandler)
+static int board_button_irqx(int irq, xcpt_t irqhandler, void *arg)
 {
-  xcpt_t oldhandler;
-
   /* Attach the handler */
 
-  gpio_irqattach(irq, irqhandler, &oldhandler);
-
-  /* Enable/disable the interrupt */
-
-  if (irqhandler)
-    {
-      gpio_irqenable(irq);
-    }
-  else
+  int ret = gpio_irqattach(irq, irqhandler, &oldhandler, arg);
+  if (ret >= 0)
     {
-      gpio_irqdisable(irq);
+      /* Enable/disable the interrupt */
+
+      if (irqhandler != NULL)
+        {
+          gpio_irqenable(irq);
+        }
+      else
+        {
+         gpio_irqdisable(irq);
+       }
     }
 
-  /* Return the old button handler (so that it can be restored) */
-
-  return oldhandler;
+  return OK;
 }
 #endif
 
@@ -151,8 +142,7 @@ uint8_t board_buttons(void)
  * Description:
  *   This function may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is one
- *   of the BUTTON* definitions provided above. The previous interrupt
- *   handler address isreturned (so that it may restored, if so desired).
+ *   of the BUTTON* definitions provided above.
  *
  * Configuration Notes:
  *   Configuration CONFIG_AVR32_GPIOIRQ must be selected to enable the
@@ -164,25 +154,29 @@ uint8_t board_buttons(void)
  ****************************************************************************/
 
 #if defined(CONFIG_AVR32_GPIOIRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
+  int ret;
+
 #ifdef CONFIG_AVR32DEV_BUTTON1_IRQ
   if (id == BUTTON1)
     {
-      return board_button_irqx(GPIO_BUTTON1_IRQ, irqhandler);
+      ret = board_button_irqx(GPIO_BUTTON1_IRQ, irqhandler, arg);
     }
   else
 #endif
 #ifdef CONFIG_AVR32DEV_BUTTON2_IRQ
   if (id == BUTTON2)
     {
-      return board_button_irqx(GPIO_BUTTON2_IRQ, irqhandler);
+      ret = board_button_irqx(GPIO_BUTTON2_IRQ, irqhandler, arg);
     }
   else
 #endif
     {
-      return NULL;
+      ret = -EINVAL;
     }
+
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/compal_e99/Kconfig b/configs/bambino-200e/Kconfig
similarity index 57%
rename from configs/compal_e99/Kconfig
rename to configs/bambino-200e/Kconfig
index e7d03fb148dff931b8a693a6a780192a594f8195..12ce8d77f51bd613088e80ceb900a7bf1affc5fe 100644
--- a/configs/compal_e99/Kconfig
+++ b/configs/bambino-200e/Kconfig
@@ -3,11 +3,6 @@
 # see the file kconfig-language.txt in the NuttX tools repository.
 #
 
-if ARCH_BOARD_COMPALE99
-
-config COMPALE99_LCD_SSD1783
-	bool "SSD1783 LCD support"
-	default y
-	select LCD
+if ARCH_BOARD_BAMBINO_200E
 
 endif
diff --git a/configs/bambino-200e/README.txt b/configs/bambino-200e/README.txt
new file mode 100644
index 0000000000000000000000000000000000000000..b6adcf8096c74caa97b32314c86a67e2ae9b0660
--- /dev/null
+++ b/configs/bambino-200e/README.txt
@@ -0,0 +1,504 @@
+README
+======
+
+README for NuttX port to the "Bambino 200E" board from Micromint USA
+featuring the NXP LPC4330FBD144 MCU
+
+Contents
+========
+
+  - Bambino 200E board
+  - Status
+  - Serial Console
+  - FPU
+  - Bambino-200e Configuration Options
+  - Configurations
+
+Bambino 200E board
+=====================
+
+  Memory Map
+  ----------
+
+  Block                 Start      Length
+  Name                  Address
+  --------------------- ---------- ------
+  RAM                   0x10000000   128K
+  RAM2                  0x10080000    72K
+  RAMAHB                0x20000000    32K
+  RAMAHB2               0x20008000    16K
+  RAMAHB3               0x2000c000    16K
+  SPIFI flash           0x1e000000  4096K
+
+  GPIO Usage:
+  -----------
+
+  GPIO                              PIN     SIGNAL NAME
+  -------------------------------- ------- --------------
+  gpio3[7]  - LED1                  101     GPIO3[7]
+  gpio5[5]  - LED2                  91      GPIO5[5]
+  gpio0[7]  - BTN1                  96      GPIO0[7]
+
+  Console
+  -------
+
+  The Bambino 200E default console is the UART1 on Gadgeteer Sockets 5 (U).
+
+Status
+======
+
+  Many drivers are working (USB0 Device, Ethernet, etc), but many drivers are
+  missing.
+
+Development Environment
+=======================
+
+  Either Linux or Cygwin on Windows can be used for the development environment.
+  The source has been built only using the GNU toolchain (see below).  Other
+  toolchains will likely cause problems. Testing was performed using the Cygwin
+  environment.
+
+Serial Console
+==============
+
+The LPC4330 Xplorer does not have RS-232 drivers or serial connectors on board.
+USART0 and UART1 are available on J8 as follows:
+
+  ------ ------ -----------------------
+  SIGNAL J8 PIN   LPC4330FET100 PIN
+                  (TFBGA100 package)
+  ------ ------ -----------------------
+  U0_TXD pin  9  F6  P6_4  U0_TXD=Alt 2
+  U0_RXD pin 10  F9  P6_5  U0_RXD=Alt 2
+  U1_TXD pin 13  H8  P1_13 U1_TXD=Alt 1
+  U1_RXD pin 14  J8  P1_14 U1_RXD=Alt 1
+  ------ ------ -----------------------
+
+  GND  is available on J8 pin 1
+  5V   is available on J8 pin 2
+  VBAT is available on J8 pin 3
+
+FPU
+===
+
+FPU Configuration Options
+-------------------------
+
+There are two version of the FPU support built into the most NuttX Cortex-M4
+ports.  The current LPC43xx port support only one of these options, the "Non-
+Lazy Floating Point Register Save".  As a consequence, CONFIG_ARMV7M_CMNVECTOR
+must be defined in *all* LPC43xx configuration files.
+
+1. Lazy Floating Point Register Save.
+
+   This is an untested implementation that saves and restores FPU registers
+   only on context switches.  This means: (1) floating point registers are
+   not stored on each context switch and, hence, possibly better interrupt
+   performance.  But, (2) since floating point registers are not saved,
+   you cannot use floating point operations within interrupt handlers.
+
+   This logic can be enabled by simply adding the following to your .config
+   file:
+
+   CONFIG_ARCH_FPU=y
+
+2. Non-Lazy Floating Point Register Save
+
+   Mike Smith has contributed an extensive re-write of the ARMv7-M exception
+   handling logic. This includes verified support for the FPU.  These changes
+   have not yet been incorporated into the mainline and are still considered
+   experimental.  These FPU logic can be enabled with:
+
+   CONFIG_ARCH_FPU=y
+   CONFIG_ARMV7M_CMNVECTOR=y
+
+   You will probably also changes to the ld.script in if this option is selected.
+   This should work:
+
+   -ENTRY(_stext)
+   +ENTRY(__start)         /* Treat __start as the anchor for dead code stripping */
+   +EXTERN(_vectors)       /* Force the vectors to be included in the output */
+
+CFLAGS
+------
+
+Only the recent toolchains have built-in support for the Cortex-M4 FPU.  You will see
+the following lines in each Make.defs file:
+
+  ifeq ($(CONFIG_ARCH_FPU),y)
+    ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard
+  else
+    ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
+  endif
+
+Configuration Changes
+---------------------
+
+Below are all of the configuration changes that I had to make to configs/stm3240g-eval/nsh2
+in order to successfully build NuttX using the Atollic toolchain WITH FPU support:
+
+  -CONFIG_ARCH_FPU=n                       : Enable FPU support
+  +CONFIG_ARCH_FPU=y
+
+  -CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : Disable the CodeSourcery toolchain
+  +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=n
+
+  -CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=n       : Enable the Atollic toolchains
+  +CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y       :
+
+  -CONFIG_INTELHEX_BINARY=y                : Suppress generation FLASH download formats
+  +CONFIG_INTELHEX_BINARY=n                : (Only necessary with the "Lite" version)
+
+  -CONFIG_HAVE_CXX=y                       : Suppress generation of C++ code
+  +CONFIG_HAVE_CXX=n                       : (Only necessary with the "Lite" version)
+
+See the section above on Toolchains, NOTE 2, for explanations for some of
+the configuration settings.  Some of the usual settings are just not supported
+by the "Lite" version of the Atollic toolchain.
+
+Bambino-200e Configuration Options
+==================================
+
+    CONFIG_ARCH - Identifies the arch/ subdirectory.  This should
+       be set to:
+
+       CONFIG_ARCH=arm
+
+    CONFIG_ARCH_family - For use in C code:
+
+       CONFIG_ARCH_ARM=y
+
+    CONFIG_ARCH_architecture - For use in C code:
+
+       CONFIG_ARCH_CORTEXM4=y
+
+    CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
+
+       CONFIG_ARCH_CHIP=lpc43xx
+
+    CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
+       chip:
+
+       CONFIG_ARCH_CHIP_LPC4330=y
+
+    CONFIG_ARCH_BOARD - Identifies the configs subdirectory and
+       hence, the board that supports the particular chip or SoC.
+
+       CONFIG_ARCH_BOARD=bambino-200e (for the Bambino-200e board)
+
+    CONFIG_ARCH_BOARD_name - For use in C code
+
+       CONFIG_ARCH_BOARD_BAMBINO_200E=y
+
+    CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
+       of delay loops
+
+    CONFIG_ENDIAN_BIG - define if big endian (default is little
+       endian)
+
+    CONFIG_RAM_SIZE - Describes the installed DRAM (CPU SRAM in this case):
+
+       CONFIG_RAM_SIZE=(32*1024) (32Kb)
+
+       There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1.
+
+    CONFIG_RAM_START - The start address of installed DRAM
+
+       CONFIG_RAM_START=0x10000000
+
+    CONFIG_ARCH_FPU - The LPC43xxx supports a floating point unit (FPU)
+
+       CONFIG_ARCH_FPU=y
+
+    CONFIG_LPC43_BOOT_xxx - The startup code needs to know if the code is running
+       from internal FLASH, external FLASH, SPIFI, or SRAM in order to
+       initialize properly.  Note that a boot device is not specified for
+       cases where the code is copied into SRAM; those cases are all covered
+       by CONFIG_LPC43_BOOT_SRAM.
+
+       CONFIG_LPC43_BOOT_SRAM=y      : Running from SRAM             (0x1000:0000)
+       CONFIG_LPC43_BOOT_SPIFI=y     : Running from QuadFLASH        (0x1400:0000)
+       CONFIG_LPC43_BOOT_FLASHA=y    : Running in internal FLASHA    (0x1a00:0000)
+       CONFIG_LPC43_BOOT_FLASHB=y    : Running in internal FLASHA    (0x1b00:0000)
+       CONFIG_LPC43_BOOT_CS0FLASH=y  : Running in external FLASH CS0 (0x1c00:0000)
+       CONFIG_LPC43_BOOT_CS1FLASH=y  : Running in external FLASH CS1 (0x1d00:0000)
+       CONFIG_LPC43_BOOT_CS2FLASH=y  : Running in external FLASH CS2 (0x1e00:0000)
+       CONFIG_LPC43_BOOT_CS3FLASH=y  : Running in external FLASH CS3 (0x1f00:0000)
+
+    CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
+       have LEDs
+
+    CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
+       stack. If defined, this symbol is the size of the interrupt
+        stack in bytes.  If not defined, the user task stacks will be
+      used during interrupt handling.
+
+    CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
+
+    CONFIG_ARCH_LEDS -  Use LEDs to show state. Unique to board architecture.
+
+    CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that
+       cause a 100 second delay during boot-up.  This 100 second delay
+       serves no purpose other than it allows you to calibratre
+       CONFIG_ARCH_LOOPSPERMSEC.  You simply use a stop watch to measure
+       the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until
+       the delay actually is 100 seconds.
+
+    Individual subsystems can be enabled:
+
+      CONFIG_LPC43_ADC0=y
+      CONFIG_LPC43_ADC1=y
+      CONFIG_LPC43_ATIMER=y
+      CONFIG_LPC43_CAN1=y
+      CONFIG_LPC43_CAN2=y
+      CONFIG_LPC43_DAC=y
+      CONFIG_LPC43_EMC=y
+      CONFIG_LPC43_ETHERNET=y
+      CONFIG_LPC43_EVNTMNTR=y
+      CONFIG_LPC43_GPDMA=y
+      CONFIG_LPC43_I2C0=y
+      CONFIG_LPC43_I2C1=y
+      CONFIG_LPC43_I2S0=y
+      CONFIG_LPC43_I2S1=y
+      CONFIG_LPC43_LCD=y
+      CONFIG_LPC43_MCPWM=y
+      CONFIG_LPC43_QEI=y
+      CONFIG_LPC43_RIT=y
+      CONFIG_LPC43_RTC=y
+      CONFIG_LPC43_SCT=y
+      CONFIG_LPC43_SDMMC=y
+      CONFIG_LPC43_SPI=y
+      CONFIG_LPC43_SPIFI=y
+      CONFIG_LPC43_SSP0=y
+      CONFIG_LPC43_SSP1=y
+      CONFIG_LPC43_TMR0=y
+      CONFIG_LPC43_TMR1=y
+      CONFIG_LPC43_TMR2=y
+      CONFIG_LPC43_TMR3=y
+      CONFIG_LPC43_USART0=y
+      CONFIG_LPC43_UART1=y
+      CONFIG_LPC43_USART2=y
+      CONFIG_LPC43_USART3=y
+      CONFIG_LPC43_USB0=y
+      CONFIG_LPC43_USB1=y
+      CONFIG_LPC43_USB1_ULPI=y
+      CONFIG_LPC43_WWDT=y
+
+  LPC43xx specific U[S]ART device driver settings
+
+    CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the UARTn for the
+       console and ttys0 (default is the USART0).
+    CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
+       This specific the size of the receive buffer
+    CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
+       being sent.  This specific the size of the transmit buffer
+    CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART.  Must be
+    CONFIG_U[S]ARTn_BITS - The number of bits.  Must be either 7 or 8.
+    CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
+    CONFIG_U[S]ARTn_2STOP - Two stop bits
+
+    CONFIG_USARTn_RS485MODE - Support LPC43xx USART0,2,3 RS485 mode
+      ioctls (TIOCSRS485 and TIOCGRS485) to enable and disable
+      RS-485 mode.
+
+  LPC43xx specific CAN device driver settings.  These settings all
+  require CONFIG_CAN:
+
+    CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID.  Default
+      Standard 11-bit IDs.
+    CONFIG_CAN1_BAUD - CAN1 BAUD rate.  Required if CONFIG_LPC43_CAN1 is defined.
+    CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_LPC43_CAN2 is defined.
+    CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
+      (the CCLK frequency is divided by this number to get the CAN clock).
+      Options = {1,2,4,6}. Default: 4.
+    CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
+      (the CCLK frequency is divided by this number to get the CAN clock).
+      Options = {1,2,4,6}. Default: 4.
+    CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
+    CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7
+
+  LPC43xx specific PHY/Ethernet device driver settings.  These setting
+  also require CONFIG_NET and CONFIG_LPC43_ETHERNET.
+
+    CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY
+    CONFIG_PHY_AUTONEG - Enable auto-negotion
+    CONFIG_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed.
+    CONFIG_PHY_FDUPLEX - Select full (vs. half) duplex
+
+    CONFIG_NET_EMACRAM_SIZE - Size of EMAC RAM.  Default: 16Kb
+    CONFIG_NET_NTXDESC - Configured number of Tx descriptors. Default: 18
+    CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18
+    CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented).
+    CONFIG_NET_REGDEBUG - Enabled low level register debug.  Also needs
+      CONFIG_DEBUG_FEATURES.
+    CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets.
+      Also needs CONFIG_DEBUG_FEATURES.
+    CONFIG_NET_HASH - Enable receipt of near-perfect match frames.
+
+  LPC43xx USB Device Configuration
+
+    CONFIG_LPC43_USBDEV_FRAME_INTERRUPT
+      Handle USB Start-Of-Frame events.
+      Enable reading SOF from interrupt handler vs. simply reading on demand.
+      Probably a bad idea... Unless there is some issue with sampling the SOF
+      from hardware asynchronously.
+    CONFIG_LPC43_USBDEV_EPFAST_INTERRUPT
+      Enable high priority interrupts.  I have no idea why you might want to
+      do that
+    CONFIG_LPC43_USBDEV_NDMADESCRIPTORS
+      Number of DMA descriptors to allocate in SRAM.
+    CONFIG_LPC43_USBDEV_DMA
+      Enable lpc17xx-specific DMA support
+    CONFIG_LPC43_USBDEV_NOVBUS
+      Define if the hardware implementation does not support the VBUS signal
+    CONFIG_LPC43_USBDEV_NOLED
+      Define if the hardware  implementation does not support the LED output
+
+  LPC43xx USB Host Configuration
+
+    CONFIG_USBHOST_OHCIRAM_SIZE
+      Total size of OHCI RAM (in AHB SRAM Bank 1)
+    CONFIG_USBHOST_NEDS
+      Number of endpoint descriptors
+    CONFIG_USBHOST_NTDS
+      Number of transfer descriptors
+    CONFIG_USBHOST_TDBUFFERS
+      Number of transfer descriptor buffers
+    CONFIG_USBHOST_TDBUFSIZE
+      Size of one transfer descriptor buffer
+    CONFIG_USBHOST_IOBUFSIZE
+      Size of one end-user I/O buffer.  This can be zero if the
+      application can guarantee that all end-user I/O buffers
+      reside in AHB SRAM.
+
+Configurations
+==============
+
+Each Bambino-200e configuration is maintained in a sub-directory and can be selected
+as follow:
+
+    cd tools
+    ./configure.sh bambino-200e/
+    cd -
+    . ./setenv.sh
+
+Where  is one of the following:
+
+  netnsh:
+  -------
+    Configures the NuttShell (nsh) located at examples/nsh.  This
+    configuration is focused on network testing.
+
+  nsh:
+  ----
+    This configuration is the NuttShell (NSH) example at examples/nsh/.
+
+    NOTES:
+
+    1. This configuration uses the mconf-based configuration tool.  To
+       change this configurations using that tool, you should:
+
+       a. Build and install the kconfig-mconf tool.  See nuttx/README.txt
+          see additional README.txt files in the NuttX tools repository.
+
+       b. Execute 'make menuconfig' in nuttx/ in order to start the
+          reconfiguration process.
+
+    2. By default, this project assumes that you are executing directly from
+       SRAM.
+
+         CONFIG_LPC43_BOOT_SRAM=y           : Executing in SRAM
+         CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=y : Code Red under Windows
+
+    3. To execute from SPIFI, you would need to set:
+
+         CONFIG_LPC43_BOOT_SPIFI=y      : Executing from SPIFI
+         CONFIG_RAM_SIZE=(128*1024)     : SRAM Bank0 size
+         CONFIG_RAM_START=0x10000000    : SRAM Bank0 base address
+         CONFIG_SPIFI_OFFSET=(512*1024) : SPIFI file system offset
+
+       CONFIG_MM_REGIONS should also be increased if you want to other SRAM banks
+       to the memory pool.
+
+    4. This configuration an also be used create a block device on the SPIFI
+       FLASH.  CONFIG_LPC43_SPIFI=y must also be defined to enable SPIFI setup
+       support:
+
+       SPIFI device geometry:
+
+         CONFIG_SPIFI_OFFSET - Offset the beginning of the block driver this many
+           bytes into the device address space.  This offset must be an exact
+           multiple of the erase block size (CONFIG_SPIFI_BLKSIZE). Default 0.
+         CONFIG_SPIFI_BLKSIZE - The size of one device erase block.  If not defined
+           then the driver will try to determine the correct erase block size by
+           examining that data returned from spifi_initialize (which sometimes
+           seems bad).
+
+       Other SPIFI options
+
+         CONFIG_SPIFI_SECTOR512 - If defined, then the driver will report a more
+           FAT friendly 512 byte sector size and will manage the read-modify-write
+           operations on the larger erase block.
+         CONFIG_SPIFI_READONLY - Define to support only read-only operations.
+         CONFIG_SPIFI_LIBRARY - Don't use the LPC43xx ROM routines but, instead,
+           use an external library implementation of the SPIFI interface.
+         CONFIG_SPIFI_VERIFY - Verify all spifi_program() operations by reading
+           from the SPI address space after each write.
+         CONFIG_DEBUG_SPIFI_DUMP - Debug option to dump read/write buffers.  You
+           probably do not want to enable this unless you want to dig through a
+           *lot* of debug output!  Also required CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO,
+           and CONFIG_DEBUG_FS,
+
+    5. In my experience, there were some missing function pointers in the LPC43xx
+       SPIFI ROM routines and the SPIFI configuration could only be built with
+       CONFIG_SPIFI_LIBRARY=y.  The SPIFI library is proprietary and cannot be
+       provided within NuttX open source repository; SPIFI library binaries can
+       be found on the lpcware.com website.  In this build sceneario, you must
+       also provide the patch to the external SPIFI library be defining the make
+       variable EXTRA_LIBS in the top-level Make.defs file.  Good luck!
+
+  usbnsh:
+  -------
+
+    This is another NSH example.  If differs from other 'nsh' configurations
+    in that this configurations uses a USB serial device for console I/O.
+
+    NOTES:
+
+    1. This configuration does have UART1 output enabled and set up as
+       the system logging device:
+
+       CONFIG_SYSLOG_CHAR=y               : Use a character device for system logging
+       CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART1 will be /dev/ttyS0
+
+       However, there is nothing to generate SYLOG output in the default
+       configuration so nothing should appear on UART1 unless you enable
+       some debug output or enable the USB monitor.
+
+       NOTE:  Using the SYSLOG to get debug output has limitations.  Among
+       those are that you cannot get debug output from interrupt handlers.
+       So, in particularly, debug output is not a useful way to debug the
+       USB device controller driver.  Instead, use the USB monitor with
+       USB debug off and USB trace on (see below).
+
+    4. Enabling USB monitor SYSLOG output.  If tracing is enabled, the USB
+       device will save encoded trace output in in-memory buffer; if the
+       USB monitor is enabled, that trace buffer will be periodically
+       emptied and dumped to the system logging device (UART2 in this
+       configuration):
+
+       CONFIG_USBDEV_TRACE=y                   : Enable USB trace feature
+       CONFIG_USBDEV_TRACE_NRECORDS=128        : Buffer 128 records in memory
+       CONFIG_NSH_USBDEV_TRACE=n               : No builtin tracing from NSH
+       CONFIG_NSH_ARCHINIT=y                   : Automatically start the USB monitor
+       CONFIG_USBMONITOR=y              : Enable the USB monitor daemon
+       CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
+       CONFIG_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
+       CONFIG_USBMONITOR_INTERVAL=2     : Dump trace data every 2 seconds
+
+       CONFIG_USBMONITOR_TRACEINIT=y    : Enable TRACE output
+       CONFIG_USBMONITOR_TRACECLASS=y
+       CONFIG_USBMONITOR_TRACETRANSFERS=y
+       CONFIG_USBMONITOR_TRACECONTROLLER=y
+       CONFIG_USBMONITOR_TRACEINTERRUPTS=y
+
diff --git a/configs/bambino-200e/include/board.h b/configs/bambino-200e/include/board.h
new file mode 100644
index 0000000000000000000000000000000000000000..9f33f9aea7270ffd214145dd94cb222be86dd8de
--- /dev/null
+++ b/configs/bambino-200e/include/board.h
@@ -0,0 +1,359 @@
+/****************************************************************************
+ * configs/bambino-200e/include/board.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Alan Carvalho de Assis acassis@gmail.com [nuttx] 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __CONFIG_BAMBINO_200E_INCLUDE_BOARD_H
+#define __CONFIG_BAMBINO_200E_INCLUDE_BOARD_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC43_GPIO_IRQ)
+#  include 
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Clocking ****************************************************************/
+/* NOTE:  The following definitions require lpc43_cgu.h.  It is not included
+ * here because the including C file may not have that file in its include
+ * path.
+ *
+ * The Bambino-200e board has three crystals on board:
+ *
+ *     Y1 - RTC 32.768 MHz oscillator input,
+ *     Y2 - 12.000 MHz LPC43xx crystal oscillator input
+ *     Y3 - 25 MHz input for Ethernet KSZ8031 PHY
+ */
+
+#define BOARD_XTAL_FREQUENCY        (12000000)  /* XTAL oscillator frequency (Y3) */
+#define BOARD_RTCCLK_FREQUENCY      (32768)     /* RTC oscillator frequency (Y1) */
+#define BOARD_INTRCOSC_FREQUENCY    (4000000)   /* Internal RC oscillator frequency */
+
+/* Integer and direct modes are supported:
+ *
+ * In integer mode (Fclkout < 156000000):
+ *    Fclkin  = BOARD_XTAL_FREQUENCY
+ *    Fclkout = Msel * FClkin / Nsel
+ *    Fcco    = 2 * Psel * Fclkout
+ * In direct mode (Fclkout > 156000000):
+ *    Fclkin  = BOARD_XTAL_FREQUENCY
+ *    Fclkout = Msel * FClkin / Nsel
+ *    Fcco    = Fclkout
+ */
+
+#ifdef CONFIG_LPC43_72MHz
+
+/* NOTE:  At 72MHz, the calibrated value of CONFIG_BOARD_LOOPSPERMSEC was
+ * determined to be:
+ *
+ *    CONFIG_BOARD_LOOPSPERMSEC=7191
+ *
+ * executing from SRAM.
+ */
+
+/* Final clocking (Integer mode with no ramp-up)
+ *
+ *    Fclkout = 6 * 12MHz / 1  = 72MHz
+ *    Fcco    = 2 * 2 * 72MHz = 216MHz
+ */
+
+#  define BOARD_PLL_MSEL            (6)         /* Msel = 6 */
+#  define BOARD_PLL_NSEL            (1)         /* Nsel = 1 */
+#  define BOARD_PLL_PSEL            (2)         /* Psel = 2 */
+
+#  define BOARD_FCLKOUT_FREQUENCY   (72000000)  /* 6 * 12,000,000 / 1 */
+#  define BOARD_FCCO_FREQUENCY      (244000000) /* 2 * 2 * Fclkout */
+
+#else
+
+/* NOTE:  At 72MHz, the calibrated value of CONFIG_BOARD_LOOPSPERMSEC was
+ * determined to be:
+ *
+ *    CONFIG_BOARD_LOOPSPERMSEC=18535
+ *
+ * executing from SRAM.
+ */
+
+/* Intermediate ramp-up clocking (Integer mode). If BOARD_PLL_RAMP_MSEL
+ * is not defined, there will be no ramp-up.
+ *
+ *    Fclkout = 9 * 12MHz / 1  = 108MHz
+ *    Fcco    = 2 * 1 * 108MHz = 216MHz
+ */
+
+#  define BOARD_PLL_RAMP_MSEL       (9)         /* Msel = 9 */
+#  define BOARD_PLL_RAMP_NSEL       (1)         /* Nsel = 1 */
+#  define BOARD_PLL_RAMP_PSEL       (1)         /* Psel = 1 */
+
+#  define BOARD_RAMP_FCLKOUT        (108000000) /* 9 * 12,000,000 / 1 */
+#  define BOARD_RAMP_FCCO           (216000000) /* 2 * 1 * Fclkout */
+
+/* Final clocking (Direct mode).
+ *
+ *    Fclkout = 17 * 12MHz / 1 = 204MHz
+ *    Fcco    = Fclockout      = 204MHz
+ */
+
+#  define BOARD_PLL_MSEL            (17)        /* Msel = 17 */
+#  define BOARD_PLL_NSEL            (1)         /* Nsel = 1 */
+
+#  define BOARD_FCLKOUT_FREQUENCY   (204000000) /* 17 * 12,000,000 / 1 */
+#  define BOARD_FCCO_FREQUENCY      (204000000) /* Fclockout */
+
+#endif
+
+/* This is the clock setup we configure for:
+ *
+ *   SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz  -> Select Main oscillator for source
+ *   PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz -> PLL0 multipler=20, pre-divider=1
+ *   CCLCK = 480MHz / 6 = 80MHz               -> CCLK divider = 6
+ */
+
+#define LPC43_CCLK                  BOARD_FCLKOUT_FREQUENCY
+
+/* APB Clocking */
+
+#if defined(CONFIG_LPC43_BUS) || defined(CONFIG_LPC43_MCPWM) || \
+    defined(CONFIG_LPC43_I2C0) || defined(CONFIG_LPC43_I2S0) || \
+    defined(CONFIG_LPC43_I2S1)  || defined(CONFIG_LPC43_CAN1)
+#  define BOARD_ABP1_CLKSRC         BASE_APB_CLKSEL_XTAL
+#  define BOARD_ABP1_FREQUENCY      BOARD_XTAL_FREQUENCY
+#endif
+
+
+#if defined(CONFIG_LPC43_BUS) || defined(CONFIG_LPC43_I2C1) || \
+    defined(CONFIG_LPC43_DAC) || defined(CONFIG_LPC43_ADC0) || \
+    defined(CONFIG_LPC43_ADC1)  || defined(CONFIG_LPC43_CAN0)
+#  define BOARD_ABP3_CLKSRC         BASE_APB_CLKSEL_XTAL
+#  define BOARD_ABP3_FREQUENCY      BOARD_XTAL_FREQUENCY
+#endif
+
+/* SSP Clocking */
+
+#define BOARD_IDIVA_DIVIDER         (2)
+#define BOARD_IDIVA_CLKSRC          IDIVA_CLKSEL_PLL1
+#define BOARD_IDIVA_FREQUENCY       (BOARD_FCLKOUT_FREQUENCY/BOARD_IDIVA_DIVIDER)
+
+#define BOARD_SSP0_CLKSRC           BASE_SSP0_CLKSEL_IDIVA
+#define BOARD_SSP0_BASEFREQ         BOARD_IDIVA_FREQUENCY
+
+#define BOARD_SSP1_CLKSRC           BASE_SSP1_CLKSEL_IDIVA
+#define BOARD_SSP1_BASEFREQ         BOARD_IDIVA_FREQUENCY
+
+/* USB0 ********************************************************************/
+/* Settings needed in lpc43_cpu.c */
+
+#define BOARD_USB0_CLKSRC           PLL0USB_CLKSEL_XTAL
+#define BOARD_USB0_MDIV             0x06167ffa /* Table 149 datsheet, valid for 12Mhz Fclkin */
+#define BOARD_USB0_NP_DIV           0x00302062 /* Table 149 datsheet, valid for 12Mhz Fclkin */
+
+/* SPIFI clocking **********************************************************/
+/* The SPIFI will receive clocking from a divider per the settings provided
+ * in this file.  The NuttX code will configure PLL1 as the input clock
+ * for the selected divider
+ */
+
+#undef  BOARD_SPIFI_PLL1                        /* No division */
+#undef  BOARD_SPIFI_DIVA                        /* Supports division by 1-4 */
+#undef  BOARD_SPIFI_DIVB                        /* Supports division by 1-16 */
+#undef  BOARD_SPIFI_DIVC                        /* Supports division by 1-16 */
+#undef  BOARD_SPIFI_DIVD                        /* Supports division by 1-16 */
+#undef  BOARD_SPIFI_DIVE                        /* Supports division by 1-256 */
+
+#if BOARD_FCLKOUT_FREQUENCY < 20000000
+#  define BOARD_SPIFI_PLL1          1           /* Use PLL1 directly */
+#else
+#  define BOARD_SPIFI_DIVB          1           /* Use IDIVB */
+#endif
+
+
+/* We need to configure the divider so that its output is as close to the
+ * desired SCLK value.  The peak data transfer rate will be about half of
+ * this frequency in bytes per second.
+ */
+
+#if BOARD_FCLKOUT_FREQUENCY < 20000000
+#  define BOARD_SPIFI_FREQUENCY     BOARD_FCLKOUT_FREQUENCY  /* 72Mhz? */
+#else
+#  define BOARD_SPIFI_DIVIDER       (14)        /* 204MHz / 14 = 14.57MHz */
+#  define BOARD_SPIFI_FREQUENCY     (102000000) /* 204MHz / 14 = 14.57MHz */
+#endif
+
+/* UART clocking ***********************************************************/
+/* Configure all U[S]ARTs to use the XTAL input frequency */
+
+#define BOARD_USART0_CLKSRC         BASE_USART0_CLKSEL_XTAL
+#define BOARD_USART0_BASEFREQ       BOARD_XTAL_FREQUENCY
+
+#define BOARD_UART1_CLKSRC          BASE_UART1_CLKSEL_XTAL
+#define BOARD_UART1_BASEFREQ        BOARD_XTAL_FREQUENCY
+
+#define BOARD_USART2_CLKSRC         BASE_USART2_CLKSEL_XTAL
+#define BOARD_USART2_BASEFREQ       BOARD_XTAL_FREQUENCY
+
+#define BOARD_USART3_CLKSRC         BASE_USART3_CLKSEL_XTAL
+#define BOARD_USART3_BASEFREQ       BOARD_XTAL_FREQUENCY
+
+/* LED definitions *********************************************************/
+/* The Bambino 200E has 2 user-controllable LEDs labeled LED1 and LED2 in the
+ * schematic and on bus referred to has GPIO3[7] and GPIO5[5], respectively.
+ *
+ *  LED1   GPIO3[7]
+ *  LED2   GPIO5[5]
+ *
+ * LEDs are pulled high to a low output illuminates the LED.
+ *
+ * LED index values for use with board_userled()
+ */
+
+#define BOARD_LED1          0
+#define BOARD_LED2          1
+#define BOARD_NLEDS         2
+
+/* LED bits for use with board_userled_all() */
+
+#define BOARD_LED1_BIT      (1 << BOARD_LED1)
+#define BOARD_LED2_BIT      (1 << BOARD_LED2)
+
+/* If CONFIG_ARCH_LEDS is defined, the LEDs will be controlled as follows
+ * for NuttX debug functionality (where NC means "No Change"). If
+ * CONFIG_ARCH_LEDS is not defined, then the LEDs are completely under
+ * control of the application.  The following interfaces are then available
+ * for application control of the LEDs:
+ *
+ *  void board_userled_initialize(void);
+ *  void board_userled(int led, bool ledon);
+ *  void board_userled_all(uint8_t ledset);
+ */
+                                      /*     ON            OFF     */
+                                      /* LED1   LED2   LED1   LED2 */
+#define LED_STARTED         0  /* OFF    OFF     -      -   */
+#define LED_HEAPALLOCATE    1  /* ON     OFF     -      -   */
+#define LED_IRQSENABLED     1  /* ON     OFF     -      -   */
+#define LED_STACKCREATED    1  /* ON     OFF     -      -   */
+#define LED_INIRQ           2  /* NC     ON      NC     OFF */
+#define LED_SIGNAL          2  /* NC     ON      NC     OFF */
+#define LED_ASSERTION       2  /* NC     ON      NC     OFF */
+#define LED_PANIC           2  /* NC     ON      NC     OFF */
+
+/* UART Pins ****************************************************************/
+/* The Bambino 200E does not have RS-232 drivers or serial connectors on
+ * board. UART1 and USART2 are availables on Socket 5 and 10, recpectively:
+ *
+ *   ------  ----------  -----------------------
+ *   SIGNAL  Socket/Pin    LPC4330FBD144 PIN
+ *   ------  ----------  -----------------------
+ *   U1_TXD  s:5  / p:4  63   P5_6  U1_TXD=Alt 1
+ *   U1_RXD  s:5  / p:5  61   P1_14 U1_RXD=Alt 1
+ *   U2_TXD  s:10 / p:4  104  P2_10 U2_TXD=Alt 1
+ *   U2_RXD  s:10 / p:5  105  P2_11 U2_RXD=Alt 1
+ *   ------  ----------  -----------------------
+ *
+ * The following definitions must be provided so that the LPC43 serial
+ * driver can set up the U[S]ART for the serial console properly (see the
+ * file arch/arc/src/lpc43xx/lpc4310203050_pinconf.h for more info).
+ */
+
+#define PINCONF_U0_TXD      PINCONF_U0_TXD_3
+#define PINCONF_U0_RXD      PINCONF_U0_RXD_3
+#define PINCONF_U0_DIR      PINCONF_U0_DIR_3
+
+#define PINCONF_U1_TXD      PINCONF_U1_TXD_5
+#define PINCONF_U1_RXD      PINCONF_U1_RXD_1
+
+#define PINCONF_U2_TXD      PINCONF_U2_TXD_2
+#define PINCONF_U2_RXD      PINCONF_U2_RXD_2
+#define PINCONF_U2_DIR      PINCONF_U2_DIR_2
+
+#define PINCONF_U3_TXD      PINCONF_U3_TXD_2
+#define PINCONF_U3_RXD      PINCONF_U3_RXD_2
+#define PINCONF_U3_DIR      PINCONF_U3_DIR_2
+
+/* Ethernet */
+
+#define PINCONF_ENET_RX_DV  PINCONF_ENET_RX_DV_2
+#define PINCONF_ENET_RESET  PINCONF_GPIO0p4
+#define GPIO_ENET_RESET     (GPIO_MODE_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN4)
+#define PINCONF_ENET_MDC    PINCONF_ENET_MDC_3
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lpc43_boardinitialize
+ *
+ * Description:
+ *   All LPC43xx architectures must provide the following entry point.  This entry point
+ *   is called early in the intitialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ****************************************************************************/
+
+void lpc43_boardinitialize(void);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif  /* __CONFIG_BAMBINO_200E_INCLUDE_BOARD_H */
diff --git a/configs/bambino-200e/netnsh/Make.defs b/configs/bambino-200e/netnsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..a2b9de35447cb20aa4deea9ad4a45e9cb5054cc2
--- /dev/null
+++ b/configs/bambino-200e/netnsh/Make.defs
@@ -0,0 +1,142 @@
+############################################################################
+# configs/bambino-200e/nsh/Make.defs
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#           Alan Carvalho de Assis acassis@gmail.com [nuttx] 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+# Setup for the kind of memory that we are executing from
+
+ifeq ($(CONFIG_LPC43_BOOT_SRAM),y)
+  LDSCRIPT = ramconfig.ld
+endif
+ifeq ($(CONFIG_LPC43_BOOT_SPIFI),y)
+  LDSCRIPT = spificonfig.ld
+endif
+ifeq ($(CONFIG_LPC43_BOOT_FLASHA),y)
+  LDSCRIPT = flashaconfig.ld
+endif
+ifeq ($(CONFIG_LPC43_BOOT_FLASHB),y)
+  LDSCRIPT = flashaconfig.ld
+endif
+ifeq ($(CONFIG_LPC43_BOOT_CS0FLASH),y)
+  LDSCRIPT = cs0flash.ld
+endif
+
+# Setup for Windows vs Linux/Cygwin/OSX environments
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" \
+    -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" \
+    -isystem "${shell cygpath -w $(TOPDIR)/include/libcxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include \
+    -isystem $(TOPDIR)/include/cxx -isystem $(TOPDIR)/include/libcxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ifeq ($(CONFIG_LIBCXX_EXCEPTION),y)
+  ARCHCPUFLAGSXX = -fno-builtin
+else
+  ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new
+endif
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS  = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES)
+CXXFLAGS += $(ARCHDEFINES) $(EXTRADEFINES) -pipe -std=c++11 -DCLOCK_MONOTONIC -D__NuttX__
+CXXFLAGS += -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+CXXFLAGS += -pedantic -D_DEBUG -D_LIBCPP_BUILD_STATIC -D_LIBCPP_NO_EXCEPTIONS
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT = .elf
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/bambino-200e/netnsh/defconfig b/configs/bambino-200e/netnsh/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..231bc772b6eb605c0dd93d02c337b34bd7f8dab4
--- /dev/null
+++ b/configs/bambino-200e/netnsh/defconfig
@@ -0,0 +1,1208 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+# CONFIG_INTELHEX_BINARY is not set
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+CONFIG_ARCH_STDARG_H=y
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+CONFIG_DEBUG_NOOPT=y
+# CONFIG_DEBUG_CUSTOMOPT is not set
+# CONFIG_DEBUG_FULLOPT is not set
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+CONFIG_ARCH_CHIP_LPC43XX=y
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+# CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="lpc43xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+CONFIG_ARMV7M_CMNVECTOR=y
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+
+#
+# LPC43xx Configuration Options
+#
+# CONFIG_ARCH_CHIP_LPC4310FBD144 is not set
+# CONFIG_ARCH_CHIP_LPC4310FET100 is not set
+# CONFIG_ARCH_CHIP_LPC4320FBD144 is not set
+# CONFIG_ARCH_CHIP_LPC4320FET100 is not set
+CONFIG_ARCH_CHIP_LPC4330FBD144=y
+# CONFIG_ARCH_CHIP_LPC4330FET100 is not set
+# CONFIG_ARCH_CHIP_LPC4330FET180 is not set
+# CONFIG_ARCH_CHIP_LPC4330FET256 is not set
+# CONFIG_ARCH_CHIP_LPC4337JBD144 is not set
+# CONFIG_ARCH_CHIP_LPC4337JET100 is not set
+# CONFIG_ARCH_CHIP_LPC4350FBD208 is not set
+# CONFIG_ARCH_CHIP_LPC4350FET180 is not set
+# CONFIG_ARCH_CHIP_LPC4350FET256 is not set
+# CONFIG_ARCH_CHIP_LPC4353FBD208 is not set
+# CONFIG_ARCH_CHIP_LPC4353FET180 is not set
+# CONFIG_ARCH_CHIP_LPC4353FET256 is not set
+# CONFIG_ARCH_CHIP_LPC4357FET180 is not set
+# CONFIG_ARCH_CHIP_LPC4357FBD208 is not set
+# CONFIG_ARCH_CHIP_LPC4357FET256 is not set
+# CONFIG_ARCH_CHIP_LPC4370FET100 is not set
+CONFIG_ARCH_FAMILY_LPC4330=y
+# CONFIG_LPC43_BOOT_SRAM is not set
+CONFIG_LPC43_BOOT_SPIFI=y
+# CONFIG_LPC43_BOOT_FLASHA is not set
+# CONFIG_LPC43_BOOT_FLASHB is not set
+# CONFIG_LPC43_BOOT_CS0FLASH is not set
+# CONFIG_LPC43_BOOT_CS1FLASH is not set
+# CONFIG_LPC43_BOOT_CS2FLASH is not set
+# CONFIG_LPC43_BOOT_CS3FLASH is not set
+
+#
+# LPC43xx Peripheral Support
+#
+# CONFIG_LPC43_ADC0 is not set
+# CONFIG_LPC43_ADC1 is not set
+# CONFIG_LPC43_ATIMER is not set
+# CONFIG_LPC43_CAN1 is not set
+# CONFIG_LPC43_CAN2 is not set
+# CONFIG_LPC43_DAC is not set
+# CONFIG_LPC43_EMC is not set
+CONFIG_LPC43_ETHERNET=y
+# CONFIG_LPC43_EVNTMNTR is not set
+# CONFIG_LPC43_GPDMA is not set
+# CONFIG_LPC43_I2C0 is not set
+# CONFIG_LPC43_I2C1 is not set
+# CONFIG_LPC43_I2S0 is not set
+# CONFIG_LPC43_I2S1 is not set
+# CONFIG_LPC43_LCD is not set
+# CONFIG_LPC43_MCPWM is not set
+# CONFIG_LPC43_QEI is not set
+# CONFIG_LPC43_RIT is not set
+# CONFIG_LPC43_RTC is not set
+# CONFIG_LPC43_SCT is not set
+# CONFIG_LPC43_SDMMC is not set
+# CONFIG_LPC43_SPI is not set
+# CONFIG_LPC43_SPIFI is not set
+# CONFIG_LPC43_SSP0 is not set
+# CONFIG_LPC43_SSP1 is not set
+CONFIG_LPC43_TMR0=y
+# CONFIG_LPC43_TMR1 is not set
+# CONFIG_LPC43_TMR2 is not set
+# CONFIG_LPC43_TMR3 is not set
+CONFIG_LPC43_TIMER=y
+# CONFIG_LPC43_USART0 is not set
+CONFIG_LPC43_UART1=y
+# CONFIG_LPC43_USART2 is not set
+# CONFIG_LPC43_USART3 is not set
+# CONFIG_LPC43_USBOTG is not set
+CONFIG_LPC43_USB0=y
+# CONFIG_LPC43_USB1 is not set
+# CONFIG_LPC43_WWDT is not set
+# CONFIG_LPC43_GPIO_IRQ is not set
+
+#
+# Internal Memory Configuration
+#
+CONFIG_ARCH_HAVE_AHB_SRAM_BANK1=y
+# CONFIG_LPC43_USE_LOCSRAM_BANK1 is not set
+# CONFIG_LPC43_USE_AHBSRAM_BANK0 is not set
+# CONFIG_LPC43_USE_AHBSRAM_BANK1 is not set
+# CONFIG_LPC43_HEAP_AHBSRAM_BANK2 is not set
+
+#
+# External Memory Configuration
+#
+
+#
+# Ethernet MAC configuration
+#
+CONFIG_LPC43_PHYADDR=0
+# CONFIG_LPC43_PHYINIT is not set
+# CONFIG_LPC43_MII is not set
+CONFIG_LPC43_AUTONEG=y
+CONFIG_LPC43_PHYSR=30
+CONFIG_LPC43_PHYSR_ALTCONFIG=y
+CONFIG_LPC43_PHYSR_ALTMODE=0x7
+CONFIG_LPC43_PHYSR_10HD=0x1
+CONFIG_LPC43_PHYSR_100HD=0x2
+CONFIG_LPC43_PHYSR_10FD=0x5
+CONFIG_LPC43_PHYSR_100FD=0x6
+CONFIG_LPC43_RMII=y
+CONFIG_LPC43_ETHERNET_HPWORK=y
+
+#
+# RS-485 Configuration
+#
+# CONFIG_UART1_RS485MODE is not set
+# CONFIG_UART1_RS485_DTRDIR is not set
+
+#
+# USB device controller driver (DCD) options
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+CONFIG_ARCH_HAVE_EXTCLK=y
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=18535
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x10000000
+CONFIG_RAM_SIZE=131072
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_BAMBINO_200E=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="bambino-200e"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+# CONFIG_ARCH_BUTTONS is not set
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEMTICK_EXTCLK is not set
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2012
+CONFIG_START_MONTH=7
+CONFIG_START_DAY=11
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_SPINLOCK is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+# CONFIG_ARCH_HAVE_I2CRESET is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+CONFIG_NETDEVICES=y
+
+#
+# General Ethernet MAC Driver Options
+#
+# CONFIG_NETDEV_LOOPBACK is not set
+CONFIG_NETDEV_TELNET=y
+CONFIG_TELNET_RXBUFFER_SIZE=256
+CONFIG_TELNET_TXBUFFER_SIZE=256
+# CONFIG_NETDEV_MULTINIC is not set
+# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set
+# CONFIG_NETDEV_LATEINIT is not set
+
+#
+# External Ethernet MAC Device Support
+#
+# CONFIG_NET_DM90x0 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ENCX24J600 is not set
+# CONFIG_NET_SLIP is not set
+# CONFIG_NET_FTMAC100 is not set
+
+#
+# External Ethernet PHY Device Support
+#
+# CONFIG_ARCH_PHY_INTERRUPT is not set
+CONFIG_ETH0_PHY_NONE=y
+# CONFIG_ETH0_PHY_AM79C874 is not set
+# CONFIG_ETH0_PHY_KS8721 is not set
+# CONFIG_ETH0_PHY_KSZ8041 is not set
+# CONFIG_ETH0_PHY_KSZ8051 is not set
+# CONFIG_ETH0_PHY_KSZ8061 is not set
+# CONFIG_ETH0_PHY_KSZ8081 is not set
+# CONFIG_ETH0_PHY_KSZ90x1 is not set
+# CONFIG_ETH0_PHY_DP83848C is not set
+# CONFIG_ETH0_PHY_LAN8720 is not set
+# CONFIG_ETH0_PHY_LAN8740 is not set
+# CONFIG_ETH0_PHY_LAN8740A is not set
+# CONFIG_ETH0_PHY_LAN8742A is not set
+# CONFIG_ETH0_PHY_DM9161 is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_UART1_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# UART1 Configuration
+#
+CONFIG_UART1_RXBUFSIZE=256
+CONFIG_UART1_TXBUFSIZE=256
+CONFIG_UART1_BAUD=115200
+CONFIG_UART1_BITS=8
+CONFIG_UART1_PARITY=0
+CONFIG_UART1_2STOP=0
+# CONFIG_UART1_IFLOWCONTROL is not set
+# CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+CONFIG_ARCH_HAVE_NET=y
+CONFIG_ARCH_HAVE_PHY=y
+CONFIG_NET=y
+# CONFIG_NET_PROMISCUOUS is not set
+
+#
+# Driver buffer configuration
+#
+CONFIG_NET_ETH_MTU=650
+CONFIG_NET_ETH_TCP_RECVWNDO=624
+CONFIG_NET_GUARDSIZE=2
+
+#
+# Data link support
+#
+# CONFIG_NET_MULTILINK is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
+# CONFIG_NET_TUN is not set
+
+#
+# Network Device Operations
+#
+# CONFIG_NETDEV_PHY_IOCTL is not set
+
+#
+# Internet Protocol Selection
+#
+CONFIG_NET_IPv4=y
+# CONFIG_NET_IPv6 is not set
+
+#
+# Socket Support
+#
+CONFIG_NSOCKET_DESCRIPTORS=10
+CONFIG_NET_NACTIVESOCKETS=16
+CONFIG_NET_SOCKOPTS=y
+# CONFIG_NET_SOLINGER is not set
+
+#
+# Raw Socket Support
+#
+# CONFIG_NET_PKT is not set
+
+#
+# Unix Domain Socket Support
+#
+# CONFIG_NET_LOCAL is not set
+
+#
+# TCP/IP Networking
+#
+CONFIG_NET_TCP=y
+# CONFIG_NET_TCPURGDATA is not set
+CONFIG_NET_TCP_CONNS=40
+CONFIG_NET_MAX_LISTENPORTS=40
+CONFIG_NET_TCP_READAHEAD=y
+# CONFIG_NET_TCP_WRITE_BUFFERS is not set
+CONFIG_NET_TCP_RECVDELAY=0
+CONFIG_NET_TCPBACKLOG=y
+# CONFIG_NET_TCP_SPLIT is not set
+# CONFIG_NET_SENDFILE is not set
+
+#
+# UDP Networking
+#
+CONFIG_NET_UDP=y
+CONFIG_NET_UDP_CHECKSUMS=y
+CONFIG_NET_UDP_CONNS=8
+CONFIG_NET_BROADCAST=y
+# CONFIG_NET_RXAVAIL is not set
+CONFIG_NET_UDP_READAHEAD=y
+
+#
+# ICMP Networking Support
+#
+CONFIG_NET_ICMP=y
+CONFIG_NET_ICMP_PING=y
+
+#
+# IGMPv2 Client Support
+#
+# CONFIG_NET_IGMP is not set
+
+#
+# ARP Configuration
+#
+CONFIG_NET_ARP=y
+CONFIG_NET_ARPTAB_SIZE=16
+CONFIG_NET_ARP_MAXAGE=120
+CONFIG_NET_ARP_IPIN=y
+# CONFIG_NET_ARP_SEND is not set
+
+#
+# Network I/O Buffer Support
+#
+CONFIG_NET_IOB=y
+CONFIG_IOB_NBUFFERS=24
+CONFIG_IOB_BUFSIZE=196
+CONFIG_IOB_NCHAINS=8
+# CONFIG_NET_ARCH_INCR32 is not set
+# CONFIG_NET_ARCH_CHKSUM is not set
+CONFIG_NET_STATISTICS=y
+
+#
+# Routing Table Configuration
+#
+# CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME="Bambino-200E"
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+CONFIG_FS_READABLE=y
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_NFS is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_NET is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=2
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
+CONFIG_LIBM=y
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
+CONFIG_LIBC_NETDB=y
+# CONFIG_NETDB_HOSTFILE is not set
+CONFIG_NETDB_DNSCLIENT=y
+CONFIG_NETDB_DNSCLIENT_ENTRIES=4
+CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
+CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
+CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_RESOLVCONF is not set
+CONFIG_NETDB_DNSSERVER_NOADDR=y
+# CONFIG_NETDB_DNSSERVER_IPv4 is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NETTEST is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_UDPBLASTER is not set
+# CONFIG_EXAMPLES_UDP is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_XMLRPC is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+CONFIG_NETUTILS_DHCPC=y
+# CONFIG_NETUTILS_DHCPD is not set
+CONFIG_NETUTILS_DISCOVER=y
+CONFIG_DISCOVER_STACK_SIZE=1024
+CONFIG_DISCOVER_PRIORITY=50
+CONFIG_DISCOVER_PORT=96
+CONFIG_DISCOVER_INTERFACE="eth0"
+CONFIG_DISCOVER_DEVICE_CLASS=0xff
+CONFIG_DISCOVER_DESCR="BAMBINO"
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_FTPD is not set
+# CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
+# CONFIG_NETUTILS_SMTP is not set
+CONFIG_NETUTILS_TELNETD=y
+CONFIG_NETUTILS_TFTPC=y
+CONFIG_NETUTILS_WEBCLIENT=y
+CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
+CONFIG_WEBCLIENT_TIMEOUT=10
+# CONFIG_NETUTILS_WEBSERVER is not set
+# CONFIG_NETUTILS_XMLRPC is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+# CONFIG_NSH_DISABLE_DATE is not set
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_IFUPDOWN is not set
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+# CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PING is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+# CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+CONFIG_NSH_ARCHINIT=y
+
+#
+# Networking Configuration
+#
+CONFIG_NSH_NETINIT=y
+CONFIG_NSH_NETINIT_THREAD=y
+CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568
+CONFIG_NSH_NETINIT_THREAD_PRIORITY=80
+
+#
+# IP Address Configuration
+#
+CONFIG_NSH_DHCPC=y
+
+#
+# IPv4 Addresses
+#
+CONFIG_NSH_DRIPADDR=0xc0a80001
+CONFIG_NSH_NETMASK=0xffffff00
+# CONFIG_NSH_DNS is not set
+CONFIG_NSH_NOMAC=y
+CONFIG_NSH_SWMAC=y
+CONFIG_NSH_MACADDR=0x1a2b3c4d5e6f
+CONFIG_NSH_MAX_ROUNDTRIP=20
+
+#
+# Telnet Configuration
+#
+CONFIG_NSH_TELNET=y
+CONFIG_NSH_TELNETD_PORT=23
+CONFIG_NSH_TELNETD_DAEMONPRIO=100
+CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
+CONFIG_NSH_TELNETD_CLIENTPRIO=100
+CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
+CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+# CONFIG_NSH_TELNET_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_NETDB is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/bambino-200e/netnsh/setenv.sh b/configs/bambino-200e/netnsh/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..f2115b5991d8d3f63520234afd11beee77e7a603
--- /dev/null
+++ b/configs/bambino-200e/netnsh/setenv.sh
@@ -0,0 +1,96 @@
+#!/bin/bash
+# configs/bambino-200e/nsh/setenv.sh
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#           Alan Carvalho de Assis acassis@gmail.com [nuttx] 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the Code Red
+# toolchain under windows.  You will have to edit this if you install the
+# Code Red toolchain in any other location or if you install a different
+# version
+#export TOOLCHAIN_BIN="/cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/Tools/bin"
+#export SCRIPT_BIN="/cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin"
+#export SCRIPT_BIN="/cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export SCRIPT_BIN=
+
+# These are the Cygwin paths to the locations where I installed the Atollic
+# toolchain under windows.  You will also have to edit this if you install
+# the Atollic toolchain in any other location.  /usr/bin is added before
+# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
+# at those locations as well.
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
+#export SCRIPT_BIN=
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+#export SCRIPT_BIN=
+
+# And add the selected toolchain path[s] to the PATH variable
+
+export PATH="/sbin:/usr/sbin:${PATH_ORIG}"
+
+if [ ! -z ${SCRIPT_BIN} ]; then
+  export PATH="${SCRIPT_BIN}:${PATH}"
+fi
+
+export PATH="${TOOLCHAIN_BIN}:${PATH}"
+echo "PATH : ${PATH}"
+
+# Set an alias that can be used to put the LPC43xx in boot mode
+
+alias lpc43xx='${SCRIPT_BIN}/Scripts/bootLPCXpresso.cmd winusb'
diff --git a/configs/bambino-200e/nsh/Make.defs b/configs/bambino-200e/nsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..844a7015afe551c5a499067626400b59b6ab4f78
--- /dev/null
+++ b/configs/bambino-200e/nsh/Make.defs
@@ -0,0 +1,132 @@
+############################################################################
+# configs/bambino-200e/nsh/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#           Alan Carvalho de Assis acassis@gmail.com [nuttx] 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+# Setup for the kind of memory that we are executing from
+
+ifeq ($(CONFIG_LPC43_BOOT_SRAM),y)
+  LDSCRIPT = ramconfig.ld
+endif
+ifeq ($(CONFIG_LPC43_BOOT_SPIFI),y)
+  LDSCRIPT = spificonfig.ld
+endif
+ifeq ($(CONFIG_LPC43_BOOT_FLASHA),y)
+  LDSCRIPT = flashaconfig.ld
+endif
+ifeq ($(CONFIG_LPC43_BOOT_FLASHB),y)
+  LDSCRIPT = flashaconfig.ld
+endif
+ifeq ($(CONFIG_LPC43_BOOT_CS0FLASH),y)
+  LDSCRIPT = cs0flash.ld
+endif
+
+# Setup for Windows vs Linux/Cygwin/OSX environments
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT = .elf
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/bambino-200e/nsh/defconfig b/configs/bambino-200e/nsh/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..3055cb965f6c3158b55791cbcf86ee7db1a55cef
--- /dev/null
+++ b/configs/bambino-200e/nsh/defconfig
@@ -0,0 +1,992 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+# CONFIG_INTELHEX_BINARY is not set
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+CONFIG_ARCH_STDARG_H=y
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+CONFIG_DEBUG_NOOPT=y
+# CONFIG_DEBUG_CUSTOMOPT is not set
+# CONFIG_DEBUG_FULLOPT is not set
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+CONFIG_ARCH_CHIP_LPC43XX=y
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+# CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="lpc43xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+CONFIG_ARMV7M_CMNVECTOR=y
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+
+#
+# LPC43xx Configuration Options
+#
+# CONFIG_ARCH_CHIP_LPC4310FBD144 is not set
+# CONFIG_ARCH_CHIP_LPC4310FET100 is not set
+# CONFIG_ARCH_CHIP_LPC4320FBD144 is not set
+# CONFIG_ARCH_CHIP_LPC4320FET100 is not set
+CONFIG_ARCH_CHIP_LPC4330FBD144=y
+# CONFIG_ARCH_CHIP_LPC4330FET100 is not set
+# CONFIG_ARCH_CHIP_LPC4330FET180 is not set
+# CONFIG_ARCH_CHIP_LPC4330FET256 is not set
+# CONFIG_ARCH_CHIP_LPC4337JBD144 is not set
+# CONFIG_ARCH_CHIP_LPC4337JET100 is not set
+# CONFIG_ARCH_CHIP_LPC4350FBD208 is not set
+# CONFIG_ARCH_CHIP_LPC4350FET180 is not set
+# CONFIG_ARCH_CHIP_LPC4350FET256 is not set
+# CONFIG_ARCH_CHIP_LPC4353FBD208 is not set
+# CONFIG_ARCH_CHIP_LPC4353FET180 is not set
+# CONFIG_ARCH_CHIP_LPC4353FET256 is not set
+# CONFIG_ARCH_CHIP_LPC4357FET180 is not set
+# CONFIG_ARCH_CHIP_LPC4357FBD208 is not set
+# CONFIG_ARCH_CHIP_LPC4357FET256 is not set
+# CONFIG_ARCH_CHIP_LPC4370FET100 is not set
+CONFIG_ARCH_FAMILY_LPC4330=y
+# CONFIG_LPC43_BOOT_SRAM is not set
+CONFIG_LPC43_BOOT_SPIFI=y
+# CONFIG_LPC43_BOOT_FLASHA is not set
+# CONFIG_LPC43_BOOT_FLASHB is not set
+# CONFIG_LPC43_BOOT_CS0FLASH is not set
+# CONFIG_LPC43_BOOT_CS1FLASH is not set
+# CONFIG_LPC43_BOOT_CS2FLASH is not set
+# CONFIG_LPC43_BOOT_CS3FLASH is not set
+
+#
+# LPC43xx Peripheral Support
+#
+# CONFIG_LPC43_ADC0 is not set
+# CONFIG_LPC43_ADC1 is not set
+# CONFIG_LPC43_ATIMER is not set
+# CONFIG_LPC43_CAN1 is not set
+# CONFIG_LPC43_CAN2 is not set
+# CONFIG_LPC43_DAC is not set
+# CONFIG_LPC43_EMC is not set
+# CONFIG_LPC43_ETHERNET is not set
+# CONFIG_LPC43_EVNTMNTR is not set
+# CONFIG_LPC43_GPDMA is not set
+# CONFIG_LPC43_I2C0 is not set
+# CONFIG_LPC43_I2C1 is not set
+# CONFIG_LPC43_I2S0 is not set
+# CONFIG_LPC43_I2S1 is not set
+# CONFIG_LPC43_LCD is not set
+# CONFIG_LPC43_MCPWM is not set
+# CONFIG_LPC43_QEI is not set
+# CONFIG_LPC43_RIT is not set
+# CONFIG_LPC43_RTC is not set
+# CONFIG_LPC43_SCT is not set
+# CONFIG_LPC43_SDMMC is not set
+# CONFIG_LPC43_SPI is not set
+# CONFIG_LPC43_SPIFI is not set
+# CONFIG_LPC43_SSP0 is not set
+# CONFIG_LPC43_SSP1 is not set
+CONFIG_LPC43_TMR0=y
+# CONFIG_LPC43_TMR1 is not set
+# CONFIG_LPC43_TMR2 is not set
+# CONFIG_LPC43_TMR3 is not set
+CONFIG_LPC43_TIMER=y
+# CONFIG_LPC43_USART0 is not set
+CONFIG_LPC43_UART1=y
+# CONFIG_LPC43_USART2 is not set
+# CONFIG_LPC43_USART3 is not set
+# CONFIG_LPC43_USBOTG is not set
+CONFIG_LPC43_USB0=y
+# CONFIG_LPC43_USB1 is not set
+# CONFIG_LPC43_WWDT is not set
+# CONFIG_LPC43_GPIO_IRQ is not set
+
+#
+# Internal Memory Configuration
+#
+CONFIG_ARCH_HAVE_AHB_SRAM_BANK1=y
+# CONFIG_LPC43_USE_LOCSRAM_BANK1 is not set
+# CONFIG_LPC43_USE_AHBSRAM_BANK0 is not set
+# CONFIG_LPC43_USE_AHBSRAM_BANK1 is not set
+# CONFIG_LPC43_HEAP_AHBSRAM_BANK2 is not set
+
+#
+# External Memory Configuration
+#
+
+#
+# RS-485 Configuration
+#
+# CONFIG_USART2_RS485MODE is not set
+
+#
+# USB device controller driver (DCD) options
+#
+# CONFIG_LPC43_USB0DEV_NOVBUS is not set
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+CONFIG_ARCH_HAVE_EXTCLK=y
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=18535
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x10000000
+CONFIG_RAM_SIZE=131072
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_BAMBINO_200E=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="bambino-200e"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+# CONFIG_ARCH_BUTTONS is not set
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+CONFIG_BOARDCTL_USBDEVCTRL=y
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEMTICK_EXTCLK is not set
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2012
+CONFIG_START_MONTH=7
+CONFIG_START_DAY=11
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+# CONFIG_ARCH_HAVE_I2CRESET is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+CONFIG_TIMER=y
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_UART1_SERIAL_CONSOLE=y
+# CONFIG_USART2_SERIAL_CONSOLE is not set
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# UART1 Configuration
+#
+CONFIG_UART1_RXBUFSIZE=256
+CONFIG_UART1_TXBUFSIZE=256
+CONFIG_UART1_BAUD=115200
+CONFIG_UART1_BITS=8
+CONFIG_UART1_PARITY=0
+CONFIG_UART1_2STOP=0
+# CONFIG_UART1_IFLOWCONTROL is not set
+# CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+CONFIG_USBDEV=y
+
+#
+# USB Device Controller Driver Options
+#
+# CONFIG_USBDEV_ISOCHRONOUS is not set
+# CONFIG_USBDEV_DUALSPEED is not set
+CONFIG_USBDEV_SELFPOWERED=y
+# CONFIG_USBDEV_BUSPOWERED is not set
+CONFIG_USBDEV_MAXPOWER=100
+# CONFIG_USBDEV_DMA is not set
+# CONFIG_ARCH_USBDEV_STALLQUEUE is not set
+# CONFIG_USBDEV_TRACE is not set
+
+#
+# USB Device Class Driver Options
+#
+# CONFIG_USBDEV_COMPOSITE is not set
+# CONFIG_PL2303 is not set
+CONFIG_CDCACM=y
+# CONFIG_CDCACM_CONSOLE is not set
+CONFIG_CDCACM_EP0MAXPACKET=64
+CONFIG_CDCACM_EPINTIN=1
+CONFIG_CDCACM_EPINTIN_FSSIZE=64
+CONFIG_CDCACM_EPINTIN_HSSIZE=64
+CONFIG_CDCACM_EPBULKOUT=3
+CONFIG_CDCACM_EPBULKOUT_FSSIZE=64
+CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
+CONFIG_CDCACM_EPBULKIN=2
+CONFIG_CDCACM_EPBULKIN_FSSIZE=64
+CONFIG_CDCACM_EPBULKIN_HSSIZE=512
+CONFIG_CDCACM_NRDREQS=4
+CONFIG_CDCACM_NWRREQS=4
+CONFIG_CDCACM_BULKIN_REQLEN=96
+CONFIG_CDCACM_RXBUFSIZE=257
+CONFIG_CDCACM_TXBUFSIZE=193
+CONFIG_CDCACM_VENDORID=0x0525
+CONFIG_CDCACM_PRODUCTID=0xa4a7
+CONFIG_CDCACM_VENDORSTR="NuttX"
+CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
+# CONFIG_USBMSC is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+CONFIG_FS_READABLE=y
+CONFIG_FS_WRITABLE=y
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+CONFIG_FS_FAT=y
+CONFIG_FAT_LCNAMES=y
+CONFIG_FAT_LFN=y
+CONFIG_FAT_MAXFNAME=32
+# CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
+# CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=2
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+CONFIG_SYMTAB_ORDEREDBYNAME=y
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+CONFIG_EXAMPLES_TIMER=y
+CONFIG_EXAMPLE_TIMER_DEVNAME="/dev/timer0"
+CONFIG_EXAMPLE_TIMER_INTERVAL=1000000
+CONFIG_EXAMPLE_TIMER_DELAY=100000
+CONFIG_EXAMPLE_TIMER_NSAMPLES=20
+CONFIG_EXAMPLES_TIMER_APPNAME="timer"
+CONFIG_EXAMPLES_TIMER_STACKSIZE=2048
+CONFIG_EXAMPLES_TIMER_PRIORITY=100
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFATFS is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CMDOPT_DF_H=y
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_USBCONSOLE is not set
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+CONFIG_SYSTEM_CDCACM=y
+CONFIG_SYSTEM_CDCACM_DEVMINOR=1
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/bambino-200e/nsh/setenv.sh b/configs/bambino-200e/nsh/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..bb4edf3cc9ce5a106f10e3520ece8abda28c6cea
--- /dev/null
+++ b/configs/bambino-200e/nsh/setenv.sh
@@ -0,0 +1,96 @@
+#!/bin/bash
+# configs/bambino-200e/nsh/setenv.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#           Alan Carvalho de Assis acassis@gmail.com [nuttx] 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the Code Red
+# toolchain under windows.  You will have to edit this if you install the
+# Code Red toolchain in any other location or if you install a different
+# version
+#export TOOLCHAIN_BIN="/cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/Tools/bin"
+#export SCRIPT_BIN="/cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin"
+#export SCRIPT_BIN="/cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export SCRIPT_BIN=
+
+# These are the Cygwin paths to the locations where I installed the Atollic
+# toolchain under windows.  You will also have to edit this if you install
+# the Atollic toolchain in any other location.  /usr/bin is added before
+# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
+# at those locations as well.
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
+#export SCRIPT_BIN=
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+#export SCRIPT_BIN=
+
+# And add the selected toolchain path[s] to the PATH variable
+
+export PATH="/sbin:/usr/sbin:${PATH_ORIG}"
+
+if [ ! -z ${SCRIPT_BIN} ]; then
+  export PATH="${SCRIPT_BIN}:${PATH}"
+fi
+
+export PATH="${TOOLCHAIN_BIN}:${PATH}"
+echo "PATH : ${PATH}"
+
+# Set an alias that can be used to put the LPC43xx in boot mode
+
+alias lpc43xx='${SCRIPT_BIN}/Scripts/bootLPCXpresso.cmd winusb'
diff --git a/configs/bambino-200e/scripts/flash.sh b/configs/bambino-200e/scripts/flash.sh
new file mode 100644
index 0000000000000000000000000000000000000000..f738b460bc97c64d4011be4df0d8aed761250e42
--- /dev/null
+++ b/configs/bambino-200e/scripts/flash.sh
@@ -0,0 +1,156 @@
+#!/bin/bash
+####################################################################################
+# flash.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#           Alan Carvalho de Assis acassis@gmail.com [nuttx] 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+####################################################################################
+set -x
+
+USAGE="$0 "
+
+# LPCXpresso 3.6 installed at /cygdrive/c/nxp/lpcxpresso_3.6"
+
+BINDIR="/cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin"
+
+# RedSuite with LPC4330 support installed at /cygdrive/c/code_red/RedSuite_4.2.3_379 "
+
+#BINDIR="/cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin"
+
+TARGET=LPC4330
+
+echo "############################################################################"
+echo "# Assumptions:"
+echo "#"
+echo "#   - Windows 7"
+echo "#   - Binaries installed at ${BINDIR}"
+echo "#   - AXF image built with Code Red"
+echo "#   - ${TARGET}"
+echo "#"
+echo "# You will need to edit this is any of the above are false"
+echo "#"
+echo "############################################################################"
+echo ""
+
+# This is the default install location for binaries on Windows (note that this
+# path could change with the Code Red version number)
+
+if [ ! -d "${BINDIR}" ]; then
+	echo "Directory ${BINDIR} does not exist"
+	exit 1
+fi
+
+# This is the relative path to the booLPCXpresso utility.
+
+BOOTLPC="Scripts/bootLPCXpresso.cmd"
+if [ ! -x "${BINDIR}/${BOOTLPC}" ]; then
+	echo "No executable at ${BINDIR}/${BOOTLPC}"
+	exit 1
+fi
+
+# bootLPCXpresso arguments
+
+BOOTLPC_ARG=winusb      # Win7
+
+# Use the LPC18xx/LPC43xx flash utility
+
+FLASHUTIL="crt_emu_lpc18_43_nxp"  # for LPC18xx/LPC43xx parts
+
+if [ ! -x "${BINDIR}/${FLASHUTIL}" ]; then
+	echo "No executable file at ${BINDIR}/${FLASHUTIL}"
+	exit 1
+fi
+
+# FLUSHUTIL arguements
+
+WIRE="-wire=winusb" # for LPC-Link on Windows Vista/Windows 7)
+
+# The nuttx directory must be provided as an argument
+
+NUTTX=$1
+if [ -z "${NUTTX}" ]; then
+	echo "Missing argument"
+	echo $USAGE
+	exit 1
+fi
+
+if [ ! -d "${NUTTX}" ]; then
+	echo "Directory ${NUTTX} does not exist"
+	echo $USAGE
+	exit 1
+fi
+
+# The binary to download:
+
+if [ ! -f "${NUTTX}/nuttx.axf" ]; then
+	if [ -f "${NUTTX}/nuttx" ]; then
+		echo "Renaming ${NUTTX}/nuttx to ${NUTTX}/nuttx.axf"
+		mv ${NUTTX}/nuttx ${NUTTX}/nuttx.axf
+	fi
+else
+	if [ -f "${NUTTX}/nuttx" ]; then
+		echo "Both ${NUTTX}/nuttx ${NUTTX}/nuttx.axf exist.."
+		echo "  Deleting ${NUTTX}/nuttx.axf"
+		rm -f ${NUTTX}/nuttx.axf
+		echo "Renaming ${NUTTX}/nuttx to ${NUTTX}/nuttx.axf"
+		mv ${NUTTX}/nuttx ${NUTTX}/nuttx.axf
+	fi
+fi
+NUTTXPATH=`cygpath -w "${NUTTX}/nuttx.axf"`
+
+# First of all boot the LPC-Link using the script: ${BINDIR}/${BOOTLPC}
+
+cd ${BINDIR} || \
+	{ echo "Failed to CD to ${BINDIR}"; exit 1; }
+./${BOOTLPC} ${BOOTLPC_ARG} || \
+	{ echo "'${BOOTLPC} ${BOOTLPC_ARG}' Failed"; }
+
+echo ""
+echo "Wait a bit"
+echo "5..."
+sleep 1
+echo "4..."
+sleep 1
+echo "3..."
+sleep 1
+echo "2..."
+sleep 1
+echo "1..."
+sleep 1
+echo "0..."
+echo ""
+
+# Then program the FLASH
+
+cd ${BINDIR} || \
+	{ echo "Failed to CD to ${BINDIR}"; exit 1; }
+./${FLASHUTIL} ${WIRE} -p${TARGET} -flash-load-exec="${NUTTXPATH}"
diff --git a/configs/bambino-200e/scripts/ramconfig.ld b/configs/bambino-200e/scripts/ramconfig.ld
new file mode 100644
index 0000000000000000000000000000000000000000..c524bf25bfbb8c4503dfafa3dd69e55c03d4319f
--- /dev/null
+++ b/configs/bambino-200e/scripts/ramconfig.ld
@@ -0,0 +1,151 @@
+/****************************************************************************
+ * configs/bambino-200e/scripts/ramconfig.ld
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Alan Carvalho de Assis acassis@gmail.com [nuttx] 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+/*
+ * Power-Up Reset Overview
+ * -----------------------
+ *
+ * The ARM core starts executing code on reset with the program counter set
+ * to 0x0000 0000.  The LPC43xx contains a shadow pointer register that
+ * allows areas of memory to be mapped to address 0x0000 0000. The default,
+ * reset value of the shadow pointer is 0x1040 0000 so that on reset code in
+ * the boot ROM is always executed first.
+ *
+ * The boot starts after reset is released.  The IRC is selected as CPU clock
+ * and the Cortex-M4 starts the boot loader. By default the JTAG access to the
+ * chip is disabled at reset.  The boot ROM determines the boot mode based on
+ * the OTP BOOT_SRC value or reset state pins.  For flash-based parts, the part
+ * boots from internal flash by default.  Otherwse, the boot ROM copies the
+ * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow
+ * pointer to 0x1000 0000, and jumps to that location.
+ *
+ * However, using JTAG the executable image can be also loaded directly into
+ * and executed from SRAM.
+ */
+
+/* The LPC4330 on the LPC4330-Xplorer has the following memory resources:
+ *
+ * 1. 4096Kb of SPIFI FLASH beginning at address 0x1400:0000
+ * 2. 264KB of total SRAM:
+ *    a. 128KB of SRAM in the CPU block beginning at address 0x1000:0000
+ *    b. 72KB beginning at address 0x1008:0000 and
+ *    c. 64KB of AHB SRAM in three banks beginning at addresses 0x2000:0000,
+ *       0x2000:8000 and 0x2000:C000.
+ * 3. No internal FLASH
+ *
+ * Here we assume that:
+ *
+ * 1. We will be running out of SRAM at 0x1000:0000, and
+ * 2. All .data and .bss will all fit into the 72KB SRAM block.
+ *
+ * NOTE: That initialized data is kept in the program memory SRAM and copied
+ * to .data SRAM.  This is wasteful and unnecessary but provides a good test
+ * for future, FLASH-resident code.
+ */
+
+MEMORY
+{
+    progmem (rx)  : ORIGIN = 0x10000000, LENGTH = 128K
+    datamem (rwx) : ORIGIN = 0x10080000, LENGTH = 72K
+}
+
+OUTPUT_ARCH(arm)
+ENTRY(__start)         /* Treat __start as the anchor for dead code stripping */
+EXTERN(_vectors)       /* Force the vectors to be included in the output */
+SECTIONS
+{
+	.text : {
+		_stext = ABSOLUTE(.);
+		*(.vectors)
+		*(.text .text.*)
+		*(.fixup)
+		*(.gnu.warning)
+		*(.rodata .rodata.*)
+		*(.gnu.linkonce.t.*)
+		*(.glue_7)
+		*(.glue_7t)
+		*(.got)
+		*(.gcc_except_table)
+		*(.gnu.linkonce.r.*)
+		_etext = ABSOLUTE(.);
+	} > progmem
+
+	.init_section : {
+		_sinit = ABSOLUTE(.);
+		*(.init_array .init_array.*)
+		_einit = ABSOLUTE(.);
+	} > progmem
+
+	.ARM.extab : {
+		*(.ARM.extab*)
+	} > progmem
+
+	__exidx_start = ABSOLUTE(.);
+	.ARM.exidx : {
+		*(.ARM.exidx*)
+	} > progmem
+	__exidx_end = ABSOLUTE(.);
+
+	_eronly = ABSOLUTE(.);
+
+	.data : {
+		_sdata = ABSOLUTE(.);
+		*(.data .data.*)
+		*(.gnu.linkonce.d.*)
+		CONSTRUCTORS
+		_edata = ABSOLUTE(.);
+	} > datamem AT > progmem
+
+	.bss : {			/* BSS				*/
+		_sbss = ABSOLUTE(.);
+		*(.bss .bss.*)
+		*(.gnu.linkonce.b.*)
+		*(COMMON)
+		_ebss = ABSOLUTE(.);
+	} > datamem
+					/* Stabs debugging sections.	*/
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_info 0 : { *(.debug_info) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/bambino-200e/scripts/spificonfig.ld b/configs/bambino-200e/scripts/spificonfig.ld
new file mode 100644
index 0000000000000000000000000000000000000000..283672e7e0507d18964b060f8f0890f78ac183c3
--- /dev/null
+++ b/configs/bambino-200e/scripts/spificonfig.ld
@@ -0,0 +1,147 @@
+/****************************************************************************
+ * configs/bambino-200e/scripts/spificonfig.ld
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Alan Carvalho de Assis acassis@gmail.com [nuttx] 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+/*
+ * Power-Up Reset Overview
+ * -----------------------
+ *
+ * The ARM core starts executing code on reset with the program counter set
+ * to 0x0000 0000.  The LPC43xx contains a shadow pointer register that
+ * allows areas of memory to be mapped to address 0x0000 0000. The default,
+ * reset value of the shadow pointer is 0x1040 0000 so that on reset code in
+ * the boot ROM is always executed first.
+ *
+ * The boot starts after reset is released.  The IRC is selected as CPU clock
+ * and the Cortex-M4 starts the boot loader. By default the JTAG access to the
+ * chip is disabled at reset.  The boot ROM determines the boot mode based on
+ * the OTP BOOT_SRC value or reset state pins.  For flash-based parts, the part
+ * boots from internal flash by default.  Otherwse, the boot ROM copies the
+ * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow
+ * pointer to 0x1000 0000, and jumps to that location.
+ *
+ * Of course, using JTAG the executable image can be also loaded directly
+ * into and executed from SRAM.
+ */
+
+/* The LPC4330 on the LPC4330-Xplorer has the following memory resources:
+ *
+ * 1. 4096Kb of SPIFI FLASH beginning at address 0x1400:0000
+ * 2. 264KB of total SRAM:
+ *    a. 128KB of SRAM in the CPU block beginning at address 0x1000:0000
+ *    b. 72KB beginning at address 0x1008:0000 and
+ *    c. 64KB of AHB SRAM in three banks beginning at addresses 0x2000:0000,
+ *       0x2000:8000 and 0x2000:C000.
+ * 3. No internal FLASH
+ *
+ * Here we assume that:
+ *
+ * 1. We will be running out of SPIFI flash at 0x1400:0000, and
+ * 2. All .data and .bss will all fit into the 128KB CPU SRAM block.
+ */
+
+MEMORY
+{
+    progmem (rx)  : ORIGIN = 0x14000000, LENGTH = 1024K
+    datamem (rwx) : ORIGIN = 0x10000000, LENGTH = 128K
+}
+
+OUTPUT_ARCH(arm)
+ENTRY(__start)         /* Treat __start as the anchor for dead code stripping */
+EXTERN(_vectors)       /* Force the vectors to be included in the output */
+SECTIONS
+{
+	.text : {
+		_stext = ABSOLUTE(.);
+		*(.vectors)
+		*(.text .text.*)
+		*(.fixup)
+		*(.gnu.warning)
+		*(.rodata .rodata.*)
+		*(.gnu.linkonce.t.*)
+		*(.glue_7)
+		*(.glue_7t)
+		*(.got)
+		*(.gcc_except_table)
+		*(.gnu.linkonce.r.*)
+		_etext = ABSOLUTE(.);
+	} > progmem
+
+	.init_section : {
+		_sinit = ABSOLUTE(.);
+		*(.init_array .init_array.*)
+		_einit = ABSOLUTE(.);
+	} > progmem
+
+	.ARM.extab : {
+		*(.ARM.extab*)
+	} > progmem
+
+	__exidx_start = ABSOLUTE(.);
+	.ARM.exidx : {
+		*(.ARM.exidx*)
+	} > progmem
+	__exidx_end = ABSOLUTE(.);
+
+	_eronly = ABSOLUTE(.);
+
+	.data : {
+		_sdata = ABSOLUTE(.);
+		*(.data .data.*)
+		*(.gnu.linkonce.d.*)
+		CONSTRUCTORS
+		_edata = ABSOLUTE(.);
+	} > datamem AT > progmem
+
+	.bss : {			/* BSS				*/
+		_sbss = ABSOLUTE(.);
+		*(.bss .bss.*)
+		*(.gnu.linkonce.b.*)
+		*(COMMON)
+		_ebss = ABSOLUTE(.);
+	} > datamem
+					/* Stabs debugging sections.	*/
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_info 0 : { *(.debug_info) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/compal_e88/src/.gitignore b/configs/bambino-200e/src/.gitignore
similarity index 100%
rename from configs/compal_e88/src/.gitignore
rename to configs/bambino-200e/src/.gitignore
diff --git a/configs/bambino-200e/src/Makefile b/configs/bambino-200e/src/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..bb34f2be40dbedebb02dd5afd0cc30a0bd5b4b7a
--- /dev/null
+++ b/configs/bambino-200e/src/Makefile
@@ -0,0 +1,86 @@
+############################################################################
+# configs/bambino-200e/src/Makefile
+#
+#   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#           Alan Carvalho de Assis acassis@gmail.com [nuttx] 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+ASRCS =
+CSRCS = lpc43_boot.c
+
+ifeq ($(CONFIG_LIB_BOARDCTL),y)
+CSRCS += lpc43_appinit.c
+endif
+
+ifeq ($(CONFIG_ARCH_FPU),y)
+CSRCS += lpc43_ostest.c
+endif
+
+ifeq ($(CONFIG_ARCH_LEDS),y)
+CSRCS += lpc43_autoleds.c
+else
+CSRCS += lpc43_userleds.c
+endif
+
+ifeq ($(CONFIG_ARCH_BUTTONS),y)
+CSRCS += lpc43_buttons.c
+endif
+
+ifeq ($(CONFIG_TIMER),y)
+CSRCS += lpc43_timer.c
+endif
+
+ifeq ($(CONFIG_USBMSC),y)
+CSRCS += lpc43_usbmsc.c
+endif
+
+ifeq ($(CONFIG_SPIFI_LIBRARY),y)
+CFLAGS += -DEUROBIRD
+SPIFI_LIB = spifi_lib
+CSRCS += $(SPIFI_LIB)/spifi_rom_api.c
+#CSRCS += $(SPIFI_LIB)/amic.c
+#CSRCS += $(SPIFI_LIB)/atmel.c
+#CSRCS += $(SPIFI_LIB)/chi.c
+#CSRCS += $(SPIFI_LIB)/eon.c
+#CSRCS += $(SPIFI_LIB)/esmt.c
+#CSRCS += $(SPIFI_LIB)/esmt.c
+#CSRCS += $(SPIFI_LIB)/giga.c
+#CSRCS += $(SPIFI_LIB)/macronix.c
+#CSRCS += $(SPIFI_LIB)/numonyx.c
+CSRCS += $(SPIFI_LIB)/spansion.c
+#CSRCS += $(SPIFI_LIB)/sst.c
+CSRCS += $(SPIFI_LIB)/winbond.c
+endif
+
+include $(TOPDIR)/configs/Board.mk
diff --git a/configs/bambino-200e/src/bambino-200e.h b/configs/bambino-200e/src/bambino-200e.h
new file mode 100644
index 0000000000000000000000000000000000000000..9a0b85680141c4144b513716407c2ad9b0b83dff
--- /dev/null
+++ b/configs/bambino-200e/src/bambino-200e.h
@@ -0,0 +1,141 @@
+/****************************************************************************
+ * configs/bambino-200e/src/bambino-200e.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Alan Carvalho de Assis acassis@gmail.com [nuttx] 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef _CONFIGS_BAMBINO_200E_SRC_BAMBINO_H
+#define _CONFIGS_BAMBINO_200E_SRC_BAMBINO_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#include "lpc43_pinconfig.h"
+#include "lpc43_gpio.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ *   LEDs GPIO                         PIN     SIGNAL NAME
+ *  -------------------------------- ------- --------------
+ *  gpio3[7] - LED1                  101     GPIO3[7]
+ *  gpio5[5] - LED2                  91      GPIO5[5]
+ *
+ ****************************************************************************/
+
+/* Definitions to configure LED pins as GPIOs:
+ *
+ * - Floating
+ * - Normal drive
+ * - No buffering, glitch filtering, slew=slow
+ */
+
+#define PINCONFIG_LED1 PINCONF_GPIO3p7
+#define PINCONFIG_LED2 PINCONF_GPIO5p5
+#define GPIO_LED1      (GPIO_MODE_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT3 | GPIO_PIN7)
+#define GPIO_LED2      (GPIO_MODE_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT5 | GPIO_PIN5)
+
+/****************************************************************************
+ *  Buttons GPIO
+ *  ----------------------------
+ *  gpio0[7]  - User Button USR1
+ ****************************************************************************/
+
+#define BAMBINO_BUT1 (GPIO_INTBOTH | GPIO_FLOAT | GPIO_PORT0 | GPIO_PIN7)
+
+/* Button IRQ numbers */
+
+#define BAMBINO_BUT1_IRQ  LPC43_IRQ_P0p23
+
+#define GPIO_SSP0_SCK  GPIO_SSP0_SCK_1
+#define GPIO_SSP0_SSEL GPIO_SSP0_SSEL_1
+#define GPIO_SSP0_MISO GPIO_SSP0_MISO_1
+#define GPIO_SSP0_MOSI GPIO_SSP0_MOSI_1
+
+/* We need to redefine USB_PWRD as GPIO to get USB Host working
+ * Also remember to add 2 resistors of 15K to D+ and D- pins.
+ */
+
+#ifdef CONFIG_USBHOST
+#  ifdef GPIO_USB_PWRD
+#    undef  GPIO_USB_PWRD
+#    define GPIO_USB_PWRD  (GPIO_INPUT | GPIO_PORT1 | GPIO_PIN22)
+#  endif
+#endif
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lpc43_sspdev_initialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins for the Lincoln 80 board.
+ *
+ ****************************************************************************/
+
+void weak_function lpc43_sspdev_initialize(void);
+
+/************************************************************************************
+ * Name: lpc43xx_timerinitialize()
+ *
+ * Description:
+ *   Perform architecture-specific initialization of the timer hardware.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_TIMER
+int lpc43_timerinitialize(void);
+#else
+#  define lpc43_timerinitialize() (0)
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* _CONFIGS_BAMBINO_200E_SRC_BAMBINO_H */
diff --git a/configs/bambino-200e/src/lpc43_appinit.c b/configs/bambino-200e/src/lpc43_appinit.c
new file mode 100644
index 0000000000000000000000000000000000000000..785c28758bc811317b47f190e55694de515b10dc
--- /dev/null
+++ b/configs/bambino-200e/src/lpc43_appinit.c
@@ -0,0 +1,176 @@
+/****************************************************************************
+ * config/bambino-200e/src/lpc43_appinit.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Alan Carvalho de Assis acassis@gmail.com [nuttx] 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "chip.h"
+
+#ifdef CONFIG_LPC43_SPIFI
+#  include 
+#  include "lpc43_spifi.h"
+
+#  ifdef CONFIG_SPFI_NXFFS
+#    include 
+#    include 
+#  endif
+#endif
+
+#include "bambino-200e.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+#ifndef CONFIG_SPIFI_DEVNO
+#  define CONFIG_SPIFI_DEVNO 0
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: nsh_spifi_initialize
+ *
+ * Description:
+ *   Make the SPIFI (or part of it) into a block driver that can hold a
+ *   file system.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_LPC43_SPIFI
+static int nsh_spifi_initialize(void)
+{
+  FAR struct mtd_dev_s *mtd;
+  int ret;
+
+  /* Initialize the SPIFI interface and create the MTD driver instance */
+
+  mtd = lpc43_spifi_initialize();
+  if (!mtd)
+    {
+      ferr("ERROR: lpc43_spifi_initialize failed\n");
+      return -ENODEV;
+    }
+
+#ifndef CONFIG_SPFI_NXFFS
+  /* And finally, use the FTL layer to wrap the MTD driver as a block driver */
+
+  ret = ftl_initialize(CONFIG_SPIFI_DEVNO, mtd);
+  if (ret < 0)
+    {
+      ferr("ERROR: Initializing the FTL layer: %d\n", ret);
+      return ret;
+    }
+#else
+  /* Initialize to provide NXFFS on the MTD interface */
+
+  ret = nxffs_initialize(mtd);
+  if (ret < 0)
+    {
+      ferr("ERROR: NXFFS initialization failed: %d\n", ret);
+      return ret;
+    }
+
+  /* Mount the file system at /mnt/spifi */
+
+  ret = mount(NULL, "/mnt/spifi", "nxffs", 0, NULL);
+  if (ret < 0)
+    {
+      ferr("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
+      return ret;
+    }
+#endif
+
+  return OK;
+}
+#else
+#  define nsh_spifi_initialize() (OK)
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ *   Perform architecture specific initialization
+ *
+ * Input Parameters:
+ *   arg - The boardctl() argument is passed to the board_app_initialize()
+ *         implementation without modification.  The argument has no
+ *         meaning to NuttX; the meaning of the argument is a contract
+ *         between the board-specific initalization logic and the the
+ *         matching application logic.  The value cold be such things as a
+ *         mode enumeration value, a set of DIP switch switch settings, a
+ *         pointer to configuration data read from a file or serial FLASH,
+ *         or whatever you would like to do with it.  Every implementation
+ *         should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+int board_app_initialize(uintptr_t arg)
+{
+  /* Initialize the SPIFI block device */
+
+  (void)nsh_spifi_initialize();
+
+#ifdef CONFIG_TIMER
+  /* Registers the timers */
+
+  lpc43_timerinitialize();
+#endif
+
+  return 0;
+}
diff --git a/configs/bambino-200e/src/lpc43_autoleds.c b/configs/bambino-200e/src/lpc43_autoleds.c
new file mode 100644
index 0000000000000000000000000000000000000000..5fe074b10ee1107050aef5fd864aa8799505d797
--- /dev/null
+++ b/configs/bambino-200e/src/lpc43_autoleds.c
@@ -0,0 +1,177 @@
+/****************************************************************************
+ * configs/bambino-200e/src/lpc43_autoleds.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Alan Carvalho de Assis acassis@gmail.com [nuttx] 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "chip.h"
+#include "up_arch.h"
+#include "up_internal.h"
+
+#include "bambino-200e.h"
+
+#ifdef CONFIG_ARCH_LEDS
+
+/* LED definitions **********************************************************/
+/* The LPC4330-Xplorer has 2 user-controllable LEDs labeled D2 an D3 in the
+ * schematic and on but referred to has LED1 and LED2 here, respectively.
+ *
+ *  LED1   D2  GPIO1[12]
+ *  LED2   D3  GPIO1[11]
+ *
+ * LEDs are pulled high to a low output illuminates the LED.
+ *
+ * If CONFIG_ARCH_LEDS is defined, the LEDs will be controlled as follows
+ * for NuttX debug functionality (where NC means "No Change").
+ *
+ *                                      ON            OFF
+ *                                  LED1   LED2   LED1   LED2
+ *   LED_STARTED                0   OFF    OFF     -      -
+ *   LED_HEAPALLOCATE           1   ON     OFF     -      -
+ *   LED_IRQSENABLED            1   ON     OFF     -      -
+ *   LED_STACKCREATED           1   ON     OFF     -      -
+ *   LED_INIRQ                  2   NC     ON      NC     OFF
+ *   LED_SIGNAL                 2   NC     ON      NC     OFF
+ *   LED_ASSERTION              2   NC     ON      NC     OFF
+ *   LED_PANIC                  2   NC     ON      NC     OFF
+ *
+ * If CONFIG_ARCH_LEDS is not defined, then the LEDs are completely under
+ * control of the application.  The following interfaces are then available
+ * for application control of the LEDs:
+ *
+ *  void board_userled_initialize(void);
+ *  void board_userled(int led, bool ledon);
+ *  void board_userled_all(uint8_t ledset);
+ */
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: led_dumppins
+ ****************************************************************************/
+
+#ifdef LED_VERBOSE
+static void led_dumppins(FAR const char *msg)
+{
+  lpc43_pin_dump(PINCONFIG_LED1, msg);
+  lpc43_gpio_dump(GPIO_LED2, msg);
+}
+#else
+#  define led_dumppins(m)
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_autoled_initialize
+ ****************************************************************************/
+
+void board_autoled_initialize(void)
+{
+  /* Configure all LED pins as GPIO outputs */
+
+  led_dumppins("board_autoled_initialize() Entry)");
+
+  /* Configure LED pins as GPIOs, then configure GPIOs as outputs */
+
+  lpc43_pin_config(PINCONFIG_LED1);
+  lpc43_gpio_config(GPIO_LED1);
+
+  lpc43_pin_config(PINCONFIG_LED2);
+  lpc43_gpio_config(GPIO_LED2);
+
+  led_dumppins("board_autoled_initialize() Exit");
+}
+
+/****************************************************************************
+ * Name: board_autoled_on
+ ****************************************************************************/
+
+void board_autoled_on(int led)
+{
+  switch (led)
+    {
+      default:
+      case 0:
+        lpc43_gpio_write(GPIO_LED1, true);   /* LED1 OFF */
+        lpc43_gpio_write(GPIO_LED2, true);   /* LED2 OFF */
+        break;
+
+      case 1:
+        lpc43_gpio_write(GPIO_LED1, false);  /* LED1 ON */
+        lpc43_gpio_write(GPIO_LED2, true);   /* LED2 OFF */
+        break;
+
+      case 2:
+        lpc43_gpio_write(GPIO_LED2, false);  /* LED2 ON */
+        break;
+    }
+}
+
+/****************************************************************************
+ * Name: board_autoled_off
+ ****************************************************************************/
+
+void board_autoled_off(int led)
+{
+  switch (led)
+    {
+      default:
+      case 0:
+      case 1:
+        break;
+
+      case 2:
+        lpc43_gpio_write(GPIO_LED2, true);  /* LED2 OFF */
+        break;
+    }
+}
+
+#endif /* CONFIG_ARCH_LEDS */
diff --git a/configs/bambino-200e/src/lpc43_boot.c b/configs/bambino-200e/src/lpc43_boot.c
new file mode 100644
index 0000000000000000000000000000000000000000..10c4237effdc9a17541f09d3e89159bee7270003
--- /dev/null
+++ b/configs/bambino-200e/src/lpc43_boot.c
@@ -0,0 +1,74 @@
+/************************************************************************************
+ * configs/bambino-200e/src/lpc43_boot.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Alan Carvalho de Assis acassis@gmail.com [nuttx] 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+
+#include "up_arch.h"
+#include "up_internal.h"
+
+#include "bambino-200e.h"
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: lpc43_boardinitialize
+ *
+ * Description:
+ *   All LPC43xx architectures must provide the following entry point.  This entry point
+ *   is called early in the intitialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void lpc43_boardinitialize(void)
+{
+  /* Configure on-board LEDs if LED support has been selected. */
+
+#ifdef CONFIG_ARCH_LEDS
+  board_autoled_initialize();
+#endif
+}
diff --git a/configs/bambino-200e/src/lpc43_buttons.c b/configs/bambino-200e/src/lpc43_buttons.c
new file mode 100644
index 0000000000000000000000000000000000000000..8aaeac3c95cc6af3214dc5563d5cd2e8e2263239
--- /dev/null
+++ b/configs/bambino-200e/src/lpc43_buttons.c
@@ -0,0 +1,208 @@
+/****************************************************************************
+ * configs/bambino-200e/src/lpc43_buttons.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Alan Carvalho de Assis acassis@gmail.com [nuttx] 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "bambino-200e.h"
+
+#ifdef CONFIG_ARCH_BUTTONS
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Pin configuration for each LPC4330 Xplorer button.  This array is indexed
+ * by the BUTTON_* definitions in board.h
+ */
+
+static const uint16_t g_buttoncfg[BOARD_NUM_BUTTONS] =
+{
+  BAMBINO_BUT1
+};
+
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC43_GPIO_IRQ)
+/* This array provides the mapping from button ID numbers to button IRQ
+ * numbers.
+ */
+
+static uint8_t g_buttonirq[BOARD_NUM_BUTTONS] =
+{
+  BAMBINO_BUT1_IRQ
+};
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_button_initialize
+ *
+ * Description:
+ *   board_button_initialize() must be called to initialize button resources.
+ *   After that, board_buttons() may be called to collect the current state
+ *   of all buttons or board_button_irq() may be called to register button
+ *   interrupt handlers.
+ *
+ ****************************************************************************/
+
+void board_button_initialize(void)
+{
+  int i;
+
+  /* Configure the GPIO pins as interrupting inputs. */
+
+  for (i = 0; i < BOARD_NUM_BUTTONS; i++)
+    {
+      lpc43_configgpio(g_buttoncfg[i]);
+    }
+}
+
+/****************************************************************************
+ * Name: board_buttons
+ *
+ * Description:
+ *   board_button_initialize() must be called to initialize button resources.  After
+ *   that, board_buttons() may be called to collect the current state of all
+ *   buttons.
+ *
+ *   board_buttons() may be called at any time to harvest the state of every
+ *   button.  The state of the buttons is returned as a bitset with one
+ *   bit corresponding to each button:  If the bit is set, then the button
+ *   is pressed.  See the BOARD_BUTTON_*_BIT and BOARD_JOYSTICK_*_BIT
+ *   definitions in board.h for the meaning of each bit.
+ *
+ ****************************************************************************/
+
+uint8_t board_buttons(void)
+{
+  uint8_t ret = 0;
+  int i;
+
+  /* Check that state of each key */
+
+  for (i = 0; i < BOARD_NUM_BUTTONS; i++)
+    {
+       /* A LOW value means that the key is pressed. */
+
+       bool released = lpc43_gpio_read(g_buttoncfg[i]);
+
+       /* Accumulate the set of depressed (not released) keys */
+
+       if (!released)
+         {
+            ret |= (1 << i);
+         }
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Button support.
+ *
+ * Description:
+ *   board_button_initialize() must be called to initialize button resources.  After
+ *   that, board_button_irq() may be called to register button interrupt handlers.
+ *
+ *   board_button_irq() may be called to register an interrupt handler that will
+ *   be called when a button is depressed or released.  The ID value is a
+ *   button enumeration value that uniquely identifies a button resource. See the
+ *   BOARD_BUTTON_* and BOARD_JOYSTICK_* definitions in board.h for the meaning
+ *   of enumeration values.
+ *
+ *   Note that board_button_irq() also enables button interrupts.  Button
+ *   interrupts will remain enabled after the interrupt handler is attached.
+ *   Interrupts may be disabled (and detached) by calling board_button_irq with
+ *   irqhandler equal to NULL.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC43_GPIO_IRQ)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
+{
+  irqstate_t flags;
+  int irq;
+
+  /* Verify that the button ID is within range */
+
+  if ((unsigned)id < BOARD_NUM_BUTTONS)
+    {
+      /* Disable interrupts until we are done */
+
+      flags = enter_critical_section();
+
+      /* Configure the interrupt.  Either attach and enable the new
+       * interrupt or disable and detach the old interrupt handler.
+       */
+
+      irq = g_buttonirq[id];
+      if (irqhandler)
+        {
+          /* Attach then enable the new interrupt handler */
+
+          (void)irq_attach(irq, irqhandler, arg);
+          up_enable_irq(irq);
+        }
+      else
+        {
+          /* Disable then detach the old interrupt handler */
+
+          up_disable_irq(irq);
+          (void)irq_detach(irq);
+        }
+
+      leave_critical_section(flags);
+    }
+
+  return OK;
+}
+#endif
+
+#endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/bambino-200e/src/lpc43_ostest.c b/configs/bambino-200e/src/lpc43_ostest.c
new file mode 100644
index 0000000000000000000000000000000000000000..5be6241373dcf2b9ac73bf8d687113f0f9fb0516
--- /dev/null
+++ b/configs/bambino-200e/src/lpc43_ostest.c
@@ -0,0 +1,112 @@
+/************************************************************************************
+ * configs/bambino-200e/src/lpc43_ostest.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Alan Carvalho de Assis acassis@gmail.com [nuttx] 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "up_arch.h"
+#include "up_internal.h"
+#include "bambino-200e.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Configuration ********************************************************************/
+
+#undef HAVE_FPU
+#if defined(CONFIG_ARCH_FPU) && defined(CONFIG_EXAMPLES_OSTEST_FPUSIZE) && \
+    defined(CONFIG_SCHED_WAITPID) && !defined(CONFIG_DISABLE_SIGNALS) && \
+   !defined(CONFIG_ARMV7M_CMNVECTOR)
+#    define HAVE_FPU 1
+#endif
+
+#ifdef HAVE_FPU
+
+#if CONFIG_EXAMPLES_OSTEST_FPUSIZE != (4*SW_FPU_REGS)
+#  error "CONFIG_EXAMPLES_OSTEST_FPUSIZE has the wrong size"
+#endif
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+static uint32_t g_saveregs[XCPTCONTEXT_REGS];
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/* Given an array of size CONFIG_EXAMPLES_OSTEST_FPUSIZE, this function will return
+ * the current FPU registers.
+ */
+
+void arch_getfpu(FAR uint32_t *fpusave)
+{
+  irqstate_t flags;
+
+  /* Take a snapshot of the thread context right now */
+
+  flags = enter_critical_section();
+  up_saveusercontext(g_saveregs);
+
+  /* Return only the floating register values */
+
+  memcpy(fpusave, &g_saveregs[REG_S0], (4*SW_FPU_REGS));
+  leave_critical_section(flags);
+}
+
+/* Given two arrays of size CONFIG_EXAMPLES_OSTEST_FPUSIZE this function
+ * will compare them and return true if they are identical.
+ */
+
+bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2)
+{
+  return memcmp(fpusave1, fpusave2, (4*SW_FPU_REGS)) == 0;
+}
+
+#endif /* HAVE_FPU */
diff --git a/arch/arm/src/calypso/calypso_heap.c b/configs/bambino-200e/src/lpc43_timer.c
similarity index 56%
rename from arch/arm/src/calypso/calypso_heap.c
rename to configs/bambino-200e/src/lpc43_timer.c
index 697e05a8f5e39e1ac8b8f5f9ce9f074464e2e242..2efe5b236621cbc2bb0bbfb4f0cb782541d8e653 100644
--- a/arch/arm/src/calypso/calypso_heap.c
+++ b/configs/bambino-200e/src/lpc43_timer.c
@@ -1,12 +1,9 @@
 /****************************************************************************
- * arch/arm/src/calypso/calypso_heap.c
- * Initialize memory interfaces of Calypso MCU
+ * configs/bambino-200e/src/lpc43_timer.c
  *
- *   (C) 2010 by Harald Welte 
- *   (C) 2011 Stefan Richter 
- *
- * This source code is derivated from Osmocom-BB project and was
- * relicensed as BSD with permission from original authors.
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Bob Doiron
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -42,60 +39,87 @@
  ****************************************************************************/
 
 #include 
-#include 
-
 #include 
+#include 
+
+#include 
 #include 
+#include 
+#include 
+#include 
 
 #include 
-#include 
+#include 
+#include 
+#include 
 
-#include 
-#include 
+#include 
+#include "lpc43_timer.h"
 
-#include "up_arch.h"
-#include "up_internal.h"
+#ifdef CONFIG_TIMER
 
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+/* Configuration ************************************************************/
+
+#if !(defined(CONFIG_LPC43_TMR0) || defined(CONFIG_LPC43_TMR1) || defined(CONFIG_LPC43_TMR2) \
+     || defined(CONFIG_LPC43_TMR3) )
+#  warning "CONFIG_LPC43_TMRx must be defined"
+#endif
+
+/* Select the path to the registered watchdog timer device */
+
+#ifndef CONFIG_TIMER0_DEVPATH
+#  define CONFIG_TIMER0_DEVPATH "/dev/timer0"
+#endif
+#ifndef CONFIG_TIMER1_DEVPATH
+#  define CONFIG_TIMER1_DEVPATH "/dev/timer1"
+#endif
+#ifndef CONFIG_TIMER2_DEVPATH
+#  define CONFIG_TIMER2_DEVPATH "/dev/timer2"
+#endif
+#ifndef CONFIG_TIMER3_DEVPATH
+#  define CONFIG_TIMER3_DEVPATH "/dev/timer3"
+#endif
 
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: up_addregion
+ * Name: lpc43_timerinitialize()
  *
  * Description:
- *   This function is called right after basics are initialized and right
- *   before IRQ system setup.
+ *   Perform architecture-specific initialization of the timer hardware.
  *
  ****************************************************************************/
 
-#if CONFIG_MM_REGIONS > 1
-void up_addregion(void)
+int lpc43_timerinitialize(void)
 {
-#ifdef CONFIG_ARCH_BOARD_COMPALE99
-  /* Disable watchdog in first non-common function */
-  wdog_enable(0);
+  /* Initialize and register the timer devices */
+
+#if defined(CONFIG_LPC43_TMR0)
+  tmrinfo("Initializing %s...\n", CONFIG_TIMER0_DEVPATH);
+  lpc43_tmrinitialize(CONFIG_TIMER0_DEVPATH, LPC43M4_IRQ_TIMER0);
 #endif
-  /* XXX: change to initialization of extern memory with save defaults */
-  /* Configure memory interface */
-  calypso_mem_cfg(CALYPSO_nCS0, 3, CALYPSO_MEM_16bit, 1);
-  calypso_mem_cfg(CALYPSO_nCS1, 3, CALYPSO_MEM_16bit, 1);
-  calypso_mem_cfg(CALYPSO_nCS2, 5, CALYPSO_MEM_16bit, 1);
-  calypso_mem_cfg(CALYPSO_nCS3, 5, CALYPSO_MEM_16bit, 1);
-  calypso_mem_cfg(CALYPSO_CS4, 0, CALYPSO_MEM_8bit, 1);
-  calypso_mem_cfg(CALYPSO_nCS6, 0, CALYPSO_MEM_32bit, 1);
-  calypso_mem_cfg(CALYPSO_nCS7, 0, CALYPSO_MEM_32bit, 0);
-
-  /* Set VTCXO_DIV2 = 1, configure PLL for 104 MHz and give ARM half of that */
-  calypso_clock_set(2, CALYPSO_PLL13_104_MHZ, ARM_MCLK_DIV_2);
-
-  /* Configure the RHEA bridge with some sane default values */
-  calypso_rhea_cfg(0, 0, 0xff, 0, 1, 0, 0);
-
-  kmm_addregion((FAR void *)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
-}
+
+#if defined(CONFIG_LPC43_TMR1)
+  tmrinfo("Initializing %s...\n", CONFIG_TIMER1_DEVPATH);
+  lpc43_tmrinitialize(CONFIG_TIMER1_DEVPATH, LPC43M4_IRQ_TIMER1);
+#endif
+
+#if defined(CONFIG_LPC43_TMR2)
+  tmrinfo("Initializing %s...\n", CONFIG_TIMER2_DEVPATH);
+  lpc43_tmrinitialize(CONFIG_TIMER2_DEVPATH, LPC43M4_IRQ_TIMER2);
 #endif
+
+#if defined(CONFIG_LPC43_TMR3)
+  tmrinfo("Initializing %s...\n", CONFIG_TIMER3_DEVPATH);
+  lpc43_tmrinitialize(CONFIG_TIMER3_DEVPATH, LPC43M4_IRQ_TIMER3);
+#endif
+
+  return OK;
+}
+
+#endif /* CONFIG_TIMER */
diff --git a/arch/arm/src/lpc11xx/lpc11_lowgetc.c b/configs/bambino-200e/src/lpc43_userleds.c
similarity index 63%
rename from arch/arm/src/lpc11xx/lpc11_lowgetc.c
rename to configs/bambino-200e/src/lpc43_userleds.c
index a0a12b6108021f4ba2bf1cc1755e7d6375959985..46f223f675c6071f469bef3fcc6806466f472dca 100644
--- a/arch/arm/src/lpc11xx/lpc11_lowgetc.c
+++ b/configs/bambino-200e/src/lpc43_userleds.c
@@ -1,8 +1,9 @@
 /****************************************************************************
- * arch/arm/src/lpc11/lpc11_lowgetc.c
+ * configs/bambino-200e/src/lpc43_userleds.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
+ *           Alan Carvalho de Assis acassis@gmail.com [nuttx] 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -40,92 +41,94 @@
 #include 
 
 #include 
+#include 
+#include 
 
-#include 
 #include 
 
-#include "up_internal.h"
+#include "chip.h"
 #include "up_arch.h"
+#include "up_internal.h"
 
-#include "chip/lpc11_syscon.h"
-#include "chip/lpc11_uart.h"
+#include "bambino-200e.h"
 
-#include "lpc11_gpio.h"
-#include "lpc11_lowgetc.h"
-#include "lpc11_serial.h"
+#ifndef CONFIG_ARCH_LEDS
 
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
-/* Select UART parameters for the selected console */
-
-#if defined(CONFIG_UART0_SERIAL_CONSOLE)
-#  define CONSOLE_BASE     LPC11_UART0_BASE
-#  define CONSOLE_FREQ     BOARD_CORECLK_FREQ
-#  define CONSOLE_BAUD     CONFIG_UART0_BAUD
-#  define CONSOLE_BITS     CONFIG_UART0_BITS
-#  define CONSOLE_PARITY   CONFIG_UART0_PARITY
-#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
-#  define CONSOLE_BASE     LPC11_UART1_BASE
-#  define CONSOLE_FREQ     BOARD_BUSCLK_FREQ
-#  define CONSOLE_BAUD     CONFIG_UART1_BAUD
-#  define CONSOLE_BITS     CONFIG_UART1_BITS
-#  define CONSOLE_PARITY   CONFIG_UART1_PARITY
-#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
-#  define CONSOLE_BASE     LPC11_UART2_BASE
-#  define CONSOLE_FREQ     BOARD_BUSCLK_FREQ
-#  define CONSOLE_BAUD     CONFIG_UART2_BAUD
-#  define CONSOLE_BITS     CONFIG_UART2_BITS
-#  define CONSOLE_PARITY   CONFIG_UART2_PARITY
-#endif
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
+/* LED definitions **********************************************************/
+/* The LPC4330-Xplorer has 2 user-controllable LEDs labeled D2 an D3 in the
+ * schematic and on but referred to has LED1 and LED2 here, respectively.
+ *
+ *  LED1   D2  GPIO1[12]
+ *  LED2   D3  GPIO1[11]
+ *
+ * LEDs are pulled high to a low output illuminates the LED.
+ */
 
 /****************************************************************************
- * Public Data
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Private Data
+ * Name: led_dumppins
  ****************************************************************************/
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
+#ifdef LED_VERBOSE
+static void led_dumppins(FAR const char *msg)
+{
+  lpc43_pin_dump(PINCONFIG_LED1, msg);
+  lpc43_gpio_dump(GPIO_LED2, msg);
+}
+#else
+#  define led_dumppins(m)
+#endif
 
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: up_lowgetc
- *
- * Description:
- *   Input one byte from the serial console
- *
+ * Name: board_userled_initialize
  ****************************************************************************/
 
-int lpc11_lowgetc(void)
+void board_userled_initialize(void)
 {
-  uint8_t ch = 0;
+  /* Configure all LED GPIO lines */
 
-#if defined HAVE_UART && defined HAVE_SERIAL_CONSOLE
-  /* Wait while the Receiver Data Ready (RDR) is indicating a "empty" FIFO to
-   * assure that we have data in the buffer to read.
-   */
+  led_dumppins("board_userled_initialize() Entry)");
 
-  while ((getreg32(CONSOLE_BASE+LPC11_UART_LSR_OFFSET) & UART_LSR_RDR) == 0);
+  /* Configure LED pins as GPIOs, then configure GPIOs as outputs */
 
-  /* Then read a character from the UART data register */
+  lpc43_pin_config(PINCONFIG_LED1);
+  lpc43_gpio_config(GPIO_LED1);
 
-  ch = getreg8(CONSOLE_BASE+LPC11_UART_RBR_OFFSET);
-#endif
+  lpc43_pin_config(PINCONFIG_LED2);
+  lpc43_gpio_config(GPIO_LED2);
+
+  led_dumppins("board_userled_initialize() Exit");
+}
+
+/****************************************************************************
+ * Name: board_userled
+ ****************************************************************************/
 
-  return (int)ch;
+void board_userled(int led, bool ledon)
+{
+  uint16_t gpiocfg = (led == BOARD_LED1 ? GPIO_LED1 : GPIO_LED2);
+  lpc43_gpio_write(gpiocfg, !ledon);
+}
+
+/****************************************************************************
+ * Name: board_userled_all
+ ****************************************************************************/
+
+void board_userled_all(uint8_t ledset)
+{
+  lpc43_gpio_write(GPIO_LED1, (ledset & BOARD_LED1_BIT) == 0);
+  lpc43_gpio_write(GPIO_LED2, (ledset & BOARD_LED2_BIT) == 0);
 }
+
+#endif /* !CONFIG_ARCH_LEDS */
diff --git a/configs/bambino-200e/usbnsh/Make.defs b/configs/bambino-200e/usbnsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..fa8969212e56046bdc25285f52de9334b16060f4
--- /dev/null
+++ b/configs/bambino-200e/usbnsh/Make.defs
@@ -0,0 +1,132 @@
+############################################################################
+# configs/bambino-200e/usbnsh/Make.defs
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#           Alan Carvalho de Assis acassis@gmail.com [nuttx] 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+# Setup for the kind of memory that we are executing from
+
+ifeq ($(CONFIG_LPC43_BOOT_SRAM),y)
+  LDSCRIPT = ramconfig.ld
+endif
+ifeq ($(CONFIG_LPC43_BOOT_SPIFI),y)
+  LDSCRIPT = spificonfig.ld
+endif
+ifeq ($(CONFIG_LPC43_BOOT_FLASHA),y)
+  LDSCRIPT = flashaconfig.ld
+endif
+ifeq ($(CONFIG_LPC43_BOOT_FLASHB),y)
+  LDSCRIPT = flashaconfig.ld
+endif
+ifeq ($(CONFIG_LPC43_BOOT_CS0FLASH),y)
+  LDSCRIPT = cs0flash.ld
+endif
+
+# Setup for Windows vs Linux/Cygwin/OSX environments
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT = .elf
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/bambino-200e/usbnsh/defconfig b/configs/bambino-200e/usbnsh/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..646cdbadd64b520810c45b5f0565d9768707c949
--- /dev/null
+++ b/configs/bambino-200e/usbnsh/defconfig
@@ -0,0 +1,1013 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+# CONFIG_INTELHEX_BINARY is not set
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+CONFIG_ARCH_STDARG_H=y
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+CONFIG_DEBUG_NOOPT=y
+# CONFIG_DEBUG_CUSTOMOPT is not set
+# CONFIG_DEBUG_FULLOPT is not set
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+CONFIG_ARCH_CHIP_LPC43XX=y
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+# CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="lpc43xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+CONFIG_ARMV7M_CMNVECTOR=y
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+
+#
+# LPC43xx Configuration Options
+#
+# CONFIG_ARCH_CHIP_LPC4310FBD144 is not set
+# CONFIG_ARCH_CHIP_LPC4310FET100 is not set
+# CONFIG_ARCH_CHIP_LPC4320FBD144 is not set
+# CONFIG_ARCH_CHIP_LPC4320FET100 is not set
+CONFIG_ARCH_CHIP_LPC4330FBD144=y
+# CONFIG_ARCH_CHIP_LPC4330FET100 is not set
+# CONFIG_ARCH_CHIP_LPC4330FET180 is not set
+# CONFIG_ARCH_CHIP_LPC4330FET256 is not set
+# CONFIG_ARCH_CHIP_LPC4337JBD144 is not set
+# CONFIG_ARCH_CHIP_LPC4337JET100 is not set
+# CONFIG_ARCH_CHIP_LPC4350FBD208 is not set
+# CONFIG_ARCH_CHIP_LPC4350FET180 is not set
+# CONFIG_ARCH_CHIP_LPC4350FET256 is not set
+# CONFIG_ARCH_CHIP_LPC4353FBD208 is not set
+# CONFIG_ARCH_CHIP_LPC4353FET180 is not set
+# CONFIG_ARCH_CHIP_LPC4353FET256 is not set
+# CONFIG_ARCH_CHIP_LPC4357FET180 is not set
+# CONFIG_ARCH_CHIP_LPC4357FBD208 is not set
+# CONFIG_ARCH_CHIP_LPC4357FET256 is not set
+# CONFIG_ARCH_CHIP_LPC4370FET100 is not set
+CONFIG_ARCH_FAMILY_LPC4330=y
+# CONFIG_LPC43_BOOT_SRAM is not set
+CONFIG_LPC43_BOOT_SPIFI=y
+# CONFIG_LPC43_BOOT_FLASHA is not set
+# CONFIG_LPC43_BOOT_FLASHB is not set
+# CONFIG_LPC43_BOOT_CS0FLASH is not set
+# CONFIG_LPC43_BOOT_CS1FLASH is not set
+# CONFIG_LPC43_BOOT_CS2FLASH is not set
+# CONFIG_LPC43_BOOT_CS3FLASH is not set
+
+#
+# LPC43xx Peripheral Support
+#
+# CONFIG_LPC43_ADC0 is not set
+# CONFIG_LPC43_ADC1 is not set
+# CONFIG_LPC43_ATIMER is not set
+# CONFIG_LPC43_CAN1 is not set
+# CONFIG_LPC43_CAN2 is not set
+# CONFIG_LPC43_DAC is not set
+# CONFIG_LPC43_EMC is not set
+# CONFIG_LPC43_ETHERNET is not set
+# CONFIG_LPC43_EVNTMNTR is not set
+# CONFIG_LPC43_GPDMA is not set
+# CONFIG_LPC43_I2C0 is not set
+# CONFIG_LPC43_I2C1 is not set
+# CONFIG_LPC43_I2S0 is not set
+# CONFIG_LPC43_I2S1 is not set
+# CONFIG_LPC43_LCD is not set
+# CONFIG_LPC43_MCPWM is not set
+# CONFIG_LPC43_QEI is not set
+# CONFIG_LPC43_RIT is not set
+# CONFIG_LPC43_RTC is not set
+# CONFIG_LPC43_SCT is not set
+# CONFIG_LPC43_SDMMC is not set
+# CONFIG_LPC43_SPI is not set
+# CONFIG_LPC43_SPIFI is not set
+# CONFIG_LPC43_SSP0 is not set
+# CONFIG_LPC43_SSP1 is not set
+CONFIG_LPC43_TMR0=y
+# CONFIG_LPC43_TMR1 is not set
+# CONFIG_LPC43_TMR2 is not set
+# CONFIG_LPC43_TMR3 is not set
+CONFIG_LPC43_TIMER=y
+# CONFIG_LPC43_USART0 is not set
+CONFIG_LPC43_UART1=y
+# CONFIG_LPC43_USART2 is not set
+# CONFIG_LPC43_USART3 is not set
+# CONFIG_LPC43_USBOTG is not set
+CONFIG_LPC43_USB0=y
+# CONFIG_LPC43_USB1 is not set
+# CONFIG_LPC43_WWDT is not set
+# CONFIG_LPC43_GPIO_IRQ is not set
+
+#
+# Internal Memory Configuration
+#
+CONFIG_ARCH_HAVE_AHB_SRAM_BANK1=y
+# CONFIG_LPC43_USE_LOCSRAM_BANK1 is not set
+# CONFIG_LPC43_USE_AHBSRAM_BANK0 is not set
+# CONFIG_LPC43_USE_AHBSRAM_BANK1 is not set
+# CONFIG_LPC43_HEAP_AHBSRAM_BANK2 is not set
+
+#
+# External Memory Configuration
+#
+
+#
+# RS-485 Configuration
+#
+# CONFIG_UART1_RS485MODE is not set
+# CONFIG_UART1_RS485_DTRDIR is not set
+
+#
+# USB device controller driver (DCD) options
+#
+# CONFIG_LPC43_USB0DEV_NOVBUS is not set
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+CONFIG_ARCH_HAVE_EXTCLK=y
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=18535
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x10000000
+CONFIG_RAM_SIZE=131072
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_BAMBINO_200E=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="bambino-200e"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+# CONFIG_ARCH_BUTTONS is not set
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+CONFIG_BOARDCTL_USBDEVCTRL=y
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEMTICK_EXTCLK is not set
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2012
+CONFIG_START_MONTH=7
+CONFIG_START_DAY=11
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_SPINLOCK is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+# CONFIG_DEV_CONSOLE is not set
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+# CONFIG_ARCH_HAVE_I2CRESET is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+CONFIG_SERIAL_REMOVABLE=y
+# CONFIG_SERIAL_CONSOLE is not set
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+# CONFIG_UART1_SERIAL_CONSOLE is not set
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+CONFIG_NO_SERIAL_CONSOLE=y
+
+#
+# UART1 Configuration
+#
+CONFIG_UART1_RXBUFSIZE=256
+CONFIG_UART1_TXBUFSIZE=256
+CONFIG_UART1_BAUD=115200
+CONFIG_UART1_BITS=8
+CONFIG_UART1_PARITY=0
+CONFIG_UART1_2STOP=0
+# CONFIG_UART1_IFLOWCONTROL is not set
+# CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+CONFIG_USBDEV=y
+
+#
+# USB Device Controller Driver Options
+#
+# CONFIG_USBDEV_ISOCHRONOUS is not set
+# CONFIG_USBDEV_DUALSPEED is not set
+CONFIG_USBDEV_SELFPOWERED=y
+# CONFIG_USBDEV_BUSPOWERED is not set
+CONFIG_USBDEV_MAXPOWER=100
+# CONFIG_USBDEV_DMA is not set
+# CONFIG_ARCH_USBDEV_STALLQUEUE is not set
+# CONFIG_USBDEV_TRACE is not set
+
+#
+# USB Device Class Driver Options
+#
+# CONFIG_USBDEV_COMPOSITE is not set
+# CONFIG_PL2303 is not set
+CONFIG_CDCACM=y
+CONFIG_CDCACM_CONSOLE=y
+CONFIG_CDCACM_EP0MAXPACKET=64
+CONFIG_CDCACM_EPINTIN=1
+CONFIG_CDCACM_EPINTIN_FSSIZE=64
+CONFIG_CDCACM_EPINTIN_HSSIZE=64
+CONFIG_CDCACM_EPBULKOUT=3
+CONFIG_CDCACM_EPBULKOUT_FSSIZE=64
+CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
+CONFIG_CDCACM_EPBULKIN=2
+CONFIG_CDCACM_EPBULKIN_FSSIZE=64
+CONFIG_CDCACM_EPBULKIN_HSSIZE=512
+CONFIG_CDCACM_NRDREQS=4
+CONFIG_CDCACM_NWRREQS=4
+CONFIG_CDCACM_BULKIN_REQLEN=96
+CONFIG_CDCACM_RXBUFSIZE=257
+CONFIG_CDCACM_TXBUFSIZE=193
+CONFIG_CDCACM_VENDORID=0x0525
+CONFIG_CDCACM_PRODUCTID=0xa4a7
+CONFIG_CDCACM_VENDORSTR="NuttX"
+CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
+# CONFIG_USBMSC is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+CONFIG_SYSLOG_CHAR=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+CONFIG_SYSLOG_CHAR_CRLF=y
+CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_PSEUDOFS_SOFTLINKS is not set
+CONFIG_FS_READABLE=y
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=2
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+# CONFIG_STDIO_DISABLE_BUFFERING is not set
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
+# CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_IFUPDOWN is not set
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_USBCONSOLE is not set
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CDCACM is not set
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/bambino-200e/usbnsh/setenv.sh b/configs/bambino-200e/usbnsh/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..74cf761d89cb529dbb1d3511ad91a9fc88038985
--- /dev/null
+++ b/configs/bambino-200e/usbnsh/setenv.sh
@@ -0,0 +1,96 @@
+#!/bin/bash
+# configs/bambino-200e/usbnsh/setenv.sh
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#           Alan Carvalho de Assis acassis@gmail.com [nuttx] 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the Code Red
+# toolchain under windows.  You will have to edit this if you install the
+# Code Red toolchain in any other location or if you install a different
+# version
+#export TOOLCHAIN_BIN="/cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/Tools/bin"
+#export SCRIPT_BIN="/cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin"
+#export SCRIPT_BIN="/cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export SCRIPT_BIN=
+
+# These are the Cygwin paths to the locations where I installed the Atollic
+# toolchain under windows.  You will also have to edit this if you install
+# the Atollic toolchain in any other location.  /usr/bin is added before
+# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
+# at those locations as well.
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
+#export SCRIPT_BIN=
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+#export SCRIPT_BIN=
+
+# And add the selected toolchain path[s] to the PATH variable
+
+export PATH="/sbin:/usr/sbin:${PATH_ORIG}"
+
+if [ ! -z ${SCRIPT_BIN} ]; then
+  export PATH="${SCRIPT_BIN}:${PATH}"
+fi
+
+export PATH="${TOOLCHAIN_BIN}:${PATH}"
+echo "PATH : ${PATH}"
+
+# Set an alias that can be used to put the LPC43xx in boot mode
+
+alias lpc43xx='${SCRIPT_BIN}/Scripts/bootLPCXpresso.cmd winusb'
diff --git a/configs/boardctl.c b/configs/boardctl.c
index 749056d82a51b4431dedfa1976b7198b2371ec14..f0d0da114e902961b3bb24dc4006d29ace0534ba 100644
--- a/configs/boardctl.c
+++ b/configs/boardctl.c
@@ -46,8 +46,9 @@
 #include 
 
 #include 
-#include 
+#include 
 #include 
+#include 
 
 #ifdef CONFIG_BOARDCTL_USBDEVCTRL
 #  include 
@@ -356,7 +357,7 @@ int boardctl(unsigned int cmd, uintptr_t arg)
             (FAR const struct boardioc_symtab_s *)arg;
 
          DEBUGASSERT(symdesc != NULL);
-         mod_setsymtab(symdesc->symtab, symdesc->nsymbols);
+         modlib_setsymtab(symdesc->symtab, symdesc->nsymbols);
          ret = OK;
         }
         break;
@@ -381,6 +382,21 @@ int boardctl(unsigned int cmd, uintptr_t arg)
         break;
 #endif
 
+#ifdef CONFIG_NX_MULTIUSER
+      /* CMD:           BOARDIOC_NX_START
+       * DESCRIPTION:   Start the NX servier
+       * ARG:           None
+       * CONFIGURATION: CONFIG_NX_MULTIUSER
+       * DEPENDENCIES:  Base graphics logic provides nx_start()
+       */
+
+      case BOARDIOC_NX_START:
+        {
+          ret = nx_start();
+        }
+        break;
+#endif
+
 #ifdef CONFIG_BOARDCTL_TSCTEST
       /* CMD:           BOARDIOC_TSCTEST_SETUP
        * DESCRIPTION:   Touchscreen controller test configuration
@@ -410,58 +426,13 @@ int boardctl(unsigned int cmd, uintptr_t arg)
         break;
 #endif
 
-#ifdef CONFIG_BOARDCTL_ADCTEST
-      /* CMD:           BOARDIOC_ADCTEST_SETUP
-       * DESCRIPTION:   ADC controller test configuration
-       * ARG:           None
-       * CONFIGURATION: CONFIG_LIB_BOARDCTL && CONFIG_BOARDCTL_ADCTEST
-       * DEPENDENCIES:  Board logic must provide board_adc_setup()
-       */
-
-      case BOARDIOC_ADCTEST_SETUP:
-        {
-          ret = board_adc_setup();
-        }
-        break;
-#endif
-
-#ifdef CONFIG_BOARDCTL_PWMTEST
-      /* CMD:           BOARDIOC_PWMTEST_SETUP
-       * DESCRIPTION:   PWM controller test configuration
-       * ARG:           None
-       * CONFIGURATION: CONFIG_LIB_BOARDCTL && CONFIG_BOARDCTL_PWMTEST
-       * DEPENDENCIES:  Board logic must provide board_pwm_setup()
-       */
-
-      case BOARDIOC_PWMTEST_SETUP:
-        {
-          ret = board_pwm_setup();
-        }
-        break;
-#endif
-
-#ifdef CONFIG_BOARDCTL_CANINIT
-      /* CMD:           BOARDIOC_CAN_INITIALIZE
-       * DESCRIPTION:   CAN device initialization
-       * ARG:           None
-       * CONFIGURATION: CONFIG_LIB_BOARDCTL && CONFIG_BOARDCTL_CANINIT
-       * DEPENDENCIES:  Board logic must provide board_can_initialize()
-       */
-
-      case BOARDIOC_CAN_INITIALIZE:
-        {
-          ret = board_can_initialize();
-        }
-        break;
-#endif
-
 #ifdef CONFIG_BOARDCTL_GRAPHICS
       /* CMD:           BOARDIOC_GRAPHICS_SETUP
        * DESCRIPTION:   Configure graphics that require special initialization
        *                procedures
        * ARG:           A pointer to an instance of struct boardioc_graphics_s
        * CONFIGURATION: CONFIG_LIB_BOARDCTL && CONFIG_BOARDCTL_GRAPHICS
-       * DEPENDENCIES:  Board logic must provide board_adc_setup()
+       * DEPENDENCIES:  Board logic must provide board_graphics_setup()
        */
 
       case BOARDIOC_GRAPHICS_SETUP:
diff --git a/configs/c5471evm/httpd/Make.defs b/configs/c5471evm/httpd/Make.defs
index 9f465df52ca0c4fd8fb0bde972a07fb91639b7cd..04559d8c88194a82d533dcf3b26f6438ac202dad 100644
--- a/configs/c5471evm/httpd/Make.defs
+++ b/configs/c5471evm/httpd/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(HOSTOS),Cygwin)
 endif
 endif
 
-ifeq ("${CONFIG_DEBUG}","y")
+ifeq ("${CONFIG_DEBUG_FEATURES}","y")
   ARCHOPTIMIZATION = -g
 endif
 
@@ -86,7 +86,7 @@ else
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
@@ -115,7 +115,7 @@ EXEEXT =
 ifneq ($(CROSSDEV),arm-nuttx-elf-)
   LDFLAGS += -nostartfiles -nodefaultlibs
 endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
   LDFLAGS += -g
 endif
 
diff --git a/configs/c5471evm/httpd/defconfig b/configs/c5471evm/httpd/defconfig
index 895892b246254a3827f67f510eda2c4d4179a0a3..c7a1f260ccafd7423505a6931cb550cf0417fdc6 100644
--- a/configs/c5471evm/httpd/defconfig
+++ b/configs/c5471evm/httpd/defconfig
@@ -37,12 +37,15 @@ CONFIG_RRLOAD_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
@@ -57,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -70,14 +75,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 CONFIG_ARCH_CHIP_C5471=y
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
 # CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -86,20 +92,39 @@ CONFIG_ARCH_CHIP_C5471=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="c5471"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 # CONFIG_ARCH_LOWVECTORS is not set
 
@@ -141,6 +166,7 @@ CONFIG_C5471_PHY_LU3X31T_T64=y
 CONFIG_C5471_AUTONEGOTIATION=y
 # CONFIG_C5471_BASET100 is not set
 # CONFIG_C5471_BASET10 is not set
+CONFIG_C5471_HPWORK=y
 
 #
 # Architecture Options
@@ -153,11 +179,14 @@ CONFIG_C5471_AUTONEGOTIATION=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
 # CONFIG_ARCH_IDLE_CUSTOM is not set
@@ -209,6 +238,8 @@ CONFIG_ARCH_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
+# CONFIG_LIB_BOARDCTL is not set
 
 #
 # RTOS Features
@@ -226,6 +257,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2007
 CONFIG_START_MONTH=2
@@ -243,6 +275,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="webserver_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=64
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -279,6 +312,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -287,12 +321,17 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -310,6 +349,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=4096
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -320,22 +360,51 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0"
-# CONFIG_TIMER is not set
 # CONFIG_ANALOG is not set
 # CONFIG_AUDIO_DEVICES is not set
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_NETDEVICES is not set
@@ -344,9 +413,10 @@ CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0"
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -370,29 +440,34 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 CONFIG_OTHER_UART_SERIALDRIVER=y
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_OTHER_SERIAL_CONSOLE=y
 # CONFIG_NO_SERIAL_CONSOLE is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -400,14 +475,11 @@ CONFIG_OTHER_SERIAL_CONSOLE=y
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_IPv4=y
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -417,6 +489,19 @@ CONFIG_NET_GUARDSIZE=2
 #
 # CONFIG_NET_MULTILINK is not set
 CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
+# CONFIG_NET_TUN is not set
+
+#
+# Network Device Operations
+#
+# CONFIG_NETDEV_PHY_IOCTL is not set
+
+#
+# Internet Protocol Selection
+#
+CONFIG_NET_IPv4=y
+# CONFIG_NET_IPv6 is not set
 
 #
 # Socket Support
@@ -427,14 +512,14 @@ CONFIG_NET_SOCKOPTS=y
 # CONFIG_NET_SOLINGER is not set
 
 #
-# Network Device Operations
+# Raw Socket Support
 #
-# CONFIG_NETDEV_PHY_IOCTL is not set
+# CONFIG_NET_PKT is not set
 
 #
-# Raw Socket Support
+# Unix Domain Socket Support
 #
-# CONFIG_NET_PKT is not set
+# CONFIG_NET_LOCAL is not set
 
 #
 # TCP/IP Networking
@@ -490,6 +575,7 @@ CONFIG_IOB_NCHAINS=8
 # Routing Table Configuration
 #
 # CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME=""
 
 #
 # Crypto API
@@ -510,12 +596,7 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_FS_NAMED_SEMAPHORES is not set
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -535,6 +616,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -560,6 +645,8 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -571,15 +658,20 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
 CONFIG_ARCH_LOWPUTC=y
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -592,26 +684,25 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -620,42 +711,48 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
 CONFIG_EXAMPLES_WEBSERVER=y
 CONFIG_EXAMPLES_WEBSERVER_IPADDR=0x0a000002
 CONFIG_EXAMPLES_WEBSERVER_DRIPADDR=0x0a000001
 CONFIG_EXAMPLES_WEBSERVER_NETMASK=0xffffff00
 CONFIG_EXAMPLES_WEBSERVER_NOMAC=y
-# CONFIG_EXAMPLES_USBSERIAL is not set
-# CONFIG_EXAMPLES_USBTERM is not set
-# CONFIG_EXAMPLES_WATCHDOG is not set
 # CONFIG_EXAMPLES_WGET is not set
 
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -666,25 +763,25 @@ CONFIG_EXAMPLES_WEBSERVER_NOMAC=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
 # CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 CONFIG_NETUTILS_WEBSERVER=y
 # CONFIG_NETUTILS_HTTPD_SINGLECONNECT is not set
@@ -700,11 +797,6 @@ CONFIG_NETUTILS_HTTPD_CLASSIC=y
 CONFIG_NETUTILS_HTTPD_KEEPALIVE_DISABLE=y
 # CONFIG_NETUTILS_XMLRPC is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -722,115 +814,17 @@ CONFIG_NETUTILS_HTTPD_KEEPALIVE_DISABLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# EMACS-like Command Line Editor
-#
 # CONFIG_SYSTEM_CLE is not set
-
-#
-# CU Minimal Terminal
-#
 # CONFIG_SYSTEM_CUTERM is not set
-
-#
-# FLASH Program Installation
-#
-# CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# Intel HEX to binary conversion
-#
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# NxPlayer media player library / command Line
-#
-
-#
-# RAM test
-#
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-
-#
-# P-Code Support
-#
-
-#
-# PHY Tool
-#
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sudoku
-#
 # CONFIG_SYSTEM_SUDOKU is not set
-
-#
-# Sysinfo
-#
-
-#
-# VI Work-Alike Editor
-#
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# USB Monitor
-#
-
-#
-# Zmodem Commands
-#
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/c5471evm/nettest/Make.defs b/configs/c5471evm/nettest/Make.defs
index 909f21b08309edf54cb33c3c53e43bcf602f2731..e820990001c9d4bf4390d59190410dcc462ecab1 100644
--- a/configs/c5471evm/nettest/Make.defs
+++ b/configs/c5471evm/nettest/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(HOSTOS),Cygwin)
 endif
 endif
 
-ifeq ("${CONFIG_DEBUG}","y")
+ifeq ("${CONFIG_DEBUG_FEATURES}","y")
   ARCHOPTIMIZATION = -g
 endif
 
@@ -86,7 +86,7 @@ else
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
@@ -115,7 +115,7 @@ EXEEXT =
 ifneq ($(CROSSDEV),arm-nuttx-elf-)
   LDFLAGS += -nostartfiles -nodefaultlibs
 endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
   LDFLAGS += -g
 endif
 
diff --git a/configs/c5471evm/nettest/defconfig b/configs/c5471evm/nettest/defconfig
index 006c9b09b0e89ddf7920e41b39da206af722fdb8..f8c46cb22ec4ec480cc1f31fea163fd1d6c7aefc 100644
--- a/configs/c5471evm/nettest/defconfig
+++ b/configs/c5471evm/nettest/defconfig
@@ -37,14 +37,16 @@ CONFIG_RRLOAD_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 CONFIG_ARCH_CHIP_C5471=y
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -93,7 +97,9 @@ CONFIG_ARCH_CHIP_C5471=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_ARM926EJS is not set
@@ -104,10 +110,21 @@ CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="c5471"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 # CONFIG_ARCH_LOWVECTORS is not set
 
@@ -149,6 +166,7 @@ CONFIG_C5471_PHY_LU3X31T_T64=y
 CONFIG_C5471_AUTONEGOTIATION=y
 # CONFIG_C5471_BASET100 is not set
 # CONFIG_C5471_BASET10 is not set
+CONFIG_C5471_HPWORK=y
 
 #
 # Architecture Options
@@ -161,6 +179,7 @@ CONFIG_C5471_AUTONEGOTIATION=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -219,6 +238,7 @@ CONFIG_ARCH_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -237,6 +257,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2007
 CONFIG_START_MONTH=2
@@ -285,6 +306,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -292,12 +314,17 @@ CONFIG_NAME_MAX=32
 CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -315,6 +342,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=4096
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -325,16 +353,21 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0"
@@ -343,9 +376,28 @@ CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0"
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_NETDEVICES is not set
@@ -354,9 +406,10 @@ CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0"
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -380,30 +433,34 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 CONFIG_OTHER_UART_SERIALDRIVER=y
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_OTHER_SERIAL_CONSOLE=y
 # CONFIG_NO_SERIAL_CONSOLE is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -411,13 +468,11 @@ CONFIG_OTHER_SERIAL_CONSOLE=y
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -536,12 +591,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -560,6 +609,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -585,6 +638,8 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -599,14 +654,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -618,22 +676,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # Application Configuration
 #
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -655,35 +717,44 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -694,8 +765,9 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -706,11 +778,12 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
@@ -732,15 +805,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/c5471evm/nsh/Make.defs b/configs/c5471evm/nsh/Make.defs
index 41fa4b2f25a6652100cdea4b890bdbc4b11720ed..a9cf4c6de9a326e04017308eb5e772586e5379eb 100644
--- a/configs/c5471evm/nsh/Make.defs
+++ b/configs/c5471evm/nsh/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(HOSTOS),Cygwin)
 endif
 endif
 
-ifeq ("${CONFIG_DEBUG}","y")
+ifeq ("${CONFIG_DEBUG_FEATURES}","y")
   ARCHOPTIMIZATION = -g
 endif
 
@@ -86,7 +86,7 @@ else
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
@@ -115,7 +115,7 @@ EXEEXT =
 ifneq ($(CROSSDEV),arm-nuttx-elf-)
   LDFLAGS += -nostartfiles -nodefaultlibs
 endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
   LDFLAGS += -g
 endif
 
diff --git a/configs/c5471evm/nsh/defconfig b/configs/c5471evm/nsh/defconfig
index fe48c98b95b28e9dc0a64502ae21d233e3085ec1..9d5b54ca3cece6da04617cbc6495297f4fce008c 100644
--- a/configs/c5471evm/nsh/defconfig
+++ b/configs/c5471evm/nsh/defconfig
@@ -37,14 +37,16 @@ CONFIG_RRLOAD_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 CONFIG_ARCH_CHIP_C5471=y
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -93,7 +97,9 @@ CONFIG_ARCH_CHIP_C5471=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_ARM926EJS is not set
@@ -104,10 +110,21 @@ CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="c5471"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 # CONFIG_ARCH_LOWVECTORS is not set
 
@@ -149,6 +166,7 @@ CONFIG_C5471_PHY_LU3X31T_T64=y
 CONFIG_C5471_AUTONEGOTIATION=y
 # CONFIG_C5471_BASET100 is not set
 # CONFIG_C5471_BASET10 is not set
+CONFIG_C5471_HPWORK=y
 
 #
 # Architecture Options
@@ -161,6 +179,7 @@ CONFIG_C5471_AUTONEGOTIATION=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -215,11 +234,11 @@ CONFIG_ARCH_BOARD="c5471evm"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -238,6 +257,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2007
 CONFIG_START_MONTH=2
@@ -292,6 +312,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -300,12 +321,17 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -323,6 +349,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=4096
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -338,12 +365,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0"
@@ -352,8 +383,28 @@ CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0"
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_NETDEVICES is not set
@@ -363,9 +414,10 @@ CONFIG_NETDEV_TELNET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -389,10 +441,6 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 CONFIG_OTHER_UART_SERIALDRIVER=y
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -401,19 +449,26 @@ CONFIG_MCU_SERIAL=y
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_OTHER_SERIAL_CONSOLE=y
 # CONFIG_NO_SERIAL_CONSOLE is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -421,13 +476,11 @@ CONFIG_OTHER_SERIAL_CONSOLE=y
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -551,12 +604,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -575,6 +622,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -600,6 +651,8 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -614,7 +667,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
 CONFIG_NETDB_DNSCLIENT=y
 CONFIG_NETDB_DNSCLIENT_ENTRIES=4
@@ -627,8 +681,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -647,17 +703,19 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -667,41 +725,45 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -713,8 +775,9 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -727,25 +790,27 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -763,6 +828,7 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
 # CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
@@ -788,13 +854,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -804,6 +870,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -811,6 +878,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -836,6 +904,7 @@ CONFIG_NSH_FILEIOSIZE=1024
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -864,6 +933,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
 CONFIG_NSH_TELNETD_CLIENTPRIO=100
 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
 CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 # CONFIG_NSH_TELNET_LOGIN is not set
 
 #
@@ -878,13 +949,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -893,5 +963,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/cc3200-launchpad/include/board.h b/configs/cc3200-launchpad/include/board.h
index b55819d0b28fbdad221fbf60e595f1914c1d0ffb..540eb03190b5ac41d6b623c329fa1e5e76eea159 100644
--- a/configs/cc3200-launchpad/include/board.h
+++ b/configs/cc3200-launchpad/include/board.h
@@ -192,60 +192,5 @@
 
 void tiva_boardinitialize(void);
 
-/************************************************************************************
- * Name: up_buttoninit
- *
- * Description:
- *   up_buttoninit() must be called to initialize button resources.  After that,
- *   up_buttons() may be called to collect the current state of all buttons or
- *   up_irqbutton() may be called to register button interrupt handlers.
- *
- ************************************************************************************/
-
-#ifdef CONFIG_ARCH_BUTTONS
-void up_buttoninit(void);
-
-/************************************************************************************
- * Name: up_buttons
- *
- * Description:
- *   up_buttoninit() must be called to initialize button resources.  After that,
- *   up_buttons() may be called to collect the current state of all buttons.
- *
- *   After up_buttoninit() has been called, up_buttons() may be called to collect
- *   the state of all buttons.  up_buttons() returns an 8-bit bit set with each bit
- *   associated with a button.  See the BOARD_BUTTON_*_BIT and BOARD_JOYSTICK_*_BIT
- *   definitions above for the meaning of each bit.
- *
- ************************************************************************************/
-
-uint8_t up_buttons(void);
-
-/************************************************************************************
- * Button support.
- *
- * Description:
- *   up_buttoninit() must be called to initialize button resources.  After that,
- *   up_irqbutton() may be called to register button interrupt handlers.
- *
- *   up_irqbutton() may be called to register an interrupt handler that will be called
- *   when a button is depressed or released.  The ID value is a button enumeration
- *   value that uniquely identifies a button resource. See the BOARD_BUTTON_* and
- *   BOARD_JOYSTICK_* definitions in above for the meaning of enumeration values
- *   The previous interrupt handler address is returned (so that it may restored, if
- *   so desired).
- *
- *   Note that up_irqbutton() also enables button interrupts.  Button interrupts
- *   will remain enabled after the interrupt handler is attached. Interrupts may
- *   be disabled (and detached) by calling up_irqbutton with irqhandler equal to
- *   NULL.
- *
- ************************************************************************************/
-
-#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ)
-xcpt_t up_irqbutton(int id, xcpt_t irqhandler);
-#endif
-#endif /* CONFIG_ARCH_BUTTONS */
-
 #endif /* __ASSEMBLY__ */
 #endif  /* __CONFIGS_CC3200_LAUNCHPAD_INCLUDE_BOARD_H */
diff --git a/configs/cc3200-launchpad/nsh/Make.defs b/configs/cc3200-launchpad/nsh/Make.defs
index cfd7bd2380187b6b79fc7613d814ef24478a1957..42caa758dc5ac60c867c3ed6b9c982a454825a10 100644
--- a/configs/cc3200-launchpad/nsh/Make.defs
+++ b/configs/cc3200-launchpad/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/cc3200-launchpad/nsh/defconfig b/configs/cc3200-launchpad/nsh/defconfig
index 68c1a21f1c547fcb72108ff4f6bfb47917b968df..f75cd7bab8276dcbab1c49aadf3ba3b8b82fab3d 100644
--- a/configs/cc3200-launchpad/nsh/defconfig
+++ b/configs/cc3200-launchpad/nsh/defconfig
@@ -37,12 +37,15 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
@@ -57,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -70,13 +72,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
 CONFIG_ARCH_CHIP_TIVA=y
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -85,65 +89,137 @@ CONFIG_ARCH_CHIP_TIVA=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
 CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="tiva"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 CONFIG_ARMV7M_USEBASEPRI=y
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
 CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
 # CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
 # ARMV7M Configuration Options
 #
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
 CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
 
 #
 # Tiva/Stellaris Configuration Options
 #
 # CONFIG_ARCH_CHIP_TM4C123GH6ZRB is not set
 # CONFIG_ARCH_CHIP_TM4C123GH6PMI is not set
+# CONFIG_ARCH_CHIP_TM4C1294NC is not set
+# CONFIG_ARCH_CHIP_TM4C129XNC is not set
 CONFIG_ARCH_CHIP_CC3200=y
 CONFIG_TIVA_BOARD_EARLYINIT=y
 
 #
 # Tiva/Stellaris Peripheral Support
 #
+# CONFIG_TIVA_ADC is not set
+# CONFIG_TIVA_HAVE_ADC0 is not set
+# CONFIG_TIVA_HAVE_ADC1 is not set
+# CONFIG_TIVA_I2C is not set
+CONFIG_TIVA_HAVE_I2C1=y
+# CONFIG_TIVA_HAVE_I2C2 is not set
+# CONFIG_TIVA_HAVE_I2C3 is not set
+# CONFIG_TIVA_HAVE_I2C4 is not set
+# CONFIG_TIVA_HAVE_I2C5 is not set
+# CONFIG_TIVA_HAVE_I2C6 is not set
+# CONFIG_TIVA_HAVE_I2C7 is not set
+# CONFIG_TIVA_HAVE_I2C8 is not set
+# CONFIG_TIVA_HAVE_I2C9 is not set
+# CONFIG_TIVA_HAVE_UART3 is not set
+# CONFIG_TIVA_HAVE_UART4 is not set
+# CONFIG_TIVA_HAVE_UART5 is not set
+# CONFIG_TIVA_HAVE_UART6 is not set
+# CONFIG_TIVA_HAVE_UART7 is not set
+# CONFIG_TIVA_HAVE_SSI0 is not set
+# CONFIG_TIVA_HAVE_SSI1 is not set
+# CONFIG_TIVA_HAVE_SSI2 is not set
+# CONFIG_TIVA_HAVE_SSI3 is not set
+# CONFIG_TIVA_HAVE_ETHERNET is not set
+# CONFIG_TIVA_SSI is not set
+# CONFIG_TIVA_TIMER is not set
+# CONFIG_TIVA_HAVE_TIMER0 is not set
+# CONFIG_TIVA_HAVE_TIMER1 is not set
+# CONFIG_TIVA_HAVE_TIMER2 is not set
+# CONFIG_TIVA_HAVE_TIMER3 is not set
+# CONFIG_TIVA_HAVE_TIMER4 is not set
+# CONFIG_TIVA_HAVE_TIMER5 is not set
+# CONFIG_TIVA_HAVE_TIMER6 is not set
+# CONFIG_TIVA_HAVE_TIMER7 is not set
+# CONFIG_TIVA_ADC0 is not set
+# CONFIG_TIVA_I2C0 is not set
+# CONFIG_TIVA_I2C1 is not set
 CONFIG_TIVA_UART0=y
 # CONFIG_TIVA_UART1 is not set
 # CONFIG_TIVA_UART2 is not set
-# CONFIG_TIVA_SSI0 is not set
-# CONFIG_TIVA_SSI1 is not set
-# CONFIG_TIVA_ETHERNET is not set
 # CONFIG_TIVA_FLASH is not set
 
 #
-# Disable GPIO Interrupts
-#
-CONFIG_TIVA_GPIOA_IRQS=y
-CONFIG_TIVA_GPIOB_IRQS=y
-CONFIG_TIVA_GPIOC_IRQS=y
-CONFIG_TIVA_GPIOD_IRQS=y
-CONFIG_TIVA_GPIOE_IRQS=y
-# CONFIG_TIVA_GPIOF_IRQS is not set
-# CONFIG_TIVA_GPIOG_IRQS is not set
-# CONFIG_TIVA_GPIOH_IRQS is not set
-# CONFIG_TIVA_GPIOJ_IRQS is not set
+# Enable GPIO Interrupts
+#
+# CONFIG_TIVA_GPIO_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOA_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOB_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOC_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOD_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOE_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOF_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOG_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOH_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOJ_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOK_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOL_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOM_IRQS is not set
+# CONFIG_TIVA_HAVE_GPION_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOP_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOQ_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOR_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOS_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOT_IRQS is not set
 
 #
 # Architecture Options
@@ -156,11 +232,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 CONFIG_ARCH_IRQPRIO=y
 # CONFIG_ARCH_STACKDUMP is not set
@@ -220,6 +299,7 @@ CONFIG_NSH_MMCSDMINOR=0
 #
 # Board-Specific Options
 #
+# CONFIG_LIB_BOARDCTL is not set
 
 #
 # RTOS Features
@@ -249,11 +329,13 @@ CONFIG_PREALLOC_TIMERS=2
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=100
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=8
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -304,6 +386,14 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=32
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
 
 #
 # Stack and heap information
@@ -330,29 +420,51 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
-# CONFIG_TIMER is not set
 # CONFIG_ANALOG is not set
 # CONFIG_AUDIO_DEVICES is not set
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -375,13 +487,15 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART6_SERIALDRIVER is not set
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
 
 #
@@ -395,20 +509,23 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -434,13 +551,17 @@ CONFIG_UART0_2STOP=0
 # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
 CONFIG_FS_READABLE=y
 # CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 CONFIG_FS_BINFS=y
 CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
 
 #
 # Exclude individual procfs entries
@@ -448,12 +569,7 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
 # CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
 # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -474,7 +590,12 @@ CONFIG_MM_REGIONS=2
 # CONFIG_AUDIO is not set
 
 #
-# Binary Formats
+# Wireless Support
+#
+# CONFIG_WIRELESS is not set
+
+#
+# Binary Loader
 #
 # CONFIG_BINFMT_DISABLE is not set
 # CONFIG_BINFMT_EXEPATH is not set
@@ -499,6 +620,7 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -511,14 +633,18 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_PERROR_STDOUT is not set
 CONFIG_ARCH_LOWPUTC=y
 # CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -537,11 +663,14 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=512
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -549,11 +678,11 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -561,75 +690,79 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=512
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
 #
 # CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
 
 #
 # Interpreters
 #
+# CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
 # CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -639,7 +772,6 @@ CONFIG_NSH_READLINE=y
 CONFIG_NSH_LINELEN=64
 # CONFIG_NSH_DISABLE_SEMICOLON is not set
 CONFIG_NSH_CMDPARMS=y
-CONFIG_NSH_TMPDIR="/tmp"
 CONFIG_NSH_MAXARGUMENTS=6
 CONFIG_NSH_ARGCAT=y
 CONFIG_NSH_NESTDEPTH=3
@@ -650,13 +782,16 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
 # CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -665,8 +800,10 @@ CONFIG_NSH_BUILTIN_APPS=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_IFUPDOWN is not set
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -674,6 +811,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -683,8 +821,10 @@ CONFIG_NSH_BUILTIN_APPS=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
@@ -712,6 +852,8 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 # CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -725,112 +867,19 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# EMACS-like Command Line Editor
-#
 # CONFIG_SYSTEM_CLE is not set
-
-#
-# FLASH Program Installation
-#
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# Intel HEX to binary conversion
-#
-# CONFIG_SYSTEM_HEX2BIN is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-
-#
-# P-Code Support
-#
-
-#
-# PHY Tool
-#
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sudoku
-#
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-
-#
-# Sysinfo
-#
-
-#
-# VI Work-Alike Editor
-#
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# USB Monitor
-#
-
-#
-# Zmodem Commands
-#
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/cc3200-launchpad/src/cc3200_autoleds.c b/configs/cc3200-launchpad/src/cc3200_autoleds.c
index 01c944eb522e174e1648e14fcc72033141e7396e..26ac6a8aaf5f77e42a47142c87aa368328ae2cab 100644
--- a/configs/cc3200-launchpad/src/cc3200_autoleds.c
+++ b/configs/cc3200-launchpad/src/cc3200_autoleds.c
@@ -87,35 +87,15 @@
  * LED_PANIC         4      ON   OFF   OFF (flashing 2Hz)
  */
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#ifdef CONFIG_DEBUG_LEDS
+#ifdef CONFIG_DEBUG_LEDS_INFO
 #  define led_dumpgpio(m) lm_dumpgpio(LED_GPIO, m)
 #else
 #  define led_dumpgpio(m)
 #endif
 
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/cc3200-launchpad/src/cc3200_boot.c b/configs/cc3200-launchpad/src/cc3200_boot.c
index cf644905e0f10f176b57b5fb59be1be86b175619..841f40eca7c72ed0a3b8e0abc68b248a86d62b1e 100644
--- a/configs/cc3200-launchpad/src/cc3200_boot.c
+++ b/configs/cc3200-launchpad/src/cc3200_boot.c
@@ -2,12 +2,14 @@
  * configs/cc3200-launchpad/src/cc3200_boot.c
  *
  *   Copyright (C) 2014 Droidifi LLC. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt.
  *   Author: Jim Ewing 
+ *           Gregory Nutt 
  *
- *   Adapted for the cc3200 from code:
+ * Adapted for the cc3200 from code:
  *
- *   Copyright (C) Gregory Nutt.
- *   Gregory Nutt 
+ *   Copyright (C) 2014 Gregory Nutt.
+ *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -48,7 +50,6 @@
 #include 
 #include 
 #include 
-#include 
 
 #include "cc3200_launchpad.h"
 
@@ -56,13 +57,8 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
+#define CC3200_SRAM1_BASE 0x20000000
+#define CC3200_SRAM1_SIZE 0x4000
 
 /****************************************************************************
  * Public Functions
@@ -133,13 +129,8 @@ void tiva_boardinitialize(void)
  ****************************************************************************/
 
 #if CONFIG_MM_REGIONS > 1
-
-#define CC3200_SRAM1_BASE 0x20000000
-#define CC3200_SRAM1_SIZE 0x4000
-
 void up_addregion(void)
 {
   kumm_addregion((FAR void*)CC3200_SRAM1_BASE, CC3200_SRAM1_SIZE);
 }
-
 #endif
diff --git a/configs/cc3200-launchpad/src/cc3200_launchpad.h b/configs/cc3200-launchpad/src/cc3200_launchpad.h
index 9f9c77dc68c3d566777826e6fb158bdebb6a0270..b54180bf3a4bc2f40165a91049428609d9e7b11e 100644
--- a/configs/cc3200-launchpad/src/cc3200_launchpad.h
+++ b/configs/cc3200-launchpad/src/cc3200_launchpad.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/cc3200-launchpad/src/cc3200_launchpad.h
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -71,6 +71,12 @@ void cc3200_uart_init(void);
 
 void cc3200_led_init(void);
 
+/****************************************************************************
+ * Name: cc3200_led_initialize
+ ****************************************************************************/
+
+void cc3200_led_initialize(void);
+
 /****************************************************************************
  * Name: cc3200_ledon
  ****************************************************************************/
diff --git a/configs/cc3200-launchpad/src/cc3200_leds.c b/configs/cc3200-launchpad/src/cc3200_leds.c
index e8e231113fb988d007689ce277df339884c66273..30afc10229643ff8d8f419f8d4d2c02f8a5db5d8 100644
--- a/configs/cc3200-launchpad/src/cc3200_leds.c
+++ b/configs/cc3200-launchpad/src/cc3200_leds.c
@@ -1,3 +1,41 @@
+/****************************************************************************
+ * configs/cc3200-launchpad/src/cc3200_leds.c
+ *
+ *   Copyright (C) 2014 Droidifi LLC. All rights reserved.
+ *   Copyright (C) 2016 Gregory Nutt.
+ *   Author: Jim Ewing 
+ *           Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
 #include 
 
 #include 
@@ -18,6 +56,10 @@
 #define LED2_GPIO              10
 #define LED3_GPIO              11
 
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
 /****************************************************************************
  * Name: cc3200_led_initialize
  ****************************************************************************/
@@ -33,7 +75,7 @@ void cc3200_led_initialize(void)
   uint8_t  x=16;
 
   putreg32(getreg32(0x44025000 + 0x00000058) | 0x00000001, 0x44025000 + 0x00000058);
-  while(--x)
+  while (--x)
     ;
 
   cc3200_pin_type_gpio(PIN_01, PIN_MODE_0, false);
diff --git a/configs/cloudctrl/README.txt b/configs/cloudctrl/README.txt
index f98996d214abd6018c3ecd4445c7c7e5977a997e..adce2658bae5b6599a3360f86180ecf1c3111999 100644
--- a/configs/cloudctrl/README.txt
+++ b/configs/cloudctrl/README.txt
@@ -651,7 +651,7 @@ Cloudctrl-specific Configuration Options
     CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
     CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
     CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
-    CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+    CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
       dump of all CAN registers.
 
   Cloudctrl LCD Hardware Configuration
@@ -708,9 +708,9 @@ Cloudctrl-specific Configuration Options
    CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts.  Why would you ever
      want to do that?
    CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
-     debug.  Depends on CONFIG_DEBUG.
+     debug.  Depends on CONFIG_DEBUG_FEATURES.
    CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
-     packets. Depends on CONFIG_DEBUG.
+     packets. Depends on CONFIG_DEBUG_FEATURES.
 
 Configurations
 ==============
diff --git a/configs/cloudctrl/include/board.h b/configs/cloudctrl/include/board.h
index 474caee909f1fdb23a131c10fd841af848d51ddb..14c7fab32f311e799ace1f9784d4e7b3430fa9cc 100644
--- a/configs/cloudctrl/include/board.h
+++ b/configs/cloudctrl/include/board.h
@@ -101,14 +101,14 @@
 #define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd2
 #define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
 
-/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */
+/* APB1 timers 2-7 will be twice PCLK1 */
 
 #define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM5_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM6_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM7_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 
 /* MCO output driven by PLL3. From above, we already have PLL3 input frequency as:
  *
diff --git a/configs/cloudctrl/nsh/Make.defs b/configs/cloudctrl/nsh/Make.defs
index c4fddea57633f5e8f8000db4a52ef5c7eb6be2b4..e2befae18eed0b61cc6193870d3cfcea1914950a 100644
--- a/configs/cloudctrl/nsh/Make.defs
+++ b/configs/cloudctrl/nsh/Make.defs
@@ -82,7 +82,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/cloudctrl/nsh/defconfig b/configs/cloudctrl/nsh/defconfig
index ece509d9cf68897b80398d17df468ade44d0a685..89a90334a88e931f06f71e2accf954906c1a027e 100644
--- a/configs/cloudctrl/nsh/defconfig
+++ b/configs/cloudctrl/nsh/defconfig
@@ -46,10 +46,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +65,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +80,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -207,6 +210,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 CONFIG_ARCH_CHIP_STM32F107VC=y
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -337,7 +341,7 @@ CONFIG_STM32_HAVE_TIM4=y
 CONFIG_STM32_HAVE_TIM5=y
 CONFIG_STM32_HAVE_TIM6=y
 CONFIG_STM32_HAVE_TIM7=y
-CONFIG_STM32_HAVE_TIM8=y
+# CONFIG_STM32_HAVE_TIM8 is not set
 # CONFIG_STM32_HAVE_TIM9 is not set
 # CONFIG_STM32_HAVE_TIM10 is not set
 # CONFIG_STM32_HAVE_TIM11 is not set
@@ -354,6 +358,12 @@ CONFIG_STM32_HAVE_ADC2=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -386,6 +396,7 @@ CONFIG_STM32_PWR=y
 CONFIG_STM32_SPI1=y
 # CONFIG_STM32_SPI2 is not set
 # CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SYSCFG=y
 # CONFIG_STM32_TIM1 is not set
 # CONFIG_STM32_TIM2 is not set
 # CONFIG_STM32_TIM3 is not set
@@ -393,7 +404,6 @@ CONFIG_STM32_SPI1=y
 # CONFIG_STM32_TIM5 is not set
 # CONFIG_STM32_TIM6 is not set
 # CONFIG_STM32_TIM7 is not set
-# CONFIG_STM32_TIM8 is not set
 # CONFIG_STM32_USART1 is not set
 CONFIG_STM32_USART2=y
 # CONFIG_STM32_USART3 is not set
@@ -417,20 +427,33 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
 # CONFIG_STM32_TIM5_CAP is not set
-# CONFIG_STM32_TIM8_CAP is not set
 CONFIG_STM32_USART=y
 CONFIG_STM32_SERIALDRIVER=y
 
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -465,6 +488,7 @@ CONFIG_STM32_PHYSR_100FD=0x8000
 CONFIG_STM32_RMII=y
 CONFIG_STM32_RMII_MCO=y
 # CONFIG_STM32_RMII_EXTCLK is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -546,6 +570,7 @@ CONFIG_RAM_SIZE=65536
 CONFIG_ARCH_BOARD_CLOUDCTRL=y
 # CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set
 # CONFIG_ARCH_BOARD_SHENZHOU is not set
+# CONFIG_ARCH_BOARD_STM32_BUTTERFLY2 is not set
 # CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="cloudctrl"
@@ -558,19 +583,15 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=1
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -587,9 +608,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=8
@@ -684,6 +708,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -699,19 +724,25 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 # CONFIG_RTC_DATETIME is not set
 # CONFIG_RTC_HIRES is not set
@@ -724,8 +755,18 @@ CONFIG_RTC=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -733,6 +774,7 @@ CONFIG_RTC=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -766,10 +808,9 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -793,9 +834,10 @@ CONFIG_ETH0_PHY_DM9161=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -842,19 +884,26 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -862,13 +911,11 @@ CONFIG_USART2_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -1008,12 +1055,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1063,6 +1104,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1080,7 +1123,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
@@ -1097,8 +1139,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1129,21 +1173,23 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1153,26 +1199,25 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1180,11 +1225,10 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
 #
@@ -1209,8 +1253,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1223,22 +1268,22 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1291,13 +1336,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1315,6 +1360,9 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=1
 
 #
 # Configure Command Options
@@ -1340,6 +1388,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1384,12 +1433,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1398,6 +1447,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/cloudctrl/src/cloudctrl.h b/configs/cloudctrl/src/cloudctrl.h
index 44042435af10cda898c53e0ad50c074677d2d2c1..57f1847d8506b587ad7d5279ac7e5477496614ab 100644
--- a/configs/cloudctrl/src/cloudctrl.h
+++ b/configs/cloudctrl/src/cloudctrl.h
@@ -1,8 +1,7 @@
 /****************************************************************************************************
  * configs/cloudctrl/src/cloudctrl.h
- * arch/arm/src/board/cloudctrl.n
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *           Darcy Gong 
  *
@@ -255,6 +254,18 @@ void weak_function stm32_usbinitialize(void);
 int stm32_usbhost_initialize(void);
 #endif
 
+/************************************************************************************
+ * Name: stm32_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ADC
+int stm32_adc_setup(void);
+#endif
+
 /****************************************************************************
  * Name: stm32_sdinitialize
  *
diff --git a/configs/cloudctrl/src/stm32_adc.c b/configs/cloudctrl/src/stm32_adc.c
index 9774efba202f08c118e65f85550303a7cfee4003..ba798386d049c5c7f011cf69b6df18235cff0093 100644
--- a/configs/cloudctrl/src/stm32_adc.c
+++ b/configs/cloudctrl/src/stm32_adc.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/cloudctrl/src/stm32_adc.c
  *
- *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *           Darcy Gong 
  *
@@ -105,24 +105,19 @@ static const uint8_t  g_chanlist[ADC1_NCHANNELS] = {10}; //{10, 8, 9};
 static const uint32_t g_pinlist[ADC1_NCHANNELS]  = {GPIO_ADC12_IN10}; //{GPIO_ADC12_IN10, GPIO_ADC12_IN8, GPIO_ADC12_IN9};
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_adc_setup
+ * Name: stm32_adc_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/adc.
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
-int board_adc_setup(void)
+int stm32_adc_setup(void)
 {
 #ifdef CONFIG_STM32_ADC1
   static bool initialized = false;
@@ -146,7 +141,7 @@ int board_adc_setup(void)
       adc = stm32_adcinitialize(1, g_chanlist, ADC1_NCHANNELS);
       if (adc == NULL)
         {
-          adbg("ERROR: Failed to get ADC interface\n");
+          aerr("ERROR: Failed to get ADC interface\n");
           return -ENODEV;
         }
 
@@ -155,7 +150,7 @@ int board_adc_setup(void)
       ret = adc_register("/dev/adc0", adc);
       if (ret < 0)
         {
-          adbg("adc_register failed: %d\n", ret);
+          aerr("ERROR: adc_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/cloudctrl/src/stm32_appinit.c b/configs/cloudctrl/src/stm32_appinit.c
index cc772b5add3c68542b83152031fa26c8ca6c017c..c628bd142ac4d553dde71faf1d9560edf7588767 100644
--- a/configs/cloudctrl/src/stm32_appinit.c
+++ b/configs/cloudctrl/src/stm32_appinit.c
@@ -127,9 +127,7 @@
 
 int board_app_initialize(uintptr_t arg)
 {
-#if defined(HAVE_USBHOST) || defined(HAVE_W25)
   int ret;
-#endif
 
   /* Initialize and register the W25 FLASH file system. */
 
@@ -156,5 +154,17 @@ int board_app_initialize(uintptr_t arg)
     }
 #endif
 
+#ifdef CONFIG_ADC
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = stm32_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_adc_setup failed: %d\n", ret);
+      return ret;
+    }
+#endif
+
+  UNUSED(ret);
   return OK;
 }
diff --git a/configs/cloudctrl/src/stm32_autoleds.c b/configs/cloudctrl/src/stm32_autoleds.c
index 752b00cccf24a289841a950a6a86a8723e21390e..8b91f3699c6af6ee429314a7018ad6859163a022 100644
--- a/configs/cloudctrl/src/stm32_autoleds.c
+++ b/configs/cloudctrl/src/stm32_autoleds.c
@@ -58,18 +58,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* The following definitions map the encoded LED setting to GPIO settings */
 
 #define CLOUDCTRL_LED1     (1 << 0)
diff --git a/configs/cloudctrl/src/stm32_buttons.c b/configs/cloudctrl/src/stm32_buttons.c
index 43a090b05b22ef16c15e0c0a6b8d866a9be36dbe..b62dbeb719c63faa1e6994d155fdf06566e9d0d6 100644
--- a/configs/cloudctrl/src/stm32_buttons.c
+++ b/configs/cloudctrl/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/cloudctrl/src/stm32_buttons.c
  *
- *   Copyright (C) 2012, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *           Darcy Gong 
  *
@@ -41,6 +41,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -151,25 +152,25 @@ uint8_t board_buttons(void)
  *   board_button_irq() may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See
- *   the
- *   BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of
- *   enumeration  value.  The previous interrupt handler address is returned
- *   (so that it may restored, if so desired).
+ *   the BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of
+ *   enumeration  value.
  *
  ****************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   /* The following should be atomic */
 
   if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
     {
-      oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler,
+                               arg);
     }
-  return oldhandler;
+
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/cloudctrl/src/stm32_spi.c b/configs/cloudctrl/src/stm32_spi.c
index 6cabaff272713a069db480c621ae1823f298218b..13054c3165b1bcb45836e22bebd2dbef43afb0aa 100644
--- a/configs/cloudctrl/src/stm32_spi.c
+++ b/configs/cloudctrl/src/stm32_spi.c
@@ -54,32 +54,6 @@
 
 #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI3)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_SPI
-#endif
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -141,7 +115,7 @@ void weak_function stm32_spidev_initialize(void)
 #ifdef CONFIG_STM32_SPI1
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
   /* SPI1 connects to the SD CARD and to the SPI FLASH */
 
@@ -163,7 +137,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI3
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
 }
 
diff --git a/configs/cloudctrl/src/stm32_usb.c b/configs/cloudctrl/src/stm32_usb.c
index 10ecdec7ca1fa0664976e95a72902a1da132fbdc..955377a5dd8cc1d85baa2fe985b427b7653804f2 100644
--- a/configs/cloudctrl/src/stm32_usb.c
+++ b/configs/cloudctrl/src/stm32_usb.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/cloudctrl/src/stm32_usb.c
  *
- *   Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012-2013, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *           Darcy Gong 
  *
@@ -107,13 +107,13 @@ static int usbhost_waiter(int argc, char *argv[])
 {
   struct usbhost_hubport_s *hport;
 
-  uvdbg("Running\n");
+  uinfo("Running\n");
   for (;;)
     {
       /* Wait for the device to change state */
 
       DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
-      uvdbg("%s\n", hport->connected ? "connected" : "disconnected");
+      uinfo("%s\n", hport->connected ? "connected" : "disconnected");
 
       /* Did we just become connected? */
 
@@ -177,7 +177,7 @@ int stm32_usbhost_initialize(void)
    * that we care about:
    */
 
-  uvdbg("Register class drivers\n");
+  uinfo("Register class drivers\n");
 
 #ifdef CONFIG_USBHOST_MSC
   /* Register the USB mass storage class */
@@ -185,7 +185,7 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_msc_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the mass storage class\n");
+      uerr("ERROR: Failed to register the mass storage class\n");
     }
 #endif
 
@@ -195,19 +195,19 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_cdcacm_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the CDC/ACM serial class\n");
+      uerr("ERROR: Failed to register the CDC/ACM serial class\n");
     }
 #endif
 
   /* Then get an instance of the USB host interface */
 
-  uvdbg("Initialize USB host\n");
+  uinfo("Initialize USB host\n");
   g_usbconn = stm32_otgfshost_initialize(0);
   if (g_usbconn)
     {
       /* Start a thread to handle device connection. */
 
-      uvdbg("Start usbhost_waiter\n");
+      uinfo("Start usbhost_waiter\n");
 
       pid = task_create("usbhost", CONFIG_USBHOST_DEFPRIO,
                         CONFIG_USBHOST_STACKSIZE,
@@ -274,16 +274,18 @@ void stm32_usbhost_vbusdrive(int iface, bool enable)
  *
  * Input Parameter:
  *   handler - New overcurrent interrupt handler
+ *   arg     - The argument provided for the interrupt handler
  *
  * Returned value:
- *   Old overcurrent interrupt handler
+ *   Zero (OK) is returned on success.  Otherwise, a negated errno value is returned
+ *   to indicate the nature of the failure.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_USBHOST
-xcpt_t stm32_setup_overcurrent(xcpt_t handler)
+int stm32_setup_overcurrent(xcpt_t handler, void *arg)
 {
-  return NULL;
+  return -ENOSYS;
 }
 #endif
 
@@ -301,11 +303,8 @@ xcpt_t stm32_setup_overcurrent(xcpt_t handler)
 #ifdef CONFIG_USBDEV
 void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
 #endif
 
 #endif /* CONFIG_STM32_OTGFS */
-
-
-
diff --git a/configs/cloudctrl/src/stm32_userleds.c b/configs/cloudctrl/src/stm32_userleds.c
index aadc2ac6db4d9c259ca4b8cc6bbfcf288614d1c6..f2ef6a800a4ba3bed4426a9286e85862723fe401 100644
--- a/configs/cloudctrl/src/stm32_userleds.c
+++ b/configs/cloudctrl/src/stm32_userleds.c
@@ -54,22 +54,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
@@ -80,10 +64,6 @@ static uint32_t g_ledcfg[BOARD_NLEDS] =
   GPIO_LED1, GPIO_LED2, GPIO_LED3, GPIO_LED4
 };
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/cloudctrl/src/stm32_w25.c b/configs/cloudctrl/src/stm32_w25.c
index da059d35b967e51a550cba94924910f7817aee0b..df43ab80456b31ce15ce5ce4833a5616ab60863b 100644
--- a/configs/cloudctrl/src/stm32_w25.c
+++ b/configs/cloudctrl/src/stm32_w25.c
@@ -107,7 +107,7 @@ int stm32_w25initialize(int minor)
   spi = stm32_spibus_initialize(1);
   if (!spi)
     {
-      fdbg("ERROR: Failed to initialize SPI port 2\n");
+      ferr("ERROR: Failed to initialize SPI port 2\n");
       return -ENODEV;
     }
 
@@ -116,7 +116,7 @@ int stm32_w25initialize(int minor)
   mtd = w25_initialize(spi);
   if (!mtd)
     {
-      fdbg("ERROR: Failed to bind SPI port 2 to the SST 25 FLASH driver\n");
+      ferr("ERROR: Failed to bind SPI port 2 to the SST 25 FLASH driver\n");
       return -ENODEV;
     }
 
@@ -126,7 +126,7 @@ int stm32_w25initialize(int minor)
   ret = ftl_initialize(minor, mtd);
   if (ret < 0)
     {
-      fdbg("ERROR: Initialize the FTL layer\n");
+      ferr("ERROR: Initialize the FTL layer\n");
       return ret;
     }
 #else
@@ -135,7 +135,7 @@ int stm32_w25initialize(int minor)
   ret = nxffs_initialize(mtd);
   if (ret < 0)
     {
-      fdbg("ERROR: NXFFS initialization failed: %d\n", -ret);
+      ferr("ERROR: NXFFS initialization failed: %d\n", -ret);
       return ret;
     }
 
@@ -145,7 +145,7 @@ int stm32_w25initialize(int minor)
   ret = mount(NULL, devname, "nxffs", 0, NULL);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
+      ferr("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
       return ret;
     }
 #endif
diff --git a/configs/compal_e86/README.txt b/configs/compal_e86/README.txt
deleted file mode 100644
index 704f2b6b70ef163f238b2b7cd0dee80274fc642c..0000000000000000000000000000000000000000
--- a/configs/compal_e86/README.txt
+++ /dev/null
@@ -1,70 +0,0 @@
-compal_e86
-==========
-
-This directory contains the board support for compal e86 phones. This port
-is tested on the following phone:
-
-* motorola c139 (compal e86) with flash configuration
-
-This port is based on patches contributed by Denis Carikli for both the
-compal e99 and e88. At the time of initial check-in, the following phones
-were tested:
-
-* motorolla c155 (compal e99) with the compalram and highram configuration
-* motorolla W220 (compal e88)
-* The openmoko freerunner baseband(compal e88)
-
-The patches were made by Alan Carvalho de Assis and Denis Carikli using
-the Stefan Richter's patches that can be found here:
-
-http://cgit.osmocom.org/cgit/nuttx-bb/log/?h=lputt%2Ftesting
-
-Osmocom-BB Dependencies and Sercomm
-===================================
-
-The build environment assumes that you have the osmocom-bb project
-directory at same level as the nuttx project:
-
-  |- nuttx
-  |- apps
-  `- osmocom-bb
-
-If you attempt to build this configuration without osmocom-bb, and that
-you added support for sercomm in your configuration(CONFIG_SERCOMM_CONSOLE=y)
-you will get compilation errors in drivers/sercomm due to header files that
-are needed from the osmocom-bb directory.
-
-By default, NuttX will not use sercomm (HDLC protocol) to communicate with
-the host system. Sercomm is the transport used by osmocom-bb that runs on top
-of serial.  See http://bb.osmocom.org/trac/wiki/nuttx-bb/run for detailed
-the usage of nuttx with sercomm.
-
-Running NuttX From Flash
-========================
-
-Flash layout:
-
-0x00000 - 0x02000 - original compal loader
-0x02000 - 0x10000 - simple binary to jump to 0x10000 (jumper.e86loader.bin)
-0x10000 - ???     - NuttX binary (nuttx.bin)
-
-Using osmocon/osmoload, retrieve the compal loader, flash it and the
-jumper.e86loader.bin as well as nuttx.bin.
-
-The jumper app is a modified version of the menu app in osmocom-bb, branch
-jolly/menu. The app disabled irqs (setup by compal loader?) and jumps to
-0x10000. This app is submitted as a patch to osmocom-bb mailing list.
-
-Loading NuttX (highram)
-=======================
-
-The osmocom-bb wiki describes how to load NuttX.  See
-http://bb.osmocom.org/trac/wiki/nuttx-bb for detailed information.
-The way that nuttx is loaded depends on the configuration (highram/compalram)
-and phone:
-
-o compalram is for the ramloader(for phone having a bootloader on flash)
-o highram is for phones having the romloader(if the phone has a bootrom)
-  or for loading in the ram trough a special loader(loaded first on ram
-  by talking to the ramloader) when having a ramloader(which can only
-  load 64k).
diff --git a/configs/compal_e86/include/board.h b/configs/compal_e86/include/board.h
deleted file mode 100644
index 00c96bf6f5698510de7a7281df49324ad2acc928..0000000000000000000000000000000000000000
--- a/configs/compal_e86/include/board.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/****************************************************************************
- * configs/nsh_highram/include/board.h
- *
- * Supposed to be empty
- *
- ****************************************************************************/
diff --git a/configs/compal_e86/nsh_highram/Make.defs b/configs/compal_e86/nsh_highram/Make.defs
deleted file mode 100644
index 2ecbdabf7f2ec1280c8ae46a97926138d0ce9f72..0000000000000000000000000000000000000000
--- a/configs/compal_e86/nsh_highram/Make.defs
+++ /dev/null
@@ -1,140 +0,0 @@
-############################################################################
-# configs/compal_e86/nsh_highram/Make.defs
-#
-#   Copyright (C) 2007, 2008, 2011, 2013 Gregory Nutt. All rights reserved.
-#   Author: Gregory Nutt 
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name NuttX nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-############################################################################
-
-include ${TOPDIR}/.config
-include ${TOPDIR}/tools/Config.mk
-include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs
-
-ifeq ($(CONFIG_BOOT_RUNFROMFLASH),y)
-  LDSCRIPT = flash.ld
-else
-  LDSCRIPT = highram.ld
-endif
-
-ifeq ($(WINTOOL),y)
-  # Windows-native toolchains
-  DIRLINK = $(TOPDIR)/tools/copydir.sh
-  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
-  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
-  ARCHINCLUDES = -I. -I "${shell cygpath -w $(OSMODIR)/src/shared/libosmocore/include}" -isystem "${shell cygpath -w $(TOPDIR)/include}"
-  ARCHXXINCLUDES = -I. -I "${shell cygpath -w $(OSMODIR)/src/shared/libosmocore/include}" -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
-  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
-
-ifeq ("${CONFIG_SERCOMM_CONSOLE}","y")
-  OSMODIR = "${shell cygpath -w $(TOPDIR)/../../osmocom-bb}"
-  EXTRA_LIBS = "${shell cygpath -w $(OSMODIR)/src/target/firmware/comm/libcomm.a}" \
-    "${shell cygpath -w $(OSMODIR)/src/shared/libosmocore/build-target/src/.libs/libosmocore.a}" \
-    "${shell cygpath -w $(OSMODIR)/src/target/firmware/calypso/libcalypso.a}" \
-    "${shell cygpath -w $(OSMODIR)/src/target/firmware/comm/libcomm.a}"
-endif
-else
-  # Linux/Cygwin-native toolchain
-  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
-  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
-  ARCHINCLUDES = -I. -I$(OSMODIR)/src/shared/libosmocore/include -isystem $(TOPDIR)/include
-  ARCHXXINCLUDES = -I. -I$(OSMODIR)/src/shared/libosmocore/include -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
-  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
-
-ifeq ("${CONFIG_SERCOMM_CONSOLE}","y")
-  OSMODIR = $(TOPDIR)/../../osmocom-bb
-  EXTRA_LIBS = $(OSMODIR)/src/target/firmware/comm/libcomm.a \
-    $(OSMODIR)/src/shared/libosmocore/build-target/src/.libs/libosmocore.a \
-    $(OSMODIR)/src/target/firmware/calypso/libcalypso.a \
-    $(OSMODIR)/src/target/firmware/comm/libcomm.a
-  # ^^^ Stupid hack! Why do I have to put it twice???
-endif
-endif
-
-CC = $(CROSSDEV)gcc
-CXX = $(CROSSDEV)g++
-CPP = $(CROSSDEV)gcc -E
-LD = $(CROSSDEV)ld
-AR = $(CROSSDEV)ar rcs
-NM = $(CROSSDEV)nm
-OBJCOPY = $(CROSSDEV)objcopy
-OBJDUMP = $(CROSSDEV)objdump
-
-ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
-ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
-
-ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
-  ARCHOPTIMIZATION	= -g
-endif
-
-ifneq ($(CONFIG_DEBUG_NOOPT),y)
-  ARCHOPTIMIZATION	+= $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
-endif
-
-ifeq ($(ARCHCCMAJOR),4)
-  ARCHCPUFLAGS = -mcpu=arm7tdmi -mfloat-abi=soft -fno-builtin
-else
-  ARCHCPUFLAGS = -mapcs-32 -mcpu=arm7tdmi -msoft-float -fno-builtin
-endif
-
-ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
-ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
-ARCHWARNINGSXX = -Wall -Wshadow -Wundef
-ARCHDEFINES =
-ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
-
-CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
-CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
-CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
-CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
-CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
-AFLAGS = $(CFLAGS) -D__ASSEMBLY__
-
-NXFLATLDFLAGS1 = -r -d -warn-common
-NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
-LDNXFLATFLAGS = -e main -s 2048
-
-ASMEXT = .S
-OBJEXT = .o
-LIBEXT = .a
-EXEEXT =
-
-ifneq ($(CROSSDEV),arm-nuttx-elf-)
-  LDFLAGS += -nostartfiles -nodefaultlibs
-endif
-
-ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
-  LDFLAGS += -g
-endif
-
-HOSTCC = gcc
-HOSTINCLUDES = -I.
-HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
-HOSTLDFLAGS =
diff --git a/configs/compal_e86/scripts/flash.ld b/configs/compal_e86/scripts/flash.ld
deleted file mode 100644
index 73c72f00cee957189b68d35e81f732caefdaa2b0..0000000000000000000000000000000000000000
--- a/configs/compal_e86/scripts/flash.ld
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * Linker script for flashed applications on the Compal E86
- *
- * This script creates a binary that can be linked at 0xFFFF, starting
- * with the second flash page. This is what a phone application or
- * pure layer1 device uses.
- *
- * XXX: interrupts?
- *
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-MEMORY
-{
-    LOADR (rx) : ORIGIN = 0x00000000, LENGTH = 0x10000
-    /* 4 MBytes of external flash memory (minus loader) */
-    FLASH (rx) : ORIGIN = 0x00010000, LENGTH = 0x3F0000
-    /* 256 kBytes of internal zero-waitstate sram */
-    IRAM  (rw) : ORIGIN = 0x00800000, LENGTH = 0x040000
-    /* 256 kBytes of external slow sram */
-    ERAM  (rw) : ORIGIN = 0x01000000, LENGTH = 0x040000
-}
-SECTIONS
-{
-    /* entrypoint */
-    .text.start : {
-        PROVIDE(_start = .);
-        KEEP(*(.text.start))
-        *(.text.start)
-    } > FLASH
-
-    /* exception vectors from 0x80001c to 0x800034 */
-    .text.exceptions 0x80001c : {
-        KEEP(*(.text.exceptions))
-        * (.text.exceptions)
-        . = ALIGN(4);
-    } > IRAM AT> FLASH
-    PROVIDE(_exceptions = LOADADDR(.text.exceptions));
-
-    /* code */
-    .text : {
-    _stext = ABSOLUTE(.) ;
-        /* regular code */
-        *(.text*)
-        /* gcc voodoo */
-        *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx)
-    _etext = ABSOLUTE(.) ;
-    } > FLASH
-    PROVIDE(_text_start = ADDR(.text));
-    PROVIDE(_text_end = ADDR(.text) + SIZEOF(.text));
-
-    /* constructor pointers */
-    .ctors : {
-        /* ctor count */
-        LONG(SIZEOF(.ctors) / 4 - 2)
-        /* ctor pointers */
-        KEEP(*(SORT(.ctors)))
-        /* end of list */
-        LONG(0)
-    } > FLASH
-    PROVIDE(_ctor_start = LOADADDR(.ctors));
-    PROVIDE(_ctor_end = LOADADDR(.ctors) + SIZEOF(.ctors));
-
-    /* destructor pointers */
-    .dtors : {
-        /* dtor count */
-        LONG(SIZEOF(.dtors) / 4 - 2)
-        /* dtor pointers */
-        KEEP(*(SORT(.dtors)))
-        /* end of list */
-        LONG(0)
-    } > FLASH
-    PROVIDE(_dtor_start = LOADADDR(.dtors));
-    PROVIDE(_dtor_end = LOADADDR(.dtors) + SIZEOF(.dtors));
-
-    /* read-only data */
-    .rodata : {
-        *(.rodata*)
-    _eronly = ABSOLUTE(.) ;
-    } > FLASH
-    PROVIDE(_rodata_start = ADDR(.rodata));
-    PROVIDE(_rodata_end = ADDR(.rodata) + SIZEOF(.rodata));
-
-    /* pic offset tables */
-    .got : {
-        . = ALIGN(4);
-        *(.got)
-        *(.got.plt) *(.igot.plt) *(.got) *(.igot)
-        . = ALIGN(4);
-    } > FLASH
-    PROVIDE(_got_start = ADDR(.got));
-    PROVIDE(_got_end = ADDR(.got) + SIZEOF(.got));
-
-    /* reserved ram  */
-    .compal.reservedram 0x800000 (NOLOAD) : {
-        . = 0xff;
-    } > IRAM
-
-    /* initialized data */
-    .data : AT (LOADADDR(.got) + SIZEOF(.got)) {
-        . = ALIGN(4);
-    _sdata = ABSOLUTE(.);
-        *(.data)
-    _edata = ABSOLUTE(.);
-        . = ALIGN(4);
-    } > IRAM
-    PROVIDE(__data_start = LOADADDR(.data));
-    PROVIDE(__data_end = LOADADDR(.data) + SIZEOF(.data));
-    PROVIDE(_data_start = ADDR(.data));
-    PROVIDE(_data_end = ADDR(.data) + SIZEOF(.data));
-
-    /* ram code */
-    .ramtext : AT (LOADADDR(.data) + SIZEOF(.data)) {
-        . = ALIGN(4);
-        *(.ramtext)
-        . = ALIGN(4);
-    } > IRAM
-    PROVIDE(__ramtext_start = LOADADDR(.ramtext));
-    PROVIDE(__ramtext_end = LOADADDR(.ramtext) + SIZEOF(.ramtext));
-    PROVIDE(_ramtext_start = ADDR(.ramtext));
-    PROVIDE(_ramtext_end = ADDR(.ramtext) + SIZEOF(.ramtext));
-
-    /* uninitialized data */
-    .bss (NOLOAD) : {
-        . = ALIGN(4);
-    _sbss = ABSOLUTE(.);
-        *(.bss)
-    _ebss = ABSOLUTE(.);
-        . = ALIGN(4);
-    } > IRAM
-    PROVIDE(__bss_start = ADDR(.bss));
-    PROVIDE(__bss_end = ADDR(.bss) + SIZEOF(.bss));
-    PROVIDE(_bss_start = __bss_start);
-    PROVIDE(_bss_end = __bss_end);
-
-    /* end of image */
-    . = ALIGN(4);
-    _end = .;
-    PROVIDE(end = .);
-}
diff --git a/configs/compal_e86/scripts/highram.ld b/configs/compal_e86/scripts/highram.ld
deleted file mode 100644
index 429ef2b502580493dd255fd7f7b155007a4291ba..0000000000000000000000000000000000000000
--- a/configs/compal_e86/scripts/highram.ld
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * Linker script for running from internal SRAM on Compal phones
- *
- * This script is tailored specifically to the requirements imposed
- * on us by the Compal bootloader.
- *
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(__start)
-MEMORY
-{
-
-/* E86 stacked flash 32mbit flash, 4mbit sram, DBB internal 256kb SRAM */
-    /* 0x800000-0x87ffff */ /* bump up because we have 32mbit instead of 16mbit */
-    /* compal-loaded binary: our text, initialized data */
-    LRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00020000
-    TRAM (rw) : ORIGIN = 0x00820000, LENGTH = 0x00040000
-    /* compal-loaded binary: our unitialized data, stacks, heap */
-    IRAM (rw) : ORIGIN = 0x00860000, LENGTH = 0x00020000
-
-/* E88 NOR flash 16mbits, SRAM 256 kb, DBB has 256kb internal SRAM */
-    /* 0x800000-0x83ffff */
-    /* compal-loaded binary: our text, initialized data */
-/*
-    LRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00020000
-    TRAM (rw) : ORIGIN = 0x00820000, LENGTH = 0x00010000
-*/
-    /* compal-loaded binary: our unitialized data, stacks, heap */
-/*
-    IRAM (rw) : ORIGIN = 0x00830000, LENGTH = 0x00010000
-*/
-}
-SECTIONS
-{
-    . = 0x800000;
-
-    /* romloader data section, contains passthru interrupt vectors */
-    .compal.loader (NOLOAD) : { . = 0x100; } > LRAM
-
-    /* image signature (prepended by osmocon according to phone type) */
-    .compal.header (NOLOAD) : { . = 4; } > LRAM
-
-    /* initialization code */
-    . = ALIGN(4);
-    .text.start : {
-        PROVIDE(__start = .);
-        KEEP(*(.text.start))
-        *(.text.start)
-    } > TRAM
-
-    /* exception vectors from 0x80001c to 0x800034 */
-    .text.exceptions 0x80001c : AT (LOADADDR(.text.start) + SIZEOF(.text.start)) {
-        KEEP(*(.text.exceptions))
-        * (.text.exceptions)
-        . = ALIGN(4);
-    } > LRAM
-    PROVIDE(_exceptions = LOADADDR(.text.exceptions));
-
-    /* code */
-    . = ALIGN(4);
-    .text (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) :
-          AT (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) {
-        /* regular code */
-        *(.text*)
-        /* always-in-ram code */
-        *(.ramtext*)
-        /* gcc voodoo */
-        *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx)
-        . = ALIGN(4);
-    } > TRAM
-    PROVIDE(_text_start = LOADADDR(.text));
-    PROVIDE(_text_end = LOADADDR(.text) + SIZEOF(.text));
-
-    /* constructor pointers */
-    .ctors : {
-        /* ctor count */
-        LONG(SIZEOF(.ctors) / 4 - 2)
-        /* ctor pointers */
-        KEEP(*(SORT(.ctors)))
-        /* end of list */
-        LONG(0)
-    } > TRAM
-    PROVIDE(_ctor_start = LOADADDR(.ctors));
-    PROVIDE(_ctor_end = LOADADDR(.ctors) + SIZEOF(.ctors));
-
-    /* destructor pointers */
-    .dtors : {
-        /* dtor count */
-        LONG(SIZEOF(.dtors) / 4 - 2)
-        /* dtor pointers */
-        KEEP(*(SORT(.dtors)))
-        /* end of list */
-        LONG(0)
-    } > TRAM
-    PROVIDE(_dtor_start = LOADADDR(.dtors));
-    PROVIDE(_dtor_end = LOADADDR(.dtors) + SIZEOF(.dtors));
-
-    /* read-only data */
-    . = ALIGN(4);
-    .rodata : {
-        *(.rodata*)
-    } > TRAM
-    PROVIDE(_rodata_start = LOADADDR(.rodata));
-    PROVIDE(_rodata_end = LOADADDR(.rodata) + SIZEOF(.rodata));
-
-    /* initialized data */
-    . = ALIGN(4);
-    .data : {
-        *(.data)
-    } > TRAM
-    PROVIDE(_data_start = LOADADDR(.data));
-    PROVIDE(_data_end = LOADADDR(.data) + SIZEOF(.data));
-
-    /* pic offset tables */
-    . = ALIGN(4);
-    .got : {
-        *(.got)
-        *(.got.plt) *(.igot.plt) *(.got) *(.igot)
-    } > TRAM
-    PROVIDE(_got_start = LOADADDR(.got));
-    PROVIDE(_got_end = LOADADDR(.got) + SIZEOF(.got));
-
-    /* uninitialized data */
-    .bss (NOLOAD) : {
-        . = ALIGN(4);
-        __bss_start = .;
-        _sbss = ABSOLUTE(.);
-        *(.bss)
-        _ebss = ABSOLUTE(.);
-    } > IRAM
-    . = ALIGN(4);
-    __bss_end = .;
-    PROVIDE(_bss_start = __bss_start);
-    PROVIDE(_bss_end = __bss_end);
-
-    /* end of image */
-    . = ALIGN(4);
-    _end = .;
-    PROVIDE(end = .);
-}
diff --git a/configs/compal_e88/README.txt b/configs/compal_e88/README.txt
deleted file mode 100644
index 1dfefc74669d6f331a03652c1a6504ccbb11bafb..0000000000000000000000000000000000000000
--- a/configs/compal_e88/README.txt
+++ /dev/null
@@ -1,52 +0,0 @@
-compal_e88
-==========
-
-This directory contains the board support for compal e88 phones.
-
-This port is based on patches contributed by Denis Carikli for both the
-compal e99 and e88. At the time of initial check-in, the following phones
-were tested:
-
-* Motorola c155 (compal e99) with the compalram and highram configuration
-* Motorola W220 (compal e88)
-* The openmoko freerunner baseband(compal e88)
-
-The patches were made by Alan Carvalho de Assis and Denis Carikli using
-the Stefan Richter's patches that can be found here:
-
-http://cgit.osmocom.org/cgit/nuttx-bb/log/?h=lputt%2Ftesting
-
-Osmocom-BB Dependencies and Sercomm
-===================================
-
-The build environment assumes that you have the osmocom-bb project
-directory at same level as the nuttx project:
-
-  |- nuttx
-  |- apps
-  `- osmocom-bb
-
-If you attempt to build this configuration without osmocom-bb, and that
-you added support for sercomm in your configuration(CONFIG_SERCOMM_CONSOLE=y)
-you will get compilation errors in drivers/sercomm due to header files that
-are needed from the osmocom-bb directory.
-
-By default, NuttX will not use sercomm (HDLC protocol) to communicate with
-the host system. Sercomm is the transport used by osmocom-bb that runs on top
-of serial.  See http://bb.osmocom.org/trac/wiki/nuttx-bb/run for detailed
-the usage of nuttx with sercomm.
-
-Loading NuttX
-=============
-
-The osmocom-bb wiki describes how to load NuttX.  See
-http://bb.osmocom.org/trac/wiki/nuttx-bb for detailed information.
-The way that nuttx is loaded depends on the configuration (highram/compalram)
-and phone:
-
-o compalram is for the ramloader(for phone having a bootloader on flash)
-o highram is for phones having the romloader(if the phone has a bootrom)
-  or for loading in the ram trough a special loader(loaded first on ram
-  by talking to the ramloader) when having a ramloader(which can only
-  load 64k).
-
diff --git a/configs/compal_e88/include/board.h b/configs/compal_e88/include/board.h
deleted file mode 100644
index 5855614184f903ced3811fc4d695d505df80d09c..0000000000000000000000000000000000000000
--- a/configs/compal_e88/include/board.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/****************************************************************************
- * arch/board.h
- *
- * Supposed to be empty
- *
- ****************************************************************************/
diff --git a/configs/compal_e88/scripts/ld.script b/configs/compal_e88/scripts/ld.script
deleted file mode 100644
index 35fa847284ed8c02d05d01a5f97086e817f08f69..0000000000000000000000000000000000000000
--- a/configs/compal_e88/scripts/ld.script
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * Linker script for running from internal SRAM on Compal phones
- *
- * This script is tailored specifically to the requirements imposed
- * on us by the Compal bootloader.
- *
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(__start)
-MEMORY
-{
-    /* 0x800000-0x83ffff */
-    /* compal-loaded binary: our text, initialized data */
-    LRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00020000
-    TRAM (rw) : ORIGIN = 0x00820000, LENGTH = 0x00010000
-    /* compal-loaded binary: our unitialized data, stacks, heap */
-    IRAM (rw) : ORIGIN = 0x00830000, LENGTH = 0x00010000
-}
-SECTIONS
-{
-    . = 0x800000;
-
-    /* romloader data section, contains passthru interrupt vectors */
-    .compal.loader (NOLOAD) : { . = 0x100; } > LRAM
-
-    /* image signature (prepended by osmocon according to phone type) */
-    .compal.header (NOLOAD) : { . = 4; } > LRAM
-
-    /* initialization code */
-    . = ALIGN(4);
-    .text.start : {
-        PROVIDE(__start = .);
-        KEEP(*(.text.start))
-        *(.text.start)
-    } > TRAM
-
-    /* exception vectors from 0x80001c to 0x800034 */
-    .text.exceptions 0x80001c : AT (LOADADDR(.text.start) + SIZEOF(.text.start)) {
-        KEEP(*(.text.exceptions))
-        * (.text.exceptions)
-        . = ALIGN(4);
-    } > LRAM
-    PROVIDE(_exceptions = LOADADDR(.text.exceptions));
-
-    /* code */
-    . = ALIGN(4);
-    .text (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) :
-          AT (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) {
-        /* regular code */
-        *(.text*)
-        /* always-in-ram code */
-        *(.ramtext*)
-        /* gcc voodoo */
-        *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx)
-        . = ALIGN(4);
-    } > TRAM
-    PROVIDE(_text_start = LOADADDR(.text));
-    PROVIDE(_text_end = LOADADDR(.text) + SIZEOF(.text));
-
-    /* constructor pointers */
-    .ctors : {
-        /* ctor count */
-        LONG(SIZEOF(.ctors) / 4 - 2)
-        /* ctor pointers */
-        KEEP(*(SORT(.ctors)))
-        /* end of list */
-        LONG(0)
-    } > TRAM
-    PROVIDE(_ctor_start = LOADADDR(.ctors));
-    PROVIDE(_ctor_end = LOADADDR(.ctors) + SIZEOF(.ctors));
-
-    /* destructor pointers */
-    .dtors : {
-        /* dtor count */
-        LONG(SIZEOF(.dtors) / 4 - 2)
-        /* dtor pointers */
-        KEEP(*(SORT(.dtors)))
-        /* end of list */
-        LONG(0)
-    } > TRAM
-    PROVIDE(_dtor_start = LOADADDR(.dtors));
-    PROVIDE(_dtor_end = LOADADDR(.dtors) + SIZEOF(.dtors));
-
-    /* read-only data */
-    . = ALIGN(4);
-    .rodata : {
-        *(.rodata*)
-    } > TRAM
-    PROVIDE(_rodata_start = LOADADDR(.rodata));
-    PROVIDE(_rodata_end = LOADADDR(.rodata) + SIZEOF(.rodata));
-
-    /* initialized data */
-    . = ALIGN(4);
-    .data : {
-        *(.data)
-    } > TRAM
-    PROVIDE(_data_start = LOADADDR(.data));
-    PROVIDE(_data_end = LOADADDR(.data) + SIZEOF(.data));
-
-    /* pic offset tables */
-    . = ALIGN(4);
-    .got : {
-        *(.got)
-        *(.got.plt) *(.igot.plt) *(.got) *(.igot)
-    } > TRAM
-    PROVIDE(_got_start = LOADADDR(.got));
-    PROVIDE(_got_end = LOADADDR(.got) + SIZEOF(.got));
-
-    /* uninitialized data */
-    .bss (NOLOAD) : {
-        . = ALIGN(4);
-        __bss_start = .;
-        _sbss = ABSOLUTE(.);
-        *(.bss)
-        _ebss = ABSOLUTE(.);
-    } > IRAM
-    . = ALIGN(4);
-    __bss_end = .;
-    PROVIDE(_bss_start = __bss_start);
-    PROVIDE(_bss_end = __bss_end);
-
-    /* end of image */
-    . = ALIGN(4);
-    _end = .;
-    PROVIDE(end = .);
-}
diff --git a/configs/compal_e99/README.txt b/configs/compal_e99/README.txt
deleted file mode 100644
index 646cdcf59cbcce2447ce30baa09ae035cd2f127e..0000000000000000000000000000000000000000
--- a/configs/compal_e99/README.txt
+++ /dev/null
@@ -1,81 +0,0 @@
-compal_e99
-==========
-
-This directory contains the board support for compal e99 phones.
-
-This port is based on patches contributed by Denis Carikli for both the
-compal e99 and e88. At the time of initial check-in, the following phones
-were tested:
-
-* Motorola c155 (compal e99) with the compalram and highram configuration
-* Motorola W220 (compal e88)
-* The openmoko freerunner baseband(compal e88)
-
-The patches were made by Alan Carvalho de Assis and Denis Carikli using
-the Stefan Richter's patches that can be found here:
-
-http://cgit.osmocom.org/cgit/nuttx-bb/log/?h=lputt%2Ftesting
-
-Osmocom-BB Dependencies and Sercomm
-===================================
-
-The build environment assumes that you have the osmocom-bb project
-directory at same level as the nuttx project:
-
-  |- nuttx
-  |- apps
-  `- osmocom-bb
-
-If you attempt to build this configuration without osmocom-bb, and that
-you added support for sercomm in your configuration(CONFIG_SERCOMM_CONSOLE=y)
-you will get compilation errors in drivers/sercomm due to header files that
-are needed from the osmocom-bb directory.
-
-By default, NuttX will not use sercomm (HDLC protocol) to communicate with
-the host system. Sercomm is the transport used by osmocom-bb that runs on top
-of serial.  See http://bb.osmocom.org/trac/wiki/nuttx-bb/run for detailed
-the usage of nuttx with sercomm.
-
-Loading NuttX
-=============
-
-The osmocom-bb wiki describes how to load NuttX.  See
-http://bb.osmocom.org/trac/wiki/nuttx-bb for detailed information.
-The way that nuttx is loaded depends on the configuration (highram/compalram)
-and phone:
-
-o compalram is for the ramloader(for phone having a bootloader on flash)
-o highram is for phones having the romloader(if the phone has a bootrom)
-  or for loading in the ram trough a special loader(loaded first on ram
-  by talking to the ramloader) when having a ramloader(which can only
-  load 64k).
-
-Configurations
-==============
-
-  1. Each Compal E99 configuration is maintained in a sub-directory and
-     can be selected as follow:
-
-       cd tools
-       ./configure.sh compal_e99/
-       cd -
-       . ./setenv.sh
-
-     Where  is one of the configuration sub-directories under
-     nuttx/configs/compal_e99.
-
-  2. These configurations use the mconf-based configuration tool.  To
-     change a configurations using that tool, you should:
-
-     a. Build and install the kconfig-mconf tool.  See nuttx/README.txt
-        see additional README.txt files in the NuttX tools repository.
-
-     b. Execute 'make menuconfig' in nuttx/ in order to start the
-        reconfiguration process.
-
-  3. By default, all configurations assume the NuttX Buildroot toolchain
-     under Linux (should work under Windows with Cygwin as well).  This
-     is easily reconfigured:
-
-        CONFIG_HOST_LINUX=y
-        CONFIG_ARM_TOOLCHAIN_BUILDROOT=y
diff --git a/configs/compal_e99/include/board.h b/configs/compal_e99/include/board.h
deleted file mode 100644
index 5855614184f903ced3811fc4d695d505df80d09c..0000000000000000000000000000000000000000
--- a/configs/compal_e99/include/board.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/****************************************************************************
- * arch/board.h
- *
- * Supposed to be empty
- *
- ****************************************************************************/
diff --git a/configs/compal_e99/nsh_compalram/Make.defs b/configs/compal_e99/nsh_compalram/Make.defs
deleted file mode 100644
index 9fe718fb8934776f8e472db62def7bfea629034c..0000000000000000000000000000000000000000
--- a/configs/compal_e99/nsh_compalram/Make.defs
+++ /dev/null
@@ -1,125 +0,0 @@
-############################################################################
-# configs/c5471evm/nsh/Make.defs
-#
-#   Copyright (C) 2007, 2008, 2011 Gregory Nutt. All rights reserved.
-#   Author: Gregory Nutt 
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name NuttX nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-############################################################################
-
-include ${TOPDIR}/.config
-include ${TOPDIR}/tools/Config.mk
-include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs
-
-ifeq ($(WINTOOL),y)
-  # Windows-native toolchains
-  DIRLINK = $(TOPDIR)/tools/copydir.sh
-  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
-  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
-  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
-  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
-  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/compalram.ld}"
-else
-  # Linux/Cygwin-native toolchain
-  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
-  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
-  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
-  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/compalram.ld
-endif
-
-CC = $(CROSSDEV)gcc
-CXX = $(CROSSDEV)g++
-CPP = $(CROSSDEV)gcc -E
-LD = $(CROSSDEV)ld
-AR = $(CROSSDEV)ar rcs
-NM = $(CROSSDEV)nm
-OBJCOPY = $(CROSSDEV)objcopy
-OBJDUMP = $(CROSSDEV)objdump
-
-ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
-ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
-
-ifeq ($(ARCHCCMAJOR),4)
-ifneq ($(HOSTOS),Cygwin)
-  OBJCOPYARGS = -R .note -R .note.gnu.build-id -R .comment
-endif
-endif
-
-ifeq ("${CONFIG_DEBUG}","y")
-  ARCHOPTIMIZATION = -g
-endif
-
-ifneq ($(CONFIG_DEBUG_NOOPT),y)
-  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
-endif
-
-ifeq ($(ARCHCCMAJOR),4)
-  ARCHCPUFLAGS = -mcpu=arm7tdmi -mfloat-abi=soft
-else
-  ARCHCPUFLAGS = -mapcs-32 -mcpu=arm7tdmi -msoft-float
-endif
-
-ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
-ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
-ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
-ARCHWARNINGSXX = -Wall -Wshadow -Wundef
-ARCHDEFINES =
-
-CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \
-         $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
-CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
-CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \
-           $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
-CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
-CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
-AFLAGS = $(CFLAGS) -D__ASSEMBLY__
-
-NXFLATLDFLAGS1 = -r -d -warn-common
-NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \
-                 -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \
-                 -no-check-sections
-LDNXFLATFLAGS = -e main -s 2048
-
-ASMEXT = .S
-OBJEXT = .o
-LIBEXT = .a
-EXEEXT =
-
-ifneq ($(CROSSDEV),arm-nuttx-elf-)
-  LDFLAGS += -nostartfiles -nodefaultlibs
-endif
-ifeq ($(CONFIG_DEBUG),y)
-  LDFLAGS += -g
-endif
-
-HOSTCC = gcc
-HOSTINCLUDES = -I.
-HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
-HOSTLDFLAGS =
diff --git a/configs/compal_e99/nsh_highram/Make.defs b/configs/compal_e99/nsh_highram/Make.defs
deleted file mode 100644
index a7164120e0caa69c94c6a7cdf1cedbb992c39a86..0000000000000000000000000000000000000000
--- a/configs/compal_e99/nsh_highram/Make.defs
+++ /dev/null
@@ -1,125 +0,0 @@
-############################################################################
-# configs/c5471evm/nsh/Make.defs
-#
-#   Copyright (C) 2007, 2008, 2011, 2014 Gregory Nutt. All rights reserved.
-#   Author: Gregory Nutt 
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name NuttX nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-############################################################################
-
-include ${TOPDIR}/.config
-include ${TOPDIR}/tools/Config.mk
-include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs
-
-ifeq ($(WINTOOL),y)
-  # Windows-native toolchains
-  DIRLINK = $(TOPDIR)/tools/copydir.sh
-  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
-  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
-  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
-  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
-  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/highram.ld}"
-else
-  # Linux/Cygwin-native toolchain
-  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
-  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
-  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
-  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/highram.ld
-endif
-
-CC = $(CROSSDEV)gcc
-CXX = $(CROSSDEV)g++
-CPP = $(CROSSDEV)gcc -E
-LD = $(CROSSDEV)ld
-AR = $(CROSSDEV)ar rcs
-NM = $(CROSSDEV)nm
-OBJCOPY = $(CROSSDEV)objcopy
-OBJDUMP = $(CROSSDEV)objdump
-
-ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
-ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
-
-ifeq ($(ARCHCCMAJOR),4)
-ifneq ($(HOSTOS),Cygwin)
-  OBJCOPYARGS = -R .note -R .note.gnu.build-id -R .comment
-endif
-endif
-
-ifeq ("${CONFIG_DEBUG}","y")
-  ARCHOPTIMIZATION = -g
-endif
-
-ifneq ($(CONFIG_DEBUG_NOOPT),y)
-  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
-endif
-
-ifeq ($(ARCHCCMAJOR),4)
-  ARCHCPUFLAGS = -mcpu=arm7tdmi -mfloat-abi=soft
-else
-  ARCHCPUFLAGS = -mapcs-32 -mcpu=arm7tdmi -msoft-float
-endif
-
-ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
-ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
-ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
-ARCHWARNINGSXX = -Wall -Wshadow -Wundef
-ARCHDEFINES =
-
-CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \
-         $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
-CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
-CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \
-           $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
-CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
-CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
-AFLAGS = $(CFLAGS) -D__ASSEMBLY__
-
-NXFLATLDFLAGS1 = -r -d -warn-common
-NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \
-                 -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \
-                 -no-check-sections
-LDNXFLATFLAGS = -e main -s 2048
-
-ASMEXT = .S
-OBJEXT = .o
-LIBEXT = .a
-EXEEXT =
-
-ifneq ($(CROSSDEV),arm-nuttx-elf-)
-  LDFLAGS += -nostartfiles -nodefaultlibs
-endif
-ifeq ($(CONFIG_DEBUG),y)
-  LDFLAGS += -g
-endif
-
-HOSTCC = gcc
-HOSTINCLUDES = -I.
-HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
-HOSTLDFLAGS =
diff --git a/configs/compal_e99/nsh_highram/defconfig b/configs/compal_e99/nsh_highram/defconfig
deleted file mode 100644
index a7cbecbe981b4be19ead1c5e51a09be0620626e1..0000000000000000000000000000000000000000
--- a/configs/compal_e99/nsh_highram/defconfig
+++ /dev/null
@@ -1,913 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# Nuttx/ Configuration
-#
-
-#
-# Build Setup
-#
-# CONFIG_EXPERIMENTAL is not set
-# CONFIG_DEFAULT_SMALL is not set
-CONFIG_HOST_LINUX=y
-# CONFIG_HOST_OSX is not set
-# CONFIG_HOST_WINDOWS is not set
-# CONFIG_HOST_OTHER is not set
-
-#
-# Build Configuration
-#
-# CONFIG_APPS_DIR="../apps"
-CONFIG_BUILD_FLAT=y
-# CONFIG_BUILD_2PASS is not set
-
-#
-# Binary Output Formats
-#
-# CONFIG_RRLOAD_BINARY is not set
-# CONFIG_INTELHEX_BINARY is not set
-# CONFIG_MOTOROLA_SREC is not set
-CONFIG_RAW_BINARY=y
-# CONFIG_UBOOT_UIMAGE is not set
-
-#
-# Customize Header Files
-#
-# CONFIG_ARCH_STDINT_H is not set
-# CONFIG_ARCH_STDBOOL_H is not set
-# CONFIG_ARCH_MATH_H is not set
-# CONFIG_ARCH_FLOAT_H is not set
-# CONFIG_ARCH_STDARG_H is not set
-
-#
-# Debug Options
-#
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-CONFIG_ARCH_HAVE_STACKCHECK=y
-# CONFIG_STACK_COLORATION is not set
-# CONFIG_DEBUG_SYMBOLS is not set
-CONFIG_ARCH_HAVE_CUSTOMOPT=y
-# CONFIG_DEBUG_NOOPT is not set
-# CONFIG_DEBUG_CUSTOMOPT is not set
-CONFIG_DEBUG_FULLOPT=y
-
-#
-# System Type
-#
-CONFIG_ARCH_ARM=y
-# CONFIG_ARCH_AVR is not set
-# CONFIG_ARCH_HC is not set
-# CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
-# CONFIG_ARCH_SIM is not set
-# CONFIG_ARCH_X86 is not set
-# CONFIG_ARCH_Z16 is not set
-# CONFIG_ARCH_Z80 is not set
-CONFIG_ARCH="arm"
-
-#
-# ARM Options
-#
-# CONFIG_ARCH_CHIP_A1X is not set
-# CONFIG_ARCH_CHIP_C5471 is not set
-CONFIG_ARCH_CHIP_CALYPSO=y
-# CONFIG_ARCH_CHIP_DM320 is not set
-# CONFIG_ARCH_CHIP_EFM32 is not set
-# CONFIG_ARCH_CHIP_IMX1 is not set
-# CONFIG_ARCH_CHIP_KINETIS is not set
-# CONFIG_ARCH_CHIP_KL is not set
-# CONFIG_ARCH_CHIP_LM is not set
-# CONFIG_ARCH_CHIP_TIVA is not set
-# CONFIG_ARCH_CHIP_LPC11XX is not set
-# CONFIG_ARCH_CHIP_LPC17XX is not set
-# CONFIG_ARCH_CHIP_LPC214X is not set
-# CONFIG_ARCH_CHIP_LPC2378 is not set
-# CONFIG_ARCH_CHIP_LPC31XX is not set
-# CONFIG_ARCH_CHIP_LPC43XX is not set
-# CONFIG_ARCH_CHIP_NUC1XX is not set
-# CONFIG_ARCH_CHIP_SAMA5 is not set
-# CONFIG_ARCH_CHIP_SAMD is not set
-# CONFIG_ARCH_CHIP_SAML is not set
-# CONFIG_ARCH_CHIP_SAM34 is not set
-# CONFIG_ARCH_CHIP_SAMV7 is not set
-# CONFIG_ARCH_CHIP_STM32 is not set
-# CONFIG_ARCH_CHIP_STR71X is not set
-CONFIG_ARCH_ARM7TDMI=y
-# CONFIG_ARCH_ARM926EJS is not set
-# CONFIG_ARCH_ARM920T is not set
-# CONFIG_ARCH_CORTEXM0 is not set
-# CONFIG_ARCH_CORTEXM3 is not set
-# CONFIG_ARCH_CORTEXM4 is not set
-# CONFIG_ARCH_CORTEXM7 is not set
-# CONFIG_ARCH_CORTEXA5 is not set
-# CONFIG_ARCH_CORTEXA8 is not set
-CONFIG_ARCH_FAMILY="arm"
-CONFIG_ARCH_CHIP="calypso"
-# CONFIG_ARCH_HAVE_FPU is not set
-# CONFIG_ARCH_HAVE_DPFPU is not set
-CONFIG_ARCH_HAVE_LOWVECTORS=y
-# CONFIG_ARCH_LOWVECTORS is not set
-
-#
-# ARM Configuration Options
-#
-# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set
-# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set
-CONFIG_ARM_TOOLCHAIN_GNU_EABIL=y
-# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set
-CONFIG_UART_IRDA_BAUD=115200
-CONFIG_UART_IRDA_PARITY=0
-CONFIG_UART_IRDA_BITS=8
-CONFIG_UART_IRDA_2STOP=0
-CONFIG_UART_IRDA_RXBUFSIZE=256
-CONFIG_UART_IRDA_TXBUFSIZE=256
-CONFIG_UART_MODEM_BAUD=115200
-CONFIG_UART_MODEM_PARITY=0
-CONFIG_UART_MODEM_BITS=8
-CONFIG_UART_MODEM_2STOP=0
-CONFIG_UART_MODEM_RXBUFSIZE=256
-CONFIG_UART_MODEM_TXBUFSIZE=256
-
-#
-# Calypso Configuration Options
-#
-
-#
-# Modem UART Configuration
-#
-# CONFIG_UART_MODEM_HWFLOWCONTROL is not set
-
-#
-# IrDA UART Configuration
-#
-# CONFIG_UART_IRDA_HWFLOWCONTROL is not set
-# CONFIG_USE_SERCOMM_CONSOLE is not set
-# CONFIG_SERIAL_MODEM_CONSOLE is not set
-# CONFIG_SERIAL_IRDA_CONSOLE is not set
-CONFIG_SERIAL_CONSOLE_NONE=y
-
-#
-# Architecture Options
-#
-# CONFIG_ARCH_NOINTC is not set
-# CONFIG_ARCH_VECNOTIRQ is not set
-# CONFIG_ARCH_DMA is not set
-# CONFIG_ARCH_HAVE_IRQPRIO is not set
-# CONFIG_ARCH_L2CACHE is not set
-# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
-# CONFIG_ARCH_HAVE_ADDRENV is not set
-# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
-CONFIG_ARCH_HAVE_VFORK=y
-# CONFIG_ARCH_HAVE_MMU is not set
-# CONFIG_ARCH_HAVE_MPU is not set
-# CONFIG_ARCH_NAND_HWECC is not set
-# CONFIG_ARCH_HAVE_EXTCLK is not set
-CONFIG_ARCH_HAVE_POWEROFF=y
-CONFIG_ARCH_STACKDUMP=y
-# CONFIG_ENDIAN_BIG is not set
-# CONFIG_ARCH_IDLE_CUSTOM is not set
-# CONFIG_ARCH_HAVE_RAMFUNCS is not set
-# CONFIG_ARCH_HAVE_RAMVECTORS is not set
-
-#
-# Board Settings
-#
-CONFIG_BOARD_LOOPSPERMSEC=1250
-# CONFIG_ARCH_CALIBRATION is not set
-
-#
-# Interrupt options
-#
-CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
-CONFIG_ARCH_INTERRUPTSTACK=1024
-# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set
-
-#
-# Boot options
-#
-# CONFIG_BOOT_RUNFROMEXTSRAM is not set
-# CONFIG_BOOT_RUNFROMFLASH is not set
-CONFIG_BOOT_RUNFROMISRAM=y
-# CONFIG_BOOT_RUNFROMSDRAM is not set
-# CONFIG_BOOT_COPYTORAM is not set
-
-#
-# Boot Memory Configuration
-#
-CONFIG_RAM_START=0
-CONFIG_RAM_SIZE=8650752
-# CONFIG_ARCH_HAVE_SDRAM is not set
-
-#
-# Board Selection
-#
-# CONFIG_ARCH_BOARD_COMPALE86 is not set
-# CONFIG_ARCH_BOARD_COMPALE88 is not set
-CONFIG_ARCH_BOARD_COMPALE99=y
-# CONFIG_ARCH_BOARD_PIRELLI_DPL10 is not set
-# CONFIG_ARCH_BOARD_CUSTOM is not set
-CONFIG_ARCH_BOARD="compal_e99"
-
-#
-# Common Board Options
-#
-CONFIG_NSH_MMCSDMINOR=0
-
-#
-# Board-Specific Options
-#
-CONFIG_COMPALE99_LCD_SSD1783=y
-CONFIG_LIB_BOARDCTL=y
-CONFIG_BOARDCTL_POWEROFF=y
-# CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
-# CONFIG_BOARDCTL_GRAPHICS is not set
-# CONFIG_BOARDCTL_IOCTL is not set
-
-#
-# RTOS Features
-#
-CONFIG_DISABLE_OS_API=y
-# CONFIG_DISABLE_POSIX_TIMERS is not set
-# CONFIG_DISABLE_PTHREAD is not set
-# CONFIG_DISABLE_SIGNALS is not set
-CONFIG_DISABLE_MQUEUE=y
-# CONFIG_DISABLE_ENVIRON is not set
-
-#
-# Clocks and Timers
-#
-CONFIG_USEC_PER_TICK=10000
-# CONFIG_SYSTEM_TIME64 is not set
-# CONFIG_CLOCK_MONOTONIC is not set
-# CONFIG_JULIAN_TIME is not set
-CONFIG_START_YEAR=2007
-CONFIG_START_MONTH=2
-CONFIG_START_DAY=13
-CONFIG_MAX_WDOGPARMS=4
-CONFIG_PREALLOC_WDOGS=8
-CONFIG_WDOG_INTRESERVE=1
-CONFIG_PREALLOC_TIMERS=8
-
-#
-# Tasks and Scheduling
-#
-# CONFIG_INIT_NONE is not set
-CONFIG_INIT_ENTRYPOINT=y
-# CONFIG_INIT_FILEPATH is not set
-CONFIG_USER_ENTRYPOINT="nsh_main"
-CONFIG_RR_INTERVAL=200
-CONFIG_TASK_NAME_SIZE=0
-CONFIG_MAX_TASKS=16
-# CONFIG_SCHED_HAVE_PARENT is not set
-# CONFIG_SCHED_WAITPID is not set
-
-#
-# Pthread Options
-#
-# CONFIG_MUTEX_TYPES is not set
-CONFIG_NPTHREAD_KEYS=4
-
-#
-# Performance Monitoring
-#
-# CONFIG_SCHED_CPULOAD is not set
-# CONFIG_SCHED_INSTRUMENTATION is not set
-
-#
-# Files and I/O
-#
-CONFIG_DEV_CONSOLE=y
-# CONFIG_FDCLONE_DISABLE is not set
-# CONFIG_FDCLONE_STDIO is not set
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_NFILE_DESCRIPTORS=8
-CONFIG_NFILE_STREAMS=8
-CONFIG_NAME_MAX=32
-# CONFIG_PRIORITY_INHERITANCE is not set
-
-#
-# RTOS hooks
-#
-# CONFIG_BOARD_INITIALIZE is not set
-# CONFIG_SCHED_STARTHOOK is not set
-# CONFIG_SCHED_ATEXIT is not set
-# CONFIG_SCHED_ONEXIT is not set
-
-#
-# Signal Numbers
-#
-CONFIG_SIG_SIGUSR1=1
-CONFIG_SIG_SIGUSR2=2
-CONFIG_SIG_SIGALARM=3
-CONFIG_SIG_SIGCONDTIMEDOUT=16
-
-#
-# Work Queue Support
-#
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
-# CONFIG_SCHED_LPWORK is not set
-
-#
-# Stack and heap information
-#
-CONFIG_IDLETHREAD_STACKSIZE=4096
-CONFIG_USERMAIN_STACKSIZE=4096
-CONFIG_PTHREAD_STACK_MIN=256
-CONFIG_PTHREAD_STACK_DEFAULT=4096
-# CONFIG_LIB_SYSCALL is not set
-
-#
-# Device Drivers
-#
-CONFIG_DISABLE_POLL=y
-CONFIG_DEV_NULL=y
-# CONFIG_DEV_ZERO is not set
-# CONFIG_DEV_LOOP is not set
-
-#
-# Buffering
-#
-# CONFIG_DRVR_WRITEBUFFER is not set
-# CONFIG_DRVR_READAHEAD is not set
-# CONFIG_RAMDISK is not set
-# CONFIG_CAN is not set
-# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
-# CONFIG_PWM is not set
-# CONFIG_ARCH_HAVE_I2CRESET is not set
-# CONFIG_I2C is not set
-CONFIG_SPI=y
-CONFIG_SPI_EXCHANGE=y
-# CONFIG_SPI_CMDDATA is not set
-# CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
-# CONFIG_I2S is not set
-
-#
-# Timer Driver Support
-#
-# CONFIG_TIMER is not set
-# CONFIG_RTC is not set
-# CONFIG_WATCHDOG is not set
-# CONFIG_ANALOG is not set
-# CONFIG_AUDIO_DEVICES is not set
-# CONFIG_VIDEO_DEVICES is not set
-# CONFIG_BCH is not set
-# CONFIG_INPUT is not set
-CONFIG_LCD=y
-
-#
-# Common LCD Settings
-#
-# CONFIG_LCD_CONSOLE is not set
-CONFIG_LCD_NOGETRUN=y
-CONFIG_LCD_MAXCONTRAST=63
-CONFIG_LCD_MAXPOWER=1
-
-#
-# Graphic LCD Devices
-#
-# CONFIG_LCD_P14201 is not set
-# CONFIG_LCD_NOKIA6100 is not set
-# CONFIG_LCD_MIO283QT2 is not set
-# CONFIG_LCD_MIO283QT9A is not set
-# CONFIG_LCD_UG9664HSWAG01 is not set
-# CONFIG_LCD_UG2864HSWEG01 is not set
-# CONFIG_LCD_UG2832HSWEG04 is not set
-# CONFIG_LCD_ST7565 is not set
-# CONFIG_LCD_ST7567 is not set
-# CONFIG_LCD_UG2864AMBAG01 is not set
-# CONFIG_LCD_SSD1289 is not set
-# CONFIG_LCD_SHARP_MEMLCD is not set
-CONFIG_LCD_LANDSCAPE=y
-# CONFIG_LCD_PORTRAIT is not set
-# CONFIG_LCD_RPORTRAIT is not set
-# CONFIG_LCD_RLANDSCAPE is not set
-# CONFIG_LCD_ILI9341 is not set
-# CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
-# CONFIG_MMCSD is not set
-# CONFIG_MTD is not set
-# CONFIG_EEPROM is not set
-# CONFIG_PIPES is not set
-# CONFIG_PM is not set
-# CONFIG_POWER is not set
-# CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
-CONFIG_SERIAL=y
-# CONFIG_DEV_LOWCONSOLE is not set
-# CONFIG_16550_UART is not set
-# CONFIG_UART_SERIALDRIVER is not set
-# CONFIG_UART0_SERIALDRIVER is not set
-# CONFIG_UART1_SERIALDRIVER is not set
-# CONFIG_UART2_SERIALDRIVER is not set
-# CONFIG_UART3_SERIALDRIVER is not set
-# CONFIG_UART4_SERIALDRIVER is not set
-# CONFIG_UART5_SERIALDRIVER is not set
-# CONFIG_UART6_SERIALDRIVER is not set
-# CONFIG_UART7_SERIALDRIVER is not set
-# CONFIG_UART8_SERIALDRIVER is not set
-# CONFIG_SCI0_SERIALDRIVER is not set
-# CONFIG_SCI1_SERIALDRIVER is not set
-# CONFIG_USART0_SERIALDRIVER is not set
-# CONFIG_USART1_SERIALDRIVER is not set
-# CONFIG_USART2_SERIALDRIVER is not set
-# CONFIG_USART3_SERIALDRIVER is not set
-# CONFIG_USART4_SERIALDRIVER is not set
-# CONFIG_USART5_SERIALDRIVER is not set
-# CONFIG_USART6_SERIALDRIVER is not set
-# CONFIG_USART7_SERIALDRIVER is not set
-# CONFIG_USART8_SERIALDRIVER is not set
-CONFIG_OTHER_UART_SERIALDRIVER=y
-
-#
-# USART Configuration
-#
-CONFIG_MCU_SERIAL=y
-# CONFIG_STANDARD_SERIAL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
-# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
-CONFIG_OTHER_SERIAL_CONSOLE=y
-# CONFIG_NO_SERIAL_CONSOLE is not set
-# CONFIG_USBDEV is not set
-# CONFIG_USBHOST is not set
-# CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
-
-#
-# System Logging
-#
-# CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
-
-#
-# Networking Support
-#
-# CONFIG_ARCH_HAVE_NET is not set
-# CONFIG_ARCH_HAVE_PHY is not set
-# CONFIG_NET is not set
-
-#
-# Crypto API
-#
-# CONFIG_CRYPTO is not set
-
-#
-# File Systems
-#
-
-#
-# File system configuration
-#
-# CONFIG_DISABLE_MOUNTPOINT is not set
-# CONFIG_FS_AUTOMOUNTER is not set
-# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
-# CONFIG_FS_READABLE is not set
-# CONFIG_FS_WRITABLE is not set
-# CONFIG_FS_NAMED_SEMAPHORES is not set
-# CONFIG_FS_RAMMAP is not set
-# CONFIG_FS_FAT is not set
-# CONFIG_FS_NXFFS is not set
-# CONFIG_FS_ROMFS is not set
-# CONFIG_FS_SMARTFS is not set
-# CONFIG_FS_BINFS is not set
-# CONFIG_FS_PROCFS is not set
-# CONFIG_FS_UNIONFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
-#
-# Graphics Support
-#
-CONFIG_NX=y
-CONFIG_NX_LCDDRIVER=y
-CONFIG_NX_NPLANES=1
-CONFIG_NX_BGCOLOR=0x0
-CONFIG_NX_WRITEONLY=y
-
-#
-# Supported Pixel Depths
-#
-CONFIG_NX_DISABLE_1BPP=y
-CONFIG_NX_DISABLE_2BPP=y
-CONFIG_NX_DISABLE_4BPP=y
-CONFIG_NX_DISABLE_8BPP=y
-# CONFIG_NX_DISABLE_16BPP is not set
-CONFIG_NX_DISABLE_24BPP=y
-CONFIG_NX_DISABLE_32BPP=y
-CONFIG_NX_PACKEDMSFIRST=y
-
-#
-# Input Devices
-#
-# CONFIG_NX_XYINPUT is not set
-CONFIG_NX_XYINPUT_NONE=y
-# CONFIG_NX_XYINPUT_MOUSE is not set
-# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set
-CONFIG_NX_KBD=y
-
-#
-# Framed Window Borders
-#
-CONFIG_NXTK_BORDERWIDTH=4
-CONFIG_NXTK_DEFAULT_BORDERCOLORS=y
-# CONFIG_NXTK_AUTORAISE is not set
-
-#
-# Font Selections
-#
-CONFIG_NXFONTS_CHARBITS=7
-# CONFIG_NXFONT_MONO5X8 is not set
-CONFIG_NXFONT_SANS17X22=y
-# CONFIG_NXFONT_SANS20X26 is not set
-# CONFIG_NXFONT_SANS23X27 is not set
-# CONFIG_NXFONT_SANS22X29 is not set
-# CONFIG_NXFONT_SANS28X37 is not set
-# CONFIG_NXFONT_SANS39X48 is not set
-# CONFIG_NXFONT_SANS17X23B is not set
-# CONFIG_NXFONT_SANS20X27B is not set
-# CONFIG_NXFONT_SANS22X29B is not set
-# CONFIG_NXFONT_SANS28X37B is not set
-# CONFIG_NXFONT_SANS40X49B is not set
-# CONFIG_NXFONT_SERIF22X29 is not set
-# CONFIG_NXFONT_SERIF29X37 is not set
-# CONFIG_NXFONT_SERIF38X48 is not set
-# CONFIG_NXFONT_SERIF22X28B is not set
-# CONFIG_NXFONT_SERIF27X38B is not set
-# CONFIG_NXFONT_SERIF38X49B is not set
-# CONFIG_NXFONT_PIXEL_UNICODE is not set
-# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
-# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
-# CONFIG_NXTERM is not set
-
-#
-# NX Multi-user only options
-#
-# CONFIG_NX_MULTIUSER is not set
-
-#
-# Memory Management
-#
-# CONFIG_MM_SMALL is not set
-CONFIG_MM_REGIONS=2
-CONFIG_ARCH_HAVE_HEAP2=y
-CONFIG_HEAP2_BASE=0x01000000
-CONFIG_HEAP2_SIZE=2097152
-# CONFIG_GRAN is not set
-
-#
-# Audio Support
-#
-# CONFIG_AUDIO is not set
-
-#
-# Binary Loader
-#
-# CONFIG_BINFMT_DISABLE is not set
-# CONFIG_BINFMT_EXEPATH is not set
-# CONFIG_NXFLAT is not set
-# CONFIG_ELF is not set
-CONFIG_BUILTIN=y
-# CONFIG_PIC is not set
-# CONFIG_SYMTAB_ORDEREDBYNAME is not set
-
-#
-# Library Routines
-#
-
-#
-# Standard C Library Options
-#
-CONFIG_STDIO_BUFFER_SIZE=64
-CONFIG_STDIO_LINEBUFFER=y
-CONFIG_NUNGET_CHARS=2
-CONFIG_LIB_HOMEDIR="/"
-# CONFIG_LIBM is not set
-# CONFIG_NOPRINTF_FIELDWIDTH is not set
-# CONFIG_LIBC_FLOATINGPOINT is not set
-CONFIG_LIBC_LONG_LONG=y
-# CONFIG_LIBC_IOCTL_VARIADIC is not set
-CONFIG_LIB_RAND_ORDER=1
-# CONFIG_EOL_IS_CR is not set
-# CONFIG_EOL_IS_LF is not set
-# CONFIG_EOL_IS_BOTH_CRLF is not set
-CONFIG_EOL_IS_EITHER_CRLF=y
-# CONFIG_LIBC_EXECFUNCS is not set
-CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
-CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
-# CONFIG_LIBC_STRERROR is not set
-# CONFIG_LIBC_PERROR_STDOUT is not set
-CONFIG_ARCH_LOWPUTC=y
-# CONFIG_LIBC_LOCALTIME is not set
-# CONFIG_TIME_EXTENDED is not set
-CONFIG_LIB_SENDFILE_BUFSIZE=512
-# CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
-
-#
-# Non-standard Library Support
-#
-# CONFIG_LIB_KBDCODEC is not set
-# CONFIG_LIB_SLCDCODEC is not set
-
-#
-# Basic CXX Support
-#
-# CONFIG_C99_BOOL8 is not set
-# CONFIG_HAVE_CXX is not set
-
-#
-# Application Configuration
-#
-
-#
-# Built-In Applications
-#
-CONFIG_BUILTIN_PROXY_STACKSIZE=1024
-
-#
-# Examples
-#
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
-# CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
-# CONFIG_EXAMPLES_DHCPD is not set
-# CONFIG_EXAMPLES_ELF is not set
-# CONFIG_EXAMPLES_FTPC is not set
-# CONFIG_EXAMPLES_FTPD is not set
-# CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
-# CONFIG_EXAMPLES_HIDKBD is not set
-CONFIG_EXAMPLES_KEYPADTEST=y
-CONFIG_EXAMPLES_KEYPAD_DEVNAME="/dev/keypad"
-# CONFIG_EXAMPLES_KEYPADTEST_ENCODED is not set
-# CONFIG_EXAMPLES_IGMP is not set
-# CONFIG_EXAMPLES_LCDRW is not set
-# CONFIG_EXAMPLES_MM is not set
-# CONFIG_EXAMPLES_MODBUS is not set
-# CONFIG_EXAMPLES_MOUNT is not set
-# CONFIG_EXAMPLES_NRF24L01TERM is not set
-CONFIG_EXAMPLES_NSH=y
-# CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
-# CONFIG_EXAMPLES_NXFFS is not set
-CONFIG_EXAMPLES_NXHELLO=y
-CONFIG_EXAMPLES_NXHELLO_VPLANE=0
-CONFIG_EXAMPLES_NXHELLO_DEVNO=0
-CONFIG_EXAMPLES_NXHELLO_BPP=16
-
-#
-# Example Color Configuration
-#
-CONFIG_EXAMPLES_NXHELLO_DEFAULT_COLORS=y
-
-#
-# Example Font Configuration
-#
-CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y
-# CONFIG_EXAMPLES_NXHELLO_EXTERNINIT is not set
-CONFIG_EXAMPLES_NXIMAGE=y
-CONFIG_EXAMPLES_NXIMAGE_VPLANE=0
-CONFIG_EXAMPLES_NXIMAGE_DEVNO=0
-CONFIG_EXAMPLES_NXIMAGE_BPP=16
-CONFIG_EXAMPLES_NXIMAGE_XSCALEp5=y
-CONFIG_EXAMPLES_NXIMAGE_XSCALE1p0=y
-# CONFIG_EXAMPLES_NXIMAGE_XSCALE1p5 is not set
-# CONFIG_EXAMPLES_NXIMAGE_XSCALE2p0 is not set
-CONFIG_EXAMPLES_NXIMAGE_YSCALEp5=y
-CONFIG_EXAMPLES_NXIMAGE_YSCALE1p0=y
-# CONFIG_EXAMPLES_NXIMAGE_YSCALE1p5 is not set
-# CONFIG_EXAMPLES_NXIMAGE_YSCALE2p0 is not set
-CONFIG_EXAMPLES_NXLINES=y
-CONFIG_EXAMPLES_NXLINES_VPLANE=0
-CONFIG_EXAMPLES_NXLINES_DEVNO=0
-CONFIG_EXAMPLES_NXLINES_DEFAULT_COLORS=y
-CONFIG_EXAMPLES_NXLINES_LINEWIDTH=4
-CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=2
-CONFIG_EXAMPLES_NXLINES_BPP=16
-# CONFIG_EXAMPLES_NXLINES_EXTERNINIT is not set
-CONFIG_EXAMPLES_NXTEXT=y
-
-#
-# Basic Configuration of the example
-#
-CONFIG_EXAMPLES_NXTEXT_VPLANE=0
-CONFIG_EXAMPLES_NXTEXT_DEVNO=0
-CONFIG_EXAMPLES_NXTEXT_BPP=16
-CONFIG_EXAMPLES_NXTEXT_BMCACHE=128
-CONFIG_EXAMPLES_NXTEXT_GLCACHE=16
-
-#
-# Example Color Configuration
-#
-CONFIG_EXAMPLES_NXTEXT_DEFAULT_COLORS=y
-
-#
-# Example Font Configuration
-#
-# CONFIG_EXAMPLES_NXTEXT_DEFAULT_FONT is not set
-CONFIG_EXAMPLES_NXTEXT_BGFONTID=14
-CONFIG_EXAMPLES_NXTEXT_PUFONTID=0
-# CONFIG_EXAMPLES_NXTEXT_EXTERNINIT is not set
-# CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
-# CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_SENDMAIL is not set
-# CONFIG_EXAMPLES_SERIALBLASTER is not set
-# CONFIG_EXAMPLES_SERIALRX is not set
-# CONFIG_EXAMPLES_SERLOOP is not set
-# CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
-# CONFIG_EXAMPLES_SMART is not set
-# CONFIG_EXAMPLES_TCPECHO is not set
-# CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_TIFF is not set
-# CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
-# CONFIG_EXAMPLES_USBTERM is not set
-# CONFIG_EXAMPLES_WATCHDOG is not set
-
-#
-# Graphics Support
-#
-# CONFIG_TIFF is not set
-# CONFIG_GRAPHICS_TRAVELER is not set
-
-#
-# Interpreters
-#
-# CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
-# CONFIG_INTERPRETERS_MICROPYTHON is not set
-
-#
-# Network Utilities
-#
-
-#
-# Networking Utilities
-#
-# CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_JSON is not set
-# CONFIG_NETUTILS_SMTP is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
-#
-# NSH Library
-#
-CONFIG_NSH_LIBRARY=y
-
-#
-# Command Line Configuration
-#
-CONFIG_NSH_READLINE=y
-# CONFIG_NSH_CLE is not set
-CONFIG_NSH_LINELEN=64
-# CONFIG_NSH_DISABLE_SEMICOLON is not set
-CONFIG_NSH_CMDPARMS=y
-CONFIG_NSH_MAXARGUMENTS=6
-CONFIG_NSH_ARGCAT=y
-CONFIG_NSH_NESTDEPTH=3
-# CONFIG_NSH_DISABLEBG is not set
-CONFIG_NSH_BUILTIN_APPS=y
-
-#
-# Disable Individual commands
-#
-# CONFIG_NSH_DISABLE_ADDROUTE is not set
-# CONFIG_NSH_DISABLE_CAT is not set
-# CONFIG_NSH_DISABLE_CD is not set
-# CONFIG_NSH_DISABLE_CP is not set
-# CONFIG_NSH_DISABLE_CMP is not set
-CONFIG_NSH_DISABLE_DATE=y
-# CONFIG_NSH_DISABLE_DD is not set
-# CONFIG_NSH_DISABLE_DF is not set
-# CONFIG_NSH_DISABLE_DELROUTE is not set
-# CONFIG_NSH_DISABLE_ECHO is not set
-# CONFIG_NSH_DISABLE_EXEC is not set
-# CONFIG_NSH_DISABLE_EXIT is not set
-# CONFIG_NSH_DISABLE_FREE is not set
-# CONFIG_NSH_DISABLE_GET is not set
-# CONFIG_NSH_DISABLE_HELP is not set
-# CONFIG_NSH_DISABLE_HEXDUMP is not set
-# CONFIG_NSH_DISABLE_IFCONFIG is not set
-# CONFIG_NSH_DISABLE_KILL is not set
-# CONFIG_NSH_DISABLE_LOSETUP is not set
-# CONFIG_NSH_DISABLE_LS is not set
-# CONFIG_NSH_DISABLE_MB is not set
-# CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
-# CONFIG_NSH_DISABLE_MKRD is not set
-# CONFIG_NSH_DISABLE_MH is not set
-# CONFIG_NSH_DISABLE_MOUNT is not set
-# CONFIG_NSH_DISABLE_MV is not set
-# CONFIG_NSH_DISABLE_MW is not set
-# CONFIG_NSH_DISABLE_PS is not set
-# CONFIG_NSH_DISABLE_PUT is not set
-# CONFIG_NSH_DISABLE_PWD is not set
-# CONFIG_NSH_DISABLE_RM is not set
-# CONFIG_NSH_DISABLE_RMDIR is not set
-# CONFIG_NSH_DISABLE_SET is not set
-# CONFIG_NSH_DISABLE_SH is not set
-# CONFIG_NSH_DISABLE_SLEEP is not set
-# CONFIG_NSH_DISABLE_TEST is not set
-# CONFIG_NSH_DISABLE_UMOUNT is not set
-# CONFIG_NSH_DISABLE_UNSET is not set
-# CONFIG_NSH_DISABLE_USLEEP is not set
-# CONFIG_NSH_DISABLE_WGET is not set
-# CONFIG_NSH_DISABLE_XD is not set
-
-#
-# Configure Command Options
-#
-CONFIG_NSH_CMDOPT_DF_H=y
-CONFIG_NSH_CODECS_BUFSIZE=128
-CONFIG_NSH_CMDOPT_HEXDUMP=y
-CONFIG_NSH_FILEIOSIZE=1024
-
-#
-# Scripting Support
-#
-# CONFIG_NSH_DISABLESCRIPT is not set
-# CONFIG_NSH_DISABLE_ITEF is not set
-# CONFIG_NSH_DISABLE_LOOPS is not set
-
-#
-# Console Configuration
-#
-CONFIG_NSH_CONSOLE=y
-# CONFIG_NSH_ALTCONDEV is not set
-# CONFIG_NSH_ARCHINIT is not set
-
-#
-# NxWidgets/NxWM
-#
-
-#
-# Platform-specific Support
-#
-# CONFIG_PLATFORM_CONFIGDATA is not set
-
-#
-# System Libraries and NSH Add-Ons
-#
-# CONFIG_SYSTEM_FREE is not set
-# CONFIG_SYSTEM_CLE is not set
-# CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
-# CONFIG_SYSTEM_RAMTEST is not set
-CONFIG_SYSTEM_READLINE=y
-CONFIG_READLINE_ECHO=y
-# CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
-# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/compal_e99/scripts/compalram.ld b/configs/compal_e99/scripts/compalram.ld
deleted file mode 100644
index 52554ddacbd796006bd074458c1cd7debec1e1f6..0000000000000000000000000000000000000000
--- a/configs/compal_e99/scripts/compalram.ld
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * Linker script for running from internal SRAM on Compal phones
- *
- * This script is tailored specifically to the requirements imposed
- * on us by the Compal bootloader.
- *
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(__start)
-MEMORY
-{
-    /* compal-loaded binary: our text, initialized data */
-    LRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00020000
-    /* compal-loaded binary: our unitialized data, stacks, heap */
-    IRAM (rw) : ORIGIN = 0x00820000, LENGTH = 0x00020000
-}
-SECTIONS
-{
-    . = 0x800000;
-
-    /* romloader data section, contains passthru interrupt vectors */
-    .compal.loader (NOLOAD) : { . = 0x100; } > LRAM
-
-    /* image signature (prepended by osmocon according to phone type) */
-    .compal.header (NOLOAD) : { . = 4; } > LRAM
-
-    /* initialization code */
-    . = ALIGN(4);
-    .text.start : {
-        PROVIDE(__start = .);
-        KEEP(*(.text.start))
-        *(.text.start)
-    } > LRAM
-
-    /* exception vectors from 0x80001c to 0x800034 */
-    .text.exceptions 0x80001c : AT (LOADADDR(.text.start) + SIZEOF(.text.start)) {
-        KEEP(*(.text.exceptions))
-        * (.text.exceptions)
-        . = ALIGN(4);
-    } > LRAM
-    PROVIDE(_exceptions = LOADADDR(.text.exceptions));
-
-    /* code */
-    . = ALIGN(4);
-    .text (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) :
-          AT (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) {
-        /* regular code */
-        *(.text*)
-        /* always-in-ram code */
-        *(.ramtext*)
-        /* gcc voodoo */
-        *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx)
-        . = ALIGN(4);
-    } > LRAM
-    PROVIDE(_text_start = LOADADDR(.text));
-    PROVIDE(_text_end = LOADADDR(.text) + SIZEOF(.text));
-
-    /* constructor pointers */
-    .ctors : {
-        /* ctor count */
-        LONG(SIZEOF(.ctors) / 4 - 2)
-        /* ctor pointers */
-        KEEP(*(SORT(.ctors)))
-        /* end of list */
-        LONG(0)
-    } > LRAM
-    PROVIDE(_ctor_start = LOADADDR(.ctors));
-    PROVIDE(_ctor_end = LOADADDR(.ctors) + SIZEOF(.ctors));
-
-    /* destructor pointers */
-    .dtors : {
-        /* dtor count */
-        LONG(SIZEOF(.dtors) / 4 - 2)
-        /* dtor pointers */
-        KEEP(*(SORT(.dtors)))
-        /* end of list */
-        LONG(0)
-    } > LRAM
-    PROVIDE(_dtor_start = LOADADDR(.dtors));
-    PROVIDE(_dtor_end = LOADADDR(.dtors) + SIZEOF(.dtors));
-
-    /* read-only data */
-    . = ALIGN(4);
-    .rodata : {
-        *(.rodata*)
-    } > LRAM
-    PROVIDE(_rodata_start = LOADADDR(.rodata));
-    PROVIDE(_rodata_end = LOADADDR(.rodata) + SIZEOF(.rodata));
-
-    /* initialized data */
-    . = ALIGN(4);
-    .data : {
-        *(.data)
-    } > LRAM
-    PROVIDE(_data_start = LOADADDR(.data));
-    PROVIDE(_data_end = LOADADDR(.data) + SIZEOF(.data));
-
-    /* pic offset tables */
-    . = ALIGN(4);
-    .got : {
-        *(.got)
-        *(.got.plt) *(.igot.plt) *(.got) *(.igot)
-    } > LRAM
-    PROVIDE(_got_start = LOADADDR(.got));
-    PROVIDE(_got_end = LOADADDR(.got) + SIZEOF(.got));
-
-    /* uninitialized data */
-    .bss (NOLOAD) : {
-        . = ALIGN(4);
-        __bss_start = .;
-        _sbss = ABSOLUTE(.);
-        *(.bss)
-        _ebss = ABSOLUTE(.);
-    } > IRAM
-    . = ALIGN(4);
-    __bss_end = .;
-    PROVIDE(_bss_start = __bss_start);
-    PROVIDE(_bss_end = __bss_end);
-
-    /* end of image */
-    . = ALIGN(4);
-    _end = .;
-    PROVIDE(end = .);
-}
diff --git a/configs/compal_e99/scripts/highram.ld b/configs/compal_e99/scripts/highram.ld
deleted file mode 100644
index db72f251aa26cca2f27c9257ee797195715016b2..0000000000000000000000000000000000000000
--- a/configs/compal_e99/scripts/highram.ld
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * Linker script for running from internal SRAM on Compal phones
- *
- * This script is tailored specifically to the requirements imposed
- * on us by the Compal bootloader.
- *
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(__start)
-MEMORY
-{
-    /* 0x800000-0xa00000 */
-    /* compal-loaded binary: our text, initialized data */
-    LRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00020000
-    TRAM (rw) : ORIGIN = 0x00820000, LENGTH = 0x0001d000
-    /* compal-loaded binary: our unitialized data, stacks, heap */
-    IRAM (rw) : ORIGIN = 0x0083d000, LENGTH = 0x00002000
-}
-SECTIONS
-{
-    . = 0x800000;
-
-    /* romloader data section, contains passthru interrupt vectors */
-    .compal.loader (NOLOAD) : { . = 0x100; } > LRAM
-
-    /* image signature (prepended by osmocon according to phone type) */
-    .compal.header (NOLOAD) : { . = 4; } > LRAM
-
-    /* initialization code */
-    . = ALIGN(4);
-    .text.start : {
-        PROVIDE(__start = .);
-        KEEP(*(.text.start))
-        *(.text.start)
-    } > TRAM
-
-    /* exception vectors from 0x80001c to 0x800034 */
-    .text.exceptions 0x80001c : AT (LOADADDR(.text.start) + SIZEOF(.text.start)) {
-        KEEP(*(.text.exceptions))
-        * (.text.exceptions)
-        . = ALIGN(4);
-    } > LRAM
-    PROVIDE(_exceptions = LOADADDR(.text.exceptions));
-
-    /* code */
-    . = ALIGN(4);
-    .text (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) :
-          AT (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) {
-        /* regular code */
-        *(.text*)
-        /* always-in-ram code */
-        *(.ramtext*)
-        /* gcc voodoo */
-        *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx)
-        . = ALIGN(4);
-    } > TRAM
-    PROVIDE(_text_start = LOADADDR(.text));
-    PROVIDE(_text_end = LOADADDR(.text) + SIZEOF(.text));
-
-    /* constructor pointers */
-    .ctors : {
-        /* ctor count */
-        LONG(SIZEOF(.ctors) / 4 - 2)
-        /* ctor pointers */
-        KEEP(*(SORT(.ctors)))
-        /* end of list */
-        LONG(0)
-    } > TRAM
-    PROVIDE(_ctor_start = LOADADDR(.ctors));
-    PROVIDE(_ctor_end = LOADADDR(.ctors) + SIZEOF(.ctors));
-
-    /* destructor pointers */
-    .dtors : {
-        /* dtor count */
-        LONG(SIZEOF(.dtors) / 4 - 2)
-        /* dtor pointers */
-        KEEP(*(SORT(.dtors)))
-        /* end of list */
-        LONG(0)
-    } > TRAM
-    PROVIDE(_dtor_start = LOADADDR(.dtors));
-    PROVIDE(_dtor_end = LOADADDR(.dtors) + SIZEOF(.dtors));
-
-    /* read-only data */
-    . = ALIGN(4);
-    .rodata : {
-        *(.rodata*)
-    } > TRAM
-    PROVIDE(_rodata_start = LOADADDR(.rodata));
-    PROVIDE(_rodata_end = LOADADDR(.rodata) + SIZEOF(.rodata));
-
-    /* initialized data */
-    . = ALIGN(4);
-    .data : {
-        *(.data)
-    } > TRAM
-    PROVIDE(_data_start = LOADADDR(.data));
-    PROVIDE(_data_end = LOADADDR(.data) + SIZEOF(.data));
-
-    /* pic offset tables */
-    . = ALIGN(4);
-    .got : {
-        *(.got)
-        *(.got.plt) *(.igot.plt) *(.got) *(.igot)
-    } > TRAM
-    PROVIDE(_got_start = LOADADDR(.got));
-    PROVIDE(_got_end = LOADADDR(.got) + SIZEOF(.got));
-
-    /* uninitialized data */
-    .bss (NOLOAD) : {
-        . = ALIGN(4);
-        __bss_start = .;
-        _sbss = ABSOLUTE(.);
-        *(.bss)
-        _ebss = ABSOLUTE(.);
-    } > IRAM
-    . = ALIGN(4);
-    __bss_end = .;
-    PROVIDE(_bss_start = __bss_start);
-    PROVIDE(_bss_end = __bss_end);
-
-    /* end of image */
-    . = ALIGN(4);
-    _end = .;
-    PROVIDE(end = .);
-}
diff --git a/configs/compal_e99/src/ssd1783.c b/configs/compal_e99/src/ssd1783.c
deleted file mode 100644
index e33cbd4f80e11d20d03df1702bbe9a4d473322e9..0000000000000000000000000000000000000000
--- a/configs/compal_e99/src/ssd1783.c
+++ /dev/null
@@ -1,548 +0,0 @@
-/************************************************************************************
- * nuttx/configs/compal_e99/src/ssd1783.c
- *
- *   Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
- *           Laurent Latil 
- *           Denis 'GNUtoo' Carikli 
- *           Alan Carvalho de Assis 
- *
- * This driver for SSD1783 used part of SSD1783 driver developed by
- * Christian Vogel  for Osmocom-BB and relicensed
- * to BSD with permission from author.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ************************************************************************************/
-
-/************************************************************************************
- * Included Files
- ************************************************************************************/
-
-#include 
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-#include 
-#include 
-
-#include "up_arch.h"
-#include "ssd1783.h"
-
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Color depth and format */
-
-#define LCD_BPP          16
-#define LCD_COLORFMT     FB_FMT_RGB16_555
-
-/* Display Resolution */
-
-#define LCD_XRES         98
-#define LCD_YRES         67
-
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-# define lcddbg(format, ...)  vdbg(format, ##__VA_ARGS__)
-#else
-# define lcddbg(x...)
-#endif
-
-/** This should be put elsewhere */
-#ifdef __CC_ARM               /* ARM Compiler        */
-#define lcd_inline            static __inline
-#elif defined (__ICCARM__)    /* for IAR Compiler */
-#define lcd_inline            inline
-#elif defined (__GNUC__)      /* GNU GCC Compiler */
-#define lcd_inline            static __inline
-#else
-#define lcd_inline            static
-#endif
-
-static void lcd_clear(void);
-static void fb_ssd1783_send_cmdlist(const struct ssd1783_cmdlist *p);
-
-/* LCD Data Transfer Methods */
-int lcd_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
-    size_t npixels);
-int lcd_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
-    size_t npixels);
-
-/* LCD Configuration */
-static int lcd_getvideoinfo(FAR struct lcd_dev_s *dev,
-    FAR struct fb_videoinfo_s *vinfo);
-static int lcd_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
-    FAR struct lcd_planeinfo_s *pinfo);
-
-/* LCD RGB Mapping */
-#ifdef CONFIG_FB_CMAP
-#  error "RGB color mapping not supported by this driver"
-#endif
-
-/* Cursor Controls */
-#ifdef CONFIG_FB_HWCURSOR
-#  error "Cursor control not supported by this driver"
-#endif
-
-/* LCD Specific Controls */
-static int lcd_getpower(struct lcd_dev_s *dev);
-static int lcd_setpower(struct lcd_dev_s *dev, int power);
-static int lcd_getcontrast(struct lcd_dev_s *dev);
-static int lcd_setcontrast(struct lcd_dev_s *dev, unsigned int contrast);
-
-/* Initialization (LCD ctrl / backlight) */
-static inline void lcd_initialize(void);
-
-/**************************************************************************************
- * Private Data
- **************************************************************************************/
-
-/* This is working memory allocated by the LCD driver for each LCD device
- * and for each color plane.  This memory will hold one raster line of data.
- * The size of the allocated run buffer must therefore be at least
- * (bpp * xres / 8).  Actual alignment of the buffer must conform to the
- * bitwidth of the underlying pixel type.
- *
- * If there are multiple planes, they may share the same working buffer
- * because different planes will not be operate on concurrently.  However,
- * if there are multiple LCD devices, they must each have unique run buffers.
- */
-
-static uint16_t g_runbuffer[LCD_XRES];
-
-/* This structure describes the overall LCD video controller */
-
-static const struct fb_videoinfo_s g_videoinfo =
-{
-  .fmt = LCD_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */
-  .xres = LCD_XRES, /* Horizontal resolution in pixel columns */
-  .yres = LCD_YRES, /* Vertical resolutiSend a command list to the LCD panelon in pixel rows */
-  .nplanes = 1, /* Number of color planes supported */
-};
-
-/* This is the standard, NuttX Plane information object */
-
-static const struct lcd_planeinfo_s g_planeinfo =
-{
-  .putrun = lcd_putrun, /* Put a run into LCD memory */
-//  .getrun = lcd_getrun, /* Get a run from LCD memory */
-  .buffer = (uint8_t*) g_runbuffer, /* Run scratch buffer */
-  .bpp = LCD_BPP, /* Bits-per-pixel */
-};
-
-/* This is the standard, NuttX LCD driver object */
-
-static struct ssd1783_dev_s g_lcddev =
-{
-  .dev =
-  {
-    /* LCD Configuration */
-
-    .getvideoinfo = lcd_getvideoinfo,
-    .getplaneinfo = lcd_getplaneinfo,
-
-/* LCD RGB Mapping -- Not supported */
-/* Cursor Controls -- Not supported */
-
-/* LCD Specific Controls */
-    .getpower = lcd_getpower,
-    .setpower = lcd_setpower,
-//    .getcontrast = lcd_getcontrast,
-//    .setcontrast = lcd_setcontrast,
-  },
-  .power=0
-};
-
-/* we trust gcc to move this expensive bitshifting out of
- * the loops in the drawing funtcions
- */
-
-static uint8_t rgb_to_pixel(uint16_t color)
-{
-  uint8_t ret;
-
-  ret  = (FB_COLOR_TO_R(color) & 0xe0);      /* 765 = RRR */
-  ret |= (FB_COLOR_TO_G(color) & 0xe0) >> 3; /* 432 = GGG */
-  ret |= (FB_COLOR_TO_B(color) & 0xc0) >> 6; /*  10 =  BB */
-
-  return ret;
-}
-
-/* somehow the palette is messed up, RRR seems to have the
- * bits reversed!  R0 R1 R2 G G G B B ---> R2 R1 R0 G G G B B 
- */
-
-uint8_t fix_rrr(uint8_t v)
-{
-  return (v & 0x5f) | (v & 0x80) >> 2 | (v & 0x20) << 2;
-}
-
-
-lcd_inline void write_data(uint16_t datain)
-{
-  uint16_t dataout = 0x0100 | fix_rrr(rgb_to_pixel(datain));
-  uwire_xfer(SSD1783_DEV_ID,SSD1783_UWIRE_BITLEN,&dataout, NULL);
-}
-
-static void fb_ssd1783_send_cmdlist(const struct ssd1783_cmdlist *p)
-{
-  int i=0;
-
-  while (p->is_cmd != END)
-    {
-      uint16_t sendcmd = p->data;
-      if (p->is_cmd == DATA)
-        {
-          sendcmd |= 0x0100; /* 9th bit is cmd/data flag */
-        }
-
-      uwire_xfer(SSD1783_DEV_ID, SSD1783_UWIRE_BITLEN, &sendcmd, NULL);
-      p++;
-      i++;
-    }
-}
-
-static void lcd_write_prepare(unsigned int x1, unsigned int x2, unsigned int y1, unsigned int y2)
-{;
-  DEBUGASSERT( (x1 < x2 )&& (y1 < y2));
-  struct ssd1783_cmdlist prepare_disp_write_cmds[] = {
-    { CMD,  0x15 },                  /*  set column address */
-    { DATA, x1 },
-    { DATA, x2 },
-    { CMD,  0x75 },                 /*  set page address (Y) */
-    { DATA, y1 },
-    { DATA, y2 },
-    { CMD,  0x5c },                  /* enter write display ram mode */
-    { END,  0x00 }
-  };
-  dbg("x1:%d, x2:%d, y1:%d, y2:%d\n",x1, x2,y1, y2);
-  fb_ssd1783_send_cmdlist(prepare_disp_write_cmds);
-}
-
-/**************************************************************************************
- * Name:  lcd_putrun
- *
- * Description:
- *   This method can be used to write a partial raster line to the LCD:
- *
- *   row     - Starting row to write to (range: 0 <= row < yres)
- *   col     - Starting column to write to (range: 0 <= col <= xres-npixels)
- *   buffer  - The buffer containing the run to be written to the LCD
- *   npixels - The number of pixels to write to the LCD
- *             (range: 0 < npixels <= xres-col)
- *
- **************************************************************************************/
-
-int lcd_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
-    size_t npixels)
-{
-  int i;
-  FAR const uint16_t *src = (FAR const uint16_t*) buffer;
-
-  /* Buffer must be provided and aligned to a 16-bit address boundary */
-  DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
-
-
-  /* Write the run to GRAM. */
-  lcd_write_prepare(col,col+npixels, row,row+1);
-
-  for (i = 0; i < npixels; i++)
-  {
-    write_data(*src++);
-  }
-  fb_ssd1783_send_cmdlist(nop);
-
-  return OK;
-}
-
-/**************************************************************************************
- * Name:  lcd_getrun
- *
- * Description:
- *   This method can be used to read a partial raster line from the LCD:
- *
- *  row     - Starting row to read from (range: 0 <= row < yres)
- *  col     - Starting column to read read (range: 0 <= col <= xres-npixels)
- *  buffer  - The buffer in which to return the run read from the LCD
- *  npixels - The number of pixels to read from the LCD
- *            (range: 0 < npixels <= xres-col)
- *
- **************************************************************************************/
-
-int lcd_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
-    size_t npixels)
-{
-  gvdbg("Not implemented\n");
-  return -ENOSYS;
-}
-
-/**************************************************************************************
- * Name:  lcd_getvideoinfo
- *
- * Description:
- *   Get information about the LCD video controller configuration.
- *
- **************************************************************************************/
-
-static int lcd_getvideoinfo(FAR struct lcd_dev_s *dev,
-    FAR struct fb_videoinfo_s *vinfo)
-{
-  DEBUGASSERT(dev && vinfo);gvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
-      g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
-  memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
-  return OK;
-}
-
-/**************************************************************************************
- * Name:  lcd_getplaneinfo
- *
- * Description:
- *   Get information about the configuration of each LCD color plane.
- *
- **************************************************************************************/
-
-static int lcd_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
-    FAR struct lcd_planeinfo_s *pinfo)
-{
-  DEBUGASSERT(dev && pinfo && planeno == 0);gvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
-  memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
-  return OK;
-}
-
-/**************************************************************************************
- * Name:  lcd_getpower
- *
- * Description:
- *   Get the LCD panel power status (0: full off - CONFIG_LCD_MAXPOWER: full on). On
- *   backlit LCDs, this setting may correspond to the backlight setting.
- *
- **************************************************************************************/
-
-static int lcd_getpower(struct lcd_dev_s *dev)
-{
-  gvdbg("power: %d\n", 0);
-  return g_lcddev.power;
-}
-
-/**************************************************************************************
- * Name:  lcd_setpower
- *
- * Description:
- *   Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on).
- *   Used here to set pwm duty on timer used for backlight.
- *
- **************************************************************************************/
-
-static int lcd_setpower(struct lcd_dev_s *dev, int power)
-{
-  uint16_t reg;
-
-  if (g_lcddev.power == power) {
-    return OK;
-  }
-
-  gvdbg("power: %d\n", power);
-  DEBUGASSERT(power <= CONFIG_LCD_MAXPOWER);
-
-  /* Set new power level */
-  reg = getreg16(ASIC_CONF_REG);
-  if (power)
-    {
-      reg = getreg16(ASIC_CONF_REG);
-      /* LCD Set I/O(3) / SA0 to I/O(3) mode */
-      reg &= ~( (1 << 12) | (1 << 10) | (1 << 7) | (1 << 1)) ;
-      /* don't set function pins to I2C Mode, C155 uses UWire */
-      /* TWL3025: Set SPI+RIF RX clock to rising edge */
-      reg |= (1 << 13) | (1 << 14);
-      putreg16(reg, ASIC_CONF_REG);
-
-      /* LCD Set I/O(3) to output mode and enable C155 backlight (IO1) */
-      /* FIXME: Put the display backlight control to backlight.c */
-      reg = getreg16(IO_CNTL_REG);
-      reg &= ~( (1 << 3) | (1 << 1));
-      putreg16(reg, IO_CNTL_REG);
-
-      /* LCD Set I/O(3) output low */
-      reg = getreg16(ARMIO_LATCH_OUT);
-      reg &= ~(1 << 3);
-      reg |= (1 << 1);
-      putreg16(reg, ARMIO_LATCH_OUT);
-    }
-    else
-    {
-      gvdbg("powering LCD off...\n");
-      /* Switch pin from PWL to LT */
-      reg &= ~ASCONF_PWL_ENA;
-      putreg8(reg, ASIC_CONF_REG);
-      /* Disable pwl */
-      putreg8(0x00, PWL_REG(PWL_CTRL));
-    }
-    return OK;
-}
-
-
-/**************************************************************************************
- * Name:  lcd_getcontrast
- *
- * Description:
- *   Get the current contrast setting (0-CONFIG_LCD_MAXCONTRAST).
- *
- **************************************************************************************/
-
-static int lcd_getcontrast(struct lcd_dev_s *dev)
-{
-  gvdbg("Not implemented\n");
-  return -ENOSYS;
-}
-
-/**************************************************************************************
- * Name:  lcd_setcontrast
- *
- * Description:
- *   Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST).
- *
- **************************************************************************************/
-
-static int lcd_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
-{
-  gvdbg("Not implemented\n");
-  return -ENOSYS;
-}
-
-/**************************************************************************************
- * Name:  lcd_lcdinitialize
- *
- * Description:
- *   Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST).
- *
- **************************************************************************************/
-static inline void lcd_initialize(void)
-{
-  gvdbg("%s: initializing LCD.\n",__FUNCTION__);
-  calypso_reset_set(RESET_EXT, 0);
-  usleep(5000);
-  uwire_init();
-  usleep(5000);
-  fb_ssd1783_send_cmdlist(ssd1783_initdata);
-}
-
-/**************************************************************************************
- * Public Functions
- **************************************************************************************/
-
-
-/**************************************************************************************
- * Name:  board_lcd_initialize
- *
- * Description:
- *   Initialize the LCD video hardware.  The initial state of the LCD is fully
- *   initialized, display memory cleared, and the LCD ready to use, but with the power
- *   setting at 0 (full off).
- *
- **************************************************************************************/
-
-int board_lcd_initialize(void)
-{
-  gvdbg("Initializing\n");
-
-  lcd_initialize();
-
-  /* Clear the display  */
-  lcd_clear();
-
-  return OK;
-}
-
-/**************************************************************************************
- * Name:  board_lcd_getdev
- *
- * Description:
- *   Return a a reference to the LCD object for the specified LCD.  This allows support
- *   for multiple LCD devices.
- *
- **************************************************************************************/
-
-FAR struct lcd_dev_s *board_lcd_getdev(int lcddev)
-{
-  DEBUGASSERT(lcddev == 0);
-  return &g_lcddev.dev;
-}
-
-
-/**************************************************************************************
- * Name:  board_lcd_uninitialize
- *
- * Description:
- *   Un-initialize the LCD support
- *
- **************************************************************************************/
-
-void board_lcd_uninitialize(void)
-{
-  lcd_setpower(&g_lcddev.dev, 0);
-}
-
-/**************************************************************************************
- * Name:  lcd_clear
- *
- * Description:
- *   Fill the LCD ctrl memory with given color
- *
- **************************************************************************************/
-
-void lcd_clear()
-{
-  struct ssd1783_cmdlist prepare_disp_write_cmds[] =
-  {
-    { CMD,  0x8E },
-    { DATA, 0x00 },
-    { DATA, 0x00 },
-    { DATA, LCD_XRES },
-    { DATA, LCD_YRES },
-    { END,  0x00 }
-  };
-
-  struct ssd1783_cmdlist nop_command[] =
-  {
-    { CMD, 0x25 }, // NOP command
-    { END, 0x00 }
-  };
-
-  fb_ssd1783_send_cmdlist(prepare_disp_write_cmds);
-  fb_ssd1783_send_cmdlist(nop_command);
-}
diff --git a/configs/compal_e99/src/ssd1783.h b/configs/compal_e99/src/ssd1783.h
deleted file mode 100644
index 50ec44925909b81b61924e45f279bffaa0608dfa..0000000000000000000000000000000000000000
--- a/configs/compal_e99/src/ssd1783.h
+++ /dev/null
@@ -1,110 +0,0 @@
-#ifndef SSD1783_H_
-#define SSD1783_H_
-
-#include 
-
-#define FB_COLOR_TO_R(v)                (((v)>>16) & 0xff)
-#define FB_COLOR_TO_G(v)                (((v)>> 8) & 0xff)
-#define FB_COLOR_TO_B(v)                ( (v)      & 0xff)
-
-#define SSD1783_UWIRE_BITLEN    9
-#define SSD1783_DEV_ID          0
-
-#define ARMIO_LATCH_OUT 0xfffe4802
-#define IO_CNTL_REG    0xfffe4804
-#define ASIC_CONF_REG  0xfffef008
-
-#define ASCONF_PWL_ENA  (1 << 4)
-
-/* begin backlight.c */
-#define BASE_ADDR_PWL   0xfffe8000
-#define PWL_REG(m)      (BASE_ADDR_PWL + (m))
-
-enum pwl_reg {
-        PWL_LEVEL       = 0,
-        PWL_CTRL        = 1,
-};
-
-enum ssd1783_cmdflag { CMD, DATA, END };
-
-struct ssd1783_cmdlist {
-  enum ssd1783_cmdflag is_cmd:8;	/* 1: is a command, 0: is data, 2: end marker! */
-  uint8_t data;  			/* 8 bit to send to LC display */
-} __attribute__((packed));
-
-static const struct ssd1783_cmdlist nop[] = {
-  { CMD, 0x25 }, // NOP command
-  { END, 0x00 }
-};
-
-static const struct ssd1783_cmdlist
-ssd1783_initdata[] = {
-  { CMD,  0xD1 }, /* CMD   set internal oscillator on */
-  { CMD,  0x94 }, /* CMD   leave sleep mode */
-  { CMD,  0xbb }, /* CMD   Set COM Output Scan Direction: */
-  { DATA, 0x01 }, /* DATA: 01: COM0-79, then COM159-80 */
-/* -------- DIFFERENT FROM ORIGINAL CODE: -------------- */
-/* we use 8bit per pixel packed RGB 332 */
-  { CMD,  0xbc }, /* CMD   Set Data Output Scan Direction */
-  { DATA, 0x00 }, /* DATA: column scan, normal rotation, normal display */
-  { DATA, 0x00 }, /* DATA: RGB color arrangement R G B R G B ... */
-/*-->*/ { DATA, 0x01 }, /* DATA: 8 bit per pixel mode MSB  LSB */
-/* --------- /DIFFERENT ---------- */
-  { CMD,  0xce }, /* CMD   Set 256 Color Look Up Table LUT */
-  { DATA, 0x00 },	/* DATA red 000 */
-  { DATA, 0x03 },	/* DATA red 001 */
-  { DATA, 0x05 },	/* DATA red 010 */
-  { DATA, 0x07 },	/* DATA red 011 */
-  { DATA, 0x09 },	/* DATA red 100 */
-  { DATA, 0x0b },	/* DATA red 101 */
-  { DATA, 0x0d },	/* DATA red 110 */
-  { DATA, 0x0f },	/* DATA red 111 */
-  { DATA, 0x00 },	/* DATA green 000 */
-  { DATA, 0x03 },	/* DATA green 001 */
-  { DATA, 0x05 },	/* DATA green 010 */
-  { DATA, 0x07 },	/* DATA green 011 */
-  { DATA, 0x09 },	/* DATA green 100 */
-  { DATA, 0x0b },	/* DATA green 101 */
-  { DATA, 0x0d },	/* DATA green 110 */
-  { DATA, 0x0f },	/* DATA green 111 */
-  { DATA, 0x00 },	/* DATA blue 00 */
-  { DATA, 0x05 },	/* DATA blue 01 */
-  { DATA, 0x0a },	/* DATA blue 10 */
-  { DATA, 0x0f },	/* DATA blue 11 */
-  { CMD,  0xca }, /* CMD   Set Display Control - Driver Duty Selection */
-  { DATA, 0xff }, // can't find description of the values in the original
-  { DATA, 0x10 }, // display/ssd1783.c in my datasheet :-(
-  { DATA, 0x01 }, //
-  { CMD,  0xab }, /* CMD   Set Scroll Start */
-  { DATA, 0x00 }, /* DATA: Starting address at block 0 */
-  { CMD,  0x20 }, /* CMD   Set power control register */
-  { DATA, 0x0b }, /* DATA: booster 6x, reference gen. & int regulator */
-  { CMD,  0x81 }, /* CMD   Contrast Lvl & Int. Regul. Resistor Ratio */
-  { DATA, 0x29 }, /* DATA: contrast = 0x29 */
-  { DATA, 0x05 }, /* DATA: 0x05 = 0b101 -> 1+R2/R1 = 11.37 */
-  { CMD,  0xa7 }, /* CMD   Invert Display */
-  { CMD,  0x82 }, /* CMD   Set Temperature Compensation Coefficient */
-  { DATA, 0x00 }, /* DATA: Gradient is -0.10 % / degC */
-  { CMD,  0xfb }, /* CMD   Set Biasing Ratio */
-  { DATA, 0x03 }, /* DATA: 1/10 bias */
-  { CMD,  0xf2 }, /* CMD   Set Frame Frequency and N-line inversion */
-  { DATA, 0x08 }, /* DATA: 75 Hz (POR) */
-  { DATA, 0x06 }, /* DATA: n-line inversion: 6 lines */
-  { CMD,  0xf7 }, /* CMD   Select PWM/FRC Select Full Col./8col mode */
-  { DATA, 0x28 }, /* DATA: always 0x28 */
-  { DATA, 0x8c }, /* DATA: 4bit PWM + 2 bit FRC */
-  { DATA, 0x05 }, /* DATA: full color mode */
-  { CMD,  0xaf }, /* CMD   Display On */
-  { END,  0x00 }, /* MARKER: end of list */
-};
-
-struct ssd1783_dev_s
-{
-  /* Publicly visible device structure */
-  struct lcd_dev_s dev;
-
-  /* Private LCD-specific information follows */
-  uint8_t power; /* Current power setting */
-};
-
-#endif /* SSD1783_H_ */
diff --git a/configs/demo9s12ne64/README.txt b/configs/demo9s12ne64/README.txt
index 7ec1b55471e1e042f0363fecd2e8a74a1aff06f1..48080bed70fa39e5c124e50ec083a1208add31cf 100644
--- a/configs/demo9s12ne64/README.txt
+++ b/configs/demo9s12ne64/README.txt
@@ -315,7 +315,7 @@ HCS12/DEMO9S12NEC64-specific Configuration Options
 
   GPIO Interrupts
 
-    CONFIG_GPIO_IRQ - Enable general support for GPIO IRQs
+    CONFIG_HCS12_GPIOIRQ - Enable general support for GPIO IRQs
     CONFIG_HCS12_PORTG_INTS - Enable PortG IRQs
     CONFIG_HCS12_PORTH_INTS - Enable PortH IRQs
     CONFIG_HCS12_PORTJ_INTS - Enable PortJ IRQs
diff --git a/configs/demo9s12ne64/ostest/Make.defs b/configs/demo9s12ne64/ostest/Make.defs
index 10da8b273bcdba9e2affcdae8013cc9922a77554..ade31496484d169bbe3d40e4422025cc2f556686 100644
--- a/configs/demo9s12ne64/ostest/Make.defs
+++ b/configs/demo9s12ne64/ostest/Make.defs
@@ -93,7 +93,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/demo9s12ne64/ostest/defconfig b/configs/demo9s12ne64/ostest/defconfig
index b5f8ba3a5d6162332eb7956c445ef1c9feef561d..87a3ad4484cb2ae52f7349ac08c6a5805756e961 100644
--- a/configs/demo9s12ne64/ostest/defconfig
+++ b/configs/demo9s12ne64/ostest/defconfig
@@ -38,7 +38,7 @@ CONFIG_MOTOROLA_SREC=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
@@ -53,8 +53,7 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 CONFIG_ARCH_HC=y
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -187,7 +186,7 @@ CONFIG_USER_ENTRYPOINT="ostest_main"
 CONFIG_DISABLE_OS_API=y
 CONFIG_DISABLE_POSIX_TIMERS=y
 CONFIG_DISABLE_PTHREAD=y
-CONFIG_DISABLE_SIGNALS=y
+# CONFIG_DISABLE_SIGNALS is not set
 CONFIG_DISABLE_MQUEUE=y
 CONFIG_DISABLE_ENVIRON=y
 
@@ -243,7 +242,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 # CONFIG_16550_UART is not set
@@ -292,7 +290,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # System Logging
 #
 
-# CONFIG_SYSLOG is not set
 
 #
 # Graphics Support
@@ -349,7 +346,6 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Non-standard Library Support
@@ -413,7 +409,6 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
diff --git a/configs/demo9s12ne64/src/m9s12_leds.c b/configs/demo9s12ne64/src/m9s12_leds.c
index 11fc1c6915093cea90a6281f05710fcd6d262863..6f8fd77ebb1b011eefee759459710e69796085d8 100644
--- a/configs/demo9s12ne64/src/m9s12_leds.c
+++ b/configs/demo9s12ne64/src/m9s12_leds.c
@@ -46,30 +46,6 @@
 
 #include "demo9s12ne64.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/demo9s12ne64/src/m9s12_spi.c b/configs/demo9s12ne64/src/m9s12_spi.c
index b418635021f66b6c64b909ccd026f42ab303482f..e296ee5595bdb7131b5c59aa8dafbd3c9adbb153 100644
--- a/configs/demo9s12ne64/src/m9s12_spi.c
+++ b/configs/demo9s12ne64/src/m9s12_spi.c
@@ -50,32 +50,6 @@
 
 #if defined(CONFIG_HCS12_SPI)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
diff --git a/configs/dk-tm4c129x/README.txt b/configs/dk-tm4c129x/README.txt
index 32e48d6e7ea769d73f2ef674fb3b29cde335cc2c..bf81eb4f73bfc3328dc943c1949f208ecd2b9a34 100644
--- a/configs/dk-tm4c129x/README.txt
+++ b/configs/dk-tm4c129x/README.txt
@@ -226,9 +226,7 @@ Networking Support
   Networking Support
     CONFIG_NET=y                        : Enable Neworking
     CONFIG_NET_ETHERNET=y               : Support Ethernet data link
-    CONFIG_NET_NOINTS=y                 : Should operative at non-interrupt level
     CONFIG_NET_SOCKOPTS=y               : Enable socket operations
-    CONFIG_NET_MULTIBUFFER=y            : Multi-packet buffer option required
     CONFIG_NET_ETH_MTU=590              : Maximum packet size (MTU) 1518 is more standard
     CONFIG_NET_ETH_TCP_RECVWNDO=536     : Should be the same as CONFIG_NET_ETH_MTU
     CONFIG_NET_ARP=y                    : Enable ARP
@@ -449,7 +447,7 @@ f Application Configuration -> Network Utilities
 Timers
 ======
 
-  Tiva timers may be enbled in 32-bit periodic mode using these settings.
+  Tiva timers may be enabled in 32-bit periodic mode using these settings.
 
   This settings enables the "upper half" timer driver:
 
diff --git a/configs/dk-tm4c129x/ipv6/Make.defs b/configs/dk-tm4c129x/ipv6/Make.defs
index 4bfa5b11400afe41de3f33584ed83ca99b0e9592..549d8e15041e6f7e9fe9112419f1f7d874868b18 100644
--- a/configs/dk-tm4c129x/ipv6/Make.defs
+++ b/configs/dk-tm4c129x/ipv6/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/dk-tm4c129x/ipv6/defconfig b/configs/dk-tm4c129x/ipv6/defconfig
index de1c4d8fbd51714383fd28c6ac70ec290d8564d4..d7444139f6630ff9f7f01323bd6d0e0c9849addc 100644
--- a/configs/dk-tm4c129x/ipv6/defconfig
+++ b/configs/dk-tm4c129x/ipv6/defconfig
@@ -41,14 +41,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -62,10 +64,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -75,14 +79,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
 CONFIG_ARCH_CHIP_TIVA=y
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -91,29 +96,54 @@ CONFIG_ARCH_CHIP_TIVA=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
 CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="tiva"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
 CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
 # CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
 # ARMV7M Configuration Options
 #
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -122,6 +152,7 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 
 #
@@ -139,6 +170,9 @@ CONFIG_ARCH_CHIP_TM4C=y
 #
 # Tiva/Stellaris Peripheral Support
 #
+# CONFIG_TIVA_ADC is not set
+CONFIG_TIVA_HAVE_ADC0=y
+CONFIG_TIVA_HAVE_ADC1=y
 CONFIG_TIVA_I2C=y
 CONFIG_TIVA_HAVE_I2C1=y
 CONFIG_TIVA_HAVE_I2C2=y
@@ -161,11 +195,16 @@ CONFIG_TIVA_HAVE_SSI3=y
 CONFIG_TIVA_HAVE_ETHERNET=y
 # CONFIG_TIVA_SSI is not set
 # CONFIG_TIVA_TIMER is not set
+CONFIG_TIVA_HAVE_TIMER0=y
+CONFIG_TIVA_HAVE_TIMER1=y
+CONFIG_TIVA_HAVE_TIMER2=y
 CONFIG_TIVA_HAVE_TIMER3=y
 CONFIG_TIVA_HAVE_TIMER4=y
 CONFIG_TIVA_HAVE_TIMER5=y
 CONFIG_TIVA_HAVE_TIMER6=y
 CONFIG_TIVA_HAVE_TIMER7=y
+# CONFIG_TIVA_ADC0 is not set
+# CONFIG_TIVA_ADC1 is not set
 # CONFIG_TIVA_I2C0 is not set
 # CONFIG_TIVA_I2C1 is not set
 # CONFIG_TIVA_I2C2 is not set
@@ -233,7 +272,7 @@ CONFIG_TIVA_I2C_TIMEOMS=500
 CONFIG_TIVA_I2C_TIMEOTICKS=500
 
 #
-# Tiva Ethernet Configuration
+# Ethernet Configuration
 #
 CONFIG_TIVA_PHY_INTERNAL=y
 CONFIG_TIVA_AUTONEG=y
@@ -241,6 +280,7 @@ CONFIG_TIVA_PHY_INTERRUPTS=y
 CONFIG_TIVA_EMAC_NRXDESC=8
 CONFIG_TIVA_EMAC_NTXDESC=4
 # CONFIG_TIVA_EMAC_ENHANCEDDESC is not set
+CONFIG_TIVA_ETHERNET_HPWORK=y
 CONFIG_TIVA_BOARDMAC=y
 
 #
@@ -254,11 +294,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -314,11 +357,17 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
 
 #
 # RTOS Features
@@ -336,6 +385,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=3
@@ -353,6 +403,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=31
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -389,6 +440,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -404,9 +456,10 @@ CONFIG_SIG_SIGWORK=17
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -430,6 +483,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -440,24 +494,55 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 CONFIG_I2C=y
 # CONFIG_I2C_SLAVE is not set
 # CONFIG_I2C_POLLED is not set
 # CONFIG_I2C_TRACE is not set
+CONFIG_I2C_DRIVER=y
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
-# CONFIG_TIMER is not set
+# CONFIG_TIMERS_CS2100CP is not set
 # CONFIG_ANALOG is not set
 # CONFIG_AUDIO_DEVICES is not set
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -465,7 +550,11 @@ CONFIG_NETDEVICES=y
 #
 # General Ethernet MAC Driver Options
 #
+# CONFIG_NETDEV_LOOPBACK is not set
+# CONFIG_NETDEV_TELNET is not set
 # CONFIG_NETDEV_MULTINIC is not set
+# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set
+# CONFIG_NETDEV_LATEINIT is not set
 
 #
 # External Ethernet MAC Device Support
@@ -473,22 +562,44 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
-# CONFIG_NET_VNET is not set
+# CONFIG_NET_FTMAC100 is not set
 CONFIG_ARCH_PHY_INTERRUPT=y
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 CONFIG_SENSORS=y
+# CONFIG_AS5048B is not set
+# CONFIG_BH1750FVI is not set
+# CONFIG_BMG160 is not set
+# CONFIG_BMP180 is not set
+# CONFIG_SENSOR_KXTJ9 is not set
+# CONFIG_LIS3DSH is not set
 # CONFIG_LIS331DL is not set
+# CONFIG_SN_LSM9DS1 is not set
+# CONFIG_MB7040 is not set
+# CONFIG_MLX90393 is not set
+# CONFIG_MCP9844 is not set
+# CONFIG_MS58XX is not set
+CONFIG_MS58XX_VDD=30
+# CONFIG_MPL115A is not set
 # CONFIG_SENSORS_ADXL345 is not set
+# CONFIG_MAX31855 is not set
+# CONFIG_MAX6675 is not set
 CONFIG_I2C_LM75=y
+# CONFIG_LIS3MDL is not set
 CONFIG_LM75=y
+CONFIG_LM75_I2C_FREQUENCY=100000
+# CONFIG_LM92 is not set
 # CONFIG_QENCODER is not set
-# CONFIG_SERCOMM_CONSOLE is not set
+# CONFIG_VEML6070 is not set
+# CONFIG_XEN1210 is not set
+# CONFIG_ZEROCROSS is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -512,14 +623,11 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -536,18 +644,27 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -555,13 +672,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -571,6 +686,8 @@ CONFIG_NET_GUARDSIZE=2
 #
 # CONFIG_NET_MULTILINK is not set
 CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
+# CONFIG_NET_TUN is not set
 
 #
 # Network Device Operations
@@ -635,6 +752,7 @@ CONFIG_NET_ICMPv6_NEIGHBOR=y
 CONFIG_ICMPv6_NEIGHBOR_MAXTRIES=5
 CONFIG_ICMPv6_NEIGHBOR_DELAYMSEC=20
 # CONFIG_NET_ICMPv6_AUTOCONF is not set
+# CONFIG_NET_ICMPv6_ROUTER is not set
 
 #
 # IGMPv2 Client Support
@@ -661,6 +779,7 @@ CONFIG_NET_STATISTICS=y
 # Routing Table Configuration
 #
 # CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME=""
 
 #
 # Crypto API
@@ -683,18 +802,13 @@ CONFIG_NET_STATISTICS=y
 CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_FAT is not set
-# CONFIG_NFS is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -714,6 +828,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -741,6 +859,8 @@ CONFIG_LIBM=y
 CONFIG_LIBC_FLOATINGPOINT=y
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -753,15 +873,21 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_PERROR_STDOUT is not set
 CONFIG_ARCH_LOWPUTC=y
 # CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+CONFIG_LIBC_NETDB=y
+# CONFIG_NETDB_DNSCLIENT is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -778,23 +904,28 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -803,37 +934,46 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_UDPBLASTER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -845,41 +985,38 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
-# CONFIG_NETDB_DNSCLIENT is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
 # CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -899,13 +1036,16 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
 # CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -914,16 +1054,19 @@ CONFIG_NSH_BUILTIN_APPS=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -932,12 +1075,15 @@ CONFIG_NSH_BUILTIN_APPS=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -960,11 +1106,11 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
-CONFIG_LIB_BOARDCTL=y
 
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 CONFIG_NSH_NETINIT_THREAD=y
 CONFIG_NSH_NETINIT_MONITOR=y
 CONFIG_NSH_NETINIT_SIGNO=18
@@ -1013,6 +1159,8 @@ CONFIG_NSH_IPv6NETMASK_7=0xffff
 CONFIG_NSH_IPv6NETMASK_8=0xff80
 # CONFIG_NSH_NOMAC is not set
 CONFIG_NSH_MAX_ROUNDTRIP=20
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -1026,39 +1174,11 @@ CONFIG_NSH_MAX_ROUNDTRIP=20
 #
 # System Libraries and NSH Add-Ons
 #
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# EMACS-like Command Line Editor
-#
 # CONFIG_SYSTEM_CLE is not set
-
-#
-# CU Minimal Terminal
-#
 # CONFIG_SYSTEM_CUTERM is not set
-
-#
-# FLASH Program Installation
-#
-# CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# Intel HEX to binary conversion
-#
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-
-#
-# I2C tool
-#
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=6
 CONFIG_I2CTOOL_MAXBUS=6
@@ -1066,94 +1186,24 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=400000
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# NxPlayer media player library / command Line
-#
-
-#
-# RAM test
-#
-# CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
-CONFIG_SYSTEM_READLINE=y
-CONFIG_READLINE_ECHO=y
-
-#
-# P-Code Support
-#
-
-#
-# PHY Tool
-#
-# CONFIG_SYSTEM_MDIO is not set
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sudoku
-#
-# CONFIG_SYSTEM_SUDOKU is not set
-
-#
-# Sysinfo
-#
-
-#
-# Temperature
-#
+# CONFIG_SYSTEM_INSTALL is not set
 CONFIG_SYSTEM_LM75=y
 CONFIG_SYSTEM_LM75_DEVNAME="/dev/temp"
 CONFIG_SYSTEM_LM75_FAHRENHEIT=y
 # CONFIG_SYSTEM_LM75_CENTIGRADE is not set
 CONFIG_SYSTEM_LM75_STACKSIZE=1024
 CONFIG_SYSTEM_LM75_PRIORITY=100
-
-#
-# VI Work-Alike Editor
-#
+# CONFIG_SYSTEM_MDIO is not set
+# CONFIG_SYSTEM_NETDB is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# USB Monitor
-#
-
-#
-# Zmodem Commands
-#
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/dk-tm4c129x/nsh/Make.defs b/configs/dk-tm4c129x/nsh/Make.defs
index f4cb4a1c4253b9a2449b4eff0b375036d49595d5..fedf001b9a788f9feedfd7d2a6a66ba0d324a913 100644
--- a/configs/dk-tm4c129x/nsh/Make.defs
+++ b/configs/dk-tm4c129x/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/dk-tm4c129x/nsh/defconfig b/configs/dk-tm4c129x/nsh/defconfig
index 0b9e6a5f03fbf18c3ec7d11745e11fae025f801e..6df53feb2b2fefa2fca49846940cf3ae961091ab 100644
--- a/configs/dk-tm4c129x/nsh/defconfig
+++ b/configs/dk-tm4c129x/nsh/defconfig
@@ -41,14 +41,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -62,10 +64,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -75,10 +79,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -97,7 +101,9 @@ CONFIG_ARCH_CHIP_TIVA=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
@@ -108,8 +114,17 @@ CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="tiva"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
@@ -117,6 +132,8 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 # CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -126,6 +143,7 @@ CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -262,6 +280,7 @@ CONFIG_TIVA_PHY_INTERRUPTS=y
 CONFIG_TIVA_EMAC_NRXDESC=8
 CONFIG_TIVA_EMAC_NTXDESC=4
 # CONFIG_TIVA_EMAC_ENHANCEDDESC is not set
+CONFIG_TIVA_ETHERNET_HPWORK=y
 CONFIG_TIVA_BOARDMAC=y
 
 #
@@ -275,6 +294,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -337,17 +357,15 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -367,6 +385,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=3
@@ -421,6 +440,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -436,9 +456,10 @@ CONFIG_SIG_SIGWORK=17
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -462,6 +483,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -479,13 +501,18 @@ CONFIG_I2C=y
 # CONFIG_I2C_SLAVE is not set
 # CONFIG_I2C_POLLED is not set
 # CONFIG_I2C_TRACE is not set
+CONFIG_I2C_DRIVER=y
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_TIMERS_CS2100CP is not set
@@ -494,8 +521,28 @@ CONFIG_I2C=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -517,19 +564,25 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 CONFIG_ARCH_PHY_INTERRUPT=y
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 CONFIG_SENSORS=y
 # CONFIG_AS5048B is not set
+# CONFIG_BH1750FVI is not set
+# CONFIG_BMG160 is not set
 # CONFIG_BMP180 is not set
+# CONFIG_SENSOR_KXTJ9 is not set
+# CONFIG_LIS3DSH is not set
 # CONFIG_LIS331DL is not set
+# CONFIG_SN_LSM9DS1 is not set
 # CONFIG_MB7040 is not set
+# CONFIG_MLX90393 is not set
+# CONFIG_MCP9844 is not set
 # CONFIG_MS58XX is not set
 CONFIG_MS58XX_VDD=30
 # CONFIG_MPL115A is not set
@@ -537,13 +590,18 @@ CONFIG_MS58XX_VDD=30
 # CONFIG_MAX31855 is not set
 # CONFIG_MAX6675 is not set
 CONFIG_I2C_LM75=y
+# CONFIG_LIS3MDL is not set
 CONFIG_LM75=y
+CONFIG_LM75_I2C_FREQUENCY=100000
 # CONFIG_LM92 is not set
 # CONFIG_QENCODER is not set
+# CONFIG_VEML6070 is not set
+# CONFIG_XEN1210 is not set
 # CONFIG_ZEROCROSS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -567,10 +625,6 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -593,19 +647,26 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
 # CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -613,13 +674,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -755,12 +814,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -779,6 +832,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -806,6 +863,8 @@ CONFIG_LIBM=y
 CONFIG_LIBC_FLOATINGPOINT=y
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -821,7 +880,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
 CONFIG_NETDB_DNSCLIENT=y
 CONFIG_NETDB_DNSCLIENT_ENTRIES=8
@@ -834,8 +894,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -860,17 +922,19 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -880,40 +944,46 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -925,8 +995,9 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -939,25 +1010,27 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -977,6 +1050,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
 # CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
@@ -1002,13 +1076,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1018,6 +1092,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -1025,6 +1100,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1050,6 +1126,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 CONFIG_NSH_NETINIT_THREAD=y
 CONFIG_NSH_NETINIT_MONITOR=y
 CONFIG_NSH_NETINIT_SIGNO=18
@@ -1081,6 +1158,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
 CONFIG_NSH_TELNETD_CLIENTPRIO=100
 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
 CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 # CONFIG_NSH_TELNET_LOGIN is not set
 
 #
@@ -1095,11 +1174,11 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=6
 CONFIG_I2CTOOL_MAXBUS=6
@@ -1107,8 +1186,14 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=400000
-# CONFIG_FSUTILS_INIFILE is not set
-# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+CONFIG_SYSTEM_LM75=y
+CONFIG_SYSTEM_LM75_DEVNAME="/dev/temp"
+CONFIG_SYSTEM_LM75_FAHRENHEIT=y
+# CONFIG_SYSTEM_LM75_CENTIGRADE is not set
+CONFIG_SYSTEM_LM75_STACKSIZE=1024
+CONFIG_SYSTEM_LM75_PRIORITY=100
+# CONFIG_SYSTEM_MDIO is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1116,13 +1201,9 @@ CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
-# CONFIG_SYSTEM_MDIO is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-CONFIG_SYSTEM_LM75=y
-CONFIG_SYSTEM_LM75_DEVNAME="/dev/temp"
-CONFIG_SYSTEM_LM75_FAHRENHEIT=y
-# CONFIG_SYSTEM_LM75_CENTIGRADE is not set
-CONFIG_SYSTEM_LM75_STACKSIZE=1024
-CONFIG_SYSTEM_LM75_PRIORITY=100
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/dk-tm4c129x/src/tm4c_bringup.c b/configs/dk-tm4c129x/src/tm4c_bringup.c
index 72fcac02928935bbda8388730bc88dd1d25a1371..e2207559b7e43c70d119c16023d2c8c555c288ed 100644
--- a/configs/dk-tm4c129x/src/tm4c_bringup.c
+++ b/configs/dk-tm4c129x/src/tm4c_bringup.c
@@ -86,14 +86,14 @@ static void tm4c_i2c_register(int bus)
   i2c = tiva_i2cbus_initialize(bus);
   if (i2c == NULL)
     {
-      dbg("ERROR: Failed to get I2C%d interface\n", bus);
+      _err("ERROR: Failed to get I2C%d interface\n", bus);
     }
   else
     {
       ret = i2c_register(i2c, bus);
       if (ret < 0)
         {
-          dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
+          _err("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
           tiva_i2cbus_uninitialize(i2c);
         }
     }
@@ -174,7 +174,7 @@ int tm4c_bringup(void)
   ret = tiva_tmp100_initialize(TMP100_DEVNAME);
   if (ret < 0)
     {
-      dbg("ERROR: Failed to initialize TMP100 driver: %d\n", ret);
+      _err("ERROR: Failed to initialize TMP100 driver: %d\n", ret);
     }
 #endif
 
@@ -184,7 +184,7 @@ int tm4c_bringup(void)
   ret = tiva_timer_configure();
   if (ret < 0)
     {
-      dbg("ERROR: Failed to initialize timer driver: %d\n", ret);
+      _err("ERROR: Failed to initialize timer driver: %d\n", ret);
     }
 #endif
 
diff --git a/configs/dk-tm4c129x/src/tm4c_buttons.c b/configs/dk-tm4c129x/src/tm4c_buttons.c
index 829891e7d5ece194f5c801f484fde9eafee00ff8..f5b65bee71bffec92a784c8fef36b0605917880e 100644
--- a/configs/dk-tm4c129x/src/tm4c_buttons.c
+++ b/configs/dk-tm4c129x/src/tm4c_buttons.c
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -144,22 +145,19 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  ************************************************************************************/
 
 #if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_TIVA_GPIOP_IRQS)
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  static xcpt_t handler = NULL;
-  xcpt_t oldhandler = handler;
   irqstate_t flags;
-  int ret;
+  int ret = -EINVAL;
 
   /* Interrupts are supported only on ports P and Q and, hence, only on button SW4 */
 
-  if (id >= BUTTON_SW4)
+  if (id == BUTTON_SW4)
     {
       /* The following should be atomic */
 
@@ -169,16 +167,14 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
 
       up_disable_irq(IRQ_SW4);
       irq_detach(IRQ_SW4);
-      handler = NULL;
 
       /* Attach the new handler if so requested */
 
-      if (irqhandler)
+      if (irqhandler != NULL)
         {
-          ret = irq_attach(IRQ_SW4, irqhandler);
+          ret = irq_attach(IRQ_SW4, irqhandler, arg);
           if (ret == OK)
             {
-              handler = irqhandler;
               up_enable_irq(IRQ_SW4);
             }
         }
@@ -186,7 +182,7 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
       leave_critical_section(flags);
     }
 
-  return oldhandler;
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/dk-tm4c129x/src/tm4c_ethernet.c b/configs/dk-tm4c129x/src/tm4c_ethernet.c
index 8594d755596de0d2208c71d41c9aaf54fefc2f71..dbf31f08969e3471f15fd51a500db0c840856866 100644
--- a/configs/dk-tm4c129x/src/tm4c_ethernet.c
+++ b/configs/dk-tm4c129x/src/tm4c_ethernet.c
@@ -84,7 +84,7 @@ void tiva_ethernetmac(struct ether_addr *ethaddr)
   user0 = getreg32(TIVA_FLASH_USERREG0);
   user1 = getreg32(TIVA_FLASH_USERREG1);
 
-  nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
+  ninfo("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
   DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff);
 
   /* Re-format that MAC address the way that the network expects to see it */
diff --git a/configs/dk-tm4c129x/src/tm4c_ssi.c b/configs/dk-tm4c129x/src/tm4c_ssi.c
index 6c2b0f86ae5cf2805fdf59131593e424cd7ce041..8e142bfe3221977e1ec3e66117281cca005e4d78 100644
--- a/configs/dk-tm4c129x/src/tm4c_ssi.c
+++ b/configs/dk-tm4c129x/src/tm4c_ssi.c
@@ -59,28 +59,14 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* CONFIG_DEBUG_SPI enables debug output from this file (needs CONFIG_DEBUG too) */
+/* Enables debug output from this file */
 
 #ifdef CONFIG_DEBUG_SPI
-#  define ssidbg lldbg
-#else
-#  define ssidbg(x...)
-#endif
-
-/* Dump GPIO registers */
-
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
-#  define ssivdbg lldbg
 #  define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
 #else
-#  define ssivdbg(x...)
 #  define ssi_dumpgpio(m)
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -118,14 +104,14 @@ void weak_function tm4c_ssidev_initialize(void)
 
 void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
   ssi_dumpgpio("tiva_ssiselect() Entry");
   ssi_dumpgpio("tiva_ssiselect() Exit");
 }
 
 uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  ssidbg("Returning SPI_STATUS_PRESENT\n");
+  spiinfo("Returning SPI_STATUS_PRESENT\n");
   return SPI_STATUS_PRESENT;
 }
 
diff --git a/configs/dk-tm4c129x/src/tm4c_timer.c b/configs/dk-tm4c129x/src/tm4c_timer.c
index e6cfe3e13cb340c43edea12bc1718c0acdd9a3e4..f3317810885271a73733be25e34716e6f540f736 100644
--- a/configs/dk-tm4c129x/src/tm4c_timer.c
+++ b/configs/dk-tm4c129x/src/tm4c_timer.c
@@ -102,12 +102,12 @@ int tiva_timer_configure(void)
 {
   int ret;
 
-  timvdbg("Registering TIMER%d at %s\n", GPTM, CONFIG_DK_TM4C129X_TIMER_DEVNAME);
+  tmrinfo("Registering TIMER%d at %s\n", GPTM, CONFIG_DK_TM4C129X_TIMER_DEVNAME);
 
   ret = tiva_timer_register(CONFIG_DK_TM4C129X_TIMER_DEVNAME, GPTM, ALTCLK);
   if (ret < 0)
     {
-      timdbg("ERROR: Failed to register timer driver: %d\n", ret);
+      tmrerr("ERROR: Failed to register timer driver: %d\n", ret);
     }
 
   return ret;
diff --git a/configs/dk-tm4c129x/src/tm4c_userleds.c b/configs/dk-tm4c129x/src/tm4c_userleds.c
index 623091f8aff41f0477dded9892fa6f3566c4f078..9bac0ab7c2ee253f9be43c7eb126487ce61a8fa3 100644
--- a/configs/dk-tm4c129x/src/tm4c_userleds.c
+++ b/configs/dk-tm4c129x/src/tm4c_userleds.c
@@ -62,22 +62,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/dummy/.gitignore b/configs/dummy/.gitignore
new file mode 100644
index 0000000000000000000000000000000000000000..99f41601fd87e96adf2eda287f558d1bffdf8df2
--- /dev/null
+++ b/configs/dummy/.gitignore
@@ -0,0 +1,2 @@
+/Kconfig
+
diff --git a/configs/dummy/dummy_kconfig b/configs/dummy/dummy_kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..18c7905aed7cf0d3f1dba59f4bbeaba3c8c4af0e
--- /dev/null
+++ b/configs/dummy/dummy_kconfig
@@ -0,0 +1,5 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
diff --git a/configs/ea3131/locked/mklocked.sh b/configs/ea3131/locked/mklocked.sh
index 97a126015d90710f8c7da628f057871dffe0194e..1d4c0ab929792d2a785c33cd4702e67bae92b030 100755
--- a/configs/ea3131/locked/mklocked.sh
+++ b/configs/ea3131/locked/mklocked.sh
@@ -115,7 +115,7 @@ echo "EXTERN(up_vectoraddrexcptn)" >>ld-locked.inc
 #
 # Of course, this list must be extended as interrupt handlers are added.
 
-echo "EXTERN(up_timer_initialize)" >>ld-locked.inc
+echo "EXTERN(arm_timer_initialize)" >>ld-locked.inc
 
 answer=$(checkconfig CONFIG_LPC31_UART)
 if [ "$answer" = y ]; then
diff --git a/configs/ea3131/nsh/Make.defs b/configs/ea3131/nsh/Make.defs
index 34d4de104c9f1c0e1cfdabc40999b3dcda5976d2..e893667463880fe3a59c3ac28d0f44e16a537fbc 100644
--- a/configs/ea3131/nsh/Make.defs
+++ b/configs/ea3131/nsh/Make.defs
@@ -80,7 +80,7 @@ else
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/ea3131/nsh/defconfig b/configs/ea3131/nsh/defconfig
index 847486498ebf85ebf8f2109eca35edf0a2ce63f9..580a9046b2b6e6d9f25aaf63fd63cb1152983caf 100644
--- a/configs/ea3131/nsh/defconfig
+++ b/configs/ea3131/nsh/defconfig
@@ -41,12 +41,15 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
@@ -61,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -74,13 +76,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
 # CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -89,20 +93,39 @@ CONFIG_ARCH_CHIP_LPC31XX=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 CONFIG_ARCH_ARM926EJS=y
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="lpc31xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
 CONFIG_ARCH_ROMPGTABLE=y
@@ -165,11 +188,14 @@ CONFIG_ARCH_HAVE_EXTSRAM1=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 CONFIG_ARCH_HAVE_MMU=y
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 CONFIG_ARCH_USE_MMU=y
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
@@ -227,6 +253,11 @@ CONFIG_NSH_MMCSDMINOR=0
 #
 # Board-Specific Options
 #
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
 
 #
 # RTOS Features
@@ -256,8 +287,12 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -308,6 +343,14 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
 
 #
 # Stack and heap information
@@ -334,29 +377,51 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
-# CONFIG_TIMER is not set
 # CONFIG_ANALOG is not set
 # CONFIG_AUDIO_DEVICES is not set
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 CONFIG_UART_SERIALDRIVER=y
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -379,13 +444,15 @@ CONFIG_UART_SERIALDRIVER=y
 # CONFIG_USART6_SERIALDRIVER is not set
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
 
 #
@@ -399,20 +466,23 @@ CONFIG_UART_PARITY=0
 CONFIG_UART_2STOP=0
 # CONFIG_UART_IFLOWCONTROL is not set
 # CONFIG_UART_OFLOWCONTROL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_UART_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -438,22 +508,22 @@ CONFIG_UART_2STOP=0
 # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
 CONFIG_FS_READABLE=y
 CONFIG_FS_WRITABLE=y
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
 CONFIG_FS_FAT=y
 # CONFIG_FAT_LCNAMES is not set
 # CONFIG_FAT_LFN is not set
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -475,7 +545,11 @@ CONFIG_MM_REGIONS=1
 # CONFIG_AUDIO is not set
 
 #
-# Binary Formats
+# Wireless Support
+#
+
+#
+# Binary Loader
 #
 # CONFIG_BINFMT_DISABLE is not set
 # CONFIG_BINFMT_EXEPATH is not set
@@ -500,6 +574,7 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -510,16 +585,22 @@ CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
 CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
 CONFIG_ARCH_LOWPUTC=y
 # CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -534,26 +615,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -561,75 +642,79 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
 #
 # CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
 
 #
 # Interpreters
 #
+# CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
 # CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -648,13 +733,16 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
 # CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -663,8 +751,10 @@ CONFIG_NSH_NESTDEPTH=3
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -673,6 +763,7 @@ CONFIG_NSH_NESTDEPTH=3
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -682,8 +773,10 @@ CONFIG_NSH_NESTDEPTH=3
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
@@ -710,7 +803,8 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
-CONFIG_LIB_BOARDCTL=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -724,112 +818,19 @@ CONFIG_LIB_BOARDCTL=y
 #
 # System Libraries and NSH Add-Ons
 #
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# EMACS-like Command Line Editor
-#
 # CONFIG_SYSTEM_CLE is not set
-
-#
-# FLASH Program Installation
-#
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# Intel HEX to binary conversion
-#
-# CONFIG_SYSTEM_HEX2BIN is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-
-#
-# P-Code Support
-#
-
-#
-# PHY Tool
-#
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sudoku
-#
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-
-#
-# Sysinfo
-#
-
-#
-# VI Work-Alike Editor
-#
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# USB Monitor
-#
-
-#
-# Zmodem Commands
-#
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/ea3131/pgnsh/Make.defs b/configs/ea3131/pgnsh/Make.defs
index 6fc835901273c87d8d3a0e3255b42a976af7ef44..aa4ce223e7247631e1894b10c84fc555777ec9c7 100644
--- a/configs/ea3131/pgnsh/Make.defs
+++ b/configs/ea3131/pgnsh/Make.defs
@@ -80,7 +80,7 @@ else
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/ea3131/pgnsh/defconfig b/configs/ea3131/pgnsh/defconfig
index 68215a41b38f6b66ffdb85e86204d65e98d12de1..908b348da089375627e02699eadcdf0fbac44b31 100644
--- a/configs/ea3131/pgnsh/defconfig
+++ b/configs/ea3131/pgnsh/defconfig
@@ -44,14 +44,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -65,8 +67,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -78,10 +79,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -99,7 +100,11 @@ CONFIG_ARCH_CHIP_LPC31XX=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 CONFIG_ARCH_ARM926EJS=y
 # CONFIG_ARCH_ARM920T is not set
@@ -109,10 +114,21 @@ CONFIG_ARCH_ARM926EJS=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="lpc31xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
 # CONFIG_ARCH_ROMPGTABLE is not set
@@ -175,12 +191,14 @@ CONFIG_ARCH_HAVE_EXTSRAM1=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 CONFIG_ARCH_HAVE_MMU=y
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 CONFIG_ARCH_USE_MMU=y
 CONFIG_PAGING=y
 CONFIG_PAGING_PAGESIZE=1024
@@ -258,9 +276,8 @@ CONFIG_EA3131_PAGING_BINOFFSET=0
 CONFIG_EA3131_PAGING_SDSLOT=0
 CONFIG_EA3131_PAGING_SPIPORT=0
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -297,6 +314,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -347,9 +365,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -380,14 +399,20 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 CONFIG_SPI_CALLBACK=y
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_I2S is not set
 
 #
@@ -401,7 +426,21 @@ CONFIG_SPI_CALLBACK=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -413,6 +452,7 @@ CONFIG_MMCSD_SPICLOCK=20000000
 CONFIG_MMCSD_SPIMODE=0
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 CONFIG_MTD=y
 
 #
@@ -421,6 +461,7 @@ CONFIG_MTD=y
 # CONFIG_MTD_PARTITION is not set
 # CONFIG_MTD_SECT512 is not set
 # CONFIG_MTD_BYTE_WRITE is not set
+# CONFIG_MTD_PROGMEM is not set
 # CONFIG_MTD_CONFIG is not set
 
 #
@@ -428,18 +469,24 @@ CONFIG_MTD=y
 #
 # CONFIG_MTD_NAND is not set
 # CONFIG_RAMMTD is not set
+# CONFIG_FILEMTD is not set
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 CONFIG_MTD_M25P=y
 CONFIG_M25P_SPIMODE=3
+CONFIG_M25P_SPIFREQUENCY=20000000
 CONFIG_M25P_MANUFACTURER=0x20
 CONFIG_M25P_MEMORY_TYPE=0x20
 # CONFIG_M25P_SUBSECTOR_ERASE is not set
+# CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -447,9 +494,10 @@ CONFIG_M25P_MEMORY_TYPE=0x20
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 CONFIG_UART_SERIALDRIVER=y
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -473,14 +521,11 @@ CONFIG_UART_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -497,19 +542,23 @@ CONFIG_UART_PARITY=0
 CONFIG_UART_2STOP=0
 # CONFIG_UART_IFLOWCONTROL is not set
 # CONFIG_UART_OFLOWCONTROL is not set
+# CONFIG_UART_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -542,19 +591,16 @@ CONFIG_FS_FAT=y
 # CONFIG_FAT_LCNAMES is not set
 # CONFIG_FAT_LFN is not set
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -574,6 +620,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -618,11 +668,15 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -637,26 +691,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -664,33 +718,46 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -703,30 +770,28 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -745,6 +810,7 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
@@ -753,6 +819,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -761,8 +828,10 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -781,8 +850,10 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
@@ -809,6 +880,8 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -822,15 +895,19 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/ea3131/src/lpc31_fillpage.c b/configs/ea3131/src/lpc31_fillpage.c
index 3ca97433cf0fc23c373095851fd596b0aff20699..5683472158671894fb4c70760c4599744e750094 100644
--- a/configs/ea3131/src/lpc31_fillpage.c
+++ b/configs/ea3131/src/lpc31_fillpage.c
@@ -199,7 +199,7 @@ struct pg_source_s
 
   /* This the device geometry */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   FAR struct mtd_geometry_s geo;
 #endif
 };
@@ -244,7 +244,7 @@ static inline void lpc31_initsrc(void)
       char devname[16];
 #endif
 
-      pgllvdbg("Initializing %s\n", CONFIG_PAGING_BINPATH);
+      pginfo("Initializing %s\n", CONFIG_PAGING_BINPATH);
 
       /* No, do we need to mount an SD device? */
 
@@ -289,7 +289,7 @@ static inline void lpc31_initsrc(void)
 static inline void lpc31_initsrc(void)
 {
   FAR struct spi_dev_s *spi;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   uint32_t capacity;
   int ret;
 #endif
@@ -300,7 +300,7 @@ static inline void lpc31_initsrc(void)
     {
       /* No... the initialize now */
 
-      pgllvdbg("Initializing\n");
+      pginfo("Initializing\n");
 
       /* First get an instance of the SPI device interface */
 
@@ -318,7 +318,7 @@ static inline void lpc31_initsrc(void)
 
       /* Verify that we can use the device */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       /* Get the device geometry. (casting to uintptr_t first eliminates
        * complaints on some architectures where the sizeof long is different
        * from the size of a pointer).
@@ -327,7 +327,7 @@ static inline void lpc31_initsrc(void)
       ret = MTD_IOCTL(g_pgsrc.mtd, MTDIOC_GEOMETRY, (unsigned long)&g_pgsrc.geo);
       DEBUGASSERT(ret >= 0);
       capacity = g_pgsrc.geo.erasesize*g_pgsrc.geo.neraseblocks;
-      pgllvdbg("capacity: %d\n", capacity);
+      pginfo("capacity: %d\n", capacity);
       DEBUGASSERT(capacity >= (CONFIG_EA3131_PAGING_BINOFFSET + PG_TEXT_VSIZE));
 #endif
 
@@ -412,7 +412,7 @@ int up_fillpage(FAR struct tcb_s *tcb, FAR void *vpage)
   off_t   offset;
 #endif
 
-  pglldbg("TCB: %p vpage: %p far: %08x\n", tcb, vpage, tcb->xcp.far);
+  pginfo("TCB: %p vpage: %p far: %08x\n", tcb, vpage, tcb->xcp.far);
   DEBUGASSERT(tcb->xcp.far >= PG_PAGED_VBASE && tcb->xcp.far < PG_PAGED_VEND);
 
   /* If BINPATH is defined, then it is the full path to a file on a mounted file
@@ -475,7 +475,7 @@ int up_fillpage(FAR struct tcb_s *tcb, FAR void *vpage)
 
 int up_fillpage(FAR struct tcb_s *tcb, FAR void *vpage, up_pgcallback_t pg_callback)
 {
-  pglldbg("TCB: %p vpage: %d far: %08x\n", tcb, vpage, tcb->xcp.far);
+  pginfo("TCB: %p vpage: %d far: %08x\n", tcb, vpage, tcb->xcp.far);
   DEBUGASSERT(tcb->xcp.far >= PG_PAGED_VBASE && tcb->xcp.far < PG_PAGED_VEND);
 
 #if defined(CONFIG_PAGING_BINPATH)
diff --git a/configs/ea3131/src/lpc31_leds.c b/configs/ea3131/src/lpc31_leds.c
index 367c3031c461f91c7ac2e52a5ba746d9ffd1c1d5..32ca8940e1e782dfde9dfad2d9d49609f1ec847a 100644
--- a/configs/ea3131/src/lpc31_leds.c
+++ b/configs/ea3131/src/lpc31_leds.c
@@ -51,30 +51,6 @@
 #include "up_internal.h"
 #include "lpc31.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/ea3131/src/lpc31_spi.c b/configs/ea3131/src/lpc31_spi.c
index cda79ac9e63998245c3fbbeb21397343bc8cc7d4..74914bdce634d755e2d00399be9d56b8d337968a 100644
--- a/configs/ea3131/src/lpc31_spi.c
+++ b/configs/ea3131/src/lpc31_spi.c
@@ -55,32 +55,6 @@
 #if 0 /* At present, EA3131 specific logic is hard-coded in the file lpc31_spi.c
        * in arch/arm/src/lpc31xx */
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -127,7 +101,7 @@ void weak_function lpc31_spidev_intialize(void)
 
 void lpc31_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 #warning "Missing logic"
 }
 
diff --git a/configs/ea3131/src/lpc31_usbhost.c b/configs/ea3131/src/lpc31_usbhost.c
index 4c7b500233f4cb48ddb305a74dc921cd3b00571c..fe16aa16378afecbe9ba8e50d414af6da84060ff 100644
--- a/configs/ea3131/src/lpc31_usbhost.c
+++ b/configs/ea3131/src/lpc31_usbhost.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/ea3131/src/lpc31_usbhost.c
  *
- *   Copyright (C) 2013, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2015-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -82,12 +82,6 @@
 
 static struct usbhost_connection_s *g_ehciconn;
 
-/* Overcurrent interrupt handler */
-
-#if 0 /* Not yet implemented */
-static xcpt_t g_ochandler;
-#endif
-
 /************************************************************************************
  * Private Functions
  ************************************************************************************/
@@ -104,7 +98,7 @@ static int ehci_waiter(int argc, char *argv[])
 {
   FAR struct usbhost_hubport_s *hport;
 
-  uvdbg("ehci_waiter:  Running\n");
+  uinfo("ehci_waiter:  Running\n");
   for (;;)
     {
       /* Wait for the device to change state */
@@ -206,7 +200,7 @@ int lpc31_usbhost_initialize(void)
   ret = usbhost_cdcacm_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the CDC/ACM serial class\n");
+      uerr("ERROR: Failed to register the CDC/ACM serial class\n");
     }
 #endif
 
@@ -216,7 +210,7 @@ int lpc31_usbhost_initialize(void)
   ret = usbhost_kbdinit();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the KBD class\n");
+      uerr("ERROR: Failed to register the KBD class\n");
     }
 #endif
 
@@ -225,7 +219,7 @@ int lpc31_usbhost_initialize(void)
   g_ehciconn = lpc31_ehci_initialize(0);
   if (!g_ehciconn)
     {
-      udbg("ERROR: lpc31_ehci_initialize failed\n");
+      uerr("ERROR: lpc31_ehci_initialize failed\n");
       return -ENODEV;
     }
 
@@ -235,7 +229,7 @@ int lpc31_usbhost_initialize(void)
                     (main_t)ehci_waiter, (FAR char * const *)NULL);
   if (pid < 0)
     {
-      udbg("ERROR: Failed to create ehci_waiter task: %d\n", ret);
+      uerr("ERROR: Failed to create ehci_waiter task: %d\n", ret);
       return -ENODEV;
     }
 
@@ -262,7 +256,7 @@ int lpc31_usbhost_initialize(void)
 
 void lpc31_usbhost_vbusdrive(int rhport, bool enable)
 {
-  uvdbg("RHPort%d: enable=%d\n", rhport+1, enable);
+  uinfo("RHPort%d: enable=%d\n", rhport+1, enable);
 
   /* The LPC3131 has only a single root hub port */
 
@@ -292,16 +286,16 @@ void lpc31_usbhost_vbusdrive(int rhport, bool enable)
  *
  * Input parameter:
  *   handler - New overcurrent interrupt handler
+ *   arg     - The argument that will accompany the interrupt
  *
  * Returned value:
- *   Old overcurrent interrupt handler
+ *   Zero (OK) returned on success; a negated errno value is returned on failure.
  *
  ************************************************************************************/
 
 #if 0 /* Not ready yet */
-xcpt_t lpc31_setup_overcurrent(xcpt_t handler)
+int lpc31_setup_overcurrent(xcpt_t handler, void *arg)
 {
-  xcpt_t oldhandler;
   irqstate_t flags;
 
   /* Disable interrupts until we are done.  This guarantees that the
@@ -310,18 +304,11 @@ xcpt_t lpc31_setup_overcurrent(xcpt_t handler)
 
   flags = enter_critical_section();
 
-  /* Get the old button interrupt handler and save the new one */
-
-  oldhandler  = g_ochandler;
-  g_ochandler = handler;
-
   /* Configure the interrupt */
 #warning Missing logic
 
-  /* Return the old button handler (so that it can be restored) */
-
   leave_critical_section(flags);
-  return oldhandler;
+  return OK;
 }
 #endif /* 0 */
 
diff --git a/configs/ea3131/src/lpc31_usbmsc.c b/configs/ea3131/src/lpc31_usbmsc.c
index f55bdc8e10f58594b18216a79349fde2cbea6481..0965cf6a57acef38a5213cb42653254d351d15a8 100644
--- a/configs/ea3131/src/lpc31_usbmsc.c
+++ b/configs/ea3131/src/lpc31_usbmsc.c
@@ -50,7 +50,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -93,8 +93,7 @@ int board_usbmsc_initialize(int port)
   pbuffer = (uint8_t *)kmm_malloc(BUFFER_SIZE);
   if (!pbuffer)
     {
-      lowsyslog(LOG_ERR, "ERROR: Failed to allocate ramdisk of size %d\n",
-                BUFFER_SIZE);
+      err("ERROR: Failed to allocate ramdisk of size %d\n", BUFFER_SIZE);
       return -ENOMEM;
     }
 
@@ -107,9 +106,8 @@ int board_usbmsc_initialize(int port)
                          RDFLAG_WRENABLED | RDFLAG_FUNLINK);
   if (ret < 0)
     {
-      syslog(LOG_ERR,
-             "ERROR: create_ramdisk: Failed to register ramdisk at %s: %d\n",
-             g_source, -ret);
+      err("ERROR: create_ramdisk: Failed to register ramdisk at %s: %d\n",
+          g_source, -ret);
       kmm_free(pbuffer);
       return ret;
     }
@@ -119,9 +117,8 @@ int board_usbmsc_initialize(int port)
   ret = mkfatfs(g_source, &g_fmt);
   if (ret < 0)
     {
-      syslog(LOG_ERR,
-             "ERROR: create_ramdisk: Failed to create FAT filesystem on ramdisk at %s\n",
-             g_source);
+      err("ERROR: create_ramdisk: Failed to create FAT filesystem on ramdisk at %s\n",
+          g_source);
       /* kmm_free(pbuffer); -- RAM disk is registered */
       return ret;
     }
diff --git a/configs/ea3131/usbserial/Make.defs b/configs/ea3131/usbserial/Make.defs
index 197b58b394b84818e9631265d8d09c60a2858844..815235e27c63549ffd6ff75b7110a463cdafc289 100644
--- a/configs/ea3131/usbserial/Make.defs
+++ b/configs/ea3131/usbserial/Make.defs
@@ -80,7 +80,7 @@ else
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/ea3131/usbserial/defconfig b/configs/ea3131/usbserial/defconfig
index e7a88724c9db24212a25c4c6bdade45896fcb72b..8978ca647e500e222c1a0edd1ad3930745f11d2f 100644
--- a/configs/ea3131/usbserial/defconfig
+++ b/configs/ea3131/usbserial/defconfig
@@ -46,10 +46,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -121,6 +120,8 @@ CONFIG_ARCH_ARM926EJS=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="lpc31xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
 # CONFIG_ARCH_HAVE_TRUSTZONE is not set
@@ -263,8 +264,6 @@ CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -410,7 +409,12 @@ CONFIG_DEV_NULL=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -418,6 +422,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -426,10 +431,10 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
 CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 CONFIG_UART_SERIALDRIVER=y
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -453,10 +458,6 @@ CONFIG_UART_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
@@ -519,15 +520,18 @@ CONFIG_PL2303_PRODUCTSTR="USBdev Serial"
 CONFIG_USBHOST_HAVE_ASYNCH=y
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -564,12 +568,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -632,7 +630,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -640,6 +637,7 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -668,10 +666,10 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -680,20 +678,19 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -705,7 +702,6 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 CONFIG_EXAMPLES_USBSERIAL=y
 CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
 # CONFIG_EXAMPLES_USBSERIAL_TRACEINIT is not set
@@ -715,6 +711,7 @@ CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
 # CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -736,8 +733,8 @@ CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -748,6 +745,7 @@ CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -769,17 +767,17 @@ CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
-# CONFIG_SYSTEM_USBMONITOR is not set
+# CONFIG_USBMONITOR is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/ea3152/ostest/Make.defs b/configs/ea3152/ostest/Make.defs
index 633fbdaedf9766ddeff0a6293b3601998f903db4..c905c78101f6954927e815018e87d3a8efaba922 100644
--- a/configs/ea3152/ostest/Make.defs
+++ b/configs/ea3152/ostest/Make.defs
@@ -80,7 +80,7 @@ else
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/ea3152/ostest/defconfig b/configs/ea3152/ostest/defconfig
index 598fabeb5ab0a4638c04761bb4743ca5b2709745..fe298a2df380537686ac0d5e01487ab4b683deaa 100644
--- a/configs/ea3152/ostest/defconfig
+++ b/configs/ea3152/ostest/defconfig
@@ -41,12 +41,15 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
@@ -61,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -74,13 +76,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
 # CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -89,20 +93,39 @@ CONFIG_ARCH_CHIP_LPC31XX=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 CONFIG_ARCH_ARM926EJS=y
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="lpc31xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
 CONFIG_ARCH_ROMPGTABLE=y
@@ -166,11 +189,14 @@ CONFIG_ARCH_HAVE_EXTSRAM1=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 CONFIG_ARCH_HAVE_MMU=y
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 CONFIG_ARCH_USE_MMU=y
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
@@ -226,6 +252,7 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_LIB_BOARDCTL is not set
 
 #
 # RTOS Features
@@ -255,8 +282,12 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="ostest_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -307,6 +338,14 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
 
 #
 # Stack and heap information
@@ -333,29 +372,51 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
-# CONFIG_TIMER is not set
 # CONFIG_ANALOG is not set
 # CONFIG_AUDIO_DEVICES is not set
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 CONFIG_UART_SERIALDRIVER=y
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -378,12 +439,14 @@ CONFIG_UART_SERIALDRIVER=y
 # CONFIG_USART6_SERIALDRIVER is not set
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
 CONFIG_MCU_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
 
 #
@@ -397,20 +460,23 @@ CONFIG_UART_PARITY=0
 CONFIG_UART_2STOP=0
 # CONFIG_UART_IFLOWCONTROL is not set
 # CONFIG_UART_OFLOWCONTROL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_UART_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -435,14 +501,11 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
 # CONFIG_FS_READABLE is not set
 # CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -464,7 +527,11 @@ CONFIG_MM_REGIONS=1
 # CONFIG_AUDIO is not set
 
 #
-# Binary Formats
+# Wireless Support
+#
+
+#
+# Binary Loader
 #
 # CONFIG_BINFMT_DISABLE is not set
 # CONFIG_NXFLAT is not set
@@ -487,6 +554,7 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -498,14 +566,17 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
 CONFIG_ARCH_LOWPUTC=y
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -520,14 +591,13 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -535,11 +605,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -547,12 +617,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 CONFIG_EXAMPLES_OSTEST=y
 CONFIG_EXAMPLES_OSTEST_LOOPS=1
@@ -560,62 +629,63 @@ CONFIG_EXAMPLES_OSTEST_STACKSIZE=2048
 CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=3
 CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000
 CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
 #
 # CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
 
 #
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
 # CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
@@ -634,111 +704,16 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 #
 # System Libraries and NSH Add-Ons
 #
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# EMACS-like Command Line Editor
-#
 # CONFIG_SYSTEM_CLE is not set
-
-#
-# FLASH Program Installation
-#
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# Intel HEX to binary conversion
-#
-# CONFIG_SYSTEM_HEX2BIN is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-
-#
-# P-Code Support
-#
-
-#
-# PHY Tool
-#
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sudoku
-#
 # CONFIG_SYSTEM_SUDOKU is not set
-
-#
-# Sysinfo
-#
-
-#
-# VI Work-Alike Editor
-#
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# USB Monitor
-#
-
-#
-# Zmodem Commands
-#
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/ea3152/src/lpc31_fillpage.c b/configs/ea3152/src/lpc31_fillpage.c
index 647960cfa35bb9d9845df23285279bb8c53a9ae3..51ad18749e40387f5fd4042a0a2a668d6f4a0792 100644
--- a/configs/ea3152/src/lpc31_fillpage.c
+++ b/configs/ea3152/src/lpc31_fillpage.c
@@ -199,7 +199,7 @@ struct pg_source_s
 
   /* This the device geometry */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   FAR struct mtd_geometry_s geo;
 #endif
 };
@@ -244,7 +244,7 @@ static inline void lpc31_initsrc(void)
       char devname[16];
 #endif
 
-      pgllvdbg("Initializing %s\n", CONFIG_PAGING_BINPATH);
+      pginfo("Initializing %s\n", CONFIG_PAGING_BINPATH);
 
       /* No, do we need to mount an SD device? */
 
@@ -289,7 +289,7 @@ static inline void lpc31_initsrc(void)
 static inline void lpc31_initsrc(void)
 {
   FAR struct spi_dev_s *spi;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   uint32_t capacity;
   int ret;
 #endif
@@ -300,7 +300,7 @@ static inline void lpc31_initsrc(void)
     {
       /* No... the initialize now */
 
-      pgllvdbg("Initializing\n");
+      pginfo("Initializing\n");
 
       /* First get an instance of the SPI device interface */
 
@@ -318,7 +318,7 @@ static inline void lpc31_initsrc(void)
 
       /* Verify that we can use the device */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       /* Get the device geometry. (casting to uintptr_t first eliminates
        * complaints on some architectures where the sizeof long is different
        * from the size of a pointer).
@@ -327,7 +327,7 @@ static inline void lpc31_initsrc(void)
       ret = MTD_IOCTL(g_pgsrc.mtd, MTDIOC_GEOMETRY, (unsigned long)&g_pgsrc.geo);
       DEBUGASSERT(ret >= 0);
       capacity = g_pgsrc.geo.erasesize*g_pgsrc.geo.neraseblocks;
-      pgllvdbg("capacity: %d\n", capacity);
+      pginfo("capacity: %d\n", capacity);
       DEBUGASSERT(capacity >= (CONFIG_EA3152_PAGING_BINOFFSET + PG_TEXT_VSIZE));
 #endif
 
@@ -412,7 +412,7 @@ int up_fillpage(FAR struct tcb_s *tcb, FAR void *vpage)
   off_t   offset;
 #endif
 
-  pglldbg("TCB: %p vpage: %p far: %08x\n", tcb, vpage, tcb->xcp.far);
+  pginfo("TCB: %p vpage: %p far: %08x\n", tcb, vpage, tcb->xcp.far);
   DEBUGASSERT(tcb->xcp.far >= PG_PAGED_VBASE && tcb->xcp.far < PG_PAGED_VEND);
 
   /* If BINPATH is defined, then it is the full path to a file on a mounted file
@@ -475,7 +475,7 @@ int up_fillpage(FAR struct tcb_s *tcb, FAR void *vpage)
 
 int up_fillpage(FAR struct tcb_s *tcb, FAR void *vpage, up_pgcallback_t pg_callback)
 {
-  pglldbg("TCB: %p vpage: %d far: %08x\n", tcb, vpage, tcb->xcp.far);
+  pginfo("TCB: %p vpage: %d far: %08x\n", tcb, vpage, tcb->xcp.far);
   DEBUGASSERT(tcb->xcp.far >= PG_PAGED_VBASE && tcb->xcp.far < PG_PAGED_VEND);
 
 #if defined(CONFIG_PAGING_BINPATH)
diff --git a/configs/ea3152/src/lpc31_leds.c b/configs/ea3152/src/lpc31_leds.c
index ab0ea797492d0866faa7a9e54b0071916718ed4b..582b1f680a9a21c6b26834f231bc78bdbe24971e 100644
--- a/configs/ea3152/src/lpc31_leds.c
+++ b/configs/ea3152/src/lpc31_leds.c
@@ -51,30 +51,6 @@
 #include "up_internal.h"
 #include "lpc31.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/ea3152/src/lpc31_spi.c b/configs/ea3152/src/lpc31_spi.c
index 5e81cc398dab2bba89771443783f817282342fac..0995794a0fd87b1905987a67bf0a162bc4915de4 100644
--- a/configs/ea3152/src/lpc31_spi.c
+++ b/configs/ea3152/src/lpc31_spi.c
@@ -55,32 +55,6 @@
 #if 0 /* At present, EA3152 specific logic is hard-coded in the file lpc31_spi.c
        * in arch/arm/src/lpc31xx */
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -127,7 +101,7 @@ void weak_function lpc31_spidev_intialize(void)
 
 void lpc31_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 #warning "Missing logic"
 }
 
diff --git a/configs/ea3152/src/lpc31_usbmsc.c b/configs/ea3152/src/lpc31_usbmsc.c
index e251d5cbc02316722f8b695d8d7b58606d1cd266..7e4909c838de78459ce145db58e43f733aa18dbc 100644
--- a/configs/ea3152/src/lpc31_usbmsc.c
+++ b/configs/ea3152/src/lpc31_usbmsc.c
@@ -50,7 +50,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -93,8 +93,8 @@ int board_usbmsc_initialize(int port)
   pbuffer = (uint8_t *)kmm_malloc(BUFFER_SIZE);
   if (!pbuffer)
     {
-      lowsyslog("board_usbmsc_initialize: Failed to allocate ramdisk of size %d\n",
-                BUFFER_SIZE);
+      err("ERROR: board_usbmsc_initialize: Failed to allocate ramdisk of size %d\n",
+          BUFFER_SIZE);
       return -ENOMEM;
     }
 
@@ -107,8 +107,8 @@ int board_usbmsc_initialize(int port)
                          RDFLAG_WRENABLED | RDFLAG_FUNLINK);
   if (ret < 0)
     {
-      printf("create_ramdisk: Failed to register ramdisk at %s: %d\n",
-             g_source, -ret);
+      err("ERROR: create_ramdisk: Failed to register ramdisk at %s: %d\n",
+          g_source, -ret);
       kmm_free(pbuffer);
       return ret;
     }
@@ -118,8 +118,8 @@ int board_usbmsc_initialize(int port)
   ret = mkfatfs(g_source, &g_fmt);
   if (ret < 0)
     {
-      printf("create_ramdisk: Failed to create FAT filesystem on ramdisk at %s\n",
-             g_source);
+      err("ERROR: create_ramdisk: Failed to create FAT filesystem on ramdisk at %s\n",
+          g_source);
       /* kmm_free(pbuffer); -- RAM disk is registered */
       return ret;
     }
diff --git a/configs/eagle100/httpd/Make.defs b/configs/eagle100/httpd/Make.defs
index 285185d1e59506943bc82520891cc907f9ebf700..122c5ae5685c50dd39f8117e251c3fe80e009181 100644
--- a/configs/eagle100/httpd/Make.defs
+++ b/configs/eagle100/httpd/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/eagle100/httpd/defconfig b/configs/eagle100/httpd/defconfig
index 96e0b09524e1dbc82f2ad38ca52a97d626291a54..fcd8cd1bd978bdc14bff57de87abc0a044ac4ad2 100644
--- a/configs/eagle100/httpd/defconfig
+++ b/configs/eagle100/httpd/defconfig
@@ -21,6 +21,7 @@ CONFIG_WINDOWS_CYGWIN=y
 # Build Configuration
 #
 # CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
 # CONFIG_BUILD_2PASS is not set
 
 #
@@ -30,20 +31,25 @@ CONFIG_WINDOWS_CYGWIN=y
 # CONFIG_INTELHEX_BINARY is not set
 # CONFIG_MOTOROLA_SREC is not set
 CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
 
 #
 # Customize Header Files
 #
+# CONFIG_ARCH_STDINT_H is not set
 # CONFIG_ARCH_STDBOOL_H is not set
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
@@ -58,10 +64,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,12 +79,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 CONFIG_ARCH_CHIP_LM=y
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -85,28 +96,53 @@ CONFIG_ARCH_CHIP_LM=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
 CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="tiva"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
-# CONFIG_ARCH_HAVE_MPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
 
 #
 # ARMV7M Configuration Options
 #
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -115,9 +151,11 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
 
 #
-# Stellaris Configuration Options
+# Tiva/Stellaris Configuration Options
 #
 CONFIG_ARCH_CHIP_LM3S6918=y
 # CONFIG_ARCH_CHIP_LM3S9B96 is not set
@@ -126,23 +164,79 @@ CONFIG_ARCH_CHIP_LM3S6918=y
 # CONFIG_ARCH_CHIP_LM3S8962 is not set
 # CONFIG_ARCH_CHIP_LM4F120 is not set
 CONFIG_ARCH_CHIP_LM3S=y
-CONFIG_TIVA_HAVE_SSI1=y
 # CONFIG_LM_REVA2 is not set
-
-#
-# Stellaris Peripheral Support
-#
+# CONFIG_TIVA_BOARD_EARLYINIT is not set
+
+#
+# Tiva/Stellaris Peripheral Support
+#
+# CONFIG_TIVA_ADC is not set
+# CONFIG_TIVA_HAVE_ADC0 is not set
+# CONFIG_TIVA_HAVE_ADC1 is not set
+# CONFIG_TIVA_I2C is not set
+CONFIG_TIVA_HAVE_I2C1=y
+# CONFIG_TIVA_HAVE_I2C2 is not set
+# CONFIG_TIVA_HAVE_I2C3 is not set
+# CONFIG_TIVA_HAVE_I2C4 is not set
+# CONFIG_TIVA_HAVE_I2C5 is not set
+# CONFIG_TIVA_HAVE_I2C6 is not set
+# CONFIG_TIVA_HAVE_I2C7 is not set
+# CONFIG_TIVA_HAVE_I2C8 is not set
+# CONFIG_TIVA_HAVE_I2C9 is not set
+# CONFIG_TIVA_HAVE_UART3 is not set
+# CONFIG_TIVA_HAVE_UART4 is not set
+# CONFIG_TIVA_HAVE_UART5 is not set
+# CONFIG_TIVA_HAVE_UART6 is not set
+# CONFIG_TIVA_HAVE_UART7 is not set
+CONFIG_TIVA_HAVE_SSI0=y
+CONFIG_TIVA_HAVE_SSI1=y
+# CONFIG_TIVA_HAVE_SSI2 is not set
+# CONFIG_TIVA_HAVE_SSI3 is not set
+CONFIG_TIVA_HAVE_ETHERNET=y
+CONFIG_TIVA_SSI=y
+# CONFIG_TIVA_TIMER is not set
+# CONFIG_TIVA_HAVE_TIMER0 is not set
+# CONFIG_TIVA_HAVE_TIMER1 is not set
+# CONFIG_TIVA_HAVE_TIMER2 is not set
+CONFIG_TIVA_HAVE_TIMER3=y
+# CONFIG_TIVA_HAVE_TIMER4 is not set
+# CONFIG_TIVA_HAVE_TIMER5 is not set
+# CONFIG_TIVA_HAVE_TIMER6 is not set
+# CONFIG_TIVA_HAVE_TIMER7 is not set
+# CONFIG_TIVA_ADC0 is not set
+# CONFIG_TIVA_I2C0 is not set
+# CONFIG_TIVA_I2C1 is not set
 CONFIG_TIVA_UART0=y
 # CONFIG_TIVA_UART1 is not set
 # CONFIG_TIVA_UART2 is not set
 CONFIG_TIVA_SSI0=y
 # CONFIG_TIVA_SSI1 is not set
+# CONFIG_TIVA_TIMER3 is not set
 CONFIG_TIVA_ETHERNET=y
 # CONFIG_TIVA_FLASH is not set
 
 #
-# Disable GPIO Interrupts
-#
+# Enable GPIO Interrupts
+#
+CONFIG_TIVA_GPIO_IRQS=y
+CONFIG_TIVA_HAVE_GPIOA_IRQS=y
+CONFIG_TIVA_HAVE_GPIOB_IRQS=y
+CONFIG_TIVA_HAVE_GPIOC_IRQS=y
+CONFIG_TIVA_HAVE_GPIOD_IRQS=y
+CONFIG_TIVA_HAVE_GPIOE_IRQS=y
+CONFIG_TIVA_HAVE_GPIOF_IRQS=y
+CONFIG_TIVA_HAVE_GPIOG_IRQS=y
+# CONFIG_TIVA_HAVE_GPIOH_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOJ_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOK_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOL_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOM_IRQS is not set
+# CONFIG_TIVA_HAVE_GPION_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOP_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOQ_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOR_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOS_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOT_IRQS is not set
 CONFIG_TIVA_GPIOA_IRQS=y
 CONFIG_TIVA_GPIOB_IRQS=y
 CONFIG_TIVA_GPIOC_IRQS=y
@@ -150,14 +244,11 @@ CONFIG_TIVA_GPIOD_IRQS=y
 CONFIG_TIVA_GPIOE_IRQS=y
 CONFIG_TIVA_GPIOF_IRQS=y
 CONFIG_TIVA_GPIOG_IRQS=y
-CONFIG_TIVA_GPIOH_IRQS=y
-# CONFIG_TIVA_GPIOJ_IRQS is not set
 
 #
 # Stellaris Ethernet Configuration
 #
 # CONFIG_TIVA_ETHLEDS is not set
-CONFIG_TIVA_BOARDMAC=y
 # CONFIG_TIVA_ETHHDUPLEX is not set
 # CONFIG_TIVA_ETHNOAUTOCRC is not set
 # CONFIG_TIVA_ETHNOPAD is not set
@@ -165,10 +256,12 @@ CONFIG_TIVA_BOARDMAC=y
 # CONFIG_TIVA_PROMISCUOUS is not set
 # CONFIG_TIVA_TIMESTAMP is not set
 # CONFIG_TIVA_BADCRC is not set
-# CONFIG_M3S_DUMPPACKET is not set
+CONFIG_LM3S_ETHERNET_HPWORK=y
+# CONFIG_TIVA_DUMPPACKET is not set
+CONFIG_TIVA_BOARDMAC=y
 
 #
-# Stellaris SSI Configuration
+# Tiva/Stellaris SSI Configuration
 #
 CONFIG_SSI_POLLWAIT=y
 CONFIG_SSI_TXLIMIT=4
@@ -180,10 +273,19 @@ CONFIG_SSI_TXLIMIT=4
 # CONFIG_ARCH_VECNOTIRQ is not set
 # CONFIG_ARCH_DMA is not set
 CONFIG_ARCH_HAVE_IRQPRIO=y
-# CONFIG_ARCH_ADDRENV is not set
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
@@ -238,39 +340,81 @@ CONFIG_ARCH_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
+# CONFIG_LIB_BOARDCTL is not set
 
 #
 # RTOS Features
 #
-# CONFIG_BOARD_INITIALIZE is not set
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+CONFIG_DISABLE_MQUEUE=y
+CONFIG_DISABLE_ENVIRON=y
+
+#
+# Clocks and Timers
+#
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
-CONFIG_RR_INTERVAL=200
-# CONFIG_SCHED_CPULOAD is not set
-# CONFIG_SCHED_INSTRUMENTATION is not set
-CONFIG_TASK_NAME_SIZE=0
-# CONFIG_SCHED_HAVE_PARENT is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=5
 CONFIG_START_DAY=20
-CONFIG_DEV_CONSOLE=y
+CONFIG_MAX_WDOGPARMS=4
+CONFIG_PREALLOC_WDOGS=8
+CONFIG_WDOG_INTRESERVE=1
+CONFIG_PREALLOC_TIMERS=8
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="webserver_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=8
+# CONFIG_SCHED_HAVE_PARENT is not set
+# CONFIG_SCHED_WAITPID is not set
+
+#
+# Pthread Options
+#
 # CONFIG_MUTEX_TYPES is not set
-# CONFIG_PRIORITY_INHERITANCE is not set
+CONFIG_NPTHREAD_KEYS=0
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
 # CONFIG_FDCLONE_DISABLE is not set
 # CONFIG_FDCLONE_STDIO is not set
 CONFIG_SDCLONE_DISABLE=y
-# CONFIG_SCHED_WAITPID is not set
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
-CONFIG_USER_ENTRYPOINT="webserver_main"
-CONFIG_DISABLE_OS_API=y
-# CONFIG_DISABLE_POSIX_TIMERS is not set
-# CONFIG_DISABLE_PTHREAD is not set
-# CONFIG_DISABLE_SIGNALS is not set
-CONFIG_DISABLE_MQUEUE=y
-CONFIG_DISABLE_ENVIRON=y
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -279,21 +423,18 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
 
 #
-# Sizes of configurable things (0 disables)
+# Work queue support
 #
-CONFIG_MAX_TASKS=8
-CONFIG_NPTHREAD_KEYS=0
-CONFIG_NFILE_DESCRIPTORS=8
-CONFIG_NFILE_STREAMS=8
-CONFIG_NAME_MAX=32
-CONFIG_PREALLOC_MQ_MSGS=0
-CONFIG_MQ_MAXMSGSIZE=0
-CONFIG_MAX_WDOGPARMS=4
-CONFIG_PREALLOC_WDOGS=8
-CONFIG_WDOG_INTRESERVE=1
-CONFIG_PREALLOC_TIMERS=8
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
 
 #
 # Stack and heap information
@@ -302,6 +443,7 @@ CONFIG_IDLETHREAD_STACKSIZE=1024
 CONFIG_USERMAIN_STACKSIZE=2048
 CONFIG_PTHREAD_STACK_MIN=256
 CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
 
 #
 # Device Drivers
@@ -309,15 +451,32 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -325,15 +484,41 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
 
 #
 # General Ethernet MAC Driver Options
 #
+# CONFIG_NETDEV_LOOPBACK is not set
+# CONFIG_NETDEV_TELNET is not set
 # CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
+# CONFIG_NETDEV_STATISTICS is not set
+# CONFIG_NETDEV_LATEINIT is not set
 
 #
 # External Ethernet MAC Device Support
@@ -341,24 +526,46 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
-# CONFIG_NET_VNET is not set
+# CONFIG_NET_FTMAC100 is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
-
-#
-# USART Configuration
-#
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
 CONFIG_MCU_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
 
 #
@@ -372,20 +579,27 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -393,21 +607,57 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
-CONFIG_NET_IPv4=y
-# CONFIG_NET_MULTIBUFFER is not set
 # CONFIG_NET_PROMISCUOUS is not set
+
+#
+# Driver buffer configuration
+#
+CONFIG_NET_ETH_MTU=590
+CONFIG_NET_ETH_TCP_RECVWNDO=536
+CONFIG_NET_GUARDSIZE=2
+
+#
+# Data link support
+#
+# CONFIG_NET_MULTILINK is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
+# CONFIG_NET_TUN is not set
+
+#
+# Network Device Operations
+#
+# CONFIG_NETDEV_PHY_IOCTL is not set
+
+#
+# Internet Protocol Selection
+#
+CONFIG_NET_IPv4=y
+# CONFIG_NET_IPv6 is not set
+
+#
+# Socket Support
+#
 CONFIG_NSOCKET_DESCRIPTORS=16
 CONFIG_NET_NACTIVESOCKETS=16
 CONFIG_NET_SOCKOPTS=y
 # CONFIG_NET_SOLINGER is not set
-CONFIG_NET_ETH_MTU=562
-# CONFIG_NET_TCPURGDATA is not set
+
+#
+# Raw Socket Support
+#
+# CONFIG_NET_PKT is not set
+
+#
+# Unix Domain Socket Support
+#
+# CONFIG_NET_LOCAL is not set
 
 #
 # TCP/IP Networking
 #
 CONFIG_NET_TCP=y
+# CONFIG_NET_TCPURGDATA is not set
 CONFIG_NET_TCP_CONNS=16
 CONFIG_NET_MAX_LISTENPORTS=8
 CONFIG_NET_TCP_READAHEAD=y
@@ -421,24 +671,48 @@ CONFIG_NET_TCPBACKLOG=y
 # UDP Networking
 #
 # CONFIG_NET_UDP is not set
+
+#
+# ICMP Networking Support
+#
 CONFIG_NET_ICMP=y
 # CONFIG_NET_ICMP_PING is not set
+
+#
+# IGMPv2 Client Support
+#
 # CONFIG_NET_IGMP is not set
-CONFIG_NET_STATISTICS=y
-CONFIG_NET_ETH_TCP_RECVWNDO=536
+
+#
+# ARP Configuration
+#
+CONFIG_NET_ARP=y
 CONFIG_NET_ARPTAB_SIZE=16
+CONFIG_NET_ARP_MAXAGE=120
 # CONFIG_NET_ARP_IPIN is not set
+# CONFIG_NET_ARP_SEND is not set
+
+#
+# Network I/O Buffer Support
+#
 CONFIG_NET_IOB=y
 CONFIG_IOB_NBUFFERS=24
 CONFIG_IOB_BUFSIZE=196
 CONFIG_IOB_NCHAINS=8
-CONFIG_IOB_THROTTLE=0
+# CONFIG_NET_ARCH_INCR32 is not set
+# CONFIG_NET_ARCH_CHKSUM is not set
+CONFIG_NET_STATISTICS=y
 
 #
 # Routing Table Configuration
 #
 # CONFIG_NET_ROUTE is not set
-CONFIG_NET_ETHERNET=y
+CONFIG_NET_HOSTNAME=""
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
 
 #
 # File Systems
@@ -451,14 +725,10 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
 # CONFIG_FS_READABLE is not set
 # CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -479,7 +749,11 @@ CONFIG_MM_REGIONS=1
 # CONFIG_AUDIO is not set
 
 #
-# Binary Formats
+# Wireless Support
+#
+
+#
+# Binary Loader
 #
 # CONFIG_BINFMT_DISABLE is not set
 # CONFIG_NXFLAT is not set
@@ -502,6 +776,9 @@ CONFIG_NUNGET_CHARS=0
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -513,16 +790,20 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
 CONFIG_ARCH_LOWPUTC=y
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -535,26 +816,25 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
-# CONFIG_EXAMPLES_LCDRW is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -563,87 +843,92 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PASHELLO is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
 CONFIG_EXAMPLES_WEBSERVER=y
 CONFIG_EXAMPLES_WEBSERVER_IPADDR=0x0a000002
 CONFIG_EXAMPLES_WEBSERVER_DRIPADDR=0x0a000001
 CONFIG_EXAMPLES_WEBSERVER_NETMASK=0xffffff00
 CONFIG_EXAMPLES_WEBSERVER_NOMAC=y
-# CONFIG_EXAMPLES_USBSERIAL is not set
-# CONFIG_EXAMPLES_USBTERM is not set
-# CONFIG_EXAMPLES_WATCHDOG is not set
 # CONFIG_EXAMPLES_WGET is not set
 
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
 # CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
 
 #
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
 # CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 CONFIG_NETUTILS_WEBSERVER=y
 # CONFIG_NETUTILS_HTTPD_SINGLECONNECT is not set
 # CONFIG_NETUTILS_HTTPD_SCRIPT_DISABLE is not set
+CONFIG_NETUTILS_HTTPD_MAXPATH=64
 # CONFIG_NETUTILS_HTTPD_CGIPATH is not set
 CONFIG_NETUTILS_HTTPD_ERRPATH=""
 # CONFIG_NETUTILS_HTTPD_SERVERHEADER_DISABLE is not set
 CONFIG_NETUTILS_HTTPD_TIMEOUT=0
 CONFIG_NETUTILS_HTTPD_CLASSIC=y
 # CONFIG_NETUTILS_HTTPD_MMAP is not set
+# CONFIG_NETUTILS_HTTPD_SENDFILE is not set
 CONFIG_NETUTILS_HTTPD_KEEPALIVE_DISABLE=y
 # CONFIG_NETUTILS_XMLRPC is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -661,93 +946,17 @@ CONFIG_NETUTILS_HTTPD_KEEPALIVE_DISABLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# Custom Free Memory Command
-#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
 # CONFIG_SYSTEM_FREE is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# FLASH Program Installation
-#
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sysinfo
-#
-
-#
-# USB Monitor
-#
-
-#
-# EMACS-like Command Line Editor
-#
-# CONFIG_SYSTEM_CLE is not set
-
-#
-# VI Work-Alike Editor
-#
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# Zmodem Commands
-#
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/eagle100/nettest/Make.defs b/configs/eagle100/nettest/Make.defs
index 93d96b81d5d8fa556ae77ae4dccaaa8f3de432fa..98547e9e3143ec0d8468186825ccf13d4e7d6ca1 100644
--- a/configs/eagle100/nettest/Make.defs
+++ b/configs/eagle100/nettest/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/eagle100/nettest/defconfig b/configs/eagle100/nettest/defconfig
index bd692c7ffa9a2202aedbe428fda4cad25c9911d8..836fd24fe606e9f192ea7bfc349339ed970ad0db 100644
--- a/configs/eagle100/nettest/defconfig
+++ b/configs/eagle100/nettest/defconfig
@@ -41,14 +41,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -62,10 +64,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -75,10 +79,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 CONFIG_ARCH_CHIP_LM=y
@@ -97,7 +101,9 @@ CONFIG_ARCH_CHIP_LM=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
@@ -108,14 +114,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="tiva"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -125,6 +142,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -238,6 +256,7 @@ CONFIG_TIVA_GPIOG_IRQS=y
 # CONFIG_TIVA_PROMISCUOUS is not set
 # CONFIG_TIVA_TIMESTAMP is not set
 # CONFIG_TIVA_BADCRC is not set
+CONFIG_LM3S_ETHERNET_HPWORK=y
 # CONFIG_TIVA_DUMPPACKET is not set
 CONFIG_TIVA_BOARDMAC=y
 
@@ -258,6 +277,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -320,6 +340,7 @@ CONFIG_ARCH_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -338,6 +359,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=5
@@ -386,6 +408,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -393,12 +416,17 @@ CONFIG_NAME_MAX=32
 CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -416,6 +444,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -426,16 +455,21 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -443,9 +477,28 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -454,7 +507,9 @@ CONFIG_NETDEVICES=y
 # General Ethernet MAC Driver Options
 #
 # CONFIG_NETDEV_LOOPBACK is not set
+# CONFIG_NETDEV_TELNET is not set
 # CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NETDEV_LATEINIT is not set
 
 #
@@ -463,17 +518,16 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -497,13 +551,10 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -520,19 +571,27 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -540,13 +599,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -665,12 +722,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -689,6 +740,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -706,7 +761,7 @@ CONFIG_MM_REGIONS=1
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -714,6 +769,8 @@ CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -728,14 +785,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -747,22 +807,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # Application Configuration
 #
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -784,35 +848,44 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -823,8 +896,9 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -835,11 +909,12 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
@@ -861,15 +936,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/eagle100/nsh/Make.defs b/configs/eagle100/nsh/Make.defs
index 58144909900e16f2c4184a36eed44139959eb1f5..5709148db6958df019358d72d97739164663d700 100644
--- a/configs/eagle100/nsh/Make.defs
+++ b/configs/eagle100/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/eagle100/nsh/defconfig b/configs/eagle100/nsh/defconfig
index b8227f844f6c47d909eaaf0b7d47c32d1f318e08..68b819eba3bc28617498563d98e4aa6d555e0294 100644
--- a/configs/eagle100/nsh/defconfig
+++ b/configs/eagle100/nsh/defconfig
@@ -41,14 +41,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -62,10 +64,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -75,10 +79,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 CONFIG_ARCH_CHIP_LM=y
@@ -97,7 +101,9 @@ CONFIG_ARCH_CHIP_LM=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
@@ -108,14 +114,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="tiva"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -125,6 +142,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -238,6 +256,7 @@ CONFIG_TIVA_GPIOG_IRQS=y
 # CONFIG_TIVA_PROMISCUOUS is not set
 # CONFIG_TIVA_TIMESTAMP is not set
 # CONFIG_TIVA_BADCRC is not set
+CONFIG_LM3S_ETHERNET_HPWORK=y
 # CONFIG_TIVA_DUMPPACKET is not set
 CONFIG_TIVA_BOARDMAC=y
 
@@ -258,6 +277,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -316,19 +336,15 @@ CONFIG_ARCH_BOARD="eagle100"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -348,6 +364,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2012
 CONFIG_START_MONTH=2
@@ -402,6 +419,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -410,18 +428,23 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -439,6 +462,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -454,10 +478,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 CONFIG_SPI_CALLBACK=y
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
@@ -465,6 +495,7 @@ CONFIG_SPI_CALLBACK=y
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -472,7 +503,26 @@ CONFIG_SPI_CALLBACK=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -484,6 +534,7 @@ CONFIG_MMCSD_SPICLOCK=12500000
 CONFIG_MMCSD_SPIMODE=0
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -506,17 +557,16 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -540,10 +590,6 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -566,19 +612,26 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
 # CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -586,13 +639,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -719,7 +770,9 @@ CONFIG_FS_FAT=y
 # CONFIG_FAT_LCNAMES is not set
 # CONFIG_FAT_LFN is not set
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_NFS is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
@@ -728,12 +781,6 @@ CONFIG_FS_FAT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -752,6 +799,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -779,6 +830,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -796,7 +849,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -804,14 +858,17 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=4
 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_RESOLVCONF is not set
 CONFIG_NETDB_DNSSERVER_NOADDR=y
 # CONFIG_NETDB_DNSSERVER_IPv4 is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -830,18 +887,20 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -851,41 +910,47 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -898,8 +963,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -912,25 +978,27 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -949,6 +1017,7 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
 # CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
@@ -975,13 +1044,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -991,6 +1060,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -998,6 +1068,9 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Configure Command Options
@@ -1023,6 +1096,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1049,6 +1123,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
 CONFIG_NSH_TELNETD_CLIENTPRIO=100
 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
 CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 # CONFIG_NSH_TELNET_LOGIN is not set
 
 #
@@ -1063,13 +1139,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1078,5 +1153,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/eagle100/nxflat/Make.defs b/configs/eagle100/nxflat/Make.defs
index a3ded7f0c44dae87e158bf6ceb2beaaa21a73254..a412063356779d8e84ed6ebc7cc16bb581d746cb 100644
--- a/configs/eagle100/nxflat/Make.defs
+++ b/configs/eagle100/nxflat/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/eagle100/nxflat/defconfig b/configs/eagle100/nxflat/defconfig
index 67b18010a403e1943117cc285382958f1f037e00..805f9a4cd4fdf8851be3a25431aa5754ee71118c 100644
--- a/configs/eagle100/nxflat/defconfig
+++ b/configs/eagle100/nxflat/defconfig
@@ -21,6 +21,7 @@ CONFIG_WINDOWS_CYGWIN=y
 # Build Configuration
 #
 # CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
 # CONFIG_BUILD_2PASS is not set
 
 #
@@ -30,6 +31,7 @@ CONFIG_WINDOWS_CYGWIN=y
 # CONFIG_INTELHEX_BINARY is not set
 # CONFIG_MOTOROLA_SREC is not set
 CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
 
 #
 # Customize Header Files
@@ -39,12 +41,15 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
@@ -59,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,13 +76,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 CONFIG_ARCH_CHIP_LM=y
 # CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -87,29 +93,53 @@ CONFIG_ARCH_CHIP_LM=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
 CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="tiva"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
-CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
 # ARMV7M Configuration Options
 #
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -118,6 +148,8 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
 
 #
 # Tiva/Stellaris Configuration Options
@@ -129,23 +161,79 @@ CONFIG_ARCH_CHIP_LM3S6918=y
 # CONFIG_ARCH_CHIP_LM3S8962 is not set
 # CONFIG_ARCH_CHIP_LM4F120 is not set
 CONFIG_ARCH_CHIP_LM3S=y
-CONFIG_TIVA_HAVE_SSI1=y
 # CONFIG_LM_REVA2 is not set
+# CONFIG_TIVA_BOARD_EARLYINIT is not set
 
 #
 # Tiva/Stellaris Peripheral Support
 #
+# CONFIG_TIVA_ADC is not set
+# CONFIG_TIVA_HAVE_ADC0 is not set
+# CONFIG_TIVA_HAVE_ADC1 is not set
+# CONFIG_TIVA_I2C is not set
+CONFIG_TIVA_HAVE_I2C1=y
+# CONFIG_TIVA_HAVE_I2C2 is not set
+# CONFIG_TIVA_HAVE_I2C3 is not set
+# CONFIG_TIVA_HAVE_I2C4 is not set
+# CONFIG_TIVA_HAVE_I2C5 is not set
+# CONFIG_TIVA_HAVE_I2C6 is not set
+# CONFIG_TIVA_HAVE_I2C7 is not set
+# CONFIG_TIVA_HAVE_I2C8 is not set
+# CONFIG_TIVA_HAVE_I2C9 is not set
+# CONFIG_TIVA_HAVE_UART3 is not set
+# CONFIG_TIVA_HAVE_UART4 is not set
+# CONFIG_TIVA_HAVE_UART5 is not set
+# CONFIG_TIVA_HAVE_UART6 is not set
+# CONFIG_TIVA_HAVE_UART7 is not set
+CONFIG_TIVA_HAVE_SSI0=y
+CONFIG_TIVA_HAVE_SSI1=y
+# CONFIG_TIVA_HAVE_SSI2 is not set
+# CONFIG_TIVA_HAVE_SSI3 is not set
+CONFIG_TIVA_HAVE_ETHERNET=y
+CONFIG_TIVA_SSI=y
+# CONFIG_TIVA_TIMER is not set
+# CONFIG_TIVA_HAVE_TIMER0 is not set
+# CONFIG_TIVA_HAVE_TIMER1 is not set
+# CONFIG_TIVA_HAVE_TIMER2 is not set
+CONFIG_TIVA_HAVE_TIMER3=y
+# CONFIG_TIVA_HAVE_TIMER4 is not set
+# CONFIG_TIVA_HAVE_TIMER5 is not set
+# CONFIG_TIVA_HAVE_TIMER6 is not set
+# CONFIG_TIVA_HAVE_TIMER7 is not set
+# CONFIG_TIVA_ADC0 is not set
+# CONFIG_TIVA_I2C0 is not set
+# CONFIG_TIVA_I2C1 is not set
 CONFIG_TIVA_UART0=y
 # CONFIG_TIVA_UART1 is not set
 # CONFIG_TIVA_UART2 is not set
 CONFIG_TIVA_SSI0=y
 # CONFIG_TIVA_SSI1 is not set
+# CONFIG_TIVA_TIMER3 is not set
 # CONFIG_TIVA_ETHERNET is not set
 # CONFIG_TIVA_FLASH is not set
 
 #
-# Disable GPIO Interrupts
-#
+# Enable GPIO Interrupts
+#
+CONFIG_TIVA_GPIO_IRQS=y
+CONFIG_TIVA_HAVE_GPIOA_IRQS=y
+CONFIG_TIVA_HAVE_GPIOB_IRQS=y
+CONFIG_TIVA_HAVE_GPIOC_IRQS=y
+CONFIG_TIVA_HAVE_GPIOD_IRQS=y
+CONFIG_TIVA_HAVE_GPIOE_IRQS=y
+CONFIG_TIVA_HAVE_GPIOF_IRQS=y
+CONFIG_TIVA_HAVE_GPIOG_IRQS=y
+# CONFIG_TIVA_HAVE_GPIOH_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOJ_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOK_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOL_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOM_IRQS is not set
+# CONFIG_TIVA_HAVE_GPION_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOP_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOQ_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOR_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOS_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOT_IRQS is not set
 CONFIG_TIVA_GPIOA_IRQS=y
 CONFIG_TIVA_GPIOB_IRQS=y
 CONFIG_TIVA_GPIOC_IRQS=y
@@ -153,8 +241,6 @@ CONFIG_TIVA_GPIOD_IRQS=y
 CONFIG_TIVA_GPIOE_IRQS=y
 CONFIG_TIVA_GPIOF_IRQS=y
 CONFIG_TIVA_GPIOG_IRQS=y
-CONFIG_TIVA_GPIOH_IRQS=y
-# CONFIG_TIVA_GPIOJ_IRQS is not set
 
 #
 # Tiva/Stellaris SSI Configuration
@@ -169,10 +255,19 @@ CONFIG_SSI_TXLIMIT=4
 # CONFIG_ARCH_VECNOTIRQ is not set
 # CONFIG_ARCH_DMA is not set
 CONFIG_ARCH_HAVE_IRQPRIO=y
-# CONFIG_ARCH_ADDRENV is not set
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
@@ -227,39 +322,78 @@ CONFIG_ARCH_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_LIB_BOARDCTL is not set
 
 #
 # RTOS Features
 #
-# CONFIG_BOARD_INITIALIZE is not set
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+CONFIG_DISABLE_ENVIRON=y
+
+#
+# Clocks and Timers
+#
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
-CONFIG_RR_INTERVAL=200
-# CONFIG_SCHED_CPULOAD is not set
-# CONFIG_SCHED_INSTRUMENTATION is not set
-CONFIG_TASK_NAME_SIZE=0
-# CONFIG_SCHED_HAVE_PARENT is not set
+# CONFIG_CLOCK_MONOTONIC is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=5
 CONFIG_START_DAY=6
-CONFIG_DEV_CONSOLE=y
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nxflat_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+# CONFIG_SCHED_WAITPID is not set
+
+#
+# Pthread Options
+#
 # CONFIG_MUTEX_TYPES is not set
-# CONFIG_PRIORITY_INHERITANCE is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
 # CONFIG_FDCLONE_DISABLE is not set
 # CONFIG_FDCLONE_STDIO is not set
 CONFIG_SDCLONE_DISABLE=y
-# CONFIG_SCHED_WAITPID is not set
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
-CONFIG_USER_ENTRYPOINT="nxflat_main"
-CONFIG_DISABLE_OS_API=y
-# CONFIG_DISABLE_POSIX_TIMERS is not set
-# CONFIG_DISABLE_PTHREAD is not set
-# CONFIG_DISABLE_SIGNALS is not set
-# CONFIG_DISABLE_MQUEUE is not set
-CONFIG_DISABLE_ENVIRON=y
 
 #
 # Signal Numbers
@@ -270,19 +404,18 @@ CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
 
 #
-# Sizes of configurable things (0 disables)
+# POSIX Message Queue Options
 #
-CONFIG_MAX_TASKS=16
-CONFIG_NPTHREAD_KEYS=4
-CONFIG_NFILE_DESCRIPTORS=8
-CONFIG_NFILE_STREAMS=8
-CONFIG_NAME_MAX=32
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
-CONFIG_MAX_WDOGPARMS=2
-CONFIG_PREALLOC_WDOGS=4
-CONFIG_WDOG_INTRESERVE=0
-CONFIG_PREALLOC_TIMERS=4
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
 
 #
 # Stack and heap information
@@ -291,6 +424,7 @@ CONFIG_IDLETHREAD_STACKSIZE=1024
 CONFIG_USERMAIN_STACKSIZE=2048
 CONFIG_PTHREAD_STACK_MIN=256
 CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
 
 #
 # Device Drivers
@@ -299,14 +433,26 @@ CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
 # CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -314,16 +460,33 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -346,12 +509,14 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART6_SERIALDRIVER is not set
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
 CONFIG_MCU_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
 
 #
@@ -365,20 +530,23 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -387,6 +555,11 @@ CONFIG_UART0_2STOP=0
 # CONFIG_ARCH_HAVE_PHY is not set
 # CONFIG_NET is not set
 
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
 #
 # File Systems
 #
@@ -395,21 +568,20 @@ CONFIG_UART0_2STOP=0
 # File system configuration
 #
 # CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
 # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
 CONFIG_FS_READABLE=y
 # CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 CONFIG_FS_ROMFS=y
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -430,7 +602,11 @@ CONFIG_MM_REGIONS=1
 # CONFIG_AUDIO is not set
 
 #
-# Binary Formats
+# Wireless Support
+#
+
+#
+# Binary Loader
 #
 # CONFIG_BINFMT_DISABLE is not set
 CONFIG_NXFLAT=y
@@ -453,6 +629,7 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -464,14 +641,18 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
 CONFIG_ARCH_LOWPUTC=y
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -486,26 +667,25 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
-# CONFIG_EXAMPLES_LCDRW is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -513,69 +693,76 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 CONFIG_EXAMPLES_NXFLAT=y
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PASHELLO is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
 #
 # CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
 
 #
 # Interpreters
 #
+# CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
 # CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
@@ -594,93 +781,16 @@ CONFIG_EXAMPLES_NXFLAT=y
 #
 # System Libraries and NSH Add-Ons
 #
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# Custom Free Memory Command
-#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
 # CONFIG_SYSTEM_FREE is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# FLASH Program Installation
-#
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sysinfo
-#
-
-#
-# USB Monitor
-#
-
-#
-# EMACS-like Command Line Editor
-#
-# CONFIG_SYSTEM_CLE is not set
-
-#
-# VI Work-Alike Editor
-#
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# Zmodem Commands
-#
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/eagle100/src/lm_ethernet.c b/configs/eagle100/src/lm_ethernet.c
index 7a33e1af6cba6f07f5905620bad709a510055ede..69c6e6c8f485a6c6bdc00c50f448a33027b32696 100644
--- a/configs/eagle100/src/lm_ethernet.c
+++ b/configs/eagle100/src/lm_ethernet.c
@@ -83,7 +83,7 @@ void tiva_ethernetmac(struct ether_addr *ethaddr)
   user0 = getreg32(TIVA_FLASH_USERREG0);
   user1 = getreg32(TIVA_FLASH_USERREG1);
 
-  nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
+  ninfo("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
   DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff);
 
   /* Re-format that MAC address the way that the network expects to see it */
diff --git a/configs/eagle100/src/lm_leds.c b/configs/eagle100/src/lm_leds.c
index feea1dacf404cf94ebd24872634bf247d8e15ab7..5163bc9aadfe0d83c8bee56c62c804ade62ba235 100644
--- a/configs/eagle100/src/lm_leds.c
+++ b/configs/eagle100/src/lm_leds.c
@@ -55,21 +55,9 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#ifdef CONFIG_DEBUG_LEDS
+#ifdef CONFIG_DEBUG_LEDS_INFO
 #  define led_dumpgpio(m) tiva_dumpgpio(LED_GPIO, m)
 #else
 #  define led_dumpgpio(m)
@@ -79,16 +67,12 @@
  * Private Data
  ****************************************************************************/
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
+static uint8_t g_nest;
 
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
-static uint8_t g_nest;
-
 /****************************************************************************
  * Name: board_autoled_initialize
  *
@@ -100,7 +84,7 @@ static uint8_t g_nest;
 #ifdef CONFIG_ARCH_LEDS
 void board_autoled_initialize(void)
 {
-  leddbg("Initializing\n");
+  ledinfo("Initializing\n");
 
   /* Configure Port E, Bit 1 as an output, initial value=OFF */
 
diff --git a/configs/eagle100/src/lm_ssi.c b/configs/eagle100/src/lm_ssi.c
index adc5ad59edec70a4b4becedeeff31a474dc837dc..7befb1f87d640e474da7748bdb423904bc01cfd9 100644
--- a/configs/eagle100/src/lm_ssi.c
+++ b/configs/eagle100/src/lm_ssi.c
@@ -59,27 +59,9 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SSI_DEBUG   /* Define to enable debug */
-#undef SSI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SSI_DEBUG
-#  define ssidbg  lldbg
-#  ifdef SSI_VERBOSE
-#    define ssivdbg lldbg
-#  else
-#    define ssivdbg(x...)
-#  endif
-#else
-#  undef SSI_VERBOSE
-#  define ssidbg(x...)
-#  define ssivdbg(x...)
-#endif
-
-/* Dump GPIO registers */
+/* CONFIG_DEBUG_SPI enables debug output from this file */
 
-#ifdef SSI_VERBOSE
+#ifdef CONFIG_DEBUG_SPI
 #  define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
 #else
 #  define ssi_dumpgpio(m)
@@ -127,7 +109,7 @@ void weak_function lm_ssidev_initialize(void)
 
 void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
   if (devid == SPIDEV_MMCSD)
     {
       /* Assert the CS pin to the card */
@@ -140,7 +122,7 @@ void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool select
 
 uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  ssidbg("Returning SPI_STATUS_PRESENT\n");
+  spiinfo("Returning SPI_STATUS_PRESENT\n");
   return SPI_STATUS_PRESENT;
 }
 
diff --git a/configs/eagle100/thttpd/Make.defs b/configs/eagle100/thttpd/Make.defs
index e5405e96bc7598955fa8395769646a959eb4a044..061b695fe7cc326ac700bfa7e2c9f55277ad2f23 100644
--- a/configs/eagle100/thttpd/Make.defs
+++ b/configs/eagle100/thttpd/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/eagle100/thttpd/defconfig b/configs/eagle100/thttpd/defconfig
index 9bd0ee452b5debe61b735d7dc9b3b1176c614228..2f09e6dba22704ee5d0a355f36fdf55d731bfda4 100644
--- a/configs/eagle100/thttpd/defconfig
+++ b/configs/eagle100/thttpd/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 CONFIG_ARCH_CHIP_LM=y
@@ -92,7 +96,11 @@ CONFIG_ARCH_CHIP_LM=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -102,14 +110,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="tiva"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -119,6 +138,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -229,6 +249,7 @@ CONFIG_TIVA_GPIOG_IRQS=y
 # CONFIG_TIVA_PROMISCUOUS is not set
 # CONFIG_TIVA_TIMESTAMP is not set
 # CONFIG_TIVA_BADCRC is not set
+CONFIG_LM3S_ETHERNET_HPWORK=y
 # CONFIG_TIVA_DUMPPACKET is not set
 CONFIG_TIVA_BOARDMAC=y
 
@@ -249,11 +270,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -309,6 +333,7 @@ CONFIG_ARCH_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -327,6 +352,7 @@ CONFIG_DISABLE_MQUEUE=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=7
@@ -344,6 +370,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="thttp_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -374,6 +401,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -381,12 +409,17 @@ CONFIG_NAME_MAX=32
 CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -404,6 +437,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -414,16 +448,21 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -431,8 +470,28 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -440,7 +499,11 @@ CONFIG_NETDEVICES=y
 #
 # General Ethernet MAC Driver Options
 #
+# CONFIG_NETDEV_LOOPBACK is not set
+# CONFIG_NETDEV_TELNET is not set
 # CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
+# CONFIG_NETDEV_LATEINIT is not set
 
 #
 # External Ethernet MAC Device Support
@@ -448,16 +511,19 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
-# CONFIG_NET_VNET is not set
-# CONFIG_PIPES is not set
+# CONFIG_NET_FTMAC100 is not set
+CONFIG_PIPES=y
+CONFIG_DEV_PIPE_MAXSIZE=1024
+CONFIG_DEV_PIPE_SIZE=1024
+CONFIG_DEV_FIFO_SIZE=1024
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -481,13 +547,10 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -504,19 +567,27 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -524,13 +595,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -540,6 +609,7 @@ CONFIG_NET_GUARDSIZE=2
 #
 # CONFIG_NET_MULTILINK is not set
 CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
 # CONFIG_NET_TUN is not set
 
 #
@@ -625,6 +695,7 @@ CONFIG_IOB_NCHAINS=8
 # Routing Table Configuration
 #
 # CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME=""
 
 #
 # Crypto API
@@ -648,14 +719,10 @@ CONFIG_FS_READABLE=y
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 CONFIG_FS_ROMFS=y
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -675,6 +742,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -702,6 +773,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -717,13 +790,18 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -736,14 +814,14 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -751,11 +829,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -764,20 +842,21 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
@@ -785,6 +864,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 CONFIG_EXAMPLES_THTTPD=y
@@ -793,13 +873,24 @@ CONFIG_EXAMPLES_THTTPD_DRIPADDR=0x0a000001
 CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -811,20 +902,25 @@ CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
 CONFIG_NETUTILS_THTTPD=y
@@ -859,16 +955,10 @@ CONFIG_THTTPD_IDLE_SEND_LIMIT_SEC=300
 CONFIG_THTTPD_TILDE_MAP_NONE=y
 # CONFIG_THTTPD_GENERATE_INDICES is not set
 # CONFIG_THTTPD_USE_URLPATTERN is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -886,15 +976,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/efm32-g8xx-stk/nsh/Make.defs b/configs/efm32-g8xx-stk/nsh/Make.defs
index d1fd99eca4c428b0b6c82fb4894a83ff54ac116f..c9feff08e217dfbf80d60b4a56ffa11748833fb3 100644
--- a/configs/efm32-g8xx-stk/nsh/Make.defs
+++ b/configs/efm32-g8xx-stk/nsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/efm32-g8xx-stk/nsh/defconfig b/configs/efm32-g8xx-stk/nsh/defconfig
index a3112c194cbbab6363817fb7ea7bd836626ed259..088fd25255726c7546a0d153b21e16f1f0a3252d 100644
--- a/configs/efm32-g8xx-stk/nsh/defconfig
+++ b/configs/efm32-g8xx-stk/nsh/defconfig
@@ -41,12 +41,15 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
@@ -61,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -74,14 +76,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 CONFIG_ARCH_CHIP_EFM32=y
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
 # CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -90,27 +93,52 @@ CONFIG_ARCH_CHIP_EFM32=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
 CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="efm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 CONFIG_ARMV7M_CMNVECTOR=y
+# CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 
 #
 # ARMV7M Configuration Options
 #
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -119,6 +147,7 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 
 #
@@ -128,6 +157,7 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
 # CONFIG_ARCH_CHIP_EFM32G880F128 is not set
 CONFIG_ARCH_CHIP_EFM32G890F128=y
 # CONFIG_ARCH_CHIP_EFM32GG332F1024 is not set
+# CONFIG_ARCH_CHIP_EFM32GG990F1024 is not set
 # CONFIG_EFM32_EFM32TG is not set
 CONFIG_EFM32_EFM32G=y
 # CONFIG_EFM32_EFM32GG is not set
@@ -139,11 +169,17 @@ CONFIG_EFM32_HAVE_USART2=y
 CONFIG_EFM32_HAVE_UART0=y
 # CONFIG_EFM32_HAVE_UART1 is not set
 CONFIG_EFM32_HAVE_LEUART1=y
+# CONFIG_EFM32_HAVE_OTGFS is not set
 # CONFIG_EFM32_USART_ISUART is not set
 # CONFIG_EFM32_USART_ISSPI is not set
 # CONFIG_EFM32_UART is not set
 CONFIG_EFM32_LEUART=y
 # CONFIG_EFM32_DMA is not set
+# CONFIG_EFM32_RMU is not set
+# CONFIG_EFM32_FLASHPROG is not set
+# CONFIG_EFM32_I2C0 is not set
+# CONFIG_EFM32_I2C1 is not set
+# CONFIG_EFM32_BITBAND is not set
 # CONFIG_EFM32_USART0 is not set
 # CONFIG_EFM32_USART1 is not set
 # CONFIG_EFM32_USART2 is not set
@@ -151,7 +187,12 @@ CONFIG_EFM32_LEUART=y
 # CONFIG_EFM32_UART1 is not set
 CONFIG_EFM32_LEUART0=y
 # CONFIG_EFM32_LEUART1 is not set
+# CONFIG_EFM32_TIMER0 is not set
+# CONFIG_EFM32_TIMER1 is not set
+# CONFIG_EFM32_TIMER2 is not set
+# CONFIG_EFM32_TIMER3 is not set
 CONFIG_EFM32_GPIO_IRQ=y
+# CONFIG_EFM32_LECLOCK is not set
 CONFIG_LEUART0_SERIAL_CONSOLE=y
 # CONFIG_NO_LEUART_SERIAL_CONSOLE is not set
 
@@ -164,6 +205,7 @@ CONFIG_LEUART0_BAUD=2400
 CONFIG_LEUART0_BITS=8
 CONFIG_LEUART0_PARITY=0
 CONFIG_LEUART0_2STOP=0
+# CONFIG_EFM32_RTC_BURTC is not set
 
 #
 # Architecture Options
@@ -176,11 +218,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
@@ -233,7 +278,6 @@ CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -243,6 +287,8 @@ CONFIG_NSH_MMCSDMINOR=0
 # EFM32 G8XX STK Hardware Configuration
 #
 # CONFIG_EFM32G8STK_BCEN is not set
+# CONFIG_BOARD_CRASHDUMP is not set
+# CONFIG_LIB_BOARDCTL is not set
 
 #
 # RTOS Features
@@ -260,6 +306,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2010
 CONFIG_START_MONTH=5
@@ -277,6 +324,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -327,9 +375,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -350,6 +399,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -360,29 +410,57 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
-# CONFIG_TIMER is not set
 # CONFIG_ANALOG is not set
 # CONFIG_AUDIO_DEVICES is not set
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -406,30 +484,33 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 CONFIG_OTHER_UART_SERIALDRIVER=y
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
-# CONFIG_UART0_SERIAL_CONSOLE is not set
 CONFIG_OTHER_SERIAL_CONSOLE=y
 # CONFIG_NO_SERIAL_CONSOLE is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -458,11 +539,7 @@ CONFIG_DISABLE_MOUNTPOINT=y
 CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -482,6 +559,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -506,6 +587,7 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -517,15 +599,20 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
 CONFIG_ARCH_LOWPUTC=y
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -538,26 +625,24 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -565,75 +650,75 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
 #
 # CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
 
 #
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
 # CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -651,13 +736,16 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
 # CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -666,15 +754,17 @@ CONFIG_NSH_NESTDEPTH=3
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -684,12 +774,15 @@ CONFIG_NSH_NESTDEPTH=3
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -712,6 +805,8 @@ CONFIG_NSH_FILEIOSIZE=256
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 # CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -725,113 +820,20 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# EMACS-like Command Line Editor
-#
 CONFIG_SYSTEM_CLE=y
 CONFIG_SYSTEM_CLE_DEBUGLEVEL=0
-
-#
-# FLASH Program Installation
-#
-# CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# Intel HEX to binary conversion
-#
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-
-#
-# P-Code Support
-#
-
-#
-# PHY Tool
-#
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sudoku
-#
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-
-#
-# Sysinfo
-#
-
-#
-# VI Work-Alike Editor
-#
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# USB Monitor
-#
-
-#
-# Zmodem Commands
-#
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/efm32-g8xx-stk/src/efm32_autoleds.c b/configs/efm32-g8xx-stk/src/efm32_autoleds.c
index 5c3164671215108fddfd9b6cc290128c3536fa49..086f7f32e4973b91d046102a6d2903deac4509ee 100644
--- a/configs/efm32-g8xx-stk/src/efm32_autoleds.c
+++ b/configs/efm32-g8xx-stk/src/efm32_autoleds.c
@@ -59,18 +59,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* The following definitions map the encoded LED setting to GPIO settings */
 
 #define EFM32_LED0        (1 << 0)
diff --git a/configs/efm32-g8xx-stk/src/efm32_userleds.c b/configs/efm32-g8xx-stk/src/efm32_userleds.c
index d21868ea62ef1efb460da039b1ff8ec3433b7ee0..31125325ebe39512552a1f3e8d9921fe32601b25 100644
--- a/configs/efm32-g8xx-stk/src/efm32_userleds.c
+++ b/configs/efm32-g8xx-stk/src/efm32_userleds.c
@@ -55,22 +55,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
diff --git a/configs/efm32gg-stk3700/nsh/Make.defs b/configs/efm32gg-stk3700/nsh/Make.defs
index d1fd99eca4c428b0b6c82fb4894a83ff54ac116f..c9feff08e217dfbf80d60b4a56ffa11748833fb3 100644
--- a/configs/efm32gg-stk3700/nsh/Make.defs
+++ b/configs/efm32gg-stk3700/nsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/efm32gg-stk3700/nsh/defconfig b/configs/efm32gg-stk3700/nsh/defconfig
index d8d3ea37a76efbc45c3803bbe10b4a3a8d8d228c..99799b32989a3b64139912e63e18a14c19021bf3 100644
--- a/configs/efm32gg-stk3700/nsh/defconfig
+++ b/configs/efm32gg-stk3700/nsh/defconfig
@@ -41,14 +41,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -62,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -75,14 +76,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 CONFIG_ARCH_CHIP_EFM32=y
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
 # CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -91,10 +93,15 @@ CONFIG_ARCH_CHIP_EFM32=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -104,14 +111,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="efm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 CONFIG_ARMV7M_CMNVECTOR=y
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 
 #
 # ARMV7M Configuration Options
@@ -120,6 +138,7 @@ CONFIG_ARMV7M_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -157,8 +176,10 @@ CONFIG_EFM32_HAVE_OTGFS=y
 CONFIG_EFM32_LEUART=y
 # CONFIG_EFM32_DMA is not set
 # CONFIG_EFM32_RMU is not set
+# CONFIG_EFM32_FLASHPROG is not set
 # CONFIG_EFM32_I2C0 is not set
 # CONFIG_EFM32_I2C1 is not set
+# CONFIG_EFM32_BITBAND is not set
 # CONFIG_EFM32_USART0 is not set
 # CONFIG_EFM32_USART1 is not set
 # CONFIG_EFM32_USART2 is not set
@@ -197,11 +218,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
@@ -254,7 +278,6 @@ CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -264,6 +287,7 @@ CONFIG_NSH_MMCSDMINOR=0
 # EFM32GG-STK3700 Hardware Configuration
 #
 # CONFIG_EFM32GG_STK3700_BCEN is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -282,6 +306,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2010
 CONFIG_START_MONTH=5
@@ -299,6 +324,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -349,9 +375,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -372,6 +399,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -382,10 +410,12 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
@@ -399,17 +429,38 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -433,30 +484,33 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 CONFIG_OTHER_UART_SERIALDRIVER=y
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_OTHER_SERIAL_CONSOLE=y
 # CONFIG_NO_SERIAL_CONSOLE is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -485,12 +539,7 @@ CONFIG_DISABLE_MOUNTPOINT=y
 CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -510,6 +559,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -549,13 +602,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -568,26 +625,24 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -595,35 +650,42 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -635,32 +697,28 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_PPPD is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -678,6 +736,7 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
@@ -686,6 +745,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -694,12 +754,13 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -713,12 +774,15 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -741,6 +805,8 @@ CONFIG_NSH_FILEIOSIZE=256
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 # CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -754,17 +820,20 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 CONFIG_SYSTEM_CLE=y
 CONFIG_SYSTEM_CLE_DEBUGLEVEL=0
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-# CONFIG_SYSTEM_POWEROFF is not set
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/efm32gg-stk3700/src/efm32_autoleds.c b/configs/efm32gg-stk3700/src/efm32_autoleds.c
index 4b1cf4dfdf8367f08a290f2a107cbf43bd4485ed..4500f4e8392440ae9a612f649e7fff9fa0958cc9 100644
--- a/configs/efm32gg-stk3700/src/efm32_autoleds.c
+++ b/configs/efm32gg-stk3700/src/efm32_autoleds.c
@@ -89,30 +89,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/efm32gg-stk3700/src/efm32_userleds.c b/configs/efm32gg-stk3700/src/efm32_userleds.c
index 10b4f4df9bb98368426f3d4b0dec4cfbc764afaf..9e30b55a89e85b9997fbc2acdfa5691cca472ba9 100644
--- a/configs/efm32gg-stk3700/src/efm32_userleds.c
+++ b/configs/efm32gg-stk3700/src/efm32_userleds.c
@@ -66,22 +66,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/ekk-lm3s9b96/nsh/Make.defs b/configs/ekk-lm3s9b96/nsh/Make.defs
index 83c70458db4ca67b1c2b6aefec02e02786f53499..7fdee356dcbb2ed485e836bfecdc5dc6ba3bf190 100644
--- a/configs/ekk-lm3s9b96/nsh/Make.defs
+++ b/configs/ekk-lm3s9b96/nsh/Make.defs
@@ -75,7 +75,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/ekk-lm3s9b96/nsh/defconfig b/configs/ekk-lm3s9b96/nsh/defconfig
index 3d89e90c42e91ae0a06d3f4c26c4b9a12f41ad91..a87e1bdd299f3f20f2e935ee0b5018005f5e73fe 100644
--- a/configs/ekk-lm3s9b96/nsh/defconfig
+++ b/configs/ekk-lm3s9b96/nsh/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 CONFIG_ARCH_CHIP_LM=y
@@ -93,7 +97,9 @@ CONFIG_ARCH_CHIP_LM=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
@@ -104,14 +110,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="tiva"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -121,6 +138,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -233,6 +251,7 @@ CONFIG_TIVA_GPIOG_IRQS=y
 # CONFIG_TIVA_PROMISCUOUS is not set
 # CONFIG_TIVA_TIMESTAMP is not set
 # CONFIG_TIVA_BADCRC is not set
+CONFIG_LM3S_ETHERNET_HPWORK=y
 # CONFIG_TIVA_DUMPPACKET is not set
 # CONFIG_TIVA_BOARDMAC is not set
 
@@ -247,6 +266,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -305,19 +325,15 @@ CONFIG_ARCH_BOARD="ekk-lm3s9b96"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -337,6 +353,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2010
 CONFIG_START_MONTH=5
@@ -391,6 +408,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -399,18 +417,23 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -428,6 +451,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -443,10 +467,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 CONFIG_SPI_CALLBACK=y
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
@@ -454,6 +484,7 @@ CONFIG_SPI_CALLBACK=y
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -461,7 +492,26 @@ CONFIG_SPI_CALLBACK=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=0
 # CONFIG_MMCSD_READONLY is not set
@@ -473,6 +523,7 @@ CONFIG_MMCSD_SPICLOCK=20000000
 CONFIG_MMCSD_SPIMODE=0
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -495,17 +546,16 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -529,10 +579,6 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -555,19 +601,26 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
 # CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -575,13 +628,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -708,7 +759,9 @@ CONFIG_FS_FAT=y
 # CONFIG_FAT_LCNAMES is not set
 # CONFIG_FAT_LFN is not set
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 CONFIG_NFS=y
 # CONFIG_NFS_STATISTICS is not set
 # CONFIG_FS_NXFFS is not set
@@ -718,12 +771,6 @@ CONFIG_NFS=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -742,6 +789,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -769,6 +820,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -786,7 +839,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -794,14 +848,17 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=8
 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_RESOLVCONF is not set
 CONFIG_NETDB_DNSSERVER_NOADDR=y
 # CONFIG_NETDB_DNSSERVER_IPv4 is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -820,18 +877,20 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -841,41 +900,47 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -888,8 +953,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -901,25 +967,27 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -938,6 +1006,7 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
 # CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
@@ -964,7 +1033,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -972,6 +1040,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSFMOUNT is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -981,6 +1050,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -988,6 +1058,9 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Configure Command Options
@@ -1013,6 +1086,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1041,6 +1115,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
 CONFIG_NSH_TELNETD_CLIENTPRIO=100
 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
 CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 # CONFIG_NSH_TELNET_LOGIN is not set
 
 #
@@ -1055,13 +1131,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1070,5 +1145,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/ekk-lm3s9b96/src/lm_ethernet.c b/configs/ekk-lm3s9b96/src/lm_ethernet.c
index c3627e4a16c8feb73cb47f0682ed5b66941d663b..3c9cca9d6e4d16b71c95166f0da360232279e96b 100644
--- a/configs/ekk-lm3s9b96/src/lm_ethernet.c
+++ b/configs/ekk-lm3s9b96/src/lm_ethernet.c
@@ -84,7 +84,7 @@ void tiva_ethernetmac(struct ether_addr *ethaddr)
   user0 = getreg32(TIVA_FLASH_USERREG0);
   user1 = getreg32(TIVA_FLASH_USERREG1);
 
-  nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
+  ninfo("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
   DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff);
 
   /* Re-format that MAC address the way that the network expects to see it */
diff --git a/configs/ekk-lm3s9b96/src/lm_leds.c b/configs/ekk-lm3s9b96/src/lm_leds.c
index 0cee2dc4a83df3798743e89bb88c8b298b790481..f2e4022717de7c7f47ce9a8592e5775f197f94dc 100644
--- a/configs/ekk-lm3s9b96/src/lm_leds.c
+++ b/configs/ekk-lm3s9b96/src/lm_leds.c
@@ -56,21 +56,9 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#ifdef CONFIG_DEBUG_LEDS
+#ifdef CONFIG_DEBUG_LEDS_INFO
 #  define led_dumpgpio(m) tiva_dumpgpio(LED_GPIO, m)
 #else
 #  define led_dumpgpio(m)
@@ -80,16 +68,12 @@
  * Private Data
  ****************************************************************************/
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
+static uint8_t g_nest;
 
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
-static uint8_t g_nest;
-
 /****************************************************************************
  * Name: board_autoled_initialize
  ****************************************************************************/
@@ -97,7 +81,7 @@ static uint8_t g_nest;
 #ifdef CONFIG_ARCH_LEDS
 void board_autoled_initialize(void)
 {
-  leddbg("Initializing\n");
+  ledinfo("Initializing\n");
 
   /* Configure Port D, Bit 0 as an output, initial value=OFF */
 
diff --git a/configs/ekk-lm3s9b96/src/lm_ssi.c b/configs/ekk-lm3s9b96/src/lm_ssi.c
index e2a26bc1b50ca233b97f4cf41b615fbc484b416a..911e923e848877fd146842a733a1c98c927621a1 100644
--- a/configs/ekk-lm3s9b96/src/lm_ssi.c
+++ b/configs/ekk-lm3s9b96/src/lm_ssi.c
@@ -58,38 +58,14 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SSI_DEBUG   /* Define to enable debug */
-#undef SSI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SSI_DEBUG
-#  define ssidbg  lldbg
-#  ifdef SSI_VERBOSE
-#    define ssivdbg lldbg
-#  else
-#    define ssivdbg(x...)
-#  endif
-#else
-#  undef SSI_VERBOSE
-#  define ssidbg(x...)
-#  define ssivdbg(x...)
-#endif
+/* CONFIG_DEBUG_SPI enables debug output from this file */
 
-/* Dump GPIO registers */
-
-#ifdef SSI_VERBOSE
-#if 0
+#ifdef CONFIG_DEBUG_SPI
 #  define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
-#endif
 #else
 #  define ssi_dumpgpio(m)
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -133,7 +109,7 @@ void weak_function lm_ssidev_initialize(void)
 
 void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
   ssi_dumpgpio("tiva_ssiselect() Entry");
   if (devid == SPIDEV_MMCSD)
     {
@@ -154,7 +130,7 @@ void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool select
 
 uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  ssidbg("Returning SPI_STATUS_PRESENT\n");
+  spiinfo("Returning SPI_STATUS_PRESENT\n");
   return SPI_STATUS_PRESENT;
 }
 #endif
diff --git a/configs/esp32-core/Kconfig b/configs/esp32-core/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..79656051e9965e14bde320f818269935cb435032
--- /dev/null
+++ b/configs/esp32-core/Kconfig
@@ -0,0 +1,41 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_BOARD_ESP32CORE
+
+choice
+	prompt "On-board Crystal Frequency"
+	default ESP32CORE_XTAL_40MZ
+
+config ESP32CORE_XTAL_40MZ
+	bool "40MHz"
+
+config ESP32CORE_XTAL_26MHz
+	bool "26MHz"
+
+endchoice # On-board Crystal Frequency
+
+config ESP32CORE_RUN_IRAM
+	bool "Run from IRAM"
+	default n
+	---help---
+		The default configuration is set up run from IRAM.  However, the
+		current (2016-11-14) OpenOCD for ESP32 does not support writing to
+		FLASH.  This option sets up the linker scripts to support execution
+		from IRAM.  In this case, OpenOCD can be used to load directly into
+		IRAM.
+
+		At this stage the nuttx image is small enough to be entirely memory-
+		resident.  Once board support is more mature you can add flash cache
+		mapping code to run from SPI flash after initial boot. There are at
+		least two possible approaches you could take: You can add the flash
+		cache mapping code into nuttx directly, so it is self-contained -
+		early nuttx initialisation runs from IRAM and enables flash cache,
+		and then off you go. Or you can use the esp-idf software bootloader
+		and partition table scheme and have nuttx be an esp-idf "app" which
+		allows interoperability with the esp-idf system but makes you
+		reliant on the esp-idf design for these parts. Both are possible.
+
+endif # ARCH_BOARD_ESP32CORE
diff --git a/configs/esp32-core/README.txt b/configs/esp32-core/README.txt
new file mode 100644
index 0000000000000000000000000000000000000000..674fab89956153bd063b39ba3465fe346f8d2e92
--- /dev/null
+++ b/configs/esp32-core/README.txt
@@ -0,0 +1,764 @@
+README for the Expressif ESP32 Core board (V2)
+==============================================
+
+  The ESP32 is a dual-core system from Expressif with two Harvard
+  architecture Xtensa LX6 CPUs. All embedded memory, external memory and
+  peripherals are located on the data bus and/or the instruction bus of
+  these CPUs. With some minor exceptions, the address mapping of two CPUs
+  is symmetric, meaning they use the same addresses to access the same
+  memory. Multiple peripherals in the system can access embedded memory via
+  DMA.
+
+  The two CPUs are named "PRO_CPU" and "APP_CPU" (for "protocol" and
+  "application"), however for most purposes the two CPUs are
+  interchangeable.
+
+Contents
+========
+
+  o STATUS
+  o ESP32 Features
+  o ESP32 Toolchain
+  o Memory Map
+  o Serial Console
+  o Buttons and LEDs
+  o SMP
+  o OpenOCD for the ESP32
+  o Executing and Debugging from FLASH and IRAM
+  o Configurations
+  o Things to Do
+
+STATUS
+======
+
+  The basic port is underway.  No testing has yet been performed.
+
+ESP32 Features
+==============
+
+  * Address Space
+    - Symmetric address mapping
+    - 4 GB (32-bit) address space for both data bus and instruction bus
+    - 1296 KB embedded memory address space
+    - 19704 KB external memory address space
+    - 512 KB peripheral address space
+    - Some embedded and external memory regions can be accessed by either
+      data bus or instruction bus
+    - 328 KB DMA address space
+  * Embedded Memory
+    - 448 KB Internal ROM
+    - 520 KB Internal SRAM
+    - 8 KB RTC FAST Memory
+    - 8 KB RTC SLOW Memory
+  * External Memory
+    Off-chip SPI memory can be mapped into the available address space as
+    external memory. Parts of the embedded memory can be used as transparent
+    cache for this external memory.
+    - Supports up to 16 MB off-Chip SPI Flash.
+    - Supports up to 8 MB off-Chip SPI SRAM.
+  * Peripherals
+    - 41 peripherals
+  * DMA
+    - 13 modules are capable of DMA operation
+
+ESP32 Toolchain
+===============
+
+  You must use the custom Xtensa toolchain in order to build the ESP32 Core
+  BSP.  The steps to build toolchain with crosstool-NG on Linux are as
+  follows:
+
+    git clone -b xtensa-1.22.x https://github.com/espressif/crosstool-NG.git
+    cd crosstool-NG
+    ./bootstrap && ./configure --prefix=$PWD && make install
+    ./ct-ng xtensa-esp32-elf
+    ./ct-ng build
+    chmod -R u+w builds/xtensa-esp32-elf
+
+  These steps are given in setup guide in ESP-IDF repository:
+  https://github.com/espressif/esp-idf/blob/master/docs/linux-setup.rst#alternative-step-1-compile-the-toolchain-from-source-using-crosstool-ng
+
+  NOTE: The xtensa-esp32-elf configuration is only available in the
+  xtensa-1.22.x branch.
+
+Memory Map
+==========
+
+  Address Mapping
+  ----------- ---------- ---------- --------------- ---------------
+  BUS TYPE    START      LAST       DESCRIPTION     NOTES
+  ----------- ---------- ---------- --------------- ---------------
+              0x00000000 0x3F3FFFFF                 Reserved
+  Data        0x3F400000 0x3F7FFFFF External Memory
+  Data        0x3F800000 0x3FBFFFFF External Memory
+              0x3FC00000 0x3FEFFFFF                 Reserved
+  Data        0x3FF00000 0x3FF7FFFF Peripheral
+  Data        0x3FF80000 0x3FFFFFFF Embedded Memory
+  Instruction 0x40000000 0x400C1FFF Embedded Memory
+  Instruction 0x400C2000 0x40BFFFFF External Memory
+              0x40C00000 0x4FFFFFFF                 Reserved
+  Data /      0x50000000 0x50001FFF Embedded Memory
+  Instruction
+              0x50002000 0xFFFFFFFF                 Reserved
+
+  Embedded Memory
+  ----------- ---------- ---------- --------------- ---------------
+  BUS TYPE    START      LAST       DESCRIPTION     NOTES
+  ----------- ---------- ---------- --------------- ---------------
+  Data        0x3ff80000 0x3ff81fff RTC FAST Memory PRO_CPU Only
+              0x3ff82000 0x3ff8ffff                 Reserved
+  Data        0x3ff90000 0x3ff9ffff Internal ROM 1
+              0x3ffa0000 0x3ffadfff                 Reserved
+  Data        0x3ffae000 0x3ffdffff Internal SRAM 2 DMA
+  Data        0x3ffe0000 0x3fffffff Internal SRAM 1 DMA
+
+  Boundary Address
+  ----------- ---------- ---------- --------------- ---------------
+  BUS TYPE    START      LAST       DESCRIPTION     NOTES
+  ----------- ---------- ---------- --------------- ---------------
+  Instruction 0x40000000 0x40007fff Internal ROM 0  Remap
+  Instruction 0x40008000 0x4005ffff Internal ROM 0
+              0x40060000 0x4006ffff                 Reserved
+  Instruction 0x40070000 0x4007ffff Internal SRAM 0 Cache
+  Instruction 0x40080000 0x4009ffff Internal SRAM 0
+  Instruction 0x400a0000 0x400affff Internal SRAM 1
+  Instruction 0x400b0000 0x400b7FFF Internal SRAM 1 Remap
+  Instruction 0x400b8000 0x400bffff Internal SRAM 1
+  Instruction 0x400c0000 0x400c1FFF RTC FAST Memory PRO_CPU Only
+  Data /      0x50000000 0x50001fff RTC SLOW Memory
+  Instruction
+
+  External Memory
+  ----------- ---------- ---------- --------------- ---------------
+  BUS TYPE    START      LAST       DESCRIPTION     NOTES
+  ----------- ---------- ---------- --------------- ---------------
+  Data        0x3f400000 0x3f7fffff External Flash  Read
+  Data        0x3f800000 0x3fbfffff External SRAM   Read and Write
+
+  Boundary Address
+  ----------------
+  Instruction 0x400c2000 0x40bfffff 11512 KB External Flash Read
+
+  Linker Segments
+  ------------------ ---------- ---------- ---- ----------------------------
+  DESCRIPTION        START      END        ATTR LINKER SEGMENT NAME
+  ------------------ ---------- ---------- ---- ----------------------------
+  FLASH mapped data: 0x3f400010 0x3fc00010  R   drom0_0_seg
+    - .rodata
+    - Constructors/destructors
+  COMMON data RAM:   0x3ffb0000 0x40000000  RW  dram0_0_seg  (NOTE 1,2)
+    - .bss/.data
+  IRAM for PRO cpu:  0x40080000 0x400a0000  RX  iram0_0_seg
+    - Interrupt Vectors
+    - Low level handlers
+    - Xtensa/Expressif libraries
+  RTC fast memory:   0x400c0000 0x400c2000  RWX rtc_iram_seg (PRO_CPU only)
+    - .rtc.text (unused?)
+  FLASH:             0x400d0018 0x40400018  RX  iram0_2_seg  (actually FLASH)
+    - .text
+  RTC slow memory:   0x50000000 0x50001000  RW  rtc_slow_seg (NOTE 3)
+    - .rtc.data/rodata (unused?)
+
+  NOTE 1: Linker script will reserve space at the beginning of the segment
+          for BT and at the end for trace memory.
+  NOTE 2: Heap enads at the top of dram_0_seg
+  NOTE 3: Linker script will reserve space at the beginning of the segment
+          for co-processor reserve memory and at the end for ULP coprocessor
+          reserve memory.
+
+Serial Console
+==============
+
+  UART0 is, by default, the serial console.  It connects to the on-board
+  CP2102 converter and is available on the USB connector USB CON8 (J1).
+
+  It will show up as /dev/ttypUSB[n] where [n] will probably be 0 (is it 1
+  on my PC because I have a another device at ttyUSB0).
+
+Buttons and LEDs
+================
+
+  Buttons
+  -------
+  There are two buttons labeled Boot and EN.  The EN button is not available
+  to software.  It pulls the chip enable line that doubles as a reset line.
+
+  The BOOT button is connected to IO0.  On reset it is used as a strapping
+  pin to determine whether the chip boots normally or into the serial
+  bootloader.  After reset, however, the BOOT button can be used for software
+  input.
+
+  LEDs
+  ----
+  There are several on-board LEDs for that indicate the presence of power
+  and USB activity.  None of these are available for use by sofware.
+
+SMP
+===
+
+  The ESP32 has 2 CPUs.  Support is included for testing an SMP configuration.
+  That configuration is still not yet ready for usage but can be enabled with
+  the following configuration settings:
+
+    RTOS Features -> Tasks and Scheduling
+      CONFIG_SPINLOCK=y
+      CONFIG_SMP=y
+      CONFIG_SMP_NCPUS=2
+      CONFIG_SMP_IDLETHREAD_STACKSIZE=3072
+
+  Debug Tip:  During debug session, OpenOCD may mysteriously switch from one
+  CPU to another.  This behavior can be eliminated by uncommenting one of the
+  following in scripts/esp32.cfg
+
+    # Only configure the PRO CPU
+    #set ESP32_ONLYCPU 1
+    # Only configure the APP CPU
+    #set ESP32_ONLYCPU 2
+
+  Open Issues:
+
+  1. Currently all device interrupts are handled on the PRO CPU only.  Critical
+     sections will attempt to disable interrupts but will now disable interrupts
+     only on the current CPU (which may not be CPU0).  Perhaps that should be a
+     spinlock to prohibit execution of interrupts on CPU0 when other CPUs are in
+     a critical section?
+
+  2. Cache Issues.  I have not though about this yet, but certainly caching is
+     an issue in an SMP system:
+
+     - Cache coherency.  Are there separate caches for each CPU?  Or a single
+       shared cache?  If the are separate then keep the caches coherent will
+       be an issue.
+     - Caching MAY interfere with spinlocks as they are currently implemented.
+       Waiting on a cached copy of the spinlock may result in a hang or a
+       failure to wait.
+
+  3. Assertions.  On a fatal assertions, other CPUs need to be stopped.
+
+OpenOCD for the ESP32
+=====================
+
+  First you in need some debug environment which would be a JTAG emulator
+  and the ESP32 OpenOCD software which is available here:
+  https://github.com/espressif/openocd-esp32
+
+  OpenOCD Documentation
+  ---------------------
+  There is on overiew of the use of OpenOCD here:
+  https://dl.espressif.com/doc/esp-idf/latest/openocd.html
+  This document is also available in ESP-IDF source tree in docs
+  directory (https://github.com/espressif/esp-idf).
+
+  OpenOCD Configuration File
+  --------------------------
+  A template ESP32 OpenOCD configuration file is provided in
+  ESP-IDF docs directory (esp32.cfg).  Since you are not using
+  FreeRTOS, you will need to uncomment the line:
+
+    set ESP32_RTOS none
+
+  in the OpenOCD configuration file.  You will also need to change
+  the source line from:
+
+    find interface/ftdi/tumpa.cfg
+
+  to reflect the physical JTAG adapter connected.
+
+  NOTE: A copy of this OpenOCD configuration file available in the NuttX
+  source tree at nuttx/config/esp32-core/scripts/esp32.cfg..  It has these
+  modifications:
+
+    - The referenced "set ESP32_RTOS none" line has been uncommented
+    - The "ind interface/ftdi/tumpa.cfg".  This means that you will
+      need to specify the interface configuration file on the OpenOCD
+      command line.
+
+  General OpenOCD build instructions
+  ----------------------------------
+  Installing OpenOCD.  The sources for the ESP32-enabled variant of
+  OpenOCD are available from Espressifs Github. To download the source,
+  use the following commands:
+
+    git clone https://github.com/espressif/openocd-esp32.git
+    cd openocd-esp32
+    git submodule init
+    git submodule update
+
+  Then look at the README and the docs/INSTALL.txt files in the
+  openocd-esp32 directory for further instructions.  There area
+  separate README files for Linux/Cygwin, OSX, and Windows.  Here
+  is what I ended up doing (under Linux):
+
+    cd openocd-esp32
+    ./bootstrap
+    ./configure
+    make
+
+   If you do not do the install step, then you will have a localhost
+   version of the OpenOCD binary at openocd-esp32/src.
+
+  Starting the OpenOCD Server
+  ---------------------------
+
+    - cd to openocd-esp32 directory
+    - copy the modified esp32.cfg script to this directory
+
+  Then start OpenOCD by executing a command like the following.  Here
+  I assume that:
+
+    - You did not install OpenOCD; binararies are avalable at
+      openocd-esp32/src and interface scripts are in
+      openocd-eps32/tcl/interface
+    - I select the configuration for the Olimex ARM-USB-OCD
+      debugger.
+
+  Then the command to start OpenOCD is:
+
+    sudo ./src/openocd -s ./tcl -f tcl/interface/ftdi/olimex-arm-usb-ocd.cfg -f ./esp32.cfg
+
+  I then see:
+
+    Open On-Chip Debugger 0.10.0-dev-g3098897 (2016-11-14-12:19)
+    Licensed under GNU GPL v2
+    For bug reports, read
+            http://openocd.org/doc/doxygen/bugs.html
+    adapter speed: 200 kHz
+    force hard breakpoints
+    Info : clock speed 200 kHz
+    Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
+    Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
+    Info : esp32.cpu0: Debug controller was reset (pwrstat=0x5F, after clear 0x0F).
+    Info : esp32.cpu0: Core was reset (pwrstat=0x5F, after clear 0x0F).
+
+  Connecting a debugger to OpenOCD
+  --------------------------------
+  OpenOCD should now be ready to accept gdb connections. If you have
+  compiled the ESP32 toolchain using Crosstool-NG, or if you have
+  downloaded a precompiled toolchain from the Espressif website, you
+  should already have xtensa-esp32-elf-gdb, a version of gdb that can
+  be used for this
+
+  First, make sure the project you want to debug is compiled and
+  flashed into the ESP32’s SPI flash. Then, in a different console
+  than OpenOCD is running in, invoke gdb. For example, for the
+  template app, you would do this like such:
+
+    cd nuttx
+    xtensa-esp32-elf-gdb -ex 'target remote localhost:3333' nuttx
+
+  This should give you a gdb prompt.
+
+  Breakpoints
+  -----------
+  You can set up to 2 hardware breakpoints, which can be anywhere in the
+  address space. Also 2 hardware watchpoints.
+
+  The openocd esp32.cfg file currently forces gdb to use hardware
+  breakpoints, I believe because software breakpoints (or, at least, the
+  memory map for automatically choosing them) aren't implemented yet
+  (as of 2016-11-14).
+
+  JTAG Emulator
+  -------------
+  The documentation indicates that you need to use an external JTAG
+  like the TIAO USB Multi-protocol Adapter and the Flyswatter2.
+  The instructions at http://www.esp32.com/viewtopic.php?t=381 show
+  use of an FTDI C232HM-DDHSL-0 USB 2.0 high speed to MPSSE cable.
+
+  The ESP32 Core v2 board has no on board JTAG connector.  It will
+  be necessary to make a cable or some other board to connect a JTAG
+  emulator.  Refer to http://www.esp32.com/viewtopic.php?t=381 "How
+  to debug ESP32 with JTAG / OpenOCD / GDB 1st part connect the
+  hardware."
+
+  Relevant pin-out:
+
+    -------- ----------
+    PIN      JTAG
+    LABEL    FUNCTION
+    -------- ----------
+    IO14     TMS
+    IO12     TDI
+    GND      GND
+    IO13     TCK
+    -------- ----------
+    IO15     TDO
+    -------- ----------
+
+  You can find the mapping of JTAG signals to ESP32 GPIO numbers in
+  "ESP32 Pin List" document found here:
+  http://espressif.com/en/support/download/documents?keys=&field_type_tid%5B%5D=13
+
+  I put the ESP32 on a prototyping board and used a standard JTAG 20-pin
+  connector with an older Olimex JTAG that I had.  Here is how I wired
+  the 20-pin connector:
+
+    ----------------- ----------
+    20-PIN JTAG       ESP32 PIN
+    CONNECTOR         LABEL
+    ----------------- ----------
+     1 VREF  INPUT    3V3
+     3 nTRST OUTPUT   N/C
+     5 TDI   OUTPUT   IO12
+     7 TMS   OUTPUT   IO14
+     9 TCLK  OUTPUT   IO13
+    11 RTCK  INPUT    N/C
+    13 TDO   INPUT    IO15
+    15 RESET I/O      N/C
+    17 DBGRQ OUTPUT   N/C
+    19 5V    OUTPUT   N/C
+    ------------ ----------
+     2 VCC   INPUT    3V3
+     4 GND   N/A      GND
+     6 GND   N/A      GND
+     8 GND   N/A      GND
+    10 GND   N/A      GND
+    12 GND   N/A      GND
+    14 GND   N/A      GND
+    16 GND   N/A      GND
+    18 GND   N/A      GND
+    20 GND   N/A      GND
+    ------------ ----------
+
+ Executing and Debugging from FLASH and IRAM
+ ===========================================
+
+  Enable Debug Symbols
+  --------------------
+  To debug with GDB, you will need to enable symbols in the build.  You do this
+  with 'make menuconfig' then selecting:
+
+    - "Build Setup" -> "Debug Options" -> "Generate Debug Symbols"
+
+  And, to make debugging easier, also disable optimizations.  This will make
+  your code a lot bigger:
+
+    - "Build Setup" -> "Optimization Level" -> "Suppress Optimization"
+
+  FLASH
+  -----
+  OpenOCD currently doesn't have a FLASH driver for ESP32, so you can load
+  code into IRAM only via JTAG. FLASH-resident sections like .FLASH.rodata
+  will fail to load.  The bootloader in ROM doesn't parse ELF, so any imag
+  which is bootloaded from FLASH has to be converted into a custom image
+  format first.
+
+  The tool esp-idf uses for flashing is a command line Python tool called
+  "esptool.py" which talks to a serial bootloader in ROM.  A version is
+  supplied in the esp-idf codebase in components/esptool_py/esptool, the
+  "upstream" for that tool is here:
+
+    https://github.com/espressif/esptool/pull/121
+
+  The master branch for esptool.py is currently ESP8266-only (as of 2016-11-14),
+  this PR has the ESP32 support which still needs some final tidying up before
+  it's
+  merged.
+
+  To FLASH an ELF via the command line is a two step process, something like
+  this:
+
+    esptool.py --chip esp32 elf2image --flash_mode dio --flash_size 4MB -o ./nuttx.bin nuttx
+    esptool.py --chip esp32 --port COMx write_flash 0x1000 bootloader.bin 0x4000 partition_table.bin 0x10000 nuttx.bin
+
+  The first step converts an ELF image into an ESP32-compatible binary
+  image format, and the second step flashes it (along with bootloader image and
+  partition table binary.)
+
+  To put the ESP32 into serial flashing mode, it needs to be reset with IO0 held
+  low.  On the Core boards this can be accomplished by holding the button marked
+  "Boot" and pressing then releasing the button marked "EN".  Actually, esptool.py
+  can enter bootloader mode automatically (via RTS/DTR control lines), but
+  unfortunately a timing interaction between the Windows CP2012 driver and the
+  hardware means this doesn't currently work on Windows.
+
+  Secondary Boot Loader / Partition Table
+  ---------------------------------------
+  See https://github.com/espressif/esp-idf/tree/master/components/bootloader
+  and https://github.com/espressif/esp-idf/tree/master/components/partition_table.
+
+  Running from IRAM with OpenOCD
+  ------------------------------
+  Running from IRAM is a good debug option.  You should be able to load the
+  ELF directly via JTAG in this case, and you may not need the bootloader.
+
+  NuttX supports a configuration option, CONFIG_ESP32CORE_RUN_IRAM, that may be
+  selected for execution from IRAM.  This option simply selects the correct
+  linker script for IRAM execution.
+
+  Skipping the Secondary Bootloader
+  ---------------------------------
+  It is possible to skip the secondary bootloader and run out of IRAM using
+  only the primary bootloader if your application of small enough (< 128KiB code,
+  <180KiB data), then you can simplify initial bring-up by avoiding second stage
+  bootloader. Your application will be loaded into IRAM using first stage
+  bootloader present in ESP32 ROM. To achieve this, you need two things:
+
+    1. Have a linker script which places all code into IRAM and all data into
+       IRAM/DRAM
+
+    2. Use "esptool.py" utility found in ESP-IDF to convert application .elf
+       file into binary format which can be loaded by first stage bootloader.
+
+  Again you would need to link the ELF file and convert it to binary format suitable
+  for flashing into the board.  The command should to convert ELF file to binary
+  image looks as follows:
+
+    python esp-idf/components/esptool_py/esptool/esptool.py --chip esp32 elf2image --flash_mode "dio" --flash_freq "40m" --flash_size "2MB" -o nuttx.bin nuttx
+
+  To flash binary image to your development board, use the same esptool.py utility:
+
+    python esp-idf/components/esptool_py/esptool/esptool.py --chip esp32 --port /dev/ttyUSB0 --baud 921600 write_flash -z --flash_mode dio --flash_freq 40m --flash_size 2MB 0x1000 nuttx.bin
+
+  The argument before app.bin (0x1000) indicates the offset in flash where binary
+  will be written. ROM bootloader expects to find an application (or second stage
+  bootloader) image at offset 0x1000, so we are writing the binary there.
+
+  Clocking
+  --------
+  Right now, the NuttX port depends on the bootloader to initialize hardware,
+  including basic (slow) clocking.    If I had the clock configuration logic,
+  would I be able to run directly out of IRAM without a bootloader?  That
+  might be a simpler bring-up.
+
+  Sample OpenOCD Debug Steps
+  --------------------------
+  I did the initial bring-up using the IRAM configuration and OpenOCD.  Here
+  is a synopsis of my debug steps:
+
+  configs/esp32-core/nsh with
+
+    CONFIG_DEBUG_ASSERTIONS=y
+    CONFIG_DEBUG_FEATURES=y
+    CONFIG_DEBUG_SYMBOLS=y
+    CONFIG_ESP32CORE_RUN_IRAM=y
+
+  I also made this change which will eliminate all attempts to re-configure
+  serial. It will just use the serial settings as they were left by the
+  bootloader:
+
+    diff --git a/arch/xtensa/src/common/xtensa.h b/arch/xtensa/src/common/xtensa.h
+    index 422ec0b..8707d7c 100644
+    --- a/arch/xtensa/src/common/xtensa.h
+    +++ b/arch/xtensa/src/common/xtensa.h
+    @@ -60,7 +60,7 @@
+     #undef  CONFIG_SUPPRESS_INTERRUPTS     /* DEFINED: Do not enable interrupts */
+     #undef  CONFIG_SUPPRESS_TIMER_INTS     /* DEFINED: No timer */
+     #undef  CONFIG_SUPPRESS_SERIAL_INTS    /* DEFINED: Console will poll */
+    -#undef  CONFIG_SUPPRESS_UART_CONFIG    /* DEFINED: Do not reconfigure UART */
+    +#define CONFIG_SUPPRESS_UART_CONFIG  1 /* DEFINED: Do not reconfigure UART */
+     #define CONFIG_SUPPRESS_CLOCK_CONFIG 1 /* DEFINED: Do not reconfigure clocking */
+     #undef  CONFIG_DUMP_ON_EXIT            /* DEFINED: Dump task state on exit */
+
+  Start OpenOCD:
+
+    cd ../openocde-esp32
+    cp ../nuttx/configs/esp32-core/scripts/esp32.cfg .
+    sudo ./src/openocd -s ./tcl/ -f tcl/interface/ftdi/olimex-arm-usb-ocd.cfg -f ./esp32.cfg
+
+  Start GDB and load code:
+
+    cd ../nuttx
+    xtensa-esp32-elf-gdb -ex 'target remote localhost:3333' nuttx
+    (gdb) load nuttx
+    (gdb) mon reg pc [value report by load for entry point]
+    (gdb) s
+
+  Single stepping works fine for me as do breakpoints:
+
+    Breakpoint 1, xtensa_timer_initialize () at chip/esp32_timerisr.c:172
+    72 {
+    (gdb) n
+    esp32.cpu0: Target halted, pc=0x400835BF
+    187 g_tick_divisor = divisor;
+    (gdb) ...
+  
+Configurations
+==============
+
+  Common Configuration Information
+  --------------------------------
+  Each ESP32 core configuration is maintained in sub-directories and
+  can be selected as follow:
+
+    cd tools
+    ./configure.sh esp32-core/
+    cd -
+    make oldconfig
+    . ./setenv.sh
+
+  Before sourcing the setenv.sh file above, you should examine it and
+  perform edits as necessary so that TOOLCHAIN_BIN is the correct path to
+  the directory than holds your toolchain binaries.
+
+  If this is a Windows native build, then configure.bat should be used
+  instead of configure.sh:
+
+    configure.bat esp32-core\
+
+  And then build NuttX by simply typing the following.  At the conclusion of
+  the make, the nuttx binary will reside in an ELF file called, simply,
+  nuttx.
+
+    make oldconfig
+    make
+
+  The  that is provided above as an argument to the
+  tools/configure.sh must be is one of the directories listed below.
+
+NOTES:
+
+  1. These configurations use the mconf-based configuration tool.  To
+     change any of these configurations using that tool, you should:
+
+     a. Build and install the kconfig-mconf tool.  See nuttx/README.txt
+        see additional README.txt files in the NuttX tools repository.
+
+     b. Execute 'make menuconfig' in nuttx/ in order to start the
+        reconfiguration process.
+
+  2. Unless stated otherwise, all configurations generate console
+     output on UART0 (see the "Serial Console" section above).
+
+  3. By default, these configurations assume a 40MHz crystal on-
+     board:
+
+     CONFIG_ESP32CORE_XTAL_40MZ=y
+     # CONFIG_ESP32CORE_XTAL_26MHz is not set
+
+  4. Default configurations are set to run from FLASH.  You will need
+     to set CONFIG_ESP32CORE_RUN_IRAM=y for now (see the " Executing
+     and Debugging from FLASH and IRAM" section above).
+
+     To select this option, do 'make menuconfig'.  Then you can find
+     the selection under the "Board Selection" menu as "Run from IRAM".
+
+  Configuration sub-directories
+  -----------------------------
+
+  nsh:
+
+    Configures the NuttShell (nsh) located at apps/examples/nsh.
+
+    NOTES:
+
+    1. Uses the CP2102 USB/Serial converter for the serial console.
+
+    2. I have only tested this in IRAM with UART reconfiguration disabled.
+       See "Sample Debug Steps".  In that case, NuttX is started via GDB.
+       It has, however, been reported to me that this configuration also
+       runs when written to address 0x1000 of FLASH with the esptool.py
+       (as described above).  Then NuttX is started via the second level
+       bootloader.  I cannot vouch for that since I have never tried it.
+
+    3. There are open clocking issues.  Currently clock configuration
+       logic is disabled because I don't have the technical information
+       to provide that logic -- hopefully that is coming.  As a
+       consequence, whatever clock setup was left when NuttX started is
+       used.  For the case of execution out of IRAM with GDB, the
+       settings in configs/esp32-core/include/board.h work.  To check
+       the timing, I use a stop watch and:
+
+         nsh> sleep 60
+
+       If the timing is correct in the board.h header file, the value
+       timed with the stop watch should be about 60 seconds.  If not,
+       change the frequency in the board.h header file.
+
+  smp:
+
+    Another NSH configuration, similar to nsh, but also enables
+    SMP operation.  It differs from the nsh configuration only in these
+    addtional settings:
+
+    SMP is enabled:
+
+      CONFIG_SMP=y
+      CONFIG_SMP_IDLETHREAD_STACKSIZE=3072
+      CONFIG_SMP_NCPUS=2
+      CONFIG_SPINLOCK=y
+
+    The apps/examples/smp test is included:
+
+      CONFIG_EXAMPLES_SMP=y
+      CONFIG_EXAMPLES_SMP_NBARRIER_THREADS=8
+      CONFIG_EXAMPLES_SMP_PRIORITY=100
+      CONFIG_EXAMPLES_SMP_STACKSIZE=2048
+
+    NOTES:
+    1. See NOTES for the nsh configuration.
+
+  ostest:
+
+    This is the NuttX test at apps/examples/ostest that is run against all new
+    architecture ports to assure a correct implementation of the OS.  The default
+    version is for a single CPU but can be modified for an SMP test by adding:
+
+      CONFIG_SMP=y
+      CONFIG_SMP_IDLETHREAD_STACKSIZE=2048
+      CONFIG_SMP_NCPUS=2
+      CONFIG_SPINLOCK=y
+
+    NOTES:
+    1. See NOTES for the nsh configuration.
+    2. 2016-12-23: Test appears to be fully functional in the single CPU mode.
+    3. 2016-12-24: But when SMP is enabled, there is a consistent, repeatable
+       crash in the waitpid() test.  At the time of the crash, there is
+       extensive memory corruption and a user exception occurrs (cause=28).
+
+Things to Do
+============
+
+  1. There is no support for an interrupt stack yet.
+
+  2. There is no clock intialization logic in place.  This depends on logic in
+     Expressif libriaries.  The board comes up using that basic 40 Mhz crystal
+     for clocking.  Getting to 80 MHz will require clocking initialization in
+     esp32_clockconfig.c.
+
+  3. I did not implement the lazy co-processor save logic supported by Xtensa.
+     That logic works like this:
+
+     a. CPENABLE is set to zero on each context switch, disabling all co-
+        processors.
+     b. If/when the task attempts to use the disabled co-processor, an
+        exception  occurs
+     c. The co-processor exception handler re-enables the co-processor.
+
+     Instead, the NuttX logic saves and restores CPENABLE on each context
+     switch.  This has disadvantages in that (1) co-processor context will
+     be saved and restored even if the co-processor was never used, and (2)
+     tasks must explicitly enable and disable co-processors.
+
+  4. Currently the Xtensa port copies register state save information from
+     the stack into the TCB.  A more efficient alternative would be to just
+     save a pointer to a register state save area in the TCB.  This would
+     add some complexity to signal handling and also also the the
+     up_initialstate().  But the performance improvement might be worth
+     the effort.
+
+  5. See SMP-related issues above
+
+  6. See OpenOCD for the ESP32 above
+
+  7. Currently will not boot unless serial port initialization is disabled.
+     This will use the serial port settings as left by the preceding
+     bootloader:
+
+     diff --git a/arch/xtensa/src/common/xtensa.h b/arch/xtensa/src/common/xtensa.h
+     index 422ec0b..8707d7c 100644
+     --- a/arch/xtensa/src/common/xtensa.h
+     +++ b/arch/xtensa/src/common/xtensa.h
+     @@ -60,7 +60,7 @@
+      #undef  CONFIG_SUPPRESS_INTERRUPTS     /* DEFINED: Do not enable interrupts */
+      #undef  CONFIG_SUPPRESS_TIMER_INTS     /* DEFINED: No timer */
+      #undef  CONFIG_SUPPRESS_SERIAL_INTS    /* DEFINED: Console will poll */
+     -#undef  CONFIG_SUPPRESS_UART_CONFIG    /* DEFINED: Do not reconfigure UART */
+     +#define CONFIG_SUPPRESS_UART_CONFIG  1 /* DEFINED: Do not reconfigure UART */
+      #define CONFIG_SUPPRESS_CLOCK_CONFIG 1 /* DEFINED: Do not reconfigure clocking */
+      #undef  CONFIG_DUMP_ON_EXIT            /* DEFINED: Dump task state on exit */
+
+     I have not debugged this in detail, but this appears to be an issue with the
+     impelentation of esp32_configgpio() and/or gpio_matrix_out() when called from
+     the setup logic in arch/xtensa/src/esp32/esp32_serial.c.  I am not inclined
+     to invest a lot in driver debug until the clock configuration is finalized.
diff --git a/configs/esp32-core/include/board.h b/configs/esp32-core/include/board.h
new file mode 100644
index 0000000000000000000000000000000000000000..45e3d109af2d3f52c39e098f671926d4866a33c0
--- /dev/null
+++ b/configs/esp32-core/include/board.h
@@ -0,0 +1,71 @@
+/****************************************************************************
+ * configs/esp32-core/include/board.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __CONFIGS_ESP32_CORE_INCLUDE_BOARD_H
+#define __CONFIGS_ESP32_CORE_INCLUDE_BOARD_H
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Clocking ****************************************************************/
+/* The ESP32 Core board V2 is fitted with either a 26 a 40MHz crystal */
+
+#ifdef CONFIG_ESP32CORE_XTAL_26MHz
+#  define BOARD_XTAL_FREQUENCY  26000000
+#else
+#  define BOARD_XTAL_FREQUENCY  40000000
+#endif
+
+/* Clock reconfiguration is currently disabled, so the CPU will be running
+ * at the XTAL frequency or at two times the XTAL frequency, depending upon
+ * how we load the code:
+ *
+ * - If we load the code into FLASH at address 0x1000 where it is started by
+ *   the second level bootloader, then the frequency is the crystal
+ *   frequency.
+ * - If we load the code into IRAM after the second level bootloader has run
+ *   this frequency will be  twice the crystal frequency.
+ *
+ * Don't ask me for an explanation.
+ */
+
+#ifdef CONFIG_ESP32CORE_RUN_IRAM
+#  define BOARD_CLOCK_FREQUENCY (2 * BOARD_XTAL_FREQUENCY)
+#else
+#  define BOARD_CLOCK_FREQUENCY BOARD_XTAL_FREQUENCY
+#endif
+
+#endif /* __CONFIGS_ESP32_CORE_INCLUDE_BOARD_H */
diff --git a/configs/compal_e88/nsh_highram/Make.defs b/configs/esp32-core/nsh/Make.defs
similarity index 77%
rename from configs/compal_e88/nsh_highram/Make.defs
rename to configs/esp32-core/nsh/Make.defs
index 707d08fb0c31deccbd113649bdeb6ae4c350b7c3..8b4dd25b40228a2e633f4ff63a25427898aaed39 100644
--- a/configs/compal_e88/nsh_highram/Make.defs
+++ b/configs/esp32-core/nsh/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
-# configs/compal_e88/nsh_highram/Make.defs
+# configs/esp32-core/nsh/Make.defs
 #
-#   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -35,20 +35,35 @@
 
 include ${TOPDIR}/.config
 include ${TOPDIR}/tools/Config.mk
-include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs
+include ${TOPDIR}/arch/xtensa/src/lx6/Toolchain.defs
 
-LDSCRIPT = ld.script
+LDSCRIPT1 = $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/esp32_out.ld
+LDSCRIPT3 = $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/esp32_rom.ld
+LDSCRIPT4 = $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/esp32_peripherals.ld
+
+ifeq ($(CONFIG_ESP32CORE_RUN_IRAM),y)
+  LDSCRIPT2 = $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/esp32_iram.ld
+else
+  LDSCRIPT2 = $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/esp32_flash.ld
+endif
 
 ifeq ($(WINTOOL),y)
   # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
   ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
   ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
-  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(LDSCRIPT1)}"
+  ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT2)}"
+  ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT3)}"
+  ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT4)}"
 else
   # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
   ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
   ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
-  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+  ARCHSCRIPT = -T$(LDSCRIPT1) -T$(LDSCRIPT2) -T$(LDSCRIPT3) -T$(LDSCRIPT4)
 endif
 
 CC = $(CROSSDEV)gcc
@@ -60,9 +75,6 @@ NM = $(ARCROSSDEV)nm
 OBJCOPY = $(CROSSDEV)objcopy
 OBJDUMP = $(CROSSDEV)objdump
 
-ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
-ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
-
 ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
   ARCHOPTIMIZATION = -g
 endif
@@ -71,12 +83,12 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
   ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
 endif
 
-ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCFLAGS = -fno-builtin -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -mlongcalls -MMD -MP
+ARCHCXXFLAGS = $(ARCHCFLAGS) -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
-ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+ARCHPICFLAGS = -fpic
 
 CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
 CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
@@ -94,9 +106,7 @@ OBJEXT = .o
 LIBEXT = .a
 EXEEXT =
 
-ifneq ($(CROSSDEV),arm-nuttx-elf-)
-  LDFLAGS += -nostartfiles -nodefaultlibs
-endif
+LDFLAGS += -nostartfiles -nodefaultlibs
 ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
   LDFLAGS += -g
 endif
@@ -106,19 +116,4 @@ HOSTCC = gcc
 HOSTINCLUDES = -I.
 HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
 HOSTLDFLAGS =
-ifeq ($(CONFIG_HOST_WINDOWS),y)
-  HOSTEXEEXT = .exe
-else
-  HOSTEXEEXT =
-endif
-
-ifeq ($(WINTOOL),y)
-  # Windows-native host tools
-  DIRLINK = $(TOPDIR)/tools/copydir.sh
-  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
-  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
-else
-  # Linux/Cygwin-native host tools
-  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
-endif
 
diff --git a/configs/compal_e88/nsh_highram/defconfig b/configs/esp32-core/nsh/defconfig
similarity index 68%
rename from configs/compal_e88/nsh_highram/defconfig
rename to configs/esp32-core/nsh/defconfig
index 85ad3ce661b1191f900b75f120b204eb6a6bc4cc..59364e9201c7ad8f83124f6cbd27037fb428c8da 100644
--- a/configs/compal_e88/nsh_highram/defconfig
+++ b/configs/esp32-core/nsh/defconfig
@@ -24,7 +24,7 @@ CONFIG_BUILD_FLAT=y
 # Binary Output Formats
 #
 # CONFIG_RRLOAD_BINARY is not set
-# CONFIG_INTELHEX_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
 # CONFIG_MOTOROLA_SREC is not set
 CONFIG_RAW_BINARY=y
 # CONFIG_UBOOT_UIMAGE is not set
@@ -37,14 +37,15 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+# CONFIG_ARCH_HAVE_STACKCHECK is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
-CONFIG_ARCH_HAVE_STACKCHECK=y
-# CONFIG_STACK_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -54,98 +55,50 @@ CONFIG_DEBUG_FULLOPT=y
 #
 # System Type
 #
-CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_ARM is not set
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+CONFIG_ARCH_XTENSA=y
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
-CONFIG_ARCH="arm"
-
-#
-# ARM Options
-#
-# CONFIG_ARCH_CHIP_A1X is not set
-# CONFIG_ARCH_CHIP_C5471 is not set
-CONFIG_ARCH_CHIP_CALYPSO=y
-# CONFIG_ARCH_CHIP_DM320 is not set
-# CONFIG_ARCH_CHIP_EFM32 is not set
-# CONFIG_ARCH_CHIP_IMX1 is not set
-# CONFIG_ARCH_CHIP_KINETIS is not set
-# CONFIG_ARCH_CHIP_KL is not set
-# CONFIG_ARCH_CHIP_LM is not set
-# CONFIG_ARCH_CHIP_TIVA is not set
-# CONFIG_ARCH_CHIP_LPC11XX is not set
-# CONFIG_ARCH_CHIP_LPC17XX is not set
-# CONFIG_ARCH_CHIP_LPC214X is not set
-# CONFIG_ARCH_CHIP_LPC2378 is not set
-# CONFIG_ARCH_CHIP_LPC31XX is not set
-# CONFIG_ARCH_CHIP_LPC43XX is not set
-# CONFIG_ARCH_CHIP_NUC1XX is not set
-# CONFIG_ARCH_CHIP_SAMA5 is not set
-# CONFIG_ARCH_CHIP_SAMD is not set
-# CONFIG_ARCH_CHIP_SAML is not set
-# CONFIG_ARCH_CHIP_SAM34 is not set
-# CONFIG_ARCH_CHIP_SAMV7 is not set
-# CONFIG_ARCH_CHIP_STM32 is not set
-# CONFIG_ARCH_CHIP_STR71X is not set
-CONFIG_ARCH_ARM7TDMI=y
-# CONFIG_ARCH_ARM926EJS is not set
-# CONFIG_ARCH_ARM920T is not set
-# CONFIG_ARCH_CORTEXM0 is not set
-# CONFIG_ARCH_CORTEXM3 is not set
-# CONFIG_ARCH_CORTEXM4 is not set
-# CONFIG_ARCH_CORTEXM7 is not set
-# CONFIG_ARCH_CORTEXA5 is not set
-# CONFIG_ARCH_CORTEXA8 is not set
-CONFIG_ARCH_FAMILY="arm"
-CONFIG_ARCH_CHIP="calypso"
-# CONFIG_ARCH_HAVE_FPU is not set
-# CONFIG_ARCH_HAVE_DPFPU is not set
-CONFIG_ARCH_HAVE_LOWVECTORS=y
-# CONFIG_ARCH_LOWVECTORS is not set
-
-#
-# ARM Configuration Options
-#
-# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set
-# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set
-CONFIG_ARM_TOOLCHAIN_GNU_EABIL=y
-# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set
-CONFIG_UART_IRDA_BAUD=115200
-CONFIG_UART_IRDA_PARITY=0
-CONFIG_UART_IRDA_BITS=8
-CONFIG_UART_IRDA_2STOP=0
-CONFIG_UART_IRDA_RXBUFSIZE=256
-CONFIG_UART_IRDA_TXBUFSIZE=256
-CONFIG_UART_MODEM_BAUD=115200
-CONFIG_UART_MODEM_PARITY=0
-CONFIG_UART_MODEM_BITS=8
-CONFIG_UART_MODEM_2STOP=0
-CONFIG_UART_MODEM_RXBUFSIZE=256
-CONFIG_UART_MODEM_TXBUFSIZE=256
-
-#
-# Calypso Configuration Options
-#
-
-#
-# Modem UART Configuration
-#
-# CONFIG_UART_MODEM_HWFLOWCONTROL is not set
-
-#
-# IrDA UART Configuration
-#
-# CONFIG_UART_IRDA_HWFLOWCONTROL is not set
-# CONFIG_USE_SERCOMM_CONSOLE is not set
-# CONFIG_SERIAL_MODEM_CONSOLE is not set
-# CONFIG_SERIAL_IRDA_CONSOLE is not set
-CONFIG_SERIAL_CONSOLE_NONE=y
+CONFIG_ARCH="xtensa"
+CONFIG_ARCH_CHIP="esp32"
+# CONFIG_SERIAL_TERMIOS is not set
+CONFIG_ARCH_CHIP_ESP32=y
+CONFIG_ARCH_FAMILY_LX6=y
+# CONFIG_XTENSA_USE_OVLY is not set
+CONFIG_XTENSA_CP_INITSET=0x0001
+
+#
+# ESP32 Peripheral Selection
+#
+CONFIG_ESP32_UART=y
+# CONFIG_ESP32_SPI2 is not set
+# CONFIG_XTENSA_TIMER1 is not set
+# CONFIG_XTENSA_TIMER2 is not set
+CONFIG_ESP32_UART0=y
+# CONFIG_ESP32_UART1 is not set
+# CONFIG_ESP32_UART2 is not set
+
+#
+# Memory Configuration
+#
+CONFIG_ESP32_BT_RESERVE_DRAM=0
+CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0
+CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=0
+# CONFIG_ESP32_GPIO_IRQ is not set
+
+#
+# UART configuration
+#
+CONFIG_ESP32_UART0_TXPIN=0
+CONFIG_ESP32_UART0_RXPIN=0
 
 #
 # Architecture Options
@@ -158,12 +111,14 @@ CONFIG_SERIAL_CONSOLE_NONE=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
-CONFIG_ARCH_HAVE_VFORK=y
+CONFIG_ARCH_HAVE_MULTICPU=y
+# CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
-CONFIG_ARCH_HAVE_POWEROFF=y
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
 # CONFIG_ARCH_IDLE_CUSTOM is not set
@@ -173,55 +128,52 @@ CONFIG_ARCH_STACKDUMP=y
 #
 # Board Settings
 #
-CONFIG_BOARD_LOOPSPERMSEC=1250
+CONFIG_BOARD_LOOPSPERMSEC=16717
 # CONFIG_ARCH_CALIBRATION is not set
 
 #
 # Interrupt options
 #
-CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
-CONFIG_ARCH_INTERRUPTSTACK=1024
+# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set
 # CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set
 
 #
 # Boot options
 #
 # CONFIG_BOOT_RUNFROMEXTSRAM is not set
-# CONFIG_BOOT_RUNFROMFLASH is not set
-CONFIG_BOOT_RUNFROMISRAM=y
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
 # CONFIG_BOOT_RUNFROMSDRAM is not set
 # CONFIG_BOOT_COPYTORAM is not set
 
 #
 # Boot Memory Configuration
 #
-CONFIG_RAM_START=0
-CONFIG_RAM_SIZE=8650752
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=114688
 # CONFIG_ARCH_HAVE_SDRAM is not set
 
 #
 # Board Selection
 #
-# CONFIG_ARCH_BOARD_COMPALE86 is not set
-CONFIG_ARCH_BOARD_COMPALE88=y
-# CONFIG_ARCH_BOARD_COMPALE99 is not set
-# CONFIG_ARCH_BOARD_PIRELLI_DPL10 is not set
+CONFIG_ARCH_BOARD_ESP32CORE=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
-CONFIG_ARCH_BOARD="compal_e88"
+CONFIG_ARCH_BOARD="esp32-core"
 
 #
 # Common Board Options
 #
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+CONFIG_ESP32CORE_XTAL_40MZ=y
+# CONFIG_ESP32CORE_XTAL_26MHz is not set
+# CONFIG_ESP32CORE_RUN_IRAM is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
-CONFIG_BOARDCTL_POWEROFF=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -232,7 +184,7 @@ CONFIG_DISABLE_OS_API=y
 # CONFIG_DISABLE_POSIX_TIMERS is not set
 # CONFIG_DISABLE_PTHREAD is not set
 # CONFIG_DISABLE_SIGNALS is not set
-CONFIG_DISABLE_MQUEUE=y
+# CONFIG_DISABLE_MQUEUE is not set
 # CONFIG_DISABLE_ENVIRON is not set
 
 #
@@ -241,33 +193,39 @@ CONFIG_DISABLE_MQUEUE=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
-CONFIG_START_YEAR=2007
-CONFIG_START_MONTH=2
-CONFIG_START_DAY=13
-CONFIG_MAX_WDOGPARMS=4
-CONFIG_PREALLOC_WDOGS=8
-CONFIG_WDOG_INTRESERVE=1
-CONFIG_PREALLOC_TIMERS=8
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=12
+CONFIG_START_DAY=6
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=16
+CONFIG_WDOG_INTRESERVE=4
+CONFIG_PREALLOC_TIMERS=4
 
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
+# CONFIG_SMP is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
-CONFIG_TASK_NAME_SIZE=0
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=31
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
-# CONFIG_SCHED_WAITPID is not set
+CONFIG_SCHED_WAITPID=y
 
 #
 # Pthread Options
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -304,7 +262,14 @@ CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
 
 #
-# Work Queue Support
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -313,10 +278,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 # Stack and heap information
 #
-CONFIG_IDLETHREAD_STACKSIZE=4096
-CONFIG_USERMAIN_STACKSIZE=4096
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
 CONFIG_PTHREAD_STACK_MIN=256
-CONFIG_PTHREAD_STACK_DEFAULT=4096
+CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_LIB_SYSCALL is not set
 
 #
@@ -325,6 +290,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=4096
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -335,13 +301,21 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
+# CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
@@ -349,6 +323,7 @@ CONFIG_SPI_EXCHANGE=y
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -356,20 +331,40 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
-# CONFIG_UART0_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_UART1_SERIALDRIVER is not set
 # CONFIG_UART2_SERIALDRIVER is not set
 # CONFIG_UART3_SERIALDRIVER is not set
@@ -389,31 +384,49 @@ CONFIG_SERIAL=y
 # CONFIG_USART6_SERIALDRIVER is not set
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
-CONFIG_OTHER_UART_SERIALDRIVER=y
-
-#
-# USART Configuration
-#
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
 CONFIG_MCU_SERIAL=y
-# CONFIG_STANDARD_SERIAL is not set
+CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
-# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
-CONFIG_OTHER_SERIAL_CONSOLE=y
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_UART0_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
-# CONFIG_USBDEV is not set
-# CONFIG_USBHOST is not set
-# CONFIG_DRIVERS_WIRELESS is not set
 
 #
-# System Logging Device Options
+# UART0 Configuration
 #
+CONFIG_UART0_RXBUFSIZE=256
+CONFIG_UART0_TXBUFSIZE=256
+CONFIG_UART0_BAUD=115200
+CONFIG_UART0_BITS=8
+CONFIG_UART0_PARITY=0
+CONFIG_UART0_2STOP=0
+# CONFIG_UART0_IFLOWCONTROL is not set
+# CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -437,23 +450,27 @@ CONFIG_OTHER_SERIAL_CONSOLE=y
 # CONFIG_DISABLE_MOUNTPOINT is not set
 # CONFIG_FS_AUTOMOUNTER is not set
 # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
-# CONFIG_FS_READABLE is not set
+CONFIG_FS_READABLE=y
 # CONFIG_FS_WRITABLE is not set
 # CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
-# CONFIG_FS_PROCFS is not set
-# CONFIG_FS_UNIONFS is not set
+CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
 
 #
-# System Logging
+# Exclude individual procfs entries
 #
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -464,10 +481,8 @@ CONFIG_OTHER_SERIAL_CONSOLE=y
 # Memory Management
 #
 # CONFIG_MM_SMALL is not set
-CONFIG_MM_REGIONS=1
-CONFIG_ARCH_HAVE_HEAP2=y
-CONFIG_HEAP2_BASE=0x00000000
-CONFIG_HEAP2_SIZE=0
+CONFIG_MM_REGIONS=2
+# CONFIG_ARCH_HAVE_HEAP2 is not set
 # CONFIG_GRAN is not set
 
 #
@@ -475,6 +490,10 @@ CONFIG_HEAP2_SIZE=0
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -502,6 +521,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -517,19 +538,32 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
 #
 # CONFIG_C99_BOOL8 is not set
-# CONFIG_HAVE_CXX is not set
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
 
 #
 # Application Configuration
@@ -540,57 +574,75 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
-CONFIG_EXAMPLES_HELLO=y
+# CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
 # CONFIG_EXAMPLES_NRF24L01TERM is not set
 CONFIG_EXAMPLES_NSH=y
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -601,31 +653,31 @@ CONFIG_EXAMPLES_NSH=y
 #
 # Interpreters
 #
+# CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -645,6 +697,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
@@ -653,6 +706,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -661,17 +715,19 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_IFUPDOWN is not set
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -680,19 +736,24 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
-CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
-CONFIG_NSH_CMDOPT_HEXDUMP=y
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
 CONFIG_NSH_FILEIOSIZE=512
 
 #
@@ -707,7 +768,9 @@ CONFIG_NSH_FILEIOSIZE=512
 #
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
-# CONFIG_NSH_ARCHINIT is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -721,15 +784,21 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/esp32-core/nsh/setenv.sh b/configs/esp32-core/nsh/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..3c57c18b5548be47b9d2d0dbfdc33377357621ac
--- /dev/null
+++ b/configs/esp32-core/nsh/setenv.sh
@@ -0,0 +1,57 @@
+#!/bin/bash
+# configs/esp32-core/nsh/setenv.sh
+#
+#   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the path to the location where I installed the Expressif crosstools-NG
+# toolchaing
+export TOOLCHAIN_BIN="/home/patacongo/projects/nuttx/crosstool-NG/builds/xtensa-esp32-elf/bin"
+
+# Add the path to the toolchain to the PATH variable
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/esp32-core/ostest/Make.defs b/configs/esp32-core/ostest/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..6361bd33c43e847ce65aeb0929cfa6fdb2a9b34f
--- /dev/null
+++ b/configs/esp32-core/ostest/Make.defs
@@ -0,0 +1,119 @@
+############################################################################
+# configs/esp32-core/ostest/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/xtensa/src/lx6/Toolchain.defs
+
+LDSCRIPT1 = $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/esp32_out.ld
+LDSCRIPT3 = $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/esp32_rom.ld
+LDSCRIPT4 = $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/esp32_peripherals.ld
+
+ifeq ($(CONFIG_ESP32CORE_RUN_IRAM),y)
+  LDSCRIPT2 = $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/esp32_iram.ld
+else
+  LDSCRIPT2 = $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/esp32_flash.ld
+endif
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(LDSCRIPT1)}"
+  ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT2)}"
+  ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT3)}"
+  ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT4)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(LDSCRIPT1) -T$(LDSCRIPT2) -T$(LDSCRIPT3) -T$(LDSCRIPT4)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -mlongcalls -MMD -MP
+ARCHCXXFLAGS = $(ARCHCFLAGS) -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+LDFLAGS += -nostartfiles -nodefaultlibs
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/esp32-core/ostest/defconfig b/configs/esp32-core/ostest/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..c09559668edb627604b9a63af266f16d840000c1
--- /dev/null
+++ b/configs/esp32-core/ostest/defconfig
@@ -0,0 +1,713 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+# CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_ARM is not set
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+CONFIG_ARCH_XTENSA=y
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="xtensa"
+CONFIG_ARCH_CHIP="esp32"
+# CONFIG_SERIAL_TERMIOS is not set
+CONFIG_ARCH_CHIP_ESP32=y
+CONFIG_ARCH_FAMILY_LX6=y
+# CONFIG_XTENSA_USE_OVLY is not set
+CONFIG_XTENSA_CP_INITSET=0x0001
+
+#
+# ESP32 Peripheral Selection
+#
+CONFIG_ESP32_UART=y
+# CONFIG_ESP32_SPI2 is not set
+# CONFIG_XTENSA_TIMER1 is not set
+# CONFIG_XTENSA_TIMER2 is not set
+CONFIG_ESP32_UART0=y
+# CONFIG_ESP32_UART1 is not set
+# CONFIG_ESP32_UART2 is not set
+
+#
+# Memory Configuration
+#
+CONFIG_ESP32_BT_RESERVE_DRAM=0
+CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0
+CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=0
+# CONFIG_ESP32_GPIO_IRQ is not set
+
+#
+# UART configuration
+#
+CONFIG_ESP32_UART0_TXPIN=0
+CONFIG_ESP32_UART0_RXPIN=0
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+# CONFIG_ARCH_HAVE_IRQPRIO is not set
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+CONFIG_ARCH_HAVE_MULTICPU=y
+# CONFIG_ARCH_HAVE_VFORK is not set
+# CONFIG_ARCH_HAVE_MMU is not set
+# CONFIG_ARCH_HAVE_MPU is not set
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+# CONFIG_ARCH_HAVE_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=16717
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set
+# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=114688
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_ESP32CORE=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="esp32-core"
+
+#
+# Common Board Options
+#
+
+#
+# Board-Specific Options
+#
+CONFIG_ESP32CORE_XTAL_40MZ=y
+# CONFIG_ESP32CORE_XTAL_26MHz is not set
+# CONFIG_ESP32CORE_RUN_IRAM is not set
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=12
+CONFIG_START_DAY=6
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=16
+CONFIG_WDOG_INTRESERVE=4
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_SPINLOCK is not set
+# CONFIG_SMP is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="ostest_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=31
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=3072
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+CONFIG_DISABLE_POLL=y
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+# CONFIG_ARCH_HAVE_I2CRESET is not set
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_UART0_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# UART0 Configuration
+#
+CONFIG_UART0_RXBUFSIZE=256
+CONFIG_UART0_TXBUFSIZE=256
+CONFIG_UART0_BAUD=115200
+CONFIG_UART0_BITS=8
+CONFIG_UART0_PARITY=0
+CONFIG_UART0_2STOP=0
+# CONFIG_UART0_IFLOWCONTROL is not set
+# CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+CONFIG_FS_READABLE=y
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=2
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_ARCH_HAVE_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+# CONFIG_EXAMPLES_NSH is not set
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+CONFIG_EXAMPLES_OSTEST=y
+CONFIG_EXAMPLES_OSTEST_LOOPS=10
+CONFIG_EXAMPLES_OSTEST_STACKSIZE=6114
+CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=8
+CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000
+CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
+CONFIG_EXAMPLES_OSTEST_WAITRESULT=y
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+# CONFIG_NSH_LIBRARY is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/esp32-core/ostest/setenv.sh b/configs/esp32-core/ostest/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..5c52d03081862ff7b086c633ab59a3238482afeb
--- /dev/null
+++ b/configs/esp32-core/ostest/setenv.sh
@@ -0,0 +1,57 @@
+#!/bin/bash
+# configs/esp32-core/ostest/setenv.sh
+#
+#   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the path to the location where I installed the Expressif crosstools-NG
+# toolchaing
+export TOOLCHAIN_BIN="/home/patacongo/projects/nuttx/crosstool-NG/builds/xtensa-esp32-elf/bin"
+
+# Add the path to the toolchain to the PATH variable
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/esp32-core/scripts/.gitignore b/configs/esp32-core/scripts/.gitignore
new file mode 100644
index 0000000000000000000000000000000000000000..155d3f50341603b16cab361563cddaca9365bc32
--- /dev/null
+++ b/configs/esp32-core/scripts/.gitignore
@@ -0,0 +1,2 @@
+/esp32_out.ld
+
diff --git a/configs/esp32-core/scripts/esp32.cfg b/configs/esp32-core/scripts/esp32.cfg
new file mode 100644
index 0000000000000000000000000000000000000000..a9f94d37dc8cd0ea80c183f5d9e7a47d30077bc4
--- /dev/null
+++ b/configs/esp32-core/scripts/esp32.cfg
@@ -0,0 +1,49 @@
+#
+# Example configuration file to hook up an ESP32 module or board to a JTAG
+# adapter. Please modify this file to your local setup.
+#
+#
+
+
+# Include the configuration for the JTAG adapter. We use the Tian TUMPA here.
+# If you have a different interface, please edit this to include the
+# configuration file of yours.
+# source [find interface/ftdi/olimex-arm-usb-ocd.cfg]
+
+# The ESP32 only supports JTAG.
+transport select jtag
+
+# The speed of the JTAG interface, in KHz. If you get DSR/DIR errors (and they
+# do not relate to OpenOCD trying to read from a memory range without physical
+# memory being present there), you can try lowering this.
+adapter_khz 200
+
+# With no variables set, openocd will configure JTAG for the two cores of the ESP32 and
+# will do automatic RTOS detection. This can be be adjusted by uncommenting any of the
+# following lines:
+
+# Only configure the PRO CPU
+#set ESP32_ONLYCPU 1
+# Only configure the APP CPU
+#set ESP32_ONLYCPU 2
+# Disable RTOS support
+set ESP32_RTOS none
+# Force RTOS to be FreeRTOS
+#set ESP32_RTOS FreeRTOS
+
+#Source the ESP32 configuration file
+source [find target/esp32.cfg]
+
+
+# The TDI pin of ESP32 is also a bootstrap pin that selects the voltage the SPI flash
+# chip runs at. When a hard reset happens (e.g. because someone switches the board off
+# and on) the ESP32 will use the current TDI value as the bootstrap value because the
+# JTAG adapter overrides the pull-up or pull-down resistor that is supposed to do the
+# bootstrapping. These lines basically set the idle value of the TDO line to a
+# specified value, therefore reducing the chance of a bad bootup due to a bad flash
+# voltage greatly.
+
+# Enable this for 1.8V SPI flash
+# esp108 flashbootstrap 1.8
+# Enable this for 3.3V SPI flash
+esp108 flashbootstrap 3.3
diff --git a/configs/esp32-core/scripts/esp32.template b/configs/esp32-core/scripts/esp32.template
new file mode 100644
index 0000000000000000000000000000000000000000..871171ddde94d1c6fb44a81bddd41b116f4a8c3b
--- /dev/null
+++ b/configs/esp32-core/scripts/esp32.template
@@ -0,0 +1,62 @@
+/****************************************************************************
+ * configs/elf32-core/scripts/esp32.template
+ * ESP32 Linker Script Memory Layout
+ *
+ * This file describes the memory layout (memory blocks) as virtual
+ * memory addresses.
+ *
+ * esp32.common.ld contains output sections to link compiler output
+ * into these memory blocks.
+ *
+ * NOTE: That this is not the actual linker script but rather a "template"
+ * for the elf32_out.ld script.  This template script is passed through
+ * the C preprocessor to include selected configuration options.
+ *
+ ****************************************************************************/
+
+#include 
+
+MEMORY
+{
+  /* All these values assume the flash cache is on, and have the blocks this
+   * uses subtracted from the length of the various regions. The 'data access
+   * port' dram/drom regions map to the same iram/irom regions but are
+   * connected to the data port of the CPU and eg allow bytewise access.
+   */
+
+  /* IRAM for PRO cpu. Not sure if happy with this, this is MMU area... */
+
+  iram0_0_seg (RX) :     org = 0x40080000, len = 0x20000
+
+  /* Even though the segment name is iram, it is actually mapped to flash */
+
+  iram0_2_seg (RX) :     org = 0x400D0018, len = 0x330000
+
+  /* Shared data RAM, excluding memory reserved for ROM bss/data/stack.
+   * Enabling Bluetooth & Trace Memory features in menuconfig will decrease
+   * the amount of RAM available.
+   */
+
+  dram0_0_seg (RW) :     org = 0x3ffb0000 + CONFIG_ESP32_BT_RESERVE_DRAM,
+                         len = 0x50000 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM - CONFIG_ESP32_BT_RESERVE_DRAM
+
+  /* Flash mapped constant data */
+
+  drom0_0_seg (R) :      org = 0x3f400010, len = 0x800000
+
+  /* RTC fast memory (executable). Persists over deep sleep. */
+
+  rtc_iram_seg(RWX) :    org = 0x400c0000, len = 0x2000
+
+  /* RTC slow memory (data accessible). Persists over deep sleep.
+   * Start of RTC slow memory is reserved for ULP co-processor code + data,
+   * if enabled.
+   */
+
+  rtc_slow_seg(RW)  :    org = 0x50000000 + CONFIG_ESP32_ULP_COPROC_RESERVE_MEM,
+                         len = 0x1000 - CONFIG_ESP32_ULP_COPROC_RESERVE_MEM
+}
+
+/* Heap ends at top of dram0_0_seg */
+
+_eheap = 0x40000000 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM;
diff --git a/configs/esp32-core/scripts/esp32_flash.ld b/configs/esp32-core/scripts/esp32_flash.ld
new file mode 100644
index 0000000000000000000000000000000000000000..e11f2f954a7bdc4e7df48505a6aa93d2e2e99e11
--- /dev/null
+++ b/configs/esp32-core/scripts/esp32_flash.ld
@@ -0,0 +1,192 @@
+/****************************************************************************
+ * configs/elf32-core/scripts/esp32_flash.ld
+ ****************************************************************************/
+
+/* Default entry point: */
+
+ENTRY(__start);
+
+SECTIONS
+{
+  /* Send .iram0 code to iram */
+
+  .iram0.vectors :
+  {
+    /* Vectors go to IRAM */
+
+    _init_start = ABSOLUTE(.);
+
+    /* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
+
+    . = 0x0;
+    KEEP (*(.window_vectors.text));
+    . = 0x180;
+    KEEP (*(.xtensa_level2_vector.text));
+    . = 0x1c0;
+    KEEP (*(.xtensa_level3_vector.text));
+    . = 0x200;
+    KEEP (*(.xtensa_level4_vector.text));
+    . = 0x240;
+    KEEP (*(.xtensa_level5_vector.text));
+    . = 0x280;
+    KEEP (*(.debug_exception_vector.text));
+    . = 0x2c0;
+    KEEP (*(.nmi_vector.text));
+    . = 0x300;
+    KEEP (*(.kernel_exception_vector.text));
+    . = 0x340;
+    KEEP (*(.user_exception_vector.text));
+    . = 0x3c0;
+    KEEP (*(.double_exception_vector.text));
+    . = 0x400;
+    *(.*_vector.literal)
+
+    . = ALIGN (16);
+    *(.entry.text)
+    *(.init.literal)
+    *(.init)
+    _init_end = ABSOLUTE(.);
+  } > iram0_0_seg
+
+  .iram0.text :
+  {
+    /* Code marked as runnning out of IRAM */
+
+    _iram_text_start = ABSOLUTE(.);
+    *(.iram1 .iram1.*)
+    *libphy.a:(.literal .text .literal.* .text.*)
+    *librtc.a:(.literal .text .literal.* .text.*)
+    *libpp.a:(.literal .text .literal.* .text.*)
+    *libhal.a:(.literal .text .literal.* .text.*)
+    _iram_text_end = ABSOLUTE(.);
+  } > iram0_0_seg
+
+  /* Shared RAM */
+
+  .dram0.bss (NOLOAD) :
+  {
+    /* .bss initialized on power-up */
+
+    . = ALIGN (8);
+    _sbss = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    KEEP (*(.bss))
+    *(.bss.*)
+    *(.share.mem)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    . = ALIGN (8);
+    _ebss = ABSOLUTE(.);
+
+    /* Uninitialized .bss */
+
+    *(.noinit)
+  } >dram0_0_seg
+
+  .dram0.data :
+  {
+    /* .data initialized on power-up in ROMed configurations. */
+
+    _sdata = ABSOLUTE(.);
+    KEEP (*(.data))
+    KEEP (*(.data.*))
+    KEEP (*(.gnu.linkonce.d.*))
+    KEEP (*(.data1))
+    KEEP (*(.sdata))
+    KEEP (*(.sdata.*))
+    KEEP (*(.gnu.linkonce.s.*))
+    KEEP (*(.sdata2))
+    KEEP (*(.sdata2.*))
+    KEEP (*(.gnu.linkonce.s2.*))
+    KEEP (*(.jcr))
+    *(.dram1 .dram1.*)
+    _edata = ABSOLUTE(.);
+    . = ALIGN(4);
+
+    /* Heap starts at the end of .data */
+
+    _sheap = ABSOLUTE(.);
+  } >dram0_0_seg
+
+  .flash.rodata :
+  {
+    _srodata = ABSOLUTE(.);
+    *(.rodata)
+    *(.rodata.*)
+    *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
+    *(.xt_except_table)
+    *(.gcc_except_table)
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    *(.eh_frame)
+
+    . = (. + 3) & ~ 3;
+
+    /* C++ constructor and destructor tables, properly ordered: */
+
+    _sinit = ABSOLUTE(.);
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    _einit = ABSOLUTE(.);
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+
+    /* C++ exception handlers table: */
+
+    __XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    _erodata = ABSOLUTE(.);
+    /* Literals are also RO data. */
+    _lit4_start = ABSOLUTE(.);
+    *(*.lit4)
+    *(.lit4.*)
+    *(.gnu.linkonce.lit4.*)
+    _lit4_end = ABSOLUTE(.);
+    . = ALIGN(4);
+  } >drom0_0_seg
+
+  .flash.text :
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
+    *(.fini.literal)
+    *(.fini)
+    *(.gnu.version)
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >iram0_2_seg
+
+  .rtc.text :
+  {
+    . = ALIGN(4);
+    *(.rtc.literal .rtc.text)
+  } >rtc_iram_seg
+
+  .rtc.data :
+  {
+    *(.rtc.data)
+    *(.rtc.rodata)
+  } > rtc_slow_seg
+}
diff --git a/configs/esp32-core/scripts/esp32_iram.ld b/configs/esp32-core/scripts/esp32_iram.ld
new file mode 100644
index 0000000000000000000000000000000000000000..2df0a5355aa03ef570f4ac54f37f2ede0f7be2d4
--- /dev/null
+++ b/configs/esp32-core/scripts/esp32_iram.ld
@@ -0,0 +1,187 @@
+/****************************************************************************
+ * configs/elf32-core/scripts/esp32_iram.ld
+ ****************************************************************************/
+
+/* Default entry point: */
+
+ENTRY(__start);
+
+SECTIONS
+{
+  /* Send .iram0 code to iram */
+
+  .iram0.vectors :
+  {
+    /* Vectors go to IRAM */
+
+    _init_start = ABSOLUTE(.);
+
+    /* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
+
+    . = 0x0;
+    KEEP (*(.window_vectors.text));
+    . = 0x180;
+    KEEP (*(.xtensa_level2_vector.text));
+    . = 0x1c0;
+    KEEP (*(.xtensa_level3_vector.text));
+    . = 0x200;
+    KEEP (*(.xtensa_level4_vector.text));
+    . = 0x240;
+    KEEP (*(.xtensa_level5_vector.text));
+    . = 0x280;
+    KEEP (*(.debug_exception_vector.text));
+    . = 0x2c0;
+    KEEP (*(.nmi_vector.text));
+    . = 0x300;
+    KEEP (*(.kernel_exception_vector.text));
+    . = 0x340;
+    KEEP (*(.user_exception_vector.text));
+    . = 0x3c0;
+    KEEP (*(.double_exception_vector.text));
+    . = 0x400;
+    *(.*_vector.literal)
+
+    . = ALIGN (16);
+    *(.entry.text)
+    *(.init.literal)
+    *(.init)
+    _init_end = ABSOLUTE(.);
+  } > iram0_0_seg
+
+  .iram0.text :
+  {
+    /* Code marked as runnning out of IRAM */
+
+    _iram_text_start = ABSOLUTE(.);
+    *(.iram1 .iram1.*)
+    *libphy.a:(.literal .text .literal.* .text.*)
+    *librtc.a:(.literal .text .literal.* .text.*)
+    *libpp.a:(.literal .text .literal.* .text.*)
+    *libhal.a:(.literal .text .literal.* .text.*)
+    _iram_text_end = ABSOLUTE(.);
+
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
+    *(.fini.literal)
+    *(.fini)
+    *(.gnu.version)
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+
+  } > iram0_0_seg
+
+  /* Shared RAM */
+
+  .dram0.bss (NOLOAD) :
+  {
+    /* .bss initialized on power-up */
+
+    . = ALIGN (8);
+    _sbss = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    KEEP (*(.bss))
+    *(.bss.*)
+    *(.share.mem)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    . = ALIGN (8);
+    _ebss = ABSOLUTE(.);
+
+    /* Uninitialized .bss */
+
+    *(.noinit)
+  } >dram0_0_seg
+
+  .dram0.data :
+  {
+    /* .data initialized on power-up in ROMed configurations. */
+
+    _sdata = ABSOLUTE(.);
+    KEEP (*(.data))
+    KEEP (*(.data.*))
+    KEEP (*(.gnu.linkonce.d.*))
+    KEEP (*(.data1))
+    KEEP (*(.sdata))
+    KEEP (*(.sdata.*))
+    KEEP (*(.gnu.linkonce.s.*))
+    KEEP (*(.sdata2))
+    KEEP (*(.sdata2.*))
+    KEEP (*(.gnu.linkonce.s2.*))
+    KEEP (*(.jcr))
+    *(.dram1 .dram1.*)
+    _edata = ABSOLUTE(.);
+    . = ALIGN(4);
+
+    _srodata = ABSOLUTE(.);
+    *(.rodata)
+    *(.rodata.*)
+    *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
+    *(.xt_except_table)
+    *(.gcc_except_table)
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    *(.eh_frame)
+
+    . = (. + 3) & ~ 3;
+
+    /* C++ constructor and destructor tables, properly ordered: */
+
+    _sinit = ABSOLUTE(.);
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    _einit = ABSOLUTE(.);
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+
+    /* C++ exception handlers table: */
+
+    __XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    _erodata = ABSOLUTE(.);
+    /* Literals are also RO data. */
+    _lit4_start = ABSOLUTE(.);
+    *(*.lit4)
+    *(.lit4.*)
+    *(.gnu.linkonce.lit4.*)
+    _lit4_end = ABSOLUTE(.);
+    . = ALIGN(4);
+
+    /* Heap starts at the end of .data */
+
+    _sheap = ABSOLUTE(.);
+  } >dram0_0_seg
+
+  .rtc.text :
+  {
+    . = ALIGN(4);
+    *(.rtc.literal .rtc.text)
+  } >rtc_iram_seg
+
+  .rtc.data :
+  {
+    *(.rtc.data)
+    *(.rtc.rodata)
+  } > rtc_slow_seg
+}
diff --git a/configs/esp32-core/scripts/esp32_peripherals.ld b/configs/esp32-core/scripts/esp32_peripherals.ld
new file mode 100644
index 0000000000000000000000000000000000000000..cabfe4aaa43e7a81e34041dc3b87d7987a7b6e3c
--- /dev/null
+++ b/configs/esp32-core/scripts/esp32_peripherals.ld
@@ -0,0 +1,24 @@
+/****************************************************************************
+ * configs/elf32-core/scripts/esp32_peripherals.ld
+ ****************************************************************************/
+
+PROVIDE ( UART0 = 0x3ff40000 );
+PROVIDE ( SPI1 = 0x3ff42000 );
+PROVIDE ( SPI0 = 0x3ff43000 );
+PROVIDE ( GPIO = 0x3ff44000 );
+PROVIDE ( SIGMADELTA = 0x3ff44f00 );
+PROVIDE ( UHCI1 = 0x3ff4C000 );
+PROVIDE ( I2S0 = 0x3ff4F000 );
+PROVIDE ( UART1 = 0x3ff50000 );
+PROVIDE ( I2C0 = 0x3ff53000 );
+PROVIDE ( UHCI0 = 0x3ff54000 );
+PROVIDE ( RMT = 0x3ff56000 );
+PROVIDE ( PCNT = 0x3ff57000 );
+PROVIDE ( LEDC = 0x3ff59000 );
+PROVIDE ( TIMERG0 = 0x3ff5F000 );
+PROVIDE ( TIMERG1 = 0x3ff60000 );
+PROVIDE ( SPI2 = 0x3ff64000 );
+PROVIDE ( SPI3 = 0x3ff65000 );
+PROVIDE ( I2C1 = 0x3ff67000 );
+PROVIDE ( I2S1 = 0x3ff6D000 );
+PROVIDE ( UART2 = 0x3ff6E000 );
diff --git a/configs/esp32-core/scripts/esp32_rom.ld b/configs/esp32-core/scripts/esp32_rom.ld
new file mode 100644
index 0000000000000000000000000000000000000000..b7181d88964b2682adaecd9eedb0addbbc70547b
--- /dev/null
+++ b/configs/esp32-core/scripts/esp32_rom.ld
@@ -0,0 +1,1846 @@
+/*
+ESP32 ROM address table
+Generated for ROM with MD5sum:
+ab8282ae908fe9e7a63fb2a4ac2df013  ../../rom_image/prorom.elf
+*/
+
+PROVIDE ( abort = 0x4000bba4 );
+PROVIDE ( abs = 0x40056340 );
+PROVIDE ( __absvdi2 = 0x4006387c );
+PROVIDE ( __absvsi2 = 0x40063868 );
+PROVIDE ( Add2SelfBigHex256 = 0x40015b7c );
+PROVIDE ( AddBigHex256 = 0x40015b28 );
+PROVIDE ( AddBigHexModP256 = 0x40015c98 );
+PROVIDE ( __adddf3 = 0x40002590 );
+PROVIDE ( AddP256 = 0x40015c74 );
+PROVIDE ( AddPdiv2_256 = 0x40015ce0 );
+PROVIDE ( __addsf3 = 0x400020e8 );
+PROVIDE ( __addvdi3 = 0x40002cbc );
+PROVIDE ( __addvsi3 = 0x40002c98 );
+PROVIDE ( aes_128_cbc_decrypt = 0x4005cc7c );
+PROVIDE ( aes_128_cbc_encrypt = 0x4005cc18 );
+PROVIDE ( aes_unwrap = 0x4005ccf0 );
+PROVIDE ( app_gpio_arg = 0x3ffe003c );
+PROVIDE ( app_gpio_handler = 0x3ffe0040 );
+PROVIDE ( __ascii_wctomb = 0x40058ef0 );
+PROVIDE ( asctime = 0x40059588 );
+PROVIDE ( asctime_r = 0x40000ec8 );
+PROVIDE ( __ashldi3 = 0x4000c818 );
+PROVIDE ( __ashrdi3 = 0x4000c830 );
+PROVIDE ( asiprintf = 0x40056d9c );
+PROVIDE ( _asiprintf_r = 0x40056d4c );
+PROVIDE ( asniprintf = 0x40056cd8 );
+PROVIDE ( _asniprintf_r = 0x40056c64 );
+PROVIDE ( asnprintf = 0x40056cd8 );
+PROVIDE ( _asnprintf_r = 0x40056c64 );
+PROVIDE ( asprintf = 0x40056d9c );
+PROVIDE ( _asprintf_r = 0x40056d4c );
+PROVIDE ( atoi = 0x400566c4 );
+PROVIDE ( _atoi_r = 0x400566d4 );
+PROVIDE ( atol = 0x400566ec );
+PROVIDE ( _atol_r = 0x400566fc );
+PROVIDE ( base64_decode = 0x4005ced8 );
+PROVIDE ( base64_encode = 0x4005cdbc );
+PROVIDE ( BasePoint_x_256 = 0x3ff97488 );
+PROVIDE ( BasePoint_y_256 = 0x3ff97468 );
+PROVIDE ( bigHexInversion256 = 0x400168f0 );
+PROVIDE ( bigHexP256 = 0x3ff973bc );
+PROVIDE ( __bswapdi2 = 0x400649c4 );
+PROVIDE ( __bswapsi2 = 0x4006499c );
+PROVIDE ( btdm_r_ble_bt_handler_tab_p_get = 0x40019b0c );
+PROVIDE ( btdm_r_btdm_option_data_p_get = 0x40010004 );
+PROVIDE ( btdm_r_btdm_rom_version_get = 0x40010078 );
+PROVIDE ( btdm_r_data_init = 0x4001002c );
+PROVIDE ( btdm_r_import_rf_phy_func_p_get = 0x40054298 );
+PROVIDE ( btdm_r_ip_func_p_get = 0x40019af0 );
+PROVIDE ( btdm_r_ip_func_p_set = 0x40019afc );
+PROVIDE ( btdm_r_modules_func_p_get = 0x4005427c );
+PROVIDE ( btdm_r_modules_func_p_set = 0x40054270 );
+PROVIDE ( btdm_r_plf_func_p_set = 0x40054288 );
+PROVIDE ( bt_util_buf_env = 0x3ffb8bd4 );
+PROVIDE ( bzero = 0x4000c1f4 );
+PROVIDE ( cache_flash_mmu_set = 0x400095e0 );
+PROVIDE ( Cache_Flush = 0x40009a14 );
+PROVIDE ( Cache_Read_Disable = 0x40009ab8 );
+PROVIDE ( Cache_Read_Enable = 0x40009a84 );
+PROVIDE ( Cache_Read_Init = 0x40009950 );
+PROVIDE ( cache_sram_mmu_set = 0x400097f4 );
+/* This is static function, but can be used, not generated by script*/
+PROVIDE ( calc_rtc_memory_crc = 0x40008170 );
+PROVIDE ( calloc = 0x4000bee4 );
+PROVIDE ( _calloc_r = 0x4000bbf8 );
+PROVIDE ( check_pos = 0x400068b8 );
+PROVIDE ( _cleanup = 0x40001df8 );
+PROVIDE ( _cleanup_r = 0x40001d48 );
+PROVIDE ( __clear_cache = 0x40063860 );
+PROVIDE ( close = 0x40001778 );
+PROVIDE ( _close_r = 0x4000bd3c );
+PROVIDE ( __clrsbdi2 = 0x40064a38 );
+PROVIDE ( __clrsbsi2 = 0x40064a20 );
+PROVIDE ( __clzdi2 = 0x4000ca50 );
+PROVIDE ( __clzsi2 = 0x4000c7e8 );
+PROVIDE ( __cmpdi2 = 0x40063820 );
+PROVIDE ( co_default_bdaddr = 0x3ffae704 );
+PROVIDE ( co_null_bdaddr = 0x3ffb80e0 );
+PROVIDE ( co_sca2ppm = 0x3ff971e8 );
+PROVIDE ( crc16_be = 0x4005d09c );
+PROVIDE ( crc16_le = 0x4005d05c );
+PROVIDE ( crc32_be = 0x4005d024 );
+PROVIDE ( crc32_le = 0x4005cfec );
+PROVIDE ( crc8_be = 0x4005d114 );
+PROVIDE ( crc8_le = 0x4005d0e0 );
+PROVIDE ( creat = 0x40000e8c );
+PROVIDE ( ctime = 0x400595b0 );
+PROVIDE ( ctime_r = 0x400595c4 );
+PROVIDE ( _ctype_ = 0x3ff96354 );
+PROVIDE ( __ctype_ptr__ = 0x3ff96350 );
+PROVIDE ( __ctzdi2 = 0x4000ca64 );
+PROVIDE ( __ctzsi2 = 0x4000c7f0 );
+PROVIDE ( _data_end = 0x4000d5c8 );
+PROVIDE ( _data_end_btdm_rom = 0x4000d4f8 );
+PROVIDE ( _data_start = 0x4000d4f8 );
+PROVIDE ( _data_start_btdm_rom = 0x4000d4f4 );
+PROVIDE ( _data_start_btdm = 0x3ffae6e0);
+PROVIDE ( _data_end_btdm = 0x3ffaff10);
+PROVIDE ( _sbss_btdm = 0x3ffb8000);
+PROVIDE ( _ebss_btdm = 0x3ffbff70);
+PROVIDE ( _daylight = 0x3ffae0a4 );
+PROVIDE ( dbg_default_handler = 0x3ff97218 );
+PROVIDE ( dbg_state = 0x3ffb8d5d );
+PROVIDE ( DebugE256PublicKey_x = 0x3ff97428 );
+PROVIDE ( DebugE256PublicKey_y = 0x3ff97408 );
+PROVIDE ( DebugE256SecretKey = 0x3ff973e8 );
+PROVIDE ( _DebugExceptionVector = 0x40000280 );
+PROVIDE ( debug_timer = 0x3ffe042c );
+PROVIDE ( debug_timerfn = 0x3ffe0430 );
+PROVIDE ( dh_group14_generator = 0x3ff9ac60 );
+PROVIDE ( dh_group14_prime = 0x3ff9ab60 );
+PROVIDE ( dh_group15_generator = 0x3ff9ab5f );
+PROVIDE ( dh_group15_prime = 0x3ff9a9df );
+PROVIDE ( dh_group16_generator = 0x3ff9a9de );
+PROVIDE ( dh_group16_prime = 0x3ff9a7de );
+PROVIDE ( dh_group17_generator = 0x3ff9a7dd );
+PROVIDE ( dh_group17_prime = 0x3ff9a4dd );
+PROVIDE ( dh_group18_generator = 0x3ff9a4dc );
+PROVIDE ( dh_group18_prime = 0x3ff9a0dc );
+PROVIDE ( dh_group1_generator = 0x3ff9ae03 );
+PROVIDE ( dh_group1_prime = 0x3ff9ada3 );
+PROVIDE ( dh_group2_generator = 0x3ff9ada2 );
+PROVIDE ( dh_group2_prime = 0x3ff9ad22 );
+PROVIDE ( dh_group5_generator = 0x3ff9ad21 );
+PROVIDE ( dh_group5_prime = 0x3ff9ac61 );
+PROVIDE ( div = 0x40056348 );
+PROVIDE ( __divdc3 = 0x40064460 );
+PROVIDE ( __divdf3 = 0x40002954 );
+PROVIDE ( __divdi3 = 0x4000ca84 );
+PROVIDE ( __divsc3 = 0x40064200 );
+PROVIDE ( __divsf3 = 0x4000234c );
+PROVIDE ( __divsi3 = 0x4000c7b8 );
+PROVIDE ( _DoubleExceptionVector = 0x400003c0 );
+PROVIDE ( dummy_len_plus = 0x3ffae290 );
+PROVIDE ( __dummy_lock = 0x4000c728 );
+PROVIDE ( __dummy_lock_try = 0x4000c730 );
+PROVIDE ( ecc_env = 0x3ffb8d60 );
+PROVIDE ( ecc_Jacobian_InfinityPoint256 = 0x3ff972e8 );
+PROVIDE ( em_buf_env = 0x3ffb8d74 );
+PROVIDE ( environ = 0x3ffae0b4 );
+PROVIDE ( __env_lock = 0x40001fd4 );
+PROVIDE ( __env_unlock = 0x40001fe0 );
+PROVIDE ( __eqdf2 = 0x400636a8 );
+PROVIDE ( __eqsf2 = 0x40063374 );
+PROVIDE ( esp_crc8 = 0x4005d144 );
+PROVIDE ( _etext = 0x4000d66c );
+PROVIDE ( ets_aes_crypt = 0x4005c9b8 );
+PROVIDE ( ets_aes_disable = 0x4005c8f8 );
+PROVIDE ( ets_aes_enable = 0x4005c8cc );
+PROVIDE ( ets_aes_set_endian = 0x4005c928 );
+PROVIDE ( ets_aes_setkey_dec = 0x4005c994 );
+PROVIDE ( ets_aes_setkey_enc = 0x4005c97c );
+PROVIDE ( ets_bigint_disable = 0x4005c4e0 );
+PROVIDE ( ets_bigint_enable = 0x4005c498 );
+PROVIDE ( ets_bigint_mod_mult_getz = 0x4005c818 );
+PROVIDE ( ets_bigint_mod_mult_prepare = 0x4005c7b4 );
+PROVIDE ( ets_bigint_mod_power_getz = 0x4005c614 );
+PROVIDE ( ets_bigint_mod_power_prepare = 0x4005c54c );
+PROVIDE ( ets_bigint_montgomery_mult_getz = 0x4005c7a4 );
+PROVIDE ( ets_bigint_montgomery_mult_prepare = 0x4005c6fc );
+PROVIDE ( ets_bigint_mult_getz = 0x4005c6e8 );
+PROVIDE ( ets_bigint_mult_prepare = 0x4005c630 );
+PROVIDE ( ets_bigint_wait_finish = 0x4005c520 );
+PROVIDE ( ets_delay_us = 0x40008534 );
+PROVIDE ( ets_efuse_get_8M_clock = 0x40008710 );
+PROVIDE ( ets_efuse_get_spiconfig = 0x40008658 );
+PROVIDE ( ets_efuse_program_op = 0x40008628 );
+PROVIDE ( ets_efuse_read_op = 0x40008600 );
+PROVIDE ( ets_get_cpu_frequency = 0x4000855c );
+PROVIDE ( ets_get_detected_xtal_freq = 0x40008588 );
+PROVIDE ( ets_get_xtal_scale = 0x4000856c );
+PROVIDE ( ets_install_putc1 = 0x40007d18 );
+PROVIDE ( ets_install_putc2 = 0x40007d38 );
+PROVIDE ( ets_install_uart_printf = 0x40007d28 );
+PROVIDE ( ets_intr_count = 0x3ffe03fc );
+PROVIDE ( ets_intr_lock = 0x400067b0 );
+PROVIDE ( ets_intr_unlock = 0x400067c4 );
+PROVIDE ( ets_isr_attach = 0x400067ec );
+PROVIDE ( ets_isr_mask = 0x400067fc );
+PROVIDE ( ets_isr_unmask = 0x40006808 );
+PROVIDE ( ets_post = 0x4000673c );
+PROVIDE ( ets_printf = 0x40007d54 );
+PROVIDE ( ets_readySet_ = 0x3ffe01f0 );
+PROVIDE ( ets_run = 0x400066bc );
+PROVIDE ( ets_secure_boot_check = 0x4005cb40 );
+PROVIDE ( ets_secure_boot_check_finish = 0x4005cc04 );
+PROVIDE ( ets_secure_boot_check_start = 0x4005cbcc );
+PROVIDE ( ets_secure_boot_finish = 0x4005ca84 );
+PROVIDE ( ets_secure_boot_hash = 0x4005cad4 );
+PROVIDE ( ets_secure_boot_obtain = 0x4005cb14 );
+PROVIDE ( ets_secure_boot_rd_abstract = 0x4005cba8 );
+PROVIDE ( ets_secure_boot_rd_iv = 0x4005cb84 );
+PROVIDE ( ets_secure_boot_start = 0x4005ca34 );
+PROVIDE ( ets_set_appcpu_boot_addr = 0x4000689c );
+PROVIDE ( ets_set_idle_cb = 0x40006674 );
+PROVIDE ( ets_set_startup_callback = 0x4000688c );
+PROVIDE ( ets_set_user_start = 0x4000687c );
+PROVIDE ( ets_sha_disable = 0x4005c0a8 );
+PROVIDE ( ets_sha_enable = 0x4005c07c );
+PROVIDE ( ets_sha_finish = 0x4005c104 );
+PROVIDE ( ets_sha_init = 0x4005c0d4 );
+PROVIDE ( ets_sha_update = 0x4005c2a0 );
+PROVIDE ( ets_startup_callback = 0x3ffe0404 );
+PROVIDE ( ets_task = 0x40006688 );
+PROVIDE ( ets_timer_arm = 0x40008368 );
+PROVIDE ( ets_timer_arm_us = 0x400083ac );
+PROVIDE ( ets_timer_disarm = 0x400083ec );
+PROVIDE ( ets_timer_done = 0x40008428 );
+PROVIDE ( ets_timer_handler_isr = 0x40008454 );
+PROVIDE ( ets_timer_init = 0x400084e8 );
+PROVIDE ( ets_timer_setfn = 0x40008350 );
+PROVIDE ( ets_unpack_flash_code = 0x40007018 );
+PROVIDE ( ets_unpack_flash_code_legacy = 0x4000694c );
+PROVIDE ( ets_update_cpu_frequency = 0x40008550 );
+PROVIDE ( ets_waiti0 = 0x400067d8 );
+PROVIDE ( exc_cause_table = 0x3ff991d0 );
+PROVIDE ( _exit_r = 0x4000bd28 );
+PROVIDE ( __extendsfdf2 = 0x40002c34 );
+PROVIDE ( fclose = 0x400020ac );
+PROVIDE ( _fclose_r = 0x40001fec );
+PROVIDE ( fflush = 0x40059394 );
+PROVIDE ( _fflush_r = 0x40059320 );
+PROVIDE ( __ffsdi2 = 0x4000ca2c );
+PROVIDE ( __ffssi2 = 0x4000c804 );
+PROVIDE ( FilePacketSendDeflatedReqMsgProc = 0x40008b24 );
+PROVIDE ( FilePacketSendReqMsgProc = 0x40008860 );
+PROVIDE ( _findenv_r = 0x40001f44 );
+PROVIDE ( fiprintf = 0x40056efc );
+PROVIDE ( _fiprintf_r = 0x40056ed8 );
+PROVIDE ( fiscanf = 0x40058884 );
+PROVIDE ( _fiscanf_r = 0x400588b4 );
+PROVIDE ( __fixdfdi = 0x40002ac4 );
+PROVIDE ( __fixdfsi = 0x40002a78 );
+PROVIDE ( __fixsfdi = 0x4000244c );
+PROVIDE ( __fixsfsi = 0x4000240c );
+PROVIDE ( __fixunsdfsi = 0x40002b30 );
+PROVIDE ( __fixunssfdi = 0x40002504 );
+PROVIDE ( __fixunssfsi = 0x400024ac );
+PROVIDE ( FlashDwnLdDeflatedStartMsgProc = 0x40008ad8 );
+PROVIDE ( FlashDwnLdParamCfgMsgProc = 0x4000891c );
+PROVIDE ( FlashDwnLdStartMsgProc = 0x40008820 );
+PROVIDE ( FlashDwnLdStopDeflatedReqMsgProc = 0x40008c18 );
+PROVIDE ( FlashDwnLdStopReqMsgProc = 0x400088ec );
+PROVIDE ( __floatdidf = 0x4000c988 );
+PROVIDE ( __floatdisf = 0x4000c8c0 );
+PROVIDE ( __floatsidf = 0x4000c944 );
+PROVIDE ( __floatsisf = 0x4000c870 );
+PROVIDE ( __floatundidf = 0x4000c978 );
+PROVIDE ( __floatundisf = 0x4000c8b0 );
+PROVIDE ( __floatunsidf = 0x4000c938 );
+PROVIDE ( __floatunsisf = 0x4000c864 );
+PROVIDE ( __fp_lock_all = 0x40001f1c );
+PROVIDE ( fprintf = 0x40056efc );
+PROVIDE ( _fprintf_r = 0x40056ed8 );
+PROVIDE ( __fp_unlock_all = 0x40001f30 );
+PROVIDE ( fputwc = 0x40058ea8 );
+PROVIDE ( __fputwc = 0x40058da0 );
+PROVIDE ( _fputwc_r = 0x40058e4c );
+PROVIDE ( free = 0x4000beb8 );
+PROVIDE ( _free_r = 0x4000bbcc );
+PROVIDE ( fscanf = 0x40058884 );
+PROVIDE ( _fscanf_r = 0x400588b4 );
+PROVIDE ( _fstat_r = 0x4000bccc );
+PROVIDE ( _fwalk = 0x4000c738 );
+PROVIDE ( _fwalk_reent = 0x4000c770 );
+PROVIDE ( __gcc_bcmp = 0x40064a70 );
+PROVIDE ( __gedf2 = 0x40063768 );
+PROVIDE ( _GeneralException = 0x40000e14 );
+PROVIDE ( __gesf2 = 0x4006340c );
+PROVIDE ( __get_current_time_locale = 0x40001834 );
+PROVIDE ( _getenv_r = 0x40001fbc );
+PROVIDE ( _getpid_r = 0x4000bcfc );
+PROVIDE ( __getreent = 0x4000be8c );
+PROVIDE ( _gettimeofday_r = 0x4000bc58 );
+PROVIDE ( __gettzinfo = 0x40001fcc );
+PROVIDE ( GetUartDevice = 0x40009598 );
+PROVIDE ( GF_Jacobian_Point_Addition256 = 0x400163a4 );
+PROVIDE ( GF_Jacobian_Point_Double256 = 0x40016260 );
+PROVIDE ( GF_Point_Jacobian_To_Affine256 = 0x40016b0c );
+PROVIDE ( _global_impure_ptr = 0x3ffae0b0 );
+PROVIDE ( gmtime = 0x40059848 );
+PROVIDE ( gmtime_r = 0x40059868 );
+PROVIDE ( g_phyFuns_instance = 0x3ffae0c4 );
+PROVIDE ( gpio_init = 0x40009c20 );
+PROVIDE ( gpio_input_get = 0x40009b88 );
+PROVIDE ( gpio_input_get_high = 0x40009b9c );
+PROVIDE ( gpio_intr_ack = 0x40009dd4 );
+PROVIDE ( gpio_intr_ack_high = 0x40009e1c );
+PROVIDE ( gpio_intr_handler_register = 0x40009e6c );
+PROVIDE ( gpio_intr_pending = 0x40009cec );
+PROVIDE ( gpio_intr_pending_high = 0x40009cf8 );
+PROVIDE ( gpio_matrix_in = 0x40009edc );
+PROVIDE ( gpio_matrix_out = 0x40009f0c );
+PROVIDE ( gpio_output_set = 0x40009b24 );
+PROVIDE ( gpio_output_set_high = 0x40009b5c );
+PROVIDE ( gpio_pad_hold = 0x4000a734 );
+PROVIDE ( gpio_pad_pulldown = 0x4000a348 );
+PROVIDE ( gpio_pad_pullup = 0x4000a22c );
+PROVIDE ( gpio_pad_select_gpio = 0x40009fdc );
+PROVIDE ( gpio_pad_set_drv = 0x4000a11c );
+PROVIDE ( gpio_pad_unhold = 0x4000a484 );
+PROVIDE ( gpio_pending_mask = 0x3ffe0038 );
+PROVIDE ( gpio_pending_mask_high = 0x3ffe0044 );
+PROVIDE ( gpio_pin_intr_state_set = 0x40009d04 );
+PROVIDE ( gpio_pin_wakeup_disable = 0x40009eb0 );
+PROVIDE ( gpio_pin_wakeup_enable = 0x40009e7c );
+PROVIDE ( gpio_register_get = 0x40009cbc );
+PROVIDE ( gpio_register_set = 0x40009bbc );
+PROVIDE ( __gtdf2 = 0x400636dc );
+PROVIDE ( __gtsf2 = 0x400633a0 );
+PROVIDE ( gTxMsg = 0x3ffe0050 );
+PROVIDE ( hci_cmd_desc_root_tab = 0x3ff976d4 );
+PROVIDE ( hci_cmd_desc_tab_ctrl_bb = 0x3ff97b70 );
+PROVIDE ( hci_cmd_desc_tab_info_par = 0x3ff97b1c );
+PROVIDE ( hci_cmd_desc_tab_le = 0x3ff97870 );
+PROVIDE ( hci_cmd_desc_tab_lk_ctrl = 0x3ff97fc0 );
+PROVIDE ( hci_cmd_desc_tab_lk_pol = 0x3ff97f3c );
+PROVIDE ( hci_cmd_desc_tab_stat_par = 0x3ff97ac8 );
+PROVIDE ( hci_cmd_desc_tab_testing = 0x3ff97a98 );
+PROVIDE ( hci_cmd_desc_tab_vs = 0x3ff97714 );
+PROVIDE ( hci_command_handler = 0x4004c928 );
+PROVIDE ( hci_env = 0x3ffb9350 );
+PROVIDE ( hci_evt_dbg_desc_tab = 0x3ff9750c );
+PROVIDE ( hci_evt_desc_tab = 0x3ff9751c );
+PROVIDE ( hci_evt_le_desc_tab = 0x3ff974b4 );
+PROVIDE ( hci_fc_env = 0x3ffb9340 );
+PROVIDE ( hmac_md5 = 0x4005d264 );
+PROVIDE ( hmac_md5_vector = 0x4005d17c );
+PROVIDE ( hmac_sha1 = 0x40060acc );
+PROVIDE ( hmac_sha1_vector = 0x400609e4 );
+PROVIDE ( hmac_sha256 = 0x40060d58 );
+PROVIDE ( hmac_sha256_vector = 0x40060c84 );
+PROVIDE ( intr_matrix_set = 0x4000681c );
+PROVIDE ( iprintf = 0x40056978 );
+PROVIDE ( _iprintf_r = 0x40056944 );
+PROVIDE ( isalnum = 0x40000f04 );
+PROVIDE ( isalpha = 0x40000f18 );
+PROVIDE ( isascii = 0x4000c20c );
+PROVIDE ( _isatty_r = 0x40000ea0 );
+PROVIDE ( isblank = 0x40000f2c );
+PROVIDE ( iscanf = 0x40058760 );
+PROVIDE ( _iscanf_r = 0x4005879c );
+PROVIDE ( iscntrl = 0x40000f50 );
+PROVIDE ( isdigit = 0x40000f64 );
+PROVIDE ( isgraph = 0x40000f94 );
+PROVIDE ( islower = 0x40000f78 );
+PROVIDE ( isprint = 0x40000fa8 );
+PROVIDE ( ispunct = 0x40000fc0 );
+PROVIDE ( isspace = 0x40000fd4 );
+PROVIDE ( isupper = 0x40000fe8 );
+PROVIDE ( itoa = 0x400566b4 );
+PROVIDE ( __itoa = 0x40056678 );
+PROVIDE ( jd_decomp = 0x400613e8 );
+PROVIDE ( jd_prepare = 0x40060fa8 );
+PROVIDE ( ke_env = 0x3ffb93cc );
+PROVIDE ( _KernelExceptionVector = 0x40000300 );
+PROVIDE ( _kill_r = 0x4000bd10 );
+PROVIDE ( labs = 0x40056370 );
+PROVIDE ( lb_default_handler = 0x3ff982b8 );
+PROVIDE ( lb_default_state_tab_p_get = 0x4001c198 );
+PROVIDE ( lb_env = 0x3ffb9424 );
+PROVIDE ( lb_hci_cmd_handler_tab_p_get = 0x4001c18c );
+PROVIDE ( lb_state = 0x3ffb94e8 );
+PROVIDE ( lc_default_handler = 0x3ff98648 );
+PROVIDE ( lc_default_state_tab_p_get = 0x4002f494 );
+PROVIDE ( lc_env = 0x3ffb94ec );
+PROVIDE ( lc_hci_cmd_handler_tab_p_get = 0x4002f488 );
+PROVIDE ( lc_state = 0x3ffb9508 );
+PROVIDE ( ld_acl_br_sizes = 0x3ff98a2a );
+PROVIDE ( ld_acl_br_types = 0x3ff98a36 );
+PROVIDE ( ld_acl_edr_sizes = 0x3ff98a14 );
+PROVIDE ( ld_acl_edr_types = 0x3ff98a22 );
+PROVIDE ( ld_env = 0x3ffb9510 );
+PROVIDE ( ldiv = 0x40056378 );
+PROVIDE ( ld_pcm_settings_dft = 0x3ff98a0c );
+PROVIDE ( ld_sched_params = 0x3ffb96c0 );
+PROVIDE ( ld_sync_train_channels = 0x3ff98a3c );
+PROVIDE ( __ledf2 = 0x40063704 );
+PROVIDE ( __lesf2 = 0x400633c0 );
+PROVIDE ( _xtensa_level2_from = 0x40000954 );
+PROVIDE ( _xtensa_level2_vector = 0x40000180 );
+PROVIDE ( _xtensa_level3_from = 0x40000a28 );
+PROVIDE ( _xtensa_level3_vector = 0x400001c0 );
+PROVIDE ( _xtensa_level4_from = 0x40000af8 );
+PROVIDE ( _xtensa_level4_vector = 0x40000200 );
+PROVIDE ( _xtensa_level5_from = 0x40000c68 );
+PROVIDE ( _xtensa_level5_vector = 0x40000240 );
+PROVIDE ( _LevelOneInterrupt = 0x40000835 );
+PROVIDE ( _link_r = 0x4000bc9c );
+PROVIDE ( llc_default_handler = 0x3ff98b3c );
+PROVIDE ( llc_default_state_tab_p_get = 0x40046058 );
+PROVIDE ( llc_env = 0x3ffb96d0 );
+PROVIDE ( llc_hci_acl_data_tx_handler = 0x40042398 );
+PROVIDE ( llc_hci_cmd_handler_tab_p_get = 0x40042358 );
+PROVIDE ( llc_hci_command_handler = 0x40042360 );
+PROVIDE ( llcp_pdu_handler_tab_p_get = 0x40043f64 );
+PROVIDE ( llc_state = 0x3ffb96f8 );
+PROVIDE ( lldesc_build_chain = 0x4000a850 );
+PROVIDE ( lldesc_num2link = 0x4000a948 );
+PROVIDE ( lldesc_set_owner = 0x4000a974 );
+PROVIDE ( lld_evt_env = 0x3ffb9704 );
+PROVIDE ( lld_pdu_adv_pk_desc_tab = 0x3ff98c70 );
+PROVIDE ( lld_pdu_llcp_pk_desc_tab = 0x3ff98b68 );
+PROVIDE ( LLM_AA_CT1 = 0x3ff98d8a );
+PROVIDE ( LLM_AA_CT2 = 0x3ff98d88 );
+PROVIDE ( llm_default_handler = 0x3ff98d80 );
+PROVIDE ( llm_default_state_tab_p_get = 0x4004e718 );
+PROVIDE ( llm_hci_cmd_handler_tab_p_get = 0x4004c920 );
+PROVIDE ( llm_le_env = 0x3ffb976c );
+PROVIDE ( llm_local_cmds = 0x3ff98d38 );
+PROVIDE ( llm_local_data_len_values = 0x3ff98d1c );
+PROVIDE ( llm_local_le_feats = 0x3ff98d30 );
+PROVIDE ( llm_local_le_states = 0x3ff98d28 );
+PROVIDE ( llm_state = 0x3ffb985c );
+PROVIDE ( lm_default_handler = 0x3ff990e0 );
+PROVIDE ( lm_default_state_tab_p_get = 0x40054268 );
+PROVIDE ( lm_env = 0x3ffb9860 );
+PROVIDE ( lm_hci_cmd_handler_tab_p_get = 0x4005425c );
+PROVIDE ( lm_local_supp_feats = 0x3ff990ee );
+PROVIDE ( lm_n_page_tab = 0x3ff990e8 );
+PROVIDE ( lmp_desc_tab = 0x3ff96e6c );
+PROVIDE ( lmp_ext_desc_tab = 0x3ff96d9c );
+PROVIDE ( lm_state = 0x3ffb9a1c );
+PROVIDE ( __locale_charset = 0x40059540 );
+PROVIDE ( __locale_cjk_lang = 0x40059558 );
+PROVIDE ( localeconv = 0x4005957c );
+PROVIDE ( _localeconv_r = 0x40059560 );
+PROVIDE ( __locale_mb_cur_max = 0x40059548 );
+PROVIDE ( __locale_msgcharset = 0x40059550 );
+PROVIDE ( localtime = 0x400595dc );
+PROVIDE ( localtime_r = 0x400595fc );
+PROVIDE ( _lock_acquire = 0x4000be14 );
+PROVIDE ( _lock_acquire_recursive = 0x4000be28 );
+PROVIDE ( _lock_close = 0x4000bdec );
+PROVIDE ( _lock_close_recursive = 0x4000be00 );
+PROVIDE ( _lock_init = 0x4000bdc4 );
+PROVIDE ( _lock_init_recursive = 0x4000bdd8 );
+PROVIDE ( _lock_release = 0x4000be64 );
+PROVIDE ( _lock_release_recursive = 0x4000be78 );
+PROVIDE ( _lock_try_acquire = 0x4000be3c );
+PROVIDE ( _lock_try_acquire_recursive = 0x4000be50 );
+PROVIDE ( longjmp = 0x400562cc );
+PROVIDE ( _lseek_r = 0x4000bd8c );
+PROVIDE ( __lshrdi3 = 0x4000c84c );
+PROVIDE ( __ltdf2 = 0x40063790 );
+PROVIDE ( __ltsf2 = 0x4006342c );
+PROVIDE ( malloc = 0x4000bea0 );
+PROVIDE ( _malloc_r = 0x4000bbb4 );
+PROVIDE ( maxSecretKey_256 = 0x3ff97448 );
+PROVIDE ( __mb_cur_max = 0x3ff96530 );
+PROVIDE ( MD5Final = 0x4005db1c );
+PROVIDE ( MD5Init = 0x4005da7c );
+PROVIDE ( MD5Update = 0x4005da9c );
+PROVIDE ( md5_vector = 0x4005db80 );
+PROVIDE ( memccpy = 0x4000c220 );
+PROVIDE ( memchr = 0x4000c244 );
+PROVIDE ( memcmp = 0x4000c260 );
+PROVIDE ( memcpy = 0x4000c2c8 );
+PROVIDE ( MemDwnLdStartMsgProc = 0x40008948 );
+PROVIDE ( MemDwnLdStopReqMsgProc = 0x400089dc );
+PROVIDE ( memmove = 0x4000c3c0 );
+PROVIDE ( MemPacketSendReqMsgProc = 0x40008978 );
+PROVIDE ( memrchr = 0x4000c400 );
+PROVIDE ( memset = 0x4000c44c );
+PROVIDE ( mktime = 0x4005a5e8 );
+PROVIDE ( mmu_init = 0x400095a4 );
+PROVIDE ( __moddi3 = 0x4000cd4c );
+PROVIDE ( __modsi3 = 0x4000c7c0 );
+PROVIDE ( __month_lengths = 0x3ff9609c );
+PROVIDE ( __muldc3 = 0x40063bf4 );
+PROVIDE ( __muldf3 = 0x4006358c );
+PROVIDE ( __muldi3 = 0x4000c9fc );
+PROVIDE ( __mulsc3 = 0x40063934 );
+PROVIDE ( __mulsf3 = 0x400632c8 );
+PROVIDE ( __mulsi3 = 0x4000c7b0 );
+PROVIDE ( MultiplyBigHexByUint32_256 = 0x40016214 );
+PROVIDE ( MultiplyBigHexModP256 = 0x400160b8 );
+PROVIDE ( MultiplyByU32ModP256 = 0x40015fdc );
+PROVIDE ( multofup = 0x4000ab8c );
+PROVIDE ( __mulvdi3 = 0x40002d78 );
+PROVIDE ( __mulvsi3 = 0x40002d60 );
+PROVIDE ( mz_adler32 = 0x4005edbc );
+PROVIDE ( mz_crc32 = 0x4005ee88 );
+PROVIDE ( mz_free = 0x4005eed4 );
+PROVIDE ( __nedf2 = 0x400636a8 );
+PROVIDE ( __negdf2 = 0x400634a0 );
+PROVIDE ( __negdi2 = 0x4000ca14 );
+PROVIDE ( __negsf2 = 0x400020c0 );
+PROVIDE ( __negvdi2 = 0x40002e98 );
+PROVIDE ( __negvsi2 = 0x40002e78 );
+PROVIDE ( __nesf2 = 0x40063374 );
+PROVIDE ( _NMIExceptionVector = 0x400002c0 );
+PROVIDE ( notEqual256 = 0x40015b04 );
+PROVIDE ( __nsau_data = 0x3ff96544 );
+PROVIDE ( one_bits = 0x3ff971f8 );
+PROVIDE ( open = 0x4000178c );
+PROVIDE ( _open_r = 0x4000bd54 );
+PROVIDE ( __paritysi2 = 0x40002f3c );
+PROVIDE ( pbkdf2_sha1 = 0x40060ba4 );
+PROVIDE ( phy_get_romfuncs = 0x40004100 );
+PROVIDE ( __popcountdi2 = 0x40002ef8 );
+PROVIDE ( __popcountsi2 = 0x40002ed0 );
+PROVIDE ( __popcount_tab = 0x3ff96544 );
+PROVIDE ( __powidf2 = 0x400638d4 );
+PROVIDE ( __powisf2 = 0x4006389c );
+PROVIDE ( _Pri_4_HandlerAddress = 0x3ffe0648 );
+PROVIDE ( _Pri_5_HandlerAddress = 0x3ffe064c );
+PROVIDE ( printf = 0x40056978 );
+PROVIDE ( _printf_common = 0x40057338 );
+PROVIDE ( _printf_float = 0x4000befc );
+PROVIDE ( _printf_i = 0x40057404 );
+PROVIDE ( _printf_r = 0x40056944 );
+PROVIDE ( qsort = 0x40056424 );
+PROVIDE ( _raise_r = 0x4000bc70 );
+PROVIDE ( rand = 0x40001058 );
+PROVIDE ( rand_r = 0x400010d4 );
+PROVIDE ( r_btdm_option_data = 0x3ffae6e0 );
+PROVIDE ( r_bt_util_buf_acl_rx_alloc = 0x40010218 );
+PROVIDE ( r_bt_util_buf_acl_rx_free = 0x40010234 );
+PROVIDE ( r_bt_util_buf_acl_tx_alloc = 0x40010268 );
+PROVIDE ( r_bt_util_buf_acl_tx_free = 0x40010280 );
+PROVIDE ( r_bt_util_buf_init = 0x400100e4 );
+PROVIDE ( r_bt_util_buf_lmp_tx_alloc = 0x400101d0 );
+PROVIDE ( r_bt_util_buf_lmp_tx_free = 0x400101ec );
+PROVIDE ( r_bt_util_buf_sync_clear = 0x400103c8 );
+PROVIDE ( r_bt_util_buf_sync_init = 0x400102c4 );
+PROVIDE ( r_bt_util_buf_sync_rx_alloc = 0x40010468 );
+PROVIDE ( r_bt_util_buf_sync_rx_free = 0x4001049c );
+PROVIDE ( r_bt_util_buf_sync_tx_alloc = 0x400103ec );
+PROVIDE ( r_bt_util_buf_sync_tx_free = 0x40010428 );
+PROVIDE ( rc4_skip = 0x40060928 );
+PROVIDE ( r_co_bdaddr_compare = 0x40014324 );
+PROVIDE ( r_co_bytes_to_string = 0x400142e4 );
+PROVIDE ( r_co_list_check_size_available = 0x400142c4 );
+PROVIDE ( r_co_list_extract = 0x4001404c );
+PROVIDE ( r_co_list_extract_after = 0x40014118 );
+PROVIDE ( r_co_list_find = 0x4001419c );
+PROVIDE ( r_co_list_init = 0x40013f14 );
+PROVIDE ( r_co_list_insert_after = 0x40014254 );
+PROVIDE ( r_co_list_insert_before = 0x40014200 );
+PROVIDE ( r_co_list_merge = 0x400141bc );
+PROVIDE ( r_co_list_pool_init = 0x40013f30 );
+PROVIDE ( r_co_list_pop_front = 0x40014028 );
+PROVIDE ( r_co_list_push_back = 0x40013fb8 );
+PROVIDE ( r_co_list_push_front = 0x40013ff4 );
+PROVIDE ( r_co_list_size = 0x400142ac );
+PROVIDE ( r_co_nb_good_channels = 0x40014360 );
+PROVIDE ( r_co_slot_to_duration = 0x40014348 );
+PROVIDE ( RcvMsg = 0x4000954c );
+PROVIDE ( r_dbg_init = 0x40014394 );
+PROVIDE ( r_dbg_platform_reset_complete = 0x400143d0 );
+PROVIDE ( r_dbg_swdiag_init = 0x40014470 );
+PROVIDE ( r_dbg_swdiag_read = 0x400144a4 );
+PROVIDE ( r_dbg_swdiag_write = 0x400144d0 );
+PROVIDE ( r_E1 = 0x400108e8 );
+PROVIDE ( r_E21 = 0x40010968 );
+PROVIDE ( r_E22 = 0x400109b4 );
+PROVIDE ( r_E3 = 0x40010a58 );
+PROVIDE ( r_ea_alarm_clear = 0x40015ab4 );
+PROVIDE ( r_ea_alarm_set = 0x40015a10 );
+PROVIDE ( read = 0x400017dc );
+PROVIDE ( _read_r = 0x4000bda8 );
+PROVIDE ( r_ea_elt_cancel = 0x400150d0 );
+PROVIDE ( r_ea_elt_create = 0x40015264 );
+PROVIDE ( r_ea_elt_insert = 0x400152a8 );
+PROVIDE ( r_ea_elt_remove = 0x400154f0 );
+PROVIDE ( r_ea_finetimer_isr = 0x400155d4 );
+PROVIDE ( r_ea_init = 0x40015228 );
+PROVIDE ( r_ea_interval_create = 0x4001555c );
+PROVIDE ( r_ea_interval_delete = 0x400155a8 );
+PROVIDE ( r_ea_interval_duration_req = 0x4001597c );
+PROVIDE ( r_ea_interval_insert = 0x4001557c );
+PROVIDE ( r_ea_interval_remove = 0x40015590 );
+PROVIDE ( realloc = 0x4000becc );
+PROVIDE ( _realloc_r = 0x4000bbe0 );
+PROVIDE ( r_ea_offset_req = 0x40015748 );
+PROVIDE ( r_ea_sleep_check = 0x40015928 );
+PROVIDE ( r_ea_sw_isr = 0x40015724 );
+PROVIDE ( r_ea_time_get_halfslot_rounded = 0x40015894 );
+PROVIDE ( r_ea_time_get_slot_rounded = 0x400158d4 );
+PROVIDE ( r_ecc_abort_key256_generation = 0x40017070 );
+PROVIDE ( r_ecc_generate_key256 = 0x40016e00 );
+PROVIDE ( r_ecc_gen_new_public_key = 0x400170c0 );
+PROVIDE ( r_ecc_gen_new_secret_key = 0x400170e4 );
+PROVIDE ( r_ecc_get_debug_Keys = 0x40017224 );
+PROVIDE ( r_ecc_init = 0x40016dbc );
+PROVIDE ( RecvBuff = 0x3ffe009c );
+PROVIDE ( recv_packet = 0x40009424 );
+PROVIDE ( r_em_buf_init = 0x4001729c );
+PROVIDE ( r_em_buf_rx_buff_addr_get = 0x400173e8 );
+PROVIDE ( r_em_buf_rx_free = 0x400173c4 );
+PROVIDE ( r_em_buf_tx_buff_addr_get = 0x40017404 );
+PROVIDE ( r_em_buf_tx_free = 0x4001741c );
+PROVIDE ( _rename_r = 0x4000bc28 );
+PROVIDE ( _ResetHandler = 0x40000450 );
+PROVIDE ( _ResetVector = 0x40000400 );
+PROVIDE ( r_F1_256 = 0x400133e4 );
+PROVIDE ( r_F2_256 = 0x40013568 );
+PROVIDE ( r_F3_256 = 0x40013664 );
+PROVIDE ( RFPLL_ICP_TABLE = 0x3ffb8b7c );
+PROVIDE ( r_G_256 = 0x40013470 );
+PROVIDE ( r_H3 = 0x40013760 );
+PROVIDE ( r_H4 = 0x40013830 );
+PROVIDE ( r_h4tl_init = 0x40017878 );
+PROVIDE ( r_h4tl_start = 0x40017924 );
+PROVIDE ( r_h4tl_stop = 0x40017934 );
+PROVIDE ( r_h4tl_write = 0x400178d0 );
+PROVIDE ( r_H5 = 0x400138dc );
+PROVIDE ( r_hashConcat = 0x40013a38 );
+PROVIDE ( r_hci_acl_tx_data_alloc = 0x4001951c );
+PROVIDE ( r_hci_acl_tx_data_received = 0x40019654 );
+PROVIDE ( r_hci_bt_acl_bdaddr_register = 0x40018900 );
+PROVIDE ( r_hci_bt_acl_bdaddr_unregister = 0x400189ac );
+PROVIDE ( r_hci_bt_acl_conhdl_register = 0x4001895c );
+PROVIDE ( r_hci_cmd_get_max_param_size = 0x400192d0 );
+PROVIDE ( r_hci_cmd_received = 0x400192f8 );
+PROVIDE ( r_hci_evt_filter_add = 0x40018a64 );
+PROVIDE ( r_hci_evt_mask_set = 0x400189e4 );
+PROVIDE ( r_hci_fc_acl_buf_size_set = 0x40017988 );
+PROVIDE ( r_hci_fc_acl_en = 0x400179d8 );
+PROVIDE ( r_hci_fc_acl_packet_sent = 0x40017a3c );
+PROVIDE ( r_hci_fc_check_host_available_nb_acl_packets = 0x40017aa4 );
+PROVIDE ( r_hci_fc_check_host_available_nb_sync_packets = 0x40017ac8 );
+PROVIDE ( r_hci_fc_host_nb_acl_pkts_complete = 0x40017a6c );
+PROVIDE ( r_hci_fc_host_nb_sync_pkts_complete = 0x40017a88 );
+PROVIDE ( r_hci_fc_init = 0x40017974 );
+PROVIDE ( r_hci_fc_sync_buf_size_set = 0x400179b0 );
+PROVIDE ( r_hci_fc_sync_en = 0x40017a30 );
+PROVIDE ( r_hci_fc_sync_packet_sent = 0x40017a54 );
+PROVIDE ( r_hci_init = 0x40018538 );
+PROVIDE ( r_hci_look_for_cmd_desc = 0x40018454 );
+PROVIDE ( r_hci_look_for_dbg_evt_desc = 0x400184c4 );
+PROVIDE ( r_hci_look_for_evt_desc = 0x400184a0 );
+PROVIDE ( r_hci_look_for_le_evt_desc = 0x400184e0 );
+PROVIDE ( r_hci_reset = 0x4001856c );
+PROVIDE ( r_hci_send_2_host = 0x400185bc );
+PROVIDE ( r_hci_sync_tx_data_alloc = 0x40019754 );
+PROVIDE ( r_hci_sync_tx_data_received = 0x400197c0 );
+PROVIDE ( r_hci_tl_init = 0x40019290 );
+PROVIDE ( r_hci_tl_send = 0x40019228 );
+PROVIDE ( r_hci_util_pack = 0x40019874 );
+PROVIDE ( r_hci_util_unpack = 0x40019998 );
+PROVIDE ( r_hci_voice_settings_get = 0x40018bdc );
+PROVIDE ( r_hci_voice_settings_set = 0x40018be8 );
+PROVIDE ( r_HMAC = 0x40013968 );
+PROVIDE ( r_import_rf_phy_func = 0x3ffb8354 );
+PROVIDE ( r_import_rf_phy_func_p = 0x3ffafd64 );
+PROVIDE ( r_ip_funcs = 0x3ffae710 );
+PROVIDE ( r_ip_funcs_p = 0x3ffae70c );
+PROVIDE ( r_ke_check_malloc = 0x40019de0 );
+PROVIDE ( r_ke_event_callback_set = 0x40019ba8 );
+PROVIDE ( r_ke_event_clear = 0x40019c2c );
+PROVIDE ( r_ke_event_flush = 0x40019ccc );
+PROVIDE ( r_ke_event_get = 0x40019c78 );
+PROVIDE ( r_ke_event_get_all = 0x40019cc0 );
+PROVIDE ( r_ke_event_init = 0x40019b90 );
+PROVIDE ( r_ke_event_schedule = 0x40019cdc );
+PROVIDE ( r_ke_event_set = 0x40019be0 );
+PROVIDE ( r_ke_flush = 0x4001a374 );
+PROVIDE ( r_ke_free = 0x4001a014 );
+PROVIDE ( r_ke_get_max_mem_usage = 0x4001a1c8 );
+PROVIDE ( r_ke_get_mem_usage = 0x4001a1a0 );
+PROVIDE ( r_ke_init = 0x4001a318 );
+PROVIDE ( r_ke_is_free = 0x4001a184 );
+PROVIDE ( r_ke_malloc = 0x40019eb4 );
+PROVIDE ( r_ke_mem_init = 0x40019d3c );
+PROVIDE ( r_ke_mem_is_empty = 0x40019d8c );
+PROVIDE ( r_ke_msg_alloc = 0x4001a1e0 );
+PROVIDE ( r_ke_msg_dest_id_get = 0x4001a2e0 );
+PROVIDE ( r_ke_msg_discard = 0x4001a850 );
+PROVIDE ( r_ke_msg_forward = 0x4001a290 );
+PROVIDE ( r_ke_msg_forward_new_id = 0x4001a2ac );
+PROVIDE ( r_ke_msg_free = 0x4001a2cc );
+PROVIDE ( r_ke_msg_in_queue = 0x4001a2f8 );
+PROVIDE ( r_ke_msg_save = 0x4001a858 );
+PROVIDE ( r_ke_msg_send = 0x4001a234 );
+PROVIDE ( r_ke_msg_send_basic = 0x4001a26c );
+PROVIDE ( r_ke_msg_src_id_get = 0x4001a2ec );
+PROVIDE ( r_ke_queue_extract = 0x40055fd0 );
+PROVIDE ( r_ke_queue_insert = 0x40056020 );
+PROVIDE ( r_ke_sleep_check = 0x4001a3d8 );
+PROVIDE ( r_ke_state_get = 0x4001a7d8 );
+PROVIDE ( r_ke_state_set = 0x4001a6fc );
+PROVIDE ( r_ke_stats_get = 0x4001a3f0 );
+PROVIDE ( r_ke_task_check = 0x4001a8a4 );
+PROVIDE ( r_ke_task_create = 0x4001a674 );
+PROVIDE ( r_ke_task_delete = 0x4001a6c0 );
+PROVIDE ( r_ke_task_init = 0x4001a650 );
+PROVIDE ( r_ke_task_msg_flush = 0x4001a860 );
+PROVIDE ( r_ke_timer_active = 0x4001ac08 );
+PROVIDE ( r_ke_timer_adjust_all = 0x4001ac30 );
+PROVIDE ( r_ke_timer_clear = 0x4001ab90 );
+PROVIDE ( r_ke_timer_init = 0x4001aa9c );
+PROVIDE ( r_ke_timer_set = 0x4001aac0 );
+PROVIDE ( r_ke_timer_sleep_check = 0x4001ac50 );
+PROVIDE ( r_KPrimC = 0x40010ad4 );
+PROVIDE ( r_lb_clk_adj_activate = 0x4001ae70 );
+PROVIDE ( r_lb_clk_adj_id_get = 0x4001af14 );
+PROVIDE ( r_lb_clk_adj_period_update = 0x4001af20 );
+PROVIDE ( r_lb_init = 0x4001acd4 );
+PROVIDE ( r_lb_mst_key = 0x4001afc0 );
+PROVIDE ( r_lb_mst_key_cmp = 0x4001af74 );
+PROVIDE ( r_lb_mst_key_restart_enc = 0x4001b0d4 );
+PROVIDE ( r_lb_mst_start_act_bcst_enc = 0x4001b198 );
+PROVIDE ( r_lb_mst_stop_act_bcst_enc = 0x4001b24c );
+PROVIDE ( r_lb_reset = 0x4001ad38 );
+PROVIDE ( r_lb_send_lmp = 0x4001adbc );
+PROVIDE ( r_lb_send_pdu_clk_adj = 0x4001af3c );
+PROVIDE ( r_lb_util_get_csb_mode = 0x4001ada4 );
+PROVIDE ( r_lb_util_get_nb_broadcast = 0x4001ad80 );
+PROVIDE ( r_lb_util_get_res_lt_addr = 0x4001ad98 );
+PROVIDE ( r_lb_util_set_nb_broadcast = 0x4001ad8c );
+PROVIDE ( r_lc_afh_set = 0x4001cc74 );
+PROVIDE ( r_lc_afh_start = 0x4001d240 );
+PROVIDE ( r_lc_auth_cmp = 0x4001cd54 );
+PROVIDE ( r_lc_calc_link_key = 0x4001ce7c );
+PROVIDE ( r_lc_chg_pkt_type_cmp = 0x4001d038 );
+PROVIDE ( r_lc_chg_pkt_type_cont = 0x4001cfbc );
+PROVIDE ( r_lc_chg_pkt_type_retry = 0x4001d0ac );
+PROVIDE ( r_lc_chk_to = 0x4001d2a8 );
+PROVIDE ( r_lc_cmd_stat_send = 0x4001c914 );
+PROVIDE ( r_lc_comb_key_svr = 0x4001d30c );
+PROVIDE ( r_lc_con_cmp = 0x4001d44c );
+PROVIDE ( r_lc_con_cmp_evt_send = 0x4001d4fc );
+PROVIDE ( r_lc_conn_seq_done = 0x40021334 );
+PROVIDE ( r_lc_detach = 0x4002037c );
+PROVIDE ( r_lc_dhkey = 0x4001d564 );
+PROVIDE ( r_lc_enc_cmp = 0x4001d8bc );
+PROVIDE ( r_lc_enc_key_refresh = 0x4001d720 );
+PROVIDE ( r_lc_end_chk_colli = 0x4001d858 );
+PROVIDE ( r_lc_end_of_sniff_nego = 0x4001d9a4 );
+PROVIDE ( r_lc_enter_sniff_mode = 0x4001ddb8 );
+PROVIDE ( r_lc_epr_change_lk = 0x4001db38 );
+PROVIDE ( r_lc_epr_cmp = 0x4001da88 );
+PROVIDE ( r_lc_epr_resp = 0x4001e0b4 );
+PROVIDE ( r_lc_epr_rsw_cmp = 0x4001dd40 );
+PROVIDE ( r_lc_ext_feat = 0x40020d6c );
+PROVIDE ( r_lc_feat = 0x40020984 );
+PROVIDE ( r_lc_hl_connect = 0x400209e8 );
+PROVIDE ( r_lc_init = 0x4001c948 );
+PROVIDE ( r_lc_init_calc_f3 = 0x4001deb0 );
+PROVIDE ( r_lc_initiator_epr = 0x4001e064 );
+PROVIDE ( r_lc_init_passkey_loop = 0x4001dfc0 );
+PROVIDE ( r_lc_init_start_mutual_auth = 0x4001df60 );
+PROVIDE ( r_lc_key_exch_end = 0x4001e140 );
+PROVIDE ( r_lc_legacy_pair = 0x4001e1c0 );
+PROVIDE ( r_lc_local_switch = 0x4001e22c );
+PROVIDE ( r_lc_local_trans_mode = 0x4001e2e4 );
+PROVIDE ( r_lc_local_untrans_mode = 0x4001e3a0 );
+PROVIDE ( r_lc_loc_auth = 0x40020ecc );
+PROVIDE ( r_lc_locepr_lkref = 0x4001d648 );
+PROVIDE ( r_lc_locepr_rsw = 0x4001d5d0 );
+PROVIDE ( r_lc_loc_sniff = 0x40020a6c );
+PROVIDE ( r_lc_max_slot_mgt = 0x4001e410 );
+PROVIDE ( r_lc_mst_key = 0x4001e7c0 );
+PROVIDE ( r_lc_mst_qos_done = 0x4001ea80 );
+PROVIDE ( r_lc_mst_send_mst_key = 0x4001e8f4 );
+PROVIDE ( r_lc_mutual_auth_end = 0x4001e670 );
+PROVIDE ( r_lc_mutual_auth_end2 = 0x4001e4f4 );
+PROVIDE ( r_lc_packet_type = 0x40021038 );
+PROVIDE ( r_lc_pair = 0x40020ddc );
+PROVIDE ( r_lc_pairing_cont = 0x4001eafc );
+PROVIDE ( r_lc_passkey_comm = 0x4001ed20 );
+PROVIDE ( r_lc_prepare_all_links_for_clk_adj = 0x40021430 );
+PROVIDE ( r_lc_proc_rcv_dhkey = 0x4001edec );
+PROVIDE ( r_lc_ptt = 0x4001ee2c );
+PROVIDE ( r_lc_ptt_cmp = 0x4001eeec );
+PROVIDE ( r_lc_qos_setup = 0x4001ef50 );
+PROVIDE ( r_lc_rd_rem_name = 0x4001efd0 );
+PROVIDE ( r_lc_release = 0x4001f8a8 );
+PROVIDE ( r_lc_rem_enc = 0x4001f124 );
+PROVIDE ( r_lc_rem_name_cont = 0x4001f290 );
+PROVIDE ( r_lc_rem_nego_trans_mode = 0x4001f1b4 );
+PROVIDE ( r_lc_rem_sniff = 0x40020ca4 );
+PROVIDE ( r_lc_rem_sniff_sub_rate = 0x40020b10 );
+PROVIDE ( r_lc_rem_switch = 0x4001f070 );
+PROVIDE ( r_lc_rem_trans_mode = 0x4001f314 );
+PROVIDE ( r_lc_rem_unsniff = 0x400207a0 );
+PROVIDE ( r_lc_rem_untrans_mode = 0x4001f36c );
+PROVIDE ( r_lc_reset = 0x4001c99c );
+PROVIDE ( r_lc_resp_auth = 0x4001f518 );
+PROVIDE ( r_lc_resp_calc_f3 = 0x4001f710 );
+PROVIDE ( r_lc_resp_num_comp = 0x40020074 );
+PROVIDE ( r_lc_resp_oob_nonce = 0x4001f694 );
+PROVIDE ( r_lc_resp_oob_wait_nonce = 0x4001f66c );
+PROVIDE ( r_lc_resp_pair = 0x400208a4 );
+PROVIDE ( r_lc_resp_sec_auth = 0x4001f4a0 );
+PROVIDE ( r_lc_resp_wait_dhkey_cont = 0x4001f86c );
+PROVIDE ( r_lc_restart_enc = 0x4001f8ec );
+PROVIDE ( r_lc_restart_enc_cont = 0x4001f940 );
+PROVIDE ( r_lc_restore_afh_reporting = 0x4001f028 );
+PROVIDE ( r_lc_restore_to = 0x4001f9e0 );
+PROVIDE ( r_lc_ret_sniff_max_slot_chg = 0x4001fa30 );
+PROVIDE ( r_lc_rsw_clean_up = 0x4001dc70 );
+PROVIDE ( r_lc_rsw_done = 0x4001db94 );
+PROVIDE ( r_lc_sco_baseband_ack = 0x40022b00 );
+PROVIDE ( r_lc_sco_detach = 0x40021e40 );
+PROVIDE ( r_lc_sco_host_accept = 0x40022118 );
+PROVIDE ( r_lc_sco_host_reject = 0x400222b8 );
+PROVIDE ( r_lc_sco_host_request = 0x40021f4c );
+PROVIDE ( r_lc_sco_host_request_disc = 0x4002235c );
+PROVIDE ( r_lc_sco_init = 0x40021dc8 );
+PROVIDE ( r_lc_sco_peer_accept = 0x40022780 );
+PROVIDE ( r_lc_sco_peer_accept_disc = 0x40022a08 );
+PROVIDE ( r_lc_sco_peer_reject = 0x40022824 );
+PROVIDE ( r_lc_sco_peer_reject_disc = 0x40022a8c );
+PROVIDE ( r_lc_sco_peer_request = 0x4002240c );
+PROVIDE ( r_lc_sco_peer_request_disc = 0x400228ec );
+PROVIDE ( r_lc_sco_release = 0x40021eec );
+PROVIDE ( r_lc_sco_reset = 0x40021dfc );
+PROVIDE ( r_lc_sco_timeout = 0x40022bd4 );
+PROVIDE ( r_lc_sec_auth_compute_sres = 0x4001f3ec );
+PROVIDE ( r_lc_semi_key_cmp = 0x40020294 );
+PROVIDE ( r_lc_send_enc_chg_evt = 0x4002134c );
+PROVIDE ( r_lc_send_enc_mode = 0x40020220 );
+PROVIDE ( r_lc_send_lmp = 0x4001c1a8 );
+PROVIDE ( r_lc_send_pdu_acc = 0x4001c21c );
+PROVIDE ( r_lc_send_pdu_acc_ext4 = 0x4001c240 );
+PROVIDE ( r_lc_send_pdu_au_rand = 0x4001c308 );
+PROVIDE ( r_lc_send_pdu_auto_rate = 0x4001c5d0 );
+PROVIDE ( r_lc_send_pdu_clk_adj_ack = 0x4001c46c );
+PROVIDE ( r_lc_send_pdu_clk_adj_req = 0x4001c494 );
+PROVIDE ( r_lc_send_pdu_comb_key = 0x4001c368 );
+PROVIDE ( r_lc_send_pdu_dhkey_chk = 0x4001c8e8 );
+PROVIDE ( r_lc_send_pdu_encaps_head = 0x4001c440 );
+PROVIDE ( r_lc_send_pdu_encaps_payl = 0x4001c410 );
+PROVIDE ( r_lc_send_pdu_enc_key_sz_req = 0x4001c670 );
+PROVIDE ( r_lc_send_pdu_esco_lk_rem_req = 0x4001c5a8 );
+PROVIDE ( r_lc_send_pdu_feats_ext_req = 0x4001c6ec );
+PROVIDE ( r_lc_send_pdu_feats_res = 0x4001c694 );
+PROVIDE ( r_lc_send_pdu_in_rand = 0x4001c338 );
+PROVIDE ( r_lc_send_pdu_io_cap_res = 0x4001c72c );
+PROVIDE ( r_lc_send_pdu_lsto = 0x4001c64c );
+PROVIDE ( r_lc_send_pdu_max_slot = 0x4001c3c8 );
+PROVIDE ( r_lc_send_pdu_max_slot_req = 0x4001c3ec );
+PROVIDE ( r_lc_send_pdu_not_acc = 0x4001c26c );
+PROVIDE ( r_lc_send_pdu_not_acc_ext4 = 0x4001c294 );
+PROVIDE ( r_lc_send_pdu_num_comp_fail = 0x4001c770 );
+PROVIDE ( r_lc_send_pdu_pause_enc_aes_req = 0x4001c794 );
+PROVIDE ( r_lc_send_pdu_paus_enc_req = 0x4001c7c0 );
+PROVIDE ( r_lc_send_pdu_ptt_req = 0x4001c4c0 );
+PROVIDE ( r_lc_send_pdu_qos_req = 0x4001c82c );
+PROVIDE ( r_lc_send_pdu_resu_enc_req = 0x4001c7e4 );
+PROVIDE ( r_lc_send_pdu_sco_lk_rem_req = 0x4001c580 );
+PROVIDE ( r_lc_send_pdu_set_afh = 0x4001c2c8 );
+PROVIDE ( r_lc_send_pdu_setup_cmp = 0x4001c808 );
+PROVIDE ( r_lc_send_pdu_slot_off = 0x4001c854 );
+PROVIDE ( r_lc_send_pdu_sniff_req = 0x4001c5f0 );
+PROVIDE ( r_lc_send_pdu_sp_cfm = 0x4001c518 );
+PROVIDE ( r_lc_send_pdu_sp_nb = 0x4001c4e8 );
+PROVIDE ( r_lc_send_pdu_sres = 0x4001c548 );
+PROVIDE ( r_lc_send_pdu_tim_acc = 0x4001c6cc );
+PROVIDE ( r_lc_send_pdu_unit_key = 0x4001c398 );
+PROVIDE ( r_lc_send_pdu_unsniff_req = 0x4001c894 );
+PROVIDE ( r_lc_send_pdu_vers_req = 0x4001c8b4 );
+PROVIDE ( r_lc_skip_hl_oob_req = 0x400201bc );
+PROVIDE ( r_lc_sniff_init = 0x40022cac );
+PROVIDE ( r_lc_sniff_max_slot_chg = 0x40020590 );
+PROVIDE ( r_lc_sniff_reset = 0x40022cc8 );
+PROVIDE ( r_lc_sniff_slot_unchange = 0x40021100 );
+PROVIDE ( r_lc_sniff_sub_mode = 0x400204fc );
+PROVIDE ( r_lc_sp_end = 0x400213a8 );
+PROVIDE ( r_lc_sp_fail = 0x40020470 );
+PROVIDE ( r_lc_sp_oob_tid_fail = 0x400204cc );
+PROVIDE ( r_lc_ssr_nego = 0x4002125c );
+PROVIDE ( r_lc_start = 0x4001ca28 );
+PROVIDE ( r_lc_start_enc = 0x4001fb28 );
+PROVIDE ( r_lc_start_enc_key_size = 0x4001fd9c );
+PROVIDE ( r_lc_start_key_exch = 0x4001fe10 );
+PROVIDE ( r_lc_start_lmp_to = 0x4001fae8 );
+PROVIDE ( r_lc_start_oob = 0x4001fffc );
+PROVIDE ( r_lc_start_passkey = 0x4001feac );
+PROVIDE ( r_lc_start_passkey_loop = 0x4001ff88 );
+PROVIDE ( r_lc_stop_afh_report = 0x40020184 );
+PROVIDE ( r_lc_stop_enc = 0x40020110 );
+PROVIDE ( r_lc_switch_cmp = 0x40020448 );
+PROVIDE ( r_lc_unit_key_svr = 0x400206d8 );
+PROVIDE ( r_lc_unsniff = 0x40020c50 );
+PROVIDE ( r_lc_unsniff_cmp = 0x40020810 );
+PROVIDE ( r_lc_unsniff_cont = 0x40020750 );
+PROVIDE ( r_lc_upd_to = 0x4002065c );
+PROVIDE ( r_lc_util_convert_pref_rate_to_packet_type = 0x4002f9b0 );
+PROVIDE ( r_lc_util_get_max_packet_size = 0x4002f4ac );
+PROVIDE ( r_lc_util_get_offset_clke = 0x4002f538 );
+PROVIDE ( r_lc_util_get_offset_clkn = 0x4002f51c );
+PROVIDE ( r_lc_util_set_loc_trans_coll = 0x4002f500 );
+PROVIDE ( r_lc_version = 0x40020a30 );
+PROVIDE ( r_ld_acl_active_hop_types_get = 0x40036e10 );
+PROVIDE ( r_ld_acl_afh_confirm = 0x40036d40 );
+PROVIDE ( r_ld_acl_afh_prepare = 0x40036c84 );
+PROVIDE ( r_ld_acl_afh_set = 0x40036b60 );
+PROVIDE ( r_ld_acl_allowed_tx_packet_types_set = 0x40036810 );
+PROVIDE ( r_ld_acl_bcst_rx_dec = 0x40036394 );
+PROVIDE ( r_ld_acl_bit_off_get = 0x40036b18 );
+PROVIDE ( r_ld_acl_clk_adj_set = 0x40036a00 );
+PROVIDE ( r_ld_acl_clk_off_get = 0x40036b00 );
+PROVIDE ( r_ld_acl_clk_set = 0x40036950 );
+PROVIDE ( r_ld_acl_clock_offset_get = 0x400364c0 );
+PROVIDE ( r_ld_acl_current_tx_power_get = 0x400368f0 );
+PROVIDE ( r_ld_acl_data_flush = 0x400357bc );
+PROVIDE ( r_ld_acl_data_tx = 0x4003544c );
+PROVIDE ( r_ld_acl_edr_set = 0x4003678c );
+PROVIDE ( r_ld_acl_enc_key_load = 0x40036404 );
+PROVIDE ( r_ld_acl_flow_off = 0x40035400 );
+PROVIDE ( r_ld_acl_flow_on = 0x4003541c );
+PROVIDE ( r_ld_acl_flush_timeout_get = 0x40035f9c );
+PROVIDE ( r_ld_acl_flush_timeout_set = 0x40035fe0 );
+PROVIDE ( r_ld_acl_init = 0x40034d08 );
+PROVIDE ( r_ld_acl_lmp_flush = 0x40035d80 );
+PROVIDE ( r_ld_acl_lmp_tx = 0x40035b34 );
+PROVIDE ( r_ld_acl_lsto_get = 0x400366b4 );
+PROVIDE ( r_ld_acl_lsto_set = 0x400366f8 );
+PROVIDE ( r_ld_acl_reset = 0x40034d24 );
+PROVIDE ( r_ld_acl_role_get = 0x40036b30 );
+PROVIDE ( r_ld_acl_rssi_delta_get = 0x40037028 );
+PROVIDE ( r_ld_acl_rsw_req = 0x40035e74 );
+PROVIDE ( r_ld_acl_rx_enc = 0x40036344 );
+PROVIDE ( r_ld_acl_rx_max_slot_get = 0x40036e58 );
+PROVIDE ( r_ld_acl_rx_max_slot_set = 0x40036ea0 );
+PROVIDE ( r_ld_acl_slot_offset_get = 0x4003653c );
+PROVIDE ( r_ld_acl_slot_offset_set = 0x40036658 );
+PROVIDE ( r_ld_acl_sniff = 0x4003617c );
+PROVIDE ( r_ld_acl_sniff_trans = 0x400360a8 );
+PROVIDE ( r_ld_acl_ssr_set = 0x40036274 );
+PROVIDE ( r_ld_acl_start = 0x40034ddc );
+PROVIDE ( r_ld_acl_stop = 0x4003532c );
+PROVIDE ( r_ld_acl_test_mode_set = 0x40036f24 );
+PROVIDE ( r_ld_acl_timing_accuracy_set = 0x4003673c );
+PROVIDE ( r_ld_acl_t_poll_get = 0x40036024 );
+PROVIDE ( r_ld_acl_t_poll_set = 0x40036068 );
+PROVIDE ( r_ld_acl_tx_enc = 0x400362f8 );
+PROVIDE ( r_ld_acl_unsniff = 0x400361e0 );
+PROVIDE ( r_ld_active_check = 0x4003cac4 );
+PROVIDE ( r_ld_afh_ch_assess_data_get = 0x4003caec );
+PROVIDE ( r_ld_bcst_acl_data_tx = 0x40038d3c );
+PROVIDE ( r_ld_bcst_acl_init = 0x40038bd0 );
+PROVIDE ( r_ld_bcst_acl_reset = 0x40038bdc );
+PROVIDE ( r_ld_bcst_acl_start = 0x4003882c );
+PROVIDE ( r_ld_bcst_afh_update = 0x40038f3c );
+PROVIDE ( r_ld_bcst_enc_key_load = 0x4003906c );
+PROVIDE ( r_ld_bcst_lmp_tx = 0x40038bf8 );
+PROVIDE ( r_ld_bcst_tx_enc = 0x40038ff8 );
+PROVIDE ( r_ld_bd_addr_get = 0x4003ca20 );
+PROVIDE ( r_ld_channel_assess = 0x4003c184 );
+PROVIDE ( r_ld_class_of_dev_get = 0x4003ca34 );
+PROVIDE ( r_ld_class_of_dev_set = 0x4003ca50 );
+PROVIDE ( r_ld_csb_rx_afh_update = 0x40039af4 );
+PROVIDE ( r_ld_csb_rx_init = 0x40039690 );
+PROVIDE ( r_ld_csb_rx_reset = 0x4003969c );
+PROVIDE ( r_ld_csb_rx_start = 0x4003972c );
+PROVIDE ( r_ld_csb_rx_stop = 0x40039bb8 );
+PROVIDE ( r_ld_csb_tx_afh_update = 0x4003a5fc );
+PROVIDE ( r_ld_csb_tx_clr_data = 0x4003a71c );
+PROVIDE ( r_ld_csb_tx_dis = 0x4003a5e8 );
+PROVIDE ( r_ld_csb_tx_en = 0x4003a1c0 );
+PROVIDE ( r_ld_csb_tx_init = 0x4003a0e8 );
+PROVIDE ( r_ld_csb_tx_reset = 0x4003a0f8 );
+PROVIDE ( r_ld_csb_tx_set_data = 0x4003a6c0 );
+PROVIDE ( r_ld_fm_clk_isr = 0x4003a7a8 );
+PROVIDE ( r_ld_fm_frame_isr = 0x4003a82c );
+PROVIDE ( r_ld_fm_init = 0x4003a760 );
+PROVIDE ( r_ld_fm_prog_check = 0x4003ab28 );
+PROVIDE ( r_ld_fm_prog_disable = 0x4003a984 );
+PROVIDE ( r_ld_fm_prog_enable = 0x4003a944 );
+PROVIDE ( r_ld_fm_prog_push = 0x4003a9d4 );
+PROVIDE ( r_ld_fm_reset = 0x4003a794 );
+PROVIDE ( r_ld_fm_rx_isr = 0x4003a7f4 );
+PROVIDE ( r_ld_fm_sket_isr = 0x4003a8a4 );
+PROVIDE ( r_ld_init = 0x4003c294 );
+PROVIDE ( r_ld_inq_init = 0x4003b15c );
+PROVIDE ( r_ld_inq_reset = 0x4003b168 );
+PROVIDE ( r_ld_inq_start = 0x4003b1f0 );
+PROVIDE ( r_ld_inq_stop = 0x4003b4f0 );
+PROVIDE ( r_ld_iscan_eir_get = 0x4003c118 );
+PROVIDE ( r_ld_iscan_eir_set = 0x4003bfa0 );
+PROVIDE ( r_ld_iscan_init = 0x4003b9f0 );
+PROVIDE ( r_ld_iscan_reset = 0x4003ba14 );
+PROVIDE ( r_ld_iscan_restart = 0x4003ba44 );
+PROVIDE ( r_ld_iscan_start = 0x4003bb28 );
+PROVIDE ( r_ld_iscan_stop = 0x4003bf1c );
+PROVIDE ( r_ld_iscan_tx_pwr_get = 0x4003c138 );
+PROVIDE ( r_ld_page_init = 0x4003d808 );
+PROVIDE ( r_ld_page_reset = 0x4003d814 );
+PROVIDE ( r_ld_page_start = 0x4003d848 );
+PROVIDE ( r_ld_page_stop = 0x4003da54 );
+PROVIDE ( r_ld_pca_coarse_clock_adjust = 0x4003e324 );
+PROVIDE ( r_ld_pca_init = 0x4003deb4 );
+PROVIDE ( r_ld_pca_initiate_clock_dragging = 0x4003e4ac );
+PROVIDE ( r_ld_pca_local_config = 0x4003df6c );
+PROVIDE ( r_ld_pca_mws_frame_sync = 0x4003e104 );
+PROVIDE ( r_ld_pca_mws_moment_offset_gt = 0x4003e278 );
+PROVIDE ( r_ld_pca_mws_moment_offset_lt = 0x4003e280 );
+PROVIDE ( r_ld_pca_reporting_enable = 0x4003e018 );
+PROVIDE ( r_ld_pca_reset = 0x4003df0c );
+PROVIDE ( r_ld_pca_update_target_offset = 0x4003e050 );
+PROVIDE ( r_ld_pscan_evt_handler = 0x4003f238 );
+PROVIDE ( r_ld_pscan_init = 0x4003f474 );
+PROVIDE ( r_ld_pscan_reset = 0x4003f498 );
+PROVIDE ( r_ld_pscan_restart = 0x4003f4b8 );
+PROVIDE ( r_ld_pscan_start = 0x4003f514 );
+PROVIDE ( r_ld_pscan_stop = 0x4003f618 );
+PROVIDE ( r_ld_read_clock = 0x4003c9e4 );
+PROVIDE ( r_ld_reset = 0x4003c714 );
+PROVIDE ( r_ld_sched_acl_add = 0x4003f978 );
+PROVIDE ( r_ld_sched_acl_remove = 0x4003f99c );
+PROVIDE ( r_ld_sched_compute = 0x4003f6f8 );
+PROVIDE ( r_ld_sched_init = 0x4003f7ac );
+PROVIDE ( r_ld_sched_inq_add = 0x4003f8a8 );
+PROVIDE ( r_ld_sched_inq_remove = 0x4003f8d0 );
+PROVIDE ( r_ld_sched_iscan_add = 0x4003f7e8 );
+PROVIDE ( r_ld_sched_iscan_remove = 0x4003f808 );
+PROVIDE ( r_ld_sched_page_add = 0x4003f910 );
+PROVIDE ( r_ld_sched_page_remove = 0x4003f938 );
+PROVIDE ( r_ld_sched_pscan_add = 0x4003f828 );
+PROVIDE ( r_ld_sched_pscan_remove = 0x4003f848 );
+PROVIDE ( r_ld_sched_reset = 0x4003f7d4 );
+PROVIDE ( r_ld_sched_sco_add = 0x4003fa4c );
+PROVIDE ( r_ld_sched_sco_remove = 0x4003fa9c );
+PROVIDE ( r_ld_sched_sniff_add = 0x4003f9c4 );
+PROVIDE ( r_ld_sched_sniff_remove = 0x4003fa0c );
+PROVIDE ( r_ld_sched_sscan_add = 0x4003f868 );
+PROVIDE ( r_ld_sched_sscan_remove = 0x4003f888 );
+PROVIDE ( r_ld_sco_audio_isr = 0x40037cc8 );
+PROVIDE ( r_ld_sco_data_tx = 0x40037ee8 );
+PROVIDE ( r_ld_sco_start = 0x40037110 );
+PROVIDE ( r_ld_sco_stop = 0x40037c40 );
+PROVIDE ( r_ld_sco_update = 0x40037a74 );
+PROVIDE ( r_ld_sscan_activated = 0x4004031c );
+PROVIDE ( r_ld_sscan_init = 0x400402f0 );
+PROVIDE ( r_ld_sscan_reset = 0x400402fc );
+PROVIDE ( r_ld_sscan_start = 0x40040384 );
+PROVIDE ( r_ld_strain_init = 0x400409f4 );
+PROVIDE ( r_ld_strain_reset = 0x40040a00 );
+PROVIDE ( r_ld_strain_start = 0x40040a8c );
+PROVIDE ( r_ld_strain_stop = 0x40040df0 );
+PROVIDE ( r_ld_timing_accuracy_get = 0x4003caac );
+PROVIDE ( r_ld_util_active_master_afh_map_get = 0x4004131c );
+PROVIDE ( r_ld_util_active_master_afh_map_set = 0x40041308 );
+PROVIDE ( r_ld_util_bch_create = 0x40040fcc );
+PROVIDE ( r_ld_util_fhs_pk = 0x400411c8 );
+PROVIDE ( r_ld_util_fhs_unpk = 0x40040e54 );
+PROVIDE ( r_ld_util_stp_pk = 0x400413f4 );
+PROVIDE ( r_ld_util_stp_unpk = 0x40041324 );
+PROVIDE ( r_ld_version_get = 0x4003ca6c );
+PROVIDE ( r_ld_wlcoex_set = 0x4003caf8 );
+PROVIDE ( r_llc_ch_assess_get_current_ch_map = 0x40041574 );
+PROVIDE ( r_llc_ch_assess_get_local_ch_map = 0x4004150c );
+PROVIDE ( r_llc_ch_assess_local = 0x40041494 );
+PROVIDE ( r_llc_ch_assess_merge_ch = 0x40041588 );
+PROVIDE ( r_llc_ch_assess_reass_ch = 0x400415c0 );
+PROVIDE ( r_llc_common_cmd_complete_send = 0x40044eac );
+PROVIDE ( r_llc_common_cmd_status_send = 0x40044ee0 );
+PROVIDE ( r_llc_common_enc_change_evt_send = 0x40044f6c );
+PROVIDE ( r_llc_common_enc_key_ref_comp_evt_send = 0x40044f38 );
+PROVIDE ( r_llc_common_flush_occurred_send = 0x40044f0c );
+PROVIDE ( r_llc_common_nb_of_pkt_comp_evt_send = 0x40045000 );
+PROVIDE ( r_llc_con_update_complete_send = 0x40044d68 );
+PROVIDE ( r_llc_con_update_finished = 0x4004518c );
+PROVIDE ( r_llc_con_update_ind = 0x40045038 );
+PROVIDE ( r_llc_discon_event_complete_send = 0x40044a30 );
+PROVIDE ( r_llc_end_evt_defer = 0x40046330 );
+PROVIDE ( r_llc_feats_rd_event_send = 0x40044e0c );
+PROVIDE ( r_llc_init = 0x40044778 );
+PROVIDE ( r_llc_le_con_cmp_evt_send = 0x40044a78 );
+PROVIDE ( r_llc_llcp_ch_map_update_pdu_send = 0x40043f94 );
+PROVIDE ( r_llc_llcp_con_param_req_pdu_send = 0x400442fc );
+PROVIDE ( r_llc_llcp_con_param_rsp_pdu_send = 0x40044358 );
+PROVIDE ( r_llc_llcp_con_update_pdu_send = 0x400442c4 );
+PROVIDE ( r_llc_llcp_enc_req_pdu_send = 0x40044064 );
+PROVIDE ( r_llc_llcp_enc_rsp_pdu_send = 0x40044160 );
+PROVIDE ( r_llc_llcp_feats_req_pdu_send = 0x400443b4 );
+PROVIDE ( r_llc_llcp_feats_rsp_pdu_send = 0x400443f0 );
+PROVIDE ( r_llc_llcp_get_autorize = 0x4004475c );
+PROVIDE ( r_llc_llcp_length_req_pdu_send = 0x40044574 );
+PROVIDE ( r_llc_llcp_length_rsp_pdu_send = 0x400445ac );
+PROVIDE ( r_llc_llcp_pause_enc_req_pdu_send = 0x40043fd8 );
+PROVIDE ( r_llc_llcp_pause_enc_rsp_pdu_send = 0x40044010 );
+PROVIDE ( r_llc_llcp_ping_req_pdu_send = 0x4004454c );
+PROVIDE ( r_llc_llcp_ping_rsp_pdu_send = 0x40044560 );
+PROVIDE ( r_llc_llcp_recv_handler = 0x40044678 );
+PROVIDE ( r_llc_llcp_reject_ind_pdu_send = 0x4004425c );
+PROVIDE ( r_llc_llcp_start_enc_req_pdu_send = 0x4004441c );
+PROVIDE ( r_llc_llcp_start_enc_rsp_pdu_send = 0x400441f8 );
+PROVIDE ( r_llc_llcp_terminate_ind_pdu_send = 0x400444b0 );
+PROVIDE ( r_llc_llcp_tester_send = 0x400445e4 );
+PROVIDE ( r_llc_llcp_unknown_rsp_send_pdu = 0x40044534 );
+PROVIDE ( r_llc_llcp_version_ind_pdu_send = 0x40043f6c );
+PROVIDE ( r_llc_lsto_con_update = 0x40045098 );
+PROVIDE ( r_llc_ltk_req_send = 0x40044dc0 );
+PROVIDE ( r_llc_map_update_finished = 0x40045260 );
+PROVIDE ( r_llc_map_update_ind = 0x400450f0 );
+PROVIDE ( r_llc_pdu_acl_tx_ack_defer = 0x400464dc );
+PROVIDE ( r_llc_pdu_defer = 0x40046528 );
+PROVIDE ( r_llc_pdu_llcp_tx_ack_defer = 0x400463ac );
+PROVIDE ( r_llc_reset = 0x400447b8 );
+PROVIDE ( r_llc_start = 0x400447f4 );
+PROVIDE ( r_llc_stop = 0x400449ac );
+PROVIDE ( r_llc_util_bw_mgt = 0x4004629c );
+PROVIDE ( r_llc_util_clear_operation_ptr = 0x40046234 );
+PROVIDE ( r_llc_util_dicon_procedure = 0x40046130 );
+PROVIDE ( r_llc_util_get_free_conhdl = 0x400460c8 );
+PROVIDE ( r_llc_util_get_nb_active_link = 0x40046100 );
+PROVIDE ( r_llc_util_set_auth_payl_to_margin = 0x400461f4 );
+PROVIDE ( r_llc_util_set_llcp_discard_enable = 0x400461c8 );
+PROVIDE ( r_llc_util_update_channel_map = 0x400461ac );
+PROVIDE ( r_llc_version_rd_event_send = 0x40044e60 );
+PROVIDE ( r_lld_adv_start = 0x40048b38 );
+PROVIDE ( r_lld_adv_stop = 0x40048ea0 );
+PROVIDE ( r_lld_ch_map_ind = 0x4004a2f4 );
+PROVIDE ( r_lld_con_param_req = 0x40049f0c );
+PROVIDE ( r_lld_con_param_rsp = 0x40049e00 );
+PROVIDE ( r_lld_con_start = 0x400491f8 );
+PROVIDE ( r_lld_con_stop = 0x40049fdc );
+PROVIDE ( r_lld_con_update_after_param_req = 0x40049bcc );
+PROVIDE ( r_lld_con_update_ind = 0x4004a30c );
+PROVIDE ( r_lld_con_update_req = 0x40049b60 );
+PROVIDE ( r_lld_core_reset = 0x40048a9c );
+PROVIDE ( r_lld_crypt_isr = 0x4004a324 );
+PROVIDE ( r_lld_evt_adv_create = 0x400481f4 );
+PROVIDE ( r_lld_evt_canceled = 0x400485c8 );
+PROVIDE ( r_lld_evt_channel_next = 0x40046aac );
+PROVIDE ( r_lld_evt_deffered_elt_handler = 0x400482bc );
+PROVIDE ( r_lld_evt_delete_elt_handler = 0x40046974 );
+PROVIDE ( r_lld_evt_delete_elt_push = 0x40046a3c );
+PROVIDE ( r_lld_evt_drift_compute = 0x40047670 );
+PROVIDE ( r_lld_evt_elt_delete = 0x40047538 );
+PROVIDE ( r_lld_evt_elt_insert = 0x400474c8 );
+PROVIDE ( r_lld_evt_end = 0x400483e8 );
+PROVIDE ( r_lld_evt_end_isr = 0x4004862c );
+PROVIDE ( r_lld_evt_init = 0x40046b3c );
+PROVIDE ( r_lld_evt_init_evt = 0x40046cd0 );
+PROVIDE ( r_lld_evt_move_to_master = 0x40047ba0 );
+PROVIDE ( r_lld_evt_move_to_slave = 0x40047e18 );
+PROVIDE ( r_lld_evt_prevent_stop = 0x40047adc );
+PROVIDE ( r_lld_evt_restart = 0x40046d50 );
+PROVIDE ( r_lld_evt_rx = 0x40048578 );
+PROVIDE ( r_lld_evt_rx_isr = 0x40048678 );
+PROVIDE ( r_lld_evt_scan_create = 0x40047ae8 );
+PROVIDE ( r_lld_evt_schedule = 0x40047908 );
+PROVIDE ( r_lld_evt_schedule_next = 0x400477dc );
+PROVIDE ( r_lld_evt_schedule_next_instant = 0x400476a8 );
+PROVIDE ( r_lld_evt_slave_update = 0x40048138 );
+PROVIDE ( r_lld_evt_update_create = 0x40047cd8 );
+PROVIDE ( r_lld_get_mode = 0x40049ff8 );
+PROVIDE ( r_lld_init = 0x4004873c );
+PROVIDE ( r_lld_move_to_master = 0x400499e0 );
+PROVIDE ( r_lld_move_to_slave = 0x4004a024 );
+PROVIDE ( r_lld_pdu_adv_pack = 0x4004b488 );
+PROVIDE ( r_lld_pdu_check = 0x4004ac34 );
+PROVIDE ( r_lld_pdu_data_send = 0x4004b018 );
+PROVIDE ( r_lld_pdu_data_tx_push = 0x4004aecc );
+PROVIDE ( r_lld_pdu_rx_handler = 0x4004b4d4 );
+PROVIDE ( r_lld_pdu_send_packet = 0x4004b774 );
+PROVIDE ( r_lld_pdu_tx_flush = 0x4004b414 );
+PROVIDE ( r_lld_pdu_tx_loop = 0x4004ae40 );
+PROVIDE ( r_lld_pdu_tx_prog = 0x4004b120 );
+PROVIDE ( r_lld_pdu_tx_push = 0x4004b080 );
+PROVIDE ( r_lld_ral_renew_req = 0x4004a73c );
+/****************************************************************************
+ * configs/elf32-core/scripts/esp32_rom.ld
+ ****************************************************************************/
+
+PROVIDE ( r_lld_scan_start = 0x40048ee0 );
+PROVIDE ( r_lld_scan_stop = 0x40049190 );
+PROVIDE ( r_lld_test_mode_rx = 0x4004a540 );
+PROVIDE ( r_lld_test_mode_tx = 0x4004a350 );
+PROVIDE ( r_lld_test_stop = 0x4004a710 );
+PROVIDE ( r_lld_util_anchor_point_move = 0x4004bacc );
+PROVIDE ( r_lld_util_compute_ce_max = 0x4004bc0c );
+PROVIDE ( r_lld_util_connection_param_set = 0x4004ba40 );
+PROVIDE ( r_lld_util_dle_set_cs_fields = 0x4004ba90 );
+PROVIDE ( r_lld_util_eff_tx_time_set = 0x4004bd88 );
+PROVIDE ( r_lld_util_elt_programmed = 0x4004bce0 );
+PROVIDE ( r_lld_util_flush_list = 0x4004bbd8 );
+PROVIDE ( r_lld_util_freq2chnl = 0x4004b9e4 );
+PROVIDE ( r_lld_util_get_bd_address = 0x4004b8ac );
+PROVIDE ( r_lld_util_get_local_offset = 0x4004ba10 );
+PROVIDE ( r_lld_util_get_peer_offset = 0x4004ba24 );
+PROVIDE ( r_lld_util_get_tx_pkt_cnt = 0x4004bd80 );
+PROVIDE ( r_lld_util_instant_get = 0x4004b890 );
+PROVIDE ( r_lld_util_instant_ongoing = 0x4004bbfc );
+PROVIDE ( r_lld_util_priority_set = 0x4004bd10 );
+PROVIDE ( r_lld_util_priority_update = 0x4004bd78 );
+PROVIDE ( r_lld_util_ral_force_rpa_renew = 0x4004b980 );
+PROVIDE ( r_lld_util_set_bd_address = 0x4004b8f8 );
+PROVIDE ( r_lld_wlcoex_set = 0x4004bd98 );
+PROVIDE ( r_llm_ble_ready = 0x4004cc34 );
+PROVIDE ( r_llm_common_cmd_complete_send = 0x4004d288 );
+PROVIDE ( r_llm_common_cmd_status_send = 0x4004d2b4 );
+PROVIDE ( r_llm_con_req_ind = 0x4004cc54 );
+PROVIDE ( r_llm_con_req_tx_cfm = 0x4004d158 );
+PROVIDE ( r_llm_create_con = 0x4004de78 );
+PROVIDE ( r_llm_encryption_done = 0x4004dff8 );
+PROVIDE ( r_llm_encryption_start = 0x4004e128 );
+PROVIDE ( r_llm_end_evt_defer = 0x4004eb6c );
+PROVIDE ( r_llm_init = 0x4004c9f8 );
+PROVIDE ( r_llm_le_adv_report_ind = 0x4004cdf4 );
+PROVIDE ( r_llm_pdu_defer = 0x4004ec48 );
+PROVIDE ( r_llm_ral_clear = 0x4004e1fc );
+PROVIDE ( r_llm_ral_dev_add = 0x4004e23c );
+PROVIDE ( r_llm_ral_dev_rm = 0x4004e3bc );
+PROVIDE ( r_llm_ral_get_rpa = 0x4004e400 );
+PROVIDE ( r_llm_ral_set_timeout = 0x4004e4a0 );
+PROVIDE ( r_llm_ral_update = 0x4004e4f8 );
+PROVIDE ( r_llm_set_adv_data = 0x4004d960 );
+PROVIDE ( r_llm_set_adv_en = 0x4004d7ec );
+PROVIDE ( r_llm_set_adv_param = 0x4004d5f4 );
+PROVIDE ( r_llm_set_scan_en = 0x4004db64 );
+PROVIDE ( r_llm_set_scan_param = 0x4004dac8 );
+PROVIDE ( r_llm_set_scan_rsp_data = 0x4004da14 );
+PROVIDE ( r_llm_test_mode_start_rx = 0x4004d534 );
+PROVIDE ( r_llm_test_mode_start_tx = 0x4004d2fc );
+PROVIDE ( r_llm_util_adv_data_update = 0x4004e8fc );
+PROVIDE ( r_llm_util_apply_bd_addr = 0x4004e868 );
+PROVIDE ( r_llm_util_bd_addr_in_ral = 0x4004eb08 );
+PROVIDE ( r_llm_util_bd_addr_in_wl = 0x4004e788 );
+PROVIDE ( r_llm_util_bd_addr_wl_position = 0x4004e720 );
+PROVIDE ( r_llm_util_bl_add = 0x4004e9ac );
+PROVIDE ( r_llm_util_bl_check = 0x4004e930 );
+PROVIDE ( r_llm_util_bl_rem = 0x4004ea70 );
+PROVIDE ( r_llm_util_check_address_validity = 0x4004e7e4 );
+PROVIDE ( r_llm_util_check_evt_mask = 0x4004e8b0 );
+PROVIDE ( r_llm_util_check_map_validity = 0x4004e800 );
+PROVIDE ( r_llm_util_get_channel_map = 0x4004e8d4 );
+PROVIDE ( r_llm_util_get_supp_features = 0x4004e8e8 );
+PROVIDE ( r_llm_util_set_public_addr = 0x4004e89c );
+PROVIDE ( r_llm_wl_clr = 0x4004dc54 );
+PROVIDE ( r_llm_wl_dev_add = 0x4004dcc0 );
+PROVIDE ( r_llm_wl_dev_add_hdl = 0x4004dd38 );
+PROVIDE ( r_llm_wl_dev_rem = 0x4004dcfc );
+PROVIDE ( r_llm_wl_dev_rem_hdl = 0x4004dde0 );
+PROVIDE ( r_lm_acl_disc = 0x4004f148 );
+PROVIDE ( r_LM_AddSniff = 0x40022d20 );
+PROVIDE ( r_lm_add_sync = 0x40051358 );
+PROVIDE ( r_lm_afh_activate_timer = 0x4004f444 );
+PROVIDE ( r_lm_afh_ch_ass_en_get = 0x4004f3f8 );
+PROVIDE ( r_lm_afh_host_ch_class_get = 0x4004f410 );
+PROVIDE ( r_lm_afh_master_ch_map_get = 0x4004f43c );
+PROVIDE ( r_lm_afh_peer_ch_class_set = 0x4004f418 );
+PROVIDE ( r_lm_check_active_sync = 0x40051334 );
+PROVIDE ( r_LM_CheckEdrFeatureRequest = 0x4002f90c );
+PROVIDE ( r_LM_CheckSwitchInstant = 0x4002f8c0 );
+PROVIDE ( r_lm_check_sync_hl_rsp = 0x4005169c );
+PROVIDE ( r_lm_clk_adj_ack_pending_clear = 0x4004f514 );
+PROVIDE ( r_lm_clk_adj_instant_pending_set = 0x4004f4d8 );
+PROVIDE ( r_LM_ComputePacketType = 0x4002f554 );
+PROVIDE ( r_LM_ComputeSniffSubRate = 0x400233ac );
+PROVIDE ( r_lm_debug_key_compare_192 = 0x4004f3a8 );
+PROVIDE ( r_lm_debug_key_compare_256 = 0x4004f3d0 );
+PROVIDE ( r_lm_dhkey_calc_init = 0x40013234 );
+PROVIDE ( r_lm_dhkey_compare = 0x400132d8 );
+PROVIDE ( r_lm_dut_mode_en_get = 0x4004f3ec );
+PROVIDE ( r_LM_ExtractMaxEncKeySize = 0x4001aca4 );
+PROVIDE ( r_lm_f1 = 0x40012bb8 );
+PROVIDE ( r_lm_f2 = 0x40012cfc );
+PROVIDE ( r_lm_f3 = 0x40013050 );
+PROVIDE ( r_lm_g = 0x40012f90 );
+PROVIDE ( r_LM_GetAFHSwitchInstant = 0x4002f86c );
+PROVIDE ( r_lm_get_auth_en = 0x4004f1ac );
+PROVIDE ( r_lm_get_common_pkt_types = 0x4002fa1c );
+PROVIDE ( r_LM_GetConnectionAcceptTimeout = 0x4004f1f4 );
+PROVIDE ( r_LM_GetFeature = 0x4002f924 );
+PROVIDE ( r_LM_GetLinkTimeout = 0x400233ec );
+PROVIDE ( r_LM_GetLocalNameSeg = 0x4004f200 );
+PROVIDE ( r_lm_get_loopback_mode = 0x4004f248 );
+PROVIDE ( r_LM_GetMasterEncKeySize = 0x4001b29c );
+PROVIDE ( r_LM_GetMasterEncRand = 0x4001b288 );
+PROVIDE ( r_LM_GetMasterKey = 0x4001b260 );
+PROVIDE ( r_LM_GetMasterKeyRand = 0x4001b274 );
+PROVIDE ( r_lm_get_min_sync_intv = 0x400517a8 );
+PROVIDE ( r_lm_get_nb_acl = 0x4004ef9c );
+PROVIDE ( r_lm_get_nb_sync_link = 0x4005179c );
+PROVIDE ( r_lm_get_nonce = 0x400131c4 );
+PROVIDE ( r_lm_get_oob_local_commit = 0x4004f374 );
+PROVIDE ( r_lm_get_oob_local_data_192 = 0x4004f2d4 );
+PROVIDE ( r_lm_get_oob_local_data_256 = 0x4004f318 );
+PROVIDE ( r_LM_GetPINType = 0x4004f1e8 );
+PROVIDE ( r_lm_get_priv_key_192 = 0x4004f278 );
+PROVIDE ( r_lm_get_priv_key_256 = 0x4004f2b8 );
+PROVIDE ( r_lm_get_pub_key_192 = 0x4004f258 );
+PROVIDE ( r_lm_get_pub_key_256 = 0x4004f298 );
+PROVIDE ( r_LM_GetQoSParam = 0x4002f6e0 );
+PROVIDE ( r_lm_get_sec_con_host_supp = 0x4004f1d4 );
+PROVIDE ( r_LM_GetSniffSubratingParam = 0x4002325c );
+PROVIDE ( r_lm_get_sp_en = 0x4004f1c0 );
+PROVIDE ( r_LM_GetSwitchInstant = 0x4002f7f8 );
+PROVIDE ( r_lm_get_synchdl = 0x4005175c );
+PROVIDE ( r_lm_get_sync_param = 0x400503b4 );
+PROVIDE ( r_lm_init = 0x4004ed34 );
+PROVIDE ( r_lm_init_sync = 0x400512d8 );
+PROVIDE ( r_lm_is_acl_con = 0x4004f47c );
+PROVIDE ( r_lm_is_acl_con_role = 0x4004f49c );
+PROVIDE ( r_lm_is_clk_adj_ack_pending = 0x4004f4e8 );
+PROVIDE ( r_lm_is_clk_adj_instant_pending = 0x4004f4c8 );
+PROVIDE ( r_lm_local_ext_fr_configured = 0x4004f540 );
+PROVIDE ( r_lm_look_for_stored_link_key = 0x4002f948 );
+PROVIDE ( r_lm_look_for_sync = 0x40051774 );
+PROVIDE ( r_lm_lt_addr_alloc = 0x4004ef1c );
+PROVIDE ( r_lm_lt_addr_free = 0x4004ef74 );
+PROVIDE ( r_lm_lt_addr_reserve = 0x4004ef48 );
+PROVIDE ( r_LM_MakeCof = 0x4002f84c );
+PROVIDE ( r_LM_MakeRandVec = 0x400112d8 );
+PROVIDE ( r_lm_master_clk_adj_req_handler = 0x40054180 );
+PROVIDE ( r_LM_MaxSlot = 0x4002f694 );
+PROVIDE ( r_lm_modif_sync = 0x40051578 );
+PROVIDE ( r_lm_n_is_zero = 0x40012170 );
+PROVIDE ( r_lm_num_clk_adj_ack_pending_set = 0x4004f500 );
+PROVIDE ( r_lm_oob_f1 = 0x40012e54 );
+PROVIDE ( r_lm_pca_sscan_link_get = 0x4004f560 );
+PROVIDE ( r_lm_pca_sscan_link_set = 0x4004f550 );
+PROVIDE ( r_lmp_pack = 0x4001135c );
+PROVIDE ( r_lmp_unpack = 0x4001149c );
+PROVIDE ( r_lm_read_features = 0x4004f0d8 );
+PROVIDE ( r_LM_RemoveSniff = 0x40023124 );
+PROVIDE ( r_LM_RemoveSniffSubrating = 0x400233c4 );
+PROVIDE ( r_lm_remove_sync = 0x400517c8 );
+PROVIDE ( r_lm_reset_sync = 0x40051304 );
+PROVIDE ( r_lm_role_switch_finished = 0x4004f028 );
+PROVIDE ( r_lm_role_switch_start = 0x4004efe0 );
+PROVIDE ( r_lm_sco_nego_end = 0x40051828 );
+PROVIDE ( r_LM_SniffSubrateNegoRequired = 0x40023334 );
+PROVIDE ( r_LM_SniffSubratingHlReq = 0x40023154 );
+PROVIDE ( r_LM_SniffSubratingPeerReq = 0x400231dc );
+PROVIDE ( r_lm_sp_debug_mode_get = 0x4004f398 );
+PROVIDE ( r_lm_sp_n192_convert_wnaf = 0x400123c0 );
+PROVIDE ( r_lm_sp_n_one = 0x400123a4 );
+PROVIDE ( r_lm_sp_p192_add = 0x40012828 );
+PROVIDE ( r_lm_sp_p192_dbl = 0x4001268c );
+PROVIDE ( r_lm_sp_p192_invert = 0x40012b6c );
+PROVIDE ( r_lm_sp_p192_point_jacobian_to_affine = 0x40012468 );
+PROVIDE ( r_lm_sp_p192_points_jacobian_to_affine = 0x400124e4 );
+PROVIDE ( r_lm_sp_p192_point_to_inf = 0x40012458 );
+PROVIDE ( r_lm_sp_pre_compute_points = 0x40012640 );
+PROVIDE ( r_lm_sp_sha256_calculate = 0x400121a0 );
+PROVIDE ( r_LM_SuppressAclPacket = 0x4002f658 );
+PROVIDE ( r_lm_sync_flow_ctrl_en_get = 0x4004f404 );
+PROVIDE ( r_LM_UpdateAclEdrPacketType = 0x4002f5d8 );
+PROVIDE ( r_LM_UpdateAclPacketType = 0x4002f584 );
+PROVIDE ( r_modules_funcs = 0x3ffafd6c );
+PROVIDE ( r_modules_funcs_p = 0x3ffafd68 );
+PROVIDE ( r_nvds_del = 0x400544c4 );
+PROVIDE ( r_nvds_get = 0x40054488 );
+PROVIDE ( r_nvds_init = 0x40054410 );
+PROVIDE ( r_nvds_lock = 0x400544fc );
+PROVIDE ( r_nvds_put = 0x40054534 );
+PROVIDE ( rom_abs_temp = 0x400054f0 );
+PROVIDE ( rom_bb_bss_bw_40_en = 0x4000401c );
+PROVIDE ( rom_bb_bss_cbw40_dig = 0x40003bac );
+PROVIDE ( rom_bb_rx_ht20_cen_bcov_en = 0x40003734 );
+PROVIDE ( rom_bb_tx_ht20_cen = 0x40003760 );
+PROVIDE ( rom_bb_wdg_test_en = 0x40003b70 );
+PROVIDE ( rom_cbw2040_cfg = 0x400040b0 );
+PROVIDE ( rom_check_noise_floor = 0x40003c78 );
+PROVIDE ( rom_chip_i2c_readReg = 0x40004110 );
+PROVIDE ( rom_chip_i2c_writeReg = 0x40004168 );
+PROVIDE ( rom_chip_v7_bt_init = 0x40004d8c );
+PROVIDE ( rom_chip_v7_rx_init = 0x40004cec );
+PROVIDE ( rom_chip_v7_rx_rifs_en = 0x40003d90 );
+PROVIDE ( rom_chip_v7_tx_init = 0x40004d18 );
+PROVIDE ( rom_clk_force_on_vit = 0x40003710 );
+PROVIDE ( rom_correct_rf_ana_gain = 0x400062a8 );
+PROVIDE ( rom_dc_iq_est = 0x400055c8 );
+PROVIDE ( rom_disable_agc = 0x40002fa4 );
+PROVIDE ( rom_enable_agc = 0x40002fcc );
+PROVIDE ( rom_en_pwdet = 0x4000506c );
+PROVIDE ( rom_gen_rx_gain_table = 0x40003e3c );
+PROVIDE ( rom_get_data_sat = 0x4000312c );
+PROVIDE ( rom_get_fm_sar_dout = 0x40005204 );
+PROVIDE ( rom_get_power_db = 0x40005fc8 );
+PROVIDE ( rom_get_pwctrl_correct = 0x400065d4 );
+PROVIDE ( rom_get_rfcal_rxiq_data = 0x40005bbc );
+PROVIDE ( rom_get_rf_gain_qdb = 0x40006290 );
+PROVIDE ( rom_get_sar_dout = 0x40006564 );
+PROVIDE ( rom_i2c_readReg = 0x40004148 );
+PROVIDE ( rom_i2c_readReg_Mask = 0x400041c0 );
+PROVIDE ( rom_i2c_writeReg = 0x400041a4 );
+PROVIDE ( rom_i2c_writeReg_Mask = 0x400041fc );
+PROVIDE ( rom_index_to_txbbgain = 0x40004df8 );
+PROVIDE ( rom_iq_est_disable = 0x40005590 );
+PROVIDE ( rom_iq_est_enable = 0x40005514 );
+PROVIDE ( rom_linear_to_db = 0x40005f64 );
+PROVIDE ( rom_loopback_mode_en = 0x400030f8 );
+PROVIDE ( rom_main = 0x400076c4 );
+PROVIDE ( rom_meas_tone_pwr_db = 0x40006004 );
+PROVIDE ( rom_mhz2ieee = 0x4000404c );
+PROVIDE ( rom_noise_floor_auto_set = 0x40003bdc );
+PROVIDE ( rom_pbus_debugmode = 0x40004458 );
+PROVIDE ( rom_pbus_force_mode = 0x40004270 );
+PROVIDE ( rom_pbus_force_test = 0x400043c0 );
+PROVIDE ( rom_pbus_rd = 0x40004414 );
+PROVIDE ( rom_pbus_rd_addr = 0x40004334 );
+PROVIDE ( rom_pbus_rd_shift = 0x40004374 );
+PROVIDE ( rom_pbus_rx_dco_cal = 0x40005620 );
+PROVIDE ( rom_pbus_set_dco = 0x40004638 );
+PROVIDE ( rom_pbus_set_rxgain = 0x40004480 );
+PROVIDE ( rom_pbus_workmode = 0x4000446c );
+PROVIDE ( rom_pbus_xpd_rx_off = 0x40004508 );
+PROVIDE ( rom_pbus_xpd_rx_on = 0x4000453c );
+PROVIDE ( rom_pbus_xpd_tx_off = 0x40004590 );
+PROVIDE ( rom_pbus_xpd_tx_on = 0x400045e0 );
+PROVIDE ( rom_phy_disable_agc = 0x40002f6c );
+PROVIDE ( rom_phy_disable_cca = 0x40003000 );
+PROVIDE ( rom_phy_enable_agc = 0x40002f88 );
+PROVIDE ( rom_phy_enable_cca = 0x4000302c );
+PROVIDE ( rom_phy_freq_correct = 0x40004b44 );
+PROVIDE ( rom_phyFuns = 0x3ffae0c0 );
+PROVIDE ( rom_phy_get_noisefloor = 0x40003c2c );
+PROVIDE ( rom_phy_get_vdd33 = 0x4000642c );
+PROVIDE ( rom_pow_usr = 0x40003044 );
+PROVIDE ( rom_read_sar_dout = 0x400051c0 );
+PROVIDE ( rom_restart_cal = 0x400046e0 );
+PROVIDE ( rom_rfcal_pwrctrl = 0x40006058 );
+PROVIDE ( rom_rfcal_rxiq = 0x40005b4c );
+PROVIDE ( rom_rfcal_txcap = 0x40005dec );
+PROVIDE ( rom_rfpll_reset = 0x40004680 );
+PROVIDE ( rom_rfpll_set_freq = 0x400047f8 );
+PROVIDE ( rom_rtc_mem_backup = 0x40003db4 );
+PROVIDE ( rom_rtc_mem_recovery = 0x40003df4 );
+PROVIDE ( rom_rx_gain_force = 0x4000351c );
+PROVIDE ( rom_rxiq_cover_mg_mp = 0x40005a68 );
+PROVIDE ( rom_rxiq_get_mis = 0x400058e4 );
+PROVIDE ( rom_rxiq_set_reg = 0x40005a00 );
+PROVIDE ( rom_set_cal_rxdc = 0x400030b8 );
+PROVIDE ( rom_set_chan_cal_interp = 0x40005ce0 );
+PROVIDE ( rom_set_channel_freq = 0x40004880 );
+PROVIDE ( rom_set_loopback_gain = 0x40003060 );
+PROVIDE ( rom_set_noise_floor = 0x40003d48 );
+PROVIDE ( rom_set_pbus_mem = 0x400031a4 );
+PROVIDE ( rom_set_rf_freq_offset = 0x40004ca8 );
+PROVIDE ( rom_set_rxclk_en = 0x40003594 );
+PROVIDE ( rom_set_txcap_reg = 0x40005d50 );
+PROVIDE ( rom_set_txclk_en = 0x40003564 );
+PROVIDE ( rom_spur_coef_cfg = 0x40003ac8 );
+PROVIDE ( rom_spur_reg_write_one_tone = 0x400037f0 );
+PROVIDE ( rom_start_tx_tone = 0x400036b4 );
+PROVIDE ( rom_start_tx_tone_step = 0x400035d0 );
+PROVIDE ( rom_stop_tx_tone = 0x40003f98 );
+PROVIDE ( _rom_store = 0x4000d66c );
+PROVIDE ( _rom_store_table = 0x4000d4f8 );
+PROVIDE ( rom_target_power_add_backoff = 0x40006268 );
+PROVIDE ( rom_tx_atten_set_interp = 0x400061cc );
+PROVIDE ( rom_txbbgain_to_index = 0x40004dc0 );
+PROVIDE ( rom_txcal_work_mode = 0x4000510c );
+PROVIDE ( rom_txdc_cal_init = 0x40004e10 );
+PROVIDE ( rom_txdc_cal_v70 = 0x40004ea4 );
+PROVIDE ( rom_txiq_cover = 0x4000538c );
+PROVIDE ( rom_txiq_get_mis_pwr = 0x400052dc );
+PROVIDE ( rom_txiq_set_reg = 0x40005154 );
+PROVIDE ( rom_tx_pwctrl_bg_init = 0x4000662c );
+PROVIDE ( rom_txtone_linear_pwr = 0x40005290 );
+PROVIDE ( rom_wait_rfpll_cal_end = 0x400047a8 );
+PROVIDE ( rom_write_gain_mem = 0x4000348c );
+PROVIDE ( rom_write_rfpll_sdm = 0x40004740 );
+PROVIDE ( roundup2 = 0x4000ab7c );
+PROVIDE ( r_plf_funcs_p = 0x3ffb8360 );
+PROVIDE ( r_rf_rw_bt_init = 0x40054868 );
+PROVIDE ( r_rf_rw_init = 0x40054b0c );
+PROVIDE ( r_rf_rw_le_init = 0x400549d0 );
+PROVIDE ( r_rwble_activity_ongoing_check = 0x40054d8c );
+PROVIDE ( r_rwble_init = 0x40054bf4 );
+PROVIDE ( r_rwble_isr = 0x40054e08 );
+PROVIDE ( r_rwble_reset = 0x40054ce8 );
+PROVIDE ( r_rwble_sleep_check = 0x40054d78 );
+PROVIDE ( r_rwble_version = 0x40054dac );
+PROVIDE ( r_rwbt_init = 0x40055160 );
+PROVIDE ( r_rwbt_isr = 0x40055248 );
+PROVIDE ( r_rwbt_reset = 0x400551bc );
+PROVIDE ( r_rwbt_sleep_check = 0x4005577c );
+PROVIDE ( r_rwbt_sleep_enter = 0x400557a4 );
+PROVIDE ( r_rwbt_sleep_wakeup = 0x400557fc );
+PROVIDE ( r_rwbt_sleep_wakeup_end = 0x400558cc );
+PROVIDE ( r_rwbt_version = 0x4005520c );
+PROVIDE ( r_rwip_assert_err = 0x40055f88 );
+PROVIDE ( r_rwip_check_wakeup_boundary = 0x400558fc );
+PROVIDE ( r_rwip_ext_wakeup_enable = 0x40055f3c );
+PROVIDE ( r_rwip_init = 0x4005595c );
+PROVIDE ( r_rwip_pca_clock_dragging_only = 0x40055f48 );
+PROVIDE ( r_rwip_prevent_sleep_clear = 0x40055ec8 );
+PROVIDE ( r_rwip_prevent_sleep_set = 0x40055e64 );
+PROVIDE ( r_rwip_reset = 0x40055ab8 );
+PROVIDE ( r_rwip_schedule = 0x40055b38 );
+PROVIDE ( r_rwip_sleep = 0x40055b5c );
+PROVIDE ( r_rwip_sleep_enable = 0x40055f30 );
+PROVIDE ( r_rwip_version = 0x40055b20 );
+PROVIDE ( r_rwip_wakeup = 0x40055dc4 );
+PROVIDE ( r_rwip_wakeup_delay_set = 0x40055e4c );
+PROVIDE ( r_rwip_wakeup_end = 0x40055e18 );
+PROVIDE ( r_rwip_wlcoex_set = 0x40055f60 );
+PROVIDE ( r_SHA_256 = 0x40013a90 );
+PROVIDE ( rtc_boot_control = 0x4000821c );
+PROVIDE ( rtc_get_reset_reason = 0x400081d4 );
+PROVIDE ( rtc_get_wakeup_cause = 0x400081f4 );
+PROVIDE ( rtc_select_apb_bridge = 0x40008288 );
+PROVIDE ( rwip_coex_cfg = 0x3ff9914c );
+PROVIDE ( rwip_priority = 0x3ff99159 );
+PROVIDE ( rwip_rf = 0x3ffbdb28 );
+PROVIDE ( rwip_rf_p_get = 0x400558f4 );
+PROVIDE ( r_XorKey = 0x400112c0 );
+PROVIDE ( sbrk = 0x400017f4 );
+PROVIDE ( _sbrk_r = 0x4000bce4 );
+PROVIDE ( scanf = 0x40058760 );
+PROVIDE ( _scanf_chars = 0x40058384 );
+PROVIDE ( _scanf_float = 0x4000bf18 );
+PROVIDE ( _scanf_i = 0x4005845c );
+PROVIDE ( _scanf_r = 0x4005879c );
+PROVIDE ( __sccl = 0x4000c498 );
+PROVIDE ( __sclose = 0x400011b8 );
+PROVIDE ( SelectSpiFunction = 0x40061f84 );
+PROVIDE ( SelectSpiQIO = 0x40061ddc );
+PROVIDE ( SendMsg = 0x40009384 );
+PROVIDE ( send_packet = 0x40009340 );
+PROVIDE ( __seofread = 0x40001148 );
+PROVIDE ( setjmp = 0x40056268 );
+PROVIDE ( setlocale = 0x40059568 );
+PROVIDE ( _setlocale_r = 0x4005950c );
+PROVIDE ( set_rtc_memory_crc = 0x40008208 );
+PROVIDE ( SetSpiDrvs = 0x40061e78 );
+PROVIDE ( __sf_fake_stderr = 0x3ff96458 );
+PROVIDE ( __sf_fake_stdin = 0x3ff96498 );
+PROVIDE ( __sf_fake_stdout = 0x3ff96478 );
+PROVIDE ( __sflush_r = 0x400591e0 );
+PROVIDE ( __sfmoreglue = 0x40001dc8 );
+PROVIDE ( __sfp = 0x40001e90 );
+PROVIDE ( __sfp_lock_acquire = 0x40001e08 );
+PROVIDE ( __sfp_lock_release = 0x40001e14 );
+PROVIDE ( __sfputs_r = 0x40057790 );
+PROVIDE ( __sfvwrite_r = 0x4005893c );
+PROVIDE ( sha1_prf = 0x40060ae8 );
+PROVIDE ( sha1_vector = 0x40060b64 );
+PROVIDE ( sha256_prf = 0x40060d70 );
+PROVIDE ( sha256_vector = 0x40060e08 );
+PROVIDE ( sha_blk_bits = 0x3ff99290 );
+PROVIDE ( sha_blk_bits_bytes = 0x3ff99288 );
+PROVIDE ( sha_blk_hash_bytes = 0x3ff9928c );
+PROVIDE ( sig_matrix = 0x3ffae293 );
+PROVIDE ( __sinit = 0x40001e38 );
+PROVIDE ( __sinit_lock_acquire = 0x40001e20 );
+PROVIDE ( __sinit_lock_release = 0x40001e2c );
+PROVIDE ( sip_after_tx_complete = 0x4000b358 );
+PROVIDE ( sip_alloc_to_host_evt = 0x4000ab9c );
+PROVIDE ( sip_get_ptr = 0x4000b34c );
+PROVIDE ( sip_get_state = 0x4000ae2c );
+PROVIDE ( sip_init_attach = 0x4000ae58 );
+PROVIDE ( sip_install_rx_ctrl_cb = 0x4000ae10 );
+PROVIDE ( sip_install_rx_data_cb = 0x4000ae20 );
+PROVIDE ( sip_is_active = 0x4000b3c0 );
+PROVIDE ( sip_post_init = 0x4000aed8 );
+PROVIDE ( sip_reclaim_from_host_cmd = 0x4000adbc );
+PROVIDE ( sip_reclaim_tx_data_pkt = 0x4000ad5c );
+PROVIDE ( siprintf = 0x40056c08 );
+PROVIDE ( _siprintf_r = 0x40056bbc );
+PROVIDE ( sip_send = 0x4000af54 );
+PROVIDE ( sip_to_host_chain_append = 0x4000aef8 );
+PROVIDE ( sip_to_host_evt_send_done = 0x4000ac04 );
+PROVIDE ( siscanf = 0x400587d0 );
+PROVIDE ( _siscanf_r = 0x40058830 );
+PROVIDE ( slc_add_credits = 0x4000baf4 );
+PROVIDE ( slc_enable = 0x4000b64c );
+PROVIDE ( slc_from_host_chain_fetch = 0x4000b7e8 );
+PROVIDE ( slc_from_host_chain_recycle = 0x4000bb10 );
+PROVIDE ( slc_has_pkt_to_host = 0x4000b5fc );
+PROVIDE ( slc_init_attach = 0x4000b918 );
+PROVIDE ( slc_init_credit = 0x4000badc );
+PROVIDE ( slc_reattach = 0x4000b62c );
+PROVIDE ( slc_send_to_host_chain = 0x4000b6a0 );
+PROVIDE ( slc_set_host_io_max_window = 0x4000b89c );
+PROVIDE ( slc_to_host_chain_recycle = 0x4000b758 );
+PROVIDE ( __smakebuf_r = 0x40059108 );
+PROVIDE ( sniprintf = 0x40056b4c );
+PROVIDE ( _sniprintf_r = 0x40056ae4 );
+PROVIDE ( snprintf = 0x40056b4c );
+PROVIDE ( _snprintf_r = 0x40056ae4 );
+PROVIDE ( software_reset = 0x4000824c );
+PROVIDE ( software_reset_cpu = 0x40008264 );
+PROVIDE ( specialModP256 = 0x4001600c );
+PROVIDE ( spi_cache_sram_init = 0x400626e4 );
+PROVIDE ( SPIClkConfig = 0x40062bc8 );
+PROVIDE ( SPI_Common_Command = 0x4006246c );
+PROVIDE ( spi_dummy_len_fix = 0x40061d90 );
+PROVIDE ( SPI_Encrypt_Write = 0x40062e78 );
+PROVIDE ( SPIEraseArea = 0x400631ac );
+PROVIDE ( SPIEraseBlock = 0x40062c4c );
+PROVIDE ( SPIEraseChip = 0x40062c14 );
+PROVIDE ( SPIEraseSector = 0x40062ccc );
+PROVIDE ( spi_flash_attach = 0x40062a6c );
+PROVIDE ( SPILock = 0x400628f0 );
+PROVIDE ( SPIMasterReadModeCnfig = 0x40062b64 );
+PROVIDE ( spi_modes = 0x3ff99270 );
+PROVIDE ( SPIParamCfg = 0x40063238 );
+PROVIDE ( SPI_Prepare_Encrypt_Data = 0x40062e1c );
+PROVIDE ( SPIRead = 0x40062ed8 );
+PROVIDE ( SPIReadModeCnfig = 0x40062944 );
+/* This is static function, but can be used, not generated by script*/
+PROVIDE ( SPI_read_status = 0x4006226c );
+/* This is static function, but can be used, not generated by script*/
+PROVIDE ( SPI_read_status_high = 0x40062448 );
+PROVIDE ( SPIUnlock = 0x400628b0 );
+PROVIDE ( SPI_user_command_read = 0x400621b0 );
+PROVIDE ( spi_w25q16 = 0x3ffae270 );
+PROVIDE ( SPIWrite = 0x40062d50 );
+/* This is static function, but can be used, not generated by script*/
+PROVIDE ( SPI_write_enable = 0x40062320 );
+PROVIDE ( SPI_Write_Encrypt_Disable = 0x40062e60 );
+PROVIDE ( SPI_Write_Encrypt_Enable = 0x40062df4 );
+/* This is static function, but can be used, not generated by script*/
+PROVIDE ( SPI_write_status = 0x400622f0 );
+PROVIDE ( sprintf = 0x40056c08 );
+PROVIDE ( _sprintf_r = 0x40056bbc );
+PROVIDE ( __sprint_r = 0x400577e4 );
+PROVIDE ( srand = 0x40001004 );
+PROVIDE ( __sread = 0x40001118 );
+PROVIDE ( __srefill_r = 0x400593d4 );
+PROVIDE ( sscanf = 0x400587d0 );
+PROVIDE ( _sscanf_r = 0x40058830 );
+PROVIDE ( __sseek = 0x40001184 );
+PROVIDE ( __ssprint_r = 0x40056ff8 );
+PROVIDE ( __ssputs_r = 0x40056f2c );
+PROVIDE ( __ssrefill_r = 0x40057fec );
+PROVIDE ( __ssvfiscanf_r = 0x4005802c );
+PROVIDE ( __ssvfscanf_r = 0x4005802c );
+PROVIDE ( __stack = 0x3ffe3f20 );
+PROVIDE ( __stack_app = 0x3ffe7e30 );
+PROVIDE ( _stack_sentry = 0x3ffe1320 );
+PROVIDE ( _stack_sentry_app = 0x3ffe5230 );
+PROVIDE ( _start = 0x40000704 );
+PROVIDE ( start_tb_console = 0x4005a980 );
+PROVIDE ( _stat_r = 0x4000bcb4 );
+PROVIDE ( _stext = 0x40000560 );
+PROVIDE ( strcasecmp = 0x400011cc );
+PROVIDE ( strcasestr = 0x40001210 );
+PROVIDE ( strcat = 0x4000c518 );
+PROVIDE ( strchr = 0x4000c53c );
+PROVIDE ( strcmp = 0x40001274 );
+PROVIDE ( strcoll = 0x40001398 );
+PROVIDE ( strcpy = 0x400013ac );
+PROVIDE ( strcspn = 0x4000c558 );
+PROVIDE ( strdup = 0x4000143c );
+PROVIDE ( _strdup_r = 0x40001450 );
+PROVIDE ( strftime = 0x40059ab4 );
+PROVIDE ( strlcat = 0x40001470 );
+PROVIDE ( strlcpy = 0x4000c584 );
+PROVIDE ( strlen = 0x400014c0 );
+PROVIDE ( strlwr = 0x40001524 );
+PROVIDE ( strncasecmp = 0x40001550 );
+PROVIDE ( strncat = 0x4000c5c4 );
+PROVIDE ( strncmp = 0x4000c5f4 );
+PROVIDE ( strncpy = 0x400015d4 );
+PROVIDE ( strndup = 0x400016b0 );
+PROVIDE ( _strndup_r = 0x400016c4 );
+PROVIDE ( strnlen = 0x4000c628 );
+PROVIDE ( strrchr = 0x40001708 );
+PROVIDE ( strsep = 0x40001734 );
+PROVIDE ( strspn = 0x4000c648 );
+PROVIDE ( strstr = 0x4000c674 );
+PROVIDE ( __strtok_r = 0x4000c6a8 );
+PROVIDE ( strtok_r = 0x4000c70c );
+PROVIDE ( strtol = 0x4005681c );
+PROVIDE ( _strtol_r = 0x40056714 );
+PROVIDE ( strtoul = 0x4005692c );
+PROVIDE ( _strtoul_r = 0x40056834 );
+PROVIDE ( strupr = 0x4000174c );
+PROVIDE ( __subdf3 = 0x400026e4 );
+PROVIDE ( __submore = 0x40058f3c );
+PROVIDE ( __subsf3 = 0x400021d0 );
+PROVIDE ( SubtractBigHex256 = 0x40015bcc );
+PROVIDE ( SubtractBigHexMod256 = 0x40015e8c );
+PROVIDE ( SubtractBigHexUint32_256 = 0x40015f8c );
+PROVIDE ( SubtractFromSelfBigHex256 = 0x40015c20 );
+PROVIDE ( SubtractFromSelfBigHexSign256 = 0x40015dc8 );
+PROVIDE ( __subvdi3 = 0x40002d20 );
+PROVIDE ( __subvsi3 = 0x40002cf8 );
+PROVIDE ( _sungetc_r = 0x40057f6c );
+PROVIDE ( _svfiprintf_r = 0x40057100 );
+PROVIDE ( __svfiscanf_r = 0x40057b08 );
+PROVIDE ( _svfprintf_r = 0x40057100 );
+PROVIDE ( __svfscanf = 0x40057f04 );
+PROVIDE ( __svfscanf_r = 0x40057b08 );
+PROVIDE ( __swbuf = 0x40058cb4 );
+PROVIDE ( __swbuf_r = 0x40058bec );
+PROVIDE ( __swrite = 0x40001150 );
+PROVIDE ( __swsetup_r = 0x40058cc8 );
+PROVIDE ( sw_to_hw = 0x3ffb8d40 );
+PROVIDE ( _SyscallException = 0x400007cf );
+PROVIDE ( syscall_table_ptr_app = 0x3ffae020 );
+PROVIDE ( syscall_table_ptr_pro = 0x3ffae024 );
+PROVIDE ( _system_r = 0x4000bc10 );
+PROVIDE ( tdefl_compress = 0x400600bc );
+PROVIDE ( tdefl_compress_buffer = 0x400607f4 );
+PROVIDE ( tdefl_compress_mem_to_mem = 0x40060900 );
+PROVIDE ( tdefl_compress_mem_to_output = 0x400608e0 );
+PROVIDE ( tdefl_get_adler32 = 0x400608d8 );
+PROVIDE ( tdefl_get_prev_return_status = 0x400608d0 );
+PROVIDE ( tdefl_init = 0x40060810 );
+PROVIDE ( tdefl_write_image_to_png_file_in_memory = 0x4006091c );
+PROVIDE ( tdefl_write_image_to_png_file_in_memory_ex = 0x40060910 );
+PROVIDE ( time = 0x40001844 );
+PROVIDE ( __time_load_locale = 0x4000183c );
+PROVIDE ( times = 0x40001808 );
+PROVIDE ( _times_r = 0x4000bc40 );
+PROVIDE ( _timezone = 0x3ffae0a0 );
+PROVIDE ( tinfl_decompress = 0x4005ef30 );
+PROVIDE ( tinfl_decompress_mem_to_callback = 0x40060090 );
+PROVIDE ( tinfl_decompress_mem_to_mem = 0x40060050 );
+PROVIDE ( toascii = 0x4000c720 );
+PROVIDE ( tolower = 0x40001868 );
+PROVIDE ( toupper = 0x40001884 );
+PROVIDE ( __truncdfsf2 = 0x40002b90 );
+PROVIDE ( __tzcalc_limits = 0x400018a0 );
+PROVIDE ( __tz_lock = 0x40001a04 );
+PROVIDE ( _tzname = 0x3ffae030 );
+PROVIDE ( tzset = 0x40001a1c );
+PROVIDE ( _tzset_r = 0x40001a28 );
+PROVIDE ( __tz_unlock = 0x40001a10 );
+PROVIDE ( uartAttach = 0x40008fd0 );
+PROVIDE ( uart_baudrate_detect = 0x40009034 );
+PROVIDE ( uart_buff_switch = 0x400093c0 );
+PROVIDE ( UartConnCheck = 0x40008738 );
+PROVIDE ( UartConnectProc = 0x40008a04 );
+PROVIDE ( UartDev = 0x3ffe019c );
+PROVIDE ( uart_div_modify = 0x400090cc );
+PROVIDE ( UartDwnLdProc = 0x40008ce8 );
+PROVIDE ( UartGetCmdLn = 0x40009564 );
+PROVIDE ( Uart_Init = 0x40009120 );
+PROVIDE ( UartRegReadProc = 0x40008a58 );
+PROVIDE ( UartRegWriteProc = 0x40008a14 );
+PROVIDE ( uart_rx_intr_handler = 0x40008f4c );
+PROVIDE ( uart_rx_one_char = 0x400092d0 );
+PROVIDE ( uart_rx_one_char_block = 0x400092a4 );
+PROVIDE ( uart_rx_readbuff = 0x40009394 );
+PROVIDE ( UartRxString = 0x400092fc );
+PROVIDE ( UartSetBaudProc = 0x40008aac );
+PROVIDE ( UartSpiAttachProc = 0x40008a6c );
+PROVIDE ( UartSpiReadProc = 0x40008a80 );
+PROVIDE ( uart_tx_flush = 0x40009258 );
+PROVIDE ( uart_tx_one_char = 0x40009200 );
+PROVIDE ( uart_tx_one_char2 = 0x4000922c );
+PROVIDE ( uart_tx_switch = 0x40009028 );
+PROVIDE ( uart_tx_wait_idle = 0x40009278 );
+PROVIDE ( __ucmpdi2 = 0x40063840 );
+PROVIDE ( __udivdi3 = 0x4000cff8 );
+PROVIDE ( __udivmoddi4 = 0x40064ab0 );
+PROVIDE ( __udivsi3 = 0x4000c7c8 );
+PROVIDE ( __udiv_w_sdiv = 0x40064aa8 );
+PROVIDE ( __umoddi3 = 0x4000d280 );
+PROVIDE ( __umodsi3 = 0x4000c7d0 );
+PROVIDE ( __umulsidi3 = 0x4000c7d8 );
+PROVIDE ( ungetc = 0x400590f4 );
+PROVIDE ( _ungetc_r = 0x40058fa0 );
+PROVIDE ( _unlink_r = 0x4000bc84 );
+PROVIDE ( __unorddf2 = 0x400637f4 );
+PROVIDE ( __unordsf2 = 0x40063478 );
+PROVIDE ( user_code_start = 0x3ffe0400 );
+PROVIDE ( _UserExceptionVector = 0x40000340 );
+PROVIDE ( utoa = 0x40056258 );
+PROVIDE ( __utoa = 0x400561f0 );
+PROVIDE ( vasiprintf = 0x40056eb8 );
+PROVIDE ( _vasiprintf_r = 0x40056e80 );
+PROVIDE ( vasniprintf = 0x40056e58 );
+PROVIDE ( _vasniprintf_r = 0x40056df8 );
+PROVIDE ( vasnprintf = 0x40056e58 );
+PROVIDE ( _vasnprintf_r = 0x40056df8 );
+PROVIDE ( vasprintf = 0x40056eb8 );
+PROVIDE ( _vasprintf_r = 0x40056e80 );
+PROVIDE ( VerifyFlashMd5Proc = 0x40008c44 );
+PROVIDE ( veryBigHexP256 = 0x3ff9736c );
+PROVIDE ( vfiprintf = 0x40057ae8 );
+PROVIDE ( _vfiprintf_r = 0x40057850 );
+PROVIDE ( vfiscanf = 0x40057eb8 );
+PROVIDE ( _vfiscanf_r = 0x40057f24 );
+PROVIDE ( vfprintf = 0x40057ae8 );
+PROVIDE ( _vfprintf_r = 0x40057850 );
+PROVIDE ( vfscanf = 0x40057eb8 );
+PROVIDE ( _vfscanf_r = 0x40057f24 );
+PROVIDE ( viprintf = 0x400569b4 );
+PROVIDE ( _viprintf_r = 0x400569e4 );
+PROVIDE ( viscanf = 0x40058698 );
+PROVIDE ( _viscanf_r = 0x400586c8 );
+PROVIDE ( vprintf = 0x400569b4 );
+PROVIDE ( _vprintf_r = 0x400569e4 );
+PROVIDE ( vscanf = 0x40058698 );
+PROVIDE ( _vscanf_r = 0x400586c8 );
+PROVIDE ( vsiprintf = 0x40056ac4 );
+PROVIDE ( _vsiprintf_r = 0x40056a90 );
+PROVIDE ( vsiscanf = 0x40058740 );
+PROVIDE ( _vsiscanf_r = 0x400586f8 );
+PROVIDE ( vsniprintf = 0x40056a68 );
+PROVIDE ( _vsniprintf_r = 0x40056a14 );
+PROVIDE ( vsnprintf = 0x40056a68 );
+PROVIDE ( _vsnprintf_r = 0x40056a14 );
+PROVIDE ( vsprintf = 0x40056ac4 );
+PROVIDE ( _vsprintf_r = 0x40056a90 );
+PROVIDE ( vsscanf = 0x40058740 );
+PROVIDE ( _vsscanf_r = 0x400586f8 );
+PROVIDE ( wcrtomb = 0x40058920 );
+PROVIDE ( _wcrtomb_r = 0x400588d8 );
+PROVIDE ( __wctomb = 0x3ff96540 );
+PROVIDE ( _wctomb_r = 0x40058f14 );
+PROVIDE ( _WindowOverflow12 = 0x40000100 );
+PROVIDE ( _WindowOverflow4 = 0x40000000 );
+PROVIDE ( _WindowOverflow8 = 0x40000080 );
+PROVIDE ( _WindowUnderflow12 = 0x40000140 );
+PROVIDE ( _WindowUnderflow4 = 0x40000040 );
+PROVIDE ( _WindowUnderflow8 = 0x400000c0 );
+PROVIDE ( write = 0x4000181c );
+PROVIDE ( _write_r = 0x4000bd70 );
+PROVIDE ( xthal_bcopy = 0x4000c098 );
+PROVIDE ( xthal_copy123 = 0x4000c124 );
+PROVIDE ( xthal_get_ccompare = 0x4000c078 );
+PROVIDE ( xthal_get_ccount = 0x4000c050 );
+PROVIDE ( xthal_get_interrupt = 0x4000c1e4 );
+PROVIDE ( xthal_get_intread = 0x4000c1e4 );
+PROVIDE ( Xthal_intlevel = 0x3ff9c2b4 );
+PROVIDE ( xthal_memcpy = 0x4000c0bc );
+PROVIDE ( xthal_set_ccompare = 0x4000c058 );
+PROVIDE ( xthal_set_intclear = 0x4000c1ec );
+PROVIDE ( _xtos_alloca_handler = 0x40000010 );
+PROVIDE ( _xtos_cause3_handler = 0x40000dd8 );
+PROVIDE ( _xtos_c_handler_table = 0x3ffe0548 );
+PROVIDE ( _xtos_c_wrapper_handler = 0x40000de8 );
+PROVIDE ( _xtos_enabled = 0x3ffe0650 );
+PROVIDE ( _xtos_exc_handler_table = 0x3ffe0448 );
+PROVIDE ( _xtos_interrupt_mask_table = 0x3ffe0758 );
+PROVIDE ( _xtos_interrupt_table = 0x3ffe0658 );
+PROVIDE ( _xtos_ints_off = 0x4000bfac );
+PROVIDE ( _xtos_ints_on = 0x4000bf88 );
+PROVIDE ( _xtos_intstruct = 0x3ffe0650 );
+PROVIDE ( _xtos_l1int_handler = 0x40000814 );
+PROVIDE ( _xtos_p_none = 0x4000bfd4 );
+PROVIDE ( _xtos_restore_intlevel = 0x40000928 );
+PROVIDE ( _xtos_return_from_exc = 0x4000c034 );
+PROVIDE ( _xtos_set_exception_handler = 0x4000074c );
+PROVIDE ( _xtos_set_interrupt_handler = 0x4000bf78 );
+PROVIDE ( _xtos_set_interrupt_handler_arg = 0x4000bf34 );
+PROVIDE ( _xtos_set_intlevel = 0x4000bfdc );
+PROVIDE ( _xtos_set_min_intlevel = 0x4000bff8 );
+PROVIDE ( _xtos_set_vpri = 0x40000934 );
+PROVIDE ( _xtos_syscall_handler = 0x40000790 );
+PROVIDE ( _xtos_unhandled_exception = 0x4000c024 );
+PROVIDE ( _xtos_unhandled_interrupt = 0x4000c01c );
+PROVIDE ( _xtos_vpri_enabled = 0x3ffe0654 );
diff --git a/configs/freedom-kl25z/minnsh/Make.defs b/configs/esp32-core/smp/Make.defs
similarity index 77%
rename from configs/freedom-kl25z/minnsh/Make.defs
rename to configs/esp32-core/smp/Make.defs
index c3ff3df814461ca5db24cde5b540a8179b18ab4a..8b4dd25b40228a2e633f4ff63a25427898aaed39 100644
--- a/configs/freedom-kl25z/minnsh/Make.defs
+++ b/configs/esp32-core/smp/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
-# configs/freedom-kl25z/minnsh/Make.defs
+# configs/esp32-core/nsh/Make.defs
 #
-#   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -35,20 +35,35 @@
 
 include ${TOPDIR}/.config
 include ${TOPDIR}/tools/Config.mk
-include ${TOPDIR}/arch/arm/src/armv6-m/Toolchain.defs
+include ${TOPDIR}/arch/xtensa/src/lx6/Toolchain.defs
 
-LDSCRIPT = ld.script
+LDSCRIPT1 = $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/esp32_out.ld
+LDSCRIPT3 = $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/esp32_rom.ld
+LDSCRIPT4 = $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/esp32_peripherals.ld
+
+ifeq ($(CONFIG_ESP32CORE_RUN_IRAM),y)
+  LDSCRIPT2 = $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/esp32_iram.ld
+else
+  LDSCRIPT2 = $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/esp32_flash.ld
+endif
 
 ifeq ($(WINTOOL),y)
   # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
   ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
   ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
-  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(LDSCRIPT1)}"
+  ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT2)}"
+  ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT3)}"
+  ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT4)}"
 else
   # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
   ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
   ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
-  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+  ARCHSCRIPT = -T$(LDSCRIPT1) -T$(LDSCRIPT2) -T$(LDSCRIPT3) -T$(LDSCRIPT4)
 endif
 
 CC = $(CROSSDEV)gcc
@@ -60,9 +75,6 @@ NM = $(ARCROSSDEV)nm
 OBJCOPY = $(CROSSDEV)objcopy
 OBJDUMP = $(CROSSDEV)objdump
 
-ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
-ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
-
 ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
   ARCHOPTIMIZATION = -g
 endif
@@ -71,12 +83,12 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
   ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
 endif
 
-ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCFLAGS = -fno-builtin -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -mlongcalls -MMD -MP
+ARCHCXXFLAGS = $(ARCHCFLAGS) -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
-ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+ARCHPICFLAGS = -fpic
 
 CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
 CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
@@ -94,9 +106,7 @@ OBJEXT = .o
 LIBEXT = .a
 EXEEXT =
 
-ifneq ($(CROSSDEV),arm-nuttx-elf-)
-  LDFLAGS += -nostartfiles -nodefaultlibs
-endif
+LDFLAGS += -nostartfiles -nodefaultlibs
 ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
   LDFLAGS += -g
 endif
@@ -106,19 +116,4 @@ HOSTCC = gcc
 HOSTINCLUDES = -I.
 HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
 HOSTLDFLAGS =
-ifeq ($(CONFIG_HOST_WINDOWS),y)
-  HOSTEXEEXT = .exe
-else
-  HOSTEXEEXT =
-endif
-
-ifeq ($(WINTOOL),y)
-  # Windows-native host tools
-  DIRLINK = $(TOPDIR)/tools/copydir.sh
-  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
-  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
-else
-  # Linux/Cygwin-native host tools
-  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
-endif
 
diff --git a/configs/pirelli_dpl10/nsh_highram/defconfig b/configs/esp32-core/smp/defconfig
similarity index 67%
rename from configs/pirelli_dpl10/nsh_highram/defconfig
rename to configs/esp32-core/smp/defconfig
index d8eac38010b4dc6f46c671751c7037702cf6103a..211b99dd045b2c464beb63bc5421cc69a85bfc5b 100644
--- a/configs/pirelli_dpl10/nsh_highram/defconfig
+++ b/configs/esp32-core/smp/defconfig
@@ -24,7 +24,7 @@ CONFIG_BUILD_FLAT=y
 # Binary Output Formats
 #
 # CONFIG_RRLOAD_BINARY is not set
-# CONFIG_INTELHEX_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
 # CONFIG_MOTOROLA_SREC is not set
 CONFIG_RAW_BINARY=y
 # CONFIG_UBOOT_UIMAGE is not set
@@ -37,14 +37,15 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+# CONFIG_ARCH_HAVE_STACKCHECK is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
-CONFIG_ARCH_HAVE_STACKCHECK=y
-# CONFIG_STACK_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -54,99 +55,50 @@ CONFIG_DEBUG_FULLOPT=y
 #
 # System Type
 #
-CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_ARM is not set
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+CONFIG_ARCH_XTENSA=y
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
-CONFIG_ARCH="arm"
-
-#
-# ARM Options
-#
-# CONFIG_ARCH_CHIP_A1X is not set
-# CONFIG_ARCH_CHIP_C5471 is not set
-CONFIG_ARCH_CHIP_CALYPSO=y
-# CONFIG_ARCH_CHIP_DM320 is not set
-# CONFIG_ARCH_CHIP_EFM32 is not set
-# CONFIG_ARCH_CHIP_IMX1 is not set
-# CONFIG_ARCH_CHIP_KINETIS is not set
-# CONFIG_ARCH_CHIP_KL is not set
-# CONFIG_ARCH_CHIP_LM is not set
-# CONFIG_ARCH_CHIP_TIVA is not set
-# CONFIG_ARCH_CHIP_LPC11XX is not set
-# CONFIG_ARCH_CHIP_LPC17XX is not set
-# CONFIG_ARCH_CHIP_LPC214X is not set
-# CONFIG_ARCH_CHIP_LPC2378 is not set
-# CONFIG_ARCH_CHIP_LPC31XX is not set
-# CONFIG_ARCH_CHIP_LPC43XX is not set
-# CONFIG_ARCH_CHIP_NUC1XX is not set
-# CONFIG_ARCH_CHIP_SAMA5 is not set
-# CONFIG_ARCH_CHIP_SAMD is not set
-# CONFIG_ARCH_CHIP_SAML is not set
-# CONFIG_ARCH_CHIP_SAM34 is not set
-# CONFIG_ARCH_CHIP_SAMV7 is not set
-# CONFIG_ARCH_CHIP_STM32 is not set
-# CONFIG_ARCH_CHIP_STR71X is not set
-CONFIG_ARCH_ARM7TDMI=y
-# CONFIG_ARCH_ARM926EJS is not set
-# CONFIG_ARCH_ARM920T is not set
-# CONFIG_ARCH_CORTEXM0 is not set
-# CONFIG_ARCH_CORTEXM3 is not set
-# CONFIG_ARCH_CORTEXM4 is not set
-# CONFIG_ARCH_CORTEXM7 is not set
-# CONFIG_ARCH_CORTEXA5 is not set
-# CONFIG_ARCH_CORTEXA8 is not set
-CONFIG_ARCH_FAMILY="arm"
-CONFIG_ARCH_CHIP="calypso"
-# CONFIG_ARCH_HAVE_FPU is not set
-# CONFIG_ARCH_HAVE_DPFPU is not set
-CONFIG_ARCH_HAVE_LOWVECTORS=y
-# CONFIG_ARCH_LOWVECTORS is not set
-
-#
-# ARM Configuration Options
-#
-CONFIG_ARM_TOOLCHAIN_BUILDROOT=y
-# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set
-# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set
-# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set
-CONFIG_ARM_OABI_TOOLCHAIN=y
-CONFIG_UART_IRDA_BAUD=115200
-CONFIG_UART_IRDA_PARITY=0
-CONFIG_UART_IRDA_BITS=8
-CONFIG_UART_IRDA_2STOP=0
-CONFIG_UART_IRDA_RXBUFSIZE=256
-CONFIG_UART_IRDA_TXBUFSIZE=256
-CONFIG_UART_MODEM_BAUD=115200
-CONFIG_UART_MODEM_PARITY=0
-CONFIG_UART_MODEM_BITS=8
-CONFIG_UART_MODEM_2STOP=0
-CONFIG_UART_MODEM_RXBUFSIZE=256
-CONFIG_UART_MODEM_TXBUFSIZE=256
-
-#
-# Calypso Configuration Options
-#
-
-#
-# Modem UART Configuration
-#
-# CONFIG_UART_MODEM_HWFLOWCONTROL is not set
-
-#
-# IrDA UART Configuration
-#
-# CONFIG_UART_IRDA_HWFLOWCONTROL is not set
-# CONFIG_USE_SERCOMM_CONSOLE is not set
-# CONFIG_SERIAL_MODEM_CONSOLE is not set
-CONFIG_SERIAL_IRDA_CONSOLE=y
-# CONFIG_SERIAL_CONSOLE_NONE is not set
+CONFIG_ARCH="xtensa"
+CONFIG_ARCH_CHIP="esp32"
+# CONFIG_SERIAL_TERMIOS is not set
+CONFIG_ARCH_CHIP_ESP32=y
+CONFIG_ARCH_FAMILY_LX6=y
+# CONFIG_XTENSA_USE_OVLY is not set
+CONFIG_XTENSA_CP_INITSET=0x0001
+
+#
+# ESP32 Peripheral Selection
+#
+CONFIG_ESP32_UART=y
+# CONFIG_ESP32_SPI2 is not set
+# CONFIG_XTENSA_TIMER1 is not set
+# CONFIG_XTENSA_TIMER2 is not set
+CONFIG_ESP32_UART0=y
+# CONFIG_ESP32_UART1 is not set
+# CONFIG_ESP32_UART2 is not set
+
+#
+# Memory Configuration
+#
+CONFIG_ESP32_BT_RESERVE_DRAM=0
+CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0
+CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=0
+# CONFIG_ESP32_GPIO_IRQ is not set
+
+#
+# UART configuration
+#
+CONFIG_ESP32_UART0_TXPIN=0
+CONFIG_ESP32_UART0_RXPIN=0
 
 #
 # Architecture Options
@@ -159,12 +111,14 @@ CONFIG_SERIAL_IRDA_CONSOLE=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
-CONFIG_ARCH_HAVE_VFORK=y
+CONFIG_ARCH_HAVE_MULTICPU=y
+# CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
-CONFIG_ARCH_HAVE_POWEROFF=y
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
 # CONFIG_ARCH_IDLE_CUSTOM is not set
@@ -174,55 +128,52 @@ CONFIG_ARCH_STACKDUMP=y
 #
 # Board Settings
 #
-CONFIG_BOARD_LOOPSPERMSEC=1250
+CONFIG_BOARD_LOOPSPERMSEC=16717
 # CONFIG_ARCH_CALIBRATION is not set
 
 #
 # Interrupt options
 #
-CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
-CONFIG_ARCH_INTERRUPTSTACK=1024
+# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set
 # CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set
 
 #
 # Boot options
 #
 # CONFIG_BOOT_RUNFROMEXTSRAM is not set
-# CONFIG_BOOT_RUNFROMFLASH is not set
-CONFIG_BOOT_RUNFROMISRAM=y
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
 # CONFIG_BOOT_RUNFROMSDRAM is not set
 # CONFIG_BOOT_COPYTORAM is not set
 
 #
 # Boot Memory Configuration
 #
-CONFIG_RAM_START=0x00800000
-CONFIG_RAM_SIZE=262144
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=114688
 # CONFIG_ARCH_HAVE_SDRAM is not set
 
 #
 # Board Selection
 #
-# CONFIG_ARCH_BOARD_COMPALE86 is not set
-# CONFIG_ARCH_BOARD_COMPALE88 is not set
-# CONFIG_ARCH_BOARD_COMPALE99 is not set
-CONFIG_ARCH_BOARD_PIRELLI_DPL10=y
+CONFIG_ARCH_BOARD_ESP32CORE=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
-CONFIG_ARCH_BOARD="pirelli_dpl10"
+CONFIG_ARCH_BOARD="esp32-core"
 
 #
 # Common Board Options
 #
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+CONFIG_ESP32CORE_XTAL_40MZ=y
+# CONFIG_ESP32CORE_XTAL_26MHz is not set
+# CONFIG_ESP32CORE_RUN_IRAM is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
-CONFIG_BOARDCTL_POWEROFF=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -233,7 +184,7 @@ CONFIG_DISABLE_OS_API=y
 # CONFIG_DISABLE_POSIX_TIMERS is not set
 # CONFIG_DISABLE_PTHREAD is not set
 # CONFIG_DISABLE_SIGNALS is not set
-CONFIG_DISABLE_MQUEUE=y
+# CONFIG_DISABLE_MQUEUE is not set
 # CONFIG_DISABLE_ENVIRON is not set
 
 #
@@ -242,33 +193,41 @@ CONFIG_DISABLE_MQUEUE=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
-CONFIG_START_YEAR=2007
-CONFIG_START_MONTH=2
-CONFIG_START_DAY=13
-CONFIG_MAX_WDOGPARMS=4
-CONFIG_PREALLOC_WDOGS=8
-CONFIG_WDOG_INTRESERVE=1
-CONFIG_PREALLOC_TIMERS=8
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=12
+CONFIG_START_DAY=6
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=16
+CONFIG_WDOG_INTRESERVE=4
+CONFIG_PREALLOC_TIMERS=4
 
 #
 # Tasks and Scheduling
 #
+CONFIG_SPINLOCK=y
+CONFIG_SMP=y
+CONFIG_SMP_NCPUS=2
+CONFIG_SMP_IDLETHREAD_STACKSIZE=2048
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
-CONFIG_TASK_NAME_SIZE=0
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=31
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
-# CONFIG_SCHED_WAITPID is not set
+CONFIG_SCHED_WAITPID=y
 
 #
 # Pthread Options
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -305,7 +264,14 @@ CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
 
 #
-# Work Queue Support
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -314,7 +280,7 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 # Stack and heap information
 #
-CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_IDLETHREAD_STACKSIZE=1024
 CONFIG_USERMAIN_STACKSIZE=2048
 CONFIG_PTHREAD_STACK_MIN=256
 CONFIG_PTHREAD_STACK_DEFAULT=2048
@@ -326,6 +292,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -336,13 +303,21 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
+# CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
@@ -350,6 +325,7 @@ CONFIG_SPI_EXCHANGE=y
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -357,20 +333,40 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
-# CONFIG_UART0_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_UART1_SERIALDRIVER is not set
 # CONFIG_UART2_SERIALDRIVER is not set
 # CONFIG_UART3_SERIALDRIVER is not set
@@ -390,31 +386,49 @@ CONFIG_SERIAL=y
 # CONFIG_USART6_SERIALDRIVER is not set
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
-CONFIG_OTHER_UART_SERIALDRIVER=y
-
-#
-# USART Configuration
-#
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
 CONFIG_MCU_SERIAL=y
-# CONFIG_STANDARD_SERIAL is not set
+CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
-# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
-CONFIG_OTHER_SERIAL_CONSOLE=y
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_UART0_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
-# CONFIG_USBDEV is not set
-# CONFIG_USBHOST is not set
-# CONFIG_DRIVERS_WIRELESS is not set
 
 #
-# System Logging Device Options
+# UART0 Configuration
 #
+CONFIG_UART0_RXBUFSIZE=256
+CONFIG_UART0_TXBUFSIZE=256
+CONFIG_UART0_BAUD=115200
+CONFIG_UART0_BITS=8
+CONFIG_UART0_PARITY=0
+CONFIG_UART0_2STOP=0
+# CONFIG_UART0_IFLOWCONTROL is not set
+# CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -438,23 +452,27 @@ CONFIG_OTHER_SERIAL_CONSOLE=y
 # CONFIG_DISABLE_MOUNTPOINT is not set
 # CONFIG_FS_AUTOMOUNTER is not set
 # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
-# CONFIG_FS_READABLE is not set
+CONFIG_FS_READABLE=y
 # CONFIG_FS_WRITABLE is not set
 # CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
-# CONFIG_FS_PROCFS is not set
-# CONFIG_FS_UNIONFS is not set
+CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
 
 #
-# System Logging
+# Exclude individual procfs entries
 #
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -465,10 +483,8 @@ CONFIG_OTHER_SERIAL_CONSOLE=y
 # Memory Management
 #
 # CONFIG_MM_SMALL is not set
-CONFIG_MM_REGIONS=1
-CONFIG_ARCH_HAVE_HEAP2=y
-CONFIG_HEAP2_BASE=0x00000000
-CONFIG_HEAP2_SIZE=0
+CONFIG_MM_REGIONS=2
+# CONFIG_ARCH_HAVE_HEAP2 is not set
 # CONFIG_GRAN is not set
 
 #
@@ -476,6 +492,10 @@ CONFIG_HEAP2_SIZE=0
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -494,7 +514,7 @@ CONFIG_BUILTIN=y
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=1024
+CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
@@ -503,6 +523,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -518,19 +540,32 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
 #
 # CONFIG_C99_BOOL8 is not set
-# CONFIG_HAVE_CXX is not set
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
 
 #
 # Application Configuration
@@ -541,57 +576,78 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
-CONFIG_EXAMPLES_HELLO=y
+# CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
 # CONFIG_EXAMPLES_NRF24L01TERM is not set
 CONFIG_EXAMPLES_NSH=y
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+CONFIG_EXAMPLES_SMP=y
+CONFIG_EXAMPLES_SMP_NBARRIER_THREADS=8
+CONFIG_EXAMPLES_SMP_PRIORITY=100
+CONFIG_EXAMPLES_SMP_STACKSIZE=2048
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -602,31 +658,31 @@ CONFIG_EXAMPLES_NSH=y
 #
 # Interpreters
 #
+# CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -635,9 +691,9 @@ CONFIG_NSH_READLINE=y
 # CONFIG_NSH_CLE is not set
 CONFIG_NSH_LINELEN=64
 # CONFIG_NSH_DISABLE_SEMICOLON is not set
-CONFIG_NSH_CMDPARMS=y
+# CONFIG_NSH_CMDPARMS is not set
 CONFIG_NSH_MAXARGUMENTS=6
-CONFIG_NSH_ARGCAT=y
+# CONFIG_NSH_ARGCAT is not set
 CONFIG_NSH_NESTDEPTH=3
 # CONFIG_NSH_DISABLEBG is not set
 CONFIG_NSH_BUILTIN_APPS=y
@@ -646,6 +702,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
@@ -654,6 +711,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -662,17 +720,19 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_IFUPDOWN is not set
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -681,20 +741,25 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
-CONFIG_NSH_CMDOPT_HEXDUMP=y
-CONFIG_NSH_FILEIOSIZE=1024
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=512
 
 #
 # Scripting Support
@@ -708,7 +773,9 @@ CONFIG_NSH_FILEIOSIZE=1024
 #
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
-# CONFIG_NSH_ARCHINIT is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -722,15 +789,21 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/esp32-core/smp/setenv.sh b/configs/esp32-core/smp/setenv.sh
new file mode 100755
index 0000000000000000000000000000000000000000..3c57c18b5548be47b9d2d0dbfdc33377357621ac
--- /dev/null
+++ b/configs/esp32-core/smp/setenv.sh
@@ -0,0 +1,57 @@
+#!/bin/bash
+# configs/esp32-core/nsh/setenv.sh
+#
+#   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the path to the location where I installed the Expressif crosstools-NG
+# toolchaing
+export TOOLCHAIN_BIN="/home/patacongo/projects/nuttx/crosstool-NG/builds/xtensa-esp32-elf/bin"
+
+# Add the path to the toolchain to the PATH variable
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/compal_e99/src/.gitignore b/configs/esp32-core/src/.gitignore
similarity index 100%
rename from configs/compal_e99/src/.gitignore
rename to configs/esp32-core/src/.gitignore
diff --git a/configs/esp32-core/src/Makefile b/configs/esp32-core/src/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..46ed73e5c3ec30550966df469bdaba1b3a4fc2dd
--- /dev/null
+++ b/configs/esp32-core/src/Makefile
@@ -0,0 +1,63 @@
+############################################################################
+# configs//srp32-core/Makefile
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+SCRIPTDIR = $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts
+CONFIGFILE = $(TOPDIR)$(DELIM)include$(DELIM)nuttx$(DELIM)config.h
+
+ASRCS =
+CSRCS = esp32_boot.c esp32_bringup.c
+
+ifeq ($(CONFIG_LIB_BOARDCTL),y)
+CSRCS += esp32_appinit.c
+endif
+
+SCRIPTIN = $(SCRIPTDIR)$(DELIM)esp32.template
+SCRIPTOUT = $(SCRIPTDIR)$(DELIM)esp32_out.ld
+
+BOARD_CONTEXT = y
+EXTRA_CLEAN =
+EXTRA_DISTCLEAN = $(call DELFILE, $(SCRIPTOUT))
+
+.PHONY = context
+
+include $(TOPDIR)/configs/Board.mk
+
+$(SCRIPTOUT): $(SCRIPTIN) $(CONFIGFILE)
+	# $(call PREPROCESS, $(SCRIPTIN), $@)
+	$(Q) $(CC) -isystem $(TOPDIR)/include -C -P -x c -E $(SCRIPTIN) -o $@
+
+context: $(SCRIPTOUT)
diff --git a/configs/esp32-core/src/esp32-core.h b/configs/esp32-core/src/esp32-core.h
new file mode 100644
index 0000000000000000000000000000000000000000..88e6f9fe79ca649a8dbf6df0a9f8a17bbb8bea09
--- /dev/null
+++ b/configs/esp32-core/src/esp32-core.h
@@ -0,0 +1,82 @@
+/****************************************************************************
+ * configs/esp32-core/src/esp32-core.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __CONFIGS_ESP32_CORE_SRC_ESP32_CORE_H
+#define __CONFIGS_ESP32_CORE_SRC_ESP32_CORE_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32_bringup
+ *
+ * Description:
+ *   Perform architecture-specific initialization
+ *
+ *   CONFIG_BOARD_INITIALIZE=y :
+ *     Called from board_initialize().
+ *
+ *   CONFIG_BOARD_INITIALIZE=y && CONFIG_LIB_BOARDCTL=y :
+ *     Called from the NSH library via board_app_initialize()
+ *
+ ****************************************************************************/
+
+int esp32_bringup(void);
+
+#endif /* __ASSEMBLY__ */
+#endif /* __CONFIGS_ESP32_CORE_SRC_ESP32_CORE_H */
diff --git a/configs/esp32-core/src/esp32_appinit.c b/configs/esp32-core/src/esp32_appinit.c
new file mode 100644
index 0000000000000000000000000000000000000000..ff8d1eb9570beed26fb0136ed5ea7e689bd68cd8
--- /dev/null
+++ b/configs/esp32-core/src/esp32_appinit.c
@@ -0,0 +1,95 @@
+/****************************************************************************
+ * config/esp32-core/src/esp32_appinit.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include "esp32-core.h"
+
+#ifdef CONFIG_LIB_BOARDCTL
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ *   Perform application specific initialization.  This function is never
+ *   called directly from application code, but only indirectly via the
+ *   (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ *   arg - The boardctl() argument is passed to the board_app_initialize()
+ *         implementation without modification.  The argument has no
+ *         meaning to NuttX; the meaning of the argument is a contract
+ *         between the board-specific initalization logic and the the
+ *         matching application logic.  The value cold be such things as a
+ *         mode enumeration value, a set of DIP switch switch settings, a
+ *         pointer to configuration data read from a file or serial FLASH,
+ *         or whatever you would like to do with it.  Every implementation
+ *         should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+int board_app_initialize(uintptr_t arg)
+{
+#ifdef CONFIG_BOARD_INITIALIZE
+  /* Board initialization already performed by board_initialize() */
+
+  return OK;
+#else
+  /* Perform board-specific initialization */
+
+  return esp32_bringup();
+#endif
+}
+
+#endif /* CONFIG_LIB_BOARDCTL */
diff --git a/configs/esp32-core/src/esp32_boot.c b/configs/esp32-core/src/esp32_boot.c
new file mode 100644
index 0000000000000000000000000000000000000000..6dfe57a5ed669f56c7b414468b0d2cd612376dab
--- /dev/null
+++ b/configs/esp32-core/src/esp32_boot.c
@@ -0,0 +1,95 @@
+/************************************************************************************
+ * configs/esp32-core/src/esp32_boot.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+
+#include "esp32-core.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: esp32_board_initialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.  This entry point
+ *   is called early in the initialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void esp32_board_initialize(void)
+{
+}
+
+/****************************************************************************
+ * Name: board_initialize
+ *
+ * Description:
+ *   If CONFIG_BOARD_INITIALIZE is selected, then an additional
+ *   initialization call will be performed in the boot-up sequence to a
+ *   function called board_initialize().  board_initialize() will be
+ *   called immediately after up_initialize() is called and just before the
+ *   initial application is started.  This additional initialization phase
+ *   may be used, for example, to initialize board-specific device drivers.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BOARD_INITIALIZE
+void board_initialize(void)
+{
+  /* Perform board-specific initialization */
+
+  (void)esp32_bringup();
+}
+#endif
diff --git a/configs/esp32-core/src/esp32_bringup.c b/configs/esp32-core/src/esp32_bringup.c
new file mode 100644
index 0000000000000000000000000000000000000000..b5121b2a4dde0f400cb347fcd10da6b25d7dd172
--- /dev/null
+++ b/configs/esp32-core/src/esp32_bringup.c
@@ -0,0 +1,91 @@
+/****************************************************************************
+ * config/esp32-core/src/esp32_bringup.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include "esp32-core.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32_bringup
+ *
+ * Description:
+ *   Perform architecture-specific initialization
+ *
+ *   CONFIG_BOARD_INITIALIZE=y :
+ *     Called from board_initialize().
+ *
+ *   CONFIG_BOARD_INITIALIZE=n && CONFIG_LIB_BOARDCTL=y :
+ *     Called from the NSH library
+ *
+ ****************************************************************************/
+
+int esp32_bringup(void)
+{
+  int ret;
+
+#ifdef CONFIG_FS_PROCFS
+  /* Mount the procfs file system */
+
+  ret = mount(NULL, "/proc", "procfs", 0, NULL);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to mount procfs at /proc: %d\n", ret);
+    }
+#endif
+
+  /* If we got here then perhaps not all initialization was successful, but
+   * at least enough succeeded to bring-up NSH with perhaps reduced
+   * capabilities.
+   */
+
+  UNUSED(ret);
+  return OK;
+}
diff --git a/configs/ez80f910200kitg/ostest/defconfig b/configs/ez80f910200kitg/ostest/defconfig
index 106998a223d69f96f4e320016ccab8b5833f9c85..98891cc5f7fc8cea68815ff433e9b31bf360f9da 100644
--- a/configs/ez80f910200kitg/ostest/defconfig
+++ b/configs/ez80f910200kitg/ostest/defconfig
@@ -46,33 +46,10 @@ CONFIG_BUILD_FLAT=y
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_AUDIO is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_LEDS is not set
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 # CONFIG_DEBUG_NOOPT is not set
@@ -85,8 +62,7 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -158,6 +134,8 @@ CONFIG_EZ80_UART0=y
 # CONFIG_EZ80_UART2 is not set
 # CONFIG_EZ80_EMAC is not set
 CONFIG_EZ80_TOOLCHAIN_ZDSII=y
+# CONFIG_EZ80_ZDSII_V511 is not set
+CONFIG_EZ80_ZDSII_V521=y
 # CONFIG_ARCH_TIMERHOOK is not set
 
 #
@@ -171,6 +149,7 @@ CONFIG_EZ80_TOOLCHAIN_ZDSII=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 # CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -229,6 +208,7 @@ CONFIG_ARCH_HAVE_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -354,14 +334,26 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -377,9 +369,10 @@ CONFIG_MMCSD_HAVECARDDETECT=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -403,15 +396,10 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
-# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -431,17 +419,22 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -471,12 +464,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -497,6 +484,10 @@ CONFIG_HEAP2_SIZE=0
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -514,7 +505,7 @@ CONFIG_HEAP2_SIZE=0
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -536,14 +527,16 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -570,10 +563,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_LEDS is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -582,11 +576,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 CONFIG_EXAMPLES_OSTEST=y
 CONFIG_EXAMPLES_OSTEST_LOOPS=1
@@ -597,29 +591,34 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
 # CONFIG_FSUTILS_INIFILE is not set
 
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -630,8 +629,8 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -642,6 +641,7 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -663,16 +663,16 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/ez80f910200zco/dhcpd/defconfig b/configs/ez80f910200zco/dhcpd/defconfig
index 615994d436c0f79c09f3c77e0ab503afb9a93786..b696d03129af9d17625e0994f60e0d29e52797db 100644
--- a/configs/ez80f910200zco/dhcpd/defconfig
+++ b/configs/ez80f910200zco/dhcpd/defconfig
@@ -46,34 +46,10 @@ CONFIG_BUILD_FLAT=y
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_AUDIO is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_NET is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_LEDS is not set
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 # CONFIG_DEBUG_NOOPT is not set
@@ -86,10 +62,12 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 CONFIG_ARCH_Z80=y
 CONFIG_ARCH="z80"
@@ -159,6 +137,8 @@ CONFIG_EZ80_UART0=y
 # CONFIG_EZ80_UART2 is not set
 CONFIG_EZ80_EMAC=y
 CONFIG_EZ80_TOOLCHAIN_ZDSII=y
+# CONFIG_EZ80_ZDSII_V511 is not set
+CONFIG_EZ80_ZDSII_V521=y
 CONFIG_EZ80_FIAD=0x1f
 CONFIG_EZ80_PHYCONFIG=1
 CONFIG_EZ80_RAMADDR=0xf7c000
@@ -168,6 +148,7 @@ CONFIG_EZ80_NRXPKTBUFS=64
 CONFIG_EZ80_MDCDIV=0
 CONFIG_EZ80_TXPOLLTIMERMS=10
 # CONFIG_ARCH_MCFILTER is not set
+CONFIG_EZ80_EMAC_HPWORK=y
 CONFIG_ARCH_TIMERHOOK=y
 
 #
@@ -181,6 +162,7 @@ CONFIG_ARCH_TIMERHOOK=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 # CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -225,7 +207,6 @@ CONFIG_RAM_SIZE=65536
 #
 # Board Selection
 #
-# CONFIG_ARCH_BOARD_EZ80F910200KITG is not set
 CONFIG_ARCH_BOARD_EZ80F910200ZCO=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="ez80f910200zco"
@@ -241,6 +222,7 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -259,6 +241,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=3
@@ -307,6 +290,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -314,13 +298,17 @@ CONFIG_NAME_MAX=32
 CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGWORK=17
 # CONFIG_MODULE is not set
 
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -338,6 +326,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=1024
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -353,12 +342,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -366,14 +359,26 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -387,7 +392,6 @@ CONFIG_NETDEVICES=y
 # CONFIG_NETDEV_MULTINIC is not set
 CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NETDEV_LATEINIT is not set
-# CONFIG_NET_DUMPPACKET is not set
 
 #
 # External Ethernet MAC Device Support
@@ -395,10 +399,8 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -418,14 +420,14 @@ CONFIG_ETH0_PHY_AM79C874=y
 # CONFIG_ETH0_PHY_LAN8740A is not set
 # CONFIG_ETH0_PHY_LAN8742A is not set
 # CONFIG_ETH0_PHY_DM9161 is not set
-# CONFIG_NETDEV_PHY_DEBUG is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -449,15 +451,10 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
-# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -475,19 +472,26 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
 # CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -495,13 +499,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_GUARDSIZE=2
 
@@ -576,7 +578,6 @@ CONFIG_NET_ARPTAB_SIZE=16
 CONFIG_NET_ARP_MAXAGE=120
 # CONFIG_NET_ARP_IPIN is not set
 # CONFIG_NET_ARP_SEND is not set
-# CONFIG_NET_ARP_DUMP is not set
 
 #
 # Network I/O Buffer Support
@@ -585,7 +586,6 @@ CONFIG_NET_IOB=y
 CONFIG_IOB_NBUFFERS=8
 CONFIG_IOB_BUFSIZE=196
 CONFIG_IOB_NCHAINS=8
-# CONFIG_IOB_DEBUG is not set
 # CONFIG_NET_ARCH_INCR32 is not set
 # CONFIG_NET_ARCH_CHKSUM is not set
 # CONFIG_NET_STATISTICS is not set
@@ -617,12 +617,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -643,6 +637,10 @@ CONFIG_HEAP2_SIZE=0
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -660,7 +658,7 @@ CONFIG_HEAP2_SIZE=0
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -668,6 +666,8 @@ CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -682,15 +682,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_DNSCLIENT is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -709,22 +711,24 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 CONFIG_EXAMPLES_DHCPD=y
 CONFIG_EXAMPLES_DHCPD_NOMAC=y
 CONFIG_EXAMPLES_DHCPD_IPADDR=0x0a000001
 CONFIG_EXAMPLES_DHCPD_DRIPADDR=0x0a000001
 CONFIG_EXAMPLES_DHCPD_NETMASK=0xffffff00
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -733,42 +737,45 @@ CONFIG_EXAMPLES_DHCPD_NETMASK=0xffffff00
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
 # CONFIG_FSUTILS_INIFILE is not set
 
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -779,8 +786,9 @@ CONFIG_EXAMPLES_DHCPD_NETMASK=0xffffff00
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -805,14 +813,15 @@ CONFIG_NETUTILS_DHCPD_NETMASK=0xffffff00
 CONFIG_NETUTILS_DHCPD_DNSIP=0x08080808
 CONFIG_NETUTILS_DHCPD_OFFERTIME=3600
 CONFIG_NETUTILS_DHCPD_DECLINETIME=3600
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
-# CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
 CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_PPPD is not set
+# CONFIG_NETUTILS_SMTP is not set
+# CONFIG_NETUTILS_TFTPC is not set
 
 #
 # NSH Library
@@ -831,16 +840,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/ez80f910200zco/httpd/defconfig b/configs/ez80f910200zco/httpd/defconfig
index fe55d601b7796bf758a8aa5fdf60bed8a702e269..4e2271d50d704fe80aa767b0bafb0c0136835fc6 100644
--- a/configs/ez80f910200zco/httpd/defconfig
+++ b/configs/ez80f910200zco/httpd/defconfig
@@ -46,34 +46,10 @@ CONFIG_BUILD_FLAT=y
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_AUDIO is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_NET is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_LEDS is not set
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 # CONFIG_DEBUG_NOOPT is not set
@@ -86,10 +62,12 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 CONFIG_ARCH_Z80=y
 CONFIG_ARCH="z80"
@@ -159,6 +137,8 @@ CONFIG_EZ80_UART0=y
 # CONFIG_EZ80_UART2 is not set
 CONFIG_EZ80_EMAC=y
 CONFIG_EZ80_TOOLCHAIN_ZDSII=y
+# CONFIG_EZ80_ZDSII_V511 is not set
+CONFIG_EZ80_ZDSII_V521=y
 CONFIG_EZ80_FIAD=0x1f
 CONFIG_EZ80_PHYCONFIG=1
 CONFIG_EZ80_RAMADDR=0xf7c000
@@ -168,6 +148,7 @@ CONFIG_EZ80_NRXPKTBUFS=64
 CONFIG_EZ80_MDCDIV=0
 CONFIG_EZ80_TXPOLLTIMERMS=10
 # CONFIG_ARCH_MCFILTER is not set
+CONFIG_EZ80_EMAC_HPWORK=y
 CONFIG_ARCH_TIMERHOOK=y
 
 #
@@ -181,6 +162,7 @@ CONFIG_ARCH_TIMERHOOK=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 # CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -225,7 +207,6 @@ CONFIG_RAM_SIZE=65536
 #
 # Board Selection
 #
-# CONFIG_ARCH_BOARD_EZ80F910200KITG is not set
 CONFIG_ARCH_BOARD_EZ80F910200ZCO=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="ez80f910200zco"
@@ -241,6 +222,7 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -259,6 +241,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=3
@@ -313,6 +296,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -321,13 +305,17 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 # CONFIG_MODULE is not set
 
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -345,6 +333,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -360,12 +349,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -373,14 +366,26 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -396,7 +401,6 @@ CONFIG_NETDEVICES=y
 CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NETDEV_STATISTICS is not set
 # CONFIG_NETDEV_LATEINIT is not set
-# CONFIG_NET_DUMPPACKET is not set
 
 #
 # External Ethernet MAC Device Support
@@ -404,10 +408,8 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -427,14 +429,14 @@ CONFIG_ETH0_PHY_AM79C874=y
 # CONFIG_ETH0_PHY_LAN8740A is not set
 # CONFIG_ETH0_PHY_LAN8742A is not set
 # CONFIG_ETH0_PHY_DM9161 is not set
-# CONFIG_NETDEV_PHY_DEBUG is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -458,15 +460,10 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
-# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -484,19 +481,26 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
 # CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -504,13 +508,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -590,7 +592,6 @@ CONFIG_NET_ARPTAB_SIZE=16
 CONFIG_NET_ARP_MAXAGE=120
 # CONFIG_NET_ARP_IPIN is not set
 # CONFIG_NET_ARP_SEND is not set
-# CONFIG_NET_ARP_DUMP is not set
 
 #
 # Network I/O Buffer Support
@@ -599,7 +600,6 @@ CONFIG_NET_IOB=y
 CONFIG_IOB_NBUFFERS=24
 CONFIG_IOB_BUFSIZE=196
 CONFIG_IOB_NCHAINS=8
-# CONFIG_IOB_DEBUG is not set
 # CONFIG_NET_ARCH_INCR32 is not set
 # CONFIG_NET_ARCH_CHKSUM is not set
 CONFIG_NET_STATISTICS=y
@@ -631,12 +631,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -657,6 +651,10 @@ CONFIG_HEAP2_SIZE=0
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -674,7 +672,7 @@ CONFIG_HEAP2_SIZE=0
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -682,6 +680,8 @@ CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -696,14 +696,16 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -722,18 +724,19 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -743,37 +746,36 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
 CONFIG_EXAMPLES_WEBSERVER=y
 CONFIG_EXAMPLES_WEBSERVER_IPADDR=0x0a000002
 CONFIG_EXAMPLES_WEBSERVER_DRIPADDR=0x0a000001
 CONFIG_EXAMPLES_WEBSERVER_NETMASK=0xffffff00
 CONFIG_EXAMPLES_WEBSERVER_NOMAC=y
-# CONFIG_EXAMPLES_USBSERIAL is not set
-# CONFIG_EXAMPLES_USBTERM is not set
-# CONFIG_EXAMPLES_WATCHDOG is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
@@ -781,6 +783,11 @@ CONFIG_EXAMPLES_WEBSERVER_NOMAC=y
 #
 # CONFIG_FSUTILS_INIFILE is not set
 
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -791,8 +798,9 @@ CONFIG_EXAMPLES_WEBSERVER_NOMAC=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -803,11 +811,12 @@ CONFIG_EXAMPLES_WEBSERVER_NOMAC=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 CONFIG_NETUTILS_WEBSERVER=y
 # CONFIG_NETUTILS_HTTPD_SINGLECONNECT is not set
@@ -840,16 +849,17 @@ CONFIG_NETUTILS_HTTPD_KEEPALIVE_DISABLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/ez80f910200zco/nettest/defconfig b/configs/ez80f910200zco/nettest/defconfig
index 66eb97ef721233512b70adbbedf1de2d19c9acac..4476ee44afe19f5a86016e309741c02fba6f4c30 100644
--- a/configs/ez80f910200zco/nettest/defconfig
+++ b/configs/ez80f910200zco/nettest/defconfig
@@ -46,34 +46,10 @@ CONFIG_BUILD_FLAT=y
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_AUDIO is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_NET is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_LEDS is not set
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 # CONFIG_DEBUG_NOOPT is not set
@@ -86,10 +62,12 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 CONFIG_ARCH_Z80=y
 CONFIG_ARCH="z80"
@@ -159,6 +137,8 @@ CONFIG_EZ80_UART0=y
 # CONFIG_EZ80_UART2 is not set
 CONFIG_EZ80_EMAC=y
 CONFIG_EZ80_TOOLCHAIN_ZDSII=y
+# CONFIG_EZ80_ZDSII_V511 is not set
+CONFIG_EZ80_ZDSII_V521=y
 CONFIG_EZ80_FIAD=0x1f
 CONFIG_EZ80_PHYCONFIG=1
 CONFIG_EZ80_RAMADDR=0xf7c000
@@ -168,6 +148,7 @@ CONFIG_EZ80_NRXPKTBUFS=64
 CONFIG_EZ80_MDCDIV=0
 CONFIG_EZ80_TXPOLLTIMERMS=10
 # CONFIG_ARCH_MCFILTER is not set
+CONFIG_EZ80_EMAC_HPWORK=y
 CONFIG_ARCH_TIMERHOOK=y
 
 #
@@ -181,6 +162,7 @@ CONFIG_ARCH_TIMERHOOK=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 # CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -225,7 +207,6 @@ CONFIG_RAM_SIZE=65536
 #
 # Board Selection
 #
-# CONFIG_ARCH_BOARD_EZ80F910200KITG is not set
 CONFIG_ARCH_BOARD_EZ80F910200ZCO=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="ez80f910200zco"
@@ -241,6 +222,7 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -259,6 +241,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=3
@@ -307,6 +290,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -314,13 +298,17 @@ CONFIG_NAME_MAX=32
 CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGWORK=17
 # CONFIG_MODULE is not set
 
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -338,6 +326,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=1024
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -353,12 +342,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -366,14 +359,26 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -388,7 +393,6 @@ CONFIG_NETDEVICES=y
 # CONFIG_NETDEV_MULTINIC is not set
 CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NETDEV_LATEINIT is not set
-# CONFIG_NET_DUMPPACKET is not set
 
 #
 # External Ethernet MAC Device Support
@@ -396,10 +400,8 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -419,14 +421,14 @@ CONFIG_ETH0_PHY_AM79C874=y
 # CONFIG_ETH0_PHY_LAN8740A is not set
 # CONFIG_ETH0_PHY_LAN8742A is not set
 # CONFIG_ETH0_PHY_DM9161 is not set
-# CONFIG_NETDEV_PHY_DEBUG is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -450,15 +452,10 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
-# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -476,19 +473,26 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
 # CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -496,13 +500,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -582,7 +584,6 @@ CONFIG_NET_ARPTAB_SIZE=16
 CONFIG_NET_ARP_MAXAGE=120
 # CONFIG_NET_ARP_IPIN is not set
 # CONFIG_NET_ARP_SEND is not set
-# CONFIG_NET_ARP_DUMP is not set
 
 #
 # Network I/O Buffer Support
@@ -591,7 +592,6 @@ CONFIG_NET_IOB=y
 CONFIG_IOB_NBUFFERS=24
 CONFIG_IOB_BUFSIZE=196
 CONFIG_IOB_NCHAINS=8
-# CONFIG_IOB_DEBUG is not set
 # CONFIG_NET_ARCH_INCR32 is not set
 # CONFIG_NET_ARCH_CHKSUM is not set
 # CONFIG_NET_STATISTICS is not set
@@ -623,12 +623,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -649,6 +643,10 @@ CONFIG_HEAP2_SIZE=0
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -666,7 +664,7 @@ CONFIG_HEAP2_SIZE=0
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -674,6 +672,8 @@ CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -688,14 +688,16 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -714,18 +716,19 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -748,33 +751,32 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
@@ -782,6 +784,11 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 #
 # CONFIG_FSUTILS_INIFILE is not set
 
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -792,8 +799,9 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -804,11 +812,12 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
@@ -830,16 +839,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/ez80f910200zco/nsh/defconfig b/configs/ez80f910200zco/nsh/defconfig
index 4ddd6319825d612e6233e33823ffc36cbd5963f0..5535e7104d5733c6d8aba2f3981d6020786f0368 100644
--- a/configs/ez80f910200zco/nsh/defconfig
+++ b/configs/ez80f910200zco/nsh/defconfig
@@ -46,34 +46,10 @@ CONFIG_BUILD_FLAT=y
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_AUDIO is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_NET is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_LEDS is not set
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 # CONFIG_DEBUG_NOOPT is not set
@@ -86,10 +62,12 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 CONFIG_ARCH_Z80=y
 CONFIG_ARCH="z80"
@@ -159,6 +137,8 @@ CONFIG_EZ80_UART0=y
 # CONFIG_EZ80_UART2 is not set
 CONFIG_EZ80_EMAC=y
 CONFIG_EZ80_TOOLCHAIN_ZDSII=y
+# CONFIG_EZ80_ZDSII_V511 is not set
+CONFIG_EZ80_ZDSII_V521=y
 CONFIG_EZ80_FIAD=0x1f
 CONFIG_EZ80_PHYCONFIG=1
 CONFIG_EZ80_RAMADDR=0xf7c000
@@ -168,6 +148,7 @@ CONFIG_EZ80_NRXPKTBUFS=64
 CONFIG_EZ80_MDCDIV=0
 CONFIG_EZ80_TXPOLLTIMERMS=10
 # CONFIG_ARCH_MCFILTER is not set
+CONFIG_EZ80_EMAC_HPWORK=y
 CONFIG_ARCH_TIMERHOOK=y
 
 #
@@ -181,6 +162,7 @@ CONFIG_ARCH_TIMERHOOK=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 # CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -225,7 +207,6 @@ CONFIG_RAM_SIZE=65536
 #
 # Board Selection
 #
-# CONFIG_ARCH_BOARD_EZ80F910200KITG is not set
 CONFIG_ARCH_BOARD_EZ80F910200ZCO=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="ez80f910200zco"
@@ -237,11 +218,11 @@ CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -260,6 +241,7 @@ CONFIG_DISABLE_MQUEUE=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=3
@@ -314,6 +296,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -322,13 +305,17 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 # CONFIG_MODULE is not set
 
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -346,6 +333,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=1024
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -361,12 +349,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -374,14 +366,26 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -399,7 +403,6 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NETDEV_STATISTICS is not set
 # CONFIG_NETDEV_LATEINIT is not set
-# CONFIG_NET_DUMPPACKET is not set
 
 #
 # External Ethernet MAC Device Support
@@ -407,10 +410,8 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -430,14 +431,14 @@ CONFIG_ETH0_PHY_AM79C874=y
 # CONFIG_ETH0_PHY_LAN8740A is not set
 # CONFIG_ETH0_PHY_LAN8742A is not set
 # CONFIG_ETH0_PHY_DM9161 is not set
-# CONFIG_NETDEV_PHY_DEBUG is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -461,16 +462,11 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
-# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -488,19 +484,26 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
 # CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -508,13 +511,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -599,7 +600,6 @@ CONFIG_NET_ARPTAB_SIZE=16
 CONFIG_NET_ARP_MAXAGE=120
 # CONFIG_NET_ARP_IPIN is not set
 # CONFIG_NET_ARP_SEND is not set
-# CONFIG_NET_ARP_DUMP is not set
 
 #
 # Network I/O Buffer Support
@@ -608,7 +608,6 @@ CONFIG_NET_IOB=y
 CONFIG_IOB_NBUFFERS=24
 CONFIG_IOB_BUFSIZE=196
 CONFIG_IOB_NCHAINS=8
-# CONFIG_IOB_DEBUG is not set
 # CONFIG_NET_ARCH_INCR32 is not set
 # CONFIG_NET_ARCH_CHKSUM is not set
 CONFIG_NET_STATISTICS=y
@@ -647,12 +646,6 @@ CONFIG_NET_HOSTNAME=""
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -673,6 +666,10 @@ CONFIG_HEAP2_SIZE=0
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -700,6 +697,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -715,7 +714,7 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
 CONFIG_LIBC_NETDB=y
 CONFIG_NETDB_DNSCLIENT=y
 CONFIG_NETDB_DNSCLIENT_ENTRIES=4
@@ -728,8 +727,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -748,18 +749,20 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -769,36 +772,34 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
@@ -806,6 +807,11 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_FSUTILS_INIFILE is not set
 
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -816,8 +822,9 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -830,20 +837,21 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -868,6 +876,7 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
 # CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
@@ -893,13 +902,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -917,6 +926,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -942,8 +952,8 @@ CONFIG_NSH_CONSOLE=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
-# CONFIG_NSH_NETINIT_DEBUG is not set
 
 #
 # IP Address Configuration
@@ -987,12 +997,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1001,6 +1011,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/ez80f910200zco/poll/defconfig b/configs/ez80f910200zco/poll/defconfig
index b8effce8d09057c96914f52328c370b996fe13d9..74c3f5ea3c1b6adadd016956f26d0297dea9c120 100644
--- a/configs/ez80f910200zco/poll/defconfig
+++ b/configs/ez80f910200zco/poll/defconfig
@@ -46,34 +46,10 @@ CONFIG_BUILD_FLAT=y
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_AUDIO is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_NET is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_LEDS is not set
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 # CONFIG_DEBUG_NOOPT is not set
@@ -86,10 +62,12 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 CONFIG_ARCH_Z80=y
 CONFIG_ARCH="z80"
@@ -159,6 +137,8 @@ CONFIG_EZ80_UART0=y
 # CONFIG_EZ80_UART2 is not set
 CONFIG_EZ80_EMAC=y
 CONFIG_EZ80_TOOLCHAIN_ZDSII=y
+# CONFIG_EZ80_ZDSII_V511 is not set
+CONFIG_EZ80_ZDSII_V521=y
 CONFIG_EZ80_FIAD=0x1f
 CONFIG_EZ80_PHYCONFIG=1
 CONFIG_EZ80_RAMADDR=0xf7c000
@@ -168,6 +148,7 @@ CONFIG_EZ80_NRXPKTBUFS=64
 CONFIG_EZ80_MDCDIV=0
 CONFIG_EZ80_TXPOLLTIMERMS=10
 # CONFIG_ARCH_MCFILTER is not set
+CONFIG_EZ80_EMAC_HPWORK=y
 CONFIG_ARCH_TIMERHOOK=y
 
 #
@@ -181,6 +162,7 @@ CONFIG_ARCH_TIMERHOOK=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 # CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -225,7 +207,6 @@ CONFIG_RAM_SIZE=65536
 #
 # Board Selection
 #
-# CONFIG_ARCH_BOARD_EZ80F910200KITG is not set
 CONFIG_ARCH_BOARD_EZ80F910200ZCO=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="ez80f910200zco"
@@ -241,6 +222,7 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -259,6 +241,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=3
@@ -313,6 +296,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -321,13 +305,17 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 # CONFIG_MODULE is not set
 
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -345,6 +333,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=1024
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -360,12 +349,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -373,14 +366,26 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -395,7 +400,6 @@ CONFIG_NETDEVICES=y
 # CONFIG_NETDEV_MULTINIC is not set
 CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NETDEV_LATEINIT is not set
-# CONFIG_NET_DUMPPACKET is not set
 
 #
 # External Ethernet MAC Device Support
@@ -403,10 +407,8 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -426,14 +428,17 @@ CONFIG_ETH0_PHY_AM79C874=y
 # CONFIG_ETH0_PHY_LAN8740A is not set
 # CONFIG_ETH0_PHY_LAN8742A is not set
 # CONFIG_ETH0_PHY_DM9161 is not set
-# CONFIG_NETDEV_PHY_DEBUG is not set
-# CONFIG_PIPES is not set
+CONFIG_PIPES=y
+CONFIG_DEV_PIPE_MAXSIZE=1024
+CONFIG_DEV_PIPE_SIZE=1024
+CONFIG_DEV_FIFO_SIZE=1024
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -457,15 +462,10 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
-# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -483,19 +483,26 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
 # CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -503,13 +510,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -589,7 +594,6 @@ CONFIG_NET_ARPTAB_SIZE=16
 CONFIG_NET_ARP_MAXAGE=120
 # CONFIG_NET_ARP_IPIN is not set
 # CONFIG_NET_ARP_SEND is not set
-# CONFIG_NET_ARP_DUMP is not set
 
 #
 # Network I/O Buffer Support
@@ -598,7 +602,6 @@ CONFIG_NET_IOB=y
 CONFIG_IOB_NBUFFERS=24
 CONFIG_IOB_BUFSIZE=196
 CONFIG_IOB_NCHAINS=8
-# CONFIG_IOB_DEBUG is not set
 # CONFIG_NET_ARCH_INCR32 is not set
 # CONFIG_NET_ARCH_CHKSUM is not set
 # CONFIG_NET_STATISTICS is not set
@@ -630,12 +633,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -656,6 +653,10 @@ CONFIG_HEAP2_SIZE=0
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -673,7 +674,7 @@ CONFIG_HEAP2_SIZE=0
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -681,6 +682,8 @@ CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -695,14 +698,16 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -721,6 +726,8 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
@@ -729,10 +736,10 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -742,11 +749,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
@@ -756,23 +763,24 @@ CONFIG_EXAMPLES_POLL_NOMAC=y
 CONFIG_EXAMPLES_POLL_IPADDR=0x0a000002
 CONFIG_EXAMPLES_POLL_DRIPADDR=0x0a000001
 CONFIG_EXAMPLES_POLL_NETMASK=0xffffff00
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
@@ -781,6 +789,11 @@ CONFIG_EXAMPLES_POLL_NETMASK=0xffffff00
 #
 # CONFIG_FSUTILS_INIFILE is not set
 
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -791,8 +804,9 @@ CONFIG_EXAMPLES_POLL_NETMASK=0xffffff00
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -804,12 +818,13 @@ CONFIG_EXAMPLES_POLL_NETMASK=0xffffff00
 #
 # CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
@@ -831,16 +846,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/ez80f910200zco/src/ez80_buttons.c b/configs/ez80f910200zco/src/ez80_buttons.c
index 1fbfdcf2ad886d7eecba367844e4581b0f333fca..6bc2aa9462bac1d5e80cebd210d2190ae1890468 100644
--- a/configs/ez80f910200zco/src/ez80_buttons.c
+++ b/configs/ez80f910200zco/src/ez80_buttons.c
@@ -126,9 +126,9 @@ void board_button_initialize(void)
 
   /* Attach GIO interrupts */
 
-  irq_attach(EZ80_PB_IRQ, up_PBinterrupt);
-  irq_attach(EZ80_PB1_IRQ, up_pb1interrupt);
-  irq_attach(EZ80_PB2_IRQ, up_pb2interrupt);
+  irq_attach(EZ80_PB_IRQ, up_PBinterrupt, NULL);
+  irq_attach(EZ80_PB1_IRQ, up_pb1interrupt, NULL);
+  irq_attach(EZ80_PB2_IRQ, up_pb2interrupt, NULL);
 
   /* Configure PB0,1,2 as interrupt, rising edge */
 
diff --git a/configs/fire-stm32v2/README.txt b/configs/fire-stm32v2/README.txt
index 3af6249e505509a87651e64b831445f76b48898f..3afb8126d3b16b596d902e1a8d57f5ec781ee95c 100644
--- a/configs/fire-stm32v2/README.txt
+++ b/configs/fire-stm32v2/README.txt
@@ -734,12 +734,12 @@ M3 Wildfire-specific Configuration Options
     CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance.
       Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
 
-    CONFIG_SDIO_DMA - Support DMA data transfers.  Requires CONFIG_STM32_SDIO
-      and CONFIG_STM32_DMA2.
-    CONFIG_SDIO_PRI - Select SDIO interrupt prority.  Default: 128
-    CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
+    CONFIG_STM32_SDIO_DMA - Support DMA data transfers.  Requires
+      CONFIG_STM32_SDIO and CONFIG_STM32_DMA2.
+    CONFIG_STM32_SDIO_PRI - Select SDIO interrupt prority.  Default: 128
+    CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
       Default:  Medium
-    CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode.  Default:
+    CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode.  Default:
       4-bit transfer mode.
 
   M3 Wildfire CAN Configuration
@@ -758,7 +758,7 @@ M3 Wildfire-specific Configuration Options
     CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
     CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
     CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
-    CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+    CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
       dump of all CAN registers.
 
   M3 Wildfire LCD Hardware Configuration
diff --git a/configs/fire-stm32v2/include/board.h b/configs/fire-stm32v2/include/board.h
index 880ea6d6c7de7f224cfe1a983790f4cf503ca59d..3807bff43c8402779bbc9667b7d500a99106fe30 100644
--- a/configs/fire-stm32v2/include/board.h
+++ b/configs/fire-stm32v2/include/board.h
@@ -2,7 +2,7 @@
  * configs/fire-stm32v2/include/board.h
  * include/arch/board/board.h
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -103,14 +103,14 @@
 #define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd2
 #define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
 
-/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */
+/* APB1 timers 2-7 will be twice PCLK1 */
 
 #define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM5_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM6_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM7_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 
 /* USB divider -- Divide PLL clock by 1.5 */
 
@@ -120,8 +120,14 @@
  * otherwise frequency is 2xAPBx.
  * Note: TIM1,8 are on APB2, others on APB1 */
 
-#define STM32_TIM18_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_TIM27_FREQUENCY   STM32_HCLK_FREQUENCY
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM3_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM4_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM5_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM6_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM7_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM8_FREQUENCY    STM32_HCLK_FREQUENCY
 
 /* SDIO dividers.  Note that slower clocking is required when DMA is disabled
  * in order to avoid RX overrun/TX underrun errors due to delayed responses
@@ -137,7 +143,7 @@
  * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz
  */
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_STM32_SDIO_DMA
 #  define SDIO_MMCXFR_CLKDIV    (2 << SDIO_CLKCR_CLKDIV_SHIFT)
 #else
 #  define SDIO_MMCXFR_CLKDIV    (3 << SDIO_CLKCR_CLKDIV_SHIFT)
@@ -147,7 +153,7 @@
  * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz
  */
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_STM32_SDIO_DMA
 #  define SDIO_SDXFR_CLKDIV     (1 << SDIO_CLKCR_CLKDIV_SHIFT)
 #else
 #  define SDIO_SDXFR_CLKDIV     (3 << SDIO_CLKCR_CLKDIV_SHIFT)
@@ -365,7 +371,8 @@
 #undef EXTERN
 #if defined(__cplusplus)
 #define EXTERN extern "C"
-extern "C" {
+extern "C"
+{
 #else
 #define EXTERN extern
 #endif
@@ -400,5 +407,10 @@ void stm32_boardinitialize(void);
 void fire_lcdclear(uint16_t color);
 #endif
 
+#if defined(__cplusplus)
+}
+#endif
+#undef EXTERN
+
 #endif /* __ASSEMBLY__ */
 #endif  /* __CONFIGS_FIRE_STM32V2_INCLUDE_BOARD_H */
diff --git a/configs/fire-stm32v2/nsh/Make.defs b/configs/fire-stm32v2/nsh/Make.defs
index 6c57737576b52a6a34854c4c88b2f0f6d4d40ad7..a9dd58a11e6bd44612ddb3658e911cbfaac719cc 100644
--- a/configs/fire-stm32v2/nsh/Make.defs
+++ b/configs/fire-stm32v2/nsh/Make.defs
@@ -82,7 +82,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/fire-stm32v2/nsh/defconfig b/configs/fire-stm32v2/nsh/defconfig
index c45b204918de71bde09695eb5fe6cb088b150d7c..3495a7f0b8cd48410f427da04ad9227deafd6bfe 100644
--- a/configs/fire-stm32v2/nsh/defconfig
+++ b/configs/fire-stm32v2/nsh/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +67,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +82,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -107,7 +112,9 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -153,8 +160,6 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # STM32 Configuration Options
@@ -209,6 +214,7 @@ CONFIG_SDIO_DMA=y
 CONFIG_ARCH_CHIP_STM32F103VE=y
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -356,6 +362,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 CONFIG_STM32_HAVE_DAC1=y
@@ -424,6 +436,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_DMACAPABLE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -435,12 +453,20 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -465,7 +491,9 @@ CONFIG_STM32_I2CTIMEOTICKS=500
 #
 # SDIO Configuration
 #
-CONFIG_SDIO_DMAPRIO=0x00001000
+CONFIG_STM32_SDIO_DMA=y
+CONFIG_STM32_SDIO_DMAPRIO=0x00001000
+# CONFIG_STM32_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_STM32_HAVE_RTC_COUNTER=y
 # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
 CONFIG_RTC_LSECLOCK=y
@@ -561,9 +589,6 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Board-Specific Options
@@ -574,13 +599,12 @@ CONFIG_NSH_MMCSDSPIPORTNO=0
 #
 CONFIG_ARCH_BOARD_FIRE_STM32V2=y
 # CONFIG_ARCH_BOARD_FIRE_STM32V3 is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -597,9 +621,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=16
@@ -609,6 +636,7 @@ CONFIG_PREALLOC_TIMERS=8
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -625,6 +653,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -694,6 +724,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -714,19 +745,25 @@ CONFIG_I2C_POLLED=y
 # CONFIG_I2C_TRACE is not set
 CONFIG_I2C_DRIVER=y
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 # CONFIG_RTC_DATETIME is not set
 # CONFIG_RTC_HIRES is not set
@@ -740,8 +777,18 @@ CONFIG_RTC=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -749,6 +796,7 @@ CONFIG_RTC=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -759,11 +807,13 @@ CONFIG_MMCSD_SPI=y
 CONFIG_MMCSD_SPICLOCK=20000000
 CONFIG_MMCSD_SPIMODE=0
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y
 CONFIG_MMCSD_SDIO=y
 CONFIG_SDIO_PREFLIGHT=y
 # CONFIG_SDIO_MUXBUS is not set
 # CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 # CONFIG_SDIO_BLOCKSETUP is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -790,20 +840,20 @@ CONFIG_ENC28J60=y
 CONFIG_ENC28J60_NINTERFACES=1
 CONFIG_ENC28J60_SPIMODE=0
 CONFIG_ENC28J60_FREQUENCY=20000000
+CONFIG_ENC28J60_HPWORK=y
 # CONFIG_ENC28J60_HALFDUPPLEX is not set
 # CONFIG_ENC28J60_DUMPPACKET is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -863,6 +913,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -900,17 +951,23 @@ CONFIG_USBMSC_REMOVABLE=y
 CONFIG_USBMSC_SCSI_PRIO=128
 CONFIG_USBMSC_SCSI_STACKSIZE=2048
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -918,13 +975,11 @@ CONFIG_USBMSC_SCSI_STACKSIZE=2048
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -1064,12 +1119,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1114,11 +1163,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1136,9 +1202,11 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -1153,8 +1221,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1178,19 +1248,21 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1200,26 +1272,25 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1227,11 +1298,10 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1255,8 +1325,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1269,21 +1340,21 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1336,13 +1407,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1360,11 +1431,15 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Configure Command Options
 #
 CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_FILEIOSIZE=512
@@ -1385,6 +1460,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1429,11 +1505,11 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=1
 CONFIG_I2CTOOL_MAXBUS=2
@@ -1441,7 +1517,7 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=100000
-# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1450,7 +1526,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
 CONFIG_SYSTEM_USBMSC=y
 CONFIG_SYSTEM_USBMSC_NLUNS=1
@@ -1463,4 +1540,5 @@ CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2"
 # CONFIG_SYSTEM_USBMSC_DEBUGMM is not set
 CONFIG_SYSTEM_USBMSC_CMD_STACKSIZE=768
 CONFIG_SYSTEM_USBMSC_CMD_PRIORITY=100
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/fire-stm32v2/src/stm32_appinit.c b/configs/fire-stm32v2/src/stm32_appinit.c
index e8711ef204a3925fa0ed4b3f8b7cf9e83cdda6e4..aa962b5b77e84b955eeaf8d8bceb0360a9383c37 100644
--- a/configs/fire-stm32v2/src/stm32_appinit.c
+++ b/configs/fire-stm32v2/src/stm32_appinit.c
@@ -147,14 +147,14 @@ static void stm32_i2c_register(int bus)
   i2c = stm32_i2cbus_initialize(bus);
   if (i2c == NULL)
     {
-      dbg("ERROR: Failed to get I2C%d interface\n", bus);
+      _err("ERROR: Failed to get I2C%d interface\n", bus);
     }
   else
     {
       ret = i2c_register(i2c, bus);
       if (ret < 0)
         {
-          dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
+          _err("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
           stm32_i2cbus_uninitialize(i2c);
         }
     }
diff --git a/configs/fire-stm32v2/src/stm32_autoleds.c b/configs/fire-stm32v2/src/stm32_autoleds.c
index 82501996013ccb66ca243d5712c8c2ca1fdff1b3..b61c84013b40729a26f49029ca30c7b58efc9c2c 100644
--- a/configs/fire-stm32v2/src/stm32_autoleds.c
+++ b/configs/fire-stm32v2/src/stm32_autoleds.c
@@ -57,18 +57,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* The following definitions map the encoded LED setting to GPIO settings.
  *
  * OFFBITS    ONBITS
diff --git a/configs/fire-stm32v2/src/stm32_buttons.c b/configs/fire-stm32v2/src/stm32_buttons.c
index fe1d35f5165cd65ec4ed6ec96a43ad5c365fc485..d2dd07cd8ef3bcab9fea469f4de18e645ad042b8 100644
--- a/configs/fire-stm32v2/src/stm32_buttons.c
+++ b/configs/fire-stm32v2/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/fire-stm32v2/src/stm32_buttons.c
  *
- *   Copyright (C) 2012, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -128,15 +129,15 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See
  *   the BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of
- *   enumeration values.  The previous interrupt handler address is returned
- *   (so that it may restored, if so desired).
+ *   enumeration values.
  *
  ****************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
   uint16_t gpio;
+  int ret;
 
   if (id == BUTTON_KEY1)
     {
@@ -148,10 +149,10 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
     }
   else
     {
-      return NULL;
+      return -EINVAL;
     }
 
-  return stm32_gpiosetevent(gpio, true, true, true, irqhandler);
+  return stm32_gpiosetevent(gpio, true, true, true, irqhandler, arg);
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/fire-stm32v2/src/stm32_enc28j60.c b/configs/fire-stm32v2/src/stm32_enc28j60.c
index 40d7954b69cc818f178918d399dc1df9659a78a4..9ac4040e4ba8acdacae4ee8a9531d7f55b923961 100644
--- a/configs/fire-stm32v2/src/stm32_enc28j60.c
+++ b/configs/fire-stm32v2/src/stm32_enc28j60.c
@@ -159,12 +159,14 @@ static void up_enable(FAR const struct enc_lower_s *lower)
   FAR struct stm32_lower_s *priv = (FAR struct stm32_lower_s *)lower;
 
   DEBUGASSERT(priv->handler);
-  (void)stm32_gpiosetevent(GPIO_ENC28J60_INTR, false, true, true, priv->handler);
+  (void)stm32_gpiosetevent(GPIO_ENC28J60_INTR, false, true, true,
+                           priv->handler, NULL);
 }
 
 static void up_disable(FAR const struct enc_lower_s *lower)
 {
-  (void)stm32_gpiosetevent(GPIO_ENC28J60_INTR, false, true, true, NULL);
+  (void)stm32_gpiosetevent(GPIO_ENC28J60_INTR, false, true, true,
+                           NULL, NULL);
 }
 
 /****************************************************************************
@@ -188,7 +190,7 @@ void up_netinitialize(void)
   spi = stm32_spibus_initialize(ENC28J60_SPI_PORTNO);
   if (!spi)
     {
-      nlldbg("Failed to initialize SPI port %d\n", ENC28J60_SPI_PORTNO);
+      nerr("ERROR: Failed to initialize SPI port %d\n", ENC28J60_SPI_PORTNO);
       return;
     }
 
@@ -201,12 +203,12 @@ void up_netinitialize(void)
   ret = enc_initialize(spi, &g_enclower.lower, ENC28J60_DEVNO);
   if (ret < 0)
     {
-      nlldbg("Failed to bind SPI port %d ENC28J60 device %d: %d\n",
-             ENC28J60_SPI_PORTNO, ENC28J60_DEVNO, ret);
+      nerr("ERROR: Failed to bind SPI port %d ENC28J60 device %d: %d\n",
+           ENC28J60_SPI_PORTNO, ENC28J60_DEVNO, ret);
       return;
     }
 
-  nllvdbg("Bound SPI port %d to ENC28J60 device %d\n",
+  ninfo("Bound SPI port %d to ENC28J60 device %d\n",
         ENC28J60_SPI_PORTNO, ENC28J60_DEVNO);
 }
 
diff --git a/configs/fire-stm32v2/src/stm32_mmcsd.c b/configs/fire-stm32v2/src/stm32_mmcsd.c
index 356be40d55a0e64a8db2c80d15eebc13616135ce..a29276836c190a9535dfc3e05c19bf761f3264a1 100644
--- a/configs/fire-stm32v2/src/stm32_mmcsd.c
+++ b/configs/fire-stm32v2/src/stm32_mmcsd.c
@@ -93,22 +93,22 @@ int stm32_sdinitialize(int minor)
   sdio = sdio_initialize(STM32_MMCSDSLOTNO);
   if (!sdio)
     {
-      fdbg("Failed to initialize SDIO slot %d\n", STM32_MMCSDSLOTNO);
+      ferr("ERROR: Failed to initialize SDIO slot %d\n", STM32_MMCSDSLOTNO);
       return -ENODEV;
     }
 
-  fvdbg("Initialized SDIO slot %d\n", STM32_MMCSDSLOTNO);
+  finfo("Initialized SDIO slot %d\n", STM32_MMCSDSLOTNO);
 
   /* Now bind the SDIO interface to the MMC/SD driver */
 
   ret = mmcsd_slotinitialize(minor, sdio);
   if (ret != OK)
     {
-      fdbg("Failed to bind SDIO slot %d to the MMC/SD driver, minor=%d\n",
+      ferr("ERROR: Failed to bind SDIO slot %d to the MMC/SD driver, minor=%d\n",
               STM32_MMCSDSLOTNO, minor);
     }
 
-  fvdbg("Bound SDIO slot %d to the MMC/SD driver, minor=%d\n",
+  finfo("Bound SDIO slot %d to the MMC/SD driver, minor=%d\n",
          STM32_MMCSDSLOTNO, minor);
 
   /* Then let's guess and say that there is a card in the slot.  I need to check to
diff --git a/configs/fire-stm32v2/src/stm32_spi.c b/configs/fire-stm32v2/src/stm32_spi.c
index e5f049795728029ebfeb716bfbd135437f945349..8d28ceb07a551d7d675ae76b81d31a9c44f3859f 100644
--- a/configs/fire-stm32v2/src/stm32_spi.c
+++ b/configs/fire-stm32v2/src/stm32_spi.c
@@ -53,32 +53,6 @@
 
 #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -159,7 +133,7 @@ void weak_function stm32_spidev_initialize(void)
 #ifdef CONFIG_STM32_SPI1
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
 #if 0 /* Need to study this */
   if (devid == SPIDEV_LCD)
@@ -196,7 +170,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI2
 void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
   if (devid == SPIDEV_AUDIO)
     {
diff --git a/configs/fire-stm32v2/src/stm32_usbdev.c b/configs/fire-stm32v2/src/stm32_usbdev.c
index 5beea44b78ba620f2501536aa7606e2dec1320c0..ea3ee830545f849fafda28f4c119fdebb1443e1b 100644
--- a/configs/fire-stm32v2/src/stm32_usbdev.c
+++ b/configs/fire-stm32v2/src/stm32_usbdev.c
@@ -114,6 +114,5 @@ int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable)
 
 void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
-
diff --git a/configs/fire-stm32v2/src/stm32_userleds.c b/configs/fire-stm32v2/src/stm32_userleds.c
index 5d5adeb2ecb4630d7b24c22dc02dd5db015efb5e..a327df7fe80e396571503abbd91b98e051faad30 100644
--- a/configs/fire-stm32v2/src/stm32_userleds.c
+++ b/configs/fire-stm32v2/src/stm32_userleds.c
@@ -53,22 +53,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
@@ -79,10 +63,6 @@ static uint32_t g_ledcfg[BOARD_NLEDS] =
   GPIO_LED1, GPIO_LED2, GPIO_LED3
 };
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/fire-stm32v2/src/stm32_w25.c b/configs/fire-stm32v2/src/stm32_w25.c
index 3fad2929b24b183ae2448412f97b93a284f2805e..34940b5c62f122d6df8be34c464dc8994921b439 100644
--- a/configs/fire-stm32v2/src/stm32_w25.c
+++ b/configs/fire-stm32v2/src/stm32_w25.c
@@ -106,7 +106,7 @@ int stm32_w25initialize(int minor)
   spi = stm32_spibus_initialize(1);
   if (!spi)
     {
-      fdbg("ERROR: Failed to initialize SPI port 2\n");
+      ferr("ERROR: Failed to initialize SPI port 2\n");
       return -ENODEV;
     }
 
@@ -115,7 +115,7 @@ int stm32_w25initialize(int minor)
   mtd = w25_initialize(spi);
   if (!mtd)
     {
-      fdbg("ERROR: Failed to bind SPI port 2 to the SST 25 FLASH driver\n");
+      ferr("ERROR: Failed to bind SPI port 2 to the SST 25 FLASH driver\n");
       return -ENODEV;
     }
 
@@ -125,7 +125,7 @@ int stm32_w25initialize(int minor)
   ret = ftl_initialize(minor, mtd);
   if (ret < 0)
     {
-      fdbg("ERROR: Initialize the FTL layer\n");
+      ferr("ERROR: Initialize the FTL layer\n");
       return ret;
     }
 #else
@@ -134,7 +134,7 @@ int stm32_w25initialize(int minor)
   ret = nxffs_initialize(mtd);
   if (ret < 0)
     {
-      fdbg("ERROR: NXFFS initialization failed: %d\n", -ret);
+      ferr("ERROR: NXFFS initialization failed: %d\n", -ret);
       return ret;
     }
 
@@ -144,7 +144,7 @@ int stm32_w25initialize(int minor)
   ret = mount(NULL, devname, "nxffs", 0, NULL);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
+      ferr("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
       return ret;
     }
 #endif
diff --git a/configs/freedom-k64f/Kconfig b/configs/freedom-k64f/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..861309270324078f1b8a50f9b214cf909a8a20ee
--- /dev/null
+++ b/configs/freedom-k64f/Kconfig
@@ -0,0 +1,36 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_BOARD_FREEDOM_K64F
+
+config FRDMK64F_SDHC_AUTOMOUNT
+	bool "SDHC automounter"
+	default n
+	depends on FS_AUTOMOUNTER && KINETIS_SDHC
+
+if FRDMK64F_SDHC_AUTOMOUNT
+
+config FRDMK64F_SDHC_AUTOMOUNT_FSTYPE
+	string "SDHC file system type"
+	default "vfat"
+
+config FRDMK64F_SDHC_AUTOMOUNT_BLKDEV
+	string "SDHC block device"
+	default "/dev/mmcsd0"
+
+config FRDMK64F_SDHC_AUTOMOUNT_MOUNTPOINT
+	string "SDHC mount point"
+	default "/mnt/sdcard"
+
+config FRDMK64F_SDHC_AUTOMOUNT_DDELAY
+	int "SDHC debounce delay (milliseconds)"
+	default 1000
+
+config FRDMK64F_SDHC_AUTOMOUNT_UDELAY
+	int "SDHC unmount retry delay (milliseconds)"
+	default 2000
+
+endif # FRDMK64F_SDHC_AUTOMOUNT
+endif # ARCH_BOARD_FREEDOM_K64F
diff --git a/configs/freedom-k64f/README.txt b/configs/freedom-k64f/README.txt
new file mode 100644
index 0000000000000000000000000000000000000000..20d41d5713ae3e569bb8d1d0bda8722d4e759435
--- /dev/null
+++ b/configs/freedom-k64f/README.txt
@@ -0,0 +1,979 @@
+README.txt
+==========
+
+This is the README file for the port of NuttX to the Freescale Freedom-K64F
+develoment board.
+
+Contents
+========
+
+  o Freedom K64F Features
+  o Serial Console
+  o LEDs and Buttons
+  o Networking Support
+  o SD Card Support
+  o USB Device Controller Support
+  o Development Environment
+  o GNU Toolchain Options
+  o Freedom K64F Configuration Options
+  o Configurations
+  o Status
+
+Kinetis Freedom K64F Features:
+=============================
+
+  The features of the FRDM-K64F hardware are as follows:
+
+  - MK64FN1M0VLL12 MCU (120 MHz, 1 MB flash memory, 256 KB RAM, low-power,
+    crystal-less USB, and 100 LQFP)
+  - Dual role USB interface with micro-B USB connector
+  - RGB LED
+  - FXOS8700CQ - accelerometer and magnetometer
+  - Two user push buttons
+  - Flexible power supply option - OpenSDAv2 USB, K64 USB, and external
+    source
+  - Easy access to MCU input/output through Arduino R3TM compatible I/O
+    connectors
+  - Programmable OpenSDAv2 debug circuit supporting the CMSIS-DAP Interface
+    software that provides:
+    o Mass storage device (MSD) flash programming interface
+    o CMSIS-DAP debug interface over a driver-less USB HID connection
+       providing run-control debugging and compatibility with IDE tools
+    o Virtual serial port interface
+    o Open-source CMSIS-DAP software project: github.com/mbedmicro/CMSIS-DAP.
+  - Ethernet
+  - SDHC
+  - Add-on RF module: nRF24L01+ Nordic 2.4GHz Radio
+  - Add-on Bluetooth module: JY-MCU BT board V1.05 BT
+
+OpenSDAv2
+=========
+
+  The FRDM-K64F platform features OpenSDAv2, the Freescale open-source
+  hardware embedded serial and debug adapter running an open-source
+  bootloader. This circuit offers several options for serial communication,
+  flash programming, and run-control debugging. OpenSDAv2 is an mbed
+  HDK-compatible debug interface preloaded with the open-source CMSIS-DAP
+  Interface firmware (mbed interface) for rapid prototyping and product
+  development.
+  
+  To use set raw binary output for nuttx.bin
+
+Serial Console
+==============
+
+  USB VCOM Console
+  ----------------
+  The primary serial port interface signals are PTB16 UART0_RX and PTB17
+  UART0_TX. These signals are connected to the OpenSDAv2 VCOM circuit.
+
+  Serial Shield Console
+  ---------------------
+  An alternative serial port might use a standard serial shield mounted
+  on the Freedom Board.  In this case, Arduino pin D1 provides UART TX and
+  pin D0 privides UART RX.
+
+  The I/O headers on the FRDM-K64F board are arranged to enable
+  compatibility with Arduino shield. The outer rows of pins (even numbered
+  pins) on the headers, share the same mechanical spacing and placement with
+  the I/O headers on the Arduino Revision 3 (R3) standard.
+
+  The Arduino D0 and D1 pins then correspond to pins 2 and 4 on the J1 I/O
+  connector:
+
+    Arduino Pin              FRDM-K64F J1 Connector
+    ------------------------ -----------------------
+    UART TX, Arduino D1 pin  Pin 4, PTC17, UART3_TX
+    UART RX, Arduino D0 pin  Pin 2, PTC16, UART3_RX
+
+  Default Serial Console
+  ----------------------
+  By default, these configuration are setup to use the Serial Console on
+  UART3.  That, however, is easily reconfigured.
+
+LEDs and Buttons
+================
+
+  RGB LED
+  -------
+  An RGB LED is connected through GPIO as shown below:
+
+    LED    K64
+    ------ -------------------------------------------------------
+    RED    PTB22/SPI2_SOUT/FB_AD29/CMP2_OUT
+    BLUE   PTB21/SPI2_SCK/FB_AD30/CMP1_OUT
+    GREEN  PTE26/ENET_1588_CLKIN/UART4_CTS_b/RTC_CLKOUT/USB0_CLKIN
+
+  If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board the
+  Freedom KL25Z.  Usage of these LEDs is defined in include/board.h and
+  src/k64_leds.c.  The following definitions describe how NuttX controls the LEDs:
+
+    SYMBOL                Meaning                 LED state
+                                                  RED   GREEN  BLUE
+    -------------------  -----------------------  -----------------
+    LED_STARTED          NuttX has been started    OFF  OFF  OFF
+    LED_HEAPALLOCATE     Heap has been allocated   OFF  OFF  ON
+    LED_IRQSENABLED      Interrupts enabled        OFF  OFF  ON
+    LED_STACKCREATED     Idle stack created        OFF  ON   OFF
+    LED_INIRQ            In an interrupt          (no change)
+    LED_SIGNAL           In a signal handler      (no change)
+    LED_ASSERTION        An assertion failed      (no change)
+    LED_PANIC            The system has crashed    FLASH OFF OFF
+    LED_IDLE             K64 is in sleep mode     (Optional, not used)
+
+  Buttons
+  -------
+  Two push buttons, SW2 and SW3, are available on FRDM-K64F board, where
+  SW2 is connected to PTC6 and SW3 is connected to PTA4. Besides the
+  general purpose input/output functions, SW2 and SW3 can be low-power
+  wake up signal. Also, only SW3 can be a non-maskable interrupt.
+
+  Switch    GPIO Function
+  --------- ---------------------------------------------------------------
+  SW2       PTC6/SPI0_SOUT/PD0_EXTRG/I2S0_RX_BCLK/FB_AD9/I2S0_MCLK/LLWU_P10
+  SW3       PTA4/FTM0_CH1/NMI_b/LLWU_P3
+
+Networking Support
+==================
+
+  Ethernet MAC/KSZ8081 PHY
+  ------------------------
+  ------------ ----------------- --------------------------------------------
+  KSZ8081      Board Signal(s)   K64F Pin
+  Pin Signal                     Function                       pinmux Name
+  --- -------- ----------------- --------------------------------------------
+   1  VDD_1V2  VDDPLL_1.2V       ---                            ---
+   2  VDDA_3V3 VDDA_ENET         ---                            ---
+   3  RXM      ENET1_RX-         ---                            ---
+   4  RXP      ENET1_RX+         ---                            ---
+   5  TXM      ENET1_TX-         ---                            ---
+   6  TXP      ENET1_TX+         ---                            ---
+   7  X0       RMII_XTAL0        ---                            ---
+   8  XI       RMII_XTAL1        ---                            ---
+   9  REXT     ---               ---, Apparently not connected  ---
+  10  MDIO     RMII0_MDIO        PTB0/RMII0_MDIO                PIN_RMII0_MDIO
+  11  MDC      RMII0_MDC         PTB1/RMII0_MDC                 PIN_RMII0_MDC
+  12  RXD1     RMII0_RXD_1       PTA12/RMII0_RXD1               PIN_RMII0_RXD1
+  13  RXD0     RMII0_RXD_0       PTA13/RMII0_RXD0               PIN_RMII0_RXD0
+  14  VDDIO    VDDIO_ENET        ---                            ---
+  15  CRS_DIV                    PTA14/RMII0_CRS_DV             PIN_RMII0_CRS_DV
+  16  REF_CLK  RMII_RXCLK        PTA18/EXTAL0, PHY clock input  ---
+  17  RXER     RMII0_RXER        PTA5/RMII0_RXER                PIN_RMII0_RXER
+  18  INTRP    RMII0_INT_B,      J14 Pin 2, Apparently not      ---
+               PHY_INT_1         available unless jumpered
+  19  TXEN     RMII0_TXEN        PTA15/RMII0_TXEN               PIN_RMII0_TXEN
+  20  TXD0     RMII0_TXD_0       PTA16/RMII0_TXD0               PIN_RMII0_TXD0
+  21  TXD1     RMII0_TXD_1       PTA17/RMII0_TXD1               PIN_RMII0_TXD1
+  22  GND1     ---               ---                            ---
+  24  nRST     PHY_RST_B         ---                            ---
+  25  GND2     ---               ---                            ---
+  --- -------- ----------------- --------------------------------------------
+
+  No external pullup is available on MDIO signal when MK64FN1M0VLL12 MCU is
+  requests status of the Ethernet link connection. Internal pullup is required
+  when port configuration for MDIO signal is enabled:
+
+    CONFIG_KINETIS_ENET_MDIOPULLUP=y
+
+  Networking support via the can be added to NSH by selecting the following
+  configuration options.
+
+  Selecting the EMAC peripheral
+  -----------------------------
+
+  System Type -> Kinetis Peripheral Support
+    CONFIG_KINETIS_ENET=y               : Enable the EThernet MAC peripheral
+
+  System Type -> Ethernet Configuration
+    CONFIG_KINETIS_ENETNETHIFS=1
+    CONFIG_KINETIS_ENETNRXBUFFERS=6
+    CONFIG_KINETIS_ENETNTXBUFFERS=2
+    CONFIG_KINETIS_ENET_MDIOPULLUP=y
+
+  Networking Support
+    CONFIG_NET=y                        : Enable Neworking
+    CONFIG_NET_ETHERNET=y               : Support Ethernet data link
+    CONFIG_NET_SOCKOPTS=y               : Enable socket operations
+    CONFIG_NET_ETH_MTU=590              : Maximum packet size (MTU) 1518 is more standard
+    CONFIG_NET_ETH_TCP_RECVWNDO=536     : Should be the same as CONFIG_NET_ETH_MTU
+    CONFIG_NET_ARP=y                    : Enable ARP
+    CONFIG_NET_ARPTAB_SIZE=16           : ARP table size
+    CONFIG_NET_ARP_IPIN=y               : Enable ARP address harvesting
+    CONFIG_NET_ARP_SEND=y               : Send ARP request before sending data
+    CONFIG_NET_TCP=y                    : Enable TCP/IP networking
+    CONFIG_NET_TCP_READAHEAD=y          : Support TCP read-ahead
+    CONFIG_NET_TCP_WRITE_BUFFERS=y      : Support TCP write-buffering
+    CONFIG_NET_TCPBACKLOG=y             : Support TCP/IP backlog
+    CONFIG_NET_MAX_LISTENPORTS=20       :
+    CONFIG_NET_TCP_READAHEAD_BUFSIZE=536  Read-ahead buffer size
+    CONFIG_NET_UDP=y                    : Enable UDP networking
+    CONFIG_NET_BROADCAST=y              : Needed for DNS name resolution
+    CONFIG_NET_ICMP=y                   : Enable ICMP networking
+    CONFIG_NET_ICMP_PING=y              : Needed for NSH ping command
+                                        : Defaults should be okay for other options
+f Application Configuration -> Network Utilities
+    CONFIG_NETDB_DNSCLIENT=y               : Enable host address resolution
+    CONFIG_NETUTILS_TELNETD=y           : Enable the Telnet daemon
+    CONFIG_NETUTILS_TFTPC=y             : Enable TFTP data file transfers for get and put commands
+    CONFIG_NETUTILS_NETLIB=y            : Network library support is needed
+    CONFIG_NETUTILS_WEBCLIENT=y         : Needed for wget support
+                                        : Defaults should be okay for other options
+  Application Configuration -> NSH Library
+    CONFIG_NSH_TELNET=y                 : Enable NSH session via Telnet
+    CONFIG_NSH_IPADDR=0x0a000002        : Select a fixed IP address
+    CONFIG_NSH_DRIPADDR=0x0a000001      : IP address of gateway/host PC
+    CONFIG_NSH_NETMASK=0xffffff00       : Netmask
+    CONFIG_NSH_NOMAC=y                  : Need to make up a bogus MAC address
+                                        : Defaults should be okay for other options
+
+  You can also enable enable the DHCPC client for networks that use
+  dynamically assigned address:
+
+  Application Configuration -> Network Utilities
+    CONFIG_NETUTILS_DHCPC=y             : Enables the DHCP client
+
+  Networking Support
+    CONFIG_NET_UDP=y                    : Depends on broadcast UDP
+
+  Application Configuration -> NSH Library
+    CONFIG_NET_BROADCAST=y
+    CONFIG_NSH_DHCPC=y                  : Tells NSH to use DHCPC, not
+                                        : the fixed addresses
+
+  Using the network with NSH
+  --------------------------
+
+  So what can you do with this networking support?  First you see that
+  NSH has several new network related commands:
+
+    ifconfig, ifdown, ifup:  Commands to help manage your network
+    get and put:             TFTP file transfers
+    wget:                    HTML file transfers
+    ping:                    Check for access to peers on the network
+    Telnet console:          You can access the NSH remotely via telnet.
+
+  You can also enable other add on features like full FTP or a Web
+  Server or XML RPC and others.  There are also other features that
+  you can enable like DHCP client (or server) or network name
+  resolution.
+
+  By default, the IP address of the FRDM-K64F will be 10.0.0.2 and
+  it will assume that your host is the gateway and has the IP address
+  10.0.0.1.
+
+    nsh> ifconfig
+    eth0    HWaddr 00:e0:de:ad:be:ef at UP
+            IPaddr:10.0.0.2 DRaddr:10.0.0.1 Mask:255.255.255.0
+
+  You can use ping to test for connectivity to the host (Careful,
+  Window firewalls usually block ping-related ICMP traffic).  On the
+  target side, you can:
+
+    nsh> ping 10.0.0.1
+    PING 10.0.0.1 56 bytes of data
+    56 bytes from 10.0.0.1: icmp_seq=1 time=0 ms
+    56 bytes from 10.0.0.1: icmp_seq=2 time=0 ms
+    56 bytes from 10.0.0.1: icmp_seq=3 time=0 ms
+    56 bytes from 10.0.0.1: icmp_seq=4 time=0 ms
+    56 bytes from 10.0.0.1: icmp_seq=5 time=0 ms
+    56 bytes from 10.0.0.1: icmp_seq=6 time=0 ms
+    56 bytes from 10.0.0.1: icmp_seq=7 time=0 ms
+    56 bytes from 10.0.0.1: icmp_seq=8 time=0 ms
+    56 bytes from 10.0.0.1: icmp_seq=9 time=0 ms
+    56 bytes from 10.0.0.1: icmp_seq=10 time=0 ms
+    10 packets transmitted, 10 received, 0% packet loss, time 10100 ms
+
+  NOTE: In this configuration is is normal to have packet loss > 0%
+  the first time you ping due to the default handling of the ARP
+  table.
+
+  On the host side, you should also be able to ping the FRDM-K64F:
+
+    $ ping 10.0.0.2
+
+  You can also log into the NSH from the host PC like this:
+
+    $ telnet 10.0.0.2
+    Trying 10.0.0.2...
+    Connected to 10.0.0.2.
+    Escape character is '^]'.
+    sh_telnetmain: Session [3] Started
+
+    NuttShell (NSH) NuttX-6.31
+    nsh> help
+    help usage:  help [-v] []
+
+      [           echo        ifconfig    mkdir       mw          sleep
+      ?           exec        ifdown      mkfatfs     ping        test
+      cat         exit        ifup        mkfifo      ps          umount
+      cp          free        kill        mkrd        put         usleep
+      cmp         get         losetup     mh          rm          wget
+      dd          help        ls          mount       rmdir       xd
+      df          hexdump     mb          mv          sh
+
+    Builtin Apps:
+    nsh>
+
+  NOTE:  If you enable this networking as described above, you will
+  experience a delay on booting NSH.  That is because the start-up logic
+  waits for the network connection to be established before starting
+  NuttX.  In a real application, you would probably want to do the
+  network bringup on a separate thread so that access to the NSH prompt
+  is not delayed.
+
+  This delay will be especially long if the board is not connected to
+  a network.  On the order of minutes!  You will probably think that
+  NuttX has crashed!  And then, when it finally does come up after
+  numerous timeouts and retries, the network will not be available --
+  even if the network cable is plugged in later.
+
+  The long delays can be eliminated by using a separate the network
+  initialization thread discussed below.  Recovering after the network
+  becomes available requires the network monitor feature, also discussed
+  below.
+
+  Network Initialization Thread
+  -----------------------------
+  There is a configuration option enabled by CONFIG_NSH_NETINIT_THREAD
+  that will do the NSH network bring-up asynchronously in parallel on
+  a separate thread.  This eliminates the (visible) networking delay
+  altogether.  This current implementation, however, has some limitations:
+
+    - If no network is connected, the network bring-up will fail and
+      the network initialization thread will simply exit.  There are no
+      retries and no mechanism to know if the network initialization was
+      successful (it could perform a network Ioctl to see if the link is
+      up and it now, keep trying, but it does not do that now).
+
+    - Furthermore, there is currently no support for detecting loss of
+      network connection and recovery of the connection (similarly, this
+      thread could poll periodically for network status, but does not).
+
+  Both of these shortcomings could be eliminated by enabling the network
+  monitor:
+
+  Network Monitor
+  ---------------
+  By default the network initialization thread will bring-up the network
+  then exit, freeing all of the resources that it required.  This is a
+  good behavior for systems with limited memory.
+
+  If the CONFIG_NSH_NETINIT_MONITOR option is selected, however, then the
+  network initialization thread will persist forever; it will monitor the
+  network status.  In the event that the network goes down (for example, if
+  a cable is removed), then the thread will monitor the link status and
+  attempt to bring the network back up.  In this case the resources
+  required for network initialization are never released.
+
+  Pre-requisites:
+
+    - CONFIG_NSH_NETINIT_THREAD as described above.
+
+    - The K64F EMAC block does not support PHY interrupts.  The KSZ8081
+      PHY interrupt line is brought to a jumper block and it should be
+      possible to connect that some some interrupt port pin.  You would
+      need to provide some custom logic in the Freedcom K64F
+      configuration to set up that PHY interrupt.
+
+    - In addtion to the PHY interrupt, the Network Monitor also requires the
+      following setting:
+
+        CONFIG_NETDEV_PHY_IOCTL. Enable PHY IOCTL commands in the Ethernet
+        device driver. Special IOCTL commands must be provided by the Ethernet
+        driver to support certain PHY operations that will be needed for link
+        management. There operations are not complex and are implemented for
+        the Atmel SAMA5 family.
+
+        CONFIG_ARCH_PHY_INTERRUPT. This is not a user selectable option.
+        Rather, it is set when you select a board that supports PHY
+        interrupts.  For the K64F, like most other architectures, the PHY
+        interrupt must be provided via some board-specific GPIO.  In any
+        event, the board-specific logic must provide support for the PHY
+        interrupt. To do this, the board logic must do two things: (1) It
+        must provide the function arch_phy_irq() as described and prototyped
+        in the nuttx/include/nuttx/arch.h, and (2) it must select
+        CONFIG_ARCH_PHY_INTERRUPT in the board configuration file to
+        advertise that it supports arch_phy_irq().
+
+        And a few other things: UDP support is required (CONFIG_NET_UDP) and
+        signals must not be disabled (CONFIG_DISABLE_SIGNALS).
+
+  Given those prerequisites, the network monitor can be selected with these
+  additional settings.
+
+    System Type -> Kinetis Ethernet Configuration
+      CONFIG_ARCH_PHY_INTERRUPT=y           : (auto-selected)
+      CONFIG_NETDEV_PHY_IOCTL=y             : (auto-selected)
+
+    Application Configuration -> NSH Library -> Networking Configuration
+      CONFIG_NSH_NETINIT_THREAD             : Enable the network initialization thread
+      CONFIG_NSH_NETINIT_MONITOR=y          : Enable the network monitor
+      CONFIG_NSH_NETINIT_RETRYMSEC=2000     : Configure the network monitor as you like
+      CONFIG_NSH_NETINIT_SIGNO=18
+
+SD Card Support
+===============
+
+  Card Slot
+  ---------
+  A micro Secure Digital (SD) card slot is available on the FRDM-K64F connected to
+  the SD Host Controller (SDHC) signals of the MCU. This slot will accept micro
+  format SD memory cards. The SD card detect pin (PTE6) is an open switch that
+  shorts with VDD when card is inserted.
+
+    ------------ ------------- --------
+    SD Card Slot Board Signal  K64F Pin
+    ------------ ------------- --------
+    DAT0         SDHC0_D0      PTE1
+    DAT1         SDHC0_D1      PTE0
+    DAT2         SDHC0_D2      PTE5
+    CD/DAT3      SDHC0_D3      PTE4
+    CMD          SDHC0_CMD     PTE3
+    CLK          SDHC0_DCLK    PTE2
+    SWITCH       D_CARD_DETECT PTE6
+    ------------ ------------- --------
+
+  There is no Write Protect pin available to the K64F.
+
+  Configuration Settings
+  ----------------------
+  Enabling SDHC support. The Freedom K64F provides one microSD memory card
+  slot.  Support for the SD slots can be enabled with the following
+  settings:
+
+    System Type->Kinetic Peripheral Selection
+      CONFIG_KINETIS_SDHC=y                 : To enable SDHC0 support
+      CONFIG_KINETIS_SDHC_DMA=y             : Use SDIO DMA
+
+    System Type
+      CONFIG_KINETIS_GPIOIRQ=y              : GPIO interrupts needed
+      CONFIG_KINETIS_PORTEINTS=y            : Card detect pin is on PTE6
+
+    Device Drivers -> MMC/SD Driver Support
+      CONFIG_MMCSD=y                        : Enable MMC/SD support
+      CONFIG_MMSCD_NSLOTS=1                 : One slot per driver instance
+      CONFIG_MMCSD_MULTIBLOCK_DISABLE=y     : (REVISIT)
+      CONFIG_MMCSD_HAVECARDDETECT=y         : Supports card-detect PIOs
+      CONFIG_MMCSD_MMCSUPPORT=n             : Interferes with some SD cards
+      CONFIG_MMCSD_SPI=n                    : No SPI-based MMC/SD support
+      CONFIG_MMCSD_SDIO=y                   : SDIO-based MMC/SD support
+      CONFIG_SDIO_BLOCKSETUP=y              : Needs to know block sizes
+
+    RTOS Features -> Work Queue Support
+      CONFIG_SCHED_WORKQUEUE=y              : Driver needs work queue support
+      CONFIG_SCHED_HPWORK=y
+
+    Application Configuration -> NSH Library
+      CONFIG_NSH_ARCHINIT=y                 : NSH board-initialization, and
+      CONFIG_LIB_BOARDCTL=y                 : Or
+      CONFIG_BOARD_INITIALIZE=y
+
+  Using the SD card
+  -----------------
+
+  1. After booting, the SDHC device will appear as /dev/mmcsd0.
+  2. If you try mounting an SD card with nothing in the slot, the mount will
+     fail:
+
+       nsh> mount -t vfat /dev/mmcsd0 /mnt/sd0
+       nsh: mount: mount failed: 19
+
+     NSH can be configured to provide errors as strings instead of
+     numbers.  But in this case, only the error number is reported.  The
+     error numbers can be found in nuttx/include/errno.h:
+
+       #define ENODEV              19
+       #define ENODEV_STR          "No such device"
+
+     So the mount command is saying that there is no device or, more
+     correctly, that there is no card in the SD card slot.
+
+  3. Insert the SD card.  Then the mount should succeed.
+
+      nsh> mount -t vfat /dev/mmcsd0 /mnt/sd0
+      nsh> ls /mnt/sd1
+      /mnt/sd1:
+       atest.txt
+      nsh> cat /mnt/sd1/atest.txt
+      This is a test
+
+     NOTE:  See the next section entitled "Auto-Mounter" for another way
+     to mount your SD card.
+
+  4. Before removing the card, you must umount the file system.  This is
+     equivalent to "ejecting" or "safely removing" the card on Windows:  It
+     flushes any cached data to an SD card and makes the SD card unavailable
+     to the applications.
+
+       nsh> umount -t /mnt/sd0
+
+     It is now safe to remove the card.  NuttX provides into callbacks
+     that can be used by an application to automatically unmount the
+     volume when it is removed.  But those callbacks are not used in
+     these configurations.
+
+  Auto-Mounter
+  ------------
+  NuttX implements an auto-mounter than can make working with SD cards
+  easier.  With the auto-mounter, the file system will be automatically
+  mounted when the SD card is inserted into the SDHC slot and automatically
+  unmounted when the SD card is removed.
+
+  Here is a sample configuration for the auto-mounter:
+
+    File System Configuration
+      CONFIG_FS_AUTOMOUNTER=y
+
+    Board-Specific Options
+      CONFIG_FRDMK64F_SDHC_AUTOMOUNT=y
+      CONFIG_FRDMK64F_SDHC_AUTOMOUNT_FSTYPE="vfat"
+      CONFIG_FRDMK64F_SDHC_AUTOMOUNT_BLKDEV="/dev/mmcsd0"
+      CONFIG_FRDMK64F_SDHC_AUTOMOUNT_MOUNTPOINT="/mnt/sdcard"
+      CONFIG_FRDMK64F_SDHC_AUTOMOUNT_DDELAY=1000
+      CONFIG_FRDMK64F_SDHC_AUTOMOUNT_UDELAY=2000
+
+  WARNING:  SD cards should never be removed without first unmounting
+  them.  This is to avoid data and possible corruption of the file
+  system.  Certainly this is the case if you are writing to the SD card
+  at the time of the removal.  If you use the SD card for read-only access,
+  however, then I cannot think of any reason why removing the card without
+  mounting would be harmful.
+
+USB Device Controller Support
+==============================
+
+  USB Device Controller Support
+  -----------------------------
+  The USBHS device controller driver is enabled with he following
+  configurationsettings:
+
+    Device Drivers -> USB Device Driver Support
+      CONFIG_USBDEV=y                           : Enable USB device support
+    For full-speed/low-power mode:
+      CONFIG_USBDEV_DUALSPEED=n                 : Disable High speed support
+    For high-speed/normal mode:
+      CONFIG_USBDEV_DUALSPEED=y                 : Enable High speed support
+      CONFIG_USBDEV_DMA=y                       : Enable DMA methods
+      CONFIG_USBDEV_MAXPOWER=100                : Maximum power consumption
+      CONFIG_USBDEV_SELFPOWERED=y               : Self-powered device
+
+    System Type -> Kinetis Peripheral Selection
+      CONFIG_KINETIS_USBOTG=y
+
+  CDC/ACM Device Class
+  --------------------
+  In order to be usable, you must all enabled some class driver(s) for the
+  USBHS device controller.  Here, for example, is how to configure the CDC/ACM
+  serial device class:
+
+    Device Drivers -> USB Device Driver Support
+      CONFIG_CDCACM=y                           : USB Modem (CDC ACM) support
+      CONFIG_CDCACM_EP0MAXPACKET=64             : Enpoint 0 packet size
+      CONFIG_CDCACM_EPINTIN=1                   : Interrupt IN endpoint number
+      CONFIG_CDCACM_EPINTIN_FSSIZE=64           : Full speed packet size
+      CONFIG_CDCACM_EPINTIN_HSSIZE=64           : High speed packet size
+      CONFIG_CDCACM_EPBULKOUT=3                 : Bulk OUT endpoint number
+      CONFIG_CDCACM_EPBULKOUT_FSSIZE=64         : Full speed packet size
+      CONFIG_CDCACM_EPBULKOUT_HSSIZE=512        : High speed packet size
+      CONFIG_CDCACM_EPBULKIN=2                  : Bulk IN endpoint number
+      CONFIG_CDCACM_EPBULKIN_FSSIZE=64          : Full speed packet size
+      CONFIG_CDCACM_EPBULKIN_HSSIZE=512         : High speed packet size
+      CONFIG_CDCACM_NWRREQS=4                   : Number of write requests
+      CONFIG_CDCACM_NRDREQS=8                   : Number of read requests
+      CONFIG_CDCACM_BULKIN_REQLEN=96            : Size of write request buffer (for full speed)
+      CONFIG_CDCACM_BULKIN_REQLEN=768           : Size of write request buffer (for high speed)
+      CONFIG_CDCACM_RXBUFSIZE=257               : Serial read buffer size
+      CONFIG_CDCACM_TXBUFSIZE=193               : Serial transmit buffer size (for full speed)
+      CONFIG_CDCACM_TXBUFSIZE=769               : Serial transmit buffer size (for high speed)
+      CONFIG_CDCACM_VENDORID=0x0525             : Vendor ID
+      CONFIG_CDCACM_PRODUCTID=0xa4a7            : Product ID
+      CONFIG_CDCACM_VENDORSTR="NuttX"           : Vendor string
+      CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" : Product string
+
+    Device Drivers -> Serial Driver Support
+      CONFIG_SERIAL_REMOVABLE=y                 : Support for removable serial device
+
+  The CDC/ACM application provides commands to connect and disconnect the
+  CDC/ACM serial device:
+
+    CONFIG_SYSTEM_CDCACM=y                     : Enable connect/disconnect support
+    CONFIG_SYSTEM_CDCACM_DEVMINOR=0            : Use device /dev/ttyACM0
+    CONFIG_CDCACM_RXBUFSIZE=???                : A large RX may be needed
+
+  If you include this CDC/ACM application, then you can connect the CDC/ACM
+  serial device to the host by entering the command 'sercon' and you detach
+  the serial device with the command 'serdis'.  If you do no use this
+  application, they you will have to write logic in your board initialization
+  code to initialize and attach the USB device.
+
+Development Environment
+=======================
+
+  Either Linux or Cygwin on Windows can be used for the development environment.
+  The source has been built only using the GNU toolchain (see below).  Other
+  toolchains will likely cause problems. Testing was performed using the Cygwin
+  environment.
+
+GNU Toolchain Options
+=====================
+
+  The NuttX make system supports several GNU-based toolchains under Linux,
+  Cygwin under Windows, and Windoes native.  To select a toolchain:
+
+  1. Use 'make menuconfig' and select the toolchain that you are using
+     under the System Type menu.
+  2. The default toolchain is the NuttX buildroot under Linux or Cygwin:
+
+    CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
+
+     If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may
+     also have to modify the PATH in the setenv.h file if your make cannot
+     find the tools.
+
+  NOTE:  Using native Windows toolchains under Cygwin has some limitations.
+  This incuudes the CodeSourcery (for Windows) and devkitARM toolchains are
+  Windows native toolchains.  The biggest limitations are:
+
+  1. The Windows toolchain cannot follow Cygwin paths.  Path conversions are
+     performed automatically in the Cygwin makefiles using the 'cygpath' utility
+     but you might easily find some new path problems.  If so, check out 'cygpath -w'
+
+  2. Windows toolchains cannot follow Cygwin symbolic links.  Many symbolic links
+     are used in Nuttx (e.g., include/arch).  The make system works around these
+     problems for the Windows tools by copying directories instead of linking them.
+     But this can also cause some confusion for you:  For example, you may edit
+     a file in a "linked" directory and find that your changes had no effect.
+     That is because you are building the copy of the file in the "fake" symbolic
+     directory.  If you use a Windows toolchain, you should get in the habit of
+     making like this:
+
+       make clean_context all
+
+     An alias in your .bashrc file might make that less painful.
+
+Freedom K64F Configuration Options
+==================================
+
+    CONFIG_ARCH - Identifies the arch/ subdirectory.  This sould
+       be set to:
+
+       CONFIG_ARCH=arm
+
+    CONFIG_ARCH_family - For use in C code:
+
+       CONFIG_ARCH_ARM=y
+
+    CONFIG_ARCH_architecture - For use in C code:
+
+       CONFIG_ARCH_CORTEXM4=y
+
+    CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
+
+       CONFIG_ARCH_CHIP=kinetis
+
+    CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
+       chip:
+
+       CONFIG_ARCH_CHIP_MK64FN1M0VLL12
+
+    CONFIG_ARCH_BOARD - Identifies the configs subdirectory and
+       hence, the board that supports the particular chip or SoC.
+
+       CONFIG_ARCH_BOARD="freedom-k64f" (for the Freedom K64F development board)
+
+    CONFIG_ARCH_BOARD_name - For use in C code
+
+       CONFIG_ARCH_BOARD_FREEDOM_K64F=y
+
+    CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
+       of delay loops
+
+    CONFIG_ENDIAN_BIG - define if big endian (default is little
+       endian)
+
+    CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
+
+       CONFIG_RAM_SIZE=0x00010000 (64Kb)
+
+    CONFIG_RAM_START - The start address of installed DRAM
+
+       CONFIG_RAM_START=0x20000000
+
+    CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
+       have LEDs
+
+    CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
+       stack. If defined, this symbol is the size of the interrupt
+        stack in bytes.  If not defined, the user task stacks will be
+      used during interrupt handling.
+
+    CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
+
+    CONFIG_ARCH_LEDS -  Use LEDs to show state. Unique to board architecture.
+
+    CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that
+       cause a 100 second delay during boot-up.  This 100 second delay
+       serves no purpose other than it allows you to calibratre
+       CONFIG_ARCH_LOOPSPERMSEC.  You simply use a stop watch to measure
+       the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until
+       the delay actually is 100 seconds.
+
+  Individual subsystems can be enabled:
+
+    CONFIG_KINETIS_TRACE    -- Enable trace clocking on power up.
+    CONFIG_KINETIS_FLEXBUS  -- Enable flexbus clocking on power up.
+    CONFIG_KINETIS_UART0    -- Support UART0
+    CONFIG_KINETIS_UART1    -- Support UART1
+    CONFIG_KINETIS_UART2    -- Support UART2
+    CONFIG_KINETIS_UART3    -- Support UART3
+    CONFIG_KINETIS_UART4    -- Support UART4
+    CONFIG_KINETIS_UART5    -- Support UART5
+    CONFIG_KINETIS_ENET     -- Support Ethernet (K5x, K6x, and K7x only)
+    CONFIG_KINETIS_RNGB     -- Support the random number generator(K6x only)
+    CONFIG_KINETIS_FLEXCAN0 -- Support FlexCAN0
+    CONFIG_KINETIS_FLEXCAN1 -- Support FlexCAN1
+    CONFIG_KINETIS_SPI0     -- Support SPI0
+    CONFIG_KINETIS_SPI1     -- Support SPI1
+    CONFIG_KINETIS_SPI2     -- Support SPI2
+    CONFIG_KINETIS_I2C0     -- Support I2C0
+    CONFIG_KINETIS_I2C1     -- Support I2C1
+    CONFIG_KINETIS_I2S      -- Support I2S
+    CONFIG_KINETIS_DAC0     -- Support DAC0
+    CONFIG_KINETIS_DAC1     -- Support DAC1
+    CONFIG_KINETIS_ADC0     -- Support ADC0
+    CONFIG_KINETIS_ADC1     -- Support ADC1
+    CONFIG_KINETIS_CMP      -- Support CMP
+    CONFIG_KINETIS_VREF     -- Support VREF
+    CONFIG_KINETIS_SDHC     -- Support SD host controller
+    CONFIG_KINETIS_FTM0     -- Support FlexTimer 0
+    CONFIG_KINETIS_FTM1     -- Support FlexTimer 1
+    CONFIG_KINETIS_FTM2     -- Support FlexTimer 2
+    CONFIG_KINETIS_LPTIMER  -- Support the low power timer
+    CONFIG_KINETIS_RTC      -- Support RTC
+    CONFIG_KINETIS_SLCD     -- Support the segment LCD (K3x, K4x, and K5x only)
+    CONFIG_KINETIS_EWM      -- Support the external watchdog
+    CONFIG_KINETIS_CMT      -- Support Carrier Modulator Transmitter
+    CONFIG_KINETIS_USBOTG   -- Support USB OTG (see also CONFIG_USBHOST and CONFIG_USBDEV)
+    CONFIG_KINETIS_USBDCD   -- Support the USB Device Charger Detection module
+    CONFIG_KINETIS_LLWU     -- Support the Low Leakage Wake-Up Unit
+    CONFIG_KINETIS_TSI      -- Support the touch screeen interface
+    CONFIG_KINETIS_FTFL     -- Support FLASH
+    CONFIG_KINETIS_DMA      -- Support DMA
+    CONFIG_KINETIS_CRC      -- Support CRC
+    CONFIG_KINETIS_PDB      -- Support the Programmable Delay Block
+    CONFIG_KINETIS_PIT      -- Support Programmable Interval Timers
+    CONFIG_ARM_MPU          -- Support the MPU
+
+  Kinetis interrupt priorities (Default is the mid priority).  These should
+  not be set because they can cause unhandled, nested interrupts.  All
+  interrupts need to be at the default priority in the current design.
+
+    CONFIG_KINETIS_UART0PRIO
+    CONFIG_KINETIS_UART1PRIO
+    CONFIG_KINETIS_UART2PRIO
+    CONFIG_KINETIS_UART3PRIO
+    CONFIG_KINETIS_UART4PRIO
+    CONFIG_KINETIS_UART5PRIO
+
+    CONFIG_KINETIS_EMACTMR_PRIO
+    CONFIG_KINETIS_EMACTX_PRIO
+    CONFIG_KINETIS_EMACRX_PRIO
+    CONFIG_KINETIS_EMACMISC_PRIO
+
+    CONFIG_KINETIS_SDHC_PRIO
+
+  PIN Interrupt Support
+
+    CONFIG_KINETIS_GPIOIRQ   -- Enable pin interrupt support.  Also needs
+      one or more of the following:
+    CONFIG_KINETIS_PORTAINTS -- Support 32 Port A interrupts
+    CONFIG_KINETIS_PORTBINTS -- Support 32 Port B interrupts
+    CONFIG_KINETIS_PORTCINTS -- Support 32 Port C interrupts
+    CONFIG_KINETIS_PORTDINTS -- Support 32 Port D interrupts
+    CONFIG_KINETIS_PORTEINTS -- Support 32 Port E interrupts
+
+  Kinetis K64 specific device driver settings
+
+    CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn (n=0..5) for the
+      console and ttys0 (default is the UART0).
+    CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received.
+       This specific the size of the receive buffer
+    CONFIG_UARTn_TXBUFSIZE - Characters are buffered before
+       being sent.  This specific the size of the transmit buffer
+    CONFIG_UARTn_BAUD - The configure BAUD of the UART.
+    CONFIG_UARTn_BITS - The number of bits.  Must be either 8 or 8.
+    CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
+
+  Kenetis ethernet controller settings
+
+    CONFIG_ENET_NRXBUFFERS - Number of RX buffers.  The size of one
+        buffer is determined by CONFIG_NET_ETH_MTU.  Default: 6
+    CONFIG_ENET_NTXBUFFERS - Number of TX buffers.  The size of one
+        buffer is determined by CONFIG_NET_ETH_MTU.  Default: 2
+    CONFIG_ENET_USEMII - Use MII mode.  Default: RMII mode.
+    CONFIG_ENET_PHYADDR - PHY address
+
+Configurations
+==============
+
+Each Freedom K64F configuration is maintained in a sub-directory and
+can be selected as follow:
+
+    cd tools
+    ./configure.sh freedom-k64f/
+    cd -
+    . ./setenv.sh
+
+Where  is one of the following:
+
+  netnsh:
+  ------
+    This configuration is identical to the nsh configuration described
+    below except that networking support is enabled.
+
+    NOTES:
+
+    1. This configuration uses the mconf-based configuration tool.  To
+       change this configuration using that tool, you should:
+
+       a. Build and install the kconfig-mconf tool.  See nuttx/README.txt
+          see additional README.txt files in the NuttX tools repository.
+
+       b. Execute 'make menuconfig' in nuttx/ in order to start the
+          reconfiguration process.
+
+    2. Default platform/toolchain:
+
+       CONFIG_HOST_WINDOWS=y               : Cygwin under Windows
+       CONFIG_WINDOWS_CYGWIN=y
+       CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : ARM/mbed toolcahin (arm-none-elf-gcc)
+       CONFIG_INTELHEX_BINARY=y            : Output formats: Intel hex binary
+
+    3. The Serial Console is provided on UART3 with the correct pin
+       configuration for use with an Arduino Serial Shield.
+
+    4. SDHC support is not enabled in this configuration.  Refer to the
+       configuration settings listed above under "SD Card Support".
+
+    5. Support for NSH built-in applications is enabled, but no built-in
+       applications have been configured in.
+
+    6. No external pullup is available on MDIO signal when MK64FN1M0VLL12 MCU
+       is requests status of the Ethernet link connection. Internal pullup is
+       required when port configuration for MDIO signal is enabled:
+
+       CONFIG_KINETIS_ENET_MDIOPULLUP=y
+
+    7. Configured to use a fixed IPv4 address:
+
+       CONFIG_NSH_IPADDR=0x0a000002
+       CONFIG_NSH_DRIPADDR=0x0a000001
+       CONFIG_NSH_NETMASK=0xffffff00
+
+       And a bogus MAC address:
+
+       CONFIG_NSH_NOMAC=y
+       CONFIG_NSH_SWMAC=y
+       CONFIG_NSH_MACADDR=0x00e0deadbeef
+
+  nsh:
+  ---
+    Configures the NuttShell (nsh) located at apps/examples/nsh using a
+    serial console on UART3.
+
+    NOTES:
+
+    1. This configuration uses the mconf-based configuration tool.  To
+       change this configuration using that tool, you should:
+
+       a. Build and install the kconfig-mconf tool.  See nuttx/README.txt
+          see additional README.txt files in the NuttX tools repository.
+
+       b. Execute 'make menuconfig' in nuttx/ in order to start the
+          reconfiguration process.
+
+    2. Default platform/toolchain:
+
+         CONFIG_HOST_WINDOWS=y               : Cygwin under Windows
+         CONFIG_WINDOWS_CYGWIN=y
+         CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : ARM/mbed toolcahin (arm-none-elf-gcc)
+         CONFIG_INTELHEX_BINARY=y            : Output formats: Intel hex binary
+
+    3. The Serial Console is provided on UART0 with the correct pin
+       configuration for use with the OpenSDAv2 VCOM.  This can be switched
+       to use a RS-232 shield on UART3 by reconfiguring the serial console.
+
+         -CONFIG_KINETIS_UART0=y
+         +CONFIG_KINETIS_UART3=y
+         -CONFIG_UART0_SERIALDRIVER=y
+         +CONFIG_UART3_SERIALDRIVER=y
+         -CONFIG_UART0_SERIAL_CONSOLE=y
+         +CONFIG_UART3_SERIAL_CONSOLE=y
+         -CONFIG_UART0_RXBUFSIZE=256
+         +CONFIG_UART3_RXBUFSIZE=256
+         -CONFIG_UART0_TXBUFSIZE=256
+         +CONFIG_UART3_TXBUFSIZE=256
+         -CONFIG_UART0_BAUD=115200
+         +CONFIG_UART3_BAUD=115200
+         -CONFIG_UART0_BITS=8
+         +CONFIG_UART3_BITS=8
+         -CONFIG_UART0_PARITY=0
+         +CONFIG_UART3_PARITY=0
+         -CONFIG_UART0_2STOP=0
+         +CONFIG_UART3_2STOP=0
+
+       NOTE: On my Windows 10 / Cygwin64 system, the OpenSDAv2 VCOM is not
+       recognized.  I probably need to install a driver?
+
+       There is a serial USB driver on the mbed web site.  However, this
+       driver would not install on Windows 10 for me.  I understand that
+       it installs OK on Windows 7.
+
+    4. Support for NSH built-in applications is enabled, but no built-in
+       applications have been configured in.
+
+    5. An SDHC driver is enabled in this configuration but does not yet work.
+       The basic problem seems to be that it does not sense the presence of
+       the SD card on PTE6.  No interrupts are generated when the SD card is
+       inserted or removed.  You might want to disable SDHC and MMC/SD if
+       you are using this configuration.  Refer to the configuration
+       settings listed above under "SD Card Support".
+
+Status
+======
+
+  2016-07-11:  Received hardware today and the board came up on the very
+    first try.  That does not happen often.  At this point, the very basic
+    NSH configuration is working and LEDs are working.
+
+    The only odd behavior that I see is that pressing SW3 causes an NMI
+    interrupt (followed by a crash):
+
+      kinetis_nmi: PANIC!!! NMI received
+
+    I don't yet understand why this is.
+
+  2016-07-12:  Added support for the KSZ8081 PHY and added the netnsh
+    configuration.  The network is basically functional.  More testing is
+    needed, but I have not seen any obvious network failures.
+
+    In testing, I notice a strange thing.  If I run at full optimization the
+    code runs (albeit with bugs-to-be-solved).  But with no optimization or
+    even at -O1, the system fails to boot.  This seems to be related to the
+    watchdog timer.
+
+  2016-07-13:  Add SD automounter logic; broke out SDHC logic into a separate
+    file.  The nsh configuration now has SDHC enabled be default.  Does not
+    yet work.  The basic problem seems to be that it does not sense the
+    presence of the SD card on PTE6.  No interrupts are generated when the
+    SD card is inserted or removed.  You might want to disable SDHC and
+    MMC/SD if you are using this configuration.
+
+    The nsh configuration now builds successfully with USB device enabled.
+    USB device, however, has not yet been tested.  I have not yet looked
+    into 48MHz clocking requirements.
+
+  2017-02-10:  These have been numerous SDHC fixes submitted by Marc Rechte'.
+    These may or may not have fixed the SDHC issues mentioned about.  You
+    would have to retest to verify the SDHC functionality.
+
diff --git a/configs/freedom-k64f/include/board.h b/configs/freedom-k64f/include/board.h
new file mode 100644
index 0000000000000000000000000000000000000000..01d52a622edf2e1c8f56d8f069c43dc78bf8d708
--- /dev/null
+++ b/configs/freedom-k64f/include/board.h
@@ -0,0 +1,288 @@
+/************************************************************************************
+ * configs/freedom-k64f/include/board.h
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __CONFIG_FREEDOM_K64F_INCLUDE_BOARD_H
+#define __CONFIG_FREEDOM_K64F_INCLUDE_BOARD_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#ifndef __ASSEMBLY__
+#  include 
+#endif
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Clocking *************************************************************************/
+/* The Freedom K64F uses a 50MHz external clock from the Micrel Ethernet PHY.  The
+ * Kinetis MCU startup from an internal digitally-controlled oscillator (DCO). Nuttx
+ * will enable the main external oscillator (EXTAL0/XTAL0).   The external
+ * oscillator/resonator can range from 32.768 KHz up to 50 MHz. The default external
+ * source for the MCG oscillator inputs (EXTAL) is 50 MHz clock source from Micrel
+ * Ethernet PHY.
+ */
+
+#define BOARD_EXTCLOCK       1              /* External clock */
+#define BOARD_EXTAL_FREQ     50000000       /* 50MHz Oscillator from Micrel PHY */
+#define BOARD_XTAL32_FREQ    32768          /* 32KHz RTC Oscillator */
+
+/* PLL Configuration.  Either the external clock or crystal frequency is used to
+ * select the PRDIV value. Only reference clock frequencies are supported that will
+ * produce a KINETIS_MCG_PLL_REF_MIN >= PLLIN <= KINETIS_MCG_PLL_REF_MIN reference
+ * clock to the PLL.
+ *
+ *   PLL Input frequency:   PLLIN  = REFCLK / PRDIV = 50  Mhz  / 20 = 2.5 MHz
+ *   PLL Output frequency:  PLLOUT = PLLIN  * VDIV  = 2.5 Mhz  * 48 = 120 MHz
+ *   MCG Frequency:         PLLOUT = 120 MHz
+ *
+ * PRDIV register value is the divider minus KINETIS_MCG_C5_PRDIV_BASE.
+ * VDIV  register value is offset by KINETIS_MCG_C6_VDIV_BASE.
+ */
+
+#define BOARD_PRDIV          20             /* PLL External Reference Divider */
+#define BOARD_VDIV           48             /* PLL VCO Divider (frequency multiplier) */
+
+#define BOARD_PLLIN_FREQ     (BOARD_EXTAL_FREQ / BOARD_PRDIV)
+#define BOARD_PLLOUT_FREQ    (BOARD_PLLIN_FREQ * BOARD_VDIV)
+#define BOARD_MCG_FREQ       BOARD_PLLOUT_FREQ
+
+/* Define additional MCG_C2 Setting */
+
+#define BOARD_MCG_C2_FCFTRIM 0              /* Do not enable FCFTRIM */
+#define BOARD_MCG_C2_LOCRE0  MCG_C2_LOCRE0  /* Enable reset on loss of clock */
+
+/* SIM CLKDIV1 dividers */
+
+#define BOARD_OUTDIV1        1              /* Core        = MCG,    120 MHz */
+#define BOARD_OUTDIV2        2              /* Bus         = MCG / 2, 60 MHz */
+#define BOARD_OUTDIV3        2              /* FlexBus     = MCG / 2, 60 MHz */
+#define BOARD_OUTDIV4        5              /* Flash clock = MCG / 5, 24 MHz */
+
+#define BOARD_CORECLK_FREQ  (BOARD_MCG_FREQ / BOARD_OUTDIV1)
+#define BOARD_BUS_FREQ      (BOARD_MCG_FREQ / BOARD_OUTDIV2)
+#define BOARD_FLEXBUS_FREQ  (BOARD_MCG_FREQ / BOARD_OUTDIV3)
+#define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4)
+
+/* SDHC clocking ********************************************************************/
+
+/* SDCLK configurations corresponding to various modes of operation.   Formula is:
+ *
+ *   SDCLK  frequency = (base clock) / (prescaler * divisor)
+ *
+ * The SDHC module is always configure configured so that the core clock is the base
+ * clock.  Possible values for presscaler and divisor are:
+ *
+ *   SDCLKFS: {2, 4, 8, 16, 32, 63, 128, 256}
+ *   DVS:     {1..16}
+ */
+
+/* Identification mode:  Optimal 400KHz, Actual 120MHz / (32 * 10) = 375 Khz */
+
+#define BOARD_SDHC_IDMODE_PRESCALER    SDHC_SYSCTL_SDCLKFS_DIV32
+#define BOARD_SDHC_IDMODE_DIVISOR      SDHC_SYSCTL_DVS_DIV(10)
+
+/* MMC normal mode: Optimal 20MHz, Actual 120MHz / (2 * 3) = 20 MHz */
+
+#define BOARD_SDHC_MMCMODE_PRESCALER   SDHC_SYSCTL_SDCLKFS_DIV2
+#define BOARD_SDHC_MMCMODE_DIVISOR     SDHC_SYSCTL_DVS_DIV(3)
+
+/* SD normal mode (1-bit): Optimal 20MHz, Actual 120MHz / (2 * 3) = 20 MHz */
+
+#define BOARD_SDHC_SD1MODE_PRESCALER   SDHC_SYSCTL_SDCLKFS_DIV2
+#define BOARD_SDHC_SD1MODE_DIVISOR     SDHC_SYSCTL_DVS_DIV(3)
+
+/* SD normal mode (4-bit): Optimal 25MHz, Actual 120MHz / (2 * 3) = 20 MHz (with DMA)
+ * SD normal mode (4-bit): Optimal 20MHz, Actual 120MHz / (2 * 3) = 20 MHz (no DMA)
+ */
+
+#ifdef CONFIG_SDIO_DMA
+#  define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
+#  define BOARD_SDHC_SD4MODE_DIVISOR   SDHC_SYSCTL_DVS_DIV(3)
+#else
+#  define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
+#  define BOARD_SDHC_SD4MODE_DIVISOR   SDHC_SYSCTL_DVS_DIV(3)
+#endif
+
+/* PWM Configuration */
+/* FTM0 Channels */
+/* Channels can be modified using kinetis_k64pinmux.h */
+
+#define GPIO_FTM0_CH0OUT PIN_FTM0_CH0_1
+#define GPIO_FTM0_CH1OUT PIN_FTM0_CH1_1
+#define GPIO_FTM0_CH2OUT PIN_FTM0_CH2_2
+#define GPIO_FTM0_CH3OUT PIN_FTM0_CH3_1
+#define GPIO_FTM0_CH4OUT PIN_FTM0_CH4_1
+#define GPIO_FTM0_CH5OUT PIN_FTM0_CH5_1
+
+/* LED definitions ******************************************************************/
+/* The Freedom K64F has a single RGB LED driven by the K64F as follows:
+ *
+ *   LED    K64
+ *   ------ -------------------------------------------------------
+ *   RED    PTB22/SPI2_SOUT/FB_AD29/CMP2_OUT
+ *   BLUE   PTB21/SPI2_SCK/FB_AD30/CMP1_OUT
+ *   GREEN  PTE26/ENET_1588_CLKIN/UART4_CTS_b/RTC_CLKOUT/USB0_CLKIN
+ *
+ * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any
+ * way.  The following definitions are used to access individual LEDs.
+ */
+
+/* LED index values for use with board_userled() */
+
+#define BOARD_LED_R       0
+#define BOARD_LED_G       1
+#define BOARD_LED_B       2
+#define BOARD_NLEDS       3
+
+/* LED bits for use with board_userled_all() */
+
+#define BOARD_LED_R_BIT   (1 << BOARD_LED_R)
+#define BOARD_LED_G_BIT   (1 << BOARD_LED_G)
+#define BOARD_LED_B_BIT   (1 << BOARD_LED_B)
+
+/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board
+ * the Freedom K64F.  The following definitions describe how NuttX controls
+ * the LEDs:
+ *
+ *   SYMBOL                Meaning                      LED state
+ *                                                      RED   GREEN  BLUE
+ *   -------------------  ----------------------------  ----------------- */
+#define LED_STARTED       1 /* NuttX has been started    OFF   OFF    OFF */
+#define LED_HEAPALLOCATE  2 /* Heap has been allocated   OFF   OFF    ON  */
+#define LED_IRQSENABLED   0 /* Interrupts enabled        OFF   OFF    ON  */
+#define LED_STACKCREATED  3 /* Idle stack created        OFF   ON     OFF */
+#define LED_INIRQ         0 /* In an interrupt          (no change)       */
+#define LED_SIGNAL        0 /* In a signal handler      (no change)       */
+#define LED_ASSERTION     0 /* An assertion failed      (no change)       */
+#define LED_PANIC         4 /* The system has crashed    FLASH OFF    OFF */
+#undef  LED_IDLE            /* K64 is in sleep mode     (Not used)        */
+
+/* Button definitions ***************************************************************/
+/* Two push buttons, SW2 and SW3, are available on FRDM-K64F board, where SW2 is
+ * connected to PTC6 and SW3 is connected to PTA4. Besides the general purpose
+ * input/output functions, SW2 and SW3 can be low-power wake up signal. Also, only
+ * SW3 can be a non-maskable interrupt.
+ *
+ *   Switch    GPIO Function
+ *   --------- ---------------------------------------------------------------
+ *   SW2       PTC6/SPI0_SOUT/PD0_EXTRG/I2S0_RX_BCLK/FB_AD9/I2S0_MCLK/LLWU_P10
+ *   SW3       PTA4/FTM0_CH1/NMI_b/LLWU_P3
+ */
+
+#define BUTTON_SW2        0
+#define BUTTON_SW3        1
+
+#define BUTTON_SW2_BIT    (1 << BUTTON_SW2)
+#define BUTTON_SW3_BIT    (1 << BUTTON_SW3)
+
+/* Alternative pin resolution *******************************************************/
+/* If there are alternative configurations for various pins in the
+ * kinetis_k64pinmux.h header file, those alternative pins will be labeled with a
+ * suffix like _1, _2, etc.  The logic in this file must select the correct pin
+ * configuration for the board by defining a pin configuration (with no suffix) that
+ * maps to the correct alternative.
+ */
+
+/* The primary serial port interface signals are PTB16 UART0_RX and PTB17 UART0_TX.
+ * These signals are connected to the OpenSDAv2 circuit.
+ */
+
+#define PIN_UART0_RX      PIN_UART0_RX_3
+#define PIN_UART0_TX      PIN_UART0_TX_3
+
+/* An alternative serial port might use a standard serial shield mounted
+ * on the Freedom Board.  In this case, Arduino pin D1 provides UART TX and
+ * pin D0 privides UART RX.
+ *
+ * The I/O headers on the FRDM-K64F board are arranged to enable
+ * compatibility with Arduino shield. The outer rows of pins (even numbered
+ * pins) on the headers, share the same mechanical spacing and placement with
+ * the I/O headers on the Arduino Revision 3 (R3) standard.
+ *
+ * The Arduino D0 and D1 pins then correspond to pins 2 and 4 on the J1 I/O
+ * connector:
+ *
+ *   Arduino Pin              FRDM-K64F J1 Connector
+ *   ------------------------ -----------------------
+ *   UART TX, Arduino D1 pin  Pin 4, PTC17, UART3_TX
+ *   UART RX, Arduino D0 pin  Pin 2, PTC16, UART3_RX
+ */
+
+#define PIN_UART3_RX      PIN_UART3_RX_2
+#define PIN_UART3_TX      PIN_UART3_TX_2
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: kinetis_boardinitialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.  This entry point
+ *   is called early in the intitialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void kinetis_boardinitialize(void);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif  /* __CONFIG_FREEDOM_K64F_INCLUDE_BOARD_H */
diff --git a/configs/freedom-k64f/netnsh/Make.defs b/configs/freedom-k64f/netnsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..aca1ad4843a13d415265ffa5f6510f31b5ebdec8
--- /dev/null
+++ b/configs/freedom-k64f/netnsh/Make.defs
@@ -0,0 +1,111 @@
+############################################################################
+# configs/freedom-k64f/netnsh/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/flash.ld}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/flash.ld
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/stm32f746g-disco/netnsh/defconfig b/configs/freedom-k64f/netnsh/defconfig
similarity index 70%
rename from configs/stm32f746g-disco/netnsh/defconfig
rename to configs/freedom-k64f/netnsh/defconfig
index efd988abdf9ce25cb2e347dc33db96367d5fa002..d74aed47eac1113345b7ecc3a04fe5fb0e8a3b66 100644
--- a/configs/stm32f746g-disco/netnsh/defconfig
+++ b/configs/freedom-k64f/netnsh/defconfig
@@ -29,8 +29,8 @@ CONFIG_BUILD_FLAT=y
 #
 # CONFIG_RRLOAD_BINARY is not set
 CONFIG_INTELHEX_BINARY=y
-# CONFIG_MOTOROLA_SREC is not set
-CONFIG_RAW_BINARY=y
+CONFIG_MOTOROLA_SREC=y
+# CONFIG_RAW_BINARY is not set
 # CONFIG_UBOOT_UIMAGE is not set
 
 #
@@ -46,15 +46,16 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
-# CONFIG_DEBUG_SYMBOLS is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
-CONFIG_DEBUG_NOOPT=y
+# CONFIG_DEBUG_NOOPT is not set
 # CONFIG_DEBUG_CUSTOMOPT is not set
-# CONFIG_DEBUG_FULLOPT is not set
+CONFIG_DEBUG_FULLOPT=y
 
 #
 # System Type
@@ -63,10 +64,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,11 +79,11 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
-# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+CONFIG_ARCH_CHIP_KINETIS=y
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
 # CONFIG_ARCH_CHIP_TIVA is not set
@@ -97,7 +100,8 @@ CONFIG_ARCH="arm"
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
-CONFIG_ARCH_CHIP_STM32F7=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -106,8 +110,8 @@ CONFIG_ARCH_CHIP_STM32F7=y
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
-# CONFIG_ARCH_CORTEXM4 is not set
-CONFIG_ARCH_CORTEXM7=y
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
 # CONFIG_ARCH_CORTEXA9 is not set
@@ -118,30 +122,28 @@ CONFIG_ARCH_CORTEXM7=y
 # CONFIG_ARCH_CORTEXR7 is not set
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
-CONFIG_ARCH_CHIP="stm32f7"
+CONFIG_ARCH_CHIP="kinetis"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
 CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
-CONFIG_ARMV7M_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 CONFIG_ARCH_HAVE_FPU=y
-CONFIG_ARCH_HAVE_DPFPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
 # CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
 # ARMV7M Configuration Options
 #
-CONFIG_ARMV7M_HAVE_ICACHE=y
-CONFIG_ARMV7M_HAVE_DCACHE=y
-CONFIG_ARMV7M_ICACHE=y
-CONFIG_ARMV7M_DCACHE=y
-CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
-CONFIG_ARMV7M_HAVE_ITCM=y
-CONFIG_ARMV7M_HAVE_DTCM=y
-# CONFIG_ARMV7M_ITCM is not set
-CONFIG_ARMV7M_DTCM=y
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -150,116 +152,115 @@ CONFIG_ARMV7M_DTCM=y
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
 CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y
 # CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set
-CONFIG_ARMV7M_HAVE_STACKCHECK=y
-# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_SERIAL_TERMIOS is not set
-
-#
-# STM32 F7 Configuration Options
-#
-# CONFIG_ARCH_CHIP_STM32F745 is not set
-CONFIG_ARCH_CHIP_STM32F746=y
-# CONFIG_ARCH_CHIP_STM32F756 is not set
-CONFIG_STM32F7_STM32F74XX=y
-# CONFIG_STM32F7_STM32F75XX is not set
-# CONFIG_STM32F7_FLASH_512KB is not set
-CONFIG_STM32F7_FLASH_1024KB=y
-
-#
-# STM32 Peripheral Support
-#
-CONFIG_STM32F7_HAVE_LTDC=y
-# CONFIG_STM32F7_ADC is not set
-# CONFIG_STM32F7_CAN is not set
-# CONFIG_STM32F7_DAC is not set
-# CONFIG_STM32F7_DMA is not set
-# CONFIG_STM32F7_I2C is not set
-# CONFIG_STM32F7_SAI is not set
-# CONFIG_STM32F7_SPI is not set
-CONFIG_STM32F7_USART=y
-# CONFIG_STM32F7_ADC1 is not set
-# CONFIG_STM32F7_ADC2 is not set
-# CONFIG_STM32F7_ADC3 is not set
-# CONFIG_STM32F7_BKPSRAM is not set
-# CONFIG_STM32F7_CAN1 is not set
-# CONFIG_STM32F7_CAN2 is not set
-# CONFIG_STM32F7_CEC is not set
-# CONFIG_STM32F7_CRC is not set
-# CONFIG_STM32F7_CRYP is not set
-# CONFIG_STM32F7_DMA1 is not set
-# CONFIG_STM32F7_DMA2 is not set
-# CONFIG_STM32F7_DAC1 is not set
-# CONFIG_STM32F7_DAC2 is not set
-# CONFIG_STM32F7_DCMI is not set
-CONFIG_STM32F7_ETHMAC=y
-# CONFIG_STM32F7_FSMC is not set
-# CONFIG_STM32F7_I2C1 is not set
-# CONFIG_STM32F7_I2C2 is not set
-# CONFIG_STM32F7_I2C3 is not set
-# CONFIG_STM32F7_LPTIM1 is not set
-# CONFIG_STM32F7_LTDC is not set
-# CONFIG_STM32F7_DMA2D is not set
-# CONFIG_STM32F7_OTGFS is not set
-# CONFIG_STM32F7_OTGHS is not set
-# CONFIG_STM32F7_QUADSPI is not set
-# CONFIG_STM32F7_SAI1 is not set
-# CONFIG_STM32F7_RNG is not set
-# CONFIG_STM32F7_SAI2 is not set
-# CONFIG_STM32F7_SDMMC1 is not set
-# CONFIG_STM32F7_SPDIFRX is not set
-# CONFIG_STM32F7_SPI1 is not set
-# CONFIG_STM32F7_SPI2 is not set
-# CONFIG_STM32F7_SPI3 is not set
-# CONFIG_STM32F7_SPI4 is not set
-# CONFIG_STM32F7_SPI5 is not set
-# CONFIG_STM32F7_SPI6 is not set
-# CONFIG_STM32F7_TIM1 is not set
-# CONFIG_STM32F7_TIM2 is not set
-# CONFIG_STM32F7_TIM3 is not set
-# CONFIG_STM32F7_TIM4 is not set
-# CONFIG_STM32F7_TIM5 is not set
-# CONFIG_STM32F7_TIM6 is not set
-# CONFIG_STM32F7_TIM7 is not set
-# CONFIG_STM32F7_TIM8 is not set
-# CONFIG_STM32F7_TIM9 is not set
-# CONFIG_STM32F7_TIM10 is not set
-# CONFIG_STM32F7_TIM11 is not set
-# CONFIG_STM32F7_TIM12 is not set
-# CONFIG_STM32F7_TIM13 is not set
-# CONFIG_STM32F7_TIM14 is not set
-# CONFIG_STM32F7_TIM15 is not set
-# CONFIG_STM32F7_USART1 is not set
-# CONFIG_STM32F7_USART2 is not set
-# CONFIG_STM32F7_USART3 is not set
-# CONFIG_STM32F7_UART4 is not set
-# CONFIG_STM32F7_UART5 is not set
-CONFIG_STM32F7_USART6=y
-# CONFIG_STM32F7_UART7 is not set
-# CONFIG_STM32F7_UART8 is not set
-# CONFIG_STM32F7_IWDG is not set
-# CONFIG_STM32F7_WWDG is not set
-# CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set
-
-#
-# Ethernet MAC configuration
-#
-CONFIG_STM32F7_PHYADDR=0
-# CONFIG_STM32F7_PHYINIT is not set
-# CONFIG_STM32F7_MII is not set
-CONFIG_STM32F7_AUTONEG=y
-CONFIG_STM32F7_PHYSR=31
-CONFIG_STM32F7_PHYSR_ALTCONFIG=y
-CONFIG_STM32F7_PHYSR_ALTMODE=0x001c
-CONFIG_STM32F7_PHYSR_10HD=0x0004
-CONFIG_STM32F7_PHYSR_100HD=0x0008
-CONFIG_STM32F7_PHYSR_10FD=0x0014
-CONFIG_STM32F7_PHYSR_100FD=0x0018
-# CONFIG_STM32F7_ETH_PTP is not set
-CONFIG_STM32F7_RMII=y
-# CONFIG_STM32F7_RMII_MCO1 is not set
-# CONFIG_STM32F7_RMII_MCO2 is not set
-CONFIG_STM32F7_RMII_EXTCLK=y
+
+#
+# Kinetis Configuration Options
+#
+# CONFIG_ARCH_CHIP_MK20DN32VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX32VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DN64VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX64VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DN128VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX128VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX64VLH7 is not set
+# CONFIG_ARCH_CHIP_MK20DX128VLH7 is not set
+# CONFIG_ARCH_CHIP_MK20DX256VLH7 is not set
+# CONFIG_ARCH_CHIP_MK40N512VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK40N512VMD100 is not set
+# CONFIG_ARCH_CHIP_MK40X128VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK40X128VMD100 is not set
+# CONFIG_ARCH_CHIP_MK40X256VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK40X256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60N256VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK60N256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VLL100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60X256VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK60X256VMD100 is not set
+CONFIG_ARCH_CHIP_MK64FN1M0VLL12=y
+# CONFIG_ARCH_CHIP_MK64FX512VLL12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VDC12 is not set
+# CONFIG_ARCH_CHIP_MK64FN1M0VDC12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VLQ12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VMD12 is not set
+# CONFIG_ARCH_CHIP_MK64FN1M0VMD12 is not set
+# CONFIG_ARCH_FAMILY_K20 is not set
+# CONFIG_ARCH_FAMILY_K40 is not set
+# CONFIG_ARCH_FAMILY_K60 is not set
+CONFIG_ARCH_FAMILY_K64=y
+
+#
+# Kinetis Peripheral Support
+#
+CONFIG_KINETIS_HAVE_I2C1=y
+CONFIG_KINETIS_HAVE_I2C2=y
+# CONFIG_KINETIS_TRACE is not set
+# CONFIG_KINETIS_FLEXBUS is not set
+# CONFIG_KINETIS_UART0 is not set
+# CONFIG_KINETIS_UART1 is not set
+# CONFIG_KINETIS_UART2 is not set
+CONFIG_KINETIS_UART3=y
+# CONFIG_KINETIS_UART4 is not set
+# CONFIG_KINETIS_UART5 is not set
+CONFIG_KINETIS_ENET=y
+# CONFIG_KINETIS_RNGB is not set
+# CONFIG_KINETIS_FLEXCAN0 is not set
+# CONFIG_KINETIS_FLEXCAN1 is not set
+# CONFIG_KINETIS_SPI0 is not set
+# CONFIG_KINETIS_SPI1 is not set
+# CONFIG_KINETIS_SPI2 is not set
+# CONFIG_KINETIS_I2C0 is not set
+# CONFIG_KINETIS_I2C1 is not set
+# CONFIG_KINETIS_I2C2 is not set
+# CONFIG_KINETIS_I2S is not set
+# CONFIG_KINETIS_DAC0 is not set
+# CONFIG_KINETIS_DAC1 is not set
+# CONFIG_KINETIS_ADC0 is not set
+# CONFIG_KINETIS_ADC1 is not set
+# CONFIG_KINETIS_CMP is not set
+# CONFIG_KINETIS_VREF is not set
+# CONFIG_KINETIS_SDHC is not set
+# CONFIG_KINETIS_FTM0 is not set
+# CONFIG_KINETIS_FTM1 is not set
+# CONFIG_KINETIS_FTM2 is not set
+# CONFIG_KINETIS_LPTIMER is not set
+# CONFIG_KINETIS_RTC is not set
+# CONFIG_KINETIS_EWM is not set
+# CONFIG_KINETIS_CMT is not set
+# CONFIG_KINETIS_USBOTG is not set
+# CONFIG_KINETIS_USBDCD is not set
+# CONFIG_KINETIS_LLWU is not set
+# CONFIG_KINETIS_TSI is not set
+# CONFIG_KINETIS_FTFL is not set
+# CONFIG_KINETIS_DMA is not set
+# CONFIG_KINETIS_CRC is not set
+# CONFIG_KINETIS_PDB is not set
+# CONFIG_KINETIS_PIT is not set
+
+#
+# Kinetis GPIO Interrupt Configuration
+#
+# CONFIG_KINETIS_GPIOIRQ is not set
+
+#
+# Kinetis Ethernet Configuration
+#
+# CONFIG_KINETIS_ENETENHANCEDBD is not set
+CONFIG_KINETIS_ENETNETHIFS=1
+CONFIG_KINETIS_ENETNRXBUFFERS=6
+CONFIG_KINETIS_ENETNTXBUFFERS=2
+# CONFIG_KINETIS_ENETUSEMII is not set
+CONFIG_KINETIS_ENET_MDIOPULLUP=y
+# CONFIG_KINETIS_ENET_NORXER is not set
+CONFIG_KINETIS_EMAC_RMIICLKEXTAL=y
+CONFIG_KINETIS_EMAC_HPWORK=y
+
+#
+# Kinetis UART Configuration
+#
 
 #
 # Architecture Options
@@ -279,20 +280,21 @@ CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
-# CONFIG_ARCH_HAVE_RESET is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
 # CONFIG_ARCH_IDLE_CUSTOM is not set
-# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMFUNCS=y
+CONFIG_ARCH_RAMFUNCS=y
 CONFIG_ARCH_HAVE_RAMVECTORS=y
 # CONFIG_ARCH_RAMVECTORS is not set
 
 #
 # Board Settings
 #
-CONFIG_BOARD_LOOPSPERMSEC=43103
+CONFIG_BOARD_LOOPSPERMSEC=10016
 # CONFIG_ARCH_CALIBRATION is not set
 
 #
@@ -315,16 +317,16 @@ CONFIG_BOOT_RUNFROMFLASH=y
 #
 # Boot Memory Configuration
 #
-CONFIG_RAM_START=0x20010000
-CONFIG_RAM_SIZE=245760
+CONFIG_RAM_START=0x1fff0000
+CONFIG_RAM_SIZE=131072
 # CONFIG_ARCH_HAVE_SDRAM is not set
 
 #
 # Board Selection
 #
-CONFIG_ARCH_BOARD_STM32F746G_DISCO=y
+CONFIG_ARCH_BOARD_FREEDOM_K64F=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
-CONFIG_ARCH_BOARD="stm32f746g-disco"
+CONFIG_ARCH_BOARD="freedom-k64f"
 
 #
 # Common Board Options
@@ -332,15 +334,19 @@ CONFIG_ARCH_BOARD="stm32f746g-disco"
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
-CONFIG_ARCH_BUTTONS=y
+# CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-# CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
-# CONFIG_LIB_BOARDCTL is not set
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
 
 #
 # RTOS Features
@@ -358,10 +364,11 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
-CONFIG_START_YEAR=2011
-CONFIG_START_MONTH=12
-CONFIG_START_DAY=6
+CONFIG_START_YEAR=2013
+CONFIG_START_MONTH=3
+CONFIG_START_DAY=25
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=4
 CONFIG_WDOG_INTRESERVE=0
@@ -455,6 +462,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -467,22 +475,19 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
 # CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
-CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
-CONFIG_SPI=y
-# CONFIG_SPI_SLAVE is not set
-CONFIG_SPI_EXCHANGE=y
-# CONFIG_SPI_CMDDATA is not set
-# CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
-# CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -490,8 +495,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -499,6 +514,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -513,7 +529,8 @@ CONFIG_NETDEV_TELNET=y
 CONFIG_TELNET_RXBUFFER_SIZE=256
 CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NETDEV_MULTINIC is not set
-# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
+CONFIG_NETDEV_STATISTICS=y
 # CONFIG_NETDEV_LATEINIT is not set
 
 #
@@ -522,10 +539,9 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -537,27 +553,28 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_ETH0_PHY_KSZ8041 is not set
 # CONFIG_ETH0_PHY_KSZ8051 is not set
 # CONFIG_ETH0_PHY_KSZ8061 is not set
-# CONFIG_ETH0_PHY_KSZ8081 is not set
+CONFIG_ETH0_PHY_KSZ8081=y
 # CONFIG_ETH0_PHY_KSZ90x1 is not set
 # CONFIG_ETH0_PHY_DP83848C is not set
 # CONFIG_ETH0_PHY_LAN8720 is not set
 # CONFIG_ETH0_PHY_LAN8740 is not set
 # CONFIG_ETH0_PHY_LAN8740A is not set
-CONFIG_ETH0_PHY_LAN8742A=y
+# CONFIG_ETH0_PHY_LAN8742A is not set
 # CONFIG_ETH0_PHY_DM9161 is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
 # CONFIG_UART1_SERIALDRIVER is not set
 # CONFIG_UART2_SERIALDRIVER is not set
-# CONFIG_UART3_SERIALDRIVER is not set
+CONFIG_UART3_SERIALDRIVER=y
 # CONFIG_UART4_SERIALDRIVER is not set
 # CONFIG_UART5_SERIALDRIVER is not set
 # CONFIG_UART6_SERIALDRIVER is not set
@@ -571,49 +588,52 @@ CONFIG_SERIAL=y
 # CONFIG_USART3_SERIALDRIVER is not set
 # CONFIG_USART4_SERIALDRIVER is not set
 # CONFIG_USART5_SERIALDRIVER is not set
-CONFIG_USART6_SERIALDRIVER=y
+# CONFIG_USART6_SERIALDRIVER is not set
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
-CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
-CONFIG_USART6_SERIAL_CONSOLE=y
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+CONFIG_UART3_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
 
 #
-# USART6 Configuration
+# UART3 Configuration
 #
-CONFIG_USART6_RXBUFSIZE=256
-CONFIG_USART6_TXBUFSIZE=256
-CONFIG_USART6_BAUD=115200
-CONFIG_USART6_BITS=8
-CONFIG_USART6_PARITY=0
-CONFIG_USART6_2STOP=0
-# CONFIG_USART6_IFLOWCONTROL is not set
-# CONFIG_USART6_OFLOWCONTROL is not set
-# CONFIG_USART6_DMA is not set
+CONFIG_UART3_RXBUFSIZE=256
+CONFIG_UART3_TXBUFSIZE=256
+CONFIG_UART3_BAUD=115200
+CONFIG_UART3_BITS=8
+CONFIG_UART3_PARITY=0
+CONFIG_UART3_2STOP=0
+# CONFIG_UART3_IFLOWCONTROL is not set
+# CONFIG_UART3_OFLOWCONTROL is not set
+# CONFIG_UART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -621,15 +641,13 @@ CONFIG_USART6_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
-CONFIG_NET_ETH_MTU=1294
-CONFIG_NET_ETH_TCP_RECVWNDO=1220
+CONFIG_NET_ETH_MTU=590
+CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
 
 #
@@ -643,14 +661,13 @@ CONFIG_NET_ETHERNET=y
 #
 # Network Device Operations
 #
-# CONFIG_NETDEV_PHY_IOCTL is not set
+CONFIG_NETDEV_PHY_IOCTL=y
 
 #
 # Internet Protocol Selection
 #
 CONFIG_NET_IPv4=y
-CONFIG_NET_IPv6=y
-CONFIG_NET_IPv6_NCONF_ENTRIES=8
+# CONFIG_NET_IPv6 is not set
 
 #
 # Socket Support
@@ -677,7 +694,7 @@ CONFIG_NET_TCP=y
 # CONFIG_NET_TCPURGDATA is not set
 CONFIG_NET_TCP_CONNS=8
 CONFIG_NET_MAX_LISTENPORTS=20
-# CONFIG_NET_TCP_READAHEAD is not set
+CONFIG_NET_TCP_READAHEAD=y
 CONFIG_NET_TCP_WRITE_BUFFERS=y
 CONFIG_NET_TCP_NWRBCHAINS=8
 CONFIG_NET_TCP_RECVDELAY=0
@@ -688,7 +705,7 @@ CONFIG_NET_TCPBACKLOG=y
 # UDP Networking
 #
 CONFIG_NET_UDP=y
-CONFIG_NET_UDP_CHECKSUMS=y
+# CONFIG_NET_UDP_CHECKSUMS is not set
 CONFIG_NET_UDP_CONNS=8
 CONFIG_NET_BROADCAST=y
 # CONFIG_NET_RXAVAIL is not set
@@ -700,17 +717,6 @@ CONFIG_NET_UDP_READAHEAD=y
 CONFIG_NET_ICMP=y
 CONFIG_NET_ICMP_PING=y
 
-#
-# ICMPv6 Networking Support
-#
-CONFIG_NET_ICMPv6=y
-CONFIG_NET_ICMPv6_PING=y
-CONFIG_NET_ICMPv6_NEIGHBOR=y
-CONFIG_ICMPv6_NEIGHBOR_MAXTRIES=5
-CONFIG_ICMPv6_NEIGHBOR_DELAYMSEC=20
-# CONFIG_NET_ICMPv6_AUTOCONF is not set
-# CONFIG_NET_ICMPv6_ROUTER is not set
-
 #
 # IGMPv2 Client Support
 #
@@ -722,7 +728,7 @@ CONFIG_ICMPv6_NEIGHBOR_DELAYMSEC=20
 CONFIG_NET_ARP=y
 CONFIG_NET_ARPTAB_SIZE=16
 CONFIG_NET_ARP_MAXAGE=120
-CONFIG_NET_ARP_IPIN=y
+# CONFIG_NET_ARP_IPIN is not set
 CONFIG_NET_ARP_SEND=y
 CONFIG_ARP_SEND_MAXTRIES=5
 CONFIG_ARP_SEND_DELAYMSEC=20
@@ -731,18 +737,19 @@ CONFIG_ARP_SEND_DELAYMSEC=20
 # Network I/O Buffer Support
 #
 CONFIG_NET_IOB=y
-CONFIG_IOB_NBUFFERS=24
+CONFIG_IOB_NBUFFERS=36
 CONFIG_IOB_BUFSIZE=196
 CONFIG_IOB_NCHAINS=8
+CONFIG_IOB_THROTTLE=8
 # CONFIG_NET_ARCH_INCR32 is not set
 # CONFIG_NET_ARCH_CHKSUM is not set
-# CONFIG_NET_STATISTICS is not set
+CONFIG_NET_STATISTICS=y
 
 #
 # Routing Table Configuration
 #
 # CONFIG_NET_ROUTE is not set
-CONFIG_NET_HOSTNAME="STM32F746G-DISCO"
+CONFIG_NET_HOSTNAME="Freedom-K64F"
 
 #
 # Crypto API
@@ -759,26 +766,35 @@ CONFIG_NET_HOSTNAME="STM32F746G-DISCO"
 # CONFIG_DISABLE_MOUNTPOINT is not set
 # CONFIG_FS_AUTOMOUNTER is not set
 # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
-# CONFIG_FS_READABLE is not set
-# CONFIG_FS_WRITABLE is not set
+CONFIG_FS_READABLE=y
+CONFIG_FS_WRITABLE=y
 # CONFIG_FS_NAMED_SEMAPHORES is not set
 CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
-# CONFIG_FS_FAT is not set
+CONFIG_FS_FAT=y
+# CONFIG_FAT_LCNAMES is not set
+# CONFIG_FAT_LFN is not set
+# CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
+# CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_NFS is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
 # CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
-# CONFIG_FS_PROCFS is not set
-# CONFIG_FS_UNIONFS is not set
+CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_REGISTER=y
 
 #
-# System Logging
+# Exclude individual procfs entries
 #
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_NET is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -789,7 +805,7 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # Memory Management
 #
 # CONFIG_MM_SMALL is not set
-CONFIG_MM_REGIONS=2
+CONFIG_MM_REGIONS=1
 # CONFIG_ARCH_HAVE_HEAP2 is not set
 # CONFIG_GRAN is not set
 
@@ -829,6 +845,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -839,33 +857,40 @@ CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
 CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
 CONFIG_ARCH_LOWPUTC=y
 # CONFIG_LIBC_LOCALTIME is not set
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
-# CONFIG_NETDB_DNSCLIENT is not set
+# CONFIG_NETDB_HOSTFILE is not set
+CONFIG_NETDB_DNSCLIENT=y
+CONFIG_NETDB_DNSCLIENT_ENTRIES=8
+CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
+CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
+CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_RESOLVCONF is not set
+# CONFIG_NETDB_DNSSERVER_NOADDR is not set
+CONFIG_NETDB_DNSSERVER_IPv4=y
+CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
 #
 # CONFIG_C99_BOOL8 is not set
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-# CONFIG_CXX_NEWLONG is not set
-
-#
-# uClibc++ Standard C++ Library
-#
-# CONFIG_UCLIBCXX is not set
+# CONFIG_HAVE_CXX is not set
 
 #
 # Application Configuration
@@ -884,20 +909,20 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
-# CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -905,29 +930,27 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_NETTEST is not set
 # CONFIG_EXAMPLES_NRF24L01TERM is not set
 CONFIG_EXAMPLES_NSH=y
-CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -935,16 +958,16 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
 # CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
 
 #
 # GPS Utilities
@@ -960,9 +983,11 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # Interpreters
 #
+# CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -975,18 +1000,21 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
-# CONFIG_NETUTILS_TFTPC is not set
-CONFIG_NETUTILS_NETLIB=y
-# CONFIG_NETUTILS_WEBCLIENT is not set
+CONFIG_NETUTILS_TFTPC=y
+CONFIG_NETUTILS_WEBCLIENT=y
+CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
+CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1038,12 +1066,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
+# CONFIG_NSH_DISABLE_MKFATFS is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+# CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1061,6 +1091,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1068,6 +1099,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 CONFIG_NSH_CMDOPT_DF_H=y
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
 CONFIG_NSH_FILEIOSIZE=512
 
 #
@@ -1081,12 +1113,15 @@ CONFIG_NSH_FILEIOSIZE=512
 # Console Configuration
 #
 CONFIG_NSH_CONSOLE=y
-# CONFIG_NSH_ARCHINIT is not set
+CONFIG_NSH_ARCHINIT=y
 
 #
 # Networking Configuration
 #
-# CONFIG_NSH_NETINIT_THREAD is not set
+CONFIG_NSH_NETINIT=y
+CONFIG_NSH_NETINIT_THREAD=y
+CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568
+CONFIG_NSH_NETINIT_THREAD_PRIORITY=80
 
 #
 # IP Address Configuration
@@ -1098,42 +1133,7 @@ CONFIG_NSH_CONSOLE=y
 CONFIG_NSH_IPADDR=0x0a000002
 CONFIG_NSH_DRIPADDR=0x0a000001
 CONFIG_NSH_NETMASK=0xffffff00
-
-#
-# Target IPv6 address
-#
-CONFIG_NSH_IPv6ADDR_1=0xfc00
-CONFIG_NSH_IPv6ADDR_2=0x0000
-CONFIG_NSH_IPv6ADDR_3=0x0000
-CONFIG_NSH_IPv6ADDR_4=0x0000
-CONFIG_NSH_IPv6ADDR_5=0x0000
-CONFIG_NSH_IPv6ADDR_6=0x0000
-CONFIG_NSH_IPv6ADDR_7=0x0000
-CONFIG_NSH_IPv6ADDR_8=0x0002
-
-#
-# Router IPv6 address
-#
-CONFIG_NSH_DRIPv6ADDR_1=0xfc00
-CONFIG_NSH_DRIPv6ADDR_2=0x0000
-CONFIG_NSH_DRIPv6ADDR_3=0x0000
-CONFIG_NSH_DRIPv6ADDR_4=0x0000
-CONFIG_NSH_DRIPv6ADDR_5=0x0000
-CONFIG_NSH_DRIPv6ADDR_6=0x0000
-CONFIG_NSH_DRIPv6ADDR_7=0x0000
-CONFIG_NSH_DRIPv6ADDR_8=0x0001
-
-#
-# IPv6 Network mask
-#
-CONFIG_NSH_IPv6NETMASK_1=0xffff
-CONFIG_NSH_IPv6NETMASK_2=0xffff
-CONFIG_NSH_IPv6NETMASK_3=0xffff
-CONFIG_NSH_IPv6NETMASK_4=0xffff
-CONFIG_NSH_IPv6NETMASK_5=0xffff
-CONFIG_NSH_IPv6NETMASK_6=0xffff
-CONFIG_NSH_IPv6NETMASK_7=0xffff
-CONFIG_NSH_IPv6NETMASK_8=0x0000
+# CONFIG_NSH_DNS is not set
 CONFIG_NSH_NOMAC=y
 CONFIG_NSH_SWMAC=y
 CONFIG_NSH_MACADDR=0x00e0deadbeef
@@ -1165,12 +1165,13 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_MDIO is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1179,6 +1180,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/freedom-k64f/netnsh/setenv.sh b/configs/freedom-k64f/netnsh/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..c07c4f160792260ada6c2368583dde8b4a573af5
--- /dev/null
+++ b/configs/freedom-k64f/netnsh/setenv.sh
@@ -0,0 +1,77 @@
+#!/bin/bash
+# configs/freedom-k64f/netnsh/setenv.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the Atmel GCC
+# toolchain under Windows.  You will also have to edit this if you install
+# this toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/freedom-k64f/nsh/Make.defs b/configs/freedom-k64f/nsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..4163c0a7f1f9c3dfa55d3b0de4e7c9a76d4e50c2
--- /dev/null
+++ b/configs/freedom-k64f/nsh/Make.defs
@@ -0,0 +1,111 @@
+############################################################################
+# configs/freedom-k64f/nsh/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/flash.ld}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/flash.ld
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/freedom-k64f/nsh/defconfig b/configs/freedom-k64f/nsh/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..f8371fbefa8780ac46869c413e8611dc41c658c7
--- /dev/null
+++ b/configs/freedom-k64f/nsh/defconfig
@@ -0,0 +1,1002 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+CONFIG_MOTOROLA_SREC=y
+# CONFIG_RAW_BINARY is not set
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+CONFIG_ARCH_CHIP_KINETIS=y
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+# CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="kinetis"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+
+#
+# Kinetis Configuration Options
+#
+# CONFIG_ARCH_CHIP_MK20DN32VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX32VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DN64VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX64VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DN128VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX128VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX64VLH7 is not set
+# CONFIG_ARCH_CHIP_MK20DX128VLH7 is not set
+# CONFIG_ARCH_CHIP_MK20DX256VLH7 is not set
+# CONFIG_ARCH_CHIP_MK40N512VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK40N512VMD100 is not set
+# CONFIG_ARCH_CHIP_MK40X128VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK40X128VMD100 is not set
+# CONFIG_ARCH_CHIP_MK40X256VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK40X256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60N256VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK60N256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VLL100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60X256VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK60X256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60FN1M0VLQ12 is not set
+CONFIG_ARCH_CHIP_MK64FN1M0VLL12=y
+# CONFIG_ARCH_CHIP_MK64FX512VLL12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VDC12 is not set
+# CONFIG_ARCH_CHIP_MK64FN1M0VDC12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VLQ12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VMD12 is not set
+# CONFIG_ARCH_CHIP_MK64FN1M0VMD12 is not set
+# CONFIG_ARCH_FAMILY_K20 is not set
+# CONFIG_ARCH_FAMILY_K40 is not set
+# CONFIG_ARCH_FAMILY_K60 is not set
+CONFIG_ARCH_FAMILY_K64=y
+
+#
+# Kinetis Peripheral Support
+#
+CONFIG_KINETIS_HAVE_I2C1=y
+CONFIG_KINETIS_HAVE_I2C2=y
+# CONFIG_KINETIS_TRACE is not set
+# CONFIG_KINETIS_FLEXBUS is not set
+CONFIG_KINETIS_UART0=y
+# CONFIG_KINETIS_UART1 is not set
+# CONFIG_KINETIS_UART2 is not set
+# CONFIG_KINETIS_UART3 is not set
+# CONFIG_KINETIS_UART4 is not set
+# CONFIG_KINETIS_UART5 is not set
+# CONFIG_KINETIS_ENET is not set
+# CONFIG_KINETIS_RNGB is not set
+# CONFIG_KINETIS_FLEXCAN0 is not set
+# CONFIG_KINETIS_FLEXCAN1 is not set
+# CONFIG_KINETIS_SPI0 is not set
+# CONFIG_KINETIS_SPI1 is not set
+# CONFIG_KINETIS_SPI2 is not set
+# CONFIG_KINETIS_I2C0 is not set
+# CONFIG_KINETIS_I2C1 is not set
+# CONFIG_KINETIS_I2C2 is not set
+# CONFIG_KINETIS_I2S is not set
+# CONFIG_KINETIS_DAC0 is not set
+# CONFIG_KINETIS_DAC1 is not set
+# CONFIG_KINETIS_ADC0 is not set
+# CONFIG_KINETIS_ADC1 is not set
+# CONFIG_KINETIS_CMP is not set
+# CONFIG_KINETIS_VREF is not set
+CONFIG_KINETIS_SDHC=y
+CONFIG_KINETIS_FTM0=y
+# CONFIG_KINETIS_FTM1 is not set
+# CONFIG_KINETIS_FTM2 is not set
+# CONFIG_KINETIS_LPTIMER is not set
+# CONFIG_KINETIS_RTC is not set
+# CONFIG_KINETIS_EWM is not set
+# CONFIG_KINETIS_CMT is not set
+# CONFIG_KINETIS_USBOTG is not set
+# CONFIG_KINETIS_USBDCD is not set
+# CONFIG_KINETIS_LLWU is not set
+# CONFIG_KINETIS_TSI is not set
+# CONFIG_KINETIS_FTFL is not set
+# CONFIG_KINETIS_DMA is not set
+# CONFIG_KINETIS_CRC is not set
+# CONFIG_KINETIS_PDB is not set
+# CONFIG_KINETIS_PIT is not set
+
+#
+# Kinetis FTM PWM Configuration
+#
+CONFIG_KINETIS_FTM0_PWM=y
+CONFIG_KINETIS_FTM0_CHANNEL=2
+
+#
+# Kinetis GPIO Interrupt Configuration
+#
+CONFIG_KINETIS_GPIOIRQ=y
+# CONFIG_KINETIS_PORTAINTS is not set
+# CONFIG_KINETIS_PORTBINTS is not set
+# CONFIG_KINETIS_PORTCINTS is not set
+# CONFIG_KINETIS_PORTDINTS is not set
+CONFIG_KINETIS_PORTEINTS=y
+
+#
+# Kinetis SDHC Configuration
+#
+CONFIG_KINETIS_SDHC_DMA=y
+# CONFIG_KINETIS_SDHC_WIDTH_D1_ONLY is not set
+# CONFIG_KINETIS_SDHC_ABSFREQ is not set
+
+#
+# Kinetis UART Configuration
+#
+# CONFIG_KINETIS_UARTFIFOS is not set
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+CONFIG_ARCH_HAVE_RAMFUNCS=y
+CONFIG_ARCH_RAMFUNCS=y
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=10016
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x1fff0000
+CONFIG_RAM_SIZE=131072
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_FREEDOM_K64F=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="freedom-k64f"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+# CONFIG_ARCH_BUTTONS is not set
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+CONFIG_DISABLE_POSIX_TIMERS=y
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+CONFIG_DISABLE_MQUEUE=y
+CONFIG_DISABLE_ENVIRON=y
+
+#
+# Clocks and Timers
+#
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2013
+CONFIG_START_MONTH=3
+CONFIG_START_DAY=25
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_SPINLOCK is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+CONFIG_DISABLE_POLL=y
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+CONFIG_PWM=y
+# CONFIG_ARCH_HAVE_I2CRESET is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+CONFIG_MMCSD=y
+CONFIG_MMCSD_NSLOTS=1
+# CONFIG_MMCSD_READONLY is not set
+CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
+# CONFIG_MMCSD_MMCSUPPORT is not set
+CONFIG_MMCSD_HAVECARDDETECT=y
+CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
+# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+CONFIG_MMCSD_SDIO=y
+# CONFIG_SDIO_PREFLIGHT is not set
+# CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
+# CONFIG_SDIO_BLOCKSETUP is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+CONFIG_UART0_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# UART0 Configuration
+#
+CONFIG_UART0_RXBUFSIZE=256
+CONFIG_UART0_TXBUFSIZE=256
+CONFIG_UART0_BAUD=115200
+CONFIG_UART0_BITS=8
+CONFIG_UART0_PARITY=0
+CONFIG_UART0_2STOP=0
+# CONFIG_UART0_IFLOWCONTROL is not set
+# CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+CONFIG_FS_READABLE=y
+CONFIG_FS_WRITABLE=y
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+# CONFIG_FS_RAMMAP is not set
+CONFIG_FS_FAT=y
+CONFIG_FAT_LCNAMES=y
+CONFIG_FAT_LFN=y
+CONFIG_FAT_MAXFNAME=32
+# CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
+# CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_REGISTER=y
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
+# CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+CONFIG_EXAMPLES_PWM=y
+CONFIG_EXAMPLES_PWM_DEVPATH="/dev/pwm0"
+CONFIG_EXAMPLES_PWM_FREQUENCY=100
+CONFIG_EXAMPLES_PWM_DURATION=5
+CONFIG_EXAMPLES_PWM_DUTYPCT=50
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFATFS is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/nucleo-144/nsh/setenv.sh b/configs/freedom-k64f/nsh/setenv.sh
similarity index 98%
rename from configs/nucleo-144/nsh/setenv.sh
rename to configs/freedom-k64f/nsh/setenv.sh
index 8498950aed9b16d4a935113de6d9f2a8d9e0baf5..abb64617f410b17972ca6e91ed56525517b35fd0 100644
--- a/configs/nucleo-144/nsh/setenv.sh
+++ b/configs/freedom-k64f/nsh/setenv.sh
@@ -1,5 +1,5 @@
 #!/bin/bash
-# configs/nucleo-144/nsh/setenv.sh
+# configs/freedom-k64f/nsh/setenv.sh
 #
 #   Copyright (C) 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
diff --git a/configs/freedom-k64f/scripts/flash.ld b/configs/freedom-k64f/scripts/flash.ld
new file mode 100644
index 0000000000000000000000000000000000000000..f60e7d330e01fdcb98d2dea09a02fd72e3164bd4
--- /dev/null
+++ b/configs/freedom-k64f/scripts/flash.ld
@@ -0,0 +1,142 @@
+/****************************************************************************
+ * configs/freedom-k64f/scripts/flash.ld
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* The MK64FN1M0VLL12 has 1M of FLASH beginning at address 0x0000:0000 and
+ * 128Kb of SRAM beginning at address 0x1800:0000 (SRAM_L) and 0x2000:000
+ * (SRAM_U).
+ *
+ * NOTE: that the first part of the K64 FLASH region is reserved for
+ *       interrupt vectflash and, following that, is a region from 0x0000:0400
+ *       to 0x0000:040f that is reserved for the FLASH control fields (FCF).
+ *
+ * NOTE: The on-chip RAM is split evenly among SRAM_L and SRAM_U. The RAM is
+ *       also implemented such that the SRAM_L and SRAM_U ranges form a
+ *       contiguous block in the memory map.
+ */
+
+MEMORY
+{
+	vectflash (rx)  : ORIGIN = 0x00000000, LENGTH = 1K
+	cfmprotect (rx) : ORIGIN = 0x00000400, LENGTH = 16
+	progflash (rx)  : ORIGIN = 0x00000800, LENGTH = 1M
+	datasram (rwx)  : ORIGIN = 0x1fff0000, LENGTH = 128K
+}
+
+OUTPUT_ARCH(arm)
+ENTRY(_stext)
+EXTERN(__flashconfigbytes)
+SECTIONS
+{
+	.vectors : {
+		_svectors = ABSOLUTE(.);
+		*(.vectors)
+		_evectors = ABSOLUTE(.);
+	} > vectflash
+
+	.cfmprotect : {
+		KEEP(*(.cfmconfig))
+	} > cfmprotect
+
+	.text : {
+		_stext = ABSOLUTE(.);
+		*(.text .text.*)
+		*(.fixup)
+		*(.gnu.warning)
+		*(.rodata .rodata.*)
+		*(.gnu.linkonce.t.*)
+		*(.glue_7)
+		*(.glue_7t)
+		*(.got)
+		*(.gcc_except_table)
+		*(.gnu.linkonce.r.*)
+		_etext = ABSOLUTE(.);
+	} > progflash
+
+	.init_section : {
+		_sinit = ABSOLUTE(.);
+		*(.init_array .init_array.*)
+		_einit = ABSOLUTE(.);
+	} > progflash
+
+	.ARM.extab : {
+		*(.ARM.extab*)
+	} > progflash
+
+	__exidx_start = ABSOLUTE(.);
+	.ARM.exidx : {
+		*(.ARM.exidx*)
+	} > progflash
+	__exidx_end = ABSOLUTE(.);
+
+	.data : {
+		_sdata = ABSOLUTE(.);
+		*(.data .data.*)
+		*(.gnu.linkonce.d.*)
+		CONSTRUCTORS
+		_edata = ABSOLUTE(.);
+	} > datasram AT > progflash
+
+	_eronly = LOADADDR(.data);
+
+	.ramfunc ALIGN(4): {
+		_sramfuncs = ABSOLUTE(.);
+		*(.ramfunc  .ramfunc.*)
+		_eramfuncs = ABSOLUTE(.);
+	} > datasram AT > progflash
+
+	_framfuncs = LOADADDR(.ramfunc);
+
+	.bss : {
+		_sbss = ABSOLUTE(.);
+		*(.bss .bss.*)
+		*(.gnu.linkonce.b.*)
+		*(COMMON)
+		_ebss = ABSOLUTE(.);
+	} > datasram
+
+	/* Stabs debugging sections. */
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_info 0 : { *(.debug_info) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/freedom-k64f/src/Makefile b/configs/freedom-k64f/src/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..e11590bbc11ef2178141d9d827249ee166a9a5f8
--- /dev/null
+++ b/configs/freedom-k64f/src/Makefile
@@ -0,0 +1,80 @@
+############################################################################
+# configs/freedom-k64f/src/Makefile
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+ASRCS =
+CSRCS = k64_boot.c k64_spi.c
+
+ifeq ($(CONFIG_ARCH_LEDS),y)
+CSRCS += k64_autoleds.c
+else
+CSRCS += k64_userleds.c
+endif
+
+ifeq ($(CONFIG_ARCH_BUTTONS),y)
+CSRCS += k64_buttons.c
+endif
+
+ifeq ($(CONFIG_LIB_BOARDCTL),y)
+CSRCS += k64_appinit.c k64_bringup.c
+else ifeq ($(CONFIG_BOARD_INITIALIZE),y)
+CSRCS += k64_bringup.c
+endif
+
+ifeq ($(CONFIG_KINETIS_SDHC),y)
+CSRCS += k64_sdhc.c
+ifeq ($(CONFIG_FS_AUTOMOUNTER),y)
+CSRCS += k64_automount.c
+endif
+endif
+
+ifeq ($(CONFIG_USBDEV),y)
+CSRCS += k64_usbdev.c
+endif
+
+ifeq ($(CONFIG_USBMSC),y)
+CSRCS += k64_usbmsc.c
+endif
+
+ifeq ($(CONFIG_PWM),y)
+CSRCS += k64_pwm.c
+endif
+
+ifeq ($(CONFIG_BOARDCTL_UNIQUEID),y)
+CSRCS += k64_uid.c
+endif
+
+include $(TOPDIR)/configs/Board.mk
diff --git a/configs/freedom-k64f/src/freedom-k64f.h b/configs/freedom-k64f/src/freedom-k64f.h
new file mode 100644
index 0000000000000000000000000000000000000000..40f788d7cd208543a6296cd0b61c7c2dda31111b
--- /dev/null
+++ b/configs/freedom-k64f/src/freedom-k64f.h
@@ -0,0 +1,361 @@
+/************************************************************************************
+ * configs/freedom-k64f/src/freedom-k64f.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *   Updated: Neil Hancock
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __CONFIGS_FREEDOM_K64F_SRC_FREEDOM_K64F_H
+#define __CONFIGS_FREEDOM_K64F_SRC_FREEDOM_K64F_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include 
+#include 
+#include 
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Application Configuration ********************************************************/
+
+/* Assume we have everything */
+
+#define HAVE_PROC        1
+#define HAVE_MMCSD       1
+#define HAVE_AUTOMOUNTER 1
+#define HAVE_USBDEV      1
+
+#if defined(CONFIG_KINETIS_RTC)
+#define HAVE_RTC_DRIVER  1
+#endif
+
+/* Automount procfs */
+
+#if !defined(CONFIG_FS_PROCFS)
+#  undef HAVE_PROC
+#endif
+
+#if defined(HAVE_PROC) && defined(CONFIG_DISABLE_MOUNTPOINT)
+#  warning Mountpoints disabled.  No procfs support
+#  undef HAVE_PROC
+#endif
+
+#if defined(CONFIG_NSH_PROC_MOUNTPOINT)
+#  define PROCFS_MOUNTPOUNT CONFIG_NSH_PROC_MOUNTPOINT
+#else
+#  define PROCFS_MOUNTPOUNT "/proc"
+#endif
+
+/* SD card support */
+
+#define MMCSD_SLOTNO 0
+
+/* Can't support MMC/SD features if mountpoints are disabled or if SDHC support
+ * is not enabled.
+ */
+
+#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_KINETIS_SDHC)
+#  undef HAVE_MMCSD
+#endif
+
+#ifdef HAVE_MMCSD
+#  if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != 0
+#    error Only one MMC/SD slot, slot 0
+#  endif
+
+#  ifdef CONFIG_NSH_MMCSDMINOR
+#    define MMSCD_MINOR CONFIG_NSH_MMCSDMINOR
+#  else
+#    define MMSCD_MINOR 0
+#  endif
+
+/* We expect to receive GPIO interrupts for card insertion events */
+
+#  ifndef CONFIG_KINETIS_GPIOIRQ
+#    error "CONFIG_KINETIS_GPIOIRQ required for card detect interrupt"
+#  endif
+
+#  ifndef CONFIG_KINETIS_PORTEINTS
+#    error "CONFIG_KINETIS_PORTEINTS required for card detect interrupt"
+#  endif
+
+#endif
+
+/* Automounter */
+
+#if !defined(CONFIG_FS_AUTOMOUNTER) || !defined(HAVE_MMCSD)
+#  undef HAVE_AUTOMOUNTER
+#  undef CONFIG_FRDMK64F_SDHC_AUTOMOUNT
+#endif
+
+#ifndef CONFIG_FRDMK64F_SDHC_AUTOMOUNT
+#  undef HAVE_AUTOMOUNTER
+#endif
+
+/* Automounter defaults */
+
+#ifdef HAVE_AUTOMOUNTER
+
+#  ifndef CONFIG_FRDMK64F_SDHC_AUTOMOUNT_FSTYPE
+#    define CONFIG_FRDMK64F_SDHC_AUTOMOUNT_FSTYPE "vfat"
+#  endif
+
+#  ifndef CONFIG_FRDMK64F_SDHC_AUTOMOUNT_BLKDEV
+#    define CONFIG_FRDMK64F_SDHC_AUTOMOUNT_BLKDEV "/dev/mmcds0"
+#  endif
+
+#  ifndef CONFIG_FRDMK64F_SDHC_AUTOMOUNT_MOUNTPOINT
+#    define CONFIG_FRDMK64F_SDHC_AUTOMOUNT_MOUNTPOINT "/mnt/sdcard"
+#  endif
+
+#  ifndef CONFIG_FRDMK64F_SDHC_AUTOMOUNT_DDELAY
+#    define CONFIG_FRDMK64F_SDHC_AUTOMOUNT_DDELAY 1000
+#  endif
+
+#  ifndef CONFIG_FRDMK64F_SDHC_AUTOMOUNT_UDELAY
+#    define CONFIG_FRDMK64F_SDHC_AUTOMOUNT_UDELAY 2000
+#  endif
+#endif /* HAVE_AUTOMOUNTER */
+
+/* Can't support USB features if USB is not enabled */
+
+#ifndef CONFIG_USBDEV
+#  undef HAVE_USBDEV
+#endif
+
+/* How many SPI modules does this chip support? The LM3S6918 supports 2 SPI
+ * modules (others may support more -- in such case, the following must be
+ * expanded).
+ */
+
+#if KINETIS_NSPI < 1
+#  undef CONFIG_KINETIS_SPI1
+#  undef CONFIG_KINETIS_SPI2
+#elif KINETIS_NSPI < 2
+#  undef CONFIG_KINETIS_SPI2
+#endif
+
+/* FREEDOM-K64F GPIOs ****************************************************************/
+/* A micro Secure Digital (SD) card slot is available on the FRDM-K64F connected to
+ * the SD Host Controller (SDHC) signals of the MCU. This slot will accept micro
+ * format SD memory cards. The SD card detect pin (PTE6) is an open switch that
+ * shorts with VDD when card is inserted.
+ *
+ *   ------------ ------------- --------
+ *    SD Card Slot Board Signal  K64F Pin
+ *    ------------ ------------- --------
+ *    DAT0         SDHC0_D0      PTE0
+ *    DAT1         SDHC0_D1      PTE1
+ *    DAT2         SDHC0_D2      PTE5
+ *    CD/DAT3      SDHC0_D3      PTE4
+ *    CMD          SDHC0_CMD     PTE3
+ *    CLK          SDHC0_DCLK    PTE2
+ *    SWITCH       D_CARD_DETECT PTE6
+ *    ------------ ------------- --------
+ *
+ * There is no Write Protect pin available to the K64F.
+ */
+
+#define GPIO_SD_CARDDETECT (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTE | PIN6)
+
+/* Two push buttons, SW2 and SW3, are available on FRDM-K64F board, where SW2 is
+ * connected to PTC6 and SW3 is connected to PTA4. Besides the general purpose
+ * input/output functions, SW2 and SW3 can be low-power wake up signal. Also, only
+ * SW3 can be a non-maskable interrupt.
+ *
+ *   Switch    GPIO Function
+ *   --------- ---------------------------------------------------------------
+ *   SW2       PTC6/SPI0_SOUT/PD0_EXTRG/I2S0_RX_BCLK/FB_AD9/I2S0_MCLK/LLWU_P10
+ *   SW3       PTA4/FTM0_CH1/NMI_b/LLWU_P3
+ */
+
+#define GPIO_SW2           (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTC | PIN6)
+#define GPIO_SW3           (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTA | PIN4)
+
+/* An RGB LED is connected through GPIO as shown below:
+ *
+ *   LED    K64
+ *   ------ -------------------------------------------------------
+ *   RED    PTB22/SPI2_SOUT/FB_AD29/CMP2_OUT
+ *   GREEN  PTE26/ENET_1588_CLKIN/UART4_CTS_b/RTC_CLKOUT/USB0_CLKIN
+ *   BLUE   PTB21/SPI2_SCK/FB_AD30/CMP1_OUT
+ */
+
+#define GPIO_LED_R         (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTB | PIN22)
+#define GPIO_LED_G         (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTE | PIN26)
+#define GPIO_LED_B         (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTB | PIN21)
+
+/************************************************************************************
+ * Public data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: k64_spidev_initialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins for the FREEDOM-K64F board.
+ *
+ ************************************************************************************/
+
+void weak_function k64_spidev_initialize(void);
+
+/************************************************************************************
+ * Name: k64_usbinitialize
+ *
+ * Description:
+ *   Called to setup USB-related GPIO pins for the FREEDOM-K64F board.
+ *
+ ************************************************************************************/
+
+void weak_function k64_usbinitialize(void);
+
+/************************************************************************************
+ * Name: k64_bringup
+ *
+ * Description:
+ *   Bring up board features
+ *
+ ************************************************************************************/
+
+#if defined(CONFIG_LIB_BOARDCTL) || defined(CONFIG_BOARD_INITIALIZE)
+int k64_bringup(void);
+#endif
+
+/****************************************************************************
+ * Name: k64_sdhc_initialize
+ *
+ * Description:
+ *   Inititialize the SDHC SD card slot
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_MMCSD
+int k64_sdhc_initialize(void);
+#else
+#  define k64_sdhc_initialize() (OK)
+#endif
+
+/************************************************************************************
+ * Name: k64_cardinserted
+ *
+ * Description:
+ *   Check if a card is inserted into the SDHC slot
+ *
+ ************************************************************************************/
+
+#ifdef HAVE_AUTOMOUNTER
+bool k64_cardinserted(void);
+#else
+#  define k64_cardinserted() (false)
+#endif
+
+/************************************************************************************
+ * Name: k64_writeprotected
+ *
+ * Description:
+ *   Check if the card in the MMC/SD slot is write protected
+ *
+ ************************************************************************************/
+
+#ifdef HAVE_AUTOMOUNTER
+bool k64_writeprotected(void);
+#else
+#  define k64_writeprotected() (false)
+#endif
+
+/************************************************************************************
+ * Name:  k64_automount_initialize
+ *
+ * Description:
+ *   Configure auto-mounter for the configured SDHC slot
+ *
+ * Input Parameters:
+ *   None
+ *
+ *  Returned Value:
+ *    None
+ *
+ ************************************************************************************/
+
+#ifdef HAVE_AUTOMOUNTER
+void k64_automount_initialize(void);
+#endif
+
+/************************************************************************************
+ * Name:  k64_automount_event
+ *
+ * Description:
+ *   The SDHC card detection logic has detected an insertion or removal event.  It
+ *   has already scheduled the MMC/SD block driver operations.  Now we need to
+ *   schedule the auto-mount event which will occur with a substantial delay to make
+ *   sure that everything has settle down.
+ *
+ * Input Parameters:
+ *   inserted - True if the card is inserted in the slot.  False otherwise.
+ *
+ *  Returned Value:
+ *    None
+ *
+ *  Assumptions:
+ *    Interrupts are disabled.
+ *
+ ************************************************************************************/
+
+#ifdef HAVE_AUTOMOUNTER
+void k64_automount_event(bool inserted);
+#endif
+
+/************************************************************************************
+ * Name: k64_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PWM
+int k64_pwm_setup(void);
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __CONFIGS_FREEDOM_K64F_SRC_FREEDOM_K64F_H */
diff --git a/configs/compal_e88/src/boot.c b/configs/freedom-k64f/src/k64_appinit.c
similarity index 85%
rename from configs/compal_e88/src/boot.c
rename to configs/freedom-k64f/src/k64_appinit.c
index a3c68292275d6025a66a5b57c8981b34dcb7f413..ba19f5b851d33543824283f7b328315f627c8a52 100644
--- a/configs/compal_e88/src/boot.c
+++ b/configs/freedom-k64f/src/k64_appinit.c
@@ -1,8 +1,8 @@
 /****************************************************************************
- * configs/compal_e88/boot.c
+ * config/freedom-k64f/src/k64_appinit.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author:  Gregory Nutt 
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -38,8 +38,15 @@
  ****************************************************************************/
 
 #include 
+
+#include 
+
 #include 
 
+#include "freedom-k64f.h"
+
+#ifdef CONFIG_LIB_BOARDCTL
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -48,7 +55,9 @@
  * Name: board_app_initialize
  *
  * Description:
- *   Perform architecture specific initialization
+ *   Perform application specific initialization.  This function is never
+ *   called directly from application code, but only indirectly via the
+ *   (non-standard) boardctl() interface using the command BOARDIOC_INIT.
  *
  * Input Parameters:
  *   arg - The boardctl() argument is passed to the board_app_initialize()
@@ -67,9 +76,15 @@
  *
  ****************************************************************************/
 
-#ifdef CONFIG_LIB_BOARDCTL
 int board_app_initialize(uintptr_t arg)
 {
-  return 0;
+#ifndef CONFIG_BOARD_INITIALIZE
+  /* Perform board initialization */
+
+  return k64_bringup();
+#else
+  return OK;
+#endif
 }
+
 #endif /* CONFIG_LIB_BOARDCTL */
diff --git a/configs/freedom-k64f/src/k64_autoleds.c b/configs/freedom-k64f/src/k64_autoleds.c
new file mode 100644
index 0000000000000000000000000000000000000000..5fb416f208f4c5517ecad7c03d13ef622ff0ebe2
--- /dev/null
+++ b/configs/freedom-k64f/src/k64_autoleds.c
@@ -0,0 +1,162 @@
+/****************************************************************************
+ * configs/freedom-k64f/src/k64_autoleds.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+/* The Freedom K64F has a single RGB LED driven by the K64F as follows:
+ *
+ *   LED    K64
+ *   ------ -------------------------------------------------------
+ *   RED    PTB22/SPI2_SOUT/FB_AD29/CMP2_OUT
+ *   BLUE   PTB21/SPI2_SCK/FB_AD30/CMP1_OUT
+ *   GREEN  PTE26/ENET_1588_CLKIN/UART4_CTS_b/RTC_CLKOUT/USB0_CLKIN
+ *
+ * If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board
+ * the Freedom K64F.  The following definitions describe how NuttX controls
+ * the LEDs:
+ *
+ *   SYMBOL                Meaning                 LED state
+ *                                                 RED   GREEN  BLUE
+ *   -------------------  -----------------------  -----------------
+ *   LED_STARTED          NuttX has been started    OFF  OFF  OFF
+ *   LED_HEAPALLOCATE     Heap has been allocated   OFF  OFF  ON
+ *   LED_IRQSENABLED      Interrupts enabled        OFF  OFF  ON
+ *   LED_STACKCREATED     Idle stack created        OFF  ON   OFF
+ *   LED_INIRQ            In an interrupt          (no change)
+ *   LED_SIGNAL           In a signal handler      (no change)
+ *   LED_ASSERTION        An assertion failed      (no change)
+ *   LED_PANIC            The system has crashed    FLASH OFF OFF
+ *   LED_IDLE             K64 is in sleep mode     (Optional, not used)
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "chip.h"
+#include "kinetis.h"
+#include "freedom-k64f.h"
+
+#ifdef CONFIG_ARCH_LEDS
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Summary of all possible settings */
+
+#define LED_NOCHANGE      0 /* LED_IRQSENABLED, LED_INIRQ, LED_SIGNAL, LED_ASSERTION */
+#define LED_OFF_OFF_OFF   1 /* LED_STARTED */
+#define LED_OFF_OFF_ON    2 /* LED_HEAPALLOCATE */
+#define LED_OFF_ON_OFF    3 /* LED_STACKCREATED */
+#define LED_ON_OFF_OFF    4 /* LED_PANIC */
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_autoled_initialize
+ *
+ * Description:
+ *   Initialize the on-board LED
+ *
+ ****************************************************************************/
+
+void board_autoled_initialize(void)
+{
+  kinetis_pinconfig(GPIO_LED_R);
+  kinetis_pinconfig(GPIO_LED_G);
+  kinetis_pinconfig(GPIO_LED_B);
+}
+
+/****************************************************************************
+ * Name: board_autoled_on
+ ****************************************************************************/
+
+void board_autoled_on(int led)
+{
+  if (led != LED_NOCHANGE)
+    {
+      bool redoff   = true;
+      bool greenoff = true;
+      bool blueoff  = true;
+
+      switch (led)
+        {
+          default:
+          case LED_OFF_OFF_OFF:
+            break;
+
+          case LED_OFF_OFF_ON:
+            blueoff = false;
+            break;
+
+          case LED_OFF_ON_OFF:
+            greenoff = false;
+            break;
+
+          case LED_ON_OFF_OFF:
+            redoff = false;
+            break;
+        }
+
+      kinetis_gpiowrite(GPIO_LED_R, redoff);
+      kinetis_gpiowrite(GPIO_LED_G, greenoff);
+      kinetis_gpiowrite(GPIO_LED_B, blueoff);
+    }
+}
+
+/****************************************************************************
+ * Name: board_autoled_off
+ ****************************************************************************/
+
+void board_autoled_off(int led)
+{
+  if (led == LED_ON_OFF_OFF)
+    {
+      kinetis_gpiowrite(GPIO_LED_R, true);
+      kinetis_gpiowrite(GPIO_LED_G, true);
+      kinetis_gpiowrite(GPIO_LED_B, true);
+    }
+}
+
+#endif /* CONFIG_ARCH_LEDS */
diff --git a/configs/freedom-k64f/src/k64_automount.c b/configs/freedom-k64f/src/k64_automount.c
new file mode 100644
index 0000000000000000000000000000000000000000..8ec1be29ffe9925488091eec26a305b419bb16c0
--- /dev/null
+++ b/configs/freedom-k64f/src/k64_automount.c
@@ -0,0 +1,322 @@
+/************************************************************************************
+ * configs/freedom-k64f/src/k64_automount.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#if defined(CONFIG_FS_AUTOMOUNTER_DEBUG) && !defined(CONFIG_DEBUG_FS)
+#  define CONFIG_DEBUG_FS 1
+#endif
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include "freedom-k64f.h"
+
+#ifdef HAVE_AUTOMOUNTER
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#ifndef NULL
+#  define NULL (FAR void *)0
+#endif
+
+#ifndef OK
+#  define OK 0
+#endif
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+/* This structure represents the changeable state of the automounter */
+
+struct k64_automount_state_s
+{
+  volatile automount_handler_t handler;    /* Upper half handler */
+  FAR void *arg;                           /* Handler argument */
+  bool enable;                             /* Fake interrupt enable */
+  bool pending;                            /* Set if there an event while disabled */
+};
+
+/* This structure represents the static configuration of an automounter */
+
+struct k64_automount_config_s
+{
+  /* This must be first thing in structure so that we can simply cast from struct
+   * automount_lower_s to struct k64_automount_config_s
+   */
+
+  struct automount_lower_s lower;          /* Publicly visible part */
+  FAR struct k64_automount_state_s *state; /* Changeable state */
+};
+
+/************************************************************************************
+ * Private Function Prototypes
+ ************************************************************************************/
+
+static int  k64_attach(FAR const struct automount_lower_s *lower,
+                       automount_handler_t isr, FAR void *arg);
+static void k64_enable(FAR const struct automount_lower_s *lower, bool enable);
+static bool k64_inserted(FAR const struct automount_lower_s *lower);
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+static struct k64_automount_state_s g_sdhc_state;
+static const struct k64_automount_config_s g_sdhc_config =
+{
+  .lower        =
+  {
+    .fstype     = CONFIG_FRDMK64F_SDHC_AUTOMOUNT_FSTYPE,
+    .blockdev   = CONFIG_FRDMK64F_SDHC_AUTOMOUNT_BLKDEV,
+    .mountpoint = CONFIG_FRDMK64F_SDHC_AUTOMOUNT_MOUNTPOINT,
+    .ddelay     = MSEC2TICK(CONFIG_FRDMK64F_SDHC_AUTOMOUNT_DDELAY),
+    .udelay     = MSEC2TICK(CONFIG_FRDMK64F_SDHC_AUTOMOUNT_UDELAY),
+    .attach     = k64_attach,
+    .enable     = k64_enable,
+    .inserted   = k64_inserted
+  },
+  .state        = &g_sdhc_state
+};
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name:  k64_attach
+ *
+ * Description:
+ *   Attach a new SDHC event handler
+ *
+ * Input Parameters:
+ *   lower - An instance of the auto-mounter lower half state structure
+ *   isr   - The new event handler to be attach
+ *   arg   - Client data to be provided when the event handler is invoked.
+ *
+ *  Returned Value:
+ *    Always returns OK
+ *
+ ************************************************************************************/
+
+static int k64_attach(FAR const struct automount_lower_s *lower,
+                      automount_handler_t isr, FAR void *arg)
+{
+  FAR const struct k64_automount_config_s *config;
+  FAR struct k64_automount_state_s *state;
+
+  /* Recover references to our structure */
+
+  config = (FAR struct k64_automount_config_s *)lower;
+  DEBUGASSERT(config != NULL && config->state != NULL);
+
+  state = config->state;
+
+  /* Save the new handler info (clearing the handler first to eliminate race
+   * conditions).
+   */
+
+  state->handler = NULL;
+  state->pending = false;
+  state->arg     = arg;
+  state->handler = isr;
+  return OK;
+}
+
+/************************************************************************************
+ * Name:  k64_enable
+ *
+ * Description:
+ *   Enable card insertion/removal event detection
+ *
+ * Input Parameters:
+ *   lower - An instance of the auto-mounter lower half state structure
+ *   enable - True: enable event detection; False: disable
+ *
+ *  Returned Value:
+ *    None
+ *
+ ************************************************************************************/
+
+static void k64_enable(FAR const struct automount_lower_s *lower, bool enable)
+{
+  FAR const struct k64_automount_config_s *config;
+  FAR struct k64_automount_state_s *state;
+  irqstate_t flags;
+
+  /* Recover references to our structure */
+
+  config = (FAR struct k64_automount_config_s *)lower;
+  DEBUGASSERT(config != NULL && config->state != NULL);
+
+  state = config->state;
+
+  /* Save the fake enable setting */
+
+  flags = enter_critical_section();
+  state->enable = enable;
+
+  /* Did an interrupt occur while interrupts were disabled? */
+
+  if (enable && state->pending)
+    {
+      /* Yes.. perform the fake interrupt if the interrutp is attached */
+
+      if (state->handler)
+        {
+          bool inserted = k64_cardinserted();
+          (void)state->handler(&config->lower, state->arg, inserted);
+        }
+
+      state->pending = false;
+    }
+
+  leave_critical_section(flags);
+}
+
+/************************************************************************************
+ * Name: k64_inserted
+ *
+ * Description:
+ *   Check if a card is inserted into the slot.
+ *
+ * Input Parameters:
+ *   lower - An instance of the auto-mounter lower half state structure
+ *
+ *  Returned Value:
+ *    True if the card is inserted; False otherwise
+ *
+ ************************************************************************************/
+
+static bool k64_inserted(FAR const struct automount_lower_s *lower)
+{
+  return k64_cardinserted();
+}
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name:  k64_automount_initialize
+ *
+ * Description:
+ *   Configure auto-mounters for each enable and so configured SDHC
+ *
+ * Input Parameters:
+ *   None
+ *
+ *  Returned Value:
+ *    None
+ *
+ ************************************************************************************/
+
+void k64_automount_initialize(void)
+{
+  FAR void *handle;
+
+  finfo("Initializing automounter(s)\n");
+
+  /* Initialize the SDHC0 auto-mounter */
+
+  handle = automount_initialize(&g_sdhc_config.lower);
+  if (!handle)
+    {
+      ferr("ERROR: Failed to initialize auto-mounter for SDHC0\n");
+    }
+}
+
+/************************************************************************************
+ * Name:  k64_automount_event
+ *
+ * Description:
+ *   The SDHC card detection logic has detected an insertion or removal event.  It
+ *   has already scheduled the MMC/SD block driver operations.  Now we need to
+ *   schedule the auto-mount event which will occur with a substantial delay to make
+ *   sure that everything has settle down.
+ *
+ * Input Parameters:
+ *   slotno - Identifies the SDHC0 slot: SDHC0_SLOTNO or SDHC1_SLOTNO.  There is a
+ *      terminology problem here:  Each SDHC supports two slots, slot A and slot B.
+ *      Only slot A is used.  So this is not a really a slot, but an HSCMI peripheral
+ *      number.
+ *   inserted - True if the card is inserted in the slot.  False otherwise.
+ *
+ *  Returned Value:
+ *    None
+ *
+ *  Assumptions:
+ *    Interrupts are disabled.
+ *
+ ************************************************************************************/
+
+void k64_automount_event(bool inserted)
+{
+  FAR const struct k64_automount_config_s *config = &g_sdhc_config;
+  FAR struct k64_automount_state_s *state = &g_sdhc_state;
+
+  /* Is the auto-mounter interrupt attached? */
+
+  if (state->handler)
+    {
+      /* Yes.. Have we been asked to hold off interrupts? */
+
+      if (!state->enable)
+        {
+          /* Yes.. just remember the there is a pending interrupt. We will
+           * deliver the interrupt when interrupts are "re-enabled."
+           */
+
+          state->pending = true;
+        }
+      else
+        {
+          /* No.. forward the event to the handler */
+
+          (void)state->handler(&config->lower, state->arg, inserted);
+        }
+    }
+}
+
+#endif /* HAVE_AUTOMOUNTER */
diff --git a/configs/freedom-k64f/src/k64_boot.c b/configs/freedom-k64f/src/k64_boot.c
new file mode 100644
index 0000000000000000000000000000000000000000..4ca687d96fed09ad8db7985dd41e2e5b9290754c
--- /dev/null
+++ b/configs/freedom-k64f/src/k64_boot.c
@@ -0,0 +1,117 @@
+/************************************************************************************
+ * configs/freedom-k64f/src/k64_boot.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+
+#include "up_arch.h"
+#include "freedom-k64f.h"
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: kinetis_boardinitialize
+ *
+ * Description:
+ *   All Kinetis architectures must provide the following entry point.  This entry
+ *   point is called early in the initialization -- after all memory has been
+ *   configured and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void kinetis_boardinitialize(void)
+{
+#if defined(CONFIG_KINETIS_SPI1) || defined(CONFIG_KINETIS_SPI2)
+  /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
+   * k64_spidev_initialize() has been brought into the link.
+   */
+
+  if (k64_spidev_initialize)
+    {
+      k64_spidev_initialize();
+    }
+#endif
+
+#if defined(CONFIG_USBDEV) && defined(CONFIG_KINETIS_USB)
+   /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
+    * disabled, and 3) the weak function k64_usbinitialize() has been brought
+    * into the build.
+    */
+
+  if (k64_usbinitialize)
+    {
+      k64_usbinitialize();
+    }
+#endif
+
+#ifdef CONFIG_ARCH_LEDS
+  /* Configure on-board LEDs if LED support has been selected. */
+
+  board_autoled_initialize();
+#endif
+}
+
+/****************************************************************************
+ * Name: board_initialize
+ *
+ * Description:
+ *   If CONFIG_BOARD_INITIALIZE is selected, then an additional
+ *   initialization call will be performed in the boot-up sequence to a
+ *   function called board_initialize().  board_initialize() will be
+ *   called immediately after up_intitialize() is called and just before the
+ *   initial application is started.  This additional initialization phase
+ *   may be used, for example, to initialize board-specific device drivers.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BOARD_INITIALIZE
+void board_initialize(void)
+{
+  /* Perform board initialization */
+
+  (void)k64_bringup();
+}
+#endif /* CONFIG_BOARD_INITIALIZE */
+
diff --git a/configs/freedom-k64f/src/k64_bringup.c b/configs/freedom-k64f/src/k64_bringup.c
new file mode 100644
index 0000000000000000000000000000000000000000..78bba052f4ca4a8e3818fa8f9f20392064c05ed8
--- /dev/null
+++ b/configs/freedom-k64f/src/k64_bringup.c
@@ -0,0 +1,165 @@
+/****************************************************************************
+ * config/freedom-k64f/src/k64_bringup.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifdef HAVE_RTC_DRIVER
+#  include 
+#  include "kinetis_alarm.h"
+#endif
+
+#include "freedom-k64f.h"
+
+#if defined(CONFIG_LIB_BOARDCTL) || defined(CONFIG_BOARD_INITIALIZE)
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: k64_bringup
+ *
+ * Description:
+ *   Bring up board features
+ *
+ ****************************************************************************/
+
+int k64_bringup(void)
+{
+  int ret;
+#ifdef HAVE_RTC_DRIVER
+  FAR struct rtc_lowerhalf_s *lower;
+#endif
+
+#ifdef HAVE_PROC
+  /* Mount the proc filesystem */
+
+  syslog(LOG_INFO, "Mounting procfs to /proc\n");
+
+  ret = mount(NULL, PROCFS_MOUNTPOUNT, "procfs", 0, NULL);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to mount the PROC filesystem: %d (%d)\n",
+             ret, errno);
+      return ret;
+    }
+#endif
+
+#ifdef HAVE_MMCSD
+  /* Initialize the SDHC driver */
+
+  ret = k64_sdhc_initialize();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: k64_sdhc_initialize() failed: %d\n", ret);
+    }
+
+#ifdef CONFIG_FRDMK64F_SDHC_MOUNT
+  else
+    {
+      /* Mount the volume on HSMCI0 */
+
+      ret = mount(CONFIG_FRDMK64F_SDHC_MOUNT_BLKDEV,
+                  CONFIG_FRDMK64F_SDHC_MOUNT_MOUNTPOINT,
+                  CONFIG_FRDMK64F_SDHC_MOUNT_FSTYPE,
+                  0, NULL);
+
+      if (ret < 0)
+        {
+          syslog(LOG_ERR,"ERROR: Failed to mount %s: %d\n",
+                 CONFIG_FRDMK64F_SDHC_MOUNT_MOUNTPOINT, errno);
+        }
+    }
+
+#endif /* CONFIG_FRDMK64F_SDHC_MOUNT */
+#endif /* HAVE_MMCSD */
+
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device. */
+
+  ret = k64_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: k64_pwm_setup() failed: %d\n", ret);
+    }
+#endif
+
+#ifdef HAVE_AUTOMOUNTER
+  /* Initialize the auto-mounter */
+
+  k64_automount_initialize();
+#endif
+
+#ifdef HAVE_RTC_DRIVER
+  /* Instantiate the KINETIS lower-half RTC driver */
+
+  lower = kinetis_rtc_lowerhalf();
+  if (!lower)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to instantiate the RTC lower-half driver\n");
+    }
+  else
+    {
+      /* Bind the lower half driver and register the combined RTC driver
+       * as /dev/rtc0
+       */
+
+      ret = rtc_initialize(0, lower);
+      if (ret < 0)
+        {
+          syslog(LOG_ERR,
+                 "ERROR: Failed to bind/register the RTC driver: %d\n",
+                 ret);
+        }
+    }
+#endif
+
+  UNUSED(ret);
+  return OK;
+}
+
+#endif /* CONFIG_LIB_BOARDCTL CONFIG_BOARD_INITIALIZE */
diff --git a/configs/freedom-k64f/src/k64_buttons.c b/configs/freedom-k64f/src/k64_buttons.c
new file mode 100644
index 0000000000000000000000000000000000000000..0c9f22e8c86bbc65688576951f86ff12147e890a
--- /dev/null
+++ b/configs/freedom-k64f/src/k64_buttons.c
@@ -0,0 +1,173 @@
+/****************************************************************************
+ * configs/freedom-k64f/src/k64_buttons.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "freedom-k64f.h"
+
+#ifdef CONFIG_ARCH_BUTTONS
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Two push buttons, SW2 and SW3, are available on FRDM-K64F board, where SW2 is
+ * connected to PTC6 and SW3 is connected to PTA4. Besides the general purpose
+ * input/output functions, SW2 and SW3 can be low-power wake up signal. Also, only
+ * SW3 can be a non-maskable interrupt.
+ *
+ *   Switch    GPIO Function
+ *   --------- ---------------------------------------------------------------
+ *   SW2       PTC6/SPI0_SOUT/PD0_EXTRG/I2S0_RX_BCLK/FB_AD9/I2S0_MCLK/LLWU_P10
+ *   SW3       PTA4/FTM0_CH1/NMI_b/LLWU_P3
+ */
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_button_initialize
+ *
+ * Description:
+ *   board_button_initialize() must be called to initialize button resources.
+ *   After that, board_buttons() may be called to collect the current state
+ *   of all buttons or board_button_irq() may be called to register button
+ *   interrupt handlers.
+ *
+ ****************************************************************************/
+
+void board_button_initialize(void)
+{
+   /* Configure the two buttons as inputs */
+
+   kinetis_pinconfig(GPIO_SW2);
+   kinetis_pinconfig(GPIO_SW3);
+}
+
+/****************************************************************************
+ * Name: board_buttons
+ ****************************************************************************/
+
+uint8_t board_buttons(void)
+{
+  uint8_t ret = 0;
+
+  if (kinetis_gpioread(GPIO_SW2))
+    {
+      ret |= BUTTON_SW2_BIT;
+    }
+
+  if (kinetis_gpioread(GPIO_SW3))
+    {
+      ret |= BUTTON_SW3_BIT;
+    }
+
+  return ret
+}
+
+/****************************************************************************
+ * Button support.
+ *
+ * Description:
+ *   board_button_initialize() must be called to initialize button
+ *   resources.  After that, board_buttons() may be called to collect the
+ *   current state of all buttons or board_button_irq() may be called to
+ *   register button interrupt handlers.
+ *
+ *   After board_button_initialize() has been called, board_buttons() may
+ *   be called to collect the state of all buttons.  board_buttons() returns
+ *   an 8-bit bit set with each bit associated with a button.  See the
+ *   BUTTON_*_BIT and JOYSTICK_*_BIT definitions in board.h for the meaning
+ *   of each bit.
+ *
+ *   board_button_irq() may be called to register an interrupt handler that
+ *   will be called when a button is depressed or released.  The ID value is
+ *   a button enumeration value that uniquely identifies a button resource.
+ *   See the BUTTON_* and JOYSTICK_* definitions in board.h for the meaning
+ *   of enumeration value.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_IRQBUTTONS
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
+{
+  uint32_t pinset;
+  int ret;
+
+  /* Map the button id to the GPIO bit set. */
+
+  if (id == BUTTON_SW2)
+    {
+      pinset = GPIO_SW2;
+    }
+  else if (id == BUTTON_SW3)
+    {
+      pinset = GPIO_SW3;
+    }
+  else
+    {
+      return -EINVAL;
+    }
+
+  /* The button has already been configured as an interrupting input (by
+   * board_button_initialize() above).
+   *
+   * Attach the new button handler.
+   */
+
+  ret = kinetis_pinirqattach(pinset, irqhandler);
+  if (ret >= 0)
+    {
+      /* Then make sure that interrupts are enabled on the pin */
+
+      kinetis_pindmaenable(pinset);
+    }
+
+  return ret;
+}
+#endif
+#endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/freedom-k64f/src/k64_pwm.c b/configs/freedom-k64f/src/k64_pwm.c
new file mode 100644
index 0000000000000000000000000000000000000000..547c19fb17ccbdc7e6bac85ace48fca5aa4d041d
--- /dev/null
+++ b/configs/freedom-k64f/src/k64_pwm.c
@@ -0,0 +1,106 @@
+/************************************************************************************
+ * configs/freedom-k64f/src/k64_pwm.c
+ *
+ *   Copyright (C) 2013, 2015, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Jordan MacIntyre 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include "chip.h"
+#include "up_arch.h"
+#include "kinetis_pwm.h"
+
+#ifdef CONFIG_PWM
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: k64_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+int k64_pwm_setup(void)
+{
+  FAR struct pwm_lowerhalf_s *pwm;
+  static bool initialized = false;
+  int ret;
+
+  /* Have we already initialized? */
+
+  if (!initialized)
+    {
+      /* Call k64_pwminitialize() to get an instance of the PWM interface */
+
+      pwm = kinetis_pwminitialize(0);
+      if (!pwm)
+        {
+          aerr("ERROR: Failed to get the K64 PWM lower half\n");
+          return -ENODEV;
+        }
+
+      /* Register the PWM driver at "/dev/pwm0" */
+
+      ret = pwm_register("/dev/pwm0", pwm);
+      if (ret < 0)
+        {
+          aerr("ERROR: pwm_register failed: %d\n", ret);
+          return ret;
+        }
+
+      /* Now we are initialized */
+
+      initialized = true;
+    }
+
+  return OK;
+}
+
+#endif /* CONFIG_PWM */
diff --git a/configs/freedom-k64f/src/k64_sdhc.c b/configs/freedom-k64f/src/k64_sdhc.c
new file mode 100644
index 0000000000000000000000000000000000000000..9efec40ce9d7fb2fea8731cfedc70eef9e90ea73
--- /dev/null
+++ b/configs/freedom-k64f/src/k64_sdhc.c
@@ -0,0 +1,251 @@
+/****************************************************************************
+ * config/freedom-k64f/src/k64_sdhc.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* A micro Secure Digital (SD) card slot is available on the FRDM-K64F connected to
+ * the SD Host Controller (SDHC) signals of the MCU. This slot will accept micro
+ * format SD memory cards. The SD card detect pin (PTE6) is an open switch that
+ * shorts with VDD when card is inserted.
+ *
+ *   ------------ ------------- --------
+ *    SD Card Slot Board Signal  K64F Pin
+ *    ------------ ------------- --------
+ *    DAT0         SDHC0_D0      PTE0
+ *    DAT1         SDHC0_D1      PTE1
+ *    DAT2         SDHC0_D2      PTE5
+ *    CD/DAT3      SDHC0_D3      PTE4
+ *    CMD          SDHC0_CMD     PTE3
+ *    CLK          SDHC0_DCLK    PTE2
+ *    SWITCH       D_CARD_DETECT PTE6
+ *    ------------ ------------- --------
+ *
+ * There is no Write Protect pin available to the K64F.
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "kinetis.h"
+
+#include "freedom-k64f.h"
+
+#ifdef HAVE_MMCSD
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+/* This structure holds static information unique to one SDHC peripheral */
+
+struct k64_sdhc_state_s
+{
+  struct sdio_dev_s *sdhc;    /* R/W device handle */
+  bool inserted;              /* TRUE: card is inserted */
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* HSCMI device state */
+
+static struct k64_sdhc_state_s g_sdhc;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: k64_mediachange
+ ****************************************************************************/
+
+static void k64_mediachange(void)
+{
+  bool inserted;
+
+  /* Get the current value of the card detect pin.  This pin is pulled up on
+   * board.  So low means that a card is present.
+   */
+
+  inserted = !kinetis_gpioread(GPIO_SD_CARDDETECT);
+  mcinfo("inserted: %s\n", inserted ? "Yes" : "No");
+
+  /* Has the pin changed state? */
+
+  if (inserted != g_sdhc.inserted)
+    {
+      mcinfo("Media change: %d->%d\n",  g_sdhc.inserted, inserted);
+
+      /* Yes.. perform the appropriate action (this might need some debounce). */
+
+      g_sdhc.inserted = inserted;
+      sdhc_mediachange(g_sdhc.sdhc, inserted);
+
+#ifdef CONFIG_FRDMK64F_SDHC_AUTOMOUNT
+      /* Let the automounter know about the insertion event */
+
+      k64_automount_event(k64_cardinserted());
+#endif
+    }
+}
+
+/****************************************************************************
+ * Name: k64_cdinterrupt
+ ****************************************************************************/
+
+static int k64_cdinterrupt(int irq, FAR void *context, FAR void *arg)
+{
+  /* All of the work is done by k64_mediachange() */
+
+  k64_mediachange();
+  return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: k64_sdhc_initialize
+ *
+ * Description:
+ *   Inititialize the SDHC SD card slot
+ *
+ ****************************************************************************/
+
+int k64_sdhc_initialize(void)
+{
+  int ret;
+
+  /* Configure GPIO pins */
+
+  kinetis_pinconfig(GPIO_SD_CARDDETECT);
+
+  /* Attached the card detect interrupt (but don't enable it yet) */
+
+  (void)kinetis_pinirqattach(GPIO_SD_CARDDETECT, k64_cdinterrupt, NULL);
+
+  /* Configure the write protect GPIO -- None */
+
+  /* Mount the SDHC-based MMC/SD block driver */
+  /* First, get an instance of the SDHC interface */
+
+  mcinfo("Initializing SDHC slot %d\n", MMCSD_SLOTNO);
+
+  g_sdhc.sdhc = sdhc_initialize(MMCSD_SLOTNO);
+  if (!g_sdhc.sdhc)
+    {
+      mcerr("ERROR: Failed to initialize SDHC slot %d\n", MMCSD_SLOTNO);
+      return -ENODEV;
+    }
+
+  /* Now bind the SDHC interface to the MMC/SD driver */
+
+  mcinfo("Bind SDHC to the MMC/SD driver, minor=%d\n", MMSCD_MINOR);
+
+  ret = mmcsd_slotinitialize(MMSCD_MINOR, g_sdhc.sdhc);
+  if (ret != OK)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to bind SDHC to the MMC/SD driver: %d\n", ret);
+      return ret;
+    }
+
+  syslog(LOG_INFO, "Successfully bound SDHC to the MMC/SD driver\n");
+
+  /* Handle the initial card state */
+
+  k64_mediachange();
+
+  /* Enable CD interrupts to handle subsequent media changes */
+
+  kinetis_pinirqenable(GPIO_SD_CARDDETECT);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: k64_cardinserted
+ *
+ * Description:
+ *   Check if a card is inserted into the SDHC slot
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_AUTOMOUNTER
+bool k64_cardinserted(void)
+{
+  bool inserted;
+
+  /* Get the current value of the card detect pin.  This pin is pulled up on
+   * board.  So low means that a card is present.
+   */
+
+  inserted = !kinetis_gpioread(GPIO_SD_CARDDETECT);
+  mcinfo("inserted: %s\n", inserted ? "Yes" : "No");
+  return inserted;
+}
+#endif
+
+/****************************************************************************
+ * Name: k64_writeprotected
+ *
+ * Description:
+ *   Check if a card is inserted into the SDHC slot
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_AUTOMOUNTER
+bool k64_writeprotected(void)
+{
+  /* There are no write protect pins */
+
+  return false;
+}
+#endif
+
+#endif /* HAVE_MMCSD */
diff --git a/configs/freedom-k64f/src/k64_spi.c b/configs/freedom-k64f/src/k64_spi.c
new file mode 100644
index 0000000000000000000000000000000000000000..cae8680979933ca62ade965df87372baf1c202bb
--- /dev/null
+++ b/configs/freedom-k64f/src/k64_spi.c
@@ -0,0 +1,144 @@
+/************************************************************************************
+ * configs/freedom-k64f/src/k64_spi.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "up_arch.h"
+#include "chip.h"
+#include "kinetis.h"
+#include "freedom-k64f.h"
+
+#if defined(CONFIG_KINETIS_SPI0) || defined(CONFIG_KINETIS_SPI1) || \
+	defined(CONFIG_KINETIS_SPI2)
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: k64_spidev_initialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins for the FREEDOM-K64F board.
+ *
+ ************************************************************************************/
+
+void weak_function k64_spidev_initialize(void)
+{
+# warning "Missing logic"
+}
+
+/************************************************************************************
+ * Name:  kinetis_spi[n]select, kinetis_spi[n]status, and kinetis_spi[n]cmddata
+ *
+ * Description:
+ *   These external functions must be provided by board-specific logic.  They are
+ *   implementations of the select, status, and cmddata methods of the SPI interface
+ *   defined by struct spi_ops_s (see include/nuttx/spi/spi.h). All other methods
+ *   including kinetis_spibus_initialize()) are provided by common Kinetis logic.
+ *   To use this common SPI logic on your board:
+ *
+ *   1. Provide logic in kinetis_boardinitialize() to configure SPI chip select
+ *      pins.
+ *   2. Provide kinetis_spi[n]select() and kinetis_spi[n]status() functions
+ *      in your board-specific logic.  These functions will perform chip selection
+ *      and status operations using GPIOs in the way your board is configured.
+ *   2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide
+ *      kinetis_spi[n]cmddata() functions in your board-specific logic.  These
+ *      functions will perform cmd/data selection operations using GPIOs in the way
+ *      your board is configured.
+ *   3. Add a call to kinetis_spibus_initialize() in your low level application
+ *      initialization logic
+ *   4. The handle returned by kinetis_spibus_initialize() may then be used to bind the
+ *      SPI driver to higher level logic (e.g., calling
+ *      mmcsd_spislotinitialize(), for example, will bind the SPI driver to
+ *      the SPI MMC/SD driver).
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_KINETIS_SPI0
+void kinetis_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+# warning "Missing logic"
+}
+
+uint8_t kinetis_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+# warning "Missing logic"
+  return SPI_STATUS_PRESENT;
+}
+#endif
+
+#ifdef CONFIG_KINETIS_SPI1
+void kinetis_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+# warning "Missing logic"
+}
+
+uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+# warning "Missing logic"
+  return SPI_STATUS_PRESENT;
+}
+#endif
+
+#ifdef CONFIG_KINETIS_SPI2
+void kinetis_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+# warning "Missing logic"
+}
+
+uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+# warning "Missing logic"
+  return SPI_STATUS_PRESENT;
+}
+#endif
+
+#endif /* CONFIG_KINETIS_SPI0 || CONFIG_KINETIS_SPI1 || CONFIG_KINETIS_SPI2 */
diff --git a/configs/freedom-k64f/src/k64_uid.c b/configs/freedom-k64f/src/k64_uid.c
new file mode 100644
index 0000000000000000000000000000000000000000..0fc1527637cc6e76eac0941a16feef38b9ac559a
--- /dev/null
+++ b/configs/freedom-k64f/src/k64_uid.c
@@ -0,0 +1,77 @@
+/****************************************************************************
+ * configs/freedom-k64/src/kinetis_uid.c
+ *
+ *   Copyright (C) 2016 Neil Hancock. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include "kinetis_uid.h"
+
+#include 
+
+#if defined(CONFIG_BOARDCTL_UNIQUEID)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef OK
+#  define OK 0
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_uniqueid
+ ****************************************************************************/
+
+int board_uniqueid(FAR uint8_t *uniqueid)
+{
+  if (uniqueid == 0)
+    {
+      return -EINVAL;
+    }
+
+  kinetis_get_uniqueid(uniqueid);
+  return OK;
+}
+
+#endif /* CONFIG_BOARDCTL_UNIQUEID */
diff --git a/configs/freedom-k64f/src/k64_usbdev.c b/configs/freedom-k64f/src/k64_usbdev.c
new file mode 100644
index 0000000000000000000000000000000000000000..379f0e2cc193b0ee70988506113e17da88860281
--- /dev/null
+++ b/configs/freedom-k64f/src/k64_usbdev.c
@@ -0,0 +1,105 @@
+/************************************************************************************
+ * configs/freedom-k64f/src/k64_usbdev.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "up_arch.h"
+#include "kinetis.h"
+#include "freedom-k64f.h"
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: k64_usbinitialize
+ *
+ * Description:
+ *   Called to setup USB-related GPIO pins for the FREEDOM-K64F board.
+ *
+ ************************************************************************************/
+
+void k64_usbinitialize(void)
+{
+# warning "Missing logic"
+}
+
+/************************************************************************************
+ * Name:  kinetis_usbpullup
+ *
+ * Description:
+ *   If USB is supported and the board supports a pullup via GPIO (for USB software
+ *   connect and disconnect), then the board software must provide kinetis_usbpullup.
+ *   See include/nuttx/usb/usbdev.h for additional description of this method.
+ *   Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be
+ *   NULL.
+ *
+ ************************************************************************************/
+
+int kinetis_usbpullup(FAR struct usbdev_s *dev, bool enable)
+{
+  usbtrace(TRACE_DEVPULLUP, (uint16_t)enable);
+# warning "Missing logic"
+  return OK;
+}
+
+/************************************************************************************
+ * Name:  kinetis_usbsuspend
+ *
+ * Description:
+ *   Board logic must provide the kinetis_usbsuspend logic if the USBDEV driver is
+ *   used.  This function is called whenever the USB enters or leaves suspend mode.
+ *   This is an opportunity for the board logic to shutdown clocks, power, etc.
+ *   while the USB is suspended.
+ *
+ ************************************************************************************/
+
+void kinetis_usbsuspend(FAR struct usbdev_s *dev, bool resume)
+{
+  uinfo("resume: %d\n", resume);
+#warning "Missing logic"
+}
diff --git a/configs/freedom-k64f/src/k64_usbmsc.c b/configs/freedom-k64f/src/k64_usbmsc.c
new file mode 100644
index 0000000000000000000000000000000000000000..0c5ff493c0a8306d99e53e7e1cca56b1a56e7b23
--- /dev/null
+++ b/configs/freedom-k64f/src/k64_usbmsc.c
@@ -0,0 +1,99 @@
+/****************************************************************************
+ * configs/freedom-k64f/src/k64_usbmsc.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Configure and register the Kinetis MMC/SD block driver.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "kinetis.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1
+#  define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0
+#endif
+
+/* SLOT number(s) could depend on the board configuration */
+
+#ifdef CONFIG_ARCH_BOARD_FREEDOM_K64F
+#  undef K64_MMCSDSLOTNO
+#  define K64_MMCSDSLOTNO 0
+#else
+   /* Add configuration for new Kinetis boards here */
+#  error "Unrecognized Kinetis board"
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_usbmsc_initialize
+ *
+ * Description:
+ *   Perform architecture specific initialization as needed to establish
+ *   the mass storage device that will be exported by the USB MSC device.
+ *
+ ****************************************************************************/
+
+int board_usbmsc_initialize(int port)
+{
+  /* If system/usbmsc is built as an NSH command, then SD slot should
+   * already have been initialized in board_app_initialize() (see k64_appinit.c).
+   * In this case, there is nothing further to be done here.
+   */
+
+#ifndef CONFIG_NSH_BUILTIN_APPS
+#  warning "Missing logic"
+#endif /* CONFIG_NSH_BUILTIN_APPS */
+
+   return OK;
+}
diff --git a/configs/freedom-k64f/src/k64_userleds.c b/configs/freedom-k64f/src/k64_userleds.c
new file mode 100644
index 0000000000000000000000000000000000000000..8b334823a52e8019213d0d6b2068b657ceb807bd
--- /dev/null
+++ b/configs/freedom-k64f/src/k64_userleds.c
@@ -0,0 +1,111 @@
+/****************************************************************************
+ * configs/freedom-k64f/src/k64_userleds.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "chip.h"
+#include "kinetis.h"
+#include "freedom-k64f.h"
+
+#ifndef CONFIG_ARCH_LEDS
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_userled_initialize
+ ****************************************************************************/
+
+void board_userled_initialize(void)
+{
+  kinetis_pinconfig(GPIO_LED_R);
+  kinetis_pinconfig(GPIO_LED_G);
+  kinetis_pinconfig(GPIO_LED_B);
+}
+
+/****************************************************************************
+ * Name: board_userled
+ ****************************************************************************/
+
+void board_userled(int led, bool ledon)
+{
+  uint32_t ledcfg;
+
+  if (led == BOARD_LED_R)
+    {
+      ledcfg = GPIO_LED_R;
+    }
+  else if (led == BOARD_LED_G)
+    {
+      ledcfg = GPIO_LED_G;
+    }
+  else if (led == BOARD_LED_B)
+    {
+      ledcfg = GPIO_LED_B;
+    }
+  else
+    {
+      return;
+    }
+
+  kinetis_gpiowrite(ledcfg, !ledon); /* Low illuminates */
+}
+
+/****************************************************************************
+ * Name: board_userled_all
+ ****************************************************************************/
+
+void board_userled_all(uint8_t ledset)
+{
+  /* Low illuminates */
+
+  kinetis_gpiowrite(GPIO_LED_R, (ledset & BOARD_LED_R_BIT) == 0);
+  kinetis_gpiowrite(GPIO_LED_G, (ledset & BOARD_LED_G_BIT) == 0);
+  kinetis_gpiowrite(GPIO_LED_B, (ledset & BOARD_LED_B_BIT) == 0);
+}
+
+#endif /* CONFIG_ARCH_LEDS */
diff --git a/configs/freedom-k66f/Kconfig b/configs/freedom-k66f/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..fa008bc662e9509f12aec4e8b3bdc263ee1879ec
--- /dev/null
+++ b/configs/freedom-k66f/Kconfig
@@ -0,0 +1,36 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_BOARD_FREEDOM_K66F
+
+config FRDMK66F_SDHC_AUTOMOUNT
+	bool "SDHC automounter"
+	default n
+	depends on FS_AUTOMOUNTER && KINETIS_SDHC
+
+if FRDMK66F_SDHC_AUTOMOUNT
+
+config FRDMK66F_SDHC_AUTOMOUNT_FSTYPE
+	string "SDHC file system type"
+	default "vfat"
+
+config FRDMK66F_SDHC_AUTOMOUNT_BLKDEV
+	string "SDHC block device"
+	default "/dev/mmcsd0"
+
+config FRDMK66F_SDHC_AUTOMOUNT_MOUNTPOINT
+	string "SDHC mount point"
+	default "/mnt/sdcard"
+
+config FRDMK66F_SDHC_AUTOMOUNT_DDELAY
+	int "SDHC debounce delay (milliseconds)"
+	default 1000
+
+config FRDMK66F_SDHC_AUTOMOUNT_UDELAY
+	int "SDHC unmount retry delay (milliseconds)"
+	default 2000
+
+endif # FRDMK66F_SDHC_AUTOMOUNT
+endif # ARCH_BOARD_FREEDOM_K66F
diff --git a/configs/freedom-k66f/README.txt b/configs/freedom-k66f/README.txt
new file mode 100644
index 0000000000000000000000000000000000000000..1dde7d71a6e4055918e30babb8132ac281a1ecbb
--- /dev/null
+++ b/configs/freedom-k66f/README.txt
@@ -0,0 +1,977 @@
+README.txt
+==========
+
+This is the README file for the port of NuttX to the Freescale Freedom-K66F
+develoment board.
+
+Contents
+========
+
+  o Freedom K66F Features
+  o Serial Console
+  o LEDs and Buttons
+  o Networking Support
+  o SD Card Support
+  o USB Device Controller Support
+  o Development Environment
+  o GNU Toolchain Options
+  o Freedom K66F Configuration Options
+  o Configurations
+  o Status
+
+Kinetis Freedom K66F Features:
+=============================
+
+  The features of the FRDM-K66F hardware are as follows:
+
+  - MK66FN2M0VMD18 MCU (180 MHz, 2MB Flash, 256KB RAM, 144MBGA package)
+  - Dual role USB interface with micro-B USB connector
+  - RGB LED
+  - FXOS8700CQ - accelerometer and magnetometer
+  - FXAS21002 - Gyroscope
+  - Two user push buttons
+  - Flexible power supply options – OpenSDAv2.1 USB, K66F USB, and external
+    sources
+  - Easy access to MCU input/output through Arduino R3TM compatible I/O
+    connectors
+  - Programmable OpenSDAv2.1 debug interface with multiple applications
+    available
+    including:
+    o SWD debug interface over a USB HID connection providing run-control
+      debugging and compatibility with IDE tools
+    o Virtual serial port interface
+  - Ethernet
+  - Micro SD
+  - Audio features
+    o Digital MEMS microphone
+    o Auxiliary input jack
+    o Headset/Analog microphone jack
+    o Two optional input for analogue microphone
+  - Optional header for add-on RF module: RF24L01+ Nordic 2.4 GHz Radio
+  - Optional header for add-on Bluetooth module: JY-MCU BT Board V1.05 BT
+
+OpenSDAv2.1
+=========
+
+  The FRDM-K66F platform features OpenSDAv2.1, the NXP open-source hardware
+  embedded serial and debug adapter running an open-source bootloader.
+  This circuit offers several options for serial communication, flash
+  programming and run-control debugging. The openSDAv2.1 is loaded with
+  JLink firmware for rapid prototyping and product development, with a focus
+  on connected Internet of Things devices.
+
+  To use set raw binary output for nuttx.bin
+
+Serial Console
+==============
+
+  USB VCOM Console
+  ----------------
+  The primary serial port interface signals are PTB16 UART0_RX and PTB17
+  UART0_TX. These signals are connected to the OpenSDAv2.1 VCOM circuit.
+
+  Serial Shield Console
+  ---------------------
+  An alternative serial port might use a standard serial shield mounted
+  on the Freedom Board.  In this case, Arduino pin D1 provides UART TX and
+  pin D0 privides UART RX.
+
+  The I/O headers on the FRDM-K66F board are arranged to enable
+  compatibility with Arduino shield. The outer rows of pins (even numbered
+  pins) on the headers, share the same mechanical spacing and placement with
+  the I/O headers on the Arduino Revision 3 (R3) standard.
+
+  The Arduino D0 and D1 pins then correspond to pins 2 and 4 on the J1 I/O
+  connector:
+
+    Arduino Pin              FRDM-K66F J1 Connector
+    ------------------------ -----------------------
+    UART RX, Arduino D0 pin  Pin 2, PTC3, UART1_RX
+    UART TX, Arduino D1 pin  Pin 4, PTC4, UART1_TX
+
+  Default Serial Console
+  ----------------------
+  By default, these configuration are setup to use the Serial Console on
+  UART1.  That, however, is easily reconfigured.
+
+LEDs and Buttons
+================
+
+  RGB LED
+  -------
+  An RGB LED is connected through GPIO as shown below:
+
+    LED    K66
+    ------ -------------------------------------------------------
+    RED    PTC9/ADC1_SE5B/CMP0_IN3/FTM3_CH5/I2S0_RX_BCLK/FB_AD6/SDRAM_A14/FTM_FLT0
+    GREEN  PTE6/LLWU_P16/SPI1_PCS3/UART3_CTS/I2S0_MCLK/FTM3_CH1/USB0_SOF_OUT
+    BLUE   PTA11/LLWU_P23/FTM2_CH1/MII0_RXCLK/I2C2_SDA/FTM2_QD_PHB/TPM2_CH1
+
+  If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board the
+  Freedom K66.  Usage of these LEDs is defined in include/board.h and
+  src/K66_leds.c.  The following definitions describe how NuttX controls the LEDs:
+
+    SYMBOL                Meaning                 LED state
+                                                  RED   GREEN  BLUE
+    -------------------  -----------------------  -----------------
+    LED_STARTED          NuttX has been started    OFF  OFF  OFF
+    LED_HEAPALLOCATE     Heap has been allocated   OFF  OFF  ON
+    LED_IRQSENABLED      Interrupts enabled        OFF  OFF  ON
+    LED_STACKCREATED     Idle stack created        OFF  ON   OFF
+    LED_INIRQ            In an interrupt          (no change)
+    LED_SIGNAL           In a signal handler      (no change)
+    LED_ASSERTION        An assertion failed      (no change)
+    LED_PANIC            The system has crashed    FLASH OFF OFF
+    LED_IDLE             K66 is in sleep mode     (Optional, not used)
+
+  Buttons
+  -------
+  Two push button switches, SW2 and SW3, are available on the FRDM-K66F
+  board. SW2 is connected to PTD11 and SW3 is connected to PTA10.
+  Beside the general purpose IO function, both SW2 and SW3 can be used
+  as a low-leakage wakeup (LLWU) source.
+
+  Switch    GPIO Function
+  --------- ---------------------------------------------------------------
+  SW2       PTD11/LLWU_P25/SPI2_PCS0/SDHC0_CLKIN/LPUART0_CTS/FB_A19
+  SW3       PTA10/LLWU_P22/FTM2_CH0/MII0_RXD2/FTM2_QD_PHA/TPM2_CH0/TRACE_D0
+
+Networking Support
+==================
+
+  Ethernet MAC/KSZ8081 PHY
+  ------------------------
+  ------------ ----------------- --------------------------------------------
+  KSZ8081      Board Signal(s)   K66F Pin
+  Pin Signal                     Function                       pinmux Name
+  --- -------- ----------------- --------------------------------------------
+   1  VDD_1V2  VDDPLL_1.2V       ---                            ---
+   2  VDDA_3V3 VDDA_ENET         ---                            ---
+   3  RXM      ENET1_RX-         ---                            ---
+   4  RXP      ENET1_RX+         ---                            ---
+   5  TXM      ENET1_TX-         ---                            ---
+   6  TXP      ENET1_TX+         ---                            ---
+   7  X0       RMII_XTAL0        ---                            ---
+   8  XI       RMII_XTAL1        ---                            ---
+   9  REXT     ---               ---, Apparently not connected  ---
+  10  MDIO     RMII0_MDIO        PTB0/RMII0_MDIO                PIN_RMII0_MDIO
+  11  MDC      RMII0_MDC         PTB1/RMII0_MDC                 PIN_RMII0_MDC
+  12  RXD1     RMII0_RXD_1       PTA12/RMII0_RXD1               PIN_RMII0_RXD1
+  13  RXD0     RMII0_RXD_0       PTA13/RMII0_RXD0               PIN_RMII0_RXD0
+  14  VDDIO    VDDIO_ENET        ---                            ---
+  15  CRS_DIV                    PTA14/RMII0_CRS_DV             PIN_RMII0_CRS_DV
+  16  REF_CLK  PTE26             PTE26(Ethernet clock)          PTE26/ENET_1588_CLKIN
+  17  RXER     RMII0_RXER        PTA5/RMII0_RXER                PIN_RMII0_RXER
+  18  INTRP    RMII0_INT_B,      J14 Pin 2, Apparently not      ---
+               PHY_INT_1         available unless jumpered
+  19  TXEN     RMII0_TXEN        PTA15/RMII0_TXEN               PIN_RMII0_TXEN
+  20  TXD0     RMII0_TXD_0       PTA16/RMII0_TXD0               PIN_RMII0_TXD0
+  21  TXD1     RMII0_TXD_1       PTA17/RMII0_TXD1               PIN_RMII0_TXD1
+  22  GND1     ---               ---                            ---
+  24  nRST     PHY_RST_B         ---                            ---
+  25  GND2     ---               ---                            ---
+  --- -------- ----------------- --------------------------------------------
+
+  There is no external pull up on MDIO signal when MK66FN2M0VMD18 is
+  requesting status of the Ethernet link connection. Internal pull is
+  required when enabled in port configuration for MDIO signal.
+
+    CONFIG_KINETIS_ENET_MDIOPULLUP=y
+
+  Networking support can be added to NSH by selecting the following
+  configuration options.
+
+  Selecting the EMAC peripheral
+  -----------------------------
+
+  System Type -> Kinetis Peripheral Support
+    CONFIG_KINETIS_ENET=y               : Enable the EThernet MAC peripheral
+
+  System Type -> Ethernet Configuration
+    CONFIG_KINETIS_ENETNETHIFS=1
+    CONFIG_KINETIS_ENETNRXBUFFERS=6
+    CONFIG_KINETIS_ENETNTXBUFFERS=2
+    CONFIG_KINETIS_ENET_MDIOPULLUP=y
+
+  Networking Support
+    CONFIG_NET=y                        : Enable Neworking
+    CONFIG_NET_ETHERNET=y               : Support Ethernet data link
+    CONFIG_NET_SOCKOPTS=y               : Enable socket operations
+    CONFIG_NET_ETH_MTU=590              : Maximum packet size (MTU) 1518 is more standard
+    CONFIG_NET_ETH_TCP_RECVWNDO=536     : Should be the same as CONFIG_NET_ETH_MTU
+    CONFIG_NET_ARP=y                    : Enable ARP
+    CONFIG_NET_ARPTAB_SIZE=16           : ARP table size
+    CONFIG_NET_ARP_IPIN=y               : Enable ARP address harvesting
+    CONFIG_NET_ARP_SEND=y               : Send ARP request before sending data
+    CONFIG_NET_TCP=y                    : Enable TCP/IP networking
+    CONFIG_NET_TCP_READAHEAD=y          : Support TCP read-ahead
+    CONFIG_NET_TCP_WRITE_BUFFERS=y      : Support TCP write-buffering
+    CONFIG_NET_TCPBACKLOG=y             : Support TCP/IP backlog
+    CONFIG_NET_MAX_LISTENPORTS=20       :
+    CONFIG_NET_TCP_READAHEAD_BUFSIZE=536  Read-ahead buffer size
+    CONFIG_NET_UDP=y                    : Enable UDP networking
+    CONFIG_NET_BROADCAST=y              : Needed for DNS name resolution
+    CONFIG_NET_ICMP=y                   : Enable ICMP networking
+    CONFIG_NET_ICMP_PING=y              : Needed for NSH ping command
+                                        : Defaults should be okay for other options
+ Application Configuration -> Network Utilities
+    CONFIG_NETDB_DNSCLIENT=y            : Enable host address resolution
+    CONFIG_NETUTILS_TELNETD=y           : Enable the Telnet daemon
+    CONFIG_NETUTILS_TFTPC=y             : Enable TFTP data file transfers for get and put commands
+    CONFIG_NETUTILS_NETLIB=y            : Network library support is needed
+    CONFIG_NETUTILS_WEBCLIENT=y         : Needed for wget support
+                                        : Defaults should be okay for other options
+  Application Configuration -> NSH Library
+    CONFIG_NSH_TELNET=y                 : Enable NSH session via Telnet
+    CONFIG_NSH_IPADDR=0x0a000002        : Select a fixed IP address
+    CONFIG_NSH_DRIPADDR=0x0a000001      : IP address of gateway/host PC
+    CONFIG_NSH_NETMASK=0xffffff00       : Netmask
+    CONFIG_NSH_NOMAC=y                  : Need to make up a bogus MAC address
+                                        : Defaults should be okay for other options
+
+  You can also enable enable the DHCPC client for networks that use
+  dynamically assigned address:
+
+  Application Configuration -> Network Utilities
+    CONFIG_NETUTILS_DHCPC=y             : Enables the DHCP client
+
+  Networking Support
+    CONFIG_NET_UDP=y                    : Depends on broadcast UDP
+
+  Application Configuration -> NSH Library
+    CONFIG_NET_BROADCAST=y
+    CONFIG_NSH_DHCPC=y                  : Tells NSH to use DHCPC, not
+                                        : the fixed addresses
+
+  Using the network with NSH
+  --------------------------
+
+  So what can you do with this networking support?  First you see that
+  NSH has several new network related commands:
+
+    ifconfig, ifdown, ifup:  Commands to help manage your network
+    get and put:             TFTP file transfers
+    wget:                    HTML file transfers
+    ping:                    Check for access to peers on the network
+    Telnet console:          You can access the NSH remotely via telnet.
+
+  You can also enable other add on features like full FTP or a Web
+  Server or XML RPC and others.  There are also other features that
+  you can enable like DHCP client (or server) or network name
+  resolution.
+
+  By default, the IP address of the FRDM-K66F will be 10.0.0.2 and
+  it will assume that your host is the gateway and has the IP address
+  10.0.0.1.
+
+    nsh> ifconfig
+    eth0    HWaddr 00:e0:de:ad:be:ef at UP
+            IPaddr:10.0.0.2 DRaddr:10.0.0.1 Mask:255.255.255.0
+
+  You can use ping to test for connectivity to the host (Careful,
+  Window firewalls usually block ping-related ICMP traffic).  On the
+  target side, you can:
+
+    nsh> ping 10.0.0.1
+    PING 10.0.0.1 56 bytes of data
+    56 bytes from 10.0.0.1: icmp_seq=1 time=0 ms
+    56 bytes from 10.0.0.1: icmp_seq=2 time=0 ms
+    56 bytes from 10.0.0.1: icmp_seq=3 time=0 ms
+    56 bytes from 10.0.0.1: icmp_seq=4 time=0 ms
+    56 bytes from 10.0.0.1: icmp_seq=5 time=0 ms
+    56 bytes from 10.0.0.1: icmp_seq=6 time=0 ms
+    56 bytes from 10.0.0.1: icmp_seq=7 time=0 ms
+    56 bytes from 10.0.0.1: icmp_seq=8 time=0 ms
+    56 bytes from 10.0.0.1: icmp_seq=9 time=0 ms
+    56 bytes from 10.0.0.1: icmp_seq=10 time=0 ms
+    10 packets transmitted, 10 received, 0% packet loss, time 10100 ms
+
+  NOTE: In this configuration is is normal to have packet loss > 0%
+  the first time you ping due to the default handling of the ARP
+  table.
+
+  On the host side, you should also be able to ping the FRDM-K66F:
+
+    $ ping 10.0.0.2
+
+  You can also log into the NSH from the host PC like this:
+
+    $ telnet 10.0.0.2
+    Trying 10.0.0.2...
+    Connected to 10.0.0.2.
+    Escape character is '^]'.
+    sh_telnetmain: Session [3] Started
+
+    NuttShell (NSH) NuttX-7.19
+    nsh> help
+    help usage:  help [-v] []
+
+      [           echo        ifconfig    mkdir       mw          sleep
+      ?           exec        ifdown      mkfatfs     ping        test
+      cat         exit        ifup        mkfifo      ps          umount
+      cp          free        kill        mkrd        put         usleep
+      cmp         get         losetup     mh          rm          wget
+      dd          help        ls          mount       rmdir       xd
+      df          hexdump     mb          mv          sh
+
+    Builtin Apps:
+    nsh>
+
+  NOTE:  If you enable this networking as described above, you will
+  experience a delay on booting NSH.  That is because the start-up logic
+  waits for the network connection to be established before starting
+  NuttX.  In a real application, you would probably want to do the
+  network bringup on a separate thread so that access to the NSH prompt
+  is not delayed.
+
+  This delay will be especially long if the board is not connected to
+  a network.  On the order of minutes!  You will probably think that
+  NuttX has crashed!  And then, when it finally does come up after
+  numerous timeouts and retries, the network will not be available --
+  even if the network cable is plugged in later.
+
+  The long delays can be eliminated by using a separate the network
+  initialization thread discussed below.  Recovering after the network
+  becomes available requires the network monitor feature, also discussed
+  below.
+
+  Network Initialization Thread
+  -----------------------------
+  There is a configuration option enabled by CONFIG_NSH_NETINIT_THREAD
+  that will do the NSH network bring-up asynchronously in parallel on
+  a separate thread.  This eliminates the (visible) networking delay
+  altogether.  This current implementation, however, has some limitations:
+
+    - If no network is connected, the network bring-up will fail and
+      the network initialization thread will simply exit.  There are no
+      retries and no mechanism to know if the network initialization was
+      successful (it could perform a network Ioctl to see if the link is
+      up and it now, keep trying, but it does not do that now).
+
+    - Furthermore, there is currently no support for detecting loss of
+      network connection and recovery of the connection (similarly, this
+      thread could poll periodically for network status, but does not).
+
+  Both of these shortcomings could be eliminated by enabling the network
+  monitor:
+
+  Network Monitor
+  ---------------
+  By default the network initialization thread will bring-up the network
+  then exit, freeing all of the resources that it required.  This is a
+  good behavior for systems with limited memory.
+
+  If the CONFIG_NSH_NETINIT_MONITOR option is selected, however, then the
+  network initialization thread will persist forever; it will monitor the
+  network status.  In the event that the network goes down (for example, if
+  a cable is removed), then the thread will monitor the link status and
+  attempt to bring the network back up.  In this case the resources
+  required for network initialization are never released.
+
+  Pre-requisites:
+
+    - CONFIG_NSH_NETINIT_THREAD as described above.
+
+    - The K66F EMAC block does not support PHY interrupts.  The KSZ8081
+      PHY interrupt line is brought to a jumper block and it should be
+      possible to connect that some some interrupt port pin.  You would
+      need to provide some custom logic in the Freedcom K66F
+      configuration to set up that PHY interrupt.
+
+    - In addtion to the PHY interrupt, the Network Monitor also requires the
+      following setting:
+
+        CONFIG_NETDEV_PHY_IOCTL. Enable PHY IOCTL commands in the Ethernet
+        device driver. Special IOCTL commands must be provided by the Ethernet
+        driver to support certain PHY operations that will be needed for link
+        management. There operations are not complex and are implemented for
+        the Atmel SAMA5 family.
+
+        CONFIG_ARCH_PHY_INTERRUPT. This is not a user selectable option.
+        Rather, it is set when you select a board that supports PHY
+        interrupts.  For the K66F, like most other architectures, the PHY
+        interrupt must be provided via some board-specific GPIO.  In any
+        event, the board-specific logic must provide support for the PHY
+        interrupt. To do this, the board logic must do two things: (1) It
+        must provide the function arch_phy_irq() as described and prototyped
+        in the nuttx/include/nuttx/arch.h, and (2) it must select
+        CONFIG_ARCH_PHY_INTERRUPT in the board configuration file to
+        advertise that it supports arch_phy_irq().
+
+        And a few other things: UDP support is required (CONFIG_NET_UDP) and
+        signals must not be disabled (CONFIG_DISABLE_SIGNALS).
+
+  Given those prerequisites, the network monitor can be selected with these
+  additional settings.
+
+    System Type -> Kinetis Ethernet Configuration
+      CONFIG_ARCH_PHY_INTERRUPT=y           : (auto-selected)
+      CONFIG_NETDEV_PHY_IOCTL=y             : (auto-selected)
+
+    Application Configuration -> NSH Library -> Networking Configuration
+      CONFIG_NSH_NETINIT_THREAD             : Enable the network initialization thread
+      CONFIG_NSH_NETINIT_MONITOR=y          : Enable the network monitor
+      CONFIG_NSH_NETINIT_RETRYMSEC=2000     : Configure the network monitor as you like
+      CONFIG_NSH_NETINIT_SIGNO=18
+
+SD Card Support
+===============
+
+  Card Slot
+  ---------
+  A micro Secure Digital (SD) card slot is available on the FRDM-K66F connected to
+  the SD Host Controller (SDHC) signals of the MCU. This slot will accept micro
+  format SD memory cards. The SD card detect pin (PTD10) is an open switch that
+  shorts with VDD when card is inserted.
+
+    ------------ ------------- --------
+    SD Card Slot Board Signal  K66F Pin
+    ------------ ------------- --------
+    DAT0         SDHC0_D0      PTE1
+    DAT1         SDHC0_D1      PTE0
+    DAT2         SDHC0_D2      PTE5
+    CD/DAT3      SDHC0_D3      PTE4
+    CMD          SDHC0_CMD     PTE3
+    CLK          SDHC0_DCLK    PTE2
+    SWITCH       D_CARD_DETECT PTD10
+    ------------ ------------- --------
+
+  There is no Write Protect pin available to the K66F.
+
+  Configuration Settings
+  ----------------------
+  Enabling SDHC support. The Freedom K66F provides one microSD memory card
+  slot.  Support for the SD slots can be enabled with the following
+  settings:
+
+    System Type->Kinetic Peripheral Selection
+      CONFIG_KINETIS_SDHC=y                 : To enable SDHC0 support
+      CONFIG_KINETIS_SDHC_DMA=y             : Use SDIO DMA
+
+    System Type
+      CONFIG_KINETIS_GPIOIRQ=y              : GPIO interrupts needed
+      CONFIG_KINETIS_PORTEINTS=y            : Card detect pin is on PTE6
+
+    Device Drivers -> MMC/SD Driver Support
+      CONFIG_MMCSD=y                        : Enable MMC/SD support
+      CONFIG_MMSCD_NSLOTS=1                 : One slot per driver instance
+      CONFIG_MMCSD_MULTIBLOCK_DISABLE=y     : (REVISIT)
+      CONFIG_MMCSD_HAVECARDDETECT=y         : Supports card-detect PIOs
+      CONFIG_MMCSD_MMCSUPPORT=n             : Interferes with some SD cards
+      CONFIG_MMCSD_SPI=n                    : No SPI-based MMC/SD support
+      CONFIG_MMCSD_SDIO=y                   : SDIO-based MMC/SD support
+      CONFIG_SDIO_BLOCKSETUP=y              : Needs to know block sizes
+
+    RTOS Features -> Work Queue Support
+      CONFIG_SCHED_WORKQUEUE=y              : Driver needs work queue support
+      CONFIG_SCHED_HPWORK=y
+
+    Application Configuration -> NSH Library
+      CONFIG_NSH_ARCHINIT=y                 : NSH board-initialization, and
+      CONFIG_LIB_BOARDCTL=y                 : Or
+      CONFIG_BOARD_INITIALIZE=y
+
+  Using the SD card
+  -----------------
+
+  1. After booting, the SDHC device will appear as /dev/mmcsd0.
+  2. If you try mounting an SD card with nothing in the slot, the mount will
+     fail:
+
+       nsh> mount -t vfat /dev/mmcsd0 /mnt/sd0
+       nsh: mount: mount failed: 19
+
+     NSH can be configured to provide errors as strings instead of
+     numbers.  But in this case, only the error number is reported.  The
+     error numbers can be found in nuttx/include/errno.h:
+
+       #define ENODEV              19
+       #define ENODEV_STR          "No such device"
+
+     So the mount command is saying that there is no device or, more
+     correctly, that there is no card in the SD card slot.
+
+  3. Insert the SD card.  Then the mount should succeed.
+
+      nsh> mount -t vfat /dev/mmcsd0 /mnt/sd0
+      nsh> ls /mnt/sd1
+      /mnt/sd1:
+       atest.txt
+      nsh> cat /mnt/sd1/atest.txt
+      This is a test
+
+     NOTE:  See the next section entitled "Auto-Mounter" for another way
+     to mount your SD card.
+
+  4. Before removing the card, you must umount the file system.  This is
+     equivalent to "ejecting" or "safely removing" the card on Windows:  It
+     flushes any cached data to an SD card and makes the SD card unavailable
+     to the applications.
+
+       nsh> umount -t /mnt/sd0
+
+     It is now safe to remove the card.  NuttX provides into callbacks
+     that can be used by an application to automatically unmount the
+     volume when it is removed.  But those callbacks are not used in
+     these configurations.
+
+  Auto-Mounter
+  ------------
+  NuttX implements an auto-mounter than can make working with SD cards
+  easier.  With the auto-mounter, the file system will be automatically
+  mounted when the SD card is inserted into the SDHC slot and automatically
+  unmounted when the SD card is removed.
+
+  Here is a sample configuration for the auto-mounter:
+
+    File System Configuration
+      CONFIG_FS_AUTOMOUNTER=y
+
+    Board-Specific Options
+      CONFIG_FRDMK66F_SDHC_AUTOMOUNT=y
+      CONFIG_FRDMK66F_SDHC_AUTOMOUNT_FSTYPE="vfat"
+      CONFIG_FRDMK66F_SDHC_AUTOMOUNT_BLKDEV="/dev/mmcsd0"
+      CONFIG_FRDMK66F_SDHC_AUTOMOUNT_MOUNTPOINT="/mnt/sdcard"
+      CONFIG_FRDMK66F_SDHC_AUTOMOUNT_DDELAY=1000
+      CONFIG_FRDMK66F_SDHC_AUTOMOUNT_UDELAY=2000
+
+  WARNING:  SD cards should never be removed without first unmounting
+  them.  This is to avoid data and possible corruption of the file
+  system.  Certainly this is the case if you are writing to the SD card
+  at the time of the removal.  If you use the SD card for read-only access,
+  however, then I cannot think of any reason why removing the card without
+  mounting would be harmful.
+
+USB Device Controller Support
+==============================
+
+  USB Device Controller Support
+  -----------------------------
+  The USBHS device controller driver is enabled with he following
+  configurationsettings:
+
+    Device Drivers -> USB Device Driver Support
+      CONFIG_USBDEV=y                           : Enable USB device support
+    For full-speed/low-power mode:
+      CONFIG_USBDEV_DUALSPEED=n                 : Disable High speed support
+    For high-speed/normal mode:
+      CONFIG_USBDEV_DUALSPEED=y                 : Enable High speed support
+      CONFIG_USBDEV_DMA=y                       : Enable DMA methods
+      CONFIG_USBDEV_MAXPOWER=100                : Maximum power consumption
+      CONFIG_USBDEV_SELFPOWERED=y               : Self-powered device
+
+    System Type -> Kinetis Peripheral Selection
+      CONFIG_KINETIS_USBOTG=y
+
+  CDC/ACM Device Class
+  --------------------
+  In order to be usable, you must all enabled some class driver(s) for the
+  USBHS device controller.  Here, for example, is how to configure the CDC/ACM
+  serial device class:
+
+    Device Drivers -> USB Device Driver Support
+      CONFIG_CDCACM=y                           : USB Modem (CDC ACM) support
+      CONFIG_CDCACM_EP0MAXPACKET=64             : Enpoint 0 packet size
+      CONFIG_CDCACM_EPINTIN=1                   : Interrupt IN endpoint number
+      CONFIG_CDCACM_EPINTIN_FSSIZE=64           : Full speed packet size
+      CONFIG_CDCACM_EPINTIN_HSSIZE=64           : High speed packet size
+      CONFIG_CDCACM_EPBULKOUT=3                 : Bulk OUT endpoint number
+      CONFIG_CDCACM_EPBULKOUT_FSSIZE=64         : Full speed packet size
+      CONFIG_CDCACM_EPBULKOUT_HSSIZE=512        : High speed packet size
+      CONFIG_CDCACM_EPBULKIN=2                  : Bulk IN endpoint number
+      CONFIG_CDCACM_EPBULKIN_FSSIZE=64          : Full speed packet size
+      CONFIG_CDCACM_EPBULKIN_HSSIZE=512         : High speed packet size
+      CONFIG_CDCACM_NWRREQS=4                   : Number of write requests
+      CONFIG_CDCACM_NRDREQS=8                   : Number of read requests
+      CONFIG_CDCACM_BULKIN_REQLEN=96            : Size of write request buffer (for full speed)
+      CONFIG_CDCACM_BULKIN_REQLEN=768           : Size of write request buffer (for high speed)
+      CONFIG_CDCACM_RXBUFSIZE=257               : Serial read buffer size
+      CONFIG_CDCACM_TXBUFSIZE=193               : Serial transmit buffer size (for full speed)
+      CONFIG_CDCACM_TXBUFSIZE=769               : Serial transmit buffer size (for high speed)
+      CONFIG_CDCACM_VENDORID=0x0525             : Vendor ID
+      CONFIG_CDCACM_PRODUCTID=0xa4a7            : Product ID
+      CONFIG_CDCACM_VENDORSTR="NuttX"           : Vendor string
+      CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" : Product string
+
+    Device Drivers -> Serial Driver Support
+      CONFIG_SERIAL_REMOVABLE=y                 : Support for removable serial device
+
+  The CDC/ACM application provides commands to connect and disconnect the
+  CDC/ACM serial device:
+
+    CONFIG_SYSTEM_CDCACM=y                     : Enable connect/disconnect support
+    CONFIG_SYSTEM_CDCACM_DEVMINOR=0            : Use device /dev/ttyACM0
+    CONFIG_CDCACM_RXBUFSIZE=???                : A large RX may be needed
+
+  If you include this CDC/ACM application, then you can connect the CDC/ACM
+  serial device to the host by entering the command 'sercon' and you detach
+  the serial device with the command 'serdis'.  If you do no use this
+  application, they you will have to write logic in your board initialization
+  code to initialize and attach the USB device.
+
+Development Environment
+=======================
+
+  Either Linux or Cygwin on Windows can be used for the development environment.
+  The source has been built only using the GNU toolchain (see below).  Other
+  toolchains will likely cause problems. Testing was performed using the Cygwin
+  environment.
+
+GNU Toolchain Options
+=====================
+
+  The NuttX make system supports several GNU-based toolchains under Linux,
+  Cygwin under Windows, and Windoes native.  To select a toolchain:
+
+  1. Use 'make menuconfig' and select the toolchain that you are using
+     under the System Type menu.
+  2. The default toolchain is the NuttX buildroot under Linux or Cygwin:
+
+    CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
+
+     If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may
+     also have to modify the PATH in the setenv.h file if your make cannot
+     find the tools.
+
+  NOTE:  Using native Windows toolchains under Cygwin has some limitations.
+  This incuudes the CodeSourcery (for Windows) and devkitARM toolchains are
+  Windows native toolchains.  The biggest limitations are:
+
+  1. The Windows toolchain cannot follow Cygwin paths.  Path conversions are
+     performed automatically in the Cygwin makefiles using the 'cygpath' utility
+     but you might easily find some new path problems.  If so, check out 'cygpath -w'
+
+  2. Windows toolchains cannot follow Cygwin symbolic links.  Many symbolic links
+     are used in Nuttx (e.g., include/arch).  The make system works around these
+     problems for the Windows tools by copying directories instead of linking them.
+     But this can also cause some confusion for you:  For example, you may edit
+     a file in a "linked" directory and find that your changes had no effect.
+     That is because you are building the copy of the file in the "fake" symbolic
+     directory.  If you use a Windows toolchain, you should get in the habit of
+     making like this:
+
+       make clean_context all
+
+     An alias in your .bashrc file might make that less painful.
+
+Freedom K66F Configuration Options
+==================================
+
+    CONFIG_ARCH - Identifies the arch/ subdirectory.  This sould
+       be set to:
+
+       CONFIG_ARCH=arm
+
+    CONFIG_ARCH_family - For use in C code:
+
+       CONFIG_ARCH_ARM=y
+
+    CONFIG_ARCH_architecture - For use in C code:
+
+       CONFIG_ARCH_CORTEXM4=y
+
+    CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
+
+       CONFIG_ARCH_CHIP=kinetis
+
+    CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
+       chip:
+
+       CONFIG_ARCH_CHIP_MK66FN2M0VMD18
+
+    CONFIG_ARCH_BOARD - Identifies the configs subdirectory and
+       hence, the board that supports the particular chip or SoC.
+
+       CONFIG_ARCH_BOARD="freedom-K66F" (for the Freedom K66F development board)
+
+    CONFIG_ARCH_BOARD_name - For use in C code
+
+       CONFIG_ARCH_BOARD_FREEDOM_K66F=y
+
+    CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
+       of delay loops
+
+    CONFIG_ENDIAN_BIG - define if big endian (default is little
+       endian)
+
+    CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
+
+       CONFIG_RAM_SIZE=0x00040000 (256Kb)
+
+    CONFIG_RAM_START - The start address of installed DRAM
+
+       CONFIG_RAM_START=0x1fff0000
+
+    CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
+       have LEDs
+
+    CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
+       stack. If defined, this symbol is the size of the interrupt
+        stack in bytes.  If not defined, the user task stacks will be
+      used during interrupt handling.
+
+    CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
+
+    CONFIG_ARCH_LEDS -  Use LEDs to show state. Unique to board architecture.
+
+    CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that
+       cause a 100 second delay during boot-up.  This 100 second delay
+       serves no purpose other than it allows you to calibratre
+       CONFIG_ARCH_LOOPSPERMSEC.  You simply use a stop watch to measure
+       the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until
+       the delay actually is 100 seconds.
+
+  Individual subsystems can be enabled:
+
+    CONFIG_KINETIS_TRACE    -- Enable trace clocking on power up.
+    CONFIG_KINETIS_FLEXBUS  -- Enable flexbus clocking on power up.
+    CONFIG_KINETIS_UART0    -- Support UART0
+    CONFIG_KINETIS_UART1    -- Support UART1
+    CONFIG_KINETIS_UART2    -- Support UART2
+    CONFIG_KINETIS_UART3    -- Support UART3
+    CONFIG_KINETIS_UART4    -- Support UART4
+    CONFIG_KINETIS_UART5    -- Support UART5
+    CONFIG_KINETIS_ENET     -- Support Ethernet (K5x, K6x, and K7x only)
+    CONFIG_KINETIS_RNGB     -- Support the random number generator(K6x only)
+    CONFIG_KINETIS_FLEXCAN0 -- Support FlexCAN0
+    CONFIG_KINETIS_FLEXCAN1 -- Support FlexCAN1
+    CONFIG_KINETIS_SPI0     -- Support SPI0
+    CONFIG_KINETIS_SPI1     -- Support SPI1
+    CONFIG_KINETIS_SPI2     -- Support SPI2
+    CONFIG_KINETIS_I2C0     -- Support I2C0
+    CONFIG_KINETIS_I2C1     -- Support I2C1
+    CONFIG_KINETIS_I2C2     -- Support I2C2
+    CONFIG_KINETIS_I2C3     -- Support I2C3
+    CONFIG_KINETIS_I2S      -- Support I2S
+    CONFIG_KINETIS_DAC0     -- Support DAC0
+    CONFIG_KINETIS_DAC1     -- Support DAC1
+    CONFIG_KINETIS_ADC0     -- Support ADC0
+    CONFIG_KINETIS_ADC1     -- Support ADC1
+    CONFIG_KINETIS_CMP      -- Support CMP
+    CONFIG_KINETIS_VREF     -- Support VREF
+    CONFIG_KINETIS_SDHC     -- Support SD host controller
+    CONFIG_KINETIS_FTM0     -- Support FlexTimer 0
+    CONFIG_KINETIS_FTM1     -- Support FlexTimer 1
+    CONFIG_KINETIS_FTM2     -- Support FlexTimer 2
+    CONFIG_KINETIS_FTM3     -- Support FlexTimer 3
+    CONFIG_KINETIS_LPTIMER  -- Support the low power timer
+    CONFIG_KINETIS_RTC      -- Support RTC
+    CONFIG_KINETIS_SLCD     -- Support the segment LCD (K3x, K4x, and K5x only)
+    CONFIG_KINETIS_EWM      -- Support the external watchdog
+    CONFIG_KINETIS_CMT      -- Support Carrier Modulator Transmitter
+    CONFIG_KINETIS_USBOTG   -- Support USB OTG (see also CONFIG_USBHOST and CONFIG_USBDEV)
+    CONFIG_KINETIS_USBDCD   -- Support the USB Device Charger Detection module
+    CONFIG_KINETIS_LLWU     -- Support the Low Leakage Wake-Up Unit
+    CONFIG_KINETIS_TSI      -- Support the touch screeen interface
+    CONFIG_KINETIS_FTFL     -- Support FLASH
+    CONFIG_KINETIS_DMA      -- Support DMA
+    CONFIG_KINETIS_CRC      -- Support CRC
+    CONFIG_KINETIS_PDB      -- Support the Programmable Delay Block
+    CONFIG_KINETIS_PIT      -- Support Programmable Interval Timers
+    CONFIG_ARM_MPU          -- Support the MPU
+    CONFIG_ARM_CAU          -- Support the Cryptographic Acceleration Unit
+
+  Kinetis interrupt priorities (Default is the mid priority).  These should
+  not be set because they can cause unhandled, nested interrupts.  All
+  interrupts need to be at the default priority in the current design.
+
+    CONFIG_KINETIS_UART0PRIO
+    CONFIG_KINETIS_UART1PRIO
+    CONFIG_KINETIS_UART2PRIO
+    CONFIG_KINETIS_UART3PRIO
+    CONFIG_KINETIS_UART4PRIO
+    CONFIG_KINETIS_UART5PRIO
+
+    CONFIG_KINETIS_EMACTMR_PRIO
+    CONFIG_KINETIS_EMACTX_PRIO
+    CONFIG_KINETIS_EMACRX_PRIO
+    CONFIG_KINETIS_EMACMISC_PRIO
+
+    CONFIG_KINETIS_SDHC_PRIO
+
+  PIN Interrupt Support
+
+    CONFIG_KINETIS_GPIOIRQ   -- Enable pin interrupt support.  Also needs
+      one or more of the following:
+    CONFIG_KINETIS_PORTAINTS -- Support 32 Port A interrupts
+    CONFIG_KINETIS_PORTBINTS -- Support 32 Port B interrupts
+    CONFIG_KINETIS_PORTCINTS -- Support 32 Port C interrupts
+    CONFIG_KINETIS_PORTDINTS -- Support 32 Port D interrupts
+    CONFIG_KINETIS_PORTEINTS -- Support 32 Port E interrupts
+
+  Kinetis K66 specific device driver settings
+
+    CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn (n=0..5) for the
+      console and ttys0 (default is the UART1).
+    CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received.
+       This specific the size of the receive buffer
+    CONFIG_UARTn_TXBUFSIZE - Characters are buffered before
+       being sent.  This specific the size of the transmit buffer
+    CONFIG_UARTn_BAUD - The configure BAUD of the UART.
+    CONFIG_UARTn_BITS - The number of bits.  Must be either 8 or 8.
+    CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
+
+  Kenetis ethernet controller settings
+
+    CONFIG_ENET_NRXBUFFERS - Number of RX buffers.  The size of one
+        buffer is determined by CONFIG_NET_ETH_MTU.  Default: 6
+    CONFIG_ENET_NTXBUFFERS - Number of TX buffers.  The size of one
+        buffer is determined by CONFIG_NET_ETH_MTU.  Default: 2
+    CONFIG_ENET_USEMII - Use MII mode.  Default: RMII mode.
+    CONFIG_ENET_PHYADDR - PHY address
+
+Configurations
+==============
+
+Each Freedom K66F configuration is maintained in a sub-directory and
+can be selected as follow:
+
+    cd tools
+    ./configure.sh freedom-K66F/
+    cd -
+    . ./setenv.sh
+
+Where  is one of the following:
+
+  netnsh:
+  ------
+    This configuration is identical to the nsh configuration described
+    below except that networking support is enabled.
+
+    NOTES:
+
+    1. This configuration uses the mconf-based configuration tool.  To
+       change this configuration using that tool, you should:
+
+       a. Build and install the kconfig-mconf tool.  See nuttx/README.txt
+          see additional README.txt files in the NuttX tools repository.
+
+       b. Execute 'make menuconfig' in nuttx/ in order to start the
+          reconfiguration process.
+
+    2. Default platform/toolchain:
+
+       CONFIG_HOST_WINDOWS=y               : Cygwin under Windows
+       CONFIG_WINDOWS_CYGWIN=y
+       CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : ARM/mbed toolcahin (arm-none-elf-gcc)
+       CONFIG_INTELHEX_BINARY=y            : Output formats: Intel hex binary
+
+    3. The Serial Console is provided on UART1 with the correct pin
+       configuration for use with an Arduino Serial Shield.
+
+    4. SDHC support is not enabled in this configuration.  Refer to the
+       configuration settings listed above under "SD Card Support".
+
+    5. Support for NSH built-in applications is enabled, but no built-in
+       applications have been configured in.
+
+    6. No external pullup is available on MDIO signal when MK66FN1M0VLL12 MCU
+       is requests status of the Ethernet link connection. Internal pullup is
+       required when port configuration for MDIO signal is enabled:
+
+       CONFIG_KINETIS_ENET_MDIOPULLUP=y
+
+    7. Configured to use a fixed IPv4 address:
+
+       CONFIG_NSH_IPADDR=0x0a000002
+       CONFIG_NSH_DRIPADDR=0x0a000001
+       CONFIG_NSH_NETMASK=0xffffff00
+
+       And a bogus MAC address:
+
+       CONFIG_NSH_NOMAC=y
+       CONFIG_NSH_SWMAC=y
+       CONFIG_NSH_MACADDR=0x00e0deadbeef
+
+  nsh:
+  ---
+    Configures the NuttShell (nsh) located at apps/examples/nsh using a
+    serial console on UART1.
+
+    NOTES:
+
+    1. This configuration uses the mconf-based configuration tool.  To
+       change this configuration using that tool, you should:
+
+       a. Build and install the kconfig-mconf tool.  See nuttx/README.txt
+          see additional README.txt files in the NuttX tools repository.
+
+       b. Execute 'make menuconfig' in nuttx/ in order to start the
+          reconfiguration process.
+
+    2. Default platform/toolchain:
+
+         CONFIG_HOST_WINDOWS=y               : Cygwin under Windows
+         CONFIG_WINDOWS_CYGWIN=y
+         CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : ARM/mbed toolcahin (arm-none-elf-gcc)
+         CONFIG_INTELHEX_BINARY=y            : Output formats: Intel hex binary
+
+    3. The Serial Console is provided on UART1 with the correct pin
+       configuration to use a RS-232 shield. This can be switched to UART0
+       for use with the OpenSDAv2.1 VCOM by reconfiguring the serial console.
+
+         +CONFIG_KINETIS_UART0=y
+         -CONFIG_KINETIS_UART1=y
+         +CONFIG_UART0_SERIALDRIVER=y
+         -CONFIG_UART1_SERIALDRIVER=y
+         +CONFIG_UART0_SERIAL_CONSOLE=y
+         -CONFIG_UART1_SERIAL_CONSOLE=y
+         +CONFIG_UART0_RXBUFSIZE=256
+         -CONFIG_UART1_RXBUFSIZE=256
+         +CONFIG_UART0_TXBUFSIZE=256
+         -CONFIG_UART1_TXBUFSIZE=256
+         +CONFIG_UART0_BAUD=115200
+         1CONFIG_UART1_BAUD=115200
+         +CONFIG_UART0_BITS=8
+         -CONFIG_UART1_BITS=8
+         +CONFIG_UART0_PARITY=0
+         -CONFIG_UART1_PARITY=0
+         +CONFIG_UART0_2STOP=0
+         -CONFIG_UART1_2STOP=0
+
+       NOTE: On my Windows 10 / Cygwin64 system, the OpenSDAv2.1 VCOM is not
+       recognized.  I probably need to install a driver?
+
+       There is a serial USB driver on the mbed web site.  However, this
+       driver would not install on Windows 10 for me.  I understand that
+       it installs OK on Windows 7.
+
+    4. Support for NSH built-in applications is enabled, but no built-in
+       applications have been configured in.
+
+    5. An SDHC driver is enabled in this configuration but does not yet work.
+       The basic problem seems to be that it does not sense the presence of
+       the SD card on PTD10.  No interrupts are generated when the SD card is
+       inserted or removed.  You might want to disable SDHC and MMC/SD if
+       you are using this configuration.  Refer to the configuration
+       settings listed above under "SD Card Support".
+       TODO:Verify Claim
+
+Status
+======
+
+  2016-07-12:  Added support for the KSZ8081 PHY and added the netnsh
+    configuration.  The network is basically functional.  More testing is
+    needed, but I have not seen any obvious network failures.
+
+    In testing, I notice a strange thing.  If I run at full optimization the
+    code runs (albeit with bugs-to-be-solved).  But with no optimization or
+    even at -O1, the system fails to boot.  This seems to be related to the
+    watchdog timer - this is due to the fact that in-lined get/putreg are
+    not inlined and the delay allows for the WD to timeout.
+
+  2016-07-13:  Add SD automounter logic; broke out SDHC logic into a separate
+    file.  The nsh configuration now has SDHC enabled be default.  Does not
+    yet work.  The basic problem seems to be that it does not sense the
+    presence of the SD card on PTE6.  No interrupts are generated when the
+    SD card is inserted or removed.  You might want to disable SDHC and
+    MMC/SD if you are using this configuration.
+
+    The nsh configuration now builds successfully with USB device enabled.
+    USB device, however, has not yet been tested.  I have not yet looked
+    into 48MHz clocking requirements.
+
+  2017-02-14:  nsh: SDHC DMA is not working yet. Buttons and SDIO with
+    automounter is working.
+    netnsh:Is building but Ehternet is not working yet. TX is called but
+    not IRQ is issued.
\ No newline at end of file
diff --git a/configs/freedom-k66f/include/board.h b/configs/freedom-k66f/include/board.h
new file mode 100644
index 0000000000000000000000000000000000000000..79d2fa00056c63bbc14b2c5623c38fde30f361fe
--- /dev/null
+++ b/configs/freedom-k66f/include/board.h
@@ -0,0 +1,418 @@
+/************************************************************************************
+ * configs/freedom-k66f/include/board.h
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __CONFIG_FREEDOM_K66F_INCLUDE_BOARD_H
+#define __CONFIG_FREEDOM_K66F_INCLUDE_BOARD_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#ifndef __ASSEMBLY__
+#  include 
+#endif
+
+#include 
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Clocking *************************************************************************/
+/* The Freedom K66F uses a 12Mhz external Oscillator.  The Kinetis MCU startup from an
+ * internal digitally-controlled oscillator (DCO). Nuttx will enable the main external
+ * oscillator (EXTAL0/XTAL0).   The external oscillator/resonator can range from
+ * 32.768 KHz up to 50 MHz. The default external source for the MCG oscillator inputs
+ * is 12 MHz oscillator
+ *
+ * X501 a High-frequency, low-power Xtal
+ */
+
+#define BOARD_EXTAL_LP       1
+#define BOARD_EXTAL_FREQ     12000000       /* 12MHz Oscillator */
+#define BOARD_XTAL32_FREQ    32768          /* 32KHz RTC Oscillator */
+
+/* PLL Configuration.  Either the external clock or crystal frequency is used to
+ * select the PRDIV value. Only reference clock frequencies are supported that will
+ * produce a KINETIS_MCG_PLL_REF_MIN >= PLLIN <=KINETIS_MCG_PLL_REF_MAX  reference
+ * clock to the PLL.
+ *
+ *   PLL Input frequency:   PLLIN  = REFCLK / PRDIV = 12 Mhz  / 1  = 12 MHz
+ *   PLL Output frequency:  PLLOUT = PLLIN  * VDIV  = 12 Mhz  * 30 = 360 MHz
+ *   MCG Frequency:         PLLOUT = 180 Mhz = 360 MHz / KINETIS_MCG_PLL_INTERNAL_DIVBY
+ *
+ * PRDIV register value is the divider minus KINETIS_MCG_C5_PRDIV_BASE.
+ * VDIV  register value is offset by KINETIS_MCG_C6_VDIV_BASE.
+ */
+
+#define BOARD_PRDIV          1             /* PLL External Reference Divider */
+#define BOARD_VDIV           30            /* PLL VCO Divider (frequency multiplier) */
+
+/* Define additional MCG_C2 Setting */
+
+#define BOARD_MCG_C2_FCFTRIM 0              /* Do not enable FCFTRIM */
+#define BOARD_MCG_C2_LOCRE0  MCG_C2_LOCRE0  /* Enable reset on loss of clock */
+
+#define BOARD_PLLIN_FREQ     (BOARD_EXTAL_FREQ / BOARD_PRDIV)
+#define BOARD_PLLOUT_FREQ    (BOARD_PLLIN_FREQ * BOARD_VDIV)
+#define BOARD_MCG_FREQ       (BOARD_PLLOUT_FREQ/KINETIS_MCG_PLL_INTERNAL_DIVBY)
+
+/* SIM CLKDIV1 dividers */
+
+#define BOARD_OUTDIV1        1              /* Core        = MCG,    180   MHz */
+#define BOARD_OUTDIV2        3              /* Bus         = MCG / 3, 60   MHz */
+#define BOARD_OUTDIV3        3              /* FlexBus     = MCG / 3, 60   MHz */
+#define BOARD_OUTDIV4        7              /* Flash clock = MCG / 7, 25.7 MHz */
+
+#define BOARD_CORECLK_FREQ   (BOARD_MCG_FREQ / BOARD_OUTDIV1)
+#define BOARD_BUS_FREQ       (BOARD_MCG_FREQ / BOARD_OUTDIV2)
+#define BOARD_FLEXBUS_FREQ   (BOARD_MCG_FREQ / BOARD_OUTDIV3)
+#define BOARD_FLASHCLK_FREQ  (BOARD_MCG_FREQ / BOARD_OUTDIV4)
+
+/* Use BOARD_MCG_FREQ as the output SIM_SOPT2 MUX selected by
+ * SIM_SOPT2[PLLFLLSEL]
+ */
+
+#define BOARD_SOPT2_PLLFLLSEL   SIM_SOPT2_PLLFLLSEL_MCGPLLCLK
+#define BOARD_SOPT2_FREQ        BOARD_MCG_FREQ
+
+/* N.B. The above BOARD_SOPT2_FREQ precludes use of USB with a 12 Mhz Xtal
+ * Divider output clock = Divider input clock × [ (USBFRAC+1) / (USBDIV+1) ]
+ *     SIM_CLKDIV2_FREQ = BOARD_SOPT2_FREQ × [ (USBFRAC+1) / (USBDIV+1) ]
+ *                48Mhz = 168Mhz X [(1 + 1) / (6 + 1)]
+ *                48Mhz = 168Mhz / (6 + 1) * (1 + 1)
+ */
+
+#if (BOARD_MCG_FREQ == 168000000L)
+#  define BOARD_SIM_CLKDIV2_USBFRAC     2
+#  define BOARD_SIM_CLKDIV2_USBDIV      7
+#  define BOARD_SIM_CLKDIV2_FREQ        (BOARD_SOPT2_FREQ / \
+                                         BOARD_SIM_CLKDIV2_USBDIV * \
+                                         BOARD_SIM_CLKDIV2_USBFRAC)
+#endif
+
+/* Divider output clock = Divider input clock * ((PLLFLLFRAC+1)/(PLLFLLDIV+1))
+ *  SIM_CLKDIV3_FREQ = BOARD_SOPT2_FREQ × [ (PLLFLLFRAC+1) / (PLLFLLDIV+1)]
+ *            90 Mhz = 180 Mhz X [(0 + 1) / (1 + 1)]
+ *            90 Mhz = 180 Mhz / (1 + 1) * (0 + 1)
+ */
+
+#define BOARD_SIM_CLKDIV3_PLLFLLFRAC  1
+#define BOARD_SIM_CLKDIV3_PLLFLLDIV   2
+#define BOARD_SIM_CLKDIV3_FREQ        (BOARD_SOPT2_FREQ / \
+                                       BOARD_SIM_CLKDIV3_PLLFLLDIV * \
+                                       BOARD_SIM_CLKDIV3_PLLFLLFRAC)
+
+#define BOARD_LPUART0_CLKSRC SIM_SOPT2_LPUARTSRC_MCGCLK
+#define BOARD_LPUART0_FREQ   BOARD_SIM_CLKDIV3_FREQ
+
+#define BOARD_TPM_CLKSRC     SIM_SOPT2_TPMSRC_MCGCLK
+#define BOARD_TPM_FREQ       BOARD_SIM_CLKDIV3_FREQ
+
+/* SDHC clocking ********************************************************************/
+
+/* SDCLK configurations corresponding to various modes of operation.   Formula is:
+ *
+ *   SDCLK  frequency = (base clock) / (prescaler * divisor)
+ *
+ * The SDHC module is always configure configured so that the core clock is the base
+ * clock.  Possible values for presscaler and divisor are:
+ *
+ *   SDCLKFS: {2, 4, 8, 16, 32, 63, 128, 256}
+ *   DVS:     {1..16}
+ */
+
+/* Identification mode:  Optimal 400KHz, Actual 180MHz / (32 * 15) = 375 Khz */
+
+#define BOARD_SDHC_IDMODE_PRESCALER    SDHC_SYSCTL_SDCLKFS_DIV32
+#define BOARD_SDHC_IDMODE_DIVISOR      SDHC_SYSCTL_DVS_DIV(15)
+
+/* MMC normal mode: Optimal 20MHz, Actual 180MHz / (2 * 5) = 18 MHz */
+
+#define BOARD_SDHC_MMCMODE_PRESCALER   SDHC_SYSCTL_SDCLKFS_DIV2
+#define BOARD_SDHC_MMCMODE_DIVISOR     SDHC_SYSCTL_DVS_DIV(5)
+
+/* SD normal mode (1-bit): Optimal 20MHz, Actual 180MHz / (2 * 5) = 18 MHz */
+
+#define BOARD_SDHC_SD1MODE_PRESCALER   SDHC_SYSCTL_SDCLKFS_DIV2
+#define BOARD_SDHC_SD1MODE_DIVISOR     SDHC_SYSCTL_DVS_DIV(5)
+
+/* SD normal mode (4-bit): Optimal 25MHz, Actual 180MHz / (2 * 4) = 22.5 MHz (with DMA)
+ * SD normal mode (4-bit): Optimal 20MHz, Actual 180MHz / (2 * 4) = 22.5 MHz (no DMA)
+ */
+
+#ifdef CONFIG_SDIO_DMA
+#  define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
+#  define BOARD_SDHC_SD4MODE_DIVISOR   SDHC_SYSCTL_DVS_DIV(4)
+#else
+#  define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
+#  define BOARD_SDHC_SD4MODE_DIVISOR   SDHC_SYSCTL_DVS_DIV(4)
+#endif
+
+/* PWM Configuration */
+/* FTM0 Channels */
+/* Channels can be modified using kinetis_k66pinmux.h */
+
+#define GPIO_FTM0_CH0OUT PIN_FTM0_CH0_1
+#define GPIO_FTM0_CH1OUT PIN_FTM0_CH1_1
+#define GPIO_FTM0_CH2OUT PIN_FTM0_CH2_2
+#define GPIO_FTM0_CH3OUT PIN_FTM0_CH3_1
+#define GPIO_FTM0_CH4OUT PIN_FTM0_CH4_1
+#define GPIO_FTM0_CH5OUT PIN_FTM0_CH5_1
+
+/* PWM Configuration */
+/* FTM3 Channels */
+/* Channels can be modified using kinetis_k66pinmux.h */
+
+#define GPIO_FTM3_CH0OUT PIN_FTM3_CH0_1
+#define GPIO_FTM3_CH1OUT PIN_FTM3_CH1_1
+#define GPIO_FTM3_CH2OUT PIN_FTM3_CH2_1
+#define GPIO_FTM3_CH3OUT PIN_FTM3_CH3_1
+#define GPIO_FTM3_CH4OUT PIN_FTM3_CH4_1
+
+/* LED definitions ******************************************************************/
+/* The Freedom K66F has a single RGB LED driven by the K66F as follows:
+ *
+ *   LED    K66
+ *   ------ -------------------------------------------------------
+ *   RED    PTB22/SPI2_SOUT/FB_AD29/CMP2_OUT
+ *   BLUE   PTB21/SPI2_SCK/FB_AD30/CMP1_OUT
+ *   GREEN  PTE26/ENET_1588_CLKIN/UART4_CTS_b/RTC_CLKOUT/USB0_CLKIN
+ *
+ * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any
+ * way.  The following definitions are used to access individual LEDs.
+ */
+
+/* LED index values for use with board_userled() */
+
+#define BOARD_LED_R       0
+#define BOARD_LED_G       1
+#define BOARD_LED_B       2
+#define BOARD_NLEDS       3
+
+/* LED bits for use with board_userled_all() */
+
+#define BOARD_LED_R_BIT   (1 << BOARD_LED_R)
+#define BOARD_LED_G_BIT   (1 << BOARD_LED_G)
+#define BOARD_LED_B_BIT   (1 << BOARD_LED_B)
+
+/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board
+ * the Freedom K66F.  The following definitions describe how NuttX controls
+ * the LEDs:
+ *
+ *   SYMBOL                Meaning                      LED state
+ *                                                      RED   GREEN  BLUE
+ *   -------------------  ----------------------------  ----------------- */
+#define LED_STARTED       1 /* NuttX has been started    OFF   OFF    OFF */
+#define LED_HEAPALLOCATE  2 /* Heap has been allocated   OFF   OFF    ON  */
+#define LED_IRQSENABLED   0 /* Interrupts enabled        OFF   OFF    ON  */
+#define LED_STACKCREATED  3 /* Idle stack created        OFF   ON     OFF */
+#define LED_INIRQ         0 /* In an interrupt          (no change)       */
+#define LED_SIGNAL        0 /* In a signal handler      (no change)       */
+#define LED_ASSERTION     0 /* An assertion failed      (no change)       */
+#define LED_PANIC         4 /* The system has crashed    FLASH OFF    OFF */
+#undef  LED_IDLE            /* K66 is in sleep mode     (Not used)        */
+
+/* Button definitions ***************************************************************/
+/* Two push buttons, SW2 and SW3, are available on FRDM-K66F board, where SW2 is
+ * connected to PTC6 and SW3 is connected to PTA4. Besides the general purpose
+ * input/output functions, SW2 and SW3 can be low-power wake up signal. Also, only
+ * SW3 can be a non-maskable interrupt.
+ *
+ *   Switch    GPIO Function
+ *   --------- ---------------------------------------------------------------
+ *   SW2       PTC6/SPI0_SOUT/PD0_EXTRG/I2S0_RX_BCLK/FB_AD9/I2S0_MCLK/LLWU_P10
+ *   SW3       PTA4/FTM0_CH1/NMI_b/LLWU_P3
+ */
+
+#define BUTTON_SW2        0
+#define BUTTON_SW3        1
+#define NUM_BUTTONS       2
+
+#define BUTTON_SW2_BIT    (1 << BUTTON_SW2)
+#define BUTTON_SW3_BIT    (1 << BUTTON_SW3)
+
+/* Alternative pin resolution *******************************************************/
+/* If there are alternative configurations for various pins in the
+ * kinetis_k66pinmux.h header file, those alternative pins will be labeled with a
+ * suffix like _1, _2, etc.  The logic in this file must select the correct pin
+ * configuration for the board by defining a pin configuration (with no suffix) that
+ * maps to the correct alternative.
+ */
+
+/* The primary serial port interface signals are PTB16 UART0_RX and PTB17 UART0_TX.
+ * These signals are connected to the OpenSDAv2 circuit.
+ */
+
+#define PIN_UART0_RX      PIN_UART0_RX_3
+#define PIN_UART0_TX      PIN_UART0_TX_3
+
+/* An alternative serial port might use a standard serial shield mounted
+ * on the Freedom Board.  In this case, Arduino pin D1 provides UART TX and
+ * pin D0 privies UART RX.
+ *
+ * The I/O headers on the FRDM-K66F board are arranged to enable
+ * compatibility with Arduino shield. The outer rows of pins (even numbered
+ * pins) on the headers, share the same mechanical spacing and placement with
+ * the I/O headers on the Arduino Revision 3 (R3) standard.
+ *
+ * The Arduino D0 and D1 pins then correspond to pins 2 and 4 on the J1 I/O
+ * connector:
+ *
+ *  Arduino Pin              FRDM-K66F J1 Connector
+ *  ------------------------ -----------------------
+ *  UART RX, Arduino D0 pin  Pin 2, PTC3, UART1_RX
+ *  UART TX, Arduino D1 pin  Pin 4, PTC4, UART1_TX
+ *  ------------------------ -----------------------
+ *
+ */
+
+#define PIN_UART1_RX      PIN_UART1_RX_1
+#define PIN_UART1_TX      PIN_UART1_TX_1
+
+/* Bluetooth header
+ *
+ *  J199 Pin Name   K66   Name
+ *  -------- ----- ------ ---------
+ *      3    BT_TX  PTC14 UART4_RX
+ *      4    BT_RX  PTC15 UART4_TX
+ *  -------- ----- ------ ---------
+ */
+
+#define PIN_UART4_RX      PIN_UART4_RX_1
+#define PIN_UART4_TX      PIN_UART4_TX_1
+
+/* LPUART
+ *
+ *  J1 Pin     Name        K66   Name
+ *  -------- ------------ ------ ---------
+ *      7    I2S_RX_BCLK  PTE9 LPUART0_RX
+ *      11   I2S_RX_FS    PTE8 LPUART0_TX
+ *  -------- ----- ------ ---------
+ */
+
+#define PIN_LPUART0_RX      PIN_LPUART0_RX_1
+#define PIN_LPUART0_TX      PIN_LPUART0_TX_1
+
+/* I2C INERTIAL SENSOR (Gyroscope)
+ *
+ *  Pin Name   K66   Name
+ *  ---- ----- ------ ---------
+ *   11  SCL    PTD8  2C0_SCL
+ *   12  SDA    PTD9  2C0_SDA
+ */
+
+#define PIN_I2C0_SCL      PIN_I2C0_SCL_3
+#define PIN_I2C0_SDA      PIN_I2C0_SDA_3
+
+/*
+ * Ethernet MAC/KSZ8081 PHY
+ *  ------------------------
+ *  ------------ ----------------- --------------------------------------------
+ * KSZ8081      Board Signal(s)   K66F Pin
+ * Pin Signal                     Function                       pinmux Name
+ * --- -------- ----------------- --------------------------------------------
+ *  1  VDD_1V2  VDDPLL_1.2V       ---                            ---
+ *  2  VDDA_3V3 VDDA_ENET         ---                            ---
+ *  3  RXM      ENET1_RX-         ---                            ---
+ *  4  RXP      ENET1_RX+         ---                            ---
+ *  5  TXM      ENET1_TX-         ---                            ---
+ *  6  TXP      ENET1_TX+         ---                            ---
+ *  7  X0       RMII_XTAL0        ---                            ---
+ *  8  XI       RMII_XTAL1        ---                            ---
+ *  9  REXT     ---               ---, Apparently not connected  ---
+ * 10  MDIO     RMII0_MDIO        PTB0/RMII0_MDIO                PIN_RMII0_MDIO
+ * 11  MDC      RMII0_MDC         PTB1/RMII0_MDC                 PIN_RMII0_MDC
+ * 12  RXD1     RMII0_RXD_1       PTA12/RMII0_RXD1               PIN_RMII0_RXD1
+ * 13  RXD0     RMII0_RXD_0       PTA13/RMII0_RXD0               PIN_RMII0_RXD0
+ * 14  VDDIO    VDDIO_ENET        ---                            ---
+ * 15  CRS_DIV                    PTA14/RMII0_CRS_DV             PIN_RMII0_CRS_DV
+ * 16  REF_CLK  PTE26             PTE26(Ethernet clock)          PTE26/ENET_1588_CLKIN
+ * 17  RXER     RMII0_RXER        PTA5/RMII0_RXER                PIN_RMII0_RXER
+ * 18  INTRP    RMII0_INT_B,      J14 Pin 2, Apparently not      ---
+ *              PHY_INT_1         available unless jumpered
+ * 19  TXEN     RMII0_TXEN        PTA15/RMII0_TXEN               PIN_RMII0_TXEN
+ * 20  TXD0     RMII0_TXD_0       PTA16/RMII0_TXD0               PIN_RMII0_TXD0
+ * 21  TXD1     RMII0_TXD_1       PTA17/RMII0_TXD1               PIN_RMII0_TXD1
+ * 22  GND1     ---               ---                            ---
+ * 24  nRST     PHY_RST_B         ---                            ---
+ * 25  GND2     ---               ---                            ---
+ * --- -------- ----------------- --------------------------------------------
+ *
+ */
+
+#define PIN_RMII0_MDIO  PIN_RMII0_MDIO_1
+#define PIN_RMII0_MDC   PIN_RMII0_MDC_1
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: kinetis_boardinitialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.  This entry point
+ *   is called early in the intitialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void kinetis_boardinitialize(void);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif  /* __CONFIG_FREEDOM_K66F_INCLUDE_BOARD_H */
diff --git a/configs/freedom-k66f/netnsh/Make.defs b/configs/freedom-k66f/netnsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..d543b6d29e1dd3b9adbdf0fc1a7dc0b32c796821
--- /dev/null
+++ b/configs/freedom-k66f/netnsh/Make.defs
@@ -0,0 +1,112 @@
+############################################################################
+# configs/freedom-k66f/netnsh/Make.defs
+#
+#   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+#   Authors: Gregory Nutt 
+#            David Sidrane 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/flash.ld}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/flash.ld
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/freedom-k66f/netnsh/defconfig b/configs/freedom-k66f/netnsh/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..b31db4cfb098221eb4d480547aec2ee65ff2989c
--- /dev/null
+++ b/configs/freedom-k66f/netnsh/defconfig
@@ -0,0 +1,1299 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+# CONFIG_INTELHEX_BINARY is not set
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+CONFIG_STACK_COLORATION=y
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+CONFIG_ARCH_CHIP_KINETIS=y
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+# CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="kinetis"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+CONFIG_ARMV7M_USEBASEPRI=y
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+CONFIG_ARMV7M_CMNVECTOR=y
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+CONFIG_ARCH_FPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+
+#
+# Kinetis Configuration Options
+#
+# CONFIG_ARCH_CHIP_MK20DN32VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX32VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DN64VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX64VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DN128VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX128VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX64VLH7 is not set
+# CONFIG_ARCH_CHIP_MK20DX128VLH7 is not set
+# CONFIG_ARCH_CHIP_MK20DX256VLH7 is not set
+# CONFIG_ARCH_CHIP_MK40N512VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK40N512VMD100 is not set
+# CONFIG_ARCH_CHIP_MK40X128VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK40X128VMD100 is not set
+# CONFIG_ARCH_CHIP_MK40X256VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK40X256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60N256VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK60N256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VLL100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60X256VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK60X256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60FN1M0VLQ12 is not set
+# CONFIG_ARCH_CHIP_MK64FN1M0VLL12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VLL12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VDC12 is not set
+# CONFIG_ARCH_CHIP_MK64FN1M0VDC12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VLQ12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VMD12 is not set
+# CONFIG_ARCH_CHIP_MK64FN1M0VMD12 is not set
+# CONFIG_ARCH_CHIP_MK66FX1M0VMD18 is not set
+CONFIG_ARCH_CHIP_MK66FN2M0VMD18=y
+# CONFIG_ARCH_CHIP_MK66FX1M0VLQ18 is not set
+# CONFIG_ARCH_CHIP_MK66FN2M0VLQ18 is not set
+# CONFIG_ARCH_FAMILY_K20 is not set
+# CONFIG_ARCH_FAMILY_K40 is not set
+# CONFIG_ARCH_FAMILY_K60 is not set
+# CONFIG_ARCH_FAMILY_K64 is not set
+CONFIG_ARCH_FAMILY_K66=y
+
+#
+# Kinetis Peripheral Support
+#
+CONFIG_KINETIS_HAVE_I2C1=y
+CONFIG_KINETIS_HAVE_I2C2=y
+CONFIG_KINETIS_HAVE_I2C3=y
+CONFIG_KINETIS_HAVE_SPI1=y
+CONFIG_KINETIS_HAVE_SPI2=y
+# CONFIG_KINETIS_TRACE is not set
+# CONFIG_KINETIS_FLEXBUS is not set
+# CONFIG_KINETIS_UART0 is not set
+CONFIG_KINETIS_UART1=y
+# CONFIG_KINETIS_UART2 is not set
+# CONFIG_KINETIS_UART3 is not set
+CONFIG_KINETIS_UART4=y
+# CONFIG_KINETIS_UART5 is not set
+CONFIG_KINETIS_ENET=y
+# CONFIG_KINETIS_RNGB is not set
+# CONFIG_KINETIS_FLEXCAN0 is not set
+# CONFIG_KINETIS_FLEXCAN1 is not set
+# CONFIG_KINETIS_SPI0 is not set
+# CONFIG_KINETIS_SPI1 is not set
+# CONFIG_KINETIS_SPI2 is not set
+# CONFIG_KINETIS_I2C0 is not set
+# CONFIG_KINETIS_I2C1 is not set
+# CONFIG_KINETIS_I2C2 is not set
+# CONFIG_KINETIS_I2C3 is not set
+# CONFIG_KINETIS_I2S is not set
+# CONFIG_KINETIS_DAC0 is not set
+# CONFIG_KINETIS_DAC1 is not set
+# CONFIG_KINETIS_ADC0 is not set
+# CONFIG_KINETIS_ADC1 is not set
+# CONFIG_KINETIS_CMP is not set
+# CONFIG_KINETIS_VREF is not set
+# CONFIG_KINETIS_SDHC is not set
+# CONFIG_KINETIS_FTM0 is not set
+# CONFIG_KINETIS_FTM1 is not set
+# CONFIG_KINETIS_FTM2 is not set
+# CONFIG_KINETIS_LPTIMER is not set
+# CONFIG_KINETIS_RTC is not set
+# CONFIG_KINETIS_EWM is not set
+# CONFIG_KINETIS_CMT is not set
+# CONFIG_KINETIS_USBOTG is not set
+# CONFIG_KINETIS_USBDCD is not set
+# CONFIG_KINETIS_LLWU is not set
+# CONFIG_KINETIS_TSI is not set
+# CONFIG_KINETIS_FTFL is not set
+# CONFIG_KINETIS_DMA is not set
+# CONFIG_KINETIS_CRC is not set
+# CONFIG_KINETIS_PDB is not set
+# CONFIG_KINETIS_PIT is not set
+
+#
+# Kinetis GPIO Interrupt Configuration
+#
+CONFIG_KINETIS_GPIOIRQ=y
+CONFIG_KINETIS_PORTAINTS=y
+# CONFIG_KINETIS_PORTBINTS is not set
+# CONFIG_KINETIS_PORTCINTS is not set
+CONFIG_KINETIS_PORTDINTS=y
+# CONFIG_KINETIS_PORTEINTS is not set
+
+#
+# Kinetis Ethernet Configuration
+#
+# CONFIG_KINETIS_ENETENHANCEDBD is not set
+CONFIG_KINETIS_ENETNETHIFS=1
+CONFIG_KINETIS_ENETNRXBUFFERS=6
+CONFIG_KINETIS_ENETNTXBUFFERS=2
+# CONFIG_KINETIS_ENETUSEMII is not set
+CONFIG_KINETIS_ENET_MDIOPULLUP=y
+# CONFIG_KINETIS_ENET_NORXER is not set
+# CONFIG_KINETIS_EMAC_RMIICLKEXTAL is not set
+CONFIG_KINETIS_EMAC_RMIICLK1588CLKIN=y
+# CONFIG_KINETIS_EMAC_HPWORK is not set
+CONFIG_KINETIS_EMAC_LPWORK=y
+
+#
+# Kinetis UART Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+CONFIG_ARCH_HAVE_RAMFUNCS=y
+CONFIG_ARCH_RAMFUNCS=y
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=10016
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x1fff0000
+CONFIG_RAM_SIZE=262144
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_FREEDOM_K66F=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="freedom-k66f"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+CONFIG_ARCH_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+CONFIG_BOARDCTL_RESET=y
+CONFIG_BOARDCTL_UNIQUEID=y
+CONFIG_BOARDCTL_UNIQUEID_SIZE=16
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_USEC_PER_TICK=1000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2016
+CONFIG_START_MONTH=11
+CONFIG_START_DAY=30
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_SPINLOCK is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=32
+CONFIG_MAX_TASKS=16
+CONFIG_SCHED_HAVE_PARENT=y
+CONFIG_SCHED_CHILD_STATUS=y
+CONFIG_PREALLOC_CHILDSTATUS=2
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+CONFIG_PRIORITY_INHERITANCE=y
+CONFIG_SEM_PREALLOCHOLDERS=16
+CONFIG_SEM_NNESTPRIO=16
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCHLD=4
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=32
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+CONFIG_SCHED_LPWORK=y
+CONFIG_SCHED_LPNTHREADS=1
+CONFIG_SCHED_LPWORKPRIORITY=50
+CONFIG_SCHED_LPWORKPRIOMAX=176
+CONFIG_SCHED_LPWORKPERIOD=50000
+CONFIG_SCHED_LPWORKSTACKSIZE=2048
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+CONFIG_DISABLE_POLL=y
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+# CONFIG_ARCH_HAVE_I2CRESET is not set
+CONFIG_I2C=y
+# CONFIG_I2C_SLAVE is not set
+# CONFIG_I2C_POLLED is not set
+# CONFIG_I2C_TRACE is not set
+# CONFIG_I2C_DRIVER is not set
+# CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_TIMERS_CS2100CP is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+CONFIG_NETDEVICES=y
+
+#
+# General Ethernet MAC Driver Options
+#
+# CONFIG_NETDEV_LOOPBACK is not set
+CONFIG_NETDEV_TELNET=y
+CONFIG_TELNET_RXBUFFER_SIZE=256
+CONFIG_TELNET_TXBUFFER_SIZE=256
+# CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
+CONFIG_NETDEV_STATISTICS=y
+# CONFIG_NETDEV_LATEINIT is not set
+
+#
+# External Ethernet MAC Device Support
+#
+# CONFIG_NET_DM90x0 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ENCX24J600 is not set
+# CONFIG_NET_SLIP is not set
+# CONFIG_NET_FTMAC100 is not set
+
+#
+# External Ethernet PHY Device Support
+#
+# CONFIG_ARCH_PHY_INTERRUPT is not set
+# CONFIG_ETH0_PHY_NONE is not set
+# CONFIG_ETH0_PHY_AM79C874 is not set
+# CONFIG_ETH0_PHY_KS8721 is not set
+# CONFIG_ETH0_PHY_KSZ8041 is not set
+# CONFIG_ETH0_PHY_KSZ8051 is not set
+# CONFIG_ETH0_PHY_KSZ8061 is not set
+CONFIG_ETH0_PHY_KSZ8081=y
+# CONFIG_ETH0_PHY_KSZ90x1 is not set
+# CONFIG_ETH0_PHY_DP83848C is not set
+# CONFIG_ETH0_PHY_LAN8720 is not set
+# CONFIG_ETH0_PHY_LAN8740 is not set
+# CONFIG_ETH0_PHY_LAN8740A is not set
+# CONFIG_ETH0_PHY_LAN8742A is not set
+# CONFIG_ETH0_PHY_DM9161 is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+CONFIG_UART4_SERIALDRIVER=y
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+CONFIG_UART1_SERIAL_CONSOLE=y
+# CONFIG_UART4_SERIAL_CONSOLE is not set
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# UART1 Configuration
+#
+CONFIG_UART1_RXBUFSIZE=256
+CONFIG_UART1_TXBUFSIZE=256
+CONFIG_UART1_BAUD=57600
+CONFIG_UART1_BITS=8
+CONFIG_UART1_PARITY=0
+CONFIG_UART1_2STOP=0
+# CONFIG_UART1_IFLOWCONTROL is not set
+# CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
+
+#
+# UART4 Configuration
+#
+CONFIG_UART4_RXBUFSIZE=256
+CONFIG_UART4_TXBUFSIZE=256
+CONFIG_UART4_BAUD=115200
+CONFIG_UART4_BITS=8
+CONFIG_UART4_PARITY=0
+CONFIG_UART4_2STOP=0
+# CONFIG_UART4_IFLOWCONTROL is not set
+# CONFIG_UART4_OFLOWCONTROL is not set
+# CONFIG_UART4_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+CONFIG_ARCH_HAVE_NET=y
+CONFIG_ARCH_HAVE_PHY=y
+CONFIG_NET=y
+# CONFIG_NET_PROMISCUOUS is not set
+
+#
+# Driver buffer configuration
+#
+CONFIG_NET_ETH_MTU=590
+CONFIG_NET_ETH_TCP_RECVWNDO=536
+CONFIG_NET_GUARDSIZE=2
+
+#
+# Data link support
+#
+# CONFIG_NET_MULTILINK is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
+# CONFIG_NET_TUN is not set
+
+#
+# Network Device Operations
+#
+CONFIG_NETDEV_PHY_IOCTL=y
+
+#
+# Internet Protocol Selection
+#
+CONFIG_NET_IPv4=y
+# CONFIG_NET_IPv6 is not set
+
+#
+# Socket Support
+#
+CONFIG_NSOCKET_DESCRIPTORS=8
+CONFIG_NET_NACTIVESOCKETS=16
+CONFIG_NET_SOCKOPTS=y
+# CONFIG_NET_SOLINGER is not set
+
+#
+# Raw Socket Support
+#
+# CONFIG_NET_PKT is not set
+
+#
+# Unix Domain Socket Support
+#
+# CONFIG_NET_LOCAL is not set
+
+#
+# TCP/IP Networking
+#
+CONFIG_NET_TCP=y
+# CONFIG_NET_TCPURGDATA is not set
+CONFIG_NET_TCP_CONNS=8
+CONFIG_NET_MAX_LISTENPORTS=20
+CONFIG_NET_TCP_READAHEAD=y
+CONFIG_NET_TCP_WRITE_BUFFERS=y
+CONFIG_NET_TCP_NWRBCHAINS=8
+CONFIG_NET_TCP_RECVDELAY=0
+CONFIG_NET_TCPBACKLOG=y
+# CONFIG_NET_SENDFILE is not set
+
+#
+# UDP Networking
+#
+CONFIG_NET_UDP=y
+# CONFIG_NET_UDP_CHECKSUMS is not set
+CONFIG_NET_UDP_CONNS=8
+CONFIG_NET_BROADCAST=y
+# CONFIG_NET_RXAVAIL is not set
+CONFIG_NET_UDP_READAHEAD=y
+
+#
+# ICMP Networking Support
+#
+CONFIG_NET_ICMP=y
+CONFIG_NET_ICMP_PING=y
+
+#
+# IGMPv2 Client Support
+#
+# CONFIG_NET_IGMP is not set
+
+#
+# ARP Configuration
+#
+CONFIG_NET_ARP=y
+CONFIG_NET_ARPTAB_SIZE=16
+CONFIG_NET_ARP_MAXAGE=120
+# CONFIG_NET_ARP_IPIN is not set
+CONFIG_NET_ARP_SEND=y
+CONFIG_ARP_SEND_MAXTRIES=5
+CONFIG_ARP_SEND_DELAYMSEC=20
+
+#
+# Network I/O Buffer Support
+#
+CONFIG_NET_IOB=y
+CONFIG_IOB_NBUFFERS=36
+CONFIG_IOB_BUFSIZE=196
+CONFIG_IOB_NCHAINS=8
+CONFIG_IOB_THROTTLE=8
+# CONFIG_NET_ARCH_INCR32 is not set
+# CONFIG_NET_ARCH_CHKSUM is not set
+CONFIG_NET_STATISTICS=y
+
+#
+# Routing Table Configuration
+#
+# CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME="Freedom-K66F"
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_PSEUDOFS_SOFTLINKS is not set
+CONFIG_FS_READABLE=y
+CONFIG_FS_WRITABLE=y
+# CONFIG_FS_AIO is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+CONFIG_FS_FAT=y
+# CONFIG_FAT_LCNAMES is not set
+# CONFIG_FAT_LFN is not set
+# CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
+# CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
+# CONFIG_NFS is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_REGISTER=y
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_NET is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+
+#
+# Standard C I/O
+#
+# CONFIG_STDIO_DISABLE_BUFFERING is not set
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_LIBM is not set
+
+#
+# Architecture-Specific Support
+#
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
+
+#
+# stdlib Options
+#
+CONFIG_LIB_RAND_ORDER=1
+CONFIG_LIB_HOMEDIR="/"
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
+
+#
+# Program Execution Options
+#
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+
+#
+# errno Decode Support
+#
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+
+#
+# memcpy/memset Options
+#
+# CONFIG_MEMSET_OPTSPEED is not set
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+
+#
+# Time/Time Zone Support
+#
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_ARCH_HAVE_TLS=y
+
+#
+# Thread Local Storage (TLS)
+#
+# CONFIG_TLS is not set
+
+#
+# Network-Related Options
+#
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
+CONFIG_LIBC_NETDB=y
+
+#
+# NETDB Support
+#
+# CONFIG_NETDB_HOSTFILE is not set
+CONFIG_NETDB_DNSCLIENT=y
+CONFIG_NETDB_DNSCLIENT_ENTRIES=8
+CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
+CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
+CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_RESOLVCONF is not set
+# CONFIG_NETDB_DNSSERVER_NOADDR is not set
+CONFIG_NETDB_DNSSERVER_IPv4=y
+CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NETTEST is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_STAT is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_UDPBLASTER is not set
+# CONFIG_EXAMPLES_UDP is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_DHCPC is not set
+# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
+# CONFIG_NETUTILS_SMTP is not set
+CONFIG_NETUTILS_TELNETD=y
+CONFIG_NETUTILS_TFTPC=y
+CONFIG_NETUTILS_WEBCLIENT=y
+CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
+CONFIG_WEBCLIENT_TIMEOUT=10
+# CONFIG_NETUTILS_WEBSERVER is not set
+# CONFIG_NETUTILS_XMLRPC is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_IFUPDOWN is not set
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFATFS is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+# CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PSSTACKUSAGE is not set
+# CONFIG_NSH_DISABLE_PING is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_REBOOT is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+CONFIG_NSH_DISABLE_SHUTDOWN=y
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+CONFIG_NSH_ARCHINIT=y
+
+#
+# Networking Configuration
+#
+CONFIG_NSH_NETINIT=y
+CONFIG_NSH_NETINIT_THREAD=y
+CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568
+CONFIG_NSH_NETINIT_THREAD_PRIORITY=80
+
+#
+# IP Address Configuration
+#
+
+#
+# IPv4 Addresses
+#
+CONFIG_NSH_IPADDR=0x0a000002
+CONFIG_NSH_DRIPADDR=0x0a000001
+CONFIG_NSH_NETMASK=0xffffff00
+# CONFIG_NSH_DNS is not set
+CONFIG_NSH_NOMAC=y
+CONFIG_NSH_SWMAC=y
+CONFIG_NSH_MACADDR=0x00e0deadbeef
+CONFIG_NSH_MAX_ROUNDTRIP=20
+
+#
+# Telnet Configuration
+#
+CONFIG_NSH_TELNET=y
+CONFIG_NSH_TELNETD_PORT=23
+CONFIG_NSH_TELNETD_DAEMONPRIO=100
+CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
+CONFIG_NSH_TELNETD_CLIENTPRIO=100
+CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
+CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+# CONFIG_NSH_TELNET_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_I2CTOOL is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_MDIO is not set
+# CONFIG_SYSTEM_NETDB is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_STACKMONITOR is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/freedom-k66f/netnsh/setenv.sh b/configs/freedom-k66f/netnsh/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..0bd099e16c6119b844b87cbf7e6859672293a21c
--- /dev/null
+++ b/configs/freedom-k66f/netnsh/setenv.sh
@@ -0,0 +1,77 @@
+#!/bin/bash
+# configs/freedom-k66f/netnsh/setenv.sh
+#
+#   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the Atmel GCC
+# toolchain under Windows.  You will also have to edit this if you install
+# this toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/freedom-k66f/nsh/Make.defs b/configs/freedom-k66f/nsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..b97c0eb1cc06f0b9cc40dc13c5805b240d3be545
--- /dev/null
+++ b/configs/freedom-k66f/nsh/Make.defs
@@ -0,0 +1,112 @@
+############################################################################
+# configs/freedom-k66f/nsh/Make.defs
+#
+#   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+#   Authors: Gregory Nutt 
+#            David Sidrane 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/flash.ld}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/flash.ld
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/freedom-k66f/nsh/defconfig b/configs/freedom-k66f/nsh/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..c8032c952b87f208e19eb6d0a6dc42504f53df6b
--- /dev/null
+++ b/configs/freedom-k66f/nsh/defconfig
@@ -0,0 +1,1153 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+# CONFIG_INTELHEX_BINARY is not set
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+CONFIG_STACK_COLORATION=y
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+CONFIG_ARCH_CHIP_KINETIS=y
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+# CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="kinetis"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+CONFIG_ARMV7M_USEBASEPRI=y
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+CONFIG_ARMV7M_CMNVECTOR=y
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+CONFIG_ARCH_FPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+
+#
+# Kinetis Configuration Options
+#
+# CONFIG_ARCH_CHIP_MK20DN32VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX32VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DN64VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX64VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DN128VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX128VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX64VLH7 is not set
+# CONFIG_ARCH_CHIP_MK20DX128VLH7 is not set
+# CONFIG_ARCH_CHIP_MK20DX256VLH7 is not set
+# CONFIG_ARCH_CHIP_MK40N512VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK40N512VMD100 is not set
+# CONFIG_ARCH_CHIP_MK40X128VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK40X128VMD100 is not set
+# CONFIG_ARCH_CHIP_MK40X256VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK40X256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60N256VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK60N256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VLL100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60X256VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK60X256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60FN1M0VLQ12 is not set
+# CONFIG_ARCH_CHIP_MK64FN1M0VLL12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VLL12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VDC12 is not set
+# CONFIG_ARCH_CHIP_MK64FN1M0VDC12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VLQ12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VMD12 is not set
+# CONFIG_ARCH_CHIP_MK64FN1M0VMD12 is not set
+# CONFIG_ARCH_CHIP_MK66FX1M0VMD18 is not set
+CONFIG_ARCH_CHIP_MK66FN2M0VMD18=y
+# CONFIG_ARCH_CHIP_MK66FX1M0VLQ18 is not set
+# CONFIG_ARCH_CHIP_MK66FN2M0VLQ18 is not set
+# CONFIG_ARCH_FAMILY_K20 is not set
+# CONFIG_ARCH_FAMILY_K40 is not set
+# CONFIG_ARCH_FAMILY_K60 is not set
+# CONFIG_ARCH_FAMILY_K64 is not set
+CONFIG_ARCH_FAMILY_K66=y
+
+#
+# Kinetis Peripheral Support
+#
+CONFIG_KINETIS_HAVE_I2C1=y
+CONFIG_KINETIS_HAVE_I2C2=y
+CONFIG_KINETIS_HAVE_I2C3=y
+CONFIG_KINETIS_HAVE_SPI1=y
+CONFIG_KINETIS_HAVE_SPI2=y
+# CONFIG_KINETIS_TRACE is not set
+# CONFIG_KINETIS_FLEXBUS is not set
+# CONFIG_KINETIS_UART0 is not set
+CONFIG_KINETIS_UART1=y
+# CONFIG_KINETIS_UART2 is not set
+# CONFIG_KINETIS_UART3 is not set
+CONFIG_KINETIS_UART4=y
+# CONFIG_KINETIS_UART5 is not set
+# CONFIG_KINETIS_ENET is not set
+# CONFIG_KINETIS_RNGB is not set
+# CONFIG_KINETIS_FLEXCAN0 is not set
+# CONFIG_KINETIS_FLEXCAN1 is not set
+# CONFIG_KINETIS_SPI0 is not set
+# CONFIG_KINETIS_SPI1 is not set
+# CONFIG_KINETIS_SPI2 is not set
+CONFIG_KINETIS_I2C0=y
+# CONFIG_KINETIS_I2C1 is not set
+# CONFIG_KINETIS_I2C2 is not set
+# CONFIG_KINETIS_I2C3 is not set
+# CONFIG_KINETIS_I2S is not set
+# CONFIG_KINETIS_DAC0 is not set
+# CONFIG_KINETIS_DAC1 is not set
+# CONFIG_KINETIS_ADC0 is not set
+# CONFIG_KINETIS_ADC1 is not set
+# CONFIG_KINETIS_CMP is not set
+# CONFIG_KINETIS_VREF is not set
+CONFIG_KINETIS_SDHC=y
+CONFIG_KINETIS_FTM0=y
+# CONFIG_KINETIS_FTM1 is not set
+# CONFIG_KINETIS_FTM2 is not set
+CONFIG_KINETIS_FTM3=y
+# CONFIG_KINETIS_LPTIMER is not set
+CONFIG_KINETIS_RTC=y
+# CONFIG_KINETIS_EWM is not set
+# CONFIG_KINETIS_CMT is not set
+# CONFIG_KINETIS_USBOTG is not set
+# CONFIG_KINETIS_USBDCD is not set
+# CONFIG_KINETIS_LLWU is not set
+# CONFIG_KINETIS_TSI is not set
+# CONFIG_KINETIS_FTFL is not set
+# CONFIG_KINETIS_DMA is not set
+# CONFIG_KINETIS_CRC is not set
+# CONFIG_KINETIS_PDB is not set
+# CONFIG_KINETIS_PIT is not set
+
+#
+# Kinetis FTM PWM Configuration
+#
+CONFIG_KINETIS_FTM0_PWM=y
+CONFIG_KINETIS_FTM0_CHANNEL=2
+CONFIG_KINETIS_FTM3_PWM=y
+CONFIG_KINETIS_FTM3_CHANNEL=1
+
+#
+# Kinetis GPIO Interrupt Configuration
+#
+CONFIG_KINETIS_GPIOIRQ=y
+CONFIG_KINETIS_PORTAINTS=y
+# CONFIG_KINETIS_PORTBINTS is not set
+# CONFIG_KINETIS_PORTCINTS is not set
+CONFIG_KINETIS_PORTDINTS=y
+# CONFIG_KINETIS_PORTEINTS is not set
+
+#
+# Kinetis SDHC Configuration
+#
+# CONFIG_KINETIS_SDHC_DMA is not set
+# CONFIG_KINETIS_SDHC_WIDTH_D1_ONLY is not set
+# CONFIG_KINETIS_SDHC_ABSFREQ is not set
+
+#
+# Kinetis UART Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+CONFIG_ARCH_HAVE_RAMFUNCS=y
+CONFIG_ARCH_RAMFUNCS=y
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=10016
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x1fff0000
+CONFIG_RAM_SIZE=262144
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_FREEDOM_K66F=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="freedom-k66f"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+CONFIG_ARCH_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+CONFIG_FRDMK66F_SDHC_AUTOMOUNT=y
+CONFIG_FRDMK66F_SDHC_AUTOMOUNT_FSTYPE="vfat"
+CONFIG_FRDMK66F_SDHC_AUTOMOUNT_BLKDEV="/dev/mmcsd0"
+CONFIG_FRDMK66F_SDHC_AUTOMOUNT_MOUNTPOINT="/mnt/sdcard"
+CONFIG_FRDMK66F_SDHC_AUTOMOUNT_DDELAY=1000
+CONFIG_FRDMK66F_SDHC_AUTOMOUNT_UDELAY=2000
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+CONFIG_BOARDCTL_RESET=y
+CONFIG_BOARDCTL_UNIQUEID=y
+CONFIG_BOARDCTL_UNIQUEID_SIZE=16
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_USEC_PER_TICK=1000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_SPINLOCK is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=32
+CONFIG_MAX_TASKS=16
+CONFIG_SCHED_HAVE_PARENT=y
+CONFIG_SCHED_CHILD_STATUS=y
+CONFIG_PREALLOC_CHILDSTATUS=2
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+CONFIG_PRIORITY_INHERITANCE=y
+CONFIG_SEM_PREALLOCHOLDERS=16
+CONFIG_SEM_NNESTPRIO=16
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCHLD=4
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=32
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+CONFIG_SCHED_LPWORK=y
+CONFIG_SCHED_LPNTHREADS=1
+CONFIG_SCHED_LPWORKPRIORITY=50
+CONFIG_SCHED_LPWORKPRIOMAX=176
+CONFIG_SCHED_LPWORKPERIOD=50000
+CONFIG_SCHED_LPWORKSTACKSIZE=2048
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+CONFIG_DEV_ZERO=y
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+CONFIG_PWM=y
+# CONFIG_ARCH_HAVE_I2CRESET is not set
+CONFIG_I2C=y
+# CONFIG_I2C_SLAVE is not set
+# CONFIG_I2C_POLLED is not set
+# CONFIG_I2C_TRACE is not set
+CONFIG_I2C_DRIVER=y
+# CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+CONFIG_RTC=y
+# CONFIG_RTC_DATETIME is not set
+CONFIG_RTC_HIRES=y
+CONFIG_RTC_FREQUENCY=1
+CONFIG_RTC_ALARM=y
+CONFIG_RTC_NALARMS=1
+CONFIG_RTC_DRIVER=y
+# CONFIG_RTC_IOCTL is not set
+# CONFIG_RTC_EXTERNAL is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_TIMERS_CS2100CP is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+CONFIG_INPUT=y
+# CONFIG_MOUSE is not set
+# CONFIG_INPUT_MAX11802 is not set
+# CONFIG_INPUT_TSC2007 is not set
+# CONFIG_INPUT_ADS7843E is not set
+# CONFIG_INPUT_MXT is not set
+# CONFIG_INPUT_STMPE811 is not set
+CONFIG_BUTTONS=y
+CONFIG_BUTTONS_LOWER=y
+CONFIG_BUTTONS_NPOLLWAITERS=2
+# CONFIG_DJOYSTICK is not set
+# CONFIG_AJOYSTICK is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+CONFIG_MMCSD=y
+CONFIG_MMCSD_NSLOTS=1
+# CONFIG_MMCSD_READONLY is not set
+CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
+CONFIG_MMCSD_MMCSUPPORT=y
+CONFIG_MMCSD_HAVECARDDETECT=y
+CONFIG_ARCH_HAVE_SDIO=y
+# CONFIG_SDIO_DMA is not set
+# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+CONFIG_MMCSD_SDIO=y
+# CONFIG_SDIO_PREFLIGHT is not set
+# CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
+# CONFIG_SDIO_BLOCKSETUP is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+CONFIG_UART4_SERIALDRIVER=y
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+CONFIG_UART1_SERIAL_CONSOLE=y
+# CONFIG_UART4_SERIAL_CONSOLE is not set
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# UART1 Configuration
+#
+CONFIG_UART1_RXBUFSIZE=256
+CONFIG_UART1_TXBUFSIZE=256
+CONFIG_UART1_BAUD=57600
+CONFIG_UART1_BITS=8
+CONFIG_UART1_PARITY=0
+CONFIG_UART1_2STOP=0
+# CONFIG_UART1_IFLOWCONTROL is not set
+# CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
+
+#
+# UART4 Configuration
+#
+CONFIG_UART4_RXBUFSIZE=256
+CONFIG_UART4_TXBUFSIZE=256
+CONFIG_UART4_BAUD=115200
+CONFIG_UART4_BITS=8
+CONFIG_UART4_PARITY=0
+CONFIG_UART4_2STOP=0
+# CONFIG_UART4_IFLOWCONTROL is not set
+# CONFIG_UART4_OFLOWCONTROL is not set
+# CONFIG_UART4_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+CONFIG_FS_AUTOMOUNTER=y
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_PSEUDOFS_SOFTLINKS is not set
+CONFIG_FS_READABLE=y
+CONFIG_FS_WRITABLE=y
+# CONFIG_FS_AIO is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+CONFIG_FS_FAT=y
+CONFIG_FAT_LCNAMES=y
+CONFIG_FAT_LFN=y
+CONFIG_FAT_MAXFNAME=32
+# CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
+# CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_REGISTER=y
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+
+#
+# Standard C I/O
+#
+# CONFIG_STDIO_DISABLE_BUFFERING is not set
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_LIBM is not set
+
+#
+# Architecture-Specific Support
+#
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
+
+#
+# stdlib Options
+#
+CONFIG_LIB_RAND_ORDER=1
+CONFIG_LIB_HOMEDIR="/"
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
+
+#
+# Program Execution Options
+#
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+
+#
+# errno Decode Support
+#
+CONFIG_LIBC_STRERROR=y
+# CONFIG_LIBC_STRERROR_SHORT is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+
+#
+# memcpy/memset Options
+#
+# CONFIG_MEMSET_OPTSPEED is not set
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+
+#
+# Time/Time Zone Support
+#
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_ARCH_HAVE_TLS=y
+
+#
+# Thread Local Storage (TLS)
+#
+# CONFIG_TLS is not set
+
+#
+# Network-Related Options
+#
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
+# CONFIG_LIBC_NETDB is not set
+
+#
+# NETDB Support
+#
+# CONFIG_NETDB_HOSTFILE is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_ALARM is not set
+CONFIG_EXAMPLES_BUTTONS=y
+CONFIG_EXAMPLES_BUTTONS_PRIORITY=100
+CONFIG_EXAMPLES_BUTTONS_STACKSIZE=2048
+CONFIG_EXAMPLES_BUTTONS_DEVPATH="/dev/buttons"
+CONFIG_EXAMPLES_BUTTONS_NAMES=y
+CONFIG_EXAMPLES_BUTTONS_QTD=2
+CONFIG_EXAMPLES_BUTTONS_NAME0="SW2"
+CONFIG_EXAMPLES_BUTTONS_NAME1="SW3"
+CONFIG_EXAMPLES_BUTTONS_NAME2="BUTTON2"
+CONFIG_EXAMPLES_BUTTONS_NAME3="BUTTON3"
+CONFIG_EXAMPLES_BUTTONS_NAME4="BUTTON4"
+CONFIG_EXAMPLES_BUTTONS_NAME5="BUTTON5"
+CONFIG_EXAMPLES_BUTTONS_NAME6="BUTTON6"
+CONFIG_EXAMPLES_BUTTONS_NAME7="BUTTON7"
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+CONFIG_EXAMPLES_PWM=y
+CONFIG_EXAMPLES_PWM_DEVPATH="/dev/pwm0"
+CONFIG_EXAMPLES_PWM_FREQUENCY=100
+CONFIG_EXAMPLES_PWM_DURATION=5
+CONFIG_EXAMPLES_PWM_DUTYPCT=50
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_STAT is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+# CONFIG_NSH_DISABLE_DATE is not set
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFATFS is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+# CONFIG_NSH_DISABLE_PRINTF is not set
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PSSTACKUSAGE is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_REBOOT is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+CONFIG_NSH_DISABLE_SHUTDOWN=y
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_STRERROR=y
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+CONFIG_SYSTEM_I2CTOOL=y
+CONFIG_I2CTOOL_MINBUS=0
+CONFIG_I2CTOOL_MAXBUS=3
+CONFIG_I2CTOOL_MINADDR=0x03
+CONFIG_I2CTOOL_MAXADDR=0x77
+CONFIG_I2CTOOL_MAXREGADDR=0xff
+CONFIG_I2CTOOL_DEFFREQ=400000
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_READLINE_MAX_BUILTINS=64
+CONFIG_READLINE_MAX_EXTCMDS=64
+CONFIG_READLINE_CMD_HISTORY=y
+CONFIG_READLINE_CMD_HISTORY_LINELEN=80
+CONFIG_READLINE_CMD_HISTORY_LEN=16
+# CONFIG_SYSTEM_STACKMONITOR is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f746g-disco/knsh/setenv.sh b/configs/freedom-k66f/nsh/setenv.sh
old mode 100755
new mode 100644
similarity index 97%
rename from configs/stm32f746g-disco/knsh/setenv.sh
rename to configs/freedom-k66f/nsh/setenv.sh
index 38d86c72e5a26662d63f67444c46a2615d7286d7..be3f2856cdd29e959d6650b361e65e1df99fcc29
--- a/configs/stm32f746g-disco/knsh/setenv.sh
+++ b/configs/freedom-k66f/nsh/setenv.sh
@@ -1,7 +1,7 @@
 #!/bin/bash
-# configs/stm32f746g-disco/knsh/setenv.sh
+# configs/freedom-k66f/nsh/setenv.sh
 #
-#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
diff --git a/configs/freedom-k66f/scripts/flash.ld b/configs/freedom-k66f/scripts/flash.ld
new file mode 100644
index 0000000000000000000000000000000000000000..ca8fcc34054f67736e7ae0de354c45a6da69a21f
--- /dev/null
+++ b/configs/freedom-k66f/scripts/flash.ld
@@ -0,0 +1,139 @@
+/****************************************************************************
+ * configs/freedom-k66f/scripts/flash.ld
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane  
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* The MK66FN2M0VMD18 has 2M of FLASH beginning at address 0x0000:0000 and
+ * 256Kb of SRAM beginning at address 0x1fff:0000 (SRAM_L)(64Kb) and 
+ * 0x2000:0000 (SRAM_U) (192Kb).
+ *
+ * NOTE: that the first part of the K66 FLASH region is reserved for
+ * interrupt vectflash and, following that, is a region from 0x0000:0400
+ * to 0x0000:040f that is reserved for the FLASH control fields (FCF).
+ */
+
+MEMORY
+{
+	vectflash  (rx)  : ORIGIN = 0x00000000, LENGTH = 1K
+	cfmprotect (rx)  : ORIGIN = 0x00000400, LENGTH = 16
+	progflash  (rx)  : ORIGIN = 0x00000410, LENGTH = 2M - (1K + 16)
+	datasram  (rwx)  : ORIGIN = 0x1fff0000, LENGTH = 256K
+}
+
+OUTPUT_ARCH(arm)
+ENTRY(_stext)
+EXTERN(__flashconfigbytes)
+SECTIONS
+{
+	.vectors : {
+		_svectors = ABSOLUTE(.);
+		*(.vectors)
+		_evectors = ABSOLUTE(.);
+	} > vectflash
+
+	.cfmprotect : {
+		KEEP(*(.cfmconfig))
+	} > cfmprotect
+
+	.text : {
+		_stext = ABSOLUTE(.);
+		*(.text .text.*)
+		*(.fixup)
+		*(.gnu.warning)
+		*(.rodata .rodata.*)
+		*(.gnu.linkonce.t.*)
+		*(.glue_7)
+		*(.glue_7t)
+		*(.got)
+		*(.gcc_except_table)
+		*(.gnu.linkonce.r.*)
+		_etext = ABSOLUTE(.);
+	} > progflash
+
+	.init_section : {
+		_sinit = ABSOLUTE(.);
+		*(.init_array .init_array.*)
+		_einit = ABSOLUTE(.);
+	} > progflash
+
+	.ARM.extab : {
+		*(.ARM.extab*)
+	} > progflash
+
+	__exidx_start = ABSOLUTE(.);
+	.ARM.exidx : {
+		*(.ARM.exidx*)
+	} > progflash
+	__exidx_end = ABSOLUTE(.);
+
+	.data : {
+		_sdata = ABSOLUTE(.);
+		*(.data .data.*)
+		*(.gnu.linkonce.d.*)
+		CONSTRUCTORS
+		_edata = ABSOLUTE(.);
+	} > datasram AT > progflash
+
+	_eronly = LOADADDR(.data);
+
+	.ramfunc ALIGN(4): {
+		_sramfuncs = ABSOLUTE(.);
+		*(.ramfunc  .ramfunc.*)
+		_eramfuncs = ABSOLUTE(.);
+	} > datasram AT > progflash
+
+	_framfuncs = LOADADDR(.ramfunc);
+
+	.bss : {
+		_sbss = ABSOLUTE(.);
+		*(.bss .bss.*)
+		*(.gnu.linkonce.b.*)
+		*(COMMON)
+		_ebss = ABSOLUTE(.);
+	} > datasram
+
+	/* Stabs debugging sections. */
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_info 0 : { *(.debug_info) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/freedom-k66f/src/Makefile b/configs/freedom-k66f/src/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..bf4e0e6be1d3881d6f2a3d2f464e30de45921130
--- /dev/null
+++ b/configs/freedom-k66f/src/Makefile
@@ -0,0 +1,85 @@
+############################################################################
+# configs/freedom-k66f/src/Makefile
+#
+#   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#           David Sidrane 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+ASRCS =
+CSRCS = k66_boot.c k66_spi.c
+
+ifeq ($(CONFIG_ARCH_LEDS),y)
+CSRCS += k66_autoleds.c
+else
+CSRCS += k66_userleds.c
+endif
+
+ifeq ($(CONFIG_ARCH_BUTTONS),y)
+CSRCS += k66_buttons.c
+endif
+
+ifeq ($(CONFIG_LIB_BOARDCTL),y)
+CSRCS += k66_appinit.c k66_bringup.c
+else ifeq ($(CONFIG_BOARD_INITIALIZE),y)
+CSRCS += k66_bringup.c
+endif
+
+ifeq ($(CONFIG_KINETIS_SDHC),y)
+CSRCS += k66_sdhc.c
+ifeq ($(CONFIG_FS_AUTOMOUNTER),y)
+CSRCS += k66_automount.c
+endif
+endif
+
+ifeq ($(CONFIG_KINETIS_RTC),y)
+CSRCS += k66_rtc.c
+endif
+
+ifeq ($(CONFIG_USBDEV),y)
+CSRCS += k66_usbdev.c
+endif
+
+ifeq ($(CONFIG_USBMSC),y)
+CSRCS += k66_usbmsc.c
+endif
+
+ifeq ($(CONFIG_PWM),y)
+CSRCS += k66_pwm.c
+endif
+
+ifeq ($(CONFIG_BOARDCTL_UNIQUEID),y)
+CSRCS += k66_uid.c
+endif
+
+include $(TOPDIR)/configs/Board.mk
diff --git a/configs/freedom-k66f/src/freedom-k66f.h b/configs/freedom-k66f/src/freedom-k66f.h
new file mode 100644
index 0000000000000000000000000000000000000000..245c48049316f93e5dffd7202a2d4bd6b7f1e9f7
--- /dev/null
+++ b/configs/freedom-k66f/src/freedom-k66f.h
@@ -0,0 +1,378 @@
+/************************************************************************************
+ * configs/freedom-k66f/src/freedom-k66f.h
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __CONFIGS_FREEDOM_K66F_SRC_FREEDOM_K66F_H
+#define __CONFIGS_FREEDOM_K66F_SRC_FREEDOM_K66F_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include 
+#include 
+#include 
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Application Configuration ********************************************************/
+
+/* Assume we have everything */
+
+#define HAVE_PROC        1
+#define HAVE_MMCSD       1
+#define HAVE_AUTOMOUNTER 1
+#define HAVE_USBDEV      1
+
+#if defined(CONFIG_KINETIS_RTC)
+#define HAVE_RTC_DRIVER  1
+#endif
+
+/* Automount procfs */
+
+#if !defined(CONFIG_FS_PROCFS)
+#  undef HAVE_PROC
+#endif
+
+#if defined(HAVE_PROC) && defined(CONFIG_DISABLE_MOUNTPOINT)
+#  warning Mountpoints disabled.  No procfs support
+#  undef HAVE_PROC
+#endif
+
+#if defined(CONFIG_NSH_PROC_MOUNTPOINT)
+#  define PROCFS_MOUNTPOUNT CONFIG_NSH_PROC_MOUNTPOINT
+#else
+#  define PROCFS_MOUNTPOUNT "/proc"
+#endif
+
+/* SD card support */
+
+#define MMCSD_SLOTNO 0
+
+/* Can't support MMC/SD features if mountpoints are disabled or if SDHC support
+ * is not enabled.
+ */
+
+#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_KINETIS_SDHC)
+#  undef HAVE_MMCSD
+#endif
+
+#ifdef HAVE_MMCSD
+#  if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != 0
+#    error Only one MMC/SD slot, slot 0
+#  endif
+
+#  ifdef CONFIG_NSH_MMCSDMINOR
+#    define MMSCD_MINOR CONFIG_NSH_MMCSDMINOR
+#  else
+#    define MMSCD_MINOR 0
+#  endif
+
+/* We expect to receive GPIO interrupts for card insertion events */
+
+#  ifndef CONFIG_KINETIS_GPIOIRQ
+#    error "CONFIG_KINETIS_GPIOIRQ required for card detect interrupt"
+#  endif
+
+#  ifndef CONFIG_KINETIS_PORTDINTS
+#    error "CONFIG_KINETIS_PORTDINTS required for card detect interrupt"
+#  endif
+
+#endif
+
+/* Automounter */
+
+#if !defined(CONFIG_FS_AUTOMOUNTER) || !defined(HAVE_MMCSD)
+#  undef HAVE_AUTOMOUNTER
+#  undef CONFIG_FRDMK66F_SDHC_AUTOMOUNT
+#endif
+
+#ifndef CONFIG_FRDMK66F_SDHC_AUTOMOUNT
+#  undef HAVE_AUTOMOUNTER
+#endif
+
+/* Automounter defaults */
+
+#ifdef HAVE_AUTOMOUNTER
+
+#  ifndef CONFIG_FRDMK66F_SDHC_AUTOMOUNT_FSTYPE
+#    define CONFIG_FRDMK66F_SDHC_AUTOMOUNT_FSTYPE "vfat"
+#  endif
+
+#  ifndef CONFIG_FRDMK66F_SDHC_AUTOMOUNT_BLKDEV
+#    define CONFIG_FRDMK66F_SDHC_AUTOMOUNT_BLKDEV "/dev/mmcds0"
+#  endif
+
+#  ifndef CONFIG_FRDMK66F_SDHC_AUTOMOUNT_MOUNTPOINT
+#    define CONFIG_FRDMK66F_SDHC_AUTOMOUNT_MOUNTPOINT "/mnt/sdcard"
+#  endif
+
+#  ifndef CONFIG_FRDMK66F_SDHC_AUTOMOUNT_DDELAY
+#    define CONFIG_FRDMK66F_SDHC_AUTOMOUNT_DDELAY 1000
+#  endif
+
+#  ifndef CONFIG_FRDMK66F_SDHC_AUTOMOUNT_UDELAY
+#    define CONFIG_FRDMK66F_SDHC_AUTOMOUNT_UDELAY 2000
+#  endif
+#endif /* HAVE_AUTOMOUNTER */
+
+/* Can't support USB features if USB is not enabled */
+
+#ifndef CONFIG_USBDEV
+#  undef HAVE_USBDEV
+#endif
+
+/* How many SPI modules does this chip support? The LM3S6918 supports 2 SPI
+ * modules (others may support more -- in such case, the following must be
+ * expanded).
+ */
+
+#if KINETIS_NSPI < 1
+#  undef CONFIG_KINETIS_SPI0
+#  undef CONFIG_KINETIS_SPI1
+#  undef CONFIG_KINETIS_SPI2
+#elif KINETIS_NSPI < 2
+#  undef CONFIG_KINETIS_SPI1
+#  undef CONFIG_KINETIS_SPI2
+#elif KINETIS_NSPI < 3
+#  undef CONFIG_KINETIS_SPI2
+#endif
+
+/* FREEDOM-K66F GPIOs ****************************************************************/
+/* A micro Secure Digital (SD) card slot is available on the FRDM-K66F connected to
+ * the SD Host Controller (SDHC) signals of the MCU. This slot will accept micro
+ * format SD memory cards. The SD card detect pin (PTD10) is an open switch that
+ * shorts with VDD when card is inserted.
+ *
+ *   ------------ ------------- --------
+ *    SD Card Slot Board Signal  K66F Pin
+ *    ------------ ------------- --------
+ *    DAT0         SDHC0_D0      PTE1
+ *    DAT1         SDHC0_D1      PTE0
+ *    DAT2         SDHC0_D2      PTE5
+ *    CD/DAT3      SDHC0_D3      PTE4
+ *    CMD          SDHC0_CMD     PTE3
+ *    CLK          SDHC0_DCLK    PTE2
+ *    SWITCH       D_CARD_DETECT PTD10
+ *    ------------ ------------- --------
+ *
+ * There is no Write Protect pin available to the K66F.
+ */
+
+#define GPIO_SD_CARDDETECT (GPIO_PULLDOWN | PIN_INT_BOTH | PIN_PORTD | PIN10)
+
+/* Two push buttons, SW2 and SW3, are available on FRDM-K66F board, where SW2 is
+ * connected to PTC6 and SW3 is connected to PTA4. Besides the general purpose
+ * input/output functions, SW2 and SW3 can be low-power wake up signal. Also, only
+ * SW3 can be a non-maskable interrupt.
+ *
+ *   Switch    GPIO Function
+ *   --------- ---------------------------------------------------------------
+ *   SW2       PTD11/LLWU_P25/SPI2_PCS0/SDHC0_CLKIN/LPUART0_CTS/FB_A19
+ *   SW3       PTA10/LLWU_P22/FTM2_CH0/MII0_RXD2/FTM2_QD_PHA/TPM2_CH0/TRACE_D0
+ */
+
+#define GPIO_SW2           (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTD | PIN11)
+#define GPIO_SW3           (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTA | PIN10)
+
+/* An RGB LED is connected through GPIO as shown below:
+ *
+ *   LED    K66
+ *   ------ -------------------------------------------------------
+ *   RED    PTC9/ADC1_SE5B/CMP0_IN3/FTM3_CH5/I2S0_RX_BCLK/FB_AD6/SDRAM_A14/FTM_FLT0
+ *   GREEN  PTE6/LLWU_P16/SPI1_PCS3/UART3_CTS/I2S0_MCLK/FTM3_CH1/USB0_SOF_OUT
+ *   BLUE   PTA11/LLWU_P23/FTM2_CH1/MII0_RXCLK/I2C2_SDA/FTM2_QD_PHB/TPM2_CH1
+ */
+
+#define GPIO_LED_R         (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTC | PIN9)
+#define GPIO_LED_G         (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTE | PIN6)
+#define GPIO_LED_B         (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTA | PIN11)
+
+/************************************************************************************
+ * Public data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: k66_spidev_initialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins for the FREEDOM-K66F board.
+ *
+ ************************************************************************************/
+
+void weak_function k66_spidev_initialize(void);
+
+/************************************************************************************
+ * Name: k66_rtc_initialize
+ *
+ * Description:
+ *   Called to initialize the RTC FREEDOM-K66F board.
+ *
+ ************************************************************************************/
+
+#if defined(HAVE_RTC_DRIVER)
+int k66_rtc_initialize(void);
+#else
+#  define k66_rtc_initialize() (OK)
+#endif
+/************************************************************************************
+ * Name: k66_usbinitialize
+ *
+ * Description:
+ *   Called to setup USB-related GPIO pins for the FREEDOM-K66F board.
+ *
+ ************************************************************************************/
+
+void weak_function k66_usbinitialize(void);
+
+/************************************************************************************
+ * Name: k66_bringup
+ *
+ * Description:
+ *   Bring up board features
+ *
+ ************************************************************************************/
+
+#if defined(CONFIG_LIB_BOARDCTL) || defined(CONFIG_BOARD_INITIALIZE)
+int k66_bringup(void);
+#endif
+
+/****************************************************************************
+ * Name: k66_sdhc_initialize
+ *
+ * Description:
+ *   Inititialize the SDHC SD card slot
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_MMCSD
+int k66_sdhc_initialize(void);
+#else
+#  define k66_sdhc_initialize() (OK)
+#endif
+
+/************************************************************************************
+ * Name: k66_cardinserted
+ *
+ * Description:
+ *   Check if a card is inserted into the SDHC slot
+ *
+ ************************************************************************************/
+
+#ifdef HAVE_AUTOMOUNTER
+bool k66_cardinserted(void);
+#else
+#  define k66_cardinserted() (false)
+#endif
+
+/************************************************************************************
+ * Name: k66_writeprotected
+ *
+ * Description:
+ *   Check if the card in the MMC/SD slot is write protected
+ *
+ ************************************************************************************/
+
+#ifdef HAVE_AUTOMOUNTER
+bool k66_writeprotected(void);
+#else
+#  define k66_writeprotected() (false)
+#endif
+
+/************************************************************************************
+ * Name:  k66_automount_initialize
+ *
+ * Description:
+ *   Configure auto-mounter for the configured SDHC slot
+ *
+ * Input Parameters:
+ *   None
+ *
+ *  Returned Value:
+ *    None
+ *
+ ************************************************************************************/
+
+#ifdef HAVE_AUTOMOUNTER
+void k66_automount_initialize(void);
+#endif
+
+/************************************************************************************
+ * Name:  k66_automount_event
+ *
+ * Description:
+ *   The SDHC card detection logic has detected an insertion or removal event.  It
+ *   has already scheduled the MMC/SD block driver operations.  Now we need to
+ *   schedule the auto-mount event which will occur with a substantial delay to make
+ *   sure that everything has settle down.
+ *
+ * Input Parameters:
+ *   inserted - True if the card is inserted in the slot.  False otherwise.
+ *
+ *  Returned Value:
+ *    None
+ *
+ *  Assumptions:
+ *    Interrupts are disabled.
+ *
+ ************************************************************************************/
+
+#ifdef HAVE_AUTOMOUNTER
+void k66_automount_event(bool inserted);
+#endif
+
+/************************************************************************************
+ * Name: k66_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PWM
+int k66_pwm_setup(void);
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __CONFIGS_FREEDOM_K66F_SRC_FREEDOM_K66F_H */
diff --git a/configs/freedom-k66f/src/k66_appinit.c b/configs/freedom-k66f/src/k66_appinit.c
new file mode 100644
index 0000000000000000000000000000000000000000..1a31c331343fe010674c7ea5b823c919f632436f
--- /dev/null
+++ b/configs/freedom-k66f/src/k66_appinit.c
@@ -0,0 +1,91 @@
+/****************************************************************************
+ * config/freedom-k66f/src/k66_appinit.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+
+#include "freedom-k66f.h"
+
+#ifdef CONFIG_LIB_BOARDCTL
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ *   Perform application specific initialization.  This function is never
+ *   called directly from application code, but only indirectly via the
+ *   (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ *   arg - The boardctl() argument is passed to the board_app_initialize()
+ *         implementation without modification.  The argument has no
+ *         meaning to NuttX; the meaning of the argument is a contract
+ *         between the board-specific initalization logic and the the
+ *         matching application logic.  The value cold be such things as a
+ *         mode enumeration value, a set of DIP switch switch settings, a
+ *         pointer to configuration data read from a file or serial FLASH,
+ *         or whatever you would like to do with it.  Every implementation
+ *         should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+int board_app_initialize(uintptr_t arg)
+{
+#ifndef CONFIG_BOARD_INITIALIZE
+  /* Perform board initialization */
+
+  return k66_bringup();
+#else
+  return OK;
+#endif
+}
+
+#endif /* CONFIG_LIB_BOARDCTL */
diff --git a/configs/freedom-k66f/src/k66_autoleds.c b/configs/freedom-k66f/src/k66_autoleds.c
new file mode 100644
index 0000000000000000000000000000000000000000..bea52ceb9820cc57e08984f73cf31a7799a6ab33
--- /dev/null
+++ b/configs/freedom-k66f/src/k66_autoleds.c
@@ -0,0 +1,164 @@
+/****************************************************************************
+ * configs/freedom-k66f/src/k66_autoleds.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+/* The Freedom K66F has a single RGB LED driven by the K66F as follows:
+ *
+ *   LED    K66
+ *   ------ -------------------------------------------------------
+ *   RED    PTB22/SPI2_SOUT/FB_AD29/CMP2_OUT
+ *   BLUE   PTB21/SPI2_SCK/FB_AD30/CMP1_OUT
+ *   GREEN  PTE26/ENET_1588_CLKIN/UART4_CTS_b/RTC_CLKOUT/USB0_CLKIN
+ *
+ *
+ * If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board
+ * the Freedom K66F.  The following definitions describe how NuttX controls
+ * the LEDs:
+ *
+ *   SYMBOL                Meaning                 LED state
+ *                                                 RED   GREEN  BLUE
+ *   -------------------  -----------------------  -----------------
+ *   LED_STARTED          NuttX has been started    OFF  OFF  OFF
+ *   LED_HEAPALLOCATE     Heap has been allocated   OFF  OFF  ON
+ *   LED_IRQSENABLED      Interrupts enabled        OFF  OFF  ON
+ *   LED_STACKCREATED     Idle stack created        OFF  ON   OFF
+ *   LED_INIRQ            In an interrupt          (no change)
+ *   LED_SIGNAL           In a signal handler      (no change)
+ *   LED_ASSERTION        An assertion failed      (no change)
+ *   LED_PANIC            The system has crashed    FLASH OFF OFF
+ *   LED_IDLE             K66 is in sleep mode     (Optional, not used)
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "chip.h"
+#include "kinetis.h"
+#include "freedom-k66f.h"
+
+#ifdef CONFIG_ARCH_LEDS
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Summary of all possible settings */
+
+#define LED_NOCHANGE      0 /* LED_IRQSENABLED, LED_INIRQ, LED_SIGNAL, LED_ASSERTION */
+#define LED_OFF_OFF_OFF   1 /* LED_STARTED */
+#define LED_OFF_OFF_ON    2 /* LED_HEAPALLOCATE */
+#define LED_OFF_ON_OFF    3 /* LED_STACKCREATED */
+#define LED_ON_OFF_OFF    4 /* LED_PANIC */
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_autoled_initialize
+ *
+ * Description:
+ *   Initialize the on-board LED
+ *
+ ****************************************************************************/
+
+void board_autoled_initialize(void)
+{
+  kinetis_pinconfig(GPIO_LED_R);
+  kinetis_pinconfig(GPIO_LED_G);
+  kinetis_pinconfig(GPIO_LED_B);
+}
+
+/****************************************************************************
+ * Name: board_autoled_on
+ ****************************************************************************/
+
+void board_autoled_on(int led)
+{
+  if (led != LED_NOCHANGE)
+    {
+      bool redoff   = true;
+      bool greenoff = true;
+      bool blueoff  = true;
+
+      switch (led)
+        {
+          default:
+          case LED_OFF_OFF_OFF:
+            break;
+
+          case LED_OFF_OFF_ON:
+            blueoff = false;
+            break;
+
+          case LED_OFF_ON_OFF:
+            greenoff = false;
+            break;
+
+          case LED_ON_OFF_OFF:
+            redoff = false;
+            break;
+        }
+
+      kinetis_gpiowrite(GPIO_LED_R, redoff);
+      kinetis_gpiowrite(GPIO_LED_G, greenoff);
+      kinetis_gpiowrite(GPIO_LED_B, blueoff);
+    }
+}
+
+/****************************************************************************
+ * Name: board_autoled_off
+ ****************************************************************************/
+
+void board_autoled_off(int led)
+{
+  if (led == LED_ON_OFF_OFF)
+    {
+      kinetis_gpiowrite(GPIO_LED_R, true);
+      kinetis_gpiowrite(GPIO_LED_G, true);
+      kinetis_gpiowrite(GPIO_LED_B, true);
+    }
+}
+
+#endif /* CONFIG_ARCH_LEDS */
diff --git a/configs/freedom-k66f/src/k66_automount.c b/configs/freedom-k66f/src/k66_automount.c
new file mode 100644
index 0000000000000000000000000000000000000000..fbbe80b72e61ab98175d9874d5651bd7fffc16f5
--- /dev/null
+++ b/configs/freedom-k66f/src/k66_automount.c
@@ -0,0 +1,323 @@
+/************************************************************************************
+ * configs/freedom-k66f/src/k66_automount.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#if defined(CONFIG_FS_AUTOMOUNTER_DEBUG) && !defined(CONFIG_DEBUG_FS)
+#  define CONFIG_DEBUG_FS 1
+#endif
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include "freedom-k66f.h"
+
+#ifdef HAVE_AUTOMOUNTER
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#ifndef NULL
+#  define NULL (FAR void *)0
+#endif
+
+#ifndef OK
+#  define OK 0
+#endif
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+/* This structure represents the changeable state of the automounter */
+
+struct k66_automount_state_s
+{
+  volatile automount_handler_t handler;    /* Upper half handler */
+  FAR void *arg;                           /* Handler argument */
+  bool enable;                             /* Fake interrupt enable */
+  bool pending;                            /* Set if there an event while disabled */
+};
+
+/* This structure represents the static configuration of an automounter */
+
+struct k66_automount_config_s
+{
+  /* This must be first thing in structure so that we can simply cast from struct
+   * automount_lower_s to struct k66_automount_config_s
+   */
+
+  struct automount_lower_s lower;          /* Publicly visible part */
+  FAR struct k66_automount_state_s *state; /* Changeable state */
+};
+
+/************************************************************************************
+ * Private Function Prototypes
+ ************************************************************************************/
+
+static int  k66_attach(FAR const struct automount_lower_s *lower,
+                       automount_handler_t isr, FAR void *arg);
+static void k66_enable(FAR const struct automount_lower_s *lower, bool enable);
+static bool k66_inserted(FAR const struct automount_lower_s *lower);
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+static struct k66_automount_state_s g_sdhc_state;
+static const struct k66_automount_config_s g_sdhc_config =
+{
+  .lower        =
+  {
+    .fstype     = CONFIG_FRDMK66F_SDHC_AUTOMOUNT_FSTYPE,
+    .blockdev   = CONFIG_FRDMK66F_SDHC_AUTOMOUNT_BLKDEV,
+    .mountpoint = CONFIG_FRDMK66F_SDHC_AUTOMOUNT_MOUNTPOINT,
+    .ddelay     = MSEC2TICK(CONFIG_FRDMK66F_SDHC_AUTOMOUNT_DDELAY),
+    .udelay     = MSEC2TICK(CONFIG_FRDMK66F_SDHC_AUTOMOUNT_UDELAY),
+    .attach     = k66_attach,
+    .enable     = k66_enable,
+    .inserted   = k66_inserted
+  },
+  .state        = &g_sdhc_state
+};
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name:  k66_attach
+ *
+ * Description:
+ *   Attach a new SDHC event handler
+ *
+ * Input Parameters:
+ *   lower - An instance of the auto-mounter lower half state structure
+ *   isr   - The new event handler to be attach
+ *   arg   - Client data to be provided when the event handler is invoked.
+ *
+ *  Returned Value:
+ *    Always returns OK
+ *
+ ************************************************************************************/
+
+static int k66_attach(FAR const struct automount_lower_s *lower,
+                      automount_handler_t isr, FAR void *arg)
+{
+  FAR const struct k66_automount_config_s *config;
+  FAR struct k66_automount_state_s *state;
+
+  /* Recover references to our structure */
+
+  config = (FAR struct k66_automount_config_s *)lower;
+  DEBUGASSERT(config != NULL && config->state != NULL);
+
+  state = config->state;
+
+  /* Save the new handler info (clearing the handler first to eliminate race
+   * conditions).
+   */
+
+  state->handler = NULL;
+  state->pending = false;
+  state->arg     = arg;
+  state->handler = isr;
+  return OK;
+}
+
+/************************************************************************************
+ * Name:  k66_enable
+ *
+ * Description:
+ *   Enable card insertion/removal event detection
+ *
+ * Input Parameters:
+ *   lower - An instance of the auto-mounter lower half state structure
+ *   enable - True: enable event detection; False: disable
+ *
+ *  Returned Value:
+ *    None
+ *
+ ************************************************************************************/
+
+static void k66_enable(FAR const struct automount_lower_s *lower, bool enable)
+{
+  FAR const struct k66_automount_config_s *config;
+  FAR struct k66_automount_state_s *state;
+  irqstate_t flags;
+
+  /* Recover references to our structure */
+
+  config = (FAR struct k66_automount_config_s *)lower;
+  DEBUGASSERT(config != NULL && config->state != NULL);
+
+  state = config->state;
+
+  /* Save the fake enable setting */
+
+  flags = enter_critical_section();
+  state->enable = enable;
+
+  /* Did an interrupt occur while interrupts were disabled? */
+
+  if (enable && state->pending)
+    {
+      /* Yes.. perform the fake interrupt if the interrutp is attached */
+
+      if (state->handler)
+        {
+          bool inserted = k66_cardinserted();
+          (void)state->handler(&config->lower, state->arg, inserted);
+        }
+
+      state->pending = false;
+    }
+
+  leave_critical_section(flags);
+}
+
+/************************************************************************************
+ * Name: k66_inserted
+ *
+ * Description:
+ *   Check if a card is inserted into the slot.
+ *
+ * Input Parameters:
+ *   lower - An instance of the auto-mounter lower half state structure
+ *
+ *  Returned Value:
+ *    True if the card is inserted; False otherwise
+ *
+ ************************************************************************************/
+
+static bool k66_inserted(FAR const struct automount_lower_s *lower)
+{
+  return k66_cardinserted();
+}
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name:  k66_automount_initialize
+ *
+ * Description:
+ *   Configure auto-mounters for each enable and so configured SDHC
+ *
+ * Input Parameters:
+ *   None
+ *
+ *  Returned Value:
+ *    None
+ *
+ ************************************************************************************/
+
+void k66_automount_initialize(void)
+{
+  FAR void *handle;
+
+  finfo("Initializing automounter(s)\n");
+
+  /* Initialize the SDHC0 auto-mounter */
+
+  handle = automount_initialize(&g_sdhc_config.lower);
+  if (!handle)
+    {
+      ferr("ERROR: Failed to initialize auto-mounter for SDHC0\n");
+    }
+}
+
+/************************************************************************************
+ * Name:  k66_automount_event
+ *
+ * Description:
+ *   The SDHC card detection logic has detected an insertion or removal event.  It
+ *   has already scheduled the MMC/SD block driver operations.  Now we need to
+ *   schedule the auto-mount event which will occur with a substantial delay to make
+ *   sure that everything has settle down.
+ *
+ * Input Parameters:
+ *   slotno - Identifies the SDHC0 slot: SDHC0_SLOTNO or SDHC1_SLOTNO.  There is a
+ *      terminology problem here:  Each SDHC supports two slots, slot A and slot B.
+ *      Only slot A is used.  So this is not a really a slot, but an HSCMI peripheral
+ *      number.
+ *   inserted - True if the card is inserted in the slot.  False otherwise.
+ *
+ *  Returned Value:
+ *    None
+ *
+ *  Assumptions:
+ *    Interrupts are disabled.
+ *
+ ************************************************************************************/
+
+void k66_automount_event(bool inserted)
+{
+  FAR const struct k66_automount_config_s *config = &g_sdhc_config;
+  FAR struct k66_automount_state_s *state = &g_sdhc_state;
+
+  /* Is the auto-mounter interrupt attached? */
+
+  if (state->handler)
+    {
+      /* Yes.. Have we been asked to hold off interrupts? */
+
+      if (!state->enable)
+        {
+          /* Yes.. just remember the there is a pending interrupt. We will
+           * deliver the interrupt when interrupts are "re-enabled."
+           */
+
+          state->pending = true;
+        }
+      else
+        {
+          /* No.. forward the event to the handler */
+
+          (void)state->handler(&config->lower, state->arg, inserted);
+        }
+    }
+}
+
+#endif /* HAVE_AUTOMOUNTER */
diff --git a/configs/freedom-k66f/src/k66_boot.c b/configs/freedom-k66f/src/k66_boot.c
new file mode 100644
index 0000000000000000000000000000000000000000..2f27dcf2a5d2b424c43b9a4bb220b49051d72865
--- /dev/null
+++ b/configs/freedom-k66f/src/k66_boot.c
@@ -0,0 +1,119 @@
+/************************************************************************************
+ * configs/freedom-k66f/src/k66_boot.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+
+#include "up_arch.h"
+#include "freedom-k66f.h"
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: kinetis_boardinitialize
+ *
+ * Description:
+ *   All Kinetis architectures must provide the following entry point.  This entry
+ *   point is called early in the initialization -- after all memory has been
+ *   configured and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void kinetis_boardinitialize(void)
+{
+#ifdef CONFIG_ARCH_LEDS
+  /* Configure on-board LEDs if LED support has been selected. */
+
+  board_autoled_initialize();
+#endif
+#if defined(CONFIG_KINETIS_SPI0) || defined(CONFIG_KINETIS_SPI1) || \
+	defined(CONFIG_KINETIS_SPI2)
+  /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
+   * k66_spidev_initialize() has been brought into the link.
+   */
+
+  if (k66_spidev_initialize)
+    {
+      k66_spidev_initialize();
+    }
+#endif
+
+#if defined(CONFIG_USBDEV) && defined(CONFIG_KINETIS_USB)
+   /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
+    * disabled, and 3) the weak function k66_usbinitialize() has been brought
+    * into the build.
+    */
+
+  if (k66_usbinitialize)
+    {
+      k66_usbinitialize();
+    }
+#endif
+
+}
+
+/****************************************************************************
+ * Name: board_initialize
+ *
+ * Description:
+ *   If CONFIG_BOARD_INITIALIZE is selected, then an additional
+ *   initialization call will be performed in the boot-up sequence to a
+ *   function called board_initialize().  board_initialize() will be
+ *   called immediately after up_intitialize() is called and just before the
+ *   initial application is started.  This additional initialization phase
+ *   may be used, for example, to initialize board-specific device drivers.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BOARD_INITIALIZE
+void board_initialize(void)
+{
+  /* Perform board initialization */
+
+  (void)k66_bringup();
+}
+#endif /* CONFIG_BOARD_INITIALIZE */
+
diff --git a/configs/freedom-k66f/src/k66_bringup.c b/configs/freedom-k66f/src/k66_bringup.c
new file mode 100644
index 0000000000000000000000000000000000000000..4ec736516aebcfd2ddc7dfc6b28a35c008dd4990
--- /dev/null
+++ b/configs/freedom-k66f/src/k66_bringup.c
@@ -0,0 +1,158 @@
+/****************************************************************************
+ * config/freedom-k66f/src/k66_bringup.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "freedom-k66f.h"
+
+#if defined(CONFIG_LIB_BOARDCTL) || defined(CONFIG_BOARD_INITIALIZE)
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: k66_bringup
+ *
+ * Description:
+ *   Bring up board features
+ *
+ ****************************************************************************/
+
+int k66_bringup(void)
+{
+  int ret;
+
+#ifdef HAVE_PROC
+  /* Mount the proc filesystem */
+
+  syslog(LOG_INFO, "Mounting procfs to /proc\n");
+
+  ret = mount(NULL, PROCFS_MOUNTPOUNT, "procfs", 0, NULL);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to mount the PROC filesystem: %d (%d)\n",
+             ret, errno);
+      return ret;
+    }
+#endif
+
+#ifdef HAVE_MMCSD
+  /* Initialize the SDHC driver */
+
+  ret = k66_sdhc_initialize();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: k66_sdhc_initialize() failed: %d\n", ret);
+    }
+
+#  ifdef CONFIG_FRDMK66F_SDHC_MOUNT
+  else
+    {
+      /* Mount the volume on HSMCI0 */
+
+      ret = mount(CONFIG_FRDMK66F_SDHC_MOUNT_BLKDEV,
+                  CONFIG_FRDMK66F_SDHC_MOUNT_MOUNTPOINT,
+                  CONFIG_FRDMK66F_SDHC_MOUNT_FSTYPE,
+                  0, NULL);
+
+      if (ret < 0)
+        {
+          syslog(LOG_ERR,"ERROR: Failed to mount %s: %d\n",
+                 CONFIG_FRDMK66F_SDHC_MOUNT_MOUNTPOINT, errno);
+        }
+    }
+
+#  endif /* CONFIG_FRDMK66F_SDHC_MOUNT */
+#endif /* HAVE_MMCSD */
+
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device. */
+
+  ret = k66_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: k66_pwm_setup() failed: %d\n", ret);
+    }
+#endif
+
+#ifdef HAVE_AUTOMOUNTER
+  /* Initialize the auto-mounter */
+
+  k66_automount_initialize();
+#endif
+
+#ifdef HAVE_RTC_DRIVER
+  /* Initialize the RTC */
+
+  ret = k66_rtc_initialize();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to initalize the RTC driver: %d\n",
+             ret);
+    }
+#endif
+
+#ifdef CONFIG_BUTTONS
+  /* Register the BUTTON driver */
+
+  ret = btn_lower_initialize("/dev/buttons");
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: btn_lower_initialize() failed: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
+  return OK;
+}
+
+#endif /* CONFIG_LIB_BOARDCTL CONFIG_BOARD_INITIALIZE */
diff --git a/configs/freedom-k66f/src/k66_buttons.c b/configs/freedom-k66f/src/k66_buttons.c
new file mode 100644
index 0000000000000000000000000000000000000000..de70f31dc5fb2b16eeab917e84128b2bd9f51caf
--- /dev/null
+++ b/configs/freedom-k66f/src/k66_buttons.c
@@ -0,0 +1,177 @@
+/****************************************************************************
+ * configs/freedom-k66f/src/k66_buttons.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "chip.h"
+#include "kinetis.h"
+
+#include "freedom-k66f.h"
+
+#ifdef CONFIG_ARCH_BUTTONS
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Two push buttons, SW2 and SW3, are available on FRDM-K66F board, where SW2 is
+ * connected to PTC6 and SW3 is connected to PTA4. Besides the general purpose
+ * input/output functions, SW2 and SW3 can be low-power wake up signal. Also, only
+ * SW3 can be a non-maskable interrupt.
+ *
+ *   Switch    GPIO Function
+ *   --------- ---------------------------------------------------------------
+ *   SW2       PTD11/LLWU_P25/SPI2_PCS0/SDHC0_CLKIN/LPUART0_CTS/FB_A19
+ *   SW3       PTA10/LLWU_P22/FTM2_CH0/MII0_RXD2/FTM2_QD_PHA/TPM2_CH0/TRACE_D0
+ */
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_button_initialize
+ *
+ * Description:
+ *   board_button_initialize() must be called to initialize button resources.
+ *   After that, board_buttons() may be called to collect the current state
+ *   of all buttons or board_button_irq() may be called to register button
+ *   interrupt handlers.
+ *
+ ****************************************************************************/
+
+void board_button_initialize(void)
+{
+   /* Configure the two buttons as inputs */
+
+   kinetis_pinconfig(GPIO_SW2);
+   kinetis_pinconfig(GPIO_SW3);
+}
+
+/****************************************************************************
+ * Name: board_buttons
+ ****************************************************************************/
+
+uint8_t board_buttons(void)
+{
+  uint8_t ret = 0;
+
+  if (kinetis_gpioread(GPIO_SW2))
+    {
+      ret |= BUTTON_SW2_BIT;
+    }
+
+  if (kinetis_gpioread(GPIO_SW3))
+    {
+      ret |= BUTTON_SW3_BIT;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Button support.
+ *
+ * Description:
+ *   board_button_initialize() must be called to initialize button
+ *   resources.  After that, board_buttons() may be called to collect the
+ *   current state of all buttons or board_button_irq() may be called to
+ *   register button interrupt handlers.
+ *
+ *   After board_button_initialize() has been called, board_buttons() may
+ *   be called to collect the state of all buttons.  board_buttons() returns
+ *   an 8-bit bit set with each bit associated with a button.  See the
+ *   BUTTON_*_BIT and JOYSTICK_*_BIT definitions in board.h for the meaning
+ *   of each bit.
+ *
+ *   board_button_irq() may be called to register an interrupt handler that
+ *   will be called when a button is depressed or released.  The ID value is
+ *   a button enumeration value that uniquely identifies a button resource.
+ *   See the BUTTON_* and JOYSTICK_* definitions in board.h for the meaning
+ *   of enumeration value.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_IRQBUTTONS
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
+{
+  uint32_t pinset;
+  int ret;
+
+  /* Map the button id to the GPIO bit set. */
+
+  if (id == BUTTON_SW2)
+    {
+      pinset = GPIO_SW2;
+    }
+  else if (id == BUTTON_SW3)
+    {
+      pinset = GPIO_SW3;
+    }
+  else
+    {
+      return -EINVAL;
+    }
+
+  /* The button has already been configured as an interrupting input (by
+   * board_button_initialize() above).
+   *
+   * Attach the new button handler.
+   */
+
+  ret = kinetis_pinirqattach(pinset, irqhandler, NULL);
+  if (ret >= 0)
+    {
+      /* Then make sure that interrupts are enabled on the pin */
+
+      kinetis_pinirqenable(pinset);
+    }
+
+  return ret;
+}
+#endif
+#endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/freedom-k66f/src/k66_pwm.c b/configs/freedom-k66f/src/k66_pwm.c
new file mode 100644
index 0000000000000000000000000000000000000000..fb6b406d24b0253fc5bbcbd04924c6eddf43373b
--- /dev/null
+++ b/configs/freedom-k66f/src/k66_pwm.c
@@ -0,0 +1,106 @@
+/************************************************************************************
+ * configs/freedom-k66f/src/k66_pwm.c
+ *
+ *   Copyright (C) 2013, 2015, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Jordan MacIntyre 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include "chip.h"
+#include "up_arch.h"
+#include "kinetis_pwm.h"
+
+#ifdef CONFIG_PWM
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: k66_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+int k66_pwm_setup(void)
+{
+  FAR struct pwm_lowerhalf_s *pwm;
+  static bool initialized = false;
+  int ret;
+
+  /* Have we already initialized? */
+
+  if (!initialized)
+    {
+      /* Call k66_pwminitialize() to get an instance of the PWM interface */
+
+      pwm = kinetis_pwminitialize(0);
+      if (!pwm)
+        {
+          aerr("ERROR: Failed to get the K66 PWM lower half\n");
+          return -ENODEV;
+        }
+
+      /* Register the PWM driver at "/dev/pwm0" */
+
+      ret = pwm_register("/dev/pwm0", pwm);
+      if (ret < 0)
+        {
+          aerr("ERROR: pwm_register failed: %d\n", ret);
+          return ret;
+        }
+
+      /* Now we are initialized */
+
+      initialized = true;
+    }
+
+  return OK;
+}
+
+#endif /* CONFIG_PWM */
diff --git a/configs/freedom-k66f/src/k66_rtc.c b/configs/freedom-k66f/src/k66_rtc.c
new file mode 100644
index 0000000000000000000000000000000000000000..f8d80cc1983a7afc5fd0f150a5f73f05b5a0e6e8
--- /dev/null
+++ b/configs/freedom-k66f/src/k66_rtc.c
@@ -0,0 +1,92 @@
+/****************************************************************************
+ * config/freedom-k66f/src/k66_bringup.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "freedom-k66f.h"
+#include "kinetis_alarm.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/************************************************************************************
+ * Name: k66_rtc_initialize
+ *
+ * Description:
+ *   Called to initialize the RTC FREEDOM-K66F board.
+ *
+ ************************************************************************************/
+
+int k66_rtc_initialize(void)
+{
+  int ret = -EIO;
+  FAR struct rtc_lowerhalf_s *lower;
+
+  /* Instantiate the KINETIS lower-half RTC driver */
+
+  lower = kinetis_rtc_lowerhalf();
+  if (!lower)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to instantiate the RTC lower-half driver\n");
+    }
+  else
+    {
+      /* Bind the lower half driver and register the combined RTC driver
+       * as /dev/rtc0
+       */
+
+      ret = rtc_initialize(0, lower);
+
+      if (ret < 0)
+        {
+          syslog(LOG_ERR,
+                 "ERROR: Failed to bind/register the RTC driver: %d\n",
+                 ret);
+        }
+    }
+  return ret;
+}
diff --git a/configs/freedom-k66f/src/k66_sdhc.c b/configs/freedom-k66f/src/k66_sdhc.c
new file mode 100644
index 0000000000000000000000000000000000000000..ac2ac2dce5714ef1fd465d32e147845f867f5218
--- /dev/null
+++ b/configs/freedom-k66f/src/k66_sdhc.c
@@ -0,0 +1,250 @@
+/****************************************************************************
+ * config/freedom-k66f/src/k66_sdhc.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* A micro Secure Digital (SD) card slot is available on the FRDM-K66F connected to
+ * the SD Host Controller (SDHC) signals of the MCU. This slot will accept micro
+ * format SD memory cards. The SD card detect pin (PTD10) is an open switch that
+ * shorts with VDD when card is inserted.
+ *
+ *   ------------ ------------- --------
+ *    SD Card Slot Board Signal  K66F Pin
+ *    ------------ ------------- --------
+ *    DAT0         SDHC0_D0      PTE1
+ *    DAT1         SDHC0_D1      PTE0
+ *    DAT2         SDHC0_D2      PTE5
+ *    CD/DAT3      SDHC0_D3      PTE4
+ *    CMD          SDHC0_CMD     PTE3
+ *    CLK          SDHC0_DCLK    PTE2
+ *    SWITCH       D_CARD_DETECT PTD10
+ *    ------------ ------------- --------
+ *
+ * There is no Write Protect pin available to the K66F.
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "kinetis.h"
+
+#include "freedom-k66f.h"
+
+#ifdef HAVE_MMCSD
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+/* This structure holds static information unique to one SDHC peripheral */
+
+struct k66_sdhc_state_s
+{
+  struct sdio_dev_s *sdhc;    /* R/W device handle */
+  bool inserted;              /* TRUE: card is inserted */
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* HSCMI device state */
+
+static struct k66_sdhc_state_s g_sdhc;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: k66_mediachange
+ ****************************************************************************/
+
+static void k66_mediachange(void)
+{
+  bool inserted;
+
+  /* Get the current value of the card detect pin.  This pin is pulled up on
+   * board.  So low means that a card is present.
+   */
+
+  inserted = k66_cardinserted();
+  mcinfo("inserted: %s\n", inserted ? "Yes" : "No");
+
+  /* Has the pin changed state? */
+
+  if (inserted != g_sdhc.inserted)
+    {
+      mcinfo("Media change: %d->%d\n",  g_sdhc.inserted, inserted);
+
+      /* Yes.. perform the appropriate action (this might need some debounce). */
+
+      g_sdhc.inserted = inserted;
+      sdhc_mediachange(g_sdhc.sdhc, inserted);
+
+#ifdef CONFIG_FRDMK66F_SDHC_AUTOMOUNT
+      /* Let the automounter know about the insertion event */
+
+      k66_automount_event(k66_cardinserted());
+#endif
+    }
+}
+
+/****************************************************************************
+ * Name: k66_cdinterrupt
+ ****************************************************************************/
+
+static int k66_cdinterrupt(int irq, FAR void *context, FAR void *arg)
+{
+  /* All of the work is done by k66_mediachange() */
+
+  k66_mediachange();
+  return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: k66_sdhc_initialize
+ *
+ * Description:
+ *   Initialize the SDHC SD card slot
+ *
+ ****************************************************************************/
+
+int k66_sdhc_initialize(void)
+{
+  int ret;
+
+  /* Configure GPIO pins */
+
+  kinetis_pinconfig(GPIO_SD_CARDDETECT);
+
+  /* Attached the card detect interrupt (but don't enable it yet) */
+
+  (void)kinetis_pinirqattach(GPIO_SD_CARDDETECT, k66_cdinterrupt, NULL);
+
+  /* Configure the write protect GPIO -- None */
+
+  /* Mount the SDHC-based MMC/SD block driver */
+  /* First, get an instance of the SDHC interface */
+
+  mcinfo("Initializing SDHC slot %d\n", MMCSD_SLOTNO);
+
+  g_sdhc.sdhc = sdhc_initialize(MMCSD_SLOTNO);
+  if (!g_sdhc.sdhc)
+    {
+      mcerr("ERROR: Failed to initialize SDHC slot %d\n", MMCSD_SLOTNO);
+      return -ENODEV;
+    }
+
+  /* Now bind the SDHC interface to the MMC/SD driver */
+
+  mcinfo("Bind SDHC to the MMC/SD driver, minor=%d\n", MMSCD_MINOR);
+
+  ret = mmcsd_slotinitialize(MMSCD_MINOR, g_sdhc.sdhc);
+  if (ret != OK)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to bind SDHC to the MMC/SD driver: %d\n", ret);
+      return ret;
+    }
+
+  syslog(LOG_INFO, "Successfully bound SDHC to the MMC/SD driver\n");
+
+  /* Handle the initial card state */
+
+  k66_mediachange();
+
+  /* Enable CD interrupts to handle subsequent media changes */
+
+  kinetis_pinirqenable(GPIO_SD_CARDDETECT);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: k66_cardinserted
+ *
+ * Description:
+ *   Check if a card is inserted into the SDHC slot
+ *
+ ****************************************************************************/
+
+bool k66_cardinserted(void)
+{
+  bool inserted;
+
+  /* Get the current value of the card detect pin.  This pin is pulled to VDD on
+   * insert.  So high means that a card is present.
+   */
+
+  inserted = kinetis_gpioread(GPIO_SD_CARDDETECT);
+  mcinfo("inserted: %s\n", inserted ? "Yes" : "No");
+  return inserted;
+}
+
+/****************************************************************************
+ * Name: k66_writeprotected
+ *
+ * Description:
+ *   Check if a card is inserted into the SDHC slot
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_AUTOMOUNTER
+bool k66_writeprotected(void)
+{
+  /* There are no write protect pins */
+
+  return false;
+}
+#endif
+
+#endif /* HAVE_MMCSD */
diff --git a/configs/freedom-k66f/src/k66_spi.c b/configs/freedom-k66f/src/k66_spi.c
new file mode 100644
index 0000000000000000000000000000000000000000..dca7c44a25462a19cfb875754eaa2ac4555f1f2e
--- /dev/null
+++ b/configs/freedom-k66f/src/k66_spi.c
@@ -0,0 +1,145 @@
+/************************************************************************************
+ * configs/freedom-k66f/src/k66_spi.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "up_arch.h"
+#include "chip.h"
+#include "kinetis.h"
+#include "freedom-k66f.h"
+
+#if defined(CONFIG_KINETIS_SPI0) || defined(CONFIG_KINETIS_SPI1) || \
+	defined(CONFIG_KINETIS_SPI2)
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: k66_spidev_initialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins for the FREEDOM-K66F board.
+ *
+ ************************************************************************************/
+
+void weak_function k66_spidev_initialize(void)
+{
+# warning "Missing logic"
+}
+
+/************************************************************************************
+ * Name:  kinetis_spi[n]select, kinetis_spi[n]status, and kinetis_spi[n]cmddata
+ *
+ * Description:
+ *   These external functions must be provided by board-specific logic.  They are
+ *   implementations of the select, status, and cmddata methods of the SPI interface
+ *   defined by struct spi_ops_s (see include/nuttx/spi/spi.h). All other methods
+ *   including kinetis_spibus_initialize()) are provided by common Kinetis logic.
+ *   To use this common SPI logic on your board:
+ *
+ *   1. Provide logic in kinetis_boardinitialize() to configure SPI chip select
+ *      pins.
+ *   2. Provide kinetis_spi[n]select() and kinetis_spi[n]status() functions
+ *      in your board-specific logic.  These functions will perform chip selection
+ *      and status operations using GPIOs in the way your board is configured.
+ *   2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide
+ *      kinetis_spi[n]cmddata() functions in your board-specific logic.  These
+ *      functions will perform cmd/data selection operations using GPIOs in the way
+ *      your board is configured.
+ *   3. Add a call to kinetis_spibus_initialize() in your low level application
+ *      initialization logic
+ *   4. The handle returned by kinetis_spibus_initialize() may then be used to bind the
+ *      SPI driver to higher level logic (e.g., calling
+ *      mmcsd_spislotinitialize(), for example, will bind the SPI driver to
+ *      the SPI MMC/SD driver).
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_KINETIS_SPI0
+void kinetis_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+# warning "Missing logic"
+}
+
+uint8_t kinetis_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+# warning "Missing logic"
+  return SPI_STATUS_PRESENT;
+}
+#endif
+
+#ifdef CONFIG_KINETIS_SPI1
+void kinetis_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+# warning "Missing logic"
+}
+
+uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+# warning "Missing logic"
+  return SPI_STATUS_PRESENT;
+}
+#endif
+
+#ifdef CONFIG_KINETIS_SPI2
+void kinetis_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+# warning "Missing logic"
+}
+
+uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+# warning "Missing logic"
+  return SPI_STATUS_PRESENT;
+}
+#endif
+
+#endif /* CONFIG_KINETIS_SPI0 || CONFIG_KINETIS_SPI1 || CONFIG_KINETIS_SPI2 */
diff --git a/configs/freedom-k66f/src/k66_uid.c b/configs/freedom-k66f/src/k66_uid.c
new file mode 100644
index 0000000000000000000000000000000000000000..7d9e44cb0e7a3161633c06257e47db750573d543
--- /dev/null
+++ b/configs/freedom-k66f/src/k66_uid.c
@@ -0,0 +1,74 @@
+/****************************************************************************
+ * configs/freedom-k66/src/kinetis_uid.c
+ *
+ *   Copyright (C) 2016 Neil Hancock. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include "kinetis_uid.h"
+
+#include 
+
+#if defined(CONFIG_BOARDCTL_UNIQUEID)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_uniqueid
+ ****************************************************************************/
+
+int board_uniqueid(FAR uint8_t *uniqueid)
+{
+  if (uniqueid == NULL)
+    {
+      return -EINVAL;
+    }
+
+  kinetis_get_uniqueid(uniqueid);
+  return OK;
+}
+
+#endif /* CONFIG_BOARDCTL_UNIQUEID */
diff --git a/configs/freedom-k66f/src/k66_usbdev.c b/configs/freedom-k66f/src/k66_usbdev.c
new file mode 100644
index 0000000000000000000000000000000000000000..c71a121d7176e8e06eefd0e30fb9f41ec360d671
--- /dev/null
+++ b/configs/freedom-k66f/src/k66_usbdev.c
@@ -0,0 +1,106 @@
+/************************************************************************************
+ * configs/freedom-k66f/src/k66_usbdev.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "up_arch.h"
+#include "kinetis.h"
+#include "freedom-k66f.h"
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: k66_usbinitialize
+ *
+ * Description:
+ *   Called to setup USB-related GPIO pins for the FREEDOM-K66F board.
+ *
+ ************************************************************************************/
+
+void k66_usbinitialize(void)
+{
+# warning "Missing logic"
+}
+
+/************************************************************************************
+ * Name:  kinetis_usbpullup
+ *
+ * Description:
+ *   If USB is supported and the board supports a pullup via GPIO (for USB software
+ *   connect and disconnect), then the board software must provide kinetis_usbpullup.
+ *   See include/nuttx/usb/usbdev.h for additional description of this method.
+ *   Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be
+ *   NULL.
+ *
+ ************************************************************************************/
+
+int kinetis_usbpullup(FAR struct usbdev_s *dev, bool enable)
+{
+  usbtrace(TRACE_DEVPULLUP, (uint16_t)enable);
+# warning "Missing logic"
+  return OK;
+}
+
+/************************************************************************************
+ * Name:  kinetis_usbsuspend
+ *
+ * Description:
+ *   Board logic must provide the kinetis_usbsuspend logic if the USBDEV driver is
+ *   used.  This function is called whenever the USB enters or leaves suspend mode.
+ *   This is an opportunity for the board logic to shutdown clocks, power, etc.
+ *   while the USB is suspended.
+ *
+ ************************************************************************************/
+
+void kinetis_usbsuspend(FAR struct usbdev_s *dev, bool resume)
+{
+  uinfo("resume: %d\n", resume);
+#warning "Missing logic"
+}
diff --git a/configs/freedom-k66f/src/k66_usbmsc.c b/configs/freedom-k66f/src/k66_usbmsc.c
new file mode 100644
index 0000000000000000000000000000000000000000..0614931977e6e7be8eb1f92aa2803b3721756299
--- /dev/null
+++ b/configs/freedom-k66f/src/k66_usbmsc.c
@@ -0,0 +1,100 @@
+/****************************************************************************
+ * configs/freedom-k66f/src/k66_usbmsc.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Configure and register the Kinetis MMC/SD block driver.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "kinetis.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1
+#  define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0
+#endif
+
+/* SLOT number(s) could depend on the board configuration */
+
+#ifdef CONFIG_ARCH_BOARD_FREEDOM_K66F
+#  undef k66_MMCSDSLOTNO
+#  define k66_MMCSDSLOTNO 0
+#else
+   /* Add configuration for new Kinetis boards here */
+#  error "Unrecognized Kinetis board"
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_usbmsc_initialize
+ *
+ * Description:
+ *   Perform architecture specific initialization as needed to establish
+ *   the mass storage device that will be exported by the USB MSC device.
+ *
+ ****************************************************************************/
+
+int board_usbmsc_initialize(int port)
+{
+  /* If system/usbmsc is built as an NSH command, then SD slot should
+   * already have been initialized in board_app_initialize() (see k66_appinit.c).
+   * In this case, there is nothing further to be done here.
+   */
+
+#ifndef CONFIG_NSH_BUILTIN_APPS
+#  warning "Missing logic"
+#endif /* CONFIG_NSH_BUILTIN_APPS */
+
+   return OK;
+}
diff --git a/configs/freedom-k66f/src/k66_userleds.c b/configs/freedom-k66f/src/k66_userleds.c
new file mode 100644
index 0000000000000000000000000000000000000000..bc4a93499662b0aed70caf210771354bc96def77
--- /dev/null
+++ b/configs/freedom-k66f/src/k66_userleds.c
@@ -0,0 +1,112 @@
+/****************************************************************************
+ * configs/freedom-k66f/src/k66_userleds.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "chip.h"
+#include "kinetis.h"
+#include "freedom-k66f.h"
+
+#ifndef CONFIG_ARCH_LEDS
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_userled_initialize
+ ****************************************************************************/
+
+void board_userled_initialize(void)
+{
+  kinetis_pinconfig(GPIO_LED_R);
+  kinetis_pinconfig(GPIO_LED_G);
+  kinetis_pinconfig(GPIO_LED_B);
+}
+
+/****************************************************************************
+ * Name: board_userled
+ ****************************************************************************/
+
+void board_userled(int led, bool ledon)
+{
+  uint32_t ledcfg;
+
+  if (led == BOARD_LED_R)
+    {
+      ledcfg = GPIO_LED_R;
+    }
+  else if (led == BOARD_LED_G)
+    {
+      ledcfg = GPIO_LED_G;
+    }
+  else if (led == BOARD_LED_B)
+    {
+      ledcfg = GPIO_LED_B;
+    }
+  else
+    {
+      return;
+    }
+
+  kinetis_gpiowrite(ledcfg, !ledon); /* Low illuminates */
+}
+
+/****************************************************************************
+ * Name: board_userled_all
+ ****************************************************************************/
+
+void board_userled_all(uint8_t ledset)
+{
+  /* Low illuminates */
+
+  kinetis_gpiowrite(GPIO_LED_R, (ledset & BOARD_LED_R_BIT) == 0);
+  kinetis_gpiowrite(GPIO_LED_G, (ledset & BOARD_LED_G_BIT) == 0);
+  kinetis_gpiowrite(GPIO_LED_B, (ledset & BOARD_LED_B_BIT) == 0);
+}
+
+#endif /* CONFIG_ARCH_LEDS */
diff --git a/configs/freedom-kl25z/README.txt b/configs/freedom-kl25z/README.txt
index 23390503de5619959df6e77195d80267334cacc2..b5114b4d43c466b36624dc4fe230786af8330bbf 100644
--- a/configs/freedom-kl25z/README.txt
+++ b/configs/freedom-kl25z/README.txt
@@ -294,13 +294,6 @@ instead of configure.sh:
 
 Where  is one of the following:
 
-  minnsh:
-  ------
-
-    This is a experiment to see just how small we can get a usable NSH
-    configuration.  This configuration has far fewer features than the nsh
-    configuration but is also a fraction of the size.
-
   nsh:
   ---
     Configures the NuttShell (nsh) located at apps/examples/nsh.  The
diff --git a/configs/freedom-kl25z/minnsh/defconfig b/configs/freedom-kl25z/minnsh/defconfig
deleted file mode 100644
index 753da383ba15156eba3a67e897e077e411ef8e1c..0000000000000000000000000000000000000000
--- a/configs/freedom-kl25z/minnsh/defconfig
+++ /dev/null
@@ -1,820 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# Nuttx/ Configuration
-#
-
-#
-# Build Setup
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_DEFAULT_SMALL=y
-CONFIG_HOST_LINUX=y
-# CONFIG_HOST_OSX is not set
-# CONFIG_HOST_WINDOWS is not set
-# CONFIG_HOST_OTHER is not set
-
-#
-# Build Configuration
-#
-# CONFIG_APPS_DIR="../apps"
-CONFIG_BUILD_FLAT=y
-# CONFIG_BUILD_2PASS is not set
-
-#
-# Binary Output Formats
-#
-# CONFIG_RRLOAD_BINARY is not set
-# CONFIG_INTELHEX_BINARY is not set
-CONFIG_MOTOROLA_SREC=y
-CONFIG_RAW_BINARY=y
-# CONFIG_UBOOT_UIMAGE is not set
-
-#
-# Customize Header Files
-#
-# CONFIG_ARCH_STDINT_H is not set
-# CONFIG_ARCH_STDBOOL_H is not set
-# CONFIG_ARCH_MATH_H is not set
-# CONFIG_ARCH_FLOAT_H is not set
-# CONFIG_ARCH_STDARG_H is not set
-
-#
-# Debug Options
-#
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_STACKCHECK=y
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_SYMBOLS is not set
-CONFIG_ARCH_HAVE_CUSTOMOPT=y
-# CONFIG_DEBUG_NOOPT is not set
-# CONFIG_DEBUG_CUSTOMOPT is not set
-CONFIG_DEBUG_FULLOPT=y
-
-#
-# System Type
-#
-CONFIG_ARCH_ARM=y
-# CONFIG_ARCH_AVR is not set
-# CONFIG_ARCH_HC is not set
-# CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
-# CONFIG_ARCH_SIM is not set
-# CONFIG_ARCH_X86 is not set
-# CONFIG_ARCH_Z16 is not set
-# CONFIG_ARCH_Z80 is not set
-CONFIG_ARCH="arm"
-
-#
-# ARM Options
-#
-# CONFIG_ARCH_CHIP_A1X is not set
-# CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
-# CONFIG_ARCH_CHIP_DM320 is not set
-# CONFIG_ARCH_CHIP_EFM32 is not set
-# CONFIG_ARCH_CHIP_IMX1 is not set
-# CONFIG_ARCH_CHIP_KINETIS is not set
-CONFIG_ARCH_CHIP_KL=y
-# CONFIG_ARCH_CHIP_LM is not set
-# CONFIG_ARCH_CHIP_TIVA is not set
-# CONFIG_ARCH_CHIP_LPC17XX is not set
-# CONFIG_ARCH_CHIP_LPC214X is not set
-# CONFIG_ARCH_CHIP_LPC2378 is not set
-# CONFIG_ARCH_CHIP_LPC31XX is not set
-# CONFIG_ARCH_CHIP_LPC43XX is not set
-# CONFIG_ARCH_CHIP_NUC1XX is not set
-# CONFIG_ARCH_CHIP_SAMA5 is not set
-# CONFIG_ARCH_CHIP_SAMD is not set
-# CONFIG_ARCH_CHIP_SAM34 is not set
-# CONFIG_ARCH_CHIP_STM32 is not set
-# CONFIG_ARCH_CHIP_STR71X is not set
-# CONFIG_ARCH_ARM7TDMI is not set
-# CONFIG_ARCH_ARM926EJS is not set
-# CONFIG_ARCH_ARM920T is not set
-CONFIG_ARCH_CORTEXM0=y
-# CONFIG_ARCH_CORTEXM3 is not set
-# CONFIG_ARCH_CORTEXM4 is not set
-# CONFIG_ARCH_CORTEXA5 is not set
-# CONFIG_ARCH_CORTEXA8 is not set
-CONFIG_ARCH_FAMILY="armv6-m"
-CONFIG_ARCH_CHIP="kl"
-CONFIG_ARCH_HAVE_CMNVECTOR=y
-# CONFIG_ARMV7M_CMNVECTOR is not set
-# CONFIG_ARCH_HAVE_FPU is not set
-
-#
-# ARMV6M Configuration Options
-#
-# CONFIG_ARMV6M_TOOLCHAIN_BUILDROOT is not set
-# CONFIG_ARMV6M_TOOLCHAIN_CODEREDL is not set
-# CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL is not set
-CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL=y
-# CONFIG_GPIO_IRQ is not set
-
-#
-# Kinetis Configuration Options
-#
-CONFIG_ARCH_CHIP_MKL25Z128=y
-CONFIG_ARCH_FAMILY_KL2X=y
-
-#
-# Kinetis Peripheral Support
-#
-# CONFIG_KL_TRACE is not set
-# CONFIG_KL_FLEXBUS is not set
-CONFIG_KL_UART0=y
-# CONFIG_KL_UART1 is not set
-# CONFIG_KL_UART2 is not set
-# CONFIG_KL_FLEXCAN0 is not set
-# CONFIG_KL_FLEXCAN1 is not set
-CONFIG_KL_SPI0=y
-CONFIG_KL_SPI1=y
-# CONFIG_KL_SPI2 is not set
-# CONFIG_KL_I2C0 is not set
-# CONFIG_KL_I2C1 is not set
-# CONFIG_KL_I2S is not set
-# CONFIG_KL_DAC0 is not set
-# CONFIG_KL_DAC1 is not set
-# CONFIG_KL_ADC0 is not set
-# CONFIG_KL_ADC1 is not set
-# CONFIG_KL_CMP is not set
-# CONFIG_KL_VREF is not set
-# CONFIG_KL_TPM0 is not set
-# CONFIG_KL_TPM1 is not set
-# CONFIG_KL_TPM2 is not set
-# CONFIG_KL_LPTIMER is not set
-# CONFIG_KL_RTC is not set
-# CONFIG_KL_EWM is not set
-# CONFIG_KL_CMT is not set
-# CONFIG_KL_USBOTG is not set
-# CONFIG_KL_USBDCD is not set
-# CONFIG_KL_LLWU is not set
-# CONFIG_KL_TSI is not set
-# CONFIG_KL_FTFL is not set
-# CONFIG_KL_DMA is not set
-# CONFIG_KL_CRC is not set
-# CONFIG_KL_PDB is not set
-# CONFIG_KL_PIT is not set
-CONFIG_KL_SYSTICK_CORECLK=y
-# CONFIG_KL_SYSTICK_CORECLK_DIV16 is not set
-
-#
-# Kinetis GPIO Interrupt Configuration
-#
-
-#
-# Architecture Options
-#
-# CONFIG_ARCH_NOINTC is not set
-# CONFIG_ARCH_VECNOTIRQ is not set
-# CONFIG_ARCH_DMA is not set
-CONFIG_ARCH_HAVE_IRQPRIO=y
-# CONFIG_ARCH_L2CACHE is not set
-# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
-# CONFIG_ARCH_HAVE_ADDRENV is not set
-# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
-CONFIG_ARCH_HAVE_VFORK=y
-# CONFIG_ARCH_HAVE_MMU is not set
-# CONFIG_ARCH_HAVE_MPU is not set
-# CONFIG_ARCH_NAND_HWECC is not set
-# CONFIG_ARCH_HAVE_EXTCLK is not set
-# CONFIG_ARCH_IRQPRIO is not set
-# CONFIG_ARCH_STACKDUMP is not set
-# CONFIG_ENDIAN_BIG is not set
-# CONFIG_ARCH_IDLE_CUSTOM is not set
-# CONFIG_ARCH_HAVE_RAMFUNCS is not set
-# CONFIG_ARCH_HAVE_RAMVECTORS is not set
-
-#
-# Board Settings
-#
-CONFIG_BOARD_LOOPSPERMSEC=2988
-# CONFIG_ARCH_CALIBRATION is not set
-
-#
-# Interrupt options
-#
-CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
-CONFIG_ARCH_INTERRUPTSTACK=0
-# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set
-
-#
-# Boot options
-#
-# CONFIG_BOOT_RUNFROMEXTSRAM is not set
-CONFIG_BOOT_RUNFROMFLASH=y
-# CONFIG_BOOT_RUNFROMISRAM is not set
-# CONFIG_BOOT_RUNFROMSDRAM is not set
-# CONFIG_BOOT_COPYTORAM is not set
-
-#
-# Boot Memory Configuration
-#
-CONFIG_RAM_START=0x1FFFF000
-CONFIG_RAM_SIZE=16384
-# CONFIG_ARCH_HAVE_SDRAM is not set
-
-#
-# Board Selection
-#
-CONFIG_ARCH_BOARD_FREEDOM_KL25Z=y
-# CONFIG_ARCH_BOARD_CUSTOM is not set
-CONFIG_ARCH_BOARD="freedom-kl25z"
-
-#
-# Common Board Options
-#
-CONFIG_ARCH_HAVE_LEDS=y
-CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
-
-#
-# Board-Specific Options
-#
-
-#
-# RTOS Features
-#
-CONFIG_DISABLE_OS_API=y
-CONFIG_DISABLE_POSIX_TIMERS=y
-CONFIG_DISABLE_PTHREAD=y
-CONFIG_DISABLE_SIGNALS=y
-CONFIG_DISABLE_MQUEUE=y
-CONFIG_DISABLE_ENVIRON=y
-
-#
-# Clocks and Timers
-#
-CONFIG_USEC_PER_TICK=10000
-# CONFIG_SYSTEM_TIME64 is not set
-# CONFIG_CLOCK_MONOTONIC is not set
-# CONFIG_JULIAN_TIME is not set
-CONFIG_START_YEAR=2013
-CONFIG_START_MONTH=2
-CONFIG_START_DAY=26
-CONFIG_MAX_WDOGPARMS=2
-CONFIG_PREALLOC_WDOGS=4
-CONFIG_WDOG_INTRESERVE=0
-CONFIG_PREALLOC_TIMERS=0
-
-#
-# Tasks and Scheduling
-#
-# CONFIG_INIT_NONE is not set
-CONFIG_INIT_ENTRYPOINT=y
-# CONFIG_INIT_FILEPATH is not set
-CONFIG_USER_ENTRYPOINT="nsh_main"
-CONFIG_RR_INTERVAL=0
-CONFIG_TASK_NAME_SIZE=0
-CONFIG_MAX_TASKS=8
-# CONFIG_SCHED_HAVE_PARENT is not set
-# CONFIG_SCHED_WAITPID is not set
-
-#
-# Performance Monitoring
-#
-# CONFIG_SCHED_CPULOAD is not set
-# CONFIG_SCHED_INSTRUMENTATION is not set
-
-#
-# Files and I/O
-#
-# CONFIG_DEV_CONSOLE is not set
-CONFIG_FDCLONE_DISABLE=y
-# CONFIG_FDCLONE_STDIO is not set
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_NFILE_DESCRIPTORS=0
-CONFIG_NFILE_STREAMS=0
-CONFIG_NAME_MAX=32
-# CONFIG_PRIORITY_INHERITANCE is not set
-
-#
-# RTOS hooks
-#
-# CONFIG_BOARD_INITIALIZE is not set
-# CONFIG_SCHED_STARTHOOK is not set
-# CONFIG_SCHED_ATEXIT is not set
-# CONFIG_SCHED_ONEXIT is not set
-
-#
-# Work Queue Support
-#
-
-#
-# Stack and heap information
-#
-CONFIG_IDLETHREAD_STACKSIZE=1024
-CONFIG_USERMAIN_STACKSIZE=1536
-CONFIG_PTHREAD_STACK_MIN=256
-CONFIG_PTHREAD_STACK_DEFAULT=1536
-# CONFIG_LIB_SYSCALL is not set
-
-#
-# Device Drivers
-#
-CONFIG_DISABLE_POLL=y
-# CONFIG_DEV_NULL is not set
-# CONFIG_DEV_ZERO is not set
-# CONFIG_DEV_LOOP is not set
-
-#
-# Buffering
-#
-# CONFIG_DRVR_WRITEBUFFER is not set
-# CONFIG_DRVR_READAHEAD is not set
-# CONFIG_RAMDISK is not set
-# CONFIG_CAN is not set
-# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
-# CONFIG_PWM is not set
-# CONFIG_ARCH_HAVE_I2CRESET is not set
-# CONFIG_I2C is not set
-CONFIG_SPI=y
-CONFIG_SPI_EXCHANGE=y
-# CONFIG_SPI_CMDDATA is not set
-# CONFIG_SPI_BITBANG is not set
-# CONFIG_I2S is not set
-# CONFIG_RTC is not set
-# CONFIG_WATCHDOG is not set
-# CONFIG_TIMER is not set
-# CONFIG_ANALOG is not set
-# CONFIG_AUDIO_DEVICES is not set
-# CONFIG_VIDEO_DEVICES is not set
-# CONFIG_BCH is not set
-# CONFIG_INPUT is not set
-# CONFIG_LCD is not set
-# CONFIG_MMCSD is not set
-# CONFIG_MTD is not set
-# CONFIG_EEPROM is not set
-# CONFIG_PIPES is not set
-# CONFIG_PM is not set
-# CONFIG_POWER is not set
-# CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
-CONFIG_SERIAL=y
-# CONFIG_16550_UART is not set
-# CONFIG_UART_SERIALDRIVER is not set
-CONFIG_UART0_SERIALDRIVER=y
-# CONFIG_UART1_SERIALDRIVER is not set
-# CONFIG_UART2_SERIALDRIVER is not set
-# CONFIG_UART3_SERIALDRIVER is not set
-# CONFIG_UART4_SERIALDRIVER is not set
-# CONFIG_UART5_SERIALDRIVER is not set
-# CONFIG_UART6_SERIALDRIVER is not set
-# CONFIG_UART7_SERIALDRIVER is not set
-# CONFIG_UART8_SERIALDRIVER is not set
-# CONFIG_SCI0_SERIALDRIVER is not set
-# CONFIG_SCI1_SERIALDRIVER is not set
-# CONFIG_USART0_SERIALDRIVER is not set
-# CONFIG_USART1_SERIALDRIVER is not set
-# CONFIG_USART2_SERIALDRIVER is not set
-# CONFIG_USART3_SERIALDRIVER is not set
-# CONFIG_USART4_SERIALDRIVER is not set
-# CONFIG_USART5_SERIALDRIVER is not set
-# CONFIG_USART6_SERIALDRIVER is not set
-# CONFIG_USART7_SERIALDRIVER is not set
-# CONFIG_USART8_SERIALDRIVER is not set
-# CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
-CONFIG_MCU_SERIAL=y
-# CONFIG_STANDARD_SERIAL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
-# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
-CONFIG_UART0_SERIAL_CONSOLE=y
-# CONFIG_OTHER_SERIAL_CONSOLE is not set
-# CONFIG_NO_SERIAL_CONSOLE is not set
-
-#
-# UART0 Configuration
-#
-CONFIG_UART0_RXBUFSIZE=256
-CONFIG_UART0_TXBUFSIZE=256
-CONFIG_UART0_BAUD=115200
-CONFIG_UART0_BITS=8
-CONFIG_UART0_PARITY=0
-CONFIG_UART0_2STOP=0
-# CONFIG_UART0_IFLOWCONTROL is not set
-# CONFIG_UART0_OFLOWCONTROL is not set
-# CONFIG_USBDEV is not set
-# CONFIG_USBHOST is not set
-# CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
-
-#
-# System Logging
-#
-# CONFIG_RAMLOG is not set
-
-#
-# Networking Support
-#
-# CONFIG_ARCH_HAVE_NET is not set
-# CONFIG_ARCH_HAVE_PHY is not set
-# CONFIG_NET is not set
-
-#
-# Crypto API
-#
-# CONFIG_CRYPTO is not set
-
-#
-# File Systems
-#
-
-#
-# File system configuration
-#
-CONFIG_DISABLE_MOUNTPOINT=y
-CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
-# CONFIG_FS_READABLE is not set
-# CONFIG_FS_WRITABLE is not set
-# CONFIG_FS_NAMED_SEMAPHORES is not set
-# CONFIG_FS_RAMMAP is not set
-# CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
-#
-# Graphics Support
-#
-# CONFIG_NX is not set
-
-#
-# Memory Management
-#
-CONFIG_MM_SMALL=y
-CONFIG_MM_REGIONS=1
-# CONFIG_ARCH_HAVE_HEAP2 is not set
-# CONFIG_GRAN is not set
-
-#
-# Audio Support
-#
-# CONFIG_AUDIO is not set
-
-#
-# Binary Loader
-#
-# CONFIG_BINFMT_DISABLE is not set
-# CONFIG_NXFLAT is not set
-# CONFIG_ELF is not set
-# CONFIG_BUILTIN is not set
-# CONFIG_PIC is not set
-# CONFIG_SYMTAB_ORDEREDBYNAME is not set
-
-#
-# Library Routines
-#
-
-#
-# Standard C Library Options
-#
-CONFIG_STDIO_BUFFER_SIZE=0
-CONFIG_STDIO_LINEBUFFER=y
-CONFIG_NUNGET_CHARS=0
-# CONFIG_LIBM is not set
-CONFIG_NOPRINTF_FIELDWIDTH=y
-# CONFIG_LIBC_FLOATINGPOINT is not set
-# CONFIG_LIBC_LONG_LONG is not set
-# CONFIG_LIBC_IOCTL_VARIADIC is not set
-CONFIG_LIB_RAND_ORDER=1
-# CONFIG_EOL_IS_CR is not set
-# CONFIG_EOL_IS_LF is not set
-# CONFIG_EOL_IS_BOTH_CRLF is not set
-CONFIG_EOL_IS_EITHER_CRLF=y
-# CONFIG_LIBC_EXECFUNCS is not set
-CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
-CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536
-# CONFIG_LIBC_STRERROR is not set
-# CONFIG_LIBC_PERROR_STDOUT is not set
-CONFIG_ARCH_LOWPUTC=y
-CONFIG_LIB_SENDFILE_BUFSIZE=512
-# CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
-
-#
-# Non-standard Library Support
-#
-# CONFIG_LIB_KBDCODEC is not set
-# CONFIG_LIB_SLCDCODEC is not set
-
-#
-# Basic CXX Support
-#
-# CONFIG_C99_BOOL8 is not set
-# CONFIG_HAVE_CXX is not set
-
-#
-# Application Configuration
-#
-
-#
-# Built-In Applications
-#
-
-#
-# Examples
-#
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
-# CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
-# CONFIG_EXAMPLES_DHCPD is not set
-# CONFIG_EXAMPLES_ELF is not set
-# CONFIG_EXAMPLES_FTPC is not set
-# CONFIG_EXAMPLES_FTPD is not set
-# CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
-# CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
-# CONFIG_EXAMPLES_IGMP is not set
-# CONFIG_EXAMPLES_MM is not set
-# CONFIG_EXAMPLES_MODBUS is not set
-# CONFIG_EXAMPLES_MOUNT is not set
-# CONFIG_EXAMPLES_NRF24L01TERM is not set
-CONFIG_EXAMPLES_NSH=y
-# CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
-# CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
-# CONFIG_EXAMPLES_NXHELLO is not set
-# CONFIG_EXAMPLES_NXIMAGE is not set
-# CONFIG_EXAMPLES_NXLINES is not set
-# CONFIG_EXAMPLES_NXTEXT is not set
-# CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
-# CONFIG_EXAMPLES_SENDMAIL is not set
-# CONFIG_EXAMPLES_SERIALBLASTER is not set
-# CONFIG_EXAMPLES_SERIALRX is not set
-# CONFIG_EXAMPLES_SERLOOP is not set
-# CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART is not set
-# CONFIG_EXAMPLES_TCPECHO is not set
-# CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
-# CONFIG_EXAMPLES_TIFF is not set
-# CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
-# CONFIG_EXAMPLES_USBTERM is not set
-# CONFIG_EXAMPLES_WATCHDOG is not set
-
-#
-# Graphics Support
-#
-# CONFIG_TIFF is not set
-# CONFIG_GRAPHICS_TRAVELER is not set
-
-#
-# Interpreters
-#
-# CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
-
-#
-# Network Utilities
-#
-
-#
-# Networking Utilities
-#
-# CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
-# CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
-# CONFIG_NETUTILS_JSON is not set
-# CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
-#
-# NSH Library
-#
-CONFIG_NSH_LIBRARY=y
-
-#
-# Command Line Configuration
-#
-CONFIG_NSH_READLINE=y
-# CONFIG_NSH_CLE is not set
-CONFIG_NSH_LINELEN=80
-CONFIG_NSH_DISABLE_SEMICOLON=y
-CONFIG_NSH_MAXARGUMENTS=6
-# CONFIG_NSH_ARGCAT is not set
-CONFIG_NSH_NESTDEPTH=3
-# CONFIG_NSH_DISABLEBG is not set
-
-#
-# Disable Individual commands
-#
-CONFIG_NSH_DISABLE_ADDROUTE=y
-# CONFIG_NSH_DISABLE_CAT is not set
-CONFIG_NSH_DISABLE_CD=y
-CONFIG_NSH_DISABLE_CP=y
-# CONFIG_NSH_DISABLE_CMP is not set
-CONFIG_NSH_DISABLE_DD=y
-CONFIG_NSH_DISABLE_DF=y
-CONFIG_NSH_DISABLE_DELROUTE=y
-# CONFIG_NSH_DISABLE_ECHO is not set
-# CONFIG_NSH_DISABLE_EXEC is not set
-# CONFIG_NSH_DISABLE_EXIT is not set
-# CONFIG_NSH_DISABLE_FREE is not set
-CONFIG_NSH_DISABLE_GET=y
-# CONFIG_NSH_DISABLE_HELP is not set
-# CONFIG_NSH_DISABLE_HEXDUMP is not set
-CONFIG_NSH_DISABLE_IFCONFIG=y
-# CONFIG_NSH_DISABLE_KILL is not set
-CONFIG_NSH_DISABLE_LOSETUP=y
-# CONFIG_NSH_DISABLE_LS is not set
-# CONFIG_NSH_DISABLE_MB is not set
-CONFIG_NSH_DISABLE_MKDIR=y
-# CONFIG_NSH_DISABLE_MKFIFO is not set
-CONFIG_NSH_DISABLE_MKRD=y
-# CONFIG_NSH_DISABLE_MH is not set
-CONFIG_NSH_DISABLE_MOUNT=y
-# CONFIG_NSH_DISABLE_MW is not set
-# CONFIG_NSH_DISABLE_PS is not set
-CONFIG_NSH_DISABLE_PUT=y
-# CONFIG_NSH_DISABLE_PWD is not set
-CONFIG_NSH_DISABLE_RM=y
-CONFIG_NSH_DISABLE_RMDIR=y
-# CONFIG_NSH_DISABLE_SET is not set
-# CONFIG_NSH_DISABLE_SH is not set
-# CONFIG_NSH_DISABLE_SLEEP is not set
-# CONFIG_NSH_DISABLE_TEST is not set
-CONFIG_NSH_DISABLE_UMOUNT=y
-# CONFIG_NSH_DISABLE_UNSET is not set
-# CONFIG_NSH_DISABLE_USLEEP is not set
-CONFIG_NSH_DISABLE_WGET=y
-# CONFIG_NSH_DISABLE_XD is not set
-
-#
-# Configure Command Options
-#
-CONFIG_NSH_CODECS_BUFSIZE=128
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-CONFIG_NSH_FILEIOSIZE=64
-
-#
-# Scripting Support
-#
-CONFIG_NSH_DISABLESCRIPT=y
-
-#
-# Console Configuration
-#
-CONFIG_NSH_CONSOLE=y
-# CONFIG_NSH_ALTCONDEV is not set
-# CONFIG_NSH_ARCHINIT is not set
-
-#
-# NxWidgets/NxWM
-#
-
-#
-# Platform-specific Support
-#
-# CONFIG_PLATFORM_CONFIGDATA is not set
-
-#
-# System Libraries and NSH Add-Ons
-#
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# EMACS-like Command Line Editor
-#
-# CONFIG_SYSTEM_CLE is not set
-
-#
-# CU Minimal Terminal
-#
-# CONFIG_SYSTEM_CUTERM is not set
-
-#
-# FLASH Program Installation
-#
-# CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# Intel HEX to binary conversion
-#
-# CONFIG_SYSTEM_HEX2BIN is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# NxPlayer media player library / command Line
-#
-
-#
-# RAM test
-#
-# CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
-CONFIG_SYSTEM_READLINE=y
-CONFIG_READLINE_ECHO=y
-
-#
-# P-Code Support
-#
-
-#
-# PHY Tool
-#
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sudoku
-#
-# CONFIG_SYSTEM_SUDOKU is not set
-
-#
-# Sysinfo
-#
-
-#
-# VI Work-Alike Editor
-#
-# CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# USB Monitor
-#
-
-#
-# Zmodem Commands
-#
-# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/freedom-kl25z/nsh/Make.defs b/configs/freedom-kl25z/nsh/Make.defs
index eac2f1bdbc441d0ba923ce2e904b643a3a93bc1b..4eb098fbe9bfd1787ac6322f71612c47ed078b0e 100644
--- a/configs/freedom-kl25z/nsh/Make.defs
+++ b/configs/freedom-kl25z/nsh/Make.defs
@@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/freedom-kl25z/nsh/defconfig b/configs/freedom-kl25z/nsh/defconfig
index 7a97b9a5bb540e1159af15eaa2e7c8f375ac0499..ead5cbb0596ba8404d2069e0fc82ccd183d3848c 100644
--- a/configs/freedom-kl25z/nsh/defconfig
+++ b/configs/freedom-kl25z/nsh/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -71,14 +72,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 CONFIG_ARCH_CHIP_KL=y
 # CONFIG_ARCH_CHIP_LM is not set
 # CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -87,10 +89,15 @@ CONFIG_ARCH_CHIP_KL=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -100,13 +107,24 @@ CONFIG_ARCH_CORTEXM0=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv6-m"
 CONFIG_ARCH_CHIP="kl"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 
 #
 # ARMV6M Configuration Options
@@ -115,11 +133,11 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV6M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL is not set
 CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL=y
-# CONFIG_GPIO_IRQ is not set
 
 #
 # Kinetis Configuration Options
 #
+# CONFIG_ARCH_CHIP_MKL25Z64 is not set
 CONFIG_ARCH_CHIP_MKL25Z128=y
 # CONFIG_ARCH_CHIP_MKL26Z128 is not set
 CONFIG_ARCH_FAMILY_KL2X=y
@@ -170,6 +188,7 @@ CONFIG_KL_TPM0_CHANNEL=0
 #
 # Kinetis GPIO Interrupt Configuration
 #
+# CONFIG_KL_GPIOIRQ is not set
 
 #
 # Architecture Options
@@ -182,11 +201,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
@@ -235,14 +257,15 @@ CONFIG_ARCH_BOARD="freedom-kl25z"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -279,6 +302,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=8
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -323,9 +347,10 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -346,6 +371,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=1536
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -356,6 +382,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 CONFIG_PWM=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
@@ -373,17 +400,38 @@ CONFIG_PWM=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -407,14 +455,11 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -431,19 +476,26 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -472,12 +524,7 @@ CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_BINFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -497,6 +544,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -514,7 +565,7 @@ CONFIG_BUILTIN=y
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -536,13 +587,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -559,23 +614,25 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -583,40 +640,48 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 CONFIG_EXAMPLES_PWM=y
 CONFIG_EXAMPLES_PWM_DEVPATH="/dev/pwm0"
 CONFIG_EXAMPLES_PWM_FREQUENCY=100
-CONFIG_EXAMPLES_PWM_DUTYPCT=50
 CONFIG_EXAMPLES_PWM_DURATION=5
-# CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+CONFIG_EXAMPLES_PWM_DUTYPCT=50
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -628,32 +693,28 @@ CONFIG_EXAMPLES_PWM_DURATION=5
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_PPPD is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -672,13 +733,16 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+CONFIG_NSH_DISABLE_BASENAME=y
 # CONFIG_NSH_DISABLE_CAT is not set
 CONFIG_NSH_DISABLE_CD=y
 CONFIG_NSH_DISABLE_CP=y
 # CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
 CONFIG_NSH_DISABLE_DD=y
 CONFIG_NSH_DISABLE_DF=y
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+CONFIG_NSH_DISABLE_DIRNAME=y
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -687,12 +751,13 @@ CONFIG_NSH_DISABLE_GET=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 CONFIG_NSH_DISABLE_IFCONFIG=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 CONFIG_NSH_DISABLE_LOSETUP=y
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 CONFIG_NSH_DISABLE_MKDIR=y
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 CONFIG_NSH_DISABLE_MKRD=y
 # CONFIG_NSH_DISABLE_MH is not set
 CONFIG_NSH_DISABLE_MOUNT=y
@@ -706,12 +771,15 @@ CONFIG_NSH_DISABLE_RMDIR=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+CONFIG_NSH_DISABLE_TIME=y
 # CONFIG_NSH_DISABLE_TEST is not set
 CONFIG_NSH_DISABLE_UMOUNT=y
+CONFIG_NSH_DISABLE_UNAME=y
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 CONFIG_NSH_DISABLE_WGET=y
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -731,6 +799,8 @@ CONFIG_NSH_DISABLESCRIPT=y
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 # CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -744,16 +814,19 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-# CONFIG_SYSTEM_POWEROFF is not set
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/freedom-kl25z/src/freedom-kl25z.h b/configs/freedom-kl25z/src/freedom-kl25z.h
index ca5ce242d818d510d1d50b77fb15741672eb9e6d..8c7c9f00928b1e164da3e7f06f834aba71324bc2 100644
--- a/configs/freedom-kl25z/src/freedom-kl25z.h
+++ b/configs/freedom-kl25z/src/freedom-kl25z.h
@@ -1,8 +1,7 @@
 /****************************************************************************************************
  * configs/freedom-kl25z/src/freedom-kl25z.h
- * arch/arm/src/board/freedom-kl25z.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -137,6 +136,17 @@ void weak_function kl_usbinitialize(void);
 void kl_led_initialize(void);
 #endif
 
+/************************************************************************************
+ * Name: kl_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PWM
+int kl_pwm_setup(void);
+#endif
 
 #endif /* __ASSEMBLY__ */
 #endif /* __CONFIGS_FREEDOM_KL25Z_SRC_FREEDOM_KL25Z_H */
diff --git a/configs/freedom-kl25z/src/kl_adxl345.c b/configs/freedom-kl25z/src/kl_adxl345.c
index 0b68d7a8326ca49aa16f8531b23e7df257fd2d55..7213fcccfa75be9f920f73c0ca1e2576beb20e7d 100644
--- a/configs/freedom-kl25z/src/kl_adxl345.c
+++ b/configs/freedom-kl25z/src/kl_adxl345.c
@@ -183,7 +183,7 @@ static int adxl345_attach(FAR struct adxl345_config_s *state,
 {
   FAR struct kl_adxl345config_s *priv = (FAR struct kl_adxl345config_s *)state;
 
-  snvdbg("Saving handler %p\n", handler);
+  sninfo("Saving handler %p\n", handler);
   DEBUGASSERT(priv);
 
   /* Just save the handler and its argument.  We will use it when interrupts
@@ -211,14 +211,14 @@ static void adxl345_enable(FAR struct adxl345_config_s *state, bool enable)
       /* Configure the interrupt using the SAVED handler */
 
       kl_configgpio(GPIO_ADXL345_INT1);
-      (void)kl_gpioirqattach(GPIO_ADXL345_INT1, adxl345_interrupt);
+      (void)kl_gpioirqattach(GPIO_ADXL345_INT1, adxl345_interrupt, NULL);
       kl_gpioirqenable(GPIO_ADXL345_INT1); 
     }
   else
     {
       /* Configure the interrupt with a NULL handler to disable it */
 
-      (void)kl_gpioirqattach(GPIO_ADXL345_INT1, NULL);
+      (void)kl_gpioirqattach(GPIO_ADXL345_INT1, NULL, NULL);
       kl_gpioirqdisable(GPIO_ADXL345_INT1); 
     }
 
@@ -257,14 +257,14 @@ int adxl345_archinitialize(int minor)
   FAR struct spi_dev_s *dev;
   int ret;
 
-  sndbg("minor %d\n", minor);
+  sninfo("minor %d\n", minor);
   DEBUGASSERT(minor == 0);
 
   /* Check if we are already initialized */
 
   if (!g_adxl345config.handle)
     {
-      snvdbg("Initializing\n");
+      sninfo("Initializing\n");
 
       /* Configure the ADXL345 interrupt pin as an input */
 
@@ -275,7 +275,7 @@ int adxl345_archinitialize(int minor)
       dev = kl_spibus_initialize(CONFIG_ADXL345_SPIDEV);
       if (!dev)
         {
-          sndbg("Failed to initialize SPI bus %d\n", CONFIG_ADXL345_SPIDEV);
+          snerr("ERROR: Failed to initialize SPI bus %d\n", CONFIG_ADXL345_SPIDEV);
           return -ENODEV;
         }
 
@@ -285,7 +285,7 @@ int adxl345_archinitialize(int minor)
         adxl345_instantiate(dev, (FAR struct adxl345_config_s *)&g_adxl345config);
       if (!g_adxl345config.handle)
         {
-          sndbg("Failed to instantiate the ADXL345 driver\n");
+          snerr("ERROR: Failed to instantiate the ADXL345 driver\n");
           return -ENODEV;
         }
 
@@ -294,7 +294,7 @@ int adxl345_archinitialize(int minor)
       ret = adxl345_register(g_adxl345config.handle, CONFIG_ADXL345_DEVMINOR);
       if (ret < 0)
         {
-          sndbg("Failed to register ADXL345 driver: %d\n", ret);
+          snerr("ERROR: Failed to register ADXL345 driver: %d\n", ret);
           return ret;
         }
     }
diff --git a/configs/freedom-kl25z/src/kl_appinit.c b/configs/freedom-kl25z/src/kl_appinit.c
index a00e675cdd87acef4e96afc65eafc46eb5cd6c14..ef425471dd53c1984e376910876cbaecc90dc475 100644
--- a/configs/freedom-kl25z/src/kl_appinit.c
+++ b/configs/freedom-kl25z/src/kl_appinit.c
@@ -45,11 +45,9 @@
 
 #include 
 
-#ifdef CONFIG_LIB_BOARDCTL
+#include "freedom-kl25z.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
+#ifdef CONFIG_LIB_BOARDCTL
 
 /****************************************************************************
  * Public Functions
@@ -80,15 +78,27 @@
 
 int board_app_initialize(uintptr_t arg)
 {
-#if defined(CONFIG_SENSORS_ADXL345)
   int ret;
 
+  #if defined(CONFIG_SENSORS_ADXL345)
   ret = adxl345_archinitialize(0);
   if (ret < 0)
     {
-      dbg("ERROR: adxl345_archinitialize failed: %d\n", ret);
+      syslog(LOG_ERR, "ERROR: adxl345_archinitialize failed: %d\n", ret);
     }
 #endif
+
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device. */
+
+  ret = kl_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: k64_pwm_setup() failed: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
   return OK;
 }
 
diff --git a/configs/freedom-kl25z/src/kl_led.c b/configs/freedom-kl25z/src/kl_led.c
index 6a40bb48b5588c6b7ff0cf650c0f1bacfe0528af..19b7a41983268a4c2deab7a60fa6a7bb7121e0db 100644
--- a/configs/freedom-kl25z/src/kl_led.c
+++ b/configs/freedom-kl25z/src/kl_led.c
@@ -81,38 +81,14 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS)
+#ifdef CONFIG_DEBUG_LEDS_INFO
 #  define led_dumpgpio(m) kl_dumpgpio(GPIO_LED_B, m)
 #else
 #  define led_dumpgpio(m)
 #endif
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/freedom-kl25z/src/kl_pwm.c b/configs/freedom-kl25z/src/kl_pwm.c
index 0d0a73aeb9944de1b08c981de462fa046ff65930..6f43a06daaa3864a1eb9c7b6f202b840d57f599b 100644
--- a/configs/freedom-kl25z/src/kl_pwm.c
+++ b/configs/freedom-kl25z/src/kl_pwm.c
@@ -45,7 +45,7 @@
 #include 
 
 #include 
-#include 
+#include 
 
 #include 
 
@@ -75,15 +75,14 @@ extern struct pwm_lowerhalf_s *kl_pwminitialize(int timer);
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_pwm_setup
+ * Name: kl_pwm_setup
  *
  * Description:
- *   All Kinetis KL architectures must provide the following interface to work with
- *   examples/pwm.
+ *   Initialize PWM and register the PWM device.
  *
  ************************************************************************************/
 
-int board_pwm_setup(void)
+int kl_pwm_setup(void)
 {
   static bool initialized = false;
   struct pwm_lowerhalf_s *pwm;
@@ -98,7 +97,7 @@ int board_pwm_setup(void)
       pwm = kl_pwminitialize(0);
       if (!pwm)
         {
-          adbg("Failed to get the KL25 PWM lower half\n");
+          aerr("ERROR: Failed to get the KL25 PWM lower half\n");
           return -ENODEV;
         }
 
@@ -107,7 +106,7 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/pwm0", pwm);
       if (ret < 0)
         {
-          adbg("pwm_register failed: %d\n", ret);
+          aerr("ERROR: pwm_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/freedom-kl25z/src/kl_spi.c b/configs/freedom-kl25z/src/kl_spi.c
index c674bd45278d87f51b0000eb533275c8cd57c505..5c41ae348c4903b602c8c46e0f271c0a6795113e 100644
--- a/configs/freedom-kl25z/src/kl_spi.c
+++ b/configs/freedom-kl25z/src/kl_spi.c
@@ -51,28 +51,6 @@
 
 #if defined(CONFIG_KL_SPI0) || defined(CONFIG_KL_SPI1)
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -164,7 +142,7 @@ void weak_function kl_spidev_initialize(void)
 void kl_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
                    bool selected)
 {
-  spivdbg("devid: %d CS: %s\n",
+  spiinfo("devid: %d CS: %s\n",
            (int)devid, selected ? "assert" : "de-assert");
 
 #ifdef CONFIG_ADXL345_SPI
@@ -190,7 +168,7 @@ void kl_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
 void kl_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
                    bool selected)
 {
-  spivdbg("devid: %d CS: %s\n",
+  spiinfo("devid: %d CS: %s\n",
            (int)devid, selected ? "assert" : "de-assert");
 }
 #endif
diff --git a/configs/freedom-kl25z/src/kl_tsi.c b/configs/freedom-kl25z/src/kl_tsi.c
index e030caa9e8c737e039901392c5cf86de82fdd895..9f7f1f70cca2138349aabc817afaa76fa44e93c3 100644
--- a/configs/freedom-kl25z/src/kl_tsi.c
+++ b/configs/freedom-kl25z/src/kl_tsi.c
@@ -135,7 +135,7 @@ static void tsi_calibrate(void)
       while (!(getreg32(KL_TSI_GENCS) & TSI_GENCS_EOSF));
 
       g_defcap[i] = getreg32(KL_TSI_DATA) & TSI_DATA_TSICNT_MASK;
-      ivdbg("Sensor %d = %d\n", i+1, g_defcap[i]);
+      iinfo("Sensor %d = %d\n", i+1, g_defcap[i]);
     }
 }
 
@@ -187,7 +187,7 @@ static ssize_t tsi_read(FAR struct file *filep, FAR char *buf, size_t buflen)
 
   g_currdelta = (uint16_t)deltacap;
 
-  ivdbg("Delta for g_channel %d = %d\n", g_channel, g_currdelta);
+  iinfo("Delta for g_channel %d = %d\n", g_channel, g_currdelta);
 
   buf[0] = g_currdelta & 0xff;
   buf[1] = (g_currdelta & 0xff00) >> 8;
diff --git a/configs/freedom-kl25z/src/kl_wifi.c b/configs/freedom-kl25z/src/kl_wifi.c
index 461a681f8850381fa81d38a84ca5efa2101cedf9..0f1810da37b6b2bc3bdee5123c8118b244b2dbce 100644
--- a/configs/freedom-kl25z/src/kl_wifi.c
+++ b/configs/freedom-kl25z/src/kl_wifi.c
@@ -121,7 +121,8 @@ struct kl_config_s
  *   probe            - Debug support
  */
 
-static int  wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler);
+static int  wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler,
+                          FAR void *arg);
 static void wl_enable_irq(FAR struct cc3000_config_s *state, bool enable);
 static void wl_clear_irq(FAR struct cc3000_config_s *state);
 static void wl_select(FAR struct cc3000_config_s *state, bool enable);
@@ -160,6 +161,7 @@ static struct kl_config_s g_cc3000_info =
   .dev.probe            = probe, /* This is used for debugging */
 #endif
   .handler              = NULL,
+  .arg                  = NULL,
 };
 
 /****************************************************************************
@@ -182,13 +184,15 @@ static struct kl_config_s g_cc3000_info =
  *   probe            - Debug support
  */
 
-static int wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler)
+static int wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler,
+                         FAR void *arg)
 {
   FAR struct kl_config_s *priv = (FAR struct kl_config_s *)state;
 
   /* Just save the handler for use when the interrupt is enabled */
 
   priv->handler = handler;
+  priv->arg     = arg;
   return OK;
 }
 
@@ -204,22 +208,22 @@ static void wl_enable_irq(FAR struct cc3000_config_s *state, bool enable)
 
   /* Attach and enable, or detach and disable */
 
-  ivdbg("enable:%d\n", enable);
+  iinfo("enable:%d\n", enable);
   if (enable)
     {
-      (void)kl_gpioirqattach(GPIO_WIFI_INT, priv->handler);
+      (void)kl_gpioirqattach(GPIO_WIFI_INT, priv->handler, priv->arg);
       kl_gpioirqenable(GPIO_WIFI_INT); 
     }
   else
     {
-      (void)kl_gpioirqattach(GPIO_WIFI_INT, NULL);
+      (void)kl_gpioirqattach(GPIO_WIFI_INT, NULL, NULL);
       kl_gpioirqdisable(GPIO_WIFI_INT); 
     }
 }
 
 static void wl_enable_power(FAR struct cc3000_config_s *state, bool enable)
 {
-  ivdbg("enable:%d\n", enable);
+  iinfo("enable:%d\n", enable);
 
   /* Active high enable */
 
@@ -228,7 +232,7 @@ static void wl_enable_power(FAR struct cc3000_config_s *state, bool enable)
 
 static void wl_select(FAR struct cc3000_config_s *state, bool enable)
 {
-  ivdbg("enable:%d\n", enable);
+  iinfo("enable:%d\n", enable);
 
   /* Active high enable */
 
@@ -289,7 +293,7 @@ int wireless_archinitialize(size_t max_rx_size)
 
   /* Init SPI bus */
 
-  idbg("minor %d\n", minor);
+  iinfo("minor %d\n", minor);
   DEBUGASSERT(CONFIG_CC3000_DEVMINOR == 0);
 
 #ifdef CONFIG_CC3000_PROBES
@@ -304,7 +308,7 @@ int wireless_archinitialize(size_t max_rx_size)
   spi = kl_spibus_initialize(CONFIG_CC3000_SPIDEV);
   if (!spi)
     {
-      idbg("Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV);
+      ierr("ERROR: Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV);
       return -ENODEV;
     }
 
@@ -314,7 +318,7 @@ int wireless_archinitialize(size_t max_rx_size)
   int ret = cc3000_register(spi, &g_cc3000_info.dev, CONFIG_CC3000_DEVMINOR);
   if (ret < 0)
     {
-      idbg("Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV);
+      ierr("ERROR: Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV);
       return -ENODEV;
     }
 
diff --git a/configs/freedom-kl26z/README.txt b/configs/freedom-kl26z/README.txt
index 260ee1b6be13b359133463bd83794a5ecc28e93f..6237f71ad9f9ec1518e7ebf9ff0894da25176975 100644
--- a/configs/freedom-kl26z/README.txt
+++ b/configs/freedom-kl26z/README.txt
@@ -272,13 +272,6 @@ instead of configure.sh:
 
 Where  is one of the following:
 
-  minnsh:
-  ------
-
-    This is a experiment to see just how small we can get a usable NSH
-    configuration.  This configuration has far fewer features than the nsh
-    configuration but is also a fraction of the size.
-
   nsh:
   ---
     Configures the NuttShell (nsh) located at apps/examples/nsh.  The
diff --git a/configs/freedom-kl26z/minnsh/Make.defs b/configs/freedom-kl26z/minnsh/Make.defs
deleted file mode 100644
index ed7eb039329957e6800e48b16e1d9df363359f28..0000000000000000000000000000000000000000
--- a/configs/freedom-kl26z/minnsh/Make.defs
+++ /dev/null
@@ -1,124 +0,0 @@
-############################################################################
-# configs/freedom-kl26z/minnsh/Make.defs
-#
-#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
-#   Author: Gregory Nutt 
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name NuttX nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-############################################################################
-
-include ${TOPDIR}/.config
-include ${TOPDIR}/tools/Config.mk
-include ${TOPDIR}/arch/arm/src/armv6-m/Toolchain.defs
-
-LDSCRIPT = ld.script
-
-ifeq ($(WINTOOL),y)
-  # Windows-native toolchains
-  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
-  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
-  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
-else
-  # Linux/Cygwin-native toolchain
-  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
-  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
-  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
-endif
-
-CC = $(CROSSDEV)gcc
-CXX = $(CROSSDEV)g++
-CPP = $(CROSSDEV)gcc -E
-LD = $(CROSSDEV)ld
-AR = $(ARCROSSDEV)ar rcs
-NM = $(ARCROSSDEV)nm
-OBJCOPY = $(CROSSDEV)objcopy
-OBJDUMP = $(CROSSDEV)objdump
-
-ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
-ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
-
-ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
-  ARCHOPTIMIZATION = -g
-endif
-
-ifneq ($(CONFIG_DEBUG_NOOPT),y)
-  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
-endif
-
-ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
-ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
-ARCHWARNINGSXX = -Wall -Wshadow -Wundef
-ARCHDEFINES =
-ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
-
-CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
-CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
-CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
-CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
-CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
-AFLAGS = $(CFLAGS) -D__ASSEMBLY__
-
-NXFLATLDFLAGS1 = -r -d -warn-common
-NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
-LDNXFLATFLAGS = -e main -s 2048
-
-ASMEXT = .S
-OBJEXT = .o
-LIBEXT = .a
-EXEEXT =
-
-ifneq ($(CROSSDEV),arm-nuttx-elf-)
-  LDFLAGS += -nostartfiles -nodefaultlibs
-endif
-ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
-  LDFLAGS += -g
-endif
-
-
-HOSTCC = gcc
-HOSTINCLUDES = -I.
-HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
-HOSTLDFLAGS =
-ifeq ($(CONFIG_HOST_WINDOWS),y)
-  HOSTEXEEXT = .exe
-else
-  HOSTEXEEXT =
-endif
-
-ifeq ($(WINTOOL),y)
-  # Windows-native host tools
-  DIRLINK = $(TOPDIR)/tools/copydir.sh
-  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
-  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
-else
-  # Linux/Cygwin-native host tools
-  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
-endif
-
diff --git a/configs/freedom-kl26z/minnsh/defconfig b/configs/freedom-kl26z/minnsh/defconfig
deleted file mode 100644
index 843bd482e053eab389cb3614ef6c776ec5a70338..0000000000000000000000000000000000000000
--- a/configs/freedom-kl26z/minnsh/defconfig
+++ /dev/null
@@ -1,826 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# Nuttx/ Configuration
-#
-
-#
-# Build Setup
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_DEFAULT_SMALL=y
-CONFIG_HOST_LINUX=y
-# CONFIG_HOST_OSX is not set
-# CONFIG_HOST_WINDOWS is not set
-# CONFIG_HOST_OTHER is not set
-
-#
-# Build Configuration
-#
-# CONFIG_APPS_DIR="../apps"
-CONFIG_BUILD_FLAT=y
-# CONFIG_BUILD_2PASS is not set
-
-#
-# Binary Output Formats
-#
-# CONFIG_RRLOAD_BINARY is not set
-# CONFIG_INTELHEX_BINARY is not set
-CONFIG_MOTOROLA_SREC=y
-CONFIG_RAW_BINARY=y
-# CONFIG_UBOOT_UIMAGE is not set
-
-#
-# Customize Header Files
-#
-# CONFIG_ARCH_STDINT_H is not set
-# CONFIG_ARCH_STDBOOL_H is not set
-# CONFIG_ARCH_MATH_H is not set
-# CONFIG_ARCH_FLOAT_H is not set
-# CONFIG_ARCH_STDARG_H is not set
-
-#
-# Debug Options
-#
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-CONFIG_ARCH_HAVE_STACKCHECK=y
-# CONFIG_STACK_COLORATION is not set
-# CONFIG_DEBUG_SYMBOLS is not set
-CONFIG_ARCH_HAVE_CUSTOMOPT=y
-# CONFIG_DEBUG_NOOPT is not set
-# CONFIG_DEBUG_CUSTOMOPT is not set
-CONFIG_DEBUG_FULLOPT=y
-
-#
-# System Type
-#
-CONFIG_ARCH_ARM=y
-# CONFIG_ARCH_AVR is not set
-# CONFIG_ARCH_HC is not set
-# CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
-# CONFIG_ARCH_SIM is not set
-# CONFIG_ARCH_X86 is not set
-# CONFIG_ARCH_Z16 is not set
-# CONFIG_ARCH_Z80 is not set
-CONFIG_ARCH="arm"
-
-#
-# ARM Options
-#
-# CONFIG_ARCH_CHIP_A1X is not set
-# CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
-# CONFIG_ARCH_CHIP_DM320 is not set
-# CONFIG_ARCH_CHIP_EFM32 is not set
-# CONFIG_ARCH_CHIP_IMX1 is not set
-# CONFIG_ARCH_CHIP_KINETIS is not set
-CONFIG_ARCH_CHIP_KL=y
-# CONFIG_ARCH_CHIP_LM is not set
-# CONFIG_ARCH_CHIP_TIVA is not set
-# CONFIG_ARCH_CHIP_LPC17XX is not set
-# CONFIG_ARCH_CHIP_LPC214X is not set
-# CONFIG_ARCH_CHIP_LPC2378 is not set
-# CONFIG_ARCH_CHIP_LPC31XX is not set
-# CONFIG_ARCH_CHIP_LPC43XX is not set
-# CONFIG_ARCH_CHIP_NUC1XX is not set
-# CONFIG_ARCH_CHIP_SAMA5 is not set
-# CONFIG_ARCH_CHIP_SAMD is not set
-# CONFIG_ARCH_CHIP_SAM34 is not set
-# CONFIG_ARCH_CHIP_STM32 is not set
-# CONFIG_ARCH_CHIP_STR71X is not set
-# CONFIG_ARCH_ARM7TDMI is not set
-# CONFIG_ARCH_ARM926EJS is not set
-# CONFIG_ARCH_ARM920T is not set
-CONFIG_ARCH_CORTEXM0=y
-# CONFIG_ARCH_CORTEXM3 is not set
-# CONFIG_ARCH_CORTEXM4 is not set
-# CONFIG_ARCH_CORTEXA5 is not set
-# CONFIG_ARCH_CORTEXA8 is not set
-CONFIG_ARCH_FAMILY="armv6-m"
-CONFIG_ARCH_CHIP="kl"
-CONFIG_ARCH_HAVE_CMNVECTOR=y
-# CONFIG_ARMV7M_CMNVECTOR is not set
-# CONFIG_ARCH_HAVE_FPU is not set
-
-#
-# ARMV6M Configuration Options
-#
-# CONFIG_ARMV6M_TOOLCHAIN_BUILDROOT is not set
-# CONFIG_ARMV6M_TOOLCHAIN_CODEREDL is not set
-# CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL is not set
-CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL=y
-# CONFIG_GPIO_IRQ is not set
-
-#
-# Kinetis Configuration Options
-#
-# CONFIG_ARCH_CHIP_MKL25Z128 is not set
-CONFIG_ARCH_CHIP_MKL26Z128=y
-CONFIG_ARCH_FAMILY_KL2X=y
-
-#
-# Kinetis Peripheral Support
-#
-# CONFIG_KL_TRACE is not set
-# CONFIG_KL_FLEXBUS is not set
-CONFIG_KL_UART0=y
-# CONFIG_KL_UART1 is not set
-# CONFIG_KL_UART2 is not set
-# CONFIG_KL_FLEXCAN0 is not set
-# CONFIG_KL_FLEXCAN1 is not set
-CONFIG_KL_SPI0=y
-CONFIG_KL_SPI1=y
-# CONFIG_KL_SPI2 is not set
-# CONFIG_KL_I2C0 is not set
-# CONFIG_KL_I2C1 is not set
-# CONFIG_KL_I2S is not set
-# CONFIG_KL_DAC0 is not set
-# CONFIG_KL_DAC1 is not set
-# CONFIG_KL_ADC0 is not set
-# CONFIG_KL_ADC1 is not set
-# CONFIG_KL_CMP is not set
-# CONFIG_KL_VREF is not set
-# CONFIG_KL_TPM0 is not set
-# CONFIG_KL_TPM1 is not set
-# CONFIG_KL_TPM2 is not set
-# CONFIG_KL_LPTIMER is not set
-# CONFIG_KL_RTC is not set
-# CONFIG_KL_EWM is not set
-# CONFIG_KL_CMT is not set
-# CONFIG_KL_USBOTG is not set
-# CONFIG_KL_USBDCD is not set
-# CONFIG_KL_LLWU is not set
-# CONFIG_KL_TSI is not set
-# CONFIG_KL_FTFL is not set
-# CONFIG_KL_DMA is not set
-# CONFIG_KL_CRC is not set
-# CONFIG_KL_PDB is not set
-# CONFIG_KL_PIT is not set
-CONFIG_KL_SYSTICK_CORECLK=y
-# CONFIG_KL_SYSTICK_CORECLK_DIV16 is not set
-
-#
-# Kinetis GPIO Interrupt Configuration
-#
-
-#
-# Architecture Options
-#
-# CONFIG_ARCH_NOINTC is not set
-# CONFIG_ARCH_VECNOTIRQ is not set
-# CONFIG_ARCH_DMA is not set
-CONFIG_ARCH_HAVE_IRQPRIO=y
-# CONFIG_ARCH_L2CACHE is not set
-# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
-# CONFIG_ARCH_HAVE_ADDRENV is not set
-# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
-CONFIG_ARCH_HAVE_VFORK=y
-# CONFIG_ARCH_HAVE_MMU is not set
-# CONFIG_ARCH_HAVE_MPU is not set
-# CONFIG_ARCH_NAND_HWECC is not set
-# CONFIG_ARCH_HAVE_EXTCLK is not set
-# CONFIG_ARCH_IRQPRIO is not set
-# CONFIG_ARCH_STACKDUMP is not set
-# CONFIG_ENDIAN_BIG is not set
-# CONFIG_ARCH_IDLE_CUSTOM is not set
-# CONFIG_ARCH_HAVE_RAMFUNCS is not set
-# CONFIG_ARCH_HAVE_RAMVECTORS is not set
-
-#
-# Board Settings
-#
-CONFIG_BOARD_LOOPSPERMSEC=2988
-# CONFIG_ARCH_CALIBRATION is not set
-
-#
-# Interrupt options
-#
-CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
-CONFIG_ARCH_INTERRUPTSTACK=0
-# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set
-
-#
-# Boot options
-#
-# CONFIG_BOOT_RUNFROMEXTSRAM is not set
-CONFIG_BOOT_RUNFROMFLASH=y
-# CONFIG_BOOT_RUNFROMISRAM is not set
-# CONFIG_BOOT_RUNFROMSDRAM is not set
-# CONFIG_BOOT_COPYTORAM is not set
-
-#
-# Boot Memory Configuration
-#
-CONFIG_RAM_START=0x1FFFF000
-CONFIG_RAM_SIZE=16384
-# CONFIG_ARCH_HAVE_SDRAM is not set
-
-#
-# Board Selection
-#
-# CONFIG_ARCH_BOARD_FREEDOM_KL25Z is not set
-CONFIG_ARCH_BOARD_FREEDOM_KL26Z=y
-# CONFIG_ARCH_BOARD_CUSTOM is not set
-CONFIG_ARCH_BOARD="freedom-kl26z"
-
-#
-# Common Board Options
-#
-CONFIG_ARCH_HAVE_LEDS=y
-CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
-
-#
-# Board-Specific Options
-#
-
-#
-# RTOS Features
-#
-CONFIG_DISABLE_OS_API=y
-CONFIG_DISABLE_POSIX_TIMERS=y
-CONFIG_DISABLE_PTHREAD=y
-CONFIG_DISABLE_SIGNALS=y
-CONFIG_DISABLE_MQUEUE=y
-CONFIG_DISABLE_ENVIRON=y
-
-#
-# Clocks and Timers
-#
-CONFIG_USEC_PER_TICK=10000
-# CONFIG_SYSTEM_TIME64 is not set
-# CONFIG_CLOCK_MONOTONIC is not set
-# CONFIG_JULIAN_TIME is not set
-CONFIG_START_YEAR=2013
-CONFIG_START_MONTH=2
-CONFIG_START_DAY=26
-CONFIG_MAX_WDOGPARMS=2
-CONFIG_PREALLOC_WDOGS=4
-CONFIG_WDOG_INTRESERVE=0
-CONFIG_PREALLOC_TIMERS=0
-
-#
-# Tasks and Scheduling
-#
-# CONFIG_INIT_NONE is not set
-CONFIG_INIT_ENTRYPOINT=y
-# CONFIG_INIT_FILEPATH is not set
-CONFIG_USER_ENTRYPOINT="nsh_main"
-CONFIG_RR_INTERVAL=0
-CONFIG_TASK_NAME_SIZE=0
-CONFIG_MAX_TASKS=8
-# CONFIG_SCHED_HAVE_PARENT is not set
-# CONFIG_SCHED_WAITPID is not set
-
-#
-# Performance Monitoring
-#
-# CONFIG_SCHED_CPULOAD is not set
-# CONFIG_SCHED_INSTRUMENTATION is not set
-
-#
-# Files and I/O
-#
-# CONFIG_DEV_CONSOLE is not set
-CONFIG_FDCLONE_DISABLE=y
-# CONFIG_FDCLONE_STDIO is not set
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_NFILE_DESCRIPTORS=0
-CONFIG_NFILE_STREAMS=0
-CONFIG_NAME_MAX=32
-# CONFIG_PRIORITY_INHERITANCE is not set
-
-#
-# RTOS hooks
-#
-# CONFIG_BOARD_INITIALIZE is not set
-# CONFIG_SCHED_STARTHOOK is not set
-# CONFIG_SCHED_ATEXIT is not set
-# CONFIG_SCHED_ONEXIT is not set
-
-#
-# Work Queue Support
-#
-
-#
-# Stack and heap information
-#
-CONFIG_IDLETHREAD_STACKSIZE=1024
-CONFIG_USERMAIN_STACKSIZE=1536
-CONFIG_PTHREAD_STACK_MIN=256
-CONFIG_PTHREAD_STACK_DEFAULT=1536
-# CONFIG_LIB_SYSCALL is not set
-
-#
-# Device Drivers
-#
-CONFIG_DISABLE_POLL=y
-# CONFIG_DEV_NULL is not set
-# CONFIG_DEV_ZERO is not set
-# CONFIG_DEV_LOOP is not set
-
-#
-# Buffering
-#
-# CONFIG_DRVR_WRITEBUFFER is not set
-# CONFIG_DRVR_READAHEAD is not set
-# CONFIG_RAMDISK is not set
-# CONFIG_CAN is not set
-# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
-# CONFIG_PWM is not set
-# CONFIG_ARCH_HAVE_I2CRESET is not set
-# CONFIG_I2C is not set
-CONFIG_SPI=y
-CONFIG_SPI_EXCHANGE=y
-# CONFIG_SPI_CMDDATA is not set
-# CONFIG_SPI_BITBANG is not set
-# CONFIG_I2S is not set
-# CONFIG_RTC is not set
-# CONFIG_WATCHDOG is not set
-# CONFIG_TIMER is not set
-# CONFIG_ANALOG is not set
-# CONFIG_AUDIO_DEVICES is not set
-# CONFIG_VIDEO_DEVICES is not set
-# CONFIG_BCH is not set
-# CONFIG_INPUT is not set
-# CONFIG_LCD is not set
-# CONFIG_MMCSD is not set
-# CONFIG_MTD is not set
-# CONFIG_EEPROM is not set
-# CONFIG_PIPES is not set
-# CONFIG_PM is not set
-# CONFIG_POWER is not set
-# CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
-CONFIG_SERIAL=y
-# CONFIG_16550_UART is not set
-# CONFIG_UART_SERIALDRIVER is not set
-CONFIG_UART0_SERIALDRIVER=y
-# CONFIG_UART1_SERIALDRIVER is not set
-# CONFIG_UART2_SERIALDRIVER is not set
-# CONFIG_UART3_SERIALDRIVER is not set
-# CONFIG_UART4_SERIALDRIVER is not set
-# CONFIG_UART5_SERIALDRIVER is not set
-# CONFIG_UART6_SERIALDRIVER is not set
-# CONFIG_UART7_SERIALDRIVER is not set
-# CONFIG_UART8_SERIALDRIVER is not set
-# CONFIG_SCI0_SERIALDRIVER is not set
-# CONFIG_SCI1_SERIALDRIVER is not set
-# CONFIG_USART0_SERIALDRIVER is not set
-# CONFIG_USART1_SERIALDRIVER is not set
-# CONFIG_USART2_SERIALDRIVER is not set
-# CONFIG_USART3_SERIALDRIVER is not set
-# CONFIG_USART4_SERIALDRIVER is not set
-# CONFIG_USART5_SERIALDRIVER is not set
-# CONFIG_USART6_SERIALDRIVER is not set
-# CONFIG_USART7_SERIALDRIVER is not set
-# CONFIG_USART8_SERIALDRIVER is not set
-# CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
-CONFIG_MCU_SERIAL=y
-# CONFIG_STANDARD_SERIAL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
-# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
-CONFIG_UART0_SERIAL_CONSOLE=y
-# CONFIG_OTHER_SERIAL_CONSOLE is not set
-# CONFIG_NO_SERIAL_CONSOLE is not set
-
-#
-# UART0 Configuration
-#
-CONFIG_UART0_RXBUFSIZE=256
-CONFIG_UART0_TXBUFSIZE=256
-CONFIG_UART0_BAUD=115200
-CONFIG_UART0_BITS=8
-CONFIG_UART0_PARITY=0
-CONFIG_UART0_2STOP=0
-# CONFIG_UART0_IFLOWCONTROL is not set
-# CONFIG_UART0_OFLOWCONTROL is not set
-# CONFIG_USBDEV is not set
-# CONFIG_USBHOST is not set
-# CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
-
-#
-# System Logging
-#
-# CONFIG_RAMLOG is not set
-
-#
-# Networking Support
-#
-# CONFIG_ARCH_HAVE_NET is not set
-# CONFIG_ARCH_HAVE_PHY is not set
-# CONFIG_NET is not set
-
-#
-# Crypto API
-#
-# CONFIG_CRYPTO is not set
-
-#
-# File Systems
-#
-
-#
-# File system configuration
-#
-CONFIG_DISABLE_MOUNTPOINT=y
-CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
-# CONFIG_FS_READABLE is not set
-# CONFIG_FS_WRITABLE is not set
-# CONFIG_FS_NAMED_SEMAPHORES is not set
-# CONFIG_FS_RAMMAP is not set
-# CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
-#
-# Graphics Support
-#
-# CONFIG_NX is not set
-
-#
-# Memory Management
-#
-CONFIG_MM_SMALL=y
-CONFIG_MM_REGIONS=1
-# CONFIG_ARCH_HAVE_HEAP2 is not set
-# CONFIG_GRAN is not set
-
-#
-# Audio Support
-#
-# CONFIG_AUDIO is not set
-
-#
-# Binary Loader
-#
-# CONFIG_BINFMT_DISABLE is not set
-# CONFIG_NXFLAT is not set
-# CONFIG_ELF is not set
-# CONFIG_BUILTIN is not set
-# CONFIG_PIC is not set
-# CONFIG_SYMTAB_ORDEREDBYNAME is not set
-
-#
-# Library Routines
-#
-
-#
-# Standard C Library Options
-#
-CONFIG_STDIO_BUFFER_SIZE=0
-CONFIG_STDIO_LINEBUFFER=y
-CONFIG_NUNGET_CHARS=0
-# CONFIG_LIBM is not set
-CONFIG_NOPRINTF_FIELDWIDTH=y
-# CONFIG_LIBC_FLOATINGPOINT is not set
-# CONFIG_LIBC_LONG_LONG is not set
-# CONFIG_LIBC_IOCTL_VARIADIC is not set
-CONFIG_LIB_RAND_ORDER=1
-# CONFIG_EOL_IS_CR is not set
-# CONFIG_EOL_IS_LF is not set
-# CONFIG_EOL_IS_BOTH_CRLF is not set
-CONFIG_EOL_IS_EITHER_CRLF=y
-# CONFIG_LIBC_EXECFUNCS is not set
-CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
-CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536
-# CONFIG_LIBC_STRERROR is not set
-# CONFIG_LIBC_PERROR_STDOUT is not set
-CONFIG_ARCH_LOWPUTC=y
-CONFIG_LIB_SENDFILE_BUFSIZE=512
-# CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
-
-#
-# Non-standard Library Support
-#
-# CONFIG_LIB_KBDCODEC is not set
-# CONFIG_LIB_SLCDCODEC is not set
-
-#
-# Basic CXX Support
-#
-# CONFIG_C99_BOOL8 is not set
-# CONFIG_HAVE_CXX is not set
-
-#
-# Application Configuration
-#
-
-#
-# Built-In Applications
-#
-
-#
-# Examples
-#
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
-# CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
-# CONFIG_EXAMPLES_DHCPD is not set
-# CONFIG_EXAMPLES_ELF is not set
-# CONFIG_EXAMPLES_FTPC is not set
-# CONFIG_EXAMPLES_FTPD is not set
-# CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
-# CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
-# CONFIG_EXAMPLES_IGMP is not set
-# CONFIG_EXAMPLES_MM is not set
-# CONFIG_EXAMPLES_MODBUS is not set
-# CONFIG_EXAMPLES_MOUNT is not set
-# CONFIG_EXAMPLES_NRF24L01TERM is not set
-CONFIG_EXAMPLES_NSH=y
-# CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
-# CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
-# CONFIG_EXAMPLES_NXHELLO is not set
-# CONFIG_EXAMPLES_NXIMAGE is not set
-# CONFIG_EXAMPLES_NXLINES is not set
-# CONFIG_EXAMPLES_NXTEXT is not set
-# CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
-# CONFIG_EXAMPLES_SENDMAIL is not set
-# CONFIG_EXAMPLES_SERIALBLASTER is not set
-# CONFIG_EXAMPLES_SERIALRX is not set
-# CONFIG_EXAMPLES_SERLOOP is not set
-# CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART is not set
-# CONFIG_EXAMPLES_TCPECHO is not set
-# CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
-# CONFIG_EXAMPLES_TIFF is not set
-# CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
-# CONFIG_EXAMPLES_USBTERM is not set
-# CONFIG_EXAMPLES_WATCHDOG is not set
-
-#
-# Graphics Support
-#
-# CONFIG_TIFF is not set
-# CONFIG_GRAPHICS_TRAVELER is not set
-
-#
-# Interpreters
-#
-# CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
-# CONFIG_INTERPRETERS_MICROPYTHON is not set
-
-#
-# Network Utilities
-#
-
-#
-# Networking Utilities
-#
-# CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
-# CONFIG_NETUTILS_JSON is not set
-# CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
-#
-# NSH Library
-#
-CONFIG_NSH_LIBRARY=y
-
-#
-# Command Line Configuration
-#
-CONFIG_NSH_READLINE=y
-# CONFIG_NSH_CLE is not set
-CONFIG_NSH_LINELEN=80
-CONFIG_NSH_DISABLE_SEMICOLON=y
-CONFIG_NSH_MAXARGUMENTS=6
-# CONFIG_NSH_ARGCAT is not set
-CONFIG_NSH_NESTDEPTH=3
-# CONFIG_NSH_DISABLEBG is not set
-
-#
-# Disable Individual commands
-#
-CONFIG_NSH_DISABLE_ADDROUTE=y
-# CONFIG_NSH_DISABLE_CAT is not set
-CONFIG_NSH_DISABLE_CD=y
-CONFIG_NSH_DISABLE_CP=y
-# CONFIG_NSH_DISABLE_CMP is not set
-CONFIG_NSH_DISABLE_DD=y
-CONFIG_NSH_DISABLE_DF=y
-CONFIG_NSH_DISABLE_DELROUTE=y
-# CONFIG_NSH_DISABLE_ECHO is not set
-# CONFIG_NSH_DISABLE_EXEC is not set
-# CONFIG_NSH_DISABLE_EXIT is not set
-# CONFIG_NSH_DISABLE_FREE is not set
-CONFIG_NSH_DISABLE_GET=y
-# CONFIG_NSH_DISABLE_HELP is not set
-# CONFIG_NSH_DISABLE_HEXDUMP is not set
-CONFIG_NSH_DISABLE_IFCONFIG=y
-# CONFIG_NSH_DISABLE_KILL is not set
-CONFIG_NSH_DISABLE_LOSETUP=y
-# CONFIG_NSH_DISABLE_LS is not set
-# CONFIG_NSH_DISABLE_MB is not set
-CONFIG_NSH_DISABLE_MKDIR=y
-# CONFIG_NSH_DISABLE_MKFIFO is not set
-CONFIG_NSH_DISABLE_MKRD=y
-# CONFIG_NSH_DISABLE_MH is not set
-CONFIG_NSH_DISABLE_MOUNT=y
-# CONFIG_NSH_DISABLE_MW is not set
-# CONFIG_NSH_DISABLE_PS is not set
-CONFIG_NSH_DISABLE_PUT=y
-# CONFIG_NSH_DISABLE_PWD is not set
-CONFIG_NSH_DISABLE_RM=y
-CONFIG_NSH_DISABLE_RMDIR=y
-# CONFIG_NSH_DISABLE_SET is not set
-# CONFIG_NSH_DISABLE_SH is not set
-# CONFIG_NSH_DISABLE_SLEEP is not set
-# CONFIG_NSH_DISABLE_TEST is not set
-CONFIG_NSH_DISABLE_UMOUNT=y
-# CONFIG_NSH_DISABLE_UNSET is not set
-# CONFIG_NSH_DISABLE_USLEEP is not set
-CONFIG_NSH_DISABLE_WGET=y
-# CONFIG_NSH_DISABLE_XD is not set
-
-#
-# Configure Command Options
-#
-CONFIG_NSH_CODECS_BUFSIZE=128
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-CONFIG_NSH_FILEIOSIZE=64
-
-#
-# Scripting Support
-#
-CONFIG_NSH_DISABLESCRIPT=y
-
-#
-# Console Configuration
-#
-CONFIG_NSH_CONSOLE=y
-# CONFIG_NSH_ALTCONDEV is not set
-# CONFIG_NSH_ARCHINIT is not set
-
-#
-# NxWidgets/NxWM
-#
-
-#
-# Platform-specific Support
-#
-# CONFIG_PLATFORM_CONFIGDATA is not set
-
-#
-# System Libraries and NSH Add-Ons
-#
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# EMACS-like Command Line Editor
-#
-# CONFIG_SYSTEM_CLE is not set
-
-#
-# CU Minimal Terminal
-#
-# CONFIG_SYSTEM_CUTERM is not set
-
-#
-# FLASH Program Installation
-#
-# CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# Intel HEX to binary conversion
-#
-# CONFIG_SYSTEM_HEX2BIN is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# NxPlayer media player library / command Line
-#
-
-#
-# RAM test
-#
-# CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
-CONFIG_SYSTEM_READLINE=y
-CONFIG_READLINE_ECHO=y
-
-#
-# P-Code Support
-#
-
-#
-# PHY Tool
-#
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sudoku
-#
-# CONFIG_SYSTEM_SUDOKU is not set
-
-#
-# Sysinfo
-#
-
-#
-# Temperature
-#
-
-#
-# VI Work-Alike Editor
-#
-# CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# USB Monitor
-#
-
-#
-# Zmodem Commands
-#
-# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/freedom-kl26z/nsh/Make.defs b/configs/freedom-kl26z/nsh/Make.defs
index 2b9689badcf39be8119c85f0d4317b1a3d2f2f41..4d982e93b7fd0047ec585ff36eebfa9eea5da350 100644
--- a/configs/freedom-kl26z/nsh/Make.defs
+++ b/configs/freedom-kl26z/nsh/Make.defs
@@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/freedom-kl26z/nsh/defconfig b/configs/freedom-kl26z/nsh/defconfig
index 40157e1b53ba948be24e35c0c525af8024bf512a..120119687e05837a9a6f5488a2397acc96eca1a9 100644
--- a/configs/freedom-kl26z/nsh/defconfig
+++ b/configs/freedom-kl26z/nsh/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -71,14 +72,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 CONFIG_ARCH_CHIP_KL=y
 # CONFIG_ARCH_CHIP_LM is not set
 # CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -87,10 +89,15 @@ CONFIG_ARCH_CHIP_KL=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -100,13 +107,24 @@ CONFIG_ARCH_CORTEXM0=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv6-m"
 CONFIG_ARCH_CHIP="kl"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 
 #
 # ARMV6M Configuration Options
@@ -115,11 +133,12 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV6M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL is not set
 CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL=y
-# CONFIG_GPIO_IRQ is not set
+# CONFIG_KL_GPIOIRQ is not set
 
 #
 # Kinetis Configuration Options
 #
+# CONFIG_ARCH_CHIP_MKL25Z64 is not set
 # CONFIG_ARCH_CHIP_MKL25Z128 is not set
 CONFIG_ARCH_CHIP_MKL26Z128=y
 CONFIG_ARCH_FAMILY_KL2X=y
@@ -182,11 +201,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
@@ -241,8 +263,9 @@ CONFIG_NSH_MMCSDMINOR=0
 # Board-Specific Options
 #
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -279,6 +302,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=8
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -323,9 +347,10 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -356,6 +381,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 CONFIG_PWM=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
@@ -373,17 +399,33 @@ CONFIG_PWM=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -407,14 +449,11 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -431,19 +470,23 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -472,12 +515,7 @@ CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_BINFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -497,6 +535,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -514,7 +556,7 @@ CONFIG_BUILTIN=y
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -536,11 +578,14 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -559,11 +604,14 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -571,11 +619,11 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -583,40 +631,49 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 CONFIG_EXAMPLES_PWM=y
 CONFIG_EXAMPLES_PWM_DEVPATH="/dev/pwm0"
 CONFIG_EXAMPLES_PWM_FREQUENCY=100
-CONFIG_EXAMPLES_PWM_DUTYPCT=50
 CONFIG_EXAMPLES_PWM_DURATION=5
-# CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+CONFIG_EXAMPLES_PWM_DUTYPCT=50
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -628,32 +685,28 @@ CONFIG_EXAMPLES_PWM_DURATION=5
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_PPPD is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -672,13 +725,16 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+CONFIG_NSH_DISABLE_BASENAME=y
 # CONFIG_NSH_DISABLE_CAT is not set
 CONFIG_NSH_DISABLE_CD=y
 CONFIG_NSH_DISABLE_CP=y
 # CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
 CONFIG_NSH_DISABLE_DD=y
 CONFIG_NSH_DISABLE_DF=y
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+CONFIG_NSH_DISABLE_DIRNAME=y
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -687,8 +743,10 @@ CONFIG_NSH_DISABLE_GET=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 CONFIG_NSH_DISABLE_IFCONFIG=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 CONFIG_NSH_DISABLE_LOSETUP=y
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 CONFIG_NSH_DISABLE_MKDIR=y
@@ -706,8 +764,10 @@ CONFIG_NSH_DISABLE_RMDIR=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+CONFIG_NSH_DISABLE_TIME=y
 # CONFIG_NSH_DISABLE_TEST is not set
 CONFIG_NSH_DISABLE_UMOUNT=y
+CONFIG_NSH_DISABLE_UNAME=y
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 CONFIG_NSH_DISABLE_WGET=y
@@ -731,6 +791,8 @@ CONFIG_NSH_DISABLESCRIPT=y
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 # CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -744,16 +806,19 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-# CONFIG_SYSTEM_POWEROFF is not set
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/freedom-kl26z/src/freedom-kl26z.h b/configs/freedom-kl26z/src/freedom-kl26z.h
index 053101db5b92447d8819687bb23e1b0cf71ac804..e1207149792f458005d1943d9a1e1ab33c50055d 100644
--- a/configs/freedom-kl26z/src/freedom-kl26z.h
+++ b/configs/freedom-kl26z/src/freedom-kl26z.h
@@ -136,5 +136,17 @@ void weak_function kl_usbinitialize(void);
 void kl_led_initialize(void);
 #endif
 
+/************************************************************************************
+ * Name: kl_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PWM
+int kl_pwm_setup(void);
+#endif
+
 #endif /* __ASSEMBLY__ */
 #endif /* __CONFIGS_FREEDOM_KL26Z_SRC_FREEDOM_KL26Z_H */
diff --git a/configs/freedom-kl26z/src/kl_appinit.c b/configs/freedom-kl26z/src/kl_appinit.c
index 96ac70a0617e389ba9dee0d328221869b7d1f797..6b6550c91551ade28a87ee0165615ebb540da5c7 100644
--- a/configs/freedom-kl26z/src/kl_appinit.c
+++ b/configs/freedom-kl26z/src/kl_appinit.c
@@ -40,14 +40,13 @@
 #include 
 
 #include 
+#include 
 
 #include 
 
-#ifdef CONFIG_LIB_BOARDCTL
+#include "freedom-kl26z.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
+#ifdef CONFIG_LIB_BOARDCTL
 
 /****************************************************************************
  * Public Functions
@@ -78,6 +77,19 @@
 
 int board_app_initialize(uintptr_t arg)
 {
+  int ret;
+
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device. */
+
+  ret = kl_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: kl_pwm_setup() failed: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
   return OK;
 }
 
diff --git a/configs/freedom-kl26z/src/kl_boardinitialize.c b/configs/freedom-kl26z/src/kl_boardinitialize.c
index 3a3be5190a275536694f15c73a20505efafc030b..f976a86727e7e1506885fb26489b762016d85d2b 100644
--- a/configs/freedom-kl26z/src/kl_boardinitialize.c
+++ b/configs/freedom-kl26z/src/kl_boardinitialize.c
@@ -47,14 +47,6 @@
 #include "up_arch.h"
 #include "freedom-kl26z.h"
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
diff --git a/configs/freedom-kl26z/src/kl_led.c b/configs/freedom-kl26z/src/kl_led.c
index a729917dca471b3e302ec79c28fff097256d76ad..3c8d07ab20968d08ac62f6b21117514fa0edff77 100644
--- a/configs/freedom-kl26z/src/kl_led.c
+++ b/configs/freedom-kl26z/src/kl_led.c
@@ -81,38 +81,14 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS)
+#ifdef CONFIG_DEBUG_LEDS_INFO
 #  define led_dumpgpio(m) kl_dumpgpio(GPIO_LED_B, m)
 #else
 #  define led_dumpgpio(m)
 #endif
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/freedom-kl26z/src/kl_pwm.c b/configs/freedom-kl26z/src/kl_pwm.c
index 4faf9cabe8d07eb233c51392ce607091be9cb42e..d256e2281eada38b7005687d8b42744946c51540 100644
--- a/configs/freedom-kl26z/src/kl_pwm.c
+++ b/configs/freedom-kl26z/src/kl_pwm.c
@@ -45,7 +45,7 @@
 #include 
 
 #include 
-#include 
+#include 
 
 #include 
 
@@ -66,24 +66,19 @@
 
 extern struct pwm_lowerhalf_s *kl_pwminitialize(int timer);
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_pwm_setup
+ * Name: kl_pwm_setup
  *
  * Description:
- *   All Kinetis KL architectures must provide the following interface to work with
- *   examples/pwm.
+ *   Initialize PWM and register the PWM device.
  *
  ************************************************************************************/
 
-int board_pwm_setup(void)
+int kl_pwm_setup(void)
 {
   static bool initialized = false;
   struct pwm_lowerhalf_s *pwm;
@@ -98,7 +93,7 @@ int board_pwm_setup(void)
       pwm = kl_pwminitialize(0);
       if (!pwm)
         {
-          adbg("Failed to get the KL26 PWM lower half\n");
+          aerr("ERROR: Failed to get the KL26 PWM lower half\n");
           return -ENODEV;
         }
 
@@ -107,7 +102,7 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/pwm0", pwm);
       if (ret < 0)
         {
-          adbg("pwm_register failed: %d\n", ret);
+          aerr("ERROR: pwm_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/freedom-kl26z/src/kl_spi.c b/configs/freedom-kl26z/src/kl_spi.c
index 21d4052e82b616b6bb7259a107b6cc7dd16bfe3d..9b3cd6ff24090c2a54395e201fcd6d57bb948596 100644
--- a/configs/freedom-kl26z/src/kl_spi.c
+++ b/configs/freedom-kl26z/src/kl_spi.c
@@ -51,28 +51,6 @@
 
 #if defined(CONFIG_KL_SPI0) || defined(CONFIG_KL_SPI1)
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -155,7 +133,7 @@ void weak_function kl_spidev_initialize(void)
 void kl_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
                    bool selected)
 {
-  spivdbg("devid: %d CS: %s\n",
+  spiinfo("devid: %d CS: %s\n",
            (int)devid, selected ? "assert" : "de-assert");
 }
 #endif
@@ -164,7 +142,7 @@ void kl_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
 void kl_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
                    bool selected)
 {
-  spivdbg("devid: %d CS: %s\n",
+  spiinfo("devid: %d CS: %s\n",
            (int)devid, selected ? "assert" : "de-assert");
 }
 #endif
diff --git a/configs/freedom-kl26z/src/kl_tsi.c b/configs/freedom-kl26z/src/kl_tsi.c
index 95392082e0bb91ed44de9962ade3658e1983c7b8..1d4a283772006557b6e827bdd758d3b91722e92a 100644
--- a/configs/freedom-kl26z/src/kl_tsi.c
+++ b/configs/freedom-kl26z/src/kl_tsi.c
@@ -135,7 +135,7 @@ static void tsi_calibrate(void)
       while (!(getreg32(KL_TSI_GENCS) & TSI_GENCS_EOSF));
 
       g_defcap[i] = getreg32(KL_TSI_DATA) & TSI_DATA_TSICNT_MASK;
-      ivdbg("Sensor %d = %d\n", i+1, g_defcap[i]);
+      iinfo("Sensor %d = %d\n", i+1, g_defcap[i]);
     }
 }
 
@@ -187,7 +187,7 @@ static ssize_t tsi_read(FAR struct file *filep, FAR char *buf, size_t buflen)
 
   g_currdelta = (uint16_t)deltacap;
 
-  ivdbg("Delta for g_channel %d = %d\n", g_channel, g_currdelta);
+  iinfo("Delta for g_channel %d = %d\n", g_channel, g_currdelta);
 
   buf[0] = g_currdelta & 0xff;
   buf[1] = (g_currdelta & 0xff00) >> 8;
diff --git a/configs/hymini-stm32v/README.txt b/configs/hymini-stm32v/README.txt
index b808bad2c745863cb845b4f47d488b50c9e44b16..7a7a83c69a4c478b795ecc1d4d8c3be098289d45 100644
--- a/configs/hymini-stm32v/README.txt
+++ b/configs/hymini-stm32v/README.txt
@@ -478,10 +478,10 @@ HY-Mini specific Configuration Options
 
     CONFIG_SDIO_DMA - Support DMA data transfers.  Requires CONFIG_STM32_SDIO
       and CONFIG_STM32_DMA2.
-    CONFIG_SDIO_PRI - Select SDIO interrupt prority.  Default: 128
-    CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
+    CONFIG_STM32_SDIO_PRI - Select SDIO interrupt prority.  Default: 128
+    CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
       Default:  Medium
-    CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode.  Default:
+    CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode.  Default:
       4-bit transfer mode.
     CONFIG_MMCSD_HAVECARDDETECT - Select if SDIO driver card detection
       is 100% accurate  (it is on the  HY-MiniSTM32V)
@@ -502,7 +502,7 @@ HY-Mini specific Configuration Options
     CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
     CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
     CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
-    CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+    CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
       dump of all CAN registers.
 
   HY-MiniSTM32V LCD Hardware Configuration.  The HY-Mini board may be delivered with
@@ -561,14 +561,6 @@ can be selected as follow:
 
 Where  is one of the following:
 
-  buttons:
-  --------
-
-    Uses apps/examples/buttons to exercise HY-MiniSTM32V buttons and
-    button interrupts.
-
-    CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y  : Generic GNU EABI toolchain
-
   nsh and nsh2:
   ------------
     Configure the NuttShell (nsh) located at examples/nsh.
@@ -599,7 +591,6 @@ Where  is one of the following:
     Built-in    None                    apps/examples/nx
     Apps                                apps/examples/nxhello
                                         apps/system/usbmsc (4)
-                                        apps/examples/buttons
                                         apps/examples/nximage
     =========== ======================= ================================
 
@@ -650,7 +641,6 @@ Where  is one of the following:
     1. This configuration does have UART2 output enabled and set up as
        the system logging device:
 
-       CONFIG_SYSLOG=y                    : Enable output to syslog, not console
        CONFIG_SYSLOG_CHAR=y               : Use a character device for system logging
        CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART2 will be /dev/ttyS0
 
@@ -668,16 +658,16 @@ Where  is one of the following:
        CONFIG_USBDEV_TRACE_NRECORDS=128        : Buffer 128 records in memory
        CONFIG_NSH_USBDEV_TRACE=n               : No builtin tracing from NSH
        CONFIG_NSH_ARCHINIT=y                   : Automatically start the USB monitor
-       CONFIG_SYSTEM_USBMONITOR=y              : Enable the USB monitor daemon
-       CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
-       CONFIG_SYSTEM_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
-       CONFIG_SYSTEM_USBMONITOR_INTERVAL=2     : Dump trace data every 2 seconds
+       CONFIG_USBMONITOR=y              : Enable the USB monitor daemon
+       CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
+       CONFIG_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
+       CONFIG_USBMONITOR_INTERVAL=2     : Dump trace data every 2 seconds
 
-       CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y    : Enable TRACE output
-       CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y
-       CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y
-       CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y
-       CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y
+       CONFIG_USBMONITOR_TRACEINIT=y    : Enable TRACE output
+       CONFIG_USBMONITOR_TRACECLASS=y
+       CONFIG_USBMONITOR_TRACETRANSFERS=y
+       CONFIG_USBMONITOR_TRACECONTROLLER=y
+       CONFIG_USBMONITOR_TRACEINTERRUPTS=y
 
 
     Using the Prolifics PL2303 Emulation
@@ -702,11 +692,11 @@ Where  is one of the following:
     USB debug output can be enabled as by changing the following
     settings in the configuration file:
 
-      -CONFIG_DEBUG=n
-      -CONFIG_DEBUG_VERBOSE=n
+      -CONFIG_DEBUG_FEATURES=n
+      -CONFIG_DEBUG_INFO=n
       -CONFIG_DEBUG_USB=n
-      +CONFIG_DEBUG=y
-      +CONFIG_DEBUG_VERBOSE=y
+      +CONFIG_DEBUG_FEATURES=y
+      +CONFIG_DEBUG_INFO=y
       +CONFIG_DEBUG_USB=y
 
       -CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=n
diff --git a/configs/hymini-stm32v/buttons/setenv.sh b/configs/hymini-stm32v/buttons/setenv.sh
deleted file mode 100755
index df0dba3180365deafc6e9f48a4aa6326eb3c9667..0000000000000000000000000000000000000000
--- a/configs/hymini-stm32v/buttons/setenv.sh
+++ /dev/null
@@ -1,47 +0,0 @@
-#!/bin/bash
-# configs/hymini-stm32v/buttons/setenv.sh
-#
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
-#   Author: Gregory Nutt 
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name NuttX nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-
-if [ "$(basename $0)" = "setenv.sh" ] ; then
-  echo "You must source this script, not run it!" 1>&2
-  exit 1
-fi
-
-if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi
-
-WD=`pwd`
-export RIDE_BIN="/cygdrive/c/Program Files/Raisonance/Ride/arm-gcc/bin"
-export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
-export PATH="${BUILDROOT_BIN}:${RIDE_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
-
-echo "PATH : ${PATH}"
diff --git a/configs/hymini-stm32v/include/board.h b/configs/hymini-stm32v/include/board.h
index ba55bdecdfad2f44ee07e1794dbd1a03acc86d36..4bbb1b92ba86fd65ad0b30dda887848c67d35b3b 100644
--- a/configs/hymini-stm32v/include/board.h
+++ b/configs/hymini-stm32v/include/board.h
@@ -1,9 +1,10 @@
 /************************************************************************************
  * configs/hymini-stm32v/include/board.h
- * include/arch/board/board.h
  *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Copyright (C) 2011 Laurent Latil. All rights reserved.
  *   Author: Laurent Latil 
+ *           Gregory Nutt 
  *
  * Derives, in part, from configs/stm3210e-eval/include/board.h
  *
@@ -98,14 +99,14 @@
 #define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd2
 #define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
 
-/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */
+/* APB1 timers 2-7 will be twice PCLK1 */
 
 #define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM5_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM6_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM7_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 
 /* USB divider -- Divide PLL clock by 1.5 */
 
@@ -115,8 +116,14 @@
  * otherwise frequency is 2xAPBx.
  * Note: TIM1,8 are on APB2, others on APB1 */
 
-#define STM32_TIM18_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_TIM27_FREQUENCY   STM32_HCLK_FREQUENCY
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM3_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM4_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM5_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM6_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM7_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM8_FREQUENCY    STM32_HCLK_FREQUENCY
 
 /* SDIO dividers.  Note that slower clocking is required when DMA is disabled
  * in order to avoid RX overrun/TX underrun errors due to delayed responses
@@ -132,7 +139,7 @@
  * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz
  */
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_STM32_SDIO_DMA
 #  define SDIO_MMCXFR_CLKDIV    (2 << SDIO_CLKCR_CLKDIV_SHIFT)
 #else
 #  define SDIO_MMCXFR_CLKDIV    (3 << SDIO_CLKCR_CLKDIV_SHIFT)
@@ -142,7 +149,7 @@
  * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz
  */
 
-#ifdef CONFIG_SDIO_DMA
+#ifdef CONFIG_STM32_SDIO_DMA
 #  define SDIO_SDXFR_CLKDIV     (1 << SDIO_CLKCR_CLKDIV_SHIFT)
 #else
 #  define SDIO_SDXFR_CLKDIV     (3 << SDIO_CLKCR_CLKDIV_SHIFT)
diff --git a/configs/hymini-stm32v/nsh/Make.defs b/configs/hymini-stm32v/nsh/Make.defs
index dd649da9384ed623ab1e34cadb1aa5732ae4e38b..c9945fc47a10fac4f60384c9a18d830a154cc03f 100644
--- a/configs/hymini-stm32v/nsh/Make.defs
+++ b/configs/hymini-stm32v/nsh/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/hymini-stm32v/nsh/defconfig b/configs/hymini-stm32v/nsh/defconfig
index 69662e887c434b57814cc47bd44e5613f7ac1d4d..c569511e3429ba94a3380109f7ac8850787e54f3 100644
--- a/configs/hymini-stm32v/nsh/defconfig
+++ b/configs/hymini-stm32v/nsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -103,7 +106,9 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -145,8 +150,6 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # STM32 Configuration Options
@@ -201,6 +204,7 @@ CONFIG_ARCH_CHIP_STM32F103VC=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -348,6 +352,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 CONFIG_STM32_HAVE_DAC1=y
@@ -411,6 +421,12 @@ CONFIG_STM32_JTAG_DISABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_DMACAPABLE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -422,9 +438,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -433,7 +457,9 @@ CONFIG_STM32_USART1_SERIALDRIVER=y
 #
 # SDIO Configuration
 #
-CONFIG_SDIO_DMAPRIO=0x00001000
+CONFIG_STM32_SDIO_DMA=y
+CONFIG_STM32_SDIO_DMAPRIO=0x00001000
+# CONFIG_STM32_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_STM32_HAVE_RTC_COUNTER=y
 # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
 
@@ -528,18 +554,15 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -556,9 +579,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=7
@@ -571,6 +597,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -586,6 +613,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -655,6 +684,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -670,12 +700,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -683,8 +717,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -692,6 +736,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -699,11 +744,13 @@ CONFIG_MMCSD_NSLOTS=1
 CONFIG_MMCSD_MMCSUPPORT=y
 CONFIG_MMCSD_HAVECARDDETECT=y
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y
 CONFIG_MMCSD_SDIO=y
 CONFIG_SDIO_PREFLIGHT=y
 # CONFIG_SDIO_MUXBUS is not set
 # CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 # CONFIG_SDIO_BLOCKSETUP is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -712,9 +759,10 @@ CONFIG_SDIO_PREFLIGHT=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -760,19 +808,26 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -815,12 +870,6 @@ CONFIG_FAT_LCNAMES=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -861,11 +910,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -882,17 +948,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -912,19 +983,19 @@ CONFIG_ARCH_HAVE_TLS=y
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -933,20 +1004,18 @@ CONFIG_ARCH_HAVE_TLS=y
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -958,10 +1027,10 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -985,8 +1054,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1051,12 +1121,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1073,11 +1143,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_FILEIOSIZE=1024
@@ -1110,12 +1183,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1123,6 +1196,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/hymini-stm32v/nsh2/Make.defs b/configs/hymini-stm32v/nsh2/Make.defs
index 27b64cc342a317acc48ff927a37b8ad6433773bd..3d9cfeb6d0a93ac4e214616a7c6b32bdeb6de91b 100644
--- a/configs/hymini-stm32v/nsh2/Make.defs
+++ b/configs/hymini-stm32v/nsh2/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/hymini-stm32v/nsh2/defconfig b/configs/hymini-stm32v/nsh2/defconfig
index e36492fc6aa6dcfa5d27377944b53b1fef5a4796..b27306fb538b6188142c8e353ac23152fef16631 100644
--- a/configs/hymini-stm32v/nsh2/defconfig
+++ b/configs/hymini-stm32v/nsh2/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -103,7 +106,9 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -145,8 +150,6 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # STM32 Configuration Options
@@ -201,6 +204,7 @@ CONFIG_ARCH_CHIP_STM32F103VC=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -348,6 +352,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 CONFIG_STM32_HAVE_DAC1=y
@@ -417,6 +427,12 @@ CONFIG_STM32_JTAG_DISABLE=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_DMACAPABLE is not set
 # CONFIG_STM32_FSMC_SRAM is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM3_PWM is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -429,9 +445,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -446,7 +470,9 @@ CONFIG_STM32_USART1_SERIALDRIVER=y
 #
 # SDIO Configuration
 #
-CONFIG_SDIO_DMAPRIO=0x00001000
+CONFIG_STM32_SDIO_DMA=y
+CONFIG_STM32_SDIO_DMAPRIO=0x00001000
+# CONFIG_STM32_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_STM32_HAVE_RTC_COUNTER=y
 # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
 CONFIG_RTC_LSECLOCK=y
@@ -545,20 +571,16 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 CONFIG_BOARDCTL_TSCTEST=y
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -575,9 +597,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=8
@@ -587,6 +612,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -603,6 +629,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -672,6 +700,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -687,19 +716,25 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 # CONFIG_RTC_DATETIME is not set
 # CONFIG_RTC_HIRES is not set
@@ -729,11 +764,20 @@ CONFIG_ADS7843E_THRESHY=12
 # CONFIG_BUTTONS is not set
 # CONFIG_DJOYSTICK is not set
 # CONFIG_AJOYSTICK is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 # CONFIG_LCD_NOGETRUN is not set
@@ -748,6 +792,7 @@ CONFIG_LCD_MAXPOWER=100
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
 # CONFIG_LCD_UG9664HSWAG01 is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 # CONFIG_LCD_SSD1351 is not set
@@ -765,11 +810,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -777,6 +818,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -787,11 +829,13 @@ CONFIG_MMCSD_SPI=y
 CONFIG_MMCSD_SPICLOCK=20000000
 CONFIG_MMCSD_SPIMODE=0
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y
 CONFIG_MMCSD_SDIO=y
 CONFIG_SDIO_PREFLIGHT=y
 # CONFIG_SDIO_MUXBUS is not set
 # CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 # CONFIG_SDIO_BLOCKSETUP is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -800,9 +844,10 @@ CONFIG_SDIO_PREFLIGHT=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -848,6 +893,7 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -887,17 +933,24 @@ CONFIG_USBMSC_REMOVABLE=y
 CONFIG_USBMSC_SCSI_PRIO=128
 CONFIG_USBMSC_SCSI_STACKSIZE=2048
 # CONFIG_USBHOST is not set
+CONFIG_HAVE_USBTRACE=y
+# CONFIG_USBMONITOR is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -942,12 +995,6 @@ CONFIG_FS_ROMFS=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1032,6 +1079,7 @@ CONFIG_NXFONT_SANS28X37B=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 # CONFIG_NXTERM is not set
 
 #
@@ -1078,11 +1126,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1100,17 +1165,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1134,32 +1204,20 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
-CONFIG_EXAMPLES_BUTTONS=y
-CONFIG_EXAMPLES_BUTTONS_MIN=0
-CONFIG_EXAMPLES_BUTTONS_MAX=1
-CONFIG_EXAMPLES_IRQBUTTONS_MIN=0
-CONFIG_EXAMPLES_IRQBUTTONS_MAX=1
-CONFIG_EXAMPLES_BUTTONS_NAME0="Key A"
-CONFIG_EXAMPLES_BUTTONS_NAME1="Key B"
-CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2"
-CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3"
-CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4"
-CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5"
-CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6"
-CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -1177,7 +1235,6 @@ CONFIG_EXAMPLES_NX_BPP=16
 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set
 CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 # CONFIG_EXAMPLES_NX_EXTERNINIT is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 CONFIG_EXAMPLES_NXHELLO=y
 CONFIG_EXAMPLES_NXHELLO_VPLANE=0
@@ -1208,22 +1265,22 @@ CONFIG_EXAMPLES_NXIMAGE_YSCALE1p0=y
 # CONFIG_EXAMPLES_NXIMAGE_YSCALE1p5 is not set
 # CONFIG_EXAMPLES_NXIMAGE_YSCALE2p0 is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1234,11 +1291,11 @@ CONFIG_EXAMPLES_TOUCHSCREEN_MINOR=0
 CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/input0"
 # CONFIG_EXAMPLES_TOUCHSCREEN_MOUSE is not set
 CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1262,8 +1319,9 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1329,12 +1387,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1351,11 +1409,15 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Configure Command Options
 #
 CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_FILEIOSIZE=1024
@@ -1394,12 +1456,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1407,7 +1469,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
 CONFIG_SYSTEM_USBMSC=y
 CONFIG_SYSTEM_USBMSC_NLUNS=1
@@ -1420,5 +1483,5 @@ CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2"
 # CONFIG_SYSTEM_USBMSC_DEBUGMM is not set
 CONFIG_SYSTEM_USBMSC_CMD_STACKSIZE=768
 CONFIG_SYSTEM_USBMSC_CMD_PRIORITY=100
-# CONFIG_SYSTEM_USBMONITOR is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/hymini-stm32v/src/stm32_appinit.c b/configs/hymini-stm32v/src/stm32_appinit.c
index 4a7b2206337c53b4dbe3558e0a23ddb02eae8c27..2e1d99f74222b8b3444785730e28185be05ad224 100644
--- a/configs/hymini-stm32v/src/stm32_appinit.c
+++ b/configs/hymini-stm32v/src/stm32_appinit.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * config/hymini-stm32v/src/stm32_appinit.c
  *
- *   Copyright (C) 2009, 2011, 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2011, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -125,7 +125,7 @@ static FAR struct sdio_dev_s *g_sdiodev;
  ****************************************************************************/
 
 #ifdef NSH_HAVEMMCSD
-static int nsh_cdinterrupt(int irq, FAR void *context)
+static int nsh_cdinterrupt(int irq, FAR void *context, FAR void *arg)
 {
   static bool inserted = 0xff; /* Impossible value */
   bool present;
@@ -182,7 +182,7 @@ int board_app_initialize(uintptr_t arg)
 
   /* Register an interrupt handler for the card detect pin */
 
-  stm32_gpiosetevent(GPIO_SD_CD, true, true, true, nsh_cdinterrupt);
+  (void)stm32_gpiosetevent(GPIO_SD_CD, true, true, true, nsh_cdinterrupt, NULL);
 
   /* Mount the SDIO-based MMC/SD block driver */
 
@@ -216,7 +216,7 @@ int board_app_initialize(uintptr_t arg)
   /* Use SD card detect pin to check if a card is inserted */
 
   cd_status = !stm32_gpioread(GPIO_SD_CD);
-  vdbg("Card detect : %hhu\n", cd_status);
+  _info("Card detect : %hhu\n", cd_status);
 
   sdio_mediachange(g_sdiodev, cd_status);
 #endif
diff --git a/configs/hymini-stm32v/src/stm32_buttons.c b/configs/hymini-stm32v/src/stm32_buttons.c
index a31b38f923a8f7d743e41d25d762802f34bf0dc3..d92be06ab9d41adbb90ceabb0ef5823d0fbff62d 100644
--- a/configs/hymini-stm32v/src/stm32_buttons.c
+++ b/configs/hymini-stm32v/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/hymini-stm32v/src/stm32_buttons.c
  *
- *   Copyright (C) 2009, 2011, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2011, 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -69,39 +70,44 @@
  ****************************************************************************/
 
 void board_button_initialize(void)
-  {
-    stm32_configgpio(GPIO_BTN_KEYA);
-    stm32_configgpio(GPIO_BTN_KEYB);
-  }
+{
+  stm32_configgpio(GPIO_BTN_KEYA);
+  stm32_configgpio(GPIO_BTN_KEYB);
+}
 
 /****************************************************************************
  * Name: board_buttons
  ****************************************************************************/
 
 uint8_t board_buttons(void)
-  {
-    uint8_t ret = 0;
-    bool pinValue;
-
-    /* Check that state of each key */
-
-    /* Pin is pulled up */
-    pinValue = stm32_gpioread(GPIO_BTN_KEYA);
-    if (!pinValue)
-      {
-        // Button pressed
-        ret = 1 << BUTTON_KEYA;
-      }
-
-    /* Pin is pulled down */
-    pinValue = stm32_gpioread(GPIO_BTN_KEYB);
-    if (pinValue)
-      {
-        // Button pressed
-        ret |= 1 << BUTTON_KEYB;
-      }
-    return ret;
-  }
+{
+  uint8_t ret = 0;
+  bool pinValue;
+
+  /* Check that state of each key */
+
+  /* Pin is pulled up */
+
+  pinValue = stm32_gpioread(GPIO_BTN_KEYA);
+  if (!pinValue)
+    {
+      /* Button pressed */
+
+      ret = 1 << BUTTON_KEYA;
+    }
+
+  /* Pin is pulled down */
+
+  pinValue = stm32_gpioread(GPIO_BTN_KEYB);
+  if (pinValue)
+    {
+      /* Button pressed */
+
+      ret |= 1 << BUTTON_KEYB;
+    }
+
+  return ret;
+}
 
 /****************************************************************************
  * Button support.
@@ -122,26 +128,27 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See
  *   the BUTTON_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it
- *    may be restored, if so desired).
+ *   value.
  *
  ****************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
-  {
-    xcpt_t oldhandler = NULL;
-    uint32_t pinset = GPIO_BTN_KEYA;
-
-    if (id == 1)
-      {
-        pinset = GPIO_BTN_KEYB;
-      }
-    if (id < 2)
-      {
-        oldhandler = stm32_gpiosetevent(pinset, true, true, true, irqhandler);
-      }
-    return oldhandler;
-  }
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
+{
+  uint32_t pinset = GPIO_BTN_KEYA;
+  int ret = -EINVAL;
+
+  if (id == 1)
+    {
+      pinset = GPIO_BTN_KEYB;
+    }
+
+  if (id < 2)
+    {
+      ret = stm32_gpiosetevent(pinset, true, true, true, irqhandler, arg);
+    }
+
+  return ret;
+}
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/hymini-stm32v/src/stm32_leds.c b/configs/hymini-stm32v/src/stm32_leds.c
index f65b7a21e2ddc6ab80d4f87d1e7fd6c3b51f7798..22f724ef1f9f5f4ce7421f1b69c3e1b9c00256f0 100644
--- a/configs/hymini-stm32v/src/stm32_leds.c
+++ b/configs/hymini-stm32v/src/stm32_leds.c
@@ -57,18 +57,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* The following definitions map the encoded LED setting to GPIO settings */
 
 #define HYMINI_STM32_LED1     (1 << 0)
@@ -90,48 +78,56 @@
 #define OFF_CLRBITS(v)    (CLRBITS(OFF_BITS(v))
 
 /* On: !LED1 + !LED2   Off: - */
+
 #define LED_STARTED_ON_SETBITS       ((0) << ON_SETBITS_SHIFT)
 #define LED_STARTED_ON_CLRBITS       ((HYMINI_STM32_LED1|HYMINI_STM32_LED2) << ON_CLRBITS_SHIFT)
 #define LED_STARTED_OFF_SETBITS      (0 << OFF_SETBITS_SHIFT)
 #define LED_STARTED_OFF_CLRBITS      (0 << OFF_CLRBITS_SHIFT)
 
 /* On: LED1+!LED2   Off: N/A */
+
 #define LED_HEAPALLOCATE_ON_SETBITS  ((HYMINI_STM32_LED1) << ON_SETBITS_SHIFT)
 #define LED_HEAPALLOCATE_ON_CLRBITS  ((HYMINI_STM32_LED2) << ON_CLRBITS_SHIFT)
 #define LED_HEAPALLOCATE_OFF_SETBITS (0)
 #define LED_HEAPALLOCATE_OFF_CLRBITS (0)
 
 /* On: LED2+!LED1   Off: N/A */
+
 #define LED_IRQSENABLED_ON_SETBITS   ((HYMINI_STM32_LED2) << ON_SETBITS_SHIFT)
 #define LED_IRQSENABLED_ON_CLRBITS   ((HYMINI_STM32_LED1) << ON_CLRBITS_SHIFT)
 #define LED_IRQSENABLED_OFF_SETBITS  (0)
 #define LED_IRQSENABLED_OFF_CLRBITS  (0)
 
 /* On: LED1+!LED2   Off: N/A */
+
 #define LED_STACKCREATED_ON_SETBITS  ((HYMINI_STM32_LED1) << ON_SETBITS_SHIFT)
 #define LED_STACKCREATED_ON_CLRBITS  ((HYMINI_STM32_LED2) << ON_CLRBITS_SHIFT)
 #define LED_STACKCREATED_OFF_SETBITS (0)
 #define LED_STACKCREATED_OFF_CLRBITS (0)
 
 /* On: !LED1   Off: LED1 */
+
 #define LED_INIRQ_ON_SETBITS         ((0) << ON_SETBITS_SHIFT)
 #define LED_INIRQ_ON_CLRBITS         ((HYMINI_STM32_LED1) << ON_CLRBITS_SHIFT)
 #define LED_INIRQ_OFF_SETBITS        ((HYMINI_STM32_LED1) << OFF_SETBITS_SHIFT)
 #define LED_INIRQ_OFF_CLRBITS        ((0) << OFF_CLRBITS_SHIFT)
 
 /* On: LED2   Off: !LED2 */
+
 #define LED_SIGNAL_ON_SETBITS        ((HYMINI_STM32_LED2) << ON_SETBITS_SHIFT)
 #define LED_SIGNAL_ON_CLRBITS        ((0) << ON_CLRBITS_SHIFT)
 #define LED_SIGNAL_OFF_SETBITS       ((0) << OFF_SETBITS_SHIFT)
 #define LED_SIGNAL_OFF_CLRBITS       ((HYMINI_STM32_LED2) << OFF_CLRBITS_SHIFT)
 
 /* On: LED1+LED2   Off: - */
+
 #define LED_ASSERTION_ON_SETBITS     ((HYMINI_STM32_LED2|HYMINI_STM32_LED2) << ON_SETBITS_SHIFT)
 #define LED_ASSERTION_ON_CLRBITS     ((0) << ON_CLRBITS_SHIFT)
 #define LED_ASSERTION_OFF_SETBITS    ((0) << OFF_SETBITS_SHIFT)
 #define LED_ASSERTION_OFF_CLRBITS    ((0) << OFF_CLRBITS_SHIFT)
 
 /* On: LED1   Off: LED2 */
+
 #define LED_PANIC_ON_SETBITS         ((HYMINI_STM32_LED1) << ON_SETBITS_SHIFT)
 #define LED_PANIC_ON_CLRBITS         ((HYMINI_STM32_LED2) << ON_CLRBITS_SHIFT)
 #define LED_PANIC_OFF_SETBITS        ((HYMINI_STM32_LED2) << OFF_SETBITS_SHIFT)
diff --git a/configs/hymini-stm32v/src/stm32_r61505u.c b/configs/hymini-stm32v/src/stm32_r61505u.c
index be67d14ac93e8f548ddd86256289c0557b064fa7..cb787eae4a9f1c5031ff96c3556fac58efc5d58a 100644
--- a/configs/hymini-stm32v/src/stm32_r61505u.c
+++ b/configs/hymini-stm32v/src/stm32_r61505u.c
@@ -91,14 +91,6 @@
 
 #define LCD_ID           0x1505
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-# define lcddbg(format, ...)  vdbg(format, ##__VA_ARGS__)
-#else
-# define lcddbg(x...)
-#endif
-
 /* This should be put elsewhere (possibly include/nuttx/compiler.h) */
 
 #ifdef __CC_ARM               /* ARM Compiler        */
@@ -562,7 +554,7 @@ static int lcd_getvideoinfo(FAR struct lcd_dev_s *dev,
                             FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  gvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+  ginfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
         g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
 
   memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
@@ -581,7 +573,7 @@ static int lcd_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
                             FAR struct lcd_planeinfo_s *pinfo)
 {
   DEBUGASSERT(dev && pinfo && planeno == 0);
-  gvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+  ginfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
 
   memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
   return OK;
@@ -598,7 +590,7 @@ static int lcd_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
 
 static int lcd_getpower(struct lcd_dev_s *dev)
 {
-  gvdbg("power: %d\n", 0);
+  ginfo("power: %d\n", 0);
   return g_lcddev.power;
 }
 
@@ -618,7 +610,7 @@ static int lcd_setpower(struct lcd_dev_s *dev, int power)
       return OK;
     }
 
-  gvdbg("power: %d\n", power);
+  ginfo("power: %d\n", power);
   DEBUGASSERT(power <= CONFIG_LCD_MAXPOWER);
 
   /* Set new power level */
@@ -639,7 +631,7 @@ static int lcd_setpower(struct lcd_dev_s *dev, int power)
           duty = LCD_BL_TIMER_PERIOD - 1;
         }
 
-      gvdbg("PWM duty: %d\n", duty);
+      ginfo("PWM duty: %d\n", duty);
       putreg16((uint16_t)duty, STM32_TIM3_CCR2);
 #endif
       /* TODO turn the display on */
@@ -648,7 +640,7 @@ static int lcd_setpower(struct lcd_dev_s *dev, int power)
     {
       /* FIXME: Turn display off ? */
 
-      gvdbg("Force PWM to 0\n");
+      ginfo("Force PWM to 0\n");
       putreg16((uint16_t)0, STM32_TIM3_CCR2);
     }
 
@@ -666,7 +658,7 @@ static int lcd_setpower(struct lcd_dev_s *dev, int power)
 
 static int lcd_getcontrast(struct lcd_dev_s *dev)
 {
-  gvdbg("Not implemented\n");
+  ginfo("Not implemented\n");
   return -ENOSYS;
 }
 
@@ -680,7 +672,7 @@ static int lcd_getcontrast(struct lcd_dev_s *dev)
 
 static int lcd_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
 {
-  gvdbg("Not implemented\n");
+  ginfo("Not implemented\n");
   return -ENOSYS;
 }
 
@@ -880,26 +872,26 @@ static void lcd_backlight(void)
 
   /* Dump timer3 registers */
 
-  lcddbg("APB1ENR: %08x\n", getreg32(STM32_RCC_APB1ENR));
-  lcddbg("CR1:     %04x\n", getreg32(STM32_TIM3_CR1));
-  lcddbg("CR2:     %04x\n", getreg32(STM32_TIM3_CR2));
-  lcddbg("SMCR:    %04x\n", getreg32(STM32_TIM3_SMCR));
-  lcddbg("DIER:    %04x\n", getreg32(STM32_TIM3_DIER));
-  lcddbg("SR:      %04x\n", getreg32(STM32_TIM3_SR));
-  lcddbg("EGR:     %04x\n", getreg32(STM32_TIM3_EGR));
-  lcddbg("CCMR1:   %04x\n", getreg32(STM32_TIM3_CCMR1));
-  lcddbg("CCMR2:   %04x\n", getreg32(STM32_TIM3_CCMR2));
-  lcddbg("CCER:    %04x\n", getreg32(STM32_TIM3_CCER));
-  lcddbg("CNT:     %04x\n", getreg32(STM32_TIM3_CNT));
-  lcddbg("PSC:     %04x\n", getreg32(STM32_TIM3_PSC));
-  lcddbg("ARR:     %04x\n", getreg32(STM32_TIM3_ARR));
-  lcddbg("CCR1:    %04x\n", getreg32(STM32_TIM3_CCR1));
-  lcddbg("CCR2:    %04x\n", getreg32(STM32_TIM3_CCR2));
-  lcddbg("CCR3:    %04x\n", getreg32(STM32_TIM3_CCR3));
-  lcddbg("CCR4:    %04x\n", getreg32(STM32_TIM3_CCR4));
-  lcddbg("CCR4:    %04x\n", getreg32(STM32_TIM3_CCR4));
-  lcddbg("CCR4:    %04x\n", getreg32(STM32_TIM3_CCR4));
-  lcddbg("DMAR:    %04x\n", getreg32(STM32_TIM3_DMAR));
+  lcdinfo("APB1ENR: %08x\n", getreg32(STM32_RCC_APB1ENR));
+  lcdinfo("CR1:     %04x\n", getreg32(STM32_TIM3_CR1));
+  lcdinfo("CR2:     %04x\n", getreg32(STM32_TIM3_CR2));
+  lcdinfo("SMCR:    %04x\n", getreg32(STM32_TIM3_SMCR));
+  lcdinfo("DIER:    %04x\n", getreg32(STM32_TIM3_DIER));
+  lcdinfo("SR:      %04x\n", getreg32(STM32_TIM3_SR));
+  lcdinfo("EGR:     %04x\n", getreg32(STM32_TIM3_EGR));
+  lcdinfo("CCMR1:   %04x\n", getreg32(STM32_TIM3_CCMR1));
+  lcdinfo("CCMR2:   %04x\n", getreg32(STM32_TIM3_CCMR2));
+  lcdinfo("CCER:    %04x\n", getreg32(STM32_TIM3_CCER));
+  lcdinfo("CNT:     %04x\n", getreg32(STM32_TIM3_CNT));
+  lcdinfo("PSC:     %04x\n", getreg32(STM32_TIM3_PSC));
+  lcdinfo("ARR:     %04x\n", getreg32(STM32_TIM3_ARR));
+  lcdinfo("CCR1:    %04x\n", getreg32(STM32_TIM3_CCR1));
+  lcdinfo("CCR2:    %04x\n", getreg32(STM32_TIM3_CCR2));
+  lcdinfo("CCR3:    %04x\n", getreg32(STM32_TIM3_CCR3));
+  lcdinfo("CCR4:    %04x\n", getreg32(STM32_TIM3_CCR4));
+  lcdinfo("CCR4:    %04x\n", getreg32(STM32_TIM3_CCR4));
+  lcdinfo("CCR4:    %04x\n", getreg32(STM32_TIM3_CCR4));
+  lcdinfo("DMAR:    %04x\n", getreg32(STM32_TIM3_DMAR));
 }
 #endif
 
@@ -921,7 +913,7 @@ int board_lcd_initialize(void)
 {
   unsigned short id;
 
-  gvdbg("Initializing\n");
+  ginfo("Initializing\n");
 
   /* Configure GPIO pins and configure the FSMC to support the LCD */
 
@@ -938,7 +930,7 @@ int board_lcd_initialize(void)
     {
       /* Not a R61505U ? */
 
-      gdbg("board_lcd_initialize: LCD ctrl is not a R61505U");
+      lcderr("ERROR: board_lcd_initialize: LCD ctrl is not a R61505U");
       return ERROR;
     }
 
diff --git a/configs/hymini-stm32v/src/stm32_spi.c b/configs/hymini-stm32v/src/stm32_spi.c
index 0f1852dd061cb032606cce8fa080a7a3d00de91c..25f18c961e4eef0298759b80cdb80382e860482b 100644
--- a/configs/hymini-stm32v/src/stm32_spi.c
+++ b/configs/hymini-stm32v/src/stm32_spi.c
@@ -54,32 +54,6 @@
 
 #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#define SPI_DEBUG   /* Define to enable debug */
-#define SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -102,7 +76,7 @@ void stm32_spidev_initialize(void)
 
 #ifdef CONFIG_STM32_SPI1
   /* Configure the SPI-based touch screen CS GPIO */
-  spivdbg("Configure GPIO for SPI1/CS\n");
+  spiinfo("Configure GPIO for SPI1/CS\n");
   stm32_configgpio(GPIO_TS_CS);
 #endif
 }
@@ -135,7 +109,7 @@ void stm32_spidev_initialize(void)
 #ifdef CONFIG_STM32_SPI1
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
   if (devid == SPIDEV_TOUCHSCREEN)
   {
@@ -154,7 +128,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI2
 void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -166,7 +140,7 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI3
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
diff --git a/configs/hymini-stm32v/src/stm32_ssd1289.c b/configs/hymini-stm32v/src/stm32_ssd1289.c
index c8889c38a5911cda06b850b16440e3b0c061bae7..d55964bb12b7bb995a60cb9d2bd239f98a435fa2 100644
--- a/configs/hymini-stm32v/src/stm32_ssd1289.c
+++ b/configs/hymini-stm32v/src/stm32_ssd1289.c
@@ -65,20 +65,6 @@
 #  error "CONFIG_STM32_FSMC is required to use the LCD"
 #endif
 
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
 /* Color depth and format */
 
 #define LCD_BPP          16
@@ -102,22 +88,10 @@
 #define LCD_INDEX        0x60000000  /* RS = 0 */
 #define LCD_DATA         0x60020000  /* RS = 1 */
 
-/* Debug ******************************************************************************/
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg         dbg
-#  define lcdvdbg        vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
-/**************************************************************************************
- * Private Type Definition
- **************************************************************************************/
-
 /**************************************************************************************
  * Private Function Prototypes
  **************************************************************************************/
+
 /* Low Level LCD access */
 
 static void stm32_select(FAR struct ssd1289_lcd_s *dev);
@@ -359,26 +333,26 @@ static void init_lcd_backlight(void)
 
   /* Dump timer3 registers */
 
-  lcddbg("APB1ENR: %08x\n", getreg32(STM32_RCC_APB1ENR));
-  lcddbg("CR1:     %04x\n", getreg32(STM32_TIM3_CR1));
-  lcddbg("CR2:     %04x\n", getreg32(STM32_TIM3_CR2));
-  lcddbg("SMCR:    %04x\n", getreg32(STM32_TIM3_SMCR));
-  lcddbg("DIER:    %04x\n", getreg32(STM32_TIM3_DIER));
-  lcddbg("SR:      %04x\n", getreg32(STM32_TIM3_SR));
-  lcddbg("EGR:     %04x\n", getreg32(STM32_TIM3_EGR));
-  lcddbg("CCMR1:   %04x\n", getreg32(STM32_TIM3_CCMR1));
-  lcddbg("CCMR2:   %04x\n", getreg32(STM32_TIM3_CCMR2));
-  lcddbg("CCER:    %04x\n", getreg32(STM32_TIM3_CCER));
-  lcddbg("CNT:     %04x\n", getreg32(STM32_TIM3_CNT));
-  lcddbg("PSC:     %04x\n", getreg32(STM32_TIM3_PSC));
-  lcddbg("ARR:     %04x\n", getreg32(STM32_TIM3_ARR));
-  lcddbg("CCR1:    %04x\n", getreg32(STM32_TIM3_CCR1));
-  lcddbg("CCR2:    %04x\n", getreg32(STM32_TIM3_CCR2));
-  lcddbg("CCR3:    %04x\n", getreg32(STM32_TIM3_CCR3));
-  lcddbg("CCR4:    %04x\n", getreg32(STM32_TIM3_CCR4));
-  lcddbg("CCR4:    %04x\n", getreg32(STM32_TIM3_CCR4));
-  lcddbg("CCR4:    %04x\n", getreg32(STM32_TIM3_CCR4));
-  lcddbg("DMAR:    %04x\n", getreg32(STM32_TIM3_DMAR));
+  lcdinfo("APB1ENR: %08x\n", getreg32(STM32_RCC_APB1ENR));
+  lcdinfo("CR1:     %04x\n", getreg32(STM32_TIM3_CR1));
+  lcdinfo("CR2:     %04x\n", getreg32(STM32_TIM3_CR2));
+  lcdinfo("SMCR:    %04x\n", getreg32(STM32_TIM3_SMCR));
+  lcdinfo("DIER:    %04x\n", getreg32(STM32_TIM3_DIER));
+  lcdinfo("SR:      %04x\n", getreg32(STM32_TIM3_SR));
+  lcdinfo("EGR:     %04x\n", getreg32(STM32_TIM3_EGR));
+  lcdinfo("CCMR1:   %04x\n", getreg32(STM32_TIM3_CCMR1));
+  lcdinfo("CCMR2:   %04x\n", getreg32(STM32_TIM3_CCMR2));
+  lcdinfo("CCER:    %04x\n", getreg32(STM32_TIM3_CCER));
+  lcdinfo("CNT:     %04x\n", getreg32(STM32_TIM3_CNT));
+  lcdinfo("PSC:     %04x\n", getreg32(STM32_TIM3_PSC));
+  lcdinfo("ARR:     %04x\n", getreg32(STM32_TIM3_ARR));
+  lcdinfo("CCR1:    %04x\n", getreg32(STM32_TIM3_CCR1));
+  lcdinfo("CCR2:    %04x\n", getreg32(STM32_TIM3_CCR2));
+  lcdinfo("CCR3:    %04x\n", getreg32(STM32_TIM3_CCR3));
+  lcdinfo("CCR4:    %04x\n", getreg32(STM32_TIM3_CCR4));
+  lcdinfo("CCR4:    %04x\n", getreg32(STM32_TIM3_CCR4));
+  lcdinfo("CCR4:    %04x\n", getreg32(STM32_TIM3_CCR4));
+  lcdinfo("DMAR:    %04x\n", getreg32(STM32_TIM3_DMAR));
 }
 
 /************************************************************************************
@@ -482,7 +456,7 @@ int board_lcd_initialize(void)
 
   if (!g_ssd1289drvr)
     {
-      lcdvdbg("Initializing\n");
+      lcdinfo("Initializing\n");
 
       init_lcd_backlight();
 
@@ -496,7 +470,7 @@ int board_lcd_initialize(void)
       g_ssd1289drvr = ssd1289_lcdinitialize(&g_ssd1289);
       if (!g_ssd1289drvr)
         {
-          lcddbg("ERROR: ssd1289_lcdinitialize failed\n");
+          lcderr("ERROR: ssd1289_lcdinitialize failed\n");
           return -ENODEV;
         }
     }
diff --git a/configs/hymini-stm32v/src/stm32_ts.c b/configs/hymini-stm32v/src/stm32_ts.c
index 1344c245cd5c8570d5ca5fefb49ce64483192a8e..781eafc9f15313bc43eb47b8dc8be52fcf8b77ee 100644
--- a/configs/hymini-stm32v/src/stm32_ts.c
+++ b/configs/hymini-stm32v/src/stm32_ts.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/hymini-stm32v/src/stm32_ts.c
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *           Laurent Latil 
  *
@@ -93,25 +93,29 @@ static xcpt_t tc_isr;
  ************************************************************************************/
 
 /* Attach the ADS7843E interrupt handler to the GPIO interrupt */
+
 static int hymini_ts_irq_attach(FAR struct ads7843e_config_s *state, xcpt_t isr)
 {
-  ivdbg("hymini_ts_irq_attach\n");
+  iinfo("hymini_ts_irq_attach\n");
 
   tc_isr = isr;
-  stm32_gpiosetevent(GPIO_TS_IRQ, true, true, true, isr);
+  (void)stm32_gpiosetevent(GPIO_TS_IRQ, true, true, true, isr, NULL);
   return OK;
 }
 
 /* Enable or disable the GPIO interrupt */
+
 static void hymini_ts_irq_enable(FAR struct ads7843e_config_s *state,
-    bool enable)
+                                 bool enable)
 {
-  illvdbg("%d\n", enable);
+  iinfo("%d\n", enable);
 
-  stm32_gpiosetevent(GPIO_TS_IRQ, true, true, true, enable? tc_isr:NULL);
+  (void)stm32_gpiosetevent(GPIO_TS_IRQ, true, true, true,
+                           enable ? tc_isr : NULL, NULL);
 }
 
 /* Acknowledge/clear any pending GPIO interrupt */
+
 static void hymini_ts_irq_clear(FAR struct ads7843e_config_s *state)
 {
   // FIXME  Nothing to do ?
@@ -153,12 +157,12 @@ int board_tsc_setup(int minor)
 {
   FAR struct spi_dev_s *dev;
 
-  idbg("minor %d\n", minor);
+  iinfo("minor %d\n", minor);
 
   dev = stm32_spibus_initialize(1);
   if (!dev)
     {
-      idbg("Failed to initialize SPI bus\n");
+      ierr("ERROR: Failed to initialize SPI bus\n");
       return -ENODEV;
     }
 
diff --git a/configs/hymini-stm32v/src/stm32_usbdev.c b/configs/hymini-stm32v/src/stm32_usbdev.c
index d7e868c9031e0661f442f64f0d75518ce473eb65..4a60528b42abe9a4eaf1240e12d9347d17d2722e 100644
--- a/configs/hymini-stm32v/src/stm32_usbdev.c
+++ b/configs/hymini-stm32v/src/stm32_usbdev.c
@@ -73,7 +73,7 @@
 
 void stm32_usbinitialize(void)
 {
-  ulldbg("called\n");
+  uinfo("called\n");
 
   /* USB Soft Connect Pullup */
   stm32_configgpio(GPIO_USB_PULLUP);
@@ -111,6 +111,5 @@ int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable)
 
 void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
-
diff --git a/configs/hymini-stm32v/usbmsc/Make.defs b/configs/hymini-stm32v/usbmsc/Make.defs
index f459f47fcb5efbd5f3f5813c23757a33bba8ef14..55dec5b64873666d308951cec11e1ec8fe630fae 100644
--- a/configs/hymini-stm32v/usbmsc/Make.defs
+++ b/configs/hymini-stm32v/usbmsc/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/hymini-stm32v/usbmsc/defconfig b/configs/hymini-stm32v/usbmsc/defconfig
index a38efa7b82fb3d12afacce7111a84cb3b4259ddb..b69eb4a9acb1cdcf947a66986088b83f943eb873 100644
--- a/configs/hymini-stm32v/usbmsc/defconfig
+++ b/configs/hymini-stm32v/usbmsc/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -103,7 +106,9 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -145,8 +150,6 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # STM32 Configuration Options
@@ -201,6 +204,7 @@ CONFIG_ARCH_CHIP_STM32F103VC=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -348,6 +352,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 CONFIG_STM32_HAVE_DAC1=y
@@ -413,6 +423,12 @@ CONFIG_STM32_JTAG_DISABLE=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_DMACAPABLE is not set
 # CONFIG_STM32_FSMC_SRAM is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -424,12 +440,20 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -438,7 +462,9 @@ CONFIG_STM32_USART2_SERIALDRIVER=y
 #
 # SDIO Configuration
 #
-CONFIG_SDIO_DMAPRIO=0x00001000
+CONFIG_STM32_SDIO_DMA=y
+CONFIG_STM32_SDIO_DMAPRIO=0x00001000
+# CONFIG_STM32_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_STM32_HAVE_RTC_COUNTER=y
 # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
 
@@ -536,13 +562,12 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -559,9 +584,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=11
@@ -574,6 +602,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -590,6 +619,8 @@ CONFIG_MAX_TASKS=16
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -659,6 +690,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -674,12 +706,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -687,8 +723,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -696,6 +742,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -703,11 +750,13 @@ CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_MMCSUPPORT is not set
 # CONFIG_MMCSD_HAVECARDDETECT is not set
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y
 CONFIG_MMCSD_SDIO=y
 CONFIG_SDIO_PREFLIGHT=y
 # CONFIG_SDIO_MUXBUS is not set
 # CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 # CONFIG_SDIO_BLOCKSETUP is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -716,9 +765,10 @@ CONFIG_SDIO_PREFLIGHT=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -778,6 +828,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -815,17 +866,23 @@ CONFIG_USBMSC_REMOVABLE=y
 CONFIG_USBMSC_SCSI_PRIO=128
 CONFIG_USBMSC_SCSI_STACKSIZE=2048
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -862,12 +919,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -912,11 +963,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -934,17 +1002,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -963,19 +1036,20 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -984,20 +1058,18 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1009,10 +1081,10 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1036,8 +1108,9 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1070,17 +1143,17 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
 CONFIG_SYSTEM_USBMSC=y
 CONFIG_SYSTEM_USBMSC_NLUNS=1
@@ -1091,4 +1164,5 @@ CONFIG_SYSTEM_USBMSC_DEVPATH2="/dev/mmcsd1"
 CONFIG_SYSTEM_USBMSC_DEVMINOR3=2
 CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2"
 # CONFIG_SYSTEM_USBMSC_DEBUGMM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/hymini-stm32v/usbnsh/Make.defs b/configs/hymini-stm32v/usbnsh/Make.defs
index 5df2960ed6a9aece7288eec320221f4416ef6674..4bd8b6ed893de68ec6732a252f7e119e881db34c 100644
--- a/configs/hymini-stm32v/usbnsh/Make.defs
+++ b/configs/hymini-stm32v/usbnsh/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/hymini-stm32v/usbnsh/defconfig b/configs/hymini-stm32v/usbnsh/defconfig
index d744b1a2ca9e1eaca82e12f6c68ffcf505873d6f..7f8a7f443569530984275888215d93649c599c1b 100644
--- a/configs/hymini-stm32v/usbnsh/defconfig
+++ b/configs/hymini-stm32v/usbnsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +202,7 @@ CONFIG_ARCH_CHIP_STM32F103VC=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -346,6 +350,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 CONFIG_STM32_HAVE_DAC1=y
@@ -408,6 +418,12 @@ CONFIG_STM32_JTAG_DISABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -419,9 +435,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -520,18 +544,16 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -548,9 +570,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=7
@@ -647,6 +672,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -662,12 +688,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -675,8 +705,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -684,6 +724,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -692,10 +733,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 CONFIG_SERIAL_REMOVABLE=y
+# CONFIG_SERIAL_CONSOLE is not set
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -741,6 +782,7 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -783,17 +825,26 @@ CONFIG_CDCACM_VENDORSTR="NuttX"
 CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+CONFIG_SYSLOG_CHAR=y
 # CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
+CONFIG_SYSLOG_CHAR_CRLF=y
+CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -830,14 +881,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-CONFIG_SYSLOG_CHAR=y
-CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
-
 #
 # Graphics Support
 #
@@ -883,6 +926,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -897,7 +942,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -905,8 +949,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -925,31 +971,19 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Examples
 #
-CONFIG_EXAMPLES_BUTTONS=y
-CONFIG_EXAMPLES_BUTTONS_MIN=0
-CONFIG_EXAMPLES_BUTTONS_MAX=1
-CONFIG_EXAMPLES_IRQBUTTONS_MIN=0
-CONFIG_EXAMPLES_IRQBUTTONS_MAX=1
-CONFIG_EXAMPLES_BUTTONS_NAME0="Key A"
-CONFIG_EXAMPLES_BUTTONS_NAME1="Key B"
-CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2"
-CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3"
-CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4"
-CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5"
-CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6"
-CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -958,20 +992,18 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -983,10 +1015,10 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1008,8 +1040,9 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1073,12 +1106,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1095,6 +1128,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1133,12 +1167,13 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1146,7 +1181,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
-# CONFIG_SYSTEM_CDCACM is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/hymini-stm32v/usbserial/Make.defs b/configs/hymini-stm32v/usbserial/Make.defs
index 8209827f16e0a61a3674caf102599f36b97329db..e7799b6b6c219b408f857fa1e86eb6d24236708c 100644
--- a/configs/hymini-stm32v/usbserial/Make.defs
+++ b/configs/hymini-stm32v/usbserial/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/hymini-stm32v/usbserial/defconfig b/configs/hymini-stm32v/usbserial/defconfig
index 6183ec98d4fb6ee6cf08f2aea868c284041b8042..89164499ee92cb04ac8d3fb098a426b33be9b522 100644
--- a/configs/hymini-stm32v/usbserial/defconfig
+++ b/configs/hymini-stm32v/usbserial/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +199,7 @@ CONFIG_ARCH_CHIP_STM32F103VC=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -409,6 +410,12 @@ CONFIG_STM32_JTAG_DISABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -420,12 +427,20 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -527,13 +542,12 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -550,9 +564,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=10
@@ -645,6 +662,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -660,6 +678,7 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
@@ -673,8 +692,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -682,6 +711,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -690,10 +720,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -753,6 +783,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -789,17 +820,22 @@ CONFIG_PL2303_PRODUCTSTR="USBdev Serial"
 # CONFIG_CDCACM is not set
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -830,12 +866,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -900,7 +930,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -908,8 +937,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -930,16 +961,15 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -948,20 +978,18 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -973,11 +1001,11 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 CONFIG_EXAMPLES_USBSERIAL=y
 CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -999,8 +1027,8 @@ CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1033,16 +1061,16 @@ CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/kwikstik-k40/README.txt b/configs/kwikstik-k40/README.txt
index 5d31bb232f54b0a5c35dfec03876ab192704349f..9586a43c90c08012a884c4404dd796f297f631eb 100644
--- a/configs/kwikstik-k40/README.txt
+++ b/configs/kwikstik-k40/README.txt
@@ -461,7 +461,7 @@ KwikStik-K40-specific Configuration Options
 
   PIN Interrupt Support
 
-    CONFIG_GPIO_IRQ          -- Enable pin interrupt support.  Also needs
+    CONFIG_KINETIS_GPIOIRQ          -- Enable pin interrupt support.  Also needs
       one or more of the following:
     CONFIG_KINETIS_PORTAINTS -- Support 32 Port A interrupts
     CONFIG_KINETIS_PORTBINTS -- Support 32 Port B interrupts
diff --git a/configs/kwikstik-k40/ostest/Make.defs b/configs/kwikstik-k40/ostest/Make.defs
index b7632320e7550b1f256bc185407f9206706a62dc..c1e82ed935e61629deb0209b8693eadfbfd5cf3c 100644
--- a/configs/kwikstik-k40/ostest/Make.defs
+++ b/configs/kwikstik-k40/ostest/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/kwikstik-k40/ostest/defconfig b/configs/kwikstik-k40/ostest/defconfig
index 51b5c56a7a424db619fa90b77d80738e527d3abe..48ad7836a712999dd5c658e0bbea6366dca1f8d3 100644
--- a/configs/kwikstik-k40/ostest/defconfig
+++ b/configs/kwikstik-k40/ostest/defconfig
@@ -37,14 +37,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -71,10 +72,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 CONFIG_ARCH_CHIP_KINETIS=y
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -92,7 +93,11 @@ CONFIG_ARCH_CHIP_KINETIS=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -102,12 +107,23 @@ CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="kinetis"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 # CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -117,6 +133,7 @@ CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -128,6 +145,14 @@ CONFIG_ARMV7M_OABI_TOOLCHAIN=y
 #
 # Kinetis Configuration Options
 #
+# CONFIG_ARCH_CHIP_MK20DN32VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX32VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DN64VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX64VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DN128VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX128VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX64VLH7 is not set
+# CONFIG_ARCH_CHIP_MK20DX128VLH7 is not set
 # CONFIG_ARCH_CHIP_MK20DX256VLH7 is not set
 # CONFIG_ARCH_CHIP_MK40N512VLQ100 is not set
 # CONFIG_ARCH_CHIP_MK40N512VMD100 is not set
@@ -137,6 +162,7 @@ CONFIG_ARCH_CHIP_MK40X256VLQ100=y
 # CONFIG_ARCH_CHIP_MK40X256VMD100 is not set
 # CONFIG_ARCH_CHIP_MK60N256VLQ100 is not set
 # CONFIG_ARCH_CHIP_MK60N256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VLL100 is not set
 # CONFIG_ARCH_CHIP_MK60N512VLQ100 is not set
 # CONFIG_ARCH_CHIP_MK60N512VMD100 is not set
 # CONFIG_ARCH_CHIP_MK60X256VLQ100 is not set
@@ -192,7 +218,7 @@ CONFIG_KINETIS_UART5=y
 #
 # Kinetis GPIO Interrupt Configuration
 #
-# CONFIG_GPIO_IRQ is not set
+# CONFIG_KINETIS_GPIOIRQ is not set
 
 #
 # Kinetis UART Configuration
@@ -209,11 +235,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -308,6 +337,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="ostest_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -358,9 +388,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -391,6 +422,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
@@ -408,17 +440,33 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -442,13 +490,10 @@ CONFIG_UART5_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART5_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -465,19 +510,23 @@ CONFIG_UART5_PARITY=0
 CONFIG_UART5_2STOP=0
 # CONFIG_UART5_IFLOWCONTROL is not set
 # CONFIG_UART5_OFLOWCONTROL is not set
+# CONFIG_UART5_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -508,12 +557,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -532,6 +575,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -571,11 +618,14 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -590,14 +640,13 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -605,11 +654,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -617,11 +666,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 CONFIG_EXAMPLES_OSTEST=y
 CONFIG_EXAMPLES_OSTEST_LOOPS=1
@@ -629,26 +678,36 @@ CONFIG_EXAMPLES_OSTEST_STACKSIZE=2048
 CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=3
 CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000
 CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -660,26 +719,23 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -697,15 +753,16 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/kwikstik-k40/src/k40_appinit.c b/configs/kwikstik-k40/src/k40_appinit.c
index 43694bce9355d6cd159cbf9596ca0967b2382b90..790a094551f9a5f5b6dfe32b94bce40197b7f68d 100644
--- a/configs/kwikstik-k40/src/k40_appinit.c
+++ b/configs/kwikstik-k40/src/k40_appinit.c
@@ -98,8 +98,8 @@
 
 /* We expect to receive GPIO interrupts for card insertion events */
 
-#ifndef CONFIG_GPIO_IRQ
-#  error "CONFIG_GPIO_IRQ required for card detect interrupt"
+#ifndef CONFIG_KINETIS_GPIOIRQ
+#  error "CONFIG_KINETIS_GPIOIRQ required for card detect interrupt"
 #endif
 
 #ifndef CONFIG_KINETIS_PORTEINTS
@@ -217,7 +217,7 @@ int board_app_initialize(uintptr_t arg)
   /* Attached the card detect interrupt (but don't enable it yet) */
 
   kinetis_pinconfig(GPIO_SD_CARDDETECT);
-  kinetis_pinirqattach(GPIO_SD_CARDDETECT, kinetis_cdinterrupt);
+  (void)kinetis_pinirqattach(GPIO_SD_CARDDETECT, kinetis_cdinterrupt, NULL);
 
   /* Mount the SDHC-based MMC/SD block driver */
   /* First, get an instance of the SDHC interface */
diff --git a/configs/kwikstik-k40/src/k40_buttons.c b/configs/kwikstik-k40/src/k40_buttons.c
index f3bf65d3d14084671cf0bbd2f7d41bad26ece1bc..7057ab1bd8367cce671a966cc5412e0eee4b4786 100644
--- a/configs/kwikstik-k40/src/k40_buttons.c
+++ b/configs/kwikstik-k40/src/k40_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/kwikstik-k40/src/k40_buttons.c
  *
- *   Copyright (C) 2011, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -49,18 +50,6 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -111,17 +100,16 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource.
  *   See the BUTTON_* and JOYSTICK_* definitions in board.h for the meaning
- *   of enumeration value.  The previous interrupt handler address is
- *   returned (so that it may be restored, if so desired).
+ *   of enumeration value.
  *
  ****************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
   /* The KwikStik-K40 board has no standard GPIO contact buttons */
 
-  return NULL;
+  return -EINVAL;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/kwikstik-k40/src/k40_lcd.c b/configs/kwikstik-k40/src/k40_lcd.c
index bd955fb4fac0afe3312860064319680f1f040ec6..9200e2333cc2c675fb2a919dc8400430c70c1463 100644
--- a/configs/kwikstik-k40/src/k40_lcd.c
+++ b/configs/kwikstik-k40/src/k40_lcd.c
@@ -49,39 +49,6 @@
 #include "up_arch.h"
 #include "kwikstik-k40.h"
 
-
-/**************************************************************************************
- * Pre-processor Definitions
- **************************************************************************************/
-
-/* Configuration **********************************************************************/
-
-/* Display/Color Properties ***********************************************************/
-
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-# define lcddbg(format, ...)  vdbg(format, ##__VA_ARGS__)
-#else
-# define lcddbg(x...)
-#endif
-
-/**************************************************************************************
- * Private Type Definition
- **************************************************************************************/
-
-/**************************************************************************************
- * Private Function Prototypes
- **************************************************************************************/
-
-/**************************************************************************************
- * Private Data
- **************************************************************************************/
-
-/**************************************************************************************
- * Private Functions
- **************************************************************************************/
-
 /**************************************************************************************
  * Public Functions
  **************************************************************************************/
@@ -98,7 +65,7 @@
 
 int board_lcd_initialize(void)
 {
-  gvdbg("Initializing\n");
+  ginfo("Initializing\n");
 #warning "Missing logic"
   return OK;
 }
diff --git a/configs/kwikstik-k40/src/k40_leds.c b/configs/kwikstik-k40/src/k40_leds.c
index 8a5cfe69ab0bbffe3a7643320f985639699c28e1..0164327070b3dddd25786d3da14825703e139fac 100644
--- a/configs/kwikstik-k40/src/k40_leds.c
+++ b/configs/kwikstik-k40/src/k40_leds.c
@@ -43,30 +43,6 @@
 
 #include 
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/kwikstik-k40/src/k40_spi.c b/configs/kwikstik-k40/src/k40_spi.c
index 7b14ea57b8b8ee2c78ef39120c20a831903cffd6..43bb8db955a49e43cdecf4a048204f882ae1bcac 100644
--- a/configs/kwikstik-k40/src/k40_spi.c
+++ b/configs/kwikstik-k40/src/k40_spi.c
@@ -51,30 +51,8 @@
 #include "kinetis.h"
 #include "kwikstik-k40.h"
 
-#if defined(CONFIG_KINETIS_SPI1) || defined(CONFIG_KINETIS_SPI2)
-
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef CONFIG_DEBUG_SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
+#if defined(CONFIG_KINETIS_SPI0) || defined(CONFIG_KINETIS_SPI1) || \
+	defined(CONFIG_KINETIS_SPI2)
 
 /************************************************************************************
  * Public Functions
@@ -94,10 +72,10 @@ void weak_function kinetis_spidev_initialize(void)
 }
 
 /****************************************************************************
- * Name:  kinetis_spi1/2/3select and kinetis_spi1/2/3status
+ * Name:  kinetis_spi0/1/2select and kinetis_spi0/1/2status
  *
  * Description:
- *   The external functions, kinetis_spi1/2/3select and kinetis_spi1/2/3status must be
+ *   The external functions, kinetis_spi0/1/2select and kinetis_spi0/1/2status must be
  *   provided by board-specific logic.  They are implementations of the select
  *   and status methods of the SPI interface defined by struct spi_ops_s (see
  *   include/nuttx/spi/spi.h). All other methods (including kinetis_spibus_initialize())
@@ -106,7 +84,7 @@ void weak_function kinetis_spidev_initialize(void)
  *
  *   1. Provide logic in kinetis_boardinitialize() to configure SPI chip select
  *      pins.
- *   2. Provide kinetis_spi1/2/3select() and kinetis_spi1/2/3status() functions in your
+ *   2. Provide kinetis_spi0/1/2select() and kinetis_spi0/1/2status() functions in your
  *      board-specific logic.  These functions will perform chip selection and
  *      status operations using GPIOs in the way your board is configured.
  *   3. Add a calls to kinetis_spibus_initialize() in your low level application
@@ -118,46 +96,46 @@ void weak_function kinetis_spidev_initialize(void)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_KINETIS_SPI1
-void kinetis_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+#ifdef CONFIG_KINETIS_SPI0
+void kinetis_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 # warning "Missing logic"
 }
 
-uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+uint8_t kinetis_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
 # warning "Missing logic"
   return SPI_STATUS_PRESENT;
 }
 #endif
 
-#ifdef CONFIG_KINETIS_SPI2
-void kinetis_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+#ifdef CONFIG_KINETIS_SPI1
+void kinetis_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 # warning "Missing logic"
 }
 
-uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
 # warning "Missing logic"
   return SPI_STATUS_PRESENT;
 }
 #endif
 
-#ifdef CONFIG_KINETIS_SPI3
-void kinetis_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+#ifdef CONFIG_KINETIS_SPI2
+void kinetis_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 # warning "Missing logic"
 }
 
-uint8_t kinetis_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
 # warning "Missing logic"
   return SPI_STATUS_PRESENT;
 }
 #endif
 
-#endif /* CONFIG_KINETIS_SPI1 || CONFIG_KINETIS_SPI2 */
+#endif /* CONFIG_KINETIS_SPI0 || CONFIG_KINETIS_SPI1 || CONFIG_KINETIS_SPI2 */
diff --git a/configs/kwikstik-k40/src/k40_usbdev.c b/configs/kwikstik-k40/src/k40_usbdev.c
index cfd9f071e8a91be9aa20a1fa8a76db7a9549895c..d21bd39adea3f0b7688424718d89bc0edb819622 100644
--- a/configs/kwikstik-k40/src/k40_usbdev.c
+++ b/configs/kwikstik-k40/src/k40_usbdev.c
@@ -108,6 +108,6 @@ int kinetis_usbpullup(FAR struct usbdev_s *dev, bool enable)
 
 void kinetis_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 #warning "Missing logic"
 }
diff --git a/configs/launchxl-tms57004/nsh/Make.defs b/configs/launchxl-tms57004/nsh/Make.defs
index db2eff3d693960ad7c3bcf60d9d1007a45941149..fffb827e25564af69e6fb23f0011280653a3c9cc 100644
--- a/configs/launchxl-tms57004/nsh/Make.defs
+++ b/configs/launchxl-tms57004/nsh/Make.defs
@@ -70,7 +70,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-r4 -mbig-endian
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/launchxl-tms57004/nsh/defconfig b/configs/launchxl-tms57004/nsh/defconfig
index 082be95f2bd8f1964a61078df9692fdd8107cb4e..f35d86bd1d341b76dd173c16591512c676682cb0 100644
--- a/configs/launchxl-tms57004/nsh/defconfig
+++ b/configs/launchxl-tms57004/nsh/defconfig
@@ -46,10 +46,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,10 +76,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +98,7 @@ CONFIG_ARCH="arm"
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 CONFIG_ARCH_CHIP_TMS570=y
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -110,6 +111,7 @@ CONFIG_ARCH_CHIP_TMS570=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
 CONFIG_ARCH_CORTEXR4=y
 # CONFIG_ARCH_CORTEXR4F is not set
 # CONFIG_ARCH_CORTEXR5 is not set
@@ -118,8 +120,11 @@ CONFIG_ARCH_CORTEXR4=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-r"
 CONFIG_ARCH_CHIP="tms570"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 # CONFIG_ARM_MPU is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
@@ -178,6 +183,7 @@ CONFIG_TMS570_GIO_IRQ=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -246,8 +252,6 @@ CONFIG_NSH_MMCSDMINOR=0
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -390,6 +394,8 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
 # CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_I2S is not set
 
 #
@@ -405,13 +411,20 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -420,9 +433,10 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -446,10 +460,6 @@ CONFIG_SCI1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -473,15 +483,18 @@ CONFIG_SCI1_2STOP=1
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -515,7 +528,9 @@ CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
 # CONFIG_FS_TMPFS is not set
@@ -532,12 +547,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -556,6 +565,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -600,13 +613,15 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -642,10 +657,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -654,33 +669,34 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -688,6 +704,11 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -699,8 +720,8 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -711,6 +732,7 @@ CONFIG_EXAMPLES_NSH=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -825,13 +847,13 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_SYSTEM_I2CTOOL is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_I2CTOOL is not set
+# CONFIG_SYSTEM_INSTALL is not set
 CONFIG_SYSTEM_RAMTEST=y
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -839,6 +861,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/launchxl-tms57004/src/tms570_autoleds.c b/configs/launchxl-tms57004/src/tms570_autoleds.c
index 761986041d703f1804fc42bffe9eb54204f8dc3e..05cfa40d1bc5aca54df7a8e839f13f74977b50b4 100644
--- a/configs/launchxl-tms57004/src/tms570_autoleds.c
+++ b/configs/launchxl-tms57004/src/tms570_autoleds.c
@@ -89,22 +89,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Name: board_autoled_initialize
  ****************************************************************************/
diff --git a/configs/launchxl-tms57004/src/tms570_buttons.c b/configs/launchxl-tms57004/src/tms570_buttons.c
index 2d2741280dd1a8fddf761672f10a86f6f2ac7147..c0f307d2feb9d142195ef9ac05fb176b6ccc6c9e 100644
--- a/configs/launchxl-tms57004/src/tms570_buttons.c
+++ b/configs/launchxl-tms57004/src/tms570_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sam4e-ek/src/tms570_buttons.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -84,10 +85,9 @@ static xcpt_t g_irq_button;
  ****************************************************************************/
 
 #ifdef HAVE_IRQBUTTONS
-static xcpt_t board_button_irqx(gio_pinset_t pinset, int irq,
-                                xcpt_t irqhandler, xcpt_t *store)
+static int board_button_irqx(gio_pinset_t pinset, int irq,
+                             xcpt_t irqhandler, xcpt_t *store, void *arg)
 {
-  xcpt_t oldhandler;
   irqstate_t flags;
 
   /* Disable interrupts until we are done.  This guarantees that the following
@@ -98,7 +98,6 @@ static xcpt_t board_button_irqx(gio_pinset_t pinset, int irq,
 
   /* Get the old button interrupt handler and save the new one */
 
-  oldhandler = *store;
   *store = irqhandler;
 
   /* Are we attaching or detaching? */
@@ -108,7 +107,7 @@ static xcpt_t board_button_irqx(gio_pinset_t pinset, int irq,
       /* Configure the interrupt */
 
       tms570_gioirq(pinset);
-      (void)irq_attach(irq, irqhandler);
+      (void)irq_attach(irq, irqhandler, arg);
       tms570_gioirqenable(irq);
     }
   else
@@ -123,7 +122,7 @@ static xcpt_t board_button_irqx(gio_pinset_t pinset, int irq,
 
   /* Return the old button handler (so that it can be restored) */
 
-  return oldhandler;
+  return OK;
 }
 #endif
 
@@ -171,8 +170,7 @@ uint8_t board_buttons(void)
  * Description:
  *   This function may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is one
- *   of the BUTTON* definitions provided above. The previous interrupt
- *   handler address is returned (so that it may restored, if so desired).
+ *   of the BUTTON* definitions provided above.
  *
  * Configuration Notes:
  *   Configuration CONFIG_AVR32_GIOIRQ must be selected to enable the
@@ -183,17 +181,17 @@ uint8_t board_buttons(void)
  *
  ****************************************************************************/
 
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
 #ifdef HAVE_IRQBUTTONS
   if (id == BUTTON_GIOA7)
     {
-      return board_button_irqx(GIO_BUTTON, IRQ_BUTTON, irqhandler, &g_irq_button);
+      return board_button_irqx(GIO_BUTTON, IRQ_BUTTON, irqhandler,i
+                               &g_irq_button, arg);
     }
 #endif
 
-  return NULL;
-
+  return -EINVAL;
 }
 
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/lincoln60/README.txt b/configs/lincoln60/README.txt
index 1bea5b5bfb066b128d4e2b9f56b08f67ce349d32..b5320549c0123403913d1d2750c2698bd037c12c 100644
--- a/configs/lincoln60/README.txt
+++ b/configs/lincoln60/README.txt
@@ -386,9 +386,9 @@ Lincoln 60 Configuration Options
     CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18
     CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented).
     CONFIG_NET_REGDEBUG - Enabled low level register debug.  Also needs
-      CONFIG_DEBUG.
+      CONFIG_DEBUG_FEATURES.
     CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets.
-      Also needs CONFIG_DEBUG.
+      Also needs CONFIG_DEBUG_FEATURES.
     CONFIG_NET_HASH - Enable receipt of near-perfect match frames.
     CONFIG_LPC17_MULTICAST - Enable receipt of multicast (and unicast) frames.
       Automatically set if CONFIG_NET_IGMP is selected.
diff --git a/configs/lincoln60/include/board.h b/configs/lincoln60/include/board.h
index 3ac74c0659a1af4f85cfbf4878bf9948d599ebee..b22aa4de6d3c514f4408120e6f9e033d0b76955b 100644
--- a/configs/lincoln60/include/board.h
+++ b/configs/lincoln60/include/board.h
@@ -44,7 +44,7 @@
 #include 
 #include 
 
-#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ)
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_GPIOIRQ)
 #  include 
 #endif
 
diff --git a/configs/lincoln60/netnsh/Make.defs b/configs/lincoln60/netnsh/Make.defs
index 991b367b280142eadace682e7b42afd1b0c7b7ed..509e132306c86a383fb5e182de2604b5d7514d98 100644
--- a/configs/lincoln60/netnsh/Make.defs
+++ b/configs/lincoln60/netnsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/lincoln60/netnsh/defconfig b/configs/lincoln60/netnsh/defconfig
index 95feb4b7f4d34645e34efebcbb6a5084bcc1cf25..743c98180807d4645c6f891e3eee338f419c60c7 100644
--- a/configs/lincoln60/netnsh/defconfig
+++ b/configs/lincoln60/netnsh/defconfig
@@ -41,14 +41,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -62,10 +64,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -75,10 +79,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -97,7 +101,9 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
@@ -108,14 +114,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -125,6 +142,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -135,7 +153,6 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
 # CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -210,6 +227,7 @@ CONFIG_LPC17_SSP0=y
 #
 # Serial driver options
 #
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
 # Ethernet driver options
@@ -221,6 +239,7 @@ CONFIG_NET_NRXDESC=6
 # CONFIG_NET_WOL is not set
 # CONFIG_NET_HASH is not set
 # CONFIG_LPC17_MULTICAST is not set
+CONFIG_LPC17_ETHERNET_HPWORK=y
 
 #
 # Architecture Options
@@ -233,6 +252,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -276,7 +296,7 @@ CONFIG_BOOT_RUNFROMFLASH=y
 # Boot Memory Configuration
 #
 CONFIG_RAM_START=0x10000000
-CONFIG_RAM_SIZE=65536
+CONFIG_RAM_SIZE=32768
 # CONFIG_ARCH_HAVE_SDRAM is not set
 
 #
@@ -294,17 +314,15 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -324,6 +342,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2010
 CONFIG_START_MONTH=6
@@ -378,6 +397,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -393,9 +413,10 @@ CONFIG_SIG_SIGWORK=17
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -419,6 +440,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -434,12 +456,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -447,8 +473,28 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -471,10 +517,9 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -498,9 +543,10 @@ CONFIG_ETH0_PHY_KSZ8041=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -524,10 +570,6 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -550,19 +592,26 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
 # CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -570,13 +619,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -706,7 +753,9 @@ CONFIG_FS_FAT=y
 # CONFIG_FAT_LCNAMES is not set
 # CONFIG_FAT_LFN is not set
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_NFS is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
@@ -715,12 +764,6 @@ CONFIG_FS_FAT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -739,6 +782,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -766,6 +813,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -783,7 +832,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -791,14 +841,17 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=8
 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_RESOLVCONF is not set
 CONFIG_NETDB_DNSSERVER_NOADDR=y
 # CONFIG_NETDB_DNSSERVER_IPv4 is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -817,18 +870,21 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -838,41 +894,47 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -885,8 +947,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -899,25 +962,27 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CODECS is not set
 CONFIG_NETUTILS_DHCPC=y
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -936,6 +1001,7 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
 # CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
@@ -962,13 +1028,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -978,6 +1044,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -985,6 +1052,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1010,6 +1078,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1039,6 +1108,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
 CONFIG_NSH_TELNETD_CLIENTPRIO=100
 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
 CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 # CONFIG_NSH_TELNET_LOGIN is not set
 
 #
@@ -1053,13 +1124,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1068,5 +1138,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/lincoln60/nsh/Make.defs b/configs/lincoln60/nsh/Make.defs
index 30722c1d3a5be9416f480a5707791db026eb73a4..d7d518c15cc815fa5bd6794201f32f03cacb9308 100644
--- a/configs/lincoln60/nsh/Make.defs
+++ b/configs/lincoln60/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/lincoln60/nsh/defconfig b/configs/lincoln60/nsh/defconfig
index 54c6ad3f8cc1ba901a9e22b6391e080446bc2104..5c9cec3d025e2042ee7f408cbdf0005bc7d61844 100644
--- a/configs/lincoln60/nsh/defconfig
+++ b/configs/lincoln60/nsh/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -71,10 +72,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -92,7 +93,11 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -102,14 +107,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -119,13 +135,14 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
+# CONFIG_LPC17_GPIOIRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -212,11 +229,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -253,7 +273,7 @@ CONFIG_BOOT_RUNFROMFLASH=y
 # Boot Memory Configuration
 #
 CONFIG_RAM_START=0x10000000
-CONFIG_RAM_SIZE=65536
+CONFIG_RAM_SIZE=32768
 # CONFIG_ARCH_HAVE_SDRAM is not set
 
 #
@@ -277,9 +297,9 @@ CONFIG_NSH_MMCSDMINOR=0
 # Board-Specific Options
 #
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -316,6 +336,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -366,9 +387,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -399,6 +421,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
@@ -416,17 +439,33 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -450,14 +489,11 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -474,19 +510,23 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -519,17 +559,15 @@ CONFIG_FS_FAT=y
 # CONFIG_FAT_LCNAMES is not set
 # CONFIG_FAT_LFN is not set
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -549,6 +587,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -593,11 +635,15 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -612,26 +658,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -639,35 +685,45 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -680,30 +736,28 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -722,6 +776,7 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
@@ -730,6 +785,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -738,8 +794,10 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -758,8 +816,10 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
@@ -786,6 +846,8 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -799,16 +861,19 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-# CONFIG_SYSTEM_POWEROFF is not set
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/lincoln60/src/lpc17_buttons.c b/configs/lincoln60/src/lpc17_buttons.c
index 9018c2ea36cc05983367740b53412d479978dd71..bcee2e34f0fc47e04efbf4c370e58226f5ad6030 100644
--- a/configs/lincoln60/src/lpc17_buttons.c
+++ b/configs/lincoln60/src/lpc17_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/lincoln60/src/lpc17_buttons.c
  *
- *   Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012-2013, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -69,13 +69,7 @@ static const uint16_t g_buttoncfg[BOARD_NUM_BUTTONS] =
   LINCOLN60_BUT1
 };
 
-/* This array defines all of the interrupt handlers current attached to
- * button events.
- */
-
-#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ)
-static xcpt_t g_buttonisr[BOARD_NUM_BUTTONS];
-
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_GPIOIRQ)
 /* This array provides the mapping from button ID numbers to button IRQ
  * numbers.
  */
@@ -168,8 +162,7 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BOARD_BUTTON_* and BOARD_JOYSTICK_* definitions in board.h for the meaning
- *   of enumeration values.  The previous interrupt handler address is returned
- *   (so that it may restored, if so desired).
+ *   of enumeration values.
  *
  *   Note that board_button_irq() also enables button interrupts.  Button
  *   interrupts will remain enabled after the interrupt handler is attached.
@@ -178,10 +171,9 @@ uint8_t board_buttons(void)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ)
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_GPIOIRQ)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
   irqstate_t flags;
   int irq;
 
@@ -189,11 +181,6 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
 
   if ((unsigned)id < BOARD_NUM_BUTTONS)
     {
-      /* Return the current button handler and set the new interrupt handler */
-
-      oldhandler      = g_buttonisr[id];
-      g_buttonisr[id] = irqhandler;
-
       /* Disable interrupts until we are done */
 
       flags = enter_critical_section();
@@ -207,7 +194,7 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
         {
           /* Attach then enable the new interrupt handler */
 
-          (void)irq_attach(irq, irqhandler);
+          (void)irq_attach(irq, irqhandler, arg);
           up_enable_irq(irq);
         }
       else
@@ -217,9 +204,11 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
           up_disable_irq(irq);
           (void)irq_detach(irq);
         }
+
       leave_critical_section(flags);
     }
-  return oldhandler;
+
+  return OK;
 }
 #endif
 
diff --git a/configs/lincoln60/src/lpc17_leds.c b/configs/lincoln60/src/lpc17_leds.c
index c3c4b515a6fd133f2971c8857a335054f4b23382..b1ce7eb8e054362f02284c1ed721cde736170f34 100644
--- a/configs/lincoln60/src/lpc17_leds.c
+++ b/configs/lincoln60/src/lpc17_leds.c
@@ -60,25 +60,9 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS)
+#ifdef CONFIG_DEBUG_LEDS_INFO
 #  define led_dumpgpio(m) lpc17_dumpgpio(LINCOLN60_LED2, m)
 #else
 #  define led_dumpgpio(m)
diff --git a/configs/lincoln60/thttpd-binfs/Make.defs b/configs/lincoln60/thttpd-binfs/Make.defs
index a9f026a8ee5c5758f4d784295f2290c965ac328d..715f8f5965850f2b981ebf1b0cfd41ae1928e7c5 100644
--- a/configs/lincoln60/thttpd-binfs/Make.defs
+++ b/configs/lincoln60/thttpd-binfs/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/lincoln60/thttpd-binfs/defconfig b/configs/lincoln60/thttpd-binfs/defconfig
index a752c4c72ffcaef339a402a1d494f03917c018ba..70bb7d34edd179e8d9087dded6bdada775105de9 100644
--- a/configs/lincoln60/thttpd-binfs/defconfig
+++ b/configs/lincoln60/thttpd-binfs/defconfig
@@ -41,14 +41,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -62,10 +64,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -75,10 +79,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -96,7 +100,11 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -106,14 +114,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -123,6 +142,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -133,7 +153,6 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
 # CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -208,6 +227,7 @@ CONFIG_LPC17_UART0=y
 #
 # Serial driver options
 #
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
 # Ethernet driver options
@@ -219,6 +239,7 @@ CONFIG_NET_NRXDESC=8
 # CONFIG_NET_WOL is not set
 # CONFIG_NET_HASH is not set
 # CONFIG_LPC17_MULTICAST is not set
+CONFIG_LPC17_ETHERNET_HPWORK=y
 
 #
 # Architecture Options
@@ -231,11 +252,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -272,7 +296,7 @@ CONFIG_BOOT_RUNFROMFLASH=y
 # Boot Memory Configuration
 #
 CONFIG_RAM_START=0x10000000
-CONFIG_RAM_SIZE=65536
+CONFIG_RAM_SIZE=32768
 # CONFIG_ARCH_HAVE_SDRAM is not set
 
 #
@@ -294,6 +318,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -312,6 +337,7 @@ CONFIG_DISABLE_MQUEUE=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2015
 CONFIG_START_MONTH=6
@@ -329,6 +355,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="thttp_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -359,6 +386,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -367,9 +395,10 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -393,6 +422,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -403,16 +433,21 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -420,8 +455,28 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -429,7 +484,11 @@ CONFIG_NETDEVICES=y
 #
 # General Ethernet MAC Driver Options
 #
+# CONFIG_NETDEV_LOOPBACK is not set
+# CONFIG_NETDEV_TELNET is not set
 # CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
+# CONFIG_NETDEV_LATEINIT is not set
 
 #
 # External Ethernet MAC Device Support
@@ -437,9 +496,9 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
-# CONFIG_NET_VNET is not set
+# CONFIG_NET_FTMAC100 is not set
 
 #
 # External Ethernet PHY Device Support
@@ -457,14 +516,19 @@ CONFIG_ETH0_PHY_KSZ8041=y
 # CONFIG_ETH0_PHY_LAN8720 is not set
 # CONFIG_ETH0_PHY_LAN8740 is not set
 # CONFIG_ETH0_PHY_LAN8740A is not set
+# CONFIG_ETH0_PHY_LAN8742A is not set
 # CONFIG_ETH0_PHY_DM9161 is not set
-# CONFIG_PIPES is not set
+CONFIG_PIPES=y
+CONFIG_DEV_PIPE_MAXSIZE=1024
+CONFIG_DEV_PIPE_SIZE=1024
+CONFIG_DEV_FIFO_SIZE=1024
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -488,13 +552,10 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -511,19 +572,27 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -531,13 +600,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -547,6 +614,7 @@ CONFIG_NET_GUARDSIZE=2
 #
 # CONFIG_NET_MULTILINK is not set
 CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
 # CONFIG_NET_TUN is not set
 
 #
@@ -635,6 +703,7 @@ CONFIG_IOB_THROTTLE=8
 # Routing Table Configuration
 #
 # CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME=""
 
 #
 # Crypto API
@@ -658,17 +727,12 @@ CONFIG_FS_READABLE=y
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 CONFIG_FS_ROMFS=y
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 CONFIG_FS_BINFS=y
 # CONFIG_FS_PROCFS is not set
 CONFIG_FS_UNIONFS=y
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -687,6 +751,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -714,6 +782,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -729,13 +799,18 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -752,11 +827,16 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -764,11 +844,11 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -777,19 +857,20 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
@@ -797,6 +878,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 CONFIG_EXAMPLES_THTTPD=y
@@ -805,14 +887,24 @@ CONFIG_EXAMPLES_THTTPD_DRIPADDR=0x0a000001
 CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -824,20 +916,25 @@ CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
 CONFIG_NETUTILS_THTTPD=y
@@ -872,16 +969,10 @@ CONFIG_THTTPD_IDLE_SEND_LIMIT_SEC=300
 CONFIG_THTTPD_TILDE_MAP_NONE=y
 # CONFIG_THTTPD_GENERATE_INDICES is not set
 # CONFIG_THTTPD_USE_URLPATTERN is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -899,15 +990,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/lm3s6432-s2e/nsh/Make.defs b/configs/lm3s6432-s2e/nsh/Make.defs
index fda1b4dad9170414f9d16f0e25520d75eeb80faa..09536ab68ddd781d60e3753d92976e872fc65cb2 100644
--- a/configs/lm3s6432-s2e/nsh/Make.defs
+++ b/configs/lm3s6432-s2e/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/lm3s6432-s2e/nsh/defconfig b/configs/lm3s6432-s2e/nsh/defconfig
index e2984929334238087d77dd5f406638bf25239bda..868ff6a9333596f3195516a0428da1442c0f3afb 100644
--- a/configs/lm3s6432-s2e/nsh/defconfig
+++ b/configs/lm3s6432-s2e/nsh/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 CONFIG_ARCH_CHIP_LM=y
@@ -93,7 +97,9 @@ CONFIG_ARCH_CHIP_LM=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
@@ -104,14 +110,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="tiva"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -121,6 +138,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y
@@ -228,6 +246,7 @@ CONFIG_TIVA_GPIOB_IRQS=y
 # CONFIG_TIVA_PROMISCUOUS is not set
 # CONFIG_TIVA_TIMESTAMP is not set
 # CONFIG_TIVA_BADCRC is not set
+CONFIG_LM3S_ETHERNET_HPWORK=y
 # CONFIG_TIVA_DUMPPACKET is not set
 CONFIG_TIVA_BOARDMAC=y
 
@@ -242,6 +261,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -300,17 +320,15 @@ CONFIG_ARCH_BOARD="lm3s6432-s2e"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -330,6 +348,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2010
 CONFIG_START_MONTH=5
@@ -384,6 +403,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -392,18 +412,23 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -421,6 +446,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -436,12 +462,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -449,8 +479,28 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -473,17 +523,16 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -507,10 +556,6 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -547,19 +592,26 @@ CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
 # CONFIG_UART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -567,13 +619,11 @@ CONFIG_UART1_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -705,12 +755,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -729,6 +773,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -756,6 +804,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -771,7 +821,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
 CONFIG_NETDB_DNSCLIENT=y
 CONFIG_NETDB_DNSCLIENT_ENTRIES=4
@@ -784,8 +835,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -804,17 +857,19 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -824,41 +879,46 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -870,8 +930,9 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -884,25 +945,27 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -921,6 +984,7 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
 # CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
@@ -946,13 +1010,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -962,6 +1026,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -969,6 +1034,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -994,6 +1060,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1020,6 +1087,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
 CONFIG_NSH_TELNETD_CLIENTPRIO=100
 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
 CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 # CONFIG_NSH_TELNET_LOGIN is not set
 
 #
@@ -1034,13 +1103,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1049,5 +1117,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/lm3s6432-s2e/src/lm_ethernet.c b/configs/lm3s6432-s2e/src/lm_ethernet.c
index c10d261adc80b7cf98cc7fe69934d53b2af441dd..6aeb02b3fc09590f035737391dba7b0d0efb0765 100644
--- a/configs/lm3s6432-s2e/src/lm_ethernet.c
+++ b/configs/lm3s6432-s2e/src/lm_ethernet.c
@@ -83,7 +83,7 @@ void tiva_ethernetmac(struct ether_addr *ethaddr)
   user0 = getreg32(TIVA_FLASH_USERREG0);
   user1 = getreg32(TIVA_FLASH_USERREG1);
 
-  nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
+  ninfo("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
   DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff);
 
   /* Re-format that MAC address the way that the network expects to see it */
diff --git a/configs/lm3s6432-s2e/src/lm_leds.c b/configs/lm3s6432-s2e/src/lm_leds.c
index 54bc5c188ff2864f48594d85138068b733374988..047a2e92d85f45ddd558f5a22512bc62b915de79 100644
--- a/configs/lm3s6432-s2e/src/lm_leds.c
+++ b/configs/lm3s6432-s2e/src/lm_leds.c
@@ -55,21 +55,9 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#ifdef CONFIG_DEBUG_LEDS
+#ifdef CONFIG_DEBUG_LEDS_INFO
 #  define led_dumpgpio(m) tiva_dumpgpio(LED_GPIO, m)
 #else
 #  define led_dumpgpio(m)
@@ -96,7 +84,7 @@ static uint8_t g_nest;
 #ifdef CONFIG_ARCH_LEDS
 void board_autoled_initialize(void)
 {
-  leddbg("Initializing\n");
+  ledinfo("Initializing\n");
 
   /* Configure Port F, Bit 2 as an output, initial value=OFF */
 
diff --git a/configs/lm3s6432-s2e/src/lm_ssi.c b/configs/lm3s6432-s2e/src/lm_ssi.c
index 66882e7f10a4552191b40c68c104d8ae0a3ff9db..5c0e771a5450faf9b942e83dc0f9dc2381c05cd8 100644
--- a/configs/lm3s6432-s2e/src/lm_ssi.c
+++ b/configs/lm3s6432-s2e/src/lm_ssi.c
@@ -57,36 +57,14 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SSI_DEBUG   /* Define to enable debug */
-#undef SSI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SSI_DEBUG
-#  define ssidbg  lldbg
-#  ifdef SSI_VERBOSE
-#    define ssivdbg lldbg
-#  else
-#    define ssivdbg(x...)
-#  endif
-#else
-#  undef SSI_VERBOSE
-#  define ssidbg(x...)
-#  define ssivdbg(x...)
-#endif
-
-/* Dump GPIO registers */
+/* CONFIG_DEBUG_SPI enables debug output from this file */
 
-#ifdef SSI_VERBOSE
+#ifdef CONFIG_DEBUG_SPI
 #  define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
 #else
 #  define ssi_dumpgpio(m)
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -129,7 +107,7 @@ void weak_function lm_ssidev_initialize(void)
 
 void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
   ssi_dumpgpio("tiva_ssiselect() Entry");
 
   if (devid == SPIDEV_MMCSD)
@@ -144,7 +122,7 @@ void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool select
 
 uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  ssidbg("Returning SPI_STATUS_PRESENT\n");
+  spiinfo("Returning SPI_STATUS_PRESENT\n");
   return SPI_STATUS_PRESENT;
 }
 
diff --git a/configs/lm3s6965-ek/discover/Make.defs b/configs/lm3s6965-ek/discover/Make.defs
index b3578aa89b123618b303f2d2a1f1e978f6359c64..cd1c5fbb77319b690e80afdfab680b94b2d2ca59 100644
--- a/configs/lm3s6965-ek/discover/Make.defs
+++ b/configs/lm3s6965-ek/discover/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/lm3s6965-ek/discover/defconfig b/configs/lm3s6965-ek/discover/defconfig
index b43f67b956bc4ab65edb0eee3b9bba7e65548396..9a07e12e6f3412027c9b85f98df0903023f39026 100644
--- a/configs/lm3s6965-ek/discover/defconfig
+++ b/configs/lm3s6965-ek/discover/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 CONFIG_ARCH_CHIP_LM=y
@@ -93,7 +97,9 @@ CONFIG_ARCH_CHIP_LM=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
@@ -104,14 +110,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="tiva"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -121,6 +138,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -232,6 +250,7 @@ CONFIG_TIVA_GPIOG_IRQS=y
 # CONFIG_TIVA_PROMISCUOUS is not set
 # CONFIG_TIVA_TIMESTAMP is not set
 # CONFIG_TIVA_BADCRC is not set
+CONFIG_LM3S_ETHERNET_HPWORK=y
 # CONFIG_TIVA_DUMPPACKET is not set
 # CONFIG_TIVA_BOARDMAC is not set
 
@@ -252,6 +271,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -310,19 +330,15 @@ CONFIG_ARCH_BOARD="lm3s6965-ek"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -342,6 +358,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2010
 CONFIG_START_MONTH=5
@@ -396,6 +413,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -404,18 +422,23 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -433,6 +456,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -448,10 +472,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 CONFIG_SPI_CALLBACK=y
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
@@ -459,6 +489,7 @@ CONFIG_SPI_CALLBACK=y
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -466,7 +497,26 @@ CONFIG_SPI_CALLBACK=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -478,6 +528,7 @@ CONFIG_MMCSD_SPICLOCK=12500000
 CONFIG_MMCSD_SPIMODE=0
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -500,17 +551,16 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -534,10 +584,6 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -560,19 +606,26 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
 # CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -580,13 +633,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -713,7 +764,9 @@ CONFIG_FS_FAT=y
 # CONFIG_FAT_LCNAMES is not set
 # CONFIG_FAT_LFN is not set
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_NFS is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
@@ -722,12 +775,6 @@ CONFIG_FS_FAT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -746,6 +793,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -773,6 +824,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -790,7 +843,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -798,14 +852,17 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=4
 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_RESOLVCONF is not set
 CONFIG_NETDB_DNSSERVER_NOADDR=y
 # CONFIG_NETDB_DNSSERVER_IPv4 is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -824,18 +881,20 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -845,41 +904,47 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -892,8 +957,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -906,25 +972,27 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CODECS is not set
 CONFIG_NETUTILS_DHCPC=y
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -943,6 +1011,7 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
 # CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
@@ -969,13 +1038,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -985,6 +1054,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -992,6 +1062,9 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Configure Command Options
@@ -1017,6 +1090,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1046,6 +1120,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
 CONFIG_NSH_TELNETD_CLIENTPRIO=100
 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
 CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 # CONFIG_NSH_TELNET_LOGIN is not set
 
 #
@@ -1060,13 +1136,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1075,5 +1150,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/lm3s6965-ek/nsh/Make.defs b/configs/lm3s6965-ek/nsh/Make.defs
index 035e23651bd54920cd65f496b340913d25d2c603..86704811fa571341665bbbaa684ee65668a9e72e 100644
--- a/configs/lm3s6965-ek/nsh/Make.defs
+++ b/configs/lm3s6965-ek/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/lm3s6965-ek/nsh/defconfig b/configs/lm3s6965-ek/nsh/defconfig
index b43f67b956bc4ab65edb0eee3b9bba7e65548396..9a07e12e6f3412027c9b85f98df0903023f39026 100644
--- a/configs/lm3s6965-ek/nsh/defconfig
+++ b/configs/lm3s6965-ek/nsh/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 CONFIG_ARCH_CHIP_LM=y
@@ -93,7 +97,9 @@ CONFIG_ARCH_CHIP_LM=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
@@ -104,14 +110,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="tiva"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -121,6 +138,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -232,6 +250,7 @@ CONFIG_TIVA_GPIOG_IRQS=y
 # CONFIG_TIVA_PROMISCUOUS is not set
 # CONFIG_TIVA_TIMESTAMP is not set
 # CONFIG_TIVA_BADCRC is not set
+CONFIG_LM3S_ETHERNET_HPWORK=y
 # CONFIG_TIVA_DUMPPACKET is not set
 # CONFIG_TIVA_BOARDMAC is not set
 
@@ -252,6 +271,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -310,19 +330,15 @@ CONFIG_ARCH_BOARD="lm3s6965-ek"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -342,6 +358,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2010
 CONFIG_START_MONTH=5
@@ -396,6 +413,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -404,18 +422,23 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -433,6 +456,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -448,10 +472,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 CONFIG_SPI_CALLBACK=y
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
@@ -459,6 +489,7 @@ CONFIG_SPI_CALLBACK=y
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -466,7 +497,26 @@ CONFIG_SPI_CALLBACK=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -478,6 +528,7 @@ CONFIG_MMCSD_SPICLOCK=12500000
 CONFIG_MMCSD_SPIMODE=0
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -500,17 +551,16 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -534,10 +584,6 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -560,19 +606,26 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
 # CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -580,13 +633,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -713,7 +764,9 @@ CONFIG_FS_FAT=y
 # CONFIG_FAT_LCNAMES is not set
 # CONFIG_FAT_LFN is not set
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_NFS is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
@@ -722,12 +775,6 @@ CONFIG_FS_FAT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -746,6 +793,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -773,6 +824,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -790,7 +843,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -798,14 +852,17 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=4
 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_RESOLVCONF is not set
 CONFIG_NETDB_DNSSERVER_NOADDR=y
 # CONFIG_NETDB_DNSSERVER_IPv4 is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -824,18 +881,20 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -845,41 +904,47 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -892,8 +957,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -906,25 +972,27 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CODECS is not set
 CONFIG_NETUTILS_DHCPC=y
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -943,6 +1011,7 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
 # CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
@@ -969,13 +1038,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -985,6 +1054,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -992,6 +1062,9 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Configure Command Options
@@ -1017,6 +1090,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1046,6 +1120,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
 CONFIG_NSH_TELNETD_CLIENTPRIO=100
 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
 CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 # CONFIG_NSH_TELNET_LOGIN is not set
 
 #
@@ -1060,13 +1136,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1075,5 +1150,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/lm3s6965-ek/nx/Make.defs b/configs/lm3s6965-ek/nx/Make.defs
index bfd85cbf5447f6e75ec228a48780b6c0e95a55cb..b9daa76e00796de2e9567d2357eab475905a00b0 100644
--- a/configs/lm3s6965-ek/nx/Make.defs
+++ b/configs/lm3s6965-ek/nx/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/lm3s6965-ek/nx/defconfig b/configs/lm3s6965-ek/nx/defconfig
index 3d779630f9d0f67312d43b7e2cf8f85fb406e77e..8cfd5f1e60ffd0cc37a697b7b597eda18bb08b93 100644
--- a/configs/lm3s6965-ek/nx/defconfig
+++ b/configs/lm3s6965-ek/nx/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 CONFIG_ARCH_CHIP_LM=y
@@ -92,7 +96,11 @@ CONFIG_ARCH_CHIP_LM=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -102,14 +110,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="tiva"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -119,6 +138,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -236,11 +256,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -296,10 +319,11 @@ CONFIG_ARCH_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 CONFIG_BOARDCTL_GRAPHICS=y
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -319,6 +343,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2010
 CONFIG_START_MONTH=5
@@ -336,6 +361,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nx_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -386,9 +412,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -409,6 +436,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -419,13 +447,21 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
+# CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 CONFIG_SPI_CMDDATA=y
 # CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
@@ -433,6 +469,7 @@ CONFIG_SPI_CMDDATA=y
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -440,10 +477,20 @@ CONFIG_SPI_CMDDATA=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 # CONFIG_LCD_NOGETRUN is not set
@@ -462,8 +509,10 @@ CONFIG_P14201_FRAMEBUFFER=y
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
 # CONFIG_LCD_UG9664HSWAG01 is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
+# CONFIG_LCD_SSD1351 is not set
 # CONFIG_LCD_ST7565 is not set
 # CONFIG_LCD_ST7567 is not set
 # CONFIG_LCD_UG2864AMBAG01 is not set
@@ -475,21 +524,27 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
+# CONFIG_SLCD is not set
 
 #
-# Alphanumeric/Segment LCD Devices
+# LED Support
 #
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -513,14 +568,11 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -537,19 +589,27 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -580,12 +640,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -594,6 +648,7 @@ CONFIG_NX_LCDDRIVER=y
 CONFIG_NX_NPLANES=1
 CONFIG_NX_BGCOLOR=0x0
 # CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -692,6 +747,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -717,6 +776,8 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -731,13 +792,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -750,27 +815,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -791,33 +855,43 @@ CONFIG_EXAMPLES_NX_BPP=4
 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set
 CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 CONFIG_EXAMPLES_NX_EXTERNINIT=y
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -829,26 +903,24 @@ CONFIG_EXAMPLES_NX_EXTERNINIT=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -866,15 +938,17 @@ CONFIG_EXAMPLES_NX_EXTERNINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/lm3s6965-ek/src/lm_ethernet.c b/configs/lm3s6965-ek/src/lm_ethernet.c
index 4a467dd4591886d84b1347d3776978ff120bf6d9..882c18c8811187a764040df722eb7d416bb2133a 100644
--- a/configs/lm3s6965-ek/src/lm_ethernet.c
+++ b/configs/lm3s6965-ek/src/lm_ethernet.c
@@ -83,7 +83,7 @@ void tiva_ethernetmac(struct ether_addr *ethaddr)
   user0 = getreg32(TIVA_FLASH_USERREG0);
   user1 = getreg32(TIVA_FLASH_USERREG1);
 
-  nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
+  ninfo("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
   DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff);
 
   /* Re-format that MAC address the way that the network expects to see it */
diff --git a/configs/lm3s6965-ek/src/lm_leds.c b/configs/lm3s6965-ek/src/lm_leds.c
index 764304281769307cd98fc5ff0742037d667a0b03..4d1a92e8a54ef04b282ea6e2963ed57e028ab2f0 100644
--- a/configs/lm3s6965-ek/src/lm_leds.c
+++ b/configs/lm3s6965-ek/src/lm_leds.c
@@ -55,34 +55,12 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/* Dump GPIO registers */
-
-#ifdef CONFIG_DEBUG_LEDS
+#ifdef CONFIG_DEBUG_LEDS_INFO
 #  define led_dumpgpio(m) tiva_dumpgpio(LED_GPIO, m)
 #else
 #  define led_dumpgpio(m)
 #endif
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -96,7 +74,7 @@ static uint8_t g_nest;
 #ifdef CONFIG_ARCH_LEDS
 void board_autoled_initialize(void)
 {
-  leddbg("Initializing\n");
+  ledinfo("Initializing\n");
 
   /* Configure Port E, Bit 1 as an output, initial value=OFF */
 
diff --git a/configs/lm3s6965-ek/src/lm_oled.c b/configs/lm3s6965-ek/src/lm_oled.c
index 6eee4e35ed4e3fb510a486ec3ed328c2360ccec2..2d72db7c1ea8d66238f6cda7fd12c02e23342d47 100644
--- a/configs/lm3s6965-ek/src/lm_oled.c
+++ b/configs/lm3s6965-ek/src/lm_oled.c
@@ -63,21 +63,21 @@
  * Verbose debug must also be enabled
  */
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_FEATURES
+#  undef CONFIG_DEBUG_INFO
 #  undef CONFIG_DEBUG_GRAPHICS
 #endif
 
-#ifndef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_INFO
 #  undef CONFIG_LCD_RITDEBUG
 #endif
 
 #ifdef CONFIG_LCD_RITDEBUG
-#  define ritdbg(format, ...) vdbg(format, ##__VA_ARGS__)
+#  define riterr(format, ...) _info(format, ##__VA_ARGS__)
 #  define oleddc_dumpgpio(m)  tiva_dumpgpio(OLEDDC_GPIO, m)
 #  define oledcs_dumpgpio(m)  tiva_dumpgpio(OLEDCS_GPIO, m)
 #else
-#  define ritdbg(x...)
+#  define riterr(x...)
 #  define oleddc_dumpgpio(m)
 #  define oledcs_dumpgpio(m)
 #endif
@@ -114,7 +114,7 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
   spi = tiva_ssibus_initialize(0);
   if (!spi)
     {
-      glldbg("Failed to initialize SSI port 0\n");
+      gerr("ERROR: Failed to initialize SSI port 0\n");
     }
   else
     {
@@ -123,11 +123,11 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
       dev = rit_initialize(spi, devno);
       if (!dev)
         {
-          glldbg("Failed to bind SSI port 0 to OLED %d: %d\n", devno);
+          gerr("ERROR: Failed to bind SSI port 0 to OLED %d: %d\n", devno);
         }
      else
         {
-          gllvdbg("Bound SSI port 0 to OLED %d\n", devno);
+          ginfo("Bound SSI port 0 to OLED %d\n", devno);
 
           /* And turn the OLED on (CONFIG_LCD_MAXPOWER should be 1) */
 
diff --git a/configs/lm3s6965-ek/src/lm_ssi.c b/configs/lm3s6965-ek/src/lm_ssi.c
index 5b105fed348594d2418e0b34356e83a6d73ab4e5..8cdf0b0122394c35a2244493438ee6711412c5a0 100644
--- a/configs/lm3s6965-ek/src/lm_ssi.c
+++ b/configs/lm3s6965-ek/src/lm_ssi.c
@@ -59,36 +59,14 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SSI_DEBUG   /* Define to enable debug */
-#undef SSI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SSI_DEBUG
-#  define ssidbg  lldbg
-#  ifdef SSI_VERBOSE
-#    define ssivdbg lldbg
-#  else
-#    define ssivdbg(x...)
-#  endif
-#else
-#  undef SSI_VERBOSE
-#  define ssidbg(x...)
-#  define ssivdbg(x...)
-#endif
-
-/* Dump GPIO registers */
+/* CONFIG_DEBUG_SPI enables debug output from this file */
 
-#ifdef SSI_VERBOSE
+#ifdef CONFIG_DEBUG_SPI
 #  define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
 #else
 #  define ssi_dumpgpio(m)
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -134,7 +112,7 @@ void weak_function lm_ssidev_initialize(void)
 
 void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
   ssi_dumpgpio("tiva_ssiselect() Entry");
 
   if (devid == SPIDEV_MMCSD)
@@ -156,7 +134,7 @@ void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool select
 
 uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  ssidbg("Returning SPI_STATUS_PRESENT\n");
+  spiinfo("Returning SPI_STATUS_PRESENT\n");
   return SPI_STATUS_PRESENT;
 }
 
diff --git a/configs/lm3s6965-ek/tcpecho/Make.defs b/configs/lm3s6965-ek/tcpecho/Make.defs
index dbe06b64b0d868a33995a59d2b593fada06a55b3..2b735fe89202495a88e051f0dbcd6f953337765a 100644
--- a/configs/lm3s6965-ek/tcpecho/Make.defs
+++ b/configs/lm3s6965-ek/tcpecho/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/lm3s6965-ek/tcpecho/defconfig b/configs/lm3s6965-ek/tcpecho/defconfig
index e655d4d6c13b99856a39718b4fdfcec70cbc66d1..0e83e45fa30ac521278cd314ff755f082e288b34 100644
--- a/configs/lm3s6965-ek/tcpecho/defconfig
+++ b/configs/lm3s6965-ek/tcpecho/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 CONFIG_ARCH_CHIP_LM=y
@@ -93,7 +97,9 @@ CONFIG_ARCH_CHIP_LM=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
@@ -104,14 +110,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="tiva"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -121,6 +138,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y
@@ -231,6 +249,7 @@ CONFIG_TIVA_GPIOG_IRQS=y
 # CONFIG_TIVA_PROMISCUOUS is not set
 # CONFIG_TIVA_TIMESTAMP is not set
 # CONFIG_TIVA_BADCRC is not set
+CONFIG_LM3S_ETHERNET_HPWORK=y
 # CONFIG_TIVA_DUMPPACKET is not set
 # CONFIG_TIVA_BOARDMAC is not set
 
@@ -251,6 +270,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -313,6 +333,7 @@ CONFIG_ARCH_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -326,6 +347,7 @@ CONFIG_ARCH_LEDS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2010
 CONFIG_START_MONTH=5
@@ -380,6 +402,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -388,18 +411,23 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -417,6 +445,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -432,12 +461,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -445,8 +478,28 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -469,17 +522,16 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -503,10 +555,6 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
@@ -530,19 +578,26 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
 # CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -550,13 +605,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=650
 CONFIG_NET_ETH_TCP_RECVWNDO=624
 CONFIG_NET_GUARDSIZE=2
@@ -683,7 +736,9 @@ CONFIG_FS_FAT=y
 # CONFIG_FAT_LCNAMES is not set
 # CONFIG_FAT_LFN is not set
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_NFS is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
@@ -692,12 +747,6 @@ CONFIG_FS_FAT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -716,6 +765,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -743,6 +796,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -760,7 +815,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -768,14 +824,17 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=4
 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_RESOLVCONF is not set
 CONFIG_NETDB_DNSSERVER_NOADDR=y
 # CONFIG_NETDB_DNSSERVER_IPv4 is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -794,18 +853,20 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -815,25 +876,25 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 CONFIG_EXAMPLES_TCPECHO=y
 CONFIG_EXAMPLES_TCPECHO_PORT=80
 CONFIG_EXAMPLES_TCPECHO_BACKLOG=8
@@ -848,17 +909,22 @@ CONFIG_EXAMPLES_TCPECHO_NETMASK=0xffffff00
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -871,8 +937,9 @@ CONFIG_EXAMPLES_TCPECHO_NETMASK=0xffffff00
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -882,24 +949,26 @@ CONFIG_EXAMPLES_TCPECHO_NETMASK=0xffffff00
 #
 # Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
 CONFIG_NETUTILS_DHCPC=y
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -918,13 +987,12 @@ CONFIG_WEBCLIENT_TIMEOUT=10
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
@@ -932,5 +1000,7 @@ CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/lm3s8962-ek/nsh/Make.defs b/configs/lm3s8962-ek/nsh/Make.defs
index 473080351afe2211adbf6bb56624e26acabacd65..eddb4e1b06b0ed856bb216687e77647a51f82c35 100644
--- a/configs/lm3s8962-ek/nsh/Make.defs
+++ b/configs/lm3s8962-ek/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/lm3s8962-ek/nsh/defconfig b/configs/lm3s8962-ek/nsh/defconfig
index 48aac15aa0226343a6c647e82d3e85a366d630de..7a67c177333e6aa2d25c60c274d1eb5cde1eddfd 100644
--- a/configs/lm3s8962-ek/nsh/defconfig
+++ b/configs/lm3s8962-ek/nsh/defconfig
@@ -41,14 +41,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -62,10 +64,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -75,10 +79,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 CONFIG_ARCH_CHIP_LM=y
@@ -97,7 +101,9 @@ CONFIG_ARCH_CHIP_LM=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
@@ -108,14 +114,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="tiva"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -125,6 +142,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -242,6 +260,7 @@ CONFIG_TIVA_GPIOG_IRQS=y
 # CONFIG_TIVA_PROMISCUOUS is not set
 # CONFIG_TIVA_TIMESTAMP is not set
 # CONFIG_TIVA_BADCRC is not set
+CONFIG_LM3S_ETHERNET_HPWORK=y
 # CONFIG_TIVA_DUMPPACKET is not set
 # CONFIG_TIVA_BOARDMAC is not set
 
@@ -262,6 +281,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -320,19 +340,15 @@ CONFIG_ARCH_BOARD="lm3s8962-ek"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -352,6 +368,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2010
 CONFIG_START_MONTH=5
@@ -406,6 +423,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -414,18 +432,23 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -443,6 +466,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -458,10 +482,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 CONFIG_SPI_CALLBACK=y
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
@@ -469,6 +499,7 @@ CONFIG_SPI_CALLBACK=y
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -476,7 +507,26 @@ CONFIG_SPI_CALLBACK=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -488,6 +538,7 @@ CONFIG_MMCSD_SPICLOCK=12500000
 CONFIG_MMCSD_SPIMODE=0
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -510,17 +561,16 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -544,10 +594,6 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -570,19 +616,26 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
 # CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -590,13 +643,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -723,7 +774,9 @@ CONFIG_FS_FAT=y
 # CONFIG_FAT_LCNAMES is not set
 # CONFIG_FAT_LFN is not set
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_NFS is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
@@ -732,12 +785,6 @@ CONFIG_FS_FAT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -756,6 +803,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -783,6 +834,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -800,7 +853,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -808,14 +862,17 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=4
 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_RESOLVCONF is not set
 CONFIG_NETDB_DNSSERVER_NOADDR=y
 # CONFIG_NETDB_DNSSERVER_IPv4 is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -834,18 +891,20 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -855,41 +914,47 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -902,8 +967,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -916,25 +982,27 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -953,6 +1021,7 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
 # CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
@@ -979,13 +1048,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -995,6 +1064,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -1002,6 +1072,9 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Configure Command Options
@@ -1027,6 +1100,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1055,6 +1129,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
 CONFIG_NSH_TELNETD_CLIENTPRIO=100
 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
 CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 # CONFIG_NSH_TELNET_LOGIN is not set
 
 #
@@ -1069,13 +1145,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1084,5 +1159,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/lm3s8962-ek/nx/Make.defs b/configs/lm3s8962-ek/nx/Make.defs
index aa65554d0c366b582a14f94dbbb3f53e3483d551..49e399f502c10bcd245b1ad324481f4198159834 100644
--- a/configs/lm3s8962-ek/nx/Make.defs
+++ b/configs/lm3s8962-ek/nx/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/lm3s8962-ek/nx/defconfig b/configs/lm3s8962-ek/nx/defconfig
index c72dc447b56e7f069b33f0c16347953359a2494f..3f69bb057f698e8e777aa7771d1f85c4cdf7e3fe 100644
--- a/configs/lm3s8962-ek/nx/defconfig
+++ b/configs/lm3s8962-ek/nx/defconfig
@@ -41,14 +41,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -62,10 +64,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -75,10 +79,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 CONFIG_ARCH_CHIP_LM=y
@@ -96,7 +100,11 @@ CONFIG_ARCH_CHIP_LM=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -106,14 +114,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="tiva"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -123,6 +142,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -246,11 +266,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -306,10 +329,11 @@ CONFIG_ARCH_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 CONFIG_BOARDCTL_GRAPHICS=y
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -329,6 +353,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2010
 CONFIG_START_MONTH=5
@@ -346,6 +371,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nx_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -396,9 +422,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -419,6 +446,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -429,13 +457,21 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
+# CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 CONFIG_SPI_CMDDATA=y
 # CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
@@ -443,6 +479,7 @@ CONFIG_SPI_CMDDATA=y
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -450,10 +487,20 @@ CONFIG_SPI_CMDDATA=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 # CONFIG_LCD_NOGETRUN is not set
@@ -472,8 +519,10 @@ CONFIG_P14201_FRAMEBUFFER=y
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
 # CONFIG_LCD_UG9664HSWAG01 is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
+# CONFIG_LCD_SSD1351 is not set
 # CONFIG_LCD_ST7565 is not set
 # CONFIG_LCD_ST7567 is not set
 # CONFIG_LCD_UG2864AMBAG01 is not set
@@ -485,21 +534,27 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
+# CONFIG_SLCD is not set
 
 #
-# Alphanumeric/Segment LCD Devices
+# LED Support
 #
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -523,14 +578,11 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -547,19 +599,27 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -590,12 +650,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -604,6 +658,7 @@ CONFIG_NX_LCDDRIVER=y
 CONFIG_NX_NPLANES=1
 CONFIG_NX_BGCOLOR=0x0
 # CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -702,6 +757,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -727,6 +786,8 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -741,13 +802,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -760,27 +825,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -801,33 +865,43 @@ CONFIG_EXAMPLES_NX_BPP=4
 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set
 CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 CONFIG_EXAMPLES_NX_EXTERNINIT=y
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -839,26 +913,24 @@ CONFIG_EXAMPLES_NX_EXTERNINIT=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -876,15 +948,17 @@ CONFIG_EXAMPLES_NX_EXTERNINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/lm3s8962-ek/src/lm_ethernet.c b/configs/lm3s8962-ek/src/lm_ethernet.c
index a6d4da70e97110b9bfa71c2e51762e2b23a7b9fc..1c337358899dddc4980e8617699e251ac9126aa4 100644
--- a/configs/lm3s8962-ek/src/lm_ethernet.c
+++ b/configs/lm3s8962-ek/src/lm_ethernet.c
@@ -83,7 +83,7 @@ void tiva_ethernetmac(struct ether_addr *ethaddr)
   user0 = getreg32(TIVA_FLASH_USERREG0);
   user1 = getreg32(TIVA_FLASH_USERREG1);
 
-  nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
+  ninfo("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
   DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff);
 
   /* Re-format that MAC address the way that the network expects to see it */
diff --git a/configs/lm3s8962-ek/src/lm_leds.c b/configs/lm3s8962-ek/src/lm_leds.c
index 28f925d26e021514d2fdbf7bbb0bff5001e6e83a..3309dfc993b544848f978cfb7f7330dca4f56e90 100644
--- a/configs/lm3s8962-ek/src/lm_leds.c
+++ b/configs/lm3s8962-ek/src/lm_leds.c
@@ -55,21 +55,7 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/* Dump GPIO registers */
-
-#ifdef CONFIG_DEBUG_LEDS
+#ifdef CONFIG_DEBUG_LEDS_INFO
 #  define led_dumpgpio(m) tiva_dumpgpio(LED_GPIO, m)
 #else
 #  define led_dumpgpio(m)
@@ -79,16 +65,12 @@
  * Private Data
  ****************************************************************************/
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
+static uint8_t g_nest;
 
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
-static uint8_t g_nest;
-
 /****************************************************************************
  * Name: board_autoled_initialize
  ****************************************************************************/
@@ -96,7 +78,7 @@ static uint8_t g_nest;
 #ifdef CONFIG_ARCH_LEDS
 void board_autoled_initialize(void)
 {
-  leddbg("Initializing\n");
+  ledinfo("Initializing\n");
 
   /* Configure Port E, Bit 1 as an output, initial value=OFF */
 
diff --git a/configs/lm3s8962-ek/src/lm_oled.c b/configs/lm3s8962-ek/src/lm_oled.c
index 197a614e790a2bc7b3313b0538fb5742818c7be3..6e557a1220821d1d63ed92f29b5d2f2e36526cc3 100644
--- a/configs/lm3s8962-ek/src/lm_oled.c
+++ b/configs/lm3s8962-ek/src/lm_oled.c
@@ -62,21 +62,21 @@
  * Verbose debug must also be enabled
  */
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_FEATURES
+#  undef CONFIG_DEBUG_INFO
 #  undef CONFIG_DEBUG_GRAPHICS
 #endif
 
-#ifndef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_INFO
 #  undef CONFIG_LCD_RITDEBUG
 #endif
 
 #ifdef CONFIG_LCD_RITDEBUG
-#  define ritdbg(format, ...) vdbg(format, ##__VA_ARGS__)
+#  define riterr(format, ...) _info(format, ##__VA_ARGS__)
 #  define oleddc_dumpgpio(m)  tiva_dumpgpio(OLEDDC_GPIO, m)
 #  define oledcs_dumpgpio(m)  tiva_dumpgpio(OLEDCS_GPIO, m)
 #else
-#  define ritdbg(x...)
+#  define riterr(x...)
 #  define oleddc_dumpgpio(m)
 #  define oledcs_dumpgpio(m)
 #endif
@@ -113,7 +113,7 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
   spi = tiva_ssibus_initialize(0);
   if (!spi)
     {
-      glldbg("Failed to initialize SSI port 0\n");
+      gerr("ERROR: Failed to initialize SSI port 0\n");
     }
   else
     {
@@ -122,11 +122,11 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
       dev = rit_initialize(spi, devno);
       if (!dev)
         {
-          glldbg("Failed to bind SSI port 0 to OLED %d: %d\n", devno);
+          gerr("ERROR: Failed to bind SSI port 0 to OLED %d: %d\n", devno);
         }
      else
         {
-          gllvdbg("Bound SSI port 0 to OLED %d\n", devno);
+          ginfo("Bound SSI port 0 to OLED %d\n", devno);
 
           /* And turn the OLED on (CONFIG_LCD_MAXPOWER should be 1) */
 
diff --git a/configs/lm3s8962-ek/src/lm_ssi.c b/configs/lm3s8962-ek/src/lm_ssi.c
index fc9a1efb24e171f4ad17a41105615f43531ab6bb..234789550361c04ad98bf94f290a2e968cfe177b 100644
--- a/configs/lm3s8962-ek/src/lm_ssi.c
+++ b/configs/lm3s8962-ek/src/lm_ssi.c
@@ -59,36 +59,14 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SSI_DEBUG   /* Define to enable debug */
-#undef SSI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SSI_DEBUG
-#  define ssidbg  lldbg
-#  ifdef SSI_VERBOSE
-#    define ssivdbg lldbg
-#  else
-#    define ssivdbg(x...)
-#  endif
-#else
-#  undef SSI_VERBOSE
-#  define ssidbg(x...)
-#  define ssivdbg(x...)
-#endif
-
-/* Dump GPIO registers */
+/* CONFIG_DEBUG_SPI enables debug output from this file */
 
-#ifdef SSI_VERBOSE
+#ifdef CONFIG_DEBUG_SPI
 #  define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
 #else
 #  define ssi_dumpgpio(m)
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -134,7 +112,7 @@ void weak_function lm_ssidev_initialize(void)
 
 void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
   ssi_dumpgpio("tiva_ssiselect() Entry");
 
   if (devid == SPIDEV_MMCSD)
@@ -156,7 +134,7 @@ void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool select
 
 uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  ssidbg("Returning SPI_STATUS_PRESENT\n");
+  spiinfo("Returning SPI_STATUS_PRESENT\n");
   return SPI_STATUS_PRESENT;
 }
 
diff --git a/configs/lm4f120-launchpad/nsh/Make.defs b/configs/lm4f120-launchpad/nsh/Make.defs
index c9ff1c67c4026bcac5951434fe2fa7e278e675f2..de827838bdcd552ec1ee7ee58c83247adf1a3e03 100644
--- a/configs/lm4f120-launchpad/nsh/Make.defs
+++ b/configs/lm4f120-launchpad/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/lm4f120-launchpad/nsh/defconfig b/configs/lm4f120-launchpad/nsh/defconfig
index 61ff3481e35cb4fe995c98319c3b6b499f5e1627..eca112cb724cc52bbd5e26b262631e18957c10bf 100644
--- a/configs/lm4f120-launchpad/nsh/defconfig
+++ b/configs/lm4f120-launchpad/nsh/defconfig
@@ -17,6 +17,7 @@ CONFIG_HOST_LINUX=y
 # Build Configuration
 #
 # CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
 # CONFIG_BUILD_2PASS is not set
 
 #
@@ -26,6 +27,7 @@ CONFIG_HOST_LINUX=y
 # CONFIG_INTELHEX_BINARY is not set
 # CONFIG_MOTOROLA_SREC is not set
 CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
 
 #
 # Customize Header Files
@@ -35,12 +37,15 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
@@ -55,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -68,13 +72,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 CONFIG_ARCH_CHIP_LM=y
 # CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -83,35 +89,61 @@ CONFIG_ARCH_CHIP_LM=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
 CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="tiva"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
 CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
 # CONFIG_ARCH_FPU is not set
-CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
 # ARMV7M Configuration Options
 #
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
 CONFIG_ARMV7M_OABI_TOOLCHAIN=y
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
 
 #
 # Tiva/Stellaris Configuration Options
@@ -124,10 +156,49 @@ CONFIG_ARMV7M_OABI_TOOLCHAIN=y
 CONFIG_ARCH_CHIP_LM4F120=y
 CONFIG_ARCH_CHIP_LM4F=y
 # CONFIG_LM_REVA2 is not set
+# CONFIG_TIVA_BOARD_EARLYINIT is not set
 
 #
 # Tiva/Stellaris Peripheral Support
 #
+# CONFIG_TIVA_ADC is not set
+# CONFIG_TIVA_HAVE_ADC0 is not set
+# CONFIG_TIVA_HAVE_ADC1 is not set
+# CONFIG_TIVA_I2C is not set
+CONFIG_TIVA_HAVE_I2C1=y
+CONFIG_TIVA_HAVE_I2C2=y
+CONFIG_TIVA_HAVE_I2C3=y
+# CONFIG_TIVA_HAVE_I2C4 is not set
+# CONFIG_TIVA_HAVE_I2C5 is not set
+# CONFIG_TIVA_HAVE_I2C6 is not set
+# CONFIG_TIVA_HAVE_I2C7 is not set
+# CONFIG_TIVA_HAVE_I2C8 is not set
+# CONFIG_TIVA_HAVE_I2C9 is not set
+CONFIG_TIVA_HAVE_UART3=y
+CONFIG_TIVA_HAVE_UART4=y
+CONFIG_TIVA_HAVE_UART5=y
+CONFIG_TIVA_HAVE_UART6=y
+CONFIG_TIVA_HAVE_UART7=y
+CONFIG_TIVA_HAVE_SSI0=y
+CONFIG_TIVA_HAVE_SSI1=y
+CONFIG_TIVA_HAVE_SSI2=y
+CONFIG_TIVA_HAVE_SSI3=y
+# CONFIG_TIVA_HAVE_ETHERNET is not set
+CONFIG_TIVA_SSI=y
+# CONFIG_TIVA_TIMER is not set
+# CONFIG_TIVA_HAVE_TIMER0 is not set
+# CONFIG_TIVA_HAVE_TIMER1 is not set
+# CONFIG_TIVA_HAVE_TIMER2 is not set
+CONFIG_TIVA_HAVE_TIMER3=y
+CONFIG_TIVA_HAVE_TIMER4=y
+CONFIG_TIVA_HAVE_TIMER5=y
+# CONFIG_TIVA_HAVE_TIMER6 is not set
+# CONFIG_TIVA_HAVE_TIMER7 is not set
+# CONFIG_TIVA_ADC0 is not set
+# CONFIG_TIVA_I2C0 is not set
+# CONFIG_TIVA_I2C1 is not set
+# CONFIG_TIVA_I2C2 is not set
+# CONFIG_TIVA_I2C3 is not set
 CONFIG_TIVA_UART0=y
 # CONFIG_TIVA_UART1 is not set
 # CONFIG_TIVA_UART2 is not set
@@ -138,12 +209,35 @@ CONFIG_TIVA_UART0=y
 # CONFIG_TIVA_UART7 is not set
 CONFIG_TIVA_SSI0=y
 # CONFIG_TIVA_SSI1 is not set
-# CONFIG_TIVA_ETHERNET is not set
+# CONFIG_TIVA_SSI2 is not set
+# CONFIG_TIVA_SSI3 is not set
+# CONFIG_TIVA_TIMER3 is not set
+# CONFIG_TIVA_TIMER4 is not set
+# CONFIG_TIVA_TIMER5 is not set
 # CONFIG_TIVA_FLASH is not set
 
 #
-# Disable GPIO Interrupts
-#
+# Enable GPIO Interrupts
+#
+CONFIG_TIVA_GPIO_IRQS=y
+CONFIG_TIVA_HAVE_GPIOA_IRQS=y
+CONFIG_TIVA_HAVE_GPIOB_IRQS=y
+CONFIG_TIVA_HAVE_GPIOC_IRQS=y
+CONFIG_TIVA_HAVE_GPIOD_IRQS=y
+CONFIG_TIVA_HAVE_GPIOE_IRQS=y
+CONFIG_TIVA_HAVE_GPIOF_IRQS=y
+CONFIG_TIVA_HAVE_GPIOG_IRQS=y
+CONFIG_TIVA_HAVE_GPIOH_IRQS=y
+# CONFIG_TIVA_HAVE_GPIOJ_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOK_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOL_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOM_IRQS is not set
+# CONFIG_TIVA_HAVE_GPION_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOP_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOQ_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOR_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOS_IRQS is not set
+# CONFIG_TIVA_HAVE_GPIOT_IRQS is not set
 CONFIG_TIVA_GPIOA_IRQS=y
 CONFIG_TIVA_GPIOB_IRQS=y
 CONFIG_TIVA_GPIOC_IRQS=y
@@ -152,7 +246,6 @@ CONFIG_TIVA_GPIOE_IRQS=y
 CONFIG_TIVA_GPIOF_IRQS=y
 CONFIG_TIVA_GPIOG_IRQS=y
 # CONFIG_TIVA_GPIOH_IRQS is not set
-# CONFIG_TIVA_GPIOJ_IRQS is not set
 
 #
 # Tiva/Stellaris SSI Configuration
@@ -167,10 +260,19 @@ CONFIG_SSI_TXLIMIT=4
 # CONFIG_ARCH_VECNOTIRQ is not set
 # CONFIG_ARCH_DMA is not set
 CONFIG_ARCH_HAVE_IRQPRIO=y
-# CONFIG_ARCH_ADDRENV is not set
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
@@ -229,39 +331,78 @@ CONFIG_NSH_MMCSDMINOR=0
 #
 # Board-Specific Options
 #
+# CONFIG_LIB_BOARDCTL is not set
 
 #
 # RTOS Features
 #
-# CONFIG_BOARD_INITIALIZE is not set
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
-CONFIG_RR_INTERVAL=200
-# CONFIG_SCHED_CPULOAD is not set
-# CONFIG_SCHED_INSTRUMENTATION is not set
-CONFIG_TASK_NAME_SIZE=0
-# CONFIG_SCHED_HAVE_PARENT is not set
+# CONFIG_CLOCK_MONOTONIC is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=3
 CONFIG_START_DAY=24
-CONFIG_DEV_CONSOLE=y
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
 # CONFIG_MUTEX_TYPES is not set
-# CONFIG_PRIORITY_INHERITANCE is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
 # CONFIG_FDCLONE_DISABLE is not set
 # CONFIG_FDCLONE_STDIO is not set
 # CONFIG_SDCLONE_DISABLE is not set
-CONFIG_SCHED_WAITPID=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
-CONFIG_USER_ENTRYPOINT="nsh_main"
-CONFIG_DISABLE_OS_API=y
-# CONFIG_DISABLE_POSIX_TIMERS is not set
-# CONFIG_DISABLE_PTHREAD is not set
-# CONFIG_DISABLE_SIGNALS is not set
-# CONFIG_DISABLE_MQUEUE is not set
-# CONFIG_DISABLE_ENVIRON is not set
 
 #
 # Signal Numbers
@@ -272,19 +413,18 @@ CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
 
 #
-# Sizes of configurable things (0 disables)
+# POSIX Message Queue Options
 #
-CONFIG_MAX_TASKS=16
-CONFIG_NPTHREAD_KEYS=4
-CONFIG_NFILE_DESCRIPTORS=8
-CONFIG_NFILE_STREAMS=8
-CONFIG_NAME_MAX=32
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
-CONFIG_MAX_WDOGPARMS=2
-CONFIG_PREALLOC_WDOGS=4
-CONFIG_WDOG_INTRESERVE=0
-CONFIG_PREALLOC_TIMERS=4
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
 
 #
 # Stack and heap information
@@ -293,6 +433,7 @@ CONFIG_IDLETHREAD_STACKSIZE=1024
 CONFIG_USERMAIN_STACKSIZE=2048
 CONFIG_PTHREAD_STACK_MIN=256
 CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
 
 #
 # Device Drivers
@@ -301,14 +442,26 @@ CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
 # CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -316,16 +469,33 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -348,13 +518,15 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART6_SERIALDRIVER is not set
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
 
 #
@@ -368,20 +540,23 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -390,6 +565,11 @@ CONFIG_UART0_2STOP=0
 # CONFIG_ARCH_HAVE_PHY is not set
 # CONFIG_NET is not set
 
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
 #
 # File Systems
 #
@@ -398,22 +578,21 @@ CONFIG_UART0_2STOP=0
 # File system configuration
 #
 # CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
 # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
 # CONFIG_FS_READABLE is not set
 # CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -434,7 +613,11 @@ CONFIG_MM_REGIONS=1
 # CONFIG_AUDIO is not set
 
 #
-# Binary Formats
+# Wireless Support
+#
+
+#
+# Binary Loader
 #
 # CONFIG_BINFMT_DISABLE is not set
 # CONFIG_BINFMT_EXEPATH is not set
@@ -459,6 +642,7 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -470,14 +654,18 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
 CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -496,23 +684,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
-# CONFIG_EXAMPLES_LCDRW is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -520,89 +711,105 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PASHELLO is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
 #
 # CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
 
 #
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
 # CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
 
 #
-# FreeModBus
+# NSH Library
 #
-# CONFIG_MODBUS is not set
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
-# NSH Library
+# Command Line Configuration
 #
-CONFIG_NSH_LIBRARY=y
 CONFIG_NSH_READLINE=y
 # CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
 CONFIG_NSH_BUILTIN_APPS=y
 
 #
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
 # CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -611,8 +818,10 @@ CONFIG_NSH_BUILTIN_APPS=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -620,6 +829,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -629,8 +839,10 @@ CONFIG_NSH_BUILTIN_APPS=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
@@ -643,24 +855,22 @@ CONFIG_NSH_CMDOPT_DF_H=y
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-# CONFIG_NSH_DISABLE_SEMICOLON is not set
-CONFIG_NSH_CMDPARMS=y
-CONFIG_NSH_TMPDIR="/tmp"
-CONFIG_NSH_MAXARGUMENTS=6
-CONFIG_NSH_ARGCAT=y
-CONFIG_NSH_NESTDEPTH=3
+
+#
+# Scripting Support
+#
 # CONFIG_NSH_DISABLESCRIPT is not set
 # CONFIG_NSH_DISABLE_ITEF is not set
 # CONFIG_NSH_DISABLE_LOOPS is not set
-# CONFIG_NSH_DISABLEBG is not set
-CONFIG_NSH_CONSOLE=y
 
 #
-# USB Trace Support
+# Console Configuration
 #
+CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 # CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -674,94 +884,19 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# Custom Free Memory Command
-#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
 # CONFIG_SYSTEM_FREE is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# FLASH Program Installation
-#
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sysinfo
-#
-
-#
-# USB Monitor
-#
-
-#
-# EMACS-like Command Line Editor
-#
-# CONFIG_SYSTEM_CLE is not set
-
-#
-# VI Work-Alike Editor
-#
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# Zmodem Commands
-#
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/lm4f120-launchpad/src/lm4f_autoleds.c b/configs/lm4f120-launchpad/src/lm4f_autoleds.c
index 9ffcd0fa314909137bcf4b096a9d94939c0d03a2..a01f8fc970d81f36ada6d682ace5bf72532e43d9 100644
--- a/configs/lm4f120-launchpad/src/lm4f_autoleds.c
+++ b/configs/lm4f120-launchpad/src/lm4f_autoleds.c
@@ -97,34 +97,14 @@
  * LED_PANIC         4      ON   OFF   OFF (flashing 2Hz)
  */
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#ifdef CONFIG_DEBUG_LEDS
+#ifdef CONFIG_DEBUG_LEDS_INFO
 #  define led_dumpgpio(m) tiva_dumpgpio(LED_GPIO, m)
 #else
 #  define led_dumpgpio(m)
 #endif
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -140,7 +120,7 @@
 #ifdef CONFIG_ARCH_LEDS
 void lm4f_led_initialize(void)
 {
-  leddbg("Initializing\n");
+  ledinfo("Initializing\n");
 
   /* Configure Port E, Bit 1 as an output, initial value=OFF */
 
diff --git a/configs/lm4f120-launchpad/src/lm4f_ssi.c b/configs/lm4f120-launchpad/src/lm4f_ssi.c
index 683b29249ccbd81677072bd0ba776f2834d2633d..2e8d3e49b5b413a1ba7f27196b0259ee115eabfa 100644
--- a/configs/lm4f120-launchpad/src/lm4f_ssi.c
+++ b/configs/lm4f120-launchpad/src/lm4f_ssi.c
@@ -60,28 +60,14 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* CONFIG_DEBUG_SPI enables debug output from this file (needs CONFIG_DEBUG too) */
+/* CONFIG_DEBUG_SPI enables debug output from this file */
 
 #ifdef CONFIG_DEBUG_SPI
-#  define ssidbg lldbg
-#else
-#  define ssidbg(x...)
-#endif
-
-/* Dump GPIO registers */
-
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
-#  define ssivdbg lldbg
 #  define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
 #else
-#  define ssivdbg(x...)
 #  define ssi_dumpgpio(m)
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -119,14 +105,14 @@ void weak_function lm4f_spidev_initialize(void)
 
 void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
   ssi_dumpgpio("tiva_ssiselect() Entry");
   ssi_dumpgpio("tiva_ssiselect() Exit");
 }
 
 uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  ssidbg("Returning SPI_STATUS_PRESENT\n");
+  spiinfo("Returning SPI_STATUS_PRESENT\n");
   return SPI_STATUS_PRESENT;
 }
 
diff --git a/configs/lpc4330-xplorer/README.txt b/configs/lpc4330-xplorer/README.txt
index 2a95f43456de34ed3c917aea7ebc7ed3e4d82009..3afbe967ff052c3a4969a440e9ba073170812e03 100644
--- a/configs/lpc4330-xplorer/README.txt
+++ b/configs/lpc4330-xplorer/README.txt
@@ -362,14 +362,14 @@ Code Red IDE/Tools
   in debugging symbols.
 
   NOTE 3:  There are few things that NuttX has to do differently if you
-  are using a debugger.  Make sure that you also set CONFIG_DEBUG=y.  Nothing
+  are using a debugger.  Make sure that you also set CONFIG_DEBUG_FEATURES=y.  Nothing
   also is needed and no debug output will be generated; but NuttX will
-  use CONFIG_DEBUG=y to mean that a debugger is attached and will deal
+  use CONFIG_DEBUG_FEATURES=y to mean that a debugger is attached and will deal
   with certain resets and debug controls appropriately.
 
   So you should have:
 
-    CONFIG_DEBUG=y
+    CONFIG_DEBUG_FEATURES=y
     CONFIG_DEBUG_SYMBOLS=y
 
   NOTE 4: Every time that you control-C out of the command line GDB, you
@@ -817,9 +817,9 @@ LPC4330-Xplorer Configuration Options
     CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18
     CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented).
     CONFIG_NET_REGDEBUG - Enabled low level register debug.  Also needs
-      CONFIG_DEBUG.
+      CONFIG_DEBUG_FEATURES.
     CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets.
-      Also needs CONFIG_DEBUG.
+      Also needs CONFIG_DEBUG_FEATURES.
     CONFIG_NET_HASH - Enable receipt of near-perfect match frames.
 
   LPC43xx USB Device Configuration
@@ -928,7 +928,7 @@ Where  is one of the following:
            from the SPI address space after each write.
          CONFIG_DEBUG_SPIFI_DUMP - Debug option to dump read/write buffers.  You
            probably do not want to enable this unless you want to dig through a
-           *lot* of debug output!  Also required CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE,
+           *lot* of debug output!  Also required CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO,
            and CONFIG_DEBUG_FS,
 
     5. In my experience, there were some missing function pointers in the LPC43xx
diff --git a/configs/lpc4330-xplorer/include/board.h b/configs/lpc4330-xplorer/include/board.h
index 8e4e531b2561f10413513a9a3e5f8cf8cba11aed..0a7c7d5f8c5f3d5c3543566f951e2afe2c0acd2a 100644
--- a/configs/lpc4330-xplorer/include/board.h
+++ b/configs/lpc4330-xplorer/include/board.h
@@ -43,7 +43,7 @@
 #include 
 #include 
 
-#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ)
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC43_GPIO_IRQ)
 #  include 
 #endif
 
diff --git a/configs/lpc4330-xplorer/nsh/Make.defs b/configs/lpc4330-xplorer/nsh/Make.defs
index e5d4fc2f4f80778c73b2069162f135c850280dcc..ec8fc2a59c8cd6b5cda2759ea9dbd4a8bd9538e3 100644
--- a/configs/lpc4330-xplorer/nsh/Make.defs
+++ b/configs/lpc4330-xplorer/nsh/Make.defs
@@ -94,7 +94,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/lpc4330-xplorer/nsh/defconfig b/configs/lpc4330-xplorer/nsh/defconfig
index a6a461ba6c9bdbc554c40cee20e382c59d9de86d..ac2b04482aad6746f0489e7049e67b617efb28d8 100644
--- a/configs/lpc4330-xplorer/nsh/defconfig
+++ b/configs/lpc4330-xplorer/nsh/defconfig
@@ -46,10 +46,11 @@ CONFIG_ARCH_STDARG_H=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,10 +76,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +98,7 @@ CONFIG_ARCH_CHIP_LPC43XX=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -110,6 +111,7 @@ CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
 # CONFIG_ARCH_CORTEXR4 is not set
 # CONFIG_ARCH_CORTEXR4F is not set
 # CONFIG_ARCH_CORTEXR5 is not set
@@ -118,6 +120,8 @@ CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc43xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 CONFIG_ARMV7M_CMNVECTOR=y
@@ -125,6 +129,7 @@ CONFIG_ARMV7M_CMNVECTOR=y
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 # CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
@@ -135,6 +140,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=y
@@ -159,6 +165,7 @@ CONFIG_ARCH_CHIP_LPC4330FET100=y
 # CONFIG_ARCH_CHIP_LPC4330FET180 is not set
 # CONFIG_ARCH_CHIP_LPC4330FET256 is not set
 # CONFIG_ARCH_CHIP_LPC4337JBD144 is not set
+# CONFIG_ARCH_CHIP_LPC4337JET100 is not set
 # CONFIG_ARCH_CHIP_LPC4350FBD208 is not set
 # CONFIG_ARCH_CHIP_LPC4350FET180 is not set
 # CONFIG_ARCH_CHIP_LPC4350FET256 is not set
@@ -219,6 +226,7 @@ CONFIG_LPC43_USART0=y
 # CONFIG_LPC43_USB0 is not set
 # CONFIG_LPC43_USB1 is not set
 # CONFIG_LPC43_WWDT is not set
+# CONFIG_LPC43_GPIO_IRQ is not set
 
 #
 # RS-485 Configuration
@@ -308,8 +316,6 @@ CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -452,13 +458,20 @@ CONFIG_DEV_NULL=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -467,9 +480,10 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -493,10 +507,6 @@ CONFIG_USART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
@@ -524,15 +534,18 @@ CONFIG_USART0_2STOP=0
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -566,7 +579,9 @@ CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
 # CONFIG_FS_TMPFS is not set
@@ -574,12 +589,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -598,6 +607,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -642,13 +655,15 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -678,10 +693,10 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -690,33 +705,34 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -724,6 +740,11 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -735,8 +756,8 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -748,6 +769,7 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -860,12 +882,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -873,6 +895,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/lpc4330-xplorer/src/lpc43_appinit.c b/configs/lpc4330-xplorer/src/lpc43_appinit.c
index 48225e0dde44389663abfbf7f35f837c19cf4da0..751daad9015ba4399768f0f55252894c3f295a20 100644
--- a/configs/lpc4330-xplorer/src/lpc43_appinit.c
+++ b/configs/lpc4330-xplorer/src/lpc43_appinit.c
@@ -90,7 +90,7 @@ static int nsh_spifi_initialize(void)
   mtd = lpc43_spifi_initialize();
   if (!mtd)
     {
-      fdbg("ERROR: lpc43_spifi_initialize failed\n");
+      ferr("ERROR: lpc43_spifi_initialize failed\n");
       return -ENODEV;
     }
 
@@ -100,7 +100,7 @@ static int nsh_spifi_initialize(void)
   ret = ftl_initialize(CONFIG_SPIFI_DEVNO, mtd);
   if (ret < 0)
     {
-      fdbg("ERROR: Initializing the FTL layer: %d\n", ret);
+      ferr("ERROR: Initializing the FTL layer: %d\n", ret);
       return ret;
     }
 #else
@@ -109,7 +109,7 @@ static int nsh_spifi_initialize(void)
   ret = nxffs_initialize(mtd);
   if (ret < 0)
     {
-      fdbg("ERROR: NXFFS initialization failed: %d\n", ret);
+      ferr("ERROR: NXFFS initialization failed: %d\n", ret);
       return ret;
     }
 
@@ -118,7 +118,7 @@ static int nsh_spifi_initialize(void)
   ret = mount(NULL, "/mnt/spifi", "nxffs", 0, NULL);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
+      ferr("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
       return ret;
     }
 #endif
diff --git a/configs/lpc4330-xplorer/src/lpc43_autoleds.c b/configs/lpc4330-xplorer/src/lpc43_autoleds.c
index afe5ecd23fe20df04de01b55dad5b5efc601077c..37fbcddc0bbc4ddfd12e253e1964fbe1880b393f 100644
--- a/configs/lpc4330-xplorer/src/lpc43_autoleds.c
+++ b/configs/lpc4330-xplorer/src/lpc43_autoleds.c
@@ -54,9 +54,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
 /* LED definitions **********************************************************/
 /* The LPC4330-Xplorer has 2 user-controllable LEDs labeled D2 an D3 in the
  * schematic and on but referred to has LED1 and LED2 here, respectively.
@@ -89,30 +86,6 @@
  *  void board_userled_all(uint8_t ledset);
  */
 
-/* Debug definitions ********************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define LED_VERBOSE 1
-#    define ledvdbg lldbg
-#  else
-#    undef LED_VERBOSE
-#    define ledvdbg(x...)
-#  endif
-#else
-#  undef LED_VERBOSE
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
diff --git a/configs/lpc4330-xplorer/src/lpc43_buttons.c b/configs/lpc4330-xplorer/src/lpc43_buttons.c
index 03d27d84899aee8830a816b469cee0e43b29511b..0d0f5db695cd3c711d85ea2cdeca27c3cee5c6da 100644
--- a/configs/lpc4330-xplorer/src/lpc43_buttons.c
+++ b/configs/lpc4330-xplorer/src/lpc43_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/lpc4330-xplorer/src/lpc43_buttons.c
  *
- *   Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -68,13 +68,7 @@ static const uint16_t g_buttoncfg[BOARD_NUM_BUTTONS] =
   LPC4330_XPLORER_BUT1
 };
 
-/* This array defines all of the interrupt handlers current attached to
- * button events.
- */
-
-#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ)
-static xcpt_t g_buttonisr[BOARD_NUM_BUTTONS];
-
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC43_GPIO_IRQ)
 /* This array provides the mapping from button ID numbers to button IRQ
  * numbers.
  */
@@ -167,8 +161,7 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BOARD_BUTTON_* and BOARD_JOYSTICK_* definitions in board.h for the meaning
- *   of enumeration values.  The previous interrupt handler address is returned
- *   (so that it may restored, if so desired).
+ *   of enumeration values.
  *
  *   Note that board_button_irq() also enables button interrupts.  Button
  *   interrupts will remain enabled after the interrupt handler is attached.
@@ -177,10 +170,9 @@ uint8_t board_buttons(void)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ)
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC43_GPIO_IRQ)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
   irqstate_t flags;
   int irq;
 
@@ -188,11 +180,6 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
 
   if ((unsigned)id < BOARD_NUM_BUTTONS)
     {
-      /* Return the current button handler and set the new interrupt handler */
-
-      oldhandler      = g_buttonisr[id];
-      g_buttonisr[id] = irqhandler;
-
       /* Disable interrupts until we are done */
 
       flags = enter_critical_section();
@@ -206,7 +193,7 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
         {
           /* Attach then enable the new interrupt handler */
 
-          (void)irq_attach(irq, irqhandler);
+          (void)irq_attach(irq, irqhandler, arg);
           up_enable_irq(irq);
         }
       else
@@ -216,9 +203,11 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
           up_disable_irq(irq);
           (void)irq_detach(irq);
         }
+
       leave_critical_section(flags);
     }
-  return oldhandler;
+
+  return OK;
 }
 #endif
 
diff --git a/configs/lpc4330-xplorer/src/lpc43_userleds.c b/configs/lpc4330-xplorer/src/lpc43_userleds.c
index 8075aae7ed02a5f4a1186fc849a31c16bd156d4b..cfa22479d992ae4b90b556c950853ab03484a97b 100644
--- a/configs/lpc4330-xplorer/src/lpc43_userleds.c
+++ b/configs/lpc4330-xplorer/src/lpc43_userleds.c
@@ -66,30 +66,6 @@
  * LEDs are pulled high to a low output illuminates the LED.
  */
 
-/* Debug definitions ********************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define LED_VERBOSE 1
-#    define ledvdbg lldbg
-#  else
-#    undef LED_VERBOSE
-#    define ledvdbg(x...)
-#  endif
-#else
-#  undef LED_VERBOSE
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
diff --git a/configs/lpc4337-ws/README.txt b/configs/lpc4337-ws/README.txt
index 9a0d2cb99b09fa16251bbf13e4d816e51740a21b..a62558a8a08a023ffa3fca424176f1c578596d93 100644
--- a/configs/lpc4337-ws/README.txt
+++ b/configs/lpc4337-ws/README.txt
@@ -358,14 +358,14 @@ Code Red IDE/Tools
   in debugging symbols.
 
   NOTE 3:  There are few things that NuttX has to do differently if you
-  are using a debugger.  Make sure that you also set CONFIG_DEBUG=y.  Nothing
+  are using a debugger.  Make sure that you also set CONFIG_DEBUG_FEATURES=y.  Nothing
   also is needed and no debug output will be generated; but NuttX will
-  use CONFIG_DEBUG=y to mean that a debugger is attached and will deal
+  use CONFIG_DEBUG_FEATURES=y to mean that a debugger is attached and will deal
   with certain resets and debug controls appropriately.
 
   So you should have:
 
-    CONFIG_DEBUG=y
+    CONFIG_DEBUG_FEATURES=y
     CONFIG_DEBUG_SYMBOLS=y
 
   NOTE 4: Every time that you control-C out of the command line GDB, you
@@ -856,9 +856,9 @@ LPC4337-ws Configuration Options
     CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18
     CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented).
     CONFIG_NET_REGDEBUG - Enabled low level register debug.  Also needs
-      CONFIG_DEBUG.
+      CONFIG_DEBUG_FEATURES.
     CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets.
-      Also needs CONFIG_DEBUG.
+      Also needs CONFIG_DEBUG_FEATURES.
     CONFIG_NET_HASH - Enable receipt of near-perfect match frames.
 
   LPC43xx USB Device Configuration
@@ -967,7 +967,7 @@ Where  is one of the following:
            from the SPI address space after each write.
          CONFIG_DEBUG_SPIFI_DUMP - Debug option to dump read/write buffers.  You
            probably do not want to enable this unless you want to dig through a
-           *lot* of debug output!  Also required CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE,
+           *lot* of debug output!  Also required CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO,
            and CONFIG_DEBUG_FS,
 
     5. In my experience, there were some missing function pointers in the LPC43xx
diff --git a/configs/lpc4337-ws/include/board.h b/configs/lpc4337-ws/include/board.h
index 76da5ef7477ba442098a6fea89a80c77d8a8100a..0fe485ad71e4d011841d7f9c7a688273010ab479 100644
--- a/configs/lpc4337-ws/include/board.h
+++ b/configs/lpc4337-ws/include/board.h
@@ -43,7 +43,7 @@
 #include 
 #include 
 
-#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ)
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC43_GPIO_IRQ)
 #  include 
 #endif
 
diff --git a/configs/lpc4337-ws/nsh/Make.defs b/configs/lpc4337-ws/nsh/Make.defs
index 2192ced6f12767e18392ca885e7218867991e3f6..2800be7c26d3e3f18c55cc57863b963eff473d62 100644
--- a/configs/lpc4337-ws/nsh/Make.defs
+++ b/configs/lpc4337-ws/nsh/Make.defs
@@ -94,7 +94,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/lpc4337-ws/nsh/defconfig b/configs/lpc4337-ws/nsh/defconfig
index 4f36719c26fe0dc2fff0541efc0ed33817e87837..177541f69eed82b602f1f91206e68a5c6ec3889b 100644
--- a/configs/lpc4337-ws/nsh/defconfig
+++ b/configs/lpc4337-ws/nsh/defconfig
@@ -42,10 +42,11 @@ CONFIG_ARCH_STDARG_H=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,10 +72,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +94,7 @@ CONFIG_ARCH_CHIP_LPC43XX=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -106,6 +107,7 @@ CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
 # CONFIG_ARCH_CORTEXR4 is not set
 # CONFIG_ARCH_CORTEXR4F is not set
 # CONFIG_ARCH_CORTEXR5 is not set
@@ -114,6 +116,8 @@ CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc43xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 CONFIG_ARMV7M_CMNVECTOR=y
@@ -121,6 +125,7 @@ CONFIG_ARMV7M_CMNVECTOR=y
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 # CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
@@ -131,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -151,6 +157,7 @@ CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
 # CONFIG_ARCH_CHIP_LPC4330FET180 is not set
 # CONFIG_ARCH_CHIP_LPC4330FET256 is not set
 CONFIG_ARCH_CHIP_LPC4337JBD144=y
+# CONFIG_ARCH_CHIP_LPC4337JET100 is not set
 # CONFIG_ARCH_CHIP_LPC4350FBD208 is not set
 # CONFIG_ARCH_CHIP_LPC4350FET180 is not set
 # CONFIG_ARCH_CHIP_LPC4350FET256 is not set
@@ -185,7 +192,6 @@ CONFIG_LPC43_ADC0=y
 # CONFIG_LPC43_EVNTMNTR is not set
 # CONFIG_LPC43_GPDMA is not set
 CONFIG_LPC43_I2C0=y
-# CONFIG_LPC43_I2C0_SUPERFAST is not set
 # CONFIG_LPC43_I2C1 is not set
 # CONFIG_LPC43_I2S0 is not set
 # CONFIG_LPC43_I2S1 is not set
@@ -212,6 +218,23 @@ CONFIG_LPC43_USART2=y
 CONFIG_LPC43_USB0=y
 # CONFIG_LPC43_USB1 is not set
 # CONFIG_LPC43_WWDT is not set
+# CONFIG_LPC43_GPIO_IRQ is not set
+
+#
+# RS-485 Configuration
+#
+# CONFIG_USART2_RS485MODE is not set
+# CONFIG_USART2_RS485_DTRDIR is not set
+
+#
+# I2C Configution
+#
+# CONFIG_LPC43_I2C0_SUPERFAST is not set
+
+#
+# USB device controller driver (DCD) options
+#
+# CONFIG_LPC43_USB0DEV_NOVBUS is not set
 
 #
 # Architecture Options
@@ -224,6 +247,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -290,8 +314,6 @@ CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-CONFIG_BOARDCTL_ADCTEST=y
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -424,12 +446,17 @@ CONFIG_I2C=y
 # CONFIG_I2C_SLAVE is not set
 # CONFIG_I2C_POLLED is not set
 # CONFIG_I2C_TRACE is not set
+CONFIG_I2C_DRIVER=y
 CONFIG_SPI=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_I2S is not set
 
 #
@@ -442,6 +469,7 @@ CONFIG_SPI_EXCHANGE=y
 CONFIG_ANALOG=y
 CONFIG_ADC=y
 CONFIG_ADC_FIFOSIZE=8
+# CONFIG_ADC_ADS1242 is not set
 # CONFIG_ADC_ADS125X is not set
 # CONFIG_ADC_PGA11X is not set
 # CONFIG_DAC is not set
@@ -450,23 +478,31 @@ CONFIG_ADC_FIFOSIZE=8
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
+# CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -490,10 +526,6 @@ CONFIG_USART2_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
@@ -548,8 +580,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
 CONFIG_CDCACM_EPBULKIN=2
 CONFIG_CDCACM_EPBULKIN_FSSIZE=64
 CONFIG_CDCACM_EPBULKIN_HSSIZE=512
-CONFIG_CDCACM_NWRREQS=4
 CONFIG_CDCACM_NRDREQS=4
+CONFIG_CDCACM_NWRREQS=4
 CONFIG_CDCACM_BULKIN_REQLEN=96
 CONFIG_CDCACM_RXBUFSIZE=512
 CONFIG_CDCACM_TXBUFSIZE=2048
@@ -561,15 +593,18 @@ CONFIG_CDCACM_PRODUCTSTR="lpc4337-ws"
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -603,7 +638,9 @@ CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
 # CONFIG_FS_TMPFS is not set
@@ -612,12 +649,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -636,6 +667,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -680,13 +715,15 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -713,6 +750,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_ADC is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -721,10 +759,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -733,38 +771,45 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -777,8 +822,8 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -788,7 +833,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -797,6 +844,7 @@ CONFIG_EXAMPLES_NSH=y
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -887,6 +935,8 @@ CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_USBCONSOLE is not set
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -900,11 +950,13 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
+CONFIG_SYSTEM_CDCACM=y
+CONFIG_SYSTEM_CDCACM_DEVMINOR=0
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=0
 CONFIG_I2CTOOL_MAXBUS=1
@@ -912,8 +964,7 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=100000
-# CONFIG_FSUTILS_INIFILE is not set
-# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -921,7 +972,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-CONFIG_SYSTEM_CDCACM=y
-CONFIG_SYSTEM_CDCACM_DEVMINOR=0
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/lpc4337-ws/src/lpc4337-ws.h b/configs/lpc4337-ws/src/lpc4337-ws.h
index 7c31fe745be40ff22e22a2bfe3d902d9ad94b20d..d5c11a35b9062250cf02b1f5f876619341137ccc 100644
--- a/configs/lpc4337-ws/src/lpc4337-ws.h
+++ b/configs/lpc4337-ws/src/lpc4337-ws.h
@@ -67,6 +67,17 @@
  * Public Functions
  ****************************************************************************/
 
-#endif /* __ASSEMBLY__ */
+/************************************************************************************
+ * Name: lpc43_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_LPC43_ADC0
+int lpc43_adc_setup(void);
 #endif
 
+#endif /* __ASSEMBLY__ */
+#endif
diff --git a/configs/lpc4337-ws/src/lpc43_adc.c b/configs/lpc4337-ws/src/lpc43_adc.c
index 0bb398369aa9a8a0dad61218fea182289e9cd456..e54ca29ea5e9232e27f7500b4f75f65e4f856df1 100644
--- a/configs/lpc4337-ws/src/lpc43_adc.c
+++ b/configs/lpc4337-ws/src/lpc43_adc.c
@@ -63,15 +63,14 @@
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_adc_setup
+ * Name: lpc43_adc_setup
  *
  * Description:
- *   All LPC43 architectures must provide the following interface to work with
- *   examples/adc.
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
-int board_adc_setup(void)
+int lpc43_adc_setup(void)
 {
   static bool initialized = false;
   struct adc_dev_s *adc;
@@ -86,7 +85,7 @@ int board_adc_setup(void)
       adc = lpc43_adcinitialize();
       if (adc == NULL)
         {
-          adbg("ERROR: Failed to get ADC interface\n");
+          aerr("ERROR: Failed to get ADC interface\n");
           return -ENODEV;
         }
 
@@ -95,7 +94,7 @@ int board_adc_setup(void)
       ret = adc_register("/dev/adc0", adc);
       if (ret < 0)
         {
-          adbg("adc_register failed: %d\n", ret);
+          aerr("ERROR: adc_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/lpc4337-ws/src/lpc43_appinit.c b/configs/lpc4337-ws/src/lpc43_appinit.c
index 976b78a4181ae7919ee1fbe272c616fdbd1f801d..8f9a07499246d7277b945b3a4240e1faa3e605ce 100644
--- a/configs/lpc4337-ws/src/lpc43_appinit.c
+++ b/configs/lpc4337-ws/src/lpc43_appinit.c
@@ -46,8 +46,9 @@
 #include 
 #include 
 
-#include "lpc43_i2c.h"
 #include "chip.h"
+#include "lpc43_i2c.h"
+#include "lpc4337-ws.h"
 
 /****************************************************************************
  * Private Functions
@@ -70,14 +71,14 @@ static void lpc43_i2c_register(int bus)
   i2c = lpc43_i2cbus_initialize(bus);
   if (i2c == NULL)
     {
-      dbg("ERROR: Failed to get I2C%d interface\n", bus);
+      _err("ERROR: Failed to get I2C%d interface\n", bus);
     }
   else
     {
       ret = i2c_register(i2c, bus);
       if (ret < 0)
         {
-          dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
+          _err("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
           lpc43_i2cbus_uninitialize(i2c);
         }
     }
@@ -135,8 +136,22 @@ static void lpc43_i2ctool(void)
 
 int board_app_initialize(uintptr_t arg)
 {
+  int ret;
+
   /* Register I2C drivers on behalf of the I2C tool */
 
   lpc43_i2ctool();
+
+#ifdef CONFIG_LPC43_ADC0
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = lpc43_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: lpc43_adc_setup failed: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
   return OK;
 }
diff --git a/configs/lpc4357-evb/README.txt b/configs/lpc4357-evb/README.txt
index db2c2611d2fca32e099fcdd1d83a48947b2b318a..c3febbec039b8eded8718fb988af20c00bd9bd4e 100644
--- a/configs/lpc4357-evb/README.txt
+++ b/configs/lpc4357-evb/README.txt
@@ -355,14 +355,14 @@ Code Red IDE/Tools
   in debugging symbols.
 
   NOTE 3:  There are few things that NuttX has to do differently if you
-  are using a debugger.  Make sure that you also set CONFIG_DEBUG=y.  Nothing
+  are using a debugger.  Make sure that you also set CONFIG_DEBUG_FEATURES=y.  Nothing
   also is needed and no debug output will be generated; but NuttX will
-  use CONFIG_DEBUG=y to mean that a debugger is attached and will deal
+  use CONFIG_DEBUG_FEATURES=y to mean that a debugger is attached and will deal
   with certain resets and debug controls appropriately.
 
   So you should have:
 
-    CONFIG_DEBUG=y
+    CONFIG_DEBUG_FEATURES=y
     CONFIG_DEBUG_SYMBOLS=y
 
   NOTE 4: Every time that you control-C out of the command line GDB, you
@@ -853,9 +853,9 @@ LPC4357-EVB Configuration Options
     CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18
     CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented).
     CONFIG_NET_REGDEBUG - Enabled low level register debug.  Also needs
-      CONFIG_DEBUG.
+      CONFIG_DEBUG_FEATURES.
     CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets.
-      Also needs CONFIG_DEBUG.
+      Also needs CONFIG_DEBUG_FEATURES.
     CONFIG_NET_HASH - Enable receipt of near-perfect match frames.
 
   LPC43xx USB Device Configuration
@@ -964,7 +964,7 @@ Where  is one of the following:
            from the SPI address space after each write.
          CONFIG_DEBUG_SPIFI_DUMP - Debug option to dump read/write buffers.  You
            probably do not want to enable this unless you want to dig through a
-           *lot* of debug output!  Also required CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE,
+           *lot* of debug output!  Also required CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO,
            and CONFIG_DEBUG_FS,
 
     5. In my experience, there were some missing function pointers in the LPC43xx
diff --git a/configs/lpc4357-evb/include/board.h b/configs/lpc4357-evb/include/board.h
index a1667e66dae90c4e3e8c255f54c4a7d255ad93cd..91f0e458b4bd287188f5b574729011384dd11dbf 100644
--- a/configs/lpc4357-evb/include/board.h
+++ b/configs/lpc4357-evb/include/board.h
@@ -43,7 +43,7 @@
 #include 
 #include 
 
-#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ)
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC43_GPIO_IRQ)
 #  include 
 #endif
 
diff --git a/configs/lpc4357-evb/nsh/Make.defs b/configs/lpc4357-evb/nsh/Make.defs
index 544476cdd10b6a6904430fc8f08bf1880a0cd021..d0fe9706c8bb7ad8a02ddd63fde959d94bb64cf7 100644
--- a/configs/lpc4357-evb/nsh/Make.defs
+++ b/configs/lpc4357-evb/nsh/Make.defs
@@ -94,7 +94,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/lpc4357-evb/nsh/defconfig b/configs/lpc4357-evb/nsh/defconfig
index e1f25c97d57b21d692a307f4fc96e54685ee62b3..7c1ae0cefe3f1365a743d027edd7a900bf5222f5 100644
--- a/configs/lpc4357-evb/nsh/defconfig
+++ b/configs/lpc4357-evb/nsh/defconfig
@@ -37,12 +37,15 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 CONFIG_ARCH_STDARG_H=y
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
@@ -57,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -70,14 +72,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
 # CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -86,34 +89,61 @@ CONFIG_ARCH_CHIP_LPC43XX=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
 CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc43xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 CONFIG_ARMV7M_CMNVECTOR=y
+# CONFIG_ARMV7M_LAZYFPU is not set
 CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
 # CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
 # ARMV7M Configuration Options
 #
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
 CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
 
 #
 # LPC43xx Configuration Options
@@ -126,6 +156,8 @@ CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
 # CONFIG_ARCH_CHIP_LPC4330FET100 is not set
 # CONFIG_ARCH_CHIP_LPC4330FET180 is not set
 # CONFIG_ARCH_CHIP_LPC4330FET256 is not set
+# CONFIG_ARCH_CHIP_LPC4337JBD144 is not set
+# CONFIG_ARCH_CHIP_LPC4337JET100 is not set
 # CONFIG_ARCH_CHIP_LPC4350FBD208 is not set
 # CONFIG_ARCH_CHIP_LPC4350FET180 is not set
 # CONFIG_ARCH_CHIP_LPC4350FET256 is not set
@@ -135,6 +167,7 @@ CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
 # CONFIG_ARCH_CHIP_LPC4357FET180 is not set
 # CONFIG_ARCH_CHIP_LPC4357FBD208 is not set
 CONFIG_ARCH_CHIP_LPC4357FET256=y
+# CONFIG_ARCH_CHIP_LPC4370FET100 is not set
 CONFIG_ARCH_FAMILY_LPC4357=y
 # CONFIG_LPC43_BOOT_SRAM is not set
 # CONFIG_LPC43_BOOT_SPIFI is not set
@@ -181,9 +214,17 @@ CONFIG_LPC43_USART0=y
 # CONFIG_LPC43_UART1 is not set
 # CONFIG_LPC43_USART2 is not set
 # CONFIG_LPC43_USART3 is not set
+# CONFIG_LPC43_USBOTG is not set
 # CONFIG_LPC43_USB0 is not set
 # CONFIG_LPC43_USB1 is not set
 # CONFIG_LPC43_WWDT is not set
+# CONFIG_LPC43_GPIO_IRQ is not set
+
+#
+# RS-485 Configuration
+#
+# CONFIG_USART0_RS485MODE is not set
+# CONFIG_USART0_RS485_DTRDIR is not set
 
 #
 # Architecture Options
@@ -196,11 +237,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -260,6 +304,12 @@ CONFIG_NSH_MMCSDMINOR=0
 #
 # Board-Specific Options
 #
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
 
 #
 # RTOS Features
@@ -296,6 +346,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -346,9 +397,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -379,29 +431,51 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
-# CONFIG_TIMER is not set
 # CONFIG_ANALOG is not set
 # CONFIG_AUDIO_DEVICES is not set
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -425,15 +499,13 @@ CONFIG_USART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
-# CONFIG_SERIAL_TERMIOS is not set
 CONFIG_USART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
@@ -449,20 +521,23 @@ CONFIG_USART0_PARITY=0
 CONFIG_USART0_2STOP=0
 # CONFIG_USART0_IFLOWCONTROL is not set
 # CONFIG_USART0_OFLOWCONTROL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_USART0_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -496,17 +571,15 @@ CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -526,6 +599,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -552,6 +629,7 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -566,13 +644,18 @@ CONFIG_LIBC_TMPDIR="/tmp"
 CONFIG_LIBC_MAX_TMPFILE=32
 CONFIG_ARCH_LOWPUTC=y
 # CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -587,26 +670,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -614,76 +697,80 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
 #
 # CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
 
 #
 # Interpreters
 #
-# CONFIG_INTERPRETERS_FICL is not set
 # CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
 # CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -702,13 +789,16 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
 # CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -717,8 +807,10 @@ CONFIG_NSH_NESTDEPTH=3
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -727,6 +819,7 @@ CONFIG_NSH_NESTDEPTH=3
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -736,8 +829,10 @@ CONFIG_NSH_NESTDEPTH=3
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
@@ -764,7 +859,8 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
-CONFIG_LIB_BOARDCTL=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -778,111 +874,19 @@ CONFIG_LIB_BOARDCTL=y
 #
 # System Libraries and NSH Add-Ons
 #
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# EMACS-like Command Line Editor
-#
 # CONFIG_SYSTEM_CLE is not set
-
-#
-# FLASH Program Installation
-#
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# Intel HEX to binary conversion
-#
-# CONFIG_SYSTEM_HEX2BIN is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# NxPlayer media player library / command Line
-#
-
-#
-# RAM test
-#
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-
-#
-# P-Code Support
-#
-
-#
-# PHY Tool
-#
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sudoku
-#
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-
-#
-# Sysinfo
-#
-
-#
-# VI Work-Alike Editor
-#
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# USB Monitor
-#
-
-#
-# Zmodem Commands
-#
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/lpc4357-evb/src/lpc43_appinit.c b/configs/lpc4357-evb/src/lpc43_appinit.c
index 43efc040ceeff200a56cf9080e858514ea283090..aea4aaaa19b264dee22ad508ba4cacd689ba4ca7 100644
--- a/configs/lpc4357-evb/src/lpc43_appinit.c
+++ b/configs/lpc4357-evb/src/lpc43_appinit.c
@@ -90,7 +90,7 @@ static int nsh_spifi_initialize(void)
   mtd = lpc43_spifi_initialize();
   if (!mtd)
     {
-      fdbg("ERROR: lpc43_spifi_initialize failed\n");
+      ferr("ERROR: lpc43_spifi_initialize failed\n");
       return -ENODEV;
     }
 
@@ -100,7 +100,7 @@ static int nsh_spifi_initialize(void)
   ret = ftl_initialize(CONFIG_SPIFI_DEVNO, mtd);
   if (ret < 0)
     {
-      fdbg("ERROR: Initializing the FTL layer: %d\n", ret);
+      ferr("ERROR: Initializing the FTL layer: %d\n", ret);
       return ret;
     }
 #else
@@ -109,7 +109,7 @@ static int nsh_spifi_initialize(void)
   ret = nxffs_initialize(mtd);
   if (ret < 0)
     {
-      fdbg("ERROR: NXFFS initialization failed: %d\n", ret);
+      ferr("ERROR: NXFFS initialization failed: %d\n", ret);
       return ret;
     }
 
@@ -118,7 +118,7 @@ static int nsh_spifi_initialize(void)
   ret = mount(NULL, "/mnt/spifi", "nxffs", 0, NULL);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
+      ferr("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
       return ret;
     }
 #endif
diff --git a/configs/lpc4357-evb/src/lpc43_autoleds.c b/configs/lpc4357-evb/src/lpc43_autoleds.c
index acb63b2554bcc7a02ac492db52221b7a2d7c7696..0a92d582aa50d706f345dc52a51f719ddb84806c 100644
--- a/configs/lpc4357-evb/src/lpc43_autoleds.c
+++ b/configs/lpc4357-evb/src/lpc43_autoleds.c
@@ -86,30 +86,6 @@
  *   -------------------------- --------
  */
 
-/* Debug definitions ********************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define LED_VERBOSE 1
-#    define ledvdbg lldbg
-#  else
-#    undef LED_VERBOSE
-#    define ledvdbg(x...)
-#  endif
-#else
-#  undef LED_VERBOSE
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
diff --git a/configs/lpc4357-evb/src/lpc43_buttons.c b/configs/lpc4357-evb/src/lpc43_buttons.c
index df7f32aef66d65be79752e4bf9c0155cd1fb54f5..c62229d35c5bea282654ed00cf30d117717f5147 100644
--- a/configs/lpc4357-evb/src/lpc43_buttons.c
+++ b/configs/lpc4357-evb/src/lpc43_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/lpc4357-evb/src/board_buttons.c
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -41,6 +41,7 @@
 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -68,13 +69,7 @@ static const uint16_t g_buttoncfg[BOARD_NUM_BUTTONS] =
 {
 };
 
-/* This array defines all of the interrupt handlers current attached to
- * button events.
- */
-
-#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ)
-static xcpt_t g_buttonisr[BOARD_NUM_BUTTONS];
-
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC43_GPIO_IRQ)
 /* This array provides the mapping from button ID numbers to button IRQ
  * numbers.
  */
@@ -173,8 +168,7 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BOARD_BUTTON_* and BOARD_JOYSTICK_* definitions in board.h for the meaning
- *   of enumeration values.  The previous interrupt handler address is returned
- *   (so that it may restored, if so desired).
+ *   of enumeration values.
  *
  *   Note that board_button_irq() also enables button interrupts.  Button
  *   interrupts will remain enabled after the interrupt handler is attached.
@@ -183,23 +177,18 @@ uint8_t board_buttons(void)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ)
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC43_GPIO_IRQ)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
 #if 0 /* Not yet implemented */
-  xcpt_t oldhandler = NULL;
   irqstate_t flags;
+  int ret = -EINVAL;
   int irq;
 
   /* Verify that the button ID is within range */
 
   if ((unsigned)id < BOARD_NUM_BUTTONS)
     {
-      /* Return the current button handler and set the new interrupt handler */
-
-      oldhandler      = g_buttonisr[id];
-      g_buttonisr[id] = irqhandler;
-
       /* Disable interrupts until we are done */
 
       flags = enter_critical_section();
@@ -213,7 +202,7 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
         {
           /* Attach then enable the new interrupt handler */
 
-          (void)irq_attach(irq, irqhandler);
+          (void)irq_attach(irq, irqhandler, arg);
           up_enable_irq(irq);
         }
       else
@@ -223,12 +212,14 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
           up_disable_irq(irq);
           (void)irq_detach(irq);
         }
+
       leave_critical_section(flags);
+      ret = OK;
     }
 
-  return oldhandler;
+  return ret;
 #else
-  return NULL;
+  return -ENOSYS;
 #endif /* Not yet implemented */
 }
 #endif
diff --git a/configs/lpc4357-evb/src/lpc43_userleds.c b/configs/lpc4357-evb/src/lpc43_userleds.c
index 0e8af7c10e6033bcbee72fec5924cc898da98917..5a27a61e8faec9e5bffe47fb102b76252a606689 100644
--- a/configs/lpc4357-evb/src/lpc43_userleds.c
+++ b/configs/lpc4357-evb/src/lpc43_userleds.c
@@ -77,30 +77,6 @@
  *  void board_userled_all(uint8_t ledset);
  */
 
-/* Debug definitions ********************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define LED_VERBOSE 1
-#    define ledvdbg lldbg
-#  else
-#    undef LED_VERBOSE
-#    define ledvdbg(x...)
-#  endif
-#else
-#  undef LED_VERBOSE
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
diff --git a/configs/lpc4370-link2/README.txt b/configs/lpc4370-link2/README.txt
index 110b02fd018d3228f3fdcb1549640d1b1bd1ecb1..9280b3258bd87758c06ed651301354bab07432f8 100644
--- a/configs/lpc4370-link2/README.txt
+++ b/configs/lpc4370-link2/README.txt
@@ -358,14 +358,14 @@ Code Red IDE/Tools
   in debugging symbols.
 
   NOTE 3:  There are few things that NuttX has to do differently if you
-  are using a debugger.  Make sure that you also set CONFIG_DEBUG=y.  Nothing
+  are using a debugger.  Make sure that you also set CONFIG_DEBUG_FEATURES=y.  Nothing
   also is needed and no debug output will be generated; but NuttX will
-  use CONFIG_DEBUG=y to mean that a debugger is attached and will deal
+  use CONFIG_DEBUG_FEATURES=y to mean that a debugger is attached and will deal
   with certain resets and debug controls appropriately.
 
   So you should have:
 
-    CONFIG_DEBUG=y
+    CONFIG_DEBUG_FEATURES=y
     CONFIG_DEBUG_SYMBOLS=y
 
   NOTE 4: Every time that you control-C out of the command line GDB, you
@@ -856,9 +856,9 @@ LPC4370-Link2 Configuration Options
     CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18
     CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented).
     CONFIG_NET_REGDEBUG - Enabled low level register debug.  Also needs
-      CONFIG_DEBUG.
+      CONFIG_DEBUG_FEATURES.
     CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets.
-      Also needs CONFIG_DEBUG.
+      Also needs CONFIG_DEBUG_FEATURES.
     CONFIG_NET_HASH - Enable receipt of near-perfect match frames.
 
   LPC43xx USB Device Configuration
@@ -967,7 +967,7 @@ Where  is one of the following:
            from the SPI address space after each write.
          CONFIG_DEBUG_SPIFI_DUMP - Debug option to dump read/write buffers.  You
            probably do not want to enable this unless you want to dig through a
-           *lot* of debug output!  Also required CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE,
+           *lot* of debug output!  Also required CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO,
            and CONFIG_DEBUG_FS,
 
     5. In my experience, there were some missing function pointers in the LPC43xx
diff --git a/configs/lpc4370-link2/include/board.h b/configs/lpc4370-link2/include/board.h
index 7bbbd861053a6b912fe9739ca6d9c3dc27d900f0..c177c6d461690d10a5038c8e9c2cc340c245f63b 100644
--- a/configs/lpc4370-link2/include/board.h
+++ b/configs/lpc4370-link2/include/board.h
@@ -43,7 +43,7 @@
 #include 
 #include 
 
-#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ)
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC43_GPIO_IRQ)
 #  include 
 #endif
 
diff --git a/configs/lpc4370-link2/nsh/Make.defs b/configs/lpc4370-link2/nsh/Make.defs
index d4b811e51f7d682037d38b141f5aae335cfb3264..0dfbced77385334d11e387cc5db43a751d78b390 100644
--- a/configs/lpc4370-link2/nsh/Make.defs
+++ b/configs/lpc4370-link2/nsh/Make.defs
@@ -94,7 +94,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/lpc4370-link2/nsh/defconfig b/configs/lpc4370-link2/nsh/defconfig
index 8a14cef0675d1e9367d8e207684913a14f6e8a1e..3c49637ad857e9b49bd21a2bcf9aef2dbb350e50 100644
--- a/configs/lpc4370-link2/nsh/defconfig
+++ b/configs/lpc4370-link2/nsh/defconfig
@@ -42,10 +42,11 @@ CONFIG_ARCH_STDARG_H=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,10 +72,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +94,7 @@ CONFIG_ARCH_CHIP_LPC43XX=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -106,6 +107,7 @@ CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
 # CONFIG_ARCH_CORTEXR4 is not set
 # CONFIG_ARCH_CORTEXR4F is not set
 # CONFIG_ARCH_CORTEXR5 is not set
@@ -114,6 +116,8 @@ CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc43xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 CONFIG_ARMV7M_CMNVECTOR=y
@@ -121,6 +125,7 @@ CONFIG_ARMV7M_CMNVECTOR=y
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 # CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
@@ -131,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -151,6 +157,7 @@ CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
 # CONFIG_ARCH_CHIP_LPC4330FET180 is not set
 # CONFIG_ARCH_CHIP_LPC4330FET256 is not set
 # CONFIG_ARCH_CHIP_LPC4337JBD144 is not set
+# CONFIG_ARCH_CHIP_LPC4337JET100 is not set
 # CONFIG_ARCH_CHIP_LPC4350FBD208 is not set
 # CONFIG_ARCH_CHIP_LPC4350FET180 is not set
 # CONFIG_ARCH_CHIP_LPC4350FET256 is not set
@@ -185,7 +192,6 @@ CONFIG_LPC43_BOOT_SPIFI=y
 # CONFIG_LPC43_EVNTMNTR is not set
 # CONFIG_LPC43_GPDMA is not set
 CONFIG_LPC43_I2C0=y
-# CONFIG_LPC43_I2C0_SUPERFAST is not set
 # CONFIG_LPC43_I2C1 is not set
 # CONFIG_LPC43_I2S0 is not set
 # CONFIG_LPC43_I2S1 is not set
@@ -212,6 +218,23 @@ CONFIG_LPC43_USART2=y
 CONFIG_LPC43_USB0=y
 # CONFIG_LPC43_USB1 is not set
 # CONFIG_LPC43_WWDT is not set
+# CONFIG_LPC43_GPIO_IRQ is not set
+
+#
+# RS-485 Configuration
+#
+# CONFIG_USART2_RS485MODE is not set
+# CONFIG_USART2_RS485_DTRDIR is not set
+
+#
+# I2C Configution
+#
+# CONFIG_LPC43_I2C0_SUPERFAST is not set
+
+#
+# USB device controller driver (DCD) options
+#
+# CONFIG_LPC43_USB0DEV_NOVBUS is not set
 
 #
 # Architecture Options
@@ -224,6 +247,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -292,8 +316,6 @@ CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -426,12 +448,17 @@ CONFIG_I2C=y
 # CONFIG_I2C_SLAVE is not set
 # CONFIG_I2C_POLLED is not set
 # CONFIG_I2C_TRACE is not set
+CONFIG_I2C_DRIVER=y
 CONFIG_SPI=y
 # CONFIG_SPI_SLAVE is not set
 # CONFIG_SPI_EXCHANGE is not set
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_I2S is not set
 
 #
@@ -447,24 +474,32 @@ CONFIG_SPI=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -488,10 +523,6 @@ CONFIG_USART2_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
@@ -546,8 +577,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
 CONFIG_CDCACM_EPBULKIN=2
 CONFIG_CDCACM_EPBULKIN_FSSIZE=64
 CONFIG_CDCACM_EPBULKIN_HSSIZE=512
-CONFIG_CDCACM_NWRREQS=4
 CONFIG_CDCACM_NRDREQS=4
+CONFIG_CDCACM_NWRREQS=4
 CONFIG_CDCACM_BULKIN_REQLEN=96
 CONFIG_CDCACM_RXBUFSIZE=512
 CONFIG_CDCACM_TXBUFSIZE=2048
@@ -559,15 +590,18 @@ CONFIG_CDCACM_PRODUCTSTR="lpc4370-link2"
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -601,7 +635,9 @@ CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
 # CONFIG_FS_TMPFS is not set
@@ -610,12 +646,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -634,6 +664,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -678,13 +712,15 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -710,6 +746,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -718,10 +755,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -730,38 +767,45 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -774,8 +818,8 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -785,7 +829,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -794,6 +840,7 @@ CONFIG_EXAMPLES_NSH=y
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -884,6 +931,8 @@ CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_USBCONSOLE is not set
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -897,11 +946,13 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
+CONFIG_SYSTEM_CDCACM=y
+CONFIG_SYSTEM_CDCACM_DEVMINOR=0
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=0
 CONFIG_I2CTOOL_MAXBUS=1
@@ -909,8 +960,7 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=100000
-# CONFIG_FSUTILS_INIFILE is not set
-# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -918,7 +968,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-CONFIG_SYSTEM_CDCACM=y
-CONFIG_SYSTEM_CDCACM_DEVMINOR=0
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/lpc4370-link2/src/lpc4370-link2.h b/configs/lpc4370-link2/src/lpc4370-link2.h
index 887d5b94f4935faf78f704c6ee2f6af4c8846d93..52c3083d13ca101d44e024918656cacd650f2a50 100644
--- a/configs/lpc4370-link2/src/lpc4370-link2.h
+++ b/configs/lpc4370-link2/src/lpc4370-link2.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/lpc4370-link2/src/lpc4370-link2.h
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -99,8 +99,28 @@
  * Public Functions
  ****************************************************************************/
 
+/************************************************************************************
+ * Name: board_spifi_initialize
+ *
+ * Description:
+ *   Initialize SPIFI.
+ *
+ ************************************************************************************/
+
 void board_spifi_initialize(void);
 
+/************************************************************************************
+ * Name: lpc43_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ADC
+int lpc43_adc_setup(void);
+#endif
+
 #endif /* __ASSEMBLY__ */
 #endif /* _CONFIGS_LPC4370_LINK2_SRC_LPC3257_LINK2_H */
 
diff --git a/configs/lpc4370-link2/src/lpc43_adc.c b/configs/lpc4370-link2/src/lpc43_adc.c
index 531b25ad7e6ee8d5af6eea8f8ab3a7c44fb17f9e..0a350e5713a899b6ac4abb615dbe536e1e673e8e 100644
--- a/configs/lpc4370-link2/src/lpc43_adc.c
+++ b/configs/lpc4370-link2/src/lpc43_adc.c
@@ -6,7 +6,7 @@
  *
  * Based on configs/stm3220g-eval/src/lpc43_adc.c
  *
- *   Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -63,15 +63,14 @@
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_adc_setup
+ * Name: lpc43_adc_setup
  *
  * Description:
- *   All LPC43 architectures must provide the following interface to work with
- *   examples/adc.
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
-int board_adc_setup(void)
+int lpc43_adc_setup(void)
 {
   static bool initialized = false;
   struct adc_dev_s *adc;
@@ -86,7 +85,7 @@ int board_adc_setup(void)
       adc = lpc43_adcinitialize();
       if (adc == NULL)
         {
-          adbg("ERROR: Failed to get ADC interface\n");
+          aerr("ERROR: Failed to get ADC interface\n");
           return -ENODEV;
         }
 
@@ -95,7 +94,7 @@ int board_adc_setup(void)
       ret = adc_register("/dev/adc0", adc);
       if (ret < 0)
         {
-          adbg("adc_register failed: %d\n", ret);
+          aerr("ERROR: adc_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/lpc4370-link2/src/lpc43_appinit.c b/configs/lpc4370-link2/src/lpc43_appinit.c
index 660fb2e5f7cdce461a1f6dd5990e987081e92e10..ceda373a43c33d0ab87e238d45f4eadc28111404 100644
--- a/configs/lpc4370-link2/src/lpc43_appinit.c
+++ b/configs/lpc4370-link2/src/lpc43_appinit.c
@@ -70,14 +70,14 @@ static void lpc43_i2c_register(int bus)
   i2c = lpc43_i2cbus_initialize(bus);
   if (i2c == NULL)
     {
-      dbg("ERROR: Failed to get I2C%d interface\n", bus);
+      _err("ERROR: Failed to get I2C%d interface\n", bus);
     }
   else
     {
       ret = i2c_register(i2c, bus);
       if (ret < 0)
         {
-          dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
+          _err("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
           lpc43_i2cbus_uninitialize(i2c);
         }
     }
@@ -135,8 +135,22 @@ static void lpc43_i2ctool(void)
 
 int board_app_initialize(uintptr_t arg)
 {
+  int ret;
+
   /* Register I2C drivers on behalf of the I2C tool */
 
   lpc43_i2ctool();
+
+#ifdef CONFIG_ADC
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = lpc43_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: lpc43_adc_setup failed: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
   return OK;
 }
diff --git a/configs/lpc4370-link2/src/lpc43_autoleds.c b/configs/lpc4370-link2/src/lpc43_autoleds.c
index f9458b0e57587786b86bcdd876ccbf403bea110c..b69407d7b539460abf99fccc60f4af209c8f7f62 100644
--- a/configs/lpc4370-link2/src/lpc43_autoleds.c
+++ b/configs/lpc4370-link2/src/lpc43_autoleds.c
@@ -54,34 +54,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* Debug definitions ********************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define LED_VERBOSE 1
-#    define ledvdbg lldbg
-#  else
-#    undef LED_VERBOSE
-#    define ledvdbg(x...)
-#  endif
-#else
-#  undef LED_VERBOSE
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
diff --git a/configs/lpc4370-link2/src/lpc43_userleds.c b/configs/lpc4370-link2/src/lpc43_userleds.c
index c2953a361794522a86c67901d3ca45d11a5af176..39d01a1b8291881d681f6a9aa4c75e6b2d8fdb3d 100644
--- a/configs/lpc4370-link2/src/lpc43_userleds.c
+++ b/configs/lpc4370-link2/src/lpc43_userleds.c
@@ -53,36 +53,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-/* LED definitions **********************************************************/
-
-
-/* Debug definitions ********************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define LED_VERBOSE 1
-#    define ledvdbg lldbg
-#  else
-#    undef LED_VERBOSE
-#    define ledvdbg(x...)
-#  endif
-#else
-#  undef LED_VERBOSE
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
diff --git a/configs/lpcxpresso-lpc1115/README.txt b/configs/lpcxpresso-lpc1115/README.txt
index 3a0beb1e7fc70b1444918d9def06d8faee772afc..168bed5198ddb94a138c157943b0c14ea7bcca0b 100644
--- a/configs/lpcxpresso-lpc1115/README.txt
+++ b/configs/lpcxpresso-lpc1115/README.txt
@@ -680,64 +680,6 @@ selected as follow:
 
 Where  is one of the following:
 
-  minnsh:
-  ------
-
-    This is a experiment to see just how small we can get a usable NSH
-    configuration.  This configuration has far fewer features than the nsh
-    configuration but is also a fraction of the size.
-
-    STATUS:
-    2015-6-10
-      The nuttx.bin minnsh firmware file size:
-
-        $ ls -l nuttx.bin
-        -rwxr-xr-x 1 alan alan 13859 Jun 10 08:54 nuttx.bin
-
-        $ arm-none-eabi-size nuttx
-        text   data   bss    dec    hex    filename
-        12818  193    704    13715  3593   nuttx
-
-        This is serial console output (and input) :
-
-        NuttShell (NSH)
-        nsh> ls /dev
-        nsh: ls: command not found
-
-        No filesystem, no "ls" command :-)
-
-        nsh> ?
-        help usage: help [-v] []
-
-        ? exec free mb mw xd
-        echo exit help mh ps
-        nsh> free
-        total used free largest
-        Mem: 6464 1816 4648 4648
-
-        nsh> echo "NuttX is magic!"
-        NuttX is magic!
-        nsh>
-
-        Replace NSH with apps/examples/hello:
-
-        $ ls -l nuttx.bin
-        -rwxr-xr-x 1 alan alan 9318 Jun 10 09:02 nuttx.bin
-
-        $ arm-none-eabi-size nuttx
-        text   data   bss    dec    hex    filename
-        8277   193    704    9174   23d6   nuttx
-
-      Some additional commits from Alan reduce this FLASH size by
-      about another kilobyte.  That changes:  (1) disable stack
-      dumping on assertions,and (2) make some FLASH data structures
-      smaller.
-
-      Almost 2Kb of the remaining size was due to some arithmetic
-      "long long" (64 bits) operations drawn from libgcc.a.
-      Alan changed vsprintf to make "long long" support optional.
-      This change reduced the NuttX kernel to less than 8KiB!
-
   nsh:
   ---
 
diff --git a/configs/lpcxpresso-lpc1115/minnsh/Make.defs b/configs/lpcxpresso-lpc1115/minnsh/Make.defs
deleted file mode 100644
index caef0baee284b50b20dd06a5fbfe2925b46fefbb..0000000000000000000000000000000000000000
--- a/configs/lpcxpresso-lpc1115/minnsh/Make.defs
+++ /dev/null
@@ -1,123 +0,0 @@
-############################################################################
-# configs/lpcxpresso-lpc1115/minnsh/Make.defs
-#
-#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
-#   Author: Gregory Nutt 
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name NuttX nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-############################################################################
-
-include ${TOPDIR}/.config
-include ${TOPDIR}/tools/Config.mk
-include ${TOPDIR}/arch/arm/src/armv6-m/Toolchain.defs
-
-LDSCRIPT = ld.script
-
-ifeq ($(WINTOOL),y)
-  # Windows-native toolchains
-  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
-  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
-  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
-else
-  # Linux/Cygwin-native toolchain
-  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
-  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
-  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
-endif
-
-CC = $(CROSSDEV)gcc
-CXX = $(CROSSDEV)g++
-CPP = $(CROSSDEV)gcc -E
-LD = $(CROSSDEV)ld
-AR = $(ARCROSSDEV)ar rcs
-NM = $(ARCROSSDEV)nm
-OBJCOPY = $(CROSSDEV)objcopy
-OBJDUMP = $(CROSSDEV)objdump
-
-ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
-ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
-
-ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
-  ARCHOPTIMIZATION = -g
-endif
-
-ifneq ($(CONFIG_DEBUG_NOOPT),y)
-  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
-endif
-
-ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
-ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
-ARCHWARNINGSXX = -Wall -Wshadow -Wundef
-ARCHDEFINES =
-ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
-
-CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
-CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
-CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
-CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
-CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
-AFLAGS = $(CFLAGS) -D__ASSEMBLY__
-
-NXFLATLDFLAGS1 = -r -d -warn-common
-NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
-LDNXFLATFLAGS = -e main -s 2048
-
-ASMEXT = .S
-OBJEXT = .o
-LIBEXT = .a
-EXEEXT =
-
-ifneq ($(CROSSDEV),arm-nuttx-elf-)
-  LDFLAGS += -nostartfiles -nodefaultlibs
-endif
-ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
-  LDFLAGS += -g
-endif
-
-
-HOSTCC = gcc
-HOSTINCLUDES = -I.
-HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
-HOSTLDFLAGS =
-ifeq ($(CONFIG_HOST_WINDOWS),y)
-  HOSTEXEEXT = .exe
-else
-  HOSTEXEEXT =
-endif
-
-ifeq ($(WINTOOL),y)
-  # Windows-native host tools
-  DIRLINK = $(TOPDIR)/tools/copydir.sh
-  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
-  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
-else
-  # Linux/Cygwin-native host tools
-  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
-endif
diff --git a/configs/lpcxpresso-lpc1115/minnsh/setenv.sh b/configs/lpcxpresso-lpc1115/minnsh/setenv.sh
deleted file mode 100755
index f47c395c1c7af2ca884c6fc1a0c23e3282bb3836..0000000000000000000000000000000000000000
--- a/configs/lpcxpresso-lpc1115/minnsh/setenv.sh
+++ /dev/null
@@ -1,72 +0,0 @@
-#!/bin/bash
-# configs/lpcxpresso-lpc1115/minnsh/setenv.sh
-#
-#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
-#   Author: Gregory Nutt 
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name NuttX nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-
-if [ "$(basename $0)" = "setenv.sh" ] ; then
-  echo "You must source this script, not run it!" 1>&2
-  exit 1
-fi
-
-if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi
-
-WD=`pwd`
-
-# This is the Cygwin path to the location where I installed the CodeSourcery
-# toolchain under windows.  You will also have to edit this if you install
-# the CodeSourcery toolchain in any other location
-#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
-#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
-# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
-
-# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
-# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
-export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
-
-# This is the path to the location where I installed the devkitARM toolchain
-# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
-#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
-
-# This is the default install location for Code Red on Linux
-# export TOOLCHAIN_BIN="/usr/local/LPCXpresso/tools/bin"
-
-# This is the Cygwin path to the LPCXpresso 3.6 install location under Windows
-#export TOOLCHAIN_BIN="/cygdrive/c/nxp/lpcxpresso_3.6/Tools/bin"
-
-# This is the Cygwin path to the location where I build the buildroot
-# toolchain.
-# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
-
-# Add the path to the toolchain to the PATH varialble
-export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
-
-echo "PATH : ${PATH}"
diff --git a/configs/lpcxpresso-lpc1115/nsh/Make.defs b/configs/lpcxpresso-lpc1115/nsh/Make.defs
index f04d2f6b4a2cba05bd50efa47d0cba44000ff63b..aac34e079d10cf189ff1ae1b25dac6aea00a092c 100644
--- a/configs/lpcxpresso-lpc1115/nsh/Make.defs
+++ b/configs/lpcxpresso-lpc1115/nsh/Make.defs
@@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/lpcxpresso-lpc1115/nsh/defconfig b/configs/lpcxpresso-lpc1115/nsh/defconfig
index fc7f470f6da667017d2dceb26c0f94222403dc31..abafecbe2bb39383f97022603567a30f3f5e290c 100644
--- a/configs/lpcxpresso-lpc1115/nsh/defconfig
+++ b/configs/lpcxpresso-lpc1115/nsh/defconfig
@@ -42,10 +42,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,10 +72,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +94,7 @@ CONFIG_ARCH_CHIP_LPC11XX=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -106,6 +107,7 @@ CONFIG_ARCH_CORTEXM0=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
 # CONFIG_ARCH_CORTEXR4 is not set
 # CONFIG_ARCH_CORTEXR4F is not set
 # CONFIG_ARCH_CORTEXR5 is not set
@@ -114,11 +116,14 @@ CONFIG_ARCH_CORTEXM0=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv6-m"
 CONFIG_ARCH_CHIP="lpc11xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 
 #
@@ -128,7 +133,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV6M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL is not set
 CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL=y
-# CONFIG_GPIO_IRQ is not set
+# CONFIG_LPC11_GPIOIRQ is not set
 
 #
 # LPC11xx Configuration Options
@@ -173,6 +178,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -366,13 +372,20 @@ CONFIG_DEV_NULL=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -381,9 +394,10 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -407,10 +421,6 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -437,15 +447,18 @@ CONFIG_UART0_2STOP=0
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -476,12 +489,6 @@ CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -500,6 +507,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -517,7 +528,7 @@ CONFIG_BUILTIN=y
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -539,12 +550,14 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -578,10 +591,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -590,39 +603,44 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
 # CONFIG_FSUTILS_INIFILE is not set
 
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -633,8 +651,8 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -645,6 +663,7 @@ CONFIG_EXAMPLES_NSH=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -754,12 +773,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -767,5 +786,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/lpcxpresso-lpc1115/src/lpc11_adc.c b/configs/lpcxpresso-lpc1115/src/lpc11_adc.c
index 0b76f0c41c2ae14505dc977bf381c66ff039ff86..75936ee338f58da9c67f9a3df06280058fa1242e 100644
--- a/configs/lpcxpresso-lpc1115/src/lpc11_adc.c
+++ b/configs/lpcxpresso-lpc1115/src/lpc11_adc.c
@@ -98,7 +98,7 @@ int adc_devinit(void)
       adc = lpc11_adcinitialize();
       if (adc == NULL)
         {
-          adbg("ERROR: Failed to get ADC interface\n");
+          aerr("ERROR: Failed to get ADC interface\n");
           return -ENODEV;
         }
 
@@ -107,7 +107,7 @@ int adc_devinit(void)
       ret = adc_register("/dev/adc0", adc);
       if (ret < 0)
         {
-          adbg("adc_register failed: %d\n", ret);
+          aerr("ERROR: adc_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/lpcxpresso-lpc1115/src/lpc11_dac.c b/configs/lpcxpresso-lpc1115/src/lpc11_dac.c
index 3447f330362dc7274171612df6cd36343fc8abc7..93730ed0782222e6a3b708056037824f78539481 100644
--- a/configs/lpcxpresso-lpc1115/src/lpc11_dac.c
+++ b/configs/lpcxpresso-lpc1115/src/lpc11_dac.c
@@ -83,14 +83,14 @@ int dac_devinit(void)
     dac = lpc11_dacinitialize();
     if (dac == NULL)
       {
-        adbg("ERROR: Failed to get dac interface\n");
+        aerr("ERROR: Failed to get dac interface\n");
         return -ENODEV;
       }
 
     ret = dac_register("/dev/dac0", dac);
     if (ret < 0)
       {
-        adbg("dac_register failed: %d\n", ret);
+        aerr("ERROR: dac_register failed: %d\n", ret);
         return ret;
       }
 
diff --git a/configs/lpcxpresso-lpc1115/src/lpc11_leds.c b/configs/lpcxpresso-lpc1115/src/lpc11_leds.c
index a112b4e267ada7224bd4f14215a20611518f343c..2c032cd087338ccef08358cc3ee3ff5484e159ba 100644
--- a/configs/lpcxpresso-lpc1115/src/lpc11_leds.c
+++ b/configs/lpcxpresso-lpc1115/src/lpc11_leds.c
@@ -52,36 +52,12 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
 static bool g_ncstate;
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/lpcxpresso-lpc1115/src/lpc11_pwm.c b/configs/lpcxpresso-lpc1115/src/lpc11_pwm.c
index d42ff511c0c24cd7388c71fbebc053a2aa9dcddd..9ecbfcf85e80aab84076cbee1c3f6f7fa336b289 100644
--- a/configs/lpcxpresso-lpc1115/src/lpc11_pwm.c
+++ b/configs/lpcxpresso-lpc1115/src/lpc11_pwm.c
@@ -43,7 +43,7 @@
 #include 
 #include 
 
-#include 
+#include 
 #include 
 
 #include "chip.h"
@@ -96,7 +96,7 @@ int pwm_devinit(void)
       pwm = lpc11_pwminitialize(0);
       if (!pwm)
         {
-          adbg("Failed to get the LPC17XX PWM lower half\n");
+          aerr("ERROR: Failed to get the LPC17XX PWM lower half\n");
           return -ENODEV;
         }
 
@@ -105,14 +105,14 @@ int pwm_devinit(void)
       ret = pwm_register("/dev/pwm0", pwm);
       if (ret < 0)
         {
-          adbg("pwm_register failed: %d\n", ret);
+          aerr("ERROR: pwm_register failed: %d\n", ret);
           return ret;
         }
 
       mcpwm = lpc11_mcpwminitialize(0);
       if (!mcpwm)
         {
-          adbg("Failed to get the LPC17XX MOTOR PWM lower half\n");
+          aerr("ERROR: Failed to get the LPC17XX MOTOR PWM lower half\n");
           return -ENODEV;
         }
 
@@ -121,14 +121,14 @@ int pwm_devinit(void)
       ret = pwm_register("/dev/mcpwm0", mcpwm);
       if (ret < 0)
         {
-          adbg("mcpwm_register failed: %d\n", ret);
+          aerr("ERROR: mcpwm_register failed: %d\n", ret);
           return ret;
         }
 
       timer = lpc11_timerinitialize(0);
       if (!timer)
         {
-          adbg("Failed to get the LPC17XX TIMER lower half\n");
+          aerr("ERROR: Failed to get the LPC17XX TIMER lower half\n");
           return -ENODEV;
         }
 
@@ -137,7 +137,7 @@ int pwm_devinit(void)
       ret = pwm_register("/dev/timer0", timer);
       if (ret < 0)
         {
-          adbg("timer_register failed: %d\n", ret);
+          aerr("ERROR: timer_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/lpcxpresso-lpc1115/src/lpc11_ssp.c b/configs/lpcxpresso-lpc1115/src/lpc11_ssp.c
index b88d9088e74fb83c776cb971fd032aba143fa54e..0d7be5f71e374274f029fb82e2e0c8f45eb32505 100644
--- a/configs/lpcxpresso-lpc1115/src/lpc11_ssp.c
+++ b/configs/lpcxpresso-lpc1115/src/lpc11_ssp.c
@@ -58,36 +58,14 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SSP_DEBUG   /* Define to enable debug */
-#undef SSP_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SSP_DEBUG
-#  define sspdbg  lldbg
-#  ifdef SSP_VERBOSE
-#    define sspvdbg lldbg
-#  else
-#    define sspvdbg(x...)
-#  endif
-#else
-#  undef SSP_VERBOSE
-#  define sspdbg(x...)
-#  define sspvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#ifdef SSP_VERBOSE
+#ifdef CONFIG_DEBUG_GPIO_INFO
 #  define ssp_dumpgpio(m) lpc11_dumpgpio(SDCCS_GPIO, m)
 #else
 #  define ssp_dumpgpio(m)
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -154,7 +132,7 @@ void weak_function lpcxpresso_sspdev_initialize(void)
 #ifdef CONFIG_LPC17_SSP0
 void  lpc11_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
   ssp_dumpgpio("lpc11_ssp0select() Entry");
 
 #warning "Assert CS here (false)"
@@ -164,7 +142,7 @@ void  lpc11_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
 
 uint8_t lpc11_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  sspdbg("Returning SPI_STATUS_PRESENT\n");
+  spiinfo("Returning SPI_STATUS_PRESENT\n");
   return SPI_STATUS_PRESENT;
 }
 #endif
@@ -172,7 +150,7 @@ uint8_t lpc11_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_LPC17_SSP1
 void  lpc11_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
   ssp_dumpgpio("lpc11_ssp1select() Entry");
 
   if (devid == SPIDEV_MMCSD)
@@ -200,12 +178,12 @@ uint8_t lpc11_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 
       if (lpc11_gpioread(LPCXPRESSO_SD_CD) == 0)
         {
-          sspdbg("Returning SPI_STATUS_PRESENT\n");
+          spiinfo("Returning SPI_STATUS_PRESENT\n");
           return SPI_STATUS_PRESENT;
         }
     }
 
-  sspdbg("Returning zero\n");
+  spiinfo("Returning zero\n");
   return 0;
 }
 #endif
diff --git a/configs/lpcxpresso-lpc1115/src/lpcxpresso_lpc1115.h b/configs/lpcxpresso-lpc1115/src/lpcxpresso_lpc1115.h
index 5f3db65ba637a5390d72f90b1a48b66c9b5b1f89..4f523e26b2960baec33b708075305810e1451873 100644
--- a/configs/lpcxpresso-lpc1115/src/lpcxpresso_lpc1115.h
+++ b/configs/lpcxpresso-lpc1115/src/lpcxpresso_lpc1115.h
@@ -147,7 +147,7 @@
  */
 
 #define LPCXPRESSO_SD_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN2)
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC11_GPIOIRQ
 #  define LPCXPRESSO_SD_CD (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN11)
 #else
 #  define LPCXPRESSO_SD_CD (GPIO_INPUT   | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN11)
@@ -183,7 +183,7 @@
  */
 
 #define LPCXPRESSO_USB_CONNECT (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN21)
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC11_GPIOIRQ
 #  define LPCXPRESSO_USB_VBUSSENSE (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN5)
 #else
 #  define LPCXPRESSO_USB_VBUSSENSE (GPIO_INPUT   | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN5)
diff --git a/configs/lpcxpresso-lpc1768/README.txt b/configs/lpcxpresso-lpc1768/README.txt
index 4d00330a14101e5b099fc0f6d2367fd8bacf3f6f..36d5eead96feb86ea33471cd26a99fdce31cd0e3 100644
--- a/configs/lpcxpresso-lpc1768/README.txt
+++ b/configs/lpcxpresso-lpc1768/README.txt
@@ -676,9 +676,9 @@ LPCXpresso Configuration Options
     CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18
     CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented).
     CONFIG_NET_REGDEBUG - Enabled low level register debug.  Also needs
-      CONFIG_DEBUG.
+      CONFIG_DEBUG_FEATURES.
     CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets.
-      Also needs CONFIG_DEBUG.
+      Also needs CONFIG_DEBUG_FEATURES.
     CONFIG_NET_HASH - Enable receipt of near-perfect match frames.
     CONFIG_LPC17_MULTICAST - Enable receipt of multicast (and unicast) frames.
       Automatically set if CONFIG_NET_IGMP is selected.
diff --git a/configs/lpcxpresso-lpc1768/dhcpd/Make.defs b/configs/lpcxpresso-lpc1768/dhcpd/Make.defs
index 0e863a3a679c0cd316da93d1f136b9fde8ad3dd8..9520c26d7024058e734db21af3ab780027b3d95e 100644
--- a/configs/lpcxpresso-lpc1768/dhcpd/Make.defs
+++ b/configs/lpcxpresso-lpc1768/dhcpd/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/lpcxpresso-lpc1768/dhcpd/defconfig b/configs/lpcxpresso-lpc1768/dhcpd/defconfig
index aca1a2a69b5f386354e4abb0a9e3eaa7b097ceb3..c6c3e6ba80899904cffd0ad0eebdaa68eeb92e27 100644
--- a/configs/lpcxpresso-lpc1768/dhcpd/defconfig
+++ b/configs/lpcxpresso-lpc1768/dhcpd/defconfig
@@ -37,14 +37,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -92,7 +96,11 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -102,14 +110,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -119,13 +138,13 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -200,6 +219,7 @@ CONFIG_LPC17_UART3=y
 #
 # Serial driver options
 #
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
 # Ethernet driver options
@@ -211,6 +231,7 @@ CONFIG_NET_NRXDESC=13
 # CONFIG_NET_WOL is not set
 # CONFIG_NET_HASH is not set
 # CONFIG_LPC17_MULTICAST is not set
+CONFIG_LPC17_ETHERNET_HPWORK=y
 
 #
 # Architecture Options
@@ -223,11 +244,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -272,6 +296,7 @@ CONFIG_RAM_SIZE=32768
 #
 CONFIG_ARCH_BOARD_LPCXPRESSO=y
 # CONFIG_ARCH_BOARD_MBED is not set
+# CONFIG_ARCH_BOARD_U_BLOX_C027 is not set
 # CONFIG_ARCH_BOARD_ZKITARM is not set
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="lpcxpresso-lpc1768"
@@ -285,6 +310,7 @@ CONFIG_ARCH_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -303,6 +329,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=4
@@ -320,6 +347,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="dhcpd_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=8
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -350,6 +378,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -358,9 +387,10 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -384,6 +414,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -394,16 +425,21 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -411,8 +447,28 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -420,7 +476,10 @@ CONFIG_NETDEVICES=y
 #
 # General Ethernet MAC Driver Options
 #
+# CONFIG_NETDEV_LOOPBACK is not set
 # CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
+# CONFIG_NETDEV_LATEINIT is not set
 
 #
 # External Ethernet MAC Device Support
@@ -428,9 +487,9 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
-# CONFIG_NET_VNET is not set
+# CONFIG_NET_FTMAC100 is not set
 
 #
 # External Ethernet PHY Device Support
@@ -448,14 +507,16 @@ CONFIG_NETDEVICES=y
 CONFIG_ETH0_PHY_LAN8720=y
 # CONFIG_ETH0_PHY_LAN8740 is not set
 # CONFIG_ETH0_PHY_LAN8740A is not set
+# CONFIG_ETH0_PHY_LAN8742A is not set
 # CONFIG_ETH0_PHY_DM9161 is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -479,14 +540,11 @@ CONFIG_UART3_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART3_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -503,19 +561,27 @@ CONFIG_UART3_PARITY=0
 CONFIG_UART3_2STOP=0
 # CONFIG_UART3_IFLOWCONTROL is not set
 # CONFIG_UART3_OFLOWCONTROL is not set
+# CONFIG_UART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -523,13 +589,11 @@ CONFIG_UART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_GUARDSIZE=2
 
@@ -538,6 +602,7 @@ CONFIG_NET_GUARDSIZE=2
 #
 # CONFIG_NET_MULTILINK is not set
 CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
 # CONFIG_NET_TUN is not set
 
 #
@@ -619,6 +684,7 @@ CONFIG_IOB_NCHAINS=8
 # Routing Table Configuration
 #
 # CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME=""
 
 #
 # Crypto API
@@ -641,12 +707,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -665,6 +725,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -682,7 +746,7 @@ CONFIG_MM_REGIONS=2
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -690,6 +754,8 @@ CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -704,13 +770,18 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_DNSCLIENT is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -723,30 +794,30 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 CONFIG_EXAMPLES_DHCPD=y
 CONFIG_EXAMPLES_DHCPD_NOMAC=y
 CONFIG_EXAMPLES_DHCPD_IPADDR=0x0a000001
 CONFIG_EXAMPLES_DHCPD_DRIPADDR=0x0a000001
 CONFIG_EXAMPLES_DHCPD_NETMASK=0xffffff00
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -754,35 +825,44 @@ CONFIG_EXAMPLES_DHCPD_NETMASK=0xffffff00
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_UDPBLASTER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -794,15 +874,17 @@ CONFIG_EXAMPLES_DHCPD_NETMASK=0xffffff00
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
@@ -819,20 +901,15 @@ CONFIG_NETUTILS_DHCPD_NETMASK=0xffffff00
 CONFIG_NETUTILS_DHCPD_DNSIP=0x08080808
 CONFIG_NETUTILS_DHCPD_OFFERTIME=3600
 CONFIG_NETUTILS_DHCPD_DECLINETIME=3600
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
-# CONFIG_NETDB_DNSCLIENT is not set
-# CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
 CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_PPPD is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
+# CONFIG_NETUTILS_SMTP is not set
+# CONFIG_NETUTILS_TFTPC is not set
 
 #
 # NSH Library
@@ -851,15 +928,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/lpcxpresso-lpc1768/nsh/Make.defs b/configs/lpcxpresso-lpc1768/nsh/Make.defs
index f1d73a762ba3fd16477f6fcc5c41aed01bb07e52..63cc8080b648e74f802d8826dc62beff8f89de4d 100644
--- a/configs/lpcxpresso-lpc1768/nsh/Make.defs
+++ b/configs/lpcxpresso-lpc1768/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/lpcxpresso-lpc1768/nsh/defconfig b/configs/lpcxpresso-lpc1768/nsh/defconfig
index 082098ca9fdb7729a0c733f61a4f5e12c93ea7f7..793bee84d328d4ff5bd21ceb0489e06d61a24236 100644
--- a/configs/lpcxpresso-lpc1768/nsh/defconfig
+++ b/configs/lpcxpresso-lpc1768/nsh/defconfig
@@ -37,14 +37,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -93,7 +97,9 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
@@ -104,14 +110,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -121,13 +138,13 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -202,6 +219,7 @@ CONFIG_LPC17_SSP1=y
 #
 # Serial driver options
 #
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
 # Ethernet driver options
@@ -213,6 +231,7 @@ CONFIG_NET_NRXDESC=6
 # CONFIG_NET_WOL is not set
 # CONFIG_NET_HASH is not set
 # CONFIG_LPC17_MULTICAST is not set
+CONFIG_LPC17_ETHERNET_HPWORK=y
 
 #
 # Architecture Options
@@ -225,6 +244,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -276,6 +296,7 @@ CONFIG_RAM_SIZE=32768
 #
 CONFIG_ARCH_BOARD_LPCXPRESSO=y
 # CONFIG_ARCH_BOARD_MBED is not set
+# CONFIG_ARCH_BOARD_U_BLOX_C027 is not set
 # CONFIG_ARCH_BOARD_ZKITARM is not set
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="lpcxpresso-lpc1768"
@@ -285,19 +306,15 @@ CONFIG_ARCH_BOARD="lpcxpresso-lpc1768"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=1
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -317,6 +334,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=4
@@ -371,6 +389,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -386,9 +405,10 @@ CONFIG_SIG_SIGWORK=17
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -412,6 +432,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -427,10 +448,15 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 # CONFIG_SPI_EXCHANGE is not set
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
@@ -438,6 +464,7 @@ CONFIG_SPI=y
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -445,7 +472,26 @@ CONFIG_SPI=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -457,6 +503,7 @@ CONFIG_MMCSD_SPICLOCK=20000000
 CONFIG_MMCSD_SPIMODE=0
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 CONFIG_MTD=y
 
 #
@@ -477,12 +524,16 @@ CONFIG_MTD=y
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -506,10 +557,9 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -533,9 +583,10 @@ CONFIG_ETH0_PHY_LAN8720=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -559,10 +610,6 @@ CONFIG_UART3_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -585,19 +632,26 @@ CONFIG_UART3_2STOP=0
 # CONFIG_UART3_IFLOWCONTROL is not set
 # CONFIG_UART3_OFLOWCONTROL is not set
 # CONFIG_UART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -605,13 +659,11 @@ CONFIG_UART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -738,7 +790,9 @@ CONFIG_FS_FAT=y
 # CONFIG_FAT_LCNAMES is not set
 # CONFIG_FAT_LFN is not set
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_NFS is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
@@ -747,12 +801,6 @@ CONFIG_FS_FAT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -771,6 +819,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -798,6 +850,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -815,7 +869,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -823,14 +878,17 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=4
 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_RESOLVCONF is not set
 CONFIG_NETDB_DNSSERVER_NOADDR=y
 # CONFIG_NETDB_DNSSERVER_IPv4 is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -849,18 +907,20 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -870,41 +930,48 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -917,8 +984,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -931,25 +999,27 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -968,6 +1038,7 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
 # CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
@@ -994,13 +1065,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1010,6 +1081,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -1017,6 +1089,9 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=1
 
 #
 # Configure Command Options
@@ -1042,6 +1117,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1070,6 +1146,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
 CONFIG_NSH_TELNETD_CLIENTPRIO=100
 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
 CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 # CONFIG_NSH_TELNET_LOGIN is not set
 
 #
@@ -1084,13 +1162,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1099,5 +1176,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/lpcxpresso-lpc1768/nx/Make.defs b/configs/lpcxpresso-lpc1768/nx/Make.defs
index 859d8b1ced1f918fb0e2be977a2cba3242a5bab3..8d38fdf494eddb8788621b213c745b9c3cb44d9a 100644
--- a/configs/lpcxpresso-lpc1768/nx/Make.defs
+++ b/configs/lpcxpresso-lpc1768/nx/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/lpcxpresso-lpc1768/nx/defconfig b/configs/lpcxpresso-lpc1768/nx/defconfig
index e604f2997f8089d03facb1785b1041b962168789..7262a0dd2dc0f2fd3f4818a61d6e18a0947336cb 100644
--- a/configs/lpcxpresso-lpc1768/nx/defconfig
+++ b/configs/lpcxpresso-lpc1768/nx/defconfig
@@ -37,14 +37,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -92,7 +96,11 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -102,14 +110,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -119,13 +138,13 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -200,6 +219,7 @@ CONFIG_LPC17_SSP1=y
 #
 # Serial driver options
 #
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
 # Architecture Options
@@ -212,11 +232,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -261,6 +284,7 @@ CONFIG_RAM_SIZE=32768
 #
 CONFIG_ARCH_BOARD_LPCXPRESSO=y
 # CONFIG_ARCH_BOARD_MBED is not set
+# CONFIG_ARCH_BOARD_U_BLOX_C027 is not set
 # CONFIG_ARCH_BOARD_ZKITARM is not set
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="lpcxpresso-lpc1768"
@@ -274,10 +298,11 @@ CONFIG_ARCH_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 CONFIG_BOARDCTL_GRAPHICS=y
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -297,6 +322,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=4
@@ -314,6 +340,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nx_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -364,9 +391,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -387,6 +415,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -397,13 +426,20 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
+# CONFIG_SPI_SLAVE is not set
 # CONFIG_SPI_EXCHANGE is not set
 CONFIG_SPI_CMDDATA=y
 # CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
@@ -411,6 +447,7 @@ CONFIG_SPI_CMDDATA=y
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -418,10 +455,20 @@ CONFIG_SPI_CMDDATA=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 # CONFIG_LCD_NOGETRUN is not set
@@ -440,8 +487,10 @@ CONFIG_UG9664HSWAG01_SPIMODE=0
 CONFIG_UG9664HSWAG01_FREQUENCY=3500000
 CONFIG_UG9664HSWAG01_NINTERFACES=1
 CONFIG_UG9664HSWAG01_POWER=y
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
+# CONFIG_LCD_SSD1351 is not set
 # CONFIG_LCD_ST7565 is not set
 # CONFIG_LCD_ST7567 is not set
 # CONFIG_LCD_UG2864AMBAG01 is not set
@@ -453,21 +502,27 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
+# CONFIG_SLCD is not set
 
 #
-# Alphanumeric/Segment LCD Devices
+# LED Support
 #
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -491,14 +546,11 @@ CONFIG_UART3_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART3_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -515,19 +567,27 @@ CONFIG_UART3_PARITY=0
 CONFIG_UART3_2STOP=0
 # CONFIG_UART3_IFLOWCONTROL is not set
 # CONFIG_UART3_OFLOWCONTROL is not set
+# CONFIG_UART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -558,12 +618,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -572,6 +626,7 @@ CONFIG_NX_LCDDRIVER=y
 CONFIG_NX_NPLANES=1
 CONFIG_NX_BGCOLOR=0x0
 # CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -670,6 +725,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -695,6 +754,8 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -709,13 +770,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -728,27 +793,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -769,33 +833,43 @@ CONFIG_EXAMPLES_NX_BPP=1
 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set
 CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=4
 CONFIG_EXAMPLES_NX_EXTERNINIT=y
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -807,26 +881,24 @@ CONFIG_EXAMPLES_NX_EXTERNINIT=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -844,15 +916,17 @@ CONFIG_EXAMPLES_NX_EXTERNINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/lpcxpresso-lpc1768/src/Makefile b/configs/lpcxpresso-lpc1768/src/Makefile
index c7a44a8284fb3e2e7d4e4927c4629c8bbec35402..24441d8eb35def475f5b26df7955d92a29ae6420 100644
--- a/configs/lpcxpresso-lpc1768/src/Makefile
+++ b/configs/lpcxpresso-lpc1768/src/Makefile
@@ -36,7 +36,15 @@
 -include $(TOPDIR)/Make.defs
 
 ASRCS =
-CSRCS = lpc17_boot.c lpc17_leds.c lpc17_ssp.c lpc17_adc.c lpc17_dac.c lpc17_pwm.c
+CSRCS = lpc17_boot.c lpc17_leds.c lpc17_ssp.c lpc17_dac.c
+
+ifeq ($(CONFIG_PWM),y)
+CSRCS += lpc17_pwm.c
+endif
+
+ifeq ($(CONFIG_ADC),y)
+CSRCS += lpc17_adc.c
+endif
 
 ifeq ($(CONFIG_LIB_BOARDCTL),y)
 CSRCS += lpc17_appinit.c
diff --git a/configs/lpcxpresso-lpc1768/src/lpc17_adc.c b/configs/lpcxpresso-lpc1768/src/lpc17_adc.c
index dd7fc837ea3ba20e5d3d8791728d69c9fbf1cfa7..e76f67ff20edaaeb814e7a15aab45d6dedae2438 100644
--- a/configs/lpcxpresso-lpc1768/src/lpc17_adc.c
+++ b/configs/lpcxpresso-lpc1768/src/lpc17_adc.c
@@ -6,7 +6,7 @@
  *
  * Based on configs/stm3220g-eval/src/lpc17_adc.c
  *
- *   Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -59,32 +59,19 @@
 
 #ifdef CONFIG_ADC
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/************************************************************************************
- * Private Data
- ************************************************************************************/
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_adc_setup
+ * Name: lpcxpresso_adc_setup
  *
  * Description:
- *   All LPC17 architectures must provide the following interface to work with
- *   examples/adc.
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
-int board_adc_setup(void)
+int lpcxpresso_adc_setup(void)
 {
   static bool initialized = false;
   struct adc_dev_s *adc;
@@ -99,7 +86,7 @@ int board_adc_setup(void)
       adc = lpc17_adcinitialize();
       if (adc == NULL)
         {
-          adbg("ERROR: Failed to get ADC interface\n");
+          aerr("ERROR: Failed to get ADC interface\n");
           return -ENODEV;
         }
 
@@ -108,7 +95,7 @@ int board_adc_setup(void)
       ret = adc_register("/dev/adc0", adc);
       if (ret < 0)
         {
-          adbg("adc_register failed: %d\n", ret);
+          aerr("ERROR: adc_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/lpcxpresso-lpc1768/src/lpc17_appinit.c b/configs/lpcxpresso-lpc1768/src/lpc17_appinit.c
index 0aefdd37d44148669dd045243c7dab830d0e2a9c..d922e61963fa01547a798cf395a3df69f8c5f729 100644
--- a/configs/lpcxpresso-lpc1768/src/lpc17_appinit.c
+++ b/configs/lpcxpresso-lpc1768/src/lpc17_appinit.c
@@ -139,9 +139,10 @@
 
 int board_app_initialize(uintptr_t arg)
 {
+  int ret;
+
 #ifdef NSH_HAVEMMCSD
   FAR struct spi_dev_s *ssp;
-  int ret;
 
   /* Get the SSP port */
 
@@ -169,5 +170,27 @@ int board_app_initialize(uintptr_t arg)
   syslog(LOG_INFO, "Successfuly bound SSP port %d to MMC/SD slot %d\n",
          CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO);
 #endif
+
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device. */
+
+  ret = lpcexpresso_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: lpcexpresso_pwm_setup() failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_ADC
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = lpcxpresso_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: lpcxpresso_adc_setup failed: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
   return OK;
 }
diff --git a/configs/lpcxpresso-lpc1768/src/lpc17_dac.c b/configs/lpcxpresso-lpc1768/src/lpc17_dac.c
index f27c4edf61bf11493fd576cdaf086e5093d036f8..1948b4312c287b7b3729ef596588a2a15c081fb1 100644
--- a/configs/lpcxpresso-lpc1768/src/lpc17_dac.c
+++ b/configs/lpcxpresso-lpc1768/src/lpc17_dac.c
@@ -79,14 +79,14 @@ int dac_devinit(void)
     dac = lpc17_dacinitialize();
     if (dac == NULL)
       {
-        adbg("ERROR: Failed to get dac interface\n");
+        aerr("ERROR: Failed to get dac interface\n");
         return -ENODEV;
       }
 
     ret = dac_register("/dev/dac0", dac);
     if (ret < 0)
       {
-        adbg("dac_register failed: %d\n", ret);
+        aerr("ERROR: dac_register failed: %d\n", ret);
         return ret;
       }
 
diff --git a/configs/lpcxpresso-lpc1768/src/lpc17_leds.c b/configs/lpcxpresso-lpc1768/src/lpc17_leds.c
index 0b56fdc148b00e3dc57c27ff1d02d38a209555de..c0ed65821f706c63fb4df7b28463852e3157b592 100644
--- a/configs/lpcxpresso-lpc1768/src/lpc17_leds.c
+++ b/configs/lpcxpresso-lpc1768/src/lpc17_leds.c
@@ -52,36 +52,12 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
 static bool g_ncstate;
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/lpcxpresso-lpc1768/src/lpc17_oled.c b/configs/lpcxpresso-lpc1768/src/lpc17_oled.c
index a6845e1dab114e4c4b1824424b055419c9c594ed..063af42b2dcae2cdbe166ab96f5fac1df9c6a245 100644
--- a/configs/lpcxpresso-lpc1768/src/lpc17_oled.c
+++ b/configs/lpcxpresso-lpc1768/src/lpc17_oled.c
@@ -69,27 +69,11 @@
 #endif
 
 /* Debug ********************************************************************/
-/* Define the CONFIG_DEBUG_LCD to enable detailed debug output (stuff you
- * would never want to see unless you are debugging this file).
- *
- * Verbose debug must also be enabled
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
 
 #ifdef CONFIG_DEBUG_LCD
-#  define ugdbg(format, ...)  vdbg(format, ##__VA_ARGS__)
 #  define oleddc_dumpgpio(m)  lpc17_dumpgpio(LPCXPRESSO_OLED_POWER, m)
 #  define oledcs_dumpgpio(m)  lpc17_dumpgpio(LPCXPRESSO_OLED_CS, m)
 #else
-#  define ugdbg(x...)
 #  define oleddc_dumpgpio(m)
 #  define oledcs_dumpgpio(m)
 #endif
@@ -128,7 +112,7 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
   spi = lpc17_sspbus_initialize(1);
   if (!spi)
     {
-      glldbg("Failed to initialize SPI port 1\n");
+      gerr("ERROR: Failed to initialize SPI port 1\n");
     }
   else
     {
@@ -137,11 +121,11 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
       dev = ug_initialize(spi, devno);
       if (!dev)
         {
-          glldbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno);
+          gerr("ERROR: Failed to bind SPI port 1 to OLED %d: %d\n", devno);
         }
      else
         {
-          gllvdbg("Bound SPI port 1 to OLED %d\n", devno);
+          ginfo("Bound SPI port 1 to OLED %d\n", devno);
 
           /* And turn the OLED on (dim) */
 
@@ -209,7 +193,7 @@ int lpc17_ssp1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
 #ifdef CONFIG_UG9664HSWAG01_POWER
 void ug_power(unsigned int devno, bool on)
 {
-  gllvdbg("power %s\n", on ? "ON" : "OFF");
+  ginfo("power %s\n", on ? "ON" : "OFF");
   (void)lpc17_gpiowrite(LPCXPRESSO_OLED_POWER, on);
 }
 #endif
diff --git a/configs/lpcxpresso-lpc1768/src/lpc17_pwm.c b/configs/lpcxpresso-lpc1768/src/lpc17_pwm.c
index 565c33a1817a04d728cfb2c7b3a396b281a92605..27f122c27b07c9f050fa10796931ed09f5f87c94 100644
--- a/configs/lpcxpresso-lpc1768/src/lpc17_pwm.c
+++ b/configs/lpcxpresso-lpc1768/src/lpc17_pwm.c
@@ -44,7 +44,7 @@
 #include 
 
 #include 
-#include 
+#include 
 
 #include 
 
@@ -64,24 +64,19 @@ FAR struct pwm_lowerhalf_s *lpc17_pwminitialize(int timer);
 FAR struct pwm_lowerhalf_s *lpc17_mcpwminitialize(int timer);
 FAR struct pwm_lowerhalf_s *lpc17_timerinitialize(int timer);
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_pwm_setup
+ * Name: lpcexpresso_pwm_setup
  *
  * Description:
- *   All LPC17 architectures must provide the following interface to work with
- *   examples/pwm.
+ *   Initialize PWM and register the PWM device.
  *
  ************************************************************************************/
 
-int board_pwm_setup(void)
+int lpcexpresso_pwm_setup(void)
 {
   static bool initialized = false;
   struct pwm_lowerhalf_s *pwm;
@@ -98,7 +93,7 @@ int board_pwm_setup(void)
       pwm = lpc17_pwminitialize(0);
       if (!pwm)
         {
-          adbg("Failed to get the LPC17XX PWM lower half\n");
+          aerr("ERROR: Failed to get the LPC17XX PWM lower half\n");
           return -ENODEV;
         }
 
@@ -107,14 +102,14 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/pwm0", pwm);
       if (ret < 0)
         {
-          adbg("pwm_register failed: %d\n", ret);
+          aerr("ERROR: pwm_register failed: %d\n", ret);
           return ret;
         }
 
       mcpwm = lpc17_mcpwminitialize(0);
       if (!mcpwm)
         {
-          adbg("Failed to get the LPC17XX MOTOR PWM lower half\n");
+          aerr("ERROR: Failed to get the LPC17XX MOTOR PWM lower half\n");
           return -ENODEV;
         }
 
@@ -123,14 +118,14 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/mcpwm0", mcpwm);
       if (ret < 0)
         {
-          adbg("mcpwm_register failed: %d\n", ret);
+          aerr("ERROR: mcpwm_register failed: %d\n", ret);
           return ret;
         }
 
       timer = lpc17_timerinitialize(0);
       if (!timer)
         {
-          adbg("Failed to get the LPC17XX TIMER lower half\n");
+          aerr("ERROR: Failed to get the LPC17XX TIMER lower half\n");
           return -ENODEV;
         }
 
@@ -139,7 +134,7 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/timer0", timer);
       if (ret < 0)
         {
-          adbg("timer_register failed: %d\n", ret);
+          aerr("ERROR: timer_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/lpcxpresso-lpc1768/src/lpc17_ssp.c b/configs/lpcxpresso-lpc1768/src/lpc17_ssp.c
index 9de1a6b86cf722e583375b307efe68a50771fdf5..c56ab469398952633bf2ae6217f99a6b26ea5d3d 100644
--- a/configs/lpcxpresso-lpc1768/src/lpc17_ssp.c
+++ b/configs/lpcxpresso-lpc1768/src/lpc17_ssp.c
@@ -58,36 +58,14 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SSP_DEBUG   /* Define to enable debug */
-#undef SSP_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SSP_DEBUG
-#  define sspdbg  lldbg
-#  ifdef SSP_VERBOSE
-#    define sspvdbg lldbg
-#  else
-#    define sspvdbg(x...)
-#  endif
-#else
-#  undef SSP_VERBOSE
-#  define sspdbg(x...)
-#  define sspvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#ifdef SSP_VERBOSE
+#ifdef CONFIG_DEBUG_GPIO_INFO
 #  define ssp_dumpgpio(m) lpc17_dumpgpio(SDCCS_GPIO, m)
 #else
 #  define ssp_dumpgpio(m)
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -154,7 +132,7 @@ void weak_function lpcxpresso_sspdev_initialize(void)
 #ifdef CONFIG_LPC17_SSP0
 void  lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
   ssp_dumpgpio("lpc17_ssp0select() Entry");
 
 #warning "Assert CS here (false)"
@@ -164,7 +142,7 @@ void  lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
 
 uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  sspdbg("Returning SPI_STATUS_PRESENT\n");
+  spiinfo("Returning SPI_STATUS_PRESENT\n");
   return SPI_STATUS_PRESENT;
 }
 #endif
@@ -172,7 +150,7 @@ uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_LPC17_SSP1
 void  lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
   ssp_dumpgpio("lpc17_ssp1select() Entry");
 
   if (devid == SPIDEV_MMCSD)
@@ -200,12 +178,12 @@ uint8_t lpc17_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 
       if (lpc17_gpioread(LPCXPRESSO_SD_CD) == 0)
         {
-          sspdbg("Returning SPI_STATUS_PRESENT\n");
+          spiinfo("Returning SPI_STATUS_PRESENT\n");
           return SPI_STATUS_PRESENT;
         }
     }
 
-  sspdbg("Returning zero\n");
+  spiinfo("Returning zero\n");
   return 0;
 }
 #endif
diff --git a/configs/lpcxpresso-lpc1768/src/lpcxpresso-lpc1768.h b/configs/lpcxpresso-lpc1768/src/lpcxpresso-lpc1768.h
index 6f31162233da1a1b0f13da10482fe134582fea12..ecde0db1213f43377dd1a9b2c5e269476fb35a5a 100644
--- a/configs/lpcxpresso-lpc1768/src/lpcxpresso-lpc1768.h
+++ b/configs/lpcxpresso-lpc1768/src/lpcxpresso-lpc1768.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * configs/lpcxpresso-lpc1768/src/lpcxpresso-lpc1768.h
+ * configs/lpcxpresso-lpcxpresso68/src/lpcxpresso-lpcxpresso68.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -140,14 +140,14 @@
  * SD   Signal      Pin   Pin
  * ---  ----------- ----- --------
  * CS   PIO1_11*     55   P2.2        (See LPCXPRESSO_SD_CS)
- * DIN  PIO0_9-MOSI   5   P0.9 MOSI1  (See GPIO_SSP1_MOSI in chip/lpc17_ssp.h)
- * DOUT PIO0_8-MISO   6   P0.8 MISO1  (See GPIO_SSP1_MISO in chip/lpc17_ssp.h)
+ * DIN  PIO0_9-MOSI   5   P0.9 MOSI1  (See GPIO_SSP1_MOSI in chip/lpcxpresso_ssp.h)
+ * DOUT PIO0_8-MISO   6   P0.8 MISO1  (See GPIO_SSP1_MISO in chip/lpcxpresso_ssp.h)
  * CLK  PIO2_11-SCK   7   P0.9 SCK1   (See GPIO_SSP1_SCK in board.h)
  * CD   PIO2_10      52   P2.11       (See LPCXPRESSO_SD_CD)
  */
 
 #define LPCXPRESSO_SD_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN2)
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
 #  define LPCXPRESSO_SD_CD (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN11)
 #else
 #  define LPCXPRESSO_SD_CD (GPIO_INPUT   | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN11)
@@ -183,7 +183,7 @@
  */
 
 #define LPCXPRESSO_USB_CONNECT (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN21)
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
 #  define LPCXPRESSO_USB_VBUSSENSE (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN5)
 #else
 #  define LPCXPRESSO_USB_VBUSSENSE (GPIO_INPUT   | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN5)
@@ -230,6 +230,30 @@
 
 void weak_function lpcxpresso_sspdev_initialize(void);
 
+/************************************************************************************
+ * Name: lpcexpresso_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PWM
+int lpcexpresso_pwm_setup(void);
+#endif
+
+/************************************************************************************
+ * Name: lpcxpresso_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ADC
+int lpcxpresso_adc_setup(void);
+#endif
+
 #endif /* __ASSEMBLY__ */
 #endif /* _CONFIGS_LPCXPRESSO_LPC1768_SRC_LPCXPRESSO_H */
 
diff --git a/configs/lpcxpresso-lpc1768/thttpd/Make.defs b/configs/lpcxpresso-lpc1768/thttpd/Make.defs
index eaf80e626973e9aac6de57f7db948707c76c629e..8ce4329157fe0442712b137670434238084ce502 100644
--- a/configs/lpcxpresso-lpc1768/thttpd/Make.defs
+++ b/configs/lpcxpresso-lpc1768/thttpd/Make.defs
@@ -79,7 +79,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/lpcxpresso-lpc1768/thttpd/defconfig b/configs/lpcxpresso-lpc1768/thttpd/defconfig
index 69b2148fdfcf62c73bf26a03bf73630709260bea..65c4a3186425b9d1384ebad745409dc8e44db903 100644
--- a/configs/lpcxpresso-lpc1768/thttpd/defconfig
+++ b/configs/lpcxpresso-lpc1768/thttpd/defconfig
@@ -37,14 +37,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -92,7 +96,11 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -102,14 +110,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -119,13 +138,13 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -200,6 +219,7 @@ CONFIG_LPC17_UART3=y
 #
 # Serial driver options
 #
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
 # Ethernet driver options
@@ -211,6 +231,7 @@ CONFIG_NET_NRXDESC=13
 # CONFIG_NET_WOL is not set
 # CONFIG_NET_HASH is not set
 # CONFIG_LPC17_MULTICAST is not set
+CONFIG_LPC17_ETHERNET_HPWORK=y
 
 #
 # Architecture Options
@@ -223,11 +244,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -272,6 +296,7 @@ CONFIG_RAM_SIZE=32768
 #
 CONFIG_ARCH_BOARD_LPCXPRESSO=y
 # CONFIG_ARCH_BOARD_MBED is not set
+# CONFIG_ARCH_BOARD_U_BLOX_C027 is not set
 # CONFIG_ARCH_BOARD_ZKITARM is not set
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="lpcxpresso-lpc1768"
@@ -285,6 +310,7 @@ CONFIG_ARCH_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -303,6 +329,7 @@ CONFIG_DISABLE_MQUEUE=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=4
@@ -320,6 +347,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="thttp_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -350,6 +378,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -358,9 +387,10 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -384,6 +414,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -394,16 +425,21 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -411,8 +447,28 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -420,7 +476,11 @@ CONFIG_NETDEVICES=y
 #
 # General Ethernet MAC Driver Options
 #
+# CONFIG_NETDEV_LOOPBACK is not set
+# CONFIG_NETDEV_TELNET is not set
 # CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
+# CONFIG_NETDEV_LATEINIT is not set
 
 #
 # External Ethernet MAC Device Support
@@ -428,9 +488,9 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
-# CONFIG_NET_VNET is not set
+# CONFIG_NET_FTMAC100 is not set
 
 #
 # External Ethernet PHY Device Support
@@ -448,14 +508,19 @@ CONFIG_NETDEVICES=y
 CONFIG_ETH0_PHY_LAN8720=y
 # CONFIG_ETH0_PHY_LAN8740 is not set
 # CONFIG_ETH0_PHY_LAN8740A is not set
+# CONFIG_ETH0_PHY_LAN8742A is not set
 # CONFIG_ETH0_PHY_DM9161 is not set
-# CONFIG_PIPES is not set
+CONFIG_PIPES=y
+CONFIG_DEV_PIPE_MAXSIZE=1024
+CONFIG_DEV_PIPE_SIZE=1024
+CONFIG_DEV_FIFO_SIZE=1024
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -479,13 +544,10 @@ CONFIG_UART3_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART3_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -502,19 +564,27 @@ CONFIG_UART3_PARITY=0
 CONFIG_UART3_2STOP=0
 # CONFIG_UART3_IFLOWCONTROL is not set
 # CONFIG_UART3_OFLOWCONTROL is not set
+# CONFIG_UART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -522,13 +592,11 @@ CONFIG_UART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -538,6 +606,7 @@ CONFIG_NET_GUARDSIZE=2
 #
 # CONFIG_NET_MULTILINK is not set
 CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
 # CONFIG_NET_TUN is not set
 
 #
@@ -623,6 +692,7 @@ CONFIG_IOB_NCHAINS=8
 # Routing Table Configuration
 #
 # CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME=""
 
 #
 # Crypto API
@@ -646,16 +716,11 @@ CONFIG_FS_READABLE=y
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 CONFIG_FS_ROMFS=y
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -674,6 +739,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -701,6 +770,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -716,13 +787,18 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -735,14 +811,14 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -750,11 +826,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -763,20 +839,21 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
@@ -784,6 +861,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 CONFIG_EXAMPLES_THTTPD=y
@@ -792,14 +870,24 @@ CONFIG_EXAMPLES_THTTPD_DRIPADDR=0x0a000001
 CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -811,20 +899,25 @@ CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
 CONFIG_NETUTILS_THTTPD=y
@@ -859,16 +952,10 @@ CONFIG_THTTPD_IDLE_SEND_LIMIT_SEC=300
 CONFIG_THTTPD_TILDE_MAP_NONE=y
 # CONFIG_THTTPD_GENERATE_INDICES is not set
 # CONFIG_THTTPD_USE_URLPATTERN is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -886,15 +973,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/lpcxpresso-lpc1768/usbmsc/Make.defs b/configs/lpcxpresso-lpc1768/usbmsc/Make.defs
index 540f585a1d3bba9a0f0d07f67ede66ef4e8333f0..783f3adbacaff76fc38b8c0f28fbd6f38fc89a37 100644
--- a/configs/lpcxpresso-lpc1768/usbmsc/Make.defs
+++ b/configs/lpcxpresso-lpc1768/usbmsc/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/lpcxpresso-lpc1768/usbmsc/defconfig b/configs/lpcxpresso-lpc1768/usbmsc/defconfig
index a6d2fa0c3da170998ba24ae0ffc0797546bcf291..ec0ae1986e3ae7f2431e667946cdbcf41b941050 100644
--- a/configs/lpcxpresso-lpc1768/usbmsc/defconfig
+++ b/configs/lpcxpresso-lpc1768/usbmsc/defconfig
@@ -37,14 +37,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -71,10 +72,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -92,7 +93,11 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -102,14 +107,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -119,13 +135,14 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
+# CONFIG_LPC17_GPIOIRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -223,11 +240,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -272,6 +292,7 @@ CONFIG_RAM_SIZE=32768
 #
 CONFIG_ARCH_BOARD_LPCXPRESSO=y
 # CONFIG_ARCH_BOARD_MBED is not set
+# CONFIG_ARCH_BOARD_U_BLOX_C027 is not set
 # CONFIG_ARCH_BOARD_ZKITARM is not set
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="lpcxpresso-lpc1768"
@@ -286,7 +307,12 @@ CONFIG_ARCH_LEDS=y
 # Board-Specific Options
 #
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
 
 #
 # RTOS Features
@@ -321,6 +347,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="msconn_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -371,9 +398,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -404,14 +432,20 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
 # CONFIG_SPI_EXCHANGE is not set
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_I2S is not set
 
 #
@@ -425,7 +459,21 @@ CONFIG_SPI=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -437,15 +485,17 @@ CONFIG_MMCSD_SPICLOCK=12500000
 CONFIG_MMCSD_SPIMODE=0
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -469,14 +519,11 @@ CONFIG_UART3_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART3_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -493,6 +540,7 @@ CONFIG_UART3_PARITY=0
 CONFIG_UART3_2STOP=0
 # CONFIG_UART3_IFLOWCONTROL is not set
 # CONFIG_UART3_OFLOWCONTROL is not set
+# CONFIG_UART3_DMA is not set
 CONFIG_USBDEV=y
 
 #
@@ -532,15 +580,18 @@ CONFIG_USBMSC_SCSI_STACKSIZE=2048
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -572,16 +623,11 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -600,6 +646,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -644,11 +694,15 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -663,26 +717,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -690,33 +744,45 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -729,26 +795,23 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -766,17 +829,17 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 CONFIG_SYSTEM_USBMSC=y
 CONFIG_SYSTEM_USBMSC_NLUNS=1
 CONFIG_SYSTEM_USBMSC_DEVMINOR1=0
@@ -786,4 +849,5 @@ CONFIG_SYSTEM_USBMSC_DEVPATH2="/dev/mmcsd1"
 CONFIG_SYSTEM_USBMSC_DEVMINOR3=2
 CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2"
 # CONFIG_SYSTEM_USBMSC_DEBUGMM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/maple/include/board.h b/configs/maple/include/board.h
index 8b4da7dd35c6a754ccf124c8a074936592a4bb05..c45cef1005f6c7060364762c5e83d621a0c2133d 100644
--- a/configs/maple/include/board.h
+++ b/configs/maple/include/board.h
@@ -2,7 +2,7 @@
  * configs/maple/include/board.h
  * include/arch/board/board.h
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Authors: Gregory Nutt 
  *            Librae 
  *
@@ -94,14 +94,14 @@
 #define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd2
 #define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
 
-/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */
+/* APB1 timers 2-7 will be twice PCLK1 */
 
 #define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM5_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM6_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM7_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 
 /* USB divider -- Divide PLL clock by 1.5 */
 
@@ -111,8 +111,14 @@
  * otherwise frequency is 2xAPBx.
  * Note: TIM1,8 are on APB2, others on APB1 */
 
-#define STM32_TIM18_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_TIM27_FREQUENCY   STM32_HCLK_FREQUENCY
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM3_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM4_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM5_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM6_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM7_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM8_FREQUENCY    STM32_HCLK_FREQUENCY
 
 /* SDIO dividers.  Note that slower clocking is required when DMA is disabled
  * in order to avoid RX overrun/TX underrun errors due to delayed responses
diff --git a/configs/maple/nsh/Make.defs b/configs/maple/nsh/Make.defs
index 4516544f1a0dc01af6bf8fcfc9090e1bdc516195..38f114a8f42da8c44ecdda67fd161e93aad4e7dc 100644
--- a/configs/maple/nsh/Make.defs
+++ b/configs/maple/nsh/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/maple/nsh/defconfig b/configs/maple/nsh/defconfig
index 54ebb6d22ea3177a3b01c91cb44748df1f3da417..48b7865803673b9dfb6a7aeba95d20790c946df4 100644
--- a/configs/maple/nsh/defconfig
+++ b/configs/maple/nsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +199,7 @@ CONFIG_ARCH_CHIP_STM32F103CB=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -405,6 +406,12 @@ CONFIG_STM32_JTAG_DISABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -416,9 +423,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -517,12 +532,12 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
 CONFIG_MAPLE_MINI=y
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -533,9 +548,12 @@ CONFIG_MAPLE_MINI=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=10
@@ -628,6 +646,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=1024
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -643,6 +662,7 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
@@ -656,8 +676,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -665,6 +695,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -673,9 +704,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -721,6 +753,7 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -745,17 +778,23 @@ CONFIG_USBDEV_TRACE_NRECORDS=32
 # CONFIG_CDCACM is not set
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+CONFIG_HAVE_USBTRACE=y
+# CONFIG_USBMONITOR is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -793,12 +832,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -863,7 +896,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -871,8 +903,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -898,16 +932,15 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -916,34 +949,33 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -965,8 +997,8 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1031,7 +1063,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1053,6 +1084,7 @@ CONFIG_NSH_DISABLE_UNAME=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1094,12 +1126,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1107,7 +1139,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
-# CONFIG_SYSTEM_USBMONITOR is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/maple/nx/Make.defs b/configs/maple/nx/Make.defs
index 3d223e0c770049a6dab5b9970052cdb034d09d90..bdd3f1ad2b9b9087ddd57911caf143503df5fa58 100644
--- a/configs/maple/nx/Make.defs
+++ b/configs/maple/nx/Make.defs
@@ -78,7 +78,7 @@ else
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/maple/nx/defconfig b/configs/maple/nx/defconfig
index b60f26e071e25715c2f8e341aae5e0e7b198a06f..d8ad83a6d93f51c676feff3e9d8b000c38b114f5 100644
--- a/configs/maple/nx/defconfig
+++ b/configs/maple/nx/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +202,7 @@ CONFIG_ARCH_CHIP_STM32F103CB=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -346,6 +350,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 # CONFIG_STM32_HAVE_DAC1 is not set
@@ -413,6 +423,12 @@ CONFIG_STM32_JTAG_DISABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM2_PWM is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -425,9 +441,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -542,19 +566,17 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
 CONFIG_MAPLE_MINI=y
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -566,9 +588,12 @@ CONFIG_BOARDCTL_USBDEVCTRL=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=10
@@ -661,6 +686,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=1024
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -681,19 +707,25 @@ CONFIG_I2C=y
 # CONFIG_I2C_TRACE is not set
 # CONFIG_I2C_DRIVER is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
+CONFIG_SPI_HWFEATURES=y
+CONFIG_SPI_BITORDER=y
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
 # CONFIG_SPI_BITBANG is not set
-# CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_TIMERS_CS2100CP is not set
@@ -702,11 +734,20 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 # CONFIG_LCD_NOGETRUN is not set
@@ -721,6 +762,7 @@ CONFIG_LCD_MAXPOWER=1
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
 # CONFIG_LCD_UG9664HSWAG01 is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 # CONFIG_LCD_SSD1351 is not set
@@ -740,12 +782,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
-# CONFIG_LCD_BACKPACK is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -753,6 +790,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -761,9 +799,9 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -809,6 +847,7 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -853,16 +892,23 @@ CONFIG_CDCACM_VENDORSTR="NuttX"
 CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+CONFIG_HAVE_USBTRACE=y
+# CONFIG_USBMONITOR is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_NONE=y
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -900,12 +946,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1041,6 +1081,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 # CONFIG_LIBC_LONG_LONG is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=2
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1056,7 +1098,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -1064,8 +1105,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1089,18 +1132,19 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -1118,7 +1162,6 @@ CONFIG_EXAMPLES_NX_BPP=1
 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set
 CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 # CONFIG_EXAMPLES_NX_EXTERNINIT is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 CONFIG_EXAMPLES_NXHELLO=y
 CONFIG_EXAMPLES_NXHELLO_VPLANE=0
@@ -1137,30 +1180,30 @@ CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y
 # CONFIG_EXAMPLES_NXHELLO_EXTERNINIT is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1182,8 +1225,9 @@ CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1248,12 +1292,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1270,6 +1314,7 @@ CONFIG_NSH_DISABLE_UNAME=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1313,13 +1358,14 @@ CONFIG_USBDEV_MINOR=0
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_SYSTEM_I2CTOOL is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_I2CTOOL is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1327,8 +1373,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
-# CONFIG_SYSTEM_CDCACM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
-# CONFIG_SYSTEM_USBMONITOR is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/maple/src/stm32_lcd.c b/configs/maple/src/stm32_lcd.c
index 71108039f4f3b9785802f0cb04a4a88450cb8953..ccc02807f4d7ddb1b2ad0402cf9ba03a1ea228fb 100644
--- a/configs/maple/src/stm32_lcd.c
+++ b/configs/maple/src/stm32_lcd.c
@@ -67,28 +67,6 @@
 #define EXTCOMIN_FREQ    24
 #define TIMER_FREQ       1200    /* 72000000/60000 */
 
-/* Debug ********************************************************************/
-
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg(format, ...)  vdbg(format, ##__VA_ARGS__)
-#else
-#  define lcddbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
@@ -102,31 +80,31 @@ static xcpt_t g_isr;
  * Private Functions
  ****************************************************************************/
 
-static int up_lcdextcominisr(int irq, void *context)
+static int up_lcdextcominisr(int irq, void *context, void *arg)
 {
   STM32_TIM_ACKINT(tim, 0);
   if (g_isr == NULL)
     {
-      lcddbg("error, irq not attached, disabled\n");
+      lcderr("ERROR: error, irq not attached, disabled\n");
       STM32_TIM_DISABLEINT(tim, 0);
       return OK;
     }
 
-  return g_isr(irq, context);
+  return g_isr(irq, context, arg);
 }
 
-static int up_lcdirqattach(xcpt_t isr)
+static int up_lcdirqattach(xcpt_t isr, void * arg)
 {
-  lcddbg("%s IRQ\n", isr == NULL ? "Detach" : "Attach");
+  lcdinfo("%s IRQ\n", isr == NULL ? "Detach" : "Attach");
 
   if (isr != NULL)
     {
-      STM32_TIM_SETISR(tim, up_lcdextcominisr, 0);
+      STM32_TIM_SETISR(tim, up_lcdextcominisr, arg, 0);
       g_isr = isr;
     }
   else
     {
-      STM32_TIM_SETISR(tim, NULL, 0);
+      STM32_TIM_SETISR(tim, NULL, NULL, 0);
       g_isr = NULL;
     }
 
@@ -135,7 +113,7 @@ static int up_lcdirqattach(xcpt_t isr)
 
 static void up_lcddispcontrol(bool on)
 {
-  lcddbg("set: %s\n", on ? "on" : "off");
+  lcdinfo("set: %s\n", on ? "on" : "off");
 
   if (on)
     {
@@ -159,7 +137,7 @@ static void up_lcdsetpolarity(bool pol)
 
 static void up_lcdsetvcomfreq(unsigned int freq)
 {
-  lcddbg("freq: %d\n", freq);
+  lcdinfo("freq: %d\n", freq);
   DEBUGASSERT(freq >= 1 && freq <= 60);
   STM32_TIM_SETPERIOD(tim, TIMER_FREQ / freq);
 }
@@ -190,17 +168,17 @@ static FAR struct memlcd_priv_s memlcd_priv =
 
 FAR int board_lcd_initialize(void)
 {
-  lcddbg("Initializing lcd\n");
+  lcdinfo("Initializing lcd\n");
 
-  lcddbg("init spi1\n");
+  lcdinfo("init spi1\n");
   spi = stm32_spibus_initialize(1);
   DEBUGASSERT(spi);
 
-  lcddbg("configure related io\n");
+  lcdinfo("configure related io\n");
   stm32_configgpio(GPIO_MEMLCD_EXTCOMIN);
   stm32_configgpio(GPIO_MEMLCD_DISP);
 
-  lcddbg("configure EXTCOMIN timer\n");
+  lcdinfo("configure EXTCOMIN timer\n");
   if (tim == NULL)
     {
       tim = stm32_tim_init(2);
@@ -210,7 +188,7 @@ FAR int board_lcd_initialize(void)
       STM32_TIM_SETMODE(tim, STM32_TIM_MODE_UP);
     }
 
-  lcddbg("init lcd\n");
+  lcdinfo("init lcd\n");
   l_lcddev = memlcd_initialize(spi, &memlcd_priv, 0);
   DEBUGASSERT(l_lcddev);
 
diff --git a/configs/maple/src/stm32_leds.c b/configs/maple/src/stm32_leds.c
index c54d91e642bd0d41b0abd879029f78e332fc19a7..0423027fd0b252e76588be925a106dd22cb36d96 100644
--- a/configs/maple/src/stm32_leds.c
+++ b/configs/maple/src/stm32_leds.c
@@ -53,33 +53,13 @@
 #include "stm32.h"
 #include "maple.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
 
 static inline void set_led(bool v)
 {
-  ledvdbg("Turn LED %s\n", v? "on":"off");
+  ledinfo("Turn LED %s\n", v? "on":"off");
   stm32_gpiowrite(GPIO_LED, v);
 }
 
@@ -105,7 +85,7 @@ void board_autoled_initialize(void)
 
 void board_autoled_on(int led)
 {
-  ledvdbg("board_autoled_on(%d)\n", led);
+  ledinfo("board_autoled_on(%d)\n", led);
   switch (led)
     {
     case LED_STARTED:
@@ -134,7 +114,7 @@ void board_autoled_on(int led)
 
 void board_autoled_off(int led)
 {
-  ledvdbg("board_autoled_off(%d)\n", led);
+  ledinfo("board_autoled_off(%d)\n", led);
 
   switch (led)
     {
diff --git a/configs/maple/src/stm32_spi.c b/configs/maple/src/stm32_spi.c
index 22c106a1e4a70f40c2294fd9b3225b491db5177f..95040a67bf7148ceac200435e02a6e2c416fbac7 100644
--- a/configs/maple/src/stm32_spi.c
+++ b/configs/maple/src/stm32_spi.c
@@ -55,33 +55,6 @@
 
 #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2)
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_SPI
-#endif
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -134,7 +107,7 @@ void weak_function stm32_spidev_initialize(void)
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
                       bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
 #  if defined(CONFIG_LCD_SHARP_MEMLCD)
   if (devid == SPIDEV_DISPLAY)
diff --git a/configs/maple/src/stm32_usbdev.c b/configs/maple/src/stm32_usbdev.c
index 5c007477084331e50a2e9130ac3a0283d5208260..104624d6450f1b86a82b9c9789902170ba21d794 100644
--- a/configs/maple/src/stm32_usbdev.c
+++ b/configs/maple/src/stm32_usbdev.c
@@ -74,7 +74,7 @@
 
 void stm32_usbinitialize(void)
 {
-  ulldbg("called\n");
+  uinfo("called\n");
 
   /* USB Soft Connect Pullup */
 
@@ -113,5 +113,5 @@ int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable)
 
 void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
diff --git a/configs/maple/usbnsh/Make.defs b/configs/maple/usbnsh/Make.defs
index 8820947ef8f3f037a12cccad2b637aef02e0eb92..a52241bf0c36b270c0358f6a4a7662413bbcbb13 100644
--- a/configs/maple/usbnsh/Make.defs
+++ b/configs/maple/usbnsh/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/maple/usbnsh/defconfig b/configs/maple/usbnsh/defconfig
index fe4466fd04549127f2501f3a8e594e4ef32c2683..2de69df05498b97c1523efcf3e1ef1609255ad24 100644
--- a/configs/maple/usbnsh/defconfig
+++ b/configs/maple/usbnsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +199,7 @@ CONFIG_ARCH_CHIP_STM32F103CB=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -405,6 +406,12 @@ CONFIG_STM32_JTAG_DISABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -416,9 +423,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -517,19 +532,17 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
 CONFIG_MAPLE_MINI=y
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -541,9 +554,12 @@ CONFIG_BOARDCTL_USBDEVCTRL=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=10
@@ -636,6 +652,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=1024
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -656,6 +673,7 @@ CONFIG_I2C=y
 # CONFIG_I2C_TRACE is not set
 # CONFIG_I2C_DRIVER is not set
 # CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
@@ -670,8 +688,18 @@ CONFIG_I2C=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -679,6 +707,7 @@ CONFIG_I2C=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -687,9 +716,9 @@ CONFIG_I2C=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -735,6 +764,7 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -779,16 +809,22 @@ CONFIG_CDCACM_VENDORSTR="NuttX"
 CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+CONFIG_HAVE_USBTRACE=y
+# CONFIG_USBMONITOR is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_NONE=y
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -826,12 +862,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -896,7 +926,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -904,8 +933,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -931,16 +962,15 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -949,35 +979,34 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -999,8 +1028,8 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1065,7 +1094,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1087,6 +1115,7 @@ CONFIG_NSH_DISABLE_UNAME=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1130,13 +1159,14 @@ CONFIG_USBDEV_MINOR=0
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_SYSTEM_I2CTOOL is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_I2CTOOL is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1144,8 +1174,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
-# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
-# CONFIG_SYSTEM_USBMONITOR is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/mbed/README.txt b/configs/mbed/README.txt
index 8385d563f5d21e8a8a044b898e1aaef7eab5444e..734ff3883dbe0dd79cb76e9eb32927ffee1c18d5 100644
--- a/configs/mbed/README.txt
+++ b/configs/mbed/README.txt
@@ -349,9 +349,9 @@ mbed Configuration Options
     CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18
     CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented).
     CONFIG_NET_REGDEBUG - Enabled low level register debug.  Also needs
-      CONFIG_DEBUG.
+      CONFIG_DEBUG_FEATURES.
     CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets.
-      Also needs CONFIG_DEBUG.
+      Also needs CONFIG_DEBUG_FEATURES.
     CONFIG_NET_HASH - Enable receipt of near-perfect match frames.
     CONFIG_LPC17_MULTICAST - Enable receipt of multicast (and unicast) frames.
       Automatically set if CONFIG_NET_IGMP is selected.
diff --git a/configs/mbed/hidkbd/Make.defs b/configs/mbed/hidkbd/Make.defs
index fc07f4425f0ca7e4fdc6a80ebee42f3445d55960..564ab05bd6efb962c774ab78c77b453eb0100df8 100644
--- a/configs/mbed/hidkbd/Make.defs
+++ b/configs/mbed/hidkbd/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/mbed/hidkbd/defconfig b/configs/mbed/hidkbd/defconfig
index ef889a041181c912a2415f62410a54aff99f191e..a59b1e6569b3016f98e246303a38f5de2e3eccdf 100644
--- a/configs/mbed/hidkbd/defconfig
+++ b/configs/mbed/hidkbd/defconfig
@@ -7,6 +7,7 @@
 # Build Setup
 #
 # CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
 CONFIG_HOST_LINUX=y
 # CONFIG_HOST_OSX is not set
 # CONFIG_HOST_WINDOWS is not set
@@ -16,6 +17,7 @@ CONFIG_HOST_LINUX=y
 # Build Configuration
 #
 # CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
 # CONFIG_BUILD_2PASS is not set
 
 #
@@ -25,20 +27,25 @@ CONFIG_HOST_LINUX=y
 # CONFIG_INTELHEX_BINARY is not set
 # CONFIG_MOTOROLA_SREC is not set
 CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
 
 #
 # Customize Header Files
 #
+# CONFIG_ARCH_STDINT_H is not set
 # CONFIG_ARCH_STDBOOL_H is not set
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
@@ -53,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -66,12 +72,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -80,35 +89,62 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
 CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
-CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
 # ARMV7M Configuration Options
 #
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
 # CONFIG_ARMV7M_OABI_TOOLCHAIN is not set
-# CONFIG_GPIO_IRQ is not set
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_LPC17_GPIOIRQ is not set
+# CONFIG_SERIAL_TERMIOS is not set
 
 #
 # LPC17xx Configuration Options
@@ -165,6 +201,7 @@ CONFIG_LPC17_UART0=y
 # CONFIG_LPC17_TMR3 is not set
 # CONFIG_LPC17_RIT is not set
 # CONFIG_LPC17_PWM0 is not set
+# CONFIG_LPC17_PWM1 is not set
 # CONFIG_LPC17_MCPWM is not set
 # CONFIG_LPC17_QEI is not set
 # CONFIG_LPC17_RTC is not set
@@ -181,7 +218,6 @@ CONFIG_LPC17_UART0=y
 #
 # Serial driver options
 #
-# CONFIG_SERIAL_TERMIOS is not set
 
 #
 # USB host driver options
@@ -192,6 +228,7 @@ CONFIG_USBHOST_NTDS=3
 CONFIG_USBHOST_TDBUFFERS=3
 CONFIG_USBHOST_TDBUFSIZE=128
 CONFIG_USBHOST_IOBUFSIZE=512
+CONFIG_LPC17_USBHOST_NPREALLOC=4
 CONFIG_USBHOST_BULK_DISABLE=y
 # CONFIG_USBHOST_INT_DISABLE is not set
 CONFIG_USBHOST_ISOC_DISABLE=y
@@ -203,13 +240,23 @@ CONFIG_USBHOST_ISOC_DISABLE=y
 # CONFIG_ARCH_VECNOTIRQ is not set
 # CONFIG_ARCH_DMA is not set
 CONFIG_ARCH_HAVE_IRQPRIO=y
-# CONFIG_ARCH_ADDRENV is not set
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
 # CONFIG_ARCH_HAVE_RAMFUNCS is not set
 CONFIG_ARCH_HAVE_RAMVECTORS=y
 # CONFIG_ARCH_RAMVECTORS is not set
@@ -249,6 +296,7 @@ CONFIG_RAM_SIZE=32768
 #
 # CONFIG_ARCH_BOARD_LPCXPRESSO is not set
 CONFIG_ARCH_BOARD_MBED=y
+# CONFIG_ARCH_BOARD_U_BLOX_C027 is not set
 # CONFIG_ARCH_BOARD_ZKITARM is not set
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="mbed"
@@ -262,38 +310,79 @@ CONFIG_ARCH_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_LIB_BOARDCTL is not set
 
 #
 # RTOS Features
 #
-# CONFIG_BOARD_INITIALIZE is not set
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
-CONFIG_RR_INTERVAL=200
-# CONFIG_SCHED_INSTRUMENTATION is not set
-CONFIG_TASK_NAME_SIZE=0
-# CONFIG_SCHED_HAVE_PARENT is not set
+# CONFIG_CLOCK_MONOTONIC is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2010
 CONFIG_START_MONTH=11
 CONFIG_START_DAY=10
-CONFIG_DEV_CONSOLE=y
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=8
+CONFIG_WDOG_INTRESERVE=1
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="hidkbd_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+# CONFIG_SCHED_WAITPID is not set
+
+#
+# Pthread Options
+#
 # CONFIG_MUTEX_TYPES is not set
-# CONFIG_PRIORITY_INHERITANCE is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
 # CONFIG_FDCLONE_DISABLE is not set
 # CONFIG_FDCLONE_STDIO is not set
 CONFIG_SDCLONE_DISABLE=y
-# CONFIG_SCHED_WAITPID is not set
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
-CONFIG_USER_ENTRYPOINT="hidkbd_main"
-CONFIG_DISABLE_OS_API=y
-# CONFIG_DISABLE_POSIX_TIMERS is not set
-# CONFIG_DISABLE_PTHREAD is not set
-# CONFIG_DISABLE_SIGNALS is not set
-# CONFIG_DISABLE_MQUEUE is not set
-# CONFIG_DISABLE_ENVIRON is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -305,19 +394,21 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 CONFIG_SIG_SIGWORK=17
 
 #
-# Sizes of configurable things (0 disables)
+# POSIX Message Queue Options
 #
-CONFIG_MAX_TASKS=16
-CONFIG_NPTHREAD_KEYS=4
-CONFIG_NFILE_DESCRIPTORS=8
-CONFIG_NFILE_STREAMS=8
-CONFIG_NAME_MAX=32
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
-CONFIG_MAX_WDOGPARMS=2
-CONFIG_PREALLOC_WDOGS=8
-CONFIG_WDOG_INTRESERVE=1
-CONFIG_PREALLOC_TIMERS=4
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=1024
+# CONFIG_SCHED_LPWORK is not set
 
 #
 # Stack and heap information
@@ -326,6 +417,7 @@ CONFIG_IDLETHREAD_STACKSIZE=1024
 CONFIG_USERMAIN_STACKSIZE=2048
 CONFIG_PTHREAD_STACK_MIN=256
 CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
 
 #
 # Device Drivers
@@ -334,14 +426,26 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
 # CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -349,26 +453,65 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
-
-#
-# USART Configuration
-#
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART0_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
 
 #
@@ -382,11 +525,13 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 # CONFIG_USBDEV is not set
 CONFIG_USBHOST=y
 CONFIG_USBHOST_NPREALLOC=0
+CONFIG_USBHOST_HAVE_ASYNCH=y
+# CONFIG_USBHOST_ASYNCH is not set
+# CONFIG_USBHOST_HUB is not set
 # CONFIG_USBHOST_MSC is not set
 CONFIG_USBHOST_HIDKBD=y
 CONFIG_HIDKBD_POLLUSEC=100000
@@ -401,14 +546,18 @@ CONFIG_HIDKBD_NPOLLWAITERS=2
 # CONFIG_USBHOST_TRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -417,6 +566,11 @@ CONFIG_HIDKBD_NPOLLWAITERS=2
 # CONFIG_ARCH_HAVE_PHY is not set
 # CONFIG_NET is not set
 
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
 #
 # File Systems
 #
@@ -425,20 +579,20 @@ CONFIG_HIDKBD_NPOLLWAITERS=2
 # File system configuration
 #
 # CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
 # CONFIG_FS_READABLE is not set
 # CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -459,7 +613,11 @@ CONFIG_MM_REGIONS=2
 # CONFIG_AUDIO is not set
 
 #
-# Binary Formats
+# Wireless Support
+#
+
+#
+# Binary Loader
 #
 # CONFIG_BINFMT_DISABLE is not set
 # CONFIG_BINFMT_EXEPATH is not set
@@ -484,6 +642,7 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -495,19 +654,18 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
 CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
-CONFIG_SCHED_WORKQUEUE=y
-CONFIG_SCHED_HPWORK=y
-CONFIG_SCHED_HPWORKPRIORITY=192
-CONFIG_SCHED_HPWORKPERIOD=50000
-CONFIG_SCHED_HPWORKSTACKSIZE=1024
-# CONFIG_SCHED_LPWORK is not set
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -522,29 +680,28 @@ CONFIG_SCHED_HPWORKSTACKSIZE=1024
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 CONFIG_EXAMPLES_HIDKBD=y
 CONFIG_EXAMPLES_HIDKBD_DEFPRIO=50
 CONFIG_EXAMPLES_HIDKBD_STACKSIZE=1024
 CONFIG_EXAMPLES_HIDKBD_DEVNAME="/dev/kbda"
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
-# CONFIG_EXAMPLES_LCDRW is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -552,69 +709,71 @@ CONFIG_EXAMPLES_HIDKBD_DEVNAME="/dev/kbda"
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PASHELLO is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
 #
 # CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
 
 #
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
 # CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
@@ -633,93 +792,16 @@ CONFIG_EXAMPLES_HIDKBD_DEVNAME="/dev/kbda"
 #
 # System Libraries and NSH Add-Ons
 #
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# Custom Free Memory Command
-#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
 # CONFIG_SYSTEM_FREE is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# FLASH Program Installation
-#
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sysinfo
-#
-
-#
-# USB Monitor
-#
-
-#
-# EMACS-like Command Line Editor
-#
-# CONFIG_SYSTEM_CLE is not set
-
-#
-# VI Work-Alike Editor
-#
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# Zmodem Commands
-#
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/mbed/nsh/Make.defs b/configs/mbed/nsh/Make.defs
index 24a6a0563699701f4634e09624f02bda69cd54d2..e51bd0cc197863237ceeb66ee7a6020f78def717 100644
--- a/configs/mbed/nsh/Make.defs
+++ b/configs/mbed/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/mbed/nsh/defconfig b/configs/mbed/nsh/defconfig
index dcfda7b8c9beea3c43fb92408024c4d39a4965f2..1815ca2d98debe7ed7780ce1726c50cdb84d87ec 100644
--- a/configs/mbed/nsh/defconfig
+++ b/configs/mbed/nsh/defconfig
@@ -12,10 +12,6 @@ CONFIG_HOST_LINUX=y
 # CONFIG_HOST_OSX is not set
 # CONFIG_HOST_WINDOWS is not set
 # CONFIG_HOST_OTHER is not set
-# CONFIG_WINDOWS_NATIVE is not set
-# CONFIG_WINDOWS_CYGWIN is not set
-# CONFIG_WINDOWS_MSYS is not set
-# CONFIG_WINDOWS_OTHER is not set
 
 #
 # Build Configuration
@@ -41,12 +37,15 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
@@ -61,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -74,14 +72,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
 # CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -90,41 +89,62 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
 CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
 # ARMV7M Configuration Options
 #
-# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
-# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
-# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set
-# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
-# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set
-# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set
 # CONFIG_ARMV7M_OABI_TOOLCHAIN is not set
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
+# CONFIG_LPC17_GPIOIRQ is not set
+# CONFIG_SERIAL_TERMIOS is not set
 
 #
 # LPC17xx Configuration Options
@@ -210,11 +230,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -259,6 +282,7 @@ CONFIG_RAM_SIZE=32768
 #
 # CONFIG_ARCH_BOARD_LPCXPRESSO is not set
 CONFIG_ARCH_BOARD_MBED=y
+# CONFIG_ARCH_BOARD_U_BLOX_C027 is not set
 # CONFIG_ARCH_BOARD_ZKITARM is not set
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="mbed"
@@ -275,6 +299,12 @@ CONFIG_NSH_MMCSDSPIPORTNO=0
 #
 # Board-Specific Options
 #
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
 
 #
 # RTOS Features
@@ -309,6 +339,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -359,9 +390,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -392,23 +424,48 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
 # CONFIG_SPI_EXCHANGE is not set
 # CONFIG_SPI_CMDDATA is not set
+CONFIG_SPI_CALLBACK=y
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
-# CONFIG_TIMER is not set
 # CONFIG_ANALOG is not set
 # CONFIG_AUDIO_DEVICES is not set
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -419,6 +476,8 @@ CONFIG_MMCSD_SPI=y
 CONFIG_MMCSD_SPICLOCK=12500000
 CONFIG_MMCSD_SPIMODE=0
 # CONFIG_ARCH_HAVE_SDIO is not set
+# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 CONFIG_MTD=y
 
 #
@@ -427,6 +486,7 @@ CONFIG_MTD=y
 # CONFIG_MTD_PARTITION is not set
 # CONFIG_MTD_SECT512 is not set
 # CONFIG_MTD_BYTE_WRITE is not set
+# CONFIG_MTD_PROGMEM is not set
 # CONFIG_MTD_CONFIG is not set
 
 #
@@ -434,14 +494,19 @@ CONFIG_MTD=y
 #
 # CONFIG_MTD_NAND is not set
 # CONFIG_RAMMTD is not set
+# CONFIG_FILEMTD is not set
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -449,9 +514,10 @@ CONFIG_MTD=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -475,16 +541,12 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
-# CONFIG_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
@@ -500,18 +562,23 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -544,17 +611,15 @@ CONFIG_FS_FAT=y
 # CONFIG_FAT_LCNAMES is not set
 # CONFIG_FAT_LFN is not set
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -574,6 +639,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -615,13 +684,18 @@ CONFIG_LIBC_TMPDIR="/tmp"
 CONFIG_LIBC_MAX_TMPFILE=32
 CONFIG_ARCH_LOWPUTC=y
 # CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -636,26 +710,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -663,36 +737,46 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -703,37 +787,30 @@ CONFIG_EXAMPLES_NSH=y
 #
 # Interpreters
 #
-# CONFIG_INTERPRETERS_FICL is not set
 # CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
 # CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -752,13 +829,16 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
 # CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -767,8 +847,10 @@ CONFIG_NSH_NESTDEPTH=3
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -777,6 +859,7 @@ CONFIG_NSH_NESTDEPTH=3
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -786,8 +869,10 @@ CONFIG_NSH_NESTDEPTH=3
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
@@ -814,7 +899,8 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
-CONFIG_LIB_BOARDCTL=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -828,116 +914,19 @@ CONFIG_LIB_BOARDCTL=y
 #
 # System Libraries and NSH Add-Ons
 #
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# EMACS-like Command Line Editor
-#
 # CONFIG_SYSTEM_CLE is not set
-
-#
-# CU Minimal Terminal
-#
 # CONFIG_SYSTEM_CUTERM is not set
-
-#
-# FLASH Program Installation
-#
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# Intel HEX to binary conversion
-#
-# CONFIG_SYSTEM_HEX2BIN is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# NxPlayer media player library / command Line
-#
-
-#
-# RAM test
-#
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-
-#
-# P-Code Support
-#
-
-#
-# PHY Tool
-#
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sudoku
-#
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-
-#
-# Sysinfo
-#
-
-#
-# VI Work-Alike Editor
-#
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# USB Monitor
-#
-
-#
-# Zmodem Commands
-#
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/mbed/src/Makefile b/configs/mbed/src/Makefile
index 1bd5a3e33cd09ab5692d2b149849a6a053b0f387..6a93bdb0918ec2e7fa4d9f0d5b29b049a27bd676 100644
--- a/configs/mbed/src/Makefile
+++ b/configs/mbed/src/Makefile
@@ -36,15 +36,24 @@
 -include $(TOPDIR)/Make.defs
 
 ASRCS =
-CSRCS = lpc17_boot.c lpc17_leds.c lpc17_adc.c lpc17_dac.c lpc17_pwm.c
+CSRCS = lpc17_boot.c lpc17_leds.c lpc17_dac.c
 
 ifeq ($(CONFIG_LIB_BOARDCTL),y)
 CSRCS += lpc17_appinit.c
 endif
+
 ifeq ($(CONFIG_USBMSC),y)
 CSRCS += lpc17_usbmsc.c
 endif
 
+ifeq ($(CONFIG_PWM),y)
+CSRCS += lpc17_pwm.c
+endif
+
+ifeq ($(CONFIG_ADC),y)
+CSRCS += lpc17_adc.c
+endif
+
 ifeq ($(CONFIG_EXAMPLES_HIDKBD),y)
 CSRCS += lpc17_hidkbd.c
 endif
diff --git a/configs/mbed/src/lpc17_adc.c b/configs/mbed/src/lpc17_adc.c
index aea44427e07237d60e8cb58200b82efbf4f88a92..059e63de000d93423bcc11f0812fda83b48c62ba 100644
--- a/configs/mbed/src/lpc17_adc.c
+++ b/configs/mbed/src/lpc17_adc.c
@@ -8,7 +8,7 @@
  *
  * Based on configs/lpc1720g-eval/src/lpc17_adc.c
  *
- *   Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -61,32 +61,19 @@
 
 #ifdef CONFIG_ADC
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/************************************************************************************
- * Private Data
- ************************************************************************************/
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_adc_setup
+ * Name: mbed_adc_setup
  *
  * Description:
- *   All LPC17 architectures must provide the following interface to work with
- *   examples/adc.
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
-int board_adc_setup(void)
+int mbed_adc_setup(void)
 {
   static bool initialized = false;
   struct adc_dev_s *adc;
@@ -101,7 +88,7 @@ int board_adc_setup(void)
       adc = lpc17_adcinitialize();
       if (adc == NULL)
         {
-          adbg("ERROR: Failed to get ADC interface\n");
+          aerr("ERROR: Failed to get ADC interface\n");
           return -ENODEV;
         }
 
@@ -110,7 +97,7 @@ int board_adc_setup(void)
       ret = adc_register("/dev/adc0", adc);
       if (ret < 0)
         {
-          adbg("adc_register failed: %d\n", ret);
+          aerr("ERROR: adc_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/mbed/src/lpc17_appinit.c b/configs/mbed/src/lpc17_appinit.c
index f70e811f3bb68d94d2e7f92ef136cd1e2730c6d0..f371ab764b2da0807dc4b27a75e3e8b6c211547b 100644
--- a/configs/mbed/src/lpc17_appinit.c
+++ b/configs/mbed/src/lpc17_appinit.c
@@ -47,6 +47,8 @@
 #include 
 #include 
 
+#include "mbed.h"
+
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
@@ -97,5 +99,28 @@
 
 int board_app_initialize(uintptr_t arg)
 {
+  int ret;
+
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device. */
+
+  ret = mbed_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: mbed_pwm_setup() failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_ADC
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = mbed_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: mbed_adc_setup failed: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
   return OK;
 }
diff --git a/configs/mbed/src/lpc17_dac.c b/configs/mbed/src/lpc17_dac.c
index 6f18a1411d8b74e6b4f5f9b395600ca7be693509..dccdbb92f5a33cda2f8fc59c3b1299dd1c5ca397 100644
--- a/configs/mbed/src/lpc17_dac.c
+++ b/configs/mbed/src/lpc17_dac.c
@@ -81,14 +81,14 @@ int dac_devinit(void)
     dac = lpc17_dacinitialize();
     if (dac == NULL)
       {
-        adbg("ERROR: Failed to get dac interface\n");
+        aerr("ERROR: Failed to get dac interface\n");
         return -ENODEV;
       }
 
     ret = dac_register("/dev/dac0", dac);
     if (ret < 0)
       {
-        adbg("dac_register failed: %d\n", ret);
+        aerr("ERROR: dac_register failed: %d\n", ret);
         return ret;
       }
 
diff --git a/configs/mbed/src/lpc17_hidkbd.c b/configs/mbed/src/lpc17_hidkbd.c
index 38fbca903346e4b14dbe2aa9a88e0d24d577bfce..fc17d82de7c8d8cdb203dbf7930276779c25de48 100644
--- a/configs/mbed/src/lpc17_hidkbd.c
+++ b/configs/mbed/src/lpc17_hidkbd.c
@@ -76,7 +76,7 @@ struct usbhost_connection_s *arch_usbhost_initialize(void)
   ret = usbhost_hub_initialize();
   if (ret < 0)
     {
-      udbg("ERROR: usbhost_hub_initialize failed: %d\n", ret);
+      uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
     }
 #endif
 
diff --git a/configs/mbed/src/lpc17_leds.c b/configs/mbed/src/lpc17_leds.c
index 4a0c4116c6a54d2895fbc64563caa6a3d85deceb..f1f9978d40c29529cc191956e668a7c2368d4751 100644
--- a/configs/mbed/src/lpc17_leds.c
+++ b/configs/mbed/src/lpc17_leds.c
@@ -60,25 +60,9 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS)
+#ifdef CONFIG_DEBUG_LEDS_INFO
 #  define led_dumpgpio(m) lpc17_dumpgpio(MBED_LED3, m)
 #else
 #  define led_dumpgpio(m)
diff --git a/configs/mbed/src/lpc17_pwm.c b/configs/mbed/src/lpc17_pwm.c
index d3021d7063f1c8f417c5f7979acd72744934c363..6ed91a0c20d6c844bd2951293964994a9357a31e 100644
--- a/configs/mbed/src/lpc17_pwm.c
+++ b/configs/mbed/src/lpc17_pwm.c
@@ -3,7 +3,7 @@
  *
  * Based on onfigs/lpcexpresso-lpc1768/lpc17_pwm.c
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -46,7 +46,7 @@
 #include 
 
 #include 
-#include 
+#include 
 
 #include 
 
@@ -66,24 +66,19 @@ FAR struct pwm_lowerhalf_s *lpc17_pwminitialize(int timer);
 FAR struct pwm_lowerhalf_s *lpc17_mcpwminitialize(int timer);
 FAR struct pwm_lowerhalf_s *lpc17_timerinitialize(int timer);
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_pwm_setup
+ * Name: mbed_pwm_setup
  *
  * Description:
- *   All LPC17 architectures must provide the following interface to work with
- *   examples/pwm.
+ *   Initialize PWM and register the PWM device.
  *
  ************************************************************************************/
 
-int board_pwm_setup(void)
+int mbed_pwm_setup(void)
 {
   static bool initialized = false;
   struct pwm_lowerhalf_s *pwm;
@@ -100,7 +95,7 @@ int board_pwm_setup(void)
       pwm = lpc17_pwminitialize(0);
       if (!pwm)
         {
-          adbg("Failed to get the LPC17XX PWM lower half\n");
+          aerr("ERROR: Failed to get the LPC17XX PWM lower half\n");
           return -ENODEV;
         }
 
@@ -109,14 +104,14 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/pwm0", pwm);
       if (ret < 0)
         {
-          adbg("pwm_register failed: %d\n", ret);
+          aerr("ERROR: pwm_register failed: %d\n", ret);
           return ret;
         }
 
       mcpwm = lpc17_mcpwminitialize(0);
       if (!mcpwm)
         {
-          adbg("Failed to get the LPC17XX MOTOR PWM lower half\n");
+          aerr("ERROR: Failed to get the LPC17XX MOTOR PWM lower half\n");
           return -ENODEV;
         }
 
@@ -125,14 +120,14 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/mcpwm0", mcpwm);
       if (ret < 0)
         {
-          adbg("mcpwm_register failed: %d\n", ret);
+          aerr("ERROR: mcpwm_register failed: %d\n", ret);
           return ret;
         }
 
       timer = lpc17_timerinitialize(0);
       if (!timer)
         {
-          adbg("Failed to get the LPC17XX TIMER lower half\n");
+          aerr("ERROR: Failed to get the LPC17XX TIMER lower half\n");
           return -ENODEV;
         }
 
@@ -141,7 +136,7 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/timer0", timer);
       if (ret < 0)
         {
-          adbg("timer_register failed: %d\n", ret);
+          aerr("ERROR: timer_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/mbed/src/mbed.h b/configs/mbed/src/mbed.h
index 938372b7801f31176bff8d99e049043746d8af1b..5978e5d17c297189c57294f7a84f2327af6a8532 100644
--- a/configs/mbed/src/mbed.h
+++ b/configs/mbed/src/mbed.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/mbed/src/mbed.h
  *
- *   Copyright (C) 2010 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -88,6 +88,30 @@
 
 void weak_function mbed_sspdev_initialize(void);
 
+/************************************************************************************
+ * Name: mbed_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PWM
+int mbed_pwm_setup(void);
+#endif
+
+/************************************************************************************
+ * Name: mbed_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ADC
+int mbed_adc_setup(void);
+#endif
+
 #endif /* __ASSEMBLY__ */
 #endif /* _CONFIGS_MBED_SRC_MBED_H */
 
diff --git a/configs/mcu123-lpc214x/composite/Make.defs b/configs/mcu123-lpc214x/composite/Make.defs
index a1d22707cc34151a1261a48884d6f2abd132a178..2d895b3b04e5e3533c9615e735649b0778f36f4a 100644
--- a/configs/mcu123-lpc214x/composite/Make.defs
+++ b/configs/mcu123-lpc214x/composite/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(HOSTOS),Cygwin)
 endif
 endif
 
-ifeq ("${CONFIG_DEBUG}","y")
+ifeq ("${CONFIG_DEBUG_FEATURES}","y")
   ARCHOPTIMIZATION = -g
 endif
 
@@ -86,7 +86,7 @@ else
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
@@ -115,7 +115,7 @@ EXEEXT =
 ifneq ($(CROSSDEV),arm-nuttx-elf-)
   LDFLAGS += -nostartfiles -nodefaultlibs
 endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
   LDFLAGS += -g
 endif
 
diff --git a/configs/mcu123-lpc214x/composite/defconfig b/configs/mcu123-lpc214x/composite/defconfig
index 73d1c5912dc5c2952a7cc30d77b5bd4102605f98..3295b20976d302df63370054d3d8737daff20f31 100644
--- a/configs/mcu123-lpc214x/composite/defconfig
+++ b/configs/mcu123-lpc214x/composite/defconfig
@@ -37,14 +37,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -71,10 +72,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -92,7 +93,11 @@ CONFIG_ARCH_CHIP_LPC214X=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -102,10 +107,21 @@ CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="lpc214x"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 # CONFIG_ARCH_LOWVECTORS is not set
 
@@ -167,11 +183,14 @@ CONFIG_LPC214X_USBDEV=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ARCH_USBDUMP is not set
 # CONFIG_ENDIAN_BIG is not set
@@ -226,7 +245,11 @@ CONFIG_ARCH_LEDS=y
 # Board-Specific Options
 #
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
 
 #
 # RTOS Features
@@ -261,6 +284,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="conn_main"
 CONFIG_RR_INTERVAL=0
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -311,9 +335,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -344,14 +369,20 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
 # CONFIG_SPI_EXCHANGE is not set
 # CONFIG_SPI_CMDDATA is not set
 CONFIG_SPI_CALLBACK=y
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_I2S is not set
 
 #
@@ -365,7 +396,21 @@ CONFIG_SPI_CALLBACK=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -377,16 +422,17 @@ CONFIG_MMCSD_SPICLOCK=20000000
 CONFIG_MMCSD_SPIMODE=0
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -410,14 +456,11 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_UART1_SERIAL_CONSOLE is not set
@@ -435,6 +478,7 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 
 #
 # UART1 Configuration
@@ -447,6 +491,7 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
 CONFIG_USBDEV=y
 
 #
@@ -461,7 +506,7 @@ CONFIG_USBDEV_MAXPOWER=100
 # CONFIG_ARCH_USBDEV_STALLQUEUE is not set
 CONFIG_USBDEV_TRACE=y
 CONFIG_USBDEV_TRACE_NRECORDS=128
-# CONFIG_USBDEV_TRACE_STRINGS is not set
+# CONFIG_USBDEV_TRACE_INITIALIDSET is not set
 
 #
 # USB Device Class Driver Options
@@ -492,8 +537,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
 CONFIG_CDCACM_EPBULKIN=2
 CONFIG_CDCACM_EPBULKIN_FSSIZE=64
 CONFIG_CDCACM_EPBULKIN_HSSIZE=512
-CONFIG_CDCACM_NWRREQS=4
 CONFIG_CDCACM_NRDREQS=4
+CONFIG_CDCACM_NWRREQS=4
 CONFIG_CDCACM_BULKIN_REQLEN=96
 CONFIG_CDCACM_RXBUFSIZE=256
 CONFIG_CDCACM_TXBUFSIZE=256
@@ -523,15 +568,18 @@ CONFIG_USBMSC_SCSI_STACKSIZE=2048
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -563,16 +611,11 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -591,6 +634,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -635,11 +682,15 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -654,26 +705,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -681,33 +732,45 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -720,26 +783,23 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -757,18 +817,8 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
-# CONFIG_SYSTEM_CLE is not set
-# CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
-# CONFIG_SYSTEM_RAMTEST is not set
-# CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
-# CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_CDCACM is not set
+# CONFIG_SYSTEM_CLE is not set
 CONFIG_SYSTEM_COMPOSITE=y
 CONFIG_SYSTEM_COMPOSITE_NLUNS=1
 CONFIG_SYSTEM_COMPOSITE_DEVMINOR1=0
@@ -786,6 +836,17 @@ CONFIG_SYSTEM_COMPOSITE_BUFSIZE=256
 # CONFIG_SYSTEM_COMPOSITE_TRACECONTROLLER is not set
 # CONFIG_SYSTEM_COMPOSITE_TRACEINTERRUPTS is not set
 # CONFIG_SYSTEM_COMPOSITE_DEBUGMM is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
+# CONFIG_SYSTEM_READLINE is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_USBMONITOR is not set
 # CONFIG_SYSTEM_USBMSC is not set
-# CONFIG_SYSTEM_USBMONITOR is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/mcu123-lpc214x/nsh/Make.defs b/configs/mcu123-lpc214x/nsh/Make.defs
index 35984af465b8035330edbe62b23a3b447d3330c5..0ff9eb008702be0fcf59439e71c2d1d8286d27cf 100644
--- a/configs/mcu123-lpc214x/nsh/Make.defs
+++ b/configs/mcu123-lpc214x/nsh/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(HOSTOS),Cygwin)
 endif
 endif
 
-ifeq ("${CONFIG_DEBUG}","y")
+ifeq ("${CONFIG_DEBUG_FEATURES}","y")
   ARCHOPTIMIZATION = -g
 endif
 
@@ -86,7 +86,7 @@ else
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
@@ -115,7 +115,7 @@ EXEEXT =
 ifneq ($(CROSSDEV),arm-nuttx-elf-)
   LDFLAGS += -nostartfiles -nodefaultlibs
 endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
   LDFLAGS += -g
 endif
 
diff --git a/configs/mcu123-lpc214x/nsh/defconfig b/configs/mcu123-lpc214x/nsh/defconfig
index 4d7bbb44e84dac930c0943155cc418de59ed91a6..64829ffe2c42206aa5a64d1a76350d89d0e7829f 100644
--- a/configs/mcu123-lpc214x/nsh/defconfig
+++ b/configs/mcu123-lpc214x/nsh/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -71,10 +72,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -92,7 +93,11 @@ CONFIG_ARCH_CHIP_LPC214X=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -102,10 +107,21 @@ CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="lpc214x"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 # CONFIG_ARCH_LOWVECTORS is not set
 
@@ -159,11 +175,14 @@ CONFIG_LPC214X_UART1=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
 # CONFIG_ARCH_IDLE_CUSTOM is not set
@@ -220,9 +239,8 @@ CONFIG_NSH_MMCSDSPIPORTNO=1
 # Board-Specific Options
 #
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -259,6 +277,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=0
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -309,9 +328,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -342,14 +362,20 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
 # CONFIG_SPI_EXCHANGE is not set
 # CONFIG_SPI_CMDDATA is not set
 CONFIG_SPI_CALLBACK=y
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_I2S is not set
 
 #
@@ -363,7 +389,21 @@ CONFIG_SPI_CALLBACK=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -375,15 +415,17 @@ CONFIG_MMCSD_SPICLOCK=20000000
 CONFIG_MMCSD_SPIMODE=0
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -407,14 +449,11 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_UART1_SERIAL_CONSOLE is not set
@@ -432,6 +471,7 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 
 #
 # UART1 Configuration
@@ -444,19 +484,23 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -490,19 +534,16 @@ CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -521,6 +562,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -565,11 +610,15 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -584,26 +633,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -611,33 +660,45 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -650,30 +711,28 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -692,6 +751,7 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
@@ -700,6 +760,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -708,8 +769,10 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -728,8 +791,10 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
@@ -756,6 +821,8 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -769,16 +836,19 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-# CONFIG_SYSTEM_POWEROFF is not set
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/mcu123-lpc214x/src/lpc2148_spi1.c b/configs/mcu123-lpc214x/src/lpc2148_spi1.c
index 4990a6418515c1a2a0dcc7576fd21cfc48e14731..72f4b12ccba4a03b5e30bc4f111ce362c8821abf 100644
--- a/configs/mcu123-lpc214x/src/lpc2148_spi1.c
+++ b/configs/mcu123-lpc214x/src/lpc2148_spi1.c
@@ -86,20 +86,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* Enables debug output from this file */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /* Clocking */
 
 #define LPC214X_CCLKFREQ  (LPC214X_FOSC*LPC214X_PLL_M)
@@ -232,14 +218,14 @@ static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
     {
       /* Enable slave select (low enables) */
 
-      spidbg("CS asserted\n");
+      spiinfo("CS asserted\n");
       putreg32(bit, CS_CLR_REGISTER);
     }
   else
     {
       /* Disable slave select (low enables) */
 
-      spidbg("CS de-asserted\n");
+      spiinfo("CS de-asserted\n");
       putreg32(bit, CS_SET_REGISTER);
 
       /* Wait for the TX FIFO not full indication */
@@ -296,7 +282,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
   divisor = (divisor + 1) & ~1;
   putreg8(divisor, LPC214X_SPI1_CPSR);
 
-  spidbg("Frequency %d->%d\n", frequency, LPC214X_PCLKFREQ / divisor);
+  spiinfo("Frequency %d->%d\n", frequency, LPC214X_PCLKFREQ / divisor);
   return LPC214X_PCLKFREQ / divisor;
 }
 
@@ -321,7 +307,7 @@ static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
    * board.
    */
 
-  spidbg("Return SPI_STATUS_PRESENT\n");
+  spiinfo("Return SPI_STATUS_PRESENT\n");
   return SPI_STATUS_PRESENT;
 }
 
@@ -392,7 +378,7 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
   /* Get the value from the RX FIFO and return it */
 
   regval = getreg16(LPC214X_SPI1_DR);
-  spidbg("%04x->%04x\n", wd, regval);
+  spiinfo("%04x->%04x\n", wd, regval);
   return regval;
 }
 
@@ -422,7 +408,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
 
   /* Loop while thre are bytes remaining to be sent */
 
-  spidbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
   while (nwords > 0)
     {
       /* While the TX FIFO is not full and there are bytes left to send */
@@ -439,7 +425,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
 
   /* Then discard all card responses until the RX & TX FIFOs are emptied. */
 
-  spidbg("discarding\n");
+  spiinfo("discarding\n");
   do
     {
       /* Is there anything in the RX fifo? */
@@ -493,7 +479,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
 
   /* While there is remaining to be sent (and no synchronization error has occurred) */
 
-  spidbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
   while (nwords || rxpending)
     {
       /* Fill the transmit FIFO with 0xff...
@@ -502,7 +488,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
        * and (3) there are more bytes to be sent.
        */
 
-      spivdbg("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
+      spiinfo("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
       while ((getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_TNF) &&
              (rxpending < LPC214X_SPI1_FIFOSZ) && nwords)
         {
@@ -513,7 +499,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
 
       /* Now, read the RX data from the RX FIFO while the RX FIFO is not empty */
 
-      spivdbg("RX: rxpending: %d\n", rxpending);
+      spiinfo("RX: rxpending: %d\n", rxpending);
       while (getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE)
         {
           *ptr++ = (uint8_t)getreg16(LPC214X_SPI1_DR);
@@ -548,7 +534,7 @@ FAR struct spi_dev_s *lpc214x_spibus_initialize(int port)
 
   /* Only the SPI1 interface is supported */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (port != 1)
     {
       return NULL;
diff --git a/configs/mcu123-lpc214x/usbmsc/Make.defs b/configs/mcu123-lpc214x/usbmsc/Make.defs
index 09495f17e274a3244afdc91e1fc4ce8e7a66ed29..3a8b2bb9e2010fcb13fe021809b81efb73ebad4e 100644
--- a/configs/mcu123-lpc214x/usbmsc/Make.defs
+++ b/configs/mcu123-lpc214x/usbmsc/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(HOSTOS),Cygwin)
 endif
 endif
 
-ifeq ("${CONFIG_DEBUG}","y")
+ifeq ("${CONFIG_DEBUG_FEATURES}","y")
   ARCHOPTIMIZATION = -g
 endif
 
@@ -86,7 +86,7 @@ else
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
@@ -115,7 +115,7 @@ EXEEXT =
 ifneq ($(CROSSDEV),arm-nuttx-elf-)
   LDFLAGS += -nostartfiles -nodefaultlibs
 endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
   LDFLAGS += -g
 endif
 
diff --git a/configs/mcu123-lpc214x/usbmsc/defconfig b/configs/mcu123-lpc214x/usbmsc/defconfig
index 5d58f0bba799d40ec2950738bf5868ccc3dd650e..a570f66828ef6375c2bbe7e0e6625ce67d4cf486 100644
--- a/configs/mcu123-lpc214x/usbmsc/defconfig
+++ b/configs/mcu123-lpc214x/usbmsc/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -71,10 +72,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -92,7 +93,11 @@ CONFIG_ARCH_CHIP_LPC214X=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -102,10 +107,21 @@ CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="lpc214x"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 # CONFIG_ARCH_LOWVECTORS is not set
 
@@ -167,11 +183,14 @@ CONFIG_LPC214X_USBDEV=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ARCH_USBDUMP is not set
 # CONFIG_ENDIAN_BIG is not set
@@ -226,7 +245,11 @@ CONFIG_ARCH_LEDS=y
 # Board-Specific Options
 #
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
 
 #
 # RTOS Features
@@ -261,6 +284,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="msconn_main"
 CONFIG_RR_INTERVAL=0
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -311,9 +335,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -344,14 +369,20 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
 # CONFIG_SPI_EXCHANGE is not set
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_I2S is not set
 
 #
@@ -365,7 +396,21 @@ CONFIG_SPI=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -377,15 +422,17 @@ CONFIG_MMCSD_SPICLOCK=20000000
 CONFIG_MMCSD_SPIMODE=0
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -409,14 +456,11 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_UART1_SERIAL_CONSOLE is not set
@@ -434,6 +478,7 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 
 #
 # UART1 Configuration
@@ -446,6 +491,7 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
 CONFIG_USBDEV=y
 
 #
@@ -460,7 +506,7 @@ CONFIG_USBDEV_MAXPOWER=100
 # CONFIG_ARCH_USBDEV_STALLQUEUE is not set
 CONFIG_USBDEV_TRACE=y
 CONFIG_USBDEV_TRACE_NRECORDS=128
-# CONFIG_USBDEV_TRACE_STRINGS is not set
+# CONFIG_USBDEV_TRACE_INITIALIDSET is not set
 
 #
 # USB Device Class Driver Options
@@ -487,15 +533,18 @@ CONFIG_USBMSC_SCSI_STACKSIZE=2048
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -527,16 +576,11 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -555,6 +599,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -599,11 +647,15 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -618,26 +670,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -645,33 +697,45 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -684,26 +748,23 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -721,17 +782,18 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_USBMONITOR is not set
 CONFIG_SYSTEM_USBMSC=y
 CONFIG_SYSTEM_USBMSC_NLUNS=1
 CONFIG_SYSTEM_USBMSC_DEVMINOR1=0
@@ -742,5 +804,5 @@ CONFIG_SYSTEM_USBMSC_DEVMINOR3=2
 CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2"
 # CONFIG_SYSTEM_USBMSC_DEBUGMM is not set
 # CONFIG_SYSTEM_USBMSC_TRACE is not set
-# CONFIG_SYSTEM_USBMONITOR is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/mcu123-lpc214x/usbserial/Make.defs b/configs/mcu123-lpc214x/usbserial/Make.defs
index 54c6f3ffe48e7dcef539d685c98103a0047a335b..e5b9f6ea347aabdb99db8632616805ddb0fb2bbc 100644
--- a/configs/mcu123-lpc214x/usbserial/Make.defs
+++ b/configs/mcu123-lpc214x/usbserial/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(HOSTOS),Cygwin)
 endif
 endif
 
-ifeq ("${CONFIG_DEBUG}","y")
+ifeq ("${CONFIG_DEBUG_FEATURES}","y")
   ARCHOPTIMIZATION = -g
 endif
 
@@ -86,7 +86,7 @@ else
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
@@ -115,7 +115,7 @@ EXEEXT =
 ifneq ($(CROSSDEV),arm-nuttx-elf-)
   LDFLAGS += -nostartfiles -nodefaultlibs
 endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
   LDFLAGS += -g
 endif
 
diff --git a/configs/mcu123-lpc214x/usbserial/defconfig b/configs/mcu123-lpc214x/usbserial/defconfig
index e13970db02d837568c6e21f85c268954decd7a78..53d17df772b982583c7e138df7b49c29dbe04ed0 100644
--- a/configs/mcu123-lpc214x/usbserial/defconfig
+++ b/configs/mcu123-lpc214x/usbserial/defconfig
@@ -42,10 +42,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +72,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -117,6 +116,8 @@ CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="lpc214x"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
 # CONFIG_ARCH_HAVE_TRUSTZONE is not set
@@ -246,8 +247,6 @@ CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -388,7 +387,12 @@ CONFIG_DEV_NULL=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -396,6 +400,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -404,10 +409,10 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -431,10 +436,6 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -509,15 +510,18 @@ CONFIG_PL2303_PRODUCTSTR="USBdev Serial"
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -548,12 +552,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -618,7 +616,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -626,6 +623,7 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -654,10 +652,10 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -666,20 +664,19 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -691,11 +688,11 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 CONFIG_EXAMPLES_USBSERIAL=y
 CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -717,8 +714,8 @@ CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -729,6 +726,7 @@ CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -750,16 +748,16 @@ CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/micropendous3/hello/Make.defs b/configs/micropendous3/hello/Make.defs
index 3319e5ddf08ce17db8b08c6ff36bce7a7979a1a7..cb4766fc67a4d37da163e0913043ddecec10dbaa 100644
--- a/configs/micropendous3/hello/Make.defs
+++ b/configs/micropendous3/hello/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/micropendous3/hello/defconfig b/configs/micropendous3/hello/defconfig
index a1a6f7ceecac66e1cca566f0f921ab151cad9f92..2876f12d1c535fa6aaae6cf25354cb5264d4d9f0 100644
--- a/configs/micropendous3/hello/defconfig
+++ b/configs/micropendous3/hello/defconfig
@@ -42,7 +42,7 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
@@ -58,8 +58,7 @@ CONFIG_DEBUG_FULLOPT=y
 CONFIG_ARCH_AVR=y
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -242,7 +241,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
 # CONFIG_16550_UART is not set
@@ -306,7 +304,6 @@ CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
 # System Logging
 #
 
-# CONFIG_SYSLOG is not set
 
 #
 # Graphics Support
@@ -343,7 +340,7 @@ CONFIG_MM_REGIONS=1
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -363,7 +360,6 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Non-standard Library Support
@@ -422,7 +418,6 @@ CONFIG_EXAMPLES_HELLO=y
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
diff --git a/configs/mikroe-stm32f4/Kconfig b/configs/mikroe-stm32f4/Kconfig
index 836f13cf2b11e11f2b13a3647074fed740066013..00a5e41ee4744b0f04a42f368a6e3e59a9a12f4c 100644
--- a/configs/mikroe-stm32f4/Kconfig
+++ b/configs/mikroe-stm32f4/Kconfig
@@ -76,6 +76,11 @@ config MIKROE_RAMMTD_SIZE
 	---help---
 		Sets the size of static RAM allocation for the SMART RAM device
 
+config MIKROE_QETIMER
+	int "Timer to use with QE encoder"
+	default 3
+	depends on QENCODER
+
 config PM_ALARM_SEC
 	int "PM_STANDBY delay (seconds)"
 	default 15
diff --git a/configs/mikroe-stm32f4/README.txt b/configs/mikroe-stm32f4/README.txt
index e71797ffb128c6b4299d4ab482c196327ea48848..0348f0e18b77626d5e7c56e89e35c85e826ab512 100644
--- a/configs/mikroe-stm32f4/README.txt
+++ b/configs/mikroe-stm32f4/README.txt
@@ -660,7 +660,7 @@ Mikroe-STM32F4-specific Configuration Options
     CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
     CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
     CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
-    CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+    CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
       dump of all CAN registers.
 
   Mikroe-STM32F4 SPI Configuration
@@ -675,10 +675,10 @@ Mikroe-STM32F4-specific Configuration Options
 
     CONFIG_SDIO_DMA - Support DMA data transfers.  Requires CONFIG_STM32_SDIO
       and CONFIG_STM32_DMA2.
-    CONFIG_SDIO_PRI - Select SDIO interrupt prority.  Default: 128
-    CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
+    CONFIG_STM32_SDIO_PRI - Select SDIO interrupt prority.  Default: 128
+    CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
       Default:  Medium
-    CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode.  Default:
+    CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode.  Default:
       4-bit transfer mode.
 
   STM32 USB OTG FS Host Driver Support
@@ -703,9 +703,9 @@ Mikroe-STM32F4-specific Configuration Options
    CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts.  Why would you ever
      want to do that?
    CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
-     debug.  Depends on CONFIG_DEBUG.
+     debug.  Depends on CONFIG_DEBUG_FEATURES.
    CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
-     packets. Depends on CONFIG_DEBUG.
+     packets. Depends on CONFIG_DEBUG_FEATURES.
 
 Configurations
 ==============
@@ -908,7 +908,6 @@ Where  is one of the following:
     3. This configuration does have UART2 output enabled and set up as
        the system logging device:
 
-       CONFIG_SYSLOG=y                    : Enable output to syslog, not console
        CONFIG_SYSLOG_CHAR=y               : Use a character device for system logging
        CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART2 will be /dev/ttyS0
 
@@ -926,16 +925,16 @@ Where  is one of the following:
        CONFIG_USBDEV_TRACE_NRECORDS=128        : Buffer 128 records in memory
        CONFIG_NSH_USBDEV_TRACE=n               : No builtin tracing from NSH
        CONFIG_NSH_ARCHINIT=y                   : Automatically start the USB monitor
-       CONFIG_SYSTEM_USBMONITOR=y              : Enable the USB monitor daemon
-       CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
-       CONFIG_SYSTEM_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
-       CONFIG_SYSTEM_USBMONITOR_INTERVAL=2     : Dump trace data every 2 seconds
-
-       CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y    : Enable TRACE output
-       CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y
-       CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y
-       CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y
-       CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y
+       CONFIG_USBMONITOR=y              : Enable the USB monitor daemon
+       CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
+       CONFIG_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
+       CONFIG_USBMONITOR_INTERVAL=2     : Dump trace data every 2 seconds
+
+       CONFIG_USBMONITOR_TRACEINIT=y    : Enable TRACE output
+       CONFIG_USBMONITOR_TRACECLASS=y
+       CONFIG_USBMONITOR_TRACETRANSFERS=y
+       CONFIG_USBMONITOR_TRACECONTROLLER=y
+       CONFIG_USBMONITOR_TRACEINTERRUPTS=y
 
     5. By default, this project assumes that you are *NOT* using the DFU
        bootloader.
diff --git a/configs/mikroe-stm32f4/fulldemo/Make.defs b/configs/mikroe-stm32f4/fulldemo/Make.defs
index 6dbe0a0fa380fedbc0578e836eb2eec31b89cc33..dea26ef117025bbb13305013603c6f05e31b17f9 100644
--- a/configs/mikroe-stm32f4/fulldemo/Make.defs
+++ b/configs/mikroe-stm32f4/fulldemo/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/mikroe-stm32f4/fulldemo/defconfig b/configs/mikroe-stm32f4/fulldemo/defconfig
index 65b3ac8069f9baca838384eec967e839a7e09532..359c914a705da5b6ebed40cca6e446afe516eef5 100644
--- a/configs/mikroe-stm32f4/fulldemo/defconfig
+++ b/configs/mikroe-stm32f4/fulldemo/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 CONFIG_DEBUG_NOOPT=y
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -200,6 +203,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -347,6 +351,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -430,6 +440,12 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y
 # CONFIG_STM32_CCMEXCLUDE is not set
 CONFIG_STM32_DMACAPABLE=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_PWM is not set
 # CONFIG_STM32_TIM1_ADC is not set
 # CONFIG_STM32_TIM1_CAP is not set
@@ -454,10 +470,18 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
 # CONFIG_USART2_RXDMA is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -561,9 +585,6 @@ CONFIG_ARCH_BOARD="mikroe-stm32f4"
 #
 # Common Board Options
 #
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Board-Specific Options
@@ -575,13 +596,12 @@ CONFIG_MIKROE_FLASH_CONFIG_PART=y
 CONFIG_MIKROE_FLASH_CONFIG_PART_NUMBER=0
 CONFIG_MIKROE_FLASH_PART_LIST="8,248,768"
 # CONFIG_MIKROE_RAMMTD is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 CONFIG_BOARDCTL_TSCTEST=y
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -598,9 +618,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=8
@@ -610,6 +633,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -626,6 +650,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -667,8 +693,8 @@ CONFIG_SIG_SIGWORK=17
 #
 # POSIX Message Queue Options
 #
-CONFIG_PREALLOC_MQ_MSGS=4
-CONFIG_MQ_MAXMSGSIZE=32
+CONFIG_PREALLOC_MQ_MSGS=32
+CONFIG_MQ_MAXMSGSIZE=64
 # CONFIG_MODULE is not set
 
 #
@@ -698,6 +724,7 @@ CONFIG_DEV_NULL=y
 CONFIG_DEV_ZERO=y
 CONFIG_ARCH_HAVE_RNG=y
 CONFIG_DEV_RANDOM=y
+# CONFIG_DEV_URANDOM is not set
 CONFIG_DEV_LOOP=y
 
 #
@@ -713,19 +740,25 @@ CONFIG_RAMDISK=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 CONFIG_SPI_CALLBACK=y
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 CONFIG_RTC_ALARM=y
@@ -752,11 +785,20 @@ CONFIG_INPUT=y
 # CONFIG_BUTTONS is not set
 # CONFIG_DJOYSTICK is not set
 # CONFIG_AJOYSTICK is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 # CONFIG_LCD_NOGETRUN is not set
@@ -771,6 +813,7 @@ CONFIG_LCD_MAXPOWER=1
 CONFIG_LCD_MIO283QT2=y
 # CONFIG_LCD_MIO283QT9A is not set
 # CONFIG_LCD_UG9664HSWAG01 is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 # CONFIG_LCD_SSD1351 is not set
@@ -785,17 +828,14 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -834,12 +874,14 @@ CONFIG_RAMMTD_ERASESTATE=0xff
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 CONFIG_MTD_M25P=y
 CONFIG_M25P_SPIMODE=0
 CONFIG_M25P_SPIFREQUENCY=20000000
 CONFIG_M25P_MANUFACTURER=0x1C
 CONFIG_M25P_MEMORY_TYPE=0x31
 CONFIG_M25P_SUBSECTOR_ERASE=y
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
 # CONFIG_MTD_N25QXXX is not set
 CONFIG_MTD_SMART=y
@@ -862,9 +904,9 @@ CONFIG_MTD_SMART_WEAR_LEVEL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_SERIAL_REMOVABLE=y
+# CONFIG_SERIAL_CONSOLE is not set
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -910,6 +952,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -952,16 +995,24 @@ CONFIG_CDCACM_VENDORSTR="NuttX"
 CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+CONFIG_SYSLOG_CHAR=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+CONFIG_SYSLOG_CHAR_CRLF=y
+CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -1009,14 +1060,6 @@ CONFIG_FS_BINFS=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-CONFIG_SYSLOG_CHAR=y
-CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
-
 #
 # Graphics Support
 #
@@ -1104,13 +1147,14 @@ CONFIG_NXFONT_SERIF22X28B=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 CONFIG_NXTERM=y
 
 #
 # NxTerm Output Text/Graphics Options
 #
 CONFIG_NXTERM_BPP=16
-CONFIG_NXTERM_CURSORCHAR=137
+CONFIG_NXTERM_CURSORCHAR=95
 CONFIG_NXTERM_MXCHARS=128
 CONFIG_NXTERM_CACHESIZE=16
 CONFIG_NXTERM_LINESEPARATION=0
@@ -1130,7 +1174,10 @@ CONFIG_NX_MULTIUSER=y
 CONFIG_NX_BLOCKING=y
 CONFIG_NX_MXSERVERMSGS=32
 CONFIG_NX_MXCLIENTMSGS=16
-# CONFIG_NX_NXSTART is not set
+# CONFIG_NXSTART_EXTERNINIT is not set
+CONFIG_NXSTART_SERVERPRIO=110
+CONFIG_NXSTART_SERVERSTACK=2048
+CONFIG_NXSTART_DEVNO=0
 
 #
 # Memory Management
@@ -1209,6 +1256,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1227,17 +1276,20 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1268,21 +1320,22 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FLASH_TEST is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -1294,8 +1347,6 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 CONFIG_EXAMPLES_NX=y
-CONFIG_EXAMPLES_NX_VPLANE=0
-CONFIG_EXAMPLES_NX_DEVNO=0
 CONFIG_EXAMPLES_NX_DEFAULT_COLORS=y
 CONFIG_EXAMPLES_NX_DEFAULT_FONT=y
 CONFIG_EXAMPLES_NX_BPP=16
@@ -1311,29 +1362,27 @@ CONFIG_EXAMPLES_NX_CLIENTPRIO=100
 CONFIG_EXAMPLES_NX_SERVERPRIO=120
 CONFIG_EXAMPLES_NX_LISTENERPRIO=80
 CONFIG_EXAMPLES_NX_NOTIFYSIGNO=4
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RANDOM is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_FLASH_TEST is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1344,15 +1393,16 @@ CONFIG_EXAMPLES_TOUCHSCREEN_MINOR=0
 CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/input0"
 # CONFIG_EXAMPLES_TOUCHSCREEN_MOUSE is not set
 CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+CONFIG_FSUTILS_FLASH_ERASEALL=y
 # CONFIG_FSUTILS_INIFILE is not set
 CONFIG_FSUTILS_MKSMARTFS=y
 # CONFIG_FSUTILS_PASSWD is not set
@@ -1373,8 +1423,9 @@ CONFIG_FSUTILS_MKSMARTFS=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1440,13 +1491,13 @@ CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MKSMARTFS is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1463,11 +1514,15 @@ CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Configure Command Options
 #
 CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_FILEIOSIZE=512
@@ -1513,10 +1568,7 @@ CONFIG_NXWIDGETS=y
 #
 CONFIG_NXWIDGETS_FLICKERFREE=y
 # CONFIG_NXWIDGETS_EXTERNINIT is not set
-CONFIG_NXWIDGETS_DEVNO=0
 CONFIG_NXWIDGET_SERVERINIT=y
-CONFIG_NXWIDGETS_SERVERPRIO=110
-CONFIG_NXWIDGETS_SERVERSTACK=2048
 CONFIG_NXWIDGETS_CLIENTPRIO=100
 CONFIG_NXWIDGETS_LISTENERPRIO=100
 CONFIG_NXWIDGETS_LISTENERSTACK=2048
@@ -1610,7 +1662,7 @@ CONFIG_NXWM_TASKBAR_LEFT=y
 CONFIG_NXWM_STARTWINDOW_VSPACING=4
 CONFIG_NXWM_STARTWINDOW_HSPACING=4
 # CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set
-CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm"
+CONFIG_NXWM_STARTWINDOW_MQNAME="nxwm"
 CONFIG_NXWM_STARTWINDOW_MXMSGS=32
 CONFIG_NXWM_STARTWINDOW_MXMPRIO=42
 CONFIG_NXWM_STARTWINDOW_PRIO=100
@@ -1718,13 +1770,14 @@ CONFIG_MIKROE_STM32F4_CONFIGDATA_PART=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 CONFIG_SYSTEM_FLASH_ERASEALL=y
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 CONFIG_SYSTEM_NXPLAYER=y
 CONFIG_NXPLAYER_PLAYTHREAD_STACKSIZE=1500
 CONFIG_NXPLAYER_COMMAND_LINE=y
@@ -1744,7 +1797,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
-# CONFIG_SYSTEM_CDCACM is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/mikroe-stm32f4/include/board.h b/configs/mikroe-stm32f4/include/board.h
index 796b6a62b40dd8711b83b62f9b8f0546845fd0a8..a985f31e5048cef124e7c3220c58d49c03d50fa7 100644
--- a/configs/mikroe-stm32f4/include/board.h
+++ b/configs/mikroe-stm32f4/include/board.h
@@ -2,7 +2,7 @@
  * configs/mikroe-stm32f4/include/board.h
  * include/arch/board/board.h
  *
- *   Copyright (C) 2012-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012-2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -154,8 +154,14 @@
  * Note: TIM1,8 are on APB2, others on APB1
  */
 
-#define STM32_TIM18_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_TIM27_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM3_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM4_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM5_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM6_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM7_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM8_FREQUENCY    STM32_HCLK_FREQUENCY
 
 /* LED definitions ******************************************************************/
 /* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any
diff --git a/configs/mikroe-stm32f4/kostest/Make.defs b/configs/mikroe-stm32f4/kostest/Make.defs
index 15aaec72bcd17a540f456691161237d8938f05ca..82008eeefbfb9e6338664059c8d64ff1bb0f3c02 100644
--- a/configs/mikroe-stm32f4/kostest/Make.defs
+++ b/configs/mikroe-stm32f4/kostest/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/mikroe-stm32f4/kostest/defconfig b/configs/mikroe-stm32f4/kostest/defconfig
index 53c51bc66f8734309ac505f16295dcd29b07d1fd..10eaf2a823994de4d11a0191e4e7d64a5cd372a2 100644
--- a/configs/mikroe-stm32f4/kostest/defconfig
+++ b/configs/mikroe-stm32f4/kostest/defconfig
@@ -47,10 +47,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 CONFIG_DEBUG_NOOPT=y
@@ -64,8 +66,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -77,7 +78,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -206,6 +206,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -435,6 +436,12 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 # CONFIG_STM32_FORCEPOWER is not set
 CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_PWM is not set
 # CONFIG_STM32_TIM1_ADC is not set
 # CONFIG_STM32_TIM1_CAP is not set
@@ -459,9 +466,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -565,9 +580,6 @@ CONFIG_ARCH_BOARD="mikroe-stm32f4"
 #
 # Common Board Options
 #
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Board-Specific Options
@@ -577,13 +589,12 @@ CONFIG_MIKROE_FLASH_MINOR=0
 CONFIG_MIKROE_FLASH_PART=y
 CONFIG_MIKROE_FLASH_PART_LIST="256,768"
 # CONFIG_MIKROE_RAMMTD is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -600,9 +611,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=8
@@ -701,6 +715,7 @@ CONFIG_DEV_NULL=y
 CONFIG_DEV_ZERO=y
 CONFIG_ARCH_HAVE_RNG=y
 CONFIG_DEV_RANDOM=y
+# CONFIG_DEV_URANDOM is not set
 CONFIG_DEV_LOOP=y
 
 #
@@ -720,9 +735,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -741,14 +761,25 @@ CONFIG_RTC_NALARMS=1
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -785,6 +816,7 @@ CONFIG_RAMMTD_ERASESTATE=0xff
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 CONFIG_MTD_M25P=y
 CONFIG_M25P_SPIMODE=0
 CONFIG_M25P_SPIFREQUENCY=20000000
@@ -813,9 +845,9 @@ CONFIG_MTD_SMART_WEAR_LEVEL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_SERIAL_REMOVABLE=y
+# CONFIG_SERIAL_CONSOLE is not set
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -861,6 +893,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -903,16 +936,23 @@ CONFIG_CDCACM_VENDORSTR="NuttX"
 CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+CONFIG_SYSLOG_CHAR=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+CONFIG_SYSLOG_CHAR_CRLF=y
+CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -959,14 +999,6 @@ CONFIG_SMARTFS_MAXNAMLEN=16
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-CONFIG_SYSLOG_CHAR=y
-CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
-
 #
 # Graphics Support
 #
@@ -1035,7 +1067,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -1044,9 +1075,11 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_USRWORK is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1074,7 +1107,6 @@ CONFIG_HAVE_CXXINITIALIZE=y
 #
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -1083,9 +1115,9 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_IGMP is not set
 # CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_KEYPADTEST is not set
-# CONFIG_EXAMPLES_IGMP is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1095,11 +1127,11 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 CONFIG_EXAMPLES_OSTEST=y
 CONFIG_EXAMPLES_OSTEST_LOOPS=1
@@ -1109,13 +1141,11 @@ CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000
 CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 CONFIG_EXAMPLES_OSTEST_WAITRESULT=y
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RANDOM is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1127,14 +1157,15 @@ CONFIG_EXAMPLES_OSTEST_WAITRESULT=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 CONFIG_FSUTILS_MKSMARTFS=y
 # CONFIG_FSUTILS_PASSWD is not set
@@ -1155,8 +1186,8 @@ CONFIG_FSUTILS_MKSMARTFS=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1221,7 +1252,6 @@ CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MKSMARTFS is not set
 # CONFIG_NSH_DISABLE_MH is not set
@@ -1244,6 +1274,9 @@ CONFIG_NSH_DISABLE_PS=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Configure Command Options
@@ -1284,12 +1317,13 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1297,7 +1331,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
-# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/mikroe-stm32f4/nsh/Make.defs b/configs/mikroe-stm32f4/nsh/Make.defs
index fbf03ea8531755b7c2d2628ec2f2ba2942c6cdb2..6cfdaa9437200db8f6194ebe9c35f05e8efbe7b9 100644
--- a/configs/mikroe-stm32f4/nsh/Make.defs
+++ b/configs/mikroe-stm32f4/nsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/mikroe-stm32f4/nsh/defconfig b/configs/mikroe-stm32f4/nsh/defconfig
index ed18e9a0b9c94ef0a6709939c08f95b075e73f3d..3703639ae80856d17919a38f84016c9eee944925 100644
--- a/configs/mikroe-stm32f4/nsh/defconfig
+++ b/configs/mikroe-stm32f4/nsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -200,6 +200,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -428,6 +429,12 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 # CONFIG_STM32_FORCEPOWER is not set
 CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -446,9 +453,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -547,9 +562,6 @@ CONFIG_ARCH_BOARD="mikroe-stm32f4"
 #
 # Common Board Options
 #
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Board-Specific Options
@@ -559,12 +571,11 @@ CONFIG_MIKROE_FLASH_MINOR=0
 CONFIG_MIKROE_FLASH_PART=y
 CONFIG_MIKROE_FLASH_PART_LIST="256,768"
 # CONFIG_MIKROE_RAMMTD is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -576,9 +587,12 @@ CONFIG_LIB_BOARDCTL=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=1
@@ -673,6 +687,7 @@ CONFIG_DEV_NULL=y
 CONFIG_DEV_ZERO=y
 CONFIG_ARCH_HAVE_RNG=y
 CONFIG_DEV_RANDOM=y
+# CONFIG_DEV_URANDOM is not set
 CONFIG_DEV_LOOP=y
 
 #
@@ -692,9 +707,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -708,14 +728,25 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -752,6 +783,7 @@ CONFIG_RAMMTD_ERASESTATE=0xff
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 CONFIG_MTD_M25P=y
 CONFIG_M25P_SPIMODE=0
 CONFIG_M25P_SPIFREQUENCY=20000000
@@ -780,8 +812,9 @@ CONFIG_MTD_SMART_WEAR_LEVEL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -827,18 +860,26 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+CONFIG_SYSLOG_CHAR=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+CONFIG_SYSLOG_CHAR_CRLF=y
+CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -886,14 +927,6 @@ CONFIG_SMARTFS_MAXNAMLEN=16
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-CONFIG_SYSLOG_CHAR=y
-CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
-
 #
 # Graphics Support
 #
@@ -961,7 +994,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -970,8 +1002,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1004,19 +1038,19 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FLASH_TEST is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1027,44 +1061,43 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RANDOM is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_FLASH_TEST is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+CONFIG_FSUTILS_FLASH_ERASEALL=y
 # CONFIG_FSUTILS_INIFILE is not set
 CONFIG_FSUTILS_MKSMARTFS=y
 # CONFIG_FSUTILS_PASSWD is not set
@@ -1085,8 +1118,8 @@ CONFIG_FSUTILS_MKSMARTFS=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1152,7 +1185,6 @@ CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MKSMARTFS is not set
 # CONFIG_NSH_DISABLE_MH is not set
@@ -1175,6 +1207,9 @@ CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Configure Command Options
@@ -1214,13 +1249,13 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 CONFIG_SYSTEM_FLASH_ERASEALL=y
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1228,6 +1263,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/mikroe-stm32f4/nx/Make.defs b/configs/mikroe-stm32f4/nx/Make.defs
index 6dbe0a0fa380fedbc0578e836eb2eec31b89cc33..dea26ef117025bbb13305013603c6f05e31b17f9 100644
--- a/configs/mikroe-stm32f4/nx/Make.defs
+++ b/configs/mikroe-stm32f4/nx/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/mikroe-stm32f4/nx/defconfig b/configs/mikroe-stm32f4/nx/defconfig
index e0bd19efdd3e58326312056d5a6f4da384be4352..24bf18c6022bca612a69e0d7f96b5f17d23b290a 100644
--- a/configs/mikroe-stm32f4/nx/defconfig
+++ b/configs/mikroe-stm32f4/nx/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +202,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -346,6 +350,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -426,6 +436,12 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 # CONFIG_STM32_FORCEPOWER is not set
 CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -526,19 +542,17 @@ CONFIG_ARCH_BOARD="mikroe-stm32f4"
 #
 # Common Board Options
 #
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
 # CONFIG_MIKROE_FLASH is not set
 # CONFIG_MIKROE_RAMMTD is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -555,9 +569,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=1
@@ -650,6 +667,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 # CONFIG_DEV_NULL is not set
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -665,12 +683,16 @@ CONFIG_DISABLE_POLL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -678,11 +700,20 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 # CONFIG_LCD_NOGETRUN is not set
@@ -696,6 +727,7 @@ CONFIG_LCD_MAXPOWER=1
 # CONFIG_LCD_NOKIA6100 is not set
 CONFIG_LCD_MIO283QT2=y
 # CONFIG_LCD_MIO283QT9A is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 # CONFIG_LCD_SSD1351 is not set
@@ -710,17 +742,14 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -729,20 +758,27 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 # CONFIG_SERIAL is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+CONFIG_SYSLOG_CHAR=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+CONFIG_SYSLOG_CHAR_CRLF=y
+CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -780,14 +816,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-CONFIG_SYSLOG_CHAR=y
-CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
-
 #
 # Graphics Support
 #
@@ -926,6 +954,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -942,7 +972,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -950,8 +979,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -982,9 +1013,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -992,10 +1023,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -1013,35 +1044,34 @@ CONFIG_EXAMPLES_NX_BPP=16
 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set
 CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 # CONFIG_EXAMPLES_NX_EXTERNINIT is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1063,8 +1093,9 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1129,12 +1160,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1151,6 +1182,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1190,12 +1222,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1203,6 +1235,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/mikroe-stm32f4/nxlines/Make.defs b/configs/mikroe-stm32f4/nxlines/Make.defs
index 6dbe0a0fa380fedbc0578e836eb2eec31b89cc33..dea26ef117025bbb13305013603c6f05e31b17f9 100644
--- a/configs/mikroe-stm32f4/nxlines/Make.defs
+++ b/configs/mikroe-stm32f4/nxlines/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/mikroe-stm32f4/nxlines/defconfig b/configs/mikroe-stm32f4/nxlines/defconfig
index 61f68f82d86e3f4824e9ad9d0d5cb162a0390236..0c5ac94cfe0b65c5b7b9316359584a320b7f9d20 100644
--- a/configs/mikroe-stm32f4/nxlines/defconfig
+++ b/configs/mikroe-stm32f4/nxlines/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +199,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -426,6 +427,12 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 # CONFIG_STM32_FORCEPOWER is not set
 CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -526,19 +533,17 @@ CONFIG_ARCH_BOARD="mikroe-stm32f4"
 #
 # Common Board Options
 #
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
 # CONFIG_MIKROE_FLASH is not set
 # CONFIG_MIKROE_RAMMTD is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -555,9 +560,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=1
@@ -650,6 +658,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 # CONFIG_DEV_NULL is not set
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -665,6 +674,7 @@ CONFIG_DISABLE_POLL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
@@ -678,11 +688,20 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 CONFIG_LCD_NOGETRUN=y
@@ -710,17 +729,14 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -729,20 +745,26 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 # CONFIG_SERIAL is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+CONFIG_SYSLOG_CHAR=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+CONFIG_SYSLOG_CHAR_CRLF=y
+CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -780,14 +802,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-CONFIG_SYSLOG_CHAR=y
-CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
-
 #
 # Graphics Support
 #
@@ -941,7 +955,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -949,8 +962,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -983,7 +998,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -991,10 +1005,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -1004,7 +1018,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
@@ -1020,30 +1033,30 @@ CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0xFFE0
 CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0x87F0
 CONFIG_EXAMPLES_NXLINES_BPP=16
 # CONFIG_EXAMPLES_NXLINES_EXTERNINIT is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1065,8 +1078,8 @@ CONFIG_EXAMPLES_NXLINES_BPP=16
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1131,7 +1144,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1153,6 +1165,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1191,12 +1204,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1204,6 +1217,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/mikroe-stm32f4/nxtext/Make.defs b/configs/mikroe-stm32f4/nxtext/Make.defs
index 6dbe0a0fa380fedbc0578e836eb2eec31b89cc33..dea26ef117025bbb13305013603c6f05e31b17f9 100644
--- a/configs/mikroe-stm32f4/nxtext/Make.defs
+++ b/configs/mikroe-stm32f4/nxtext/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/mikroe-stm32f4/nxtext/defconfig b/configs/mikroe-stm32f4/nxtext/defconfig
index 06e3ab7ab25e85044561185dac8f87ad82381075..369f4e2a1f2dc7f18899df4f759acd142dbcba28 100644
--- a/configs/mikroe-stm32f4/nxtext/defconfig
+++ b/configs/mikroe-stm32f4/nxtext/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 CONFIG_DEBUG_NOOPT=y
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +202,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -346,6 +350,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -426,6 +436,12 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 # CONFIG_STM32_FORCEPOWER is not set
 CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -526,19 +542,17 @@ CONFIG_ARCH_BOARD="mikroe-stm32f4"
 #
 # Common Board Options
 #
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
 # CONFIG_MIKROE_FLASH is not set
 # CONFIG_MIKROE_RAMMTD is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -555,9 +569,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=1
@@ -650,6 +667,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 # CONFIG_DEV_NULL is not set
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -665,12 +683,16 @@ CONFIG_DISABLE_POLL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -678,11 +700,20 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 # CONFIG_LCD_NOGETRUN is not set
@@ -696,6 +727,7 @@ CONFIG_LCD_MAXPOWER=1
 # CONFIG_LCD_NOKIA6100 is not set
 CONFIG_LCD_MIO283QT2=y
 # CONFIG_LCD_MIO283QT9A is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 # CONFIG_LCD_SSD1351 is not set
@@ -710,17 +742,14 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -729,20 +758,27 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 # CONFIG_SERIAL is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+CONFIG_SYSLOG_CHAR=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+CONFIG_SYSLOG_CHAR_CRLF=y
+CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -780,14 +816,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-CONFIG_SYSLOG_CHAR=y
-CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
-
 #
 # Graphics Support
 #
@@ -926,6 +954,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -941,7 +971,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -949,8 +978,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -981,9 +1012,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -991,10 +1022,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -1004,11 +1035,11 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 CONFIG_EXAMPLES_NXTEXT=y
 
 #
@@ -1032,27 +1063,26 @@ CONFIG_EXAMPLES_NXTEXT_DEFAULT_FONT=y
 # CONFIG_EXAMPLES_NXTEXT_EXTERNINIT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1074,8 +1104,9 @@ CONFIG_EXAMPLES_NXTEXT_DEFAULT_FONT=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1140,12 +1171,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1162,6 +1193,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1200,12 +1232,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1213,6 +1245,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/mikroe-stm32f4/src/mikroe-stm32f4.h b/configs/mikroe-stm32f4/src/mikroe-stm32f4.h
index 473d0a61fbcd9ed897522d02a8fdc6887207776c..be7b4edc17d8c54890b17391b73cc87105436ba5 100644
--- a/configs/mikroe-stm32f4/src/mikroe-stm32f4.h
+++ b/configs/mikroe-stm32f4/src/mikroe-stm32f4.h
@@ -1,7 +1,7 @@
 /****************************************************************************************************
  * configs/mikroe-stm32f4/src/mikroe-stm32f4.h
  *
- *   Copyright (C) 2011-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -227,6 +227,18 @@ void weak_function stm32_spidev_initialize(void);
 void weak_function stm32_usbinitialize(void);
 #endif
 
+/************************************************************************************
+ * Name: stm32_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PWM
+int stm32_pwm_setup(void);
+#endif
+
 /****************************************************************************************************
  * Name: stm32_usbhost_initialize
  *
@@ -240,6 +252,18 @@ void weak_function stm32_usbinitialize(void);
 #  error "The Mikroe-STM32F4 board does not support HOST OTG, only device!"
 #endif
 
+/****************************************************************************
+ * Name: stm32_qencoder_initialize
+ *
+ * Description:
+ *   Initialize and register a qencoder
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_QENCODER
+int stm32_qencoder_initialize(FAR const char *devpath, int timer);
+#endif
+
 /****************************************************************************************************
  * Name: stm32_lcdinitialize
  *
diff --git a/configs/mikroe-stm32f4/src/stm32_appinit.c b/configs/mikroe-stm32f4/src/stm32_appinit.c
index 9970d6927be1f29486e4ede401cafd6565500a3e..f42b6bc917343eae297cc29ddfbab0f1b7ba1d9f 100644
--- a/configs/mikroe-stm32f4/src/stm32_appinit.c
+++ b/configs/mikroe-stm32f4/src/stm32_appinit.c
@@ -55,13 +55,13 @@
 #  include 
 #endif
 
-#ifdef CONFIG_SYSTEM_USBMONITOR
-#  include 
+#ifdef CONFIG_USBMONITOR
+#  include 
 #endif
 
 #ifdef CONFIG_MIKROE_FLASH_CONFIG_PART
 #ifdef CONFIG_PLATFORM_CONFIGDATA
-#  include 
+#  include 
 #endif
 #endif
 
@@ -110,7 +110,7 @@
 
 /* Check if we should enable the USB monitor before starting NSH */
 
-#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_SYSTEM_USBMONITOR)
+#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_USBMONITOR)
 #  undef HAVE_USBMONITOR
 #endif
 
@@ -180,11 +180,7 @@ int board_app_initialize(uintptr_t arg)
   FAR struct spi_dev_s *spi;
   FAR struct mtd_dev_s *mtd;
 #endif
-#if defined(NSH_HAVEMMCSD) || defined(HAVE_USBHOST) || \
-    defined(HAVE_USBMONITOR) || defined(CONFIG_LCD_MIO283QT2) || \
-    defined(CONFIG_LCD_MIO283QT9A)
-  int ret;
-#endif
+  int ret = OK;
 
   /* Configure SPI-based devices */
 
@@ -347,13 +343,23 @@ int board_app_initialize(uintptr_t arg)
 #ifdef HAVE_USBMONITOR
   /* Start the USB Monitor */
 
-  ret = usbmonitor_start(0, NULL);
+  ret = usbmonitor_start();
   if (ret != OK)
     {
       syslog(LOG_ERR, "ERROR: Failed to start USB monitor: %d\n", ret);
     }
 #endif
 
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device. */
+
+  ret = stm32_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_pwm_setup() failed: %d\n", ret);
+    }
+#endif
+
 #if defined(CONFIG_LCD_MIO283QT2) || defined(CONFIG_LCD_MIO283QT9A)
   /* Configure the TFT LCD module */
 
@@ -367,13 +373,24 @@ int board_app_initialize(uintptr_t arg)
 
 #endif
 
-  /* Configure the Audio sub-system if enabled and bind it to SPI 3 */
+#ifdef CONFIG_QENCODER
+  /* Initialize and register the qencoder driver */
+
+  ret = stm32_qencoder_initialize("/dev/qe0", CONFIG_MIKROE_QETIMER);
+  if (ret != OK)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to register the qencoder: %d\n",
+             ret);
+      return ret;
+    }
+#endif
 
 #ifdef CONFIG_AUDIO
+  /* Configure the Audio sub-system if enabled and bind it to SPI 3 */
 
   up_vs1053initialize(spi);
-
 #endif
 
-  return OK;
+  return ret;
 }
diff --git a/configs/mikroe-stm32f4/src/stm32_idle.c b/configs/mikroe-stm32f4/src/stm32_idle.c
index 12c855b49790630cfe29c824420e28b805dfac22..140de1b15f0f46a27a2c415536b191c15c9aa97c 100644
--- a/configs/mikroe-stm32f4/src/stm32_idle.c
+++ b/configs/mikroe-stm32f4/src/stm32_idle.c
@@ -125,7 +125,7 @@ static void up_idlepm(void)
 
   if (newstate != oldstate)
     {
-      lldbg("newstate= %d oldstate=%d\n", newstate, oldstate);
+      _info("newstate= %d oldstate=%d\n", newstate, oldstate);
 
       flags = enter_critical_section();
 
diff --git a/configs/mikroe-stm32f4/src/stm32_mio283qt2.c b/configs/mikroe-stm32f4/src/stm32_mio283qt2.c
index 028330762367a59a0990844c01ed6b2313da561b..46ee2a54d691066f5e9fca8706e9df7af9b0af29 100644
--- a/configs/mikroe-stm32f4/src/stm32_mio283qt2.c
+++ b/configs/mikroe-stm32f4/src/stm32_mio283qt2.c
@@ -67,21 +67,6 @@
 /**************************************************************************************
  * Pre-processor Definitions
  **************************************************************************************/
-/* Configuration **********************************************************************/
-
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
 
 /* Mikroe-STM32F4 Hardware Definitions ************************************************/
 /* --- ---------------------------------- -------------------- ------------------------
@@ -117,16 +102,6 @@
  *  96 PB9                                DRIVEB               TFT display
  */
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg       dbg
-#  define lcdvdbg      vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /**************************************************************************************
  * Private Type Definition
  **************************************************************************************/
@@ -502,7 +477,7 @@ int board_lcd_initialize(void)
 
   if (!g_stm32f4_lcd.drvr)
     {
-      lcdvdbg("Initializing\n");
+      lcdinfo("Initializing\n");
 
       /* Hold the LCD in reset (active low)  */
 
@@ -519,7 +494,7 @@ int board_lcd_initialize(void)
       g_stm32f4_lcd.drvr = mio283qt2_lcdinitialize(&g_stm32f4_lcd.dev);
       if (!g_stm32f4_lcd.drvr)
         {
-          lcddbg("ERROR: mio283qt2_lcdinitialize failed\n");
+          lcderr("ERROR: mio283qt2_lcdinitialize failed\n");
           return -ENODEV;
         }
     }
diff --git a/configs/mikroe-stm32f4/src/stm32_mio283qt9a.c b/configs/mikroe-stm32f4/src/stm32_mio283qt9a.c
index e474514c3a10ff1b93d5f00c6e3dc7de72a23a63..9ea31f5571688caedc96a35c9b057e826136bcf2 100644
--- a/configs/mikroe-stm32f4/src/stm32_mio283qt9a.c
+++ b/configs/mikroe-stm32f4/src/stm32_mio283qt9a.c
@@ -68,21 +68,6 @@
 /**************************************************************************************
  * Pre-processor Definitions
  **************************************************************************************/
-/* Configuration **********************************************************************/
-
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
 
 /* Mikroe-STM32F4 Hardware Definitions ************************************************/
 /* --- ---------------------------------- -------------------- ------------------------
@@ -118,16 +103,6 @@
  *  96 PB9                                DRIVEB               TFT display
  */
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg       dbg
-#  define lcdvdbg      vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /**************************************************************************************
  * Private Type Definition
  **************************************************************************************/
@@ -503,7 +478,7 @@ int board_lcd_initialize(void)
 
   if (!g_stm32f4_lcd.drvr)
     {
-      lcdvdbg("Initializing\n");
+      lcdinfo("Initializing\n");
 
       /* Hold the LCD in reset (active low)  */
 
@@ -520,7 +495,7 @@ int board_lcd_initialize(void)
       g_stm32f4_lcd.drvr = mio283qt9a_lcdinitialize(&g_stm32f4_lcd.dev);
       if (!g_stm32f4_lcd.drvr)
         {
-          lcddbg("ERROR: mio283qt9a_lcdinitialize failed\n");
+          lcderr("ERROR: mio283qt9a_lcdinitialize failed\n");
           return -ENODEV;
         }
     }
diff --git a/configs/mikroe-stm32f4/src/stm32_pwm.c b/configs/mikroe-stm32f4/src/stm32_pwm.c
index 11f0ea7c25399a30cf0937764327f39d30187408..2ef8d6c9e63444204b82611ec66d708a79a9491f 100644
--- a/configs/mikroe-stm32f4/src/stm32_pwm.c
+++ b/configs/mikroe-stm32f4/src/stm32_pwm.c
@@ -43,7 +43,7 @@
 #include 
 
 #include 
-#include 
+#include 
 
 #include 
 
@@ -58,9 +58,9 @@
 /* Configuration *******************************************************************/
 /* PWM
  *
- * The mikroe_stm32f4 has no real on-board PWM devices, but the board can be configured to output
- * a pulse train using TIM4 CH2.  This pin is used by FSMC is connect to CN5 just for this
- * purpose:
+ * The mikroe_stm32f4 has no real on-board PWM devices, but the board can be
+ * configured to output a pulse train using TIM4 CH2.  This pin is used by FSMC is
+ * connected to CN5 just for this purpose:
  *
  * PD13 FSMC_A18 / MC_TIM4_CH2OUT pin 33 (EnB)
  *
@@ -85,27 +85,21 @@
 #  undef HAVE_PWM
 #endif
 
-#ifdef HAVE_PWM
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_pwm_setup
+ * Name: stm32_pwm_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/pwm.
+ *   Initialize PWM and register the PWM device.
  *
  ************************************************************************************/
 
-int board_pwm_setup(void)
+int stm32_pwm_setup(void)
 {
+#ifdef HAVE_PWM
   static bool initialized = false;
   struct pwm_lowerhalf_s *pwm;
   int ret;
@@ -119,7 +113,7 @@ int board_pwm_setup(void)
       pwm = stm32_pwminitialize(STM32F4DISCOVERY_PWMTIMER);
       if (!pwm)
         {
-          dbg("Failed to get the STM32 PWM lower half\n");
+          _err("ERROR: Failed to get the STM32 PWM lower half\n");
           return -ENODEV;
         }
 
@@ -128,7 +122,7 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/pwm0", pwm);
       if (ret < 0)
         {
-          adbg("pwm_register failed: %d\n", ret);
+          aerr("ERROR: pwm_register failed: %d\n", ret);
           return ret;
         }
 
@@ -138,6 +132,8 @@ int board_pwm_setup(void)
     }
 
   return OK;
+#else
+  return -ENODEV;
+#endif
 }
 
-#endif /* HAVE_PWM */
diff --git a/configs/mikroe-stm32f4/src/stm32_qencoder.c b/configs/mikroe-stm32f4/src/stm32_qencoder.c
index bcbb5dc438c9b1d61e85a9c91eef3fe26c4c9114..43b45729e8fe39313ab3043329e5450819bcc64d 100644
--- a/configs/mikroe-stm32f4/src/stm32_qencoder.c
+++ b/configs/mikroe-stm32f4/src/stm32_qencoder.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/mikroe_stm32f4/src/stm32_qencoder.c
  *
- *   Copyright (C) 2012-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012-2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -50,83 +50,12 @@
 #include "stm32_qencoder.h"
 #include "mikroe-stm32f4.h"
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-/* Configuration *******************************************************************/
-/* Check if we have a timer configured for quadrature encoder -- assume YES. */
-
-#define HAVE_QENCODER 1
-
-/* If TIMn is not enabled (via CONFIG_STM32_TIMn), then the configuration cannot
- * specify TIMn as a quadrature encoder (via CONFIG_STM32_TIMn_QE).
- */
-
-#ifndef CONFIG_STM32_TIM1
-#  undef CONFIG_STM32_TIM1_QE
-#endif
-#ifndef CONFIG_STM32_TIM2
-#  undef CONFIG_STM32_TIM2_QE
-#endif
-#ifndef CONFIG_STM32_TIM3
-#  undef CONFIG_STM32_TIM3_QE
-#endif
-#ifndef CONFIG_STM32_TIM4
-#  undef CONFIG_STM32_TIM4_QE
-#endif
-#ifndef CONFIG_STM32_TIM5
-#  undef CONFIG_STM32_TIM5_QE
-#endif
-#ifndef CONFIG_STM32_TIM8
-#  undef CONFIG_STM32_TIM8_QE
-#endif
-
-/* If the upper-half quadrature encoder driver is not enabled, then we cannot
- * support the quadrature encoder.
- */
-
-#ifndef CONFIG_QENCODER
-#  undef HAVE_QENCODER
-#endif
-
-/* Which Timer should we use, TIMID={1,2,3,4,5,8}.  If multiple timers are
- * configured as quadrature encoders, this logic will arbitrarily select
- * the lowest numbered timer.
- *
- * At least one TIMn, n={1,2,3,4,5,8}, must be both enabled and configured
- * as a quadrature encoder in order to support the lower half quadrature
- * encoder driver.  The above check assures that if CONFIG_STM32_TIMn_QE
- * is defined, then the correspdonding TIMn is also enabled.
- */
-
-#if defined CONFIG_STM32_TIM1_QE
-#  define TIMID 1
-#elif defined CONFIG_STM32_TIM2_QE
-#  define TIMID 2
-#elif defined CONFIG_STM32_TIM3_QE
-#  define TIMID 3
-#elif defined CONFIG_STM32_TIM4_QE
-#  define TIMID 4
-#elif defined CONFIG_STM32_TIM5_QE
-#  define TIMID 5
-#elif defined CONFIG_STM32_TIM8_QE
-#  define TIMID 8
-#else
-#  undef HAVE_QENCODER
-#endif
-
-#ifdef HAVE_QENCODER
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: qe_devinit
+ * Name: stm32_qencoder_initialize
  *
  * Description:
  *   All STM32 architectures must provide the following interface to work with
@@ -134,29 +63,20 @@
  *
  ************************************************************************************/
 
-int qe_devinit(void)
+int stm32_qencoder_initialize(FAR const char *devpath, int timer)
 {
-  static bool initialized = false;
   int ret;
 
-  /* Check if we are already initialized */
+  /* Initialize a quadrature encoder interface. */
 
-  if (!initialized)
+  sninfo("Initializing the quadrature encoder using TIM%d\n", timer);
+  ret = stm32_qeinitialize(devpath, timer);
+  if (ret < 0)
     {
-      /* Initialize a quadrature encoder interface. */
-
-      snvdbg("Initializing the quadrature encoder using TIM%d\n", TIMID);
-      ret = stm32_qeinitialize("/dev/qe0", TIMID);
-      if (ret < 0)
-        {
-          sndbg("stm32_qeinitialize failed: %d\n", ret);
-          return ret;
-        }
-
-      initialized = true;
+      snerr("ERROR: stm32_qeinitialize failed: %d\n", ret);
     }
 
-  return OK;
+  return ret;
 }
 
 #endif /* HAVE_QENCODER */
diff --git a/configs/mikroe-stm32f4/src/stm32_spi.c b/configs/mikroe-stm32f4/src/stm32_spi.c
index f56a075849164a7653a82eecaf4ce907e42c227b..3831378ece417e50864e635f18f68e7c36a639a4 100644
--- a/configs/mikroe-stm32f4/src/stm32_spi.c
+++ b/configs/mikroe-stm32f4/src/stm32_spi.c
@@ -59,32 +59,6 @@
 
 #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -150,7 +124,7 @@ void weak_function stm32_spidev_initialize(void)
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
 
-  spivdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
 #if defined(CONFIG_VS1053)
   if (devid == SPIDEV_AUDIO_DATA)
@@ -211,7 +185,7 @@ uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI2
 void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -223,7 +197,7 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI1
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
diff --git a/configs/mikroe-stm32f4/src/stm32_touchscreen.c b/configs/mikroe-stm32f4/src/stm32_touchscreen.c
index b9bba5f57a046770acf2419884c5aa400233d592..ea863e8f3d066e600babfe8052e1fbb5224297ee 100644
--- a/configs/mikroe-stm32f4/src/stm32_touchscreen.c
+++ b/configs/mikroe-stm32f4/src/stm32_touchscreen.c
@@ -530,7 +530,7 @@ static uint16_t tc_adc_read_sample(void)
 
   if (count > 0)
     {
-      idbg("Count = %d\n", count);
+      iinfo("Count = %d\n", count);
     }
 
   return retval;
@@ -623,7 +623,7 @@ static void tc_notify(FAR struct tc_dev_s *priv)
       if (fds)
         {
           fds->revents |= POLLIN;
-          ivdbg("Report events: %02x\n", fds->revents);
+          iinfo("Report events: %02x\n", fds->revents);
           sem_post(fds->sem);
         }
     }
@@ -899,7 +899,7 @@ static void tc_worker(FAR void *arg)
             priv->newy  = value / CONFIG_TOUCHSCREEN_AVG_SAMPLES;
             priv->value = 0;
             priv->sampcount = 0;
-            ivdbg("Y=%d\n", priv->newy);
+            iinfo("Y=%d\n", priv->newy);
 
             /* Configure YU and YD with drive voltages and disable XR drive.  Note that
              * this is configuring the DRIVEA and DRIVEB outputs to enable the on-board
@@ -978,7 +978,7 @@ static void tc_worker(FAR void *arg)
               }
 
             newx  = value / CONFIG_TOUCHSCREEN_AVG_SAMPLES;
-            ivdbg("X=%d\n", newx);
+            iinfo("X=%d\n", newx);
 
             /* Samples are available */
 
@@ -1017,7 +1017,7 @@ static void tc_worker(FAR void *arg)
 
           /* Notify any waiters that new touchscreen data is available */
 
-          idbg("1:X=%d, Y=%d\n", priv->sample.x, priv->sample.y);
+          iinfo("1:X=%d, Y=%d\n", priv->sample.x, priv->sample.y);
 
           tc_notify(priv);
         }
@@ -1089,7 +1089,7 @@ static void tc_worker(FAR void *arg)
 
               /* Notify any waiters that nes touchscreen data is available */
 
-              idbg("2:X=%d, Y=%d\n", priv->sample.x, priv->sample.y);
+              iinfo("2:X=%d, Y=%d\n", priv->sample.x, priv->sample.y);
 
               tc_notify(priv);
             }
@@ -1335,14 +1335,14 @@ errout:
 static int tc_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 {
 #if 1
-  ivdbg("cmd: %d arg: %ld\n", cmd, arg);
+  iinfo("cmd: %d arg: %ld\n", cmd, arg);
   return -ENOTTY; /* None yet supported */
 #else
   FAR struct inode *inode;
   FAR struct tc_dev_s *priv;
   int ret;
 
-  ivdbg("cmd: %d arg: %ld\n", cmd, arg);
+  iinfo("cmd: %d arg: %ld\n", cmd, arg);
   DEBUGASSERT(filep);
   inode = filep->f_inode;
 
@@ -1389,7 +1389,7 @@ static int tc_poll(FAR struct file *filep, FAR struct pollfd *fds,
   int                       ret;
   int                       i;
 
-  ivdbg("setup: %d\n", (int)setup);
+  iinfo("setup: %d\n", (int)setup);
   DEBUGASSERT(filep && fds);
   inode = filep->f_inode;
 
@@ -1413,7 +1413,7 @@ static int tc_poll(FAR struct file *filep, FAR struct pollfd *fds,
 
       if ((fds->events & POLLIN) == 0)
         {
-          idbg("Missing POLLIN: revents: %08x\n", fds->revents);
+          ierr("ERROR: Missing POLLIN: revents: %08x\n", fds->revents);
           ret = -EDEADLK;
           goto errout;
         }
@@ -1438,7 +1438,7 @@ static int tc_poll(FAR struct file *filep, FAR struct pollfd *fds,
 
       if (i >= CONFIG_TOUCHSCREEN_NPOLLWAITERS)
         {
-          idbg("No availabled slot found: %d\n", i);
+          ierr("ERROR: No availabled slot found: %d\n", i);
           fds->priv    = NULL;
           ret          = -EBUSY;
           goto errout;
@@ -1501,7 +1501,7 @@ int board_tsc_setup(int minor)
 #endif
   int ret;
 
-  ivdbg("minor: %d\n", minor);
+  iinfo("minor: %d\n", minor);
   DEBUGASSERT(minor >= 0 && minor < 100);
 
   /* If we only have one touchscreen, check if we already did init */
@@ -1533,7 +1533,7 @@ int board_tsc_setup(int minor)
   priv = (FAR struct tc_dev_s *)kmm_malloc(sizeof(struct tc_dev_s));
   if (!priv)
     {
-      idbg("kmm_malloc(%d) failed\n", sizeof(struct tc_dev_s));
+      ierr("ERROR: kmm_malloc(%d) failed\n", sizeof(struct tc_dev_s));
       return -ENOMEM;
     }
 #endif
@@ -1547,12 +1547,12 @@ int board_tsc_setup(int minor)
   /* Register the device as an input device */
 
   (void)snprintf(devname, DEV_NAMELEN, DEV_FORMAT, minor);
-  ivdbg("Registering %s\n", devname);
+  iinfo("Registering %s\n", devname);
 
   ret = register_driver(devname, &tc_fops, 0666, priv);
   if (ret < 0)
     {
-      idbg("register_driver() failed: %d\n", ret);
+      ierr("ERROR: register_driver() failed: %d\n", ret);
       goto errout_with_priv;
     }
 
@@ -1564,7 +1564,7 @@ int board_tsc_setup(int minor)
   ret = work_queue(HPWORK, &priv->work, tc_worker, priv, 0);
   if (ret != 0)
     {
-      idbg("Failed to queue work: %d\n", ret);
+      ierr("ERROR: Failed to queue work: %d\n", ret);
       goto errout_with_priv;
     }
 
diff --git a/configs/mikroe-stm32f4/src/stm32_usb.c b/configs/mikroe-stm32f4/src/stm32_usb.c
index 876fb19d9bcd1ee6dfed786de45e94a0b72167fd..8047a631fd3c14316b00b9faf356aeef6baa58f2 100644
--- a/configs/mikroe-stm32f4/src/stm32_usb.c
+++ b/configs/mikroe-stm32f4/src/stm32_usb.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/mikroe_stm32f4/src/stm32_usb.c
  *
- *   Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012-2013, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -106,13 +106,13 @@ static int usbhost_waiter(int argc, char *argv[])
 {
   struct usbhost_hubport_s *hport;
 
-  uvdbg("Running\n");
+  uinfo("Running\n");
   for (;;)
     {
       /* Wait for the device to change state */
 
       DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
-      uvdbg("%s\n", hport->connected ? "connected" : "disconnected");
+      uinfo("%s\n", hport->connected ? "connected" : "disconnected");
 
       /* Did we just become connected? */
 
@@ -176,7 +176,7 @@ int stm32_usbhost_initialize(void)
    * that we care about:
    */
 
-  uvdbg("Register class drivers\n");
+  uinfo("Register class drivers\n");
 
 #ifdef CONFIG_USBHOST_MSC
   /* Register the USB host Mass Storage Class */
@@ -184,7 +184,7 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_msc_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the mass storage class: %d\n", ret);
+      uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
     }
 #endif
 
@@ -194,19 +194,19 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_cdcacm_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
+      uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
     }
 #endif
 
   /* Then get an instance of the USB host interface */
 
-  uvdbg("Initialize USB host\n");
+  uinfo("Initialize USB host\n");
   g_usbconn = stm32_otgfshost_initialize(0);
   if (g_usbconn)
     {
       /* Start a thread to handle device connection. */
 
-      uvdbg("Start usbhost_waiter\n");
+      uinfo("Start usbhost_waiter\n");
 
       pid = task_create("usbhost", CONFIG_USBHOST_DEFPRIO,
                         CONFIG_USBHOST_STACKSIZE,
@@ -273,16 +273,18 @@ void stm32_usbhost_vbusdrive(int iface, bool enable)
  *
  * Input Parameter:
  *   handler - New overcurrent interrupt handler
+ *   arg     - The argument provided for the interrupt handler
  *
  * Returned value:
- *   Old overcurrent interrupt handler
+ *   Zero (OK) is returned on success.  Otherwise, a negated errno value is returned
+ *   to indicate the nature of the failure.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_USBHOST
-xcpt_t stm32_setup_overcurrent(xcpt_t handler)
+int stm32_setup_overcurrent(xcpt_t handler, void *arg)
 {
-  return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler);
+  return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler, arg);
 }
 #endif
 
@@ -300,7 +302,7 @@ xcpt_t stm32_setup_overcurrent(xcpt_t handler)
 #ifdef CONFIG_USBDEV
 void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
 #endif
 
diff --git a/configs/mikroe-stm32f4/src/stm32_vs1053.c b/configs/mikroe-stm32f4/src/stm32_vs1053.c
index 08e92695129416e313456e49f03618c821c99d01..182c559fa6302c3a09a339ec59adb1acc60c8b70 100644
--- a/configs/mikroe-stm32f4/src/stm32_vs1053.c
+++ b/configs/mikroe-stm32f4/src/stm32_vs1053.c
@@ -78,13 +78,15 @@ struct stm32_lower_s
 {
   const struct vs1053_lower_s lower;    /* Low-level MCU interface */
   xcpt_t                      handler;  /* VS1053 interrupt handler */
+  FAR void                   *arg;      /* Interrupt handler argument */
 };
 
 /****************************************************************************
  * Private Function Prototypes
  ****************************************************************************/
 
-static int  up_attach(FAR const struct vs1053_lower_s *lower, xcpt_t handler);
+static int  up_attach(FAR const struct vs1053_lower_s *lower, xcpt_t handler,
+                      FAR void *arg);
 static void up_enable(FAR const struct vs1053_lower_s *lower);
 static void up_disable(FAR const struct vs1053_lower_s *lower);
 static void up_reset(FAR const struct vs1053_lower_s *lower, bool state);
@@ -110,6 +112,7 @@ static struct stm32_lower_s g_vs1053lower =
     .irq        = GPIO_VS1053_DREQ_IRQ
   },
   .handler      = NULL,
+  .arg          = NULL,
 };
 
 /****************************************************************************
@@ -120,11 +123,13 @@ static struct stm32_lower_s g_vs1053lower =
  * Name: struct vs1053_lower_s methods
  ****************************************************************************/
 
-static int up_attach(FAR const struct vs1053_lower_s *lower, xcpt_t handler)
+static int up_attach(FAR const struct vs1053_lower_s *lower, xcpt_t handler,
+                     FAR void *arg)
 {
   FAR struct stm32_lower_s *priv = (FAR struct stm32_lower_s *)lower;
 
   priv->handler = handler;    /* Save the handler for later */
+  priv->arg     = arg;        /* Along with the handler argument */
   return 0;
 }
 
@@ -133,12 +138,13 @@ static void up_enable(FAR const struct vs1053_lower_s *lower)
   FAR struct stm32_lower_s *priv = (FAR struct stm32_lower_s *)lower;
 
   DEBUGASSERT(priv->handler);
-  (void)stm32_gpiosetevent(GPIO_VS1053_DREQ, true, false, false, priv->handler);
+  (void)stm32_gpiosetevent(GPIO_VS1053_DREQ, true, false, false,
+                           priv->handler, priv->arg);
 }
 
 static void up_disable(FAR const struct vs1053_lower_s *lower)
 {
-  (void)stm32_gpiosetevent(GPIO_VS1053_DREQ, false, false, false, NULL);
+  (void)stm32_gpiosetevent(GPIO_VS1053_DREQ, false, false, false, NULL, NULL);
 }
 
 static void up_reset(FAR const struct vs1053_lower_s *lower, bool state)
@@ -187,7 +193,7 @@ void up_vs1053initialize(FAR struct spi_dev_s* spi)
   pVs1053 = vs1053_initialize(spi, &g_vs1053lower.lower, VS1053_DEVNO);
   if (pVs1053 == NULL)
     {
-      audlldbg("Failed to bind SPI port %d VS1053 device\n", VS1053_DEVNO);
+      auderr("ERROR: Failed to bind SPI port %d VS1053 device\n", VS1053_DEVNO);
       return;
     }
 
@@ -197,10 +203,10 @@ void up_vs1053initialize(FAR struct spi_dev_s* spi)
   ret = audio_register(name, pVs1053);
   if (ret < 0)
     {
-      auddbg("up_vs1053initialize: Failed to register VS1053 Audio device\n");
+      auderr("ERROR: Failed to register VS1053 Audio device\n");
     }
 
-  audllvdbg("Bound SPI port to VS1053 device %s\n", name);
+  audinfo("Bound SPI port to VS1053 device %s\n", name);
 }
 
 #endif /* CONFIG_VS1053 */
diff --git a/configs/mikroe-stm32f4/usbnsh/Make.defs b/configs/mikroe-stm32f4/usbnsh/Make.defs
index 6dbe0a0fa380fedbc0578e836eb2eec31b89cc33..dea26ef117025bbb13305013603c6f05e31b17f9 100644
--- a/configs/mikroe-stm32f4/usbnsh/Make.defs
+++ b/configs/mikroe-stm32f4/usbnsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/mikroe-stm32f4/usbnsh/defconfig b/configs/mikroe-stm32f4/usbnsh/defconfig
index ae0211b6adeb7f3b511d7f16fa497e7a8f562e68..ff9ccbf68e48e31acf0f45d4f2afc7d0320ca385 100644
--- a/configs/mikroe-stm32f4/usbnsh/defconfig
+++ b/configs/mikroe-stm32f4/usbnsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -200,6 +200,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -428,6 +429,12 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 # CONFIG_STM32_FORCEPOWER is not set
 CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -446,9 +453,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -547,9 +562,6 @@ CONFIG_ARCH_BOARD="mikroe-stm32f4"
 #
 # Common Board Options
 #
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Board-Specific Options
@@ -561,13 +573,12 @@ CONFIG_MIKROE_FLASH_PART_LIST="256,768"
 CONFIG_MIKROE_RAMMTD=y
 CONFIG_MIKROE_RAMMTD_MINOR=1
 CONFIG_MIKROE_RAMMTD_SIZE=32
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -584,9 +595,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=1
@@ -681,6 +695,7 @@ CONFIG_DEV_NULL=y
 CONFIG_DEV_ZERO=y
 CONFIG_ARCH_HAVE_RNG=y
 CONFIG_DEV_RANDOM=y
+# CONFIG_DEV_URANDOM is not set
 CONFIG_DEV_LOOP=y
 
 #
@@ -700,9 +715,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -716,14 +736,25 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -760,6 +791,7 @@ CONFIG_RAMMTD_ERASESTATE=0xff
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 CONFIG_MTD_M25P=y
 CONFIG_M25P_SPIMODE=0
 CONFIG_M25P_SPIFREQUENCY=20000000
@@ -788,9 +820,9 @@ CONFIG_MTD_SMART_WEAR_LEVEL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_SERIAL_REMOVABLE=y
+# CONFIG_SERIAL_CONSOLE is not set
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -836,6 +868,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -878,16 +911,23 @@ CONFIG_CDCACM_VENDORSTR="NuttX"
 CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+CONFIG_SYSLOG_CHAR=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+CONFIG_SYSLOG_CHAR_CRLF=y
+CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -935,14 +975,6 @@ CONFIG_SMARTFS_MAXNAMLEN=16
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-CONFIG_SYSLOG_CHAR=y
-CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
-
 #
 # Graphics Support
 #
@@ -1010,7 +1042,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -1019,8 +1050,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1053,19 +1086,19 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FLASH_TEST is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1076,44 +1109,43 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RANDOM is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_FLASH_TEST is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+CONFIG_FSUTILS_FLASH_ERASEALL=y
 # CONFIG_FSUTILS_INIFILE is not set
 CONFIG_FSUTILS_MKSMARTFS=y
 # CONFIG_FSUTILS_PASSWD is not set
@@ -1134,8 +1166,8 @@ CONFIG_FSUTILS_MKSMARTFS=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1201,7 +1233,6 @@ CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MKSMARTFS is not set
 # CONFIG_NSH_DISABLE_MH is not set
@@ -1224,6 +1255,9 @@ CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Configure Command Options
@@ -1264,13 +1298,14 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 CONFIG_SYSTEM_FLASH_ERASEALL=y
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1278,7 +1313,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
-# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/mirtoo/README.txt b/configs/mirtoo/README.txt
index 483e1d50a241d648d5c88afcffebf59bab8b4ed1..d97e6d198cc20b5d08138f044f4128e59d0b8e65 100644
--- a/configs/mirtoo/README.txt
+++ b/configs/mirtoo/README.txt
@@ -592,7 +592,7 @@ Analog Input
   spi = pic32mx_spibus_initialize(2);
   if (!spi)
     {
-      dbg("ERROR: Failed to initialize SPI port 2\n");
+      _err("ERROR: Failed to initialize SPI port 2\n");
       return -ENODEV;
     }
 
@@ -601,7 +601,7 @@ Analog Input
   handle = pga11x_initialize(spi);
   if (!handle)
     {
-      dbg("ERROR: Failed to bind SPI port 2 to the PGA117 driver\n");
+      _err("ERROR: Failed to bind SPI port 2 to the PGA117 driver\n");
       return -ENODEV;
     }
 
@@ -617,7 +617,7 @@ Analog Input
   ret = pga11x_select(handle, &settings);
   if (ret < 0)
     {
-      dbg("ERROR: Failed to select channel 2, gain 2\n");
+      _err("ERROR: Failed to select channel 2, gain 2\n");
       return -EIO;
     }
 
diff --git a/configs/mirtoo/nsh/Make.defs b/configs/mirtoo/nsh/Make.defs
index e7bff768910e11b6bc0bce600ff7fbb3366d2b3a..9bd36ad8f772a26116430d6dbce973fd25341184 100644
--- a/configs/mirtoo/nsh/Make.defs
+++ b/configs/mirtoo/nsh/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/mirtoo/nsh/defconfig b/configs/mirtoo/nsh/defconfig
index 1925e947cf0dbe12bb95506165741b13d8a947ef..9886c4307f198e9f04cd6bbf64d0af7142aa9d61 100644
--- a/configs/mirtoo/nsh/defconfig
+++ b/configs/mirtoo/nsh/defconfig
@@ -41,13 +41,15 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -61,8 +63,7 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 CONFIG_ARCH_MIPS=y
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -267,12 +268,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
@@ -315,6 +318,8 @@ CONFIG_RAM_SIZE=32768
 #
 CONFIG_ARCH_BOARD_MIRTOO=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD_CUSTOM_DIR="configs/dummy"
+CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD="mirtoo"
 
 #
@@ -322,12 +327,12 @@ CONFIG_ARCH_BOARD="mirtoo"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
 CONFIG_MIRTOO_RELEASE=2
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -363,6 +368,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=0
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -413,9 +419,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -446,6 +453,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
@@ -463,17 +471,38 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -497,14 +526,11 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART1_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -521,19 +547,23 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -564,12 +594,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -588,6 +612,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -627,11 +655,13 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -646,14 +676,13 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -661,11 +690,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -673,33 +702,43 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -711,30 +750,28 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -752,6 +789,7 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 CONFIG_NSH_DISABLE_ADDROUTE=y
+CONFIG_NSH_DISABLE_BASENAME=y
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
@@ -760,6 +798,7 @@ CONFIG_NSH_DISABLE_DATE=y
 CONFIG_NSH_DISABLE_DD=y
 CONFIG_NSH_DISABLE_DF=y
 CONFIG_NSH_DISABLE_DELROUTE=y
+CONFIG_NSH_DISABLE_DIRNAME=y
 # CONFIG_NSH_DISABLE_ECHO is not set
 CONFIG_NSH_DISABLE_EXEC=y
 CONFIG_NSH_DISABLE_EXIT=y
@@ -768,8 +807,10 @@ CONFIG_NSH_DISABLE_GET=y
 # CONFIG_NSH_DISABLE_HELP is not set
 CONFIG_NSH_DISABLE_HEXDUMP=y
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 CONFIG_NSH_DISABLE_LOSETUP=y
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -787,12 +828,15 @@ CONFIG_NSH_DISABLE_PUT=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+CONFIG_NSH_DISABLE_TIME=y
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+CONFIG_NSH_DISABLE_UNAME=y
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 CONFIG_NSH_DISABLE_WGET=y
 CONFIG_NSH_DISABLE_XD=y
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -813,6 +857,8 @@ CONFIG_NSH_DISABLE_LOOPS=y
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 # CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -826,15 +872,19 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/mirtoo/nxffs/Make.defs b/configs/mirtoo/nxffs/Make.defs
index 8943e8f1b60a9251684ad19dbd4d3b45bc576f8e..ffffe47aa3be6e094e2688c41853ce3f7ec3aa1e 100644
--- a/configs/mirtoo/nxffs/Make.defs
+++ b/configs/mirtoo/nxffs/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/mirtoo/nxffs/defconfig b/configs/mirtoo/nxffs/defconfig
index 876d762db04e5929d1e8d7958f3b488be4bdd982..c52bf6f0f714eec10df085ac470554f83e8a8d85 100644
--- a/configs/mirtoo/nxffs/defconfig
+++ b/configs/mirtoo/nxffs/defconfig
@@ -41,13 +41,15 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -61,8 +63,7 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 CONFIG_ARCH_MIPS=y
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -272,12 +273,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
@@ -320,6 +323,8 @@ CONFIG_RAM_SIZE=32768
 #
 CONFIG_ARCH_BOARD_MIRTOO=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD_CUSTOM_DIR="configs/dummy"
+CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD="mirtoo"
 
 #
@@ -327,16 +332,15 @@ CONFIG_ARCH_BOARD="mirtoo"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
 CONFIG_MIRTOO_RELEASE=2
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -373,6 +377,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=0
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -410,9 +415,10 @@ CONFIG_NAME_MAX=32
 CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -443,14 +449,20 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
 # CONFIG_SPI_EXCHANGE is not set
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_I2S is not set
 
 #
@@ -464,8 +476,28 @@ CONFIG_SPI=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 CONFIG_MTD=y
 
 #
@@ -474,6 +506,7 @@ CONFIG_MTD=y
 # CONFIG_MTD_PARTITION is not set
 # CONFIG_MTD_SECT512 is not set
 # CONFIG_MTD_BYTE_WRITE is not set
+# CONFIG_MTD_PROGMEM is not set
 # CONFIG_MTD_CONFIG is not set
 
 #
@@ -481,10 +514,14 @@ CONFIG_MTD=y
 #
 # CONFIG_MTD_NAND is not set
 # CONFIG_RAMMTD is not set
+# CONFIG_FILEMTD is not set
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 CONFIG_MTD_SST25=y
@@ -495,6 +532,7 @@ CONFIG_SST25_SPIFREQUENCY=20000000
 # CONFIG_SST25_SLOWWRITE is not set
 # CONFIG_SST25_SLOWREAD is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -502,9 +540,10 @@ CONFIG_SST25_SPIFREQUENCY=20000000
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -528,14 +567,11 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART1_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -552,19 +588,23 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -601,16 +641,11 @@ CONFIG_NXFFS_PACKTHRESHOLD=32
 CONFIG_NXFFS_MAXNAMLEN=255
 CONFIG_NXFFS_TAILTHRESHOLD=8192
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -629,6 +664,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -673,11 +712,14 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -692,26 +734,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -719,33 +761,46 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -758,30 +813,28 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -800,6 +853,7 @@ CONFIG_NSH_DISABLEBG=y
 # Disable Individual commands
 #
 CONFIG_NSH_DISABLE_ADDROUTE=y
+CONFIG_NSH_DISABLE_BASENAME=y
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
@@ -808,6 +862,7 @@ CONFIG_NSH_DISABLE_DATE=y
 CONFIG_NSH_DISABLE_DD=y
 CONFIG_NSH_DISABLE_DF=y
 CONFIG_NSH_DISABLE_DELROUTE=y
+CONFIG_NSH_DISABLE_DIRNAME=y
 # CONFIG_NSH_DISABLE_ECHO is not set
 CONFIG_NSH_DISABLE_EXEC=y
 CONFIG_NSH_DISABLE_EXIT=y
@@ -816,8 +871,10 @@ CONFIG_NSH_DISABLE_GET=y
 # CONFIG_NSH_DISABLE_HELP is not set
 CONFIG_NSH_DISABLE_HEXDUMP=y
 CONFIG_NSH_DISABLE_IFCONFIG=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 CONFIG_NSH_DISABLE_KILL=y
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -835,12 +892,15 @@ CONFIG_NSH_DISABLE_PUT=y
 # CONFIG_NSH_DISABLE_SET is not set
 CONFIG_NSH_DISABLE_SH=y
 # CONFIG_NSH_DISABLE_SLEEP is not set
+CONFIG_NSH_DISABLE_TIME=y
 CONFIG_NSH_DISABLE_TEST=y
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+CONFIG_NSH_DISABLE_UNAME=y
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 CONFIG_NSH_DISABLE_WGET=y
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -859,6 +919,8 @@ CONFIG_NSH_DISABLESCRIPT=y
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -872,15 +934,19 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/mirtoo/src/pic32_appinit.c b/configs/mirtoo/src/pic32_appinit.c
index 9fad1495bfaba1068ff136f5e32cb5b86f862a26..2cf57476dd46ddfc9a4398291aa3170a727700c8 100644
--- a/configs/mirtoo/src/pic32_appinit.c
+++ b/configs/mirtoo/src/pic32_appinit.c
@@ -125,7 +125,7 @@ int board_app_initialize(uintptr_t arg)
   spi = pic32mx_spibus_initialize(2);
   if (!spi)
     {
-      fdbg("ERROR: Failed to initialize SPI port 2\n");
+      ferr("ERROR: Failed to initialize SPI port 2\n");
       return -ENODEV;
     }
 
@@ -134,7 +134,7 @@ int board_app_initialize(uintptr_t arg)
   mtd = sst25_initialize(spi);
   if (!mtd)
     {
-      fdbg("ERROR: Failed to bind SPI port 2 to the SST 25 FLASH driver\n");
+      ferr("ERROR: Failed to bind SPI port 2 to the SST 25 FLASH driver\n");
       return -ENODEV;
     }
 
@@ -144,7 +144,7 @@ int board_app_initialize(uintptr_t arg)
   ret = ftl_initialize(CONFIG_NSH_MMCSDMINOR, mtd);
   if (ret < 0)
     {
-      fdbg("ERROR: Initialize the FTL layer\n");
+      ferr("ERROR: Initialize the FTL layer\n");
       return ret;
     }
 #else
@@ -153,7 +153,7 @@ int board_app_initialize(uintptr_t arg)
   ret = nxffs_initialize(mtd);
   if (ret < 0)
     {
-      fdbg("ERROR: NXFFS initialization failed: %d\n", -ret);
+      ferr("ERROR: NXFFS initialization failed: %d\n", -ret);
       return ret;
     }
 
@@ -162,7 +162,7 @@ int board_app_initialize(uintptr_t arg)
   ret = mount(NULL, "/mnt/sst25", "nxffs", 0, NULL);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
+      ferr("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
       return ret;
     }
 #endif
diff --git a/configs/mirtoo/src/pic32_leds.c b/configs/mirtoo/src/pic32_leds.c
index 97fe553ab6f13ef75adf1488df17f5a49cb50eac..e1c89178edde2df928526df9b0d4550e9b62494b 100644
--- a/configs/mirtoo/src/pic32_leds.c
+++ b/configs/mirtoo/src/pic32_leds.c
@@ -91,22 +91,6 @@
 #  define LED_NC  2
 #endif
 
-/* Debug ********************************************************************/
-
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_LEDS)
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  undef CONFIG_DEBUG_LEDS
-#  undef CONFIG_DEBUG_VERBOSE
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private types
  ****************************************************************************/
diff --git a/configs/mirtoo/src/pic32_spi2.c b/configs/mirtoo/src/pic32_spi2.c
index 682ebfc88ef1ba23d104d68e1bf12a6d607b43a3..3c1d513b833042831fca384907cb3f7b5099764f 100644
--- a/configs/mirtoo/src/pic32_spi2.c
+++ b/configs/mirtoo/src/pic32_spi2.c
@@ -92,23 +92,6 @@
 #define GPIO_PGA117_CS      (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTB|GPIO_PIN7)
 #define GPIO_SST25VF032B_CS (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTB|GPIO_PIN13)
 
-/* The following enable debug output from this file (needs CONFIG_DEBUG too).
- *
- * CONFIG_DEBUG_SPI - Define to enable basic SPI debug
- */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  define spivdbg llvdbg
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -175,7 +158,7 @@ enum spi_dev_e;
 
 void  pic32mx_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
   if (devid == SPIDEV_FLASH)
     {
diff --git a/configs/compal_e86/Kconfig b/configs/misoc/Kconfig
similarity index 100%
rename from configs/compal_e86/Kconfig
rename to configs/misoc/Kconfig
diff --git a/configs/misoc/README.txt b/configs/misoc/README.txt
new file mode 100644
index 0000000000000000000000000000000000000000..a241aba6b6a741e1f1a621fb1563f518fc2e9260
--- /dev/null
+++ b/configs/misoc/README.txt
@@ -0,0 +1,81 @@
+Misoc README
+============
+
+  This README applies to a port to NuttX running on a Qemu LM32 system.  You
+  can find the Qemu setup at https://bitbucket.org/key2/qemu
+
+  This initial release supports two UARTs, but does not have a system timer
+  or other peripherals.  More to come.
+
+Buildroot Toolchain
+===================
+
+  A GNU GCC-based toolchain is assumed.  The files */setenv.sh should
+  be modified to point to the correct path to the LM32 GCC toolchain (if
+  different from the default in your PATH variable).
+
+  If you have no LM32 toolchain, one can be cloned from the NuttX
+  Bitbucket GIT repository (https://bitbucket.org/nuttx/buildroot).
+  This GNU toolchain builds and executes in the Linux or Cygwin environment.
+
+  1. You must have already configured Nuttx in /nuttx.
+
+     cd tools
+     ./configure.sh misoc/
+     make oldconfig context
+
+  2. Clone the latest buildroot package into /buildroot
+
+       git clone git@bitbucket.org:nuttx/buildroot.git /buildroot
+
+     or
+
+       git clone https://patacongo@bitbucket.org/nuttx/buildroot.git /buildroot
+
+  3. cd /buildroot
+
+  4. cp lm32-elf-defconfig-6.1.0 .config
+
+  5. make oldconfig
+
+  6. make
+
+  7. By default, the tools will be at the absolute path:
+
+       /buildroot/build_lm32/staging_dir/bin
+
+     Or the NuttX relative path:
+
+       ../buildroot/build_lm32/staging_dir/bin
+
+     The setenv.sh files in these sub-directories are already set to use
+     the relative path.  It you choose to install the buildroot package
+     in some other location, you may need to edit the setenv.h file so
+     that the PATH variable includes the path to the newly built binaries.
+
+  See the file configs/README.txt in the buildroot source tree.  That has more
+  detailed PLUS some special instructions that you will need to follow if you
+  are building a LM32 toolchain for Cygwin under Windows.  Also included in
+  that README file is a FAQ of frequent build issues that their work-arounds.
+
+  In order to use the buildroot toolchain, you also must set the following
+  in your .config file:
+
+    CONFIG_LM3S_TOOLCHAIN_BUILDROOT=y
+
+configs/misoc/include/generated
+===============================
+
+  In order to build this configuration, you must provide the
+  configs/misoc/include/generated directory.  It contains the generated
+  Misoc files and may be a symbolic link.  The base configurtion will NOT
+  build without this directory!
+
+  There is a sample generated directory at configs/misoc/include/generated-sample.
+  If you want to do a test build without generating the architecture, then
+  you can simply link this sample directory like:
+
+    $ ln -s configs/misoc/include/generated-sample configs/misoc/include/generated
+
+  That should permit a test build.
+
diff --git a/configs/misoc/hello/Make.defs b/configs/misoc/hello/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..f82c1cb2232a34dc15c81fba7913d01402d991f1
--- /dev/null
+++ b/configs/misoc/hello/Make.defs
@@ -0,0 +1,101 @@
+############################################################################
+# configs/misoc/hello/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#           Ramtin Amin 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/misoc/src/lm32/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = $(ARCHINCLUDES) "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem "$(TOPDIR)/include"
+  ARCHXXINCLUDES =  $(ARCHINCLUDES) -isystem "$(TOPDIR)/include/cxx"
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD_CUSTOM_NAME)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
diff --git a/configs/misoc/hello/defconfig b/configs/misoc/hello/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..ca3ee7ed634c6cb7b1efee055b7275161de7ede1
--- /dev/null
+++ b/configs/misoc/hello/defconfig
@@ -0,0 +1,1038 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+# CONFIG_INTELHEX_BINARY is not set
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+CONFIG_DEBUG_FEATURES=y
+
+#
+# Debug SYSLOG Output Controls
+#
+# CONFIG_DEBUG_ERROR is not set
+# CONFIG_DEBUG_ASSERTIONS is not set
+
+#
+# Subsystem Debug Options
+#
+# CONFIG_DEBUG_BINFMT is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_GRAPHICS is not set
+# CONFIG_DEBUG_LIB is not set
+# CONFIG_DEBUG_MM is not set
+# CONFIG_DEBUG_NET is not set
+# CONFIG_DEBUG_SCHED is not set
+
+#
+# OS Function Debug Options
+#
+# CONFIG_DEBUG_IRQ is not set
+
+#
+# Driver Debug Options
+#
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_TIMER is not set
+# CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+CONFIG_DEBUG_NOOPT=y
+# CONFIG_DEBUG_CUSTOMOPT is not set
+# CONFIG_DEBUG_FULLOPT is not set
+
+#
+# System Type
+#
+# CONFIG_ARCH_ARM is not set
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+CONFIG_ARCH_MISOC=y
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="misoc"
+CONFIG_ARCH_CHIP="lm32"
+CONFIG_ARCH_CHIP_LM32=y
+# CONFIG_ARCH_CHIP_MOR1K is not set
+
+#
+# MISOC Peripheral Support
+#
+CONFIG_MISOC_HAVE_UART1=y
+CONFIG_MISOC_UART1=y
+CONFIG_MISOC_ETHERNET=y
+CONFIG_MISOC_UART=y
+CONFIG_MISOC_UART_RX_BUF_SIZE=64
+CONFIG_MISOC_UART_TX_BUF_SIZE=64
+# CONFIG_LM32_TOOLCHAIN_BUILDROOT is not set
+CONFIG_LM32_TOOLCHAIN_GNUL=y
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+# CONFIG_ARCH_HAVE_IRQPRIO is not set
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+# CONFIG_ARCH_HAVE_VFORK is not set
+# CONFIG_ARCH_HAVE_MMU is not set
+# CONFIG_ARCH_HAVE_MPU is not set
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_ENDIAN_BIG=y
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+# CONFIG_ARCH_HAVE_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=800
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x40000000
+CONFIG_RAM_SIZE=67108864
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_CUSTOM=y
+
+#
+# Custom Board Configuration
+#
+CONFIG_ARCH_BOARD_CUSTOM_NAME="misoc"
+CONFIG_ARCH_BOARD_CUSTOM_DIR="/configs/misoc/"
+CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
+# CONFIG_BOARD_CUSTOM_LEDS is not set
+# CONFIG_BOARD_CUSTOM_BUTTONS is not set
+# CONFIG_BOARD_CUSTOM_INTERRUPT is not set
+
+#
+# Common Board Options
+#
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+# CONFIG_LIB_BOARDCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=6
+CONFIG_START_DAY=16
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=8
+CONFIG_WDOG_INTRESERVE=1
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=4
+CONFIG_NFILE_STREAMS=4
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=32
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+# CONFIG_ARCH_HAVE_I2CRESET is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+CONFIG_NETDEVICES=y
+
+#
+# General Ethernet MAC Driver Options
+#
+# CONFIG_NETDEV_LOOPBACK is not set
+CONFIG_NETDEV_TELNET=y
+CONFIG_TELNET_RXBUFFER_SIZE=256
+CONFIG_TELNET_TXBUFFER_SIZE=256
+# CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
+# CONFIG_NETDEV_LATEINIT is not set
+# CONFIG_NET_DUMPPACKET is not set
+
+#
+# External Ethernet MAC Device Support
+#
+# CONFIG_NET_DM90x0 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ENCX24J600 is not set
+# CONFIG_NET_SLIP is not set
+# CONFIG_NET_FTMAC100 is not set
+
+#
+# External Ethernet PHY Device Support
+#
+# CONFIG_ARCH_PHY_INTERRUPT is not set
+CONFIG_ETH0_PHY_NONE=y
+# CONFIG_ETH0_PHY_AM79C874 is not set
+# CONFIG_ETH0_PHY_KS8721 is not set
+# CONFIG_ETH0_PHY_KSZ8041 is not set
+# CONFIG_ETH0_PHY_KSZ8051 is not set
+# CONFIG_ETH0_PHY_KSZ8061 is not set
+# CONFIG_ETH0_PHY_KSZ8081 is not set
+# CONFIG_ETH0_PHY_KSZ90x1 is not set
+# CONFIG_ETH0_PHY_DP83848C is not set
+# CONFIG_ETH0_PHY_LAN8720 is not set
+# CONFIG_ETH0_PHY_LAN8740 is not set
+# CONFIG_ETH0_PHY_LAN8740A is not set
+# CONFIG_ETH0_PHY_LAN8742A is not set
+# CONFIG_ETH0_PHY_DM9161 is not set
+# CONFIG_NETDEV_PHY_DEBUG is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+# CONFIG_STANDARD_SERIAL is not set
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+CONFIG_UART1_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# UART1 Configuration
+#
+CONFIG_UART1_RXBUFSIZE=256
+CONFIG_UART1_TXBUFSIZE=256
+CONFIG_UART1_BAUD=115200
+CONFIG_UART1_BITS=8
+CONFIG_UART1_PARITY=0
+CONFIG_UART1_2STOP=0
+# CONFIG_UART1_IFLOWCONTROL is not set
+# CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+CONFIG_ARCH_HAVE_NET=y
+CONFIG_ARCH_HAVE_PHY=y
+CONFIG_NET=y
+# CONFIG_NET_PROMISCUOUS is not set
+
+#
+# Driver buffer configuration
+#
+CONFIG_NET_ETH_MTU=1400
+CONFIG_NET_ETH_TCP_RECVWNDO=742
+CONFIG_NET_GUARDSIZE=648
+
+#
+# Data link support
+#
+# CONFIG_NET_MULTILINK is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
+# CONFIG_NET_TUN is not set
+
+#
+# Network Device Operations
+#
+# CONFIG_NETDEV_PHY_IOCTL is not set
+
+#
+# Internet Protocol Selection
+#
+CONFIG_NET_IPv4=y
+# CONFIG_NET_IPv6 is not set
+
+#
+# Socket Support
+#
+CONFIG_NSOCKET_DESCRIPTORS=8
+CONFIG_NET_NACTIVESOCKETS=16
+CONFIG_NET_SOCKOPTS=y
+# CONFIG_NET_SOLINGER is not set
+
+#
+# Raw Socket Support
+#
+# CONFIG_NET_PKT is not set
+
+#
+# TCP/IP Networking
+#
+CONFIG_NET_TCP=y
+# CONFIG_NET_TCPURGDATA is not set
+CONFIG_NET_TCP_CONNS=40
+CONFIG_NET_MAX_LISTENPORTS=40
+CONFIG_NET_TCP_READAHEAD=y
+CONFIG_NET_TCP_WRITE_BUFFERS=y
+CONFIG_NET_TCP_NWRBCHAINS=8
+# CONFIG_NET_TCP_WRBUFFER_DEBUG is not set
+CONFIG_NET_TCP_RECVDELAY=0
+# CONFIG_NET_TCPBACKLOG is not set
+# CONFIG_NET_SENDFILE is not set
+
+#
+# UDP Networking
+#
+CONFIG_NET_UDP=y
+CONFIG_NET_UDP_CHECKSUMS=y
+CONFIG_NET_UDP_CONNS=8
+CONFIG_NET_BROADCAST=y
+# CONFIG_NET_RXAVAIL is not set
+CONFIG_NET_UDP_READAHEAD=y
+
+#
+# ICMP Networking Support
+#
+CONFIG_NET_ICMP=y
+CONFIG_NET_ICMP_PING=y
+
+#
+# IGMPv2 Client Support
+#
+# CONFIG_NET_IGMP is not set
+
+#
+# ARP Configuration
+#
+CONFIG_NET_ARP=y
+CONFIG_NET_ARPTAB_SIZE=16
+CONFIG_NET_ARP_MAXAGE=120
+CONFIG_NET_ARP_IPIN=y
+CONFIG_NET_ARP_SEND=y
+CONFIG_ARP_SEND_MAXTRIES=5
+CONFIG_ARP_SEND_DELAYMSEC=20
+
+#
+# Network I/O Buffer Support
+#
+CONFIG_NET_IOB=y
+CONFIG_IOB_NBUFFERS=24
+CONFIG_IOB_BUFSIZE=196
+CONFIG_IOB_NCHAINS=8
+CONFIG_IOB_THROTTLE=8
+# CONFIG_IOB_DEBUG is not set
+# CONFIG_NET_ARCH_INCR32 is not set
+# CONFIG_NET_ARCH_CHKSUM is not set
+# CONFIG_NET_STATISTICS is not set
+
+#
+# Routing Table Configuration
+#
+# CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME="nuttx"
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+CONFIG_DISABLE_MOUNTPOINT=y
+CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
+# CONFIG_FS_READABLE is not set
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_ARCH_HAVE_TLS is not set
+CONFIG_LIBC_NETDB=y
+CONFIG_NETDB_DNSCLIENT=y
+CONFIG_NETDB_DNSCLIENT_ENTRIES=8
+CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
+CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
+CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_DNSSERVER_NOADDR is not set
+CONFIG_NETDB_DNSSERVER_IPv4=y
+CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x08080808
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+# CONFIG_HAVE_CXXINITIALIZE is not set
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+CONFIG_EXAMPLES_HELLO=y
+CONFIG_EXAMPLES_HELLO_PRIORITY=100
+CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+CONFIG_EXAMPLES_NETTEST=y
+# CONFIG_EXAMPLES_NETTEST_SERVER is not set
+CONFIG_EXAMPLES_NETTEST_PERFORMANCE=y
+CONFIG_EXAMPLES_NETTEST_IPv4=y
+CONFIG_EXAMPLES_NETTEST_INIT=y
+CONFIG_EXAMPLES_NETTEST_NOMAC=y
+
+#
+# IPv4 addresses
+#
+CONFIG_EXAMPLES_NETTEST_IPADDR=0xc0a80132
+CONFIG_EXAMPLES_NETTEST_DRIPADDR=0xc0a80101
+CONFIG_EXAMPLES_NETTEST_NETMASK=0xffffff00
+CONFIG_EXAMPLES_NETTEST_CLIENTIP=0xc0a8023b
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+CONFIG_EXAMPLES_OSTEST=y
+CONFIG_EXAMPLES_OSTEST_LOOPS=1
+CONFIG_EXAMPLES_OSTEST_STACKSIZE=8192
+CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=8
+CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000
+CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
+CONFIG_EXAMPLES_OSTEST_WAITRESULT=y
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+CONFIG_EXAMPLES_TCPECHO=y
+CONFIG_EXAMPLES_TCPECHO_PORT=80
+CONFIG_EXAMPLES_TCPECHO_BACKLOG=8
+CONFIG_EXAMPLES_TCPECHO_NCONN=8
+CONFIG_EXAMPLES_TELNETD=y
+CONFIG_EXAMPLES_TELNETD_NOMAC=y
+CONFIG_EXAMPLES_TELNETD_IPADDR=0xc0a80132
+CONFIG_EXAMPLES_TELNETD_DRIPADDR=0xc0a80101
+CONFIG_EXAMPLES_TELNETD_NETMASK=0xffffff00
+CONFIG_EXAMPLES_TELNETD_DAEMONPRIO=100
+CONFIG_EXAMPLES_TELNETD_DAEMONSTACKSIZE=2048
+CONFIG_EXAMPLES_TELNETD_CLIENTPRIO=100
+CONFIG_EXAMPLES_TELNETD_CLIENTSTACKSIZE=2048
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_UDP is not set
+# CONFIG_EXAMPLES_UDPBLASTER is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_XMLRPC is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+CONFIG_NETUTILS_DHCPC=y
+# CONFIG_NETUTILS_DHCPD is not set
+CONFIG_NETUTILS_DISCOVER=y
+CONFIG_DISCOVER_STACK_SIZE=1024
+CONFIG_DISCOVER_PRIORITY=50
+CONFIG_DISCOVER_PORT=96
+CONFIG_DISCOVER_INTERFACE="eth0"
+CONFIG_DISCOVER_DEVICE_CLASS=0xff
+CONFIG_DISCOVER_DESCR="NuttX"
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_FTPD is not set
+# CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
+# CONFIG_NETUTILS_SMTP is not set
+CONFIG_NETUTILS_TELNETD=y
+# CONFIG_NETUTILS_TFTPC is not set
+CONFIG_NETUTILS_WEBCLIENT=y
+CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
+CONFIG_WEBCLIENT_TIMEOUT=10
+# CONFIG_NETUTILS_WEBSERVER is not set
+# CONFIG_NETUTILS_XMLRPC is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+# CONFIG_NSH_READLINE is not set
+CONFIG_NSH_CLE=y
+CONFIG_NSH_LINELEN=80
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+CONFIG_NSH_DISABLE_IFCONFIG=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+# CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+CONFIG_NSH_DISABLE_PS=y
+# CONFIG_NSH_DISABLE_PING is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CMDOPT_DF_H=y
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_FILEIOSIZE=1024
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+# CONFIG_NSH_ARCHINIT is not set
+
+#
+# Networking Configuration
+#
+CONFIG_NSH_NETINIT=y
+CONFIG_NSH_NETINIT_THREAD=y
+CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568
+CONFIG_NSH_NETINIT_THREAD_PRIORITY=80
+CONFIG_NSH_NETINIT_DEBUG=y
+
+#
+# IP Address Configuration
+#
+# CONFIG_NSH_DHCPC is not set
+
+#
+# IPv4 Addresses
+#
+CONFIG_NSH_IPADDR=0xc0a80132
+CONFIG_NSH_DRIPADDR=0xc0a80101
+CONFIG_NSH_NETMASK=0xffffff00
+# CONFIG_NSH_DNS is not set
+CONFIG_NSH_NOMAC=y
+CONFIG_NSH_SWMAC=y
+CONFIG_NSH_MACADDR=0x00e0deadbeef
+CONFIG_NSH_MAX_ROUNDTRIP=20
+
+#
+# Telnet Configuration
+#
+# CONFIG_NSH_TELNET is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+CONFIG_SYSTEM_CLE=y
+CONFIG_SYSTEM_CLE_DEBUGLEVEL=0
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_NETDB is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/compal_e99/nsh_highram/setenv.sh b/configs/misoc/hello/setenv.sh
old mode 100755
new mode 100644
similarity index 78%
rename from configs/compal_e99/nsh_highram/setenv.sh
rename to configs/misoc/hello/setenv.sh
index 16a2fe30fa842bb35b3a985e57bb4947ca1ec31f..9b84648e5cb396fa940946e87b79e6cb5dc6e4c1
--- a/configs/compal_e99/nsh_highram/setenv.sh
+++ b/configs/misoc/hello/setenv.sh
@@ -1,8 +1,9 @@
 #!/bin/bash
-# c5471evm/nsh/setenv.sh
+# configs/misoc/hello/setenv.sh
 #
-#   Copyright (C) 2007, 2008, 2011 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
+#           Ramtin Amin 
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions
@@ -47,15 +48,9 @@ if [ -z "${PATH_ORIG}" ]; then
   export PATH_ORIG="${PATH}"
 fi
 
-# This is the Cygwin path to the location where I installed the CodeSourcery
-# toolchain under windows.  You will also have to edit this if you install
-# the CodeSourcery toolchain in any other location
-# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
-# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
-
 # This is the Cygwin path to the location where I build the buildroot
 # toolchain.
-export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+export TOOLCHAIN_BIN="${WD}/../buildroot/build_lm32/staging_dir/bin"
 
 # Add the path to the toolchain to the PATH varialble
 export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
diff --git a/configs/misoc/include/.gitignore b/configs/misoc/include/.gitignore
new file mode 100644
index 0000000000000000000000000000000000000000..e324eac91fcfd938429689afbe359bc9fcfcc913
--- /dev/null
+++ b/configs/misoc/include/.gitignore
@@ -0,0 +1 @@
+/generated
diff --git a/configs/misoc/include/board.h b/configs/misoc/include/board.h
new file mode 100644
index 0000000000000000000000000000000000000000..8db2fcc7cf3d788e12cdbba2df1196bc05eb8926
--- /dev/null
+++ b/configs/misoc/include/board.h
@@ -0,0 +1,100 @@
+/****************************************************************************
+ * configs/misoc/include/board.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __CONFIGS_AMBER_INCLUDE_BOARD_H
+#define __CONFIGS_AMBER_INCLUDE_BOARD_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Clocking *****************************************************************/
+/* Assume default CLKDIV8 fuse setting is overridden to CLKDIV1 */
+
+#define BOARD_XTAL_FREQ        14745600         /* 14.7456MHz crystal */
+#define BOARD_CPU_CLOCK        BOARD_XTAL_FREQ  /* F_CPU = 14.7456MHz */
+#define BOARD_TOSCK_CLOCK      32768            /* TOSC  = 32.768KHz */
+
+/* LED definitions **********************************************************/
+/* The Amber Web Server has a reset switch and four LEDs. The LEDs indicate
+ * the status of power, programming state, Ethernet link status and reset
+ * status (Active).  None are available for software use.
+ */
+
+#define LED_STARTED            0
+#define LED_HEAPALLOCATE       1
+#define LED_IRQSENABLED        2
+#define LED_STACKCREATED       3
+#define LED_INIRQ              4
+#define LED_SIGNAL             5
+#define LED_ASSERTION          6
+#define LED_PANIC              7
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Inline Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __CONFIGS_AMBER_INCLUDE_BOARD_H */
diff --git a/configs/misoc/include/generated-sample/csr.h b/configs/misoc/include/generated-sample/csr.h
new file mode 100644
index 0000000000000000000000000000000000000000..e58b0e0bf4fe1c6b73dc52ea0c32fa293d4b3b00
--- /dev/null
+++ b/configs/misoc/include/generated-sample/csr.h
@@ -0,0 +1,653 @@
+#ifndef __GENERATED_CSR_H
+#define __GENERATED_CSR_H
+#include 
+
+/* ddrphy */
+#define CSR_DDRPHY_BASE 0xe0008800
+#define CSR_DDRPHY_DLY_SEL_ADDR 0xe0008800
+#define CSR_DDRPHY_DLY_SEL_SIZE 1
+static inline unsigned char ddrphy_dly_sel_read(void) {
+	unsigned char r = MMPTR(0xe0008800);
+	return r;
+}
+static inline void ddrphy_dly_sel_write(unsigned char value) {
+	MMPTR(0xe0008800) = value;
+}
+#define CSR_DDRPHY_RDLY_DQ_RST_ADDR 0xe0008804
+#define CSR_DDRPHY_RDLY_DQ_RST_SIZE 1
+static inline unsigned char ddrphy_rdly_dq_rst_read(void) {
+	unsigned char r = MMPTR(0xe0008804);
+	return r;
+}
+static inline void ddrphy_rdly_dq_rst_write(unsigned char value) {
+	MMPTR(0xe0008804) = value;
+}
+#define CSR_DDRPHY_RDLY_DQ_INC_ADDR 0xe0008808
+#define CSR_DDRPHY_RDLY_DQ_INC_SIZE 1
+static inline unsigned char ddrphy_rdly_dq_inc_read(void) {
+	unsigned char r = MMPTR(0xe0008808);
+	return r;
+}
+static inline void ddrphy_rdly_dq_inc_write(unsigned char value) {
+	MMPTR(0xe0008808) = value;
+}
+#define CSR_DDRPHY_RDLY_DQ_BITSLIP_ADDR 0xe000880c
+#define CSR_DDRPHY_RDLY_DQ_BITSLIP_SIZE 1
+static inline unsigned char ddrphy_rdly_dq_bitslip_read(void) {
+	unsigned char r = MMPTR(0xe000880c);
+	return r;
+}
+static inline void ddrphy_rdly_dq_bitslip_write(unsigned char value) {
+	MMPTR(0xe000880c) = value;
+}
+
+/* ethmac */
+#define CSR_ETHMAC_BASE 0xe000f800
+#define CSR_ETHMAC_SRAM_WRITER_SLOT_ADDR 0xe000f800
+#define CSR_ETHMAC_SRAM_WRITER_SLOT_SIZE 1
+static inline unsigned char ethmac_sram_writer_slot_read(void) {
+	unsigned char r = MMPTR(0xe000f800);
+	return r;
+}
+#define CSR_ETHMAC_SRAM_WRITER_LENGTH_ADDR 0xe000f804
+#define CSR_ETHMAC_SRAM_WRITER_LENGTH_SIZE 4
+static inline unsigned int ethmac_sram_writer_length_read(void) {
+	unsigned int r = MMPTR(0xe000f804);
+	r <<= 8;
+	r |= MMPTR(0xe000f808);
+	r <<= 8;
+	r |= MMPTR(0xe000f80c);
+	r <<= 8;
+	r |= MMPTR(0xe000f810);
+	return r;
+}
+#define CSR_ETHMAC_SRAM_WRITER_EV_STATUS_ADDR 0xe000f814
+#define CSR_ETHMAC_SRAM_WRITER_EV_STATUS_SIZE 1
+static inline unsigned char ethmac_sram_writer_ev_status_read(void) {
+	unsigned char r = MMPTR(0xe000f814);
+	return r;
+}
+static inline void ethmac_sram_writer_ev_status_write(unsigned char value) {
+	MMPTR(0xe000f814) = value;
+}
+#define CSR_ETHMAC_SRAM_WRITER_EV_PENDING_ADDR 0xe000f818
+#define CSR_ETHMAC_SRAM_WRITER_EV_PENDING_SIZE 1
+static inline unsigned char ethmac_sram_writer_ev_pending_read(void) {
+	unsigned char r = MMPTR(0xe000f818);
+	return r;
+}
+static inline void ethmac_sram_writer_ev_pending_write(unsigned char value) {
+	MMPTR(0xe000f818) = value;
+}
+#define CSR_ETHMAC_SRAM_WRITER_EV_ENABLE_ADDR 0xe000f81c
+#define CSR_ETHMAC_SRAM_WRITER_EV_ENABLE_SIZE 1
+static inline unsigned char ethmac_sram_writer_ev_enable_read(void) {
+	unsigned char r = MMPTR(0xe000f81c);
+	return r;
+}
+static inline void ethmac_sram_writer_ev_enable_write(unsigned char value) {
+	MMPTR(0xe000f81c) = value;
+}
+#define CSR_ETHMAC_SRAM_READER_START_ADDR 0xe000f820
+#define CSR_ETHMAC_SRAM_READER_START_SIZE 1
+static inline unsigned char ethmac_sram_reader_start_read(void) {
+	unsigned char r = MMPTR(0xe000f820);
+	return r;
+}
+static inline void ethmac_sram_reader_start_write(unsigned char value) {
+	MMPTR(0xe000f820) = value;
+}
+#define CSR_ETHMAC_SRAM_READER_READY_ADDR 0xe000f824
+#define CSR_ETHMAC_SRAM_READER_READY_SIZE 1
+static inline unsigned char ethmac_sram_reader_ready_read(void) {
+	unsigned char r = MMPTR(0xe000f824);
+	return r;
+}
+#define CSR_ETHMAC_SRAM_READER_SLOT_ADDR 0xe000f828
+#define CSR_ETHMAC_SRAM_READER_SLOT_SIZE 1
+static inline unsigned char ethmac_sram_reader_slot_read(void) {
+	unsigned char r = MMPTR(0xe000f828);
+	return r;
+}
+static inline void ethmac_sram_reader_slot_write(unsigned char value) {
+	MMPTR(0xe000f828) = value;
+}
+#define CSR_ETHMAC_SRAM_READER_LENGTH_ADDR 0xe000f82c
+#define CSR_ETHMAC_SRAM_READER_LENGTH_SIZE 2
+static inline unsigned short int ethmac_sram_reader_length_read(void) {
+	unsigned short int r = MMPTR(0xe000f82c);
+	r <<= 8;
+	r |= MMPTR(0xe000f830);
+	return r;
+}
+static inline void ethmac_sram_reader_length_write(unsigned short int value) {
+	MMPTR(0xe000f82c) = value >> 8;
+	MMPTR(0xe000f830) = value;
+}
+#define CSR_ETHMAC_SRAM_READER_EV_STATUS_ADDR 0xe000f834
+#define CSR_ETHMAC_SRAM_READER_EV_STATUS_SIZE 1
+static inline unsigned char ethmac_sram_reader_ev_status_read(void) {
+	unsigned char r = MMPTR(0xe000f834);
+	return r;
+}
+static inline void ethmac_sram_reader_ev_status_write(unsigned char value) {
+	MMPTR(0xe000f834) = value;
+}
+#define CSR_ETHMAC_SRAM_READER_EV_PENDING_ADDR 0xe000f838
+#define CSR_ETHMAC_SRAM_READER_EV_PENDING_SIZE 1
+static inline unsigned char ethmac_sram_reader_ev_pending_read(void) {
+	unsigned char r = MMPTR(0xe000f838);
+	return r;
+}
+static inline void ethmac_sram_reader_ev_pending_write(unsigned char value) {
+	MMPTR(0xe000f838) = value;
+}
+#define CSR_ETHMAC_SRAM_READER_EV_ENABLE_ADDR 0xe000f83c
+#define CSR_ETHMAC_SRAM_READER_EV_ENABLE_SIZE 1
+static inline unsigned char ethmac_sram_reader_ev_enable_read(void) {
+	unsigned char r = MMPTR(0xe000f83c);
+	return r;
+}
+static inline void ethmac_sram_reader_ev_enable_write(unsigned char value) {
+	MMPTR(0xe000f83c) = value;
+}
+#define CSR_ETHMAC_PREAMBLE_CRC_ADDR 0xe000f840
+#define CSR_ETHMAC_PREAMBLE_CRC_SIZE 1
+static inline unsigned char ethmac_preamble_crc_read(void) {
+	unsigned char r = MMPTR(0xe000f840);
+	return r;
+}
+
+/* ethphy */
+#define CSR_ETHPHY_BASE 0xe000f000
+#define CSR_ETHPHY_CRG_RESET_ADDR 0xe000f000
+#define CSR_ETHPHY_CRG_RESET_SIZE 1
+static inline unsigned char ethphy_crg_reset_read(void) {
+	unsigned char r = MMPTR(0xe000f000);
+	return r;
+}
+static inline void ethphy_crg_reset_write(unsigned char value) {
+	MMPTR(0xe000f000) = value;
+}
+#define CSR_ETHPHY_MDIO_W_ADDR 0xe000f004
+#define CSR_ETHPHY_MDIO_W_SIZE 1
+static inline unsigned char ethphy_mdio_w_read(void) {
+	unsigned char r = MMPTR(0xe000f004);
+	return r;
+}
+static inline void ethphy_mdio_w_write(unsigned char value) {
+	MMPTR(0xe000f004) = value;
+}
+#define CSR_ETHPHY_MDIO_R_ADDR 0xe000f008
+#define CSR_ETHPHY_MDIO_R_SIZE 1
+static inline unsigned char ethphy_mdio_r_read(void) {
+	unsigned char r = MMPTR(0xe000f008);
+	return r;
+}
+
+/* sdram */
+#define CSR_SDRAM_BASE 0xe0004000
+#define CSR_SDRAM_DFII_CONTROL_ADDR 0xe0004000
+#define CSR_SDRAM_DFII_CONTROL_SIZE 1
+static inline unsigned char sdram_dfii_control_read(void) {
+	unsigned char r = MMPTR(0xe0004000);
+	return r;
+}
+static inline void sdram_dfii_control_write(unsigned char value) {
+	MMPTR(0xe0004000) = value;
+}
+#define CSR_SDRAM_DFII_PI0_COMMAND_ADDR 0xe0004004
+#define CSR_SDRAM_DFII_PI0_COMMAND_SIZE 1
+static inline unsigned char sdram_dfii_pi0_command_read(void) {
+	unsigned char r = MMPTR(0xe0004004);
+	return r;
+}
+static inline void sdram_dfii_pi0_command_write(unsigned char value) {
+	MMPTR(0xe0004004) = value;
+}
+#define CSR_SDRAM_DFII_PI0_COMMAND_ISSUE_ADDR 0xe0004008
+#define CSR_SDRAM_DFII_PI0_COMMAND_ISSUE_SIZE 1
+static inline unsigned char sdram_dfii_pi0_command_issue_read(void) {
+	unsigned char r = MMPTR(0xe0004008);
+	return r;
+}
+static inline void sdram_dfii_pi0_command_issue_write(unsigned char value) {
+	MMPTR(0xe0004008) = value;
+}
+#define CSR_SDRAM_DFII_PI0_ADDRESS_ADDR 0xe000400c
+#define CSR_SDRAM_DFII_PI0_ADDRESS_SIZE 2
+static inline unsigned short int sdram_dfii_pi0_address_read(void) {
+	unsigned short int r = MMPTR(0xe000400c);
+	r <<= 8;
+	r |= MMPTR(0xe0004010);
+	return r;
+}
+static inline void sdram_dfii_pi0_address_write(unsigned short int value) {
+	MMPTR(0xe000400c) = value >> 8;
+	MMPTR(0xe0004010) = value;
+}
+#define CSR_SDRAM_DFII_PI0_BADDRESS_ADDR 0xe0004014
+#define CSR_SDRAM_DFII_PI0_BADDRESS_SIZE 1
+static inline unsigned char sdram_dfii_pi0_baddress_read(void) {
+	unsigned char r = MMPTR(0xe0004014);
+	return r;
+}
+static inline void sdram_dfii_pi0_baddress_write(unsigned char value) {
+	MMPTR(0xe0004014) = value;
+}
+#define CSR_SDRAM_DFII_PI0_WRDATA_ADDR 0xe0004018
+#define CSR_SDRAM_DFII_PI0_WRDATA_SIZE 4
+static inline unsigned int sdram_dfii_pi0_wrdata_read(void) {
+	unsigned int r = MMPTR(0xe0004018);
+	r <<= 8;
+	r |= MMPTR(0xe000401c);
+	r <<= 8;
+	r |= MMPTR(0xe0004020);
+	r <<= 8;
+	r |= MMPTR(0xe0004024);
+	return r;
+}
+static inline void sdram_dfii_pi0_wrdata_write(unsigned int value) {
+	MMPTR(0xe0004018) = value >> 24;
+	MMPTR(0xe000401c) = value >> 16;
+	MMPTR(0xe0004020) = value >> 8;
+	MMPTR(0xe0004024) = value;
+}
+#define CSR_SDRAM_DFII_PI0_RDDATA_ADDR 0xe0004028
+#define CSR_SDRAM_DFII_PI0_RDDATA_SIZE 4
+static inline unsigned int sdram_dfii_pi0_rddata_read(void) {
+	unsigned int r = MMPTR(0xe0004028);
+	r <<= 8;
+	r |= MMPTR(0xe000402c);
+	r <<= 8;
+	r |= MMPTR(0xe0004030);
+	r <<= 8;
+	r |= MMPTR(0xe0004034);
+	return r;
+}
+#define CSR_SDRAM_DFII_PI1_COMMAND_ADDR 0xe0004038
+#define CSR_SDRAM_DFII_PI1_COMMAND_SIZE 1
+static inline unsigned char sdram_dfii_pi1_command_read(void) {
+	unsigned char r = MMPTR(0xe0004038);
+	return r;
+}
+static inline void sdram_dfii_pi1_command_write(unsigned char value) {
+	MMPTR(0xe0004038) = value;
+}
+#define CSR_SDRAM_DFII_PI1_COMMAND_ISSUE_ADDR 0xe000403c
+#define CSR_SDRAM_DFII_PI1_COMMAND_ISSUE_SIZE 1
+static inline unsigned char sdram_dfii_pi1_command_issue_read(void) {
+	unsigned char r = MMPTR(0xe000403c);
+	return r;
+}
+static inline void sdram_dfii_pi1_command_issue_write(unsigned char value) {
+	MMPTR(0xe000403c) = value;
+}
+#define CSR_SDRAM_DFII_PI1_ADDRESS_ADDR 0xe0004040
+#define CSR_SDRAM_DFII_PI1_ADDRESS_SIZE 2
+static inline unsigned short int sdram_dfii_pi1_address_read(void) {
+	unsigned short int r = MMPTR(0xe0004040);
+	r <<= 8;
+	r |= MMPTR(0xe0004044);
+	return r;
+}
+static inline void sdram_dfii_pi1_address_write(unsigned short int value) {
+	MMPTR(0xe0004040) = value >> 8;
+	MMPTR(0xe0004044) = value;
+}
+#define CSR_SDRAM_DFII_PI1_BADDRESS_ADDR 0xe0004048
+#define CSR_SDRAM_DFII_PI1_BADDRESS_SIZE 1
+static inline unsigned char sdram_dfii_pi1_baddress_read(void) {
+	unsigned char r = MMPTR(0xe0004048);
+	return r;
+}
+static inline void sdram_dfii_pi1_baddress_write(unsigned char value) {
+	MMPTR(0xe0004048) = value;
+}
+#define CSR_SDRAM_DFII_PI1_WRDATA_ADDR 0xe000404c
+#define CSR_SDRAM_DFII_PI1_WRDATA_SIZE 4
+static inline unsigned int sdram_dfii_pi1_wrdata_read(void) {
+	unsigned int r = MMPTR(0xe000404c);
+	r <<= 8;
+	r |= MMPTR(0xe0004050);
+	r <<= 8;
+	r |= MMPTR(0xe0004054);
+	r <<= 8;
+	r |= MMPTR(0xe0004058);
+	return r;
+}
+static inline void sdram_dfii_pi1_wrdata_write(unsigned int value) {
+	MMPTR(0xe000404c) = value >> 24;
+	MMPTR(0xe0004050) = value >> 16;
+	MMPTR(0xe0004054) = value >> 8;
+	MMPTR(0xe0004058) = value;
+}
+#define CSR_SDRAM_DFII_PI1_RDDATA_ADDR 0xe000405c
+#define CSR_SDRAM_DFII_PI1_RDDATA_SIZE 4
+static inline unsigned int sdram_dfii_pi1_rddata_read(void) {
+	unsigned int r = MMPTR(0xe000405c);
+	r <<= 8;
+	r |= MMPTR(0xe0004060);
+	r <<= 8;
+	r |= MMPTR(0xe0004064);
+	r <<= 8;
+	r |= MMPTR(0xe0004068);
+	return r;
+}
+#define CSR_SDRAM_DFII_PI2_COMMAND_ADDR 0xe000406c
+#define CSR_SDRAM_DFII_PI2_COMMAND_SIZE 1
+static inline unsigned char sdram_dfii_pi2_command_read(void) {
+	unsigned char r = MMPTR(0xe000406c);
+	return r;
+}
+static inline void sdram_dfii_pi2_command_write(unsigned char value) {
+	MMPTR(0xe000406c) = value;
+}
+#define CSR_SDRAM_DFII_PI2_COMMAND_ISSUE_ADDR 0xe0004070
+#define CSR_SDRAM_DFII_PI2_COMMAND_ISSUE_SIZE 1
+static inline unsigned char sdram_dfii_pi2_command_issue_read(void) {
+	unsigned char r = MMPTR(0xe0004070);
+	return r;
+}
+static inline void sdram_dfii_pi2_command_issue_write(unsigned char value) {
+	MMPTR(0xe0004070) = value;
+}
+#define CSR_SDRAM_DFII_PI2_ADDRESS_ADDR 0xe0004074
+#define CSR_SDRAM_DFII_PI2_ADDRESS_SIZE 2
+static inline unsigned short int sdram_dfii_pi2_address_read(void) {
+	unsigned short int r = MMPTR(0xe0004074);
+	r <<= 8;
+	r |= MMPTR(0xe0004078);
+	return r;
+}
+static inline void sdram_dfii_pi2_address_write(unsigned short int value) {
+	MMPTR(0xe0004074) = value >> 8;
+	MMPTR(0xe0004078) = value;
+}
+#define CSR_SDRAM_DFII_PI2_BADDRESS_ADDR 0xe000407c
+#define CSR_SDRAM_DFII_PI2_BADDRESS_SIZE 1
+static inline unsigned char sdram_dfii_pi2_baddress_read(void) {
+	unsigned char r = MMPTR(0xe000407c);
+	return r;
+}
+static inline void sdram_dfii_pi2_baddress_write(unsigned char value) {
+	MMPTR(0xe000407c) = value;
+}
+#define CSR_SDRAM_DFII_PI2_WRDATA_ADDR 0xe0004080
+#define CSR_SDRAM_DFII_PI2_WRDATA_SIZE 4
+static inline unsigned int sdram_dfii_pi2_wrdata_read(void) {
+	unsigned int r = MMPTR(0xe0004080);
+	r <<= 8;
+	r |= MMPTR(0xe0004084);
+	r <<= 8;
+	r |= MMPTR(0xe0004088);
+	r <<= 8;
+	r |= MMPTR(0xe000408c);
+	return r;
+}
+static inline void sdram_dfii_pi2_wrdata_write(unsigned int value) {
+	MMPTR(0xe0004080) = value >> 24;
+	MMPTR(0xe0004084) = value >> 16;
+	MMPTR(0xe0004088) = value >> 8;
+	MMPTR(0xe000408c) = value;
+}
+#define CSR_SDRAM_DFII_PI2_RDDATA_ADDR 0xe0004090
+#define CSR_SDRAM_DFII_PI2_RDDATA_SIZE 4
+static inline unsigned int sdram_dfii_pi2_rddata_read(void) {
+	unsigned int r = MMPTR(0xe0004090);
+	r <<= 8;
+	r |= MMPTR(0xe0004094);
+	r <<= 8;
+	r |= MMPTR(0xe0004098);
+	r <<= 8;
+	r |= MMPTR(0xe000409c);
+	return r;
+}
+#define CSR_SDRAM_DFII_PI3_COMMAND_ADDR 0xe00040a0
+#define CSR_SDRAM_DFII_PI3_COMMAND_SIZE 1
+static inline unsigned char sdram_dfii_pi3_command_read(void) {
+	unsigned char r = MMPTR(0xe00040a0);
+	return r;
+}
+static inline void sdram_dfii_pi3_command_write(unsigned char value) {
+	MMPTR(0xe00040a0) = value;
+}
+#define CSR_SDRAM_DFII_PI3_COMMAND_ISSUE_ADDR 0xe00040a4
+#define CSR_SDRAM_DFII_PI3_COMMAND_ISSUE_SIZE 1
+static inline unsigned char sdram_dfii_pi3_command_issue_read(void) {
+	unsigned char r = MMPTR(0xe00040a4);
+	return r;
+}
+static inline void sdram_dfii_pi3_command_issue_write(unsigned char value) {
+	MMPTR(0xe00040a4) = value;
+}
+#define CSR_SDRAM_DFII_PI3_ADDRESS_ADDR 0xe00040a8
+#define CSR_SDRAM_DFII_PI3_ADDRESS_SIZE 2
+static inline unsigned short int sdram_dfii_pi3_address_read(void) {
+	unsigned short int r = MMPTR(0xe00040a8);
+	r <<= 8;
+	r |= MMPTR(0xe00040ac);
+	return r;
+}
+static inline void sdram_dfii_pi3_address_write(unsigned short int value) {
+	MMPTR(0xe00040a8) = value >> 8;
+	MMPTR(0xe00040ac) = value;
+}
+#define CSR_SDRAM_DFII_PI3_BADDRESS_ADDR 0xe00040b0
+#define CSR_SDRAM_DFII_PI3_BADDRESS_SIZE 1
+static inline unsigned char sdram_dfii_pi3_baddress_read(void) {
+	unsigned char r = MMPTR(0xe00040b0);
+	return r;
+}
+static inline void sdram_dfii_pi3_baddress_write(unsigned char value) {
+	MMPTR(0xe00040b0) = value;
+}
+#define CSR_SDRAM_DFII_PI3_WRDATA_ADDR 0xe00040b4
+#define CSR_SDRAM_DFII_PI3_WRDATA_SIZE 4
+static inline unsigned int sdram_dfii_pi3_wrdata_read(void) {
+	unsigned int r = MMPTR(0xe00040b4);
+	r <<= 8;
+	r |= MMPTR(0xe00040b8);
+	r <<= 8;
+	r |= MMPTR(0xe00040bc);
+	r <<= 8;
+	r |= MMPTR(0xe00040c0);
+	return r;
+}
+static inline void sdram_dfii_pi3_wrdata_write(unsigned int value) {
+	MMPTR(0xe00040b4) = value >> 24;
+	MMPTR(0xe00040b8) = value >> 16;
+	MMPTR(0xe00040bc) = value >> 8;
+	MMPTR(0xe00040c0) = value;
+}
+#define CSR_SDRAM_DFII_PI3_RDDATA_ADDR 0xe00040c4
+#define CSR_SDRAM_DFII_PI3_RDDATA_SIZE 4
+static inline unsigned int sdram_dfii_pi3_rddata_read(void) {
+	unsigned int r = MMPTR(0xe00040c4);
+	r <<= 8;
+	r |= MMPTR(0xe00040c8);
+	r <<= 8;
+	r |= MMPTR(0xe00040cc);
+	r <<= 8;
+	r |= MMPTR(0xe00040d0);
+	return r;
+}
+
+/* timer0 */
+#define CSR_TIMER0_BASE 0xe0002000
+#define CSR_TIMER0_LOAD_ADDR 0xe0002000
+#define CSR_TIMER0_LOAD_SIZE 4
+static inline unsigned int timer0_load_read(void) {
+	unsigned int r = MMPTR(0xe0002000);
+	r <<= 8;
+	r |= MMPTR(0xe0002004);
+	r <<= 8;
+	r |= MMPTR(0xe0002008);
+	r <<= 8;
+	r |= MMPTR(0xe000200c);
+	return r;
+}
+static inline void timer0_load_write(unsigned int value) {
+	MMPTR(0xe0002000) = value >> 24;
+	MMPTR(0xe0002004) = value >> 16;
+	MMPTR(0xe0002008) = value >> 8;
+	MMPTR(0xe000200c) = value;
+}
+#define CSR_TIMER0_RELOAD_ADDR 0xe0002010
+#define CSR_TIMER0_RELOAD_SIZE 4
+static inline unsigned int timer0_reload_read(void) {
+	unsigned int r = MMPTR(0xe0002010);
+	r <<= 8;
+	r |= MMPTR(0xe0002014);
+	r <<= 8;
+	r |= MMPTR(0xe0002018);
+	r <<= 8;
+	r |= MMPTR(0xe000201c);
+	return r;
+}
+static inline void timer0_reload_write(unsigned int value) {
+	MMPTR(0xe0002010) = value >> 24;
+	MMPTR(0xe0002014) = value >> 16;
+	MMPTR(0xe0002018) = value >> 8;
+	MMPTR(0xe000201c) = value;
+}
+#define CSR_TIMER0_EN_ADDR 0xe0002020
+#define CSR_TIMER0_EN_SIZE 1
+static inline unsigned char timer0_en_read(void) {
+	unsigned char r = MMPTR(0xe0002020);
+	return r;
+}
+static inline void timer0_en_write(unsigned char value) {
+	MMPTR(0xe0002020) = value;
+}
+#define CSR_TIMER0_UPDATE_VALUE_ADDR 0xe0002024
+#define CSR_TIMER0_UPDATE_VALUE_SIZE 1
+static inline unsigned char timer0_update_value_read(void) {
+	unsigned char r = MMPTR(0xe0002024);
+	return r;
+}
+static inline void timer0_update_value_write(unsigned char value) {
+	MMPTR(0xe0002024) = value;
+}
+#define CSR_TIMER0_VALUE_ADDR 0xe0002028
+#define CSR_TIMER0_VALUE_SIZE 4
+static inline unsigned int timer0_value_read(void) {
+	unsigned int r = MMPTR(0xe0002028);
+	r <<= 8;
+	r |= MMPTR(0xe000202c);
+	r <<= 8;
+	r |= MMPTR(0xe0002030);
+	r <<= 8;
+	r |= MMPTR(0xe0002034);
+	return r;
+}
+#define CSR_TIMER0_EV_STATUS_ADDR 0xe0002038
+#define CSR_TIMER0_EV_STATUS_SIZE 1
+static inline unsigned char timer0_ev_status_read(void) {
+	unsigned char r = MMPTR(0xe0002038);
+	return r;
+}
+static inline void timer0_ev_status_write(unsigned char value) {
+	MMPTR(0xe0002038) = value;
+}
+#define CSR_TIMER0_EV_PENDING_ADDR 0xe000203c
+#define CSR_TIMER0_EV_PENDING_SIZE 1
+static inline unsigned char timer0_ev_pending_read(void) {
+	unsigned char r = MMPTR(0xe000203c);
+	return r;
+}
+static inline void timer0_ev_pending_write(unsigned char value) {
+	MMPTR(0xe000203c) = value;
+}
+#define CSR_TIMER0_EV_ENABLE_ADDR 0xe0002040
+#define CSR_TIMER0_EV_ENABLE_SIZE 1
+static inline unsigned char timer0_ev_enable_read(void) {
+	unsigned char r = MMPTR(0xe0002040);
+	return r;
+}
+static inline void timer0_ev_enable_write(unsigned char value) {
+	MMPTR(0xe0002040) = value;
+}
+
+/* uart */
+#define CSR_UART_BASE 0xe0001000
+#define CSR_UART_RXTX_ADDR 0xe0001000
+#define CSR_UART_RXTX_SIZE 1
+static inline unsigned char uart_rxtx_read(void) {
+	unsigned char r = MMPTR(0xe0001000);
+	return r;
+}
+static inline void uart_rxtx_write(unsigned char value) {
+	MMPTR(0xe0001000) = value;
+}
+#define CSR_UART_TXFULL_ADDR 0xe0001004
+#define CSR_UART_TXFULL_SIZE 1
+static inline unsigned char uart_txfull_read(void) {
+	unsigned char r = MMPTR(0xe0001004);
+	return r;
+}
+#define CSR_UART_RXEMPTY_ADDR 0xe0001008
+#define CSR_UART_RXEMPTY_SIZE 1
+static inline unsigned char uart_rxempty_read(void) {
+	unsigned char r = MMPTR(0xe0001008);
+	return r;
+}
+#define CSR_UART_EV_STATUS_ADDR 0xe000100c
+#define CSR_UART_EV_STATUS_SIZE 1
+static inline unsigned char uart_ev_status_read(void) {
+	unsigned char r = MMPTR(0xe000100c);
+	return r;
+}
+static inline void uart_ev_status_write(unsigned char value) {
+	MMPTR(0xe000100c) = value;
+}
+#define CSR_UART_EV_PENDING_ADDR 0xe0001010
+#define CSR_UART_EV_PENDING_SIZE 1
+static inline unsigned char uart_ev_pending_read(void) {
+	unsigned char r = MMPTR(0xe0001010);
+	return r;
+}
+static inline void uart_ev_pending_write(unsigned char value) {
+	MMPTR(0xe0001010) = value;
+}
+#define CSR_UART_EV_ENABLE_ADDR 0xe0001014
+#define CSR_UART_EV_ENABLE_SIZE 1
+static inline unsigned char uart_ev_enable_read(void) {
+	unsigned char r = MMPTR(0xe0001014);
+	return r;
+}
+static inline void uart_ev_enable_write(unsigned char value) {
+	MMPTR(0xe0001014) = value;
+}
+
+/* uart_phy */
+#define CSR_UART_PHY_BASE 0xe0000800
+#define CSR_UART_PHY_TUNING_WORD_ADDR 0xe0000800
+#define CSR_UART_PHY_TUNING_WORD_SIZE 4
+static inline unsigned int uart_phy_tuning_word_read(void) {
+	unsigned int r = MMPTR(0xe0000800);
+	r <<= 8;
+	r |= MMPTR(0xe0000804);
+	r <<= 8;
+	r |= MMPTR(0xe0000808);
+	r <<= 8;
+	r |= MMPTR(0xe000080c);
+	return r;
+}
+static inline void uart_phy_tuning_word_write(unsigned int value) {
+	MMPTR(0xe0000800) = value >> 24;
+	MMPTR(0xe0000804) = value >> 16;
+	MMPTR(0xe0000808) = value >> 8;
+	MMPTR(0xe000080c) = value;
+}
+
+/* constants */
+#define UART_INTERRUPT 0
+#define TIMER0_INTERRUPT 1
+#define ETHMAC_INTERRUPT 2
+#define SYSTEM_CLOCK_FREQUENCY 100000000
+#define A7DDRPHY_BITSLIP 2
+#define A7DDRPHY_DELAY 6
+#define L2_SIZE 8192
+
+#endif
diff --git a/configs/misoc/include/generated-sample/mem.h b/configs/misoc/include/generated-sample/mem.h
new file mode 100644
index 0000000000000000000000000000000000000000..f4a9c9c6435dc6cf8f6b410716c4c64b1cb45585
--- /dev/null
+++ b/configs/misoc/include/generated-sample/mem.h
@@ -0,0 +1,16 @@
+#ifndef __GENERATED_MEM_H
+#define __GENERATED_MEM_H
+
+#define ROM_BASE 0x00000000
+#define ROM_SIZE 0x00008000
+
+#define SRAM_BASE 0x10000000
+#define SRAM_SIZE 0x00008000
+
+#define MAIN_RAM_BASE 0x40000000
+#define MAIN_RAM_SIZE 0x10000000
+
+#define ETHMAC_BASE 0xb0000000
+#define ETHMAC_SIZE 0x00002000
+
+#endif
diff --git a/configs/misoc/include/generated-sample/output_format.ld b/configs/misoc/include/generated-sample/output_format.ld
new file mode 100644
index 0000000000000000000000000000000000000000..72acc74d0f770b1f940cfe43e27d7f60669c1b33
--- /dev/null
+++ b/configs/misoc/include/generated-sample/output_format.ld
@@ -0,0 +1 @@
+OUTPUT_FORMAT("elf32-lm32")
diff --git a/configs/misoc/include/generated-sample/regions.ld b/configs/misoc/include/generated-sample/regions.ld
new file mode 100644
index 0000000000000000000000000000000000000000..1708c3a309a8d9982d9021c815c1ef9cc25a15f5
--- /dev/null
+++ b/configs/misoc/include/generated-sample/regions.ld
@@ -0,0 +1,6 @@
+MEMORY {
+	rom : ORIGIN = 0x00000000, LENGTH = 0x00008000
+	sram : ORIGIN = 0x10000000, LENGTH = 0x00008000
+	main_ram : ORIGIN = 0x40000000, LENGTH = 0x10000000
+	ethmac : ORIGIN = 0xb0000000, LENGTH = 0x00002000
+}
diff --git a/configs/misoc/include/generated-sample/sdram_phy.h b/configs/misoc/include/generated-sample/sdram_phy.h
new file mode 100644
index 0000000000000000000000000000000000000000..646cf7009ade1c6543f7155ecd3dc0ac4e0e863e
--- /dev/null
+++ b/configs/misoc/include/generated-sample/sdram_phy.h
@@ -0,0 +1,102 @@
+#ifndef __GENERATED_SDRAM_PHY_H
+#define __GENERATED_SDRAM_PHY_H
+#include 
+#include 
+#include 
+
+#define DFII_NPHASES 4
+
+static void cdelay(int i);
+
+static void command_p0(int cmd)
+{
+    sdram_dfii_pi0_command_write(cmd);
+    sdram_dfii_pi0_command_issue_write(1);
+}
+static void command_p1(int cmd)
+{
+    sdram_dfii_pi1_command_write(cmd);
+    sdram_dfii_pi1_command_issue_write(1);
+}
+static void command_p2(int cmd)
+{
+    sdram_dfii_pi2_command_write(cmd);
+    sdram_dfii_pi2_command_issue_write(1);
+}
+static void command_p3(int cmd)
+{
+    sdram_dfii_pi3_command_write(cmd);
+    sdram_dfii_pi3_command_issue_write(1);
+}
+
+
+#define sdram_dfii_pird_address_write(X) sdram_dfii_pi0_address_write(X)
+#define sdram_dfii_piwr_address_write(X) sdram_dfii_pi2_address_write(X)
+
+#define sdram_dfii_pird_baddress_write(X) sdram_dfii_pi0_baddress_write(X)
+#define sdram_dfii_piwr_baddress_write(X) sdram_dfii_pi2_baddress_write(X)
+
+#define command_prd(X) command_p0(X)
+#define command_pwr(X) command_p2(X)
+
+#define DFII_PIX_DATA_SIZE CSR_SDRAM_DFII_PI0_WRDATA_SIZE
+
+const unsigned int sdram_dfii_pix_wrdata_addr[4] = {
+    CSR_SDRAM_DFII_PI0_WRDATA_ADDR,
+	CSR_SDRAM_DFII_PI1_WRDATA_ADDR,
+	CSR_SDRAM_DFII_PI2_WRDATA_ADDR,
+	CSR_SDRAM_DFII_PI3_WRDATA_ADDR
+};
+
+const unsigned int sdram_dfii_pix_rddata_addr[4] = {
+    CSR_SDRAM_DFII_PI0_RDDATA_ADDR,
+	CSR_SDRAM_DFII_PI1_RDDATA_ADDR,
+	CSR_SDRAM_DFII_PI2_RDDATA_ADDR,
+	CSR_SDRAM_DFII_PI3_RDDATA_ADDR
+};
+
+#define DDR3_MR1 6
+
+static void init_sequence(void)
+{
+	/* Release reset */
+	sdram_dfii_pi0_address_write(0x0);
+	sdram_dfii_pi0_baddress_write(0);
+	sdram_dfii_control_write(DFII_CONTROL_ODT|DFII_CONTROL_RESET_N);
+	cdelay(50000);
+
+	/* Bring CKE high */
+	sdram_dfii_pi0_address_write(0x0);
+	sdram_dfii_pi0_baddress_write(0);
+	sdram_dfii_control_write(DFII_CONTROL_CKE|DFII_CONTROL_ODT|DFII_CONTROL_RESET_N);
+	cdelay(10000);
+
+	/* Load Mode Register 2 */
+	sdram_dfii_pi0_address_write(0x408);
+	sdram_dfii_pi0_baddress_write(2);
+	command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
+
+	/* Load Mode Register 3 */
+	sdram_dfii_pi0_address_write(0x0);
+	sdram_dfii_pi0_baddress_write(3);
+	command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
+
+	/* Load Mode Register 1 */
+	sdram_dfii_pi0_address_write(0x6);
+	sdram_dfii_pi0_baddress_write(1);
+	command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
+
+	/* Load Mode Register 0, CL=7, BL=8 */
+	sdram_dfii_pi0_address_write(0x930);
+	sdram_dfii_pi0_baddress_write(0);
+	command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
+	cdelay(200);
+
+	/* ZQ Calibration */
+	sdram_dfii_pi0_address_write(0x400);
+	sdram_dfii_pi0_baddress_write(0);
+	command_p0(DFII_COMMAND_WE|DFII_COMMAND_CS);
+	cdelay(200);
+
+}
+#endif
diff --git a/configs/misoc/include/generated-sample/variables.mak b/configs/misoc/include/generated-sample/variables.mak
new file mode 100644
index 0000000000000000000000000000000000000000..2bd0474215a834e9f0bc993b508757933098d818
--- /dev/null
+++ b/configs/misoc/include/generated-sample/variables.mak
@@ -0,0 +1,11 @@
+TRIPLE=lm32-elf
+CPU=lm32
+CPUFLAGS=-mbarrel-shift-enabled -mmultiply-enabled -mdivide-enabled -msign-extend-enabled
+CPUENDIANNESS=big
+CLANG=0
+SOC_DIRECTORY=/usr/local/lib/python3.5/dist-packages/litex-0.1-py3.5.egg/litex/soc
+BUILDINC_DIRECTORY=/home/lenovo/fpga/arty-soc/build/software/include
+LIBBASE_DIRECTORY=/usr/local/lib/python3.5/dist-packages/litex-0.1-py3.5.egg/litex/soc/software/libbase
+LIBCOMPILER_RT_DIRECTORY=/usr/local/lib/python3.5/dist-packages/litex-0.1-py3.5.egg/litex/soc/software/libcompiler_rt
+LIBNET_DIRECTORY=/usr/local/lib/python3.5/dist-packages/litex-0.1-py3.5.egg/litex/soc/software/libnet
+BIOS_DIRECTORY=/usr/local/lib/python3.5/dist-packages/litex-0.1-py3.5.egg/litex/soc/software/bios
diff --git a/configs/misoc/nsh/Make.defs b/configs/misoc/nsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..bf0aa6ba193a513d0c26c7a636e98d3347d5e7bd
--- /dev/null
+++ b/configs/misoc/nsh/Make.defs
@@ -0,0 +1,101 @@
+############################################################################
+# configs/misoc/nsh/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#           Ramtin Amin 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/misoc/src/lm32/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = $(ARCHINCLUDES) "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem "$(TOPDIR)/include"
+  ARCHXXINCLUDES =  $(ARCHINCLUDES) -isystem "$(TOPDIR)/include/cxx"
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD_CUSTOM_NAME)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
diff --git a/configs/lpcxpresso-lpc1115/minnsh/defconfig b/configs/misoc/nsh/defconfig
similarity index 68%
rename from configs/lpcxpresso-lpc1115/minnsh/defconfig
rename to configs/misoc/nsh/defconfig
index 58ea587ca6b9833f2eee30b9c65c87ea48294aff..0bac0c89c726e1f605eb44d57e66a2c982cece01 100644
--- a/configs/lpcxpresso-lpc1115/minnsh/defconfig
+++ b/configs/misoc/nsh/defconfig
@@ -7,7 +7,7 @@
 # Build Setup
 #
 # CONFIG_EXPERIMENTAL is not set
-CONFIG_DEFAULT_SMALL=y
+# CONFIG_DEFAULT_SMALL is not set
 CONFIG_HOST_LINUX=y
 # CONFIG_HOST_OSX is not set
 # CONFIG_HOST_WINDOWS is not set
@@ -42,125 +42,73 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+CONFIG_DEBUG_FEATURES=y
+
+#
+# Debug SYSLOG Output Controls
+#
+# CONFIG_DEBUG_ERROR is not set
+# CONFIG_DEBUG_ASSERTIONS is not set
+
+#
+# Subsystem Debug Options
+#
+# CONFIG_DEBUG_BINFMT is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_GRAPHICS is not set
+# CONFIG_DEBUG_LIB is not set
+# CONFIG_DEBUG_MM is not set
+# CONFIG_DEBUG_SCHED is not set
+
+#
+# OS Function Debug Options
+#
+# CONFIG_DEBUG_IRQ is not set
+
+#
+# Driver Debug Options
+#
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_TIMER is not set
+# CONFIG_ARCH_HAVE_STACKCHECK is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
-CONFIG_ARCH_HAVE_STACKCHECK=y
-# CONFIG_STACK_COLORATION is not set
-# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
-# CONFIG_DEBUG_NOOPT is not set
+CONFIG_DEBUG_NOOPT=y
 # CONFIG_DEBUG_CUSTOMOPT is not set
-CONFIG_DEBUG_FULLOPT=y
+# CONFIG_DEBUG_FULLOPT is not set
 
 #
 # System Type
 #
-CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_ARM is not set
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+CONFIG_ARCH_MISOC=y
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
-CONFIG_ARCH="arm"
-
-#
-# ARM Options
-#
-# CONFIG_ARCH_CHIP_A1X is not set
-# CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
-# CONFIG_ARCH_CHIP_DM320 is not set
-# CONFIG_ARCH_CHIP_EFM32 is not set
-# CONFIG_ARCH_CHIP_IMX1 is not set
-# CONFIG_ARCH_CHIP_KINETIS is not set
-# CONFIG_ARCH_CHIP_KL is not set
-# CONFIG_ARCH_CHIP_LM is not set
-# CONFIG_ARCH_CHIP_TIVA is not set
-CONFIG_ARCH_CHIP_LPC11XX=y
-# CONFIG_ARCH_CHIP_LPC17XX is not set
-# CONFIG_ARCH_CHIP_LPC214X is not set
-# CONFIG_ARCH_CHIP_LPC2378 is not set
-# CONFIG_ARCH_CHIP_LPC31XX is not set
-# CONFIG_ARCH_CHIP_LPC43XX is not set
-# CONFIG_ARCH_CHIP_NUC1XX is not set
-# CONFIG_ARCH_CHIP_SAMA5 is not set
-# CONFIG_ARCH_CHIP_SAMD is not set
-# CONFIG_ARCH_CHIP_SAML is not set
-# CONFIG_ARCH_CHIP_SAM34 is not set
-# CONFIG_ARCH_CHIP_SAMV7 is not set
-# CONFIG_ARCH_CHIP_STM32 is not set
-# CONFIG_ARCH_CHIP_STM32F7 is not set
-# CONFIG_ARCH_CHIP_STR71X is not set
-# CONFIG_ARCH_CHIP_TMS570 is not set
-# CONFIG_ARCH_CHIP_MOXART is not set
-# CONFIG_ARCH_ARM7TDMI is not set
-# CONFIG_ARCH_ARM926EJS is not set
-# CONFIG_ARCH_ARM920T is not set
-CONFIG_ARCH_CORTEXM0=y
-# CONFIG_ARCH_CORTEXM3 is not set
-# CONFIG_ARCH_CORTEXM4 is not set
-# CONFIG_ARCH_CORTEXM7 is not set
-# CONFIG_ARCH_CORTEXA5 is not set
-# CONFIG_ARCH_CORTEXA8 is not set
-# CONFIG_ARCH_CORTEXR4 is not set
-# CONFIG_ARCH_CORTEXR4F is not set
-# CONFIG_ARCH_CORTEXR5 is not set
-# CONFIG_ARCH_CORTEX5F is not set
-# CONFIG_ARCH_CORTEXR7 is not set
-# CONFIG_ARCH_CORTEXR7F is not set
-CONFIG_ARCH_FAMILY="armv6-m"
-CONFIG_ARCH_CHIP="lpc11xx"
-CONFIG_ARCH_HAVE_CMNVECTOR=y
-# CONFIG_ARMV7M_CMNVECTOR is not set
-# CONFIG_ARMV7M_LAZYFPU is not set
-# CONFIG_ARCH_HAVE_FPU is not set
-# CONFIG_ARCH_HAVE_DPFPU is not set
-# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
-
-#
-# ARMV6M Configuration Options
-#
-# CONFIG_ARMV6M_TOOLCHAIN_BUILDROOT is not set
-# CONFIG_ARMV6M_TOOLCHAIN_CODEREDL is not set
-# CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL is not set
-CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL=y
-# CONFIG_GPIO_IRQ is not set
-
-#
-# LPC11xx Configuration Options
-#
-# CONFIG_ARCH_CHIP_LPC1114 is not set
-CONFIG_ARCH_CHIP_LPC1115=y
-CONFIG_ARCH_FAMILY_LPC111X=y
-
-#
-# LPC11xx Peripheral Support
-#
-CONFIG_LPC11_INTRCOSC=y
-# CONFIG_LPC11_MAINOSC is not set
-CONFIG_LPC11_SYSTICK_CORECLK=y
-# CONFIG_LPC11_SYSTICK_CORECLK_DIV16 is not set
-CONFIG_LPC11_PLL=y
-CONFIG_LPC11_UART0=y
-# CONFIG_LPC11_CAN0 is not set
-# CONFIG_LPC11_SPI is not set
-# CONFIG_LPC11_SSP0 is not set
-# CONFIG_LPC11_SSP1 is not set
-# CONFIG_LPC11_I2C0 is not set
-# CONFIG_LPC11_TMR0 is not set
-# CONFIG_LPC11_TMR1 is not set
-# CONFIG_LPC11_WDT is not set
-# CONFIG_LPC11_ADC is not set
-# CONFIG_LPC11_FLASH is not set
-
-#
-# Serial driver options
-#
-# CONFIG_SERIAL_TERMIOS is not set
+CONFIG_ARCH="misoc"
+CONFIG_ARCH_CHIP="lm32"
+CONFIG_ARCH_CHIP_LM32=y
+# CONFIG_ARCH_CHIP_MOR1K is not set
+
+#
+# MISOC Peripheral Support
+#
+CONFIG_MISOC_HAVE_UART1=y
+CONFIG_MISOC_UART1=y
+CONFIG_MISOC_UART=y
+CONFIG_MISOC_UART_RX_BUF_SIZE=64
+CONFIG_MISOC_UART_TX_BUF_SIZE=64
+# CONFIG_LM32_TOOLCHAIN_BUILDROOT is not set
+CONFIG_LM32_TOOLCHAIN_GNUL=y
 
 #
 # Architecture Options
@@ -168,20 +116,20 @@ CONFIG_LPC11_UART0=y
 # CONFIG_ARCH_NOINTC is not set
 # CONFIG_ARCH_VECNOTIRQ is not set
 # CONFIG_ARCH_DMA is not set
-CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_HAVE_IRQPRIO is not set
 # CONFIG_ARCH_L2CACHE is not set
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
-CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+# CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
-CONFIG_ARCH_HAVE_RESET=y
-# CONFIG_ARCH_IRQPRIO is not set
-# CONFIG_ARCH_STACKDUMP is not set
+# CONFIG_ARCH_HAVE_RESET is not set
+CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
 # CONFIG_ARCH_IDLE_CUSTOM is not set
 # CONFIG_ARCH_HAVE_RAMFUNCS is not set
@@ -190,7 +138,7 @@ CONFIG_ARCH_HAVE_RESET=y
 #
 # Board Settings
 #
-CONFIG_BOARD_LOOPSPERMSEC=2988
+CONFIG_BOARD_LOOPSPERMSEC=800
 # CONFIG_ARCH_CALIBRATION is not set
 
 #
@@ -212,27 +160,32 @@ CONFIG_BOOT_RUNFROMFLASH=y
 #
 # Boot Memory Configuration
 #
-CONFIG_RAM_START=0x10000000
-CONFIG_RAM_SIZE=8192
+CONFIG_RAM_START=0x40000000
+CONFIG_RAM_SIZE=524288
 # CONFIG_ARCH_HAVE_SDRAM is not set
 
 #
 # Board Selection
 #
-CONFIG_ARCH_BOARD_LPCXPRESSO_LPC1115=y
-# CONFIG_ARCH_BOARD_CUSTOM is not set
-CONFIG_ARCH_BOARD="lpcxpresso-lpc1115"
+CONFIG_ARCH_BOARD_CUSTOM=y
+
+#
+# Custom Board Configuration
+#
+CONFIG_ARCH_BOARD_CUSTOM_NAME="misoc"
+CONFIG_ARCH_BOARD_CUSTOM_DIR="/configs/misoc/"
+CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
+# CONFIG_BOARD_CUSTOM_LEDS is not set
+# CONFIG_BOARD_CUSTOM_BUTTONS is not set
 
 #
 # Common Board Options
 #
-CONFIG_ARCH_HAVE_LEDS=y
-CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -241,7 +194,7 @@ CONFIG_NSH_MMCSDMINOR=0
 CONFIG_DISABLE_OS_API=y
 CONFIG_DISABLE_POSIX_TIMERS=y
 CONFIG_DISABLE_PTHREAD=y
-CONFIG_DISABLE_SIGNALS=y
+# CONFIG_DISABLE_SIGNALS is not set
 CONFIG_DISABLE_MQUEUE=y
 CONFIG_DISABLE_ENVIRON=y
 
@@ -251,10 +204,11 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
-CONFIG_START_YEAR=2013
-CONFIG_START_MONTH=2
-CONFIG_START_DAY=26
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=6
+CONFIG_START_DAY=16
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=4
 CONFIG_WDOG_INTRESERVE=0
@@ -283,12 +237,12 @@ CONFIG_MAX_TASKS=4
 #
 # Files and I/O
 #
-# CONFIG_DEV_CONSOLE is not set
-CONFIG_FDCLONE_DISABLE=y
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
 # CONFIG_FDCLONE_STDIO is not set
 CONFIG_SDCLONE_DISABLE=y
-CONFIG_NFILE_DESCRIPTORS=0
-CONFIG_NFILE_STREAMS=0
+CONFIG_NFILE_DESCRIPTORS=4
+CONFIG_NFILE_STREAMS=4
 CONFIG_NAME_MAX=32
 # CONFIG_PRIORITY_INHERITANCE is not set
 
@@ -309,17 +263,18 @@ CONFIG_NAME_MAX=32
 # Stack and heap information
 #
 CONFIG_IDLETHREAD_STACKSIZE=1024
-CONFIG_USERMAIN_STACKSIZE=1536
-CONFIG_PTHREAD_STACK_MIN=256
-CONFIG_PTHREAD_STACK_DEFAULT=1536
+CONFIG_USERMAIN_STACKSIZE=1024
+CONFIG_PTHREAD_STACK_MIN=512
+CONFIG_PTHREAD_STACK_DEFAULT=1024
 # CONFIG_LIB_SYSCALL is not set
 
 #
 # Device Drivers
 #
 CONFIG_DISABLE_POLL=y
-# CONFIG_DEV_NULL is not set
+CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -335,12 +290,16 @@ CONFIG_DISABLE_POLL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -348,14 +307,25 @@ CONFIG_DISABLE_POLL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
-# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -364,12 +334,14 @@ CONFIG_DISABLE_POLL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
-CONFIG_UART0_SERIALDRIVER=y
-# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_UART2_SERIALDRIVER is not set
 # CONFIG_UART3_SERIALDRIVER is not set
 # CONFIG_UART4_SERIALDRIVER is not set
@@ -389,44 +361,49 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
+# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
-CONFIG_UART0_SERIAL_CONSOLE=y
+CONFIG_UART1_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
 
 #
-# UART0 Configuration
+# UART1 Configuration
 #
-CONFIG_UART0_RXBUFSIZE=64
-CONFIG_UART0_TXBUFSIZE=64
-CONFIG_UART0_BAUD=115200
-CONFIG_UART0_BITS=8
-CONFIG_UART0_PARITY=0
-CONFIG_UART0_2STOP=0
-# CONFIG_UART0_IFLOWCONTROL is not set
-# CONFIG_UART0_OFLOWCONTROL is not set
-# CONFIG_UART0_DMA is not set
+CONFIG_UART1_RXBUFSIZE=256
+CONFIG_UART1_TXBUFSIZE=256
+CONFIG_UART1_BAUD=115200
+CONFIG_UART1_BITS=8
+CONFIG_UART1_PARITY=0
+CONFIG_UART1_2STOP=0
+# CONFIG_UART1_IFLOWCONTROL is not set
+# CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -456,12 +433,6 @@ CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -470,7 +441,7 @@ CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
 #
 # Memory Management
 #
-CONFIG_MM_SMALL=y
+# CONFIG_MM_SMALL is not set
 CONFIG_MM_REGIONS=1
 # CONFIG_ARCH_HAVE_HEAP2 is not set
 # CONFIG_GRAN is not set
@@ -480,6 +451,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -497,14 +472,16 @@ CONFIG_MM_REGIONS=1
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
-CONFIG_NOPRINTF_FIELDWIDTH=y
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 # CONFIG_LIBC_LONG_LONG is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -512,21 +489,23 @@ CONFIG_LIB_RAND_ORDER=1
 CONFIG_EOL_IS_EITHER_CRLF=y
 # CONFIG_LIBC_EXECFUNCS is not set
 CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
-CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
 CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -545,18 +524,20 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
-# CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
+CONFIG_EXAMPLES_HELLO=y
+CONFIG_EXAMPLES_HELLO_PRIORITY=100
+CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -565,39 +546,48 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
-# CONFIG_EXAMPLES_OSTEST is not set
+CONFIG_EXAMPLES_OSTEST=y
+CONFIG_EXAMPLES_OSTEST_LOOPS=1
+CONFIG_EXAMPLES_OSTEST_STACKSIZE=8192
+CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=8
+CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000
+CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
 # CONFIG_FSUTILS_INIFILE is not set
 
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -608,8 +598,9 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -620,6 +611,7 @@ CONFIG_EXAMPLES_NSH=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -633,78 +625,82 @@ CONFIG_NSH_LIBRARY=y
 #
 # Command Line Configuration
 #
-CONFIG_NSH_READLINE=y
-# CONFIG_NSH_CLE is not set
+# CONFIG_NSH_READLINE is not set
+CONFIG_NSH_CLE=y
 CONFIG_NSH_LINELEN=80
-CONFIG_NSH_DISABLE_SEMICOLON=y
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
 CONFIG_NSH_MAXARGUMENTS=6
-# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_ARGCAT=y
 CONFIG_NSH_NESTDEPTH=3
 # CONFIG_NSH_DISABLEBG is not set
 
 #
 # Disable Individual commands
 #
-CONFIG_NSH_DISABLE_ADDROUTE=y
-CONFIG_NSH_DISABLE_BASENAME=y
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
-CONFIG_NSH_DISABLE_CD=y
-CONFIG_NSH_DISABLE_CP=y
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
 # CONFIG_NSH_DISABLE_CMP is not set
 CONFIG_NSH_DISABLE_DATE=y
-CONFIG_NSH_DISABLE_DD=y
-CONFIG_NSH_DISABLE_DF=y
-CONFIG_NSH_DISABLE_DELROUTE=y
-CONFIG_NSH_DISABLE_DIRNAME=y
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
 # CONFIG_NSH_DISABLE_FREE is not set
-CONFIG_NSH_DISABLE_GET=y
+# CONFIG_NSH_DISABLE_GET is not set
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 CONFIG_NSH_DISABLE_IFCONFIG=y
 CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
-CONFIG_NSH_DISABLE_LOSETUP=y
+# CONFIG_NSH_DISABLE_LOSETUP is not set
 CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
-CONFIG_NSH_DISABLE_MKDIR=y
-# CONFIG_NSH_DISABLE_MKFIFO is not set
-CONFIG_NSH_DISABLE_MKRD=y
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
-CONFIG_NSH_DISABLE_MOUNT=y
-CONFIG_NSH_DISABLE_MV=y
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
-# CONFIG_NSH_DISABLE_PS is not set
-CONFIG_NSH_DISABLE_PUT=y
+CONFIG_NSH_DISABLE_PRINTF=y
+CONFIG_NSH_DISABLE_PS=y
+# CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
-CONFIG_NSH_DISABLE_RM=y
-CONFIG_NSH_DISABLE_RMDIR=y
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
-CONFIG_NSH_DISABLE_TIME=y
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
-CONFIG_NSH_DISABLE_UMOUNT=y
-CONFIG_NSH_DISABLE_UNAME=y
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
-CONFIG_NSH_DISABLE_WGET=y
+# CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
+CONFIG_NSH_CMDOPT_DF_H=y
 CONFIG_NSH_CODECS_BUFSIZE=128
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-CONFIG_NSH_FILEIOSIZE=64
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_FILEIOSIZE=1024
 
 #
 # Scripting Support
 #
-CONFIG_NSH_DISABLESCRIPT=y
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
 
 #
 # Console Configuration
@@ -727,12 +723,13 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
-# CONFIG_SYSTEM_CLE is not set
+CONFIG_SYSTEM_CLE=y
+CONFIG_SYSTEM_CLE_DEBUGLEVEL=0
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -740,5 +737,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/compal_e88/nsh_highram/setenv.sh b/configs/misoc/nsh/setenv.sh
old mode 100755
new mode 100644
similarity index 72%
rename from configs/compal_e88/nsh_highram/setenv.sh
rename to configs/misoc/nsh/setenv.sh
index 0693ede0ac2b7bec0b349fdaf26d6d84bb48388c..851cd9727da6e385fba1e4f1ba9443ce4182365f
--- a/configs/compal_e88/nsh_highram/setenv.sh
+++ b/configs/misoc/nsh/setenv.sh
@@ -1,8 +1,9 @@
 #!/bin/bash
-# c5471evm/nsh/setenv.sh
+# configs/misoc/nsh/setenv.sh
 #
-#   Copyright (C) 2007, 2008, 2011 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
+#           Ramtin Amin 
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions
@@ -32,15 +33,26 @@
 # POSSIBILITY OF SUCH DAMAGE.
 #
 
-if [ "$(basename $0)" = "setenv.sh" ] ; then
+if [ "$_" = "$0" ] ; then
   echo "You must source this script, not run it!" 1>&2
   exit 1
 fi
 
-if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi
-
 WD=`pwd`
-export BUILDROOT_BIN=${WD}/../buildroot/build_arm_nofpu/staging_dir/bin
-export PATH=${BUILDROOT_BIN}:/sbin:/usr/sbin:${PATH_ORIG}
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+export TOOLCHAIN_BIN="${WD}/../buildroot/build_lm32/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
 
 echo "PATH : ${PATH}"
diff --git a/configs/misoc/scripts/ld.script b/configs/misoc/scripts/ld.script
new file mode 100644
index 0000000000000000000000000000000000000000..0a3aa7e3d02acebe0d19de05da13ae67d26406b2
--- /dev/null
+++ b/configs/misoc/scripts/ld.script
@@ -0,0 +1,97 @@
+/****************************************************************************
+ * configs/misoc/hello/script/ld.script
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+OUTPUT_FORMAT("elf32-lm32")
+ENTRY(_stext)
+
+/*INCLUDE configs/misoc/include/generated/regions.ld*/
+MEMORY
+{
+	rom : ORIGIN = 0x00000000, LENGTH = 0x00008000
+	sram : ORIGIN = 0x10000000, LENGTH = 0x00004000
+	main_ram : ORIGIN = 0x40000000, LENGTH = 0x00080000
+}
+
+SECTIONS
+{
+	.text : {
+		_stext = ABSOLUTE(.);
+		*(.vectors)
+		*(.text .text.*)
+		*(.fixup)
+		*(.gnu.warning)
+		*(.rodata .rodata.*)
+		*(.gnu.linkonce.t.*)
+		*(.glue_7)
+		*(.glue_7t)
+		*(.got)
+		*(.gcc_except_table)
+		*(.gnu.linkonce.r.*)
+		_etext = ABSOLUTE(.);
+	} > main_ram
+
+	_eronly = ABSOLUTE(.);		/* See below                    */
+
+	.data : {
+		_sdata = ABSOLUTE(.);
+		*(.data .data.*)
+		*(.gnu.linkonce.d.*)
+		CONSTRUCTORS
+		_edata = ABSOLUTE(.);
+	} > main_ram 
+
+	.bss : {			/* BSS				*/
+		_sbss = ABSOLUTE(.);
+		*(.bss .bss.*)
+		*(.gnu.linkonce.b.*)
+		*(COMMON)
+		_ebss = ABSOLUTE(.);
+	} > main_ram
+					/* Stabs debugging sections.	*/
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_info 0 : { *(.debug_info) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_aranges 0 : { *(.debug_aranges) }
+}
+
+PROVIDE(_fstack = ORIGIN(main_ram) + LENGTH(main_ram) - 4);
diff --git a/configs/pirelli_dpl10/src/.gitignore b/configs/misoc/src/.gitignore
similarity index 100%
rename from configs/pirelli_dpl10/src/.gitignore
rename to configs/misoc/src/.gitignore
diff --git a/configs/compal_e88/src/Makefile b/configs/misoc/src/Makefile
similarity index 88%
rename from configs/compal_e88/src/Makefile
rename to configs/misoc/src/Makefile
index e4703f9a0a835bd1f45ef308f5627b619820033d..0607a11ed37967b91c34ed94737267326ab2f3c1 100644
--- a/configs/compal_e88/src/Makefile
+++ b/configs/misoc/src/Makefile
@@ -1,11 +1,9 @@
 ############################################################################
-# configs/compal_e88/src/Makefile
+# configs/misoc/src/Makefile
 #
-#   Copyright (C) 2007, 2008, 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
-#
-#   Copyright (C) 2011 Stefan Richter. All rights reserved.
-#   Author: Stefan Richter 
+#           Ramtin Amin 
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions
@@ -39,6 +37,6 @@
 -include $(TOPDIR)/Make.defs
 
 ASRCS =
-CSRCS = boot.c
+CSRCS = lm32_boot.c
 
 include $(TOPDIR)/configs/Board.mk
diff --git a/configs/misoc/src/lm32_boot.c b/configs/misoc/src/lm32_boot.c
new file mode 100644
index 0000000000000000000000000000000000000000..8d23d5dc63291d532abf04aee2746c837d1cf6d3
--- /dev/null
+++ b/configs/misoc/src/lm32_boot.c
@@ -0,0 +1,68 @@
+/************************************************************************************
+ * configs/misoc/src/lm32_boot.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: lm32_board_initialize
+ *
+ * Description:
+ *   All LM32 architectures must provide the following entry point.  This entry
+ *   point is called early in the initialization -- after all memory has been
+ *   configured and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void lm32_board_initialize(void)
+{
+  /* Configure SSP chip selects if 1) at least one SSP is enabled, and 2) the weak
+   * function atmega_spidev_initialize() has been brought into the link.
+   */
+
+  /* Configure on-board LEDs if LED support has been selected. */
+}
diff --git a/configs/misoc/src/misoc.h b/configs/misoc/src/misoc.h
new file mode 100644
index 0000000000000000000000000000000000000000..24fe09a4520e00b778d7555663dff4eb8e82fb2a
--- /dev/null
+++ b/configs/misoc/src/misoc.h
@@ -0,0 +1,102 @@
+/****************************************************************************
+ * configs/misoc/src/misoc.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Ramtin Amin 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __CONFIGS_MISOC_SRC_MISOC_H
+#define __CONFIGS_MISOC_SRC_MISOC_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Inline Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Name: lm32_spidev_initialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins for the Amber Web Server.
+ *
+ ************************************************************************************/
+
+#if defined(CONFIG_AVR_SPI1) || defined(CONFIG_AVR_SPI2)
+void weak_function lm32_spidev_initialize(void);
+#endif
+
+/************************************************************************************
+ * Name: lm32_led_initialize
+ *
+ * Description:
+ *   Configure on-board LEDs if LED support has been selected.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ARCH_LEDS
+void lm32_led_initialize(void);
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __CONFIGS_MISOC_SRC_MISOC_H */
diff --git a/configs/moteino-mega/hello/Make.defs b/configs/moteino-mega/hello/Make.defs
index 75bb1f6e6b9b947c51ffdceb3c0913c6afaae58a..02037786d8f1f2010848c5fb44a378e12c5d0db7 100644
--- a/configs/moteino-mega/hello/Make.defs
+++ b/configs/moteino-mega/hello/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/moteino-mega/hello/defconfig b/configs/moteino-mega/hello/defconfig
index 92218c71f215e48b228e52ba9310665c1547f516..d63906adff2d7baeb226bb514f8d75fd4ceddb40 100644
--- a/configs/moteino-mega/hello/defconfig
+++ b/configs/moteino-mega/hello/defconfig
@@ -40,7 +40,7 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
@@ -56,8 +56,7 @@ CONFIG_DEBUG_FULLOPT=y
 CONFIG_ARCH_AVR=y
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -270,7 +269,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
 # CONFIG_16550_UART is not set
@@ -362,7 +360,6 @@ CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 # CONFIG_SYSLOG_TIMESTAMP is not set
 
 #
@@ -400,7 +397,7 @@ CONFIG_MM_REGIONS=1
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -421,7 +418,6 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Non-standard Library Support
@@ -479,7 +475,6 @@ CONFIG_EXAMPLES_HELLO=y
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
@@ -579,7 +574,7 @@ CONFIG_EXAMPLES_HELLO=y
 #
 # Intel HEX to binary conversion
 #
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # I2C tool
diff --git a/configs/moteino-mega/nsh/Make.defs b/configs/moteino-mega/nsh/Make.defs
index bb1d1deb7be37e785fb4fb27d5ad146c07d27eb4..85b71ddc105a8a83c7462e62dc760b10da552950 100644
--- a/configs/moteino-mega/nsh/Make.defs
+++ b/configs/moteino-mega/nsh/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/moteino-mega/nsh/defconfig b/configs/moteino-mega/nsh/defconfig
index 3625027ae2662c41634902cc345c7aafba635fd4..8dd38900b2d2c059fc2382122c0c7821f9581d42 100644
--- a/configs/moteino-mega/nsh/defconfig
+++ b/configs/moteino-mega/nsh/defconfig
@@ -40,7 +40,7 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
@@ -56,8 +56,7 @@ CONFIG_DEBUG_FULLOPT=y
 CONFIG_ARCH_AVR=y
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -278,7 +277,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 # CONFIG_16550_UART is not set
@@ -371,7 +369,6 @@ CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 # CONFIG_SYSLOG_TIMESTAMP is not set
 
 #
@@ -409,7 +406,7 @@ CONFIG_MM_REGIONS=1
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 CONFIG_LIB_HOMEDIR="/"
@@ -432,7 +429,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_LIBC_LOCALTIME is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Non-standard Library Support
@@ -490,7 +486,6 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
@@ -664,7 +659,7 @@ CONFIG_NSH_CONSOLE=y
 #
 # Intel HEX to binary conversion
 #
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # I2C tool
diff --git a/configs/moteino-mega/src/avr_leds.c b/configs/moteino-mega/src/avr_leds.c
index 4a41600fbfe183bbe63ef592306abdfe59a10ddb..14f5bec04c08eb9a75647c0ef607082dcf3148a4 100644
--- a/configs/moteino-mega/src/avr_leds.c
+++ b/configs/moteino-mega/src/avr_leds.c
@@ -53,36 +53,12 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
 static bool g_ncoff;
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/moxa/nsh/Make.defs b/configs/moxa/nsh/Make.defs
index 99cc86d7d83d2ce0a740e317360f9d6469a2de32..900a83664f04bd478b0bb2f8cd455b4646e9a21d 100644
--- a/configs/moxa/nsh/Make.defs
+++ b/configs/moxa/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin -mno-thumb-interwork -march=armv4 -Uarm
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -mno-thumb-interwork -march=armv4 -Uarm
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -mno-thumb-interwork -march=armv4 -Uarm
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/moxa/nsh/defconfig b/configs/moxa/nsh/defconfig
index f4e067940729a0c6564db387dea300aa14ba33ae..64db3692ccf4d7c71d30accb0f67c7fd6c8fbb60 100644
--- a/configs/moxa/nsh/defconfig
+++ b/configs/moxa/nsh/defconfig
@@ -42,10 +42,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +97,7 @@ CONFIG_ARCH="arm"
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 CONFIG_ARCH_CHIP_MOXART=y
@@ -106,6 +110,7 @@ CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
 # CONFIG_ARCH_CORTEXR4 is not set
 # CONFIG_ARCH_CORTEXR4F is not set
 # CONFIG_ARCH_CORTEXR5 is not set
@@ -114,8 +119,11 @@ CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="moxart"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 
 #
@@ -145,6 +153,7 @@ CONFIG_UART_MOXA_SHARED_IRQ=31
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -190,25 +199,23 @@ CONFIG_RAM_SIZE=2097152
 #
 # Board Selection
 #
-# CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD_MOXA=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="moxa"
 
 #
 # Common Board Options
 #
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
 CONFIG_MOXA_NP51X0=y
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 CONFIG_BOARDCTL_RESET=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -228,6 +235,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=6
@@ -240,6 +248,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -329,6 +338,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -344,12 +354,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -357,14 +371,27 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
+# CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -387,7 +414,7 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_CS89x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
 CONFIG_NET_FTMAC100=y
 CONFIG_FTMAC100_BASE=0x90900000
@@ -395,14 +422,15 @@ CONFIG_FTMAC100_IRQ=25
 CONFIG_FTMAC100_RX_DESC=64
 CONFIG_FTMAC100_TX_DESC=32
 CONFIG_FTMAC100_MAC0_ENV_ADDR=0x80000050
-# CONFIG_NET_VNET is not set
+CONFIG_FTMAC100_HPWORK=y
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 CONFIG_16550_UART=y
 CONFIG_16550_UART0=y
 CONFIG_16550_UART0_BASE=0x98200000
@@ -448,10 +476,6 @@ CONFIG_16550_ADDRWIDTH=32
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 # CONFIG_MCU_SERIAL is not set
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
@@ -459,19 +483,26 @@ CONFIG_SERIAL_NPOLLWAITERS=2
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -479,13 +510,11 @@ CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=1500
 CONFIG_NET_ETH_TCP_RECVWNDO=1536
 CONFIG_NET_GUARDSIZE=2
@@ -618,12 +647,6 @@ CONFIG_FS_BINFS=y
 # CONFIG_FS_PROCFS is not set
 CONFIG_FS_UNIONFS=y
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -642,6 +665,11 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+# CONFIG_WIRELESS is not set
+
 #
 # Binary Loader
 #
@@ -669,6 +697,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -684,15 +714,18 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -723,8 +756,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -732,10 +766,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -745,36 +779,37 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
 #
@@ -783,6 +818,11 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -794,8 +834,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -805,14 +846,16 @@ CONFIG_EXAMPLES_NSH=y
 #
 # Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 # CONFIG_NETUTILS_THTTPD is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
@@ -841,6 +884,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 CONFIG_NSH_DISABLE_ADDROUTE=y
+CONFIG_NSH_DISABLE_ARP=y
 CONFIG_NSH_DISABLE_BASENAME=y
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
@@ -866,12 +910,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -891,6 +935,7 @@ CONFIG_NSH_DISABLE_TIME=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -917,6 +962,7 @@ CONFIG_NSH_CONSOLE=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -964,12 +1010,12 @@ CONFIG_NSH_LOGIN_FAILCOUNT=3
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -978,5 +1024,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/mt-db-x3/README.txt b/configs/mt-db-x3/README.txt
deleted file mode 100644
index 5ea012e1fff9b19f8d4bc85134563cc3b8c35e91..0000000000000000000000000000000000000000
--- a/configs/mt-db-x3/README.txt
+++ /dev/null
@@ -1,88 +0,0 @@
-README
-======
-
-  This README file discusses the port of NuttX to the MT-DB-X3 development
-  board from MattairTech.  This board may host a variety of 64-pin AVR XMega
-  part.  This port was specifically performed using the ATXmega384c3.
-
-  See the MattairTech website for further information about the MT-DB-X3:
-  http://www.mattairtech.com/.
-
-  NOTE: There is no port for the XMEGA in place as of this writing.  At this
-  point in time, this README file is only a repository for pre-porting
-  information.  It is not clear as of this writing whether there ever will
-  be a port to the MT-DB-X3 development board or not.
-
-Contents
-========
-
-  - PIO Usage
-  - LEDs and Buttons
-  - Serial Console
-  - Configurations
-
-PIO Usage
-=========
-
-  PA0  CONN_P_10 pin 1, Aref via J34
-  PA1  CONN_P_10 pin 2
-  PA2  CONN_P_10 pin 3
-  PA3  CONN_P_10 pin 4
-  PA4  CONN_P_10 pin 5
-  PA5  CONN_P_10 pin 6
-  PA6  CONN_P_10 pin 7
-  PA7  CONN_P_10 pin 8
-
-  PB0  CONN_P_10 pin 9, Aref via J25
-  PB1  CONN_P_10 pin 10
-  PB2  C4_LS CONN_P14 pin 5
-  PB3  C4_LS CONN_P14 pin 5
-  PB4  C4_LS CONN_P14 pin 5, Alt JTAG TMS
-  PB5  C4_LS CONN_P14 pin 5, Alt JTAG TDI
-  PB6  C4_LS CONN_P14 pin 5, Alt JTAG TCK
-  PB7  C4_LS CONN_P14 pin 5, Alt JTAG TDO, Voltage measurement via J15
-
-  PC0  C0_LS CONN_P14 pin 7
-  PC1  C1_LS CONN_P14 pin 8
-  PC2  C2_LS CONN_P14 pin 9
-  PC3  C3_LS CONN_P14 pin 10
-  PC4  C4_LS CONN_P14 pin 5, PDI/SPI Header pin 5 via J8
-  PC5  C5_LS CONN_P14 pin 6, PDI/SPI Header pin 4 via J8
-  PC6  C6_LS CONN_P14 pin 7, PDI/SPI Header pin 1 via J13
-  PC7  C7_LS CONN_P14 pin 8, PDI/SPI Header pin 3 via J12
-
-  PD0  CONN_P14 pin 9
-  PD1  CONN_P14 pin 10
-  PD2  CONN_P14 pin 11
-  PD3  CONN_P14 pin 12
-  PD4  CONN_P14 pin 13
-  PD5  CONN_P14 pin 14, TXB0103 Output Enable
-  PD6  CONN_P14 pin 12, USB D-
-  PD7  CONN_P14 pin 13, USB D+
-
-  PE0  CONN_P10 pin 1
-  PE1  CONN_P10 pin 2
-  PE2  CONN_P10 pin 3
-  PE3  CONN_P10 pin 4
-  PE4  CONN_P10 pin 5
-  PE5  CONN_P10 pin 6
-  PE6  CONN_P10 pin 7, TOSC1 via J28
-  PE7  CONN_P10 pin 8, TOSC1 via J29
-
-  PF0  PORT F pin 1
-  PF1  PORT F pin 2
-  PF2  PORT F pin 3
-  PF3  PORT F pin 4
-  PF4  PORT F pin 5, Bootloader jumper
-  PF5  PORT F pin 6
-  PF6  PORT F pin 7, Green LED via J31
-  PF7  PORT F pin 8, User button via J33 (otherwise reset)
-
-LEDs and Buttons
-================
-
-Serial Console
-==============
-
-Configurations
-==============
diff --git a/configs/mx1ads/ostest/Make.defs b/configs/mx1ads/ostest/Make.defs
index 8588969b68f71431ad020ee63fadd7df703d04b3..23c9179cce0e2813541d03a500599ac54bd17293 100644
--- a/configs/mx1ads/ostest/Make.defs
+++ b/configs/mx1ads/ostest/Make.defs
@@ -51,7 +51,7 @@ ARCHCCVERSION		= ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^g
 ARCHCCMAJOR		= ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
 
 ARCHCFLAGS		= -fno-builtin
-ARCHCXXFLAGS		= -fno-builtin -fno-exceptions
+ARCHCXXFLAGS		= -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
 
diff --git a/configs/mx1ads/ostest/defconfig b/configs/mx1ads/ostest/defconfig
index 0740d2a158b1cf7564bf55b77550366614c0d8f4..94fb691ece4621dc052ee59587edbccc55d69155 100644
--- a/configs/mx1ads/ostest/defconfig
+++ b/configs/mx1ads/ostest/defconfig
@@ -37,12 +37,15 @@ CONFIG_BUILD_FLAT=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
@@ -57,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -70,13 +72,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
 CONFIG_ARCH_CHIP_IMX1=y
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
 # CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -85,24 +89,51 @@ CONFIG_ARCH_CHIP_IMX1=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 CONFIG_ARCH_ARM920T=y
 # CONFIG_ARCH_CORTEXM0 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="imx1"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
 # CONFIG_ARCH_ROMPGTABLE is not set
 
+#
+# ARM Configuration Options
+#
+# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARM_TOOLCHAIN_GNU_EABIL=y
+# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set
+
 #
 # iMX.1 Peripheral Selection
 #
@@ -124,11 +155,14 @@ CONFIG_RAM_NUTTXENTRY=0x01004000
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 CONFIG_ARCH_HAVE_MMU=y
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 CONFIG_ARCH_USE_MMU=y
 # CONFIG_PAGING is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -186,6 +220,7 @@ CONFIG_ARCH_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_LIB_BOARDCTL is not set
 
 #
 # RTOS Features
@@ -215,8 +250,12 @@ CONFIG_PREALLOC_TIMERS=8
 #
 # Tasks and Scheduling
 #
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="ostest_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=64
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -267,6 +306,14 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=32
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
 
 #
 # Stack and heap information
@@ -293,32 +340,60 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
 # CONFIG_SPI_EXCHANGE is not set
 # CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_CALLBACK is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
-# CONFIG_TIMER is not set
 # CONFIG_ANALOG is not set
 # CONFIG_AUDIO_DEVICES is not set
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -341,13 +416,15 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART6_SERIALDRIVER is not set
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART1_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
 
 #
@@ -361,20 +438,23 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -399,14 +479,11 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
 # CONFIG_FS_READABLE is not set
 # CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -430,7 +507,11 @@ CONFIG_HEAP2_SIZE=0
 # CONFIG_AUDIO is not set
 
 #
-# Binary Formats
+# Wireless Support
+#
+
+#
+# Binary Loader
 #
 # CONFIG_BINFMT_DISABLE is not set
 # CONFIG_NXFLAT is not set
@@ -453,6 +534,7 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -464,14 +546,17 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
 CONFIG_ARCH_LOWPUTC=y
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -486,14 +571,13 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -501,11 +585,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -513,12 +597,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 CONFIG_EXAMPLES_OSTEST=y
 CONFIG_EXAMPLES_OSTEST_LOOPS=1
@@ -526,62 +609,63 @@ CONFIG_EXAMPLES_OSTEST_STACKSIZE=2048
 CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=8
 CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000
 CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
 #
 # CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
 
 #
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
 # CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
@@ -600,111 +684,16 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 #
 # System Libraries and NSH Add-Ons
 #
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# EMACS-like Command Line Editor
-#
 # CONFIG_SYSTEM_CLE is not set
-
-#
-# FLASH Program Installation
-#
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# Intel HEX to binary conversion
-#
-# CONFIG_SYSTEM_HEX2BIN is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-
-#
-# P-Code Support
-#
-
-#
-# PHY Tool
-#
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sudoku
-#
 # CONFIG_SYSTEM_SUDOKU is not set
-
-#
-# Sysinfo
-#
-
-#
-# VI Work-Alike Editor
-#
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# USB Monitor
-#
-
-#
-# Zmodem Commands
-#
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/ne64badge/README.txt b/configs/ne64badge/README.txt
index fd5933f81aa03ee0875e3f2dec4fa85c7ebd5a0d..5eb2bc7d82036069facbe86c50781737206d4c4c 100644
--- a/configs/ne64badge/README.txt
+++ b/configs/ne64badge/README.txt
@@ -422,7 +422,7 @@ HCS12/NE64BADGE-specific Configuration Options
 
   GPIO Interrupts
 
-    CONFIG_GPIO_IRQ - Enable general support for GPIO IRQs
+    CONFIG_HCS12_GPIOIRQ - Enable general support for GPIO IRQs
     CONFIG_HCS12_PORTG_INTS - Enable PortG IRQs
     CONFIG_HCS12_PORTH_INTS - Enable PortH IRQs
     CONFIG_HCS12_PORTJ_INTS - Enable PortJ IRQs
diff --git a/configs/ne64badge/ostest/Make.defs b/configs/ne64badge/ostest/Make.defs
index 113d980e3062ae43c188d7ed367618e82740c498..49ba82d8cffaabb3f41cab701e57a4f344ceb323 100644
--- a/configs/ne64badge/ostest/Make.defs
+++ b/configs/ne64badge/ostest/Make.defs
@@ -93,7 +93,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/ne64badge/ostest/defconfig b/configs/ne64badge/ostest/defconfig
index f13118e580399c7f501fc373edde47d218f503fe..4cffbda4f8919226fb2312b636af4fb0b4eba0c8 100644
--- a/configs/ne64badge/ostest/defconfig
+++ b/configs/ne64badge/ostest/defconfig
@@ -38,7 +38,7 @@ CONFIG_MOTOROLA_SREC=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
@@ -53,8 +53,7 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 CONFIG_ARCH_HC=y
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -187,7 +186,7 @@ CONFIG_USER_ENTRYPOINT="ostest_main"
 CONFIG_DISABLE_OS_API=y
 CONFIG_DISABLE_POSIX_TIMERS=y
 CONFIG_DISABLE_PTHREAD=y
-CONFIG_DISABLE_SIGNALS=y
+# CONFIG_DISABLE_SIGNALS is not set
 CONFIG_DISABLE_MQUEUE=y
 CONFIG_DISABLE_ENVIRON=y
 
@@ -243,7 +242,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 # CONFIG_16550_UART is not set
@@ -292,7 +290,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # System Logging
 #
 
-# CONFIG_SYSLOG is not set
 
 #
 # Graphics Support
@@ -329,7 +326,7 @@ CONFIG_MM_REGIONS=1
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -349,7 +346,6 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Non-standard Library Support
@@ -413,7 +409,6 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
diff --git a/configs/ne64badge/src/m9s12_buttons.c b/configs/ne64badge/src/m9s12_buttons.c
index 587cf884ec29a62bdbe12da0655ee65ebe67f11e..522d402c49173fdfa7de4068ba8d3ff2ee465c15 100644
--- a/configs/ne64badge/src/m9s12_buttons.c
+++ b/configs/ne64badge/src/m9s12_buttons.c
@@ -53,42 +53,23 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* Enables debug output from this file (needs CONFIG_DEBUG with
- * CONFIG_DEBUG_VERBOSE too)
- */
-
-#undef BUTTON_DEBUG   /* Define to enable debug */
-#undef BUTTON_VERBOSE /* Define to enable verbose debug */
-
-#ifdef BUTTON_DEBUG
-#  define btndbg  lldbg
-#  ifdef BUTTON_VERBOSE
-#    define btnvdbg lldbg
-#  else
-#    define btnvdbg(x...)
+#ifdef CONFIG_DEBUG_INPUT
+#  define btnerr        _err
+#  define btninfo(x...) _info
 #  endif
 #else
-#  undef BUTTON_VERBOSE
-#  define btndbg(x...)
-#  define btnvdbg(x...)
+#  define btnerr(x...)
+#  define btninfo(x...)
 #endif
 
 /* Dump GPIO registers */
 
-#ifdef BUTTON_VERBOSE
+#ifdef CONFIG_DEBUG_INPUT
 #  define btn_dumpgpio(m) m9s12_dumpgpio(m)
 #else
 #  define btn_dumpgpio(m)
 #endif
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/ne64badge/src/m9s12_leds.c b/configs/ne64badge/src/m9s12_leds.c
index 22fa22272ea65abe99fda2d61d1a9608c9513d41..cc30ec32a388596142af68f5e47ed3811166a076 100644
--- a/configs/ne64badge/src/m9s12_leds.c
+++ b/configs/ne64badge/src/m9s12_leds.c
@@ -52,25 +52,9 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS)
+#ifdef CONFIG_DEBUG_LEDS_INFO
 #  define led_dumpgpio(m) m9s12_dumpgpio(m)
 #else
 #  define led_dumpgpio(m)
diff --git a/configs/ne64badge/src/m9s12_spi.c b/configs/ne64badge/src/m9s12_spi.c
index bb4e3bc6967369f2a21c67765de255d6e314127f..1539d0ca475448474b9e55b6d17240b4f1d8d254 100644
--- a/configs/ne64badge/src/m9s12_spi.c
+++ b/configs/ne64badge/src/m9s12_spi.c
@@ -50,32 +50,6 @@
 
 #if defined(CONFIG_HCS12_SPI)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
diff --git a/configs/nr5m100-nexys4/Kconfig b/configs/nr5m100-nexys4/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..8824428a4d5816af56ce446571f389b003879b3e
--- /dev/null
+++ b/configs/nr5m100-nexys4/Kconfig
@@ -0,0 +1,9 @@
+#
+# For a description of the syntax of this configuration file,
+# see misc/tools/kconfig-language.txt.
+#
+
+if ARCH_BOARD_NR5M100_NEXYS4
+
+
+endif
diff --git a/configs/nr5m100-nexys4/README.txt b/configs/nr5m100-nexys4/README.txt
new file mode 100644
index 0000000000000000000000000000000000000000..fc939aa4c6006f101ec78e171f3ee3b8f5830633
--- /dev/null
+++ b/configs/nr5m100-nexys4/README.txt
@@ -0,0 +1,251 @@
+README
+======
+
+This README discusses issues unique to NuttX configurations for the
+IQ-Analog NR5M100 FPGA implementation of a RISC-V core on the Digilent
+Nexys4 FPGA board.
+
+The port is currently very minimal, though additional support may be
+added in the future to address more of the board peripherals supplied
+on the FPGA board. Those peripherals include:
+
+  Supported:
+  - USB UART (console port)
+  - 16 single color LEDs
+  - 16 slide switch inputs
+  - Two tri-color LEDs
+  - 5 Joystick style pushbuttons
+  - 16 GPIO pins on 2 of the PMOD expansion connectors
+
+  Not supported:
+  - VGA display port
+  - 8 digit 7-segement display
+  - SD card slot
+  - SPI FLASH memory (shared with FPGA configuration data).
+  - USB HID (single device) connector serviced by external PIC uC
+  - Non-DDR (older version): 16 MB Cellular SRAM
+  - DDR (newer version): 128 MB DDR2 SDRAM
+  - Microphone
+  - 10/100 Ethernet PHY
+  - 3-Axis accelerometer
+  - Temperature sensor
+
+See http://store.digilentinc.com/nexys-4-ddr-artix-7-fpga-trainer-board-recommended-for-ece-curriculum/ 
+or http://store.digilentinc.com/nexys-4-artix-7-fpga-trainer-board-limited-time-see-nexys4-ddr/
+for more information about these boards.
+
+Contents
+========
+
+  - NR5M100 Overview
+  - Development Environment
+  - GNU Toolchain Options
+  - Debugger
+  - IDEs
+  - LEDs
+  - PWM
+  - UARTs
+  - Timer Inputs/Outputs
+  - FSMC SRAM
+  - SSD1289
+  - Mikroe-STM32F4-specific Configuration Options
+  - Configurations
+
+Development Environment
+=======================
+  The NR5M100 RISC-V core was designed as a low gate count / low performance micro controller 
+  for inclusion in an ASIC.  It is based on a Verilog RISC-V called picorv32, but has many
+  additions beyond that baseline.  The design running on the Digilent Nexys4 FPGA is a 
+  validation platform for the core and is presented as an open source project.
+
+  The reason NR5M100 is "low performance" is that it is a state machine based core (like the
+  picorv32) and not a multi-stage pipeline core.  This means that it requires an average of
+  4.5 clock cycles to execute each instruction.  On a multi-stage pipeline architecure, this
+  average would be closer to 1 clock cycle per instruction (though a bit higher due to 
+  pipeline branch misses).  The tradeoff for lower performance is a simpler design.  There
+  is a single memory bus interface for both instructions and data.  Multi-stage pipeline
+  cores require a separate I and D bus with cache SRAM and an external memory cache controller,
+  etc.  This in addition to the pipeline registers adds additional gate count.
+
+  The nr5m100-nexys4 core runs at 83.333 Mhz which provides about 18 Mhz effective operating
+  speed with the multi-clock per instruction architecture.  If you are looking for a higher 
+  performance platform, you should check out the PULP Platform ( http://www.pulp-platform.org ).  
+  That is an FPGA design with a 4-stage pipeline RISC-V core, though not currently supported 
+  by NuttX.  The NR5M100 project will likely pull in the RISC-V core from that design next, 
+  though this will probably not be available soon.  With a bit of work, it is possible to
+  run the nr5m100-nexys4 core at 170 Mhz with a 6.5 clocks-per-instruction state machine.
+  This would give an effective performance of about 26Mhz.
+
+Development Environment
+=======================
+
+  Linux is the best choice for development, though Cygwin on Windows may work.
+  The source has been built only using the GNU toolchain (see below) under a Linux
+  environment.  Other toolchains will likely cause problems or not be available yet.
+
+RISC-V GNU Toolchain
+====================
+
+  To compile the code, you must first build a RISC-V GNU Toolchain from the sources at
+  https://github.com/riscv/riscv-gnu-toolchain.  I don't know of any sources for pre-compiled 
+  toolchains (though there may be some out there). 
+
+  To build this toolchain, follow these instructions (tested on Ubuntu 12.04):
+
+  1. Create a working directory in your home folder:
+
+     mkdir ~/riscv
+     cd ~/riscv
+
+  2. Clone the GNU source tree:
+
+     git clone --recursive https://github.com/riscv/riscv-gnu-toolchain
+
+  3. Ensure the following packages are installed:
+
+     sudo apt-get install texinfo bison flex autoconf automake libgmp-dev libmpfr-dev libmpc-dev
+
+  4. Configure and build the toolchain:
+
+     cd riscv-gnu-toolchain
+     ./configure --with-xlen=64 --with-arch=I --disable-float --disable-atomic --enable-multilib --prefix=~/riscv
+     make -j4  (or -j8 based on how many cores you have)
+
+  5. Setup your PATH environment variable to include the toolchain (you may want to add this to
+     your shell login script, such as .bash_profile, etc.):
+
+     export PATH=~/riscv/bin:$PATH
+
+  Windows based toolchain
+  -----------------------
+  May be possible to compile the GNU toolchain described above using Cygwin, but havne't tried it.  
+
+Debugger
+========
+  The Debug Module within the NR5M100 RISC-V has been designed to work with the RISC-V gdb 
+  debugger interfaced with the SiFive implementation of OpenOCD.  The interface has been tested
+  with a J-LINK JTAG probe connected to PMOD header B on the FPGA using an adapter board 
+  that I designed and fabbed at OSHPark.  I will update this README.txt file soon with a link
+  to the shared project for anyone who wishes to build one.
+  
+  To build OpenOCD, perform the following:
+
+  1. Ensure the proper packages are installed:
+
+     sudo apt-get install autoconf automake libtool libusb-1.0-0-dev
+
+  2. Download the latest OpenOCD sources from the SiFive github repo:
+
+     cd ~/riscv
+     git clone --recursive https://github.com/sifive/openocd.git
+
+  3. Configure and build OpenOCD.  The x86_64 GCC compilers will give errors because of 
+     shadowed variable warnings, so diable the -Werror flag also:
+
+     cd openocd
+     sed -i 's/ -Werror//g' configure.ac
+     ./bootstrap
+     ./configure  --enable-jlink --enable-maintainer-mode --enable-ftdi --prefix=~/riscv CFLAGS=-g
+
+  The configuration scripts for openocd and nr5m100-nexys4 have been provided in the
+  nuttx/configs/nr5m100-nexys4/scripts directory.  They are configured to use a J-LINK JTAG
+  probe and to search for the IQ-Analog (the company I work for) IDCODE and part number for
+  the FPGA board (7a10 for Artix xc7a100 part on the Digilent Nexys4 board).  With FPGA
+  source directly from the nr5m100 github site (to be provided), this ID will match the
+  hardware.  If changes are made to the JEDEC ID and/or part number, then the nr5m100.cfg
+  file will need to be modified with the proper CPUID value.
+
+IDEs
+====
+
+  NuttX is built using command-line make.  It can be used with an IDE, but some
+  effort will be required to create the project.  While I haven't tried it as
+  I am not an IDE guy, the team at SiFive have reported that they now have
+  Eclipse working with the RISC-V gdb debugger.
+
+  NOTE:  The notes below are taken from an ARM build of NuttX, not RISC-V, so
+         they may or may not work.  Try it and see I suppose.
+
+  Makefile Build
+  --------------
+  Under Eclipse, it is pretty easy to set up an "empty makefile project" and
+  simply use the NuttX makefile to build the system.  That is almost for free
+  under Linux.  Under Windows, you will need to set up the "Cygwin GCC" empty
+  makefile project in order to work with Windows (Google for "Eclipse Cygwin" -
+  there is a lot of help on the internet).
+
+  Native Build
+  ------------
+  Here are a few tips before you start that effort:
+
+  1) Select the toolchain that you will be using in your .config file
+  2) Start the NuttX build at least one time from the Cygwin command line
+     before trying to create your project.  This is necessary to create
+     certain auto-generated files and directories that will be needed.
+  3) Set up include pathes:  You will need include/, arch/risc-v/src/rv32im,
+     arch/risc-v/src/common, arch/risc-v/src/nr5m100, and sched/.
+  4) All assembly files need to have the definition option -D __ASSEMBLY__
+     on the command line.
+
+  Startup files will probably cause you some headaches.  The NuttX startup file
+  is arch/risc-v/src/nr5m100/nr5_vectors.S.  With RIDE, I build NuttX
+  one time from the Cygwin command line in order to obtain the pre-built
+  startup object needed by RIDE.
+
+LEDs
+====
+
+The Nexys4 board has 16 single-color LEDs onboard, as well as 2 tri-color LEDs.
+These are supported using GPIO Ports A (16-single color) and B (tri-color).
+Additionally the tri-color LEDs can be driven from the Timer 1 or 2 PWM output
+signals.
+
+PWM
+===
+
+The nr5m100-nexys4 design has PWM capabilities within the Timer 1 and Timer 2
+modules.  These PWM signals can be muxed to the tri-color LEDs or to I/O
+pins on one of the PMOD expansion headers.
+
+UARTs
+=====
+
+The nr5m100-nexys4 design has an onboard USB-UART providing an RS-232 interface
+via the same USB cable that is used to program the FPGA.  The core proivdes a
+fixed 8-Data bit, 1 stop bit, no parity UART connected to this intrface.
+
+UART PINS
+---------
+
+UART1
+  RX      FPGA C4 (USB UART device)
+  TX      FPGA D4 (USB UART device)
+
+Default USART/UART Configuration
+--------------------------------
+
+UART1 is enabled in all configurations (see */defconfig).
+
+Configurations
+==============
+
+Each nr5m100-nexys4 configuration is maintained in a sub-directory and
+can be selected as follow:
+
+    cd tools
+    ./configure.sh nr5m100-nexys4/
+    cd -
+    . ./setenv.sh
+
+If this is a Windows native build, then configure.bat should be used
+instead of configure.sh:
+
+    configure.bat nr5m100-nexys4\
+
+Where  is one of the following:
+
+  nsh
+  ---
+  This is an NSH example that uses UART1 as the console.  UART1 is connected
+  to the USB UART bridge on the FPGA board.
+
diff --git a/configs/nr5m100-nexys4/include/board.h b/configs/nr5m100-nexys4/include/board.h
new file mode 100644
index 0000000000000000000000000000000000000000..0d2dd772f34bf995632c8da69cf693c7f977cdc2
--- /dev/null
+++ b/configs/nr5m100-nexys4/include/board.h
@@ -0,0 +1,176 @@
+/************************************************************************************
+ * configs/nr5m100-nexys4/include/board.h
+ * include/arch/board/board.h
+ *
+ *   Copyright (C) 2012-2013, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ *   Modified for NR5M100:
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __CONFIG_NR5M100_NEXYS4_INCLUDE_BOARD_H
+#define __CONFIG_NR5M100_NEXYS4_INCLUDE_BOARD_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#ifndef __ASSEMBLY__
+# include 
+#endif
+
+#include "nr5.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Clocking *************************************************************************/
+/* The NR5M100_Nexys4 system uses a 100 MHz main oscillator */
+
+#define NR5_HCLK_FREQUENCY      100000000ul
+#define NR5_SCLK_FREQUENCY      100000000ul
+
+/* Timer Frequencies are the same as the HCLK frequency
+ */
+
+#define NR5_TIMER_FREQUENCY     NR5_HCLK_FREQUENCY
+
+/* LED definitions ******************************************************************/
+/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any
+ * way.  The following definitions are used to access individual LEDs.
+ */
+
+/* LED index values for use with stm32_setled() */
+
+#if 0
+#define BOARD_LED1        0
+#define BOARD_LED2        1
+#define BOARD_LED3        2
+#define BOARD_LED4        3
+#endif
+#define BOARD_NLEDS       0
+
+#if 1
+#define BOARD_LED_GREEN   BOARD_LED1
+#define BOARD_LED_ORANGE  BOARD_LED2
+#define BOARD_LED_RED     BOARD_LED3
+#define BOARD_LED_BLUE    BOARD_LED4
+
+/* LED bits for use with nr5_setleds() */
+
+#define BOARD_LED1_BIT    (1 << BOARD_LED1)
+#define BOARD_LED2_BIT    (1 << BOARD_LED2)
+#define BOARD_LED3_BIT    (1 << BOARD_LED3)
+#define BOARD_LED4_BIT    (1 << BOARD_LED4)
+
+/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on board the
+ * stm32f4discovery.  The following definitions describe how NuttX controls the LEDs:
+ */
+
+#define LED_STARTED       0  /* LED1 */
+#define LED_HEAPALLOCATE  1  /* LED2 */
+#define LED_IRQSENABLED   2  /* LED1 + LED2 */
+#define LED_STACKCREATED  3  /* LED3 */
+#define LED_INIRQ         4  /* LED1 + LED3 */
+#define LED_SIGNAL        5  /* LED2 + LED3 */
+#define LED_ASSERTION     6  /* LED1 + LED2 + LED3 */
+#define LED_PANIC         7  /* N/C  + N/C  + N/C + LED4 */
+
+/* Button definitions ***************************************************************/
+/* The STM32F4 Discovery supports one button: */
+
+#define BUTTON_USER        0
+
+#define NUM_BUTTONS        5
+
+#define BUTTON_USER_BIT    (1 << BUTTON_USER)
+
+#endif  /* 0 */
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+/************************************************************************************
+ * Name: nr5_boardinitialize
+ *
+ * Description:
+ *   All NR5 architectures must provide the following entry point.  This entry point
+ *   is called early in the intitialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void nr5_boardinitialize(void);
+
+/************************************************************************************
+ * Name:  nr5_ledinit, nr5_setled, and nr5_setleds
+ *
+ * Description:
+ *   If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board LEDs.  If
+ *   CONFIG_ARCH_LEDS is not defined, then the following interfacesare available to
+ *   control the LEDs from user applications.
+ *
+ ************************************************************************************/
+
+#ifndef CONFIG_ARCH_LEDS
+void nr5_ledinit(void);
+void nr5_setled(int led, bool ledon);
+void nr5_setleds(uint8_t ledset);
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+#endif /* __ASSEMBLY__ */
+#endif /* __CONFIG_NR5M100_NEXYS4_INCLUDE_BOARD_H */
+
diff --git a/configs/nr5m100-nexys4/nsh/Make.defs b/configs/nr5m100-nexys4/nsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..190f6def749206073715c972b33a92ff275a2348
--- /dev/null
+++ b/configs/nr5m100-nexys4/nsh/Make.defs
@@ -0,0 +1,114 @@
+############################################################################
+# configs/stm32f4discovery/nsh/Make.defs
+#
+#   Copyright (C) 2011-2013 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/risc-v/src/rv32im/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+  ASARCHCPUFLAGS += -Wa,-g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS += $(CFLAGS) -D__ASSEMBLY__ $(ASARCHCPUFLAGS)
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs -melf32lriscv
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g -melf32lriscv
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/compal_e86/nsh_highram/defconfig b/configs/nr5m100-nexys4/nsh/defconfig
similarity index 69%
rename from configs/compal_e86/nsh_highram/defconfig
rename to configs/nr5m100-nexys4/nsh/defconfig
index e521e8e7daf8f868ab85174964963434e377d78e..41f9eccb728add88823304f2f2f09c9cdb0a9d1f 100644
--- a/configs/compal_e86/nsh_highram/defconfig
+++ b/configs/nr5m100-nexys4/nsh/defconfig
@@ -16,7 +16,7 @@ CONFIG_HOST_LINUX=y
 #
 # Build Configuration
 #
-# CONFIG_APPS_DIR="../apps"
+CONFIG_APPS_DIR="../apps"
 CONFIG_BUILD_FLAT=y
 # CONFIG_BUILD_2PASS is not set
 
@@ -24,7 +24,7 @@ CONFIG_BUILD_FLAT=y
 # Binary Output Formats
 #
 # CONFIG_RRLOAD_BINARY is not set
-# CONFIG_INTELHEX_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
 # CONFIG_MOTOROLA_SREC is not set
 CONFIG_RAW_BINARY=y
 # CONFIG_UBOOT_UIMAGE is not set
@@ -37,15 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+# CONFIG_ARCH_HAVE_STACKCHECK is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
-CONFIG_ARCH_HAVE_STACKCHECK=y
-# CONFIG_STACK_COLORATION is not set
-# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
 # CONFIG_DEBUG_CUSTOMOPT is not set
@@ -54,98 +55,58 @@ CONFIG_DEBUG_FULLOPT=y
 #
 # System Type
 #
-CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_ARM is not set
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
+CONFIG_ARCH_RISCV=y
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
-CONFIG_ARCH="arm"
-
-#
-# ARM Options
-#
-# CONFIG_ARCH_CHIP_A1X is not set
-# CONFIG_ARCH_CHIP_C5471 is not set
-CONFIG_ARCH_CHIP_CALYPSO=y
-# CONFIG_ARCH_CHIP_DM320 is not set
-# CONFIG_ARCH_CHIP_EFM32 is not set
-# CONFIG_ARCH_CHIP_IMX1 is not set
-# CONFIG_ARCH_CHIP_KINETIS is not set
-# CONFIG_ARCH_CHIP_KL is not set
-# CONFIG_ARCH_CHIP_LM is not set
-# CONFIG_ARCH_CHIP_TIVA is not set
-# CONFIG_ARCH_CHIP_LPC11XX is not set
-# CONFIG_ARCH_CHIP_LPC17XX is not set
-# CONFIG_ARCH_CHIP_LPC214X is not set
-# CONFIG_ARCH_CHIP_LPC2378 is not set
-# CONFIG_ARCH_CHIP_LPC31XX is not set
-# CONFIG_ARCH_CHIP_LPC43XX is not set
-# CONFIG_ARCH_CHIP_NUC1XX is not set
-# CONFIG_ARCH_CHIP_SAMA5 is not set
-# CONFIG_ARCH_CHIP_SAMD is not set
-# CONFIG_ARCH_CHIP_SAML is not set
-# CONFIG_ARCH_CHIP_SAM34 is not set
-# CONFIG_ARCH_CHIP_SAMV7 is not set
-# CONFIG_ARCH_CHIP_STM32 is not set
-# CONFIG_ARCH_CHIP_STR71X is not set
-CONFIG_ARCH_ARM7TDMI=y
-# CONFIG_ARCH_ARM926EJS is not set
-# CONFIG_ARCH_ARM920T is not set
-# CONFIG_ARCH_CORTEXM0 is not set
-# CONFIG_ARCH_CORTEXM3 is not set
-# CONFIG_ARCH_CORTEXM4 is not set
-# CONFIG_ARCH_CORTEXM7 is not set
-# CONFIG_ARCH_CORTEXA5 is not set
-# CONFIG_ARCH_CORTEXA8 is not set
-CONFIG_ARCH_FAMILY="arm"
-CONFIG_ARCH_CHIP="calypso"
-# CONFIG_ARCH_HAVE_FPU is not set
-# CONFIG_ARCH_HAVE_DPFPU is not set
-CONFIG_ARCH_HAVE_LOWVECTORS=y
-# CONFIG_ARCH_LOWVECTORS is not set
-
-#
-# ARM Configuration Options
-#
-# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set
-# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set
-CONFIG_ARM_TOOLCHAIN_GNU_EABIL=y
-# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set
-CONFIG_UART_IRDA_BAUD=115200
-CONFIG_UART_IRDA_PARITY=0
-CONFIG_UART_IRDA_BITS=8
-CONFIG_UART_IRDA_2STOP=0
-CONFIG_UART_IRDA_RXBUFSIZE=256
-CONFIG_UART_IRDA_TXBUFSIZE=256
-CONFIG_UART_MODEM_BAUD=115200
-CONFIG_UART_MODEM_PARITY=0
-CONFIG_UART_MODEM_BITS=8
-CONFIG_UART_MODEM_2STOP=0
-CONFIG_UART_MODEM_RXBUFSIZE=256
-CONFIG_UART_MODEM_TXBUFSIZE=256
-
-#
-# Calypso Configuration Options
-#
-
-#
-# Modem UART Configuration
-#
-# CONFIG_UART_MODEM_HWFLOWCONTROL is not set
-
-#
-# IrDA UART Configuration
-#
-# CONFIG_UART_IRDA_HWFLOWCONTROL is not set
-# CONFIG_USE_SERCOMM_CONSOLE is not set
-# CONFIG_SERIAL_MODEM_CONSOLE is not set
-# CONFIG_SERIAL_IRDA_CONSOLE is not set
-CONFIG_SERIAL_CONSOLE_NONE=y
+CONFIG_ARCH="risc-v"
+CONFIG_ARCH_CHIP="nr5m100"
+# CONFIG_SERIAL_TERMIOS is not set
+
+#
+# RISC-V Options
+#
+CONFIG_ARCH_CHIP_NR5M100=y
+# CONFIG_ARCH_RV32I is not set
+CONFIG_ARCH_RV32IM=y
+
+#
+# RV32IM Configuration Options
+#
+CONFIG_RV32IM_TOOLCHAIN_GNU_RVGL=y
+CONFIG_RV32IM_HW_MULDIV=y
+CONFIG_RV32IM_SYSTEM_CSRRS_SUPPORT=y
+# CONFIG_RV32IM_CUSTOM_IRQ_SUPPORT is not set
+
+#
+# NanoRisc5 Configuration Options
+#
+CONFIG_NR5_NR5M100=y
+CONFIG_NR5_NR5M1XX=y
+# CONFIG_NR5_EPIC is not set
+
+#
+# NR5 Peripheral Support
+#
+CONFIG_NR5_HAVE_UART1=y
+CONFIG_NR5_HAVE_TIMER1=y
+# CONFIG_NR5_HAVE_TIM2 is not set
+# CONFIG_NR5_HAVE_I2C1 is not set
+# CONFIG_NR5_HAVE_SPI1 is not set
+# CONFIG_NR5_I2C1 is not set
+# CONFIG_NR5_SPI1 is not set
+CONFIG_NR5_TIMER1=y
+CONFIG_NR5_TIMER2=y
+CONFIG_NR5_UART1=y
+CONFIG_NR5_UART=y
+CONFIG_NR5_UART_RX_BUF_SIZE=64
+CONFIG_NR5_UART_TX_BUF_SIZE=64
 
 #
 # Architecture Options
@@ -158,14 +119,15 @@ CONFIG_SERIAL_CONSOLE_NONE=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
-CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+# CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
-CONFIG_ARCH_HAVE_POWEROFF=y
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 CONFIG_ARCH_STACKDUMP=y
-# CONFIG_ENDIAN_BIG is not set
 # CONFIG_ARCH_IDLE_CUSTOM is not set
 # CONFIG_ARCH_HAVE_RAMFUNCS is not set
 # CONFIG_ARCH_HAVE_RAMVECTORS is not set
@@ -173,14 +135,14 @@ CONFIG_ARCH_STACKDUMP=y
 #
 # Board Settings
 #
-CONFIG_BOARD_LOOPSPERMSEC=1250
-# CONFIG_ARCH_CALIBRATION is not set
+CONFIG_BOARD_LOOPSPERMSEC=15000
+CONFIG_ARCH_CALIBRATION=y
 
 #
 # Interrupt options
 #
 CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
-CONFIG_ARCH_INTERRUPTSTACK=1024
+CONFIG_ARCH_INTERRUPTSTACK=0
 # CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set
 
 #
@@ -195,33 +157,28 @@ CONFIG_BOOT_RUNFROMFLASH=y
 #
 # Boot Memory Configuration
 #
-CONFIG_RAM_START=0
-CONFIG_RAM_SIZE=8650752
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=114688
 # CONFIG_ARCH_HAVE_SDRAM is not set
 
 #
 # Board Selection
 #
-CONFIG_ARCH_BOARD_COMPALE86=y
-# CONFIG_ARCH_BOARD_COMPALE88 is not set
-# CONFIG_ARCH_BOARD_COMPALE99 is not set
-# CONFIG_ARCH_BOARD_PIRELLI_DPL10 is not set
+CONFIG_ARCH_BOARD_NR5M100_NEXYS4=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
-CONFIG_ARCH_BOARD="compal_e86"
+CONFIG_ARCH_BOARD="nr5m100-nexys4"
 
 #
 # Common Board Options
 #
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
-CONFIG_BOARDCTL_POWEROFF=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -232,7 +189,7 @@ CONFIG_DISABLE_OS_API=y
 # CONFIG_DISABLE_POSIX_TIMERS is not set
 # CONFIG_DISABLE_PTHREAD is not set
 # CONFIG_DISABLE_SIGNALS is not set
-CONFIG_DISABLE_MQUEUE=y
+# CONFIG_DISABLE_MQUEUE is not set
 # CONFIG_DISABLE_ENVIRON is not set
 
 #
@@ -241,14 +198,15 @@ CONFIG_DISABLE_MQUEUE=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
-CONFIG_START_YEAR=2007
-CONFIG_START_MONTH=2
-CONFIG_START_DAY=13
-CONFIG_MAX_WDOGPARMS=4
-CONFIG_PREALLOC_WDOGS=8
-CONFIG_WDOG_INTRESERVE=1
-CONFIG_PREALLOC_TIMERS=8
+CONFIG_START_YEAR=2013
+CONFIG_START_MONTH=1
+CONFIG_START_DAY=27
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
 
 #
 # Tasks and Scheduling
@@ -258,6 +216,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -281,7 +240,7 @@ CONFIG_NPTHREAD_KEYS=4
 CONFIG_DEV_CONSOLE=y
 # CONFIG_FDCLONE_DISABLE is not set
 # CONFIG_FDCLONE_STDIO is not set
-CONFIG_SDCLONE_DISABLE=y
+# CONFIG_SDCLONE_DISABLE is not set
 CONFIG_NFILE_DESCRIPTORS=8
 CONFIG_NFILE_STREAMS=8
 CONFIG_NAME_MAX=32
@@ -304,7 +263,14 @@ CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
 
 #
-# Work Queue Support
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=32
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -324,7 +290,8 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 #
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
-# CONFIG_DEV_ZERO is not set
+CONFIG_DEV_ZERO=y
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -335,20 +302,18 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
-CONFIG_SPI=y
-CONFIG_SPI_EXCHANGE=y
-# CONFIG_SPI_CMDDATA is not set
-# CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -356,21 +321,41 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
-# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART_SERIALDRIVER=y
 # CONFIG_UART0_SERIALDRIVER is not set
-# CONFIG_UART1_SERIALDRIVER is not set
+CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_UART2_SERIALDRIVER is not set
 # CONFIG_UART3_SERIALDRIVER is not set
 # CONFIG_UART4_SERIALDRIVER is not set
@@ -389,31 +374,64 @@ CONFIG_SERIAL=y
 # CONFIG_USART6_SERIALDRIVER is not set
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
-CONFIG_OTHER_UART_SERIALDRIVER=y
-
-#
-# USART Configuration
-#
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
 CONFIG_MCU_SERIAL=y
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
-# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
-CONFIG_OTHER_SERIAL_CONSOLE=y
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+# CONFIG_UART_SERIAL_CONSOLE is not set
+CONFIG_UART1_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
-# CONFIG_USBDEV is not set
-# CONFIG_USBHOST is not set
-# CONFIG_DRIVERS_WIRELESS is not set
 
 #
-# System Logging Device Options
+# UART Configuration
+#
+CONFIG_UART_RXBUFSIZE=256
+CONFIG_UART_TXBUFSIZE=256
+CONFIG_UART_BAUD=115200
+CONFIG_UART_BITS=8
+CONFIG_UART_PARITY=0
+CONFIG_UART_2STOP=0
+# CONFIG_UART_IFLOWCONTROL is not set
+# CONFIG_UART_OFLOWCONTROL is not set
+# CONFIG_UART_DMA is not set
+
+#
+# UART1 Configuration
 #
+CONFIG_UART1_RXBUFSIZE=256
+CONFIG_UART1_TXBUFSIZE=256
+CONFIG_UART1_BAUD=115200
+CONFIG_UART1_BITS=8
+CONFIG_UART1_PARITY=0
+CONFIG_UART1_2STOP=0
+# CONFIG_UART1_IFLOWCONTROL is not set
+# CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
 # CONFIG_SYSLOG_CONSOLE is not set
+CONFIG_SYSLOG_NONE=y
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -438,23 +456,19 @@ CONFIG_OTHER_SERIAL_CONSOLE=y
 # CONFIG_FS_AUTOMOUNTER is not set
 # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
 # CONFIG_FS_READABLE is not set
-# CONFIG_FS_WRITABLE is not set
+CONFIG_FS_WRITABLE=y
 # CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -465,9 +479,7 @@ CONFIG_OTHER_SERIAL_CONSOLE=y
 #
 # CONFIG_MM_SMALL is not set
 CONFIG_MM_REGIONS=1
-CONFIG_ARCH_HAVE_HEAP2=y
-CONFIG_HEAP2_BASE=0x00000000
-CONFIG_HEAP2_SIZE=0
+# CONFIG_ARCH_HAVE_HEAP2 is not set
 # CONFIG_GRAN is not set
 
 #
@@ -475,6 +487,10 @@ CONFIG_HEAP2_SIZE=0
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -493,7 +509,7 @@ CONFIG_BUILTIN=y
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=1024
+CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
@@ -510,26 +526,39 @@ CONFIG_EOL_IS_EITHER_CRLF=y
 # CONFIG_LIBC_EXECFUNCS is not set
 CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
 CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
-# CONFIG_LIBC_STRERROR is not set
-# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_LIBC_STRERROR=y
+# CONFIG_LIBC_STRERROR_SHORT is not set
+CONFIG_LIBC_PERROR_STDOUT=y
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
 CONFIG_ARCH_LOWPUTC=y
 # CONFIG_LIBC_LOCALTIME is not set
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
 #
 # CONFIG_C99_BOOL8 is not set
-# CONFIG_HAVE_CXX is not set
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
 
 #
 # Application Configuration
@@ -540,57 +569,73 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
-CONFIG_EXAMPLES_HELLO=y
+# CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
 # CONFIG_EXAMPLES_NRF24L01TERM is not set
 CONFIG_EXAMPLES_NSH=y
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -602,37 +647,36 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
 #
 CONFIG_NSH_READLINE=y
 # CONFIG_NSH_CLE is not set
-CONFIG_NSH_LINELEN=80
+CONFIG_NSH_LINELEN=64
 # CONFIG_NSH_DISABLE_SEMICOLON is not set
 CONFIG_NSH_CMDPARMS=y
 CONFIG_NSH_MAXARGUMENTS=6
@@ -645,6 +689,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
@@ -653,6 +698,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -661,17 +707,19 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+# CONFIG_NSH_DISABLE_LOSMART is not set
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
-# CONFIG_NSH_DISABLE_MKRD is not set
+CONFIG_NSH_DISABLE_MKRD=y
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -680,20 +728,24 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
-# CONFIG_NSH_CMDOPT_DF_H is not set
+CONFIG_NSH_CMDOPT_DF_H=y
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
-CONFIG_NSH_FILEIOSIZE=1024
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_STRERROR=y
 
 #
 # Scripting Support
@@ -707,7 +759,9 @@ CONFIG_NSH_FILEIOSIZE=1024
 #
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
-# CONFIG_NSH_ARCHINIT is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -721,15 +775,20 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/rgmp/arm/nsh/setenv.sh b/configs/nr5m100-nexys4/nsh/setenv.sh
old mode 100755
new mode 100644
similarity index 88%
rename from configs/rgmp/arm/nsh/setenv.sh
rename to configs/nr5m100-nexys4/nsh/setenv.sh
index b2180473be88bd929e3b09fd39ed6b7574196298..83220855967b33e743e1a2ac84f281d4f573512e
--- a/configs/rgmp/arm/nsh/setenv.sh
+++ b/configs/nr5m100-nexys4/nsh/setenv.sh
@@ -1,10 +1,8 @@
 #!/bin/bash
-# config/rgmp/nsh/setenv.sh
+# configs/nr5m100-nexys4/nsh/setenv.sh
 #
-#   Copyright (C) 2011 Yu Qiang. All rights reserved.
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
-#   Authors: Yu Qiang 
-#            Gregory Nutt 
+#   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions
diff --git a/configs/nr5m100-nexys4/scripts/ld.script b/configs/nr5m100-nexys4/scripts/ld.script
new file mode 100644
index 0000000000000000000000000000000000000000..df856beb23d90c658b84d409bebc4aa8c753661e
--- /dev/null
+++ b/configs/nr5m100-nexys4/scripts/ld.script
@@ -0,0 +1,305 @@
+/****************************************************************************
+ * configs/nr5m100-nexys4/scripts/ld.script
+ *
+ *   Copyright (C) 2011-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Ken Pettit.
+ *   Author: Gregory Nutt 
+ *           Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/*======================================================================*/
+/* Linker script for nr5m100_nexys board                                */
+/*======================================================================*/
+
+/*----------------------------------------------------------------------*/
+/* Setup                                                                */
+/*----------------------------------------------------------------------*/
+
+/* The OUTPUT_ARCH command specifies the machine architecture where the
+   argument is one of the names used in the BFD library. More
+   specifically one of the entires in bfd/cpu-mips.c */
+
+OUTPUT_ARCH( "riscv" )
+
+/* Define the memory regions were we put stuff */
+MEMORY
+{
+  sram (rwx) : ORIGIN = 0x20000000, LENGTH = 384K
+}
+
+stack_size = 4096;
+
+/* Define the beginning and ending stack */
+__stack_start = ORIGIN(sram) + LENGTH(sram);
+__stack_end   = __stack_start - stack_size;
+
+
+/* The ENTRY command specifies the entry point (ie. first instruction to
+   execute). The symbol _start is defined in crt0.S */
+
+ENTRY( __reset )
+
+/* The GROUP command is special since the listed archives will be
+   searched repeatedly until there are no new undefined references. We
+   need this since -lc depends on -lgloss and -lgloss depends on -lc. I
+   thought gcc would automatically include -lgcc when needed, but
+   idt32.ld includes it explicitly here and I was seeing link errors
+   without it. */
+
+/*GROUP( -lc -lgloss -lgcc ) */
+GROUP( -lc )
+
+/*----------------------------------------------------------------------*/
+/* Sections                                                             */
+/*----------------------------------------------------------------------*/
+/* This is where we specify how the input sections map to output
+   sections. The .= commands set the location counter, and the
+   sections are inserted in increasing address order according to the
+   location counter. The following statement will take all of the .bar
+   input sections and reloate them into the .foo output section which
+   starts at address 0x1000.
+
+    . = 0.x1000;
+    .foo : { *(.bar) }
+
+   If we wrap an input specification with a KEEP command then it
+   prevents it from being eliminted during "link-time garbage
+   collection". I'm not sure what this is, so I just followed what was
+   done in idt32.ld.
+
+   We can also set a global external symbol to a specific address in the
+   output binary with this syntax:
+
+    _etext = .;
+    PROVIDE( etext = . );
+
+   This will set the global symbol _ftext to the current location. If we
+   wrap this in a PROVIDE commad, the symbol will only be set if it is
+   not defined. We do this with symbols which don't begin with an
+   underscore since technically in ansi C someone might have a function
+   with the same name (eg. etext).
+
+   If we need to label the beginning of a section we need to make sure
+   that the linker doesn't insert an orphan section inbetween where we
+   set the symbol and the actual begining of the section. We can do that
+   by assigning the location dot to itself.
+
+    . = .
+    _ftext = .;
+    .text :
+    { }
+
+   */
+
+SECTIONS
+{
+
+  /*--------------------------------------------------------------------*/
+  /* Startup vectors
+  /*--------------------------------------------------------------------*/
+  . = 0x20000000;
+  _vectors = .;
+
+  /* vectors: Program code section */
+  .vectors : 
+  {
+    *(.text.vec)
+    *(.text.vec.*)
+    *(.gnu.linkonce.t.*)
+  }
+  _evectors = .;
+
+  /*--------------------------------------------------------------------*/
+  /* Code and read-only segment                                         */
+  /*--------------------------------------------------------------------*/
+
+  /* Begining of code and text segment */
+  . = 0x20000030;
+  _ftext = .;
+  PROVIDE( eprol = . );
+
+  /* text: Program code section */
+  .text : 
+  {
+    _stext = ABSOLUTE(.);
+    *(.text)
+    *(.text.*)
+    *(.gnu.linkonce.t.*)
+  }
+
+  /* init: Code to execute before main (called by crt0.S) */
+  .init : 
+  {
+    KEEP( *(.init) )
+  }
+
+  /* fini: Code to execute after main (called by crt0.S) */
+  .fini : 
+  {
+    KEEP( *(.fini) )
+  }
+
+  /* rodata: Read-only data */
+  _rodata = .;
+  .rodata : 
+  {
+    *(.rdata)
+    *(.rodata)
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+  }
+
+  /* End of code and read-only segment */
+  PROVIDE( etext = . );
+  _etext = .;
+
+  /*--------------------------------------------------------------------*/
+  /* Global constructor/destructor segement                             */
+  /*--------------------------------------------------------------------*/
+
+  .preinit_array     :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  }
+
+  .init_array     :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array ))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  }
+
+  .fini_array     :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array ))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  }
+
+  /*--------------------------------------------------------------------*/
+  /* Other misc gcc segments (this was in idt32.ld)                     */
+  /*--------------------------------------------------------------------*/
+  /* I am not quite sure about these sections but it seems they are for
+     C++ exception handling. I think .jcr is for "Java Class
+     Registration" but it seems to end up in C++ binaries as well. */
+
+  .eh_frame_hdr     : { *(.eh_frame_hdr)     }
+  .eh_frame         : { KEEP( *(.eh_frame) ) }
+  .gcc_except_table : { *(.gcc_except_table) }
+  .jcr              : { KEEP (*(.jcr))       } 
+
+  /*--------------------------------------------------------------------*/
+  /* Initialized data segment                                           */
+  /*--------------------------------------------------------------------*/
+
+  /* Start of initialized data segment */
+  . = ALIGN(16);
+   _fdata = .;
+
+  /* data: Writable data */
+  _sdata = .;
+  .data : 
+  {
+    *(.data)
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+  }
+
+  /* End of initialized data segment */
+  PROVIDE( edata = . );
+  _edata = .;
+
+  /* Have _gp point to middle of sdata/sbss to maximize displacement range */
+  . = ALIGN(16);
+  _gp = . + 0x7FF0;
+
+  /* Writable small data segment */
+  .sdata : 
+  {
+    *(.sdata)
+    *(.sdata.*)
+    *(.srodata.*)
+  . = ALIGN(16);
+    *(.gnu.linkonce.s.*)
+  }
+
+  /*--------------------------------------------------------------------*/
+  /* Uninitialized data segment                                         */
+  /*--------------------------------------------------------------------*/
+
+  /* Start of uninitialized data segment */
+  . = ALIGN(8);
+  _fbss = .;
+
+  /* Writable uninitialized small data segment */
+  .sbss : 
+  {
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+  }
+
+  /* bss: Uninitialized writeable data section */
+  . = .;
+  _bss_start = .;
+  .bss : 
+  {
+    *(.bss)
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+  }
+  _bss_end = .;
+  _ebss = .;
+
+  /* End of uninitialized data segment (used by syscalls.c for heap) */
+  . = ALIGN(16);
+  PROVIDE( end = . );
+  _end = ALIGN(16);
+
+	/* Stabs debugging sections. */
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_info 0 : { *(.debug_info) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/nr5m100-nexys4/scripts/nr5m1xx.cfg b/configs/nr5m100-nexys4/scripts/nr5m1xx.cfg
new file mode 100644
index 0000000000000000000000000000000000000000..9cff1d5aa80f04d4cdff9466ff0ee0c2b9beeaa9
--- /dev/null
+++ b/configs/nr5m100-nexys4/scripts/nr5m1xx.cfg
@@ -0,0 +1,64 @@
+############################################################################
+# configs/nr5m100-nexys4/scripts/nr5m1xx.cfg
+#
+#   Copyright (C) 2016 Ken Pettit. All rights reserved.
+#   Author: Ken Pettit 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+proc init_board {} {
+   reset_config srst_only
+}
+
+if { [info exists CHIPNAME] } {
+   set _CHIPNAME $CHIPNAME
+} else {
+   set _CHIPNAME nr5m1xx
+}
+
+if { [info exists ENDIAN] } {
+   set _ENDIAN $ENDIAN
+} else {
+   set _ENDIAN little
+}
+
+if { [info exists CPUTAPID] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   set _CPUTAPID 0x17a1092d
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x5 -irmask 0x1f -expected-id $_CPUTAPID
+set _TARGETNAME $_CHIPNAME.cpu
+
+target create $_TARGETNAME riscv -endian $_ENDIAN -chain-position $_TARGETNAME
+
+$_TARGETNAME configure -work-area-phys 0x20018000 -work-area-size 0x2000 -work-area-backup 0
+
diff --git a/configs/nr5m100-nexys4/scripts/openocd.cfg b/configs/nr5m100-nexys4/scripts/openocd.cfg
new file mode 100644
index 0000000000000000000000000000000000000000..ea4564d84e0f925803110555df3066e2b0a6a02f
--- /dev/null
+++ b/configs/nr5m100-nexys4/scripts/openocd.cfg
@@ -0,0 +1,61 @@
+############################################################################
+# configs/nr5m100-nexys4/scripts/openocd.cfg
+#
+#   Copyright (C) 2016 Ken Pettit. All rights reserved.
+#   Author: Ken Pettit 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+#======================================
+#
+# Define the interface 
+#
+#=====================================
+
+interface jlink
+adapter_khz 2000
+
+#======================================
+#
+# Define the target
+#
+#=====================================
+
+source [find nr5m1xx.cfg]
+
+#======================================
+#
+# Init and halt the processor
+#
+#=====================================
+
+init
+reset halt
+
diff --git a/configs/nr5m100-nexys4/src/Makefile b/configs/nr5m100-nexys4/src/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..66a28f1b001c462c7505e8b2548ff20daa8836e8
--- /dev/null
+++ b/configs/nr5m100-nexys4/src/Makefile
@@ -0,0 +1,90 @@
+############################################################################
+# configs/nr5m100-nexys4/src/Makefile
+#
+#   Copyright (C) 2016 Ken Pettit. All rights reserved.
+#   Author: Ken Pettit 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+ASRCS =
+AOBJS = $(ASRCS:.S=$(OBJEXT))
+
+CSRCS = nr5_appinit.c nr5_boot.c nr5_autoleds.c
+
+ifeq ($(CONFIG_ARCH_BOARD_NR5_CUSTOM_CLOCKCONFIG),y)
+CSRCS += nr5_clockconfig.c
+endif
+
+COBJS = $(CSRCS:.c=$(OBJEXT))
+
+SRCS = $(ASRCS) $(CSRCS)
+OBJS = $(AOBJS) $(COBJS)
+
+ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src
+ifeq ($(CONFIG_WINDOWS_NATIVE),y)
+  CFLAGS += -I$(ARCH_SRCDIR) -I$(ARCH_SRCDIR)\common -I$(ARCH_SRCDIR)\rv32im
+else
+ifeq ($(WINTOOL),y)
+  CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}" \
+            -I "${shell cygpath -w $(ARCH_SRCDIR)/common}" \
+            -I "${shell cygpath -w $(ARCH_SRCDIR)/armv7-m}"
+else
+  CFLAGS += -I$(ARCH_SRCDIR)/$(CONFIG_ARCH_CHIP) -I$(ARCH_SRCDIR)/common -I$(ARCH_SRCDIR)/rv32im
+endif
+endif
+
+all: libboard$(LIBEXT)
+
+$(AOBJS): %$(OBJEXT): %.S
+	$(call ASSEMBLE, $<, $@)
+
+$(COBJS) $(LINKOBJS): %$(OBJEXT): %.c
+	$(call COMPILE, $<, $@)
+
+libboard$(LIBEXT): $(OBJS)
+	$(call ARCHIVE, $@, $(OBJS))
+
+.depend: Makefile $(SRCS)
+	$(Q) $(MKDEP) $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
+	$(Q) touch $@
+
+depend: .depend
+
+clean:
+	$(call DELFILE, libboard$(LIBEXT))
+	$(call CLEAN)
+
+distclean: clean
+	$(call DELFILE, Make.dep)
+	$(call DELFILE, .depend)
+
+-include Make.dep
diff --git a/configs/compal_e86/src/boot.c b/configs/nr5m100-nexys4/src/nr5_appinit.c
similarity index 87%
rename from configs/compal_e86/src/boot.c
rename to configs/nr5m100-nexys4/src/nr5_appinit.c
index 8c214a004c3e3b941894d4ccebf309d77705c4ca..861f1d44a8a789ca7a06b4d746e27a57f98b0f95 100644
--- a/configs/compal_e86/src/boot.c
+++ b/configs/nr5m100-nexys4/src/nr5_appinit.c
@@ -1,8 +1,8 @@
 /****************************************************************************
- * configs/compal_e86/boot.c
+ * config/nr5m100-nexys4/src/nr5_appinit.c
  *
- *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
- *   Author:  Gregory Nutt 
+ *   Copyright (C) 2012-2013, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -38,8 +38,20 @@
  ****************************************************************************/
 
 #include 
+
+#include 
+#include 
+#include 
+#include 
+
 #include 
 
+#include "nr5.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -67,9 +79,8 @@
  *
  ****************************************************************************/
 
-#ifdef CONFIG_LIB_BOARDCTL
 int board_app_initialize(uintptr_t arg)
 {
-  return 0;
+
+  return OK;
 }
-#endif /* CONFIG_LIB_BOARDCTL */
diff --git a/arch/arm/src/kl/kl_lowgetc.h b/configs/nr5m100-nexys4/src/nr5_autoleds.c
similarity index 81%
rename from arch/arm/src/kl/kl_lowgetc.h
rename to configs/nr5m100-nexys4/src/nr5_autoleds.c
index 4ed52365a2a4ba3f9304d273df12d8b9d6a64656..a35a6331cc5556e4d6fd89704cfcbd176b8388b7 100644
--- a/arch/arm/src/kl/kl_lowgetc.h
+++ b/configs/nr5m100-nexys4/src/nr5_autoleds.c
@@ -1,8 +1,8 @@
 /************************************************************************************
- * arch/arm/src/kl/kl_lowgetc.h
+ * configs/nr5m100_nexys4/src/nr5_autoleds.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -33,50 +33,39 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_KL_KINETIS_LOWGETC_H
-#define __ARCH_ARM_SRC_KL_KINETIS_LOWGETC_H
-
 /************************************************************************************
  * Included Files
  ************************************************************************************/
 
 #include 
-#include "kl_config.h"
+
+#include 
+
+#include 
 
 /************************************************************************************
  * Pre-processor Definitions
  ************************************************************************************/
 
 /************************************************************************************
- * Public Types
+ * Private Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Public Data
+ * Public Functions
  ************************************************************************************/
 
-#ifndef __ASSEMBLY__
-
-#undef EXTERN
-#if defined(__cplusplus)
-#define EXTERN extern "C"
-extern "C"
-{
-#else
-#define EXTERN extern
-#endif
-
 /************************************************************************************
- * Public Functions
+ * Name: board_autoled_on
+ *
+ * Description:
+ *   All NR5 architectures must provide the following entry point.  This entry point
+ *   is called early in the intitialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
  ************************************************************************************/
 
-#ifdef HAVE_SERIAL_CONSOLE
-int kl_lowgetc(void);
-#endif
-
-#undef EXTERN
-#if defined(__cplusplus)
+void board_autoled_on(int led)
+{
+ 
 }
-#endif
-#endif /* __ASSEMBLY__ */
-#endif /* __ARCH_ARM_SRC_KL_KINETIS_LOWGETC_H */
diff --git a/configs/nr5m100-nexys4/src/nr5_boot.c b/configs/nr5m100-nexys4/src/nr5_boot.c
new file mode 100644
index 0000000000000000000000000000000000000000..a98722566c4a00f6cd6c401a5ffc2185934a14a3
--- /dev/null
+++ b/configs/nr5m100-nexys4/src/nr5_boot.c
@@ -0,0 +1,70 @@
+/************************************************************************************
+ * configs/nr5m100_nexys4/src/nr5_boot.c
+ *
+ *   Copyright (C) 2016 Ken Pettit. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: nr5_boardinitialize
+ *
+ * Description:
+ *   All NR5 architectures must provide the following entry point.  This entry point
+ *   is called early in the intitialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void nr5_boardinitialize(void)
+{
+}
diff --git a/configs/ntosd-dm320/nettest/Make.defs b/configs/ntosd-dm320/nettest/Make.defs
index fb41fda097973d40b55c122b18e25845e3c195b8..c743f36264faab14393d470cd1217e23b17a4bcd 100644
--- a/configs/ntosd-dm320/nettest/Make.defs
+++ b/configs/ntosd-dm320/nettest/Make.defs
@@ -82,7 +82,7 @@ else
 endif
 
 ARCHCFLAGS		= -fno-builtin
-ARCHCXXFLAGS		= -fno-builtin -fno-exceptions
+ARCHCXXFLAGS		= -fno-builtin -fno-exceptions -fcheck-new
 ARCHPICFLAGS		= -fpic -msingle-pic-base -mpic-register=r10
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/ntosd-dm320/nettest/defconfig b/configs/ntosd-dm320/nettest/defconfig
index 9b2875545063ebfcffaf7dfd035d1220fd2a30ee..8c1df72f5f3e4539b53c8fe94d45f82a2e2272e1 100644
--- a/configs/ntosd-dm320/nettest/defconfig
+++ b/configs/ntosd-dm320/nettest/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 CONFIG_ARCH_CHIP_DM320=y
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -93,7 +97,9 @@ CONFIG_ARCH_CHIP_DM320=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 CONFIG_ARCH_ARM926EJS=y
@@ -104,10 +110,21 @@ CONFIG_ARCH_ARM926EJS=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="dm320"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 # CONFIG_ARCH_LOWVECTORS is not set
 # CONFIG_ARCH_ROMPGTABLE is not set
@@ -141,6 +158,7 @@ CONFIG_DM320_UART1=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 CONFIG_ARCH_HAVE_MMU=y
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -202,6 +220,7 @@ CONFIG_ARCH_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -220,6 +239,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2008
 CONFIG_START_MONTH=8
@@ -268,6 +288,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -275,12 +296,17 @@ CONFIG_NAME_MAX=32
 CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -298,6 +324,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=4096
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -308,16 +335,21 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -325,9 +357,28 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -336,7 +387,9 @@ CONFIG_NETDEVICES=y
 # General Ethernet MAC Driver Options
 #
 # CONFIG_NETDEV_LOOPBACK is not set
+# CONFIG_NETDEV_TELNET is not set
 # CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NETDEV_LATEINIT is not set
 
 #
@@ -355,20 +408,19 @@ CONFIG_DM9X_MODE_AUTO=y
 # CONFIG_DM9X_MODE_10MFD is not set
 # CONFIG_DM9X_MODE_100MHD is not set
 # CONFIG_DM9X_MODE_100MFD is not set
-# CONFIG_DM9X_STATS is not set
+CONFIG_DM9X_HPWORK=y
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -392,14 +444,11 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_UART1_SERIAL_CONSOLE is not set
@@ -417,6 +466,7 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 
 #
 # UART1 Configuration
@@ -429,19 +479,27 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -449,13 +507,11 @@ CONFIG_UART1_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -574,12 +630,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -599,6 +649,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -624,6 +678,8 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -638,14 +694,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -657,22 +716,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # Application Configuration
 #
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -694,35 +757,44 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -733,8 +805,9 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -745,11 +818,12 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
@@ -771,15 +845,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/ntosd-dm320/nsh/Make.defs b/configs/ntosd-dm320/nsh/Make.defs
index 1422acda541a91f79cbad603beda62e6b018a906..419ca804a9322b7b006a07f095aa5d5047caa996 100644
--- a/configs/ntosd-dm320/nsh/Make.defs
+++ b/configs/ntosd-dm320/nsh/Make.defs
@@ -82,7 +82,7 @@ else
 endif
 
 ARCHCFLAGS		= -fno-builtin
-ARCHCXXFLAGS		= -fno-builtin -fno-exceptions
+ARCHCXXFLAGS		= -fno-builtin -fno-exceptions -fcheck-new
 ARCHPICFLAGS		= -fpic -msingle-pic-base -mpic-register=r10
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/ntosd-dm320/nsh/defconfig b/configs/ntosd-dm320/nsh/defconfig
index 5a4b54b2e7f13d352387f85e14f533f391b863d0..de73c2672cd0fea031b0bc08643cd9e2a8285ee8 100644
--- a/configs/ntosd-dm320/nsh/defconfig
+++ b/configs/ntosd-dm320/nsh/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 CONFIG_ARCH_CHIP_DM320=y
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -93,7 +97,9 @@ CONFIG_ARCH_CHIP_DM320=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 CONFIG_ARCH_ARM926EJS=y
@@ -104,10 +110,21 @@ CONFIG_ARCH_ARM926EJS=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="dm320"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 # CONFIG_ARCH_LOWVECTORS is not set
 # CONFIG_ARCH_ROMPGTABLE is not set
@@ -141,6 +158,7 @@ CONFIG_DM320_UART1=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 CONFIG_ARCH_HAVE_MMU=y
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -198,12 +216,11 @@ CONFIG_ARCH_BOARD="ntosd-dm320"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 # CONFIG_ARCH_LEDS is not set
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -222,6 +239,7 @@ CONFIG_DISABLE_MQUEUE=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2008
 CONFIG_START_MONTH=9
@@ -276,6 +294,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -284,12 +303,17 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -307,6 +331,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=4096
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -322,12 +347,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -335,7 +364,26 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -344,6 +392,7 @@ CONFIG_MMCSD_MMCSUPPORT=y
 CONFIG_MMCSD_HAVECARDDETECT=y
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -375,19 +424,19 @@ CONFIG_DM9X_MODE_AUTO=y
 # CONFIG_DM9X_MODE_10MFD is not set
 # CONFIG_DM9X_MODE_100MHD is not set
 # CONFIG_DM9X_MODE_100MFD is not set
+CONFIG_DM9X_HPWORK=y
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -411,10 +460,6 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -451,19 +496,26 @@ CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
 # CONFIG_UART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -471,13 +523,11 @@ CONFIG_UART1_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -603,7 +653,9 @@ CONFIG_FS_FAT=y
 # CONFIG_FAT_LCNAMES is not set
 # CONFIG_FAT_LFN is not set
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_NFS is not set
 # CONFIG_FS_NXFFS is not set
 CONFIG_FS_ROMFS=y
@@ -612,12 +664,6 @@ CONFIG_FS_ROMFS=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -637,6 +683,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -664,6 +714,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -681,7 +733,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -689,14 +742,17 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=4
 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_RESOLVCONF is not set
 CONFIG_NETDB_DNSSERVER_NOADDR=y
 # CONFIG_NETDB_DNSSERVER_IPv4 is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -715,18 +771,21 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_LEDS is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -736,19 +795,18 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
@@ -756,6 +814,7 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_THTTPD is not set
@@ -763,17 +822,22 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -786,8 +850,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -800,25 +865,27 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -837,6 +904,7 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
 # CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
@@ -863,13 +931,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -879,6 +947,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -886,6 +955,8 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
@@ -924,6 +995,7 @@ CONFIG_NSH_CONSOLE=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -950,6 +1022,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
 CONFIG_NSH_TELNETD_CLIENTPRIO=100
 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
 CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 # CONFIG_NSH_TELNET_LOGIN is not set
 
 #
@@ -964,13 +1038,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -979,5 +1052,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/ntosd-dm320/poll/Make.defs b/configs/ntosd-dm320/poll/Make.defs
index e5f93d927836b064a72970ae78bdf71b87d2201b..669c2cac529b96dcef10467c0840129e8bf7f55e 100644
--- a/configs/ntosd-dm320/poll/Make.defs
+++ b/configs/ntosd-dm320/poll/Make.defs
@@ -82,7 +82,7 @@ else
 endif
 
 ARCHCFLAGS		= -fno-builtin
-ARCHCXXFLAGS		= -fno-builtin -fno-exceptions
+ARCHCXXFLAGS		= -fno-builtin -fno-exceptions -fcheck-new
 ARCHPICFLAGS		= -fpic -msingle-pic-base -mpic-register=r10
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/ntosd-dm320/poll/defconfig b/configs/ntosd-dm320/poll/defconfig
index 82d918604f10e2e74371ab854e8ff77f28a47139..fee30f1413a15bdb6cede520d8932b20b326487b 100644
--- a/configs/ntosd-dm320/poll/defconfig
+++ b/configs/ntosd-dm320/poll/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 CONFIG_ARCH_CHIP_DM320=y
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -92,7 +96,11 @@ CONFIG_ARCH_CHIP_DM320=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 CONFIG_ARCH_ARM926EJS=y
 # CONFIG_ARCH_ARM920T is not set
@@ -102,10 +110,21 @@ CONFIG_ARCH_ARM926EJS=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="dm320"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 # CONFIG_ARCH_LOWVECTORS is not set
 # CONFIG_ARCH_ROMPGTABLE is not set
@@ -139,11 +158,14 @@ CONFIG_DM320_UART1=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 CONFIG_ARCH_HAVE_MMU=y
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 CONFIG_ARCH_USE_MMU=y
 # CONFIG_PAGING is not set
 # CONFIG_ARCH_STACKDUMP is not set
@@ -198,6 +220,7 @@ CONFIG_ARCH_HAVE_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -216,6 +239,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2008
 CONFIG_START_MONTH=11
@@ -233,6 +257,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="poll_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=64
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -269,6 +294,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -277,12 +303,17 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -300,6 +331,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=4096
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -310,16 +342,21 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -327,8 +364,28 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -336,7 +393,11 @@ CONFIG_NETDEVICES=y
 #
 # General Ethernet MAC Driver Options
 #
+# CONFIG_NETDEV_LOOPBACK is not set
+# CONFIG_NETDEV_TELNET is not set
 # CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
+# CONFIG_NETDEV_LATEINIT is not set
 
 #
 # External Ethernet MAC Device Support
@@ -354,19 +415,22 @@ CONFIG_DM9X_MODE_AUTO=y
 # CONFIG_DM9X_MODE_10MFD is not set
 # CONFIG_DM9X_MODE_100MHD is not set
 # CONFIG_DM9X_MODE_100MFD is not set
-# CONFIG_DM9X_STATS is not set
+CONFIG_DM9X_HPWORK=y
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
-# CONFIG_NET_VNET is not set
-# CONFIG_PIPES is not set
+# CONFIG_NET_FTMAC100 is not set
+CONFIG_PIPES=y
+CONFIG_DEV_PIPE_MAXSIZE=1024
+CONFIG_DEV_PIPE_SIZE=1024
+CONFIG_DEV_FIFO_SIZE=1024
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -390,15 +454,12 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_UART1_SERIAL_CONSOLE is not set
@@ -416,6 +477,7 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 
 #
 # UART1 Configuration
@@ -428,19 +490,27 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -448,13 +518,11 @@ CONFIG_UART1_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -464,6 +532,7 @@ CONFIG_NET_GUARDSIZE=2
 #
 # CONFIG_NET_MULTILINK is not set
 CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
 # CONFIG_NET_TUN is not set
 
 #
@@ -549,6 +618,7 @@ CONFIG_IOB_NCHAINS=8
 # Routing Table Configuration
 #
 # CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME=""
 
 #
 # Crypto API
@@ -571,12 +641,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -596,6 +660,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -621,6 +689,8 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -635,13 +705,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -654,14 +728,14 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -669,11 +743,12 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_LEDS is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -682,40 +757,51 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 CONFIG_EXAMPLES_POLL=y
 # CONFIG_EXAMPLES_POLL_NOMAC is not set
 CONFIG_EXAMPLES_POLL_IPADDR=0x0a000002
 CONFIG_EXAMPLES_POLL_DRIPADDR=0x0a000001
 CONFIG_EXAMPLES_POLL_NETMASK=0xffffff00
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -726,32 +812,31 @@ CONFIG_EXAMPLES_POLL_NETMASK=0xffffff00
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -769,15 +854,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/ntosd-dm320/src/dm320_network.c b/configs/ntosd-dm320/src/dm320_network.c
index 5edeb32f3907ebe64eec355d738c1b58c10b9334..80911ff5fe1438388e12d9c7cf73f9f2d5ed1207 100644
--- a/configs/ntosd-dm320/src/dm320_network.c
+++ b/configs/ntosd-dm320/src/dm320_network.c
@@ -52,18 +52,6 @@
 
 extern void dm9x_initialize(void);
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -79,8 +67,8 @@ void up_netinitialize(void)
    * width is 16-bits.
    */
 
-  nlldbg("CS4CTRL1=%04x CS4CTRL2=%04x\n",
-         getreg16(DM320_EMIF_CS4CTRL1), getreg16(DM320_EMIF_CS4CTRL2));
+  ninfo("CS4CTRL1=%04x CS4CTRL2=%04x\n",
+        getreg16(DM320_EMIF_CS4CTRL1), getreg16(DM320_EMIF_CS4CTRL2));
 
   /* It is assumed that bootloader has already configured CS4.  Here,
    * we will only make certain that the GIO is properly configured
@@ -91,9 +79,9 @@ void up_netinitialize(void)
   GIO_INTERRUPT(GIO_DM9000A_INT);
   GIO_RISINGEDGE(GIO_DM9000A_INT);
 
-  nlldbg("GIO DIR0=%04x INV0=%04x IRQPORT=%04x IRQEDGE=%04x\n",
-         getreg16(DM320_GIO_DIR0), getreg16(DM320_GIO_INV0),
-         getreg16(DM320_GIO_IRQPORT), getreg16(DM320_GIO_IRQEDGE));
+  ninfo("GIO DIR0=%04x INV0=%04x IRQPORT=%04x IRQEDGE=%04x\n",
+        getreg16(DM320_GIO_DIR0), getreg16(DM320_GIO_INV0),
+        getreg16(DM320_GIO_IRQPORT), getreg16(DM320_GIO_IRQEDGE));
 
   /* Then initialize the driver */
 
diff --git a/configs/ntosd-dm320/thttpd/Make.defs b/configs/ntosd-dm320/thttpd/Make.defs
index a251e628852573a7a7500a068a6cca22d2581b6b..37b034d1446fd6491d94fd1f0a305605324df5d6 100644
--- a/configs/ntosd-dm320/thttpd/Make.defs
+++ b/configs/ntosd-dm320/thttpd/Make.defs
@@ -82,7 +82,7 @@ else
 endif
 
 ARCHCFLAGS		= -fno-builtin
-ARCHCXXFLAGS		= -fno-builtin -fno-exceptions
+ARCHCXXFLAGS		= -fno-builtin -fno-exceptions -fcheck-new
 ARCHPICFLAGS		= -fpic -msingle-pic-base -mpic-register=r10
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/ntosd-dm320/thttpd/defconfig b/configs/ntosd-dm320/thttpd/defconfig
index 55c20c37906aa73b98b68a74eb41d79f9d72be38..adecbe37cacdac3d7f7bb6a478dda97ff57facfb 100644
--- a/configs/ntosd-dm320/thttpd/defconfig
+++ b/configs/ntosd-dm320/thttpd/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 CONFIG_ARCH_CHIP_DM320=y
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -92,7 +96,11 @@ CONFIG_ARCH_CHIP_DM320=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 CONFIG_ARCH_ARM926EJS=y
 # CONFIG_ARCH_ARM920T is not set
@@ -102,10 +110,21 @@ CONFIG_ARCH_ARM926EJS=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="dm320"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 # CONFIG_ARCH_LOWVECTORS is not set
 # CONFIG_ARCH_ROMPGTABLE is not set
@@ -139,11 +158,14 @@ CONFIG_DM320_UART1=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 CONFIG_ARCH_HAVE_MMU=y
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 CONFIG_ARCH_USE_MMU=y
 # CONFIG_PAGING is not set
 # CONFIG_ARCH_STACKDUMP is not set
@@ -198,6 +220,7 @@ CONFIG_ARCH_HAVE_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -216,6 +239,7 @@ CONFIG_DISABLE_MQUEUE=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=8
@@ -233,6 +257,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="thttp_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=64
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -263,6 +288,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -270,12 +296,17 @@ CONFIG_NAME_MAX=32
 CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -293,6 +324,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=4096
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -303,16 +335,21 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -320,8 +357,28 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -329,7 +386,11 @@ CONFIG_NETDEVICES=y
 #
 # General Ethernet MAC Driver Options
 #
+# CONFIG_NETDEV_LOOPBACK is not set
+# CONFIG_NETDEV_TELNET is not set
 # CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
+# CONFIG_NETDEV_LATEINIT is not set
 
 #
 # External Ethernet MAC Device Support
@@ -347,19 +408,22 @@ CONFIG_DM9X_MODE_AUTO=y
 # CONFIG_DM9X_MODE_10MFD is not set
 # CONFIG_DM9X_MODE_100MHD is not set
 # CONFIG_DM9X_MODE_100MFD is not set
-# CONFIG_DM9X_STATS is not set
+CONFIG_DM9X_HPWORK=y
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
-# CONFIG_NET_VNET is not set
-# CONFIG_PIPES is not set
+# CONFIG_NET_FTMAC100 is not set
+CONFIG_PIPES=y
+CONFIG_DEV_PIPE_MAXSIZE=1024
+CONFIG_DEV_PIPE_SIZE=1024
+CONFIG_DEV_FIFO_SIZE=1024
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -383,15 +447,12 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_UART1_SERIAL_CONSOLE is not set
@@ -409,6 +470,7 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 
 #
 # UART1 Configuration
@@ -421,19 +483,27 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -441,13 +511,11 @@ CONFIG_UART1_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -457,6 +525,7 @@ CONFIG_NET_GUARDSIZE=2
 #
 # CONFIG_NET_MULTILINK is not set
 CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
 # CONFIG_NET_TUN is not set
 
 #
@@ -542,6 +611,7 @@ CONFIG_IOB_NCHAINS=8
 # Routing Table Configuration
 #
 # CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME=""
 
 #
 # Crypto API
@@ -565,14 +635,10 @@ CONFIG_FS_READABLE=y
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 CONFIG_FS_ROMFS=y
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -593,6 +659,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -620,6 +690,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -635,13 +707,18 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -654,14 +731,14 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -669,11 +746,12 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_LEDS is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -682,20 +760,21 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
@@ -703,6 +782,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 CONFIG_EXAMPLES_THTTPD=y
@@ -711,13 +791,24 @@ CONFIG_EXAMPLES_THTTPD_DRIPADDR=0x0a000001
 CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -729,20 +820,25 @@ CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
 CONFIG_NETUTILS_THTTPD=y
@@ -777,16 +873,10 @@ CONFIG_THTTPD_IDLE_SEND_LIMIT_SEC=300
 CONFIG_THTTPD_TILDE_MAP_NONE=y
 # CONFIG_THTTPD_GENERATE_INDICES is not set
 # CONFIG_THTTPD_USE_URLPATTERN is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -804,15 +894,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/ntosd-dm320/udp/Make.defs b/configs/ntosd-dm320/udp/Make.defs
index 1cac1699e76964ecfe1a6e5e8591dddf006eba8a..00e5539aa761460d21c6e03f5d2269ff9f714d3f 100644
--- a/configs/ntosd-dm320/udp/Make.defs
+++ b/configs/ntosd-dm320/udp/Make.defs
@@ -82,7 +82,7 @@ else
 endif
 
 ARCHCFLAGS		= -fno-builtin
-ARCHCXXFLAGS		= -fno-builtin -fno-exceptions
+ARCHCXXFLAGS		= -fno-builtin -fno-exceptions -fcheck-new
 ARCHPICFLAGS		= -fpic -msingle-pic-base -mpic-register=r10
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/ntosd-dm320/udp/defconfig b/configs/ntosd-dm320/udp/defconfig
index 906bc57eabd5b19e699b906f37d9798da06bf231..7da96bcbc0596906e7a110595451bea06650edef 100644
--- a/configs/ntosd-dm320/udp/defconfig
+++ b/configs/ntosd-dm320/udp/defconfig
@@ -37,12 +37,15 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
@@ -57,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -70,13 +75,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 CONFIG_ARCH_CHIP_DM320=y
+# CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
 # CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -85,20 +92,39 @@ CONFIG_ARCH_CHIP_DM320=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 CONFIG_ARCH_ARM926EJS=y
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="dm320"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 # CONFIG_ARCH_LOWVECTORS is not set
 # CONFIG_ARCH_ROMPGTABLE is not set
@@ -132,11 +158,14 @@ CONFIG_DM320_UART1=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 CONFIG_ARCH_HAVE_MMU=y
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 CONFIG_ARCH_USE_MMU=y
 # CONFIG_PAGING is not set
 # CONFIG_ARCH_STACKDUMP is not set
@@ -191,6 +220,8 @@ CONFIG_ARCH_HAVE_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
+# CONFIG_LIB_BOARDCTL is not set
 
 #
 # RTOS Features
@@ -208,6 +239,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2008
 CONFIG_START_MONTH=8
@@ -225,6 +257,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="udp_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=64
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -255,6 +288,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -262,6 +296,18 @@ CONFIG_NAME_MAX=32
 CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
 
 #
 # Stack and heap information
@@ -278,6 +324,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=4096
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -288,28 +335,61 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
-# CONFIG_TIMER is not set
 # CONFIG_ANALOG is not set
 # CONFIG_AUDIO_DEVICES is not set
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
 
 #
 # General Ethernet MAC Driver Options
 #
+# CONFIG_NETDEV_LOOPBACK is not set
 # CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
+# CONFIG_NETDEV_LATEINIT is not set
 
 #
 # External Ethernet MAC Device Support
@@ -327,19 +407,19 @@ CONFIG_DM9X_MODE_AUTO=y
 # CONFIG_DM9X_MODE_10MFD is not set
 # CONFIG_DM9X_MODE_100MHD is not set
 # CONFIG_DM9X_MODE_100MFD is not set
-# CONFIG_DM9X_STATS is not set
+CONFIG_DM9X_HPWORK=y
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
-# CONFIG_NET_VNET is not set
+# CONFIG_NET_FTMAC100 is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -362,14 +442,16 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART6_SERIALDRIVER is not set
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_UART1_SERIAL_CONSOLE is not set
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
 
 #
@@ -383,6 +465,7 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 
 #
 # UART1 Configuration
@@ -395,20 +478,27 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -416,14 +506,33 @@ CONFIG_UART1_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
-CONFIG_NET_IPv4=y
-# CONFIG_NET_MULTIBUFFER is not set
 # CONFIG_NET_PROMISCUOUS is not set
-CONFIG_NET_ETH_MTU=562
-CONFIG_NET_ETH_TCP_RECVWNDO=536
+
+#
+# Driver buffer configuration
+#
+CONFIG_NET_ETH_MTU=590
 CONFIG_NET_GUARDSIZE=2
 
+#
+# Data link support
+#
+# CONFIG_NET_MULTILINK is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
+# CONFIG_NET_TUN is not set
+
+#
+# Network Device Operations
+#
+# CONFIG_NETDEV_PHY_IOCTL is not set
+
+#
+# Internet Protocol Selection
+#
+CONFIG_NET_IPv4=y
+# CONFIG_NET_IPv6 is not set
+
 #
 # Socket Support
 #
@@ -433,14 +542,14 @@ CONFIG_NET_SOCKOPTS=y
 # CONFIG_NET_SOLINGER is not set
 
 #
-# Network Device Operations
+# Raw Socket Support
 #
-# CONFIG_NETDEV_PHY_IOCTL is not set
+# CONFIG_NET_PKT is not set
 
 #
-# Raw Socket Support
+# Unix Domain Socket Support
 #
-# CONFIG_NET_PKT is not set
+# CONFIG_NET_LOCAL is not set
 
 #
 # TCP/IP Networking
@@ -455,6 +564,7 @@ CONFIG_NET_UDP_CHECKSUMS=y
 CONFIG_NET_UDP_CONNS=8
 CONFIG_NET_BROADCAST=y
 # CONFIG_NET_RXAVAIL is not set
+CONFIG_NET_UDP_READAHEAD=y
 
 #
 # ICMP Networking Support
@@ -479,7 +589,10 @@ CONFIG_NET_ARP_MAXAGE=120
 #
 # Network I/O Buffer Support
 #
-# CONFIG_NET_IOB is not set
+CONFIG_NET_IOB=y
+CONFIG_IOB_NBUFFERS=8
+CONFIG_IOB_BUFSIZE=196
+CONFIG_IOB_NCHAINS=8
 # CONFIG_NET_ARCH_INCR32 is not set
 # CONFIG_NET_ARCH_CHKSUM is not set
 # CONFIG_NET_STATISTICS is not set
@@ -488,7 +601,7 @@ CONFIG_NET_ARP_MAXAGE=120
 # Routing Table Configuration
 #
 # CONFIG_NET_ROUTE is not set
-CONFIG_NET_ETHERNET=y
+CONFIG_NET_HOSTNAME=""
 
 #
 # Crypto API
@@ -506,14 +619,10 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
 # CONFIG_FS_READABLE is not set
 # CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -535,7 +644,11 @@ CONFIG_MM_REGIONS=1
 # CONFIG_AUDIO is not set
 
 #
-# Binary Formats
+# Wireless Support
+#
+
+#
+# Binary Loader
 #
 # CONFIG_BINFMT_DISABLE is not set
 # CONFIG_NXFLAT is not set
@@ -558,6 +671,9 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -569,16 +685,21 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
 CONFIG_ARCH_LOWPUTC=y
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_DNSCLIENT is not set
 
 #
 # Non-standard Library Support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -591,26 +712,27 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_LEDS is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -618,80 +740,89 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 CONFIG_EXAMPLES_UDP=y
 # CONFIG_EXAMPLES_UDP_SERVER is not set
+CONFIG_EXAMPLES_UDP_IPv4=y
+
+#
+# IPv4 addresses
+#
 CONFIG_EXAMPLES_UDP_IPADDR=0x0a000002
 CONFIG_EXAMPLES_UDP_DRIPADDR=0x0a000001
 CONFIG_EXAMPLES_UDP_NETMASK=0xffffff00
 CONFIG_EXAMPLES_UDP_SERVERIP=0x0a000001
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_UDPBLASTER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
 #
 # CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
 
 #
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
 # CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
-# CONFIG_NETDB_DNSCLIENT is not set
-# CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
 CONFIG_NETUTILS_NETLIB=y
-# CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
+# CONFIG_NETUTILS_PPPD is not set
+# CONFIG_NETUTILS_SMTP is not set
+# CONFIG_NETUTILS_TFTPC is not set
 
 #
 # NSH Library
@@ -710,111 +841,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# EMACS-like Command Line Editor
-#
 # CONFIG_SYSTEM_CLE is not set
-
-#
-# FLASH Program Installation
-#
-# CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# Intel HEX to binary conversion
-#
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-
-#
-# P-Code Support
-#
-
-#
-# PHY Tool
-#
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sudoku
-#
 # CONFIG_SYSTEM_SUDOKU is not set
-
-#
-# Sysinfo
-#
-
-#
-# VI Work-Alike Editor
-#
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# USB Monitor
-#
-
-#
-# Zmodem Commands
-#
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/ntosd-dm320/webserver/Make.defs b/configs/ntosd-dm320/webserver/Make.defs
index 21f5c71070c8457f036de9a862466285cde8c472..23c005a3ca22fc6dadec8f8b46d2ed94d98fce08 100644
--- a/configs/ntosd-dm320/webserver/Make.defs
+++ b/configs/ntosd-dm320/webserver/Make.defs
@@ -82,7 +82,7 @@ else
 endif
 
 ARCHCFLAGS		= -fno-builtin
-ARCHCXXFLAGS		= -fno-builtin -fno-exceptions
+ARCHCXXFLAGS		= -fno-builtin -fno-exceptions -fcheck-new
 ARCHPICFLAGS		= -fpic -msingle-pic-base -mpic-register=r10
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/ntosd-dm320/webserver/defconfig b/configs/ntosd-dm320/webserver/defconfig
index 7173e67561002ac0bb6b033e8f0955187dc94174..eb14c0ca7c94ff368cff164df874e98fec2130e7 100644
--- a/configs/ntosd-dm320/webserver/defconfig
+++ b/configs/ntosd-dm320/webserver/defconfig
@@ -12,10 +12,6 @@ CONFIG_HOST_LINUX=y
 # CONFIG_HOST_OSX is not set
 # CONFIG_HOST_WINDOWS is not set
 # CONFIG_HOST_OTHER is not set
-# CONFIG_WINDOWS_NATIVE is not set
-# CONFIG_WINDOWS_CYGWIN is not set
-# CONFIG_WINDOWS_MSYS is not set
-# CONFIG_WINDOWS_OTHER is not set
 
 #
 # Build Configuration
@@ -41,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -62,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -75,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 CONFIG_ARCH_CHIP_DM320=y
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -96,7 +96,11 @@ CONFIG_ARCH_CHIP_DM320=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 CONFIG_ARCH_ARM926EJS=y
 # CONFIG_ARCH_ARM920T is not set
@@ -106,10 +110,21 @@ CONFIG_ARCH_ARM926EJS=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="dm320"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 # CONFIG_ARCH_LOWVECTORS is not set
 # CONFIG_ARCH_ROMPGTABLE is not set
@@ -119,10 +134,7 @@ CONFIG_ARCH_HAVE_LOWVECTORS=y
 #
 # CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set
 CONFIG_ARM_TOOLCHAIN_CODESOURCERYL=y
-# CONFIG_ARM_TOOLCHAIN_CODESOURCERYW is not set
-# CONFIG_ARM_TOOLCHAIN_DEVKITARM is not set
 # CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set
-# CONFIG_ARM_TOOLCHAIN_GNU_EABIW is not set
 # CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set
 
 #
@@ -146,11 +158,14 @@ CONFIG_DM320_UART1=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 CONFIG_ARCH_HAVE_MMU=y
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 CONFIG_ARCH_USE_MMU=y
 # CONFIG_PAGING is not set
 # CONFIG_ARCH_STACKDUMP is not set
@@ -205,6 +220,7 @@ CONFIG_ARCH_HAVE_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -223,6 +239,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2008
 CONFIG_START_MONTH=8
@@ -240,6 +257,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="webserver_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -276,6 +294,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -284,12 +303,17 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -307,6 +331,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=4096
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -317,16 +342,21 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -334,8 +364,28 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -343,7 +393,11 @@ CONFIG_NETDEVICES=y
 #
 # General Ethernet MAC Driver Options
 #
+# CONFIG_NETDEV_LOOPBACK is not set
+# CONFIG_NETDEV_TELNET is not set
 # CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
+# CONFIG_NETDEV_LATEINIT is not set
 
 #
 # External Ethernet MAC Device Support
@@ -361,19 +415,19 @@ CONFIG_DM9X_MODE_AUTO=y
 # CONFIG_DM9X_MODE_10MFD is not set
 # CONFIG_DM9X_MODE_100MHD is not set
 # CONFIG_DM9X_MODE_100MFD is not set
-# CONFIG_DM9X_STATS is not set
+CONFIG_DM9X_HPWORK=y
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
-# CONFIG_NET_VNET is not set
+# CONFIG_NET_FTMAC100 is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -397,14 +451,11 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_UART1_SERIAL_CONSOLE is not set
@@ -422,6 +473,7 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 
 #
 # UART1 Configuration
@@ -434,19 +486,27 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -454,13 +514,11 @@ CONFIG_UART1_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -470,6 +528,7 @@ CONFIG_NET_GUARDSIZE=2
 #
 # CONFIG_NET_MULTILINK is not set
 CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
 # CONFIG_NET_TUN is not set
 
 #
@@ -555,6 +614,7 @@ CONFIG_IOB_NCHAINS=8
 # Routing Table Configuration
 #
 # CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME=""
 
 #
 # Crypto API
@@ -577,12 +637,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -602,6 +656,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -627,6 +685,8 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -641,13 +701,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -660,26 +724,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_LEDS is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -688,39 +752,48 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
 CONFIG_EXAMPLES_WEBSERVER=y
 CONFIG_EXAMPLES_WEBSERVER_IPADDR=0x0a000002
 CONFIG_EXAMPLES_WEBSERVER_DRIPADDR=0x0a000001
 CONFIG_EXAMPLES_WEBSERVER_NETMASK=0xffffff00
 CONFIG_EXAMPLES_WEBSERVER_NOMAC=y
-# CONFIG_EXAMPLES_USBSERIAL is not set
-# CONFIG_EXAMPLES_USBTERM is not set
-# CONFIG_EXAMPLES_WATCHDOG is not set
 # CONFIG_EXAMPLES_WGET is not set
 
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -731,22 +804,25 @@ CONFIG_EXAMPLES_WEBSERVER_NOMAC=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 CONFIG_NETUTILS_WEBSERVER=y
 # CONFIG_NETUTILS_HTTPD_SINGLECONNECT is not set
@@ -762,11 +838,6 @@ CONFIG_NETUTILS_HTTPD_CLASSIC=y
 CONFIG_NETUTILS_HTTPD_KEEPALIVE_DISABLE=y
 # CONFIG_NETUTILS_XMLRPC is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -784,15 +855,17 @@ CONFIG_NETUTILS_HTTPD_KEEPALIVE_DISABLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/nucleo-144/Kconfig b/configs/nucleo-144/Kconfig
index 57585efaff09ef6d275fcb64af9fada473ab9e05..96427a9a5e287490b9ccb16223a3b04c512f3130 100644
--- a/configs/nucleo-144/Kconfig
+++ b/configs/nucleo-144/Kconfig
@@ -5,4 +5,219 @@
 
 if ARCH_BOARD_NUCLEO_144
 
+choice
+	prompt "Select Console wiring."
+	default NUCLEO_ARDUINO
+	---help---
+		Select where you will connect the console.
+
+		Virtual COM Port:
+
+		Advantage: Use the ST-Link as a console. No Extra wiring
+		neded.
+
+		Disdvantage: Not the best choice for initanl bring up.
+
+		ARDUINO Connector:
+
+		Advantage: You have a shield so it is
+		easy.
+
+		Disdvantage: You loose the use of the
+		other functions on PC6, PC7
+
+				STM32F7
+			ARDUIONO FUNCTION  GPIO
+			-- ----- --------- ----
+			DO RX    USART6_RX PG9
+			D1 TX    USART6_TX PG14
+			-- ----- --------- ---
+
+					OR
+
+		Morpho Connector:
+
+				STM32F7
+			MORPHO   FUNCTION  GPIO
+			-------- --------- -----
+			CN12-64  USART8_RX PE0
+			CN11-61  USART8_TX PE1
+			-------- --------- -----
+
+config NUCLEO_CONSOLE_ARDUINO
+	bool "ARDUINO Connector"
+	select STM32F7_USART6
+	select USART6_SERIALDRIVER
+	select USART6_SERIAL_CONSOLE
+
+config NUCLEO_CONSOLE_VIRTUAL
+	bool "Virtual Comport"
+	select STM32F7_USART3
+	select USART3_SERIALDRIVER
+	select USART3_SERIAL_CONSOLE
+
+config NUCLEO_CONSOLE_MORPHO
+	bool "Morpho Connector"
+	select STM32F7_UART8
+	select UART8_SERIALDRIVER
+	select UART8_SERIAL_CONSOLE
+
+config NUCLEO_CONSOLE_NONE
+	bool "No Console"
+
+endchoice # "Select Console wiring"
+
+config NUCLEO_SPI_TEST
+	bool "Enable SPI test"
+	default n
+	---help---
+		Enable Spi test - initalize and configure SPI to send
+		NUCLEO_SPI_TEST_MESSAGE text. The text is sent on the
+		selected SPI Buses with the configured parameters.
+		Note the CS lines will not be asserted.
+
+if NUCLEO_SPI_TEST
+
+config NUCLEO_SPI_TEST_MESSAGE
+	string "Text to Send on SPI Bus(es)"
+	default "Hello World"
+	depends on NUCLEO_SPI_TEST
+	---help---
+		Text to sent on SPI bus(es)
+
+config NUCLEO_SPI1_TEST
+	bool "Test SPI bus 1"
+	default n
+	depends on NUCLEO_SPI_TEST
+	---help---
+		Enable Spi test - on SPI BUS 1
+
+if NUCLEO_SPI1_TEST
+
+config NUCLEO_SPI1_TEST_FREQ
+	int "SPI 1 Clock Freq in Hz"
+	default 1000000
+	depends on NUCLEO_SPI1_TEST
+	---help---
+		Sets SPI 1 Clock Freq
+
+config NUCLEO_SPI1_TEST_BITS
+	int "SPI 1 number of bits"
+	default 8
+	depends on NUCLEO_SPI1_TEST
+	---help---
+		Sets SPI 1 bit length
+
+choice
+	prompt "SPI BUS 1 Clock Mode"
+	default NUCLEO_SPI1_TEST_MODE3
+	---help---
+		Sets SPI 1 clock mode
+
+config NUCLEO_SPI1_TEST_MODE0
+	bool "CPOL=0 CHPHA=0"
+
+config NUCLEO_SPI1_TEST_MODE1
+	bool "CPOL=0 CHPHA=1"
+
+config NUCLEO_SPI1_TEST_MODE2
+	bool "CPOL=1 CHPHA=0"
+
+config NUCLEO_SPI1_TEST_MODE3
+	bool "CPOL=1 CHPHA=1"
+
+endchoice # "SPI BUS 1 Clock Mode"
+
+endif # NUCLEO_SPI1_TEST
+
+config NUCLEO_SPI2_TEST
+	bool "Test SPI bus 2"
+	default n
+	depends on NUCLEO_SPI_TEST
+	---help---
+		Enable Spi test - on SPI BUS 2
+
+if NUCLEO_SPI2_TEST
+
+config NUCLEO_SPI2_TEST_FREQ
+	int "SPI 2 Clock Freq in Hz"
+	default 12000000
+	depends on NUCLEO_SPI2_TEST
+	---help---
+		Sets SPI 2 Clock Freq
+
+config NUCLEO_SPI2_TEST_BITS
+	int "SPI 2 number of bits"
+	default 8
+	depends on NUCLEO_SPI2_TEST
+	---help---
+		Sets SPI 2 bit length
+
+choice
+	prompt "SPI BUS 2 Clock Mode"
+	default NUCLEO_SPI2_TEST_MODE3
+	---help---
+		Sets SPI 2 clock mode
+
+config NUCLEO_SPI2_TEST_MODE0
+	bool "CPOL=0 CHPHA=0"
+
+config NUCLEO_SPI2_TEST_MODE1
+	bool "CPOL=0 CHPHA=1"
+
+config NUCLEO_SPI2_TEST_MODE2
+	bool "CPOL=1 CHPHA=0"
+
+config NUCLEO_SPI2_TEST_MODE3
+	bool "CPOL=1 CHPHA=1"
+
+endchoice # "SPI BUS 2 Clock Mode"
+
+endif # NUCLEO_SPI2_TEST
+
+config NUCLEO_SPI3_TEST
+	bool "Test SPI bus 3"
+	default n
+	depends on NUCLEO_SPI_TEST
+	---help---
+		Enable Spi test - on SPI BUS 3
+
+if NUCLEO_SPI3_TEST
+
+config NUCLEO_SPI3_TEST_FREQ
+	int "SPI 3 Clock Freq in Hz"
+	default 40000000
+	depends on NUCLEO_SPI3_TEST
+	---help---
+		Sets SPI 3 Clock Freq
+
+config NUCLEO_SPI3_TEST_BITS
+	int "SPI 3 number of bits"
+	default 8
+	depends on NUCLEO_SPI3_TEST
+	---help---
+		Sets SPI 3 bit length
+
+choice
+	prompt "SPI BUS 3 Clock Mode"
+	default NUCLEO_SPI3_TEST_MODE3
+	---help---
+		Sets SPI 3 clock mode
+
+config NUCLEO_SPI3_TEST_MODE0
+	bool "CPOL=0 CHPHA=0"
+
+config NUCLEO_SPI3_TEST_MODE1
+	bool "CPOL=0 CHPHA=1"
+
+config NUCLEO_SPI3_TEST_MODE2
+	bool "CPOL=1 CHPHA=0"
+
+config NUCLEO_SPI3_TEST_MODE3
+	bool "CPOL=1 CHPHA=1"
+
+endchoice # "SPI BUS 3 Clock Mode"
+
+endif # NUCLEO_SPI3_TEST
+endif # NUCLEO_SPI_TEST
 endif # ARCH_BOARD_NUCLEO_144
diff --git a/configs/nucleo-144/README.txt b/configs/nucleo-144/README.txt
index e99cd427de3c9e0a39d3f573a8fa9c375cab7fda..6226299546a4e2d04b4501464a530571acec072a 100644
--- a/configs/nucleo-144/README.txt
+++ b/configs/nucleo-144/README.txt
@@ -11,6 +11,7 @@ Contents
 
   - Nucleo-144 Boards
   - Nucleo F746ZG
+  - Nucleo F767ZI
   - Development Environment
   - IDEs
   - Basic configuaration & build steps
@@ -18,7 +19,12 @@ Contents
     - Button
     - LED
     - U[S]ARTs and Serial Consoles
+    - SPI
+    - SDIO - MMC
+  - SPI Test
   - Configurations
+     f7xx-nsh
+     f7xx-evalos
 
 Nucleo-144 Boards:
 =================
@@ -63,7 +69,7 @@ Common Board Features:
 Nucleo F746ZG
 =============
 
-At present only the ST Nucleo F746ZG board from ST Micro is supported.  See
+ST Nucleo F746ZG board from ST Micro is supported.  See
 
 http://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-nucleo/nucleo-f746zg.html
 
@@ -80,7 +86,7 @@ NUCLEO-F746ZG Features:
                   + 16KB of instruction TCM RAM + 4KB of backup SRAM
   ADC:            3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in
                   triple interleaved mode
-  DMA:            16-stream DMA controllers with FIFOs and burst support
+  DMA:            2 X 16-stream DMA controllers with FIFOs and burst support
   Timers:         Up to 18 timers: up to thirteen 16-bit (1x 16-bit lowpower),
                   two 32-bit timers, 2x watchdogs, SysTick
   GPIO:           114 I/O ports with interrupt capability
@@ -105,9 +111,58 @@ NUCLEO-F746ZG Features:
   TRG:            True random number generator
   RTC
 
-See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG  form additional
+See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG  for additional
 information about this board.
 
+Nucleo F767ZI
+=============
+
+ST Nucleo F7467ZI board from ST Micro is supported.  See
+
+http://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-nucleo/nucleo-f767zi.html
+
+The Nucleo F767ZI order part number is NUCLEO-F767ZI. It is one member of
+the STM32 Nucleo-144 board family.
+
+NUCLEO-F767ZI Features:
+----------------------
+
+  Microprocessor: STM32F767ZIT6 Core: ARM 32-bit Cortex®-M7 CPU with DPFPU,
+                  L1-cache: 16KB data cache and 16KB instruction cache, up to
+                  216 MHz, MPU, and DSP instructions.
+  Memory:         2048 KB Flash 512KB of SRAM (including 128KB of data TCM RAM)
+                  + 16KB of instruction TCM RAM + 4KB of backup SRAM
+  ADC:            3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in
+                  triple interleaved mode
+  DMA:            2 X 16-stream DMA controllers with FIFOs and burst support
+  Timers:         Up to 18 timers: up to thirteen 16-bit (1x 16-bit lowpower),
+                  two 32-bit timers, 2x watchdogs, SysTick
+  GPIO:           114 I/O ports with interrupt capability
+  LCD:            LCD-TFT Controllerwith (DMA2D), Parallel interface
+  I2C:            4 × I2C interfaces (SMBus/PMBus)
+  U[S]ARTs:       4 USARTs, 4 UARTs (27 Mbit/s, ISO7816 interface, LIN, IrDA,
+                  modem control)
+  SPI/12Ss:       6/3 (simplex) (up to 50 Mbit/s), 3 with muxed simplex I2S
+                  for audio class accuracy via internal audio PLL or external
+                  clock
+  QSPI:           Dual mode Quad-SPI
+  SAIs:           2 Serial Audio Interfaces
+  CAN:            3 X CAN interface
+  SDMMC interface
+  SPDIFRX interface
+  USB:            USB 2.0 full/High-speed device/host/OTG controller with on-chip
+                  PHY
+  10/100 Ethernet: MAC with dedicated DMA: supports IEEE 1588v2 hardware,
+                   MII/RMII
+  Camera Interface: 8/14 Bit
+  CRC calculation unit
+  TRG:            True random number generator
+  RTC             subsecond accuracy, hardware calendar
+
+As of this writting the NUCLEO-F767ZI is not available on developer.mbed.org
+However, See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG  for additional
+useful information.
+
 Development Environment
 =======================
 
@@ -154,8 +209,8 @@ Basic configuration & build steps
 Hardware
 ========
 
-  GPIO - there are 144 I/O lines on the STM32F746ZGT6 with various pins pined out
-  on the Nucleo F746ZG.
+  GPIO - there are 144 I/O lines on the STM32F7xxZxT6 with various pins pined out
+  on the Nucleo 144.
 
   See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG/ for slick graphic
   pinouts.
@@ -168,19 +223,47 @@ Hardware
 
   Our main concern is establishing a console and LED utilization for
   debugging. Because so many pins can be multiplexed with so many functions,
-  the above mentioned graphic is super helpful in indentifying a serial port
-  that will not rob us of another IO feature. Namely Serial Port 8 (UART8)
-  with TX on PE1 and RX on PE0. Of course if your design  has used those
-  pins you can choose another IO configuration to bring out Serial Port 8
-  or choose a completely different U[S]ART to use as the console.
-  In that Case, You will need to edit the include/board.h to select different
-  U[S]ART and / or pin selections.
-
-  Serial
-  ------
+  the above mentioned graphic may be helpful in indentifying a serial port.
+
+  There are 4 choices that can be made from the menuconfig:
+
+  CONFIG_NUCLEO_CONSOLE_ARDUINO or CONFIG_NUCLEO_CONSOLE_MORPHO or
+  CONFIG_NUCLEO_CONSOLE_VIRTUAL or CONFIG_NUCLEO_CONSOLE_NONE
+
+  The CONFIG_NUCLEO_CONSOLE_NONE makes no preset for the console. YOu shuld still visit
+  the U[S]ART selection and Device Drivers to disable any U[S]ART reamaing.
+
+  The CONFIG_NUCLEO_CONSOLE_ARDUINO configurations assume that you are using a
+  standard Arduio RS-232 shield with the serial interface with RX on pin D0 and
+  TX on pin D1 from USART6:
+
+            -------- ---------------
+                        STM32F7
+            ARDUIONO FUNCTION  GPIO
+            -- ----- --------- -----
+            DO RX    USART6_RX PG9
+            D1 TX    USART6_TX PG14
+            -- ----- --------- -----
+
+  The CONFIG_NUCLEO_CONSOLE_MORPHO configurations uses Serial Port 8 (USART8)
+  with TX on PE1 and RX on PE0.
+          Serial
+            ------
+            SERIAL_RX         PE_0
+            SERIAL_TX         PE_1
+
+  The CONFIG_NUCLEO_CONSOLE_VIRTUAL configurations uses Serial Port 3 (USART3)
+  with TX on PD8 and RX on PD9.
+          Serial
+            ------
+            SERIAL_RX         PD9
+            SERIAL_TX         PD8
+
+  These signals are internalaly connected to the on board ST-Link
 
-  SERIAL_RX         PE_0
-  SERIAL_TX         PE_1
+  Of course if your design  has used those pins you can choose a completely
+  different U[S]ART to use as the console. In that Case, you will need to edit
+  the include/board.h to select different U[S]ART and / or pin selections.
 
   Buttons
   -------
@@ -202,32 +285,36 @@ Hardware
   include/board.h and src/stm32_autoleds.c. The LEDs are used to encode OS
   related events as follows when the LEDs are available:
 
-    SYMBOL                Meaning    RED  GREEN BLUE
-    -------------------  -----------------------  -----------
+  SYMBOL                Meaning                  RED  GREEN BLUE
+  -------------------  -----------------------   ---  ----- ----
 
-    LED_STARTED             0        OFF  OFF   OFF
-    LED_HEAPALLOCATE        0        OFF  OFF   OFF
-    LED_IRQSENABLED         0        OFF  OFF   OFF
-    LED_STACKCREATED        1        OFF  ON    OFF
-    LED_INIRQ               2        NC   NC    ON  (momentary)
-    LED_SIGNAL              2        NC   NC    ON  (momentary)
-    LED_ASSERTION           3        ON   NC    NC  (momentary)
-    LED_PANIC               4        ON   OFF   OFF (flashing 2Hz)
+  LED_STARTED          NuttX has been started    OFF  OFF   OFF
+  LED_HEAPALLOCATE     Heap has been allocated   OFF  OFF   ON
+  LED_IRQSENABLED      Interrupts enabled        OFF  ON    OFF
+  LED_STACKCREATED     Idle stack created        OFF  ON    ON
+  LED_INIRQ            In an interrupt           NC   NC    ON  (momentary)
+  LED_SIGNAL           In a signal handler       NC   ON    OFF (momentary)
+  LED_ASSERTION        An assertion failed       ON   NC    ON  (momentary)
+  LED_PANIC            The system has crashed    ON   OFF   OFF (flashing 2Hz)
+  LED_IDLE             MCU is is sleep mode      ON   OFF   OFF
 
-OFF - means that the OS is still initializing. Initialization is very fast so
-    if you see this at all, it probably means that the system is hanging up
-    somewhere in the initialization phases.
 
-GREEN - This means that the OS completed initialization.
+OFF -    means that the OS is still initializing. Initialization is very fast
+         so if you see this at all, it probably means that the system is
+         hanging up somewhere in the initialization phases.
 
-BLUE - Whenever and interrupt or signal handler is entered, the BLUE LED is
-   illuminated and extinguished when the interrupt or signal handler exits.
+GREEN -  This means that the OS completed initialization.
 
-RED - If a recovered assertion occurs, the RED LED will be illuminated
-   briefly while the assertion is handled.  You will probably never see this.
+BLUE  -  Whenever and interrupt or signal handler is entered, the BLUE LED is
+         illuminated and extinguished when the interrupt or signal handler
+         exits.
+
+VIOLET - If a recovered assertion occurs, the RED and blue LED will be
+         illuminated briefly while the assertion is handled.  You will
+         probably never see this.
 
 Flashing RED - In the event of a fatal crash, all other LEDs will be
-extinguished and RED LED will FLASH at a 2Hz rate.
+          extinguished and RED LED will FLASH at a 2Hz rate.
 
 
   Thus if the GREEN LED is lit, NuttX has successfully booted and is,
@@ -238,30 +325,67 @@ extinguished and RED LED will FLASH at a 2Hz rate.
 Serial Consoles
 ===============
 
-  USART8
+  USART6 (CONFIG_NUCLEO_CONSOLE_ARDUINO)
   ------
+                STM32F7
+    ARDUIONO FUNCTION  GPIO
+    -- ----- --------- -----
+    DO RX    USART6_RX PG9
+    D1 TX    USART6_TX PG14
+    -- ----- --------- -----
+
+  You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL
+
+    Nucleo 144           FTDI TTL-232R-3V3
+    -------------       -------------------
+    TXD - D1-TXD   -    RXD - Pin 5 (Yellow)
+    RXD - D0-RXD   -    TXD - Pin 4 (Orange)
+    GND   GND      -    GND   Pin 1  (Black)
+    -------------       -------------------
+
+    *Note you will be reverse RX/TX
+
+  Use make menuconfig to configure USART6 as the console:
+
+    CONFIG_STM32F7_USART6=y
+    CONFIG_USARTs_SERIALDRIVER=y
+    CONFIG_USARTS_SERIAL_CONSOLE=y
+    CONFIG_USART6_RXBUFSIZE=256
+    CONFIG_USART6_TXBUFSIZE=256
+    CONFIG_USART6_BAUD=115200
+    CONFIG_USART6_BITS=8
+    CONFIG_USART6_PARITY=0
+    CONFIG_USART6_2STOP=0
+
+  USART8 (CONFIG_NUCLEO_CONSOLE_MORPHO)
+  ------
+
   Pins and Connectors:
-         GPIO  Connector NAME
-    RXD: PE0   CN11 pin 64, PE0
-               CN10 pin 33, D34
+    FUNC GPIO  Connector
+                   Pin NAME
+    ---- ---   ------- ----
+    TXD: PE1   CN11-61, PE1
+    RXD: PE0   CN12-64, PE0
+               CN10-33, D34
+    ---- ---   ------- ----
 
-    TXD: PE1   CN11 pin 61, PE1
 
   You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL
 
     Nucleo 144           FTDI TTL-232R-3V3
-    -----------         ------------
-    TXD - CN11 pin 64 - RXD - Pin 5 (Yellow)
-    RXD - CN11 pin 61 - TXD - Pin 4 (Orange)
-    GND   CN11 pin 63   GND   Pin 1  (Black)
+    -------------       -------------------
+    TXD - CN11-61   -   RXD - Pin 5 (Yellow)
+    RXD - CN12-64   -   TXD - Pin 4 (Orange)
+    GND   CN12-63   -   GND   Pin 1  (Black)
+    -------------       -------------------
 
     *Note you will be reverse RX/TX
 
   Use make menuconfig to configure USART8 as the console:
 
     CONFIG_STM32F7_UART8=y
-    CONFIG_USART8_SERIALDRIVER=y
-    CONFIG_USART8_SERIAL_CONSOLE=y
+    CONFIG_UART8_SERIALDRIVER=y
+    CONFIG_UART8_SERIAL_CONSOLE=y
     CONFIG_UART8_RXBUFSIZE=256
     CONFIG_UART8_TXBUFSIZE=256
     CONFIG_UART8_BAUD=115200
@@ -269,7 +393,7 @@ Serial Consoles
     CONFIG_UART8_PARITY=0
     CONFIG_UART8_2STOP=0
 
-  Virtual COM Port
+  Virtual COM Port (CONFIG_NUCLEO_CONSOLE_VIRTUAL)
   ----------------
   Yet another option is to use USART3 and the USB virtual COM port.  This
   option may be more convenient for long term development, but is painful
@@ -290,14 +414,72 @@ Serial Consoles
   As shipped, SB4 and SB7 are open and SB5 and SB6 closed, so the
   virtual COM port is enabled.
 
+
+SPI
+---
+  Since this board is so generic, having a quick way to vet the SPI
+  configuration seams in order. So the board provides a quick test
+  that can be selected vi CONFIG_NUCLEO_SPI_TEST that will initalise
+  the selected buses (SPI1-SPI3) and send some text on the bus at
+  application initalization time board_app_initialize.
+
+SDIO
+----
+  To test the SD performace one can use a SparkFun microSD Sniffer
+  from https://www.sparkfun.com/products/9419 or similar board
+  and connect it as follows:
+
+          VCC    V3.3 CN11  16
+          GND    GND  CN11-8
+          CMD    PD2  CN11-4
+          CLK    PC12 CN11-3
+          DAT0 - PC8  CN12-2
+          DAT1 - PC9  CN12-1
+          DAT2   PC10 CN11-1
+          CD     PC11 CN11-2
+
+SPI Test
+========
+
+  The builtin SPI test facility can be enabled with the following settings:
+
+    +CONFIG_STM32F7_SPI=y
+    +CONFIG_STM32F7_SPI1=y
+    +CONFIG_STM32F7_SPI2=y
+    +CONFIG_STM32F7_SPI3=y
+
+    +# CONFIG_STM32F7_SPI_INTERRUPTS is not set
+    +# CONFIG_STM32F7_SPI_DMA is not set
+     # CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set
+
+    +CONFIG_NUCLEO_SPI_TEST=y
+    +CONFIG_NUCLEO_SPI_TEST_MESSAGE="Hello World"
+    +CONFIG_NUCLEO_SPI1_TEST=y
+    +CONFIG_NUCLEO_SPI1_TEST_FREQ=1000000
+    +CONFIG_NUCLEO_SPI1_TEST_BITS=8
+    +CONFIG_NUCLEO_SPI1_TEST_MODE3=y
+
+    +CONFIG_NUCLEO_SPI2_TEST=y
+    +CONFIG_NUCLEO_SPI2_TEST_FREQ=12000000
+    +CONFIG_NUCLEO_SPI2_TEST_BITS=8
+    +CONFIG_NUCLEO_SPI2_TEST_MODE3=y
+
+    +CONFIG_NUCLEO_SPI3_TEST=y
+    +CONFIG_NUCLEO_SPI3_TEST_FREQ=40000000
+    +CONFIG_NUCLEO_SPI3_TEST_BITS=8
+    +CONFIG_NUCLEO_SPI3_TEST_MODE3=y
+
+    +CONFIG_LIB_BOARDCTL=y
+    +CONFIG_NSH_ARCHINIT=y
+
 Configurations
 ==============
 
-nsh:
+f7xx-nsh:
 ----
   Configures the NuttShell (nsh) located at apps/examples/nsh for the
   Nucleo-144 boards.  The Configuration enables the serial interfaces
-  on UART6.  Support for builtin applications is enabled, but in the base
+  on USART6.  Support for builtin applications is enabled, but in the base
   configuration no builtin applications are selected (see NOTES below).
 
   NOTES:
@@ -333,7 +515,7 @@ nsh:
      device configured for UART8 (see instruction above under "Serial
      Consoles).
 
-evalos:
+f7xx-evalos:
 -------
   This configuration is designed to test the features of the board.
     - Configures the NuttShell (nsh) located at apps/examples/nsh for the
diff --git a/configs/nucleo-144/f746-evalos/Make.defs b/configs/nucleo-144/f746-evalos/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..1f22b4eee883a7470ea50781fac2ed443b3726cd
--- /dev/null
+++ b/configs/nucleo-144/f746-evalos/Make.defs
@@ -0,0 +1,114 @@
+############################################################################
+# configs/nucleo-144/f746-evalos/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Authors: Gregory Nutt 
+#            Mark Olsson 
+#            David Sidrane 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = f746-flash.ld
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
diff --git a/configs/nucleo-144/evalos/defconfig b/configs/nucleo-144/f746-evalos/defconfig
similarity index 76%
rename from configs/nucleo-144/evalos/defconfig
rename to configs/nucleo-144/f746-evalos/defconfig
index 9944952cac6adde942f3502c56f7382b5ad68b5d..233574042fd13816413b29e29d7e9d68bcbaeda8 100644
--- a/configs/nucleo-144/evalos/defconfig
+++ b/configs/nucleo-144/f746-evalos/defconfig
@@ -16,7 +16,7 @@ CONFIG_HOST_LINUX=y
 #
 # Build Configuration
 #
-CONFIG_APPS_DIR="../apps"
+# CONFIG_APPS_DIR="../apps"
 CONFIG_BUILD_FLAT=y
 # CONFIG_BUILD_2PASS is not set
 
@@ -24,7 +24,7 @@ CONFIG_BUILD_FLAT=y
 # Binary Output Formats
 #
 # CONFIG_RRLOAD_BINARY is not set
-CONFIG_INTELHEX_BINARY=y
+# CONFIG_INTELHEX_BINARY is not set
 # CONFIG_MOTOROLA_SREC is not set
 CONFIG_RAW_BINARY=y
 # CONFIG_UBOOT_UIMAGE is not set
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
-# CONFIG_STACK_COLORATION is not set
+CONFIG_STACK_COLORATION=y
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 CONFIG_DEBUG_NOOPT=y
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -124,7 +124,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 CONFIG_ARMV7M_CMNVECTOR=y
 # CONFIG_ARMV7M_LAZYFPU is not set
 CONFIG_ARCH_HAVE_FPU=y
-CONFIG_ARCH_HAVE_DPFPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
 # CONFIG_ARCH_FPU is not set
 # CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
@@ -152,23 +152,120 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
 # CONFIG_USART3_RS485 is not set
-# CONFIG_SERIAL_DISABLE_REORDERING is not set
+CONFIG_SERIAL_DISABLE_REORDERING=y
 
 #
 # STM32 F7 Configuration Options
 #
-# CONFIG_ARCH_CHIP_STM32F745 is not set
-CONFIG_ARCH_CHIP_STM32F746=y
-# CONFIG_ARCH_CHIP_STM32F756 is not set
+# CONFIG_ARCH_CHIP_STM32F745VG is not set
+# CONFIG_ARCH_CHIP_STM32F745VE is not set
+# CONFIG_ARCH_CHIP_STM32F745IG is not set
+# CONFIG_ARCH_CHIP_STM32F745IE is not set
+# CONFIG_ARCH_CHIP_STM32F745ZE is not set
+# CONFIG_ARCH_CHIP_STM32F745ZG is not set
+# CONFIG_ARCH_CHIP_STM32F746BG is not set
+# CONFIG_ARCH_CHIP_STM32F746VG is not set
+# CONFIG_ARCH_CHIP_STM32F746VE is not set
+# CONFIG_ARCH_CHIP_STM32F746BE is not set
+CONFIG_ARCH_CHIP_STM32F746ZG=y
+# CONFIG_ARCH_CHIP_STM32F746IE is not set
+# CONFIG_ARCH_CHIP_STM32F746NG is not set
+# CONFIG_ARCH_CHIP_STM32F746NE is not set
+# CONFIG_ARCH_CHIP_STM32F746ZE is not set
+# CONFIG_ARCH_CHIP_STM32F746IG is not set
+# CONFIG_ARCH_CHIP_STM32F756NG is not set
+# CONFIG_ARCH_CHIP_STM32F756BG is not set
+# CONFIG_ARCH_CHIP_STM32F756IG is not set
+# CONFIG_ARCH_CHIP_STM32F756VG is not set
+# CONFIG_ARCH_CHIP_STM32F756ZG is not set
+# CONFIG_ARCH_CHIP_STM32F765NI is not set
+# CONFIG_ARCH_CHIP_STM32F765VI is not set
+# CONFIG_ARCH_CHIP_STM32F765VG is not set
+# CONFIG_ARCH_CHIP_STM32F765BI is not set
+# CONFIG_ARCH_CHIP_STM32F765NG is not set
+# CONFIG_ARCH_CHIP_STM32F765ZG is not set
+# CONFIG_ARCH_CHIP_STM32F765ZI is not set
+# CONFIG_ARCH_CHIP_STM32F765IG is not set
+# CONFIG_ARCH_CHIP_STM32F765BG is not set
+# CONFIG_ARCH_CHIP_STM32F765II is not set
+# CONFIG_ARCH_CHIP_STM32F767NG is not set
+# CONFIG_ARCH_CHIP_STM32F767IG is not set
+# CONFIG_ARCH_CHIP_STM32F767VG is not set
+# CONFIG_ARCH_CHIP_STM32F767ZG is not set
+# CONFIG_ARCH_CHIP_STM32F767NI is not set
+# CONFIG_ARCH_CHIP_STM32F767VI is not set
+# CONFIG_ARCH_CHIP_STM32F767BG is not set
+# CONFIG_ARCH_CHIP_STM32F767ZI is not set
+# CONFIG_ARCH_CHIP_STM32F767II is not set
+# CONFIG_ARCH_CHIP_STM32F769BI is not set
+# CONFIG_ARCH_CHIP_STM32F769II is not set
+# CONFIG_ARCH_CHIP_STM32F769BG is not set
+# CONFIG_ARCH_CHIP_STM32F769NI is not set
+# CONFIG_ARCH_CHIP_STM32F769AI is not set
+# CONFIG_ARCH_CHIP_STM32F769NG is not set
+# CONFIG_ARCH_CHIP_STM32F769IG is not set
+# CONFIG_ARCH_CHIP_STM32F777ZI is not set
+# CONFIG_ARCH_CHIP_STM32F777VI is not set
+# CONFIG_ARCH_CHIP_STM32F777NI is not set
+# CONFIG_ARCH_CHIP_STM32F777BI is not set
+# CONFIG_ARCH_CHIP_STM32F777II is not set
+# CONFIG_ARCH_CHIP_STM32F778AI is not set
+# CONFIG_ARCH_CHIP_STM32F779II is not set
+# CONFIG_ARCH_CHIP_STM32F779NI is not set
+# CONFIG_ARCH_CHIP_STM32F779BI is not set
+# CONFIG_ARCH_CHIP_STM32F779AI is not set
 CONFIG_STM32F7_STM32F74XX=y
 # CONFIG_STM32F7_STM32F75XX is not set
-# CONFIG_STM32F7_FLASH_512KB is not set
-CONFIG_STM32F7_FLASH_1024KB=y
+# CONFIG_STM32F7_STM32F76XX is not set
+# CONFIG_STM32F7_STM32F77XX is not set
+# CONFIG_STM32F7_IO_CONFIG_V is not set
+# CONFIG_STM32F7_IO_CONFIG_I is not set
+CONFIG_STM32F7_IO_CONFIG_Z=y
+# CONFIG_STM32F7_IO_CONFIG_N is not set
+# CONFIG_STM32F7_IO_CONFIG_B is not set
+# CONFIG_STM32F7_IO_CONFIG_A is not set
+# CONFIG_STM32F7_STM32F745XX is not set
+CONFIG_STM32F7_STM32F746XX=y
+# CONFIG_STM32F7_STM32F756XX is not set
+# CONFIG_STM32F7_STM32F765XX is not set
+# CONFIG_STM32F7_STM32F767XX is not set
+# CONFIG_STM32F7_STM32F768XX is not set
+# CONFIG_STM32F7_STM32F768AX is not set
+# CONFIG_STM32F7_STM32F769XX is not set
+# CONFIG_STM32F7_STM32F769AX is not set
+# CONFIG_STM32F7_STM32F777XX is not set
+# CONFIG_STM32F7_STM32F778XX is not set
+# CONFIG_STM32F7_STM32F778AX is not set
+# CONFIG_STM32F7_STM32F779XX is not set
+# CONFIG_STM32F7_STM32F779AX is not set
+# CONFIG_STM32F7_FLASH_CONFIG_E is not set
+# CONFIG_STM32F7_FLASH_CONFIG_I is not set
+CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT=y
+# CONFIG_STM32F7_FLASH_OVERRIDE_E is not set
+# CONFIG_STM32F7_FLASH_OVERRIDE_G is not set
+# CONFIG_STM32F7_FLASH_OVERRIDE_I is not set
 
 #
 # STM32 Peripheral Support
 #
 CONFIG_STM32F7_HAVE_LTDC=y
+CONFIG_STM32F7_HAVE_FSMC=y
+CONFIG_STM32F7_HAVE_ETHRNET=y
+CONFIG_STM32F7_HAVE_RNG=y
+CONFIG_STM32F7_HAVE_SPI5=y
+CONFIG_STM32F7_HAVE_SPI6=y
+# CONFIG_STM32F7_HAVE_SDMMC2 is not set
+# CONFIG_STM32F7_HAVE_ADC1_DMA is not set
+# CONFIG_STM32F7_HAVE_ADC2_DMA is not set
+# CONFIG_STM32F7_HAVE_ADC3_DMA is not set
+# CONFIG_STM32F7_HAVE_CAN3 is not set
+CONFIG_STM32F7_HAVE_DCMI=y
+# CONFIG_STM32F7_HAVE_DSIHOST is not set
+CONFIG_STM32F7_HAVE_DMA2D=y
+# CONFIG_STM32F7_HAVE_JPEG is not set
+# CONFIG_STM32F7_HAVE_CRYP is not set
+# CONFIG_STM32F7_HAVE_HASH is not set
+# CONFIG_STM32F7_HAVE_DFSDM1 is not set
 # CONFIG_STM32F7_ADC is not set
 # CONFIG_STM32F7_CAN is not set
 # CONFIG_STM32F7_DAC is not set
@@ -176,6 +273,7 @@ CONFIG_STM32F7_HAVE_LTDC=y
 # CONFIG_STM32F7_I2C is not set
 # CONFIG_STM32F7_SAI is not set
 # CONFIG_STM32F7_SPI is not set
+# CONFIG_STM32F7_TIM is not set
 CONFIG_STM32F7_USART=y
 # CONFIG_STM32F7_ADC1 is not set
 # CONFIG_STM32F7_ADC2 is not set
@@ -185,25 +283,26 @@ CONFIG_STM32F7_USART=y
 # CONFIG_STM32F7_CAN2 is not set
 # CONFIG_STM32F7_CEC is not set
 # CONFIG_STM32F7_CRC is not set
-# CONFIG_STM32F7_CRYP is not set
 # CONFIG_STM32F7_DMA1 is not set
 # CONFIG_STM32F7_DMA2 is not set
 # CONFIG_STM32F7_DAC1 is not set
 # CONFIG_STM32F7_DAC2 is not set
 # CONFIG_STM32F7_DCMI is not set
+# CONFIG_STM32F7_DMA2D is not set
 # CONFIG_STM32F7_ETHMAC is not set
 # CONFIG_STM32F7_FSMC is not set
 # CONFIG_STM32F7_I2C1 is not set
 # CONFIG_STM32F7_I2C2 is not set
 # CONFIG_STM32F7_I2C3 is not set
+# CONFIG_STM32F7_I2C4 is not set
 # CONFIG_STM32F7_LPTIM1 is not set
 # CONFIG_STM32F7_LTDC is not set
-# CONFIG_STM32F7_DMA2D is not set
 # CONFIG_STM32F7_OTGFS is not set
 # CONFIG_STM32F7_OTGHS is not set
 # CONFIG_STM32F7_QUADSPI is not set
-# CONFIG_STM32F7_SAI1 is not set
+# CONFIG_STM32F7_PWR is not set
 # CONFIG_STM32F7_RNG is not set
+# CONFIG_STM32F7_SAI1 is not set
 # CONFIG_STM32F7_SAI2 is not set
 # CONFIG_STM32F7_SDMMC1 is not set
 # CONFIG_STM32F7_SPDIFRX is not set
@@ -227,7 +326,6 @@ CONFIG_STM32F7_USART=y
 # CONFIG_STM32F7_TIM12 is not set
 # CONFIG_STM32F7_TIM13 is not set
 # CONFIG_STM32F7_TIM14 is not set
-# CONFIG_STM32F7_TIM15 is not set
 # CONFIG_STM32F7_USART1 is not set
 # CONFIG_STM32F7_USART2 is not set
 CONFIG_STM32F7_USART3=y
@@ -242,9 +340,17 @@ CONFIG_STM32F7_USART3=y
 #
 # U[S]ART Configuration
 #
-# CONFIG_STM32F7_FLOWCONTROL_BROKEN is not set
-# CONFIG_STM32F7_USART_BREAKS is not set
+CONFIG_STM32F7_FLOWCONTROL_BROKEN=y
+CONFIG_STM32F7_USART_BREAKS=y
+CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y
+# CONFIG_STM32F7_HAVE_RTC_COUNTER is not set
+# CONFIG_STM32F7_HAVE_RTC_SUBSECONDS is not set
 # CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32F7_DTCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
 
 #
 # Architecture Options
@@ -308,7 +414,6 @@ CONFIG_RAM_SIZE=245760
 # Board Selection
 #
 CONFIG_ARCH_BOARD_NUCLEO_144=y
-# CONFIG_ARCH_BOARD_STM32F746G_DISCO is not set
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="nucleo-144"
 
@@ -321,28 +426,26 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_NUCLEO_CONSOLE_ARDUINO is not set
+CONFIG_NUCLEO_CONSOLE_VIRTUAL=y
+# CONFIG_NUCLEO_CONSOLE_MORPHO is not set
+# CONFIG_NUCLEO_CONSOLE_NONE is not set
+# CONFIG_NUCLEO_SPI_TEST is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
 #
 # RTOS Features
 #
-CONFIG_DISABLE_OS_API=y
-# CONFIG_DISABLE_POSIX_TIMERS is not set
-# CONFIG_DISABLE_PTHREAD is not set
-# CONFIG_DISABLE_SIGNALS is not set
-# CONFIG_DISABLE_MQUEUE is not set
-# CONFIG_DISABLE_ENVIRON is not set
+# CONFIG_DISABLE_OS_API is not set
 
 #
 # Clocks and Timers
@@ -350,10 +453,11 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
-CONFIG_START_YEAR=2011
-CONFIG_START_MONTH=12
-CONFIG_START_DAY=6
+CONFIG_START_YEAR=2015
+CONFIG_START_MONTH=11
+CONFIG_START_DAY=30
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=4
 CONFIG_WDOG_INTRESERVE=0
@@ -395,7 +499,9 @@ CONFIG_SDCLONE_DISABLE=y
 CONFIG_NFILE_DESCRIPTORS=8
 CONFIG_NFILE_STREAMS=8
 CONFIG_NAME_MAX=32
-# CONFIG_PRIORITY_INHERITANCE is not set
+CONFIG_PRIORITY_INHERITANCE=y
+CONFIG_SEM_PREALLOCHOLDERS=16
+CONFIG_SEM_NNESTPRIO=16
 
 #
 # RTOS hooks
@@ -404,6 +510,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -412,6 +519,7 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
@@ -423,9 +531,17 @@ CONFIG_MQ_MAXMSGSIZE=32
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
-# CONFIG_SCHED_LPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=100000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+CONFIG_SCHED_LPWORK=y
+CONFIG_SCHED_LPNTHREADS=1
+CONFIG_SCHED_LPWORKPRIORITY=50
+CONFIG_SCHED_LPWORKPRIOMAX=176
+CONFIG_SCHED_LPWORKPERIOD=50000
+CONFIG_SCHED_LPWORKSTACKSIZE=2048
 
 #
 # Stack and heap information
@@ -442,6 +558,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -461,9 +578,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -477,8 +599,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -487,6 +619,7 @@ CONFIG_USERLED=y
 CONFIG_USERLED_LOWER=y
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -495,9 +628,10 @@ CONFIG_USERLED_LOWER=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -521,10 +655,6 @@ CONFIG_USART3_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -547,19 +677,25 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USART3_IFLOWCONTROL is not set
 # CONFIG_USART3_OFLOWCONTROL is not set
 # CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -585,6 +721,7 @@ CONFIG_USART3_2STOP=0
 # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
 # CONFIG_FS_READABLE is not set
 # CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_AIO is not set
 # CONFIG_FS_NAMED_SEMAPHORES is not set
 CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
@@ -597,12 +734,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -667,7 +798,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -675,8 +805,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -695,10 +827,6 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # Application Configuration
 #
 
-#
-# NxWidgets/NxWM
-#
-
 #
 # Built-In Applications
 #
@@ -714,7 +842,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_BUTTONS is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -723,10 +850,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_HELLO is not set
 CONFIG_EXAMPLES_HELLOXX=y
 CONFIG_EXAMPLES_HELLOXX_CXXINITIALIZE=y
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 CONFIG_EXAMPLES_LEDS=y
 CONFIG_EXAMPLES_LEDS_PRIORITY=100
 CONFIG_EXAMPLES_LEDS_STACKSIZE=2048
@@ -741,35 +868,34 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -791,8 +917,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -803,6 +929,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -856,13 +983,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PSSTACKUSAGE is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
 # CONFIG_NSH_DISABLE_RM is not set
@@ -878,6 +1005,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -903,6 +1031,10 @@ CONFIG_NSH_ARCHINIT=y
 # CONFIG_NSH_LOGIN is not set
 # CONFIG_NSH_CONSOLE_LOGIN is not set
 
+#
+# NxWidgets/NxWM
+#
+
 #
 # Platform-specific Support
 #
@@ -911,12 +1043,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -927,7 +1059,8 @@ CONFIG_READLINE_MAX_EXTCMDS=64
 CONFIG_READLINE_CMD_HISTORY=y
 CONFIG_READLINE_CMD_HISTORY_LINELEN=80
 CONFIG_READLINE_CMD_HISTORY_LEN=16
+# CONFIG_SYSTEM_STACKMONITOR is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/nucleo-144/evalos/setenv.sh b/configs/nucleo-144/f746-evalos/setenv.sh
similarity index 98%
rename from configs/nucleo-144/evalos/setenv.sh
rename to configs/nucleo-144/f746-evalos/setenv.sh
index 0f767948bf43e9a32c7b27bc348ae1e2632de10f..84db5f90ee303d48005822c3fb42213452ddcf4d 100644
--- a/configs/nucleo-144/evalos/setenv.sh
+++ b/configs/nucleo-144/f746-evalos/setenv.sh
@@ -1,5 +1,5 @@
 #!/bin/bash
-# configs/nucleo-144/evalos/setenv.sh
+# configs/nucleo-144/f746-evalos/setenv.sh
 #
 #   Copyright (C) 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
diff --git a/configs/nucleo-144/f746-nsh/Make.defs b/configs/nucleo-144/f746-nsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..a75af5d690b24dbb946870c81023f8b6e6fcaf4e
--- /dev/null
+++ b/configs/nucleo-144/f746-nsh/Make.defs
@@ -0,0 +1,114 @@
+############################################################################
+# configs/nucleo-144/f746-nsh/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Authors: Gregory Nutt 
+#            David Sidrane 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = f746-flash.ld
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/nucleo-144/nsh/defconfig b/configs/nucleo-144/f746-nsh/defconfig
similarity index 77%
rename from configs/nucleo-144/nsh/defconfig
rename to configs/nucleo-144/f746-nsh/defconfig
index cb59abca25ccc44bc79bf7e29845bd4abc3bdf44..3e9b47b4f2abc157cdf85000656e72fdd80c8771 100644
--- a/configs/nucleo-144/nsh/defconfig
+++ b/configs/nucleo-144/f746-nsh/defconfig
@@ -16,7 +16,7 @@ CONFIG_HOST_LINUX=y
 #
 # Build Configuration
 #
-CONFIG_APPS_DIR="../apps"
+# CONFIG_APPS_DIR="../apps"
 CONFIG_BUILD_FLAT=y
 # CONFIG_BUILD_2PASS is not set
 
@@ -24,7 +24,7 @@ CONFIG_BUILD_FLAT=y
 # Binary Output Formats
 #
 # CONFIG_RRLOAD_BINARY is not set
-CONFIG_INTELHEX_BINARY=y
+# CONFIG_INTELHEX_BINARY is not set
 # CONFIG_MOTOROLA_SREC is not set
 CONFIG_RAW_BINARY=y
 # CONFIG_UBOOT_UIMAGE is not set
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
-# CONFIG_STACK_COLORATION is not set
+CONFIG_STACK_COLORATION=y
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 CONFIG_DEBUG_NOOPT=y
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -124,7 +124,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 CONFIG_ARMV7M_CMNVECTOR=y
 # CONFIG_ARMV7M_LAZYFPU is not set
 CONFIG_ARCH_HAVE_FPU=y
-CONFIG_ARCH_HAVE_DPFPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
 # CONFIG_ARCH_FPU is not set
 # CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
@@ -151,22 +151,121 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
+# CONFIG_USART6_RS485 is not set
+CONFIG_SERIAL_DISABLE_REORDERING=y
 
 #
 # STM32 F7 Configuration Options
 #
-# CONFIG_ARCH_CHIP_STM32F745 is not set
-CONFIG_ARCH_CHIP_STM32F746=y
-# CONFIG_ARCH_CHIP_STM32F756 is not set
+# CONFIG_ARCH_CHIP_STM32F745VG is not set
+# CONFIG_ARCH_CHIP_STM32F745VE is not set
+# CONFIG_ARCH_CHIP_STM32F745IG is not set
+# CONFIG_ARCH_CHIP_STM32F745IE is not set
+# CONFIG_ARCH_CHIP_STM32F745ZE is not set
+# CONFIG_ARCH_CHIP_STM32F745ZG is not set
+# CONFIG_ARCH_CHIP_STM32F746BG is not set
+# CONFIG_ARCH_CHIP_STM32F746VG is not set
+# CONFIG_ARCH_CHIP_STM32F746VE is not set
+# CONFIG_ARCH_CHIP_STM32F746BE is not set
+CONFIG_ARCH_CHIP_STM32F746ZG=y
+# CONFIG_ARCH_CHIP_STM32F746IE is not set
+# CONFIG_ARCH_CHIP_STM32F746NG is not set
+# CONFIG_ARCH_CHIP_STM32F746NE is not set
+# CONFIG_ARCH_CHIP_STM32F746ZE is not set
+# CONFIG_ARCH_CHIP_STM32F746IG is not set
+# CONFIG_ARCH_CHIP_STM32F756NG is not set
+# CONFIG_ARCH_CHIP_STM32F756BG is not set
+# CONFIG_ARCH_CHIP_STM32F756IG is not set
+# CONFIG_ARCH_CHIP_STM32F756VG is not set
+# CONFIG_ARCH_CHIP_STM32F756ZG is not set
+# CONFIG_ARCH_CHIP_STM32F765NI is not set
+# CONFIG_ARCH_CHIP_STM32F765VI is not set
+# CONFIG_ARCH_CHIP_STM32F765VG is not set
+# CONFIG_ARCH_CHIP_STM32F765BI is not set
+# CONFIG_ARCH_CHIP_STM32F765NG is not set
+# CONFIG_ARCH_CHIP_STM32F765ZG is not set
+# CONFIG_ARCH_CHIP_STM32F765ZI is not set
+# CONFIG_ARCH_CHIP_STM32F765IG is not set
+# CONFIG_ARCH_CHIP_STM32F765BG is not set
+# CONFIG_ARCH_CHIP_STM32F765II is not set
+# CONFIG_ARCH_CHIP_STM32F767NG is not set
+# CONFIG_ARCH_CHIP_STM32F767IG is not set
+# CONFIG_ARCH_CHIP_STM32F767VG is not set
+# CONFIG_ARCH_CHIP_STM32F767ZG is not set
+# CONFIG_ARCH_CHIP_STM32F767NI is not set
+# CONFIG_ARCH_CHIP_STM32F767VI is not set
+# CONFIG_ARCH_CHIP_STM32F767BG is not set
+# CONFIG_ARCH_CHIP_STM32F767ZI is not set
+# CONFIG_ARCH_CHIP_STM32F767II is not set
+# CONFIG_ARCH_CHIP_STM32F769BI is not set
+# CONFIG_ARCH_CHIP_STM32F769II is not set
+# CONFIG_ARCH_CHIP_STM32F769BG is not set
+# CONFIG_ARCH_CHIP_STM32F769NI is not set
+# CONFIG_ARCH_CHIP_STM32F769AI is not set
+# CONFIG_ARCH_CHIP_STM32F769NG is not set
+# CONFIG_ARCH_CHIP_STM32F769IG is not set
+# CONFIG_ARCH_CHIP_STM32F777ZI is not set
+# CONFIG_ARCH_CHIP_STM32F777VI is not set
+# CONFIG_ARCH_CHIP_STM32F777NI is not set
+# CONFIG_ARCH_CHIP_STM32F777BI is not set
+# CONFIG_ARCH_CHIP_STM32F777II is not set
+# CONFIG_ARCH_CHIP_STM32F778AI is not set
+# CONFIG_ARCH_CHIP_STM32F779II is not set
+# CONFIG_ARCH_CHIP_STM32F779NI is not set
+# CONFIG_ARCH_CHIP_STM32F779BI is not set
+# CONFIG_ARCH_CHIP_STM32F779AI is not set
 CONFIG_STM32F7_STM32F74XX=y
 # CONFIG_STM32F7_STM32F75XX is not set
-# CONFIG_STM32F7_FLASH_512KB is not set
-CONFIG_STM32F7_FLASH_1024KB=y
+# CONFIG_STM32F7_STM32F76XX is not set
+# CONFIG_STM32F7_STM32F77XX is not set
+# CONFIG_STM32F7_IO_CONFIG_V is not set
+# CONFIG_STM32F7_IO_CONFIG_I is not set
+CONFIG_STM32F7_IO_CONFIG_Z=y
+# CONFIG_STM32F7_IO_CONFIG_N is not set
+# CONFIG_STM32F7_IO_CONFIG_B is not set
+# CONFIG_STM32F7_IO_CONFIG_A is not set
+# CONFIG_STM32F7_STM32F745XX is not set
+CONFIG_STM32F7_STM32F746XX=y
+# CONFIG_STM32F7_STM32F756XX is not set
+# CONFIG_STM32F7_STM32F765XX is not set
+# CONFIG_STM32F7_STM32F767XX is not set
+# CONFIG_STM32F7_STM32F768XX is not set
+# CONFIG_STM32F7_STM32F768AX is not set
+# CONFIG_STM32F7_STM32F769XX is not set
+# CONFIG_STM32F7_STM32F769AX is not set
+# CONFIG_STM32F7_STM32F777XX is not set
+# CONFIG_STM32F7_STM32F778XX is not set
+# CONFIG_STM32F7_STM32F778AX is not set
+# CONFIG_STM32F7_STM32F779XX is not set
+# CONFIG_STM32F7_STM32F779AX is not set
+# CONFIG_STM32F7_FLASH_CONFIG_E is not set
+# CONFIG_STM32F7_FLASH_CONFIG_I is not set
+CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT=y
+# CONFIG_STM32F7_FLASH_OVERRIDE_E is not set
+# CONFIG_STM32F7_FLASH_OVERRIDE_G is not set
+# CONFIG_STM32F7_FLASH_OVERRIDE_I is not set
 
 #
 # STM32 Peripheral Support
 #
 CONFIG_STM32F7_HAVE_LTDC=y
+CONFIG_STM32F7_HAVE_FSMC=y
+CONFIG_STM32F7_HAVE_ETHRNET=y
+CONFIG_STM32F7_HAVE_RNG=y
+CONFIG_STM32F7_HAVE_SPI5=y
+CONFIG_STM32F7_HAVE_SPI6=y
+# CONFIG_STM32F7_HAVE_SDMMC2 is not set
+# CONFIG_STM32F7_HAVE_ADC1_DMA is not set
+# CONFIG_STM32F7_HAVE_ADC2_DMA is not set
+# CONFIG_STM32F7_HAVE_ADC3_DMA is not set
+# CONFIG_STM32F7_HAVE_CAN3 is not set
+CONFIG_STM32F7_HAVE_DCMI=y
+# CONFIG_STM32F7_HAVE_DSIHOST is not set
+CONFIG_STM32F7_HAVE_DMA2D=y
+# CONFIG_STM32F7_HAVE_JPEG is not set
+# CONFIG_STM32F7_HAVE_CRYP is not set
+# CONFIG_STM32F7_HAVE_HASH is not set
+# CONFIG_STM32F7_HAVE_DFSDM1 is not set
 # CONFIG_STM32F7_ADC is not set
 # CONFIG_STM32F7_CAN is not set
 # CONFIG_STM32F7_DAC is not set
@@ -174,6 +273,7 @@ CONFIG_STM32F7_HAVE_LTDC=y
 # CONFIG_STM32F7_I2C is not set
 # CONFIG_STM32F7_SAI is not set
 # CONFIG_STM32F7_SPI is not set
+# CONFIG_STM32F7_TIM is not set
 CONFIG_STM32F7_USART=y
 # CONFIG_STM32F7_ADC1 is not set
 # CONFIG_STM32F7_ADC2 is not set
@@ -183,25 +283,26 @@ CONFIG_STM32F7_USART=y
 # CONFIG_STM32F7_CAN2 is not set
 # CONFIG_STM32F7_CEC is not set
 # CONFIG_STM32F7_CRC is not set
-# CONFIG_STM32F7_CRYP is not set
 # CONFIG_STM32F7_DMA1 is not set
 # CONFIG_STM32F7_DMA2 is not set
 # CONFIG_STM32F7_DAC1 is not set
 # CONFIG_STM32F7_DAC2 is not set
 # CONFIG_STM32F7_DCMI is not set
+# CONFIG_STM32F7_DMA2D is not set
 # CONFIG_STM32F7_ETHMAC is not set
 # CONFIG_STM32F7_FSMC is not set
 # CONFIG_STM32F7_I2C1 is not set
 # CONFIG_STM32F7_I2C2 is not set
 # CONFIG_STM32F7_I2C3 is not set
+# CONFIG_STM32F7_I2C4 is not set
 # CONFIG_STM32F7_LPTIM1 is not set
 # CONFIG_STM32F7_LTDC is not set
-# CONFIG_STM32F7_DMA2D is not set
 # CONFIG_STM32F7_OTGFS is not set
 # CONFIG_STM32F7_OTGHS is not set
 # CONFIG_STM32F7_QUADSPI is not set
-# CONFIG_STM32F7_SAI1 is not set
+# CONFIG_STM32F7_PWR is not set
 # CONFIG_STM32F7_RNG is not set
+# CONFIG_STM32F7_SAI1 is not set
 # CONFIG_STM32F7_SAI2 is not set
 # CONFIG_STM32F7_SDMMC1 is not set
 # CONFIG_STM32F7_SPDIFRX is not set
@@ -225,7 +326,6 @@ CONFIG_STM32F7_USART=y
 # CONFIG_STM32F7_TIM12 is not set
 # CONFIG_STM32F7_TIM13 is not set
 # CONFIG_STM32F7_TIM14 is not set
-# CONFIG_STM32F7_TIM15 is not set
 # CONFIG_STM32F7_USART1 is not set
 # CONFIG_STM32F7_USART2 is not set
 # CONFIG_STM32F7_USART3 is not set
@@ -236,7 +336,21 @@ CONFIG_STM32F7_USART6=y
 # CONFIG_STM32F7_UART8 is not set
 # CONFIG_STM32F7_IWDG is not set
 # CONFIG_STM32F7_WWDG is not set
+
+#
+# U[S]ART Configuration
+#
+CONFIG_STM32F7_FLOWCONTROL_BROKEN=y
+CONFIG_STM32F7_USART_BREAKS=y
+CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y
+# CONFIG_STM32F7_HAVE_RTC_COUNTER is not set
+# CONFIG_STM32F7_HAVE_RTC_SUBSECONDS is not set
 # CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32F7_DTCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
 
 #
 # Architecture Options
@@ -299,7 +413,6 @@ CONFIG_RAM_SIZE=245760
 #
 # Board Selection
 #
-# CONFIG_ARCH_BOARD_STM32F746G_DISCO is not set
 CONFIG_ARCH_BOARD_NUCLEO_144=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="nucleo-144"
@@ -313,11 +426,16 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+CONFIG_NUCLEO_CONSOLE_ARDUINO=y
+# CONFIG_NUCLEO_CONSOLE_VIRTUAL is not set
+# CONFIG_NUCLEO_CONSOLE_MORPHO is not set
+# CONFIG_NUCLEO_CONSOLE_NONE is not set
+# CONFIG_NUCLEO_SPI_TEST is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -336,10 +454,11 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
-CONFIG_START_YEAR=2011
-CONFIG_START_MONTH=12
-CONFIG_START_DAY=6
+CONFIG_START_YEAR=2015
+CONFIG_START_MONTH=11
+CONFIG_START_DAY=30
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=4
 CONFIG_WDOG_INTRESERVE=0
@@ -428,6 +547,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -447,9 +567,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -463,8 +588,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -472,6 +607,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -480,9 +616,10 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -506,10 +643,6 @@ CONFIG_USART6_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -532,19 +665,25 @@ CONFIG_USART6_2STOP=0
 # CONFIG_USART6_IFLOWCONTROL is not set
 # CONFIG_USART6_OFLOWCONTROL is not set
 # CONFIG_USART6_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -582,12 +721,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -652,7 +785,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -660,8 +792,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -695,7 +829,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_BUTTONS is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -703,10 +836,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -716,34 +849,33 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -765,8 +897,8 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -777,6 +909,7 @@ CONFIG_EXAMPLES_NSH=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -830,13 +963,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PSSTACKUSAGE is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
 # CONFIG_NSH_DISABLE_RM is not set
@@ -852,6 +985,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -889,19 +1023,20 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_STACKMONITOR is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f746g-disco/netnsh/setenv.sh b/configs/nucleo-144/f746-nsh/setenv.sh
old mode 100755
new mode 100644
similarity index 97%
rename from configs/stm32f746g-disco/netnsh/setenv.sh
rename to configs/nucleo-144/f746-nsh/setenv.sh
index 427dcdd32c0f8dc93392bc4aabadbfeb964cca8e..6a5fa6c8011c878b2a67adec5ac57fee59e89bcf
--- a/configs/stm32f746g-disco/netnsh/setenv.sh
+++ b/configs/nucleo-144/f746-nsh/setenv.sh
@@ -1,7 +1,7 @@
 #!/bin/bash
-# configs/stm32f746g-disco/netnsh/setenv.sh
+# configs/nucleo-144/f746-nsh/setenv.sh
 #
-#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
diff --git a/configs/nucleo-144/f767-evalos/Make.defs b/configs/nucleo-144/f767-evalos/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..d4afca2f8a54f198024bc1c7d7dd6cabc1b9b37e
--- /dev/null
+++ b/configs/nucleo-144/f767-evalos/Make.defs
@@ -0,0 +1,114 @@
+############################################################################
+# configs/nucleo-144/f767-evalos/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Authors: Gregory Nutt 
+#            Mark Olsson 
+#            David Sidrane 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = f767-flash.ld
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
diff --git a/configs/nucleo-144/f767-evalos/defconfig b/configs/nucleo-144/f767-evalos/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..058f4a1c8784d546a333fa025a565452c7c794bc
--- /dev/null
+++ b/configs/nucleo-144/f767-evalos/defconfig
@@ -0,0 +1,1070 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+# CONFIG_INTELHEX_BINARY is not set
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+CONFIG_STACK_COLORATION=y
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+CONFIG_DEBUG_NOOPT=y
+# CONFIG_DEBUG_CUSTOMOPT is not set
+# CONFIG_DEBUG_FULLOPT is not set
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+# CONFIG_ARCH_CHIP_STM32 is not set
+CONFIG_ARCH_CHIP_STM32F7=y
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM4 is not set
+CONFIG_ARCH_CORTEXM7=y
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32f7"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+CONFIG_ARMV7M_CMNVECTOR=y
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+CONFIG_ARCH_HAVE_DPFPU=y
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+CONFIG_ARMV7M_HAVE_ICACHE=y
+CONFIG_ARMV7M_HAVE_DCACHE=y
+CONFIG_ARMV7M_ICACHE=y
+CONFIG_ARMV7M_DCACHE=y
+CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
+CONFIG_ARMV7M_HAVE_ITCM=y
+CONFIG_ARMV7M_HAVE_DTCM=y
+# CONFIG_ARMV7M_ITCM is not set
+CONFIG_ARMV7M_DTCM=y
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+# CONFIG_USART3_RS485 is not set
+CONFIG_SERIAL_DISABLE_REORDERING=y
+
+#
+# STM32 F7 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32F745VG is not set
+# CONFIG_ARCH_CHIP_STM32F745VE is not set
+# CONFIG_ARCH_CHIP_STM32F745IG is not set
+# CONFIG_ARCH_CHIP_STM32F745IE is not set
+# CONFIG_ARCH_CHIP_STM32F745ZE is not set
+# CONFIG_ARCH_CHIP_STM32F745ZG is not set
+# CONFIG_ARCH_CHIP_STM32F746BG is not set
+# CONFIG_ARCH_CHIP_STM32F746VG is not set
+# CONFIG_ARCH_CHIP_STM32F746VE is not set
+# CONFIG_ARCH_CHIP_STM32F746BE is not set
+# CONFIG_ARCH_CHIP_STM32F746ZG is not set
+# CONFIG_ARCH_CHIP_STM32F746IE is not set
+# CONFIG_ARCH_CHIP_STM32F746NG is not set
+# CONFIG_ARCH_CHIP_STM32F746NE is not set
+# CONFIG_ARCH_CHIP_STM32F746ZE is not set
+# CONFIG_ARCH_CHIP_STM32F746IG is not set
+# CONFIG_ARCH_CHIP_STM32F756NG is not set
+# CONFIG_ARCH_CHIP_STM32F756BG is not set
+# CONFIG_ARCH_CHIP_STM32F756IG is not set
+# CONFIG_ARCH_CHIP_STM32F756VG is not set
+# CONFIG_ARCH_CHIP_STM32F756ZG is not set
+# CONFIG_ARCH_CHIP_STM32F765NI is not set
+# CONFIG_ARCH_CHIP_STM32F765VI is not set
+# CONFIG_ARCH_CHIP_STM32F765VG is not set
+# CONFIG_ARCH_CHIP_STM32F765BI is not set
+# CONFIG_ARCH_CHIP_STM32F765NG is not set
+# CONFIG_ARCH_CHIP_STM32F765ZG is not set
+# CONFIG_ARCH_CHIP_STM32F765ZI is not set
+# CONFIG_ARCH_CHIP_STM32F765IG is not set
+# CONFIG_ARCH_CHIP_STM32F765BG is not set
+# CONFIG_ARCH_CHIP_STM32F765II is not set
+# CONFIG_ARCH_CHIP_STM32F767NG is not set
+# CONFIG_ARCH_CHIP_STM32F767IG is not set
+# CONFIG_ARCH_CHIP_STM32F767VG is not set
+# CONFIG_ARCH_CHIP_STM32F767ZG is not set
+# CONFIG_ARCH_CHIP_STM32F767NI is not set
+# CONFIG_ARCH_CHIP_STM32F767VI is not set
+# CONFIG_ARCH_CHIP_STM32F767BG is not set
+CONFIG_ARCH_CHIP_STM32F767ZI=y
+# CONFIG_ARCH_CHIP_STM32F767II is not set
+# CONFIG_ARCH_CHIP_STM32F769BI is not set
+# CONFIG_ARCH_CHIP_STM32F769II is not set
+# CONFIG_ARCH_CHIP_STM32F769BG is not set
+# CONFIG_ARCH_CHIP_STM32F769NI is not set
+# CONFIG_ARCH_CHIP_STM32F769AI is not set
+# CONFIG_ARCH_CHIP_STM32F769NG is not set
+# CONFIG_ARCH_CHIP_STM32F769IG is not set
+# CONFIG_ARCH_CHIP_STM32F777ZI is not set
+# CONFIG_ARCH_CHIP_STM32F777VI is not set
+# CONFIG_ARCH_CHIP_STM32F777NI is not set
+# CONFIG_ARCH_CHIP_STM32F777BI is not set
+# CONFIG_ARCH_CHIP_STM32F777II is not set
+# CONFIG_ARCH_CHIP_STM32F778AI is not set
+# CONFIG_ARCH_CHIP_STM32F779II is not set
+# CONFIG_ARCH_CHIP_STM32F779NI is not set
+# CONFIG_ARCH_CHIP_STM32F779BI is not set
+# CONFIG_ARCH_CHIP_STM32F779AI is not set
+# CONFIG_STM32F7_STM32F74XX is not set
+# CONFIG_STM32F7_STM32F75XX is not set
+CONFIG_STM32F7_STM32F76XX=y
+# CONFIG_STM32F7_STM32F77XX is not set
+# CONFIG_STM32F7_IO_CONFIG_V is not set
+# CONFIG_STM32F7_IO_CONFIG_I is not set
+CONFIG_STM32F7_IO_CONFIG_Z=y
+# CONFIG_STM32F7_IO_CONFIG_N is not set
+# CONFIG_STM32F7_IO_CONFIG_B is not set
+# CONFIG_STM32F7_IO_CONFIG_A is not set
+# CONFIG_STM32F7_STM32F745XX is not set
+# CONFIG_STM32F7_STM32F746XX is not set
+# CONFIG_STM32F7_STM32F756XX is not set
+# CONFIG_STM32F7_STM32F765XX is not set
+CONFIG_STM32F7_STM32F767XX=y
+# CONFIG_STM32F7_STM32F768XX is not set
+# CONFIG_STM32F7_STM32F768AX is not set
+# CONFIG_STM32F7_STM32F769XX is not set
+# CONFIG_STM32F7_STM32F769AX is not set
+# CONFIG_STM32F7_STM32F777XX is not set
+# CONFIG_STM32F7_STM32F778XX is not set
+# CONFIG_STM32F7_STM32F778AX is not set
+# CONFIG_STM32F7_STM32F779XX is not set
+# CONFIG_STM32F7_STM32F779AX is not set
+# CONFIG_STM32F7_FLASH_CONFIG_E is not set
+CONFIG_STM32F7_FLASH_CONFIG_I=y
+CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT=y
+# CONFIG_STM32F7_FLASH_OVERRIDE_E is not set
+# CONFIG_STM32F7_FLASH_OVERRIDE_G is not set
+# CONFIG_STM32F7_FLASH_OVERRIDE_I is not set
+
+#
+# STM32 Peripheral Support
+#
+CONFIG_STM32F7_HAVE_LTDC=y
+CONFIG_STM32F7_HAVE_FSMC=y
+CONFIG_STM32F7_HAVE_ETHRNET=y
+CONFIG_STM32F7_HAVE_RNG=y
+CONFIG_STM32F7_HAVE_SPI5=y
+CONFIG_STM32F7_HAVE_SPI6=y
+CONFIG_STM32F7_HAVE_SDMMC2=y
+# CONFIG_STM32F7_HAVE_ADC1_DMA is not set
+# CONFIG_STM32F7_HAVE_ADC2_DMA is not set
+# CONFIG_STM32F7_HAVE_ADC3_DMA is not set
+CONFIG_STM32F7_HAVE_CAN3=y
+CONFIG_STM32F7_HAVE_DCMI=y
+# CONFIG_STM32F7_HAVE_DSIHOST is not set
+CONFIG_STM32F7_HAVE_DMA2D=y
+CONFIG_STM32F7_HAVE_JPEG=y
+# CONFIG_STM32F7_HAVE_CRYP is not set
+# CONFIG_STM32F7_HAVE_HASH is not set
+CONFIG_STM32F7_HAVE_DFSDM1=y
+# CONFIG_STM32F7_ADC is not set
+# CONFIG_STM32F7_CAN is not set
+# CONFIG_STM32F7_DAC is not set
+# CONFIG_STM32F7_DMA is not set
+# CONFIG_STM32F7_I2C is not set
+# CONFIG_STM32F7_SAI is not set
+# CONFIG_STM32F7_SPI is not set
+# CONFIG_STM32F7_TIM is not set
+CONFIG_STM32F7_USART=y
+# CONFIG_STM32F7_ADC1 is not set
+# CONFIG_STM32F7_ADC2 is not set
+# CONFIG_STM32F7_ADC3 is not set
+# CONFIG_STM32F7_BKPSRAM is not set
+# CONFIG_STM32F7_CAN1 is not set
+# CONFIG_STM32F7_CAN2 is not set
+# CONFIG_STM32F7_CAN3 is not set
+# CONFIG_STM32F7_CEC is not set
+# CONFIG_STM32F7_CRC is not set
+# CONFIG_STM32F7_DFSDM1 is not set
+# CONFIG_STM32F7_DMA1 is not set
+# CONFIG_STM32F7_DMA2 is not set
+# CONFIG_STM32F7_DAC1 is not set
+# CONFIG_STM32F7_DAC2 is not set
+# CONFIG_STM32F7_DCMI is not set
+# CONFIG_STM32F7_DMA2D is not set
+# CONFIG_STM32F7_JPEG is not set
+# CONFIG_STM32F7_ETHMAC is not set
+# CONFIG_STM32F7_FSMC is not set
+# CONFIG_STM32F7_I2C1 is not set
+# CONFIG_STM32F7_I2C2 is not set
+# CONFIG_STM32F7_I2C3 is not set
+# CONFIG_STM32F7_I2C4 is not set
+# CONFIG_STM32F7_LPTIM1 is not set
+# CONFIG_STM32F7_LTDC is not set
+# CONFIG_STM32F7_OTGFS is not set
+# CONFIG_STM32F7_OTGHS is not set
+# CONFIG_STM32F7_QUADSPI is not set
+# CONFIG_STM32F7_PWR is not set
+# CONFIG_STM32F7_RNG is not set
+# CONFIG_STM32F7_SAI1 is not set
+# CONFIG_STM32F7_SAI2 is not set
+# CONFIG_STM32F7_SDMMC1 is not set
+# CONFIG_STM32F7_SDMMC2 is not set
+# CONFIG_STM32F7_SPDIFRX is not set
+# CONFIG_STM32F7_SPI1 is not set
+# CONFIG_STM32F7_SPI2 is not set
+# CONFIG_STM32F7_SPI3 is not set
+# CONFIG_STM32F7_SPI4 is not set
+# CONFIG_STM32F7_SPI5 is not set
+# CONFIG_STM32F7_SPI6 is not set
+# CONFIG_STM32F7_TIM1 is not set
+# CONFIG_STM32F7_TIM2 is not set
+# CONFIG_STM32F7_TIM3 is not set
+# CONFIG_STM32F7_TIM4 is not set
+# CONFIG_STM32F7_TIM5 is not set
+# CONFIG_STM32F7_TIM6 is not set
+# CONFIG_STM32F7_TIM7 is not set
+# CONFIG_STM32F7_TIM8 is not set
+# CONFIG_STM32F7_TIM9 is not set
+# CONFIG_STM32F7_TIM10 is not set
+# CONFIG_STM32F7_TIM11 is not set
+# CONFIG_STM32F7_TIM12 is not set
+# CONFIG_STM32F7_TIM13 is not set
+# CONFIG_STM32F7_TIM14 is not set
+# CONFIG_STM32F7_USART1 is not set
+# CONFIG_STM32F7_USART2 is not set
+CONFIG_STM32F7_USART3=y
+# CONFIG_STM32F7_UART4 is not set
+# CONFIG_STM32F7_UART5 is not set
+# CONFIG_STM32F7_USART6 is not set
+# CONFIG_STM32F7_UART7 is not set
+# CONFIG_STM32F7_UART8 is not set
+# CONFIG_STM32F7_IWDG is not set
+# CONFIG_STM32F7_WWDG is not set
+
+#
+# U[S]ART Configuration
+#
+CONFIG_STM32F7_FLOWCONTROL_BROKEN=y
+CONFIG_STM32F7_USART_BREAKS=y
+CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y
+# CONFIG_STM32F7_HAVE_RTC_COUNTER is not set
+# CONFIG_STM32F7_HAVE_RTC_SUBSECONDS is not set
+# CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32F7_DTCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=43103
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20010000
+CONFIG_RAM_SIZE=245760
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_NUCLEO_144=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="nucleo-144"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+# CONFIG_ARCH_LEDS is not set
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+# CONFIG_ARCH_IRQBUTTONS is not set
+
+#
+# Board-Specific Options
+#
+# CONFIG_NUCLEO_CONSOLE_ARDUINO is not set
+CONFIG_NUCLEO_CONSOLE_VIRTUAL=y
+# CONFIG_NUCLEO_CONSOLE_MORPHO is not set
+# CONFIG_NUCLEO_CONSOLE_NONE is not set
+# CONFIG_NUCLEO_SPI_TEST is not set
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+# CONFIG_DISABLE_OS_API is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2015
+CONFIG_START_MONTH=11
+CONFIG_START_DAY=30
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+CONFIG_PRIORITY_INHERITANCE=y
+CONFIG_SEM_PREALLOCHOLDERS=16
+CONFIG_SEM_NNESTPRIO=16
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=100000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+CONFIG_SCHED_LPWORK=y
+CONFIG_SCHED_LPNTHREADS=1
+CONFIG_SCHED_LPWORKPRIORITY=50
+CONFIG_SCHED_LPWORKPRIOMAX=176
+CONFIG_SCHED_LPWORKPERIOD=50000
+CONFIG_SCHED_LPWORKSTACKSIZE=2048
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+CONFIG_DISABLE_POLL=y
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+CONFIG_USERLED=y
+CONFIG_USERLED_LOWER=y
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+CONFIG_USART3_SERIALDRIVER=y
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART3_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART3 Configuration
+#
+CONFIG_USART3_RXBUFSIZE=256
+CONFIG_USART3_TXBUFSIZE=256
+CONFIG_USART3_BAUD=115200
+CONFIG_USART3_BITS=8
+CONFIG_USART3_PARITY=0
+CONFIG_USART3_2STOP=0
+# CONFIG_USART3_IFLOWCONTROL is not set
+# CONFIG_USART3_OFLOWCONTROL is not set
+# CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_FS_READABLE is not set
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_AIO is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=3
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+CONFIG_EXAMPLES_HELLOXX=y
+CONFIG_EXAMPLES_HELLOXX_CXXINITIALIZE=y
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+CONFIG_EXAMPLES_LEDS=y
+CONFIG_EXAMPLES_LEDS_PRIORITY=100
+CONFIG_EXAMPLES_LEDS_STACKSIZE=2048
+CONFIG_EXAMPLES_LEDS_DEVPATH="/dev/userleds"
+CONFIG_EXAMPLES_LEDS_LEDSET=0x0f
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+# CONFIG_NSH_DISABLE_DATE is not set
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PSSTACKUSAGE is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CMDOPT_DF_H=y
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_READLINE_MAX_BUILTINS=64
+CONFIG_READLINE_MAX_EXTCMDS=64
+CONFIG_READLINE_CMD_HISTORY=y
+CONFIG_READLINE_CMD_HISTORY_LINELEN=80
+CONFIG_READLINE_CMD_HISTORY_LEN=16
+# CONFIG_SYSTEM_STACKMONITOR is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/nucleo-144/f767-evalos/setenv.sh b/configs/nucleo-144/f767-evalos/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..cf10804e8411846506457c53b70d345849977ea5
--- /dev/null
+++ b/configs/nucleo-144/f767-evalos/setenv.sh
@@ -0,0 +1,78 @@
+#!/bin/bash
+# configs/nucleo-144/f767-evalos/setenv.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#   Author: Mark Olsson 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the Atmel GCC
+# toolchain under Windows.  You will also have to edit this if you install
+# this toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/nucleo-144/f767-nsh/Make.defs b/configs/nucleo-144/f767-nsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..43b4e474b6d29a00715ad244b6bdfaf0b6a96f97
--- /dev/null
+++ b/configs/nucleo-144/f767-nsh/Make.defs
@@ -0,0 +1,114 @@
+############################################################################
+# configs/nucleo-144/f767-nsh/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Authors: Gregory Nutt 
+#            David Sidrane 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = f767-flash.ld
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/stm32f746g-disco/knsh/defconfig b/configs/nucleo-144/f767-nsh/defconfig
similarity index 73%
rename from configs/stm32f746g-disco/knsh/defconfig
rename to configs/nucleo-144/f767-nsh/defconfig
index 6edc370a2365da71288ef0a95dd866606deb8c77..5131470f0fa18c12ca45e62b63b51e7583e65e5f 100644
--- a/configs/stm32f746g-disco/knsh/defconfig
+++ b/configs/nucleo-144/f767-nsh/defconfig
@@ -8,32 +8,23 @@
 #
 # CONFIG_EXPERIMENTAL is not set
 # CONFIG_DEFAULT_SMALL is not set
-# CONFIG_HOST_LINUX is not set
+CONFIG_HOST_LINUX=y
 # CONFIG_HOST_OSX is not set
-CONFIG_HOST_WINDOWS=y
+# CONFIG_HOST_WINDOWS is not set
 # CONFIG_HOST_OTHER is not set
-# CONFIG_WINDOWS_NATIVE is not set
-CONFIG_WINDOWS_CYGWIN=y
-# CONFIG_WINDOWS_MSYS is not set
-# CONFIG_WINDOWS_OTHER is not set
 
 #
 # Build Configuration
 #
 # CONFIG_APPS_DIR="../apps"
-# CONFIG_BUILD_FLAT is not set
-CONFIG_BUILD_PROTECTED=y
-CONFIG_BUILD_2PASS=y
-CONFIG_PASS1_TARGET="all"
-CONFIG_PASS1_BUILDIR="configs/stm32f746g-disco/kernel"
-CONFIG_PASS1_OBJECT=""
-CONFIG_NUTTX_USERSPACE=0x08020000
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
 
 #
 # Binary Output Formats
 #
 # CONFIG_RRLOAD_BINARY is not set
-CONFIG_INTELHEX_BINARY=y
+# CONFIG_INTELHEX_BINARY is not set
 # CONFIG_MOTOROLA_SREC is not set
 CONFIG_RAW_BINARY=y
 # CONFIG_UBOOT_UIMAGE is not set
@@ -51,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
-# CONFIG_STACK_COLORATION is not set
+CONFIG_STACK_COLORATION=y
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 CONFIG_DEBUG_NOOPT=y
@@ -68,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -81,10 +73,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -103,6 +95,7 @@ CONFIG_ARCH="arm"
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 CONFIG_ARCH_CHIP_STM32F7=y
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -124,6 +117,7 @@ CONFIG_ARCH_CORTEXM7=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="stm32f7"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
 CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
@@ -132,9 +126,9 @@ CONFIG_ARMV7M_CMNVECTOR=y
 CONFIG_ARCH_HAVE_FPU=y
 CONFIG_ARCH_HAVE_DPFPU=y
 # CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
-CONFIG_ARM_MPU=y
-CONFIG_ARM_MPU_NREGIONS=16
+# CONFIG_ARM_MPU is not set
 
 #
 # ARMV7M Configuration Options
@@ -148,34 +142,130 @@ CONFIG_ARMV7M_HAVE_ITCM=y
 CONFIG_ARMV7M_HAVE_DTCM=y
 # CONFIG_ARMV7M_ITCM is not set
 CONFIG_ARMV7M_DTCM=y
-# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
-# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
-# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set
-# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set
-# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
-CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y
-# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
 CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
+# CONFIG_USART6_RS485 is not set
+CONFIG_SERIAL_DISABLE_REORDERING=y
 
 #
 # STM32 F7 Configuration Options
 #
-# CONFIG_ARCH_CHIP_STM32F745 is not set
-CONFIG_ARCH_CHIP_STM32F746=y
-# CONFIG_ARCH_CHIP_STM32F756 is not set
-CONFIG_STM32F7_STM32F74XX=y
+# CONFIG_ARCH_CHIP_STM32F745VG is not set
+# CONFIG_ARCH_CHIP_STM32F745VE is not set
+# CONFIG_ARCH_CHIP_STM32F745IG is not set
+# CONFIG_ARCH_CHIP_STM32F745IE is not set
+# CONFIG_ARCH_CHIP_STM32F745ZE is not set
+# CONFIG_ARCH_CHIP_STM32F745ZG is not set
+# CONFIG_ARCH_CHIP_STM32F746BG is not set
+# CONFIG_ARCH_CHIP_STM32F746VG is not set
+# CONFIG_ARCH_CHIP_STM32F746VE is not set
+# CONFIG_ARCH_CHIP_STM32F746BE is not set
+# CONFIG_ARCH_CHIP_STM32F746ZG is not set
+# CONFIG_ARCH_CHIP_STM32F746IE is not set
+# CONFIG_ARCH_CHIP_STM32F746NG is not set
+# CONFIG_ARCH_CHIP_STM32F746NE is not set
+# CONFIG_ARCH_CHIP_STM32F746ZE is not set
+# CONFIG_ARCH_CHIP_STM32F746IG is not set
+# CONFIG_ARCH_CHIP_STM32F756NG is not set
+# CONFIG_ARCH_CHIP_STM32F756BG is not set
+# CONFIG_ARCH_CHIP_STM32F756IG is not set
+# CONFIG_ARCH_CHIP_STM32F756VG is not set
+# CONFIG_ARCH_CHIP_STM32F756ZG is not set
+# CONFIG_ARCH_CHIP_STM32F765NI is not set
+# CONFIG_ARCH_CHIP_STM32F765VI is not set
+# CONFIG_ARCH_CHIP_STM32F765VG is not set
+# CONFIG_ARCH_CHIP_STM32F765BI is not set
+# CONFIG_ARCH_CHIP_STM32F765NG is not set
+# CONFIG_ARCH_CHIP_STM32F765ZG is not set
+# CONFIG_ARCH_CHIP_STM32F765ZI is not set
+# CONFIG_ARCH_CHIP_STM32F765IG is not set
+# CONFIG_ARCH_CHIP_STM32F765BG is not set
+# CONFIG_ARCH_CHIP_STM32F765II is not set
+# CONFIG_ARCH_CHIP_STM32F767NG is not set
+# CONFIG_ARCH_CHIP_STM32F767IG is not set
+# CONFIG_ARCH_CHIP_STM32F767VG is not set
+# CONFIG_ARCH_CHIP_STM32F767ZG is not set
+# CONFIG_ARCH_CHIP_STM32F767NI is not set
+# CONFIG_ARCH_CHIP_STM32F767VI is not set
+# CONFIG_ARCH_CHIP_STM32F767BG is not set
+CONFIG_ARCH_CHIP_STM32F767ZI=y
+# CONFIG_ARCH_CHIP_STM32F767II is not set
+# CONFIG_ARCH_CHIP_STM32F769BI is not set
+# CONFIG_ARCH_CHIP_STM32F769II is not set
+# CONFIG_ARCH_CHIP_STM32F769BG is not set
+# CONFIG_ARCH_CHIP_STM32F769NI is not set
+# CONFIG_ARCH_CHIP_STM32F769AI is not set
+# CONFIG_ARCH_CHIP_STM32F769NG is not set
+# CONFIG_ARCH_CHIP_STM32F769IG is not set
+# CONFIG_ARCH_CHIP_STM32F777ZI is not set
+# CONFIG_ARCH_CHIP_STM32F777VI is not set
+# CONFIG_ARCH_CHIP_STM32F777NI is not set
+# CONFIG_ARCH_CHIP_STM32F777BI is not set
+# CONFIG_ARCH_CHIP_STM32F777II is not set
+# CONFIG_ARCH_CHIP_STM32F778AI is not set
+# CONFIG_ARCH_CHIP_STM32F779II is not set
+# CONFIG_ARCH_CHIP_STM32F779NI is not set
+# CONFIG_ARCH_CHIP_STM32F779BI is not set
+# CONFIG_ARCH_CHIP_STM32F779AI is not set
+# CONFIG_STM32F7_STM32F74XX is not set
 # CONFIG_STM32F7_STM32F75XX is not set
-# CONFIG_STM32F7_FLASH_512KB is not set
-CONFIG_STM32F7_FLASH_1024KB=y
+CONFIG_STM32F7_STM32F76XX=y
+# CONFIG_STM32F7_STM32F77XX is not set
+# CONFIG_STM32F7_IO_CONFIG_V is not set
+# CONFIG_STM32F7_IO_CONFIG_I is not set
+CONFIG_STM32F7_IO_CONFIG_Z=y
+# CONFIG_STM32F7_IO_CONFIG_N is not set
+# CONFIG_STM32F7_IO_CONFIG_B is not set
+# CONFIG_STM32F7_IO_CONFIG_A is not set
+# CONFIG_STM32F7_STM32F745XX is not set
+# CONFIG_STM32F7_STM32F746XX is not set
+# CONFIG_STM32F7_STM32F756XX is not set
+# CONFIG_STM32F7_STM32F765XX is not set
+CONFIG_STM32F7_STM32F767XX=y
+# CONFIG_STM32F7_STM32F768XX is not set
+# CONFIG_STM32F7_STM32F768AX is not set
+# CONFIG_STM32F7_STM32F769XX is not set
+# CONFIG_STM32F7_STM32F769AX is not set
+# CONFIG_STM32F7_STM32F777XX is not set
+# CONFIG_STM32F7_STM32F778XX is not set
+# CONFIG_STM32F7_STM32F778AX is not set
+# CONFIG_STM32F7_STM32F779XX is not set
+# CONFIG_STM32F7_STM32F779AX is not set
+# CONFIG_STM32F7_FLASH_CONFIG_E is not set
+CONFIG_STM32F7_FLASH_CONFIG_I=y
+CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT=y
+# CONFIG_STM32F7_FLASH_OVERRIDE_E is not set
+# CONFIG_STM32F7_FLASH_OVERRIDE_G is not set
+# CONFIG_STM32F7_FLASH_OVERRIDE_I is not set
 
 #
 # STM32 Peripheral Support
 #
 CONFIG_STM32F7_HAVE_LTDC=y
+CONFIG_STM32F7_HAVE_FSMC=y
+CONFIG_STM32F7_HAVE_ETHRNET=y
+CONFIG_STM32F7_HAVE_RNG=y
+CONFIG_STM32F7_HAVE_SPI5=y
+CONFIG_STM32F7_HAVE_SPI6=y
+CONFIG_STM32F7_HAVE_SDMMC2=y
+# CONFIG_STM32F7_HAVE_ADC1_DMA is not set
+# CONFIG_STM32F7_HAVE_ADC2_DMA is not set
+# CONFIG_STM32F7_HAVE_ADC3_DMA is not set
+CONFIG_STM32F7_HAVE_CAN3=y
+CONFIG_STM32F7_HAVE_DCMI=y
+# CONFIG_STM32F7_HAVE_DSIHOST is not set
+CONFIG_STM32F7_HAVE_DMA2D=y
+CONFIG_STM32F7_HAVE_JPEG=y
+# CONFIG_STM32F7_HAVE_CRYP is not set
+# CONFIG_STM32F7_HAVE_HASH is not set
+CONFIG_STM32F7_HAVE_DFSDM1=y
 # CONFIG_STM32F7_ADC is not set
 # CONFIG_STM32F7_CAN is not set
 # CONFIG_STM32F7_DAC is not set
@@ -183,6 +273,7 @@ CONFIG_STM32F7_HAVE_LTDC=y
 # CONFIG_STM32F7_I2C is not set
 # CONFIG_STM32F7_SAI is not set
 # CONFIG_STM32F7_SPI is not set
+# CONFIG_STM32F7_TIM is not set
 CONFIG_STM32F7_USART=y
 # CONFIG_STM32F7_ADC1 is not set
 # CONFIG_STM32F7_ADC2 is not set
@@ -190,29 +281,34 @@ CONFIG_STM32F7_USART=y
 # CONFIG_STM32F7_BKPSRAM is not set
 # CONFIG_STM32F7_CAN1 is not set
 # CONFIG_STM32F7_CAN2 is not set
+# CONFIG_STM32F7_CAN3 is not set
 # CONFIG_STM32F7_CEC is not set
 # CONFIG_STM32F7_CRC is not set
-# CONFIG_STM32F7_CRYP is not set
+# CONFIG_STM32F7_DFSDM1 is not set
 # CONFIG_STM32F7_DMA1 is not set
 # CONFIG_STM32F7_DMA2 is not set
 # CONFIG_STM32F7_DAC1 is not set
 # CONFIG_STM32F7_DAC2 is not set
 # CONFIG_STM32F7_DCMI is not set
+# CONFIG_STM32F7_DMA2D is not set
+# CONFIG_STM32F7_JPEG is not set
 # CONFIG_STM32F7_ETHMAC is not set
 # CONFIG_STM32F7_FSMC is not set
 # CONFIG_STM32F7_I2C1 is not set
 # CONFIG_STM32F7_I2C2 is not set
 # CONFIG_STM32F7_I2C3 is not set
+# CONFIG_STM32F7_I2C4 is not set
 # CONFIG_STM32F7_LPTIM1 is not set
 # CONFIG_STM32F7_LTDC is not set
-# CONFIG_STM32F7_DMA2D is not set
 # CONFIG_STM32F7_OTGFS is not set
 # CONFIG_STM32F7_OTGHS is not set
 # CONFIG_STM32F7_QUADSPI is not set
-# CONFIG_STM32F7_SAI1 is not set
+# CONFIG_STM32F7_PWR is not set
 # CONFIG_STM32F7_RNG is not set
+# CONFIG_STM32F7_SAI1 is not set
 # CONFIG_STM32F7_SAI2 is not set
 # CONFIG_STM32F7_SDMMC1 is not set
+# CONFIG_STM32F7_SDMMC2 is not set
 # CONFIG_STM32F7_SPDIFRX is not set
 # CONFIG_STM32F7_SPI1 is not set
 # CONFIG_STM32F7_SPI2 is not set
@@ -234,7 +330,6 @@ CONFIG_STM32F7_USART=y
 # CONFIG_STM32F7_TIM12 is not set
 # CONFIG_STM32F7_TIM13 is not set
 # CONFIG_STM32F7_TIM14 is not set
-# CONFIG_STM32F7_TIM15 is not set
 # CONFIG_STM32F7_USART1 is not set
 # CONFIG_STM32F7_USART2 is not set
 # CONFIG_STM32F7_USART3 is not set
@@ -245,7 +340,21 @@ CONFIG_STM32F7_USART6=y
 # CONFIG_STM32F7_UART8 is not set
 # CONFIG_STM32F7_IWDG is not set
 # CONFIG_STM32F7_WWDG is not set
+
+#
+# U[S]ART Configuration
+#
+CONFIG_STM32F7_FLOWCONTROL_BROKEN=y
+CONFIG_STM32F7_USART_BREAKS=y
+CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y
+# CONFIG_STM32F7_HAVE_RTC_COUNTER is not set
+# CONFIG_STM32F7_HAVE_RTC_SUBSECONDS is not set
 # CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32F7_DTCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
 
 #
 # Architecture Options
@@ -266,7 +375,7 @@ CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
 # CONFIG_ARCH_HAVE_RESET is not set
-CONFIG_ARCH_USE_MPU=y
+# CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
@@ -308,9 +417,9 @@ CONFIG_RAM_SIZE=245760
 #
 # Board Selection
 #
-CONFIG_ARCH_BOARD_STM32F746G_DISCO=y
+CONFIG_ARCH_BOARD_NUCLEO_144=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
-CONFIG_ARCH_BOARD="stm32f746g-disco"
+CONFIG_ARCH_BOARD="nucleo-144"
 
 #
 # Common Board Options
@@ -321,11 +430,16 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+CONFIG_NUCLEO_CONSOLE_ARDUINO=y
+# CONFIG_NUCLEO_CONSOLE_VIRTUAL is not set
+# CONFIG_NUCLEO_CONSOLE_MORPHO is not set
+# CONFIG_NUCLEO_CONSOLE_NONE is not set
+# CONFIG_NUCLEO_SPI_TEST is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -344,10 +458,11 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
-CONFIG_START_YEAR=2011
-CONFIG_START_MONTH=12
-CONFIG_START_DAY=6
+CONFIG_START_YEAR=2015
+CONFIG_START_MONTH=11
+CONFIG_START_DAY=30
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=4
 CONFIG_WDOG_INTRESERVE=0
@@ -428,9 +543,7 @@ CONFIG_IDLETHREAD_STACKSIZE=1024
 CONFIG_USERMAIN_STACKSIZE=2048
 CONFIG_PTHREAD_STACK_MIN=256
 CONFIG_PTHREAD_STACK_DEFAULT=2048
-CONFIG_LIB_SYSCALL=y
-CONFIG_SYS_RESERVED=8
-CONFIG_SYS_NNEST=2
+# CONFIG_LIB_SYSCALL is not set
 
 #
 # Device Drivers
@@ -438,6 +551,7 @@ CONFIG_SYS_NNEST=2
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -457,9 +571,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -473,8 +592,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -482,6 +611,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -490,9 +620,10 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -516,10 +647,6 @@ CONFIG_USART6_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -542,19 +669,25 @@ CONFIG_USART6_2STOP=0
 # CONFIG_USART6_IFLOWCONTROL is not set
 # CONFIG_USART6_OFLOWCONTROL is not set
 # CONFIG_USART6_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -588,15 +721,10 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_ROMFS is not set
 # CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -605,10 +733,8 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 #
 # Memory Management
 #
-CONFIG_MM_KERNEL_HEAP=y
-CONFIG_MM_KERNEL_HEAPSIZE=8192
 # CONFIG_MM_SMALL is not set
-CONFIG_MM_REGIONS=2
+CONFIG_MM_REGIONS=3
 # CONFIG_ARCH_HAVE_HEAP2 is not set
 # CONFIG_GRAN is not set
 
@@ -628,6 +754,7 @@ CONFIG_MM_REGIONS=2
 # CONFIG_BINFMT_EXEPATH is not set
 # CONFIG_NXFLAT is not set
 # CONFIG_ELF is not set
+CONFIG_BUILTIN=y
 # CONFIG_PIC is not set
 # CONFIG_SYMTAB_ORDEREDBYNAME is not set
 
@@ -662,15 +789,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
-# CONFIG_LIB_USRWORK is not set
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -689,6 +818,11 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # Application Configuration
 #
 
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
 #
 # CAN Utilities
 #
@@ -696,9 +830,9 @@ CONFIG_HAVE_CXXINITIALIZE=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -706,47 +840,46 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
 # CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_KEYPADTEST is not set
-# CONFIG_EXAMPLES_IGMP is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
 # CONFIG_EXAMPLES_NRF24L01TERM is not set
 CONFIG_EXAMPLES_NSH=y
-CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
+# CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -768,8 +901,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -780,6 +913,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -802,6 +936,7 @@ CONFIG_NSH_MAXARGUMENTS=6
 CONFIG_NSH_ARGCAT=y
 CONFIG_NSH_NESTDEPTH=3
 # CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
 
 #
 # Disable Individual commands
@@ -832,13 +967,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
-CONFIG_NSH_DISABLE_PS=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PSSTACKUSAGE is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
 # CONFIG_NSH_DISABLE_RM is not set
@@ -854,6 +989,7 @@ CONFIG_NSH_DISABLE_PS=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -891,19 +1027,20 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_STACKMONITOR is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/nucleo-144/f767-nsh/setenv.sh b/configs/nucleo-144/f767-nsh/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..e6eabd1f70fe1fcb84e1b00248257946861095ac
--- /dev/null
+++ b/configs/nucleo-144/f767-nsh/setenv.sh
@@ -0,0 +1,77 @@
+#!/bin/bash
+# configs/nucleo-144/f767-nsh/setenv.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the Atmel GCC
+# toolchain under Windows.  You will also have to edit this if you install
+# this toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/nucleo-144/include/board.h b/configs/nucleo-144/include/board.h
index 63eb5df084e099399e3275d829ad180db75a7885..18d2727502b5e859af1ba386e1250e23fe8c4199 100644
--- a/configs/nucleo-144/include/board.h
+++ b/configs/nucleo-144/include/board.h
@@ -2,8 +2,9 @@
  * configs/nucleo-144/include/board.h
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
- *   Author: Mark Olsson 
+ *   Authors: Gregory Nutt 
+ *           Mark Olsson 
+ *           David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -59,17 +60,17 @@
  ************************************************************************************/
 
 /* Clocking *************************************************************************/
-/* The STM32F7 Discovery board provides the following clock sources:
+/* The Nucleo-144  board provides the following clock sources:
  *
- *   X1:  24 MHz oscillator for USB OTG HS PHY and camera module (daughter board)
- *   X2:  25 MHz oscillator for STM32F746NGH6 microcontroller and Ethernet PHY.
- *   X3:  32.768 KHz crystal for STM32F746NGH6 embedded RTC
+ *   MCO: 8 MHz from MCO output of ST-LINK is used as input clock
+ *   X2:  32.768 KHz crystal for LSE
+ *   X3:  HSE crystal oscillator (not provided)
  *
  * So we have these clock source available within the STM32
  *
  *   HSI: 16 MHz RC factory-trimmed
  *   LSI: 32 KHz RC
- *   HSE: On-board crystal frequency is 25MHz
+ *   HSE: 8 MHz from MCO output of ST-LINK
  *   LSE: 32.768 kHz
  */
 
@@ -106,56 +107,71 @@
  * 2 <= PLLQ <= 15
  */
 
-#if defined(CONFIG_STM32F7_USBOTHFS)
 /* Highest SYSCLK with USB OTG FS clock = 48 MHz
  *
- * PLL_VCO = (8,000,000 / 8) * 384 = 384 MHz
- * SYSCLK  = 384 MHz / 2 = 192 MHz
- * USB OTG FS, SDMMC and RNG Clock = 384 MHz / 8 = 48MHz
- */
-
-#define STM32_PLLCFG_PLLM       RCC_PLLCFG_PLLM(8)
-#define STM32_PLLCFG_PLLN       RCC_PLLCFG_PLLN(384)
-#define STM32_PLLCFG_PLLP       RCC_PLLCFG_PLLP_2
-#define STM32_PLLCFG_PLLQ       RCC_PLLCFG_PLLQ(8)
-
-#define STM32_VCO_FREQUENCY     ((STM32_HSE_FREQUENCY / 8) * 384)
-#define STM32_SYSCLK_FREQUENCY  (STM32_VCO_FREQUENCY / 2)
-#define STM32_OTGFS_FREQUENCY   (STM32_VCO_FREQUENCY / 8)
-
-#elif defined(CONFIG_STM32F7_SDMMC1) || defined(CONFIG_STM32F7_RNG)
-/* Highest SYSCLK with USB OTG FS clock <= 48MHz
- *
- * PLL_VCO = (8,000,000 / 8) * 432 = 432 MHz
+ * PLL_VCO = (8,000,000 / 4) * 216 = 432 MHz
  * SYSCLK  = 432 MHz / 2 = 216 MHz
- * USB OTG FS, SDMMC and RNG Clock = 432 MHz / 10 = 43.2 MHz
+ * USB OTG FS, SDMMC and RNG Clock = 432 MHz / 9 = 48 MHz
  */
 
-#define STM32_PLLCFG_PLLM       RCC_PLLCFG_PLLM(8)
-#define STM32_PLLCFG_PLLN       RCC_PLLCFG_PLLN(432)
+#define STM32_PLLCFG_PLLM       RCC_PLLCFG_PLLM(4)
+#define STM32_PLLCFG_PLLN       RCC_PLLCFG_PLLN(216)
 #define STM32_PLLCFG_PLLP       RCC_PLLCFG_PLLP_2
-#define STM32_PLLCFG_PLLQ       RCC_PLLCFG_PLLQ(10)
+#define STM32_PLLCFG_PLLQ       RCC_PLLCFG_PLLQ(9)
 
-#define STM32_VCO_FREQUENCY     ((STM32_HSE_FREQUENCY / 8) * 432)
+#define STM32_VCO_FREQUENCY     ((STM32_HSE_FREQUENCY / 4) * 216)
 #define STM32_SYSCLK_FREQUENCY  (STM32_VCO_FREQUENCY / 2)
-#define STM32_OTGFS_FREQUENCY   (STM32_VCO_FREQUENCY / 10)
-
-#else
-/* Highest SYSCLK
- *
- * PLL_VCO = (8,000,000 / 8) * 432 = 432 MHz
- * SYSCLK  = 432 MHz / 2 = 216 MHz
- */
+#define STM32_OTGFS_FREQUENCY   (STM32_VCO_FREQUENCY / 9)
+
+/* Configure factors for  PLLSAI clock */
+
+#define CONFIG_STM32F7_PLLSAI 1
+#define STM32_RCC_PLLSAICFGR_PLLSAIN    RCC_PLLSAICFGR_PLLSAIN(192)
+#define STM32_RCC_PLLSAICFGR_PLLSAIP    RCC_PLLSAICFGR_PLLSAIP(8)
+#define STM32_RCC_PLLSAICFGR_PLLSAIQ    RCC_PLLSAICFGR_PLLSAIQ(4)
+#define STM32_RCC_PLLSAICFGR_PLLSAIR    RCC_PLLSAICFGR_PLLSAIR(2)
+
+/* Configure Dedicated Clock Configuration Register */
+
+#define STM32_RCC_DCKCFGR1_PLLI2SDIVQ  RCC_DCKCFGR1_PLLI2SDIVQ(1)
+#define STM32_RCC_DCKCFGR1_PLLSAIDIVQ  RCC_DCKCFGR1_PLLSAIDIVQ(1)
+#define STM32_RCC_DCKCFGR1_PLLSAIDIVR  RCC_DCKCFGR1_PLLSAIDIVR(0)
+#define STM32_RCC_DCKCFGR1_SAI1SRC     RCC_DCKCFGR1_SAI1SEL(0)
+#define STM32_RCC_DCKCFGR1_SAI2SRC     RCC_DCKCFGR1_SAI2SEL(0)
+#define STM32_RCC_DCKCFGR1_TIMPRESRC   0
+#define STM32_RCC_DCKCFGR1_DFSDM1SRC   0
+#define STM32_RCC_DCKCFGR1_ADFSDM1SRC  0
+
+
+
+/* Configure factors for  PLLI2S clock */
+
+#define CONFIG_STM32F7_PLLI2S 1
+#define STM32_RCC_PLLI2SCFGR_PLLI2SN   RCC_PLLI2SCFGR_PLLI2SN(192)
+#define STM32_RCC_PLLI2SCFGR_PLLI2SP   RCC_PLLI2SCFGR_PLLI2SP(2)
+#define STM32_RCC_PLLI2SCFGR_PLLI2SQ   RCC_PLLI2SCFGR_PLLI2SQ(2)
+#define STM32_RCC_PLLI2SCFGR_PLLI2SR   RCC_PLLI2SCFGR_PLLI2SR(2)
+
+/* Configure Dedicated Clock Configuration Register 2 */
+
+#define STM32_RCC_DCKCFGR2_USART1SRC  RCC_DCKCFGR2_USART1SEL_APB
+#define STM32_RCC_DCKCFGR2_USART2SRC  RCC_DCKCFGR2_USART2SEL_APB
+#define STM32_RCC_DCKCFGR2_UART4SRC   RCC_DCKCFGR2_UART4SEL_APB
+#define STM32_RCC_DCKCFGR2_UART5SRC   RCC_DCKCFGR2_UART5SEL_APB
+#define STM32_RCC_DCKCFGR2_USART6SRC  RCC_DCKCFGR2_USART6SEL_APB
+#define STM32_RCC_DCKCFGR2_UART7SRC   RCC_DCKCFGR2_UART7SEL_APB
+#define STM32_RCC_DCKCFGR2_UART8SRC   RCC_DCKCFGR2_UART8SEL_APB
+#define STM32_RCC_DCKCFGR2_I2C1SRC    RCC_DCKCFGR2_I2C1SEL_HSI
+#define STM32_RCC_DCKCFGR2_I2C2SRC    RCC_DCKCFGR2_I2C2SEL_HSI
+#define STM32_RCC_DCKCFGR2_I2C3SRC    RCC_DCKCFGR2_I2C3SEL_HSI
+#define STM32_RCC_DCKCFGR2_I2C4SRC    RCC_DCKCFGR2_I2C4SEL_HSI
+#define STM32_RCC_DCKCFGR2_LPTIM1SRC  RCC_DCKCFGR2_LPTIM1SEL_APB
+#define STM32_RCC_DCKCFGR2_CECSRC     RCC_DCKCFGR2_CECSEL_HSI
+#define STM32_RCC_DCKCFGR2_CK48MSRC   RCC_DCKCFGR2_CK48MSEL_PLL
+#define STM32_RCC_DCKCFGR2_SDMMCSRC   RCC_DCKCFGR2_SDMMCSEL_48MHZ
+#define STM32_RCC_DCKCFGR2_SDMMC2SRC  RCC_DCKCFGR2_SDMMC2SEL_48MHZ
+#define STM32_RCC_DCKCFGR2_DSISRC     RCC_DCKCFGR2_DSISEL_48MHZ
 
-#define STM32_PLLCFG_PLLM       RCC_PLLCFG_PLLM(8)
-#define STM32_PLLCFG_PLLN       RCC_PLLCFG_PLLN(432)
-#define STM32_PLLCFG_PLLP       RCC_PLLCFG_PLLP_2
-#define STM32_PLLCFG_PLLQ       RCC_PLLCFG_PLLQ(10)
-
-#define STM32_VCO_FREQUENCY     ((STM32_HSE_FREQUENCY / 8) * 432)
-#define STM32_SYSCLK_FREQUENCY  (STM32_VCO_FREQUENCY / 2)
-#define STM32_OTGFS_FREQUENCY   (STM32_VCO_FREQUENCY / 10)
-#endif
 
 /* Several prescalers allow the configuration of the two AHB buses, the
  * high-speed APB (APB2) and the low-speed APB (APB1) domains. The maximum
@@ -200,6 +216,61 @@
 #define STM32_APB2_TIM10_CLKIN  (2*STM32_PCLK2_FREQUENCY)
 #define STM32_APB2_TIM11_CLKIN  (2*STM32_PCLK2_FREQUENCY)
 
+/* SDMMC dividers.  Note that slower clocking is required when DMA is disabled
+ * in order to avoid RX overrun/TX underrun errors due to delayed responses
+ * to service FIFOs in interrupt driven mode.  These values have not been
+ * tuned!!!
+ *
+ * SDMMCCLK=48MHz, SDMMC_CK=SDMMCCLK/(118+2)=400 KHz
+ */
+
+#define STM32_SDMMC_INIT_CLKDIV         (118 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
+
+/* DMA ON:  SDMMCCLK=48MHz, SDMMC_CK=SDMMCCLK/(1+2)=16 MHz
+ * DMA OFF: SDMMCCLK=48MHz, SDMMC_CK=SDMMCCLK/(2+2)=12 MHz
+ */
+
+#ifdef CONFIG_SDIO_DMA
+#  define STM32_SDMMC_MMCXFR_CLKDIV     (1 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
+#else
+#  define STM32_SDMMC_MMCXFR_CLKDIV     (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
+#endif
+
+/* DMA ON:  SDMMCCLK=48MHz, SDMMC_CK=SDMMCCLK/(1+2)=16 MHz
+ * DMA OFF: SDMMCCLK=48MHz, SDMMC_CK=SDMMCCLK/(2+2)=12 MHz
+ */
+
+#ifdef CONFIG_SDIO_DMA
+#  define STM32_SDMMC_SDXFR_CLKDIV      (1 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
+#else
+#  define STM32_SDMMC_SDXFR_CLKDIV      (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
+#endif
+
+#if defined(CONFIG_STM32F7_SDMMC2)
+#  define GPIO_SDMMC2_D0 GPIO_SDMMC2_D0_1
+#  define GPIO_SDMMC2_D1 GPIO_SDMMC2_D1_1
+#  define GPIO_SDMMC2_D2 GPIO_SDMMC2_D2_1
+#  define GPIO_SDMMC2_D3 GPIO_SDMMC2_D3_1
+#endif
+/* DMA Channl/Stream Selections *****************************************************/
+/* Stream selections are arbitrary for now but might become important in the future
+ * if we set aside more DMA channels/streams.
+ *
+ * SDMMC DMA is on DMA2
+ *
+ * SDMMC1 DMA
+ *   DMAMAP_SDMMC1_1 = Channel 4, Stream 3
+ *   DMAMAP_SDMMC1_2 = Channel 4, Stream 6
+ *
+ * SDMMC2 DMA
+ *   DMAMAP_SDMMC2_1 = Channel 11, Stream 0
+ *   DMAMAP_SDMMC3_2 = Channel 11, Stream 5
+ */
+
+#define DMAMAP_SDMMC1  DMAMAP_SDMMC1_1
+#define DMAMAP_SDMMC2  DMAMAP_SDMMC2_1
+
+
 /* FLASH wait states
  *
  *  --------- ---------- -----------
@@ -215,12 +286,9 @@
 #define BOARD_FLASH_WAITSTATES 7
 
 /* LED definitions ******************************************************************/
-/* The STM32F746G-DISCO board has numerous LEDs but only one, LD1 located near the
- * reset button, that can be controlled by software (LD2 is a power indicator, LD3-6
- * indicate USB status, LD7 is controlled by the ST-Link).
- *
- * LD1 is controlled by PI1 which is also the SPI2_SCK at the Arduino interface.
- * One end of LD1 is grounded so a high output on PI1 will illuminate the LED.
+/* The Nucleo-144 board has numerous LEDs but only three, LD1 a Green LED, LD2 a Blue
+ * LED and LD3 a Red LED, that can be controlled by software. The following
+ * definitions assume the default Solder Bridges are installed.
  *
  * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way.
  * The following definitions are used to access individual LEDs.
@@ -233,9 +301,9 @@
 #define BOARD_LED3        2
 #define BOARD_NLEDS       3
 
-#define BOARD_LD1         BOARD_LED1
-#define BOARD_LD2         BOARD_LED2
-#define BOARD_LD3         BOARD_LED3
+#define BOARD_LED_GREEN   BOARD_LED1
+#define BOARD_LED_BLUE    BOARD_LED2
+#define BOARD_LED_RED     BOARD_LED3
 
 /* LED bits for use with board_userled_all() */
 
@@ -247,33 +315,29 @@
  * include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related
  * events as follows:
  *
- *   SYMBOL              Meaning                 LD1
- *   ------------------- ----------------------- ------
- *   LED_STARTED         NuttX has been started  OFF
- *   LED_HEAPALLOCATE    Heap has been allocated OFF
- *   LED_IRQSENABLED     Interrupts enabled      OFF
- *   LED_STACKCREATED    Idle stack created      ON
- *   LED_INIRQ           In an interrupt         N/C
- *   LED_SIGNAL          In a signal handler     N/C
- *   LED_ASSERTION       An assertion failed     N/C
- *   LED_PANIC           The system has crashed  FLASH
- *
- * Thus is LD1 is statically on, NuttX has successfully  booted and is,
- * apparently, running normally.  If LD1 is flashing at approximately
- * 2Hz, then a fatal error has been detected and the system has halted.
+ *
+ *   SYMBOL                     Meaning                      LED state
+ *                                                        Red   Green Blue
+ *   ----------------------  --------------------------  ------ ------ ----*/
+
+#define LED_STARTED        0 /* NuttX has been started   OFF    OFF   OFF  */
+#define LED_HEAPALLOCATE   1 /* Heap has been allocated  OFF    OFF   ON   */
+#define LED_IRQSENABLED    2 /* Interrupts enabled       OFF    ON    OFF  */
+#define LED_STACKCREATED   3 /* Idle stack created       OFF    ON    ON   */
+#define LED_INIRQ          4 /* In an interrupt          N/C    N/C   GLOW */
+#define LED_SIGNAL         5 /* In a signal handler      N/C    GLOW  N/C  */
+#define LED_ASSERTION      6 /* An assertion failed      GLOW   N/C   GLOW */
+#define LED_PANIC          7 /* The system has crashed   Blink  OFF   N/C  */
+#define LED_IDLE           8 /* MCU is is sleep mode     ON     OFF   OFF  */
+
+/* Thus if the Green LED is statically on, NuttX has successfully booted and
+ * is, apparently, running normally.  If the Red LED is flashing at
+ * approximately 2Hz, then a fatal error has been detected and the system
+ * has halted.
  */
 
-#define LED_STARTED                  0 /* LD1=OFF */
-#define LED_HEAPALLOCATE             0 /* LD1=OFF */
-#define LED_IRQSENABLED              0 /* LD1=OFF */
-#define LED_STACKCREATED             1 /* LD1=ON */
-#define LED_INIRQ                    2 /* LD1=no change */
-#define LED_SIGNAL                   2 /* LD1=no change */
-#define LED_ASSERTION                2 /* LD1=no change */
-#define LED_PANIC                    3 /* LD1=flashing */
-
 /* Button definitions ***************************************************************/
-/* The STM32F7 Discovery supports one button:  Pushbutton B1, labelled "User", is
+/* The STM32F7 Discovery supports one button:  Pushbutton B1, labeled "User", is
  * connected to GPIO PI11.  A high value will be sensed when the button is depressed.
  */
 
@@ -283,6 +347,7 @@
 
 /* Alternate function pin selections ************************************************/
 
+#if defined(CONFIG_NUCLEO_CONSOLE_ARDUINO)
 /* USART6:
  *
  * These configurations assume that you are using a standard Arduio RS-232 shield
@@ -292,16 +357,90 @@
  *               STM32F7
  *   ARDUIONO FUNCTION  GPIO
  *   -- ----- --------- -----
- *   DO RX    USART6_RX PC7
- *   D1 TX    USART6_TX PC6
+ *   DO RX    USART6_RX PG9
+ *   D1 TX    USART6_TX PG14
  *   -- ----- --------- -----
  */
 
- #define GPIO_USART6_RX GPIO_USART6_RX_1
- #define GPIO_USART6_TX GPIO_USART6_TX_1
+ # define GPIO_USART6_RX GPIO_USART6_RX_2
+ # define GPIO_USART6_TX GPIO_USART6_TX_2
+#endif
+
+/* USART3:
+ * Use  USART3 and the USB virtual COM port
+*/
+
+#if defined(CONFIG_NUCLEO_CONSOLE_VIRTUAL)
+ # define GPIO_USART3_RX GPIO_USART3_RX_3
+ # define GPIO_USART3_TX GPIO_USART3_TX_3
+#endif
+
+/* USART8:
+ *
+ * This configurations assume that you are connecting to the Morpho connector
+ * with the serial interface with the adaptor's RX on pin CN11 pin 64 and
+ * TX on pin CN11 pin 61
+ *
+ * USART8: has no remap
+ */
+
+/* DMA channels *************************************************************/
+/* ADC */
+
+#define ADC1_DMA_CHAN DMAMAP_ADC1_1
+#define ADC2_DMA_CHAN DMAMAP_ADC2_1
+#define ADC3_DMA_CHAN DMAMAP_ADC3_1
+
+/* SPI
+ *
+ *
+ *  PA6   SPI1_MISO CN12-13
+ *  PA7   SPI1_MOSI CN12-15
+ *  PA5   SPI1_SCK  CN12-11
+ *
+ *  PB14  SPI2_MISO CN12-28
+ *  PB15  SPI2_MOSI CN12-26
+ *  PB13  SPI2_SCK  CN12-30
+ *
+ *  PB4   SPI3_MISO CN12-27
+ *  PB5   SPI3_MOSI CN12-29
+ *  PB3   SPI3_SCK  CN12-31
+ */
+
+#define GPIO_SPI1_MISO   GPIO_SPI1_MISO_1
+#define GPIO_SPI1_MOSI   GPIO_SPI1_MOSI_1
+#define GPIO_SPI1_SCK    GPIO_SPI1_SCK_1
+
+#define GPIO_SPI2_MISO   GPIO_SPI2_MISO_1
+#define GPIO_SPI2_MOSI   GPIO_SPI2_MOSI_1
+#define GPIO_SPI2_SCK    GPIO_SPI2_SCK_3
+
+#define GPIO_SPI3_MISO   GPIO_SPI3_MISO_1
+#define GPIO_SPI3_MOSI   GPIO_SPI3_MOSI_2
+#define GPIO_SPI3_SCK    GPIO_SPI3_SCK_1
+
+/* I2C
+ *
+ *
+ *  PB8   I2C1_SCL CN12-3
+ *  PB9   I2C1_SDA CN12-5
+
+ *  PB10   I2C2_SCL CN11-51
+ *  PB11 I2C2_SDA CN12-18
+ *
+ *  PA8   I2C3_SCL CN12-23
+ *  PC9   I2C3_SDA CN12-1
+ *
+ */
+
+#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
+#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
+
+#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
+#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
 
- #define GPIO_USART3_RX GPIO_USART3_RX_3
- #define GPIO_USART3_TX GPIO_USART3_TX_3
+#define GPIO_I2C3_SCL GPIO_I2C3_SCL_1
+#define GPIO_I2C3_SDA GPIO_I2C3_SDA_1
 
 /* The STM32 F7 connects to a SMSC LAN8742A PHY using these pins:
  *
diff --git a/configs/nucleo-144/scripts/f746-flash.ld b/configs/nucleo-144/scripts/f746-flash.ld
new file mode 100644
index 0000000000000000000000000000000000000000..bc8b07e4fa856ca0722aeaea5f34ec9de21df3d6
--- /dev/null
+++ b/configs/nucleo-144/scripts/f746-flash.ld
@@ -0,0 +1,146 @@
+/****************************************************************************
+ * configs/nucleo-144/scripts/f746-flash.ld
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* The STM32F746ZGT6 has 1024 KiB of main FLASH memory.  This FLASH memory
+ * can be accessed from either the AXIM interface at address 0x0800:0000 or
+ * from the ITCM interface at address 0x0020:0000.
+ *
+ * Additional information, including the option bytes, is available at at
+ * FLASH at address 0x1ff0:0000 (AXIM) or 0x0010:0000 (ITCM).
+ *
+ * In the STM32F746ZGT6, two different boot spaces can be selected through
+ * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
+ * BOOT_ADD1 option bytes:
+ *
+ *   1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
+ *      ST programmed value: Flash on ITCM at 0x0020:0000
+ *   2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
+ *      ST programmed value: System bootloader at 0x0010:0000
+ *
+ * NuttX does not modify these option byes.  On the unmodified NUCLEO-144
+ * board, the BOOT0 pin is at ground so by default, the STM32F746ZGT6 will
+ * boot from address 0x0020:0000 in ITCM FLASH.
+ *
+ * The STM32F746ZGT6 also has 320 KiB of data SRAM (in addition to ITCM SRAM).
+ * SRAM is split up into three blocks:
+ *
+ *   1)  64 KiB of DTCM SRM beginning at address 0x2000:0000
+ *   2) 240 KiB of SRAM1 beginning at address 0x2001:0000
+ *   3)  16 KiB of SRAM2 beginning at address 0x2004:c000
+ *
+ * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
+ * where the code expects to begin execution by jumping to the entry point in
+ * the 0x0800:0000 address range.
+ */
+
+MEMORY
+{
+	itcm  (rwx) : ORIGIN = 0x00200000, LENGTH = 1024K
+	flash (rx)  : ORIGIN = 0x08000000, LENGTH = 1024K
+	dtcm  (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
+	sram1 (rwx) : ORIGIN = 0x20010000, LENGTH = 240K
+	sram2 (rwx) : ORIGIN = 0x2004c000, LENGTH = 16K
+}
+
+OUTPUT_ARCH(arm)
+EXTERN(_vectors)
+ENTRY(_stext)
+SECTIONS
+{
+	.text : {
+		_stext = ABSOLUTE(.);
+		*(.vectors)
+		*(.text .text.*)
+		*(.fixup)
+		*(.gnu.warning)
+		*(.rodata .rodata.*)
+		*(.gnu.linkonce.t.*)
+		*(.glue_7)
+		*(.glue_7t)
+		*(.got)
+		*(.gcc_except_table)
+		*(.gnu.linkonce.r.*)
+		_etext = ABSOLUTE(.);
+	} > flash
+
+	.init_section : {
+		_sinit = ABSOLUTE(.);
+		*(.init_array .init_array.*)
+		_einit = ABSOLUTE(.);
+	} > flash
+
+	.ARM.extab : {
+		*(.ARM.extab*)
+	} > flash
+
+	__exidx_start = ABSOLUTE(.);
+	.ARM.exidx : {
+		*(.ARM.exidx*)
+	} > flash
+	__exidx_end = ABSOLUTE(.);
+
+	_eronly = ABSOLUTE(.);
+
+	.data : {
+		_sdata = ABSOLUTE(.);
+		*(.data .data.*)
+		*(.gnu.linkonce.d.*)
+		CONSTRUCTORS
+		_edata = ABSOLUTE(.);
+	} > sram1 AT > flash
+
+	.bss : {
+		_sbss = ABSOLUTE(.);
+		*(.bss .bss.*)
+		*(.gnu.linkonce.b.*)
+		*(COMMON)
+		_ebss = ABSOLUTE(.);
+	} > sram1
+
+	/* Stabs debugging sections. */
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_info 0 : { *(.debug_info) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/nucleo-144/scripts/f767-flash.ld b/configs/nucleo-144/scripts/f767-flash.ld
new file mode 100644
index 0000000000000000000000000000000000000000..6654a139feebe5bd22e71f470633f6c98a3f70a3
--- /dev/null
+++ b/configs/nucleo-144/scripts/f767-flash.ld
@@ -0,0 +1,146 @@
+/****************************************************************************
+ * configs/nucleo-144/scripts/f767-flash.ld
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* The STM32F767ZIT6 has 2048 KiB of main FLASH memory.  This FLASH memory
+ * can be accessed from either the AXIM interface at address 0x0800:0000 or
+ * from the ITCM interface at address 0x0020:0000.
+ *
+ * Additional information, including the option bytes, is available at at
+ * FLASH at address 0x1ff0:0000 (AXIM) or 0x0010:0000 (ITCM).
+ *
+ * In the STM32F767ZIT6, two different boot spaces can be selected through
+ * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
+ * BOOT_ADD1 option bytes:
+ *
+ *   1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
+ *      ST programmed value: Flash on ITCM at 0x0020:0000
+ *   2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
+ *      ST programmed value: System bootloader at 0x0010:0000
+ *
+ * NuttX does not modify these option byes.  On the unmodified NUCLEO-144
+ * board, the BOOT0 pin is at ground so by default, the STM32F767ZIT6 will
+ * boot from address 0x0020:0000 in ITCM FLASH.
+ *
+ * The STM32F767ZIT6 also has 512 KiB of data SRAM (in addition to ITCM SRAM).
+ * SRAM is split up into three blocks:
+ *
+ *   1) 128 KiB of DTCM SRM beginning at address 0x2000:0000
+ *   2) 368 KiB of SRAM1 beginning at address 0x2002:0000
+ *   3)  16 KiB of SRAM2 beginning at address 0x2007:c000
+ *
+ * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
+ * where the code expects to begin execution by jumping to the entry point in
+ * the 0x0800:0000 address range.
+ */
+
+MEMORY
+{
+    itcm  (rwx) : ORIGIN = 0x00200000, LENGTH = 2048K
+    flash (rx)  : ORIGIN = 0x08000000, LENGTH = 2048K
+    dtcm  (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
+    sram1 (rwx) : ORIGIN = 0x20020000, LENGTH = 368K
+    sram2 (rwx) : ORIGIN = 0x2007c000, LENGTH = 16K
+}
+
+OUTPUT_ARCH(arm)
+EXTERN(_vectors)
+ENTRY(_stext)
+SECTIONS
+{
+    .text : {
+        _stext = ABSOLUTE(.);
+        *(.vectors)
+        *(.text .text.*)
+        *(.fixup)
+        *(.gnu.warning)
+        *(.rodata .rodata.*)
+        *(.gnu.linkonce.t.*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.got)
+        *(.gcc_except_table)
+        *(.gnu.linkonce.r.*)
+        _etext = ABSOLUTE(.);
+    } > flash
+
+    .init_section : {
+        _sinit = ABSOLUTE(.);
+        *(.init_array .init_array.*)
+        _einit = ABSOLUTE(.);
+    } > flash
+
+    .ARM.extab : {
+        *(.ARM.extab*)
+    } > flash
+
+    __exidx_start = ABSOLUTE(.);
+    .ARM.exidx : {
+        *(.ARM.exidx*)
+    } > flash
+    __exidx_end = ABSOLUTE(.);
+
+    _eronly = ABSOLUTE(.);
+
+    .data : {
+        _sdata = ABSOLUTE(.);
+        *(.data .data.*)
+        *(.gnu.linkonce.d.*)
+        CONSTRUCTORS
+        _edata = ABSOLUTE(.);
+    } > sram1 AT > flash
+
+    .bss : {
+        _sbss = ABSOLUTE(.);
+        *(.bss .bss.*)
+        *(.gnu.linkonce.b.*)
+        *(COMMON)
+        _ebss = ABSOLUTE(.);
+    } > sram1
+
+    /* Stabs debugging sections. */
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+    .stab.excl 0 : { *(.stab.excl) }
+    .stab.exclstr 0 : { *(.stab.exclstr) }
+    .stab.index 0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment 0 : { *(.comment) }
+    .debug_abbrev 0 : { *(.debug_abbrev) }
+    .debug_info 0 : { *(.debug_info) }
+    .debug_line 0 : { *(.debug_line) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/nucleo-144/src/Makefile b/configs/nucleo-144/src/Makefile
index 2f742b273bb1c6bbbe6d0d4c91e378b6e53c4eb2..52068fbe354f291d35c773818e572e329a107af1 100644
--- a/configs/nucleo-144/src/Makefile
+++ b/configs/nucleo-144/src/Makefile
@@ -3,6 +3,7 @@
 #
 #   Copyright (C) 2015 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
+#            David Sidrane 
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions
@@ -36,7 +37,7 @@
 -include $(TOPDIR)/Make.defs
 
 ASRCS =
-CSRCS = stm32_boot.c stm32_spi.c
+CSRCS = stm32_boot.c
 
 ifeq ($(CONFIG_ARCH_LEDS),y)
 CSRCS += stm32_autoleds.c
@@ -52,4 +53,24 @@ ifeq ($(CONFIG_LIB_BOARDCTL),y)
 CSRCS += stm32_appinitialize.c
 endif
 
+ifeq ($(CONFIG_SPI),y)
+CSRCS += stm32_spi.c
+endif
+
+ifeq ($(CONFIG_ADC),y)
+CSRCS += stm32_adc.c
+endif
+
+ifeq ($(CONFIG_MMCSD),y)
+CSRCS += stm32_sdio.c
+endif
+
+ifeq ($(CONFIG_STM32F7_OTGFS),y)
+CSRCS += stm32_usb.c
+endif
+
+ifeq ($(CONFIG_STM32F7_BBSRAM),y)
+CSRCS += stm32_bbsram.c
+endif
+
 include $(TOPDIR)/configs/Board.mk
diff --git a/configs/nucleo-144/src/nucleo-144.h b/configs/nucleo-144/src/nucleo-144.h
index a5766c4497c22e293501399402d38fd20077d057..b12dbead8b0cc212a18fda9e932610d78819f63d 100644
--- a/configs/nucleo-144/src/nucleo-144.h
+++ b/configs/nucleo-144/src/nucleo-144.h
@@ -1,9 +1,10 @@
-/****************************************************************************************************
+/************************************************************************************
  * configs/nucleo-144/src/nucleo-144.h
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
- *   Author: Mark Olsson 
+ *   Authors: Gregory Nutt 
+ *            Mark Olsson 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -32,22 +33,25 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ****************************************************************************************************/
+ ************************************************************************************/
 
 #ifndef __CONFIGS_NUCLEO_144_SRC_NUCLEO_144_H
 #define __CONFIGS_NUCLEO_144_SRC_NUCLEO_144_H
 
-/****************************************************************************************************
+/************************************************************************************
  * Included Files
- ****************************************************************************************************/
+ ************************************************************************************/
 
 #include 
 #include 
 #include 
 
-/****************************************************************************************************
+/************************************************************************************
  * Pre-processor Definitions
- ****************************************************************************************************/
+ ************************************************************************************/
+
+/* Configuration ********************************************************************/
+
 /* procfs File System */
 
 #ifdef CONFIG_FS_PROCFS
@@ -58,49 +62,232 @@
 #  endif
 #endif
 
-/* STM32F736G Discovery GPIOs ***********************************************************************/
-/* The STM32F746G-DISCO board has numerous LEDs but only one, LD1 located near the reset button, that
- * can be controlled by software (LD2 is a power indicator, LD3-6 indicate USB status, LD7 is
- * controlled by the ST-Link).
+/* Nucleo-144 GPIO Pin Definitions **************************************************/
+/* LED
  *
- * LD1 is controlled by PI1 which is also the SPI2_SCK at the Arduino interface. One end of LD1 is
- * grounded so a high output on PI1 will illuminate the LED.
+ * The Nucleo-144 board has numerous LEDs but only three, LD1 a Green LED, LD2 a
+ * Blue LED and LD3 a Red LED, that can be controlled by software. The following definitions assume
+ * the default Solder Bridges are installed.
  */
 
-#define GPIO_LD1           (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
-                            GPIO_PORTB | GPIO_PIN0)
-#define GPIO_LD2           (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
-                            GPIO_PORTB | GPIO_PIN7)
-#define GPIO_LD3           (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
-                            GPIO_PORTB | GPIO_PIN14)
+#define GPIO_LD1       (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
+                        GPIO_PORTB | GPIO_PIN0)
+#define GPIO_LD2       (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
+                        GPIO_PORTB | GPIO_PIN7)
+#define GPIO_LD3       (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
+                        GPIO_PORTB | GPIO_PIN14)
+
+#define GPIO_LED_GREEN GPIO_LD1
+#define GPIO_LED_BLUE  GPIO_LD2
+#define GPIO_LED_RED   GPIO_LD3
 
 #define LED_DRIVER_PATH "/dev/userleds"
 
-/* Pushbutton B1, labelled "User", is connected to GPIO PC13.  A high value will be sensed when the
- * button is depressed. Note that the EXTI interrupt is configured.
+/* BUTTONS
+ *
+ * The Blue pushbutton B1, labeled "User", is connected to GPIO PC13.  A high value
+ * will be sensed when the button is depressed.
+ * Note:
+ *    1) That the EXTI is included in the definition to enable an interrupt on this
+ *       IO.
+ *    2) The following definitions assume the default Solder Bridges are installed.
  */
 
-#define GPIO_BTN_USER      (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTC | GPIO_PIN13)
+#define GPIO_BTN_USER  (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTC | GPIO_PIN13)
+
+/* SPI ***************************************************************************/
+
+#define GPIO_SPI_CS    (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | \
+                        GPIO_OUTPUT_SET)
+
+#define GPIO_SPI1_CS0   (GPIO_SPI_CS | GPIO_PORTA | GPIO_PIN15)
+#define GPIO_SPI1_CS1   (GPIO_SPI_CS | GPIO_PORTC | GPIO_PIN15)
+#define GPIO_SPI1_CS2   (GPIO_SPI_CS | GPIO_PORTC | GPIO_PIN14)
+#define GPIO_SPI1_CS3   (GPIO_SPI_CS | GPIO_PORTC | GPIO_PIN2)
+#define GPIO_SPI2_CS0   (GPIO_SPI_CS | GPIO_PORTD | GPIO_PIN7)
+#define GPIO_SPI2_CS1   (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN1)
+#define GPIO_SPI2_CS2   (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN2)
+#define GPIO_SPI2_CS3   (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN3)
+#define GPIO_SPI3_CS0   (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN4)
+#define GPIO_SPI3_CS1   (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN5)
+#define GPIO_SPI3_CS2   (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN6)
+#define GPIO_SPI3_CS3   (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN7)
+
+/* Logical SPI Chip Selects used to index */
+
+#define NUCLEO_SPI_BUS1_CS0  0
+#define NUCLEO_SPI_BUS1_CS1  1
+#define NUCLEO_SPI_BUS1_CS2  2
+#define NUCLEO_SPI_BUS1_CS3  3
+#define NUCLEO_SPI_BUS2_CS0  4
+#define NUCLEO_SPI_BUS2_CS1  5
+#define NUCLEO_SPI_BUS2_CS2  6
+#define NUCLEO_SPI_BUS2_CS3  7
+#define NUCLEO_SPI_BUS3_CS0  8
+#define NUCLEO_SPI_BUS3_CS1  9
+#define NUCLEO_SPI_BUS3_CS2  10
+#define NUCLEO_SPI_BUS3_CS3  11
 
-/****************************************************************************************************
+#if defined(CONFIG_STM32F7_SDMMC1) || defined(CONFIG_STM32F7_SDMMC2)
+# define HAVE_SDIO
+#endif
+
+#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_MMCSD_SDIO)
+#  undef HAVE_SDIO
+#endif
+
+#define SDIO_SLOTNO 0  /* Only one slot */
+
+#ifdef HAVE_SDIO
+
+#  if defined(CONFIG_STM32F7_SDMMC1)
+#    define GPIO_SDMMC1_NCD (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI | GPIO_PORTC | GPIO_PIN6)
+#  endif
+
+#  if defined(CONFIG_NSH_MMCSDSLOTNO) && (CONFIG_NSH_MMCSDSLOTNO != 0)
+#    warning "Only one MMC/SD slot, slot 0"
+#    define CONFIG_NSH_MMCSDSLOTNO SDIO_SLOTNO
+#  endif
+
+#  if defined(CONFIG_NSH_MMCSDMINOR)
+#    define SDIO_MINOR CONFIG_NSH_MMCSDMINOR
+#  else
+#    define SDIO_MINOR 0
+#  endif
+
+  /* SD card bringup does not work if performed on the IDLE thread because it
+   * will cause waiting.  Use either:
+   *
+   *  CONFIG_LIB_BOARDCTL=y, OR
+   *  CONFIG_BOARD_INITIALIZE=y && CONFIG_BOARD_INITTHREAD=y
+   */
+
+#  if defined(CONFIG_BOARD_INITIALIZE) && !defined(CONFIG_LIB_BOARDCTL) && \
+     !defined(CONFIG_BOARD_INITTHREAD)
+#    warning SDIO initialization cannot be perfomed on the IDLE thread
+#    undef HAVE_SDIO
+#  endif
+#endif
+
+/* USB OTG FS
+ *
+ * PA9  OTG_FS_VBUS VBUS sensing (also connected to the green LED)
+ * PC0  OTG_FS_PowerSwitchOn
+ * PD5  OTG_FS_Overcurrent
+ */
+
+#define GPIO_OTGFS_VBUS   (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
+                           GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN9)
+
+#define GPIO_OTGFS_PWRON  (GPIO_OUTPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
+                           GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN6)
+
+#ifdef CONFIG_USBHOST
+#  define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_EXTI|GPIO_FLOAT|\
+                           GPIO_SPEED_100MHz|GPIO_PUSHPULL|\
+                           GPIO_PORTG|GPIO_PIN7)
+
+#else
+#  define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
+                           GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN7)
+#endif
+
+/************************************************************************************
  * Public data
- ****************************************************************************************************/
+ ************************************************************************************/
 
 #ifndef __ASSEMBLY__
 
-/****************************************************************************************************
+/************************************************************************************
  * Public Functions
- ****************************************************************************************************/
+ ************************************************************************************/
 
-/****************************************************************************************************
+/************************************************************************************
  * Name: stm32_spidev_initialize
  *
  * Description:
- *   Called to configure SPI chip select GPIO pins for the stm32f746g-disco board.
+ *   Called to configure SPI chip select GPIO pins for the Nucleo-144 board.
+ *
+ ************************************************************************************/
+
+#if defined(CONFIG_SPI)
+void stm32_spidev_initialize(void);
+#endif
+
+/************************************************************************************
+ * Name: stm32_spidev_bus_test
+ *
+ * Description:
+ *   Called to create the defined SPI buses and test them by initializing them
+ *   and sending the NUCLEO_SPI_TEST (no chip select).
+ *
+ ************************************************************************************/
+
+#if defined(CONFIG_NUCLEO_SPI_TEST)
+int stm32_spidev_bus_test(void);
+#endif
+
+/************************************************************************************
+ * Name: stm32_dma_alloc_init
+ *
+ * Description:
+ *   Called to create a FAT DMA allocator
+ *
+ * Returned Value:
+ *   0 on success or -ENOMEM
  *
- ****************************************************************************************************/
+ ************************************************************************************/
 
-void weak_function stm32_spidev_initialize(void);
+void stm32_dma_alloc_init(void);
+
+#if defined (CONFIG_FAT_DMAMEMORY)
+int stm32_dma_alloc_init(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_sdio_initialize
+ *
+ * Description:
+ *   Called at application startup time to initialize the SCMMC functionality.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_MMCSD
+int stm32_sdio_initialize(void);
+#endif
+
+/************************************************************************************
+ * Name: stm32_usbinitialize
+ *
+ * Description:
+ *   Called from stm32_usbinitialize very early in inialization to setup USB-related
+ *   GPIO pins for the nucleo-144 board.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32F7_OTGFS
+void stm32_usbinitialize(void);
+#endif
+
+/************************************************************************************
+ * Name: stm32_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ADC
+int stm32_adc_setup(void);
+#endif
+
+/************************************************************************************
+ * Name: stm32_bbsram_int
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32F7_BBSRAM
+int stm32_bbsram_int(void);
+#endif
 
 #endif /* __ASSEMBLY__ */
 #endif /* __CONFIGS_NUCLEO_144_SRC_NUCLEO_144_H */
diff --git a/configs/nucleo-144/src/stm32_adc.c b/configs/nucleo-144/src/stm32_adc.c
new file mode 100644
index 0000000000000000000000000000000000000000..5a26723f5e7d0ff1ad9d45c233cbffca043b0a8f
--- /dev/null
+++ b/configs/nucleo-144/src/stm32_adc.c
@@ -0,0 +1,174 @@
+/************************************************************************************
+ * configs/nucleo-144/src/stm32_adc.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "chip.h"
+#include "stm32_gpio.h"
+#include "stm32_adc.h"
+#include "nucleo-144.h"
+
+#ifdef CONFIG_ADC
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Configuration ********************************************************************/
+/* Up to 3 ADC interfaces are supported */
+
+#if STM32F7_NADC < 3
+#  undef CONFIG_STM32F7_ADC3
+#endif
+
+#if STM32F7_NADC < 2
+#  undef CONFIG_STM32F7_ADC2
+#endif
+
+#if STM32F7_NADC < 1
+#  undef CONFIG_STM32F7_ADC1
+#endif
+
+#if defined(CONFIG_STM32F7_ADC1) || defined(CONFIG_STM32F7_ADC2) || defined(CONFIG_STM32F7_ADC3)
+#ifndef CONFIG_STM32F7_ADC1
+#  warning "Channel information only available for ADC1"
+#endif
+
+/* The number of ADC channels in the conversion list */
+
+#define ADC1_NCHANNELS 1
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+/* Identifying number of each ADC channel: Variable Resistor.
+ *
+ * {1,  2,  3, 4,  5,  6, 7,  8,  9, 10, 11, 12, 13, 15};
+ */
+
+#ifdef CONFIG_STM32F7_ADC1
+static const uint8_t  g_chanlist[ADC1_NCHANNELS] = {3};
+
+/* Configurations of pins used byte each ADC channels
+ *
+ * {GPIO_ADC1_IN1,  GPIO_ADC1_IN2,  GPIO_ADC1_IN3, GPIO_ADC1_IN4,  GPIO_ADC1_IN5, 
+ *  GPIO_ADC1_IN6,  GPIO_ADC1_IN7,  GPIO_ADC1_IN8,  GPIO_ADC1_IN9, GPIO_ADC1_IN10,
+ *  GPIO_ADC1_IN11, GPIO_ADC1_IN12, GPIO_ADC1_IN13, GPIO_ADC1_IN15};
+ */
+
+static const uint32_t g_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN3};
+#endif
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+int stm32_adc_setup(void)
+{
+#ifdef CONFIG_STM32F7_ADC1
+  static bool initialized = false;
+  struct adc_dev_s *adc;
+  int ret;
+  int i;
+
+  /* Check if we have already initialized */
+
+  if (!initialized)
+    {
+      /* Configure the pins as analog inputs for the selected channels */
+
+      for (i = 0; i < ADC1_NCHANNELS; i++)
+        {
+          if (g_pinlist[i] != 0)
+            {
+              stm32_configgpio(g_pinlist[i]);
+            }
+        }
+
+      /* Call stm32_adcinitialize() to get an instance of the ADC interface */
+
+      adc = stm32_adc_initialize(1, g_chanlist, ADC1_NCHANNELS);
+      if (adc == NULL)
+        {
+          aerr("ERROR: Failed to get ADC interface\n");
+          return -ENODEV;
+        }
+
+      /* Register the ADC driver at "/dev/adc0" */
+
+      ret = adc_register("/dev/adc0", adc);
+      if (ret < 0)
+        {
+          aerr("ERROR: adc_register failed: %d\n", ret);
+          return ret;
+        }
+
+      /* Now we are initialized */
+
+      initialized = true;
+    }
+
+  return OK;
+#else
+  return -ENOSYS;
+#endif
+}
+
+#endif /* CONFIG_STM32F7_ADC1 || CONFIG_STM32F7_ADC2 || CONFIG_STM32F7_ADC3 */
+#endif /* CONFIG_ADC */
diff --git a/configs/nucleo-144/src/stm32_appinitialize.c b/configs/nucleo-144/src/stm32_appinitialize.c
index e1b318684c87fb8a85c7cb6614f8f3f6ddad0707..86febc3e851c6000b51a3bb3d0a925db246fc7d3 100644
--- a/configs/nucleo-144/src/stm32_appinitialize.c
+++ b/configs/nucleo-144/src/stm32_appinitialize.c
@@ -2,8 +2,9 @@
  * config/nucleo-144/src/stm32_appinitilaize.c
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
- *   Author: Mark Olsson 
+ *   Authors: Gregory Nutt 
+ *            Mark Olsson 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -39,6 +40,9 @@
  ****************************************************************************/
 
 #include 
+
+#include 
+#include 
 #include 
 
 #include "nucleo-144.h"
@@ -75,9 +79,20 @@
 
 int board_app_initialize(uintptr_t arg)
 {
-#if !defined(CONFIG_ARCH_LEDS) && defined(CONFIG_USERLED_LOWER)
   int ret;
 
+#ifdef CONFIG_FS_PROCFS
+  /* Mount the procfs file system */
+
+  ret = mount(NULL, STM32_PROCFS_MOUNTPOINT, "procfs", 0, NULL);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to mount procfs at %s: %d\n",
+             STM32_PROCFS_MOUNTPOINT, ret);
+    }
+#endif
+
+#if !defined(CONFIG_ARCH_LEDS) && defined(CONFIG_USERLED_LOWER)
   /* Register the LED driver */
 
   ret = userled_lower_initialize(LED_DRIVER_PATH);
@@ -87,5 +102,52 @@ int board_app_initialize(uintptr_t arg)
     }
 #endif
 
+#ifdef CONFIG_ADC
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = stm32_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_adc_setup failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_STM32F7_BBSRAM
+  /* Initialize battery-backed RAM */
+
+  (void)stm32_bbsram_int();
+#endif
+
+#if defined(CONFIG_FAT_DMAMEMORY)
+  if (stm32_dma_alloc_init() < 0)
+    {
+      syslog(LOG_ERR, "DMA alloc FAILED");
+    }
+#endif
+
+#if defined(CONFIG_NUCLEO_SPI_TEST)
+  /* Create SPI interfaces */
+
+  ret = stm32_spidev_bus_test();
+  if (ret != OK)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to initialize SPI interfaces: %d\n", ret);
+      return ret;
+    }
+#endif
+
+#if defined(CONFIG_MMCSD)
+  /* Configure SDIO */
+  /* Initialize the SDIO block driver */
+
+  ret = stm32_sdio_initialize();
+  if (ret != OK)
+    {
+      ferr("ERROR: Failed to initialize MMC/SD driver: %d\n", ret);
+      return ret;
+    }
+#endif
+
+  UNUSED(ret);
   return OK;
 }
diff --git a/configs/nucleo-144/src/stm32_autoleds.c b/configs/nucleo-144/src/stm32_autoleds.c
index e9114391aff8f6428e308b066835a94454b5bc50..cf44384630939778a8d08c401862966efc75b43a 100644
--- a/configs/nucleo-144/src/stm32_autoleds.c
+++ b/configs/nucleo-144/src/stm32_autoleds.c
@@ -2,7 +2,8 @@
  * configs/nucleo-144/src/stm32_autoleds.c
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -43,27 +44,43 @@
 #include 
 
 #include 
+#include 
 
 #include "stm32_gpio.h"
 #include "nucleo-144.h"
-
 #ifdef CONFIG_ARCH_LEDS
 
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
+#define ARRAYSIZE(x) (sizeof((x)) / sizeof((x)[0]))
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Indexed by BOARD_LED_ */
 
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
+static const uint32_t g_ledmap[BOARD_NLEDS] =
+{
+  GPIO_LED_GREEN,
+  GPIO_LED_BLUE,
+  GPIO_LED_RED,
+};
+
+static bool g_initialized;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+static void phy_set_led(int led, bool state)
+{
+  /* Active High */
+
+  stm32_gpiowrite(g_ledmap[led], state);
+}
 
 /****************************************************************************
  * Public Functions
@@ -75,9 +92,14 @@
 
 void board_autoled_initialize(void)
 {
+  int i;
+
   /* Configure the LD1 GPIO for output. Initial state is OFF */
 
-  stm32_configgpio(GPIO_LD1);
+  for (i = 0; i < ARRAYSIZE(g_ledmap); i++)
+    {
+      stm32_configgpio(g_ledmap[i]);
+    }
 }
 
 /****************************************************************************
@@ -86,28 +108,47 @@ void board_autoled_initialize(void)
 
 void board_autoled_on(int led)
 {
-  bool ledstate = false;
-
   switch (led)
     {
-    case 0:             /* LED_STARTED:      NuttX has been started  STATUS LED=OFF */
-                        /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */
-                        /* LED_IRQSENABLED:  Interrupts enabled      STATUS LED=OFF */
-      break;            /* Leave ledstate == true to turn OFF */
-
     default:
-    case 2:             /* LED_INIRQ:        In an interrupt         STATUS LED=N/C */
-                        /* LED_SIGNAL:       In a signal handler     STATUS LED=N/C */
-                        /* LED_ASSERTION:    An assertion failed     STATUS LED=N/C */
-      return;           /* Return to leave STATUS LED unchanged */
-
-    case 3:             /* LED_PANIC:        The system has crashed  STATUS LED=FLASH */
-    case 1:             /* LED_STACKCREATED: Idle stack created      STATUS LED=ON */
-      ledstate = true;  /* Set ledstate == false to turn ON */
       break;
-    }
 
-   stm32_gpiowrite(GPIO_LD1, ledstate);
+    case LED_HEAPALLOCATE:
+      phy_set_led(BOARD_LED_BLUE, true);
+      break;
+
+    case LED_IRQSENABLED:
+      phy_set_led(BOARD_LED_BLUE, false);
+      phy_set_led(BOARD_LED_GREEN, true);
+      break;
+
+    case LED_STACKCREATED:
+      phy_set_led(BOARD_LED_GREEN, true);
+      phy_set_led(BOARD_LED_BLUE, true);
+      g_initialized = true;
+      break;
+
+    case LED_INIRQ:
+      phy_set_led(BOARD_LED_BLUE, true);
+      break;
+
+    case LED_SIGNAL:
+      phy_set_led(BOARD_LED_GREEN, true);
+      break;
+
+    case LED_ASSERTION:
+      phy_set_led(BOARD_LED_RED, true);
+      phy_set_led(BOARD_LED_BLUE, true);
+      break;
+
+    case LED_PANIC:
+      phy_set_led(BOARD_LED_RED, true);
+      break;
+
+    case LED_IDLE : /* IDLE */
+      phy_set_led(BOARD_LED_RED, true);
+    break;
+    }
 }
 
 /****************************************************************************
@@ -118,26 +159,29 @@ void board_autoled_off(int led)
 {
   switch (led)
     {
-    /* These should not happen and are ignored */
-
     default:
-    case 0:             /* LED_STARTED:      NuttX has been started  STATUS LED=OFF */
-                        /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */
-                        /* LED_IRQSENABLED:  Interrupts enabled      STATUS LED=OFF */
-    case 1:             /* LED_STACKCREATED: Idle stack created      STATUS LED=ON */
+      break;
 
-    /* These result in no-change */
+    case LED_SIGNAL:
+      phy_set_led(BOARD_LED_GREEN, false);
+      break;
 
-    case 2:             /* LED_INIRQ:        In an interrupt         STATUS LED=N/C */
-                        /* LED_SIGNAL:       In a signal handler     STATUS LED=N/C */
-                        /* LED_ASSERTION:    An assertion failed     STATUS LED=N/C */
-      return;           /* Return to leave STATUS LED unchanged */
+    case LED_INIRQ:
+      phy_set_led(BOARD_LED_BLUE, false);
+      break;
 
-    /* Turn STATUS LED off set driving the output high */
+    case LED_ASSERTION:
+      phy_set_led(BOARD_LED_RED, false);
+      phy_set_led(BOARD_LED_BLUE, false);
+      break;
 
-    case 3:             /* LED_PANIC:        The system has crashed  STATUS LED=FLASH */
-      stm32_gpiowrite(GPIO_LD1, false);
+    case LED_PANIC:
+      phy_set_led(BOARD_LED_RED, false);
       break;
+
+    case LED_IDLE : /* IDLE */
+      phy_set_led(BOARD_LED_RED, false);
+    break;
     }
 }
 
diff --git a/configs/nucleo-144/src/stm32_bbsram.c b/configs/nucleo-144/src/stm32_bbsram.c
new file mode 100644
index 0000000000000000000000000000000000000000..085ee1824922fa08472c8974ac67762de4c51616
--- /dev/null
+++ b/configs/nucleo-144/src/stm32_bbsram.c
@@ -0,0 +1,556 @@
+/****************************************************************************
+ * configs/nucleo-144/src/stm32_bbsram.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ *****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "nucleo-144.h"
+
+#ifdef CONFIG_STM32F7_BBSRAM
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+#define FREEZE_STR(s)          #s
+#define STRINGIFY(s)           FREEZE_STR(s)
+#define HARDFAULT_FILENO       3
+#define HARDFAULT_PATH         BBSRAM_PATH""STRINGIFY(HARDFAULT_FILENO)
+#define HARDFAULT_REBOOT_      FILENO 0
+#define HARDFAULT_REBOOT_PATH  BBSRAM_PATH""STRINGIFY(HARDFAULT_REBOOT_FILENO)
+
+#define BBSRAM_SIZE_FN0        (sizeof(int))
+#define BBSRAM_SIZE_FN1        384
+#define BBSRAM_SIZE_FN2        384
+#define BBSRAM_SIZE_FN3 -      1
+
+/* The following guides in the amount of the user and interrupt stack
+ * data we can save. The amount of storage left will dictate the actual
+ * number of entries of the user stack data saved. If it is too big
+ * It will be truncated by the call to stm32_bbsram_savepanic
+ */
+#define BBSRAM_HEADER_SIZE     20 /* This is an assumption */
+#define BBSRAM_USED            ((4*BBSRAM_HEADER_SIZE)+ \
+                                (BBSRAM_SIZE_FN0+BBSRAM_SIZE_FN1+ \
+                                 BBSRAM_SIZE_FN2))
+#define BBSRAM_REAMINING       (STM32F7_BBSRAM_SIZE-BBSRAM_USED)
+#if CONFIG_ARCH_INTERRUPTSTACK <= 3
+#  define BBSRAM_NUMBER_STACKS 1
+#else
+#  define BBSRAM_NUMBER_STACKS 2
+#endif
+#define BBSRAM_FIXED_ELEMENTS_SIZE (sizeof(info_t))
+#define BBSRAM_LEFTOVER            (BBSRAM_REAMINING-\
+                                    BBSRAM_FIXED_ELEMENTS_SIZE)
+
+#define CONFIG_ISTACK_SIZE (BBSRAM_LEFTOVER/BBSRAM_NUMBER_STACKS/ \
+                            sizeof(stack_word_t))
+#define CONFIG_USTACK_SIZE (BBSRAM_LEFTOVER/BBSRAM_NUMBER_STACKS/ \
+                            sizeof(stack_word_t))
+
+/* The path to the Battery Backed up SRAM */
+
+#define BBSRAM_PATH "/fs/bbr"
+
+/* The sizes of the files to create (-1) use rest of BBSRAM memory */
+
+#define BSRAM_FILE_SIZES \
+{ \
+  BBSRAM_SIZE_FN0, \
+  BBSRAM_SIZE_FN1, \
+  BBSRAM_SIZE_FN2, \
+  BBSRAM_SIZE_FN3, \
+  0 \
+}
+
+#define ARRAYSIZE(a) (sizeof((a))/sizeof(a[0]))
+
+/* For Assert keep this much of the file name*/
+
+#define MAX_FILE_PATH_LENGTH 40
+
+#define HEADER_TIME_FMT      "%Y-%m-%d-%H:%M:%S"
+#define HEADER_TIME_FMT_NUM  (2+ 0+ 0+ 0+ 0+ 0)
+#define HEADER_TIME_FMT_LEN  (((ARRAYSIZE(HEADER_TIME_FMT)-1) + \
+                                HEADER_TIME_FMT_NUM))
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Used for stack frame storage */
+
+typedef uint32_t stack_word_t;
+
+/* Stack related data */
+
+typedef struct
+{
+  uint32_t sp;
+  uint32_t top;
+  uint32_t size;
+
+} _stack_t;
+
+typedef struct
+{
+  _stack_t user;
+#if CONFIG_ARCH_INTERRUPTSTACK > 3
+  _stack_t interrupt;
+#endif
+} stack_t;
+
+/* Not Used for reference only */
+
+typedef struct
+{
+  uint32_t r0;
+  uint32_t r1;
+  uint32_t r2;
+  uint32_t r3;
+  uint32_t r4;
+  uint32_t r5;
+  uint32_t r6;
+  uint32_t r7;
+  uint32_t r8;
+  uint32_t r9;
+  uint32_t r10;
+  uint32_t r11;
+  uint32_t r12;
+  uint32_t sp;
+  uint32_t lr;
+  uint32_t pc;
+  uint32_t xpsr;
+  uint32_t d0;
+  uint32_t d1;
+  uint32_t d2;
+  uint32_t d3;
+  uint32_t d4;
+  uint32_t d5;
+  uint32_t d6;
+  uint32_t d7;
+  uint32_t d8;
+  uint32_t d9;
+  uint32_t d10;
+  uint32_t d11;
+  uint32_t d12;
+  uint32_t d13;
+  uint32_t d14;
+  uint32_t d15;
+  uint32_t fpscr;
+  uint32_t sp_main;
+  uint32_t sp_process;
+  uint32_t apsr;
+  uint32_t ipsr;
+  uint32_t epsr;
+  uint32_t primask;
+  uint32_t basepri;
+  uint32_t faultmask;
+  uint32_t control;
+  uint32_t s0;
+  uint32_t s1;
+  uint32_t s2;
+  uint32_t s3;
+  uint32_t s4;
+  uint32_t s5;
+  uint32_t s6;
+  uint32_t s7;
+  uint32_t s8;
+  uint32_t s9;
+  uint32_t s10;
+  uint32_t s11;
+  uint32_t s12;
+  uint32_t s13;
+  uint32_t s14;
+  uint32_t s15;
+  uint32_t s16;
+  uint32_t s17;
+  uint32_t s18;
+  uint32_t s19;
+  uint32_t s20;
+  uint32_t s21;
+  uint32_t s22;
+  uint32_t s23;
+  uint32_t s24;
+  uint32_t s25;
+  uint32_t s26;
+  uint32_t s27;
+  uint32_t s28;
+  uint32_t s29;
+  uint32_t s30;
+  uint32_t s31;
+} proc_regs_t;
+
+/* Flags to identify what is in the dump */
+
+typedef enum
+{
+  REGS_PRESENT          = 0x01,
+  USERSTACK_PRESENT     = 0x02,
+  INTSTACK_PRESENT      = 0x04,
+  INVALID_USERSTACK_PTR = 0x20,
+  INVALID_INTSTACK_PTR  = 0x40,
+} fault_flags_t;
+
+typedef struct
+{
+  fault_flags_t flags;                  /* What is in the dump */
+  uintptr_t     current_regs;           /* Used to validate the dump */
+  int           lineno;                 /* __LINE__ to up_assert */
+  int           pid;                    /* Process ID */
+  uint32_t      regs[XCPTCONTEXT_REGS]; /* Interrupt register save area */
+  stack_t       stacks;                 /* Stack info */
+#if CONFIG_TASK_NAME_SIZE > 0
+  char          name[CONFIG_TASK_NAME_SIZE + 1]; /* Task name (with NULL
+                                                  * terminator) */
+#endif
+  char          filename[MAX_FILE_PATH_LENGTH];  /* the Last of chars in
+                                                  * __FILE__ to up_assert */
+} info_t;
+
+typedef struct
+{
+  info_t    info;                  /* The info */
+#if CONFIG_ARCH_INTERRUPTSTACK > 3 /* The amount of stack data is compile time
+                                    * sized backed on what is left after the
+                                    * other BBSRAM files are defined
+                                    * The order is such that only the
+                                    * ustack should be truncated
+                                    */
+  stack_word_t istack[CONFIG_USTACK_SIZE];
+#endif
+  stack_word_t ustack[CONFIG_ISTACK_SIZE];
+} fullcontext_t;
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static uint8_t g_sdata[STM32F7_BBSRAM_SIZE];
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: hardfault_get_desc
+ ****************************************************************************/
+
+static int hardfault_get_desc(struct bbsramd_s *desc)
+{
+  int ret = -ENOENT;
+  int fd = open(HARDFAULT_PATH, O_RDONLY);
+  int rv;
+
+  if (fd < 0)
+    {
+      syslog(LOG_INFO, "stm32 bbsram: Failed to open Fault Log file [%s] "
+          "(%d)\n", HARDFAULT_PATH, fd);
+    }
+  else
+    {
+      ret = -EIO;
+      rv  = ioctl(fd, STM32F7_BBSRAM_GETDESC_IOCTL,
+                 (unsigned long)((uintptr_t)desc));
+
+      if (rv >= 0)
+        {
+          ret = fd;
+        }
+      else
+        {
+          syslog(LOG_INFO, "stm32 bbsram: Failed to get Fault Log descriptor "
+              "(%d)\n", rv);
+        }
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: copy_reverse
+ ****************************************************************************/
+
+#if defined(CONFIG_STM32F7_SAVE_CRASHDUMP)
+static void copy_reverse(stack_word_t *dest, stack_word_t *src, int size)
+{
+  while (size--)
+    {
+      *dest++ = *src--;
+    }
+}
+#endif /* CONFIG_STM32F7_SAVE_CRASHDUMP */
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_bbsram_int
+ ****************************************************************************/
+
+int stm32_bbsram_int(void)
+{
+  int filesizes[CONFIG_STM32F7_BBSRAM_FILES + 1] = BSRAM_FILE_SIZES;
+  char buf[HEADER_TIME_FMT_LEN + 1];
+  struct bbsramd_s desc;
+  int rv;
+  int state;
+  struct tm tt;
+  time_t time_sec;
+
+
+  /* Using Battery Backed Up SRAM */
+
+  stm32_bbsraminitialize(BBSRAM_PATH, filesizes);
+
+#if defined(CONFIG_STM32F7_SAVE_CRASHDUMP)
+  /* Panic Logging in Battery Backed Up Files */
+  /* Do we have an hard fault in BBSRAM? */
+
+  rv = hardfault_get_desc(&desc);
+  if (rv >= OK)
+    {
+      printf("There is a hard fault logged.\n");
+      state = (desc.lastwrite.tv_sec || desc.lastwrite.tv_nsec) ?  OK : 1;
+
+      syslog(LOG_INFO, "Fault Log info File No %d Length %d flags:0x%02x "
+          "state:%d\n",(unsigned int)desc.fileno, (unsigned int) desc.len,
+          (unsigned int)desc.flags, state);
+
+      if (state == OK)
+        {
+          time_sec = desc.lastwrite.tv_sec + (desc.lastwrite.tv_nsec / 1e9);
+          gmtime_r(&time_sec, &tt);
+          strftime(buf, HEADER_TIME_FMT_LEN , HEADER_TIME_FMT , &tt);
+
+          syslog(LOG_INFO, "Fault Logged on %s - Valid\n", buf);
+        }
+
+      close(rv);
+      rv = unlink(HARDFAULT_PATH);
+      if (rv < 0)
+        {
+          syslog(LOG_INFO, "stm32 bbsram: Failed to unlink Fault Log file [%s"
+                 "] (%d)\n", HARDFAULT_PATH, rv);
+        }
+    }
+#endif /* CONFIG_STM32F7_SAVE_CRASHDUMP */
+
+  return rv;
+}
+
+/****************************************************************************
+ * Name: board_crashdump
+ ****************************************************************************/
+
+#if defined(CONFIG_STM32F7_SAVE_CRASHDUMP)
+void board_crashdump(uintptr_t currentsp, FAR void *tcb,
+                     FAR const uint8_t *filename, int lineno)
+{
+  fullcontext_t *pdump = (fullcontext_t *)&g_sdata;
+  FAR struct tcb_s *rtcb;
+  int rv;
+
+  (void)enter_critical_section();
+
+  rtcb = (FAR struct tcb_s *)tcb;
+
+  /* Zero out everything */
+
+  memset(pdump, 0, sizeof(fullcontext_t));
+
+  /* Save Info */
+
+  pdump->info.lineno = lineno;
+
+  if (filename)
+    {
+      int offset = 0;
+      unsigned int len = strlen((char *)filename) + 1;
+
+      if (len > sizeof(pdump->info.filename))
+        {
+          offset = len - sizeof(pdump->info.filename);
+        }
+
+      strncpy(pdump->info.filename, (char *)&filename[offset],
+              sizeof(pdump->info.filename));
+    }
+
+  /* Save the value of the pointer for current_regs as debugging info.
+   * It should be NULL in case of an ASSERT and will aid in cross
+   * checking the validity of system memory at the time of the
+   * fault.
+   */
+
+  pdump->info.current_regs = (uintptr_t) CURRENT_REGS;
+
+  /* Save Context */
+
+#if CONFIG_TASK_NAME_SIZE > 0
+  strncpy(pdump->info.name, rtcb->name, CONFIG_TASK_NAME_SIZE);
+#endif
+
+  pdump->info.pid = rtcb->pid;
+
+  /* If  current_regs is not NULL then we are in an interrupt context
+   * and the user context is in current_regs else we are running in
+   * the users context
+   */
+
+  if (CURRENT_REGS)
+    {
+      pdump->info.stacks.interrupt.sp = currentsp;
+      pdump->info.flags |= (REGS_PRESENT | USERSTACK_PRESENT | \
+                            INTSTACK_PRESENT);
+      memcpy(pdump->info.regs, (void *)CURRENT_REGS,
+             sizeof(pdump->info.regs));
+      pdump->info.stacks.user.sp = pdump->info.regs[REG_R13];
+    }
+  else
+    {
+      /* users context */
+
+      pdump->info.flags |= USERSTACK_PRESENT;
+      pdump->info.stacks.user.sp = currentsp;
+    }
+
+  if (pdump->info.pid == 0)
+    {
+      pdump->info.stacks.user.top = g_idle_topstack - 4;
+      pdump->info.stacks.user.size = CONFIG_IDLETHREAD_STACKSIZE;
+    }
+  else
+    {
+      pdump->info.stacks.user.top = (uint32_t) rtcb->adj_stack_ptr;
+      pdump->info.stacks.user.size = (uint32_t) rtcb->adj_stack_size;
+    }
+
+#if CONFIG_ARCH_INTERRUPTSTACK > 3
+  /* Get the limits on the interrupt stack memory */
+
+  pdump->info.stacks.interrupt.top = (uint32_t)&g_intstackbase;
+  pdump->info.stacks.interrupt.size  = (CONFIG_ARCH_INTERRUPTSTACK & ~3);
+
+  /* If In interrupt Context save the interrupt stack data centered
+   * about the interrupt stack pointer
+   */
+
+  if ((pdump->info.flags & INTSTACK_PRESENT) != 0)
+    {
+      stack_word_t *ps = (stack_word_t *) pdump->info.stacks.interrupt.sp;
+      copy_reverse(pdump->istack, &ps[ARRAYSIZE(pdump->istack) / 2],
+                   ARRAYSIZE(pdump->istack));
+    }
+
+  /* Is it Invalid? */
+
+  if (!(pdump->info.stacks.interrupt.sp <= pdump->info.stacks.interrupt.top &&
+        pdump->info.stacks.interrupt.sp > pdump->info.stacks.interrupt.top -
+          pdump->info.stacks.interrupt.size))
+    {
+      pdump->info.flags |= INVALID_INTSTACK_PTR;
+    }
+
+#endif
+  /* If In interrupt context or User save the user stack data centered
+   * about the user stack pointer
+   */
+
+  if ((pdump->info.flags & USERSTACK_PRESENT) != 0)
+    {
+      stack_word_t *ps = (stack_word_t *) pdump->info.stacks.user.sp;
+      copy_reverse(pdump->ustack, &ps[ARRAYSIZE(pdump->ustack) / 2],
+                   ARRAYSIZE(pdump->ustack));
+    }
+
+  /* Is it Invalid? */
+
+  if (!(pdump->info.stacks.user.sp <= pdump->info.stacks.user.top &&
+        pdump->info.stacks.user.sp > pdump->info.stacks.user.top -
+          pdump->info.stacks.user.size))
+    {
+      pdump->info.flags |= INVALID_USERSTACK_PTR;
+    }
+
+  rv = stm32_bbsram_savepanic(HARDFAULT_FILENO, (uint8_t *)pdump,
+                              sizeof(fullcontext_t));
+
+  /* Test if memory got wiped because of using _sdata */
+
+  if (rv == -ENXIO)
+    {
+      char *dead = "Memory wiped - dump not saved!";
+
+      while (*dead)
+        {
+          up_lowputc(*dead++);
+        }
+    }
+  else if (rv == -ENOSPC)
+    {
+      /* hard fault again */
+
+      up_lowputc('!');
+    }
+
+#if defined(CONFIG_BOARD_RESET_ON_CRASH)
+  up_systemreset();
+#endif
+}
+#endif /* CONFIG_STM32F7_SAVE_CRASHDUMP */
+
+#endif /* CONFIG_STM32_BBSRAM */
diff --git a/configs/nucleo-144/src/stm32_boot.c b/configs/nucleo-144/src/stm32_boot.c
index 210c0982a3da4f264780236928e4d987c6e4aeaa..684ade81767bc44fb1a36e80fc8ddcb1cbee9ae3 100644
--- a/configs/nucleo-144/src/stm32_boot.c
+++ b/configs/nucleo-144/src/stm32_boot.c
@@ -2,7 +2,8 @@
  * configs/nucleo-144/src/stm32_boot.c
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -63,24 +64,21 @@
 
 void stm32_boardinitialize(void)
 {
-#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \
-    defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \
-    defined(CONFIG_STM32F7_SPI5)
-  /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
-   * stm32_spidev_initialize() has been brought into the link.
-   */
-
-  if (stm32_spidev_initialize)
-    {
-      stm32_spidev_initialize();
-    }
-#endif
-
 #ifdef CONFIG_ARCH_LEDS
   /* Configure on-board LEDs if LED support has been selected. */
 
   board_autoled_initialize();
 #endif
+
+#if defined(CONFIG_STM32F7_OTGFS) || defined(CONFIG_STM32F7_HOST)
+  stm32_usbinitialize();
+#endif
+
+#if defined(CONFIG_SPI)
+  /* Configure SPI chip selects */
+
+  stm32_spidev_initialize();
+#endif
 }
 
 /************************************************************************************
diff --git a/configs/nucleo-144/src/stm32_buttons.c b/configs/nucleo-144/src/stm32_buttons.c
index 54a7dafbfba1dbec86c590eae5a170933e3c27f3..ea520e8473133b9b37cd002f23b227bc1d153894 100644
--- a/configs/nucleo-144/src/stm32_buttons.c
+++ b/configs/nucleo-144/src/stm32_buttons.c
@@ -1,8 +1,9 @@
 /****************************************************************************
  * configs/nucleo-144/src/stm32_buttons.c
  *
- *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -39,9 +40,14 @@
 
 #include 
 
+#include 
+#include 
+
 #include 
 #include 
 
+#include 
+
 #include "stm32_gpio.h"
 #include "nucleo-144.h"
 
@@ -94,15 +100,21 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-#warning Missing logic
+  int ret = -EINVAL;
+
+  if (id == BUTTON_USER)
+    {
+      ret = stm32_gpiosetevent(GPIO_BTN_USER, true, true, true, irqhandler, arg);
+    }
+
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/nucleo-144/src/stm32_dma_alloc.c b/configs/nucleo-144/src/stm32_dma_alloc.c
new file mode 100644
index 0000000000000000000000000000000000000000..7ce0af1790dd4620ea6bb6637d07d8d016e8c171
--- /dev/null
+++ b/configs/nucleo-144/src/stm32_dma_alloc.c
@@ -0,0 +1,117 @@
+/****************************************************************************
+ * configs/nucleo-144/stc/stm32_dma_alloc.c
+ *
+ *   Copyright (C) 2016 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "nucleo-144.h"
+
+#if defined(CONFIG_FAT_DMAMEMORY)
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#if !defined(CONFIG_GRAN)
+#  error microSD DMA support requires CONFIG_GRAN
+#endif
+
+#define BOARD_DMA_ALLOC_POOL_SIZE (8*512)
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+static GRAN_HANDLE dma_allocator;
+
+/* The DMA heap size constrains the total number of things that can be
+ * ready to do DMA at a time.
+ *
+ * For example, FAT DMA depends on one sector-sized buffer per filesystem plus
+ * one sector-sized buffer per file.
+ *
+ * We use a fundamental alignment / granule size of 64B; this is sufficient
+ * to guarantee alignment for the largest STM32 DMA burst (16 beats x 32bits).
+ */
+
+static uint8_t g_dma_heap[BOARD_DMA_ALLOC_POOL_SIZE] __attribute__((aligned(64)));
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_dma_alloc_init
+ *
+ * Description:
+ *   All boards may optionally provide this API to instantiate a pool of
+ *   memory for uses with FAST FS DMA operations.
+ *
+ ************************************************************************************/
+
+int stm32_dma_alloc_init(void)
+{
+  dma_allocator = gran_initialize(g_dma_heap,
+                                  sizeof(g_dma_heap),
+                                  7,  /* 128B granule - must be > alignment (XXX bug?) */
+                                  6); /* 64B alignment */
+
+  if (dma_allocator == NULL)
+    {
+      return -ENOMEM;
+    }
+
+  return OK;
+}
+
+/* DMA-aware allocator stubs for the FAT filesystem. */
+
+void *fat_dma_alloc(size_t size)
+{
+  return gran_alloc(dma_allocator, size);
+}
+
+void fat_dma_free(FAR void *memory, size_t size)
+{
+  gran_free(dma_allocator, memory, size);
+}
+
+#endif /* CONFIG_FAT_DMAMEMORY */
diff --git a/configs/nucleo-144/src/stm32_sdio.c b/configs/nucleo-144/src/stm32_sdio.c
new file mode 100644
index 0000000000000000000000000000000000000000..9b1de7415fe6c02ac8d53255830e51e89de0f55e
--- /dev/null
+++ b/configs/nucleo-144/src/stm32_sdio.c
@@ -0,0 +1,180 @@
+/****************************************************************************
+ * config/nucleo-144/src/stm32_sdio.c
+ *
+ *   Copyright (C) 2014, 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "chip.h"
+#include "nucleo-144.h"
+#include "stm32_gpio.h"
+#include "stm32_sdmmc.h"
+
+#ifdef CONFIG_MMCSD
+
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+/* Card detections requires card support and a card detection GPIO */
+
+#define HAVE_NCD   1
+#if !defined(GPIO_SDMMC1_NCD)
+#  undef HAVE_NCD
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static FAR struct sdio_dev_s *g_sdio_dev;
+#ifdef HAVE_NCD
+static bool g_sd_inserted = 0xff; /* Impossible value */
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_ncd_interrupt
+ *
+ * Description:
+ *   Card detect interrupt handler.
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_NCD
+static int stm32_ncd_interrupt(int irq, FAR void *context)
+{
+  bool present;
+
+  present = !stm32_gpioread(GPIO_SDMMC1_NCD);
+  if (g_sdio_dev && present != g_sd_inserted)
+    {
+      sdio_mediachange(g_sdio_dev, present);
+      g_sd_inserted = present;
+    }
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_sdio_initialize
+ *
+ * Description:
+ *   Initialize SDIO-based MMC/SD card support
+ *
+ ****************************************************************************/
+
+int stm32_sdio_initialize(void)
+{
+  int ret;
+
+#ifdef HAVE_NCD
+  /* Card detect */
+
+  bool cd_status;
+
+  /* Configure the card detect GPIO */
+
+  stm32_configgpio(GPIO_SDMMC1_NCD);
+
+  /* Register an interrupt handler for the card detect pin */
+
+  (void)stm32_gpiosetevent(GPIO_SDMMC1_NCD, true, true, true,
+                           stm32_ncd_interrupt, NULL);
+#endif
+
+  /* Mount the SDIO-based MMC/SD block driver */
+  /* First, get an instance of the SDIO interface */
+
+  finfo("Initializing SDIO slot %d\n", SDIO_SLOTNO);
+
+  g_sdio_dev = sdio_initialize(SDIO_SLOTNO);
+  if (!g_sdio_dev)
+    {
+      ferr("ERROR: Failed to initialize SDIO slot %d\n", SDIO_SLOTNO);
+      return -ENODEV;
+    }
+
+  /* Now bind the SDIO interface to the MMC/SD driver */
+
+  finfo("Bind SDIO to the MMC/SD driver, minor=%d\n", SDIO_MINOR);
+
+  ret = mmcsd_slotinitialize(SDIO_MINOR, g_sdio_dev);
+  if (ret != OK)
+    {
+      ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
+      return ret;
+    }
+
+  finfo("Successfully bound SDIO to the MMC/SD driver\n");
+
+#ifdef HAVE_NCD
+  /* Use SD card detect pin to check if a card is g_sd_inserted */
+
+  cd_status = !stm32_gpioread(GPIO_SDMMC1_NCD);
+  finfo("Card detect : %d\n", cd_status);
+
+  sdio_mediachange(g_sdio_dev, cd_status);
+#else
+  /* Assume that the SD card is inserted.  What choice do we have? */
+
+  sdio_mediachange(g_sdio_dev, true);
+#endif
+
+  return OK;
+}
+
+#endif /* HAVE_SDIO */
diff --git a/configs/nucleo-144/src/stm32_spi.c b/configs/nucleo-144/src/stm32_spi.c
index e31a63a11de89140ec3e3f1a1234408327117075..61dab7a51ee3dbdbe4370eb30abcad8fe2e1b469 100644
--- a/configs/nucleo-144/src/stm32_spi.c
+++ b/configs/nucleo-144/src/stm32_spi.c
@@ -3,6 +3,7 @@
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Authors: Gregory Nutt 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -49,29 +50,117 @@
 
 #include "up_arch.h"
 #include "chip.h"
+#include "stm32_gpio.h"
 #include "stm32_spi.h"
 
 #include "nucleo-144.h"
 
-#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \
-    defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \
-    defined(CONFIG_STM32F7_SPI5)
+#if defined(CONFIG_SPI)
 
 /************************************************************************************
  * Pre-processor Definitions
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
+#define ARRAYSIZE(x) (sizeof((x)) / sizeof((x)[0]))
+
+#if defined(CONFIG_NUCLEO_SPI1_TEST)
+#  if defined(CONFIG_NUCLEO_SPI1_TEST_MODE0)
+#    define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE0
+#  elif defined(CONFIG_NUCLEO_SPI1_TEST_MODE1)
+#    define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE1
+#  elif defined(CONFIG_NUCLEO_SPI1_TEST_MODE2)
+#    define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE2
+#  elif defined(CONFIG_NUCLEO_SPI1_TEST_MODE3)
+#    define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE3
 #  else
-#    define spivdbg(x...)
+#    error "No CONFIG_NUCLEO_SPI1_TEST_MODEx defined"
+# endif
+#endif
+
+#if defined(CONFIG_NUCLEO_SPI2_TEST)
+#  if defined(CONFIG_NUCLEO_SPI2_TEST_MODE0)
+#    define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE0
+#  elif defined(CONFIG_NUCLEO_SPI2_TEST_MODE1)
+#    define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE1
+#  elif defined(CONFIG_NUCLEO_SPI2_TEST_MODE2)
+#    define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE2
+#  elif defined(CONFIG_NUCLEO_SPI2_TEST_MODE3)
+#    define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE3
+#  else
+#    error "No CONFIG_NUCLEO_SPI2_TEST_MODEx defined"
+# endif
+#endif
+
+#if defined(CONFIG_NUCLEO_SPI3_TEST)
+#  if defined(CONFIG_NUCLEO_SPI3_TEST_MODE0)
+#    define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE0
+#  elif defined(CONFIG_NUCLEO_SPI3_TEST_MODE1)
+#    define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE1
+#  elif defined(CONFIG_NUCLEO_SPI3_TEST_MODE2)
+#    define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE2
+#  elif defined(CONFIG_NUCLEO_SPI3_TEST_MODE3)
+#    define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE3
+#  else
+#    error "No CONFIG_NUCLEO_SPI3_TEST_MODEx defined"
+# endif
+#endif
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+/* Indexed by NUCLEO_SPI_BUSx_CSx */
+
+static const uint32_t g_spigpio[] =
+{
+#if defined(GPIO_SPI1_CS0)
+ GPIO_SPI1_CS0,
+#endif
+#if defined(GPIO_SPI1_CS1)
+ GPIO_SPI1_CS1,
+#endif
+#if defined(GPIO_SPI1_CS2)
+ GPIO_SPI1_CS2,
+#endif
+#if defined(GPIO_SPI1_CS3)
+ GPIO_SPI1_CS3,
+#endif
+#if defined(GPIO_SPI2_CS0)
+ GPIO_SPI2_CS0,
+#endif
+#if defined(GPIO_SPI2_CS1)
+ GPIO_SPI2_CS1,
+#endif
+#if defined(GPIO_SPI2_CS2)
+ GPIO_SPI2_CS2,
+#endif
+#if defined(GPIO_SPI2_CS3)
+ GPIO_SPI2_CS3,
+#endif
+#if defined(GPIO_SPI3_CS0)
+ GPIO_SPI3_CS0,
+#endif
+#if defined(GPIO_SPI3_CS1)
+ GPIO_SPI3_CS1,
+#endif
+#if defined(GPIO_SPI3_CS2)
+ GPIO_SPI3_CS2,
+#endif
+#if defined(GPIO_SPI3_CS3)
+ GPIO_SPI3_CS3,
+#endif
+};
+
+#if defined(CONFIG_NUCLEO_SPI_TEST)
+#  if defined(CONFIG_STM32F7_SPI1)
+struct spi_dev_s *spi1;
+#  endif
+#  if defined(CONFIG_STM32F7_SPI2)
+struct spi_dev_s *spi2;
+#  endif
+#  if defined(CONFIG_STM32F7_SPI3)
+struct spi_dev_s *spi3;
 #  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
 #endif
 
 /************************************************************************************
@@ -82,12 +171,20 @@
  * Name: stm32_spidev_initialize
  *
  * Description:
- *   Called to configure SPI chip select GPIO pins for the stm32f746g-disco board.
+ *   Called to configure SPI chip select GPIO pins for the Nucleo-144 board.
  *
  ************************************************************************************/
 
 void weak_function stm32_spidev_initialize(void)
 {
+  int i;
+
+  /* Configure SPI CS GPIO for output */
+
+  for (i = 0; i < ARRAYSIZE(g_spigpio); i++)
+    {
+      stm32_configgpio(g_spigpio[i]);
+    }
 }
 
 /****************************************************************************
@@ -118,7 +215,8 @@ void weak_function stm32_spidev_initialize(void)
 #ifdef CONFIG_STM32F7_SPI1
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  stm32_gpiowrite(g_spigpio[devid], !selected);
 }
 
 uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -130,7 +228,8 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32F7_SPI2
 void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  stm32_gpiowrite(g_spigpio[devid], !selected);
 }
 
 uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -142,7 +241,8 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32F7_SPI3
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  stm32_gpiowrite(g_spigpio[devid], !selected);
 }
 
 uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -152,9 +252,14 @@ uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #endif
 
 #ifdef CONFIG_STM32F7_SPI4
+#  ifndef NUCLEO_SPI_BUS4_CS0
+#    error "NUCLEO_SPI_BUS4_CSn Are not defined"
+#  endif
+
 void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  stm32_gpiowrite(g_spigpio[devid], !selected);
 }
 
 uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -164,9 +269,30 @@ uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #endif
 
 #ifdef CONFIG_STM32F7_SPI5
+#  ifndef NUCLEO_SPI_BUS5_CS0
+#    error "NUCLEO_SPI_BUS4_CSn Are not defined"
+#  endif
+
+void stm32_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  stm32_gpiowrite(g_spigpio[devid], !selected);
+}
+
+uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  return 0;
+}
+#endif
+
+#ifdef CONFIG_STM32F7_SPI6
+#  ifndef NUCLEO_SPI_BUS6_CS
+#    error "NUCLEO_SPI_BUS4_CSn Are not defined"
+#  endif
 void stm32_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  stm32_gpiowrite(g_spigpio[devid], !selected);
 }
 
 uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -234,5 +360,74 @@ int stm32_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
 }
 #endif
 
+#ifdef CONFIG_STM32F7_SPI6
+int stm32_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
+{
+  return -ENODEV;
+}
+#endif
+
 #endif /* CONFIG_SPI_CMDDATA */
-#endif /* CONFIG_STM32F7_SPI1 || ... CONFIG_STM32F7_SPI5 */
+
+#if defined(CONFIG_NUCLEO_SPI_TEST)
+int stm32_spidev_bus_test(void)
+{
+  /* Configure and test SPI-*/
+
+  uint8_t *tx = (uint8_t *)CONFIG_NUCLEO_SPI_TEST_MESSAGE;
+
+#if defined(CONFIG_NUCLEO_SPI1_TEST)
+  spi1 = stm32_spibus_initialize(1);
+
+  if (!spi1)
+    {
+      syslog(LOG_ERR, "ERROR Failed to initialize SPI port 1\n");
+      return -ENODEV;
+    }
+
+  /* Default SPI1 to NUCLEO_SPI1_FREQ and mode */
+
+  SPI_SETFREQUENCY(spi1, CONFIG_NUCLEO_SPI1_TEST_FREQ);
+  SPI_SETBITS(spi1, CONFIG_NUCLEO_SPI1_TEST_BITS);
+  SPI_SETMODE(spi1, CONFIG_NUCLEO_SPI1_TEST_MODE);
+  SPI_EXCHANGE(spi1, tx, NULL, ARRAYSIZE(CONFIG_NUCLEO_SPI_TEST_MESSAGE));
+#endif
+
+#if defined(CONFIG_NUCLEO_SPI2_TEST)
+  spi2 = stm32_spibus_initialize(2);
+
+  if (!spi2)
+    {
+      syslog(LOG_ERR, "ERROR Failed to initialize SPI port 2\n");
+      return -ENODEV;
+    }
+
+  /* Default SPI2 to NUCLEO_SPI2_FREQ and mode */
+
+  SPI_SETFREQUENCY(spi2, CONFIG_NUCLEO_SPI2_TEST_FREQ);
+  SPI_SETBITS(spi2, CONFIG_NUCLEO_SPI2_TEST_BITS);
+  SPI_SETMODE(spi2, CONFIG_NUCLEO_SPI2_TEST_MODE);
+  SPI_EXCHANGE(spi2, tx, NULL, ARRAYSIZE(CONFIG_NUCLEO_SPI_TEST_MESSAGE));
+#endif
+
+#if defined(CONFIG_NUCLEO_SPI3_TEST)
+  spi3 = stm32_spibus_initialize(3);
+
+  if (!spi3)
+    {
+      syslog(LOG_ERR, "ERROR Failed to initialize SPI port 2\n");
+      return -ENODEV;
+    }
+
+  /* Default SPI3 to NUCLEO_SPI3_FREQ and mode */
+
+  SPI_SETFREQUENCY(spi3, CONFIG_NUCLEO_SPI3_TEST_FREQ);
+  SPI_SETBITS(spi3, CONFIG_NUCLEO_SPI3_TEST_BITS);
+  SPI_SETMODE(spi3, CONFIG_NUCLEO_SPI3_TEST_MODE);
+  SPI_EXCHANGE(spi3, tx, NULL, ARRAYSIZE(CONFIG_NUCLEO_SPI_TEST_MESSAGE));
+#endif
+
+  return OK;
+}
+#endif /* NUCLEO_SPI_TEST */
+#endif /* defined(CONFIG_SPI) */
diff --git a/configs/nucleo-144/src/stm32_usb.c b/configs/nucleo-144/src/stm32_usb.c
new file mode 100644
index 0000000000000000000000000000000000000000..597570ae1831bfccbf80307475aca496b91f1549
--- /dev/null
+++ b/configs/nucleo-144/src/stm32_usb.c
@@ -0,0 +1,331 @@
+/************************************************************************************
+ * configs//nucleo-144/src/stm32_usb.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *            David Sidrane 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "up_arch.h"
+#include "chip.h"
+#include "stm32_gpio.h"
+#include "stm32_otg.h"
+#include "nucleo-144.h"
+
+#ifdef CONFIG_STM32F7_OTGFS
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST)
+#  define HAVE_USB 1
+#else
+#  warning "CONFIG_STM32_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST"
+#  undef HAVE_USB
+#endif
+
+#ifndef CONFIG_NUCLEO144_USBHOST_PRIO
+#  define CONFIG_NUCLEO144_USBHOST_PRIO 100
+#endif
+
+#ifndef CONFIG_NUCLEO_USBHOST_STACKSIZE
+#  define CONFIG_NUCLEO_USBHOST_STACKSIZE 1024
+#endif
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+#ifdef CONFIG_USBHOST
+static struct usbhost_connection_s *g_usbconn;
+#endif
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: usbhost_waiter
+ *
+ * Description:
+ *   Wait for USB devices to be connected.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_USBHOST
+static int usbhost_waiter(int argc, char *argv[])
+{
+  struct usbhost_hubport_s *hport;
+
+  uinfo("Running\n");
+  for (;;)
+    {
+      /* Wait for the device to change state */
+
+      DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
+      uinfo("%s\n", hport->connected ? "connected" : "disconnected");
+
+      /* Did we just become connected? */
+
+      if (hport->connected)
+        {
+          /* Yes.. enumerate the newly connected device */
+
+          (void)CONN_ENUMERATE(g_usbconn, hport);
+        }
+    }
+
+  /* Keep the compiler from complaining */
+
+  return 0;
+}
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_usbinitialize
+ *
+ * Description:
+ *   Called from stm32_usbinitialize very early in inialization to setup USB-related
+ *   GPIO pins for the nucleo-144 board.
+ *
+ ************************************************************************************/
+
+void stm32_usbinitialize(void)
+{
+  /* The OTG FS has an internal soft pull-up.  No GPIO configuration is required */
+
+  /* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
+
+#ifdef CONFIG_STM32F7_OTGFS
+  stm32_configgpio(GPIO_OTGFS_VBUS);
+  stm32_configgpio(GPIO_OTGFS_PWRON);
+  stm32_configgpio(GPIO_OTGFS_OVER);
+#endif
+}
+
+/***********************************************************************************
+ * Name: stm32_usbhost_initialize
+ *
+ * Description:
+ *   Called at application startup time to initialize the USB host functionality.
+ *   This function will start a thread that will monitor for device
+ *   connection/disconnection events.
+ *
+ ***********************************************************************************/
+
+#ifdef CONFIG_USBHOST
+int stm32_usbhost_initialize(void)
+{
+  int pid;
+#if defined(CONFIG_USBHOST_HUB)    || defined(CONFIG_USBHOST_MSC) || \
+    defined(CONFIG_USBHOST_HIDKBD) || defined(CONFIG_USBHOST_HIDMOUSE)
+  int ret;
+#endif
+
+  /* First, register all of the class drivers needed to support the drivers
+   * that we care about:
+   */
+
+  uinfo("Register class drivers\n");
+
+#ifdef CONFIG_USBHOST_HUB
+  /* Initialize USB hub class support */
+
+  ret = usbhost_hub_initialize();
+  if (ret < 0)
+    {
+      uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_MSC
+  /* Register the USB mass storage class class */
+
+  ret = usbhost_msc_initialize();
+  if (ret != OK)
+    {
+      uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_CDCACM
+  /* Register the CDC/ACM serial class */
+
+  ret = usbhost_cdcacm_initialize();
+  if (ret != OK)
+    {
+      uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_HIDKBD
+  /* Initialize the HID keyboard class */
+
+  ret = usbhost_kbdinit();
+  if (ret != OK)
+    {
+      uerr("ERROR: Failed to register the HID keyboard class\n");
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_HIDMOUSE
+  /* Initialize the HID mouse class */
+
+  ret = usbhost_mouse_init();
+  if (ret != OK)
+    {
+      uerr("ERROR: Failed to register the HID mouse class\n");
+    }
+#endif
+
+  /* Then get an instance of the USB host interface */
+
+  uinfo("Initialize USB host\n");
+  g_usbconn = stm32_otgfshost_initialize(0);
+  if (g_usbconn)
+    {
+      /* Start a thread to handle device connection. */
+
+      uinfo("Start usbhost_waiter\n");
+
+      pid = task_create("usbhost", CONFIG_STM32F4DISCO_USBHOST_PRIO,
+                        CONFIG_STM32F4DISCO_USBHOST_STACKSIZE,
+                        (main_t)usbhost_waiter, (FAR char * const *)NULL);
+      return pid < 0 ? -ENOEXEC : OK;
+    }
+
+  return -ENODEV;
+}
+#endif
+
+/***********************************************************************************
+ * Name: stm32_usbhost_vbusdrive
+ *
+ * Description:
+ *   Enable/disable driving of VBUS 5V output.  This function must be provided be
+ *   each platform that implements the STM32 OTG FS host interface
+ *
+ *   "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
+ *    or, if 5 V are available on the application board, a basic power switch, must
+ *    be added externally to drive the 5 V VBUS line. The external charge pump can
+ *    be driven by any GPIO output. When the application decides to power on VBUS
+ *    using the chosen GPIO, it must also set the port power bit in the host port
+ *    control and status register (PPWR bit in OTG_FS_HPRT).
+ *
+ *   "The application uses this field to control power to this port, and the core
+ *    clears this bit on an overcurrent condition."
+ *
+ * Input Parameters:
+ *   iface - For future growth to handle multiple USB host interface.  Should be zero.
+ *   enable - true: enable VBUS power; false: disable VBUS power
+ *
+ * Returned Value:
+ *   None
+ *
+ ***********************************************************************************/
+
+#ifdef CONFIG_USBHOST
+void stm32_usbhost_vbusdrive(int iface, bool enable)
+{
+  DEBUGASSERT(iface == 0);
+
+  /* Set the Power Switch by driving the active low enable pin */
+
+  stm32_gpiowrite(GPIO_OTGFS_PWRON, !enable);
+}
+#endif
+
+/************************************************************************************
+ * Name: stm32_setup_overcurrent
+ *
+ * Description:
+ *   Setup to receive an interrupt-level callback if an overcurrent condition is
+ *   detected.
+ *
+ * Input Parameter:
+ *   handler - New overcurrent interrupt handler
+ *   arg     - The argument provided for the interrupt handler
+ *
+ * Returned value:
+ *   Zero (OK) is returned on success.  Otherwise, a negated errno value is returned
+ *   to indicate the nature of the failure.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_USBHOST
+int stm32_setup_overcurrent(xcpt_t handler, void *arg)
+{
+  return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler, arg);
+}
+#endif
+
+/************************************************************************************
+ * Name:  stm32_usbsuspend
+ *
+ * Description:
+ *   Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is
+ *   used.  This function is called whenever the USB enters or leaves suspend mode.
+ *   This is an opportunity for the board logic to shutdown clocks, power, etc.
+ *   while the USB is suspended.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_USBDEV
+void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
+{
+  uinfo("resume: %d\n", resume);
+}
+#endif
+
+#endif /* CONFIG_STM32_OTGFS */
diff --git a/configs/nucleo-144/src/stm32_userleds.c b/configs/nucleo-144/src/stm32_userleds.c
index 4ec9f209479e6a94dadd9b3171fd44c5163c8b86..53e8f809dba25e232ce11cc861a7893ba8b29b16 100644
--- a/configs/nucleo-144/src/stm32_userleds.c
+++ b/configs/nucleo-144/src/stm32_userleds.c
@@ -2,8 +2,9 @@
  * configs/nucleo-144/src/stm32_userleds.c
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
- *   Author: Mark Olsson 
+ *   Authors: Gregory Nutt 
+ *            Mark Olsson 
+ *            David Sidrane 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -43,6 +44,7 @@
 #include 
 #include 
 
+#include 
 #include 
 
 #include "stm32_gpio.h"
@@ -54,27 +56,21 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
+#define ARRAYSIZE(x) (sizeof((x)) / sizeof((x)[0]))
 
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
-/* This array maps an LED number to GPIO pin configuration */
+/* This array maps an LED number to GPIO pin configuration and is indexed by
+ * BOARD_LED_
+ */
 
-static const uint32_t g_ledcfg[3] =
+static const uint32_t g_ledcfg[BOARD_NLEDS] =
 {
-  GPIO_LD1, GPIO_LD2, GPIO_LD3
+  GPIO_LED_GREEN,
+  GPIO_LED_BLUE,
+  GPIO_LED_RED,
 };
 
 /****************************************************************************
@@ -98,7 +94,7 @@ void board_userled_initialize(void)
 
   /* Configure LED1-3 GPIOs for output */
 
-  for (i = 0; i < 3; i++)
+  for (i = 0; i < ARRAYSIZE(g_ledcfg); i++)
     {
       stm32_configgpio(g_ledcfg[i]);
     }
@@ -116,10 +112,10 @@ void board_userled_initialize(void)
 
 void board_userled(int led, bool ledon)
 {
-  if ((unsigned)led < 3)
-  {
-    stm32_gpiowrite(g_ledcfg[led], ledon);
-  }
+  if ((unsigned)led < ARRAYSIZE(g_ledcfg))
+    {
+      stm32_gpiowrite(g_ledcfg[led], ledon);
+    }
 }
 
 /****************************************************************************
@@ -139,7 +135,7 @@ void board_userled_all(uint8_t ledset)
 
   /* Configure LED1-3 GPIOs for output */
 
-  for (i = 0; i < 3; i++)
+  for (i = 0; i < ARRAYSIZE(g_ledcfg); i++)
     {
       stm32_gpiowrite(g_ledcfg[i], (ledset & (1 << i)) != 0);
     }
diff --git a/configs/nucleo-f303re/adc/Make.defs b/configs/nucleo-f303re/adc/Make.defs
index 2b8c2b19e5e2de45de05a59e13926ce5665a6aa8..eed28984cafc62fdd844c5d25b9fd247e136a4bb 100644
--- a/configs/nucleo-f303re/adc/Make.defs
+++ b/configs/nucleo-f303re/adc/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/nucleo-f303re/adc/defconfig b/configs/nucleo-f303re/adc/defconfig
index 4a26a328f99fe129cb3ef245df2db8bbfbf0f13b..a41ff93ab738706c9fdf840d31ff6509caf6fd06 100644
--- a/configs/nucleo-f303re/adc/defconfig
+++ b/configs/nucleo-f303re/adc/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +61,11 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +75,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +201,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -346,6 +349,12 @@ CONFIG_STM32_HAVE_ADC1_DMA=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 CONFIG_STM32_HAVE_DAC1=y
@@ -415,6 +424,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 CONFIG_STM32_CCMEXCLUDE=y
 # CONFIG_STM32_DMACAPABLE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -423,7 +438,7 @@ CONFIG_STM32_CCMEXCLUDE=y
 #
 # ADC Configuration
 #
-CONFIG_STM32_ADC1_DMA=y
+# CONFIG_STM32_ADC1_DMA is not set
 # CONFIG_STM32_HAVE_RTC_COUNTER is not set
 # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
 
@@ -521,12 +536,11 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-CONFIG_BOARDCTL_ADCTEST=y
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -543,9 +557,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=1
@@ -638,6 +655,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -653,12 +671,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_ANALOG=y
@@ -673,8 +695,18 @@ CONFIG_ADC_FIFOSIZE=8
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -682,6 +714,7 @@ CONFIG_ADC_FIFOSIZE=8
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -690,20 +723,25 @@ CONFIG_ADC_FIFOSIZE=8
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 # CONFIG_SERIAL is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_NONE=y
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -740,12 +778,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -795,6 +827,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -810,7 +844,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -818,8 +851,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -844,18 +879,18 @@ CONFIG_EXAMPLES_ADC_NSAMPLES=0
 CONFIG_EXAMPLES_ADC_GROUPSIZE=4
 CONFIG_EXAMPLES_ADC_SWTRIG=y
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -863,21 +898,19 @@ CONFIG_EXAMPLES_ADC_SWTRIG=y
 # CONFIG_EXAMPLES_NRF24L01TERM is not set
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -889,10 +922,10 @@ CONFIG_EXAMPLES_ADC_SWTRIG=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -914,8 +947,9 @@ CONFIG_EXAMPLES_ADC_SWTRIG=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -948,16 +982,17 @@ CONFIG_EXAMPLES_ADC_SWTRIG=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/nucleo-f303re/can/Make.defs b/configs/nucleo-f303re/can/Make.defs
index ddfedd784105796f2366c483ab4b4893d9370537..25136caf5d09cab2bd4d931fdc4540fe72f2bfde 100644
--- a/configs/nucleo-f303re/can/Make.defs
+++ b/configs/nucleo-f303re/can/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/nucleo-f303re/can/defconfig b/configs/nucleo-f303re/can/defconfig
index 3fe7a7e6ffde2ab2413197885a4b125a1273c6a2..24b603e9e7896c2e4b2134091532090d7156bf48 100644
--- a/configs/nucleo-f303re/can/defconfig
+++ b/configs/nucleo-f303re/can/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +61,11 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +75,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -204,6 +206,7 @@ CONFIG_CAN_TSEG2=7
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -351,6 +354,12 @@ CONFIG_STM32_HAVE_ADC4=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 CONFIG_STM32_HAVE_DAC1=y
@@ -419,6 +428,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -524,13 +539,11 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
-CONFIG_BOARDCTL_CANINIT=y
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -547,9 +560,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=1
@@ -642,6 +658,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -662,12 +679,16 @@ CONFIG_CAN_NPENDINGRTR=4
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -675,8 +696,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -684,6 +715,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -692,20 +724,25 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 # CONFIG_SERIAL is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_NONE=y
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -742,12 +779,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -797,6 +828,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -812,7 +845,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -820,8 +852,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -836,6 +870,7 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # CAN Utilities
 #
+# CONFIG_CANUTILS_CANLIB is not set
 
 #
 # Examples
@@ -846,18 +881,18 @@ CONFIG_EXAMPLES_CAN_DEVPATH="/dev/can0"
 # CONFIG_EXAMPLES_CAN_READ is not set
 # CONFIG_EXAMPLES_CAN_WRITE is not set
 CONFIG_EXAMPLES_CAN_READWRITE=y
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -865,21 +900,19 @@ CONFIG_EXAMPLES_CAN_READWRITE=y
 # CONFIG_EXAMPLES_NRF24L01TERM is not set
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -891,10 +924,10 @@ CONFIG_EXAMPLES_CAN_READWRITE=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -916,8 +949,9 @@ CONFIG_EXAMPLES_CAN_READWRITE=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -950,16 +984,17 @@ CONFIG_EXAMPLES_CAN_READWRITE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/nucleo-144/evalos/Make.defs b/configs/nucleo-f303re/hello/Make.defs
similarity index 96%
rename from configs/nucleo-144/evalos/Make.defs
rename to configs/nucleo-f303re/hello/Make.defs
index 210c5ff0743db9315d6939deaf18515b3c934dcb..e6c2bdd70e096395d346350e7b4ac8ccc38c74b4 100644
--- a/configs/nucleo-144/evalos/Make.defs
+++ b/configs/nucleo-f303re/hello/Make.defs
@@ -1,9 +1,8 @@
 ############################################################################
-# configs/nucleo-144/evalos/Make.defs
+# configs/nucleo-f303re/hello/Make.defs
 #
 #   Copyright (C) 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
-#   Author: Mark Olsson 
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions
@@ -38,7 +37,7 @@ include ${TOPDIR}/.config
 include ${TOPDIR}/tools/Config.mk
 include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
 
-LDSCRIPT = flash.ld
+LDSCRIPT = ld.script
 
 ifeq ($(WINTOOL),y)
   # Windows-native toolchains
@@ -77,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
@@ -111,3 +110,4 @@ HOSTCC = gcc
 HOSTINCLUDES = -I.
 HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
 HOSTLDFLAGS =
+
diff --git a/configs/hymini-stm32v/buttons/defconfig b/configs/nucleo-f303re/hello/defconfig
similarity index 84%
rename from configs/hymini-stm32v/buttons/defconfig
rename to configs/nucleo-f303re/hello/defconfig
index 3141e0c160594740550ed8e9aa98a8ef5bd87d02..3be4d72fb863ad3014a1b18ce0a7ad13a5ec179c 100644
--- a/configs/hymini-stm32v/buttons/defconfig
+++ b/configs/nucleo-f303re/hello/defconfig
@@ -24,7 +24,7 @@ CONFIG_BUILD_FLAT=y
 # Binary Output Formats
 #
 # CONFIG_RRLOAD_BINARY is not set
-# CONFIG_INTELHEX_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
 # CONFIG_MOTOROLA_SREC is not set
 CONFIG_RAW_BINARY=y
 # CONFIG_UBOOT_UIMAGE is not set
@@ -42,15 +42,17 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
-# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
-# CONFIG_DEBUG_NOOPT is not set
+CONFIG_DEBUG_NOOPT=y
 # CONFIG_DEBUG_CUSTOMOPT is not set
-CONFIG_DEBUG_FULLOPT=y
+# CONFIG_DEBUG_FULLOPT is not set
 
 #
 # System Type
@@ -59,10 +61,11 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +75,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -103,8 +105,8 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
-CONFIG_ARCH_CORTEXM3=y
-# CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
@@ -123,8 +125,9 @@ CONFIG_ARM_TOOLCHAIN_GNU=y
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
-# CONFIG_ARCH_HAVE_FPU is not set
+CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_FPU is not set
 # CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
@@ -195,10 +198,11 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103RG is not set
 # CONFIG_ARCH_CHIP_STM32F103V8 is not set
 # CONFIG_ARCH_CHIP_STM32F103VB is not set
-CONFIG_ARCH_CHIP_STM32F103VC=y
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -220,7 +224,7 @@ CONFIG_ARCH_CHIP_STM32F103VC=y
 # CONFIG_ARCH_CHIP_STM32F303RB is not set
 # CONFIG_ARCH_CHIP_STM32F303RC is not set
 # CONFIG_ARCH_CHIP_STM32F303RD is not set
-# CONFIG_ARCH_CHIP_STM32F303RE is not set
+CONFIG_ARCH_CHIP_STM32F303RE=y
 # CONFIG_ARCH_CHIP_STM32F303VB is not set
 # CONFIG_ARCH_CHIP_STM32F303VC is not set
 # CONFIG_ARCH_CHIP_STM32F372C8 is not set
@@ -282,20 +286,20 @@ CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
 # CONFIG_STM32_FLASH_CONFIG_I is not set
 # CONFIG_STM32_STM32L15XX is not set
 # CONFIG_STM32_ENERGYLITE is not set
-CONFIG_STM32_STM32F10XX=y
+# CONFIG_STM32_STM32F10XX is not set
 # CONFIG_STM32_VALUELINE is not set
 # CONFIG_STM32_CONNECTIVITYLINE is not set
-CONFIG_STM32_PERFORMANCELINE=y
+# CONFIG_STM32_PERFORMANCELINE is not set
 # CONFIG_STM32_USBACCESSLINE is not set
-CONFIG_STM32_HIGHDENSITY=y
+# CONFIG_STM32_HIGHDENSITY is not set
 # CONFIG_STM32_MEDIUMDENSITY is not set
 # CONFIG_STM32_LOWDENSITY is not set
 # CONFIG_STM32_STM32F20XX is not set
 # CONFIG_STM32_STM32F205 is not set
 # CONFIG_STM32_STM32F207 is not set
-# CONFIG_STM32_STM32F30XX is not set
+CONFIG_STM32_STM32F30XX=y
 # CONFIG_STM32_STM32F302 is not set
-# CONFIG_STM32_STM32F303 is not set
+CONFIG_STM32_STM32F303=y
 # CONFIG_STM32_STM32F37XX is not set
 # CONFIG_STM32_STM32F40XX is not set
 # CONFIG_STM32_STM32F401 is not set
@@ -311,10 +315,10 @@ CONFIG_STM32_HIGHDENSITY=y
 #
 # STM32 Peripheral Support
 #
-# CONFIG_STM32_HAVE_CCM is not set
+CONFIG_STM32_HAVE_CCM=y
 CONFIG_STM32_HAVE_USBDEV=y
 # CONFIG_STM32_HAVE_OTGFS is not set
-CONFIG_STM32_HAVE_FSMC=y
+# CONFIG_STM32_HAVE_FSMC is not set
 # CONFIG_STM32_HAVE_LTDC is not set
 CONFIG_STM32_HAVE_USART3=y
 CONFIG_STM32_HAVE_UART4=y
@@ -326,7 +330,7 @@ CONFIG_STM32_HAVE_TIM1=y
 # CONFIG_STM32_HAVE_TIM2 is not set
 CONFIG_STM32_HAVE_TIM3=y
 CONFIG_STM32_HAVE_TIM4=y
-CONFIG_STM32_HAVE_TIM5=y
+# CONFIG_STM32_HAVE_TIM5 is not set
 CONFIG_STM32_HAVE_TIM6=y
 CONFIG_STM32_HAVE_TIM7=y
 CONFIG_STM32_HAVE_TIM8=y
@@ -336,16 +340,22 @@ CONFIG_STM32_HAVE_TIM8=y
 # CONFIG_STM32_HAVE_TIM12 is not set
 # CONFIG_STM32_HAVE_TIM13 is not set
 # CONFIG_STM32_HAVE_TIM14 is not set
-# CONFIG_STM32_HAVE_TIM15 is not set
-# CONFIG_STM32_HAVE_TIM16 is not set
-# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_TIM15=y
+CONFIG_STM32_HAVE_TIM16=y
+CONFIG_STM32_HAVE_TIM17=y
 CONFIG_STM32_HAVE_ADC2=y
 CONFIG_STM32_HAVE_ADC3=y
-# CONFIG_STM32_HAVE_ADC4 is not set
+CONFIG_STM32_HAVE_ADC4=y
 # CONFIG_STM32_HAVE_ADC1_DMA is not set
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 CONFIG_STM32_HAVE_DAC1=y
@@ -353,10 +363,10 @@ CONFIG_STM32_HAVE_DAC2=y
 # CONFIG_STM32_HAVE_RNG is not set
 # CONFIG_STM32_HAVE_ETHMAC is not set
 CONFIG_STM32_HAVE_I2C2=y
-# CONFIG_STM32_HAVE_I2C3 is not set
+CONFIG_STM32_HAVE_I2C3=y
 CONFIG_STM32_HAVE_SPI2=y
 CONFIG_STM32_HAVE_SPI3=y
-# CONFIG_STM32_HAVE_SPI4 is not set
+CONFIG_STM32_HAVE_SPI4=y
 # CONFIG_STM32_HAVE_SPI5 is not set
 # CONFIG_STM32_HAVE_SPI6 is not set
 # CONFIG_STM32_HAVE_SAIPLL is not set
@@ -364,31 +374,36 @@ CONFIG_STM32_HAVE_SPI3=y
 # CONFIG_STM32_ADC1 is not set
 # CONFIG_STM32_ADC2 is not set
 # CONFIG_STM32_ADC3 is not set
-# CONFIG_STM32_BKP is not set
+# CONFIG_STM32_ADC4 is not set
 # CONFIG_STM32_CAN1 is not set
 # CONFIG_STM32_CRC is not set
 # CONFIG_STM32_DMA1 is not set
 # CONFIG_STM32_DMA2 is not set
 # CONFIG_STM32_DAC1 is not set
 # CONFIG_STM32_DAC2 is not set
-# CONFIG_STM32_FSMC is not set
 # CONFIG_STM32_I2C1 is not set
 # CONFIG_STM32_I2C2 is not set
-CONFIG_STM32_PWR=y
+# CONFIG_STM32_I2C3 is not set
+# CONFIG_STM32_PWR is not set
 # CONFIG_STM32_SDIO is not set
 # CONFIG_STM32_SPI1 is not set
 # CONFIG_STM32_SPI2 is not set
 # CONFIG_STM32_SPI3 is not set
+# CONFIG_STM32_SPI4 is not set
+CONFIG_STM32_SYSCFG=y
 # CONFIG_STM32_TIM1 is not set
 # CONFIG_STM32_TIM2 is not set
 # CONFIG_STM32_TIM3 is not set
 # CONFIG_STM32_TIM4 is not set
-# CONFIG_STM32_TIM5 is not set
 # CONFIG_STM32_TIM6 is not set
 # CONFIG_STM32_TIM7 is not set
 # CONFIG_STM32_TIM8 is not set
-CONFIG_STM32_USART1=y
-# CONFIG_STM32_USART2 is not set
+# CONFIG_STM32_TIM15 is not set
+# CONFIG_STM32_TIM16 is not set
+# CONFIG_STM32_TIM17 is not set
+# CONFIG_STM32_TSC is not set
+# CONFIG_STM32_USART1 is not set
+CONFIG_STM32_USART2=y
 # CONFIG_STM32_USART3 is not set
 # CONFIG_STM32_UART4 is not set
 # CONFIG_STM32_UART5 is not set
@@ -400,18 +415,23 @@ CONFIG_STM32_USART1=y
 #
 # Alternate Pin Mapping
 #
-# CONFIG_STM32_USART1_REMAP is not set
-CONFIG_STM32_JTAG_DISABLE=y
+# CONFIG_STM32_JTAG_DISABLE is not set
 # CONFIG_STM32_JTAG_FULL_ENABLE is not set
 # CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
-# CONFIG_STM32_JTAG_SW_ENABLE is not set
+CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
-# CONFIG_STM32_TIM5_CAP is not set
 # CONFIG_STM32_TIM8_CAP is not set
 CONFIG_STM32_USART=y
 CONFIG_STM32_SERIALDRIVER=y
@@ -419,14 +439,22 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
-CONFIG_STM32_USART1_SERIALDRIVER=y
-# CONFIG_STM32_USART1_1WIREDRIVER is not set
-# CONFIG_USART1_RS485 is not set
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
+# CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
 # CONFIG_STM32_USART_SINGLEWIRE is not set
-CONFIG_STM32_HAVE_RTC_COUNTER=y
+# CONFIG_STM32_HAVE_RTC_COUNTER is not set
 # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
 
 #
@@ -476,7 +504,7 @@ CONFIG_ARCH_HAVE_RAMVECTORS=y
 #
 # Board Settings
 #
-CONFIG_BOARD_LOOPSPERMSEC=5483
+CONFIG_BOARD_LOOPSPERMSEC=6522
 # CONFIG_ARCH_CALIBRATION is not set
 
 #
@@ -500,16 +528,15 @@ CONFIG_BOOT_RUNFROMFLASH=y
 # Boot Memory Configuration
 #
 CONFIG_RAM_START=0x20000000
-CONFIG_RAM_SIZE=49152
+CONFIG_RAM_SIZE=65536
 # CONFIG_ARCH_HAVE_SDRAM is not set
 
 #
 # Board Selection
 #
-CONFIG_ARCH_BOARD_HYMINI_STM32V=y
-# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set
+CONFIG_ARCH_BOARD_NUCLEO_F303RE=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
-CONFIG_ARCH_BOARD="hymini-stm32v"
+CONFIG_ARCH_BOARD="nucleo-f303re"
 
 #
 # Common Board Options
@@ -519,11 +546,12 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_ARCH_IRQBUTTONS=y
+# CONFIG_ARCH_IRQBUTTONS is not set
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -539,16 +567,19 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
-CONFIG_START_YEAR=2011
-CONFIG_START_MONTH=7
-CONFIG_START_DAY=5
+CONFIG_START_YEAR=2013
+CONFIG_START_MONTH=1
+CONFIG_START_DAY=27
 CONFIG_MAX_WDOGPARMS=2
-CONFIG_PREALLOC_WDOGS=4
-CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_WDOGS=8
+CONFIG_WDOG_INTRESERVE=1
 CONFIG_PREALLOC_TIMERS=4
 
 #
@@ -556,7 +587,8 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
-CONFIG_USER_ENTRYPOINT="buttons_main"
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="hello_main"
 CONFIG_RR_INTERVAL=200
 # CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
@@ -595,7 +627,6 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
-# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -604,7 +635,6 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
-CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
@@ -616,17 +646,14 @@ CONFIG_MQ_MAXMSGSIZE=32
 #
 # Work queue support
 #
-CONFIG_SCHED_WORKQUEUE=y
-CONFIG_SCHED_HPWORK=y
-CONFIG_SCHED_HPWORKPRIORITY=192
-CONFIG_SCHED_HPWORKPERIOD=50000
-CONFIG_SCHED_HPWORKSTACKSIZE=1024
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
 # CONFIG_SCHED_LPWORK is not set
 
 #
 # Stack and heap information
 #
-CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_IDLETHREAD_STACKSIZE=2048
 CONFIG_USERMAIN_STACKSIZE=2048
 CONFIG_PTHREAD_STACK_MIN=256
 CONFIG_PTHREAD_STACK_DEFAULT=2048
@@ -638,6 +665,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -653,12 +681,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -666,8 +698,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -675,6 +717,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -683,9 +726,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -700,8 +744,8 @@ CONFIG_SERIAL=y
 # CONFIG_SCI0_SERIALDRIVER is not set
 # CONFIG_SCI1_SERIALDRIVER is not set
 # CONFIG_USART0_SERIALDRIVER is not set
-CONFIG_USART1_SERIALDRIVER=y
-# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
 # CONFIG_USART3_SERIALDRIVER is not set
 # CONFIG_USART4_SERIALDRIVER is not set
 # CONFIG_USART5_SERIALDRIVER is not set
@@ -715,35 +759,43 @@ CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
-CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART2_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
 
 #
-# USART1 Configuration
+# USART2 Configuration
 #
-CONFIG_USART1_RXBUFSIZE=256
-CONFIG_USART1_TXBUFSIZE=256
-CONFIG_USART1_BAUD=115200
-CONFIG_USART1_BITS=8
-CONFIG_USART1_PARITY=0
-CONFIG_USART1_2STOP=0
-# CONFIG_USART1_IFLOWCONTROL is not set
-# CONFIG_USART1_OFLOWCONTROL is not set
-# CONFIG_USART1_DMA is not set
+CONFIG_USART2_RXBUFSIZE=256
+CONFIG_USART2_TXBUFSIZE=256
+CONFIG_USART2_BAUD=115200
+CONFIG_USART2_BITS=8
+CONFIG_USART2_PARITY=0
+CONFIG_USART2_2STOP=0
+# CONFIG_USART2_IFLOWCONTROL is not set
+# CONFIG_USART2_OFLOWCONTROL is not set
+# CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
 # CONFIG_SYSLOG_CONSOLE is not set
+CONFIG_SYSLOG_NONE=y
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -780,12 +832,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -795,7 +841,7 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # Memory Management
 #
 # CONFIG_MM_SMALL is not set
-CONFIG_MM_REGIONS=1
+CONFIG_MM_REGIONS=2
 # CONFIG_ARCH_HAVE_HEAP2 is not set
 # CONFIG_GRAN is not set
 
@@ -811,9 +857,13 @@ CONFIG_MM_REGIONS=1
 #
 # Binary Loader
 #
-CONFIG_BINFMT_DISABLE=y
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+# CONFIG_BUILTIN is not set
 # CONFIG_PIC is not set
-CONFIG_SYMTAB_ORDEREDBYNAME=y
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
 
 #
 # Library Routines
@@ -831,11 +881,14 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
 # CONFIG_EOL_IS_BOTH_CRLF is not set
 CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
 CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
 CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_STRERROR is not set
@@ -845,7 +898,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -853,8 +905,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -873,31 +927,21 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Examples
 #
-CONFIG_EXAMPLES_BUTTONS=y
-CONFIG_EXAMPLES_BUTTONS_MIN=0
-CONFIG_EXAMPLES_BUTTONS_MAX=1
-CONFIG_EXAMPLES_IRQBUTTONS_MIN=0
-CONFIG_EXAMPLES_IRQBUTTONS_MAX=1
-CONFIG_EXAMPLES_BUTTONS_NAME0="Key A"
-CONFIG_EXAMPLES_BUTTONS_NAME1="Key B"
-CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2"
-CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3"
-CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4"
-CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5"
-CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6"
-CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
-# CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
+CONFIG_EXAMPLES_HELLO=y
+CONFIG_EXAMPLES_HELLO_PRIORITY=100
+CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -905,21 +949,19 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
 # CONFIG_EXAMPLES_NRF24L01TERM is not set
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -931,9 +973,9 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -955,8 +997,9 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -989,18 +1032,17 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
-CONFIG_SYSTEM_READLINE=y
-CONFIG_READLINE_ECHO=y
-# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/nucleo-f303re/include/board.h b/configs/nucleo-f303re/include/board.h
index c645b46b8082d332416a9eb0d7e000b4d17638aa..0960f3e6b0af8ecd2cbdad27c2319c5bd8727584 100644
--- a/configs/nucleo-f303re/include/board.h
+++ b/configs/nucleo-f303re/include/board.h
@@ -2,7 +2,7 @@
  * configs/nucleo-f303re/include/board.h
  * include/arch/board/board.h
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved.
  *   Authors: Gregory Nutt 
  *            Paul Alexander Patience 
@@ -96,13 +96,14 @@
 
 #define STM32_RCC_CFGR_PPRE2    RCC_CFGR_PPRE2_HCLK
 #define STM32_PCLK2_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_APB2_CLKIN        (STM32_PCLK2_FREQUENCY)   /* Timers 2-7, 12-14 */
+#define STM32_APB2_CLKIN        (STM32_PCLK2_FREQUENCY)   /* Timers 1 and 8, 15-17 */
 
-/* APB2 timers 1 and 8 will receive PCLK2. */
+/* APB2 timers 1 and 8, 15-17 will receive PCLK2. */
+
+/* Timers driven from APB2 will be PCLK2 */
 
 #define STM32_APB2_TIM1_CLKIN   (STM32_PCLK2_FREQUENCY)
 #define STM32_APB2_TIM8_CLKIN   (STM32_PCLK2_FREQUENCY)
-
 #define STM32_APB1_TIM15_CLKIN  (STM32_PCLK2_FREQUENCY)
 #define STM32_APB1_TIM16_CLKIN  (STM32_PCLK2_FREQUENCY)
 #define STM32_APB1_TIM17_CLKIN  (STM32_PCLK2_FREQUENCY)
@@ -112,50 +113,31 @@
 #define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd2
 #define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
 
-/* APB1 timers 2-4 will be twice PCLK1 (REVISIT) */
+/* APB1 timers 2-7 will be twice PCLK1 */
 
 #define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM6_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM7_CLKIN   (STM32_PCLK1_FREQUENCY)
-
-/* USB divider -- Divide PLL clock by 1.5 */
-
-#define STM32_CFGR_USBPRE       0
-
-/* Timers driven from APB1 will be twice PCLK1 */
-
-#define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM12_CLKIN  (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM13_CLKIN  (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM14_CLKIN  (2*STM32_PCLK1_FREQUENCY)
-
-/* APB2 clock (PCLK2) is HCLK/2 (84MHz) */
 
-#define STM32_RCC_CFGR_PPRE2    RCC_CFGR_PPRE2_HCLKd2     /* PCLK2 = HCLK / 2 */
-#define STM32_PCLK2_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
-
-/* Timers driven from APB2 will be twice PCLK2 */
+/* USB divider -- Divide PLL clock by 1.5 */
 
-#define STM32_APB2_TIM1_CLKIN   (2*STM32_PCLK2_FREQUENCY)
-#define STM32_APB2_TIM8_CLKIN   (2*STM32_PCLK2_FREQUENCY)
-#define STM32_APB2_TIM9_CLKIN   (2*STM32_PCLK2_FREQUENCY)
-#define STM32_APB2_TIM10_CLKIN  (2*STM32_PCLK2_FREQUENCY)
-#define STM32_APB2_TIM11_CLKIN  (2*STM32_PCLK2_FREQUENCY)
+#define STM32_CFGR_USBPRE       0
 
 /* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
  * otherwise frequency is 2xAPBx.
  * Note: TIM1,8 are on APB2, others on APB1
  */
 
-#define STM32_TIM18_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_TIM27_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
+#define BOARD_TIM1_FREQUENCY   STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY   (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM3_FREQUENCY   (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM4_FREQUENCY   (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM5_FREQUENCY   (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM6_FREQUENCY   (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM7_FREQUENCY   (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM8_FREQUENCY   STM32_HCLK_FREQUENCY
 
 /* LED definitions **********************************************************/
 /* The Nucleo F303RE board has three LEDs.  Two of these are controlled by
diff --git a/configs/nucleo-f303re/nxlines/Make.defs b/configs/nucleo-f303re/nxlines/Make.defs
index 5364ea4d45192c2bbed47aa2aa412ee65a16a055..21739b986a9b94186bd44bb688b7431df3558b67 100644
--- a/configs/nucleo-f303re/nxlines/Make.defs
+++ b/configs/nucleo-f303re/nxlines/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/nucleo-f303re/nxlines/defconfig b/configs/nucleo-f303re/nxlines/defconfig
index 6ea676faa0e0efd12555fa8973f79039d7145851..b71b66ebff165fd49ce0416431e47d4bcec9ff5b 100644
--- a/configs/nucleo-f303re/nxlines/defconfig
+++ b/configs/nucleo-f303re/nxlines/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +61,11 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +75,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -201,6 +203,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -348,6 +351,12 @@ CONFIG_STM32_HAVE_ADC4=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 CONFIG_STM32_HAVE_DAC1=y
@@ -416,6 +425,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -523,13 +538,11 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
-# CONFIG_BOARDCTL_CANINIT is not set
 CONFIG_BOARDCTL_GRAPHICS=y
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -546,9 +559,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=1
@@ -641,6 +657,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -661,19 +678,25 @@ CONFIG_CAN_NPENDINGRTR=4
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 CONFIG_SPI_CMDDATA=y
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -681,11 +704,20 @@ CONFIG_SPI_CMDDATA=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 # CONFIG_LCD_NOGETRUN is not set
@@ -700,6 +732,7 @@ CONFIG_LCD_MAXPOWER=1
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
 # CONFIG_LCD_UG9664HSWAG01 is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 CONFIG_LCD_SSD1351=y
@@ -738,11 +771,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -750,6 +779,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -758,24 +788,29 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 # CONFIG_SERIAL is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 CONFIG_RAMLOG=y
-CONFIG_RAMLOG_SYSLOG=y
 CONFIG_RAMLOG_BUFSIZE=1024
 # CONFIG_RAMLOG_CRLF is not set
 CONFIG_RAMLOG_NONBLOCKING=y
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_RAMLOG_SYSLOG=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -812,13 +847,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-# CONFIG_SYSLOG_CHAR is not set
-
 #
 # Graphics Support
 #
@@ -954,6 +982,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -969,7 +999,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -977,8 +1006,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -993,24 +1024,25 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # CAN Utilities
 #
+# CONFIG_CANUTILS_CANLIB is not set
 
 #
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
 # CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -1019,11 +1051,10 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_NRF24L01TERM is not set
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
 CONFIG_EXAMPLES_NXLINES=y
 CONFIG_EXAMPLES_NXLINES_VPLANE=0
 CONFIG_EXAMPLES_NXLINES_DEVNO=0
@@ -1032,15 +1063,14 @@ CONFIG_EXAMPLES_NXLINES_LINEWIDTH=16
 CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=16
 CONFIG_EXAMPLES_NXLINES_BPP=8
 CONFIG_EXAMPLES_NXLINES_EXTERNINIT=y
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1052,10 +1082,10 @@ CONFIG_EXAMPLES_NXLINES_EXTERNINIT=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1077,8 +1107,9 @@ CONFIG_EXAMPLES_NXLINES_EXTERNINIT=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1111,16 +1142,17 @@ CONFIG_EXAMPLES_NXLINES_EXTERNINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/nucleo-f303re/pwm/Make.defs b/configs/nucleo-f303re/pwm/Make.defs
index 4149c69beac17968a4b0d4ed4dd30f683300ab6d..f6b4c964af570c8b3e4c9eddc84be0c1a119fc8a 100644
--- a/configs/nucleo-f303re/pwm/Make.defs
+++ b/configs/nucleo-f303re/pwm/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/nucleo-f303re/pwm/defconfig b/configs/nucleo-f303re/pwm/defconfig
index 08973aff2a7ac5f620b3dcda993341756f1ee02d..43c1974e8c549b7d332f33db5fc5ddf09ad74071 100644
--- a/configs/nucleo-f303re/pwm/defconfig
+++ b/configs/nucleo-f303re/pwm/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +61,11 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +75,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +201,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -346,6 +349,12 @@ CONFIG_STM32_HAVE_ADC4=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 CONFIG_STM32_HAVE_DAC1=y
@@ -413,6 +422,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 CONFIG_STM32_TIM3_PWM=y
 CONFIG_STM32_TIM3_MODE=0
 CONFIG_STM32_TIM3_CHANNEL1=y
@@ -521,17 +536,15 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-CONFIG_BOARDCTL_PWMTEST=y
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -548,9 +561,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=1
@@ -643,6 +659,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -661,12 +678,16 @@ CONFIG_PWM_NCHANNELS=2
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -674,8 +695,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -683,6 +714,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -691,24 +723,29 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 # CONFIG_SERIAL is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 CONFIG_RAMLOG=y
-CONFIG_RAMLOG_SYSLOG=y
 CONFIG_RAMLOG_BUFSIZE=1024
 # CONFIG_RAMLOG_CRLF is not set
 CONFIG_RAMLOG_NONBLOCKING=y
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_RAMLOG_SYSLOG=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -746,13 +783,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-# CONFIG_SYSLOG_CHAR is not set
-
 #
 # Graphics Support
 #
@@ -802,6 +832,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -817,7 +849,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -825,8 +856,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -851,18 +884,18 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -870,16 +903,16 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_NRF24L01TERM is not set
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_PPPD is not set
 CONFIG_EXAMPLES_PWM=y
 CONFIG_EXAMPLES_PWM_DEVPATH="/dev/pwm0"
@@ -889,25 +922,24 @@ CONFIG_EXAMPLES_PWM_DUTYPCT1=50
 CONFIG_EXAMPLES_PWM_CHANNEL1=1
 CONFIG_EXAMPLES_PWM_DUTYPCT2=50
 CONFIG_EXAMPLES_PWM_CHANNEL2=2
-# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -929,8 +961,9 @@ CONFIG_EXAMPLES_PWM_CHANNEL2=2
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -995,12 +1028,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1017,6 +1050,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1054,17 +1088,19 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 CONFIG_SYSTEM_CLE=y
 CONFIG_SYSTEM_CLE_DEBUGLEVEL=0
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/nucleo-f303re/serialrx/Make.defs b/configs/nucleo-f303re/serialrx/Make.defs
index f0190d2363c9ac2a687727e149e2b53a3ee3cf29..ec3b25496fed012fdd657339524cb0dbe3d4e28b 100644
--- a/configs/nucleo-f303re/serialrx/Make.defs
+++ b/configs/nucleo-f303re/serialrx/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/nucleo-f303re/serialrx/defconfig b/configs/nucleo-f303re/serialrx/defconfig
index 2203ccbe87e82080f8fa63cc00d2504690cd9f46..f0fd022de7b4726c3d57d4d41f53a1562e8d9d3e 100644
--- a/configs/nucleo-f303re/serialrx/defconfig
+++ b/configs/nucleo-f303re/serialrx/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -200,6 +200,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -414,6 +415,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -424,9 +431,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_UART4_SERIALDRIVER=y
 # CONFIG_STM32_UART4_1WIREDRIVER is not set
 # CONFIG_UART4_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -528,12 +543,11 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-CONFIG_BOARDCTL_ADCTEST=y
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -550,9 +564,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=1
@@ -645,6 +662,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -660,6 +678,7 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
@@ -680,8 +699,18 @@ CONFIG_ADC_FIFOSIZE=8
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -689,6 +718,7 @@ CONFIG_ADC_FIFOSIZE=8
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -697,8 +727,9 @@ CONFIG_ADC_FIFOSIZE=8
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
+# CONFIG_SERIAL_REMOVABLE is not set
+# CONFIG_SERIAL_CONSOLE is not set
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -744,18 +775,24 @@ CONFIG_UART4_2STOP=0
 # CONFIG_UART4_IFLOWCONTROL is not set
 # CONFIG_UART4_OFLOWCONTROL is not set
 # CONFIG_UART4_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_NONE=y
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -792,12 +829,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -862,7 +893,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -870,8 +900,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -894,16 +926,15 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_BUTTONS is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -912,20 +943,18 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 CONFIG_EXAMPLES_SERIALRX=y
@@ -945,10 +974,10 @@ CONFIG_EXAMPLES_SERIALRX_PRINTSTR=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -970,8 +999,8 @@ CONFIG_EXAMPLES_SERIALRX_PRINTSTR=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1004,16 +1033,16 @@ CONFIG_EXAMPLES_SERIALRX_PRINTSTR=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/nucleo-f303re/src/Makefile b/configs/nucleo-f303re/src/Makefile
index 7d81b2cbe1bf8f7a6bef7f362f39078122b63530..a4906030e79fad6fdfff39868922e5ece069891d 100644
--- a/configs/nucleo-f303re/src/Makefile
+++ b/configs/nucleo-f303re/src/Makefile
@@ -62,6 +62,10 @@ ifeq ($(CONFIG_CAN),y)
 CSRCS += stm32_can.c
 endif
 
+ifeq ($(CONFIG_DAC),y)
+CSRCS += stm32_dac.c
+endif
+
 ifeq ($(CONFIG_PWM),y)
 CSRCS += stm32_pwm.c
 endif
diff --git a/configs/nucleo-f303re/src/nucleo-f303re.h b/configs/nucleo-f303re/src/nucleo-f303re.h
index 526bc7ee9a5af1c8aaf1fbd19e5bcb1e79ca0167..e11495f5f151437efce03975ab336fe790f8ece2 100644
--- a/configs/nucleo-f303re/src/nucleo-f303re.h
+++ b/configs/nucleo-f303re/src/nucleo-f303re.h
@@ -69,6 +69,8 @@
 #define GPIO_LED1      (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
                         GPIO_OUTPUT_CLEAR|GPIO_PORTA|GPIO_PIN5)
 
+#define LED_DRIVER_PATH "/dev/userleds"
+
 /* Button definitions *******************************************************/
 /* The Nucleo F303RE supports two buttons; only one button is controllable
  * by software:
@@ -153,4 +155,52 @@ void weak_function stm32_spidev_initialize(void);
 int stm32_timer_driver_setup(FAR const char *devpath, int timer);
 #endif
 
+/****************************************************************************
+ * Name: stm32_dac_setup
+ *
+ * Description:
+ *   Configure DAC peripheral for the board.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DAC
+int stm32_dac_setup(void);
+#endif
+
+/************************************************************************************
+ * Name: stm32_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PWM
+int stm32_pwm_setup(void);
+#endif
+
+/************************************************************************************
+ * Name: stm32_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ADC
+int stm32_adc_setup(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_can_setup
+ *
+ * Description:
+ *  Initialize CAN and register the CAN device
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CAN
+int stm32_can_setup(void);
+#endif
+
 #endif /* __CONFIGS_NUCLEO_F303RE_SRC_NUCLEO_F303RE_H */
diff --git a/configs/nucleo-f303re/src/stm32_adc.c b/configs/nucleo-f303re/src/stm32_adc.c
index 35d8ad5c3f1730ea37bee5defea047ae838bdc12..04014c4fe8180b1ad9177ffd9849552a5389f978 100644
--- a/configs/nucleo-f303re/src/stm32_adc.c
+++ b/configs/nucleo-f303re/src/stm32_adc.c
@@ -60,36 +60,67 @@
 
 /* Configuration ************************************************************/
 
-#if  defined(CONFIG_STM32_ADC1) && !defined(CONFIG_STM32_ADC2) && \
-    !defined(CONFIG_STM32_ADC3) && !defined(CONFIG_STM32_ADC4)
-#  define ADC_PORT 1
-#elif  defined(CONFIG_STM32_ADC2) && !defined(CONFIG_STM32_ADC1) && \
-      !defined(CONFIG_STM32_ADC3) && !defined(CONFIG_STM32_ADC4)
-#  define ADC_PORT 2
-#elif  defined(CONFIG_STM32_ADC3) && !defined(CONFIG_STM32_ADC1) && \
-      !defined(CONFIG_STM32_ADC2) && !defined(CONFIG_STM32_ADC4)
-#  define ADC_PORT 3
-#elif  defined(CONFIG_STM32_ADC4) && !defined(CONFIG_STM32_ADC1) && \
-      !defined(CONFIG_STM32_ADC2) && !defined(CONFIG_STM32_ADC3)
-#  define ADC_PORT 4
-#else
-#  error "Choose only one of ADC1, ADC2, ADC3, ADC4"
+#if defined(ADC1_HAVE_DMA) && defined(CONFIG_STM32_ADC1)
+#  warning "ADC1 with DMA support is not fully implemented"
+#  undef CONFIG_STM32_ADC1
 #endif
 
-/* The number of ADC channels in the conversion list */
+#if defined(ADC2_HAVE_DMA) && defined(CONFIG_STM32_ADC2)
+#  warning "ADC2 with DMA support is not fully implemented"
+#  undef CONFIG_STM32_ADC2
+#endif
+
+#if (defined(CONFIG_STM32_ADC1) && defined(CONFIG_STM32_ADC2)) || \
+    (defined(CONFIG_STM32_ADC3) && defined(CONFIG_STM32_ADC4))
+# error "will not work with this combination of ADCs"
+#endif
+
+/* 1 or 2 ADC devices (DEV1, DEV2) */
+
+#if defined(CONFIG_STM32_ADC1)
+#  define DEV1_PORT 1
+#endif
+
+#if defined(CONFIG_STM32_ADC2)
+#  if defined(DEV1_PORT)
+#    define DEV2_PORT 2
+#  else
+#    define DEV1_PORT 2
+#  endif
+#endif
 
-#if defined(CONFIG_STM32_ADC1) && defined(ADC1_HAVE_DMA)
-#  define ADC_NCHANNELS 4
-#elif defined(CONFIG_STM32_ADC2) && defined(ADC2_HAVE_DMA)
-#  define ADC_NCHANNELS 3
-#elif defined(CONFIG_STM32_ADC3) && defined(ADC3_HAVE_DMA)
-#  define ADC_NCHANNELS 1
-#elif defined(CONFIG_STM32_ADC4) && defined(ADC4_HAVE_DMA)
-#  define ADC_NCHANNELS 1
-#else
-#  define ADC_NCHANNELS 1
+#if defined(CONFIG_STM32_ADC3)
+#  if defined(DEV2_PORT)
+#    error "Choose maximum two of ADC1, ADC2, ADC3, ADC4"
+#  else
+#    if defined(DEV1_PORT)
+#      define DEV2_PORT 3
+#    else
+#      define DEV1_PORT 3
+#    endif
+#  endif
 #endif
 
+#if defined(CONFIG_STM32_ADC4)
+#  if defined(DEV2_PORT)
+#    error "Choose maximum two of ADC1, ADC2, ADC3, ADC4"
+#  else
+#    if defined(DEV1_PORT)
+#      define DEV2_PORT 4
+#    else
+#      define DEV1_PORT 4
+#    endif
+#  endif
+#endif
+
+/* The number of ADC channels in the conversion list */
+/* TODO DMA */
+
+#define ADC1_NCHANNELS 4
+#define ADC2_NCHANNELS 3
+#define ADC3_NCHANNELS 3
+#define ADC4_NCHANNELS 1
+
 /****************************************************************************
  * Private Function Prototypes
  ****************************************************************************/
@@ -98,88 +129,187 @@
  * Private Data
  ****************************************************************************/
 
-#if defined(CONFIG_STM32_ADC1)
+/* DEV 1 */
 
-/* Identifying number of each ADC channel */
+#if DEV1_PORT == 1
+
+#define DEV1_NCHANNELS ADC1_NCHANNELS
 
-static const uint8_t  g_chanlist[ADC_NCHANNELS] =
+/* Identifying number of each ADC channel (even if NCHANNELS is less ) */
+
+static const uint8_t g_chanlist1[4] =
 {
   1,
-#ifdef ADC1_HAVE_DMA
   2,
   6,
   7,
-#endif
 };
 
 /* Configurations of pins used by each ADC channel */
 
-static const uint32_t g_pinlist[ADC_NCHANNELS]  =
+static const uint32_t g_pinlist1[4]  =
 {
   GPIO_ADC1_IN1,
-#ifdef ADC1_HAVE_DMA
   GPIO_ADC1_IN2,
   GPIO_ADC1_IN6,
-  GPIO_ADC1_IN7,
-#endif
+  GPIO_ADC1_IN7
 };
 
-#elif defined(CONFIG_STM32_ADC2)
+#elif DEV1_PORT == 2
+
+#define DEV1_NCHANNELS ADC2_NCHANNELS
 
 /* Identifying number of each ADC channel */
 
-static const uint8_t  g_chanlist[ADC_NCHANNELS] =
+static const uint8_t g_chanlist1[3] =
 {
   1,
-#ifdef ADC2_HAVE_DMA
-  6,
-  7,
-#endif
+  3,
+  4
 };
 
 /* Configurations of pins used by each ADC channel */
 
-static const uint32_t g_pinlist[ADC_NCHANNELS]  =
+static const uint32_t g_pinlist1[3] =
 {
   GPIO_ADC2_IN1,
-#ifdef ADC2_HAVE_DMA
-  GPIO_ADC2_IN6,
-  GPIO_ADC2_IN7,
-#endif
+  GPIO_ADC2_IN3,
+  GPIO_ADC2_IN4
 };
 
-#elif defined(CONFIG_STM32_ADC3)
+#elif DEV1_PORT == 3
+
+#define DEV1_NCHANNELS ADC3_NCHANNELS
+
+/* Identifying number of each ADC channel */
+
+static const uint8_t g_chanlist1[3] =
+{
+  1,
+  5,
+  12
+};
+
+/* Configurations of pins used by each ADC channel */
+
+static const uint32_t g_pinlist1[3] =
+{
+  GPIO_ADC3_IN1,
+  GPIO_ADC3_IN5,
+  GPIO_ADC3_IN12
+};
+
+#elif DEV1_PORT == 4
+
+#define DEV1_NCHANNELS ADC4_NCHANNELS
 
 /* Identifying number of each ADC channel */
 
-static const uint8_t  g_chanlist[ADC_NCHANNELS] =
+static const uint8_t g_chanlist1[1] =
+{
+  3
+};
+
+/* Configurations of pins used by each ADC channel */
+
+static const uint32_t g_pinlist1[1] =
+{
+  GPIO_ADC4_IN3
+};
+
+#endif
+
+#ifdef DEV2_PORT
+
+/* DEV 2 */
+
+#if DEV2_PORT == 1
+
+#define DEV2_NCHANNELS ADC1_NCHANNELS
+
+/* Identifying number of each ADC channel (even if NCHANNELS is less ) */
+
+static const uint8_t g_chanlist2[4] =
 {
-  12,
+  1,
+  2,
+  6,
+  7
 };
 
 /* Configurations of pins used by each ADC channel */
 
-static const uint32_t g_pinlist[ADC_NCHANNELS]  =
+static const uint32_t g_pinlist2[4] =
 {
-  GPIO_ADC3_IN12,
+  GPIO_ADC1_IN1,
+  GPIO_ADC1_IN2,
+  GPIO_ADC1_IN6,
+  GPIO_ADC1_IN7
 };
 
-#elif defined(CONFIG_STM32_ADC4)
+#elif DEV2_PORT == 2
+
+#define DEV2_NCHANNELS ADC2_NCHANNELS
 
 /* Identifying number of each ADC channel */
 
-static const uint8_t  g_chanlist[ADC_NCHANNELS] =
+static const uint8_t g_chanlist2[3] =
 {
+  1,
   3,
+  4
+};
+
+/* Configurations of pins used by each ADC channel */
+
+static const uint32_t g_pinlist2[3] =
+{
+  GPIO_ADC2_IN1,
+  GPIO_ADC2_IN3,
+  GPIO_ADC2_IN4
+};
+
+#elif DEV2_PORT == 3
+
+#define DEV2_NCHANNELS ADC3_NCHANNELS
+
+/* Identifying number of each ADC channel */
+
+static const uint8_t g_chanlist2[3] =
+{
+  1,
+  5,
+  12
+};
+
+/* Configurations of pins used by each ADC channel */
+
+static const uint32_t g_pinlist2[3] =
+{
+  GPIO_ADC3_IN1,
+  GPIO_ADC3_IN5,
+  GPIO_ADC3_IN12
+};
+
+#elif DEV2_PORT == 4
+
+#define DEV2_NCHANNELS ADC4_NCHANNELS
+
+/* Identifying number of each ADC channel */
+
+static const uint8_t g_chanlist2[1] =
+{
+  3
 };
 
 /* Configurations of pins used by each ADC channel */
 
-static const uint32_t g_pinlist[ADC_NCHANNELS]  =
+static const uint32_t g_pinlist2[1] =
 {
-  GPIO_ADC4_IN3,
+  GPIO_ADC4_IN3
 };
 
+#endif
 #endif
 
 /****************************************************************************
@@ -190,56 +320,75 @@ static const uint32_t g_pinlist[ADC_NCHANNELS]  =
  * Public Functions
  ****************************************************************************/
 
-/****************************************************************************
- * Name: board_adc_setup
+/************************************************************************************
+ * Name: stm32_adc_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work
- *   with examples/adc.
+ *   Initialize ADC and register the ADC driver.
  *
- ****************************************************************************/
+ ************************************************************************************/
 
-int board_adc_setup(void)
+int stm32_adc_setup(void)
 {
-  static bool initialized = false;
   FAR struct adc_dev_s *adc;
   int ret;
   int i;
 
-  /* Check if we have already initialized */
+  /* DEV1 */
+  /* Configure the pins as analog inputs for the selected channels */
 
-  if (!initialized)
+  for (i = 0; i < DEV1_NCHANNELS; i++)
     {
-      /* Configure the pins as analog inputs for the selected channels */
+      stm32_configgpio(g_pinlist1[i]);
+    }
 
-      for (i = 0; i < ADC_NCHANNELS; i++)
-        {
-          stm32_configgpio(g_pinlist[i]);
-        }
+  /* Call stm32_adcinitialize() to get an instance of the ADC interface */
 
-      /* Call stm32_adcinitialize() to get an instance of the ADC interface */
+  adc = stm32_adcinitialize(DEV1_PORT, g_chanlist1, DEV1_NCHANNELS);
+  if (adc == NULL)
+    {
+      aerr("ERROR: Failed to get ADC interface 1\n");
+      return -ENODEV;
+    }
 
-      adc = stm32_adcinitialize(ADC_PORT, g_chanlist, ADC_NCHANNELS);
-      if (adc == NULL)
-        {
-          adbg("ERROR: Failed to get ADC interface\n");
-          return -ENODEV;
-        }
+  /* Register the ADC driver at "/dev/adc0" */
 
-      /* Register the ADC driver at "/dev/adc0" */
+  ret = adc_register("/dev/adc0", adc);
+  if (ret < 0)
+    {
+      aerr("ERROR: adc_register /dev/adc0 failed: %d\n", ret);
+      return ret;
+    }
 
-      ret = adc_register("/dev/adc0", adc);
-      if (ret < 0)
-        {
-          adbg("adc_register failed: %d\n", ret);
-          return ret;
-        }
+#ifdef DEV2_PORT
 
-      /* Now we are initialized */
+  /* DEV2 */
+  /* Configure the pins as analog inputs for the selected channels */
 
-      initialized = true;
+  for (i = 0; i < DEV2_NCHANNELS; i++)
+    {
+      stm32_configgpio(g_pinlist2[i]);
     }
 
+  /* Call stm32_adcinitialize() to get an instance of the ADC interface */
+
+  adc = stm32_adcinitialize(DEV2_PORT, g_chanlist2, DEV2_NCHANNELS);
+  if (adc == NULL)
+    {
+      aerr("ERROR: Failed to get ADC interface 2\n");
+      return -ENODEV;
+    }
+
+  /* Register the ADC driver at "/dev/adc1" */
+
+  ret = adc_register("/dev/adc1", adc);
+  if (ret < 0)
+    {
+      aerr("ERROR: adc_register /dev/adc1 failed: %d\n", ret);
+      return ret;
+    }
+#endif
+
   return OK;
 }
 
diff --git a/configs/nucleo-f303re/src/stm32_appinitialize.c b/configs/nucleo-f303re/src/stm32_appinitialize.c
index d79c7d50412635ac5dbbcc9a43595248d707c55e..621488c57f1882d3149ef7f6ae9d2685ccc1c61c 100644
--- a/configs/nucleo-f303re/src/stm32_appinitialize.c
+++ b/configs/nucleo-f303re/src/stm32_appinitialize.c
@@ -42,13 +42,28 @@
 #include 
 
 #include 
+#include 
 
 #include 
+#include 
+
+#include "nucleo-f303re.h"
 
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
 
+#undef HAVE_LEDS
+#undef HAVE_DAC
+
+#if !defined(CONFIG_ARCH_LEDS) && defined(CONFIG_USERLED_LOWER)
+#  define HAVE_LEDS 1
+#endif
+
+#if defined(CONFIG_DAC)
+#  define HAVE_DAC 1
+#endif
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -80,5 +95,62 @@
 
 int board_app_initialize(uintptr_t arg)
 {
+  int ret;
+
+#ifdef HAVE_LEDS
+  /* Register the LED driver */
+
+  ret = userled_lower_initialize(LED_DRIVER_PATH);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: userled_lower_initialize() failed: %d\n", ret);
+      return ret;
+    }
+#endif
+
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device. */
+
+  ret = stm32_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_pwm_setup() failed: %d\n", ret);
+    }
+#endif
+
+  /* Contrairement à l'ADC, il n'y a pas de BOARDIOC_DAC_SETUP spécifique. Il
+   * faut le faire ici
+   */
+
+#ifdef HAVE_DAC
+  ret = board_dac_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: board_dac_setup() failed: %d\n", ret);
+      return ret;
+    }
+#endif
+
+#ifdef CONFIG_ADC
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = stm32_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_adc_setup failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_CAN
+  /* Initialize CAN and register the CAN driver. */
+
+  ret = stm32_can_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_can_setup failed: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
   return OK;
 }
diff --git a/configs/nucleo-f303re/src/stm32_autoleds.c b/configs/nucleo-f303re/src/stm32_autoleds.c
index db170d7b2cdf6cf5fdf66f4117c183a2358f40dd..d7571a88e937328e6bb0fe1b8677ddb5cc64f538 100644
--- a/configs/nucleo-f303re/src/stm32_autoleds.c
+++ b/configs/nucleo-f303re/src/stm32_autoleds.c
@@ -53,34 +53,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/nucleo-f303re/src/stm32_buttons.c b/configs/nucleo-f303re/src/stm32_buttons.c
index 82e9c9eff25ae717509e3c9e2549e287f5261e21..65b046b819e85b10b02efee656f2f8f61ace770f 100644
--- a/configs/nucleo-f303re/src/stm32_buttons.c
+++ b/configs/nucleo-f303re/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/nucleo-f303re/src/stm32_buttons.c
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved.
  *   Authors: Gregory Nutt 
  *            Paul Alexander Patience 
@@ -43,6 +43,7 @@
 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -52,22 +53,6 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -120,23 +105,22 @@ uint8_t board_buttons(void)
  *   will be called when a button is depressed or released.  The ID value is
  *   a button enumeration value that uniquely identifies a button resource.
  *   See the BUTTON_* definitions in board.h for the meaning of the
- *   enumeration value.  The previous interrupt handler address is returned
- *   (so that it may be restored, if so desired).
+ *   enumeration value.
  *
  ****************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   if (id == BUTTON_USER)
     {
-      oldhandler = stm32_gpiosetevent(GPIO_BTN_USER, true, true, true,
-                                      irqhandler);
+      ret = stm32_gpiosetevent(GPIO_BTN_USER, true, true, true, irqhandler,
+                               arg);
     }
 
-  return oldhandler;
+  return ret;
 }
 #endif
 
diff --git a/configs/nucleo-f303re/src/stm32_can.c b/configs/nucleo-f303re/src/stm32_can.c
index 430be9c69d19acca0529d375cd9dbba42140dbb5..e1f1a2d713536bcc20e609406a4c433fba3adba7 100644
--- a/configs/nucleo-f303re/src/stm32_can.c
+++ b/configs/nucleo-f303re/src/stm32_can.c
@@ -45,91 +45,52 @@
 #include 
 #include 
 
-#include 
-#include 
+#include 
 
 #include "stm32.h"
 
-#if defined(CONFIG_CAN) && defined(CONFIG_STM32_CAN1)
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
-
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
-#else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
+#ifdef CONFIG_CAN
 
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: board_can_initialize
+ * Name: stm32_can_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work
- *   with examples/can.
+ *  Initialize CAN and register the CAN device
  *
  ****************************************************************************/
 
-int board_can_initialize(void)
+int stm32_can_setup(void)
 {
-  static bool initialized = false;
+#ifdef CONFIG_STM32_CAN1
   struct can_dev_s *can;
   int ret;
 
-  /* Check if we have already initialized */
+  /* Call stm32_caninitialize() to get an instance of the CAN interface */
 
-  if (!initialized)
+  can = stm32_caninitialize(1);
+  if (can == NULL)
     {
-      /* Call stm32_caninitialize() to get an instance of the CAN interface */
-
-      can = stm32_caninitialize(1);
-      if (can == NULL)
-        {
-          candbg("ERROR: Failed to get CAN interface\n");
-          return -ENODEV;
-        }
-
-      /* Register the CAN driver at "/dev/can0" */
-
-      ret = can_register("/dev/can0", can);
-      if (ret < 0)
-        {
-          candbg("ERROR: can_register failed: %d\n", ret);
-          return ret;
-        }
+      canerr("ERROR: Failed to get CAN interface\n");
+      return -ENODEV;
+    }
 
-      /* Now we are initialized */
+  /* Register the CAN driver at "/dev/can0" */
 
-      initialized = true;
+  ret = can_register("/dev/can0", can);
+  if (ret < 0)
+    {
+      canerr("ERROR: can_register failed: %d\n", ret);
+      return ret;
     }
 
   return OK;
+#else
+  return -ENODEV;
+#endif
 }
 
-#endif /* CONFIG_CAN && CONFIG_STM32_CAN1 */
+#endif /* CONFIG_CAN */
diff --git a/configs/nucleo-f303re/src/stm32_pwm.c b/configs/nucleo-f303re/src/stm32_pwm.c
index 57e734d78b3b2243f81989070366e65879e7a14e..ae46bc7057dd244fcd319b25e1a8fe9559d50cb9 100644
--- a/configs/nucleo-f303re/src/stm32_pwm.c
+++ b/configs/nucleo-f303re/src/stm32_pwm.c
@@ -46,58 +46,26 @@
 #include 
 
 #include 
-#include 
+#include 
 
 #include "stm32_pwm.h"
 #include "nucleo-f303re.h"
 
 #ifdef CONFIG_PWM
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing PWM */
-
-#ifdef CONFIG_DEBUG_PWM
-#  define pwmdbg    dbg
-#  define pwmvdbg   vdbg
-#  define pwmlldbg  lldbg
-#  define pwmllvdbg llvdbg
-#else
-#  define pwmdbg(x...)
-#  define pwmvdbg(x...)
-#  define pwmlldbg(x...)
-#  define pwmllvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
-/****************************************************************************
- * Name: board_pwm_setup
+/************************************************************************************
+ * Name: stm32_pwm_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work
- *   with examples/pwm.
+ *   Initialize PWM and register the PWM device.
  *
- ****************************************************************************/
+ ************************************************************************************/
 
-int board_pwm_setup(void)
+int stm32_pwm_setup(void)
 {
   static bool initialized = false;
   struct pwm_lowerhalf_s *pwm;
@@ -112,7 +80,7 @@ int board_pwm_setup(void)
       pwm = stm32_pwminitialize(NUCLEO_F303RE_PWMTIMER);
       if (pwm == NULL)
         {
-          pwmdbg("Failed to get the STM32 PWM lower half\n");
+          pwmerr("ERROR: Failed to get the STM32 PWM lower half\n");
           return -ENODEV;
         }
 
@@ -121,7 +89,7 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/pwm0", pwm);
       if (ret < 0)
         {
-          pwmdbg("pwm_register failed: %d\n", ret);
+          pwmerr("ERROR: pwm_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/nucleo-f303re/src/stm32_spi.c b/configs/nucleo-f303re/src/stm32_spi.c
index 51297ba4260ad96b3c372ee484b93f17a5877bf2..6251ede1da3b2a558783ab3907e7e3fe9eb53b34 100644
--- a/configs/nucleo-f303re/src/stm32_spi.c
+++ b/configs/nucleo-f303re/src/stm32_spi.c
@@ -56,32 +56,6 @@
 
 #ifdef CONFIG_SPI
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -132,7 +106,7 @@ void weak_function stm32_spidev_initialize(void)
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
                       bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
 #if defined(CONFIG_LCD_SSD1351)
   if (devid == SPIDEV_DISPLAY)
@@ -152,7 +126,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
                       bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -165,7 +139,7 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
                       bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
diff --git a/configs/nucleo-f303re/src/stm32_ssd1351.c b/configs/nucleo-f303re/src/stm32_ssd1351.c
index 417c4f4e8bbe8a7b4c2b53ba9ca8e957aab85056..01461fa06ab4e89fe2c7800db299ea356cc99b8d 100644
--- a/configs/nucleo-f303re/src/stm32_ssd1351.c
+++ b/configs/nucleo-f303re/src/stm32_ssd1351.c
@@ -71,16 +71,6 @@
 #  error "The configuration requires the SPI 4-wire interface"
 #endif
 
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg(format, ...)  dbg(format, ##__VA_ARGS__)
-#  define lcdvdbg(format, ...) vdbg(format, ##__VA_ARGS__)
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -114,7 +104,7 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
   spi = stm32_spibus_initialize(1);
   if (spi == NULL)
     {
-      lcddbg("Failed to initialize SPI port 1\n");
+      lcderr("ERROR: Failed to initialize SPI port 1\n");
     }
   else
     {
@@ -123,11 +113,11 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
       dev = ssd1351_initialize(spi, devno);
       if (dev == NULL)
         {
-          lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno);
+          lcderr("ERROR: Failed to bind SPI port 1 to OLED %d: %d\n", devno);
         }
      else
         {
-          lcdvdbg("Bound SPI port 1 to OLED %d\n", devno);
+          lcdinfo("Bound SPI port 1 to OLED %d\n", devno);
 
           /* And turn the OLED on */
 
diff --git a/configs/nucleo-f303re/src/stm32_userleds.c b/configs/nucleo-f303re/src/stm32_userleds.c
index 8644973dbc14fcb39b9340511eba123389262511..a9fa8f1ff0d0b4b5e479f53705efc6746794e607 100644
--- a/configs/nucleo-f303re/src/stm32_userleds.c
+++ b/configs/nucleo-f303re/src/stm32_userleds.c
@@ -52,22 +52,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/nucleo-f303re/uavcan/Make.defs b/configs/nucleo-f303re/uavcan/Make.defs
index e29de03492b54a6e87a88cc586163d5911ea11dd..21856722e55f904b7168424ba86fdb9c892f7d8d 100644
--- a/configs/nucleo-f303re/uavcan/Make.defs
+++ b/configs/nucleo-f303re/uavcan/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/nucleo-f303re/uavcan/defconfig b/configs/nucleo-f303re/uavcan/defconfig
index c68b048740a91e645035dfc065629b079948dca5..237c1b5d883c9a9bef2eca12caefb3eeabad67c6 100644
--- a/configs/nucleo-f303re/uavcan/defconfig
+++ b/configs/nucleo-f303re/uavcan/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +61,11 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +75,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +201,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -346,6 +349,12 @@ CONFIG_STM32_HAVE_ADC4=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 CONFIG_STM32_HAVE_DAC1=y
@@ -413,6 +422,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -514,6 +529,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -529,9 +545,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=1
@@ -624,6 +643,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -639,12 +659,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -652,8 +676,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -661,6 +695,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -669,20 +704,25 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 # CONFIG_SERIAL is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_NONE=y
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -719,12 +759,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -774,6 +808,8 @@ CONFIG_LIBM=y
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -789,7 +825,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -797,8 +832,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -855,9 +892,9 @@ CONFIG_LIBUAVCAN_INIT_RETRIES=0
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -865,10 +902,10 @@ CONFIG_LIBUAVCAN_INIT_RETRIES=0
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -876,21 +913,19 @@ CONFIG_LIBUAVCAN_INIT_RETRIES=0
 # CONFIG_EXAMPLES_NRF24L01TERM is not set
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -906,9 +941,9 @@ CONFIG_EXAMPLES_UAVCAN=y
 CONFIG_EXAMPLES_UAVCAN_NODE_MEM_POOL_SIZE=4096
 CONFIG_EXAMPLES_UAVCAN_NODE_ID=1
 CONFIG_EXAMPLES_UAVCAN_NODE_NAME="org.nuttx.apps.examples.uavcan"
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -930,8 +965,9 @@ CONFIG_EXAMPLES_UAVCAN_NODE_NAME="org.nuttx.apps.examples.uavcan"
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -965,16 +1001,17 @@ CONFIG_EXAMPLES_UAVCAN_NODE_NAME="org.nuttx.apps.examples.uavcan"
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/nucleo-f334r8/Kconfig b/configs/nucleo-f334r8/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..e9018b63a3886903644199b4268adbe24f719e52
--- /dev/null
+++ b/configs/nucleo-f334r8/Kconfig
@@ -0,0 +1,8 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_BOARD_NUCLEO_F334R8
+
+endif
diff --git a/configs/nucleo-f334r8/include/board.h b/configs/nucleo-f334r8/include/board.h
new file mode 100644
index 0000000000000000000000000000000000000000..0ebacd0b0c37f1d129b35cdd6f0dd3538fc9bb47
--- /dev/null
+++ b/configs/nucleo-f334r8/include/board.h
@@ -0,0 +1,282 @@
+/****************************************************************************
+ * configs/nucleo-f334r8/include/board.h
+ * include/arch/board/board.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Mateusz Szafoni 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __CONFIG_STM32F3DISCOVERY_INCLUDE_BOARD_H
+#define __CONFIG_STM32F3DISCOVERY_INCLUDE_BOARD_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#ifndef __ASSEMBLY__
+#  include 
+#  include 
+#endif
+
+#ifdef __KERNEL__
+#  include "stm32.h"
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Clocking *****************************************************************/
+
+/* HSI - Internal 8 MHz RC Oscillator
+ * LSI - 32 KHz RC
+ * HSE - 8 MHz from MCO output of ST-LINK
+ * LSE - 32.768 kHz
+ */
+
+#define STM32_BOARD_XTAL        8000000ul
+
+#define STM32_HSI_FREQUENCY     8000000ul
+#define STM32_LSI_FREQUENCY     32000            /* Between 30kHz and 60kHz */
+#define STM32_HSE_FREQUENCY     STM32_BOARD_XTAL
+#define STM32_LSE_FREQUENCY     32768            /* X2 on board */
+
+/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */
+
+#define STM32_CFGR_PLLSRC       RCC_CFGR_PLLSRC
+#define STM32_CFGR_PLLXTPRE     0
+#define STM32_CFGR_PLLMUL       RCC_CFGR_PLLMUL_CLKx9
+#define STM32_PLL_FREQUENCY     (9*STM32_BOARD_XTAL)
+
+/* Use the PLL and set the SYSCLK source to be the PLL */
+
+#define STM32_SYSCLK_SW         RCC_CFGR_SW_PLL
+#define STM32_SYSCLK_SWS        RCC_CFGR_SWS_PLL
+#define STM32_SYSCLK_FREQUENCY  STM32_PLL_FREQUENCY
+
+/* AHB clock (HCLK) is SYSCLK (72MHz) */
+
+#define STM32_RCC_CFGR_HPRE     RCC_CFGR_HPRE_SYSCLK
+#define STM32_HCLK_FREQUENCY    STM32_PLL_FREQUENCY
+#define STM32_BOARD_HCLK        STM32_HCLK_FREQUENCY
+
+/* APB2 clock (PCLK2) is HCLK (72MHz) */
+
+#define STM32_RCC_CFGR_PPRE2    RCC_CFGR_PPRE2_HCLK
+#define STM32_PCLK2_FREQUENCY   STM32_HCLK_FREQUENCY
+#define STM32_APB2_CLKIN        (STM32_PCLK2_FREQUENCY)
+
+/* APB2 timers 1, 8, 15-17 and HRTIM1 will receive PCLK2. */
+
+/* Timers driven from APB2 will be PCLK2 */
+
+#define STM32_APB2_TIM1_CLKIN     (STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM8_CLKIN     (STM32_PCLK2_FREQUENCY)
+#define STM32_APB1_TIM15_CLKIN    (STM32_PCLK2_FREQUENCY)
+#define STM32_APB1_TIM16_CLKIN    (STM32_PCLK2_FREQUENCY)
+#define STM32_APB1_TIM17_CLKIN    (STM32_PCLK2_FREQUENCY)
+#define STM32_APB1_THRTIM1_CLKIN  (STM32_PCLK2_FREQUENCY)
+
+/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */
+
+#define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd2
+#define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
+
+/* APB1 timers 2-7 will be twice PCLK1 */
+
+#define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+
+/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
+ * otherwise frequency is 2xAPBx.
+ * Note: TIM1,8 are on APB2, others on APB1
+ */
+
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM15_FREQUENCY   STM32_HCLK_FREQUENCY
+#define BOARD_TIM16_FREQUENCY   STM32_HCLK_FREQUENCY
+#define BOARD_TIM17_FREQUENCY   STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM3_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM5_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM6_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM7_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_HRTIM1_FREQUENCY  STM32_HCLK_FREQUENCY
+
+/* LED definitions **********************************************************/
+/* The Nucleo F334R8 board has three LEDs.  Two of these are controlled by
+ * logic on the board and are not available for software control:
+ *
+ * LD1 COM:  LD1 default status is red.  LD1 turns to green to indicate that
+ *           communications are in progress between the PC and the
+ *           ST-LINK/V2-1.
+ * LD3 PWR:  red LED indicates that the board is powered.
+ *
+ * And one can be controlled by software:
+ *
+ * User LD2: green LED is a user LED connected to the I/O PA5 of the
+ *           STM32F334R8.
+ *
+ * If CONFIG_ARCH_LEDS is not defined, then the user can control the LED in
+ * any way.  The following definition is used to access the LED.
+ */
+
+/* LED index values for use with board_userled() */
+
+#define BOARD_LED1       0 /* User LD2 */
+#define BOARD_NLEDS      1
+
+/* LED bits for use with board_userled_all() */
+
+#define BOARD_LED1_BIT   (1 << BOARD_LED1)
+
+/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board
+ * the Nucleo F334R8.  The following definitions describe how NuttX controls
+ * the LED:
+ *
+ *   SYMBOL              Meaning                  LED1 state
+ *   ------------------  -----------------------  ----------
+ *   LED_STARTED         NuttX has been started   OFF
+ *   LED_HEAPALLOCATE    Heap has been allocated  OFF
+ *   LED_IRQSENABLED     Interrupts enabled       OFF
+ *   LED_STACKCREATED    Idle stack created       ON
+ *   LED_INIRQ           In an interrupt          No change
+ *   LED_SIGNAL          In a signal handler      No change
+ *   LED_ASSERTION       An assertion failed      No change
+ *   LED_PANIC           The system has crashed   Blinking
+ *   LED_IDLE            STM32 is is sleep mode   Not used
+ */
+
+#define LED_STARTED      0
+#define LED_HEAPALLOCATE 0
+#define LED_IRQSENABLED  0
+#define LED_STACKCREATED 1
+#define LED_INIRQ        2
+#define LED_SIGNAL       2
+#define LED_ASSERTION    2
+#define LED_PANIC        1
+
+/* Button definitions *******************************************************/
+/* The Nucleo F334R8 supports two buttons; only one button is controllable
+ * by software:
+ *
+ *   B1 USER:  user button connected to the I/O PC13 of the STM32F334R8.
+ *   B2 RESET: push button connected to NRST is used to RESET the
+ *             STM32F334R8.
+ */
+
+#define BUTTON_USER      0
+#define NUM_BUTTONS      1
+
+#define BUTTON_USER_BIT  (1 << BUTTON_USER)
+
+/* Alternate function pin selections ****************************************/
+/* CAN */
+
+#define GPIO_CAN1_RX GPIO_CAN_RX_2
+#define GPIO_CAN1_TX GPIO_CAN_TX_2
+
+/* I2C */
+
+#define GPIO_I2C1_SCL GPIO_I2C1_SCL_3
+#define GPIO_I2C1_SDA GPIO_I2C1_SDA_3
+
+/* SPI */
+
+#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
+#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
+#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
+
+/* TIM */
+
+#define GPIO_TIM2_CH2OUT GPIO_TIM2_CH2OUT_2
+#define GPIO_TIM2_CH3OUT GPIO_TIM2_CH3OUT_3
+
+#define GPIO_TIM3_CH1OUT GPIO_TIM3_CH1OUT_2
+#define GPIO_TIM3_CH2OUT GPIO_TIM3_CH2OUT_4
+
+#define GPIO_TIM4_CH1OUT GPIO_TIM4_CH1OUT_2
+
+/* USART */
+
+#define GPIO_USART2_RX GPIO_USART2_RX_2
+#define GPIO_USART2_TX GPIO_USART2_TX_2
+
+#define GPIO_USART1_RX GPIO_USART1_RX_1 /* PA10 */
+#define GPIO_USART1_TX GPIO_USART1_TX_1 /* PA9 */
+
+/* HRTIM */
+
+
+/* DMA channels *************************************************************/
+/* ADC */
+
+#define ADC1_DMA_CHAN DMACHAN_ADC1
+#define ADC2_DMA_CHAN DMACHAN_ADC2_
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.  This
+ *   entry point is called early in the initialization -- after all memory
+ *   has been configured and mapped but before any devices have been
+ *   initialized.
+ *
+ ****************************************************************************/
+
+void stm32_boardinitialize(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __CONFIG_NUCLEO_F334R8_INCLUDE_BOARD_H */
diff --git a/configs/stm32f746g-disco/netnsh/Make.defs b/configs/nucleo-f334r8/nsh/Make.defs
similarity index 95%
rename from configs/stm32f746g-disco/netnsh/Make.defs
rename to configs/nucleo-f334r8/nsh/Make.defs
index 7a2cc395ab70087de0e1633ca17a0f39f3a822b4..dc83b33e38a1d450ae0090460135b69470b59973 100644
--- a/configs/stm32f746g-disco/netnsh/Make.defs
+++ b/configs/nucleo-f334r8/nsh/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
-# configs/stm32f746g-disco/netnsh/Make.defs
+# configs/nucleo-f334r8/nsh/Make.defs
 #
-#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -37,7 +37,7 @@ include ${TOPDIR}/.config
 include ${TOPDIR}/tools/Config.mk
 include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
 
-LDSCRIPT = flash.ld
+LDSCRIPT = ld.script
 
 ifeq ($(WINTOOL),y)
   # Windows-native toolchains
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/nucleo-f334r8/nsh/defconfig b/configs/nucleo-f334r8/nsh/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..6ae44c0a818aafbf68fe58d87004e6c55bd04312
--- /dev/null
+++ b/configs/nucleo-f334r8/nsh/defconfig
@@ -0,0 +1,1217 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+CONFIG_DEBUG_FEATURES=y
+
+#
+# Debug SYSLOG Output Controls
+#
+# CONFIG_DEBUG_ERROR is not set
+# CONFIG_DEBUG_ASSERTIONS is not set
+
+#
+# Subsystem Debug Options
+#
+# CONFIG_DEBUG_BINFMT is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_GRAPHICS is not set
+# CONFIG_DEBUG_LIB is not set
+# CONFIG_DEBUG_MM is not set
+# CONFIG_DEBUG_SCHED is not set
+
+#
+# OS Function Debug Options
+#
+# CONFIG_DEBUG_IRQ is not set
+
+#
+# Driver Debug Options
+#
+# CONFIG_DEBUG_LEDS is not set
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_TIMER is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+# CONFIG_DEBUG_HARDFAULT is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
+# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+# CONFIG_ARCH_CHIP_STM32F103C8 is not set
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F334K4 is not set
+# CONFIG_ARCH_CHIP_STM32F334K6 is not set
+# CONFIG_ARCH_CHIP_STM32F334K8 is not set
+# CONFIG_ARCH_CHIP_STM32F334C4 is not set
+# CONFIG_ARCH_CHIP_STM32F334C6 is not set
+# CONFIG_ARCH_CHIP_STM32F334C8 is not set
+# CONFIG_ARCH_CHIP_STM32F334R4 is not set
+# CONFIG_ARCH_CHIP_STM32F334R6 is not set
+CONFIG_ARCH_CHIP_STM32F334R8=y
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+# CONFIG_ARCH_CHIP_STM32F407ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+# CONFIG_STM32_STM32F10XX is not set
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+# CONFIG_STM32_PERFORMANCELINE is not set
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+# CONFIG_STM32_MEDIUMDENSITY is not set
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+CONFIG_STM32_STM32F33XX=y
+# CONFIG_STM32_STM32F37XX is not set
+# CONFIG_STM32_STM32F40XX is not set
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+# CONFIG_STM32_STM32F407 is not set
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+CONFIG_STM32_HAVE_CCM=y
+# CONFIG_STM32_HAVE_USBDEV is not set
+# CONFIG_STM32_HAVE_OTGFS is not set
+# CONFIG_STM32_HAVE_FSMC is not set
+CONFIG_STM32_HAVE_HRTIM1=y
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+# CONFIG_STM32_HAVE_UART4 is not set
+# CONFIG_STM32_HAVE_UART5 is not set
+# CONFIG_STM32_HAVE_USART6 is not set
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+# CONFIG_STM32_HAVE_TIM2 is not set
+# CONFIG_STM32_HAVE_TIM3 is not set
+# CONFIG_STM32_HAVE_TIM4 is not set
+# CONFIG_STM32_HAVE_TIM5 is not set
+# CONFIG_STM32_HAVE_TIM6 is not set
+# CONFIG_STM32_HAVE_TIM7 is not set
+# CONFIG_STM32_HAVE_TIM8 is not set
+# CONFIG_STM32_HAVE_TIM9 is not set
+# CONFIG_STM32_HAVE_TIM10 is not set
+# CONFIG_STM32_HAVE_TIM11 is not set
+# CONFIG_STM32_HAVE_TIM12 is not set
+# CONFIG_STM32_HAVE_TIM13 is not set
+# CONFIG_STM32_HAVE_TIM14 is not set
+CONFIG_STM32_HAVE_TIM15=y
+CONFIG_STM32_HAVE_TIM16=y
+CONFIG_STM32_HAVE_TIM17=y
+CONFIG_STM32_HAVE_ADC2=y
+# CONFIG_STM32_HAVE_ADC3 is not set
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+# CONFIG_STM32_HAVE_CAN2 is not set
+CONFIG_STM32_HAVE_DAC1=y
+CONFIG_STM32_HAVE_DAC2=y
+# CONFIG_STM32_HAVE_RNG is not set
+# CONFIG_STM32_HAVE_ETHMAC is not set
+# CONFIG_STM32_HAVE_I2C2 is not set
+# CONFIG_STM32_HAVE_I2C3 is not set
+# CONFIG_STM32_HAVE_SPI2 is not set
+# CONFIG_STM32_HAVE_SPI3 is not set
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_DAC1 is not set
+# CONFIG_STM32_DAC2 is not set
+# CONFIG_STM32_HRTIM1 is not set
+# CONFIG_STM32_I2C1 is not set
+CONFIG_STM32_PWR=y
+# CONFIG_STM32_SDIO is not set
+# CONFIG_STM32_SPI1 is not set
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM15 is not set
+# CONFIG_STM32_TIM16 is not set
+# CONFIG_STM32_TIM17 is not set
+CONFIG_STM32_USART1=y
+# CONFIG_STM32_USART2 is not set
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_JTAG_DISABLE is not set
+# CONFIG_STM32_JTAG_FULL_ENABLE is not set
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+CONFIG_STM32_JTAG_SW_ENABLE=y
+# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+CONFIG_STM32_CCMEXCLUDE=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
+# CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+# CONFIG_STM32_HAVE_RTC_COUNTER is not set
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=16717
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=12288
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_NUCLEO_F334R8=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="nucleo-f334r8"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+# CONFIG_ARCH_IRQBUTTONS is not set
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+# CONFIG_LIB_BOARDCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+CONFIG_DISABLE_POSIX_TIMERS=y
+CONFIG_DISABLE_PTHREAD=y
+CONFIG_DISABLE_SIGNALS=y
+CONFIG_DISABLE_MQUEUE=y
+CONFIG_DISABLE_ENVIRON=y
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=12
+CONFIG_START_DAY=6
+CONFIG_MAX_WDOGPARMS=1
+CONFIG_PREALLOC_WDOGS=1
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=2
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_SPINLOCK is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=4
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+# CONFIG_CANCELLATION_POINTS is not set
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+CONFIG_FDCLONE_STDIO=y
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=16
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=1024
+CONFIG_PTHREAD_STACK_MIN=1024
+CONFIG_PTHREAD_STACK_DEFAULT=1024
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+CONFIG_DISABLE_POLL=y
+# CONFIG_DEV_NULL is not set
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART1_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART1 Configuration
+#
+CONFIG_USART1_RXBUFSIZE=256
+CONFIG_USART1_TXBUFSIZE=256
+CONFIG_USART1_BAUD=115200
+CONFIG_USART1_BITS=8
+CONFIG_USART1_PARITY=0
+CONFIG_USART1_2STOP=0
+# CONFIG_USART1_IFLOWCONTROL is not set
+# CONFIG_USART1_OFLOWCONTROL is not set
+# CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+# CONFIG_SYSLOG_CONSOLE is not set
+CONFIG_SYSLOG_NONE=y
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_PSEUDOFS_SOFTLINKS is not set
+# CONFIG_FS_READABLE is not set
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+
+#
+# Standard C I/O
+#
+CONFIG_STDIO_DISABLE_BUFFERING=n
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+# CONFIG_LIBC_LONG_LONG is not set
+# CONFIG_LIBC_SCANSET is not set
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_LIBM is not set
+
+#
+# Architecture-Specific Support
+#
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_BZERO is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
+
+#
+# stdlib Options
+#
+CONFIG_LIB_RAND_ORDER=1
+
+#
+# Program Execution Options
+#
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=512
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=512
+
+#
+# errno Decode Support
+#
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+
+#
+# memcpy/memset Options
+#
+# CONFIG_MEMSET_OPTSPEED is not set
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+
+#
+# Time/Time Zone Support
+#
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_ARCH_HAVE_TLS=y
+
+#
+# Thread Local Storage (TLS)
+#
+# CONFIG_TLS is not set
+
+#
+# Network-Related Options
+#
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
+# CONFIG_LIBC_NETDB is not set
+
+#
+# NETDB Support
+#
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=512
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+CONFIG_EXAMPLES_HELLO=y
+CONFIG_EXAMPLES_HELLO_PRIORITY=100
+CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# External
+#
+# CONFIG_EXTERNAL_MY_NX is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+CONFIG_NSH_DISABLE_ADDROUTE=y
+CONFIG_NSH_DISABLE_BASENAME=y
+CONFIG_NSH_DISABLE_CAT=y
+CONFIG_NSH_DISABLE_CD=y
+CONFIG_NSH_DISABLE_CP=y
+CONFIG_NSH_DISABLE_CMP=y
+CONFIG_NSH_DISABLE_DATE=y
+CONFIG_NSH_DISABLE_DD=y
+CONFIG_NSH_DISABLE_DF=y
+CONFIG_NSH_DISABLE_DELROUTE=y
+CONFIG_NSH_DISABLE_DIRNAME=y
+# CONFIG_NSH_DISABLE_ECHO is not set
+CONFIG_NSH_DISABLE_EXEC=y
+CONFIG_NSH_DISABLE_EXIT=y
+# CONFIG_NSH_DISABLE_FREE is not set
+CONFIG_NSH_DISABLE_GET=y
+# CONFIG_NSH_DISABLE_HELP is not set
+CONFIG_NSH_DISABLE_HEXDUMP=y
+CONFIG_NSH_DISABLE_IFCONFIG=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+CONFIG_NSH_DISABLE_KILL=y
+CONFIG_NSH_DISABLE_LOSETUP=y
+CONFIG_NSH_DISABLE_LOSMART=y
+CONFIG_NSH_DISABLE_LS=y
+CONFIG_NSH_DISABLE_MB=y
+CONFIG_NSH_DISABLE_MKDIR=y
+CONFIG_NSH_DISABLE_MKRD=y
+CONFIG_NSH_DISABLE_MH=y
+CONFIG_NSH_DISABLE_MOUNT=y
+CONFIG_NSH_DISABLE_MV=y
+CONFIG_NSH_DISABLE_MW=y
+# CONFIG_NSH_DISABLE_PRINTF is not set
+CONFIG_NSH_DISABLE_PS=y
+CONFIG_NSH_DISABLE_PUT=y
+CONFIG_NSH_DISABLE_PWD=y
+CONFIG_NSH_DISABLE_RM=y
+CONFIG_NSH_DISABLE_RMDIR=y
+CONFIG_NSH_DISABLE_SET=y
+CONFIG_NSH_DISABLE_SH=y
+CONFIG_NSH_DISABLE_SLEEP=y
+CONFIG_NSH_DISABLE_TIME=y
+CONFIG_NSH_DISABLE_TEST=y
+CONFIG_NSH_DISABLE_UMOUNT=y
+CONFIG_NSH_DISABLE_UNAME=y
+CONFIG_NSH_DISABLE_UNSET=y
+CONFIG_NSH_DISABLE_USLEEP=y
+CONFIG_NSH_DISABLE_WGET=y
+CONFIG_NSH_DISABLE_XD=y
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_FILEIOSIZE=256
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+# CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/nucleo-f334r8/nsh/setenv.sh b/configs/nucleo-f334r8/nsh/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..1baaeb889e59484bfe576a59e7dd1bb0c7ac2db3
--- /dev/null
+++ b/configs/nucleo-f334r8/nsh/setenv.sh
@@ -0,0 +1,77 @@
+#!/bin/bash
+# configs/nucleo-f224r8/nsh/setenv.sh
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the Atmel GCC
+# toolchain under Windows.  You will also have to edit this if you install
+# this toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/nucleo-f334r8/scripts/ld.script b/configs/nucleo-f334r8/scripts/ld.script
new file mode 100644
index 0000000000000000000000000000000000000000..6c11be015b8158fd3a910efbab2fb139cfceb926
--- /dev/null
+++ b/configs/nucleo-f334r8/scripts/ld.script
@@ -0,0 +1,117 @@
+/****************************************************************************
+ * configs/nucleo-f334re/scripts/ld.script
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* The STM32F334R8 has 64Kb of FLASH beginning at address 0x0800:0000 and
+ * 12Kb of SRAM.
+ *
+ * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
+ * where the code expects to begin execution by jumping to the entry point in
+ * the 0x0800:0000 address range.
+ */
+
+MEMORY
+{
+    flash (rx) : ORIGIN = 0x08000000, LENGTH = 64K
+    sram (rwx) : ORIGIN = 0x20000000, LENGTH = 12K
+}
+
+OUTPUT_ARCH(arm)
+ENTRY(_stext)
+SECTIONS
+{
+	.text : {
+		_stext = ABSOLUTE(.);
+		*(.vectors)
+		*(.text .text.*)
+		*(.fixup)
+		*(.gnu.warning)
+		*(.rodata .rodata.*)
+		*(.gnu.linkonce.t.*)
+		*(.glue_7)
+		*(.glue_7t)
+		*(.got)
+		*(.gcc_except_table)
+		*(.gnu.linkonce.r.*)
+		_etext = ABSOLUTE(.);
+	} > flash
+
+	.init_section : {
+		_sinit = ABSOLUTE(.);
+		*(.init_array .init_array.*)
+		_einit = ABSOLUTE(.);
+	} > flash
+
+	.ARM.extab : {
+		*(.ARM.extab*)
+	} > flash
+
+	__exidx_start = ABSOLUTE(.);
+	.ARM.exidx : {
+		*(.ARM.exidx*)
+	} > flash
+	__exidx_end = ABSOLUTE(.);
+
+	_eronly = ABSOLUTE(.);
+
+	.data : {
+		_sdata = ABSOLUTE(.);
+		*(.data .data.*)
+		*(.gnu.linkonce.d.*)
+		CONSTRUCTORS
+		_edata = ABSOLUTE(.);
+	} > sram AT > flash
+
+	.bss : {
+		_sbss = ABSOLUTE(.);
+		*(.bss .bss.*)
+		*(.gnu.linkonce.b.*)
+		*(COMMON)
+		_ebss = ABSOLUTE(.);
+	} > sram
+
+	/* Stabs debugging sections. */
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_info 0 : { *(.debug_info) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/nucleo-f334r8/src/Makefile b/configs/nucleo-f334r8/src/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..c2e188da400357a27766d0df1c057c1d2896c878
--- /dev/null
+++ b/configs/nucleo-f334r8/src/Makefile
@@ -0,0 +1,91 @@
+############################################################################
+# configs/nucleo-f303re/src/Makefile
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Mateusz Szafoni 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+ASRCS =
+CSRCS = stm32_boot.c
+
+ifeq ($(CONFIG_ARCH_LEDS),y)
+CSRCS += stm32_autoleds.c
+else
+CSRCS += stm32_userleds.c
+endif
+
+ifeq ($(CONFIG_ARCH_BUTTONS),y)
+CSRCS += stm32_buttons.c
+endif
+
+ifeq ($(CONFIG_LIB_BOARDCTL),y)
+CSRCS += stm32_appinit.c
+endif
+
+ifeq ($(CONFIG_ADC),y)
+CSRCS += stm32_adc.c
+endif
+
+ifeq ($(CONFIG_CAN),y)
+CSRCS += stm32_can.c
+endif
+
+ifeq ($(CONFIG_DAC),y)
+CSRCS += stm32_dac.c
+endif
+
+ifeq ($(CONFIG_PWM),y)
+CSRCS += stm32_pwm.c
+endif
+
+ifeq ($(CONFIG_SPI),y)
+CSRCS += stm32_spi.c
+endif
+
+ifeq ($(CONFIG_TIMER),y)
+CSRCS += stm32_timer.c
+endif
+
+ifeq ($(CONFIG_HRTIM),y)
+CSRCS += stm32_hrtim.c
+endif
+
+ifeq ($(CONFIG_COMP),y)
+CSRCS += stm32_comp.c
+endif
+
+ifeq ($(CONFIG_OPAMP),y)
+CSRCS += stm32_opamp.c
+endif
+
+include $(TOPDIR)/configs/Board.mk
diff --git a/configs/nucleo-f334r8/src/nucleo-f334r8.h b/configs/nucleo-f334r8/src/nucleo-f334r8.h
new file mode 100644
index 0000000000000000000000000000000000000000..d9cd2e1cf7ce929aafc776ae5a41426d26e2c00d
--- /dev/null
+++ b/configs/nucleo-f334r8/src/nucleo-f334r8.h
@@ -0,0 +1,193 @@
+/****************************************************************************
+ * configs/nucleo-f334r8/src/nucleo-f334r8.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Mateusz Szafoni 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __CONFIGS_NUCLEO_F334R8_SRC_NUCLEO_F334R8_H
+#define __CONFIGS_NUCLEO_F334R8_SRC_NUCLEO_F334R8_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* LED definitions **********************************************************/
+/* The Nucleo F334R8 board has three LEDs.  Two of these are controlled by
+ * logic on the board and are not available for software control:
+ *
+ * LD1 COM:  LD1 default status is red.  LD1 turns to green to indicate that
+ *           communications are in progress between the PC and the
+ *           ST-LINK/V2-1.
+ * LD3 PWR:  red LED indicates that the board is powered.
+ *
+ * And one can be controlled by software:
+ *
+ * User LD2: green LED is a user LED connected to the I/O PA5 of the
+ *           STM32F334R8T6.
+ *
+ * If CONFIG_ARCH_LEDS is not defined, then the user can control the LED in
+ * any way.  The following definition is used to access the LED.
+ */
+
+#define GPIO_LED1      (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
+                        GPIO_OUTPUT_CLEAR|GPIO_PORTA|GPIO_PIN5)
+
+#define LED_DRIVER_PATH "/dev/userleds"
+
+/* Button definitions *******************************************************/
+/* The Nucleo F334R8 supports two buttons; only one button is controllable
+ * by software:
+ *
+ *   B1 USER:  user button connected to the I/O PC13 of the STM32F334R8T6.
+ *   B2 RESET: push button connected to NRST is used to RESET the
+ *             STM32F334R8T6.
+ *
+ * NOTE that EXTI interrupts are configured.
+ */
+
+#define MIN_IRQBUTTON  BUTTON_USER
+#define MAX_IRQBUTTON  BUTTON_USER
+#define NUM_IRQBUTTONS 1
+
+#define GPIO_BTN_USER  (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN13)
+
+/* PWM definitions **********************************************************/
+/* The Nucleo F334R8 has no real on-board PWM devices, but the board can be
+ * configured to output a pulse train using variously unused pins on the
+ * board for PWM output (see board.h for details of pins).
+ */
+
+#ifdef CONFIG_PWM
+#  if defined(CONFIG_STM32_TIM2_PWM)
+#    define NUCLEO_F334R8_PWMTIMER 2
+#  elif defined(CONFIG_STM32_TIM3_PWM)
+#    define NUCLEO_F334R8_PWMTIMER 3
+#  elif defined(CONFIG_STM32_TIM4_PWM)
+#    define NUCLEO_F334R8_PWMTIMER 4
+#  endif
+#endif
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_spidev_initialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins for the board.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI
+void weak_function stm32_spidev_initialize(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_timer_driver_setup
+ *
+ * Description:
+ *   Configure the timer driver.
+ *
+ * Input Parameters:
+ *   devpath - The full path to the timer device.  This should be of the form /dev/timer0
+ *   timer   - The timer's number.
+ *
+ * Returned Values:
+ *   Zero (OK) is returned on success; A negated errno value is returned
+ *   to indicate the nature of any failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_TIMER
+int stm32_timer_driver_setup(FAR const char *devpath, int timer);
+#endif
+
+/****************************************************************************
+ * Name: stm32_dac_setup
+ *
+ * Description:
+ *   Configure DAC peripheral for the board.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DAC
+int stm32_dac_setup(void);
+#endif
+
+/************************************************************************************
+ * Name: stm32_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PWM
+int stm32_pwm_setup(void);
+#endif
+
+/************************************************************************************
+ * Name: stm32_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ADC
+int stm32_adc_setup(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_can_setup
+ *
+ * Description:
+ *  Initialize CAN and register the CAN device
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CAN
+int stm32_can_setup(void);
+#endif
+
+#endif /* __CONFIGS_NUCLEO_F334R8_SRC_NUCLEO_F334R8_H */
diff --git a/configs/nucleo-f334r8/src/stm32_adc.c b/configs/nucleo-f334r8/src/stm32_adc.c
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/configs/nucleo-f334r8/src/stm32_appinit.c b/configs/nucleo-f334r8/src/stm32_appinit.c
new file mode 100644
index 0000000000000000000000000000000000000000..8e7e7535d4bc590bedd36beb2e94a8be2e37aaf2
--- /dev/null
+++ b/configs/nucleo-f334r8/src/stm32_appinit.c
@@ -0,0 +1,112 @@
+/****************************************************************************
+ * configs/nucleo-f334r8/src/stm32_appinitialize.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Mateusz Szafoni 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "nucleo-f303re.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#undef HAVE_LEDS
+#undef HAVE_DAC
+
+#if !defined(CONFIG_ARCH_LEDS) && defined(CONFIG_USERLED_LOWER)
+#  define HAVE_LEDS 1
+#endif
+
+#if defined(CONFIG_DAC)
+#  define HAVE_DAC1 1
+#  define HAVE_DAC2 1
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ *   Perform application specific initialization.  This function is never
+ *   called directly from application code, but only indirectly via the
+ *   (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ *   arg - The boardctl() argument is passed to the board_app_initialize()
+ *         implementation without modification.  The argument has no
+ *         meaning to NuttX; the meaning of the argument is a contract
+ *         between the board-specific initalization logic and the the
+ *         matching application logic.  The value cold be such things as a
+ *         mode enumeration value, a set of DIP switch switch settings, a
+ *         pointer to configuration data read from a file or serial FLASH,
+ *         or whatever you would like to do with it.  Every implementation
+ *         should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+int board_app_initialize(uintptr_t arg)
+{
+  int ret;
+
+#ifdef HAVE_LEDS
+  /* Register the LED driver */
+
+  ret = userled_lower_initialize(LED_DRIVER_PATH);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: userled_lower_initialize() failed: %d\n", ret);
+      return ret;
+    }
+#endif
+
+  UNUSED(ret);
+  return OK;
+}
diff --git a/configs/nucleo-f334r8/src/stm32_autoleds.c b/configs/nucleo-f334r8/src/stm32_autoleds.c
new file mode 100644
index 0000000000000000000000000000000000000000..60ccbf9fe36e05645ea616e81a2f0613b44d8a7e
--- /dev/null
+++ b/configs/nucleo-f334r8/src/stm32_autoleds.c
@@ -0,0 +1,93 @@
+/****************************************************************************
+ * configs/nucleo-f334r8/src/stm32_autoleds.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Mateusz Szafoni 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "stm32.h"
+#include "nucleo-f334r8.h"
+
+#ifdef CONFIG_ARCH_LEDS
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_autoled_initialize
+ ****************************************************************************/
+
+void board_autoled_initialize(void)
+{
+  /* Configure LED1 GPIO for output */
+
+  stm32_configgpio(GPIO_LED1);
+}
+
+/****************************************************************************
+ * Name: board_autoled_on
+ ****************************************************************************/
+
+void board_autoled_on(int led)
+{
+  if (led == BOARD_LED1)
+    {
+      stm32_gpiowrite(GPIO_LED1, true);
+    }
+}
+
+/****************************************************************************
+ * Name: board_autoled_off
+ ****************************************************************************/
+
+void board_autoled_off(int led)
+{
+  if (led == BOARD_LED1)
+    {
+      stm32_gpiowrite(GPIO_LED1, false);
+    }
+}
+
+#endif /* CONFIG_ARCH_LEDS */
diff --git a/configs/nucleo-f334r8/src/stm32_boot.c b/configs/nucleo-f334r8/src/stm32_boot.c
new file mode 100644
index 0000000000000000000000000000000000000000..370a19841020047a5a5bf9af03e33f3f3311b673
--- /dev/null
+++ b/configs/nucleo-f334r8/src/stm32_boot.c
@@ -0,0 +1,86 @@
+/****************************************************************************
+ * configs/nucleo-f334r8/src/stm32_boot.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Authors: Mateusz Szafoni 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include "nucleo-f334r8.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.  This
+ *   entry point is called early in the intitialization -- after all memory
+ *   has been configured and mapped but before any devices have been
+ *   initialized.
+ *
+ ****************************************************************************/
+
+void stm32_boardinitialize(void)
+{
+
+  /* Configure on-board LEDs if LED support has been selected. */
+
+#ifdef CONFIG_ARCH_LEDS
+  board_autoled_initialize();
+#endif
+}
diff --git a/configs/nucleo-f334r8/src/stm32_buttons.c b/configs/nucleo-f334r8/src/stm32_buttons.c
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/configs/nucleo-f334r8/src/stm32_can.c b/configs/nucleo-f334r8/src/stm32_can.c
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/configs/nucleo-f334r8/src/stm32_comp.c b/configs/nucleo-f334r8/src/stm32_comp.c
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/configs/nucleo-f334r8/src/stm32_opamp.c b/configs/nucleo-f334r8/src/stm32_opamp.c
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/configs/nucleo-f334r8/src/stm32_pwm.c b/configs/nucleo-f334r8/src/stm32_pwm.c
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/configs/nucleo-f334r8/src/stm32_spi.c b/configs/nucleo-f334r8/src/stm32_spi.c
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/configs/nucleo-f334r8/src/stm32_timer.c b/configs/nucleo-f334r8/src/stm32_timer.c
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/configs/nucleo-f334r8/src/stm32_userleds.c b/configs/nucleo-f334r8/src/stm32_userleds.c
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/configs/nucleo-f4x1re/Kconfig b/configs/nucleo-f4x1re/Kconfig
index 6449f5b673c0589ba10b7a2f007de4d8d9cbe9f4..27e172d8418b5c105ff4dd87b3a343178e2bb994 100644
--- a/configs/nucleo-f4x1re/Kconfig
+++ b/configs/nucleo-f4x1re/Kconfig
@@ -5,6 +5,11 @@
 
 if ARCH_BOARD_NUCLEO_F401RE
 
+config NUCLEO_F401RE_QETIMER
+	int "Timer to use with QE encoder"
+	default 3
+	depends on QENCODER
+
 config NUCLEO_F401RE_AJOY_MINBUTTONS
 	bool "Minimal Joystick Buttons"
 	default n if !STM32_USART1
diff --git a/configs/nucleo-f4x1re/f401-nsh/Make.defs b/configs/nucleo-f4x1re/f401-nsh/Make.defs
index 097c20b21ed4d3f822e3265545b72fe68f8711c4..3f23478c90978e82ed8c8447ef9087807789c6de 100644
--- a/configs/nucleo-f4x1re/f401-nsh/Make.defs
+++ b/configs/nucleo-f4x1re/f401-nsh/Make.defs
@@ -82,7 +82,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/nucleo-f4x1re/f401-nsh/defconfig b/configs/nucleo-f4x1re/f401-nsh/defconfig
index bdacfd5723e09ce7a5cc12be27f8814212058023..cc3832613ffe2972bbdeca1c13aaa01aaae93425 100644
--- a/configs/nucleo-f4x1re/f401-nsh/defconfig
+++ b/configs/nucleo-f4x1re/f401-nsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -200,6 +200,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -408,6 +409,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -421,9 +428,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -521,11 +536,11 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -541,9 +556,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=5
@@ -636,6 +654,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -655,9 +674,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -671,8 +695,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -680,6 +714,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -688,9 +723,10 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -736,19 +772,25 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -786,12 +828,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -856,7 +892,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -864,8 +899,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -899,7 +936,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_BUTTONS is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -907,10 +943,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -920,34 +956,33 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -969,8 +1004,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1035,7 +1070,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1057,6 +1091,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1094,12 +1129,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1107,6 +1142,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/nucleo-f4x1re/f411-nsh/Make.defs b/configs/nucleo-f4x1re/f411-nsh/Make.defs
index 1b7212119167c46c7136e491d5652d21390889db..60c7c536f9624d986c220ba388e5e387cbe3470e 100644
--- a/configs/nucleo-f4x1re/f411-nsh/Make.defs
+++ b/configs/nucleo-f4x1re/f411-nsh/Make.defs
@@ -82,7 +82,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/nucleo-f4x1re/f411-nsh/defconfig b/configs/nucleo-f4x1re/f411-nsh/defconfig
index 1192acfa94b34f5ade220dc89dc4a3d0fda94757..9217ce67d2bac0c5364b369ff2fc8c41efb1240f 100644
--- a/configs/nucleo-f4x1re/f411-nsh/defconfig
+++ b/configs/nucleo-f4x1re/f411-nsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -200,6 +200,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -410,6 +411,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -423,9 +430,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -523,11 +538,11 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -543,9 +558,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=10
@@ -638,6 +656,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -657,9 +676,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -673,8 +697,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -682,6 +716,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -690,9 +725,10 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -738,19 +774,25 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -788,12 +830,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -858,7 +894,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -866,8 +901,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -901,7 +938,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_BUTTONS is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -909,10 +945,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -922,34 +958,33 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -971,8 +1006,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1037,7 +1072,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1059,6 +1093,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1096,12 +1131,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1109,6 +1144,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/nucleo-f4x1re/include/board.h b/configs/nucleo-f4x1re/include/board.h
index cd6db041bd0150df0951a5a3f1c07a833cf2e996..888e79c9a5c72f49bd6e9c5b25bb2217099561d4 100644
--- a/configs/nucleo-f4x1re/include/board.h
+++ b/configs/nucleo-f4x1re/include/board.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/nucleo-f4x1re/include/board.h
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -216,6 +216,9 @@
 
 #define BUTTON_USER_BIT    (1 << BUTTON_USER)
 
+#define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_1 | GPIO_PULLUP)
+#define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_1 | GPIO_PULLUP)
+
 /************************************************************************************
  * Public Data
  ************************************************************************************/
diff --git a/configs/nucleo-f4x1re/include/nucleo-f401re.h b/configs/nucleo-f4x1re/include/nucleo-f401re.h
index 581c154e70679a96f2554abdc4b13b9d1c99ed5a..1460f5c3cc37839f21e3849263dd9c109f2f2dba 100644
--- a/configs/nucleo-f4x1re/include/nucleo-f401re.h
+++ b/configs/nucleo-f4x1re/include/nucleo-f401re.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/nucleo-f4x1re/include/nucleo-f401re.h
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -168,8 +168,14 @@
  */
 /* REVISIT */
 
-#define STM32_TIM18_FREQUENCY   (2*STM32_PCLK2_FREQUENCY)
-#define STM32_TIM27_FREQUENCY   (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM1_FREQUENCY    (2*STM32_PCLK2_FREQUENCY)
+#define BOARD_TIM2_FREQUENCY    (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM3_FREQUENCY    (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM4_FREQUENCY    (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM5_FREQUENCY    (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM6_FREQUENCY    (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM7_FREQUENCY    (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM8_FREQUENCY    (2*STM32_PCLK2_FREQUENCY)
 
 /* SDIO dividers.  Note that slower clocking is required when DMA is disabled 
  * in order to avoid RX overrun/TX underrun errors due to delayed responses
diff --git a/configs/nucleo-f4x1re/include/nucleo-f411re.h b/configs/nucleo-f4x1re/include/nucleo-f411re.h
index 84018f7d4be6adb995bb0e17ed2f7d74503ff7cc..1d6908bae52cb1c7b889d7a93cfe8a3b704a6629 100644
--- a/configs/nucleo-f4x1re/include/nucleo-f411re.h
+++ b/configs/nucleo-f4x1re/include/nucleo-f411re.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/nucleo-f4x1re/include/nucleo-f411re.h
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -164,8 +164,14 @@
  */
 /* REVISIT */
 
-#define STM32_TIM18_FREQUENCY   (2*STM32_PCLK2_FREQUENCY)
-#define STM32_TIM27_FREQUENCY   (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM1_FREQUENCY    (2*STM32_PCLK2_FREQUENCY)
+#define BOARD_TIM2_FREQUENCY    (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM3_FREQUENCY    (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM4_FREQUENCY    (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM5_FREQUENCY    (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM6_FREQUENCY    (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM7_FREQUENCY    (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM8_FREQUENCY    (2*STM32_PCLK2_FREQUENCY)
 
 /* SDIO dividers.  Note that slower clocking is required when DMA is disabled
  * in order to avoid RX overrun/TX underrun errors due to delayed responses
diff --git a/configs/nucleo-f4x1re/src/Makefile b/configs/nucleo-f4x1re/src/Makefile
index c5d250f03dd45f1022095a2431f6fd9ebeba02aa..7778dd7f00181fdf69e47400df7503ae4e696d5d 100644
--- a/configs/nucleo-f4x1re/src/Makefile
+++ b/configs/nucleo-f4x1re/src/Makefile
@@ -62,6 +62,10 @@ CSRCS += stm32_ajoystick.c
 endif
 endif
 
+ifeq ($(CONFIG_QENCODER),y)
+CSRCS += stm32_qencoder.c
+endif
+
 ifeq ($(CONFIG_NSH_LIBRARY),y)
 CSRCS += stm32_appinit.c
 endif
diff --git a/configs/nucleo-f4x1re/src/nucleo-f4x1re.h b/configs/nucleo-f4x1re/src/nucleo-f4x1re.h
index 21e5f7b09d28ba8edc70837a51ee1ce0040b8d3f..c3d1a62ea053568b881a057b450390f9bf7a7c88 100644
--- a/configs/nucleo-f4x1re/src/nucleo-f4x1re.h
+++ b/configs/nucleo-f4x1re/src/nucleo-f4x1re.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/nucleo-f4x1re/src/nucleo-f4x1re.h
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Authors: Frank Bennett
  *            Gregory Nutt 
  *
@@ -309,15 +309,27 @@ void stm32_spidev_initialize(void);
 void stm32_usbinitialize(void);
 
 /************************************************************************************
- * Name: board_adc_initialize
+ * Name: stm32_adc_setup
  *
  * Description:
- *   Initialize and register the ADC driver(s)
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ADC
-int board_adc_initialize(void);
+int stm32_adc_setup(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_qencoder_initialize
+ *
+ * Description:
+ *   Initialize and register a qencoder
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_QENCODER
+int stm32_qencoder_initialize(FAR const char *devpath, int timer);
 #endif
 
 /****************************************************************************
diff --git a/configs/nucleo-f4x1re/src/stm32_adc.c b/configs/nucleo-f4x1re/src/stm32_adc.c
index e6aaf7cc4ce416910218514956057503a02487f8..e4fb1c7f6e609aa28e236639ddfae9b2aa5b7367 100644
--- a/configs/nucleo-f4x1re/src/stm32_adc.c
+++ b/configs/nucleo-f4x1re/src/stm32_adc.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/nucleo-f4x1re/src/stm32_adc.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -71,7 +71,6 @@
  ************************************************************************************/
 /* Identifying number of each ADC channel. */
 
-#ifdef CONFIG_STM32_ADC1
 #ifdef CONFIG_AJOYSTICK
 #ifdef CONFIG_ADC_DMA
 /* The Itead analog joystick gets inputs on ADC_IN0 and ADC_IN1 */
@@ -95,87 +94,51 @@ static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS]  = {GPIO_ADC1_IN0};
 
 #endif /* CONFIG_ADC_DMA */
 #endif /* CONFIG_AJOYSTICK */
-#endif /* CONFIG_STM32_ADC1*/
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
 
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_adc_initialize
+ * Name: stm32_adc_setup
  *
  * Description:
- *   Initialize and register the ADC driver
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
-int board_adc_initialize(void)
+int stm32_adc_setup(void)
 {
-  static bool initialized = false;
   struct adc_dev_s *adc;
   int ret;
   int i;
 
-  /* Check if we have already initialized */
+  /* Configure the pins as analog inputs for the selected channels */
 
-  if (!initialized)
+  for (i = 0; i < ADC1_NCHANNELS; i++)
     {
-#ifdef CONFIG_STM32_ADC1
-      /* Configure the pins as analog inputs for the selected channels */
-
-      for (i = 0; i < ADC1_NCHANNELS; i++)
-        {
-          stm32_configgpio(g_adc1_pinlist[i]);
-        }
-
-      /* Call stm32_adcinitialize() to get an instance of the ADC interface */
-
-      adc = stm32_adcinitialize(1, g_adc1_chanlist, ADC1_NCHANNELS);
-      if (adc == NULL)
-        {
-          adbg("ERROR: Failed to get ADC interface\n");
-          return -ENODEV;
-        }
-
-      /* Register the ADC driver at "/dev/adc0" */
-
-      ret = adc_register("/dev/adc0", adc);
-      if (ret < 0)
-        {
-          adbg("adc_register failed: %d\n", ret);
-          return ret;
-        }
-#endif
-      /* Now we are initialized */
+      stm32_configgpio(g_adc1_pinlist[i]);
+    }
+
+  /* Call stm32_adcinitialize() to get an instance of the ADC interface */
 
-      initialized = true;
+  adc = stm32_adcinitialize(1, g_adc1_chanlist, ADC1_NCHANNELS);
+  if (adc == NULL)
+    {
+      aerr("ERROR: Failed to get ADC interface\n");
+      return -ENODEV;
     }
 
-  return OK;
-}
+  /* Register the ADC driver at "/dev/adc0" */
 
-/************************************************************************************
- * Name: board_adc_setup
- *
- * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/adc.
- *
- ************************************************************************************/
+  ret = adc_register("/dev/adc0", adc);
+  if (ret < 0)
+    {
+      aerr("ERROR: adc_register failed: %d\n", ret);
+      return ret;
+    }
 
-#ifdef CONFIG_EXAMPLES_ADC
-int board_adc_setup(void)
-{
-#ifdef CONFIG_SAMA5_ADC
-  return board_adc_initialize();
-#else
-  return -ENOSYS;
-#endif
+  return OK;
 }
-#endif /* CONFIG_EXAMPLES_ADC */
 
 #endif /* CONFIG_STM32_ADC1 */
diff --git a/configs/nucleo-f4x1re/src/stm32_ajoystick.c b/configs/nucleo-f4x1re/src/stm32_ajoystick.c
index 61eaccf244ff58e970b6298e0b42c2ed8f3cfb95..fc5b5cc237eb26429a6339bb59a77f86e621dab4 100644
--- a/configs/nucleo-f4x1re/src/stm32_ajoystick.c
+++ b/configs/nucleo-f4x1re/src/stm32_ajoystick.c
@@ -122,7 +122,7 @@ static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower,
                          ajoy_handler_t handler, FAR void *arg);
 
 static void ajoy_disable(void);
-static int ajoy_interrupt(int irq, FAR void *context);
+static int ajoy_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /****************************************************************************
  * Private Data
@@ -179,7 +179,7 @@ static FAR void *g_ajoyarg;
 
 static ajoy_buttonset_t ajoy_supported(FAR const struct ajoy_lowerhalf_s *lower)
 {
-  ivdbg("Supported: %02x\n", AJOY_SUPPORTED);
+  iinfo("Supported: %02x\n", AJOY_SUPPORTED);
   return (ajoy_buttonset_t)AJOY_SUPPORTED;
 }
 
@@ -206,20 +206,21 @@ static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
    * channels are enabled).
    */
 
-  nread = file_read(&g_adcfile, adcmsg, MAX_ADC_CHANNELS * sizeof(struct adc_msg_s));
+  nread = file_read(&g_adcfile, adcmsg,
+                    MAX_ADC_CHANNELS * sizeof(struct adc_msg_s));
   if (nread < 0)
     {
       int errcode = get_errno();
       if (errcode != EINTR)
         {
-          idbg("ERROR: read failed: %d\n", errcode);
+          ierr("ERROR: read failed: %d\n", errcode);
         }
 
       return -errcode;
     }
   else if (nread < NJOYSTICK_CHANNELS * sizeof(struct adc_msg_s))
     {
-      idbg("ERROR: read too small: %ld\n", (long)nread);
+      ierr("ERROR: read too small: %ld\n", (long)nread);
       return -EIO;
     }
 
@@ -249,7 +250,7 @@ static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
           sample->as_x = (int16_t)tmp;
           have |= 1;
 
-          ivdbg("X sample: %ld -> %d\n", (long)tmp, (int)sample->as_x);
+          iinfo("X sample: %ld -> %d\n", (long)tmp, (int)sample->as_x);
         }
 
 #ifdef CONFIG_ADC_DMA
@@ -259,14 +260,14 @@ static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
           sample->as_y = (int16_t)tmp;
           have |= 2;
 
-          ivdbg("Y sample: %ld -> %d\n", (long)tmp, (int)sample->as_y);
+          iinfo("Y sample: %ld -> %d\n", (long)tmp, (int)sample->as_y);
         }
 #endif
     }
 
   if (have != 3)
     {
-      idbg("ERROR: Could not find joystick channels\n");
+      ierr("ERROR: Could not find joystick channels\n");
       return -EIO;
     }
 
@@ -280,7 +281,7 @@ static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
   /* Sample the discrete button inputs */
 
   sample->as_buttons = ajoy_buttons(lower);
-  ivdbg("Returning: %02x\n", sample->as_buttons);
+  iinfo("Returning: %02x\n", sample->as_buttons);
   return OK;
 }
 
@@ -311,7 +312,7 @@ static ajoy_buttonset_t ajoy_buttons(FAR const struct ajoy_lowerhalf_s *lower)
         }
     }
 
-  ivdbg("Returning: %02x\n", ret);
+  iinfo("Returning: %02x\n", ret);
   return ret;
 }
 
@@ -340,8 +341,8 @@ static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower,
   flags = enter_critical_section();
   ajoy_disable();
 
-  illvdbg("press: %02x release: %02x handler: %p arg: %p\n",
-          press, release, handler, arg);
+  iinfo("press: %02x release: %02x handler: %p arg: %p\n",
+        press, release, handler, arg);
 
   /* If no events are indicated or if no handler is provided, then this
    * must really be a request to disable interrupts.
@@ -372,11 +373,11 @@ static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower,
                falling = ((press & bit) != 0);
                rising  = ((release & bit) != 0);
 
-               illvdbg("GPIO %d: rising: %d falling: %d\n",
-                        i, rising, falling);
+               iinfo("GPIO %d: rising: %d falling: %d\n",
+                      i, rising, falling);
 
                (void)stm32_gpiosetevent(g_joygpio[i], rising, falling,
-                                        true, ajoy_interrupt);
+                                        true, ajoy_interrupt, NULL);
              }
         }
     }
@@ -402,7 +403,7 @@ static void ajoy_disable(void)
   flags = enter_critical_section();
   for (i = 0; i < AJOY_NGPIOS; i++)
     {
-      (void)stm32_gpiosetevent(g_joygpio[i], false, false, false, NULL);
+      (void)stm32_gpiosetevent(g_joygpio[i], false, false, false, NULL, NULL);
     }
 
   leave_critical_section(flags);
@@ -421,7 +422,7 @@ static void ajoy_disable(void)
  *
  ****************************************************************************/
 
-static int ajoy_interrupt(int irq, FAR void *context)
+static int ajoy_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   DEBUGASSERT(g_ajoyhandler);
 
@@ -453,24 +454,16 @@ int board_ajoy_initialize(void)
 #ifndef NO_JOYSTICK_ADC
   int fd;
 
-  ivdbg("Initialize ADC driver: /dev/adc0\n");
-
-  /* Initialize ADC.  We will need this to read the ADC inputs */
-
-  ret = board_adc_initialize();
-  if (ret < 0)
-    {
-      idbg("ERROR: board_adc_initialize() failed: %d\n", ret);
-      return ret;
-    }
+  iinfo("Initialize ADC driver: /dev/adc0\n");
 
+  /* NOTE: The ADC driver was initialized earlier in the bring-up sequence. */
   /* Open the ADC driver for reading. */
 
   fd = open("/dev/adc0", O_RDONLY);
   if (fd < 0)
     {
       int errcode = get_errno();
-      idbg("ERROR: Failed to open /dev/adc0: %d\n", errcode);
+      ierr("ERROR: Failed to open /dev/adc0: %d\n", errcode);
       return -errcode;
     }
 
@@ -481,7 +474,7 @@ int board_ajoy_initialize(void)
   ret = file_detach(fd, &g_adcfile);
   if (ret < 0)
     {
-      idbg("ERROR: Failed to detach from file descriptor: %d\n", ret);
+      ierr("ERROR: Failed to detach from file descriptor: %d\n", ret);
       (void)close(fd);
       return ret;
     }
@@ -501,12 +494,12 @@ int board_ajoy_initialize(void)
 
   /* Register the joystick device as /dev/ajoy0 */
 
-  ivdbg("Initialize joystick driver: /dev/ajoy0\n");
+  iinfo("Initialize joystick driver: /dev/ajoy0\n");
 
   ret = ajoy_register("/dev/ajoy0", &g_ajoylower);
   if (ret < 0)
     {
-      idbg("ERROR: ajoy_register failed: %d\n", ret);
+      ierr("ERROR: ajoy_register failed: %d\n", ret);
 #ifndef NO_JOYSTICK_ADC
       file_close_detached(&g_adcfile);
 #endif
diff --git a/configs/nucleo-f4x1re/src/stm32_appinit.c b/configs/nucleo-f4x1re/src/stm32_appinit.c
index 97cbc4ffc48c6c02d60eb1528cc65b425ad66432..5845ad169f31f2044caa2a4caf33a468bd4a4be8 100644
--- a/configs/nucleo-f4x1re/src/stm32_appinit.c
+++ b/configs/nucleo-f4x1re/src/stm32_appinit.c
@@ -55,18 +55,6 @@
 
 #include "nucleo-f4x1re.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -112,9 +100,7 @@ void up_netinitialize(void)
 
 int board_app_initialize(uintptr_t arg)
 {
-#if defined(HAVE_MMCSD) || defined(CONFIG_AJOYSTICK)
-  int ret;
-#endif
+  int ret = OK;
 
   /* Configure CPU load estimation */
 
@@ -153,6 +139,29 @@ int board_app_initialize(uintptr_t arg)
   syslog(LOG_INFO, "[boot] Initialized SDIO\n");
 #endif
 
+#ifdef CONFIG_ADC
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = stm32_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_adc_setup failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_QENCODER
+  /* Initialize and register the qencoder driver */
+
+  ret = stm32_qencoder_initialize("/dev/qe0", CONFIG_NUCLEO_F401RE_QETIMER);
+  if (ret != OK)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to register the qencoder: %d\n",
+             ret);
+      return ret;
+    }
+#endif
+
 #ifdef CONFIG_AJOYSTICK
   /* Initialize and register the joystick driver */
 
@@ -166,5 +175,5 @@ int board_app_initialize(uintptr_t arg)
     }
 #endif
 
-  return OK;
+  return ret;
 }
diff --git a/configs/nucleo-f4x1re/src/stm32_autoleds.c b/configs/nucleo-f4x1re/src/stm32_autoleds.c
index 90a28ae0f12d1697da892ca64cfb8b7b79de0988..c37d1b016b10f46b24133f576ae76de0c3a3e4e2 100644
--- a/configs/nucleo-f4x1re/src/stm32_autoleds.c
+++ b/configs/nucleo-f4x1re/src/stm32_autoleds.c
@@ -54,30 +54,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/nucleo-f4x1re/src/stm32_buttons.c b/configs/nucleo-f4x1re/src/stm32_buttons.c
index 2960344c62e4403461b23b4254c1d9d05dd184d4..ab019d2a5c3ef0ec61ba9d8fb9ac402c211029f6 100644
--- a/configs/nucleo-f4x1re/src/stm32_buttons.c
+++ b/configs/nucleo-f4x1re/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/nucleo-f4x1re/src/stm32_buttons.c
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -49,18 +50,6 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -117,22 +106,21 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   if (id == BUTTON_USER)
     {
-      oldhandler = stm32_gpiosetevent(GPIO_BTN_USER, true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(GPIO_BTN_USER, true, true, true, irqhandler, arg);
     }
 
-  return oldhandler;
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/nucleo-f4x1re/src/stm32_io.c b/configs/nucleo-f4x1re/src/stm32_io.c
index 72563330d6c7d5be57d2b7ec074a0abca8c417f6..0fc399662aec46f15b52f6171ddcd32437b0fccb 100644
--- a/configs/nucleo-f4x1re/src/stm32_io.c
+++ b/configs/nucleo-f4x1re/src/stm32_io.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/nucleo-f4x1re/src/stm32_io.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include "chip/stm32_tim.h"
@@ -48,18 +49,6 @@
 
 #ifndef CONFIG_CC3000_PROBES
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -176,21 +165,21 @@ void up_write_outputs(int id, bool bits)
  *
  ****************************************************************************/
 
-xcpt_t up_irqio(int id, xcpt_t irqhandler)
+int up_irqio(int id, xcpt_t irqhandler, void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   /* The following should be atomic */
 
   if (id == 0)
     {
-      oldhandler = stm32_gpiosetevent(GPIO_D14, true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(GPIO_D14, true, true, true, irqhandler, arg);
     }
   else if (id == 1)
     {
-      oldhandler = stm32_gpiosetevent(GPIO_D15, true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(GPIO_D15, true, true, true, irqhandler, arg);
     }
 
-  return oldhandler;
+  return ret;
 }
 #endif /* CONFIG_CC3000_PROBES */
diff --git a/configs/nucleo-f4x1re/src/stm32_qencoder.c b/configs/nucleo-f4x1re/src/stm32_qencoder.c
new file mode 100644
index 0000000000000000000000000000000000000000..bac52a803e4086bf6314dc976ac259b070ef0839
--- /dev/null
+++ b/configs/nucleo-f4x1re/src/stm32_qencoder.c
@@ -0,0 +1,82 @@
+/************************************************************************************
+ * configs/stm32f4discovery/src/stm32_qencoder.c
+ *
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "chip.h"
+#include "up_arch.h"
+#include "stm32_qencoder.h"
+#include "nucleo-f4x1re.h"
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_qencoder_initialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following interface to work with
+ *   examples/qencoder.
+ *
+ ************************************************************************************/
+
+int stm32_qencoder_initialize(FAR const char *devpath, int timer)
+{
+  int ret;
+
+  /* Initialize a quadrature encoder interface. */
+
+  sninfo("Initializing the quadrature encoder using TIM%d\n", timer);
+  ret = stm32_qeinitialize(devpath, timer);
+  if (ret < 0)
+    {
+      snerr("ERROR: stm32_qeinitialize failed: %d\n", ret);
+    }
+
+  return ret;
+}
+
+#endif /* HAVE_QENCODER */
diff --git a/configs/nucleo-f4x1re/src/stm32_spi.c b/configs/nucleo-f4x1re/src/stm32_spi.c
index 9a1a0a17f31d453e064225cab69f9e029f0c7922..82026a0d26a2fd49c183787c6a72c65d51bb7137 100644
--- a/configs/nucleo-f4x1re/src/stm32_spi.c
+++ b/configs/nucleo-f4x1re/src/stm32_spi.c
@@ -55,29 +55,6 @@
 
 #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_SPI
-#  undef CONFIG_DEBUG_VERBOSE
-#endif
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /************************************************************************************
  * Public Data
  ************************************************************************************/
@@ -111,7 +88,7 @@ void weak_function stm32_spidev_initialize(void)
   g_spi1 = stm32_spibus_initialize(1);
   if (!g_spi1)
     {
-      spidbg("[boot] FAILED to initialize SPI port 1\n");
+      spierr("ERROR: FAILED to initialize SPI port 1\n");
     }
 
 #ifdef CONFIG_WL_CC3000
@@ -166,7 +143,7 @@ void weak_function stm32_spidev_initialize(void)
 #ifdef CONFIG_STM32_SPI1
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
 #ifdef CONFIG_WL_CC3000
   if (devid == SPIDEV_WIRELESS)
@@ -192,7 +169,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI2
 void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
 #ifdef CONFIG_WL_CC3000
   if (devid == SPIDEV_WIRELESS)
@@ -211,7 +188,7 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI3
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
diff --git a/configs/nucleo-f4x1re/src/stm32_userleds.c b/configs/nucleo-f4x1re/src/stm32_userleds.c
index 9b02b9af7492ba4c666bc4a3c41765fd8deda142..dd7750071188086c559662d2107b29e3d727932c 100644
--- a/configs/nucleo-f4x1re/src/stm32_userleds.c
+++ b/configs/nucleo-f4x1re/src/stm32_userleds.c
@@ -54,26 +54,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Function Prototypes
  ****************************************************************************/
diff --git a/configs/nucleo-f4x1re/src/stm32_wireless.c b/configs/nucleo-f4x1re/src/stm32_wireless.c
index 7b90d024c661a8fd7ae3846e030cfcfe22f836e0..c5012f043882bb948b87b42ccfa8402fda6211b5 100644
--- a/configs/nucleo-f4x1re/src/stm32_wireless.c
+++ b/configs/nucleo-f4x1re/src/stm32_wireless.c
@@ -118,7 +118,8 @@ struct stm32_config_s
  *   wl_read_irq        - Return the state of the interrupt GPIO input
  */
 
-static int  wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler);
+static int  wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler,
+                          FAR void *arg);
 static void wl_enable_irq(FAR struct cc3000_config_s *state, bool enable);
 static void wl_clear_irq(FAR struct cc3000_config_s *state);
 static void wl_select(FAR struct cc3000_config_s *state, bool enable);
@@ -157,6 +158,7 @@ static struct stm32_config_s g_cc3000_info =
   .dev.probe            = probe, /* This is used for debugging */
 #endif
   .handler              = NULL,
+  .arg                  = NULL,
 };
 
 /****************************************************************************
@@ -175,13 +177,15 @@ static struct stm32_config_s g_cc3000_info =
  * pendown - Return the state of the pen down GPIO input
  */
 
-static int wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler)
+static int wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler,
+                         FAR void *arg)
 {
   FAR struct stm32_config_s *priv = (FAR struct stm32_config_s *)state;
 
   /* Just save the handler for use when the interrupt is enabled */
 
   priv->handler = handler;
+  priv->arg     = arg;
   return OK;
 }
 
@@ -197,20 +201,22 @@ static void wl_enable_irq(FAR struct cc3000_config_s *state, bool enable)
 
   /* Attach and enable, or detach and disable */
 
-  ivdbg("enable:%d\n", enable);
+  iinfo("enable:%d\n", enable);
   if (enable)
     {
-      (void)stm32_gpiosetevent(GPIO_WIFI_INT, false, true, false, priv->handler);
+      (void)stm32_gpiosetevent(GPIO_WIFI_INT, false, true, false,
+                               priv->handler, priv->arg);
     }
   else
     {
-      (void)stm32_gpiosetevent(GPIO_WIFI_INT, false, false, false, NULL);
+      (void)stm32_gpiosetevent(GPIO_WIFI_INT, false, false, false,
+                               NULL, NULL);
     }
 }
 
 static void wl_enable_power(FAR struct cc3000_config_s *state, bool enable)
 {
-  ivdbg("enable:%d\n", enable);
+  iinfo("enable:%d\n", enable);
 
   /* Active high enable */
 
@@ -219,7 +225,7 @@ static void wl_enable_power(FAR struct cc3000_config_s *state, bool enable)
 
 static void wl_select(FAR struct cc3000_config_s *state, bool enable)
 {
-  ivdbg("enable:%d\n", enable);
+  iinfo("enable:%d\n", enable);
 
   /* Active high enable */
 
@@ -280,7 +286,7 @@ int wireless_archinitialize(size_t max_rx_size)
 
   /* Init SPI bus */
 
-  idbg("minor %d\n", minor);
+  iinfo("minor %d\n", minor);
   DEBUGASSERT(CONFIG_CC3000_DEVMINOR == 0);
 
 #ifdef CONFIG_CC3000_PROBES
@@ -295,7 +301,7 @@ int wireless_archinitialize(size_t max_rx_size)
   spi = stm32_spibus_initialize(CONFIG_CC3000_SPIDEV);
   if (!spi)
     {
-      idbg("Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV);
+      ierr("ERROR: Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV);
       return -ENODEV;
     }
 
@@ -305,7 +311,7 @@ int wireless_archinitialize(size_t max_rx_size)
   int ret = cc3000_register(spi, &g_cc3000_info.dev, CONFIG_CC3000_DEVMINOR);
   if (ret < 0)
     {
-      idbg("Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV);
+      ierr("ERROR: Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV);
       return -ENODEV;
     }
 
diff --git a/configs/nucleo-l476rg/include/board.h b/configs/nucleo-l476rg/include/board.h
index 32462f24775c22aaee1f7997995f52a9c3e04858..490e5af96895e403b33b5b3004c0ac62271b8918 100644
--- a/configs/nucleo-l476rg/include/board.h
+++ b/configs/nucleo-l476rg/include/board.h
@@ -102,6 +102,9 @@
 #define GPIO_USART2_RTS  GPIO_USART2_RTS_2
 #define GPIO_USART2_CTS  GPIO_USART2_CTS_2
 
+#define GPIO_UART4_RX   GPIO_UART4_RX_1    /* PA1 */
+#define GPIO_UART4_TX   GPIO_UART4_TX_1    /* PA0 */
+
 /* I2C
  *
  * The optional _GPIO configurations allow the I2C driver to manually
@@ -186,7 +189,7 @@
 #define LED_HEAPALLOCATE 0
 #define LED_IRQSENABLED  0
 #define LED_STACKCREATED 1
-#define LED_INIRQ        2
+#define LED_INIRQ        1
 #define LED_SIGNAL       2
 #define LED_ASSERTION    2
 #define LED_PANIC        1
@@ -202,6 +205,31 @@
 
 #define BUTTON_USER_BIT    (1 << BUTTON_USER)
 
+/* Quadrature encoder
+ * Default is to use timer 5 (32-bit) and encoder on PA0/PA1
+ */
+
+#define GPIO_TIM2_CH1IN GPIO_TIM2_CH1IN_1
+#define GPIO_TIM2_CH2IN GPIO_TIM2_CH2IN_1
+
+#define GPIO_TIM3_CH1IN GPIO_TIM3_CH1IN_3
+#define GPIO_TIM3_CH2IN GPIO_TIM3_CH2IN_3
+
+#define GPIO_TIM5_CH1IN GPIO_TIM5_CH1IN_1
+#define GPIO_TIM5_CH2IN GPIO_TIM5_CH2IN_1
+
+/* PWM output for full bridge, uses config 1, because port E is N/A on QFP64
+ * CH1     | 1(A8) 2(E9)
+ * CH2     | 1(A9) 2(E11)
+ * CHN1    | 1(A7) 2(B13) 3(E8)
+ * CHN2    | 1(B0) 2(B14) 3(E10)
+ */
+
+#define GPIO_TIM1_CH1OUT  GPIO_TIM1_CH1OUT_1
+#define GPIO_TIM1_CH1NOUT GPIO_TIM1_CH1N_1
+#define GPIO_TIM1_CH2OUT  GPIO_TIM1_CH2OUT_1
+#define GPIO_TIM1_CH2NOUT GPIO_TIM1_CH2N_1
+
 /************************************************************************************
  * Public Data
  ************************************************************************************/
diff --git a/configs/nucleo-l476rg/include/nucleo-l476rg.h b/configs/nucleo-l476rg/include/nucleo-l476rg.h
index e661f5965fb66fc70a609989c6abf1c92efb5f48..4f233b4f1678b938662cccfb4645aebab6f8bab2 100644
--- a/configs/nucleo-l476rg/include/nucleo-l476rg.h
+++ b/configs/nucleo-l476rg/include/nucleo-l476rg.h
@@ -463,6 +463,25 @@
 
 #endif
 
+/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
+ * otherwise frequency is 2xAPBx.
+ * Note: TIM1,8,15,16,17 are on APB2, others on APB1
+ */
+
+#define BOARD_TIM1_FREQUENCY    STM32L4_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    (STM32L4_HCLK_FREQUENCY / 2)
+#define BOARD_TIM3_FREQUENCY    (STM32L4_HCLK_FREQUENCY / 2)
+#define BOARD_TIM4_FREQUENCY    (STM32L4_HCLK_FREQUENCY / 2)
+#define BOARD_TIM5_FREQUENCY    (STM32L4_HCLK_FREQUENCY / 2)
+#define BOARD_TIM6_FREQUENCY    (STM32L4_HCLK_FREQUENCY / 2)
+#define BOARD_TIM7_FREQUENCY    (STM32L4_HCLK_FREQUENCY / 2)
+#define BOARD_TIM8_FREQUENCY    STM32L4_HCLK_FREQUENCY
+#define BOARD_TIM15_FREQUENCY   STM32L4_HCLK_FREQUENCY
+#define BOARD_TIM16_FREQUENCY   STM32L4_HCLK_FREQUENCY
+#define BOARD_TIM17_FREQUENCY   STM32L4_HCLK_FREQUENCY
+#define BOARD_LPTIM1_FREQUENCY  (STM32L4_HCLK_FREQUENCY / 2)
+#define BOARD_LPTIM2_FREQUENCY  (STM32L4_HCLK_FREQUENCY / 2)
+
 /************************************************************************************
  * Public Data
  ************************************************************************************/
diff --git a/configs/nucleo-l476rg/nsh/Make.defs b/configs/nucleo-l476rg/nsh/Make.defs
index 523dbd8c2285bb258056b739e73f180bd31110b6..7e03d46bb381a4ff12f3b79844ad1c8a0668e3ce 100644
--- a/configs/nucleo-l476rg/nsh/Make.defs
+++ b/configs/nucleo-l476rg/nsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/nucleo-l476rg/nsh/defconfig b/configs/nucleo-l476rg/nsh/defconfig
index 4f2c7c8da4e70e9eb03bfc261199ab839fd78fae..b9156d1774ee924086e6945f96ce8b8eeddd2053 100644
--- a/configs/nucleo-l476rg/nsh/defconfig
+++ b/configs/nucleo-l476rg/nsh/defconfig
@@ -42,37 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-CONFIG_ARCH_HAVE_HEAPCHECK=y
-CONFIG_DEBUG_VERBOSE=y
-
-#
-# Subsystem Debug Options
-#
-CONFIG_DEBUG_BINFMT=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_GRAPHICS=y
-CONFIG_DEBUG_LIB=y
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_DMA is not set
-# CONFIG_DEBUG_HEAP is not set
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-CONFIG_DEBUG_LEDS=y
-CONFIG_DEBUG_ANALOG=y
-CONFIG_DEBUG_GPIO=y
-# CONFIG_DEBUG_RTC is not set
-CONFIG_DEBUG_SPI=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 CONFIG_DEBUG_NOOPT=y
@@ -86,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -99,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -130,7 +106,9 @@ CONFIG_ARCH_CHIP_STM32L4=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -156,7 +134,6 @@ CONFIG_ARCH_HAVE_DPFPU=y
 # CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
-# CONFIG_DEBUG_HARDFAULT is not set
 
 #
 # ARMV7M Configuration Options
@@ -186,6 +163,8 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 CONFIG_ARCH_CHIP_STM32L476RG=y
 # CONFIG_ARCH_CHIP_STM32L476RE is not set
 # CONFIG_ARCH_CHIP_STM32L486 is not set
+# CONFIG_STM32L4_STM32L4X3 is not set
+CONFIG_STM32L4_STM32L4X6=y
 CONFIG_STM32L4_STM32L476XX=y
 # CONFIG_STM32L4_STM32L486XX is not set
 # CONFIG_STM32L4_FLASH_256KB is not set
@@ -193,15 +172,21 @@ CONFIG_STM32L4_STM32L476XX=y
 CONFIG_STM32L4_FLASH_1024KB=y
 
 #
-# SRAM2 Options
+# STM32L4 SRAM2 Options
 #
 CONFIG_STM32L4_SRAM2_HEAP=y
 CONFIG_STM32L4_SRAM2_INIT=y
 
+#
+# STM32L4 Peripherals
+#
+
 #
 # STM32L4 Peripheral Support
 #
 # CONFIG_STM32L4_HAVE_LTDC is not set
+CONFIG_STM32L4_HAVE_SAI1=y
+CONFIG_STM32L4_HAVE_SAI2=y
 # CONFIG_STM32L4_ADC is not set
 # CONFIG_STM32L4_CAN is not set
 # CONFIG_STM32L4_DAC is not set
@@ -229,6 +214,10 @@ CONFIG_STM32L4_DMA2=y
 # CONFIG_STM32L4_ADC3 is not set
 # CONFIG_STM32L4_AES is not set
 CONFIG_STM32L4_RNG=y
+# CONFIG_STM32L4_SAI1_A is not set
+# CONFIG_STM32L4_SAI1_B is not set
+# CONFIG_STM32L4_SAI2_A is not set
+# CONFIG_STM32L4_SAI2_B is not set
 
 #
 # AHB3 Peripherals
@@ -297,10 +286,22 @@ CONFIG_STM32L4_RTC_LSECLOCK=y
 CONFIG_STM32L4_SAI1PLL=y
 # CONFIG_STM32L4_SAI2PLL is not set
 
+#
+# Timer Configuration
+#
+# CONFIG_STM32L4_ONESHOT is not set
+# CONFIG_STM32L4_FREERUN is not set
+CONFIG_STM32L4_HAVE_USART1=y
+CONFIG_STM32L4_HAVE_USART2=y
+CONFIG_STM32L4_HAVE_USART3=y
+CONFIG_STM32L4_HAVE_UART4=y
+CONFIG_STM32L4_HAVE_UART5=y
+
 #
 # U[S]ART Configuration
 #
 # CONFIG_STM32L4_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32L4_USART_BREAKS is not set
 
 #
 # Architecture Options
@@ -365,6 +366,7 @@ CONFIG_RAM_SIZE=98304
 #
 CONFIG_ARCH_BOARD_NUCLEO_L476RG=y
 # CONFIG_ARCH_BOARD_STM32L476VG_DISCO is not set
+# CONFIG_ARCH_BOARD_STM32L476_MDK is not set
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="nucleo-l476rg"
 
@@ -376,17 +378,15 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -403,9 +403,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=8
@@ -415,6 +418,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -431,6 +435,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -497,6 +503,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
 CONFIG_ARCH_HAVE_RNG=y
 CONFIG_DEV_RANDOM=y
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -512,19 +519,25 @@ CONFIG_DEV_RANDOM=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 CONFIG_RTC_ALARM=y
@@ -538,8 +551,18 @@ CONFIG_RTC_IOCTL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -547,6 +570,7 @@ CONFIG_RTC_IOCTL=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -555,9 +579,10 @@ CONFIG_RTC_IOCTL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -581,16 +606,11 @@ CONFIG_USART2_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
-# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_USART2_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -608,19 +628,26 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -644,6 +671,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_DISABLE_MOUNTPOINT is not set
 # CONFIG_FS_AUTOMOUNTER is not set
 # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_PSEUDOFS_SOFTLINKS is not set
 # CONFIG_FS_READABLE is not set
 # CONFIG_FS_WRITABLE is not set
 # CONFIG_FS_NAMED_SEMAPHORES is not set
@@ -658,12 +686,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -704,40 +726,103 @@ CONFIG_BUILTIN=y
 #
 # Standard C Library Options
 #
+
+#
+# Standard C I/O
+#
+# CONFIG_STDIO_DISABLE_BUFFERING is not set
 CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
-CONFIG_LIB_HOMEDIR="/"
-# CONFIG_LIBM is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
-# CONFIG_LIBC_IOCTL_VARIADIC is not set
-CONFIG_LIB_RAND_ORDER=1
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
 # CONFIG_EOL_IS_BOTH_CRLF is not set
 CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_LIBM is not set
+
+#
+# Architecture-Specific Support
+#
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
+
+#
+# stdlib Options
+#
+CONFIG_LIB_RAND_ORDER=1
+CONFIG_LIB_HOMEDIR="/"
+
+#
+# Program Execution Options
+#
 # CONFIG_LIBC_EXECFUNCS is not set
 CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
 CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+
+#
+# errno Decode Support
+#
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
-CONFIG_ARCH_LOWPUTC=y
+
+#
+# memcpy/memset Options
+#
+# CONFIG_MEMSET_OPTSPEED is not set
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+
+#
+# Time/Time Zone Support
+#
 # CONFIG_LIBC_LOCALTIME is not set
 # CONFIG_TIME_EXTENDED is not set
-CONFIG_LIB_SENDFILE_BUFSIZE=512
-# CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
+
+#
+# Thread Local Storage (TLS)
+#
 # CONFIG_TLS is not set
+
+#
+# Network-Related Options
+#
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 
+#
+# NETDB Support
+#
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -773,9 +858,10 @@ CONFIG_EXAMPLES_ALARM_PRIORITY=100
 CONFIG_EXAMPLES_ALARM_STACKSIZE=2048
 CONFIG_EXAMPLES_ALARM_DEVPATH="/dev/rtc0"
 CONFIG_EXAMPLES_ALARM_SIGNO=1
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -783,10 +869,10 @@ CONFIG_EXAMPLES_ALARM_SIGNO=1
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -796,11 +882,11 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 CONFIG_EXAMPLES_OSTEST=y
 CONFIG_EXAMPLES_OSTEST_LOOPS=1
@@ -810,30 +896,30 @@ CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000
 CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 CONFIG_EXAMPLES_OSTEST_WAITRESULT=y
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 CONFIG_EXAMPLES_RANDOM=y
 CONFIG_EXAMPLES_MAXSAMPLES=64
 CONFIG_EXAMPLES_NSAMPLES=8
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_STAT is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -855,8 +941,9 @@ CONFIG_EXAMPLES_NSAMPLES=8
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -867,6 +954,7 @@ CONFIG_EXAMPLES_NSAMPLES=8
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -920,12 +1008,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -942,11 +1030,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 CONFIG_NSH_FILEIOSIZE=512
@@ -979,12 +1069,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -992,7 +1082,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
-# CONFIG_SYSTEM_DISCOTEST is not set
diff --git a/configs/nucleo-l476rg/src/Makefile b/configs/nucleo-l476rg/src/Makefile
index 46faa0d565b9217412498c4b42ea7378badbd628..a27b0f3b84f937ea7a2dcbcec7dfcc0495f43caa 100644
--- a/configs/nucleo-l476rg/src/Makefile
+++ b/configs/nucleo-l476rg/src/Makefile
@@ -62,6 +62,18 @@ CSRCS += stm32_ajoystick.c
 endif
 endif
 
+ifeq ($(CONFIG_QENCODER),y)
+CSRCS += stm32_qencoder.c
+endif
+
+ifeq ($(CONFIG_PWM),y)
+CSRCS += stm32_pwm.c
+endif
+
+ifeq ($(CONFIG_TIMER),y)
+CSRCS += stm32_timer.c
+endif
+
 ifeq ($(CONFIG_LIB_BOARDCTL),y)
 CSRCS += stm32_appinit.c
 endif
diff --git a/configs/nucleo-l476rg/src/nucleo-l476rg.h b/configs/nucleo-l476rg/src/nucleo-l476rg.h
index d35d247349ab28bab2efe55a2a56b63ee1d0af32..e82283b177c3e79b48fc4ffe07b1e566086ff992 100644
--- a/configs/nucleo-l476rg/src/nucleo-l476rg.h
+++ b/configs/nucleo-l476rg/src/nucleo-l476rg.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/nucleo-l476rg/src/nucleo-l476rg.h
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Authors: Frank Bennett
  *            Gregory Nutt 
  *            Sebastien Lorquet 
@@ -328,15 +328,27 @@ void stm32_spiinitialize(void);
 void stm32_usbinitialize(void);
 
 /************************************************************************************
- * Name: board_adc_initialize
+ * Name: stm32_pwm_setup
  *
  * Description:
- *   Initialize and register the ADC driver(s)
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PWM
+int stm32_pwm_setup(void);
+#endif
+
+/************************************************************************************
+ * Name: stm32_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ADC
-int board_adc_initialize(void);
+int stm32_adc_setup(void);
 #endif
 
 /****************************************************************************
@@ -351,4 +363,28 @@ int board_adc_initialize(void);
 int board_ajoy_initialize(void);
 #endif
 
+/****************************************************************************
+ * Name: board_timer_driver_initialize
+ *
+ * Description:
+ *   Initialize and register a timer
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_TIMER
+int board_timer_driver_initialize(FAR const char *devpath, int timer);
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_qencoder_initialize
+ *
+ * Description:
+ *   Initialize and register a qencoder
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_QENCODER
+int stm32l4_qencoder_initialize(FAR const char *devpath, int timer);
+#endif
+
 #endif /* __CONFIGS_NUCLEO_L476RG_SRC_NUCLEO_L476RG_H */
diff --git a/configs/nucleo-l476rg/src/stm32_adc.c b/configs/nucleo-l476rg/src/stm32_adc.c
index 45329b381785f2073d721e080e90bab5f13adc48..7ca4b18ab032d2eaa43998f9dbed93aa85398537 100644
--- a/configs/nucleo-l476rg/src/stm32_adc.c
+++ b/configs/nucleo-l476rg/src/stm32_adc.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/nucleo-l476rg/src/stm32_adc.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -71,7 +71,6 @@
  ************************************************************************************/
 /* Identifying number of each ADC channel. */
 
-#ifdef CONFIG_STM32_ADC1
 #ifdef CONFIG_AJOYSTICK
 #ifdef CONFIG_ADC_DMA
 /* The Itead analog joystick gets inputs on ADC_IN0 and ADC_IN1 */
@@ -95,7 +94,6 @@ static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS]  = {GPIO_ADC1_IN0};
 
 #endif /* CONFIG_ADC_DMA */
 #endif /* CONFIG_AJOYSTICK */
-#endif /* CONFIG_STM32_ADC1*/
 
 /************************************************************************************
  * Private Functions
@@ -106,76 +104,45 @@ static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS]  = {GPIO_ADC1_IN0};
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_adc_initialize
+ * Name: stm32_adc_setup
  *
  * Description:
- *   Initialize and register the ADC driver
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
-int board_adc_initialize(void)
+int stm32_adc_setup(void)
 {
-  static bool initialized = false;
   struct adc_dev_s *adc;
   int ret;
   int i;
 
-  /* Check if we have already initialized */
+  /* Configure the pins as analog inputs for the selected channels */
 
-  if (!initialized)
+  for (i = 0; i < ADC1_NCHANNELS; i++)
     {
-#ifdef CONFIG_STM32_ADC1
-      /* Configure the pins as analog inputs for the selected channels */
-
-      for (i = 0; i < ADC1_NCHANNELS; i++)
-        {
-          stm32_configgpio(g_adc1_pinlist[i]);
-        }
-
-      /* Call stm32_adcinitialize() to get an instance of the ADC interface */
-
-      adc = stm32_adcinitialize(1, g_adc1_chanlist, ADC1_NCHANNELS);
-      if (adc == NULL)
-        {
-          adbg("ERROR: Failed to get ADC interface\n");
-          return -ENODEV;
-        }
-
-      /* Register the ADC driver at "/dev/adc0" */
-
-      ret = adc_register("/dev/adc0", adc);
-      if (ret < 0)
-        {
-          adbg("adc_register failed: %d\n", ret);
-          return ret;
-        }
-#endif
-      /* Now we are initialized */
+      stm32_configgpio(g_adc1_pinlist[i]);
+    }
+
+  /* Call stm32_adcinitialize() to get an instance of the ADC interface */
 
-      initialized = true;
+  adc = stm32_adcinitialize(1, g_adc1_chanlist, ADC1_NCHANNELS);
+  if (adc == NULL)
+    {
+      aerr("ERROR: Failed to get ADC interface\n");
+      return -ENODEV;
     }
 
-  return OK;
-}
+  /* Register the ADC driver at "/dev/adc0" */
 
-/************************************************************************************
- * Name: board_adc_setup
- *
- * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/adc.
- *
- ************************************************************************************/
+  ret = adc_register("/dev/adc0", adc);
+  if (ret < 0)
+    {
+      aerr("ERROR: adc_register failed: %d\n", ret);
+      return ret;
+    }
 
-#ifdef CONFIG_EXAMPLES_ADC
-int board_adc_setup(void)
-{
-#ifdef CONFIG_SAMA5_ADC
-  return board_adc_initialize();
-#else
-  return -ENOSYS;
-#endif
+  return OK;
 }
-#endif /* CONFIG_EXAMPLES_ADC */
 
 #endif /* CONFIG_STM32_ADC1 */
diff --git a/configs/nucleo-l476rg/src/stm32_ajoystick.c b/configs/nucleo-l476rg/src/stm32_ajoystick.c
index bd57040a78f91a8cbf899f7c902f72845476ef83..3c20ebca2ecff067a4c893772830bdb717d0edb5 100644
--- a/configs/nucleo-l476rg/src/stm32_ajoystick.c
+++ b/configs/nucleo-l476rg/src/stm32_ajoystick.c
@@ -121,7 +121,7 @@ static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower,
                          ajoy_handler_t handler, FAR void *arg);
 
 static void ajoy_disable(void);
-static int ajoy_interrupt(int irq, FAR void *context);
+static int ajoy_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /****************************************************************************
  * Private Data
@@ -178,7 +178,7 @@ static FAR void *g_ajoyarg;
 
 static ajoy_buttonset_t ajoy_supported(FAR const struct ajoy_lowerhalf_s *lower)
 {
-  ivdbg("Supported: %02x\n", AJOY_SUPPORTED);
+  iinfo("Supported: %02x\n", AJOY_SUPPORTED);
   return (ajoy_buttonset_t)AJOY_SUPPORTED;
 }
 
@@ -205,20 +205,21 @@ static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
    * channels are enabled).
    */
 
-  nread = file_read(&g_adcfile, adcmsg, MAX_ADC_CHANNELS * sizeof(struct adc_msg_s));
+  nread = file_read(&g_adcfile, adcmsg,
+                    MAX_ADC_CHANNELS * sizeof(struct adc_msg_s));
   if (nread < 0)
     {
       int errcode = get_errno();
       if (errcode != EINTR)
         {
-          idbg("ERROR: read failed: %d\n", errcode);
+          ierr("ERROR: read failed: %d\n", errcode);
         }
 
       return -errcode;
     }
   else if (nread < NJOYSTICK_CHANNELS * sizeof(struct adc_msg_s))
     {
-      idbg("ERROR: read too small: %ld\n", (long)nread);
+      ierr("ERROR: read too small: %ld\n", (long)nread);
       return -EIO;
     }
 
@@ -248,7 +249,7 @@ static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
           sample->as_x = (int16_t)tmp;
           have |= 1;
 
-          ivdbg("X sample: %ld -> %d\n", (long)tmp, (int)sample->as_x);
+          iinfo("X sample: %ld -> %d\n", (long)tmp, (int)sample->as_x);
         }
 
 #ifdef CONFIG_ADC_DMA
@@ -258,14 +259,14 @@ static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
           sample->as_y = (int16_t)tmp;
           have |= 2;
 
-          ivdbg("Y sample: %ld -> %d\n", (long)tmp, (int)sample->as_y);
+          iinfo("Y sample: %ld -> %d\n", (long)tmp, (int)sample->as_y);
         }
 #endif
     }
 
   if (have != 3)
     {
-      idbg("ERROR: Could not find joystick channels\n");
+      ierr("ERROR: Could not find joystick channels\n");
       return -EIO;
     }
 
@@ -279,7 +280,7 @@ static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
   /* Sample the discrete button inputs */
 
   sample->as_buttons = ajoy_buttons(lower);
-  ivdbg("Returning: %02x\n", sample->as_buttons);
+  iinfo("Returning: %02x\n", sample->as_buttons);
   return OK;
 }
 
@@ -310,7 +311,7 @@ static ajoy_buttonset_t ajoy_buttons(FAR const struct ajoy_lowerhalf_s *lower)
         }
     }
 
-  ivdbg("Returning: %02x\n", ret);
+  iinfo("Returning: %02x\n", ret);
   return ret;
 }
 
@@ -339,8 +340,8 @@ static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower,
   flags = enter_critical_section();
   ajoy_disable();
 
-  illvdbg("press: %02x release: %02x handler: %p arg: %p\n",
-          press, release, handler, arg);
+  iinfo("press: %02x release: %02x handler: %p arg: %p\n",
+        press, release, handler, arg);
 
   /* If no events are indicated or if no handler is provided, then this
    * must really be a request to disable interrupts.
@@ -371,11 +372,11 @@ static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower,
                falling = ((press & bit) != 0);
                rising  = ((release & bit) != 0);
 
-               illvdbg("GPIO %d: rising: %d falling: %d\n",
-                        i, rising, falling);
+               iinfo("GPIO %d: rising: %d falling: %d\n",
+                      i, rising, falling);
 
                (void)stm32_gpiosetevent(g_joygpio[i], rising, falling,
-                                        true, ajoy_interrupt);
+                                        true, ajoy_interrupt, NULL);
              }
         }
     }
@@ -401,7 +402,7 @@ static void ajoy_disable(void)
   flags = up_irq_save();
   for (i = 0; i < AJOY_NGPIOS; i++)
     {
-      (void)stm32_gpiosetevent(g_joygpio[i], false, false, false, NULL);
+      (void)stm32_gpiosetevent(g_joygpio[i], false, false, false, NULL, NULL);
     }
 
   up_irq_restore(flags);
@@ -420,7 +421,7 @@ static void ajoy_disable(void)
  *
  ****************************************************************************/
 
-static int ajoy_interrupt(int irq, FAR void *context)
+static int ajoy_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   DEBUGASSERT(g_ajoyhandler);
 
@@ -452,24 +453,16 @@ int board_ajoy_initialize(void)
 #ifndef NO_JOYSTICK_ADC
   int fd;
 
-  ivdbg("Initialize ADC driver: /dev/adc0\n");
-
-  /* Initialize ADC.  We will need this to read the ADC inputs */
-
-  ret = board_adc_initialize();
-  if (ret < 0)
-    {
-      idbg("ERROR: board_adc_initialize() failed: %d\n", ret);
-      return ret;
-    }
+  iinfo("Initialize ADC driver: /dev/adc0\n");
 
+  /* NOTE: The ADC driver was initialized earlier in the bring-up sequence. */
   /* Open the ADC driver for reading. */
 
   fd = open("/dev/adc0", O_RDONLY);
   if (fd < 0)
     {
       int errcode = get_errno();
-      idbg("ERROR: Failed to open /dev/adc0: %d\n", errcode);
+      ierr("ERROR: Failed to open /dev/adc0: %d\n", errcode);
       return -errcode;
     }
 
@@ -480,7 +473,7 @@ int board_ajoy_initialize(void)
   ret = file_detach(fd, &g_adcfile);
   if (ret < 0)
     {
-      idbg("ERROR: Failed to detach from file descriptor: %d\n", ret);
+      ierr("ERROR: Failed to detach from file descriptor: %d\n", ret);
       (void)close(fd);
       return ret;
     }
@@ -500,12 +493,12 @@ int board_ajoy_initialize(void)
 
   /* Register the joystick device as /dev/ajoy0 */
 
-  ivdbg("Initialize joystick driver: /dev/ajoy0\n");
+  iinfo("Initialize joystick driver: /dev/ajoy0\n");
 
   ret = ajoy_register("/dev/ajoy0", &g_ajoylower);
   if (ret < 0)
     {
-      idbg("ERROR: ajoy_register failed: %d\n", ret);
+      ierr("ERROR: ajoy_register failed: %d\n", ret);
 #ifndef NO_JOYSTICK_ADC
       file_close_detached(&g_adcfile);
 #endif
diff --git a/configs/nucleo-l476rg/src/stm32_appinit.c b/configs/nucleo-l476rg/src/stm32_appinit.c
index 96190c07c5414b72fe5088ef544c092177834ece..41b54976ae472ce237dbd4a20b7cd5402f722416 100644
--- a/configs/nucleo-l476rg/src/stm32_appinit.c
+++ b/configs/nucleo-l476rg/src/stm32_appinit.c
@@ -111,14 +111,18 @@ int board_app_initialize(uintptr_t arg)
 {
 #ifdef HAVE_RTC_DRIVER
   FAR struct rtc_lowerhalf_s *rtclower;
+#endif
+#ifdef CONFIG_QENCODER
+  int index;
+  char buf[9];
 #endif
   int ret;
 
   (void)ret;
 
+#ifdef CONFIG_SCHED_INSTRUMENTATION
   /* Configure CPU load estimation */
 
-#ifdef CONFIG_SCHED_INSTRUMENTATION
   cpuload_initialize_once();
 #endif
 
@@ -143,7 +147,7 @@ int board_app_initialize(uintptr_t arg)
   rtclower = stm32l4_rtc_lowerhalf();
   if (!rtclower)
     {
-      sdbg("ERROR: Failed to instantiate the RTC lower-half driver\n");
+      serr("ERROR: Failed to instantiate the RTC lower-half driver\n");
       return -ENOMEM;
     }
   else
@@ -155,7 +159,7 @@ int board_app_initialize(uintptr_t arg)
       ret = rtc_initialize(0, rtclower);
       if (ret < 0)
         {
-          sdbg("ERROR: Failed to bind/register the RTC driver: %d\n", ret);
+          serr("ERROR: Failed to bind/register the RTC driver: %d\n", ret);
           return ret;
         }
     }
@@ -192,6 +196,26 @@ int board_app_initialize(uintptr_t arg)
   syslog(LOG_INFO, "[boot] Initialized SDIO\n");
 #endif
 
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device. */
+
+  ret = stm32_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_pwm_setup() failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_ADC
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = stm32_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_adc_setup failed: %d\n", ret);
+    }
+#endif
+
 #ifdef CONFIG_AJOYSTICK
   /* Initialize and register the joystick driver */
 
@@ -205,5 +229,120 @@ int board_app_initialize(uintptr_t arg)
     }
 #endif
 
+#ifdef CONFIG_TIMER
+  /* Initialize and register the timer driver */
+
+  ret = board_timer_driver_initialize("/dev/timer0", 2);
+  if (ret != OK)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to register the timer driver: %d\n",
+             ret);
+      return ret;
+    }
+#endif
+
+#ifdef CONFIG_QENCODER
+
+  /* Initialize and register the qencoder driver */
+
+  index = 0;
+
+#ifdef CONFIG_STM32L4_TIM1_QE
+  sprintf(buf, "/dev/qe%d", index++);
+  ret = stm32l4_qencoder_initialize(buf, 1);
+  if (ret != OK)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to register the qencoder: %d\n",
+             ret);
+      return ret;
+    }
+#endif
+
+#ifdef CONFIG_STM32L4_TIM2_QE
+  sprintf(buf, "/dev/qe%d", index++);
+  ret = stm32l4_qencoder_initialize(buf, 2);
+  if (ret != OK)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to register the qencoder: %d\n",
+             ret);
+      return ret;
+    }
+#endif
+
+#ifdef CONFIG_STM32L4_TIM3_QE
+  sprintf(buf, "/dev/qe%d", index++);
+  ret = stm32l4_qencoder_initialize(buf, 3);
+  if (ret != OK)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to register the qencoder: %d\n",
+             ret);
+      return ret;
+    }
+#endif
+
+#ifdef CONFIG_STM32L4_TIM4_QE
+  sprintf(buf, "/dev/qe%d", index++);
+  ret = stm32l4_qencoder_initialize(buf, 4);
+  if (ret != OK)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to register the qencoder: %d\n",
+             ret);
+      return ret;
+    }
+#endif
+
+#ifdef CONFIG_STM32L4_TIM5_QE
+  sprintf(buf, "/dev/qe%d", index++);
+  ret = stm32l4_qencoder_initialize(buf, 5);
+  if (ret != OK)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to register the qencoder: %d\n",
+             ret);
+      return ret;
+    }
+#endif
+
+#ifdef CONFIG_STM32L4_TIM8_QE
+  sprintf(buf, "/dev/qe%d", index++);
+  ret = stm32l4_qencoder_initialize(buf, 8);
+  if (ret != OK)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to register the qencoder: %d\n",
+             ret);
+      return ret;
+    }
+#endif
+
+#endif
+
+  UNUSED(ret);
+  return OK;
+}
+
+#ifdef CONFIG_BOARDCTL_IOCTL
+int board_ioctl(unsigned int cmd, uintptr_t arg)
+{
+  return -ENOTTY;
+}
+#endif
+
+#if defined(CONFIG_BOARDCTL_UNIQUEID)
+int board_uniqueid(uint8_t *uniqueid)
+{
+  if (uniqueid == 0)
+    {
+      return -EINVAL;
+    }
+
+  stm32l4_get_uniqueid(uniqueid);
   return OK;
 }
+#endif
+
diff --git a/configs/nucleo-l476rg/src/stm32_autoleds.c b/configs/nucleo-l476rg/src/stm32_autoleds.c
index a280311138c31364ec93b81223d78eba77a3a69e..eb1a1381c8df344ed55121832f73a1e76783db2c 100644
--- a/configs/nucleo-l476rg/src/stm32_autoleds.c
+++ b/configs/nucleo-l476rg/src/stm32_autoleds.c
@@ -54,30 +54,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/nucleo-l476rg/src/stm32_buttons.c b/configs/nucleo-l476rg/src/stm32_buttons.c
index f9211a13c7da39a86e55d952de6be983eb9ad41f..7da458ffb3cab1346cb9047dced116e8b35e382f 100644
--- a/configs/nucleo-l476rg/src/stm32_buttons.c
+++ b/configs/nucleo-l476rg/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/nucleo-l476rg/src/stm32_buttons.c
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -49,18 +50,6 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -117,22 +106,21 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   if (id == BUTTON_USER)
     {
-      oldhandler = stm32_gpiosetevent(GPIO_BTN_USER, true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(GPIO_BTN_USER, true, true, true, irqhandler, arg);
     }
 
-  return oldhandler;
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/nucleo-l476rg/src/stm32_io.c b/configs/nucleo-l476rg/src/stm32_io.c
index d98f2985bf22ef07e9336bc19cef5f8f016a71fa..59e356d401a1211fb44c95efb8efbc07e9db97dd 100644
--- a/configs/nucleo-l476rg/src/stm32_io.c
+++ b/configs/nucleo-l476rg/src/stm32_io.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/nucleo-l476rg/src/stm32_io.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include "chip/stm32l4_tim.h"
@@ -48,18 +49,6 @@
 
 #ifndef CONFIG_CC3000_PROBES
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -176,21 +165,21 @@ void up_write_outputs(int id, bool bits)
  *
  ****************************************************************************/
 
-xcpt_t up_irqio(int id, xcpt_t irqhandler)
+int up_irqio(int id, xcpt_t irqhandler, void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   /* The following should be atomic */
 
   if (id == 0)
     {
-      oldhandler = stm32_gpiosetevent(GPIO_D14, true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(GPIO_D14, true, true, true, irqhandler, arg);
     }
   else if (id == 1)
     {
-      oldhandler = stm32_gpiosetevent(GPIO_D15, true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(GPIO_D15, true, true, true, irqhandler, arg);
     }
 
-  return oldhandler;
+  return ret;
 }
 #endif /* CONFIG_CC3000_PROBES */
diff --git a/configs/nucleo-l476rg/src/stm32_pwm.c b/configs/nucleo-l476rg/src/stm32_pwm.c
new file mode 100644
index 0000000000000000000000000000000000000000..3db43caacf9d142d7da69c7b46b6234f03c0dd34
--- /dev/null
+++ b/configs/nucleo-l476rg/src/stm32_pwm.c
@@ -0,0 +1,272 @@
+/************************************************************************************
+ * configs/nucleo-l476rg/src/stm32_pwm.c
+ *
+ *   Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ *   Copyright (C) 2016 Sebastien Lorquet. All rights reserved.
+ *   Author: Sebastien Lorquet 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include "chip.h"
+#include "up_arch.h"
+#include "stm32l4_pwm.h"
+#include "nucleo-l476rg.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Configuration *******************************************************************/
+/* PWM
+ *
+ * The STM3240G-Eval has no real on-board PWM devices, but the board can be
+ * configured to output a pulse train using variously unused pins on the board for
+ * PWM output (see board.h for details of pins).
+ */
+
+#ifdef CONFIG_PWM
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+int stm32_pwm_setup(void)
+{
+  static bool initialized = false;
+  struct pwm_lowerhalf_s *pwm;
+  int ret;
+
+  /* Have we already initialized? */
+
+  if (!initialized)
+    {
+      /* Call stm32l4_pwminitialize() to get an instance of the PWM interface */
+
+      /* PWM
+       *
+       * The Nucleo-l476rg has no real on-board PWM devices, but the board can be
+       * configured to output a pulse train using TIM1 or 8, or others (see board.h).
+       * Let's figure out which the user has configured.
+       */
+
+#if defined(CONFIG_STM32L4_TIM1_PWM)
+      pwm = stm32l4_pwminitialize(1);
+      if (!pwm)
+        {
+          aerr("ERROR: Failed to get the STM32L4 PWM lower half\n");
+          return -ENODEV;
+        }
+
+      /* Register the PWM driver at "/dev/pwm0" */
+
+      ret = pwm_register("/dev/pwm0", pwm);
+      if (ret < 0)
+        {
+          aerr("ERROR: pwm_register failed: %d\n", ret);
+          return ret;
+        }
+#endif
+
+#if defined(CONFIG_STM32L4_TIM2_PWM)
+      pwm = stm32l4_pwminitialize(2);
+      if (!pwm)
+        {
+          aerr("ERROR: Failed to get the STM32L4 PWM lower half\n");
+          return -ENODEV;
+        }
+
+      /* Register the PWM driver at "/dev/pwm1" */
+
+      ret = pwm_register("/dev/pwm1", pwm);
+      if (ret < 0)
+        {
+          aerr("ERROR: pwm_register failed: %d\n", ret);
+          return ret;
+        }
+#endif
+
+#if defined(CONFIG_STM32L4_TIM3_PWM)
+      pwm = stm32l4_pwminitialize(3);
+      if (!pwm)
+        {
+          aerr("ERROR: Failed to get the STM32L4 PWM lower half\n");
+          return -ENODEV;
+        }
+
+      /* Register the PWM driver at "/dev/pwm2" */
+
+      ret = pwm_register("/dev/pwm2", pwm);
+      if (ret < 0)
+        {
+          aerr("ERROR: pwm_register failed: %d\n", ret);
+          return ret;
+        }
+#endif
+
+#if defined(CONFIG_STM32L4_TIM4_PWM)
+      pwm = stm32l4_pwminitialize(4);
+      if (!pwm)
+        {
+          aerr("ERROR: Failed to get the STM32L4 PWM lower half\n");
+          return -ENODEV;
+        }
+
+      /* Register the PWM driver at "/dev/pwm3" */
+
+      ret = pwm_register("/dev/pwm3", pwm);
+      if (ret < 0)
+        {
+          aerr("ERROR: pwm_register failed: %d\n", ret);
+          return ret;
+        }
+#endif
+
+#if defined(CONFIG_STM32L4_TIM5_PWM)
+      pwm = stm32l4_pwminitialize(5);
+      if (!pwm)
+        {
+          aerr("ERROR: Failed to get the STM32L4 PWM lower half\n");
+          return -ENODEV;
+        }
+
+      /* Register the PWM driver at "/dev/pwm4" */
+
+      ret = pwm_register("/dev/pwm4", pwm);
+      if (ret < 0)
+        {
+          aerr("ERROR: pwm_register failed: %d\n", ret);
+          return ret;
+        }
+#endif
+
+#if defined(CONFIG_STM32L4_TIM8_PWM)
+      pwm = stm32l4_pwminitialize(8);
+      if (!pwm)
+        {
+          aerr("ERROR: Failed to get the STM32L4 PWM lower half\n");
+          return -ENODEV;
+        }
+
+      /* Register the PWM driver at "/dev/pwm5" */
+
+      ret = pwm_register("/dev/pwm5", pwm);
+      if (ret < 0)
+        {
+          aerr("ERROR: pwm_register failed: %d\n", ret);
+          return ret;
+        }
+#endif
+
+#if defined(CONFIG_STM32L4_TIM15_PWM)
+      pwm = stm32l4_pwminitialize(15);
+      if (!pwm)
+        {
+          aerr("ERROR: Failed to get the STM32L4 PWM lower half\n");
+          return -ENODEV;
+        }
+
+      /* Register the PWM driver at "/dev/pwm6" */
+
+      ret = pwm_register("/dev/pwm6", pwm);
+      if (ret < 0)
+        {
+          aerr("ERROR: pwm_register failed: %d\n", ret);
+          return ret;
+        }
+#endif
+
+#if defined(CONFIG_STM32L4_TIM16_PWM)
+      pwm = stm32l4_pwminitialize(16);
+      if (!pwm)
+        {
+          aerr("ERROR: Failed to get the STM32L4 PWM lower half\n");
+          return -ENODEV;
+        }
+
+      /* Register the PWM driver at "/dev/pwm7" */
+
+      ret = pwm_register("/dev/pwm7", pwm);
+      if (ret < 0)
+        {
+          aerr("ERROR: pwm_register failed: %d\n", ret);
+          return ret;
+        }
+#endif
+
+#if defined(CONFIG_STM32L4_TIM17_PWM)
+      pwm = stm32l4_pwminitialize(17);
+      if (!pwm)
+        {
+          aerr("ERROR: Failed to get the STM32L4 PWM lower half\n");
+          return -ENODEV;
+        }
+
+      /* Register the PWM driver at "/dev/pwm8" */
+
+      ret = pwm_register("/dev/pwm8", pwm);
+      if (ret < 0)
+        {
+          aerr("ERROR: pwm_register failed: %d\n", ret);
+          return ret;
+        }
+#endif
+      /* Now we are initialized */
+
+      initialized = true;
+    }
+
+  return OK;
+}
+
+#endif /* CONFIG_PWM */
+
diff --git a/configs/nucleo-l476rg/src/stm32_qencoder.c b/configs/nucleo-l476rg/src/stm32_qencoder.c
new file mode 100644
index 0000000000000000000000000000000000000000..d12f077ef07881d221b9be784325f517406770b1
--- /dev/null
+++ b/configs/nucleo-l476rg/src/stm32_qencoder.c
@@ -0,0 +1,83 @@
+/************************************************************************************
+ * configs/nucleo-l476rg/src/stm32_qencoder.c
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ *   Copyright (C) 2016 Sebastien Lorquet. All rights reserved.
+ *   Author: Sebastien Lorquet 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "chip.h"
+#include "up_arch.h"
+#include "stm32l4_qencoder.h"
+#include "nucleo-l476rg.h"
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: qe_devinit
+ *
+ * Description:
+ *   All STM32L4 architectures must provide the following interface to work with
+ *   examples/qencoder.
+ *
+ ************************************************************************************/
+
+int stm32l4_qencoder_initialize(FAR const char *devpath, int timer)
+{
+  int ret;
+
+  /* Initialize a quadrature encoder interface. */
+
+  sninfo("Initializing the quadrature encoder using TIM%d\n", timer);
+  ret = stm32l4_qeinitialize(devpath, timer);
+  if (ret < 0)
+    {
+      snerr("ERROR: stm32l4_qeinitialize failed: %d\n", ret);
+    }
+
+  return ret;
+}
diff --git a/configs/nucleo-l476rg/src/stm32_spi.c b/configs/nucleo-l476rg/src/stm32_spi.c
index 5dad71caf5c47f4a9835fc51f95e185f55f1fd5a..a400cd52677f904f208cc367ff362df786c0bffb 100644
--- a/configs/nucleo-l476rg/src/stm32_spi.c
+++ b/configs/nucleo-l476rg/src/stm32_spi.c
@@ -55,29 +55,6 @@
 
 #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_SPI
-#  undef CONFIG_DEBUG_VERBOSE
-#endif
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /************************************************************************************
  * Public Data
  ************************************************************************************/
@@ -111,7 +88,7 @@ void weak_function stm32_spiinitialize(void)
   g_spi1 = up_spiinitialize(1);
   if (!g_spi1)
     {
-      spidbg("[boot] FAILED to initialize SPI port 1\n");
+      spierr("ERROR: FAILED to initialize SPI port 1\n");
     }
 
 #ifdef CONFIG_WL_CC3000
@@ -166,7 +143,7 @@ void weak_function stm32_spiinitialize(void)
 #ifdef CONFIG_STM32_SPI1
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
 #ifdef CONFIG_WL_CC3000
   if (devid == SPIDEV_WIRELESS)
@@ -192,7 +169,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI2
 void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
 #ifdef CONFIG_WL_CC3000
   if (devid == SPIDEV_WIRELESS)
@@ -211,7 +188,7 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI3
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
diff --git a/configs/nucleo-l476rg/src/stm32_timer.c b/configs/nucleo-l476rg/src/stm32_timer.c
new file mode 100644
index 0000000000000000000000000000000000000000..2d6f83835ee1e99656c2a0ff218cc5ae6a25ffe7
--- /dev/null
+++ b/configs/nucleo-l476rg/src/stm32_timer.c
@@ -0,0 +1,82 @@
+/****************************************************************************
+ * config/nucleo-l476rg/src/stm32_timer.c
+ *
+ *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ *   Copied from nucleo-f303 by Sebastien Lorquet
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#include 
+
+#include "stm32l4_tim.h"
+#include "nucleo-l476rg.h"
+
+#ifdef CONFIG_TIMER
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_timer_driver_initialize
+ *
+ * Description:
+ *   Configure the timer driver.
+ *
+ * Input Parameters:
+ *   devpath - The full path to the timer device.  This should be of the
+ *             form /dev/timer0
+ *   timer   - The timer's number.
+ *
+ * Returned Values:
+ *   Zero (OK) is returned on success; A negated errno value is returned
+ *   to indicate the nature of any failure.
+ *
+ ****************************************************************************/
+
+int board_timer_driver_initialize(FAR const char *devpath, int timer)
+{
+  return stm32l4_timer_initialize(devpath, timer);
+}
+
+#endif
diff --git a/configs/nucleo-l476rg/src/stm32_userleds.c b/configs/nucleo-l476rg/src/stm32_userleds.c
index 01d60f55edcb8184029fa0688c3719f7007a5892..53d9193230ab20d528488f0f83a8e17c20e8f764 100644
--- a/configs/nucleo-l476rg/src/stm32_userleds.c
+++ b/configs/nucleo-l476rg/src/stm32_userleds.c
@@ -54,26 +54,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Function Prototypes
  ****************************************************************************/
diff --git a/configs/nucleo-l476rg/src/stm32_wireless.c b/configs/nucleo-l476rg/src/stm32_wireless.c
index 228749c5e55eca7abf9342399879ae4ba7fd3c01..b65a5eaae5f7ff451b3e508e1ab358df2a64548d 100644
--- a/configs/nucleo-l476rg/src/stm32_wireless.c
+++ b/configs/nucleo-l476rg/src/stm32_wireless.c
@@ -118,7 +118,8 @@ struct stm32_config_s
  *   wl_read_irq        - Return the state of the interrupt GPIO input
  */
 
-static int  wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler);
+static int  wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler,
+                          FAR void *arg);
 static void wl_enable_irq(FAR struct cc3000_config_s *state, bool enable);
 static void wl_clear_irq(FAR struct cc3000_config_s *state);
 static void wl_select(FAR struct cc3000_config_s *state, bool enable);
@@ -157,6 +158,7 @@ static struct stm32_config_s g_cc3000_info =
   .dev.probe            = probe, /* This is used for debugging */
 #endif
   .handler              = NULL,
+  .arg                  = NULL,
 };
 
 /****************************************************************************
@@ -175,13 +177,15 @@ static struct stm32_config_s g_cc3000_info =
  * pendown - Return the state of the pen down GPIO input
  */
 
-static int wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler)
+static int wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler,
+                         FAR void *arg)
 {
   FAR struct stm32_config_s *priv = (FAR struct stm32_config_s *)state;
 
   /* Just save the handler for use when the interrupt is enabled */
 
   priv->handler = handler;
+  priv->arg     = arg;
   return OK;
 }
 
@@ -197,20 +201,22 @@ static void wl_enable_irq(FAR struct cc3000_config_s *state, bool enable)
 
   /* Attach and enable, or detach and disable */
 
-  ivdbg("enable:%d\n", enable);
+  iinfo("enable:%d\n", enable);
   if (enable)
     {
-      (void)stm32_gpiosetevent(GPIO_WIFI_INT, false, true, false, priv->handler);
+      (void)stm32_gpiosetevent(GPIO_WIFI_INT, false, true, false,
+                               priv->handler, priv->arg);
     }
   else
     {
-      (void)stm32_gpiosetevent(GPIO_WIFI_INT, false, false, false, NULL);
+      (void)stm32_gpiosetevent(GPIO_WIFI_INT, false, false, false,
+                               NULL, NULL);
     }
 }
 
 static void wl_enable_power(FAR struct cc3000_config_s *state, bool enable)
 {
-  ivdbg("enable:%d\n", enable);
+  iinfo("enable:%d\n", enable);
 
   /* Active high enable */
 
@@ -219,7 +225,7 @@ static void wl_enable_power(FAR struct cc3000_config_s *state, bool enable)
 
 static void wl_select(FAR struct cc3000_config_s *state, bool enable)
 {
-  ivdbg("enable:%d\n", enable);
+  iinfo("enable:%d\n", enable);
 
   /* Active high enable */
 
@@ -280,7 +286,7 @@ int wireless_archinitialize(size_t max_rx_size)
 
   /* Init SPI bus */
 
-  idbg("minor %d\n", minor);
+  iinfo("minor %d\n", minor);
   DEBUGASSERT(CONFIG_CC3000_DEVMINOR == 0);
 
 #ifdef CONFIG_CC3000_PROBES
@@ -295,7 +301,7 @@ int wireless_archinitialize(size_t max_rx_size)
   spi = up_spiinitialize(CONFIG_CC3000_SPIDEV);
   if (!spi)
     {
-      idbg("Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV);
+      ierr("ERROR: Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV);
       return -ENODEV;
     }
 
@@ -305,7 +311,7 @@ int wireless_archinitialize(size_t max_rx_size)
   int ret = cc3000_register(spi, &g_cc3000_info.dev, CONFIG_CC3000_DEVMINOR);
   if (ret < 0)
     {
-      idbg("Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV);
+      ierr("ERROR: Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV);
       return -ENODEV;
     }
 
diff --git a/configs/nutiny-nuc120/nsh/Make.defs b/configs/nutiny-nuc120/nsh/Make.defs
index 226977656521d5350e188a64ecf4904755756155..80ac8de12f1cb26f51b60457fc44018e0810691d 100644
--- a/configs/nutiny-nuc120/nsh/Make.defs
+++ b/configs/nutiny-nuc120/nsh/Make.defs
@@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/nutiny-nuc120/nsh/defconfig b/configs/nutiny-nuc120/nsh/defconfig
index 9c73cbc043c1fd704a6da59fc70e4f1e76a01ca5..f5dba7a48c0d9517d13aa44a71b9a8050359b2aa 100644
--- a/configs/nutiny-nuc120/nsh/defconfig
+++ b/configs/nutiny-nuc120/nsh/defconfig
@@ -21,6 +21,7 @@ CONFIG_WINDOWS_CYGWIN=y
 # Build Configuration
 #
 # CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
 # CONFIG_BUILD_2PASS is not set
 
 #
@@ -30,20 +31,31 @@ CONFIG_WINDOWS_CYGWIN=y
 CONFIG_INTELHEX_BINARY=y
 # CONFIG_MOTOROLA_SREC is not set
 CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
 
 #
 # Customize Header Files
 #
+# CONFIG_ARCH_STDINT_H is not set
 # CONFIG_ARCH_STDBOOL_H is not set
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
 
 #
 # System Type
@@ -52,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -63,27 +74,61 @@ CONFIG_ARCH="arm"
 #
 # ARM Options
 #
+# CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
 # CONFIG_ARCH_CHIP_LPC31XX is not set
 # CONFIG_ARCH_CHIP_LPC43XX is not set
 CONFIG_ARCH_CHIP_NUC1XX=y
-# CONFIG_ARCH_CHIP_SAM3U is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
 CONFIG_ARCH_CORTEXM0=y
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv6-m"
 CONFIG_ARCH_CHIP="nuc1xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
-# CONFIG_ARCH_HAVE_MPU is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+# CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 
 #
 # ARMV6M Configuration Options
@@ -94,6 +139,8 @@ CONFIG_ARMV6M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYW is not set
 # CONFIG_ARMV6M_TOOLCHAIN_DEVKITARM is not set
 # CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL is not set
+# CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIW is not set
+# CONFIG_SERIAL_TERMIOS is not set
 
 #
 # NUC100/120 Configuration Options
@@ -171,32 +218,44 @@ CONFIG_NUC_SYSTICK_CORECLK=y
 # CONFIG_NUC_UARTCLK_PLL is not set
 CONFIG_NUC_UARTCLK_INTHI=y
 
-#
-# External Memory Configuration
-#
-
 #
 # Architecture Options
 #
 # CONFIG_ARCH_NOINTC is not set
 # CONFIG_ARCH_VECNOTIRQ is not set
 # CONFIG_ARCH_DMA is not set
-# CONFIG_ARCH_IRQPRIO is not set
-# CONFIG_ARCH_ADDRENV is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+# CONFIG_ARCH_HAVE_MPU is not set
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
 # CONFIG_ARCH_HAVE_RAMFUNCS is not set
+# CONFIG_ARCH_HAVE_RAMVECTORS is not set
 
 #
 # Board Settings
 #
 CONFIG_BOARD_LOOPSPERMSEC=2988
 # CONFIG_ARCH_CALIBRATION is not set
-CONFIG_RAM_START=0x20000000
-CONFIG_RAM_SIZE=16384
+
+#
+# Interrupt options
+#
 CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
 CONFIG_ARCH_INTERRUPTSTACK=0
+# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set
 
 #
 # Boot options
@@ -207,6 +266,13 @@ CONFIG_BOOT_RUNFROMFLASH=y
 # CONFIG_BOOT_RUNFROMSDRAM is not set
 # CONFIG_BOOT_COPYTORAM is not set
 
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=16384
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
 #
 # Board Selection
 #
@@ -224,38 +290,77 @@ CONFIG_NSH_MMCSDMINOR=0
 #
 # Board-Specific Options
 #
+# CONFIG_LIB_BOARDCTL is not set
 
 #
 # RTOS Features
 #
-# CONFIG_BOARD_INITIALIZE is not set
+CONFIG_DISABLE_OS_API=y
+CONFIG_DISABLE_POSIX_TIMERS=y
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+CONFIG_DISABLE_MQUEUE=y
+CONFIG_DISABLE_ENVIRON=y
+
+#
+# Clocks and Timers
+#
 CONFIG_USEC_PER_TICK=10000
-CONFIG_RR_INTERVAL=200
-# CONFIG_SCHED_INSTRUMENTATION is not set
-CONFIG_TASK_NAME_SIZE=0
-# CONFIG_SCHED_HAVE_PARENT is not set
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=2
 CONFIG_START_DAY=26
-CONFIG_DEV_CONSOLE=y
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=0
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=8
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
 # CONFIG_MUTEX_TYPES is not set
-# CONFIG_PRIORITY_INHERITANCE is not set
+CONFIG_NPTHREAD_KEYS=0
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
 # CONFIG_FDCLONE_DISABLE is not set
 # CONFIG_FDCLONE_STDIO is not set
 CONFIG_SDCLONE_DISABLE=y
-# CONFIG_SCHED_WORKQUEUE is not set
-CONFIG_SCHED_WAITPID=y
+CONFIG_NFILE_DESCRIPTORS=6
+CONFIG_NFILE_STREAMS=6
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
-CONFIG_USER_ENTRYPOINT="nsh_main"
-CONFIG_DISABLE_OS_API=y
-CONFIG_DISABLE_POSIX_TIMERS=y
-# CONFIG_DISABLE_PTHREAD is not set
-# CONFIG_DISABLE_SIGNALS is not set
-CONFIG_DISABLE_MQUEUE=y
-CONFIG_DISABLE_ENVIRON=y
 
 #
 # Signal Numbers
@@ -264,21 +369,14 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+# CONFIG_MODULE is not set
 
 #
-# Sizes of configurable things (0 disables)
+# Work queue support
 #
-CONFIG_MAX_TASKS=8
-CONFIG_NPTHREAD_KEYS=0
-CONFIG_NFILE_DESCRIPTORS=6
-CONFIG_NFILE_STREAMS=6
-CONFIG_NAME_MAX=32
-CONFIG_PREALLOC_MQ_MSGS=0
-CONFIG_MQ_MAXMSGSIZE=0
-CONFIG_MAX_WDOGPARMS=2
-CONFIG_PREALLOC_WDOGS=4
-CONFIG_WDOG_INTRESERVE=0
-CONFIG_PREALLOC_TIMERS=0
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
 
 #
 # Stack and heap information
@@ -287,6 +385,7 @@ CONFIG_IDLETHREAD_STACKSIZE=1024
 CONFIG_USERMAIN_STACKSIZE=1536
 CONFIG_PTHREAD_STACK_MIN=256
 CONFIG_PTHREAD_STACK_DEFAULT=1536
+# CONFIG_LIB_SYSCALL is not set
 
 #
 # Device Drivers
@@ -295,31 +394,91 @@ CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
 # CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
+# CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
 CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART1_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
 
 #
@@ -331,24 +490,38 @@ CONFIG_UART1_BAUD=115200
 CONFIG_UART1_BITS=8
 CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
+# CONFIG_UART1_IFLOWCONTROL is not set
+# CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
 #
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
 # CONFIG_NET is not set
 
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
 #
 # File Systems
 #
@@ -357,13 +530,13 @@ CONFIG_UART1_2STOP=0
 # File system configuration
 #
 CONFIG_DISABLE_MOUNTPOINT=y
+CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
+# CONFIG_FS_READABLE is not set
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
 # CONFIG_FS_RAMMAP is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -375,10 +548,20 @@ CONFIG_DISABLE_MOUNTPOINT=y
 #
 CONFIG_MM_SMALL=y
 CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
 # CONFIG_GRAN is not set
 
 #
-# Binary Formats
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
 #
 CONFIG_BINFMT_DISABLE=y
 # CONFIG_PIC is not set
@@ -391,13 +574,15 @@ CONFIG_SYMTAB_ORDEREDBYNAME=y
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 # CONFIG_LIBC_LONG_LONG is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
 # CONFIG_EOL_IS_BOTH_CRLF is not set
@@ -407,14 +592,19 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
 CONFIG_ARCH_LOWPUTC=y
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
-# Non-standard Helper Functions
+# Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
 
 #
 # Basic CXX Support
@@ -427,106 +617,129 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
-# CONFIG_SYSTEM_COMPOSITE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
-# CONFIG_EXAMPLES_LCDRW is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
-# CONFIG_EXAMPLES_MOUNT is not set
 # CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PASHELLO is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
-# CONFIG_SYSTEM_USBMSC is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
 
 #
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
 # CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPC is not set
-# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
-# CONFIG_NETDB_DNSCLIENT is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TELNETD is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
 
 #
-# FreeModBus
+# NSH Library
 #
-# CONFIG_MODBUS is not set
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
-# NSH Library
+# Command Line Configuration
 #
-CONFIG_NSH_LIBRARY=y
 CONFIG_NSH_READLINE=y
 # CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=80
+CONFIG_NSH_DISABLE_SEMICOLON=y
+CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
 
 #
 # Disable Individual commands
 #
+CONFIG_NSH_DISABLE_ADDROUTE=y
+CONFIG_NSH_DISABLE_BASENAME=y
 # CONFIG_NSH_DISABLE_CAT is not set
 CONFIG_NSH_DISABLE_CD=y
 CONFIG_NSH_DISABLE_CP=y
+CONFIG_NSH_DISABLE_CMP=y
+CONFIG_NSH_DISABLE_DATE=y
 CONFIG_NSH_DISABLE_DD=y
+CONFIG_NSH_DISABLE_DF=y
+CONFIG_NSH_DISABLE_DELROUTE=y
+CONFIG_NSH_DISABLE_DIRNAME=y
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -535,20 +748,20 @@ CONFIG_NSH_DISABLE_GET=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 CONFIG_NSH_DISABLE_IFCONFIG=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 CONFIG_NSH_DISABLE_LOSETUP=y
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 CONFIG_NSH_DISABLE_MKDIR=y
-CONFIG_NSH_DISABLE_MKFATFS=y
 # CONFIG_NSH_DISABLE_MKFIFO is not set
 CONFIG_NSH_DISABLE_MKRD=y
 # CONFIG_NSH_DISABLE_MH is not set
 CONFIG_NSH_DISABLE_MOUNT=y
+# CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
-CONFIG_NSH_DISABLE_NSFMOUNT=y
 # CONFIG_NSH_DISABLE_PS is not set
-CONFIG_NSH_DISABLE_PING=y
 CONFIG_NSH_DISABLE_PUT=y
 # CONFIG_NSH_DISABLE_PWD is not set
 CONFIG_NSH_DISABLE_RM=y
@@ -556,71 +769,61 @@ CONFIG_NSH_DISABLE_RMDIR=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+CONFIG_NSH_DISABLE_TIME=y
 # CONFIG_NSH_DISABLE_TEST is not set
 CONFIG_NSH_DISABLE_UMOUNT=y
+CONFIG_NSH_DISABLE_UNAME=y
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 CONFIG_NSH_DISABLE_WGET=y
 # CONFIG_NSH_DISABLE_XD is not set
+
+#
+# Configure Command Options
+#
 CONFIG_NSH_CODECS_BUFSIZE=128
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
 CONFIG_NSH_FILEIOSIZE=64
-CONFIG_NSH_LINELEN=80
-CONFIG_NSH_NESTDEPTH=3
+
+#
+# Scripting Support
+#
 CONFIG_NSH_DISABLESCRIPT=y
-# CONFIG_NSH_DISABLEBG is not set
-CONFIG_NSH_CONSOLE=y
 
 #
-# USB Trace Support
+# Console Configuration
 #
+CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 # CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
 #
 
 #
-# System NSH Add-Ons
+# Platform-specific Support
 #
+# CONFIG_PLATFORM_CONFIGDATA is not set
 
 #
-# Custom Free Memory Command
+# System Libraries and NSH Add-Ons
 #
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
 # CONFIG_SYSTEM_FREE is not set
-
-#
-# I2C tool
-#
-
-#
-# FLASH Program Installation
-#
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-
-#
-# readline()
-#
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sysinfo
-#
-
-#
-# USB Monitor
-#
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/nutiny-nuc120/src/nuc_led.c b/configs/nutiny-nuc120/src/nuc_led.c
index 87a08c7c8f6269e1433702eb7e8a70227515c5a6..840858eaee38c3207fede24f13c414720b466c47 100644
--- a/configs/nutiny-nuc120/src/nuc_led.c
+++ b/configs/nutiny-nuc120/src/nuc_led.c
@@ -76,38 +76,14 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS)
+#ifdef CONFIG_DEBUG_LEDS_INFO
 #  define led_dumpgpio(m) nuc_dumpgpio(GPIO_LED, m)
 #else
 #  define led_dumpgpio(m)
 #endif
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/olimex-efm32g880f128-stk/nsh/Make.defs b/configs/olimex-efm32g880f128-stk/nsh/Make.defs
index 3e8d7171f32ddb78c7ea49c8c9e62865d6ac5074..a6e5dfddc54f9d271f31a3923ba19292a482e25c 100644
--- a/configs/olimex-efm32g880f128-stk/nsh/Make.defs
+++ b/configs/olimex-efm32g880f128-stk/nsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimex-efm32g880f128-stk/nsh/defconfig b/configs/olimex-efm32g880f128-stk/nsh/defconfig
index 99b47aac95b4ad0c7b7d16fd826c278cf65bbd89..950b14dbc2191f078d70d204d4fa4827c2003275 100644
--- a/configs/olimex-efm32g880f128-stk/nsh/defconfig
+++ b/configs/olimex-efm32g880f128-stk/nsh/defconfig
@@ -41,12 +41,15 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
@@ -61,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -74,14 +76,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 CONFIG_ARCH_CHIP_EFM32=y
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
 # CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -90,27 +93,52 @@ CONFIG_ARCH_CHIP_EFM32=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
 CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="efm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 CONFIG_ARMV7M_CMNVECTOR=y
+# CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 
 #
 # ARMV7M Configuration Options
 #
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -119,6 +147,8 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
 
 #
 # EFM32 Configuration Options
@@ -127,6 +157,7 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
 CONFIG_ARCH_CHIP_EFM32G880F128=y
 # CONFIG_ARCH_CHIP_EFM32G890F128 is not set
 # CONFIG_ARCH_CHIP_EFM32GG332F1024 is not set
+# CONFIG_ARCH_CHIP_EFM32GG990F1024 is not set
 # CONFIG_EFM32_EFM32TG is not set
 CONFIG_EFM32_EFM32G=y
 # CONFIG_EFM32_EFM32GG is not set
@@ -138,9 +169,17 @@ CONFIG_EFM32_HAVE_USART2=y
 CONFIG_EFM32_HAVE_UART0=y
 # CONFIG_EFM32_HAVE_UART1 is not set
 CONFIG_EFM32_HAVE_LEUART1=y
-# CONFIG_EFM32_USART is not set
+# CONFIG_EFM32_HAVE_OTGFS is not set
+# CONFIG_EFM32_USART_ISUART is not set
+# CONFIG_EFM32_USART_ISSPI is not set
 # CONFIG_EFM32_UART is not set
 CONFIG_EFM32_LEUART=y
+# CONFIG_EFM32_DMA is not set
+# CONFIG_EFM32_RMU is not set
+# CONFIG_EFM32_FLASHPROG is not set
+# CONFIG_EFM32_I2C0 is not set
+# CONFIG_EFM32_I2C1 is not set
+# CONFIG_EFM32_BITBAND is not set
 # CONFIG_EFM32_USART0 is not set
 # CONFIG_EFM32_USART1 is not set
 # CONFIG_EFM32_USART2 is not set
@@ -148,7 +187,12 @@ CONFIG_EFM32_LEUART=y
 # CONFIG_EFM32_UART1 is not set
 # CONFIG_EFM32_LEUART0 is not set
 CONFIG_EFM32_LEUART1=y
+# CONFIG_EFM32_TIMER0 is not set
+# CONFIG_EFM32_TIMER1 is not set
+# CONFIG_EFM32_TIMER2 is not set
+# CONFIG_EFM32_TIMER3 is not set
 CONFIG_EFM32_GPIO_IRQ=y
+# CONFIG_EFM32_LECLOCK is not set
 CONFIG_LEUART1_SERIAL_CONSOLE=y
 # CONFIG_NO_LEUART_SERIAL_CONSOLE is not set
 
@@ -161,6 +205,7 @@ CONFIG_LEUART1_BAUD=2400
 CONFIG_LEUART1_BITS=8
 CONFIG_LEUART1_PARITY=0
 CONFIG_LEUART1_2STOP=0
+# CONFIG_EFM32_RTC_BURTC is not set
 
 #
 # Architecture Options
@@ -173,11 +218,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
@@ -228,11 +276,13 @@ CONFIG_ARCH_BOARD="olimex-efm32g880f128-stk"
 #
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
+# CONFIG_LIB_BOARDCTL is not set
 
 #
 # RTOS Features
@@ -250,6 +300,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2010
 CONFIG_START_MONTH=5
@@ -267,6 +318,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -317,9 +369,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -340,6 +393,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -350,29 +404,56 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
-# CONFIG_TIMER is not set
 # CONFIG_ANALOG is not set
 # CONFIG_AUDIO_DEVICES is not set
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -396,29 +477,33 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 CONFIG_OTHER_UART_SERIALDRIVER=y
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
-# CONFIG_UART0_SERIAL_CONSOLE is not set
-CONFIG_OTHER_SERIAL_CONSOLE=y
-# CONFIG_NO_SERIAL_CONSOLE is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+CONFIG_OTHER_SERIAL_CONSOLE=y
+# CONFIG_NO_SERIAL_CONSOLE is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -447,11 +532,7 @@ CONFIG_DISABLE_MOUNTPOINT=y
 CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -471,6 +552,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -495,6 +580,7 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -506,15 +592,20 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
 CONFIG_ARCH_LOWPUTC=y
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -527,26 +618,24 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -554,75 +643,75 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
 #
 # CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
 
 #
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
 # CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -640,13 +729,16 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
 # CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -655,15 +747,17 @@ CONFIG_NSH_NESTDEPTH=3
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -673,12 +767,15 @@ CONFIG_NSH_NESTDEPTH=3
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -701,6 +798,8 @@ CONFIG_NSH_FILEIOSIZE=256
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 # CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -714,113 +813,20 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# EMACS-like Command Line Editor
-#
 CONFIG_SYSTEM_CLE=y
 CONFIG_SYSTEM_CLE_DEBUGLEVEL=0
-
-#
-# FLASH Program Installation
-#
-# CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# Intel HEX to binary conversion
-#
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-
-#
-# P-Code Support
-#
-
-#
-# PHY Tool
-#
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sudoku
-#
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-
-#
-# Sysinfo
-#
-
-#
-# VI Work-Alike Editor
-#
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# USB Monitor
-#
-
-#
-# Zmodem Commands
-#
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-efm32g880f128-stk/src/efm32_buttons.c b/configs/olimex-efm32g880f128-stk/src/efm32_buttons.c
index 5545d5dac7718873f76c7c37f7266ecdd5fc1cf8..e2bcba1a58f47da7d4da34656dc39bfea4ff37bf 100644
--- a/configs/olimex-efm32g880f128-stk/src/efm32_buttons.c
+++ b/configs/olimex-efm32g880f128-stk/src/efm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/olimex-efm32g880f128-stk/src/efm32_buttons.c
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -75,9 +75,6 @@
  ****************************************************************************/
 
 #if defined(CONFIG_EFM32_GPIO_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-#if 0 /* REVISIT -- See comments in board_button_irq() */
-static xcpt_t g_button_handlers[NUM_BUTTONS];
-#endif
 static const uint8_t g_button_irqs[NUM_BUTTONS];
 #endif
 
@@ -154,8 +151,7 @@ uint8_t board_buttons(void)
  * Description:
  *   This function may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is one
- *   of the BUTTON* definitions provided above. The previous interrupt
- *   handler address is returned (so that it may restored, if so desired).
+ *   of the BUTTON* definitions provided above.
  *
  * Configuration Notes:
  *   Configuration CONFIG_EFM32_GPIO_IRQ must be selected to enable the
@@ -168,10 +164,8 @@ uint8_t board_buttons(void)
  ****************************************************************************/
 
 #if defined(CONFIG_EFM32_GPIO_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
-
   if (id >=0 && id < NUM_BUTTONS)
     {
       irqstate_t flags;
@@ -182,19 +176,6 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
 
       flags = enter_critical_section();
 
-      /* Get/set the old button handler
-       *
-       * REVISIT:  Keeping copies of the hander in RAM seems wasteful
-       * since the OS already has this information internally.
-       */
-
-#if 0 /* REVISIT */
-      oldhandler = g_button_handlers[id];
-      g_button_handlers[id] = irqhandler;
-#else
-      oldhandler = NULL;
-#endif
-
       /* Are we attaching or detaching? */
 
       if (irqhandler != NULL)
@@ -205,7 +186,7 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
 
           /* Attach and enable the interrupt */
 
-          (void)irq_attach(g_button_irqs[id], irqhandler);
+          (void)irq_attach(g_button_irqs[id], irqhandler, arg);
           efm32_gpioirqenable(g_button_irqs[id]);
         }
       else
@@ -221,7 +202,7 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
 
   /* Return the old button handler (so that it can be restored) */
 
-  return oldhandler;
+  return OK;
 }
 #endif
 
diff --git a/configs/olimex-lpc-h3131/README.txt b/configs/olimex-lpc-h3131/README.txt
index 61d5b0416b1747e3aad053b92fe87e27b710f137..f262ff93c7901084e6e8df793bc50a1b453cf6f3 100644
--- a/configs/olimex-lpc-h3131/README.txt
+++ b/configs/olimex-lpc-h3131/README.txt
@@ -827,8 +827,8 @@ Configurations
            CONFIG_USBHOST_TRACE_VERBOSE=y
 
          Application Configuration -> System Add-Ons
-           CONFIG_SYSTEM_USBMONITOR=y
-           CONFIG_SYSTEM_USBMONITOR_INTERVAL=1
+           CONFIG_USBMONITOR=y
+           CONFIG_USBMONITOR_INTERVAL=1
 
        NOTE:  I have found that if you enable USB DEBUG and/or USB tracing,
        the resulting image requires to much memory to execute out of
diff --git a/configs/olimex-lpc-h3131/include/board.h b/configs/olimex-lpc-h3131/include/board.h
index 395eddee2beecd76a1ecfc437e4fb193c2272d13..f9952ab740d9231643752c319f7f8933761729e6 100644
--- a/configs/olimex-lpc-h3131/include/board.h
+++ b/configs/olimex-lpc-h3131/include/board.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/olimex-lpc-h3131/include/board.h
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -187,14 +187,15 @@ void lpc31_boardinitialize(void);
  *
  * Input parameter:
  *   handler - New overcurrent interrupt handler
+ *   arg     - The argument that will accompany the interrupt
  *
  * Returned value:
- *   Old overcurrent interrupt handler
+ *   Zero (OK) returned on success; a negated errno value is returned on failure.
  *
  ************************************************************************************/
 
 #if 0 /* Not ready yet */
-xcpt_t lpc31_setup_overcurrent(xcpt_t handler);
+int lpc31_setup_overcurrent(xcpt_t handler, void *arg);
 #endif
 
 #endif /* __ASSEMBLY__ */
diff --git a/configs/olimex-lpc-h3131/nsh/Make.defs b/configs/olimex-lpc-h3131/nsh/Make.defs
index 4d167115d044a32a9e17fe72dfbfbc9a42d15f2d..9bc12efad6346ba95a3135211bf6b953ab6cd9fc 100644
--- a/configs/olimex-lpc-h3131/nsh/Make.defs
+++ b/configs/olimex-lpc-h3131/nsh/Make.defs
@@ -80,7 +80,7 @@ else
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimex-lpc-h3131/nsh/defconfig b/configs/olimex-lpc-h3131/nsh/defconfig
index f3463176647605dd732a4c06a69288fdaa86998d..c8bd5d6ebee2446b49f7a75704a0803766e98bb9 100644
--- a/configs/olimex-lpc-h3131/nsh/defconfig
+++ b/configs/olimex-lpc-h3131/nsh/defconfig
@@ -41,14 +41,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -62,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -75,14 +76,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
 # CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -91,10 +93,15 @@ CONFIG_ARCH_CHIP_LPC31XX=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 CONFIG_ARCH_ARM926EJS=y
 # CONFIG_ARCH_ARM920T is not set
@@ -104,10 +111,21 @@ CONFIG_ARCH_ARM926EJS=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="lpc31xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
 CONFIG_ARCH_ROMPGTABLE=y
@@ -170,11 +188,14 @@ CONFIG_ARCH_HAVE_EXTSRAM1=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 CONFIG_ARCH_HAVE_MMU=y
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 CONFIG_ARCH_USE_MMU=y
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
@@ -231,9 +252,8 @@ CONFIG_NSH_MMCSDMINOR=0
 # Board-Specific Options
 #
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -270,6 +290,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -320,9 +341,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -353,6 +375,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
@@ -370,17 +393,33 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 CONFIG_UART_SERIALDRIVER=y
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -404,14 +443,11 @@ CONFIG_UART_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -428,19 +464,23 @@ CONFIG_UART_PARITY=0
 CONFIG_UART_2STOP=0
 # CONFIG_UART_IFLOWCONTROL is not set
 # CONFIG_UART_OFLOWCONTROL is not set
+# CONFIG_UART_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -474,17 +514,15 @@ CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -505,6 +543,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -549,11 +591,15 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -568,26 +614,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -595,35 +641,45 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -636,32 +692,28 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_PPPD is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -680,6 +732,7 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
@@ -688,6 +741,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -696,8 +750,10 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -716,8 +772,10 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
@@ -744,6 +802,8 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -757,16 +817,19 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-# CONFIG_SYSTEM_POWEROFF is not set
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-lpc-h3131/src/lpc31_appinit.c b/configs/olimex-lpc-h3131/src/lpc31_appinit.c
index 551a2d9bb6ce44e357711d90d5e5cc8dcc5eb056..0a40bb902c82f1733d3635809034cb3c4faf0ddd 100644
--- a/configs/olimex-lpc-h3131/src/lpc31_appinit.c
+++ b/configs/olimex-lpc-h3131/src/lpc31_appinit.c
@@ -46,8 +46,8 @@
 
 #include 
 
-#ifdef CONFIG_SYSTEM_USBMONITOR
-#  include 
+#ifdef CONFIG_USBMONITOR
+#  include 
 #endif
 
 #include "lpc31.h"
@@ -137,7 +137,7 @@ int board_app_initialize(uintptr_t arg)
   /* Start the USB Monitor */
 
   syslog(LOG_ERR, "ERROR: Failed to start the USB monitor\n");
-  ret = usbmonitor_start(0, NULL);
+  ret = usbmonitor_start();
   if (ret != OK)
     {
       syslog(LOG_ERR, "ERROR: Failed to start USB monitor: %d\n", ret);
diff --git a/configs/olimex-lpc-h3131/src/lpc31_leds.c b/configs/olimex-lpc-h3131/src/lpc31_leds.c
index 7c484df2bef42c470fac48196ad3f6e992472194..0603ba51b449c7a0006f7befbc14d01b159b8dc1 100644
--- a/configs/olimex-lpc-h3131/src/lpc31_leds.c
+++ b/configs/olimex-lpc-h3131/src/lpc31_leds.c
@@ -53,30 +53,6 @@
 
 #include "lpc_h3131.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/olimex-lpc-h3131/src/lpc31_mmcsd.c b/configs/olimex-lpc-h3131/src/lpc31_mmcsd.c
index 9b974f083fba6a2272a46c9811d96ba8d4cb5af4..e5ccb3691acf14f9471f36e9b63f0550df6d7d8f 100644
--- a/configs/olimex-lpc-h3131/src/lpc31_mmcsd.c
+++ b/configs/olimex-lpc-h3131/src/lpc31_mmcsd.c
@@ -76,25 +76,25 @@ int lpc31_mmcsd_initialize(int slot, int minor)
 
   /* First, get an instance of the SDIO interface */
 
-  fvdbg("Initializing SDIO slot %d\n", slot);
+  finfo("Initializing SDIO slot %d\n", slot);
   sdio = sdio_initialize(slot);
   if (!sdio)
     {
-      fdbg("ERROR: Failed to initialize SDIO slot %d\n", slot);
+      ferr("ERROR: Failed to initialize SDIO slot %d\n", slot);
       return -ENODEV;
     }
 
   /* Now bind the SPI interface to the MMC/SD driver */
 
-  fvdbg("Bind SDIO to the MMC/SD driver, minor=%d\n", minor);
+  finfo("Bind SDIO to the MMC/SD driver, minor=%d\n", minor);
   ret = mmcsd_slotinitialize(minor, sdio);
   if (ret != OK)
     {
-      fdbg("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
+      ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
       return ret;
     }
 
-  fvdbg("Successfully bound SDIO to the MMC/SD driver\n");
+  finfo("Successfully bound SDIO to the MMC/SD driver\n");
 
   /* Then let's guess and say that there is a card in the slot.  I need to check to
    * see if the LPC-H3131 board supports a GPIO to detect if there is a card in
diff --git a/configs/olimex-lpc-h3131/src/lpc31_spi.c b/configs/olimex-lpc-h3131/src/lpc31_spi.c
index 91145242edd855c34d6880eb798588391bfc52f8..c9e9c6eec5272cf9f8848fb2a7e2b376e4b0ffac 100644
--- a/configs/olimex-lpc-h3131/src/lpc31_spi.c
+++ b/configs/olimex-lpc-h3131/src/lpc31_spi.c
@@ -55,32 +55,6 @@
 #if 0 /* At present, LPC-H3131 specific logic is hard-coded in the file lpc31_spi.c
        * in arch/arm/src/lpc31xx */
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -127,7 +101,7 @@ void weak_function lpc31_spidev_intialize(void)
 
 void lpc31_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 #warning "Missing logic"
 }
 
diff --git a/configs/olimex-lpc-h3131/src/lpc31_usbhost.c b/configs/olimex-lpc-h3131/src/lpc31_usbhost.c
index f333af6049f2d27a668a2b16c51d78d54878440b..18b865b7dbe65f2cddef216498804c5cd87a06a5 100644
--- a/configs/olimex-lpc-h3131/src/lpc31_usbhost.c
+++ b/configs/olimex-lpc-h3131/src/lpc31_usbhost.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/olimex-lpc-h3131/src/lpc31_usbhost.c
  *
- *   Copyright (C) 2013, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2015-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -104,7 +104,7 @@ static int ehci_waiter(int argc, char *argv[])
 {
   FAR struct usbhost_hubport_s *hport;
 
-  uvdbg("ehci_waiter:  Running\n");
+  uinfo("ehci_waiter:  Running\n");
   for (;;)
     {
       /* Wait for the device to change state */
@@ -195,7 +195,7 @@ int lpc31_usbhost_initialize(void)
   ret = usbhost_msc_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the mass storage class: %d\n", ret);
+      uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
     }
 #endif
 
@@ -205,7 +205,7 @@ int lpc31_usbhost_initialize(void)
   ret = usbhost_cdcacm_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the CDC/ACM serial class\n");
+      uerr("ERROR: Failed to register the CDC/ACM serial class\n");
     }
 #endif
 
@@ -215,7 +215,7 @@ int lpc31_usbhost_initialize(void)
   ret = usbhost_kbdinit();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the KBD class\n");
+      uerr("ERROR: Failed to register the KBD class\n");
     }
 #endif
 
@@ -224,7 +224,7 @@ int lpc31_usbhost_initialize(void)
   g_ehciconn = lpc31_ehci_initialize(0);
   if (!g_ehciconn)
     {
-      udbg("ERROR: lpc31_ehci_initialize failed\n");
+      uerr("ERROR: lpc31_ehci_initialize failed\n");
       return -ENODEV;
     }
 
@@ -234,7 +234,7 @@ int lpc31_usbhost_initialize(void)
                     (main_t)ehci_waiter, (FAR char * const *)NULL);
   if (pid < 0)
     {
-      udbg("ERROR: Failed to create ehci_waiter task: %d\n", ret);
+      uerr("ERROR: Failed to create ehci_waiter task: %d\n", ret);
       return -ENODEV;
     }
 
@@ -261,7 +261,7 @@ int lpc31_usbhost_initialize(void)
 
 void lpc31_usbhost_vbusdrive(int rhport, bool enable)
 {
-  uvdbg("RHPort%d: enable=%d\n", rhport+1, enable);
+  uinfo("RHPort%d: enable=%d\n", rhport+1, enable);
 
   /* The LPC3131 has only a single root hub port */
 
@@ -293,16 +293,16 @@ void lpc31_usbhost_vbusdrive(int rhport, bool enable)
  *
  * Input parameter:
  *   handler - New overcurrent interrupt handler
+ *   arg     - The argument that will accompany the interrupt
  *
  * Returned value:
- *   Old overcurrent interrupt handler
+ *   Zero (OK) returned on success; a negated errno value is returned on failure.
  *
  ************************************************************************************/
 
 #if 0 /* Not ready yet */
-xcpt_t lpc31_setup_overcurrent(xcpt_t handler)
+int lpc31_setup_overcurrent(xcpt_t handler, void *arg)
 {
-  xcpt_t oldhandler;
   irqstate_t flags;
 
   /* Disable interrupts until we are done.  This guarantees that the
@@ -311,16 +311,9 @@ xcpt_t lpc31_setup_overcurrent(xcpt_t handler)
 
   flags = enter_critical_section();
 
-  /* Get the old button interrupt handler and save the new one */
-
-  oldhandler  = g_ochandler;
-  g_ochandler = handler;
-
   /* Configure the interrupt */
 #warning Missing logic
 
-  /* Return the old button handler (so that it can be restored) */
-
   leave_critical_section(flags);
   return oldhandler;
 }
diff --git a/configs/olimex-lpc-h3131/src/lpc_h3131.h b/configs/olimex-lpc-h3131/src/lpc_h3131.h
index 895b5ca596f91b954899abd44ff6446496b8b402..8285b7e05162f0ec27844fb2025f04f72698e064 100644
--- a/configs/olimex-lpc-h3131/src/lpc_h3131.h
+++ b/configs/olimex-lpc-h3131/src/lpc_h3131.h
@@ -82,7 +82,7 @@
 #  undef CONFIG_USBHOST_TRACE
 #endif
 
-#if !defined(CONFIG_SYSTEM_USBMONITOR) || !defined(CONFIG_USBHOST_TRACE)
+#if !defined(CONFIG_USBMONITOR) || !defined(CONFIG_USBHOST_TRACE)
 #  undef HAVE_USBMONITOR
 #endif
 
diff --git a/configs/olimex-lpc1766stk/README.txt b/configs/olimex-lpc1766stk/README.txt
index f4a3155edeb6991dffc3d5e6a583195a77c4129b..9e88edd8771af25287d3f9aa87031752a45dded5 100644
--- a/configs/olimex-lpc1766stk/README.txt
+++ b/configs/olimex-lpc1766stk/README.txt
@@ -773,9 +773,9 @@ Olimex LPC1766-STK Configuration Options
     CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18
     CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented).
     CONFIG_NET_REGDEBUG - Enabled low level register debug.  Also needs
-      CONFIG_DEBUG.
+      CONFIG_DEBUG_FEATURES.
     CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets.
-      Also needs CONFIG_DEBUG.
+      Also needs CONFIG_DEBUG_FEATURES.
     CONFIG_NET_HASH - Enable receipt of near-perfect match frames.
     CONFIG_LPC17_MULTICAST - Enable receipt of multicast (and unicast) frames.
       Automatically set if CONFIG_NET_IGMP is selected.
@@ -929,8 +929,8 @@ Configuration Sub-Directories
     2. You may also want to define the following in your configuration file.
        Otherwise, you will have not feedback about what is going on:
 
-       CONFIG_DEBUG=y
-       CONFIG_DEBUG_VERBOSE=y
+       CONFIG_DEBUG_FEATURES=y
+       CONFIG_DEBUG_INFO=y
        CONFIG_DEBUG_FTPC=y
 
   hidkbd:
diff --git a/configs/olimex-lpc1766stk/ftpc/Make.defs b/configs/olimex-lpc1766stk/ftpc/Make.defs
index b2b6be78a57519dca269c3c989a7ef81e1a8413a..78632e875982a21a2d49a984e6f96cf5be0ac3f8 100644
--- a/configs/olimex-lpc1766stk/ftpc/Make.defs
+++ b/configs/olimex-lpc1766stk/ftpc/Make.defs
@@ -77,7 +77,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimex-lpc1766stk/ftpc/defconfig b/configs/olimex-lpc1766stk/ftpc/defconfig
index 6239b8e2700b08c5cb1ffe761a5ca92e5124e5b6..e78c4ce6750d7cd4b2064968db3e96c4366cc47d 100644
--- a/configs/olimex-lpc1766stk/ftpc/defconfig
+++ b/configs/olimex-lpc1766stk/ftpc/defconfig
@@ -37,14 +37,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -92,7 +96,11 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -102,14 +110,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -119,13 +138,13 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
 CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -200,6 +219,7 @@ CONFIG_LPC17_SSP1=y
 #
 # Serial driver options
 #
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
 # Ethernet driver options
@@ -211,6 +231,7 @@ CONFIG_NET_NRXDESC=7
 # CONFIG_NET_WOL is not set
 # CONFIG_NET_HASH is not set
 # CONFIG_LPC17_MULTICAST is not set
+CONFIG_LPC17_ETHERNET_HPWORK=y
 
 #
 # Architecture Options
@@ -223,11 +244,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -282,17 +306,15 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -312,6 +334,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=6
@@ -329,6 +352,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -365,6 +389,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -380,9 +405,10 @@ CONFIG_SIG_SIGWORK=17
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -406,6 +432,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -416,13 +443,20 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
+# CONFIG_SPI_SLAVE is not set
 # CONFIG_SPI_EXCHANGE is not set
 # CONFIG_SPI_CMDDATA is not set
 CONFIG_SPI_CALLBACK=y
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
@@ -430,6 +464,7 @@ CONFIG_SPI_CALLBACK=y
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -437,7 +472,26 @@ CONFIG_SPI_CALLBACK=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -449,6 +503,7 @@ CONFIG_MMCSD_SPICLOCK=20000000
 CONFIG_MMCSD_SPIMODE=0
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -456,7 +511,11 @@ CONFIG_NETDEVICES=y
 #
 # General Ethernet MAC Driver Options
 #
+# CONFIG_NETDEV_LOOPBACK is not set
+# CONFIG_NETDEV_TELNET is not set
 # CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
+# CONFIG_NETDEV_LATEINIT is not set
 
 #
 # External Ethernet MAC Device Support
@@ -464,9 +523,9 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
-# CONFIG_NET_VNET is not set
+# CONFIG_NET_FTMAC100 is not set
 
 #
 # External Ethernet PHY Device Support
@@ -475,6 +534,7 @@ CONFIG_NETDEVICES=y
 # CONFIG_ETH0_PHY_NONE is not set
 # CONFIG_ETH0_PHY_AM79C874 is not set
 CONFIG_ETH0_PHY_KS8721=y
+# CONFIG_ETH0_PHY_KSZ8041 is not set
 # CONFIG_ETH0_PHY_KSZ8051 is not set
 # CONFIG_ETH0_PHY_KSZ8061 is not set
 # CONFIG_ETH0_PHY_KSZ8081 is not set
@@ -483,14 +543,16 @@ CONFIG_ETH0_PHY_KS8721=y
 # CONFIG_ETH0_PHY_LAN8720 is not set
 # CONFIG_ETH0_PHY_LAN8740 is not set
 # CONFIG_ETH0_PHY_LAN8740A is not set
+# CONFIG_ETH0_PHY_LAN8742A is not set
 # CONFIG_ETH0_PHY_DM9161 is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -514,15 +576,12 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -539,19 +598,27 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -559,13 +626,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=550
 CONFIG_NET_GUARDSIZE=2
@@ -575,6 +640,7 @@ CONFIG_NET_GUARDSIZE=2
 #
 # CONFIG_NET_MULTILINK is not set
 CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
 # CONFIG_NET_TUN is not set
 
 #
@@ -665,6 +731,7 @@ CONFIG_IOB_NCHAINS=8
 # Routing Table Configuration
 #
 # CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME=""
 
 #
 # Crypto API
@@ -691,19 +758,17 @@ CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_NFS is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -723,6 +788,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -750,6 +819,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -767,13 +838,27 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+CONFIG_LIBC_NETDB=y
+# CONFIG_NETDB_HOSTFILE is not set
+CONFIG_NETDB_DNSCLIENT=y
+CONFIG_NETDB_DNSCLIENT_ENTRIES=4
+CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
+CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
+CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_RESOLVCONF is not set
+# CONFIG_NETDB_DNSSERVER_NOADDR is not set
+CONFIG_NETDB_DNSSERVER_IPv4=y
+CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -790,23 +875,29 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -815,39 +906,50 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_UDPBLASTER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -859,47 +961,43 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 CONFIG_NETUTILS_FTPC=y
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
-CONFIG_LIBC_NETDB=y
-CONFIG_NETDB_DNSCLIENT=y
-CONFIG_NETDB_DNSCLIENT_ENTRIES=4
-CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
 # CONFIG_NETUTILS_TFTPC is not set
 # CONFIG_NETUTILS_THTTPD is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -919,6 +1017,8 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
@@ -927,6 +1027,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -935,18 +1036,21 @@ CONFIG_NSH_DISABLE_GET=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+# CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 CONFIG_NSH_DISABLE_PUT=y
@@ -956,12 +1060,17 @@ CONFIG_NSH_DISABLE_PUT=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 CONFIG_NSH_DISABLE_WGET=y
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Configure Command Options
@@ -988,6 +1097,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1005,6 +1115,8 @@ CONFIG_NSH_NOMAC=y
 CONFIG_NSH_SWMAC=y
 CONFIG_NSH_MACADDR=0x00e0deadbeef
 CONFIG_NSH_MAX_ROUNDTRIP=20
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -1018,16 +1130,22 @@ CONFIG_NSH_MAX_ROUNDTRIP=20
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-# CONFIG_SYSTEM_POWEROFF is not set
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-lpc1766stk/hidkbd/Make.defs b/configs/olimex-lpc1766stk/hidkbd/Make.defs
index e86130ce63a4f6bbe11641c6298dd492e8666ebc..fa1320f7f3197f9e4893b9e12b65b1ab3991577a 100644
--- a/configs/olimex-lpc1766stk/hidkbd/Make.defs
+++ b/configs/olimex-lpc1766stk/hidkbd/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimex-lpc1766stk/hidkbd/defconfig b/configs/olimex-lpc1766stk/hidkbd/defconfig
index 995016cfd6e55c760e35dacb844439c46f89db8d..c0458b31316f9a2fbc8065679dbb628b2753bb3d 100644
--- a/configs/olimex-lpc1766stk/hidkbd/defconfig
+++ b/configs/olimex-lpc1766stk/hidkbd/defconfig
@@ -41,14 +41,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -62,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -75,14 +76,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
 # CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -91,10 +93,15 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -104,14 +111,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -121,6 +139,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -131,7 +150,8 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
 # CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
+# CONFIG_LPC17_GPIOIRQ is not set
+# CONFIG_SERIAL_TERMIOS is not set
 
 #
 # LPC17xx Configuration Options
@@ -215,6 +235,7 @@ CONFIG_USBHOST_NTDS=3
 CONFIG_USBHOST_TDBUFFERS=3
 CONFIG_USBHOST_TDBUFSIZE=128
 CONFIG_USBHOST_IOBUFSIZE=512
+CONFIG_LPC17_USBHOST_NPREALLOC=4
 CONFIG_USBHOST_BULK_DISABLE=y
 # CONFIG_USBHOST_INT_DISABLE is not set
 CONFIG_USBHOST_ISOC_DISABLE=y
@@ -230,11 +251,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -293,6 +317,8 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+CONFIG_LPC1766STK_USBHOST_STACKSIZE=1024
+CONFIG_LPC1766STK_USBHOST_PRIO=100
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -328,6 +354,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="hidkbd_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -364,6 +391,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -379,9 +407,10 @@ CONFIG_SIG_SIGWORK=17
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -415,6 +444,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
@@ -438,9 +468,24 @@ CONFIG_INPUT=y
 # CONFIG_INPUT_ADS7843E is not set
 # CONFIG_INPUT_MXT is not set
 # CONFIG_INPUT_STMPE811 is not set
+# CONFIG_BUTTONS is not set
 # CONFIG_DJOYSTICK is not set
 # CONFIG_AJOYSTICK is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -449,15 +494,17 @@ CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_HAVECARDDETECT is not set
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -481,17 +528,13 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
-# CONFIG_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
@@ -507,6 +550,7 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 # CONFIG_USBDEV is not set
 CONFIG_USBHOST=y
 CONFIG_USBHOST_NPREALLOC=0
@@ -528,15 +572,18 @@ CONFIG_HIDKBD_ENCODED=y
 # CONFIG_USBHOST_TRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -568,14 +615,10 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -595,6 +638,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -637,11 +684,14 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 CONFIG_LIB_KBDCODEC=y
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -656,14 +706,13 @@ CONFIG_LIB_KBDCODEC=y
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -671,15 +720,15 @@ CONFIG_LIB_KBDCODEC=y
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 CONFIG_EXAMPLES_HIDKBD=y
 CONFIG_EXAMPLES_HIDKBD_DEFPRIO=50
 CONFIG_EXAMPLES_HIDKBD_STACKSIZE=1024
 CONFIG_EXAMPLES_HIDKBD_DEVNAME="/dev/kbda"
 CONFIG_EXAMPLES_HIDKBD_ENCODED=y
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -687,35 +736,43 @@ CONFIG_EXAMPLES_HIDKBD_ENCODED=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -727,27 +784,23 @@ CONFIG_EXAMPLES_HIDKBD_ENCODED=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_PPPD is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
@@ -766,15 +819,16 @@ CONFIG_EXAMPLES_HIDKBD_ENCODED=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-lpc1766stk/hidmouse/Make.defs b/configs/olimex-lpc1766stk/hidmouse/Make.defs
index 6ff8eda3fa21d15a7e0770ba6a272997c0925a44..884d0492d7d645b24547802a10f7fdd59c88d6ef 100644
--- a/configs/olimex-lpc1766stk/hidmouse/Make.defs
+++ b/configs/olimex-lpc1766stk/hidmouse/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimex-lpc1766stk/hidmouse/defconfig b/configs/olimex-lpc1766stk/hidmouse/defconfig
index 152d049b7d088a55461a66375e3e485e5df2da62..4569bdabb1747b3ed876ead929b827f995304be6 100644
--- a/configs/olimex-lpc1766stk/hidmouse/defconfig
+++ b/configs/olimex-lpc1766stk/hidmouse/defconfig
@@ -41,14 +41,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -62,10 +64,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -75,10 +79,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -97,7 +101,9 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
@@ -108,14 +114,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -125,6 +142,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -135,7 +153,6 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
 # CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -210,7 +227,7 @@ CONFIG_LPC17_UART0=y
 #
 # Serial driver options
 #
-# CONFIG_LPC17_MULTICAST is not set
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
 # USB host driver options
@@ -237,6 +254,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -298,19 +316,17 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
 CONFIG_LPC1766STK_USBHOST_STACKSIZE=1024
 CONFIG_LPC1766STK_USBHOST_PRIO=100
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_TSCTEST=y
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -330,6 +346,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=12
@@ -384,6 +401,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -399,9 +417,10 @@ CONFIG_SIG_SIGWORK=17
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -425,6 +444,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -440,12 +460,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -463,8 +487,28 @@ CONFIG_MOUSE=y
 # CONFIG_BUTTONS is not set
 # CONFIG_DJOYSTICK is not set
 # CONFIG_AJOYSTICK is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_NETDEVICES is not set
@@ -474,9 +518,10 @@ CONFIG_NETDEV_TELNET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -500,10 +545,6 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -526,12 +567,14 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
 # CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 CONFIG_USBHOST=y
 CONFIG_USBHOST_NPREALLOC=4
 CONFIG_USBHOST_HAVE_ASYNCH=y
 # CONFIG_USBHOST_ASYNCH is not set
 # CONFIG_USBHOST_HUB is not set
+# CONFIG_USBHOST_COMPOSITE is not set
 # CONFIG_USBHOST_MSC is not set
 # CONFIG_USBHOST_CDCACM is not set
 # CONFIG_USBHOST_HIDKBD is not set
@@ -549,17 +592,23 @@ CONFIG_HIDMOUSE_XTHRESH=12
 CONFIG_HIDMOUSE_THRESHY=12
 # CONFIG_USBHOST_RTL8187 is not set
 # CONFIG_USBHOST_TRACE is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -567,13 +616,11 @@ CONFIG_HIDMOUSE_THRESHY=12
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -702,7 +749,9 @@ CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_NFS is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
@@ -712,12 +761,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -736,6 +779,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -763,6 +810,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -780,7 +829,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -788,14 +838,17 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=8
 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_RESOLVCONF is not set
 CONFIG_NETDB_DNSSERVER_NOADDR=y
 # CONFIG_NETDB_DNSSERVER_IPv4 is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -819,18 +872,21 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -840,26 +896,27 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
@@ -870,15 +927,21 @@ CONFIG_EXAMPLES_TOUCHSCREEN_MOUSE=y
 CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -891,8 +954,9 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -905,25 +969,27 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
 # CONFIG_NETUTILS_CODECS is not set
 CONFIG_NETUTILS_DHCPC=y
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -943,6 +1009,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
 # CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
@@ -969,13 +1036,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -985,6 +1052,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -992,6 +1060,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1017,6 +1086,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1046,6 +1116,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
 CONFIG_NSH_TELNETD_CLIENTPRIO=100
 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
 CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 # CONFIG_NSH_TELNET_LOGIN is not set
 
 #
@@ -1060,13 +1132,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1075,5 +1146,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-lpc1766stk/include/board.h b/configs/olimex-lpc1766stk/include/board.h
index c522b051dfc8dcda3a8288aa44e3fddd4a67f6eb..e147bc7377b69bb472d5ab854e1243b6418aa2f6 100644
--- a/configs/olimex-lpc1766stk/include/board.h
+++ b/configs/olimex-lpc1766stk/include/board.h
@@ -45,7 +45,7 @@
 
 #include 
 
-#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ)
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_GPIOIRQ)
 #  include 
 #endif
 
diff --git a/configs/olimex-lpc1766stk/nettest/Make.defs b/configs/olimex-lpc1766stk/nettest/Make.defs
index 04883513dd2eae176d02cd5a31d2b0322c4cc8ef..809dbd614c130e96b4225168ab69b3e0b5fe0d00 100644
--- a/configs/olimex-lpc1766stk/nettest/Make.defs
+++ b/configs/olimex-lpc1766stk/nettest/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimex-lpc1766stk/nettest/defconfig b/configs/olimex-lpc1766stk/nettest/defconfig
index d9b5662152346ca3d379511bbb1d8160ae7f1928..7f0e7390b66e528c8b87144f97c8908d5383bb03 100644
--- a/configs/olimex-lpc1766stk/nettest/defconfig
+++ b/configs/olimex-lpc1766stk/nettest/defconfig
@@ -37,14 +37,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -93,7 +97,9 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
@@ -104,14 +110,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -121,6 +138,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -128,7 +146,6 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 CONFIG_ARMV7M_OABI_TOOLCHAIN=y
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -203,6 +220,7 @@ CONFIG_LPC17_UART0=y
 #
 # Serial driver options
 #
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
 # Ethernet driver options
@@ -214,6 +232,7 @@ CONFIG_NET_NRXDESC=6
 # CONFIG_NET_WOL is not set
 # CONFIG_NET_HASH is not set
 # CONFIG_LPC17_MULTICAST is not set
+CONFIG_LPC17_ETHERNET_HPWORK=y
 
 #
 # Architecture Options
@@ -226,6 +245,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -291,6 +311,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -309,6 +330,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2010
 CONFIG_START_MONTH=11
@@ -357,6 +379,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -365,9 +388,10 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -391,6 +415,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -401,16 +426,21 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -418,9 +448,28 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -429,7 +478,9 @@ CONFIG_NETDEVICES=y
 # General Ethernet MAC Driver Options
 #
 # CONFIG_NETDEV_LOOPBACK is not set
+# CONFIG_NETDEV_TELNET is not set
 # CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NETDEV_LATEINIT is not set
 
 #
@@ -438,10 +489,9 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -465,9 +515,10 @@ CONFIG_ETH0_PHY_KS8721=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -491,13 +542,10 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -514,19 +562,27 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -534,13 +590,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -659,12 +713,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -683,6 +731,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -700,7 +752,7 @@ CONFIG_MM_REGIONS=2
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -708,6 +760,8 @@ CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -722,14 +776,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -741,22 +798,27 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # Application Configuration
 #
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -778,35 +840,44 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -817,8 +888,9 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -829,11 +901,12 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
@@ -855,15 +928,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-lpc1766stk/nsh/Make.defs b/configs/olimex-lpc1766stk/nsh/Make.defs
index 6e49ebc92038795826088228ba3f7bab086ae5f9..457bad7bf2692b5cbc485549002ce09f2a282fc8 100644
--- a/configs/olimex-lpc1766stk/nsh/Make.defs
+++ b/configs/olimex-lpc1766stk/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimex-lpc1766stk/nsh/defconfig b/configs/olimex-lpc1766stk/nsh/defconfig
index 5f83abd29a1b470526d958d09f0ecf9e8014db43..81eb193db2d496a776f689ea80cdc37cf4561093 100644
--- a/configs/olimex-lpc1766stk/nsh/defconfig
+++ b/configs/olimex-lpc1766stk/nsh/defconfig
@@ -42,10 +42,11 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +97,7 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -106,6 +110,7 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
 # CONFIG_ARCH_CORTEXR4 is not set
 # CONFIG_ARCH_CORTEXR4F is not set
 # CONFIG_ARCH_CORTEXR5 is not set
@@ -114,12 +119,15 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
@@ -130,6 +138,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -137,7 +146,6 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 CONFIG_ARMV7M_OABI_TOOLCHAIN=y
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -212,6 +220,7 @@ CONFIG_LPC17_SSP1=y
 #
 # Serial driver options
 #
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
 # Ethernet driver options
@@ -223,6 +232,7 @@ CONFIG_NET_NRXDESC=6
 # CONFIG_NET_WOL is not set
 # CONFIG_NET_HASH is not set
 # CONFIG_LPC17_MULTICAST is not set
+CONFIG_LPC17_ETHERNET_HPWORK=y
 
 #
 # Architecture Options
@@ -297,19 +307,15 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=1
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -329,6 +335,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=12
@@ -426,6 +433,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -441,19 +449,23 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 # CONFIG_SPI_EXCHANGE is not set
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -461,8 +473,18 @@ CONFIG_SPI=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -470,6 +492,7 @@ CONFIG_SPI=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -503,10 +526,8 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -530,9 +551,10 @@ CONFIG_ETH0_PHY_KS8721=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -556,10 +578,6 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -582,19 +600,26 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
 # CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -602,13 +627,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -746,14 +769,17 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
-# CONFIG_FS_PROCFS is not set
-# CONFIG_FS_UNIONFS is not set
+CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
 
 #
-# System Logging
+# Exclude individual procfs entries
 #
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_NET is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -773,6 +799,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -800,6 +830,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -817,7 +849,9 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -832,8 +866,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -857,19 +893,21 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -879,27 +917,26 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -907,11 +944,10 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -935,8 +971,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -949,20 +986,21 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CODECS is not set
 CONFIG_NETUTILS_DHCPC=y
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1007,7 +1045,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
-CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_IFUPDOWN is not set
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
 CONFIG_NSH_DISABLE_LOSMART=y
@@ -1015,13 +1053,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1039,6 +1077,9 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=1
 
 #
 # Configure Command Options
@@ -1046,6 +1087,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_CMDOPT_DF_H is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
 CONFIG_NSH_FILEIOSIZE=512
 
 #
@@ -1064,6 +1106,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1109,12 +1152,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1123,6 +1166,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-lpc1766stk/nx/Make.defs b/configs/olimex-lpc1766stk/nx/Make.defs
index 82c1d916f594bec51485f2eda528839c661bd0f2..9bab788e75c925c39cf38fd91285c0f60dbf50ad 100644
--- a/configs/olimex-lpc1766stk/nx/Make.defs
+++ b/configs/olimex-lpc1766stk/nx/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimex-lpc1766stk/nx/defconfig b/configs/olimex-lpc1766stk/nx/defconfig
index 34b2d4c3f07e9422bd0f0f2afd4e03408cb03adc..e37e5e3ee1fc4d105b85f5e898a8f73b716dd7be 100644
--- a/configs/olimex-lpc1766stk/nx/defconfig
+++ b/configs/olimex-lpc1766stk/nx/defconfig
@@ -41,14 +41,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -62,10 +64,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -75,10 +79,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -96,7 +100,11 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -106,14 +114,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -123,6 +142,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -134,7 +154,6 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_OABI_TOOLCHAIN is not set
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -209,6 +228,7 @@ CONFIG_LPC17_SSP0=y
 #
 # Serial driver options
 #
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
 # Architecture Options
@@ -221,11 +241,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -284,10 +307,11 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 CONFIG_BOARDCTL_GRAPHICS=y
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -307,6 +331,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2010
 CONFIG_START_MONTH=12
@@ -324,6 +349,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nx_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -374,9 +400,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -397,6 +424,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -407,16 +435,21 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -424,10 +457,20 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 # CONFIG_LCD_NOGETRUN is not set
@@ -454,6 +497,10 @@ CONFIG_NOKIA6100_ML=0
 CONFIG_NOKIA6100_RGBORD=0
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
+# CONFIG_LCD_UG2864HSWEG01 is not set
+# CONFIG_LCD_UG2832HSWEG04 is not set
+# CONFIG_LCD_SSD1351 is not set
 # CONFIG_LCD_ST7565 is not set
 # CONFIG_LCD_ST7567 is not set
 # CONFIG_LCD_UG2864AMBAG01 is not set
@@ -465,21 +512,27 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
+# CONFIG_SLCD is not set
 
 #
-# Alphanumeric/Segment LCD Devices
+# LED Support
 #
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -503,14 +556,11 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -527,19 +577,27 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -570,12 +628,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -584,6 +636,7 @@ CONFIG_NX_LCDDRIVER=y
 CONFIG_NX_NPLANES=1
 CONFIG_NX_BGCOLOR=0x0
 # CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -682,6 +735,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -707,6 +764,8 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -721,13 +780,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -740,27 +803,27 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -781,33 +844,43 @@ CONFIG_EXAMPLES_NX_BPP=8
 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set
 CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 CONFIG_EXAMPLES_NX_EXTERNINIT=y
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -819,26 +892,24 @@ CONFIG_EXAMPLES_NX_EXTERNINIT=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -856,15 +927,17 @@ CONFIG_EXAMPLES_NX_EXTERNINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-lpc1766stk/slip-httpd/Make.defs b/configs/olimex-lpc1766stk/slip-httpd/Make.defs
index 8f67068995c418899a300e9941a590f448f7ef82..072b3cab2859c8b2dc88d8f46fa49f50f1338698 100644
--- a/configs/olimex-lpc1766stk/slip-httpd/Make.defs
+++ b/configs/olimex-lpc1766stk/slip-httpd/Make.defs
@@ -77,7 +77,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimex-lpc1766stk/slip-httpd/defconfig b/configs/olimex-lpc1766stk/slip-httpd/defconfig
index bf9a212683fa661182ebeea1f7cf9569bbda18d7..abcfae2f653368447c814e4a939c9f34db8d7f66 100644
--- a/configs/olimex-lpc1766stk/slip-httpd/defconfig
+++ b/configs/olimex-lpc1766stk/slip-httpd/defconfig
@@ -37,14 +37,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -92,7 +96,11 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -102,14 +110,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -119,6 +138,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -126,7 +146,6 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_OABI_TOOLCHAIN is not set
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -202,7 +221,7 @@ CONFIG_LPC17_UART1=y
 # Serial driver options
 #
 # CONFIG_UART1_RINGINDICATOR is not set
-# CONFIG_LPC17_MULTICAST is not set
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
 # Architecture Options
@@ -215,11 +234,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -278,6 +300,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -296,6 +319,7 @@ CONFIG_DISABLE_MQUEUE=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2010
 CONFIG_START_MONTH=11
@@ -313,6 +337,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="thttp_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -350,9 +375,10 @@ CONFIG_NAME_MAX=32
 CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -373,6 +399,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -383,16 +410,21 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -400,19 +432,43 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_NETDEVICES is not set
 CONFIG_NET_SLIP=y
-# CONFIG_PIPES is not set
+CONFIG_PIPES=y
+CONFIG_DEV_PIPE_MAXSIZE=1024
+CONFIG_DEV_PIPE_SIZE=1024
+CONFIG_DEV_FIFO_SIZE=1024
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -436,15 +492,12 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_UART1_SERIAL_CONSOLE is not set
@@ -462,6 +515,7 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 
 #
 # UART1 Configuration
@@ -474,19 +528,27 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -494,13 +556,11 @@ CONFIG_UART1_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_SLIP_MTU=296
 CONFIG_NET_SLIP_TCP_RECVWNDO=256
 CONFIG_NET_GUARDSIZE=2
@@ -510,9 +570,10 @@ CONFIG_NET_GUARDSIZE=2
 #
 # CONFIG_NET_MULTILINK is not set
 # CONFIG_NET_ETHERNET is not set
-CONFIG_NET_SLIPNINTERFACES=1
-CONFIG_NET_SLIPSTACKSIZE=2048
-CONFIG_NET_SLIPDEFPRIO=128
+# CONFIG_NET_LOOPBACK is not set
+CONFIG_SLIP_NINTERFACES=1
+CONFIG_SLIP_STACKSIZE=2048
+CONFIG_SLIP_DEFPRIO=128
 # CONFIG_NET_TUN is not set
 
 #
@@ -593,6 +654,7 @@ CONFIG_IOB_NCHAINS=8
 # Routing Table Configuration
 #
 # CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME=""
 
 #
 # Crypto API
@@ -616,14 +678,10 @@ CONFIG_FS_READABLE=y
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 CONFIG_FS_ROMFS=y
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -643,6 +701,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -670,6 +732,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -685,13 +749,18 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -704,14 +773,15 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -719,11 +789,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -732,20 +802,21 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
@@ -753,6 +824,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 CONFIG_EXAMPLES_THTTPD=y
@@ -761,13 +833,24 @@ CONFIG_EXAMPLES_THTTPD_DRIPADDR=0x0a000001
 CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -779,20 +862,25 @@ CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
 CONFIG_NETUTILS_THTTPD=y
@@ -827,16 +915,10 @@ CONFIG_THTTPD_IDLE_SEND_LIMIT_SEC=300
 CONFIG_THTTPD_TILDE_MAP_NONE=y
 # CONFIG_THTTPD_GENERATE_INDICES is not set
 # CONFIG_THTTPD_USE_URLPATTERN is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -854,15 +936,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-lpc1766stk/src/lpc1766stk.h b/configs/olimex-lpc1766stk/src/lpc1766stk.h
index da5a6da689cc52a530e6269fd0d91f8605020159..e591862819a519056e9d5fd33a16ad6f8b225082 100644
--- a/configs/olimex-lpc1766stk/src/lpc1766stk.h
+++ b/configs/olimex-lpc1766stk/src/lpc1766stk.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/olimex-lpc1766stk/src/lpc1766stk.h
  *
- *   Copyright (C) 2010-2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010-2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -260,6 +260,18 @@
 
 void weak_function lpc1766stk_sspdev_initialize(void);
 
+/************************************************************************************
+ * Name: lpc1766stk_can_setup
+ *
+ * Description:
+ *  Initialize CAN and register the CAN device
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_CAN
+int lpc1766stk_can_setup(void);
+#endif
+
 #endif /* __ASSEMBLY__ */
 #endif /* _CONFIGS_OLIMEX_LPC1766STK_SRC_LPC1766STK_H */
 
diff --git a/configs/olimex-lpc1766stk/src/lpc17_appinit.c b/configs/olimex-lpc1766stk/src/lpc17_appinit.c
index a8176afa25e6844e1bd57b1057178ffb0d4d9e09..e3aa02bd456d844e4a64e2bf202a1804d7ae8012 100644
--- a/configs/olimex-lpc1766stk/src/lpc17_appinit.c
+++ b/configs/olimex-lpc1766stk/src/lpc17_appinit.c
@@ -39,6 +39,7 @@
 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -348,12 +349,38 @@ int board_app_initialize(uintptr_t arg)
   /* Initialize SPI-based microSD */
 
   ret = nsh_sdinitialize();
-  if (ret == OK)
+  if (ret < 0)
     {
-      /* Initialize USB host */
+      syslog(LOG_ERR, "ERROR: Failed to initialize SPI-based SD card: %d\n", ret);
+    }
+
+  /* Initialize USB host */
 
-      ret = nsh_usbhostinitialize();
+  ret = nsh_usbhostinitialize();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to initialize USB host: %d\n", ret);
     }
 
+#ifdef CONFIG_CAN
+  /* Initialize CAN and register the CAN driver. */
+
+  ret = lpc1766stk_can_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: lpc1766stk_can_setup failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_FS_PROCFS
+  /* Mount the procfs file system */
+
+  ret = mount(NULL, "/proc", "procfs", 0, NULL);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to mount procfs at /proc: %d\n", ret);
+    }
+#endif
+
   return ret;
 }
diff --git a/configs/olimex-lpc1766stk/src/lpc17_buttons.c b/configs/olimex-lpc1766stk/src/lpc17_buttons.c
index b2f2d811ca3e18368c909fc48250a7244a7aa4d6..37326a8277381578bade29e35acfb033f5d9e498 100644
--- a/configs/olimex-lpc1766stk/src/lpc17_buttons.c
+++ b/configs/olimex-lpc1766stk/src/lpc17_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/olimex-lpc1766stk/src/lpc17_buttons.c
  *
- *   Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -70,13 +70,7 @@ static const uint16_t g_buttoncfg[BOARD_NUM_BUTTONS] =
   LPC1766STK_UP,   LPC1766STK_DOWN, LPC1766STK_LEFT,   LPC1766STK_RIGHT
 };
 
-/* This array defines all of the interrupt handlers current attached to
- * button events.
- */
-
-#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ)
-static xcpt_t g_buttonisr[BOARD_NUM_BUTTONS];
-
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_GPIOIRQ)
 /* This array provides the mapping from button ID numbers to button IRQ
  * numbers.
  */
@@ -171,8 +165,7 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BOARD_BUTTON_* and BOARD_JOYSTICK_* definitions in board.h for the meaning
- *   of enumeration values.  The previous interrupt handler address is returned
- *   (so that it may restored, if so desired).
+ *   of enumeration values.
  *
  *   Note that board_button_irq() also enables button interrupts.  Button
  *   interrupts will remain enabled after the interrupt handler is attached.
@@ -181,10 +174,9 @@ uint8_t board_buttons(void)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ)
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_GPIOIRQ)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
   irqstate_t flags;
   int irq;
 
@@ -192,11 +184,6 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
 
   if ((unsigned)id < BOARD_NUM_BUTTONS)
     {
-      /* Return the current button handler and set the new interrupt handler */
-
-      oldhandler      = g_buttonisr[id];
-      g_buttonisr[id] = irqhandler;
-
       /* Disable interrupts until we are done */
 
       flags = enter_critical_section();
@@ -210,7 +197,7 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
         {
           /* Attach then enable the new interrupt handler */
 
-          (void)irq_attach(irq, irqhandler);
+          (void)irq_attach(irq, irqhandler, arg);
           up_enable_irq(irq);
         }
       else
@@ -220,9 +207,11 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
           up_disable_irq(irq);
           (void)irq_detach(irq);
         }
+
       leave_critical_section(flags);
     }
-  return oldhandler;
+
+  return OK;
 }
 #endif
 
diff --git a/configs/olimex-lpc1766stk/src/lpc17_can.c b/configs/olimex-lpc1766stk/src/lpc17_can.c
index ca0f8b05f1ee0e4ef434a9d7e6e8df62017e682e..a9e1b68c883deee8b2823c1ebe166a0f35e6ac70 100644
--- a/configs/olimex-lpc1766stk/src/lpc17_can.c
+++ b/configs/olimex-lpc1766stk/src/lpc17_can.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/solimex-lpc1766stk/src/lpc17_can.c
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,7 +42,7 @@
 #include 
 #include 
 
-#include 
+#include 
 #include 
 
 #include "chip.h"
@@ -51,7 +51,7 @@
 #include "lpc17_can.h"
 #include "lpc1766stk.h"
 
-#if defined(CONFIG_CAN) && (defined(CONFIG_LPC17_CAN1) || defined(CONFIG_LPC17_CAN2))
+#ifdef CONFIG_CAN
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -73,72 +73,46 @@
 #  define CAN_PORT 2
 #endif
 
-/* Debug ***************************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
-
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
-#else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_can_initialize
+ * Name: lpc1766stk_can_setup
  *
  * Description:
- *   All LPC17 architectures must provide the following interface to work with
- *   examples/can.
+ *  Initialize CAN and register the CAN device
  *
  ************************************************************************************/
 
-int board_can_initialize(void)
+int lpc1766stk_can_setup(void)
 {
-  static bool initialized = false;
+#if defined(CONFIG_LPC17_CAN1) || defined(CONFIG_LPC17_CAN2)
   struct can_dev_s *can;
   int ret;
 
-  /* Check if we have already initialized */
+  /* Call lpc17_caninitialize() to get an instance of the CAN interface */
 
-  if (!initialized)
+  can = lpc17_caninitialize(CAN_PORT);
+  if (can == NULL)
     {
-      /* Call lpc17_caninitialize() to get an instance of the CAN interface */
-
-      can = lpc17_caninitialize(CAN_PORT);
-      if (can == NULL)
-        {
-          candbg("ERROR:  Failed to get CAN interface\n");
-          return -ENODEV;
-        }
-
-      /* Register the CAN driver at "/dev/can0" */
-
-      ret = can_register("/dev/can0", can);
-      if (ret < 0)
-        {
-          candbg("ERROR: can_register failed: %d\n", ret);
-          return ret;
-        }
+      canerr("ERROR:  Failed to get CAN interface\n");
+      return -ENODEV;
+    }
 
-      /* Now we are initialized */
+  /* Register the CAN driver at "/dev/can0" */
 
-      initialized = true;
+  ret = can_register("/dev/can0", can);
+  if (ret < 0)
+    {
+      canerr("ERROR: can_register failed: %d\n", ret);
+      return ret;
     }
 
   return OK;
+#else
+  return -ENODEV;
+#endif
 }
 
-#endif /* CONFIG_CAN && (CONFIG_LPC17_CAN1 || CONFIG_LPC17_CAN2) */
+#endif /* CONFIG_CAN */
diff --git a/configs/olimex-lpc1766stk/src/lpc17_hidkbd.c b/configs/olimex-lpc1766stk/src/lpc17_hidkbd.c
index 7c0d304fd11505366587a618a5e32e4610788ea1..a92e00774e6a5e149085f53f132aa61fe144aa17 100644
--- a/configs/olimex-lpc1766stk/src/lpc17_hidkbd.c
+++ b/configs/olimex-lpc1766stk/src/lpc17_hidkbd.c
@@ -76,7 +76,7 @@ struct usbhost_connection_s *arch_usbhost_initialize(void)
   ret = usbhost_hub_initialize();
   if (ret < 0)
     {
-      udbg("ERROR: usbhost_hub_initialize failed: %d\n", ret);
+      uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
     }
 #endif
 
diff --git a/configs/olimex-lpc1766stk/src/lpc17_hidmouse.c b/configs/olimex-lpc1766stk/src/lpc17_hidmouse.c
index 8c8f6f38add793fa0a5eee833f15e5a5c5f72e1d..f583d52679213d618ac69e0ae3a99e4a19dd06cf 100644
--- a/configs/olimex-lpc1766stk/src/lpc17_hidmouse.c
+++ b/configs/olimex-lpc1766stk/src/lpc17_hidmouse.c
@@ -60,32 +60,12 @@
  */
 
 #ifndef CONFIG_DEBUG_INPUT
-#  undef  idbg
-#  define idbg    udbg
-#  undef  illdbg
-#  define illdbg  ulldbg
-#  undef  ivdbg
-#  define ivdbg   uvdbg
-#  undef  illvdbg
-#  define illvdbg ullvdbg
+#  undef  ierr
+#  define ierr    uerr
+#  undef  iinfo
+#  define iinfo   uinfo
 #endif
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -114,7 +94,7 @@ int board_tsc_setup(int minor)
   static bool initialized = false;
   int ret;
 
-  idbg("minor %d\n", minor);
+  iinfo("minor %d\n", minor);
   DEBUGASSERT(minor == 0);
 
   /* Have we already initialized?  Since we never uninitialize we must prevent
@@ -131,7 +111,7 @@ int board_tsc_setup(int minor)
       ret = usbhost_hub_initialize();
       if (ret < 0)
         {
-          idbg("ERROR: usbhost_hub_initialize failed: %d\n", ret);
+          ierr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
         }
 #endif
 
@@ -140,7 +120,7 @@ int board_tsc_setup(int minor)
       ret = usbhost_mouse_init();
       if (ret < 0)
         {
-          idbg("Failed to register USB HID mouse device class\n");
+          ierr("ERROR: Failed to register USB HID mouse device class\n");
           return -ENODEV;
         }
 
diff --git a/configs/olimex-lpc1766stk/src/lpc17_lcd.c b/configs/olimex-lpc1766stk/src/lpc17_lcd.c
index 26de717fad4f693a18096415621c1b659873e350..2bde4f2ddf612feb9d4b05e5af376ba0c2773f1d 100644
--- a/configs/olimex-lpc1766stk/src/lpc17_lcd.c
+++ b/configs/olimex-lpc1766stk/src/lpc17_lcd.c
@@ -75,24 +75,15 @@
 
 /* Define the CONFIG_LCD_NOKIADBG to enable detailed debug output (stuff you
  * would never want to see unless you are debugging this file).
- *
- * Verbose debug must also be enabled
  */
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_INFO
 #  undef CONFIG_LCD_NOKIADBG
 #endif
 
 #ifdef CONFIG_LCD_NOKIADBG
-#  define lcddbg(format, ...) vdbg(format, ##__VA_ARGS__)
 #  define lcd_dumpgpio(m)     lpc17_dumpgpio(LPC1766STK_LCD_RST, m)
 #else
-#  define lcddbg(x...)
 #  define lcd_dumpgpio(m)
 #endif
 
@@ -214,7 +205,7 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
   spi = lpc17_sspbus_initialize(0);
   if (!spi)
     {
-      glldbg("Failed to initialize SSP port 0\n");
+      gerr("ERROR: Failed to initialize SSP port 0\n");
     }
   else
     {
@@ -223,11 +214,11 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
       dev = nokia_lcdinitialize(spi, devno);
       if (!dev)
         {
-          glldbg("Failed to bind SSP port 0 to LCD %d: %d\n", devno);
+          gerr("ERROR: Failed to bind SSP port 0 to LCD %d: %d\n", devno);
         }
      else
         {
-          gllvdbg("Bound SSP port 0 to LCD %d\n", devno);
+          ginfo("Bound SSP port 0 to LCD %d\n", devno);
 
           /* And turn the LCD on (CONFIG_LCD_MAXPOWER should be 1) */
 
diff --git a/configs/olimex-lpc1766stk/src/lpc17_leds.c b/configs/olimex-lpc1766stk/src/lpc17_leds.c
index 8f83ca967c6f752f351164aec423ced994de6d80..14914c0d941dd4da78b72c75d82c30edfcd223ff 100644
--- a/configs/olimex-lpc1766stk/src/lpc17_leds.c
+++ b/configs/olimex-lpc1766stk/src/lpc17_leds.c
@@ -58,25 +58,9 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS)
+#ifdef CONFIG_DEBUG_LEDS_INFO
 #  define led_dumpgpio(m) lpc17_dumpgpio(LPC1766STK_LED1, m)
 #else
 #  define led_dumpgpio(m)
diff --git a/configs/olimex-lpc1766stk/src/lpc17_ssp.c b/configs/olimex-lpc1766stk/src/lpc17_ssp.c
index 14d426ed375026137a9f39d79550751c7edc4fbe..7317a014b0fe1d8533e0d264fc58e346a9661121 100644
--- a/configs/olimex-lpc1766stk/src/lpc17_ssp.c
+++ b/configs/olimex-lpc1766stk/src/lpc17_ssp.c
@@ -66,36 +66,17 @@
 
 #undef HAVE_SPI_CALLBACK
 #ifdef CONFIG_SPI_CALLBACK
-#  ifndef CONFIG_GPIO_IRQ
-#    warning "CONFIG_GPIO_IRQ is required to support CONFIG_SPI_CALLBACK"
+#  ifndef CONFIG_LPC17_GPIOIRQ
+#    warning "CONFIG_LPC17_GPIOIRQ is required to support CONFIG_SPI_CALLBACK"
 #  else
 #    define HAVE_SPI_CALLBACK 1
 #  endif
 #endif
 
 /* Debug ********************************************************************/
-/* The following enable debug output from this file (needs CONFIG_DEBUG too).
- *
- * CONFIG_SSP_DEBUG - Define to enable basic SSP debug
- * CONFIG_SSP_VERBOSE - Define to enable verbose SSP debug
- */
-
-#ifdef CONFIG_SSP_DEBUG
-#  define sspdbg  lldbg
-#  ifdef CONFIG_SSP_VERBOSE
-#    define sspvdbg lldbg
-#  else
-#    define sspvdbg(x...)
-#  endif
-#else
-#  undef CONFIG_SSP_VERBOSE
-#  define sspdbg(x...)
-#  define sspvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#ifdef CONFIG_SSP_VERBOSE
+#ifdef CONFIG_DEBUG_GPIO_INFO
 #  define ssp_dumpssp0gpio(m) lpc17_dumpgpio(LPC1766STK_LCD_CS, m)
 #  define ssp_dumpssp1gpio(m) lpc17_dumpgpio(LPC1766STK_MMC_CS, m)
 #else
@@ -161,7 +142,7 @@ static void ssp_cdirqsetup(int irq, xcpt_t irqhandler)
     {
       /* Attach then enable the new interrupt handler */
 
-      (void)irq_attach(irq, irqhandler);
+      (void)irq_attach(irq, irqhandler, NULL);
       up_enable_irq(irq);
     }
   else
@@ -284,7 +265,7 @@ void weak_function lpc1766stk_sspdev_initialize(void)
 #ifdef CONFIG_LPC17_SSP0
 void  lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
   if (devid == SPIDEV_DISPLAY)
     {
       /* Assert/de-assert the CS pin to the card */
@@ -297,7 +278,7 @@ void  lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
 
 uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  sspdbg("Returning nothing\n");
+  spiinfo("Returning nothing\n");
   return 0;
 }
 #endif
@@ -305,7 +286,7 @@ uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_LPC17_SSP1
 void  lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
   if (devid == SPIDEV_MMCSD)
     {
       /* Assert/de-assert the CS pin to the card */
@@ -318,7 +299,7 @@ void  lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
 
 uint8_t lpc17_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  sspdbg("Returning SPI_STATUS_PRESENT\n");
+  spiinfo("Returning SPI_STATUS_PRESENT\n");
   return SPI_STATUS_PRESENT;
 }
 #endif
diff --git a/configs/olimex-lpc1766stk/thttpd-binfs/Make.defs b/configs/olimex-lpc1766stk/thttpd-binfs/Make.defs
index 9bf88272e98d47727b89d71b8fefa81e46d424f6..e4d75e7d2c7697e8c14ae8abcad75341456be2ed 100644
--- a/configs/olimex-lpc1766stk/thttpd-binfs/Make.defs
+++ b/configs/olimex-lpc1766stk/thttpd-binfs/Make.defs
@@ -77,7 +77,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimex-lpc1766stk/thttpd-binfs/defconfig b/configs/olimex-lpc1766stk/thttpd-binfs/defconfig
index da3dca2d7e3000e6d4b39aade5beefaddbf6530f..9424e0308e4dd287dd7d0a1f8740b90a5d09d268 100644
--- a/configs/olimex-lpc1766stk/thttpd-binfs/defconfig
+++ b/configs/olimex-lpc1766stk/thttpd-binfs/defconfig
@@ -41,14 +41,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -62,10 +64,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -75,10 +79,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -96,7 +100,11 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -106,14 +114,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -123,6 +142,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -133,7 +153,6 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
 # CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -208,6 +227,7 @@ CONFIG_LPC17_UART0=y
 #
 # Serial driver options
 #
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
 # Ethernet driver options
@@ -219,6 +239,7 @@ CONFIG_NET_NRXDESC=13
 # CONFIG_NET_WOL is not set
 # CONFIG_NET_HASH is not set
 # CONFIG_LPC17_MULTICAST is not set
+CONFIG_LPC17_ETHERNET_HPWORK=y
 
 #
 # Architecture Options
@@ -231,11 +252,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -294,6 +318,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -312,6 +337,7 @@ CONFIG_DISABLE_MQUEUE=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2010
 CONFIG_START_MONTH=11
@@ -329,6 +355,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="thttp_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -359,6 +386,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -367,9 +395,10 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -393,6 +422,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -403,16 +433,21 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -420,8 +455,28 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -429,7 +484,11 @@ CONFIG_NETDEVICES=y
 #
 # General Ethernet MAC Driver Options
 #
+# CONFIG_NETDEV_LOOPBACK is not set
+# CONFIG_NETDEV_TELNET is not set
 # CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
+# CONFIG_NETDEV_LATEINIT is not set
 
 #
 # External Ethernet MAC Device Support
@@ -437,9 +496,9 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
-# CONFIG_NET_VNET is not set
+# CONFIG_NET_FTMAC100 is not set
 
 #
 # External Ethernet PHY Device Support
@@ -457,14 +516,19 @@ CONFIG_ETH0_PHY_KS8721=y
 # CONFIG_ETH0_PHY_LAN8720 is not set
 # CONFIG_ETH0_PHY_LAN8740 is not set
 # CONFIG_ETH0_PHY_LAN8740A is not set
+# CONFIG_ETH0_PHY_LAN8742A is not set
 # CONFIG_ETH0_PHY_DM9161 is not set
-# CONFIG_PIPES is not set
+CONFIG_PIPES=y
+CONFIG_DEV_PIPE_MAXSIZE=1024
+CONFIG_DEV_PIPE_SIZE=1024
+CONFIG_DEV_FIFO_SIZE=1024
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -488,13 +552,10 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -511,19 +572,27 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -531,13 +600,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -547,6 +614,7 @@ CONFIG_NET_GUARDSIZE=2
 #
 # CONFIG_NET_MULTILINK is not set
 CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
 # CONFIG_NET_TUN is not set
 
 #
@@ -632,6 +700,7 @@ CONFIG_IOB_NCHAINS=8
 # Routing Table Configuration
 #
 # CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME=""
 
 #
 # Crypto API
@@ -655,17 +724,12 @@ CONFIG_FS_READABLE=y
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 CONFIG_FS_ROMFS=y
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 CONFIG_FS_BINFS=y
 # CONFIG_FS_PROCFS is not set
 CONFIG_FS_UNIONFS=y
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -684,6 +748,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -711,6 +779,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -726,13 +796,18 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -749,11 +824,16 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -761,11 +841,11 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -774,20 +854,20 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
@@ -795,6 +875,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 CONFIG_EXAMPLES_THTTPD=y
@@ -803,14 +884,24 @@ CONFIG_EXAMPLES_THTTPD_DRIPADDR=0x0a000001
 CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -822,20 +913,25 @@ CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
 CONFIG_NETUTILS_THTTPD=y
@@ -870,16 +966,10 @@ CONFIG_THTTPD_IDLE_SEND_LIMIT_SEC=300
 CONFIG_THTTPD_TILDE_MAP_NONE=y
 # CONFIG_THTTPD_GENERATE_INDICES is not set
 # CONFIG_THTTPD_USE_URLPATTERN is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -897,15 +987,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-lpc1766stk/thttpd-nxflat/Make.defs b/configs/olimex-lpc1766stk/thttpd-nxflat/Make.defs
index f5553eecad33a1b76f7658a5f78171caa3f7e575..4477c528a46363426363b674ee57e5368d153c2a 100644
--- a/configs/olimex-lpc1766stk/thttpd-nxflat/Make.defs
+++ b/configs/olimex-lpc1766stk/thttpd-nxflat/Make.defs
@@ -77,7 +77,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig b/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig
index ae4b8bfd3e221a7f0c6043a768f7105c96778a4d..6c5fcdb6147f87c407b6c8feea043fe9b08a510d 100644
--- a/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig
+++ b/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig
@@ -37,14 +37,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -92,7 +96,11 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -102,14 +110,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -119,6 +138,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -126,7 +146,6 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_OABI_TOOLCHAIN is not set
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -201,6 +220,7 @@ CONFIG_LPC17_UART0=y
 #
 # Serial driver options
 #
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
 # Ethernet driver options
@@ -212,6 +232,7 @@ CONFIG_NET_NRXDESC=13
 # CONFIG_NET_WOL is not set
 # CONFIG_NET_HASH is not set
 # CONFIG_LPC17_MULTICAST is not set
+CONFIG_LPC17_ETHERNET_HPWORK=y
 
 #
 # Architecture Options
@@ -224,11 +245,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -287,6 +311,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -305,6 +330,7 @@ CONFIG_DISABLE_MQUEUE=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2010
 CONFIG_START_MONTH=11
@@ -322,6 +348,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="thttp_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -352,6 +379,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -360,9 +388,10 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -386,6 +415,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -396,16 +426,21 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -413,8 +448,28 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -422,7 +477,11 @@ CONFIG_NETDEVICES=y
 #
 # General Ethernet MAC Driver Options
 #
+# CONFIG_NETDEV_LOOPBACK is not set
+# CONFIG_NETDEV_TELNET is not set
 # CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
+# CONFIG_NETDEV_LATEINIT is not set
 
 #
 # External Ethernet MAC Device Support
@@ -430,9 +489,9 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
-# CONFIG_NET_VNET is not set
+# CONFIG_NET_FTMAC100 is not set
 
 #
 # External Ethernet PHY Device Support
@@ -441,6 +500,7 @@ CONFIG_NETDEVICES=y
 # CONFIG_ETH0_PHY_NONE is not set
 # CONFIG_ETH0_PHY_AM79C874 is not set
 CONFIG_ETH0_PHY_KS8721=y
+# CONFIG_ETH0_PHY_KSZ8041 is not set
 # CONFIG_ETH0_PHY_KSZ8051 is not set
 # CONFIG_ETH0_PHY_KSZ8061 is not set
 # CONFIG_ETH0_PHY_KSZ8081 is not set
@@ -449,14 +509,19 @@ CONFIG_ETH0_PHY_KS8721=y
 # CONFIG_ETH0_PHY_LAN8720 is not set
 # CONFIG_ETH0_PHY_LAN8740 is not set
 # CONFIG_ETH0_PHY_LAN8740A is not set
+# CONFIG_ETH0_PHY_LAN8742A is not set
 # CONFIG_ETH0_PHY_DM9161 is not set
-# CONFIG_PIPES is not set
+CONFIG_PIPES=y
+CONFIG_DEV_PIPE_MAXSIZE=1024
+CONFIG_DEV_PIPE_SIZE=1024
+CONFIG_DEV_FIFO_SIZE=1024
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -480,13 +545,10 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -503,19 +565,27 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -523,13 +593,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -539,6 +607,7 @@ CONFIG_NET_GUARDSIZE=2
 #
 # CONFIG_NET_MULTILINK is not set
 CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
 # CONFIG_NET_TUN is not set
 
 #
@@ -624,6 +693,7 @@ CONFIG_IOB_NCHAINS=8
 # Routing Table Configuration
 #
 # CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME=""
 
 #
 # Crypto API
@@ -647,14 +717,10 @@ CONFIG_FS_READABLE=y
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 CONFIG_FS_ROMFS=y
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -674,6 +740,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -701,6 +771,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -716,13 +788,18 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -735,14 +812,15 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -750,11 +828,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -763,20 +841,21 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
@@ -784,6 +863,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 CONFIG_EXAMPLES_THTTPD=y
@@ -792,13 +872,24 @@ CONFIG_EXAMPLES_THTTPD_DRIPADDR=0x0a000001
 CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -810,20 +901,25 @@ CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
 CONFIG_NETUTILS_THTTPD=y
@@ -831,6 +927,7 @@ CONFIG_THTTPD_PORT=80
 CONFIG_THTTPD_IPADDR=0x0a000002
 CONFIG_THTTPD_SERVER_ADDRESS="http://www.nuttx.org"
 CONFIG_THTTPD_SERVER_SOFTWARE="thttpd/2.25b 29dec2003-NuttX"
+CONFIG_THTTPD_NXFLAT=y
 CONFIG_THTTPD_PATH="/mnt/www"
 CONFIG_THTTPD_CGI_PATH="/mnt/www/cgi-bin"
 CONFIG_THTTPD_CGI_PATTERN="/mnt/www/cgi-bin/*"
@@ -857,16 +954,10 @@ CONFIG_THTTPD_IDLE_SEND_LIMIT_SEC=300
 CONFIG_THTTPD_TILDE_MAP_NONE=y
 # CONFIG_THTTPD_GENERATE_INDICES is not set
 # CONFIG_THTTPD_USE_URLPATTERN is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -884,15 +975,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-lpc1766stk/usbmsc/Make.defs b/configs/olimex-lpc1766stk/usbmsc/Make.defs
index 01f55f9ce93306fbc257e2d2890b40ea9b350bed..d6efed34aee6c69645472dd31e632408efef618d 100644
--- a/configs/olimex-lpc1766stk/usbmsc/Make.defs
+++ b/configs/olimex-lpc1766stk/usbmsc/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimex-lpc1766stk/usbmsc/defconfig b/configs/olimex-lpc1766stk/usbmsc/defconfig
index f499036204d37f35d378ce0d0d8bcfac4ed08742..7001bb0068997e364b1a7161e8d3c0d4a34481b3 100644
--- a/configs/olimex-lpc1766stk/usbmsc/defconfig
+++ b/configs/olimex-lpc1766stk/usbmsc/defconfig
@@ -37,14 +37,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -71,10 +72,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -92,7 +93,11 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -102,14 +107,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -119,6 +135,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -126,7 +143,7 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_OABI_TOOLCHAIN is not set
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
+# CONFIG_LPC17_GPIOIRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -224,11 +241,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -288,7 +308,12 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # Board-Specific Options
 #
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
 
 #
 # RTOS Features
@@ -323,6 +348,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="msconn_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -373,9 +399,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -406,14 +433,20 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
 # CONFIG_SPI_EXCHANGE is not set
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_I2S is not set
 
 #
@@ -427,7 +460,21 @@ CONFIG_SPI=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -439,15 +486,17 @@ CONFIG_MMCSD_SPICLOCK=12500000
 CONFIG_MMCSD_SPIMODE=0
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -471,14 +520,11 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -495,6 +541,7 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 CONFIG_USBDEV=y
 
 #
@@ -534,15 +581,18 @@ CONFIG_USBMSC_SCSI_STACKSIZE=2048
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -574,16 +624,11 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -602,6 +647,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -646,11 +695,15 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -665,26 +718,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -692,33 +745,45 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -731,26 +796,23 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -768,17 +830,17 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 CONFIG_SYSTEM_USBMSC=y
 CONFIG_SYSTEM_USBMSC_NLUNS=1
 CONFIG_SYSTEM_USBMSC_DEVMINOR1=0
@@ -788,4 +850,5 @@ CONFIG_SYSTEM_USBMSC_DEVPATH2="/dev/mmcsd1"
 CONFIG_SYSTEM_USBMSC_DEVMINOR3=2
 CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2"
 # CONFIG_SYSTEM_USBMSC_DEBUGMM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-lpc1766stk/usbserial/Make.defs b/configs/olimex-lpc1766stk/usbserial/Make.defs
index 6d17a6ae4977b6a551f61da89539bcc6309d8039..81b8d75306cd182c052dca6d49321f359b0c73c4 100644
--- a/configs/olimex-lpc1766stk/usbserial/Make.defs
+++ b/configs/olimex-lpc1766stk/usbserial/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimex-lpc1766stk/usbserial/defconfig b/configs/olimex-lpc1766stk/usbserial/defconfig
index 28806b7c2b275b02a2d29f6864a0e34df319accb..efb282c692fbbba1bf4b2aa8a67890f08f11e721 100644
--- a/configs/olimex-lpc1766stk/usbserial/defconfig
+++ b/configs/olimex-lpc1766stk/usbserial/defconfig
@@ -42,10 +42,11 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +72,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -117,6 +116,8 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
@@ -134,6 +135,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -141,7 +143,7 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 CONFIG_ARMV7M_OABI_TOOLCHAIN=y
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
+# CONFIG_LPC17_GPIOIRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -310,8 +312,6 @@ CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -452,7 +452,12 @@ CONFIG_DEV_NULL=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -460,6 +465,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -468,10 +474,10 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -495,10 +501,6 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -559,15 +561,18 @@ CONFIG_PL2303_PRODUCTSTR="USBdev Serial"
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -598,12 +603,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -668,7 +667,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -676,6 +674,7 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -704,10 +703,10 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -716,20 +715,19 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -741,11 +739,11 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 CONFIG_EXAMPLES_USBSERIAL=y
 CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -767,8 +765,8 @@ CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -779,6 +777,7 @@ CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -800,16 +799,16 @@ CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-lpc1766stk/zmodem/Make.defs b/configs/olimex-lpc1766stk/zmodem/Make.defs
index a48683a886441516e053fe2ab665ff632e33c941..10efd86e2b244eccf601f54dbd5db1735faa6ea4 100644
--- a/configs/olimex-lpc1766stk/zmodem/Make.defs
+++ b/configs/olimex-lpc1766stk/zmodem/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimex-lpc1766stk/zmodem/defconfig b/configs/olimex-lpc1766stk/zmodem/defconfig
index f0880d4d32b71ebd959489f4cd6b956b1e097e0a..c268b6c96353e226d316a8f54cd34ecc95882e32 100644
--- a/configs/olimex-lpc1766stk/zmodem/defconfig
+++ b/configs/olimex-lpc1766stk/zmodem/defconfig
@@ -37,14 +37,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -93,7 +97,9 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
@@ -104,14 +110,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -121,6 +138,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -128,7 +146,6 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 CONFIG_ARMV7M_OABI_TOOLCHAIN=y
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -204,6 +221,7 @@ CONFIG_LPC17_SSP1=y
 # Serial driver options
 #
 # CONFIG_UART1_RINGINDICATOR is not set
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
 # Ethernet driver options
@@ -215,6 +233,7 @@ CONFIG_NET_NRXDESC=6
 # CONFIG_NET_WOL is not set
 # CONFIG_NET_HASH is not set
 # CONFIG_LPC17_MULTICAST is not set
+CONFIG_LPC17_ETHERNET_HPWORK=y
 
 #
 # Architecture Options
@@ -227,6 +246,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -288,19 +308,15 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=1
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -320,6 +336,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=12
@@ -374,6 +391,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -389,9 +407,10 @@ CONFIG_SIG_SIGWORK=17
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -415,6 +434,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -430,10 +450,15 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 # CONFIG_SPI_EXCHANGE is not set
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
@@ -441,6 +466,7 @@ CONFIG_SPI=y
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -448,7 +474,26 @@ CONFIG_SPI=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -460,6 +505,7 @@ CONFIG_MMCSD_SPICLOCK=12500000
 CONFIG_MMCSD_SPIMODE=0
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -481,10 +527,9 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -508,9 +553,10 @@ CONFIG_ETH0_PHY_KS8721=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -534,10 +580,6 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -574,19 +616,26 @@ CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
 # CONFIG_UART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -594,13 +643,11 @@ CONFIG_UART1_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -729,7 +776,9 @@ CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_NFS is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
@@ -739,12 +788,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -763,6 +806,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -790,6 +837,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -807,7 +856,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -815,14 +865,17 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=8
 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_RESOLVCONF is not set
 CONFIG_NETDB_DNSSERVER_NOADDR=y
 # CONFIG_NETDB_DNSSERVER_IPv4 is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -846,18 +899,21 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -867,41 +923,48 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -914,8 +977,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -927,25 +991,27 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -965,6 +1031,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
 # CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
@@ -991,13 +1058,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1007,6 +1074,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -1014,6 +1082,9 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=1
 
 #
 # Configure Command Options
@@ -1039,6 +1110,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1067,6 +1139,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
 CONFIG_NSH_TELNETD_CLIENTPRIO=100
 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
 CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 # CONFIG_NSH_TELNET_LOGIN is not set
 
 #
@@ -1081,13 +1155,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1096,6 +1169,9 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 CONFIG_SYSTEM_ZMODEM=y
 CONFIG_SYSTEM_ZMODEM_DEVNAME="/dev/ttyS1"
diff --git a/configs/olimex-lpc2378/nsh/Make.defs b/configs/olimex-lpc2378/nsh/Make.defs
index d5c026545c47873aba5ff6874fdeb9981038c5d4..65a92de4843bf03e6d462293ede4e9f55f53febe 100644
--- a/configs/olimex-lpc2378/nsh/Make.defs
+++ b/configs/olimex-lpc2378/nsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(HOSTOS),Cygwin)
 endif
 endif
 
-ifeq ("${CONFIG_DEBUG}","y")
+ifeq ("${CONFIG_DEBUG_FEATURES}","y")
   ARCHOPTIMIZATION = -g
 endif
 
@@ -91,7 +91,7 @@ else
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
@@ -120,7 +120,7 @@ EXEEXT =
 ifneq ($(CROSSDEV),arm-nuttx-elf-)
   LDFLAGS += -nostartfiles -nodefaultlibs
 endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
   LDFLAGS += -g
 endif
 
diff --git a/configs/olimex-lpc2378/nsh/defconfig b/configs/olimex-lpc2378/nsh/defconfig
index 207ae574d59e3ec1c9dd494a23253b81bcd2c01e..12382154aa3ccb7fec4bb87649c1eb9431a331be 100644
--- a/configs/olimex-lpc2378/nsh/defconfig
+++ b/configs/olimex-lpc2378/nsh/defconfig
@@ -42,10 +42,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,10 +72,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +94,7 @@ CONFIG_ARCH_CHIP_LPC2378=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -106,6 +107,7 @@ CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
 # CONFIG_ARCH_CORTEXR4 is not set
 # CONFIG_ARCH_CORTEXR4F is not set
 # CONFIG_ARCH_CORTEXR5 is not set
@@ -114,8 +116,11 @@ CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="lpc2378"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 # CONFIG_ARCH_LOWVECTORS is not set
@@ -162,6 +167,7 @@ CONFIG_LPC2378_UART2=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -360,13 +366,20 @@ CONFIG_DEV_NULL=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -375,9 +388,10 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -401,10 +415,6 @@ CONFIG_UART2_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -445,15 +455,18 @@ CONFIG_UART2_2STOP=0
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -490,12 +503,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -514,6 +521,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -556,12 +567,14 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -590,10 +603,10 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -602,39 +615,44 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
 # CONFIG_FSUTILS_INIFILE is not set
 
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -645,8 +663,8 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -657,6 +675,7 @@ CONFIG_EXAMPLES_NSH=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -768,12 +787,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -781,5 +800,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-stm32-e407/Kconfig b/configs/olimex-stm32-e407/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..7e553c54365d6674a3545bf3441008295322d23e
--- /dev/null
+++ b/configs/olimex-stm32-e407/Kconfig
@@ -0,0 +1,8 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_BOARD_OLIMEX_STM32E407
+
+endif
diff --git a/configs/olimex-stm32-e407/README.txt b/configs/olimex-stm32-e407/README.txt
new file mode 100644
index 0000000000000000000000000000000000000000..0b6e02eee735a1d93c721a27724a9a512dc13123
--- /dev/null
+++ b/configs/olimex-stm32-e407/README.txt
@@ -0,0 +1,6 @@
+README
+======
+The Olimex STM32-E407 configuration is based on the configuration olimex-stm32-h407 and stm32f4discovery.
+
+nsh - Basic shell run on USART2.
+usbnsh - Basic shell run on the virtual serial port.
diff --git a/configs/olimex-stm32-e407/discover/Make.defs b/configs/olimex-stm32-e407/discover/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..968dc2167bc4f4b26eb481a834247cfc148f9e83
--- /dev/null
+++ b/configs/olimex-stm32-e407/discover/Make.defs
@@ -0,0 +1,112 @@
+############################################################################
+# configs/olimex-stm32-e407/discover/Make.defs
+#
+#   Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
diff --git a/configs/olimex-stm32-e407/discover/defconfig b/configs/olimex-stm32-e407/discover/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..5f69b278edfb1676f28bf73b68b43c614b881fa9
--- /dev/null
+++ b/configs/olimex-stm32-e407/discover/defconfig
@@ -0,0 +1,1303 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
+# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+# CONFIG_ARCH_CHIP_STM32F103C8 is not set
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+CONFIG_ARCH_CHIP_STM32F407ZG=y
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+# CONFIG_STM32_STM32F10XX is not set
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+# CONFIG_STM32_PERFORMANCELINE is not set
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+# CONFIG_STM32_MEDIUMDENSITY is not set
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+CONFIG_STM32_STM32F40XX=y
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+CONFIG_STM32_STM32F407=y
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+CONFIG_STM32_HAVE_CCM=y
+# CONFIG_STM32_HAVE_USBDEV is not set
+CONFIG_STM32_HAVE_OTGFS=y
+CONFIG_STM32_HAVE_FSMC=y
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+CONFIG_STM32_HAVE_USART6=y
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+CONFIG_STM32_HAVE_TIM2=y
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+CONFIG_STM32_HAVE_TIM9=y
+CONFIG_STM32_HAVE_TIM10=y
+CONFIG_STM32_HAVE_TIM11=y
+CONFIG_STM32_HAVE_TIM12=y
+CONFIG_STM32_HAVE_TIM13=y
+CONFIG_STM32_HAVE_TIM14=y
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+CONFIG_STM32_HAVE_CAN2=y
+CONFIG_STM32_HAVE_DAC1=y
+CONFIG_STM32_HAVE_DAC2=y
+CONFIG_STM32_HAVE_RNG=y
+CONFIG_STM32_HAVE_ETHMAC=y
+CONFIG_STM32_HAVE_I2C2=y
+CONFIG_STM32_HAVE_I2C3=y
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKPSRAM is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CAN2 is not set
+# CONFIG_STM32_CCMDATARAM is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_CRYP is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_DAC1 is not set
+# CONFIG_STM32_DAC2 is not set
+# CONFIG_STM32_DCMI is not set
+CONFIG_STM32_ETHMAC=y
+# CONFIG_STM32_FSMC is not set
+# CONFIG_STM32_HASH is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_I2C3 is not set
+# CONFIG_STM32_OTGFS is not set
+# CONFIG_STM32_OTGHS is not set
+CONFIG_STM32_PWR=y
+# CONFIG_STM32_RNG is not set
+# CONFIG_STM32_SDIO is not set
+# CONFIG_STM32_SPI1 is not set
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SYSCFG=y
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+# CONFIG_STM32_TIM9 is not set
+# CONFIG_STM32_TIM10 is not set
+# CONFIG_STM32_TIM11 is not set
+# CONFIG_STM32_TIM12 is not set
+# CONFIG_STM32_TIM13 is not set
+# CONFIG_STM32_TIM14 is not set
+# CONFIG_STM32_USART1 is not set
+CONFIG_STM32_USART2=y
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USART6 is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_FLASH_PREFETCH is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+CONFIG_STM32_JTAG_FULL_ENABLE=y
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+# CONFIG_STM32_JTAG_SW_ENABLE is not set
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM2_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+# CONFIG_STM32_TIM9_CAP is not set
+# CONFIG_STM32_TIM10_CAP is not set
+# CONFIG_STM32_TIM11_CAP is not set
+# CONFIG_STM32_TIM12_CAP is not set
+# CONFIG_STM32_TIM13_CAP is not set
+# CONFIG_STM32_TIM14_CAP is not set
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
+# CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+# CONFIG_STM32_HAVE_RTC_COUNTER is not set
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# Ethernet MAC configuration
+#
+CONFIG_STM32_PHYADDR=0
+# CONFIG_STM32_PHYINIT is not set
+# CONFIG_STM32_MII is not set
+CONFIG_STM32_AUTONEG=y
+CONFIG_STM32_PHYSR=31
+CONFIG_STM32_PHYSR_ALTCONFIG=y
+CONFIG_STM32_PHYSR_ALTMODE=0x001c
+CONFIG_STM32_PHYSR_10HD=0x0004
+CONFIG_STM32_PHYSR_100HD=0x0008
+CONFIG_STM32_PHYSR_10FD=0x0014
+CONFIG_STM32_PHYSR_100FD=0x0018
+# CONFIG_STM32_ETH_PTP is not set
+CONFIG_STM32_RMII=y
+# CONFIG_STM32_RMII_MCO1 is not set
+# CONFIG_STM32_RMII_MCO2 is not set
+CONFIG_STM32_RMII_EXTCLK=y
+CONFIG_STM32_ETHMAC_HPWORK=y
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=16717
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=114688
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_OLIMEX_STM32H407 is not set
+CONFIG_ARCH_BOARD_OLIMEX_STM32E407=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="olimex-stm32-e407"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+# CONFIG_ARCH_IRQBUTTONS is not set
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+# CONFIG_LIB_BOARDCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=12
+CONFIG_START_DAY=6
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=16
+CONFIG_WDOG_INTRESERVE=4
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="discover_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=31
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+CONFIG_NETDEVICES=y
+
+#
+# General Ethernet MAC Driver Options
+#
+# CONFIG_NETDEV_LOOPBACK is not set
+# CONFIG_NETDEV_TELNET is not set
+# CONFIG_NETDEV_MULTINIC is not set
+# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set
+# CONFIG_NETDEV_LATEINIT is not set
+
+#
+# External Ethernet MAC Device Support
+#
+# CONFIG_NET_DM90x0 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ENCX24J600 is not set
+# CONFIG_NET_SLIP is not set
+# CONFIG_NET_FTMAC100 is not set
+
+#
+# External Ethernet PHY Device Support
+#
+# CONFIG_ARCH_PHY_INTERRUPT is not set
+# CONFIG_ETH0_PHY_NONE is not set
+# CONFIG_ETH0_PHY_AM79C874 is not set
+# CONFIG_ETH0_PHY_KS8721 is not set
+# CONFIG_ETH0_PHY_KSZ8041 is not set
+# CONFIG_ETH0_PHY_KSZ8051 is not set
+# CONFIG_ETH0_PHY_KSZ8061 is not set
+# CONFIG_ETH0_PHY_KSZ8081 is not set
+# CONFIG_ETH0_PHY_KSZ90x1 is not set
+# CONFIG_ETH0_PHY_DP83848C is not set
+CONFIG_ETH0_PHY_LAN8720=y
+# CONFIG_ETH0_PHY_LAN8740 is not set
+# CONFIG_ETH0_PHY_LAN8740A is not set
+# CONFIG_ETH0_PHY_LAN8742A is not set
+# CONFIG_ETH0_PHY_DM9161 is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART2_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART2 Configuration
+#
+CONFIG_USART2_RXBUFSIZE=128
+CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART2_BAUD=115200
+CONFIG_USART2_BITS=8
+CONFIG_USART2_PARITY=0
+CONFIG_USART2_2STOP=0
+# CONFIG_USART2_IFLOWCONTROL is not set
+# CONFIG_USART2_OFLOWCONTROL is not set
+# CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+CONFIG_ARCH_HAVE_NET=y
+CONFIG_ARCH_HAVE_PHY=y
+CONFIG_NET=y
+# CONFIG_NET_PROMISCUOUS is not set
+
+#
+# Driver buffer configuration
+#
+CONFIG_NET_ETH_MTU=590
+CONFIG_NET_ETH_TCP_RECVWNDO=536
+CONFIG_NET_GUARDSIZE=2
+
+#
+# Data link support
+#
+# CONFIG_NET_MULTILINK is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
+# CONFIG_NET_TUN is not set
+
+#
+# Network Device Operations
+#
+# CONFIG_NETDEV_PHY_IOCTL is not set
+
+#
+# Internet Protocol Selection
+#
+CONFIG_NET_IPv4=y
+# CONFIG_NET_IPv6 is not set
+
+#
+# Socket Support
+#
+CONFIG_NSOCKET_DESCRIPTORS=10
+CONFIG_NET_NACTIVESOCKETS=16
+CONFIG_NET_SOCKOPTS=y
+CONFIG_NET_SOLINGER=y
+
+#
+# Raw Socket Support
+#
+# CONFIG_NET_PKT is not set
+
+#
+# Unix Domain Socket Support
+#
+# CONFIG_NET_LOCAL is not set
+
+#
+# TCP/IP Networking
+#
+CONFIG_NET_TCP=y
+# CONFIG_NET_TCPURGDATA is not set
+CONFIG_NET_TCP_CONNS=40
+CONFIG_NET_MAX_LISTENPORTS=40
+CONFIG_NET_TCP_READAHEAD=y
+# CONFIG_NET_TCP_WRITE_BUFFERS is not set
+CONFIG_NET_TCP_RECVDELAY=0
+CONFIG_NET_TCPBACKLOG=y
+# CONFIG_NET_TCP_SPLIT is not set
+# CONFIG_NET_SENDFILE is not set
+
+#
+# UDP Networking
+#
+CONFIG_NET_UDP=y
+CONFIG_NET_UDP_CHECKSUMS=y
+CONFIG_NET_UDP_CONNS=8
+CONFIG_NET_BROADCAST=y
+# CONFIG_NET_RXAVAIL is not set
+CONFIG_NET_UDP_READAHEAD=y
+
+#
+# ICMP Networking Support
+#
+CONFIG_NET_ICMP=y
+CONFIG_NET_ICMP_PING=y
+
+#
+# IGMPv2 Client Support
+#
+# CONFIG_NET_IGMP is not set
+
+#
+# ARP Configuration
+#
+CONFIG_NET_ARP=y
+CONFIG_NET_ARPTAB_SIZE=16
+CONFIG_NET_ARP_MAXAGE=120
+CONFIG_NET_ARP_IPIN=y
+# CONFIG_NET_ARP_SEND is not set
+
+#
+# Network I/O Buffer Support
+#
+CONFIG_NET_IOB=y
+CONFIG_IOB_NBUFFERS=24
+CONFIG_IOB_BUFSIZE=196
+CONFIG_IOB_NCHAINS=8
+# CONFIG_NET_ARCH_INCR32 is not set
+# CONFIG_NET_ARCH_CHKSUM is not set
+CONFIG_NET_STATISTICS=y
+
+#
+# Routing Table Configuration
+#
+# CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME=""
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_FS_READABLE is not set
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_NFS is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=2
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+CONFIG_LIBC_NETDB=y
+CONFIG_NETDB_DNSCLIENT=y
+CONFIG_NETDB_DNSCLIENT_ENTRIES=8
+CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
+CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
+CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_DNSSERVER_NOADDR is not set
+CONFIG_NETDB_DNSSERVER_IPv4=y
+CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+CONFIG_EXAMPLES_DISCOVER=y
+CONFIG_EXAMPLES_DISCOVER_DHCPC=y
+CONFIG_EXAMPLES_DISCOVER_NOMAC=y
+CONFIG_EXAMPLES_DISCOVER_DRIPADDR=0xc0a80101
+CONFIG_EXAMPLES_DISCOVER_NETMASK=0xffffff00
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NETTEST is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+# CONFIG_EXAMPLES_NSH is not set
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_UDP is not set
+# CONFIG_EXAMPLES_UDPBLASTER is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_WGET is not set
+# CONFIG_EXAMPLES_XMLRPC is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+CONFIG_NETUTILS_DHCPC=y
+# CONFIG_NETUTILS_DHCPD is not set
+CONFIG_NETUTILS_DISCOVER=y
+CONFIG_DISCOVER_STACK_SIZE=1024
+CONFIG_DISCOVER_PRIORITY=50
+CONFIG_DISCOVER_PORT=96
+CONFIG_DISCOVER_INTERFACE="eth0"
+CONFIG_DISCOVER_DEVICE_CLASS=0xff
+CONFIG_DISCOVER_DESCR="NuttX"
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_FTPD is not set
+# CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
+# CONFIG_NETUTILS_SMTP is not set
+# CONFIG_NETUTILS_TELNETD is not set
+# CONFIG_NETUTILS_TFTPC is not set
+# CONFIG_NETUTILS_WEBCLIENT is not set
+# CONFIG_NETUTILS_WEBSERVER is not set
+# CONFIG_NETUTILS_XMLRPC is not set
+
+#
+# NSH Library
+#
+# CONFIG_NSH_LIBRARY is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_NETDB is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
+# CONFIG_SYSTEM_READLINE is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-stm32-e407/discover/setenv.sh b/configs/olimex-stm32-e407/discover/setenv.sh
new file mode 100755
index 0000000000000000000000000000000000000000..528a4978e84bd6afe99c5ae37711ca178a152aac
--- /dev/null
+++ b/configs/olimex-stm32-e407/discover/setenv.sh
@@ -0,0 +1,80 @@
+#!/bin/bash
+# configs/olimex-stm32-e407/discover/setenv.sh
+#
+#   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the RIDE
+# toolchain under windows.  You will also have to edit this if you install
+# the RIDE toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# These are the Cygwin paths to the locations where I installed the Atollic
+# toolchain under windows.  You will also have to edit this if you install
+# the Atollic toolchain in any other location.  /usr/bin is added before
+# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
+# at those locations as well.
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH variable
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/olimex-stm32-e407/include/board.h b/configs/olimex-stm32-e407/include/board.h
new file mode 100644
index 0000000000000000000000000000000000000000..df7751c5795574701ac79cbf13834f028e20cac4
--- /dev/null
+++ b/configs/olimex-stm32-e407/include/board.h
@@ -0,0 +1,295 @@
+/************************************************************************************
+ * configs/olimex-stm32-e407/include/board.h
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Modified for H407 Neil Hancock
+ *           Modified for E407 Mateusz Szafoni
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __CONFIGS_OLIMEX_STM32_E407_INCLUDE_BOARD_H
+#define __CONFIGS_OLIMEX_STM32_E407_INCLUDE_BOARD_H 1
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#ifndef __ASSEMBLY__
+#  include 
+#  include 
+#endif
+
+#ifdef __KERNEL__
+#  include "stm32_rcc.h"
+#  include "stm32_sdio.h"
+#  include "stm32.h"
+#endif
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Clocking *************************************************************************/
+/* The Olimex-STM32-E407 board features a 12MHz crystal and
+ * a 32kHz RTC backup crystal.
+ *
+ * This is the canonical configuration:
+ *   System Clock source           : PLL (HSE)
+ *   SYSCLK(Hz)                    : 168000000    Determined by PLL configuration
+ *   HCLK(Hz)                      : 168000000    (STM32_RCC_CFGR_HPRE)
+ *   AHB Prescaler                 : 1            (STM32_RCC_CFGR_HPRE)
+ *   APB1 Prescaler                : 4            (STM32_RCC_CFGR_PPRE1)
+ *   APB2 Prescaler                : 2            (STM32_RCC_CFGR_PPRE2)
+ *   HSE Frequency(Hz)             : 8000000      (STM32_BOARD_XTAL)
+ *   PLLM                          : 8            (STM32_PLLCFG_PLLM)
+ *   PLLN                          : 336          (STM32_PLLCFG_PLLN)
+ *   PLLP                          : 2            (STM32_PLLCFG_PLLP)
+ *   PLLQ                          : 7            (STM32_PLLCFG_PLLQ)
+ *   Main regulator output voltage : Scale1 mode  Needed for high speed SYSCLK
+ *   Flash Latency(WS)             : 5
+ *   Prefetch Buffer               : OFF
+ *   Instruction cache             : ON
+ *   Data cache                    : ON
+ *   Require 48MHz for USB OTG FS, : Enabled
+ *   SDIO and RNG clock
+ */
+
+/* HSI - 16 MHz RC factory-trimmed
+ * LSI - 32 KHz RC (30-60KHz, uncalibrated)
+ * HSE - On-board crystal frequency is 12MHz
+ * LSE - 32.768 kHz
+ * STM32F407ZGT6 - too 168Mhz
+ */
+
+#define STM32_BOARD_XTAL        12000000ul
+
+#define STM32_HSI_FREQUENCY     16000000ul
+#define STM32_LSI_FREQUENCY     32000
+#define STM32_HSE_FREQUENCY     STM32_BOARD_XTAL
+#define STM32_LSE_FREQUENCY     32768
+
+/* Main PLL Configuration.
+ *
+ * PLL source is HSE
+ * PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN
+ *         = (25,000,000 / 12) * 360
+ *         = 240,000,000
+ * SYSCLK  = PLL_VCO / PLLP
+ *         = 240,000,000 / 2 = 120,000,000
+ * USB OTG FS, SDIO and RNG Clock
+ *         =  PLL_VCO / PLLQ
+ *         = 240,000,000 / 5 = 48,000,000
+ *         = 48,000,000
+ *
+ *  Xtal     /M  *n  /P         SysClk AHB HCLK  APB1     PCLK1
+ * 12Mhz HSE /12 336 /2 PLLCLK 168Mhz  /1  168    /4     42Mhz
+ * 12Mhz HSE /6  168 /2 PLLCLK 168Mhz  /1  168    /4     42Mhz
+ */
+
+#define STM32_PLLCFG_PLLM       RCC_PLLCFG_PLLM(3)
+#define STM32_PLLCFG_PLLN       RCC_PLLCFG_PLLN(84)
+#define STM32_PLLCFG_PLLP       RCC_PLLCFG_PLLP_2
+#define STM32_PLLCFG_PLLQ       RCC_PLLCFG_PLLQ(5)
+#define STM32_PLLCFG_PLLQ       RCC_PLLCFG_PLLQ(7)
+
+#define STM32_SYSCLK_FREQUENCY  168000000ul
+
+/* AHB clock (HCLK) is SYSCLK (168MHz) */
+
+#define STM32_RCC_CFGR_HPRE     RCC_CFGR_HPRE_SYSCLK  /* HCLK  = SYSCLK / 1 */
+#define STM32_HCLK_FREQUENCY    STM32_SYSCLK_FREQUENCY
+#define STM32_BOARD_HCLK        STM32_HCLK_FREQUENCY  /* same as above, to satisfy compiler */
+
+/* APB1 clock (PCLK1) is HCLK/4 (42MHz) */
+
+#define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd4     /* PCLK1 = HCLK / 4 */
+#define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/4)
+
+/* Timers driven from APB1 will be twice PCLK1 */
+
+#define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM12_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM13_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM14_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+
+/* APB2 clock (PCLK2) is HCLK/2  */
+
+#define STM32_RCC_CFGR_PPRE2    RCC_CFGR_PPRE2_HCLKd2     /* PCLK2 = HCLK / 2 */
+#define STM32_PCLK2_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
+
+/* Timers driven from APB2 will be twice PCLK2 */
+
+#define STM32_APB2_TIM1_CLKIN   (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM8_CLKIN   (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM9_CLKIN   (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM10_CLKIN  (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM11_CLKIN  (2*STM32_PCLK2_FREQUENCY)
+
+/* Timer Frequencies, if APBx is set to 1, frequency is same as APBx
+ * otherwise frequency is 2xAPBx.
+ * Note: TIM1,8 are on APB2, others on APB1
+ */
+
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM3_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM4_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM5_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM6_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM7_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM8_FREQUENCY    STM32_HCLK_FREQUENCY
+
+/* LED definitions ******************************************************************/
+/* If CONFIG_ARCH_LEDS is not defined, then the user can control the status LED in any
+ * way.  The following definitions are used to access individual LEDs.
+ */
+
+/* LED index values for use with board_userled() */
+
+#define BOARD_LED_STATUS  0
+#define BOARD_NLEDS       1
+
+/* LED bits for use with board_userled_all() */
+
+#define BOARD_LED_STATUS_BIT    (1 << BOARD_LED1)
+
+/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the status LED of the
+ * Olimex STM32-E405.  The following definitions describe how NuttX controls the LEDs:
+ */
+
+#define LED_STARTED       0  /* LED_STATUS on */
+#define LED_HEAPALLOCATE  1  /* no change */
+#define LED_IRQSENABLED   2  /* no change */
+#define LED_STACKCREATED  3  /* no change */
+#define LED_INIRQ         4  /* no change */
+#define LED_SIGNAL        5  /* no change */
+#define LED_ASSERTION     6  /* LED_STATUS off */
+#define LED_PANIC         7  /* LED_STATUS blinking */
+
+/* Button definitions ***************************************************************/
+/* The Olimex STM32-E405 supports one buttons: */
+
+#define BUTTON_BUT     0
+#define NUM_BUTTONS    1
+
+#define BUTTON_BUT_BIT (1 << BUTTON_BUT)
+
+/* Alternate function pin selections ************************************************/
+
+/* USART1 */
+#define GPIO_USART1_RX    GPIO_USART1_RX_2 /* PB7 */
+#define GPIO_USART1_TX    GPIO_USART1_TX_2 /* PB6 */
+
+/* USART2 */
+#define GPIO_USART2_RX    GPIO_USART2_RX_2 /* PD6 */
+#define GPIO_USART2_TX    GPIO_USART2_TX_2 /* PD5 */
+
+/* USART3 */
+#define GPIO_USART3_RX    GPIO_USART3_RX_1 /* PB11 */
+#define GPIO_USART3_TX    GPIO_USART3_TX_1 /* PB10 */
+
+/* CAN */
+#define GPIO_CAN1_RX      GPIO_CAN1_RX_2 /* PB8 */
+#define GPIO_CAN1_TX      GPIO_CAN1_TX_2 /* PB9 */
+
+/* I2C */
+#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1 /* PB6 */
+#define GPIO_I2C1_SDA GPIO_I2C1_SDA_1 /* PB7 */
+
+/* Ethernet *************************************************************************/
+
+#if defined(CONFIG_STM32_ETHMAC)
+/* RMII interface to the LAN8710 PHY (works with LAN8720 driver)*/
+
+#  ifndef CONFIG_STM32_RMII
+#    error CONFIG_STM32_RMII must be defined
+#  endif
+
+/* Clocking is provided by an external 50Mhz XTAL */
+
+#  ifndef CONFIG_STM32_RMII_EXTCLK
+#    error CONFIG_STM32_RMII_EXTCLK must be defined
+#  endif
+
+/* Pin disambiguation */
+
+#  define GPIO_ETH_MII_COL    GPIO_ETH_MII_COL_1 /* PA3 */
+#  define GPIO_ETH_RMII_TXD0  GPIO_ETH_RMII_TXD0_2 /* PG13 */
+#  define GPIO_ETH_RMII_TXD1  GPIO_ETH_RMII_TXD1_2 /* PG14 */
+#  define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_2 /* PG11 */
+
+#endif
+
+/*******************************************************************************
+ * Public Data
+ ******************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/******************************************************************************
+ * Public Function Prototypes
+ *****************************************************************************/
+
+/******************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.  This entry point
+ *   is called early in the initialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ *****************************************************************************/
+
+void stm32_boardinitialize(void);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __CONFIGS_OLIMEX_STM32_E407_INCLUDE_BOARD_H */
diff --git a/configs/olimex-stm32-e407/netnsh/Make.defs b/configs/olimex-stm32-e407/netnsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..78d74cf65640eda6a5fd9f15e45104c7e742b128
--- /dev/null
+++ b/configs/olimex-stm32-e407/netnsh/Make.defs
@@ -0,0 +1,112 @@
+############################################################################
+# configs/olimex-stm32-e407/netnsh/Make.defs
+#
+#   Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
diff --git a/configs/olimex-stm32-e407/netnsh/defconfig b/configs/olimex-stm32-e407/netnsh/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..3f0cc2edded54e18c777c57699632b89276d9a0f
--- /dev/null
+++ b/configs/olimex-stm32-e407/netnsh/defconfig
@@ -0,0 +1,1435 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
+# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+# CONFIG_ARCH_CHIP_STM32F103C8 is not set
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+CONFIG_ARCH_CHIP_STM32F407ZG=y
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+# CONFIG_STM32_STM32F10XX is not set
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+# CONFIG_STM32_PERFORMANCELINE is not set
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+# CONFIG_STM32_MEDIUMDENSITY is not set
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+CONFIG_STM32_STM32F40XX=y
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+CONFIG_STM32_STM32F407=y
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+CONFIG_STM32_HAVE_CCM=y
+# CONFIG_STM32_HAVE_USBDEV is not set
+CONFIG_STM32_HAVE_OTGFS=y
+CONFIG_STM32_HAVE_FSMC=y
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+CONFIG_STM32_HAVE_USART6=y
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+CONFIG_STM32_HAVE_TIM2=y
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+CONFIG_STM32_HAVE_TIM9=y
+CONFIG_STM32_HAVE_TIM10=y
+CONFIG_STM32_HAVE_TIM11=y
+CONFIG_STM32_HAVE_TIM12=y
+CONFIG_STM32_HAVE_TIM13=y
+CONFIG_STM32_HAVE_TIM14=y
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+CONFIG_STM32_HAVE_CAN2=y
+CONFIG_STM32_HAVE_DAC1=y
+CONFIG_STM32_HAVE_DAC2=y
+CONFIG_STM32_HAVE_RNG=y
+CONFIG_STM32_HAVE_ETHMAC=y
+CONFIG_STM32_HAVE_I2C2=y
+CONFIG_STM32_HAVE_I2C3=y
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKPSRAM is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CAN2 is not set
+# CONFIG_STM32_CCMDATARAM is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_CRYP is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_DAC1 is not set
+# CONFIG_STM32_DAC2 is not set
+# CONFIG_STM32_DCMI is not set
+CONFIG_STM32_ETHMAC=y
+# CONFIG_STM32_FSMC is not set
+# CONFIG_STM32_HASH is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_I2C3 is not set
+# CONFIG_STM32_OTGFS is not set
+# CONFIG_STM32_OTGHS is not set
+CONFIG_STM32_PWR=y
+# CONFIG_STM32_RNG is not set
+# CONFIG_STM32_SDIO is not set
+# CONFIG_STM32_SPI1 is not set
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SYSCFG=y
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+# CONFIG_STM32_TIM9 is not set
+# CONFIG_STM32_TIM10 is not set
+# CONFIG_STM32_TIM11 is not set
+# CONFIG_STM32_TIM12 is not set
+# CONFIG_STM32_TIM13 is not set
+# CONFIG_STM32_TIM14 is not set
+# CONFIG_STM32_USART1 is not set
+CONFIG_STM32_USART2=y
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USART6 is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_FLASH_PREFETCH is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+CONFIG_STM32_JTAG_FULL_ENABLE=y
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+# CONFIG_STM32_JTAG_SW_ENABLE is not set
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM2_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+# CONFIG_STM32_TIM9_CAP is not set
+# CONFIG_STM32_TIM10_CAP is not set
+# CONFIG_STM32_TIM11_CAP is not set
+# CONFIG_STM32_TIM12_CAP is not set
+# CONFIG_STM32_TIM13_CAP is not set
+# CONFIG_STM32_TIM14_CAP is not set
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
+# CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+# CONFIG_STM32_HAVE_RTC_COUNTER is not set
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# Ethernet MAC configuration
+#
+CONFIG_STM32_PHYADDR=0
+# CONFIG_STM32_PHYINIT is not set
+# CONFIG_STM32_MII is not set
+CONFIG_STM32_AUTONEG=y
+CONFIG_STM32_PHYSR=31
+CONFIG_STM32_PHYSR_ALTCONFIG=y
+CONFIG_STM32_PHYSR_ALTMODE=0x001c
+CONFIG_STM32_PHYSR_10HD=0x0004
+CONFIG_STM32_PHYSR_100HD=0x0008
+CONFIG_STM32_PHYSR_10FD=0x0014
+CONFIG_STM32_PHYSR_100FD=0x0018
+# CONFIG_STM32_ETH_PTP is not set
+CONFIG_STM32_RMII=y
+# CONFIG_STM32_RMII_MCO1 is not set
+# CONFIG_STM32_RMII_MCO2 is not set
+CONFIG_STM32_RMII_EXTCLK=y
+CONFIG_STM32_ETHMAC_HPWORK=y
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=16717
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=114688
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_OLIMEX_STM32H407 is not set
+CONFIG_ARCH_BOARD_OLIMEX_STM32E407=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="olimex-stm32-e407"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+# CONFIG_ARCH_IRQBUTTONS is not set
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+# CONFIG_LIB_BOARDCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=12
+CONFIG_START_DAY=6
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=16
+CONFIG_WDOG_INTRESERVE=4
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=31
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+CONFIG_NETDEVICES=y
+
+#
+# General Ethernet MAC Driver Options
+#
+# CONFIG_NETDEV_LOOPBACK is not set
+CONFIG_NETDEV_TELNET=y
+CONFIG_TELNET_RXBUFFER_SIZE=256
+CONFIG_TELNET_TXBUFFER_SIZE=256
+# CONFIG_NETDEV_MULTINIC is not set
+# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set
+# CONFIG_NETDEV_LATEINIT is not set
+
+#
+# External Ethernet MAC Device Support
+#
+# CONFIG_NET_DM90x0 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ENCX24J600 is not set
+# CONFIG_NET_SLIP is not set
+# CONFIG_NET_FTMAC100 is not set
+
+#
+# External Ethernet PHY Device Support
+#
+# CONFIG_ARCH_PHY_INTERRUPT is not set
+# CONFIG_ETH0_PHY_NONE is not set
+# CONFIG_ETH0_PHY_AM79C874 is not set
+# CONFIG_ETH0_PHY_KS8721 is not set
+# CONFIG_ETH0_PHY_KSZ8041 is not set
+# CONFIG_ETH0_PHY_KSZ8051 is not set
+# CONFIG_ETH0_PHY_KSZ8061 is not set
+# CONFIG_ETH0_PHY_KSZ8081 is not set
+# CONFIG_ETH0_PHY_KSZ90x1 is not set
+# CONFIG_ETH0_PHY_DP83848C is not set
+CONFIG_ETH0_PHY_LAN8720=y
+# CONFIG_ETH0_PHY_LAN8740 is not set
+# CONFIG_ETH0_PHY_LAN8740A is not set
+# CONFIG_ETH0_PHY_LAN8742A is not set
+# CONFIG_ETH0_PHY_DM9161 is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART2_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART2 Configuration
+#
+CONFIG_USART2_RXBUFSIZE=128
+CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART2_BAUD=115200
+CONFIG_USART2_BITS=8
+CONFIG_USART2_PARITY=0
+CONFIG_USART2_2STOP=0
+# CONFIG_USART2_IFLOWCONTROL is not set
+# CONFIG_USART2_OFLOWCONTROL is not set
+# CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+CONFIG_ARCH_HAVE_NET=y
+CONFIG_ARCH_HAVE_PHY=y
+CONFIG_NET=y
+# CONFIG_NET_PROMISCUOUS is not set
+
+#
+# Driver buffer configuration
+#
+CONFIG_NET_ETH_MTU=590
+CONFIG_NET_ETH_TCP_RECVWNDO=536
+CONFIG_NET_GUARDSIZE=2
+
+#
+# Data link support
+#
+# CONFIG_NET_MULTILINK is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
+# CONFIG_NET_TUN is not set
+
+#
+# Network Device Operations
+#
+# CONFIG_NETDEV_PHY_IOCTL is not set
+
+#
+# Internet Protocol Selection
+#
+CONFIG_NET_IPv4=y
+# CONFIG_NET_IPv6 is not set
+
+#
+# Socket Support
+#
+CONFIG_NSOCKET_DESCRIPTORS=10
+CONFIG_NET_NACTIVESOCKETS=16
+CONFIG_NET_SOCKOPTS=y
+CONFIG_NET_SOLINGER=y
+
+#
+# Raw Socket Support
+#
+# CONFIG_NET_PKT is not set
+
+#
+# Unix Domain Socket Support
+#
+# CONFIG_NET_LOCAL is not set
+
+#
+# TCP/IP Networking
+#
+CONFIG_NET_TCP=y
+# CONFIG_NET_TCPURGDATA is not set
+CONFIG_NET_TCP_CONNS=40
+CONFIG_NET_MAX_LISTENPORTS=40
+CONFIG_NET_TCP_READAHEAD=y
+# CONFIG_NET_TCP_WRITE_BUFFERS is not set
+CONFIG_NET_TCP_RECVDELAY=0
+CONFIG_NET_TCPBACKLOG=y
+# CONFIG_NET_TCP_SPLIT is not set
+# CONFIG_NET_SENDFILE is not set
+
+#
+# UDP Networking
+#
+CONFIG_NET_UDP=y
+CONFIG_NET_UDP_CHECKSUMS=y
+CONFIG_NET_UDP_CONNS=8
+CONFIG_NET_BROADCAST=y
+# CONFIG_NET_RXAVAIL is not set
+CONFIG_NET_UDP_READAHEAD=y
+
+#
+# ICMP Networking Support
+#
+CONFIG_NET_ICMP=y
+CONFIG_NET_ICMP_PING=y
+
+#
+# IGMPv2 Client Support
+#
+# CONFIG_NET_IGMP is not set
+
+#
+# ARP Configuration
+#
+CONFIG_NET_ARP=y
+CONFIG_NET_ARPTAB_SIZE=16
+CONFIG_NET_ARP_MAXAGE=120
+CONFIG_NET_ARP_IPIN=y
+# CONFIG_NET_ARP_SEND is not set
+
+#
+# Network I/O Buffer Support
+#
+CONFIG_NET_IOB=y
+CONFIG_IOB_NBUFFERS=24
+CONFIG_IOB_BUFSIZE=196
+CONFIG_IOB_NCHAINS=8
+# CONFIG_NET_ARCH_INCR32 is not set
+# CONFIG_NET_ARCH_CHKSUM is not set
+CONFIG_NET_STATISTICS=y
+
+#
+# Routing Table Configuration
+#
+# CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME=""
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_FS_READABLE is not set
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_NFS is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=2
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+CONFIG_LIBC_NETDB=y
+CONFIG_NETDB_DNSCLIENT=y
+CONFIG_NETDB_DNSCLIENT_ENTRIES=8
+CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
+CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
+CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_DNSSERVER_NOADDR is not set
+CONFIG_NETDB_DNSSERVER_IPv4=y
+CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NETTEST is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_UDP is not set
+# CONFIG_EXAMPLES_UDPBLASTER is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_XMLRPC is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+CONFIG_NETUTILS_DHCPC=y
+# CONFIG_NETUTILS_DHCPD is not set
+CONFIG_NETUTILS_DISCOVER=y
+CONFIG_DISCOVER_STACK_SIZE=1024
+CONFIG_DISCOVER_PRIORITY=50
+CONFIG_DISCOVER_PORT=96
+CONFIG_DISCOVER_INTERFACE="eth0"
+CONFIG_DISCOVER_DEVICE_CLASS=0xff
+CONFIG_DISCOVER_DESCR="NuttX"
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_FTPD is not set
+# CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
+# CONFIG_NETUTILS_SMTP is not set
+CONFIG_NETUTILS_TELNETD=y
+# CONFIG_NETUTILS_TFTPC is not set
+# CONFIG_NETUTILS_WEBCLIENT is not set
+# CONFIG_NETUTILS_WEBSERVER is not set
+# CONFIG_NETUTILS_XMLRPC is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+# CONFIG_NSH_READLINE is not set
+CONFIG_NSH_CLE=y
+CONFIG_NSH_LINELEN=80
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+CONFIG_NSH_DISABLE_IFCONFIG=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+# CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+CONFIG_NSH_DISABLE_PS=y
+# CONFIG_NSH_DISABLE_PING is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CMDOPT_DF_H=y
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_FILEIOSIZE=1024
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ARCHINIT is not set
+
+#
+# Networking Configuration
+#
+CONFIG_NSH_NETINIT=y
+# CONFIG_NSH_NETINIT_THREAD is not set
+
+#
+# IP Address Configuration
+#
+CONFIG_NSH_DHCPC=y
+
+#
+# IPv4 Addresses
+#
+CONFIG_NSH_DRIPADDR=0xc0a80101
+CONFIG_NSH_NETMASK=0xffffff00
+# CONFIG_NSH_DNS is not set
+CONFIG_NSH_NOMAC=y
+CONFIG_NSH_SWMAC=y
+CONFIG_NSH_MACADDR=0x00e0deadbeef
+CONFIG_NSH_MAX_ROUNDTRIP=20
+
+#
+# Telnet Configuration
+#
+CONFIG_NSH_TELNET=y
+CONFIG_NSH_TELNETD_PORT=23
+CONFIG_NSH_TELNETD_DAEMONPRIO=100
+CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
+CONFIG_NSH_TELNETD_CLIENTPRIO=100
+CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
+CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+# CONFIG_NSH_TELNET_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+CONFIG_SYSTEM_CLE=y
+CONFIG_SYSTEM_CLE_DEBUGLEVEL=0
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_NETDB is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-stm32-e407/netnsh/setenv.sh b/configs/olimex-stm32-e407/netnsh/setenv.sh
new file mode 100755
index 0000000000000000000000000000000000000000..d6f071c221985b5c4f8f6be67d45585802063b4a
--- /dev/null
+++ b/configs/olimex-stm32-e407/netnsh/setenv.sh
@@ -0,0 +1,80 @@
+#!/bin/bash
+# configs/olimex-stm32-e407/netnsh/setenv.sh
+#
+#   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the RIDE
+# toolchain under windows.  You will also have to edit this if you install
+# the RIDE toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# These are the Cygwin paths to the locations where I installed the Atollic
+# toolchain under windows.  You will also have to edit this if you install
+# the Atollic toolchain in any other location.  /usr/bin is added before
+# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
+# at those locations as well.
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH variable
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/olimex-stm32-e407/nsh/Make.defs b/configs/olimex-stm32-e407/nsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..3a0c05310714dfed8058040a7971a200fcf1927c
--- /dev/null
+++ b/configs/olimex-stm32-e407/nsh/Make.defs
@@ -0,0 +1,112 @@
+############################################################################
+# configs/olimex-stm32-e407/nsh/Make.defs
+#
+#   Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
diff --git a/configs/olimex-stm32-e407/nsh/defconfig b/configs/olimex-stm32-e407/nsh/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..76c50603c3a2e995d77f4840e8ad4779b8c2eabd
--- /dev/null
+++ b/configs/olimex-stm32-e407/nsh/defconfig
@@ -0,0 +1,1176 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+# CONFIG_ARCH_CHIP_STM32F103C8 is not set
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+CONFIG_ARCH_CHIP_STM32F407ZG=y
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+# CONFIG_STM32_STM32F10XX is not set
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+# CONFIG_STM32_PERFORMANCELINE is not set
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+# CONFIG_STM32_MEDIUMDENSITY is not set
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+CONFIG_STM32_STM32F40XX=y
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+CONFIG_STM32_STM32F407=y
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+CONFIG_STM32_HAVE_CCM=y
+# CONFIG_STM32_HAVE_USBDEV is not set
+CONFIG_STM32_HAVE_OTGFS=y
+CONFIG_STM32_HAVE_FSMC=y
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+CONFIG_STM32_HAVE_USART6=y
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+CONFIG_STM32_HAVE_TIM2=y
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+CONFIG_STM32_HAVE_TIM9=y
+CONFIG_STM32_HAVE_TIM10=y
+CONFIG_STM32_HAVE_TIM11=y
+CONFIG_STM32_HAVE_TIM12=y
+CONFIG_STM32_HAVE_TIM13=y
+CONFIG_STM32_HAVE_TIM14=y
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+CONFIG_STM32_HAVE_CAN2=y
+CONFIG_STM32_HAVE_DAC1=y
+CONFIG_STM32_HAVE_DAC2=y
+CONFIG_STM32_HAVE_RNG=y
+CONFIG_STM32_HAVE_ETHMAC=y
+CONFIG_STM32_HAVE_I2C2=y
+CONFIG_STM32_HAVE_I2C3=y
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKPSRAM is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CAN2 is not set
+# CONFIG_STM32_CCMDATARAM is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_CRYP is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_DAC1 is not set
+# CONFIG_STM32_DAC2 is not set
+# CONFIG_STM32_DCMI is not set
+# CONFIG_STM32_ETHMAC is not set
+# CONFIG_STM32_FSMC is not set
+# CONFIG_STM32_HASH is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_I2C3 is not set
+# CONFIG_STM32_OTGFS is not set
+# CONFIG_STM32_OTGHS is not set
+CONFIG_STM32_PWR=y
+# CONFIG_STM32_RNG is not set
+# CONFIG_STM32_SDIO is not set
+# CONFIG_STM32_SPI1 is not set
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SYSCFG=y
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+# CONFIG_STM32_TIM9 is not set
+# CONFIG_STM32_TIM10 is not set
+# CONFIG_STM32_TIM11 is not set
+# CONFIG_STM32_TIM12 is not set
+# CONFIG_STM32_TIM13 is not set
+# CONFIG_STM32_TIM14 is not set
+# CONFIG_STM32_USART1 is not set
+CONFIG_STM32_USART2=y
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USART6 is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_FLASH_PREFETCH is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+# CONFIG_STM32_JTAG_FULL_ENABLE is not set
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+CONFIG_STM32_JTAG_SW_ENABLE=y
+# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM2_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+# CONFIG_STM32_TIM9_CAP is not set
+# CONFIG_STM32_TIM10_CAP is not set
+# CONFIG_STM32_TIM11_CAP is not set
+# CONFIG_STM32_TIM12_CAP is not set
+# CONFIG_STM32_TIM13_CAP is not set
+# CONFIG_STM32_TIM14_CAP is not set
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
+# CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+# CONFIG_STM32_HAVE_RTC_COUNTER is not set
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=16717
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=114688
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_OLIMEX_STM32H407 is not set
+CONFIG_ARCH_BOARD_OLIMEX_STM32E407=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="olimex-stm32-e407"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+# CONFIG_ARCH_IRQBUTTONS is not set
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+# CONFIG_LIB_BOARDCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=12
+CONFIG_START_DAY=6
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=16
+CONFIG_WDOG_INTRESERVE=4
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=31
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+CONFIG_DISABLE_POLL=y
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART2_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART2 Configuration
+#
+CONFIG_USART2_RXBUFSIZE=128
+CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART2_BAUD=115200
+CONFIG_USART2_BITS=8
+CONFIG_USART2_PARITY=0
+CONFIG_USART2_2STOP=0
+# CONFIG_USART2_IFLOWCONTROL is not set
+# CONFIG_USART2_OFLOWCONTROL is not set
+# CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+CONFIG_FS_READABLE=y
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=2
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+CONFIG_EXAMPLES_HELLO=y
+CONFIG_EXAMPLES_HELLO_PRIORITY=100
+CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
+CONFIG_EXAMPLES_HELLOXX=y
+CONFIG_EXAMPLES_HELLOXX_CXXINITIALIZE=y
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_IFUPDOWN is not set
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+# CONFIG_NSH_CMDOPT_DF_H is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+# CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-stm32-e407/nsh/setenv.sh b/configs/olimex-stm32-e407/nsh/setenv.sh
new file mode 100755
index 0000000000000000000000000000000000000000..ded7c15537f64b686d934eb7550a1917dbb8f2f5
--- /dev/null
+++ b/configs/olimex-stm32-e407/nsh/setenv.sh
@@ -0,0 +1,80 @@
+#!/bin/bash
+# configs/olimex-stm32-e407/nsh/setenv.sh
+#
+#   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the RIDE
+# toolchain under windows.  You will also have to edit this if you install
+# the RIDE toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# These are the Cygwin paths to the locations where I installed the Atollic
+# toolchain under windows.  You will also have to edit this if you install
+# the Atollic toolchain in any other location.  /usr/bin is added before
+# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
+# at those locations as well.
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH variable
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/olimex-stm32-e407/scripts/ld.script b/configs/olimex-stm32-e407/scripts/ld.script
new file mode 100644
index 0000000000000000000000000000000000000000..d24be46787cc32750046d80898d089f92b6349fe
--- /dev/null
+++ b/configs/olimex-stm32-e407/scripts/ld.script
@@ -0,0 +1,122 @@
+/****************************************************************************
+ * configs/olimex-stm32-e407/scripts/ld.script
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* The STM32F407ZGT6 has 1024Kb of FLASH beginning at address 0x0800:0000 and
+ * 192Kb of SRAM. SRAM is split up into two blocks:
+ *
+ * 1) 112Kb of SRAM beginning at address 0x2000:0000
+ * 2)  16Kb of SRAM beginning at address 0x2001:c000
+ * 3)  64Kb of SRAM beginning at address 0x2002:0000
+ *
+ * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
+ * where the code expects to begin execution by jumping to the entry point in
+ * the 0x0800:0000 address
+ * range.
+ */
+
+MEMORY
+{
+	flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
+	sram (rwx) : ORIGIN = 0x20000000, LENGTH = 112K
+}
+
+OUTPUT_ARCH(arm)
+ENTRY(_stext)
+SECTIONS
+{
+	.text : {
+		_stext = ABSOLUTE(.);
+		*(.vectors)
+		*(.text .text.*)
+		*(.fixup)
+		*(.gnu.warning)
+		*(.rodata .rodata.*)
+		*(.gnu.linkonce.t.*)
+		*(.glue_7)
+		*(.glue_7t)
+		*(.got)
+		*(.gcc_except_table)
+		*(.gnu.linkonce.r.*)
+		_etext = ABSOLUTE(.);
+	} > flash
+
+	.init_section : {
+		_sinit = ABSOLUTE(.);
+		*(.init_array .init_array.*)
+		_einit = ABSOLUTE(.);
+	} > flash
+
+	.ARM.extab : {
+		*(.ARM.extab*)
+	} > flash
+
+	__exidx_start = ABSOLUTE(.);
+	.ARM.exidx : {
+		*(.ARM.exidx*)
+	} > flash
+	__exidx_end = ABSOLUTE(.);
+
+	_eronly = ABSOLUTE(.);
+
+	.data : {
+		_sdata = ABSOLUTE(.);
+		*(.data .data.*)
+		*(.gnu.linkonce.d.*)
+		CONSTRUCTORS
+		_edata = ABSOLUTE(.);
+	} > sram AT > flash
+
+	.bss : {
+		_sbss = ABSOLUTE(.);
+		*(.bss .bss.*)
+		*(.gnu.linkonce.b.*)
+		*(COMMON)
+		_ebss = ABSOLUTE(.);
+	} > sram
+
+	/* Stabs debugging sections. */
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_info 0 : { *(.debug_info) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/olimex-stm32-e407/src/Makefile b/configs/olimex-stm32-e407/src/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..652e7a5577d66571b8f450b2f8667e1fc55ac634
--- /dev/null
+++ b/configs/olimex-stm32-e407/src/Makefile
@@ -0,0 +1,83 @@
+############################################################################
+# configs/olimex-stm32-e407/src/Makefile
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+ASRCS =
+CSRCS = stm32_boot.c
+
+ifeq ($(CONFIG_ARCH_LEDS),y)
+CSRCS += stm32_autoleds.c
+else
+CSRCS += stm32_userleds.c
+endif
+
+ifeq ($(CONFIG_ARCH_BUTTONS),y)
+CSRCS +=  stm32_buttons.c
+endif
+
+ifeq ($(CONFIG_NSH_LIBRARY),y)
+CSRCS += stm32_appinit.c
+endif
+
+ifeq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
+CSRCS += stm32_idle.c
+endif
+
+ifeq ($(CONFIG_STM32_FSMC),y)
+CSRCS += stm32_extmem.c
+endif
+
+ifeq ($(CONFIG_STM32_OTGFS),y)
+CSRCS += stm32_usb.c
+endif
+
+ifeq ($(CONFIG_STM32_OTGHS),y)
+CSRCS += stm32_usb.c
+endif
+
+ifeq ($(CONFIG_ADC),y)
+CSRCS +=  stm32_adc.c
+endif
+
+ifeq ($(CONFIG_CAN),y)
+CSRCS += stm32_can.c
+endif
+
+ifeq ($(CONFIG_ARCH_FPU),y)
+CSRCS += stm32_ostest.c
+endif
+
+include $(TOPDIR)/configs/Board.mk
diff --git a/configs/olimex-stm32-e407/src/olimex-stm32-e407.h b/configs/olimex-stm32-e407/src/olimex-stm32-e407.h
new file mode 100644
index 0000000000000000000000000000000000000000..e941de636b0e084a9cc9b2aae29574cc16acd76c
--- /dev/null
+++ b/configs/olimex-stm32-e407/src/olimex-stm32-e407.h
@@ -0,0 +1,261 @@
+/****************************************************************************
+ * configs/olimex-stm32-e407/src/olimex-stm32-e407.h
+ *
+ *   Copyright (C) 2014 Max Holtzberg. All rights reserved.
+ *   Author: Max Holtzberg 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __CONFIGS_OLIMEX_STM32_E407_SRC_H
+#define __CONFIGS_OLIMEX_STM32_E407_SRC_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration from stm32f4discovery */
+
+/* Assume that we have everything */
+
+#define HAVE_USBDEV     1
+#define HAVE_USBHOST    1
+#define HAVE_USBMONITOR 1
+#define HAVE_SDIO       1
+#define HAVE_RTC_DRIVER 1
+#define HAVE_ELF        1
+#define HAVE_NETMONITOR 1
+
+/* Can't support USB host or device features if USB OTG FS is not enabled */
+
+#ifndef CONFIG_STM32_OTGFS
+#  undef HAVE_USBDEV
+#  undef HAVE_USBHOST
+#  undef HAVE_USBMONITOR
+#endif
+
+/* Can't support USB device monitor if USB device is not enabled */
+
+#ifndef CONFIG_USBDEV
+#  undef HAVE_USBDEV
+#  undef HAVE_USBMONITOR
+#endif
+
+/* Can't support USB host is USB host is not enabled */
+
+#ifndef CONFIG_USBHOST
+#  undef HAVE_USBHOST
+#endif
+
+/* Check if we should enable the USB monitor before starting NSH */
+
+#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_USBMONITOR)
+#  undef HAVE_USBMONITOR
+#endif
+
+/* ELF */
+
+#if defined(CONFIG_BINFMT_DISABLE) || !defined(CONFIG_ELF)
+#  undef HAVE_ELF
+#endif
+
+/* NSH Network monitor  */
+
+#if !defined(CONFIG_NET) || !defined(CONFIG_STM32_EMACMAC)
+#  undef HAVE_NETMONITOR
+#endif
+
+#if !defined(CONFIG_NSH_NETINIT_THREAD) || !defined(CONFIG_ARCH_PHY_INTERRUPT) || \
+    !defined(CONFIG_NETDEV_PHY_IOCTL) || !defined(CONFIG_NET_UDP) || \
+     defined(CONFIG_DISABLE_SIGNALS)
+#  undef HAVE_NETMONITOR
+#endif
+
+/* procfs File System */
+
+#ifdef CONFIG_FS_PROCFS
+#  ifdef CONFIG_NSH_PROC_MOUNTPOINT
+#    define STM32_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT
+#  else
+#    define STM32_PROCFS_MOUNTPOINT "/proc"
+#  endif
+#endif
+
+/* Olimex-STM32-E407 GPIOs ****************************************************/
+/* LEDs */
+
+#define GPIO_LED_STATUS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
+                         GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN13)
+
+/* BUTTONS -- NOTE that all have EXTI interrupts configured */
+
+#define MIN_IRQBUTTON   BUTTON_BUT
+#define MAX_IRQBUTTON   BUTTON_BUT
+#define NUM_IRQBUTTONS  1
+
+#define GPIO_BTN_BUT   (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN0)
+
+/* USB OTG FS - USB-A connector
+ *
+ * PC4  OTG_FS_VBUS VBUS sensing
+ * PB0  OTG_FS_PowerSwitchOn
+ * PB1  OTG_FS_Overcurrent
+ */
+
+#define GPIO_OTGFS_VBUS   (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
+                           GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN9)
+#define GPIO_OTGFS_PWRON  (GPIO_OUTPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
+                           GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN0)
+
+#ifdef CONFIG_USBHOST
+#  define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_EXTI|GPIO_FLOAT|\
+                           GPIO_SPEED_100MHz|GPIO_PUSHPULL|\
+                           GPIO_PORTB|GPIO_PIN1)
+
+#else
+#  define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
+                           GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN1)
+#endif
+
+/* USB OTG HS - miniUSB connector
+ *
+ * PB13  OTG_HS_VBUS VBUS sensing (also connected to the green LED)
+ * PA8  OTG_HS_PowerSwitchOn
+ * PF11  OTG_HS_Overcurrent
+ */
+
+#define GPIO_OTGHS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN13)
+#define GPIO_OTGHS_PWRON (GPIO_OUTPUT|GPIO_OUTPUT_SET|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8)
+
+#ifdef CONFIG_USBHOST
+#  define GPIO_OTGHS_OVER  (GPIO_INPUT|GPIO_EXTI|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN11)
+
+#else
+#  define GPIO_OTGHS_OVER  (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN11)
+#endif
+
+/* LAN8710 works with LAN8720 driver
+ *
+ * ---------- ------------- ------------
+ * PIO        SIGNAL        Comments
+ * ---------- ------------- ------------
+ * PG11       TXEN
+ * PG13       TXD0
+ * PG14       TXD1
+ * PC4        RXD0/MODE0
+ * PC5        RXD1/MODE1
+ * PA7        CRS_DIV/MODE2
+ * PA2        MDIO
+ * PC1        MDC
+ * PA3        NINT/REFCLK0
+ * PG6        NRST
+ * ---------- ------------- ------------
+ */
+
+#if defined(CONFIG_STM32_ETHMAC)
+#  define GPIO_EMAC_NINT  (GPIO_INPUT|GPIO_PULLUP|GPIO_EXTI|    \
+                         GPIO_PORTA|GPIO_PIN3)
+#  define GPIO_EMAC_NRST  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|    \
+                         GPIO_OUTPUT_SET|GPIO_PORTG|GPIO_PIN6)
+#endif
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_usbinitialize
+ *
+ * Description:
+ *   Called from stm32_usbinitialize very early in initialization to setup
+ *   USB-related GPIO pins for the Olimex-STM32-H405 board.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32_OTGHS)
+void weak_function stm32_usbinitialize(void);
+#endif
+
+/************************************************************************************
+ * Name: stm32_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ADC
+int stm32_adc_setup(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_sdio_initialize
+ *
+ * Description:
+ *   Initialize SDIO-based MMC/SD card support
+ *
+ ****************************************************************************/
+
+#if !defined(CONFIG_DISABLE_MOUNTPOINT) && defined(CONFIG_STM32_SDIO)
+int stm32_sdio_initialize(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_can_setup
+ *
+ * Description:
+ *  Initialize CAN and register the CAN device
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CAN
+int stm32_can_setup(void);
+#endif
+
+#endif  /* __ASSEMBLY__ */
+#endif /* __CONFIGS_OLIMEX_STM32_E407_SRC_INTERNAL_H */
diff --git a/configs/olimex-stm32-e407/src/stm32_adc.c b/configs/olimex-stm32-e407/src/stm32_adc.c
new file mode 100644
index 0000000000000000000000000000000000000000..c8b9682a12d9486c3d93ef324640c87f15b56751
--- /dev/null
+++ b/configs/olimex-stm32-e407/src/stm32_adc.c
@@ -0,0 +1,173 @@
+/************************************************************************************
+ * configs/olimex-stm32-e407/src/stm32_adc.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "chip.h"
+#include "stm32_adc.h"
+#include "olimex-stm32-e407.h"
+
+#ifdef CONFIG_ADC
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Configuration ********************************************************************/
+/* Up to 3 ADC interfaces are supported */
+
+#if STM32_NADC < 3
+#  undef CONFIG_STM32_ADC3
+#endif
+
+#if STM32_NADC < 2
+#  undef CONFIG_STM32_ADC2
+#endif
+
+#if STM32_NADC < 1
+#  undef CONFIG_STM32_ADC1
+#endif
+
+#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || defined(CONFIG_STM32_ADC3)
+#ifndef CONFIG_STM32_ADC1
+#  warning "Channel information only available for ADC1"
+#endif
+
+/* The number of ADC channels in the conversion list */
+
+#define ADC1_NCHANNELS 1//14
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+/* The Olimex STM32-P405 has a 10 Kohm potentiometer AN_TR connected to PC0
+ * ADC123_IN10
+ */
+
+/* Identifying number of each ADC channel: Variable Resistor.
+ *
+ * {1,  2,  3, 4,  5,  6, 7,  8,  9, 10, 11, 12, 13, 15};
+ */
+
+#ifdef CONFIG_STM32_ADC1
+static const uint8_t  g_chanlist[ADC1_NCHANNELS] = {1};
+
+/* Configurations of pins used byte each ADC channels
+ *
+ * {GPIO_ADC1_IN1,  GPIO_ADC1_IN2,  GPIO_ADC1_IN3, GPIO_ADC1_IN4,  GPIO_ADC1_IN5, 
+ *  GPIO_ADC1_IN6,  GPIO_ADC1_IN7,  GPIO_ADC1_IN8,  GPIO_ADC1_IN9, GPIO_ADC1_IN10,
+ *  GPIO_ADC1_IN11, GPIO_ADC1_IN12, GPIO_ADC1_IN13, GPIO_ADC1_IN15};
+ */
+
+static const uint32_t g_pinlist[ADC1_NCHANNELS]  = {GPIO_ADC1_IN1};
+#endif
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+int stm32_adc_setup(void)
+{
+#ifdef CONFIG_STM32_ADC1
+  static bool initialized = false;
+  struct adc_dev_s *adc;
+  int ret;
+  int i;
+
+  /* Check if we have already initialized */
+
+  if (!initialized)
+    {
+      /* Configure the pins as analog inputs for the selected channels */
+
+      for (i = 0; i < ADC1_NCHANNELS; i++)
+        {
+          stm32_configgpio(g_pinlist[i]);
+        }
+
+      /* Call stm32_adcinitialize() to get an instance of the ADC interface */
+
+      adc = stm32_adcinitialize(1, g_chanlist, ADC1_NCHANNELS);
+      if (adc == NULL)
+        {
+          adbg("ERROR: Failed to get ADC interface\n");
+          return -ENODEV;
+        }
+
+      /* Register the ADC driver at "/dev/adc0" */
+
+      ret = adc_register("/dev/adc0", adc);
+      if (ret < 0)
+        {
+          adbg("adc_register failed: %d\n", ret);
+          return ret;
+        }
+
+      /* Now we are initialized */
+
+      initialized = true;
+    }
+
+  return OK;
+#else
+  return -ENOSYS;
+#endif
+}
+
+#endif /* CONFIG_STM32_ADC1 || CONFIG_STM32_ADC2 || CONFIG_STM32_ADC3 */
+#endif /* CONFIG_ADC */
diff --git a/configs/olimex-stm32-e407/src/stm32_appinit.c b/configs/olimex-stm32-e407/src/stm32_appinit.c
new file mode 100644
index 0000000000000000000000000000000000000000..672d6a7561e305e9c1e38d7d03f71ebfcb17465f
--- /dev/null
+++ b/configs/olimex-stm32-e407/src/stm32_appinit.c
@@ -0,0 +1,234 @@
+/****************************************************************************
+ * config/olimex-stm32-e407/src/stm32_appinit.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#ifdef CONFIG_USBMONITOR
+#  include 
+#endif
+
+#ifdef CONFIG_STM32_OTGFS
+#  include "stm32_usbhost.h"
+#endif
+
+#include "stm32.h"
+#include "olimex-stm32-e407.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+#define HAVE_USBDEV     1
+#define HAVE_USBHOST    1
+#define HAVE_USBMONITOR 1
+/* #define HAVE_I2CTOOL    1 */
+
+/* Can't support USB host or device features if USB OTG HS is not enabled */
+
+#ifndef CONFIG_STM32_OTGHS
+#  undef HAVE_USBDEV
+#  undef HAVE_USBHOST
+#  undef HAVE_USBMONITOR
+#endif
+
+/* Can't support USB device monitor if USB device is not enabled */
+
+#ifndef CONFIG_USBDEV
+#  undef HAVE_USBDEV
+#  undef HAVE_USBMONITOR
+#endif
+
+/* Can't support USB host is USB host is not enabled */
+
+#ifndef CONFIG_USBHOST
+#  undef HAVE_USBHOST
+#endif
+
+/* Check if we should enable the USB monitor before starting NSH */
+
+#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_USBMONITOR)
+#  undef HAVE_USBMONITOR
+#endif
+
+#if !defined(CONFIG_STM32_CAN1) && !defined(CONFIG_STM32_CAN2)
+#  undef CONFIG_CAN
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_i2c_register
+ *
+ * Description:
+ *   Register one I2C drivers for the I2C tool.
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_I2CTOOL
+static void stm32_i2c_register(int bus)
+{
+  FAR struct i2c_master_s *i2c;
+  int ret;
+
+  i2c = stm32_i2cbus_initialize(bus);
+  if (i2c == NULL)
+    {
+      _err("ERROR: Failed to get I2C%d interface\n", bus);
+    }
+  else
+    {
+      ret = i2c_register(i2c, bus);
+      if (ret < 0)
+        {
+          _err("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
+          stm32_i2cbus_uninitialize(i2c);
+        }
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_i2ctool
+ *
+ * Description:
+ *   Register I2C drivers for the I2C tool.
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_I2CTOOL
+static void stm32_i2ctool(void)
+{
+#ifdef CONFIG_STM32_I2C1
+  stm32_i2c_register(1);
+#endif
+#ifdef CONFIG_STM32_I2C2
+  stm32_i2c_register(2);
+#endif
+#ifdef CONFIG_STM32_I2C3
+  stm32_i2c_register(3);
+#endif
+}
+#else
+#  define stm32_i2ctool()
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ *   Perform architecture specific initialization
+ *
+ *   CONFIG_LIB_BOARDCTL=y :
+ *     Called from the NSH library
+ *
+ *   CONFIG_BOARD_INITIALIZE=y, CONFIG_NSH_LIBRARY=y, &&
+ *   CONFIG_LIB_BOARDCTL=n :
+ *     Called from board_initialize().
+ *
+ ****************************************************************************/
+
+int board_app_initialize(uintptr_t arg)
+{
+  int ret;
+
+  /* Register I2C drivers on behalf of the I2C tool */
+
+  stm32_i2ctool();
+
+#ifdef CONFIG_CAN
+  /* Initialize CAN and register the CAN driver. */
+
+  ret = stm32_can_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_can_setup failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_ADC
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = stm32_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_adc_setup failed: %d\n", ret);
+    }
+#endif
+
+#ifdef HAVE_USBHOST
+  /* Initialize USB host operation.  stm32_usbhost_initialize() starts a thread
+   * will monitor for USB connection and disconnection events.
+   */
+
+  ret = stm32_usbhost_initialize();
+  if (ret != OK)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to initialize USB host: %d\n", ret);
+      return ret;
+    }
+#endif
+
+#ifdef HAVE_USBMONITOR
+  /* Start the USB Monitor */
+
+  ret = usbmonitor_start();
+  if (ret != OK)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to start USB monitor: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
+  return OK;
+}
diff --git a/libc/stdio/lib_lowinstream.c b/configs/olimex-stm32-e407/src/stm32_autoleds.c
similarity index 71%
rename from libc/stdio/lib_lowinstream.c
rename to configs/olimex-stm32-e407/src/stm32_autoleds.c
index ad3231784d5cb82e6fb42c858cccf5fef3d21a2c..0b46a0e677ced2555ddbadcbb202b290d20c3ccd 100644
--- a/libc/stdio/lib_lowinstream.c
+++ b/configs/olimex-stm32-e407/src/stm32_autoleds.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * libc/stdio/lib_lowinstream.c
+ * configs/olimex-stm32-e407/src/stm32_autoleds.c
  *
- *   Copyright (C) 2007-2009, 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,64 +39,68 @@
 
 #include 
 
-#include 
-#include 
-#include 
+#include 
+#include 
+#include 
 
-#include 
+#include 
+#include 
 
-#include "libc.h"
+#include "chip.h"
+#include "up_arch.h"
+#include "up_internal.h"
+#include "stm32.h"
+#include "olimex-stm32-e407.h"
 
-#ifdef CONFIG_ARCH_LOWGETC
+#ifdef CONFIG_ARCH_LEDS
 
 /****************************************************************************
- * Private Functions
+ * Public Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: lowinstream_getc
+ * Name: board_autoled_initialize
  ****************************************************************************/
 
-static int lowinstream_getc(FAR struct lib_instream_s *this)
+void board_autoled_initialize(void)
 {
-  int ret;
+   /* Configure LED_STATUS GPIO for output */
 
-  DEBUGASSERT(this);
+   stm32_configgpio(GPIO_LED_STATUS);
+}
 
-  /* Get the next character from the incoming stream */
+/****************************************************************************
+ * Name: board_autoled_on
+ ****************************************************************************/
 
-  ret = up_getc(ch);
-  if (ret != EOF)
+void board_autoled_on(int led)
+{
+  if (led == LED_STARTED)
     {
-      this->nget++;
+      stm32_gpiowrite(GPIO_LED_STATUS, true);
     }
 
-  return ret;
+  if (led == LED_ASSERTION || led == LED_PANIC)
+    {
+      stm32_gpiowrite(GPIO_LED_STATUS, false);
+    }
 }
 
 /****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: lib_lowinstream
- *
- * Description:
- *   Initializes a stream for use with low-level, architecture-specific I/O.
- *
- * Input parameters:
- *   stream - User allocated, uninitialized instance of struct
- *           lib_lowinstream_s to be initialized.
- *
- * Returned Value:
- *   None (User allocated instance initialized).
- *
+ * Name: board_autoled_off
  ****************************************************************************/
 
-void lib_lowinstream(FAR struct lib_instream_s *stream)
+void board_autoled_off(int led)
 {
-  stream->get  = lowinstream_getc;
-  stream->nget = 0;
+  if (led == LED_STARTED)
+    {
+      stm32_gpiowrite(GPIO_LED_STATUS, false);
+    }
+
+  if (led == LED_ASSERTION || led == LED_PANIC)
+    {
+      stm32_gpiowrite(GPIO_LED_STATUS, true);
+    }
 }
 
-#endif /* CONFIG_ARCH_LOWGETC */
+#endif /* CONFIG_ARCH_LEDS */
diff --git a/configs/olimex-stm32-e407/src/stm32_boot.c b/configs/olimex-stm32-e407/src/stm32_boot.c
new file mode 100644
index 0000000000000000000000000000000000000000..cad3479aa1af53b905f720dd346530c962e364bf
--- /dev/null
+++ b/configs/olimex-stm32-e407/src/stm32_boot.c
@@ -0,0 +1,121 @@
+/************************************************************************************
+ * configs/olimex-stm32-e407/src/stm32_boot.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include "up_arch.h"
+#include "olimex-stm32-e407.h"
+#include "stm32_ccm.h"
+
+#include "stm32.h"
+#include "stm32_i2c.h"
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.  This entry point
+ *   is called early in the intitialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void stm32_boardinitialize(void)
+{
+#if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32_OTGHS)
+  /* Initialize USB if the 1) OTG FS controller is in the configuration and 2)
+   * disabled, and 3) the weak function stm32_usbinitialize() has been brought
+   * into the build. Presumeably either CONFIG_USBDEV is also selected.
+   */
+
+  if (stm32_usbinitialize)
+    {
+      stm32_usbinitialize();
+    }
+#endif
+
+#ifdef CONFIG_ARCH_LEDS
+  /* Configure on-board LEDs if LED support has been selected. */
+
+  board_autoled_initialize();
+#endif
+
+#ifdef CONFIG_ARCH_BUTTONS
+  /* Configure on-board BUTTONs if BUTTON support has been selected. */
+
+  board_button_initialize();
+#endif
+}
+
+/****************************************************************************
+ * Name: board_initialize
+ *
+ * Description:
+ *   If CONFIG_BOARD_INITIALIZE is selected, then an additional
+ *   initialization call will be performed in the boot-up sequence to a
+ *   function called board_initialize().  board_initialize() will be
+ *   called immediately after up_intitialize() is called and just before the
+ *   initial application is started.  This additional initialization phase
+ *   may be used, for example, to initialize board-specific device drivers.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BOARD_INITIALIZE
+void board_initialize(void)
+{
+#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL)
+  /* Perform NSH initialization here instead of from the NSH.  This
+   * alternative NSH initialization is necessary when NSH is ran in user-space
+   * but the initialization function must run in kernel space.
+   */
+
+  board_app_initialize();
+#endif
+}
+#endif
diff --git a/configs/olimex-stm32-e407/src/stm32_buttons.c b/configs/olimex-stm32-e407/src/stm32_buttons.c
new file mode 100644
index 0000000000000000000000000000000000000000..870b1ff8a98d866b8bda3006e02cf4dcaee7ae58
--- /dev/null
+++ b/configs/olimex-stm32-e407/src/stm32_buttons.c
@@ -0,0 +1,151 @@
+/****************************************************************************
+ * configs/olimex-stm32-e407/src/stm32_buttons.c
+ *
+ *   Copyright (C) 2014-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "olimex-stm32-e407.h"
+
+#ifdef CONFIG_ARCH_BUTTONS
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Pin configuration for each Olimex-STM32-H405 button.  This array is
+ * indexed by the BUTTON_* definitions in board.h
+ */
+
+static const uint32_t g_buttons[NUM_BUTTONS] =
+{
+  GPIO_BTN_BUT
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_button_initialize
+ *
+ * Description:
+ *   board_button_initialize() must be called to initialize button resources.
+ *   After that, board_buttons() may be called to collect the current state
+ *   of all buttons or board_button_irq() may be called to register button
+ *   interrupt handlers.
+ *
+ ****************************************************************************/
+
+void board_button_initialize(void)
+{
+  int i;
+
+  /* Configure the GPIO pins as inputs.  NOTE that EXTI interrupts are
+   * configured for all pins.
+   */
+
+  for (i = 0; i < NUM_BUTTONS; i++)
+    {
+      stm32_configgpio(g_buttons[i]);
+    }
+}
+
+/****************************************************************************
+ * Name: board_buttons
+ ****************************************************************************/
+
+uint8_t board_buttons(void)
+{
+  uint8_t ret = 0;
+
+  /* Check that state of each key */
+
+  if (!stm32_gpioread(g_buttons[BUTTON_BUT]))
+    {
+      ret |= BUTTON_BUT_BIT;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Button support.
+ *
+ * Description:
+ *   board_button_initialize() must be called to initialize button resources.
+ *   After that, board_buttons() may be called to collect the current state
+ *   of all buttons or board_button_irq() may be called to register button
+ *   interrupt handlers.
+ *
+ *   After board_button_initialize() has been called, board_buttons() may be
+ *   called to collect the state of all buttons.  board_buttons() returns an
+ *   8-bit bit set with each bit associated with a button.  See the BUTTON_*_BIT
+ *   definitions in board.h for the meaning of each bit.
+ *
+ *   board_button_irq() may be called to register an interrupt handler that
+ *   will be called when a button is depressed or released.  The ID value is
+ *   a button enumeration value that uniquely identifies a button resource.
+ *   See the BUTTON_* definitions in board.h for the meaning of enumeration
+ *   value.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_IRQBUTTONS
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
+{
+  int ret = -EINVAL;
+
+  /* The following should be atomic */
+
+  if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
+    {
+      ret = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler,
+                               arg);
+    }
+
+  return ret;
+}
+#endif
+#endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/olimex-stm32-e407/src/stm32_can.c b/configs/olimex-stm32-e407/src/stm32_can.c
new file mode 100644
index 0000000000000000000000000000000000000000..b5c7bce8bcbd900b6b3164dcb5777904891ed148
--- /dev/null
+++ b/configs/olimex-stm32-e407/src/stm32_can.c
@@ -0,0 +1,112 @@
+/************************************************************************************
+ * configs/olimex-stm32-405/src/stm32_can.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "stm32.h"
+#include "stm32_can.h"
+#include "olimex-stm32-e407.h"
+
+#ifdef CONFIG_CAN
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Configuration ********************************************************************/
+
+#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2)
+#  warning "Both CAN1 and CAN2 are enabled.  Only CAN1 is used."
+#  undef CONFIG_STM32_CAN2
+#endif
+
+#ifdef CONFIG_STM32_CAN1
+#  define CAN_PORT 1
+#else
+#  define CAN_PORT 2
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_can_setup
+ *
+ * Description:
+ *  Initialize CAN and register the CAN device
+ *
+ ****************************************************************************/
+
+int stm32_can_setup(void)
+{
+#if defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)
+  struct can_dev_s *can;
+  int ret;
+
+  /* Call stm32_caninitialize() to get an instance of the CAN interface */
+
+  can = stm32_caninitialize(CAN_PORT);
+  if (can == NULL)
+    {
+      candbg("ERROR:  Failed to get CAN interface\n");
+      return -ENODEV;
+    }
+
+  /* Register the CAN driver at "/dev/can0" */
+
+  ret = can_register("/dev/can0", can);
+  if (ret < 0)
+    {
+      candbg("ERROR: can_register failed: %d\n", ret);
+      return ret;
+    }
+
+  return OK;
+#else
+  return -ENODEV;
+#endif
+}
+
+#endif /* CONFIG_CAN */
diff --git a/configs/olimex-stm32-e407/src/stm32_usb.c b/configs/olimex-stm32-e407/src/stm32_usb.c
new file mode 100644
index 0000000000000000000000000000000000000000..f59dc54486b2f559993a50f3f71cbdac83a0c7a6
--- /dev/null
+++ b/configs/olimex-stm32-e407/src/stm32_usb.c
@@ -0,0 +1,338 @@
+/************************************************************************************
+ * configs/stm32f4discovery/src/stm32_usb.c
+ *
+ *   Copyright (C) 2012-2013, 2015-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "up_arch.h"
+#include "stm32.h"
+#include "stm32_otgfs.h"
+#include "olimex-stm32-e407.h"
+
+#ifdef CONFIG_STM32_OTGFS
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST)
+#  define HAVE_USB 1
+#else
+#  warning "CONFIG_STM32_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST"
+#  undef HAVE_USB
+#endif
+
+#ifndef CONFIG_STM32F4DISCO_USBHOST_PRIO
+#  define CONFIG_STM32F4DISCO_USBHOST_PRIO 100
+#endif
+
+#ifndef CONFIG_STM32F4DISCO_USBHOST_STACKSIZE
+#  define CONFIG_STM32F4DISCO_USBHOST_STACKSIZE 1024
+#endif
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+#ifdef CONFIG_USBHOST
+static struct usbhost_connection_s *g_usbconn;
+#endif
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: usbhost_waiter
+ *
+ * Description:
+ *   Wait for USB devices to be connected.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_USBHOST
+static int usbhost_waiter(int argc, char *argv[])
+{
+  struct usbhost_hubport_s *hport;
+
+  uinfo("Running\n");
+  for (;;)
+    {
+      /* Wait for the device to change state */
+
+      DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
+      uinfo("%s\n", hport->connected ? "connected" : "disconnected");
+
+      /* Did we just become connected? */
+
+      if (hport->connected)
+        {
+          /* Yes.. enumerate the newly connected device */
+
+          (void)CONN_ENUMERATE(g_usbconn, hport);
+        }
+    }
+
+  /* Keep the compiler from complaining */
+
+  return 0;
+}
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_usbinitialize
+ *
+ * Description:
+ *   Called from stm32_usbinitialize very early in inialization to setup USB-related
+ *   GPIO pins for the STM32F4Discovery board.
+ *
+ ************************************************************************************/
+
+void stm32_usbinitialize(void)
+{
+  /* The OTG FS has an internal soft pull-up.  No GPIO configuration is required */
+
+  /* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
+
+#ifdef CONFIG_STM32_OTGFS
+  stm32_configgpio(GPIO_OTGFS_VBUS);
+  stm32_configgpio(GPIO_OTGFS_PWRON);
+  stm32_configgpio(GPIO_OTGFS_OVER);
+#endif
+}
+
+/***********************************************************************************
+ * Name: stm32_usbhost_initialize
+ *
+ * Description:
+ *   Called at application startup time to initialize the USB host functionality.
+ *   This function will start a thread that will monitor for device
+ *nnnn   connection/disconnection events.
+ *
+ ***********************************************************************************/
+
+#ifdef CONFIG_USBHOST
+int stm32_usbhost_initialize(void)
+{
+  int pid;
+#if defined(CONFIG_USBHOST_HUB)    || defined(CONFIG_USBHOST_MSC) || \
+    defined(CONFIG_USBHOST_HIDKBD) || defined(CONFIG_USBHOST_HIDMOUSE)
+  int ret;
+#endif
+
+  /* First, register all of the class drivers needed to support the drivers
+   * that we care about:
+   */
+
+  uvdbg("Register class drivers\n");
+
+#ifdef CONFIG_USBHOST_HUB
+  /* Initialize USB hub class support */
+
+  ret = usbhost_hub_initialize();
+  if (ret < 0)
+    {
+      uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_MSC
+  /* Register the USB mass storage class class */
+
+  ret = usbhost_msc_initialize();
+  if (ret != OK)
+    {
+      uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_CDCACM
+  /* Register the CDC/ACM serial class */
+
+  ret = usbhost_cdcacm_initialize();
+  if (ret != OK)
+    {
+      uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_HIDKBD
+  /* Initialize the HID keyboard class */
+
+  ret = usbhost_kbdinit();
+  if (ret != OK)
+    {
+      uerr("Failed to register the HID keyboard class\n");
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_HIDMOUSE
+  /* Initialize the HID mouse class */
+
+  ret = usbhost_mouse_init();
+  if (ret != OK)
+    {
+      uerr("Failed to register the HID mouse class\n");
+    }
+#endif
+
+  /* Then get an instance of the USB host interface */
+
+  uinfo("Initialize USB host\n");
+  g_usbconn = stm32_otgfshost_initialize(0);
+  if (g_usbconn)
+    {
+      /* Start a thread to handle device connection. */
+
+      uinfo("Start usbhost_waiter\n");
+
+      pid = task_create("usbhost", CONFIG_STM32F4DISCO_USBHOST_PRIO,
+                        CONFIG_STM32F4DISCO_USBHOST_STACKSIZE,
+                        (main_t)usbhost_waiter, (FAR char * const *)NULL);
+      return pid < 0 ? -ENOEXEC : OK;
+    }
+
+  return -ENODEV;
+}
+#endif
+
+/***********************************************************************************
+ * Name: stm32_usbhost_vbusdrive
+ *
+ * Description:
+ *   Enable/disable driving of VBUS 5V output.  This function must be provided be
+ *   each platform that implements the STM32 OTG FS host interface
+ *
+ *   "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
+ *    or, if 5 V are available on the application board, a basic power switch, must
+ *    be added externally to drive the 5 V VBUS line. The external charge pump can
+ *    be driven by any GPIO output. When the application decides to power on VBUS
+ *    using the chosen GPIO, it must also set the port power bit in the host port
+ *    control and status register (PPWR bit in OTG_FS_HPRT).
+ *
+ *   "The application uses this field to control power to this port, and the core
+ *    clears this bit on an overcurrent condition."
+ *
+ * Input Parameters:
+ *   iface - For future growth to handle multiple USB host interface.  Should be zero.
+ *   enable - true: enable VBUS power; false: disable VBUS power
+ *
+ * Returned Value:
+ *   None
+ *
+ ***********************************************************************************/
+
+#ifdef CONFIG_USBHOST
+void stm32_usbhost_vbusdrive(int iface, bool enable)
+{
+  DEBUGASSERT(iface == 0);
+
+  if (enable)
+    {
+      /* Enable the Power Switch by driving the enable pin low */
+
+      stm32_gpiowrite(GPIO_OTGFS_PWRON, false);
+    }
+  else
+    {
+      /* Disable the Power Switch by driving the enable pin high */
+
+      stm32_gpiowrite(GPIO_OTGFS_PWRON, true);
+    }
+}
+#endif
+
+/************************************************************************************
+ * Name: stm32_setup_overcurrent
+ *
+ * Description:
+ *   Setup to receive an interrupt-level callback if an overcurrent condition is
+ *   detected.
+ *
+ * Input Parameter:
+ *   handler - New overcurrent interrupt handler
+ *   arg     - The argument provided for the interrupt handler
+ *
+ * Returned value:
+ *   Zero (OK) is returned on success.  Otherwise, a negated errno value is returned
+ *   to indicate the nature of the failure.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_USBHOST
+int stm32_setup_overcurrent(xcpt_t handler, void *arg)
+{
+  return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler, arg);
+}
+#endif
+
+/************************************************************************************
+ * Name:  stm32_usbsuspend
+ *
+ * Description:
+ *   Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is
+ *   used.  This function is called whenever the USB enters or leaves suspend mode.
+ *   This is an opportunity for the board logic to shutdown clocks, power, etc.
+ *   while the USB is suspended.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_USBDEV
+void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
+{
+  uinfo("resume: %d\n", resume);
+}
+#endif
+
+#endif /* CONFIG_STM32_OTGFS */
diff --git a/configs/olimex-stm32-e407/src/stm32_userleds.c b/configs/olimex-stm32-e407/src/stm32_userleds.c
new file mode 100644
index 0000000000000000000000000000000000000000..f927f73862eba6991888d4ad61544b402ab43de5
--- /dev/null
+++ b/configs/olimex-stm32-e407/src/stm32_userleds.c
@@ -0,0 +1,106 @@
+/****************************************************************************
+ * configs/olimex-stm32-e407/src/stm32_leds.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "chip.h"
+#include "up_arch.h"
+#include "up_internal.h"
+#include "stm32.h"
+#include "olimex-stm32-e407.h"
+
+#ifndef CONFIG_ARCH_LEDS
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+/* This array maps an LED number to GPIO pin configuration */
+
+static uint32_t g_ledcfg[BOARD_NLEDS] =
+{
+  GPIO_LED_STATUS
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_userled_initialize
+ ****************************************************************************/
+
+void board_userled_initialize(void)
+{
+   /* Configure LED1-4 GPIOs for output */
+
+   stm32_configgpio(GPIO_LED_STATUS);
+}
+
+/****************************************************************************
+ * Name: board_userled
+ ****************************************************************************/
+
+void board_userled(int led, bool ledon)
+{
+  if ((unsigned)led < BOARD_NLEDS)
+    {
+      stm32_gpiowrite(g_ledcfg[led], ledon);
+    }
+}
+
+/****************************************************************************
+ * Name: board_userled_all
+ ****************************************************************************/
+
+void board_userled_all(uint8_t ledset)
+{
+  stm32_gpiowrite(GPIO_LED_STATUS, (ledset & BOARD_LED1_BIT) != 0);
+}
+
+#endif /* !CONFIG_ARCH_LEDS */
diff --git a/configs/olimex-stm32-e407/telnetd/Make.defs b/configs/olimex-stm32-e407/telnetd/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..efcd1c954b104137135721a4214999a9a08533a5
--- /dev/null
+++ b/configs/olimex-stm32-e407/telnetd/Make.defs
@@ -0,0 +1,112 @@
+############################################################################
+# configs/olimex-stm32-e407/telnetd/Make.defs
+#
+#   Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
diff --git a/configs/olimex-stm32-e407/telnetd/defconfig b/configs/olimex-stm32-e407/telnetd/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..70592bfffb3a42d7cda7a6e5d112590848778a21
--- /dev/null
+++ b/configs/olimex-stm32-e407/telnetd/defconfig
@@ -0,0 +1,1309 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
+# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+# CONFIG_ARCH_CHIP_STM32F103C8 is not set
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+CONFIG_ARCH_CHIP_STM32F407ZG=y
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+# CONFIG_STM32_STM32F10XX is not set
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+# CONFIG_STM32_PERFORMANCELINE is not set
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+# CONFIG_STM32_MEDIUMDENSITY is not set
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+CONFIG_STM32_STM32F40XX=y
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+CONFIG_STM32_STM32F407=y
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+CONFIG_STM32_HAVE_CCM=y
+# CONFIG_STM32_HAVE_USBDEV is not set
+CONFIG_STM32_HAVE_OTGFS=y
+CONFIG_STM32_HAVE_FSMC=y
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+CONFIG_STM32_HAVE_USART6=y
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+CONFIG_STM32_HAVE_TIM2=y
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+CONFIG_STM32_HAVE_TIM9=y
+CONFIG_STM32_HAVE_TIM10=y
+CONFIG_STM32_HAVE_TIM11=y
+CONFIG_STM32_HAVE_TIM12=y
+CONFIG_STM32_HAVE_TIM13=y
+CONFIG_STM32_HAVE_TIM14=y
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+CONFIG_STM32_HAVE_CAN2=y
+CONFIG_STM32_HAVE_DAC1=y
+CONFIG_STM32_HAVE_DAC2=y
+CONFIG_STM32_HAVE_RNG=y
+CONFIG_STM32_HAVE_ETHMAC=y
+CONFIG_STM32_HAVE_I2C2=y
+CONFIG_STM32_HAVE_I2C3=y
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKPSRAM is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CAN2 is not set
+# CONFIG_STM32_CCMDATARAM is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_CRYP is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_DAC1 is not set
+# CONFIG_STM32_DAC2 is not set
+# CONFIG_STM32_DCMI is not set
+CONFIG_STM32_ETHMAC=y
+# CONFIG_STM32_FSMC is not set
+# CONFIG_STM32_HASH is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_I2C3 is not set
+# CONFIG_STM32_OTGFS is not set
+# CONFIG_STM32_OTGHS is not set
+CONFIG_STM32_PWR=y
+# CONFIG_STM32_RNG is not set
+# CONFIG_STM32_SDIO is not set
+# CONFIG_STM32_SPI1 is not set
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SYSCFG=y
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+# CONFIG_STM32_TIM9 is not set
+# CONFIG_STM32_TIM10 is not set
+# CONFIG_STM32_TIM11 is not set
+# CONFIG_STM32_TIM12 is not set
+# CONFIG_STM32_TIM13 is not set
+# CONFIG_STM32_TIM14 is not set
+# CONFIG_STM32_USART1 is not set
+CONFIG_STM32_USART2=y
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USART6 is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_FLASH_PREFETCH is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+CONFIG_STM32_JTAG_FULL_ENABLE=y
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+# CONFIG_STM32_JTAG_SW_ENABLE is not set
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM2_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+# CONFIG_STM32_TIM9_CAP is not set
+# CONFIG_STM32_TIM10_CAP is not set
+# CONFIG_STM32_TIM11_CAP is not set
+# CONFIG_STM32_TIM12_CAP is not set
+# CONFIG_STM32_TIM13_CAP is not set
+# CONFIG_STM32_TIM14_CAP is not set
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
+# CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+# CONFIG_STM32_HAVE_RTC_COUNTER is not set
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# Ethernet MAC configuration
+#
+CONFIG_STM32_PHYADDR=0
+# CONFIG_STM32_PHYINIT is not set
+# CONFIG_STM32_MII is not set
+CONFIG_STM32_AUTONEG=y
+CONFIG_STM32_PHYSR=31
+CONFIG_STM32_PHYSR_ALTCONFIG=y
+CONFIG_STM32_PHYSR_ALTMODE=0x001c
+CONFIG_STM32_PHYSR_10HD=0x0004
+CONFIG_STM32_PHYSR_100HD=0x0008
+CONFIG_STM32_PHYSR_10FD=0x0014
+CONFIG_STM32_PHYSR_100FD=0x0018
+# CONFIG_STM32_ETH_PTP is not set
+CONFIG_STM32_RMII=y
+# CONFIG_STM32_RMII_MCO1 is not set
+# CONFIG_STM32_RMII_MCO2 is not set
+CONFIG_STM32_RMII_EXTCLK=y
+CONFIG_STM32_ETHMAC_HPWORK=y
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=16717
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=114688
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_OLIMEX_STM32H407 is not set
+CONFIG_ARCH_BOARD_OLIMEX_STM32E407=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="olimex-stm32-e407"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+# CONFIG_ARCH_IRQBUTTONS is not set
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+# CONFIG_LIB_BOARDCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=12
+CONFIG_START_DAY=6
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=16
+CONFIG_WDOG_INTRESERVE=4
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="telnetd_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=31
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+CONFIG_NETDEVICES=y
+
+#
+# General Ethernet MAC Driver Options
+#
+# CONFIG_NETDEV_LOOPBACK is not set
+CONFIG_NETDEV_TELNET=y
+CONFIG_TELNET_RXBUFFER_SIZE=256
+CONFIG_TELNET_TXBUFFER_SIZE=256
+# CONFIG_NETDEV_MULTINIC is not set
+# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set
+# CONFIG_NETDEV_LATEINIT is not set
+
+#
+# External Ethernet MAC Device Support
+#
+# CONFIG_NET_DM90x0 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ENCX24J600 is not set
+# CONFIG_NET_SLIP is not set
+# CONFIG_NET_FTMAC100 is not set
+
+#
+# External Ethernet PHY Device Support
+#
+# CONFIG_ARCH_PHY_INTERRUPT is not set
+# CONFIG_ETH0_PHY_NONE is not set
+# CONFIG_ETH0_PHY_AM79C874 is not set
+# CONFIG_ETH0_PHY_KS8721 is not set
+# CONFIG_ETH0_PHY_KSZ8041 is not set
+# CONFIG_ETH0_PHY_KSZ8051 is not set
+# CONFIG_ETH0_PHY_KSZ8061 is not set
+# CONFIG_ETH0_PHY_KSZ8081 is not set
+# CONFIG_ETH0_PHY_KSZ90x1 is not set
+# CONFIG_ETH0_PHY_DP83848C is not set
+CONFIG_ETH0_PHY_LAN8720=y
+# CONFIG_ETH0_PHY_LAN8740 is not set
+# CONFIG_ETH0_PHY_LAN8740A is not set
+# CONFIG_ETH0_PHY_LAN8742A is not set
+# CONFIG_ETH0_PHY_DM9161 is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART2_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART2 Configuration
+#
+CONFIG_USART2_RXBUFSIZE=128
+CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART2_BAUD=115200
+CONFIG_USART2_BITS=8
+CONFIG_USART2_PARITY=0
+CONFIG_USART2_2STOP=0
+# CONFIG_USART2_IFLOWCONTROL is not set
+# CONFIG_USART2_OFLOWCONTROL is not set
+# CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+CONFIG_ARCH_HAVE_NET=y
+CONFIG_ARCH_HAVE_PHY=y
+CONFIG_NET=y
+# CONFIG_NET_PROMISCUOUS is not set
+
+#
+# Driver buffer configuration
+#
+CONFIG_NET_ETH_MTU=590
+CONFIG_NET_ETH_TCP_RECVWNDO=536
+CONFIG_NET_GUARDSIZE=2
+
+#
+# Data link support
+#
+# CONFIG_NET_MULTILINK is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
+# CONFIG_NET_TUN is not set
+
+#
+# Network Device Operations
+#
+# CONFIG_NETDEV_PHY_IOCTL is not set
+
+#
+# Internet Protocol Selection
+#
+CONFIG_NET_IPv4=y
+# CONFIG_NET_IPv6 is not set
+
+#
+# Socket Support
+#
+CONFIG_NSOCKET_DESCRIPTORS=10
+CONFIG_NET_NACTIVESOCKETS=16
+CONFIG_NET_SOCKOPTS=y
+CONFIG_NET_SOLINGER=y
+
+#
+# Raw Socket Support
+#
+# CONFIG_NET_PKT is not set
+
+#
+# Unix Domain Socket Support
+#
+# CONFIG_NET_LOCAL is not set
+
+#
+# TCP/IP Networking
+#
+CONFIG_NET_TCP=y
+# CONFIG_NET_TCPURGDATA is not set
+CONFIG_NET_TCP_CONNS=40
+CONFIG_NET_MAX_LISTENPORTS=40
+CONFIG_NET_TCP_READAHEAD=y
+# CONFIG_NET_TCP_WRITE_BUFFERS is not set
+CONFIG_NET_TCP_RECVDELAY=0
+CONFIG_NET_TCPBACKLOG=y
+# CONFIG_NET_TCP_SPLIT is not set
+# CONFIG_NET_SENDFILE is not set
+
+#
+# UDP Networking
+#
+CONFIG_NET_UDP=y
+CONFIG_NET_UDP_CHECKSUMS=y
+CONFIG_NET_UDP_CONNS=8
+CONFIG_NET_BROADCAST=y
+# CONFIG_NET_RXAVAIL is not set
+CONFIG_NET_UDP_READAHEAD=y
+
+#
+# ICMP Networking Support
+#
+CONFIG_NET_ICMP=y
+CONFIG_NET_ICMP_PING=y
+
+#
+# IGMPv2 Client Support
+#
+# CONFIG_NET_IGMP is not set
+
+#
+# ARP Configuration
+#
+CONFIG_NET_ARP=y
+CONFIG_NET_ARPTAB_SIZE=16
+CONFIG_NET_ARP_MAXAGE=120
+CONFIG_NET_ARP_IPIN=y
+# CONFIG_NET_ARP_SEND is not set
+
+#
+# Network I/O Buffer Support
+#
+CONFIG_NET_IOB=y
+CONFIG_IOB_NBUFFERS=24
+CONFIG_IOB_BUFSIZE=196
+CONFIG_IOB_NCHAINS=8
+# CONFIG_NET_ARCH_INCR32 is not set
+# CONFIG_NET_ARCH_CHKSUM is not set
+CONFIG_NET_STATISTICS=y
+
+#
+# Routing Table Configuration
+#
+# CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME=""
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_FS_READABLE is not set
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_NFS is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=2
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+CONFIG_LIBC_NETDB=y
+CONFIG_NETDB_DNSCLIENT=y
+CONFIG_NETDB_DNSCLIENT_ENTRIES=8
+CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
+CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
+CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_DNSSERVER_NOADDR is not set
+CONFIG_NETDB_DNSSERVER_IPv4=y
+CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NETTEST is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+# CONFIG_EXAMPLES_NSH is not set
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+CONFIG_EXAMPLES_TELNETD=y
+CONFIG_EXAMPLES_TELNETD_NOMAC=y
+CONFIG_EXAMPLES_TELNETD_IPADDR=0xc0a80185
+CONFIG_EXAMPLES_TELNETD_DRIPADDR=0xc0a80101
+CONFIG_EXAMPLES_TELNETD_NETMASK=0xffffff00
+CONFIG_EXAMPLES_TELNETD_DAEMONPRIO=128
+CONFIG_EXAMPLES_TELNETD_DAEMONSTACKSIZE=2048
+CONFIG_EXAMPLES_TELNETD_CLIENTPRIO=128
+CONFIG_EXAMPLES_TELNETD_CLIENTSTACKSIZE=2048
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_UDP is not set
+# CONFIG_EXAMPLES_UDPBLASTER is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_WGET is not set
+# CONFIG_EXAMPLES_XMLRPC is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+CONFIG_NETUTILS_DHCPC=y
+# CONFIG_NETUTILS_DHCPD is not set
+CONFIG_NETUTILS_DISCOVER=y
+CONFIG_DISCOVER_STACK_SIZE=1024
+CONFIG_DISCOVER_PRIORITY=50
+CONFIG_DISCOVER_PORT=96
+CONFIG_DISCOVER_INTERFACE="eth0"
+CONFIG_DISCOVER_DEVICE_CLASS=0xff
+CONFIG_DISCOVER_DESCR="NuttX"
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_FTPD is not set
+# CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
+# CONFIG_NETUTILS_SMTP is not set
+CONFIG_NETUTILS_TELNETD=y
+# CONFIG_NETUTILS_TFTPC is not set
+# CONFIG_NETUTILS_WEBCLIENT is not set
+# CONFIG_NETUTILS_WEBSERVER is not set
+# CONFIG_NETUTILS_XMLRPC is not set
+
+#
+# NSH Library
+#
+# CONFIG_NSH_LIBRARY is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_NETDB is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
+# CONFIG_SYSTEM_READLINE is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-stm32-e407/telnetd/setenv.sh b/configs/olimex-stm32-e407/telnetd/setenv.sh
new file mode 100755
index 0000000000000000000000000000000000000000..62aa001c6e1a18042bdb6a4141d803cdfcf313e1
--- /dev/null
+++ b/configs/olimex-stm32-e407/telnetd/setenv.sh
@@ -0,0 +1,80 @@
+#!/bin/bash
+# configs/olimex-stm32-e407/telnetd/setenv.sh
+#
+#   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the RIDE
+# toolchain under windows.  You will also have to edit this if you install
+# the RIDE toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# These are the Cygwin paths to the locations where I installed the Atollic
+# toolchain under windows.  You will also have to edit this if you install
+# the Atollic toolchain in any other location.  /usr/bin is added before
+# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
+# at those locations as well.
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH variable
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/olimex-stm32-e407/usbnsh/Make.defs b/configs/olimex-stm32-e407/usbnsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..7c5392e9442ab8dfc079a3f7af371708c8b1581f
--- /dev/null
+++ b/configs/olimex-stm32-e407/usbnsh/Make.defs
@@ -0,0 +1,113 @@
+############################################################################
+# configs/olimex-stm32-e407/usbnsh/Make.defs
+#
+#   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/olimex-stm32-e407/usbnsh/defconfig b/configs/olimex-stm32-e407/usbnsh/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..2d8f47e761da562fb491c8a6748fdaba01f8c9db
--- /dev/null
+++ b/configs/olimex-stm32-e407/usbnsh/defconfig
@@ -0,0 +1,1236 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+# CONFIG_ARCH_CHIP_STM32F103C8 is not set
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+CONFIG_ARCH_CHIP_STM32F407ZG=y
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+# CONFIG_STM32_STM32F10XX is not set
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+# CONFIG_STM32_PERFORMANCELINE is not set
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+# CONFIG_STM32_MEDIUMDENSITY is not set
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+CONFIG_STM32_STM32F40XX=y
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+CONFIG_STM32_STM32F407=y
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+CONFIG_STM32_HAVE_CCM=y
+# CONFIG_STM32_HAVE_USBDEV is not set
+CONFIG_STM32_HAVE_OTGFS=y
+CONFIG_STM32_HAVE_FSMC=y
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+CONFIG_STM32_HAVE_USART6=y
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+CONFIG_STM32_HAVE_TIM2=y
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+CONFIG_STM32_HAVE_TIM9=y
+CONFIG_STM32_HAVE_TIM10=y
+CONFIG_STM32_HAVE_TIM11=y
+CONFIG_STM32_HAVE_TIM12=y
+CONFIG_STM32_HAVE_TIM13=y
+CONFIG_STM32_HAVE_TIM14=y
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+CONFIG_STM32_HAVE_CAN2=y
+CONFIG_STM32_HAVE_DAC1=y
+CONFIG_STM32_HAVE_DAC2=y
+CONFIG_STM32_HAVE_RNG=y
+CONFIG_STM32_HAVE_ETHMAC=y
+CONFIG_STM32_HAVE_I2C2=y
+CONFIG_STM32_HAVE_I2C3=y
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKPSRAM is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CAN2 is not set
+# CONFIG_STM32_CCMDATARAM is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_CRYP is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_DAC1 is not set
+# CONFIG_STM32_DAC2 is not set
+# CONFIG_STM32_DCMI is not set
+# CONFIG_STM32_ETHMAC is not set
+# CONFIG_STM32_FSMC is not set
+# CONFIG_STM32_HASH is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_I2C3 is not set
+CONFIG_STM32_OTGFS=y
+# CONFIG_STM32_OTGHS is not set
+CONFIG_STM32_PWR=y
+# CONFIG_STM32_RNG is not set
+# CONFIG_STM32_SDIO is not set
+# CONFIG_STM32_SPI1 is not set
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SYSCFG=y
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+# CONFIG_STM32_TIM9 is not set
+# CONFIG_STM32_TIM10 is not set
+# CONFIG_STM32_TIM11 is not set
+# CONFIG_STM32_TIM12 is not set
+# CONFIG_STM32_TIM13 is not set
+# CONFIG_STM32_TIM14 is not set
+# CONFIG_STM32_USART1 is not set
+CONFIG_STM32_USART2=y
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USART6 is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_FLASH_PREFETCH is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+# CONFIG_STM32_JTAG_FULL_ENABLE is not set
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+CONFIG_STM32_JTAG_SW_ENABLE=y
+# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM2_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+# CONFIG_STM32_TIM9_CAP is not set
+# CONFIG_STM32_TIM10_CAP is not set
+# CONFIG_STM32_TIM11_CAP is not set
+# CONFIG_STM32_TIM12_CAP is not set
+# CONFIG_STM32_TIM13_CAP is not set
+# CONFIG_STM32_TIM14_CAP is not set
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
+# CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+# CONFIG_STM32_HAVE_RTC_COUNTER is not set
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=16717
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=114688
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_OLIMEX_STM32H407 is not set
+CONFIG_ARCH_BOARD_OLIMEX_STM32E407=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="olimex-stm32-e407"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+# CONFIG_ARCH_IRQBUTTONS is not set
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+CONFIG_BOARDCTL_USBDEVCTRL=y
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2013
+CONFIG_START_MONTH=1
+CONFIG_START_DAY=27
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=8
+CONFIG_WDOG_INTRESERVE=1
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=31
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+# CONFIG_DEV_CONSOLE is not set
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+CONFIG_DISABLE_POLL=y
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+CONFIG_SERIAL_REMOVABLE=y
+# CONFIG_SERIAL_CONSOLE is not set
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+# CONFIG_USART2_SERIAL_CONSOLE is not set
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+CONFIG_NO_SERIAL_CONSOLE=y
+
+#
+# USART2 Configuration
+#
+CONFIG_USART2_RXBUFSIZE=256
+CONFIG_USART2_TXBUFSIZE=256
+CONFIG_USART2_BAUD=115200
+CONFIG_USART2_BITS=8
+CONFIG_USART2_PARITY=0
+CONFIG_USART2_2STOP=0
+# CONFIG_USART2_IFLOWCONTROL is not set
+# CONFIG_USART2_OFLOWCONTROL is not set
+# CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+CONFIG_USBDEV=y
+
+#
+# USB Device Controller Driver Options
+#
+# CONFIG_USBDEV_ISOCHRONOUS is not set
+# CONFIG_USBDEV_DUALSPEED is not set
+CONFIG_USBDEV_SELFPOWERED=y
+# CONFIG_USBDEV_BUSPOWERED is not set
+CONFIG_USBDEV_MAXPOWER=100
+# CONFIG_USBDEV_DMA is not set
+# CONFIG_ARCH_USBDEV_STALLQUEUE is not set
+# CONFIG_USBDEV_TRACE is not set
+
+#
+# USB Device Class Driver Options
+#
+# CONFIG_USBDEV_COMPOSITE is not set
+# CONFIG_PL2303 is not set
+CONFIG_CDCACM=y
+CONFIG_CDCACM_CONSOLE=y
+CONFIG_CDCACM_EP0MAXPACKET=64
+CONFIG_CDCACM_EPINTIN=1
+CONFIG_CDCACM_EPINTIN_FSSIZE=64
+CONFIG_CDCACM_EPINTIN_HSSIZE=64
+CONFIG_CDCACM_EPBULKOUT=3
+CONFIG_CDCACM_EPBULKOUT_FSSIZE=64
+CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
+CONFIG_CDCACM_EPBULKIN=2
+CONFIG_CDCACM_EPBULKIN_FSSIZE=64
+CONFIG_CDCACM_EPBULKIN_HSSIZE=512
+CONFIG_CDCACM_NRDREQS=4
+CONFIG_CDCACM_NWRREQS=4
+CONFIG_CDCACM_BULKIN_REQLEN=96
+CONFIG_CDCACM_RXBUFSIZE=256
+CONFIG_CDCACM_TXBUFSIZE=256
+CONFIG_CDCACM_VENDORID=0x0525
+CONFIG_CDCACM_PRODUCTID=0xa4a7
+CONFIG_CDCACM_VENDORSTR="NuttX"
+CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
+# CONFIG_USBMSC is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+CONFIG_SYSLOG_CHAR=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+CONFIG_SYSLOG_CHAR_CRLF=y
+CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+CONFIG_FS_READABLE=y
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=2
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+CONFIG_EXAMPLES_HELLO=y
+CONFIG_EXAMPLES_HELLO_PRIORITY=100
+CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
+CONFIG_EXAMPLES_HELLOXX=y
+CONFIG_EXAMPLES_HELLOXX_CXXINITIALIZE=y
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_IFUPDOWN is not set
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CMDOPT_DF_H=y
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_USBCONSOLE is not set
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CDCACM is not set
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-stm32-e407/usbnsh/setenv.sh b/configs/olimex-stm32-e407/usbnsh/setenv.sh
new file mode 100755
index 0000000000000000000000000000000000000000..e5b5af7104d2f93cccb17a26048b0761bc97cc57
--- /dev/null
+++ b/configs/olimex-stm32-e407/usbnsh/setenv.sh
@@ -0,0 +1,80 @@
+#!/bin/bash
+# configs/olimex-stm32-e407/usbnsh/setenv.sh
+#
+#   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the RIDE
+# toolchain under windows.  You will also have to edit this if you install
+# the RIDE toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# These are the Cygwin paths to the locations where I installed the Atollic
+# toolchain under windows.  You will also have to edit this if you install
+# the Atollic toolchain in any other location.  /usr/bin is added before
+# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
+# at those locations as well.
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/olimex-stm32-e407/webserver/Make.defs b/configs/olimex-stm32-e407/webserver/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..621d215e249b4534b61e15a4b4c41fe2503cb9fd
--- /dev/null
+++ b/configs/olimex-stm32-e407/webserver/Make.defs
@@ -0,0 +1,112 @@
+############################################################################
+# configs/olimex-stm32-e407/webserver/Make.defs
+#
+#   Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
diff --git a/configs/olimex-stm32-e407/webserver/defconfig b/configs/olimex-stm32-e407/webserver/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..ed75f86631535443b7889b8b4a12c0e90de10994
--- /dev/null
+++ b/configs/olimex-stm32-e407/webserver/defconfig
@@ -0,0 +1,1314 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
+# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+# CONFIG_ARCH_CHIP_STM32F103C8 is not set
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+CONFIG_ARCH_CHIP_STM32F407ZG=y
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+# CONFIG_STM32_STM32F10XX is not set
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+# CONFIG_STM32_PERFORMANCELINE is not set
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+# CONFIG_STM32_MEDIUMDENSITY is not set
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+CONFIG_STM32_STM32F40XX=y
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+CONFIG_STM32_STM32F407=y
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+CONFIG_STM32_HAVE_CCM=y
+# CONFIG_STM32_HAVE_USBDEV is not set
+CONFIG_STM32_HAVE_OTGFS=y
+CONFIG_STM32_HAVE_FSMC=y
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+CONFIG_STM32_HAVE_USART6=y
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+CONFIG_STM32_HAVE_TIM2=y
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+CONFIG_STM32_HAVE_TIM9=y
+CONFIG_STM32_HAVE_TIM10=y
+CONFIG_STM32_HAVE_TIM11=y
+CONFIG_STM32_HAVE_TIM12=y
+CONFIG_STM32_HAVE_TIM13=y
+CONFIG_STM32_HAVE_TIM14=y
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+CONFIG_STM32_HAVE_CAN2=y
+CONFIG_STM32_HAVE_DAC1=y
+CONFIG_STM32_HAVE_DAC2=y
+CONFIG_STM32_HAVE_RNG=y
+CONFIG_STM32_HAVE_ETHMAC=y
+CONFIG_STM32_HAVE_I2C2=y
+CONFIG_STM32_HAVE_I2C3=y
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKPSRAM is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CAN2 is not set
+# CONFIG_STM32_CCMDATARAM is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_CRYP is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_DAC1 is not set
+# CONFIG_STM32_DAC2 is not set
+# CONFIG_STM32_DCMI is not set
+CONFIG_STM32_ETHMAC=y
+# CONFIG_STM32_FSMC is not set
+# CONFIG_STM32_HASH is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_I2C3 is not set
+# CONFIG_STM32_OTGFS is not set
+# CONFIG_STM32_OTGHS is not set
+CONFIG_STM32_PWR=y
+# CONFIG_STM32_RNG is not set
+# CONFIG_STM32_SDIO is not set
+# CONFIG_STM32_SPI1 is not set
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SYSCFG=y
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+# CONFIG_STM32_TIM9 is not set
+# CONFIG_STM32_TIM10 is not set
+# CONFIG_STM32_TIM11 is not set
+# CONFIG_STM32_TIM12 is not set
+# CONFIG_STM32_TIM13 is not set
+# CONFIG_STM32_TIM14 is not set
+# CONFIG_STM32_USART1 is not set
+CONFIG_STM32_USART2=y
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USART6 is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_FLASH_PREFETCH is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+CONFIG_STM32_JTAG_FULL_ENABLE=y
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+# CONFIG_STM32_JTAG_SW_ENABLE is not set
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM2_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+# CONFIG_STM32_TIM9_CAP is not set
+# CONFIG_STM32_TIM10_CAP is not set
+# CONFIG_STM32_TIM11_CAP is not set
+# CONFIG_STM32_TIM12_CAP is not set
+# CONFIG_STM32_TIM13_CAP is not set
+# CONFIG_STM32_TIM14_CAP is not set
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
+# CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+# CONFIG_STM32_HAVE_RTC_COUNTER is not set
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# Ethernet MAC configuration
+#
+CONFIG_STM32_PHYADDR=0
+# CONFIG_STM32_PHYINIT is not set
+# CONFIG_STM32_MII is not set
+CONFIG_STM32_AUTONEG=y
+CONFIG_STM32_PHYSR=31
+CONFIG_STM32_PHYSR_ALTCONFIG=y
+CONFIG_STM32_PHYSR_ALTMODE=0x001c
+CONFIG_STM32_PHYSR_10HD=0x0004
+CONFIG_STM32_PHYSR_100HD=0x0008
+CONFIG_STM32_PHYSR_10FD=0x0014
+CONFIG_STM32_PHYSR_100FD=0x0018
+# CONFIG_STM32_ETH_PTP is not set
+CONFIG_STM32_RMII=y
+# CONFIG_STM32_RMII_MCO1 is not set
+# CONFIG_STM32_RMII_MCO2 is not set
+CONFIG_STM32_RMII_EXTCLK=y
+CONFIG_STM32_ETHMAC_HPWORK=y
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=16717
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=114688
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_OLIMEX_STM32H407 is not set
+CONFIG_ARCH_BOARD_OLIMEX_STM32E407=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="olimex-stm32-e407"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+# CONFIG_ARCH_IRQBUTTONS is not set
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+# CONFIG_LIB_BOARDCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=12
+CONFIG_START_DAY=6
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=16
+CONFIG_WDOG_INTRESERVE=4
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="webserver_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=31
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+CONFIG_NETDEVICES=y
+
+#
+# General Ethernet MAC Driver Options
+#
+# CONFIG_NETDEV_LOOPBACK is not set
+# CONFIG_NETDEV_TELNET is not set
+# CONFIG_NETDEV_MULTINIC is not set
+# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set
+# CONFIG_NETDEV_LATEINIT is not set
+
+#
+# External Ethernet MAC Device Support
+#
+# CONFIG_NET_DM90x0 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ENCX24J600 is not set
+# CONFIG_NET_SLIP is not set
+# CONFIG_NET_FTMAC100 is not set
+
+#
+# External Ethernet PHY Device Support
+#
+# CONFIG_ARCH_PHY_INTERRUPT is not set
+# CONFIG_ETH0_PHY_NONE is not set
+# CONFIG_ETH0_PHY_AM79C874 is not set
+# CONFIG_ETH0_PHY_KS8721 is not set
+# CONFIG_ETH0_PHY_KSZ8041 is not set
+# CONFIG_ETH0_PHY_KSZ8051 is not set
+# CONFIG_ETH0_PHY_KSZ8061 is not set
+# CONFIG_ETH0_PHY_KSZ8081 is not set
+# CONFIG_ETH0_PHY_KSZ90x1 is not set
+# CONFIG_ETH0_PHY_DP83848C is not set
+CONFIG_ETH0_PHY_LAN8720=y
+# CONFIG_ETH0_PHY_LAN8740 is not set
+# CONFIG_ETH0_PHY_LAN8740A is not set
+# CONFIG_ETH0_PHY_LAN8742A is not set
+# CONFIG_ETH0_PHY_DM9161 is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART2_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART2 Configuration
+#
+CONFIG_USART2_RXBUFSIZE=128
+CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART2_BAUD=115200
+CONFIG_USART2_BITS=8
+CONFIG_USART2_PARITY=0
+CONFIG_USART2_2STOP=0
+# CONFIG_USART2_IFLOWCONTROL is not set
+# CONFIG_USART2_OFLOWCONTROL is not set
+# CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+CONFIG_ARCH_HAVE_NET=y
+CONFIG_ARCH_HAVE_PHY=y
+CONFIG_NET=y
+# CONFIG_NET_PROMISCUOUS is not set
+
+#
+# Driver buffer configuration
+#
+CONFIG_NET_ETH_MTU=590
+CONFIG_NET_ETH_TCP_RECVWNDO=536
+CONFIG_NET_GUARDSIZE=2
+
+#
+# Data link support
+#
+# CONFIG_NET_MULTILINK is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
+# CONFIG_NET_TUN is not set
+
+#
+# Network Device Operations
+#
+# CONFIG_NETDEV_PHY_IOCTL is not set
+
+#
+# Internet Protocol Selection
+#
+CONFIG_NET_IPv4=y
+# CONFIG_NET_IPv6 is not set
+
+#
+# Socket Support
+#
+CONFIG_NSOCKET_DESCRIPTORS=10
+CONFIG_NET_NACTIVESOCKETS=16
+CONFIG_NET_SOCKOPTS=y
+CONFIG_NET_SOLINGER=y
+
+#
+# Raw Socket Support
+#
+# CONFIG_NET_PKT is not set
+
+#
+# Unix Domain Socket Support
+#
+# CONFIG_NET_LOCAL is not set
+
+#
+# TCP/IP Networking
+#
+CONFIG_NET_TCP=y
+# CONFIG_NET_TCPURGDATA is not set
+CONFIG_NET_TCP_CONNS=40
+CONFIG_NET_MAX_LISTENPORTS=40
+CONFIG_NET_TCP_READAHEAD=y
+# CONFIG_NET_TCP_WRITE_BUFFERS is not set
+CONFIG_NET_TCP_RECVDELAY=0
+CONFIG_NET_TCPBACKLOG=y
+# CONFIG_NET_TCP_SPLIT is not set
+# CONFIG_NET_SENDFILE is not set
+
+#
+# UDP Networking
+#
+CONFIG_NET_UDP=y
+CONFIG_NET_UDP_CHECKSUMS=y
+CONFIG_NET_UDP_CONNS=8
+CONFIG_NET_BROADCAST=y
+# CONFIG_NET_RXAVAIL is not set
+CONFIG_NET_UDP_READAHEAD=y
+
+#
+# ICMP Networking Support
+#
+CONFIG_NET_ICMP=y
+CONFIG_NET_ICMP_PING=y
+
+#
+# IGMPv2 Client Support
+#
+# CONFIG_NET_IGMP is not set
+
+#
+# ARP Configuration
+#
+CONFIG_NET_ARP=y
+CONFIG_NET_ARPTAB_SIZE=16
+CONFIG_NET_ARP_MAXAGE=120
+CONFIG_NET_ARP_IPIN=y
+# CONFIG_NET_ARP_SEND is not set
+
+#
+# Network I/O Buffer Support
+#
+CONFIG_NET_IOB=y
+CONFIG_IOB_NBUFFERS=24
+CONFIG_IOB_BUFSIZE=196
+CONFIG_IOB_NCHAINS=8
+# CONFIG_NET_ARCH_INCR32 is not set
+# CONFIG_NET_ARCH_CHKSUM is not set
+CONFIG_NET_STATISTICS=y
+
+#
+# Routing Table Configuration
+#
+# CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME=""
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_FS_READABLE is not set
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_NFS is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=2
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+CONFIG_LIBC_NETDB=y
+CONFIG_NETDB_DNSCLIENT=y
+CONFIG_NETDB_DNSCLIENT_ENTRIES=8
+CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
+CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
+CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_DNSSERVER_NOADDR is not set
+CONFIG_NETDB_DNSSERVER_IPv4=y
+CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NETTEST is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+# CONFIG_EXAMPLES_NSH is not set
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_UDP is not set
+# CONFIG_EXAMPLES_UDPBLASTER is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+CONFIG_EXAMPLES_WEBSERVER=y
+CONFIG_EXAMPLES_WEBSERVER_IPADDR=0x0a000002
+CONFIG_EXAMPLES_WEBSERVER_DRIPADDR=0xc0a80101
+CONFIG_EXAMPLES_WEBSERVER_NETMASK=0xffffff00
+CONFIG_EXAMPLES_WEBSERVER_NOMAC=y
+# CONFIG_EXAMPLES_WGET is not set
+# CONFIG_EXAMPLES_XMLRPC is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+CONFIG_NETUTILS_DHCPC=y
+# CONFIG_NETUTILS_DHCPD is not set
+CONFIG_NETUTILS_DISCOVER=y
+CONFIG_DISCOVER_STACK_SIZE=1024
+CONFIG_DISCOVER_PRIORITY=50
+CONFIG_DISCOVER_PORT=96
+CONFIG_DISCOVER_INTERFACE="eth0"
+CONFIG_DISCOVER_DEVICE_CLASS=0xff
+CONFIG_DISCOVER_DESCR="NuttX"
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_FTPD is not set
+# CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
+# CONFIG_NETUTILS_SMTP is not set
+# CONFIG_NETUTILS_TELNETD is not set
+# CONFIG_NETUTILS_TFTPC is not set
+# CONFIG_NETUTILS_WEBCLIENT is not set
+CONFIG_NETUTILS_WEBSERVER=y
+# CONFIG_NETUTILS_HTTPD_SINGLECONNECT is not set
+# CONFIG_NETUTILS_HTTPD_SCRIPT_DISABLE is not set
+CONFIG_NETUTILS_HTTPD_MAXPATH=64
+# CONFIG_NETUTILS_HTTPD_CGIPATH is not set
+CONFIG_NETUTILS_HTTPD_ERRPATH=""
+# CONFIG_NETUTILS_HTTPD_SERVERHEADER_DISABLE is not set
+CONFIG_NETUTILS_HTTPD_TIMEOUT=0
+CONFIG_NETUTILS_HTTPD_CLASSIC=y
+# CONFIG_NETUTILS_HTTPD_MMAP is not set
+# CONFIG_NETUTILS_HTTPD_SENDFILE is not set
+CONFIG_NETUTILS_HTTPD_KEEPALIVE_DISABLE=y
+# CONFIG_NETUTILS_XMLRPC is not set
+
+#
+# NSH Library
+#
+# CONFIG_NSH_LIBRARY is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_NETDB is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
+# CONFIG_SYSTEM_READLINE is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-stm32-e407/webserver/setenv.sh b/configs/olimex-stm32-e407/webserver/setenv.sh
new file mode 100755
index 0000000000000000000000000000000000000000..3cffa68d40d2b9c0df6bd0c7e5b319c2e83296d3
--- /dev/null
+++ b/configs/olimex-stm32-e407/webserver/setenv.sh
@@ -0,0 +1,80 @@
+#!/bin/bash
+# configs/olimex-stm32-e407/webserver/setenv.sh
+#
+#   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the RIDE
+# toolchain under windows.  You will also have to edit this if you install
+# the RIDE toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# These are the Cygwin paths to the locations where I installed the Atollic
+# toolchain under windows.  You will also have to edit this if you install
+# the Atollic toolchain in any other location.  /usr/bin is added before
+# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
+# at those locations as well.
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH variable
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/olimex-stm32-h405/include/board.h b/configs/olimex-stm32-h405/include/board.h
index 462d34751d8890443f12a344c5a495cc4201742e..86d98da3fab8b5727584ffc378b6188ca289a036 100644
--- a/configs/olimex-stm32-h405/include/board.h
+++ b/configs/olimex-stm32-h405/include/board.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/olimex-stm32-h405/include/board.h
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -129,8 +129,14 @@
  * Note: TIM1,8 are on APB2, others on APB1
  */
 
-#define STM32_TIM18_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_TIM27_FREQUENCY   STM32_HCLK_FREQUENCY
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM3_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM4_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM5_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM6_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM7_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM8_FREQUENCY    STM32_HCLK_FREQUENCY
 
 /* LED definitions ******************************************************************/
 /* If CONFIG_ARCH_LEDS is not defined, then the user can control the status LED in any
diff --git a/configs/olimex-stm32-h405/src/olimex-stm32-h405.h b/configs/olimex-stm32-h405/src/olimex-stm32-h405.h
index 0ae22a4e2af9c649f353da43749dbdb5db7b0e9c..d0e40d135dd8db83125e0c43e53de37e18890e95 100644
--- a/configs/olimex-stm32-h405/src/olimex-stm32-h405.h
+++ b/configs/olimex-stm32-h405/src/olimex-stm32-h405.h
@@ -89,27 +89,27 @@ void weak_function stm32_usbinitialize(void);
 #endif
 
 /************************************************************************************
- * Name: stm32_adc_initialize
+ * Name: stm32_adc_setup
  *
  * Description:
- *   Called at application startup time to initialize the ADC functionality.
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ADC
-int stm32_adc_initialize(void);
+int stm32_adc_setup(void);
 #endif
 
-/************************************************************************************
- * Name: stm32_can_initialize
+/****************************************************************************
+ * Name: stm32_can_setup
  *
  * Description:
- *   Called at application startup time to initialize the CAN functionality.
+ *  Initialize CAN and register the CAN device
  *
- ************************************************************************************/
+ ****************************************************************************/
 
-#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2))
-int stm32_can_initialize(void);
+#ifdef CONFIG_CAN
+int stm32_can_setup(void);
 #endif
 
 #endif  /* __ASSEMBLY__ */
diff --git a/configs/olimex-stm32-h405/src/stm32_adc.c b/configs/olimex-stm32-h405/src/stm32_adc.c
index cc3a9ef0edbe795a6c6424af236b1f8b124ec7ae..137ebf9561b4f6de8cfb97b9b2945edd76c82f61 100644
--- a/configs/olimex-stm32-h405/src/stm32_adc.c
+++ b/configs/olimex-stm32-h405/src/stm32_adc.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/olimex-stm32-h405/src/stm32_adc.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -105,37 +105,19 @@ static const uint32_t g_pinlist[ADC1_NCHANNELS]  = {GPIO_ADC1_IN1};/*,  GPIO_ADC
                                                     GPIO_ADC1_IN13, GPIO_ADC1_IN15};*/
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_adc_setup
- *
- * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/adc.
- *
- ************************************************************************************/
-
-int board_adc_setup(void)
-{
-  return stm32_adc_initialize();
-}
-
-/************************************************************************************
- * Name: stm32_adc_initialize
+ * Name: stm32_adc_setup
  *
  * Description:
- *   Called at application startup time to initialize the ADC functionality.
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
-int stm32_adc_initialize(void)
+int stm32_adc_setup(void)
 {
 #ifdef CONFIG_STM32_ADC1
   static bool initialized = false;
@@ -159,7 +141,7 @@ int stm32_adc_initialize(void)
       adc = stm32_adcinitialize(1, g_chanlist, ADC1_NCHANNELS);
       if (adc == NULL)
         {
-          adbg("ERROR: Failed to get ADC interface\n");
+          aerr("ERROR: Failed to get ADC interface\n");
           return -ENODEV;
         }
 
@@ -168,7 +150,7 @@ int stm32_adc_initialize(void)
       ret = adc_register("/dev/adc0", adc);
       if (ret < 0)
         {
-          adbg("adc_register failed: %d\n", ret);
+          aerr("ERROR: adc_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/olimex-stm32-h405/src/stm32_appinit.c b/configs/olimex-stm32-h405/src/stm32_appinit.c
index 776b5ffa5c352cc16d4c72d31ee7761131469af7..d94f29d31b30aa5f4b7390edf07e3e8dc3caf8a9 100644
--- a/configs/olimex-stm32-h405/src/stm32_appinit.c
+++ b/configs/olimex-stm32-h405/src/stm32_appinit.c
@@ -46,8 +46,8 @@
 
 #include 
 
-#ifdef CONFIG_SYSTEM_USBMONITOR
-#  include 
+#ifdef CONFIG_USBMONITOR
+#  include 
 #endif
 
 #ifdef CONFIG_STM32_OTGFS
@@ -103,29 +103,28 @@
 
 int board_app_initialize(uintptr_t arg)
 {
-#if defined(CONFIG_CAN) || defined(CONFIG_ADC)
   int ret;
-#endif
 
-#ifdef CONFIG_CAN
-  /* Configure on-board CAN if CAN support has been selected. */
+#ifdef CONFIG_ADC
+  /* Initialize ADC and register the ADC driver. */
 
-  ret = stm32_can_initialize();
-  if (ret != OK)
+  ret = stm32_adc_setup();
+  if (ret < 0)
     {
-      syslog(LOG_ERR, "ERROR: Failed to initialize CAN: %d\n", ret);
+      syslog(LOG_ERR, "ERROR: stm32_adc_setup failed: %d\n", ret);
     }
 #endif
 
-#ifdef CONFIG_ADC
-  /* Configure on-board ADCs if ADC support has been selected. */
+#ifdef CONFIG_CAN
+  /* Initialize CAN and register the CAN driver. */
 
-  ret = stm32_adc_initialize();
-  if (ret != OK)
+  ret = stm32_can_setup();
+  if (ret < 0)
     {
-      syslog(LOG_ERR, "ERROR: Failed to initialize ADC: %d\n", ret);
+      syslog(LOG_ERR, "ERROR: stm32_can_setup failed: %d\n", ret);
     }
 #endif
 
+  UNUSED(ret);
   return OK;
 }
diff --git a/configs/olimex-stm32-h405/src/stm32_autoleds.c b/configs/olimex-stm32-h405/src/stm32_autoleds.c
index 32117cdf276131cca1c8e3ac46b76f745a52e817..6fefa2c9cdcd8f72dbc83b4fbbad70672cca4ebb 100644
--- a/configs/olimex-stm32-h405/src/stm32_autoleds.c
+++ b/configs/olimex-stm32-h405/src/stm32_autoleds.c
@@ -51,30 +51,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/olimex-stm32-h405/src/stm32_boot.c b/configs/olimex-stm32-h405/src/stm32_boot.c
index 7332b8a4ef13999e574c136b86cb155bf45709c8..bc4792fc09e0a936eac34a02cfa2128bdd6e3d22 100644
--- a/configs/olimex-stm32-h405/src/stm32_boot.c
+++ b/configs/olimex-stm32-h405/src/stm32_boot.c
@@ -47,14 +47,6 @@
 
 #include "olimex-stm32-h405.h"
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
diff --git a/configs/olimex-stm32-h405/src/stm32_buttons.c b/configs/olimex-stm32-h405/src/stm32_buttons.c
index aefe40fc8c3eee01ed158d41ab12643e24ca99dc..c3b6aa92fee40efa788e0fbb3d0032b103ef6592 100644
--- a/configs/olimex-stm32-h405/src/stm32_buttons.c
+++ b/configs/olimex-stm32-h405/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/olimex-stm32-h405/src/stm32_buttons.c
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -49,18 +50,10 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /* Pin configuration for each Olimex-STM32-H405 button.  This array is indexed by
  * the BUTTON_* definitions in board.h
  */
@@ -135,24 +128,23 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   /* The following should be atomic */
 
   if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
     {
-      oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler, arg);
     }
 
-  return oldhandler;
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/olimex-stm32-h405/src/stm32_can.c b/configs/olimex-stm32-h405/src/stm32_can.c
index 6443bdb88d9ee1bb87b323fe7576a30461a8be22..6f361af9406f640dc0fce0150d0c9b022969a45a 100644
--- a/configs/olimex-stm32-h405/src/stm32_can.c
+++ b/configs/olimex-stm32-h405/src/stm32_can.c
@@ -41,13 +41,16 @@
 
 #include 
 #include 
-#include 
+
+#include 
+
 #include 
+
 #include "stm32.h"
 #include "stm32_can.h"
 #include "olimex-stm32-h405.h"
 
-#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2))
+#ifdef CONFIG_CAN
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -65,85 +68,46 @@
 #  define CAN_PORT 2
 #endif
 
-/* Debug ***************************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
-
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
-#else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_can_initialize
+ * Name: stm32_can_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/can.
+ *  Initialize CAN and register the CAN device
  *
  ************************************************************************************/
 
-int board_can_initialize(void)
-{
-  return stm32_can_initialize();
-}
-
-/****************************************************************************************************
- * Name: stm32_can_initialize
- *
- * Description:
- *   Called at application startup time to initialize the CAN functionality.
- *
- ****************************************************************************************************/
-
-int stm32_can_initialize(void)
+int stm32_can_setup(void)
 {
-  static bool initialized = false;
+#if defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)
   struct can_dev_s *can;
   int ret;
 
-  /* Check if we have already initialized */
+  /* Call stm32_caninitialize() to get an instance of the CAN interface */
 
-  if (!initialized)
+  can = stm32_caninitialize(CAN_PORT);
+  if (can == NULL)
     {
-      /* Call stm32_caninitialize() to get an instance of the CAN interface */
-
-      can = stm32_caninitialize(CAN_PORT);
-      if (can == NULL)
-        {
-          candbg("ERROR:  Failed to get CAN interface\n");
-          return -ENODEV;
-        }
-
-      /* Register the CAN driver at "/dev/can0" */
-
-      ret = can_register("/dev/can0", can);
-      if (ret < 0)
-        {
-          candbg("ERROR: can_register failed: %d\n", ret);
-          return ret;
-        }
+      canerr("ERROR:  Failed to get CAN interface\n");
+      return -ENODEV;
+    }
 
-      /* Now we are initialized */
+  /* Register the CAN driver at "/dev/can0" */
 
-      initialized = true;
+  ret = can_register("/dev/can0", can);
+  if (ret < 0)
+    {
+      canerr("ERROR: can_register failed: %d\n", ret);
+      return ret;
     }
 
   return OK;
+#else
+  return -ENODEV;
+#endif
 }
 
-#endif /* CONFIG_CAN && (CONFIG_STM32_CAN1 || CONFIG_STM32_CAN2) */
+#endif /* CONFIG_CAN */
diff --git a/configs/olimex-stm32-h405/src/stm32_usb.c b/configs/olimex-stm32-h405/src/stm32_usb.c
index 438821fec29764e746c73a6ad11a3ab2b671b3b7..7680452af0792206213025e42ebcc121c85af5cf 100644
--- a/configs/olimex-stm32-h405/src/stm32_usb.c
+++ b/configs/olimex-stm32-h405/src/stm32_usb.c
@@ -110,7 +110,7 @@ void stm32_usbinitialize(void)
 #ifdef CONFIG_USBDEV
 void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
 #endif
 
diff --git a/configs/olimex-stm32-h405/src/stm32_userleds.c b/configs/olimex-stm32-h405/src/stm32_userleds.c
index 8cbbcbd27d920524868c2e6cce8e9e58d0f53dab..aa00a80bddbfbeb9078d94bb9bdf4a6f09ed17e0 100644
--- a/configs/olimex-stm32-h405/src/stm32_userleds.c
+++ b/configs/olimex-stm32-h405/src/stm32_userleds.c
@@ -48,22 +48,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
diff --git a/configs/olimex-stm32-h405/usbnsh/Make.defs b/configs/olimex-stm32-h405/usbnsh/Make.defs
index f9dc1ee405977508998acb9cc00182056ea789c7..1b869db74d0c30e77e29dc9a2fa6f23af5067836 100644
--- a/configs/olimex-stm32-h405/usbnsh/Make.defs
+++ b/configs/olimex-stm32-h405/usbnsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimex-stm32-h405/usbnsh/defconfig b/configs/olimex-stm32-h405/usbnsh/defconfig
index 5ba6d946fc59dad9ad170963f92f27fe63cd3f54..c92a592fba44131e24c2610f7f77026c912bac10 100644
--- a/configs/olimex-stm32-h405/usbnsh/defconfig
+++ b/configs/olimex-stm32-h405/usbnsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 CONFIG_DEBUG_NOOPT=y
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -206,6 +209,7 @@ CONFIG_CAN_TSEG2=8
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -353,6 +357,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -434,6 +444,12 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_PWM is not set
 CONFIG_STM32_TIM1_ADC=y
 CONFIG_STM32_TIM1_ADC1=y
@@ -461,9 +477,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART3_SERIALDRIVER=y
 # CONFIG_STM32_USART3_1WIREDRIVER is not set
 # CONFIG_USART3_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -565,19 +589,16 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-CONFIG_BOARDCTL_ADCTEST=y
-# CONFIG_BOARDCTL_PWMTEST is not set
-CONFIG_BOARDCTL_CANINIT=y
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -594,9 +615,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=1
@@ -695,6 +719,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -715,12 +740,16 @@ CONFIG_CAN_NPENDINGRTR=4
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_ANALOG=y
@@ -735,8 +764,18 @@ CONFIG_ADC_FIFOSIZE=8
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -744,6 +783,7 @@ CONFIG_ADC_FIFOSIZE=8
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -752,9 +792,9 @@ CONFIG_ADC_FIFOSIZE=8
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_SERIAL_REMOVABLE=y
+# CONFIG_SERIAL_CONSOLE is not set
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -800,6 +840,7 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USART3_IFLOWCONTROL is not set
 # CONFIG_USART3_OFLOWCONTROL is not set
 # CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -842,16 +883,22 @@ CONFIG_CDCACM_VENDORSTR="NuttX"
 CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_NONE=y
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -889,12 +936,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -944,6 +985,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -959,7 +1002,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -967,8 +1009,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -995,6 +1039,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # CAN Utilities
 #
+# CONFIG_CANUTILS_CANLIB is not set
 
 #
 # Examples
@@ -1003,28 +1048,16 @@ CONFIG_EXAMPLES_ADC=y
 CONFIG_EXAMPLES_ADC_DEVPATH="/dev/adc0"
 CONFIG_EXAMPLES_ADC_GROUPSIZE=4
 # CONFIG_EXAMPLES_ADC_SWTRIG is not set
-CONFIG_EXAMPLES_BUTTONS=y
-CONFIG_EXAMPLES_BUTTONS_MIN=0
-CONFIG_EXAMPLES_BUTTONS_MAX=0
-CONFIG_EXAMPLES_IRQBUTTONS_MIN=0
-CONFIG_EXAMPLES_IRQBUTTONS_MAX=0
-CONFIG_EXAMPLES_BUTTONS_NAME0="BUT"
-CONFIG_EXAMPLES_BUTTONS_NAME1="Button 1"
-CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2"
-CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3"
-CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4"
-CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5"
-CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6"
-CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
+# CONFIG_EXAMPLES_BUTTONS is not set
 CONFIG_EXAMPLES_CAN=y
 CONFIG_EXAMPLES_CAN_DEVPATH="/dev/can0"
 CONFIG_EXAMPLES_CAN_NMSGS=32
 # CONFIG_EXAMPLES_CAN_READ is not set
 # CONFIG_EXAMPLES_CAN_WRITE is not set
 CONFIG_EXAMPLES_CAN_READWRITE=y
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -1032,10 +1065,10 @@ CONFIG_EXAMPLES_CAN_READWRITE=y
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1045,35 +1078,34 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1095,8 +1127,9 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1161,12 +1194,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 CONFIG_NSH_DISABLE_PUT=y
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1183,6 +1216,7 @@ CONFIG_NSH_DISABLE_PUT=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 CONFIG_NSH_DISABLE_WGET=y
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1221,12 +1255,13 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1234,7 +1269,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
-# CONFIG_SYSTEM_CDCACM is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-stm32-h407/include/board.h b/configs/olimex-stm32-h407/include/board.h
index a116f5bb65aaef7b2e65bdc23c4af9fbb6d30735..9418619164f92841b14667d9b0a71250aefdcc5e 100644
--- a/configs/olimex-stm32-h407/include/board.h
+++ b/configs/olimex-stm32-h407/include/board.h
@@ -164,8 +164,14 @@
  * Note: TIM1,8 are on APB2, others on APB1
  */
 
-#define STM32_TIM18_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_TIM27_FREQUENCY   (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM3_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM4_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM5_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM6_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM7_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM8_FREQUENCY    STM32_HCLK_FREQUENCY
 
 /* SDIO dividers.  Note that slower clocking is required when DMA is disabled
  * in order to avoid RX overrun/TX underrun errors due to delayed responses
diff --git a/configs/olimex-stm32-h407/nsh/Make.defs b/configs/olimex-stm32-h407/nsh/Make.defs
index 41cbe3331337cbd6b7afd63d80be6c3c692fed06..52dc40979c1f6417209e0d43ac97d560b0d61419 100644
--- a/configs/olimex-stm32-h407/nsh/Make.defs
+++ b/configs/olimex-stm32-h407/nsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimex-stm32-h407/nsh/defconfig b/configs/olimex-stm32-h407/nsh/defconfig
index 808193295bde34904fb79b5b9a3b2ff88f37ace2..7e4ce50ef4a6d677213b26d55a443fb59263f642 100644
--- a/configs/olimex-stm32-h407/nsh/defconfig
+++ b/configs/olimex-stm32-h407/nsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -200,6 +200,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -427,6 +428,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -445,9 +452,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -533,6 +548,7 @@ CONFIG_RAM_SIZE=114688
 # Board Selection
 #
 CONFIG_ARCH_BOARD_OLIMEX_STM32H407=y
+# CONFIG_ARCH_BOARD_OLIMEX_STM32E407 is not set
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="olimex-stm32-h407"
 
@@ -545,11 +561,11 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -565,9 +581,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2016
 CONFIG_START_MONTH=1
@@ -660,6 +679,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -679,9 +699,13 @@ CONFIG_SPI=y
 # CONFIG_SPI_EXCHANGE is not set
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -695,8 +719,18 @@ CONFIG_SPI=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -704,6 +738,7 @@ CONFIG_SPI=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -712,9 +747,10 @@ CONFIG_SPI=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -760,19 +796,25 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -818,12 +860,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -888,7 +924,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -897,8 +932,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -932,7 +969,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_BUTTONS is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -940,10 +976,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -953,34 +989,33 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1004,8 +1039,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1070,7 +1105,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1092,6 +1126,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1130,12 +1165,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1143,6 +1178,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-stm32-h407/scripts/ld.script b/configs/olimex-stm32-h407/scripts/ld.script
index 8cb28bca0723233abe88257e020dcc7c3da5a207..a476753cf2974baf258f42eab59d1fea517aec36 100644
--- a/configs/olimex-stm32-h407/scripts/ld.script
+++ b/configs/olimex-stm32-h407/scripts/ld.script
@@ -1,5 +1,5 @@
 /****************************************************************************
- * configs/olimex-stm32-h405/scripts/ld.script
+ * configs/olimex-stm32-h407/scripts/ld.script
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/configs/olimex-stm32-h407/src/olimex-stm32-h407.h b/configs/olimex-stm32-h407/src/olimex-stm32-h407.h
index 766ddb9c7b536a764380209890f207b16123fa67..c2df0a8678466571c14c7a51b26ae501138d8b03 100644
--- a/configs/olimex-stm32-h407/src/olimex-stm32-h407.h
+++ b/configs/olimex-stm32-h407/src/olimex-stm32-h407.h
@@ -78,7 +78,7 @@
 
 /* Check if we should enable the USB monitor before starting NSH */
 
-#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_SYSTEM_USBMONITOR)
+#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_USBMONITOR)
 #  undef HAVE_USBMONITOR
 #endif
 
@@ -254,28 +254,28 @@ int stm32_sdio_initialize(void);
 void weak_function stm32_usbinitialize(void);
 #endif
 
-/****************************************************************************
- * Name: stm32_adc_initialize
+/************************************************************************************
+ * Name: stm32_adc_setup
  *
  * Description:
- *   Called at application startup time to initialize the ADC functionality.
+ *   Initialize ADC and register the ADC driver.
  *
- ****************************************************************************/
+ ************************************************************************************/
 
 #ifdef CONFIG_ADC
-int stm32_adc_initialize(void);
+int stm32_adc_setup(void);
 #endif
 
 /****************************************************************************
- * Name: stm32_can_initialize
+ * Name: stm32_can_setup
  *
  * Description:
- *   Called at application startup time to initialize the CAN functionality.
+ *  Initialize CAN and register the CAN device
  *
  ****************************************************************************/
 
-#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2))
-int stm32_can_initialize(void);
+#ifdef CONFIG_CAN
+int stm32_can_setup(void);
 #endif
 
 #endif  /* __ASSEMBLY__ */
diff --git a/configs/olimex-stm32-h407/src/stm32_adc.c b/configs/olimex-stm32-h407/src/stm32_adc.c
index a7f3e6aa32380c6e4461e1f9444fdca5b746389c..9282080a6bfa11e1002437d2f13055e7e09ed930 100644
--- a/configs/olimex-stm32-h407/src/stm32_adc.c
+++ b/configs/olimex-stm32-h407/src/stm32_adc.c
@@ -105,37 +105,19 @@ static const uint8_t  g_chanlist[ADC1_NCHANNELS] = {1};
 static const uint32_t g_pinlist[ADC1_NCHANNELS]  = {GPIO_ADC1_IN1};
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_adc_setup
- *
- * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/adc.
- *
- ************************************************************************************/
-
-int board_adc_setup(void)
-{
-  return stm32_adc_initialize();
-}
-
-/************************************************************************************
- * Name: stm32_adc_initialize
+ * Name: stm32_adc_setup
  *
  * Description:
- *   Called at application startup time to initialize the ADC functionality.
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
-int stm32_adc_initialize(void)
+int stm32_adc_setup(void)
 {
 #ifdef CONFIG_STM32_ADC1
   static bool initialized = false;
@@ -159,7 +141,7 @@ int stm32_adc_initialize(void)
       adc = stm32_adcinitialize(1, g_chanlist, ADC1_NCHANNELS);
       if (adc == NULL)
         {
-          adbg("ERROR: Failed to get ADC interface\n");
+          aerr("ERROR: Failed to get ADC interface\n");
           return -ENODEV;
         }
 
@@ -168,7 +150,7 @@ int stm32_adc_initialize(void)
       ret = adc_register("/dev/adc0", adc);
       if (ret < 0)
         {
-          adbg("adc_register failed: %d\n", ret);
+          aerr("ERROR: adc_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/olimex-stm32-h407/src/stm32_appinit.c b/configs/olimex-stm32-h407/src/stm32_appinit.c
index 6f0cd2dd64af7478ccd3174802b1ec192a3aa875..f461c2f193312b51d8af7104b69d30cccc229545 100644
--- a/configs/olimex-stm32-h407/src/stm32_appinit.c
+++ b/configs/olimex-stm32-h407/src/stm32_appinit.c
@@ -46,8 +46,8 @@
 
 #include 
 
-#ifdef CONFIG_SYSTEM_USBMONITOR
-#  include 
+#ifdef CONFIG_USBMONITOR
+#  include 
 #endif
 
 #ifdef CONFIG_STM32_OTGFS
@@ -59,10 +59,6 @@
 
 #ifdef CONFIG_LIB_BOARDCTL
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/olimex-stm32-h407/src/stm32_autoleds.c b/configs/olimex-stm32-h407/src/stm32_autoleds.c
index 01bc2b5dae9e9045ae81d98443c90e9d9e15899f..b883e393df98bfaf2930f5b38cf5ccb103476523 100644
--- a/configs/olimex-stm32-h407/src/stm32_autoleds.c
+++ b/configs/olimex-stm32-h407/src/stm32_autoleds.c
@@ -54,22 +54,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/olimex-stm32-h407/src/stm32_bringup.c b/configs/olimex-stm32-h407/src/stm32_bringup.c
index 9c683a1158cd137bc480744ff72e88ee4c84d572..621e6c1cca63b9a6fa6db2f87c0082b0d3f5d828 100644
--- a/configs/olimex-stm32-h407/src/stm32_bringup.c
+++ b/configs/olimex-stm32-h407/src/stm32_bringup.c
@@ -46,8 +46,8 @@
 
 #include 
 
-#ifdef CONFIG_SYSTEM_USBMONITOR
-#  include 
+#ifdef CONFIG_USBMONITOR
+#  include 
 #endif
 
 #ifdef CONFIG_STM32_OTGFS
@@ -94,32 +94,25 @@ int stm32_bringup(void)
 #ifdef HAVE_RTC_DRIVER
   FAR struct rtc_lowerhalf_s *lower;
 #endif
-#if defined(CONFIG_CAN) || defined(CONFIG_ADC) || defined(HAVE_SDIO) || \
-    defined(HAVE_RTC_DRIVER)
   int ret;
-#endif
 
 #ifdef CONFIG_CAN
-  /* Configure on-board CAN if CAN support has been selected. */
+  /* Initialize CAN and register the CAN driver. */
 
-  ret = stm32_can_initialize();
-  if (ret != OK)
+  ret = stm32_can_setup();
+  if (ret < 0)
     {
-      syslog(LOG_ERR,
-             "ERROR: Failed to initialize CAN: %d\n",
-             ret);
+      syslog(LOG_ERR, "ERROR: stm32_can_setup failed: %d\n", ret);
     }
 #endif
 
 #ifdef CONFIG_ADC
-  /* Configure on-board ADCs if ADC support has been selected. */
+  /* Initialize ADC and register the ADC driver. */
 
-  ret = stm32_adc_initialize();
-  if (ret != OK)
+  ret = stm32_adc_setup();
+  if (ret < 0)
     {
-      syslog(LOG_ERR,
-             "ERROR: Failed to initialize ADC: %d\n",
-             ret);
+      syslog(LOG_ERR, "ERROR: stm32_adc_setup failed: %d\n", ret);
     }
 #endif
 
@@ -152,7 +145,7 @@ int stm32_bringup(void)
 #ifdef HAVE_USBMONITOR
   /* Start the USB Monitor */
 
-  ret = usbmonitor_start(0, NULL);
+  ret = usbmonitor_start();
   if (ret != OK)
     {
       syslog(LOG_ERR,
@@ -186,5 +179,6 @@ int stm32_bringup(void)
     }
 #endif
 
+  UNUSED(ret);
   return OK;
 }
diff --git a/configs/olimex-stm32-h407/src/stm32_buttons.c b/configs/olimex-stm32-h407/src/stm32_buttons.c
index 24bcc1ee34ca04e956d77efde3afa669988a7999..ed33810dd47e711002872bf38e3642d1b4b835e2 100644
--- a/configs/olimex-stm32-h407/src/stm32_buttons.c
+++ b/configs/olimex-stm32-h407/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/olimex-stm32-h407/src/stm32_buttons.c
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -50,7 +51,7 @@
 #ifdef CONFIG_ARCH_BUTTONS
 
 /****************************************************************************
- * Private Functions
+ * Private Data
  ****************************************************************************/
 
 /* Pin configuration for each Olimex-STM32-H405 button.  This array is indexed by
@@ -70,10 +71,10 @@ static const uint32_t g_buttons[NUM_BUTTONS] =
  * Name: board_button_initialize
  *
  * Description:
- *   board_button_initialize() must be called to initialize button resources.  After
- *   that, board_buttons() may be called to collect the current state of all
- *   buttons or board_button_irq() may be called to register button interrupt
- *   handlers.
+ *   board_button_initialize() must be called to initialize button resources.
+ *   After that, board_buttons() may be called to collect the current state
+ *   of all buttons or board_button_irq() may be called to register button
+ *   interrupt handlers.
  *
  ****************************************************************************/
 
@@ -109,42 +110,42 @@ uint8_t board_buttons(void)
   return ret;
 }
 
-/************************************************************************************
+/****************************************************************************
  * Button support.
  *
  * Description:
- *   board_button_initialize() must be called to initialize button resources.  After
- *   that, board_buttons() may be called to collect the current state of all
- *   buttons or board_button_irq() may be called to register button interrupt
- *   handlers.
+ *   board_button_initialize() must be called to initialize button resources.
+ *   After that, board_buttons() may be called to collect the current state
+ *   of all buttons or board_button_irq() may be called to register button
+ *   interrupt handlers.
  *
- *   After board_button_initialize() has been called, board_buttons() may be called to
- *   collect the state of all buttons.  board_buttons() returns an 8-bit bit set
- *   with each bit associated with a button.  See the BUTTON_*_BIT
+ *   After board_button_initialize() has been called, board_buttons() may be
+ *   called to collect the state of all buttons.  board_buttons() returns an
+ *   8-bit bit set with each bit associated with a button.  See the BUTTON_*_BIT
  *   definitions in board.h for the meaning of each bit.
  *
- *   board_button_irq() may be called to register an interrupt handler that will
- *   be called when a button is depressed or released.  The ID value is a
- *   button enumeration value that uniquely identifies a button resource. See the
- *   BUTTON_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   board_button_irq() may be called to register an interrupt handler that
+ *   will be called when a button is depressed or released.  The ID value is
+ *   a button enumeration value that uniquely identifies a button resource.
+ *   See the BUTTON_* definitions in board.h for the meaning of enumeration
+ *   value.
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   /* The following should be atomic */
 
   if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
     {
-      oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler,
+                               arg);
     }
 
-  return oldhandler;
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/olimex-stm32-h407/src/stm32_can.c b/configs/olimex-stm32-h407/src/stm32_can.c
index 521c4445110143ccc4cc3817d890c7d412c90bb9..b482342e61789e3ef202aff706d23e6f148b7306 100644
--- a/configs/olimex-stm32-h407/src/stm32_can.c
+++ b/configs/olimex-stm32-h407/src/stm32_can.c
@@ -41,13 +41,15 @@
 
 #include 
 #include 
-#include 
+
+#include 
 #include 
+
 #include "stm32.h"
 #include "stm32_can.h"
 #include "olimex-stm32-h407.h"
 
-#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2))
+#ifdef CONFIG_CAN
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -65,81 +67,46 @@
 #  define CAN_PORT 2
 #endif
 
-/* Debug ***************************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
-
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
-#else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
-#endif
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_can_initialize
+ * Name: stm32_can_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/can.
+ *  Initialize CAN and register the CAN device
  *
  ************************************************************************************/
 
-int board_can_initialize(void)
-{
-  return stm32_can_initialize();
-}
-
-/****************************************************************************************************
- * Name: stm32_can_initialize
- *
- * Description:
- *   Called at application startup time to initialize the CAN functionality.
- *
- ****************************************************************************************************/
-
-int stm32_can_initialize(void)
+int stm32_can_setup(void)
 {
-  static bool initialized = false;
+#if defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)
   struct can_dev_s *can;
   int ret;
 
-  /* Check if we have already initialized */
+  /* Call stm32_caninitialize() to get an instance of the CAN interface */
 
-  if (!initialized)
+  can = stm32_caninitialize(CAN_PORT);
+  if (can == NULL)
     {
-      /* Call stm32_caninitialize() to get an instance of the CAN interface */
-
-      can = stm32_caninitialize(CAN_PORT);
-      if (can == NULL)
-        {
-          candbg("ERROR:  Failed to get CAN interface\n");
-          return -ENODEV;
-        }
-
-      /* Register the CAN driver at "/dev/can0" */
-
-      ret = can_register("/dev/can0", can);
-      if (ret < 0)
-        {
-          candbg("ERROR: can_register failed: %d\n", ret);
-          return ret;
-        }
+      canerr("ERROR:  Failed to get CAN interface\n");
+      return -ENODEV;
+    }
 
-      /* Now we are initialized */
+  /* Register the CAN driver at "/dev/can0" */
 
-      initialized = true;
+  ret = can_register("/dev/can0", can);
+  if (ret < 0)
+    {
+      canerr("ERROR: can_register failed: %d\n", ret);
+      return ret;
     }
 
   return OK;
+#else
+  return -ENODEV;
+#endif
 }
 
-#endif /* CONFIG_CAN && (CONFIG_STM32_CAN1 || CONFIG_STM32_CAN2) */
+#endif /* CONFIG_CAN  */
diff --git a/configs/olimex-stm32-h407/src/stm32_sdio.c b/configs/olimex-stm32-h407/src/stm32_sdio.c
index 919c503252fcfb1c6b5b523da09559813ffc647e..5745ba5bd820f3a559c9ea0e22892d847c74c95e 100644
--- a/configs/olimex-stm32-h407/src/stm32_sdio.c
+++ b/configs/olimex-stm32-h407/src/stm32_sdio.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * config/olimex-stm32_h407/src/stm32_sdio.c
  *
- *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -128,39 +128,40 @@ int stm32_sdio_initialize(void)
 
   /* Register an interrupt handler for the card detect pin */
 
-  stm32_gpiosetevent(GPIO_SDIO_NCD, true, true, true, stm32_ncd_interrupt);
+  (void)stm32_gpiosetevent(GPIO_SDIO_NCD, true, true, true,
+                           stm32_ncd_interrupt, NULL);
 #endif
 
   /* Mount the SDIO-based MMC/SD block driver */
   /* First, get an instance of the SDIO interface */
 
-  fvdbg("Initializing SDIO slot %d\n", SDIO_SLOTNO);
+  finfo("Initializing SDIO slot %d\n", SDIO_SLOTNO);
 
   g_sdio_dev = sdio_initialize(SDIO_SLOTNO);
   if (!g_sdio_dev)
     {
-      fdbg("Failed to initialize SDIO slot %d\n", SDIO_SLOTNO);
+      ferr("ERROR: Failed to initialize SDIO slot %d\n", SDIO_SLOTNO);
       return -ENODEV;
     }
 
   /* Now bind the SDIO interface to the MMC/SD driver */
 
-  fvdbg("Bind SDIO to the MMC/SD driver, minor=%d\n", SDIO_MINOR);
+  finfo("Bind SDIO to the MMC/SD driver, minor=%d\n", SDIO_MINOR);
 
   ret = mmcsd_slotinitialize(SDIO_MINOR, g_sdio_dev);
   if (ret != OK)
     {
-      fdbg("Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
+      ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
       return ret;
     }
 
-  fvdbg("Successfully bound SDIO to the MMC/SD driver\n");
+  finfo("Successfully bound SDIO to the MMC/SD driver\n");
 
 #ifdef HAVE_NCD
   /* Use SD card detect pin to check if a card is g_sd_inserted */
 
   cd_status = !stm32_gpioread(GPIO_SDIO_NCD);
-  fvdbg("Card detect : %d\n", cd_status);
+  finfo("Card detect : %d\n", cd_status);
 
   sdio_mediachange(g_sdio_dev, cd_status);
 #else
diff --git a/configs/olimex-stm32-h407/src/stm32_usb.c b/configs/olimex-stm32-h407/src/stm32_usb.c
index 22b246af381db0ea5bc08c0976686120b4287f0f..a5148f1e578a441b706ecd2230f0e639a244f197 100644
--- a/configs/olimex-stm32-h407/src/stm32_usb.c
+++ b/configs/olimex-stm32-h407/src/stm32_usb.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/olimex-stm32-h407/src/stm32_usbdev.c
  *
- *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -103,13 +103,13 @@ static int usbhost_waiter(int argc, char *argv[])
 {
   struct usbhost_hubport_s *hport;
 
-  uvdbg("Running\n");
+  uinfo("Running\n");
   for (;;)
     {
       /* Wait for the device to change state */
 
       DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
-      uvdbg("%s\n", hport->connected ? "connected" : "disconnected");
+      uinfo("%s\n", hport->connected ? "connected" : "disconnected");
 
       /* Did we just become connected? */
 
@@ -173,7 +173,7 @@ int stm32_usbhost_initialize(void)
    * that we care about:
    */
 
-  uvdbg("Register class drivers\n");
+  uinfo("Register class drivers\n");
 
 #ifdef CONFIG_USBHOST_HUB
   /* Initialize USB hub class support */
@@ -181,7 +181,7 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_hub_initialize();
   if (ret < 0)
     {
-      udbg("ERROR: usbhost_hub_initialize failed: %d\n", ret);
+      uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
     }
 #endif
 
@@ -191,7 +191,7 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_msc_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the mass storage class: %d\n", ret);
+      uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
     }
 #endif
 
@@ -201,19 +201,19 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_cdcacm_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
+      uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
     }
 #endif
 
   /* Then get an instance of the USB host interface */
 
-  uvdbg("Initialize USB host\n");
+  uinfo("Initialize USB host\n");
   g_usbconn = stm32_otghshost_initialize(0);
   if (g_usbconn)
     {
       /* Start a thread to handle device connection. */
 
-      uvdbg("Start usbhost_waiter\n");
+      uinfo("Start usbhost_waiter\n");
 
       pid = task_create("usbhost", CONFIG_STM32H407_USBHOST_PRIO,
                         CONFIG_STM32H407_USBHOST_STACKSIZE,
@@ -280,16 +280,18 @@ void stm32_usbhost_vbusdrive(int iface, bool enable)
  *
  * Input Parameters:
  *   handler - New overcurrent interrupt handler
+ *   arg     - The argument provided for the interrupt handler
  *
- * Returned Value:
- *   Old overcurrent interrupt handler
+ * Returned value:
+ *   Zero (OK) is returned on success.  Otherwise, a negated errno value is returned
+ *   to indicate the nature of the failure.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_USBHOST
-xcpt_t stm32_setup_overcurrent(xcpt_t handler)
+int stm32_setup_overcurrent(xcpt_t handler, void *arg)
 {
-  return stm32_gpiosetevent(GPIO_OTGHS_OVER, true, true, true, handler);
+  return stm32_gpiosetevent(GPIO_OTGHS_OVER, true, true, true, handler, arg);
 }
 #endif
 
@@ -307,7 +309,7 @@ xcpt_t stm32_setup_overcurrent(xcpt_t handler)
 #ifdef CONFIG_USBDEV
 void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
 #endif
 
diff --git a/configs/olimex-stm32-h407/src/stm32_userleds.c b/configs/olimex-stm32-h407/src/stm32_userleds.c
index 44d85989e6765f55a8dbe2a906c06763454fb59f..ef430a3d868d8e691de37d3332b5d5eb99764e99 100644
--- a/configs/olimex-stm32-h407/src/stm32_userleds.c
+++ b/configs/olimex-stm32-h407/src/stm32_userleds.c
@@ -53,22 +53,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
diff --git a/configs/olimex-stm32-p107/include/board.h b/configs/olimex-stm32-p107/include/board.h
index e82a41cb1ca797b96cd45aa8e622d92437098328..c6d0aa873b77c31587c8defd53b80f913440e0bc 100644
--- a/configs/olimex-stm32-p107/include/board.h
+++ b/configs/olimex-stm32-p107/include/board.h
@@ -98,14 +98,14 @@
 #define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd2
 #define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
 
-/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */
+/* APB1 timers 2-7 will be twice PCLK1 */
 
 #define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM5_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM6_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM7_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 
 /* MCO output driven by PLL3. From above, we already have PLL3 input frequency as:
  *
diff --git a/configs/olimex-stm32-p107/nsh/Make.defs b/configs/olimex-stm32-p107/nsh/Make.defs
index 97e3247137a2c1d3635d276b4d5e08ec956639ae..b8706f2f514e9eb583a500ba29f172cc7f0b4e8d 100644
--- a/configs/olimex-stm32-p107/nsh/Make.defs
+++ b/configs/olimex-stm32-p107/nsh/Make.defs
@@ -90,7 +90,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimex-stm32-p107/nsh/defconfig b/configs/olimex-stm32-p107/nsh/defconfig
index 6f02ee2d93d3a38c96d2e2ee39cf61a3a99bf00c..478695765636347ba8e4a866e66f2f1779ecdee9 100644
--- a/configs/olimex-stm32-p107/nsh/defconfig
+++ b/configs/olimex-stm32-p107/nsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -201,6 +204,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 CONFIG_ARCH_CHIP_STM32F107VC=y
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -331,7 +335,7 @@ CONFIG_STM32_HAVE_TIM4=y
 CONFIG_STM32_HAVE_TIM5=y
 CONFIG_STM32_HAVE_TIM6=y
 CONFIG_STM32_HAVE_TIM7=y
-CONFIG_STM32_HAVE_TIM8=y
+# CONFIG_STM32_HAVE_TIM8 is not set
 # CONFIG_STM32_HAVE_TIM9 is not set
 # CONFIG_STM32_HAVE_TIM10 is not set
 # CONFIG_STM32_HAVE_TIM11 is not set
@@ -348,6 +352,12 @@ CONFIG_STM32_HAVE_ADC2=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -380,6 +390,7 @@ CONFIG_STM32_PWR=y
 # CONFIG_STM32_SPI1 is not set
 # CONFIG_STM32_SPI2 is not set
 # CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SYSCFG=y
 # CONFIG_STM32_TIM1 is not set
 # CONFIG_STM32_TIM2 is not set
 # CONFIG_STM32_TIM3 is not set
@@ -387,7 +398,6 @@ CONFIG_STM32_PWR=y
 # CONFIG_STM32_TIM5 is not set
 # CONFIG_STM32_TIM6 is not set
 # CONFIG_STM32_TIM7 is not set
-# CONFIG_STM32_TIM8 is not set
 # CONFIG_STM32_USART1 is not set
 CONFIG_STM32_USART2=y
 # CONFIG_STM32_USART3 is not set
@@ -409,20 +419,33 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
 # CONFIG_STM32_TIM5_CAP is not set
-# CONFIG_STM32_TIM8_CAP is not set
 CONFIG_STM32_USART=y
 CONFIG_STM32_SERIALDRIVER=y
 
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -447,6 +470,7 @@ CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 CONFIG_STM32_RMII=y
 CONFIG_STM32_RMII_MCO=y
 # CONFIG_STM32_RMII_EXTCLK is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -528,6 +552,7 @@ CONFIG_RAM_SIZE=65536
 # CONFIG_ARCH_BOARD_CLOUDCTRL is not set
 CONFIG_ARCH_BOARD_OLIMEX_STM32P107=y
 # CONFIG_ARCH_BOARD_SHENZHOU is not set
+# CONFIG_ARCH_BOARD_STM32_BUTTERFLY2 is not set
 # CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="olimex-stm32-p107"
@@ -535,12 +560,11 @@ CONFIG_ARCH_BOARD="olimex-stm32-p107"
 #
 # Common Board Options
 #
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -556,9 +580,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=9
@@ -656,6 +683,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -670,18 +698,23 @@ CONFIG_CAN=y
 CONFIG_CAN_FIFOSIZE=8
 CONFIG_CAN_NPENDINGRTR=4
 # CONFIG_CAN_TXREADY is not set
+CONFIG_CAN_NPOLLWAITERS=2
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
 # CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -689,14 +722,25 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -726,7 +770,9 @@ CONFIG_MTD=y
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
 # CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
@@ -754,10 +800,9 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -781,9 +826,10 @@ CONFIG_ETH0_PHY_KS8721=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -830,19 +876,26 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -850,13 +903,11 @@ CONFIG_USART2_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=650
 CONFIG_NET_ETH_TCP_RECVWNDO=624
 CONFIG_NET_GUARDSIZE=2
@@ -989,12 +1040,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1044,6 +1089,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1059,7 +1106,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
@@ -1075,8 +1121,10 @@ CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1100,18 +1148,19 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1121,26 +1170,25 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1148,15 +1196,15 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 
 #
@@ -1174,8 +1222,9 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1188,22 +1237,22 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1255,13 +1304,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1279,6 +1328,8 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
@@ -1305,6 +1356,7 @@ CONFIG_NSH_CONSOLE=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1337,13 +1389,13 @@ CONFIG_NSH_MAX_ROUNDTRIP=20
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1352,6 +1404,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-stm32-p107/src/Makefile b/configs/olimex-stm32-p107/src/Makefile
index 9d4acd1697858e20cc01ec763899bb5f7dc37d7a..a68b6db8ba0fc4c60d0f6a066814295d44d48073 100644
--- a/configs/olimex-stm32-p107/src/Makefile
+++ b/configs/olimex-stm32-p107/src/Makefile
@@ -38,6 +38,10 @@
 ASRCS =
 CSRCS = stm32_boot.c stm32_spi.c
 
+ifeq ($(CONFIG_LIB_BOARDCTL),y)
+CSRCS += stm32_appinit.c
+endif
+
 ifeq ($(CONFIG_CAN),y)
 CSRCS += stm32_can.c
 endif
diff --git a/configs/olimex-stm32-p107/src/olimex-stm32-p107.h b/configs/olimex-stm32-p107/src/olimex-stm32-p107.h
index 4b4b2240e909c02c472e8c7cfc64fbc072a9992f..813cc251d82c4c0a1453f26fb36765760374db37 100644
--- a/configs/olimex-stm32-p107/src/olimex-stm32-p107.h
+++ b/configs/olimex-stm32-p107/src/olimex-stm32-p107.h
@@ -32,6 +32,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  *
  ****************************************************************************/
+
 #ifndef __CONFIGS_OLIMEX_STM32_P107_SRC_H
 #define __CONFIGS_OLIMEX_STM32_P107_SRC_H
 
@@ -84,5 +85,17 @@
 
 void weak_function stm32_spidev_initialize(void);
 
+/****************************************************************************
+ * Name: stm32_can_setup
+ *
+ * Description:
+ *  Initialize CAN and register the CAN device
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CAN
+int stm32_can_setup(void);
+#endif
+
 #endif  /* __ASSEMBLY__ */
 #endif /* __CONFIGS_OLIMEX_STM32_P107_SRC_H */
diff --git a/configs/olimex-stm32-p107/src/stm32_appinit.c b/configs/olimex-stm32-p107/src/stm32_appinit.c
new file mode 100644
index 0000000000000000000000000000000000000000..af7736d2ca1ae6eb71050fd809f5e9e23a3a94b9
--- /dev/null
+++ b/configs/olimex-stm32-p107/src/stm32_appinit.c
@@ -0,0 +1,105 @@
+/****************************************************************************
+ * configs/olimex-stm32-p107/src/stm32_appinit.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "stm32.h"
+#include "olimex-stm32-p107.h"
+
+#ifdef CONFIG_LIB_BOARDCTL
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ *   Perform application specific initialization.  This function is never
+ *   called directly from application code, but only indirectly via the
+ *   (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ *   CONFIG_LIB_BOARDCTL=y:
+ *     If CONFIG_NSH_ARCHINITIALIZE=y:
+ *       Called from the NSH library (or other application)
+ *     Otherse, assumed to be called from some other application.
+ *
+ * Input Parameters:
+ *   arg - The boardctl() argument is passed to the board_app_initialize()
+ *         implementation without modification.  The argument has no
+ *         meaning to NuttX; the meaning of the argument is a contract
+ *         between the board-specific initalization logic and the the
+ *         matching application logic.  The value cold be such things as a
+ *         mode enumeration value, a set of DIP switch switch settings, a
+ *         pointer to configuration data read from a file or serial FLASH,
+ *         or whatever you would like to do with it.  Every implementation
+ *         should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+int board_app_initialize(uintptr_t arg)
+{
+  int ret;
+
+#ifdef CONFIG_CAN
+  /* Initialize CAN and register the CAN driver. */
+
+  ret = stm32_can_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_can_setup failed: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
+  return OK;
+}
+
+#endif /* CONFIG_LIB_BOARDCTL */
diff --git a/configs/olimex-stm32-p107/src/stm32_boot.c b/configs/olimex-stm32-p107/src/stm32_boot.c
index c1ae4152a83bb0fa48bd69187af1f537a70fc070..090a45f1c51ba429ad478d8066cce9a5d7950d2c 100644
--- a/configs/olimex-stm32-p107/src/stm32_boot.c
+++ b/configs/olimex-stm32-p107/src/stm32_boot.c
@@ -44,14 +44,6 @@
 #include "up_arch.h"
 #include "olimex-stm32-p107.h"
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -78,5 +70,4 @@ void stm32_boardinitialize(void)
       stm32_spidev_initialize();
     }
 #endif
-
 }
diff --git a/configs/olimex-stm32-p107/src/stm32_can.c b/configs/olimex-stm32-p107/src/stm32_can.c
index 690417f9f50f9ea187763e6127995ddb8aaa9ce9..9889f836b2201de7fa4a2c2c4611c7d730ee4446 100644
--- a/configs/olimex-stm32-p107/src/stm32_can.c
+++ b/configs/olimex-stm32-p107/src/stm32_can.c
@@ -42,7 +42,7 @@
 #include 
 #include 
 
-#include 
+#include 
 #include 
 
 #include "chip.h"
@@ -51,7 +51,7 @@
 #include "stm32.h"
 #include "stm32_can.h"
 
-#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2))
+#ifdef CONFIG_CAN
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -59,74 +59,57 @@
 /* Configuration ********************************************************************/
 /* The STM32F107VC supports CAN1 and CAN2 */
 
-#define CAN_PORT 1
-
-/* Debug ***************************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
+#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2)
+#  warning "Both CAN1 and CAN2 are enabled.  Only CAN1 is used."
+#  undef CONFIG_STM32_CAN2
+#endif
 
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
+#ifdef CONFIG_STM32_CAN1
+#  define CAN_PORT 1
 #else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
+#  define CAN_PORT 2
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
-/************************************************************************************
- * Name: board_can_initialize
+/****************************************************************************
+ * Name: stm32_can_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/can.
+ *  Initialize CAN and register the CAN device
  *
- ************************************************************************************/
+ ****************************************************************************/
 
-int board_can_initialize(void)
+int stm32_can_setup(void)
 {
-  static bool initialized = false;
+#if defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)
   struct can_dev_s *can;
   int ret;
 
-  /* Check if we have already initialized */
+  /* Call stm32_caninitialize() to get an instance of the CAN interface */
 
-  if (!initialized)
+  can = stm32_caninitialize(CAN_PORT);
+  if (can == NULL)
     {
-      /* Call stm32_caninitialize() to get an instance of the CAN interface */
-
-      can = stm32_caninitialize(CAN_PORT);
-      if (can == NULL)
-        {
-          candbg("ERROR:  Failed to get CAN interface\n");
-          return -ENODEV;
-        }
-
-      /* Register the CAN driver at "/dev/can0" */
-
-      ret = can_register("/dev/can0", can);
-      if (ret < 0)
-        {
-          candbg("ERROR: can_register failed: %d\n", ret);
-          return ret;
-        }
+      canerr("ERROR:  Failed to get CAN interface\n");
+      return -ENODEV;
+    }
 
-      /* Now we are initialized */
+  /* Register the CAN driver at "/dev/can0" */
 
-      initialized = true;
+  ret = can_register("/dev/can0", can);
+  if (ret < 0)
+    {
+      canerr("ERROR: can_register failed: %d\n", ret);
+      return ret;
     }
 
   return OK;
+#else
+  return -ENODEV;
+#endif
 }
 
-#endif /* CONFIG_CAN && CONFIG_STM32_CAN1 */
+#endif /* CONFIG_CAN */
diff --git a/configs/olimex-stm32-p107/src/stm32_encx24j600.c b/configs/olimex-stm32-p107/src/stm32_encx24j600.c
index 9f37781990979401fd00612621bffa059e3e719e..6654c7bd329ce9fe83cec8ea1fa74558966f2af1 100644
--- a/configs/olimex-stm32-p107/src/stm32_encx24j600.c
+++ b/configs/olimex-stm32-p107/src/stm32_encx24j600.c
@@ -151,12 +151,14 @@ static void up_enable(FAR const struct enc_lower_s *lower)
   FAR struct stm32_lower_s *priv = (FAR struct stm32_lower_s *)lower;
 
   DEBUGASSERT(priv->handler);
-  (void)stm32_gpiosetevent(GPIO_ENCX24J600_INTR, false, true, true, priv->handler);
+  (void)stm32_gpiosetevent(GPIO_ENCX24J600_INTR, false, true, true,
+                           priv->handler, NULL);
 }
 
 static void up_disable(FAR const struct enc_lower_s *lower)
 {
-  (void)stm32_gpiosetevent(GPIO_ENCX24J600_INTR, false, true, true, NULL);
+  (void)stm32_gpiosetevent(GPIO_ENCX24J600_INTR, false, true, true,
+                           NULL, NULL);
 }
 
 /****************************************************************************
@@ -180,7 +182,7 @@ void up_netinitialize(void)
   spi = stm32_spibus_initialize(ENCX24J600_SPI_PORTNO);
   if (!spi)
     {
-      nlldbg("Failed to initialize SPI port %d\n", ENCX24J600_SPI_PORTNO);
+      nerr("ERROR: Failed to initialize SPI port %d\n", ENCX24J600_SPI_PORTNO);
       return;
     }
 
@@ -190,13 +192,13 @@ void up_netinitialize(void)
 
   if (ret < 0)
     {
-      nlldbg("Failed to bind SPI port %d ENCX24J600 device %d: %d\n",
-             ENCX24J600_SPI_PORTNO, ENCX24J600_DEVNO, ret);
+      nerr("ERROR: Failed to bind SPI port %d ENCX24J600 device %d: %d\n",
+           ENCX24J600_SPI_PORTNO, ENCX24J600_DEVNO, ret);
       return;
     }
 
-  nllvdbg("Bound SPI port %d to ENCX24J600 device %d\n",
-          ENCX24J600_SPI_PORTNO, ENCX24J600_DEVNO);
+  ninfo("Bound SPI port %d to ENCX24J600 device %d\n",
+        ENCX24J600_SPI_PORTNO, ENCX24J600_DEVNO);
 }
 
 #endif /* CONFIG_ENCX24J600 */
diff --git a/configs/olimex-stm32-p107/src/stm32_spi.c b/configs/olimex-stm32-p107/src/stm32_spi.c
index 8fea7b1ac9a0d4df45ee3fa59540c7953b8167f3..9a454cfcfa66a167bb0f80c1958672395b915487 100644
--- a/configs/olimex-stm32-p107/src/stm32_spi.c
+++ b/configs/olimex-stm32-p107/src/stm32_spi.c
@@ -54,32 +54,6 @@
 
 #if defined(CONFIG_STM32_SPI3)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -136,7 +110,7 @@ void weak_function stm32_spidev_initialize(void)
 #ifdef CONFIG_STM32_SPI3
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
   if (devid == SPIDEV_ETHERNET)
     {
diff --git a/configs/olimex-stm32-p207/include/board.h b/configs/olimex-stm32-p207/include/board.h
index c00053690543b1a71e286ea2ae566132387bd8f9..62cb143755305a3e06517491b40aea38bde2fedf 100644
--- a/configs/olimex-stm32-p207/include/board.h
+++ b/configs/olimex-stm32-p207/include/board.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/olimex-stm32-p207/include/board.h
  *
- *   Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -129,8 +129,14 @@
  * Note: TIM1,8 are on APB2, others on APB1
  */
 
-#define STM32_TIM18_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_TIM27_FREQUENCY   STM32_HCLK_FREQUENCY
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM3_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM4_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM5_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM6_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM7_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM8_FREQUENCY    STM32_HCLK_FREQUENCY
 
 /* LED definitions ******************************************************************/
 /* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any
diff --git a/configs/olimex-stm32-p207/nsh/Make.defs b/configs/olimex-stm32-p207/nsh/Make.defs
index 833e3f52a392fb90a912e388efa4d3ce36a93d6a..7006c8e7626a0db88f88c1613a4d88c9487312b1 100644
--- a/configs/olimex-stm32-p207/nsh/Make.defs
+++ b/configs/olimex-stm32-p207/nsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimex-stm32-p207/nsh/defconfig b/configs/olimex-stm32-p207/nsh/defconfig
index cd9c9a3aebcbf2dc14ed0cc0808fcda302755ba9..92b7250cde937e8b6781846390b78f4c5b788c4c 100644
--- a/configs/olimex-stm32-p207/nsh/defconfig
+++ b/configs/olimex-stm32-p207/nsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 CONFIG_DEBUG_NOOPT=y
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -208,6 +211,7 @@ CONFIG_CAN_TSEG2=8
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -355,6 +359,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -435,6 +445,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_PWM is not set
 CONFIG_STM32_TIM1_ADC=y
 CONFIG_STM32_TIM1_ADC1=y
@@ -462,9 +478,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART3_SERIALDRIVER=y
 # CONFIG_STM32_USART3_1WIREDRIVER is not set
 # CONFIG_USART3_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -491,6 +515,7 @@ CONFIG_STM32_RMII=y
 # CONFIG_STM32_RMII_MCO1 is not set
 # CONFIG_STM32_RMII_MCO2 is not set
 CONFIG_STM32_RMII_EXTCLK=y
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -508,8 +533,6 @@ CONFIG_STM32_OTGFS_DESCSIZE=128
 #
 # USB Host Debug Configuration
 #
-# CONFIG_STM32_USBHOST_REGDEBUG is not set
-# CONFIG_STM32_USBHOST_PKTDUMP is not set
 
 #
 # USB Device Configuration
@@ -593,18 +616,15 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-CONFIG_BOARDCTL_ADCTEST=y
-# CONFIG_BOARDCTL_PWMTEST is not set
-# CONFIG_BOARDCTL_CANINIT is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -621,9 +641,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=1
@@ -722,6 +745,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -742,12 +766,16 @@ CONFIG_CAN_NPENDINGRTR=4
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_ANALOG=y
@@ -762,8 +790,18 @@ CONFIG_ADC_FIFOSIZE=8
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -771,6 +809,7 @@ CONFIG_ADC_FIFOSIZE=8
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -792,10 +831,9 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -819,9 +857,10 @@ CONFIG_ETH0_PHY_KS8721=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -867,29 +906,37 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USART3_IFLOWCONTROL is not set
 # CONFIG_USART3_OFLOWCONTROL is not set
 # CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 CONFIG_USBHOST=y
 CONFIG_USBHOST_NPREALLOC=4
 CONFIG_USBHOST_HAVE_ASYNCH=y
 # CONFIG_USBHOST_ASYNCH is not set
 # CONFIG_USBHOST_HUB is not set
+# CONFIG_USBHOST_COMPOSITE is not set
 # CONFIG_USBHOST_MSC is not set
 # CONFIG_USBHOST_CDCACM is not set
 # CONFIG_USBHOST_HIDKBD is not set
 # CONFIG_USBHOST_HIDMOUSE is not set
 # CONFIG_USBHOST_RTL8187 is not set
 # CONFIG_USBHOST_TRACE is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -897,13 +944,11 @@ CONFIG_USBHOST_HAVE_ASYNCH=y
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -1036,12 +1081,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1091,6 +1130,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1106,7 +1147,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
@@ -1122,8 +1162,10 @@ CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1150,6 +1192,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # CAN Utilities
 #
+# CONFIG_CANUTILS_CANLIB is not set
 
 #
 # Examples
@@ -1158,34 +1201,23 @@ CONFIG_EXAMPLES_ADC=y
 CONFIG_EXAMPLES_ADC_DEVPATH="/dev/adc0"
 CONFIG_EXAMPLES_ADC_GROUPSIZE=1
 # CONFIG_EXAMPLES_ADC_SWTRIG is not set
-CONFIG_EXAMPLES_BUTTONS=y
-CONFIG_EXAMPLES_BUTTONS_MIN=0
-CONFIG_EXAMPLES_BUTTONS_MAX=6
-CONFIG_EXAMPLES_IRQBUTTONS_MIN=0
-CONFIG_EXAMPLES_IRQBUTTONS_MAX=7
-CONFIG_EXAMPLES_BUTTONS_NAME0="Button 0"
-CONFIG_EXAMPLES_BUTTONS_NAME1="Button 1"
-CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2"
-CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3"
-CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4"
-CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5"
-CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6"
-CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
+# CONFIG_EXAMPLES_BUTTONS is not set
 # CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1196,26 +1228,25 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1223,11 +1254,10 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1249,8 +1279,9 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1262,19 +1293,19 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
 # CONFIG_NETUTILS_TFTPC is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1326,13 +1357,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 CONFIG_NSH_DISABLE_PUT=y
@@ -1350,6 +1381,7 @@ CONFIG_NSH_DISABLE_PUT=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 CONFIG_NSH_DISABLE_WGET=y
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1376,6 +1408,7 @@ CONFIG_NSH_CONSOLE=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1408,12 +1441,12 @@ CONFIG_NSH_MAX_ROUNDTRIP=20
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1422,6 +1455,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-stm32-p207/src/olimex-stm32-p207.h b/configs/olimex-stm32-p207/src/olimex-stm32-p207.h
index 21f0d8ecfdd4eb45df0b08a9b5bc75c70fc935e3..04d7c558a3963001ba4c1409b7fc8abc8c9d6801 100644
--- a/configs/olimex-stm32-p207/src/olimex-stm32-p207.h
+++ b/configs/olimex-stm32-p207/src/olimex-stm32-p207.h
@@ -125,27 +125,27 @@ int stm32_usbhost_initialize(void);
 #endif
 
 /************************************************************************************
- * Name: stm32_adc_initialize
+ * Name: stm32_adc_setup
  *
  * Description:
- *   Called at application startup time to initialize the ADC functionality.
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ADC
-int stm32_adc_initialize(void);
+int stm32_adc_setup(void);
 #endif
 
-/************************************************************************************
- * Name: stm32_can_initialize
+/****************************************************************************
+ * Name: stm32_can_setup
  *
  * Description:
- *   Called at application startup time to initialize the CAN functionality.
+ *  Initialize CAN and register the CAN device
  *
- ************************************************************************************/
+ ****************************************************************************/
 
-#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2))
-int stm32_can_initialize(void);
+#ifdef CONFIG_CAN
+int stm32_can_setup(void);
 #endif
 
 #endif  /* __ASSEMBLY__ */
diff --git a/configs/olimex-stm32-p207/src/stm32_adc.c b/configs/olimex-stm32-p207/src/stm32_adc.c
index 96fc837b9718e97deda2f8d9342bbf1bd186bbe6..ef7858ccbbe3cb3d88f97d92b13940a9ae5b5659 100644
--- a/configs/olimex-stm32-p207/src/stm32_adc.c
+++ b/configs/olimex-stm32-p207/src/stm32_adc.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/olimex-stm32-p207/src/stm32_adc.c
  *
- *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -97,37 +97,19 @@ static const uint8_t  g_chanlist[ADC1_NCHANNELS] = {10};
 static const uint32_t g_pinlist[ADC1_NCHANNELS]  = {GPIO_ADC1_IN10};
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_adc_setup
- *
- * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/adc.
- *
- ************************************************************************************/
-
-int board_adc_setup(void)
-{
-  return stm32_adc_initialize();
-}
-
-/************************************************************************************
- * Name: stm32_adc_initialize
+ * Name: stm32_adc_setup
  *
  * Description:
- *   Called at application startup time to initialize the ADC functionality.
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
-int stm32_adc_initialize(void)
+int stm32_adc_setup(void)
 {
 #ifdef CONFIG_STM32_ADC1
   static bool initialized = false;
@@ -151,7 +133,7 @@ int stm32_adc_initialize(void)
       adc = stm32_adcinitialize(1, g_chanlist, ADC1_NCHANNELS);
       if (adc == NULL)
         {
-          adbg("ERROR: Failed to get ADC interface\n");
+          aerr("ERROR: Failed to get ADC interface\n");
           return -ENODEV;
         }
 
@@ -160,7 +142,7 @@ int stm32_adc_initialize(void)
       ret = adc_register("/dev/adc0", adc);
       if (ret < 0)
         {
-          adbg("adc_register failed: %d\n", ret);
+          aerr("ERROR: adc_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/olimex-stm32-p207/src/stm32_appinit.c b/configs/olimex-stm32-p207/src/stm32_appinit.c
index 695cc0607b4038609a3b9bf5db26eba1bcc558cb..fc22cc5affb294f6184930e2d315921e72550d14 100644
--- a/configs/olimex-stm32-p207/src/stm32_appinit.c
+++ b/configs/olimex-stm32-p207/src/stm32_appinit.c
@@ -46,8 +46,8 @@
 
 #include 
 
-#ifdef CONFIG_SYSTEM_USBMONITOR
-#  include 
+#ifdef CONFIG_USBMONITOR
+#  include 
 #endif
 
 #ifdef CONFIG_STM32_OTGFS
@@ -90,7 +90,7 @@
 
 /* Check if we should enable the USB monitor before starting NSH */
 
-#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_SYSTEM_USBMONITOR)
+#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_USBMONITOR)
 #  undef HAVE_USBMONITOR
 #endif
 
@@ -132,27 +132,25 @@
 
 int board_app_initialize(uintptr_t arg)
 {
-#if defined(HAVE_USBHOST) || defined(HAVE_USBMONITOR) || defined(CONFIG_ADC)
   int ret;
-#endif
 
-#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2))
-  /* Configure on-board CAN if CAN support has been selected. */
+#ifdef CONFIG_CAN
+  /* Initialize CAN and register the CAN driver. */
 
-  ret = stm32_can_initialize();
-  if (ret != OK)
+  ret = stm32_can_setup();
+  if (ret < 0)
     {
-      syslog(LOG_ERR, "ERROR: Failed to initialize CAN: %d\n", ret);
+      syslog(LOG_ERR, "ERROR: stm32_can_setup failed: %d\n", ret);
     }
 #endif
 
 #ifdef CONFIG_ADC
-  /* Configure on-board ADCs if ADC support has been selected. */
+  /* Initialize ADC and register the ADC driver. */
 
-  ret = stm32_adc_initialize();
-  if (ret != OK)
+  ret = stm32_adc_setup();
+  if (ret < 0)
     {
-      syslog(LOG_ERR, "ERROR: Failed to initialize ADC: %d\n", ret);
+      syslog(LOG_ERR, "ERROR: stm32_adc_setup failed: %d\n", ret);
     }
 #endif
 
@@ -172,12 +170,13 @@ int board_app_initialize(uintptr_t arg)
 #ifdef HAVE_USBMONITOR
   /* Start the USB Monitor */
 
-  ret = usbmonitor_start(0, NULL);
+  ret = usbmonitor_start();
   if (ret != OK)
     {
       syslog(LOG_ERR, "ERROR: Failed to start USB monitor: %d\n", ret);
     }
 #endif
 
+  UNUSED(ret);
   return OK;
 }
diff --git a/configs/olimex-stm32-p207/src/stm32_autoleds.c b/configs/olimex-stm32-p207/src/stm32_autoleds.c
index a46bfcc970bae84e7338259de30a373495aaa52f..972eed5a8901f4b745a0ceac8fd6f0c9a5402dc2 100644
--- a/configs/olimex-stm32-p207/src/stm32_autoleds.c
+++ b/configs/olimex-stm32-p207/src/stm32_autoleds.c
@@ -55,18 +55,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* The following definitions map the encoded LED setting to GPIO settings */
 
 #define LED_STARTED_BITS             (BOARD_LED1_BIT)
diff --git a/configs/olimex-stm32-p207/src/stm32_buttons.c b/configs/olimex-stm32-p207/src/stm32_buttons.c
index 5caaeab83515c4b18b03cbfcb793a5b8edc3ce42..0002098298fe30c44409673a0915abe4d9394927 100644
--- a/configs/olimex-stm32-p207/src/stm32_buttons.c
+++ b/configs/olimex-stm32-p207/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/olimex-stm32-p207/src/stm32_buttons.c
  *
- *   Copyright (C) 2011-2012, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -49,18 +50,10 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /* Pin configuration for each STM32F4 Discovery button.  This array is indexed by
  * the BUTTON_* definitions in board.h
  */
@@ -171,24 +164,23 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   /* The following should be atomic */
 
   if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
     {
-      oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler, arg);
     }
 
-  return oldhandler;
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/olimex-stm32-p207/src/stm32_can.c b/configs/olimex-stm32-p207/src/stm32_can.c
index 9728422aeafcc86defa53526f872739743b93704..ab20e9fcb90a785a11fcce5dc240807f46f40861 100644
--- a/configs/olimex-stm32-p207/src/stm32_can.c
+++ b/configs/olimex-stm32-p207/src/stm32_can.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/olimex-stm32-p207/src/stm32_can.c
  *
- *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -41,13 +41,15 @@
 
 #include 
 #include 
-#include 
+
+#include 
 #include 
+
 #include "stm32.h"
 #include "stm32_can.h"
 #include "olimex-stm32-p207.h"
 
-#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2))
+#ifdef CONFIG_CAN
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -65,85 +67,46 @@
 #  define CAN_PORT 2
 #endif
 
-/* Debug ***************************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
-
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
-#else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_can_initialize
+ * Name: stm32_can_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/can.
+ *  Initialize CAN and register the CAN device
  *
  ************************************************************************************/
 
-int board_can_initialize(void)
+int stm32_can_setup(void)
 {
-  return stm32_can_initialize();
-}
-
-/****************************************************************************************************
- * Name: stm32_can_initialize
- *
- * Description:
- *   Called at application startup time to initialize the CAN functionality.
- *
- ****************************************************************************************************/
-
-int stm32_can_initialize(void)
-{
-  static bool initialized = false;
+#if defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)
   struct can_dev_s *can;
   int ret;
 
-  /* Check if we have already initialized */
+  /* Call stm32_caninitialize() to get an instance of the CAN interface */
 
-  if (!initialized)
+  can = stm32_caninitialize(CAN_PORT);
+  if (can == NULL)
     {
-      /* Call stm32_caninitialize() to get an instance of the CAN interface */
-
-      can = stm32_caninitialize(CAN_PORT);
-      if (can == NULL)
-        {
-          candbg("ERROR:  Failed to get CAN interface\n");
-          return -ENODEV;
-        }
-
-      /* Register the CAN driver at "/dev/can0" */
-
-      ret = can_register("/dev/can0", can);
-      if (ret < 0)
-        {
-          candbg("ERROR: can_register failed: %d\n", ret);
-          return ret;
-        }
+      canerr("ERROR:  Failed to get CAN interface\n");
+      return -ENODEV;
+    }
 
-      /* Now we are initialized */
+  /* Register the CAN driver at "/dev/can0" */
 
-      initialized = true;
+  ret = can_register("/dev/can0", can);
+  if (ret < 0)
+    {
+      canerr("ERROR: can_register failed: %d\n", ret);
+      return ret;
     }
 
   return OK;
+#else
+  return -ENODEV;
+#endif
 }
 
-#endif /* CONFIG_CAN && (CONFIG_STM32_CAN1 || CONFIG_STM32_CAN2) */
+#endif /* CONFIG_CAN */
diff --git a/configs/olimex-stm32-p207/src/stm32_usb.c b/configs/olimex-stm32-p207/src/stm32_usb.c
index c9b2c968aaef5e7ac7a8ba3c771019184abb5e8c..fdef1532dc03d19ca76912fc6e46c3222a561fea 100644
--- a/configs/olimex-stm32-p207/src/stm32_usb.c
+++ b/configs/olimex-stm32-p207/src/stm32_usb.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/olimex-stm32-p207/src/stm32_usb.c
  *
- *   Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012-2013, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -105,13 +105,13 @@ static int usbhost_waiter(int argc, char *argv[])
 {
   struct usbhost_hubport_s *hport;
 
-  uvdbg("Running\n");
+  uinfo("Running\n");
   for (;;)
     {
       /* Wait for the device to change state */
 
       DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
-      uvdbg("%s\n", hport->connected ? "connected" : "disconnected");
+      uinfo("%s\n", hport->connected ? "connected" : "disconnected");
 
       /* Did we just become connected? */
 
@@ -177,7 +177,7 @@ int stm32_usbhost_initialize(void)
    * that we care about:
    */
 
-  uvdbg("Register class drivers\n");
+  uinfo("Register class drivers\n");
 
 #ifdef CONFIG_USBHOST_HUB
   /* Initialize USB hub class support */
@@ -185,7 +185,7 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_hub_initialize();
   if (ret < 0)
     {
-      udbg("ERROR: usbhost_hub_initialize failed: %d\n", ret);
+      uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
     }
 #endif
 
@@ -195,7 +195,7 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_msc_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the mass storage class: %d\n", ret);
+      uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
     }
 #endif
 
@@ -205,19 +205,19 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_cdcacm_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
+      uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
     }
 #endif
 
   /* Then get an instance of the USB host interface */
 
-  uvdbg("Initialize USB host\n");
+  uinfo("Initialize USB host\n");
   g_usbconn = stm32_otgfshost_initialize(0);
   if (g_usbconn)
     {
       /* Start a thread to handle device connection. */
 
-      uvdbg("Start usbhost_waiter\n");
+      uinfo("Start usbhost_waiter\n");
 
       pid = task_create("usbhost", CONFIG_USBHOST_DEFPRIO,
                         CONFIG_USBHOST_STACKSIZE,
@@ -238,16 +238,18 @@ int stm32_usbhost_initialize(void)
  *
  * Input Parameter:
  *   handler - New overcurrent interrupt handler
+ *   arg     - The argument provided for the interrupt handler
  *
  * Returned value:
- *   Old overcurrent interrupt handler
+ *   Zero (OK) is returned on success.  Otherwise, a negated errno value is returned
+ *   to indicate the nature of the failure.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_USBHOST
-xcpt_t stm32_setup_overcurrent(xcpt_t handler)
+int stm32_setup_overcurrent(xcpt_t handler, void *arg)
 {
-  return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler);
+  return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler, arg);
 }
 #endif
 
@@ -311,7 +313,7 @@ void stm32_usbhost_vbusdrive(int iface, bool enable)
 #ifdef CONFIG_USBDEV
 void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
 #endif
 
diff --git a/configs/olimex-stm32-p207/src/stm32_userleds.c b/configs/olimex-stm32-p207/src/stm32_userleds.c
index 289c6beec8431ac624027c7cbe02a76c74db9730..a3647a81480321aed3d9cfedd03be99e2092896d 100644
--- a/configs/olimex-stm32-p207/src/stm32_userleds.c
+++ b/configs/olimex-stm32-p207/src/stm32_userleds.c
@@ -48,22 +48,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
diff --git a/configs/olimex-stm32-p407/Kconfig b/configs/olimex-stm32-p407/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..439485f15e39609a6acd69209c8ac1453d6b79a0
--- /dev/null
+++ b/configs/olimex-stm32-p407/Kconfig
@@ -0,0 +1,8 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_BOARD_OLIMEX_STM32P407
+
+endif
diff --git a/configs/olimex-stm32-p407/README.txt b/configs/olimex-stm32-p407/README.txt
new file mode 100644
index 0000000000000000000000000000000000000000..1953d62d4b64a5f680780aa706e2c143a812ae35
--- /dev/null
+++ b/configs/olimex-stm32-p407/README.txt
@@ -0,0 +1,298 @@
+README
+======
+
+The NuttX configuration for the Olimex STM32-P407 is derives more or less
+directly from the Olimex STM32-P207 board support.  The P207 and P407 seem
+to share the same board design.  Other code comes from the STM3240G board
+support (which has the same crystal and clocking) and from the STM32 F4
+Discovery (which has the same STM32 part)
+
+Board Support
+=============
+
+The following peripherals are available in this configuration.
+
+ - LEDs:       show the sytem status
+
+ - Buttons:    TAMPER-button, WKUP-button, J1-Joystick (consists of RIGHT-,
+               UP-, LEFT-, DOWN-, and CENTER-button). Built in app
+               'buttons' works.
+
+ - ADC:        ADC1 samples the red trim potentiometer AN_TR
+               Built in app 'adc' works.
+
+ - USB-FS-OTG: enabled but not really tested, since there is only a
+               USB-A-connector (host) connected to the full speed µC inputs.
+               The other connector (device) is connected to the high speed µC
+               inputs, but it seems that NuttX has currently no driver
+               for it.
+
+ - CAN:        Built in app 'can' works, but apart from that not really tested.
+
+ - Ethernet:   Ping to other station on the network works.
+
+microSD Card Interface
+======================
+
+  microSD Connector
+  -----------------
+
+    ----------------- ----------------- ------------------------
+    SD/MMC CONNECTOR        BOARD        GPIO CONFIGURATION(s
+    PIN SIGNAL             SIGNAL          (no remapping)
+    --- ------------- ----------------- -------------------------
+    1   DAT2/RES      SD_D2/USART3_TX/  PC10 GPIO_SDIO_D2
+                      SPI3_SCK
+    2   CD/DAT3/CS    SD_D3/USART3_RX/  PC11 GPIO_SDIO_D3
+                      SPI3_MISO
+    3   CMD/DI        SD_CMD            PD2  GPIO_SDIO_CMD
+    4   VDD           N/A               N/A
+    5   CLK/SCLK      SD_CLK/SPI3_MOSI  PC12 GPIO_SDIO_CK
+    6   VSS           N/A               N/A
+    7   DAT0/D0       SD_D0/DCMI_D2     PC8  GPIO_SDIO_D0
+    8   DAT1/RES      SD_D1/DCMI_D3     PC9  GPIO_SDIO_D1
+    --- ------------- ----------------- -------------------------
+
+    NOTES:
+    1. DAT4, DAT4, DAT6, and DAT7 not connected.
+    2. There are no alternative pin selections.
+    3. There is no card detect (CD) GPIO input so we will not
+       sense if there is a card in the SD slot or not.  This will
+       make usage very awkward.
+
+  Configuration
+  -------------
+
+  Enabling SDIO-based MMC/SD support:
+
+    System Type->STM32 Peripheral Support
+      CONFIG_STM32_SDIO=y                      : Enable SDIO support
+      CONFIG_STM32_DMA2=y                      : DMA2 is needed by the driver
+
+    Device Drivers -> MMC/SD Driver Support
+      CONFIG_MMCSD=y                           : Enable MMC/SD support
+      CONFIG_MMSCD_NSLOTS=1                    : One slot per driver instance
+      # CONFIG_MMCSD_HAVECARDDETECT is not set : No card-detect GPIO
+      # CONFIG_MMCSD_MMCSUPPORT is not set     : Interferes with some SD cards
+      # CONFIG_MMCSD_SPI is not set            : No SPI-based MMC/SD support
+      CONFIG_MMCSD_SDIO=y                      : SDIO-based MMC/SD support
+      CONFIG_MMCSD_MULTIBLOCK_DISABLE=y        : Disable to keep things simple
+      CONFIG_SDIO_DMA=y                        : Use SDIO DMA
+      # CONFIG_SDIO_BLOCKSETUP is not set      : (not implemented)
+
+    Library Routines
+      CONFIG_SCHED_WORKQUEUE=y                 : Driver needs work queue support
+
+    Application Configuration -> NSH Library
+      CONFIG_NSH_ARCHINIT=y                    : NSH board-initialization
+
+    Using the SD card
+    -----------------
+
+    1. Since there is no CD GPIO pin, the firmware sill not know if there is
+       a card in the SD slot or not.  It will assume that there is and attempt
+       to mount the SD card on power-up.  If there is no SD card in the card
+       slot, there will be a long delay during initialization as the firmware
+       attempts to query the non-existent card, timeout, and retry.
+
+    2. After booting, an SDIO device will appear as /dev/mmcsd0
+
+    3. If you try mounting an SD card with nothing in the slot, the
+       mount will fail:
+
+         nsh> mount -t vfat /dev/mmcsd0 /mnt/sdcard
+         nsh: mount: mount failed: 19
+
+    STATUS:
+    -------
+    2017-01-28:  There is no card communication.  All commands to the SD card timeout.
+
+Configurations
+==============
+
+Information Common to All Configurations
+----------------------------------------
+Each Olimex STM32-P407 configuration is maintained in a sub-directory and can be
+selected as follow:
+
+    cd tools
+    ./configure.sh olimex-stm32-p407/
+    cd -
+    . ./setenv.sh
+
+Where  is one of the configuration sub-directories listed in the
+following section.
+
+Before sourcing the setenv.sh file above, you should examine it and perform
+edits as necessary so that TOOLCHAIN_BIN is the correct path to the directory
+than holds your toolchain binaries.
+
+And then build NuttX by simply typing the following.  At the conclusion of
+the make, the nuttx binary will reside in an ELF file called, simply, nuttx.
+
+  make oldconfig
+  make
+
+    NOTES:
+
+    1. This configuration uses the mconf-based configuration tool.  To
+       change this configurations using that tool, you should:
+
+       a. Build and install the kconfig-mconf tool.  See nuttx/README.txt
+          see additional README.txt files in the NuttX tools repository.
+
+       b. Execute 'make menuconfig' in nuttx/ in order to start the
+          reconfiguration process.
+
+    2. Serial Output
+
+       This configuraiont produces all of its test output on the serial
+       console.  This configuration has USART3 enabled as a serial console.
+       This is the connector labeled RS232_2.  This can easily be changed
+       by reconfiguring with 'make menuconfig'.
+
+    3. Toolchain
+
+       By default, the host platform is set to be Linux using the NuttX
+       buildroot toolchain. The host and/or toolchain selection can easily
+       be changed with 'make menuconfig'.
+
+    4. Note that CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is enabled so
+       that the JTAG connection is not disconnected by the idle loop.
+
+Configuration sub-directories
+-----------------------------
+
+The  that is provided above as an argument to the tools/configure.sh
+must be is one of the following.
+
+  knsh:
+
+    This is identical to the nsh configuration below except that NuttX
+    is built as a PROTECTED mode, monolithic module and the user applications
+    are built separately.
+
+    It is recommends to use a special make command; not just 'make' but make
+    with the following two arguments:
+
+        make pass1 pass2
+
+    In the normal case (just 'make'), make will attempt to build both user-
+    and kernel-mode blobs more or less interleaved.  That actual works!
+    However, for me it is very confusing so I prefer the above make command:
+    Make the user-space binaries first (pass1), then make the kernel-space
+    binaries (pass2)
+
+    NOTES:
+
+    1. At the end of the build, there will be several files in the top-level
+       NuttX build directory:
+
+       PASS1:
+         nuttx_user.elf    - The pass1 user-space ELF file
+         nuttx_user.hex    - The pass1 Intel HEX format file (selected in defconfig)
+         User.map          - Symbols in the user-space ELF file
+
+       PASS2:
+         nuttx             - The pass2 kernel-space ELF file
+         nuttx.hex         - The pass2 Intel HEX file (selected in defconfig)
+         System.map        - Symbols in the kernel-space ELF file
+
+       The J-Link programmer will except files in .hex, .mot, .srec, and .bin
+       formats.
+
+    2. Combining .hex files.  If you plan to use the .hex files with your
+       debugger or FLASH utility, then you may need to combine the two hex
+       files into a single .hex file.  Here is how you can do that.
+
+       a. The 'tail' of the nuttx.hex file should look something like this
+          (with my comments added):
+
+            $ tail nuttx.hex
+            # 00, data records
+            ...
+            :10 9DC0 00 01000000000800006400020100001F0004
+            :10 9DD0 00 3B005A0078009700B500D400F300110151
+            :08 9DE0 00 30014E016D0100008D
+            # 05, Start Linear Address Record
+            :04 0000 05 0800 0419 D2
+            # 01, End Of File record
+            :00 0000 01 FF
+
+          Use an editor such as vi to remove the 05 and 01 records.
+
+       b. The 'head' of the nuttx_user.hex file should look something like
+          this (again with my comments added):
+
+            $ head nuttx_user.hex
+            # 04, Extended Linear Address Record
+            :02 0000 04 0801 F1
+            # 00, data records
+            :10 8000 00 BD89 01084C800108C8110208D01102087E
+            :10 8010 00 0010 00201C1000201C1000203C16002026
+            :10 8020 00 4D80 01085D80010869800108ED83010829
+            ...
+
+          Nothing needs to be done here.  The nuttx_user.hex file should
+          be fine.
+
+       c. Combine the edited nuttx.hex and un-edited nuttx_user.hex
+          file to produce a single combined hex file:
+
+          $ cat nuttx.hex nuttx_user.hex >combined.hex
+
+       Then use the combined.hex file with the to write the FLASH image.
+       If you do this a lot, you will probably want to invest a little time
+       to develop a tool to automate these steps.
+
+  nsh:
+
+    This is the NuttShell (NSH) using the NSH startup logic at
+    apps/examples/nsh.
+
+    NOTES:
+
+    1. Kernel Modules / Shared Libraries
+
+       I used this configuration for testing NuttX kernel modules in the
+       FLAT build with the following configuration additions to the
+       configuration file:
+
+         CONFIG_BOARDCTL_OS_SYMTAB=y
+         CONFIG_EXAMPLES_MODULE=y
+         CONFIG_EXAMPLES_MODULE_BUILTINFS=y
+         CONFIG_EXAMPLES_MODULE_DEVMINOR=0
+         CONFIG_EXAMPLES_MODULE_DEVPATH="/dev/ram0"
+         CONFIG_FS_ROMFS=y
+         CONFIG_LIBC_ARCH_ELF=y
+         CONFIG_MODULE=y
+         CONFIG_LIBC_MODLIB=y
+         CONFIG_MODLIB_ALIGN_LOG2=2
+         CONFIG_MODLIB_BUFFERINCR=32
+         CONFIG_MODLIB_BUFFERSIZE=128
+
+       Add the following for testing shared libraries in the FLAT
+       build:
+
+         CONFIG_LIBC_DLLFCN=y
+         CONFIG_EXAMPLES_SOTEST=y
+         CONFIG_EXAMPLES_SOTEST_BUILTINFS=y
+         CONFIG_EXAMPLES_SOTEST_DEVMINOR=1
+         CONFIG_EXAMPLES_SOTEST_DEVPATH="/dev/ram1"
+
+STATUS
+======
+
+2016-12-21: This board configuration was ported from the Olimex STM32 P207
+  port.  Note that none of the above features have been verified.  USB, CAN,
+  ADC, and Ethernet are disabled in the base NSH configuration until they
+  can be verified.  These features should be functional but may required
+  some tweaks due to the different clock configurations.  The Olimex STM32
+  P207 nsh/defconfig would be a good starting place for restoring these
+  feature configurations.
+
+  CCM memory is not included in the heap (CONFIG_STM32_CCMEXCLUDE=y) because
+  it does no suport DMA, leaving only 128KiB for program usage.
+
+2107-01-23:  Added the the knsh configuration and support for the PROTECTED
+  build mode.
diff --git a/configs/olimex-stm32-p407/include/board.h b/configs/olimex-stm32-p407/include/board.h
new file mode 100644
index 0000000000000000000000000000000000000000..888ddad8735979a24bfbb594a1dc034a9089eaf0
--- /dev/null
+++ b/configs/olimex-stm32-p407/include/board.h
@@ -0,0 +1,355 @@
+/************************************************************************************
+ * configs/olimex-stm32-p407/include/board.h
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __CONFIGS_OLIMEX_STM32_P407_INCLUDE_BOARD_H
+#define __CONFIGS_OLIMEX_STM32_P407_INCLUDE_BOARD_H 1
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#ifndef __ASSEMBLY__
+# include 
+#endif
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Clocking *************************************************************************/
+
+/* HSI - 16 MHz RC factory-trimmed
+ * LSI - 32 KHz RC (30-60KHz, uncalibrated)
+ * HSE - On-board crystal frequency is 25MHz
+ * LSE - 32.768 kHz
+ */
+
+#define STM32_BOARD_XTAL        25000000ul
+
+#define STM32_HSI_FREQUENCY     16000000ul
+#define STM32_LSI_FREQUENCY     32000
+#define STM32_HSE_FREQUENCY     STM32_BOARD_XTAL
+#define STM32_LSE_FREQUENCY     32768
+
+/* Main PLL Configuration.
+ *
+ * PLL source is HSE
+ * PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN
+ *         = (25,000,000 / 25) * 336
+ *         = 336,000,000
+ * SYSCLK  = PLL_VCO / PLLP
+ *         = 336,000,000 / 2 = 168,000,000
+ * USB OTG FS, SDIO and RNG Clock
+ *         =  PLL_VCO / PLLQ
+ *         = 48,000,000
+ */
+
+#define STM32_PLLCFG_PLLM       RCC_PLLCFG_PLLM(25)
+#define STM32_PLLCFG_PLLN       RCC_PLLCFG_PLLN(336)
+#define STM32_PLLCFG_PLLP       RCC_PLLCFG_PLLP_2
+#define STM32_PLLCFG_PLLQ       RCC_PLLCFG_PLLQ(7)
+
+#define STM32_SYSCLK_FREQUENCY  168000000ul
+
+/* AHB clock (HCLK) is SYSCLK (168MHz) */
+
+#define STM32_RCC_CFGR_HPRE     RCC_CFGR_HPRE_SYSCLK  /* HCLK  = SYSCLK / 1 */
+#define STM32_HCLK_FREQUENCY    STM32_SYSCLK_FREQUENCY
+#define STM32_BOARD_HCLK        STM32_HCLK_FREQUENCY  /* same as above, to satisfy compiler */
+
+/* APB1 clock (PCLK1) is HCLK/4 (42MHz) */
+
+#define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd4     /* PCLK1 = HCLK / 4 */
+#define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/4)
+
+/* Timers driven from APB1 will be twice PCLK1 */
+
+#define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM12_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM13_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM14_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+
+/* APB2 clock (PCLK2) is HCLK/2 (84MHz) */
+
+#define STM32_RCC_CFGR_PPRE2    RCC_CFGR_PPRE2_HCLKd2     /* PCLK2 = HCLK / 2 */
+#define STM32_PCLK2_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
+
+/* Timers driven from APB2 will be twice PCLK2 */
+
+#define STM32_APB2_TIM1_CLKIN   (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM8_CLKIN   (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM9_CLKIN   (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM10_CLKIN  (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM11_CLKIN  (2*STM32_PCLK2_FREQUENCY)
+
+/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
+ * otherwise frequency is 2xAPBx.
+ * Note: TIM1,8 are on APB2, others on APB1
+ */
+
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM3_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM4_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM5_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM6_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM7_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM8_FREQUENCY    STM32_HCLK_FREQUENCY
+
+/* SDIO dividers.  Note that slower clocking is required when DMA is disabled
+ * in order to avoid RX overrun/TX underrun errors due to delayed responses
+ * to service FIFOs in interrupt driven mode.  These values have not been
+ * tuned!!!
+ *
+ * SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(118+2)=400 KHz
+ */
+
+#define SDIO_INIT_CLKDIV        (118 << SDIO_CLKCR_CLKDIV_SHIFT)
+
+/* DMA ON:  SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
+ * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz
+ */
+
+#ifdef CONFIG_SDIO_DMA
+#  define SDIO_MMCXFR_CLKDIV    (1 << SDIO_CLKCR_CLKDIV_SHIFT)
+#else
+#  define SDIO_MMCXFR_CLKDIV    (2 << SDIO_CLKCR_CLKDIV_SHIFT)
+#endif
+
+/* DMA ON:  SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
+ * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz
+ */
+
+#ifdef CONFIG_SDIO_DMA
+#  define SDIO_SDXFR_CLKDIV     (1 << SDIO_CLKCR_CLKDIV_SHIFT)
+#else
+#  define SDIO_SDXFR_CLKDIV     (2 << SDIO_CLKCR_CLKDIV_SHIFT)
+#endif
+
+/* LED definitions ******************************************************************/
+/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any
+ * way.  The following definitions are used to access individual LEDs.
+ */
+
+/* LED index values for use with board_userled() */
+
+#define BOARD_LED1        0
+#define BOARD_LED2        1
+#define BOARD_LED3        2
+#define BOARD_LED4        3
+#define BOARD_NLEDS       4
+
+#define BOARD_LED_GREEN1  BOARD_LED1
+#define BOARD_LED_YELLOW  BOARD_LED2
+#define BOARD_LED_RED     BOARD_LED3
+#define BOARD_LED_GREEN2  BOARD_LED4
+
+/* LED bits for use with board_userled_all() */
+
+#define BOARD_LED1_BIT    (1 << BOARD_LED1)
+#define BOARD_LED2_BIT    (1 << BOARD_LED2)
+#define BOARD_LED3_BIT    (1 << BOARD_LED3)
+#define BOARD_LED4_BIT    (1 << BOARD_LED4)
+
+/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on board the
+ * Olimex STM32-P407.  The following definitions describe how NuttX controls the LEDs:
+ */
+
+#define LED_STARTED       0  /* LED1 */
+#define LED_HEAPALLOCATE  1  /* LED2 */
+#define LED_IRQSENABLED   2  /* LED1 + LED2 */
+#define LED_STACKCREATED  3  /* LED3 */
+#define LED_INIRQ         4  /* LED1 + LED3 */
+#define LED_SIGNAL        5  /* LED2 + LED3 */
+#define LED_ASSERTION     6  /* LED1 + LED2 + LED3 */
+#define LED_PANIC         7  /* N/C  + N/C  + N/C + LED4 */
+
+/* Button definitions ***************************************************************/
+/* The Olimex STM32-P407 supports seven buttons: */
+
+#define BUTTON_TAMPER     0
+#define BUTTON_WKUP       1
+#define BUTTON_RIGHT      2
+#define BUTTON_UP         3
+#define BUTTON_LEFT       4
+#define BUTTON_DOWN       5
+#define BUTTON_CENTER     6
+
+#define NUM_BUTTONS       7
+
+#define BUTTON_TAMPER_BIT (1 << BUTTON_TAMPER)
+#define BUTTON_WKUP_BIT   (1 << BUTTON_WKUP)
+#define BUTTON_RIGHT_BIT  (1 << BUTTON_RIGHT)
+#define BUTTON_UP_BIT     (1 << BUTTON_UP)
+#define BUTTON_LEFT_BIT   (1 << BUTTON_LEFT)
+#define BUTTON_DOWN_BIT   (1 << BUTTON_DOWN)
+#define BUTTON_CENTER_BIT (1 << BUTTON_CENTER)
+
+/* Alternate function pin selections ************************************************/
+
+/* USART3: */
+
+#define GPIO_USART3_RX    GPIO_USART3_RX_3  /* PD9  */
+#define GPIO_USART3_TX    GPIO_USART3_TX_3  /* PD8  */
+#define GPIO_USART3_CTS   GPIO_USART3_CTS_2 /* PD11 */
+#define GPIO_USART3_RTS   GPIO_USART3_RTS_2 /* PD12 */
+
+/* USART6: */
+
+#define GPIO_USART6_RX    GPIO_USART6_RX_2  /* PG9  */
+#define GPIO_USART6_TX    GPIO_USART6_TX_1  /* PC6  */
+
+/* CAN: */
+
+#define GPIO_CAN1_RX      GPIO_CAN1_RX_2    /* PB8 */
+#define GPIO_CAN1_TX      GPIO_CAN1_TX_2    /* PB9 */
+
+/* microSD Connector:
+ *
+ *   ----------------- ----------------- ------------------------
+ *   SD/MMC CONNECTOR        BOARD        GPIO CONFIGURATION(s
+ *   PIN SIGNAL             SIGNAL          (no remapping)
+ *   --- ------------- ----------------- -------------------------
+ *   1   DAT2/RES      SD_D2/USART3_TX/  PC10 GPIO_SDIO_D2
+ *                     SPI3_SCK
+ *   2   CD/DAT3/CS    SD_D3/USART3_RX/  PC11 GPIO_SDIO_D3
+ *                     SPI3_MISO
+ *   3   CMD/DI        SD_CMD            PD2  GPIO_SDIO_CMD
+ *   4   VDD           N/A               N/A
+ *   5   CLK/SCLK      SD_CLK/SPI3_MOSI  PC12 GPIO_SDIO_CK
+ *   6   VSS           N/A               N/A
+ *   7   DAT0/D0       SD_D0/DCMI_D2     PC8  GPIO_SDIO_D0
+ *   8   DAT1/RES      SD_D1/DCMI_D3     PC9  GPIO_SDIO_D1
+ *   --- ------------- ----------------- -------------------------
+ *
+ *   NOTES:
+ *   1. DAT4, DAT4, DAT6, and DAT7 not connected.
+ *   2. There are no alternative pin selections.
+ *   3. There is no card detect (CD) GPIO input so we will not
+ *      sense if there is a card in the SD slot or not.  This will
+ *      make usage very awkward.
+ */
+
+/* Ethernet:
+ *
+ * - PA2  is ETH_MDIO
+ * - PC1  is ETH_MDC
+ * - PB5  is ETH_PPS_OUT     - NC (not connected)
+ * - PA0  is ETH_MII_CRS     - NC
+ * - PA3  is ETH_MII_COL     - NC
+ * - PB10 is ETH_MII_RX_ER   - NC
+ * - PB0  is ETH_MII_RXD2    - NC
+ * - PH7  is ETH_MII_RXD3    - NC
+ * - PC3  is ETH_MII_TX_CLK  - NC
+ * - PC2  is ETH_MII_TXD2    - NC
+ * - PB8  is ETH_MII_TXD3    - NC
+ * - PA1  is ETH_MII_RX_CLK/ETH_RMII_REF_CLK
+ * - PA7  is ETH_MII_RX_DV/ETH_RMII_CRS_DV
+ * - PC4  is ETH_MII_RXD0/ETH_RMII_RXD0
+ * - PC5  is ETH_MII_RXD1/ETH_RMII_RXD1
+ * - PB11 is ETH_MII_TX_EN/ETH_RMII_TX_EN
+ * - PG13 is ETH_MII_TXD0/ETH_RMII_TXD0
+ * - PG14 is ETH_MII_TXD1/ETH_RMII_TXD1
+ */
+
+#define GPIO_ETH_PPS_OUT    GPIO_ETH_PPS_OUT_1
+#define GPIO_ETH_MII_CRS    GPIO_ETH_MII_CRS_1
+#define GPIO_ETH_MII_COL    GPIO_ETH_MII_COL_1
+#define GPIO_ETH_MII_RX_ER  GPIO_ETH_MII_RX_ER_1
+#define GPIO_ETH_MII_RXD2   GPIO_ETH_MII_RXD2_1
+#define GPIO_ETH_MII_RXD3   GPIO_ETH_MII_RXD3_1
+#define GPIO_ETH_MII_TXD3   GPIO_ETH_MII_TXD3_1
+#define GPIO_ETH_MII_TX_EN  GPIO_ETH_MII_TX_EN_2
+#define GPIO_ETH_MII_TXD0   GPIO_ETH_MII_TXD0_2
+#define GPIO_ETH_MII_TXD1   GPIO_ETH_MII_TXD1_2
+#define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_1
+#define GPIO_ETH_RMII_TXD0  GPIO_ETH_RMII_TXD0_2
+#define GPIO_ETH_RMII_TXD1  GPIO_ETH_RMII_TXD1_2
+
+/* DMA Channel/Stream Selections ****************************************************/
+/* Stream selections are arbitrary for now but might become important in the future
+ * if we set aside more DMA channels/streams.
+ *
+ * SDIO DMA
+ *   DMAMAP_SDIO_1 = Channel 4, Stream 3
+ *   DMAMAP_SDIO_2 = Channel 4, Stream 6
+ */
+
+#define DMAMAP_SDIO       DMAMAP_SDIO_1
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+/************************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.  This entry point
+ *   is called early in the intitialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void stm32_boardinitialize(void);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __CONFIGS_OLIMEX_STM32_P407_INCLUDE_BOARD_H */
diff --git a/configs/olimex-stm32-p407/kernel/.gitignore b/configs/olimex-stm32-p407/kernel/.gitignore
new file mode 100644
index 0000000000000000000000000000000000000000..7bacd5aee3e49e11d2753d091bd2c9b31c0b16b0
--- /dev/null
+++ b/configs/olimex-stm32-p407/kernel/.gitignore
@@ -0,0 +1,2 @@
+/nuttx_user.elf
+
diff --git a/configs/olimex-stm32-p407/kernel/Makefile b/configs/olimex-stm32-p407/kernel/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..71d159a3ce82b69f444bae25f3dfdedf812d47fa
--- /dev/null
+++ b/configs/olimex-stm32-p407/kernel/Makefile
@@ -0,0 +1,122 @@
+############################################################################
+# configs/olimex-stm32-p407/kernel/Makefile
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+# This is the directory for the board-specific header files
+
+BOARD_INCLUDE = $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)include
+
+# The entry point name (if none is provided in the .config file)
+
+CONFIG_USER_ENTRYPOINT ?= user_start
+ENTRYPT = $(patsubst "%",%,$(CONFIG_USER_ENTRYPOINT))
+
+# Get the paths to the libraries and the links script path in format that
+# is appropriate for the host OS
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  USER_LIBPATHS = ${shell for path in $(USERLIBS); do dir=`dirname $(TOPDIR)$(DELIM)$$path`;echo "-L\"`cygpath -w $$dir`\"";done}
+  USER_LDSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld}"
+  USER_LDSCRIPT += -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld}"
+  USER_HEXFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.hex}"
+  USER_SRECFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.srec}"
+  USER_BINFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.bin}"
+else
+  # Linux/Cygwin-native toolchain
+  USER_LIBPATHS = $(addprefix -L$(TOPDIR)$(DELIM),$(dir $(USERLIBS)))
+  USER_LDSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld
+  USER_LDSCRIPT += -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld
+  USER_HEXFILE += "$(TOPDIR)$(DELIM)nuttx_user.hex"
+  USER_SRECFILE += "$(TOPDIR)$(DELIM)nuttx_user.srec"
+  USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin"
+endif
+
+USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT)
+USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS))))
+USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}"
+
+# Source files
+
+CSRCS = stm32_userspace.c
+COBJS = $(CSRCS:.c=$(OBJEXT))
+OBJS  = $(COBJS)
+
+# Targets:
+
+all: $(TOPDIR)$(DELIM)nuttx_user.elf $(TOPDIR)$(DELIM)User.map
+.PHONY: nuttx_user.elf depend clean distclean
+
+$(COBJS): %$(OBJEXT): %.c
+	$(call COMPILE, $<, $@)
+
+# Create the nuttx_user.elf file containing all of the user-mode code
+
+nuttx_user.elf: $(OBJS)
+	$(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC)
+
+$(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf
+	@echo "LD: nuttx_user.elf"
+	$(Q) cp -a nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.elf
+ifeq ($(CONFIG_INTELHEX_BINARY),y)
+	@echo "CP: nuttx_user.hex"
+	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(USER_HEXFILE)
+endif
+ifeq ($(CONFIG_MOTOROLA_SREC),y)
+	@echo "CP: nuttx_user.srec"
+	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(USER_SRECFILE)
+endif
+ifeq ($(CONFIG_RAW_BINARY),y)
+	@echo "CP: nuttx_user.bin"
+	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(USER_BINFILE)
+endif
+
+$(TOPDIR)$(DELIM)User.map: nuttx_user.elf
+	@echo "MK: User.map"
+	$(Q) $(NM) nuttx_user.elf >$(TOPDIR)$(DELIM)User.map
+	$(Q) $(CROSSDEV)size nuttx_user.elf
+
+.depend:
+
+depend: .depend
+
+clean:
+	$(call DELFILE, nuttx_user.elf)
+	$(call DELFILE, "$(TOPDIR)$(DELIM)nuttx_user.*")
+	$(call DELFILE, "$(TOPDIR)$(DELIM)User.map")
+	$(call CLEAN)
+
+distclean: clean
diff --git a/configs/olimex-stm32-p407/kernel/stm32_userspace.c b/configs/olimex-stm32-p407/kernel/stm32_userspace.c
new file mode 100644
index 0000000000000000000000000000000000000000..36306ccd66050f053e67ec23640c87180cfad460
--- /dev/null
+++ b/configs/olimex-stm32-p407/kernel/stm32_userspace.c
@@ -0,0 +1,133 @@
+/****************************************************************************
+ * configs/olimex-stm32-p407/kernel/stm32_userspace.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#if defined(CONFIG_BUILD_PROTECTED) && !defined(__KERNEL__)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* Configuration ************************************************************/
+
+#ifndef CONFIG_NUTTX_USERSPACE
+#  error "CONFIG_NUTTX_USERSPACE not defined"
+#endif
+
+#if CONFIG_NUTTX_USERSPACE != 0x08020000
+#  error "CONFIG_NUTTX_USERSPACE must be 0x08020000 to match memory.ld"
+#endif
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* These 'addresses' of these values are setup by the linker script.  They are
+ * not actual uint32_t storage locations! They are only used meaningfully in the
+ * following way:
+ *
+ *  - The linker script defines, for example, the symbol_sdata.
+ *  - The declaration extern uint32_t _sdata; makes C happy.  C will believe
+ *    that the value _sdata is the address of a uint32_t variable _data (it is
+ *    not!).
+ *  - We can recover the linker value then by simply taking the address of
+ *    of _data.  like:  uint32_t *pdata = &_sdata;
+ */
+
+extern uint32_t _stext;           /* Start of .text */
+extern uint32_t _etext;           /* End_1 of .text + .rodata */
+extern const uint32_t _eronly;    /* End+1 of read only section (.text + .rodata) */
+extern uint32_t _sdata;           /* Start of .data */
+extern uint32_t _edata;           /* End+1 of .data */
+extern uint32_t _sbss;            /* Start of .bss */
+extern uint32_t _ebss;            /* End+1 of .bss */
+
+/* This is the user space entry point */
+
+int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]);
+
+const struct userspace_s userspace __attribute__ ((section (".userspace"))) =
+{
+  /* General memory map */
+
+  .us_entrypoint    = (main_t)CONFIG_USER_ENTRYPOINT,
+  .us_textstart     = (uintptr_t)&_stext,
+  .us_textend       = (uintptr_t)&_etext,
+  .us_datasource    = (uintptr_t)&_eronly,
+  .us_datastart     = (uintptr_t)&_sdata,
+  .us_dataend       = (uintptr_t)&_edata,
+  .us_bssstart      = (uintptr_t)&_sbss,
+  .us_bssend        = (uintptr_t)&_ebss,
+
+  /* Memory manager heap structure */
+
+  .us_heap          = &g_mmheap,
+
+  /* Task/thread startup routines */
+
+  .task_startup     = task_startup,
+#ifndef CONFIG_DISABLE_PTHREAD
+  .pthread_startup  = pthread_startup,
+#endif
+
+  /* Signal handler trampoline */
+
+#ifndef CONFIG_DISABLE_SIGNALS
+  .signal_handler   = up_signal_handler,
+#endif
+
+  /* User-space work queue support (declared in include/nuttx/wqueue.h) */
+
+#ifdef CONFIG_LIB_USRWORK
+  .work_usrstart    = work_usrstart,
+#endif
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#endif /* CONFIG_BUILD_PROTECTED && !__KERNEL__ */
diff --git a/configs/olimex-stm32-p407/knsh/Make.defs b/configs/olimex-stm32-p407/knsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..8b929491954a538abd7171e2a3090ecec34a50c7
--- /dev/null
+++ b/configs/olimex-stm32-p407/knsh/Make.defs
@@ -0,0 +1,125 @@
+############################################################################
+# configs/olimex-stm32-p407/knsh/Make.defs
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT1 = memory.ld
+LDSCRIPT2 = kernel-space.ld
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT1)}"
+  ARCHSCRIPT += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT2)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT1)
+  ARCHSCRIPT += -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT2)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+# Loadable module definitions
+
+CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
+
+LDMODULEFLAGS = -r -e module_initialize
+ifeq ($(WINTOOL),y)
+  LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libc/modlib/gnu-elf.ld}"
+else
+  LDMODULEFLAGS += -T $(TOPDIR)/libc/modlib/gnu-elf.ld
+endif
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
diff --git a/configs/olimex-stm32-p407/knsh/defconfig b/configs/olimex-stm32-p407/knsh/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..409446b991b218c9dff4135139166b18961f3b7e
--- /dev/null
+++ b/configs/olimex-stm32-p407/knsh/defconfig
@@ -0,0 +1,1230 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+# CONFIG_BUILD_FLAT is not set
+CONFIG_BUILD_PROTECTED=y
+CONFIG_BUILD_2PASS=y
+CONFIG_PASS1_TARGET="all"
+CONFIG_PASS1_BUILDIR="configs/olimex-stm32-p407/kernel"
+CONFIG_PASS1_OBJECT=""
+CONFIG_NUTTX_USERSPACE=0x08020000
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+CONFIG_ARCH_FPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+CONFIG_ARM_MPU=y
+CONFIG_ARM_MPU_NREGIONS=8
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
+# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+# CONFIG_ARCH_CHIP_STM32F103C8 is not set
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+CONFIG_ARCH_CHIP_STM32F407ZG=y
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+# CONFIG_STM32_STM32F10XX is not set
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+# CONFIG_STM32_PERFORMANCELINE is not set
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+# CONFIG_STM32_MEDIUMDENSITY is not set
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+CONFIG_STM32_STM32F40XX=y
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+CONFIG_STM32_STM32F407=y
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+CONFIG_STM32_HAVE_CCM=y
+# CONFIG_STM32_HAVE_USBDEV is not set
+CONFIG_STM32_HAVE_OTGFS=y
+CONFIG_STM32_HAVE_FSMC=y
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+CONFIG_STM32_HAVE_USART6=y
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+CONFIG_STM32_HAVE_TIM2=y
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+CONFIG_STM32_HAVE_TIM9=y
+CONFIG_STM32_HAVE_TIM10=y
+CONFIG_STM32_HAVE_TIM11=y
+CONFIG_STM32_HAVE_TIM12=y
+CONFIG_STM32_HAVE_TIM13=y
+CONFIG_STM32_HAVE_TIM14=y
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+CONFIG_STM32_HAVE_CAN2=y
+CONFIG_STM32_HAVE_DAC1=y
+CONFIG_STM32_HAVE_DAC2=y
+CONFIG_STM32_HAVE_RNG=y
+CONFIG_STM32_HAVE_ETHMAC=y
+CONFIG_STM32_HAVE_I2C2=y
+CONFIG_STM32_HAVE_I2C3=y
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKPSRAM is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CAN2 is not set
+# CONFIG_STM32_CCMDATARAM is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_CRYP is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_DAC1 is not set
+# CONFIG_STM32_DAC2 is not set
+# CONFIG_STM32_DCMI is not set
+# CONFIG_STM32_ETHMAC is not set
+# CONFIG_STM32_FSMC is not set
+# CONFIG_STM32_HASH is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_I2C3 is not set
+# CONFIG_STM32_OTGFS is not set
+# CONFIG_STM32_OTGHS is not set
+CONFIG_STM32_PWR=y
+# CONFIG_STM32_RNG is not set
+# CONFIG_STM32_SDIO is not set
+# CONFIG_STM32_SPI1 is not set
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SYSCFG=y
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+# CONFIG_STM32_TIM9 is not set
+# CONFIG_STM32_TIM10 is not set
+# CONFIG_STM32_TIM11 is not set
+# CONFIG_STM32_TIM12 is not set
+# CONFIG_STM32_TIM13 is not set
+# CONFIG_STM32_TIM14 is not set
+# CONFIG_STM32_USART1 is not set
+# CONFIG_STM32_USART2 is not set
+CONFIG_STM32_USART3=y
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USART6 is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_FLASH_PREFETCH is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+# CONFIG_STM32_JTAG_FULL_ENABLE is not set
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+CONFIG_STM32_JTAG_SW_ENABLE=y
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+CONFIG_STM32_CCMEXCLUDE=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM2_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+# CONFIG_STM32_TIM9_CAP is not set
+# CONFIG_STM32_TIM10_CAP is not set
+# CONFIG_STM32_TIM11_CAP is not set
+# CONFIG_STM32_TIM12_CAP is not set
+# CONFIG_STM32_TIM13_CAP is not set
+# CONFIG_STM32_TIM14_CAP is not set
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART3_SERIALDRIVER=y
+# CONFIG_STM32_USART3_1WIREDRIVER is not set
+# CONFIG_USART3_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+# CONFIG_STM32_HAVE_RTC_COUNTER is not set
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+CONFIG_ARCH_USE_MPU=y
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=16717
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=131072
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_OLIMEX_STM32H407 is not set
+# CONFIG_ARCH_BOARD_OLIMEX_STM32E407 is not set
+CONFIG_ARCH_BOARD_OLIMEX_STM32P407=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="olimex-stm32-p407"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+CONFIG_ARCH_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2013
+CONFIG_START_MONTH=1
+CONFIG_START_DAY=1
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=8
+CONFIG_WDOG_INTRESERVE=1
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_SPINLOCK is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=32
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+CONFIG_BOARD_INITIALIZE=y
+# CONFIG_BOARD_INITTHREAD is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+CONFIG_LIB_SYSCALL=y
+CONFIG_SYS_RESERVED=8
+CONFIG_SYS_NNEST=2
+
+#
+# Device Drivers
+#
+CONFIG_DISABLE_POLL=y
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+CONFIG_USART3_SERIALDRIVER=y
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART3_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART3 Configuration
+#
+CONFIG_USART3_RXBUFSIZE=256
+CONFIG_USART3_TXBUFSIZE=256
+CONFIG_USART3_BAUD=115200
+CONFIG_USART3_BITS=8
+CONFIG_USART3_PARITY=0
+CONFIG_USART3_2STOP=0
+# CONFIG_USART3_IFLOWCONTROL is not set
+# CONFIG_USART3_OFLOWCONTROL is not set
+# CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+CONFIG_FS_READABLE=y
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_KMM is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+CONFIG_MM_KERNEL_HEAP=y
+CONFIG_MM_KERNEL_HEAPSIZE=8192
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_USRWORK is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
+CONFIG_NSH_DISABLE_DD=y
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+CONFIG_NSH_DISABLE_GET=y
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+CONFIG_NSH_DISABLE_MKRD=y
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+CONFIG_NSH_DISABLE_PUT=y
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+CONFIG_NSH_DISABLE_WGET=y
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+# CONFIG_NSH_CMDOPT_DF_H is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+# CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-stm32-p407/knsh/setenv.sh b/configs/olimex-stm32-p407/knsh/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..dec893b8206b9630d8802f1205f4a2e13596f3cb
--- /dev/null
+++ b/configs/olimex-stm32-p407/knsh/setenv.sh
@@ -0,0 +1,80 @@
+#!/bin/bash
+# configs/olimex-stm32-p407/knsh/setenv.sh
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# These are the Cygwin paths to the locations where I installed the Atollic
+# toolchain under windows.  You will also have to edit this if you install
+# the Atollic toolchain in any other location.  /usr/bin is added before
+# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
+# at those locations as well.
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/olimex-stm32-p407/nsh/Make.defs b/configs/olimex-stm32-p407/nsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..4d1224fd4bd7feec39f86ceff19bed5af8f7ea1a
--- /dev/null
+++ b/configs/olimex-stm32-p407/nsh/Make.defs
@@ -0,0 +1,122 @@
+############################################################################
+# configs/olimex-stm32-p407/nsh/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = flash.ld
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+# Loadable module definitions
+
+CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
+
+LDMODULEFLAGS = -r -e module_initialize
+ifeq ($(WINTOOL),y)
+  LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libc/modlib/gnu-elf.ld}"
+else
+  LDMODULEFLAGS += -T $(TOPDIR)/libc/modlib/gnu-elf.ld
+endif
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
diff --git a/configs/olimex-stm32-p407/nsh/defconfig b/configs/olimex-stm32-p407/nsh/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..cbcbf578c7ba3e7e74e58663d9bd6495ad8932d4
--- /dev/null
+++ b/configs/olimex-stm32-p407/nsh/defconfig
@@ -0,0 +1,1231 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+CONFIG_ARCH_FPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
+# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+# CONFIG_ARCH_CHIP_STM32F103C8 is not set
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+CONFIG_ARCH_CHIP_STM32F407ZG=y
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+# CONFIG_STM32_STM32F10XX is not set
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+# CONFIG_STM32_PERFORMANCELINE is not set
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+# CONFIG_STM32_MEDIUMDENSITY is not set
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+CONFIG_STM32_STM32F40XX=y
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+CONFIG_STM32_STM32F407=y
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+CONFIG_STM32_HAVE_CCM=y
+# CONFIG_STM32_HAVE_USBDEV is not set
+CONFIG_STM32_HAVE_OTGFS=y
+CONFIG_STM32_HAVE_FSMC=y
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+CONFIG_STM32_HAVE_USART6=y
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+CONFIG_STM32_HAVE_TIM2=y
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+CONFIG_STM32_HAVE_TIM9=y
+CONFIG_STM32_HAVE_TIM10=y
+CONFIG_STM32_HAVE_TIM11=y
+CONFIG_STM32_HAVE_TIM12=y
+CONFIG_STM32_HAVE_TIM13=y
+CONFIG_STM32_HAVE_TIM14=y
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+CONFIG_STM32_HAVE_CAN2=y
+CONFIG_STM32_HAVE_DAC1=y
+CONFIG_STM32_HAVE_DAC2=y
+CONFIG_STM32_HAVE_RNG=y
+CONFIG_STM32_HAVE_ETHMAC=y
+CONFIG_STM32_HAVE_I2C2=y
+CONFIG_STM32_HAVE_I2C3=y
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKPSRAM is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CAN2 is not set
+# CONFIG_STM32_CCMDATARAM is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_CRYP is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_DAC1 is not set
+# CONFIG_STM32_DAC2 is not set
+# CONFIG_STM32_DCMI is not set
+# CONFIG_STM32_ETHMAC is not set
+# CONFIG_STM32_FSMC is not set
+# CONFIG_STM32_HASH is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_I2C3 is not set
+# CONFIG_STM32_OTGFS is not set
+# CONFIG_STM32_OTGHS is not set
+CONFIG_STM32_PWR=y
+# CONFIG_STM32_RNG is not set
+# CONFIG_STM32_SDIO is not set
+# CONFIG_STM32_SPI1 is not set
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SYSCFG=y
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+# CONFIG_STM32_TIM9 is not set
+# CONFIG_STM32_TIM10 is not set
+# CONFIG_STM32_TIM11 is not set
+# CONFIG_STM32_TIM12 is not set
+# CONFIG_STM32_TIM13 is not set
+# CONFIG_STM32_TIM14 is not set
+# CONFIG_STM32_USART1 is not set
+# CONFIG_STM32_USART2 is not set
+CONFIG_STM32_USART3=y
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USART6 is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_FLASH_PREFETCH is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+# CONFIG_STM32_JTAG_FULL_ENABLE is not set
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+CONFIG_STM32_JTAG_SW_ENABLE=y
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+CONFIG_STM32_CCMEXCLUDE=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM2_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+# CONFIG_STM32_TIM9_CAP is not set
+# CONFIG_STM32_TIM10_CAP is not set
+# CONFIG_STM32_TIM11_CAP is not set
+# CONFIG_STM32_TIM12_CAP is not set
+# CONFIG_STM32_TIM13_CAP is not set
+# CONFIG_STM32_TIM14_CAP is not set
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART3_SERIALDRIVER=y
+# CONFIG_STM32_USART3_1WIREDRIVER is not set
+# CONFIG_USART3_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+# CONFIG_STM32_HAVE_RTC_COUNTER is not set
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=16717
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=131072
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_OLIMEX_STM32H407 is not set
+# CONFIG_ARCH_BOARD_OLIMEX_STM32E407 is not set
+CONFIG_ARCH_BOARD_OLIMEX_STM32P407=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="olimex-stm32-p407"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+CONFIG_ARCH_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2013
+CONFIG_START_MONTH=1
+CONFIG_START_DAY=1
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=8
+CONFIG_WDOG_INTRESERVE=1
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_SPINLOCK is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=32
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+CONFIG_BOARD_INITIALIZE=y
+# CONFIG_BOARD_INITTHREAD is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+CONFIG_DISABLE_POLL=y
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+CONFIG_USART3_SERIALDRIVER=y
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART3_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART3 Configuration
+#
+CONFIG_USART3_RXBUFSIZE=256
+CONFIG_USART3_TXBUFSIZE=256
+CONFIG_USART3_BAUD=115200
+CONFIG_USART3_BITS=8
+CONFIG_USART3_PARITY=0
+CONFIG_USART3_2STOP=0
+# CONFIG_USART3_IFLOWCONTROL is not set
+# CONFIG_USART3_OFLOWCONTROL is not set
+# CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+CONFIG_FS_READABLE=y
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+CONFIG_NSH_DISABLE_GET=y
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+CONFIG_NSH_DISABLE_PUT=y
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+CONFIG_NSH_DISABLE_WGET=y
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+# CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+# CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-stm32-p407/nsh/setenv.sh b/configs/olimex-stm32-p407/nsh/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..6d260da852fffe5ad81fec5c2eda91e501a9c0bc
--- /dev/null
+++ b/configs/olimex-stm32-p407/nsh/setenv.sh
@@ -0,0 +1,80 @@
+#!/bin/bash
+# configs/olimex-stm32-p407/nsh/setenv.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# These are the Cygwin paths to the locations where I installed the Atollic
+# toolchain under windows.  You will also have to edit this if you install
+# the Atollic toolchain in any other location.  /usr/bin is added before
+# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
+# at those locations as well.
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/olimex-stm32-p407/scripts/flash.ld b/configs/olimex-stm32-p407/scripts/flash.ld
new file mode 100644
index 0000000000000000000000000000000000000000..e819be42da74285d5178634833ac9e0be03aed69
--- /dev/null
+++ b/configs/olimex-stm32-p407/scripts/flash.ld
@@ -0,0 +1,121 @@
+/****************************************************************************
+ * configs/olimex-stm32-p407/scripts/flash.ld
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* The STM32F407VG has 1024Kb of FLASH beginning at address 0x0800:0000 and
+ * 192Kb of SRAM. SRAM is split up into three blocks:
+ *
+ * 1) 112Kb of SRAM beginning at address 0x2000:0000
+ * 2)  16Kb of SRAM beginning at address 0x2001:c000
+ * 3)  64Kb of CCM SRAM beginning at address 0x1000:0000
+ *
+ * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
+ * where the code expects to begin execution by jumping to the entry point in
+ * the 0x0800:0000 address range.
+ */
+
+MEMORY
+{
+	flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
+	sram (rwx) : ORIGIN = 0x20000000, LENGTH = 112K
+}
+
+OUTPUT_ARCH(arm)
+ENTRY(_stext)
+SECTIONS
+{
+	.text : {
+		_stext = ABSOLUTE(.);
+		*(.vectors)
+		*(.text .text.*)
+		*(.fixup)
+		*(.gnu.warning)
+		*(.rodata .rodata.*)
+		*(.gnu.linkonce.t.*)
+		*(.glue_7)
+		*(.glue_7t)
+		*(.got)
+		*(.gcc_except_table)
+		*(.gnu.linkonce.r.*)
+		_etext = ABSOLUTE(.);
+	} > flash
+
+	.init_section : {
+		_sinit = ABSOLUTE(.);
+		*(.init_array .init_array.*)
+		_einit = ABSOLUTE(.);
+	} > flash
+
+	.ARM.extab : {
+		*(.ARM.extab*)
+	} > flash
+
+	__exidx_start = ABSOLUTE(.);
+	.ARM.exidx : {
+		*(.ARM.exidx*)
+	} > flash
+	__exidx_end = ABSOLUTE(.);
+
+	_eronly = ABSOLUTE(.);
+
+	.data : {
+		_sdata = ABSOLUTE(.);
+		*(.data .data.*)
+		*(.gnu.linkonce.d.*)
+		CONSTRUCTORS
+		_edata = ABSOLUTE(.);
+	} > sram AT > flash
+
+	.bss : {
+		_sbss = ABSOLUTE(.);
+		*(.bss .bss.*)
+		*(.gnu.linkonce.b.*)
+		*(COMMON)
+		_ebss = ABSOLUTE(.);
+	} > sram
+
+	/* Stabs debugging sections. */
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_info 0 : { *(.debug_info) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/olimex-stm32-p407/scripts/kernel-space.ld b/configs/olimex-stm32-p407/scripts/kernel-space.ld
new file mode 100644
index 0000000000000000000000000000000000000000..6fc5232b912d2fc97756156e992d43273a987e98
--- /dev/null
+++ b/configs/olimex-stm32-p407/scripts/kernel-space.ld
@@ -0,0 +1,111 @@
+/****************************************************************************
+ * configs/olimex-stm32-p407/scripts/kernel-space.ld
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* NOTE:  This depends on the memory.ld script having been included prior to
+ * this script.
+ */
+
+OUTPUT_ARCH(arm)
+EXTERN(_vectors)
+ENTRY(_stext)
+
+SECTIONS
+{
+    .text : {
+        _stext = ABSOLUTE(.);
+        *(.vectors)
+        *(.text .text.*)
+        *(.fixup)
+        *(.gnu.warning)
+        *(.rodata .rodata.*)
+        *(.gnu.linkonce.t.*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.got)
+        *(.gcc_except_table)
+        *(.gnu.linkonce.r.*)
+        _etext = ABSOLUTE(.);
+    } > kflash
+
+    .init_section : {
+        _sinit = ABSOLUTE(.);
+        *(.init_array .init_array.*)
+        _einit = ABSOLUTE(.);
+    } > kflash
+
+    .ARM.extab : {
+        *(.ARM.extab*)
+    } > kflash
+
+    __exidx_start = ABSOLUTE(.);
+    .ARM.exidx : {
+        *(.ARM.exidx*)
+    } > kflash
+
+    __exidx_end = ABSOLUTE(.);
+
+    _eronly = ABSOLUTE(.);
+
+    .data : {
+        _sdata = ABSOLUTE(.);
+        *(.data .data.*)
+        *(.gnu.linkonce.d.*)
+        CONSTRUCTORS
+        _edata = ABSOLUTE(.);
+    } > ksram AT > kflash
+
+    .bss : {
+        _sbss = ABSOLUTE(.);
+        *(.bss .bss.*)
+        *(.gnu.linkonce.b.*)
+        *(COMMON)
+        _ebss = ABSOLUTE(.);
+    } > ksram
+
+    /* Stabs debugging sections */
+
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+    .stab.excl 0 : { *(.stab.excl) }
+    .stab.exclstr 0 : { *(.stab.exclstr) }
+    .stab.index 0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment 0 : { *(.comment) }
+    .debug_abbrev 0 : { *(.debug_abbrev) }
+    .debug_info 0 : { *(.debug_info) }
+    .debug_line 0 : { *(.debug_line) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/olimex-stm32-p407/scripts/memory.ld b/configs/olimex-stm32-p407/scripts/memory.ld
new file mode 100644
index 0000000000000000000000000000000000000000..3a118668b735006cb5df320a7d4f8154615df810
--- /dev/null
+++ b/configs/olimex-stm32-p407/scripts/memory.ld
@@ -0,0 +1,100 @@
+/****************************************************************************
+ * configs/olimex-stm32-p407/scripts/memory.ld
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* The STM32F407VG has 1024Kb of FLASH beginning at address 0x0800:0000 and
+ * 192Kb of SRAM. SRAM is split up into three blocks:
+ *
+ * 1) 112KB of SRAM beginning at address 0x2000:0000
+ * 2)  16KB of SRAM beginning at address 0x2001:c000
+ * 3)  64KB of CCM SRAM beginning at address 0x1000:0000
+ *
+ * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
+ * where the code expects to begin execution by jumping to the entry point in
+ * the 0x0800:0000 address range.
+ *
+ * For MPU support, the kernel-mode NuttX section is assumed to be 128Kb of
+ * FLASH and 4Kb of SRAM.  That is an excessive amount for the kernel which
+ * should fit into 64KB and, of course, can be optimized as needed (See
+ * also configs/stm32f4discovery/scripts/kernel-space.ld).  Allowing the
+ * additional does permit addition debug instrumentation to be added to the
+ * kernel space without overflowing the partition.
+ *
+ * Alignment of the user space FLASH partition is also a critical factor:
+ * The user space FLASH partition will be spanned with a single region of
+ * size 2**n bytes.  The alignment of the user-space region must be the same.
+ * As a consequence, as the user-space increases in size, the alignmment
+ * requirement also increases.
+ *
+ * This alignment requirement means that the largest user space FLASH region
+ * you can have will be 512KB at it would have to be positioned at
+ * 0x08800000.  If you change this address, don't forget to change the
+ * CONFIG_NUTTX_USERSPACE configuration setting to match and to modify
+ * the check in kernel/userspace.c.
+ *
+ * For the same reasons, the maximum size of the SRAM mapping is limited to
+ * 4KB.  Both of these alignment limitations could be reduced by using
+ * multiple regions to map the FLASH/SDRAM range or perhaps with some
+ * clever use of subregions.
+ *
+ * A detailed memory map for the 112KB SRAM region is as follows:
+ *
+ *   0x20000 0000:  Kernel .data region.  Typical size: 0.1KB
+ *   ------- ----   Kernel .bss  region.  Typical size: 1.8KB
+ *   0x20000 0800:  Kernel IDLE thread stack (approximate).  Size is
+ *                  determined by CONFIG_IDLETHREAD_STACKSIZE and
+ *                  adjustments for alignment.  Typical is 1KB.
+ *   ------- ----   Padded to 4KB
+ *   0x20000 1000:  User .data region.  Size is variable.
+ *   ------- ----   User .bss region  Size is variable.
+ *   0x20000 2000:  Beginning of kernel heap.  Size determined by
+ *                  CONFIG_MM_KERNEL_HEAPSIZE.
+ *   ------- ----   Beginning of user heap.  Can vary with other settings.
+ *   0x20001 c000:  End+1 of CPU RAM
+ */
+
+MEMORY
+{
+    /* 1024Kb FLASH */
+
+    kflash (rx)      : ORIGIN = 0x08000000, LENGTH = 128K
+    uflash (rx)      : ORIGIN = 0x08020000, LENGTH = 128K
+    xflash (rx)      : ORIGIN = 0x08040000, LENGTH = 768K
+
+    /* 112Kb of contiguous SRAM */
+
+    ksram (rwx)      : ORIGIN = 0x20000000, LENGTH = 4K
+    usram (rwx)      : ORIGIN = 0x20001000, LENGTH = 4K
+    xsram (rwx)      : ORIGIN = 0x20002000, LENGTH = 104K
+}
diff --git a/configs/olimex-stm32-p407/scripts/user-space.ld b/configs/olimex-stm32-p407/scripts/user-space.ld
new file mode 100644
index 0000000000000000000000000000000000000000..351d825aad449bf800a226b9706d8c2b2657eb99
--- /dev/null
+++ b/configs/olimex-stm32-p407/scripts/user-space.ld
@@ -0,0 +1,126 @@
+/****************************************************************************
+ * configs/olimex-stm32-p407/scripts/user-space.ld
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* NOTE:  This depends on the memory.ld script having been included prior to
+ * this script.
+ */
+
+/* Make sure that the critical memory management functions are in user-space.
+ * the user heap memory manager will reside in user-space but be usable both
+ * by kernel- and user-space code
+ */
+
+EXTERN(umm_initialize)
+EXTERN(umm_addregion)
+EXTERN(umm_trysemaphore)
+EXTERN(umm_givesemaphore)
+
+EXTERN(malloc)
+EXTERN(realloc)
+EXTERN(zalloc)
+EXTERN(free)
+
+OUTPUT_ARCH(arm)
+SECTIONS
+{
+    .userspace : {
+        *(.userspace)
+    } > uflash
+
+    .text : {
+        _stext = ABSOLUTE(.);
+        *(.text .text.*)
+        *(.fixup)
+        *(.gnu.warning)
+        *(.rodata .rodata.*)
+        *(.gnu.linkonce.t.*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.got)
+        *(.gcc_except_table)
+        *(.gnu.linkonce.r.*)
+        _etext = ABSOLUTE(.);
+    } > uflash
+
+    .init_section : {
+        _sinit = ABSOLUTE(.);
+        *(.init_array .init_array.*)
+        _einit = ABSOLUTE(.);
+    } > uflash
+
+    .ARM.extab : {
+        *(.ARM.extab*)
+    } > uflash
+
+    __exidx_start = ABSOLUTE(.);
+    .ARM.exidx : {
+        *(.ARM.exidx*)
+    } > uflash
+
+    __exidx_end = ABSOLUTE(.);
+
+    _eronly = ABSOLUTE(.);
+
+    .data : {
+        _sdata = ABSOLUTE(.);
+        *(.data .data.*)
+        *(.gnu.linkonce.d.*)
+        CONSTRUCTORS
+        _edata = ABSOLUTE(.);
+    } > usram AT > uflash
+
+    .bss : {
+        _sbss = ABSOLUTE(.);
+        *(.bss .bss.*)
+        *(.gnu.linkonce.b.*)
+        *(COMMON)
+        _ebss = ABSOLUTE(.);
+    } > usram
+
+    /* Stabs debugging sections */
+
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+    .stab.excl 0 : { *(.stab.excl) }
+    .stab.exclstr 0 : { *(.stab.exclstr) }
+    .stab.index 0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment 0 : { *(.comment) }
+    .debug_abbrev 0 : { *(.debug_abbrev) }
+    .debug_info 0 : { *(.debug_info) }
+    .debug_line 0 : { *(.debug_line) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/olimex-stm32-p407/src/Makefile b/configs/olimex-stm32-p407/src/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..6c580d3f096c5d01ddc0bfc0a216b5c099d37582
--- /dev/null
+++ b/configs/olimex-stm32-p407/src/Makefile
@@ -0,0 +1,72 @@
+############################################################################
+# configs/olimex-stm32-p407/src/Makefile
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+ASRCS =
+CSRCS = stm32_boot.c stm32_bringup.c
+
+ifeq ($(CONFIG_ARCH_LEDS),y)
+CSRCS += stm32_autoleds.c
+else
+CSRCS += stm32_userleds.c
+endif
+
+ifeq ($(CONFIG_ARCH_BUTTONS),y)
+CSRCS +=  stm32_buttons.c
+endif
+
+
+ifeq ($(CONFIG_STM32_FSMC),y)
+CSRCS += stm32_sram.c
+endif
+
+ifeq ($(CONFIG_STM32_OTGFS),y)
+CSRCS += stm32_usb.c
+endif
+
+ifeq ($(CONFIG_LIB_BOARDCTL),y)
+CSRCS += stm32_appinit.c
+endif
+
+ifeq ($(CONFIG_ADC),y)
+CSRCS +=  stm32_adc.c
+endif
+
+ifeq ($(CONFIG_CAN),y)
+CSRCS += stm32_can.c
+endif
+
+include $(TOPDIR)/configs/Board.mk
diff --git a/configs/olimex-stm32-p407/src/olimex-stm32-p407.h b/configs/olimex-stm32-p407/src/olimex-stm32-p407.h
new file mode 100644
index 0000000000000000000000000000000000000000..76cc41e860432ea1f03fdbc6297aa592a3ca5504
--- /dev/null
+++ b/configs/olimex-stm32-p407/src/olimex-stm32-p407.h
@@ -0,0 +1,275 @@
+/****************************************************************************
+ * configs/olimex-stm32-p107/src/olimex-stm32-p407.h
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Derives from a file of a similar name for the Olimex STM32 P207:
+ *
+ *   Copyright (C) 2013 Max Holtzberg. All rights reserved.
+ *   Author: Max Holtzberg 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __CONFIGS_OLIMEX_STM32_P407_SRC_H
+#define __CONFIGS_OLIMEX_STM32_P407_SRC_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+/* Assume that we support everything until convinced otherwise */
+
+#define HAVE_MMCSD      1
+#define HAVE_USBDEV     1
+#define HAVE_USBHOST    1
+#define HAVE_USBMONITOR 1
+
+/* Can't support MMC/SD features if mountpoints are disabled or if SDIO support
+ * is not enabled.
+ */
+
+#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_STM32_SDIO) || \
+   !defined(CONFIG_MMCSD_SDIO)
+#  undef HAVE_MMCSD
+#endif
+
+/* Default MMC/SD minor number */
+
+#ifdef HAVE_MMCSD
+
+/* Default MMC/SD SLOT number */
+
+#  if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != 0
+#    error Only one MMC/SD slot
+#    undef CONFIG_NSH_MMCSDSLOTNO
+#  endif
+
+#  ifdef CONFIG_NSH_MMCSDSLOTNO
+#    define MMCSD_SLOTNO CONFIG_NSH_MMCSDSLOTNO
+#  else
+#    define MMCSD_SLOTNO 0
+#  endif
+
+/* Default minor device number */
+
+#  ifdef CONFIG_NSH_MMCSDMINOR
+#    define MMCSD_MINOR CONFIG_NSH_MMCSDMINOR
+#  else
+#    define MMCSD_MINOR 0
+#  endif
+#endif
+
+/* Can't support USB host or device features if USB OTG FS is not enabled */
+
+#ifndef CONFIG_STM32_OTGFS
+#  undef HAVE_USBDEV
+#  undef HAVE_USBHOST
+#  undef HAVE_USBMONITOR
+#endif
+
+/* Can't support USB device monitor if USB device is not enabled */
+
+#ifndef CONFIG_USBDEV
+#  undef HAVE_USBDEV
+#  undef HAVE_USBMONITOR
+#endif
+
+/* Can't support USB host is USB host is not enabled */
+
+#ifndef CONFIG_USBHOST
+#  undef HAVE_USBHOST
+#endif
+
+/* Check if we should enable the USB monitor before starting NSH */
+
+#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_USBMONITOR)
+#  undef HAVE_USBMONITOR
+#endif
+
+
+/* Olimex-STM32-P407 GPIOs **************************************************/
+/* LEDs */
+
+#define GPIO_LED1         (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
+                           GPIO_OUTPUT_CLEAR|GPIO_PORTF|GPIO_PIN6)
+#define GPIO_LED2         (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
+                           GPIO_OUTPUT_CLEAR|GPIO_PORTF|GPIO_PIN7)
+#define GPIO_LED3         (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
+                           GPIO_OUTPUT_CLEAR|GPIO_PORTF|GPIO_PIN8)
+#define GPIO_LED4         (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
+                           GPIO_OUTPUT_CLEAR|GPIO_PORTF|GPIO_PIN9)
+
+/* BUTTONS -- NOTE that all have EXTI interrupts configured */
+
+#define MIN_IRQBUTTON     BUTTON_TAMPER
+#define MAX_IRQBUTTON     BUTTON_CENTER
+#define NUM_IRQBUTTONS    7
+
+#define GPIO_BTN_TAMPER   (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN13)
+#define GPIO_BTN_WKUP     (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN0)
+#define GPIO_BTN_RIGHT    (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTG|GPIO_PIN6)
+#define GPIO_BTN_UP       (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTG|GPIO_PIN7)
+#define GPIO_BTN_LEFT     (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTG|GPIO_PIN11)
+#define GPIO_BTN_DOWN     (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTG|GPIO_PIN8)
+#define GPIO_BTN_CENTER   (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTG|GPIO_PIN15)
+
+/* USB OTG FS
+ *
+ * PA9  OTG_FS_VBUS VBUS sensing (also connected to the green LED)
+ * PC2  OTG_FS_PowerSwitchOn
+ * PB10 OTG_FS_Overcurrent
+ */
+
+#define GPIO_OTGFS_VBUS   (GPIO_INPUT|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN9)
+#define GPIO_OTGFS_PWRON  (GPIO_OUTPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN2)
+
+#ifdef CONFIG_USBHOST
+#  define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTB|GPIO_PIN10)
+
+#else
+#  define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN10)
+#endif
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_bringup
+ *
+ * Description:
+ *   Perform architecture-specific initialization
+ *
+ *   CONFIG_BOARD_INITIALIZE=y :
+ *     Called from board_initialize().
+ *
+ *   CONFIG_BOARD_INITIALIZE=y && CONFIG_LIB_BOARDCTL=y :
+ *     Called from the NSH library
+ *
+ ************************************************************************************/
+
+int stm32_bringup(void);
+
+/************************************************************************************
+ * Name: stm32_stram_configure
+ *
+ * Description:
+ *   Initialize to access external SRAM.  SRAM will be visible at the FSMC Bank
+ *   NOR/SRAM2 base address (0x64000000)
+ *
+ *   General transaction rules.  The requested AHB transaction data size can be 8-,
+ *   16- or 32-bit wide whereas the SRAM has a fixed 16-bit data width. Some simple
+ *   transaction rules must be followed:
+ *
+ *   Case 1: AHB transaction width and SRAM data width are equal
+ *     There is no issue in this case.
+ *   Case 2: AHB transaction size is greater than the memory size
+ *     In this case, the FSMC splits the AHB transaction into smaller consecutive
+ *     memory accesses in order to meet the external data width.
+ *   Case 3: AHB transaction size is smaller than the memory size.
+ *     SRAM supports the byte select feature.
+ *     a) FSMC allows write transactions accessing the right data through its
+ *        byte lanes (NBL[1:0])
+ *     b) Read transactions are allowed (the controller reads the entire memory
+ *        word and uses the needed byte only). The NBL[1:0] are always kept low
+ *        during read transactions.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32_FSMC
+void stm32_stram_configure(void);
+#endif
+
+/************************************************************************************
+ * Name: stm32_usb_configure
+ *
+ * Description:
+ *   Called from stm32_boardinitialize very early in inialization to setup USB-related
+ *   GPIO pins for the STM32F4Discovery board.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32_OTGFS
+void weak_function stm32_usb_configure(void);
+#endif
+
+/************************************************************************************
+ * Name: stm32_usbhost_setup
+ *
+ * Description:
+ *   Called at application startup time to initialize the USB host functionality.
+ *   This function will start a thread that will monitor for device connection/
+ *   disconnection events.
+ *
+ ************************************************************************************/
+
+#if defined(CONFIG_STM32_OTGFS) && defined(CONFIG_USBHOST)
+int stm32_usbhost_setup(void);
+#endif
+
+/************************************************************************************
+ * Name: stm32_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ADC
+int stm32_adc_setup(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_can_setup
+ *
+ * Description:
+ *  Initialize CAN and register the CAN device
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CAN
+int stm32_can_setup(void);
+#endif
+
+#endif  /* __ASSEMBLY__ */
+#endif /* __CONFIGS_OLIMEX_STM32_P407_SRC_H */
diff --git a/configs/olimex-stm32-p407/src/stm32_adc.c b/configs/olimex-stm32-p407/src/stm32_adc.c
new file mode 100644
index 0000000000000000000000000000000000000000..ec5af2576fa83f483e2445c72259adf197046c8b
--- /dev/null
+++ b/configs/olimex-stm32-p407/src/stm32_adc.c
@@ -0,0 +1,161 @@
+/************************************************************************************
+ * configs/olimex-stm32-p407/src/stm32_adc.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "chip.h"
+#include "stm32_adc.h"
+#include "olimex-stm32-p407.h"
+
+#ifdef CONFIG_ADC
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Configuration ********************************************************************/
+/* Up to 3 ADC interfaces are supported */
+
+#if STM32_NADC < 3
+#  undef CONFIG_STM32_ADC3
+#endif
+
+#if STM32_NADC < 2
+#  undef CONFIG_STM32_ADC2
+#endif
+
+#if STM32_NADC < 1
+#  undef CONFIG_STM32_ADC1
+#endif
+
+#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || defined(CONFIG_STM32_ADC3)
+#ifndef CONFIG_STM32_ADC1
+#  warning "Channel information only available for ADC1"
+#endif
+
+/* The number of ADC channels in the conversion list */
+
+#define ADC1_NCHANNELS 1
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+/* The Olimex STM32-P407 has a 10 Kohm potentiometer AN_TR connected to PC0
+ * ADC123_IN10
+ */
+
+/* Identifying number of each ADC channel: Variable Resistor. */
+
+#ifdef CONFIG_STM32_ADC1
+static const uint8_t  g_chanlist[ADC1_NCHANNELS] = {10};
+
+/* Configurations of pins used byte each ADC channels */
+
+static const uint32_t g_pinlist[ADC1_NCHANNELS]  = {GPIO_ADC1_IN10};
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+int stm32_adc_setup(void)
+{
+#ifdef CONFIG_STM32_ADC1
+  static bool initialized = false;
+  struct adc_dev_s *adc;
+  int ret;
+  int i;
+
+  /* Check if we have already initialized */
+
+  if (!initialized)
+    {
+      /* Configure the pins as analog inputs for the selected channels */
+
+      for (i = 0; i < ADC1_NCHANNELS; i++)
+        {
+          stm32_configgpio(g_pinlist[i]);
+        }
+
+      /* Call stm32_adcinitialize() to get an instance of the ADC interface */
+
+      adc = stm32_adcinitialize(1, g_chanlist, ADC1_NCHANNELS);
+      if (adc == NULL)
+        {
+          aerr("ERROR: Failed to get ADC interface\n");
+          return -ENODEV;
+        }
+
+      /* Register the ADC driver at "/dev/adc0" */
+
+      ret = adc_register("/dev/adc0", adc);
+      if (ret < 0)
+        {
+          aerr("ERROR: adc_register failed: %d\n", ret);
+          return ret;
+        }
+
+      /* Now we are initialized */
+
+      initialized = true;
+    }
+
+  return OK;
+#else
+  return -ENOSYS;
+#endif
+}
+
+#endif /* CONFIG_STM32_ADC1 || CONFIG_STM32_ADC2 || CONFIG_STM32_ADC3 */
+#endif /* CONFIG_ADC */
diff --git a/configs/olimex-stm32-p407/src/stm32_appinit.c b/configs/olimex-stm32-p407/src/stm32_appinit.c
new file mode 100644
index 0000000000000000000000000000000000000000..a0a6d02d0f10030fe772fde348b512d3f79104a7
--- /dev/null
+++ b/configs/olimex-stm32-p407/src/stm32_appinit.c
@@ -0,0 +1,98 @@
+/****************************************************************************
+ * config/olimex-stm32-p407/src/stm32_appinit.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include "olimex-stm32-p407.h"
+
+#ifdef CONFIG_LIB_BOARDCTL
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ *   Perform application specific initialization.  This function is never
+ *   called directly from application code, but only indirectly via the
+ *   (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ *   CONFIG_LIB_BOARDCTL=y :
+ *     Called from the NSH library
+ *
+ *   CONFIG_BOARD_INITIALIZE=y, CONFIG_NSH_LIBRARY=y, &&
+ *   CONFIG_LIB_BOARDCTL=n :
+ *     Called from board_initialize().
+ *
+ * Input Parameters:
+ *   arg - The boardctl() argument is passed to the board_app_initialize()
+ *         implementation without modification.  The argument has no
+ *         meaning to NuttX; the meaning of the argument is a contract
+ *         between the board-specific initalization logic and the the
+ *         matching application logic.  The value cold be such things as a
+ *         mode enumeration value, a set of DIP switch switch settings, a
+ *         pointer to configuration data read from a file or serial FLASH,
+ *         or whatever you would like to do with it.  Every implementation
+ *         should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+int board_app_initialize(uintptr_t arg)
+{
+  /* Did we already initialize via board_initialize()? */
+
+#ifndef CONFIG_BOARD_INITIALIZE
+  return stm32_bringup();
+#else
+  return OK;
+#endif
+}
+
+#endif /* CONFIG_LIB_BOARDCTL */
diff --git a/configs/olimex-stm32-p407/src/stm32_autoleds.c b/configs/olimex-stm32-p407/src/stm32_autoleds.c
new file mode 100644
index 0000000000000000000000000000000000000000..200c827012f5572abe6f11c39bd6c8c37fd1ce87
--- /dev/null
+++ b/configs/olimex-stm32-p407/src/stm32_autoleds.c
@@ -0,0 +1,172 @@
+/****************************************************************************
+ * configs/olimex-stm32-p407/src/stm32_autoleds.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "stm32.h"
+#include "olimex-stm32-p407.h"
+
+#ifdef CONFIG_ARCH_LEDS
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* The following definitions map the encoded LED setting to GPIO settings */
+
+#define LED_STARTED_BITS             (BOARD_LED1_BIT)
+#define LED_HEAPALLOCATE_BITS        (BOARD_LED2_BIT)
+#define LED_IRQSENABLED_BITS         (BOARD_LED1_BIT | BOARD_LED2_BIT)
+#define LED_STACKCREATED_BITS        (BOARD_LED3_BIT)
+#define LED_INIRQ_BITS               (BOARD_LED1_BIT | BOARD_LED3_BIT)
+#define LED_SIGNAL_BITS              (BOARD_LED2_BIT | BOARD_LED3_BIT)
+#define LED_ASSERTION_BITS           (BOARD_LED1_BIT | BOARD_LED2_BIT | BOARD_LED3_BIT)
+#define LED_PANIC_BITS               (BOARD_LED4_BIT)
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const unsigned int g_ledbits[8] =
+{
+  LED_STARTED_BITS,
+  LED_HEAPALLOCATE_BITS,
+  LED_IRQSENABLED_BITS,
+  LED_STACKCREATED_BITS,
+  LED_INIRQ_BITS,
+  LED_SIGNAL_BITS,
+  LED_ASSERTION_BITS,
+  LED_PANIC_BITS
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+static inline void led_clrbits(unsigned int clrbits)
+{
+  if ((clrbits & BOARD_LED1_BIT) != 0)
+    {
+      stm32_gpiowrite(GPIO_LED1, false);
+    }
+
+  if ((clrbits & BOARD_LED2_BIT) != 0)
+    {
+      stm32_gpiowrite(GPIO_LED2, false);
+    }
+
+  if ((clrbits & BOARD_LED3_BIT) != 0)
+    {
+      stm32_gpiowrite(GPIO_LED3, false);
+    }
+
+  if ((clrbits & BOARD_LED4_BIT) != 0)
+    {
+      stm32_gpiowrite(GPIO_LED4, false);
+    }
+}
+
+static inline void led_setbits(unsigned int setbits)
+{
+  if ((setbits & BOARD_LED1_BIT) != 0)
+    {
+      stm32_gpiowrite(GPIO_LED1, true);
+    }
+
+  if ((setbits & BOARD_LED2_BIT) != 0)
+    {
+      stm32_gpiowrite(GPIO_LED2, true);
+    }
+
+  if ((setbits & BOARD_LED3_BIT) != 0)
+    {
+      stm32_gpiowrite(GPIO_LED3, true);
+    }
+
+  if ((setbits & BOARD_LED4_BIT) != 0)
+    {
+      stm32_gpiowrite(GPIO_LED4, true);
+    }
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_autoled_initialize
+ ****************************************************************************/
+
+void board_autoled_initialize(void)
+{
+   /* Configure LED1-4 GPIOs for output */
+
+   stm32_configgpio(GPIO_LED1);
+   stm32_configgpio(GPIO_LED2);
+   stm32_configgpio(GPIO_LED3);
+   stm32_configgpio(GPIO_LED4);
+}
+
+/****************************************************************************
+ * Name: board_autoled_on
+ ****************************************************************************/
+
+void board_autoled_on(int led)
+{
+  led_clrbits(BOARD_LED1_BIT | BOARD_LED2_BIT | BOARD_LED3_BIT | BOARD_LED4_BIT);
+  led_setbits(g_ledbits[led]);
+}
+
+/****************************************************************************
+ * Name: board_autoled_off
+ ****************************************************************************/
+
+void board_autoled_off(int led)
+{
+  led_clrbits(g_ledbits[led]);
+}
+
+#endif /* CONFIG_ARCH_LEDS */
diff --git a/configs/olimex-stm32-p407/src/stm32_boot.c b/configs/olimex-stm32-p407/src/stm32_boot.c
new file mode 100644
index 0000000000000000000000000000000000000000..f52fe6d2e034b5aa35e0004057cc58b409111a88
--- /dev/null
+++ b/configs/olimex-stm32-p407/src/stm32_boot.c
@@ -0,0 +1,118 @@
+/************************************************************************************
+ * configs/olimex-stm32-p407/src/stm32_boot.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include "olimex-stm32-p407.h"
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.  This entry point
+ *   is called early in the intitialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void stm32_boardinitialize(void)
+{
+#ifdef CONFIG_STM32_FSMC
+  /* If the FSMC is enabled, then enable SRAM access */
+
+  stm32_stram_configure();
+#endif
+
+  /* Initialize USB if the 1) OTG FS controller is in the configuration and 2)
+   * disabled, and 3) the weak function stm32_usb_configure() has been brought
+   * into the build. Presumeably either CONFIG_USBDEV or CONFIG_USBHOST is also
+   * selected.
+   */
+
+#ifdef CONFIG_STM32_OTGFS
+  if (stm32_usb_configure)
+    {
+      stm32_usb_configure();
+    }
+#endif
+
+  /* Configure on-board LEDs if LED support has been selected. */
+
+#ifdef CONFIG_ARCH_LEDS
+  board_autoled_initialize();
+#endif
+
+  /* Configure on-board BUTTONs if BUTTON support has been selected. */
+
+#ifdef CONFIG_ARCH_BUTTONS
+  board_button_initialize();
+#endif
+}
+
+/****************************************************************************
+ * Name: board_initialize
+ *
+ * Description:
+ *   If CONFIG_BOARD_INITIALIZE is selected, then an additional
+ *   initialization call will be performed in the boot-up sequence to a
+ *   function called board_initialize().  board_initialize() will be
+ *   called immediately after up_initialize() is called and just before the
+ *   initial application is started.  This additional initialization phase
+ *   may be used, for example, to initialize board-specific device drivers.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BOARD_INITIALIZE
+void board_initialize(void)
+{
+  /* Perform board-specific initialization here if so configured */
+
+  (void)stm32_bringup();
+}
+#endif
diff --git a/configs/olimex-stm32-p407/src/stm32_bringup.c b/configs/olimex-stm32-p407/src/stm32_bringup.c
new file mode 100644
index 0000000000000000000000000000000000000000..2529cbd87a41b5c6651426ba38c104dd81ec2e1b
--- /dev/null
+++ b/configs/olimex-stm32-p407/src/stm32_bringup.c
@@ -0,0 +1,185 @@
+/****************************************************************************
+ * config/olimex-stm32-p407/src/stm32_bringup.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_USBMONITOR
+#  include 
+#endif
+
+#ifdef CONFIG_STM32_OTGFS
+#  include "stm32_usbhost.h"
+#endif
+
+#include "stm32.h"
+#include "olimex-stm32-p407.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_bringup
+ *
+ * Description:
+ *   Perform architecture-specific initialization
+ *
+ *   CONFIG_BOARD_INITIALIZE=y :
+ *     Called from board_initialize().
+ *
+ *   CONFIG_BOARD_INITIALIZE=n && CONFIG_LIB_BOARDCTL=y :
+ *     Called from the NSH library
+ *
+ ****************************************************************************/
+
+int stm32_bringup(void)
+{
+#ifdef HAVE_MMCSD
+  FAR struct sdio_dev_s *sdio;
+#endif
+  int ret;
+
+#ifdef CONFIG_FS_PROCFS
+  /* Mount the procfs file system */
+
+  ret = mount(NULL, "/proc", "procfs", 0, NULL);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to mount procfs at /proc: %d\n", ret);
+    }
+#endif
+
+#ifdef HAVE_MMCSD
+  /* Mount the SDIO-based MMC/SD block driver */
+  /* First, get an instance of the SDIO interface */
+
+  sdio = sdio_initialize(MMCSD_SLOTNO);
+  if (!sdio)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to initialize SDIO slot %d\n",
+             MMCSD_SLOTNO);
+      return -ENODEV;
+    }
+
+  /* Now bind the SDIO interface to the MMC/SD driver */
+
+  ret = mmcsd_slotinitialize(MMCSD_MINOR, sdio);
+  if (ret != OK)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n",
+             ret);
+      return ret;
+    }
+
+  /* Then let's guess and say that there is a card in the slot.  The Olimex
+   * STM32 P407 does not support a GPIO to detect if there is a card in
+   * the slot so we are reduced to guessing.
+   */
+
+   sdio_mediachange(sdio, true);
+#endif
+
+#ifdef CONFIG_CAN
+  /* Initialize CAN and register the CAN driver. */
+
+  ret = stm32_can_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_can_setup failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_ADC
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = stm32_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_adc_setup failed: %d\n", ret);
+    }
+#endif
+
+#ifdef HAVE_USBHOST
+  /* Initialize USB host operation.  stm32_usbhost_setup() starts a thread
+   * will monitor for USB connection and disconnection events.
+   */
+
+  ret = stm32_usbhost_setup();
+  if (ret != OK)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to initialize USB host: %d\n", ret);
+      return ret;
+    }
+#endif
+
+#ifdef HAVE_USBMONITOR
+  /* Start the USB Monitor */
+
+  ret = usbmonitor_start();
+  if (ret != OK)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to start USB monitor: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_BUTTONS
+  /* Register the BUTTON driver */
+
+  ret = btn_lower_initialize("/dev/buttons");
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: btn_lower_initialize() failed: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
+  return OK;
+}
diff --git a/configs/olimex-stm32-p407/src/stm32_buttons.c b/configs/olimex-stm32-p407/src/stm32_buttons.c
new file mode 100644
index 0000000000000000000000000000000000000000..6add698e0faf7f8895d9530bd282d5cd63fe5116
--- /dev/null
+++ b/configs/olimex-stm32-p407/src/stm32_buttons.c
@@ -0,0 +1,188 @@
+/****************************************************************************
+ * configs/olimex-stm32-p407/src/stm32_buttons.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "stm32_gpio.h"
+
+#include "olimex-stm32-p407.h"
+
+#ifdef CONFIG_ARCH_BUTTONS
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Pin configuration for each STM32F4 Discovery button.  This array is indexed by
+ * the BUTTON_* definitions in board.h
+ */
+
+static const uint32_t g_buttons[NUM_BUTTONS] =
+{
+  GPIO_BTN_TAMPER,
+  GPIO_BTN_WKUP,
+  GPIO_BTN_RIGHT,
+  GPIO_BTN_UP,
+  GPIO_BTN_LEFT,
+  GPIO_BTN_DOWN,
+  GPIO_BTN_CENTER
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_button_initialize
+ *
+ * Description:
+ *   board_button_initialize() must be called to initialize button resources.  After
+ *   that, board_buttons() may be called to collect the current state of all
+ *   buttons or board_button_irq() may be called to register button interrupt
+ *   handlers.
+ *
+ ****************************************************************************/
+
+void board_button_initialize(void)
+{
+  int i;
+
+  /* Configure the GPIO pins as inputs.  NOTE that EXTI interrupts are
+   * configured for all pins.
+   */
+
+  for (i = 0; i < NUM_BUTTONS; i++)
+    {
+      stm32_configgpio(g_buttons[i]);
+    }
+}
+
+/****************************************************************************
+ * Name: board_buttons
+ ****************************************************************************/
+
+uint8_t board_buttons(void)
+{
+  uint8_t ret = 0;
+
+  /* Check that state of each key */
+
+  if (!stm32_gpioread(g_buttons[BUTTON_TAMPER]))
+    {
+      ret |= BUTTON_TAMPER_BIT;
+    }
+
+  if (stm32_gpioread(g_buttons[BUTTON_WKUP]))
+    {
+      ret |= BUTTON_WKUP_BIT;
+    }
+
+  if (stm32_gpioread(g_buttons[BUTTON_RIGHT]))
+    {
+      ret |= BUTTON_RIGHT_BIT;
+    }
+
+  if (stm32_gpioread(g_buttons[BUTTON_UP]))
+    {
+      ret |= BUTTON_UP_BIT;
+    }
+
+  if (stm32_gpioread(g_buttons[BUTTON_LEFT]))
+    {
+      ret |= BUTTON_LEFT_BIT;
+    }
+
+  if (stm32_gpioread(g_buttons[BUTTON_DOWN]))
+    {
+      ret |= BUTTON_DOWN_BIT;
+    }
+
+  if (stm32_gpioread(g_buttons[BUTTON_CENTER]))
+    {
+      ret |= BUTTON_CENTER_BIT;
+    }
+
+  return ret;
+}
+
+/************************************************************************************
+ * Button support.
+ *
+ * Description:
+ *   board_button_initialize() must be called to initialize button resources.  After
+ *   that, board_buttons() may be called to collect the current state of all
+ *   buttons or board_button_irq() may be called to register button interrupt
+ *   handlers.
+ *
+ *   After board_button_initialize() has been called, board_buttons() may be called to
+ *   collect the state of all buttons.  board_buttons() returns an 8-bit bit set
+ *   with each bit associated with a button.  See the BUTTON_*_BIT
+ *   definitions in board.h for the meaning of each bit.
+ *
+ *   board_button_irq() may be called to register an interrupt handler that will
+ *   be called when a button is depressed or released.  The ID value is a
+ *   button enumeration value that uniquely identifies a button resource. See the
+ *   BUTTON_* definitions in board.h for the meaning of enumeration
+ *   value.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ARCH_IRQBUTTONS
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
+{
+  int ret = -EINVAL;
+
+  /* The following should be atomic */
+
+  if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
+    {
+      ret = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler, arg);
+    }
+
+  return ret;
+}
+#endif
+#endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/olimex-stm32-p407/src/stm32_can.c b/configs/olimex-stm32-p407/src/stm32_can.c
new file mode 100644
index 0000000000000000000000000000000000000000..763df54e78a708af4b9b71e3a342a3cb5edd0c40
--- /dev/null
+++ b/configs/olimex-stm32-p407/src/stm32_can.c
@@ -0,0 +1,112 @@
+/************************************************************************************
+ * configs/olimex-stm32-p407/src/stm32_can.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "stm32.h"
+#include "stm32_can.h"
+#include "olimex-stm32-p407.h"
+
+#ifdef CONFIG_CAN
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Configuration ********************************************************************/
+
+#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2)
+#  warning "Both CAN1 and CAN2 are enabled.  Only CAN1 is connected."
+#  undef CONFIG_STM32_CAN2
+#endif
+
+#ifdef CONFIG_STM32_CAN1
+#  define CAN_PORT 1
+#else
+#  define CAN_PORT 2
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_can_setup
+ *
+ * Description:
+ *  Initialize CAN and register the CAN device
+ *
+ ************************************************************************************/
+
+int stm32_can_setup(void)
+{
+#if defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)
+  struct can_dev_s *can;
+  int ret;
+
+  /* Call stm32_caninitialize() to get an instance of the CAN interface */
+
+  can = stm32_caninitialize(CAN_PORT);
+  if (can == NULL)
+    {
+      canerr("ERROR:  Failed to get CAN interface\n");
+      return -ENODEV;
+    }
+
+  /* Register the CAN driver at "/dev/can0" */
+
+  ret = can_register("/dev/can0", can);
+  if (ret < 0)
+    {
+      canerr("ERROR: can_register failed: %d\n", ret);
+      return ret;
+    }
+
+  return OK;
+#else
+  return -ENODEV;
+#endif
+}
+
+#endif /* CONFIG_CAN */
diff --git a/configs/olimex-stm32-p407/src/stm32_sram.c b/configs/olimex-stm32-p407/src/stm32_sram.c
new file mode 100644
index 0000000000000000000000000000000000000000..3350c467af4597fde2305af298d8b678c1c41274
--- /dev/null
+++ b/configs/olimex-stm32-p407/src/stm32_sram.c
@@ -0,0 +1,262 @@
+/************************************************************************************
+ * configs/olimex-stm32-p407/src/stm32_sram.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include "chip.h"
+#include "up_arch.h"
+
+#include "stm32.h"
+#include "stm3240g-eval.h"
+
+#ifdef CONFIG_STM32_FSMC
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#if STM32_NGPIO_PORTS < 6
+#  error "Required GPIO ports not enabled"
+#endif
+
+#if defined(CONFIG_STM32_USART3) || defined(CONFIG_STM32_USART6)
+#  error "USART3 and USART6 conflict with use of SRAM"
+#endif
+
+/* SRAM Timing
+ * REVIST:  These were ported from the STM3240G-EVAL and have not been verified on
+ * this platform.
+ */
+
+#define SRAM_ADDRESS_SETUP_TIME      3
+#define SRAM_ADDRESS_HOLD_TIME       0
+#define SRAM_DATA_SETUP_TIME         6
+#define SRAM_BUS_TURNAROUND_DURATION 1
+#define SRAM_CLK_DIVISION            0
+#define SRAM_DATA_LATENCY            0
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+/* GPIOs Configuration **************************************************************
+ *---------------------+------------------+------------------+-----------------+
+ * GPIO  FSMC     NOTE |GPIO  FSMC    NOTE|GPIO  FSMC    NOTE|GPIO  FSMC   NOTE|
+ *---------------------+------------------+------------------+-----------------+
+ * PD0   FSMC_D2       |PE0   FSMC_NBL0   |PF0   FSMC_A0     |PG0   FSMC_A10   |
+ * PD1   FSMC_D3       |PE1   FSMC_NBL1   |PF1   FSMC_A1     |PG1   FSMC_A11   |
+ *                     |                  |PF2   FSMC_A2     |PG2   FSMC_A12   |
+ *                     |                  |PF3   FSMC_A3     |PG3   FSMC_A13   |
+ * PD4   FSMC_NOE   2  |                  |PF4   FSMC_A4     |PG4   FSMC_A14   |
+ * PD5   FSMC_NWE      |                  |PF5   FSMC_A5     |PG5   FSMC_A15   |
+ *                     |                  |                  |                 |
+ * PD7   FSMC_NE1/NCE2 |PE7   FSMC_D4     |                  |                 |
+ * PD8   FSMC_D13   1  |PE8   FSMC_D5     |                  |                 |
+ * PD9   FSMC_D14   1  |PE9   FSMC_D6     |                  |                 |
+ * PD10  FSMC_D15   1  |PE10  FSMC_D7     |                  |                 |
+ * PD11  FSMC_A16   1  |PE11  FSMC_D8     |                  |                 |
+ * PD12  FSMC_A17      |PE12  FSMC_D9     |PF12  FSMC_A6     |                 |
+ *                     |PE13  FSMC_D10    |PF13  FSMC_A7     |                 |
+ * PD14  FSMC_D0       |PE14  FSMC_D11    |PF14  FSMC_A8     |                 |
+ * PD15  FSMC_D1       |PE15  FSMC_D12    |PF15  FSMC_A9     |                 |
+ *---------------------+------------------+------------------+-----------------+
+ *
+ * NOTES:
+ *  (1) Shared with USART3:   PD8=USART3_TX PD9=USART3_RX PD11=USART3_CTS
+ *                            PD12=USART3_RTS
+ *  (2) Shared with USB:      PD4=USB_HS_FAULT
+ */
+
+/* SRAM GPIO configuration */
+
+static const uint32_t g_sramconfig[] =
+{
+  /* Address configuration:  FSMC_A0-FSMC_A17 */
+
+  GPIO_FSMC_A0,  GPIO_FSMC_A1 , GPIO_FSMC_A2,  GPIO_FSMC_A3,  GPIO_FSMC_A4 , GPIO_FSMC_A5,
+  GPIO_FSMC_A6,  GPIO_FSMC_A7,  GPIO_FSMC_A8,  GPIO_FSMC_A9,  GPIO_FSMC_A10, GPIO_FSMC_A11,
+  GPIO_FSMC_A12, GPIO_FSMC_A13, GPIO_FSMC_A14, GPIO_FSMC_A15, GPIO_FSMC_A16, GPIO_FSMC_A17,
+
+  /* Data Configuration: FSMC_D0-FSMC_D15 */
+
+  GPIO_FSMC_D0,  GPIO_FSMC_D1 , GPIO_FSMC_D2,  GPIO_FSMC_D3,  GPIO_FSMC_D4 , GPIO_FSMC_D5,
+  GPIO_FSMC_D6,  GPIO_FSMC_D7,  GPIO_FSMC_D8,  GPIO_FSMC_D9,  GPIO_FSMC_D10, GPIO_FSMC_D11,
+  GPIO_FSMC_D12, GPIO_FSMC_D13, GPIO_FSMC_D14, GPIO_FSMC_D15
+
+  /* Control Signals:
+   *
+   *  /CS  = PD7, FSMC_NE1
+   *  /OE  = PD4, FSMC_NOE
+   *  /WE  = PD5, FSMC_NWE
+   *  /BHE = PE0, FSMC_NBL0
+   *  /BHL = PE1, PSMC_NBL1
+   */
+
+  GPIO_FSMC_NE1, GPIO_FSMC_NOE, GPIO_FSMC_NWE, GPIO_FSMC_NBL0, GPIO_FSMC_NBL1
+};
+#define NSRAM_CONFIG (sizeof(g_sramconfig)/sizeof(uint32_t))
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_enablefsmc
+ *
+ * Description:
+ *   Enable clocking to the FSMC module
+ *
+ ************************************************************************************/
+
+static void stm32_enablefsmc(void)
+{
+  uint32_t regval;
+
+  /* Enable AHB clocking to the FSMC */
+
+  regval  = getreg32( STM32_RCC_AHB3ENR);
+  regval |= RCC_AHB3ENR_FSMCEN;
+  putreg32(regval, STM32_RCC_AHB3ENR);
+}
+
+/************************************************************************************
+ * Name: stm32_sramgpios
+ *
+ * Description:
+ *   Configure SRAM GPIO pins
+ *
+ ************************************************************************************/
+
+static void stm32_sramgpios(void)
+{
+  int i;
+
+  /* Configure SRAM GPIOs */
+
+  for (i = 0; i < NSRAM_CONFIG; i++)
+    {
+      stm32_configgpio(g_sramconfig[i]);
+    }
+}
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_stram_configure
+ *
+ * Description:
+ *   Initialize to access external SRAM.  SRAM will be visible at the FSMC Bank
+ *   NOR/SRAM2 base address (0x64000000)
+ *
+ *   General transaction rules.  The requested AHB transaction data size can be 8-,
+ *   16- or 32-bit wide whereas the SRAM has a fixed 16-bit data width. Some simple
+ *   transaction rules must be followed:
+ *
+ *   Case 1: AHB transaction width and SRAM data width are equal
+ *     There is no issue in this case.
+ *   Case 2: AHB transaction size is greater than the memory size
+ *     In this case, the FSMC splits the AHB transaction into smaller consecutive
+ *     memory accesses in order to meet the external data width.
+ *   Case 3: AHB transaction size is smaller than the memory size.
+ *     SRAM supports the byte select feature.
+ *     a) FSMC allows write transactions accessing the right data through its
+ *        byte lanes (NBL[1:0])
+ *     b) Read transactions are allowed (the controller reads the entire memory
+ *        word and uses the needed byte only). The NBL[1:0] are always kept low
+ *        during read transactions.
+ *
+ ************************************************************************************/
+
+void stm32_stram_configure(void)
+{
+  /* Configure GPIO pins */
+
+  stm32_extmemgpios(g_sramconfig, NSRAM_CONFIG);  /* SRAM-specific control lines */
+
+  /* Enable AHB clocking to the FSMC */
+
+  stm32_enablefsmc();
+
+  /* Bank1 NOR/SRAM control register configuration
+   *
+   *   Bank enable        : Not yet
+   *   Data address mux   : Disabled
+   *   Memory Type        : PSRAM
+   *   Data bus width     : 16-bits
+   *   Flash access       : Disabled
+   *   Burst access mode  : Disabled
+   *   Polarity           : Low
+   *   Wrapped burst mode : Disabled
+   *   Write timing       : Before state
+   *   Write enable       : Yes
+   *   Wait signal        : Disabled
+   *   Extended mode      : Disabled
+   *   Asynchronous wait  : Disabled
+   *   Write burst        : Disabled
+   */
+
+  putreg32((FSMC_BCR_PSRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN), STM32_FSMC_BCR2);
+
+  /* Bank1 NOR/SRAM timing register configuration */
+
+  putreg32((FSMC_BTR_ADDSET(SRAM_ADDRESS_SETUP_TIME) | FSMC_BTR_ADDHLD(SRAM_ADDRESS_HOLD_TIME) |
+            FSMC_BTR_DATAST(SRAM_DATA_SETUP_TIME)    | FSMC_BTR_BUSTURN(SRAM_BUS_TURNAROUND_DURATION) |
+            FSMC_BTR_CLKDIV(SRAM_CLK_DIVISION)       | FSMC_BTR_DATLAT(SRAM_DATA_LATENCY) |
+            FSMC_BTR_ACCMODA),
+           STM32_FSMC_BTR2);
+
+  /* Bank1 NOR/SRAM timing register for write configuration, if extended mode is used */
+
+  putreg32(0xffffffff, STM32_FSMC_BWTR2);  /* Extended mode not used */
+
+  /* Enable the bank */
+
+  putreg32((FSMC_BCR_MBKEN | FSMC_BCR_PSRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN), STM32_FSMC_BCR2);
+}
+
+#endif /* CONFIG_STM32_FSMC */
diff --git a/configs/olimex-stm32-p407/src/stm32_usb.c b/configs/olimex-stm32-p407/src/stm32_usb.c
new file mode 100644
index 0000000000000000000000000000000000000000..aee3ecf591641bb80d179d3ba1f02405a02db588
--- /dev/null
+++ b/configs/olimex-stm32-p407/src/stm32_usb.c
@@ -0,0 +1,320 @@
+/************************************************************************************
+ * configs/olimex-stm32-p407/src/stm32_usb.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "stm32.h"
+#include "stm32_otgfs.h"
+#include "olimex-stm32-p407.h"
+
+#ifdef CONFIG_STM32_OTGFS
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST)
+#  define HAVE_USB 1
+#else
+#  warning "CONFIG_STM32_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST"
+#  undef HAVE_USB
+#endif
+
+#ifndef CONFIG_USBHOST_DEFPRIO
+#  define CONFIG_USBHOST_DEFPRIO 50
+#endif
+
+#ifndef CONFIG_USBHOST_STACKSIZE
+#  ifdef CONFIG_USBHOST_HUB
+#    define CONFIG_USBHOST_STACKSIZE 1536
+#  else
+#    define CONFIG_USBHOST_STACKSIZE 1024
+#  endif
+#endif
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+#ifdef CONFIG_USBHOST
+static struct usbhost_connection_s *g_usbconn;
+#endif
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: usbhost_waiter
+ *
+ * Description:
+ *   Wait for USB devices to be connected.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_USBHOST
+static int usbhost_waiter(int argc, char *argv[])
+{
+  struct usbhost_hubport_s *hport;
+
+  uinfo("Running\n");
+  for (;;)
+    {
+      /* Wait for the device to change state */
+
+      DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
+      uinfo("%s\n", hport->connected ? "connected" : "disconnected");
+
+      /* Did we just become connected? */
+
+      if (hport->connected)
+        {
+          /* Yes.. enumerate the newly connected device */
+
+          (void)CONN_ENUMERATE(g_usbconn, hport);
+        }
+    }
+
+  /* Keep the compiler from complaining */
+
+  return 0;
+}
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_usbdev_setup
+ *
+ * Description:
+ *   Called from stm32_usbdev_setup very early in inialization to setup USB-related
+ *   GPIO pins for the STM32F4Discovery board.
+ *
+ ************************************************************************************/
+
+void stm32_usbdev_setup(void)
+{
+  /* The OTG FS has an internal soft pull-up.  No GPIO configuration is required */
+
+  /* Configure the OTG FS VBUS sensing GPIO, and Power On GPIOs */
+
+#ifdef CONFIG_STM32_OTGFS
+  stm32_configgpio(GPIO_OTGFS_VBUS);
+  stm32_configgpio(GPIO_OTGFS_PWRON);
+  stm32_configgpio(GPIO_OTGFS_OVER);
+#endif
+}
+
+/***********************************************************************************
+ * Name: stm32_usbhost_setup
+ *
+ * Description:
+ *   Called at application startup time to initialize the USB host functionality.
+ *   This function will start a thread that will monitor for device
+ *   connection/disconnection events.
+ *
+ ***********************************************************************************/
+
+#ifdef CONFIG_USBHOST
+int stm32_usbhost_setup(void)
+{
+  int pid;
+#if defined(CONFIG_USBHOST_HUB) || defined(CONFIG_USBHOST_MSC) || defined(CONFIG_USBHOST_CDCACM)
+  int ret;
+#endif
+
+  /* First, register all of the class drivers needed to support the drivers
+   * that we care about:
+   */
+
+  uinfo("Register class drivers\n");
+
+#ifdef CONFIG_USBHOST_HUB
+  /* Initialize USB hub class support */
+
+  ret = usbhost_hub_initialize();
+  if (ret < 0)
+    {
+      uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_MSC
+  /* Register the USB host Mass Storage Class */
+
+  ret = usbhost_msc_initialize();
+  if (ret != OK)
+    {
+      uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_CDCACM
+  /* Register the CDC/ACM serial class */
+
+  ret = usbhost_cdcacm_initialize();
+  if (ret != OK)
+    {
+      uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
+    }
+#endif
+
+  /* Then get an instance of the USB host interface */
+
+  uinfo("Initialize USB host\n");
+  g_usbconn = stm32_otgfshost_initialize(0);
+  if (g_usbconn)
+    {
+      /* Start a thread to handle device connection. */
+
+      uinfo("Start usbhost_waiter\n");
+
+      pid = task_create("usbhost", CONFIG_USBHOST_DEFPRIO,
+                        CONFIG_USBHOST_STACKSIZE,
+                        (main_t)usbhost_waiter, (FAR char * const *)NULL);
+      return pid < 0 ? -ENOEXEC : OK;
+    }
+
+  return -ENODEV;
+}
+#endif
+
+/************************************************************************************
+ * Name: stm32_setup_overcurrent
+ *
+ * Description:
+ *   Setup to receive an interrupt-level callback if an overcurrent condition is
+ *   detected.
+ *
+ * Input Parameter:
+ *   handler - New overcurrent interrupt handler
+ *   arg     - The argument provided for the interrupt handler
+ *
+ * Returned value:
+ *   Zero (OK) is returned on success.  Otherwise, a negated errno value is returned
+ *   to indicate the nature of the failure.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_USBHOST
+int stm32_setup_overcurrent(xcpt_t handler, void *arg)
+{
+  return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler, arg);
+}
+#endif
+
+/***********************************************************************************
+ * Name: stm32_usbhost_vbusdrive
+ *
+ * Description:
+ *   Enable/disable driving of VBUS 5V output.  This function must be provided be
+ *   each platform that implements the STM32 OTG FS host interface
+ *
+ *   "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
+ *    or, if 5 V are available on the application board, a basic power switch, must
+ *    be added externally to drive the 5 V VBUS line. The external charge pump can
+ *    be driven by any GPIO output. When the application decides to power on VBUS
+ *    using the chosen GPIO, it must also set the port power bit in the host port
+ *    control and status register (PPWR bit in OTG_FS_HPRT).
+ *
+ *   "The application uses this field to control power to this port, and the core
+ *    clears this bit on an overcurrent condition."
+ *
+ * Input Parameters:
+ *   iface - For future growth to handle multiple USB host interface.  Should be zero.
+ *   enable - true: enable VBUS power; false: disable VBUS power
+ *
+ * Returned Value:
+ *   None
+ *
+ ***********************************************************************************/
+
+#ifdef CONFIG_USBHOST
+void stm32_usbhost_vbusdrive(int iface, bool enable)
+{
+  DEBUGASSERT(iface == 0);
+
+  if (enable)
+    {
+      /* Enable the Power Switch by driving the enable pin low */
+
+      stm32_gpiowrite(GPIO_OTGFS_PWRON, false);
+    }
+  else
+    {
+      /* Disable the Power Switch by driving the enable pin high */
+
+      stm32_gpiowrite(GPIO_OTGFS_PWRON, true);
+    }
+}
+#endif
+
+/************************************************************************************
+ * Name:  stm32_usbsuspend
+ *
+ * Description:
+ *   Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is
+ *   used.  This function is called whenever the USB enters or leaves suspend mode.
+ *   This is an opportunity for the board logic to shutdown clocks, power, etc.
+ *   while the USB is suspended.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_USBDEV
+void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
+{
+  uinfo("resume: %d\n", resume);
+}
+#endif
+
+#endif /* CONFIG_STM32_OTGFS */
diff --git a/arch/arm/src/kl/kl_lowgetc.c b/configs/olimex-stm32-p407/src/stm32_userleds.c
similarity index 66%
rename from arch/arm/src/kl/kl_lowgetc.c
rename to configs/olimex-stm32-p407/src/stm32_userleds.c
index f1c02981d2cf95761b11cd37484f27e92fc2b8aa..d044d386e484508b599ef4acb6fa7a575d9718eb 100644
--- a/arch/arm/src/kl/kl_lowgetc.c
+++ b/configs/olimex-stm32-p407/src/stm32_userleds.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/arm/src/kl/kl_lowgetc.c
+ * configs/olimex-stm32-p407/src/stm32_userleds.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,53 +40,26 @@
 #include 
 
 #include 
-
-#include 
+#include 
+#include 
 #include 
+#include "stm32.h"
+#include "olimex-stm32-p407.h"
 
-#include "up_internal.h"
-#include "up_arch.h"
-
-#include "kl_config.h"
-#include "kl_lowgetc.h"
-
-#include "chip/kl_uart.h"
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-/* Select UART parameters for the selected console */
-
-#if defined(CONFIG_UART0_SERIAL_CONSOLE)
-#  define CONSOLE_BASE     KL_UART0_BASE
-#  define CONSOLE_FREQ     BOARD_CORECLK_FREQ
-#  define CONSOLE_BAUD     CONFIG_UART0_BAUD
-#  define CONSOLE_BITS     CONFIG_UART0_BITS
-#  define CONSOLE_PARITY   CONFIG_UART0_PARITY
-#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
-#  define CONSOLE_BASE     KL_UART1_BASE
-#  define CONSOLE_FREQ     BOARD_BUSCLK_FREQ
-#  define CONSOLE_BAUD     CONFIG_UART1_BAUD
-#  define CONSOLE_BITS     CONFIG_UART1_BITS
-#  define CONSOLE_PARITY   CONFIG_UART1_PARITY
-#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
-#  define CONSOLE_BASE     KL_UART2_BASE
-#  define CONSOLE_FREQ     BOARD_BUSCLK_FREQ
-#  define CONSOLE_BAUD     CONFIG_UART2_BAUD
-#  define CONSOLE_BITS     CONFIG_UART2_BITS
-#  define CONSOLE_PARITY   CONFIG_UART2_PARITY
-#endif
+#ifndef CONFIG_ARCH_LEDS
 
 /****************************************************************************
- * Private Types
+ * Private Data
  ****************************************************************************/
+/* This array maps an LED number to GPIO pin configuration */
 
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
+static uint32_t g_ledcfg[BOARD_NLEDS] =
+{
+  GPIO_LED1, GPIO_LED2, GPIO_LED3, GPIO_LED4
+};
 
 /****************************************************************************
- * Public Data
+ * Private Function Protototypes
  ****************************************************************************/
 
 /****************************************************************************
@@ -102,28 +75,41 @@
  ****************************************************************************/
 
 /****************************************************************************
- * Name: up_lowgetc
- *
- * Description:
- *   Input one byte from the serial console
- *
+ * Name: board_userled_initialize
  ****************************************************************************/
 
-int kl_lowgetc(void)
+void board_userled_initialize(void)
 {
-  uint8_t ch = 0;
+   /* Configure LED1-4 GPIOs for output */
 
-#if defined HAVE_UART_DEVICE && defined HAVE_SERIAL_CONSOLE
-  /* Wait while the receiver data buffer is "empty" (RDRF) to assure that
-   * we have data in the buffer to read.
-   */
+   stm32_configgpio(GPIO_LED1);
+   stm32_configgpio(GPIO_LED2);
+   stm32_configgpio(GPIO_LED3);
+   stm32_configgpio(GPIO_LED4);
+}
 
-  while ((getreg8(CONSOLE_BASE+KL_UART_S1_OFFSET) & UART_S1_RDRF) == 0);
+/****************************************************************************
+ * Name: board_userled
+ ****************************************************************************/
 
-  /* Then read a character from the UART data register */
+void board_userled(int led, bool ledon)
+{
+  if ((unsigned)led < BOARD_NLEDS)
+    {
+      stm32_gpiowrite(g_ledcfg[led], ledon);
+    }
+}
 
-  ch = getreg8(CONSOLE_BASE+KL_UART_D_OFFSET);
-#endif
+/****************************************************************************
+ * Name: board_userled_all
+ ****************************************************************************/
 
-  return (int)ch;
+void board_userled_all(uint8_t ledset)
+{
+  stm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) != 0);
+  stm32_gpiowrite(GPIO_LED2, (ledset & BOARD_LED2_BIT) != 0);
+  stm32_gpiowrite(GPIO_LED3, (ledset & BOARD_LED3_BIT) != 0);
+  stm32_gpiowrite(GPIO_LED4, (ledset & BOARD_LED4_BIT) != 0);
 }
+
+#endif /* !CONFIG_ARCH_LEDS */
diff --git a/configs/olimex-strp711/nettest/Make.defs b/configs/olimex-strp711/nettest/Make.defs
index ca1550a6edd05e43f9ce3f3e4e48c8035c503048..7d96acb8d2e1b68cacdc1227c9b41e3ad9c8dcb7 100644
--- a/configs/olimex-strp711/nettest/Make.defs
+++ b/configs/olimex-strp711/nettest/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(HOSTOS),Cygwin)
 endif
 endif
 
-ifeq ("${CONFIG_DEBUG}","y")
+ifeq ("${CONFIG_DEBUG_FEATURES}","y")
   ARCHOPTIMIZATION = -g
 endif
 
@@ -86,7 +86,7 @@ else
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
@@ -115,7 +115,7 @@ EXEEXT =
 ifneq ($(CROSSDEV),arm-nuttx-elf-)
   LDFLAGS += -nostartfiles -nodefaultlibs
 endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
   LDFLAGS += -g
 endif
 
diff --git a/configs/olimex-strp711/nettest/defconfig b/configs/olimex-strp711/nettest/defconfig
index 2f698cc8bdcae048ecf310a9acca8786988ae746..364999eb4a871e5c3581e3c5f87d22e9758e2105 100644
--- a/configs/olimex-strp711/nettest/defconfig
+++ b/configs/olimex-strp711/nettest/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -93,7 +97,9 @@ CONFIG_ARCH="arm"
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 CONFIG_ARCH_CHIP_STR71X=y
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_ARM926EJS is not set
@@ -104,10 +110,21 @@ CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="str71x"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 # CONFIG_ARCH_LOWVECTORS is not set
 
@@ -170,6 +187,7 @@ CONFIG_STR71X_XTI=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -230,6 +248,7 @@ CONFIG_ARCH_BUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -248,6 +267,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2010
 CONFIG_START_MONTH=5
@@ -302,6 +322,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -317,9 +338,10 @@ CONFIG_SIG_SIGWORK=17
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -343,6 +365,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -353,14 +376,20 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 # CONFIG_SPI_EXCHANGE is not set
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
@@ -368,6 +397,7 @@ CONFIG_SPI=y
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -375,9 +405,28 @@ CONFIG_SPI=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -386,7 +435,10 @@ CONFIG_NETDEVICES=y
 # General Ethernet MAC Driver Options
 #
 # CONFIG_NETDEV_LOOPBACK is not set
+# CONFIG_NETDEV_TELNET is not set
 # CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
+# CONFIG_NETDEV_STATISTICS is not set
 # CONFIG_NETDEV_LATEINIT is not set
 
 #
@@ -397,21 +449,21 @@ CONFIG_ENC28J60=y
 CONFIG_ENC28J60_NINTERFACES=1
 CONFIG_ENC28J60_SPIMODE=0
 CONFIG_ENC28J60_FREQUENCY=20000000
-CONFIG_ENC28J60_STATS=y
+CONFIG_ENC28J60_HPWORK=y
 # CONFIG_ENC28J60_HALFDUPPLEX is not set
 # CONFIG_ENC28J60_DUMPPACKET is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -435,13 +487,10 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_UART1_SERIAL_CONSOLE is not set
@@ -459,6 +508,7 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 
 #
 # UART1 Configuration
@@ -471,19 +521,27 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -491,13 +549,11 @@ CONFIG_UART1_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -617,12 +673,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -641,6 +691,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -666,6 +720,8 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -680,14 +736,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -699,22 +758,27 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # Application Configuration
 #
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -736,35 +800,44 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -775,8 +848,9 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -787,11 +861,12 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
@@ -813,15 +888,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-strp711/nsh/Make.defs b/configs/olimex-strp711/nsh/Make.defs
index 268e6039ebdb0e53754dc16cc7fb0f394d866f7f..6710edd75e69a6478a68408646eaec894ed9e856 100644
--- a/configs/olimex-strp711/nsh/Make.defs
+++ b/configs/olimex-strp711/nsh/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(HOSTOS),Cygwin)
 endif
 endif
 
-ifeq ("${CONFIG_DEBUG}","y")
+ifeq ("${CONFIG_DEBUG_FEATURES}","y")
   ARCHOPTIMIZATION = -g
 endif
 
@@ -86,7 +86,7 @@ else
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
@@ -115,7 +115,7 @@ EXEEXT =
 ifneq ($(CROSSDEV),arm-nuttx-elf-)
   LDFLAGS += -nostartfiles -nodefaultlibs
 endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
   LDFLAGS += -g
 endif
 
diff --git a/configs/olimex-strp711/nsh/defconfig b/configs/olimex-strp711/nsh/defconfig
index 790273c42202bdaaa1128a08da024b8302ea1f37..355e5e98f0d52b6b90332ca269b3be9a1060d7a2 100644
--- a/configs/olimex-strp711/nsh/defconfig
+++ b/configs/olimex-strp711/nsh/defconfig
@@ -17,6 +17,7 @@ CONFIG_HOST_LINUX=y
 # Build Configuration
 #
 # CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
 # CONFIG_BUILD_2PASS is not set
 
 #
@@ -26,20 +27,25 @@ CONFIG_HOST_LINUX=y
 # CONFIG_INTELHEX_BINARY is not set
 # CONFIG_MOTOROLA_SREC is not set
 CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
 
 #
 # Customize Header Files
 #
+# CONFIG_ARCH_STDINT_H is not set
 # CONFIG_ARCH_STDBOOL_H is not set
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
@@ -54,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -67,12 +72,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -81,21 +89,39 @@ CONFIG_ARCH="arm"
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 CONFIG_ARCH_CHIP_STR71X=y
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="str71x"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
-# CONFIG_ARCH_HAVE_MPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 # CONFIG_ARCH_LOWVECTORS is not set
 
@@ -154,10 +180,18 @@ CONFIG_STR71X_UART1=y
 # CONFIG_ARCH_VECNOTIRQ is not set
 # CONFIG_ARCH_DMA is not set
 # CONFIG_ARCH_HAVE_IRQPRIO is not set
-# CONFIG_ARCH_ADDRENV is not set
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
+# CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
 # CONFIG_ARCH_IDLE_CUSTOM is not set
@@ -214,39 +248,82 @@ CONFIG_NSH_MMCSDSPIPORTNO=1
 #
 # Board-Specific Options
 #
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
 
 #
 # RTOS Features
 #
-# CONFIG_BOARD_INITIALIZE is not set
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
-CONFIG_RR_INTERVAL=0
-# CONFIG_SCHED_CPULOAD is not set
-# CONFIG_SCHED_INSTRUMENTATION is not set
-CONFIG_TASK_NAME_SIZE=0
-# CONFIG_SCHED_HAVE_PARENT is not set
+# CONFIG_CLOCK_MONOTONIC is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=6
 CONFIG_START_DAY=5
-CONFIG_DEV_CONSOLE=y
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=0
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+# CONFIG_SCHED_WAITPID is not set
+
+#
+# Pthread Options
+#
 # CONFIG_MUTEX_TYPES is not set
-# CONFIG_PRIORITY_INHERITANCE is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
 # CONFIG_FDCLONE_DISABLE is not set
 # CONFIG_FDCLONE_STDIO is not set
 CONFIG_SDCLONE_DISABLE=y
-# CONFIG_SCHED_WAITPID is not set
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
-CONFIG_USER_ENTRYPOINT="nsh_main"
-CONFIG_DISABLE_OS_API=y
-# CONFIG_DISABLE_POSIX_TIMERS is not set
-# CONFIG_DISABLE_PTHREAD is not set
-# CONFIG_DISABLE_SIGNALS is not set
-# CONFIG_DISABLE_MQUEUE is not set
-# CONFIG_DISABLE_ENVIRON is not set
 
 #
 # Signal Numbers
@@ -257,19 +334,18 @@ CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
 
 #
-# Sizes of configurable things (0 disables)
+# POSIX Message Queue Options
 #
-CONFIG_MAX_TASKS=16
-CONFIG_NPTHREAD_KEYS=4
-CONFIG_NFILE_DESCRIPTORS=8
-CONFIG_NFILE_STREAMS=8
-CONFIG_NAME_MAX=32
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
-CONFIG_MAX_WDOGPARMS=2
-CONFIG_PREALLOC_WDOGS=4
-CONFIG_WDOG_INTRESERVE=0
-CONFIG_PREALLOC_TIMERS=4
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
 
 #
 # Stack and heap information
@@ -278,6 +354,7 @@ CONFIG_IDLETHREAD_STACKSIZE=2048
 CONFIG_USERMAIN_STACKSIZE=2048
 CONFIG_PTHREAD_STACK_MIN=256
 CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
 
 #
 # Device Drivers
@@ -286,17 +363,35 @@ CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
 # CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
 # CONFIG_SPI_EXCHANGE is not set
 # CONFIG_SPI_CMDDATA is not set
+CONFIG_SPI_CALLBACK=y
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -304,7 +399,21 @@ CONFIG_SPI=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -315,25 +424,50 @@ CONFIG_MMCSD_SPI=y
 CONFIG_MMCSD_SPICLOCK=20000000
 CONFIG_MMCSD_SPIMODE=0
 # CONFIG_ARCH_HAVE_SDIO is not set
+# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
 CONFIG_UART1_SERIALDRIVER=y
-
-#
-# USART Configuration
-#
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_UART1_SERIAL_CONSOLE is not set
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
 
 #
@@ -347,6 +481,7 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 
 #
 # UART1 Configuration
@@ -359,20 +494,23 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -381,6 +519,11 @@ CONFIG_UART1_2STOP=0
 # CONFIG_ARCH_HAVE_PHY is not set
 # CONFIG_NET is not set
 
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
 #
 # File Systems
 #
@@ -389,25 +532,26 @@ CONFIG_UART1_2STOP=0
 # File system configuration
 #
 # CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
 # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
 CONFIG_FS_READABLE=y
 CONFIG_FS_WRITABLE=y
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
 CONFIG_FS_FAT=y
 # CONFIG_FAT_LCNAMES is not set
 # CONFIG_FAT_LFN is not set
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -428,7 +572,11 @@ CONFIG_MM_REGIONS=1
 # CONFIG_AUDIO is not set
 
 #
-# Binary Formats
+# Wireless Support
+#
+
+#
+# Binary Loader
 #
 # CONFIG_BINFMT_DISABLE is not set
 # CONFIG_BINFMT_EXEPATH is not set
@@ -453,6 +601,7 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -463,15 +612,22 @@ CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
 CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
 CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -486,26 +642,27 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
-# CONFIG_EXAMPLES_LCDRW is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -513,88 +670,107 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PASHELLO is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
 #
 # CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
 
 #
 # Interpreters
 #
+# CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
 # CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
 
 #
-# FreeModBus
+# NSH Library
 #
-# CONFIG_MODBUS is not set
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
-# NSH Library
+# Command Line Configuration
 #
-CONFIG_NSH_LIBRARY=y
 CONFIG_NSH_READLINE=y
 # CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
 
 #
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
 # CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -603,8 +779,10 @@ CONFIG_NSH_READLINE=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -613,6 +791,7 @@ CONFIG_NSH_READLINE=y
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -622,8 +801,10 @@ CONFIG_NSH_READLINE=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
@@ -636,25 +817,22 @@ CONFIG_NSH_CMDOPT_DF_H=y
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-# CONFIG_NSH_DISABLE_SEMICOLON is not set
-CONFIG_NSH_CMDPARMS=y
-CONFIG_NSH_TMPDIR="/tmp"
-CONFIG_NSH_MAXARGUMENTS=6
-CONFIG_NSH_ARGCAT=y
-CONFIG_NSH_NESTDEPTH=3
+
+#
+# Scripting Support
+#
 # CONFIG_NSH_DISABLESCRIPT is not set
 # CONFIG_NSH_DISABLE_ITEF is not set
 # CONFIG_NSH_DISABLE_LOOPS is not set
-# CONFIG_NSH_DISABLEBG is not set
-CONFIG_NSH_CONSOLE=y
 
 #
-# USB Trace Support
+# Console Configuration
 #
+CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
-CONFIG_LIB_BOARDCTL=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -668,94 +846,19 @@ CONFIG_LIB_BOARDCTL=y
 #
 # System Libraries and NSH Add-Ons
 #
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# Custom Free Memory Command
-#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
 # CONFIG_SYSTEM_FREE is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# FLASH Program Installation
-#
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sysinfo
-#
-
-#
-# USB Monitor
-#
-
-#
-# EMACS-like Command Line Editor
-#
-# CONFIG_SYSTEM_CLE is not set
-
-#
-# VI Work-Alike Editor
-#
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# Zmodem Commands
-#
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimex-strp711/src/str71_enc28j60.c b/configs/olimex-strp711/src/str71_enc28j60.c
index d36f61000ad31fb4100fb3dc589645e735bd423c..5b40eb1357049594c33762069de68ae7f0fb5334 100644
--- a/configs/olimex-strp711/src/str71_enc28j60.c
+++ b/configs/olimex-strp711/src/str71_enc28j60.c
@@ -184,7 +184,7 @@ static const struct enc_lower_s g_enclower =
 
 static int up_attach(FAR const struct enc_lower_s *lower, xcpt_t handler)
 {
-  return irq_attach(ENC28J60_IRQ, handler);
+  return irq_attach(ENC28J60_IRQ, handler, NULL);
 }
 
 static void up_enable(FAR const struct enc_lower_s *lower)
@@ -216,7 +216,7 @@ void up_netinitialize(void)
   spi = str71_spibus_initialize(ENC28J60_SPI_PORTNO);
   if (!spi)
     {
-      nlldbg("Failed to initialize SPI port %d\n", ENC28J60_SPI_PORTNO);
+      nerr("ERROR: Failed to initialize SPI port %d\n", ENC28J60_SPI_PORTNO);
       return;
     }
 
@@ -225,7 +225,7 @@ void up_netinitialize(void)
   ret = str71x_xticonfig(ENC28J60_IRQ, false);
   if (ret < 0)
     {
-      nlldbg("Failed configure interrupt for IRQ %d: %d\n", ENC28J60_IRQ, ret);
+      nerr("ERROR: Failed configure interrupt for IRQ %d: %d\n", ENC28J60_IRQ, ret);
       return;
     }
 
@@ -240,12 +240,12 @@ void up_netinitialize(void)
   ret = enc_initialize(spi, &g_enclower, ENC28J60_DEVNO);
   if (ret < 0)
     {
-      nlldbg("Failed to bind SPI port %d ENC28J60 device %d: %d\n",
-             ENC28J60_SPI_PORTNO, ENC28J60_DEVNO, ret);
+      nerr("ERROR: Failed to bind SPI port %d ENC28J60 device %d: %d\n",
+           ENC28J60_SPI_PORTNO, ENC28J60_DEVNO, ret);
       return;
     }
 
-  nllvdbg("Bound SPI port %d to ENC28J60 device %d\n",
+  ninfo("Bound SPI port %d to ENC28J60 device %d\n",
         ENC28J60_SPI_PORTNO, ENC28J60_DEVNO);
 }
 #endif /* CONFIG_ENC28J60 */
diff --git a/configs/olimexino-stm32/can/Make.defs b/configs/olimexino-stm32/can/Make.defs
index 48d67718ee2b5aba3844bee8c4dd10cd8c6e96a2..73d3f4082972033b2b0258913b905317885fea40 100644
--- a/configs/olimexino-stm32/can/Make.defs
+++ b/configs/olimexino-stm32/can/Make.defs
@@ -90,7 +90,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimexino-stm32/can/defconfig b/configs/olimexino-stm32/can/defconfig
index 866967575efbf029e9196e06307517faca4dd9a8..0d74678b350f257e93dd999d653562e888e44417 100644
--- a/configs/olimexino-stm32/can/defconfig
+++ b/configs/olimexino-stm32/can/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 CONFIG_STACK_COLORATION=y
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -204,6 +204,7 @@ CONFIG_ARCH_CHIP_STM32F103RB=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -423,6 +424,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 CONFIG_STM32_FORCEPOWER=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_PWM is not set
 # CONFIG_STM32_TIM3_PWM is not set
 # CONFIG_STM32_TIM1_ADC is not set
@@ -442,9 +449,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 CONFIG_SERIAL_DISABLE_REORDERING=y
 CONFIG_STM32_FLOWCONTROL_BROKEN=y
 # CONFIG_STM32_USART_BREAKS is not set
@@ -563,18 +578,15 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
-CONFIG_BOARDCTL_CANINIT=y
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -586,9 +598,12 @@ CONFIG_BOARDCTL_CANINIT=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 CONFIG_SYSTEM_TIME64=y
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=1
@@ -684,6 +699,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=464
 # CONFIG_DISABLE_POLL is not set
 # CONFIG_DEV_NULL is not set
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -698,6 +714,7 @@ CONFIG_CAN=y
 CONFIG_CAN_FIFOSIZE=8
 CONFIG_CAN_NPENDINGRTR=4
 # CONFIG_CAN_TXREADY is not set
+CONFIG_CAN_NPOLLWAITERS=2
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
 # CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
@@ -713,9 +730,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -732,8 +754,18 @@ CONFIG_ANALOG=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -741,6 +773,7 @@ CONFIG_ANALOG=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -749,9 +782,10 @@ CONFIG_ANALOG=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -798,19 +832,25 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -856,12 +896,6 @@ CONFIG_FS_FATTIME=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -928,7 +962,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=0
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -937,8 +970,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -965,6 +1000,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=768
 #
 # CAN Utilities
 #
+# CONFIG_CANUTILS_CANLIB is not set
 # CONFIG_CANUTILS_LIBCANARD is not set
 
 #
@@ -979,7 +1015,6 @@ CONFIG_EXAMPLES_CAN_NMSGS=32
 CONFIG_EXAMPLES_CAN_READWRITE=y
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -989,10 +1024,10 @@ CONFIG_EXAMPLES_CAN_READWRITE=y
 # CONFIG_EXAMPLES_HELLO is not set
 CONFIG_EXAMPLES_HELLOXX=y
 CONFIG_EXAMPLES_HELLOXX_CXXINITIALIZE=y
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1002,35 +1037,34 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1054,8 +1088,8 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1122,13 +1156,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 CONFIG_NSH_DISABLE_MKDIR=y
 CONFIG_NSH_DISABLE_MKFATFS=y
-CONFIG_NSH_DISABLE_MKFIFO=y
 CONFIG_NSH_DISABLE_MKRD=y
 # CONFIG_NSH_DISABLE_MH is not set
 CONFIG_NSH_DISABLE_MOUNT=y
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PSSTACKUSAGE is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
 # CONFIG_NSH_DISABLE_RM is not set
@@ -1144,6 +1178,7 @@ CONFIG_NSH_DISABLE_UNAME=y
 CONFIG_NSH_DISABLE_USLEEP=y
 CONFIG_NSH_DISABLE_WGET=y
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1179,21 +1214,21 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_SYSTEM_I2CTOOL is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_I2CTOOL is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
-# CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_STACKMONITOR is not set
+# CONFIG_SYSTEM_SUDOKU is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimexino-stm32/composite/Make.defs b/configs/olimexino-stm32/composite/Make.defs
index 690947c11049f40cb7569b3638b348fadbfb68a8..f80bb51a7a979eda51f40fc160b5fae7a3a8e10b 100644
--- a/configs/olimexino-stm32/composite/Make.defs
+++ b/configs/olimexino-stm32/composite/Make.defs
@@ -90,7 +90,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimexino-stm32/composite/defconfig b/configs/olimexino-stm32/composite/defconfig
index bb7055ac6862df940e6ea7ab7c7538e1176ad1fc..09f9f3cc5ff6ffa3101d8561d883580defe19a74 100644
--- a/configs/olimexino-stm32/composite/defconfig
+++ b/configs/olimexino-stm32/composite/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 CONFIG_STACK_COLORATION=y
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +202,7 @@ CONFIG_ARCH_CHIP_STM32F103RB=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -346,6 +350,12 @@ CONFIG_STM32_HAVE_ADC1_DMA=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 # CONFIG_STM32_HAVE_DAC1 is not set
@@ -417,6 +427,12 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 CONFIG_STM32_FORCEPOWER=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 CONFIG_STM32_DMACAPABLE=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_PWM is not set
 # CONFIG_STM32_TIM3_PWM is not set
 # CONFIG_STM32_TIM1_ADC is not set
@@ -437,6 +453,10 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
@@ -445,6 +465,10 @@ CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
 # CONFIG_USART2_RXDMA is not set
+
+#
+# Serial Driver Configuration
+#
 CONFIG_SERIAL_DISABLE_REORDERING=y
 CONFIG_STM32_FLOWCONTROL_BROKEN=y
 # CONFIG_STM32_USART_BREAKS is not set
@@ -562,20 +586,16 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -587,9 +607,12 @@ CONFIG_BOARDCTL_USBDEVCTRL=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 CONFIG_SYSTEM_TIME64=y
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=4
@@ -682,6 +705,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=464
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -697,19 +721,25 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 # CONFIG_RTC_DATETIME is not set
 # CONFIG_RTC_HIRES is not set
@@ -725,8 +755,18 @@ CONFIG_ANALOG=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -734,6 +774,7 @@ CONFIG_ANALOG=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -752,10 +793,10 @@ CONFIG_MMCSD_SPIMODE=0
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -816,6 +857,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -888,17 +930,23 @@ CONFIG_USBMSC_REMOVABLE=y
 CONFIG_USBMSC_SCSI_PRIO=128
 CONFIG_USBMSC_SCSI_STACKSIZE=340
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -944,12 +992,6 @@ CONFIG_FS_FATTIME=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -999,6 +1041,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 # CONFIG_LIBC_LONG_LONG is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1016,7 +1060,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=0
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -1025,8 +1068,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1058,22 +1103,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=768
 #
 # Examples
 #
-CONFIG_EXAMPLES_BUTTONS=y
-CONFIG_EXAMPLES_BUTTONS_MIN=0
-CONFIG_EXAMPLES_BUTTONS_MAX=0
-CONFIG_EXAMPLES_IRQBUTTONS_MIN=0
-CONFIG_EXAMPLES_IRQBUTTONS_MAX=0
-CONFIG_EXAMPLES_BUTTONS_NAME0="BOOT 0"
-CONFIG_EXAMPLES_BUTTONS_NAME1="Button 1"
-CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2"
-CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3"
-CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4"
-CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5"
-CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6"
-CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -1083,10 +1116,10 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
 # CONFIG_EXAMPLES_HELLO is not set
 CONFIG_EXAMPLES_HELLOXX=y
 CONFIG_EXAMPLES_HELLOXX_CXXINITIALIZE=y
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1096,35 +1129,34 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1148,8 +1180,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1216,13 +1249,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 CONFIG_NSH_DISABLE_MKFATFS=y
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PSSTACKUSAGE is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
 # CONFIG_NSH_DISABLE_RM is not set
@@ -1238,6 +1272,9 @@ CONFIG_NSH_DISABLE_UNAME=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Configure Command Options
@@ -1276,22 +1313,8 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-CONFIG_SYSTEM_FREE=y
-# CONFIG_SYSTEM_CLE is not set
-# CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_SYSTEM_HEXED is not set
-# CONFIG_SYSTEM_RAMTEST is not set
-CONFIG_READLINE_HAVE_EXTMATCH=y
-CONFIG_SYSTEM_READLINE=y
-CONFIG_READLINE_ECHO=y
-# CONFIG_READLINE_TABCOMPLETION is not set
-# CONFIG_READLINE_CMD_HISTORY is not set
-# CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
-# CONFIG_SYSTEM_STACKMONITOR is not set
 # CONFIG_SYSTEM_CDCACM is not set
+# CONFIG_SYSTEM_CLE is not set
 CONFIG_SYSTEM_COMPOSITE=y
 CONFIG_SYSTEM_COMPOSITE_NLUNS=1
 CONFIG_SYSTEM_COMPOSITE_DEVMINOR1=0
@@ -1304,6 +1327,21 @@ CONFIG_SYSTEM_COMPOSITE_TTYUSB=0
 CONFIG_SYSTEM_COMPOSITE_SERDEV="/dev/ttyACM0"
 CONFIG_SYSTEM_COMPOSITE_BUFSIZE=256
 # CONFIG_SYSTEM_COMPOSITE_DEBUGMM is not set
+# CONFIG_SYSTEM_CUTERM is not set
+CONFIG_SYSTEM_FREE=y
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_STACKMONITOR is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_USBMSC is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimexino-stm32/include/board.h b/configs/olimexino-stm32/include/board.h
index ac695f9710d3efc5817ce6b0c36c44dea4831fca..997dcfe7bea8729f3427a464b7aa5d7a468bc0f2 100644
--- a/configs/olimexino-stm32/include/board.h
+++ b/configs/olimexino-stm32/include/board.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/olimexino-stm32/include/board.h
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *           David Sidrane 
  *
@@ -102,14 +102,14 @@
 #define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd2
 #define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
 
-/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */
+/* APB1 timers 2-7 will be twice PCLK1  */
 
 #define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM5_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM6_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM7_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 
 /* USB divider -- Divide PLL clock by 1.5 */
 
@@ -119,8 +119,14 @@
  * otherwise frequency is 2xAPBx.
  * Note: TIM1,8 are on APB2, others on APB1 */
 
-#define STM32_TIM18_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_TIM27_FREQUENCY   STM32_HCLK_FREQUENCY
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM3_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM4_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM5_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM6_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM7_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM8_FREQUENCY    STM32_HCLK_FREQUENCY
 
 /* Buttons *************************************************************************/
 
diff --git a/configs/olimexino-stm32/nsh/Make.defs b/configs/olimexino-stm32/nsh/Make.defs
index 9fd3c82233e638a8e494ff167e9fb5e1240f172b..15e08345e4681706d241b552f921d0d72eae549e 100644
--- a/configs/olimexino-stm32/nsh/Make.defs
+++ b/configs/olimexino-stm32/nsh/Make.defs
@@ -90,7 +90,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimexino-stm32/nsh/defconfig b/configs/olimexino-stm32/nsh/defconfig
index bff7b461199aa9df3215d8745c5ac0a0f03a0fcd..230e9dd57e004705f69d19a76c6c929a18c28735 100644
--- a/configs/olimexino-stm32/nsh/defconfig
+++ b/configs/olimexino-stm32/nsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 CONFIG_STACK_COLORATION=y
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +202,7 @@ CONFIG_ARCH_CHIP_STM32F103RB=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -346,6 +350,12 @@ CONFIG_STM32_HAVE_ADC1_DMA=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 # CONFIG_STM32_HAVE_DAC1 is not set
@@ -417,6 +427,12 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 CONFIG_STM32_FORCEPOWER=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 CONFIG_STM32_DMACAPABLE=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_PWM is not set
 # CONFIG_STM32_TIM3_PWM is not set
 # CONFIG_STM32_TIM1_ADC is not set
@@ -437,6 +453,10 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
@@ -445,6 +465,10 @@ CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
 # CONFIG_USART2_RXDMA is not set
+
+#
+# Serial Driver Configuration
+#
 CONFIG_SERIAL_DISABLE_REORDERING=y
 CONFIG_STM32_FLOWCONTROL_BROKEN=y
 # CONFIG_STM32_USART_BREAKS is not set
@@ -562,19 +586,15 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -586,9 +606,12 @@ CONFIG_LIB_BOARDCTL=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 CONFIG_SYSTEM_TIME64=y
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=4
@@ -681,6 +704,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=464
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -696,19 +720,25 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 # CONFIG_RTC_DATETIME is not set
 # CONFIG_RTC_HIRES is not set
@@ -724,8 +754,18 @@ CONFIG_ANALOG=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -733,6 +773,7 @@ CONFIG_ANALOG=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -751,9 +792,10 @@ CONFIG_MMCSD_SPIMODE=0
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -814,19 +856,26 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -872,12 +921,6 @@ CONFIG_FS_FATTIME=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -927,6 +970,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 # CONFIG_LIBC_LONG_LONG is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -944,7 +989,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=0
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -953,8 +997,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -986,22 +1032,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=768
 #
 # Examples
 #
-CONFIG_EXAMPLES_BUTTONS=y
-CONFIG_EXAMPLES_BUTTONS_MIN=0
-CONFIG_EXAMPLES_BUTTONS_MAX=0
-CONFIG_EXAMPLES_IRQBUTTONS_MIN=0
-CONFIG_EXAMPLES_IRQBUTTONS_MAX=0
-CONFIG_EXAMPLES_BUTTONS_NAME0="BOOT 0"
-CONFIG_EXAMPLES_BUTTONS_NAME1="Button 1"
-CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2"
-CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3"
-CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4"
-CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5"
-CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6"
-CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -1011,10 +1045,10 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
 # CONFIG_EXAMPLES_HELLO is not set
 CONFIG_EXAMPLES_HELLOXX=y
 CONFIG_EXAMPLES_HELLOXX_CXXINITIALIZE=y
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1024,35 +1058,34 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1076,8 +1109,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1144,13 +1178,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 CONFIG_NSH_DISABLE_MKFATFS=y
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PSSTACKUSAGE is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
 # CONFIG_NSH_DISABLE_RM is not set
@@ -1166,6 +1201,9 @@ CONFIG_NSH_DISABLE_UNAME=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Configure Command Options
@@ -1203,20 +1241,21 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-CONFIG_SYSTEM_FREE=y
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+CONFIG_SYSTEM_FREE=y
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
-# CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_STACKMONITOR is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimexino-stm32/smallnsh/Make.defs b/configs/olimexino-stm32/smallnsh/Make.defs
index 53f2d3ce6b16f6b43b08234a6221a627d7aa7402..3d08a5e633eb7d168985e2e2a390cb7a49d6ce94 100644
--- a/configs/olimexino-stm32/smallnsh/Make.defs
+++ b/configs/olimexino-stm32/smallnsh/Make.defs
@@ -90,7 +90,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimexino-stm32/smallnsh/defconfig b/configs/olimexino-stm32/smallnsh/defconfig
index 1429b4c2b492a96350da170f0a3d7d962942677e..982f53c5ec3a16a38b6b9704ceeb78a422931d64 100644
--- a/configs/olimexino-stm32/smallnsh/defconfig
+++ b/configs/olimexino-stm32/smallnsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 CONFIG_STACK_COLORATION=y
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -204,6 +204,7 @@ CONFIG_ARCH_CHIP_STM32F103RB=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -421,6 +422,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 CONFIG_STM32_FORCEPOWER=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_PWM is not set
 # CONFIG_STM32_TIM3_PWM is not set
 # CONFIG_STM32_TIM1_CAP is not set
@@ -434,9 +441,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 CONFIG_SERIAL_DISABLE_REORDERING=y
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -544,18 +559,15 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
-CONFIG_BOARDCTL_CANINIT=y
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -567,9 +579,12 @@ CONFIG_BOARDCTL_CANINIT=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=1
@@ -670,6 +685,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=464
 # CONFIG_DISABLE_POLL is not set
 # CONFIG_DEV_NULL is not set
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -684,6 +700,7 @@ CONFIG_CAN=y
 CONFIG_CAN_FIFOSIZE=8
 CONFIG_CAN_NPENDINGRTR=4
 # CONFIG_CAN_TXREADY is not set
+CONFIG_CAN_NPOLLWAITERS=2
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
 # CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
@@ -694,9 +711,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -710,8 +732,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -719,6 +751,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -727,9 +760,10 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -776,19 +810,25 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -826,12 +866,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -896,7 +930,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=0
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -904,8 +937,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -932,6 +967,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=768
 #
 # CAN Utilities
 #
+# CONFIG_CANUTILS_CANLIB is not set
 # CONFIG_CANUTILS_LIBCANARD is not set
 
 #
@@ -945,7 +981,6 @@ CONFIG_EXAMPLES_CAN_NMSGS=32
 CONFIG_EXAMPLES_CAN_READWRITE=y
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -953,10 +988,10 @@ CONFIG_EXAMPLES_CAN_READWRITE=y
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -966,35 +1001,34 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1016,8 +1050,8 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1083,13 +1117,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 CONFIG_NSH_DISABLE_MKDIR=y
-CONFIG_NSH_DISABLE_MKFIFO=y
 CONFIG_NSH_DISABLE_MKRD=y
 # CONFIG_NSH_DISABLE_MH is not set
 CONFIG_NSH_DISABLE_MOUNT=y
 CONFIG_NSH_DISABLE_MV=y
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PSSTACKUSAGE is not set
 CONFIG_NSH_DISABLE_PUT=y
 CONFIG_NSH_DISABLE_PWD=y
 CONFIG_NSH_DISABLE_RM=y
@@ -1105,6 +1139,7 @@ CONFIG_NSH_DISABLE_UNSET=y
 CONFIG_NSH_DISABLE_USLEEP=y
 CONFIG_NSH_DISABLE_WGET=y
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1139,20 +1174,20 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
-# CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_STACKMONITOR is not set
+# CONFIG_SYSTEM_SUDOKU is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/olimexino-stm32/src/olimexino-stm32.h b/configs/olimexino-stm32/src/olimexino-stm32.h
index df496c98943db273d467361e1e4f879ee8c34ac7..987c55c00f76913a038456726c5c67b43d5b0797 100644
--- a/configs/olimexino-stm32/src/olimexino-stm32.h
+++ b/configs/olimexino-stm32/src/olimexino-stm32.h
@@ -200,18 +200,6 @@ void stm32_usb_set_pwr_callback(xcpt_t pwr_changed_handler);
 void stm32_led_initialize(void);
 #endif
 
-/************************************************************************************
- * Name: stm32_can_initialize
- *
- * Description:
- *   Called at application startup time to initialize the CAN functionality.
- *
- ************************************************************************************/
-
-#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2))
-int stm32_can_initialize(void);
-#endif
-
 /****************************************************************************
  * Name: board_usbmsc_initialize
  *
@@ -228,5 +216,17 @@ int stm32_can_initialize(void);
 int board_usbmsc_initialize(int port);
 #endif
 
+/****************************************************************************
+ * Name: stm32_can_setup
+ *
+ * Description:
+ *  Initialize CAN and register the CAN device
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CAN
+int stm32_can_setup(void);
+#endif
+
 #endif /* __ASSEMBLY__ */
 #endif /* __CONFIGS_OLIMEXINO_STM32_SRC_OLIMEXINO_STM32_H */
diff --git a/configs/olimexino-stm32/src/stm32_appinit.c b/configs/olimexino-stm32/src/stm32_appinit.c
index e9cd7fe0b4d71a64adcfc4e68169476d0df8207f..4fdc6a1c689f69544a9c6fb60e7f057448cb1039 100644
--- a/configs/olimexino-stm32/src/stm32_appinit.c
+++ b/configs/olimexino-stm32/src/stm32_appinit.c
@@ -49,8 +49,8 @@
 #include 
 #include 
 
-#ifdef CONFIG_SYSTEM_USBMONITOR
-#  include 
+#ifdef CONFIG_USBMONITOR
+#  include 
 #endif
 
 #ifdef CONFIG_USBDEV
@@ -105,5 +105,16 @@ int board_app_initialize(uintptr_t arg)
 #endif
 #endif
 
+#ifdef CONFIG_CAN
+  /* Initialize CAN and register the CAN driver. */
+
+  ret = stm32_can_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_can_setup failed: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
   return ret;
 }
diff --git a/configs/olimexino-stm32/src/stm32_boot.c b/configs/olimexino-stm32/src/stm32_boot.c
index 1d8d40bb3fb00b1977ffb68dca7b5960f7d7e760..bda0b8737562b109a5824f9d9a9d95d8382f2af7 100644
--- a/configs/olimexino-stm32/src/stm32_boot.c
+++ b/configs/olimexino-stm32/src/stm32_boot.c
@@ -58,7 +58,7 @@
  ************************************************************************************/
 
 #if defined(CONFIG_USBDEV)
-static int vbus_handler(int irq, FAR void *context)
+static int vbus_handler(int irq, FAR void *context, FAR void *arg)
 {
   return OK;
 }
diff --git a/configs/olimexino-stm32/src/stm32_buttons.c b/configs/olimexino-stm32/src/stm32_buttons.c
index 85066d568f66aa487b1eb0c694d2d7672dd402af..971bdb79f2271285bcfae49d7ed4b4030d918e07 100644
--- a/configs/olimexino-stm32/src/stm32_buttons.c
+++ b/configs/olimexino-stm32/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/olimexino-stm32/src/stm32_buttons.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *           David_s5 
  *
@@ -41,6 +41,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -50,21 +51,10 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
+
 /****************************************************************************
  * Button support.
  *
@@ -80,8 +70,7 @@
  *   will be called when a button is depressed or released.  The ID value is
  *   a button enumeration value that uniquely identifies a button resource.
  *   See the BUTTON_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned
- *   (so that it may restored, if so desired).
+ *   value.
  *
  ****************************************************************************/
 
@@ -127,24 +116,24 @@ uint8_t board_buttons(void)
  *   will be called when a button is depressed or released.  The ID value is
  *   a button enumeration value that uniquely identifies a button resource.
  *   See the BUTTON_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned
- *   (so that it may restored, if so desired).
+ *   value.
  *
  ****************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   /* The following should be atomic */
 
   if (id == IRQBUTTON)
     {
-      oldhandler = stm32_gpiosetevent(BUTTON_BOOT0n, true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(BUTTON_BOOT0n, true, true, true, irqhandler,
+                               arg);
     }
 
-  return oldhandler;
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/olimexino-stm32/src/stm32_can.c b/configs/olimexino-stm32/src/stm32_can.c
index 00e5c374de2efb6d492fd38bc9f2c8a1b5f13ebf..862def8094da20df7273222349c546f078367dd2 100644
--- a/configs/olimexino-stm32/src/stm32_can.c
+++ b/configs/olimexino-stm32/src/stm32_can.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/olimexino-stm32/src/stm32_can.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *           David Sidrane 
  *
@@ -43,18 +43,17 @@
 #include 
 #include 
 
-#include 
+#include 
 #include 
 
 #include "chip.h"
 #include "up_arch.h"
-
-#include "olimexino-stm32.h"
-
 #include "stm32.h"
 #include "stm32_can.h"
 
-#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2))
+#include "olimexino-stm32.h"
+
+#ifdef CONFIG_CAN
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -62,74 +61,57 @@
 /* Configuration ********************************************************************/
 /* The STM32F107VC supports CAN1 and CAN2 */
 
-#define CAN_PORT 1
-
-/* Debug ***************************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
+#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2)
+#  warning "Both CAN1 and CAN2 are enabled.  Only CAN1 is connected."
+#  undef CONFIG_STM32_CAN2
+#endif
 
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
+#ifdef CONFIG_STM32_CAN1
+#  define CAN_PORT 1
 #else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
+#  define CAN_PORT 2
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_can_initialize
+ * Name: stm32_can_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/can.
+ *  Initialize CAN and register the CAN device
  *
  ************************************************************************************/
 
-int board_can_initialize(void)
+int stm32_can_setup(void)
 {
-  static bool initialized = false;
+#if defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)
   struct can_dev_s *can;
   int ret;
 
-  /* Check if we have already initialized */
+  /* Call stm32_caninitialize() to get an instance of the CAN interface */
 
-  if (!initialized)
+  can = stm32_caninitialize(CAN_PORT);
+  if (can == NULL)
     {
-      /* Call stm32_caninitialize() to get an instance of the CAN interface */
-
-      can = stm32_caninitialize(CAN_PORT);
-      if (can == NULL)
-        {
-          candbg("ERROR:  Failed to get CAN interface\n");
-          return -ENODEV;
-        }
-
-      /* Register the CAN driver at "/dev/can0" */
-
-      ret = can_register("/dev/can0", can);
-      if (ret < 0)
-        {
-          candbg("ERROR: can_register failed: %d\n", ret);
-          return ret;
-        }
+      canerr("ERROR:  Failed to get CAN interface\n");
+      return -ENODEV;
+    }
 
-      /* Now we are initialized */
+  /* Register the CAN driver at "/dev/can0" */
 
-      initialized = true;
+  ret = can_register("/dev/can0", can);
+  if (ret < 0)
+    {
+      canerr("ERROR: can_register failed: %d\n", ret);
+      return ret;
     }
 
   return OK;
+#else
+  return -ENODEV;
+#endif
 }
 
-#endif /* CONFIG_CAN && CONFIG_STM32_CAN1 */
+#endif /* CONFIG_CAN */
diff --git a/configs/olimexino-stm32/src/stm32_leds.c b/configs/olimexino-stm32/src/stm32_leds.c
index 4e41af6ad3836125ee844cb09a26db52a6194c1c..0440162844361dd094b3bdd8b0ad413d3e4d1a9e 100644
--- a/configs/olimexino-stm32/src/stm32_leds.c
+++ b/configs/olimexino-stm32/src/stm32_leds.c
@@ -54,25 +54,9 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS)
+#ifdef CONFIG_DEBUG_LEDS_INFO
 #  define led_dumpgpio(m) stm32_dumpgpio(GPIO_LED_GREEN, m)
 #else
 #  define led_dumpgpio(m)
diff --git a/configs/olimexino-stm32/src/stm32_spi.c b/configs/olimexino-stm32/src/stm32_spi.c
index 59dc0db8922c21826bb96532cca8e5d7e70014ae..249a3b39d84866726f46bc4bcec325cc2d95a8c4 100644
--- a/configs/olimexino-stm32/src/stm32_spi.c
+++ b/configs/olimexino-stm32/src/stm32_spi.c
@@ -55,32 +55,6 @@
 
 #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -135,7 +109,7 @@ void weak_function stm32_spidev_initialize(void)
 #ifdef CONFIG_STM32_SPI1
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
   if (devid == SPIDEV_USER)
     {
       stm32_gpiowrite(USER_CSn, !selected);
@@ -151,7 +125,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI2
 void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 #if defined(CONFIG_MMCSD)
   if (devid == SPIDEV_MMCSD)
     {
@@ -171,7 +145,7 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI3
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
diff --git a/configs/olimexino-stm32/src/stm32_usbdev.c b/configs/olimexino-stm32/src/stm32_usbdev.c
index 8e600c508fb6424f1c7fb1d30a2c861b41d10021..148ae44312950c9bb3f53d677e09641c2c07753a 100644
--- a/configs/olimexino-stm32/src/stm32_usbdev.c
+++ b/configs/olimexino-stm32/src/stm32_usbdev.c
@@ -77,7 +77,7 @@
 
 void stm32_usb_set_pwr_callback(xcpt_t pwr_changed_handler)
 {
-  (void) stm32_gpiosetevent(GPIO_USB_VBUS, true, true, true, pwr_changed_handler);
+  (void)stm32_gpiosetevent(GPIO_USB_VBUS, true, true, true, pwr_changed_handler, NULL);
 }
 
 /************************************************************************************
@@ -90,7 +90,7 @@ void stm32_usb_set_pwr_callback(xcpt_t pwr_changed_handler)
 
 void stm32_usbinitialize(void)
 {
-  ulldbg("called\n");
+  uinfo("called\n");
 
   /* USB Soft Connect Pullup */
 
@@ -129,5 +129,5 @@ int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable)
 
 void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
diff --git a/configs/olimexino-stm32/tiny/Make.defs b/configs/olimexino-stm32/tiny/Make.defs
index b9e08679d27a54b690b3188e3f862c171570fb9d..eb7ea80ed5561b7d2b853ea06a4f6832883cc3fc 100644
--- a/configs/olimexino-stm32/tiny/Make.defs
+++ b/configs/olimexino-stm32/tiny/Make.defs
@@ -90,7 +90,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/olimexino-stm32/tiny/defconfig b/configs/olimexino-stm32/tiny/defconfig
index 4fe4bb5a90146f5ce194fc0fc6922daa68f04ad4..9dce94029a1bdac57a12ba89986cc362480d7dcc 100644
--- a/configs/olimexino-stm32/tiny/defconfig
+++ b/configs/olimexino-stm32/tiny/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 CONFIG_STACK_COLORATION=y
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -204,6 +204,7 @@ CONFIG_ARCH_CHIP_STM32F103RB=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -421,6 +422,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 CONFIG_STM32_FORCEPOWER=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_PWM is not set
 # CONFIG_STM32_TIM3_PWM is not set
 # CONFIG_STM32_TIM1_CAP is not set
@@ -434,9 +441,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 CONFIG_SERIAL_DISABLE_REORDERING=y
 CONFIG_STM32_FLOWCONTROL_BROKEN=y
 # CONFIG_STM32_USART_BREAKS is not set
@@ -548,13 +563,11 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
-CONFIG_BOARDCTL_CANINIT=y
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -566,9 +579,12 @@ CONFIG_BOARDCTL_CANINIT=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=1
@@ -674,6 +690,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=464
 # CONFIG_DISABLE_POLL is not set
 # CONFIG_DEV_NULL is not set
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -688,6 +705,7 @@ CONFIG_CAN=y
 CONFIG_CAN_FIFOSIZE=8
 CONFIG_CAN_NPENDINGRTR=4
 # CONFIG_CAN_TXREADY is not set
+CONFIG_CAN_NPOLLWAITERS=2
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
 # CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
@@ -698,9 +716,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -714,8 +737,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -723,6 +756,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -731,9 +765,10 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -778,19 +813,25 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -823,12 +864,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -893,7 +928,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=0
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -901,8 +935,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -929,6 +965,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=768
 #
 # CAN Utilities
 #
+# CONFIG_CANUTILS_CANLIB is not set
 # CONFIG_CANUTILS_LIBCANARD is not set
 
 #
@@ -941,7 +978,6 @@ CONFIG_EXAMPLES_CAN_DEVPATH="/dev/can0"
 CONFIG_EXAMPLES_CAN_READWRITE=y
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -949,10 +985,10 @@ CONFIG_EXAMPLES_CAN_READWRITE=y
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LEDS is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -962,20 +998,18 @@ CONFIG_EXAMPLES_CAN_READWRITE=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -987,10 +1021,10 @@ CONFIG_EXAMPLES_CAN_READWRITE=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1012,8 +1046,8 @@ CONFIG_EXAMPLES_CAN_READWRITE=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1047,20 +1081,20 @@ CONFIG_EXAMPLES_CAN_READWRITE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
-# CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_STACKMONITOR is not set
+# CONFIG_SYSTEM_SUDOKU is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/open1788/README.txt b/configs/open1788/README.txt
index 7d46f0e5cdf6374991452f93a484f05799d24b87..b8604d6346a03fd63df4e51e75774f68f3b3169c 100644
--- a/configs/open1788/README.txt
+++ b/configs/open1788/README.txt
@@ -422,7 +422,7 @@ CONFIGURATION
             CONFIG_SPI_EXCHANGE=n             : exchange() method is not supported
 
           System Type:
-            CONFIG_GPIO_IRQ=y                 : GPIO interrupt support
+            CONFIG_LPC17_GPIOIRQ=y                 : GPIO interrupt support
             CONFIG_LPC17_SSP1=y               : Enable support for SSP1
 
           RTOS Features:
@@ -438,8 +438,8 @@ CONFIGURATION
           debug output can be enabled with:
 
           Build Setup:
-            CONFIG_DEBUG=y                    : Enable debug features
-            CONFIG_DEBUG_VERBOSE=y            : Enable verbose debug output
+            CONFIG_DEBUG_FEATURES=y           : Enable debug features
+            CONFIG_DEBUG_INFO=y               : Enable verbose debug output
             CONFIG_DEBUG_INPUT=y              : Enable debug output from input devices
 
        c) You will also have to disable SD card support to use this test.  The
@@ -463,36 +463,10 @@ CONFIGURATION
           For touchscreen debug output:
 
           Build Setup:
-            CONFIG_DEBUG=y
-            CONFIG_DEBUG_VERBOSE=y
+            CONFIG_DEBUG_FEATURES=y
+            CONFIG_DEBUG_INFO=y
             CONFIG_DEBUG_INPUT=y
 
-    7. The button test (apps/examples/buttons) can be built-in by adding
-       the following options.  See apps/examples/README.txt for further
-       information about the button test.
-
-       System Type:
-         CONFIG_GPIO_IRQ=y
-
-       Board Selection:
-        CONFIG_ARCH_BUTTONS=y
-        CONFIG_ARCH_IRQBUTTONS=y
-
-        Application Configuration:
-        CONFIG_EXAMPLES_BUTTONS=y
-        CONFIG_EXAMPLES_BUTTONS_MIN=0
-        CONFIG_EXAMPLES_BUTTONS_MAX=7
-        CONFIG_EXAMPLES_IRQBUTTONS_MIN=1
-        CONFIG_EXAMPLES_IRQBUTTONS_MAX=7
-        CONFIG_EXAMPLES_BUTTONS_NAME0="USER1"
-        CONFIG_EXAMPLES_BUTTONS_NAME1="USER2"
-        CONFIG_EXAMPLES_BUTTONS_NAME2="USER3"
-        CONFIG_EXAMPLES_BUTTONS_NAME3="JOYSTICK_A"
-        CONFIG_EXAMPLES_BUTTONS_NAME4="JOYSTICK_B"
-        CONFIG_EXAMPLES_BUTTONS_NAME5="JOYSTICK_C"
-        CONFIG_EXAMPLES_BUTTONS_NAME6="JOYSTICK_D"
-        CONFIG_EXAMPLES_BUTTONS_NAME7="JOYSTICK_CTR"
-
   nxlines
   -------
     Configures the graphics example located at examples/nsh.  This
diff --git a/configs/open1788/include/board.h b/configs/open1788/include/board.h
index c811ad4f6604267e5241cd43c85485015d03b894..11f47847cb0ada5c60abf6aa1f5bd0508dda2226 100644
--- a/configs/open1788/include/board.h
+++ b/configs/open1788/include/board.h
@@ -45,7 +45,7 @@
 
 #include 
 
-#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ)
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_GPIOIRQ)
 #  include 
 #endif
 
diff --git a/configs/open1788/knsh/Make.defs b/configs/open1788/knsh/Make.defs
index f4f93007ab342223e140f718156b1de794343fd5..288985bb88fcb51d1358c66d0c4a4c4ecb862207 100644
--- a/configs/open1788/knsh/Make.defs
+++ b/configs/open1788/knsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/open1788/knsh/defconfig b/configs/open1788/knsh/defconfig
index 566df000ae0a47916c5a85ba1d6baf3473227643..77f559068433787edaa6589b6a06fd459cc73ee3 100644
--- a/configs/open1788/knsh/defconfig
+++ b/configs/open1788/knsh/defconfig
@@ -42,12 +42,15 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
@@ -62,10 +65,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -75,13 +80,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
 # CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -90,35 +97,64 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 CONFIG_ARM_MPU=y
 CONFIG_ARM_MPU_NREGIONS=8
 
 #
 # ARMV7M Configuration Options
 #
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
 CONFIG_ARMV7M_OABI_TOOLCHAIN=y
-# CONFIG_GPIO_IRQ is not set
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
 
 #
 # LPC17xx Configuration Options
@@ -196,14 +232,13 @@ CONFIG_LPC17_GPDMA=y
 #
 # Serial driver options
 #
-# CONFIG_SERIAL_TERMIOS is not set
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
-# SDIO Configuration
+# SDCARD Configuration
 #
-CONFIG_SDIO_DMA=y
-CONFIG_SDIO_DMAPRIO=0x0
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
+CONFIG_LPC17_SDCARD_DMA=y
+# CONFIG_LPC17_SDCARD_WIDTH_D1_ONLY is not set
 
 #
 # Architecture Options
@@ -216,11 +251,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 CONFIG_ARCH_USE_MPU=y
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -276,12 +314,12 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
+# CONFIG_LIB_BOARDCTL is not set
 
 #
 # RTOS Features
@@ -299,6 +337,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=3
@@ -311,8 +350,13 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -323,6 +367,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -346,6 +392,7 @@ CONFIG_NAME_MAX=32
 # RTOS hooks
 #
 CONFIG_BOARD_INITIALIZE=y
+# CONFIG_BOARD_INITTHREAD is not set
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
@@ -364,6 +411,17 @@ CONFIG_SIG_SIGWORK=17
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
 
 #
 # Stack and heap information
@@ -382,6 +440,7 @@ CONFIG_SYS_NNEST=2
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 CONFIG_DEV_LOOP=y
 
 #
@@ -392,20 +451,48 @@ CONFIG_DEV_LOOP=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
-# CONFIG_TIMER is not set
 # CONFIG_ANALOG is not set
 # CONFIG_AUDIO_DEVICES is not set
 # CONFIG_VIDEO_DEVICES is not set
 CONFIG_BCH=y
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -413,18 +500,27 @@ CONFIG_MMCSD_NSLOTS=1
 CONFIG_MMCSD_MMCSUPPORT=y
 CONFIG_MMCSD_HAVECARDDETECT=y
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
+# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
 CONFIG_MMCSD_SDIO=y
 # CONFIG_SDIO_PREFLIGHT is not set
 # CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_SDIO_BLOCKSETUP=y
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
 CONFIG_PIPES=y
+CONFIG_DEV_PIPE_MAXSIZE=1024
+CONFIG_DEV_PIPE_SIZE=1024
+CONFIG_DEV_FIFO_SIZE=1024
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -447,13 +543,15 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART6_SERIALDRIVER is not set
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART0_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
 
 #
@@ -467,20 +565,27 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -506,23 +611,23 @@ CONFIG_UART0_2STOP=0
 # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
 CONFIG_FS_READABLE=y
 CONFIG_FS_WRITABLE=y
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
 CONFIG_FS_FAT=y
 CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 CONFIG_FS_ROMFS=y
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -545,7 +650,11 @@ CONFIG_MM_REGIONS=2
 # CONFIG_AUDIO is not set
 
 #
-# Binary Formats
+# Wireless Support
+#
+
+#
+# Binary Loader
 #
 # CONFIG_BINFMT_DISABLE is not set
 # CONFIG_BINFMT_EXEPATH is not set
@@ -565,10 +674,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -579,24 +706,30 @@ CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
 CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
 CONFIG_ARCH_LOWPUTC=y
 # CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
-CONFIG_SCHED_WORKQUEUE=y
-CONFIG_SCHED_HPWORK=y
-CONFIG_SCHED_HPWORKPRIORITY=192
-CONFIG_SCHED_HPWORKPERIOD=50000
-CONFIG_SCHED_HPWORKSTACKSIZE=2048
-# CONFIG_SCHED_LPWORK is not set
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_USRWORK is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -609,26 +742,27 @@ CONFIG_SCHED_HPWORKSTACKSIZE=2048
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_IGMP is not set
 # CONFIG_EXAMPLES_JSON is not set
-# CONFIG_EXAMPLES_HIDKBD is not set
 # CONFIG_EXAMPLES_KEYPADTEST is not set
-# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -636,75 +770,80 @@ CONFIG_SCHED_HPWORKSTACKSIZE=2048
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
 #
 # CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
 
 #
 # Interpreters
 #
+# CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
 # CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -723,13 +862,16 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
 # CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
 CONFIG_NSH_DISABLE_DD=y
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -738,8 +880,10 @@ CONFIG_NSH_DISABLE_DD=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 CONFIG_NSH_DISABLE_LOSETUP=y
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -748,7 +892,10 @@ CONFIG_NSH_DISABLE_MKFATFS=y
 CONFIG_NSH_DISABLE_MKRD=y
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+CONFIG_NSH_DISABLE_PS=y
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
 # CONFIG_NSH_DISABLE_RM is not set
@@ -756,12 +903,16 @@ CONFIG_NSH_DISABLE_MKRD=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
@@ -785,6 +936,8 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 # CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -798,112 +951,21 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# EMACS-like Command Line Editor
-#
 # CONFIG_SYSTEM_CLE is not set
-
-#
-# FLASH Program Installation
-#
-# CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# Intel HEX to binary conversion
-#
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-
-#
-# P-Code Support
-#
-
-#
-# PHY Tool
-#
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sudoku
-#
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-
-#
-# Sysinfo
-#
-
-#
-# VI Work-Alike Editor
-#
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# USB Monitor
-#
-
-#
-# Zmodem Commands
-#
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/open1788/nsh/Make.defs b/configs/open1788/nsh/Make.defs
index 8b6db9259eb05cd35da3c0e74758ca0ee1a12d61..a6cf37202eafdbdb642a12091ff6c1fad245a151 100644
--- a/configs/open1788/nsh/Make.defs
+++ b/configs/open1788/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/open1788/nsh/defconfig b/configs/open1788/nsh/defconfig
index 82a8f975de530fb4074c1ecce7709617365df42a..cadcbd8d9d40f7d8d30655926b470345681ed6ab 100644
--- a/configs/open1788/nsh/defconfig
+++ b/configs/open1788/nsh/defconfig
@@ -37,14 +37,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -93,25 +97,40 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -121,6 +140,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -128,7 +148,6 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 CONFIG_ARMV7M_OABI_TOOLCHAIN=y
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -207,12 +226,13 @@ CONFIG_LPC17_GPDMA=y
 #
 # Serial driver options
 #
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
-# SDIO Configuration
+# SDCARD Configuration
 #
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
+CONFIG_LPC17_SDCARD_DMA=y
+# CONFIG_LPC17_SDCARD_WIDTH_D1_ONLY is not set
 
 #
 # Architecture Options
@@ -225,6 +245,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -286,18 +307,15 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -317,6 +335,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=3
@@ -329,6 +348,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -345,6 +365,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -371,6 +393,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -386,9 +409,10 @@ CONFIG_SIG_SIGWORK=17
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -412,6 +436,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 CONFIG_DEV_LOOP=y
 
 #
@@ -427,12 +452,16 @@ CONFIG_DEV_LOOP=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -440,7 +469,26 @@ CONFIG_DEV_LOOP=y
 # CONFIG_VIDEO_DEVICES is not set
 CONFIG_BCH=y
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -448,20 +496,27 @@ CONFIG_MMCSD_NSLOTS=1
 CONFIG_MMCSD_MMCSUPPORT=y
 CONFIG_MMCSD_HAVECARDDETECT=y
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
 CONFIG_MMCSD_SDIO=y
 # CONFIG_SDIO_PREFLIGHT is not set
 # CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 # CONFIG_SDIO_BLOCKSETUP is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_PIPES=y
+CONFIG_DEV_PIPE_MAXSIZE=1024
+CONFIG_DEV_PIPE_SIZE=1024
+CONFIG_DEV_FIFO_SIZE=1024
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -485,10 +540,6 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
@@ -512,19 +563,26 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
 # CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -558,7 +616,9 @@ CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 CONFIG_FS_ROMFS=y
 # CONFIG_FS_TMPFS is not set
@@ -567,12 +627,6 @@ CONFIG_FS_ROMFS=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -591,6 +645,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -613,11 +671,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -635,15 +710,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -667,6 +749,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -675,10 +760,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -687,40 +772,49 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -733,8 +827,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -744,7 +839,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -753,6 +850,7 @@ CONFIG_EXAMPLES_NSH=y
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -790,8 +888,10 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -802,6 +902,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -810,6 +911,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -817,11 +919,14 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_FILEIOSIZE=512
@@ -840,6 +945,8 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -853,13 +960,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -867,5 +973,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/open1788/nxlines/Make.defs b/configs/open1788/nxlines/Make.defs
index fbe022bd306832dfbbd141511eef762b37c7a860..f54f4c07d7cb5b1340f175e05b5e3659ed742bf7 100644
--- a/configs/open1788/nxlines/Make.defs
+++ b/configs/open1788/nxlines/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/open1788/nxlines/defconfig b/configs/open1788/nxlines/defconfig
index 486cc41cb0fa82694644f24e60af1a9909094363..df31a8370f2967d735bc5f6ac695783f5fff85bf 100644
--- a/configs/open1788/nxlines/defconfig
+++ b/configs/open1788/nxlines/defconfig
@@ -7,6 +7,7 @@
 # Build Setup
 #
 # CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
 CONFIG_HOST_LINUX=y
 # CONFIG_HOST_OSX is not set
 # CONFIG_HOST_WINDOWS is not set
@@ -16,6 +17,7 @@ CONFIG_HOST_LINUX=y
 # Build Configuration
 #
 # CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
 # CONFIG_BUILD_2PASS is not set
 
 #
@@ -25,20 +27,31 @@ CONFIG_HOST_LINUX=y
 CONFIG_INTELHEX_BINARY=y
 # CONFIG_MOTOROLA_SREC is not set
 # CONFIG_RAW_BINARY is not set
+# CONFIG_UBOOT_UIMAGE is not set
 
 #
 # Customize Header Files
 #
+# CONFIG_ARCH_STDINT_H is not set
 # CONFIG_ARCH_STDBOOL_H is not set
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
 
 #
 # System Type
@@ -47,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -58,39 +70,81 @@ CONFIG_ARCH="arm"
 #
 # ARM Options
 #
+# CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
 # CONFIG_ARCH_CHIP_LPC31XX is not set
 # CONFIG_ARCH_CHIP_LPC43XX is not set
 # CONFIG_ARCH_CHIP_NUC1XX is not set
-# CONFIG_ARCH_CHIP_SAM3U is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
 CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
-CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARMV7M_LAZYFPU is not set
+# CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
 # ARMV7M Configuration Options
 #
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
 CONFIG_ARMV7M_OABI_TOOLCHAIN=y
-# CONFIG_GPIO_IRQ is not set
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_LPC17_GPIOIRQ is not set
+# CONFIG_SERIAL_TERMIOS is not set
 
 #
 # LPC17xx Configuration Options
@@ -117,7 +171,6 @@ CONFIG_ARMV7M_OABI_TOOLCHAIN=y
 # CONFIG_ARCH_CHIP_LPC1787 is not set
 CONFIG_ARCH_CHIP_LPC1788=y
 CONFIG_ARCH_FAMILY_LPC178X=y
-CONFIG_ARCH_HAVE_SDIO=y
 
 #
 # LPC17xx Peripheral Support
@@ -162,18 +215,31 @@ CONFIG_LPC17_GPDMA=y
 # CONFIG_LPC17_FLASH is not set
 # CONFIG_LPC17_EEPROM is not set
 
+#
+# External Memory Configuration
+#
+CONFIG_ARCH_HAVE_EXTNAND=y
+CONFIG_ARCH_HAVE_EXTNOR=y
+CONFIG_ARCH_HAVE_EXTDRAM=y
+CONFIG_ARCH_HAVE_EXTSRAM0=y
+# CONFIG_LPC17_EXTNAND is not set
+# CONFIG_LPC17_EXTNOR is not set
+CONFIG_LPC17_EXTDRAM=y
+CONFIG_LPC17_EXTDRAMSIZE=67108864
+# CONFIG_LPC17_SDRAM_8BIT is not set
+CONFIG_LPC17_SDRAM_16BIT=y
+# CONFIG_LPC17_SDRAM_32BIT is not set
+CONFIG_LPC17_EXTDRAMHEAP=y
+# CONFIG_LPC17_EXTSRAM0 is not set
+
 #
 # Serial driver options
 #
-# CONFIG_SERIAL_TERMIOS is not set
-# CONFIG_UART0_FLOWCONTROL is not set
 
 #
 # SDIO Configuration
 #
 # CONFIG_SDIO_DMA is not set
-CONFIG_SDIO_DMAPRIO=0x0
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # LCD device driver options
@@ -200,31 +266,30 @@ CONFIG_LPC17_LCD_VPULSE=2
 CONFIG_LPC17_LCD_VFRONTPORCH=8
 CONFIG_LPC17_LCD_VBACKPORCH=8
 
-#
-# External Memory Configuration
-#
-CONFIG_ARCH_HAVE_EXTNAND=y
-CONFIG_ARCH_HAVE_EXTNOR=y
-CONFIG_ARCH_HAVE_EXTDRAM=y
-CONFIG_ARCH_HAVE_EXTSRAM0=y
-# CONFIG_LPC17_EXTNAND is not set
-# CONFIG_LPC17_EXTNOR is not set
-CONFIG_LPC17_EXTDRAM=y
-CONFIG_LPC17_EXTDRAMSIZE=67108864
-CONFIG_LPC17_EXTDRAMHEAP=y
-# CONFIG_LPC17_EXTSRAM0 is not set
-
 #
 # Architecture Options
 #
 # CONFIG_ARCH_NOINTC is not set
 # CONFIG_ARCH_VECNOTIRQ is not set
-# CONFIG_ARCH_DMA is not set
-# CONFIG_ARCH_IRQPRIO is not set
-# CONFIG_ARCH_ADDRENV is not set
+CONFIG_ARCH_DMA=y
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
 # CONFIG_ARCH_HAVE_RAMFUNCS is not set
 CONFIG_ARCH_HAVE_RAMVECTORS=y
 # CONFIG_ARCH_RAMVECTORS is not set
@@ -234,10 +299,14 @@ CONFIG_ARCH_HAVE_RAMVECTORS=y
 #
 CONFIG_BOARD_LOOPSPERMSEC=11934
 # CONFIG_ARCH_CALIBRATION is not set
-CONFIG_RAM_START=0x10000000
-CONFIG_RAM_SIZE=65536
+
+#
+# Interrupt options
+#
 CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
 CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
 
 #
 # Boot options
@@ -248,6 +317,14 @@ CONFIG_BOOT_RUNFROMFLASH=y
 # CONFIG_BOOT_RUNFROMSDRAM is not set
 # CONFIG_BOOT_COPYTORAM is not set
 
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x10000000
+CONFIG_RAM_SIZE=65536
+CONFIG_ARCH_HAVE_SDRAM=y
+# CONFIG_BOOT_SDRAM_DATA is not set
+
 #
 # Board Selection
 #
@@ -267,37 +344,79 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_LIB_BOARDCTL is not set
 
 #
 # RTOS Features
 #
-# CONFIG_BOARD_INITIALIZE is not set
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
 CONFIG_USEC_PER_TICK=10000
-CONFIG_RR_INTERVAL=200
-# CONFIG_SCHED_INSTRUMENTATION is not set
-CONFIG_TASK_NAME_SIZE=0
-# CONFIG_SCHED_HAVE_PARENT is not set
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=3
 CONFIG_START_DAY=4
-CONFIG_DEV_CONSOLE=y
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nxlines_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
 # CONFIG_MUTEX_TYPES is not set
-# CONFIG_PRIORITY_INHERITANCE is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
 # CONFIG_FDCLONE_DISABLE is not set
 # CONFIG_FDCLONE_STDIO is not set
 # CONFIG_SDCLONE_DISABLE is not set
-CONFIG_SCHED_WAITPID=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
-CONFIG_USER_ENTRYPOINT="nxlines_main"
-CONFIG_DISABLE_OS_API=y
-# CONFIG_DISABLE_POSIX_TIMERS is not set
-# CONFIG_DISABLE_PTHREAD is not set
-# CONFIG_DISABLE_SIGNALS is not set
-# CONFIG_DISABLE_MQUEUE is not set
-# CONFIG_DISABLE_ENVIRON is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -309,19 +428,21 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 CONFIG_SIG_SIGWORK=17
 
 #
-# Sizes of configurable things (0 disables)
+# POSIX Message Queue Options
 #
-CONFIG_MAX_TASKS=16
-CONFIG_NPTHREAD_KEYS=4
-CONFIG_NFILE_DESCRIPTORS=8
-CONFIG_NFILE_STREAMS=8
-CONFIG_NAME_MAX=32
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
-CONFIG_MAX_WDOGPARMS=2
-CONFIG_PREALLOC_WDOGS=4
-CONFIG_WDOG_INTRESERVE=0
-CONFIG_PREALLOC_TIMERS=4
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
 
 #
 # Stack and heap information
@@ -330,6 +451,7 @@ CONFIG_IDLETHREAD_STACKSIZE=1024
 CONFIG_USERMAIN_STACKSIZE=2048
 CONFIG_PTHREAD_STACK_MIN=256
 CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
 
 #
 # Device Drivers
@@ -338,40 +460,103 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
 CONFIG_DEV_LOOP=y
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
+# CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
 CONFIG_BCH=y
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
 # CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set
 CONFIG_MMCSD_MMCSUPPORT=y
 CONFIG_MMCSD_HAVECARDDETECT=y
+CONFIG_ARCH_HAVE_SDIO=y
+# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
 CONFIG_MMCSD_SDIO=y
+# CONFIG_SDIO_PREFLIGHT is not set
 # CONFIG_SDIO_MUXBUS is not set
 # CONFIG_SDIO_BLOCKSETUP is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
 CONFIG_PIPES=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
-CONFIG_CONFIG_SERIAL_NPOLLWAITERS=2
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART0_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
 
 #
@@ -383,24 +568,38 @@ CONFIG_UART0_BAUD=115200
 CONFIG_UART0_BITS=8
 CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
+# CONFIG_UART0_IFLOWCONTROL is not set
+# CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
 #
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
 # CONFIG_NET is not set
 
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
 #
 # File Systems
 #
@@ -409,29 +608,38 @@ CONFIG_UART0_2STOP=0
 # File system configuration
 #
 # CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+CONFIG_FS_READABLE=y
+CONFIG_FS_WRITABLE=y
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
 CONFIG_FS_FAT=y
 CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 CONFIG_FS_ROMFS=y
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
 #
 CONFIG_NX=y
 CONFIG_NX_NPLANES=1
+CONFIG_NX_BGCOLOR=0x0
+# CONFIG_NX_ANTIALIASING is not set
 # CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -449,15 +657,16 @@ CONFIG_NX_PACKEDMSFIRST=y
 # Input Devices
 #
 # CONFIG_NX_XYINPUT is not set
+CONFIG_NX_XYINPUT_NONE=y
+# CONFIG_NX_XYINPUT_MOUSE is not set
+# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set
 # CONFIG_NX_KBD is not set
 
 #
 # Framed Window Borders
 #
 CONFIG_NXTK_BORDERWIDTH=4
-CONFIG_NXTK_BORDERCOLOR1=0
-CONFIG_NXTK_BORDERCOLOR2=0
-CONFIG_NXTK_BORDERCOLOR3=0
+CONFIG_NXTK_DEFAULT_BORDERCOLORS=y
 # CONFIG_NXTK_AUTORAISE is not set
 
 #
@@ -482,6 +691,30 @@ CONFIG_NXFONT_SANS28X37B=y
 # CONFIG_NXFONT_SERIF22X28B is not set
 # CONFIG_NXFONT_SERIF27X38B is not set
 # CONFIG_NXFONT_SERIF38X49B is not set
+# CONFIG_NXFONT_PIXEL_UNICODE is not set
+# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
 # CONFIG_NXTERM is not set
 
 #
@@ -494,10 +727,20 @@ CONFIG_NXFONT_SANS28X37B=y
 #
 # CONFIG_MM_SMALL is not set
 CONFIG_MM_REGIONS=2
+# CONFIG_ARCH_HAVE_HEAP2 is not set
 # CONFIG_GRAN is not set
 
 #
-# Binary Formats
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
 #
 # CONFIG_BINFMT_DISABLE is not set
 # CONFIG_BINFMT_EXEPATH is not set
@@ -522,6 +765,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
 # CONFIG_EOL_IS_BOTH_CRLF is not set
@@ -531,21 +776,24 @@ CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
 CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
 CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
-CONFIG_SCHED_WORKQUEUE=y
-CONFIG_SCHED_HPWORK=y
-CONFIG_SCHED_HPWORKPRIORITY=192
-CONFIG_SCHED_HPWORKPERIOD=50000
-CONFIG_SCHED_HPWORKSTACKSIZE=2048
-# CONFIG_SCHED_LPWORK is not set
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
 
 #
 # Basic CXX Support
@@ -562,103 +810,110 @@ CONFIG_SCHED_HPWORKSTACKSIZE=2048
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
-# CONFIG_SYSTEM_COMPOSITE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
-# CONFIG_EXAMPLES_LCDRW is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
-# CONFIG_EXAMPLES_MOUNT is not set
 # CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 CONFIG_EXAMPLES_NXLINES=y
 CONFIG_EXAMPLES_NXLINES_VPLANE=0
 CONFIG_EXAMPLES_NXLINES_DEVNO=0
-CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x00006400
+CONFIG_EXAMPLES_NXLINES_DEFAULT_COLORS=y
 CONFIG_EXAMPLES_NXLINES_LINEWIDTH=16
-CONFIG_EXAMPLES_NXLINES_LINECOLOR=0x00ffff00
 CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=16
-CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0x00ffff00
-CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0x00f5f5dc
 CONFIG_EXAMPLES_NXLINES_BPP=32
-# CONFIG_EXAMPLES_NXLINES_EXTERNINIT is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PASHELLO is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
-# CONFIG_SYSTEM_USBMSC is not set
+# CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
 #
 # CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
 
 #
 # Interpreters
 #
+# CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
 # CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPC is not set
-# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
-# CONFIG_NETDB_DNSCLIENT is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TELNETD is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
@@ -670,51 +925,26 @@ CONFIG_EXAMPLES_NXLINES_BPP=32
 #
 
 #
-# System NSH Add-Ons
+# Platform-specific Support
 #
+# CONFIG_PLATFORM_CONFIGDATA is not set
 
 #
-# Custom Free Memory Command
+# System Libraries and NSH Add-Ons
 #
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
 # CONFIG_SYSTEM_FREE is not set
-
-#
-# I2C tool
-#
-
-#
-# FLASH Program Installation
-#
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-
-#
-# RAM Test
-#
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sysinfo
-#
-
-#
-# USB Monitor
-#
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/open1788/src/lpc17_appinit.c b/configs/open1788/src/lpc17_appinit.c
index d1ccc94df217624056a2b5c0a9a8d075b3220c37..7a43837649f2c874f557548dba4f6b692e6d2fb9 100644
--- a/configs/open1788/src/lpc17_appinit.c
+++ b/configs/open1788/src/lpc17_appinit.c
@@ -104,7 +104,7 @@
 #ifdef NSH_HAVE_MMCSD
 #  ifdef CONFIG_MMCSD_HAVECARDDETECT
 #    define NSH_HAVE_MMCSD_CD 1
-#    ifdef CONFIG_GPIO_IRQ
+#    ifdef CONFIG_LPC17_GPIOIRQ
 #      define NSH_HAVE_MMCSD_CDINT 1
 #    endif
 #  endif
@@ -209,7 +209,7 @@ static int nsh_waiter(int argc, char *argv[])
  ****************************************************************************/
 
 #ifdef NSH_HAVE_MMCSD_CDINT
-static int nsh_cdinterrupt(int irq, FAR void *context)
+static int nsh_cdinterrupt(int irq, FAR void *context, FAR void *arg)
 {
   static bool inserted = 0xff; /* Impossible value */
   bool present;
@@ -249,7 +249,7 @@ static int nsh_sdinitialize(void)
 
 #ifdef NSH_HAVE_MMCSD_CDINT
 
-   (void)irq_attach(LPC17_IRQ_P0p13, nsh_cdinterrupt);
+   (void)irq_attach(LPC17_IRQ_P0p13, nsh_cdinterrupt, NULL);
    up_enable_irq(LPC17_IRQ_P0p13);
 
 #endif
diff --git a/configs/open1788/src/lpc17_autoleds.c b/configs/open1788/src/lpc17_autoleds.c
index b2d5f997c309acde1e12e8cd951e23341f717c87..e49b76867770fdb4e05ed422a901e0dce0d6dae3 100644
--- a/configs/open1788/src/lpc17_autoleds.c
+++ b/configs/open1788/src/lpc17_autoleds.c
@@ -134,25 +134,9 @@
 #define LED_IDLE_OFF_SETBITS         ((OPEN1788_LED4) << OFF_SETBITS_SHIFT)
 #define LED_IDLE_OFF_CLRBITS         ((0) << OFF_CLRBITS_SHIFT)
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS)
+#ifdef CONFIG_DEBUG_LEDS_INFO
 #  define led_dumpgpio(m) lpc17_dumpgpio(???, m)
 #else
 #  define led_dumpgpio(m)
diff --git a/configs/open1788/src/lpc17_buttons.c b/configs/open1788/src/lpc17_buttons.c
index 4509e2fe598eb0ea939c1be1cef56c2837e5099d..e7a7cf88517999b01640cb518e0042c9c66d6237 100644
--- a/configs/open1788/src/lpc17_buttons.c
+++ b/configs/open1788/src/lpc17_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/open1788/src/lpc17_buttons.c
  *
- *   Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -41,6 +41,7 @@
 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -89,13 +90,7 @@ static const lpc17_pinset_t g_buttoncfg[BOARD_NUM_BUTTONS] =
   GPIO_JOY_B, GPIO_JOY_C, GPIO_JOY_D, GPIO_JOY_CTR
 };
 
-/* This array defines all of the interrupt handlers current attached to
- * button events.
- */
-
-#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ)
-static xcpt_t g_buttonisr[BOARD_NUM_BUTTONS];
-
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_GPIOIRQ)
 /* This array provides the mapping from button ID numbers to button IRQ
  * numbers.
  */
@@ -189,8 +184,7 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BOARD_BUTTON_* and BOARD_JOYSTICK_* definitions in board.h for the meaning
- *   of enumeration values.  The previous interrupt handler address is returned
- *   (so that it may restored, if so desired).
+ *   of enumeration values.
  *
  *   Note that board_button_irq() also enables button interrupts.  Button
  *   interrupts will remain enabled after the interrupt handler is attached.
@@ -199,11 +193,11 @@ uint8_t board_buttons(void)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ)
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_GPIOIRQ)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
   irqstate_t flags;
+  int ret = -EINVAL;
   int irq;
 
   /* Verify that the button ID is within range */
@@ -221,11 +215,6 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
 
           flags = enter_critical_section();
 
-          /* Return the current button handler and set the new interrupt handler */
-
-          oldhandler      = g_buttonisr[id];
-          g_buttonisr[id] = irqhandler;
-
           /* Configure the interrupt.  Either attach and enable the new
            * interrupt or disable and detach the old interrupt handler.
            */
@@ -234,7 +223,7 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
             {
               /* Attach then enable the new interrupt handler */
 
-              (void)irq_attach(irq, irqhandler);
+              (void)irq_attach(irq, irqhandler, arg);
               up_enable_irq(irq);
             }
           else
@@ -247,9 +236,11 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
 
           leave_critical_section(flags);
         }
+
+      ret = OK;
     }
 
-  return oldhandler;
+  return ret;
 }
 #endif
 
diff --git a/configs/open1788/src/lpc17_ssp.c b/configs/open1788/src/lpc17_ssp.c
index 033d7933f14da0896d9e1825cebbf06d0aa95c10..600b04474da768b4f30635f8b8761af397586694 100644
--- a/configs/open1788/src/lpc17_ssp.c
+++ b/configs/open1788/src/lpc17_ssp.c
@@ -61,40 +61,14 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_DEBUG_SPI
-#  define sspdbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define sspvdbg lldbg
-#  else
-#    define sspvdbg(x...)
-#  endif
-#else
-#  define sspdbg(x...)
-#  define sspvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#ifdef CONFIG_DEBUG_VERBOSE
+#ifdef CONFIG_DEBUG_GPIO_INFO
 #  define ssp_dumpgpio(p,m) lpc17_dumpgpio(p,m)
 #else
 #  define ssp_dumpgpio(p,m)
 #endif
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -158,12 +132,12 @@ void weak_function open1788_sspdev_initialize(void)
 #ifdef CONFIG_LPC17_SSP0
 void  lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  sspdbg("Returning nothing\n");
+  spiinfo("Returning nothing\n");
   return 0;
 }
 #endif
@@ -171,7 +145,7 @@ uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_LPC17_SSP1
 void  lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
   if (devid == SPIDEV_TOUCHSCREEN)
     {
       /* Assert/de-assert the CS pin to the touchscreen */
@@ -184,7 +158,7 @@ void  lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
 
 uint8_t lpc17_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  sspdbg("Returning nothing\n");
+  spiinfo("Returning nothing\n");
   return 0;
 }
 #endif
@@ -192,12 +166,12 @@ uint8_t lpc17_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_LPC17_SSP2
 void  lpc17_ssp2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t lpc17_ssp2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  sspdbg("Returning nothing\n");
+  spiinfo("Returning nothing\n");
   return 0;
 }
 #endif
diff --git a/configs/open1788/src/lpc17_touchscreen.c b/configs/open1788/src/lpc17_touchscreen.c
index 933fc3c3a51f50ff557f7349c85e56c6d5bd35b6..f61430697961c5da9d56442996483ce5d1bc24b3 100644
--- a/configs/open1788/src/lpc17_touchscreen.c
+++ b/configs/open1788/src/lpc17_touchscreen.c
@@ -71,8 +71,8 @@
 #  error "Touchscreen support requires CONFIG_LPC17_SSP1"
 #endif
 
-#ifndef CONFIG_GPIO_IRQ
-#  error "Touchscreen support requires CONFIG_GPIO_IRQ"
+#ifndef CONFIG_LPC17_GPIOIRQ
+#  error "Touchscreen support requires CONFIG_LPC17_GPIOIRQ"
 #endif
 
 #ifndef CONFIG_ADS7843E_FREQUENCY
@@ -169,13 +169,13 @@ static int tsc_attach(FAR struct ads7843e_config_s *state, xcpt_t handler)
 {
   /* Attach then enable the touchscreen interrupt handler */
 
-  (void)irq_attach(LPC17_IRQ_PENIRQ, handler);
+  (void)irq_attach(LPC17_IRQ_PENIRQ, handler, NULL);
   return OK;
 }
 
 static void tsc_enable(FAR struct ads7843e_config_s *state, bool enable)
 {
-  ivdbg("enable:%d\n", enable);
+  iinfo("enable:%d\n", enable);
   if (enable)
     {
       /* Enable PENIRQ interrupts.  NOTE: The pin interrupt is enabled from worker thread
@@ -217,17 +217,17 @@ static bool tsc_busy(FAR struct ads7843e_config_s *state)
 
 #else /* XPT2046_NO_BUSY */
 
-#if defined(CONFIG_DEBUG_INPUT) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_INPUT) && defined(CONFIG_DEBUG_INFO)
   static bool last = (bool)-1;
 #endif
 
   /* REVISIT:  This might need to be inverted */
 
   bool busy = lpc17_gpioread(GPIO_TC_BUSY);
-#if defined(CONFIG_DEBUG_INPUT) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_INPUT) && defined(CONFIG_DEBUG_INFO)
   if (busy != last)
     {
-      ivdbg("busy:%d\n", busy);
+      iinfo("busy:%d\n", busy);
       last = busy;
     }
 #endif
@@ -245,7 +245,7 @@ static bool tsc_pendown(FAR struct ads7843e_config_s *state)
    */
 
   bool pendown = !lpc17_gpioread(GPIO_TC_PENIRQ);
-  ivdbg("pendown:%d\n", pendown);
+  iinfo("pendown:%d\n", pendown);
   return pendown;
 }
 
@@ -277,7 +277,7 @@ int board_tsc_setup(int minor)
   FAR struct spi_dev_s *dev;
   int ret;
 
-  idbg("initialized:%d minor:%d\n", initialized, minor);
+  iinfo("initialized:%d minor:%d\n", initialized, minor);
   DEBUGASSERT(minor == 0);
 
   /* Since there is no uninitialized logic, this initialization can be
@@ -301,7 +301,7 @@ int board_tsc_setup(int minor)
       dev = lpc17_sspbus_initialize(CONFIG_ADS7843E_SPIDEV);
       if (!dev)
         {
-          idbg("Failed to initialize SPI bus %d\n", CONFIG_ADS7843E_SPIDEV);
+          ierr("ERROR: Failed to initialize SPI bus %d\n", CONFIG_ADS7843E_SPIDEV);
           return -ENODEV;
         }
 
@@ -310,7 +310,7 @@ int board_tsc_setup(int minor)
       ret = ads7843e_register(dev, &g_tscinfo, CONFIG_ADS7843E_DEVMINOR);
       if (ret < 0)
         {
-          idbg("Failed to register touchscreen device minor=%d\n",
+          ierr("ERROR: Failed to register touchscreen device minor=%d\n",
                CONFIG_ADS7843E_DEVMINOR);
        /* up_spiuninitialize(dev); */
           return -ENODEV;
diff --git a/configs/open1788/src/lpc17_userleds.c b/configs/open1788/src/lpc17_userleds.c
index 077cdc994abca4d930431d300f67144969e061e8..f8e350dd120dedfe820cc7d918fa10cfe62e4c6d 100644
--- a/configs/open1788/src/lpc17_userleds.c
+++ b/configs/open1788/src/lpc17_userleds.c
@@ -60,25 +60,9 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS)
+#ifdef CONFIG_DEBUG_LEDS_INFO
 #  define led_dumpgpio(m) lpc17_dumpgpio(???, m)
 #else
 #  define led_dumpgpio(m)
diff --git a/configs/p112/ostest/defconfig b/configs/p112/ostest/defconfig
index 4e2ebbff0839dba585f7d18b62b4b4800ba9e4e0..4b93dc48123276bbe8f46d308b82746cc04f7e35 100644
--- a/configs/p112/ostest/defconfig
+++ b/configs/p112/ostest/defconfig
@@ -43,7 +43,7 @@ CONFIG_WINDOWS_NATIVE=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 
 #
@@ -53,8 +53,7 @@ CONFIG_WINDOWS_NATIVE=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -220,7 +219,7 @@ CONFIG_USER_ENTRYPOINT="ostest_main"
 CONFIG_DISABLE_OS_API=y
 CONFIG_DISABLE_POSIX_TIMERS=y
 CONFIG_DISABLE_PTHREAD=y
-CONFIG_DISABLE_SIGNALS=y
+# CONFIG_DISABLE_SIGNALS is not set
 CONFIG_DISABLE_MQUEUE=y
 CONFIG_DISABLE_MOUNTPOINT=y
 CONFIG_DISABLE_ENVIRON=y
@@ -272,7 +271,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
 # CONFIG_16550_UART is not set
@@ -306,7 +304,6 @@ CONFIG_DEV_LOWCONSOLE=y
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 
 #
 # Graphics Support
@@ -337,7 +334,7 @@ CONFIG_GRAN_SINGLE=y
 #
 # Library Routines
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -353,7 +350,6 @@ CONFIG_EOL_IS_EITHER_CRLF=y
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Basic CXX Support
@@ -412,7 +408,6 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
diff --git a/configs/pcblogic-pic32mx/README.txt b/configs/pcblogic-pic32mx/README.txt
index 50657c8cb1e42b066bde8540a2e712559127e3e1..c98882584b8c4930352cafbaaae2d7c24dd6fe00 100644
--- a/configs/pcblogic-pic32mx/README.txt
+++ b/configs/pcblogic-pic32mx/README.txt
@@ -626,8 +626,8 @@ Configuration sub-directories
        To enable LCD debug output:
 
        Build Setup:
-         CONFIG_DEBUG=y                          : Enable debug features
-         CONFIG_DEBUG_VERBOSE=y                  : Enable LCD debug
+         CONFIG_DEBUG_FEATURES=y                 : Enable debug features
+         CONFIG_DEBUG_INFO=y                     : Enable LCD debug
 
        NOTES:
        a. I do not have the LCD1602 working.  I may just be getting lost in the
diff --git a/configs/pcblogic-pic32mx/nsh/Make.defs b/configs/pcblogic-pic32mx/nsh/Make.defs
index 00cf7c88e31af91fd4148267cb50fb35cf6c2765..ed3b800bf6d1c32e780bf3f4ac35a38d8bd48584 100644
--- a/configs/pcblogic-pic32mx/nsh/Make.defs
+++ b/configs/pcblogic-pic32mx/nsh/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/pcblogic-pic32mx/nsh/defconfig b/configs/pcblogic-pic32mx/nsh/defconfig
index 7a3de04abac0b5ffcb7eb8da5fe74df56bc38475..9c374f4cb6e22d592d9170930a3cb57ac1b0b19a 100644
--- a/configs/pcblogic-pic32mx/nsh/defconfig
+++ b/configs/pcblogic-pic32mx/nsh/defconfig
@@ -41,13 +41,15 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -61,8 +63,7 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 CONFIG_ARCH_MIPS=y
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -266,12 +267,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
@@ -315,16 +318,18 @@ CONFIG_RAM_SIZE=32768
 CONFIG_ARCH_BOARD_PCBLOGICPIC32MX=y
 # CONFIG_ARCH_BOARD_UBW32 is not set
 # CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD_CUSTOM_DIR="configs/dummy"
+CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD="pcblogic-pic32mx"
 
 #
 # Common Board Options
 #
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -360,6 +365,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=0
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -410,9 +416,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -443,6 +450,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
@@ -460,17 +468,37 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -494,14 +522,11 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART1_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -518,19 +543,23 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -562,17 +591,12 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -591,6 +615,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -633,11 +661,13 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -656,11 +686,14 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -668,11 +701,11 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -680,33 +713,43 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -718,30 +761,28 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -761,6 +802,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
@@ -769,6 +811,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -777,8 +820,10 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -796,12 +841,15 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -824,6 +872,8 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 # CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -837,15 +887,19 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/pcblogic-pic32mx/src/pic32mx_lcd1602.c b/configs/pcblogic-pic32mx/src/pic32mx_lcd1602.c
index d63543eabecc02f6b151f81425021ab4c22730dc..4c4ca65951f0b7919ea51eaa642c07d7ed6605a6 100644
--- a/configs/pcblogic-pic32mx/src/pic32mx_lcd1602.c
+++ b/configs/pcblogic-pic32mx/src/pic32mx_lcd1602.c
@@ -102,20 +102,6 @@
 #  error "CONFIG_PIC32MX_PMP is required to use the LCD"
 #endif
 
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
 /* The ever-present MIN/MAX macros ******************************************/
 
 #ifndef MIN
@@ -137,16 +123,6 @@
 #define LCD_NCOLUMNS     16
 #define LCD_NCHARS       (LCD_NROWS * LCD_NCOLUMNS)
 
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg         dbg
-#  define lcdvdbg        vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Type Definition
  ****************************************************************************/
@@ -174,7 +150,7 @@ struct lcd1602_2
  ****************************************************************************/
 /* Debug */
 
-#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_LCD_INFO
 static void lcd_dumpstate(FAR const char *msg);
 static void lcd_dumpstream(FAR const char *msg,
                            FAR const struct lcd_instream_s *stream);
@@ -234,7 +210,7 @@ static struct lcd1602_2 g_lcd1602;
  * Name: lcd_dumpstate
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_LCD_INFO
 static void lcd_dumpstate(FAR const char *msg)
 {
   uint8_t buffer[LCD_NCOLUMNS];
@@ -242,8 +218,8 @@ static void lcd_dumpstate(FAR const char *msg)
   int row;
   int column;
 
-  lcdvdbg("%s:\n", msg);
-  lcdvdbg("  currow: %d curcol: %d\n",
+  lcdinfo("%s:\n", msg);
+  lcdinfo("  currow: %d curcol: %d\n",
           g_lcd1602.currow, g_lcd1602.curcol);
 
   for (row = 0, column = 0; row < LCD_NROWS; )
@@ -252,7 +228,7 @@ static void lcd_dumpstate(FAR const char *msg)
       buffer[column] = isprint(ch) ? ch : '.';
       if (++column >= LCD_NCOLUMNS)
         {
-          lcdvdbg("  [%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c]\n",
+          lcdinfo("  [%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c]\n",
                   buffer[0],  buffer[1],  buffer[2],  buffer[3],
                   buffer[4],  buffer[5],  buffer[6],  buffer[7],
                   buffer[8],  buffer[9],  buffer[10], buffer[11],
@@ -269,12 +245,12 @@ static void lcd_dumpstate(FAR const char *msg)
  * Name: lcd_dumpstate
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_LCD_INFO
 static void lcd_dumpstream(FAR const char *msg,
                            FAR const struct lcd_instream_s *stream)
 {
-  lcdvdbg("%s:\n", msg);
-  lcdvdbg("  nget: %d nbytes: %d\n",
+  lcdinfo("%s:\n", msg);
+  lcdinfo("  nget: %d nbytes: %d\n",
           stream->stream.nget, stream->nbytes);
   lib_dumpbuffer("STREAM", stream->buffer, stream->nbytes);
 }
@@ -437,7 +413,7 @@ static void lcd_appendch(uint8_t ch)
 
 static void lcd_action(enum slcdcode_e code, uint8_t count)
 {
-  lcdvdbg("Action: %d count: %d\n", code, count);
+  lcdinfo("Action: %d count: %d\n", code, count);
   lcd_dumpstate("BEFORE ACTION");
 
   switch (code)
@@ -719,7 +695,7 @@ static ssize_t lcd_write(FAR struct file *filep,  FAR const char *buffer,
   memset(&state, 0, sizeof(struct slcdstate_s));
   while ((result = slcd_decode(&instream.stream, &state, &ch, &count)) != SLCDRET_EOF)
     {
-      lcdvdbg("slcd_decode returned result=%d char=%d count=%d\n",
+      lcdinfo("slcd_decode returned result=%d char=%d count=%d\n",
               result, ch, count);
 
       if (result == SLCDRET_CHAR)          /* A normal character was returned */
@@ -796,7 +772,7 @@ static int lcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
         {
           FAR struct slcd_attributes_s *attr = (FAR struct slcd_attributes_s *)((uintptr_t)arg);
 
-          lcdvdbg("SLCDIOC_GETATTRIBUTES:\n");
+          lcdinfo("SLCDIOC_GETATTRIBUTES:\n");
 
           if (!attr)
             {
@@ -822,7 +798,7 @@ static int lcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
         {
           FAR struct slcd_curpos_s *curpos = (FAR struct slcd_curpos_s *)((uintptr_t)arg);
 
-          lcdvdbg("SLCDIOC_CURPOS: row=%d column=%d\n", g_lcd1602.currow, g_lcd1602.curcol);
+          lcdinfo("SLCDIOC_CURPOS: row=%d column=%d\n", g_lcd1602.currow, g_lcd1602.curcol);
 
           if (!curpos)
             {
@@ -890,7 +866,7 @@ int up_lcd1602_initialize(void)
 
   if (!g_lcd1602.initialized)
     {
-      lcdvdbg("Initializing\n");
+      lcdinfo("Initializing\n");
 
       /* PMP Master mode configuration */
       /* Make sure that interrupts are disabled */
diff --git a/configs/pcduino-a10/nsh/Make.defs b/configs/pcduino-a10/nsh/Make.defs
index 82094d510eccadbf5abda86e5368f2e8cc0f5a93..1a9d6fc14ec141a6027d740f22998d2327bbd1e0 100644
--- a/configs/pcduino-a10/nsh/Make.defs
+++ b/configs/pcduino-a10/nsh/Make.defs
@@ -70,7 +70,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a8 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/pcduino-a10/nsh/defconfig b/configs/pcduino-a10/nsh/defconfig
index 95833160ff638f2b72cad820f0ee9117c57d2148..c78724ff366aada5c6d6dd96fbb5cc5579b32791 100644
--- a/configs/pcduino-a10/nsh/defconfig
+++ b/configs/pcduino-a10/nsh/defconfig
@@ -41,12 +41,15 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
@@ -61,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -74,13 +76,15 @@ CONFIG_ARCH="arm"
 #
 CONFIG_ARCH_CHIP_A1X=y
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
 # CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -89,21 +93,40 @@ CONFIG_ARCH_CHIP_A1X=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 CONFIG_ARCH_CORTEXA8=y
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-a"
 CONFIG_ARCH_CHIP="a1x"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
 CONFIG_ARCH_FPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
 # CONFIG_ARCH_ROMPGTABLE is not set
@@ -111,6 +134,9 @@ CONFIG_ARCH_LOWVECTORS=y
 #
 # ARMv7-A Configuration Options
 #
+# CONFIG_ARMV7A_HAVE_GICv2 is not set
+# CONFIG_ARMV7A_HAVE_GTM is not set
+# CONFIG_ARMV7A_HAVE_PTM is not set
 # CONFIG_ARMV7A_HAVE_L2CC is not set
 # CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set
 # CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set
@@ -206,6 +232,7 @@ CONFIG_A1X_BOOT_SDCARD=y
 # CONFIG_A1X_BOOT_USB is not set
 CONFIG_A1X_DDR_MAPOFFSET=0
 CONFIG_A1X_DDR_MAPSIZE=1073741824
+# CONFIG_SERIAL_TERMIOS is not set
 
 #
 # Architecture Options
@@ -218,11 +245,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 CONFIG_ARCH_HAVE_ADDRENV=y
 CONFIG_ARCH_NEED_ADDRENV_MAPPING=y
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 CONFIG_ARCH_HAVE_MMU=y
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 CONFIG_ARCH_USE_MMU=y
 # CONFIG_ARCH_ADDRENV is not set
 # CONFIG_PAGING is not set
@@ -283,6 +313,7 @@ CONFIG_NSH_MMCSDMINOR=0
 #
 # Board-Specific Options
 #
+# CONFIG_LIB_BOARDCTL is not set
 
 #
 # RTOS Features
@@ -312,10 +343,12 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=31
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -366,6 +399,14 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
 
 #
 # Stack and heap information
@@ -392,29 +433,51 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
-# CONFIG_TIMER is not set
 # CONFIG_ANALOG is not set
 # CONFIG_AUDIO_DEVICES is not set
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -437,13 +500,15 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART6_SERIALDRIVER is not set
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART0_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
 
 #
@@ -457,20 +522,23 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -496,24 +564,24 @@ CONFIG_UART0_2STOP=0
 # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
 CONFIG_FS_READABLE=y
 CONFIG_FS_WRITABLE=y
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
 CONFIG_FS_FAT=y
 CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -535,7 +603,11 @@ CONFIG_MM_REGIONS=1
 # CONFIG_AUDIO is not set
 
 #
-# Binary Formats
+# Wireless Support
+#
+
+#
+# Binary Loader
 #
 # CONFIG_BINFMT_DISABLE is not set
 # CONFIG_NXFLAT is not set
@@ -558,6 +630,7 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -568,15 +641,21 @@ CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
 CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
 CONFIG_ARCH_LOWPUTC=y
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -602,24 +681,29 @@ CONFIG_HAVE_CXXINITIALIZE=y
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -628,75 +712,78 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
 #
 # CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
 
 #
 # Interpreters
 #
+# CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
 # CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -716,13 +803,16 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
 # CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -731,8 +821,10 @@ CONFIG_NSH_BUILTIN_APPS=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -741,6 +833,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -750,8 +843,10 @@ CONFIG_NSH_BUILTIN_APPS=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
@@ -778,6 +873,8 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 # CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -791,112 +888,19 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# EMACS-like Command Line Editor
-#
 # CONFIG_SYSTEM_CLE is not set
-
-#
-# FLASH Program Installation
-#
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# Intel HEX to binary conversion
-#
-# CONFIG_SYSTEM_HEX2BIN is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-
-#
-# P-Code Support
-#
-
-#
-# PHY Tool
-#
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sudoku
-#
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-
-#
-# Sysinfo
-#
-
-#
-# VI Work-Alike Editor
-#
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# USB Monitor
-#
-
-#
-# Zmodem Commands
-#
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/pcduino-a10/nsh/pcduino-140107.patch b/configs/pcduino-a10/nsh/pcduino-140107.patch
index 1d0b6651844a8ab85b6d6eb82a0402c1d709f745..2dcd324a7d8f025f3695771b913901d7b9c8a68f 100644
--- a/configs/pcduino-a10/nsh/pcduino-140107.patch
+++ b/configs/pcduino-a10/nsh/pcduino-140107.patch
@@ -6,14 +6,14 @@ index 3cc6323..ad42790 100644
     * for all IO regions (Including the vector region).
     */
  
-+lowsyslog(LOG_INFO, "Calling a1x_setupmappings\n"); // REMOVE ME
++syslog(LOG_INFO, "Calling a1x_setupmappings\n"); // REMOVE ME
    a1x_setupmappings();
  
    /* Provide a special mapping for the IRAM interrupt vector positioned in
     * high memory.
     */
  
-+lowsyslog(LOG_INFO, "Calling a1x_vectormapping\n"); // REMOVE ME
++syslog(LOG_INFO, "Calling a1x_vectormapping\n"); // REMOVE ME
    a1x_vectormapping();
  
  #endif /* CONFIG_ARCH_ROMPGTABLE */
@@ -21,19 +21,19 @@ index 3cc6323..ad42790 100644
     * arm_vector.S
     */
  
-+lowsyslog(LOG_INFO, "Calling a1x_copyvectorblock\n"); // REMOVE ME
++syslog(LOG_INFO, "Calling a1x_copyvectorblock\n"); // REMOVE ME
    a1x_copyvectorblock();
  
    /* Initialize the FPU */
  
  #ifdef CONFIG_ARCH_FPU
-+lowsyslog(LOG_INFO, "Calling arm_fpuconfig\n"); // REMOVE ME
++syslog(LOG_INFO, "Calling arm_fpuconfig\n"); // REMOVE ME
    arm_fpuconfig();
  #endif
  
    /* Perform common, low-level chip initialization (might do nothing) */
  
-+lowsyslog(LOG_INFO, "Calling a1x_lowsetup\n"); // REMOVE ME
++syslog(LOG_INFO, "Calling a1x_lowsetup\n"); // REMOVE ME
    a1x_lowsetup();
  
    /* Perform early serial initialization if we are going to use the serial
@@ -41,7 +41,7 @@ index 3cc6323..ad42790 100644
     */
  
  #ifdef USE_EARLYSERIALINIT
-+lowsyslog(LOG_INFO, "Calling up_earlyserialinit\n"); // REMOVE ME
++syslog(LOG_INFO, "Calling up_earlyserialinit\n"); // REMOVE ME
    up_earlyserialinit();
  #endif
  
@@ -49,7 +49,7 @@ index 3cc6323..ad42790 100644
     */
  
  #ifdef CONFIG_BUILD_PROTECTED
-+lowsyslog(LOG_INFO, "Calling a1x_userspace\n"); // REMOVE ME
++syslog(LOG_INFO, "Calling a1x_userspace\n"); // REMOVE ME
    a1x_userspace();
  #endif
  
@@ -57,9 +57,9 @@ index 3cc6323..ad42790 100644
     * - Configuration of board specific resources (PIOs, LEDs, etc).
     */
  
-+lowsyslog(LOG_INFO, "Calling a1x_boardinitialize\n"); // REMOVE ME
++syslog(LOG_INFO, "Calling a1x_boardinitialize\n"); // REMOVE ME
    a1x_boardinitialize();
-+lowsyslog(LOG_INFO, "Returning\n"); // REMOVE ME
++syslog(LOG_INFO, "Returning\n"); // REMOVE ME
  }
 diff --git a/nuttx/arch/arm/src/armv7-a/arm_head.S b/nuttx/arch/arm/src/armv7-a/arm_head.S
 index bce82d5..924bd24 100644
diff --git a/configs/pcduino-a10/src/a1x_buttons.c b/configs/pcduino-a10/src/a1x_buttons.c
index 1802b3656d8937ea45815011f59cf339979d9ec4..a690ae866dc61b9a4094391e963145aa08453990 100644
--- a/configs/pcduino-a10/src/a1x_buttons.c
+++ b/configs/pcduino-a10/src/a1x_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/pcduino-a10/src/a1x_buttons.c
  *
- *   Copyright (C) 2013-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -52,22 +53,6 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-#ifdef CONFIG_ARCH_IRQBUTTONS
-static xcpt_t g_irqbutton[BOARD_NBUTTONS];
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -110,8 +95,7 @@ uint8_t board_buttons(void)
  * Description:
  *   This function may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is one
- *   of the BUTTON* definitions provided above. The previous interrupt
- *   handler address isreturned (so that it may restored, if so desired).
+ *   of the BUTTON* definitions provided above.
  *
  * Configuration Notes:
  *   Configuration CONFIG_ARCH_IRQBUTTONS must be selected to enable the
@@ -120,9 +104,9 @@ uint8_t board_buttons(void)
  ****************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   if (id < BOARD_NBUTTONS)
     {
@@ -134,22 +118,17 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
 
       flags = enter_critical_section();
 
-      /* Get the old button interrupt handler and save the new one */
-
-      oldhandler      = g_irqbutton[id];
-      g_irqbutton[id] = irqhandler;
-
       /* Configure the interrupt */
 
       a1x_pioirq(xxx);
-      (void)irq_attach(xxx, irqhandler);
+      (void)irq_attach(xxx, irqhandler, arg);
       a1x_pioirqenable(xxx);
       leave_critical_section(flags);
-    }
 
-  /* Return the old button handler (so that it can be restored) */
+      ret = OK;
+    }
 
-  return oldhandler;
+  return ret;
 }
 #endif
 
diff --git a/configs/pcduino-a10/src/a1x_leds.c b/configs/pcduino-a10/src/a1x_leds.c
index 1801625f51668cc8b5f0642567a48b248526b182..4e2bc33ccd3e23c1558aa03cad85e599026f4734 100644
--- a/configs/pcduino-a10/src/a1x_leds.c
+++ b/configs/pcduino-a10/src/a1x_leds.c
@@ -52,9 +52,6 @@
 
 #include "pcduino_a10.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
 /* The pcDuino v1 has four green LEDs; three can be controlled from software.
  * Two are tied to ground and, hence, illuminated by driving the output pins
  * to a high value:
@@ -90,26 +87,6 @@
  * application if CONFIG_ARCH_LEDS is not defined.
  */
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/pic32mx-starterkit/README.txt b/configs/pic32mx-starterkit/README.txt
index f89cf1466342999a406d716618e97bf890bd580e..134b1634093a972c3aaacd3cb960142ad0418417 100644
--- a/configs/pic32mx-starterkit/README.txt
+++ b/configs/pic32mx-starterkit/README.txt
@@ -982,7 +982,7 @@ PIC32MX Configuration Options
 PIC32MX specific PHY/Ethernet device driver settings
 
     CONFIG_ETH0_PHY_KS8721 - Selects the Micrel KS8721 PHY
-    CONFIG_ETH0_PHY_DP83848C - Selects the National Semiconduction DP83848C PHY
+    CONFIG_ETH0_PHY_DP83848C - Selects the National Semiconductor DP83848C PHY
     CONFIG_ETH0_PHY_LAN8720 - Selects the SMSC LAN8720 PHY
     CONFIG_PHY_AUTONEG - Enable auto-negotion
     CONFIG_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed.
@@ -991,9 +991,9 @@ PIC32MX specific PHY/Ethernet device driver settings
     CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 4
     CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented).
     CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets.
-      Also needs CONFIG_DEBUG.
+      Also needs CONFIG_DEBUG_FEATURES.
     CONFIG_NET_REGDEBUG - Enabled low level register debug.  Also needs
-      CONFIG_DEBUG.
+      CONFIG_DEBUG_FEATURES.
     CONFIG_NET_HASH - Enable receipt of near-perfect match frames.
     CONFIG_PIC32MX_MULTICAST - Enable receipt of multicast (and unicast) frames.
       Automatically set if CONFIG_NET_IGMP is selected.
@@ -1137,7 +1137,6 @@ Where  is one of the following:
 
     3. The RAM log is enabled"
 
-      CONFIG_SYSLOG=y             : Enables the System Logging feature.
       CONFIG_RAMLOG=y             : Enable the RAM-based logging feature.
       CONFIG_RAMLOG_CONSOLE=n     : (there is no default console device)
       CONFIG_RAMLOG_SYSLOG=y      : This enables the RAM-based logger as the
diff --git a/configs/pic32mx-starterkit/nsh/Make.defs b/configs/pic32mx-starterkit/nsh/Make.defs
index 8cf55c2e12d7fb7c4bb1088163743305e344049c..f770264923c3da80484dcc9c0b6d88b09a843739 100644
--- a/configs/pic32mx-starterkit/nsh/Make.defs
+++ b/configs/pic32mx-starterkit/nsh/Make.defs
@@ -87,7 +87,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/pic32mx-starterkit/nsh/defconfig b/configs/pic32mx-starterkit/nsh/defconfig
index 34d57a29fdb7d34866555ec50c8c9a36d8f241cd..49ef4c9d9dbf0a4d551ae76eaa694283121e1a73 100644
--- a/configs/pic32mx-starterkit/nsh/defconfig
+++ b/configs/pic32mx-starterkit/nsh/defconfig
@@ -41,13 +41,15 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -61,8 +63,7 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 CONFIG_ARCH_MIPS=y
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -266,12 +267,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
@@ -315,6 +318,8 @@ CONFIG_RAM_SIZE=131072
 CONFIG_ARCH_BOARD_PIC32MX_STARTERKIT=y
 # CONFIG_ARCH_BOARD_PIC32MX7MMB is not set
 # CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD_CUSTOM_DIR="configs/dummy"
+CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD="pic32mx-starterkit"
 
 #
@@ -322,16 +327,14 @@ CONFIG_ARCH_BOARD="pic32mx-starterkit"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -368,6 +371,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -418,9 +422,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -451,6 +456,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
@@ -468,7 +474,26 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -477,6 +502,7 @@ CONFIG_MMCSD_MMCSUPPORT=y
 CONFIG_MMCSD_HAVECARDDETECT=y
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 CONFIG_MTD=y
 
 #
@@ -485,6 +511,7 @@ CONFIG_MTD=y
 # CONFIG_MTD_PARTITION is not set
 # CONFIG_MTD_SECT512 is not set
 # CONFIG_MTD_BYTE_WRITE is not set
+# CONFIG_MTD_PROGMEM is not set
 # CONFIG_MTD_CONFIG is not set
 
 #
@@ -492,14 +519,19 @@ CONFIG_MTD=y
 #
 # CONFIG_MTD_NAND is not set
 # CONFIG_RAMMTD is not set
+# CONFIG_FILEMTD is not set
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -507,9 +539,10 @@ CONFIG_MTD=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -533,14 +566,11 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART1_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -557,19 +587,23 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -603,20 +637,17 @@ CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -635,6 +666,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -679,11 +714,14 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -702,23 +740,27 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -726,33 +768,46 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -765,30 +820,28 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -808,6 +861,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
@@ -816,6 +870,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -824,8 +879,10 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -844,12 +901,16 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
@@ -872,6 +933,8 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -885,16 +948,20 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/pic32mx-starterkit/nsh2/Make.defs b/configs/pic32mx-starterkit/nsh2/Make.defs
index 20f5175d09d7dfddbf400168b6f183c707621414..89dc5667e0f53dfcfd654cadb6089cd5bfa29c15 100644
--- a/configs/pic32mx-starterkit/nsh2/Make.defs
+++ b/configs/pic32mx-starterkit/nsh2/Make.defs
@@ -87,7 +87,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/pic32mx-starterkit/nsh2/defconfig b/configs/pic32mx-starterkit/nsh2/defconfig
index 60935ce1ac5e4ce4250758108012e455a2f3078e..b009089d0928cb68b0f909fb1e8c1f008abb09ad 100644
--- a/configs/pic32mx-starterkit/nsh2/defconfig
+++ b/configs/pic32mx-starterkit/nsh2/defconfig
@@ -41,13 +41,15 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -61,10 +63,12 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 CONFIG_ARCH_MIPS=y
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="mips"
@@ -77,7 +81,6 @@ CONFIG_NET_NRXDESC=7
 CONFIG_NET_PRIORITY=28
 # CONFIG_NET_WOL is not set
 # CONFIG_NET_HASH is not set
-# CONFIG_PIC32MX_MULTICAST is not set
 CONFIG_ARCH_CHIP_PIC32MX=y
 # CONFIG_ARCH_CHIP_PIC32MZ is not set
 CONFIG_ARCH_MIPS32=y
@@ -242,6 +245,8 @@ CONFIG_PIC32MX_T1PRIO=16
 #
 # PIC32MX PHY/Ethernet device driver settings
 #
+# CONFIG_PIC32MX_MULTICAST is not set
+CONFIG_PIC32MX_ETHERNET_HPWORK=y
 
 #
 # Device Configuration 0 (DEVCFG0)
@@ -276,6 +281,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -333,17 +339,14 @@ CONFIG_ARCH_BOARD="pic32mx-starterkit"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -363,6 +366,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2012
 CONFIG_START_MONTH=3
@@ -417,6 +421,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -425,18 +430,23 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -454,6 +464,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -469,12 +480,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -482,7 +497,26 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -491,6 +525,7 @@ CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_HAVECARDDETECT is not set
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 CONFIG_MTD=y
 
 #
@@ -511,12 +546,16 @@ CONFIG_MTD=y
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -539,10 +578,8 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -566,9 +603,10 @@ CONFIG_ETH0_PHY_DP83848C=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+# CONFIG_SERIAL_CONSOLE is not set
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -592,35 +630,39 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 # CONFIG_MCU_SERIAL is not set
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 CONFIG_RAMLOG=y
-CONFIG_RAMLOG_SYSLOG=y
 # CONFIG_RAMLOG_CONSOLE is not set
 CONFIG_RAMLOG_BUFSIZE=16384
 # CONFIG_RAMLOG_CRLF is not set
 CONFIG_RAMLOG_NONBLOCKING=y
 CONFIG_RAMLOG_NPOLLWAITERS=4
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_RAMLOG_SYSLOG=y
 # CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -628,13 +670,11 @@ CONFIG_RAMLOG_NPOLLWAITERS=4
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -762,7 +802,9 @@ CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_NFS is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
@@ -772,13 +814,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-# CONFIG_SYSLOG_CHAR is not set
-
 #
 # Graphics Support
 #
@@ -797,6 +832,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -824,6 +863,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -841,7 +882,7 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -849,14 +890,17 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=4
 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_RESOLVCONF is not set
 CONFIG_NETDB_DNSSERVER_NOADDR=y
 # CONFIG_NETDB_DNSSERVER_IPv4 is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -880,18 +924,20 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -901,41 +947,49 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -948,8 +1002,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -959,29 +1014,32 @@ CONFIG_EXAMPLES_NSH=y
 #
 # Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -1001,6 +1059,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
 # CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
@@ -1027,13 +1086,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1043,6 +1102,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -1050,6 +1110,8 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
@@ -1075,6 +1137,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1101,6 +1164,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
 CONFIG_NSH_TELNETD_CLIENTPRIO=100
 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
 CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 # CONFIG_NSH_TELNET_LOGIN is not set
 
 #
@@ -1115,14 +1180,13 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1131,5 +1195,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/pic32mx-starterkit/src/pic32mx_leds.c b/configs/pic32mx-starterkit/src/pic32mx_leds.c
index 0c29d08c53a37b5f711eb6abeec0f00ab406d944..671811631d317795654d19d84724d1cc2008523f 100644
--- a/configs/pic32mx-starterkit/src/pic32mx_leds.c
+++ b/configs/pic32mx-starterkit/src/pic32mx_leds.c
@@ -95,22 +95,6 @@
 #  define LED_NC  2
 #endif
 
-/* Debug ********************************************************************/
-
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_LEDS)
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  undef CONFIG_DEBUG_LEDS
-#  undef CONFIG_DEBUG_VERBOSE
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private types
  ****************************************************************************/
diff --git a/configs/pic32mx-starterkit/src/pic32mx_spi.c b/configs/pic32mx-starterkit/src/pic32mx_spi.c
index a9e2df2e6adc1e8ea464a8d67b3afaad1b276494..4c0e2d2261e3412f3300dac1a033a6e107939564 100644
--- a/configs/pic32mx-starterkit/src/pic32mx_spi.c
+++ b/configs/pic32mx-starterkit/src/pic32mx_spi.c
@@ -54,33 +54,6 @@
 #if defined(CONFIG_PIC32MX_SPI1) || defined(CONFIG_PIC32MX_SPI2) || \
     defined(CONFIG_PIC32MX_SPI3) || defined(CONFIG_PIC32MX_SPI4)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* The following enable debug output from this file (needs CONFIG_DEBUG too).
- *
- * CONFIG_SPI_DEBUG - Define to enable basic SPI debug
- * CONFIG_SPI_VERBOSE - Define to enable verbose SPI debug
- */
-
-#ifdef CONFIG_SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef CONFIG_SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef CONFIG_SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -134,13 +107,13 @@ enum spi_dev_e;
 #ifdef CONFIG_PIC32MX_SPI1
 void  pic32mx_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 #warning "Missing logic"
 }
 
 uint8_t pic32mx_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  spidbg("Returning nothing\n");
+  spiinfo("Returning nothing\n");
 #warning "Missing logic"
   return 0;
 }
@@ -156,13 +129,13 @@ int pic32mx_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cm
 #ifdef CONFIG_PIC32MX_SPI1
 void  pic32mx_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 #warning "Missing logic"
 }
 
 uint8_t pic32mx_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  spidbg("Returning nothing\n");
+  spiinfo("Returning nothing\n");
 #warning "Missing logic"
   return 0;
 }
@@ -178,13 +151,13 @@ int pic32mx_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cm
 #ifdef CONFIG_PIC32MX_SPI3
 void  pic32mx_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 #warning "Missing logic"
 }
 
 uint8_t pic32mx_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  spidbg("Returning nothing\n");
+  spiinfo("Returning nothing\n");
 #warning "Missing logic"
   return 0;
 }
@@ -200,13 +173,13 @@ int pic32mx_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cm
 #ifdef CONFIG_PIC32MX_SPI4
 void  pic32mx_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 #warning "Missing logic"
 }
 
 uint8_t pic32mx_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  spidbg("Returning nothing\n");
+  spiinfo("Returning nothing\n");
 #warning "Missing logic"
   return 0;
 }
diff --git a/configs/pic32mx7mmb/README.txt b/configs/pic32mx7mmb/README.txt
index 641f15902445a80dad8be8d8d88f1b675912d71d..994eee5c5bc05f66579bab98ba86620af30b32ee 100644
--- a/configs/pic32mx7mmb/README.txt
+++ b/configs/pic32mx7mmb/README.txt
@@ -560,7 +560,7 @@ PIC32MX Configuration Options
 PIC32MX specific PHY/Ethernet device driver settings
 
     CONFIG_ETH0_PHY_KS8721 - Selects the Micrel KS8721 PHY
-    CONFIG_ETH0_PHY_DP83848C - Selects the National Semiconduction DP83848C PHY
+    CONFIG_ETH0_PHY_DP83848C - Selects the National Semiconductor DP83848C PHY
     CONFIG_ETH0_PHY_LAN8720 - Selects the SMSC LAN8720 PHY
     CONFIG_PHY_AUTONEG - Enable auto-negotion
     CONFIG_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed.
@@ -569,9 +569,9 @@ PIC32MX specific PHY/Ethernet device driver settings
     CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 4
     CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented).
     CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets.
-      Also needs CONFIG_DEBUG.
+      Also needs CONFIG_DEBUG_FEATURES.
     CONFIG_NET_REGDEBUG - Enabled low level register debug.  Also needs
-      CONFIG_DEBUG.
+      CONFIG_DEBUG_FEATURES.
     CONFIG_NET_HASH - Enable receipt of near-perfect match frames.
     CONFIG_PIC32MX_MULTICAST - Enable receipt of multicast (and unicast) frames.
       Automatically set if CONFIG_NET_IGMP is selected.
diff --git a/configs/pic32mx7mmb/nsh/Make.defs b/configs/pic32mx7mmb/nsh/Make.defs
index ec3f79738fc3b188f3080a2e9bdbb3b349a471b4..5c3e08f7ecfdbd0e597e1e17afac6a9052906347 100644
--- a/configs/pic32mx7mmb/nsh/Make.defs
+++ b/configs/pic32mx7mmb/nsh/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/pic32mx7mmb/nsh/defconfig b/configs/pic32mx7mmb/nsh/defconfig
index 492a3f054ed9783beb6e32c23a3637d0a9740ed0..0cf2a65b1a7bc98799635625d2cfd8a19ce8f6a4 100644
--- a/configs/pic32mx7mmb/nsh/defconfig
+++ b/configs/pic32mx7mmb/nsh/defconfig
@@ -41,13 +41,15 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -61,10 +63,12 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 CONFIG_ARCH_MIPS=y
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="mips"
@@ -77,7 +81,6 @@ CONFIG_NET_NRXDESC=7
 CONFIG_NET_PRIORITY=28
 # CONFIG_NET_WOL is not set
 # CONFIG_NET_HASH is not set
-# CONFIG_PIC32MX_MULTICAST is not set
 CONFIG_ARCH_CHIP_PIC32MX=y
 # CONFIG_ARCH_CHIP_PIC32MZ is not set
 CONFIG_ARCH_MIPS32=y
@@ -250,6 +253,8 @@ CONFIG_PIC32MX_USBPRIO=16
 #
 # PIC32MX PHY/Ethernet device driver settings
 #
+# CONFIG_PIC32MX_MULTICAST is not set
+CONFIG_PIC32MX_ETHERNET_HPWORK=y
 
 #
 # Device Configuration 0 (DEVCFG0)
@@ -284,6 +289,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -341,19 +347,15 @@ CONFIG_ARCH_BOARD="pic32mx7mmb"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=1
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -373,6 +375,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2012
 CONFIG_START_MONTH=6
@@ -427,6 +430,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -435,18 +439,23 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -464,6 +473,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -479,10 +489,15 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 # CONFIG_SPI_EXCHANGE is not set
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
@@ -490,6 +505,7 @@ CONFIG_SPI=y
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -497,7 +513,26 @@ CONFIG_SPI=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -509,6 +544,7 @@ CONFIG_MMCSD_SPICLOCK=12500000
 CONFIG_MMCSD_SPIMODE=0
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 CONFIG_MTD=y
 
 #
@@ -529,12 +565,16 @@ CONFIG_MTD=y
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -557,10 +597,8 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -584,9 +622,10 @@ CONFIG_ETH0_PHY_LAN8720=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -610,10 +649,6 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -636,6 +671,7 @@ CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
 # CONFIG_UART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -673,17 +709,23 @@ CONFIG_USBMSC_REMOVABLE=y
 CONFIG_USBMSC_SCSI_PRIO=128
 CONFIG_USBMSC_SCSI_STACKSIZE=2048
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -691,13 +733,11 @@ CONFIG_USBMSC_SCSI_STACKSIZE=2048
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -825,7 +865,9 @@ CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_NFS is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
@@ -835,12 +877,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -859,6 +895,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -886,6 +926,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -903,7 +945,7 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -911,14 +953,17 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=4
 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_RESOLVCONF is not set
 CONFIG_NETDB_DNSSERVER_NOADDR=y
 # CONFIG_NETDB_DNSSERVER_IPv4 is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -942,18 +987,20 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -963,40 +1010,48 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -1009,8 +1064,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1023,25 +1079,27 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -1061,6 +1119,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
 # CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
@@ -1087,13 +1146,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1103,6 +1162,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -1110,6 +1170,9 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=1
 
 #
 # Configure Command Options
@@ -1135,6 +1198,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1161,6 +1225,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
 CONFIG_NSH_TELNETD_CLIENTPRIO=100
 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
 CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 # CONFIG_NSH_TELNET_LOGIN is not set
 
 #
@@ -1175,14 +1241,13 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1191,7 +1256,9 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 CONFIG_SYSTEM_USBMSC=y
 CONFIG_SYSTEM_USBMSC_NLUNS=1
 CONFIG_SYSTEM_USBMSC_DEVMINOR1=0
@@ -1203,4 +1270,5 @@ CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2"
 # CONFIG_SYSTEM_USBMSC_DEBUGMM is not set
 CONFIG_SYSTEM_USBMSC_CMD_STACKSIZE=768
 CONFIG_SYSTEM_USBMSC_CMD_PRIORITY=100
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/pic32mx7mmb/src/pic32_leds.c b/configs/pic32mx7mmb/src/pic32_leds.c
index 1b462996292f28fee50fc6c80ac9898775a4f7c1..d76fc7a4e5a95ebef4ee5a515277f83464c6bc83 100644
--- a/configs/pic32mx7mmb/src/pic32_leds.c
+++ b/configs/pic32mx7mmb/src/pic32_leds.c
@@ -98,22 +98,6 @@
 #  define LED_NC  2
 #endif
 
-/* Debug ********************************************************************/
-
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_LEDS)
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  undef CONFIG_DEBUG_LEDS
-#  undef CONFIG_DEBUG_VERBOSE
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private types
  ****************************************************************************/
diff --git a/configs/pic32mx7mmb/src/pic32_mio283qt2.c b/configs/pic32mx7mmb/src/pic32_mio283qt2.c
index 061fd20d28c1708496b12710913531bde6502700..16b1c7518ad7c54969276559fdd2c669cd5c2542 100644
--- a/configs/pic32mx7mmb/src/pic32_mio283qt2.c
+++ b/configs/pic32mx7mmb/src/pic32_mio283qt2.c
@@ -69,20 +69,6 @@
 #  error "CONFIG_PIC32MX_PMP is required to use the LCD"
 #endif
 
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
 /* PIC32MX7MMB LCD Hardware Definitions ***********************************************/
 /* --- ---------------------------------- -------------------- ------------------------
  * PIN CONFIGURATIONS                     SIGNAL NAME          ON-BOARD CONNECTIONS
@@ -136,16 +122,6 @@
 
 #define GPIO_LCD_RS   (GPIO_OUTPUT|GPIO_VALUE_ZERO|GPIO_PORTB|GPIO_PIN15)
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg       dbg
-#  define lcdvdbg      vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 #ifdef CONFIG_LCD_MIO283QT2
 
 /**************************************************************************************
@@ -430,7 +406,7 @@ int board_lcd_initialize(void)
 
   if (!g_pic32mx7mmb_lcd.drvr)
     {
-      lcdvdbg("Initializing\n");
+      lcdinfo("Initializing\n");
 
       /* Hold the LCD in reset (active low)  */
 
@@ -468,7 +444,7 @@ int board_lcd_initialize(void)
       g_pic32mx7mmb_lcd.drvr = mio283qt2_lcdinitialize(&g_pic32mx7mmb_lcd.dev);
       if (!g_pic32mx7mmb_lcd.drvr)
         {
-          lcddbg("ERROR: mio283qt2_lcdinitialize failed\n");
+          lcderr("ERROR: mio283qt2_lcdinitialize failed\n");
           return -ENODEV;
         }
     }
diff --git a/configs/pic32mx7mmb/src/pic32_spi.c b/configs/pic32mx7mmb/src/pic32_spi.c
index f89b06d93b0bbadbd674aced34566c63c00a5ecc..3cce76d53e27e5381f41196bdfbea7772f7986c1 100644
--- a/configs/pic32mx7mmb/src/pic32_spi.c
+++ b/configs/pic32mx7mmb/src/pic32_spi.c
@@ -75,23 +75,6 @@
 #define GPIO_SD_WP (GPIO_INPUT|GPIO_PORTG|GPIO_PIN6)
 #define GPIO_SD_CD (GPIO_INPUT|GPIO_INT|GPIO_PORTG|GPIO_PIN7)
 
-/* The following enable debug output from this file (needs CONFIG_DEBUG too).
- *
- * CONFIG_DEBUG_SPI - Define to enable basic SPI debug
- */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  define spivdbg llvdbg
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -150,7 +133,7 @@ enum spi_dev_e;
 #ifdef CONFIG_PIC32MX_SPI1
 void  pic32mx_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
   if (devid == SPIDEV_MMCSD)
     {
@@ -179,7 +162,7 @@ uint8_t pic32mx_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
         }
     }
 
-  spidbg("Returning %02x\n", ret);
+  spiinfo("Returning %02x\n", ret);
   return ret;
 }
 #ifdef CONFIG_SPI_CMDDATA
@@ -194,13 +177,13 @@ int pic32mx_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cm
 #ifdef CONFIG_PIC32MX_SPI2
 void  pic31mx_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 #warning "Missing logic"
 }
 
 uint8_t pic31mx_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  spidbg("Returning nothing\n");
+  spiinfo("Returning nothing\n");
 #warning "Missing logic"
   return 0;
 }
@@ -217,13 +200,13 @@ int pic31mx_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cm
 #ifdef CONFIG_PIC32MX_SPI3
 void  pic32mx_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 #warning "Missing logic"
 }
 
 uint8_t pic32mx_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  spidbg("Returning nothing\n");
+  spiinfo("Returning nothing\n");
 #warning "Missing logic"
   return 0;
 }
@@ -240,13 +223,13 @@ int pic32mx_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cm
 #ifdef CONFIG_PIC32MX_SPI4
 void  pic32mx_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 #warning "Missing logic"
 }
 
 uint8_t pic32mx_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  spidbg("Returning nothing\n");
+  spiinfo("Returning nothing\n");
 #warning "Missing logic"
   return 0;
 }
diff --git a/configs/pic32mx7mmb/src/pic32_touchscreen.c b/configs/pic32mx7mmb/src/pic32_touchscreen.c
index 333325622edaa6a3682716011bfad4ead644651e..95b51479e73f6663ebbd4a6889313ba6486c2ada 100644
--- a/configs/pic32mx7mmb/src/pic32_touchscreen.c
+++ b/configs/pic32mx7mmb/src/pic32_touchscreen.c
@@ -509,7 +509,7 @@ static void tc_notify(FAR struct tc_dev_s *priv)
       if (fds)
         {
           fds->revents |= POLLIN;
-          ivdbg("Report events: %02x\n", fds->revents);
+          iinfo("Report events: %02x\n", fds->revents);
           sem_post(fds->sem);
         }
     }
@@ -771,7 +771,7 @@ static void tc_worker(FAR void *arg)
           {
             value      = MAX_ADC - value;
             priv->newy = (value + priv->value) >> 1;
-            ivdbg("Y-=%d Y+=%d[%d] Y=%d\n", priv->value, value, MAX_ADC - value, priv->newy);
+            iinfo("Y-=%d Y+=%d[%d] Y=%d\n", priv->value, value, MAX_ADC - value, priv->newy);
 
             /* Start X+ sampling */
 
@@ -857,7 +857,7 @@ static void tc_worker(FAR void *arg)
 
             value = MAX_ADC - value;
             newx  = (value + priv->value) >> 1;
-            ivdbg("X+=%d X-=%d[%d] X=%d\n", priv->value, value, MAX_ADC - value, newx);
+            iinfo("X+=%d X-=%d[%d] X=%d\n", priv->value, value, MAX_ADC - value, newx);
 
             /* Samples are available */
 
@@ -1204,14 +1204,14 @@ errout:
 static int tc_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 {
 #if 1
-  ivdbg("cmd: %d arg: %ld\n", cmd, arg);
+  iinfo("cmd: %d arg: %ld\n", cmd, arg);
   return -ENOTTY; /* None yet supported */
 #else
   FAR struct inode         *inode;
   FAR struct tc_dev_s *priv;
   int                       ret;
 
-  ivdbg("cmd: %d arg: %ld\n", cmd, arg);
+  iinfo("cmd: %d arg: %ld\n", cmd, arg);
   DEBUGASSERT(filep);
   inode = filep->f_inode;
 
@@ -1258,7 +1258,7 @@ static int tc_poll(FAR struct file *filep, FAR struct pollfd *fds,
   int                       ret;
   int                       i;
 
-  ivdbg("setup: %d\n", (int)setup);
+  iinfo("setup: %d\n", (int)setup);
   DEBUGASSERT(filep && fds);
   inode = filep->f_inode;
 
@@ -1282,7 +1282,7 @@ static int tc_poll(FAR struct file *filep, FAR struct pollfd *fds,
 
       if ((fds->events & POLLIN) == 0)
         {
-          idbg("Missing POLLIN: revents: %08x\n", fds->revents);
+          ierr("ERROR: Missing POLLIN: revents: %08x\n", fds->revents);
           ret = -EDEADLK;
           goto errout;
         }
@@ -1307,7 +1307,7 @@ static int tc_poll(FAR struct file *filep, FAR struct pollfd *fds,
 
       if (i >= CONFIG_TOUCHSCREEN_NPOLLWAITERS)
         {
-          idbg("No availabled slot found: %d\n", i);
+          ierr("ERROR: No available slot found: %d\n", i);
           fds->priv    = NULL;
           ret          = -EBUSY;
           goto errout;
@@ -1367,7 +1367,7 @@ int board_tsc_setup(int minor)
   char devname[DEV_NAMELEN];
   int ret;
 
-  ivdbg("minor: %d\n", minor);
+  iinfo("minor: %d\n", minor);
   DEBUGASSERT(minor >= 0 && minor < 100);
 
   /* Configure all touchscreen pins as inputs, undriven */
@@ -1389,7 +1389,7 @@ int board_tsc_setup(int minor)
   priv = (FAR struct tc_dev_s *)kmm_malloc(sizeof(struct tc_dev_s));
   if (!priv)
     {
-      idbg("kmm_malloc(%d) failed\n", sizeof(struct tc_dev_s));
+      ierr("ERROR: kmm_malloc(%d) failed\n", sizeof(struct tc_dev_s));
       return -ENOMEM;
     }
 #endif
@@ -1403,12 +1403,12 @@ int board_tsc_setup(int minor)
   /* Register the device as an input device */
 
   (void)snprintf(devname, DEV_NAMELEN, DEV_FORMAT, minor);
-  ivdbg("Registering %s\n", devname);
+  iinfo("Registering %s\n", devname);
 
   ret = register_driver(devname, &tc_fops, 0666, priv);
   if (ret < 0)
     {
-      idbg("register_driver() failed: %d\n", ret);
+      ierr("ERROR: register_driver() failed: %d\n", ret);
       goto errout_with_priv;
     }
 
@@ -1420,7 +1420,7 @@ int board_tsc_setup(int minor)
   ret = work_queue(HPWORK, &priv->work, tc_worker, priv, 0);
   if (ret != 0)
     {
-      idbg("Failed to queue work: %d\n", ret);
+      ierr("ERROR: Failed to queue work: %d\n", ret);
       goto errout_with_priv;
     }
 
diff --git a/configs/pic32mz-starterkit/nsh/Make.defs b/configs/pic32mz-starterkit/nsh/Make.defs
index 83d48045e88a5ef091d6ba43366880447c576656..8d17ed253a4b9f852ed17d7c73b7ed41089e89af 100644
--- a/configs/pic32mz-starterkit/nsh/Make.defs
+++ b/configs/pic32mz-starterkit/nsh/Make.defs
@@ -97,13 +97,13 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
 
 ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL_XC32),y)
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
   ARCHCFLAGS += -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist
 endif
 endif
diff --git a/configs/pic32mz-starterkit/nsh/defconfig b/configs/pic32mz-starterkit/nsh/defconfig
index a6299b98a937783a28b68a694862fb155ebb26c3..629793dab4a6875296511798f8ab0e63e25a92c9 100644
--- a/configs/pic32mz-starterkit/nsh/defconfig
+++ b/configs/pic32mz-starterkit/nsh/defconfig
@@ -41,13 +41,15 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -61,8 +63,7 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 CONFIG_ARCH_MIPS=y
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -192,12 +193,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
@@ -240,6 +243,8 @@ CONFIG_RAM_SIZE=131072
 #
 CONFIG_ARCH_BOARD_PIC32MZ_STARTERKIT=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD_CUSTOM_DIR="configs/dummy"
+CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD="pic32mz-starterkit"
 
 #
@@ -249,16 +254,14 @@ CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -295,6 +298,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -345,9 +349,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -378,6 +383,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
@@ -395,7 +401,26 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -404,6 +429,7 @@ CONFIG_MMCSD_MMCSUPPORT=y
 CONFIG_MMCSD_HAVECARDDETECT=y
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 CONFIG_MTD=y
 
 #
@@ -412,6 +438,7 @@ CONFIG_MTD=y
 # CONFIG_MTD_PARTITION is not set
 # CONFIG_MTD_SECT512 is not set
 # CONFIG_MTD_BYTE_WRITE is not set
+# CONFIG_MTD_PROGMEM is not set
 # CONFIG_MTD_CONFIG is not set
 
 #
@@ -419,14 +446,19 @@ CONFIG_MTD=y
 #
 # CONFIG_MTD_NAND is not set
 # CONFIG_RAMMTD is not set
+# CONFIG_FILEMTD is not set
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -434,9 +466,10 @@ CONFIG_MTD=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -460,14 +493,11 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART1_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -484,19 +514,23 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -530,20 +564,17 @@ CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -562,6 +593,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -606,11 +641,14 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -629,23 +667,27 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -653,33 +695,46 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -692,30 +747,28 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -735,6 +788,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
@@ -743,6 +797,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -751,8 +806,10 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -771,12 +828,16 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
@@ -799,6 +860,8 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -812,16 +875,20 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/pic32mz-starterkit/src/pic32mz_autoleds.c b/configs/pic32mz-starterkit/src/pic32mz_autoleds.c
index ec77d3d1f9b9601c7812aecb266b2b842053f7b4..b94a0664e836d546c61baec76e979e9289c37fb5 100644
--- a/configs/pic32mz-starterkit/src/pic32mz_autoleds.c
+++ b/configs/pic32mz-starterkit/src/pic32mz_autoleds.c
@@ -91,22 +91,6 @@
 #define LED_ON  1
 #define LED_NC  2
 
-/* Debug ********************************************************************/
-
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_LEDS)
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  undef CONFIG_DEBUG_LEDS
-#  undef CONFIG_DEBUG_VERBOSE
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private types
  ****************************************************************************/
diff --git a/configs/pic32mz-starterkit/src/pic32mz_buttons.c b/configs/pic32mz-starterkit/src/pic32mz_buttons.c
index 4e26b559507f5dd87b6e88e971d86ce8d1b54b72..a51ca05f08d3cca560cfed69d789df7f144fbd67 100644
--- a/configs/pic32mz-starterkit/src/pic32mz_buttons.c
+++ b/configs/pic32mz-starterkit/src/pic32mz_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/pic32mz-starterkit/src/pic32mz_buttons.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -146,28 +147,27 @@ uint8_t board_buttons(void)
  *   will be called when a button is depressed or released.  The ID value is
  *   a button enumeration value that uniquely identifies a button resource.
  *   See the BUTTON_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it
- *   may restored, if so desired).
+ *   value.
  *
  ****************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
 #ifdef CONFIG_PIC32MZ_GPIOIRQ_PORTB
-  xcpt_t oldhandler = NULL;
+  int ret = OK;
 
   if ((unsigned)id < NUM_BUTTONS)
     {
       /* Perform the attach/detach operation */
 
-      oldhandler = pic32mz_gpioattach(g_buttons[id], irqhandler);
+      ret = pic32mz_gpioattach(g_buttons[id], irqhandler, arg);
 
       /* The interrupt is now disabled.  Are we attaching or detaching from
        * button interrupt?
        */
 
-      if (irqhandler)
+      if (ret >= 0)
         {
           /* Attaching... enable button interrupts now */
 
@@ -175,9 +175,9 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
         }
     }
 
-  return oldhandler;
+  return ret;
 #else
-  return NULL;
+  return -ENOSYS;
 #endif
 }
 #endif
diff --git a/configs/pic32mz-starterkit/src/pic32mz_spi.c b/configs/pic32mz-starterkit/src/pic32mz_spi.c
index 5a0b2599c670a1552e7d2d534c603b5b93867d58..f5093f9e6d09db8c8b1f9de479847f02b4a16dd2 100644
--- a/configs/pic32mz-starterkit/src/pic32mz_spi.c
+++ b/configs/pic32mz-starterkit/src/pic32mz_spi.c
@@ -52,29 +52,6 @@
 
 #ifdef CONFIG_PIC32MZ_SPI
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Debug */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef CONFIG_SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -128,13 +105,13 @@ enum spi_dev_e;
 #ifdef CONFIG_PIC32MZ_SPI1
 void  pic32mz_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 #warning "Missing logic"
 }
 
 uint8_t pic32mz_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  spidbg("Returning nothing\n");
+  spiinfo("Returning nothing\n");
 #warning "Missing logic"
   return 0;
 }
@@ -150,13 +127,13 @@ int pic32mz_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cm
 #ifdef CONFIG_PIC32MZ_SPI2
 void  pic32mz_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 #warning "Missing logic"
 }
 
 uint8_t pic32mz_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  spidbg("Returning nothing\n");
+  spiinfo("Returning nothing\n");
 #warning "Missing logic"
   return 0;
 }
@@ -172,13 +149,13 @@ int pic32mz_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cm
 #ifdef CONFIG_PIC32MZ_SPI3
 void  pic32mz_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 #warning "Missing logic"
 }
 
 uint8_t pic32mz_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  spidbg("Returning nothing\n");
+  spiinfo("Returning nothing\n");
 #warning "Missing logic"
   return 0;
 }
@@ -194,13 +171,13 @@ int pic32mz_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cm
 #ifdef CONFIG_PIC32MZ_SPI4
 void  pic32mz_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 #warning "Missing logic"
 }
 
 uint8_t pic32mz_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  spidbg("Returning nothing\n");
+  spiinfo("Returning nothing\n");
 #warning "Missing logic"
   return 0;
 }
@@ -216,13 +193,13 @@ int pic32mz_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cm
 #ifdef CONFIG_PIC32MZ_SPI5
 void  pic32mz_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 #warning "Missing logic"
 }
 
 uint8_t pic32mz_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  spidbg("Returning nothing\n");
+  spiinfo("Returning nothing\n");
 #warning "Missing logic"
   return 0;
 }
@@ -238,13 +215,13 @@ int pic32mz_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cm
 #ifdef CONFIG_PIC32MZ_SPI6
 void  pic32mz_spi6select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 #warning "Missing logic"
 }
 
 uint8_t pic32mz_spi6status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  spidbg("Returning nothing\n");
+  spiinfo("Returning nothing\n");
 #warning "Missing logic"
   return 0;
 }
diff --git a/configs/pic32mz-starterkit/src/pic32mz_userleds.c b/configs/pic32mz-starterkit/src/pic32mz_userleds.c
index 7defe1597711bcf5a1410ecaeb162dabd13f3fd6..b2b5afe303d5e5f00df8de524d1ecd5c731246c8 100644
--- a/configs/pic32mz-starterkit/src/pic32mz_userleds.c
+++ b/configs/pic32mz-starterkit/src/pic32mz_userleds.c
@@ -54,9 +54,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
 /* LED Configuration ********************************************************/
 /* The PIC32MZ Ethernet Starter kit has 3 user LEDs labelled LED1-3 on the
  * board:
@@ -71,22 +68,6 @@
  * LEDs through the functions provided in this file
  */
 
-/* Debug ********************************************************************/
-
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_LEDS)
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  undef CONFIG_DEBUG_LEDS
-#  undef CONFIG_DEBUG_VERBOSE
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
diff --git a/configs/pirelli_dpl10/README.txt b/configs/pirelli_dpl10/README.txt
deleted file mode 100644
index e9f0204df5118d4b51bb79535b99b0e52c085481..0000000000000000000000000000000000000000
--- a/configs/pirelli_dpl10/README.txt
+++ /dev/null
@@ -1,363 +0,0 @@
-pirelli_dpl10
-=============
-
-  This directory contains the board support for Pirelli "Discus" DP-L10
-  phones.
-
-Contents
-========
-
-  * History
-  * Hardware
-  * Osmocom-BB Dependencies and Sercomm
-  * Loading NuttX
-  * Memory Map
-  * USB Serial Console
-  * NuttX OABI "buildroot" Toolchain
-  * Generic OABI Toolchain
-  * Configurations
-
-History
-=======
-  This port is a variant of the compal_e88 configuration with the small
-  change of enabling the IrDA serial console:
-
-    - CONFIG_SERIAL_IRDA_CONSOLE=y
-
-  This port is based on patches contributed by Denis Carikli for both the
-  compal e99 and e88. At the time of initial check-in, the following phones
-  were tested:
-
-    - Pirelli DPL-10 nsh_highram loaded via romload in osmocon
-
-  The patches were made by Alan Carvalho de Assis and Denis Carikli using
-  the Stefan Richter's patches that can be found here:
-
-    http://cgit.osmocom.org/cgit/nuttx-bb/log/?h=lputt%2Ftesting
-
-Hardware
-========
-
-    * CPU/DBB: TI Calypso (D751992AZHH)
-
-      See http://bb.osmocom.org/trac/wiki/Hardware/Calypso
-
-    * ABB: TI Iota (TWL3014)
-
-      Analog baseband chip.  See http://bb.osmocom.org/trac/wiki/Iota
-
-    * GSM Transceiver: TI Rita (TRF6151)
-
-      GSM Transceiver.  See http://bb.osmocom.org/trac/wiki/Rita
-
-    * PA: SKY77328-13
-
-      Quad-band GSM/GPRS:  See http://www.skyworksinc.com/Product.aspx?ProductID=434
-
-    * Flash/SRAM: Spansion S71PL129NC0 128MBit/64MBit
-
-      Combined FLASH and SDRAM:
-      FLASH: 128Mbit
-      SDRAM: 64Mbit
-
-    * Wifi: Marvell 88W8385 802.11 MAC
-            Marvell 88W8015 802.11b/g transceiver
-
-    * Winbond W56940 ringtone chip
-
-    * Sunplus SPCA552E multimedia controller
-
-      Multimedia processor: integrates CMOS sensor interface, DSC processor, JPEG
-      codec engine, LCM interface and other peripherals.
-
-      I have not yet been able to find a data sheet for this chip.  I believe that
-      it will be critical to develop drivers for the display.
-
-    * LSI-65194A1 ASIC (seems to be a DSP for VoIP en-/decoding)
-
-    * Silabs CP2102 USB UART (connected to UART_IRDA of the Calypso)
-
-Osmocom-BB Dependencies and Sercomm
-===================================
-
-  Sercomm is an HDLC protocol used to communicate between a Calypso phone
-  and the host PC.  By default, NuttX will not use sercomm (HDLC protocol) to
-  communicate with the host system.  Sercomm is the transport used by
-  osmocom-bb that runs on top of serial.  See
-  http://bb.osmocom.org/trac/wiki/nuttx-bb/run for detailed the usage of nuttx
-  with sercomm.
-
-  If you build with sercomm, you must add support for sercomm in your
-  configuration (CONFIG_SERCOMM_CONSOLE=y).  In this case, the build
-  environment assumes that you have the osmocom-bb project directory at same
-  level as the nuttx project:
-
-    |- nuttx
-    |- apps
-    `- osmocom-bb
-
-  If you attempt to build a sercomm-enaled configuration without osmocom-bb,
-  you will get compilation errors in drivers/sercomm due to header files that
-  are needed from the osmocom-bb directory.
-
-Loading NuttX
-=============
-
-  General
-  -------
-  The osmocom-bb wiki describes how to load NuttX.  See
-  http://bb.osmocom.org/trac/wiki/nuttx-bb for detailed information.
-  The way that nuttx is loaded depends on the configuration (highram/compalram)
-  and phone:
-
-  - compalram is for the ramloader(for phone having a bootloader on flash)
-  - highram is for phones having the romloader(if the phone has a bootrom)
-    or for loading in the ram trough a special loader(loaded first on ram
-    by talking to the ramloader) when having a ramloader(which can only
-    load 64k).
-
-  The Pirelli USB Serial Interface
-  --------------------------------
-  The Pirelli phone is epecially easy to use because you just use the
-  supplied USB cable.  The phone already has an integrated Silabs CP210x
-  USB-UART, which is supported by Linux.  No need for a T191 cable.
-
-  Most of the phones seem to use USB vid:pid 0489:e003, which is mainline
-  since Linux 2.6.36. You can do the following for Kernels < 2.6.36:
-
-    # modprobe -v cp210x
-    # echo "0489 e003" > /sys/bus/usb-serial/drivers/cp210x/new_id
-
-  Loading NuttX
-  -------------
-  Here's how I load NuttX into the phone:
-
-  - Take out the battery
-  - Plug in the USB adapter into the phone then the computer
-  - Start osmocon like: osmocon -p /dev/ttyUSB0 -m romload nuttx.bin
-  - Put the battery back in
-
-  This works most of the time.  Sometimes I have to take out and put in
-  the battery a few times or re-start the whole set of steps but it's
-  generally quite reliable.
-
-Memory Map
-=========
-
-  Internal SRAM and ROM
-  ---------------------
-  Calypso has 256KB of internal SRAM (0x800000-0x83ffff, although some of
-  this is, I believe, actually ROM).  Only this internal SRAM is used by
-  these configurations.  The internal SRAM is broken up into two logical
-  banks.
-
-    LRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00020000
-    HRAM (rw) : ORIGIN = 0x00820000, LENGTH = 0x00020000
-
-  Code can be loaded by the CalypsoBootloader only into HRAM beginning at
-  address 0x00820000 and, hence, is restricted to 128KB (including then
-  non-loaded sections:  Uninitialized data and the NuttX heap).
-
-  SDRAM and NOR FLASH
-  -------------------
-  SDRAM is provided  by a Flash/SRAM: Spansion S71PL129NC0 part that provices
-  128MBit (16MB) of FLASH and 64MBit (8MB) of SDRAM.
-
-  *  SDRAM
-
-    The Pirelli DP-L10 has 8MB of SDRAM beginning at address 0x01000000.
-    This DRAM appears to be initialized by the Pirelli ROM loader and is
-    ready for use with no further initialization required.
-
-  * NOR FLASH
-
-    The 16MB FLASH is at address 0x00000000.
-
-USB Serial Console
-==================
-
-  These configurations are set up to use the Calypso IrDA UART as the serial
-  port.  On the Pirelli phone, this port connects to the built-in USB-serial
-  adaptor so that that NuttX serial console will be available on your PC as
-  a USB serial device.  You should see something this using 'dmesg' when you
-  plug the Pirelli phone into a PC running Linux:
-
-    usb 5-2: new full speed USB device number 3 using uhci_hcd
-    usb 5-2: New USB device found, idVendor=0489, idProduct=e003
-    usb 5-2: New USB device strings: Mfr=1, Product=2, SerialNumber=3
-    usb 5-2: Product: DP-L10
-    usb 5-2: Manufacturer: Silicon Labs
-    usb 5-2: SerialNumber: 0001
-    usbcore: registered new interface driver usbserial
-    USB Serial support registered for generic
-    usbcore: registered new interface driver usbserial_generic
-    usbserial: USB Serial Driver core
-    USB Serial support registered for cp210x
-    cp210x 5-2:1.0: cp210x converter detected
-    usb 5-2: reset full speed USB device number 3 using uhci_hcd
-    usb 5-2: cp210x converter now attached to ttyUSB0
-    usbcore: registered new interface driver cp210x
-    cp210x: v0.09:Silicon Labs CP210x RS232 serial adaptor driver
-
-
-  Before you use this port to communicate with Nuttx, make sure that osmocon is
-  no longer running.  Then start a serial terminal such as minicom on your host
-  PC.  Configure the serial terminal so that it uses:
-
-    Port:  /dev/ttyUSB0
-    Baud:  115,200 8N1
-
-JTAG and Alternative Serial Console
-===================================
-
-JTAG
-  All JTAG lines, as well as the second uart (UART_MODEM), go to the
-  unpopulated connector next to the display connector.  NOTE:  You have
-  to disassemble the phone to get to this connector.
-
-
-  --- ---------------------------
-  PIN SIGNAL
-  --- ---------------------------
-    1 Vcc
-    2 RX_MODEM
-    3 TESTRSTz (Iota)
-    4 TDI
-    5 TMS
-    6 TCK
-    7 TX_MODEM
-    8 TDO
-    9 N/C
-   10 GND
-   11 N/C
-   12 N/C
-  --- ---------------------------
-
-JTAG Apapter:
-
-  ------- ----------- --------------- --------------------------------------
-  JTAG    20-PIN      DESCRIPTION     NOTES
-  SIGNAL  CONNECTOR
-  ------- ----------- --------------- --------------------------------------
-   Vcc    1, 2        Vcc
-   nTRST  3           Reset           Connect this pin to the (active
-                                      low) reset input of the target MCU.
-                                      Some JTAG adapters driver nTRST (high
-                                      and low). Others can can configure
-                                      nTRST as open collector (only drive
-                                      low).
-   GND    4, 6, 8,    Ground
-          10, 12, 14,
-          16, 20
-   TDI    5           JTAG Test Data  Use 10K-100K Ohm pull-up resistor to
-                      Input           VCC
-   TMS    7           JTAG Test Mode  Use 10K-100K Ohm pull-up resistor to
-                      Select          VCC
-   TCK    9           Clock into the  Use 10K-100K Ohm pull-down resistor to
-                      core            GND
-   RTCK   11          Return clock    Some JTAG adapters have adaptive clocking
-                                      using an RTCK signal.
-   DBGSEL 11          Debug Select    Some devices have special pins that
-                                      enable the JTAG interface. For example,
-                                      on the NXP LPC2129 the signal RTCK must
-                                      be driven low during RESET to enable the
-                                      JTAG interface.
-   TDO    13          JTAG Test Data  Use 10K-100K Ohm pull-up resistor to VCC
-                      Output
-   DBGRQ  17          N/C
-   DGBACK 19          N/C
-   ISP    ??          ISP             Most NXP MCU's have an ISP pin which
-                                      (when pulled low) can be used to cause
-                                      the MCU to enter a bootloader on reset.
-                                      Use 10K-100K Ohm pull up resistor.
-  ------- ----------- --------------- --------------------------------------
-
-NuttX OABI "buildroot" Toolchain
-================================
-
-  A GNU GCC-based toolchain is assumed.  The files */setenv.sh should
-  be modified to point to the correct path to the ARM GCC toolchain (if
-  different from the default in your PATH variable).
-
-  If you have no ARMtoolchain, one can be downloaded from the NuttX
-  Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/).
-  This GNU toolchain builds and executes in the Linux or Cygwin environment.
-
-  1. You must have already configured Nuttx in /nuttx.
-
-     cd tools
-     ./configure.sh pirelli_dpl10/
-
-  2. Download the latest buildroot package into 
-
-  3. unpack the buildroot tarball.  The resulting directory may
-     have versioning information on it like buildroot-x.y.z.  If so,
-     rename /buildroot-x.y.z to /buildroot.
-
-  4. cd /buildroot
-
-  5. cp configs/arm7tdmi-defconfig-4.3.3 .config
-
-  6. make oldconfig
-
-  7. make
-
-  8. Edit setenv.h, if necessary, so that the PATH variable includes
-     the path to the newly built binaries.
-
-  See the file configs/README.txt in the buildroot source tree.  That has more
-  details PLUS some special instructions that you will need to follow if you are
-  building a Cortex-M3 toolchain for Cygwin under Windows.
-
-Generic OABI Toolchain
-======================
-
-  The NuttX OABI toolchain is selected with:
-
-    CONFIG_ARM_TOOLCHAIN_BUILDROOT=y
-    CONFIG_ARM_OABI_TOOLCHAIN=y
-
-  In most cases, OsmocomBB is built with a different OABI toolchain with a
-  prefix of arm-elf-.  To use that toolchain, change the configuration as
-  follows:
-
-    CONFIG_ARM_TOOLCHAIN_GNU_OABI=y
-
-Configurations
-==============
-
-  nsh:
-  ---
-    Configures the NuttShell (nsh) located at apps/examples/nsh.
-
-    NOTES:
-
-    1. This configuration uses the mconf-based configuration tool.  To
-       change this configuration using that tool, you should:
-
-       a. Build and install the kconfig-mconf tool.  See nuttx/README.txt
-          see additional README.txt files in the NuttX tools repository.
-
-       b. Execute 'make menuconfig' in nuttx/ in order to start the
-          reconfiguration process.
-
-    2. This configuration enables the serial interface on IrDA UART which
-       will appears as a USB serial device.
-
-       CONFIG_SERIAL_IRDA_CONSOLE=y
-
-    3. By default, this configuration uses the CodeSourcery toolchain
-       for Windows and builds under Cygwin (or probably MSYS).  That
-       can easily be reconfigured, of course.
-
-       CONFIG_HOST_LINUX=y                     : Builds under Linux
-       CONFIG_ARM_TOOLCHAIN_BUILDROOT=y        : NuttX buildroot OABI toolchain
-       CONFIG_ARM_OABI_TOOLCHAIN=y
-
-       You can switch to use the generic arm-elf- GCC toolchain by
-       setting:
-
-        CONFIG_ARM_TOOLCHAIN_GNU_OABI=y        : General arm-elf- toolchain
-
-    4. Support for builtin applications is enabled.  A builtin 'poweroff'
-       command is supported.
diff --git a/configs/pirelli_dpl10/include/board.h b/configs/pirelli_dpl10/include/board.h
deleted file mode 100644
index 1426ea73247306f8a9432c18fd677263a766edaa..0000000000000000000000000000000000000000
--- a/configs/pirelli_dpl10/include/board.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/****************************************************************************
- * configs/pirelli_dpl10/include/board.h
- *
- * Supposed to be empty
- *
- ****************************************************************************/
diff --git a/configs/pirelli_dpl10/nsh_highram/Make.defs b/configs/pirelli_dpl10/nsh_highram/Make.defs
deleted file mode 100644
index 4b95922be4fe8681d2d7bd3b56abb8fd1677ce3b..0000000000000000000000000000000000000000
--- a/configs/pirelli_dpl10/nsh_highram/Make.defs
+++ /dev/null
@@ -1,131 +0,0 @@
-############################################################################
-# configs/pirelli_dpl10/nsh/Make.defs
-#
-#   Copyright (C) 2007, 2008, 2011, 2013 Gregory Nutt. All rights reserved.
-#   Author: Gregory Nutt 
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name NuttX nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-############################################################################
-
-include ${TOPDIR}/.config
-include ${TOPDIR}/tools/Config.mk
-include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs
-
-LDSCRIPT = highram.ld
-
-ifeq ($(WINTOOL),y)
-  # Windows-native toolchains
-  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
-  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
-  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
-else
-  # Linux/Cygwin-native toolchain
-  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
-  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
-  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
-endif
-
-CC = $(CROSSDEV)gcc
-CXX = $(CROSSDEV)g++
-CPP = $(CROSSDEV)gcc -E
-LD = $(CROSSDEV)ld
-AR = $(ARCROSSDEV)ar rcs
-NM = $(ARCROSSDEV)nm
-OBJCOPY = $(CROSSDEV)objcopy
-OBJDUMP = $(CROSSDEV)objdump
-
-ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
-ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
-
-ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
-  ARCHOPTIMIZATION = -g
-endif
-
-ifneq ($(CONFIG_DEBUG_NOOPT),y)
-  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
-endif
-
-ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
-ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
-ARCHWARNINGSXX = -Wall -Wshadow -Wundef
-ARCHDEFINES =
-ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
-
-CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
-CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
-CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
-CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
-CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
-AFLAGS = $(CFLAGS) -D__ASSEMBLY__
-
-NXFLATLDFLAGS1 = -r -d -warn-common
-NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
-LDNXFLATFLAGS = -e main -s 2048
-
-ASMEXT = .S
-OBJEXT = .o
-LIBEXT = .a
-EXEEXT =
-
-ifneq ($(CROSSDEV),arm-nuttx-elf-)
-  LDFLAGS += -nostartfiles -nodefaultlibs
-endif
-ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
-  LDFLAGS += -g
-endif
-
-ifeq ("${CONFIG_SERCOMM_CONSOLE}","y")
-OSMODIR     = $(TOPDIR)/../../osmocom-bb
-EXTRA_LIBS  = $(OSMODIR)/src/target/firmware/comm/libcomm.a \
-              $(OSMODIR)/src/shared/libosmocore/build-target/src/.libs/libosmocore.a \
-              $(OSMODIR)/src/target/firmware/calypso/libcalypso.a \
-              $(OSMODIR)/src/target/firmware/comm/libcomm.a
-              # ^^^ Stupid hack! Why do I have to put it twice???
-endif
-
-HOSTCC = gcc
-HOSTINCLUDES = -I.
-HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
-HOSTLDFLAGS =
-ifeq ($(CONFIG_HOST_WINDOWS),y)
-  HOSTEXEEXT = .exe
-else
-  HOSTEXEEXT =
-endif
-
-ifeq ($(WINTOOL),y)
-  # Windows-native host tools
-  DIRLINK = $(TOPDIR)/tools/copydir.sh
-  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
-  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
-else
-  # Linux/Cygwin-native host tools
-  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
-endif
diff --git a/configs/pirelli_dpl10/scripts/highram.ld b/configs/pirelli_dpl10/scripts/highram.ld
deleted file mode 100644
index f20a5f89c2a1af0df6828e794e30b7d7f56521ca..0000000000000000000000000000000000000000
--- a/configs/pirelli_dpl10/scripts/highram.ld
+++ /dev/null
@@ -1,132 +0,0 @@
-/*
- * Linker script for running from internal SRAM on Pirelli DP-L10 phones
- *
- * This script is tailored specifically to the requirements imposed
- * on us by the CalypsoRomloader in the Pirelli rom.
- *
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(__start)
-
-MEMORY
-{
-    /* 0x00800000-0x0082000:  Low RAM.  Used only for exception vectors */
-
-    LRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00020000
-
-    /* 0x00820000-0x0084000: High RAM.  The CalypsoRomloader loads binary to
-	 * address 0x00820000 */
-
-    HRAM (rw) : ORIGIN = 0x00820000, LENGTH = 0x00020000
-}
-
-SECTIONS
-{
-    . = 0x800000;
-
-    /* romloader data section, contains passthru interrupt vectors */
-    .compal.loader (NOLOAD) : { . = 0x100; } > LRAM
-
-    /* image signature (prepended by osmocon according to phone type) */
-    .compal.header (NOLOAD) : { . = 4; } > LRAM
-
-    /* initialization code */
-    . = ALIGN(4);
-    .text.start : {
-        PROVIDE(__start = .);
-        KEEP(*(.text.start))
-        *(.text.start)
-    } > HRAM
-
-    /* exception vectors from 0x80001c to 0x800034 */
-    .text.exceptions 0x80001c : AT (LOADADDR(.text.start) + SIZEOF(.text.start)) {
-        KEEP(*(.text.exceptions))
-        * (.text.exceptions)
-        . = ALIGN(4);
-    } > LRAM
-    PROVIDE(_exceptions = LOADADDR(.text.exceptions));
-
-    /* code */
-    . = ALIGN(4);
-    .text (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) :
-          AT (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) {
-        /* regular code */
-        *(.text*)
-        /* always-in-ram code */
-        *(.ramtext*)
-        /* gcc voodoo */
-        *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx)
-        . = ALIGN(4);
-    } > HRAM
-    PROVIDE(_text_start = LOADADDR(.text));
-    PROVIDE(_text_end = LOADADDR(.text) + SIZEOF(.text));
-
-    /* constructor pointers */
-    .ctors : {
-        /* ctor count */
-        LONG(SIZEOF(.ctors) / 4 - 2)
-        /* ctor pointers */
-        KEEP(*(SORT(.ctors)))
-        /* end of list */
-        LONG(0)
-    } > HRAM
-    PROVIDE(_ctor_start = LOADADDR(.ctors));
-    PROVIDE(_ctor_end = LOADADDR(.ctors) + SIZEOF(.ctors));
-
-    /* destructor pointers */
-    .dtors : {
-        /* dtor count */
-        LONG(SIZEOF(.dtors) / 4 - 2)
-        /* dtor pointers */
-        KEEP(*(SORT(.dtors)))
-        /* end of list */
-        LONG(0)
-    } > HRAM
-    PROVIDE(_dtor_start = LOADADDR(.dtors));
-    PROVIDE(_dtor_end = LOADADDR(.dtors) + SIZEOF(.dtors));
-
-    /* read-only data */
-    . = ALIGN(4);
-    .rodata : {
-        *(.rodata*)
-    } > HRAM
-    PROVIDE(_rodata_start = LOADADDR(.rodata));
-    PROVIDE(_rodata_end = LOADADDR(.rodata) + SIZEOF(.rodata));
-
-    /* initialized data */
-    . = ALIGN(4);
-    .data : {
-        *(.data)
-    } > HRAM
-    PROVIDE(_data_start = LOADADDR(.data));
-    PROVIDE(_data_end = LOADADDR(.data) + SIZEOF(.data));
-
-    /* pic offset tables */
-    . = ALIGN(4);
-    .got : {
-        *(.got)
-        *(.got.plt) *(.igot.plt) *(.got) *(.igot)
-    } > HRAM
-    PROVIDE(_got_start = LOADADDR(.got));
-    PROVIDE(_got_end = LOADADDR(.got) + SIZEOF(.got));
-
-    /* uninitialized data */
-    .bss (NOLOAD) : {
-        . = ALIGN(4);
-        __bss_start = .;
-        _sbss = ABSOLUTE(.);
-        *(.bss)
-        _ebss = ABSOLUTE(.);
-    } > HRAM
-    . = ALIGN(4);
-    __bss_end = .;
-    PROVIDE(_bss_start = __bss_start);
-    PROVIDE(_bss_end = __bss_end);
-
-    /* end of image */
-    . = ALIGN(4);
-    _end = .;
-    PROVIDE(end = .);
-}
diff --git a/configs/qemu-i486/nsh/Make.defs b/configs/qemu-i486/nsh/Make.defs
index 7f5be321fdefb7338a3c5366789e85cdbe289c44..4f857d81decd4caa0dadce037affa94fa8b315dd 100644
--- a/configs/qemu-i486/nsh/Make.defs
+++ b/configs/qemu-i486/nsh/Make.defs
@@ -63,16 +63,16 @@ else
   ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/nsh/ld.script
 endif
 
-ARCHCPUFLAGS = -march=i486 -mtune=i486 -fno-builtin
-#ARCHCPUFLAGS = -march=i486 -mtune=i486 -fno-builtin -fno-stack-protector
+ARCHCPUFLAGS = -march=i486 -mtune=i486 -fno-builtin -fno-stack-protector
 ARCHPICFLAGS = -fpic
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHDEFINES =
 
 # Check if building a 32-bit target with a 64-bit toolchain
 
-ifeq ($(ARCH_X86_M32),y)
+ifeq ($(CONFIG_ARCH_X86_M32),y)
 ARCHCPUFLAGS += -m32
+LDFLAGS += -m elf_i386
 endif
 
 # We have to use a cross-development toolchain under Cygwin because the native
@@ -109,5 +109,5 @@ MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
 
 HOSTCC = gcc
 HOSTINCLUDESv = -I.
-HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
 HOSTLDFLAGS =
diff --git a/configs/qemu-i486/nsh/defconfig b/configs/qemu-i486/nsh/defconfig
index c07faea1dac810dbc541e5844c35d61e9ca3cf6d..96a55698ed81c5517ae6ee28ea720b69376b1000 100644
--- a/configs/qemu-i486/nsh/defconfig
+++ b/configs/qemu-i486/nsh/defconfig
@@ -39,7 +39,7 @@ CONFIG_HOST_LINUX=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
@@ -54,8 +54,7 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 CONFIG_ARCH_X86=y
 # CONFIG_ARCH_Z16 is not set
@@ -239,7 +238,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 CONFIG_16550_UART=y
@@ -339,7 +337,6 @@ CONFIG_FS_ROMFS=y
 # System Logging
 #
 
-# CONFIG_SYSLOG is not set
 
 #
 # Graphics Support
@@ -398,7 +395,6 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Non-standard Library Support
@@ -458,7 +454,6 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
diff --git a/configs/qemu-i486/ostest/Make.defs b/configs/qemu-i486/ostest/Make.defs
index 72f26452bb67fe32392adb67904e9a657615b3d5..5075731826a38b63ab4215826945425b80942f79 100644
--- a/configs/qemu-i486/ostest/Make.defs
+++ b/configs/qemu-i486/ostest/Make.defs
@@ -63,16 +63,16 @@ else
   ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/ld.script
 endif
 
-ARCHCPUFLAGS = -march=i486 -mtune=i486 -fno-builtin
-#ARCHCPUFLAGS = -march=i486 -mtune=i486 -fno-builtin -fno-stack-protector
+ARCHCPUFLAGS = -march=i486 -mtune=i486 -fno-builtin -fno-stack-protector
 ARCHPICFLAGS = -fpic
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHDEFINES =
 
 # Check if building a 32-bit target with a 64-bit toolchain
 
-ifeq ($(ARCH_X86_M32),y)
+ifeq ($(CONFIG_ARCH_X86_M32),y)
 ARCHCPUFLAGS += -m32
+LDFLAGS += -m elf_i386
 endif
 
 # We have to use a cross-development toolchain under Cygwin because the native
@@ -109,5 +109,5 @@ MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
 
 HOSTCC = gcc
 HOSTINCLUDESv = -I.
-HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
 HOSTLDFLAGS =
diff --git a/configs/qemu-i486/ostest/defconfig b/configs/qemu-i486/ostest/defconfig
index 9306bec0db819c94564ac7a77e665140c1c6ed10..4c7e9a3a957d6ab9a36bdcfb7d7b5c24de68c2d7 100644
--- a/configs/qemu-i486/ostest/defconfig
+++ b/configs/qemu-i486/ostest/defconfig
@@ -39,7 +39,7 @@ CONFIG_HOST_LINUX=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
@@ -54,8 +54,7 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 CONFIG_ARCH_X86=y
 # CONFIG_ARCH_Z16 is not set
@@ -238,7 +237,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
 # CONFIG_16550_UART is not set
@@ -316,7 +314,6 @@ CONFIG_FS_FAT=y
 # System Logging
 #
 
-# CONFIG_SYSLOG is not set
 
 #
 # Graphics Support
@@ -375,7 +372,6 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Non-standard Library Support
@@ -440,7 +436,6 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
diff --git a/configs/rgmp/README.txt b/configs/rgmp/README.txt
deleted file mode 100644
index ac92ef91a48ec995cdcc15754b5d84d6413923cb..0000000000000000000000000000000000000000
--- a/configs/rgmp/README.txt
+++ /dev/null
@@ -1,90 +0,0 @@
-RGMP README File
-================
-
-RGMP stands for RTOS and GPOS on Multi-Processor.  RGMP is a project for
-running GPOS and RTOS simultaneously on multi-processor platforms. You can
-port your favorite RTOS to RGMP together with an unmodified Linux to form a
-hybrid operating system. This makes your application able to use both RTOS
-and GPOS features.
-
-See http://rgmp.sourceforge.net/wiki/index.php/Main_Page for further
-information about RGMP.
-
-The updated build instructions can be found at:
-http://rgmp.sourceforge.net/wiki/index.php/Documentation
-
-Ubuntu Build Instructions
---------------------------
-Build requirements:
-  * x86 PC:
-  	Ubuntu 10.04, 10.10 or 11.04
-  * OMAP4430 pandaboard:
-	Ubuntu 11.04
-
-Run requirements:
-  * multi-processor x86 PC:
-	Ubuntu 10.04, 10.10 or 11.04
-  * OMAP4430 pandaboard:
-	Ubuntu 11.04
-
-1. Download RGMP from the following URL:
-
-   http://rgmp.sourceforge.net/wiki/index.php/Download
-
-   You should choose a right verion of RGMP compatible with this NuttX release.
-   Extract the tar file:
-
-   $ tar -xjvf rgmp-.tar.bz2
-
-2. Get Linux kernel header:
-
-   $ sudo apt-get install linux-headers-$(uname -r)
-
-3. Build and install RGMP:
-
-   $ cd 
-   $ ./configure
-   $ make
-   $ sudo make install
-   $ sudo /usr/rgmp/setup
-   $ exit
-
-4. Configure NuttX.  For example, for the RGMP x86 NSH configuration, do the
-   following:
-
-   $ cd 
-   $ cd tools
-   $ ./configure.sh rgmp/x86/nsh
-   $ cd ..
-
-5. Build NuttX. Get the binary image at /kernel.img.
-
-   $ cd 
-   $ make
-
-6. Run NuttX in RGMP:
-
-   $ cd 
-   $ su
-   $ rgmp_run
-
-
-Other Linux OS Build Instruction
---------------------------------------
-Requirements:
-  * multi-processor x86 PC
-	running Linux kernel 2.6.32, 2.6.35 or 2.6.38
-  * OMAP4430 pandaboard
-	running Linux kernel 2.6.38
-
-1. Get your running Linux kernel header under /usr/src/linux-headers-$(uname -r)
-   directory.
-
-2. Following the Ubuntu steps begin at 3.
-
-Note: You can configure the RGMP to find Linux kernel header in a different
-      place and install RGMP to a different place. See information printed
-      by the following instruction:
-
-      $ cd 
-      $ ./configure -h
diff --git a/configs/rgmp/arm/default/Make.defs b/configs/rgmp/arm/default/Make.defs
deleted file mode 100644
index ef6dcbbb3d4967cafc84add52df57d4ed5894be2..0000000000000000000000000000000000000000
--- a/configs/rgmp/arm/default/Make.defs
+++ /dev/null
@@ -1,96 +0,0 @@
-############################################################################
-# configs/rgmp/default/Make.defs
-#
-#   Copyright (C) 2011 Yu Qiang. All rights reserved.
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
-#   Authors: Yu Qiang 
-#            Gregory Nutt 
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name NuttX nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-############################################################################
-
-include ${TOPDIR}/.config
-include ${TOPDIR}/tools/Config.mk
-
-RGMPLIBDIR := $(RGMP_INST_DIR)/lib
-RGMPINCDIR := $(RGMP_INST_DIR)/include
-RGMPLKSCPT := $(RGMP_INST_DIR)/etc/rgmp.ld
-
-HOSTOS			= ${shell uname -o}
-
-ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
-  ARCHOPTIMIZATION	= -O2 -gstabs
-else
-  ARCHOPTIMIZATION	= -O2
-endif
-
-ARCHCPUFLAGS		= -fno-builtin -nostdinc -fno-stack-protector -fno-omit-frame-pointer \
-                          -marm -march=armv7-a
-ARCHPICFLAGS		= -fpic
-ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
-ARCHDEFINES		=
-ARCHINCLUDES		= -I. -isystem $(TOPDIR)/include -I$(RGMPINCDIR) \
-			  -I$(TOPDIR)/configs/rgmp/include -I$(TOPDIR)/arch/rgmp/include/arm
-ARCHSCRIPT		=
-
-CROSSDEV		=
-CC			= $(CROSSDEV)gcc
-CPP			= $(CROSSDEV)gcc -E
-LD			= $(CROSSDEV)ld
-AR			= $(CROSSDEV)ar rcs
-NM			= $(CROSSDEV)nm
-OBJCOPY			= $(CROSSDEV)objcopy
-OBJDUMP			= $(CROSSDEV)objdump
-
-CFLAGS			= $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \
-			  $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) -pipe
-CPPFLAGS		= $(ARCHINCLUDES) $(ARCHDEFINES)
-AFLAGS			= $(CFLAGS) -D__ASSEMBLY__
-
-ASMEXT			= .S
-OBJEXT			= .o
-LIBEXT			= .a
-
-ifeq ($(HOSTOS),Cygwin)
-  EXEEXT		= .exe
-else
-  EXEEXT		=
-endif
-
-LDFLAGS                 += -nostdlib
-EXTRA_LIBS		=
-
-
-MKDEP			= $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
-
-HOSTCC			= gcc
-HOSTINCLUDES		= -I.
-HOSTCFLAGS		= $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \
-			  $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) -pipe
-HOSTLDFLAGS		=
diff --git a/configs/rgmp/arm/default/defconfig b/configs/rgmp/arm/default/defconfig
deleted file mode 100644
index 4b1bf3a25ca5496172ff2c5c147bc85b2ca36978..0000000000000000000000000000000000000000
--- a/configs/rgmp/arm/default/defconfig
+++ /dev/null
@@ -1,661 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# Nuttx/ Configuration
-#
-
-#
-# Build Setup
-#
-# CONFIG_EXPERIMENTAL is not set
-# CONFIG_DEFAULT_SMALL is not set
-CONFIG_HOST_LINUX=y
-# CONFIG_HOST_OSX is not set
-# CONFIG_HOST_WINDOWS is not set
-# CONFIG_HOST_OTHER is not set
-
-#
-# Build Configuration
-#
-# CONFIG_APPS_DIR="../apps"
-# CONFIG_BUILD_2PASS is not set
-
-#
-# Binary Output Formats
-#
-# CONFIG_RRLOAD_BINARY is not set
-# CONFIG_INTELHEX_BINARY is not set
-# CONFIG_MOTOROLA_SREC is not set
-# CONFIG_RAW_BINARY is not set
-
-#
-# Customize Header Files
-#
-CONFIG_ARCH_STDINT_H=y
-CONFIG_ARCH_STDBOOL_H=y
-CONFIG_ARCH_MATH_H=y
-# CONFIG_ARCH_FLOAT_H is not set
-# CONFIG_ARCH_STDARG_H is not set
-
-#
-# Debug Options
-#
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_STACKCHECK is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_SYMBOLS is not set
-# CONFIG_ARCH_HAVE_CUSTOMOPT is not set
-# CONFIG_DEBUG_NOOPT is not set
-CONFIG_DEBUG_FULLOPT=y
-
-#
-# System Type
-#
-# CONFIG_ARCH_ARM is not set
-# CONFIG_ARCH_AVR is not set
-# CONFIG_ARCH_HC is not set
-# CONFIG_ARCH_MIPS is not set
-CONFIG_ARCH_RGMP=y
-# CONFIG_ARCH_SH is not set
-# CONFIG_ARCH_SIM is not set
-# CONFIG_ARCH_X86 is not set
-# CONFIG_ARCH_Z16 is not set
-# CONFIG_ARCH_Z80 is not set
-CONFIG_ARCH="rgmp"
-
-#
-# RGMP Configuration Options
-#
-CONFIG_RGMP_SUBARCH_ARM=y
-# CONFIG_RGMP_SUBARCH_X86 is not set
-CONFIG_RGMP_SUBARCH="arm"
-
-#
-# Architecture Options
-#
-# CONFIG_ARCH_NOINTC is not set
-# CONFIG_ARCH_VECNOTIRQ is not set
-# CONFIG_ARCH_DMA is not set
-# CONFIG_ARCH_HAVE_IRQPRIO is not set
-# CONFIG_ARCH_ADDRENV is not set
-# CONFIG_ARCH_HAVE_VFORK is not set
-# CONFIG_ARCH_HAVE_MMU is not set
-# CONFIG_ARCH_NAND_HWECC is not set
-# CONFIG_ARCH_STACKDUMP is not set
-# CONFIG_ENDIAN_BIG is not set
-# CONFIG_ARCH_IDLE_CUSTOM is not set
-# CONFIG_ARCH_HAVE_RAMFUNCS is not set
-# CONFIG_ARCH_HAVE_RAMVECTORS is not set
-
-#
-# Board Settings
-#
-CONFIG_BOARD_LOOPSPERMSEC=5000
-# CONFIG_ARCH_CALIBRATION is not set
-
-#
-# Interrupt options
-#
-# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set
-# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set
-
-#
-# Boot options
-#
-# CONFIG_BOOT_RUNFROMEXTSRAM is not set
-CONFIG_BOOT_RUNFROMFLASH=y
-# CONFIG_BOOT_RUNFROMISRAM is not set
-# CONFIG_BOOT_RUNFROMSDRAM is not set
-# CONFIG_BOOT_COPYTORAM is not set
-
-#
-# Boot Memory Configuration
-#
-CONFIG_RAM_START=0x0
-CONFIG_RAM_SIZE=0
-# CONFIG_ARCH_HAVE_SDRAM is not set
-
-#
-# Board Selection
-#
-CONFIG_ARCH_BOARD_RGMP=y
-# CONFIG_ARCH_BOARD_CUSTOM is not set
-CONFIG_ARCH_BOARD="rgmp"
-
-#
-# Common Board Options
-#
-
-#
-# Board-Specific Options
-#
-
-#
-# RTOS Features
-#
-# CONFIG_BOARD_INITIALIZE is not set
-CONFIG_USEC_PER_TICK=1000
-# CONFIG_SYSTEM_TIME64 is not set
-CONFIG_RR_INTERVAL=0
-# CONFIG_SCHED_CPULOAD is not set
-# CONFIG_SCHED_INSTRUMENTATION is not set
-CONFIG_TASK_NAME_SIZE=31
-# CONFIG_SCHED_HAVE_PARENT is not set
-# CONFIG_JULIAN_TIME is not set
-CONFIG_START_YEAR=2007
-CONFIG_START_MONTH=2
-CONFIG_START_DAY=27
-CONFIG_DEV_CONSOLE=y
-# CONFIG_MUTEX_TYPES is not set
-# CONFIG_PRIORITY_INHERITANCE is not set
-# CONFIG_FDCLONE_DISABLE is not set
-# CONFIG_FDCLONE_STDIO is not set
-CONFIG_SDCLONE_DISABLE=y
-# CONFIG_SCHED_WAITPID is not set
-# CONFIG_SCHED_STARTHOOK is not set
-# CONFIG_SCHED_ATEXIT is not set
-# CONFIG_SCHED_ONEXIT is not set
-CONFIG_USER_ENTRYPOINT="rgmp_main"
-CONFIG_DISABLE_OS_API=y
-# CONFIG_DISABLE_POSIX_TIMERS is not set
-# CONFIG_DISABLE_PTHREAD is not set
-# CONFIG_DISABLE_SIGNALS is not set
-# CONFIG_DISABLE_MQUEUE is not set
-# CONFIG_DISABLE_ENVIRON is not set
-
-#
-# Signal Numbers
-#
-CONFIG_SIG_SIGUSR1=1
-CONFIG_SIG_SIGUSR2=2
-CONFIG_SIG_SIGALARM=3
-CONFIG_SIG_SIGCONDTIMEDOUT=16
-
-#
-# Sizes of configurable things (0 disables)
-#
-CONFIG_MAX_TASKS=64
-CONFIG_NPTHREAD_KEYS=4
-CONFIG_NFILE_DESCRIPTORS=32
-CONFIG_NFILE_STREAMS=16
-CONFIG_NAME_MAX=32
-CONFIG_PREALLOC_MQ_MSGS=32
-CONFIG_MQ_MAXMSGSIZE=32
-CONFIG_MAX_WDOGPARMS=4
-CONFIG_PREALLOC_WDOGS=32
-CONFIG_WDOG_INTRESERVE=4
-CONFIG_PREALLOC_TIMERS=8
-
-#
-# Stack and heap information
-#
-CONFIG_IDLETHREAD_STACKSIZE=4096
-CONFIG_USERMAIN_STACKSIZE=4096
-CONFIG_PTHREAD_STACK_MIN=256
-CONFIG_PTHREAD_STACK_DEFAULT=8192
-
-#
-# Device Drivers
-#
-CONFIG_DISABLE_POLL=y
-CONFIG_DEV_NULL=y
-# CONFIG_DEV_ZERO is not set
-# CONFIG_DEV_LOOP is not set
-# CONFIG_RAMDISK is not set
-# CONFIG_CAN is not set
-# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
-# CONFIG_PWM is not set
-# CONFIG_ARCH_HAVE_I2CRESET is not set
-# CONFIG_I2C is not set
-# CONFIG_SPI is not set
-# CONFIG_I2S is not set
-# CONFIG_RTC is not set
-# CONFIG_WATCHDOG is not set
-# CONFIG_ANALOG is not set
-# CONFIG_AUDIO_DEVICES is not set
-# CONFIG_VIDEO_DEVICES is not set
-# CONFIG_BCH is not set
-# CONFIG_INPUT is not set
-# CONFIG_LCD is not set
-# CONFIG_MMCSD is not set
-# CONFIG_MTD is not set
-CONFIG_NETDEVICES=y
-
-#
-# General Ethernet MAC Driver Options
-#
-# CONFIG_NETDEV_MULTINIC is not set
-
-#
-# External Ethernet MAC Device Support
-#
-# CONFIG_NET_DM90x0 is not set
-# CONFIG_ENC28J60 is not set
-# CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
-# CONFIG_NET_SLIP is not set
-CONFIG_NET_VNET=y
-CONFIG_VNET_NINTERFACES=1
-# CONFIG_PIPES is not set
-# CONFIG_PM is not set
-# CONFIG_POWER is not set
-# CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
-CONFIG_SERIAL=y
-# CONFIG_DEV_LOWCONSOLE is not set
-# CONFIG_16550_UART is not set
-# CONFIG_UART_SERIALDRIVER is not set
-# CONFIG_UART0_SERIALDRIVER is not set
-# CONFIG_UART1_SERIALDRIVER is not set
-# CONFIG_UART2_SERIALDRIVER is not set
-# CONFIG_UART3_SERIALDRIVER is not set
-# CONFIG_UART4_SERIALDRIVER is not set
-# CONFIG_UART5_SERIALDRIVER is not set
-# CONFIG_UART6_SERIALDRIVER is not set
-# CONFIG_UART7_SERIALDRIVER is not set
-# CONFIG_UART8_SERIALDRIVER is not set
-# CONFIG_SCI0_SERIALDRIVER is not set
-# CONFIG_SCI1_SERIALDRIVER is not set
-# CONFIG_USART0_SERIALDRIVER is not set
-# CONFIG_USART1_SERIALDRIVER is not set
-# CONFIG_USART2_SERIALDRIVER is not set
-# CONFIG_USART3_SERIALDRIVER is not set
-# CONFIG_USART4_SERIALDRIVER is not set
-# CONFIG_USART5_SERIALDRIVER is not set
-# CONFIG_USART6_SERIALDRIVER is not set
-# CONFIG_USART7_SERIALDRIVER is not set
-# CONFIG_USART8_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
-# CONFIG_MCU_SERIAL is not set
-# CONFIG_STANDARD_SERIAL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
-# CONFIG_USBDEV is not set
-# CONFIG_USBHOST is not set
-# CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
-
-#
-# System Logging
-#
-# CONFIG_RAMLOG is not set
-
-#
-# Networking Support
-#
-CONFIG_ARCH_HAVE_NET=y
-# CONFIG_ARCH_HAVE_PHY is not set
-CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
-CONFIG_NET_IPv4=y
-# CONFIG_NET_MULTIBUFFER is not set
-# CONFIG_NET_PROMISCUOUS is not set
-CONFIG_NSOCKET_DESCRIPTORS=5
-CONFIG_NET_NACTIVESOCKETS=16
-CONFIG_NET_SOCKOPTS=y
-# CONFIG_NET_SOLINGER is not set
-CONFIG_NET_ETH_MTU=1514
-# CONFIG_NET_TCPURGDATA is not set
-
-#
-# TCP/IP Networking
-#
-CONFIG_NET_TCP=y
-CONFIG_NET_TCP_CONNS=40
-CONFIG_NET_MAX_LISTENPORTS=40
-CONFIG_NET_TCP_READAHEAD=y
-# CONFIG_NET_TCP_WRITE_BUFFERS is not set
-CONFIG_NET_TCP_RECVDELAY=0
-# CONFIG_NET_TCPBACKLOG is not set
-# CONFIG_NET_TCP_SPLIT is not set
-# CONFIG_NET_SENDFILE is not set
-
-#
-# UDP Networking
-#
-CONFIG_NET_UDP=y
-CONFIG_NET_UDP_CHECKSUMS=y
-CONFIG_NET_UDP_CONNS=8
-# CONFIG_NET_BROADCAST is not set
-# CONFIG_NET_RXAVAIL is not set
-CONFIG_NET_ICMP=y
-CONFIG_NET_ICMP_PING=y
-# CONFIG_NET_IGMP is not set
-CONFIG_NET_STATISTICS=y
-CONFIG_NET_ETH_TCP_RECVWNDO=1460
-CONFIG_NET_ARPTAB_SIZE=16
-# CONFIG_NET_ARP_IPIN is not set
-CONFIG_NET_IOB=y
-CONFIG_IOB_NBUFFERS=24
-CONFIG_IOB_BUFSIZE=196
-CONFIG_IOB_NCHAINS=8
-CONFIG_IOB_THROTTLE=0
-
-#
-# Routing Table Configuration
-#
-# CONFIG_NET_ROUTE is not set
-CONFIG_NET_ETHERNET=y
-
-#
-# File Systems
-#
-
-#
-# File system configuration
-#
-# CONFIG_DISABLE_MOUNTPOINT is not set
-# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
-# CONFIG_FS_READABLE is not set
-# CONFIG_FS_WRITABLE is not set
-# CONFIG_FS_RAMMAP is not set
-# CONFIG_FS_FAT is not set
-# CONFIG_NFS is not set
-# CONFIG_FS_NXFFS is not set
-# CONFIG_FS_ROMFS is not set
-# CONFIG_FS_SMARTFS is not set
-# CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
-
-#
-# Graphics Support
-#
-# CONFIG_NX is not set
-
-#
-# Memory Management
-#
-# CONFIG_MM_SMALL is not set
-CONFIG_MM_REGIONS=1
-# CONFIG_ARCH_HAVE_HEAP2 is not set
-# CONFIG_GRAN is not set
-
-#
-# Audio Support
-#
-# CONFIG_AUDIO is not set
-
-#
-# Binary Formats
-#
-# CONFIG_BINFMT_DISABLE is not set
-# CONFIG_BINFMT_EXEPATH is not set
-# CONFIG_NXFLAT is not set
-# CONFIG_ELF is not set
-# CONFIG_BUILTIN is not set
-# CONFIG_PIC is not set
-# CONFIG_SYMTAB_ORDEREDBYNAME is not set
-
-#
-# Library Routines
-#
-
-#
-# Standard C Library Options
-#
-CONFIG_STDIO_BUFFER_SIZE=64
-CONFIG_STDIO_LINEBUFFER=y
-CONFIG_NUNGET_CHARS=2
-CONFIG_LIB_HOMEDIR="/"
-# CONFIG_NOPRINTF_FIELDWIDTH is not set
-# CONFIG_LIBC_FLOATINGPOINT is not set
-CONFIG_LIBC_LONG_LONG=y
-CONFIG_LIB_RAND_ORDER=1
-# CONFIG_EOL_IS_CR is not set
-# CONFIG_EOL_IS_LF is not set
-# CONFIG_EOL_IS_BOTH_CRLF is not set
-CONFIG_EOL_IS_EITHER_CRLF=y
-# CONFIG_LIBC_EXECFUNCS is not set
-CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
-CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
-# CONFIG_LIBC_STRERROR is not set
-# CONFIG_LIBC_PERROR_STDOUT is not set
-CONFIG_ARCH_LOWPUTC=y
-CONFIG_LIB_SENDFILE_BUFSIZE=512
-# CONFIG_ARCH_ROMGETC is not set
-CONFIG_ARCH_OPTIMIZED_FUNCTIONS=y
-CONFIG_ARCH_MEMCPY=y
-CONFIG_ARCH_MEMCMP=y
-CONFIG_ARCH_MEMMOVE=y
-CONFIG_ARCH_MEMSET=y
-# CONFIG_ARCH_STRCHR is not set
-CONFIG_ARCH_STRCMP=y
-CONFIG_ARCH_STRCPY=y
-CONFIG_ARCH_STRNCPY=y
-CONFIG_ARCH_STRLEN=y
-CONFIG_ARCH_STRNLEN=y
-# CONFIG_ARCH_BZERO is not set
-
-#
-# Non-standard Library Support
-#
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_LIB_KBDCODEC is not set
-# CONFIG_LIB_SLCDCODEC is not set
-
-#
-# Basic CXX Support
-#
-# CONFIG_C99_BOOL8 is not set
-# CONFIG_HAVE_CXX is not set
-
-#
-# Application Configuration
-#
-
-#
-# Built-In Applications
-#
-
-#
-# Examples
-#
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
-# CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_DHCPD is not set
-# CONFIG_EXAMPLES_ELF is not set
-# CONFIG_EXAMPLES_FTPC is not set
-# CONFIG_EXAMPLES_FTPD is not set
-# CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
-# CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
-# CONFIG_EXAMPLES_IGMP is not set
-# CONFIG_EXAMPLES_LCDRW is not set
-# CONFIG_EXAMPLES_MM is not set
-# CONFIG_EXAMPLES_MODBUS is not set
-# CONFIG_EXAMPLES_MOUNT is not set
-# CONFIG_EXAMPLES_NETTEST is not set
-# CONFIG_EXAMPLES_NRF24L01TERM is not set
-# CONFIG_EXAMPLES_NSH is not set
-# CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
-# CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
-# CONFIG_EXAMPLES_NXHELLO is not set
-# CONFIG_EXAMPLES_NXIMAGE is not set
-# CONFIG_EXAMPLES_NXLINES is not set
-# CONFIG_EXAMPLES_NXTEXT is not set
-# CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PASHELLO is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-CONFIG_EXAMPLES_RGMP=y
-# CONFIG_EXAMPLES_ROMFS is not set
-# CONFIG_EXAMPLES_SENDMAIL is not set
-# CONFIG_EXAMPLES_SERLOOP is not set
-# CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART is not set
-# CONFIG_EXAMPLES_TCPECHO is not set
-# CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
-# CONFIG_EXAMPLES_TIFF is not set
-# CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
-# CONFIG_EXAMPLES_USBTERM is not set
-# CONFIG_EXAMPLES_WATCHDOG is not set
-# CONFIG_EXAMPLES_WGET is not set
-
-#
-# Graphics Support
-#
-# CONFIG_TIFF is not set
-
-#
-# Interpreters
-#
-# CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
-
-#
-# Network Utilities
-#
-
-#
-# Networking Utilities
-#
-# CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
-# CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
-# CONFIG_NETUTILS_JSON is not set
-# CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TELNETD is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
-# CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_DISCOVER is not set
-# CONFIG_NETUTILS_XMLRPC is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
-#
-# NSH Library
-#
-# CONFIG_NSH_LIBRARY is not set
-
-#
-# NxWidgets/NxWM
-#
-
-#
-# Platform-specific Support
-#
-# CONFIG_PLATFORM_CONFIGDATA is not set
-
-#
-# System Libraries and NSH Add-Ons
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# FLASH Program Installation
-#
-# CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
-# CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
-# CONFIG_SYSTEM_READLINE is not set
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sysinfo
-#
-
-#
-# USB Monitor
-#
-
-#
-# EMACS-like Command Line Editor
-#
-# CONFIG_SYSTEM_CLE is not set
-
-#
-# VI Work-Alike Editor
-#
-# CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# Zmodem Commands
-#
-# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/rgmp/arm/default/setenv.sh b/configs/rgmp/arm/default/setenv.sh
deleted file mode 100755
index bfb02549bd4817af97a105e83286aff6683c57af..0000000000000000000000000000000000000000
--- a/configs/rgmp/arm/default/setenv.sh
+++ /dev/null
@@ -1,47 +0,0 @@
-#!/bin/bash
-# config/rgmp/default/setenv.sh
-#
-#   Copyright (C) 2011 Yu Qiang. All rights reserved.
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
-#   Authors: Yu Qiang 
-#            Gregory Nutt 
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name NuttX nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-
-if [ "$(basename $0)" = "setenv.sh" ] ; then
-  echo "You must source this script, not run it!" 1>&2
-  exit 1
-fi
-
-if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi
-
-#export NUTTX_BIN=
-#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG}
-
-echo "PATH : ${PATH}"
diff --git a/configs/rgmp/arm/nsh/defconfig b/configs/rgmp/arm/nsh/defconfig
deleted file mode 100644
index 1d9e1737409bfa7169c4c06af4f2c371735b3546..0000000000000000000000000000000000000000
--- a/configs/rgmp/arm/nsh/defconfig
+++ /dev/null
@@ -1,770 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# Nuttx/ Configuration
-#
-
-#
-# Build Setup
-#
-# CONFIG_EXPERIMENTAL is not set
-# CONFIG_DEFAULT_SMALL is not set
-CONFIG_HOST_LINUX=y
-# CONFIG_HOST_OSX is not set
-# CONFIG_HOST_WINDOWS is not set
-# CONFIG_HOST_OTHER is not set
-
-#
-# Build Configuration
-#
-# CONFIG_APPS_DIR="../apps"
-# CONFIG_BUILD_2PASS is not set
-
-#
-# Binary Output Formats
-#
-# CONFIG_RRLOAD_BINARY is not set
-# CONFIG_INTELHEX_BINARY is not set
-# CONFIG_MOTOROLA_SREC is not set
-# CONFIG_RAW_BINARY is not set
-
-#
-# Customize Header Files
-#
-CONFIG_ARCH_STDINT_H=y
-CONFIG_ARCH_STDBOOL_H=y
-CONFIG_ARCH_MATH_H=y
-# CONFIG_ARCH_FLOAT_H is not set
-# CONFIG_ARCH_STDARG_H is not set
-
-#
-# Debug Options
-#
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_STACKCHECK is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-# CONFIG_DEBUG_NET is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
-# CONFIG_DEBUG_AUDIO is not set
-CONFIG_DEBUG_SYMBOLS=y
-# CONFIG_ARCH_HAVE_CUSTOMOPT is not set
-CONFIG_DEBUG_NOOPT=y
-# CONFIG_DEBUG_FULLOPT is not set
-
-#
-# System Type
-#
-# CONFIG_ARCH_ARM is not set
-# CONFIG_ARCH_AVR is not set
-# CONFIG_ARCH_HC is not set
-# CONFIG_ARCH_MIPS is not set
-CONFIG_ARCH_RGMP=y
-# CONFIG_ARCH_SH is not set
-# CONFIG_ARCH_SIM is not set
-# CONFIG_ARCH_X86 is not set
-# CONFIG_ARCH_Z16 is not set
-# CONFIG_ARCH_Z80 is not set
-CONFIG_ARCH="rgmp"
-
-#
-# RGMP Configuration Options
-#
-CONFIG_RGMP_SUBARCH_ARM=y
-# CONFIG_RGMP_SUBARCH_X86 is not set
-CONFIG_RGMP_SUBARCH="arm"
-
-#
-# Architecture Options
-#
-# CONFIG_ARCH_NOINTC is not set
-# CONFIG_ARCH_VECNOTIRQ is not set
-# CONFIG_ARCH_DMA is not set
-# CONFIG_ARCH_HAVE_IRQPRIO is not set
-# CONFIG_ARCH_ADDRENV is not set
-# CONFIG_ARCH_HAVE_VFORK is not set
-# CONFIG_ARCH_HAVE_MMU is not set
-# CONFIG_ARCH_NAND_HWECC is not set
-# CONFIG_ARCH_STACKDUMP is not set
-# CONFIG_ENDIAN_BIG is not set
-# CONFIG_ARCH_IDLE_CUSTOM is not set
-# CONFIG_ARCH_HAVE_RAMFUNCS is not set
-# CONFIG_ARCH_HAVE_RAMVECTORS is not set
-
-#
-# Board Settings
-#
-CONFIG_BOARD_LOOPSPERMSEC=5000
-# CONFIG_ARCH_CALIBRATION is not set
-
-#
-# Interrupt options
-#
-# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set
-# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set
-
-#
-# Boot options
-#
-# CONFIG_BOOT_RUNFROMEXTSRAM is not set
-CONFIG_BOOT_RUNFROMFLASH=y
-# CONFIG_BOOT_RUNFROMISRAM is not set
-# CONFIG_BOOT_RUNFROMSDRAM is not set
-# CONFIG_BOOT_COPYTORAM is not set
-
-#
-# Boot Memory Configuration
-#
-CONFIG_RAM_START=0x0
-CONFIG_RAM_SIZE=0
-# CONFIG_ARCH_HAVE_SDRAM is not set
-
-#
-# Board Selection
-#
-CONFIG_ARCH_BOARD_RGMP=y
-# CONFIG_ARCH_BOARD_CUSTOM is not set
-CONFIG_ARCH_BOARD="rgmp"
-
-#
-# Common Board Options
-#
-CONFIG_NSH_MMCSDMINOR=0
-
-#
-# Board-Specific Options
-#
-
-#
-# RTOS Features
-#
-# CONFIG_BOARD_INITIALIZE is not set
-CONFIG_USEC_PER_TICK=1000
-# CONFIG_SYSTEM_TIME64 is not set
-CONFIG_RR_INTERVAL=0
-# CONFIG_SCHED_CPULOAD is not set
-# CONFIG_SCHED_INSTRUMENTATION is not set
-CONFIG_TASK_NAME_SIZE=31
-# CONFIG_SCHED_HAVE_PARENT is not set
-# CONFIG_JULIAN_TIME is not set
-CONFIG_START_YEAR=2007
-CONFIG_START_MONTH=2
-CONFIG_START_DAY=27
-CONFIG_DEV_CONSOLE=y
-# CONFIG_MUTEX_TYPES is not set
-# CONFIG_PRIORITY_INHERITANCE is not set
-# CONFIG_FDCLONE_DISABLE is not set
-# CONFIG_FDCLONE_STDIO is not set
-CONFIG_SDCLONE_DISABLE=y
-# CONFIG_SCHED_WAITPID is not set
-# CONFIG_SCHED_STARTHOOK is not set
-# CONFIG_SCHED_ATEXIT is not set
-# CONFIG_SCHED_ONEXIT is not set
-CONFIG_USER_ENTRYPOINT="nsh_main"
-CONFIG_DISABLE_OS_API=y
-# CONFIG_DISABLE_POSIX_TIMERS is not set
-# CONFIG_DISABLE_PTHREAD is not set
-# CONFIG_DISABLE_SIGNALS is not set
-# CONFIG_DISABLE_MQUEUE is not set
-# CONFIG_DISABLE_ENVIRON is not set
-
-#
-# Signal Numbers
-#
-CONFIG_SIG_SIGUSR1=1
-CONFIG_SIG_SIGUSR2=2
-CONFIG_SIG_SIGALARM=3
-CONFIG_SIG_SIGCONDTIMEDOUT=16
-
-#
-# Sizes of configurable things (0 disables)
-#
-CONFIG_MAX_TASKS=64
-CONFIG_NPTHREAD_KEYS=4
-CONFIG_NFILE_DESCRIPTORS=32
-CONFIG_NFILE_STREAMS=16
-CONFIG_NAME_MAX=32
-CONFIG_PREALLOC_MQ_MSGS=32
-CONFIG_MQ_MAXMSGSIZE=32
-CONFIG_MAX_WDOGPARMS=4
-CONFIG_PREALLOC_WDOGS=32
-CONFIG_WDOG_INTRESERVE=4
-CONFIG_PREALLOC_TIMERS=8
-
-#
-# Stack and heap information
-#
-CONFIG_IDLETHREAD_STACKSIZE=4096
-CONFIG_USERMAIN_STACKSIZE=4096
-CONFIG_PTHREAD_STACK_MIN=256
-CONFIG_PTHREAD_STACK_DEFAULT=8192
-
-#
-# Device Drivers
-#
-CONFIG_DISABLE_POLL=y
-CONFIG_DEV_NULL=y
-# CONFIG_DEV_ZERO is not set
-# CONFIG_DEV_LOOP is not set
-# CONFIG_RAMDISK is not set
-# CONFIG_CAN is not set
-# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
-# CONFIG_PWM is not set
-# CONFIG_ARCH_HAVE_I2CRESET is not set
-# CONFIG_I2C is not set
-# CONFIG_SPI is not set
-# CONFIG_I2S is not set
-# CONFIG_RTC is not set
-# CONFIG_WATCHDOG is not set
-# CONFIG_ANALOG is not set
-# CONFIG_AUDIO_DEVICES is not set
-# CONFIG_VIDEO_DEVICES is not set
-# CONFIG_BCH is not set
-# CONFIG_INPUT is not set
-# CONFIG_LCD is not set
-# CONFIG_MMCSD is not set
-# CONFIG_MTD is not set
-CONFIG_NETDEVICES=y
-
-#
-# General Ethernet MAC Driver Options
-#
-# CONFIG_NETDEV_MULTINIC is not set
-# CONFIG_NET_DUMPPACKET is not set
-
-#
-# External Ethernet MAC Device Support
-#
-# CONFIG_NET_DM90x0 is not set
-# CONFIG_ENC28J60 is not set
-# CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
-# CONFIG_NET_SLIP is not set
-CONFIG_NET_VNET=y
-CONFIG_VNET_NINTERFACES=1
-# CONFIG_PIPES is not set
-# CONFIG_PM is not set
-# CONFIG_POWER is not set
-# CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
-CONFIG_SERIAL=y
-# CONFIG_DEV_LOWCONSOLE is not set
-# CONFIG_16550_UART is not set
-# CONFIG_UART_SERIALDRIVER is not set
-# CONFIG_UART0_SERIALDRIVER is not set
-# CONFIG_UART1_SERIALDRIVER is not set
-# CONFIG_UART2_SERIALDRIVER is not set
-# CONFIG_UART3_SERIALDRIVER is not set
-# CONFIG_UART4_SERIALDRIVER is not set
-# CONFIG_UART5_SERIALDRIVER is not set
-# CONFIG_UART6_SERIALDRIVER is not set
-# CONFIG_UART7_SERIALDRIVER is not set
-# CONFIG_UART8_SERIALDRIVER is not set
-# CONFIG_SCI0_SERIALDRIVER is not set
-# CONFIG_SCI1_SERIALDRIVER is not set
-# CONFIG_USART0_SERIALDRIVER is not set
-# CONFIG_USART1_SERIALDRIVER is not set
-# CONFIG_USART2_SERIALDRIVER is not set
-# CONFIG_USART3_SERIALDRIVER is not set
-# CONFIG_USART4_SERIALDRIVER is not set
-# CONFIG_USART5_SERIALDRIVER is not set
-# CONFIG_USART6_SERIALDRIVER is not set
-# CONFIG_USART7_SERIALDRIVER is not set
-# CONFIG_USART8_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
-# CONFIG_MCU_SERIAL is not set
-# CONFIG_STANDARD_SERIAL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
-# CONFIG_USBDEV is not set
-# CONFIG_USBHOST is not set
-# CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
-
-#
-# System Logging
-#
-# CONFIG_RAMLOG is not set
-
-#
-# Networking Support
-#
-CONFIG_ARCH_HAVE_NET=y
-# CONFIG_ARCH_HAVE_PHY is not set
-CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
-CONFIG_NET_IPv4=y
-# CONFIG_NET_MULTIBUFFER is not set
-# CONFIG_NET_PROMISCUOUS is not set
-CONFIG_NSOCKET_DESCRIPTORS=5
-CONFIG_NET_NACTIVESOCKETS=16
-CONFIG_NET_SOCKOPTS=y
-# CONFIG_NET_SOLINGER is not set
-CONFIG_NET_ETH_MTU=1514
-# CONFIG_NET_TCPURGDATA is not set
-
-#
-# TCP/IP Networking
-#
-CONFIG_NET_TCP=y
-CONFIG_NET_TCP_CONNS=40
-CONFIG_NET_MAX_LISTENPORTS=40
-CONFIG_NET_TCP_READAHEAD=y
-# CONFIG_NET_TCP_WRITE_BUFFERS is not set
-CONFIG_NET_TCP_RECVDELAY=0
-# CONFIG_NET_TCPBACKLOG is not set
-# CONFIG_NET_TCP_SPLIT is not set
-# CONFIG_NET_SENDFILE is not set
-
-#
-# UDP Networking
-#
-CONFIG_NET_UDP=y
-CONFIG_NET_UDP_CHECKSUMS=y
-CONFIG_NET_UDP_CONNS=8
-CONFIG_NET_BROADCAST=y
-# CONFIG_NET_RXAVAIL is not set
-CONFIG_NET_ICMP=y
-CONFIG_NET_ICMP_PING=y
-# CONFIG_NET_IGMP is not set
-CONFIG_NET_STATISTICS=y
-CONFIG_NET_ETH_TCP_RECVWNDO=1460
-CONFIG_NET_ARPTAB_SIZE=8
-# CONFIG_NET_ARP_IPIN is not set
-CONFIG_NET_IOB=y
-CONFIG_IOB_NBUFFERS=24
-CONFIG_IOB_BUFSIZE=196
-CONFIG_IOB_NCHAINS=8
-CONFIG_IOB_THROTTLE=0
-
-#
-# Routing Table Configuration
-#
-# CONFIG_NET_ROUTE is not set
-CONFIG_NET_ETHERNET=y
-
-#
-# File Systems
-#
-
-#
-# File system configuration
-#
-# CONFIG_DISABLE_MOUNTPOINT is not set
-# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
-# CONFIG_FS_READABLE is not set
-# CONFIG_FS_WRITABLE is not set
-# CONFIG_FS_RAMMAP is not set
-# CONFIG_FS_FAT is not set
-# CONFIG_NFS is not set
-# CONFIG_FS_NXFFS is not set
-# CONFIG_FS_ROMFS is not set
-# CONFIG_FS_SMARTFS is not set
-# CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
-
-#
-# Graphics Support
-#
-# CONFIG_NX is not set
-
-#
-# Memory Management
-#
-# CONFIG_MM_SMALL is not set
-CONFIG_MM_REGIONS=1
-# CONFIG_ARCH_HAVE_HEAP2 is not set
-# CONFIG_GRAN is not set
-
-#
-# Audio Support
-#
-# CONFIG_AUDIO is not set
-
-#
-# Binary Formats
-#
-# CONFIG_BINFMT_DISABLE is not set
-# CONFIG_BINFMT_EXEPATH is not set
-# CONFIG_NXFLAT is not set
-# CONFIG_ELF is not set
-# CONFIG_BUILTIN is not set
-# CONFIG_PIC is not set
-# CONFIG_SYMTAB_ORDEREDBYNAME is not set
-
-#
-# Library Routines
-#
-
-#
-# Standard C Library Options
-#
-CONFIG_STDIO_BUFFER_SIZE=64
-CONFIG_STDIO_LINEBUFFER=y
-CONFIG_NUNGET_CHARS=2
-CONFIG_LIB_HOMEDIR="/"
-# CONFIG_NOPRINTF_FIELDWIDTH is not set
-# CONFIG_LIBC_FLOATINGPOINT is not set
-CONFIG_LIBC_LONG_LONG=y
-CONFIG_LIB_RAND_ORDER=1
-# CONFIG_EOL_IS_CR is not set
-# CONFIG_EOL_IS_LF is not set
-# CONFIG_EOL_IS_BOTH_CRLF is not set
-CONFIG_EOL_IS_EITHER_CRLF=y
-# CONFIG_LIBC_EXECFUNCS is not set
-CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
-CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
-# CONFIG_LIBC_STRERROR is not set
-# CONFIG_LIBC_PERROR_STDOUT is not set
-CONFIG_ARCH_LOWPUTC=y
-CONFIG_LIB_SENDFILE_BUFSIZE=512
-# CONFIG_ARCH_ROMGETC is not set
-CONFIG_ARCH_OPTIMIZED_FUNCTIONS=y
-CONFIG_ARCH_MEMCPY=y
-CONFIG_ARCH_MEMCMP=y
-CONFIG_ARCH_MEMMOVE=y
-CONFIG_ARCH_MEMSET=y
-# CONFIG_ARCH_STRCHR is not set
-CONFIG_ARCH_STRCMP=y
-CONFIG_ARCH_STRCPY=y
-CONFIG_ARCH_STRNCPY=y
-CONFIG_ARCH_STRLEN=y
-CONFIG_ARCH_STRNLEN=y
-# CONFIG_ARCH_BZERO is not set
-
-#
-# Non-standard Library Support
-#
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_LIB_KBDCODEC is not set
-# CONFIG_LIB_SLCDCODEC is not set
-
-#
-# Basic CXX Support
-#
-# CONFIG_C99_BOOL8 is not set
-# CONFIG_HAVE_CXX is not set
-
-#
-# Application Configuration
-#
-
-#
-# Built-In Applications
-#
-
-#
-# Examples
-#
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
-# CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_DHCPD is not set
-# CONFIG_EXAMPLES_ELF is not set
-# CONFIG_EXAMPLES_FTPC is not set
-# CONFIG_EXAMPLES_FTPD is not set
-# CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
-# CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
-# CONFIG_EXAMPLES_IGMP is not set
-# CONFIG_EXAMPLES_LCDRW is not set
-# CONFIG_EXAMPLES_MM is not set
-# CONFIG_EXAMPLES_MODBUS is not set
-# CONFIG_EXAMPLES_MOUNT is not set
-# CONFIG_EXAMPLES_NETTEST is not set
-# CONFIG_EXAMPLES_NRF24L01TERM is not set
-CONFIG_EXAMPLES_NSH=y
-# CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
-# CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
-# CONFIG_EXAMPLES_NXHELLO is not set
-# CONFIG_EXAMPLES_NXIMAGE is not set
-# CONFIG_EXAMPLES_NXLINES is not set
-# CONFIG_EXAMPLES_NXTEXT is not set
-# CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PASHELLO is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
-# CONFIG_EXAMPLES_SENDMAIL is not set
-# CONFIG_EXAMPLES_SERLOOP is not set
-# CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART is not set
-# CONFIG_EXAMPLES_TCPECHO is not set
-# CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
-# CONFIG_EXAMPLES_TIFF is not set
-# CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
-# CONFIG_EXAMPLES_USBTERM is not set
-# CONFIG_EXAMPLES_WATCHDOG is not set
-# CONFIG_EXAMPLES_WGET is not set
-
-#
-# Graphics Support
-#
-# CONFIG_TIFF is not set
-
-#
-# Interpreters
-#
-# CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
-
-#
-# Network Utilities
-#
-
-#
-# Networking Utilities
-#
-# CONFIG_NETUTILS_CODECS is not set
-CONFIG_NETUTILS_DHCPC=y
-# CONFIG_NETUTILS_DHCPD is not set
-# CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
-# CONFIG_NETUTILS_JSON is not set
-CONFIG_LIBC_NETDB=y
-CONFIG_NETDB_DNSCLIENT=y
-CONFIG_NETDB_DNSCLIENT_ENTRIES=4
-CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
-# CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TELNETD is not set
-CONFIG_NETUTILS_TFTPC=y
-# CONFIG_NETUTILS_THTTPD is not set
-CONFIG_NETUTILS_NETLIB=y
-CONFIG_NETUTILS_WEBCLIENT=y
-CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
-# CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_DISCOVER is not set
-# CONFIG_NETUTILS_XMLRPC is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
-#
-# NSH Library
-#
-CONFIG_NSH_LIBRARY=y
-CONFIG_NSH_READLINE=y
-# CONFIG_NSH_CLE is not set
-
-#
-# Disable Individual commands
-#
-# CONFIG_NSH_DISABLE_ADDROUTE is not set
-# CONFIG_NSH_DISABLE_CAT is not set
-# CONFIG_NSH_DISABLE_CD is not set
-# CONFIG_NSH_DISABLE_CP is not set
-# CONFIG_NSH_DISABLE_CMP is not set
-# CONFIG_NSH_DISABLE_DD is not set
-# CONFIG_NSH_DISABLE_DF is not set
-# CONFIG_NSH_DISABLE_DELROUTE is not set
-# CONFIG_NSH_DISABLE_ECHO is not set
-# CONFIG_NSH_DISABLE_EXEC is not set
-# CONFIG_NSH_DISABLE_EXIT is not set
-# CONFIG_NSH_DISABLE_FREE is not set
-# CONFIG_NSH_DISABLE_GET is not set
-# CONFIG_NSH_DISABLE_HELP is not set
-# CONFIG_NSH_DISABLE_HEXDUMP is not set
-# CONFIG_NSH_DISABLE_IFCONFIG is not set
-# CONFIG_NSH_DISABLE_KILL is not set
-# CONFIG_NSH_DISABLE_LOSETUP is not set
-# CONFIG_NSH_DISABLE_LS is not set
-# CONFIG_NSH_DISABLE_MB is not set
-# CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
-# CONFIG_NSH_DISABLE_MKRD is not set
-# CONFIG_NSH_DISABLE_MH is not set
-# CONFIG_NSH_DISABLE_MOUNT is not set
-# CONFIG_NSH_DISABLE_MW is not set
-# CONFIG_NSH_DISABLE_PS is not set
-# CONFIG_NSH_DISABLE_PING is not set
-# CONFIG_NSH_DISABLE_PUT is not set
-# CONFIG_NSH_DISABLE_PWD is not set
-# CONFIG_NSH_DISABLE_RM is not set
-# CONFIG_NSH_DISABLE_RMDIR is not set
-# CONFIG_NSH_DISABLE_SET is not set
-# CONFIG_NSH_DISABLE_SH is not set
-# CONFIG_NSH_DISABLE_SLEEP is not set
-# CONFIG_NSH_DISABLE_TEST is not set
-# CONFIG_NSH_DISABLE_UMOUNT is not set
-# CONFIG_NSH_DISABLE_UNSET is not set
-# CONFIG_NSH_DISABLE_USLEEP is not set
-# CONFIG_NSH_DISABLE_WGET is not set
-# CONFIG_NSH_DISABLE_XD is not set
-
-#
-# Configure Command Options
-#
-CONFIG_NSH_CMDOPT_DF_H=y
-CONFIG_NSH_CODECS_BUFSIZE=128
-CONFIG_NSH_CMDOPT_HEXDUMP=y
-CONFIG_NSH_FILEIOSIZE=1024
-CONFIG_NSH_LINELEN=40
-# CONFIG_NSH_DISABLE_SEMICOLON is not set
-CONFIG_NSH_CMDPARMS=y
-CONFIG_NSH_TMPDIR="/tmp"
-CONFIG_NSH_MAXARGUMENTS=6
-CONFIG_NSH_ARGCAT=y
-CONFIG_NSH_NESTDEPTH=3
-# CONFIG_NSH_DISABLESCRIPT is not set
-# CONFIG_NSH_DISABLE_ITEF is not set
-# CONFIG_NSH_DISABLE_LOOPS is not set
-# CONFIG_NSH_DISABLEBG is not set
-CONFIG_NSH_CONSOLE=y
-
-#
-# USB Trace Support
-#
-# CONFIG_NSH_ALTCONDEV is not set
-# CONFIG_NSH_ARCHINIT is not set
-# CONFIG_NSH_DHCPC is not set
-CONFIG_NSH_IPADDR=0xc0a80a02
-CONFIG_NSH_DRIPADDR=0xc0a80a01
-CONFIG_NSH_NETMASK=0xffffff00
-# CONFIG_NSH_DNS is not set
-# CONFIG_NSH_NOMAC is not set
-CONFIG_NSH_MAX_ROUNDTRIP=20
-
-#
-# NxWidgets/NxWM
-#
-
-#
-# Platform-specific Support
-#
-# CONFIG_PLATFORM_CONFIGDATA is not set
-
-#
-# System Libraries and NSH Add-Ons
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# FLASH Program Installation
-#
-# CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
-# CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
-CONFIG_SYSTEM_READLINE=y
-CONFIG_READLINE_ECHO=y
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sysinfo
-#
-
-#
-# USB Monitor
-#
-
-#
-# EMACS-like Command Line Editor
-#
-# CONFIG_SYSTEM_CLE is not set
-
-#
-# VI Work-Alike Editor
-#
-# CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# Zmodem Commands
-#
-# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/rgmp/include/stdarg.h b/configs/rgmp/include/stdarg.h
deleted file mode 100644
index b748243d155f26e4e54ab596a82d6a5c07898b9d..0000000000000000000000000000000000000000
--- a/configs/rgmp/include/stdarg.h
+++ /dev/null
@@ -1,8 +0,0 @@
-#ifndef _CONFIG_RGMP_STDARG_H
-#define	_CONFIG_RGMP_STDARG_H
-
-
-#include 
-
-
-#endif
diff --git a/configs/rgmp/x86/cxxtest/Make.defs b/configs/rgmp/x86/cxxtest/Make.defs
deleted file mode 100644
index 1070975f21321cf90880f1efad0efc15def2ffc5..0000000000000000000000000000000000000000
--- a/configs/rgmp/x86/cxxtest/Make.defs
+++ /dev/null
@@ -1,107 +0,0 @@
-####################################################################################
-# configs/rgmp/default/Make.defs
-#
-#   Copyright (C) 2011 Yu Qiang. All rights reserved.
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
-#   Authors: Yu Qiang 
-#            Gregory Nutt 
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name NuttX nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-############################################################################
-
-include ${TOPDIR}/.config
-include ${TOPDIR}/tools/Config.mk
-
-RGMPLIBDIR := $(RGMP_INST_DIR)/lib
-RGMPINCDIR := $(RGMP_INST_DIR)/include
-RGMPLKSCPT := $(RGMP_INST_DIR)/etc/rgmp.ld
-
-HOSTOS			= ${shell uname -o}
-
-ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
-  ARCHOPTIMIZATION	= -O2 -gstabs
-else
-  ARCHOPTIMIZATION	= -O2
-endif
-
-#ARCHCXXFLAGS   = -fno-builtin -fno-exceptions -fno-rtti
-ARCHCXXFLAGS    = -fno-builtin
-ARCHCPUFLAGS    = -fno-builtin -nostdinc -fno-stack-protector
-ARCHPICFLAGS    = -fpic
-ARCHWARNINGS    = -Wall -Wstrict-prototypes -Wshadow -Wundef
-ARCHWARNINGSXX  = -Wall -Wshadow -Wundef
-ARCHDEFINES	    = -D__RGMP_KERNEL__ -D__RTOS_KERNEL__ -D__SHARE_KERNEL__
-ARCHINCLUDES    = -I. -isystem $(TOPDIR)/include -I$(RGMPINCDIR) \
-                  -I$(TOPDIR)/configs/rgmp/include -I$(TOPDIR)/arch/rgmp/include/x86
-
-ARCHXXDEFINES   =
-ARCHXXINCLUDES  = -I$(TOPDIR)/include/cxx -isystem $(TOPDIR)/include -I$(RGMPINCDIR) \
-                  -I$(TOPDIR)/configs/rgmp/include -I$(TOPDIR)/arch/rgmp/include/x86 \
-                  -I$(TOPDIR)/include/uClibc++
-
-CROSSDEV    =
-CC			= $(CROSSDEV)gcc
-CXX         = $(CROSSDEV)g++
-CPP			= $(CROSSDEV)gcc -E
-LD			= $(CROSSDEV)ld
-AR			= $(CROSSDEV)ar rcs
-NM			= $(CROSSDEV)nm
-OBJCOPY	    = $(CROSSDEV)objcopy
-OBJDUMP	    = $(CROSSDEV)objdump
-
-CFLAGS		= $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \
-			  $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) -pipe
-CPPFLAGS	= $(ARCHINCLUDES) $(ARCHDEFINES)
-CXXFLAGS    = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) \
-              $(ARCHXXDEFINES) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)      \
-              -pipe -nodefaultlibs -nostdinc++
-CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
-AFLAGS		= $(CFLAGS) -D__ASSEMBLY__
-
-ASMEXT			= .S
-OBJEXT			= .o
-LIBEXT			= .a
-
-ifeq ($(HOSTOS),Cygwin)
-  EXEEXT		= .exe
-else
-  EXEEXT		=
-endif
-
-LDFLAGS         += -nostdlib
-EXTRA_LIBS		= $(shell $(CC) -print-file-name=libsupc++.a) \
-                  $(shell $(CC) -print-file-name=libgcc_eh.a)
-
-MKDEP			= $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
-
-HOSTCC			= gcc
-HOSTINCLUDES	= -I.
-HOSTCFLAGS		= $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \
-                  $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) -pipe
-HOSTLDFLAGS		=
diff --git a/configs/rgmp/x86/cxxtest/defconfig b/configs/rgmp/x86/cxxtest/defconfig
deleted file mode 100644
index 40ff45293e5183d55a4622736c551f0894bb680a..0000000000000000000000000000000000000000
--- a/configs/rgmp/x86/cxxtest/defconfig
+++ /dev/null
@@ -1,702 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# Nuttx/ Configuration
-#
-
-#
-# Build Setup
-#
-# CONFIG_EXPERIMENTAL is not set
-# CONFIG_DEFAULT_SMALL is not set
-CONFIG_HOST_LINUX=y
-# CONFIG_HOST_OSX is not set
-# CONFIG_HOST_WINDOWS is not set
-# CONFIG_HOST_OTHER is not set
-
-#
-# Build Configuration
-#
-# CONFIG_APPS_DIR="../apps"
-# CONFIG_BUILD_2PASS is not set
-
-#
-# Binary Output Formats
-#
-# CONFIG_RRLOAD_BINARY is not set
-# CONFIG_INTELHEX_BINARY is not set
-# CONFIG_MOTOROLA_SREC is not set
-# CONFIG_RAW_BINARY is not set
-
-#
-# Customize Header Files
-#
-CONFIG_ARCH_STDINT_H=y
-CONFIG_ARCH_STDBOOL_H=y
-CONFIG_ARCH_MATH_H=y
-# CONFIG_ARCH_FLOAT_H is not set
-# CONFIG_ARCH_STDARG_H is not set
-
-#
-# Debug Options
-#
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_STACKCHECK is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-CONFIG_DEBUG_VERBOSE=y
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-# CONFIG_DEBUG_NET is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
-# CONFIG_DEBUG_AUDIO is not set
-CONFIG_DEBUG_SYMBOLS=y
-# CONFIG_ARCH_HAVE_CUSTOMOPT is not set
-CONFIG_DEBUG_NOOPT=y
-# CONFIG_DEBUG_FULLOPT is not set
-
-#
-# System Type
-#
-# CONFIG_ARCH_ARM is not set
-# CONFIG_ARCH_AVR is not set
-# CONFIG_ARCH_HC is not set
-# CONFIG_ARCH_MIPS is not set
-CONFIG_ARCH_RGMP=y
-# CONFIG_ARCH_SH is not set
-# CONFIG_ARCH_SIM is not set
-# CONFIG_ARCH_X86 is not set
-# CONFIG_ARCH_Z16 is not set
-# CONFIG_ARCH_Z80 is not set
-CONFIG_ARCH="rgmp"
-
-#
-# RGMP Configuration Options
-#
-# CONFIG_RGMP_SUBARCH_ARM is not set
-CONFIG_RGMP_SUBARCH_X86=y
-CONFIG_RGMP_SUBARCH="x86"
-
-#
-# x86 Peripheral Selections
-#
-CONFIG_COM1=y
-CONFIG_COM2=y
-# CONFIG_COM3 is not set
-# CONFIG_COM4 is not set
-
-#
-# Architecture Options
-#
-# CONFIG_ARCH_NOINTC is not set
-# CONFIG_ARCH_VECNOTIRQ is not set
-# CONFIG_ARCH_DMA is not set
-# CONFIG_ARCH_HAVE_IRQPRIO is not set
-# CONFIG_ARCH_ADDRENV is not set
-# CONFIG_ARCH_HAVE_VFORK is not set
-# CONFIG_ARCH_HAVE_MMU is not set
-# CONFIG_ARCH_NAND_HWECC is not set
-# CONFIG_ARCH_STACKDUMP is not set
-# CONFIG_ENDIAN_BIG is not set
-# CONFIG_ARCH_IDLE_CUSTOM is not set
-# CONFIG_ARCH_HAVE_RAMFUNCS is not set
-# CONFIG_ARCH_HAVE_RAMVECTORS is not set
-
-#
-# Board Settings
-#
-CONFIG_BOARD_LOOPSPERMSEC=5000
-# CONFIG_ARCH_CALIBRATION is not set
-
-#
-# Interrupt options
-#
-# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set
-# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set
-
-#
-# Boot options
-#
-# CONFIG_BOOT_RUNFROMEXTSRAM is not set
-CONFIG_BOOT_RUNFROMFLASH=y
-# CONFIG_BOOT_RUNFROMISRAM is not set
-# CONFIG_BOOT_RUNFROMSDRAM is not set
-# CONFIG_BOOT_COPYTORAM is not set
-
-#
-# Boot Memory Configuration
-#
-CONFIG_RAM_START=0x0
-CONFIG_RAM_SIZE=0
-# CONFIG_ARCH_HAVE_SDRAM is not set
-
-#
-# Board Selection
-#
-CONFIG_ARCH_BOARD_RGMP=y
-# CONFIG_ARCH_BOARD_CUSTOM is not set
-CONFIG_ARCH_BOARD="rgmp"
-
-#
-# Common Board Options
-#
-
-#
-# Board-Specific Options
-#
-
-#
-# RTOS Features
-#
-# CONFIG_BOARD_INITIALIZE is not set
-CONFIG_USEC_PER_TICK=1000
-# CONFIG_SYSTEM_TIME64 is not set
-CONFIG_RR_INTERVAL=0
-# CONFIG_SCHED_CPULOAD is not set
-# CONFIG_SCHED_INSTRUMENTATION is not set
-CONFIG_TASK_NAME_SIZE=31
-# CONFIG_SCHED_HAVE_PARENT is not set
-# CONFIG_JULIAN_TIME is not set
-CONFIG_START_YEAR=2007
-CONFIG_START_MONTH=2
-CONFIG_START_DAY=27
-CONFIG_DEV_CONSOLE=y
-# CONFIG_MUTEX_TYPES is not set
-# CONFIG_PRIORITY_INHERITANCE is not set
-# CONFIG_FDCLONE_DISABLE is not set
-# CONFIG_FDCLONE_STDIO is not set
-CONFIG_SDCLONE_DISABLE=y
-# CONFIG_SCHED_WAITPID is not set
-# CONFIG_SCHED_STARTHOOK is not set
-# CONFIG_SCHED_ATEXIT is not set
-# CONFIG_SCHED_ONEXIT is not set
-CONFIG_USER_ENTRYPOINT="cxxtest_main"
-CONFIG_DISABLE_OS_API=y
-# CONFIG_DISABLE_POSIX_TIMERS is not set
-# CONFIG_DISABLE_PTHREAD is not set
-# CONFIG_DISABLE_SIGNALS is not set
-# CONFIG_DISABLE_MQUEUE is not set
-# CONFIG_DISABLE_ENVIRON is not set
-
-#
-# Signal Numbers
-#
-CONFIG_SIG_SIGUSR1=1
-CONFIG_SIG_SIGUSR2=2
-CONFIG_SIG_SIGALARM=3
-CONFIG_SIG_SIGCONDTIMEDOUT=16
-
-#
-# Sizes of configurable things (0 disables)
-#
-CONFIG_MAX_TASKS=64
-CONFIG_NPTHREAD_KEYS=4
-CONFIG_NFILE_DESCRIPTORS=32
-CONFIG_NFILE_STREAMS=16
-CONFIG_NAME_MAX=32
-CONFIG_PREALLOC_MQ_MSGS=32
-CONFIG_MQ_MAXMSGSIZE=32
-CONFIG_MAX_WDOGPARMS=4
-CONFIG_PREALLOC_WDOGS=32
-CONFIG_WDOG_INTRESERVE=4
-CONFIG_PREALLOC_TIMERS=8
-
-#
-# Stack and heap information
-#
-CONFIG_IDLETHREAD_STACKSIZE=4096
-CONFIG_USERMAIN_STACKSIZE=4096
-CONFIG_PTHREAD_STACK_MIN=256
-CONFIG_PTHREAD_STACK_DEFAULT=8192
-
-#
-# Device Drivers
-#
-CONFIG_DISABLE_POLL=y
-CONFIG_DEV_NULL=y
-# CONFIG_DEV_ZERO is not set
-# CONFIG_DEV_LOOP is not set
-# CONFIG_RAMDISK is not set
-# CONFIG_CAN is not set
-# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
-# CONFIG_PWM is not set
-# CONFIG_ARCH_HAVE_I2CRESET is not set
-# CONFIG_I2C is not set
-# CONFIG_SPI is not set
-# CONFIG_I2S is not set
-# CONFIG_RTC is not set
-# CONFIG_WATCHDOG is not set
-# CONFIG_ANALOG is not set
-# CONFIG_AUDIO_DEVICES is not set
-# CONFIG_VIDEO_DEVICES is not set
-# CONFIG_BCH is not set
-# CONFIG_INPUT is not set
-# CONFIG_LCD is not set
-# CONFIG_MMCSD is not set
-# CONFIG_MTD is not set
-CONFIG_NETDEVICES=y
-
-#
-# General Ethernet MAC Driver Options
-#
-# CONFIG_NETDEV_MULTINIC is not set
-# CONFIG_NET_DUMPPACKET is not set
-
-#
-# External Ethernet MAC Device Support
-#
-# CONFIG_NET_DM90x0 is not set
-# CONFIG_ENC28J60 is not set
-# CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
-# CONFIG_NET_SLIP is not set
-CONFIG_NET_VNET=y
-CONFIG_VNET_NINTERFACES=1
-# CONFIG_PIPES is not set
-# CONFIG_PM is not set
-# CONFIG_POWER is not set
-# CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
-CONFIG_SERIAL=y
-# CONFIG_DEV_LOWCONSOLE is not set
-# CONFIG_16550_UART is not set
-# CONFIG_UART_SERIALDRIVER is not set
-# CONFIG_UART0_SERIALDRIVER is not set
-# CONFIG_UART1_SERIALDRIVER is not set
-# CONFIG_UART2_SERIALDRIVER is not set
-# CONFIG_UART3_SERIALDRIVER is not set
-# CONFIG_UART4_SERIALDRIVER is not set
-# CONFIG_UART5_SERIALDRIVER is not set
-# CONFIG_UART6_SERIALDRIVER is not set
-# CONFIG_UART7_SERIALDRIVER is not set
-# CONFIG_UART8_SERIALDRIVER is not set
-# CONFIG_SCI0_SERIALDRIVER is not set
-# CONFIG_SCI1_SERIALDRIVER is not set
-# CONFIG_USART0_SERIALDRIVER is not set
-# CONFIG_USART1_SERIALDRIVER is not set
-# CONFIG_USART2_SERIALDRIVER is not set
-# CONFIG_USART3_SERIALDRIVER is not set
-# CONFIG_USART4_SERIALDRIVER is not set
-# CONFIG_USART5_SERIALDRIVER is not set
-# CONFIG_USART6_SERIALDRIVER is not set
-# CONFIG_USART7_SERIALDRIVER is not set
-# CONFIG_USART8_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
-# CONFIG_MCU_SERIAL is not set
-# CONFIG_STANDARD_SERIAL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
-# CONFIG_USBDEV is not set
-# CONFIG_USBHOST is not set
-# CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
-
-#
-# System Logging
-#
-# CONFIG_RAMLOG is not set
-
-#
-# Networking Support
-#
-CONFIG_ARCH_HAVE_NET=y
-# CONFIG_ARCH_HAVE_PHY is not set
-CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
-CONFIG_NET_IPv4=y
-# CONFIG_NET_MULTIBUFFER is not set
-# CONFIG_NET_PROMISCUOUS is not set
-CONFIG_NSOCKET_DESCRIPTORS=5
-CONFIG_NET_NACTIVESOCKETS=16
-CONFIG_NET_SOCKOPTS=y
-# CONFIG_NET_SOLINGER is not set
-CONFIG_NET_ETH_MTU=1514
-# CONFIG_NET_TCPURGDATA is not set
-
-#
-# TCP/IP Networking
-#
-CONFIG_NET_TCP=y
-CONFIG_NET_TCP_CONNS=40
-CONFIG_NET_MAX_LISTENPORTS=40
-CONFIG_NET_TCP_READAHEAD=y
-# CONFIG_NET_TCP_WRITE_BUFFERS is not set
-CONFIG_NET_TCP_RECVDELAY=0
-# CONFIG_NET_TCPBACKLOG is not set
-# CONFIG_NET_TCP_SPLIT is not set
-# CONFIG_NET_SENDFILE is not set
-
-#
-# UDP Networking
-#
-CONFIG_NET_UDP=y
-CONFIG_NET_UDP_CHECKSUMS=y
-CONFIG_NET_UDP_CONNS=8
-# CONFIG_NET_BROADCAST is not set
-# CONFIG_NET_RXAVAIL is not set
-CONFIG_NET_ICMP=y
-CONFIG_NET_ICMP_PING=y
-# CONFIG_NET_IGMP is not set
-CONFIG_NET_STATISTICS=y
-CONFIG_NET_ETH_TCP_RECVWNDO=1460
-CONFIG_NET_ARPTAB_SIZE=16
-# CONFIG_NET_ARP_IPIN is not set
-CONFIG_NET_IOB=y
-CONFIG_IOB_NBUFFERS=24
-CONFIG_IOB_BUFSIZE=196
-CONFIG_IOB_NCHAINS=8
-CONFIG_IOB_THROTTLE=0
-
-#
-# Routing Table Configuration
-#
-# CONFIG_NET_ROUTE is not set
-CONFIG_NET_ETHERNET=y
-
-#
-# File Systems
-#
-
-#
-# File system configuration
-#
-# CONFIG_DISABLE_MOUNTPOINT is not set
-# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
-# CONFIG_FS_READABLE is not set
-# CONFIG_FS_WRITABLE is not set
-# CONFIG_FS_RAMMAP is not set
-# CONFIG_FS_FAT is not set
-# CONFIG_NFS is not set
-# CONFIG_FS_NXFFS is not set
-# CONFIG_FS_ROMFS is not set
-# CONFIG_FS_SMARTFS is not set
-# CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
-
-#
-# Graphics Support
-#
-# CONFIG_NX is not set
-
-#
-# Memory Management
-#
-# CONFIG_MM_SMALL is not set
-CONFIG_MM_REGIONS=1
-# CONFIG_ARCH_HAVE_HEAP2 is not set
-# CONFIG_GRAN is not set
-
-#
-# Audio Support
-#
-# CONFIG_AUDIO is not set
-
-#
-# Binary Formats
-#
-# CONFIG_BINFMT_DISABLE is not set
-# CONFIG_BINFMT_EXEPATH is not set
-# CONFIG_NXFLAT is not set
-# CONFIG_ELF is not set
-# CONFIG_BUILTIN is not set
-# CONFIG_PIC is not set
-# CONFIG_SYMTAB_ORDEREDBYNAME is not set
-
-#
-# Library Routines
-#
-
-#
-# Standard C Library Options
-#
-CONFIG_STDIO_BUFFER_SIZE=64
-CONFIG_STDIO_LINEBUFFER=y
-CONFIG_NUNGET_CHARS=2
-CONFIG_LIB_HOMEDIR="/"
-# CONFIG_NOPRINTF_FIELDWIDTH is not set
-CONFIG_LIBC_FLOATINGPOINT=y
-CONFIG_LIBC_LONG_LONG=y
-CONFIG_LIB_RAND_ORDER=1
-# CONFIG_EOL_IS_CR is not set
-# CONFIG_EOL_IS_LF is not set
-# CONFIG_EOL_IS_BOTH_CRLF is not set
-CONFIG_EOL_IS_EITHER_CRLF=y
-# CONFIG_LIBC_EXECFUNCS is not set
-CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
-CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
-# CONFIG_LIBC_STRERROR is not set
-# CONFIG_LIBC_PERROR_STDOUT is not set
-CONFIG_ARCH_LOWPUTC=y
-CONFIG_LIB_SENDFILE_BUFSIZE=512
-# CONFIG_ARCH_ROMGETC is not set
-CONFIG_ARCH_OPTIMIZED_FUNCTIONS=y
-CONFIG_ARCH_MEMCPY=y
-CONFIG_ARCH_MEMCMP=y
-CONFIG_ARCH_MEMMOVE=y
-CONFIG_ARCH_MEMSET=y
-CONFIG_ARCH_STRCHR=y
-CONFIG_ARCH_STRCMP=y
-CONFIG_ARCH_STRCPY=y
-CONFIG_ARCH_STRNCPY=y
-CONFIG_ARCH_STRLEN=y
-CONFIG_ARCH_STRNLEN=y
-# CONFIG_ARCH_BZERO is not set
-
-#
-# Non-standard Library Support
-#
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_LIB_KBDCODEC is not set
-# CONFIG_LIB_SLCDCODEC is not set
-
-#
-# Basic CXX Support
-#
-# CONFIG_C99_BOOL8 is not set
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-# CONFIG_CXX_NEWLONG is not set
-
-#
-# uClibc++ Standard C++ Library
-#
-CONFIG_UCLIBCXX=y
-CONFIG_UCLIBCXX_EXCEPTION=y
-CONFIG_UCLIBCXX_IOSTREAM_BUFSIZE=32
-CONFIG_UCLIBCXX_HAVE_LIBSUPCXX=y
-
-#
-# Application Configuration
-#
-
-#
-# Built-In Applications
-#
-
-#
-# Examples
-#
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
-# CONFIG_EXAMPLES_CONFIGDATA is not set
-CONFIG_EXAMPLES_CXXTEST=y
-CONFIG_EXAMPLES_CXXTEST_CXXINITIALIZE=y
-# CONFIG_EXAMPLES_DHCPD is not set
-# CONFIG_EXAMPLES_ELF is not set
-# CONFIG_EXAMPLES_FTPC is not set
-# CONFIG_EXAMPLES_FTPD is not set
-# CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
-# CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
-# CONFIG_EXAMPLES_IGMP is not set
-# CONFIG_EXAMPLES_LCDRW is not set
-# CONFIG_EXAMPLES_MM is not set
-# CONFIG_EXAMPLES_MODBUS is not set
-# CONFIG_EXAMPLES_MOUNT is not set
-# CONFIG_EXAMPLES_NETTEST is not set
-# CONFIG_EXAMPLES_NRF24L01TERM is not set
-# CONFIG_EXAMPLES_NSH is not set
-# CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
-# CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
-# CONFIG_EXAMPLES_NXHELLO is not set
-# CONFIG_EXAMPLES_NXIMAGE is not set
-# CONFIG_EXAMPLES_NXLINES is not set
-# CONFIG_EXAMPLES_NXTEXT is not set
-# CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PASHELLO is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
-# CONFIG_EXAMPLES_SENDMAIL is not set
-# CONFIG_EXAMPLES_SERLOOP is not set
-# CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART is not set
-# CONFIG_EXAMPLES_TCPECHO is not set
-# CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
-# CONFIG_EXAMPLES_TIFF is not set
-# CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
-# CONFIG_EXAMPLES_USBTERM is not set
-# CONFIG_EXAMPLES_WATCHDOG is not set
-# CONFIG_EXAMPLES_WGET is not set
-
-#
-# Graphics Support
-#
-# CONFIG_TIFF is not set
-
-#
-# Interpreters
-#
-# CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
-
-#
-# Network Utilities
-#
-
-#
-# Networking Utilities
-#
-# CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
-# CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
-# CONFIG_NETUTILS_JSON is not set
-# CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TELNETD is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
-# CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_DISCOVER is not set
-# CONFIG_NETUTILS_XMLRPC is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
-#
-# NSH Library
-#
-# CONFIG_NSH_LIBRARY is not set
-
-#
-# NxWidgets/NxWM
-#
-
-#
-# Platform-specific Support
-#
-# CONFIG_PLATFORM_CONFIGDATA is not set
-
-#
-# System Libraries and NSH Add-Ons
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# FLASH Program Installation
-#
-# CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
-# CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
-# CONFIG_SYSTEM_READLINE is not set
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sysinfo
-#
-
-#
-# USB Monitor
-#
-
-#
-# EMACS-like Command Line Editor
-#
-# CONFIG_SYSTEM_CLE is not set
-
-#
-# VI Work-Alike Editor
-#
-# CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# Zmodem Commands
-#
-# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/rgmp/x86/cxxtest/setenv.sh b/configs/rgmp/x86/cxxtest/setenv.sh
deleted file mode 100755
index a6a533e477cc29970cdc716f5fb7c581020b9dd8..0000000000000000000000000000000000000000
--- a/configs/rgmp/x86/cxxtest/setenv.sh
+++ /dev/null
@@ -1,47 +0,0 @@
-#!/bin/bash
-# config/rgmp/default/setenv.sh
-#
-#   Copyright (C) 2011 Yu Qiang. All rights reserved.
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
-#   Authors: Yu Qiang 
-#            Gregory Nutt 
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name NuttX nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-
-if [ "$(basename $0)" = "setenv.sh" ] ; then
-  echo "You must source this script, not run it!" 1>&2
-  exit 1
-fi
-
-if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi
-
-#export NUTTX_BIN=
-#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG}
-
-echo "PATH : ${PATH}"
diff --git a/configs/rgmp/x86/default/Make.defs b/configs/rgmp/x86/default/Make.defs
deleted file mode 100644
index 2fed4fdcf867522b020a057875affe75d39b2ce2..0000000000000000000000000000000000000000
--- a/configs/rgmp/x86/default/Make.defs
+++ /dev/null
@@ -1,95 +0,0 @@
-############################################################################
-# configs/rgmp/default/Make.defs
-#
-#   Copyright (C) 2011 Yu Qiang. All rights reserved.
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
-#   Authors: Yu Qiang 
-#            Gregory Nutt 
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name NuttX nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-############################################################################
-
-include ${TOPDIR}/.config
-include ${TOPDIR}/tools/Config.mk
-
-RGMPLIBDIR := $(RGMP_INST_DIR)/lib
-RGMPINCDIR := $(RGMP_INST_DIR)/include
-RGMPLKSCPT := $(RGMP_INST_DIR)/etc/rgmp.ld
-
-HOSTOS			= ${shell uname -o}
-
-ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
-  ARCHOPTIMIZATION	= -O2 -gstabs
-else
-  ARCHOPTIMIZATION	= -O2
-endif
-
-ARCHCPUFLAGS		= -fno-builtin -nostdinc -fno-stack-protector
-ARCHPICFLAGS		= -fpic
-ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
-ARCHDEFINES		= -D__RGMP_KERNEL__ -D__RTOS_KERNEL__ -D__SHARE_KERNEL__
-ARCHINCLUDES		= -I. -isystem $(TOPDIR)/include -I$(RGMPINCDIR) \
-			  -I$(TOPDIR)/configs/rgmp/include -I$(TOPDIR)/arch/rgmp/include/x86
-ARCHSCRIPT		=
-
-CROSSDEV		=
-CC			= $(CROSSDEV)gcc
-CPP			= $(CROSSDEV)gcc -E
-LD			= $(CROSSDEV)ld
-AR			= $(CROSSDEV)ar rcs
-NM			= $(CROSSDEV)nm
-OBJCOPY			= $(CROSSDEV)objcopy
-OBJDUMP			= $(CROSSDEV)objdump
-
-CFLAGS			= $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \
-			  $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) -pipe
-CPPFLAGS		= $(ARCHINCLUDES) $(ARCHDEFINES)
-AFLAGS			= $(CFLAGS) -D__ASSEMBLY__
-
-ASMEXT			= .S
-OBJEXT			= .o
-LIBEXT			= .a
-
-ifeq ($(HOSTOS),Cygwin)
-  EXEEXT		= .exe
-else
-  EXEEXT		=
-endif
-
-LDFLAGS                 += -nostdlib
-EXTRA_LIBS		=
-
-
-MKDEP			= $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
-
-HOSTCC			= gcc
-HOSTINCLUDES		= -I.
-HOSTCFLAGS		= $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \
-			  $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) -pipe
-HOSTLDFLAGS		=
diff --git a/configs/rgmp/x86/default/defconfig b/configs/rgmp/x86/default/defconfig
deleted file mode 100644
index 6f10a9ed0e44444e70e9982e5785966922542126..0000000000000000000000000000000000000000
--- a/configs/rgmp/x86/default/defconfig
+++ /dev/null
@@ -1,669 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# Nuttx/ Configuration
-#
-
-#
-# Build Setup
-#
-# CONFIG_EXPERIMENTAL is not set
-# CONFIG_DEFAULT_SMALL is not set
-CONFIG_HOST_LINUX=y
-# CONFIG_HOST_OSX is not set
-# CONFIG_HOST_WINDOWS is not set
-# CONFIG_HOST_OTHER is not set
-
-#
-# Build Configuration
-#
-# CONFIG_APPS_DIR="../apps"
-# CONFIG_BUILD_2PASS is not set
-
-#
-# Binary Output Formats
-#
-# CONFIG_RRLOAD_BINARY is not set
-# CONFIG_INTELHEX_BINARY is not set
-# CONFIG_MOTOROLA_SREC is not set
-# CONFIG_RAW_BINARY is not set
-
-#
-# Customize Header Files
-#
-CONFIG_ARCH_STDINT_H=y
-CONFIG_ARCH_STDBOOL_H=y
-CONFIG_ARCH_MATH_H=y
-# CONFIG_ARCH_FLOAT_H is not set
-# CONFIG_ARCH_STDARG_H is not set
-
-#
-# Debug Options
-#
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_STACKCHECK is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-CONFIG_DEBUG_SYMBOLS=y
-# CONFIG_ARCH_HAVE_CUSTOMOPT is not set
-CONFIG_DEBUG_NOOPT=y
-# CONFIG_DEBUG_FULLOPT is not set
-
-#
-# System Type
-#
-# CONFIG_ARCH_ARM is not set
-# CONFIG_ARCH_AVR is not set
-# CONFIG_ARCH_HC is not set
-# CONFIG_ARCH_MIPS is not set
-CONFIG_ARCH_RGMP=y
-# CONFIG_ARCH_SH is not set
-# CONFIG_ARCH_SIM is not set
-# CONFIG_ARCH_X86 is not set
-# CONFIG_ARCH_Z16 is not set
-# CONFIG_ARCH_Z80 is not set
-CONFIG_ARCH="rgmp"
-
-#
-# RGMP Configuration Options
-#
-# CONFIG_RGMP_SUBARCH_ARM is not set
-CONFIG_RGMP_SUBARCH_X86=y
-CONFIG_RGMP_SUBARCH="x86"
-
-#
-# x86 Peripheral Selections
-#
-CONFIG_COM1=y
-CONFIG_COM2=y
-# CONFIG_COM3 is not set
-# CONFIG_COM4 is not set
-
-#
-# Architecture Options
-#
-# CONFIG_ARCH_NOINTC is not set
-# CONFIG_ARCH_VECNOTIRQ is not set
-# CONFIG_ARCH_DMA is not set
-# CONFIG_ARCH_HAVE_IRQPRIO is not set
-# CONFIG_ARCH_ADDRENV is not set
-# CONFIG_ARCH_HAVE_VFORK is not set
-# CONFIG_ARCH_HAVE_MMU is not set
-# CONFIG_ARCH_NAND_HWECC is not set
-# CONFIG_ARCH_STACKDUMP is not set
-# CONFIG_ENDIAN_BIG is not set
-# CONFIG_ARCH_IDLE_CUSTOM is not set
-# CONFIG_ARCH_HAVE_RAMFUNCS is not set
-# CONFIG_ARCH_HAVE_RAMVECTORS is not set
-
-#
-# Board Settings
-#
-CONFIG_BOARD_LOOPSPERMSEC=5000
-# CONFIG_ARCH_CALIBRATION is not set
-
-#
-# Interrupt options
-#
-# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set
-# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set
-
-#
-# Boot options
-#
-# CONFIG_BOOT_RUNFROMEXTSRAM is not set
-CONFIG_BOOT_RUNFROMFLASH=y
-# CONFIG_BOOT_RUNFROMISRAM is not set
-# CONFIG_BOOT_RUNFROMSDRAM is not set
-# CONFIG_BOOT_COPYTORAM is not set
-
-#
-# Boot Memory Configuration
-#
-CONFIG_RAM_START=0x0
-CONFIG_RAM_SIZE=0
-# CONFIG_ARCH_HAVE_SDRAM is not set
-
-#
-# Board Selection
-#
-CONFIG_ARCH_BOARD_RGMP=y
-# CONFIG_ARCH_BOARD_CUSTOM is not set
-CONFIG_ARCH_BOARD="rgmp"
-
-#
-# Common Board Options
-#
-
-#
-# Board-Specific Options
-#
-
-#
-# RTOS Features
-#
-# CONFIG_BOARD_INITIALIZE is not set
-CONFIG_USEC_PER_TICK=1000
-# CONFIG_SYSTEM_TIME64 is not set
-CONFIG_RR_INTERVAL=0
-# CONFIG_SCHED_CPULOAD is not set
-# CONFIG_SCHED_INSTRUMENTATION is not set
-CONFIG_TASK_NAME_SIZE=31
-# CONFIG_SCHED_HAVE_PARENT is not set
-# CONFIG_JULIAN_TIME is not set
-CONFIG_START_YEAR=2007
-CONFIG_START_MONTH=2
-CONFIG_START_DAY=27
-CONFIG_DEV_CONSOLE=y
-# CONFIG_MUTEX_TYPES is not set
-# CONFIG_PRIORITY_INHERITANCE is not set
-# CONFIG_FDCLONE_DISABLE is not set
-# CONFIG_FDCLONE_STDIO is not set
-CONFIG_SDCLONE_DISABLE=y
-# CONFIG_SCHED_WAITPID is not set
-# CONFIG_SCHED_STARTHOOK is not set
-# CONFIG_SCHED_ATEXIT is not set
-# CONFIG_SCHED_ONEXIT is not set
-CONFIG_USER_ENTRYPOINT="rgmp_main"
-CONFIG_DISABLE_OS_API=y
-# CONFIG_DISABLE_POSIX_TIMERS is not set
-# CONFIG_DISABLE_PTHREAD is not set
-# CONFIG_DISABLE_SIGNALS is not set
-# CONFIG_DISABLE_MQUEUE is not set
-# CONFIG_DISABLE_ENVIRON is not set
-
-#
-# Signal Numbers
-#
-CONFIG_SIG_SIGUSR1=1
-CONFIG_SIG_SIGUSR2=2
-CONFIG_SIG_SIGALARM=3
-CONFIG_SIG_SIGCONDTIMEDOUT=16
-
-#
-# Sizes of configurable things (0 disables)
-#
-CONFIG_MAX_TASKS=64
-CONFIG_NPTHREAD_KEYS=4
-CONFIG_NFILE_DESCRIPTORS=32
-CONFIG_NFILE_STREAMS=16
-CONFIG_NAME_MAX=32
-CONFIG_PREALLOC_MQ_MSGS=32
-CONFIG_MQ_MAXMSGSIZE=32
-CONFIG_MAX_WDOGPARMS=4
-CONFIG_PREALLOC_WDOGS=32
-CONFIG_WDOG_INTRESERVE=4
-CONFIG_PREALLOC_TIMERS=8
-
-#
-# Stack and heap information
-#
-CONFIG_IDLETHREAD_STACKSIZE=4096
-CONFIG_USERMAIN_STACKSIZE=4096
-CONFIG_PTHREAD_STACK_MIN=256
-CONFIG_PTHREAD_STACK_DEFAULT=8192
-
-#
-# Device Drivers
-#
-CONFIG_DISABLE_POLL=y
-CONFIG_DEV_NULL=y
-# CONFIG_DEV_ZERO is not set
-# CONFIG_DEV_LOOP is not set
-# CONFIG_RAMDISK is not set
-# CONFIG_CAN is not set
-# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
-# CONFIG_PWM is not set
-# CONFIG_ARCH_HAVE_I2CRESET is not set
-# CONFIG_I2C is not set
-# CONFIG_SPI is not set
-# CONFIG_I2S is not set
-# CONFIG_RTC is not set
-# CONFIG_WATCHDOG is not set
-# CONFIG_ANALOG is not set
-# CONFIG_AUDIO_DEVICES is not set
-# CONFIG_VIDEO_DEVICES is not set
-# CONFIG_BCH is not set
-# CONFIG_INPUT is not set
-# CONFIG_LCD is not set
-# CONFIG_MMCSD is not set
-# CONFIG_MTD is not set
-CONFIG_NETDEVICES=y
-
-#
-# General Ethernet MAC Driver Options
-#
-# CONFIG_NETDEV_MULTINIC is not set
-
-#
-# External Ethernet MAC Device Support
-#
-# CONFIG_NET_DM90x0 is not set
-# CONFIG_ENC28J60 is not set
-# CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
-# CONFIG_NET_SLIP is not set
-CONFIG_NET_VNET=y
-CONFIG_VNET_NINTERFACES=1
-# CONFIG_PIPES is not set
-# CONFIG_PM is not set
-# CONFIG_POWER is not set
-# CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
-CONFIG_SERIAL=y
-# CONFIG_DEV_LOWCONSOLE is not set
-# CONFIG_16550_UART is not set
-# CONFIG_UART_SERIALDRIVER is not set
-# CONFIG_UART0_SERIALDRIVER is not set
-# CONFIG_UART1_SERIALDRIVER is not set
-# CONFIG_UART2_SERIALDRIVER is not set
-# CONFIG_UART3_SERIALDRIVER is not set
-# CONFIG_UART4_SERIALDRIVER is not set
-# CONFIG_UART5_SERIALDRIVER is not set
-# CONFIG_UART6_SERIALDRIVER is not set
-# CONFIG_UART7_SERIALDRIVER is not set
-# CONFIG_UART8_SERIALDRIVER is not set
-# CONFIG_SCI0_SERIALDRIVER is not set
-# CONFIG_SCI1_SERIALDRIVER is not set
-# CONFIG_USART0_SERIALDRIVER is not set
-# CONFIG_USART1_SERIALDRIVER is not set
-# CONFIG_USART2_SERIALDRIVER is not set
-# CONFIG_USART3_SERIALDRIVER is not set
-# CONFIG_USART4_SERIALDRIVER is not set
-# CONFIG_USART5_SERIALDRIVER is not set
-# CONFIG_USART6_SERIALDRIVER is not set
-# CONFIG_USART7_SERIALDRIVER is not set
-# CONFIG_USART8_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
-# CONFIG_MCU_SERIAL is not set
-# CONFIG_STANDARD_SERIAL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
-# CONFIG_USBDEV is not set
-# CONFIG_USBHOST is not set
-# CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
-
-#
-# System Logging
-#
-# CONFIG_RAMLOG is not set
-
-#
-# Networking Support
-#
-CONFIG_ARCH_HAVE_NET=y
-# CONFIG_ARCH_HAVE_PHY is not set
-CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
-CONFIG_NET_IPv4=y
-# CONFIG_NET_MULTIBUFFER is not set
-# CONFIG_NET_PROMISCUOUS is not set
-CONFIG_NSOCKET_DESCRIPTORS=5
-CONFIG_NET_NACTIVESOCKETS=16
-CONFIG_NET_SOCKOPTS=y
-# CONFIG_NET_SOLINGER is not set
-CONFIG_NET_ETH_MTU=1514
-# CONFIG_NET_TCPURGDATA is not set
-
-#
-# TCP/IP Networking
-#
-CONFIG_NET_TCP=y
-CONFIG_NET_TCP_CONNS=40
-CONFIG_NET_MAX_LISTENPORTS=40
-CONFIG_NET_TCP_READAHEAD=y
-# CONFIG_NET_TCP_WRITE_BUFFERS is not set
-CONFIG_NET_TCP_RECVDELAY=0
-# CONFIG_NET_TCPBACKLOG is not set
-# CONFIG_NET_TCP_SPLIT is not set
-# CONFIG_NET_SENDFILE is not set
-
-#
-# UDP Networking
-#
-CONFIG_NET_UDP=y
-CONFIG_NET_UDP_CHECKSUMS=y
-CONFIG_NET_UDP_CONNS=8
-# CONFIG_NET_BROADCAST is not set
-# CONFIG_NET_RXAVAIL is not set
-CONFIG_NET_ICMP=y
-CONFIG_NET_ICMP_PING=y
-# CONFIG_NET_IGMP is not set
-CONFIG_NET_STATISTICS=y
-CONFIG_NET_ETH_TCP_RECVWNDO=1460
-CONFIG_NET_ARPTAB_SIZE=16
-# CONFIG_NET_ARP_IPIN is not set
-CONFIG_NET_IOB=y
-CONFIG_IOB_NBUFFERS=24
-CONFIG_IOB_BUFSIZE=196
-CONFIG_IOB_NCHAINS=8
-CONFIG_IOB_THROTTLE=0
-
-#
-# Routing Table Configuration
-#
-# CONFIG_NET_ROUTE is not set
-CONFIG_NET_ETHERNET=y
-
-#
-# File Systems
-#
-
-#
-# File system configuration
-#
-# CONFIG_DISABLE_MOUNTPOINT is not set
-# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
-# CONFIG_FS_READABLE is not set
-# CONFIG_FS_WRITABLE is not set
-# CONFIG_FS_RAMMAP is not set
-# CONFIG_FS_FAT is not set
-# CONFIG_NFS is not set
-# CONFIG_FS_NXFFS is not set
-# CONFIG_FS_ROMFS is not set
-# CONFIG_FS_SMARTFS is not set
-# CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
-
-#
-# Graphics Support
-#
-# CONFIG_NX is not set
-
-#
-# Memory Management
-#
-# CONFIG_MM_SMALL is not set
-CONFIG_MM_REGIONS=1
-# CONFIG_ARCH_HAVE_HEAP2 is not set
-# CONFIG_GRAN is not set
-
-#
-# Audio Support
-#
-# CONFIG_AUDIO is not set
-
-#
-# Binary Formats
-#
-# CONFIG_BINFMT_DISABLE is not set
-# CONFIG_BINFMT_EXEPATH is not set
-# CONFIG_NXFLAT is not set
-# CONFIG_ELF is not set
-# CONFIG_BUILTIN is not set
-# CONFIG_PIC is not set
-# CONFIG_SYMTAB_ORDEREDBYNAME is not set
-
-#
-# Library Routines
-#
-
-#
-# Standard C Library Options
-#
-CONFIG_STDIO_BUFFER_SIZE=64
-CONFIG_STDIO_LINEBUFFER=y
-CONFIG_NUNGET_CHARS=2
-CONFIG_LIB_HOMEDIR="/"
-# CONFIG_NOPRINTF_FIELDWIDTH is not set
-CONFIG_LIBC_FLOATINGPOINT=y
-CONFIG_LIBC_LONG_LONG=y
-CONFIG_LIB_RAND_ORDER=1
-# CONFIG_EOL_IS_CR is not set
-# CONFIG_EOL_IS_LF is not set
-# CONFIG_EOL_IS_BOTH_CRLF is not set
-CONFIG_EOL_IS_EITHER_CRLF=y
-# CONFIG_LIBC_EXECFUNCS is not set
-CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
-CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
-# CONFIG_LIBC_STRERROR is not set
-# CONFIG_LIBC_PERROR_STDOUT is not set
-CONFIG_ARCH_LOWPUTC=y
-CONFIG_LIB_SENDFILE_BUFSIZE=512
-# CONFIG_ARCH_ROMGETC is not set
-CONFIG_ARCH_OPTIMIZED_FUNCTIONS=y
-CONFIG_ARCH_MEMCPY=y
-CONFIG_ARCH_MEMCMP=y
-CONFIG_ARCH_MEMMOVE=y
-CONFIG_ARCH_MEMSET=y
-CONFIG_ARCH_STRCHR=y
-CONFIG_ARCH_STRCMP=y
-CONFIG_ARCH_STRCPY=y
-CONFIG_ARCH_STRNCPY=y
-CONFIG_ARCH_STRLEN=y
-CONFIG_ARCH_STRNLEN=y
-# CONFIG_ARCH_BZERO is not set
-
-#
-# Non-standard Library Support
-#
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_LIB_KBDCODEC is not set
-# CONFIG_LIB_SLCDCODEC is not set
-
-#
-# Basic CXX Support
-#
-# CONFIG_C99_BOOL8 is not set
-# CONFIG_HAVE_CXX is not set
-
-#
-# Application Configuration
-#
-
-#
-# Built-In Applications
-#
-
-#
-# Examples
-#
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
-# CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_DHCPD is not set
-# CONFIG_EXAMPLES_ELF is not set
-# CONFIG_EXAMPLES_FTPC is not set
-# CONFIG_EXAMPLES_FTPD is not set
-# CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
-# CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
-# CONFIG_EXAMPLES_IGMP is not set
-# CONFIG_EXAMPLES_LCDRW is not set
-# CONFIG_EXAMPLES_MM is not set
-# CONFIG_EXAMPLES_MODBUS is not set
-# CONFIG_EXAMPLES_MOUNT is not set
-# CONFIG_EXAMPLES_NETTEST is not set
-# CONFIG_EXAMPLES_NRF24L01TERM is not set
-# CONFIG_EXAMPLES_NSH is not set
-# CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
-# CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
-# CONFIG_EXAMPLES_NXHELLO is not set
-# CONFIG_EXAMPLES_NXIMAGE is not set
-# CONFIG_EXAMPLES_NXLINES is not set
-# CONFIG_EXAMPLES_NXTEXT is not set
-# CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PASHELLO is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-CONFIG_EXAMPLES_RGMP=y
-# CONFIG_EXAMPLES_ROMFS is not set
-# CONFIG_EXAMPLES_SENDMAIL is not set
-# CONFIG_EXAMPLES_SERLOOP is not set
-# CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART is not set
-# CONFIG_EXAMPLES_TCPECHO is not set
-# CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
-# CONFIG_EXAMPLES_TIFF is not set
-# CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
-# CONFIG_EXAMPLES_USBTERM is not set
-# CONFIG_EXAMPLES_WATCHDOG is not set
-# CONFIG_EXAMPLES_WGET is not set
-
-#
-# Graphics Support
-#
-# CONFIG_TIFF is not set
-
-#
-# Interpreters
-#
-# CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
-
-#
-# Network Utilities
-#
-
-#
-# Networking Utilities
-#
-# CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
-# CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
-# CONFIG_NETUTILS_JSON is not set
-# CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TELNETD is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
-# CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_DISCOVER is not set
-# CONFIG_NETUTILS_XMLRPC is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
-#
-# NSH Library
-#
-# CONFIG_NSH_LIBRARY is not set
-
-#
-# NxWidgets/NxWM
-#
-
-#
-# Platform-specific Support
-#
-# CONFIG_PLATFORM_CONFIGDATA is not set
-
-#
-# System Libraries and NSH Add-Ons
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# FLASH Program Installation
-#
-# CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
-# CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
-# CONFIG_SYSTEM_READLINE is not set
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sysinfo
-#
-
-#
-# USB Monitor
-#
-
-#
-# EMACS-like Command Line Editor
-#
-# CONFIG_SYSTEM_CLE is not set
-
-#
-# VI Work-Alike Editor
-#
-# CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# Zmodem Commands
-#
-# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/rgmp/x86/default/setenv.sh b/configs/rgmp/x86/default/setenv.sh
deleted file mode 100755
index bfb02549bd4817af97a105e83286aff6683c57af..0000000000000000000000000000000000000000
--- a/configs/rgmp/x86/default/setenv.sh
+++ /dev/null
@@ -1,47 +0,0 @@
-#!/bin/bash
-# config/rgmp/default/setenv.sh
-#
-#   Copyright (C) 2011 Yu Qiang. All rights reserved.
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
-#   Authors: Yu Qiang 
-#            Gregory Nutt 
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name NuttX nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-
-if [ "$(basename $0)" = "setenv.sh" ] ; then
-  echo "You must source this script, not run it!" 1>&2
-  exit 1
-fi
-
-if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi
-
-#export NUTTX_BIN=
-#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG}
-
-echo "PATH : ${PATH}"
diff --git a/configs/rgmp/x86/helloxx/Make.defs b/configs/rgmp/x86/helloxx/Make.defs
deleted file mode 100644
index 458d1c5fac9692758c0ca3723caba38fe490706d..0000000000000000000000000000000000000000
--- a/configs/rgmp/x86/helloxx/Make.defs
+++ /dev/null
@@ -1,105 +0,0 @@
-####################################################################################
-# configs/rgmp/default/Make.defs
-#
-#   Copyright (C) 2011 Yu Qiang. All rights reserved.
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
-#   Authors: Yu Qiang 
-#            Gregory Nutt 
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name NuttX nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-############################################################################
-
-include ${TOPDIR}/.config
-include ${TOPDIR}/tools/Config.mk
-
-RGMPLIBDIR := $(RGMP_INST_DIR)/lib
-RGMPINCDIR := $(RGMP_INST_DIR)/include
-RGMPLKSCPT := $(RGMP_INST_DIR)/etc/rgmp.ld
-
-HOSTOS			= ${shell uname -o}
-
-ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
-  ARCHOPTIMIZATION	= -O2 -gstabs
-else
-  ARCHOPTIMIZATION	= -O2
-endif
-
-ARCHCXXFLAGS    = -fno-builtin -fno-exceptions -fno-rtti
-ARCHCPUFLAGS    = -fno-builtin -nostdinc -fno-stack-protector
-ARCHPICFLAGS    = -fpic
-ARCHWARNINGS    = -Wall -Wstrict-prototypes -Wshadow -Wundef
-ARCHWARNINGSXX  = -Wall -Wshadow -Wundef
-ARCHDEFINES     = -D__RGMP_KERNEL__ -D__RTOS_KERNEL__ -D__SHARE_KERNEL__
-ARCHINCLUDES    = -I. -isystem $(TOPDIR)/include -I$(RGMPINCDIR) \
-			      -I$(TOPDIR)/configs/rgmp/include -I$(TOPDIR)/arch/rgmp/include/x86
-
-ARCHXXINCLUDES  = -I$(TOPDIR)/include/cxx -isystem $(TOPDIR)/include -I$(RGMPINCDIR) \
-			      -I$(TOPDIR)/configs/rgmp/include -I$(TOPDIR)/arch/rgmp/include/x86 \
-                  -I$(TOPDIR)/include/uClibc++
-
-CROSSDEV    =
-CC			= $(CROSSDEV)gcc
-CXX         = $(CROSSDEV)g++
-CPP			= $(CROSSDEV)gcc -E
-LD			= $(CROSSDEV)ld
-AR			= $(CROSSDEV)ar rcs
-NM			= $(CROSSDEV)nm
-OBJCOPY	    = $(CROSSDEV)objcopy
-OBJDUMP	    = $(CROSSDEV)objdump
-
-CFLAGS		= $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \
-			  $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) -pipe
-CPPFLAGS	= $(ARCHINCLUDES) $(ARCHDEFINES)
-CXXFLAGS    = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) \
-              $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe -nodefaultlibs \
-              -nostdinc++
-CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
-AFLAGS		= $(CFLAGS) -D__ASSEMBLY__
-
-ASMEXT			= .S
-OBJEXT			= .o
-LIBEXT			= .a
-
-ifeq ($(HOSTOS),Cygwin)
-  EXEEXT		= .exe
-else
-  EXEEXT		=
-endif
-
-LDFLAGS         += -nostdlib
-EXTRA_LIBS		= $(shell $(CC) -print-file-name=libsupc++.a) \
-                  $(shell $(CC) -print-file-name=libgcc_eh.a)
-
-MKDEP			= $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
-
-HOSTCC			= gcc
-HOSTINCLUDES	= -I.
-HOSTCFLAGS		= $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \
-			  $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) -pipe
-HOSTLDFLAGS		=
diff --git a/configs/rgmp/x86/helloxx/defconfig b/configs/rgmp/x86/helloxx/defconfig
deleted file mode 100644
index 039dd3aa9c7153fa967464bf493d277c86a7bca4..0000000000000000000000000000000000000000
--- a/configs/rgmp/x86/helloxx/defconfig
+++ /dev/null
@@ -1,699 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# Nuttx/ Configuration
-#
-
-#
-# Build Setup
-#
-# CONFIG_EXPERIMENTAL is not set
-# CONFIG_DEFAULT_SMALL is not set
-CONFIG_HOST_LINUX=y
-# CONFIG_HOST_OSX is not set
-# CONFIG_HOST_WINDOWS is not set
-# CONFIG_HOST_OTHER is not set
-
-#
-# Build Configuration
-#
-# CONFIG_APPS_DIR="../apps"
-# CONFIG_BUILD_2PASS is not set
-
-#
-# Binary Output Formats
-#
-# CONFIG_RRLOAD_BINARY is not set
-# CONFIG_INTELHEX_BINARY is not set
-# CONFIG_MOTOROLA_SREC is not set
-# CONFIG_RAW_BINARY is not set
-
-#
-# Customize Header Files
-#
-CONFIG_ARCH_STDINT_H=y
-CONFIG_ARCH_STDBOOL_H=y
-CONFIG_ARCH_MATH_H=y
-# CONFIG_ARCH_FLOAT_H is not set
-# CONFIG_ARCH_STDARG_H is not set
-
-#
-# Debug Options
-#
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_STACKCHECK is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-CONFIG_DEBUG_VERBOSE=y
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-# CONFIG_DEBUG_NET is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
-# CONFIG_DEBUG_AUDIO is not set
-CONFIG_DEBUG_SYMBOLS=y
-# CONFIG_ARCH_HAVE_CUSTOMOPT is not set
-CONFIG_DEBUG_NOOPT=y
-# CONFIG_DEBUG_FULLOPT is not set
-
-#
-# System Type
-#
-# CONFIG_ARCH_ARM is not set
-# CONFIG_ARCH_AVR is not set
-# CONFIG_ARCH_HC is not set
-# CONFIG_ARCH_MIPS is not set
-CONFIG_ARCH_RGMP=y
-# CONFIG_ARCH_SH is not set
-# CONFIG_ARCH_SIM is not set
-# CONFIG_ARCH_X86 is not set
-# CONFIG_ARCH_Z16 is not set
-# CONFIG_ARCH_Z80 is not set
-CONFIG_ARCH="rgmp"
-
-#
-# RGMP Configuration Options
-#
-# CONFIG_RGMP_SUBARCH_ARM is not set
-CONFIG_RGMP_SUBARCH_X86=y
-CONFIG_RGMP_SUBARCH="x86"
-
-#
-# x86 Peripheral Selections
-#
-CONFIG_COM1=y
-CONFIG_COM2=y
-# CONFIG_COM3 is not set
-# CONFIG_COM4 is not set
-
-#
-# Architecture Options
-#
-# CONFIG_ARCH_NOINTC is not set
-# CONFIG_ARCH_VECNOTIRQ is not set
-# CONFIG_ARCH_DMA is not set
-# CONFIG_ARCH_HAVE_IRQPRIO is not set
-# CONFIG_ARCH_ADDRENV is not set
-# CONFIG_ARCH_HAVE_VFORK is not set
-# CONFIG_ARCH_HAVE_MMU is not set
-# CONFIG_ARCH_NAND_HWECC is not set
-# CONFIG_ARCH_STACKDUMP is not set
-# CONFIG_ENDIAN_BIG is not set
-# CONFIG_ARCH_IDLE_CUSTOM is not set
-# CONFIG_ARCH_HAVE_RAMFUNCS is not set
-# CONFIG_ARCH_HAVE_RAMVECTORS is not set
-
-#
-# Board Settings
-#
-CONFIG_BOARD_LOOPSPERMSEC=5000
-# CONFIG_ARCH_CALIBRATION is not set
-
-#
-# Interrupt options
-#
-# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set
-# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set
-
-#
-# Boot options
-#
-# CONFIG_BOOT_RUNFROMEXTSRAM is not set
-CONFIG_BOOT_RUNFROMFLASH=y
-# CONFIG_BOOT_RUNFROMISRAM is not set
-# CONFIG_BOOT_RUNFROMSDRAM is not set
-# CONFIG_BOOT_COPYTORAM is not set
-
-#
-# Boot Memory Configuration
-#
-CONFIG_RAM_START=0x0
-CONFIG_RAM_SIZE=0
-# CONFIG_ARCH_HAVE_SDRAM is not set
-
-#
-# Board Selection
-#
-CONFIG_ARCH_BOARD_RGMP=y
-# CONFIG_ARCH_BOARD_CUSTOM is not set
-CONFIG_ARCH_BOARD="rgmp"
-
-#
-# Common Board Options
-#
-
-#
-# Board-Specific Options
-#
-
-#
-# RTOS Features
-#
-# CONFIG_BOARD_INITIALIZE is not set
-CONFIG_USEC_PER_TICK=1000
-# CONFIG_SYSTEM_TIME64 is not set
-CONFIG_RR_INTERVAL=0
-# CONFIG_SCHED_CPULOAD is not set
-# CONFIG_SCHED_INSTRUMENTATION is not set
-CONFIG_TASK_NAME_SIZE=31
-# CONFIG_SCHED_HAVE_PARENT is not set
-# CONFIG_JULIAN_TIME is not set
-CONFIG_START_YEAR=2007
-CONFIG_START_MONTH=2
-CONFIG_START_DAY=27
-CONFIG_DEV_CONSOLE=y
-# CONFIG_MUTEX_TYPES is not set
-# CONFIG_PRIORITY_INHERITANCE is not set
-# CONFIG_FDCLONE_DISABLE is not set
-# CONFIG_FDCLONE_STDIO is not set
-CONFIG_SDCLONE_DISABLE=y
-# CONFIG_SCHED_WAITPID is not set
-# CONFIG_SCHED_STARTHOOK is not set
-# CONFIG_SCHED_ATEXIT is not set
-# CONFIG_SCHED_ONEXIT is not set
-CONFIG_USER_ENTRYPOINT="helloxx_main"
-CONFIG_DISABLE_OS_API=y
-# CONFIG_DISABLE_POSIX_TIMERS is not set
-# CONFIG_DISABLE_PTHREAD is not set
-# CONFIG_DISABLE_SIGNALS is not set
-# CONFIG_DISABLE_MQUEUE is not set
-# CONFIG_DISABLE_ENVIRON is not set
-
-#
-# Signal Numbers
-#
-CONFIG_SIG_SIGUSR1=1
-CONFIG_SIG_SIGUSR2=2
-CONFIG_SIG_SIGALARM=3
-CONFIG_SIG_SIGCONDTIMEDOUT=16
-
-#
-# Sizes of configurable things (0 disables)
-#
-CONFIG_MAX_TASKS=64
-CONFIG_NPTHREAD_KEYS=4
-CONFIG_NFILE_DESCRIPTORS=32
-CONFIG_NFILE_STREAMS=16
-CONFIG_NAME_MAX=32
-CONFIG_PREALLOC_MQ_MSGS=32
-CONFIG_MQ_MAXMSGSIZE=32
-CONFIG_MAX_WDOGPARMS=4
-CONFIG_PREALLOC_WDOGS=32
-CONFIG_WDOG_INTRESERVE=4
-CONFIG_PREALLOC_TIMERS=8
-
-#
-# Stack and heap information
-#
-CONFIG_IDLETHREAD_STACKSIZE=4096
-CONFIG_USERMAIN_STACKSIZE=4096
-CONFIG_PTHREAD_STACK_MIN=256
-CONFIG_PTHREAD_STACK_DEFAULT=8192
-
-#
-# Device Drivers
-#
-CONFIG_DISABLE_POLL=y
-CONFIG_DEV_NULL=y
-# CONFIG_DEV_ZERO is not set
-# CONFIG_DEV_LOOP is not set
-# CONFIG_RAMDISK is not set
-# CONFIG_CAN is not set
-# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
-# CONFIG_PWM is not set
-# CONFIG_ARCH_HAVE_I2CRESET is not set
-# CONFIG_I2C is not set
-# CONFIG_SPI is not set
-# CONFIG_I2S is not set
-# CONFIG_RTC is not set
-# CONFIG_WATCHDOG is not set
-# CONFIG_ANALOG is not set
-# CONFIG_AUDIO_DEVICES is not set
-# CONFIG_VIDEO_DEVICES is not set
-# CONFIG_BCH is not set
-# CONFIG_INPUT is not set
-# CONFIG_LCD is not set
-# CONFIG_MMCSD is not set
-# CONFIG_MTD is not set
-CONFIG_NETDEVICES=y
-
-#
-# General Ethernet MAC Driver Options
-#
-# CONFIG_NETDEV_MULTINIC is not set
-# CONFIG_NET_DUMPPACKET is not set
-
-#
-# External Ethernet MAC Device Support
-#
-# CONFIG_NET_DM90x0 is not set
-# CONFIG_ENC28J60 is not set
-# CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
-# CONFIG_NET_SLIP is not set
-CONFIG_NET_VNET=y
-CONFIG_VNET_NINTERFACES=1
-# CONFIG_PIPES is not set
-# CONFIG_PM is not set
-# CONFIG_POWER is not set
-# CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
-CONFIG_SERIAL=y
-# CONFIG_DEV_LOWCONSOLE is not set
-# CONFIG_16550_UART is not set
-# CONFIG_UART_SERIALDRIVER is not set
-# CONFIG_UART0_SERIALDRIVER is not set
-# CONFIG_UART1_SERIALDRIVER is not set
-# CONFIG_UART2_SERIALDRIVER is not set
-# CONFIG_UART3_SERIALDRIVER is not set
-# CONFIG_UART4_SERIALDRIVER is not set
-# CONFIG_UART5_SERIALDRIVER is not set
-# CONFIG_UART6_SERIALDRIVER is not set
-# CONFIG_UART7_SERIALDRIVER is not set
-# CONFIG_UART8_SERIALDRIVER is not set
-# CONFIG_SCI0_SERIALDRIVER is not set
-# CONFIG_SCI1_SERIALDRIVER is not set
-# CONFIG_USART0_SERIALDRIVER is not set
-# CONFIG_USART1_SERIALDRIVER is not set
-# CONFIG_USART2_SERIALDRIVER is not set
-# CONFIG_USART3_SERIALDRIVER is not set
-# CONFIG_USART4_SERIALDRIVER is not set
-# CONFIG_USART5_SERIALDRIVER is not set
-# CONFIG_USART6_SERIALDRIVER is not set
-# CONFIG_USART7_SERIALDRIVER is not set
-# CONFIG_USART8_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
-# CONFIG_MCU_SERIAL is not set
-# CONFIG_STANDARD_SERIAL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
-# CONFIG_USBDEV is not set
-# CONFIG_USBHOST is not set
-# CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
-
-#
-# System Logging
-#
-# CONFIG_RAMLOG is not set
-
-#
-# Networking Support
-#
-CONFIG_ARCH_HAVE_NET=y
-# CONFIG_ARCH_HAVE_PHY is not set
-CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
-CONFIG_NET_IPv4=y
-# CONFIG_NET_MULTIBUFFER is not set
-# CONFIG_NET_PROMISCUOUS is not set
-CONFIG_NSOCKET_DESCRIPTORS=5
-CONFIG_NET_NACTIVESOCKETS=16
-CONFIG_NET_SOCKOPTS=y
-# CONFIG_NET_SOLINGER is not set
-CONFIG_NET_ETH_MTU=1514
-# CONFIG_NET_TCPURGDATA is not set
-
-#
-# TCP/IP Networking
-#
-CONFIG_NET_TCP=y
-CONFIG_NET_TCP_CONNS=40
-CONFIG_NET_MAX_LISTENPORTS=40
-CONFIG_NET_TCP_READAHEAD=y
-# CONFIG_NET_TCP_WRITE_BUFFERS is not set
-CONFIG_NET_TCP_RECVDELAY=0
-# CONFIG_NET_TCPBACKLOG is not set
-# CONFIG_NET_TCP_SPLIT is not set
-# CONFIG_NET_SENDFILE is not set
-
-#
-# UDP Networking
-#
-CONFIG_NET_UDP=y
-CONFIG_NET_UDP_CHECKSUMS=y
-CONFIG_NET_UDP_CONNS=8
-# CONFIG_NET_BROADCAST is not set
-# CONFIG_NET_RXAVAIL is not set
-CONFIG_NET_ICMP=y
-CONFIG_NET_ICMP_PING=y
-# CONFIG_NET_IGMP is not set
-CONFIG_NET_STATISTICS=y
-CONFIG_NET_ETH_TCP_RECVWNDO=1460
-CONFIG_NET_ARPTAB_SIZE=16
-# CONFIG_NET_ARP_IPIN is not set
-CONFIG_NET_IOB=y
-CONFIG_IOB_NBUFFERS=24
-CONFIG_IOB_BUFSIZE=196
-CONFIG_IOB_NCHAINS=8
-CONFIG_IOB_THROTTLE=0
-
-#
-# Routing Table Configuration
-#
-# CONFIG_NET_ROUTE is not set
-CONFIG_NET_ETHERNET=y
-
-#
-# File Systems
-#
-
-#
-# File system configuration
-#
-# CONFIG_DISABLE_MOUNTPOINT is not set
-# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
-# CONFIG_FS_READABLE is not set
-# CONFIG_FS_WRITABLE is not set
-# CONFIG_FS_RAMMAP is not set
-# CONFIG_FS_FAT is not set
-# CONFIG_NFS is not set
-# CONFIG_FS_NXFFS is not set
-# CONFIG_FS_ROMFS is not set
-# CONFIG_FS_SMARTFS is not set
-# CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
-
-#
-# Graphics Support
-#
-# CONFIG_NX is not set
-
-#
-# Memory Management
-#
-# CONFIG_MM_SMALL is not set
-CONFIG_MM_REGIONS=1
-# CONFIG_ARCH_HAVE_HEAP2 is not set
-# CONFIG_GRAN is not set
-
-#
-# Audio Support
-#
-# CONFIG_AUDIO is not set
-
-#
-# Binary Formats
-#
-# CONFIG_BINFMT_DISABLE is not set
-# CONFIG_BINFMT_EXEPATH is not set
-# CONFIG_NXFLAT is not set
-# CONFIG_ELF is not set
-# CONFIG_BUILTIN is not set
-# CONFIG_PIC is not set
-# CONFIG_SYMTAB_ORDEREDBYNAME is not set
-
-#
-# Library Routines
-#
-
-#
-# Standard C Library Options
-#
-CONFIG_STDIO_BUFFER_SIZE=64
-CONFIG_STDIO_LINEBUFFER=y
-CONFIG_NUNGET_CHARS=2
-CONFIG_LIB_HOMEDIR="/"
-# CONFIG_NOPRINTF_FIELDWIDTH is not set
-CONFIG_LIBC_FLOATINGPOINT=y
-CONFIG_LIBC_LONG_LONG=y
-CONFIG_LIB_RAND_ORDER=1
-# CONFIG_EOL_IS_CR is not set
-# CONFIG_EOL_IS_LF is not set
-# CONFIG_EOL_IS_BOTH_CRLF is not set
-CONFIG_EOL_IS_EITHER_CRLF=y
-# CONFIG_LIBC_EXECFUNCS is not set
-CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
-CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
-# CONFIG_LIBC_STRERROR is not set
-# CONFIG_LIBC_PERROR_STDOUT is not set
-CONFIG_ARCH_LOWPUTC=y
-CONFIG_LIB_SENDFILE_BUFSIZE=512
-# CONFIG_ARCH_ROMGETC is not set
-CONFIG_ARCH_OPTIMIZED_FUNCTIONS=y
-CONFIG_ARCH_MEMCPY=y
-CONFIG_ARCH_MEMCMP=y
-CONFIG_ARCH_MEMMOVE=y
-CONFIG_ARCH_MEMSET=y
-CONFIG_ARCH_STRCHR=y
-CONFIG_ARCH_STRCMP=y
-CONFIG_ARCH_STRCPY=y
-CONFIG_ARCH_STRNCPY=y
-CONFIG_ARCH_STRLEN=y
-CONFIG_ARCH_STRNLEN=y
-# CONFIG_ARCH_BZERO is not set
-
-#
-# Non-standard Library Support
-#
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_LIB_KBDCODEC is not set
-# CONFIG_LIB_SLCDCODEC is not set
-
-#
-# Basic CXX Support
-#
-# CONFIG_C99_BOOL8 is not set
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-# CONFIG_CXX_NEWLONG is not set
-
-#
-# uClibc++ Standard C++ Library
-#
-# CONFIG_UCLIBCXX is not set
-
-#
-# Application Configuration
-#
-
-#
-# Built-In Applications
-#
-
-#
-# Examples
-#
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
-# CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CXXTEST is not set
-# CONFIG_EXAMPLES_DHCPD is not set
-# CONFIG_EXAMPLES_ELF is not set
-# CONFIG_EXAMPLES_FTPC is not set
-# CONFIG_EXAMPLES_FTPD is not set
-# CONFIG_EXAMPLES_HELLO is not set
-CONFIG_EXAMPLES_HELLOXX=y
-CONFIG_EXAMPLES_HELLOXX_CXXINITIALIZE=y
-# CONFIG_EXAMPLES_JSON is not set
-# CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
-# CONFIG_EXAMPLES_IGMP is not set
-# CONFIG_EXAMPLES_LCDRW is not set
-# CONFIG_EXAMPLES_MM is not set
-# CONFIG_EXAMPLES_MODBUS is not set
-# CONFIG_EXAMPLES_MOUNT is not set
-# CONFIG_EXAMPLES_NETTEST is not set
-# CONFIG_EXAMPLES_NRF24L01TERM is not set
-# CONFIG_EXAMPLES_NSH is not set
-# CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
-# CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
-# CONFIG_EXAMPLES_NXHELLO is not set
-# CONFIG_EXAMPLES_NXIMAGE is not set
-# CONFIG_EXAMPLES_NXLINES is not set
-# CONFIG_EXAMPLES_NXTEXT is not set
-# CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PASHELLO is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
-# CONFIG_EXAMPLES_SENDMAIL is not set
-# CONFIG_EXAMPLES_SERLOOP is not set
-# CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART is not set
-# CONFIG_EXAMPLES_TCPECHO is not set
-# CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
-# CONFIG_EXAMPLES_TIFF is not set
-# CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
-# CONFIG_EXAMPLES_USBTERM is not set
-# CONFIG_EXAMPLES_WATCHDOG is not set
-# CONFIG_EXAMPLES_WGET is not set
-
-#
-# Graphics Support
-#
-# CONFIG_TIFF is not set
-
-#
-# Interpreters
-#
-# CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
-
-#
-# Network Utilities
-#
-
-#
-# Networking Utilities
-#
-# CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
-# CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
-# CONFIG_NETUTILS_JSON is not set
-# CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TELNETD is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
-# CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_DISCOVER is not set
-# CONFIG_NETUTILS_XMLRPC is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
-#
-# NSH Library
-#
-# CONFIG_NSH_LIBRARY is not set
-
-#
-# NxWidgets/NxWM
-#
-
-#
-# Platform-specific Support
-#
-# CONFIG_PLATFORM_CONFIGDATA is not set
-
-#
-# System Libraries and NSH Add-Ons
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# FLASH Program Installation
-#
-# CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
-# CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
-# CONFIG_SYSTEM_READLINE is not set
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sysinfo
-#
-
-#
-# USB Monitor
-#
-
-#
-# EMACS-like Command Line Editor
-#
-# CONFIG_SYSTEM_CLE is not set
-
-#
-# VI Work-Alike Editor
-#
-# CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# Zmodem Commands
-#
-# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/rgmp/x86/helloxx/setenv.sh b/configs/rgmp/x86/helloxx/setenv.sh
deleted file mode 100755
index a6a533e477cc29970cdc716f5fb7c581020b9dd8..0000000000000000000000000000000000000000
--- a/configs/rgmp/x86/helloxx/setenv.sh
+++ /dev/null
@@ -1,47 +0,0 @@
-#!/bin/bash
-# config/rgmp/default/setenv.sh
-#
-#   Copyright (C) 2011 Yu Qiang. All rights reserved.
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
-#   Authors: Yu Qiang 
-#            Gregory Nutt 
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name NuttX nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-
-if [ "$(basename $0)" = "setenv.sh" ] ; then
-  echo "You must source this script, not run it!" 1>&2
-  exit 1
-fi
-
-if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi
-
-#export NUTTX_BIN=
-#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG}
-
-echo "PATH : ${PATH}"
diff --git a/configs/rgmp/x86/nsh/Make.defs b/configs/rgmp/x86/nsh/Make.defs
deleted file mode 100644
index fb81d4f577afce6eabef0e7475942befa3245061..0000000000000000000000000000000000000000
--- a/configs/rgmp/x86/nsh/Make.defs
+++ /dev/null
@@ -1,95 +0,0 @@
-############################################################################
-# configs/rgmp/nsh/Make.defs
-#
-#   Copyright (C) 2011 Yu Qiang. All rights reserved.
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
-#   Authors: Yu Qiang 
-#            Gregory Nutt 
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name NuttX nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-############################################################################
-
-include ${TOPDIR}/.config
-include ${TOPDIR}/tools/Config.mk
-
-RGMPLIBDIR := $(RGMP_INST_DIR)/lib
-RGMPINCDIR := $(RGMP_INST_DIR)/include
-RGMPLKSCPT := $(RGMP_INST_DIR)/etc/rgmp.ld
-
-HOSTOS			= ${shell uname -o}
-
-ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
-  ARCHOPTIMIZATION	= -O2 -gstabs
-else
-  ARCHOPTIMIZATION	= -O2
-endif
-
-ARCHCPUFLAGS		= -fno-builtin -nostdinc -fno-stack-protector
-ARCHPICFLAGS		= -fpic
-ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
-ARCHDEFINES		= -D__RGMP_KERNEL__ -D__RTOS_KERNEL__ -D__SHARE_KERNEL__
-ARCHINCLUDES		= -I. -isystem $(TOPDIR)/include -I$(RGMPINCDIR) \
-			  -I$(TOPDIR)/configs/rgmp/include -I$(TOPDIR)/arch/rgmp/include/x86
-ARCHSCRIPT		=
-
-CROSSDEV		=
-CC			= $(CROSSDEV)gcc
-CPP			= $(CROSSDEV)gcc -E
-LD			= $(CROSSDEV)ld
-AR			= $(CROSSDEV)ar rcs
-NM			= $(CROSSDEV)nm
-OBJCOPY			= $(CROSSDEV)objcopy
-OBJDUMP			= $(CROSSDEV)objdump
-
-CFLAGS			= $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \
-			  $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) -pipe
-CPPFLAGS		= $(ARCHINCLUDES) $(ARCHDEFINES)
-AFLAGS			= $(CFLAGS) -D__ASSEMBLY__
-
-ASMEXT			= .S
-OBJEXT			= .o
-LIBEXT			= .a
-
-ifeq ($(HOSTOS),Cygwin)
-  EXEEXT		= .exe
-else
-  EXEEXT		=
-endif
-
-LDFLAGS                 += -nostdlib
-EXTRA_LIBS		=
-
-
-MKDEP			= $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
-
-HOSTCC			= gcc
-HOSTINCLUDES		= -I.
-HOSTCFLAGS		= $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \
-			  $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) -pipe
-HOSTLDFLAGS		=
diff --git a/configs/rgmp/x86/nsh/defconfig b/configs/rgmp/x86/nsh/defconfig
deleted file mode 100644
index 8723d56a26d0d011123a9a2cc44299596b3373b6..0000000000000000000000000000000000000000
--- a/configs/rgmp/x86/nsh/defconfig
+++ /dev/null
@@ -1,783 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# Nuttx/ Configuration
-#
-
-#
-# Build Setup
-#
-# CONFIG_EXPERIMENTAL is not set
-# CONFIG_DEFAULT_SMALL is not set
-CONFIG_HOST_LINUX=y
-# CONFIG_HOST_OSX is not set
-# CONFIG_HOST_WINDOWS is not set
-# CONFIG_HOST_OTHER is not set
-
-#
-# Build Configuration
-#
-# CONFIG_APPS_DIR="../apps"
-# CONFIG_BUILD_2PASS is not set
-
-#
-# Binary Output Formats
-#
-# CONFIG_RRLOAD_BINARY is not set
-# CONFIG_INTELHEX_BINARY is not set
-# CONFIG_MOTOROLA_SREC is not set
-# CONFIG_RAW_BINARY is not set
-
-#
-# Customize Header Files
-#
-CONFIG_ARCH_STDINT_H=y
-CONFIG_ARCH_STDBOOL_H=y
-CONFIG_ARCH_MATH_H=y
-# CONFIG_ARCH_FLOAT_H is not set
-# CONFIG_ARCH_STDARG_H is not set
-
-#
-# Debug Options
-#
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_STACKCHECK is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-# CONFIG_DEBUG_NET is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
-# CONFIG_DEBUG_AUDIO is not set
-CONFIG_DEBUG_SYMBOLS=y
-# CONFIG_ARCH_HAVE_CUSTOMOPT is not set
-CONFIG_DEBUG_NOOPT=y
-# CONFIG_DEBUG_FULLOPT is not set
-
-#
-# System Type
-#
-# CONFIG_ARCH_ARM is not set
-# CONFIG_ARCH_AVR is not set
-# CONFIG_ARCH_HC is not set
-# CONFIG_ARCH_MIPS is not set
-CONFIG_ARCH_RGMP=y
-# CONFIG_ARCH_SH is not set
-# CONFIG_ARCH_SIM is not set
-# CONFIG_ARCH_X86 is not set
-# CONFIG_ARCH_Z16 is not set
-# CONFIG_ARCH_Z80 is not set
-CONFIG_ARCH="rgmp"
-
-#
-# RGMP Configuration Options
-#
-# CONFIG_RGMP_SUBARCH_ARM is not set
-CONFIG_RGMP_SUBARCH_X86=y
-CONFIG_RGMP_SUBARCH="x86"
-
-#
-# x86 Peripheral Selections
-#
-CONFIG_COM1=y
-CONFIG_COM2=y
-# CONFIG_COM3 is not set
-# CONFIG_COM4 is not set
-
-#
-# Architecture Options
-#
-# CONFIG_ARCH_NOINTC is not set
-# CONFIG_ARCH_VECNOTIRQ is not set
-# CONFIG_ARCH_DMA is not set
-# CONFIG_ARCH_HAVE_IRQPRIO is not set
-# CONFIG_ARCH_ADDRENV is not set
-# CONFIG_ARCH_HAVE_VFORK is not set
-# CONFIG_ARCH_HAVE_MMU is not set
-# CONFIG_ARCH_NAND_HWECC is not set
-# CONFIG_ARCH_STACKDUMP is not set
-# CONFIG_ENDIAN_BIG is not set
-# CONFIG_ARCH_IDLE_CUSTOM is not set
-# CONFIG_ARCH_HAVE_RAMFUNCS is not set
-# CONFIG_ARCH_HAVE_RAMVECTORS is not set
-
-#
-# Board Settings
-#
-CONFIG_BOARD_LOOPSPERMSEC=5000
-# CONFIG_ARCH_CALIBRATION is not set
-
-#
-# Interrupt options
-#
-# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set
-# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set
-
-#
-# Boot options
-#
-# CONFIG_BOOT_RUNFROMEXTSRAM is not set
-CONFIG_BOOT_RUNFROMFLASH=y
-# CONFIG_BOOT_RUNFROMISRAM is not set
-# CONFIG_BOOT_RUNFROMSDRAM is not set
-# CONFIG_BOOT_COPYTORAM is not set
-
-#
-# Boot Memory Configuration
-#
-CONFIG_RAM_START=0x0
-CONFIG_RAM_SIZE=0
-# CONFIG_ARCH_HAVE_SDRAM is not set
-
-#
-# Board Selection
-#
-CONFIG_ARCH_BOARD_RGMP=y
-# CONFIG_ARCH_BOARD_CUSTOM is not set
-CONFIG_ARCH_BOARD="rgmp"
-
-#
-# Common Board Options
-#
-CONFIG_NSH_MMCSDMINOR=0
-
-#
-# Board-Specific Options
-#
-
-#
-# RTOS Features
-#
-# CONFIG_BOARD_INITIALIZE is not set
-CONFIG_USEC_PER_TICK=1000
-# CONFIG_SYSTEM_TIME64 is not set
-CONFIG_RR_INTERVAL=0
-# CONFIG_SCHED_CPULOAD is not set
-# CONFIG_SCHED_INSTRUMENTATION is not set
-CONFIG_TASK_NAME_SIZE=31
-# CONFIG_SCHED_HAVE_PARENT is not set
-# CONFIG_JULIAN_TIME is not set
-CONFIG_START_YEAR=2007
-CONFIG_START_MONTH=2
-CONFIG_START_DAY=27
-CONFIG_DEV_CONSOLE=y
-# CONFIG_MUTEX_TYPES is not set
-# CONFIG_PRIORITY_INHERITANCE is not set
-# CONFIG_FDCLONE_DISABLE is not set
-# CONFIG_FDCLONE_STDIO is not set
-CONFIG_SDCLONE_DISABLE=y
-# CONFIG_SCHED_WAITPID is not set
-# CONFIG_SCHED_STARTHOOK is not set
-# CONFIG_SCHED_ATEXIT is not set
-# CONFIG_SCHED_ONEXIT is not set
-CONFIG_USER_ENTRYPOINT="nsh_main"
-CONFIG_DISABLE_OS_API=y
-# CONFIG_DISABLE_POSIX_TIMERS is not set
-# CONFIG_DISABLE_PTHREAD is not set
-# CONFIG_DISABLE_SIGNALS is not set
-# CONFIG_DISABLE_MQUEUE is not set
-# CONFIG_DISABLE_ENVIRON is not set
-
-#
-# Signal Numbers
-#
-CONFIG_SIG_SIGUSR1=1
-CONFIG_SIG_SIGUSR2=2
-CONFIG_SIG_SIGALARM=3
-CONFIG_SIG_SIGCONDTIMEDOUT=16
-
-#
-# Sizes of configurable things (0 disables)
-#
-CONFIG_MAX_TASKS=64
-CONFIG_NPTHREAD_KEYS=4
-CONFIG_NFILE_DESCRIPTORS=32
-CONFIG_NFILE_STREAMS=16
-CONFIG_NAME_MAX=32
-CONFIG_PREALLOC_MQ_MSGS=32
-CONFIG_MQ_MAXMSGSIZE=32
-CONFIG_MAX_WDOGPARMS=4
-CONFIG_PREALLOC_WDOGS=32
-CONFIG_WDOG_INTRESERVE=4
-CONFIG_PREALLOC_TIMERS=8
-
-#
-# Stack and heap information
-#
-CONFIG_IDLETHREAD_STACKSIZE=4096
-CONFIG_USERMAIN_STACKSIZE=4096
-CONFIG_PTHREAD_STACK_MIN=256
-CONFIG_PTHREAD_STACK_DEFAULT=8192
-
-#
-# Device Drivers
-#
-CONFIG_DISABLE_POLL=y
-CONFIG_DEV_NULL=y
-# CONFIG_DEV_ZERO is not set
-# CONFIG_DEV_LOOP is not set
-# CONFIG_RAMDISK is not set
-# CONFIG_CAN is not set
-# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
-# CONFIG_PWM is not set
-# CONFIG_ARCH_HAVE_I2CRESET is not set
-# CONFIG_I2C is not set
-# CONFIG_SPI is not set
-# CONFIG_I2S is not set
-# CONFIG_RTC is not set
-# CONFIG_WATCHDOG is not set
-# CONFIG_ANALOG is not set
-# CONFIG_AUDIO_DEVICES is not set
-# CONFIG_VIDEO_DEVICES is not set
-# CONFIG_BCH is not set
-# CONFIG_INPUT is not set
-# CONFIG_LCD is not set
-# CONFIG_MMCSD is not set
-# CONFIG_MTD is not set
-CONFIG_NETDEVICES=y
-
-#
-# General Ethernet MAC Driver Options
-#
-# CONFIG_NETDEV_MULTINIC is not set
-# CONFIG_NET_DUMPPACKET is not set
-
-#
-# External Ethernet MAC Device Support
-#
-# CONFIG_NET_DM90x0 is not set
-# CONFIG_ENC28J60 is not set
-# CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
-# CONFIG_NET_SLIP is not set
-CONFIG_NET_VNET=y
-CONFIG_VNET_NINTERFACES=1
-# CONFIG_PIPES is not set
-# CONFIG_PM is not set
-# CONFIG_POWER is not set
-# CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
-CONFIG_SERIAL=y
-# CONFIG_DEV_LOWCONSOLE is not set
-# CONFIG_16550_UART is not set
-# CONFIG_UART_SERIALDRIVER is not set
-# CONFIG_UART0_SERIALDRIVER is not set
-# CONFIG_UART1_SERIALDRIVER is not set
-# CONFIG_UART2_SERIALDRIVER is not set
-# CONFIG_UART3_SERIALDRIVER is not set
-# CONFIG_UART4_SERIALDRIVER is not set
-# CONFIG_UART5_SERIALDRIVER is not set
-# CONFIG_UART6_SERIALDRIVER is not set
-# CONFIG_UART7_SERIALDRIVER is not set
-# CONFIG_UART8_SERIALDRIVER is not set
-# CONFIG_SCI0_SERIALDRIVER is not set
-# CONFIG_SCI1_SERIALDRIVER is not set
-# CONFIG_USART0_SERIALDRIVER is not set
-# CONFIG_USART1_SERIALDRIVER is not set
-# CONFIG_USART2_SERIALDRIVER is not set
-# CONFIG_USART3_SERIALDRIVER is not set
-# CONFIG_USART4_SERIALDRIVER is not set
-# CONFIG_USART5_SERIALDRIVER is not set
-# CONFIG_USART6_SERIALDRIVER is not set
-# CONFIG_USART7_SERIALDRIVER is not set
-# CONFIG_USART8_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
-# CONFIG_MCU_SERIAL is not set
-# CONFIG_STANDARD_SERIAL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
-# CONFIG_USBDEV is not set
-# CONFIG_USBHOST is not set
-# CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
-
-#
-# System Logging
-#
-# CONFIG_RAMLOG is not set
-
-#
-# Networking Support
-#
-CONFIG_ARCH_HAVE_NET=y
-# CONFIG_ARCH_HAVE_PHY is not set
-CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
-CONFIG_NET_IPv4=y
-# CONFIG_NET_MULTIBUFFER is not set
-# CONFIG_NET_PROMISCUOUS is not set
-CONFIG_NSOCKET_DESCRIPTORS=5
-CONFIG_NET_NACTIVESOCKETS=16
-CONFIG_NET_SOCKOPTS=y
-# CONFIG_NET_SOLINGER is not set
-CONFIG_NET_ETH_MTU=1514
-# CONFIG_NET_TCPURGDATA is not set
-
-#
-# TCP/IP Networking
-#
-CONFIG_NET_TCP=y
-CONFIG_NET_TCP_CONNS=40
-CONFIG_NET_MAX_LISTENPORTS=40
-CONFIG_NET_TCP_READAHEAD=y
-# CONFIG_NET_TCP_WRITE_BUFFERS is not set
-CONFIG_NET_TCP_RECVDELAY=0
-# CONFIG_NET_TCPBACKLOG is not set
-# CONFIG_NET_TCP_SPLIT is not set
-# CONFIG_NET_SENDFILE is not set
-
-#
-# UDP Networking
-#
-CONFIG_NET_UDP=y
-CONFIG_NET_UDP_CHECKSUMS=y
-CONFIG_NET_UDP_CONNS=8
-CONFIG_NET_BROADCAST=y
-# CONFIG_NET_RXAVAIL is not set
-CONFIG_NET_ICMP=y
-CONFIG_NET_ICMP_PING=y
-# CONFIG_NET_IGMP is not set
-CONFIG_NET_STATISTICS=y
-CONFIG_NET_ETH_TCP_RECVWNDO=1460
-CONFIG_NET_ARPTAB_SIZE=8
-# CONFIG_NET_ARP_IPIN is not set
-CONFIG_NET_IOB=y
-CONFIG_IOB_NBUFFERS=24
-CONFIG_IOB_BUFSIZE=196
-CONFIG_IOB_NCHAINS=8
-CONFIG_IOB_THROTTLE=0
-
-#
-# Routing Table Configuration
-#
-# CONFIG_NET_ROUTE is not set
-CONFIG_NET_ETHERNET=y
-
-#
-# File Systems
-#
-
-#
-# File system configuration
-#
-# CONFIG_DISABLE_MOUNTPOINT is not set
-# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
-# CONFIG_FS_READABLE is not set
-# CONFIG_FS_WRITABLE is not set
-# CONFIG_FS_RAMMAP is not set
-# CONFIG_FS_FAT is not set
-# CONFIG_NFS is not set
-# CONFIG_FS_NXFFS is not set
-# CONFIG_FS_ROMFS is not set
-# CONFIG_FS_SMARTFS is not set
-# CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
-
-#
-# Graphics Support
-#
-# CONFIG_NX is not set
-
-#
-# Memory Management
-#
-# CONFIG_MM_SMALL is not set
-CONFIG_MM_REGIONS=1
-# CONFIG_ARCH_HAVE_HEAP2 is not set
-# CONFIG_GRAN is not set
-
-#
-# Audio Support
-#
-# CONFIG_AUDIO is not set
-
-#
-# Binary Formats
-#
-# CONFIG_BINFMT_DISABLE is not set
-# CONFIG_BINFMT_EXEPATH is not set
-# CONFIG_NXFLAT is not set
-# CONFIG_ELF is not set
-# CONFIG_BUILTIN is not set
-# CONFIG_PIC is not set
-# CONFIG_SYMTAB_ORDEREDBYNAME is not set
-
-#
-# Library Routines
-#
-
-#
-# Standard C Library Options
-#
-CONFIG_STDIO_BUFFER_SIZE=64
-CONFIG_STDIO_LINEBUFFER=y
-CONFIG_NUNGET_CHARS=2
-CONFIG_LIB_HOMEDIR="/"
-# CONFIG_NOPRINTF_FIELDWIDTH is not set
-CONFIG_LIBC_FLOATINGPOINT=y
-CONFIG_LIBC_LONG_LONG=y
-CONFIG_LIB_RAND_ORDER=1
-# CONFIG_EOL_IS_CR is not set
-# CONFIG_EOL_IS_LF is not set
-# CONFIG_EOL_IS_BOTH_CRLF is not set
-CONFIG_EOL_IS_EITHER_CRLF=y
-# CONFIG_LIBC_EXECFUNCS is not set
-CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
-CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
-# CONFIG_LIBC_STRERROR is not set
-# CONFIG_LIBC_PERROR_STDOUT is not set
-CONFIG_ARCH_LOWPUTC=y
-CONFIG_LIB_SENDFILE_BUFSIZE=512
-# CONFIG_ARCH_ROMGETC is not set
-CONFIG_ARCH_OPTIMIZED_FUNCTIONS=y
-CONFIG_ARCH_MEMCPY=y
-CONFIG_ARCH_MEMCMP=y
-CONFIG_ARCH_MEMMOVE=y
-CONFIG_ARCH_MEMSET=y
-CONFIG_ARCH_STRCHR=y
-CONFIG_ARCH_STRCMP=y
-CONFIG_ARCH_STRCPY=y
-CONFIG_ARCH_STRNCPY=y
-CONFIG_ARCH_STRLEN=y
-CONFIG_ARCH_STRNLEN=y
-# CONFIG_ARCH_BZERO is not set
-
-#
-# Non-standard Library Support
-#
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_LIB_KBDCODEC is not set
-# CONFIG_LIB_SLCDCODEC is not set
-
-#
-# Basic CXX Support
-#
-# CONFIG_C99_BOOL8 is not set
-# CONFIG_HAVE_CXX is not set
-
-#
-# Application Configuration
-#
-
-#
-# Built-In Applications
-#
-
-#
-# Examples
-#
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
-# CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_DHCPD is not set
-# CONFIG_EXAMPLES_ELF is not set
-# CONFIG_EXAMPLES_FTPC is not set
-# CONFIG_EXAMPLES_FTPD is not set
-# CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
-# CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
-# CONFIG_EXAMPLES_IGMP is not set
-# CONFIG_EXAMPLES_LCDRW is not set
-# CONFIG_EXAMPLES_MM is not set
-# CONFIG_EXAMPLES_MODBUS is not set
-# CONFIG_EXAMPLES_MOUNT is not set
-# CONFIG_EXAMPLES_NETTEST is not set
-# CONFIG_EXAMPLES_NRF24L01TERM is not set
-CONFIG_EXAMPLES_NSH=y
-# CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
-# CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
-# CONFIG_EXAMPLES_NXHELLO is not set
-# CONFIG_EXAMPLES_NXIMAGE is not set
-# CONFIG_EXAMPLES_NXLINES is not set
-# CONFIG_EXAMPLES_NXTEXT is not set
-# CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PASHELLO is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
-# CONFIG_EXAMPLES_SENDMAIL is not set
-# CONFIG_EXAMPLES_SERLOOP is not set
-# CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART is not set
-# CONFIG_EXAMPLES_TCPECHO is not set
-# CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
-# CONFIG_EXAMPLES_TIFF is not set
-# CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
-# CONFIG_EXAMPLES_USBTERM is not set
-# CONFIG_EXAMPLES_WATCHDOG is not set
-# CONFIG_EXAMPLES_WGET is not set
-
-#
-# Graphics Support
-#
-# CONFIG_TIFF is not set
-
-#
-# Interpreters
-#
-# CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
-
-#
-# Network Utilities
-#
-
-#
-# Networking Utilities
-#
-CONFIG_NETUTILS_CODECS=y
-# CONFIG_CODECS_BASE64 is not set
-# CONFIG_CODECS_HASH_MD5 is not set
-# CONFIG_CODECS_URLCODE is not set
-# CONFIG_CODECS_URLCODE_NEWMEMORY is not set
-# CONFIG_CODECS_AVR_URLCODE is not set
-CONFIG_NETUTILS_DHCPC=y
-# CONFIG_NETUTILS_DHCPD is not set
-# CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
-# CONFIG_NETUTILS_JSON is not set
-CONFIG_LIBC_NETDB=y
-CONFIG_NETDB_DNSCLIENT=y
-CONFIG_NETDB_DNSCLIENT_ENTRIES=4
-CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
-# CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TELNETD is not set
-CONFIG_NETUTILS_TFTPC=y
-# CONFIG_NETUTILS_THTTPD is not set
-CONFIG_NETUTILS_NETLIB=y
-CONFIG_NETUTILS_WEBCLIENT=y
-CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
-# CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_DISCOVER is not set
-# CONFIG_NETUTILS_XMLRPC is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
-#
-# NSH Library
-#
-CONFIG_NSH_LIBRARY=y
-CONFIG_NSH_READLINE=y
-# CONFIG_NSH_CLE is not set
-
-#
-# Disable Individual commands
-#
-# CONFIG_NSH_DISABLE_ADDROUTE is not set
-# CONFIG_NSH_DISABLE_CAT is not set
-# CONFIG_NSH_DISABLE_CD is not set
-# CONFIG_NSH_DISABLE_CP is not set
-# CONFIG_NSH_DISABLE_CMP is not set
-# CONFIG_NSH_DISABLE_DD is not set
-# CONFIG_NSH_DISABLE_DF is not set
-# CONFIG_NSH_DISABLE_DELROUTE is not set
-# CONFIG_NSH_DISABLE_ECHO is not set
-# CONFIG_NSH_DISABLE_EXEC is not set
-# CONFIG_NSH_DISABLE_EXIT is not set
-# CONFIG_NSH_DISABLE_FREE is not set
-# CONFIG_NSH_DISABLE_GET is not set
-# CONFIG_NSH_DISABLE_HELP is not set
-# CONFIG_NSH_DISABLE_HEXDUMP is not set
-# CONFIG_NSH_DISABLE_IFCONFIG is not set
-# CONFIG_NSH_DISABLE_KILL is not set
-# CONFIG_NSH_DISABLE_LOSETUP is not set
-# CONFIG_NSH_DISABLE_LS is not set
-# CONFIG_NSH_DISABLE_MB is not set
-# CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
-# CONFIG_NSH_DISABLE_MKRD is not set
-# CONFIG_NSH_DISABLE_MH is not set
-# CONFIG_NSH_DISABLE_MOUNT is not set
-# CONFIG_NSH_DISABLE_MW is not set
-# CONFIG_NSH_DISABLE_PS is not set
-# CONFIG_NSH_DISABLE_PING is not set
-# CONFIG_NSH_DISABLE_PUT is not set
-# CONFIG_NSH_DISABLE_PWD is not set
-# CONFIG_NSH_DISABLE_RM is not set
-# CONFIG_NSH_DISABLE_RMDIR is not set
-# CONFIG_NSH_DISABLE_SET is not set
-# CONFIG_NSH_DISABLE_SH is not set
-# CONFIG_NSH_DISABLE_SLEEP is not set
-# CONFIG_NSH_DISABLE_TEST is not set
-# CONFIG_NSH_DISABLE_UMOUNT is not set
-# CONFIG_NSH_DISABLE_UNSET is not set
-# CONFIG_NSH_DISABLE_USLEEP is not set
-# CONFIG_NSH_DISABLE_WGET is not set
-# CONFIG_NSH_DISABLE_XD is not set
-
-#
-# Configure Command Options
-#
-CONFIG_NSH_CMDOPT_DF_H=y
-CONFIG_NSH_CODECS_BUFSIZE=128
-CONFIG_NSH_CMDOPT_HEXDUMP=y
-CONFIG_NSH_FILEIOSIZE=1024
-CONFIG_NSH_LINELEN=40
-# CONFIG_NSH_DISABLE_SEMICOLON is not set
-CONFIG_NSH_CMDPARMS=y
-CONFIG_NSH_TMPDIR="/tmp"
-CONFIG_NSH_MAXARGUMENTS=6
-CONFIG_NSH_ARGCAT=y
-CONFIG_NSH_NESTDEPTH=3
-# CONFIG_NSH_DISABLESCRIPT is not set
-# CONFIG_NSH_DISABLE_ITEF is not set
-# CONFIG_NSH_DISABLE_LOOPS is not set
-# CONFIG_NSH_DISABLEBG is not set
-CONFIG_NSH_CONSOLE=y
-
-#
-# USB Trace Support
-#
-# CONFIG_NSH_ALTCONDEV is not set
-# CONFIG_NSH_ARCHINIT is not set
-# CONFIG_NSH_DHCPC is not set
-CONFIG_NSH_IPADDR=0xc0a80a02
-CONFIG_NSH_DRIPADDR=0xc0a80a01
-CONFIG_NSH_NETMASK=0xffffff00
-# CONFIG_NSH_DNS is not set
-# CONFIG_NSH_NOMAC is not set
-CONFIG_NSH_MAX_ROUNDTRIP=20
-
-#
-# NxWidgets/NxWM
-#
-
-#
-# Platform-specific Support
-#
-# CONFIG_PLATFORM_CONFIGDATA is not set
-
-#
-# System Libraries and NSH Add-Ons
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# FLASH Program Installation
-#
-# CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
-# CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
-CONFIG_SYSTEM_READLINE=y
-CONFIG_READLINE_ECHO=y
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sysinfo
-#
-
-#
-# USB Monitor
-#
-
-#
-# EMACS-like Command Line Editor
-#
-# CONFIG_SYSTEM_CLE is not set
-
-#
-# VI Work-Alike Editor
-#
-# CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# Zmodem Commands
-#
-# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sabre-6quad/README.txt b/configs/sabre-6quad/README.txt
index 122f28e8d469b9502c2677a38003f379f1d21a15..a9703e5a28be81e7dad0fca292c0cd1ab5bb49bd 100644
--- a/configs/sabre-6quad/README.txt
+++ b/configs/sabre-6quad/README.txt
@@ -79,8 +79,8 @@ Status
   configuration that I used for testing.  I enabled DEBUG output, ran with
   only 2 CPUS, and disabled the RAMLOG:
 
-    +CONFIG_DEBUG=y
-    +CONFIG_DEBUG_VERBOSE=y
+    +CONFIG_DEBUG_FEATURES=y
+    +CONFIG_DEBUG_INFO=y
     +CONFIG_DEBUG_SCHED=y
     +CONFIG_DEBUG_SYMBOLS=y
 
@@ -95,34 +95,31 @@ Status
     -CONFIG_RAMLOG_BUFSIZE=16384
     -CONFIG_RAMLOG_NONBLOCKING=y
     -CONFIG_RAMLOG_NPOLLWAITERS=4
-    -CONFIG_SYSLOG=y
 
   I would also disable debug output from CPU0 so that I could better see the
-  debug output from CPU1:
-
-    $ diff -u libc/syslog/lib_lowsyslog.c libc/syslog/lib_lowsyslog.c.SAVE
-    --- libc/syslog/lib_lowsyslog.c 2016-05-22 14:56:35.130096500 -0600
-    +++ libc/syslog/lib_lowsyslog.c.SAVE    2016-05-20 13:36:22.588330100 -0600
-    @@ -126,7 +126,0 @@
-     {
-       va_list ap;
-       int ret;
-    +if (up_cpu_index() == 0) return 17; // REMOVE ME
-      
-       /* Let lowvsyslog do the work */
-    
-       va_start(ap, fmt);
-  
-    $ diff -u libc/syslog/lib_syslog.c libc/syslog/lib_syslog.c.SAVE
-    --- libc/syslog/lib_syslog.c    2016-05-22 14:56:35.156098100 -0600
-    +++ libc/syslog/lib_syslog.c.SAVE       2016-05-20 13:36:15.331284000 -0600
-    @@ -192,6 +192,7 @@
-     {
-       va_list ap;
-       int ret;
+  debug output from CPU1.  In drivers/syslog/vsyslog.c:
+
     +if (up_cpu_index() == 0) return 17; // REMOVE ME
-    
-       /* Let vsyslog do the work */
+
+2016-11-26: With regard to SMP, the major issue is cache coherency.  I added
+  some special build logic to move spinlock data into the separate, non-
+  cached section.  That gives an improvement in performance but there are
+  still hangs.  These, I have determined, are to other kinds of cache
+  coherency problems.  Semaphores, message queues, etc.  basically all
+  shared data must be made coherent.
+
+  I also added some SCU controls that should enable cache consistency for SMP
+  CPUs, but I don't think I have that working right yet.  See the SMP section
+  below for more information.
+
+2016-11-28:  SMP is unusable until the SCU cache coherency logic is fixed.
+  I do not know how to do that now.
+
+2016-12-01:  I committed a completely untest SPI driver.  This was taken
+  directly from the i.MX1 and is most certainly not ready for use yet.
+
+2016-12-07:  Just a note to remind myself.  The PL310 L2 cache has *not*
+  yet been enbled.
 
 Platform Features
 =================
@@ -505,9 +502,6 @@ The i.MX6 6Quad has 4 CPUs.  Support is included for testing an SMP
 configuration.  That configuration is still not yet ready for usage but can
 be enabled with the following configuration settings:
 
-  Build Setup:
-    CONFIG_EXPERIMENTAL=y
-
   RTOS Features -> Tasks and Scheduling
     CONFIG_SPINLOCK=y
     CONFIG_SMP=y
@@ -518,53 +512,64 @@ Open Issues:
 
 1. Currently all device interrupts are handled on CPU0 only.  Critical sections will
    attempt to disable interrupts but will now disable interrupts only on the current
-   CPU (which may not be CPU0).  Perhaps that should be a spinlock to prohibit
-   execution of interrupts on CPU0 when other CPUs are in a critical section?
-
-2. Cache Concurency.  This is a complex problem.  There is logic in place now to
-   clean CPU0 D-cache before starting a new CPU and for invalidating the D-Cache
-   when the new CPU is started.  REVISIT:  Seems that this should not be necessary.
-   If the Shareable bit set in the MMU mappings and my understanding is that this
-   should keep cache coherency at least within a cluster.  I need to study more
-   how the inner and outer shareable attribute works to control cacheing
-
-   But there may are many, many more such cache coherency issues if I cannot find
-   a systematic way to manage cache coherency.
-
-   http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dht0008a/CJABEHDA.html
-   http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0024a/CEGDBEJE.html
-
-   Try:
-
-    --- mmu.h.orig  2016-05-20 13:09:34.773462000 -0600
-    +++ mmu.h       2016-05-20 13:03:13.261978100 -0600
-    @@ -572,8 +572,14 @@
-
-     #define MMU_ROMFLAGS         (PMD_TYPE_SECT | PMD_SECT_AP_R1 | PMD_CACHEABLE | \
-                                   PMD_SECT_DOM(0))
-    -#define MMU_MEMFLAGS         (PMD_TYPE_SECT | PMD_SECT_AP_RW1 | PMD_CACHEABLE | \
-    +#ifdef CONFIG_SMP
-    +
-    +#  define MMU_MEMFLAGS       (PMD_TYPE_SECT | PMD_SECT_AP_RW1 | PMD_CACHEABLE | \
-    +                              PMD_SECT_S | PMD_SECT_DOM(0))
-    +#else
-    +#  define MMU_MEMFLAGS       (PMD_TYPE_SECT | PMD_SECT_AP_RW1 | PMD_CACHEABLE | \
-                                   PMD_SECT_DOM(0))
-    +#endif
-     #define MMU_IOFLAGS          (PMD_TYPE_SECT | PMD_SECT_AP_RW1 | PMD_DEVICE | \
-                                   PMD_SECT_DOM(0) | PMD_SECT_XN)
-     #define MMU_STRONGLY_ORDERED (PMD_TYPE_SECT | PMD_SECT_AP_RW1 | \
-
-3. Assertions.  On a fatal assertions, other CPUs need to be stopped.  The SCR,
-   however, only supports disabling CPUs 1 through 3.  Perhaps if the assertion
-   occurs on CPUn, n > 0, then it should use and SGI to perform the assertion
-   on CPU0 always.  From CPU0, CPU1-3 can be disabled.
-
-4. Caching probabaly interferes with spinlocks as they are currently implemented.
-   Waiting on a cached copy of the spinlock may result in a hang or a failure to
-   wait.
-
-5. Do spinlocks need to go into a special "strongly ordered" memory region?
+   CPU (which may not be CPU0).  There is a spinlock to prohibit entrance into these
+   critical sections in interrupt handlers of other CPUs.
+
+   When the critical section is used to lock a resource that is also used by
+   interupt handling, the interrupt handling logic must also take the spinlock.
+   This will cause the interrupt handlers on other CPUs to spin until
+   leave_critical_section() is called.  More verification is needed.
+
+2. Cache Concurency.  Cache coherency in SMP configurations is managed by the
+   MPCore snoop control unit (SCU).  But I don't think I have the set up
+   correctly yet.
+
+   Currently cache inconsistencies appear to be the root cause of all current SMP
+   issues.  SMP works as expected if the caches are disabled, but otherwise there
+   are problems (usually hangs):
+
+   This will disable the caches:
+
+diff --git a/arch/arm/src/armv7-a/arm_head.S b/arch/arm/src/armv7-a/arm_head.S
+index 27c2a5b..2a6274c 100644
+--- a/arch/arm/src/armv7-a/arm_head.S
++++ b/arch/arm/src/armv7-a/arm_head.S
+@@ -454,6 +454,7 @@ __start:
+         * after SMP cache coherency has been setup.
+         */
+
++#if 0 // REMOVE ME
+ #if !defined(CPU_DCACHE_DISABLE) && !defined(CONFIG_SMP)
+        /* Dcache enable
+         *
+@@ -471,6 +472,7 @@ __start:
+
+        orr             r0, r0, #(SCTLR_I)
+ #endif
++#endif // REMOVE ME
+
+ #ifdef CPU_ALIGNMENT_TRAP
+        /* Alignment abort enable
+diff --git a/arch/arm/src/armv7-a/arm_scu.c b/arch/arm/src/armv7-a/arm_scu.c
+index eedf179..1db2092 100644
+--- a/arch/arm/src/armv7-a/arm_scu.c
++++ b/arch/arm/src/armv7-a/arm_scu.c
+@@ -156,6 +156,7 @@ static inline void arm_set_actlr(uint32_t actlr)
+
+ void arm_enable_smp(int cpu)
+ {
++#if 0 // REMOVE ME
+   uint32_t regval;
+
+   /* Handle actions unique to CPU0 which comes up first */
+@@ -222,6 +223,7 @@ void arm_enable_smp(int cpu)
+   regval  = arm_get_sctlr();
+   regval |= SCTLR_C;
+   arm_set_sctlr(regval);
++#endif // REMOVE ME
+ }
+
+ #endif
 
 Configurations
 ==============
@@ -653,10 +658,8 @@ Configuration sub-directories
        RAMLOG and will not be visible unless you use the nsh 'dmesg'
        command.  To disable this RAMLOG feature, disable the following:
 
-       File Systems:    CONFIG_SYSLOG
        Device Drivers:  CONFIG_RAMLOG
 
-
   smp
   ---
     This is a configuration of testing the SMP configuration.  It is
diff --git a/configs/sabre-6quad/nsh/Make.defs b/configs/sabre-6quad/nsh/Make.defs
index cba549a9fb4eaa882ba80e5ed1d845fbe75a693d..887064d0e117741245ec1d352e32b6ba399260a3 100644
--- a/configs/sabre-6quad/nsh/Make.defs
+++ b/configs/sabre-6quad/nsh/Make.defs
@@ -70,7 +70,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a9 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sabre-6quad/nsh/defconfig b/configs/sabre-6quad/nsh/defconfig
index 25b14c99ff4775dcbf9efa0a79118377fac1cc76..f6f07a5016133d4c3e474b8015181b4485733f62 100644
--- a/configs/sabre-6quad/nsh/defconfig
+++ b/configs/sabre-6quad/nsh/defconfig
@@ -46,10 +46,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +64,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +79,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -162,10 +164,16 @@ CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW=y
 # CONFIG_ARCH_CHIP_IMX6_6DUAL is not set
 CONFIG_ARCH_CHIP_IMX6_6QUAD=y
 # CONFIG_IMX6_HAVE_HDCP is not set
+# CONFIG_IMX6_ECSPI is not set
 
 #
 # iMX.6 Peripheral Selection
 #
+# CONFIG_IMX6_ECSPI1 is not set
+# CONFIG_IMX6_ECSPI2 is not set
+# CONFIG_IMX6_ECSPI3 is not set
+# CONFIG_IMX6_ECSPI4 is not set
+# CONFIG_IMX6_ECSPI5 is not set
 CONFIG_IMX6_UART1=y
 # CONFIG_IMX6_UART2 is not set
 # CONFIG_IMX6_UART3 is not set
@@ -253,16 +261,14 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -282,6 +288,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2016
 CONFIG_START_MONTH=3
@@ -294,6 +301,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SMP is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -379,6 +387,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 CONFIG_DEV_ZERO=y
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -394,12 +403,16 @@ CONFIG_DEV_ZERO=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -407,8 +420,18 @@ CONFIG_DEV_ZERO=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -416,6 +439,7 @@ CONFIG_DEV_ZERO=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -424,9 +448,10 @@ CONFIG_DEV_ZERO=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -450,10 +475,6 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
@@ -477,25 +498,33 @@ CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
 # CONFIG_UART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 CONFIG_RAMLOG=y
-CONFIG_RAMLOG_SYSLOG=y
 # CONFIG_RAMLOG_CONSOLE is not set
 CONFIG_RAMLOG_BUFSIZE=16384
 # CONFIG_RAMLOG_CRLF is not set
 CONFIG_RAMLOG_NONBLOCKING=y
 CONFIG_RAMLOG_NPOLLWAITERS=4
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_RAMLOG_SYSLOG=y
 # CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -541,13 +570,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-# CONFIG_SYSLOG_CHAR is not set
-
 #
 # Graphics Support
 #
@@ -598,6 +620,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -613,7 +637,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -622,8 +645,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -655,9 +680,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -665,10 +690,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -678,35 +703,34 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -730,8 +754,9 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -797,12 +822,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -819,6 +844,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -857,12 +883,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -870,6 +896,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sabre-6quad/scripts/dramboot.ld b/configs/sabre-6quad/scripts/dramboot.ld
index f1134bcc926c23f12a5d115d3c686d1439cab021..a5d696c5ce061aea9c92fce7dd210d547341e63c 100644
--- a/configs/sabre-6quad/scripts/dramboot.ld
+++ b/configs/sabre-6quad/scripts/dramboot.ld
@@ -123,6 +123,7 @@ SECTIONS
 	} > ddr3
 
 	/* Stabs debugging sections. */
+
 	.stab 0 : { *(.stab) }
 	.stabstr 0 : { *(.stabstr) }
 	.stab.excl 0 : { *(.stab.excl) }
diff --git a/configs/sabre-6quad/smp/Make.defs b/configs/sabre-6quad/smp/Make.defs
index b5ba0e4111d7e43e4655f32a1ba248d2bdfffd0e..11082623c45b52b5e8e769926161e9fb010dfa60 100644
--- a/configs/sabre-6quad/smp/Make.defs
+++ b/configs/sabre-6quad/smp/Make.defs
@@ -70,7 +70,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a9 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sabre-6quad/smp/defconfig b/configs/sabre-6quad/smp/defconfig
index 2cd36db12740316d7829623dc0bd869e5c6e2134..3d00dd17b376ba7f30b17460fbd16173fcea16f3 100644
--- a/configs/sabre-6quad/smp/defconfig
+++ b/configs/sabre-6quad/smp/defconfig
@@ -46,10 +46,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +64,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +79,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -165,10 +167,16 @@ CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW=y
 # CONFIG_ARCH_CHIP_IMX6_6DUAL is not set
 CONFIG_ARCH_CHIP_IMX6_6QUAD=y
 # CONFIG_IMX6_HAVE_HDCP is not set
+# CONFIG_IMX6_ECSPI is not set
 
 #
 # iMX.6 Peripheral Selection
 #
+# CONFIG_IMX6_ECSPI1 is not set
+# CONFIG_IMX6_ECSPI2 is not set
+# CONFIG_IMX6_ECSPI3 is not set
+# CONFIG_IMX6_ECSPI4 is not set
+# CONFIG_IMX6_ECSPI5 is not set
 CONFIG_IMX6_UART1=y
 # CONFIG_IMX6_UART2 is not set
 # CONFIG_IMX6_UART3 is not set
@@ -256,16 +264,14 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -285,6 +291,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2016
 CONFIG_START_MONTH=3
@@ -308,7 +315,7 @@ CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
 # CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=31
-CONFIG_MAX_TASKS=16
+CONFIG_MAX_TASKS=32
 # CONFIG_SCHED_HAVE_PARENT is not set
 CONFIG_SCHED_WAITPID=y
 
@@ -317,6 +324,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -386,6 +395,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 CONFIG_DEV_ZERO=y
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -401,12 +411,16 @@ CONFIG_DEV_ZERO=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -414,8 +428,18 @@ CONFIG_DEV_ZERO=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -423,6 +447,7 @@ CONFIG_DEV_ZERO=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -431,9 +456,10 @@ CONFIG_DEV_ZERO=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -457,10 +483,6 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
@@ -484,25 +506,33 @@ CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
 # CONFIG_UART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 CONFIG_RAMLOG=y
-CONFIG_RAMLOG_SYSLOG=y
 # CONFIG_RAMLOG_CONSOLE is not set
 CONFIG_RAMLOG_BUFSIZE=16384
 # CONFIG_RAMLOG_CRLF is not set
 CONFIG_RAMLOG_NONBLOCKING=y
 CONFIG_RAMLOG_NPOLLWAITERS=4
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_RAMLOG_SYSLOG=y
 # CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -548,13 +578,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-# CONFIG_SYSLOG_CHAR is not set
-
 #
 # Graphics Support
 #
@@ -606,6 +629,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -621,17 +646,20 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -663,9 +691,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -673,10 +701,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -686,35 +714,37 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
-# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+CONFIG_EXAMPLES_SMP=y
+CONFIG_EXAMPLES_SMP_NBARRIER_THREADS=8
+CONFIG_EXAMPLES_SMP_PRIORITY=100
+CONFIG_EXAMPLES_SMP_STACKSIZE=2048
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -738,8 +768,9 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -805,12 +836,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -827,11 +858,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -865,12 +898,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -878,6 +911,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sabre-6quad/src/imx_appinit.c b/configs/sabre-6quad/src/imx_appinit.c
index 7b7f66ead6139342aa6ecd9adb61b37d2dbc8f6b..2e32a6771f3d0830069bd80ed11873eb0efd892a 100644
--- a/configs/sabre-6quad/src/imx_appinit.c
+++ b/configs/sabre-6quad/src/imx_appinit.c
@@ -45,7 +45,7 @@
 
 #include "sabre-6quad.h"
 
-#if defined(CONFIG_LIB_BOARDCTL) && !defined(CONFIG_BUILD_KERNEL)
+#ifdef CONFIG_LIB_BOARDCTL
 
 /****************************************************************************
  * Public Functions
@@ -87,4 +87,4 @@ int board_app_initialize(uintptr_t arg)
 #endif
 }
 
-#endif /* CONFIG_LIB_BOARDCTL && !CONFIG_BUILD_KERNEL */
+#endif /* CONFIG_LIB_BOARDCTL */
diff --git a/configs/sabre-6quad/src/imx_autoleds.c b/configs/sabre-6quad/src/imx_autoleds.c
index 10a3a556d9697a0b625a96d180ecdf7eacef9b97..9a9b1cd9e5e127cb2058d2a11927ddbc0b3b2c17 100644
--- a/configs/sabre-6quad/src/imx_autoleds.c
+++ b/configs/sabre-6quad/src/imx_autoleds.c
@@ -78,22 +78,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/sabre-6quad/src/imx_boardinit.c b/configs/sabre-6quad/src/imx_boardinit.c
index f67592caf87ec1587ad62b2219c52a04653bd96c..80dbc589a1bb56c8848b9fc5314f613cc8304366 100644
--- a/configs/sabre-6quad/src/imx_boardinit.c
+++ b/configs/sabre-6quad/src/imx_boardinit.c
@@ -62,14 +62,40 @@
  * Public Functions
  ****************************************************************************/
 
+/****************************************************************************
+ * Name: imx_memory_initialize
+ *
+ * Description:
+ *   All i.MX6 architectures must provide the following entry point.  This
+ *   entry point is called early in the initialization before memory has
+ *   been configured.  This board-specific function is responsible for
+ *   configuring any on-board memories.
+ *
+ *   Logic in imx_memory_initialize must be careful to avoid using any
+ *   global variables because those will be uninitialized at the time this
+ *   function is called.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void imx_memory_initialize(void)
+{
+  /* SDRAM was initialized by a bootloader in the supported configurations. */
+}
+
 /****************************************************************************
  * Name: imx_board_initialize
  *
  * Description:
  *   All i.MX6 architectures must provide the following entry point.  This
- *   entry point is called early in the initialization -- after all memory
- *   has been configured and mapped but before any devices have been
- *   initialized.
+ *   entry point is called in the initialization phase -- after
+ *   imx_memory_initialize and after all memory has been configured and
+ *   mapped but before any devices have been initialized.
  *
  * Input Parameters:
  *   None
diff --git a/configs/sabre-6quad/src/imx_bringup.c b/configs/sabre-6quad/src/imx_bringup.c
index d4ace48cd48a8d1119aac125e4a219440b5eaadb..6c3f4949ba26834c6ab1ac7f8653bc4d19c4da19 100644
--- a/configs/sabre-6quad/src/imx_bringup.c
+++ b/configs/sabre-6quad/src/imx_bringup.c
@@ -40,26 +40,11 @@
 #include 
 
 #include 
-#include 
+#include 
+#include 
 
 #include "sabre-6quad.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_BOARD_INITIALIZE
-#  define SYSLOG lldbg
-#else
-#  define SYSLOG dbg
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -74,5 +59,18 @@
 
 int imx_bringup(void)
 {
+  int ret;
+
+#ifdef CONFIG_FS_PROCFS
+  /* Mount the procfs file system */
+
+  ret = mount(NULL, "/proc", "procfs", 0, NULL);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to mount procfs at /proc: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
   return OK;
 }
diff --git a/configs/sam3u-ek/README.txt b/configs/sam3u-ek/README.txt
index 2a03890a2ca3237cc0ceec4183e6dfdfe7a13056..4c7f5137575a439ff0865c2e02bc58782cef4b21 100644
--- a/configs/sam3u-ek/README.txt
+++ b/configs/sam3u-ek/README.txt
@@ -24,24 +24,16 @@ Development Environment
 ^^^^^^^^^^^^^^^^^^^^^^^
 
   Either Linux or Cygwin on Windows can be used for the development environment.
-  The source has been built only using the GNU toolchain (see below).  Other
-  toolchains will likely cause problems. Testing was performed using the Cygwin
-  environment.
+  The source has been built only using the GNU toolchain.  Testing was performed
+  using the Cygwin environment.
 
 GNU Toolchain Options
 ^^^^^^^^^^^^^^^^^^^^^
 
-  The NuttX make system has been modified to support the following different
-  toolchain options.
-
-  1. The CodeSourcery GNU toolchain,
-  2. The devkitARM GNU toolchain, ok
-  4. The NuttX buildroot Toolchain (see below).
-
   All testing has been conducted using the NuttX buildroot toolchain.  To use
-  the CodeSourcery, devkitARM, Atollic, or AtmelStudio GNU toolchain, you simply
-  need to add one of the following configuration options to your .config (or
-  defconfig) file:
+  other toolchains, such as the CodeSourcery, devkitARM, Atollic, or AtmelStudio
+  GNU toolchain, you simply need to add one of the following configuration options
+  to your .config (or defconfig) file:
 
     CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y  : CodeSourcery under Windows
     CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y  : CodeSourcery under Linux
@@ -51,8 +43,8 @@ GNU Toolchain Options
     CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y      : Generic GCC ARM EABI toolchain for Linux
     CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y      : Generic GCC ARM EABI toolchain for Windows
 
-  If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also have to modify
-  the PATH in the setenv.h file if your make cannot find the tools.
+  You may also have to modify the PATH in the setenv.h file if your make cannot
+  find the tools.
 
   NOTE about Windows native toolchains
   ------------------------------------
@@ -157,11 +149,11 @@ NuttX EABI "buildroot" Toolchain
   details PLUS some special instructions that you will need to follow if you are
   building a Cortex-M3 toolchain for Cygwin under Windows.
 
-  NOTE:  Unfortunately, the 4.6.3 EABI toolchain is not compatible with the
-  the NXFLAT tools.  See the top-level TODO file (under "Binary loaders") for
-  more information about this problem. If you plan to use NXFLAT, please do not
-  use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain.
-  See instructions below.
+  NOTE:  Unfortunately, the 4.6.3 (and later) GCC toolchain is not compatible
+  with the the NXFLAT tools.  See the top-level TODO file (under "Binary loaders")
+  for more information about this problem. If you plan to use NXFLAT, please do
+  not use the GCC 4.6.3 toochain; instead use an older toolchain (such as the GCC
+  4.3.3 OABI toolchain discussed below).
 
 NuttX OABI "buildroot" Toolchain
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
@@ -624,8 +616,8 @@ Configurations
           debug output on UART0 can be enabled with:
 
           Build Setup:
-            CONFIG_DEBUG=y                    : Enable debug features
-            CONFIG_DEBUG_VERBOSE=y            : Enable verbose debug output
+            CONFIG_DEBUG_FEATURES=y           : Enable debug features
+            CONFIG_DEBUG_INFO=y               : Enable verbose debug output
             CONFIG_DEBUG_INPUT=y              : Enable debug output from input devices
 
     3. Enabling HSMCI support. The SAM3U-KE provides a an SD memory card
diff --git a/configs/sam3u-ek/knsh/Make.defs b/configs/sam3u-ek/knsh/Make.defs
index 7475431366b852d115a126dcfe4240211e983de6..1842df8708ea98fa0fe0a57a9110c96305d965ed 100644
--- a/configs/sam3u-ek/knsh/Make.defs
+++ b/configs/sam3u-ek/knsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sam3u-ek/knsh/defconfig b/configs/sam3u-ek/knsh/defconfig
index e7e5b4d898b291512b999896060d389a188fcd25..c1ce03487cd25c12d94190a0a6e3f0dbe2773e3d 100644
--- a/configs/sam3u-ek/knsh/defconfig
+++ b/configs/sam3u-ek/knsh/defconfig
@@ -47,10 +47,11 @@ CONFIG_NUTTX_USERSPACE=0x00090000
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -64,8 +65,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -77,10 +77,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -99,6 +99,7 @@ CONFIG_ARCH_CHIP_SAM34=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -120,12 +121,15 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="sam34"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 CONFIG_ARM_MPU=y
 CONFIG_ARM_MPU_NREGIONS=8
@@ -137,6 +141,7 @@ CONFIG_ARM_MPU_NREGIONS=8
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -477,7 +482,12 @@ CONFIG_DEV_NULL=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -485,6 +495,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -500,9 +511,10 @@ CONFIG_MMCSD_NSLOTS=1
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -526,10 +538,6 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -556,15 +564,18 @@ CONFIG_UART0_2STOP=0
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -607,12 +618,6 @@ CONFIG_FS_FAT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -680,13 +685,15 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_USRWORK is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
@@ -717,9 +724,9 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_IGMP is not set
 # CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_KEYPADTEST is not set
-# CONFIG_EXAMPLES_IGMP is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -728,20 +735,19 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -753,10 +759,9 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -780,8 +785,8 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -792,6 +797,7 @@ CONFIG_EXAMPLES_NSH=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -904,12 +910,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -917,6 +923,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sam3u-ek/nsh/Make.defs b/configs/sam3u-ek/nsh/Make.defs
index f54ceca5849eb00f858d1d95a861eb2d36a27899..17678fdb9dab95cc0cd0b2826786f9a3aeac198e 100644
--- a/configs/sam3u-ek/nsh/Make.defs
+++ b/configs/sam3u-ek/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sam3u-ek/nsh/defconfig b/configs/sam3u-ek/nsh/defconfig
index 028d86b604a8f70840c101f14ec2538d9d02f401..abc9a2e88150ff3ca4d87ce546812c907a6475d6 100644
--- a/configs/sam3u-ek/nsh/defconfig
+++ b/configs/sam3u-ek/nsh/defconfig
@@ -42,10 +42,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,10 +72,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +94,7 @@ CONFIG_ARCH_CHIP_SAM34=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,12 +116,15 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="sam34"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
@@ -131,6 +135,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -329,8 +334,6 @@ CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -471,7 +474,12 @@ CONFIG_DEV_NULL=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -479,6 +487,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -487,9 +496,10 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -513,10 +523,6 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -543,15 +549,18 @@ CONFIG_UART0_2STOP=0
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -595,12 +604,6 @@ CONFIG_FS_FAT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -667,13 +670,15 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -709,10 +714,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -721,35 +726,34 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -773,8 +777,8 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -785,6 +789,7 @@ CONFIG_EXAMPLES_NSH=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -898,12 +903,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -911,6 +916,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sam3u-ek/nx/Make.defs b/configs/sam3u-ek/nx/Make.defs
index 07ec51c05397e10c9a11473d0213953f57e61d2a..5aa5e69611f98fe1a84006a1cd1cb24f4f712e7d 100644
--- a/configs/sam3u-ek/nx/Make.defs
+++ b/configs/sam3u-ek/nx/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sam3u-ek/nx/defconfig b/configs/sam3u-ek/nx/defconfig
index 5a1d8b2466048c10b4620c25a12b0db207060f6c..746d34e58c3dc69c4a614ca2c7715d2d7ac78b03 100644
--- a/configs/sam3u-ek/nx/defconfig
+++ b/configs/sam3u-ek/nx/defconfig
@@ -42,10 +42,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +97,7 @@ CONFIG_ARCH_CHIP_SAM34=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,12 +119,15 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="sam34"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 CONFIG_ARMV7M_USEBASEPRI=y
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
@@ -131,6 +138,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -324,6 +332,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -342,6 +351,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2010
 CONFIG_START_MONTH=4
@@ -434,6 +444,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -449,12 +460,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -462,11 +477,20 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 # CONFIG_LCD_NOGETRUN is not set
@@ -480,6 +504,7 @@ CONFIG_LCD_MAXPOWER=31
 # CONFIG_LCD_NOKIA6100 is not set
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 # CONFIG_LCD_SSD1351 is not set
@@ -494,11 +519,7 @@ CONFIG_LCD_PORTRAIT=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -506,6 +527,7 @@ CONFIG_LCD_PORTRAIT=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -514,9 +536,10 @@ CONFIG_LCD_PORTRAIT=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -540,10 +563,6 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -566,19 +585,26 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
 # CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -609,12 +635,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -623,6 +643,7 @@ CONFIG_NX_LCDDRIVER=y
 CONFIG_NX_NPLANES=1
 CONFIG_NX_BGCOLOR=0x0
 # CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -747,6 +768,8 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -761,14 +784,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -788,18 +814,18 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -821,20 +847,18 @@ CONFIG_EXAMPLES_NX_DEFAULT_FONT=y
 CONFIG_EXAMPLES_NX_BPP=16
 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set
 CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -846,10 +870,9 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -871,8 +894,9 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -883,6 +907,7 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -904,16 +929,17 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sam3u-ek/nxwm/Make.defs b/configs/sam3u-ek/nxwm/Make.defs
index dbd49e2239e05433c7df017b8bda074b8a4d949f..549c3eba8fcfba1563e6b2b9e26c8c356344a29a 100644
--- a/configs/sam3u-ek/nxwm/Make.defs
+++ b/configs/sam3u-ek/nxwm/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sam3u-ek/nxwm/defconfig b/configs/sam3u-ek/nxwm/defconfig
index fb8be1e62ed0aa07f7745ca3a147d43fb599cf23..64dc6b1b1f6be46b26727db139027fa9f36c3691 100644
--- a/configs/sam3u-ek/nxwm/defconfig
+++ b/configs/sam3u-ek/nxwm/defconfig
@@ -42,10 +42,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +97,7 @@ CONFIG_ARCH_CHIP_SAM34=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,12 +119,15 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="sam34"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
@@ -131,6 +138,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -327,17 +335,15 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
-# CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
+CONFIG_BOARDCTL_TSCTEST=y
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -357,6 +363,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=6
@@ -369,6 +376,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -385,6 +393,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -427,7 +437,7 @@ CONFIG_SIG_SIGWORK=17
 # POSIX Message Queue Options
 #
 CONFIG_PREALLOC_MQ_MSGS=32
-CONFIG_MQ_MAXMSGSIZE=48
+CONFIG_MQ_MAXMSGSIZE=64
 # CONFIG_MODULE is not set
 
 #
@@ -455,6 +465,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=1024
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -470,19 +481,24 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -507,11 +523,20 @@ CONFIG_ADS7843E_THRESHY=39
 # CONFIG_BUTTONS is not set
 # CONFIG_DJOYSTICK is not set
 # CONFIG_AJOYSTICK is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 # CONFIG_LCD_NOGETRUN is not set
@@ -526,6 +551,7 @@ CONFIG_LCD_MAXPOWER=31
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
 # CONFIG_LCD_UG9664HSWAG01 is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 # CONFIG_LCD_SSD1351 is not set
@@ -540,11 +566,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -552,6 +574,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -560,9 +583,10 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -586,10 +610,6 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -612,19 +632,26 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
 # CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -661,12 +688,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -675,6 +696,7 @@ CONFIG_NX_LCDDRIVER=y
 CONFIG_NX_NPLANES=1
 CONFIG_NX_BGCOLOR=0x0
 CONFIG_NX_WRITEONLY=y
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -750,13 +772,14 @@ CONFIG_NXFONT_SANS22X29B=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 CONFIG_NXTERM=y
 
 #
 # NxTerm Output Text/Graphics Options
 #
 CONFIG_NXTERM_BPP=16
-CONFIG_NXTERM_CURSORCHAR=137
+CONFIG_NXTERM_CURSORCHAR=95
 CONFIG_NXTERM_MXCHARS=325
 CONFIG_NXTERM_CACHESIZE=32
 CONFIG_NXTERM_LINESEPARATION=0
@@ -776,7 +799,10 @@ CONFIG_NX_MULTIUSER=y
 CONFIG_NX_BLOCKING=y
 CONFIG_NX_MXSERVERMSGS=32
 CONFIG_NX_MXCLIENTMSGS=16
-# CONFIG_NX_NXSTART is not set
+# CONFIG_NXSTART_EXTERNINIT is not set
+CONFIG_NXSTART_SERVERPRIO=110
+CONFIG_NXSTART_SERVERSTACK=2048
+CONFIG_NXSTART_DEVNO=0
 
 #
 # Memory Management
@@ -822,6 +848,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -837,14 +865,19 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -871,9 +904,9 @@ CONFIG_CXX_NEWLONG=y
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -881,10 +914,10 @@ CONFIG_CXX_NEWLONG=y
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -894,20 +927,18 @@ CONFIG_CXX_NEWLONG=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -919,10 +950,10 @@ CONFIG_CXX_NEWLONG=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -944,8 +975,9 @@ CONFIG_CXX_NEWLONG=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -956,6 +988,7 @@ CONFIG_CXX_NEWLONG=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -1008,12 +1041,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1030,11 +1063,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 CONFIG_NSH_FILEIOSIZE=512
@@ -1065,10 +1100,7 @@ CONFIG_NXWIDGETS=y
 #
 CONFIG_NXWIDGETS_FLICKERFREE=y
 # CONFIG_NXWIDGETS_EXTERNINIT is not set
-CONFIG_NXWIDGETS_DEVNO=0
 CONFIG_NXWIDGET_SERVERINIT=y
-CONFIG_NXWIDGETS_SERVERPRIO=110
-CONFIG_NXWIDGETS_SERVERSTACK=1596
 CONFIG_NXWIDGETS_CLIENTPRIO=100
 CONFIG_NXWIDGETS_LISTENERPRIO=100
 CONFIG_NXWIDGETS_LISTENERSTACK=1596
@@ -1078,6 +1110,7 @@ CONFIG_NXWIDGETS_LISTENERSTACK=1596
 # NXWidget Configuration
 #
 CONFIG_NXWIDGETS_BPP=16
+# CONFIG_NXWIDGETS_GREYSCALE is not set
 CONFIG_NXWIDGETS_SIZEOFCHAR=1
 
 #
@@ -1161,7 +1194,7 @@ CONFIG_NXWM_TASKBAR_LEFT=y
 CONFIG_NXWM_STARTWINDOW_VSPACING=4
 CONFIG_NXWM_STARTWINDOW_HSPACING=4
 # CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set
-CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm"
+CONFIG_NXWM_STARTWINDOW_MQNAME="nxwm"
 CONFIG_NXWM_STARTWINDOW_MXMSGS=32
 CONFIG_NXWM_STARTWINDOW_MXMPRIO=42
 CONFIG_NXWM_STARTWINDOW_PRIO=100
@@ -1239,12 +1272,12 @@ CONFIG_NXWM_HEXCALCULATOR_FONTID=5
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1252,6 +1285,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sam3u-ek/src/sam_buttons.c b/configs/sam3u-ek/src/sam_buttons.c
index 57d087792ff24b34243db9e9540b2dd5170c90ef..520f05e1a54a2062503074256debdda802606d1f 100644
--- a/configs/sam3u-ek/src/sam_buttons.c
+++ b/configs/sam3u-ek/src/sam_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sam3u-ek/src/up_leds.c
  *
- *   Copyright (C) 2010, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010, 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -53,19 +54,6 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-#if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-static xcpt_t g_irqbutton1;
-static xcpt_t g_irqbutton2;
-#endif
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -79,10 +67,9 @@ static xcpt_t g_irqbutton2;
  ****************************************************************************/
 
 #if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-static xcpt_t board_button_irqx(gpio_pinset_t pinset, int irq,
-                                xcpt_t irqhandler, xcpt_t *store)
+static int board_button_irqx(gpio_pinset_t pinset, int irq, xcpt_t irqhandler,
+                             void *arg)
 {
-  xcpt_t oldhandler;
   irqstate_t flags;
 
   /* Disable interrupts until we are done.  This guarantees that the following
@@ -91,11 +78,6 @@ static xcpt_t board_button_irqx(gpio_pinset_t pinset, int irq,
 
   flags = enter_critical_section();
 
-  /* Get the old button interrupt handler and save the new one */
-
-  oldhandler = *store;
-  *store = irqhandler;
-
   /* Are we attaching or detaching? */
 
   if (irqhandler != NULL)
@@ -103,7 +85,7 @@ static xcpt_t board_button_irqx(gpio_pinset_t pinset, int irq,
       /* Configure the interrupt */
 
       sam_gpioirq(pinset);
-      (void)irq_attach(irq, irqhandler);
+      (void)irq_attach(irq, irqhandler, arg);
       sam_gpioirqenable(irq);
     }
   else
@@ -115,10 +97,7 @@ static xcpt_t board_button_irqx(gpio_pinset_t pinset, int irq,
     }
 
   leave_critical_section(flags);
-
-  /* Return the old button handler (so that it can be restored) */
-
-  return oldhandler;
+  return OK;
 }
 #endif
 
@@ -170,8 +149,7 @@ uint8_t board_buttons(void)
  * Description:
  *   This function may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is one
- *   of the BUTTON* definitions provided above. The previous interrupt
- *   handler address isreturned (so that it may restored, if so desired).
+ *   of the BUTTON* definitions provided above.
  *
  * Configuration Notes:
  *   Configuration CONFIG_AVR32_GPIOIRQ must be selected to enable the
@@ -183,21 +161,19 @@ uint8_t board_buttons(void)
  ****************************************************************************/
 
 #if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
   if (id == BUTTON1)
     {
-      return board_button_irqx(GPIO_BUTTON1, IRQ_BUTTON1,
-                               irqhandler, &g_irqbutton1);
+      return board_button_irqx(GPIO_BUTTON1, IRQ_BUTTON1, irqhandler, arg);
     }
   else if (id == BUTTON2)
     {
-      return board_button_irqx(GPIO_BUTTON2, IRQ_BUTTON2,
-                               irqhandler, &g_irqbutton2);
+      return board_button_irqx(GPIO_BUTTON2, IRQ_BUTTON2, irqhandler, arg);
     }
   else
     {
-      return NULL;
+      return -EINVAL;
     }
 }
 #endif
diff --git a/configs/sam3u-ek/src/sam_lcd.c b/configs/sam3u-ek/src/sam_lcd.c
index c2a13f115b034f60f04057460c40b7f5f41e79bf..25aa1822ae6c774b1032817a17b149459cab3209 100644
--- a/configs/sam3u-ek/src/sam_lcd.c
+++ b/configs/sam3u-ek/src/sam_lcd.c
@@ -142,12 +142,12 @@
 
 /* Verbose debug must also be enabled */
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_FEATURES
+#  undef CONFIG_DEBUG_INFO
 #  undef CONFIG_DEBUG_LED
 #endif
 
-#ifndef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_INFO
 #  undef CONFIG_LCD_REGDEBUG
 #endif
 
@@ -157,22 +157,6 @@
 #  error "CONFIG_LCD_MAXCONTRAST must be defined in the range 1 to 31"
 #endif
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_LCD_REGDEBUG
-#  define regdbg(format, ...)  vdbg(format, ##__VA_ARGS__)
-#else
-#  define regdbg(x...)
-#endif
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg(format, ...)  dbg(format, ##__VA_ARGS__)
-#  define lcdvdbg(format, ...) vdbg(format, ##__VA_ARGS__)
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /* Graphics Capbilities ***************************************************************/
 
 /* LCD resolution: 320 (columns) by 240 (rows).  The physical dimensions of the device
@@ -314,7 +298,7 @@ struct sam_dev_s
 /* Low-level HX834x Register access */
 
 static void sam_putreg(uint16_t reg,  uint16_t data);
-#ifdef CONFIG_DEBUG_LCD
+#ifdef CONFIG_DEBUG_LCD_INFO
 static uint16_t sam_getreg(uint16_t reg);
 #endif
 
@@ -327,7 +311,7 @@ static inline uint16_t sam_rdram(void);
 static void sam_lcdon(void);
 static void sam_lcdoff(void);
 
-#if 0 /* CONFIG_DEBUG_LCD */
+#if 0 /* CONFIG_DEBUG_LCD_INFO */
 static void sam_dumpreg(uint8_t startreg, uint8_t endreg);
 #endif
 
@@ -438,7 +422,8 @@ static struct sam_dev_s g_lcddev_s =
 
 static void sam_putreg(uint16_t reg,  uint16_t data)
 {
-  regdbg("base: %08x RS: %04x data: %04x\n", LCD_BASE, LCD_BASE + HX843X_LCD_RS, data);
+  lcdinfo("base: %08x RS: %04x data: %04x\n",
+          LCD_BASE, LCD_BASE + HX843X_LCD_RS, data);
   putreg16(reg, LCD_BASE);
   putreg16(data, LCD_BASE + HX843X_LCD_RS);
 }
@@ -451,13 +436,15 @@ static void sam_putreg(uint16_t reg,  uint16_t data)
  *
  **************************************************************************************/
 
-#ifdef CONFIG_DEBUG_LCD
+#ifdef CONFIG_DEBUG_LCD_INFO
 static uint16_t sam_getreg(uint16_t reg)
 {
   uint16_t data;
+
   putreg16(reg, LCD_BASE);
   data = getreg16(LCD_BASE + HX843X_LCD_RS);
-  regdbg("base: %08x RS: %04x data: %04x\n", LCD_BASE, LCD_BASE + HX843X_LCD_RS, data);
+  lcdinfo("base: %08x RS: %04x data: %04x\n",
+          LCD_BASE, LCD_BASE + HX843X_LCD_RS, data);
   return data;
 }
 #endif
@@ -544,7 +531,7 @@ static void sam_lcdon(void)
 {
   /* Display ON Setting */
 
-  lcdvdbg("ON\n");
+  lcdinfo("ON\n");
   sam_putreg(HX8347_R90H, 0x7f);      /* SAP=0111 1111 */
   sam_putreg(HX8347_R26H, 0x04);      /* GON=0 DTE=0 D=01 */
   up_mdelay(100);
@@ -564,7 +551,7 @@ static void sam_lcdon(void)
 
 static void sam_lcdoff(void)
 {
-  lcdvdbg("OFF\n");
+  lcdinfo("OFF\n");
   sam_putreg(HX8347_R90H, 0x00);      /* SAP=0000 0000 */
   sam_putreg(HX8347_R26H, 0x00);      /* GON=0 DTE=0 D=00 */
 }
@@ -577,7 +564,7 @@ static void sam_lcdoff(void)
  *
  **************************************************************************************/
 
-#if 0 /* CONFIG_DEBUG_LCD */
+#if 0 /* CONFIG_DEBUG_LCD_INFO */
 static void sam_dumpreg(uint8_t startreg, uint8_t endreg)
 {
   uint16_t value;
@@ -586,7 +573,7 @@ static void sam_dumpreg(uint8_t startreg, uint8_t endreg)
   for (addr = startreg; addr <= endreg; addr++)
     {
       value = sam_getreg(addr);
-      lcddbg(" %02x: %04x\n", addr, value);
+      lcdinfo(" %02x: %04x\n", addr, value);
     }
 }
 #endif
@@ -613,7 +600,7 @@ static int sam_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
 
   /* Buffer must be provided and aligned to a 16-bit address boundary */
 
-  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
 
 #ifdef CONFIG_LCD_PORTRAIT
@@ -679,7 +666,7 @@ static int sam_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
 
   /* Buffer must be provided and aligned to a 16-bit address boundary */
 
-  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
 
 #ifdef CONFIG_LCD_PORTRAIT
@@ -730,7 +717,7 @@ static int sam_getvideoinfo(FAR struct lcd_dev_s *dev,
                             FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  lcdvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+  lcdinfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
           g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
   memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
   return OK;
@@ -748,7 +735,7 @@ static int sam_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
                             FAR struct lcd_planeinfo_s *pinfo)
 {
   DEBUGASSERT(dev && pinfo && planeno == 0);
-  lcdvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+  lcdinfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
   memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
   return OK;
 }
@@ -766,7 +753,7 @@ static int sam_getpower(struct lcd_dev_s *dev)
 {
   struct sam_dev_s *priv = (struct sam_dev_s *)dev;
   DEBUGASSERT(dev);
-  lcdvdbg("power: %d\n", priv->power);
+  lcdinfo("power: %d\n", priv->power);
   return priv->power;
 }
 
@@ -790,7 +777,7 @@ static int sam_setpower(struct lcd_dev_s *dev, int power)
   struct sam_dev_s *priv = (struct sam_dev_s *)dev;
   unsigned int i;
 
-  lcdvdbg("power: %d\n", power);
+  lcdinfo("power: %d\n", power);
   DEBUGASSERT(power <= CONFIG_LCD_MAXPOWER);
 
   /* Switch off backlight */
@@ -834,7 +821,7 @@ static int sam_setpower(struct lcd_dev_s *dev, int power)
 
 static int sam_getcontrast(struct lcd_dev_s *dev)
 {
-  lcdvdbg("Not implemented\n");
+  lcdinfo("Not implemented\n");
   return -ENOSYS;
 }
 
@@ -848,7 +835,7 @@ static int sam_getcontrast(struct lcd_dev_s *dev)
 
 static int sam_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
 {
-  lcdvdbg("contrast: %d\n", contrast);
+  lcdinfo("contrast: %d\n", contrast);
   return -ENOSYS;
 }
 
@@ -868,13 +855,13 @@ static int sam_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
 
 int board_lcd_initialize(void)
 {
-#ifdef CONFIG_DEBUG_LCD
+#ifdef CONFIG_DEBUG_LCD_INFO
   uint16_t hxregval;
 #endif
   uint32_t regval;
   unsigned int i;
 
-  lcdvdbg("Initializing\n");
+  lcdinfo("Initializing\n");
 
   /* Enable LCD EXTCS2 pins */
 
@@ -912,7 +899,8 @@ int board_lcd_initialize(void)
   /* Enable SMC peripheral clock */
 
   putreg32((1 << SAM_PID_SMC), SAM_PMC_PCER);
-  regdbg("PMC PCSR: %08x SMC: %08x\n", getreg32(SAM_PMC_PCSR), (1 << SAM_PID_SMC));
+  lcdinfo("PMC PCSR: %08x SMC: %08x\n",
+          getreg32(SAM_PMC_PCSR), (1 << SAM_PID_SMC));
 
   /* Configure SMC CS2 */
 
@@ -932,21 +920,21 @@ int board_lcd_initialize(void)
   regval |= (SMCCS_MODE_READMODE)  | (SMCCS_MODE_WRITEMODE) | (SMCCS_MODE_DBW_16BITS);
   putreg32(regval, SAM_SMCCS_MODE(2));
 
-  regdbg("SMC SETUP[%08x]: %08x PULSE[%08x]: %08x\n",
-         SAM_SMCCS_SETUP(2), getreg32(SAM_SMCCS_SETUP(2)),
-         SAM_SMCCS_PULSE(2), getreg32(SAM_SMCCS_PULSE(2)));
-  regdbg("    CYCLE[%08x]: %08x MODE[%08x]:  %08x\n",
-         SAM_SMCCS_CYCLE(2), getreg32(SAM_SMCCS_CYCLE(2)),
-         SAM_SMCCS_MODE(2),  getreg32(SAM_SMCCS_MODE(2)));
+  lcdinfo("SMC SETUP[%08x]: %08x PULSE[%08x]: %08x\n",
+          SAM_SMCCS_SETUP(2), getreg32(SAM_SMCCS_SETUP(2)),
+          SAM_SMCCS_PULSE(2), getreg32(SAM_SMCCS_PULSE(2)));
+  lcdinfo("    CYCLE[%08x]: %08x MODE[%08x]:  %08x\n",
+          SAM_SMCCS_CYCLE(2), getreg32(SAM_SMCCS_CYCLE(2)),
+          SAM_SMCCS_MODE(2),  getreg32(SAM_SMCCS_MODE(2)));
 
+#ifdef CONFIG_DEBUG_LCD_INFO
   /* Check HX8347 Chip ID */
 
-#ifdef CONFIG_DEBUG_LCD
   hxregval = sam_getreg(HX8347_R67H);
-  lcdvdbg("Chip ID: %04x\n", hxregval);
+  lcdinfo("Chip ID: %04x\n", hxregval);
   if (hxregval != HX8347_CHIPID)
     {
-      lcddbg("Bad chip ID: %04x Expected: %04x\n", hxregval, HX8347_CHIPID);
+      lcderr("ERROR: Bad chip ID: %04x Expected: %04x\n", hxregval, HX8347_CHIPID);
       return -ENODEV;
     }
 #endif
@@ -1049,7 +1037,7 @@ int board_lcd_initialize(void)
 
 FAR struct lcd_dev_s *board_lcd_getdev(int lcddev)
 {
-  lcdvdbg("lcddev: %d\n", lcddev);
+  lcdinfo("lcddev: %d\n", lcddev);
   return lcddev == 0 ? &g_lcddev_s.dev : NULL;
 }
 
diff --git a/configs/sam3u-ek/src/sam_leds.c b/configs/sam3u-ek/src/sam_leds.c
index ee31f1871673e4ad4a1a3b9543942048e39dc3e9..343f680876261e8611460f8bb6530124796decce 100644
--- a/configs/sam3u-ek/src/sam_leds.c
+++ b/configs/sam3u-ek/src/sam_leds.c
@@ -58,18 +58,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 #define LED_OFF        0
 #define LED_ON         1
 #define LED_NOCHANGE   2
diff --git a/configs/sam3u-ek/src/sam_mmcsd.c b/configs/sam3u-ek/src/sam_mmcsd.c
index 2d44104cb0b60ae910af4cf1e5ab68332c331b7b..c411e2f3597791f2110dc4a4b74ec08b3e44119b 100644
--- a/configs/sam3u-ek/src/sam_mmcsd.c
+++ b/configs/sam3u-ek/src/sam_mmcsd.c
@@ -112,7 +112,7 @@ bool sam_cardinserted(unsigned char slot)
     {
 #ifdef GPIO_MCI_CD
       bool inserted = sam_gpioread(GPIO_MCI_CD);
-      fvdbg("inserted: %s\n", inserted ? "NO" : "YES");
+      finfo("inserted: %s\n", inserted ? "NO" : "YES");
       return !inserted;
 #else
       return true;
@@ -135,7 +135,7 @@ bool sam_writeprotected(unsigned char slot)
     {
 #ifdef GPIO_MCI_WP
       bool protected = sam_gpioread(GPIO_MCI_WP);
-      fvdbg("protected: %s\n", inserted ? "YES" : "NO");
+      finfo("protected: %s\n", inserted ? "YES" : "NO");
       return protected;
 #else
       return false;
diff --git a/configs/sam3u-ek/src/sam_spi.c b/configs/sam3u-ek/src/sam_spi.c
index 014dff663559ae6802687091a02dafd217acf4ee..69215483606fb6e2a79660d08edbb86fb06874a8 100644
--- a/configs/sam3u-ek/src/sam_spi.c
+++ b/configs/sam3u-ek/src/sam_spi.c
@@ -55,32 +55,6 @@
 
 #ifdef CONFIG_SAM34_SPI0
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
diff --git a/configs/sam3u-ek/src/sam_touchscreen.c b/configs/sam3u-ek/src/sam_touchscreen.c
index f45efa1ea7693bec389e8475e58022674dff26df..c5cc9df288d0769138965372d0ca1de5fb7172aa 100644
--- a/configs/sam3u-ek/src/sam_touchscreen.c
+++ b/configs/sam3u-ek/src/sam_touchscreen.c
@@ -156,15 +156,15 @@ static int tsc_attach(FAR struct ads7843e_config_s *state, xcpt_t isr)
 {
   /* Attach the ADS7843E interrupt */
 
-  ivdbg("Attaching %p to IRQ %d\n", isr, SAM_TCS_IRQ);
-  return irq_attach(SAM_TCS_IRQ, isr);
+  iinfo("Attaching %p to IRQ %d\n", isr, SAM_TCS_IRQ);
+  return irq_attach(SAM_TCS_IRQ, isr, NULL);
 }
 
 static void tsc_enable(FAR struct ads7843e_config_s *state, bool enable)
 {
   /* Attach and enable, or detach and disable */
 
-  ivdbg("IRQ:%d enable:%d\n", SAM_TCS_IRQ, enable);
+  iinfo("IRQ:%d enable:%d\n", SAM_TCS_IRQ, enable);
   if (enable)
     {
       sam_gpioirqenable(SAM_TCS_IRQ);
@@ -182,7 +182,7 @@ static void tsc_clear(FAR struct ads7843e_config_s *state)
 
 static bool tsc_busy(FAR struct ads7843e_config_s *state)
 {
-#if defined(CONFIG_DEBUG_INPUT) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_INPUT) && defined(CONFIG_DEBUG_INFO)
   static bool last = (bool)-1;
 #endif
 
@@ -191,10 +191,10 @@ static bool tsc_busy(FAR struct ads7843e_config_s *state)
    */
 
   bool busy = sam_gpioread(GPIO_TCS_BUSY);
-#if defined(CONFIG_DEBUG_INPUT) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_INPUT) && defined(CONFIG_DEBUG_INFO)
   if (busy != last)
     {
-      ivdbg("busy:%d\n", busy);
+      iinfo("busy:%d\n", busy);
       last = busy;
     }
 #endif
@@ -207,7 +207,7 @@ static bool tsc_pendown(FAR struct ads7843e_config_s *state)
   /* The /PENIRQ value is active low */
 
   bool pendown = !sam_gpioread(GPIO_TCS_IRQ);
-  ivdbg("pendown:%d\n", pendown);
+  iinfo("pendown:%d\n", pendown);
   return pendown;
 }
 
@@ -238,7 +238,7 @@ int board_tsc_setup(int minor)
   FAR struct spi_dev_s *dev;
   int ret;
 
-  idbg("minor %d\n", minor);
+  iinfo("minor %d\n", minor);
   DEBUGASSERT(minor == 0);
 
   /* Configure and enable the ADS7843E interrupt pin as an input */
@@ -255,7 +255,7 @@ int board_tsc_setup(int minor)
   dev = sam_spibus_initialize(TSC_CSNUM);
   if (!dev)
     {
-      idbg("Failed to initialize SPI chip select %d\n", TSC_CSNUM);
+      ierr("ERROR: Failed to initialize SPI chip select %d\n", TSC_CSNUM);
       return -ENODEV;
     }
 
@@ -264,7 +264,7 @@ int board_tsc_setup(int minor)
   ret = ads7843e_register(dev, &g_tscinfo, CONFIG_ADS7843E_DEVMINOR);
   if (ret < 0)
     {
-      idbg("Failed to initialize SPI chip select %d\n", TSC_CSNUM);
+      ierr("ERROR: Failed to initialize SPI chip select %d\n", TSC_CSNUM);
       /* sam_spibus_uninitialize(dev); */
       return -ENODEV;
     }
diff --git a/configs/sam3u-ek/src/sam_usbdev.c b/configs/sam3u-ek/src/sam_usbdev.c
index 6d189cee424427b21572c93a4f963a6d433e6b48..08a6c57bc86870e415f25c9dcc2450dfd3b6000a 100644
--- a/configs/sam3u-ek/src/sam_usbdev.c
+++ b/configs/sam3u-ek/src/sam_usbdev.c
@@ -75,5 +75,5 @@
 
 void sam_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
diff --git a/configs/sam4cmp-db/Kconfig b/configs/sam4cmp-db/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..9080dfce40d0defb3136c79fbc87a69b4affc074
--- /dev/null
+++ b/configs/sam4cmp-db/Kconfig
@@ -0,0 +1,7 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_BOARD_SAM4CMP_DB
+endif
diff --git a/configs/sam4cmp-db/README.txt b/configs/sam4cmp-db/README.txt
new file mode 100644
index 0000000000000000000000000000000000000000..efe90a669077e28d83339cd8efa6dd223f4a4eef
--- /dev/null
+++ b/configs/sam4cmp-db/README.txt
@@ -0,0 +1,28 @@
+README
+^^^^^^
+
+README for NuttX port to the SAM4CMP-DB board.
+
+  http://www.atmel.com/tools/SAM4CMP-DB.aspx
+
+The board is intended to test NuttX SMP features for dual Cortex-M4.
+
+
+Settings
+^^^^^^^^
+1. Both CPUs are running at 92.160MHz with PLLB.
+2. Serial console can be used via on-board USB-UART (115200/8/N/1)
+3. Interrupt handlers such as timer and UART are handled on CPU0
+4. Both CPUs share internal SRAM0 (128KB)
+5. SRAM1 is used to boot CPU1.
+6. Cache controllers are disabled because of no snooping features.
+
+Status
+^^^^^^
+Currently SMP freature works on the board but is not stable.
+
+1. "nsh> sleep 1 &" works without crash.
+2. "nsh> smp " sometimes works but some assertions might happen.
+3. "nsh> ostest " causes deadlocks during the test.
+
+
diff --git a/configs/sam4cmp-db/include/board.h b/configs/sam4cmp-db/include/board.h
new file mode 100644
index 0000000000000000000000000000000000000000..1339e6ec670dc725add60ea45d8e51bd1402d6af
--- /dev/null
+++ b/configs/sam4cmp-db/include/board.h
@@ -0,0 +1,178 @@
+/************************************************************************************
+ * configs/sam4cmp-db/include/board.h
+ *
+ *   Copyright (C) 2016 Masayuki Ishikawa. All rights reserved.
+ *   Author: Masayuki Ishikawa 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __CONFIGS_SAM4CMP_DB_INCLUDE_BOARD_H
+#define __CONFIGS_SAM4CMP_DB_INCLUDE_BOARD_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#ifndef __ASSEMBLY__
+#  include 
+#endif
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Clocking *************************************************************************/
+/* After power-on reset, the sam3u device is running on a 4MHz internal RC.  These
+ * definitions will configure clocking with MCK = 48MHz, PLLA = 96, and CPU=120MHz.
+ */
+
+/* Main oscillator register settings */
+
+#define BOARD_CKGR_MOR_MOSCXTST    (63 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */
+
+/* PLLA configuration:
+ *
+ * Source: 12MHz crystall at 12MHz
+ * PLLdiv: 10
+ * PLLmul: 1 (bypassed)
+ * Fpll:   (12MHz * 10) / 1 = 120MHz
+ */
+
+#define BOARD_MAINOSC_FREQUENCY    (8192000)
+#define BOARD_CKGR_PLLAR_MUL       (9 << PMC_CKGR_PLLAR_MUL_SHIFT)
+#define BOARD_CKGR_PLLAR_DIV       PMC_CKGR_PLLAR_DIV_BYPASS
+#define BOARD_CKGR_PLLAR_COUNT     (63 << PMC_CKGR_PLLAR_COUNT_SHIFT)
+#define BOARD_PLLA_FREQUENCY       (10*BOARD_MAINOSC_FREQUENCY)
+
+/* PLLB configuration
+ *
+ * Source: MAIN clock (i.e. 8.192MHz)
+ * PLLdiv: 4
+ * PLLmul: 45
+ * Fpll: (8.192MHz * (44+1) / 4 = 92.120 MHz
+ */
+
+#define BOARD_CKGR_PLLBR_SRCB      (0 << PMC_CKGR_PLLBR_SRCB_SHIFT)
+#define BOARD_CKGR_PLLBR_DIV       (4 << PMC_CKGR_PLLBR_DIV_SHIFT)
+#define BOARD_CKGR_PLLBR_MUL       (44 << PMC_CKGR_PLLBR_MUL_SHIFT)
+#define BOARD_CKGR_PLLBR_COUNT     (63 << PMC_CKGR_PLLBR_COUNT_SHIFT)
+#define BOARD_PLLB_FREQUENCY       (92160000)
+
+
+/* PMC master clock register settings */
+
+#define BOARD_PMC_MCKR_CSS         PMC_MCKR_CSS_PLLB
+#define BOARD_PMC_MCKR_PRES        PMC_MCKR_PRES_DIV1
+#define BOARD_MCK_FREQUENCY        (BOARD_PLLB_FREQUENCY/1)
+#define BOARD_CPU_FREQUENCY        (BOARD_PLLB_FREQUENCY/1)
+
+/* USB UTMI PLL start-up time */
+
+#define BOARD_CKGR_UCKR_UPLLCOUNT  (3 << PMC_CKGR_UCKR_UPLLCOUNT_SHIFT)
+
+/* FLASH wait states:
+ *
+ * DC Characteristics
+ *
+ * Parameter              Min   Typ  Max
+ * ---------------------- ----- ----- ----
+ * Vddcore DC Supply Core 1.08V 1.2V 1.32V
+ * Vvddio  DC Supply I/Os 1.62V 3.3V 3.6V
+ *
+ *                     Wait   Maximum
+ * Vddcore   Vvddio   States Frequency (MHz)
+ * ------- ---------- ------ ---------------
+ * 1.08V   1.62-3.6V    0        16
+ * "   "   "  "-"  "    1        33
+ * "   "   "  "-"  "    2        50
+ * "   "   "  "-"  "    3        67
+ * "   "   "  "-"  "    4        84
+ * "   "   "  "-"  "    5       100
+ * 1.08V   2.7-3.6V     0        20
+ * "   "   " "-"  "     1        40
+ * "   "   " "-"  "     2        60
+ * "   "   " "-"  "     3        80
+ * "   "   " "-"  "     4       100
+ * 1.2V    1.62-3.6V    0        17
+ * "  "    " "-"  "     1        34
+ * "  "    " "-"  "     2        52
+ * "  "    " "-"  "     3        69
+ * "  "    " "-"  "     4        87
+ * "  "    " "-"  "     5       104
+ * "  "    " "-"  "     6       121
+ * 1.2V    2.7-3.6V     0        21
+ * "  "    " "-"  "     1        42
+ * "  "    " "-"  "     2        63
+ * "  "    " "-"  "     3        84
+ * "  "    " "-"  "     4       105
+ * "  "    " "-"  "     5       123 << SELECTION
+ */
+
+#define BOARD_FWS                  5
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+/************************************************************************************
+ * Name: sam_boardinitialize
+ *
+ * Description:
+ *   All SAM3U architectures must provide the following entry point.  This entry point
+ *   is called early in the intitialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void sam_boardinitialize(void);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __CONFIGS_SAM4CMP_DB_INCLUDE_BOARD_H */
diff --git a/configs/sam4cmp-db/nsh/Make.defs b/configs/sam4cmp-db/nsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..60acde6e28e7f5846ec8d7d71677e6945730ab0f
--- /dev/null
+++ b/configs/sam4cmp-db/nsh/Make.defs
@@ -0,0 +1,111 @@
+############################################################################
+# configs/sam4cmp-db/nsh/Make.defs
+#
+#   Copyright (C) 2016 Masayuki Ishikawa. All rights reserved.
+#   Author: Masayuki Ishikawa 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/sam4cmp-db/nsh/defconfig b/configs/sam4cmp-db/nsh/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..ed784b3fc0ef757bcf8a51640ccbf1b1e2ae76da
--- /dev/null
+++ b/configs/sam4cmp-db/nsh/defconfig
@@ -0,0 +1,966 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+CONFIG_EXPERIMENTAL=y
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+# CONFIG_INTELHEX_BINARY is not set
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+CONFIG_DEBUG_FEATURES=y
+
+#
+# Debug SYSLOG Output Controls
+#
+CONFIG_DEBUG_ERROR=y
+CONFIG_DEBUG_WARN=y
+# CONFIG_DEBUG_INFO is not set
+CONFIG_DEBUG_ASSERTIONS=y
+
+#
+# Subsystem Debug Options
+#
+# CONFIG_DEBUG_BINFMT is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_GRAPHICS is not set
+# CONFIG_DEBUG_LIB is not set
+# CONFIG_DEBUG_MM is not set
+# CONFIG_DEBUG_SCHED is not set
+
+#
+# OS Function Debug Options
+#
+# CONFIG_DEBUG_IRQ is not set
+
+#
+# Driver Debug Options
+#
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_TIMER is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+CONFIG_DEBUG_NOOPT=y
+# CONFIG_DEBUG_CUSTOMOPT is not set
+# CONFIG_DEBUG_FULLOPT is not set
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+CONFIG_ARCH_CHIP_SAM34=y
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+# CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="sam34"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+# CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+# CONFIG_DEBUG_HARDFAULT is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+
+#
+# AT91SAM3/4 Configuration Options
+#
+# CONFIG_ARCH_CHIP_ATSAM3U4E is not set
+# CONFIG_ARCH_CHIP_ATSAM3U4C is not set
+# CONFIG_ARCH_CHIP_ATSAM3U2E is not set
+# CONFIG_ARCH_CHIP_ATSAM3U2C is not set
+# CONFIG_ARCH_CHIP_ATSAM3U1E is not set
+# CONFIG_ARCH_CHIP_ATSAM3U1C is not set
+# CONFIG_ARCH_CHIP_ATSAM3X8E is not set
+# CONFIG_ARCH_CHIP_ATSAM3X8C is not set
+# CONFIG_ARCH_CHIP_ATSAM3X4E is not set
+# CONFIG_ARCH_CHIP_ATSAM3X4C is not set
+# CONFIG_ARCH_CHIP_ATSAM3A8C is not set
+# CONFIG_ARCH_CHIP_ATSAM3A4C is not set
+CONFIG_ARCH_CHIP_ATSAM4CMP16B=y
+# CONFIG_ARCH_CHIP_ATSAM4LC2C is not set
+# CONFIG_ARCH_CHIP_ATSAM4LC2B is not set
+# CONFIG_ARCH_CHIP_ATSAM4LC2A is not set
+# CONFIG_ARCH_CHIP_ATSAM4LC4C is not set
+# CONFIG_ARCH_CHIP_ATSAM4LC4B is not set
+# CONFIG_ARCH_CHIP_ATSAM4LC4A is not set
+# CONFIG_ARCH_CHIP_ATSAM4LS2C is not set
+# CONFIG_ARCH_CHIP_ATSAM4LS2B is not set
+# CONFIG_ARCH_CHIP_ATSAM4LS2A is not set
+# CONFIG_ARCH_CHIP_ATSAM4LS4C is not set
+# CONFIG_ARCH_CHIP_ATSAM4LS4B is not set
+# CONFIG_ARCH_CHIP_ATSAM4LS4A is not set
+# CONFIG_ARCH_CHIP_ATSAM4SD32C is not set
+# CONFIG_ARCH_CHIP_ATSAM4SD32B is not set
+# CONFIG_ARCH_CHIP_ATSAM4SD16C is not set
+# CONFIG_ARCH_CHIP_ATSAM4SD16B is not set
+# CONFIG_ARCH_CHIP_ATSAM4SA16C is not set
+# CONFIG_ARCH_CHIP_ATSAM4SA16B is not set
+# CONFIG_ARCH_CHIP_ATSAM4S16C is not set
+# CONFIG_ARCH_CHIP_ATSAM4S16B is not set
+# CONFIG_ARCH_CHIP_ATSAM4S8C is not set
+# CONFIG_ARCH_CHIP_ATSAM4S8B is not set
+# CONFIG_ARCH_CHIP_ATSAM4E16E is not set
+# CONFIG_ARCH_CHIP_ATSAM4E16C is not set
+# CONFIG_ARCH_CHIP_ATSAM4E8E is not set
+# CONFIG_ARCH_CHIP_ATSAM4E8C is not set
+# CONFIG_ARCH_CHIP_SAM3U is not set
+# CONFIG_ARCH_CHIP_SAM3X is not set
+# CONFIG_ARCH_CHIP_SAM3A is not set
+CONFIG_ARCH_CHIP_SAM4CM=y
+# CONFIG_ARCH_CHIP_SAM4L is not set
+# CONFIG_ARCH_CHIP_SAM4E is not set
+# CONFIG_ARCH_CHIP_SAM4S is not set
+
+#
+# AT91SAM3/4 Peripheral Support
+#
+# CONFIG_SAM34_ADC12B is not set
+# CONFIG_SAM34_AES is not set
+# CONFIG_SAM34_DMAC1 is not set
+# CONFIG_SAM34_SLCDC is not set
+# CONFIG_SAM34_SPI0 is not set
+# CONFIG_SAM34_TC0 is not set
+# CONFIG_SAM34_TC1 is not set
+# CONFIG_SAM34_TWI is not set
+# CONFIG_SAM34_TWIM is not set
+# CONFIG_SAM34_TWIS is not set
+# CONFIG_SAM34_TWIM0 is not set
+# CONFIG_SAM34_TWIS0 is not set
+# CONFIG_SAM34_TWIM1 is not set
+# CONFIG_SAM34_TWIS1 is not set
+CONFIG_SAM34_UART0=y
+# CONFIG_SAM34_UART1 is not set
+# CONFIG_SAM34_USART0 is not set
+# CONFIG_SAM34_USART1 is not set
+# CONFIG_SAM34_USART2 is not set
+# CONFIG_SAM34_USART3 is not set
+# CONFIG_SAM34_WDT is not set
+
+#
+# AT91SAM3/4 External Memory Configuration
+#
+
+#
+# AT91SAM3/4 GPIO Interrupt Configuration
+#
+# CONFIG_SAM34_HAVE_GPIOD_IRQ is not set
+# CONFIG_SAM34_HAVE_GPIOE_IRQ is not set
+# CONFIG_SAM34_HAVE_GPIOF_IRQ is not set
+# CONFIG_SAM34_GPIO_IRQ is not set
+# CONFIG_SAM34_TC is not set
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+CONFIG_ARCH_HAVE_MULTICPU=y
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+CONFIG_ARCH_HAVE_RAMFUNCS=y
+CONFIG_ARCH_RAMFUNCS=y
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=6124
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=131072
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_SAM4CMP_DB=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="sam4cmp-db"
+
+#
+# Common Board Options
+#
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+CONFIG_DISABLE_ENVIRON=y
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2013
+CONFIG_START_MONTH=6
+CONFIG_START_DAY=12
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+CONFIG_SPINLOCK=y
+CONFIG_SMP=y
+CONFIG_SMP_NCPUS=2
+CONFIG_SMP_IDLETHREAD_STACKSIZE=2048
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=0
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=24
+CONFIG_MAX_TASKS=32
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+CONFIG_DISABLE_POLL=y
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+# CONFIG_ARCH_HAVE_I2CRESET is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_UART0_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# UART0 Configuration
+#
+CONFIG_UART0_RXBUFSIZE=256
+CONFIG_UART0_TXBUFSIZE=256
+CONFIG_UART0_BAUD=115200
+CONFIG_UART0_BITS=8
+CONFIG_UART0_PARITY=0
+CONFIG_UART0_2STOP=0
+# CONFIG_UART0_IFLOWCONTROL is not set
+# CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+CONFIG_FS_READABLE=y
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+# CONFIG_WIRELESS is not set
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+CONFIG_EXAMPLES_OSTEST=y
+CONFIG_EXAMPLES_OSTEST_LOOPS=1
+CONFIG_EXAMPLES_OSTEST_STACKSIZE=8192
+CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=8
+CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000
+CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
+CONFIG_EXAMPLES_OSTEST_WAITRESULT=y
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+CONFIG_EXAMPLES_SMP=y
+CONFIG_EXAMPLES_SMP_NBARRIER_THREADS=8
+CONFIG_EXAMPLES_SMP_PRIORITY=100
+CONFIG_EXAMPLES_SMP_STACKSIZE=2048
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=80
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+# CONFIG_NSH_CMDOPT_DF_H is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/compal_e86/nsh_highram/setenv.sh b/configs/sam4cmp-db/nsh/setenv.sh
old mode 100755
new mode 100644
similarity index 95%
rename from configs/compal_e86/nsh_highram/setenv.sh
rename to configs/sam4cmp-db/nsh/setenv.sh
index 3828a56504e381563a1178342b2bba3ec9b43494..651b20b30810d6181fc56bc141cb355e5f83161b
--- a/configs/compal_e86/nsh_highram/setenv.sh
+++ b/configs/sam4cmp-db/nsh/setenv.sh
@@ -1,8 +1,8 @@
 #!/bin/bash
-# compal_e86/nsh_highram/setenv.sh
+# configs/sam4cmp-db/nsh/setenv.sh
 #
-#   Copyright (C) 2007, 2008, 2011 Gregory Nutt. All rights reserved.
-#   Author: Gregory Nutt 
+#   Copyright (C) 2016 Masayuki Ishikawa. All rights reserved.
+#   Author: Masayuki Ishikawa 
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions
@@ -31,7 +31,6 @@
 # ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 # POSSIBILITY OF SUCH DAMAGE.
 #
-
 if [ "$_" = "$0" ] ; then
   echo "You must source this script, not run it!" 1>&2
   exit 1
diff --git a/configs/sam4cmp-db/scripts/ld.script b/configs/sam4cmp-db/scripts/ld.script
new file mode 100644
index 0000000000000000000000000000000000000000..d82568f84f9817731538829ac1cef97c49b15a17
--- /dev/null
+++ b/configs/sam4cmp-db/scripts/ld.script
@@ -0,0 +1,121 @@
+/****************************************************************************
+ * configs/sam4cmp-db/scripts/ld.script
+ *
+ *   Copyright (C) 2016 Masayuki Ishikawa. All rights reserved.
+ *   Author: Masayuki Ishikawa 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* The ATSAM4CM has 1MB of FLASH beginning at address 0x0100:0000 and
+ * 128KB of SRAM beginning at address 0x2000:0000
+ */
+
+MEMORY
+{
+    flash (rx)  : ORIGIN = 0x01000000, LENGTH = 1024K
+    sram  (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
+}
+
+OUTPUT_ARCH(arm)
+ENTRY(_stext)
+SECTIONS
+{
+	.text : {
+		_stext = ABSOLUTE(.);
+		*(.vectors)
+		*(.text .text.*)
+		*(.fixup)
+		*(.gnu.warning)
+		*(.rodata .rodata.*)
+		*(.gnu.linkonce.t.*)
+		*(.glue_7)
+		*(.glue_7t)
+		*(.got)
+		*(.gcc_except_table)
+		*(.gnu.linkonce.r.*)
+		_etext = ABSOLUTE(.);
+	} > flash
+
+	.init_section : {
+		_sinit = ABSOLUTE(.);
+		*(.init_array .init_array.*)
+		_einit = ABSOLUTE(.);
+	} > flash
+
+	.ARM.extab : {
+		*(.ARM.extab*)
+	} >flash
+
+	__exidx_start = ABSOLUTE(.);
+	.ARM.exidx : {
+		*(.ARM.exidx*)
+	} >flash
+	__exidx_end = ABSOLUTE(.);
+
+	.data : {
+		_sdata = ABSOLUTE(.);
+		*(.data .data.*)
+		*(.gnu.linkonce.d.*)
+		CONSTRUCTORS
+		_edata = ABSOLUTE(.);
+	} > sram AT > flash
+
+	_eronly = LOADADDR(.data);
+
+	.ramfunc ALIGN(4): {
+		_sramfuncs = ABSOLUTE(.);
+		*(.ramfunc  .ramfunc.*)
+		_eramfuncs = ABSOLUTE(.);
+	} > sram AT > flash
+
+	_framfuncs = LOADADDR(.ramfunc);
+
+	.bss : {
+		_sbss = ABSOLUTE(.);
+		*(.bss .bss.*)
+		*(.gnu.linkonce.b.*)
+		*(COMMON)
+		_ebss = ABSOLUTE(.);
+	} > sram
+
+	/* Stabs debugging sections. */
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_info 0 : { *(.debug_info) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/sam4cmp-db/src/Makefile b/configs/sam4cmp-db/src/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..1dd2e0485ce9dc19245b2abf9053a63844310858
--- /dev/null
+++ b/configs/sam4cmp-db/src/Makefile
@@ -0,0 +1,47 @@
+############################################################################
+# configs/sam4cmp-db/src/Makefile
+#
+#   Copyright (C) 2016 Masayuki Ishikawa. All rights reserved.
+#   Author: Masayuki Ishikawa 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+ASRCS =
+CSRCS = sam_boot.c
+
+ifeq ($(CONFIG_LIB_BOARDCTL),y)
+CSRCS += sam_appinit.c sam_bringup.c
+else ifeq ($(CONFIG_BOARD_INITIALIZE),y)
+CSRCS += sam_bringup.c
+endif
+
+include $(TOPDIR)/configs/Board.mk
diff --git a/arch/arm/src/lpc11xx/lpc11_lowgetc.h b/configs/sam4cmp-db/src/sam4cmp-db.h
similarity index 81%
rename from arch/arm/src/lpc11xx/lpc11_lowgetc.h
rename to configs/sam4cmp-db/src/sam4cmp-db.h
index 4c94f39b7844323d6e79196ac3a964d0f845e350..9fab435d5af7ad18d42d3642aebbe50b55a44144 100644
--- a/arch/arm/src/lpc11xx/lpc11_lowgetc.h
+++ b/configs/sam4cmp-db/src/sam4cmp-db.h
@@ -1,8 +1,8 @@
 /************************************************************************************
- * arch/arm/src/lpc11/lpc11_lowgetc.h
+ * configs/sam4cmp-db/src/sam4cmp-db.h
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2016 Masayuki Ishikawa. All rights reserved.
+ *   Author: Masayuki Ishikawa 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -33,50 +33,48 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_LPC11XX_LPC11_LOWGETC_H
-#define __ARCH_ARM_SRC_LPC11XX_LPC11_LOWGETC_H
+#ifndef __CONFIGS_SAM4CMP_DB_SRC_SAM4CMP_DB_H
+#define __CONFIGS_SAM4CMP_DB_SRC_SAM4CMP_DB_H
 
 /************************************************************************************
  * Included Files
  ************************************************************************************/
 
 #include 
-#include "lpc11_serial.h"
+#include 
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
+#include 
+
+#include 
+#include 
+
+#include "chip/sam_pinmap.h"
 
 /************************************************************************************
  * Public Types
  ************************************************************************************/
 
 /************************************************************************************
- * Public Data
+ * Public data
  ************************************************************************************/
 
 #ifndef __ASSEMBLY__
 
-#undef EXTERN
-#if defined(__cplusplus)
-#define EXTERN extern "C"
-extern "C"
-{
-#else
-#define EXTERN extern
-#endif
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
-#ifdef HAVE_SERIAL_CONSOLE
-int lpc11_lowgetc(void);
-#endif
+/************************************************************************************
+ * Name: sam_bringup
+ *
+ * Description:
+ *   Bring up board features
+ *
+ ************************************************************************************/
 
-#undef EXTERN
-#if defined(__cplusplus)
-}
+#if defined(CONFIG_LIB_BOARDCTL) || defined(CONFIG_BOARD_INITIALIZE)
+int sam_bringup(void);
 #endif
+
 #endif /* __ASSEMBLY__ */
-#endif /* __ARCH_ARM_SRC_LPC11XX_LPC11_LOWGETC_H */
+#endif /* __CONFIGS_SAM4CMP_DB_SRC_SAM4CMP_DB_H */
diff --git a/configs/compal_e99/src/boot.c b/configs/sam4cmp-db/src/sam_appinit.c
similarity index 86%
rename from configs/compal_e99/src/boot.c
rename to configs/sam4cmp-db/src/sam_appinit.c
index 8bc7061daf3806c20430c0b39bb69dca26569202..6bab1d575194e8c226d376fedfef3b3a2522a795 100644
--- a/configs/compal_e99/src/boot.c
+++ b/configs/sam4cmp-db/src/sam_appinit.c
@@ -1,8 +1,8 @@
 /****************************************************************************
- * configs/compal_e99/boot.c
+ * config/sam4cmp-db/src/sam_appinit.c
  *
- *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
- *   Author:  Gregory Nutt 
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -38,8 +38,13 @@
  ****************************************************************************/
 
 #include 
+
 #include 
 
+#include "sam4cmp-db.h"
+
+#ifdef CONFIG_LIB_BOARDCTL
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -48,7 +53,9 @@
  * Name: board_app_initialize
  *
  * Description:
- *   Perform architecture specific initialization
+ *   Perform application specific initialization.  This function is never
+ *   called directly from application code, but only indirectly via the
+ *   (non-standard) boardctl() interface using the command BOARDIOC_INIT.
  *
  * Input Parameters:
  *   arg - The boardctl() argument is passed to the board_app_initialize()
@@ -67,9 +74,15 @@
  *
  ****************************************************************************/
 
-#ifdef CONFIG_LIB_BOARDCTL
 int board_app_initialize(uintptr_t arg)
 {
-  return 0;
+#ifndef CONFIG_BOARD_INITIALIZE
+  /* Perform board initialization */
+
+  return sam_bringup();
+#else
+  return OK;
+#endif
 }
+
 #endif /* CONFIG_LIB_BOARDCTL */
diff --git a/configs/sam4cmp-db/src/sam_boot.c b/configs/sam4cmp-db/src/sam_boot.c
new file mode 100644
index 0000000000000000000000000000000000000000..f883f0add6daadd6ba5c7debbd91867ca98af92e
--- /dev/null
+++ b/configs/sam4cmp-db/src/sam_boot.c
@@ -0,0 +1,86 @@
+/************************************************************************************
+ * configs/sam4cmp-db/src/sam_boot.c
+ *
+ *   Copyright (C) 2016 Masayuki Ishikawa. All rights reserved.
+ *   Author: Masayuki Ishikawa 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+
+#include "sam4cmp-db.h"
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: sam_boardinitialize
+ *
+ * Description:
+ *   All SAM3/4 architectures must provide the following entry point.  This entry point
+ *   is called early in the intitialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void sam_boardinitialize(void)
+{
+}
+
+/****************************************************************************
+ * Name: board_initialize
+ *
+ * Description:
+ *   If CONFIG_BOARD_INITIALIZE is selected, then an additional
+ *   initialization call will be performed in the boot-up sequence to a
+ *   function called board_initialize().  board_initialize() will be
+ *   called immediately after up_intitialize() is called and just before the
+ *   initial application is started.  This additional initialization phase
+ *   may be used, for example, to initialize board-specific device drivers.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BOARD_INITIALIZE
+void board_initialize(void)
+{
+  /* Perform board initialization */
+
+  (void)sam_bringup();
+}
+#endif /* CONFIG_BOARD_INITIALIZE */
diff --git a/configs/sam4cmp-db/src/sam_bringup.c b/configs/sam4cmp-db/src/sam_bringup.c
new file mode 100644
index 0000000000000000000000000000000000000000..fbfe1a4106ddd9bc5bdad81acb6f52fd48b475e1
--- /dev/null
+++ b/configs/sam4cmp-db/src/sam_bringup.c
@@ -0,0 +1,81 @@
+/****************************************************************************
+ * config/sam4cmp-db/src/sam_bringup.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sam_bringup
+ *
+ * Description:
+ *   Bring up board features
+ *
+ ****************************************************************************/
+
+int sam_bringup(void)
+{
+  int ret;
+
+#ifdef CONFIG_FS_PROCFS
+  /* Mount the procfs file system */
+
+  ret = mount(NULL, "/proc", "procfs", 0, NULL);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to mount procfs at /proc: %d\n", ret);
+    }
+#endif
+
+  /* If we got here then perhaps not all initialization was successful, but
+   * at least enough succeeded to bring-up NSH with perhaps reduced
+   * capabilities.
+   */
+
+  UNUSED(ret);
+  return OK;
+}
diff --git a/configs/sam4e-ek/README.txt b/configs/sam4e-ek/README.txt
index 90b979059ee30b87f4519cc28c4462bf467ee02a..5f04cb5db410b170920da99c42fce28f7635b420 100644
--- a/configs/sam4e-ek/README.txt
+++ b/configs/sam4e-ek/README.txt
@@ -815,7 +815,7 @@ USB Full-Speed Device
   --------------------
 
   There is normal console debug output available that can be enabled with
-  CONFIG_DEBUG + CONFIG_DEBUG_USB.  However, USB device operation is very
+  CONFIG_DEBUG_FEATURES + CONFIG_DEBUG_USB.  However, USB device operation is very
   time critical and enabling this debug output WILL interfere with the
   operation of the UDP.  USB device tracing is a less invasive way to get
   debug information:  If tracing is enabled, the USB device will save
@@ -837,15 +837,15 @@ USB Full-Speed Device
       CONFIG_NSH_ARCHINIT=y                   : Automatically start the USB monitor
 
     Application Configuration -> System NSH Add-Ons:
-      CONFIG_SYSTEM_USBMONITOR=y              : Enable the USB monitor daemon
-      CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
-      CONFIG_SYSTEM_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
-      CONFIG_SYSTEM_USBMONITOR_INTERVAL=1     : Dump trace data every second
-      CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y    : Enable TRACE output
-      CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y
-      CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y
-      CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y
-      CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y
+      CONFIG_USBMONITOR=y              : Enable the USB monitor daemon
+      CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
+      CONFIG_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
+      CONFIG_USBMONITOR_INTERVAL=1     : Dump trace data every second
+      CONFIG_USBMONITOR_TRACEINIT=y    : Enable TRACE output
+      CONFIG_USBMONITOR_TRACECLASS=y
+      CONFIG_USBMONITOR_TRACETRANSFERS=y
+      CONFIG_USBMONITOR_TRACECONTROLLER=y
+      CONFIG_USBMONITOR_TRACEINTERRUPTS=y
 
   NOTE: If USB debug output is also enabled, both outputs will appear on the
   serial console.  However, the debug output will be asynchronous with the
@@ -943,9 +943,9 @@ Touchscreen
     debug output on UART0 can be enabled with:
 
     Build Setup:
-      CONFIG_DEBUG=y                    : Enable debug features
-      CONFIG_DEBUG_VERBOSE=y            : Enable verbose debug output
-      CONFIG_DEBUG_INPUT=y              : Enable debug output from input devices
+      CONFIG_DEBUG_FEATURES=y               : Enable debug features
+      CONFIG_DEBUG_INFO=y                   : Enable verbose debug output
+      CONFIG_DEBUG_INPUT=y                  : Enable debug output from input devices
 
     STATUS: Verified 2014-05-14
 
@@ -1439,8 +1439,8 @@ Configurations
        debug output on UART0 can be enabled with:
 
        Build Setup:
-         CONFIG_DEBUG=y                    : Enable debug features
-         CONFIG_DEBUG_VERBOSE=y            : Enable verbose debug output
+         CONFIG_DEBUG_FEATURES=y           : Enable debug features
+         CONFIG_DEBUG_INFO=y               : Enable verbose debug output
          CONFIG_DEBUG_INPUT=y              : Enable debug output from input devices
 
    10. This configuration can be re-configured to test the on-board LCD
@@ -1554,7 +1554,6 @@ Configurations
        the system logging device:
 
            File Systems -> Advanced SYSLOG Features
-             CONFIG_SYSLOG=y               : Enable output to syslog, not console
              CONFIG_SYSLOG_CHAR=y          : Use a character device for system logging
              CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART0 will be /dev/ttyS0
 
diff --git a/configs/sam4e-ek/nsh/Make.defs b/configs/sam4e-ek/nsh/Make.defs
index 7efd66cf1d8e1fc4a0c088738e0d5c54bf740044..1b6f323395e2603951adbb3d4945f0bf45173fed 100644
--- a/configs/sam4e-ek/nsh/Make.defs
+++ b/configs/sam4e-ek/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sam4e-ek/nsh/defconfig b/configs/sam4e-ek/nsh/defconfig
index 869702660df91d516aa96c7e8a61b52a23a29ec3..0432c2d40a8282fea3351c2d95b9f8ee1d7502a5 100644
--- a/configs/sam4e-ek/nsh/defconfig
+++ b/configs/sam4e-ek/nsh/defconfig
@@ -42,10 +42,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +97,7 @@ CONFIG_ARCH_CHIP_SAM34=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,12 +119,15 @@ CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="sam34"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
@@ -131,6 +138,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y
@@ -283,6 +291,7 @@ CONFIG_SAM34_EMAC_PHYSR_100HD=0x2
 CONFIG_SAM34_EMAC_PHYSR_10FD=0x5
 CONFIG_SAM34_EMAC_PHYSR_100FD=0x6
 CONFIG_SAM34_EMAC_ISETH0=y
+CONFIG_SAM34_EMAC_HPWORK=y
 # CONFIG_SAM34_TC is not set
 
 #
@@ -360,7 +369,6 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -369,12 +377,11 @@ CONFIG_NSH_MMCSDMINOR=0
 CONFIG_SAM4EEK_120MHZ=y
 CONFIG_SAM4EEK_AT25_BLOCKMOUNT=y
 CONFIG_SAM4EEK_AT25_FTL=y
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -394,6 +401,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=3
@@ -491,6 +499,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -506,19 +515,24 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -526,8 +540,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -535,6 +559,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -559,12 +584,16 @@ CONFIG_MTD_AT25=y
 CONFIG_AT25_SPIMODE=0
 CONFIG_AT25_SPIFREQUENCY=20000000
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -587,10 +616,9 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -614,9 +642,10 @@ CONFIG_ETH0_PHY_KSZ8051=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -640,10 +669,6 @@ CONFIG_USART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -680,19 +705,26 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -700,13 +732,11 @@ CONFIG_USART1_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -849,12 +879,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -904,6 +928,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -921,7 +947,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -936,8 +963,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -962,19 +991,20 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -984,26 +1014,25 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1011,15 +1040,15 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1039,8 +1068,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1053,20 +1083,21 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1119,13 +1150,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1143,6 +1174,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1168,6 +1200,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1212,13 +1245,13 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1227,6 +1260,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sam4e-ek/nxwm/Make.defs b/configs/sam4e-ek/nxwm/Make.defs
index b267c099165453e0fef2d7c6aee6d59ec435bcd7..f4e26daac067c8739d5bd1603a3baa617341ccdd 100644
--- a/configs/sam4e-ek/nxwm/Make.defs
+++ b/configs/sam4e-ek/nxwm/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sam4e-ek/nxwm/defconfig b/configs/sam4e-ek/nxwm/defconfig
index 5e2ebc17c0e5305202732e94d0c79fd46cdf14d4..60cff8e38cda2a83b660ddc1618f3c4e0f38d049 100644
--- a/configs/sam4e-ek/nxwm/defconfig
+++ b/configs/sam4e-ek/nxwm/defconfig
@@ -42,10 +42,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +97,7 @@ CONFIG_ARCH_CHIP_SAM34=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,12 +119,15 @@ CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="sam34"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
@@ -131,6 +138,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y
@@ -289,6 +297,7 @@ CONFIG_SAM34_EMAC_PHYSR_100HD=0x2
 CONFIG_SAM34_EMAC_PHYSR_10FD=0x5
 CONFIG_SAM34_EMAC_PHYSR_100FD=0x6
 CONFIG_SAM34_EMAC_ISETH0=y
+CONFIG_SAM34_EMAC_HPWORK=y
 # CONFIG_SAM34_TC is not set
 
 #
@@ -366,7 +375,6 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -381,12 +389,11 @@ CONFIG_SAM4EEK_LCD_RGB565=y
 # CONFIG_SAM4EEK_LCD_RGB24 is not set
 # CONFIG_SAM4EEK_LCD_RGB32 is not set
 CONFIG_SAM4EEK_LCD_BGCOLOR=0x95fa
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -401,6 +408,7 @@ CONFIG_LIB_BOARDCTL=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=3
@@ -413,6 +421,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -430,6 +439,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -473,7 +484,7 @@ CONFIG_SIG_SIGWORK=17
 # POSIX Message Queue Options
 #
 CONFIG_PREALLOC_MQ_MSGS=32
-CONFIG_MQ_MAXMSGSIZE=48
+CONFIG_MQ_MAXMSGSIZE=64
 # CONFIG_MODULE is not set
 
 #
@@ -501,6 +512,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=1024
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -516,19 +528,24 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -553,11 +570,20 @@ CONFIG_ADS7843E_THRESHY=39
 # CONFIG_BUTTONS is not set
 # CONFIG_DJOYSTICK is not set
 # CONFIG_AJOYSTICK is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 # CONFIG_LCD_NOGETRUN is not set
@@ -572,6 +598,7 @@ CONFIG_LCD_MAXPOWER=64
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
 # CONFIG_LCD_UG9664HSWAG01 is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 # CONFIG_LCD_SSD1351 is not set
@@ -586,11 +613,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -598,6 +621,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -622,12 +646,16 @@ CONFIG_MTD_AT25=y
 CONFIG_AT25_SPIMODE=0
 CONFIG_AT25_SPIFREQUENCY=20000000
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -650,10 +678,8 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -677,9 +703,10 @@ CONFIG_ETH0_PHY_KSZ8051=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -703,10 +730,6 @@ CONFIG_USART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -743,19 +766,26 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -763,13 +793,11 @@ CONFIG_USART1_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -911,12 +939,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -925,6 +947,7 @@ CONFIG_NX_LCDDRIVER=y
 CONFIG_NX_NPLANES=1
 CONFIG_NX_BGCOLOR=0x95fa
 # CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -1000,13 +1023,14 @@ CONFIG_NXFONT_SANS22X29B=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 CONFIG_NXTERM=y
 
 #
 # NxTerm Output Text/Graphics Options
 #
 CONFIG_NXTERM_BPP=16
-CONFIG_NXTERM_CURSORCHAR=137
+CONFIG_NXTERM_CURSORCHAR=95
 CONFIG_NXTERM_MXCHARS=396
 CONFIG_NXTERM_CACHESIZE=32
 CONFIG_NXTERM_LINESEPARATION=0
@@ -1026,7 +1050,10 @@ CONFIG_NX_MULTIUSER=y
 CONFIG_NX_BLOCKING=y
 CONFIG_NX_MXSERVERMSGS=32
 CONFIG_NX_MXCLIENTMSGS=16
-# CONFIG_NX_NXSTART is not set
+# CONFIG_NXSTART_EXTERNINIT is not set
+CONFIG_NXSTART_SERVERPRIO=110
+CONFIG_NXSTART_SERVERSTACK=2048
+CONFIG_NXSTART_DEVNO=0
 
 #
 # Memory Management
@@ -1072,6 +1099,8 @@ CONFIG_LIBM=y
 CONFIG_LIBC_FLOATINGPOINT=y
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1089,7 +1118,9 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -1104,8 +1135,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1137,21 +1170,22 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -1162,26 +1196,25 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1189,15 +1222,15 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1217,8 +1250,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1231,20 +1265,21 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1297,13 +1332,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1321,11 +1356,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_FILEIOSIZE=512
@@ -1346,6 +1383,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1388,10 +1426,7 @@ CONFIG_NXWIDGETS=y
 #
 CONFIG_NXWIDGETS_FLICKERFREE=y
 # CONFIG_NXWIDGETS_EXTERNINIT is not set
-CONFIG_NXWIDGETS_DEVNO=0
 CONFIG_NXWIDGET_SERVERINIT=y
-CONFIG_NXWIDGETS_SERVERPRIO=110
-CONFIG_NXWIDGETS_SERVERSTACK=1596
 CONFIG_NXWIDGETS_CLIENTPRIO=100
 CONFIG_NXWIDGETS_LISTENERPRIO=100
 CONFIG_NXWIDGETS_LISTENERSTACK=1596
@@ -1401,6 +1436,7 @@ CONFIG_NXWIDGETS_LISTENERSTACK=1596
 # NXWidget Configuration
 #
 CONFIG_NXWIDGETS_BPP=16
+# CONFIG_NXWIDGETS_GREYSCALE is not set
 CONFIG_NXWIDGETS_SIZEOFCHAR=1
 
 #
@@ -1485,7 +1521,7 @@ CONFIG_NXWM_TOOLBAR_FONTID=5
 CONFIG_NXWM_STARTWINDOW_VSPACING=4
 CONFIG_NXWM_STARTWINDOW_HSPACING=4
 # CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set
-CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm"
+CONFIG_NXWM_STARTWINDOW_MQNAME="nxwm"
 CONFIG_NXWM_STARTWINDOW_MXMSGS=32
 CONFIG_NXWM_STARTWINDOW_MXMPRIO=42
 CONFIG_NXWM_STARTWINDOW_PRIO=100
@@ -1568,13 +1604,13 @@ CONFIG_NXWM_HEXCALCULATOR_FONTID=5
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1583,6 +1619,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sam4e-ek/src/sam4e-ek.h b/configs/sam4e-ek/src/sam4e-ek.h
index 1b11b47c6f16ec05e91eb279d3c37cb4c3c4d983..591b90be1f6b4b7d4e8cf11637dcad34466c6935 100644
--- a/configs/sam4e-ek/src/sam4e-ek.h
+++ b/configs/sam4e-ek/src/sam4e-ek.h
@@ -130,7 +130,7 @@
 #  undef CONFIG_USBDEV_TRACE
 #endif
 
-#if !defined(CONFIG_SYSTEM_USBMONITOR) || !defined(CONFIG_USBDEV_TRACE)
+#if !defined(CONFIG_USBMONITOR) || !defined(CONFIG_USBDEV_TRACE)
 #  undef HAVE_USBMONITOR
 #endif
 
diff --git a/configs/sam4e-ek/src/sam_ads7843e.c b/configs/sam4e-ek/src/sam_ads7843e.c
index 70f83e94efc37848baf3a125770fd46ae428d13a..82dd848cd907a34331ad60e968d564d1467aacc3 100644
--- a/configs/sam4e-ek/src/sam_ads7843e.c
+++ b/configs/sam4e-ek/src/sam_ads7843e.c
@@ -153,15 +153,15 @@ static int tsc_attach(FAR struct ads7843e_config_s *state, xcpt_t isr)
 {
   /* Attach the ADS7843E interrupt */
 
-  ivdbg("Attaching %p to IRQ %d\n", isr, SAM_TCS_IRQ);
-  return irq_attach(SAM_TCS_IRQ, isr);
+  iinfo("Attaching %p to IRQ %d\n", isr, SAM_TCS_IRQ);
+  return irq_attach(SAM_TCS_IRQ, isr, NULL);
 }
 
 static void tsc_enable(FAR struct ads7843e_config_s *state, bool enable)
 {
   /* Attach and enable, or detach and disable */
 
-  ivdbg("IRQ:%d enable:%d\n", SAM_TCS_IRQ, enable);
+  iinfo("IRQ:%d enable:%d\n", SAM_TCS_IRQ, enable);
   if (enable)
     {
       sam_gpioirqenable(SAM_TCS_IRQ);
@@ -179,7 +179,7 @@ static void tsc_clear(FAR struct ads7843e_config_s *state)
 
 static bool tsc_busy(FAR struct ads7843e_config_s *state)
 {
-#if defined(CONFIG_DEBUG_INPUT) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_INPUT) && defined(CONFIG_DEBUG_INFO)
   static bool last = (bool)-1;
 #endif
 
@@ -188,10 +188,10 @@ static bool tsc_busy(FAR struct ads7843e_config_s *state)
    */
 
   bool busy = sam_gpioread(GPIO_TCS_BUSY);
-#if defined(CONFIG_DEBUG_INPUT) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_INPUT) && defined(CONFIG_DEBUG_INFO)
   if (busy != last)
     {
-      ivdbg("busy:%d\n", busy);
+      iinfo("busy:%d\n", busy);
       last = busy;
     }
 #endif
@@ -204,7 +204,7 @@ static bool tsc_pendown(FAR struct ads7843e_config_s *state)
   /* The /PENIRQ value is active low */
 
   bool pendown = !sam_gpioread(GPIO_TCS_IRQ);
-  ivdbg("pendown:%d\n", pendown);
+  iinfo("pendown:%d\n", pendown);
   return pendown;
 }
 
@@ -235,7 +235,7 @@ int board_tsc_setup(int minor)
   FAR struct spi_dev_s *dev;
   int ret;
 
-  idbg("minor %d\n", minor);
+  iinfo("minor %d\n", minor);
   DEBUGASSERT(minor == 0);
 
   /* Configure and enable the ADS7843E interrupt pin as an input */
@@ -252,7 +252,7 @@ int board_tsc_setup(int minor)
   dev = sam_spibus_initialize(TSC_CSNUM);
   if (!dev)
     {
-      idbg("Failed to initialize SPI chip select %d\n", TSC_CSNUM);
+      ierr("ERROR: Failed to initialize SPI chip select %d\n", TSC_CSNUM);
       return -ENODEV;
     }
 
@@ -261,7 +261,7 @@ int board_tsc_setup(int minor)
   ret = ads7843e_register(dev, &g_tscinfo, CONFIG_ADS7843E_DEVMINOR);
   if (ret < 0)
     {
-      idbg("Failed to initialize SPI chip select %d\n", TSC_CSNUM);
+      ierr("ERROR: Failed to initialize SPI chip select %d\n", TSC_CSNUM);
       /* sam_spibus_uninitialize(dev); */
       return -ENODEV;
     }
diff --git a/configs/sam4e-ek/src/sam_appinit.c b/configs/sam4e-ek/src/sam_appinit.c
index 6eef61218745eab83baac8ab72a90dd387aa095b..aed2a31361d0b87414deccc3f7a675e4c83cc249 100644
--- a/configs/sam4e-ek/src/sam_appinit.c
+++ b/configs/sam4e-ek/src/sam_appinit.c
@@ -48,8 +48,8 @@
 
 #include 
 
-#ifdef CONFIG_SYSTEM_USBMONITOR
-#  include 
+#ifdef CONFIG_USBMONITOR
+#  include 
 #endif
 
 #include "sam4e-ek.h"
@@ -118,7 +118,7 @@ int board_app_initialize(uintptr_t arg)
 #ifdef HAVE_USBMONITOR
   /* Start the USB Monitor */
 
-  ret = usbmonitor_start(0, NULL);
+  ret = usbmonitor_start();
   if (ret != OK)
     {
       syslog(LOG_ERR, "ERROR: Failed to start USB monitor: %d\n", ret);
diff --git a/configs/sam4e-ek/src/sam_at25.c b/configs/sam4e-ek/src/sam_at25.c
index 2b3473d6d9569405d226de52d1923c7259eb5755..27c61c7c9e05e3eff0e987d148811538ff25ec9d 100644
--- a/configs/sam4e-ek/src/sam_at25.c
+++ b/configs/sam4e-ek/src/sam_at25.c
@@ -88,7 +88,7 @@ int sam_at25_automount(int minor)
       spi = sam_spibus_initialize(FLASH_CSNUM);
       if (!spi)
         {
-          fdbg("ERROR: Failed to initialize SPI port %d\n", FLASH_CSNUM);
+          ferr("ERROR: Failed to initialize SPI port %d\n", FLASH_CSNUM);
           return -ENODEV;
         }
 
@@ -97,7 +97,7 @@ int sam_at25_automount(int minor)
       mtd = at25_initialize(spi);
       if (!mtd)
         {
-          fdbg("ERROR: Failed to bind SPI port %d to the AT25 FLASH driver\n");
+          ferr("ERROR: Failed to bind SPI port %d to the AT25 FLASH driver\n");
           return -ENODEV;
         }
 
@@ -109,7 +109,7 @@ int sam_at25_automount(int minor)
       ret = ftl_initialize(minor, mtd);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to initialize the FTL layer: %d\n", ret);
+          ferr("ERROR: Failed to initialize the FTL layer: %d\n", ret);
           return ret;
         }
 
@@ -119,7 +119,7 @@ int sam_at25_automount(int minor)
       ret = nxffs_initialize(mtd);
       if (ret < 0)
         {
-          fdbg("ERROR: NXFFS initialization failed: %d\n", ret);
+          ferr("ERROR: NXFFS initialization failed: %d\n", ret);
           return ret;
         }
 
@@ -128,7 +128,7 @@ int sam_at25_automount(int minor)
       ret = mount(NULL, "/mnt/at25", "nxffs", 0, NULL);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
+          ferr("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
           return ret;
         }
 #endif
diff --git a/configs/sam4e-ek/src/sam_buttons.c b/configs/sam4e-ek/src/sam_buttons.c
index d6650047284fca264cd871fda4ed0a4f70df0b12..d9fbabeb6d8c93bfcc7101372b91a4feefc3942a 100644
--- a/configs/sam4e-ek/src/sam_buttons.c
+++ b/configs/sam4e-ek/src/sam_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sam4e-ek/src/sam_buttons.c
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -53,21 +54,6 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-#if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-static xcpt_t g_irq_scrollup;
-static xcpt_t g_irq_scrolldown;
-static xcpt_t g_irq_waku;
-static xcpt_t g_irq_tamp;
-#endif
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -81,10 +67,9 @@ static xcpt_t g_irq_tamp;
  ****************************************************************************/
 
 #if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-static xcpt_t board_button_irqx(gpio_pinset_t pinset, int irq,
-                                xcpt_t irqhandler, xcpt_t *store)
+static int board_button_irqx(gpio_pinset_t pinset, int irq, xcpt_t irqhandler,
+                             void *arg)
 {
-  xcpt_t oldhandler;
   irqstate_t flags;
 
   /* Disable interrupts until we are done.  This guarantees that the following
@@ -93,11 +78,6 @@ static xcpt_t board_button_irqx(gpio_pinset_t pinset, int irq,
 
   flags = enter_critical_section();
 
-  /* Get the old button interrupt handler and save the new one */
-
-  oldhandler = *store;
-  *store = irqhandler;
-
   /* Are we attaching or detaching? */
 
   if (irqhandler != NULL)
@@ -105,7 +85,7 @@ static xcpt_t board_button_irqx(gpio_pinset_t pinset, int irq,
       /* Configure the interrupt */
 
       sam_gpioirq(pinset);
-      (void)irq_attach(irq, irqhandler);
+      (void)irq_attach(irq, irqhandler, arg);
       sam_gpioirqenable(irq);
     }
   else
@@ -117,10 +97,7 @@ static xcpt_t board_button_irqx(gpio_pinset_t pinset, int irq,
     }
 
   leave_critical_section(flags);
-
-  /* Return the old button handler (so that it can be restored) */
-
-  return oldhandler;
+  return OK;
 }
 #endif
 
@@ -176,8 +153,7 @@ uint8_t board_buttons(void)
  * Description:
  *   This function may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is one
- *   of the BUTTON* definitions provided above. The previous interrupt
- *   handler address isreturned (so that it may restored, if so desired).
+ *   of the BUTTON* definitions provided above.
  *
  * Configuration Notes:
  *   Configuration CONFIG_AVR32_GPIOIRQ must be selected to enable the
@@ -189,28 +165,24 @@ uint8_t board_buttons(void)
  ****************************************************************************/
 
 #if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
   switch (id)
     {
       case BUTTON_SCROLLUP:
-        return board_button_irqx(GPIO_SCROLLUP, IRQ_SCROLLUP,
-                                 irqhandler, &g_irq_scrollup);
+        return board_button_irqx(GPIO_SCROLLUP, IRQ_SCROLLUP, irqhandler, arg);
 
       case BUTTON_SCROLLDOWN:
-        return board_button_irqx(GPIO_SCROLLDWN, IRQ_SCROLLDWN,
-                                 irqhandler, &g_irq_scrolldown);
+        return board_button_irqx(GPIO_SCROLLDWN, IRQ_SCROLLDWN, irqhandler, arg);
 
       case BUTTON_WAKU:
-        return board_button_irqx(GPIO_WAKU, IRQ_WAKU,
-                                 irqhandler, &g_irq_waku);
+        return board_button_irqx(GPIO_WAKU, IRQ_WAKU, irqhandler, arg);
 
       case BUTTON_TAMP:
-        return board_button_irqx(GPIO_TAMP, IRQ_TAMP,
-                                 irqhandler, &g_irq_tamp);
+        return board_button_irqx(GPIO_TAMP, IRQ_TAMP, irqhandler, arg);
 
       default:
-        return NULL;
+        return -EINVAL;
     }
 }
 #endif
diff --git a/configs/sam4e-ek/src/sam_ethernet.c b/configs/sam4e-ek/src/sam_ethernet.c
index 0e1199307d31b11df4372b6285de25843413efe4..7b41e6b622095673576bc01241f4a5ea169a665e 100644
--- a/configs/sam4e-ek/src/sam_ethernet.c
+++ b/configs/sam4e-ek/src/sam_ethernet.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/sam4e-ek/src/sam_ethernet.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,8 +42,8 @@
 /* Force verbose debug on in this file only to support unit-level testing. */
 
 #ifdef CONFIG_NETDEV_PHY_DEBUG
-#  undef  CONFIG_DEBUG_VERBOSE
-#  define CONFIG_DEBUG_VERBOSE 1
+#  undef  CONFIG_DEBUG_INFO
+#  define CONFIG_DEBUG_INFO 1
 #  undef  CONFIG_DEBUG_NET
 #  define CONFIG_DEBUG_NET 1
 #endif
@@ -74,19 +74,13 @@
  */
 
 #ifdef CONFIG_NETDEV_PHY_DEBUG
-#  define phydbg    dbg
-#  define phylldbg  lldbg
+#  define phyerr    _err
+#  define phywarn   _warn
+#  define phyinfo   _info
 #else
-#  define phydbg(x...)
-#  define phylldbg(x...)
-#endif
-
-/************************************************************************************
- * Private Data
- ************************************************************************************/
-
-#ifdef CONFIG_SAM34_GPIOD_IRQ
-static xcpt_t g_emac_handler;
+#  define phyerr(x...)
+#  define phywarn(x...)
+#  define phyinfo(x...)
 #endif
 
 /************************************************************************************
@@ -100,7 +94,7 @@ static xcpt_t g_emac_handler;
 #ifdef CONFIG_SAM34_GPIOD_IRQ
 static void sam_emac_phy_enable(bool enable)
 {
-  phydbg("IRQ%d: enable=%d\n", SAM_PHY_IRQ, enable);
+  phyinfo("IRQ%d: enable=%d\n", SAM_PHY_IRQ, enable);
   if (enable)
     {
       sam_gpioirqenable(SAM_PHY_IRQ);
@@ -126,7 +120,7 @@ static void sam_emac_phy_enable(bool enable)
 
 void weak_function sam_netinitialize(void)
 {
-  phydbg("Configuring %08x\n", GPIO_PHY_IRQ);
+  phyinfo("Configuring %08x\n", GPIO_PHY_IRQ);
   sam_configgpio(GPIO_PHY_IRQ);
 }
 
@@ -182,43 +176,40 @@ void weak_function sam_netinitialize(void)
  *             asserts an interrupt.  Must reside in OS space, but can
  *             signal tasks in user space.  A value of NULL can be passed
  *             in order to detach and disable the PHY interrupt.
+ *   arg     - The argument that will accompany the interrupt
  *   enable  - A function pointer that be unsed to enable or disable the
  *             PHY interrupt.
  *
  * Returned Value:
- *   The previous PHY interrupt handler address is returned.  This allows you
- *   to temporarily replace an interrupt handler, then restore the original
- *   interrupt handler.  NULL is returned if there is was not handler in
- *   place when the call was made.
+ *   Zero (OK) returned on success; a negated errno value is returned on
+ *   failure.
  *
  ****************************************************************************/
 
 #ifdef CONFIG_SAM34_GPIOD_IRQ
-xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
+int arch_phy_irq(FAR const char *intf, xcpt_t handler, void *arg,
+                 phy_enable_t *enable)
 {
   irqstate_t flags;
-  xcpt_t *phandler;
-  xcpt_t oldhandler;
   gpio_pinset_t pinset;
   phy_enable_t enabler;
   int irq;
 
   DEBUGASSERT(intf);
 
-  nvdbg("%s: handler=%p\n", intf, handler);
-  phydbg("EMAC: devname=%s\n", SAM34_EMAC_DEVNAME);
+  ninfo("%s: handler=%p\n", intf, handler);
+  phyinfo("EMAC: devname=%s\n", SAM34_EMAC_DEVNAME);
 
   if (strcmp(intf, SAM34_EMAC_DEVNAME) == 0)
     {
-      phydbg("Select EMAC\n");
-      phandler = &g_emac_handler;
+      phyinfo("Select EMAC\n");
       pinset   = GPIO_PHY_IRQ;
       irq      = SAM_PHY_IRQ;
       enabler  = sam_emac_phy_enable;
     }
   else
     {
-      ndbg("Unsupported interface: %s\n", intf);
+      nerr("ERROR: Unsupported interface: %s\n", intf);
       return NULL;
     }
 
@@ -228,24 +219,19 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
 
   flags = enter_critical_section();
 
-  /* Get the old interrupt handler and save the new one */
-
-  oldhandler = *phandler;
-  *phandler  = handler;
-
   /* Configure the interrupt */
 
   if (handler)
     {
-      phydbg("Configure pin: %08x\n", pinset);
+      phyinfo("Configure pin: %08x\n", pinset);
       sam_gpioirq(pinset);
 
-      phydbg("Attach IRQ%d\n", irq);
-      (void)irq_attach(irq, handler);
+      phyinfo("Attach IRQ%d\n", irq);
+      (void)irq_attach(irq, handler, arg);
     }
   else
     {
-      phydbg("Detach IRQ%d\n", irq);
+      phyinfo("Detach IRQ%d\n", irq);
       (void)irq_detach(irq);
       enabler = NULL;
     }
@@ -264,7 +250,7 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
   /* Return the old handler (so that it can be restored) */
 
   leave_critical_section(flags);
-  return oldhandler;
+  return OK;
 }
 #endif /* CONFIG_SAM34_GPIOD_IRQ */
 
diff --git a/configs/sam4e-ek/src/sam_hsmci.c b/configs/sam4e-ek/src/sam_hsmci.c
index 8577c0a318ee63ca461ed8669e9f16cb2105b7f5..92eb8f7ba19e838f2a491062ce0a76739222af29 100644
--- a/configs/sam4e-ek/src/sam_hsmci.c
+++ b/configs/sam4e-ek/src/sam_hsmci.c
@@ -90,7 +90,7 @@ static struct sam_hsmci_state_s g_hsmci;
  *
  ****************************************************************************/
 
-static int sam_hsmci_cardetect(int irq, void *regs)
+static int sam_hsmci_cardetect(int irq, void *regs, FAR void *arg)
 {
   bool inserted;
 
@@ -144,7 +144,7 @@ int sam_hsmci_initialize(int minor)
       g_hsmci.hsmci = sdio_initialize(0);
       if (!g_hsmci.hsmci)
         {
-          fdbg("Failed to initialize SDIO\n");
+          ferr("ERROR: Failed to initialize SDIO\n");
           return -ENODEV;
         }
 
@@ -153,14 +153,14 @@ int sam_hsmci_initialize(int minor)
       ret = mmcsd_slotinitialize(minor, g_hsmci.hsmci);
       if (ret != OK)
         {
-          fdbg("Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
+          ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
           return ret;
         }
 
       /* Configure card detect interrupts */
 
       sam_gpioirq(GPIO_MCI_CD);
-      (void)irq_attach(MCI_CD_IRQ, sam_hsmci_cardetect);
+      (void)irq_attach(MCI_CD_IRQ, sam_hsmci_cardetect, NULL);
 
       /* Then inform the HSMCI driver if there is or is not a card in the slot. */
 
@@ -194,7 +194,7 @@ bool sam_cardinserted(int slotno)
   /* Get the state of the GPIO pin */
 
   removed = sam_gpioread(GPIO_MCI_CD);
-  fllvdbg("Slot %d inserted: %s\n", slotno, removed ? "NO" : "YES");
+  finfo("Slot %d inserted: %s\n", slotno, removed ? "NO" : "YES");
 
   return !removed;
 }
diff --git a/configs/sam4e-ek/src/sam_ili9325.c b/configs/sam4e-ek/src/sam_ili9325.c
index 532e208037790633b1f37f763cb6846f4429b14e..19c00ebd2d64efa0c51c698829580c7af7c322c8 100644
--- a/configs/sam4e-ek/src/sam_ili9325.c
+++ b/configs/sam4e-ek/src/sam_ili9325.c
@@ -197,21 +197,6 @@
 #  define CONFIG_SAM4EEK_LCD_BGCOLOR 0
 #endif
 
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#  undef CONFIG_LCD_REGDEBUG
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
 /* Display/Color Properties ***********************************************************/
 /* Display Resolution */
 
@@ -266,16 +251,6 @@
 #define BKL_ENABLE_DURATION   (128*1024)
 #define BKL_DISABLE_DURATION  (128*1024)
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg              dbg
-#  define lcdvdbg             vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /************************************************************************************
  * Private Type Definition
  ************************************************************************************/
@@ -703,7 +678,7 @@ static int sam_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
 
   /* Buffer must be provided and aligned to a 16-bit address boundary */
 
-  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
 
   /* Set the cursor position */
@@ -818,7 +793,7 @@ static int sam_getvideoinfo(FAR struct lcd_dev_s *dev,
                             FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  lcdvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+  lcdinfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
           g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
   memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
   return OK;
@@ -836,7 +811,7 @@ static int sam_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
                               FAR struct lcd_planeinfo_s *pinfo)
 {
   DEBUGASSERT(dev && pinfo && planeno == 0);
-  lcdvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+  lcdinfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
   memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
   return OK;
 }
@@ -854,7 +829,7 @@ static int sam_getpower(struct lcd_dev_s *dev)
 {
   FAR struct sam_dev_s *priv = (FAR struct sam_dev_s *)dev;
 
-  lcdvdbg("power: %d\n", 0);
+  lcdinfo("power: %d\n", 0);
   return priv->power;
 }
 
@@ -871,7 +846,7 @@ static int sam_setpower(struct lcd_dev_s *dev, int power)
 {
   FAR struct sam_dev_s *priv = (FAR struct sam_dev_s *)dev;
 
-  lcdvdbg("power: %d\n", power);
+  lcdinfo("power: %d\n", power);
   DEBUGASSERT((unsigned)power <= CONFIG_LCD_MAXPOWER);
 
   /* Set new power level */
@@ -910,7 +885,7 @@ static int sam_setpower(struct lcd_dev_s *dev, int power)
 
 static int sam_getcontrast(struct lcd_dev_s *dev)
 {
-  lcdvdbg("Not implemented\n");
+  lcdinfo("Not implemented\n");
   return -ENOSYS;
 }
 
@@ -924,7 +899,7 @@ static int sam_getcontrast(struct lcd_dev_s *dev)
 
 static int sam_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
 {
-  lcdvdbg("contrast: %d\n", contrast);
+  lcdinfo("contrast: %d\n", contrast);
   return -ENOSYS;
 }
 
@@ -1286,13 +1261,13 @@ static inline int sam_lcd_initialize(void)
   /* Check the LCD ID */
 
   id = sam_read_reg(ILI9325_DEVICE_CODE_REG);
-  lcdvdbg("LCD ID: %04x\n", id);
+  lcdinfo("LCD ID: %04x\n", id);
 
   /* Initialize the LCD hardware */
 
   if (id != ILI9325_DEVICE_CODE)
     {
-      lcddbg("ERROR: Unsupported LCD: %04x\n", id);
+      lcderr("ERROR: Unsupported LCD: %04x\n", id);
       return -ENODEV;
     }
 
@@ -1319,7 +1294,7 @@ int board_lcd_initialize(void)
   FAR struct sam_dev_s *priv = &g_lcddev;
   int ret;
 
-  lcdvdbg("Initializing\n");
+  lcdinfo("Initializing\n");
 
   /* Configure all LCD pins pins (backlight is initially off) */
 
diff --git a/configs/sam4e-ek/src/sam_ili9341.c b/configs/sam4e-ek/src/sam_ili9341.c
index 4864e17c96d76e3d96900304e2006a67832f70c1..8b689123896220fa1f8d63ee788ce82e5c086534 100644
--- a/configs/sam4e-ek/src/sam_ili9341.c
+++ b/configs/sam4e-ek/src/sam_ili9341.c
@@ -198,21 +198,6 @@
 #  define CONFIG_SAM4EEK_LCD_BGCOLOR 0
 #endif
 
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#  undef CONFIG_LCD_REGDEBUG
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
 /* Display/Color Properties ***********************************************************/
 /* Display Resolution */
 
@@ -269,16 +254,6 @@
 #define BKL_ENABLE_DURATION   (128*1024)
 #define BKL_DISABLE_DURATION  (128*1024)
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg              dbg
-#  define lcdvdbg             vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /************************************************************************************
  * Private Type Definition
  ************************************************************************************/
@@ -503,7 +478,7 @@ static void sam_setwindow(sam_color_t row, sam_color_t col,
 {
   uint8_t buffer[4];
 
-  lcdvdbg("row=%d col=%d width=%d height=%d\n", row, col, width, height);
+  lcdinfo("row=%d col=%d width=%d height=%d\n", row, col, width, height);
 
   /* Set Column Address Position */
 
@@ -654,7 +629,7 @@ static void sam_set_backlight(unsigned int power)
   unsigned int level;
   int i;
 
-  lcdvdbg("power=%d\n", power);
+  lcdinfo("power=%d\n", power);
 
   /* Scale the power setting to the range 1...BKL_LEVELS */
 
@@ -696,7 +671,7 @@ static void sam_set_backlight(unsigned int power)
 
 static int sam_poweroff(FAR struct sam_dev_s *priv)
 {
-  lcdvdbg("OFF\n");
+  lcdinfo("OFF\n");
 
   /* Turn the display off */
 
@@ -739,7 +714,7 @@ static int sam_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
 
   /* Buffer must be provided and aligned to a 16-bit address boundary */
 
-  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
 
 #if defined(CONFIG_SAM4EEK_LCD_RGB565)
   DEBUGASSERT(src && ((uintptr_t)src & 1) == 0);
@@ -797,7 +772,7 @@ static int sam_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
 
   /* Buffer must be provided and aligned to a 16-bit address boundary */
 
-  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
 
 #if defined(CONFIG_SAM4EEK_LCD_RGB565)
   DEBUGASSERT(dest && ((uintptr_t)dest & 1) == 0);
@@ -840,7 +815,7 @@ static int sam_getvideoinfo(FAR struct lcd_dev_s *dev,
                             FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  lcdvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+  lcdinfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
           g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
   memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
   return OK;
@@ -858,7 +833,7 @@ static int sam_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
                               FAR struct lcd_planeinfo_s *pinfo)
 {
   DEBUGASSERT(dev && pinfo && planeno == 0);
-  lcdvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+  lcdinfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
   memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
   return OK;
 }
@@ -876,7 +851,7 @@ static int sam_getpower(struct lcd_dev_s *dev)
 {
   FAR struct sam_dev_s *priv = (FAR struct sam_dev_s *)dev;
 
-  lcdvdbg("power: %d\n", 0);
+  lcdinfo("power: %d\n", 0);
   return priv->power;
 }
 
@@ -893,7 +868,7 @@ static int sam_setpower(struct lcd_dev_s *dev, int power)
 {
   FAR struct sam_dev_s *priv = (FAR struct sam_dev_s *)dev;
 
-  lcdvdbg("power: %d\n", power);
+  lcdinfo("power: %d\n", power);
   DEBUGASSERT((unsigned)power <= CONFIG_LCD_MAXPOWER);
 
   /* Set new power level */
@@ -930,7 +905,7 @@ static int sam_setpower(struct lcd_dev_s *dev, int power)
 
 static int sam_getcontrast(struct lcd_dev_s *dev)
 {
-  lcdvdbg("Not implemented\n");
+  lcdinfo("Not implemented\n");
   return -ENOSYS;
 }
 
@@ -944,7 +919,7 @@ static int sam_getcontrast(struct lcd_dev_s *dev)
 
 static int sam_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
 {
-  lcdvdbg("contrast: %d\n", contrast);
+  lcdinfo("contrast: %d\n", contrast);
   return -ENOSYS;
 }
 
@@ -1171,7 +1146,7 @@ static inline int sam_lcd_initialize(void)
   id = ((uint16_t)buffer[2] << 8) | (uint16_t)buffer[3];
   if (id != ILI9341_DEVICE_CODE)
     {
-      lcddbg("ERROR: Unsupported LCD: %04x\n", id);
+      lcderr("ERROR: Unsupported LCD: %04x\n", id);
       return -ENODEV;
     }
 
@@ -1198,7 +1173,7 @@ int board_lcd_initialize(void)
   FAR struct sam_dev_s *priv = &g_lcddev;
   int ret;
 
-  lcdvdbg("Initializing\n");
+  lcdinfo("Initializing\n");
 
   /* Configure all LCD pins pins (backlight is initially off) */
 
diff --git a/configs/sam4e-ek/src/sam_leds.c b/configs/sam4e-ek/src/sam_leds.c
index 6f32ed2ae1b92328025f8f76e18e66bbc5365367..cb9f5910788c04fdc53aba4da0524edda8f7b3ff 100644
--- a/configs/sam4e-ek/src/sam_leds.c
+++ b/configs/sam4e-ek/src/sam_leds.c
@@ -98,18 +98,6 @@
 #define D4_ON          (LED_ON << D4_SHIFT)
 #define D4_NOCHANGE    (LED_NOCHANGE << D4_SHIFT)
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
diff --git a/configs/sam4e-ek/src/sam_spi.c b/configs/sam4e-ek/src/sam_spi.c
index 01b38608280d906bdb9d6efcb4b944dc278d1913..a26a95c17dbd0ee49d8a82e046c4f4286f2458c3 100644
--- a/configs/sam4e-ek/src/sam_spi.c
+++ b/configs/sam4e-ek/src/sam_spi.c
@@ -55,32 +55,6 @@
 
 #if defined(CONFIG_SAM34_SPI0)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
diff --git a/configs/sam4e-ek/src/sam_udp.c b/configs/sam4e-ek/src/sam_udp.c
index 8c271ba90ac93c8263f75be4cf7fa044e4fd7400..8a2213f9d2a93e67c5dd6e5bd1a3a06f43be95ea 100644
--- a/configs/sam4e-ek/src/sam_udp.c
+++ b/configs/sam4e-ek/src/sam_udp.c
@@ -83,5 +83,5 @@
 
 void sam_udp_suspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
diff --git a/configs/sam4e-ek/usbnsh/Make.defs b/configs/sam4e-ek/usbnsh/Make.defs
index 80e229163e17b3aa1838c18e2580b29f79565c54..55cc417608793980903684f3d546f3f890683ce5 100644
--- a/configs/sam4e-ek/usbnsh/Make.defs
+++ b/configs/sam4e-ek/usbnsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sam4e-ek/usbnsh/defconfig b/configs/sam4e-ek/usbnsh/defconfig
index 58b643af0cb5c8876da28aec08f29e8e9aeafc34..8b93c2661aceb5f3e0b9b72669ddc128cd25fb6c 100644
--- a/configs/sam4e-ek/usbnsh/defconfig
+++ b/configs/sam4e-ek/usbnsh/defconfig
@@ -42,10 +42,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +97,7 @@ CONFIG_ARCH_CHIP_SAM34=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,12 +119,15 @@ CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="sam34"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
@@ -131,6 +138,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -284,6 +292,7 @@ CONFIG_SAM34_EMAC_PHYSR_100HD=0x2
 CONFIG_SAM34_EMAC_PHYSR_10FD=0x5
 CONFIG_SAM34_EMAC_PHYSR_100FD=0x6
 CONFIG_SAM34_EMAC_ISETH0=y
+CONFIG_SAM34_EMAC_HPWORK=y
 
 #
 # AT91SAM3/4 USB Full Speed Device Controller driver (DCD) options
@@ -365,7 +374,6 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -374,13 +382,12 @@ CONFIG_NSH_MMCSDMINOR=0
 CONFIG_SAM4EEK_120MHZ=y
 CONFIG_SAM4EEK_AT25_BLOCKMOUNT=y
 CONFIG_SAM4EEK_AT25_FTL=y
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -400,6 +407,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=3
@@ -454,6 +462,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -462,6 +471,7 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
@@ -473,8 +483,11 @@ CONFIG_MQ_MAXMSGSIZE=32
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -492,6 +505,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -507,19 +521,24 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -527,8 +546,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -536,6 +565,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -560,12 +590,16 @@ CONFIG_MTD_AT25=y
 CONFIG_AT25_SPIMODE=0
 CONFIG_AT25_SPIFREQUENCY=20000000
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -588,10 +622,8 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -615,9 +647,9 @@ CONFIG_ETH0_PHY_KSZ8051=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_SERIAL_REMOVABLE=y
+# CONFIG_SERIAL_CONSOLE is not set
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -641,10 +673,6 @@ CONFIG_USART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -681,6 +709,7 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -712,8 +741,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
 CONFIG_CDCACM_EPBULKIN=3
 CONFIG_CDCACM_EPBULKIN_FSSIZE=64
 CONFIG_CDCACM_EPBULKIN_HSSIZE=512
-CONFIG_CDCACM_NWRREQS=4
 CONFIG_CDCACM_NRDREQS=4
+CONFIG_CDCACM_NWRREQS=4
 CONFIG_CDCACM_BULKIN_REQLEN=96
 CONFIG_CDCACM_RXBUFSIZE=256
 CONFIG_CDCACM_TXBUFSIZE=256
@@ -723,16 +752,24 @@ CONFIG_CDCACM_VENDORSTR="NuttX"
 CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+CONFIG_SYSLOG_CHAR=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+CONFIG_SYSLOG_CHAR_CRLF=y
+CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -740,13 +777,11 @@ CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -886,14 +921,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-CONFIG_SYSLOG_CHAR=y
-CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
-
 #
 # Graphics Support
 #
@@ -943,6 +970,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -960,7 +989,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -975,8 +1005,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1001,19 +1033,20 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1023,26 +1056,25 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1050,15 +1082,15 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1078,8 +1110,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1092,20 +1125,21 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1158,13 +1192,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1182,6 +1216,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1208,6 +1243,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1252,13 +1288,14 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1267,7 +1304,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
-# CONFIG_SYSTEM_CDCACM is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sam4l-xplained/nsh/Make.defs b/configs/sam4l-xplained/nsh/Make.defs
index 3459a329b7e2471e4509cc4fd253fe8602202048..fc6a71ace8900be4b900f817153b89aafcf62386 100644
--- a/configs/sam4l-xplained/nsh/Make.defs
+++ b/configs/sam4l-xplained/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sam4l-xplained/nsh/defconfig b/configs/sam4l-xplained/nsh/defconfig
index 223ce701c654f49ef98b03333f28bf6a56a7c92f..0e3c2c2e56432eeae0e9bcd743aa4a995b652e09 100644
--- a/configs/sam4l-xplained/nsh/defconfig
+++ b/configs/sam4l-xplained/nsh/defconfig
@@ -42,10 +42,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,10 +72,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +94,7 @@ CONFIG_ARCH_CHIP_SAM34=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,12 +116,15 @@ CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="sam34"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
@@ -131,6 +135,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -487,7 +492,12 @@ CONFIG_DEV_NULL=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -495,6 +505,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -503,9 +514,10 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -529,10 +541,6 @@ CONFIG_USART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -559,15 +567,18 @@ CONFIG_USART0_2STOP=0
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -605,12 +616,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -672,12 +677,14 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -721,10 +728,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -734,35 +741,33 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -784,8 +789,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -796,6 +801,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -908,12 +914,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -921,6 +927,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sam4l-xplained/src/sam_autoleds.c b/configs/sam4l-xplained/src/sam_autoleds.c
index aa256593909a7cad6fb948f9b5c7339de9b0d73b..5f86fda6380c903e9a93203434f9ca729c0bc87d 100644
--- a/configs/sam4l-xplained/src/sam_autoleds.c
+++ b/configs/sam4l-xplained/src/sam_autoleds.c
@@ -77,30 +77,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/sam4l-xplained/src/sam_buttons.c b/configs/sam4l-xplained/src/sam_buttons.c
index f57cf79eb5bede495954eaf55366744ea6cdd70f..619f7d658ba70957539b76365a2eb643c971ae53 100644
--- a/configs/sam4l-xplained/src/sam_buttons.c
+++ b/configs/sam4l-xplained/src/sam_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sam4l-xplained/src/sam_buttons.c
  *
- *   Copyright (C) 2013-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -53,18 +53,6 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-#if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-static xcpt_t g_irqsw0;
-#endif
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -111,8 +99,7 @@ uint8_t board_buttons(void)
  * Description:
  *   This function may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is one
- *   of the BUTTON* definitions provided above. The previous interrupt
- *   handler address is returned (so that it may restored, if so desired).
+ *   of the BUTTON* definitions provided above.
  *
  * Configuration Notes:
  *   Configuration CONFIG_AVR32_GPIOIRQ must be selected to enable the
@@ -124,9 +111,9 @@ uint8_t board_buttons(void)
  ****************************************************************************/
 
 #if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   if (id == BUTTON_SW0)
     {
@@ -138,11 +125,6 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
 
       flags = enter_critical_section();
 
-      /* Get the old button interrupt handler and save the new one */
-
-      oldhandler = *g_irqsw0;
-      *g_irqsw0 = irqhandler;
-
       /* Are we attaching or detaching? */
 
       if (irqhandler != NULL)
@@ -150,7 +132,7 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
           /* Configure the interrupt */
 
           sam_gpioirq(GPIO_SW0);
-          (void)irq_attach(IRQ_SW0, irqhandler);
+          (void)irq_attach(IRQ_SW0, irqhandler, arg);
           sam_gpioirqenable(IRQ_SW0);
         }
       else
@@ -162,11 +144,10 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
         }
 
       leave_critical_section(flags);
+      ret = OK;
     }
 
-  /* Return the old button handler (so that it can be restored) */
-
-  return oldhandler;
+  return ret;
 }
 #endif
 
diff --git a/configs/sam4l-xplained/src/sam_mmcsd.c b/configs/sam4l-xplained/src/sam_mmcsd.c
index bc5fd368c737ba9ce1a4e34ef56340187264ce27..4cd42ab6c23215d360a76d446619127d6e61cf62 100644
--- a/configs/sam4l-xplained/src/sam_mmcsd.c
+++ b/configs/sam4l-xplained/src/sam_mmcsd.c
@@ -94,31 +94,31 @@ int sam_sdinitialize(int minor)
 
   /* Get the SPI driver instance for the SD chip select */
 
-  fvdbg("Initializing SPI chip select %d\n", SD_CSNO);
+  finfo("Initializing SPI chip select %d\n", SD_CSNO);
 
   spi = sam_spibus_initialize(SD_CSNO);
   if (!spi)
     {
-      fdbg("Failed to initialize SPI chip select %d\n", SD_CSNO);
+      ferr("ERROR: Failed to initialize SPI chip select %d\n", SD_CSNO);
       return -ENODEV;
     }
 
-  fvdbg("Successfully initialized SPI chip select %d\n", SD_CSNO);
+  finfo("Successfully initialized SPI chip select %d\n", SD_CSNO);
 
   /* Bind the SPI device for the chip select to the slot */
 
-  fvdbg("Binding SPI chip select %d to MMC/SD slot %d\n",
+  finfo("Binding SPI chip select %d to MMC/SD slot %d\n",
           SD_CSNO, SAM34_MMCSDSLOTNO);
 
   ret = mmcsd_spislotinitialize(minor, SAM34_MMCSDSLOTNO, spi);
   if (ret < 0)
     {
-      fdbg("Failed to bind SPI chip select %d to MMC/SD slot %d: %d\n",
+      ferr("ERROR: Failed to bind SPI chip select %d to MMC/SD slot %d: %d\n",
             SD_CSNO, SAM34_MMCSDSLOTNO, ret);
       return ret;
     }
 
-  fvdbg("Successfuly bound SPI chip select %d to MMC/SD slot %d\n",
+  finfo("Successfuly bound SPI chip select %d to MMC/SD slot %d\n",
         SD_CSNO, SAM34_MMCSDSLOTNO);
 
   return OK;
diff --git a/configs/sam4l-xplained/src/sam_slcd.c b/configs/sam4l-xplained/src/sam_slcd.c
index 3b0d61bc36bbbc04cf1a138c266d437324672ddd..28b86101c5e6c6bdaa2438bb516e382e8603b728 100644
--- a/configs/sam4l-xplained/src/sam_slcd.c
+++ b/configs/sam4l-xplained/src/sam_slcd.c
@@ -72,10 +72,6 @@
  ****************************************************************************/
 /* Configuration ************************************************************/
 
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug
- * must also be enabled.
- */
-
 #ifndef CONFIG_LIB_SLCDCODEC
 #  error This SLCD driver requires CONFIG_LIB_SLCDCODEC
 #endif
@@ -85,16 +81,6 @@
 #  error CONFIG_SAM34_RC32K be selected in the board configuration
 #endif
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
 /* The ever-present MIN/MAX macros ******************************************/
 
 #ifndef MIN
@@ -248,16 +234,6 @@
 #define SLCD_PM          (&g_einfo[6])
 #define SLCD_AM          (&g_einfo[7])
 
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg              dbg
-#  define lcdvdbg             vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Type Definition
  ****************************************************************************/
@@ -294,7 +270,7 @@ struct slcd_pixel_s
  ****************************************************************************/
 /* Debug */
 
-#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_LCD_INFO
 static void slcd_dumpstate(FAR const char *msg);
 static void slcd_dumpslcd(FAR const char *msg);
 #else
@@ -405,16 +381,16 @@ static const struct slcd_pixel_s g_einfo[SLCD_NE] =
  * Name: slcd_dumpstate
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_LCD_INFO
 static void slcd_dumpstate(FAR const char *msg)
 {
-  lcdvdbg("%s:\n", msg);
-  lcdvdbg("  curpos: %d\n",
+  lcdinfo("%s:\n", msg);
+  lcdinfo("  curpos: %d\n",
           g_slcdstate.curpos);
-  lcdvdbg("  Display: [%c%c%c%c%c]\n",
+  lcdinfo("  Display: [%c%c%c%c%c]\n",
           g_slcdstate.buffer[0], g_slcdstate.buffer[1], g_slcdstate.buffer[2],
           g_slcdstate.buffer[3], g_slcdstate.buffer[4]);
-  lcdvdbg("  Options: [%d%d%d%d%d]\n",
+  lcdinfo("  Options: [%d%d%d%d%d]\n",
           g_slcdstate.options[0], g_slcdstate.options[1], g_slcdstate.options[2],
           g_slcdstate.options[3], g_slcdstate.options[4]);
 }
@@ -424,23 +400,23 @@ static void slcd_dumpstate(FAR const char *msg)
  * Name: slcd_dumpslcd
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_LCD_INFO
 static void slcd_dumpslcd(FAR const char *msg)
 {
-  lcdvdbg("%s:\n", msg);
-  lcdvdbg("    CFG: %08x    TIM: %08x    SR: %08x\n",
+  lcdinfo("%s:\n", msg);
+  lcdinfo("    CFG: %08x    TIM: %08x    SR: %08x\n",
           getreg32(SAM_LCDCA_CFG), getreg32(SAM_LCDCA_TIM),
           getreg32(SAM_LCDCA_SR));
-  lcdvdbg("    DR0: %02x %08x DR1: %02x %08x\n",
+  lcdinfo("    DR0: %02x %08x DR1: %02x %08x\n",
           getreg32(SAM_LCDCA_DRH0), getreg32(SAM_LCDCA_DRL0),
           getreg32(SAM_LCDCA_DRH1), getreg32(SAM_LCDCA_DRL1));
-  lcdvdbg("    DR2: %02x %08x DR3: %02x %08x\n",
+  lcdinfo("    DR2: %02x %08x DR3: %02x %08x\n",
           getreg32(SAM_LCDCA_DRH2), getreg32(SAM_LCDCA_DRL2),
           getreg32(SAM_LCDCA_DRH3), getreg32(SAM_LCDCA_DRL3));
-  lcdvdbg("   BCFG: %08x CSRCFG: %08x CMCFG: %08x ACMCFG: %08x\n",
+  lcdinfo("   BCFG: %08x CSRCFG: %08x CMCFG: %08x ACMCFG: %08x\n",
           getreg32(SAM_LCDCA_BCFG), getreg32(SAM_LCDCA_CSRCFG),
           getreg32(SAM_LCDCA_CMCFG), getreg32(SAM_LCDCA_ACMCFG));
-  lcdvdbg(" ABMCFG: %08x    IMR: %08x   VER: %08x\n",
+  lcdinfo(" ABMCFG: %08x    IMR: %08x   VER: %08x\n",
           getreg32(SAM_LCDCA_ABMCFG), getreg32(SAM_LCDCA_IMR),
           getreg32(SAM_LCDCA_VERSION));
 }
@@ -453,7 +429,7 @@ static void slcd_dumpslcd(FAR const char *msg)
 #if 0 /* Not used */
 static void slcd_clear(void)
 {
-  lvdbg("Clearing\n");
+  linfo("Clearing\n");
 
   /* Clear display memory */
 
@@ -611,7 +587,7 @@ static int slcd_setcontrast(unsigned int contrast)
   regval |= LCDCA_CFG_FCST(scontrast);
   putreg32(regval, SAM_LCDCA_CFG);
 
-  lcdvdbg("contrast: %d CFG: %08x\n", contrast, getreg32(SAM_LCDCA_CFG));
+  lcdinfo("contrast: %d CFG: %08x\n", contrast, getreg32(SAM_LCDCA_CFG));
   return ret;
 }
 
@@ -666,7 +642,7 @@ static void slcd_writech(uint8_t ch, uint8_t curpos, uint8_t options)
 
 static void slcd_action(enum slcdcode_e code, uint8_t count)
 {
-  lcdvdbg("Action: %d count: %d\n", code, count);
+  lcdinfo("Action: %d count: %d\n", code, count);
   slcd_dumpstate("BEFORE ACTION");
 
   switch (code)
@@ -918,7 +894,7 @@ static ssize_t slcd_write(FAR struct file *filep,
   options = 0;
   while ((result = slcd_decode(&instream.stream, &state, &ch, &count)) != SLCDRET_EOF)
     {
-      lcdvdbg("slcd_decode returned result=%d char=%d count=%d\n",
+      lcdinfo("slcd_decode returned result=%d char=%d count=%d\n",
               result, ch, count);
 
       if (result == SLCDRET_CHAR)          /* A normal character was returned */
@@ -970,7 +946,7 @@ static ssize_t slcd_write(FAR struct file *filep,
 
           else if (ch < 128)
             {
-              lcdvdbg("ch: %c[%02x] options: %02x\n", ch, ch, options);
+              lcdinfo("ch: %c[%02x] options: %02x\n", ch, ch, options);
 
               /* Write the character at the current cursor position */
 
@@ -1021,7 +997,7 @@ static int slcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
         {
           FAR struct slcd_attributes_s *attr = (FAR struct slcd_attributes_s *)((uintptr_t)arg);
 
-          lcdvdbg("SLCDIOC_GETATTRIBUTES:\n");
+          lcdinfo("SLCDIOC_GETATTRIBUTES:\n");
 
           if (!attr)
             {
@@ -1046,7 +1022,7 @@ static int slcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
         {
           FAR struct slcd_curpos_s *curpos = (FAR struct slcd_curpos_s *)((uintptr_t)arg);
 
-          lcdvdbg("SLCDIOC_CURPOS: row=0 column=%d\n", g_slcdstate.curpos);
+          lcdinfo("SLCDIOC_CURPOS: row=0 column=%d\n", g_slcdstate.curpos);
 
           if (!curpos)
             {
@@ -1065,7 +1041,7 @@ static int slcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case SLCDIOC_SETBAR:
         {
-          lcdvdbg("SLCDIOC_SETBAR: arg=0x%02lx\n", arg);
+          lcdinfo("SLCDIOC_SETBAR: arg=0x%02lx\n", arg);
 
           if ((arg & 1) != 0)
             {
@@ -1120,7 +1096,7 @@ static int slcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
             }
 
           *contrast = (int)slcd_getcontrast();
-          lcdvdbg("SLCDIOC_GETCONTRAST: contrast=%d\n", *contrast);
+          lcdinfo("SLCDIOC_GETCONTRAST: contrast=%d\n", *contrast);
         }
         break;
 
@@ -1131,7 +1107,7 @@ static int slcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case SLCDIOC_SETCONTRAST:
         {
-          lcdvdbg("SLCDIOC_SETCONTRAST: arg=%ld\n", arg);
+          lcdinfo("SLCDIOC_SETCONTRAST: arg=%ld\n", arg);
 
           if (arg > SLCD_MAXCONTRAST)
             {
@@ -1197,7 +1173,7 @@ int sam_slcd_initialize(void)
 
   if (!g_slcdstate.initialized)
     {
-      lcdvdbg("Initializing\n");
+      lcdinfo("Initializing\n");
 
       /* Configure LCD GPIO pins */
 
diff --git a/configs/sam4l-xplained/src/sam_spi.c b/configs/sam4l-xplained/src/sam_spi.c
index 8c45e010e331d092395c8edf79f263abd8f8e6e9..47e7741e5024b9e7742a9e127dbf8a052415222c 100644
--- a/configs/sam4l-xplained/src/sam_spi.c
+++ b/configs/sam4l-xplained/src/sam_spi.c
@@ -51,31 +51,6 @@
 
 #ifdef CONFIG_SAM34_SPI0
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
diff --git a/configs/sam4l-xplained/src/sam_ug2832hsweg04.c b/configs/sam4l-xplained/src/sam_ug2832hsweg04.c
index 1d60b6710c1cb15ac9a460a984cfbae141330b7b..a99aacc987159a2c6f8b608cc0fbb1217e15cc75 100644
--- a/configs/sam4l-xplained/src/sam_ug2832hsweg04.c
+++ b/configs/sam4l-xplained/src/sam_ug2832hsweg04.c
@@ -114,16 +114,6 @@
 #  error "The OLED driver requires CONFIG_SPI_CMDDATA in the configuration"
 #endif
 
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg(format, ...)   dbg(format, ##__VA_ARGS__)
-#  define lcdvdbg(format, ...)  vdbg(format, ##__VA_ARGS__)
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -157,7 +147,7 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
   spi = sam_spibus_initialize(OLED_CSNO);
   if (!spi)
     {
-      lcddbg("Failed to initialize SPI port 1\n");
+      lcderr("ERROR: Failed to initialize SPI port 1\n");
     }
   else
     {
@@ -166,11 +156,11 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
       dev = ssd1306_initialize(spi, devno);
       if (!dev)
         {
-          lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno);
+          lcderr("ERROR: Failed to bind SPI port 1 to OLED %d: %d\n", devno);
         }
      else
         {
-          lcdvdbg("Bound SPI port 1 to OLED %d\n", devno);
+          lcdinfo("Bound SPI port 1 to OLED %d\n", devno);
 
           /* And turn the OLED on */
 
diff --git a/configs/sam4l-xplained/src/sam_userleds.c b/configs/sam4l-xplained/src/sam_userleds.c
index 8e053363ce53fc0fec1e5c24627d0256fa749247..ff14e0b21007cd856478f83ae0688779a10c0aad 100644
--- a/configs/sam4l-xplained/src/sam_userleds.c
+++ b/configs/sam4l-xplained/src/sam_userleds.c
@@ -62,22 +62,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/sam4s-xplained-pro/TODO.txt b/configs/sam4s-xplained-pro/TODO.txt
deleted file mode 100644
index 5c1a088abdf6f46b5deb6fd987bd41fbae825135..0000000000000000000000000000000000000000
--- a/configs/sam4s-xplained-pro/TODO.txt
+++ /dev/null
@@ -1,56 +0,0 @@
- - implement flash driver
-   - see arch/arm/src/stm32/stm32_flash.c and related
-     - both banks could be mapped with care taken not to erase the active code.
-       - perhaps the MPU could block code corruption?
-
-   - once implemented, the free() cmd replacement can show flash information.
-
- - Seen crashes when running serial ports below 921600
-
-    - COM34 (UART1, ttyS1) runs the smoothest with 'serialblaster' test...
-    the other two (UART0, USART1) seem to stutter...
-
-   - created a cpuhog test. Each instance takes a semaphore, burns cpu for 6ms and then releases
-     the sem to exercises semaphores passing and a busy cpu. The first two instances become a
-     producer/consumer pair using a pipe (FIFO) to exercise the fileio data passing.
-       -> no crashes with 8 instances running. (No MMU, No BASEPRI)
-       -> no crashes with 8 instances running. (MMU + BASEPRI)
-          -> not however that the serial ports are very finicky with BASEPRI enabled!
-            This setup sends single charactes for each produced or consumed block,
-            and doesn't seem to have any issues:
-              NuttShell (NSH)
-              nsh> cpuhog > /dev/ttyS1 &
-              cpuhog [5:50]
-              nsh> cpuhog > /dev/ttyS2 &
-              cpuhog [7:50]
-              nsh> cpuhog &
-              cpuhog [8:50]
-              nsh> cpuhog 2
-              cpuhog &
-              cpuhog [9:50]
-              nsh> cpuhog 3
-              cpuhog &
-              cpuhog [10:50]
-              nsh> cpuhog 4
-              cpuhog &
-              cpuhog [11:50]
-              nsh> cpuhog 5
-
-              nsh> cpuhog &
-              cpuhog [12:50]
-              nsh> cpuhog 6
-
-              nsh> cpuhog &
-              cpuhog [13:50]
-              nsh> cpuhog 7
-
- - USB serial not quite stable when pushing lots of data
-
- - UARTs don't use DMA. We may need this for high baudrates.
-   - Inbound hardware flow control requires dma.
-
-Current Test:
-
-40mA:   120Mhz (240 MHz PLL) with SDCard mounted, UART0+UART1+USART1 enabled, USB Device availible (but nothing plugged in)
-37.8mA: 120Mhz (120 MHz PLL) with SDCard mounted, UART0+UART1+USART1 enabled
-16.9mA:  "" with WFI added to up_idle()
diff --git a/configs/sam4s-xplained-pro/include/board.h b/configs/sam4s-xplained-pro/include/board.h
index 58380480a9d07dd5e23f745b5086b50673e6841b..0ef923c7e3baf7f30c600e98c13110d150c80caf 100644
--- a/configs/sam4s-xplained-pro/include/board.h
+++ b/configs/sam4s-xplained-pro/include/board.h
@@ -46,7 +46,7 @@
 
 #ifndef __ASSEMBLY__
 #  include 
-#  ifdef CONFIG_GPIO_IRQ
+#  ifdef CONFIG_SAM34_GPIO_IRQ
 #    include 
 #  endif
 #endif
diff --git a/configs/sam4s-xplained-pro/nsh/Make.defs b/configs/sam4s-xplained-pro/nsh/Make.defs
index 6755b3e21eb45c4630e8e3eea4b2667cdac954e3..2dc8e2add391a97068016c56e5ac249c34504528 100644
--- a/configs/sam4s-xplained-pro/nsh/Make.defs
+++ b/configs/sam4s-xplained-pro/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sam4s-xplained-pro/nsh/defconfig b/configs/sam4s-xplained-pro/nsh/defconfig
index d5008bd41a2a794da99850e13e15745f017b0a0d..788b53c4faf4375d7700947e0316195cb21f808e 100644
--- a/configs/sam4s-xplained-pro/nsh/defconfig
+++ b/configs/sam4s-xplained-pro/nsh/defconfig
@@ -43,10 +43,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -60,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -73,10 +76,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -95,6 +98,7 @@ CONFIG_ARCH_CHIP_SAM34=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -102,7 +106,9 @@ CONFIG_ARCH_CHIP_SAM34=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -116,12 +122,15 @@ CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="sam34"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 CONFIG_ARMV7M_USEBASEPRI=y
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 CONFIG_ARM_MPU=y
 CONFIG_ARM_MPU_NREGIONS=8
@@ -133,6 +142,7 @@ CONFIG_ARM_MPU_NREGIONS=8
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -145,8 +155,6 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 CONFIG_ARCH_HAVE_EXTNAND=y
 CONFIG_ARCH_HAVE_EXTNOR=y
 CONFIG_ARCH_HAVE_EXTSRAM0=y
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_ARCH_HAVE_EXTSRAM1=y
 
 #
@@ -187,6 +195,7 @@ CONFIG_ARCH_CHIP_ATSAM4SD32C=y
 # CONFIG_ARCH_CHIP_ATSAM4S16B is not set
 # CONFIG_ARCH_CHIP_ATSAM4S8C is not set
 # CONFIG_ARCH_CHIP_ATSAM4S8B is not set
+# CONFIG_ARCH_CHIP_ATSAM4S4C is not set
 # CONFIG_ARCH_CHIP_ATSAM4E16E is not set
 # CONFIG_ARCH_CHIP_ATSAM4E16C is not set
 # CONFIG_ARCH_CHIP_ATSAM4E8E is not set
@@ -258,6 +267,7 @@ CONFIG_SAM34_GPIOC_IRQ=y
 #
 # AT91SAM3/4 HSMCI device driver options
 #
+CONFIG_SAM34_HSMCI_DMA=y
 # CONFIG_SAM34_HSMCI_RDPROOF is not set
 # CONFIG_SAM34_HSMCI_WRPROOF is not set
 
@@ -357,22 +367,17 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
 CONFIG_SAM4S_XPLAINED_PRO_CDCACM_DEVMINOR=0
-CONFIG_SAM4S_XPLAINED_PRO_SCHED_TIMER_DEVPATH="/dev/rtt0"
-CONFIG_SAM4S_XPLAINED_PRO_CPULOAD_TIMER_DEVPATH="/dev/tc0"
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -393,6 +398,7 @@ CONFIG_USEC_PER_TICK=10000
 CONFIG_SYSTEMTICK_EXTCLK=y
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 CONFIG_JULIAN_TIME=y
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=32
@@ -402,6 +408,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -418,6 +425,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -425,6 +434,8 @@ CONFIG_NPTHREAD_KEYS=4
 CONFIG_SCHED_CPULOAD=y
 CONFIG_SCHED_CPULOAD_EXTCLK=y
 CONFIG_SCHED_CPULOAD_TICKSPERSEC=222
+# CONFIG_CPULOAD_ONESHOT is not set
+CONFIG_CPULOAD_ONESHOT_ENTROPY=6
 CONFIG_SCHED_CPULOAD_TIMECONSTANT=2
 # CONFIG_SCHED_INSTRUMENTATION is not set
 
@@ -491,6 +502,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=4096
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 CONFIG_DEV_ZERO=y
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -506,17 +518,22 @@ CONFIG_DEV_ZERO=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
-CONFIG_TIMER=y
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 # CONFIG_RTC_DATETIME is not set
 CONFIG_RTC_HIRES=y
 CONFIG_RTC_FREQUENCY=32768
 CONFIG_RTC_ALARM=y
+CONFIG_RTC_NALARMS=1
 # CONFIG_RTC_DRIVER is not set
 # CONFIG_RTC_EXTERNAL is not set
 CONFIG_WATCHDOG=y
@@ -526,8 +543,18 @@ CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0"
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -535,6 +562,7 @@ CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0"
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -542,22 +570,27 @@ CONFIG_MMCSD_NSLOTS=1
 CONFIG_MMCSD_MMCSUPPORT=y
 CONFIG_MMCSD_HAVECARDDETECT=y
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
 CONFIG_MMCSD_SDIO=y
 # CONFIG_SDIO_PREFLIGHT is not set
 # CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_SDIO_BLOCKSETUP=y
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_PIPES=y
+CONFIG_DEV_PIPE_MAXSIZE=1024
+CONFIG_DEV_PIPE_SIZE=1024
+CONFIG_DEV_FIFO_SIZE=1024
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -581,10 +614,6 @@ CONFIG_USART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -635,6 +664,7 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -666,8 +696,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
 CONFIG_CDCACM_EPBULKIN=2
 CONFIG_CDCACM_EPBULKIN_FSSIZE=64
 CONFIG_CDCACM_EPBULKIN_HSSIZE=512
-CONFIG_CDCACM_NWRREQS=4
 CONFIG_CDCACM_NRDREQS=4
+CONFIG_CDCACM_NWRREQS=4
 CONFIG_CDCACM_BULKIN_REQLEN=250
 CONFIG_CDCACM_RXBUFSIZE=1024
 CONFIG_CDCACM_TXBUFSIZE=1024
@@ -677,17 +707,23 @@ CONFIG_CDCACM_VENDORSTR="NuttX"
 CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -740,12 +776,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -788,11 +818,28 @@ CONFIG_BUILTIN=y
 CONFIG_STDIO_BUFFER_SIZE=256
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -810,15 +857,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -849,6 +903,8 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 CONFIG_EXAMPLES_CPUHOG=y
@@ -862,10 +918,10 @@ CONFIG_EXAMPLES_CPUHOG_PRIORITY=50
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -875,19 +931,19 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 CONFIG_EXAMPLES_SERIALBLASTER=y
 CONFIG_EXAMPLES_SERIALBLASTER_STACKSIZE=2048
@@ -903,18 +959,17 @@ CONFIG_EXAMPLES_SERIALRX_PRINTHEX=y
 # CONFIG_EXAMPLES_SERIALRX_PRINTSTR is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_TIMER is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -938,8 +993,9 @@ CONFIG_EXAMPLES_SERIALRX_PRINTHEX=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -950,6 +1006,7 @@ CONFIG_EXAMPLES_SERIALRX_PRINTHEX=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -1010,6 +1067,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1026,11 +1084,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -1066,12 +1127,13 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1079,7 +1141,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
-# CONFIG_SYSTEM_CDCACM is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sam4s-xplained-pro/src/Makefile b/configs/sam4s-xplained-pro/src/Makefile
index 62b5b37250360012b8e2655c67318fb92d2816ef..e46e7c7eea92a2b90e2c6540b86f3ab08143053e 100644
--- a/configs/sam4s-xplained-pro/src/Makefile
+++ b/configs/sam4s-xplained-pro/src/Makefile
@@ -64,8 +64,4 @@ ifeq ($(CONFIG_SAM34_WDT),y)
 CSRCS += sam_wdt.c
 endif
 
-ifeq ($(CONFIG_TIMER),y)
-CSRCS += sam_tc.c
-endif
-
 include $(TOPDIR)/configs/Board.mk
diff --git a/configs/sam4s-xplained-pro/src/sam4s-xplained-pro.h b/configs/sam4s-xplained-pro/src/sam4s-xplained-pro.h
index 791be9c596bf63acadd6474999530ea045e7dfbb..d995541bbbd65553adbff01bf2bc4fec776957f3 100644
--- a/configs/sam4s-xplained-pro/src/sam4s-xplained-pro.h
+++ b/configs/sam4s-xplained-pro/src/sam4s-xplained-pro.h
@@ -106,7 +106,7 @@
 #  undef CONFIG_USBDEV_TRACE
 #endif
 
-#if !defined(CONFIG_SYSTEM_USBMONITOR) && !defined(CONFIG_USBDEV_TRACE)
+#if !defined(CONFIG_USBMONITOR) && !defined(CONFIG_USBDEV_TRACE)
 #  undef HAVE_USBMONITOR
 #endif
 
@@ -215,20 +215,6 @@ bool sam_writeprotected(int slotno);
 #  define sam_writeprotected(slotno) (false)
 #endif
 
-/************************************************************************************
- * Name: sam_timerinitialize()
- *
- * Description:
- *   Perform architecture-specific initialization of the timer hardware.
- *
- ************************************************************************************/
-
-#ifdef CONFIG_TIMER
-int sam_timerinitialize(void);
-#else
-#  define sam_timerinitialize() (0)
-#endif
-
 /****************************************************************************
  * Name: sam_watchdog_initialize()
  *
diff --git a/configs/sam4s-xplained-pro/src/sam_appinit.c b/configs/sam4s-xplained-pro/src/sam_appinit.c
index 7e0d3c3d086dcae81fa9e221052812f02ad192b3..6cb0cabe9120d60cfadac2a8e636c0be8bc6b969 100644
--- a/configs/sam4s-xplained-pro/src/sam_appinit.c
+++ b/configs/sam4s-xplained-pro/src/sam_appinit.c
@@ -59,20 +59,12 @@
 #  include 
 #endif
 
-#ifdef CONFIG_TIMER
-#  include 
-#endif
-
-#ifdef CONFIG_SYSTEM_USBMONITOR
-#  include 
+#ifdef CONFIG_USBMONITOR
+#  include 
 #endif
 
 #include "sam4s-xplained-pro.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -169,7 +161,7 @@ int board_app_initialize(uintptr_t arg)
   /* Start the USB Monitor */
 
   syslog(LOG_INFO, "Starting USB Monitor\n");
-  ret = usbmonitor_start(0, NULL);
+  ret = usbmonitor_start();
   if (ret != OK)
     {
       syslog(LOG_ERR, "ERROR: Failed to start USB monitor: %d (%d)\n", ret, errno);
diff --git a/configs/sam4s-xplained-pro/src/sam_autoleds.c b/configs/sam4s-xplained-pro/src/sam_autoleds.c
index 442e0ad7365508d5359368dcf275ff13cb6efbd3..2855559f129e13db6cea0992c080e7d036d55099 100644
--- a/configs/sam4s-xplained-pro/src/sam_autoleds.c
+++ b/configs/sam4s-xplained-pro/src/sam_autoleds.c
@@ -53,9 +53,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
 /* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on
  * board the SAM4S Xplained Pro.  The following definitions describe how NuttX
  * controls the LEDs:
@@ -74,26 +71,6 @@
  *   LED_IDLE             MCU is is sleep mode       Not used
  */
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/sam4s-xplained-pro/src/sam_boot.c b/configs/sam4s-xplained-pro/src/sam_boot.c
index ce7ae2fad3a293a93fd76f55fa37d680ba9af309..54767ee59c33ff268f3287b78a2a8b3d2cf88736 100644
--- a/configs/sam4s-xplained-pro/src/sam_boot.c
+++ b/configs/sam4s-xplained-pro/src/sam_boot.c
@@ -42,19 +42,10 @@
 #include 
 
 #include 
-#include 
 #include 
 
 #include "sam4s-xplained-pro.h"
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -91,6 +82,7 @@ void sam_boardinitialize(void)
  *   may be used, for example, to initialize board-specific device drivers.
  *
  ****************************************************************************/
+
 #ifdef CONFIG_BOARD_INITIALIZE
 void board_initialize(void)
 {
@@ -105,12 +97,5 @@ void board_initialize(void)
 
   sam_led_initialize();
 #endif
-
-#ifdef CONFIG_TIMER
-  /* Registers the timers and starts any async processes (which may include the scheduler) */
-
-  sam_timerinitialize();
-#endif
-
 }
 #endif /* CONFIG_BOARD_INITIALIZE */
diff --git a/configs/sam4s-xplained-pro/src/sam_buttons.c b/configs/sam4s-xplained-pro/src/sam_buttons.c
index 85d461217a5494db24985809b763e73e98ce7f5c..daae49b89e6b06c2e4278207bbea3dcb686e0b3f 100644
--- a/configs/sam4s-xplained-pro/src/sam_buttons.c
+++ b/configs/sam4s-xplained-pro/src/sam_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sam4s-xplained-pro/src/sam_buttons.c
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Authors: Gregory Nutt 
  *            Bob Doiron
  *
@@ -41,6 +41,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -54,20 +55,6 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-static xcpt_t g_irqsw0;
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -110,8 +97,7 @@ uint8_t board_buttons(void)
  * Description:
  *   This function may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is one
- *   of the BUTTON* definitions provided above. The previous interrupt
- *   handler address is returned (so that it may restored, if so desired).
+ *   of the BUTTON* definitions provided above.
  *
  * Configuration Notes:
  *   Configuration CONFIG_AVR32_GPIOIRQ must be selected to enable the
@@ -123,9 +109,9 @@ uint8_t board_buttons(void)
  ****************************************************************************/
 
 #if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   if (id == BUTTON_SW0)
     {
@@ -137,11 +123,6 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
 
       flags = enter_critical_section();
 
-      /* Get the old button interrupt handler and save the new one */
-
-      oldhandler = g_irqsw0;
-      g_irqsw0 = irqhandler;
-
       /* Are we attaching or detaching? */
 
       if (irqhandler != NULL)
@@ -149,7 +130,7 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
           /* Configure the interrupt */
 
           sam_gpioirq(GPIO_SW0);
-          (void)irq_attach(IRQ_SW0, irqhandler);
+          (void)irq_attach(IRQ_SW0, irqhandler, arg);
           sam_gpioirqenable(IRQ_SW0);
         }
       else
@@ -161,11 +142,12 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
         }
 
       leave_critical_section(flags);
+      ret = OK;
     }
 
   /* Return the old button handler (so that it can be restored) */
 
-  return oldhandler;
+  return ret;
 }
 #endif
 
diff --git a/configs/sam4s-xplained-pro/src/sam_hsmci.c b/configs/sam4s-xplained-pro/src/sam_hsmci.c
index eedc7a475a2457999987514815fac3ad757fe163..1446269a5d5167b57c317a72b024ff5d29555f5f 100644
--- a/configs/sam4s-xplained-pro/src/sam_hsmci.c
+++ b/configs/sam4s-xplained-pro/src/sam_hsmci.c
@@ -95,7 +95,7 @@ static struct sam_hsmci_state_s g_hsmci;
  ****************************************************************************/
 
 #ifdef CONFIG_MMCSD_HAVECARDDETECT
-static int sam_hsmci_cardetect_int(int irq, void *regs)
+static int sam_hsmci_cardetect_int(int irq, void *regs, FAR void *arg)
 {
   bool inserted;
 
@@ -135,7 +135,7 @@ static int sam_hsmci_cardetect_int(int irq, void *regs)
 int sam_hsmci_initialize(void)
 {
   int ret;
-  fdbg("Initializing SDIO\n");
+  finfo("Initializing SDIO\n");
 
   /* Have we already initialized? */
 
@@ -147,7 +147,7 @@ int sam_hsmci_initialize(void)
       g_hsmci.hsmci = sdio_initialize(CONFIG_NSH_MMCSDSLOTNO);
       if (!g_hsmci.hsmci)
         {
-          fdbg("Failed to initialize SDIO\n");
+          ferr("ERROR: Failed to initialize SDIO\n");
           return -ENODEV;
         }
 
@@ -156,7 +156,7 @@ int sam_hsmci_initialize(void)
       ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, g_hsmci.hsmci);
       if (ret != OK)
         {
-          fdbg("Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
+          ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
           return ret;
         }
 
@@ -168,7 +168,7 @@ int sam_hsmci_initialize(void)
       /* Configure card detect interrupts */
 
       sam_gpioirq(GPIO_MCI_CD);
-      (void)irq_attach(MCI_CD_IRQ, sam_hsmci_cardetect_int);
+      (void)irq_attach(MCI_CD_IRQ, sam_hsmci_cardetect_int, NULL);
       g_hsmci.inserted = sam_cardinserted(0);
 #else
       g_hsmci.inserted = true; /* An assumption? */
@@ -207,7 +207,7 @@ bool sam_cardinserted(int slotno)
   /* Get the state of the GPIO pin */
 
   removed = sam_gpioread(GPIO_MCI_CD);
-  fllvdbg("Slot %d inserted: %s\n", slotno, removed ? "NO" : "YES");
+  finfo("Slot %d inserted: %s\n", slotno, removed ? "NO" : "YES");
 
   return !removed;
 }
diff --git a/configs/sam4s-xplained-pro/src/sam_tc.c b/configs/sam4s-xplained-pro/src/sam_tc.c
deleted file mode 100644
index afd92aacd8f43d6aa1ccaab27c79490333967eb9..0000000000000000000000000000000000000000
--- a/configs/sam4s-xplained-pro/src/sam_tc.c
+++ /dev/null
@@ -1,316 +0,0 @@
-/****************************************************************************
- * configs/sam4s-xplained-pro/src/sam_tc.c
- *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
- *           Bob Doiron
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include 
-#include 
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-#include 
-#include 
-#include 
-
-#include 
-
-#include "sam_lowputc.h"
-#include "sam_tc.h"
-#include "sam_rtt.h"
-
-#ifdef CONFIG_TIMER
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-/* Configuration ************************************************************/
-
-#if !(defined(CONFIG_SAM34_TC0) || defined(CONFIG_SAM34_TC1) || defined(CONFIG_SAM34_TC2) \
-     || defined(CONFIG_SAM34_TC3) || defined(CONFIG_SAM34_TC4) || defined(CONFIG_SAM34_RTT) )
-#  warning "CONFIG_SAM34_TCx or CONFIG_SAM34_RTT must be defined"
-#endif
-
-/* Select the path to the registered watchdog timer device */
-
-#ifndef CONFIG_TIMER0_DEVPATH
-#  define CONFIG_TIMER0_DEVPATH "/dev/tc0"
-#endif
-#ifndef CONFIG_TIMER1_DEVPATH
-#  define CONFIG_TIMER1_DEVPATH "/dev/tc1"
-#endif
-#ifndef CONFIG_TIMER2_DEVPATH
-#  define CONFIG_TIMER2_DEVPATH "/dev/tc2"
-#endif
-#ifndef CONFIG_TIMER3_DEVPATH
-#  define CONFIG_TIMER3_DEVPATH "/dev/tc3"
-#endif
-#ifndef CONFIG_TIMER4_DEVPATH
-#  define CONFIG_TIMER4_DEVPATH "/dev/tc4"
-#endif
-#ifndef CONFIG_TIMER5_DEVPATH
-#  define CONFIG_TIMER5_DEVPATH "/dev/tc5"
-#endif
-#ifndef CONFIG_RTT_DEVPATH
-#  define CONFIG_RTT_DEVPATH "/dev/rtt0"
-#endif
-
-/* Timer Definitions ********************************************************/
-
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing the watchdog
- * timer
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_TIMER
-#endif
-
-#ifdef CONFIG_DEBUG_TIMER
-#  define tcdbg                 dbg
-#  define tclldbg               lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define tcvdbg              vdbg
-#    define tcllvdbg            llvdbg
-#  else
-#    define tcvdbg(x...)
-#    define tcllvdbg(x...)
-#  endif
-#else
-#  define tcdbg(x...)
-#  define tclldbg(x...)
-#  define tcvdbg(x...)
-#  define tcllvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
-#if defined(CONFIG_SYSTEMTICK_EXTCLK) && !defined(CONFIG_SUPPRESS_INTERRUPTS) && \
-    !defined(CONFIG_SUPPRESS_TIMER_INTS)
-
-static bool systemtick(FAR uint32_t *next_interval_us)
-{
-  sched_process_timer();
-  return true; // reload, no change to interval
-}
-
-#endif /* CONFIG_SYSTEMTICK_EXTCLK && !CONFIG_SUPPRESS_INTERRUPTS && !CONFIG_SUPPRESS_TIMER_INTS */
-
-#if defined(CONFIG_SCHED_CPULOAD) && defined(CONFIG_SCHED_CPULOAD_EXTCLK)
-
-static bool calc_cpuload(FAR uint32_t *next_interval_us)
-{
-  sched_process_cpuload();
-  return TRUE; /* Reload, no change to interval */
-}
-
-#endif /* CONFIG_SCHED_CPULOAD && CONFIG_SCHED_CPULOAD_EXTCLK */
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: sam_timerinitialize()
- *
- * Description:
- *   Perform architecture-specific initialization of the timer hardware.
- *
- ****************************************************************************/
-
-int sam_timerinitialize(void)
-{
-  int fd;
-  int ret;
-
-  /* Initialize and register the timer devices */
-
-#if defined(CONFIG_SAM34_TC0)
-  tcvdbg("Initializing %s...\n", CONFIG_TIMER0_DEVPATH);
-  sam_tcinitialize(CONFIG_TIMER0_DEVPATH, SAM_IRQ_TC0);
-#endif
-
-#if defined(CONFIG_SAM34_TC1)
-  tcvdbg("Initializing %s...\n", CONFIG_TIMER1_DEVPATH);
-  sam_tcinitialize(CONFIG_TIMER1_DEVPATH, SAM_IRQ_TC1);
-#endif
-
-#if defined(CONFIG_SAM34_TC2)
-  tcvdbg("Initializing %s...\n", CONFIG_TIMER2_DEVPATH);
-  sam_tcinitialize(CONFIG_TIMER2_DEVPATH, SAM_IRQ_TC2);
-#endif
-
-#if defined(CONFIG_SAM34_TC3)
-  tcvdbg("Initializing %s...\n", CONFIG_TIMER3_DEVPATH);
-  sam_tcinitialize(CONFIG_TIMER3_DEVPATH, SAM_IRQ_TC3);
-#endif
-
-#if defined(CONFIG_SAM34_TC4)
-  tcvdbg("Initializing %s...\n", CONFIG_TIMER4_DEVPATH);
-  sam_tcinitialize(CONFIG_TIMER4_DEVPATH, SAM_IRQ_TC4);
-#endif
-
-#if defined(CONFIG_SAM34_TC5)
-  tcvdbg("Initializing %s...\n", CONFIG_TIMER5_DEVPATH);
-  sam_tcinitialize(CONFIG_TIMER5_DEVPATH, SAM_IRQ_TC5);
-#endif
-
-#if defined(CONFIG_SAM34_RTT)
-  tcvdbg("Initializing %s...\n", CONFIG_RTT_DEVPATH);
-  sam_rttinitialize(CONFIG_RTT_DEVPATH);
-#endif
-
-#if defined(CONFIG_SYSTEMTICK_EXTCLK) && !defined(CONFIG_SUPPRESS_INTERRUPTS) && \
-    !defined(CONFIG_SUPPRESS_TIMER_INTS)
-  /* System Timer Initialization */
-
-  tcvdbg("Opening %s\n", CONFIG_SAM4S_XPLAINED_PRO_SCHED_TIMER_DEVPATH);
-
-  fd = open(CONFIG_SAM4S_XPLAINED_PRO_SCHED_TIMER_DEVPATH, O_RDONLY);
-  if (fd < 0)
-    {
-      tcdbg("open %s failed: %d\n",
-            CONFIG_SAM4S_XPLAINED_PRO_SCHED_TIMER_DEVPATH, errno);
-      goto errout;
-    }
-
-  /* Set the timeout */
-
-  tcvdbg("Interval = %d us.\n",  (unsigned long)USEC_PER_TICK);
-  ret = ioctl(fd, TCIOC_SETTIMEOUT, (unsigned long)USEC_PER_TICK);
-  if (ret < 0)
-    {
-      tcdbg("ioctl(TCIOC_SETTIMEOUT) failed: %d\n", errno);
-      goto errout_with_dev;
-    }
-
-  /* install user callback */
-  {
-    struct timer_sethandler_s tccb;
-    tccb.newhandler = systemtick;
-    tccb.oldhandler = NULL;
-
-    ret = ioctl(fd, TCIOC_SETHANDLER, (unsigned long)&tccb);
-    if (ret < 0)
-      {
-        tcdbg("ioctl(TCIOC_SETHANDLER) failed: %d\n", errno);
-        goto errout_with_dev;
-      }
-  }
-
-  /* Start the timer */
-
-  tcvdbg("Starting.\n");
-  ret = ioctl(fd, TCIOC_START, 0);
-  if (ret < 0)
-    {
-      tcdbg("ioctl(TCIOC_START) failed: %d\n", errno);
-      goto errout_with_dev;
-    }
-#endif
-
-#if defined(CONFIG_SCHED_CPULOAD) && defined(CONFIG_SCHED_CPULOAD_EXTCLK)
-  /* CPU Load initialization */
-
-  tcvdbg("Opening %s\n", CONFIG_SAM4S_XPLAINED_PRO_CPULOAD_TIMER_DEVPATH);
-
-  fd = open(CONFIG_SAM4S_XPLAINED_PRO_CPULOAD_TIMER_DEVPATH, O_RDONLY);
-  if (fd < 0)
-    {
-      tcdbg("open %s failed: %d\n",
-            CONFIG_SAM4S_XPLAINED_PRO_CPULOAD_TIMER_DEVPATH, errno);
-      goto errout;
-    }
-
-  /* Set the timeout */
-
-  tcvdbg("Interval = %d us.\n",  (unsigned long)1000000 / CONFIG_SCHED_CPULOAD_TICKSPERSEC);
-
-  ret = ioctl(fd, TCIOC_SETTIMEOUT,
-             (unsigned long)1000000 / CONFIG_SCHED_CPULOAD_TICKSPERSEC);
-  if (ret < 0)
-    {
-      tcdbg("ioctl(TCIOC_SETTIMEOUT) failed: %d\n", errno);
-      goto errout_with_dev;
-    }
-
-  /* Install user callback */
-
-  {
-    struct timer_sethandler_s tccb;
-    tccb.newhandler = calc_cpuload;
-    tccb.oldhandler = NULL;
-
-    ret = ioctl(fd, TCIOC_SETHANDLER, (unsigned long)&tccb);
-    if (ret < 0)
-      {
-        tcdbg("ioctl(TCIOC_SETHANDLER) failed: %d\n", errno);
-        goto errout_with_dev;
-      }
-  }
-
-  /* Start the timer */
-
-  tcvdbg("Starting.\n");
-  ret = ioctl(fd, TCIOC_START, 0);
-  if (ret < 0)
-    {
-      tcdbg("ioctl(TCIOC_START) failed: %d\n", errno);
-      goto errout_with_dev;
-    }
-#endif
-
-  goto success;
-errout_with_dev:
-  close(fd);
-errout:
-  return ERROR;
-
-success:
-  return OK;
-
-}
-
-#endif /* CONFIG_TIMER */
diff --git a/configs/sam4s-xplained-pro/src/sam_udp.c b/configs/sam4s-xplained-pro/src/sam_udp.c
index e47c37a9fba9ceb98a8aebecb2e7a3a0860a7b7b..13c1f72e02f87856f195386dd99e11644de42bd8 100644
--- a/configs/sam4s-xplained-pro/src/sam_udp.c
+++ b/configs/sam4s-xplained-pro/src/sam_udp.c
@@ -84,5 +84,5 @@
 
 void sam_udp_suspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
diff --git a/configs/sam4s-xplained-pro/src/sam_userleds.c b/configs/sam4s-xplained-pro/src/sam_userleds.c
index ca16d45cba3ba0cd9b9625d711314bf81c528095..daf4692bea62561f8823f39ed8efd6c3e202fcd9 100644
--- a/configs/sam4s-xplained-pro/src/sam_userleds.c
+++ b/configs/sam4s-xplained-pro/src/sam_userleds.c
@@ -52,22 +52,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/sam4s-xplained-pro/src/sam_wdt.c b/configs/sam4s-xplained-pro/src/sam_wdt.c
index 4696db19eef3ff7d78cb3cc639c9c639890e5d1d..fd3e01fe440834898a6d7e58175468bf2eb1bc8f 100644
--- a/configs/sam4s-xplained-pro/src/sam_wdt.c
+++ b/configs/sam4s-xplained-pro/src/sam_wdt.c
@@ -1,5 +1,5 @@
 /************************************************************************************
- * configs/sam4s-xplained-pro/src/up_watchdog.c
+ * configs/sam4s-xplained-pro/src/up_wdt.c
  *
  *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Authors: Gregory Nutt 
@@ -82,34 +82,6 @@
 #  error "WDT_THREAD_INTERVAL must be greater than or equal to WDT_MINTIME"
 #endif
 
-/* Debug ***************************************************************************/
-/* Non-standard debug that may be enabled just for testing the watchdog timer */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_WATCHDOG
-#endif
-
-#ifdef CONFIG_DEBUG_WATCHDOG
-#  define wdgdbg                 dbg
-#  define wdglldbg               lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define wdgvdbg              vdbg
-#    define wdgllvdbg            llvdbg
-#  else
-#    define wdgvdbg(x...)
-#    define wdgllvdbg(x...)
-#  endif
-#else
-#  define wdgdbg(x...)
-#  define wdglldbg(x...)
-#  define wdgvdbg(x...)
-#  define wdgllvdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -124,21 +96,21 @@ static int wdog_daemon(int argc, char *argv[])
 
   /* Open the watchdog device for reading */
 
-  wdgvdbg("Opening.\n");
+  wdinfo("Opening.\n");
   fd = open(CONFIG_WATCHDOG_DEVPATH, O_RDONLY);
   if (fd < 0)
     {
-      wdgdbg("open %s failed: %d\n", CONFIG_WATCHDOG_DEVPATH, errno);
+      wderr("ERROR: open %s failed: %d\n", CONFIG_WATCHDOG_DEVPATH, errno);
       goto errout;
     }
 
   /* Start the watchdog timer. */
 
-  wdgvdbg("Starting.\n");
+  wdinfo("Starting.\n");
   ret = ioctl(fd, WDIOC_START, 0);
   if (ret < 0)
     {
-      wdgdbg("ioctl(WDIOC_START) failed: %d\n", errno);
+      wderr("ERROR: ioctl(WDIOC_START) failed: %d\n", errno);
       goto errout_with_dev;
     }
 
@@ -147,11 +119,11 @@ static int wdog_daemon(int argc, char *argv[])
     {
       usleep((CONFIG_WDT_THREAD_INTERVAL)*1000);
 
-      wdgvdbg("ping\n");
+      wdinfo("ping\n");
       ret = ioctl(fd, WDIOC_KEEPALIVE, 0);
       if (ret < 0)
         {
-          wdgdbg("ioctl(WDIOC_KEEPALIVE) failed: %d\n", errno);
+          wderr("ERROR: ioctl(WDIOC_KEEPALIVE) failed: %d\n", errno);
           goto errout_with_dev;
         }
     }
@@ -181,36 +153,36 @@ int sam_watchdog_initialize(void)
 
   /* Initialize tha register the watchdog timer device */
 
-  wdgvdbg("Initializing Watchdog driver...\n");
+  wdinfo("Initializing Watchdog driver...\n");
   sam_wdtinitialize(CONFIG_WATCHDOG_DEVPATH);
 
   /* Open the watchdog device */
 
-  wdgvdbg("Opening.\n");
+  wdinfo("Opening.\n");
   fd = open(CONFIG_WATCHDOG_DEVPATH, O_RDONLY);
   if (fd < 0)
     {
-      wdgdbg("open %s failed: %d\n", CONFIG_WATCHDOG_DEVPATH, errno);
+      wderr("ERROR: open %s failed: %d\n", CONFIG_WATCHDOG_DEVPATH, errno);
       goto errout;
     }
 
   /* Set the watchdog timeout */
 
-  wdgvdbg("Timeout = %d.\n", CONFIG_WDT_TIMEOUT);
+  wdinfo("Timeout = %d.\n", CONFIG_WDT_TIMEOUT);
   ret = ioctl(fd, WDIOC_SETTIMEOUT, (unsigned long)CONFIG_WDT_TIMEOUT);
   if (ret < 0)
     {
-      wdgdbg("ioctl(WDIOC_SETTIMEOUT) failed: %d\n", errno);
+      wderr("ERROR: ioctl(WDIOC_SETTIMEOUT) failed: %d\n", errno);
       goto errout_with_dev;
     }
 
   /* Set the watchdog minimum time */
 
-  wdgvdbg("MinTime = %d.\n", CONFIG_WDT_MINTIME);
+  wdinfo("MinTime = %d.\n", CONFIG_WDT_MINTIME);
   ret = ioctl(fd, WDIOC_MINTIME, (unsigned long)CONFIG_WDT_MINTIME);
   if (ret < 0)
     {
-      wdgdbg("ioctl(WDIOC_MINTIME) failed: %d\n", errno);
+      wderr("ERROR: ioctl(WDIOC_MINTIME) failed: %d\n", errno);
       goto errout_with_dev;
     }
 
diff --git a/configs/sam4s-xplained/include/board.h b/configs/sam4s-xplained/include/board.h
index 7fc97d5ccc6f9f7248f5c9cec0a9dce0779a843d..3457a08bd783d98a3606cca6ea35050586246e37 100644
--- a/configs/sam4s-xplained/include/board.h
+++ b/configs/sam4s-xplained/include/board.h
@@ -49,23 +49,6 @@
 #  endif
 #endif
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/************************************************************************************
- * Included Files
- ************************************************************************************/
-
-#include 
-
-#ifndef __ASSEMBLY__
-#  include 
-#  ifdef CONFIG_SAM34_GPIO_IRQ
-#    include 
-#  endif
-#endif
-
 /************************************************************************************
  * Pre-processor Definitions
  ************************************************************************************/
diff --git a/configs/sam4s-xplained/nsh/Make.defs b/configs/sam4s-xplained/nsh/Make.defs
index 8bd815700e6db4c572297c8e4954c22f6797c3f8..795c90796e291430788823d203987445be7d2964 100644
--- a/configs/sam4s-xplained/nsh/Make.defs
+++ b/configs/sam4s-xplained/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sam4s-xplained/nsh/defconfig b/configs/sam4s-xplained/nsh/defconfig
index 583fa8d9269454add1aab3c751ad2dec406894bc..c0d9104bac1b20ded59f5323984534f298a4152b 100644
--- a/configs/sam4s-xplained/nsh/defconfig
+++ b/configs/sam4s-xplained/nsh/defconfig
@@ -42,10 +42,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,10 +72,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -94,6 +94,7 @@ CONFIG_ARCH_CHIP_SAM34=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -115,12 +116,15 @@ CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="sam34"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
@@ -131,6 +135,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -467,7 +472,12 @@ CONFIG_DEV_NULL=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -475,6 +485,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -483,9 +494,10 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -509,10 +521,6 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -539,15 +547,18 @@ CONFIG_UART1_2STOP=0
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -579,12 +590,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -646,12 +651,14 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -695,10 +702,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -708,35 +715,33 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -758,8 +763,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -770,6 +775,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -881,12 +887,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -894,6 +900,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sam4s-xplained/src/sam_autoleds.c b/configs/sam4s-xplained/src/sam_autoleds.c
index 35eabd5bdb711fee269b4bcce2a8fc353427c709..d8b148c5d35207e567dd3ad091746c4f024562fa 100644
--- a/configs/sam4s-xplained/src/sam_autoleds.c
+++ b/configs/sam4s-xplained/src/sam_autoleds.c
@@ -52,9 +52,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
 /* If CONFIG_ARCH_LEDs is defined, then NuttX will control the two LEDs on
  * board the SAM4S Xplained.  The following definitions describe how NuttX
  * controls the LEDs:
@@ -73,26 +70,6 @@
  *   LED_IDLE             MCU is is sleep mode         Not used
  */
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/sam4s-xplained/src/sam_buttons.c b/configs/sam4s-xplained/src/sam_buttons.c
index b48e88461bbe121b467399a2d4bb72c8991a1483..940f97edae51b21d26e38b0acff54b283d2882dd 100644
--- a/configs/sam4s-xplained/src/sam_buttons.c
+++ b/configs/sam4s-xplained/src/sam_buttons.c
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -53,22 +54,6 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-#if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-static xcpt_t g_irqbp2;
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -111,8 +96,7 @@ uint8_t board_buttons(void)
  * Description:
  *   This function may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is one
- *   of the BUTTON* definitions provided above. The previous interrupt
- *   handler address is returned (so that it may restored, if so desired).
+ *   of the BUTTON* definitions provided above.
  *
  * Configuration Notes:
  *   Configuration CONFIG_AVR32_GPIOIRQ must be selected to enable the
@@ -124,9 +108,9 @@ uint8_t board_buttons(void)
  ****************************************************************************/
 
 #if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   if (id == BUTTON_BP2)
     {
@@ -138,11 +122,6 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
 
       flags = enter_critical_section();
 
-      /* Get the old button interrupt handler and save the new one */
-
-      oldhandler = *g_irqbp2;
-      *g_irqbp2 = irqhandler;
-
       /* Are we attaching or detaching? */
 
       if (irqhandler != NULL)
@@ -150,7 +129,7 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
           /* Configure the interrupt */
 
           sam_gpioirq(GPIO_BP2);
-          (void)irq_attach(IRQ_BP2, irqhandler);
+          (void)irq_attach(IRQ_BP2, irqhandler, arg);
           sam_gpioirqenable(IRQ_BP2);
         }
       else
@@ -162,11 +141,10 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
         }
 
       leave_critical_section(flags);
+      ret = OK;
     }
 
-  /* Return the old button handler (so that it can be restored) */
-
-  return oldhandler;
+  return ret;
 }
 #endif
 
diff --git a/configs/sam4s-xplained/src/sam_userleds.c b/configs/sam4s-xplained/src/sam_userleds.c
index f1e7c5f61b4d3c678de4168bd6bd2d7ee029f322..550cbc191e2832ec9ce63df1a92f643829a9bc15 100644
--- a/configs/sam4s-xplained/src/sam_userleds.c
+++ b/configs/sam4s-xplained/src/sam_userleds.c
@@ -51,22 +51,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/sama5d2-xult/README.txt b/configs/sama5d2-xult/README.txt
index 9af903ada8694aebdea6228531126761c79fd5bd..8f11cc1db50c2586438f59f76913b14f8e2eb146 100644
--- a/configs/sama5d2-xult/README.txt
+++ b/configs/sama5d2-xult/README.txt
@@ -1032,7 +1032,6 @@ Configurations
        configuration settings are summarized below:
 
        File System:
-       CONFIG_SYSLOG=y             : Enables the System Logging feature.
 
        Device Drivers:
        CONFIG_RAMLOG=y             : Enable the RAM-based logging feature.
diff --git a/configs/sama5d2-xult/nsh/Make.defs b/configs/sama5d2-xult/nsh/Make.defs
index 50f6cf8d4a588b7f79bc2db479648b983087c234..a8f408163790edc3d2061819656c9b2db2e8c9a7 100644
--- a/configs/sama5d2-xult/nsh/Make.defs
+++ b/configs/sama5d2-xult/nsh/Make.defs
@@ -80,7 +80,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sama5d2-xult/nsh/defconfig b/configs/sama5d2-xult/nsh/defconfig
index 537cb8d4ea1df837b4bd1b856f71a38dbc4256db..dfdd09b96d331325a739f806f86abe34b5a2b4fc 100644
--- a/configs/sama5d2-xult/nsh/defconfig
+++ b/configs/sama5d2-xult/nsh/defconfig
@@ -46,10 +46,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,10 +76,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +98,7 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -119,9 +120,13 @@ CONFIG_ARCH_CORTEXA5=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-a"
 CONFIG_ARCH_CHIP="sama5"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 CONFIG_ARCH_FPU=y
+CONFIG_ARCH_HAVE_TRUSTZONE=y
+CONFIG_ARCH_TRUSTZONE_SECURE=y
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
@@ -131,6 +136,8 @@ CONFIG_ARCH_LOWVECTORS=y
 # ARMv7-A Configuration Options
 #
 # CONFIG_ARMV7A_HAVE_GICv2 is not set
+# CONFIG_ARMV7A_HAVE_GTM is not set
+# CONFIG_ARMV7A_HAVE_PTM is not set
 CONFIG_ARMV7A_HAVE_L2CC=y
 CONFIG_ARMV7A_HAVE_L2CC_PL310=y
 
@@ -189,7 +196,6 @@ CONFIG_SAMA5_HAVE_SPI2=y
 # CONFIG_SAMA5_HAVE_TC is not set
 CONFIG_SAMA5_HAVE_TC1=y
 # CONFIG_SAMA5_HAVE_TC2 is not set
-CONFIG_ARCH_HAVE_TRUSTZONE=y
 # CONFIG_SAMA5_HAVE_TWI3 is not set
 # CONFIG_SAMA5_HAVE_VDEC is not set
 CONFIG_SAMA5_FLEXCOM=y
@@ -399,8 +405,6 @@ CONFIG_SAMA5D2XULT_528MHZ=y
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -551,7 +555,12 @@ CONFIG_RTC_DATETIME=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -559,6 +568,7 @@ CONFIG_RTC_DATETIME=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -567,9 +577,10 @@ CONFIG_RTC_DATETIME=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -593,10 +604,6 @@ CONFIG_USART4_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
@@ -641,21 +648,25 @@ CONFIG_HIDKBD_NPOLLWAITERS=2
 # CONFIG_USBHOST_TRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 CONFIG_RAMLOG=y
-CONFIG_RAMLOG_SYSLOG=y
 # CONFIG_RAMLOG_CONSOLE is not set
 CONFIG_RAMLOG_BUFSIZE=16384
 # CONFIG_RAMLOG_CRLF is not set
 CONFIG_RAMLOG_NONBLOCKING=y
 CONFIG_RAMLOG_NPOLLWAITERS=4
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_RAMLOG_SYSLOG=y
 # CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
 
 #
 # Networking Support
@@ -708,13 +719,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-# CONFIG_SYSLOG_CHAR is not set
-
 #
 # Graphics Support
 #
@@ -815,13 +819,15 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -866,10 +872,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -879,36 +885,35 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RANDOM is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -932,8 +937,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -945,6 +950,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -1060,12 +1066,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 CONFIG_SYSTEM_NXPLAYER=y
 CONFIG_NXPLAYER_PLAYTHREAD_STACKSIZE=1500
 CONFIG_NXPLAYER_COMMAND_LINE=y
@@ -1085,6 +1091,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sama5d2-xult/src/sam_autoleds.c b/configs/sama5d2-xult/src/sam_autoleds.c
index 08f48811f13db23c26e6b452835513b5361aea04..d49913e2f6c12389b80723882ac46d1d9103d6a2 100644
--- a/configs/sama5d2-xult/src/sam_autoleds.c
+++ b/configs/sama5d2-xult/src/sam_autoleds.c
@@ -85,30 +85,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/sama5d2-xult/src/sam_bringup.c b/configs/sama5d2-xult/src/sam_bringup.c
index 3603c51d9a9bd7ae8ffaa8e322ee1627be0a938e..6d758e5f8adc9acedf387581a544234d5361afb4 100644
--- a/configs/sama5d2-xult/src/sam_bringup.c
+++ b/configs/sama5d2-xult/src/sam_bringup.c
@@ -45,16 +45,6 @@
 
 #include "sama5d2-xult.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-#ifdef CONFIG_BOARD_INITIALIZE
-#  define SYSLOG lldbg
-#else
-#  define SYSLOG dbg
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -77,8 +67,8 @@ int sam_bringup(void)
   ret = mount(NULL, SAMA5_PROCFS_MOUNTPOINT, "procfs", 0, NULL);
   if (ret < 0)
     {
-      syslog(LOG_ERR, "ERROR: Failed to mount procfs at %s: %d\n",
-             SAMA5_PROCFS_MOUNTPOINT, ret);
+      _err("ERROR: Failed to mount procfs at %s: %d\n",
+           SAMA5_PROCFS_MOUNTPOINT, ret);
     }
 #endif
 
diff --git a/configs/sama5d2-xult/src/sam_buttons.c b/configs/sama5d2-xult/src/sam_buttons.c
index 2bdef205c0242dd32ffd2ba51c550e9808ecbc0e..c93fa6b904e6380ed32c5145b6c328ebc3bc6d56 100644
--- a/configs/sama5d2-xult/src/sam_buttons.c
+++ b/configs/sama5d2-xult/src/sam_buttons.c
@@ -51,6 +51,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -64,22 +65,6 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-#if defined(CONFIG_SAMA5_PIOB_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-static xcpt_t g_irquser1;
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -122,8 +107,7 @@ uint8_t board_buttons(void)
  * Description:
  *   This function may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is one
- *   of the BUTTON* definitions provided above. The previous interrupt
- *   handler address is returned (so that it may restored, if so desired).
+ *   of the BUTTON* definitions provided above.
  *
  * Configuration Notes:
  *   Configuration CONFIG_SAMA5_PIO_IRQ must be selected to enable the
@@ -133,9 +117,9 @@ uint8_t board_buttons(void)
  ****************************************************************************/
 
 #if defined(CONFIG_SAMA5_PIOB_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   if (id == BUTTON_USER)
     {
@@ -147,11 +131,6 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
 
       flags = enter_critical_section();
 
-      /* Get the old button interrupt handler and save the new one */
-
-      oldhandler = g_irquser1;
-      g_irquser1 = irqhandler;
-
       /* Are we attaching or detaching? */
 
       if (irqhandler != NULL)
@@ -159,7 +138,7 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
           /* Configure the interrupt */
 
           sam_pioirq(PIO_BTN_USER);
-          (void)irq_attach(IRQ_BTN_USER, irqhandler);
+          (void)irq_attach(IRQ_BTN_USER, irqhandler, arg);
           sam_pioirqenable(IRQ_BTN_USER);
         }
       else
@@ -171,11 +150,10 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
         }
 
       leave_critical_section(flags);
+      ret = OK;
     }
 
-  /* Return the old button handler (so that it can be restored) */
-
-  return oldhandler;
+  return ret;
 }
 #endif
 
diff --git a/configs/sama5d2-xult/src/sam_userleds.c b/configs/sama5d2-xult/src/sam_userleds.c
index 1de7aaf6a4693311e1f9182a26ea20ece2e90b43..2361d14263d4c181551f23b860d140ee8fd244ad 100644
--- a/configs/sama5d2-xult/src/sam_userleds.c
+++ b/configs/sama5d2-xult/src/sam_userleds.c
@@ -61,22 +61,6 @@
 #include "sam_pio.h"
 #include "sama5d2-xult.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/sama5d3-xplained/README.txt b/configs/sama5d3-xplained/README.txt
index 93cfb9a6c2e6dd072f841ea3dea9a702f603f02a..89610babeda1c331f7c91e6957cfc491b3702ebf 100644
--- a/configs/sama5d3-xplained/README.txt
+++ b/configs/sama5d3-xplained/README.txt
@@ -1356,7 +1356,7 @@ USB High-Speed Device
   --------------------
 
   There is normal console debug output available that can be enabled with
-  CONFIG_DEBUG + CONFIG_DEBUG_USB.  However, USB device operation is very
+  CONFIG_DEBUG_FEATURES + CONFIG_DEBUG_USB.  However, USB device operation is very
   time critical and enabling this debug output WILL interfere with the
   operation of the UDPHS.  USB device tracing is a less invasive way to get
   debug information:  If tracing is enabled, the USB device will save
@@ -1374,15 +1374,15 @@ USB High-Speed Device
       CONFIG_NSH_ARCHINIT=y                   : Automatically start the USB monitor
 
     Application Configuration -> System NSH Add-Ons:
-      CONFIG_SYSTEM_USBMONITOR=y              : Enable the USB monitor daemon
-      CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
-      CONFIG_SYSTEM_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
-      CONFIG_SYSTEM_USBMONITOR_INTERVAL=1     : Dump trace data every second
-      CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y    : Enable TRACE output
-      CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y
-      CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y
-      CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y
-      CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y
+      CONFIG_USBMONITOR=y              : Enable the USB monitor daemon
+      CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
+      CONFIG_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
+      CONFIG_USBMONITOR_INTERVAL=1     : Dump trace data every second
+      CONFIG_USBMONITOR_TRACEINIT=y    : Enable TRACE output
+      CONFIG_USBMONITOR_TRACECLASS=y
+      CONFIG_USBMONITOR_TRACETRANSFERS=y
+      CONFIG_USBMONITOR_TRACECONTROLLER=y
+      CONFIG_USBMONITOR_TRACEINTERRUPTS=y
 
   NOTE: If USB debug output is also enabled, both outputs will appear on the
   serial console.  However, the debug output will be asynchronous with the
@@ -1550,7 +1550,7 @@ file1: CONFIG_USBHOST_ISOC_DISABLE=y
   ------------------
 
   There is normal console debug output available that can be enabled with
-  CONFIG_DEBUG + CONFIG_DEBUG_USB.  However, USB host operation is very time
+  CONFIG_DEBUG_FEATURES + CONFIG_DEBUG_USB.  However, USB host operation is very time
   critical and enabling this debug output might interfere with the operation
   of the UDPHS.  USB host tracing is a less invasive way to get debug
   information:  If tracing is enabled, the USB host will save encoded trace
@@ -1568,10 +1568,10 @@ file1: CONFIG_USBHOST_ISOC_DISABLE=y
       CONFIG_NSH_ARCHINIT=y                   : Automatically start the USB monitor
 
     Application Configuration -> System NSH Add-Ons:
-      CONFIG_SYSTEM_USBMONITOR=y              : Enable the USB monitor daemon
-      CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
-      CONFIG_SYSTEM_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
-      CONFIG_SYSTEM_USBMONITOR_INTERVAL=1     : Dump trace data every second
+      CONFIG_USBMONITOR=y              : Enable the USB monitor daemon
+      CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
+      CONFIG_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
+      CONFIG_USBMONITOR_INTERVAL=1     : Dump trace data every second
 
   NOTE: If USB debug output is also enabled, both outpus will appear on the
   serial console.  However, the debug output will be asynchronous with the
diff --git a/configs/sama5d3-xplained/bridge/Make.defs b/configs/sama5d3-xplained/bridge/Make.defs
index 7ce0dad5266e8f25af3e87248ff6e4c137f45938..430e2db50cc322f1753dad750d54ae3430c4150a 100644
--- a/configs/sama5d3-xplained/bridge/Make.defs
+++ b/configs/sama5d3-xplained/bridge/Make.defs
@@ -76,7 +76,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sama5d3-xplained/bridge/defconfig b/configs/sama5d3-xplained/bridge/defconfig
index 59d6feb7a207ff52854b5eeb4a775c12b8d71d6c..ba5809da7b1394e4906bf028672a6a54d16f5f9b 100644
--- a/configs/sama5d3-xplained/bridge/defconfig
+++ b/configs/sama5d3-xplained/bridge/defconfig
@@ -46,10 +46,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +64,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,10 +79,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +101,7 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -119,9 +123,12 @@ CONFIG_ARCH_CORTEXA5=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-a"
 CONFIG_ARCH_CHIP="sama5"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 CONFIG_ARCH_FPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
@@ -131,6 +138,8 @@ CONFIG_ARCH_LOWVECTORS=y
 # ARMv7-A Configuration Options
 #
 # CONFIG_ARMV7A_HAVE_GICv2 is not set
+# CONFIG_ARMV7A_HAVE_GTM is not set
+# CONFIG_ARMV7A_HAVE_PTM is not set
 # CONFIG_ARMV7A_HAVE_L2CC is not set
 # CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set
 # CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set
@@ -181,7 +190,6 @@ CONFIG_SAMA5_HAVE_PIOE=y
 # CONFIG_SAMA5_HAVE_TC is not set
 CONFIG_SAMA5_HAVE_TC1=y
 # CONFIG_SAMA5_HAVE_TC2 is not set
-# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_SAMA5_HAVE_TWI3 is not set
 # CONFIG_SAMA5_HAVE_VDEC is not set
 # CONFIG_SAMA5_FLEXCOM is not set
@@ -270,6 +278,7 @@ CONFIG_SAMA5_GMAC_NRXBUFFERS=16
 CONFIG_SAMA5_GMAC_NTXBUFFERS=8
 # CONFIG_SAMA5_GMAC_PREALLOCATE is not set
 # CONFIG_SAMA5_GMAC_NBC is not set
+CONFIG_SAMA5_GMAC_HPWORK=y
 CONFIG_SAMA5_GMAC_PHYADDR=1
 # CONFIG_SAMA5_GMAC_PHYINIT is not set
 CONFIG_SAMA5_GMAC_AUTONEG=y
@@ -293,6 +302,7 @@ CONFIG_SAMA5_EMAC_PHYSR_10FD=0x5
 CONFIG_SAMA5_EMAC_PHYSR_100FD=0x6
 # CONFIG_SAMA5_EMACA_PREALLOCATE is not set
 # CONFIG_SAMA5_EMACA_NBC is not set
+CONFIG_SAMA5_EMACA_HPWORK=y
 # CONFIG_SAMA5_EMAC_ISETH0 is not set
 CONFIG_SAMA5_GMAC_ISETH0=y
 
@@ -396,6 +406,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_SAMA5D3XPLAINED_396MHZ=y
 # CONFIG_SAMA5D3XPLAINED_528MHZ is not set
 # CONFIG_SAMA5D3XPLAINED_SLOWCLOCK is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -416,6 +427,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=11
@@ -470,6 +482,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -478,6 +491,7 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
@@ -489,8 +503,11 @@ CONFIG_MQ_MAXMSGSIZE=32
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -508,6 +525,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -523,12 +541,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -536,8 +558,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -545,6 +577,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -565,10 +598,8 @@ CONFIG_NETDEV_MULTINIC=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -602,9 +633,10 @@ CONFIG_ETH1_PHY_KSZ8081=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -628,10 +660,6 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 CONFIG_OTHER_UART_SERIALDRIVER=y
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
@@ -641,19 +669,26 @@ CONFIG_SERIAL_NPOLLWAITERS=2
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_OTHER_SERIAL_CONSOLE=y
 # CONFIG_NO_SERIAL_CONSOLE is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -661,13 +696,11 @@ CONFIG_OTHER_SERIAL_CONSOLE=y
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_GUARDSIZE=2
 
@@ -796,12 +829,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -852,6 +879,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -869,7 +898,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 # CONFIG_NETDB_DNSCLIENT is not set
@@ -877,8 +907,10 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -944,21 +976,23 @@ CONFIG_EXAMPLES_BRIDGE_NET2_IPHOST=0x0a000001
 CONFIG_EXAMPLES_BRIDGE_NET2_HOSTPORT=5472
 CONFIG_EXAMPLES_BRIDGE_NET2_STACKSIZE=2048
 CONFIG_EXAMPLES_BRIDGE_NET2_PRIORITY=100
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -967,20 +1001,18 @@ CONFIG_EXAMPLES_BRIDGE_NET2_PRIORITY=100
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -994,11 +1026,9 @@ CONFIG_EXAMPLES_BRIDGE_NET2_PRIORITY=100
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1022,8 +1052,9 @@ CONFIG_EXAMPLES_BRIDGE_NET2_PRIORITY=100
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1037,14 +1068,15 @@ CONFIG_EXAMPLES_BRIDGE_NET2_PRIORITY=100
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
-# CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
 CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_PPPD is not set
+# CONFIG_NETUTILS_SMTP is not set
+# CONFIG_NETUTILS_TFTPC is not set
 
 #
 # NSH Library
@@ -1063,12 +1095,12 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 CONFIG_SYSTEM_RAMTEST=y
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 CONFIG_SYSTEM_READLINE=y
@@ -1076,6 +1108,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sama5d3-xplained/nsh/Make.defs b/configs/sama5d3-xplained/nsh/Make.defs
index e53e9803ae43a6ca664d4b04ad9bb3d158d14cee..6b735d7a68900de4250087fdf075e6913b55f05e 100644
--- a/configs/sama5d3-xplained/nsh/Make.defs
+++ b/configs/sama5d3-xplained/nsh/Make.defs
@@ -76,7 +76,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sama5d3-xplained/nsh/defconfig b/configs/sama5d3-xplained/nsh/defconfig
index 9e517d9edb508a731a79d6462baf9c34a31dbdb9..257a9374bc149a23ee218c38185ea91af7259830 100644
--- a/configs/sama5d3-xplained/nsh/defconfig
+++ b/configs/sama5d3-xplained/nsh/defconfig
@@ -46,10 +46,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,10 +76,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +98,7 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -119,9 +120,12 @@ CONFIG_ARCH_CORTEXA5=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-a"
 CONFIG_ARCH_CHIP="sama5"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 CONFIG_ARCH_FPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
@@ -131,6 +135,8 @@ CONFIG_ARCH_LOWVECTORS=y
 # ARMv7-A Configuration Options
 #
 # CONFIG_ARMV7A_HAVE_GICv2 is not set
+# CONFIG_ARMV7A_HAVE_GTM is not set
+# CONFIG_ARMV7A_HAVE_PTM is not set
 # CONFIG_ARMV7A_HAVE_L2CC is not set
 # CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set
 # CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set
@@ -181,7 +187,6 @@ CONFIG_SAMA5_HAVE_PIOE=y
 # CONFIG_SAMA5_HAVE_TC is not set
 CONFIG_SAMA5_HAVE_TC1=y
 # CONFIG_SAMA5_HAVE_TC2 is not set
-# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_SAMA5_HAVE_TWI3 is not set
 # CONFIG_SAMA5_HAVE_VDEC is not set
 # CONFIG_SAMA5_FLEXCOM is not set
@@ -505,7 +510,12 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -513,6 +523,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -521,9 +532,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -547,10 +559,6 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 CONFIG_OTHER_UART_SERIALDRIVER=y
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -563,15 +571,18 @@ CONFIG_OTHER_SERIAL_CONSOLE=y
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -624,12 +635,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -694,13 +699,15 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -744,10 +751,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -757,35 +764,33 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -809,8 +814,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -821,6 +826,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -935,12 +941,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -948,6 +954,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sama5d3-xplained/src/sam_adc.c b/configs/sama5d3-xplained/src/sam_adc.c
index f770ba5d22bb1eeb9b2a61bc44c3b9cc735668ec..9ef01d875ec2ab3987b050807eec9d058b955d01 100644
--- a/configs/sama5d3-xplained/src/sam_adc.c
+++ b/configs/sama5d3-xplained/src/sam_adc.c
@@ -48,32 +48,21 @@
 #include "sam_adc.h"
 #include "sama5d3-xplained.h"
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/************************************************************************************
- * Private Data
- ************************************************************************************/
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
+#ifdef CONFIG_SAMA5_ADC
 
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_adc_initialize
+ * Name: sam_adc_setup
  *
  * Description:
- *   Initialize and register the ADC driver
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
-#ifdef CONFIG_SAMA5_ADC
-int board_adc_initialize(void)
+int sam_adc_setup(void)
 {
   static bool initialized = false;
   struct adc_dev_s *adc;
@@ -88,7 +77,7 @@ int board_adc_initialize(void)
       adc = sam_adc_initialize();
       if (adc == NULL)
         {
-          adbg("ERROR: Failed to get ADC interface\n");
+          aerr("ERROR: Failed to get ADC interface\n");
           return -ENODEV;
         }
 
@@ -97,7 +86,7 @@ int board_adc_initialize(void)
       ret = adc_register("/dev/adc0", adc);
       if (ret < 0)
         {
-          adbg("adc_register failed: %d\n", ret);
+          aerr("ERROR: adc_register failed: %d\n", ret);
           return ret;
         }
 
@@ -108,24 +97,5 @@ int board_adc_initialize(void)
 
   return OK;
 }
-#endif /* CONFIG_ADC */
 
-/************************************************************************************
- * Name: board_adc_setup
- *
- * Description:
- *   All SAMA5 architectures must provide the following interface to work with
- *   examples/adc.
- *
- ************************************************************************************/
-
-#ifdef CONFIG_EXAMPLES_ADC
-int board_adc_setup(void)
-{
-#ifdef CONFIG_SAMA5_ADC
-  return board_adc_initialize();
-#else
-  return -ENOSYS;
-#endif
-}
-#endif /* CONFIG_EXAMPLES_ADC */
+#endif /* CONFIG_ADC */
diff --git a/configs/sama5d3-xplained/src/sam_ajoystick.c b/configs/sama5d3-xplained/src/sam_ajoystick.c
index d05f46eeaf33bea876f1a016cc4d5fddd2dea54f..322240fd9dadf3d2c465dc8dbc3d568c16158b0b 100644
--- a/configs/sama5d3-xplained/src/sam_ajoystick.c
+++ b/configs/sama5d3-xplained/src/sam_ajoystick.c
@@ -107,7 +107,7 @@ static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower,
                          ajoy_handler_t handler, FAR void *arg);
 
 static void ajoy_disable(void);
-static int ajoy_interrupt(int irq, FAR void *context);
+static int ajoy_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /****************************************************************************
  * Private Data
@@ -161,7 +161,7 @@ static FAR void *g_ajoyarg;
 
 static ajoy_buttonset_t ajoy_supported(FAR const struct ajoy_lowerhalf_s *lower)
 {
-  ivdbg("Supported: %02x\n", AJOY_SUPPORTED);
+  iinfo("Supported: %02x\n", AJOY_SUPPORTED);
   return (ajoy_buttonset_t)AJOY_SUPPORTED;
 }
 
@@ -187,20 +187,21 @@ static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
    * channels are enabled).
    */
 
-  nread = file_read(&g_adcfile, adcmsg, MAX_ADC_CHANNELS * sizeof(struct adc_msg_s));
+  nread = file_read(&g_adcfile, adcmsg,
+                    MAX_ADC_CHANNELS * sizeof(struct adc_msg_s));
   if (nread < 0)
     {
       int errcode = get_errno();
       if (errcode != EINTR)
         {
-          idbg("ERROR: read failed: %d\n", errcode);
+          ierr("ERROR: read failed: %d\n", errcode);
         }
 
       return -errcode;
     }
   else if (nread < 2 * sizeof(struct adc_msg_s))
     {
-      idbg("ERROR: read too small: %ld\n", (long)nread);
+      ierr("ERROR: read too small: %ld\n", (long)nread);
       return -EIO;
     }
 
@@ -220,7 +221,7 @@ static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
           sample->as_x = (int16_t)tmp;
           have |= 1;
 
-          ivdbg("X sample: %ld -> %d\n", (long)tmp, (int)sample->as_x);
+          iinfo("X sample: %ld -> %d\n", (long)tmp, (int)sample->as_x);
         }
 
       if ((have & 2) == 0 && ptr->am_channel == 1)
@@ -229,13 +230,13 @@ static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
           sample->as_y = (int16_t)tmp;
           have |= 2;
 
-          ivdbg("Y sample: %ld -> %d\n", (long)tmp, (int)sample->as_y);
+          iinfo("Y sample: %ld -> %d\n", (long)tmp, (int)sample->as_y);
         }
     }
 
   if (have != 3)
     {
-      idbg("ERROR: Could not find joystack channels\n");
+      ierr("ERROR: Could not find joystack channels\n");
       return -EIO;
     }
 
@@ -243,7 +244,7 @@ static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
   /* Sample the discrete button inputs */
 
   sample->as_buttons = ajoy_buttons(lower);
-  ivdbg("Returning: %02x\n", AJOY_SUPPORTED);
+  iinfo("Returning: %02x\n", AJOY_SUPPORTED);
   return OK;
 }
 
@@ -274,7 +275,7 @@ static ajoy_buttonset_t ajoy_buttons(FAR const struct ajoy_lowerhalf_s *lower)
         }
     }
 
-  ivdbg("Returning: %02x\n", ret);
+  iinfo("Returning: %02x\n", ret);
   return ret;
 }
 
@@ -301,8 +302,8 @@ static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower,
   flags = enter_critical_section();
   ajoy_disable();
 
-  illvdbg("press: %02x release: %02x handler: %p arg: %p\n",
-          press, release, handler, arg);
+  iinfo("press: %02x release: %02x handler: %p arg: %p\n",
+        press, release, handler, arg);
 
   /* If no events are indicated or if no handler is provided, then this
    * must really be a request to disable interrupts.
@@ -376,7 +377,7 @@ static void ajoy_disable(void)
  *
  ****************************************************************************/
 
-static int ajoy_interrupt(int irq, FAR void *context)
+static int ajoy_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   DEBUGASSERT(g_ajoyhandler);
   if (g_ajoyhandler)
@@ -405,22 +406,14 @@ int sam_ajoy_initialization(void)
   int fd;
   int i;
 
-  /* Initialize ADC.  We will need this to read the ADC inputs */
-
-  ret = board_adc_initialize();
-  if (ret < 0)
-    {
-      idbg("ERROR: board_adc_initialize() failed: %d\n", ret);
-      return ret;
-    }
-
+  /* NOTE: The ADC driver was initialized earlier in the bring-up sequence. */
   /* Open the ADC driver for reading. */
 
   fd = open("/dev/adc0", O_RDONLY);
   if (fd < 0)
     {
       int errcode = get_errno();
-      idbg("ERROR: Failed to open /dev/adc0: %d\n", errcode);
+      ierr("ERROR: Failed to open /dev/adc0: %d\n", errcode);
       return -errcode;
     }
 
@@ -431,7 +424,7 @@ int sam_ajoy_initialization(void)
   ret = file_detach(fd, &g_adcfile);
   if (ret < 0)
     {
-      idbg("ERROR: Failed to detach from file descriptor: %d\n", ret);
+      ierr("ERROR: Failed to detach from file descriptor: %d\n", ret);
       (void)close(fd);
       return ret;
     }
@@ -449,7 +442,7 @@ int sam_ajoy_initialization(void)
        */
 
       sam_pioirq(g_joypio[i]);
-      (void)irq_attach(g_joyirq[i], ajoy_interrupt);
+      (void)irq_attach(g_joyirq[i], ajoy_interrupt, NULL);
       sam_pioirqdisable(g_joyirq[i]);
     }
 
@@ -458,7 +451,7 @@ int sam_ajoy_initialization(void)
   ret = ajoy_register("/dev/ajoy0", &g_ajoylower);
   if (ret < 0)
     {
-      idbg("ERROR: ajoy_register failed: %d\n", ret);
+      ierr("ERROR: ajoy_register failed: %d\n", ret);
       file_close_detached(&g_adcfile);
     }
 
diff --git a/configs/sama5d3-xplained/src/sam_appinit.c b/configs/sama5d3-xplained/src/sam_appinit.c
index cfee95be1f8bcd91decaffefe7ec7b47d3816fd2..ad5d8146f8655caa7591379edbc266aaca4e0c03 100644
--- a/configs/sama5d3-xplained/src/sam_appinit.c
+++ b/configs/sama5d3-xplained/src/sam_appinit.c
@@ -48,8 +48,8 @@
 
 #include 
 
-#ifdef CONFIG_SYSTEM_USBMONITOR
-#  include 
+#ifdef CONFIG_USBMONITOR
+#  include 
 #endif
 
 #include "sama5d3-xplained.h"
@@ -85,11 +85,7 @@
 
 int board_app_initialize(uintptr_t arg)
 {
-#if defined(HAVE_NAND) || defined(HAVE_AT25) || defined(HAVE_HSMCI) || \
-    defined(HAVE_USBHOST) || defined(HAVE_USBMONITOR) || \\
-    defined(CONFIG_AJOYSTICK) || defined(CONFIG_FS_PROCFS)
   int ret;
-#endif
 
 #ifdef HAVE_NAND
   /* Initialize the NAND driver */
@@ -155,13 +151,23 @@ int board_app_initialize(uintptr_t arg)
 #ifdef HAVE_USBMONITOR
   /* Start the USB Monitor */
 
-  ret = usbmonitor_start(0, NULL);
+  ret = usbmonitor_start();
   if (ret != OK)
     {
       syslog(LOG_ERR, "ERROR: Failed to start USB monitor: %d\n", ret);
     }
 #endif
 
+#ifdef CONFIG_ADC
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = sam_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: sam_adc_setup failed: %d\n", ret);
+    }
+#endif
+
 #ifdef CONFIG_AJOYSTICK
   /* Initialize and register the joystick driver */
 
@@ -175,6 +181,27 @@ int board_app_initialize(uintptr_t arg)
     }
 #endif
 
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device. */
+
+  ret = sam_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: sam_pwm_setup() failed: %d\n", ret);
+      return ret;
+    }
+#endif
+
+#ifdef CONFIG_CAN
+  /* Initialize CAN and register the CAN driver. */
+
+  ret = sam_can_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: sam_can_setup failed: %d\n", ret);
+    }
+#endif
+
 #ifdef CONFIG_FS_PROCFS
   /* Mount the procfs file system */
 
@@ -184,8 +211,10 @@ int board_app_initialize(uintptr_t arg)
       syslog(LOG_ERR,
              "ERROR: Failed to mount procfs at %s: %d\n",
              SAMA5_PROCFS_MOUNTPOINT, ret);
+      return ret;
     }
 #endif
 
+  UNUSED(ret);
   return OK;
 }
diff --git a/configs/sama5d3-xplained/src/sam_at25.c b/configs/sama5d3-xplained/src/sam_at25.c
index a6ef86fc06e90e9f9d45fe49a7fccabca58ddc05..6e8302911951bcd44ec308f648433716a6d46252 100644
--- a/configs/sama5d3-xplained/src/sam_at25.c
+++ b/configs/sama5d3-xplained/src/sam_at25.c
@@ -87,7 +87,7 @@ int sam_at25_automount(int minor)
       spi = sam_spibus_initialize(AT25_PORT);
       if (!spi)
         {
-          fdbg("ERROR: Failed to initialize SPI port %d\n", AT25_PORT);
+          ferr("ERROR: Failed to initialize SPI port %d\n", AT25_PORT);
           return -ENODEV;
         }
 
@@ -96,7 +96,7 @@ int sam_at25_automount(int minor)
       mtd = at25_initialize(spi);
       if (!mtd)
         {
-          fdbg("ERROR: Failed to bind SPI port %d to the AT25 FLASH driver\n");
+          ferr("ERROR: Failed to bind SPI port %d to the AT25 FLASH driver\n");
           return -ENODEV;
         }
 
@@ -106,7 +106,7 @@ int sam_at25_automount(int minor)
       ret = ftl_initialize(AT25_MINOR, mtd);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to initialize the FTL layer: %d\n", ret);
+          ferr("ERROR: Failed to initialize the FTL layer: %d\n", ret);
           return ret;
         }
 
@@ -116,7 +116,7 @@ int sam_at25_automount(int minor)
       ret = nxffs_initialize(mtd);
       if (ret < 0)
         {
-          fdbg("ERROR: NXFFS initialization failed: %d\n", ret);
+          ferr("ERROR: NXFFS initialization failed: %d\n", ret);
           return ret;
         }
 
@@ -125,7 +125,7 @@ int sam_at25_automount(int minor)
       ret = mount(NULL, "/mnt/at25", "nxffs", 0, NULL);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
+          ferr("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
           return ret;
         }
 #endif
diff --git a/configs/sama5d3-xplained/src/sam_autoleds.c b/configs/sama5d3-xplained/src/sam_autoleds.c
index 553cccc3706a3776993a8c37307666630f883d16..e435531d7c308db2696b91bff902300e1bc82d1c 100644
--- a/configs/sama5d3-xplained/src/sam_autoleds.c
+++ b/configs/sama5d3-xplained/src/sam_autoleds.c
@@ -87,30 +87,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/sama5d3-xplained/src/sam_buttons.c b/configs/sama5d3-xplained/src/sam_buttons.c
index 50636737c4ea5795263a6e8c4e93b53470ae3cbd..b7fd8245567fd8df32bcae0b33fd131985feb2b9 100644
--- a/configs/sama5d3-xplained/src/sam_buttons.c
+++ b/configs/sama5d3-xplained/src/sam_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sama5d3-xplained/src/sam_buttons.c
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -55,6 +55,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -68,22 +69,6 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-#if defined(CONFIG_SAMA5_PIOE_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-static xcpt_t g_irquser1;
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -126,8 +111,7 @@ uint8_t board_buttons(void)
  * Description:
  *   This function may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is one
- *   of the BUTTON* definitions provided above. The previous interrupt
- *   handler address is returned (so that it may restored, if so desired).
+ *   of the BUTTON* definitions provided above.
  *
  * Configuration Notes:
  *   Configuration CONFIG_SAMA5_PIO_IRQ must be selected to enable the
@@ -137,9 +121,9 @@ uint8_t board_buttons(void)
  ****************************************************************************/
 
 #if defined(CONFIG_SAMA5_PIOE_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   if (id == BUTTON_USER)
     {
@@ -151,11 +135,6 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
 
       flags = enter_critical_section();
 
-      /* Get the old button interrupt handler and save the new one */
-
-      oldhandler = g_irquser1;
-      g_irquser1 = irqhandler;
-
       /* Are we attaching or detaching? */
 
       if (irqhandler != NULL)
@@ -163,7 +142,7 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
           /* Configure the interrupt */
 
           sam_pioirq(PIO_USER);
-          (void)irq_attach(IRQ_USER1, irqhandler);
+          (void)irq_attach(IRQ_USER1, irqhandler, arg);
           sam_pioirqenable(IRQ_USER1);
         }
       else
@@ -173,14 +152,12 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
           sam_pioirqdisable(IRQ_USER1);
           (void)irq_detach(IRQ_USER1);
         }
-      /* Configure the interrupt */
 
       leave_critical_section(flags);
+      ret = OK;
     }
 
-  /* Return the old button handler (so that it can be restored) */
-
-  return oldhandler;
+  return ret;
 }
 #endif
 
diff --git a/configs/sama5d3-xplained/src/sam_can.c b/configs/sama5d3-xplained/src/sam_can.c
index 9fc10f9d2b3a7aea5caed8176255c5689fb5bb94..cbd76837d8b9fdb70c0f65342a18456dd2da3f8a 100644
--- a/configs/sama5d3-xplained/src/sam_can.c
+++ b/configs/sama5d3-xplained/src/sam_can.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/sama5d3-xplained/src/sam_can.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,7 +42,7 @@
 #include 
 #include 
 
-#include 
+#include 
 #include 
 
 #include "chip.h"
@@ -51,7 +51,7 @@
 #include "sam_can.h"
 #include "sama5d3-xplained.h"
 
-#if defined(CONFIG_CAN) && (defined(CONFIG_SAMA5_CAN0) || defined(CONFIG_SAMA5_CAN1))
+#ifdef CONFIG_CAN
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -69,72 +69,46 @@
 #  define CAN_PORT 1
 #endif
 
-/* Debug ***************************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
-
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
-#else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_can_initialize
+ * Name: sam_can_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/can.
+ *  Initialize CAN and register the CAN device
  *
  ************************************************************************************/
 
-int board_can_initialize(void)
+int sam_can_setup(void)
 {
-  static bool initialized = false;
+#if defined(CONFIG_SAMA5_CAN0) || defined(CONFIG_SAMA5_CAN1)
   struct can_dev_s *can;
   int ret;
 
-  /* Check if we have already initialized */
+  /* Call stm32_caninitialize() to get an instance of the CAN interface */
 
-  if (!initialized)
+  can = sam_caninitialize(CAN_PORT);
+  if (can == NULL)
     {
-      /* Call stm32_caninitialize() to get an instance of the CAN interface */
-
-      can = sam_caninitialize(CAN_PORT);
-      if (can == NULL)
-        {
-          candbg("ERROR:  Failed to get CAN interface\n");
-          return -ENODEV;
-        }
-
-      /* Register the CAN driver at "/dev/can0" */
-
-      ret = can_register("/dev/can0", can);
-      if (ret < 0)
-        {
-          candbg("ERROR: can_register failed: %d\n", ret);
-          return ret;
-        }
+      canerr("ERROR:  Failed to get CAN interface\n");
+      return -ENODEV;
+    }
 
-      /* Now we are initialized */
+  /* Register the CAN driver at "/dev/can0" */
 
-      initialized = true;
-    }
+  ret = can_register("/dev/can0", can);
+  if (ret < 0)
+    {
+      canerr("ERROR: can_register failed: %d\n", ret);
+      return ret;
+   }
 
   return OK;
+#else
+  return -ENODEV;
+#endif
 }
 
-#endif /* CONFIG_CAN && (CONFIG_SAMA5_CAN0 || CONFIG_SAMA5_CAN1) */
+#endif /* CONFIG_CAN */
diff --git a/configs/sama5d3-xplained/src/sam_ethernet.c b/configs/sama5d3-xplained/src/sam_ethernet.c
index ed022800f1cdc5fe1726637152b2d76f80f69b0f..501acac39fe0503e4d738551587ba17addd96db8 100644
--- a/configs/sama5d3-xplained/src/sam_ethernet.c
+++ b/configs/sama5d3-xplained/src/sam_ethernet.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/sama5d3-xplained/src/sam_ethernet.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,8 +42,8 @@
 /* Force verbose debug on in this file only to support unit-level testing. */
 
 #ifdef CONFIG_NETDEV_PHY_DEBUG
-#  undef  CONFIG_DEBUG_VERBOSE
-#  define CONFIG_DEBUG_VERBOSE 1
+#  undef  CONFIG_DEBUG_INFO
+#  define CONFIG_DEBUG_INFO 1
 #  undef  CONFIG_DEBUG_NET
 #  define CONFIG_DEBUG_NET 1
 #endif
@@ -84,24 +84,13 @@
  */
 
 #ifdef CONFIG_NETDEV_PHY_DEBUG
-#  define phydbg    dbg
-#  define phylldbg  lldbg
+#  define phyerr    _err
+#  define phywarn   _warn
+#  define phyinfo   _info
 #else
-#  define phydbg(x...)
-#  define phylldbg(x...)
-#endif
-
-/************************************************************************************
- * Private Data
- ************************************************************************************/
-
-#ifdef CONFIG_SAMA5_PIOE_IRQ
-#ifdef CONFIG_SAMA5_EMACA
-static xcpt_t g_emac_handler;
-#endif
-#ifdef CONFIG_SAMA5_GMAC
-static xcpt_t g_gmac_handler;
-#endif
+#  define phyerr(x...)
+#  define phywarn(x...)
+#  define phyinfo(x...)
 #endif
 
 /************************************************************************************
@@ -116,7 +105,7 @@ static xcpt_t g_gmac_handler;
 #ifdef CONFIG_SAMA5_EMACA
 static void sam_emac_phy_enable(bool enable)
 {
-  phydbg("IRQ%d: enable=%d\n", IRQ_INT_ETH1, enable);
+  phyinfo("IRQ%d: enable=%d\n", IRQ_INT_ETH1, enable);
   if (enable)
     {
       sam_pioirqenable(IRQ_INT_ETH1);
@@ -132,7 +121,7 @@ static void sam_emac_phy_enable(bool enable)
 #ifdef CONFIG_SAMA5_GMAC
 static void sam_gmac_phy_enable(bool enable)
 {
-  phydbg("IRQ%d: enable=%d\n", IRQ_INT_ETH0, enable);
+  phyinfo("IRQ%d: enable=%d\n", IRQ_INT_ETH0, enable);
   if (enable)
     {
       sam_pioirqenable(IRQ_INT_ETH0);
@@ -179,7 +168,7 @@ void weak_function sam_netinitialize(void)
    * The KSZ8051 PHY interrupt is available on PE30 INT_ETH1
   */
 
-  phydbg("Configuring %08x\n", PIO_INT_ETH1);
+  phyinfo("Configuring %08x\n", PIO_INT_ETH1);
   sam_configpio(PIO_INT_ETH1);
 #endif
 
@@ -196,7 +185,7 @@ void weak_function sam_netinitialize(void)
    * The KSZ9021/31 interrupt is available on PB35 INT_GETH0
    */
 
-  phydbg("Configuring %08x\n", PIO_INT_ETH0);
+  phyinfo("Configuring %08x\n", PIO_INT_ETH0);
   sam_configpio(PIO_INT_ETH0);
 #endif
 }
@@ -253,42 +242,39 @@ void weak_function sam_netinitialize(void)
  *             asserts an interrupt.  Must reside in OS space, but can
  *             signal tasks in user space.  A value of NULL can be passed
  *             in order to detach and disable the PHY interrupt.
+ *   arg     - The argument that will accompany the interrupt
  *   enable  - A function pointer that be unsed to enable or disable the
  *             PHY interrupt.
  *
  * Returned Value:
- *   The previous PHY interrupt handler address is returned.  This allows you
- *   to temporarily replace an interrupt handler, then restore the original
- *   interrupt handler.  NULL is returned if there is was not handler in
- *   place when the call was made.
+ *   Zero (OK) returned on success; a negated errno value is returned on
+ *   failure.
  *
  ****************************************************************************/
 
 #ifdef CONFIG_SAMA5_PIOE_IRQ
-xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
+int arch_phy_irq(FAR const char *intf, xcpt_t handler, void *arg,
+                 phy_enable_t *enable)
 {
   irqstate_t flags;
-  xcpt_t *phandler;
-  xcpt_t oldhandler;
   pio_pinset_t pinset;
   phy_enable_t enabler;
   int irq;
 
   DEBUGASSERT(intf);
 
-  nvdbg("%s: handler=%p\n", intf, handler);
+  ninfo("%s: handler=%p\n", intf, handler);
 #ifdef CONFIG_SAMA5_EMACA
-  phydbg("EMAC: devname=%s\n", SAMA5_EMAC_DEVNAME);
+  phyinfo("EMAC: devname=%s\n", SAMA5_EMAC_DEVNAME);
 #endif
 #ifdef CONFIG_SAMA5_GMAC
-  phydbg("GMAC: devname=%s\n", SAMA5_GMAC_DEVNAME);
+  phyinfo("GMAC: devname=%s\n", SAMA5_GMAC_DEVNAME);
 #endif
 
 #ifdef CONFIG_SAMA5_EMACA
   if (strcmp(intf, SAMA5_EMAC_DEVNAME) == 0)
     {
-      phydbg("Select EMAC\n");
-      phandler = &g_emac_handler;
+      phyinfo("Select EMAC\n");
       pinset   = PIO_INT_ETH1;
       irq      = IRQ_INT_ETH1;
       enabler  = sam_emac_phy_enable;
@@ -298,8 +284,7 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
 #ifdef CONFIG_SAMA5_GMAC
   if (strcmp(intf, SAMA5_GMAC_DEVNAME) == 0)
     {
-      phydbg("Select GMAC\n");
-      phandler = &g_gmac_handler;
+      phyinfo("Select GMAC\n");
       pinset   = PIO_INT_ETH0;
       irq      = IRQ_INT_ETH0;
       enabler  = sam_gmac_phy_enable;
@@ -307,7 +292,7 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
   else
 #endif
     {
-      ndbg("Unsupported interface: %s\n", intf);
+      nerr("ERROR: Unsupported interface: %s\n", intf);
       return NULL;
     }
 
@@ -317,24 +302,19 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
 
   flags = enter_critical_section();
 
-  /* Get the old interrupt handler and save the new one */
-
-  oldhandler = *phandler;
-  *phandler = handler;
-
   /* Configure the interrupt */
 
   if (handler)
     {
-      phydbg("Configure pin: %08x\n", pinset);
+      phyinfo("Configure pin: %08x\n", pinset);
       sam_pioirq(pinset);
 
-      phydbg("Attach IRQ%d\n", irq);
-      (void)irq_attach(irq, handler);
+      phyinfo("Attach IRQ%d\n", irq);
+      (void)irq_attach(irq, handler, arg);
     }
   else
     {
-      phydbg("Detach IRQ%d\n", irq);
+      phyinfo("Detach IRQ%d\n", irq);
       (void)irq_detach(irq);
       enabler = NULL;
     }
@@ -353,7 +333,7 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
   /* Return the old handler (so that it can be restored) */
 
   leave_critical_section(flags);
-  return oldhandler;
+  return OK;
 }
 #endif /* CONFIG_SAMA5_PIOE_IRQ */
 
diff --git a/configs/sama5d3-xplained/src/sam_hsmci.c b/configs/sama5d3-xplained/src/sam_hsmci.c
index 4ba3e529d1bd5775d0bd5a4408647502d2b85b4e..d32f6ab26b5ad59694f1e3aada3b4fccbab64b0a 100644
--- a/configs/sama5d3-xplained/src/sam_hsmci.c
+++ b/configs/sama5d3-xplained/src/sam_hsmci.c
@@ -86,10 +86,6 @@
 
 #ifdef HAVE_HSMCI
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -112,7 +108,7 @@ struct sam_hsmci_state_s
 /* HSCMI device state */
 
 #ifdef CONFIG_SAMA5_HSMCI0
-static int sam_hsmci0_cardetect(int irq, void *regs);
+static int sam_hsmci0_cardetect(int irq, void *regs, FAR void *arg);
 
 static struct sam_hsmci_state_s g_hsmci0 =
 {
@@ -124,7 +120,7 @@ static struct sam_hsmci_state_s g_hsmci0 =
 #endif
 
 #ifdef CONFIG_SAMA5_HSMCI1
-static int sam_hsmci1_cardetect(int irq, void *regs);
+static int sam_hsmci1_cardetect(int irq, void *regs, FAR void *arg);
 
 static struct sam_hsmci_state_s g_hsmci1 =
 {
@@ -154,7 +150,7 @@ bool sam_cardinserted_internal(struct sam_hsmci_state_s *state)
   /* Get the state of the PIO pin */
 
   inserted = sam_pioread(state->pincfg);
-  fllvdbg("Slot %d inserted: %s\n", state->slotno, inserted ? "NO" : "YES");
+  finfo("Slot %d inserted: %s\n", state->slotno, inserted ? "NO" : "YES");
   return !inserted;
 }
 
@@ -189,14 +185,14 @@ static int sam_hsmci_cardetect(struct sam_hsmci_state_s *state)
 }
 
 #ifdef CONFIG_SAMA5_HSMCI0
-static int sam_hsmci0_cardetect(int irq, void *regs)
+static int sam_hsmci0_cardetect(int irq, void *regs, FAR void *arg)
 {
   return sam_hsmci_cardetect(&g_hsmci0);
 }
 #endif
 
 #ifdef CONFIG_SAMA5_HSMCI1
-static int sam_hsmci1_cardetect(int irq, void *regs)
+static int sam_hsmci1_cardetect(int irq, void *regs, FAR void *arg)
 {
   return sam_hsmci_cardetect(&g_hsmci1);
 }
@@ -257,7 +253,7 @@ int sam_hsmci_initialize(int slotno, int minor)
   state = sam_hsmci_state(slotno);
   if (!state)
     {
-      fdbg("No state for slotno %d\n", slotno);
+      ferr("ERROR: No state for slotno %d\n", slotno);
       return -EINVAL;
     }
 
@@ -271,7 +267,7 @@ int sam_hsmci_initialize(int slotno, int minor)
   state->hsmci = sdio_initialize(slotno);
   if (!state->hsmci)
     {
-      fdbg("Failed to initialize SDIO slot %d\n",  slotno);
+      ferr("ERROR: Failed to initialize SDIO slot %d\n",  slotno);
       return -ENODEV;
     }
 
@@ -280,14 +276,14 @@ int sam_hsmci_initialize(int slotno, int minor)
   ret = mmcsd_slotinitialize(minor, state->hsmci);
   if (ret != OK)
     {
-      fdbg("Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
+      ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
       return ret;
     }
 
   /* Configure card detect interrupts */
 
   sam_pioirq(state->pincfg);
-  (void)irq_attach(state->irq, state->handler);
+  (void)irq_attach(state->irq, state->handler, NULL);
 
   /* Then inform the HSMCI driver if there is or is not a card in the slot. */
 
@@ -317,7 +313,7 @@ bool sam_cardinserted(int slotno)
   state = sam_hsmci_state(slotno);
   if (!state)
     {
-      fdbg("No state for slotno %d\n", slotno);
+      ferr("ERROR: No state for slotno %d\n", slotno);
       return false;
     }
 
diff --git a/configs/sama5d3-xplained/src/sam_i2schar.c b/configs/sama5d3-xplained/src/sam_i2schar.c
index 8842c1046f1c13f9b5ed7a1c5d364e6851d1c38b..51510b4e6ecfeb1fdd0eb83b22074173e8f21393 100644
--- a/configs/sama5d3-xplained/src/sam_i2schar.c
+++ b/configs/sama5d3-xplained/src/sam_i2schar.c
@@ -99,7 +99,7 @@ int i2schar_devinit(void)
       i2s = sam_ssc_initialize(CONFIG_SAMA5D3XPLAINED_SSC_PORT);
       if (!i2s)
         {
-          dbg("ERROR: Failed to get the SAMA5 SSC/I2S driver for SSC%d\n",
+          _err("ERROR: Failed to get the SAMA5 SSC/I2S driver for SSC%d\n",
               CONFIG_SAMA5D3XPLAINED_SSC_PORT);
           return -ENODEV;
         }
@@ -109,7 +109,7 @@ int i2schar_devinit(void)
       ret = i2schar_register(i2s, CONFIG_SAMA5D3XPLAINED_I2SCHAR_MINOR);
       if (ret < 0)
         {
-          adbg("ERROR: i2schar_register failed: %d\n", ret);
+          aerr("ERROR: i2schar_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/sama5d3-xplained/src/sam_nandflash.c b/configs/sama5d3-xplained/src/sam_nandflash.c
index 270b3624daa461a146aee3f3a286a4fe24452c20..69157cc3faa7a251d93a51608b1f4dbd5ac9a32c 100644
--- a/configs/sama5d3-xplained/src/sam_nandflash.c
+++ b/configs/sama5d3-xplained/src/sam_nandflash.c
@@ -186,7 +186,7 @@ int sam_nand_automount(int minor)
       mtd = sam_nand_initialize(HSMC_CS3);
       if (!mtd)
         {
-          fdbg("ERROR: Failed to create the NAND driver on CS%d\n", HSMC_CS3);
+          ferr("ERROR: Failed to create the NAND driver on CS%d\n", HSMC_CS3);
           return -ENODEV;
         }
 
@@ -196,7 +196,7 @@ int sam_nand_automount(int minor)
       ret = ftl_initialize(NAND_MINOR, mtd);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to initialize the FTL layer: %d\n", ret);
+          ferr("ERROR: Failed to initialize the FTL layer: %d\n", ret);
           return ret;
         }
 
@@ -206,7 +206,7 @@ int sam_nand_automount(int minor)
       ret = nxffs_initialize(mtd);
       if (ret < 0)
         {
-          fdbg("ERROR: NXFFS initialization failed: %d\n", ret);
+          ferr("ERROR: NXFFS initialization failed: %d\n", ret);
           return ret;
         }
 
@@ -215,7 +215,7 @@ int sam_nand_automount(int minor)
       ret = mount(NULL, "/mnt/nand", "nxffs", 0, NULL);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
+          ferr("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
           return ret;
         }
 #endif
diff --git a/configs/sama5d3-xplained/src/sam_pwm.c b/configs/sama5d3-xplained/src/sam_pwm.c
index 59eca5189c7a621b2d39fd9910801ce7ebd9b891..bbb6b054174a07ed8a231d846381f86ed6352ae2 100644
--- a/configs/sama5d3-xplained/src/sam_pwm.c
+++ b/configs/sama5d3-xplained/src/sam_pwm.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/sama5d3-xplained/src/sam_pwm.c
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -44,7 +44,7 @@
 #include 
 
 #include 
-#include 
+#include 
 
 #include 
 
@@ -107,24 +107,19 @@
 
 #if defined(CONFIG_PWM) && defined(CONFIG_SAMA5_PWM)
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_pwm_setup
+ * Name: sam_pwm_setup
  *
  * Description:
- *   All SAMA5 architectures must provide the following interface to work with
- *   examples/pwm.
+ *   Initialize PWM and register the PWM device.
  *
  ************************************************************************************/
 
-int board_pwm_setup(void)
+int sam_pwm_setup(void)
 {
   static bool initialized = false;
   struct pwm_lowerhalf_s *pwm;
@@ -139,7 +134,7 @@ int board_pwm_setup(void)
       pwm = sam_pwminitialize(CONFIG_SAMA5D3XPLAINED_CHANNEL);
       if (!pwm)
         {
-          dbg("Failed to get the SAMA5 PWM lower half\n");
+          _err("ERROR: Failed to get the SAMA5 PWM lower half\n");
           return -ENODEV;
         }
 
@@ -148,7 +143,7 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/pwm0", pwm);
       if (ret < 0)
         {
-          adbg("pwm_register failed: %d\n", ret);
+          aerr("ERROR: pwm_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/sama5d3-xplained/src/sam_spi.c b/configs/sama5d3-xplained/src/sam_spi.c
index 24672d8c334c082568a02ac65df090bccd6274af..9c42a10d656e16f423f733da887b0a2fa89d661e 100644
--- a/configs/sama5d3-xplained/src/sam_spi.c
+++ b/configs/sama5d3-xplained/src/sam_spi.c
@@ -55,32 +55,6 @@
 
 #if defined(CONFIG_SAMA5_SPI0) || defined(CONFIG_SAMA5_SPI1)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
diff --git a/configs/sama5d3-xplained/src/sam_usb.c b/configs/sama5d3-xplained/src/sam_usb.c
index ac747277ffe444d1a36af04f27d4de94e637123c..cad7cf01500d3e20aa3fdc186f35d2f3fda1b61e 100644
--- a/configs/sama5d3-xplained/src/sam_usb.c
+++ b/configs/sama5d3-xplained/src/sam_usb.c
@@ -115,13 +115,13 @@ static int usbhost_waiter(struct usbhost_connection_s *dev)
 {
   struct usbhost_hubport_s *hport;
 
-  uvdbg("Running\n");
+  uinfo("Running\n");
   for (;;)
     {
       /* Wait for the device to change state */
 
       DEBUGVERIFY(CONN_WAIT(dev, &hport));
-      uvdbg("%s\n", hport->connected ? "connected" : "disconnected");
+      uinfo("%s\n", hport->connected ? "connected" : "disconnected");
 
       /* Did we just become connected? */
 
@@ -309,7 +309,7 @@ int sam_usbhost_initialize(void)
   ret = usbhost_hub_initialize();
   if (ret < 0)
     {
-      udbg("ERROR: usbhost_hub_initialize failed: %d\n", ret);
+      uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
     }
 #endif
 
@@ -319,7 +319,7 @@ int sam_usbhost_initialize(void)
   ret = usbhost_msc_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the mass storage class: %d\n", ret);
+      uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
     }
 #endif
 
@@ -329,7 +329,7 @@ int sam_usbhost_initialize(void)
   ret = usbhost_cdcacm_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
+      uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
     }
 #endif
 
@@ -339,7 +339,7 @@ int sam_usbhost_initialize(void)
   ret = usbhost_kbdinit();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the KBD class\n");
+      uerr("ERROR: Failed to register the KBD class\n");
     }
 #endif
 
@@ -351,7 +351,7 @@ int sam_usbhost_initialize(void)
   g_ohciconn = sam_ohci_initialize(0);
   if (!g_ohciconn)
     {
-      udbg("ERROR: sam_ohci_initialize failed\n");
+      uerr("ERROR: sam_ohci_initialize failed\n");
       return -ENODEV;
     }
 
@@ -362,7 +362,7 @@ int sam_usbhost_initialize(void)
                     (main_t)ohci_waiter, (FAR char * const *)NULL);
   if (pid < 0)
     {
-      udbg("ERROR: Failed to create ohci_waiter task: %d\n", ret);
+      uerr("ERROR: Failed to create ohci_waiter task: %d\n", ret);
       return -ENODEV;
     }
 #endif
@@ -373,7 +373,7 @@ int sam_usbhost_initialize(void)
   g_ehciconn = sam_ehci_initialize(0);
   if (!g_ehciconn)
     {
-      udbg("ERROR: sam_ehci_initialize failed\n");
+      uerr("ERROR: sam_ehci_initialize failed\n");
       return -ENODEV;
     }
 
@@ -384,7 +384,7 @@ int sam_usbhost_initialize(void)
                     (main_t)ehci_waiter, (FAR char * const *)NULL);
   if (pid < 0)
     {
-      udbg("ERROR: Failed to create ehci_waiter task: %d\n", ret);
+      uerr("ERROR: Failed to create ehci_waiter task: %d\n", ret);
       return -ENODEV;
     }
 #endif
@@ -415,7 +415,7 @@ void sam_usbhost_vbusdrive(int rhport, bool enable)
 {
   pio_pinset_t pinset = 0;
 
-  uvdbg("RHPort%d: enable=%d\n", rhport+1, enable);
+  uinfo("RHPort%d: enable=%d\n", rhport+1, enable);
 
   /* Pick the PIO configuration associated with the selected root hub port */
 
@@ -423,13 +423,13 @@ void sam_usbhost_vbusdrive(int rhport, bool enable)
     {
     case SAM_RHPORT1:
 #if !defined(CONFIG_SAMA5_UHPHS_RHPORT1)
-      udbg("ERROR: RHPort1 is not available in this configuration\n");
+      uerr("ERROR: RHPort1 is not available in this configuration\n");
       return;
 
 #elif !defined(PIO_USBA_VBUS_ENABLE)
       /* SAMA5D3-Xplained has no port A VBUS enable */
 
-      udbg("ERROR: RHPort1 has no VBUS enable\n");
+      uerr("ERROR: RHPort1 has no VBUS enable\n");
       return;
 #else
       pinset = PIO_USBA_VBUS_ENABLE;
@@ -438,7 +438,7 @@ void sam_usbhost_vbusdrive(int rhport, bool enable)
 
     case SAM_RHPORT2:
 #ifndef CONFIG_SAMA5_UHPHS_RHPORT2
-      udbg("ERROR: RHPort2 is not available in this configuration\n");
+      uerr("ERROR: RHPort2 is not available in this configuration\n");
       return;
 #else
       pinset = PIO_USBB_VBUS_ENABLE;
@@ -447,7 +447,7 @@ void sam_usbhost_vbusdrive(int rhport, bool enable)
 
     case SAM_RHPORT3:
 #ifndef CONFIG_SAMA5_UHPHS_RHPORT3
-      udbg("ERROR: RHPort3 is not available in this configuration\n");
+      uerr("ERROR: RHPort3 is not available in this configuration\n");
       return;
 #else
       pinset = PIO_USBC_VBUS_ENABLE;
@@ -455,7 +455,7 @@ void sam_usbhost_vbusdrive(int rhport, bool enable)
 #endif
 
     default:
-      udbg("ERROR: RHPort%d is not supported\n", rhport+1);
+      uerr("ERROR: RHPort%d is not supported\n", rhport+1);
       return;
     }
 
@@ -517,7 +517,7 @@ xcpt_t sam_setup_overcurrent(xcpt_t handler)
   /* Configure the interrupt */
 
   sam_pioirq(PIO_USBBC_VBUS_OVERCURRENT);
-  (void)irq_attach(IRQ_USBBC_VBUS_OVERCURRENT, handler);
+  (void)irq_attach(IRQ_USBBC_VBUS_OVERCURRENT, handler, NULL);
   sam_pioirqenable(IRQ_USBBC_VBUS_OVERCURRENT);
 
   /* Return the old handler (so that it can be restored) */
@@ -546,7 +546,7 @@ xcpt_t sam_setup_overcurrent(xcpt_t handler)
 #ifdef CONFIG_USBDEV
 void sam_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
 #endif
 
diff --git a/configs/sama5d3-xplained/src/sam_userleds.c b/configs/sama5d3-xplained/src/sam_userleds.c
index ae103f242c29d70cd283c9a6de159372443d03c5..bff302f3641baffcdb9a4baf4ae1f164e39b53ec 100644
--- a/configs/sama5d3-xplained/src/sam_userleds.c
+++ b/configs/sama5d3-xplained/src/sam_userleds.c
@@ -63,22 +63,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/sama5d3-xplained/src/sama5d3-xplained.h b/configs/sama5d3-xplained/src/sama5d3-xplained.h
index 9b4c56b93da01debb31165ce79e20b06b0ebad92..40de794377d436d893ca2ee13283761a42640833 100644
--- a/configs/sama5d3-xplained/src/sama5d3-xplained.h
+++ b/configs/sama5d3-xplained/src/sama5d3-xplained.h
@@ -237,7 +237,7 @@
 
 /* Check if we should enable the USB monitor before starting NSH */
 
-#ifndef CONFIG_SYSTEM_USBMONITOR
+#ifndef CONFIG_USBMONITOR
 #  undef HAVE_USBMONITOR
 #endif
 
@@ -725,41 +725,66 @@ bool sam_writeprotected(int slotno);
 void weak_function sam_usbinitialize(void);
 #endif
 
-/****************************************************************************************************
+/************************************************************************************
  * Name: stm32_usbhost_initialize
  *
  * Description:
- *   Called at application startup time to initialize the USB host functionality. This function will
- *   start a thread that will monitor for device connection/disconnection events.
+ *   Called at application startup time to initialize the USB host functionality.
+ *   This function will start a thread that will monitor for device connection/
+ *   disconnection events.
  *
- ****************************************************************************************************/
+ ************************************************************************************/
 
 #ifdef HAVE_USBHOST
 int sam_usbhost_initialize(void);
 #endif
 
 /************************************************************************************
- * Name: sam_netinitialize
+ * Name: sam_pwm_setup
  *
  * Description:
- *   Configure board resources to support networking.
+ *   Initialize PWM and register the PWM device.
  *
  ************************************************************************************/
 
-#ifdef HAVE_NETWORK
-void weak_function sam_netinitialize(void);
+#ifdef CONFIG_PWM
+int sam_pwm_setup(void);
+#endif
+
+/************************************************************************************
+ * Name: sam_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ADC
+int sam_adc_setup(void);
 #endif
 
 /************************************************************************************
- * Name: board_adc_initialize
+ * Name: sam_can_setup
  *
  * Description:
- *   Initialize and register the ADC driver
+ *  Initialize CAN and register the CAN device
  *
  ************************************************************************************/
 
-#ifdef CONFIG_SAMA5_ADC
-int board_adc_initialize(void);
+#ifdef CONFIG_CAN
+int sam_can_setup(void);
+#endif
+
+/************************************************************************************
+ * Name: sam_netinitialize
+ *
+ * Description:
+ *   Configure board resources to support networking.
+ *
+ ************************************************************************************/
+
+#ifdef HAVE_NETWORK
+void weak_function sam_netinitialize(void);
 #endif
 
 #endif /* __ASSEMBLY__ */
diff --git a/configs/sama5d3x-ek/Kconfig b/configs/sama5d3x-ek/Kconfig
index a4ec696250742cb864f085a83a34ffd6118b5da4..553d05bb9b2ab5323290e0aff90ea7cdfedb36cb 100644
--- a/configs/sama5d3x-ek/Kconfig
+++ b/configs/sama5d3x-ek/Kconfig
@@ -51,7 +51,7 @@ config SAMA5D3xEK_NOREDLED
 config SAMA5D3xEK_NOR_MAIN
 	bool "Build nor_main"
 	default n
-	depends on SAMA5_BOOT_ISRAM
+	depends on SAMA5_BOOT_ISRAM && BUILD_FLAT
 	---help---
 		nor_main is a tiny program that runs in ISRAM.  nor_main will enable
 		NOR flash then either (1) jump to the program in NOR flash or (2)
diff --git a/configs/sama5d3x-ek/README.txt b/configs/sama5d3x-ek/README.txt
index 82a5c2fd4cc71670be5810a16352828f05f7d453..73d3ef0b94d103517dd819048c69d8ac7b0ca7c6 100644
--- a/configs/sama5d3x-ek/README.txt
+++ b/configs/sama5d3x-ek/README.txt
@@ -1534,7 +1534,7 @@ USB High-Speed Device
   --------------------
 
   There is normal console debug output available that can be enabled with
-  CONFIG_DEBUG + CONFIG_DEBUG_USB.  However, USB device operation is very
+  CONFIG_DEBUG_FEATURES + CONFIG_DEBUG_USB.  However, USB device operation is very
   time critical and enabling this debug output WILL interfere with the
   operation of the UDPHS.  USB device tracing is a less invasive way to get
   debug information:  If tracing is enabled, the USB device will save
@@ -1552,15 +1552,15 @@ USB High-Speed Device
       CONFIG_NSH_ARCHINIT=y                   : Automatically start the USB monitor
 
     Application Configuration -> System NSH Add-Ons:
-      CONFIG_SYSTEM_USBMONITOR=y              : Enable the USB monitor daemon
-      CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
-      CONFIG_SYSTEM_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
-      CONFIG_SYSTEM_USBMONITOR_INTERVAL=1     : Dump trace data every second
-      CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y    : Enable TRACE output
-      CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y
-      CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y
-      CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y
-      CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y
+      CONFIG_USBMONITOR=y              : Enable the USB monitor daemon
+      CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
+      CONFIG_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
+      CONFIG_USBMONITOR_INTERVAL=1     : Dump trace data every second
+      CONFIG_USBMONITOR_TRACEINIT=y    : Enable TRACE output
+      CONFIG_USBMONITOR_TRACECLASS=y
+      CONFIG_USBMONITOR_TRACETRANSFERS=y
+      CONFIG_USBMONITOR_TRACECONTROLLER=y
+      CONFIG_USBMONITOR_TRACEINTERRUPTS=y
 
   NOTE: If USB debug output is also enabled, both outputs will appear on the
   serial console.  However, the debug output will be asynchronous with the
@@ -1718,7 +1718,7 @@ USB High-Speed Host
   ------------------
 
   There is normal console debug output available that can be enabled with
-  CONFIG_DEBUG + CONFIG_DEBUG_USB.  However, USB host operation is very time
+  CONFIG_DEBUG_FEATURES + CONFIG_DEBUG_USB.  However, USB host operation is very time
   critical and enabling this debug output might interfere with the operation
   of the UDPHS.  USB host tracing is a less invasive way to get debug
   information:  If tracing is enabled, the USB host will save encoded trace
@@ -1736,10 +1736,10 @@ USB High-Speed Host
       CONFIG_NSH_ARCHINIT=y                   : Automatically start the USB monitor
 
     Application Configuration -> System NSH Add-Ons:
-      CONFIG_SYSTEM_USBMONITOR=y              : Enable the USB monitor daemon
-      CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
-      CONFIG_SYSTEM_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
-      CONFIG_SYSTEM_USBMONITOR_INTERVAL=1     : Dump trace data every second
+      CONFIG_USBMONITOR=y              : Enable the USB monitor daemon
+      CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
+      CONFIG_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
+      CONFIG_USBMONITOR_INTERVAL=1     : Dump trace data every second
 
   NOTE: If USB debug output is also enabled, both outpus will appear on the
   serial console.  However, the debug output will be asynchronous with the
diff --git a/configs/sama5d3x-ek/demo/Make.defs b/configs/sama5d3x-ek/demo/Make.defs
index 30196f10fdd19f48406b684bc6a13a701e91efed..5f73055eded438f2e40b9862f8a3c3518fcb4d59 100644
--- a/configs/sama5d3x-ek/demo/Make.defs
+++ b/configs/sama5d3x-ek/demo/Make.defs
@@ -96,7 +96,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sama5d3x-ek/demo/defconfig b/configs/sama5d3x-ek/demo/defconfig
index fc3d188f8975f9adb789072951b98983744f9a95..36d6061a81f9d3ad20d1c5d945048035919aed05 100644
--- a/configs/sama5d3x-ek/demo/defconfig
+++ b/configs/sama5d3x-ek/demo/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +66,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,10 +81,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +103,7 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -105,7 +111,9 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 # CONFIG_ARCH_CORTEXM7 is not set
 CONFIG_ARCH_CORTEXA5=y
@@ -119,9 +127,12 @@ CONFIG_ARCH_CORTEXA5=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-a"
 CONFIG_ARCH_CHIP="sama5"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 CONFIG_ARCH_FPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
@@ -131,6 +142,8 @@ CONFIG_ARCH_LOWVECTORS=y
 # ARMv7-A Configuration Options
 #
 # CONFIG_ARMV7A_HAVE_GICv2 is not set
+# CONFIG_ARMV7A_HAVE_GTM is not set
+# CONFIG_ARMV7A_HAVE_PTM is not set
 # CONFIG_ARMV7A_HAVE_L2CC is not set
 # CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set
 # CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set
@@ -141,8 +154,6 @@ CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y
 # CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set
 # CONFIG_ARMV7A_DECODEFIQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 # CONFIG_USBHOST_BULK_DISABLE is not set
 # CONFIG_USBHOST_INT_DISABLE is not set
 CONFIG_USBHOST_ISOC_DISABLE=y
@@ -187,7 +198,6 @@ CONFIG_SAMA5_HAVE_PIOE=y
 # CONFIG_SAMA5_HAVE_TC is not set
 # CONFIG_SAMA5_HAVE_TC1 is not set
 # CONFIG_SAMA5_HAVE_TC2 is not set
-# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_SAMA5_HAVE_TWI3 is not set
 # CONFIG_SAMA5_HAVE_VDEC is not set
 # CONFIG_SAMA5_FLEXCOM is not set
@@ -270,6 +280,7 @@ CONFIG_SAMA5_SPI_DMATHRESHOLD=4
 #
 # HSMCI device driver options
 #
+CONFIG_SAMA5_HSMCI_DMA=y
 # CONFIG_SAMA5_HSMCI_RDPROOF is not set
 # CONFIG_SAMA5_HSMCI_WRPROOF is not set
 
@@ -407,8 +418,6 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
@@ -424,12 +433,11 @@ CONFIG_SAMA5D3xEK_AT25_FTL=y
 CONFIG_SAMA5D3xEK_USBHOST_STACKSIZE=1024
 CONFIG_SAMA5D3xEK_USBHOST_PRIO=100
 # CONFIG_SAMA5D3xEK_SLOWCLOCK is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -451,6 +459,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=16
@@ -460,6 +469,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -476,6 +486,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -547,6 +559,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
 CONFIG_ARCH_HAVE_RNG=y
 CONFIG_DEV_RANDOM=y
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -562,19 +575,24 @@ CONFIG_DEV_RANDOM=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 # CONFIG_RTC_ALARM is not set
@@ -586,8 +604,18 @@ CONFIG_RTC_DATETIME=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -595,6 +623,7 @@ CONFIG_RTC_DATETIME=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -603,10 +632,12 @@ CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
 CONFIG_MMCSD_HAVECARDDETECT=y
 # CONFIG_MMCSD_SPI is not set
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
 CONFIG_MMCSD_SDIO=y
 # CONFIG_SDIO_PREFLIGHT is not set
 # CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_SDIO_BLOCKSETUP=y
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -631,12 +662,16 @@ CONFIG_MTD_AT25=y
 CONFIG_AT25_SPIMODE=0
 CONFIG_AT25_SPIFREQUENCY=10000000
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -644,9 +679,10 @@ CONFIG_AT25_SPIFREQUENCY=10000000
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -670,10 +706,6 @@ CONFIG_USART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -696,6 +728,7 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -738,6 +771,7 @@ CONFIG_USBHOST_NPREALLOC=4
 CONFIG_USBHOST_HAVE_ASYNCH=y
 # CONFIG_USBHOST_ASYNCH is not set
 # CONFIG_USBHOST_HUB is not set
+# CONFIG_USBHOST_COMPOSITE is not set
 CONFIG_USBHOST_MSC=y
 # CONFIG_USBHOST_CDCACM is not set
 CONFIG_USBHOST_HIDKBD=y
@@ -750,17 +784,23 @@ CONFIG_HIDKBD_BUFSIZE=64
 # CONFIG_HIDKBD_NODEBOUNCE is not set
 # CONFIG_USBHOST_HIDMOUSE is not set
 # CONFIG_USBHOST_TRACE is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -814,12 +854,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MTD is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -863,11 +897,28 @@ CONFIG_SYMTAB_ORDEREDBYNAME=y
 CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7A_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -884,15 +935,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -923,9 +981,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -934,10 +993,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -947,40 +1006,40 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RANDOM is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1000,8 +1059,9 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1012,6 +1072,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -1066,12 +1127,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1088,11 +1149,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -1127,13 +1191,13 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1141,7 +1205,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
 CONFIG_SYSTEM_USBMSC=y
 CONFIG_SYSTEM_USBMSC_NLUNS=1
@@ -1154,4 +1219,5 @@ CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2"
 # CONFIG_SYSTEM_USBMSC_DEBUGMM is not set
 CONFIG_SYSTEM_USBMSC_CMD_STACKSIZE=768
 CONFIG_SYSTEM_USBMSC_CMD_PRIORITY=100
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sama5d3x-ek/hello/Make.defs b/configs/sama5d3x-ek/hello/Make.defs
index 534cbd06bc15ad0eb1fc1b85bfe03efda2d348b1..cdc2a9468fed41a21f124fc836ceb43157b9bda0 100644
--- a/configs/sama5d3x-ek/hello/Make.defs
+++ b/configs/sama5d3x-ek/hello/Make.defs
@@ -96,7 +96,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sama5d3x-ek/hello/defconfig b/configs/sama5d3x-ek/hello/defconfig
index 0be49453e11983fcc2c1a473d8eaeeb39f163533..0283dd63c65e1ba0d22676cc60b97a18c1c7b3f0 100644
--- a/configs/sama5d3x-ek/hello/defconfig
+++ b/configs/sama5d3x-ek/hello/defconfig
@@ -46,10 +46,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,10 +76,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +98,7 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -119,9 +120,12 @@ CONFIG_ARCH_CORTEXA5=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-a"
 CONFIG_ARCH_CHIP="sama5"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 CONFIG_ARCH_FPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
@@ -131,6 +135,8 @@ CONFIG_ARCH_LOWVECTORS=y
 # ARMv7-A Configuration Options
 #
 # CONFIG_ARMV7A_HAVE_GICv2 is not set
+# CONFIG_ARMV7A_HAVE_GTM is not set
+# CONFIG_ARMV7A_HAVE_PTM is not set
 # CONFIG_ARMV7A_HAVE_L2CC is not set
 # CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set
 # CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set
@@ -182,7 +188,6 @@ CONFIG_SAMA5_HAVE_PIOE=y
 # CONFIG_SAMA5_HAVE_TC is not set
 # CONFIG_SAMA5_HAVE_TC1 is not set
 # CONFIG_SAMA5_HAVE_TC2 is not set
-# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_SAMA5_HAVE_TWI3 is not set
 # CONFIG_SAMA5_HAVE_VDEC is not set
 # CONFIG_SAMA5_FLEXCOM is not set
@@ -486,7 +491,12 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -494,6 +504,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -502,9 +513,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -528,10 +540,6 @@ CONFIG_USART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
@@ -557,15 +565,18 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -596,12 +607,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -664,12 +669,14 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -700,10 +707,10 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 CONFIG_EXAMPLES_HELLO=y
 CONFIG_EXAMPLES_HELLO_PRIORITY=100
 CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -712,20 +719,19 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -737,10 +743,9 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -762,8 +767,8 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -774,6 +779,7 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -795,16 +801,16 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sama5d3x-ek/norboot/Make.defs b/configs/sama5d3x-ek/norboot/Make.defs
index a1685440e9362ff7753a6f42548488d746ea89f4..369190f32a0c1453dae5287a76509ad2135cad90 100644
--- a/configs/sama5d3x-ek/norboot/Make.defs
+++ b/configs/sama5d3x-ek/norboot/Make.defs
@@ -96,7 +96,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sama5d3x-ek/norboot/defconfig b/configs/sama5d3x-ek/norboot/defconfig
index 56b211c95f5cf12cd65e2b9a52852431d046f28e..9874b75963ba388403635629dc7d91f6d2465c99 100644
--- a/configs/sama5d3x-ek/norboot/defconfig
+++ b/configs/sama5d3x-ek/norboot/defconfig
@@ -46,10 +46,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,10 +76,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +98,7 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -119,9 +120,12 @@ CONFIG_ARCH_CORTEXA5=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-a"
 CONFIG_ARCH_CHIP="sama5"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 CONFIG_ARCH_FPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
@@ -131,6 +135,8 @@ CONFIG_ARCH_LOWVECTORS=y
 # ARMv7-A Configuration Options
 #
 # CONFIG_ARMV7A_HAVE_GICv2 is not set
+# CONFIG_ARMV7A_HAVE_GTM is not set
+# CONFIG_ARMV7A_HAVE_PTM is not set
 # CONFIG_ARMV7A_HAVE_L2CC is not set
 # CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set
 # CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set
@@ -182,7 +188,6 @@ CONFIG_SAMA5_HAVE_PIOE=y
 # CONFIG_SAMA5_HAVE_TC is not set
 # CONFIG_SAMA5_HAVE_TC1 is not set
 # CONFIG_SAMA5_HAVE_TC2 is not set
-# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_SAMA5_HAVE_TWI3 is not set
 # CONFIG_SAMA5_HAVE_VDEC is not set
 # CONFIG_SAMA5_FLEXCOM is not set
@@ -500,7 +505,12 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -508,6 +518,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -516,9 +527,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -542,10 +554,6 @@ CONFIG_USART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
@@ -571,15 +579,18 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -610,12 +621,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -678,12 +683,14 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -714,10 +721,10 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 CONFIG_EXAMPLES_HELLO=y
 CONFIG_EXAMPLES_HELLO_PRIORITY=100
 CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -726,20 +733,19 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -751,10 +757,9 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -776,8 +781,8 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -788,6 +793,7 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -809,16 +815,16 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sama5d3x-ek/nsh/Make.defs b/configs/sama5d3x-ek/nsh/Make.defs
index 8c63acfd6c05a29f324eb2d2dbb579baf1a90035..2c369c9dcd730140ea846962214d58577677b781 100644
--- a/configs/sama5d3x-ek/nsh/Make.defs
+++ b/configs/sama5d3x-ek/nsh/Make.defs
@@ -96,7 +96,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sama5d3x-ek/nsh/defconfig b/configs/sama5d3x-ek/nsh/defconfig
index 78c20734934ab571745491caa058b12107305d16..d8ac8672a63e601fa66805f192837e838792ffa4 100644
--- a/configs/sama5d3x-ek/nsh/defconfig
+++ b/configs/sama5d3x-ek/nsh/defconfig
@@ -46,10 +46,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,10 +76,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +98,7 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -119,9 +120,12 @@ CONFIG_ARCH_CORTEXA5=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-a"
 CONFIG_ARCH_CHIP="sama5"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 CONFIG_ARCH_FPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
@@ -131,6 +135,8 @@ CONFIG_ARCH_LOWVECTORS=y
 # ARMv7-A Configuration Options
 #
 # CONFIG_ARMV7A_HAVE_GICv2 is not set
+# CONFIG_ARMV7A_HAVE_GTM is not set
+# CONFIG_ARMV7A_HAVE_PTM is not set
 # CONFIG_ARMV7A_HAVE_L2CC is not set
 # CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set
 # CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set
@@ -182,7 +188,6 @@ CONFIG_SAMA5_HAVE_PIOE=y
 # CONFIG_SAMA5_HAVE_TC is not set
 # CONFIG_SAMA5_HAVE_TC1 is not set
 # CONFIG_SAMA5_HAVE_TC2 is not set
-# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_SAMA5_HAVE_TWI3 is not set
 # CONFIG_SAMA5_HAVE_VDEC is not set
 # CONFIG_SAMA5_FLEXCOM is not set
@@ -504,7 +509,12 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -512,6 +522,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -520,9 +531,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -546,10 +558,6 @@ CONFIG_USART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -576,15 +584,18 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -637,12 +648,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -707,13 +712,15 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -757,10 +764,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -770,35 +777,33 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -822,8 +827,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -834,6 +839,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -948,12 +954,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -961,6 +967,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sama5d3x-ek/nx/Make.defs b/configs/sama5d3x-ek/nx/Make.defs
index 4e0b8da8a904f59997d73c1d3f61fc87cd1a1f18..fa74d1e559d338967d55b7c88a56561133788932 100644
--- a/configs/sama5d3x-ek/nx/Make.defs
+++ b/configs/sama5d3x-ek/nx/Make.defs
@@ -96,7 +96,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sama5d3x-ek/nx/defconfig b/configs/sama5d3x-ek/nx/defconfig
index 7a4734bead85c26f64d31cb30b2d0387336fa2f9..feca63cb89821d1ba5a5c3924d80facd0c873d09 100644
--- a/configs/sama5d3x-ek/nx/defconfig
+++ b/configs/sama5d3x-ek/nx/defconfig
@@ -46,10 +46,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +64,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,10 +79,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +101,7 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -119,9 +123,12 @@ CONFIG_ARCH_CORTEXA5=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-a"
 CONFIG_ARCH_CHIP="sama5"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 CONFIG_ARCH_FPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
@@ -131,6 +138,8 @@ CONFIG_ARCH_LOWVECTORS=y
 # ARMv7-A Configuration Options
 #
 # CONFIG_ARMV7A_HAVE_GICv2 is not set
+# CONFIG_ARMV7A_HAVE_GTM is not set
+# CONFIG_ARMV7A_HAVE_PTM is not set
 # CONFIG_ARMV7A_HAVE_L2CC is not set
 # CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set
 # CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set
@@ -182,7 +191,6 @@ CONFIG_SAMA5_HAVE_PIOE=y
 # CONFIG_SAMA5_HAVE_TC is not set
 # CONFIG_SAMA5_HAVE_TC1 is not set
 # CONFIG_SAMA5_HAVE_TC2 is not set
-# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_SAMA5_HAVE_TWI3 is not set
 # CONFIG_SAMA5_HAVE_VDEC is not set
 # CONFIG_SAMA5_FLEXCOM is not set
@@ -404,6 +412,7 @@ CONFIG_SAMA5D3xEK_MT47H128M16RT=y
 # CONFIG_SAMA5D3xEK_MT47H64M16HR is not set
 # CONFIG_SAMA5D3xEK_NOREDLED is not set
 # CONFIG_SAMA5D3xEK_SLOWCLOCK is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -424,6 +433,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=8
@@ -516,6 +526,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -531,12 +542,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -544,8 +559,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -553,6 +578,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -561,9 +587,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -587,10 +614,6 @@ CONFIG_USART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -613,19 +636,26 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -663,12 +693,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -677,6 +701,7 @@ CONFIG_NX_NPLANES=1
 CONFIG_NX_BGCOLOR=0x0
 # CONFIG_NX_ANTIALIASING is not set
 # CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -802,6 +827,8 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -816,14 +843,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -854,9 +884,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -864,10 +895,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -883,20 +914,18 @@ CONFIG_EXAMPLES_NX_DEFAULT_FONT=y
 CONFIG_EXAMPLES_NX_BPP=16
 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set
 CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -908,10 +937,9 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -933,8 +961,9 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -945,6 +974,7 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -967,12 +997,12 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 CONFIG_SYSTEM_READLINE=y
@@ -980,6 +1010,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sama5d3x-ek/nxplayer/Make.defs b/configs/sama5d3x-ek/nxplayer/Make.defs
index 813d3a1460eadf01f52b639ef8505ac82fd583cd..7dd1906749f016a9893f48889ee4fdd97843585f 100644
--- a/configs/sama5d3x-ek/nxplayer/Make.defs
+++ b/configs/sama5d3x-ek/nxplayer/Make.defs
@@ -96,7 +96,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sama5d3x-ek/nxplayer/defconfig b/configs/sama5d3x-ek/nxplayer/defconfig
index 7a1878be00b8698d55b008ab723338cd4ea2ef66..72f90e709d6b212a69375f11276e91d85f4407d3 100644
--- a/configs/sama5d3x-ek/nxplayer/defconfig
+++ b/configs/sama5d3x-ek/nxplayer/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +66,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,10 +81,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +103,7 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -105,7 +111,9 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 # CONFIG_ARCH_CORTEXM7 is not set
 CONFIG_ARCH_CORTEXA5=y
@@ -119,9 +127,12 @@ CONFIG_ARCH_CORTEXA5=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-a"
 CONFIG_ARCH_CHIP="sama5"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 CONFIG_ARCH_FPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
@@ -131,6 +142,8 @@ CONFIG_ARCH_LOWVECTORS=y
 # ARMv7-A Configuration Options
 #
 # CONFIG_ARMV7A_HAVE_GICv2 is not set
+# CONFIG_ARMV7A_HAVE_GTM is not set
+# CONFIG_ARMV7A_HAVE_PTM is not set
 # CONFIG_ARMV7A_HAVE_L2CC is not set
 # CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set
 # CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set
@@ -141,8 +154,6 @@ CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y
 # CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set
 # CONFIG_ARMV7A_DECODEFIQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # SAMA5 Configuration Options
@@ -184,7 +195,6 @@ CONFIG_SAMA5_HAVE_PIOE=y
 # CONFIG_SAMA5_HAVE_TC is not set
 # CONFIG_SAMA5_HAVE_TC1 is not set
 # CONFIG_SAMA5_HAVE_TC2 is not set
-# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_SAMA5_HAVE_TWI3 is not set
 # CONFIG_SAMA5_HAVE_VDEC is not set
 # CONFIG_SAMA5_FLEXCOM is not set
@@ -291,6 +301,7 @@ CONFIG_SAMA5_SSC0_TX_STTDLY=1
 #
 # HSMCI device driver options
 #
+CONFIG_SAMA5_HSMCI_DMA=y
 # CONFIG_SAMA5_HSMCI_RDPROOF is not set
 # CONFIG_SAMA5_HSMCI_WRPROOF is not set
 
@@ -406,8 +417,6 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
@@ -422,11 +431,10 @@ CONFIG_SAMA5D3xEK_SLOWCLOCK=y
 CONFIG_SAMA5D3xEK_WM8904_I2CFREQUENCY=400000
 CONFIG_SAMA5D3xEK_WM8904_SRCMAIN=y
 # CONFIG_SAMA5D3xEK_WM8904_SRCSCK is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -448,6 +456,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=7
@@ -460,6 +469,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -476,6 +486,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -545,6 +557,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -565,12 +578,16 @@ CONFIG_I2C_RESET=y
 # CONFIG_I2C_TRACE is not set
 # CONFIG_I2C_DRIVER is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 CONFIG_I2S=y
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_TIMERS_CS2100CP is not set
@@ -591,8 +608,18 @@ CONFIG_WM8904_WORKER_STACKSIZE=1536
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -600,6 +627,7 @@ CONFIG_WM8904_WORKER_STACKSIZE=1536
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -607,10 +635,12 @@ CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
 # CONFIG_MMCSD_MMCSUPPORT is not set
 CONFIG_MMCSD_HAVECARDDETECT=y
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
 CONFIG_MMCSD_SDIO=y
 # CONFIG_SDIO_PREFLIGHT is not set
 # CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_SDIO_BLOCKSETUP=y
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -619,9 +649,10 @@ CONFIG_SDIO_BLOCKSETUP=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -645,10 +676,6 @@ CONFIG_USART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -671,19 +698,26 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -736,12 +770,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -818,11 +846,28 @@ CONFIG_SYMTAB_ORDEREDBYNAME=y
 CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7A_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -839,15 +884,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -878,9 +930,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -889,10 +942,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -902,35 +955,34 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -954,8 +1006,9 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -966,6 +1019,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -1020,12 +1074,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1042,11 +1096,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -1080,13 +1137,13 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_SYSTEM_I2CTOOL is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_I2CTOOL is not set
+# CONFIG_SYSTEM_INSTALL is not set
 CONFIG_SYSTEM_NXPLAYER=y
 CONFIG_NXPLAYER_PLAYTHREAD_STACKSIZE=1500
 CONFIG_NXPLAYER_COMMAND_LINE=y
@@ -1106,6 +1163,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sama5d3x-ek/nxwm/Make.defs b/configs/sama5d3x-ek/nxwm/Make.defs
index 089d2b4500ecb831328a9b8f956b390502339b05..3d4884fc340f6ce59cb43f094beb1168c6a5b777 100644
--- a/configs/sama5d3x-ek/nxwm/Make.defs
+++ b/configs/sama5d3x-ek/nxwm/Make.defs
@@ -96,7 +96,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sama5d3x-ek/nxwm/defconfig b/configs/sama5d3x-ek/nxwm/defconfig
index 5e533abf0da8ece2290ebd80f6ac0e27ca8cab4e..349a86025e6a89b2317e3affd03dc0c194f54b10 100644
--- a/configs/sama5d3x-ek/nxwm/defconfig
+++ b/configs/sama5d3x-ek/nxwm/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +66,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,10 +81,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +103,7 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -119,9 +125,12 @@ CONFIG_ARCH_CORTEXA5=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-a"
 CONFIG_ARCH_CHIP="sama5"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 CONFIG_ARCH_FPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
@@ -131,6 +140,8 @@ CONFIG_ARCH_LOWVECTORS=y
 # ARMv7-A Configuration Options
 #
 # CONFIG_ARMV7A_HAVE_GICv2 is not set
+# CONFIG_ARMV7A_HAVE_GTM is not set
+# CONFIG_ARMV7A_HAVE_PTM is not set
 # CONFIG_ARMV7A_HAVE_L2CC is not set
 # CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set
 # CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set
@@ -182,7 +193,6 @@ CONFIG_SAMA5_HAVE_PIOE=y
 # CONFIG_SAMA5_HAVE_TC is not set
 # CONFIG_SAMA5_HAVE_TC1 is not set
 # CONFIG_SAMA5_HAVE_TC2 is not set
-# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_SAMA5_HAVE_TWI3 is not set
 # CONFIG_SAMA5_HAVE_VDEC is not set
 # CONFIG_SAMA5_FLEXCOM is not set
@@ -422,7 +432,6 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -435,11 +444,10 @@ CONFIG_SAMA5D3xEK_MT47H128M16RT=y
 # CONFIG_SAMA5D3xEK_NOREDLED is not set
 CONFIG_SAMA5D3xEK_TSD_DEVMINOR=0
 # CONFIG_SAMA5D3xEK_SLOWCLOCK is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
-# CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
+CONFIG_BOARDCTL_TSCTEST=y
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -461,6 +469,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=10
@@ -473,6 +482,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -489,6 +499,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -531,7 +543,7 @@ CONFIG_SIG_SIGWORK=17
 # POSIX Message Queue Options
 #
 CONFIG_PREALLOC_MQ_MSGS=32
-CONFIG_MQ_MAXMSGSIZE=48
+CONFIG_MQ_MAXMSGSIZE=64
 # CONFIG_MODULE is not set
 
 #
@@ -559,6 +571,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=1024
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -574,12 +587,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_ANALOG=y
@@ -602,8 +619,18 @@ CONFIG_INPUT=y
 # CONFIG_BUTTONS is not set
 # CONFIG_DJOYSTICK is not set
 # CONFIG_AJOYSTICK is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -611,6 +638,7 @@ CONFIG_INPUT=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -619,9 +647,10 @@ CONFIG_INPUT=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -645,10 +674,6 @@ CONFIG_USART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -671,19 +696,26 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -729,12 +761,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -743,6 +769,7 @@ CONFIG_NX_NPLANES=1
 CONFIG_NX_BGCOLOR=0x95fa
 # CONFIG_NX_ANTIALIASING is not set
 # CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -818,13 +845,14 @@ CONFIG_NXFONT_SANS28X37B=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 CONFIG_NXTERM=y
 
 #
 # NxTerm Output Text/Graphics Options
 #
 CONFIG_NXTERM_BPP=16
-CONFIG_NXTERM_CURSORCHAR=137
+CONFIG_NXTERM_CURSORCHAR=95
 CONFIG_NXTERM_MXCHARS=640
 CONFIG_NXTERM_CACHESIZE=32
 CONFIG_NXTERM_LINESEPARATION=0
@@ -844,7 +872,11 @@ CONFIG_NX_MULTIUSER=y
 CONFIG_NX_BLOCKING=y
 CONFIG_NX_MXSERVERMSGS=32
 CONFIG_NX_MXCLIENTMSGS=16
-# CONFIG_NX_NXSTART is not set
+# CONFIG_NXSTART_EXTERNINIT is not set
+CONFIG_NXSTART_SERVERPRIO=110
+CONFIG_NXSTART_SERVERSTACK=2048
+CONFIG_NXSTART_DISPLAYNO=0
+CONFIG_NXSTART_VPLANE=0
 
 #
 # Memory Management
@@ -891,6 +923,8 @@ CONFIG_LIBM=y
 CONFIG_LIBC_FLOATINGPOINT=y
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -906,15 +940,20 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -945,9 +984,11 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_ADC is not set
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -955,10 +996,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -967,20 +1008,18 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -992,10 +1031,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1019,8 +1058,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1031,6 +1071,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -1084,12 +1125,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1106,11 +1147,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -1142,10 +1185,7 @@ CONFIG_NXWIDGETS=y
 #
 # CONFIG_NXWIDGETS_FLICKERFREE is not set
 # CONFIG_NXWIDGETS_EXTERNINIT is not set
-CONFIG_NXWIDGETS_VPLANE=0
 CONFIG_NXWIDGET_SERVERINIT=y
-CONFIG_NXWIDGETS_SERVERPRIO=110
-CONFIG_NXWIDGETS_SERVERSTACK=1596
 CONFIG_NXWIDGETS_CLIENTPRIO=100
 CONFIG_NXWIDGETS_LISTENERPRIO=100
 CONFIG_NXWIDGETS_LISTENERSTACK=1596
@@ -1155,6 +1195,7 @@ CONFIG_NXWIDGETS_LISTENERSTACK=1596
 # NXWidget Configuration
 #
 CONFIG_NXWIDGETS_BPP=16
+# CONFIG_NXWIDGETS_GREYSCALE is not set
 CONFIG_NXWIDGETS_SIZEOFCHAR=1
 
 #
@@ -1239,7 +1280,7 @@ CONFIG_NXWM_TOOLBAR_FONTID=6
 CONFIG_NXWM_STARTWINDOW_VSPACING=8
 CONFIG_NXWM_STARTWINDOW_HSPACING=8
 # CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set
-CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm"
+CONFIG_NXWM_STARTWINDOW_MQNAME="nxwm"
 CONFIG_NXWM_STARTWINDOW_MXMSGS=32
 CONFIG_NXWM_STARTWINDOW_MXMPRIO=42
 CONFIG_NXWM_STARTWINDOW_PRIO=100
@@ -1323,12 +1364,12 @@ CONFIG_NXWM_HEXCALCULATOR_FONTID=6
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1336,6 +1377,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sama5d3x-ek/ov2640/Make.defs b/configs/sama5d3x-ek/ov2640/Make.defs
index b5090629e750a09b23a2a1489f1fb857437837cf..063a4799b2157b39c0411aba15488c41b391e945 100644
--- a/configs/sama5d3x-ek/ov2640/Make.defs
+++ b/configs/sama5d3x-ek/ov2640/Make.defs
@@ -96,7 +96,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sama5d3x-ek/ov2640/defconfig b/configs/sama5d3x-ek/ov2640/defconfig
index c058dd759b8691d5217094dcbbe7bc8717c62a22..88077e5f0fcef767fd0baeb245db086b23c576b2 100644
--- a/configs/sama5d3x-ek/ov2640/defconfig
+++ b/configs/sama5d3x-ek/ov2640/defconfig
@@ -46,10 +46,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,10 +76,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +98,7 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -119,9 +120,12 @@ CONFIG_ARCH_CORTEXA5=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-a"
 CONFIG_ARCH_CHIP="sama5"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 CONFIG_ARCH_FPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
@@ -131,6 +135,8 @@ CONFIG_ARCH_LOWVECTORS=y
 # ARMv7-A Configuration Options
 #
 # CONFIG_ARMV7A_HAVE_GICv2 is not set
+# CONFIG_ARMV7A_HAVE_GTM is not set
+# CONFIG_ARMV7A_HAVE_PTM is not set
 # CONFIG_ARMV7A_HAVE_L2CC is not set
 # CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set
 # CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set
@@ -182,7 +188,6 @@ CONFIG_SAMA5_HAVE_PIOE=y
 # CONFIG_SAMA5_HAVE_TC is not set
 # CONFIG_SAMA5_HAVE_TC1 is not set
 # CONFIG_SAMA5_HAVE_TC2 is not set
-# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_SAMA5_HAVE_TWI3 is not set
 # CONFIG_SAMA5_HAVE_VDEC is not set
 # CONFIG_SAMA5_FLEXCOM is not set
@@ -571,7 +576,12 @@ CONFIG_OV2640_SVGA_RESOLUTION=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -579,6 +589,7 @@ CONFIG_OV2640_SVGA_RESOLUTION=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -587,9 +598,10 @@ CONFIG_OV2640_SVGA_RESOLUTION=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -613,10 +625,6 @@ CONFIG_USART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
@@ -642,15 +650,18 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -681,12 +692,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -749,12 +754,14 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -783,10 +790,10 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -795,20 +802,19 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -820,10 +826,9 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -845,8 +850,8 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -857,6 +862,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -878,17 +884,17 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_SYSTEM_I2CTOOL is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_I2CTOOL is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sama5d3x-ek/src/Makefile b/configs/sama5d3x-ek/src/Makefile
index 86fd69cd020587853285a7ea9f8d30aa87801bc8..45cbfd26b465b0232254cd4f76137c24e7ae7fba 100644
--- a/configs/sama5d3x-ek/src/Makefile
+++ b/configs/sama5d3x-ek/src/Makefile
@@ -1,7 +1,7 @@
 ############################################################################
 # configs/sama5d3x-ek/src/Makefile
 #
-#   Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2013-2014, 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
diff --git a/configs/sama5d3x-ek/src/sam_adc.c b/configs/sama5d3x-ek/src/sam_adc.c
index f27ba7be0de65ea0f37e8ddbe720edcd2567c3a7..50982fb41c9f767835c6fb2a5d6ba7e98358a7cc 100644
--- a/configs/sama5d3x-ek/src/sam_adc.c
+++ b/configs/sama5d3x-ek/src/sam_adc.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/sama5d3x-ek/src/sam_adc.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -50,33 +50,19 @@
 
 #ifdef CONFIG_ADC
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-/* Configuration ********************************************************************/
-
-/************************************************************************************
- * Private Data
- ************************************************************************************/
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_adc_setup
+ * Name: sam_adc_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/adc.
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
-int board_adc_setup(void)
+int sam_adc_setup(void)
 {
 #ifdef CONFIG_SAMA5_ADC
   static bool initialized = false;
@@ -92,7 +78,7 @@ int board_adc_setup(void)
       adc = sam_adc_initialize();
       if (adc == NULL)
         {
-          adbg("ERROR: Failed to get ADC interface\n");
+          aerr("ERROR: Failed to get ADC interface\n");
           return -ENODEV;
         }
 
@@ -101,7 +87,7 @@ int board_adc_setup(void)
       ret = adc_register("/dev/adc0", adc);
       if (ret < 0)
         {
-          adbg("adc_register failed: %d\n", ret);
+          aerr("ERROR: adc_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/sama5d3x-ek/src/sam_appinit.c b/configs/sama5d3x-ek/src/sam_appinit.c
index 9f4fff0f73da9d3196ce5ea91f5f02b22b74e76d..f352bcdf974275f9305a0e90040d5c88661e0355 100644
--- a/configs/sama5d3x-ek/src/sam_appinit.c
+++ b/configs/sama5d3x-ek/src/sam_appinit.c
@@ -48,8 +48,8 @@
 
 #include 
 
-#ifdef CONFIG_SYSTEM_USBMONITOR
-#  include 
+#ifdef CONFIG_USBMONITOR
+#  include 
 #endif
 
 #include "sama5d3x-ek.h"
@@ -89,11 +89,7 @@
 
 int board_app_initialize(uintptr_t arg)
 {
-#if defined(HAVE_NAND)   || defined(HAVE_AT25)    || defined(HAVE_AT24)       || \
-    defined(HAVE_HSMCI)  || defined(HAVE_USBHOST) || defined(HAVE_USBMONITOR) ||\
-    defined(HAVE_WM8904) || defined(CONFIG_FS_PROCFS)
   int ret;
-#endif
 
 #ifdef HAVE_NAND
   /* Initialize the NAND driver */
@@ -170,7 +166,7 @@ int board_app_initialize(uintptr_t arg)
 #ifdef HAVE_USBMONITOR
   /* Start the USB Monitor */
 
-  ret = usbmonitor_start(0, NULL);
+  ret = usbmonitor_start();
   if (ret != OK)
     {
       syslog(LOG_ERR, "ERROR: Start USB monitor: %d\n", ret);
@@ -188,6 +184,36 @@ int board_app_initialize(uintptr_t arg)
     }
 #endif
 
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device. */
+
+  ret = sam_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: sam_pwm_setup() failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_ADC
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = sam_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: sam_adc_setup failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_CAN
+  /* Initialize CAN and register the CAN driver. */
+
+  ret = sam_can_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: sam_can_setup failed: %d\n", ret);
+    }
+#endif
+
 #ifdef CONFIG_FS_PROCFS
   /* Mount the procfs file system */
 
@@ -199,5 +225,6 @@ int board_app_initialize(uintptr_t arg)
     }
 #endif
 
+  UNUSED(ret);
   return OK;
 }
diff --git a/configs/sama5d3x-ek/src/sam_at24.c b/configs/sama5d3x-ek/src/sam_at24.c
index ea59b48b33f1542bee356c860e28598469b3301d..cd8b8cade789b8fba01929806a9080401d3e36b8 100644
--- a/configs/sama5d3x-ek/src/sam_at24.c
+++ b/configs/sama5d3x-ek/src/sam_at24.c
@@ -102,21 +102,21 @@ int sam_at24_automount(int minor)
     {
       /* No.. Get the I2C bus driver */
 
-      fvdbg("Initialize TWI%d\n", AT24_BUS);
+      finfo("Initialize TWI%d\n", AT24_BUS);
       i2c = sam_i2cbus_initialize(AT24_BUS);
       if (!i2c)
         {
-          fdbg("ERROR: Failed to initialize TWI%d\n", AT24_BUS);
+          ferr("ERROR: Failed to initialize TWI%d\n", AT24_BUS);
           return -ENODEV;
         }
 
       /* Now bind the I2C interface to the AT24 I2C EEPROM driver */
 
-      fvdbg("Bind the AT24 EEPROM driver to TWI%d\n", AT24_BUS);
+      finfo("Bind the AT24 EEPROM driver to TWI%d\n", AT24_BUS);
       mtd = at24c_initialize(i2c);
       if (!mtd)
         {
-          fdbg("ERROR: Failed to bind TWI%d to the AT24 EEPROM driver\n",
+          ferr("ERROR: Failed to bind TWI%d to the AT24 EEPROM driver\n",
                AT24_BUS);
           return -ENODEV;
         }
@@ -124,32 +124,32 @@ int sam_at24_automount(int minor)
 #if defined(CONFIG_SAMA5D3xEK_AT24_FTL)
       /* And finally, use the FTL layer to wrap the MTD driver as a block driver */
 
-      fvdbg("Initialize the FTL layer to create /dev/mtdblock%d\n", AT24_MINOR);
+      finfo("Initialize the FTL layer to create /dev/mtdblock%d\n", AT24_MINOR);
       ret = ftl_initialize(AT24_MINOR, mtd);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to initialize the FTL layer: %d\n", ret);
+          ferr("ERROR: Failed to initialize the FTL layer: %d\n", ret);
           return ret;
         }
 
 #elif defined(CONFIG_SAMA5D3xEK_AT24_NXFFS)
       /* Initialize to provide NXFFS on the MTD interface */
 
-      fvdbg("Initialize the NXFFS file system\n");
+      finfo("Initialize the NXFFS file system\n");
       ret = nxffs_initialize(mtd);
       if (ret < 0)
         {
-          fdbg("ERROR: NXFFS initialization failed: %d\n", ret);
+          ferr("ERROR: NXFFS initialization failed: %d\n", ret);
           return ret;
         }
 
       /* Mount the file system at /mnt/at24 */
 
-      fvdbg("Mount the NXFFS file system at /dev/at24\n");
+      finfo("Mount the NXFFS file system at /dev/at24\n");
       ret = mount(NULL, "/mnt/at24", "nxffs", 0, NULL);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
+          ferr("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
           return ret;
         }
 #endif
diff --git a/configs/sama5d3x-ek/src/sam_at25.c b/configs/sama5d3x-ek/src/sam_at25.c
index 14a77b94934a28e72989863c9e7d9ef186a3f4fa..8c86d3ccaaba1e5f7125d49b4f739091a73da12f 100644
--- a/configs/sama5d3x-ek/src/sam_at25.c
+++ b/configs/sama5d3x-ek/src/sam_at25.c
@@ -87,7 +87,7 @@ int sam_at25_automount(int minor)
       spi = sam_spibus_initialize(AT25_PORT);
       if (!spi)
         {
-          fdbg("ERROR: Failed to initialize SPI port %d\n", AT25_PORT);
+          ferr("ERROR: Failed to initialize SPI port %d\n", AT25_PORT);
           return -ENODEV;
         }
 
@@ -96,7 +96,7 @@ int sam_at25_automount(int minor)
       mtd = at25_initialize(spi);
       if (!mtd)
         {
-          fdbg("ERROR: Failed to bind SPI port %d to the AT25 FLASH driver\n");
+          ferr("ERROR: Failed to bind SPI port %d to the AT25 FLASH driver\n");
           return -ENODEV;
         }
 
@@ -106,7 +106,7 @@ int sam_at25_automount(int minor)
       ret = ftl_initialize(AT25_MINOR, mtd);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to initialize the FTL layer: %d\n", ret);
+          ferr("ERROR: Failed to initialize the FTL layer: %d\n", ret);
           return ret;
         }
 
@@ -116,7 +116,7 @@ int sam_at25_automount(int minor)
       ret = nxffs_initialize(mtd);
       if (ret < 0)
         {
-          fdbg("ERROR: NXFFS initialization failed: %d\n", ret);
+          ferr("ERROR: NXFFS initialization failed: %d\n", ret);
           return ret;
         }
 
@@ -125,7 +125,7 @@ int sam_at25_automount(int minor)
       ret = mount(NULL, "/mnt/at25", "nxffs", 0, NULL);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
+          ferr("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
           return ret;
         }
 #endif
diff --git a/configs/sama5d3x-ek/src/sam_autoleds.c b/configs/sama5d3x-ek/src/sam_autoleds.c
index 7e612dde9d3145ad210a54fe9cf2514250504606..ae4b1a32a35374ce84cfee0c1ed174724c463402 100644
--- a/configs/sama5d3x-ek/src/sam_autoleds.c
+++ b/configs/sama5d3x-ek/src/sam_autoleds.c
@@ -87,30 +87,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/sama5d3x-ek/src/sam_buttons.c b/configs/sama5d3x-ek/src/sam_buttons.c
index 0449c3a4627c0669bb93ea083a5a5fbd2db33750..5b7ccc9b9086160ccadeb7a0e163973525fb896d 100644
--- a/configs/sama5d3x-ek/src/sam_buttons.c
+++ b/configs/sama5d3x-ek/src/sam_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sama5d3x-ek/src/sam_buttons.c
  *
- *   Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -55,6 +55,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -68,22 +69,6 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-#if defined(CONFIG_SAMA5_PIOE_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-static xcpt_t g_irquser1;
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -126,8 +111,7 @@ uint8_t board_buttons(void)
  * Description:
  *   This function may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is one
- *   of the BUTTON* definitions provided above. The previous interrupt
- *   handler address isreturned (so that it may restored, if so desired).
+ *   of the BUTTON* definitions provided above.
  *
  * Configuration Notes:
  *   Configuration CONFIG_SAMA5_PIO_IRQ must be selected to enable the
@@ -137,9 +121,9 @@ uint8_t board_buttons(void)
  ****************************************************************************/
 
 #if defined(CONFIG_SAMA5_PIOE_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   if (id == BUTTON_USER1)
     {
@@ -151,11 +135,6 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
 
       flags = enter_critical_section();
 
-      /* Get the old button interrupt handler and save the new one */
-
-      oldhandler = g_irquser1;
-      g_irquser1 = irqhandler;
-
       /* Are we attaching or detaching? */
 
       if (irqhandler != NULL)
@@ -163,7 +142,7 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
           /* Configure the interrupt */
 
           sam_pioirq(PIO_USER1);
-          (void)irq_attach(IRQ_USER1, irqhandler);
+          (void)irq_attach(IRQ_USER1, irqhandler, arg);
           sam_pioirqenable(IRQ_USER1);
         }
       else
@@ -175,11 +154,10 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
         }
 
       leave_critical_section(flags);
+      ret = OK;
     }
 
-  /* Return the old button handler (so that it can be restored) */
-
-  return oldhandler;
+  return ret;
 }
 #endif
 
diff --git a/configs/sama5d3x-ek/src/sam_can.c b/configs/sama5d3x-ek/src/sam_can.c
index d904d12d832ccc843756b33522ee359bb7c58445..4fc441f11010b99407bcdaae8e466149bb4ade0f 100644
--- a/configs/sama5d3x-ek/src/sam_can.c
+++ b/configs/sama5d3x-ek/src/sam_can.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/sama5d3x-ek/src/sam_can.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,7 +42,7 @@
 #include 
 #include 
 
-#include 
+#include 
 #include 
 
 #include "chip.h"
@@ -51,7 +51,7 @@
 #include "sam_can.h"
 #include "sama5d3x-ek.h"
 
-#if defined(CONFIG_CAN) && (defined(CONFIG_SAMA5_CAN0) || defined(CONFIG_SAMA5_CAN1))
+#ifdef CONFIG_CAN
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -69,72 +69,46 @@
 #  define CAN_PORT 1
 #endif
 
-/* Debug ***************************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
-
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
-#else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_can_initialize
+ * Name: sam_can_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/can.
+ *  Initialize CAN and register the CAN device
  *
  ************************************************************************************/
 
-int board_can_initialize(void)
+int sam_can_setup(void)
 {
-  static bool initialized = false;
+#if defined(CONFIG_SAMA5_CAN0) || defined(CONFIG_SAMA5_CAN1)
   struct can_dev_s *can;
   int ret;
 
-  /* Check if we have already initialized */
+  /* Call stm32_caninitialize() to get an instance of the CAN interface */
 
-  if (!initialized)
+  can = sam_caninitialize(CAN_PORT);
+  if (can == NULL)
     {
-      /* Call stm32_caninitialize() to get an instance of the CAN interface */
-
-      can = sam_caninitialize(CAN_PORT);
-      if (can == NULL)
-        {
-          candbg("ERROR:  Failed to get CAN interface\n");
-          return -ENODEV;
-        }
-
-      /* Register the CAN driver at "/dev/can0" */
-
-      ret = can_register("/dev/can0", can);
-      if (ret < 0)
-        {
-          candbg("ERROR: can_register failed: %d\n", ret);
-          return ret;
-        }
+      canerr("ERROR:  Failed to get CAN interface\n");
+      return -ENODEV;
+    }
 
-      /* Now we are initialized */
+  /* Register the CAN driver at "/dev/can0" */
 
-      initialized = true;
+  ret = can_register("/dev/can0", can);
+  if (ret < 0)
+    {
+      canerr("ERROR: can_register failed: %d\n", ret);
+      return ret;
     }
 
   return OK;
+#else
+  return -ENODEV;
+#endif
 }
 
-#endif /* CONFIG_CAN && (CONFIG_SAMA5_CAN0 || CONFIG_SAMA5_CAN1) */
+#endif /* CONFIG_CAN */
diff --git a/configs/sama5d3x-ek/src/sam_ethernet.c b/configs/sama5d3x-ek/src/sam_ethernet.c
index 1ac9640c693c3ce0c16465fa8d6e94308576db08..5121a03ff4f4fb093668e96b62ef16edfe1e9416 100644
--- a/configs/sama5d3x-ek/src/sam_ethernet.c
+++ b/configs/sama5d3x-ek/src/sam_ethernet.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/sama5d3x-ek/src/sam_ethernet.c
  *
- *   Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013-2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,8 +42,8 @@
 /* Force verbose debug on in this file only to support unit-level testing. */
 
 #ifdef CONFIG_NETDEV_PHY_DEBUG
-#  undef  CONFIG_DEBUG_VERBOSE
-#  define CONFIG_DEBUG_VERBOSE 1
+#  undef  CONFIG_DEBUG_INFO
+#  define CONFIG_DEBUG_INFO 1
 #  undef  CONFIG_DEBUG_NET
 #  define CONFIG_DEBUG_NET 1
 #endif
@@ -84,24 +84,13 @@
  */
 
 #ifdef CONFIG_NETDEV_PHY_DEBUG
-#  define phydbg    dbg
-#  define phylldbg  lldbg
+#  define phyerr    _err
+#  define phywarn   _warn
+#  define phyinfo   _info
 #else
-#  define phydbg(x...)
-#  define phylldbg(x...)
-#endif
-
-/************************************************************************************
- * Private Data
- ************************************************************************************/
-
-#ifdef CONFIG_SAMA5_PIOE_IRQ
-#ifdef CONFIG_SAMA5_EMACA
-static xcpt_t g_emac_handler;
-#endif
-#ifdef CONFIG_SAMA5_GMAC
-static xcpt_t g_gmac_handler;
-#endif
+#  define phyerr(x...)
+#  define phywarn(x...)
+#  define phyinfo(x...)
 #endif
 
 /************************************************************************************
@@ -116,7 +105,7 @@ static xcpt_t g_gmac_handler;
 #ifdef CONFIG_SAMA5_EMACA
 static void sam_emac_phy_enable(bool enable)
 {
-  phydbg("IRQ%d: enable=%d\n", IRQ_INT_ETH1, enable);
+  phyinfo("IRQ%d: enable=%d\n", IRQ_INT_ETH1, enable);
   if (enable)
     {
       sam_pioirqenable(IRQ_INT_ETH1);
@@ -132,7 +121,7 @@ static void sam_emac_phy_enable(bool enable)
 #ifdef CONFIG_SAMA5_GMAC
 static void sam_gmac_phy_enable(bool enable)
 {
-  phydbg("IRQ%d: enable=%d\n", IRQ_INT_ETH0, enable);
+  phyinfo("IRQ%d: enable=%d\n", IRQ_INT_ETH0, enable);
   if (enable)
     {
       sam_pioirqenable(IRQ_INT_ETH0);
@@ -179,7 +168,7 @@ void weak_function sam_netinitialize(void)
    * The KSZ8051 PHY interrupt is available on PE30 INT_ETH1
    */
 
-  phydbg("Configuring %08x\n", PIO_INT_ETH1);
+  phyinfo("Configuring %08x\n", PIO_INT_ETH1);
   sam_configpio(PIO_INT_ETH1);
 #endif
 
@@ -196,7 +185,7 @@ void weak_function sam_netinitialize(void)
    * The KSZ9021/31 interrupt is available on PB35 INT_GETH0
    */
 
-  phydbg("Configuring %08x\n", PIO_INT_ETH0);
+  phyinfo("Configuring %08x\n", PIO_INT_ETH0);
   sam_configpio(PIO_INT_ETH0);
 #endif
 }
@@ -253,42 +242,39 @@ void weak_function sam_netinitialize(void)
  *             asserts an interrupt.  Must reside in OS space, but can
  *             signal tasks in user space.  A value of NULL can be passed
  *             in order to detach and disable the PHY interrupt.
+ *   arg     - The argument that will accompany the interrupt
  *   enable  - A function pointer that be unsed to enable or disable the
  *             PHY interrupt.
  *
  * Returned Value:
- *   The previous PHY interrupt handler address is returned.  This allows you
- *   to temporarily replace an interrupt handler, then restore the original
- *   interrupt handler.  NULL is returned if there is was not handler in
- *   place when the call was made.
+ *   Zero (OK) returned on success; a negated errno value is returned on
+ *   failure.
  *
  ****************************************************************************/
 
 #ifdef CONFIG_SAMA5_PIOE_IRQ
-xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
+int arch_phy_irq(FAR const char *intf, xcpt_t handler, void *arg,
+                 phy_enable_t *enable)
 {
   irqstate_t flags;
-  xcpt_t *phandler;
-  xcpt_t oldhandler;
   pio_pinset_t pinset;
   phy_enable_t enabler;
   int irq;
 
   DEBUGASSERT(intf);
 
-  nvdbg("%s: handler=%p\n", intf, handler);
+  ninfo("%s: handler=%p\n", intf, handler);
 #ifdef CONFIG_SAMA5_EMACA
-  phydbg("EMAC: devname=%s\n", SAMA5_EMAC_DEVNAME);
+  phyinfo("EMAC: devname=%s\n", SAMA5_EMAC_DEVNAME);
 #endif
 #ifdef CONFIG_SAMA5_GMAC
-  phydbg("GMAC: devname=%s\n", SAMA5_GMAC_DEVNAME);
+  phyinfo("GMAC: devname=%s\n", SAMA5_GMAC_DEVNAME);
 #endif
 
 #ifdef CONFIG_SAMA5_EMACA
   if (strcmp(intf, SAMA5_EMAC_DEVNAME) == 0)
     {
-      phydbg("Select EMAC\n");
-      phandler = &g_emac_handler;
+      phyinfo("Select EMAC\n");
       pinset   = PIO_INT_ETH1;
       irq      = IRQ_INT_ETH1;
       enabler  = sam_emac_phy_enable;
@@ -298,8 +284,7 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
 #ifdef CONFIG_SAMA5_GMAC
   if (strcmp(intf, SAMA5_GMAC_DEVNAME) == 0)
     {
-      phydbg("Select GMAC\n");
-      phandler = &g_gmac_handler;
+      phyinfo("Select GMAC\n");
       pinset   = PIO_INT_ETH0;
       irq      = IRQ_INT_ETH0;
       enabler  = sam_gmac_phy_enable;
@@ -307,7 +292,7 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
   else
 #endif
     {
-      ndbg("Unsupported interface: %s\n", intf);
+      nerr("ERROR: Unsupported interface: %s\n", intf);
       return NULL;
     }
 
@@ -317,24 +302,19 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
 
   flags = enter_critical_section();
 
-  /* Get the old interrupt handler and save the new one */
-
-  oldhandler = *phandler;
-  *phandler = handler;
-
   /* Configure the interrupt */
 
   if (handler)
     {
-      phydbg("Configure pin: %08x\n", pinset);
+      phyinfo("Configure pin: %08x\n", pinset);
       sam_pioirq(pinset);
 
-      phydbg("Attach IRQ%d\n", irq);
-      (void)irq_attach(irq, handler);
+      phyinfo("Attach IRQ%d\n", irq);
+      (void)irq_attach(irq, handler, arg);
     }
   else
     {
-      phydbg("Detach IRQ%d\n", irq);
+      phyinfo("Detach IRQ%d\n", irq);
       (void)irq_detach(irq);
       enabler = NULL;
     }
@@ -353,7 +333,7 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
   /* Return the old handler (so that it can be restored) */
 
   leave_critical_section(flags);
-  return oldhandler;
+  return OK;
 }
 #endif /* CONFIG_SAMA5_PIOE_IRQ */
 
diff --git a/configs/sama5d3x-ek/src/sam_hsmci.c b/configs/sama5d3x-ek/src/sam_hsmci.c
index a999da2f9a0ad611deeed9d706049f20923bb325..aedd81d0853c674b92fe9d2c9f51d6dfe364d0fc 100644
--- a/configs/sama5d3x-ek/src/sam_hsmci.c
+++ b/configs/sama5d3x-ek/src/sam_hsmci.c
@@ -86,10 +86,6 @@
 
 #ifdef HAVE_HSMCI
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -112,7 +108,7 @@ struct sam_hsmci_state_s
 /* HSCMI device state */
 
 #ifdef CONFIG_SAMA5_HSMCI0
-static int sam_hsmci0_cardetect(int irq, void *regs);
+static int sam_hsmci0_cardetect(int irq, void *regs, FAR void *arg);
 
 static struct sam_hsmci_state_s g_hsmci0 =
 {
@@ -124,7 +120,7 @@ static struct sam_hsmci_state_s g_hsmci0 =
 #endif
 
 #ifdef CONFIG_SAMA5_HSMCI1
-static int sam_hsmci1_cardetect(int irq, void *regs);
+static int sam_hsmci1_cardetect(int irq, void *regs, FAR void *arg);
 
 static struct sam_hsmci_state_s g_hsmci1 =
 {
@@ -154,7 +150,7 @@ bool sam_cardinserted_internal(struct sam_hsmci_state_s *state)
   /* Get the state of the PIO pin */
 
   inserted = sam_pioread(state->pincfg);
-  fllvdbg("Slot %d inserted: %s\n", state->slotno, inserted ? "NO" : "YES");
+  finfo("Slot %d inserted: %s\n", state->slotno, inserted ? "NO" : "YES");
   return !inserted;
 }
 
@@ -189,14 +185,14 @@ static int sam_hsmci_cardetect(struct sam_hsmci_state_s *state)
 }
 
 #ifdef CONFIG_SAMA5_HSMCI0
-static int sam_hsmci0_cardetect(int irq, void *regs)
+static int sam_hsmci0_cardetect(int irq, void *regs, FAR void *arg)
 {
   return sam_hsmci_cardetect(&g_hsmci0);
 }
 #endif
 
 #ifdef CONFIG_SAMA5_HSMCI1
-static int sam_hsmci1_cardetect(int irq, void *regs)
+static int sam_hsmci1_cardetect(int irq, void *regs, FAR void *arg)
 {
   return sam_hsmci_cardetect(&g_hsmci1);
 }
@@ -257,7 +253,7 @@ int sam_hsmci_initialize(int slotno, int minor)
   state = sam_hsmci_state(slotno);
   if (!state)
     {
-      fdbg("No state for slotno %d\n", slotno);
+      ferr("ERROR: No state for slotno %d\n", slotno);
       return -EINVAL;
     }
 
@@ -271,7 +267,7 @@ int sam_hsmci_initialize(int slotno, int minor)
   state->hsmci = sdio_initialize(slotno);
   if (!state->hsmci)
     {
-      fdbg("Failed to initialize SDIO slot %d\n",  slotno);
+      ferr("ERROR: Failed to initialize SDIO slot %d\n",  slotno);
       return -ENODEV;
     }
 
@@ -280,14 +276,14 @@ int sam_hsmci_initialize(int slotno, int minor)
   ret = mmcsd_slotinitialize(minor, state->hsmci);
   if (ret != OK)
     {
-      fdbg("Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
+      ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
       return ret;
     }
 
   /* Configure card detect interrupts */
 
   sam_pioirq(state->pincfg);
-  (void)irq_attach(state->irq, state->handler);
+  (void)irq_attach(state->irq, state->handler, NULL);
 
   /* Then inform the HSMCI driver if there is or is not a card in the slot. */
 
@@ -317,7 +313,7 @@ bool sam_cardinserted(int slotno)
   state = sam_hsmci_state(slotno);
   if (!state)
     {
-      fdbg("No state for slotno %d\n", slotno);
+      ferr("ERROR: No state for slotno %d\n", slotno);
       return false;
     }
 
diff --git a/configs/sama5d3x-ek/src/sam_i2schar.c b/configs/sama5d3x-ek/src/sam_i2schar.c
index 5fa7c324db87c8c052f189c2ad57fa4bea7c2f7f..86c06aafa7886aeeaf13cd98b6de506fa05782e6 100644
--- a/configs/sama5d3x-ek/src/sam_i2schar.c
+++ b/configs/sama5d3x-ek/src/sam_i2schar.c
@@ -99,7 +99,7 @@ int i2schar_devinit(void)
       i2s = sam_ssc_initialize(CONFIG_SAMA5D3xEK_SSC_PORT);
       if (!i2s)
         {
-          dbg("ERROR: Failed to get the SAMA5 SSC/I2S driver for SSC%d\n",
+          _err("ERROR: Failed to get the SAMA5 SSC/I2S driver for SSC%d\n",
               CONFIG_SAMA5D3xEK_SSC_PORT);
           return -ENODEV;
         }
@@ -109,7 +109,7 @@ int i2schar_devinit(void)
       ret = i2schar_register(i2s, CONFIG_SAMA5D3xEK_I2SCHAR_MINOR);
       if (ret < 0)
         {
-          adbg("ERROR: i2schar_register failed: %d\n", ret);
+          aerr("ERROR: i2schar_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/sama5d3x-ek/src/sam_nandflash.c b/configs/sama5d3x-ek/src/sam_nandflash.c
index 709d3c240c956e838a7a6a05a76ae7f8fbf58d6c..50c327e9f3e9109515fa10a2c2ea3f60f5c7d56e 100644
--- a/configs/sama5d3x-ek/src/sam_nandflash.c
+++ b/configs/sama5d3x-ek/src/sam_nandflash.c
@@ -186,7 +186,7 @@ int sam_nand_automount(int minor)
       mtd = sam_nand_initialize(HSMC_CS3);
       if (!mtd)
         {
-          fdbg("ERROR: Failed to create the NAND driver on CS%d\n", HSMC_CS3);
+          ferr("ERROR: Failed to create the NAND driver on CS%d\n", HSMC_CS3);
           return -ENODEV;
         }
 
@@ -196,7 +196,7 @@ int sam_nand_automount(int minor)
       ret = ftl_initialize(NAND_MINOR, mtd);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to initialize the FTL layer: %d\n", ret);
+          ferr("ERROR: Failed to initialize the FTL layer: %d\n", ret);
           return ret;
         }
 
@@ -206,7 +206,7 @@ int sam_nand_automount(int minor)
       ret = nxffs_initialize(mtd);
       if (ret < 0)
         {
-          fdbg("ERROR: NXFFS initialization failed: %d\n", ret);
+          ferr("ERROR: NXFFS initialization failed: %d\n", ret);
           return ret;
         }
 
@@ -215,7 +215,7 @@ int sam_nand_automount(int minor)
       ret = mount(NULL, "/mnt/nand", "nxffs", 0, NULL);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
+          ferr("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
           return ret;
         }
 #endif
diff --git a/configs/sama5d3x-ek/src/sam_ov2640.c b/configs/sama5d3x-ek/src/sam_ov2640.c
index ad55d0a4a6bbe9e64e79894de2d5cd1b5e1f313e..dfaf2dbfc106d341d6edb907f2f9678454f2a0dc 100644
--- a/configs/sama5d3x-ek/src/sam_ov2640.c
+++ b/configs/sama5d3x-ek/src/sam_ov2640.c
@@ -88,14 +88,14 @@ static inline FAR struct fb_vtable_s *ov2640_lcd_initialize(void)
   ret = up_fbinitialize(0);
   if (ret < 0)
     {
-      gdbg("ERROR: up_fbinitialize failed: %d\n", -ret);
+      gerr("ERROR: up_fbinitialize failed: %d\n", -ret);
       return NULL;
     }
 
   vplane = up_fbgetvplane(0, 0);
   if (!vplane)
     {
-      gdbg("ERROR: up_fbgetvplane failed\n");
+      gerr("ERROR: up_fbgetvplane failed\n");
     }
 
   return vplane;
@@ -161,7 +161,7 @@ static inline int ov2640_camera_initialize(void)
   i2c = sam_i2cbus_initialize(OV2640_BUS);
   if (!i2c)
     {
-      gdbg("ERROR: Failed to initialize TWI%d\n", OV2640_BUS);
+      gerr("ERROR: Failed to initialize TWI%d\n", OV2640_BUS);
       return EXIT_FAILURE;
     }
 
@@ -196,7 +196,7 @@ static inline int ov2640_camera_initialize(void)
   /* Configure and enable the PCK1 output */
 
   actual = sam_pck_configure(PCK1, PCKSRC_MCK, OV2640_FREQUENCY);
-  gvdbg("Desired PCK1 frequency: %ld Actual: %ld\n",
+  ginfo("Desired PCK1 frequency: %ld Actual: %ld\n",
         (long)OV2640_FREQUENCY, (long)actual);
   UNUSED(actual);
 
@@ -210,7 +210,7 @@ static inline int ov2640_camera_initialize(void)
   ret = ov2640_initialize(i2c);
   if (ret < 0)
     {
-      gdbg("ERROR: Failed to initialize the OV2640: %d\n", ret);
+      gerr("ERROR: Failed to initialize the OV2640: %d\n", ret);
       return EXIT_FAILURE;
     }
 
@@ -239,7 +239,7 @@ int ov2640_main(int argc, char *argv[])
   vplane = ov2640_lcd_initialize();
   if (!vplane)
     {
-      gdbg("ERROR: ov2640_lcd_initialize failed\n");
+      gerr("ERROR: ov2640_lcd_initialize failed\n");
       return  EXIT_FAILURE;
     }
 
@@ -248,7 +248,7 @@ int ov2640_main(int argc, char *argv[])
   ret = ov2640_camera_initialize();
   if (ret != EXIT_SUCCESS)
     {
-      gdbg("ERROR: ov2640_camera_initialize failed\n");
+      gerr("ERROR: ov2640_camera_initialize failed\n");
       return  EXIT_FAILURE;
     }
 
diff --git a/configs/sama5d3x-ek/src/sam_pwm.c b/configs/sama5d3x-ek/src/sam_pwm.c
index 79ff78e337c34f3a2765ae7d78fb5f6dfbb57bbd..0d422586bfbacec76a07588f16e4ba66624d384e 100644
--- a/configs/sama5d3x-ek/src/sam_pwm.c
+++ b/configs/sama5d3x-ek/src/sam_pwm.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/sama5d3x-ek/src/sam_pwm.c
  *
- *   Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -44,7 +44,7 @@
 #include 
 
 #include 
-#include 
+#include 
 
 #include 
 
@@ -107,24 +107,19 @@
 
 #if defined(CONFIG_PWM) && defined(CONFIG_SAMA5_PWM)
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_pwm_setup
+ * Name: sam_pwm_setup
  *
  * Description:
- *   All SAMA5 architectures must provide the following interface to work with
- *   examples/pwm.
+ *   Initialize PWM and register the PWM device.
  *
  ************************************************************************************/
 
-int board_pwm_setup(void)
+int sam_pwm_setup(void)
 {
   static bool initialized = false;
   struct pwm_lowerhalf_s *pwm;
@@ -139,7 +134,7 @@ int board_pwm_setup(void)
       pwm = sam_pwminitialize(CONFIG_SAMA5D3xEK_CHANNEL);
       if (!pwm)
         {
-          dbg("Failed to get the SAMA5 PWM lower half\n");
+          _err("ERROR: Failed to get the SAMA5 PWM lower half\n");
           return -ENODEV;
         }
 
@@ -148,7 +143,7 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/pwm0", pwm);
       if (ret < 0)
         {
-          adbg("pwm_register failed: %d\n", ret);
+          aerr("ERROR: pwm_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/sama5d3x-ek/src/sam_spi.c b/configs/sama5d3x-ek/src/sam_spi.c
index 9a0ba344a8598ae7b5c07ace9152bf6a15dfee3a..f2932e5fb8df0c5ae198417c108cf498598a61c2 100644
--- a/configs/sama5d3x-ek/src/sam_spi.c
+++ b/configs/sama5d3x-ek/src/sam_spi.c
@@ -55,32 +55,6 @@
 
 #if defined(CONFIG_SAMA5_SPI0) || defined(CONFIG_SAMA5_SPI1)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
diff --git a/configs/sama5d3x-ek/src/sam_touchscreen.c b/configs/sama5d3x-ek/src/sam_touchscreen.c
index 4b69d561ac121ac1c207080acc0491d1054a9f23..ba5126643ae7ed0afc669b8dc374a32fb35d4f56 100644
--- a/configs/sama5d3x-ek/src/sam_touchscreen.c
+++ b/configs/sama5d3x-ek/src/sam_touchscreen.c
@@ -108,7 +108,7 @@ int board_tsc_setup(int minor)
   static bool initialized = false;
   int ret;
 
-  idbg("initialized:%d minor:%d\n", initialized, minor);
+  iinfo("initialized:%d minor:%d\n", initialized, minor);
   DEBUGASSERT(minor == 0);
 
   /* Since there is no uninitialized logic, this initialization can be
@@ -122,7 +122,7 @@ int board_tsc_setup(int minor)
       adc = sam_adc_initialize();
       if (!adc)
         {
-          idbg("ERROR: Failed to initialize the ADC driver\n");
+          ierr("ERROR: Failed to initialize the ADC driver\n");
           return -ENODEV;
         }
 
@@ -131,7 +131,7 @@ int board_tsc_setup(int minor)
       ret = sam_tsd_register(adc, CONFIG_SAMA5D3xEK_TSD_DEVMINOR);
       if (ret < 0)
         {
-          idbg("ERROR: Failed to register touchscreen device /dev/input%d: %d\n",
+          ierr("ERROR: Failed to register touchscreen device /dev/input%d: %d\n",
                CONFIG_SAMA5D3xEK_TSD_DEVMINOR, ret);
           return -ENODEV;
         }
diff --git a/configs/sama5d3x-ek/src/sam_usb.c b/configs/sama5d3x-ek/src/sam_usb.c
index b9883e8561cb560acf26ddeedbd16ab849db8364..5b365f422d90a9e88d82b949b8d0239bb35c8e8f 100644
--- a/configs/sama5d3x-ek/src/sam_usb.c
+++ b/configs/sama5d3x-ek/src/sam_usb.c
@@ -115,13 +115,13 @@ static int usbhost_waiter(struct usbhost_connection_s *dev)
 {
   struct usbhost_hubport_s *hport;
 
-  uvdbg("Running\n");
+  uinfo("Running\n");
   for (;;)
     {
       /* Wait for the device to change state */
 
       DEBUGVERIFY(CONN_WAIT(dev, &hport));
-      uvdbg("%s\n", hport->connected ? "connected" : "disconnected");
+      uinfo("%s\n", hport->connected ? "connected" : "disconnected");
 
       /* Did we just become connected? */
 
@@ -307,7 +307,7 @@ int sam_usbhost_initialize(void)
   ret = usbhost_hub_initialize();
   if (ret < 0)
     {
-      udbg("ERROR: usbhost_hub_initialize failed: %d\n", ret);
+      uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
     }
 #endif
 
@@ -317,7 +317,7 @@ int sam_usbhost_initialize(void)
   ret = usbhost_msc_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the mass storage class: %d\n", ret);
+      uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
     }
 #endif
 
@@ -327,7 +327,7 @@ int sam_usbhost_initialize(void)
   ret = usbhost_cdcacm_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
+      uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
     }
 #endif
 
@@ -337,7 +337,7 @@ int sam_usbhost_initialize(void)
   ret = usbhost_kbdinit();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the KBD class\n");
+      uerr("ERROR: Failed to register the KBD class\n");
     }
 #endif
 
@@ -349,7 +349,7 @@ int sam_usbhost_initialize(void)
   g_ohciconn = sam_ohci_initialize(0);
   if (!g_ohciconn)
     {
-      udbg("ERROR: sam_ohci_initialize failed\n");
+      uerr("ERROR: sam_ohci_initialize failed\n");
       return -ENODEV;
     }
 
@@ -360,7 +360,7 @@ int sam_usbhost_initialize(void)
                     (main_t)ohci_waiter, (FAR char * const *)NULL);
   if (pid < 0)
     {
-      udbg("ERROR: Failed to create ohci_waiter task: %d\n", ret);
+      uerr("ERROR: Failed to create ohci_waiter task: %d\n", ret);
       return -ENODEV;
     }
 #endif
@@ -371,7 +371,7 @@ int sam_usbhost_initialize(void)
   g_ehciconn = sam_ehci_initialize(0);
   if (!g_ehciconn)
     {
-      udbg("ERROR: sam_ehci_initialize failed\n");
+      uerr("ERROR: sam_ehci_initialize failed\n");
       return -ENODEV;
     }
 
@@ -382,7 +382,7 @@ int sam_usbhost_initialize(void)
                     (main_t)ehci_waiter, (FAR char * const *)NULL);
   if (pid < 0)
     {
-      udbg("ERROR: Failed to create ehci_waiter task: %d\n", ret);
+      uerr("ERROR: Failed to create ehci_waiter task: %d\n", ret);
       return -ENODEV;
     }
 #endif
@@ -413,7 +413,7 @@ void sam_usbhost_vbusdrive(int rhport, bool enable)
 {
   pio_pinset_t pinset = 0;
 
-  uvdbg("RHPort%d: enable=%d\n", rhport+1, enable);
+  uinfo("RHPort%d: enable=%d\n", rhport+1, enable);
 
   /* Pick the PIO configuration associated with the selected root hub port */
 
@@ -421,7 +421,7 @@ void sam_usbhost_vbusdrive(int rhport, bool enable)
     {
     case SAM_RHPORT1:
 #ifndef CONFIG_SAMA5_UHPHS_RHPORT1
-      udbg("ERROR: RHPort1 is not available in this configuration\n");
+      uerr("ERROR: RHPort1 is not available in this configuration\n");
       return;
 #else
       pinset = PIO_USBA_VBUS_ENABLE;
@@ -430,7 +430,7 @@ void sam_usbhost_vbusdrive(int rhport, bool enable)
 
     case SAM_RHPORT2:
 #ifndef CONFIG_SAMA5_UHPHS_RHPORT2
-      udbg("ERROR: RHPort2 is not available in this configuration\n");
+      uerr("ERROR: RHPort2 is not available in this configuration\n");
       return;
 #else
       pinset = PIO_USBB_VBUS_ENABLE;
@@ -439,7 +439,7 @@ void sam_usbhost_vbusdrive(int rhport, bool enable)
 
     case SAM_RHPORT3:
 #ifndef CONFIG_SAMA5_UHPHS_RHPORT3
-      udbg("ERROR: RHPort3 is not available in this configuration\n");
+      uerr("ERROR: RHPort3 is not available in this configuration\n");
       return;
 #else
       pinset = PIO_USBC_VBUS_ENABLE;
@@ -447,7 +447,7 @@ void sam_usbhost_vbusdrive(int rhport, bool enable)
 #endif
 
     default:
-      udbg("ERROR: RHPort%d is not supported\n", rhport+1);
+      uerr("ERROR: RHPort%d is not supported\n", rhport+1);
       return;
     }
 
@@ -509,7 +509,7 @@ xcpt_t sam_setup_overcurrent(xcpt_t handler)
   /* Configure the interrupt */
 
   sam_pioirq(PIO_USBBC_VBUS_OVERCURRENT);
-  (void)irq_attach(IRQ_USBBC_VBUS_OVERCURRENT, handler);
+  (void)irq_attach(IRQ_USBBC_VBUS_OVERCURRENT, handler, NULL);
   sam_pioirqenable(IRQ_USBBC_VBUS_OVERCURRENT);
 
   /* Return the old handler (so that it can be restored) */
@@ -538,7 +538,7 @@ xcpt_t sam_setup_overcurrent(xcpt_t handler)
 #ifdef CONFIG_USBDEV
 void sam_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
 #endif
 
diff --git a/configs/sama5d3x-ek/src/sam_userleds.c b/configs/sama5d3x-ek/src/sam_userleds.c
index 19f6da340efa36891afcc4a76f3c0241cbcb255a..cd738625e3d538366078e0f2ce94a478e8d38966 100644
--- a/configs/sama5d3x-ek/src/sam_userleds.c
+++ b/configs/sama5d3x-ek/src/sam_userleds.c
@@ -63,22 +63,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/sama5d3x-ek/src/sam_wm8904.c b/configs/sama5d3x-ek/src/sam_wm8904.c
index 5639a5a4021ea4387163170f5850433043e85ffa..2bba0f3f0459a345244fbcfb0c0234c4b2067d82 100644
--- a/configs/sama5d3x-ek/src/sam_wm8904.c
+++ b/configs/sama5d3x-ek/src/sam_wm8904.c
@@ -157,13 +157,13 @@ static int wm8904_attach(FAR const struct wm8904_lower_s *lower,
        * new handler will called via wm8904_interrupt() when the interrupt occurs.
        */
 
-      audvdbg("Attaching %p\n", isr);
+      audinfo("Attaching %p\n", isr);
       g_wm8904info.handler = isr;
       g_wm8904info.arg = arg;
     }
   else
     {
-      audvdbg("Detaching %p\n", g_wm8904info.handler);
+      audinfo("Detaching %p\n", g_wm8904info.handler);
       (void)wm8904_enable(lower, false);
       g_wm8904info.handler = NULL;
       g_wm8904info.arg = NULL;
@@ -187,13 +187,13 @@ static bool wm8904_enable(FAR const struct wm8904_lower_s *lower, bool enable)
 
       if (enable && g_wm8904info.handler)
         {
-          audvdbg("Enabling\n");
+          audinfo("Enabling\n");
           sam_pioirqenable(IRQ_INT_WM8904);
           enabled = true;
         }
       else
         {
-          audvdbg("Disabling\n");
+          audinfo("Disabling\n");
           sam_pioirqdisable(IRQ_INT_WM8904);
           enabled = false;
         }
@@ -204,11 +204,11 @@ static bool wm8904_enable(FAR const struct wm8904_lower_s *lower, bool enable)
   return ret;
 }
 
-static int wm8904_interrupt(int irq, FAR void *context)
+static int wm8904_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   /* Just forward the interrupt to the WM8904 driver */
 
-  audvdbg("handler %p\n", g_wm8904info.handler);
+  audinfo("handler %p\n", g_wm8904info.handler);
   if (g_wm8904info.handler)
     {
       return g_wm8904info.handler(&g_wm8904info.lower, g_wm8904info.arg);
@@ -253,7 +253,7 @@ int sam_wm8904_initialize(int minor)
   char devname[12];
   int ret;
 
-  auddbg("minor %d\n", minor);
+  audinfo("minor %d\n", minor);
   DEBUGASSERT(minor >= 0 && minor <= 25);
 
   /* Have we already initialized?  Since we never uninitialize we must prevent
@@ -273,7 +273,7 @@ int sam_wm8904_initialize(int minor)
       i2c = sam_i2cbus_initialize(WM8904_TWI_BUS);
       if (!i2c)
         {
-          auddbg("Failed to initialize TWI%d\n", WM8904_TWI_BUS);
+          auderr("ERROR: Failed to initialize TWI%d\n", WM8904_TWI_BUS);
           ret = -ENODEV;
           goto errout;
         }
@@ -283,7 +283,7 @@ int sam_wm8904_initialize(int minor)
       i2s = sam_ssc_initialize(WM8904_SSC_BUS);
       if (!i2s)
         {
-          auddbg("Failed to initialize SSC%d\n", WM8904_SSC_BUS);
+          auderr("ERROR: Failed to initialize SSC%d\n", WM8904_SSC_BUS);
           ret = -ENODEV;
           goto errout_with_i2c;
         }
@@ -311,10 +311,10 @@ int sam_wm8904_initialize(int minor)
       /* Configure WM8904 interrupts */
 
       sam_pioirq(PIO_INT_WM8904);
-      ret = irq_attach(IRQ_INT_WM8904, wm8904_interrupt);
+      ret = irq_attach(IRQ_INT_WM8904, wm8904_interrupt, NULL);
       if (ret < 0)
         {
-          auddbg("ERROR: Failed to attach WM8904 interrupt: %d\n", ret);
+          auderr("ERROR: Failed to attach WM8904 interrupt: %d\n", ret);
           goto errout_with_i2s;
         }
 
@@ -325,7 +325,7 @@ int sam_wm8904_initialize(int minor)
       wm8904 = wm8904_initialize(i2c, i2s, &g_wm8904info.lower);
       if (!wm8904)
         {
-          auddbg("Failed to initialize the WM8904\n");
+          auderr("ERROR: Failed to initialize the WM8904\n");
           ret = -ENODEV;
           goto errout_with_irq;
         }
@@ -338,7 +338,7 @@ int sam_wm8904_initialize(int minor)
       pcm = pcm_decode_initialize(wm8904);
       if (!pcm)
         {
-          auddbg("ERROR: Failed create the PCM decoder\n");
+          auderr("ERROR: Failed create the PCM decoder\n");
           ret = -ENODEV;
           goto errout_with_wm8904;
         }
@@ -355,7 +355,7 @@ int sam_wm8904_initialize(int minor)
       ret = audio_register(devname, pcm);
       if (ret < 0)
         {
-          auddbg("ERROR: Failed to register /dev/%s device: %d\n", devname, ret);
+          auderr("ERROR: Failed to register /dev/%s device: %d\n", devname, ret);
           goto errout_with_pcm;
         }
 
diff --git a/configs/sama5d3x-ek/src/sama5d3x-ek.h b/configs/sama5d3x-ek/src/sama5d3x-ek.h
index 403412a71c9d28c8d62737758503e3a1d01106ff..51647349a25cb99a7e32e1610a18f3661cba5001 100644
--- a/configs/sama5d3x-ek/src/sama5d3x-ek.h
+++ b/configs/sama5d3x-ek/src/sama5d3x-ek.h
@@ -297,7 +297,7 @@
 
 /* Check if we should enable the USB monitor before starting NSH */
 
-#ifndef CONFIG_SYSTEM_USBMONITOR
+#ifndef CONFIG_USBMONITOR
 #  undef HAVE_USBMONITOR
 #endif
 
@@ -807,14 +807,15 @@ bool sam_writeprotected(int slotno);
 void weak_function sam_usbinitialize(void);
 #endif
 
-/****************************************************************************************************
+/************************************************************************************
  * Name: stm32_usbhost_initialize
  *
  * Description:
- *   Called at application startup time to initialize the USB host functionality. This function will
- *   start a thread that will monitor for device connection/disconnection events.
+ *   Called at application startup time to initialize the USB host functionality. 
+ *   This function will start a thread that will monitor for device connection/
+ *   disconnection events.
  *
- ****************************************************************************************************/
+ ************************************************************************************/
 
 #ifdef HAVE_USBHOST
 int sam_usbhost_initialize(void);
@@ -832,7 +833,43 @@ int sam_usbhost_initialize(void);
 void weak_function sam_netinitialize(void);
 #endif
 
-/****************************************************************************
+/************************************************************************************
+ * Name: sam_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PWM
+int sam_pwm_setup(void);
+#endif
+
+/************************************************************************************
+ * Name: sam_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ADC
+int sam_adc_setup(void);
+#endif
+
+/************************************************************************************
+ * Name: sam_can_setup
+ *
+ * Description:
+ *  Initialize CAN and register the CAN device
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_CAN
+int sam_can_setup(void);
+#endif
+
+/************************************************************************************
  * Name: sam_wm8904_initialize
  *
  * Description:
@@ -847,7 +884,7 @@ void weak_function sam_netinitialize(void);
  *   Zero is returned on success.  Otherwise, a negated errno value is
  *   returned to indicate the nature of the failure.
  *
- ****************************************************************************/
+ ************************************************************************************/
 
 #ifdef HAVE_WM8904
 int sam_wm8904_initialize(int minor);
diff --git a/configs/sama5d4-ek/Kconfig b/configs/sama5d4-ek/Kconfig
index d204951b04a2cba706ad84a9ee367441e7085f8c..caec053c0851d9a31fb2e71cb7bbb1fa8a73cccc 100644
--- a/configs/sama5d4-ek/Kconfig
+++ b/configs/sama5d4-ek/Kconfig
@@ -52,7 +52,7 @@ endchoice # SAMA4D4-EK DRAM Type
 config SAMA5D4EK_DRAM_MAIN
 	bool "Build dram_main"
 	default n
-	depends on SAMA5_BOOT_ISRAM
+	depends on SAMA5_BOOT_ISRAM && BUILD_FLAT
 	---help---
 		dram_main is a tiny program that runs in ISRAM.  dram_main will
 		enable SDRAM and load an Intel HEX program into SDRAM over the
@@ -78,7 +78,7 @@ config SAMA5D4EK_DRAM_START
 config SAMA5D4EK_AT25_MAIN
 	bool "Build at25_main"
 	default n
-	depends on SAMA5_BOOT_ISRAM
+	depends on SAMA5_BOOT_ISRAM && BUILD_FLAT
 	---help---
 		at25_main is a tiny program that runs in ISRAM.  at25_main will
 		enable SDRAM and configure the AT25 Serial FLASH.  It will prompt
diff --git a/configs/sama5d4-ek/README.txt b/configs/sama5d4-ek/README.txt
index 7e3f33bd3bbfdae6534d3b8659b19faef3128afb..eec9b595109ef1745d8427ab90a9b93f69b7ec29 100644
--- a/configs/sama5d4-ek/README.txt
+++ b/configs/sama5d4-ek/README.txt
@@ -1910,7 +1910,7 @@ USB High-Speed Device
   --------------------
 
   There is normal console debug output available that can be enabled with
-  CONFIG_DEBUG + CONFIG_DEBUG_USB.  However, USB device operation is very
+  CONFIG_DEBUG_FEATURES + CONFIG_DEBUG_USB.  However, USB device operation is very
   time critical and enabling this debug output WILL interfere with the
   operation of the UDPHS.  USB device tracing is a less invasive way to get
   debug information:  If tracing is enabled, the USB device will save
@@ -1928,15 +1928,15 @@ USB High-Speed Device
       CONFIG_NSH_ARCHINIT=y                   : Automatically start the USB monitor
 
     Application Configuration -> System NSH Add-Ons:
-      CONFIG_SYSTEM_USBMONITOR=y              : Enable the USB monitor daemon
-      CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
-      CONFIG_SYSTEM_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
-      CONFIG_SYSTEM_USBMONITOR_INTERVAL=1     : Dump trace data every second
-      CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y    : Enable TRACE output
-      CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y
-      CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y
-      CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y
-      CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y
+      CONFIG_USBMONITOR=y              : Enable the USB monitor daemon
+      CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
+      CONFIG_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
+      CONFIG_USBMONITOR_INTERVAL=1     : Dump trace data every second
+      CONFIG_USBMONITOR_TRACEINIT=y    : Enable TRACE output
+      CONFIG_USBMONITOR_TRACECLASS=y
+      CONFIG_USBMONITOR_TRACETRANSFERS=y
+      CONFIG_USBMONITOR_TRACECONTROLLER=y
+      CONFIG_USBMONITOR_TRACEINTERRUPTS=y
 
   NOTE: If USB debug output is also enabled, both outputs will appear on the
   serial console.  However, the debug output will be asynchronous with the
@@ -2102,7 +2102,7 @@ USB High-Speed Host
   ------------------
 
   There is normal console debug output available that can be enabled with
-  CONFIG_DEBUG + CONFIG_DEBUG_USB.  However, USB host operation is very time
+  CONFIG_DEBUG_FEATURES + CONFIG_DEBUG_USB.  However, USB host operation is very time
   critical and enabling this debug output might interfere with the operation
   of the UDPHS.  USB host tracing is a less invasive way to get debug
   information:  If tracing is enabled, the USB host will save encoded trace
@@ -2120,10 +2120,10 @@ USB High-Speed Host
       CONFIG_NSH_ARCHINIT=y                   : Automatically start the USB monitor
 
     Application Configuration -> System NSH Add-Ons:
-      CONFIG_SYSTEM_USBMONITOR=y              : Enable the USB monitor daemon
-      CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
-      CONFIG_SYSTEM_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
-      CONFIG_SYSTEM_USBMONITOR_INTERVAL=1     : Dump trace data every second
+      CONFIG_USBMONITOR=y              : Enable the USB monitor daemon
+      CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
+      CONFIG_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
+      CONFIG_USBMONITOR_INTERVAL=1     : Dump trace data every second
 
   NOTE: If USB debug output is also enabled, both outpus will appear on the
   serial console.  However, the debug output will be asynchronous with the
@@ -4272,7 +4272,6 @@ Configurations
        configuration settings are summarized below:
 
        File System:
-       CONFIG_SYSLOG=y             : Enables the System Logging feature.
 
        Device Drivers:
        CONFIG_RAMLOG=y             : Enable the RAM-based logging feature.
diff --git a/configs/sama5d4-ek/at25boot/Make.defs b/configs/sama5d4-ek/at25boot/Make.defs
index 4bad9e5074af59259ecda4170732e0edf0ea8f18..a8019045b6659adec0e56f5cd99bce6e433f6176 100644
--- a/configs/sama5d4-ek/at25boot/Make.defs
+++ b/configs/sama5d4-ek/at25boot/Make.defs
@@ -80,7 +80,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sama5d4-ek/at25boot/defconfig b/configs/sama5d4-ek/at25boot/defconfig
index 64151008f58879ae6c09455e3e50c4f316f54e2f..13a83968ac0164f5c020c283e9196768c3a05db7 100644
--- a/configs/sama5d4-ek/at25boot/defconfig
+++ b/configs/sama5d4-ek/at25boot/defconfig
@@ -46,10 +46,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,10 +76,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +98,7 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -119,9 +120,13 @@ CONFIG_ARCH_CORTEXA5=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-a"
 CONFIG_ARCH_CHIP="sama5"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 CONFIG_ARCH_FPU=y
+CONFIG_ARCH_HAVE_TRUSTZONE=y
+CONFIG_ARCH_TRUSTZONE_SECURE=y
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
@@ -131,6 +136,8 @@ CONFIG_ARCH_LOWVECTORS=y
 # ARMv7-A Configuration Options
 #
 # CONFIG_ARMV7A_HAVE_GICv2 is not set
+# CONFIG_ARMV7A_HAVE_GTM is not set
+# CONFIG_ARMV7A_HAVE_PTM is not set
 CONFIG_ARMV7A_HAVE_L2CC=y
 CONFIG_ARMV7A_HAVE_L2CC_PL310=y
 
@@ -186,7 +193,6 @@ CONFIG_SAMA5_HAVE_SPI2=y
 # CONFIG_SAMA5_HAVE_TC is not set
 CONFIG_SAMA5_HAVE_TC1=y
 CONFIG_SAMA5_HAVE_TC2=y
-CONFIG_ARCH_HAVE_TRUSTZONE=y
 CONFIG_SAMA5_HAVE_TWI3=y
 CONFIG_SAMA5_HAVE_VDEC=y
 # CONFIG_SAMA5_FLEXCOM is not set
@@ -521,6 +527,8 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
 # CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_I2S is not set
 
 #
@@ -535,7 +543,12 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -543,6 +556,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -567,12 +581,15 @@ CONFIG_MTD_AT25=y
 CONFIG_AT25_SPIMODE=0
 CONFIG_AT25_SPIFREQUENCY=20000000
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
 # CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -580,9 +597,10 @@ CONFIG_AT25_SPIFREQUENCY=20000000
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -606,10 +624,6 @@ CONFIG_USART3_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -636,15 +650,18 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -689,12 +706,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -759,13 +770,15 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -809,10 +822,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -821,20 +834,19 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -846,14 +858,14 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -873,8 +885,8 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -885,6 +897,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -906,13 +919,13 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-CONFIG_SYSTEM_HEX2BIN=y
-# CONFIG_SYSTEM_HEX2BIN_DEBUG is not set
+# CONFIG_SYSTEM_FREE is not set
+CONFIG_LIB_HEX2BIN=y
+# CONFIG_LIB_HEX2BIN_DEBUG is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 CONFIG_SYSTEM_READLINE=y
@@ -920,6 +933,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sama5d4-ek/bridge/Make.defs b/configs/sama5d4-ek/bridge/Make.defs
index 254381fd843df38713aa5343be8b635fa10adcc8..c2bdf0c8944761bf73752b276a0bd28742afe682 100644
--- a/configs/sama5d4-ek/bridge/Make.defs
+++ b/configs/sama5d4-ek/bridge/Make.defs
@@ -80,7 +80,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sama5d4-ek/bridge/defconfig b/configs/sama5d4-ek/bridge/defconfig
index e777febe93be2d63d76c9ac181a47d4338c65390..19743cf14f669fb2fa95a086612baa105e566e88 100644
--- a/configs/sama5d4-ek/bridge/defconfig
+++ b/configs/sama5d4-ek/bridge/defconfig
@@ -46,10 +46,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +64,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,10 +79,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +101,7 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -119,9 +123,13 @@ CONFIG_ARCH_CORTEXA5=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-a"
 CONFIG_ARCH_CHIP="sama5"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 CONFIG_ARCH_FPU=y
+CONFIG_ARCH_HAVE_TRUSTZONE=y
+CONFIG_ARCH_TRUSTZONE_SECURE=y
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
@@ -131,6 +139,8 @@ CONFIG_ARCH_LOWVECTORS=y
 # ARMv7-A Configuration Options
 #
 # CONFIG_ARMV7A_HAVE_GICv2 is not set
+# CONFIG_ARMV7A_HAVE_GTM is not set
+# CONFIG_ARMV7A_HAVE_PTM is not set
 CONFIG_ARMV7A_HAVE_L2CC=y
 CONFIG_ARMV7A_HAVE_L2CC_PL310=y
 
@@ -186,7 +196,6 @@ CONFIG_SAMA5_HAVE_SPI2=y
 # CONFIG_SAMA5_HAVE_TC is not set
 CONFIG_SAMA5_HAVE_TC1=y
 CONFIG_SAMA5_HAVE_TC2=y
-CONFIG_ARCH_HAVE_TRUSTZONE=y
 CONFIG_SAMA5_HAVE_TWI3=y
 CONFIG_SAMA5_HAVE_VDEC=y
 # CONFIG_SAMA5_FLEXCOM is not set
@@ -308,6 +317,7 @@ CONFIG_SAMA5_EMAC1_PHYSR_10FD=0x5
 CONFIG_SAMA5_EMAC1_PHYSR_100FD=0x6
 # CONFIG_SAMA5_EMACB_PREALLOCATE is not set
 # CONFIG_SAMA5_EMACB_NBC is not set
+CONFIG_SAMA5_EMACB_HPWORK=y
 CONFIG_SAMA5_EMAC0_ISETH0=y
 # CONFIG_SAMA5_EMAC1_ISETH0 is not set
 
@@ -414,6 +424,7 @@ CONFIG_SAMA5D4_MB_REVE=y
 CONFIG_SAMA5D4EK_528MHZ=y
 CONFIG_SAMA5D4EK_DRAM_BOOT=y
 # CONFIG_SAMA5D4EK_SLOWCLOCK is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -434,6 +445,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=11
@@ -488,6 +500,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -496,6 +509,7 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
@@ -507,8 +521,11 @@ CONFIG_MQ_MAXMSGSIZE=32
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -526,6 +543,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -541,12 +559,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -554,8 +576,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -563,6 +595,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -583,10 +616,8 @@ CONFIG_NETDEV_MULTINIC=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -620,9 +651,10 @@ CONFIG_ETH1_PHY_KSZ8081=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -646,10 +678,6 @@ CONFIG_USART3_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
@@ -673,19 +701,26 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USART3_IFLOWCONTROL is not set
 # CONFIG_USART3_OFLOWCONTROL is not set
 # CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -693,13 +728,11 @@ CONFIG_USART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_GUARDSIZE=2
 
@@ -828,12 +861,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -884,6 +911,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -901,7 +930,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 # CONFIG_NETDB_DNSCLIENT is not set
@@ -909,8 +939,10 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -976,21 +1008,23 @@ CONFIG_EXAMPLES_BRIDGE_NET2_IPHOST=0x0a000001
 CONFIG_EXAMPLES_BRIDGE_NET2_HOSTPORT=5474
 CONFIG_EXAMPLES_BRIDGE_NET2_STACKSIZE=2048
 CONFIG_EXAMPLES_BRIDGE_NET2_PRIORITY=100
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -999,20 +1033,18 @@ CONFIG_EXAMPLES_BRIDGE_NET2_PRIORITY=100
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1026,11 +1058,9 @@ CONFIG_EXAMPLES_BRIDGE_NET2_PRIORITY=100
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1054,8 +1084,9 @@ CONFIG_EXAMPLES_BRIDGE_NET2_PRIORITY=100
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1069,14 +1100,15 @@ CONFIG_EXAMPLES_BRIDGE_NET2_PRIORITY=100
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
-# CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
 CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_PPPD is not set
+# CONFIG_NETUTILS_SMTP is not set
+# CONFIG_NETUTILS_TFTPC is not set
 
 #
 # NSH Library
@@ -1095,12 +1127,12 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 CONFIG_SYSTEM_RAMTEST=y
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 CONFIG_SYSTEM_READLINE=y
@@ -1108,6 +1140,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sama5d4-ek/dramboot/Make.defs b/configs/sama5d4-ek/dramboot/Make.defs
index f142b56bb93bbafe26fe11ae6c28d26d5615933b..2b02d60d63af41238dce71c8e2ba41ac53180ad0 100644
--- a/configs/sama5d4-ek/dramboot/Make.defs
+++ b/configs/sama5d4-ek/dramboot/Make.defs
@@ -80,7 +80,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sama5d4-ek/dramboot/defconfig b/configs/sama5d4-ek/dramboot/defconfig
index f12701c0c512996883ede62b300807d9fb43fc79..221310fd161b8523ced2cb683748dde30f4b757c 100644
--- a/configs/sama5d4-ek/dramboot/defconfig
+++ b/configs/sama5d4-ek/dramboot/defconfig
@@ -46,10 +46,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,10 +76,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +98,7 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -119,9 +120,13 @@ CONFIG_ARCH_CORTEXA5=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-a"
 CONFIG_ARCH_CHIP="sama5"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 CONFIG_ARCH_FPU=y
+CONFIG_ARCH_HAVE_TRUSTZONE=y
+CONFIG_ARCH_TRUSTZONE_SECURE=y
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
@@ -131,6 +136,8 @@ CONFIG_ARCH_LOWVECTORS=y
 # ARMv7-A Configuration Options
 #
 # CONFIG_ARMV7A_HAVE_GICv2 is not set
+# CONFIG_ARMV7A_HAVE_GTM is not set
+# CONFIG_ARMV7A_HAVE_PTM is not set
 CONFIG_ARMV7A_HAVE_L2CC=y
 CONFIG_ARMV7A_HAVE_L2CC_PL310=y
 
@@ -186,7 +193,6 @@ CONFIG_SAMA5_HAVE_SPI2=y
 # CONFIG_SAMA5_HAVE_TC is not set
 CONFIG_SAMA5_HAVE_TC1=y
 CONFIG_SAMA5_HAVE_TC2=y
-CONFIG_ARCH_HAVE_TRUSTZONE=y
 CONFIG_SAMA5_HAVE_TWI3=y
 CONFIG_SAMA5_HAVE_VDEC=y
 # CONFIG_SAMA5_FLEXCOM is not set
@@ -521,7 +527,12 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -529,6 +540,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -537,9 +549,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -563,10 +576,6 @@ CONFIG_USART3_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -593,15 +602,18 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -646,12 +658,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -716,13 +722,15 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -766,10 +774,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -778,20 +786,19 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -803,10 +810,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -830,8 +836,8 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -842,6 +848,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -863,13 +870,13 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-CONFIG_SYSTEM_HEX2BIN=y
-# CONFIG_SYSTEM_HEX2BIN_DEBUG is not set
+# CONFIG_SYSTEM_FREE is not set
+CONFIG_LIB_HEX2BIN=y
+# CONFIG_LIB_HEX2BIN_DEBUG is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 CONFIG_SYSTEM_READLINE=y
@@ -877,6 +884,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sama5d4-ek/elf/Make.defs b/configs/sama5d4-ek/elf/Make.defs
index 9708ba3786a67e43f92d121a99073a323b3f660b..689cb2060e5b11745af84961ed4870f3816a85c3 100644
--- a/configs/sama5d4-ek/elf/Make.defs
+++ b/configs/sama5d4-ek/elf/Make.defs
@@ -80,7 +80,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sama5d4-ek/elf/defconfig b/configs/sama5d4-ek/elf/defconfig
index b598b3f7cc9e1af4385e780ee6634e4b289a474a..12c4f503eb76e964995d51cb8ca1c01566bfb388 100644
--- a/configs/sama5d4-ek/elf/defconfig
+++ b/configs/sama5d4-ek/elf/defconfig
@@ -12,8 +12,10 @@ CONFIG_EXPERIMENTAL=y
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -47,10 +49,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -64,10 +67,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -77,7 +82,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -100,6 +104,7 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -107,7 +112,9 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 # CONFIG_ARCH_CORTEXM7 is not set
 CONFIG_ARCH_CORTEXA5=y
@@ -121,9 +128,15 @@ CONFIG_ARCH_CORTEXA5=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-a"
 CONFIG_ARCH_CHIP="sama5"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 CONFIG_ARCH_FPU=y
+CONFIG_ARCH_HAVE_TRUSTZONE=y
+CONFIG_ARCH_TRUSTZONE_SECURE=y
+# CONFIG_ARCH_TRUSTZONE_NONSECURE is not set
+# CONFIG_ARCH_TRUSTZONE_BOTH is not set
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
@@ -133,6 +146,8 @@ CONFIG_ARCH_LOWVECTORS=y
 # ARMv7-A Configuration Options
 #
 # CONFIG_ARMV7A_HAVE_GICv2 is not set
+# CONFIG_ARMV7A_HAVE_GTM is not set
+# CONFIG_ARMV7A_HAVE_PTM is not set
 CONFIG_ARMV7A_HAVE_L2CC=y
 CONFIG_ARMV7A_HAVE_L2CC_PL310=y
 
@@ -189,7 +204,6 @@ CONFIG_SAMA5_HAVE_SPI2=y
 # CONFIG_SAMA5_HAVE_TC is not set
 CONFIG_SAMA5_HAVE_TC1=y
 CONFIG_SAMA5_HAVE_TC2=y
-CONFIG_ARCH_HAVE_TRUSTZONE=y
 CONFIG_SAMA5_HAVE_TWI3=y
 CONFIG_SAMA5_HAVE_VDEC=y
 # CONFIG_SAMA5_FLEXCOM is not set
@@ -389,6 +403,7 @@ CONFIG_SAMA5D4EK_528MHZ=y
 CONFIG_SAMA5D4EK_DRAM_BOOT=y
 # CONFIG_SAMA5D4EK_ROMFS_MOUNT is not set
 # CONFIG_SAMA5D4EK_SLOWCLOCK is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -409,6 +424,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=32
@@ -435,6 +451,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -508,6 +526,7 @@ CONFIG_DEV_NULL=y
 CONFIG_DEV_ZERO=y
 CONFIG_ARCH_HAVE_RNG=y
 CONFIG_DEV_RANDOM=y
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -528,12 +547,16 @@ CONFIG_I2C_RESET=y
 # CONFIG_I2C_TRACE is not set
 # CONFIG_I2C_DRIVER is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 # CONFIG_RTC_ALARM is not set
@@ -546,8 +569,18 @@ CONFIG_AUDIO_DEVICES=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -555,6 +588,7 @@ CONFIG_AUDIO_DEVICES=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -563,9 +597,10 @@ CONFIG_AUDIO_DEVICES=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -589,10 +624,6 @@ CONFIG_USART4_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
@@ -630,19 +661,26 @@ CONFIG_USART4_2STOP=0
 # CONFIG_USART4_IFLOWCONTROL is not set
 # CONFIG_USART4_OFLOWCONTROL is not set
 # CONFIG_USART4_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -680,12 +718,6 @@ CONFIG_FS_ROMFS=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -740,10 +772,25 @@ CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+CONFIG_LIBC_ARCH_ELF=y
+# CONFIG_ARMV7A_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -758,15 +805,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -798,9 +852,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 CONFIG_EXAMPLES_ELF=y
@@ -813,10 +867,10 @@ CONFIG_EXAMPLES_ELF_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -825,21 +879,19 @@ CONFIG_EXAMPLES_ELF_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RANDOM is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
@@ -853,11 +905,10 @@ CONFIG_EXAMPLES_ELF_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -881,8 +932,9 @@ CONFIG_EXAMPLES_ELF_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -894,6 +946,7 @@ CONFIG_EXAMPLES_ELF_CXXINITIALIZE=y
 #
 # CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -915,13 +968,13 @@ CONFIG_EXAMPLES_ELF_CXXINITIALIZE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_SYSTEM_I2CTOOL is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_I2CTOOL is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 CONFIG_SYSTEM_READLINE=y
@@ -929,6 +982,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sama5d4-ek/ipv6/Make.defs b/configs/sama5d4-ek/ipv6/Make.defs
index 17e78d57bde746402c0f24d0f88497003e1c2181..757635691c316ac4a270069cab82468574e1cd0f 100644
--- a/configs/sama5d4-ek/ipv6/Make.defs
+++ b/configs/sama5d4-ek/ipv6/Make.defs
@@ -80,7 +80,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sama5d4-ek/ipv6/defconfig b/configs/sama5d4-ek/ipv6/defconfig
index 347761f235e181f1eabedbe8533d22e0e60a3673..94b5c44322e5d67dba7026e7e522cf9cf379530f 100644
--- a/configs/sama5d4-ek/ipv6/defconfig
+++ b/configs/sama5d4-ek/ipv6/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +66,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,10 +81,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +103,7 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -105,7 +111,9 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 # CONFIG_ARCH_CORTEXM7 is not set
 CONFIG_ARCH_CORTEXA5=y
@@ -119,9 +127,13 @@ CONFIG_ARCH_CORTEXA5=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-a"
 CONFIG_ARCH_CHIP="sama5"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 CONFIG_ARCH_FPU=y
+CONFIG_ARCH_HAVE_TRUSTZONE=y
+CONFIG_ARCH_TRUSTZONE_SECURE=y
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
@@ -131,6 +143,8 @@ CONFIG_ARCH_LOWVECTORS=y
 # ARMv7-A Configuration Options
 #
 # CONFIG_ARMV7A_HAVE_GICv2 is not set
+# CONFIG_ARMV7A_HAVE_GTM is not set
+# CONFIG_ARMV7A_HAVE_PTM is not set
 CONFIG_ARMV7A_HAVE_L2CC=y
 CONFIG_ARMV7A_HAVE_L2CC_PL310=y
 
@@ -145,8 +159,6 @@ CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y
 # CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set
 # CONFIG_ARMV7A_DECODEFIQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 # CONFIG_USBHOST_BULK_DISABLE is not set
 # CONFIG_USBHOST_INT_DISABLE is not set
 CONFIG_USBHOST_ISOC_DISABLE=y
@@ -191,7 +203,6 @@ CONFIG_SAMA5_HAVE_SPI2=y
 # CONFIG_SAMA5_HAVE_TC is not set
 CONFIG_SAMA5_HAVE_TC1=y
 CONFIG_SAMA5_HAVE_TC2=y
-CONFIG_ARCH_HAVE_TRUSTZONE=y
 CONFIG_SAMA5_HAVE_TWI3=y
 CONFIG_SAMA5_HAVE_VDEC=y
 # CONFIG_SAMA5_FLEXCOM is not set
@@ -334,6 +345,7 @@ CONFIG_SAMA5_EMAC0_PHYSR_10FD=0x5
 CONFIG_SAMA5_EMAC0_PHYSR_100FD=0x6
 # CONFIG_SAMA5_EMACB_PREALLOCATE is not set
 # CONFIG_SAMA5_EMACB_NBC is not set
+CONFIG_SAMA5_EMACB_HPWORK=y
 CONFIG_SAMA5_EMAC0_ISETH0=y
 
 #
@@ -371,6 +383,7 @@ CONFIG_SAMA5_SSC0_TX_STTDLY=1
 # HSMCI device driver options
 #
 CONFIG_SAMA5_HSMCI0_XDMAC0=y
+CONFIG_SAMA5_HSMCI_DMA=y
 # CONFIG_SAMA5_HSMCI_RDPROOF is not set
 # CONFIG_SAMA5_HSMCI_WRPROOF is not set
 
@@ -485,8 +498,6 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
@@ -512,11 +523,10 @@ CONFIG_SAMA5D4EK_MXT_DEVMINOR=0
 CONFIG_SAMA5D4EK_WM8904_I2CFREQUENCY=400000
 CONFIG_SAMA5D4EK_WM8904_SRCMAIN=y
 # CONFIG_SAMA5D4EK_WM8904_SRCSCK is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_TSCTEST=y
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -538,6 +548,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=32
@@ -547,6 +558,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -563,6 +575,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -634,6 +648,7 @@ CONFIG_DEV_NULL=y
 CONFIG_DEV_ZERO=y
 CONFIG_ARCH_HAVE_RNG=y
 CONFIG_DEV_RANDOM=y
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -654,12 +669,16 @@ CONFIG_I2C_RESET=y
 # CONFIG_I2C_TRACE is not set
 CONFIG_I2C_DRIVER=y
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 CONFIG_I2S=y
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 # CONFIG_RTC_ALARM is not set
@@ -696,8 +715,18 @@ CONFIG_MXT_NPOLLWAITERS=4
 # CONFIG_BUTTONS is not set
 # CONFIG_DJOYSTICK is not set
 # CONFIG_AJOYSTICK is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -705,6 +734,7 @@ CONFIG_MXT_NPOLLWAITERS=4
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -712,10 +742,12 @@ CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
 # CONFIG_MMCSD_MMCSUPPORT is not set
 CONFIG_MMCSD_HAVECARDDETECT=y
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
 CONFIG_MMCSD_SDIO=y
 # CONFIG_SDIO_PREFLIGHT is not set
 # CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_SDIO_BLOCKSETUP=y
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -737,10 +769,8 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -764,9 +794,10 @@ CONFIG_ETH0_PHY_KSZ8081=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -790,10 +821,6 @@ CONFIG_USART4_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
@@ -831,12 +858,14 @@ CONFIG_USART4_2STOP=0
 # CONFIG_USART4_IFLOWCONTROL is not set
 # CONFIG_USART4_OFLOWCONTROL is not set
 # CONFIG_USART4_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 CONFIG_USBHOST=y
 CONFIG_USBHOST_NPREALLOC=4
 CONFIG_USBHOST_HAVE_ASYNCH=y
 # CONFIG_USBHOST_ASYNCH is not set
 # CONFIG_USBHOST_HUB is not set
+# CONFIG_USBHOST_COMPOSITE is not set
 CONFIG_USBHOST_MSC=y
 # CONFIG_USBHOST_CDCACM is not set
 CONFIG_USBHOST_HIDKBD=y
@@ -851,23 +880,30 @@ CONFIG_HIDKBD_NPOLLWAITERS=2
 # CONFIG_USBHOST_HIDMOUSE is not set
 # CONFIG_USBHOST_RTL8187 is not set
 # CONFIG_USBHOST_TRACE is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 CONFIG_RAMLOG=y
-CONFIG_RAMLOG_SYSLOG=y
 # CONFIG_RAMLOG_CONSOLE is not set
 CONFIG_RAMLOG_BUFSIZE=16384
 # CONFIG_RAMLOG_CRLF is not set
 CONFIG_RAMLOG_NONBLOCKING=y
 CONFIG_RAMLOG_NPOLLWAITERS=4
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_RAMLOG_SYSLOG=y
 # CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -875,13 +911,11 @@ CONFIG_RAMLOG_NPOLLWAITERS=4
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=562
 CONFIG_NET_GUARDSIZE=2
@@ -1031,13 +1065,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_NET is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-# CONFIG_SYSLOG_CHAR is not set
-
 #
 # Graphics Support
 #
@@ -1046,6 +1073,7 @@ CONFIG_NX_NPLANES=1
 CONFIG_NX_BGCOLOR=0x7b5d
 # CONFIG_NX_ANTIALIASING is not set
 # CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -1121,6 +1149,7 @@ CONFIG_NXFONT_SERIF22X28B=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 # CONFIG_NXTERM is not set
 
 #
@@ -1201,11 +1230,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7A_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1223,7 +1269,11 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 # CONFIG_NETDB_DNSCLIENT is not set
@@ -1231,8 +1281,10 @@ CONFIG_LIBC_NETDB=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1263,34 +1315,23 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
-CONFIG_EXAMPLES_BUTTONS=y
-CONFIG_EXAMPLES_BUTTONS_MIN=0
-CONFIG_EXAMPLES_BUTTONS_MAX=0
-CONFIG_EXAMPLES_IRQBUTTONS_MIN=0
-CONFIG_EXAMPLES_IRQBUTTONS_MAX=0
-CONFIG_EXAMPLES_BUTTONS_NAME0="PB_USER"
-CONFIG_EXAMPLES_BUTTONS_NAME1="Button 1"
-CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2"
-CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3"
-CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4"
-CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5"
-CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6"
-CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1309,28 +1350,27 @@ CONFIG_EXAMPLES_NX_BPP=16
 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set
 CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 # CONFIG_EXAMPLES_NX_EXTERNINIT is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RANDOM is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1343,12 +1383,11 @@ CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/input0"
 CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
 #
@@ -1373,8 +1412,9 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1386,19 +1426,20 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
 #
 # CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
 # CONFIG_NETUTILS_TFTPC is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1450,12 +1491,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1472,11 +1513,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -1513,6 +1557,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 CONFIG_NSH_NETINIT_THREAD=y
 CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568
 CONFIG_NSH_NETINIT_THREAD_PRIORITY=80
@@ -1576,11 +1621,11 @@ CONFIG_NSH_MAX_ROUNDTRIP=20
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=0
 CONFIG_I2CTOOL_MAXBUS=0
@@ -1588,7 +1633,7 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=100000
-# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 CONFIG_SYSTEM_NXPLAYER=y
 CONFIG_NXPLAYER_PLAYTHREAD_STACKSIZE=1500
@@ -1609,6 +1654,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sama5d4-ek/knsh/Make.defs b/configs/sama5d4-ek/knsh/Make.defs
index ece275b771152a2f1d764e56234a04256b98a2ee..b5a28fb3b82549e434b1d2905b2461fe0406d7e6 100644
--- a/configs/sama5d4-ek/knsh/Make.defs
+++ b/configs/sama5d4-ek/knsh/Make.defs
@@ -80,7 +80,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sama5d4-ek/knsh/defconfig b/configs/sama5d4-ek/knsh/defconfig
index 1992f4004bc4ccdffc4c7c3d5835688e9dca505f..ef2d700d1a378a16ab9277b10de84ce9c30425e3 100644
--- a/configs/sama5d4-ek/knsh/defconfig
+++ b/configs/sama5d4-ek/knsh/defconfig
@@ -12,8 +12,10 @@ CONFIG_EXPERIMENTAL=y
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +66,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +81,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -99,6 +103,7 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -106,7 +111,9 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 # CONFIG_ARCH_CORTEXM7 is not set
 CONFIG_ARCH_CORTEXA5=y
@@ -120,9 +127,15 @@ CONFIG_ARCH_CORTEXA5=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-a"
 CONFIG_ARCH_CHIP="sama5"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 CONFIG_ARCH_FPU=y
+CONFIG_ARCH_HAVE_TRUSTZONE=y
+CONFIG_ARCH_TRUSTZONE_SECURE=y
+# CONFIG_ARCH_TRUSTZONE_NONSECURE is not set
+# CONFIG_ARCH_TRUSTZONE_BOTH is not set
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
@@ -132,6 +145,8 @@ CONFIG_ARCH_LOWVECTORS=y
 # ARMv7-A Configuration Options
 #
 # CONFIG_ARMV7A_HAVE_GICv2 is not set
+# CONFIG_ARMV7A_HAVE_GTM is not set
+# CONFIG_ARMV7A_HAVE_PTM is not set
 CONFIG_ARMV7A_HAVE_L2CC=y
 CONFIG_ARMV7A_HAVE_L2CC_PL310=y
 
@@ -147,8 +162,6 @@ CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y
 # CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set
 # CONFIG_ARMV7A_DECODEFIQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # SAMA5 Configuration Options
@@ -190,7 +203,6 @@ CONFIG_SAMA5_HAVE_SPI2=y
 # CONFIG_SAMA5_HAVE_TC is not set
 CONFIG_SAMA5_HAVE_TC1=y
 CONFIG_SAMA5_HAVE_TC2=y
-CONFIG_ARCH_HAVE_TRUSTZONE=y
 CONFIG_SAMA5_HAVE_TWI3=y
 CONFIG_SAMA5_HAVE_VDEC=y
 # CONFIG_SAMA5_FLEXCOM is not set
@@ -282,6 +294,7 @@ CONFIG_SAMA5_PIOE_IRQ=y
 # HSMCI device driver options
 #
 CONFIG_SAMA5_HSMCI0_XDMAC0=y
+CONFIG_SAMA5_HSMCI_DMA=y
 # CONFIG_SAMA5_HSMCI_RDPROOF is not set
 # CONFIG_SAMA5_HSMCI_WRPROOF is not set
 
@@ -391,8 +404,6 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
@@ -409,6 +420,7 @@ CONFIG_SAMA5D4EK_HSMCI0_MOUNT_BLKDEV="/dev/mmcsd0"
 CONFIG_SAMA5D4EK_HSMCI0_MOUNT_MOUNTPOINT="/bin"
 # CONFIG_SAMA5D4EK_ROMFS_MOUNT is not set
 # CONFIG_SAMA5D4EK_SLOWCLOCK is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -429,6 +441,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=32
@@ -455,6 +468,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -532,6 +547,7 @@ CONFIG_DEV_NULL=y
 CONFIG_DEV_ZERO=y
 CONFIG_ARCH_HAVE_RNG=y
 CONFIG_DEV_RANDOM=y
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -547,12 +563,16 @@ CONFIG_DEV_RANDOM=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 # CONFIG_RTC_ALARM is not set
@@ -564,8 +584,18 @@ CONFIG_RTC_DATETIME=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -573,6 +603,7 @@ CONFIG_RTC_DATETIME=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -580,10 +611,12 @@ CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
 # CONFIG_MMCSD_MMCSUPPORT is not set
 CONFIG_MMCSD_HAVECARDDETECT=y
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
 CONFIG_MMCSD_SDIO=y
 # CONFIG_SDIO_PREFLIGHT is not set
 # CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_SDIO_BLOCKSETUP=y
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -592,9 +625,10 @@ CONFIG_SDIO_BLOCKSETUP=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -618,10 +652,6 @@ CONFIG_USART4_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
@@ -659,19 +689,26 @@ CONFIG_USART4_2STOP=0
 # CONFIG_USART4_IFLOWCONTROL is not set
 # CONFIG_USART4_OFLOWCONTROL is not set
 # CONFIG_USART4_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -725,12 +762,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -787,11 +818,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+CONFIG_LIBC_ARCH_ELF=y
+# CONFIG_ARMV7A_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -809,16 +857,23 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_USRWORK is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -849,9 +904,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -863,9 +919,9 @@ CONFIG_EXAMPLES_HELLO_PROGNAME="hello"
 CONFIG_EXAMPLES_HELLO_PRIORITY=100
 CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
 # CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_IGMP is not set
 # CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_KEYPADTEST is not set
-# CONFIG_EXAMPLES_IGMP is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -876,21 +932,19 @@ CONFIG_EXAMPLES_NSH_PROGNAME="init"
 # CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RANDOM is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -902,10 +956,9 @@ CONFIG_EXAMPLES_NSH_PROGNAME="init"
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -929,8 +982,9 @@ CONFIG_EXAMPLES_NSH_PROGNAME="init"
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -942,6 +996,7 @@ CONFIG_EXAMPLES_NSH_PROGNAME="init"
 #
 # CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -997,12 +1052,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1019,11 +1074,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -1058,12 +1116,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1071,6 +1129,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sama5d4-ek/knsh/defconfig.ROMFS b/configs/sama5d4-ek/knsh/defconfig.ROMFS
index a069c2d2a7daf7c2d0c54a15da50086fa5dda432..b90a20bf6a04108b13487cdf8ba8ff82c6eb3eb7 100644
--- a/configs/sama5d4-ek/knsh/defconfig.ROMFS
+++ b/configs/sama5d4-ek/knsh/defconfig.ROMFS
@@ -45,7 +45,7 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
@@ -61,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -74,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
@@ -483,7 +481,6 @@ CONFIG_RTC_DATETIME=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 # CONFIG_16550_UART is not set
@@ -596,7 +593,6 @@ CONFIG_FS_ROMFS=y
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 
 #
 # Graphics Support
@@ -666,7 +662,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_LIBC_LOCALTIME is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Non-standard Library Support
@@ -743,7 +738,6 @@ CONFIG_EXAMPLES_NSH_PROGNAME="init"
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
 # CONFIG_EXAMPLES_RANDOM is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
diff --git a/configs/sama5d4-ek/nsh/Make.defs b/configs/sama5d4-ek/nsh/Make.defs
index c94054d06e673412aee39c063ad55e5c331a10a9..5edb2dd191be9b82cb2518e5012e51c2586f1214 100644
--- a/configs/sama5d4-ek/nsh/Make.defs
+++ b/configs/sama5d4-ek/nsh/Make.defs
@@ -80,7 +80,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sama5d4-ek/nsh/defconfig b/configs/sama5d4-ek/nsh/defconfig
index eeab2f01314d598daaafc3e8e2177417917dcdb9..6e9b13f709e00a31c2e4b5c14d61c1f87f598965 100644
--- a/configs/sama5d4-ek/nsh/defconfig
+++ b/configs/sama5d4-ek/nsh/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +66,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,10 +81,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +103,7 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -105,7 +111,9 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 # CONFIG_ARCH_CORTEXM7 is not set
 CONFIG_ARCH_CORTEXA5=y
@@ -119,9 +127,13 @@ CONFIG_ARCH_CORTEXA5=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-a"
 CONFIG_ARCH_CHIP="sama5"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 CONFIG_ARCH_FPU=y
+CONFIG_ARCH_HAVE_TRUSTZONE=y
+CONFIG_ARCH_TRUSTZONE_SECURE=y
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
@@ -131,6 +143,8 @@ CONFIG_ARCH_LOWVECTORS=y
 # ARMv7-A Configuration Options
 #
 # CONFIG_ARMV7A_HAVE_GICv2 is not set
+# CONFIG_ARMV7A_HAVE_GTM is not set
+# CONFIG_ARMV7A_HAVE_PTM is not set
 CONFIG_ARMV7A_HAVE_L2CC=y
 CONFIG_ARMV7A_HAVE_L2CC_PL310=y
 
@@ -145,8 +159,6 @@ CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y
 # CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set
 # CONFIG_ARMV7A_DECODEFIQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 # CONFIG_USBHOST_BULK_DISABLE is not set
 # CONFIG_USBHOST_INT_DISABLE is not set
 CONFIG_USBHOST_ISOC_DISABLE=y
@@ -191,7 +203,6 @@ CONFIG_SAMA5_HAVE_SPI2=y
 # CONFIG_SAMA5_HAVE_TC is not set
 CONFIG_SAMA5_HAVE_TC1=y
 CONFIG_SAMA5_HAVE_TC2=y
-CONFIG_ARCH_HAVE_TRUSTZONE=y
 CONFIG_SAMA5_HAVE_TWI3=y
 CONFIG_SAMA5_HAVE_VDEC=y
 # CONFIG_SAMA5_FLEXCOM is not set
@@ -334,6 +345,7 @@ CONFIG_SAMA5_EMAC0_PHYSR_10FD=0x5
 CONFIG_SAMA5_EMAC0_PHYSR_100FD=0x6
 # CONFIG_SAMA5_EMACB_PREALLOCATE is not set
 # CONFIG_SAMA5_EMACB_NBC is not set
+CONFIG_SAMA5_EMACB_HPWORK=y
 CONFIG_SAMA5_EMAC0_ISETH0=y
 
 #
@@ -371,6 +383,7 @@ CONFIG_SAMA5_SSC0_TX_STTDLY=1
 # HSMCI device driver options
 #
 CONFIG_SAMA5_HSMCI0_XDMAC0=y
+CONFIG_SAMA5_HSMCI_DMA=y
 # CONFIG_SAMA5_HSMCI_RDPROOF is not set
 # CONFIG_SAMA5_HSMCI_WRPROOF is not set
 
@@ -485,8 +498,6 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
@@ -512,11 +523,10 @@ CONFIG_SAMA5D4EK_MXT_DEVMINOR=0
 CONFIG_SAMA5D4EK_WM8904_I2CFREQUENCY=400000
 CONFIG_SAMA5D4EK_WM8904_SRCMAIN=y
 # CONFIG_SAMA5D4EK_WM8904_SRCSCK is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_TSCTEST=y
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -538,6 +548,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=32
@@ -547,6 +558,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -563,6 +575,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -634,6 +648,7 @@ CONFIG_DEV_NULL=y
 CONFIG_DEV_ZERO=y
 CONFIG_ARCH_HAVE_RNG=y
 CONFIG_DEV_RANDOM=y
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -654,12 +669,16 @@ CONFIG_I2C_RESET=y
 # CONFIG_I2C_TRACE is not set
 CONFIG_I2C_DRIVER=y
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 CONFIG_I2S=y
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 # CONFIG_RTC_ALARM is not set
@@ -696,8 +715,18 @@ CONFIG_MXT_NPOLLWAITERS=4
 # CONFIG_BUTTONS is not set
 # CONFIG_DJOYSTICK is not set
 # CONFIG_AJOYSTICK is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -705,6 +734,7 @@ CONFIG_MXT_NPOLLWAITERS=4
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -712,10 +742,12 @@ CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
 # CONFIG_MMCSD_MMCSUPPORT is not set
 CONFIG_MMCSD_HAVECARDDETECT=y
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
 CONFIG_MMCSD_SDIO=y
 # CONFIG_SDIO_PREFLIGHT is not set
 # CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_SDIO_BLOCKSETUP=y
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -739,10 +771,8 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -766,9 +796,10 @@ CONFIG_ETH0_PHY_KSZ8081=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -792,10 +823,6 @@ CONFIG_USART4_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
@@ -833,12 +860,14 @@ CONFIG_USART4_2STOP=0
 # CONFIG_USART4_IFLOWCONTROL is not set
 # CONFIG_USART4_OFLOWCONTROL is not set
 # CONFIG_USART4_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 CONFIG_USBHOST=y
 CONFIG_USBHOST_NPREALLOC=4
 CONFIG_USBHOST_HAVE_ASYNCH=y
 # CONFIG_USBHOST_ASYNCH is not set
 # CONFIG_USBHOST_HUB is not set
+# CONFIG_USBHOST_COMPOSITE is not set
 CONFIG_USBHOST_MSC=y
 # CONFIG_USBHOST_CDCACM is not set
 CONFIG_USBHOST_HIDKBD=y
@@ -853,23 +882,30 @@ CONFIG_HIDKBD_NPOLLWAITERS=2
 # CONFIG_USBHOST_HIDMOUSE is not set
 # CONFIG_USBHOST_RTL8187 is not set
 # CONFIG_USBHOST_TRACE is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 CONFIG_RAMLOG=y
-CONFIG_RAMLOG_SYSLOG=y
 # CONFIG_RAMLOG_CONSOLE is not set
 CONFIG_RAMLOG_BUFSIZE=16384
 # CONFIG_RAMLOG_CRLF is not set
 CONFIG_RAMLOG_NONBLOCKING=y
 CONFIG_RAMLOG_NPOLLWAITERS=4
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_RAMLOG_SYSLOG=y
 # CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -877,13 +913,11 @@ CONFIG_RAMLOG_NPOLLWAITERS=4
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=562
 CONFIG_NET_GUARDSIZE=2
@@ -1035,13 +1069,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_NET is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-# CONFIG_SYSLOG_CHAR is not set
-
 #
 # Graphics Support
 #
@@ -1050,6 +1077,7 @@ CONFIG_NX_NPLANES=1
 CONFIG_NX_BGCOLOR=0x7b5d
 # CONFIG_NX_ANTIALIASING is not set
 # CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -1125,6 +1153,7 @@ CONFIG_NXFONT_SERIF22X28B=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 # CONFIG_NXTERM is not set
 
 #
@@ -1205,11 +1234,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7A_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1227,7 +1273,11 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -1242,8 +1292,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1274,34 +1326,23 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
-CONFIG_EXAMPLES_BUTTONS=y
-CONFIG_EXAMPLES_BUTTONS_MIN=0
-CONFIG_EXAMPLES_BUTTONS_MAX=0
-CONFIG_EXAMPLES_IRQBUTTONS_MIN=0
-CONFIG_EXAMPLES_IRQBUTTONS_MAX=0
-CONFIG_EXAMPLES_BUTTONS_NAME0="PB_USER"
-CONFIG_EXAMPLES_BUTTONS_NAME1="Button 1"
-CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2"
-CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3"
-CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4"
-CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5"
-CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6"
-CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1320,28 +1361,27 @@ CONFIG_EXAMPLES_NX_BPP=16
 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set
 CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 # CONFIG_EXAMPLES_NX_EXTERNINIT is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RANDOM is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1354,12 +1394,11 @@ CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/input0"
 CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
 #
@@ -1384,8 +1423,9 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1399,21 +1439,22 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1466,13 +1507,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1490,11 +1531,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -1530,6 +1574,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 CONFIG_NSH_NETINIT_THREAD=y
 CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568
 CONFIG_NSH_NETINIT_THREAD_PRIORITY=80
@@ -1577,11 +1622,11 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=0
 CONFIG_I2CTOOL_MAXBUS=0
@@ -1589,7 +1634,7 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=100000
-# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 CONFIG_SYSTEM_NXPLAYER=y
 CONFIG_NXPLAYER_PLAYTHREAD_STACKSIZE=1500
@@ -1610,6 +1655,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sama5d4-ek/nxwm/Make.defs b/configs/sama5d4-ek/nxwm/Make.defs
index d839e3ded4fbd471379efac8e128dc2a0dc57fe0..d005e269db43c3350e1f37c880e4130d0ab420f9 100644
--- a/configs/sama5d4-ek/nxwm/Make.defs
+++ b/configs/sama5d4-ek/nxwm/Make.defs
@@ -80,7 +80,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sama5d4-ek/nxwm/defconfig b/configs/sama5d4-ek/nxwm/defconfig
index 33173d299dc4433953676a17b39988a80289b4b6..a77ab4e6cbe11ebc0a7cf3c16c09f159ee67f74d 100644
--- a/configs/sama5d4-ek/nxwm/defconfig
+++ b/configs/sama5d4-ek/nxwm/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +66,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,10 +81,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +103,7 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -105,7 +111,9 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 # CONFIG_ARCH_CORTEXM7 is not set
 CONFIG_ARCH_CORTEXA5=y
@@ -119,9 +127,13 @@ CONFIG_ARCH_CORTEXA5=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-a"
 CONFIG_ARCH_CHIP="sama5"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 CONFIG_ARCH_FPU=y
+CONFIG_ARCH_HAVE_TRUSTZONE=y
+CONFIG_ARCH_TRUSTZONE_SECURE=y
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
@@ -131,6 +143,8 @@ CONFIG_ARCH_LOWVECTORS=y
 # ARMv7-A Configuration Options
 #
 # CONFIG_ARMV7A_HAVE_GICv2 is not set
+# CONFIG_ARMV7A_HAVE_GTM is not set
+# CONFIG_ARMV7A_HAVE_PTM is not set
 CONFIG_ARMV7A_HAVE_L2CC=y
 CONFIG_ARMV7A_HAVE_L2CC_PL310=y
 
@@ -145,8 +159,6 @@ CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y
 # CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set
 # CONFIG_ARMV7A_DECODEFIQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 # CONFIG_USBHOST_BULK_DISABLE is not set
 # CONFIG_USBHOST_INT_DISABLE is not set
 CONFIG_USBHOST_ISOC_DISABLE=y
@@ -191,7 +203,6 @@ CONFIG_SAMA5_HAVE_SPI2=y
 # CONFIG_SAMA5_HAVE_TC is not set
 CONFIG_SAMA5_HAVE_TC1=y
 CONFIG_SAMA5_HAVE_TC2=y
-CONFIG_ARCH_HAVE_TRUSTZONE=y
 CONFIG_SAMA5_HAVE_TWI3=y
 CONFIG_SAMA5_HAVE_VDEC=y
 # CONFIG_SAMA5_FLEXCOM is not set
@@ -334,6 +345,7 @@ CONFIG_SAMA5_EMAC0_PHYSR_10FD=0x5
 CONFIG_SAMA5_EMAC0_PHYSR_100FD=0x6
 # CONFIG_SAMA5_EMACB_PREALLOCATE is not set
 # CONFIG_SAMA5_EMACB_NBC is not set
+CONFIG_SAMA5_EMACB_HPWORK=y
 CONFIG_SAMA5_EMAC0_ISETH0=y
 
 #
@@ -345,6 +357,7 @@ CONFIG_SAMA5_TWI0_FREQUENCY=100000
 # HSMCI device driver options
 #
 CONFIG_SAMA5_HSMCI0_XDMAC0=y
+CONFIG_SAMA5_HSMCI_DMA=y
 # CONFIG_SAMA5_HSMCI_RDPROOF is not set
 # CONFIG_SAMA5_HSMCI_WRPROOF is not set
 
@@ -459,8 +472,6 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
@@ -483,11 +494,10 @@ CONFIG_SAMA5D4EK_USBHOST_PRIO=100
 CONFIG_SAMA5D4EK_MXT_I2CFREQUENCY=400000
 CONFIG_SAMA5D4EK_MXT_DEVMINOR=0
 # CONFIG_SAMA5D4EK_SLOWCLOCK is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -509,6 +519,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=32
@@ -518,6 +529,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -535,6 +547,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -578,7 +592,7 @@ CONFIG_SIG_SIGWORK=17
 # POSIX Message Queue Options
 #
 CONFIG_PREALLOC_MQ_MSGS=32
-CONFIG_MQ_MAXMSGSIZE=48
+CONFIG_MQ_MAXMSGSIZE=64
 # CONFIG_MODULE is not set
 
 #
@@ -608,6 +622,7 @@ CONFIG_DEV_NULL=y
 CONFIG_DEV_ZERO=y
 CONFIG_ARCH_HAVE_RNG=y
 CONFIG_DEV_RANDOM=y
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -628,12 +643,16 @@ CONFIG_I2C_RESET=y
 # CONFIG_I2C_TRACE is not set
 CONFIG_I2C_DRIVER=y
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 # CONFIG_RTC_ALARM is not set
@@ -665,8 +684,18 @@ CONFIG_MXT_NPOLLWAITERS=4
 # CONFIG_BUTTONS is not set
 # CONFIG_DJOYSTICK is not set
 # CONFIG_AJOYSTICK is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -674,6 +703,7 @@ CONFIG_MXT_NPOLLWAITERS=4
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -681,10 +711,12 @@ CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
 # CONFIG_MMCSD_MMCSUPPORT is not set
 CONFIG_MMCSD_HAVECARDDETECT=y
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
 CONFIG_MMCSD_SDIO=y
 # CONFIG_SDIO_PREFLIGHT is not set
 # CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_SDIO_BLOCKSETUP=y
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -708,10 +740,8 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -735,9 +765,10 @@ CONFIG_ETH0_PHY_KSZ8081=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -761,10 +792,6 @@ CONFIG_USART4_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
@@ -802,12 +829,14 @@ CONFIG_USART4_2STOP=0
 # CONFIG_USART4_IFLOWCONTROL is not set
 # CONFIG_USART4_OFLOWCONTROL is not set
 # CONFIG_USART4_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 CONFIG_USBHOST=y
 CONFIG_USBHOST_NPREALLOC=4
 CONFIG_USBHOST_HAVE_ASYNCH=y
 # CONFIG_USBHOST_ASYNCH is not set
 # CONFIG_USBHOST_HUB is not set
+# CONFIG_USBHOST_COMPOSITE is not set
 CONFIG_USBHOST_MSC=y
 # CONFIG_USBHOST_CDCACM is not set
 CONFIG_USBHOST_HIDKBD=y
@@ -822,23 +851,30 @@ CONFIG_HIDKBD_NPOLLWAITERS=2
 # CONFIG_USBHOST_HIDMOUSE is not set
 # CONFIG_USBHOST_RTL8187 is not set
 # CONFIG_USBHOST_TRACE is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 CONFIG_RAMLOG=y
-CONFIG_RAMLOG_SYSLOG=y
 # CONFIG_RAMLOG_CONSOLE is not set
 CONFIG_RAMLOG_BUFSIZE=16384
 # CONFIG_RAMLOG_CRLF is not set
 CONFIG_RAMLOG_NONBLOCKING=y
 CONFIG_RAMLOG_NPOLLWAITERS=4
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_RAMLOG_SYSLOG=y
 # CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -846,13 +882,11 @@ CONFIG_RAMLOG_NPOLLWAITERS=4
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=562
 CONFIG_NET_GUARDSIZE=2
@@ -1002,13 +1036,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_NET is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-# CONFIG_SYSLOG_CHAR is not set
-
 #
 # Graphics Support
 #
@@ -1017,6 +1044,7 @@ CONFIG_NX_NPLANES=1
 CONFIG_NX_BGCOLOR=0x95fa
 # CONFIG_NX_ANTIALIASING is not set
 # CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -1092,13 +1120,14 @@ CONFIG_NXFONT_SANS28X37B=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 CONFIG_NXTERM=y
 
 #
 # NxTerm Output Text/Graphics Options
 #
 CONFIG_NXTERM_BPP=16
-CONFIG_NXTERM_CURSORCHAR=137
+CONFIG_NXTERM_CURSORCHAR=95
 CONFIG_NXTERM_MXCHARS=640
 CONFIG_NXTERM_CACHESIZE=32
 CONFIG_NXTERM_LINESEPARATION=0
@@ -1118,7 +1147,11 @@ CONFIG_NX_MULTIUSER=y
 CONFIG_NX_BLOCKING=y
 CONFIG_NX_MXSERVERMSGS=32
 CONFIG_NX_MXCLIENTMSGS=16
-# CONFIG_NX_NXSTART is not set
+# CONFIG_NXSTART_EXTERNINIT is not set
+CONFIG_NXSTART_SERVERPRIO=110
+CONFIG_NXSTART_SERVERSTACK=2048
+CONFIG_NXSTART_DISPLAYNO=0
+CONFIG_NXSTART_VPLANE=0
 
 #
 # Memory Management
@@ -1193,11 +1226,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 CONFIG_LIBM=y
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7A_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 CONFIG_LIBC_FLOATINGPOINT=y
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1215,7 +1265,11 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -1230,8 +1284,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1262,34 +1318,23 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
-CONFIG_EXAMPLES_BUTTONS=y
-CONFIG_EXAMPLES_BUTTONS_MIN=0
-CONFIG_EXAMPLES_BUTTONS_MAX=0
-CONFIG_EXAMPLES_IRQBUTTONS_MIN=0
-CONFIG_EXAMPLES_IRQBUTTONS_MAX=0
-CONFIG_EXAMPLES_BUTTONS_NAME0="PB_USER"
-CONFIG_EXAMPLES_BUTTONS_NAME1="Button 1"
-CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2"
-CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3"
-CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4"
-CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5"
-CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6"
-CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1299,28 +1344,27 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RANDOM is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1329,12 +1373,11 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
 #
@@ -1359,8 +1402,9 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1374,21 +1418,22 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1441,13 +1486,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1465,11 +1510,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -1505,6 +1553,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 CONFIG_NSH_NETINIT_THREAD=y
 CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568
 CONFIG_NSH_NETINIT_THREAD_PRIORITY=80
@@ -1549,10 +1598,7 @@ CONFIG_NXWIDGETS=y
 #
 # CONFIG_NXWIDGETS_FLICKERFREE is not set
 # CONFIG_NXWIDGETS_EXTERNINIT is not set
-CONFIG_NXWIDGETS_VPLANE=0
 CONFIG_NXWIDGET_SERVERINIT=y
-CONFIG_NXWIDGETS_SERVERPRIO=110
-CONFIG_NXWIDGETS_SERVERSTACK=1596
 CONFIG_NXWIDGETS_CLIENTPRIO=100
 CONFIG_NXWIDGETS_LISTENERPRIO=100
 CONFIG_NXWIDGETS_LISTENERSTACK=1596
@@ -1562,6 +1608,7 @@ CONFIG_NXWIDGETS_LISTENERSTACK=1596
 # NXWidget Configuration
 #
 CONFIG_NXWIDGETS_BPP=16
+# CONFIG_NXWIDGETS_GREYSCALE is not set
 CONFIG_NXWIDGETS_SIZEOFCHAR=1
 
 #
@@ -1646,7 +1693,7 @@ CONFIG_NXWM_TOOLBAR_FONTID=6
 CONFIG_NXWM_STARTWINDOW_VSPACING=8
 CONFIG_NXWM_STARTWINDOW_HSPACING=8
 # CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set
-CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm"
+CONFIG_NXWM_STARTWINDOW_MQNAME="nxwm"
 CONFIG_NXWM_STARTWINDOW_MXMSGS=32
 CONFIG_NXWM_STARTWINDOW_MXMPRIO=42
 CONFIG_NXWM_STARTWINDOW_PRIO=100
@@ -1765,11 +1812,11 @@ CONFIG_NXWM_MEDIAPLAYER_MINVOLUMEHEIGHT=6
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=0
 CONFIG_I2CTOOL_MAXBUS=0
@@ -1777,7 +1824,7 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=100000
-# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 CONFIG_SYSTEM_NXPLAYER=y
 CONFIG_NXPLAYER_PLAYTHREAD_STACKSIZE=1500
@@ -1797,6 +1844,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sama5d4-ek/ramtest/Make.defs b/configs/sama5d4-ek/ramtest/Make.defs
index bc78ca4a8f3943c0bf45c5ba52f3ad4bfea0ccbe..84c2493261524a7911af815521f8c112d8621991 100644
--- a/configs/sama5d4-ek/ramtest/Make.defs
+++ b/configs/sama5d4-ek/ramtest/Make.defs
@@ -80,7 +80,7 @@ endif
 
 ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sama5d4-ek/ramtest/defconfig b/configs/sama5d4-ek/ramtest/defconfig
index 4490b66233ce431817691fca9461dac42622a615..16e74a0ac5a2d459bd684cf1c01c64dc45d7bce5 100644
--- a/configs/sama5d4-ek/ramtest/defconfig
+++ b/configs/sama5d4-ek/ramtest/defconfig
@@ -46,10 +46,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,10 +76,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +98,7 @@ CONFIG_ARCH_CHIP_SAMA5=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -119,9 +120,13 @@ CONFIG_ARCH_CORTEXA5=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-a"
 CONFIG_ARCH_CHIP="sama5"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 CONFIG_ARCH_FPU=y
+CONFIG_ARCH_HAVE_TRUSTZONE=y
+CONFIG_ARCH_TRUSTZONE_SECURE=y
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 CONFIG_ARCH_LOWVECTORS=y
@@ -131,6 +136,8 @@ CONFIG_ARCH_LOWVECTORS=y
 # ARMv7-A Configuration Options
 #
 # CONFIG_ARMV7A_HAVE_GICv2 is not set
+# CONFIG_ARMV7A_HAVE_GTM is not set
+# CONFIG_ARMV7A_HAVE_PTM is not set
 CONFIG_ARMV7A_HAVE_L2CC=y
 CONFIG_ARMV7A_HAVE_L2CC_PL310=y
 
@@ -186,7 +193,6 @@ CONFIG_SAMA5_HAVE_SPI2=y
 # CONFIG_SAMA5_HAVE_TC is not set
 CONFIG_SAMA5_HAVE_TC1=y
 CONFIG_SAMA5_HAVE_TC2=y
-CONFIG_ARCH_HAVE_TRUSTZONE=y
 CONFIG_SAMA5_HAVE_TWI3=y
 CONFIG_SAMA5_HAVE_VDEC=y
 # CONFIG_SAMA5_FLEXCOM is not set
@@ -521,7 +527,12 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -529,6 +540,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -537,9 +549,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -563,10 +576,6 @@ CONFIG_USART3_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -593,15 +602,18 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -654,12 +666,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -724,13 +730,15 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -774,10 +782,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -787,35 +795,33 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -839,8 +845,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -851,6 +857,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -961,12 +968,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 CONFIG_SYSTEM_RAMTEST=y
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -974,6 +981,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sama5d4-ek/src/at25_main.c b/configs/sama5d4-ek/src/at25_main.c
index 078ee1725d10f762a35ac4d9a5e0ba4dd874286c..699f613b10e364c0b966560f4d63b0c627a084ed 100644
--- a/configs/sama5d4-ek/src/at25_main.c
+++ b/configs/sama5d4-ek/src/at25_main.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sama5d4-ek/src/at25_main.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -47,10 +47,10 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
-#include 
 
 #include "sama5d4-ek.h"
 
diff --git a/configs/sama5d4-ek/src/dram_main.c b/configs/sama5d4-ek/src/dram_main.c
index a36b646646425620fcf3f285a979d428e514556e..e84a9ddcff5762926c0e6e0edba2c6cab1aa7180 100644
--- a/configs/sama5d4-ek/src/dram_main.c
+++ b/configs/sama5d4-ek/src/dram_main.c
@@ -41,9 +41,9 @@
 
 #include 
 #include 
+#include 
 
 #include 
-#include 
 
 #include "up_arch.h"
 #include "mmu.h"
diff --git a/configs/sama5d4-ek/src/sam_adc.c b/configs/sama5d4-ek/src/sam_adc.c
index 13346a91b90f2ce4d65e8d9f68494a9ad2d1c7f4..031eb6673d503a4c972ef5371e69d3a66999b412 100644
--- a/configs/sama5d4-ek/src/sam_adc.c
+++ b/configs/sama5d4-ek/src/sam_adc.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/sama5d4-ek/src/sam_adc.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -50,32 +50,19 @@
 
 #ifdef CONFIG_ADC
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/************************************************************************************
- * Private Data
- ************************************************************************************/
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_adc_setup
+ * Name: sam_adc_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/adc.
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
-int board_adc_setup(void)
+int sam_adc_setup(void)
 {
 #ifdef CONFIG_SAMA5_ADC
   static bool initialized = false;
@@ -91,7 +78,7 @@ int board_adc_setup(void)
       adc = sam_adc_initialize();
       if (adc == NULL)
         {
-          adbg("ERROR: Failed to get ADC interface\n");
+          aerr("ERROR: Failed to get ADC interface\n");
           return -ENODEV;
         }
 
@@ -100,7 +87,7 @@ int board_adc_setup(void)
       ret = adc_register("/dev/adc0", adc);
       if (ret < 0)
         {
-          adbg("adc_register failed: %d\n", ret);
+          aerr("ERROR: adc_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/sama5d4-ek/src/sam_at25.c b/configs/sama5d4-ek/src/sam_at25.c
index f2a4c4d1d83f8c139f8a4564d5dc8cfc8d119074..d2d8824b9a9c006b82e7eb0a5229cbb1f5e66a6e 100644
--- a/configs/sama5d4-ek/src/sam_at25.c
+++ b/configs/sama5d4-ek/src/sam_at25.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * config/sama5d4-ek/src/sam_at25.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -46,10 +46,10 @@
 #include 
 #include 
 
-#include 
 #include 
 #include 
 #include 
+#include 
 
 #include "sam_spi.h"
 #include "sama5d4-ek.h"
@@ -92,7 +92,7 @@ int sam_at25_automount(int minor)
       spi = sam_spibus_initialize(AT25_PORT);
       if (!spi)
         {
-          fdbg("ERROR: Failed to initialize SPI port %d\n", AT25_PORT);
+          ferr("ERROR: Failed to initialize SPI port %d\n", AT25_PORT);
           return -ENODEV;
         }
 
@@ -101,7 +101,7 @@ int sam_at25_automount(int minor)
       mtd = at25_initialize(spi);
       if (!mtd)
         {
-          fdbg("ERROR: Failed to bind SPI port %d to the AT25 FLASH driver\n");
+          ferr("ERROR: Failed to bind SPI port %d to the AT25 FLASH driver\n");
           return -ENODEV;
         }
 
@@ -113,7 +113,7 @@ int sam_at25_automount(int minor)
       ret = ftl_initialize(minor, mtd);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to initialize the FTL layer: %d\n", ret);
+          ferr("ERROR: Failed to initialize the FTL layer: %d\n", ret);
           return ret;
         }
 
@@ -123,7 +123,7 @@ int sam_at25_automount(int minor)
       ret = ftl_initialize(minor, mtd);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to initialize the FTL layer: %d\n", ret);
+          ferr("ERROR: Failed to initialize the FTL layer: %d\n", ret);
           return ret;
         }
 
@@ -137,7 +137,7 @@ int sam_at25_automount(int minor)
       ret = bchdev_register(blockdev, chardev, false);
       if (ret < 0)
         {
-          fdbg("ERROR: bchdev_register %s failed: %d\n", chardev, ret);
+          ferr("ERROR: bchdev_register %s failed: %d\n", chardev, ret);
           return ret;
         }
 
@@ -147,7 +147,7 @@ int sam_at25_automount(int minor)
       ret = nxffs_initialize(mtd);
       if (ret < 0)
         {
-          fdbg("ERROR: NXFFS initialization failed: %d\n", ret);
+          ferr("ERROR: NXFFS initialization failed: %d\n", ret);
           return ret;
         }
 
@@ -156,7 +156,7 @@ int sam_at25_automount(int minor)
       ret = mount(NULL, "/mnt/at25", "nxffs", 0, NULL);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
+          ferr("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
           return ret;
         }
 
diff --git a/configs/sama5d4-ek/src/sam_audio_null.c b/configs/sama5d4-ek/src/sam_audio_null.c
index 654fea6011efa0944e08796924cba7f016d5097e..2777298deb64198aa53bcafb793c00544eb8511c 100644
--- a/configs/sama5d4-ek/src/sam_audio_null.c
+++ b/configs/sama5d4-ek/src/sam_audio_null.c
@@ -100,7 +100,7 @@ int sam_audio_null_initialize(int minor)
   char devname[12];
   int ret;
 
-  auddbg("minor %d\n", minor);
+  audinfo("minor %d\n", minor);
   DEBUGASSERT(minor >= 0 && minor <= 25);
 
   /* Have we already initialized?  Since we never uninitialize we must prevent
@@ -117,7 +117,7 @@ int sam_audio_null_initialize(int minor)
       nullaudio = audio_null_initialize();
       if (!nullaudio)
         {
-          auddbg("Failed to get the NULL audio interface\n");
+          auderr("ERROR: Failed to get the NULL audio interface\n");
           ret = -ENODEV;
           goto errout;
         }
@@ -130,7 +130,7 @@ int sam_audio_null_initialize(int minor)
       pcm = pcm_decode_initialize(nullaudio);
       if (!pcm)
         {
-          auddbg("ERROR: Failed create the PCM decoder\n");
+          auderr("ERROR: Failed create the PCM decoder\n");
           ret = -ENODEV;
           goto errout_with_nullaudio;
         }
@@ -144,7 +144,7 @@ int sam_audio_null_initialize(int minor)
       ret = audio_register(devname, pcm);
       if (ret < 0)
         {
-          auddbg("ERROR: Failed to register /dev/%s device: %d\n", devname, ret);
+          auderr("ERROR: Failed to register /dev/%s device: %d\n", devname, ret);
           goto errout_with_pcm;
         }
 
diff --git a/configs/sama5d4-ek/src/sam_autoleds.c b/configs/sama5d4-ek/src/sam_autoleds.c
index 178000a3cc5514bf102053dcb49e9c9277cee2ee..62e930dfb822d3e9ae4fa1b93b5360176b2fe055 100644
--- a/configs/sama5d4-ek/src/sam_autoleds.c
+++ b/configs/sama5d4-ek/src/sam_autoleds.c
@@ -92,30 +92,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/sama5d4-ek/src/sam_automount.c b/configs/sama5d4-ek/src/sam_automount.c
index e4890687cba27883449264a164278d393ecfc7ad..b838e693d97098eeaa8dd69dff0af45416b222ef 100644
--- a/configs/sama5d4-ek/src/sam_automount.c
+++ b/configs/sama5d4-ek/src/sam_automount.c
@@ -285,7 +285,7 @@ void sam_automount_initialize(void)
 {
   FAR void *handle;
 
-  fvdbg("Initializing automounter(s)\n");
+  finfo("Initializing automounter(s)\n");
 
 #ifdef CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT
   /* Initialize the HSMCI0 auto-mounter */
@@ -293,7 +293,7 @@ void sam_automount_initialize(void)
   handle = automount_initialize(&g_hsmci0config.lower);
   if (!handle)
     {
-      fdbg("ERROR: Failed to initialize auto-mounter for HSMCI0\n");
+      ferr("ERROR: Failed to initialize auto-mounter for HSMCI0\n");
     }
 #endif
 
@@ -303,7 +303,7 @@ void sam_automount_initialize(void)
   handle = automount_initialize(&g_hsmci1config.lower);
   if (!handle)
     {
-      fdbg("ERROR: Failed to initialize auto-mounter for HSMCI1\n");
+      ferr("ERROR: Failed to initialize auto-mounter for HSMCI1\n");
     }
 #endif
 }
@@ -363,7 +363,7 @@ void sam_automount_event(int slotno, bool inserted)
   else
 #endif
     {
-      fdbg("ERROR: Unsupported HSCMI%d\n", slotno);
+      ferr("ERROR: Unsupported HSCMI%d\n", slotno);
       return;
     }
 
diff --git a/configs/sama5d4-ek/src/sam_bringup.c b/configs/sama5d4-ek/src/sam_bringup.c
index 2c0ca5cc8da7386a91d83da6981041993fb4ec6e..5669b17fc78fcefcbf4ef00a9e4ee4f55a080c17 100644
--- a/configs/sama5d4-ek/src/sam_bringup.c
+++ b/configs/sama5d4-ek/src/sam_bringup.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * config/sama5d4-ek/src/sam_bringup.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -46,11 +46,11 @@
 #include 
 #include 
 
-#ifdef CONFIG_SYSTEM_USBMONITOR
-#  include 
+#ifdef CONFIG_USBMONITOR
+#  include 
 #endif
 
-#include 
+#include 
 #include 
 #include 
 
@@ -69,14 +69,6 @@
   (((n)+CONFIG_SAMA5D4EK_ROMFS_ROMDISK_SECTSIZE-1) / \
    CONFIG_SAMA5D4EK_ROMFS_ROMDISK_SECTSIZE)
 
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_BOARD_INITIALIZE
-#  define SYSLOG lldbg
-#else
-#  define SYSLOG dbg
-#endif
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -98,14 +90,14 @@ static void sam_i2c_register(int bus)
   i2c = sam_i2cbus_initialize(bus);
   if (i2c == NULL)
     {
-      dbg("ERROR: Failed to get I2C%d interface\n", bus);
+      _err("ERROR: Failed to get I2C%d interface\n", bus);
     }
   else
     {
       ret = i2c_register(i2c, bus);
       if (ret < 0)
         {
-          dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
+          _err("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
           sam_i2cbus_uninitialize(i2c);
         }
     }
@@ -154,12 +146,7 @@ static void sam_i2ctool(void)
 
 int sam_bringup(void)
 {
-#if defined(HAVE_NAND) || defined(HAVE_AT25) || defined(HAVE_HSMCI)  || \
-    defined(HAVE_USBHOST) || defined(HAVE_USBMONITOR) || defined(HAVE_WM8904) || \
-    defined(HAVE_AUTOMOUNTER) || defined(HAVE_ELF) || defined(HAVE_ROMFS) || \
-    defined(CONFIG_FS_PROCFS)
   int ret;
-#endif
 
   /* Register I2C drivers on behalf of the I2C tool */
 
@@ -171,7 +158,7 @@ int sam_bringup(void)
   ret = sam_nand_automount(NAND_MINOR);
   if (ret < 0)
     {
-      SYSLOG("ERROR: sam_nand_automount failed: %d\n", ret);
+      _err("ERROR: sam_nand_automount failed: %d\n", ret);
     }
 #endif
 
@@ -181,7 +168,7 @@ int sam_bringup(void)
   ret = sam_at25_automount(AT25_MINOR);
   if (ret < 0)
     {
-      SYSLOG("ERROR: sam_at25_automount failed: %d\n", ret);
+      _err("ERROR: sam_at25_automount failed: %d\n", ret);
     }
 #endif
 
@@ -192,8 +179,8 @@ int sam_bringup(void)
   ret = sam_hsmci_initialize(HSMCI0_SLOTNO, HSMCI0_MINOR);
   if (ret < 0)
     {
-      SYSLOG("ERROR: sam_hsmci_initialize(%d,%d) failed: %d\n",
-             HSMCI0_SLOTNO, HSMCI0_MINOR, ret);
+      _err("ERROR: sam_hsmci_initialize(%d,%d) failed: %d\n",
+           HSMCI0_SLOTNO, HSMCI0_MINOR, ret);
     }
 
 #ifdef CONFIG_SAMA5D4EK_HSMCI0_MOUNT
@@ -209,8 +196,8 @@ int sam_bringup(void)
 
       if (ret < 0)
         {
-          SYSLOG("ERROR: Failed to mount %s: %d\n",
-                 CONFIG_SAMA5D4EK_HSMCI0_MOUNT_MOUNTPOINT, errno);
+          _err("ERROR: Failed to mount %s: %d\n",
+               CONFIG_SAMA5D4EK_HSMCI0_MOUNT_MOUNTPOINT, errno);
         }
     }
 #endif
@@ -222,8 +209,8 @@ int sam_bringup(void)
   ret = sam_hsmci_initialize(HSMCI1_SLOTNO, HSMCI1_MINOR);
   if (ret < 0)
     {
-      SYSLOG("ERROR: sam_hsmci_initialize(%d,%d) failed: %d\n",
-             HSMCI1_SLOTNO, HSMCI1_MINOR, ret);
+      _err("ERROR: sam_hsmci_initialize(%d,%d) failed: %d\n",
+           HSMCI1_SLOTNO, HSMCI1_MINOR, ret);
     }
 
 #ifdef CONFIG_SAMA5D4EK_HSMCI1_MOUNT
@@ -239,8 +226,8 @@ int sam_bringup(void)
 
       if (ret < 0)
         {
-          SYSLOG("ERROR: Failed to mount %s: %d\n",
-                 CONFIG_SAMA5D4EK_HSMCI1_MOUNT_MOUNTPOINT, errno);
+          _err("ERROR: Failed to mount %s: %d\n",
+               CONFIG_SAMA5D4EK_HSMCI1_MOUNT_MOUNTPOINT, errno);
         }
     }
 #endif
@@ -261,7 +248,7 @@ int sam_bringup(void)
                          CONFIG_SAMA5D4EK_ROMFS_ROMDISK_SECTSIZE);
   if (ret < 0)
     {
-      SYSLOG("ERROR: romdisk_register failed: %d\n", -ret);
+      _err("ERROR: romdisk_register failed: %d\n", -ret);
     }
   else
     {
@@ -272,9 +259,9 @@ int sam_bringup(void)
                   "romfs", MS_RDONLY, NULL);
       if (ret < 0)
         {
-          SYSLOG("ERROR: mount(%s,%s,romfs) failed: %d\n",
-                 CONFIG_SAMA5D4EK_ROMFS_ROMDISK_DEVNAME,
-                 CONFIG_SAMA5D4EK_ROMFS_MOUNT_MOUNTPOINT, errno);
+          _err("ERROR: mount(%s,%s,romfs) failed: %d\n",
+               CONFIG_SAMA5D4EK_ROMFS_ROMDISK_DEVNAME,
+               CONFIG_SAMA5D4EK_ROMFS_MOUNT_MOUNTPOINT, errno);
         }
     }
 #endif
@@ -287,17 +274,37 @@ int sam_bringup(void)
   ret = sam_usbhost_initialize();
   if (ret != OK)
     {
-      SYSLOG("ERROR: Failed to initialize USB host: %d\n", ret);
+      _err("ERROR: Failed to initialize USB host: %d\n", ret);
     }
 #endif
 
 #ifdef HAVE_USBMONITOR
   /* Start the USB Monitor */
 
-  ret = usbmonitor_start(0, NULL);
+  ret = usbmonitor_start();
   if (ret != OK)
     {
-      SYSLOG("ERROR: Failed to start the USB monitor: %d\n", ret);
+      _err("ERROR: Failed to start the USB monitor: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device. */
+
+  ret = sam_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: sam_pwm_setup() failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_ADC
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = sam_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: sam_adc_setup failed: %d\n", ret);
     }
 #endif
 
@@ -307,7 +314,7 @@ int sam_bringup(void)
   ret = sam_wm8904_initialize(0);
   if (ret != OK)
     {
-      SYSLOG("ERROR: Failed to initialize WM8904 audio: %d\n", ret);
+      _err("ERROR: Failed to initialize WM8904 audio: %d\n", ret);
     }
 #endif
 
@@ -317,18 +324,18 @@ int sam_bringup(void)
   ret = sam_audio_null_initialize(0);
   if (ret != OK)
     {
-      SYSLOG("ERROR: Failed to initialize the NULL audio device: %d\n", ret);
+      _err("ERROR: Failed to initialize the NULL audio device: %d\n", ret);
     }
 #endif
 
 #ifdef HAVE_ELF
   /* Initialize the ELF binary loader */
 
-  SYSLOG("Initializing the ELF binary loader\n");
+  _err("Initializing the ELF binary loader\n");
   ret = elf_initialize();
   if (ret < 0)
     {
-      SYSLOG("ERROR: Initialization of the ELF loader failed: %d\n", ret);
+      _err("ERROR: Initialization of the ELF loader failed: %d\n", ret);
     }
 #endif
 
@@ -338,8 +345,8 @@ int sam_bringup(void)
   ret = mount(NULL, SAMA5_PROCFS_MOUNTPOINT, "procfs", 0, NULL);
   if (ret < 0)
     {
-      SYSLOG("ERROR: Failed to mount procfs at %s: %d\n",
-             SAMA5_PROCFS_MOUNTPOINT, ret);
+      _err("ERROR: Failed to mount procfs at %s: %d\n",
+           SAMA5_PROCFS_MOUNTPOINT, ret);
     }
 #endif
 
@@ -348,5 +355,6 @@ int sam_bringup(void)
    * capabilities.
    */
 
+  UNUSED(ret);
   return OK;
 }
diff --git a/configs/sama5d4-ek/src/sam_buttons.c b/configs/sama5d4-ek/src/sam_buttons.c
index 52fc7af11b1979ff6ed908275736052995ed1ce4..5696d96de5b4ebadf16a220c97e2f5687e889000 100644
--- a/configs/sama5d4-ek/src/sam_buttons.c
+++ b/configs/sama5d4-ek/src/sam_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sama5d4-ek/src/sam_buttons.c
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -51,6 +51,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -64,22 +65,6 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-#if defined(CONFIG_SAMA5_PIOE_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-static xcpt_t g_irquser1;
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -122,8 +107,7 @@ uint8_t board_buttons(void)
  * Description:
  *   This function may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is one
- *   of the BUTTON* definitions provided above. The previous interrupt
- *   handler address is returned (so that it may restored, if so desired).
+ *   of the BUTTON* definitions provided above.
  *
  * Configuration Notes:
  *   Configuration CONFIG_SAMA5_PIO_IRQ must be selected to enable the
@@ -133,9 +117,9 @@ uint8_t board_buttons(void)
  ****************************************************************************/
 
 #if defined(CONFIG_SAMA5_PIOE_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   if (id == BUTTON_USER)
     {
@@ -147,11 +131,6 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
 
       flags = enter_critical_section();
 
-      /* Get the old button interrupt handler and save the new one */
-
-      oldhandler = g_irquser1;
-      g_irquser1 = irqhandler;
-
       /* Are we attaching or detaching? */
 
       if (irqhandler != NULL)
@@ -159,7 +138,7 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
           /* Configure the interrupt */
 
           sam_pioirq(PIO_BTN_USER);
-          (void)irq_attach(IRQ_BTN_USER, irqhandler);
+          (void)irq_attach(IRQ_BTN_USER, irqhandler, arg);
           sam_pioirqenable(IRQ_BTN_USER);
         }
       else
@@ -171,11 +150,10 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
         }
 
       leave_critical_section(flags);
+      ret = OK;
     }
 
-  /* Return the old button handler (so that it can be restored) */
-
-  return oldhandler;
+  return ret;
 }
 #endif
 
diff --git a/configs/sama5d4-ek/src/sam_ethernet.c b/configs/sama5d4-ek/src/sam_ethernet.c
index 48edbbe5f8a576b110b017d975cf59dc0e3ab645..c491ec9dd10b3a15c506d7b0d505713951b3d969 100644
--- a/configs/sama5d4-ek/src/sam_ethernet.c
+++ b/configs/sama5d4-ek/src/sam_ethernet.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/sama5d4-ek/src/sam_ethernet.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,14 +42,15 @@
 /* Force verbose debug on in this file only to support unit-level testing. */
 
 #ifdef CONFIG_NETDEV_PHY_DEBUG
-#  undef  CONFIG_DEBUG_VERBOSE
-#  define CONFIG_DEBUG_VERBOSE 1
+#  undef  CONFIG_DEBUG_INFO
+#  define CONFIG_DEBUG_INFO 1
 #  undef  CONFIG_DEBUG_NET
 #  define CONFIG_DEBUG_NET 1
 #endif
 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -84,24 +85,13 @@
  */
 
 #ifdef CONFIG_NETDEV_PHY_DEBUG
-#  define phydbg    dbg
-#  define phylldbg  lldbg
+#  define phyerr    _err
+#  define phywarn   _warn
+#  define phyinfo   _info
 #else
-#  define phydbg(x...)
-#  define phylldbg(x...)
-#endif
-
-/************************************************************************************
- * Private Data
- ************************************************************************************/
-
-#ifdef CONFIG_SAMA5_PIOE_IRQ
-#ifdef CONFIG_SAMA5_EMAC0
-static xcpt_t g_emac0_handler;
-#endif
-#ifdef CONFIG_SAMA5_EMAC1
-static xcpt_t g_emac1_handler;
-#endif
+#  define phyerr(x...)
+#  define phywarn(x...)
+#  define phyinfo(x...)
 #endif
 
 /************************************************************************************
@@ -116,7 +106,7 @@ static xcpt_t g_emac1_handler;
 #ifdef CONFIG_SAMA5_EMAC0
 static void sam_emac0_phy_enable(bool enable)
 {
-  phydbg("IRQ%d: enable=%d\n", IRQ_INT_ETH0, enable);
+  phyinfo("IRQ%d: enable=%d\n", IRQ_INT_ETH0, enable);
   if (enable)
     {
       sam_pioirqenable(IRQ_INT_ETH0);
@@ -132,7 +122,7 @@ static void sam_emac0_phy_enable(bool enable)
 #ifdef CONFIG_SAMA5_EMAC1
 static void sam_emac1_phy_enable(bool enable)
 {
-  phydbg("IRQ%d: enable=%d\n", IRQ_INT_ETH1, enable);
+  phyinfo("IRQ%d: enable=%d\n", IRQ_INT_ETH1, enable);
   if (enable)
     {
       sam_pioirqenable(IRQ_INT_ETH1);
@@ -160,12 +150,12 @@ static void sam_emac1_phy_enable(bool enable)
 void weak_function sam_netinitialize(void)
 {
 #ifdef CONFIG_SAMA5_EMAC0
-  phydbg("Configuring %08x\n", PIO_INT_ETH0);
+  phyinfo("Configuring %08x\n", PIO_INT_ETH0);
   sam_configpio(PIO_INT_ETH0);
 #endif
 
 #ifdef CONFIG_SAMA5_EMAC1
-  phydbg("Configuring %08x\n", PIO_INT_ETH1);
+  phyinfo("Configuring %08x\n", PIO_INT_ETH1);
   sam_configpio(PIO_INT_ETH1);
 #endif
 }
@@ -222,42 +212,39 @@ void weak_function sam_netinitialize(void)
  *             asserts an interrupt.  Must reside in OS space, but can
  *             signal tasks in user space.  A value of NULL can be passed
  *             in order to detach and disable the PHY interrupt.
+ *   arg     - The argument that will accompany the interrupt
  *   enable  - A function pointer that be unsed to enable or disable the
  *             PHY interrupt.
  *
  * Returned Value:
- *   The previous PHY interrupt handler address is returned.  This allows you
- *   to temporarily replace an interrupt handler, then restore the original
- *   interrupt handler.  NULL is returned if there is was not handler in
- *   place when the call was made.
+ *   Zero (OK) returned on success; a negated errno value is returned on
+ *   failure.
  *
  ****************************************************************************/
 
 #ifdef CONFIG_SAMA5_PIOE_IRQ
-xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
+int arch_phy_irq(FAR const char *intf, xcpt_t handler, void *arg,
+                 phy_enable_t *enable)
 {
   irqstate_t flags;
-  xcpt_t *phandler;
-  xcpt_t oldhandler;
   pio_pinset_t pinset;
   phy_enable_t enabler;
   int irq;
 
   DEBUGASSERT(intf);
 
-  nvdbg("%s: handler=%p\n", intf, handler);
+  ninfo("%s: handler=%p\n", intf, handler);
 #ifdef CONFIG_SAMA5_EMAC0
-  phydbg("EMAC0: devname=%s\n", SAMA5_EMAC0_DEVNAME);
+  phyinfo("EMAC0: devname=%s\n", SAMA5_EMAC0_DEVNAME);
 #endif
 #ifdef CONFIG_SAMA5_EMAC1
-  phydbg("EMAC1: devname=%s\n", SAMA5_EMAC1_DEVNAME);
+  phyinfo("EMAC1: devname=%s\n", SAMA5_EMAC1_DEVNAME);
 #endif
 
 #ifdef CONFIG_SAMA5_EMAC0
   if (strcmp(intf, SAMA5_EMAC0_DEVNAME) == 0)
     {
-      phydbg("Select EMAC0\n");
-      phandler = &g_emac0_handler;
+      phyinfo("Select EMAC0\n");
       pinset   = PIO_INT_ETH0;
       irq      = IRQ_INT_ETH0;
       enabler  = sam_emac0_phy_enable;
@@ -267,8 +254,7 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
 #ifdef CONFIG_SAMA5_EMAC1
   if (strcmp(intf, SAMA5_EMAC1_DEVNAME) == 0)
     {
-      phydbg("Select EMAC1\n");
-      phandler = &g_emac1_handler;
+      phyinfo("Select EMAC1\n");
       pinset   = PIO_INT_ETH1;
       irq      = IRQ_INT_ETH1;
       enabler  = sam_emac1_phy_enable;
@@ -276,8 +262,8 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
   else
 #endif
     {
-      ndbg("Unsupported interface: %s\n", intf);
-      return NULL;
+      nerr("ERROR: Unsupported interface: %s\n", intf);
+      return -EINVAL;
     }
 
   /* Disable interrupts until we are done.  This guarantees that the
@@ -286,24 +272,19 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
 
   flags = enter_critical_section();
 
-  /* Get the old interrupt handler and save the new one */
-
-  oldhandler = *phandler;
-  *phandler  = handler;
-
   /* Configure the interrupt */
 
   if (handler)
     {
-      phydbg("Configure pin: %08x\n", pinset);
+      phyinfo("Configure pin: %08x\n", pinset);
       sam_pioirq(pinset);
 
-      phydbg("Attach IRQ%d\n", irq);
-      (void)irq_attach(irq, handler);
+      phyinfo("Attach IRQ%d\n", irq);
+      (void)irq_attach(irq, handler, arg);
     }
   else
     {
-      phydbg("Detach IRQ%d\n", irq);
+      phyinfo("Detach IRQ%d\n", irq);
       (void)irq_detach(irq);
       enabler = NULL;
     }
@@ -322,7 +303,7 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
   /* Return the old handler (so that it can be restored) */
 
   leave_critical_section(flags);
-  return oldhandler;
+  return OK;
 }
 #endif /* CONFIG_SAMA5_PIOE_IRQ */
 
diff --git a/configs/sama5d4-ek/src/sam_hsmci.c b/configs/sama5d4-ek/src/sam_hsmci.c
index fe74bcf5284196a2b3d3359799a1168c3d4919b6..2f23d9b7983259cfcb4abf5271287d74bce71db0 100644
--- a/configs/sama5d4-ek/src/sam_hsmci.c
+++ b/configs/sama5d4-ek/src/sam_hsmci.c
@@ -124,7 +124,7 @@ struct sam_hsmci_state_s
 /* HSCMI device state */
 
 #ifdef CONFIG_SAMA5_HSMCI0
-static int sam_hsmci0_cardetect(int irq, void *regs);
+static int sam_hsmci0_cardetect(int irq, void *regs, FAR void *arg);
 
 static struct sam_hsmci_state_s g_hsmci0 =
 {
@@ -136,7 +136,7 @@ static struct sam_hsmci_state_s g_hsmci0 =
 #endif
 
 #ifdef CONFIG_SAMA5_HSMCI1
-static int sam_hsmci1_cardetect(int irq, void *regs);
+static int sam_hsmci1_cardetect(int irq, void *regs, FAR void *arg);
 
 static struct sam_hsmci_state_s g_hsmci1 =
 {
@@ -167,7 +167,7 @@ bool sam_cardinserted_internal(struct sam_hsmci_state_s *state)
   /* Get the state of the PIO pin */
 
   inserted = sam_pioread(state->cdcfg);
-  fllvdbg("Slot %d inserted: %s\n", state->slotno, inserted ? "NO" : "YES");
+  finfo("Slot %d inserted: %s\n", state->slotno, inserted ? "NO" : "YES");
   return !inserted;
 }
 
@@ -202,7 +202,7 @@ static int sam_hsmci_cardetect(struct sam_hsmci_state_s *state)
 }
 
 #ifdef CONFIG_SAMA5_HSMCI0
-static int sam_hsmci0_cardetect(int irq, void *regs)
+static int sam_hsmci0_cardetect(int irq, FAR void *regs, FAR void *arg)
 {
   int ret;
 
@@ -224,7 +224,7 @@ static int sam_hsmci0_cardetect(int irq, void *regs)
 #endif
 
 #ifdef CONFIG_SAMA5_HSMCI1
-static int sam_hsmci1_cardetect(int irq, void *regs)
+static int sam_hsmci1_cardetect(int irq, FAR void *regs, FAR void *arg)
 {
   int ret;
 
@@ -300,7 +300,7 @@ int sam_hsmci_initialize(int slotno, int minor)
   state = sam_hsmci_state(slotno);
   if (!state)
     {
-      fdbg("ERROR: No state for slotno %d\n", slotno);
+      ferr("ERROR: No state for slotno %d\n", slotno);
       return -EINVAL;
     }
 
@@ -321,7 +321,7 @@ int sam_hsmci_initialize(int slotno, int minor)
   state->hsmci = sdio_initialize(slotno);
   if (!state->hsmci)
     {
-      fdbg("ERROR: Failed to initialize SDIO slot %d\n",  slotno);
+      ferr("ERROR: Failed to initialize SDIO slot %d\n",  slotno);
       return -ENODEV;
     }
 
@@ -330,14 +330,14 @@ int sam_hsmci_initialize(int slotno, int minor)
   ret = mmcsd_slotinitialize(minor, state->hsmci);
   if (ret != OK)
     {
-      fdbg("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
+      ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
       return ret;
     }
 
   /* Configure card detect interrupts */
 
   sam_pioirq(state->cdcfg);
-  (void)irq_attach(state->irq, state->handler);
+  (void)irq_attach(state->irq, state->handler, NULL);
 
   /* Then inform the HSMCI driver if there is or is not a card in the slot. */
 
@@ -367,7 +367,7 @@ bool sam_cardinserted(int slotno)
   state = sam_hsmci_state(slotno);
   if (!state)
     {
-      fdbg("ERROR: No state for slotno %d\n", slotno);
+      ferr("ERROR: No state for slotno %d\n", slotno);
       return false;
     }
 
diff --git a/configs/sama5d4-ek/src/sam_maxtouch.c b/configs/sama5d4-ek/src/sam_maxtouch.c
index 391e7b0b80faa8d359594a6f4543a855647eb4a2..1511c7a662ca4cc2de6dd77242a8b425c8147676 100644
--- a/configs/sama5d4-ek/src/sam_maxtouch.c
+++ b/configs/sama5d4-ek/src/sam_maxtouch.c
@@ -163,13 +163,13 @@ static int mxt_attach(FAR const struct mxt_lower_s *lower, mxt_handler_t isr,
        * new handler will called via mxt_interrupt() when the interrupt occurs.
        */
 
-      ivdbg("Attaching %p\n", isr);
+      iinfo("Attaching %p\n", isr);
       g_mxtinfo.handler = isr;
       g_mxtinfo.arg = arg;
     }
   else
     {
-      ivdbg("Detaching %p\n", g_mxtinfo.handler);
+      iinfo("Detaching %p\n", g_mxtinfo.handler);
       mxt_enable(lower, false);
       g_mxtinfo.handler = NULL;
       g_mxtinfo.arg = NULL;
@@ -197,7 +197,7 @@ static void mxt_clear(FAR const struct mxt_lower_s *lower)
   /* Does nothing */
 }
 
-static int mxt_interrupt(int irq, FAR void *context)
+static int mxt_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   /* Just forward the interrupt to the maXTouch driver */
 
@@ -242,7 +242,7 @@ int board_tsc_setup(int minor)
   static bool initialized = false;
   int ret;
 
-  idbg("minor %d\n", minor);
+  iinfo("minor %d\n", minor);
   DEBUGASSERT(minor == 0);
 
   /* Have we already initialized?  Since we never uninitialize we must prevent
@@ -262,21 +262,21 @@ int board_tsc_setup(int minor)
       i2c = sam_i2cbus_initialize(MXT_TWI_BUS);
       if (!i2c)
         {
-          idbg("Failed to initialize I2C%d\n", MXT_TWI_BUS);
+          ierr("ERROR: Failed to initialize I2C%d\n", MXT_TWI_BUS);
           return -ENODEV;
         }
 
        /* Configure maXTouch CHG interrupts */
 
       sam_pioirq(PIO_CHG_MXT);
-      (void)irq_attach(IRQ_CHG_MXT, mxt_interrupt);
+      (void)irq_attach(IRQ_CHG_MXT, mxt_interrupt, NULL);
 
       /* Initialize and register the I2C touchscreen device */
 
       ret = mxt_register(i2c, &g_mxtinfo.lower, CONFIG_SAMA5D4EK_MXT_DEVMINOR);
       if (ret < 0)
         {
-          idbg("ERROR: Failed to register touchscreen device\n");
+          ierr("ERROR: Failed to register touchscreen device\n");
           irq_detach(IRQ_CHG_MXT);
           /* sam_i2cbus_uninitialize(i2c); */
           return -ENODEV;
diff --git a/configs/sama5d4-ek/src/sam_nandflash.c b/configs/sama5d4-ek/src/sam_nandflash.c
index 9044526b3bfcdd3ce05ee17ca69e3dd6777e9204..6a5c90db285a11e0624f1290df8dea3595a3902d 100644
--- a/configs/sama5d4-ek/src/sam_nandflash.c
+++ b/configs/sama5d4-ek/src/sam_nandflash.c
@@ -186,7 +186,7 @@ int sam_nand_automount(int minor)
       mtd = sam_nand_initialize(HSMC_CS3);
       if (!mtd)
         {
-          fdbg("ERROR: Failed to create the NAND driver on CS%d\n", HSMC_CS3);
+          ferr("ERROR: Failed to create the NAND driver on CS%d\n", HSMC_CS3);
           return -ENODEV;
         }
 
@@ -196,7 +196,7 @@ int sam_nand_automount(int minor)
       ret = ftl_initialize(NAND_MINOR, mtd);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to initialize the FTL layer: %d\n", ret);
+          ferr("ERROR: Failed to initialize the FTL layer: %d\n", ret);
           return ret;
         }
 
@@ -206,7 +206,7 @@ int sam_nand_automount(int minor)
       ret = nxffs_initialize(mtd);
       if (ret < 0)
         {
-          fdbg("ERROR: NXFFS initialization failed: %d\n", ret);
+          ferr("ERROR: NXFFS initialization failed: %d\n", ret);
           return ret;
         }
 
@@ -215,7 +215,7 @@ int sam_nand_automount(int minor)
       ret = mount(NULL, "/mnt/nand", "nxffs", 0, NULL);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
+          ferr("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
           return ret;
         }
 #endif
diff --git a/configs/sama5d4-ek/src/sam_pmic.c b/configs/sama5d4-ek/src/sam_pmic.c
index 0b6344dbf751ac9c50d3e3ccd23923411e819839..63e6967141419876acdcb5f2c0a83a79eb61971e 100644
--- a/configs/sama5d4-ek/src/sam_pmic.c
+++ b/configs/sama5d4-ek/src/sam_pmic.c
@@ -80,7 +80,7 @@ void sam_pmic_initialize(void)
   i2c = sam_i2cbus_initialize(PMIC_TWI_BUS);
   if (!i2c)
     {
-      dbg("ERROR: Failed to initialize TWI%d\n", PMIC_TWI_BUS);
+      _err("ERROR: Failed to initialize TWI%d\n", PMIC_TWI_BUS);
     }
   else
     {
diff --git a/configs/sama5d4-ek/src/sam_pwm.c b/configs/sama5d4-ek/src/sam_pwm.c
index e15e70c5a0d9a5496e00770f8303e14a40e14a4a..a3ad6760a77740b1dd40481b9772175abdb4a0c1 100644
--- a/configs/sama5d4-ek/src/sam_pwm.c
+++ b/configs/sama5d4-ek/src/sam_pwm.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/sama5d4-ek/src/sam_pwm.c
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -44,7 +44,7 @@
 #include 
 
 #include 
-#include 
+#include 
 
 #include 
 
@@ -107,24 +107,19 @@
 
 #if defined(CONFIG_PWM) && defined(CONFIG_SAMA5_PWM)
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_pwm_setup
+ * Name: sam_pwm_setup
  *
  * Description:
- *   All SAMA5 architectures must provide the following interface to work with
- *   examples/pwm.
+ *   Initialize PWM and register the PWM device.
  *
  ************************************************************************************/
 
-int board_pwm_setup(void)
+int sam_pwm_setup(void)
 {
   static bool initialized = false;
   struct pwm_lowerhalf_s *pwm;
@@ -139,7 +134,7 @@ int board_pwm_setup(void)
       pwm = sam_pwminitialize(CONFIG_SAMA5D4EK_CHANNEL);
       if (!pwm)
         {
-          dbg("Failed to get the SAMA5 PWM lower half\n");
+          _err("ERROR: Failed to get the SAMA5 PWM lower half\n");
           return -ENODEV;
         }
 
@@ -148,7 +143,7 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/pwm0", pwm);
       if (ret < 0)
         {
-          adbg("pwm_register failed: %d\n", ret);
+          aerr("ERROR: pwm_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/sama5d4-ek/src/sam_spi.c b/configs/sama5d4-ek/src/sam_spi.c
index a56c4775071fa51d4d63e923f88848a6ddaebb53..4b24a4b1cefc8a7727ee307d359d0ff5df78c333 100644
--- a/configs/sama5d4-ek/src/sam_spi.c
+++ b/configs/sama5d4-ek/src/sam_spi.c
@@ -55,32 +55,6 @@
 
 #if defined(CONFIG_SAMA5_SPI0) || defined(CONFIG_SAMA5_SPI1)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
diff --git a/configs/sama5d4-ek/src/sam_usb.c b/configs/sama5d4-ek/src/sam_usb.c
index c043e057a938b5854efce844bcd64caa897e47ac..a73c4b384f70883e1fd4fdaef038f87f67228f48 100644
--- a/configs/sama5d4-ek/src/sam_usb.c
+++ b/configs/sama5d4-ek/src/sam_usb.c
@@ -115,13 +115,13 @@ static int usbhost_waiter(struct usbhost_connection_s *dev)
 {
   struct usbhost_hubport_s *hport;
 
-  uvdbg("Running\n");
+  uinfo("Running\n");
   for (;;)
     {
       /* Wait for the device to change state */
 
       DEBUGVERIFY(CONN_WAIT(dev, &hport));
-      uvdbg("%s\n", hport->connected ? "connected" : "disconnected");
+      uinfo("%s\n", hport->connected ? "connected" : "disconnected");
 
       /* Did we just become connected? */
 
@@ -308,7 +308,7 @@ int sam_usbhost_initialize(void)
   ret = usbhost_hub_initialize();
   if (ret < 0)
     {
-      udbg("ERROR: usbhost_hub_initialize failed: %d\n", ret);
+      uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
     }
 #endif
 
@@ -318,7 +318,7 @@ int sam_usbhost_initialize(void)
   ret = usbhost_msc_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the mass storage class: %d\n", ret);
+      uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
     }
 #endif
 
@@ -328,7 +328,7 @@ int sam_usbhost_initialize(void)
   ret = usbhost_cdcacm_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
+      uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
     }
 #endif
 
@@ -338,7 +338,7 @@ int sam_usbhost_initialize(void)
   ret = usbhost_kbdinit();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the KBD class\n");
+      uerr("ERROR: Failed to register the KBD class\n");
     }
 #endif
 
@@ -350,7 +350,7 @@ int sam_usbhost_initialize(void)
   g_ohciconn = sam_ohci_initialize(0);
   if (!g_ohciconn)
     {
-      udbg("ERROR: sam_ohci_initialize failed\n");
+      uerr("ERROR: sam_ohci_initialize failed\n");
       return -ENODEV;
     }
 
@@ -361,7 +361,7 @@ int sam_usbhost_initialize(void)
                     (main_t)ohci_waiter, (FAR char * const *)NULL);
   if (pid < 0)
     {
-      udbg("ERROR: Failed to create ohci_waiter task: %d\n", ret);
+      uerr("ERROR: Failed to create ohci_waiter task: %d\n", ret);
       return -ENODEV;
     }
 #endif
@@ -372,7 +372,7 @@ int sam_usbhost_initialize(void)
   g_ehciconn = sam_ehci_initialize(0);
   if (!g_ehciconn)
     {
-      udbg("ERROR: sam_ehci_initialize failed\n");
+      uerr("ERROR: sam_ehci_initialize failed\n");
       return -ENODEV;
     }
 
@@ -383,7 +383,7 @@ int sam_usbhost_initialize(void)
                     (main_t)ehci_waiter, (FAR char * const *)NULL);
   if (pid < 0)
     {
-      udbg("ERROR: Failed to create ehci_waiter task: %d\n", ret);
+      uerr("ERROR: Failed to create ehci_waiter task: %d\n", ret);
       return -ENODEV;
     }
 #endif
@@ -414,7 +414,7 @@ void sam_usbhost_vbusdrive(int rhport, bool enable)
 {
   pio_pinset_t pinset = 0;
 
-  uvdbg("RHPort%d: enable=%d\n", rhport+1, enable);
+  uinfo("RHPort%d: enable=%d\n", rhport+1, enable);
 
   /* Pick the PIO configuration associated with the selected root hub port */
 
@@ -422,7 +422,7 @@ void sam_usbhost_vbusdrive(int rhport, bool enable)
     {
     case SAM_RHPORT1:
 #ifndef CONFIG_SAMA5_UHPHS_RHPORT1
-      udbg("ERROR: RHPort1 is not available in this configuration\n");
+      uerr("ERROR: RHPort1 is not available in this configuration\n");
       return;
 #else
       pinset = PIO_USBA_VBUS_ENABLE;
@@ -431,7 +431,7 @@ void sam_usbhost_vbusdrive(int rhport, bool enable)
 
     case SAM_RHPORT2:
 #ifndef CONFIG_SAMA5_UHPHS_RHPORT2
-      udbg("ERROR: RHPort2 is not available in this configuration\n");
+      uerr("ERROR: RHPort2 is not available in this configuration\n");
       return;
 #else
       pinset = PIO_USBB_VBUS_ENABLE;
@@ -440,7 +440,7 @@ void sam_usbhost_vbusdrive(int rhport, bool enable)
 
     case SAM_RHPORT3:
 #ifndef CONFIG_SAMA5_UHPHS_RHPORT3
-      udbg("ERROR: RHPort3 is not available in this configuration\n");
+      uerr("ERROR: RHPort3 is not available in this configuration\n");
       return;
 #else
       pinset = PIO_USBC_VBUS_ENABLE;
@@ -448,7 +448,7 @@ void sam_usbhost_vbusdrive(int rhport, bool enable)
 #endif
 
     default:
-      udbg("ERROR: RHPort%d is not supported\n", rhport+1);
+      uerr("ERROR: RHPort%d is not supported\n", rhport+1);
       return;
     }
 
@@ -510,7 +510,7 @@ xcpt_t sam_setup_overcurrent(xcpt_t handler)
   /* Configure the interrupt */
 
   sam_pioirq(PIO_USBBC_VBUS_OVERCURRENT);
-  (void)irq_attach(IRQ_USBBC_VBUS_OVERCURRENT, handler);
+  (void)irq_attach(IRQ_USBBC_VBUS_OVERCURRENT, handler, NULL);
   sam_pioirqenable(IRQ_USBBC_VBUS_OVERCURRENT);
 
   /* Return the old handler (so that it can be restored) */
@@ -539,7 +539,7 @@ xcpt_t sam_setup_overcurrent(xcpt_t handler)
 #ifdef CONFIG_USBDEV
 void sam_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
 #endif
 
diff --git a/configs/sama5d4-ek/src/sam_userleds.c b/configs/sama5d4-ek/src/sam_userleds.c
index ac7fae8d00efe0d6a5b8bca7affde14ca7289162..8e17e839bfecd6923c23de49c89db205dede4349 100644
--- a/configs/sama5d4-ek/src/sam_userleds.c
+++ b/configs/sama5d4-ek/src/sam_userleds.c
@@ -67,22 +67,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/sama5d4-ek/src/sam_wm8904.c b/configs/sama5d4-ek/src/sam_wm8904.c
index de0a2194d5f4f6ec368f0302594cc8137657a4c2..34ded3756d72b149c30b7f856fd296a95b634873 100644
--- a/configs/sama5d4-ek/src/sam_wm8904.c
+++ b/configs/sama5d4-ek/src/sam_wm8904.c
@@ -157,13 +157,13 @@ static int wm8904_attach(FAR const struct wm8904_lower_s *lower,
        * new handler will called via wm8904_interrupt() when the interrupt occurs.
        */
 
-      audvdbg("Attaching %p\n", isr);
+      audinfo("Attaching %p\n", isr);
       g_wm8904info.handler = isr;
       g_wm8904info.arg = arg;
     }
   else
     {
-      audvdbg("Detaching %p\n", g_wm8904info.handler);
+      audinfo("Detaching %p\n", g_wm8904info.handler);
       (void)wm8904_enable(lower, false);
       g_wm8904info.handler = NULL;
       g_wm8904info.arg = NULL;
@@ -187,13 +187,13 @@ static bool wm8904_enable(FAR const struct wm8904_lower_s *lower, bool enable)
 
       if (enable && g_wm8904info.handler)
         {
-          audvdbg("Enabling\n");
+          audinfo("Enabling\n");
           sam_pioirqenable(IRQ_INT_WM8904);
           enabled = true;
         }
       else
         {
-          audvdbg("Disabling\n");
+          audinfo("Disabling\n");
           sam_pioirqdisable(IRQ_INT_WM8904);
           enabled = false;
         }
@@ -204,11 +204,11 @@ static bool wm8904_enable(FAR const struct wm8904_lower_s *lower, bool enable)
   return ret;
 }
 
-static int wm8904_interrupt(int irq, FAR void *context)
+static int wm8904_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   /* Just forward the interrupt to the WM8904 driver */
 
-  audvdbg("handler %p\n", g_wm8904info.handler);
+  audinfo("handler %p\n", g_wm8904info.handler);
   if (g_wm8904info.handler)
     {
       return g_wm8904info.handler(&g_wm8904info.lower, g_wm8904info.arg);
@@ -253,7 +253,7 @@ int sam_wm8904_initialize(int minor)
   char devname[12];
   int ret;
 
-  auddbg("minor %d\n", minor);
+  audinfo("minor %d\n", minor);
   DEBUGASSERT(minor >= 0 && minor <= 25);
 
   /* Have we already initialized?  Since we never uninitialize we must prevent
@@ -273,7 +273,7 @@ int sam_wm8904_initialize(int minor)
       i2c = sam_i2cbus_initialize(WM8904_TWI_BUS);
       if (!i2c)
         {
-          auddbg("Failed to initialize TWI%d\n", WM8904_TWI_BUS);
+          auderr("ERROR: Failed to initialize TWI%d\n", WM8904_TWI_BUS);
           ret = -ENODEV;
           goto errout;
         }
@@ -283,7 +283,7 @@ int sam_wm8904_initialize(int minor)
       i2s = sam_ssc_initialize(WM8904_SSC_BUS);
       if (!i2s)
         {
-          auddbg("Failed to initialize SSC%d\n", WM8904_SSC_BUS);
+          auderr("ERROR: Failed to initialize SSC%d\n", WM8904_SSC_BUS);
           ret = -ENODEV;
           goto errout_with_i2c;
         }
@@ -311,10 +311,10 @@ int sam_wm8904_initialize(int minor)
       /* Configure WM8904 interrupts */
 
       sam_pioirq(PIO_INT_WM8904);
-      ret = irq_attach(IRQ_INT_WM8904, wm8904_interrupt);
+      ret = irq_attach(IRQ_INT_WM8904, wm8904_interrupt, NULL);
       if (ret < 0)
         {
-          auddbg("ERROR: Failed to attach WM8904 interrupt: %d\n", ret);
+          auderr("ERROR: Failed to attach WM8904 interrupt: %d\n", ret);
           goto errout_with_i2s;
         }
 
@@ -325,7 +325,7 @@ int sam_wm8904_initialize(int minor)
       wm8904 = wm8904_initialize(i2c, i2s, &g_wm8904info.lower);
       if (!wm8904)
         {
-          auddbg("Failed to initialize the WM8904\n");
+          auderr("ERROR: Failed to initialize the WM8904\n");
           ret = -ENODEV;
           goto errout_with_irq;
         }
@@ -338,7 +338,7 @@ int sam_wm8904_initialize(int minor)
       pcm = pcm_decode_initialize(wm8904);
       if (!pcm)
         {
-          auddbg("ERROR: Failed create the PCM decoder\n");
+          auderr("ERROR: Failed create the PCM decoder\n");
           ret = -ENODEV;
           goto errout_with_wm8904;
         }
@@ -355,7 +355,7 @@ int sam_wm8904_initialize(int minor)
       ret = audio_register(devname, pcm);
       if (ret < 0)
         {
-          auddbg("ERROR: Failed to register /dev/%s device: %d\n", devname, ret);
+          auderr("ERROR: Failed to register /dev/%s device: %d\n", devname, ret);
           goto errout_with_pcm;
         }
 
diff --git a/configs/sama5d4-ek/src/sama5d4-ek.h b/configs/sama5d4-ek/src/sama5d4-ek.h
index de3dac7cb9daa06cbd5397af01edca79132cb164..4bf4031976f252a7985a67f3bb22128aa9a29d3f 100644
--- a/configs/sama5d4-ek/src/sama5d4-ek.h
+++ b/configs/sama5d4-ek/src/sama5d4-ek.h
@@ -352,7 +352,7 @@
 
 /* Check if we should enable the USB monitor before starting NSH */
 
-#ifndef CONFIG_SYSTEM_USBMONITOR
+#ifndef CONFIG_USBMONITOR
 #  undef HAVE_USBMONITOR
 #endif
 
@@ -1073,6 +1073,30 @@ void weak_function sam_usbinitialize(void);
 int sam_usbhost_initialize(void);
 #endif
 
+/************************************************************************************
+ * Name: sam_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PWM
+int sam_pwm_setup(void);
+#endif
+
+/************************************************************************************
+ * Name: sam_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ADC
+int sam_adc_setup(void);
+#endif
+
 /************************************************************************************
  * Name: sam_netinitialize
  *
diff --git a/configs/samd20-xplained/include/board.h b/configs/samd20-xplained/include/board.h
index 0ca6fab1e8381c9b0a97db1108b1cfb623d6f21a..580b5366a240e7c770f0114b83b74fbd206b0caf 100644
--- a/configs/samd20-xplained/include/board.h
+++ b/configs/samd20-xplained/include/board.h
@@ -44,7 +44,7 @@
 
 #ifndef __ASSEMBLY__
 #  include 
-#  ifdef CONFIG_GPIO_IRQ
+#  ifdef CONFIG_SAMDL_GPIOIRQ
 #    include 
 #  endif
 #endif
diff --git a/configs/samd20-xplained/nsh/Make.defs b/configs/samd20-xplained/nsh/Make.defs
index 22caeba81182e11117b96c812026b2e12edb9345..4ae003c79ba836c607ed0cca9b77c2ecbf1c60e1 100644
--- a/configs/samd20-xplained/nsh/Make.defs
+++ b/configs/samd20-xplained/nsh/Make.defs
@@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/samd20-xplained/nsh/defconfig b/configs/samd20-xplained/nsh/defconfig
index 5df5b16c4d08614111b6541f3d28ca77cbc5a762..98b3e302ad258d5ceeb94e525a0965288db9ab46 100644
--- a/configs/samd20-xplained/nsh/defconfig
+++ b/configs/samd20-xplained/nsh/defconfig
@@ -46,10 +46,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,10 +76,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +98,7 @@ CONFIG_ARCH_CHIP_SAMD=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -119,11 +120,14 @@ CONFIG_ARCH_CORTEXM0=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv6-m"
 CONFIG_ARCH_CHIP="samdl"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 
 #
@@ -450,7 +454,12 @@ CONFIG_DEV_NULL=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -458,6 +467,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -466,9 +476,10 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -492,10 +503,6 @@ CONFIG_USART4_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -536,15 +543,18 @@ CONFIG_USART4_2STOP=0
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -582,12 +592,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -649,12 +653,14 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -698,10 +704,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -711,35 +717,33 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -761,8 +765,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -773,6 +777,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -884,12 +889,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -897,6 +902,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/samd20-xplained/src/sam_autoleds.c b/configs/samd20-xplained/src/sam_autoleds.c
index 7b88426aee7be6c99f855294848fe3804d8a9029..6e6407753c789e59e18eae65d8993d1bb03efca6 100644
--- a/configs/samd20-xplained/src/sam_autoleds.c
+++ b/configs/samd20-xplained/src/sam_autoleds.c
@@ -77,30 +77,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/samd20-xplained/src/sam_buttons.c b/configs/samd20-xplained/src/sam_buttons.c
index 368014f2bce74bc9c74e9846ee4dd60ad904e3f1..88c24aced7ae76f595117b2a068ddf623b2ee5ce 100644
--- a/configs/samd20-xplained/src/sam_buttons.c
+++ b/configs/samd20-xplained/src/sam_buttons.c
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -53,22 +54,6 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-#if defined(CONFIG_PORTA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-static xcpt_t g_irqsw0;
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -111,8 +96,7 @@ uint8_t board_buttons(void)
  * Description:
  *   This function may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is one
- *   of the BUTTON* definitions provided above. The previous interrupt
- *   handler address isreturned (so that it may restored, if so desired).
+ *   of the BUTTON* definitions provided above.
  *
  * Configuration Notes:
  *   Configuration CONFIG_AVR32_PORTIRQ must be selected to enable the
@@ -124,9 +108,9 @@ uint8_t board_buttons(void)
  ****************************************************************************/
 
 #if defined(CONFIG_PORTA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   if (id == BUTTON_SW0)
     {
@@ -138,21 +122,16 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
 
       flags = enter_critical_section();
 
-      /* Get the old button interrupt handler and save the new one */
-
-      oldhandler = *g_irqsw0;
-      *g_irqsw0 = irqhandler;
-
       /* Configure the interrupt */
 
       sam_portirq(IRQ_SW0);
-      (void)irq_attach(IRQ_SW0, irqhandler);
+      (void)irq_attach(IRQ_SW0, irqhandler, arg);
       sam_portirqenable(IRQ_SW0);
+
       leave_critical_section(flags);
+      ret = OK;
     }
 
-  /* Return the old button handler (so that it can be restored) */
-
   return oldhandler;
 }
 #endif
diff --git a/configs/samd20-xplained/src/sam_mmcsd.c b/configs/samd20-xplained/src/sam_mmcsd.c
index b183eda7426e8763c53b05e44d365dfbd5c82beb..1470db2a1aa0b90607f40cbf06e11679f134282c 100644
--- a/configs/samd20-xplained/src/sam_mmcsd.c
+++ b/configs/samd20-xplained/src/sam_mmcsd.c
@@ -95,30 +95,30 @@ int sam_sdinitialize(int port, int minor)
 
   /* Get the SPI driver instance for the SD chip select */
 
-  fvdbg("Initializing SERCOM SPI%d\n", port);
+  finfo("Initializing SERCOM SPI%d\n", port);
 
   spi = sam_spibus_initialize(port);
   if (!spi)
     {
-      fdbg("Failed to initialize SPI%d\n", port);
+      ferr("ERROR: Failed to initialize SPI%d\n", port);
       return -ENODEV;
     }
 
-  fvdbg("Successfully initialized SPI%d\n", port);
+  finfo("Successfully initialized SPI%d\n", port);
 
   /* Bind the SPI device for the chip select to the slot */
 
-  fvdbg("Binding SPI%d to MMC/SD slot %d\n", port, SAMDL_MMCSDSLOTNO);
+  finfo("Binding SPI%d to MMC/SD slot %d\n", port, SAMDL_MMCSDSLOTNO);
 
   ret = mmcsd_spislotinitialize(minor, SAMDL_MMCSDSLOTNO, spi);
   if (ret < 0)
     {
-      fdbg("Failed to bind SPI%d to MMC/SD slot %d: %d\n",
+      ferr("ERROR: Failed to bind SPI%d to MMC/SD slot %d: %d\n",
             port, SAMDL_MMCSDSLOTNO, ret);
       return ret;
     }
 
-  fvdbg("Successfuly bound SPI%d to MMC/SD slot %d\n",
+  finfo("Successfuly bound SPI%d to MMC/SD slot %d\n",
         port, SAMDL_MMCSDSLOTNO);
 
   return OK;
diff --git a/configs/samd20-xplained/src/sam_spi.c b/configs/samd20-xplained/src/sam_spi.c
index 21a9f681fa3d3d4e3325b451803ba75a0a0f9022..3ec3469adbedc148bcd7a7b88e623f35693d0bcb 100644
--- a/configs/samd20-xplained/src/sam_spi.c
+++ b/configs/samd20-xplained/src/sam_spi.c
@@ -53,32 +53,6 @@
 
 #ifdef SAMDL_HAVE_SPI
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/samd20-xplained/src/sam_ug2832hsweg04.c b/configs/samd20-xplained/src/sam_ug2832hsweg04.c
index ee1f37d0f665fe9b5a276863dee038f0dc42c75a..33755c18ad7960a503212d17e7a732f7632a3db7 100644
--- a/configs/samd20-xplained/src/sam_ug2832hsweg04.c
+++ b/configs/samd20-xplained/src/sam_ug2832hsweg04.c
@@ -144,16 +144,6 @@
 #  error "The OLED driver requires CONFIG_SPI_CMDDATA in the configuration"
 #endif
 
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg(format, ...)   dbg(format, ##__VA_ARGS__)
-#  define lcdvdbg(format, ...)  vdbg(format, ##__VA_ARGS__)
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -187,7 +177,7 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
   spi = sam_spibus_initialize(OLED_CSNO);
   if (!spi)
     {
-      lcddbg("Failed to initialize SPI port 1\n");
+      lcderr("ERROR: Failed to initialize SPI port 1\n");
     }
   else
     {
@@ -196,11 +186,11 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
       dev = ssd1306_initialize(spi, devno);
       if (!dev)
         {
-          lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno);
+          lcderr("ERROR: Failed to bind SPI port 1 to OLED %d: %d\n", devno);
         }
      else
         {
-          lcdvdbg("Bound SPI port 1 to OLED %d\n", devno);
+          lcdinfo("Bound SPI port 1 to OLED %d\n", devno);
 
           /* And turn the OLED on */
 
diff --git a/configs/samd20-xplained/src/sam_userleds.c b/configs/samd20-xplained/src/sam_userleds.c
index 985ae1dbba9fbf27946d53e11111a360629c993b..cd98135cf5b78cdff4cfc7c8229039a2dafc4fcf 100644
--- a/configs/samd20-xplained/src/sam_userleds.c
+++ b/configs/samd20-xplained/src/sam_userleds.c
@@ -62,30 +62,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/samd21-xplained/include/board.h b/configs/samd21-xplained/include/board.h
index 7f68514e3d7b4ed52d6636d0f23b53d6a99c019b..40b19e775fcb5f5f995ddc3a6cdde6f442a7a6bf 100644
--- a/configs/samd21-xplained/include/board.h
+++ b/configs/samd21-xplained/include/board.h
@@ -44,7 +44,7 @@
 
 #ifndef __ASSEMBLY__
 #  include 
-#  ifdef CONFIG_GPIO_IRQ
+#  ifdef CONFIG_SAMDL_GPIOIRQ
 #    include 
 #  endif
 #endif
diff --git a/configs/samd21-xplained/nsh/Make.defs b/configs/samd21-xplained/nsh/Make.defs
index 6f5255b34302352614da1ac65d5995d1cb3269f5..75f1af4a00a9fa1435df33e3a01e97c81c3b82d9 100644
--- a/configs/samd21-xplained/nsh/Make.defs
+++ b/configs/samd21-xplained/nsh/Make.defs
@@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/samd21-xplained/nsh/defconfig b/configs/samd21-xplained/nsh/defconfig
index 1610bf7397e203a60a837608e32afbfb08ba4875..a85155de6b9baeceea92129d93d77b5be3e9fb64 100644
--- a/configs/samd21-xplained/nsh/defconfig
+++ b/configs/samd21-xplained/nsh/defconfig
@@ -46,10 +46,11 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,10 +76,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +98,7 @@ CONFIG_ARCH_CHIP_SAMD=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -119,11 +120,14 @@ CONFIG_ARCH_CORTEXM0=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv6-m"
 CONFIG_ARCH_CHIP="samdl"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 
 #
@@ -448,7 +452,12 @@ CONFIG_DEV_NULL=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -456,6 +465,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -464,9 +474,10 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -490,10 +501,6 @@ CONFIG_USART4_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -534,15 +541,18 @@ CONFIG_USART4_2STOP=0
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -580,12 +590,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -647,12 +651,14 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -696,10 +702,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -709,35 +715,33 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -759,8 +763,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -771,6 +775,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -882,12 +887,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -895,6 +900,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/samd21-xplained/src/sam_autoleds.c b/configs/samd21-xplained/src/sam_autoleds.c
index 9a559df4192b50baecb2ed4d1f42a1085933044c..b10ab464fe740c62d2f83208a7b1fe9d9beee289 100644
--- a/configs/samd21-xplained/src/sam_autoleds.c
+++ b/configs/samd21-xplained/src/sam_autoleds.c
@@ -77,30 +77,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/samd21-xplained/src/sam_buttons.c b/configs/samd21-xplained/src/sam_buttons.c
index 280475de6dea6a505253e02429b7ed2e5f888183..aa19ddc008bf18330a406d93148159c64976aef5 100644
--- a/configs/samd21-xplained/src/sam_buttons.c
+++ b/configs/samd21-xplained/src/sam_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/samd21-xplained/src/sam_buttons.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -53,22 +54,6 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-#if defined(CONFIG_PORTA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-static xcpt_t g_irqsw0;
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -111,8 +96,7 @@ uint8_t board_buttons(void)
  * Description:
  *   This function may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is one
- *   of the BUTTON* definitions provided above. The previous interrupt
- *   handler address isreturned (so that it may restored, if so desired).
+ *   of the BUTTON* definitions provided above.
  *
  * Configuration Notes:
  *   Configuration CONFIG_AVR32_PORTIRQ must be selected to enable the
@@ -124,9 +108,9 @@ uint8_t board_buttons(void)
  ****************************************************************************/
 
 #if defined(CONFIG_PORTA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   if (id == BUTTON_SW0)
     {
@@ -138,22 +122,17 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
 
       flags = enter_critical_section();
 
-      /* Get the old button interrupt handler and save the new one */
-
-      oldhandler = *g_irqsw0;
-      *g_irqsw0 = irqhandler;
-
       /* Configure the interrupt */
 
       sam_portirq(IRQ_SW0);
-      (void)irq_attach(IRQ_SW0, irqhandler);
+      (void)irq_attach(IRQ_SW0, irqhandler, arg);
       sam_portirqenable(IRQ_SW0);
+
       leave_critical_section(flags);
+      ret = OK;
     }
 
-  /* Return the old button handler (so that it can be restored) */
-
-  return oldhandler;
+  return ret;
 }
 #endif
 
diff --git a/configs/samd21-xplained/src/sam_mmcsd.c b/configs/samd21-xplained/src/sam_mmcsd.c
index f763f44c0a421a1039d1e40018457460b0428a7d..caa2c32a233e506f76ce047df8c43083c917e14d 100644
--- a/configs/samd21-xplained/src/sam_mmcsd.c
+++ b/configs/samd21-xplained/src/sam_mmcsd.c
@@ -95,30 +95,30 @@ int sam_sdinitialize(int port, int minor)
 
   /* Get the SPI driver instance for the SD chip select */
 
-  fvdbg("Initializing SERCOM SPI%d\n", port);
+  finfo("Initializing SERCOM SPI%d\n", port);
 
   spi = sam_spibus_initialize(port);
   if (!spi)
     {
-      fdbg("Failed to initialize SPI%d\n", port);
+      ferr("ERROR: Failed to initialize SPI%d\n", port);
       return -ENODEV;
     }
 
-  fvdbg("Successfully initialized SPI%d\n", port);
+  finfo("Successfully initialized SPI%d\n", port);
 
   /* Bind the SPI device for the chip select to the slot */
 
-  fvdbg("Binding SPI%d to MMC/SD slot %d\n", port, SAMDL_MMCSDSLOTNO);
+  finfo("Binding SPI%d to MMC/SD slot %d\n", port, SAMDL_MMCSDSLOTNO);
 
   ret = mmcsd_spislotinitialize(minor, SAMDL_MMCSDSLOTNO, spi);
   if (ret < 0)
     {
-      fdbg("Failed to bind SPI%d to MMC/SD slot %d: %d\n",
+      ferr("ERROR: Failed to bind SPI%d to MMC/SD slot %d: %d\n",
             port, SAMDL_MMCSDSLOTNO, ret);
       return ret;
     }
 
-  fvdbg("Successfuly bound SPI%d to MMC/SD slot %d\n",
+  finfo("Successfuly bound SPI%d to MMC/SD slot %d\n",
         port, SAMDL_MMCSDSLOTNO);
 
   return OK;
diff --git a/configs/samd21-xplained/src/sam_spi.c b/configs/samd21-xplained/src/sam_spi.c
index 6352367dcc403d1c42a435a13145f523a05c9168..eaf17020ec056b46621fa6cbc0a8657c35849ccd 100644
--- a/configs/samd21-xplained/src/sam_spi.c
+++ b/configs/samd21-xplained/src/sam_spi.c
@@ -53,32 +53,6 @@
 
 #ifdef SAMDL_HAVE_SPI
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/samd21-xplained/src/sam_ug2832hsweg04.c b/configs/samd21-xplained/src/sam_ug2832hsweg04.c
index b5cfcf26e7ae0db58e27c7acf6526b5a316f417d..3414df2c28f44f35d0b102bd77718f9cb580dbdb 100644
--- a/configs/samd21-xplained/src/sam_ug2832hsweg04.c
+++ b/configs/samd21-xplained/src/sam_ug2832hsweg04.c
@@ -144,16 +144,6 @@
 #  error "The OLED driver requires CONFIG_SPI_CMDDATA in the configuration"
 #endif
 
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg(format, ...)   dbg(format, ##__VA_ARGS__)
-#  define lcdvdbg(format, ...)  vdbg(format, ##__VA_ARGS__)
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -187,7 +177,7 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
   spi = sam_spibus_initialize(OLED_CSNO);
   if (!spi)
     {
-      lcddbg("Failed to initialize SPI port 1\n");
+      lcderr("ERROR: Failed to initialize SPI port 1\n");
     }
   else
     {
@@ -196,11 +186,11 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
       dev = ssd1306_initialize(spi, devno);
       if (!dev)
         {
-          lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno);
+          lcderr("ERROR: Failed to bind SPI port 1 to OLED %d: %d\n", devno);
         }
      else
         {
-          lcdvdbg("Bound SPI port 1 to OLED %d\n", devno);
+          lcdinfo("Bound SPI port 1 to OLED %d\n", devno);
 
           /* And turn the OLED on */
 
diff --git a/configs/samd21-xplained/src/sam_userleds.c b/configs/samd21-xplained/src/sam_userleds.c
index 7b7e87bf7c3d5b60b1d0fc77ea0d7c7554483c42..1d54a192950f87ad15ac10a3e27dc1f9aeaf188b 100644
--- a/configs/samd21-xplained/src/sam_userleds.c
+++ b/configs/samd21-xplained/src/sam_userleds.c
@@ -62,30 +62,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/same70-xplained/README.txt b/configs/same70-xplained/README.txt
index 548e496e0a3336f862c035fb4d45c156ea41fe7c..c95eef6e1bdc28d5488e78af13ba4a5d9988cbc0 100644
--- a/configs/same70-xplained/README.txt
+++ b/configs/same70-xplained/README.txt
@@ -388,7 +388,6 @@ Selecting the GMAC peripheral
 
   Networking Support
     CONFIG_NET=y                         : Enable Neworking
-    CONFIG_NET_NOINTS=y                  : Use the work queue, not interrupts for processing
     CONFIG_NET_SOCKOPTS=y                : Enable socket operations
     CONFIG_NET_ETH_MTU=562               : Maximum packet size (MTU) 1518 is more standard
     CONFIG_NET_ETH_TCP_RECVWNDO=562      : Should be the same as CONFIG_NET_ETH_MTU
@@ -733,10 +732,6 @@ MCAN1 Loopback Test
        CONFIG_SAMV7_MCAN1_TXFIFOQ_SIZE=8       # There are 8 queue elements
        CONFIG_SAMV7_MCAN1_TXEVENTFIFO_SIZE=0   # The event FIFO is not used
 
-    Board Selection
-       CONFIG_LIB_BOARDCTL=y                   # Needed for CAN initialization
-       CONFIG_BOARDCTL_CANINIT=y               # Enabled CAN initialization
-
     Enabling the CAN Loopback Test
     ------------------------------
     Application Configuration -> Examples -> CAN Example
@@ -745,9 +740,9 @@ MCAN1 Loopback Test
     Enabling CAN Debug Output
     -------------------------
     Build Setup -> Debug Options
-      CONFIG_DEBUG=y                           # Enables general debug features
-      CONFIG_DEBUG_VERBOSE=y                   # Enables verbose output
-      CONFIG_DEBUG_CAN=y                       # Enables debug output from CAN
+      CONFIG_DEBUG_FEATURES=y                  # Enables general debug features
+      CONFIG_DEBUG_INFO=y                      # Enables verbose output
+      CONFIG_DEBUG_CAN_INFO=y                  # Enables debug output from CAN
 
       CONFIG_STACK_COLORATION=y                # Monitor stack usage
       CONFIG_DEBUG_SYMBOLS=y                   # Needed only for use with a debugger
@@ -1363,36 +1358,7 @@ Configuration sub-directories
          RAMTest: Address-in-address test: 70000000 2097152
          nsh>
 
-    5. The button test at apps/examples/buttons is included in the
-       configuration.  This configuration illustrates (1) use of the buttons
-       on the evaluation board, and (2) the use of PIO interrupts.  Example
-       usage:
-
-       NuttShell (NSH) NuttX-7.8
-       nsh> help
-       help usage:  help [-v] []
-       ...
-       Builtin Apps:
-         buttons
-       nsh> buttons 3
-       maxbuttons: 3
-       Attached handler at 4078f7 to button 0 [SW0], oldhandler:0
-       Attached handler at 4078e9 to button 1 [SW1], oldhandler:0
-       IRQ:125 Button 1:SW1 SET:00:
-         SW1 released
-       IRQ:125 Button 1:SW1 SET:02:
-         SW1 depressed
-       IRQ:125 Button 1:SW1 SET:00:
-         SW1 released
-       IRQ:90 Button 0:SW0 SET:01:
-         SW0 depressed
-       IRQ:90 Button 0:SW0 SET:00:
-         SW0 released
-       IRQ:125 Button 1:SW1 SET:02:
-         SW1 depressed
-       nsh>
-
-    6. TWI/I2C
+    5. TWI/I2C
 
        TWIHS0 is enabled in this configuration.  The SAM E70 Xplained
        supports one device on the one on-board I2C device on the TWIHS0 bus:
@@ -1464,11 +1430,11 @@ Configuration sub-directories
        0x5f are the addresses of the AT24 EEPROM (I am not sure what the
        other address, 0x37, is as this writing).
 
-    7. TWIHS0 is also used to support 256 byte non-volatile storage for
+    6. TWIHS0 is also used to support 256 byte non-volatile storage for
        configuration data using the MTD configuration as described above
        under the heading, "MTD Configuration Data".
 
-    8. Support for HSMCI is built-in by default. The SAME70-XPLD provides
+    7. Support for HSMCI is built-in by default. The SAME70-XPLD provides
        one full-size SD memory card slot.  Refer to the section entitled
        "SD card" for configuration-related information.
 
@@ -1477,7 +1443,7 @@ Configuration sub-directories
        The auto-mounter is not enabled.  See the section above entitled
        "Auto-Mounter".
 
-    9. Performance-related Configuration settings:
+    8. Performance-related Configuration settings:
 
        CONFIG_ARMV7M_ICACHE=y                : Instruction cache is enabled
        CONFIG_ARMV7M_DCACHE=y                : Data cache is enabled
diff --git a/configs/same70-xplained/kernel/Makefile b/configs/same70-xplained/kernel/Makefile
index a71e019eb0ef07d9700e46bb45a0d137dd9239ec..37c0e8fcf5c9f0410a57eab8d17ab2a0321a9ca0 100644
--- a/configs/same70-xplained/kernel/Makefile
+++ b/configs/same70-xplained/kernel/Makefile
@@ -1,7 +1,7 @@
 ############################################################################
-# configs/samv7-xult/kernel/Makefile
+# configs/same70-xplainged/kernel/Makefile
 #
-#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -52,11 +52,17 @@ ifeq ($(WINTOOL),y)
   USER_LIBPATHS = ${shell for path in $(USERLIBS); do dir=`dirname $(TOPDIR)$(DELIM)$$path`;echo "-L\"`cygpath -w $$dir`\"";done}
   USER_LDSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld}"
   USER_LDSCRIPT += -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld}"
+  USER_HEXFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.hex}"
+  USER_SRECFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.srec}"
+  USER_BINFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.bin}"
 else
   # Linux/Cygwin-native toolchain
   USER_LIBPATHS = $(addprefix -L$(TOPDIR)$(DELIM),$(dir $(USERLIBS)))
   USER_LDSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld
   USER_LDSCRIPT += -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld
+  USER_HEXFILE += "$(TOPDIR)$(DELIM)nuttx_user.hex"
+  USER_SRECFILE += "$(TOPDIR)$(DELIM)nuttx_user.srec"
+  USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin"
 endif
 
 USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT)
@@ -87,15 +93,15 @@ $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf
 	$(Q) cp -a nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.elf
 ifeq ($(CONFIG_INTELHEX_BINARY),y)
 	@echo "CP: nuttx_user.hex"
-	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.hex
+	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(USER_HEXFILE)
 endif
 ifeq ($(CONFIG_MOTOROLA_SREC),y)
 	@echo "CP: nuttx_user.srec"
-	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.srec
+	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(USER_SRECFILE)
 endif
 ifeq ($(CONFIG_RAW_BINARY),y)
 	@echo "CP: nuttx_user.bin"
-	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.bin
+	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(USER_BINFILE)
 endif
 
 $(TOPDIR)$(DELIM)User.map: nuttx_user.elf
diff --git a/configs/same70-xplained/netnsh/Make.defs b/configs/same70-xplained/netnsh/Make.defs
index f3e42f9a7aa324e4dab9eced2d49d52831039db4..a1cf44caa457758990a1b076773b2f45504099e8 100644
--- a/configs/same70-xplained/netnsh/Make.defs
+++ b/configs/same70-xplained/netnsh/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # configs/same70-xplained/netnsh/Make.defs
 #
-#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
@@ -97,6 +97,17 @@ NXFLATLDFLAGS1 = -r -d -warn-common
 NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
 LDNXFLATFLAGS = -e main -s 2048
 
+# Loadable module definitions
+
+CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
+
+LDMODULEFLAGS = -r -e module_initialize
+ifeq ($(WINTOOL),y)
+  LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libc/modlib/gnu-elf.ld}"
+else
+  LDMODULEFLAGS += -T $(TOPDIR)/libc/modlib/gnu-elf.ld
+endif
+
 ASMEXT = .S
 OBJEXT = .o
 LIBEXT = .a
diff --git a/configs/same70-xplained/netnsh/defconfig b/configs/same70-xplained/netnsh/defconfig
index 17951d79a84c86060b53dfb7155a051fd59106df..ceff93f76cc32f89571144f503193b5e2725dc2e 100644
--- a/configs/same70-xplained/netnsh/defconfig
+++ b/configs/same70-xplained/netnsh/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +66,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,10 +81,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +103,7 @@ CONFIG_ARCH="arm"
 CONFIG_ARCH_CHIP_SAMV7=y
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -105,7 +111,9 @@ CONFIG_ARCH_CHIP_SAMV7=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 CONFIG_ARCH_CORTEXM7=y
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -119,6 +127,8 @@ CONFIG_ARCH_CORTEXM7=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="samv7"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 CONFIG_ARMV7M_CMNVECTOR=y
@@ -127,6 +137,7 @@ CONFIG_ARCH_HAVE_FPU=y
 CONFIG_ARCH_HAVE_DPFPU=y
 CONFIG_ARCH_FPU=y
 CONFIG_ARCH_DPFPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
@@ -142,6 +153,7 @@ CONFIG_ARMV7M_HAVE_ITCM=y
 CONFIG_ARMV7M_HAVE_DTCM=y
 # CONFIG_ARMV7M_ITCM is not set
 # CONFIG_ARMV7M_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -154,8 +166,6 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # SAMV7 Configuration Options
@@ -188,7 +198,8 @@ CONFIG_ARCH_CHIP_SAME70Q=y
 # CONFIG_ARCH_CHIP_SAMV71J is not set
 # CONFIG_SAMV7_MCAN is not set
 CONFIG_SAMV7_HAVE_MCAN1=y
-CONFIG_SAMV7_HAVE_DAC1=y
+# CONFIG_SAMV7_DAC is not set
+# CONFIG_SAMV7_HAVE_DAC1 is not set
 CONFIG_SAMV7_HAVE_EBI=y
 CONFIG_SAMV7_EMAC=y
 CONFIG_SAMV7_HSMCI=y
@@ -221,7 +232,6 @@ CONFIG_SAMV7_HAVE_USART2=y
 # CONFIG_SAMV7_MCAN0 is not set
 # CONFIG_SAMV7_MCAN1 is not set
 # CONFIG_SAMV7_DAC0 is not set
-# CONFIG_SAMV7_DAC1 is not set
 # CONFIG_SAMV7_EBI is not set
 CONFIG_SAMV7_EMAC0=y
 CONFIG_SAMV7_XDMAC=y
@@ -257,6 +267,13 @@ CONFIG_SAMV7_USART1=y
 # CONFIG_SAMV7_USART2 is not set
 # CONFIG_SAMV7_WDT is not set
 # CONFIG_SAMV7_RSWDT is not set
+# CONFIG_SAMV7_JTAG_DISABLE is not set
+CONFIG_SAMV7_JTAG_FULL_ENABLE=y
+# CONFIG_SAMV7_JTAG_FULL_SW_ENABLE is not set
+# CONFIG_SAMV7_JTAG_SW_ENABLE is not set
+# CONFIG_SAMV7_ERASE_DISABLE is not set
+CONFIG_SAMV7_ERASE_ENABLE=y
+# CONFIG_SAMV7_SYSTEMRESET is not set
 CONFIG_SAMV7_GPIO_IRQ=y
 CONFIG_SAMV7_GPIOA_IRQ=y
 # CONFIG_SAMV7_GPIOB_IRQ is not set
@@ -269,10 +286,12 @@ CONFIG_SAMV7_GPIOC_IRQ=y
 # TWIHS device driver options
 #
 CONFIG_SAMV7_TWIHS0_FREQUENCY=100000
+CONFIG_SAMV7_TWIHS0_GLITCH_FILTER=1
 
 #
 # HSMCI device driver options
 #
+CONFIG_SAMV7_HSMCI_DMA=y
 # CONFIG_SAMV7_HSMCI_RDPROOF is not set
 # CONFIG_SAMV7_HSMCI_WRPROOF is not set
 # CONFIG_SAMV7_HSMCI_UNALIGNED is not set
@@ -297,6 +316,7 @@ CONFIG_SAMV7_EMAC0_PHYSR_100FD=0x6
 CONFIG_SAMV7_EMAC0_ISETH0=y
 # CONFIG_SAMV7_EMAC_PREALLOCATE is not set
 # CONFIG_SAMV7_EMAC_NBC is not set
+CONFIG_SAMV7_EMAC_HPWORK=y
 
 #
 # Architecture Options
@@ -316,7 +336,7 @@ CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
-# CONFIG_ARCH_HAVE_RESET is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -373,17 +393,15 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -405,6 +423,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=3
@@ -417,6 +436,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -433,6 +453,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -502,6 +524,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -514,26 +537,33 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
 # CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
-# CONFIG_ARCH_HAVE_I2CRESET is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
 CONFIG_I2C=y
 # CONFIG_I2C_SLAVE is not set
 # CONFIG_I2C_POLLED is not set
+# CONFIG_I2C_RESET is not set
 # CONFIG_I2C_TRACE is not set
 CONFIG_I2C_DRIVER=y
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+CONFIG_ARCH_HAVE_SPI_CS_CONTROL=y
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_TIMERS_CS2100CP is not set
@@ -542,8 +572,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -551,6 +591,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -559,10 +600,12 @@ CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
 CONFIG_MMCSD_HAVECARDDETECT=y
 # CONFIG_MMCSD_SPI is not set
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
 CONFIG_MMCSD_SDIO=y
 # CONFIG_SDIO_PREFLIGHT is not set
 # CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_SDIO_BLOCKSETUP=y
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -595,12 +638,16 @@ CONFIG_MTD_AT25=y
 CONFIG_AT25_SPIMODE=0
 CONFIG_AT25_SPIFREQUENCY=20000000
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -624,10 +671,8 @@ CONFIG_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -651,9 +696,10 @@ CONFIG_ETH0_PHY_KSZ8081=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -677,10 +723,6 @@ CONFIG_USART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -703,19 +745,26 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -723,13 +772,11 @@ CONFIG_USART1_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -882,12 +929,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MTD is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -932,11 +973,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -954,7 +1012,11 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -969,8 +1031,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -994,32 +1058,21 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
-CONFIG_EXAMPLES_BUTTONS=y
-CONFIG_EXAMPLES_BUTTONS_MIN=0
-CONFIG_EXAMPLES_BUTTONS_MAX=0
-CONFIG_EXAMPLES_IRQBUTTONS_MIN=0
-CONFIG_EXAMPLES_IRQBUTTONS_MAX=0
-CONFIG_EXAMPLES_BUTTONS_NAME0="SW0"
-CONFIG_EXAMPLES_BUTTONS_NAME1="Button 1"
-CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2"
-CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3"
-CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4"
-CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5"
-CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6"
-CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1029,26 +1082,25 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1056,15 +1108,15 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1084,8 +1136,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1098,20 +1151,21 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1164,13 +1218,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1188,11 +1242,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -1214,6 +1271,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 CONFIG_NSH_NETINIT_THREAD=y
 CONFIG_NSH_NETINIT_MONITOR=y
 CONFIG_NSH_NETINIT_SIGNO=18
@@ -1261,12 +1319,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=0
 CONFIG_I2CTOOL_MAXBUS=0
@@ -1274,7 +1332,8 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=400000
-# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_MDIO is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1282,8 +1341,9 @@ CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
-# CONFIG_SYSTEM_MDIO is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/same70-xplained/nsh/Make.defs b/configs/same70-xplained/nsh/Make.defs
index e607c4ace3cd3f7a10b9cfb626dc1851aa24733d..2395a389c26ad94c9a821b8fcdebc02380320543 100644
--- a/configs/same70-xplained/nsh/Make.defs
+++ b/configs/same70-xplained/nsh/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # configs/same70-xplained/nsh/Make.defs
 #
-#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
@@ -97,6 +97,17 @@ NXFLATLDFLAGS1 = -r -d -warn-common
 NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
 LDNXFLATFLAGS = -e main -s 2048
 
+# Loadable module definitions
+
+CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
+
+LDMODULEFLAGS = -r -e module_initialize
+ifeq ($(WINTOOL),y)
+  LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libc/modlib/gnu-elf.ld}"
+else
+  LDMODULEFLAGS += -T $(TOPDIR)/libc/modlib/gnu-elf.ld
+endif
+
 ASMEXT = .S
 OBJEXT = .o
 LIBEXT = .a
diff --git a/configs/same70-xplained/nsh/defconfig b/configs/same70-xplained/nsh/defconfig
index 7a425dcb802a15a8c90059f489122c2d48068e96..1c771712930dd074917261226e919a53d131138d 100644
--- a/configs/same70-xplained/nsh/defconfig
+++ b/configs/same70-xplained/nsh/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +66,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,10 +81,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +103,7 @@ CONFIG_ARCH="arm"
 CONFIG_ARCH_CHIP_SAMV7=y
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -105,7 +111,9 @@ CONFIG_ARCH_CHIP_SAMV7=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 CONFIG_ARCH_CORTEXM7=y
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -119,6 +127,8 @@ CONFIG_ARCH_CORTEXM7=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="samv7"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 CONFIG_ARMV7M_CMNVECTOR=y
@@ -127,6 +137,7 @@ CONFIG_ARCH_HAVE_FPU=y
 CONFIG_ARCH_HAVE_DPFPU=y
 CONFIG_ARCH_FPU=y
 CONFIG_ARCH_DPFPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
@@ -142,6 +153,7 @@ CONFIG_ARMV7M_HAVE_ITCM=y
 CONFIG_ARMV7M_HAVE_DTCM=y
 # CONFIG_ARMV7M_ITCM is not set
 # CONFIG_ARMV7M_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -154,8 +166,6 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # SAMV7 Configuration Options
@@ -188,6 +198,7 @@ CONFIG_ARCH_CHIP_SAME70Q=y
 # CONFIG_ARCH_CHIP_SAMV71J is not set
 # CONFIG_SAMV7_MCAN is not set
 CONFIG_SAMV7_HAVE_MCAN1=y
+# CONFIG_SAMV7_DAC is not set
 CONFIG_SAMV7_HAVE_DAC1=y
 CONFIG_SAMV7_HAVE_EBI=y
 # CONFIG_SAMV7_EMAC is not set
@@ -257,6 +268,13 @@ CONFIG_SAMV7_USART1=y
 # CONFIG_SAMV7_USART2 is not set
 # CONFIG_SAMV7_WDT is not set
 # CONFIG_SAMV7_RSWDT is not set
+# CONFIG_SAMV7_JTAG_DISABLE is not set
+CONFIG_SAMV7_JTAG_FULL_ENABLE=y
+# CONFIG_SAMV7_JTAG_FULL_SW_ENABLE is not set
+# CONFIG_SAMV7_JTAG_SW_ENABLE is not set
+# CONFIG_SAMV7_ERASE_DISABLE is not set
+CONFIG_SAMV7_ERASE_ENABLE=y
+# CONFIG_SAMV7_SYSTEMRESET is not set
 CONFIG_SAMV7_GPIO_IRQ=y
 CONFIG_SAMV7_GPIOA_IRQ=y
 # CONFIG_SAMV7_GPIOB_IRQ is not set
@@ -275,10 +293,12 @@ CONFIG_SAMV7_SDRAMSIZE=2097152
 # TWIHS device driver options
 #
 CONFIG_SAMV7_TWIHS0_FREQUENCY=100000
+CONFIG_SAMV7_TWIHS0_GLITCH_FILTER=1
 
 #
 # HSMCI device driver options
 #
+CONFIG_SAMV7_HSMCI_DMA=y
 # CONFIG_SAMV7_HSMCI_RDPROOF is not set
 # CONFIG_SAMV7_HSMCI_WRPROOF is not set
 # CONFIG_SAMV7_HSMCI_UNALIGNED is not set
@@ -301,7 +321,7 @@ CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
-# CONFIG_ARCH_HAVE_RESET is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -358,17 +378,15 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -390,6 +408,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=3
@@ -402,6 +421,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -418,6 +438,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -487,6 +509,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -499,26 +522,33 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
 # CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
-# CONFIG_ARCH_HAVE_I2CRESET is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
 CONFIG_I2C=y
 # CONFIG_I2C_SLAVE is not set
 # CONFIG_I2C_POLLED is not set
+# CONFIG_I2C_RESET is not set
 # CONFIG_I2C_TRACE is not set
 CONFIG_I2C_DRIVER=y
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+CONFIG_ARCH_HAVE_SPI_CS_CONTROL=y
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_TIMERS_CS2100CP is not set
@@ -527,8 +557,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -536,6 +576,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -544,10 +585,12 @@ CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
 CONFIG_MMCSD_HAVECARDDETECT=y
 # CONFIG_MMCSD_SPI is not set
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
 CONFIG_MMCSD_SDIO=y
 # CONFIG_SDIO_PREFLIGHT is not set
 # CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_SDIO_BLOCKSETUP=y
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -580,12 +623,16 @@ CONFIG_MTD_AT25=y
 CONFIG_AT25_SPIMODE=0
 CONFIG_AT25_SPIFREQUENCY=20000000
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -593,9 +640,10 @@ CONFIG_AT25_SPIFREQUENCY=20000000
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -619,10 +667,6 @@ CONFIG_USART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -645,19 +689,26 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -711,12 +762,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MTD is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -761,11 +806,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -783,15 +845,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -815,32 +884,20 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
-CONFIG_EXAMPLES_BUTTONS=y
-CONFIG_EXAMPLES_BUTTONS_MIN=0
-CONFIG_EXAMPLES_BUTTONS_MAX=0
-CONFIG_EXAMPLES_IRQBUTTONS_MIN=0
-CONFIG_EXAMPLES_IRQBUTTONS_MAX=0
-CONFIG_EXAMPLES_BUTTONS_NAME0="SW0"
-CONFIG_EXAMPLES_BUTTONS_NAME1="Button 1"
-CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2"
-CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3"
-CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4"
-CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5"
-CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6"
-CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -849,39 +906,39 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -901,8 +958,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -913,6 +971,7 @@ CONFIG_EXAMPLES_NSH=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -967,12 +1026,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -989,11 +1048,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -1027,12 +1089,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=0
 CONFIG_I2CTOOL_MAXBUS=0
@@ -1040,7 +1102,7 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=400000
-# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 CONFIG_SYSTEM_RAMTEST=y
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1048,6 +1110,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/same70-xplained/scripts/memory.ld b/configs/same70-xplained/scripts/memory.ld
index 65673b3d84a3817b0e6a688d11693d915e7e5049..dc996926c7a6ecb8c23ab154ce8fa47058c6acc6 100644
--- a/configs/same70-xplained/scripts/memory.ld
+++ b/configs/same70-xplained/scripts/memory.ld
@@ -33,16 +33,13 @@
  *
  ****************************************************************************/
 
-/* The SAME70Q21 has 2048Kb of FLASH beginning at address 0x0040:0000 and
+/* The SAMe70Q21 has 2048Kb of FLASH beginning at address 0x0040:0000 and
  * 384Kb of SRAM beginining at 0x2040:0000
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0400:0000 address range.
  *
- * NOTE: that the DTCM address of 0x2000:0000 is used for SRAM.  If DTCM is
- * disabled, then the accesses will actually occur on the AHB bus.
- *
  * The user space partition will be spanned with a single region of size
  * 2**n bytes.  The alignment of the user-space region must be the same.
  * As a consequence, as the user-space increases in size, the alignment
@@ -55,18 +52,18 @@
  *
  * A detailed memory map for the 384KB SRAM region is as follows:
  *
- *   0x20000 0000:  Kernel .data region.  Typical size: 0.1KB
- *   ------- ----   Kernel .bss  region.  Typical size: 1.8KB
- *   0x20000 0800:  Kernel IDLE thread stack (approximate).  Size is
- *                  determined by CONFIG_IDLETHREAD_STACKSIZE and
- *                  adjustments for alignment.  Typical is 1KB.
- *   ------- ----   Padded to 4KB
- *   0x20002 0000:  User .data region.  Size is variable.
- *   ------- ----   User .bss region  Size is variable.
- *   0x20000 2000:  Beginning of kernel heap.  Size determined by
- *                  CONFIG_MM_KERNEL_HEAPSIZE.
- *   ------- ----   Beginning of user heap.  Can vary with other settings.
- *   0x20004 0000:  End+1 of mappable internal SRAM
+ *   0x2040 0000:  Kernel .data region.  Typical size: 0.1KB
+ *   ------ ----   Kernel .bss  region.  Typical size: 1.8KB
+ *   0x2040 0800:  Kernel IDLE thread stack (approximate).  Size is
+ *                 determined by CONFIG_IDLETHREAD_STACKSIZE and
+ *                 adjustments for alignment.  Typical is 1KB.
+ *   ------ ----   Padded to 4KB
+ *   0x2042 0000:  User .data region.  Size is variable.
+ *   ------- ----  User .bss region  Size is variable.
+ *   0x2044 0000:  Beginning of kernel heap.  Size determined by
+ *                 CONFIG_MM_KERNEL_HEAPSIZE.
+ *   ------ ----   Beginning of user heap.  Can vary with other settings.
+ *   0x2046 0000:  End+1 of mappable internal SRAM
  */
 
 MEMORY
@@ -78,7 +75,7 @@ MEMORY
 
     /* 384Kb of internal SRAM */
 
-    ksram (rwx)      : ORIGIN = 0x20000000, LENGTH = 128K
-    usram (rwx)      : ORIGIN = 0x20020000, LENGTH = 128K
-    xsram (rwx)      : ORIGIN = 0x20040000, LENGTH = 128K
+    ksram (rwx)      : ORIGIN = 0x20400000, LENGTH = 128K
+    usram (rwx)      : ORIGIN = 0x20420000, LENGTH = 128K
+    xsram (rwx)      : ORIGIN = 0x20440000, LENGTH = 128K
 }
diff --git a/configs/same70-xplained/src/Makefile b/configs/same70-xplained/src/Makefile
index 4d883fccb75a6108e0fa8887769ee0b2de74303c..1f2eafb849a4ca7ba23d94b717a1ca2a0824c11c 100644
--- a/configs/same70-xplained/src/Makefile
+++ b/configs/same70-xplained/src/Makefile
@@ -90,4 +90,8 @@ endif
 endif
 endif
 
+ifneq (,$(findstring y,$(CONFIG_SAMV7_DAC0) $(CONFIG_SAMV7_DAC1)))
+CSRCS += sam_dac.c
+endif
+
 include $(TOPDIR)/configs/Board.mk
diff --git a/configs/same70-xplained/src/sam_appinit.c b/configs/same70-xplained/src/sam_appinit.c
index 5e8a871522aee5903b2d4af44cc27ce6345a2ec5..4dd89315b75dfd1f0bd980d33d7436bbd982af9c 100644
--- a/configs/same70-xplained/src/sam_appinit.c
+++ b/configs/same70-xplained/src/sam_appinit.c
@@ -45,7 +45,7 @@
 
 #include "same70-xplained.h"
 
-#if defined(CONFIG_LIB_BOARDCTL) && !defined(CONFIG_BUILD_KERNEL)
+#ifdef CONFIG_LIB_BOARDCTL
 
 /****************************************************************************
  * Public Functions
@@ -87,4 +87,4 @@ int board_app_initialize(uintptr_t arg)
 #endif
 }
 
-#endif /* CONFIG_LIB_BOARDCTL && !CONFIG_BUILD_KERNEL */
+#endif /* CONFIG_LIB_BOARDCTL */
diff --git a/configs/same70-xplained/src/sam_at24config.c b/configs/same70-xplained/src/sam_at24config.c
index aac1de3571d5651add08b32d1a2cc89b191d7903..74eea58ee4c9227dbcdd360dcfb61379358bad97 100644
--- a/configs/same70-xplained/src/sam_at24config.c
+++ b/configs/same70-xplained/src/sam_at24config.c
@@ -42,7 +42,7 @@
 #include 
 #include 
 
-#include 
+#include 
 #include 
 #include 
 
@@ -75,7 +75,7 @@ int sam_at24config(void)
   i2c = sam_i2cbus_initialize(0);
   if (!i2c)
     {
-      fdbg("ERROR: Failed to initialize TWI0\n");
+      ferr("ERROR: Failed to initialize TWI0\n");
       return -ENODEV;
     }
 
@@ -84,7 +84,7 @@ int sam_at24config(void)
   at24 = at24c_initialize(i2c);
   if (!at24)
     {
-      fdbg("ERROR: Failed to initialize the AT24 driver\n");
+      ferr("ERROR: Failed to initialize the AT24 driver\n");
       (void)sam_i2cbus_uninitialize(i2c);
       return -ENODEV;
     }
@@ -94,7 +94,7 @@ int sam_at24config(void)
   ret = at24->ioctl(at24, MTDIOC_EXTENDED, 0);
   if (ret < 0)
     {
-      fdbg("ERROR: AT24 ioctl(MTDIOC_EXTENDED) failed: %d\n", ret);
+      ferr("ERROR: AT24 ioctl(MTDIOC_EXTENDED) failed: %d\n", ret);
     }
 
   /* Bind the instance of an MTD device to the /dev/config device. */
@@ -102,7 +102,7 @@ int sam_at24config(void)
   ret = mtdconfig_register(at24);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to bind AT24 driver to the MTD config device\n");
+      ferr("ERROR: Failed to bind AT24 driver to the MTD config device\n");
       (void)sam_i2cbus_uninitialize(i2c);
     }
 
diff --git a/configs/same70-xplained/src/sam_autoleds.c b/configs/same70-xplained/src/sam_autoleds.c
index 8fda597e74128d0f8a17bcadf0a932a788fb5a0f..64fd6b663c388f5a426047dc3c468830126d6b24 100644
--- a/configs/same70-xplained/src/sam_autoleds.c
+++ b/configs/same70-xplained/src/sam_autoleds.c
@@ -77,30 +77,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/same70-xplained/src/sam_bringup.c b/configs/same70-xplained/src/sam_bringup.c
index e5631b893080e6a3b83782ef3df367aa813b7ebb..4b41c93674ffeb6871eeaa58aa2c22e178a7cd14 100644
--- a/configs/same70-xplained/src/sam_bringup.c
+++ b/configs/same70-xplained/src/sam_bringup.c
@@ -43,15 +43,16 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 
-#ifdef CONFIG_SYSTEM_USBMONITOR
-#  include 
+#ifdef CONFIG_USBMONITOR
+#  include 
 #endif
 
-#include 
-#include 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -76,14 +77,6 @@
   (((n)+CONFIG_SAME70XPLAINED_ROMFS_ROMDISK_SECTSIZE-1) / \
    CONFIG_SAME70XPLAINED_ROMFS_ROMDISK_SECTSIZE)
 
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_BOARD_INITIALIZE
-#  define SYSLOG lldbg
-#else
-#  define SYSLOG dbg
-#endif
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -105,14 +98,14 @@ static void sam_i2c_register(int bus)
   i2c = sam_i2cbus_initialize(bus);
   if (i2c == NULL)
     {
-      dbg("ERROR: Failed to get I2C%d interface\n", bus);
+      syslog(LOG_ERR, "ERROR: Failed to get I2C%d interface\n", bus);
     }
   else
     {
       ret = i2c_register(i2c, bus);
       if (ret < 0)
         {
-          dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
+          syslog(LOG_ERR, "ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
           sam_i2cbus_uninitialize(i2c);
         }
     }
@@ -177,7 +170,7 @@ int sam_bringup(void)
   ret = sam_emac0_setmac();
   if (ret < 0)
     {
-      SYSLOG("ERROR: sam_emac0_setmac() failed: %d\n", ret);
+      syslog(LOG_ERR, "ERROR: sam_emac0_setmac() failed: %d\n", ret);
     }
 #endif
 
@@ -187,7 +180,7 @@ int sam_bringup(void)
   ret = mount(NULL, SAME70_PROCFS_MOUNTPOINT, "procfs", 0, NULL);
   if (ret < 0)
     {
-      SYSLOG("ERROR: Failed to mount procfs at %s: %d\n",
+      syslog(LOG_ERR, "ERROR: Failed to mount procfs at %s: %d\n",
              SAME70_PROCFS_MOUNTPOINT, ret);
     }
 #endif
@@ -200,7 +193,7 @@ int sam_bringup(void)
   ret = sam_at24config();
   if (ret < 0)
     {
-      SYSLOG("ERROR: sam_at24config() failed: %d\n", ret);
+      syslog(LOG_ERR, "ERROR: sam_at24config() failed: %d\n", ret);
     }
 #endif
 
@@ -210,7 +203,7 @@ int sam_bringup(void)
   ret = sam_hsmci_initialize(HSMCI0_SLOTNO, HSMCI0_MINOR);
   if (ret < 0)
     {
-      SYSLOG("ERROR: sam_hsmci_initialize(%d,%d) failed: %d\n",
+      syslog(LOG_ERR, "ERROR: sam_hsmci_initialize(%d,%d) failed: %d\n",
              HSMCI0_SLOTNO, HSMCI0_MINOR, ret);
     }
 
@@ -227,7 +220,7 @@ int sam_bringup(void)
 
       if (ret < 0)
         {
-          SYSLOG("ERROR: Failed to mount %s: %d\n",
+          syslog(LOG_ERR, "ERROR: Failed to mount %s: %d\n",
                  CONFIG_SAME70XPLAINED_HSMCI0_MOUNT_MOUNTPOINT, errno);
         }
     }
@@ -249,7 +242,7 @@ int sam_bringup(void)
                          CONFIG_SAME70XPLAINED_ROMFS_ROMDISK_SECTSIZE);
   if (ret < 0)
     {
-      SYSLOG("ERROR: romdisk_register failed: %d\n", -ret);
+      syslog(LOG_ERR, "ERROR: romdisk_register failed: %d\n", -ret);
     }
   else
     {
@@ -260,7 +253,7 @@ int sam_bringup(void)
                   "romfs", MS_RDONLY, NULL);
       if (ret < 0)
         {
-          SYSLOG("ERROR: mount(%s,%s,romfs) failed: %d\n",
+          syslog(LOG_ERR, "ERROR: mount(%s,%s,romfs) failed: %d\n",
                  CONFIG_SAME70XPLAINED_ROMFS_ROMDISK_DEVNAME,
                  CONFIG_SAME70XPLAINED_ROMFS_MOUNT_MOUNTPOINT, errno);
         }
@@ -277,7 +270,7 @@ int sam_bringup(void)
   mtd = progmem_initialize();
   if (!mtd)
     {
-      SYSLOG("ERROR: progmem_initialize failed\n");
+      syslog(LOG_ERR, "ERROR: progmem_initialize failed\n");
     }
 
   /* Use the FTL layer to wrap the MTD driver as a block driver */
@@ -285,7 +278,7 @@ int sam_bringup(void)
   ret = ftl_initialize(PROGMEM_MTD_MINOR, mtd);
   if (ret < 0)
     {
-      SYSLOG("ERROR: Failed to initialize the FTL layer: %d\n", ret);
+      syslog(LOG_ERR, "ERROR: Failed to initialize the FTL layer: %d\n", ret);
       return ret;
     }
 
@@ -299,7 +292,7 @@ int sam_bringup(void)
   ret = bchdev_register(blockdev, chardev, false);
   if (ret < 0)
     {
-      SYSLOG("ERROR: bchdev_register %s failed: %d\n", chardev, ret);
+      syslog(LOG_ERR, "ERROR: bchdev_register %s failed: %d\n", chardev, ret);
       return ret;
     }
 #endif
@@ -312,28 +305,46 @@ int sam_bringup(void)
   ret = sam_usbhost_initialize();
   if (ret != OK)
     {
-      SYSLOG("ERROR: Failed to initialize USB host: %d\n", ret);
+      syslog(LOG_ERR, "ERROR: Failed to initialize USB host: %d\n", ret);
     }
 #endif
 
 #ifdef HAVE_USBMONITOR
   /* Start the USB Monitor */
 
-  ret = usbmonitor_start(0, NULL);
+  ret = usbmonitor_start();
   if (ret != OK)
     {
-      SYSLOG("ERROR: Failed to start the USB monitor: %d\n", ret);
+      syslog(LOG_ERR, "ERROR: Failed to start the USB monitor: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_SAMV7_MCAN
+  /* Initialize CAN and register the CAN driver. */
+
+  ret = sam_can_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: sam_can_setup failed: %d\n", ret);
     }
 #endif
 
 #ifdef HAVE_ELF
   /* Initialize the ELF binary loader */
 
-  SYSLOG("Initializing the ELF binary loader\n");
+  syslog(LOG_ERR, "Initializing the ELF binary loader\n");
   ret = elf_initialize();
   if (ret < 0)
     {
-      SYSLOG("ERROR: Initialization of the ELF loader failed: %d\n", ret);
+      syslog(LOG_ERR, "ERROR: Initialization of the ELF loader failed: %d\n", ret);
+    }
+#endif
+
+#if defined(CONFIG_SAMV7_DAC0) || defined(CONFIG_SAMV7_DAC1)
+  ret = sam_dacdev_initialize();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: Initialization of the DAC module failed: %d\n", ret);
     }
 #endif
 
diff --git a/configs/same70-xplained/src/sam_buttons.c b/configs/same70-xplained/src/sam_buttons.c
index d1154f70c895d4e939d309dce2b32735d1360488..669a6d3bfe4d9e260ddfc19178499eb4daf06960 100644
--- a/configs/same70-xplained/src/sam_buttons.c
+++ b/configs/same70-xplained/src/sam_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sam4e-ek/src/sam_buttons.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -59,20 +60,11 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 #ifdef CONFIG_ARCH_IRQBUTTONS
-
-#define HAVE_IRQBUTTONS 1
-#ifndef CONFIG_SAMV7_GPIOA_IRQ
-#  undef HAVE_IRQBUTTONS
-#endif
-
-#ifdef CONFIG_SAMV7_GPIOA_IRQ
-static xcpt_t g_irq_sw0;
-#endif
+#  define HAVE_IRQBUTTONS 1
+#  ifndef CONFIG_SAMV7_GPIOA_IRQ
+#    undef HAVE_IRQBUTTONS
+#  endif
 #endif
 
 /****************************************************************************
@@ -88,10 +80,9 @@ static xcpt_t g_irq_sw0;
  ****************************************************************************/
 
 #ifdef HAVE_IRQBUTTONS
-static xcpt_t board_button_irqx(gpio_pinset_t pinset, int irq,
-                                xcpt_t irqhandler, xcpt_t *store)
+static int board_button_irqx(gpio_pinset_t pinset, int irq,
+                             xcpt_t irqhandler, void *arg)
 {
-  xcpt_t oldhandler;
   irqstate_t flags;
 
   /* Disable interrupts until we are done.  This guarantees that the following
@@ -100,11 +91,6 @@ static xcpt_t board_button_irqx(gpio_pinset_t pinset, int irq,
 
   flags = enter_critical_section();
 
-  /* Get the old button interrupt handler and save the new one */
-
-  oldhandler = *store;
-  *store = irqhandler;
-
   /* Are we attaching or detaching? */
 
   if (irqhandler != NULL)
@@ -112,7 +98,7 @@ static xcpt_t board_button_irqx(gpio_pinset_t pinset, int irq,
       /* Configure the interrupt */
 
       sam_gpioirq(pinset);
-      (void)irq_attach(irq, irqhandler);
+      (void)irq_attach(irq, irqhandler, arg);
       sam_gpioirqenable(irq);
     }
   else
@@ -124,10 +110,7 @@ static xcpt_t board_button_irqx(gpio_pinset_t pinset, int irq,
     }
 
   leave_critical_section(flags);
-
-  /* Return the old button handler (so that it can be restored) */
-
-  return oldhandler;
+  return OK;
 }
 #endif
 
@@ -175,8 +158,7 @@ uint8_t board_buttons(void)
  * Description:
  *   This function may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is one
- *   of the BUTTON* definitions provided above. The previous interrupt
- *   handler address is returned (so that it may restored, if so desired).
+ *   of the BUTTON* definitions provided above.
  *
  * Configuration Notes:
  *   Configuration CONFIG_AVR32_GPIOIRQ must be selected to enable the
@@ -188,17 +170,16 @@ uint8_t board_buttons(void)
  ****************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
 #ifdef HAVE_IRQBUTTONS
   if (id == BUTTON_SW0)
     {
-      return board_button_irqx(GPIO_SW0, IRQ_SW0, irqhandler, &g_irq_sw0);
+      return board_button_irqx(GPIO_SW0, IRQ_SW0, irqhandler, arg);
     }
 #endif
 
-  return NULL;
-
+  return -EINVAL;
 }
 #endif
 
diff --git a/configs/same70-xplained/src/sam_dac.c b/configs/same70-xplained/src/sam_dac.c
new file mode 100644
index 0000000000000000000000000000000000000000..884de6e27cac7821d07379202ab195377ae9a589
--- /dev/null
+++ b/configs/same70-xplained/src/sam_dac.c
@@ -0,0 +1,123 @@
+/************************************************************************************
+ * configs/same70-xplained/src/sam_dac.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "up_arch.h"
+#include "chip.h"
+#include "sam_dac.h"
+#include "same70-xplained.h"
+
+#if defined(CONFIG_SAMV7_DAC0) || defined(CONFIG_SAMV7_DAC1)
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: sam_dacdev_initialize
+ *
+ * Description:
+ *   Called to configure DAC peripheral module and register DAC device driver
+ ************************************************************************************/
+
+int sam_dacdev_initialize(void)
+{
+    static bool initialized = false;
+    struct dac_dev_s *dac;
+    int ret;
+
+    /* Check if we have already initialized */
+
+    if (!initialized)
+      {
+#ifdef CONFIG_SAMV7_DAC0
+        /* Get an instance of the DAC0 interface */
+
+        dac = sam_dac_initialize(0);
+        if (dac == NULL)
+          {
+            aerr("ERROR:  Failed to get DAC0 interface\n");
+            return -ENODEV;
+          }
+
+        /* Register the DAC driver at "/dev/dac0" */
+
+        ret = dac_register("/dev/dac0", dac);
+        if (ret < 0)
+          {
+            aerr("ERROR: dac_register failed: %d\n", ret);
+            return ret;
+          }
+#endif
+
+#ifdef CONFIG_SAMV7_DAC1
+        /* Get an instance of the DAC1 interface */
+
+        dac = sam_dac_initialize(1);
+        if (dac == NULL)
+          {
+            aerr("ERROR:  Failed to get DAC1 interface\n");
+            return -ENODEV;
+          }
+
+        /* Register the DAC driver at "/dev/dac1" */
+
+        ret = dac_register("/dev/dac1", dac);
+        if (ret < 0)
+          {
+            aerr("ERROR: dac_register failed: %d\n", ret);
+            return ret;
+          }
+#endif
+        /* Now we are initialized */
+
+        initialized = true;
+      }
+    return OK;
+}
+
+#endif /* CONFIG_SAMV7_DAC0 || CONFIG_SAMV7_DAC1 */
diff --git a/configs/same70-xplained/src/sam_ethernet.c b/configs/same70-xplained/src/sam_ethernet.c
index f435028837bcd64f3da3c3e5cef1d461496d982d..053003fe11b92ac1563748763d1f2ff4fbfbef6e 100644
--- a/configs/same70-xplained/src/sam_ethernet.c
+++ b/configs/same70-xplained/src/sam_ethernet.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/same70-xplained/src/sam_ethernet.c
  *
- *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,8 +42,8 @@
 /* Force verbose debug on in this file only to support unit-level testing. */
 
 #ifdef CONFIG_NETDEV_PHY_DEBUG
-#  undef  CONFIG_DEBUG_VERBOSE
-#  define CONFIG_DEBUG_VERBOSE 1
+#  undef  CONFIG_DEBUG_INFO
+#  define CONFIG_DEBUG_INFO 1
 #  undef  CONFIG_DEBUG_NET
 #  define CONFIG_DEBUG_NET 1
 #endif
@@ -80,19 +80,13 @@
  */
 
 #ifdef CONFIG_NETDEV_PHY_DEBUG
-#  define phydbg    dbg
-#  define phylldbg  lldbg
+#  define phyerr    _err
+#  define phywarn   _warn
+#  define phyinfo   _info
 #else
-#  define phydbg(x...)
-#  define phylldbg(x...)
-#endif
-
-/************************************************************************************
- * Private Data
- ************************************************************************************/
-
-#ifdef CONFIG_SAMV7_GPIOA_IRQ
-static xcpt_t g_emac0_handler;
+#  define phyerr(x...)
+#  define phywarn(x...)
+#  define phyinfo(x...)
 #endif
 
 /************************************************************************************
@@ -106,7 +100,7 @@ static xcpt_t g_emac0_handler;
 #ifdef CONFIG_SAMV7_GPIOA_IRQ
 static void sam_emac0_phy_enable(bool enable)
 {
-  phydbg("IRQ%d: enable=%d\n", IRQ_EMAC0_INT, enable);
+  phyinfo("IRQ%d: enable=%d\n", IRQ_EMAC0_INT, enable);
   if (enable)
     {
       sam_gpioirqenable(IRQ_EMAC0_INT);
@@ -134,7 +128,7 @@ void weak_function sam_netinitialize(void)
 {
   /* Configure the PHY interrupt GPIO */
 
-  phydbg("Configuring %08x\n", GPIO_EMAC0_INT);
+  phyinfo("Configuring %08x\n", GPIO_EMAC0_INT);
   sam_configgpio(GPIO_EMAC0_INT);
 
   /* Configure PHY /RESET output */
@@ -165,7 +159,7 @@ int sam_emac0_setmac(void)
   i2c = sam_i2cbus_initialize(0);
   if (!i2c)
     {
-      ndbg("ERROR: Failed to initialize TWI0\n");
+      nerr("ERROR: Failed to initialize TWI0\n");
       return -ENODEV;
     }
 
@@ -174,7 +168,7 @@ int sam_emac0_setmac(void)
   at24 = at24c_initialize(i2c);
   if (!at24)
     {
-      ndbg("ERROR: Failed to initialize the AT24 driver\n");
+      nerr("ERROR: Failed to initialize the AT24 driver\n");
       (void)sam_i2cbus_uninitialize(i2c);
       return -ENODEV;
     }
@@ -184,7 +178,7 @@ int sam_emac0_setmac(void)
   ret = at24->ioctl(at24, MTDIOC_EXTENDED, 1);
   if (ret < 0)
     {
-      ndbg("ERROR: AT24 ioctl(MTDIOC_EXTENDED) failed: %d\n", ret);
+      nerr("ERROR: AT24 ioctl(MTDIOC_EXTENDED) failed: %d\n", ret);
       (void)sam_i2cbus_uninitialize(i2c);
       return ret;
     }
@@ -194,7 +188,7 @@ int sam_emac0_setmac(void)
   nread = at24->read(at24, AT24XX_MACADDR_OFFSET, 6, mac);
   if (nread < 6)
     {
-      ndbg("ERROR: AT24 read(AT24XX_MACADDR_OFFSET) failed: ld\n", (long)nread);
+      nerr("ERROR: AT24 read(AT24XX_MACADDR_OFFSET) failed: ld\n", (long)nread);
       (void)sam_i2cbus_uninitialize(i2c);
       return (int)nread;
     }
@@ -204,7 +198,7 @@ int sam_emac0_setmac(void)
   ret = at24->ioctl(at24, MTDIOC_EXTENDED, 0);
   if (ret < 0)
     {
-      ndbg("ERROR: AT24 ioctl(MTDIOC_EXTENDED) failed: %d\n", ret);
+      nerr("ERROR: AT24 ioctl(MTDIOC_EXTENDED) failed: %d\n", ret);
     }
 
   /* Release the I2C instance.
@@ -214,10 +208,10 @@ int sam_emac0_setmac(void)
   ret = sam_i2cbus_uninitialize(i2c);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to release the I2C interface: %d\n", ret);
+      nerr("ERROR: Failed to release the I2C interface: %d\n", ret);
     }
 
-  nvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
         mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Now configure the EMAC driver to use this MAC address */
@@ -225,7 +219,7 @@ int sam_emac0_setmac(void)
   ret = sam_emac_setmacaddr(EMAC0_INTF, mac);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to set MAC address: %d\n", ret);
+      nerr("ERROR: Failed to set MAC address: %d\n", ret);
     }
 
   return ret;
@@ -286,43 +280,40 @@ int sam_emac0_setmac(void)
  *             asserts an interrupt.  Must reside in OS space, but can
  *             signal tasks in user space.  A value of NULL can be passed
  *             in order to detach and disable the PHY interrupt.
+ *   arg     - The argument that will accompany the interrupt
  *   enable  - A function pointer that be unsed to enable or disable the
  *             PHY interrupt.
  *
  * Returned Value:
- *   The previous PHY interrupt handler address is returned.  This allows you
- *   to temporarily replace an interrupt handler, then restore the original
- *   interrupt handler.  NULL is returned if there is was not handler in
- *   place when the call was made.
+ *   Zero (OK) returned on success; a negated errno value is returned on
+ *   failure.
  *
  ****************************************************************************/
 
 #ifdef CONFIG_SAMV7_GPIOA_IRQ
-xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
+int arch_phy_irq(FAR const char *intf, xcpt_t handler, void *arg,
+                 phy_enable_t *enable)
 {
   irqstate_t flags;
-  xcpt_t *phandler;
-  xcpt_t oldhandler;
   gpio_pinset_t pinset;
   phy_enable_t enabler;
   int irq;
 
   DEBUGASSERT(intf);
 
-  nvdbg("%s: handler=%p\n", intf, handler);
-  phydbg("EMAC0: devname=%s\n", SAMV7_EMAC0_DEVNAME);
+  ninfo("%s: handler=%p\n", intf, handler);
+  phyinfo("EMAC0: devname=%s\n", SAMV7_EMAC0_DEVNAME);
 
   if (strcmp(intf, SAMV7_EMAC0_DEVNAME) == 0)
     {
-      phydbg("Select EMAC0\n");
-      phandler = &g_emac0_handler;
+      phyinfo("Select EMAC0\n");
       pinset   = GPIO_EMAC0_INT;
       irq      = IRQ_EMAC0_INT;
       enabler  = sam_emac0_phy_enable;
     }
   else
     {
-      ndbg("Unsupported interface: %s\n", intf);
+      nerr("ERROR: Unsupported interface: %s\n", intf);
       return NULL;
     }
 
@@ -332,24 +323,19 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
 
   flags = enter_critical_section();
 
-  /* Get the old interrupt handler and save the new one */
-
-  oldhandler = *phandler;
-  *phandler  = handler;
-
   /* Configure the interrupt */
 
   if (handler)
     {
-      phydbg("Configure pin: %08x\n", pinset);
+      phyinfo("Configure pin: %08x\n", pinset);
       sam_gpioirq(pinset);
 
-      phydbg("Attach IRQ%d\n", irq);
-      (void)irq_attach(irq, handler);
+      phyinfo("Attach IRQ%d\n", irq);
+      (void)irq_attach(irq, handler, arg);
     }
   else
     {
-      phydbg("Detach IRQ%d\n", irq);
+      phyinfo("Detach IRQ%d\n", irq);
       (void)irq_detach(irq);
       enabler = NULL;
     }
@@ -368,7 +354,7 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
   /* Return the old handler (so that it can be restored) */
 
   leave_critical_section(flags);
-  return oldhandler;
+  return OK;
 }
 #endif /* CONFIG_SAMV7_GPIOA_IRQ */
 
diff --git a/configs/same70-xplained/src/sam_hsmci.c b/configs/same70-xplained/src/sam_hsmci.c
index 6c134309deed71f8905632e6293bed99c795c335..24d27d1c8214ba3dc23a1d474e9e527564260105 100644
--- a/configs/same70-xplained/src/sam_hsmci.c
+++ b/configs/same70-xplained/src/sam_hsmci.c
@@ -99,7 +99,7 @@ struct sam_hsmci_state_s
 /* HSCMI device state */
 
 #ifdef CONFIG_SAMV7_HSMCI0
-static int sam_hsmci0_cardetect(int irq, void *regs);
+static int sam_hsmci0_cardetect(int irq, void *regs, FAR void *arg);
 
 static struct sam_hsmci_state_s g_hsmci0 =
 {
@@ -129,7 +129,7 @@ bool sam_cardinserted_internal(struct sam_hsmci_state_s *state)
   /* Get the state of the PIO pin */
 
   inserted = sam_gpioread(state->cdcfg);
-  fllvdbg("Slot %d inserted: %s\n", state->slotno, inserted ? "NO" : "YES");
+  finfo("Slot %d inserted: %s\n", state->slotno, inserted ? "NO" : "YES");
   return !inserted;
 }
 
@@ -164,7 +164,7 @@ static int sam_hsmci_cardetect(struct sam_hsmci_state_s *state)
 }
 
 #ifdef CONFIG_SAMV7_HSMCI0
-static int sam_hsmci0_cardetect(int irq, void *regs)
+static int sam_hsmci0_cardetect(int irq, void *regs, FAR void *arg)
 {
   int ret;
 
@@ -226,7 +226,7 @@ int sam_hsmci_initialize(int slotno, int minor)
   state = sam_hsmci_state(slotno);
   if (!state)
     {
-      fdbg("ERROR: No state for slotno %d\n", slotno);
+      ferr("ERROR: No state for slotno %d\n", slotno);
       return -EINVAL;
     }
 
@@ -247,7 +247,7 @@ int sam_hsmci_initialize(int slotno, int minor)
   state->hsmci = sdio_initialize(slotno);
   if (!state->hsmci)
     {
-      fdbg("ERROR: Failed to initialize SDIO slot %d\n",  slotno);
+      ferr("ERROR: Failed to initialize SDIO slot %d\n",  slotno);
       return -ENODEV;
     }
 
@@ -256,14 +256,14 @@ int sam_hsmci_initialize(int slotno, int minor)
   ret = mmcsd_slotinitialize(minor, state->hsmci);
   if (ret != OK)
     {
-      fdbg("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
+      ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
       return ret;
     }
 
   /* Configure card detect interrupts */
 
   sam_gpioirq(state->cdcfg);
-  (void)irq_attach(state->irq, state->handler);
+  (void)irq_attach(state->irq, state->handler, NULL);
 
   /* Then inform the HSMCI driver if there is or is not a card in the slot. */
 
@@ -293,7 +293,7 @@ bool sam_cardinserted(int slotno)
   state = sam_hsmci_state(slotno);
   if (!state)
     {
-      fdbg("ERROR: No state for slotno %d\n", slotno);
+      ferr("ERROR: No state for slotno %d\n", slotno);
       return false;
     }
 
diff --git a/configs/same70-xplained/src/sam_mcan.c b/configs/same70-xplained/src/sam_mcan.c
index d0430ed1ceef8845f169420d11df535b9d3858b5..5a96930a6393f6dd7aa7b86241cdab5034da4217 100644
--- a/configs/same70-xplained/src/sam_mcan.c
+++ b/configs/same70-xplained/src/sam_mcan.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/same70-xplainedk/src/sam_mcan.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -43,13 +43,13 @@
 #include 
 #include 
 
-#include 
+#include 
 #include 
 
 #include "sam_mcan.h"
 #include "same70-xplained.h"
 
-#if defined(CONFIG_CAN) && (defined(CONFIG_SAMV7_MCAN0) || defined(CONFIG_SAMV7_MCAN1))
+#ifdef CONFIG_SAMV7_MCAN
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -67,68 +67,46 @@
 #  define CAN_PORT 1
 #endif
 
-/* Debug ***************************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
-
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
-#else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
-#endif
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_can_initialize
+ * Name: sam_can_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/can.
+ *  Initialize CAN and register the CAN device
  *
  ************************************************************************************/
 
-int board_can_initialize(void)
+int sam_can_setup(void)
 {
-  static bool initialized = false;
+#if defined(CONFIG_SAMV7_MCAN0) || defined(CONFIG_SAMV7_MCAN1)
   struct can_dev_s *can;
   int ret;
 
-  /* Check if we have already initialized */
+  /* Call stm32_caninitialize() to get an instance of the CAN interface */
 
-  if (!initialized)
+  can = sam_mcan_initialize(CAN_PORT);
+  if (can == NULL)
     {
-      /* Call stm32_caninitialize() to get an instance of the CAN interface */
-
-      can = sam_mcan_initialize(CAN_PORT);
-      if (can == NULL)
-        {
-          candbg("ERROR:  Failed to get CAN interface\n");
-          return -ENODEV;
-        }
-
-      /* Register the CAN driver at "/dev/can0" */
-
-      ret = can_register("/dev/can0", can);
-      if (ret < 0)
-        {
-          candbg("ERROR: can_register failed: %d\n", ret);
-          return ret;
-        }
+      canerr("ERROR:  Failed to get CAN interface\n");
+      return -ENODEV;
+    }
 
-      /* Now we are initialized */
+  /* Register the CAN driver at "/dev/can0" */
 
-      initialized = true;
+  ret = can_register("/dev/can0", can);
+  if (ret < 0)
+    {
+      canerr("ERROR: can_register failed: %d\n", ret);
+      return ret;
     }
 
   return OK;
+#else
+  return -ENODEV;
+#endif
 }
 
-#endif /* CONFIG_CAN && (CONFIG_SAMV7_MCAN0 || CONFIG_SAMV7_MCAN1) */
+#endif /* CONFIG_SAMV7_MCAN */
diff --git a/configs/same70-xplained/src/sam_spi.c b/configs/same70-xplained/src/sam_spi.c
index df0ba7b489acf495516273af60cf43ec4e8e7e47..c21979060b7ceeb2df562c6c4eeeb23effc3bcdb 100644
--- a/configs/same70-xplained/src/sam_spi.c
+++ b/configs/same70-xplained/src/sam_spi.c
@@ -55,32 +55,6 @@
 
 #ifdef CONFIG_SAMV7_SPI
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
diff --git a/configs/same70-xplained/src/sam_usbdev.c b/configs/same70-xplained/src/sam_usbdev.c
index e75322a37d3580259d9e4ff884c7eb5599df02c9..ae0f54f3e0e95d095bdf89ce16ccc9d2e9e480ab 100644
--- a/configs/same70-xplained/src/sam_usbdev.c
+++ b/configs/same70-xplained/src/sam_usbdev.c
@@ -94,5 +94,5 @@ void sam_usbinitialize(void)
 
 void sam_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
diff --git a/configs/same70-xplained/src/same70-xplained.h b/configs/same70-xplained/src/same70-xplained.h
index db003b48ce53c203123339faa7dfdfb48f67ce78..ed0e98e15644770cd9144c76d7e0b9e17b901a6b 100644
--- a/configs/same70-xplained/src/same70-xplained.h
+++ b/configs/same70-xplained/src/same70-xplained.h
@@ -91,12 +91,12 @@
 #  define CONFIG_NSH_MMCSDMINOR 0
 #endif
 
-#ifndef CONFIG_NSH_MMCSDMINOR
+#ifndef CONFIG_NSH_MMCSDSLOTNO
 #  define CONFIG_NSH_MMCSDSLOTNO 0
 #endif
 
-#if CONFIG_NSH_MMCSDMINOR != 0
-#  error SAME70 has only one MMC/SD slot (CONFIG_NSH_MMCSDMINOR)
+#if CONFIG_NSH_MMCSDSLOTNO != 0
+#  error SAME70 has only one MMC/SD slot (CONFIG_NSH_MMCSDSLOTNO)
 #  undef CONFIG_NSH_MMCSDSLOTNO
 #  define CONFIG_NSH_MMCSDSLOTNO 0
 #endif
@@ -157,7 +157,7 @@
 #  undef CONFIG_USBDEV_TRACE
 #endif
 
-#if !defined(CONFIG_SYSTEM_USBMONITOR) || !defined(CONFIG_USBDEV_TRACE)
+#if !defined(CONFIG_USBMONITOR) || !defined(CONFIG_USBDEV_TRACE)
 #  undef HAVE_USBMONITOR
 #endif
 
@@ -349,6 +349,18 @@ void sam_sdram_config(void);
 int sam_bringup(void);
 #endif
 
+/************************************************************************************
+ * Name: sam_dacdev_initialize
+ *
+ * Description:
+ *   Called to configure DAC peripheral module
+ *
+ ************************************************************************************/
+
+#if defined(CONFIG_SAMV7_DAC0) || defined(CONFIG_SAMV7_DAC1)
+int sam_dacdev_initialize(void);
+#endif
+
 /************************************************************************************
  * Name: sam_spidev_initialize
  *
@@ -388,6 +400,18 @@ int sam_hsmci_initialize(int slot, int minor);
 void sam_usbinitialize(void);
 #endif
 
+/****************************************************************************
+ * Name: sam_can_setup
+ *
+ * Description:
+ *  Initialize CAN and register the CAN device
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SAMV7_MCAN
+int sam_can_setup(void);
+#endif
+
 /************************************************************************************
  * Name: sam_netinitialize
  *
diff --git a/configs/saml21-xplained/include/board.h b/configs/saml21-xplained/include/board.h
index 7decc79f168c7c04ef07432f93a1ecb29341c1c4..ec93296ec80bc194800e74b81727a200ccc2ffee 100644
--- a/configs/saml21-xplained/include/board.h
+++ b/configs/saml21-xplained/include/board.h
@@ -44,7 +44,7 @@
 
 #ifndef __ASSEMBLY__
 #  include 
-#  ifdef CONFIG_GPIO_IRQ
+#  ifdef CONFIG_SAMDL_GPIOIRQ
 #    include 
 #  endif
 #endif
diff --git a/configs/saml21-xplained/nsh/Make.defs b/configs/saml21-xplained/nsh/Make.defs
index 25498abe9be188743948084b6904967b043092b7..86e3dc31d7a1b002fc660c1df80650b3c5bba28f 100644
--- a/configs/saml21-xplained/nsh/Make.defs
+++ b/configs/saml21-xplained/nsh/Make.defs
@@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/saml21-xplained/nsh/defconfig b/configs/saml21-xplained/nsh/defconfig
index c44ddac15aa0d9660900ad1f0a33bec2876443e8..17d2f1d50fdcb5a40b7801c3d7b78a561cc6778f 100644
--- a/configs/saml21-xplained/nsh/defconfig
+++ b/configs/saml21-xplained/nsh/defconfig
@@ -46,10 +46,11 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,10 +76,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +98,7 @@ CONFIG_ARCH_CHIP_SAML=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -119,11 +120,14 @@ CONFIG_ARCH_CORTEXM0=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv6-m"
 CONFIG_ARCH_CHIP="samdl"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 # CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 
 #
@@ -436,7 +440,12 @@ CONFIG_DEV_NULL=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -444,6 +453,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -452,9 +462,10 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -478,10 +489,6 @@ CONFIG_USART4_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -522,15 +529,18 @@ CONFIG_USART4_2STOP=0
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -568,12 +578,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -635,12 +639,14 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -684,10 +690,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -697,35 +703,33 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -747,8 +751,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -759,6 +763,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -870,12 +875,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -883,6 +888,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/saml21-xplained/src/sam_autoleds.c b/configs/saml21-xplained/src/sam_autoleds.c
index 73716879c13dbeca549668893662a7c73bf28fa3..53bff4eab0d9eb9d8625f62d1add6d59fc5e0f48 100644
--- a/configs/saml21-xplained/src/sam_autoleds.c
+++ b/configs/saml21-xplained/src/sam_autoleds.c
@@ -77,30 +77,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/saml21-xplained/src/sam_buttons.c b/configs/saml21-xplained/src/sam_buttons.c
index ea8994df6aa8ad5e41e6eb9be1e18c0c3a17e399..437c4d7ec8572da10ddcec1dd459175427586b67 100644
--- a/configs/saml21-xplained/src/sam_buttons.c
+++ b/configs/saml21-xplained/src/sam_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/saml21-xplained/src/sam_buttons.c
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -53,22 +54,6 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-#if defined(CONFIG_PORTA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-static xcpt_t g_irqsw0;
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -111,8 +96,7 @@ uint8_t board_buttons(void)
  * Description:
  *   This function may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is one
- *   of the BUTTON* definitions provided above. The previous interrupt
- *   handler address isreturned (so that it may restored, if so desired).
+ *   of the BUTTON* definitions provided above.
  *
  * Configuration Notes:
  *   Configuration CONFIG_AVR32_PORTIRQ must be selected to enable the
@@ -124,9 +108,9 @@ uint8_t board_buttons(void)
  ****************************************************************************/
 
 #if defined(CONFIG_PORTA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   if (id == BUTTON_SW0)
     {
@@ -138,22 +122,19 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
 
       flags = enter_critical_section();
 
-      /* Get the old button interrupt handler and save the new one */
-
-      oldhandler = *g_irqsw0;
-      *g_irqsw0 = irqhandler;
-
       /* Configure the interrupt */
 
       sam_portirq(IRQ_SW0);
-      (void)irq_attach(IRQ_SW0, irqhandler);
+      (void)irq_attach(IRQ_SW0, irqhandler, arg);
       sam_portirqenable(IRQ_SW0);
+
       leave_critical_section(flags);
+      ret = OK;
     }
 
   /* Return the old button handler (so that it can be restored) */
 
-  return oldhandler;
+  return ret;
 }
 #endif
 
diff --git a/configs/saml21-xplained/src/sam_mmcsd.c b/configs/saml21-xplained/src/sam_mmcsd.c
index a8ca098282fe1a9e2649fe1413b1a786831b3415..b57f1d58ffba77fc72552e3cf22c5cfab0a354f3 100644
--- a/configs/saml21-xplained/src/sam_mmcsd.c
+++ b/configs/saml21-xplained/src/sam_mmcsd.c
@@ -95,30 +95,30 @@ int sam_sdinitialize(int port, int minor)
 
   /* Get the SPI driver instance for the SD chip select */
 
-  fvdbg("Initializing SERCOM SPI%d\n", port);
+  finfo("Initializing SERCOM SPI%d\n", port);
 
   spi = sam_spibus_initialize(port);
   if (!spi)
     {
-      fdbg("Failed to initialize SPI%d\n", port);
+      ferr("ERROR: Failed to initialize SPI%d\n", port);
       return -ENODEV;
     }
 
-  fvdbg("Successfully initialized SPI%d\n", port);
+  finfo("Successfully initialized SPI%d\n", port);
 
   /* Bind the SPI device for the chip select to the slot */
 
-  fvdbg("Binding SPI%d to MMC/SD slot %d\n", port, SAMDL_MMCSDSLOTNO);
+  finfo("Binding SPI%d to MMC/SD slot %d\n", port, SAMDL_MMCSDSLOTNO);
 
   ret = mmcsd_spislotinitialize(minor, SAMDL_MMCSDSLOTNO, spi);
   if (ret < 0)
     {
-      fdbg("Failed to bind SPI%d to MMC/SD slot %d: %d\n",
+      ferr("ERROR: Failed to bind SPI%d to MMC/SD slot %d: %d\n",
             port, SAMDL_MMCSDSLOTNO, ret);
       return ret;
     }
 
-  fvdbg("Successfuly bound SPI%d to MMC/SD slot %d\n",
+  finfo("Successfuly bound SPI%d to MMC/SD slot %d\n",
         port, SAMDL_MMCSDSLOTNO);
 
   return OK;
diff --git a/configs/saml21-xplained/src/sam_spi.c b/configs/saml21-xplained/src/sam_spi.c
index 00eea22563262fd42e1dfb2e10c2ef9b677a10c3..ae1238eb2d504dbd6c46324cf8a8f58e0390ef33 100644
--- a/configs/saml21-xplained/src/sam_spi.c
+++ b/configs/saml21-xplained/src/sam_spi.c
@@ -53,32 +53,6 @@
 
 #ifdef SAMDL_HAVE_SPI
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/saml21-xplained/src/sam_ug2832hsweg04.c b/configs/saml21-xplained/src/sam_ug2832hsweg04.c
index 3e67622d16a4015e897f57a751eb37b8e353b02a..0cbdb6f7953921de3bfef67ab6442405c6d042a7 100644
--- a/configs/saml21-xplained/src/sam_ug2832hsweg04.c
+++ b/configs/saml21-xplained/src/sam_ug2832hsweg04.c
@@ -144,16 +144,6 @@
 #  error "The OLED driver requires CONFIG_SPI_CMDDATA in the configuration"
 #endif
 
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg(format, ...)   dbg(format, ##__VA_ARGS__)
-#  define lcdvdbg(format, ...)  vdbg(format, ##__VA_ARGS__)
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -187,7 +177,7 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
   spi = sam_spibus_initialize(OLED_CSNO);
   if (!spi)
     {
-      lcddbg("Failed to initialize SPI port 1\n");
+      lcderr("ERROR: Failed to initialize SPI port 1\n");
     }
   else
     {
@@ -196,11 +186,11 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
       dev = ssd1306_initialize(spi, devno);
       if (!dev)
         {
-          lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno);
+          lcderr("ERROR: Failed to bind SPI port 1 to OLED %d: %d\n", devno);
         }
      else
         {
-          lcdvdbg("Bound SPI port 1 to OLED %d\n", devno);
+          lcdinfo("Bound SPI port 1 to OLED %d\n", devno);
 
           /* And turn the OLED on */
 
diff --git a/configs/saml21-xplained/src/sam_userleds.c b/configs/saml21-xplained/src/sam_userleds.c
index ab22a0408e5bba59438b42045c966283df8b8a27..94cf3550eb39aa2870e0f2502af84a6f4007f58a 100644
--- a/configs/saml21-xplained/src/sam_userleds.c
+++ b/configs/saml21-xplained/src/sam_userleds.c
@@ -62,30 +62,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/samv71-xult/README.txt b/configs/samv71-xult/README.txt
index bbde3150da1ae743264bfb46a87cfb206a916120..5821d14b4f6251859063ada9560c20d1ec990356 100644
--- a/configs/samv71-xult/README.txt
+++ b/configs/samv71-xult/README.txt
@@ -704,7 +704,6 @@ Selecting the GMAC peripheral
 
   Networking Support
     CONFIG_NET=y                         : Enable Neworking
-    CONFIG_NET_NOINTS=y                  : Use the work queue, not interrupts for processing
     CONFIG_NET_SOCKOPTS=y                : Enable socket operations
     CONFIG_NET_ETH_MTU=562               : Maximum packet size (MTU) 1518 is more standard
     CONFIG_NET_ETH_TCP_RECVWNDO=562      : Should be the same as CONFIG_NET_ETH_MTU
@@ -1323,10 +1322,6 @@ MCAN1 Loopback Test
        CONFIG_SAMV7_MCAN1_TXFIFOQ_SIZE=8       # There are 8 queue elements
        CONFIG_SAMV7_MCAN1_TXEVENTFIFO_SIZE=0   # The event FIFO is not used
 
-    Board Selection
-       CONFIG_LIB_BOARDCTL=y                   # Needed for CAN initialization
-       CONFIG_BOARDCTL_CANINIT=y               # Enabled CAN initialization
-
     Enabling the CAN Loopback Test
     ------------------------------
     Application Configuration -> Examples -> CAN Example
@@ -1335,9 +1330,9 @@ MCAN1 Loopback Test
     Enabling CAN Debug Output
     -------------------------
     Build Setup -> Debug Options
-      CONFIG_DEBUG=y                           # Enables general debug features
-      CONFIG_DEBUG_VERBOSE=y                   # Enables verbose output
-      CONFIG_DEBUG_CAN=y                       # Enables debug output from CAN
+      CONFIG_DEBUG_FEATURES=y                  # Enables general debug features
+      CONFIG_DEBUG_INFO=y                      # Enables verbose output
+      CONFIG_DEBUG_CAN_INFO=y                  # Enables debug output from CAN
 
       CONFIG_STACK_COLORATION=y                # Monitor stack usage
       CONFIG_DEBUG_SYMBOLS=y                   # Needed only for use with a debugger
@@ -1657,7 +1652,7 @@ Configuration sub-directories
   knsh:
 
     This is identical to the nsh configuration below except that NuttX
-    is built as a kernel-mode, monolithic module and the user applications
+    is built as a protected mode, monolithic module and the user applications
     are built separately.  There are four very similar NSH configurations:
 
       - knsh.  This is a somewhat simplified version of the nsh configuration
@@ -1761,6 +1756,35 @@ Configuration sub-directories
         but assumes that you have a maXTouch Xplained Pro LCD attached
         and includes extra tests for the touchscreen and LCD.
 
+    NOTES:
+
+    1. Kernel Modules / Shared Libraries
+
+       I intend to use this configuration for testing NuttX kernel modules
+       in the FLAT build with the following configuration additions to the
+       configuration file:
+
+         CONFIG_BOARDCTL_OS_SYMTAB=y
+         CONFIG_EXAMPLES_MODULE=y
+         CONFIG_EXAMPLES_MODULE_BINDIR="/mnt/sdcard"
+         CONFIG_FS_ROMFS=y
+         CONFIG_LIBC_ARCH_ELF=y
+         CONFIG_MODULE=y
+         CONFIG_LIBC_MODLIB=y
+         CONFIG_MODLIB_ALIGN_LOG2=2
+         CONFIG_MODLIB_BUFFERINCR=32
+         CONFIG_MODLIB_BUFFERSIZE=128
+
+       Add the following for testing shared libraries in the FLAT
+       build:
+
+         CONFIG_LIBC_DLLFCN=y
+         CONFIG_EXAMPLES_SOTEST=y
+         CONFIG_EXAMPLES_SOTEST_BINDIR="/mnt/sdcard"
+
+    STATUS:
+    2017-01-30: Does not yet run correctly.
+
   mxtxplnd:
 
     Configures the NuttShell (nsh) located at examples/nsh.  There are five
@@ -2053,36 +2077,7 @@ Configuration sub-directories
          RAMTest: Address-in-address test: 70000000 2097152
          nsh>
 
-    5. The button test at apps/examples/buttons is included in the
-       configuration.  This configuration illustrates (1) use of the buttons
-       on the evaluation board, and (2) the use of PIO interrupts.  Example
-       usage:
-
-       NuttShell (NSH) NuttX-7.8
-       nsh> help
-       help usage:  help [-v] []
-       ...
-       Builtin Apps:
-         buttons
-       nsh> buttons 3
-       maxbuttons: 3
-       Attached handler at 4078f7 to button 0 [SW0], oldhandler:0
-       Attached handler at 4078e9 to button 1 [SW1], oldhandler:0
-       IRQ:125 Button 1:SW1 SET:00:
-         SW1 released
-       IRQ:125 Button 1:SW1 SET:02:
-         SW1 depressed
-       IRQ:125 Button 1:SW1 SET:00:
-         SW1 released
-       IRQ:90 Button 0:SW0 SET:01:
-         SW0 depressed
-       IRQ:90 Button 0:SW0 SET:00:
-         SW0 released
-       IRQ:125 Button 1:SW1 SET:02:
-         SW1 depressed
-       nsh>
-
-    6. TWI/I2C
+    5. TWI/I2C
 
        TWIHS0 is enabled in this configuration.  The SAM V71 Xplained Ultra
        supports two devices on the one on-board I2C device on the TWIHS0 bus:
@@ -2159,11 +2154,11 @@ Configuration sub-directories
        the AT2 EEPROM (I am not sure what the other address, 0x37, is
        as this writing).
 
-    7. TWIHS0 is also used to support 256 byte non-volatile storage for
+    6. TWIHS0 is also used to support 256 byte non-volatile storage for
        configuration data using the MTD configuration as described above
        under the heading, "MTD Configuration Data".
 
-    8. Support for HSMCI is built-in by default. The SAMV71-XULT provides
+    7. Support for HSMCI is built-in by default. The SAMV71-XULT provides
        one full-size SD memory card slot.  Refer to the section entitled
        "SD card" for configuration-related information.
 
@@ -2172,7 +2167,7 @@ Configuration sub-directories
        The auto-mounter is not enabled.  See the section above entitled
        "Auto-Mounter".
 
-    9. Performance-related Configuration settings:
+    8. Performance-related Configuration settings:
 
        CONFIG_ARMV7M_ICACHE=y                : Instruction cache is enabled
        CONFIG_ARMV7M_DCACHE=y                : Data cache is enabled
@@ -2511,8 +2506,10 @@ Configuration sub-directories
            rect = (FAR struct vnc_fbupdate_s *)sq_remfirst(&session->updqueue);
            DEBUGASSERT(rect != NULL);
 
-        I would think that could mean only that the semaphore counting is
-        out of sync with the number of updates in the queue.
+         I would think that could mean only that the semaphore counting is
+         out of sync with the number of updates in the queue.
+
+         But also the assertion at devif/devif_iobsend.c line: 102 which
+         probably means some kind of memory corruption.
 
-        But also the assertion at devif/devif_iobsend.c line: 102 which
-        probably means some kind of memory corruption.
+       2017-01-30: knsh configuration does not yet run correctly.
diff --git a/configs/samv71-xult/kernel/Makefile b/configs/samv71-xult/kernel/Makefile
index a71e019eb0ef07d9700e46bb45a0d137dd9239ec..05e332e0501b35147235b68026ed668bef216dca 100644
--- a/configs/samv71-xult/kernel/Makefile
+++ b/configs/samv71-xult/kernel/Makefile
@@ -52,11 +52,17 @@ ifeq ($(WINTOOL),y)
   USER_LIBPATHS = ${shell for path in $(USERLIBS); do dir=`dirname $(TOPDIR)$(DELIM)$$path`;echo "-L\"`cygpath -w $$dir`\"";done}
   USER_LDSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld}"
   USER_LDSCRIPT += -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld}"
+  USER_HEXFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.hex}"
+  USER_SRECFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.srec}"
+  USER_BINFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.bin}"
 else
   # Linux/Cygwin-native toolchain
   USER_LIBPATHS = $(addprefix -L$(TOPDIR)$(DELIM),$(dir $(USERLIBS)))
   USER_LDSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld
   USER_LDSCRIPT += -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld
+  USER_HEXFILE += "$(TOPDIR)$(DELIM)nuttx_user.hex"
+  USER_SRECFILE += "$(TOPDIR)$(DELIM)nuttx_user.srec"
+  USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin"
 endif
 
 USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT)
@@ -87,15 +93,15 @@ $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf
 	$(Q) cp -a nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.elf
 ifeq ($(CONFIG_INTELHEX_BINARY),y)
 	@echo "CP: nuttx_user.hex"
-	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.hex
+	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(USER_HEXFILE)
 endif
 ifeq ($(CONFIG_MOTOROLA_SREC),y)
 	@echo "CP: nuttx_user.srec"
-	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.srec
+	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(USER_SRECFILE)
 endif
 ifeq ($(CONFIG_RAW_BINARY),y)
 	@echo "CP: nuttx_user.bin"
-	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.bin
+	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(USER_BINFILE)
 endif
 
 $(TOPDIR)$(DELIM)User.map: nuttx_user.elf
diff --git a/configs/samv71-xult/knsh/Make.defs b/configs/samv71-xult/knsh/Make.defs
index c5bbfe8f3367e7dc1971d8bf1a4e7ae82f46653d..bba90e6b11d1fbd4ebd8f578ae0106b204f30fc5 100644
--- a/configs/samv71-xult/knsh/Make.defs
+++ b/configs/samv71-xult/knsh/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # configs/samv71-xult/knsh/Make.defs
 #
-#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -37,11 +37,8 @@ include ${TOPDIR}/.config
 include ${TOPDIR}/tools/Config.mk
 include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
 
-ifeq ($(CONFIG_ARMV7M_DTCM),y)
-  LDSCRIPT = flash-dtcm.ld
-else
-  LDSCRIPT = flash-sram.ld
-endif
+LDSCRIPT1 = memory.ld
+LDSCRIPT2 = kernel-space.ld
 
 ifeq ($(WINTOOL),y)
   # Windows-native toolchains
@@ -50,13 +47,15 @@ ifeq ($(WINTOOL),y)
   MKDEP = $(TOPDIR)/tools/mkwindeps.sh
   ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
   ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
-  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT1)}"
+  ARCHSCRIPT += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT2)}"
 else
   # Linux/Cygwin-native toolchain
   MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
   ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
   ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
-  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT1)
+  ARCHSCRIPT += -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT2)
 endif
 
 CC = $(CROSSDEV)gcc
@@ -80,7 +79,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
@@ -97,6 +96,17 @@ NXFLATLDFLAGS1 = -r -d -warn-common
 NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
 LDNXFLATFLAGS = -e main -s 2048
 
+# Loadable module definitions
+
+CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
+
+LDMODULEFLAGS = -r -e module_initialize
+ifeq ($(WINTOOL),y)
+  LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libc/modlib/gnu-elf.ld}"
+else
+  LDMODULEFLAGS += -T $(TOPDIR)/libc/modlib/gnu-elf.ld
+endif
+
 ASMEXT = .S
 OBJEXT = .o
 LIBEXT = .a
diff --git a/configs/samv71-xult/knsh/defconfig b/configs/samv71-xult/knsh/defconfig
index de6d5d57f67a26822707b622ad575ea6d46c82c0..369dcc43d4cefc1d954e705a8979dacac75c8ccc 100644
--- a/configs/samv71-xult/knsh/defconfig
+++ b/configs/samv71-xult/knsh/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -51,10 +53,11 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -68,10 +71,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -81,7 +86,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -112,7 +116,9 @@ CONFIG_ARCH_CHIP_SAMV7=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 CONFIG_ARCH_CORTEXM7=y
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -166,8 +172,6 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # SAMV7 Configuration Options
@@ -200,6 +204,7 @@ CONFIG_ARCH_CHIP_SAMV71Q=y
 # CONFIG_ARCH_CHIP_SAMV71J is not set
 # CONFIG_SAMV7_MCAN is not set
 CONFIG_SAMV7_HAVE_MCAN1=y
+# CONFIG_SAMV7_DAC is not set
 CONFIG_SAMV7_HAVE_DAC1=y
 CONFIG_SAMV7_HAVE_EBI=y
 # CONFIG_SAMV7_EMAC is not set
@@ -270,6 +275,13 @@ CONFIG_SAMV7_UART3=y
 # CONFIG_SAMV7_USART2 is not set
 # CONFIG_SAMV7_WDT is not set
 # CONFIG_SAMV7_RSWDT is not set
+# CONFIG_SAMV7_JTAG_DISABLE is not set
+CONFIG_SAMV7_JTAG_FULL_ENABLE=y
+# CONFIG_SAMV7_JTAG_FULL_SW_ENABLE is not set
+# CONFIG_SAMV7_JTAG_SW_ENABLE is not set
+# CONFIG_SAMV7_ERASE_DISABLE is not set
+CONFIG_SAMV7_ERASE_ENABLE=y
+# CONFIG_SAMV7_SYSTEMRESET is not set
 CONFIG_SAMV7_GPIO_IRQ=y
 CONFIG_SAMV7_GPIOA_IRQ=y
 CONFIG_SAMV7_GPIOB_IRQ=y
@@ -288,10 +300,12 @@ CONFIG_SAMV7_SDRAMSIZE=2097152
 # TWIHS device driver options
 #
 CONFIG_SAMV7_TWIHS0_FREQUENCY=100000
+CONFIG_SAMV7_TWIHS0_GLITCH_FILTER=1
 
 #
 # HSMCI device driver options
 #
+CONFIG_SAMV7_HSMCI_DMA=y
 # CONFIG_SAMV7_HSMCI_RDPROOF is not set
 # CONFIG_SAMV7_HSMCI_WRPROOF is not set
 # CONFIG_SAMV7_HSMCI_UNALIGNED is not set
@@ -314,7 +328,7 @@ CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
-# CONFIG_ARCH_HAVE_RESET is not set
+CONFIG_ARCH_HAVE_RESET=y
 CONFIG_ARCH_USE_MPU=y
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -371,18 +385,16 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
 # CONFIG_SAMV71XULT_MXTXPLND is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -404,6 +416,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2015
 CONFIG_START_MONTH=11
@@ -416,6 +429,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -432,6 +446,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -502,6 +518,7 @@ CONFIG_SYS_NNEST=2
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -514,26 +531,33 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
 # CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
-# CONFIG_ARCH_HAVE_I2CRESET is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
 CONFIG_I2C=y
 # CONFIG_I2C_SLAVE is not set
 # CONFIG_I2C_POLLED is not set
+# CONFIG_I2C_RESET is not set
 # CONFIG_I2C_TRACE is not set
 CONFIG_I2C_DRIVER=y
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+CONFIG_ARCH_HAVE_SPI_CS_CONTROL=y
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_TIMERS_CS2100CP is not set
@@ -542,8 +566,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -551,6 +585,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -559,10 +594,12 @@ CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
 CONFIG_MMCSD_HAVECARDDETECT=y
 # CONFIG_MMCSD_SPI is not set
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
 CONFIG_MMCSD_SDIO=y
 # CONFIG_SDIO_PREFLIGHT is not set
 # CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_SDIO_BLOCKSETUP=y
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -595,12 +632,16 @@ CONFIG_MTD_AT25=y
 CONFIG_AT25_SPIMODE=0
 CONFIG_AT25_SPIFREQUENCY=20000000
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -608,9 +649,10 @@ CONFIG_AT25_SPIFREQUENCY=20000000
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -634,10 +676,6 @@ CONFIG_UART3_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -660,19 +698,26 @@ CONFIG_UART3_2STOP=0
 # CONFIG_UART3_IFLOWCONTROL is not set
 # CONFIG_UART3_OFLOWCONTROL is not set
 # CONFIG_UART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -726,12 +771,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MTD is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -777,11 +816,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -799,18 +855,23 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_USRWORK is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -829,18 +890,19 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_IGMP is not set
 # CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_KEYPADTEST is not set
-# CONFIG_EXAMPLES_IGMP is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -849,20 +911,18 @@ CONFIG_ARCH_HAVE_TLS=y
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -874,14 +934,15 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -901,8 +962,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -913,6 +975,7 @@ CONFIG_EXAMPLES_NSH=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -966,12 +1029,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 CONFIG_NSH_DISABLE_MKFATFS=y
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 CONFIG_NSH_DISABLE_MKRD=y
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -988,6 +1051,8 @@ CONFIG_NSH_DISABLE_MKRD=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
@@ -1026,11 +1091,11 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=0
 CONFIG_I2CTOOL_MAXBUS=0
@@ -1038,7 +1103,7 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=400000
-# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 CONFIG_SYSTEM_RAMTEST=y
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1046,6 +1111,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/samv71-xult/module/Make.defs b/configs/samv71-xult/module/Make.defs
index 2900024e899d622cc29c53f1e3c70262dde9ebc0..73079fb7f2f461d86d42f98e487a7269489b5911 100644
--- a/configs/samv71-xult/module/Make.defs
+++ b/configs/samv71-xult/module/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # configs/samv71-xult/module/Make.defs
 #
-#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
@@ -105,9 +105,9 @@ CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
 
 LDMODULEFLAGS = -r -e module_initialize
 ifeq ($(WINTOOL),y)
-  LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/sched/module/gnu-elf.ld}"
+  LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libc/modlib/gnu-elf.ld}"
 else
-  LDMODULEFLAGS += -T $(TOPDIR)/sched/module/gnu-elf.ld
+  LDMODULEFLAGS += -T $(TOPDIR)/libc/modlib/gnu-elf.ld
 endif
 
 ASMEXT = .S
diff --git a/configs/samv71-xult/module/defconfig b/configs/samv71-xult/module/defconfig
index b55a4699a4cf527c3a68407610d143b10887f3bb..2c060c0c5e20fe327515ef6bdef8a6b77d5102b5 100644
--- a/configs/samv71-xult/module/defconfig
+++ b/configs/samv71-xult/module/defconfig
@@ -12,8 +12,10 @@ CONFIG_EXPERIMENTAL=y
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +66,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +81,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -107,7 +111,9 @@ CONFIG_ARCH_CHIP_SAMV7=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 CONFIG_ARCH_CORTEXM7=y
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -192,6 +198,7 @@ CONFIG_ARCH_CHIP_SAMV71Q=y
 # CONFIG_ARCH_CHIP_SAMV71J is not set
 # CONFIG_SAMV7_MCAN is not set
 CONFIG_SAMV7_HAVE_MCAN1=y
+# CONFIG_SAMV7_DAC is not set
 CONFIG_SAMV7_HAVE_DAC1=y
 CONFIG_SAMV7_HAVE_EBI=y
 # CONFIG_SAMV7_EMAC is not set
@@ -262,6 +269,13 @@ CONFIG_SAMV7_UART3=y
 # CONFIG_SAMV7_USART2 is not set
 # CONFIG_SAMV7_WDT is not set
 # CONFIG_SAMV7_RSWDT is not set
+# CONFIG_SAMV7_JTAG_DISABLE is not set
+CONFIG_SAMV7_JTAG_FULL_ENABLE=y
+# CONFIG_SAMV7_JTAG_FULL_SW_ENABLE is not set
+# CONFIG_SAMV7_JTAG_SW_ENABLE is not set
+# CONFIG_SAMV7_ERASE_DISABLE is not set
+CONFIG_SAMV7_ERASE_ENABLE=y
+# CONFIG_SAMV7_SYSTEMRESET is not set
 CONFIG_SAMV7_GPIO_IRQ=y
 CONFIG_SAMV7_GPIOA_IRQ=y
 CONFIG_SAMV7_GPIOB_IRQ=y
@@ -288,7 +302,7 @@ CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
-# CONFIG_ARCH_HAVE_RESET is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -345,18 +359,17 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
 # CONFIG_SAMV71XULT_MXTXPLND is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_OS_SYMTAB=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -378,6 +391,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=3
@@ -407,6 +421,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -450,9 +466,6 @@ CONFIG_SIG_SIGWORK=17
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
 CONFIG_MODULE=y
-CONFIG_MODULE_ALIGN_LOG2=2
-CONFIG_MODULE_BUFFERSIZE=128
-CONFIG_MODULE_BUFFERINCR=32
 
 #
 # Work queue support
@@ -479,6 +492,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -491,15 +505,19 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
 # CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
-# CONFIG_ARCH_HAVE_I2CRESET is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+CONFIG_ARCH_HAVE_SPI_CS_CONTROL=y
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -507,8 +525,18 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -516,6 +544,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -524,9 +553,10 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -550,10 +580,6 @@ CONFIG_UART3_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -576,19 +602,26 @@ CONFIG_UART3_2STOP=0
 # CONFIG_UART3_IFLOWCONTROL is not set
 # CONFIG_UART3_OFLOWCONTROL is not set
 # CONFIG_UART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -642,12 +675,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -693,11 +720,36 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+CONFIG_LIBC_MODLIB=y
+
+#
+# Module library configuration
+#
+CONFIG_MODLIB_MAXDEPEND=2
+CONFIG_MODLIB_ALIGN_LOG2=2
+CONFIG_MODLIB_BUFFERSIZE=128
+CONFIG_MODLIB_BUFFERINCR=32
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+CONFIG_LIBC_ARCH_ELF=y
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -715,17 +767,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -750,64 +807,64 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 CONFIG_EXAMPLES_MODULE=y
-# CONFIG_EXAMPLES_MODULE_LIBC is not set
-# CONFIG_EXAMPLES_MODULE_LIBGCC is not set
+CONFIG_EXAMPLES_MODULE_BUILTINFS=y
 CONFIG_EXAMPLES_MODULE_DEVMINOR=0
 CONFIG_EXAMPLES_MODULE_DEVPATH="/dev/ram0"
+# CONFIG_EXAMPLES_MODULE_LIBC is not set
+# CONFIG_EXAMPLES_MODULE_LIBGCC is not set
 # CONFIG_EXAMPLES_MOUNT is not set
 # CONFIG_EXAMPLES_NRF24L01TERM is not set
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -831,8 +888,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -843,6 +901,7 @@ CONFIG_EXAMPLES_NSH=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -897,13 +956,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MODCMDS is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -920,11 +979,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -959,12 +1020,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -972,6 +1033,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/samv71-xult/mxtxplnd/Make.defs b/configs/samv71-xult/mxtxplnd/Make.defs
index e5463a1c116a8c91b0e0a96a2beb410af0627a05..cde78e72bb841841f63a6898b027b712fa45961b 100644
--- a/configs/samv71-xult/mxtxplnd/Make.defs
+++ b/configs/samv71-xult/mxtxplnd/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # configs/samv71-xult/mxtxplnd/Make.defs
 #
-#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
@@ -97,6 +97,17 @@ NXFLATLDFLAGS1 = -r -d -warn-common
 NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
 LDNXFLATFLAGS = -e main -s 2048
 
+# Loadable module definitions
+
+CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
+
+LDMODULEFLAGS = -r -e module_initialize
+ifeq ($(WINTOOL),y)
+  LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libc/modlib/gnu-elf.ld}"
+else
+  LDMODULEFLAGS += -T $(TOPDIR)/libc/modlib/gnu-elf.ld
+endif
+
 ASMEXT = .S
 OBJEXT = .o
 LIBEXT = .a
diff --git a/configs/samv71-xult/mxtxplnd/defconfig b/configs/samv71-xult/mxtxplnd/defconfig
index 93136214deceb1b44b4f78154e5a760c7ea088fb..858d40340faa4f0668594e8a52c0c32deadfb77b 100644
--- a/configs/samv71-xult/mxtxplnd/defconfig
+++ b/configs/samv71-xult/mxtxplnd/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +66,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,10 +81,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +103,7 @@ CONFIG_ARCH="arm"
 CONFIG_ARCH_CHIP_SAMV7=y
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -105,7 +111,9 @@ CONFIG_ARCH_CHIP_SAMV7=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 CONFIG_ARCH_CORTEXM7=y
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -119,6 +127,8 @@ CONFIG_ARCH_CORTEXM7=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="samv7"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 CONFIG_ARMV7M_CMNVECTOR=y
@@ -127,6 +137,7 @@ CONFIG_ARCH_HAVE_FPU=y
 CONFIG_ARCH_HAVE_DPFPU=y
 CONFIG_ARCH_FPU=y
 CONFIG_ARCH_DPFPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
@@ -142,6 +153,7 @@ CONFIG_ARMV7M_HAVE_ITCM=y
 CONFIG_ARMV7M_HAVE_DTCM=y
 # CONFIG_ARMV7M_ITCM is not set
 # CONFIG_ARMV7M_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -154,8 +166,6 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # SAMV7 Configuration Options
@@ -188,6 +198,7 @@ CONFIG_ARCH_CHIP_SAMV71Q=y
 # CONFIG_ARCH_CHIP_SAMV71J is not set
 # CONFIG_SAMV7_MCAN is not set
 CONFIG_SAMV7_HAVE_MCAN1=y
+# CONFIG_SAMV7_DAC is not set
 CONFIG_SAMV7_HAVE_DAC1=y
 CONFIG_SAMV7_HAVE_EBI=y
 # CONFIG_SAMV7_EMAC is not set
@@ -258,6 +269,13 @@ CONFIG_SAMV7_USART0=y
 # CONFIG_SAMV7_USART2 is not set
 # CONFIG_SAMV7_WDT is not set
 # CONFIG_SAMV7_RSWDT is not set
+# CONFIG_SAMV7_JTAG_DISABLE is not set
+CONFIG_SAMV7_JTAG_FULL_ENABLE=y
+# CONFIG_SAMV7_JTAG_FULL_SW_ENABLE is not set
+# CONFIG_SAMV7_JTAG_SW_ENABLE is not set
+# CONFIG_SAMV7_ERASE_DISABLE is not set
+CONFIG_SAMV7_ERASE_ENABLE=y
+# CONFIG_SAMV7_SYSTEMRESET is not set
 CONFIG_SAMV7_GPIO_IRQ=y
 CONFIG_SAMV7_GPIOA_IRQ=y
 CONFIG_SAMV7_GPIOB_IRQ=y
@@ -270,10 +288,12 @@ CONFIG_SAMV7_GPIOD_IRQ=y
 # TWIHS device driver options
 #
 CONFIG_SAMV7_TWIHS0_FREQUENCY=100000
+CONFIG_SAMV7_TWIHS0_GLITCH_FILTER=1
 
 #
 # HSMCI device driver options
 #
+CONFIG_SAMV7_HSMCI_DMA=y
 # CONFIG_SAMV7_HSMCI_RDPROOF is not set
 # CONFIG_SAMV7_HSMCI_WRPROOF is not set
 # CONFIG_SAMV7_HSMCI_UNALIGNED is not set
@@ -296,7 +316,7 @@ CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
-# CONFIG_ARCH_HAVE_RESET is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -353,8 +373,6 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
@@ -365,11 +383,11 @@ CONFIG_SAMV71XULT_MXTXPLND_LCD=y
 CONFIG_SAMV71XULT_MXT_I2CFREQUENCY=400000
 CONFIG_SAMV71XULT_MXT_DEVMINOR=0
 CONFIG_SAMV71XULT_LCD_BGCOLOR=0x00
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_TSCTEST=y
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -391,6 +409,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=3
@@ -403,6 +422,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -419,6 +439,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -488,6 +510,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -500,26 +523,33 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
 # CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
-# CONFIG_ARCH_HAVE_I2CRESET is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
 CONFIG_I2C=y
 # CONFIG_I2C_SLAVE is not set
 # CONFIG_I2C_POLLED is not set
+# CONFIG_I2C_RESET is not set
 # CONFIG_I2C_TRACE is not set
 CONFIG_I2C_DRIVER=y
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+CONFIG_ARCH_HAVE_SPI_CS_CONTROL=y
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_TIMERS_CS2100CP is not set
@@ -539,11 +569,20 @@ CONFIG_MXT_THRESHY=8
 # CONFIG_BUTTONS is not set
 # CONFIG_DJOYSTICK is not set
 # CONFIG_AJOYSTICK is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 # CONFIG_LCD_NOGETRUN is not set
@@ -558,6 +597,7 @@ CONFIG_LCD_MAXPOWER=1
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
 # CONFIG_LCD_UG9664HSWAG01 is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 # CONFIG_LCD_SSD1351 is not set
@@ -572,11 +612,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -584,6 +620,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -592,10 +629,12 @@ CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
 CONFIG_MMCSD_HAVECARDDETECT=y
 # CONFIG_MMCSD_SPI is not set
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
 CONFIG_MMCSD_SDIO=y
 # CONFIG_SDIO_PREFLIGHT is not set
 # CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_SDIO_BLOCKSETUP=y
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -628,12 +667,16 @@ CONFIG_MTD_AT25=y
 CONFIG_AT25_SPIMODE=0
 CONFIG_AT25_SPIFREQUENCY=20000000
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -641,9 +684,10 @@ CONFIG_AT25_SPIFREQUENCY=20000000
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -667,10 +711,6 @@ CONFIG_USART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -693,19 +733,26 @@ CONFIG_USART0_2STOP=0
 # CONFIG_USART0_IFLOWCONTROL is not set
 # CONFIG_USART0_OFLOWCONTROL is not set
 # CONFIG_USART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -759,12 +806,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MTD is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -773,6 +814,7 @@ CONFIG_NX_LCDDRIVER=y
 CONFIG_NX_NPLANES=1
 CONFIG_NX_BGCOLOR=0x0
 # CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -848,6 +890,7 @@ CONFIG_NXFONT_SANS23X27=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 # CONFIG_NXTERM is not set
 
 #
@@ -894,11 +937,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -916,15 +976,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -948,32 +1015,20 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
-CONFIG_EXAMPLES_BUTTONS=y
-CONFIG_EXAMPLES_BUTTONS_MIN=0
-CONFIG_EXAMPLES_BUTTONS_MAX=1
-CONFIG_EXAMPLES_IRQBUTTONS_MIN=0
-CONFIG_EXAMPLES_IRQBUTTONS_MAX=1
-CONFIG_EXAMPLES_BUTTONS_NAME0="SW0"
-CONFIG_EXAMPLES_BUTTONS_NAME1="SW1"
-CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2"
-CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3"
-CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4"
-CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5"
-CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6"
-CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -983,7 +1038,6 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
@@ -995,21 +1049,21 @@ CONFIG_EXAMPLES_NXLINES_LINEWIDTH=16
 CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=16
 CONFIG_EXAMPLES_NXLINES_BPP=16
 # CONFIG_EXAMPLES_NXLINES_EXTERNINIT is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1019,14 +1073,15 @@ CONFIG_EXAMPLES_TOUCHSCREEN_MINOR=0
 CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/input0"
 # CONFIG_EXAMPLES_TOUCHSCREEN_MOUSE is not set
 CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1046,8 +1101,9 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1058,6 +1114,7 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -1112,12 +1169,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1134,11 +1191,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -1172,12 +1232,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=0
 CONFIG_I2CTOOL_MAXBUS=0
@@ -1185,7 +1245,7 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=400000
-# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1193,6 +1253,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/samv71-xult/netnsh/Make.defs b/configs/samv71-xult/netnsh/Make.defs
index 4a0f316c078de8dc7682c71a3f8e7ff88260dc08..d4c3f7e9ca21b0526b9798bf5e8974c2871234ac 100644
--- a/configs/samv71-xult/netnsh/Make.defs
+++ b/configs/samv71-xult/netnsh/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # configs/samv71-xult/netnsh/Make.defs
 #
-#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
@@ -97,6 +97,17 @@ NXFLATLDFLAGS1 = -r -d -warn-common
 NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
 LDNXFLATFLAGS = -e main -s 2048
 
+# Loadable module definitions
+
+CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
+
+LDMODULEFLAGS = -r -e module_initialize
+ifeq ($(WINTOOL),y)
+  LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libc/modlib/gnu-elf.ld}"
+else
+  LDMODULEFLAGS += -T $(TOPDIR)/libc/modlib/gnu-elf.ld
+endif
+
 ASMEXT = .S
 OBJEXT = .o
 LIBEXT = .a
diff --git a/configs/samv71-xult/netnsh/defconfig b/configs/samv71-xult/netnsh/defconfig
index ccc9adb0d800c8af7af6184ae5816c60226b5038..adcd503dde6b308a8e17ada505de7989c7441500 100644
--- a/configs/samv71-xult/netnsh/defconfig
+++ b/configs/samv71-xult/netnsh/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -64,10 +67,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -77,7 +82,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -108,7 +112,9 @@ CONFIG_ARCH_CHIP_SAMV7=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 CONFIG_ARCH_CORTEXM7=y
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -161,8 +167,6 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # SAMV7 Configuration Options
@@ -195,7 +199,8 @@ CONFIG_ARCH_CHIP_SAMV71Q=y
 # CONFIG_ARCH_CHIP_SAMV71J is not set
 # CONFIG_SAMV7_MCAN is not set
 CONFIG_SAMV7_HAVE_MCAN1=y
-CONFIG_SAMV7_HAVE_DAC1=y
+# CONFIG_SAMV7_DAC is not set
+# CONFIG_SAMV7_HAVE_DAC1 is not set
 CONFIG_SAMV7_HAVE_EBI=y
 CONFIG_SAMV7_EMAC=y
 CONFIG_SAMV7_HSMCI=y
@@ -228,7 +233,6 @@ CONFIG_SAMV7_HAVE_USART2=y
 # CONFIG_SAMV7_MCAN0 is not set
 # CONFIG_SAMV7_MCAN1 is not set
 # CONFIG_SAMV7_DAC0 is not set
-# CONFIG_SAMV7_DAC1 is not set
 # CONFIG_SAMV7_EBI is not set
 CONFIG_SAMV7_EMAC0=y
 CONFIG_SAMV7_XDMAC=y
@@ -265,6 +269,13 @@ CONFIG_SAMV7_UART3=y
 # CONFIG_SAMV7_USART2 is not set
 # CONFIG_SAMV7_WDT is not set
 # CONFIG_SAMV7_RSWDT is not set
+# CONFIG_SAMV7_JTAG_DISABLE is not set
+CONFIG_SAMV7_JTAG_FULL_ENABLE=y
+# CONFIG_SAMV7_JTAG_FULL_SW_ENABLE is not set
+# CONFIG_SAMV7_JTAG_SW_ENABLE is not set
+# CONFIG_SAMV7_ERASE_DISABLE is not set
+CONFIG_SAMV7_ERASE_ENABLE=y
+# CONFIG_SAMV7_SYSTEMRESET is not set
 CONFIG_SAMV7_GPIO_IRQ=y
 CONFIG_SAMV7_GPIOA_IRQ=y
 CONFIG_SAMV7_GPIOB_IRQ=y
@@ -277,10 +288,12 @@ CONFIG_SAMV7_GPIOD_IRQ=y
 # TWIHS device driver options
 #
 CONFIG_SAMV7_TWIHS0_FREQUENCY=100000
+CONFIG_SAMV7_TWIHS0_GLITCH_FILTER=1
 
 #
 # HSMCI device driver options
 #
+CONFIG_SAMV7_HSMCI_DMA=y
 # CONFIG_SAMV7_HSMCI_RDPROOF is not set
 # CONFIG_SAMV7_HSMCI_WRPROOF is not set
 # CONFIG_SAMV7_HSMCI_UNALIGNED is not set
@@ -305,6 +318,7 @@ CONFIG_SAMV7_EMAC0_PHYSR_100FD=0x6
 CONFIG_SAMV7_EMAC0_ISETH0=y
 # CONFIG_SAMV7_EMAC_PREALLOCATE is not set
 # CONFIG_SAMV7_EMAC_NBC is not set
+CONFIG_SAMV7_EMAC_HPWORK=y
 
 #
 # Architecture Options
@@ -324,7 +338,7 @@ CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
-# CONFIG_ARCH_HAVE_RESET is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -381,18 +395,16 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
 # CONFIG_SAMV71XULT_MXTXPLND is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -414,6 +426,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=3
@@ -426,6 +439,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -442,6 +456,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -511,6 +527,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -523,26 +540,33 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
 # CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
-# CONFIG_ARCH_HAVE_I2CRESET is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
 CONFIG_I2C=y
 # CONFIG_I2C_SLAVE is not set
 # CONFIG_I2C_POLLED is not set
+# CONFIG_I2C_RESET is not set
 # CONFIG_I2C_TRACE is not set
 CONFIG_I2C_DRIVER=y
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+CONFIG_ARCH_HAVE_SPI_CS_CONTROL=y
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_TIMERS_CS2100CP is not set
@@ -551,8 +575,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -560,6 +594,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -568,10 +603,12 @@ CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
 CONFIG_MMCSD_HAVECARDDETECT=y
 # CONFIG_MMCSD_SPI is not set
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
 CONFIG_MMCSD_SDIO=y
 # CONFIG_SDIO_PREFLIGHT is not set
 # CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_SDIO_BLOCKSETUP=y
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -604,12 +641,16 @@ CONFIG_MTD_AT25=y
 CONFIG_AT25_SPIMODE=0
 CONFIG_AT25_SPIFREQUENCY=20000000
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -633,10 +674,8 @@ CONFIG_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -660,9 +699,10 @@ CONFIG_ETH0_PHY_KSZ8061=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -686,10 +726,6 @@ CONFIG_UART3_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -712,19 +748,26 @@ CONFIG_UART3_2STOP=0
 # CONFIG_UART3_IFLOWCONTROL is not set
 # CONFIG_UART3_OFLOWCONTROL is not set
 # CONFIG_UART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -732,13 +775,11 @@ CONFIG_UART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -891,12 +932,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MTD is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -941,11 +976,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -963,9 +1015,11 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -981,8 +1035,10 @@ CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1006,32 +1062,21 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
-CONFIG_EXAMPLES_BUTTONS=y
-CONFIG_EXAMPLES_BUTTONS_MIN=0
-CONFIG_EXAMPLES_BUTTONS_MAX=1
-CONFIG_EXAMPLES_IRQBUTTONS_MIN=0
-CONFIG_EXAMPLES_IRQBUTTONS_MAX=1
-CONFIG_EXAMPLES_BUTTONS_NAME0="SW0"
-CONFIG_EXAMPLES_BUTTONS_NAME1="SW1"
-CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2"
-CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3"
-CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4"
-CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5"
-CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6"
-CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1041,26 +1086,25 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1068,15 +1112,15 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1096,8 +1140,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1110,20 +1155,21 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1176,13 +1222,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1200,11 +1246,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -1226,6 +1275,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 CONFIG_NSH_NETINIT_THREAD=y
 CONFIG_NSH_NETINIT_MONITOR=y
 CONFIG_NSH_NETINIT_SIGNO=18
@@ -1273,12 +1323,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=0
 CONFIG_I2CTOOL_MAXBUS=0
@@ -1286,7 +1336,8 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=400000
-# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_MDIO is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1294,8 +1345,9 @@ CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
-# CONFIG_SYSTEM_MDIO is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/samv71-xult/nsh/Make.defs b/configs/samv71-xult/nsh/Make.defs
index 27f54d8e3f2194670b697ba0ded74fc02f09d2a7..da38e1e83fde9dcea8ad8926d21f65cad6f4033c 100644
--- a/configs/samv71-xult/nsh/Make.defs
+++ b/configs/samv71-xult/nsh/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # configs/samv71-xult/nsh/Make.defs
 #
-#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
@@ -97,6 +97,17 @@ NXFLATLDFLAGS1 = -r -d -warn-common
 NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
 LDNXFLATFLAGS = -e main -s 2048
 
+# Loadable module definitions
+
+CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
+
+LDMODULEFLAGS = -r -e module_initialize
+ifeq ($(WINTOOL),y)
+  LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libc/modlib/gnu-elf.ld}"
+else
+  LDMODULEFLAGS += -T $(TOPDIR)/libc/modlib/gnu-elf.ld
+endif
+
 ASMEXT = .S
 OBJEXT = .o
 LIBEXT = .a
diff --git a/configs/samv71-xult/nsh/defconfig b/configs/samv71-xult/nsh/defconfig
index 8734da85815a77f424bc8d3e16e94b311c6219b1..90d4a321fcfe9921229983c62b29e9d9648589df 100644
--- a/configs/samv71-xult/nsh/defconfig
+++ b/configs/samv71-xult/nsh/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +66,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +81,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -107,7 +111,9 @@ CONFIG_ARCH_CHIP_SAMV7=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 CONFIG_ARCH_CORTEXM7=y
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -160,8 +166,6 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # SAMV7 Configuration Options
@@ -194,6 +198,7 @@ CONFIG_ARCH_CHIP_SAMV71Q=y
 # CONFIG_ARCH_CHIP_SAMV71J is not set
 # CONFIG_SAMV7_MCAN is not set
 CONFIG_SAMV7_HAVE_MCAN1=y
+# CONFIG_SAMV7_DAC is not set
 CONFIG_SAMV7_HAVE_DAC1=y
 CONFIG_SAMV7_HAVE_EBI=y
 # CONFIG_SAMV7_EMAC is not set
@@ -264,6 +269,13 @@ CONFIG_SAMV7_UART3=y
 # CONFIG_SAMV7_USART2 is not set
 # CONFIG_SAMV7_WDT is not set
 # CONFIG_SAMV7_RSWDT is not set
+# CONFIG_SAMV7_JTAG_DISABLE is not set
+CONFIG_SAMV7_JTAG_FULL_ENABLE=y
+# CONFIG_SAMV7_JTAG_FULL_SW_ENABLE is not set
+# CONFIG_SAMV7_JTAG_SW_ENABLE is not set
+# CONFIG_SAMV7_ERASE_DISABLE is not set
+CONFIG_SAMV7_ERASE_ENABLE=y
+# CONFIG_SAMV7_SYSTEMRESET is not set
 CONFIG_SAMV7_GPIO_IRQ=y
 CONFIG_SAMV7_GPIOA_IRQ=y
 CONFIG_SAMV7_GPIOB_IRQ=y
@@ -282,10 +294,13 @@ CONFIG_SAMV7_SDRAMSIZE=2097152
 # TWIHS device driver options
 #
 CONFIG_SAMV7_TWIHS0_FREQUENCY=100000
+CONFIG_SAMV7_TWIHS0_GLITCH_FILTER=0
+CONFIG_SAMV7_TWIHS0_SINGLE_MASTER=y
 
 #
 # HSMCI device driver options
 #
+CONFIG_SAMV7_HSMCI_DMA=y
 # CONFIG_SAMV7_HSMCI_RDPROOF is not set
 # CONFIG_SAMV7_HSMCI_WRPROOF is not set
 # CONFIG_SAMV7_HSMCI_UNALIGNED is not set
@@ -308,7 +323,7 @@ CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
-# CONFIG_ARCH_HAVE_RESET is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -365,18 +380,16 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
 # CONFIG_SAMV71XULT_MXTXPLND is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -398,6 +411,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=3
@@ -410,6 +424,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -426,6 +441,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -495,6 +512,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -507,26 +525,33 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
 # CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
-# CONFIG_ARCH_HAVE_I2CRESET is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
 CONFIG_I2C=y
 # CONFIG_I2C_SLAVE is not set
 # CONFIG_I2C_POLLED is not set
+CONFIG_I2C_RESET=y
 # CONFIG_I2C_TRACE is not set
 CONFIG_I2C_DRIVER=y
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+CONFIG_ARCH_HAVE_SPI_CS_CONTROL=y
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_TIMERS_CS2100CP is not set
@@ -535,8 +560,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -544,6 +579,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -552,10 +588,12 @@ CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
 CONFIG_MMCSD_HAVECARDDETECT=y
 # CONFIG_MMCSD_SPI is not set
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
 CONFIG_MMCSD_SDIO=y
 # CONFIG_SDIO_PREFLIGHT is not set
 # CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_SDIO_BLOCKSETUP=y
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -588,12 +626,16 @@ CONFIG_MTD_AT25=y
 CONFIG_AT25_SPIMODE=0
 CONFIG_AT25_SPIFREQUENCY=20000000
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -601,9 +643,10 @@ CONFIG_AT25_SPIFREQUENCY=20000000
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -627,10 +670,6 @@ CONFIG_UART3_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -653,19 +692,26 @@ CONFIG_UART3_2STOP=0
 # CONFIG_UART3_IFLOWCONTROL is not set
 # CONFIG_UART3_OFLOWCONTROL is not set
 # CONFIG_UART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -719,12 +765,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MTD is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -769,11 +809,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -791,17 +848,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -825,32 +887,20 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
-CONFIG_EXAMPLES_BUTTONS=y
-CONFIG_EXAMPLES_BUTTONS_MIN=0
-CONFIG_EXAMPLES_BUTTONS_MAX=1
-CONFIG_EXAMPLES_IRQBUTTONS_MIN=0
-CONFIG_EXAMPLES_IRQBUTTONS_MAX=1
-CONFIG_EXAMPLES_BUTTONS_NAME0="SW0"
-CONFIG_EXAMPLES_BUTTONS_NAME1="SW1"
-CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2"
-CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3"
-CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4"
-CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5"
-CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6"
-CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -859,39 +909,39 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -911,8 +961,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -923,6 +974,7 @@ CONFIG_EXAMPLES_NSH=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -977,12 +1029,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -999,11 +1051,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -1037,12 +1092,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=0
 CONFIG_I2CTOOL_MAXBUS=0
@@ -1050,7 +1105,7 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=400000
-# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 CONFIG_SYSTEM_RAMTEST=y
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1058,6 +1113,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/samv71-xult/nxwm/Make.defs b/configs/samv71-xult/nxwm/Make.defs
index d4b883d507dd295a360dd4e2db5cd27ac33e71c6..049f8250f62133ec1c894410935e8664e2eb76a1 100644
--- a/configs/samv71-xult/nxwm/Make.defs
+++ b/configs/samv71-xult/nxwm/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # configs/samv71-xult/nxwm/Make.defs
 #
-#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
@@ -97,6 +97,17 @@ NXFLATLDFLAGS1 = -r -d -warn-common
 NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
 LDNXFLATFLAGS = -e main -s 2048
 
+# Loadable module definitions
+
+CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
+
+LDMODULEFLAGS = -r -e module_initialize
+ifeq ($(WINTOOL),y)
+  LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libc/modlib/gnu-elf.ld}"
+else
+  LDMODULEFLAGS += -T $(TOPDIR)/libc/modlib/gnu-elf.ld
+endif
+
 ASMEXT = .S
 OBJEXT = .o
 LIBEXT = .a
diff --git a/configs/samv71-xult/nxwm/defconfig b/configs/samv71-xult/nxwm/defconfig
index 7bba67ff6e2c3068000bfcc0196b337f11fdf110..be4635e332312ecef4ae49ee8dcb6f0ac0c839f7 100644
--- a/configs/samv71-xult/nxwm/defconfig
+++ b/configs/samv71-xult/nxwm/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +66,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +81,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -107,7 +111,9 @@ CONFIG_ARCH_CHIP_SAMV7=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 CONFIG_ARCH_CORTEXM7=y
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -160,8 +166,6 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # SAMV7 Configuration Options
@@ -194,6 +198,7 @@ CONFIG_ARCH_CHIP_SAMV71Q=y
 # CONFIG_ARCH_CHIP_SAMV71J is not set
 # CONFIG_SAMV7_MCAN is not set
 CONFIG_SAMV7_HAVE_MCAN1=y
+# CONFIG_SAMV7_DAC is not set
 CONFIG_SAMV7_HAVE_DAC1=y
 CONFIG_SAMV7_HAVE_EBI=y
 # CONFIG_SAMV7_EMAC is not set
@@ -264,6 +269,13 @@ CONFIG_SAMV7_USART0=y
 # CONFIG_SAMV7_USART2 is not set
 # CONFIG_SAMV7_WDT is not set
 # CONFIG_SAMV7_RSWDT is not set
+# CONFIG_SAMV7_JTAG_DISABLE is not set
+CONFIG_SAMV7_JTAG_FULL_ENABLE=y
+# CONFIG_SAMV7_JTAG_FULL_SW_ENABLE is not set
+# CONFIG_SAMV7_JTAG_SW_ENABLE is not set
+# CONFIG_SAMV7_ERASE_DISABLE is not set
+CONFIG_SAMV7_ERASE_ENABLE=y
+# CONFIG_SAMV7_SYSTEMRESET is not set
 CONFIG_SAMV7_GPIO_IRQ=y
 CONFIG_SAMV7_GPIOA_IRQ=y
 CONFIG_SAMV7_GPIOB_IRQ=y
@@ -276,10 +288,12 @@ CONFIG_SAMV7_GPIOD_IRQ=y
 # TWIHS device driver options
 #
 CONFIG_SAMV7_TWIHS0_FREQUENCY=100000
+CONFIG_SAMV7_TWIHS0_GLITCH_FILTER=1
 
 #
 # HSMCI device driver options
 #
+CONFIG_SAMV7_HSMCI_DMA=y
 # CONFIG_SAMV7_HSMCI_RDPROOF is not set
 # CONFIG_SAMV7_HSMCI_WRPROOF is not set
 # CONFIG_SAMV7_HSMCI_UNALIGNED is not set
@@ -302,7 +316,7 @@ CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
-# CONFIG_ARCH_HAVE_RESET is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -359,8 +373,6 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
@@ -371,11 +383,11 @@ CONFIG_SAMV71XULT_MXTXPLND_LCD=y
 CONFIG_SAMV71XULT_MXT_I2CFREQUENCY=400000
 CONFIG_SAMV71XULT_MXT_DEVMINOR=0
 CONFIG_SAMV71XULT_LCD_BGCOLOR=0x95fa
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_TSCTEST=y
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -397,6 +409,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=3
@@ -409,6 +422,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -426,6 +440,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -497,6 +513,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -509,26 +526,33 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
 # CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
-# CONFIG_ARCH_HAVE_I2CRESET is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
 CONFIG_I2C=y
 # CONFIG_I2C_SLAVE is not set
 # CONFIG_I2C_POLLED is not set
+# CONFIG_I2C_RESET is not set
 # CONFIG_I2C_TRACE is not set
 CONFIG_I2C_DRIVER=y
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+CONFIG_ARCH_HAVE_SPI_CS_CONTROL=y
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_TIMERS_CS2100CP is not set
@@ -548,11 +572,20 @@ CONFIG_MXT_THRESHY=8
 # CONFIG_BUTTONS is not set
 # CONFIG_DJOYSTICK is not set
 # CONFIG_AJOYSTICK is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 CONFIG_LCD_NOGETRUN=y
@@ -567,6 +600,7 @@ CONFIG_LCD_MAXPOWER=1
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
 # CONFIG_LCD_UG9664HSWAG01 is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 # CONFIG_LCD_SSD1351 is not set
@@ -581,11 +615,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -593,6 +623,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -601,10 +632,12 @@ CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
 CONFIG_MMCSD_HAVECARDDETECT=y
 # CONFIG_MMCSD_SPI is not set
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
 CONFIG_MMCSD_SDIO=y
 # CONFIG_SDIO_PREFLIGHT is not set
 # CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_SDIO_BLOCKSETUP=y
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -637,12 +670,16 @@ CONFIG_MTD_AT25=y
 CONFIG_AT25_SPIMODE=0
 CONFIG_AT25_SPIFREQUENCY=20000000
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -650,9 +687,10 @@ CONFIG_AT25_SPIFREQUENCY=20000000
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -676,10 +714,6 @@ CONFIG_USART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -702,19 +736,26 @@ CONFIG_USART0_2STOP=0
 # CONFIG_USART0_IFLOWCONTROL is not set
 # CONFIG_USART0_OFLOWCONTROL is not set
 # CONFIG_USART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -759,12 +800,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -773,6 +808,7 @@ CONFIG_NX_LCDDRIVER=y
 CONFIG_NX_NPLANES=1
 CONFIG_NX_BGCOLOR=0x95fa
 CONFIG_NX_WRITEONLY=y
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -848,13 +884,14 @@ CONFIG_NXFONT_SANS22X29B=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 CONFIG_NXTERM=y
 
 #
 # NxTerm Output Text/Graphics Options
 #
 CONFIG_NXTERM_BPP=16
-CONFIG_NXTERM_CURSORCHAR=137
+CONFIG_NXTERM_CURSORCHAR=95
 CONFIG_NXTERM_MXCHARS=396
 CONFIG_NXTERM_CACHESIZE=32
 CONFIG_NXTERM_LINESEPARATION=0
@@ -874,7 +911,10 @@ CONFIG_NX_MULTIUSER=y
 CONFIG_NX_BLOCKING=y
 CONFIG_NX_MXSERVERMSGS=32
 CONFIG_NX_MXCLIENTMSGS=16
-# CONFIG_NX_NXSTART is not set
+# CONFIG_NXSTART_EXTERNINIT is not set
+CONFIG_NXSTART_SERVERPRIO=110
+CONFIG_NXSTART_SERVERSTACK=2048
+CONFIG_NXSTART_DEVNO=0
 
 #
 # Memory Management
@@ -915,11 +955,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 CONFIG_LIBM=y
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 CONFIG_LIBC_FLOATINGPOINT=y
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -937,17 +994,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -979,9 +1041,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -990,10 +1052,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -1003,39 +1065,39 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1055,8 +1117,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1067,6 +1130,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -1121,12 +1185,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1143,11 +1207,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_FILEIOSIZE=512
@@ -1178,10 +1245,7 @@ CONFIG_NXWIDGETS=y
 #
 CONFIG_NXWIDGETS_FLICKERFREE=y
 # CONFIG_NXWIDGETS_EXTERNINIT is not set
-CONFIG_NXWIDGETS_DEVNO=0
 CONFIG_NXWIDGET_SERVERINIT=y
-CONFIG_NXWIDGETS_SERVERPRIO=110
-CONFIG_NXWIDGETS_SERVERSTACK=2048
 CONFIG_NXWIDGETS_CLIENTPRIO=100
 CONFIG_NXWIDGETS_LISTENERPRIO=100
 CONFIG_NXWIDGETS_LISTENERSTACK=2048
@@ -1191,6 +1255,7 @@ CONFIG_NXWIDGETS_LISTENERSTACK=2048
 # NXWidget Configuration
 #
 CONFIG_NXWIDGETS_BPP=16
+# CONFIG_NXWIDGETS_GREYSCALE is not set
 CONFIG_NXWIDGETS_SIZEOFCHAR=1
 
 #
@@ -1276,7 +1341,7 @@ CONFIG_NXWM_TOOLBAR_FONTID=5
 CONFIG_NXWM_STARTWINDOW_VSPACING=4
 CONFIG_NXWM_STARTWINDOW_HSPACING=4
 # CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set
-CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm"
+CONFIG_NXWM_STARTWINDOW_MQNAME="nxwm"
 CONFIG_NXWM_STARTWINDOW_MXMSGS=32
 CONFIG_NXWM_STARTWINDOW_MXMPRIO=42
 CONFIG_NXWM_STARTWINDOW_PRIO=100
@@ -1359,12 +1424,12 @@ CONFIG_NXWM_HEXCALCULATOR_FONTID=5
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=0
 CONFIG_I2CTOOL_MAXBUS=0
@@ -1372,7 +1437,7 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=400000
-# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1380,6 +1445,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/samv71-xult/scripts/memory.ld b/configs/samv71-xult/scripts/memory.ld
index ba736a8ebfe9ed0a8b360c6ad0d29a2bf8c99c90..8fa9267eaea4844c912be74f54ba4d0bc2ec66ab 100644
--- a/configs/samv71-xult/scripts/memory.ld
+++ b/configs/samv71-xult/scripts/memory.ld
@@ -40,9 +40,6 @@
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0400:0000 address range.
  *
- * NOTE: that the DTCM address of 0x2000:0000 is used for SRAM.  If DTCM is
- * disabled, then the accesses will actually occur on the AHB bus.
- *
  * The user space partition will be spanned with a single region of size
  * 2**n bytes.  The alignment of the user-space region must be the same.
  * As a consequence, as the user-space increases in size, the alignment
@@ -55,18 +52,18 @@
  *
  * A detailed memory map for the 384KB SRAM region is as follows:
  *
- *   0x20000 0000:  Kernel .data region.  Typical size: 0.1KB
- *   ------- ----   Kernel .bss  region.  Typical size: 1.8KB
- *   0x20000 0800:  Kernel IDLE thread stack (approximate).  Size is
- *                  determined by CONFIG_IDLETHREAD_STACKSIZE and
- *                  adjustments for alignment.  Typical is 1KB.
- *   ------- ----   Padded to 4KB
- *   0x20002 0000:  User .data region.  Size is variable.
- *   ------- ----   User .bss region  Size is variable.
- *   0x20000 2000:  Beginning of kernel heap.  Size determined by
- *                  CONFIG_MM_KERNEL_HEAPSIZE.
- *   ------- ----   Beginning of user heap.  Can vary with other settings.
- *   0x20004 0000:  End+1 of mappable internal SRAM
+ *   0x2040 0000:  Kernel .data region.  Typical size: 0.1KB
+ *   ------ ----   Kernel .bss  region.  Typical size: 1.8KB
+ *   0x2040 0800:  Kernel IDLE thread stack (approximate).  Size is
+ *                 determined by CONFIG_IDLETHREAD_STACKSIZE and
+ *                 adjustments for alignment.  Typical is 1KB.
+ *   ------ ----   Padded to 4KB
+ *   0x2042 0000:  User .data region.  Size is variable.
+ *   ------- ----  User .bss region  Size is variable.
+ *   0x2044 0000:  Beginning of kernel heap.  Size determined by
+ *                 CONFIG_MM_KERNEL_HEAPSIZE.
+ *   ------ ----   Beginning of user heap.  Can vary with other settings.
+ *   0x2046 0000:  End+1 of mappable internal SRAM
  */
 
 MEMORY
@@ -78,7 +75,7 @@ MEMORY
 
     /* 384Kb of internal SRAM */
 
-    ksram (rwx)      : ORIGIN = 0x20000000, LENGTH = 128K
-    usram (rwx)      : ORIGIN = 0x20020000, LENGTH = 128K
-    xsram (rwx)      : ORIGIN = 0x20040000, LENGTH = 128K
+    ksram (rwx)      : ORIGIN = 0x20400000, LENGTH = 128K
+    usram (rwx)      : ORIGIN = 0x20420000, LENGTH = 128K
+    xsram (rwx)      : ORIGIN = 0x20440000, LENGTH = 128K
 }
diff --git a/configs/samv71-xult/src/sam_appinit.c b/configs/samv71-xult/src/sam_appinit.c
index f7215ff46507c3aeaeca433fb5751ada19642134..9e59395cc1016d8684283a11031579c1a7448c3b 100644
--- a/configs/samv71-xult/src/sam_appinit.c
+++ b/configs/samv71-xult/src/sam_appinit.c
@@ -45,7 +45,7 @@
 
 #include "samv71-xult.h"
 
-#if defined(CONFIG_LIB_BOARDCTL) && !defined(CONFIG_BUILD_KERNEL)
+#ifdef CONFIG_LIB_BOARDCTL
 
 /****************************************************************************
  * Public Functions
@@ -87,4 +87,4 @@ int board_app_initialize(uintptr_t arg)
 #endif
 }
 
-#endif /* CONFIG_LIB_BOARDCTL && !CONFIG_BUILD_KERNEL */
+#endif /* CONFIG_LIB_BOARDCTL */
diff --git a/configs/samv71-xult/src/sam_at24config.c b/configs/samv71-xult/src/sam_at24config.c
index 7191454e47288bcd0e3844d09f1f7538960f9624..af13bf34fa5281558b6468edeed6ae399d2d2b25 100644
--- a/configs/samv71-xult/src/sam_at24config.c
+++ b/configs/samv71-xult/src/sam_at24config.c
@@ -42,7 +42,7 @@
 #include 
 #include 
 
-#include 
+#include 
 #include 
 #include 
 
@@ -75,7 +75,7 @@ int sam_at24config(void)
   i2c = sam_i2cbus_initialize(0);
   if (!i2c)
     {
-      fdbg("ERROR: Failed to initialize TWI0\n");
+      ferr("ERROR: Failed to initialize TWI0\n");
       return -ENODEV;
     }
 
@@ -84,7 +84,7 @@ int sam_at24config(void)
   at24 = at24c_initialize(i2c);
   if (!at24)
     {
-      fdbg("ERROR: Failed to initialize the AT24 driver\n");
+      ferr("ERROR: Failed to initialize the AT24 driver\n");
       (void)sam_i2cbus_uninitialize(i2c);
       return -ENODEV;
     }
@@ -94,7 +94,7 @@ int sam_at24config(void)
   ret = at24->ioctl(at24, MTDIOC_EXTENDED, 0);
   if (ret < 0)
     {
-      fdbg("ERROR: AT24 ioctl(MTDIOC_EXTENDED) failed: %d\n", ret);
+      ferr("ERROR: AT24 ioctl(MTDIOC_EXTENDED) failed: %d\n", ret);
     }
 
   /* Bind the instance of an MTD device to the /dev/config device. */
@@ -102,7 +102,7 @@ int sam_at24config(void)
   ret = mtdconfig_register(at24);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to bind AT24 driver to the MTD config device\n");
+      ferr("ERROR: Failed to bind AT24 driver to the MTD config device\n");
       (void)sam_i2cbus_uninitialize(i2c);
     }
 
diff --git a/configs/samv71-xult/src/sam_audio_null.c b/configs/samv71-xult/src/sam_audio_null.c
index 2dedb31eba353bae65a18f18fe83105481a3f808..a1edbc5019ea0ec6be2adb06ced62d90fa6752a4 100644
--- a/configs/samv71-xult/src/sam_audio_null.c
+++ b/configs/samv71-xult/src/sam_audio_null.c
@@ -100,7 +100,7 @@ int sam_audio_null_initialize(int minor)
   char devname[12];
   int ret;
 
-  auddbg("minor %d\n", minor);
+  audinfo("minor %d\n", minor);
   DEBUGASSERT(minor >= 0 && minor <= 25);
 
   /* Have we already initialized?  Since we never uninitialize we must prevent
@@ -117,7 +117,7 @@ int sam_audio_null_initialize(int minor)
       nullaudio = audio_null_initialize();
       if (!nullaudio)
         {
-          auddbg("Failed to get the NULL audio interface\n");
+          auderr("ERROR: Failed to get the NULL audio interface\n");
           ret = -ENODEV;
           goto errout;
         }
@@ -130,7 +130,7 @@ int sam_audio_null_initialize(int minor)
       pcm = pcm_decode_initialize(nullaudio);
       if (!pcm)
         {
-          auddbg("ERROR: Failed create the PCM decoder\n");
+          auderr("ERROR: Failed create the PCM decoder\n");
           ret = -ENODEV;
           goto errout_with_nullaudio;
         }
@@ -144,7 +144,7 @@ int sam_audio_null_initialize(int minor)
       ret = audio_register(devname, pcm);
       if (ret < 0)
         {
-          auddbg("ERROR: Failed to register /dev/%s device: %d\n", devname, ret);
+          auderr("ERROR: Failed to register /dev/%s device: %d\n", devname, ret);
           goto errout_with_pcm;
         }
 
diff --git a/configs/samv71-xult/src/sam_autoleds.c b/configs/samv71-xult/src/sam_autoleds.c
index 1009489cf16c4635c66f0dbfbd61d1f7be3af4a0..a528c1db6ef43def6c8c3f847750716857e38b66 100644
--- a/configs/samv71-xult/src/sam_autoleds.c
+++ b/configs/samv71-xult/src/sam_autoleds.c
@@ -93,30 +93,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/samv71-xult/src/sam_bringup.c b/configs/samv71-xult/src/sam_bringup.c
index dce34997e50e93ef603996678e373042d0766e42..b24cfc96432f036d7dbcc05367cdf16f837ad67d 100644
--- a/configs/samv71-xult/src/sam_bringup.c
+++ b/configs/samv71-xult/src/sam_bringup.c
@@ -43,15 +43,16 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 
-#ifdef CONFIG_SYSTEM_USBMONITOR
-#  include 
+#ifdef CONFIG_USBMONITOR
+#  include 
 #endif
 
-#include 
-#include 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -99,14 +100,6 @@
   (((n)+CONFIG_SAMV71XULT_ROMFS_ROMDISK_SECTSIZE-1) / \
    CONFIG_SAMV71XULT_ROMFS_ROMDISK_SECTSIZE)
 
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_BOARD_INITIALIZE
-#  define SYSLOG lldbg
-#else
-#  define SYSLOG dbg
-#endif
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -128,14 +121,15 @@ static void sam_i2c_register(int bus)
   i2c = sam_i2cbus_initialize(bus);
   if (i2c == NULL)
     {
-      dbg("ERROR: Failed to get I2C%d interface\n", bus);
+      syslog(LOG_ERR, "ERROR: Failed to get I2C%d interface\n", bus);
     }
   else
     {
       ret = i2c_register(i2c, bus);
       if (ret < 0)
         {
-          dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
+          syslog(LOG_ERR, "ERROR: Failed to register I2C%d driver: %d\n",
+                 bus, ret);
           sam_i2cbus_uninitialize(i2c);
         }
     }
@@ -206,7 +200,8 @@ int sam_bringup(void)
   ret = userled_lower_initialize(LED_DRIVER_PATH);
   if (ret < 0)
     {
-      SYSLOG("ERROR: userled_lower_initialize() failed: %d\n", ret);
+      syslog(LOG_ERR, "ERROR: userled_lower_initialize() failed: %d\n",
+             ret);
     }
 #endif
 
@@ -216,7 +211,8 @@ int sam_bringup(void)
   i2c = sam_i2cbus_initialize(PCF85263_TWI_BUS);
   if (i2c == NULL)
     {
-      SYSLOG("ERROR: sam_i2cbus_initialize(%d) failed\n", PCF85263_TWI_BUS);
+      syslog(LOG_ERR, "ERROR: sam_i2cbus_initialize(%d) failed\n",
+             PCF85263_TWI_BUS);
     }
   else
     {
@@ -225,7 +221,8 @@ int sam_bringup(void)
       ret = pcf85263_rtc_initialize(i2c);
       if (ret < 0)
         {
-          SYSLOG("ERROR: pcf85263_rtc_initialize() failed: %d\n", ret);
+          syslog(LOG_ERR, "ERROR: pcf85263_rtc_initialize() failed: %d\n",
+                 ret);
         }
       else
         {
@@ -241,7 +238,8 @@ int sam_bringup(void)
   i2c = sam_i2cbus_initialize(DSXXXX_TWI_BUS);
   if (i2c == NULL)
     {
-      SYSLOG("ERROR: sam_i2cbus_initialize(%d) failed\n", DSXXXX_TWI_BUS);
+      syslog(LOG_ERR, "ERROR: sam_i2cbus_initialize(%d) failed\n",
+             DSXXXX_TWI_BUS);
     }
   else
     {
@@ -250,7 +248,8 @@ int sam_bringup(void)
       ret = dsxxxx_rtc_initialize(i2c);
       if (ret < 0)
         {
-          SYSLOG("ERROR: dsxxxx_rtc_initialize() failed: %d\n", ret);
+          syslog(LOG_ERR, "ERROR: dsxxxx_rtc_initialize() failed: %d\n",
+                 ret);
         }
       else
         {
@@ -261,6 +260,16 @@ int sam_bringup(void)
     }
 #endif
 
+#ifdef CONFIG_SAMV7_MCAN
+  /* Initialize CAN and register the CAN driver. */
+
+  ret = sam_can_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: sam_can_setup failed: %d\n", ret);
+    }
+#endif
+
 #ifdef HAVE_MACADDR
   /* Read the Ethernet MAC address from the AT24 FLASH and configure the
    * Ethernet driver with that address.
@@ -269,7 +278,7 @@ int sam_bringup(void)
   ret = sam_emac0_setmac();
   if (ret < 0)
     {
-      SYSLOG("ERROR: sam_emac0_setmac() failed: %d\n", ret);
+      syslog(LOG_ERR, "ERROR: sam_emac0_setmac() failed: %d\n", ret);
     }
 #endif
 
@@ -279,7 +288,7 @@ int sam_bringup(void)
   ret = mount(NULL, SAMV71_PROCFS_MOUNTPOINT, "procfs", 0, NULL);
   if (ret < 0)
     {
-      SYSLOG("ERROR: Failed to mount procfs at %s: %d\n",
+      syslog(LOG_ERR, "ERROR: Failed to mount procfs at %s: %d\n",
              SAMV71_PROCFS_MOUNTPOINT, ret);
     }
 #endif
@@ -292,7 +301,7 @@ int sam_bringup(void)
   ret = sam_at24config();
   if (ret < 0)
     {
-      SYSLOG("ERROR: sam_at24config() failed: %d\n", ret);
+      syslog(LOG_ERR, "ERROR: sam_at24config() failed: %d\n", ret);
     }
 #endif
 
@@ -302,7 +311,7 @@ int sam_bringup(void)
   ret = sam_hsmci_initialize(HSMCI0_SLOTNO, HSMCI0_MINOR);
   if (ret < 0)
     {
-      SYSLOG("ERROR: sam_hsmci_initialize(%d,%d) failed: %d\n",
+      syslog(LOG_ERR, "ERROR: sam_hsmci_initialize(%d,%d) failed: %d\n",
              HSMCI0_SLOTNO, HSMCI0_MINOR, ret);
     }
 
@@ -319,7 +328,7 @@ int sam_bringup(void)
 
       if (ret < 0)
         {
-          SYSLOG("ERROR: Failed to mount %s: %d\n",
+          syslog(LOG_ERR, "ERROR: Failed to mount %s: %d\n",
                  CONFIG_SAMV71XULT_HSMCI0_MOUNT_MOUNTPOINT, errno);
         }
     }
@@ -341,7 +350,7 @@ int sam_bringup(void)
                          CONFIG_SAMV71XULT_ROMFS_ROMDISK_SECTSIZE);
   if (ret < 0)
     {
-      SYSLOG("ERROR: romdisk_register failed: %d\n", -ret);
+      syslog(LOG_ERR, "ERROR: romdisk_register failed: %d\n", -ret);
     }
   else
     {
@@ -352,7 +361,7 @@ int sam_bringup(void)
                   "romfs", MS_RDONLY, NULL);
       if (ret < 0)
         {
-          SYSLOG("ERROR: mount(%s,%s,romfs) failed: %d\n",
+          syslog(LOG_ERR, "ERROR: mount(%s,%s,romfs) failed: %d\n",
                  CONFIG_SAMV71XULT_ROMFS_ROMDISK_DEVNAME,
                  CONFIG_SAMV71XULT_ROMFS_MOUNT_MOUNTPOINT, errno);
         }
@@ -365,7 +374,7 @@ int sam_bringup(void)
   qspi = sam_qspi_initialize(0);
   if (!qspi)
     {
-      SYSLOG("ERROR: sam_qspi_initialize failed\n");
+      syslog(LOG_ERR, "ERROR: sam_qspi_initialize failed\n");
     }
   else
     {
@@ -376,7 +385,7 @@ int sam_bringup(void)
       mtd = s25fl1_initialize(qspi, true);
       if (!mtd)
         {
-          SYSLOG("ERROR: s25fl1_initialize failed\n");
+          syslog(LOG_ERR, "ERROR: s25fl1_initialize failed\n");
         }
 
 #ifdef HAVE_S25FL1_SMARTFS
@@ -385,7 +394,7 @@ int sam_bringup(void)
       ret = smart_initialize(S25FL1_SMART_MINOR, mtd, NULL);
       if (ret != OK)
         {
-          SYSLOG("ERROR: Failed to initialize SmartFS: %d\n", ret);
+          syslog(LOG_ERR, "ERROR: Failed to initialize SmartFS: %d\n", ret);
         }
 
 #elif defined(HAVE_S25FL1_NXFFS)
@@ -394,7 +403,7 @@ int sam_bringup(void)
       ret = nxffs_initialize(mtd);
       if (ret < 0)
         {
-         SYSLOG("ERROR: NXFFS initialization failed: %d\n", ret);
+         syslog(LOG_ERR, "ERROR: NXFFS initialization failed: %d\n", ret);
         }
 
       /* Mount the file system at /mnt/s25fl1 */
@@ -402,7 +411,8 @@ int sam_bringup(void)
       ret = mount(NULL, "/mnt/s25fl1", "nxffs", 0, NULL);
       if (ret < 0)
         {
-          SYSLOG("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
+          syslog(LOG_ERR, "ERROR: Failed to mount the NXFFS volume: %d\n",
+                 errno);
           return ret;
         }
 
@@ -412,7 +422,8 @@ int sam_bringup(void)
       ret = ftl_initialize(S25FL1_MTD_MINOR, mtd);
       if (ret < 0)
         {
-          SYSLOG("ERROR: Failed to initialize the FTL layer: %d\n", ret);
+          syslog(LOG_ERR, "ERROR: Failed to initialize the FTL layer: %d\n",
+                 ret);
           return ret;
         }
 
@@ -426,7 +437,8 @@ int sam_bringup(void)
       ret = bchdev_register(blockdev, chardev, false);
       if (ret < 0)
         {
-          SYSLOG("ERROR: bchdev_register %s failed: %d\n", chardev, ret);
+          syslog(LOG_ERR, "ERROR: bchdev_register %s failed: %d\n",
+                 chardev, ret);
           return ret;
         }
 #endif
@@ -443,7 +455,7 @@ int sam_bringup(void)
   mtd = progmem_initialize();
   if (!mtd)
     {
-      SYSLOG("ERROR: progmem_initialize failed\n");
+      syslog(LOG_ERR, "ERROR: progmem_initialize failed\n");
     }
 
   /* Use the FTL layer to wrap the MTD driver as a block driver */
@@ -451,7 +463,8 @@ int sam_bringup(void)
   ret = ftl_initialize(PROGMEM_MTD_MINOR, mtd);
   if (ret < 0)
     {
-      SYSLOG("ERROR: Failed to initialize the FTL layer: %d\n", ret);
+      syslog(LOG_ERR, "ERROR: Failed to initialize the FTL layer: %d\n",
+             ret);
       return ret;
     }
 
@@ -465,7 +478,8 @@ int sam_bringup(void)
   ret = bchdev_register(blockdev, chardev, false);
   if (ret < 0)
     {
-      SYSLOG("ERROR: bchdev_register %s failed: %d\n", chardev, ret);
+      syslog(LOG_ERR, "ERROR: bchdev_register %s failed: %d\n",
+             chardev, ret);
       return ret;
     }
 #endif
@@ -478,17 +492,17 @@ int sam_bringup(void)
   ret = sam_usbhost_initialize();
   if (ret != OK)
     {
-      SYSLOG("ERROR: Failed to initialize USB host: %d\n", ret);
+      syslog(LOG_ERR, "ERROR: Failed to initialize USB host: %d\n", ret);
     }
 #endif
 
 #ifdef HAVE_USBMONITOR
   /* Start the USB Monitor */
 
-  ret = usbmonitor_start(0, NULL);
+  ret = usbmonitor_start();
   if (ret != OK)
     {
-      SYSLOG("ERROR: Failed to start the USB monitor: %d\n", ret);
+      syslog(LOG_ERR, "ERROR: Failed to start the USB monitor: %d\n", ret);
     }
 #endif
 
@@ -498,7 +512,8 @@ int sam_bringup(void)
   ret = sam_wm8904_initialize(0);
   if (ret != OK)
     {
-      SYSLOG("ERROR: Failed to initialize WM8904 audio: %d\n", ret);
+      syslog(LOG_ERR, "ERROR: Failed to initialize WM8904 audio: %d\n",
+             ret);
     }
 #endif
 
@@ -508,18 +523,22 @@ int sam_bringup(void)
   ret = sam_audio_null_initialize(0);
   if (ret != OK)
     {
-      SYSLOG("ERROR: Failed to initialize the NULL audio device: %d\n", ret);
+      syslog(LOG_ERR,
+             "ERROR: Failed to initialize the NULL audio device: %d\n",
+             ret);
     }
 #endif
 
 #ifdef HAVE_ELF
   /* Initialize the ELF binary loader */
 
-  SYSLOG("Initializing the ELF binary loader\n");
+  syslog(LOG_ERR, "Initializing the ELF binary loader\n");
   ret = elf_initialize();
   if (ret < 0)
     {
-      SYSLOG("ERROR: Initialization of the ELF loader failed: %d\n", ret);
+      syslog(LOG_ERR,
+             "ERROR: Initialization of the ELF loader failed: %d\n",
+             ret);
     }
 #endif
 
diff --git a/configs/samv71-xult/src/sam_buttons.c b/configs/samv71-xult/src/sam_buttons.c
index 2a80362388018ee15bf1bdb40941f92c03637cd1..7c9a98b52cd5d5d1b498b1e8401ad7df322382cf 100644
--- a/configs/samv71-xult/src/sam_buttons.c
+++ b/configs/samv71-xult/src/sam_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sam4e-ek/src/sam_buttons.c
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -64,18 +65,10 @@
  ****************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-
-#define HAVE_IRQBUTTONS 1
-#if !defined(CONFIG_SAMV7_GPIOA_IRQ) && !defined(CONFIG_SAMV7_GPIOB_IRQ)
-#  undef HAVE_IRQBUTTONS
-#endif
-
-#ifdef CONFIG_SAMV7_GPIOA_IRQ
-static xcpt_t g_irq_sw0;
-#endif
-#ifdef CONFIG_SAMV7_GPIOB_IRQ
-static xcpt_t g_irq_sw1;
-#endif
+#  define HAVE_IRQBUTTONS 1
+#  if !defined(CONFIG_SAMV7_GPIOA_IRQ) && !defined(CONFIG_SAMV7_GPIOB_IRQ)
+#    undef HAVE_IRQBUTTONS
+#  endif
 #endif
 
 /****************************************************************************
@@ -91,10 +84,9 @@ static xcpt_t g_irq_sw1;
  ****************************************************************************/
 
 #ifdef HAVE_IRQBUTTONS
-static xcpt_t board_button_irqx(gpio_pinset_t pinset, int irq,
-                                xcpt_t irqhandler, xcpt_t *store)
+static int board_button_irqx(gpio_pinset_t pinset, int irq, xcpt_t irqhandler,
+                             void *arg)
 {
-  xcpt_t oldhandler;
   irqstate_t flags;
 
   /* Disable interrupts until we are done.  This guarantees that the following
@@ -103,11 +95,6 @@ static xcpt_t board_button_irqx(gpio_pinset_t pinset, int irq,
 
   flags = enter_critical_section();
 
-  /* Get the old button interrupt handler and save the new one */
-
-  oldhandler = *store;
-  *store = irqhandler;
-
   /* Are we attaching or detaching? */
 
   if (irqhandler != NULL)
@@ -115,7 +102,7 @@ static xcpt_t board_button_irqx(gpio_pinset_t pinset, int irq,
       /* Configure the interrupt */
 
       sam_gpioirq(pinset);
-      (void)irq_attach(irq, irqhandler);
+      (void)irq_attach(irq, irqhandler, arg);
       sam_gpioirqenable(irq);
     }
   else
@@ -127,10 +114,7 @@ static xcpt_t board_button_irqx(gpio_pinset_t pinset, int irq,
     }
 
   leave_critical_section(flags);
-
-  /* Return the old button handler (so that it can be restored) */
-
-  return oldhandler;
+  return OK;
 }
 #endif
 
@@ -195,8 +179,7 @@ uint8_t board_buttons(void)
  * Description:
  *   This function may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is one
- *   of the BUTTON* definitions provided above. The previous interrupt
- *   handler address is returned (so that it may restored, if so desired).
+ *   of the BUTTON* definitions provided above.
  *
  * Configuration Notes:
  *   Configuration CONFIG_AVR32_GPIOIRQ must be selected to enable the
@@ -208,7 +191,7 @@ uint8_t board_buttons(void)
  ****************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
 #ifdef HAVE_IRQBUTTONS
 
@@ -216,21 +199,21 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
     {
 #ifdef CONFIG_SAMV7_GPIOA_IRQ
       case BUTTON_SW0:
-        return board_button_irqx(GPIO_SW0, IRQ_SW0, irqhandler, &g_irq_sw0);
+        return board_button_irqx(GPIO_SW0, IRQ_SW0, irqhandler, arg);
 #endif
 
 #ifdef CONFIG_SAMV7_GPIOB_IRQ
       case BUTTON_SW1:
-        return board_button_irqx(GPIO_SW1, IRQ_SW1, irqhandler, &g_irq_sw1);
+        return board_button_irqx(GPIO_SW1, IRQ_SW1, irqhandler, arg);
 #endif
 
       default:
-        return NULL;
+        return -EINVAL;
     }
 
 #else
 
-  return NULL;
+  return -ENOSYS;
 
 #endif
 }
diff --git a/configs/samv71-xult/src/sam_ethernet.c b/configs/samv71-xult/src/sam_ethernet.c
index e6d36ad4cfbae1eef49f25d686bac0f7a7a07dc5..1278b4d6be0c02ba07656665bf67463ae12134ea 100644
--- a/configs/samv71-xult/src/sam_ethernet.c
+++ b/configs/samv71-xult/src/sam_ethernet.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/samv71-xult/src/sam_ethernet.c
  *
- *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,8 +42,8 @@
 /* Force verbose debug on in this file only to support unit-level testing. */
 
 #ifdef CONFIG_NETDEV_PHY_DEBUG
-#  undef  CONFIG_DEBUG_VERBOSE
-#  define CONFIG_DEBUG_VERBOSE 1
+#  undef  CONFIG_DEBUG_INFO
+#  define CONFIG_DEBUG_INFO 1
 #  undef  CONFIG_DEBUG_NET
 #  define CONFIG_DEBUG_NET 1
 #endif
@@ -80,19 +80,13 @@
  */
 
 #ifdef CONFIG_NETDEV_PHY_DEBUG
-#  define phydbg    dbg
-#  define phylldbg  lldbg
+#  define phyerr    _err
+#  define phywarn   _warn
+#  define phyinfo   _info
 #else
-#  define phydbg(x...)
-#  define phylldbg(x...)
-#endif
-
-/************************************************************************************
- * Private Data
- ************************************************************************************/
-
-#ifdef CONFIG_SAMV7_GPIOA_IRQ
-static xcpt_t g_emac0_handler;
+#  define phyerr(x...)
+#  define phywarn(x...)
+#  define phyinfo(x...)
 #endif
 
 /************************************************************************************
@@ -106,7 +100,7 @@ static xcpt_t g_emac0_handler;
 #ifdef CONFIG_SAMV7_GPIOA_IRQ
 static void sam_emac0_phy_enable(bool enable)
 {
-  phydbg("IRQ%d: enable=%d\n", IRQ_EMAC0_INT, enable);
+  phyinfo("IRQ%d: enable=%d\n", IRQ_EMAC0_INT, enable);
   if (enable)
     {
       sam_gpioirqenable(IRQ_EMAC0_INT);
@@ -134,7 +128,7 @@ void weak_function sam_netinitialize(void)
 {
   /* Configure the PHY interrupt GPIO */
 
-  phydbg("Configuring %08x\n", GPIO_EMAC0_INT);
+  phyinfo("Configuring %08x\n", GPIO_EMAC0_INT);
   sam_configgpio(GPIO_EMAC0_INT);
 
   /* Configure the PHY SIGDET input */
@@ -169,7 +163,7 @@ int sam_emac0_setmac(void)
   i2c = sam_i2cbus_initialize(0);
   if (!i2c)
     {
-      ndbg("ERROR: Failed to initialize TWI0\n");
+      nerr("ERROR: Failed to initialize TWI0\n");
       return -ENODEV;
     }
 
@@ -178,7 +172,7 @@ int sam_emac0_setmac(void)
   at24 = at24c_initialize(i2c);
   if (!at24)
     {
-      ndbg("ERROR: Failed to initialize the AT24 driver\n");
+      nerr("ERROR: Failed to initialize the AT24 driver\n");
       (void)sam_i2cbus_uninitialize(i2c);
       return -ENODEV;
     }
@@ -188,7 +182,7 @@ int sam_emac0_setmac(void)
   ret = at24->ioctl(at24, MTDIOC_EXTENDED, 1);
   if (ret < 0)
     {
-      ndbg("ERROR: AT24 ioctl(MTDIOC_EXTENDED) failed: %d\n", ret);
+      nerr("ERROR: AT24 ioctl(MTDIOC_EXTENDED) failed: %d\n", ret);
       (void)sam_i2cbus_uninitialize(i2c);
       return ret;
     }
@@ -198,7 +192,7 @@ int sam_emac0_setmac(void)
   nread = at24->read(at24, AT24XX_MACADDR_OFFSET, 6, mac);
   if (nread < 6)
     {
-      ndbg("ERROR: AT24 read(AT24XX_MACADDR_OFFSET) failed: ld\n", (long)nread);
+      nerr("ERROR: AT24 read(AT24XX_MACADDR_OFFSET) failed: ld\n", (long)nread);
       (void)sam_i2cbus_uninitialize(i2c);
       return (int)nread;
     }
@@ -208,7 +202,7 @@ int sam_emac0_setmac(void)
   ret = at24->ioctl(at24, MTDIOC_EXTENDED, 0);
   if (ret < 0)
     {
-      ndbg("ERROR: AT24 ioctl(MTDIOC_EXTENDED) failed: %d\n", ret);
+      nerr("ERROR: AT24 ioctl(MTDIOC_EXTENDED) failed: %d\n", ret);
     }
 
   /* Release the I2C instance.
@@ -218,10 +212,10 @@ int sam_emac0_setmac(void)
   ret = sam_i2cbus_uninitialize(i2c);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to release the I2C interface: %d\n", ret);
+      nerr("ERROR: Failed to release the I2C interface: %d\n", ret);
     }
 
-  nvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+  ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
         mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   /* Now configure the EMAC driver to use this MAC address */
@@ -229,7 +223,7 @@ int sam_emac0_setmac(void)
   ret = sam_emac_setmacaddr(EMAC0_INTF, mac);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to set MAC address: %d\n", ret);
+      nerr("ERROR: Failed to set MAC address: %d\n", ret);
     }
 
   return ret;
@@ -290,44 +284,42 @@ int sam_emac0_setmac(void)
  *             asserts an interrupt.  Must reside in OS space, but can
  *             signal tasks in user space.  A value of NULL can be passed
  *             in order to detach and disable the PHY interrupt.
+ *   arg     - The argument that will accompany the interrupt
  *   enable  - A function pointer that be unsed to enable or disable the
  *             PHY interrupt.
  *
  * Returned Value:
- *   The previous PHY interrupt handler address is returned.  This allows you
- *   to temporarily replace an interrupt handler, then restore the original
- *   interrupt handler.  NULL is returned if there is was not handler in
- *   place when the call was made.
+ *   Zero (OK) returned on success; a negated errno value is returned on
+ *   failure.
  *
  ****************************************************************************/
 
 #ifdef CONFIG_SAMV7_GPIOA_IRQ
-xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
+int arch_phy_irq(FAR const char *intf, xcpt_t handler, void *arg,
+                 phy_enable_t *enable)
 {
   irqstate_t flags;
-  xcpt_t *phandler;
-  xcpt_t oldhandler;
   gpio_pinset_t pinset;
   phy_enable_t enabler;
   int irq;
 
   DEBUGASSERT(intf);
 
-  nvdbg("%s: handler=%p\n", intf, handler);
-  phydbg("EMAC0: devname=%s\n", SAMV7_EMAC0_DEVNAME);
+  ninfo("%s: handler=%p\n", intf, handler);
+  phyinfo("EMAC0: devname=%s\n", SAMV7_EMAC0_DEVNAME);
 
   if (strcmp(intf, SAMV7_EMAC0_DEVNAME) == 0)
     {
-      phydbg("Select EMAC0\n");
-      phandler = &g_emac0_handler;
+      phyinfo("Select EMAC0\n");
+
       pinset   = GPIO_EMAC0_INT;
       irq      = IRQ_EMAC0_INT;
       enabler  = sam_emac0_phy_enable;
     }
   else
     {
-      ndbg("Unsupported interface: %s\n", intf);
-      return NULL;
+      nerr("ERROR: Unsupported interface: %s\n", intf);
+      return -EINVAL;
     }
 
   /* Disable interrupts until we are done.  This guarantees that the
@@ -336,24 +328,19 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
 
   flags = enter_critical_section();
 
-  /* Get the old interrupt handler and save the new one */
-
-  oldhandler = *phandler;
-  *phandler  = handler;
-
   /* Configure the interrupt */
 
   if (handler)
     {
-      phydbg("Configure pin: %08x\n", pinset);
+      phyinfo("Configure pin: %08x\n", pinset);
       sam_gpioirq(pinset);
 
-      phydbg("Attach IRQ%d\n", irq);
-      (void)irq_attach(irq, handler);
+      phyinfo("Attach IRQ%d\n", irq);
+      (void)irq_attach(irq, handler, arg);
     }
   else
     {
-      phydbg("Detach IRQ%d\n", irq);
+      phyinfo("Detach IRQ%d\n", irq);
       (void)irq_detach(irq);
       enabler = NULL;
     }
@@ -372,7 +359,7 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
   /* Return the old handler (so that it can be restored) */
 
   leave_critical_section(flags);
-  return oldhandler;
+  return OK;
 }
 #endif /* CONFIG_SAMV7_GPIOA_IRQ */
 
diff --git a/configs/samv71-xult/src/sam_hsmci.c b/configs/samv71-xult/src/sam_hsmci.c
index f4e26ff016d4708a1485da96f2856dabd9901061..2835e64357c361fe629508fa56dc05271eee365f 100644
--- a/configs/samv71-xult/src/sam_hsmci.c
+++ b/configs/samv71-xult/src/sam_hsmci.c
@@ -99,7 +99,7 @@ struct sam_hsmci_state_s
 /* HSCMI device state */
 
 #ifdef CONFIG_SAMV7_HSMCI0
-static int sam_hsmci0_cardetect(int irq, void *regs);
+static int sam_hsmci0_cardetect(int irq, void *regs, FAR void *arg);
 
 static struct sam_hsmci_state_s g_hsmci0 =
 {
@@ -129,7 +129,7 @@ bool sam_cardinserted_internal(struct sam_hsmci_state_s *state)
   /* Get the state of the PIO pin */
 
   inserted = sam_gpioread(state->cdcfg);
-  fllvdbg("Slot %d inserted: %s\n", state->slotno, inserted ? "NO" : "YES");
+  mcinfo("Slot %d inserted: %s\n", state->slotno, inserted ? "NO" : "YES");
   return !inserted;
 }
 
@@ -164,7 +164,7 @@ static int sam_hsmci_cardetect(struct sam_hsmci_state_s *state)
 }
 
 #ifdef CONFIG_SAMV7_HSMCI0
-static int sam_hsmci0_cardetect(int irq, void *regs)
+static int sam_hsmci0_cardetect(int irq, void *regs, FAR void *arg)
 {
   int ret;
 
@@ -221,12 +221,12 @@ int sam_hsmci_initialize(int slotno, int minor)
   struct sam_hsmci_state_s *state;
   int ret;
 
-  /* Get the static HSMI description */
+  /* Get the static HSMCI description */
 
   state = sam_hsmci_state(slotno);
   if (!state)
     {
-      fdbg("ERROR: No state for slotno %d\n", slotno);
+      mcerr("ERROR: No state for slotno %d\n", slotno);
       return -EINVAL;
     }
 
@@ -247,7 +247,7 @@ int sam_hsmci_initialize(int slotno, int minor)
   state->hsmci = sdio_initialize(slotno);
   if (!state->hsmci)
     {
-      fdbg("ERROR: Failed to initialize SDIO slot %d\n",  slotno);
+      mcerr("ERROR: Failed to initialize SDIO slot %d\n",  slotno);
       return -ENODEV;
     }
 
@@ -256,14 +256,14 @@ int sam_hsmci_initialize(int slotno, int minor)
   ret = mmcsd_slotinitialize(minor, state->hsmci);
   if (ret != OK)
     {
-      fdbg("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
+      mcerr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
       return ret;
     }
 
   /* Configure card detect interrupts */
 
   sam_gpioirq(state->cdcfg);
-  (void)irq_attach(state->irq, state->handler);
+  (void)irq_attach(state->irq, state->handler, NULL);
 
   /* Then inform the HSMCI driver if there is or is not a card in the slot. */
 
@@ -293,7 +293,7 @@ bool sam_cardinserted(int slotno)
   state = sam_hsmci_state(slotno);
   if (!state)
     {
-      fdbg("ERROR: No state for slotno %d\n", slotno);
+      mcerr("ERROR: No state for slotno %d\n", slotno);
       return false;
     }
 
diff --git a/configs/samv71-xult/src/sam_ili9488.c b/configs/samv71-xult/src/sam_ili9488.c
index 61742b3fd634e5925f476c8bf219e508a07b6378..313dcac4192937470602db1b44102816e272396f 100644
--- a/configs/samv71-xult/src/sam_ili9488.c
+++ b/configs/samv71-xult/src/sam_ili9488.c
@@ -203,21 +203,6 @@
 #  define CONFIG_SAMV71XULT_LCD_BGCOLOR 0
 #endif
 
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#  undef CONFIG_LCD_REGDEBUG
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
 /* Display/Color Properties **************************************************/
 /* Display Resolution */
 
@@ -300,14 +285,6 @@
 
 /* Debug *********************************************************************/
 
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg              dbg
-#  define lcdvdbg             vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 #ifdef CONFIG_DEBUG_DMA
 #  define SAMPLENDX_BEFORE_SETUP  0
 #  define SAMPLENDX_AFTER_SETUP   1
@@ -548,7 +525,7 @@ static int sam_sendcmd(FAR struct sam_dev_s *priv, uint16_t cmd)
   ret = sam_lcd_txtransfer(priv, &cmd, sizeof(uint16_t));
   if (ret < 0)
     {
-      lcddbg("ERROR: Failed to send command %02x: %d\n", cmd, ret);
+      lcderr("ERROR: Failed to send command %02x: %d\n", cmd, ret);
     }
 
   /* Make sure that the CMD/DATA GPIO is reset for commands.  I don't understand
@@ -592,7 +569,7 @@ static int sam_lcd_put(FAR struct sam_dev_s *priv, uint16_t cmd,
       ret = sam_lcd_txtransfer(priv, buffer, buflen);
       if (ret < 0)
         {
-          lcddbg("ERROR: Failed to send command %02x data: %d\n", cmd, ret);
+          lcderr("ERROR: Failed to send command %02x data: %d\n", cmd, ret);
        }
     }
 
@@ -674,7 +651,7 @@ static int sam_setwindow(FAR struct sam_dev_s *priv, sam_color_t row,
   uint16_t buffer[4];
   int ret;
 
-  lcdvdbg("row=%d col=%d width=%d height=%d\n", row, col, width, height);
+  lcdinfo("row=%d col=%d width=%d height=%d\n", row, col, width, height);
 
   /* Set Column Address Position */
 
@@ -770,7 +747,7 @@ static void sam_disable_backlight(void)
 
 static int sam_set_backlight(unsigned int power)
 {
-  lcdvdbg("power=%d\n", power);
+  lcdinfo("power=%d\n", power);
 
   /* PWM support is not yet available.  Backlight is currently just
    * configured as a GPIO output.
@@ -803,7 +780,7 @@ static int sam_poweroff(FAR struct sam_dev_s *priv)
 {
   int ret;
 
-  lcdvdbg("OFF\n");
+  lcdinfo("OFF\n");
 
   /* Turn the display off */
 
@@ -874,7 +851,7 @@ static void sam_lcd_dumpone(struct sam_dev_s *priv, int index,
     }
   else
     {
-      fdbg("%s: Not collected\n", msg);
+      finfo("%s: Not collected\n", msg);
     }
 }
 #endif
@@ -994,7 +971,7 @@ static int sam_lcd_dmawait(FAR struct sam_dev_s *priv, uint32_t timeout)
                  1, (uint32_t)priv);
   if (ret < 0)
     {
-      lcddbg("ERROR: wd_start failed: %d\n", errno);
+      lcderr("ERROR: wd_start failed: %d\n", errno);
     }
 
   /* Loop until the event (or the timeout occurs). */
@@ -1152,7 +1129,7 @@ static int sam_putrun(fb_coord_t row, fb_coord_t col,
 
   /* Buffer must be provided and aligned to a 16-bit address boundary */
 
-  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
 
   /* Determine the refresh window area */
@@ -1160,7 +1137,7 @@ static int sam_putrun(fb_coord_t row, fb_coord_t col,
   ret = sam_setwindow(priv, row, col, npixels, 1);
   if (ret < 0)
     {
-      lcddbg("ERROR: sam_setwindow failed: %d\n",  ret);
+      lcderr("ERROR: sam_setwindow failed: %d\n",  ret);
       return ret;
     }
 
@@ -1193,7 +1170,7 @@ static int sam_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
 
   /* Buffer must be provided and aligned to a 16-bit address boundary */
 
-  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
 
   /* Determine the refresh window area */
@@ -1201,7 +1178,7 @@ static int sam_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
   ret = sam_setwindow(priv, row, col, npixels, 1);
   if (ret < 0)
     {
-      lcddbg("ERROR: sam_setwindow failed: %d\n",  ret);
+      lcderr("ERROR: sam_setwindow failed: %d\n",  ret);
       return ret;
     }
 
@@ -1223,7 +1200,7 @@ static int sam_getvideoinfo(FAR struct lcd_dev_s *dev,
                             FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  lcdvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+  lcdinfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
           g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres,
           g_videoinfo.nplanes);
 
@@ -1243,7 +1220,7 @@ static int sam_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
                               FAR struct lcd_planeinfo_s *pinfo)
 {
   DEBUGASSERT(dev && pinfo && planeno == 0);
-  lcdvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+  lcdinfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
   memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
   return OK;
 }
@@ -1262,7 +1239,7 @@ static int sam_getpower(struct lcd_dev_s *dev)
 {
   FAR struct sam_dev_s *priv = (FAR struct sam_dev_s *)dev;
 
-  lcdvdbg("power: %d\n", 0);
+  lcdinfo("power: %d\n", 0);
   return priv->power;
 }
 
@@ -1281,7 +1258,7 @@ static int sam_setpower(struct lcd_dev_s *dev, int power)
   FAR struct sam_dev_s *priv = (FAR struct sam_dev_s *)dev;
   int ret;
 
-  lcdvdbg("power: %d\n", power);
+  lcdinfo("power: %d\n", power);
   DEBUGASSERT((unsigned)power <= CONFIG_LCD_MAXPOWER);
 
   /* Set new power level */
@@ -1340,7 +1317,7 @@ static int sam_setpower(struct lcd_dev_s *dev, int power)
 
 static int sam_getcontrast(struct lcd_dev_s *dev)
 {
-  lcdvdbg("Not implemented\n");
+  lcdinfo("Not implemented\n");
   return -ENOSYS;
 }
 
@@ -1354,7 +1331,7 @@ static int sam_getcontrast(struct lcd_dev_s *dev)
 
 static int sam_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
 {
-  lcdvdbg("contrast: %d\n", contrast);
+  lcdinfo("contrast: %d\n", contrast);
   return -ENOSYS;
 }
 
@@ -1480,11 +1457,11 @@ static inline int sam_lcd_initialize(void)
     }
 
   id = ((uint16_t)buffer[2] << 8) | ((uint16_t)buffer[3] & 0xff);
-  lcdvdbg("ID: %04x\n", id);
+  lcdinfo("ID: %04x\n", id);
 
   if (id != ILI9488_DEVICE_CODE)
     {
-      lcddbg("ERROR: Unsupported LCD ID: %04x (vs. %04x)\n",
+      lcderr("ERROR: Unsupported LCD ID: %04x (vs. %04x)\n",
              id, ILI9488_DEVICE_CODE);
       return -ENODEV;
     }
@@ -1556,7 +1533,7 @@ int board_lcd_initialize(void)
   FAR struct sam_dev_s *priv = &g_lcddev;
   int ret;
 
-  lcdvdbg("Initializing\n");
+  lcdinfo("Initializing\n");
 
   /* Configure all LCD pins pins (backlight is initially off) */
 
@@ -1575,7 +1552,7 @@ int board_lcd_initialize(void)
   priv->dmach = sam_dmachannel(0, DMA_FLAGS);
   if (!priv->dmach)
     {
-      lcddbg("ERROR: Failed to allocate a DMA channel\n");
+      lcderr("ERROR: Failed to allocate a DMA channel\n");
       ret =  -EAGAIN;
       goto errout_with_waitsem;
     }
@@ -1585,7 +1562,7 @@ int board_lcd_initialize(void)
   priv->dmadog = wd_create();
   if (!priv->dmadog)
     {
-      lcddbg("ERROR: Failed to allocate a timer\n");
+      lcderr("ERROR: Failed to allocate a timer\n");
       ret = -EAGAIN;
       goto errout_with_dmach;
     }
@@ -1596,7 +1573,7 @@ int board_lcd_initialize(void)
   ret = sam_lcd_initialize();
   if (ret < 0)
     {
-      lcddbg("ERROR: sam_lcd_initialize failed: %d\n", ret);
+      lcderr("ERROR: sam_lcd_initialize failed: %d\n", ret);
       goto errout_with_dmadog;
     }
 
@@ -1609,7 +1586,7 @@ int board_lcd_initialize(void)
   ret = sam_poweroff(priv);
   if (ret < 0)
     {
-      lcddbg("ERROR: sam_poweroff failed: %d\n", ret);
+      lcderr("ERROR: sam_poweroff failed: %d\n", ret);
       goto errout_with_dmadog;
     }
 
@@ -1705,7 +1682,7 @@ void sam_lcdclear(uint16_t color)
   ret = sam_setwindow(priv, 0, 0, SAM_XRES, SAM_YRES);
   if (ret < 0)
     {
-      lcddbg("ERROR: sam_setwindow failed: %d\n",  ret);
+      lcderr("ERROR: sam_setwindow failed: %d\n",  ret);
       return;
     }
 
@@ -1714,7 +1691,7 @@ void sam_lcdclear(uint16_t color)
       ret = sam_putrun(row, 0, (FAR const uint8_t *)g_runbuffer, SAM_XRES);
       if (ret < 0)
         {
-          lcddbg("ERROR: sam_putrun failed on row %d: %d\n", row, ret);
+          lcderr("ERROR: sam_putrun failed on row %d: %d\n", row, ret);
           return;
         }
     }
diff --git a/configs/samv71-xult/src/sam_maxtouch.c b/configs/samv71-xult/src/sam_maxtouch.c
index e9512e98d31292fb9fc6389856bc323991ab09c9..32e1cda60d3e6977c06775c9c221f9a0429c7bfe 100644
--- a/configs/samv71-xult/src/sam_maxtouch.c
+++ b/configs/samv71-xult/src/sam_maxtouch.c
@@ -162,13 +162,13 @@ static int mxt_attach(FAR const struct mxt_lower_s *lower, mxt_handler_t isr,
        * new handler will called via mxt_interrupt() when the interrupt occurs.
        */
 
-      ivdbg("Attaching %p\n", isr);
+      iinfo("Attaching %p\n", isr);
       g_mxtinfo.handler = isr;
       g_mxtinfo.arg = arg;
     }
   else
     {
-      ivdbg("Detaching %p\n", g_mxtinfo.handler);
+      iinfo("Detaching %p\n", g_mxtinfo.handler);
       mxt_enable(lower, false);
       g_mxtinfo.handler = NULL;
       g_mxtinfo.arg = NULL;
@@ -196,7 +196,7 @@ static void mxt_clear(FAR const struct mxt_lower_s *lower)
   /* Does nothing */
 }
 
-static int mxt_interrupt(int irq, FAR void *context)
+static int mxt_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   /* Just forward the interrupt to the maXTouch driver */
 
@@ -241,7 +241,7 @@ int board_tsc_setup(int minor)
   static bool initialized = false;
   int ret;
 
-  idbg("minor %d\n", minor);
+  iinfo("minor %d\n", minor);
   DEBUGASSERT(minor == 0);
 
   /* Have we already initialized?  Since we never uninitialize we must prevent
@@ -261,21 +261,21 @@ int board_tsc_setup(int minor)
       i2c = sam_i2cbus_initialize(MXT_TWI_BUS);
       if (!i2c)
         {
-          idbg("Failed to initialize I2C%d\n", MXT_TWI_BUS);
+          ierr("ERROR: Failed to initialize I2C%d\n", MXT_TWI_BUS);
           return -ENODEV;
         }
 
       /* Configure maXTouch CHG interrupts */
 
       sam_gpioirq(GPIO_MXT_CHG);
-      (void)irq_attach(IRQ_MXT_CHG, mxt_interrupt);
+      (void)irq_attach(IRQ_MXT_CHG, mxt_interrupt, NULL);
 
       /* Initialize and register the I2C touchscreen device */
 
       ret = mxt_register(i2c, &g_mxtinfo.lower, CONFIG_SAMV71XULT_MXT_DEVMINOR);
       if (ret < 0)
         {
-          idbg("ERROR: Failed to register touchscreen device\n");
+          ierr("ERROR: Failed to register touchscreen device\n");
           irq_detach(IRQ_MXT_CHG);
           /* sam_i2cbus_uninitialize(i2c); */
           return -ENODEV;
diff --git a/configs/samv71-xult/src/sam_mcan.c b/configs/samv71-xult/src/sam_mcan.c
index dd4e8e7c3a609257ea8373d8a97619681f9840af..f17d9ccb20eded781420c5eca6d881e45ebaa0d7 100644
--- a/configs/samv71-xult/src/sam_mcan.c
+++ b/configs/samv71-xult/src/sam_mcan.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/samv71-xultk/src/sam_mcan.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -43,13 +43,13 @@
 #include 
 #include 
 
-#include 
+#include 
 #include 
 
 #include "sam_mcan.h"
 #include "samv71-xult.h"
 
-#if defined(CONFIG_CAN) && (defined(CONFIG_SAMV7_MCAN0) || defined(CONFIG_SAMV7_MCAN1))
+#ifdef CONFIG_SAMV7_MCAN
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -67,68 +67,46 @@
 #  define CAN_PORT 1
 #endif
 
-/* Debug ***************************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
-
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
-#else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
-#endif
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_can_initialize
+ * Name: sam_can_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/can.
+ *  Initialize CAN and register the CAN device
  *
  ************************************************************************************/
 
-int board_can_initialize(void)
+int sam_can_setup(void)
 {
-  static bool initialized = false;
+#if defined(CONFIG_SAMV7_MCAN0) || defined(CONFIG_SAMV7_MCAN1)
   struct can_dev_s *can;
   int ret;
 
-  /* Check if we have already initialized */
+  /* Call stm32_caninitialize() to get an instance of the CAN interface */
 
-  if (!initialized)
+  can = sam_mcan_initialize(CAN_PORT);
+  if (can == NULL)
     {
-      /* Call stm32_caninitialize() to get an instance of the CAN interface */
-
-      can = sam_mcan_initialize(CAN_PORT);
-      if (can == NULL)
-        {
-          candbg("ERROR:  Failed to get CAN interface\n");
-          return -ENODEV;
-        }
-
-      /* Register the CAN driver at "/dev/can0" */
-
-      ret = can_register("/dev/can0", can);
-      if (ret < 0)
-        {
-          candbg("ERROR: can_register failed: %d\n", ret);
-          return ret;
-        }
+      canerr("ERROR:  Failed to get CAN interface\n");
+      return -ENODEV;
+    }
 
-      /* Now we are initialized */
+  /* Register the CAN driver at "/dev/can0" */
 
-      initialized = true;
+  ret = can_register("/dev/can0", can);
+  if (ret < 0)
+    {
+      canerr("ERROR: can_register failed: %d\n", ret);
+      return ret;
     }
 
   return OK;
+#else
+  return -ENODEV;
+#endif
 }
 
-#endif /* CONFIG_CAN && (CONFIG_SAMV7_MCAN0 || CONFIG_SAMV7_MCAN1) */
+#endif /* CONFIG_SAMV7_MCAN */
diff --git a/configs/samv71-xult/src/sam_spi.c b/configs/samv71-xult/src/sam_spi.c
index 03dd5ead1e33b1cfb63a41ed39e6b13add93cdce..58a4d30e24e4bc3f812762d69b462bdd5ce576b9 100644
--- a/configs/samv71-xult/src/sam_spi.c
+++ b/configs/samv71-xult/src/sam_spi.c
@@ -55,32 +55,6 @@
 
 #ifdef CONFIG_SAMV7_SPI
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
diff --git a/configs/samv71-xult/src/sam_usbdev.c b/configs/samv71-xult/src/sam_usbdev.c
index 1e8173790c8cad5fc7543a553154ad69f339dea7..9dec15110348db5f471b433c351e1d1f01d691a1 100644
--- a/configs/samv71-xult/src/sam_usbdev.c
+++ b/configs/samv71-xult/src/sam_usbdev.c
@@ -94,5 +94,5 @@ void sam_usbinitialize(void)
 
 void sam_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
diff --git a/configs/samv71-xult/src/sam_wm8904.c b/configs/samv71-xult/src/sam_wm8904.c
index dff1f695194fffa6506e23cb66f726878dcad287..8ffe0dfe214a63115a16d51bc30ae0a8d433569c 100644
--- a/configs/samv71-xult/src/sam_wm8904.c
+++ b/configs/samv71-xult/src/sam_wm8904.c
@@ -157,13 +157,13 @@ static int wm8904_attach(FAR const struct wm8904_lower_s *lower,
        * new handler will called via wm8904_interrupt() when the interrupt occurs.
        */
 
-      audvdbg("Attaching %p\n", isr);
+      audinfo("Attaching %p\n", isr);
       g_wm8904info.handler = isr;
       g_wm8904info.arg = arg;
     }
   else
     {
-      audvdbg("Detaching %p\n", g_wm8904info.handler);
+      audinfo("Detaching %p\n", g_wm8904info.handler);
       (void)wm8904_enable(lower, false);
       g_wm8904info.handler = NULL;
       g_wm8904info.arg = NULL;
@@ -187,13 +187,13 @@ static bool wm8904_enable(FAR const struct wm8904_lower_s *lower, bool enable)
 
       if (enable && g_wm8904info.handler)
         {
-          audvdbg("Enabling\n");
+          audinfo("Enabling\n");
           sam_gpioirqenable(IRQ_INT_WM8904);
           enabled = true;
         }
       else
         {
-          audvdbg("Disabling\n");
+          audinfo("Disabling\n");
           sam_gpioirqdisable(IRQ_INT_WM8904);
           enabled = false;
         }
@@ -204,11 +204,11 @@ static bool wm8904_enable(FAR const struct wm8904_lower_s *lower, bool enable)
   return ret;
 }
 
-static int wm8904_interrupt(int irq, FAR void *context)
+static int wm8904_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   /* Just forward the interrupt to the WM8904 driver */
 
-  audvdbg("handler %p\n", g_wm8904info.handler);
+  audinfo("handler %p\n", g_wm8904info.handler);
   if (g_wm8904info.handler)
     {
       return g_wm8904info.handler(&g_wm8904info.lower, g_wm8904info.arg);
@@ -253,7 +253,7 @@ int sam_wm8904_initialize(int minor)
   char devname[12];
   int ret;
 
-  auddbg("minor %d\n", minor);
+  audinfo("minor %d\n", minor);
   DEBUGASSERT(minor >= 0 && minor <= 25);
 
   /* Have we already initialized?  Since we never uninitialize we must prevent
@@ -273,7 +273,7 @@ int sam_wm8904_initialize(int minor)
       i2c = sam_i2cbus_initialize(WM8904_TWI_BUS);
       if (!i2c)
         {
-          auddbg("Failed to initialize TWI%d\n", WM8904_TWI_BUS);
+          auderr("ERROR: Failed to initialize TWI%d\n", WM8904_TWI_BUS);
           ret = -ENODEV;
           goto errout;
         }
@@ -283,7 +283,7 @@ int sam_wm8904_initialize(int minor)
       i2s = sam_ssc_initialize(WM8904_SSC_BUS);
       if (!i2s)
         {
-          auddbg("Failed to initialize SSC%d\n", WM8904_SSC_BUS);
+          auderr("ERROR: Failed to initialize SSC%d\n", WM8904_SSC_BUS);
           ret = -ENODEV;
           goto errout_with_i2c;
         }
@@ -311,10 +311,10 @@ int sam_wm8904_initialize(int minor)
       /* Configure WM8904 interrupts */
 
       sam_gpioirq(GPIO_INT_WM8904);
-      ret = irq_attach(IRQ_INT_WM8904, wm8904_interrupt);
+      ret = irq_attach(IRQ_INT_WM8904, wm8904_interrupt, NULL);
       if (ret < 0)
         {
-          auddbg("ERROR: Failed to attach WM8904 interrupt: %d\n", ret);
+          auderr("ERROR: Failed to attach WM8904 interrupt: %d\n", ret);
           goto errout_with_i2s;
         }
 
@@ -325,7 +325,7 @@ int sam_wm8904_initialize(int minor)
       wm8904 = wm8904_initialize(i2c, i2s, &g_wm8904info.lower);
       if (!wm8904)
         {
-          auddbg("Failed to initialize the WM8904\n");
+          auderr("ERROR: Failed to initialize the WM8904\n");
           ret = -ENODEV;
           goto errout_with_irq;
         }
@@ -338,7 +338,7 @@ int sam_wm8904_initialize(int minor)
       pcm = pcm_decode_initialize(wm8904);
       if (!pcm)
         {
-          auddbg("ERROR: Failed create the PCM decoder\n");
+          auderr("ERROR: Failed create the PCM decoder\n");
           ret = -ENODEV;
           goto errout_with_wm8904;
         }
@@ -355,7 +355,7 @@ int sam_wm8904_initialize(int minor)
       ret = audio_register(devname, pcm);
       if (ret < 0)
         {
-          auddbg("ERROR: Failed to register /dev/%s device: %d\n", devname, ret);
+          auderr("ERROR: Failed to register /dev/%s device: %d\n", devname, ret);
           goto errout_with_pcm;
         }
 
diff --git a/configs/samv71-xult/src/samv71-xult.h b/configs/samv71-xult/src/samv71-xult.h
index 08394c5c8148c4ec2d81670387bccfdff19f4254..f635ff361c5a9726f07f16a5f6cf9f8d2ecb0950 100644
--- a/configs/samv71-xult/src/samv71-xult.h
+++ b/configs/samv71-xult/src/samv71-xult.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/samv71-xult/src/samv71-xult.h
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -100,12 +100,12 @@
 #  define CONFIG_NSH_MMCSDMINOR 0
 #endif
 
-#ifndef CONFIG_NSH_MMCSDMINOR
+#ifndef CONFIG_NSH_MMCSDSLOTNO
 #  define CONFIG_NSH_MMCSDSLOTNO 0
 #endif
 
-#if CONFIG_NSH_MMCSDMINOR != 0
-#  error SAMV71 has only one MMC/SD slot (CONFIG_NSH_MMCSDMINOR)
+#if CONFIG_NSH_MMCSDSLOTNO != 0
+#  error SAMV71 has only one MMC/SD slot (CONFIG_NSH_MMCSDSLOTNO)
 #  undef CONFIG_NSH_MMCSDSLOTNO
 #  define CONFIG_NSH_MMCSDSLOTNO 0
 #endif
@@ -166,7 +166,7 @@
 #  undef CONFIG_USBDEV_TRACE
 #endif
 
-#if !defined(CONFIG_SYSTEM_USBMONITOR) || !defined(CONFIG_USBDEV_TRACE)
+#if !defined(CONFIG_USBMONITOR) || !defined(CONFIG_USBDEV_TRACE)
 #  undef HAVE_USBMONITOR
 #endif
 
@@ -597,6 +597,18 @@ int sam_bringup(void);
 void sam_spidev_initialize(void);
 #endif
 
+/************************************************************************************
+ * Name: sam_can_setup
+ *
+ * Description:
+ *  Initialize CAN and register the CAN device
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_SAMV7_MCAN
+int sam_can_setup(void);
+#endif
+
 /************************************************************************************
  * Name: sam_hsmci_initialize
  *
diff --git a/configs/samv71-xult/vnc/Make.defs b/configs/samv71-xult/vnc/Make.defs
index 5185c94a9fb15afff6913bd71e0e2dfb2e4a7eba..de7c8c05ab3428a2ec92ef7734324dab2fe0484c 100644
--- a/configs/samv71-xult/vnc/Make.defs
+++ b/configs/samv71-xult/vnc/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # configs/samv71-xult/vnc/Make.defs
 #
-#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
@@ -97,6 +97,17 @@ NXFLATLDFLAGS1 = -r -d -warn-common
 NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
 LDNXFLATFLAGS = -e main -s 2048
 
+# Loadable module definitions
+
+CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
+
+LDMODULEFLAGS = -r -e module_initialize
+ifeq ($(WINTOOL),y)
+  LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libc/modlib/gnu-elf.ld}"
+else
+  LDMODULEFLAGS += -T $(TOPDIR)/libc/modlib/gnu-elf.ld
+endif
+
 ASMEXT = .S
 OBJEXT = .o
 LIBEXT = .a
diff --git a/configs/samv71-xult/vnc/defconfig b/configs/samv71-xult/vnc/defconfig
index 8aad6db72b80801ea27b1664703eb66dcf937163..c8eca8144a64b1ed112bc65ed376c78f0b35d8fe 100644
--- a/configs/samv71-xult/vnc/defconfig
+++ b/configs/samv71-xult/vnc/defconfig
@@ -12,8 +12,10 @@ CONFIG_EXPERIMENTAL=y
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +66,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +81,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -107,7 +111,9 @@ CONFIG_ARCH_CHIP_SAMV7=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 CONFIG_ARCH_CORTEXM7=y
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -160,8 +166,6 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # SAMV7 Configuration Options
@@ -194,7 +198,8 @@ CONFIG_ARCH_CHIP_SAMV71Q=y
 # CONFIG_ARCH_CHIP_SAMV71J is not set
 # CONFIG_SAMV7_MCAN is not set
 CONFIG_SAMV7_HAVE_MCAN1=y
-CONFIG_SAMV7_HAVE_DAC1=y
+# CONFIG_SAMV7_DAC is not set
+# CONFIG_SAMV7_HAVE_DAC1 is not set
 CONFIG_SAMV7_HAVE_EBI=y
 CONFIG_SAMV7_EMAC=y
 CONFIG_SAMV7_HSMCI=y
@@ -227,7 +232,6 @@ CONFIG_SAMV7_HAVE_USART2=y
 # CONFIG_SAMV7_MCAN0 is not set
 # CONFIG_SAMV7_MCAN1 is not set
 # CONFIG_SAMV7_DAC0 is not set
-# CONFIG_SAMV7_DAC1 is not set
 # CONFIG_SAMV7_EBI is not set
 CONFIG_SAMV7_EMAC0=y
 CONFIG_SAMV7_XDMAC=y
@@ -264,6 +268,13 @@ CONFIG_SAMV7_UART3=y
 # CONFIG_SAMV7_USART2 is not set
 # CONFIG_SAMV7_WDT is not set
 # CONFIG_SAMV7_RSWDT is not set
+# CONFIG_SAMV7_JTAG_DISABLE is not set
+CONFIG_SAMV7_JTAG_FULL_ENABLE=y
+# CONFIG_SAMV7_JTAG_FULL_SW_ENABLE is not set
+# CONFIG_SAMV7_JTAG_SW_ENABLE is not set
+# CONFIG_SAMV7_ERASE_DISABLE is not set
+CONFIG_SAMV7_ERASE_ENABLE=y
+# CONFIG_SAMV7_SYSTEMRESET is not set
 CONFIG_SAMV7_GPIO_IRQ=y
 CONFIG_SAMV7_GPIOA_IRQ=y
 CONFIG_SAMV7_GPIOB_IRQ=y
@@ -276,10 +287,12 @@ CONFIG_SAMV7_GPIOD_IRQ=y
 # TWIHS device driver options
 #
 CONFIG_SAMV7_TWIHS0_FREQUENCY=100000
+CONFIG_SAMV7_TWIHS0_GLITCH_FILTER=1
 
 #
 # HSMCI device driver options
 #
+CONFIG_SAMV7_HSMCI_DMA=y
 # CONFIG_SAMV7_HSMCI_RDPROOF is not set
 # CONFIG_SAMV7_HSMCI_WRPROOF is not set
 # CONFIG_SAMV7_HSMCI_UNALIGNED is not set
@@ -304,6 +317,7 @@ CONFIG_SAMV7_EMAC0_PHYSR_100FD=0x6
 CONFIG_SAMV7_EMAC0_ISETH0=y
 # CONFIG_SAMV7_EMAC_PREALLOCATE is not set
 # CONFIG_SAMV7_EMAC_NBC is not set
+CONFIG_SAMV7_EMAC_HPWORK=y
 
 #
 # Architecture Options
@@ -323,7 +337,7 @@ CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
-# CONFIG_ARCH_HAVE_RESET is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -380,18 +394,16 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
 # CONFIG_SAMV71XULT_MXTXPLND is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -413,6 +425,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=3
@@ -442,6 +455,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -511,6 +526,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -523,26 +539,33 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
 # CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
-# CONFIG_ARCH_HAVE_I2CRESET is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
 CONFIG_I2C=y
 # CONFIG_I2C_SLAVE is not set
 # CONFIG_I2C_POLLED is not set
+# CONFIG_I2C_RESET is not set
 # CONFIG_I2C_TRACE is not set
 CONFIG_I2C_DRIVER=y
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+CONFIG_ARCH_HAVE_SPI_CS_CONTROL=y
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_TIMERS_CS2100CP is not set
@@ -551,8 +574,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -560,6 +593,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -568,10 +602,12 @@ CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
 CONFIG_MMCSD_HAVECARDDETECT=y
 # CONFIG_MMCSD_SPI is not set
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
 CONFIG_MMCSD_SDIO=y
 # CONFIG_SDIO_PREFLIGHT is not set
 # CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_SDIO_BLOCKSETUP=y
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -604,13 +640,16 @@ CONFIG_MTD_AT25=y
 CONFIG_AT25_SPIMODE=0
 CONFIG_AT25_SPIFREQUENCY=20000000
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
 # CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -635,10 +674,8 @@ CONFIG_NETDEV_STATISTICS=y
 # CONFIG_NET_CS89x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -662,9 +699,10 @@ CONFIG_ETH0_PHY_KSZ8061=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -688,10 +726,6 @@ CONFIG_UART3_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -714,19 +748,26 @@ CONFIG_UART3_2STOP=0
 # CONFIG_UART3_IFLOWCONTROL is not set
 # CONFIG_UART3_OFLOWCONTROL is not set
 # CONFIG_UART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -734,13 +775,11 @@ CONFIG_UART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -889,12 +928,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MTD is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -978,6 +1011,7 @@ CONFIG_NXFONT_SANS28X37=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 # CONFIG_NXTERM is not set
 
 #
@@ -1043,11 +1077,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1065,17 +1116,21 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1100,19 +1155,19 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1122,7 +1177,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 CONFIG_EXAMPLES_NXIMAGE=y
@@ -1139,34 +1193,35 @@ CONFIG_EXAMPLES_NXIMAGE_YSCALE1p0=y
 # CONFIG_EXAMPLES_NXIMAGE_YSCALE1p5 is not set
 # CONFIG_EXAMPLES_NXIMAGE_YSCALE2p0 is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1186,8 +1241,9 @@ CONFIG_EXAMPLES_NXIMAGE_YSCALE1p0=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1198,11 +1254,12 @@ CONFIG_EXAMPLES_NXIMAGE_YSCALE1p0=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
@@ -1262,12 +1319,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1285,11 +1342,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -1311,6 +1371,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 CONFIG_NSH_NETINIT_THREAD=y
 CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568
 CONFIG_NSH_NETINIT_THREAD_PRIORITY=80
@@ -1354,14 +1415,15 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_SYSTEM_I2CTOOL is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_I2CTOOL is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_MDIO is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1369,8 +1431,9 @@ CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
-# CONFIG_SYSTEM_MDIO is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/samv71-xult/vnxwm/Make.defs b/configs/samv71-xult/vnxwm/Make.defs
index fe4fd97aeb32564ae171f0518424ac6552553d2c..933e68c575aeb0b71a95d16b9007b0556bb7ff57 100644
--- a/configs/samv71-xult/vnxwm/Make.defs
+++ b/configs/samv71-xult/vnxwm/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # configs/samv71-xult/vnxwm/Make.defs
 #
-#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
@@ -97,6 +97,17 @@ NXFLATLDFLAGS1 = -r -d -warn-common
 NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
 LDNXFLATFLAGS = -e main -s 2048
 
+# Loadable module definitions
+
+CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
+
+LDMODULEFLAGS = -r -e module_initialize
+ifeq ($(WINTOOL),y)
+  LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libc/modlib/gnu-elf.ld}"
+else
+  LDMODULEFLAGS += -T $(TOPDIR)/libc/modlib/gnu-elf.ld
+endif
+
 ASMEXT = .S
 OBJEXT = .o
 LIBEXT = .a
diff --git a/configs/samv71-xult/vnxwm/defconfig b/configs/samv71-xult/vnxwm/defconfig
index 6e9f662f49e5e93edec5d52d43eeaadaefccfede..b17bf8ba95f5c02f64d8a473b3998b09f444d89b 100644
--- a/configs/samv71-xult/vnxwm/defconfig
+++ b/configs/samv71-xult/vnxwm/defconfig
@@ -12,8 +12,10 @@ CONFIG_EXPERIMENTAL=y
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +66,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +81,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -107,7 +111,9 @@ CONFIG_ARCH_CHIP_SAMV7=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 CONFIG_ARCH_CORTEXM7=y
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -160,8 +166,6 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # SAMV7 Configuration Options
@@ -194,7 +198,8 @@ CONFIG_ARCH_CHIP_SAMV71Q=y
 # CONFIG_ARCH_CHIP_SAMV71J is not set
 # CONFIG_SAMV7_MCAN is not set
 CONFIG_SAMV7_HAVE_MCAN1=y
-CONFIG_SAMV7_HAVE_DAC1=y
+# CONFIG_SAMV7_DAC is not set
+# CONFIG_SAMV7_HAVE_DAC1 is not set
 CONFIG_SAMV7_HAVE_EBI=y
 CONFIG_SAMV7_EMAC=y
 CONFIG_SAMV7_HSMCI=y
@@ -227,7 +232,6 @@ CONFIG_SAMV7_HAVE_USART2=y
 # CONFIG_SAMV7_MCAN0 is not set
 # CONFIG_SAMV7_MCAN1 is not set
 # CONFIG_SAMV7_DAC0 is not set
-# CONFIG_SAMV7_DAC1 is not set
 # CONFIG_SAMV7_EBI is not set
 CONFIG_SAMV7_EMAC0=y
 CONFIG_SAMV7_XDMAC=y
@@ -264,6 +268,13 @@ CONFIG_SAMV7_UART3=y
 # CONFIG_SAMV7_USART2 is not set
 # CONFIG_SAMV7_WDT is not set
 # CONFIG_SAMV7_RSWDT is not set
+# CONFIG_SAMV7_JTAG_DISABLE is not set
+CONFIG_SAMV7_JTAG_FULL_ENABLE=y
+# CONFIG_SAMV7_JTAG_FULL_SW_ENABLE is not set
+# CONFIG_SAMV7_JTAG_SW_ENABLE is not set
+# CONFIG_SAMV7_ERASE_DISABLE is not set
+CONFIG_SAMV7_ERASE_ENABLE=y
+# CONFIG_SAMV7_SYSTEMRESET is not set
 CONFIG_SAMV7_GPIO_IRQ=y
 CONFIG_SAMV7_GPIOA_IRQ=y
 CONFIG_SAMV7_GPIOB_IRQ=y
@@ -276,10 +287,12 @@ CONFIG_SAMV7_GPIOD_IRQ=y
 # TWIHS device driver options
 #
 CONFIG_SAMV7_TWIHS0_FREQUENCY=100000
+CONFIG_SAMV7_TWIHS0_GLITCH_FILTER=1
 
 #
 # HSMCI device driver options
 #
+CONFIG_SAMV7_HSMCI_DMA=y
 # CONFIG_SAMV7_HSMCI_RDPROOF is not set
 # CONFIG_SAMV7_HSMCI_WRPROOF is not set
 # CONFIG_SAMV7_HSMCI_UNALIGNED is not set
@@ -304,6 +317,7 @@ CONFIG_SAMV7_EMAC0_PHYSR_100FD=0x6
 CONFIG_SAMV7_EMAC0_ISETH0=y
 # CONFIG_SAMV7_EMAC_PREALLOCATE is not set
 # CONFIG_SAMV7_EMAC_NBC is not set
+CONFIG_SAMV7_EMAC_HPWORK=y
 
 #
 # Architecture Options
@@ -323,7 +337,7 @@ CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
-# CONFIG_ARCH_HAVE_RESET is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -380,18 +394,16 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
 # CONFIG_SAMV71XULT_MXTXPLND is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -413,6 +425,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=3
@@ -443,6 +456,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -514,6 +529,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -526,26 +542,33 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
 # CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
-# CONFIG_ARCH_HAVE_I2CRESET is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
 CONFIG_I2C=y
 # CONFIG_I2C_SLAVE is not set
 # CONFIG_I2C_POLLED is not set
+# CONFIG_I2C_RESET is not set
 # CONFIG_I2C_TRACE is not set
 CONFIG_I2C_DRIVER=y
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+CONFIG_ARCH_HAVE_SPI_CS_CONTROL=y
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_TIMERS_CS2100CP is not set
@@ -554,8 +577,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -563,6 +596,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -571,10 +605,12 @@ CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
 CONFIG_MMCSD_HAVECARDDETECT=y
 # CONFIG_MMCSD_SPI is not set
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
 CONFIG_MMCSD_SDIO=y
 # CONFIG_SDIO_PREFLIGHT is not set
 # CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_SDIO_BLOCKSETUP=y
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -607,13 +643,16 @@ CONFIG_MTD_AT25=y
 CONFIG_AT25_SPIMODE=0
 CONFIG_AT25_SPIFREQUENCY=20000000
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
 # CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -638,10 +677,8 @@ CONFIG_NETDEV_STATISTICS=y
 # CONFIG_NET_CS89x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -665,9 +702,10 @@ CONFIG_ETH0_PHY_KSZ8061=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -691,10 +729,6 @@ CONFIG_UART3_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -717,19 +751,26 @@ CONFIG_UART3_2STOP=0
 # CONFIG_UART3_IFLOWCONTROL is not set
 # CONFIG_UART3_OFLOWCONTROL is not set
 # CONFIG_UART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -737,13 +778,11 @@ CONFIG_UART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -892,12 +931,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MTD is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -981,13 +1014,14 @@ CONFIG_NXFONT_SANS22X29B=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 CONFIG_NXTERM=y
 
 #
 # NxTerm Output Text/Graphics Options
 #
 CONFIG_NXTERM_BPP=8
-CONFIG_NXTERM_CURSORCHAR=137
+CONFIG_NXTERM_CURSORCHAR=95
 CONFIG_NXTERM_MXCHARS=396
 CONFIG_NXTERM_CACHESIZE=32
 CONFIG_NXTERM_LINESEPARATION=0
@@ -1007,7 +1041,11 @@ CONFIG_NX_MULTIUSER=y
 CONFIG_NX_BLOCKING=y
 CONFIG_NX_MXSERVERMSGS=32
 CONFIG_NX_MXCLIENTMSGS=16
-# CONFIG_NX_NXSTART is not set
+# CONFIG_NXSTART_EXTERNINIT is not set
+CONFIG_NXSTART_SERVERPRIO=110
+CONFIG_NXSTART_SERVERSTACK=2048
+CONFIG_NXSTART_DISPLAYNO=0
+CONFIG_NXSTART_VPLANE=0
 CONFIG_VNCSERVER=y
 # CONFIG_VNCSERVER_PROTO3p3 is not set
 CONFIG_VNCSERVER_PROTO3p8=y
@@ -1067,11 +1105,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 CONFIG_LIBM=y
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 CONFIG_LIBC_FLOATINGPOINT=y
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1089,17 +1144,21 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1131,9 +1190,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -1142,10 +1201,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1155,39 +1214,39 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1207,8 +1266,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1219,11 +1279,12 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
@@ -1283,12 +1344,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1306,11 +1367,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -1332,6 +1396,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 CONFIG_NSH_NETINIT_THREAD=y
 CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568
 CONFIG_NSH_NETINIT_THREAD_PRIORITY=80
@@ -1373,10 +1438,7 @@ CONFIG_NXWIDGETS=y
 #
 # CONFIG_NXWIDGETS_FLICKERFREE is not set
 # CONFIG_NXWIDGETS_EXTERNINIT is not set
-CONFIG_NXWIDGETS_VPLANE=0
 CONFIG_NXWIDGET_SERVERINIT=y
-CONFIG_NXWIDGETS_SERVERPRIO=110
-CONFIG_NXWIDGETS_SERVERSTACK=2048
 CONFIG_NXWIDGETS_CLIENTPRIO=100
 CONFIG_NXWIDGETS_LISTENERPRIO=100
 CONFIG_NXWIDGETS_LISTENERSTACK=2048
@@ -1472,7 +1534,7 @@ CONFIG_NXWM_TOOLBAR_FONTID=5
 CONFIG_NXWM_STARTWINDOW_VSPACING=4
 CONFIG_NXWM_STARTWINDOW_HSPACING=4
 # CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set
-CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm"
+CONFIG_NXWM_STARTWINDOW_MQNAME="nxwm"
 CONFIG_NXWM_STARTWINDOW_MXMSGS=32
 CONFIG_NXWM_STARTWINDOW_MXMPRIO=42
 CONFIG_NXWM_STARTWINDOW_PRIO=100
@@ -1545,14 +1607,15 @@ CONFIG_NXWM_HEXCALCULATOR_FONTID=5
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_SYSTEM_I2CTOOL is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_I2CTOOL is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_MDIO is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1560,8 +1623,9 @@ CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
-# CONFIG_SYSTEM_MDIO is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/shenzhou/README.txt b/configs/shenzhou/README.txt
index f310f2f7b7175ca97c80b2c760d023f36f4a416d..1eeedcd252d16ca9882f5992165d79e521d47b7e 100644
--- a/configs/shenzhou/README.txt
+++ b/configs/shenzhou/README.txt
@@ -668,7 +668,7 @@ Shenzhou-specific Configuration Options
     CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
     CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
     CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
-    CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+    CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
       dump of all CAN registers.
 
   Shenzhou LCD Hardware Configuration
@@ -725,9 +725,9 @@ Shenzhou-specific Configuration Options
    CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts.  Why would you ever
      want to do that?
    CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
-     debug.  Depends on CONFIG_DEBUG.
+     debug.  Depends on CONFIG_DEBUG_FEATURES.
    CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
-     packets. Depends on CONFIG_DEBUG.
+     packets. Depends on CONFIG_DEBUG_FEATURES.
 
 Configurations
 ==============
diff --git a/configs/shenzhou/include/board.h b/configs/shenzhou/include/board.h
index c7b60a9ca3d3d5ff7c4045fbb5245bf2e7198fde..f55ca113dfb863c330e420b386ebfa5febc9f1da 100644
--- a/configs/shenzhou/include/board.h
+++ b/configs/shenzhou/include/board.h
@@ -100,14 +100,14 @@
 #define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd2
 #define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
 
-/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */
+/* APB1 timers 2-7 will be twice PCLK1 */
 
 #define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM5_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM6_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM7_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 
 /* MCO output driven by PLL3. From above, we already have PLL3 input frequency as:
  *
diff --git a/configs/shenzhou/nsh/Make.defs b/configs/shenzhou/nsh/Make.defs
index c97f815e94b3359ca027fa790529bdf5c1badd6e..b795435bbc842ce92953efff4bfc3254cc6edd33 100644
--- a/configs/shenzhou/nsh/Make.defs
+++ b/configs/shenzhou/nsh/Make.defs
@@ -82,7 +82,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/shenzhou/nsh/defconfig b/configs/shenzhou/nsh/defconfig
index 3ae18ae27e58de92a496e06c55a1fc95dd4e0d5c..33f4685ec50bb3fc13fd1dc1f96381e9ffb93651 100644
--- a/configs/shenzhou/nsh/defconfig
+++ b/configs/shenzhou/nsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +202,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 CONFIG_ARCH_CHIP_STM32F107VC=y
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -329,7 +333,7 @@ CONFIG_STM32_HAVE_TIM4=y
 CONFIG_STM32_HAVE_TIM5=y
 CONFIG_STM32_HAVE_TIM6=y
 CONFIG_STM32_HAVE_TIM7=y
-CONFIG_STM32_HAVE_TIM8=y
+# CONFIG_STM32_HAVE_TIM8 is not set
 # CONFIG_STM32_HAVE_TIM9 is not set
 # CONFIG_STM32_HAVE_TIM10 is not set
 # CONFIG_STM32_HAVE_TIM11 is not set
@@ -346,6 +350,12 @@ CONFIG_STM32_HAVE_ADC2=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -378,6 +388,7 @@ CONFIG_STM32_PWR=y
 CONFIG_STM32_SPI1=y
 # CONFIG_STM32_SPI2 is not set
 # CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SYSCFG=y
 # CONFIG_STM32_TIM1 is not set
 # CONFIG_STM32_TIM2 is not set
 # CONFIG_STM32_TIM3 is not set
@@ -385,7 +396,6 @@ CONFIG_STM32_SPI1=y
 # CONFIG_STM32_TIM5 is not set
 # CONFIG_STM32_TIM6 is not set
 # CONFIG_STM32_TIM7 is not set
-# CONFIG_STM32_TIM8 is not set
 # CONFIG_STM32_USART1 is not set
 CONFIG_STM32_USART2=y
 # CONFIG_STM32_USART3 is not set
@@ -409,20 +419,33 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
 # CONFIG_STM32_TIM5_CAP is not set
-# CONFIG_STM32_TIM8_CAP is not set
 CONFIG_STM32_USART=y
 CONFIG_STM32_SERIALDRIVER=y
 
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -457,6 +480,7 @@ CONFIG_STM32_PHYSR_100FD=0x8000
 CONFIG_STM32_RMII=y
 CONFIG_STM32_RMII_MCO=y
 # CONFIG_STM32_RMII_EXTCLK is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -538,6 +562,7 @@ CONFIG_RAM_SIZE=65536
 # CONFIG_ARCH_BOARD_CLOUDCTRL is not set
 # CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set
 CONFIG_ARCH_BOARD_SHENZHOU=y
+# CONFIG_ARCH_BOARD_STM32_BUTTERFLY2 is not set
 # CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="shenzhou"
@@ -550,19 +575,15 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=1
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -579,9 +600,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=8
@@ -633,6 +657,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -641,6 +666,7 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
@@ -652,8 +678,11 @@ CONFIG_MQ_MAXMSGSIZE=32
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -671,6 +700,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -686,19 +716,25 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 # CONFIG_RTC_DATETIME is not set
 # CONFIG_RTC_HIRES is not set
@@ -711,8 +747,18 @@ CONFIG_RTC=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -720,6 +766,7 @@ CONFIG_RTC=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -753,10 +800,8 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -780,9 +825,10 @@ CONFIG_ETH0_PHY_DM9161=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -828,19 +874,26 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -848,13 +901,11 @@ CONFIG_USART2_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -994,12 +1045,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1049,6 +1094,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1066,7 +1113,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
@@ -1083,8 +1129,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1115,21 +1163,23 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1139,26 +1189,25 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1166,11 +1215,10 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1194,8 +1242,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1207,21 +1256,21 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1274,13 +1323,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1298,6 +1347,9 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=1
 
 #
 # Configure Command Options
@@ -1323,6 +1375,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1367,12 +1420,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1381,6 +1434,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/shenzhou/nxwm/Make.defs b/configs/shenzhou/nxwm/Make.defs
index 4419270766935e4a715262587790e9bcb2f7e1b9..cf1fcc1dd3aafc291ea161c7e4dea23f919b094d 100644
--- a/configs/shenzhou/nxwm/Make.defs
+++ b/configs/shenzhou/nxwm/Make.defs
@@ -82,7 +82,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/shenzhou/nxwm/defconfig b/configs/shenzhou/nxwm/defconfig
index a59049abedd0e289bdc93511551e851fd29ed307..f0358bdd6ca6fc19248991c649c476289a84fcbb 100644
--- a/configs/shenzhou/nxwm/defconfig
+++ b/configs/shenzhou/nxwm/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +67,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +82,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -207,6 +212,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 CONFIG_ARCH_CHIP_STM32F107VC=y
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -337,7 +343,7 @@ CONFIG_STM32_HAVE_TIM4=y
 CONFIG_STM32_HAVE_TIM5=y
 CONFIG_STM32_HAVE_TIM6=y
 CONFIG_STM32_HAVE_TIM7=y
-CONFIG_STM32_HAVE_TIM8=y
+# CONFIG_STM32_HAVE_TIM8 is not set
 # CONFIG_STM32_HAVE_TIM9 is not set
 # CONFIG_STM32_HAVE_TIM10 is not set
 # CONFIG_STM32_HAVE_TIM11 is not set
@@ -354,6 +360,12 @@ CONFIG_STM32_HAVE_ADC2=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -386,6 +398,7 @@ CONFIG_STM32_ETHMAC=y
 # CONFIG_STM32_SPI1 is not set
 # CONFIG_STM32_SPI2 is not set
 CONFIG_STM32_SPI3=y
+CONFIG_STM32_SYSCFG=y
 # CONFIG_STM32_TIM1 is not set
 # CONFIG_STM32_TIM2 is not set
 # CONFIG_STM32_TIM3 is not set
@@ -393,7 +406,6 @@ CONFIG_STM32_SPI3=y
 # CONFIG_STM32_TIM5 is not set
 # CONFIG_STM32_TIM6 is not set
 # CONFIG_STM32_TIM7 is not set
-# CONFIG_STM32_TIM8 is not set
 # CONFIG_STM32_USART1 is not set
 CONFIG_STM32_USART2=y
 # CONFIG_STM32_USART3 is not set
@@ -417,20 +429,33 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
 # CONFIG_STM32_TIM5_CAP is not set
-# CONFIG_STM32_TIM8_CAP is not set
 CONFIG_STM32_USART=y
 CONFIG_STM32_SERIALDRIVER=y
 
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -462,6 +487,7 @@ CONFIG_STM32_PHYSR_100FD=0x8000
 CONFIG_STM32_RMII=y
 CONFIG_STM32_RMII_MCO=y
 # CONFIG_STM32_RMII_EXTCLK is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -543,6 +569,7 @@ CONFIG_RAM_SIZE=65536
 # CONFIG_ARCH_BOARD_CLOUDCTRL is not set
 # CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set
 CONFIG_ARCH_BOARD_SHENZHOU=y
+# CONFIG_ARCH_BOARD_STM32_BUTTERFLY2 is not set
 # CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="shenzhou"
@@ -555,7 +582,6 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -576,12 +602,11 @@ CONFIG_NSH_MMCSDMINOR=0
 # CONFIG_STM32_ILI9328_DISABLE is not set
 # CONFIG_STM32_ILI9331_DISABLE is not set
 # CONFIG_STM32_ILI9919_DISABLE is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
-# CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
+CONFIG_BOARDCTL_TSCTEST=y
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -598,9 +623,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2012
 CONFIG_START_MONTH=9
@@ -613,6 +641,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -629,6 +658,8 @@ CONFIG_MAX_TASKS=16
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -671,7 +702,7 @@ CONFIG_SIG_SIGWORK=17
 # POSIX Message Queue Options
 #
 CONFIG_PREALLOC_MQ_MSGS=32
-CONFIG_MQ_MAXMSGSIZE=48
+CONFIG_MQ_MAXMSGSIZE=64
 # CONFIG_MODULE is not set
 
 #
@@ -699,6 +730,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=1024
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -714,19 +746,25 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -739,7 +777,7 @@ CONFIG_INPUT=y
 # CONFIG_INPUT_TSC2007 is not set
 CONFIG_INPUT_ADS7843E=y
 # CONFIG_ADS7843E_MULTIPLE is not set
-CONFIG_ADS7843E_SPIDEV=0
+CONFIG_ADS7843E_SPIDEV=3
 CONFIG_ADS7843E_DEVMINOR=0
 CONFIG_ADS7843E_SPIMODE=0
 CONFIG_ADS7843E_FREQUENCY=100000
@@ -751,11 +789,20 @@ CONFIG_ADS7843E_THRESHY=51
 # CONFIG_BUTTONS is not set
 # CONFIG_DJOYSTICK is not set
 # CONFIG_AJOYSTICK is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 CONFIG_LCD_NOGETRUN=y
@@ -770,6 +817,7 @@ CONFIG_LCD_MAXPOWER=1
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
 # CONFIG_LCD_UG9664HSWAG01 is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 # CONFIG_LCD_SSD1351 is not set
@@ -787,11 +835,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -799,6 +843,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -822,10 +867,8 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -849,9 +892,10 @@ CONFIG_ETH0_PHY_DM9161=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -897,19 +941,26 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -917,13 +968,11 @@ CONFIG_USART2_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -1055,12 +1104,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1148,13 +1191,14 @@ CONFIG_NXFONT_SANS22X29B=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 CONFIG_NXTERM=y
 
 #
 # NxTerm Output Text/Graphics Options
 #
 CONFIG_NXTERM_BPP=16
-CONFIG_NXTERM_CURSORCHAR=137
+CONFIG_NXTERM_CURSORCHAR=95
 CONFIG_NXTERM_MXCHARS=325
 CONFIG_NXTERM_CACHESIZE=32
 CONFIG_NXTERM_LINESEPARATION=0
@@ -1174,7 +1218,10 @@ CONFIG_NX_MULTIUSER=y
 CONFIG_NX_BLOCKING=y
 CONFIG_NX_MXSERVERMSGS=32
 CONFIG_NX_MXCLIENTMSGS=16
-# CONFIG_NX_NXSTART is not set
+# CONFIG_NXSTART_EXTERNINIT is not set
+CONFIG_NXSTART_SERVERPRIO=110
+CONFIG_NXSTART_SERVERSTACK=2048
+CONFIG_NXSTART_DEVNO=0
 
 #
 # Memory Management
@@ -1220,6 +1267,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1235,9 +1284,9 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 CONFIG_LIBC_NETDB=y
 CONFIG_NETDB_DNSCLIENT=y
 CONFIG_NETDB_DNSCLIENT_ENTRIES=4
@@ -1250,8 +1299,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1277,20 +1328,22 @@ CONFIG_HAVE_CXXINITIALIZE=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -1301,20 +1354,18 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1328,11 +1379,10 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
@@ -1355,8 +1405,9 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1368,21 +1419,21 @@ CONFIG_HAVE_CXXINITIALIZE=y
 #
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1433,13 +1484,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1457,11 +1508,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 CONFIG_NSH_FILEIOSIZE=512
@@ -1482,6 +1535,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1524,10 +1578,7 @@ CONFIG_NXWIDGETS=y
 #
 CONFIG_NXWIDGETS_FLICKERFREE=y
 # CONFIG_NXWIDGETS_EXTERNINIT is not set
-CONFIG_NXWIDGETS_DEVNO=0
 CONFIG_NXWIDGET_SERVERINIT=y
-CONFIG_NXWIDGETS_SERVERPRIO=110
-CONFIG_NXWIDGETS_SERVERSTACK=1596
 CONFIG_NXWIDGETS_CLIENTPRIO=100
 CONFIG_NXWIDGETS_LISTENERPRIO=100
 CONFIG_NXWIDGETS_LISTENERSTACK=1596
@@ -1621,7 +1672,7 @@ CONFIG_NXWM_TASKBAR_LEFT=y
 CONFIG_NXWM_STARTWINDOW_VSPACING=4
 CONFIG_NXWM_STARTWINDOW_HSPACING=4
 # CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set
-CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm"
+CONFIG_NXWM_STARTWINDOW_MQNAME="nxwm"
 CONFIG_NXWM_STARTWINDOW_MXMSGS=32
 CONFIG_NXWM_STARTWINDOW_MXMPRIO=42
 CONFIG_NXWM_STARTWINDOW_PRIO=100
@@ -1649,7 +1700,7 @@ CONFIG_NXWM_TOUCHSCREEN_DEVINIT=y
 CONFIG_NXWM_TOUCHSCREEN_DEVNO=0
 CONFIG_NXWM_TOUCHSCREEN_DEVPATH="/dev/input0"
 CONFIG_NXWM_TOUCHSCREEN_SIGNO=5
-CONFIG_NXWM_TOUCHSCREEN_LISTENERPRIO=100
+CONFIG_NXWM_TOUCHSCREEN_LISTENERPRIO=101
 CONFIG_NXWM_TOUCHSCREEN_LISTENERSTACK=1596
 
 #
@@ -1699,12 +1750,12 @@ CONFIG_NXWM_HEXCALCULATOR_FONTID=5
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1713,6 +1764,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/shenzhou/src/shenzhou.h b/configs/shenzhou/src/shenzhou.h
index c66f333361b97197fcfd5b98cf633026c167478b..68fb63d1020afd888736a7c85b752386b8b1cbc3 100644
--- a/configs/shenzhou/src/shenzhou.h
+++ b/configs/shenzhou/src/shenzhou.h
@@ -1,7 +1,7 @@
 /****************************************************************************************************
  * configs/shenzhou/src/shenzhou.h
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -448,6 +448,30 @@ void weak_function stm32_usbinitialize(void);
 int stm32_usbhost_initialize(void);
 #endif
 
+/************************************************************************************
+ * Name: stm32_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ADC
+int stm32_adc_setup(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_can_setup
+ *
+ * Description:
+ *  Initialize CAN and register the CAN device
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CAN
+int stm32_can_setup(void);
+#endif
+
 /****************************************************************************
  * Name: stm32_sdinitialize
  *
diff --git a/configs/shenzhou/src/stm32_adc.c b/configs/shenzhou/src/stm32_adc.c
index bd54100a09b9f9d67b1dc499f3c2728aac152533..3e185bcdf5afd3d49de6f681cf616a8ab50a72c2 100644
--- a/configs/shenzhou/src/stm32_adc.c
+++ b/configs/shenzhou/src/stm32_adc.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/shenzhou/src/stm32_adc.c
  *
- *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -104,24 +104,19 @@ static const uint8_t  g_chanlist[ADC1_NCHANNELS] = {10}; //{10, 8, 9};
 static const uint32_t g_pinlist[ADC1_NCHANNELS]  = {GPIO_ADC12_IN10}; //{GPIO_ADC12_IN10, GPIO_ADC12_IN8, GPIO_ADC12_IN9};
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_adc_setup
+ * Name: stm32_adc_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/adc.
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
-int board_adc_setup(void)
+int stm32_adc_setup(void)
 {
 #ifdef CONFIG_STM32_ADC1
   static bool initialized = false;
@@ -145,7 +140,7 @@ int board_adc_setup(void)
       adc = stm32_adcinitialize(1, g_chanlist, ADC1_NCHANNELS);
       if (adc == NULL)
         {
-          adbg("ERROR: Failed to get ADC interface\n");
+          aerr("ERROR: Failed to get ADC interface\n");
           return -ENODEV;
         }
 
@@ -154,7 +149,7 @@ int board_adc_setup(void)
       ret = adc_register("/dev/adc0", adc);
       if (ret < 0)
         {
-          adbg("adc_register failed: %d\n", ret);
+          aerr("ERROR: adc_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/shenzhou/src/stm32_appinit.c b/configs/shenzhou/src/stm32_appinit.c
index 9b18c80d5d3b7452cf1cf37a11dd144a22492571..2bfb40a59f360ffc61a6c5005ee2e3e622a78ccc 100644
--- a/configs/shenzhou/src/stm32_appinit.c
+++ b/configs/shenzhou/src/stm32_appinit.c
@@ -165,9 +165,7 @@
 
 int board_app_initialize(uintptr_t arg)
 {
-#if defined(HAVE_MMCSD) || defined(HAVE_USBHOST) || defined(HAVE_W25)
   int ret;
-#endif
 
   /* Initialize and register the W25 FLASH file system. */
 
@@ -206,5 +204,26 @@ int board_app_initialize(uintptr_t arg)
     }
 #endif
 
+#ifdef CONFIG_ADC
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = stm32_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_adc_setup failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_CAN
+  /* Initialize CAN and register the CAN driver. */
+
+  ret = stm32_can_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_can_setup failed: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
   return OK;
 }
diff --git a/configs/shenzhou/src/stm32_autoleds.c b/configs/shenzhou/src/stm32_autoleds.c
index ebc161f643b5579258c0f5d0d04210ab377016e7..71f7b5e88861336d995500db8f464a8713dc061e 100644
--- a/configs/shenzhou/src/stm32_autoleds.c
+++ b/configs/shenzhou/src/stm32_autoleds.c
@@ -57,18 +57,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* The following definitions map the encoded LED setting to GPIO settings */
 
 #define SHENZHOU_LED1     (1 << 0)
diff --git a/configs/shenzhou/src/stm32_boot.c b/configs/shenzhou/src/stm32_boot.c
index 3f52669f7e245047cf3abedc18b7427ccfee1bce..964a3022d73ec80641f269def160eb725c32e61f 100644
--- a/configs/shenzhou/src/stm32_boot.c
+++ b/configs/shenzhou/src/stm32_boot.c
@@ -64,7 +64,7 @@
  *
  * Description:
  *   All STM32 architectures must provide the following entry point.  This entry point
- *   is called early in the intitialization -- after all memory has been configured
+ *   is called early in the initialization -- after all memory has been configured
  *   and mapped but before any devices have been initialized.
  *
  ************************************************************************************/
diff --git a/configs/shenzhou/src/stm32_buttons.c b/configs/shenzhou/src/stm32_buttons.c
index cf31d666e82560034991504804d55488085c27c7..515cad297f19b2c1a8b6dfb3460f631901ab80e4 100644
--- a/configs/shenzhou/src/stm32_buttons.c
+++ b/configs/shenzhou/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/shenzhou/src/stm32_buttons.c
  *
- *   Copyright (C) 2012, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -49,13 +50,10 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
+
 /* Pin configuration for each Shenzhou button.  This array is indexed by
  * the BUTTON_* definitions in board.h
  */
@@ -65,10 +63,6 @@ static const uint32_t g_buttons[NUM_BUTTONS] =
   GPIO_BTN_USERKEY2, GPIO_BTN_USERKEY, GPIO_BTN_TAMPER, GPIO_BTN_WAKEUP
 };
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -150,23 +144,23 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   /* The following should be atomic */
 
   if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
     {
-      oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler, arg);
     }
-  return oldhandler;
+
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/shenzhou/src/stm32_can.c b/configs/shenzhou/src/stm32_can.c
index fa05af42fa288a65e789d68b54eba2fe9545a312..6a08cc1fc0fa427bb2cdff64b97fd66be44fc381 100644
--- a/configs/shenzhou/src/stm32_can.c
+++ b/configs/shenzhou/src/stm32_can.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/shenzhou/src/stm32_can.c
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,7 +42,7 @@
 #include 
 #include 
 
-#include 
+#include 
 #include 
 
 #include "chip.h"
@@ -52,7 +52,7 @@
 #include "stm32_can.h"
 #include "shenzhou.h"
 
-#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2))
+#ifdef CONFIG_CAN
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -60,74 +60,57 @@
 /* Configuration ********************************************************************/
 /* The STM32F107VC supports CAN1 and CAN2 */
 
-#define CAN_PORT 1
-
-/* Debug ***************************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
+#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2)
+#  warning "Both CAN1 and CAN2 are enabled.  Only CAN1 is connected."
+#  undef CONFIG_STM32_CAN2
+#endif
 
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
+#ifdef CONFIG_STM32_CAN1
+#  define CAN_PORT 1
 #else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
+#  define CAN_PORT 2
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_can_initialize
+ * Name: stm32_can_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/can.
+ *  Initialize CAN and register the CAN device
  *
  ************************************************************************************/
 
-int board_can_initialize(void)
+int stm32_can_setup(void)
 {
-  static bool initialized = false;
+#if defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)
   struct can_dev_s *can;
   int ret;
 
-  /* Check if we have already initialized */
+  /* Call stm32_caninitialize() to get an instance of the CAN interface */
 
-  if (!initialized)
+  can = stm32_caninitialize(CAN_PORT);
+  if (can == NULL)
     {
-      /* Call stm32_caninitialize() to get an instance of the CAN interface */
-
-      can = stm32_caninitialize(CAN_PORT);
-      if (can == NULL)
-        {
-          candbg("ERROR:  Failed to get CAN interface\n");
-          return -ENODEV;
-        }
-
-      /* Register the CAN driver at "/dev/can0" */
-
-      ret = can_register("/dev/can0", can);
-      if (ret < 0)
-        {
-          candbg("ERROR: can_register failed: %d\n", ret);
-          return ret;
-        }
+      canerr("ERROR:  Failed to get CAN interface\n");
+      return -ENODEV;
+    }
 
-      /* Now we are initialized */
+  /* Register the CAN driver at "/dev/can0" */
 
-      initialized = true;
+  ret = can_register("/dev/can0", can);
+  if (ret < 0)
+    {
+      canerr("ERROR: can_register failed: %d\n", ret);
+      return ret;
     }
 
   return OK;
+#else
+  return -ENODEV;
+#endif
 }
 
-#endif /* CONFIG_CAN && CONFIG_STM32_CAN1 */
+#endif /* CONFIG_CAN */
diff --git a/configs/shenzhou/src/stm32_ili93xx.c b/configs/shenzhou/src/stm32_ili93xx.c
index c9c33c0a203021a2d45715ee5e024c25b940afab..553e847bd3b5563077a720fc60f338290181e94b 100644
--- a/configs/shenzhou/src/stm32_ili93xx.c
+++ b/configs/shenzhou/src/stm32_ili93xx.c
@@ -202,21 +202,6 @@
 #undef CONFIG_LCD_FASTCONFIG
 #define CONFIG_LCD_FASTCONFIG 1
 
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#  undef CONFIG_LCD_REGDEBUG
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
 /* Display/Color Properties ***********************************************************/
 /* Display Resolution */
 
@@ -368,16 +353,6 @@
 #define ILI9331_ID            0x9331
 #define ILI9919_ID            0x9919
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg              dbg
-#  define lcdvdbg             vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /************************************************************************************
  * Private Type Definition
  ************************************************************************************/
@@ -594,18 +569,18 @@ static struct stm32_dev_s g_lcddev =
 #ifdef CONFIG_LCD_REGDEBUG
 static void stm32_lcdshow(FAR struct stm32_lower_s *priv, FAR const char *msg)
 {
-  dbg("%s:\n", msg);
-  dbg("  CRTL   RS: %d CS: %d RD: %d WR: %d LE: %d\n",
-      getreg32(LCD_RS_READ), getreg32(LCD_CS_READ), getreg32(LCD_RD_READ),
-      getreg32(LCD_WR_READ), getreg32(LCD_LE_READ));
-  dbg("  DATA   CR: %08x %08x\n", getreg32(LCD_CRL), getreg32(LCD_CRH));
+  _info("%s:\n", msg);
+  _info("  CRTL   RS: %d CS: %d RD: %d WR: %d LE: %d\n",
+       getreg32(LCD_RS_READ), getreg32(LCD_CS_READ), getreg32(LCD_RD_READ),
+       getreg32(LCD_WR_READ), getreg32(LCD_LE_READ));
+  _info("  DATA   CR: %08x %08x\n", getreg32(LCD_CRL), getreg32(LCD_CRH));
   if (priv->output)
     {
-      dbg("  OUTPUT: %08x\n", getreg32(LCD_ODR));
+      _info("  OUTPUT: %08x\n", getreg32(LCD_ODR));
     }
   else
     {
-      dbg("  INPUT:  %08x\n", getreg32(LCD_IDR));
+      _info("  INPUT:  %08x\n", getreg32(LCD_IDR));
     }
 }
 #endif
@@ -870,7 +845,7 @@ static int stm32_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffe
 
   /* Buffer must be provided and aligned to a 16-bit address boundary */
 
-  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
 
   /* Write the run to GRAM */
@@ -979,7 +954,7 @@ static int stm32_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
 
   /* Buffer must be provided and aligned to a 16-bit address boundary */
 
-  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
 
   /* Configure according to the LCD type.  Kind of silly with only one LCD type */
@@ -1106,7 +1081,7 @@ static int stm32_getvideoinfo(FAR struct lcd_dev_s *dev,
                               FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  lcdvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+  lcdinfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
           g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
   memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
   return OK;
@@ -1124,7 +1099,7 @@ static int stm32_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
                               FAR struct lcd_planeinfo_s *pinfo)
 {
   DEBUGASSERT(dev && pinfo && planeno == 0);
-  lcdvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+  lcdinfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
   memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
   return OK;
 }
@@ -1142,7 +1117,7 @@ static int stm32_getpower(struct lcd_dev_s *dev)
 {
   FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev;
 
-  lcdvdbg("power: %d\n", 0);
+  lcdinfo("power: %d\n", 0);
   return priv->power;
 }
 
@@ -1180,7 +1155,7 @@ static int stm32_setpower(struct lcd_dev_s *dev, int power)
 {
   FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev;
 
-  lcdvdbg("power: %d\n", power);
+  lcdinfo("power: %d\n", power);
   DEBUGASSERT((unsigned)power <= CONFIG_LCD_MAXPOWER);
 
   /* Set new power level */
@@ -1254,7 +1229,7 @@ static int stm32_setpower(struct lcd_dev_s *dev, int power)
       else
 #endif
         {
-          gdbg("Unsupported LCD: %d\n", priv->type);
+          lcderr("ERROR: Unsupported LCD: %d\n", priv->type);
         }
 
       up_mdelay(50);
@@ -1280,7 +1255,7 @@ static int stm32_setpower(struct lcd_dev_s *dev, int power)
 
 static int stm32_getcontrast(struct lcd_dev_s *dev)
 {
-  lcdvdbg("Not implemented\n");
+  lcdinfo("Not implemented\n");
   return -ENOSYS;
 }
 
@@ -1294,7 +1269,7 @@ static int stm32_getcontrast(struct lcd_dev_s *dev)
 
 static int stm32_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
 {
-  lcdvdbg("contrast: %d\n", contrast);
+  lcdinfo("contrast: %d\n", contrast);
   return -ENOSYS;
 }
 
@@ -1780,7 +1755,7 @@ static inline int stm32_lcdinitialize(FAR struct stm32_dev_s *priv)
   up_mdelay(50);
 
   id = stm32_readreg(priv, LCD_REG_0);     /* Read the ID register */
-  lcddbg("LCD ID: %04x\n", id);
+  lcdinfo("LCD ID: %04x\n", id);
 
   stm32_lcdoutput(priv);
   up_mdelay(10);
@@ -1852,11 +1827,11 @@ static inline int stm32_lcdinitialize(FAR struct stm32_dev_s *priv)
   else
 #endif
     {
-      lcddbg("Unsupported LCD type\n");
+      lcderr("ERROR: Unsupported LCD type\n");
       ret = -ENODEV;
     }
 
-  lcddbg("LCD type: %d\n", priv->type);
+  lcdinfo("LCD type: %d\n", priv->type);
   return ret;
 }
 
@@ -1880,7 +1855,7 @@ int board_lcd_initialize(void)
   int ret;
   int i;
 
-  lcdvdbg("Initializing\n");
+  lcdinfo("Initializing\n");
 
   /* Configure GPIO pins.  The initial state of priv->output is false, so
    * we need to configure pins for output initially.
diff --git a/configs/shenzhou/src/stm32_mmcsd.c b/configs/shenzhou/src/stm32_mmcsd.c
index a585e31ad390568e46ec909a51e7c50fd68ff4e3..3621c655eaaf8bb250ecc44c0f234ebea82319aa 100644
--- a/configs/shenzhou/src/stm32_mmcsd.c
+++ b/configs/shenzhou/src/stm32_mmcsd.c
@@ -95,31 +95,31 @@ int stm32_sdinitialize(int minor)
 
   /* Get the SPI port */
 
-  fvdbg("Initializing SPI port %d\n", STM32_MMCSDSPIPORTNO);
+  finfo("Initializing SPI port %d\n", STM32_MMCSDSPIPORTNO);
 
   spi = stm32_spibus_initialize(STM32_MMCSDSPIPORTNO);
   if (!spi)
     {
-      fdbg("Failed to initialize SPI port %d\n", STM32_MMCSDSPIPORTNO);
+      ferr("ERROR: Failed to initialize SPI port %d\n", STM32_MMCSDSPIPORTNO);
       return -ENODEV;
     }
 
-  fvdbg("Successfully initialized SPI port %d\n", STM32_MMCSDSPIPORTNO);
+  finfo("Successfully initialized SPI port %d\n", STM32_MMCSDSPIPORTNO);
 
   /* Bind the SPI port to the slot */
 
-  fvdbg("Binding SPI port %d to MMC/SD slot %d\n",
+  finfo("Binding SPI port %d to MMC/SD slot %d\n",
           STM32_MMCSDSPIPORTNO, STM32_MMCSDSLOTNO);
 
   ret = mmcsd_spislotinitialize(minor, STM32_MMCSDSLOTNO, spi);
   if (ret < 0)
     {
-      fdbg("Failed to bind SPI port %d to MMC/SD slot %d: %d\n",
+      ferr("ERROR: Failed to bind SPI port %d to MMC/SD slot %d: %d\n",
             STM32_MMCSDSPIPORTNO, STM32_MMCSDSLOTNO, ret);
       return ret;
     }
 
-  fvdbg("Successfuly bound SPI port %d to MMC/SD slot %d\n",
+  finfo("Successfuly bound SPI port %d to MMC/SD slot %d\n",
         STM32_MMCSDSPIPORTNO, STM32_MMCSDSLOTNO);
 #endif
   return OK;
diff --git a/configs/shenzhou/src/stm32_spi.c b/configs/shenzhou/src/stm32_spi.c
index 48949d686a4caa6e020c6b8ea1ab8b45a60b79d1..1f6a45ed8189c6e11d565eb54bc35311e35d5de8 100644
--- a/configs/shenzhou/src/stm32_spi.c
+++ b/configs/shenzhou/src/stm32_spi.c
@@ -53,32 +53,6 @@
 
 #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI3)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_SPI
-#endif
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -145,7 +119,7 @@ void weak_function stm32_spidev_initialize(void)
 #ifdef CONFIG_STM32_SPI1
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
   /* SPI1 connects to the SD CARD and to the SPI FLASH */
 
@@ -181,7 +155,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI3
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
   /* SPI3 connects to TFT LCD (for touchscreen and SD) and the RF24L01 2.4G
    * wireless module.
diff --git a/configs/shenzhou/src/stm32_ssd1289.c b/configs/shenzhou/src/stm32_ssd1289.c
index bddfa1c8b0a50e8320499f47267166aea1c680e4..413a49c9e441abbe2ba13cdac0a3c50bdcfdd8c5 100644
--- a/configs/shenzhou/src/stm32_ssd1289.c
+++ b/configs/shenzhou/src/stm32_ssd1289.c
@@ -67,35 +67,10 @@
  * Pre-processor Definitions
  ************************************************************************************/
 /* Configuration ********************************************************************/
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#  undef CONFIG_LCD_REGDEBUG
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
 
 #undef CONFIG_LCD_FASTCONFIG
 #define CONFIG_LCD_FASTCONFIG 1
 
-/* Shenzhou LCD Hardware Definitions ************************************************/
-/* Debug ****************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg         dbg
-#  define lcdvdbg        vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /************************************************************************************
  * Private Type Definition
  ************************************************************************************/
@@ -277,18 +252,18 @@ static struct stm32_lower_s g_lcdlower =
 #ifdef CONFIG_LCD_REGDEBUG
 static void stm32_lcdshow(FAR struct stm32_lower_s *priv, FAR const char *msg)
 {
-  dbg("%s:\n", msg);
-  dbg("  CRTL   RS: %d CS: %d RD: %d WR: %d LE: %d\n",
-      getreg32(LCD_RS_READ), getreg32(LCD_CS_READ), getreg32(LCD_RD_READ),
-      getreg32(LCD_WR_READ), getreg32(LCD_LE_READ));
-  dbg("  DATA   CR: %08x %08x\n", getreg32(LCD_CRL), getreg32(LCD_CRH));
+  _info("%s:\n", msg);
+  _info("  CRTL   RS: %d CS: %d RD: %d WR: %d LE: %d\n",
+       getreg32(LCD_RS_READ), getreg32(LCD_CS_READ), getreg32(LCD_RD_READ),
+       getreg32(LCD_WR_READ), getreg32(LCD_LE_READ));
+  _info("  DATA   CR: %08x %08x\n", getreg32(LCD_CRL), getreg32(LCD_CRH));
   if (priv->output)
     {
-      dbg("  OUTPUT: %08x\n", getreg32(LCD_ODR));
+      _info("  OUTPUT: %08x\n", getreg32(LCD_ODR));
     }
   else
     {
-      dbg("  INPUT:  %08x\n", getreg32(LCD_IDR));
+      _info("  INPUT:  %08x\n", getreg32(LCD_IDR));
     }
 }
 #endif
@@ -548,7 +523,7 @@ int board_lcd_initialize(void)
 
   if (!priv->drvr)
     {
-      lcdvdbg("Initializing\n");
+      lcdinfo("Initializing\n");
 
       /* Configure GPIO pins */
 
@@ -563,7 +538,7 @@ int board_lcd_initialize(void)
       priv->drvr = ssd1289_lcdinitialize(&priv->dev);
       if (!priv->drvr)
         {
-          lcddbg("ERROR: ssd1289_lcdinitialize failed\n");
+          lcderr("ERROR: ssd1289_lcdinitialize failed\n");
           return -ENODEV;
         }
     }
diff --git a/configs/shenzhou/src/stm32_touchscreen.c b/configs/shenzhou/src/stm32_touchscreen.c
index abfe6ebdd7b2b459d1f724ed7ffe796a67f66a23..99b3971df80b1db8d459d1dc5dd084d796246e89 100644
--- a/configs/shenzhou/src/stm32_touchscreen.c
+++ b/configs/shenzhou/src/stm32_touchscreen.c
@@ -181,15 +181,16 @@ static void tsc_enable(FAR struct ads7843e_config_s *state, bool enable)
 
   /* Attach and enable, or detach and disable */
 
-  ivdbg("enable:%d\n", enable);
+  iinfo("enable:%d\n", enable);
   if (enable)
     {
       (void)stm32_gpiosetevent(GPIO_TP_INT, true, true, false,
-                               priv->handler);
+                               priv->handler, NULL);
     }
   else
     {
-      (void)stm32_gpiosetevent(GPIO_TP_INT, false, false, false, NULL);
+      (void)stm32_gpiosetevent(GPIO_TP_INT, false, false, false,
+                               NULL, NULL);
     }
 }
 
@@ -220,7 +221,7 @@ static bool tsc_pendown(FAR struct ads7843e_config_s *state)
    */
 
   bool pendown = !stm32_gpioread(GPIO_TP_INT);
-  ivdbg("pendown:%d\n", pendown);
+  iinfo("pendown:%d\n", pendown);
   return pendown;
 }
 
@@ -251,7 +252,7 @@ int board_tsc_setup(int minor)
   FAR struct spi_dev_s *dev;
   int ret;
 
-  idbg("minor %d\n", minor);
+  iinfo("minor %d\n", minor);
   DEBUGASSERT(minor == 0);
 
   /* Configure and enable the ADS7843E interrupt pin as an input. */
@@ -263,7 +264,7 @@ int board_tsc_setup(int minor)
   dev = stm32_spibus_initialize(CONFIG_ADS7843E_SPIDEV);
   if (!dev)
     {
-      idbg("Failed to initialize SPI bus %d\n", CONFIG_ADS7843E_SPIDEV);
+      ierr("ERROR: Failed to initialize SPI bus %d\n", CONFIG_ADS7843E_SPIDEV);
       return -ENODEV;
     }
 
@@ -272,7 +273,7 @@ int board_tsc_setup(int minor)
   ret = ads7843e_register(dev, &g_tscinfo.dev, CONFIG_ADS7843E_DEVMINOR);
   if (ret < 0)
     {
-      idbg("Failed to initialize SPI bus %d\n", CONFIG_ADS7843E_SPIDEV);
+      ierr("ERROR: Failed to initialize SPI bus %d\n", CONFIG_ADS7843E_SPIDEV);
       /* up_spiuninitialize(dev); */
       return -ENODEV;
     }
diff --git a/configs/shenzhou/src/stm32_usb.c b/configs/shenzhou/src/stm32_usb.c
index 80ed3c53dda69c69bbe5319b7b20582df93a5bca..5baddf4d016329dc0945a03b0a0480f7dc8c1998 100644
--- a/configs/shenzhou/src/stm32_usb.c
+++ b/configs/shenzhou/src/stm32_usb.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/shenzhou/src/stm32_usb.c
  *
- *   Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012-2013, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -54,7 +54,7 @@
 #include "up_arch.h"
 #include "stm32.h"
 #include "stm32_otgfs.h"
-#include "shenshou.h"
+#include "shenzhou.h"
 
 #ifdef CONFIG_STM32_OTGFS
 
@@ -106,13 +106,13 @@ static int usbhost_waiter(int argc, char *argv[])
 {
   struct usbhost_hubport_s *hport;
 
-  uvdbg("Running\n");
+  uinfo("Running\n");
   for (;;)
     {
       /* Wait for the device to change state */
 
       DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
-      uvdbg("%s\n", hport->connected ? "connected" : "disconnected");
+      uinfo("%s\n", hport->connected ? "connected" : "disconnected");
 
       /* Did we just become connected? */
 
@@ -176,7 +176,7 @@ int stm32_usbhost_initialize(void)
    * that we care about:
    */
 
-  uvdbg("Register class drivers\n");
+  uinfo("Register class drivers\n");
 
 #ifdef CONFIG_USBHOST_MSC
   /* Register the USB mass storage class class */
@@ -184,7 +184,7 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_msc_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the mass storage class: %d\n", ret);
+      uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
     }
 #endif
 
@@ -194,19 +194,19 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_cdcacm_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
+      uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
     }
 #endif
 
   /* Then get an instance of the USB host interface */
 
-  uvdbg("Initialize USB host\n");
+  uinfo("Initialize USB host\n");
   g_usbconn = stm32_otgfshost_initialize(0);
   if (g_usbconn)
     {
       /* Start a thread to handle device connection. */
 
-      uvdbg("Start usbhost_waiter\n");
+      uinfo("Start usbhost_waiter\n");
 
       pid = task_create("usbhost", CONFIG_USBHOST_DEFPRIO,
                         CONFIG_USBHOST_STACKSIZE,
@@ -273,16 +273,18 @@ void stm32_usbhost_vbusdrive(int iface, bool enable)
  *
  * Input Parameter:
  *   handler - New overcurrent interrupt handler
+ *   arg     - The argument provided for the interrupt handler
  *
  * Returned value:
- *   Old overcurrent interrupt handler
+ *   Zero (OK) is returned on success.  Otherwise, a negated errno value is returned
+ *   to indicate the nature of the failure.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_USBHOST
-xcpt_t stm32_setup_overcurrent(xcpt_t handler)
+int stm32_setup_overcurrent(xcpt_t handler, void *arg)
 {
-  return NULL;
+  return -ENOSYS;
 }
 #endif
 
@@ -300,7 +302,7 @@ xcpt_t stm32_setup_overcurrent(xcpt_t handler)
 #ifdef CONFIG_USBDEV
 void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
 #endif
 
diff --git a/configs/shenzhou/src/stm32_userleds.c b/configs/shenzhou/src/stm32_userleds.c
index e96fb9afda5bbe116378dc89dac9bc3e39f8da71..4beb5de5e8ade2994dc21967e1fa02c76428f268 100644
--- a/configs/shenzhou/src/stm32_userleds.c
+++ b/configs/shenzhou/src/stm32_userleds.c
@@ -53,22 +53,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
diff --git a/configs/shenzhou/src/stm32_w25.c b/configs/shenzhou/src/stm32_w25.c
index fe27c8a1d7bd954a53c5d02665eafbbc83fc5b7d..68db581ce3ceb2b196582cd8353123b8563573ef 100644
--- a/configs/shenzhou/src/stm32_w25.c
+++ b/configs/shenzhou/src/stm32_w25.c
@@ -107,7 +107,7 @@ int stm32_w25initialize(int minor)
   spi = stm32_spibus_initialize(1);
   if (!spi)
     {
-      fdbg("ERROR: Failed to initialize SPI port 2\n");
+      ferr("ERROR: Failed to initialize SPI port 2\n");
       return -ENODEV;
     }
 
@@ -116,7 +116,7 @@ int stm32_w25initialize(int minor)
   mtd = w25_initialize(spi);
   if (!mtd)
     {
-      fdbg("ERROR: Failed to bind SPI port 2 to the SST 25 FLASH driver\n");
+      ferr("ERROR: Failed to bind SPI port 2 to the SST 25 FLASH driver\n");
       return -ENODEV;
     }
 
@@ -126,7 +126,7 @@ int stm32_w25initialize(int minor)
   ret = ftl_initialize(minor, mtd);
   if (ret < 0)
     {
-      fdbg("ERROR: Initialize the FTL layer\n");
+      ferr("ERROR: Initialize the FTL layer\n");
       return ret;
     }
 #else
@@ -135,7 +135,7 @@ int stm32_w25initialize(int minor)
   ret = nxffs_initialize(mtd);
   if (ret < 0)
     {
-      fdbg("ERROR: NXFFS initialization failed: %d\n", -ret);
+      ferr("ERROR: NXFFS initialization failed: %d\n", -ret);
       return ret;
     }
 
@@ -145,7 +145,7 @@ int stm32_w25initialize(int minor)
   ret = mount(NULL, devname, "nxffs", 0, NULL);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
+      ferr("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
       return ret;
     }
 #endif
diff --git a/configs/shenzhou/thttpd/Make.defs b/configs/shenzhou/thttpd/Make.defs
index 85999c8278293358388f8cb67ee44501b5e901af..38560adc332df50449756b6a68c9438435db0e18 100644
--- a/configs/shenzhou/thttpd/Make.defs
+++ b/configs/shenzhou/thttpd/Make.defs
@@ -85,7 +85,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/shenzhou/thttpd/defconfig b/configs/shenzhou/thttpd/defconfig
index 89c3735931762c714520bb3b3e970e492ba3907d..1423d64a99fa2ae29f47016734170ffb7f865aa9 100644
--- a/configs/shenzhou/thttpd/defconfig
+++ b/configs/shenzhou/thttpd/defconfig
@@ -42,37 +42,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-CONFIG_ARCH_HAVE_HEAPCHECK=y
-# CONFIG_DEBUG_VERBOSE is not set
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_NET is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_HEAP is not set
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_LEDS is not set
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
-# CONFIG_DEBUG_RTC is not set
-# CONFIG_DEBUG_SPI is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -86,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -99,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -155,7 +131,6 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
-# CONFIG_DEBUG_HARDFAULT is not set
 
 #
 # ARMV7M Configuration Options
@@ -228,6 +203,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 CONFIG_ARCH_CHIP_STM32F107VC=y
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -358,7 +334,7 @@ CONFIG_STM32_HAVE_TIM4=y
 CONFIG_STM32_HAVE_TIM5=y
 CONFIG_STM32_HAVE_TIM6=y
 CONFIG_STM32_HAVE_TIM7=y
-CONFIG_STM32_HAVE_TIM8=y
+# CONFIG_STM32_HAVE_TIM8 is not set
 # CONFIG_STM32_HAVE_TIM9 is not set
 # CONFIG_STM32_HAVE_TIM10 is not set
 # CONFIG_STM32_HAVE_TIM11 is not set
@@ -375,6 +351,12 @@ CONFIG_STM32_HAVE_ADC2=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -407,6 +389,7 @@ CONFIG_STM32_PWR=y
 CONFIG_STM32_SPI1=y
 # CONFIG_STM32_SPI2 is not set
 # CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SYSCFG=y
 # CONFIG_STM32_TIM1 is not set
 # CONFIG_STM32_TIM2 is not set
 # CONFIG_STM32_TIM3 is not set
@@ -414,7 +397,6 @@ CONFIG_STM32_SPI1=y
 # CONFIG_STM32_TIM5 is not set
 # CONFIG_STM32_TIM6 is not set
 # CONFIG_STM32_TIM7 is not set
-# CONFIG_STM32_TIM8 is not set
 # CONFIG_STM32_USART1 is not set
 CONFIG_STM32_USART2=y
 # CONFIG_STM32_USART3 is not set
@@ -438,20 +420,33 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
 # CONFIG_STM32_TIM5_CAP is not set
-# CONFIG_STM32_TIM8_CAP is not set
 CONFIG_STM32_USART=y
 CONFIG_STM32_SERIALDRIVER=y
 
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -486,7 +481,7 @@ CONFIG_STM32_PHYSR_100FD=0x8000
 CONFIG_STM32_RMII=y
 CONFIG_STM32_RMII_MCO=y
 # CONFIG_STM32_RMII_EXTCLK is not set
-# CONFIG_STM32_ETHMAC_REGDEBUG is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -568,6 +563,7 @@ CONFIG_RAM_SIZE=65536
 # CONFIG_ARCH_BOARD_CLOUDCTRL is not set
 # CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set
 CONFIG_ARCH_BOARD_SHENZHOU=y
+# CONFIG_ARCH_BOARD_STM32_BUTTERFLY2 is not set
 # CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="shenzhou"
@@ -580,17 +576,15 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -607,9 +601,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=8
@@ -661,6 +658,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -669,6 +667,7 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
@@ -680,8 +679,11 @@ CONFIG_MQ_MAXMSGSIZE=32
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -699,6 +701,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -714,19 +717,25 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 # CONFIG_RTC_DATETIME is not set
 # CONFIG_RTC_HIRES is not set
@@ -739,8 +748,18 @@ CONFIG_RTC=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -748,6 +767,7 @@ CONFIG_RTC=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -770,7 +790,9 @@ CONFIG_MTD=y
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
 # CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
@@ -798,7 +820,6 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NETDEV_MULTINIC is not set
 # CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set
 # CONFIG_NETDEV_LATEINIT is not set
-# CONFIG_NET_DUMPPACKET is not set
 
 #
 # External Ethernet MAC Device Support
@@ -806,10 +827,8 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -829,14 +848,17 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_ETH0_PHY_LAN8740A is not set
 # CONFIG_ETH0_PHY_LAN8742A is not set
 CONFIG_ETH0_PHY_DM9161=y
-# CONFIG_NETDEV_PHY_DEBUG is not set
-# CONFIG_PIPES is not set
+CONFIG_PIPES=y
+CONFIG_DEV_PIPE_MAXSIZE=1024
+CONFIG_DEV_PIPE_SIZE=1024
+CONFIG_DEV_FIFO_SIZE=1024
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -866,7 +888,6 @@ CONFIG_SERIAL_NPOLLWAITERS=2
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
-# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_USART2_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -884,19 +905,26 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -904,13 +932,11 @@ CONFIG_USART2_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=768
 CONFIG_NET_ETH_TCP_RECVWNDO=742
 CONFIG_NET_GUARDSIZE=2
@@ -995,7 +1021,6 @@ CONFIG_NET_ARPTAB_SIZE=16
 CONFIG_NET_ARP_MAXAGE=120
 # CONFIG_NET_ARP_IPIN is not set
 # CONFIG_NET_ARP_SEND is not set
-# CONFIG_NET_ARP_DUMP is not set
 
 #
 # Network I/O Buffer Support
@@ -1004,7 +1029,6 @@ CONFIG_NET_IOB=y
 CONFIG_IOB_NBUFFERS=24
 CONFIG_IOB_BUFSIZE=196
 CONFIG_IOB_NCHAINS=8
-# CONFIG_IOB_DEBUG is not set
 # CONFIG_NET_ARCH_INCR32 is not set
 # CONFIG_NET_ARCH_CHKSUM is not set
 CONFIG_NET_STATISTICS=y
@@ -1051,12 +1075,6 @@ CONFIG_FS_ROMFS=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1106,6 +1124,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1123,7 +1143,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
@@ -1140,8 +1159,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1172,21 +1193,24 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1196,28 +1220,28 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1229,17 +1253,17 @@ CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1259,8 +1283,9 @@ CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1274,10 +1299,14 @@ CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
@@ -1313,15 +1342,11 @@ CONFIG_THTTPD_IDLE_SEND_LIMIT_SEC=300
 CONFIG_THTTPD_TILDE_MAP_NONE=y
 # CONFIG_THTTPD_GENERATE_INDICES is not set
 # CONFIG_THTTPD_USE_URLPATTERN is not set
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1380,6 +1405,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1397,6 +1423,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1423,8 +1450,8 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
-# CONFIG_NSH_NETINIT_DEBUG is not set
 
 #
 # IP Address Configuration
@@ -1468,13 +1495,13 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1483,6 +1510,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sim/README.txt b/configs/sim/README.txt
index 759b75647f1bf9c686a58fa2c26dd689bbcc04b9..e3712b11f91e4015bd21abc1a3583c5ebb6601b1 100644
--- a/configs/sim/README.txt
+++ b/configs/sim/README.txt
@@ -243,9 +243,6 @@ SMP
 
   You can enable SMP for ostest configuration by enabling:
 
-    -# CONFIG_EXPERIMENTAL is not set
-    +CONFIG_EXPERIMENTAL=y
-
     +CONFIG_SPINLOCK=y
     +CONFIG_SMP=y
     +CONFIG_SMP_NCPUS=2
@@ -490,6 +487,11 @@ cxxtest
      postpone running C++ static initializers until NuttX has been
      initialized.
 
+minibasic
+
+  This configuration was used to test the Mini Basic port at
+  apps/interpreters/minibasic.
+
 mount
 
   Configures to use apps/examples/mount.
diff --git a/configs/sim/bas/Make.defs b/configs/sim/bas/Make.defs
index 984c46f9d70a34deac82cdee06cbddfd0f4d0762..5687f0150f236675d40a8bd837e394f8161e1f43 100644
--- a/configs/sim/bas/Make.defs
+++ b/configs/sim/bas/Make.defs
@@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCPUFLAGS		= -fno-builtin
-ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fno-rtti
+ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHPICFLAGS		= -fpic
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/sim/bas/defconfig b/configs/sim/bas/defconfig
index a20524034a8401d4c68d18b62b98a7081af5dc96..62b7410c676008cd277d132bc7e6b75287c517c6 100644
--- a/configs/sim/bas/defconfig
+++ b/configs/sim/bas/defconfig
@@ -41,7 +41,7 @@ CONFIG_BUILD_FLAT=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
 CONFIG_DEBUG_SYMBOLS=y
@@ -56,8 +56,7 @@ CONFIG_DEBUG_NOOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -148,8 +147,6 @@ CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_APP_SYMTAB is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -301,7 +298,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 # CONFIG_16550_UART is not set
@@ -349,7 +345,7 @@ CONFIG_SERIAL=y
 # System Logging
 #
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
 
 #
 # Networking Support
@@ -403,7 +399,6 @@ CONFIG_FS_PROCFS=y
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 # CONFIG_SYSLOG_TIMESTAMP is not set
 
 #
@@ -472,7 +467,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
@@ -536,7 +530,6 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
@@ -718,7 +711,7 @@ CONFIG_NSH_ARCHINIT=y
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_RAMTEST is not set
diff --git a/configs/sim/configdata/Make.defs b/configs/sim/configdata/Make.defs
index d516d172e6c6734582ce95f6552b7fe5589b088f..e614279eb4bb2d94ad8d9d1f51ee73825924fa3f 100644
--- a/configs/sim/configdata/Make.defs
+++ b/configs/sim/configdata/Make.defs
@@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCPUFLAGS = -fno-builtin
-ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHPICFLAGS = -fpic
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
diff --git a/configs/sim/configdata/defconfig b/configs/sim/configdata/defconfig
index 3da0ca88e8fee8d754943e72548c1487f4882bc8..31022c6878bf53523edea4c94420ef6b13a075c1 100644
--- a/configs/sim/configdata/defconfig
+++ b/configs/sim/configdata/defconfig
@@ -37,36 +37,15 @@ CONFIG_BUILD_FLAT=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_AUDIO is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 CONFIG_DEBUG_SYMBOLS=y
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 CONFIG_DEBUG_NOOPT=y
@@ -79,8 +58,7 @@ CONFIG_DEBUG_NOOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -96,6 +74,8 @@ CONFIG_HOST_X86_64=y
 CONFIG_SIM_X8664_SYSTEMV=y
 # CONFIG_SIM_X8664_MICROSOFT is not set
 # CONFIG_SIM_WALLTIME is not set
+CONFIG_SIM_NET_HOST_ROUTE=y
+# CONFIG_SIM_NET_BRIDGE is not set
 # CONFIG_SIM_FRAMEBUFFER is not set
 # CONFIG_SIM_SPIFLASH is not set
 
@@ -110,6 +90,7 @@ CONFIG_SIM_X8664_SYSTEMV=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+CONFIG_ARCH_HAVE_MULTICPU=y
 # CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -165,6 +146,7 @@ CONFIG_ARCH_BOARD="sim"
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -233,9 +215,10 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 
 #
@@ -281,8 +264,27 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 CONFIG_MTD=y
 
 #
@@ -309,12 +311,15 @@ CONFIG_RAMMTD_FLASHSIM=y
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
 # CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -322,9 +327,10 @@ CONFIG_RAMMTD_FLASHSIM=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -348,10 +354,6 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 # CONFIG_MCU_SERIAL is not set
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -360,17 +362,22 @@ CONFIG_SERIAL=y
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -402,7 +409,9 @@ CONFIG_FS_FAT=y
 # CONFIG_FAT_LCNAMES is not set
 # CONFIG_FAT_LFN is not set
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 CONFIG_FS_NXFFS=y
 # CONFIG_NXFFS_SCAN_VOLUME is not set
 CONFIG_NXFFS_PREALLOCATED=y
@@ -417,12 +426,6 @@ CONFIG_NXFFS_TAILTHRESHOLD=8192
 # CONFIG_FS_UNIONFS is not set
 # CONFIG_FS_HOSTFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -441,6 +444,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -485,15 +492,18 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -512,6 +522,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CHAT is not set
 CONFIG_EXAMPLES_CONFIGDATA=y
 # CONFIG_EXAMPLES_CONFIGDATA_ARCHINIT is not set
 CONFIG_EXAMPLES_CONFIGDATA_NEBLOCKS=4
@@ -525,10 +536,10 @@ CONFIG_EXAMPLES_CONFIGDATA_SILENT=y
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -537,7 +548,6 @@ CONFIG_EXAMPLES_CONFIGDATA_SILENT=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 CONFIG_EXAMPLES_NXFFS=y
 # CONFIG_EXAMPLES_NXFFS_ARCHINIT is not set
 CONFIG_EXAMPLES_NXFFS_NEBLOCKS=32
@@ -551,32 +561,41 @@ CONFIG_EXAMPLES_NXFFS_NLOOPS=100
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -589,8 +608,8 @@ CONFIG_EXAMPLES_NXFFS_NLOOPS=100
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -601,6 +620,7 @@ CONFIG_EXAMPLES_NXFFS_NLOOPS=100
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -622,16 +642,16 @@ CONFIG_PLATFORM_CONFIGDATA=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sim/cxxtest/Make.defs b/configs/sim/cxxtest/Make.defs
index 93eed54eb59b3c7b3e2a60057a271a0d847d0c1e..11437e2780666a21883ac4a78d93d8fc82886171 100644
--- a/configs/sim/cxxtest/Make.defs
+++ b/configs/sim/cxxtest/Make.defs
@@ -50,7 +50,7 @@ ARCHCPUFLAGS = -fno-builtin
 ifeq ($(CONFIG_UCLIBCXX_EXCEPTION),y)
   ARCHCPUFLAGSXX = -fno-builtin
 else
-  ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions
+  ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new
 endif
 ARCHPICFLAGS = -fpic
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
diff --git a/configs/sim/cxxtest/defconfig b/configs/sim/cxxtest/defconfig
index bd146760dc61ca73c2635b1c84df2205c6dc8d3c..6aeace8f0b6f424cfae0e4e4be412db7e416396b 100644
--- a/configs/sim/cxxtest/defconfig
+++ b/configs/sim/cxxtest/defconfig
@@ -37,36 +37,15 @@ CONFIG_BUILD_FLAT=y
 # CONFIG_ARCH_MATH_H is not set
 CONFIG_ARCH_FLOAT_H=y
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-CONFIG_DEBUG_VERBOSE=y
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_AUDIO is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 # CONFIG_DEBUG_NOOPT is not set
@@ -79,8 +58,7 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -96,6 +74,8 @@ CONFIG_HOST_X86_64=y
 CONFIG_SIM_X8664_SYSTEMV=y
 # CONFIG_SIM_X8664_MICROSOFT is not set
 # CONFIG_SIM_WALLTIME is not set
+CONFIG_SIM_NET_HOST_ROUTE=y
+# CONFIG_SIM_NET_BRIDGE is not set
 # CONFIG_SIM_FRAMEBUFFER is not set
 # CONFIG_SIM_SPIFLASH is not set
 
@@ -110,6 +90,7 @@ CONFIG_SIM_X8664_SYSTEMV=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+CONFIG_ARCH_HAVE_MULTICPU=y
 # CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -165,6 +146,7 @@ CONFIG_ARCH_BOARD="sim"
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -254,9 +236,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=32
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -305,17 +288,37 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -339,10 +342,6 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 # CONFIG_MCU_SERIAL is not set
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -351,17 +350,22 @@ CONFIG_SERIAL=y
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -399,12 +403,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_UNIONFS is not set
 # CONFIG_FS_HOSTFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -423,6 +421,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -465,14 +467,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -501,6 +506,7 @@ CONFIG_UCLIBCXX_HAVE_LIBSUPCXX=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 CONFIG_EXAMPLES_CXXTEST=y
@@ -510,10 +516,10 @@ CONFIG_EXAMPLES_CXXTEST=y
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -522,37 +528,43 @@ CONFIG_EXAMPLES_CXXTEST=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -564,8 +576,8 @@ CONFIG_EXAMPLES_CXXTEST=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -576,6 +588,7 @@ CONFIG_EXAMPLES_CXXTEST=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -597,16 +610,16 @@ CONFIG_EXAMPLES_CXXTEST=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sim/include/.gitignore b/configs/sim/include/.gitignore
index 0561ac18486ae72895d799653404300d9d86a13a..e42f6d7bc8e1527a18452658d8c15de397129b0e 100644
--- a/configs/sim/include/.gitignore
+++ b/configs/sim/include/.gitignore
@@ -1,2 +1,2 @@
-/etc
-/romfs_img
+/etc
+/romfs_img
diff --git a/configs/rgmp/arm/nsh/Make.defs b/configs/sim/minibasic/Make.defs
similarity index 58%
rename from configs/rgmp/arm/nsh/Make.defs
rename to configs/sim/minibasic/Make.defs
index 3361618528b105d832790d73dc98897643b90c01..602126df11345e47af8e851f43d78c666f9533d1 100644
--- a/configs/rgmp/arm/nsh/Make.defs
+++ b/configs/sim/minibasic/Make.defs
@@ -1,10 +1,8 @@
 ############################################################################
-# configs/rgmp/nsh/Make.defs
+# configs/sim/minibasic/Make.defs
 #
-#   Copyright (C) 2011 Yu Qiang. All rights reserved.
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
-#   Authors: Yu Qiang 
-#            Gregory Nutt 
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions
@@ -38,29 +36,34 @@
 include ${TOPDIR}/.config
 include ${TOPDIR}/tools/Config.mk
 
-RGMPLIBDIR := $(RGMP_INST_DIR)/lib
-RGMPINCDIR := $(RGMP_INST_DIR)/include
-RGMPLKSCPT := $(RGMP_INST_DIR)/etc/rgmp.ld
-
-HOSTOS			= ${shell uname -o}
+HOSTOS			= ${shell uname -o 2>/dev/null || echo "Other"}
 
 ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
-  ARCHOPTIMIZATION	= -O2 -gstabs
-else
-  ARCHOPTIMIZATION	= -O2
+  ARCHOPTIMIZATION	= -g
 endif
 
-ARCHCPUFLAGS		= -fno-builtin -nostdinc -fno-stack-protector -fno-omit-frame-pointer \
-                          -marm -march=armv7-a
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION	+= -O2
+endif
+
+ARCHCPUFLAGS		= -fno-builtin
+ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHPICFLAGS		= -fpic
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
 ARCHDEFINES		=
-ARCHINCLUDES		= -I. -isystem $(TOPDIR)/include -I$(RGMPINCDIR) \
-			  -I$(TOPDIR)/configs/rgmp/include -I$(TOPDIR)/arch/rgmp/include/arm
+ARCHINCLUDES		= -I. -isystem $(TOPDIR)/include
+ARCHINCLUDESXX		= -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
 ARCHSCRIPT		=
 
+ifeq ($(CONFIG_SIM_M32),y)
+  ARCHCPUFLAGS		+= -m32
+  ARCHCPUFLAGSXX	+= -m32
+endif
+
 CROSSDEV		=
 CC			= $(CROSSDEV)gcc
+CXX			= $(CROSSDEV)g++
 CPP			= $(CROSSDEV)gcc -E
 LD			= $(CROSSDEV)ld
 AR			= $(CROSSDEV)ar rcs
@@ -69,10 +72,26 @@ OBJCOPY			= $(CROSSDEV)objcopy
 OBJDUMP			= $(CROSSDEV)objdump
 
 CFLAGS			= $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \
-			  $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) -pipe
-CPPFLAGS		= $(ARCHINCLUDES) $(ARCHDEFINES)
+			  $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXFLAGS		= $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \
+			  $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPPFLAGS		= $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
 AFLAGS			= $(CFLAGS) -D__ASSEMBLY__
 
+
+# ELF module definitions
+
+CELFFLAGS = $(CFLAGS)
+CXXELFFLAGS = $(CXXFLAGS)
+
+LDELFFLAGS = -r -e main
+ifeq ($(WINTOOL),y)
+  LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}"
+else
+  LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld
+endif
+
+
 ASMEXT			= .S
 OBJEXT			= .o
 LIBEXT			= .a
@@ -83,8 +102,21 @@ else
   EXEEXT		=
 endif
 
-LDFLAGS                 += -nostdlib
-EXTRA_LIBS		=
+LDLINKFLAGS		= $(ARCHSCRIPT)	# Link flags used with $(LD)
+CCLINKFLAGS		= $(ARCHSCRIPT)	# Link flags used with $(CC)
+LDFLAGS			= $(ARCHSCRIPT)	# For backward compatibility, same as CCLINKFLAGS
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDLINKFLAGS		+= -g
+  CCLINKFLAGS		+= -g
+  LDFLAGS			+= -g
+endif
+
+ifeq ($(CONFIG_SIM_M32),y)
+  LDLINKFLAGS		+= -melf_i386
+  CCLINKFLAGS		+= -m32
+  LDFLAGS			+= -m32
+endif
 
 
 MKDEP			= $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
@@ -92,5 +124,5 @@ MKDEP			= $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
 HOSTCC			= gcc
 HOSTINCLUDES		= -I.
 HOSTCFLAGS		= $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \
-			  $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) -pipe
+			  $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
 HOSTLDFLAGS		=
diff --git a/configs/compal_e99/nsh_compalram/defconfig b/configs/sim/minibasic/defconfig
similarity index 64%
rename from configs/compal_e99/nsh_compalram/defconfig
rename to configs/sim/minibasic/defconfig
index e3107fc84707a1a341b1e7ea735a4500f5de0d47..486a38de9ce528da1649790e57fdbfb5d03a5ea3 100644
--- a/configs/compal_e99/nsh_compalram/defconfig
+++ b/configs/sim/minibasic/defconfig
@@ -26,7 +26,7 @@ CONFIG_BUILD_FLAT=y
 # CONFIG_RRLOAD_BINARY is not set
 # CONFIG_INTELHEX_BINARY is not set
 # CONFIG_MOTOROLA_SREC is not set
-CONFIG_RAW_BINARY=y
+# CONFIG_RAW_BINARY is not set
 # CONFIG_UBOOT_UIMAGE is not set
 
 #
@@ -37,116 +37,74 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+CONFIG_DEBUG_ALERT=y
+CONFIG_DEBUG_FEATURES=y
+
+#
+# Debug SYSLOG Output Controls
+#
+# CONFIG_DEBUG_ERROR is not set
+CONFIG_DEBUG_ASSERTIONS=y
+
+#
+# Subsystem Debug Options
+#
+# CONFIG_DEBUG_BINFMT is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_GRAPHICS is not set
+# CONFIG_DEBUG_LIB is not set
+# CONFIG_DEBUG_MM is not set
+# CONFIG_DEBUG_SCHED is not set
+
+#
+# OS Function Debug Options
+#
+# CONFIG_DEBUG_IRQ is not set
+
+#
+# Driver Debug Options
+#
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_ARCH_HAVE_STACKCHECK is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
-CONFIG_ARCH_HAVE_STACKCHECK=y
-# CONFIG_STACK_COLORATION is not set
-# CONFIG_DEBUG_SYMBOLS is not set
-CONFIG_ARCH_HAVE_CUSTOMOPT=y
-# CONFIG_DEBUG_NOOPT is not set
-# CONFIG_DEBUG_CUSTOMOPT is not set
-CONFIG_DEBUG_FULLOPT=y
+CONFIG_DEBUG_SYMBOLS=y
+# CONFIG_ARCH_HAVE_CUSTOMOPT is not set
+CONFIG_DEBUG_NOOPT=y
+# CONFIG_DEBUG_FULLOPT is not set
 
 #
 # System Type
 #
-CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_ARM is not set
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
-# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_RENESAS is not set
+CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
-CONFIG_ARCH="arm"
-
-#
-# ARM Options
-#
-# CONFIG_ARCH_CHIP_A1X is not set
-# CONFIG_ARCH_CHIP_C5471 is not set
-CONFIG_ARCH_CHIP_CALYPSO=y
-# CONFIG_ARCH_CHIP_DM320 is not set
-# CONFIG_ARCH_CHIP_EFM32 is not set
-# CONFIG_ARCH_CHIP_IMX1 is not set
-# CONFIG_ARCH_CHIP_KINETIS is not set
-# CONFIG_ARCH_CHIP_KL is not set
-# CONFIG_ARCH_CHIP_LM is not set
-# CONFIG_ARCH_CHIP_TIVA is not set
-# CONFIG_ARCH_CHIP_LPC11XX is not set
-# CONFIG_ARCH_CHIP_LPC17XX is not set
-# CONFIG_ARCH_CHIP_LPC214X is not set
-# CONFIG_ARCH_CHIP_LPC2378 is not set
-# CONFIG_ARCH_CHIP_LPC31XX is not set
-# CONFIG_ARCH_CHIP_LPC43XX is not set
-# CONFIG_ARCH_CHIP_NUC1XX is not set
-# CONFIG_ARCH_CHIP_SAMA5 is not set
-# CONFIG_ARCH_CHIP_SAMD is not set
-# CONFIG_ARCH_CHIP_SAML is not set
-# CONFIG_ARCH_CHIP_SAM34 is not set
-# CONFIG_ARCH_CHIP_SAMV7 is not set
-# CONFIG_ARCH_CHIP_STM32 is not set
-# CONFIG_ARCH_CHIP_STR71X is not set
-CONFIG_ARCH_ARM7TDMI=y
-# CONFIG_ARCH_ARM926EJS is not set
-# CONFIG_ARCH_ARM920T is not set
-# CONFIG_ARCH_CORTEXM0 is not set
-# CONFIG_ARCH_CORTEXM3 is not set
-# CONFIG_ARCH_CORTEXM4 is not set
-# CONFIG_ARCH_CORTEXM7 is not set
-# CONFIG_ARCH_CORTEXA5 is not set
-# CONFIG_ARCH_CORTEXA8 is not set
-CONFIG_ARCH_FAMILY="arm"
-CONFIG_ARCH_CHIP="calypso"
-# CONFIG_ARCH_HAVE_FPU is not set
-# CONFIG_ARCH_HAVE_DPFPU is not set
-CONFIG_ARCH_HAVE_LOWVECTORS=y
-# CONFIG_ARCH_LOWVECTORS is not set
-
-#
-# ARM Configuration Options
-#
-CONFIG_ARM_TOOLCHAIN_BUILDROOT=y
-# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set
-# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set
-# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set
-# CONFIG_ARM_OABI_TOOLCHAIN is not set
-CONFIG_UART_IRDA_BAUD=115200
-CONFIG_UART_IRDA_PARITY=0
-CONFIG_UART_IRDA_BITS=8
-CONFIG_UART_IRDA_2STOP=0
-CONFIG_UART_IRDA_RXBUFSIZE=256
-CONFIG_UART_IRDA_TXBUFSIZE=256
-CONFIG_UART_MODEM_BAUD=115200
-CONFIG_UART_MODEM_PARITY=0
-CONFIG_UART_MODEM_BITS=8
-CONFIG_UART_MODEM_2STOP=0
-CONFIG_UART_MODEM_RXBUFSIZE=256
-CONFIG_UART_MODEM_TXBUFSIZE=256
-
-#
-# Calypso Configuration Options
-#
-
-#
-# Modem UART Configuration
-#
-# CONFIG_UART_MODEM_HWFLOWCONTROL is not set
-
-#
-# IrDA UART Configuration
-#
-# CONFIG_UART_IRDA_HWFLOWCONTROL is not set
-# CONFIG_USE_SERCOMM_CONSOLE is not set
-# CONFIG_SERIAL_MODEM_CONSOLE is not set
-# CONFIG_SERIAL_IRDA_CONSOLE is not set
-CONFIG_SERIAL_CONSOLE_NONE=y
+CONFIG_ARCH="sim"
+
+#
+# Simulation Configuration Options
+#
+CONFIG_HOST_X86_64=y
+# CONFIG_HOST_X86 is not set
+# CONFIG_SIM_M32 is not set
+CONFIG_SIM_X8664_SYSTEMV=y
+# CONFIG_SIM_X8664_MICROSOFT is not set
+CONFIG_SIM_WALLTIME=y
+CONFIG_SIM_NET_HOST_ROUTE=y
+# CONFIG_SIM_NET_BRIDGE is not set
+# CONFIG_SIM_FRAMEBUFFER is not set
+# CONFIG_SIM_SPIFLASH is not set
+# CONFIG_SIM_QSPIFLASH is not set
 
 #
 # Architecture Options
@@ -159,13 +117,15 @@ CONFIG_SERIAL_CONSOLE_NONE=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
-CONFIG_ARCH_HAVE_VFORK=y
+CONFIG_ARCH_HAVE_MULTICPU=y
+# CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 CONFIG_ARCH_HAVE_POWEROFF=y
-CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ARCH_HAVE_RESET is not set
+# CONFIG_ARCH_STACKDUMP is not set
 # CONFIG_ENDIAN_BIG is not set
 # CONFIG_ARCH_IDLE_CUSTOM is not set
 # CONFIG_ARCH_HAVE_RAMFUNCS is not set
@@ -174,56 +134,51 @@ CONFIG_ARCH_STACKDUMP=y
 #
 # Board Settings
 #
-CONFIG_BOARD_LOOPSPERMSEC=1250
+CONFIG_BOARD_LOOPSPERMSEC=0
 # CONFIG_ARCH_CALIBRATION is not set
 
 #
 # Interrupt options
 #
-CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
-CONFIG_ARCH_INTERRUPTSTACK=1024
+# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set
 # CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set
 
 #
 # Boot options
 #
-# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMEXTSRAM=y
 # CONFIG_BOOT_RUNFROMFLASH is not set
-CONFIG_BOOT_RUNFROMISRAM=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
 # CONFIG_BOOT_RUNFROMSDRAM is not set
 # CONFIG_BOOT_COPYTORAM is not set
 
 #
 # Boot Memory Configuration
 #
-CONFIG_RAM_START=0
-CONFIG_RAM_SIZE=8650752
+CONFIG_RAM_START=0x0
+CONFIG_RAM_SIZE=0
 # CONFIG_ARCH_HAVE_SDRAM is not set
 
 #
 # Board Selection
 #
-# CONFIG_ARCH_BOARD_COMPALE86 is not set
-# CONFIG_ARCH_BOARD_COMPALE88 is not set
-CONFIG_ARCH_BOARD_COMPALE99=y
-# CONFIG_ARCH_BOARD_PIRELLI_DPL10 is not set
+CONFIG_ARCH_BOARD_SIM=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
-CONFIG_ARCH_BOARD="compal_e99"
+CONFIG_ARCH_BOARD="sim"
 
 #
 # Common Board Options
 #
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
-CONFIG_COMPALE99_LCD_SSD1783=y
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 CONFIG_BOARDCTL_POWEROFF=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_APP_SYMTAB is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -234,22 +189,25 @@ CONFIG_DISABLE_OS_API=y
 # CONFIG_DISABLE_POSIX_TIMERS is not set
 # CONFIG_DISABLE_PTHREAD is not set
 # CONFIG_DISABLE_SIGNALS is not set
-CONFIG_DISABLE_MQUEUE=y
+# CONFIG_DISABLE_MQUEUE is not set
 # CONFIG_DISABLE_ENVIRON is not set
 
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
-CONFIG_START_YEAR=2007
-CONFIG_START_MONTH=2
-CONFIG_START_DAY=13
+CONFIG_START_YEAR=2008
+CONFIG_START_MONTH=6
+CONFIG_START_DAY=1
 CONFIG_MAX_WDOGPARMS=4
-CONFIG_PREALLOC_WDOGS=8
-CONFIG_WDOG_INTRESERVE=1
+CONFIG_PREALLOC_WDOGS=32
+CONFIG_WDOG_INTRESERVE=4
 CONFIG_PREALLOC_TIMERS=8
 
 #
@@ -259,11 +217,13 @@ CONFIG_PREALLOC_TIMERS=8
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
-CONFIG_RR_INTERVAL=200
-CONFIG_TASK_NAME_SIZE=0
-CONFIG_MAX_TASKS=16
-# CONFIG_SCHED_HAVE_PARENT is not set
-# CONFIG_SCHED_WAITPID is not set
+CONFIG_RR_INTERVAL=0
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=31
+CONFIG_MAX_TASKS=64
+CONFIG_SCHED_HAVE_PARENT=y
+# CONFIG_SCHED_CHILD_STATUS is not set
+CONFIG_SCHED_WAITPID=y
 
 #
 # Pthread Options
@@ -284,8 +244,8 @@ CONFIG_DEV_CONSOLE=y
 # CONFIG_FDCLONE_DISABLE is not set
 # CONFIG_FDCLONE_STDIO is not set
 CONFIG_SDCLONE_DISABLE=y
-CONFIG_NFILE_DESCRIPTORS=8
-CONFIG_NFILE_STREAMS=8
+CONFIG_NFILE_DESCRIPTORS=32
+CONFIG_NFILE_STREAMS=16
 CONFIG_NAME_MAX=32
 # CONFIG_PRIORITY_INHERITANCE is not set
 
@@ -295,7 +255,8 @@ CONFIG_NAME_MAX=32
 # CONFIG_BOARD_INITIALIZE is not set
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
-# CONFIG_SCHED_ONEXIT is not set
+CONFIG_SCHED_ONEXIT=y
+CONFIG_SCHED_ONEXIT_MAX=1
 
 #
 # Signal Numbers
@@ -303,10 +264,18 @@ CONFIG_NAME_MAX=32
 CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCHLD=4
 CONFIG_SIG_SIGCONDTIMEDOUT=16
 
 #
-# Work Queue Support
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=32
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -318,7 +287,7 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 CONFIG_IDLETHREAD_STACKSIZE=4096
 CONFIG_USERMAIN_STACKSIZE=4096
 CONFIG_PTHREAD_STACK_MIN=256
-CONFIG_PTHREAD_STACK_DEFAULT=4096
+CONFIG_PTHREAD_STACK_DEFAULT=8192
 # CONFIG_LIB_SYSCALL is not set
 
 #
@@ -326,8 +295,9 @@ CONFIG_PTHREAD_STACK_DEFAULT=4096
 #
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
-# CONFIG_DEV_ZERO is not set
-# CONFIG_DEV_LOOP is not set
+CONFIG_DEV_ZERO=y
+# CONFIG_DEV_URANDOM is not set
+CONFIG_DEV_LOOP=y
 
 #
 # Buffering
@@ -337,14 +307,11 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
-CONFIG_SPI=y
-CONFIG_SPI_EXCHANGE=y
-# CONFIG_SPI_CMDDATA is not set
-# CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI is not set
 # CONFIG_I2S is not set
 
 #
@@ -358,52 +325,37 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
-CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# IO Expander/GPIO Support
 #
-# CONFIG_LCD_CONSOLE is not set
-# CONFIG_LCD_NOGETRUN is not set
-CONFIG_LCD_MAXCONTRAST=63
-CONFIG_LCD_MAXPOWER=1
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
 
 #
-# Graphic LCD Devices
+# LCD Driver Support
 #
-# CONFIG_LCD_P14201 is not set
-# CONFIG_LCD_NOKIA6100 is not set
-# CONFIG_LCD_MIO283QT2 is not set
-# CONFIG_LCD_MIO283QT9A is not set
-# CONFIG_LCD_UG9664HSWAG01 is not set
-# CONFIG_LCD_UG2864HSWEG01 is not set
-# CONFIG_LCD_UG2832HSWEG04 is not set
-# CONFIG_LCD_ST7565 is not set
-# CONFIG_LCD_ST7567 is not set
-# CONFIG_LCD_UG2864AMBAG01 is not set
-# CONFIG_LCD_SSD1289 is not set
-# CONFIG_LCD_SHARP_MEMLCD is not set
-CONFIG_LCD_LANDSCAPE=y
-# CONFIG_LCD_PORTRAIT is not set
-# CONFIG_LCD_RPORTRAIT is not set
-# CONFIG_LCD_RLANDSCAPE is not set
-# CONFIG_LCD_ILI9341 is not set
-# CONFIG_LCD_RA8875 is not set
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
-# Alphanumeric/Segment LCD Devices
+# LED Support
 #
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -426,31 +378,32 @@ CONFIG_SERIAL=y
 # CONFIG_USART6_SERIALDRIVER is not set
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
-CONFIG_OTHER_UART_SERIALDRIVER=y
-
-#
-# USART Configuration
-#
-CONFIG_MCU_SERIAL=y
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+# CONFIG_MCU_SERIAL is not set
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
-CONFIG_OTHER_SERIAL_CONSOLE=y
-# CONFIG_NO_SERIAL_CONSOLE is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -474,38 +427,47 @@ CONFIG_OTHER_SERIAL_CONSOLE=y
 # CONFIG_DISABLE_MOUNTPOINT is not set
 # CONFIG_FS_AUTOMOUNTER is not set
 # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
-# CONFIG_FS_READABLE is not set
-# CONFIG_FS_WRITABLE is not set
+CONFIG_FS_READABLE=y
+CONFIG_FS_WRITABLE=y
 # CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
-# CONFIG_FS_FAT is not set
+CONFIG_FS_FAT=y
+CONFIG_FAT_LCNAMES=y
+CONFIG_FAT_LFN=y
+CONFIG_FAT_MAXFNAME=32
+# CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
+# CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
-# CONFIG_FS_ROMFS is not set
+CONFIG_FS_ROMFS=y
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
-# CONFIG_FS_PROCFS is not set
-# CONFIG_FS_UNIONFS is not set
+CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
 
 #
-# System Logging
+# Exclude individual procfs entries
 #
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_UNIONFS is not set
+# CONFIG_FS_HOSTFS is not set
 
 #
 # Graphics Support
 #
 # CONFIG_NX is not set
-CONFIG_NX_LCDDRIVER=y
 
 #
 # Memory Management
 #
 # CONFIG_MM_SMALL is not set
-CONFIG_MM_REGIONS=2
-CONFIG_ARCH_HAVE_HEAP2=y
-CONFIG_HEAP2_BASE=0x01000000
-CONFIG_HEAP2_SIZE=2097152
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
 # CONFIG_GRAN is not set
 
 #
@@ -513,11 +475,16 @@ CONFIG_HEAP2_SIZE=2097152
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
 # CONFIG_BINFMT_DISABLE is not set
-# CONFIG_BINFMT_EXEPATH is not set
+CONFIG_BINFMT_EXEPATH=y
+CONFIG_PATH_INITIAL="/bin"
 # CONFIG_NXFLAT is not set
 # CONFIG_ELF is not set
 CONFIG_BUILTIN=y
@@ -535,9 +502,9 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
-# CONFIG_LIBM is not set
+CONFIG_LIBM=y
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
-# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_FLOATINGPOINT=y
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
 CONFIG_LIB_RAND_ORDER=1
@@ -545,23 +512,33 @@ CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_LF is not set
 # CONFIG_EOL_IS_BOTH_CRLF is not set
 CONFIG_EOL_IS_EITHER_CRLF=y
-# CONFIG_LIBC_EXECFUNCS is not set
-CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_LIBC_EXECFUNCS=y
+CONFIG_EXECFUNCS_HAVE_SYMTAB=y
+CONFIG_EXECFUNCS_SYMTAB="g_symtab"
+CONFIG_EXECFUNCS_NSYMBOLS=0
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=2048
 CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
 CONFIG_ARCH_LOWPUTC=y
 # CONFIG_LIBC_LOCALTIME is not set
-# CONFIG_TIME_EXTENDED is not set
+CONFIG_TIME_EXTENDED=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -578,23 +555,28 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 CONFIG_EXAMPLES_HELLO=y
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
+CONFIG_EXAMPLES_HELLO_PRIORITY=100
+CONFIG_EXAMPLES_HELLO_STACKSIZE=8192
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -602,33 +584,55 @@ CONFIG_EXAMPLES_HELLO=y
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+CONFIG_FSUTILS_PASSWD=y
+CONFIG_FSUTILS_PASSWD_PATH="/etc/passwd"
+CONFIG_FSUTILS_PASSWD_READONLY=y
+CONFIG_FSUTILS_PASSWD_IOBUFFER_SIZE=512
+CONFIG_FSUTILS_PASSWD_KEY1=0x12345678
+CONFIG_FSUTILS_PASSWD_KEY2=0x9abcdef0
+CONFIG_FSUTILS_PASSWD_KEY3=0x12345678
+CONFIG_FSUTILS_PASSWD_KEY4=0x9abcdef0
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -639,38 +643,42 @@ CONFIG_EXAMPLES_NSH=y
 #
 # Interpreters
 #
+# CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+CONFIG_INTERPRETERS_MINIBASIC=y
+CONFIG_INTERPRETER_MINIBASIC_PRIORITY=100
+CONFIG_INTERPRETER_MINIBASIC_STACKSIZE=4096
+CONFIG_INTERPRETER_MINIBASIC_IOBUFSIZE=1024
+CONFIG_INTERPRETER_MINIBASIC_TESTSCRIPT=y
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
 #
 CONFIG_NSH_READLINE=y
 # CONFIG_NSH_CLE is not set
-CONFIG_NSH_LINELEN=64
+CONFIG_NSH_LINELEN=80
 # CONFIG_NSH_DISABLE_SEMICOLON is not set
 CONFIG_NSH_CMDPARMS=y
 CONFIG_NSH_MAXARGUMENTS=6
@@ -678,19 +686,22 @@ CONFIG_NSH_ARGCAT=y
 CONFIG_NSH_NESTDEPTH=3
 # CONFIG_NSH_DISABLEBG is not set
 CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILE_APPS=y
 
 #
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
 # CONFIG_NSH_DISABLE_CMP is not set
-CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DATE is not set
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -699,17 +710,20 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_IFUPDOWN is not set
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
+# CONFIG_NSH_DISABLE_MKFATFS is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+# CONFIG_NSH_DISABLE_POWEROFF is not set
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -717,20 +731,25 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_RMDIR is not set
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
+CONFIG_NSH_DISABLE_SHUTDOWN=y
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
-CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DF_H is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
-CONFIG_NSH_CMDOPT_HEXDUMP=y
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
 CONFIG_NSH_FILEIOSIZE=1024
 
 #
@@ -739,13 +758,28 @@ CONFIG_NSH_FILEIOSIZE=1024
 # CONFIG_NSH_DISABLESCRIPT is not set
 # CONFIG_NSH_DISABLE_ITEF is not set
 # CONFIG_NSH_DISABLE_LOOPS is not set
+CONFIG_NSH_ROMFSETC=y
+# CONFIG_NSH_ROMFSRC is not set
+CONFIG_NSH_ROMFSMOUNTPT="/etc"
+CONFIG_NSH_INITSCRIPT="init.d/rcS"
+CONFIG_NSH_ROMFSDEVNO=1
+CONFIG_NSH_ROMFSSECTSIZE=64
+# CONFIG_NSH_DEFAULTROMFS is not set
+CONFIG_NSH_ARCHROMFS=y
+# CONFIG_NSH_CUSTOMROMFS is not set
+CONFIG_NSH_FATDEVNO=2
+CONFIG_NSH_FATSECTSIZE=512
+CONFIG_NSH_FATNSECTORS=1024
+CONFIG_NSH_FATMOUNTPT="/tmp"
 
 #
 # Console Configuration
 #
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
-# CONFIG_NSH_ARCHINIT is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -759,15 +793,22 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_READLINE_MAX_BUILTINS=64
+CONFIG_READLINE_MAX_EXTCMDS=64
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYMTAB is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/rgmp/x86/nsh/setenv.sh b/configs/sim/minibasic/setenv.sh
old mode 100755
new mode 100644
similarity index 88%
rename from configs/rgmp/x86/nsh/setenv.sh
rename to configs/sim/minibasic/setenv.sh
index b2180473be88bd929e3b09fd39ed6b7574196298..bc88903e6385460a9c157be5d26c84073385f1ca
--- a/configs/rgmp/x86/nsh/setenv.sh
+++ b/configs/sim/minibasic/setenv.sh
@@ -1,10 +1,8 @@
 #!/bin/bash
-# config/rgmp/nsh/setenv.sh
+# sim/minibasic/setenv.sh
 #
-#   Copyright (C) 2011 Yu Qiang. All rights reserved.
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
-#   Authors: Yu Qiang 
-#            Gregory Nutt 
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions
diff --git a/configs/sim/mount/Make.defs b/configs/sim/mount/Make.defs
index 59561182693e3776535d7f9c8a96f521a1297517..9c2a28013318459c31c2e11d694f0e5315af04a1 100644
--- a/configs/sim/mount/Make.defs
+++ b/configs/sim/mount/Make.defs
@@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCPUFLAGS		= -fno-builtin
-ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fno-rtti
+ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHPICFLAGS		= -fpic
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/sim/mount/defconfig b/configs/sim/mount/defconfig
index e95d92e04a51b34b702d2381021ed49522bb7fc0..4bbbb89a355485347502da882b1375c703888f62 100644
--- a/configs/sim/mount/defconfig
+++ b/configs/sim/mount/defconfig
@@ -37,36 +37,15 @@ CONFIG_BUILD_FLAT=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-CONFIG_DEBUG_VERBOSE=y
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_AUDIO is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 # CONFIG_DEBUG_NOOPT is not set
@@ -79,8 +58,7 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -96,6 +74,8 @@ CONFIG_HOST_X86_64=y
 CONFIG_SIM_X8664_SYSTEMV=y
 # CONFIG_SIM_X8664_MICROSOFT is not set
 # CONFIG_SIM_WALLTIME is not set
+CONFIG_SIM_NET_HOST_ROUTE=y
+# CONFIG_SIM_NET_BRIDGE is not set
 # CONFIG_SIM_FRAMEBUFFER is not set
 # CONFIG_SIM_SPIFLASH is not set
 
@@ -110,6 +90,7 @@ CONFIG_SIM_X8664_SYSTEMV=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+CONFIG_ARCH_HAVE_MULTICPU=y
 # CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -165,6 +146,7 @@ CONFIG_ARCH_BOARD="sim"
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -253,9 +235,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=32
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -304,17 +287,37 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -338,10 +341,6 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 # CONFIG_MCU_SERIAL is not set
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -350,17 +349,22 @@ CONFIG_SERIAL=y
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -393,7 +397,9 @@ CONFIG_FS_FAT=y
 # CONFIG_FAT_LCNAMES is not set
 # CONFIG_FAT_LFN is not set
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
 # CONFIG_FS_TMPFS is not set
@@ -402,12 +408,6 @@ CONFIG_FS_FAT=y
 # CONFIG_FS_UNIONFS is not set
 # CONFIG_FS_HOSTFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -426,6 +426,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -470,15 +474,18 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -497,6 +504,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -505,10 +513,10 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -519,37 +527,44 @@ CONFIG_EXAMPLES_MOUNT_DEVNAME="/dev/ram0"
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -562,8 +577,8 @@ CONFIG_EXAMPLES_MOUNT_DEVNAME="/dev/ram0"
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -574,6 +589,7 @@ CONFIG_EXAMPLES_MOUNT_DEVNAME="/dev/ram0"
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -595,16 +611,16 @@ CONFIG_EXAMPLES_MOUNT_DEVNAME="/dev/ram0"
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sim/mtdpart/Make.defs b/configs/sim/mtdpart/Make.defs
index c5dd5f30d3802dcf6f0eac8607c20feda206116e..ab88231abdeffd23488cfdbd1f695f0877eac251 100644
--- a/configs/sim/mtdpart/Make.defs
+++ b/configs/sim/mtdpart/Make.defs
@@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCPUFLAGS		= -fno-builtin
-ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fno-rtti
+ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHPICFLAGS		= -fpic
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/sim/mtdpart/defconfig b/configs/sim/mtdpart/defconfig
index ac90d3010b64bb6f36922bac0744b19a00414cba..5277679f1e801a1d5da1240587b21d2a448b3c31 100644
--- a/configs/sim/mtdpart/defconfig
+++ b/configs/sim/mtdpart/defconfig
@@ -37,36 +37,15 @@ CONFIG_BUILD_FLAT=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_AUDIO is not set
-# CONFIG_DEBUG_BINFMT is not set
-CONFIG_DEBUG_FS=y
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 CONFIG_DEBUG_SYMBOLS=y
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 CONFIG_DEBUG_NOOPT=y
@@ -79,8 +58,7 @@ CONFIG_DEBUG_NOOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -96,6 +74,8 @@ CONFIG_SIM_M32=y
 CONFIG_SIM_X8664_SYSTEMV=y
 # CONFIG_SIM_X8664_MICROSOFT is not set
 # CONFIG_SIM_WALLTIME is not set
+CONFIG_SIM_NET_HOST_ROUTE=y
+# CONFIG_SIM_NET_BRIDGE is not set
 # CONFIG_SIM_FRAMEBUFFER is not set
 # CONFIG_SIM_SPIFLASH is not set
 
@@ -110,6 +90,7 @@ CONFIG_SIM_X8664_SYSTEMV=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+CONFIG_ARCH_HAVE_MULTICPU=y
 # CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -165,6 +146,7 @@ CONFIG_ARCH_BOARD="sim"
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -233,9 +215,10 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 
 #
@@ -281,8 +264,27 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 CONFIG_MTD=y
 
 #
@@ -307,12 +309,15 @@ CONFIG_RAMMTD_FLASHSIM=y
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
 # CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -320,9 +325,10 @@ CONFIG_RAMMTD_FLASHSIM=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -346,10 +352,6 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 # CONFIG_MCU_SERIAL is not set
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -358,17 +360,22 @@ CONFIG_SERIAL=y
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -400,7 +407,9 @@ CONFIG_FS_FAT=y
 # CONFIG_FAT_LCNAMES is not set
 # CONFIG_FAT_LFN is not set
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
 # CONFIG_FS_TMPFS is not set
@@ -409,12 +418,6 @@ CONFIG_FS_FAT=y
 # CONFIG_FS_UNIONFS is not set
 # CONFIG_FS_HOSTFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -433,6 +436,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -477,15 +484,18 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -504,6 +514,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -512,10 +523,10 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -528,37 +539,45 @@ CONFIG_EXAMPLES_MTDPART_NPARTITIONS=3
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -571,8 +590,8 @@ CONFIG_EXAMPLES_MTDPART_NPARTITIONS=3
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -583,6 +602,7 @@ CONFIG_EXAMPLES_MTDPART_NPARTITIONS=3
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -604,16 +624,16 @@ CONFIG_EXAMPLES_MTDPART_NPARTITIONS=3
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sim/mtdrwb/Make.defs b/configs/sim/mtdrwb/Make.defs
index f06e62656c0bb153fcf80539f71955d7509b8be3..e3830bd4aa8b3aec5c5b73a3a74b9b0fe23d6db4 100644
--- a/configs/sim/mtdrwb/Make.defs
+++ b/configs/sim/mtdrwb/Make.defs
@@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCPUFLAGS		= -fno-builtin
-ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fno-rtti
+ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHPICFLAGS		= -fpic
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/sim/mtdrwb/defconfig b/configs/sim/mtdrwb/defconfig
index 18f38462f0715727f6fb4ef3383c7442e6e0923b..42e14e05ab079b9bc562250c06ffe93beee739a8 100644
--- a/configs/sim/mtdrwb/defconfig
+++ b/configs/sim/mtdrwb/defconfig
@@ -37,36 +37,15 @@ CONFIG_BUILD_FLAT=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_AUDIO is not set
-# CONFIG_DEBUG_BINFMT is not set
-CONFIG_DEBUG_FS=y
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 CONFIG_DEBUG_SYMBOLS=y
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 CONFIG_DEBUG_NOOPT=y
@@ -79,8 +58,7 @@ CONFIG_DEBUG_NOOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -96,6 +74,8 @@ CONFIG_SIM_M32=y
 CONFIG_SIM_X8664_SYSTEMV=y
 # CONFIG_SIM_X8664_MICROSOFT is not set
 # CONFIG_SIM_WALLTIME is not set
+CONFIG_SIM_NET_HOST_ROUTE=y
+# CONFIG_SIM_NET_BRIDGE is not set
 # CONFIG_SIM_FRAMEBUFFER is not set
 # CONFIG_SIM_SPIFLASH is not set
 
@@ -110,6 +90,7 @@ CONFIG_SIM_X8664_SYSTEMV=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+CONFIG_ARCH_HAVE_MULTICPU=y
 # CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -165,6 +146,7 @@ CONFIG_ARCH_BOARD="sim"
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -239,6 +221,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -248,9 +231,10 @@ CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
 CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -306,8 +290,27 @@ CONFIG_DRVR_INVALIDATE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 CONFIG_MTD=y
 
 #
@@ -338,12 +341,15 @@ CONFIG_RAMMTD_FLASHSIM=y
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
 # CONFIG_MTD_S25FL1 is not set
+# CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -351,9 +357,10 @@ CONFIG_RAMMTD_FLASHSIM=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -377,10 +384,6 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 # CONFIG_MCU_SERIAL is not set
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -389,17 +392,22 @@ CONFIG_SERIAL=y
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -431,7 +439,9 @@ CONFIG_FS_FAT=y
 # CONFIG_FAT_LCNAMES is not set
 # CONFIG_FAT_LFN is not set
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
 # CONFIG_FS_TMPFS is not set
@@ -440,12 +450,6 @@ CONFIG_FS_FAT=y
 # CONFIG_FS_UNIONFS is not set
 # CONFIG_FS_HOSTFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -464,6 +468,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -508,15 +516,18 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -535,6 +546,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -543,10 +555,10 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -560,37 +572,45 @@ CONFIG_EXAMPLES_MTDRWB_NEBLOCKS=32
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -603,8 +623,8 @@ CONFIG_EXAMPLES_MTDRWB_NEBLOCKS=32
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -615,6 +635,7 @@ CONFIG_EXAMPLES_MTDRWB_NEBLOCKS=32
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -636,16 +657,16 @@ CONFIG_EXAMPLES_MTDRWB_NEBLOCKS=32
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sim/nettest/Make.defs b/configs/sim/nettest/Make.defs
index 8632791cacfc9bb8e9644f50340bdfc5b0f69751..2dfff9a0998bc0efa993f55dcaa08e99062e4e31 100644
--- a/configs/sim/nettest/Make.defs
+++ b/configs/sim/nettest/Make.defs
@@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCPUFLAGS		= -fno-builtin
-ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fno-rtti
+ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHPICFLAGS		= -fpic
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/sim/nettest/defconfig b/configs/sim/nettest/defconfig
index d5a3b82651922d054d4b937238daf9f0da82c507..585b3023c757c39c431d4b15c80334bb4a36e6fd 100644
--- a/configs/sim/nettest/defconfig
+++ b/configs/sim/nettest/defconfig
@@ -42,9 +42,10 @@ CONFIG_BUILD_FLAT=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 # CONFIG_DEBUG_NOOPT is not set
@@ -57,10 +58,12 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="sim"
@@ -78,6 +81,7 @@ CONFIG_SIM_NET_HOST_ROUTE=y
 # CONFIG_SIM_NET_BRIDGE is not set
 # CONFIG_SIM_FRAMEBUFFER is not set
 # CONFIG_SIM_SPIFLASH is not set
+# CONFIG_SIM_QSPIFLASH is not set
 
 #
 # Architecture Options
@@ -146,6 +150,7 @@ CONFIG_ARCH_BOARD="sim"
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -166,6 +171,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2008
 CONFIG_START_MONTH=8
@@ -178,6 +184,7 @@ CONFIG_PREALLOC_TIMERS=8
 #
 # Tasks and Scheduling
 #
+# CONFIG_SMP is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -258,6 +265,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=8192
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -273,12 +281,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -286,14 +298,25 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -304,9 +327,10 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -330,29 +354,32 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 # CONFIG_MCU_SERIAL is not set
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -360,13 +387,11 @@ CONFIG_SERIAL=y
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -499,12 +524,6 @@ CONFIG_FS_FAT=y
 # CONFIG_FS_UNIONFS is not set
 # CONFIG_FS_HOSTFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -554,6 +573,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -571,7 +592,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -580,8 +600,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -600,19 +622,19 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -635,20 +657,18 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0xc0a8006a
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -660,9 +680,9 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0xc0a8006a
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
@@ -687,8 +707,9 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0xc0a8006a
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -699,11 +720,12 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0xc0a8006a
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
@@ -725,16 +747,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sim/nsh/Make.defs b/configs/sim/nsh/Make.defs
index 78ac4ec40167d3c02fee9d44073d2c4e8a2aed9f..1103d89dcd4d5205eb0f930c76b0c365d80e557c 100644
--- a/configs/sim/nsh/Make.defs
+++ b/configs/sim/nsh/Make.defs
@@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCPUFLAGS		= -fno-builtin
-ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fno-rtti
+ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHPICFLAGS		= -fpic
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/sim/nsh/defconfig b/configs/sim/nsh/defconfig
index d486dc1b47123083118d8c8295464b3ce0b47e20..22869f29d2ec85c638bd50aac7db27e09c446653 100644
--- a/configs/sim/nsh/defconfig
+++ b/configs/sim/nsh/defconfig
@@ -16,7 +16,7 @@ CONFIG_HOST_LINUX=y
 #
 # Build Configuration
 #
-# CONFIG_APPS_DIR="../apps"
+# CONFIG_APPS_DIR="y"
 CONFIG_BUILD_FLAT=y
 # CONFIG_BUILD_2PASS is not set
 
@@ -42,9 +42,10 @@ CONFIG_BUILD_FLAT=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 CONFIG_DEBUG_SYMBOLS=y
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 CONFIG_DEBUG_NOOPT=y
@@ -57,10 +58,12 @@ CONFIG_DEBUG_NOOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="sim"
@@ -74,8 +77,11 @@ CONFIG_HOST_X86_64=y
 CONFIG_SIM_X8664_SYSTEMV=y
 # CONFIG_SIM_X8664_MICROSOFT is not set
 CONFIG_SIM_WALLTIME=y
+CONFIG_SIM_NET_HOST_ROUTE=y
+# CONFIG_SIM_NET_BRIDGE is not set
 # CONFIG_SIM_FRAMEBUFFER is not set
 # CONFIG_SIM_SPIFLASH is not set
+# CONFIG_SIM_QSPIFLASH is not set
 
 #
 # Architecture Options
@@ -88,6 +94,7 @@ CONFIG_SIM_WALLTIME=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+CONFIG_ARCH_HAVE_MULTICPU=y
 # CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -139,18 +146,16 @@ CONFIG_ARCH_BOARD="sim"
 #
 # Common Board Options
 #
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 CONFIG_BOARDCTL_POWEROFF=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_APP_SYMTAB is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -172,6 +177,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2008
 CONFIG_START_MONTH=6
@@ -184,6 +190,7 @@ CONFIG_PREALLOC_TIMERS=8
 #
 # Tasks and Scheduling
 #
+# CONFIG_SMP is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -267,6 +274,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=8192
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 CONFIG_DEV_ZERO=y
+# CONFIG_DEV_URANDOM is not set
 CONFIG_DEV_LOOP=y
 
 #
@@ -282,12 +290,16 @@ CONFIG_DEV_LOOP=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -295,13 +307,25 @@ CONFIG_DEV_LOOP=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
+# CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -310,9 +334,10 @@ CONFIG_DEV_LOOP=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -336,29 +361,32 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 # CONFIG_MCU_SERIAL is not set
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -392,7 +420,9 @@ CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 CONFIG_FS_ROMFS=y
 # CONFIG_FS_TMPFS is not set
@@ -410,12 +440,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_UNIONFS is not set
 # CONFIG_FS_HOSTFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -434,6 +458,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -462,6 +490,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -482,15 +512,18 @@ CONFIG_ARCH_LOWPUTC=y
 CONFIG_TIME_EXTENDED=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -514,9 +547,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
@@ -525,10 +558,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_HELLO=y
 CONFIG_EXAMPLES_HELLO_PRIORITY=100
 CONFIG_EXAMPLES_HELLO_STACKSIZE=8192
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -537,36 +570,37 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=8192
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -581,6 +615,11 @@ CONFIG_FSUTILS_PASSWD_KEY2=0x9abcdef0
 CONFIG_FSUTILS_PASSWD_KEY3=0x12345678
 CONFIG_FSUTILS_PASSWD_KEY4=0x9abcdef0
 
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -592,8 +631,9 @@ CONFIG_FSUTILS_PASSWD_KEY4=0x9abcdef0
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -604,6 +644,7 @@ CONFIG_FSUTILS_PASSWD_KEY4=0x9abcdef0
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -661,13 +702,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_POWEROFF is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -685,6 +726,7 @@ CONFIG_NSH_DISABLE_SHUTDOWN=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -741,12 +783,12 @@ CONFIG_NSH_LOGIN_FAILCOUNT=3
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -756,7 +798,9 @@ CONFIG_READLINE_MAX_BUILTINS=64
 CONFIG_READLINE_MAX_EXTCMDS=64
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_SYMTAB is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sim/nsh2/Make.defs b/configs/sim/nsh2/Make.defs
index 9f3da86f0b817afc0a2cf1157ce0071f3e439bfb..aef35af6c3e83db0d9d1e009cfa53e3537294af0 100644
--- a/configs/sim/nsh2/Make.defs
+++ b/configs/sim/nsh2/Make.defs
@@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCPUFLAGS		= -fno-builtin
-ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fno-rtti
+ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHPICFLAGS		= -fpic
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/sim/nsh2/defconfig b/configs/sim/nsh2/defconfig
index 4ff288e4844be7d777c30b01d557600ce9a35ce9..fd57c96af83f41603e627424947b44d48697d31a 100644
--- a/configs/sim/nsh2/defconfig
+++ b/configs/sim/nsh2/defconfig
@@ -37,13 +37,15 @@ CONFIG_BUILD_FLAT=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 CONFIG_DEBUG_SYMBOLS=y
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 CONFIG_DEBUG_NOOPT=y
@@ -56,10 +58,12 @@ CONFIG_DEBUG_NOOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="sim"
@@ -73,6 +77,8 @@ CONFIG_HOST_X86_64=y
 CONFIG_SIM_X8664_SYSTEMV=y
 # CONFIG_SIM_X8664_MICROSOFT is not set
 # CONFIG_SIM_WALLTIME is not set
+CONFIG_SIM_NET_HOST_ROUTE=y
+# CONFIG_SIM_NET_BRIDGE is not set
 CONFIG_SIM_FRAMEBUFFER=y
 CONFIG_SIM_X11FB=y
 # CONFIG_SIM_X11NOSHM is not set
@@ -84,6 +90,7 @@ CONFIG_SIM_TOUCHSCREEN=y
 # CONFIG_SIM_NOINPUT is not set
 # CONFIG_SIM_TCNWAITERS is not set
 # CONFIG_SIM_SPIFLASH is not set
+# CONFIG_SIM_QSPIFLASH is not set
 
 #
 # Architecture Options
@@ -96,6 +103,7 @@ CONFIG_SIM_TOUCHSCREEN=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+CONFIG_ARCH_HAVE_MULTICPU=y
 # CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -147,18 +155,16 @@ CONFIG_ARCH_BOARD="sim"
 #
 # Common Board Options
 #
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
 CONFIG_EXAMPLES_TOUCHSCREEN_BGCOLOR=0x007b68ee
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_POWEROFF is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_TSCTEST=y
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -180,6 +186,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=10
@@ -192,6 +199,7 @@ CONFIG_PREALLOC_TIMERS=8
 #
 # Tasks and Scheduling
 #
+# CONFIG_SMP is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -242,9 +250,10 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -265,6 +274,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=8192
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -280,12 +290,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -302,17 +316,37 @@ CONFIG_INPUT=y
 # CONFIG_BUTTONS is not set
 # CONFIG_DJOYSTICK is not set
 # CONFIG_AJOYSTICK is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -336,29 +370,32 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 # CONFIG_MCU_SERIAL is not set
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -391,13 +428,16 @@ CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 CONFIG_FS_ROMFS=y
 # CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
 CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
 
 #
 # Exclude individual procfs entries
@@ -408,12 +448,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_UNIONFS is not set
 # CONFIG_FS_HOSTFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -422,6 +456,7 @@ CONFIG_NX_NPLANES=1
 CONFIG_NX_BGCOLOR=0x0
 # CONFIG_NX_ANTIALIASING is not set
 # CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -517,6 +552,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -544,6 +583,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -561,15 +602,18 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -600,8 +644,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -610,10 +655,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -630,7 +675,6 @@ CONFIG_EXAMPLES_NX_BPP=32
 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set
 CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 # CONFIG_EXAMPLES_NX_EXTERNINIT is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 CONFIG_EXAMPLES_NXHELLO=y
 CONFIG_EXAMPLES_NXHELLO_VPLANE=0
@@ -657,21 +701,23 @@ CONFIG_EXAMPLES_NXLINES_LINEWIDTH=16
 CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=4
 CONFIG_EXAMPLES_NXLINES_BPP=32
 # CONFIG_EXAMPLES_NXLINES_EXTERNINIT is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_THTTPD is not set
@@ -681,15 +727,22 @@ CONFIG_EXAMPLES_TOUCHSCREEN_MINOR=0
 CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/input0"
 # CONFIG_EXAMPLES_TOUCHSCREEN_MOUSE is not set
 CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -702,8 +755,9 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -714,6 +768,7 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -722,6 +777,7 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -767,12 +823,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -781,6 +837,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -788,6 +845,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -824,6 +882,8 @@ CONFIG_NSH_FATMOUNTPT="/tmp"
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -838,13 +898,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -852,5 +911,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sim/nx/Make.defs b/configs/sim/nx/Make.defs
index bb509e3b1534a649bd9741fc8e008708a045845a..31ebb6364dd9b1813a6588b90c104273df1b06a3 100644
--- a/configs/sim/nx/Make.defs
+++ b/configs/sim/nx/Make.defs
@@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCPUFLAGS		= -fno-builtin
-ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fno-rtti
+ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHPICFLAGS		= -fpic
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/sim/nx/defconfig b/configs/sim/nx/defconfig
index 14c4f1510567bd3364c9bf0bef830802a1ec6dd0..ee688058703db3c0197820b3ddb44baa91023bb2 100644
--- a/configs/sim/nx/defconfig
+++ b/configs/sim/nx/defconfig
@@ -37,36 +37,15 @@ CONFIG_BUILD_FLAT=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-CONFIG_DEBUG_VERBOSE=y
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_AUDIO is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-CONFIG_DEBUG_GRAPHICS=y
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 # CONFIG_DEBUG_NOOPT is not set
@@ -79,10 +58,12 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="sim"
@@ -96,12 +77,15 @@ CONFIG_HOST_X86_64=y
 CONFIG_SIM_X8664_SYSTEMV=y
 # CONFIG_SIM_X8664_MICROSOFT is not set
 # CONFIG_SIM_WALLTIME is not set
+CONFIG_SIM_NET_HOST_ROUTE=y
+# CONFIG_SIM_NET_BRIDGE is not set
 CONFIG_SIM_FRAMEBUFFER=y
 # CONFIG_SIM_X11FB is not set
 CONFIG_SIM_FBHEIGHT=240
 CONFIG_SIM_FBWIDTH=480
 CONFIG_SIM_FBBPP=8
 # CONFIG_SIM_SPIFLASH is not set
+# CONFIG_SIM_QSPIFLASH is not set
 
 #
 # Architecture Options
@@ -114,6 +98,7 @@ CONFIG_SIM_FBBPP=8
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+CONFIG_ARCH_HAVE_MULTICPU=y
 # CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -169,6 +154,7 @@ CONFIG_ARCH_BOARD="sim"
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -189,6 +175,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2008
 CONFIG_START_MONTH=11
@@ -201,6 +188,7 @@ CONFIG_PREALLOC_TIMERS=8
 #
 # Tasks and Scheduling
 #
+# CONFIG_SMP is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -257,9 +245,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=32
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -280,6 +269,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=8192
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -295,12 +285,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -308,17 +302,37 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -342,29 +356,32 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 # CONFIG_MCU_SERIAL is not set
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -395,12 +412,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -408,6 +419,7 @@ CONFIG_NX=y
 CONFIG_NX_NPLANES=1
 CONFIG_NX_BGCOLOR=0x0
 # CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -503,6 +515,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -528,6 +544,8 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -542,14 +560,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -568,17 +589,18 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -594,37 +616,42 @@ CONFIG_EXAMPLES_NX_DEFAULT_FONT=y
 CONFIG_EXAMPLES_NX_BPP=8
 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set
 CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -636,8 +663,9 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -648,6 +676,7 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -669,16 +698,17 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sim/nx11/Make.defs b/configs/sim/nx11/Make.defs
index dc93fc14ced51645a53c8dae8d99aaf60e05c40a..2d65818eecd3b1ef968ebe01b8913ba51523369f 100644
--- a/configs/sim/nx11/Make.defs
+++ b/configs/sim/nx11/Make.defs
@@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCPUFLAGS		= -fno-builtin
-ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fno-rtti
+ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHPICFLAGS		= -fpic
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/sim/nx11/defconfig b/configs/sim/nx11/defconfig
index 5db318657fb468ced069bf182f0603aee19b6b14..0cae4ffb4653bdec0b3158227e167e23f7e3e2cc 100644
--- a/configs/sim/nx11/defconfig
+++ b/configs/sim/nx11/defconfig
@@ -37,36 +37,15 @@ CONFIG_BUILD_FLAT=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-CONFIG_DEBUG_VERBOSE=y
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_AUDIO is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-CONFIG_DEBUG_GRAPHICS=y
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 # CONFIG_DEBUG_NOOPT is not set
@@ -79,10 +58,12 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="sim"
@@ -96,6 +77,8 @@ CONFIG_HOST_X86_64=y
 CONFIG_SIM_X8664_SYSTEMV=y
 # CONFIG_SIM_X8664_MICROSOFT is not set
 # CONFIG_SIM_WALLTIME is not set
+CONFIG_SIM_NET_HOST_ROUTE=y
+# CONFIG_SIM_NET_BRIDGE is not set
 CONFIG_SIM_FRAMEBUFFER=y
 CONFIG_SIM_X11FB=y
 # CONFIG_SIM_X11NOSHM is not set
@@ -103,6 +86,7 @@ CONFIG_SIM_FBHEIGHT=240
 CONFIG_SIM_FBWIDTH=480
 CONFIG_SIM_FBBPP=32
 # CONFIG_SIM_SPIFLASH is not set
+# CONFIG_SIM_QSPIFLASH is not set
 
 #
 # Architecture Options
@@ -115,6 +99,7 @@ CONFIG_SIM_FBBPP=32
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+CONFIG_ARCH_HAVE_MULTICPU=y
 # CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -170,6 +155,7 @@ CONFIG_ARCH_BOARD="sim"
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -190,6 +176,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2008
 CONFIG_START_MONTH=11
@@ -202,6 +189,7 @@ CONFIG_PREALLOC_TIMERS=8
 #
 # Tasks and Scheduling
 #
+# CONFIG_SMP is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -258,9 +246,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=32
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -281,6 +270,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=8192
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -296,12 +286,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -309,17 +303,37 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -343,29 +357,32 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 # CONFIG_MCU_SERIAL is not set
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -396,12 +413,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -410,6 +421,7 @@ CONFIG_NX_NPLANES=1
 CONFIG_NX_BGCOLOR=0x0
 # CONFIG_NX_ANTIALIASING is not set
 # CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -505,6 +517,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -530,6 +546,8 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -544,14 +562,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -570,17 +591,18 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -596,37 +618,42 @@ CONFIG_EXAMPLES_NX_DEFAULT_FONT=y
 CONFIG_EXAMPLES_NX_BPP=32
 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set
 CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -638,8 +665,9 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -650,6 +678,7 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -671,16 +700,17 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sim/nxffs/Make.defs b/configs/sim/nxffs/Make.defs
index 6ce3fda3651ebc3b56a478f75fd63ac0417ec0a9..1e7f8782d338c319d12c71064429c45e0914c2d0 100644
--- a/configs/sim/nxffs/Make.defs
+++ b/configs/sim/nxffs/Make.defs
@@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCPUFLAGS		= -fno-builtin
-ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fno-rtti
+ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHPICFLAGS		= -fpic
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/sim/nxffs/defconfig b/configs/sim/nxffs/defconfig
index 167222da6c9eee2b1cd6eb29a7301ed938b0217f..24fc7bd1e5ddcb12143387118e23ea096bf21744 100644
--- a/configs/sim/nxffs/defconfig
+++ b/configs/sim/nxffs/defconfig
@@ -41,7 +41,7 @@ CONFIG_BUILD_FLAT=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
 CONFIG_DEBUG_SYMBOLS=y
@@ -56,8 +56,7 @@ CONFIG_DEBUG_NOOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -297,7 +296,6 @@ CONFIG_RAMMTD_FLASHSIM=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 # CONFIG_16550_UART is not set
@@ -345,7 +343,7 @@ CONFIG_SERIAL=y
 # System Logging
 #
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
 
 #
 # Networking Support
@@ -396,7 +394,6 @@ CONFIG_NXFFS_TAILTHRESHOLD=8192
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 # CONFIG_SYSLOG_TIMESTAMP is not set
 
 #
@@ -461,7 +458,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
@@ -529,7 +525,6 @@ CONFIG_EXAMPLES_NXFFS_NLOOPS=100
 # CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -597,7 +592,7 @@ CONFIG_EXAMPLES_NXFFS_NLOOPS=100
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_RAMTEST is not set
diff --git a/configs/sim/nxlines/Make.defs b/configs/sim/nxlines/Make.defs
index f164762ec520233e310ba5866a7fe48508d6773b..4e9f1ce01369f52200d3095e9e091fc38667a472 100644
--- a/configs/sim/nxlines/Make.defs
+++ b/configs/sim/nxlines/Make.defs
@@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCPUFLAGS = -fno-builtin
-ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHPICFLAGS = -fpic
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
diff --git a/configs/sim/nxlines/defconfig b/configs/sim/nxlines/defconfig
index b31cb37fa47a39ac60a77d31d84e6102d17c3d91..28cea7b90bc43968c8e661849030f6e972d096fe 100644
--- a/configs/sim/nxlines/defconfig
+++ b/configs/sim/nxlines/defconfig
@@ -45,7 +45,7 @@ CONFIG_BUILD_FLAT=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
 CONFIG_DEBUG_SYMBOLS=y
@@ -60,8 +60,7 @@ CONFIG_DEBUG_NOOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -157,8 +156,6 @@ CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_POWEROFF is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -308,7 +305,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 # CONFIG_16550_UART is not set
@@ -356,7 +352,7 @@ CONFIG_SERIAL=y
 # System Logging
 #
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
 
 #
 # Networking Support
@@ -409,7 +405,6 @@ CONFIG_FS_PROCFS=y
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 # CONFIG_SYSLOG_TIMESTAMP is not set
 
 #
@@ -562,7 +557,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
@@ -641,7 +635,6 @@ CONFIG_EXAMPLES_NXLINES_BPP=32
 # CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
@@ -814,7 +807,7 @@ CONFIG_NSH_ARCHINIT=y
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_RAMTEST is not set
diff --git a/configs/sim/nxwm/Make.defs b/configs/sim/nxwm/Make.defs
index 7aa008b27f0eeb55ccec0d4b8e88169d8a84a965..dd7ea36daef38f11d81e4d5b4e69dd0970ab5c59 100644
--- a/configs/sim/nxwm/Make.defs
+++ b/configs/sim/nxwm/Make.defs
@@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCPUFLAGS		= -fno-builtin
-ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fno-rtti
+ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHPICFLAGS		= -fpic
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/sim/nxwm/defconfig b/configs/sim/nxwm/defconfig
index 1c872a8792504fe798daef104cf1e0213e507cb6..d75348dbccac32affa2ba40f66e78e5134254d8a 100644
--- a/configs/sim/nxwm/defconfig
+++ b/configs/sim/nxwm/defconfig
@@ -37,13 +37,15 @@ CONFIG_BUILD_FLAT=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 CONFIG_DEBUG_SYMBOLS=y
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 CONFIG_DEBUG_NOOPT=y
@@ -56,10 +58,12 @@ CONFIG_DEBUG_NOOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="sim"
@@ -73,6 +77,8 @@ CONFIG_HOST_X86_64=y
 CONFIG_SIM_X8664_SYSTEMV=y
 # CONFIG_SIM_X8664_MICROSOFT is not set
 # CONFIG_SIM_WALLTIME is not set
+CONFIG_SIM_NET_HOST_ROUTE=y
+# CONFIG_SIM_NET_BRIDGE is not set
 CONFIG_SIM_FRAMEBUFFER=y
 CONFIG_SIM_X11FB=y
 # CONFIG_SIM_X11NOSHM is not set
@@ -80,6 +86,7 @@ CONFIG_SIM_FBHEIGHT=240
 CONFIG_SIM_FBWIDTH=480
 CONFIG_SIM_FBBPP=32
 # CONFIG_SIM_SPIFLASH is not set
+# CONFIG_SIM_QSPIFLASH is not set
 
 #
 # Architecture Options
@@ -92,6 +99,7 @@ CONFIG_SIM_FBBPP=32
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+CONFIG_ARCH_HAVE_MULTICPU=y
 # CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -143,17 +151,15 @@ CONFIG_ARCH_BOARD="sim"
 #
 # Common Board Options
 #
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_POWEROFF is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -175,6 +181,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2012
 CONFIG_START_MONTH=5
@@ -187,6 +194,8 @@ CONFIG_PREALLOC_TIMERS=8
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
+# CONFIG_SMP is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -203,6 +212,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -230,6 +241,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_ATEXIT is not set
 CONFIG_SCHED_ONEXIT=y
 CONFIG_SCHED_ONEXIT_MAX=1
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -244,10 +256,11 @@ CONFIG_SIG_SIGWORK=17
 # POSIX Message Queue Options
 #
 CONFIG_PREALLOC_MQ_MSGS=32
-CONFIG_MQ_MAXMSGSIZE=48
+CONFIG_MQ_MAXMSGSIZE=64
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -271,6 +284,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=8192
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -286,12 +300,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -299,17 +317,37 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -333,29 +371,32 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 # CONFIG_MCU_SERIAL is not set
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -389,12 +430,15 @@ CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 CONFIG_FS_ROMFS=y
 # CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
 
 #
 # Exclude individual procfs entries
@@ -405,12 +449,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_UNIONFS is not set
 # CONFIG_FS_HOSTFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -419,6 +457,7 @@ CONFIG_NX_NPLANES=1
 CONFIG_NX_BGCOLOR=0x0
 # CONFIG_NX_ANTIALIASING is not set
 # CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -494,13 +533,14 @@ CONFIG_NXFONT_SANS28X37B=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 CONFIG_NXTERM=y
 
 #
 # NxTerm Output Text/Graphics Options
 #
 CONFIG_NXTERM_BPP=32
-CONFIG_NXTERM_CURSORCHAR=137
+CONFIG_NXTERM_CURSORCHAR=95
 CONFIG_NXTERM_MXCHARS=256
 CONFIG_NXTERM_CACHESIZE=16
 CONFIG_NXTERM_LINESEPARATION=0
@@ -520,7 +560,11 @@ CONFIG_NX_MULTIUSER=y
 CONFIG_NX_BLOCKING=y
 CONFIG_NX_MXSERVERMSGS=32
 CONFIG_NX_MXCLIENTMSGS=16
-# CONFIG_NX_NXSTART is not set
+# CONFIG_NXSTART_EXTERNINIT is not set
+CONFIG_NXSTART_SERVERPRIO=110
+CONFIG_NXSTART_SERVERSTACK=2048
+CONFIG_NXSTART_DISPLAYNO=0
+CONFIG_NXSTART_VPLANE=0
 
 #
 # Memory Management
@@ -535,6 +579,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -562,6 +610,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -579,15 +629,20 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -613,8 +668,9 @@ CONFIG_HAVE_CXX=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -623,10 +679,10 @@ CONFIG_HAVE_CXX=y
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -635,19 +691,18 @@ CONFIG_HAVE_CXX=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
@@ -655,20 +710,28 @@ CONFIG_HAVE_CXX=y
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -681,8 +744,9 @@ CONFIG_HAVE_CXX=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -693,6 +757,7 @@ CONFIG_HAVE_CXX=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -701,6 +766,7 @@ CONFIG_HAVE_CXX=y
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -745,12 +811,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -759,6 +825,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -766,11 +833,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -802,6 +871,8 @@ CONFIG_NSH_FATMOUNTPT="/tmp"
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -813,10 +884,7 @@ CONFIG_NXWIDGETS=y
 #
 # CONFIG_NXWIDGETS_FLICKERFREE is not set
 # CONFIG_NXWIDGETS_EXTERNINIT is not set
-CONFIG_NXWIDGETS_VPLANE=0
 CONFIG_NXWIDGET_SERVERINIT=y
-CONFIG_NXWIDGETS_SERVERPRIO=110
-CONFIG_NXWIDGETS_SERVERSTACK=16384
 CONFIG_NXWIDGETS_CLIENTPRIO=100
 CONFIG_NXWIDGETS_LISTENERPRIO=100
 CONFIG_NXWIDGETS_LISTENERSTACK=8192
@@ -826,6 +894,7 @@ CONFIG_NXWIDGETS_LISTENERSTACK=8192
 # NXWidget Configuration
 #
 CONFIG_NXWIDGETS_BPP=32
+# CONFIG_NXWIDGETS_GREYSCALE is not set
 CONFIG_NXWIDGETS_SIZEOFCHAR=1
 
 #
@@ -909,7 +978,7 @@ CONFIG_NXWM_TASKBAR_LEFT=y
 CONFIG_NXWM_STARTWINDOW_VSPACING=4
 CONFIG_NXWM_STARTWINDOW_HSPACING=4
 # CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set
-CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm"
+CONFIG_NXWM_STARTWINDOW_MQNAME="nxwm"
 CONFIG_NXWM_STARTWINDOW_MXMSGS=32
 CONFIG_NXWM_STARTWINDOW_MXMPRIO=42
 CONFIG_NXWM_STARTWINDOW_PRIO=100
@@ -966,13 +1035,12 @@ CONFIG_NXWM_CALIBRATION_LISTENERSTACK=2048
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -980,5 +1048,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sim/ostest/Make.defs b/configs/sim/ostest/Make.defs
index a49679c244aea85eb505049394ffcd54f57b8bd7..34004f0f494faf0d819a5b5c08c08b4db5987067 100644
--- a/configs/sim/ostest/Make.defs
+++ b/configs/sim/ostest/Make.defs
@@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCPUFLAGS = -fno-builtin
-ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHPICFLAGS = -fpic
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
diff --git a/configs/sim/ostest/defconfig b/configs/sim/ostest/defconfig
index b5065b098b579d65830f4a0fa856a074b8603066..9c0b061a9079377e948dc8bce93e61bedca90305 100644
--- a/configs/sim/ostest/defconfig
+++ b/configs/sim/ostest/defconfig
@@ -42,32 +42,10 @@ CONFIG_BUILD_FLAT=y
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-CONFIG_DEBUG_VERBOSE=y
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_AUDIO is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 CONFIG_DEBUG_SYMBOLS=y
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 CONFIG_DEBUG_NOOPT=y
@@ -80,10 +58,12 @@ CONFIG_DEBUG_NOOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="sim"
@@ -97,8 +77,11 @@ CONFIG_HOST_X86_64=y
 CONFIG_SIM_X8664_SYSTEMV=y
 # CONFIG_SIM_X8664_MICROSOFT is not set
 # CONFIG_SIM_WALLTIME is not set
+CONFIG_SIM_NET_HOST_ROUTE=y
+# CONFIG_SIM_NET_BRIDGE is not set
 # CONFIG_SIM_FRAMEBUFFER is not set
 # CONFIG_SIM_SPIFLASH is not set
+# CONFIG_SIM_QSPIFLASH is not set
 
 #
 # Architecture Options
@@ -167,6 +150,7 @@ CONFIG_ARCH_BOARD="sim"
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -187,6 +171,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2007
 CONFIG_START_MONTH=2
@@ -199,6 +184,7 @@ CONFIG_PREALLOC_TIMERS=8
 #
 # Tasks and Scheduling
 #
+# CONFIG_SMP is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -281,6 +267,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=8192
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -296,12 +283,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -309,13 +300,25 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
+# CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -324,9 +327,10 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -350,29 +354,32 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 # CONFIG_MCU_SERIAL is not set
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -411,12 +418,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_UNIONFS is not set
 # CONFIG_FS_HOSTFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -435,6 +436,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -462,6 +467,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -477,14 +484,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -503,18 +513,18 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -523,11 +533,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 CONFIG_EXAMPLES_OSTEST=y
 CONFIG_EXAMPLES_OSTEST_LOOPS=100
@@ -537,31 +547,35 @@ CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000
 CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 CONFIG_EXAMPLES_OSTEST_WAITRESULT=y
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
 # CONFIG_FSUTILS_INIFILE is not set
 
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -572,8 +586,9 @@ CONFIG_EXAMPLES_OSTEST_WAITRESULT=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -584,6 +599,7 @@ CONFIG_EXAMPLES_OSTEST_WAITRESULT=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -605,16 +621,17 @@ CONFIG_EXAMPLES_OSTEST_WAITRESULT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sim/pashello/Make.defs b/configs/sim/pashello/Make.defs
index b1ef6cd990bdb3e8926435a4b6870aeb997ecc9c..ed195c6cc3932b5092174d356a6ec888ee90270e 100644
--- a/configs/sim/pashello/Make.defs
+++ b/configs/sim/pashello/Make.defs
@@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCPUFLAGS		= -fno-builtin
-ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fno-rtti
+ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHPICFLAGS		= -fpic
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/sim/pashello/defconfig b/configs/sim/pashello/defconfig
index 2fed08f743caa1aaa476684c7ad95844096d1ec1..ef091ed9e07cecd22835bf2459856af21cb09724 100644
--- a/configs/sim/pashello/defconfig
+++ b/configs/sim/pashello/defconfig
@@ -41,7 +41,7 @@ CONFIG_BUILD_FLAT=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
@@ -56,8 +56,7 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -289,7 +288,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 # CONFIG_16550_UART is not set
@@ -337,7 +335,7 @@ CONFIG_SERIAL=y
 # System Logging
 #
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
 
 #
 # Networking Support
@@ -382,7 +380,6 @@ CONFIG_FS_FAT=y
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 # CONFIG_SYSLOG_TIMESTAMP is not set
 
 #
@@ -447,7 +444,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
@@ -509,7 +505,6 @@ CONFIG_EXAMPLES_PASHELLO_STRSTACKSIZE=128
 # CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -577,7 +572,7 @@ CONFIG_INTERPRETERS_PCODE=y
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_RAMTEST is not set
diff --git a/configs/sim/src/Makefile b/configs/sim/src/Makefile
index 9f45e7e93bf00c22dfc590b460c71c76cdf7441f..16ceb489e9b0ae391dc790af37689ee74c7bdf52 100644
--- a/configs/sim/src/Makefile
+++ b/configs/sim/src/Makefile
@@ -48,12 +48,12 @@ endif
 
 ifeq ($(CONFIG_BOARD_INITIALIZE),y)
   CSRCS += sim_bringup.c
-ifeq ($(CONFIG_SYSTEM_ZONEINFO_ROMFS),y)
+ifeq ($(CONFIG_LIB_ZONEINFO_ROMFS),y)
   CSRCS += sim_zoneinfo.c
 endif
 else ifeq ($(CONFIG_LIB_BOARDCTL),y)
   CSRCS += sim_bringup.c
-ifeq ($(CONFIG_SYSTEM_ZONEINFO_ROMFS),y)
+ifeq ($(CONFIG_LIB_ZONEINFO_ROMFS),y)
   CSRCS += sim_zoneinfo.c
 endif
 endif
@@ -64,4 +64,12 @@ ifeq ($(CONFIG_SIM_TOUCHSCREEN),y)
 endif
 endif
 
+ifeq ($(CONFIG_EXAMPLES_GPIO),y)
+ifeq ($(CONFIG_GPIO_LOWER_HALF),y)
+  CSRCS += sim_ioexpander.c
+else
+  CSRCS += sim_gpio.c
+endif
+endif
+
 include $(TOPDIR)/configs/Board.mk
diff --git a/configs/sim/src/sim.h b/configs/sim/src/sim.h
index 355d085022ead524dba01c36624d1d1dd2a785af..f851b339ccaff306d8c6a47194a2ff9de0e50941 100644
--- a/configs/sim/src/sim.h
+++ b/configs/sim/src/sim.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * config/sim/src/sim.h
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -73,7 +73,7 @@ int sim_bringup(void);
  * Name: sim_zoneinfo
  *
  * Description:
- *   Mount the TZ database.  The apps/system/zoneinfo directory contains
+ *   Mount the TZ database.  The nuttx/zoneinfo directory contains
  *   logic to create a version of the TZ/Olson database.
  *   This database is required if localtime() support is selected via
  *   CONFIG_LIBC_LOCALTIME.  This logic in that directory does the following:
@@ -90,7 +90,7 @@ int sim_bringup(void);
  *
  *   - First, a ROM disk device must be created.  This is done by calling
  *     the function romdisk_register() as described in
- *     nuttx/include/nuttx/fs/ramdisk.h.  This is an OS level operation
+ *     nuttx/include/nuttx/drivers/ramdisk.h.  This is an OS level operation
  *     and must be done in the board-level logic before your appliction
  *     starts.
  *
@@ -107,8 +107,20 @@ int sim_bringup(void);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_SYSTEM_ZONEINFO_ROMFS
+#ifdef CONFIG_LIB_ZONEINFO_ROMFS
 int sim_zoneinfo(int minor);
 #endif
 
+/****************************************************************************
+ * Name: sim_gpio_initialize
+ *
+ * Description:
+ *   Initialize GPIO drivers for use with /apps/examples/gpio
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_EXAMPLES_GPIO
+int sim_gpio_initialize(void);
+#endif
+
 #endif /* __CONFIGS_SIM_SRC_SIM_H */
\ No newline at end of file
diff --git a/configs/sim/src/sim_bringup.c b/configs/sim/src/sim_bringup.c
index c22cd8138163e893b5f11ed7965e64e833be999d..8f0d85c078e0f165a760eeacbf71d1512af26f9c 100644
--- a/configs/sim/src/sim_bringup.c
+++ b/configs/sim/src/sim_bringup.c
@@ -45,6 +45,8 @@
 #include 
 
 #include 
+#include 
+#include 
 
 #include "up_internal.h"
 #include "sim.h"
@@ -53,18 +55,6 @@
 int trv_mount_world(int minor, FAR const char *mountpoint);
 #endif
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_BOARD_INITIALIZE
-#  define SYSLOG lldbg
-#else
-#  define SYSLOG dbg
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -79,16 +69,53 @@ int trv_mount_world(int minor, FAR const char *mountpoint);
 
 int sim_bringup(void)
 {
-#ifdef CONFIG_FS_PROCFS
+#ifdef CONFIG_ONESHOT
+  FAR struct oneshot_lowerhalf_s *oneshot;
+#endif
+#if defined(CONFIG_FS_PROCFS) || defined(CONFIG_ONESHOT)
   int ret;
 #endif
 
-#ifdef CONFIG_SYSTEM_ZONEINFO_ROMFS
+#ifdef CONFIG_LIB_ZONEINFO_ROMFS
   /* Mount the TZ database */
 
   (void)sim_zoneinfo(3);
 #endif
 
+#ifdef CONFIG_EXAMPLES_GPIO
+  /* Initialize simulated GPIO drivers */
+
+  (void)sim_gpio_initialize();
+#endif
+
+#ifdef CONFIG_ONESHOT
+  /* Get an instance of the simulated oneshot timer */
+
+  oneshot = oneshot_initialize(0, 0);
+  if (oneshot == NULL)
+    {
+      _err("ERROR: oneshot_initialize faile\n");
+    }
+  else
+    {
+#ifdef CONFIG_CPULOAD_ONESHOT
+      /* Configure the oneshot timer to support CPU load measurement */
+
+      sched_oneshot_extclk(oneshot);
+
+#else
+      /* Initialize the simulated oneshot driver */
+
+      ret = oneshot_register("/dev/oneshot", oneshot);
+      if (ret < 0)
+        {
+          _err("ERROR: Failed to register oneshot at /dev/oneshot: %d\n",
+               ret);
+        }
+#endif
+    }
+#endif
+
 #ifdef CONFIG_AJOYSTICK
   /* Initialize the simulated analog joystick input device */
 
@@ -107,8 +134,8 @@ int sim_bringup(void)
   ret = mount(NULL, SIM_PROCFS_MOUNTPOINT, "procfs", 0, NULL);
   if (ret < 0)
     {
-      SYSLOG("ERROR: Failed to mount procfs at %s: %d\n",
-             SIM_PROCFS_MOUNTPOINT, ret);
+      _err("ERROR: Failed to mount procfs at %s: %d\n",
+           SIM_PROCFS_MOUNTPOINT, ret);
     }
 #endif
 
diff --git a/configs/sim/src/sim_gpio.c b/configs/sim/src/sim_gpio.c
new file mode 100644
index 0000000000000000000000000000000000000000..bd9c499457537f9f33cf959ae3eca44248fe37cf
--- /dev/null
+++ b/configs/sim/src/sim_gpio.c
@@ -0,0 +1,234 @@
+/****************************************************************************
+ * configs/sim/src/sim_gpio.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author:  Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "sim.h"
+
+#if defined(CONFIG_EXAMPLES_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct simgpio_dev_s
+{
+  struct gpio_dev_s gpio;
+  bool value;
+};
+
+struct simgpint_dev_s
+{
+  struct simgpio_dev_s simgpio;
+  WDOG_ID wdog;
+  pin_interrupt_t callback;
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int gpin_read(FAR struct gpio_dev_s *dev, FAR bool *value);
+static int gpout_write(FAR struct gpio_dev_s *dev, bool value);
+static int gpint_attach(FAR struct gpio_dev_s *dev,
+                        pin_interrupt_t callback);
+static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct gpio_operations_s gpin_ops =
+{
+  .go_read   = gpin_read,
+  .go_write  = NULL,
+  .go_attach = NULL,
+  .go_enable = NULL,
+};
+
+static const struct gpio_operations_s gpout_ops =
+{
+  .go_read   = gpin_read,
+  .go_write  = gpout_write,
+  .go_attach = NULL,
+  .go_enable = NULL,
+};
+
+static const struct gpio_operations_s gpint_ops =
+{
+  .go_read   = gpin_read,
+  .go_write  = NULL,
+  .go_attach = gpint_attach,
+  .go_enable = gpint_enable,
+};
+
+static struct simgpio_dev_s g_gpin =
+{
+  .gpio = 
+  {
+    .gp_pintype = GPIO_INPUT_PIN,
+    .gp_ops     = &gpin_ops,
+  },
+};
+
+static struct simgpio_dev_s g_gpout =
+{
+  .gpio = 
+  {
+    .gp_pintype = GPIO_OUTPUT_PIN,
+    .gp_ops     = &gpout_ops,
+  },
+};
+
+static struct simgpint_dev_s g_gpint =
+{
+  .simgpio =
+  {
+    .gpio = 
+    {
+      .gp_pintype = GPIO_INTERRUPT_PIN,
+      .gp_ops     = &gpint_ops,
+    },
+  },
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+static int sim_interrupt(int argc, wdparm_t arg1, ...)
+{
+  FAR struct simgpint_dev_s *simgpint = (FAR struct simgpint_dev_s *)arg1;
+
+  DEBUGASSERT(simgpint != NULL && simgpint->callback != NULL);
+  gpioinfo("Interrupt! callback=%p\n", simgpint->callback);
+
+  simgpint->callback(&simgpint->simgpio.gpio);
+  return OK;
+}
+
+static int gpin_read(FAR struct gpio_dev_s *dev, FAR bool *value)
+{
+  FAR struct simgpio_dev_s *simgpio = (FAR struct simgpio_dev_s *)dev;
+
+  DEBUGASSERT(simgpio != NULL && value != NULL);
+  gpioinfo("Reading %d (next=%d)\n", (int)simgpio->value, (int)!simgpio->value);
+
+  *value = simgpio->value;
+  simgpio->value = !simgpio->value;
+  return OK;
+}
+
+static int gpout_write(FAR struct gpio_dev_s *dev, bool value)
+{
+  FAR struct simgpio_dev_s *simgpio = (FAR struct simgpio_dev_s *)dev;
+
+  DEBUGASSERT(simgpio != NULL);
+  gpioinfo("Writing %d\n", (int)value);
+
+  simgpio->value = value;
+  return OK;    
+}
+
+static int gpint_attach(FAR struct gpio_dev_s *dev,
+                        pin_interrupt_t callback)
+{
+  FAR struct simgpint_dev_s *simgpint = (FAR struct simgpint_dev_s *)dev;
+ 
+  gpioinfo("Cancel 1 second timer\n");
+  wd_cancel(simgpint->wdog);
+
+  gpioinfo("Attach %p\n", callback);
+  simgpint->callback = callback;
+  return OK;
+}
+
+static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable)
+{
+  FAR struct simgpint_dev_s *simgpint = (FAR struct simgpint_dev_s *)dev;
+
+  if (enable)
+    {
+      if (simgpint->callback != NULL)
+        {
+          gpioinfo("Start 1 second timer\n");
+          (void)wd_start(simgpint->wdog, SEC2TICK(1),
+                         (wdentry_t)sim_interrupt, 1, (wdparm_t)dev);
+        }
+    }
+  else
+    {
+       gpioinfo("Cancel 1 second timer\n");
+      (void)wd_cancel(simgpint->wdog);
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sim_gpio_initialize
+ *
+ * Description:
+ *   Initialize GPIO drivers for use with /apps/examples/gpio
+ *
+ ****************************************************************************/
+
+int sim_gpio_initialize(void)
+{
+  g_gpint.wdog = wd_create();
+  DEBUGASSERT(g_gpint.wdog != NULL);
+
+  (void)gpio_pin_register(&g_gpin.gpio, 0);
+  (void)gpio_pin_register(&g_gpout.gpio, 1);
+  (void)gpio_pin_register(&g_gpint.simgpio.gpio, 2);
+  return 0;
+}
+#endif /* CONFIG_EXAMPLES_GPIO && !CONFIG_GPIO_LOWER_HALF */
diff --git a/configs/sim/src/sim_ioexpander.c b/configs/sim/src/sim_ioexpander.c
new file mode 100644
index 0000000000000000000000000000000000000000..c369c69af3c9a00f6b4490666e99d698d60ca62a
--- /dev/null
+++ b/configs/sim/src/sim_ioexpander.c
@@ -0,0 +1,116 @@
+/****************************************************************************
+ * configs/sim/src/sim_ioexpander.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author:  Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "up_internal.h"
+#include "sim.h"
+
+#if defined(CONFIG_EXAMPLES_GPIO) && defined(CONFIG_GPIO_LOWER_HALF)
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sim_gpio_initialize
+ *
+ * Description:
+ *   Initialize simulated GPIO expander for use with /apps/examples/gpio
+ *
+ ****************************************************************************/
+
+int sim_gpio_initialize(void)
+{
+  /* Get an instance of the simulated I/O expander */
+
+  FAR struct ioexpander_dev_s *ioe = sim_ioexpander_initialize();
+  if (ioe == NULL)
+    {
+      gpioerr("ERROR: sim_ioexpander_initialize failed\n");
+      return -ENOMEM;
+    }
+
+  /* Register four pin drivers */
+
+  /* Pin 0: an non-inverted, input pin */
+
+  (void)IOEXP_SETDIRECTION(ioe, 0, IOEXPANDER_DIRECTION_IN);
+  (void)IOEXP_SETOPTION(ioe, 0, IOEXPANDER_OPTION_INVERT,
+                        (FAR void *)IOEXPANDER_VAL_NORMAL);
+  (void)IOEXP_SETOPTION(ioe, 0, IOEXPANDER_OPTION_INTCFG,
+                        (FAR void *)IOEXPANDER_VAL_DISABLE);
+  (void)gpio_lower_half(ioe, 0, GPIO_INPUT_PIN, 0);
+
+  /* Pin 1: an non-inverted, output pin */
+
+  (void)IOEXP_SETDIRECTION(ioe, 1, IOEXPANDER_DIRECTION_OUT);
+  (void)IOEXP_SETOPTION(ioe, 1, IOEXPANDER_OPTION_INVERT,
+                        (FAR void *)IOEXPANDER_VAL_NORMAL);
+  (void)IOEXP_SETOPTION(ioe, 2, IOEXPANDER_OPTION_INTCFG,
+                        (FAR void *)IOEXPANDER_VAL_DISABLE);
+  (void)gpio_lower_half(ioe, 1, GPIO_OUTPUT_PIN, 1);
+
+  /* Pin 2: an non-inverted, edge interrupting pin */
+
+  (void)IOEXP_SETDIRECTION(ioe, 2, IOEXPANDER_DIRECTION_IN);
+  (void)IOEXP_SETOPTION(ioe, 2, IOEXPANDER_OPTION_INVERT,
+                        (FAR void *)IOEXPANDER_VAL_NORMAL);
+  (void)IOEXP_SETOPTION(ioe, 2, IOEXPANDER_OPTION_INTCFG,
+                        (FAR void *)IOEXPANDER_VAL_BOTH);
+  (void)gpio_lower_half(ioe, 2, GPIO_INTERRUPT_PIN, 2);
+
+  /* Pin 3: a non-inverted, level interrupting pin */
+
+  (void)IOEXP_SETDIRECTION(ioe, 3, IOEXPANDER_DIRECTION_IN);
+  (void)IOEXP_SETOPTION(ioe, 3, IOEXPANDER_OPTION_INVERT,
+                        (FAR void *)IOEXPANDER_VAL_NORMAL);
+  (void)IOEXP_SETOPTION(ioe, 3, IOEXPANDER_OPTION_INTCFG,
+                        (FAR void *)IOEXPANDER_VAL_HIGH);
+  (void)gpio_lower_half(ioe, 3, GPIO_INTERRUPT_PIN, 3);
+
+  return 0;
+}
+#endif /* CONFIG_EXAMPLES_GPIO && CONFIG_GPIO_LOWER_HALF */
diff --git a/configs/sim/src/sim_touchscreen.c b/configs/sim/src/sim_touchscreen.c
index c6afc35528415f85e773c250adcfe442eddd090b..c81c88325e74ecb04698b62b0f35a63c0aef5351 100644
--- a/configs/sim/src/sim_touchscreen.c
+++ b/configs/sim/src/sim_touchscreen.c
@@ -107,30 +107,30 @@ int board_tsc_setup(int minor)
    * X11 window to support the mouse-driven touchscreen simulation.
    */
 
-  ivdbg("Initializing framebuffer\n");
+  iinfo("Initializing framebuffer\n");
   ret = up_fbinitialize(0);
   if (ret < 0)
     {
-      idbg("up_fbinitialize failed: %d\n", -ret);
+      ierr("ERROR: up_fbinitialize failed: %d\n", -ret);
       goto errout;
     }
 
   dev = up_fbgetvplane(0, 0);
   if (!dev)
     {
-      idbg("up_fbgetvplane 0 failed\n");
+      ierr("ERROR: up_fbgetvplane 0 failed\n");
       ret = -ENODEV;
       goto errout_with_fb;
     }
 
   /* Then open NX */
 
-  ivdbg("Open NX\n");
+  iinfo("Open NX\n");
   g_simtc.hnx = nx_open(dev);
   if (!g_simtc.hnx)
     {
       ret = -errno;
-      idbg("nx_open failed: %d\n", ret);
+      ierr("ERROR: nx_open failed: %d\n", ret);
       goto errout_with_fb;
     }
 
@@ -140,20 +140,20 @@ int board_tsc_setup(int minor)
   ret = vnc_default_fbinitialize(0, g_simtc.hnx);
   if (ret < 0)
     {
-      idbg("vnc_default_fbinitialize failed: %d\n", ret);
+      ierr("ERROR: vnc_default_fbinitialize failed: %d\n", ret);
       goto errout_with_fb;
     }
 #endif
 
   /* Set the background to the configured background color */
 
-  ivdbg("Set background color=%d\n", CONFIG_EXAMPLES_TOUCHSCREEN_BGCOLOR);
+  iinfo("Set background color=%d\n", CONFIG_EXAMPLES_TOUCHSCREEN_BGCOLOR);
 
   color = CONFIG_EXAMPLES_TOUCHSCREEN_BGCOLOR;
   ret = nx_setbgcolor(g_simtc.hnx, &color);
   if (ret < 0)
     {
-      idbg("nx_setbgcolor failed: %d\n", ret);
+      ierr("ERROR: nx_setbgcolor failed: %d\n", ret);
       goto errout_with_nx;
     }
 
@@ -162,7 +162,7 @@ int board_tsc_setup(int minor)
   ret = board_tsc_setup(minor);
   if (ret < 0)
     {
-      idbg("board_tsc_setup failed: %d\n", ret);
+      ierr("ERROR: board_tsc_setup failed: %d\n", ret);
       goto errout_with_nx;
     }
   return OK;
diff --git a/configs/sim/src/sim_zoneinfo.c b/configs/sim/src/sim_zoneinfo.c
index 1e3840917c321a4bdaafdbf0d3d3a47fce126627..6dd056152c29ca4aab0d7b2522b094846c27b79d 100644
--- a/configs/sim/src/sim_zoneinfo.c
+++ b/configs/sim/src/sim_zoneinfo.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * config/sim/src/sim_zoneinfo.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -44,10 +44,10 @@
 #include 
 #include 
 
-#include 
-#include 
+#include 
+#include 
 
-#ifdef CONFIG_SYSTEM_ZONEINFO_ROMFS
+#ifdef CONFIG_LIB_ZONEINFO_ROMFS
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -80,7 +80,7 @@
  * Name: sim_zoneinfo
  *
  * Description:
- *   Mount the TZ database.  The apps/system/zoneinfo directory contains
+ *   Mount the TZ database.  The nuttx/zoneinfo directory contains
  *   logic to create a version of the TZ/Olson database.
  *   This database is required if localtime() support is selected via
  *   CONFIG_LIBC_LOCALTIME.  This logic in that directory does the following:
@@ -97,7 +97,7 @@
  *
  *   - First, a ROM disk device must be created.  This is done by calling
  *     the function romdisk_register() as described in
- *     nuttx/include/nuttx/fs/ramdisk.h.  This is an OS level operation
+ *     nuttx/include/nuttx/drivers/ramdisk.h.  This is an OS level operation
  *     and must be done in the board-level logic before your appliction
  *     starts.
  *
@@ -149,5 +149,5 @@ int sim_zoneinfo(int minor)
   return OK;
 }
 
-#endif /* CONFIG_SYSTEM_ZONEINFO_ROMFS */
+#endif /* CONFIG_LIB_ZONEINFO_ROMFS */
 
diff --git a/configs/sim/touchscreen/Make.defs b/configs/sim/touchscreen/Make.defs
index dcbfb0137710614a8fb8df13a0c07b0f7e9358c1..baac532bfd8bc560eb68f88efeff257ee3090921 100644
--- a/configs/sim/touchscreen/Make.defs
+++ b/configs/sim/touchscreen/Make.defs
@@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCPUFLAGS		= -fno-builtin
-ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fno-rtti
+ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHPICFLAGS		= -fpic
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/sim/touchscreen/defconfig b/configs/sim/touchscreen/defconfig
index 5887fafd2a97b88ecc429a59ecc03f230695319a..75a5698c2015c5f297d7cad6371a1a4c980bb4ae 100644
--- a/configs/sim/touchscreen/defconfig
+++ b/configs/sim/touchscreen/defconfig
@@ -37,37 +37,15 @@ CONFIG_BUILD_FLAT=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-CONFIG_DEBUG_VERBOSE=y
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_AUDIO is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_INPUT is not set
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 # CONFIG_DEBUG_NOOPT is not set
@@ -80,8 +58,7 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -97,6 +74,8 @@ CONFIG_HOST_X86_64=y
 CONFIG_SIM_X8664_SYSTEMV=y
 # CONFIG_SIM_X8664_MICROSOFT is not set
 # CONFIG_SIM_WALLTIME is not set
+CONFIG_SIM_NET_HOST_ROUTE=y
+# CONFIG_SIM_NET_BRIDGE is not set
 CONFIG_SIM_FRAMEBUFFER=y
 CONFIG_SIM_X11FB=y
 # CONFIG_SIM_X11NOSHM is not set
@@ -120,6 +99,7 @@ CONFIG_SIM_TOUCHSCREEN=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+CONFIG_ARCH_HAVE_MULTICPU=y
 # CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -176,12 +156,11 @@ CONFIG_ARCH_BOARD="sim"
 # Board-Specific Options
 #
 CONFIG_EXAMPLES_TOUCHSCREEN_BGCOLOR=0x007b68ee
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_POWEROFF is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_TSCTEST=y
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -271,9 +250,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=32
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -331,17 +311,37 @@ CONFIG_INPUT=y
 # CONFIG_BUTTONS is not set
 # CONFIG_DJOYSTICK is not set
 # CONFIG_AJOYSTICK is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -365,10 +365,6 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 # CONFIG_MCU_SERIAL is not set
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -377,17 +373,22 @@ CONFIG_SERIAL=y
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -418,12 +419,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -432,6 +427,7 @@ CONFIG_NX_NPLANES=1
 CONFIG_NX_BGCOLOR=0x0
 # CONFIG_NX_ANTIALIASING is not set
 # CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -527,6 +523,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -566,14 +566,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -592,6 +595,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -599,10 +603,10 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -611,25 +615,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
@@ -639,14 +644,20 @@ CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/input0"
 CONFIG_EXAMPLES_TOUCHSCREEN_NSAMPLES=25
 # CONFIG_EXAMPLES_TOUCHSCREEN_MOUSE is not set
 CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -658,8 +669,8 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -670,6 +681,7 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -691,16 +703,16 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sim/traveler/Make.defs b/configs/sim/traveler/Make.defs
index df548aee9e7303bed69b51f12b29a28653bed95a..c07870fc694c44ac34da36353d8006096966169f 100644
--- a/configs/sim/traveler/Make.defs
+++ b/configs/sim/traveler/Make.defs
@@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCPUFLAGS		= -fno-builtin
-ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fno-rtti
+ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHPICFLAGS		= -fpic
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/sim/traveler/defconfig b/configs/sim/traveler/defconfig
index 86e5d9cc77312ceb993a2d04b84adbfa5289ced5..db4e2bfdc4c6b4a98b304116a6fc2c655b278c63 100644
--- a/configs/sim/traveler/defconfig
+++ b/configs/sim/traveler/defconfig
@@ -37,37 +37,15 @@ CONFIG_BUILD_FLAT=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-CONFIG_DEBUG_VERBOSE=y
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_AUDIO is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-CONFIG_DEBUG_GRAPHICS=y
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_INPUT is not set
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 CONFIG_DEBUG_SYMBOLS=y
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 # CONFIG_DEBUG_NOOPT is not set
@@ -80,10 +58,12 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="sim"
@@ -97,6 +77,8 @@ CONFIG_HOST_X86_64=y
 CONFIG_SIM_X8664_SYSTEMV=y
 # CONFIG_SIM_X8664_MICROSOFT is not set
 # CONFIG_SIM_WALLTIME is not set
+CONFIG_SIM_NET_HOST_ROUTE=y
+# CONFIG_SIM_NET_BRIDGE is not set
 CONFIG_SIM_FRAMEBUFFER=y
 CONFIG_SIM_X11FB=y
 # CONFIG_SIM_X11NOSHM is not set
@@ -107,6 +89,7 @@ CONFIG_SIM_FBBPP=32
 CONFIG_SIM_AJOYSTICK=y
 # CONFIG_SIM_NOINPUT is not set
 # CONFIG_SIM_SPIFLASH is not set
+# CONFIG_SIM_QSPIFLASH is not set
 
 #
 # Architecture Options
@@ -119,6 +102,7 @@ CONFIG_SIM_AJOYSTICK=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+CONFIG_ARCH_HAVE_MULTICPU=y
 # CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -174,6 +158,7 @@ CONFIG_ARCH_BOARD="sim"
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -194,6 +179,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2008
 CONFIG_START_MONTH=11
@@ -206,6 +192,8 @@ CONFIG_PREALLOC_TIMERS=8
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
+# CONFIG_SMP is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -263,9 +251,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=32
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -286,6 +275,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=8192
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -301,12 +291,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -323,17 +317,37 @@ CONFIG_INPUT=y
 # CONFIG_BUTTONS is not set
 # CONFIG_DJOYSTICK is not set
 CONFIG_AJOYSTICK=y
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -357,29 +371,32 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 # CONFIG_MCU_SERIAL is not set
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -417,12 +434,6 @@ CONFIG_FS_ROMFS=y
 # CONFIG_FS_UNIONFS is not set
 # CONFIG_FS_HOSTFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -441,6 +452,11 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+# CONFIG_WIRELESS is not set
+
 #
 # Binary Loader
 #
@@ -466,6 +482,8 @@ CONFIG_LIBM=y
 CONFIG_LIBC_FLOATINGPOINT=y
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -480,15 +498,18 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -508,17 +529,18 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # Examples
 #
 # CONFIG_EXAMPLES_AJOYSTICK is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -527,19 +549,18 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
@@ -547,30 +568,35 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+CONFIG_FSUTILS_INIFILE=y
+CONFIG_FSUTILS_INIFILE_MAXLINE=256
+CONFIG_FSUTILS_INIFILE_DEBUGLEVEL=0
+# CONFIG_FSUTILS_PASSWD is not set
 
 #
-# Graphics Support
+# GPS Utilities
 #
-# CONFIG_TIFF is not set
-CONFIG_GRAPHICS_TRAVELER=y
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
-# Traveler game
+# Graphics Support
 #
+# CONFIG_TIFF is not set
+CONFIG_GRAPHICS_TRAVELER=y
 
 #
 # Color configuration
@@ -602,8 +628,9 @@ CONFIG_GRAPHICS_TRAVELER_DEBUG_LEVEL=0
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -614,6 +641,7 @@ CONFIG_GRAPHICS_TRAVELER_DEBUG_LEVEL=0
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -635,18 +663,17 @@ CONFIG_GRAPHICS_TRAVELER_DEBUG_LEVEL=0
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-CONFIG_FSUTILS_INIFILE=y
-CONFIG_FSUTILS_INIFILE_MAXLINE=256
-CONFIG_FSUTILS_INIFILE_DEBUGLEVEL=0
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sim/udgram/Make.defs b/configs/sim/udgram/Make.defs
index d538b9b3efae9c2f2439ade1c19e19cf30e1bb36..ccb4f92567d82a162fe4d96a18420d8bafc1cd6a 100644
--- a/configs/sim/udgram/Make.defs
+++ b/configs/sim/udgram/Make.defs
@@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCPUFLAGS		= -fno-builtin
-ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fno-rtti
+ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHPICFLAGS		= -fpic
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/sim/udgram/defconfig b/configs/sim/udgram/defconfig
index e4b3854ac5f9ea3a350482436f5a2fc25318d624..8cf1036c1a074f8459ec2b2fe1fc9636a4750b89 100644
--- a/configs/sim/udgram/defconfig
+++ b/configs/sim/udgram/defconfig
@@ -42,9 +42,10 @@ CONFIG_BUILD_FLAT=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 CONFIG_DEBUG_SYMBOLS=y
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 CONFIG_DEBUG_NOOPT=y
@@ -57,10 +58,12 @@ CONFIG_DEBUG_NOOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="sim"
@@ -78,6 +81,7 @@ CONFIG_SIM_NET_HOST_ROUTE=y
 # CONFIG_SIM_NET_BRIDGE is not set
 # CONFIG_SIM_FRAMEBUFFER is not set
 # CONFIG_SIM_SPIFLASH is not set
+# CONFIG_SIM_QSPIFLASH is not set
 
 #
 # Architecture Options
@@ -142,18 +146,16 @@ CONFIG_ARCH_BOARD="sim"
 #
 # Common Board Options
 #
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_POWEROFF is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_APP_SYMTAB is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -175,6 +177,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2008
 CONFIG_START_MONTH=6
@@ -187,6 +190,7 @@ CONFIG_PREALLOC_TIMERS=8
 #
 # Tasks and Scheduling
 #
+# CONFIG_SMP is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -270,6 +274,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=8192
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -285,12 +290,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -298,27 +307,42 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_NETDEVICES is not set
 # CONFIG_NET_SLIP is not set
-# CONFIG_PIPES is not set
+CONFIG_PIPES=y
+CONFIG_DEV_PIPE_MAXSIZE=1024
+CONFIG_DEV_PIPE_SIZE=1024
+CONFIG_DEV_FIFO_SIZE=1024
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -342,29 +366,32 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 # CONFIG_MCU_SERIAL is not set
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -372,13 +399,11 @@ CONFIG_SERIAL=y
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_GUARDSIZE=2
 
 #
@@ -498,12 +523,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_UNIONFS is not set
 # CONFIG_FS_HOSTFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -554,6 +573,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -574,7 +595,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
@@ -583,8 +603,10 @@ CONFIG_LIBC_NETDB=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -608,6 +630,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
@@ -619,10 +642,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_HELLO=y
 CONFIG_EXAMPLES_HELLO_PRIORITY=100
 CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -631,37 +654,33 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_UNIONFS is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
-# CONFIG_EXAMPLES_USBTERM is not set
 CONFIG_EXAMPLES_UDGRAM=y
 CONFIG_EXAMPLES_UDGRAM_ADDR="/dev/fifo"
 CONFIG_EXAMPLES_UDGRAM_SERVER_APPNAME="server"
@@ -670,8 +689,12 @@ CONFIG_EXAMPLES_UDGRAM_SERVER_PRIORITY=100
 CONFIG_EXAMPLES_UDGRAM_CLIENT_APPNAME="client"
 CONFIG_EXAMPLES_UDGRAM_CLIENT_STACKSIZE=4096
 CONFIG_EXAMPLES_UDGRAM_CLIENT_PRIORITY=100
+# CONFIG_EXAMPLES_UNIONFS is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_USTREAM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -695,8 +718,9 @@ CONFIG_EXAMPLES_UDGRAM_CLIENT_PRIORITY=100
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -707,10 +731,11 @@ CONFIG_EXAMPLES_UDGRAM_CLIENT_PRIORITY=100
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
-# CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_SMTP is not set
 
 #
 # NSH Library
@@ -769,6 +794,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -785,6 +811,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -825,6 +852,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -847,12 +875,12 @@ CONFIG_NSH_MAX_ROUNDTRIP=20
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -861,7 +889,9 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_SYMTAB is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sim/unionfs/Make.defs b/configs/sim/unionfs/Make.defs
index 42334c65cf4f3a664dbf9c9efef5659cc8269dec..43838bb367907d719e1d4220e3ee48e0a5c727a6 100644
--- a/configs/sim/unionfs/Make.defs
+++ b/configs/sim/unionfs/Make.defs
@@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCPUFLAGS		= -fno-builtin
-ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fno-rtti
+ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHPICFLAGS		= -fpic
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/sim/unionfs/defconfig b/configs/sim/unionfs/defconfig
index 5646c7bccde165efd0501b3afdb22e1463c450cf..95aa4bea1acf4e736776b93313b722c8d5e68d2a 100644
--- a/configs/sim/unionfs/defconfig
+++ b/configs/sim/unionfs/defconfig
@@ -41,7 +41,7 @@ CONFIG_BUILD_FLAT=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
 CONFIG_DEBUG_SYMBOLS=y
@@ -56,8 +56,7 @@ CONFIG_DEBUG_NOOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -148,8 +147,6 @@ CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_APP_SYMTAB is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -301,7 +298,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 # CONFIG_16550_UART is not set
@@ -349,7 +345,7 @@ CONFIG_SERIAL=y
 # System Logging
 #
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
 
 #
 # Networking Support
@@ -403,7 +399,6 @@ CONFIG_FS_UNIONFS=y
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 # CONFIG_SYSLOG_TIMESTAMP is not set
 
 #
@@ -472,7 +467,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
@@ -535,7 +529,6 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
@@ -716,7 +709,7 @@ CONFIG_NSH_ARCHINIT=y
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_RAMTEST is not set
diff --git a/configs/sim/ustream/Make.defs b/configs/sim/ustream/Make.defs
index cf9073789484ccdbc61d4ada564f84dccc730324..679e4c0ae80147ce47c2c0f017e3df5952834c42 100644
--- a/configs/sim/ustream/Make.defs
+++ b/configs/sim/ustream/Make.defs
@@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCPUFLAGS		= -fno-builtin
-ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fno-rtti
+ARCHCPUFLAGSXX		= -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHPICFLAGS		= -fpic
 ARCHWARNINGS		= -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX		= -Wall -Wshadow -Wundef
diff --git a/configs/sim/ustream/defconfig b/configs/sim/ustream/defconfig
index 14d9bde879783d559876a1b66daf449d2b261808..39ae060bc8082b37226a246f6e189a90f8091ba9 100644
--- a/configs/sim/ustream/defconfig
+++ b/configs/sim/ustream/defconfig
@@ -42,9 +42,10 @@ CONFIG_BUILD_FLAT=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 CONFIG_DEBUG_SYMBOLS=y
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 CONFIG_DEBUG_NOOPT=y
@@ -57,10 +58,12 @@ CONFIG_DEBUG_NOOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 CONFIG_ARCH_SIM=y
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="sim"
@@ -78,6 +81,7 @@ CONFIG_SIM_NET_HOST_ROUTE=y
 # CONFIG_SIM_NET_BRIDGE is not set
 # CONFIG_SIM_FRAMEBUFFER is not set
 # CONFIG_SIM_SPIFLASH is not set
+# CONFIG_SIM_QSPIFLASH is not set
 
 #
 # Architecture Options
@@ -142,18 +146,16 @@ CONFIG_ARCH_BOARD="sim"
 #
 # Common Board Options
 #
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_POWEROFF is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_APP_SYMTAB is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -175,6 +177,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2008
 CONFIG_START_MONTH=6
@@ -187,6 +190,7 @@ CONFIG_PREALLOC_TIMERS=8
 #
 # Tasks and Scheduling
 #
+# CONFIG_SMP is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -270,6 +274,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=8192
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -285,12 +290,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -298,27 +307,42 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_NETDEVICES is not set
 # CONFIG_NET_SLIP is not set
-# CONFIG_PIPES is not set
+CONFIG_PIPES=y
+CONFIG_DEV_PIPE_MAXSIZE=1024
+CONFIG_DEV_PIPE_SIZE=1024
+CONFIG_DEV_FIFO_SIZE=1024
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -342,29 +366,32 @@ CONFIG_SERIAL=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 # CONFIG_MCU_SERIAL is not set
 # CONFIG_STANDARD_SERIAL is not set
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -372,13 +399,11 @@ CONFIG_SERIAL=y
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_GUARDSIZE=2
 
 #
@@ -498,12 +523,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_UNIONFS is not set
 # CONFIG_FS_HOSTFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -554,6 +573,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -574,7 +595,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
@@ -583,8 +603,10 @@ CONFIG_LIBC_NETDB=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -608,6 +630,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
@@ -619,10 +642,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_HELLO=y
 CONFIG_EXAMPLES_HELLO_PRIORITY=100
 CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -631,42 +654,42 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_UDGRAM is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
-# CONFIG_EXAMPLES_UDGRAM is not set
 CONFIG_EXAMPLES_USTREAM=y
 CONFIG_EXAMPLES_USTREAM_ADDR="/dev/fifo"
 # CONFIG_EXAMPLES_USTREAM_USE_POLL is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -690,8 +713,9 @@ CONFIG_EXAMPLES_USTREAM_ADDR="/dev/fifo"
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -702,10 +726,11 @@ CONFIG_EXAMPLES_USTREAM_ADDR="/dev/fifo"
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
-# CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_SMTP is not set
 
 #
 # NSH Library
@@ -764,6 +789,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -780,6 +806,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -820,6 +847,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -842,12 +870,12 @@ CONFIG_NSH_MAX_ROUNDTRIP=20
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -856,7 +884,9 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_SYMTAB is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/skp16c26/ostest/defconfig b/configs/skp16c26/ostest/defconfig
index da7c48a09d5d04c61c711d83cf15251039e82e88..bd73c06fffaed5f67ed9a0d2475fc093a86978bd 100644
--- a/configs/skp16c26/ostest/defconfig
+++ b/configs/skp16c26/ostest/defconfig
@@ -38,7 +38,7 @@ CONFIG_MOTOROLA_SREC=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
@@ -53,13 +53,12 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-CONFIG_ARCH_SH=y
+CONFIG_ARCH_RENESAS=y
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
-CONFIG_ARCH="sh"
+CONFIG_ARCH="renesas"
 CONFIG_ARCH_CHIP="m16c"
 # CONFIG_ARCH_CHIP_SH7032 is not set
 CONFIG_ARCH_CHIP_M30262F8=y
@@ -254,7 +253,6 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
 # CONFIG_16550_UART is not set
@@ -302,7 +300,6 @@ CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
 # System Logging
 #
 
-# CONFIG_SYSLOG is not set
 
 #
 # Graphics Support
@@ -360,7 +357,6 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Non-standard Library Support
@@ -425,7 +421,6 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
diff --git a/configs/skp16c26/src/Makefile b/configs/skp16c26/src/Makefile
index 8b4f1312c696b35accef90eaa4c5edc5f1be9964..a17f913472780ba745a60d628bd04939f0c6af18 100644
--- a/configs/skp16c26/src/Makefile
+++ b/configs/skp16c26/src/Makefile
@@ -65,6 +65,8 @@ libboard$(LIBEXT): $(OBJS)
 
 depend: .depend
 
+context:
+
 clean:
 	$(call DELFILE, libboard$(LIBEXT))
 	$(call CLEAN)
diff --git a/configs/spark/composite/Make.defs b/configs/spark/composite/Make.defs
index 5fd6bfd19e823835fa05dd7c46d8c50666f1c3f9..b1d7614f8bb73fa3f91f6a578461dea3427c7d65 100644
--- a/configs/spark/composite/Make.defs
+++ b/configs/spark/composite/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/spark/composite/defconfig b/configs/spark/composite/defconfig
index 0db4b8554e6fb098a6963c395574c3a08e6a4682..2dec57c31be0b464ee391efada0d8005042c4380 100644
--- a/configs/spark/composite/defconfig
+++ b/configs/spark/composite/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +199,7 @@ CONFIG_ARCH_CHIP_STM32F103CB=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -407,6 +408,12 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_DMACAPABLE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -418,10 +425,18 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
 # CONFIG_USART2_RXDMA is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -527,7 +542,6 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -536,13 +550,12 @@ CONFIG_SPARK_FLASH=y
 CONFIG_SPARK_FLASH_SPI=2
 CONFIG_SPARK_FLASH_MINOR=0
 # CONFIG_SPARK_FLASH_PART is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -554,9 +567,12 @@ CONFIG_BOARDCTL_USBDEVCTRL=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=11
@@ -650,6 +666,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=340
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -669,9 +686,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -687,8 +709,18 @@ CONFIG_ANALOG=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -696,6 +728,7 @@ CONFIG_ANALOG=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -718,6 +751,7 @@ CONFIG_MTD_BYTE_WRITE=y
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
 # CONFIG_MTD_S25FL1 is not set
 # CONFIG_MTD_N25QXXX is not set
@@ -739,10 +773,10 @@ CONFIG_SST25_SECTOR512=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -788,6 +822,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -862,6 +897,8 @@ CONFIG_USBMSC_VERSIONNO=0x399
 CONFIG_USBMSC_SCSI_PRIO=128
 CONFIG_USBMSC_SCSI_STACKSIZE=340
 # CONFIG_USBHOST is not set
+CONFIG_HAVE_USBTRACE=y
+# CONFIG_USBMONITOR is not set
 CONFIG_DRIVERS_WIRELESS=y
 # CONFIG_WL_CC1101 is not set
 CONFIG_WL_CC3000=y
@@ -875,17 +912,22 @@ CONFIG_CC3000_SELECT_STACKSIZE=390
 CONFIG_CC3000_UNSOLICED_STACKSIZE=264
 # CONFIG_CC3000_PROBES is not set
 # CONFIG_WL_NRF24L01 is not set
+# CONFIG_CL_MFRC522 is not set
 # CONFIG_WL_PN532 is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -935,12 +977,6 @@ CONFIG_FS_FATTIME=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -981,7 +1017,7 @@ CONFIG_SYMTAB_ORDEREDBYNAME=y
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
@@ -1007,7 +1043,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=0
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -1016,8 +1051,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1047,17 +1084,16 @@ CONFIG_EXAMPLES_CC3000BASIC=y
 # CONFIG_EXAMPLES_CC3000_STACK_CHECK is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1067,39 +1103,39 @@ CONFIG_EXAMPLES_CC3000BASIC=y
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1119,8 +1155,8 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1186,7 +1222,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1208,6 +1243,7 @@ CONFIG_NSH_DISABLE_UNAME=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1248,22 +1284,8 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
-# CONFIG_SYSTEM_CLE is not set
-# CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_FLASH_ERASEALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_SYSTEM_HEXED is not set
-# CONFIG_SYSTEM_RAMTEST is not set
-CONFIG_READLINE_HAVE_EXTMATCH=y
-CONFIG_SYSTEM_READLINE=y
-CONFIG_READLINE_ECHO=y
-# CONFIG_READLINE_TABCOMPLETION is not set
-# CONFIG_READLINE_CMD_HISTORY is not set
-# CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_CDCACM is not set
+# CONFIG_SYSTEM_CLE is not set
 CONFIG_SYSTEM_COMPOSITE=y
 CONFIG_SYSTEM_COMPOSITE_NLUNS=1
 CONFIG_SYSTEM_COMPOSITE_DEVMINOR1=0
@@ -1281,7 +1303,20 @@ CONFIG_SYSTEM_COMPOSITE_BUFSIZE=256
 # CONFIG_SYSTEM_COMPOSITE_TRACECONTROLLER is not set
 # CONFIG_SYSTEM_COMPOSITE_TRACEINTERRUPTS is not set
 # CONFIG_SYSTEM_COMPOSITE_DEBUGMM is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_USBMSC is not set
-# CONFIG_SYSTEM_USBMONITOR is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/spark/include/board.h b/configs/spark/include/board.h
index 197f53ebb84c9a033809536c9708d87cf9e6d242..b44dce3aab73962a21269a9f2e70ff3a577d5395 100644
--- a/configs/spark/include/board.h
+++ b/configs/spark/include/board.h
@@ -2,7 +2,7 @@
  * configs/spark/include/board.h
  * include/arch/board/board.h
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Authors: Gregory Nutt 
  *            Librae 
  *
@@ -98,14 +98,14 @@
 #define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd2
 #define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
 
-/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */
+/* APB1 timers 2-7 will be twice PCLK1 */
 
 #define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM5_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM6_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM7_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 
 /* USB divider -- Divide PLL clock by 1.5 */
 
@@ -115,8 +115,14 @@
  * otherwise frequency is 2xAPBx.
  * Note: TIM1,8 are on APB2, others on APB1 */
 
-#define STM32_TIM18_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_TIM27_FREQUENCY   STM32_HCLK_FREQUENCY
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM3_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM4_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM5_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM6_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM7_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM8_FREQUENCY    STM32_HCLK_FREQUENCY
 
 /* SDIO dividers.  Note that slower clocking is required when DMA is disabled
  * in order to avoid RX overrun/TX underrun errors due to delayed responses
diff --git a/configs/spark/nsh/Make.defs b/configs/spark/nsh/Make.defs
index ba4d14904b043eb37c045c0aa8e5af57378c6a9e..9600e7d11a97690bc6a5bc0d948d82600727791b 100644
--- a/configs/spark/nsh/Make.defs
+++ b/configs/spark/nsh/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/spark/nsh/defconfig b/configs/spark/nsh/defconfig
index a5f8963ab45a19ae015bd6a6204d43f42c61a0a5..a1f4763fa5d12e2edd517e7ef26e135bfa5ddca4 100644
--- a/configs/spark/nsh/defconfig
+++ b/configs/spark/nsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +199,7 @@ CONFIG_ARCH_CHIP_STM32F103CB=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -407,6 +408,12 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_DMACAPABLE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -418,10 +425,18 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
 # CONFIG_USART2_RXDMA is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -527,7 +542,6 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -536,13 +550,12 @@ CONFIG_SPARK_FLASH=y
 CONFIG_SPARK_FLASH_SPI=2
 CONFIG_SPARK_FLASH_MINOR=0
 # CONFIG_SPARK_FLASH_PART is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_USBDEVCTRL is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -554,9 +567,12 @@ CONFIG_LIB_BOARDCTL=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=11
@@ -650,6 +666,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=464
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -669,9 +686,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -687,8 +709,18 @@ CONFIG_ANALOG=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -696,6 +728,7 @@ CONFIG_ANALOG=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -718,6 +751,7 @@ CONFIG_MTD_BYTE_WRITE=y
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
 # CONFIG_MTD_S25FL1 is not set
 # CONFIG_MTD_N25QXXX is not set
@@ -739,10 +773,10 @@ CONFIG_SST25_SECTOR512=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -788,6 +822,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -862,6 +897,8 @@ CONFIG_USBMSC_VERSIONNO=0x399
 CONFIG_USBMSC_SCSI_PRIO=128
 CONFIG_USBMSC_SCSI_STACKSIZE=464
 # CONFIG_USBHOST is not set
+CONFIG_HAVE_USBTRACE=y
+# CONFIG_USBMONITOR is not set
 CONFIG_DRIVERS_WIRELESS=y
 # CONFIG_WL_CC1101 is not set
 CONFIG_WL_CC3000=y
@@ -875,17 +912,22 @@ CONFIG_CC3000_SELECT_STACKSIZE=368
 CONFIG_CC3000_UNSOLICED_STACKSIZE=264
 # CONFIG_CC3000_PROBES is not set
 # CONFIG_WL_NRF24L01 is not set
+# CONFIG_CL_MFRC522 is not set
 # CONFIG_WL_PN532 is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -935,12 +977,6 @@ CONFIG_FS_FATTIME=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -981,7 +1017,7 @@ CONFIG_SYMTAB_ORDEREDBYNAME=y
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
@@ -1007,7 +1043,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=0
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -1016,8 +1051,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1047,17 +1084,16 @@ CONFIG_EXAMPLES_CC3000BASIC=y
 # CONFIG_EXAMPLES_CC3000_STACK_CHECK is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1067,39 +1103,39 @@ CONFIG_EXAMPLES_CC3000BASIC=y
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1119,8 +1155,8 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1186,7 +1222,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1208,6 +1243,7 @@ CONFIG_NSH_DISABLE_UNAME=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1250,13 +1286,15 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_COMPOSITE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1264,10 +1302,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
-# CONFIG_SYSTEM_CDCACM is not set
-# CONFIG_SYSTEM_COMPOSITE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_USBMSC is not set
-# CONFIG_SYSTEM_USBMONITOR is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/spark/src/spark.h b/configs/spark/src/spark.h
index 4eb5ed6a840f4a2d57c2c771d3f46c1690150d3e..0bfd4e3a0566dbdf8cca2e8673d637cb136cf469 100644
--- a/configs/spark/src/spark.h
+++ b/configs/spark/src/spark.h
@@ -45,6 +45,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /************************************************************************************
  * Pre-processor Definitions
diff --git a/configs/spark/src/stm32_appinit.c b/configs/spark/src/stm32_appinit.c
index c91969cd590f415f4d111a19bf194b42593d5cda..1b484caa4893b821f4193a9e90a284b0b87842e4 100644
--- a/configs/spark/src/stm32_appinit.c
+++ b/configs/spark/src/stm32_appinit.c
@@ -54,8 +54,8 @@
 #  include 
 #endif
 
-#ifdef CONFIG_SYSTEM_USBMONITOR
-#  include 
+#ifdef CONFIG_USBMONITOR
+#  include 
 #endif
 
 #ifdef CONFIG_USBDEV
@@ -112,7 +112,7 @@
 
 /* Check if we should enable the USB monitor before starting NSH */
 
-#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_SYSTEM_USBMONITOR)
+#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_USBMONITOR)
 #  undef HAVE_USBMONITOR
 #endif
 
@@ -206,7 +206,7 @@ int board_app_initialize(uintptr_t arg)
     ret = ftl_initialize(CONFIG_SPARK_FLASH_MINOR, mtd);
     if (ret < 0)
       {
-        fdbg("ERROR: Initialize the FTL layer\n");
+        ferr("ERROR: Initialize the FTL layer\n");
         return ret;
       }
 
@@ -227,7 +227,7 @@ int board_app_initialize(uintptr_t arg)
       ret = mount(partname, mntpoint, "vfat", 0, NULL);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to mount the FAT volume: %d\n", errno);
+          ferr("ERROR: Failed to mount the FAT volume: %d\n", errno);
           return ret;
         }
     }
@@ -261,7 +261,7 @@ int board_app_initialize(uintptr_t arg)
           ret = ftl_initialize(partno, mtd_part);
           if (ret < 0)
             {
-              fdbg("ERROR: Initialize the FTL layer\n");
+              ferr("ERROR: Initialize the FTL layer\n");
               return ret;
             }
 
@@ -274,7 +274,7 @@ int board_app_initialize(uintptr_t arg)
           ret = mount(partname, mntpoint, "vfat", 0, NULL);
           if (ret < 0)
             {
-              fdbg("ERROR: Failed to mount the FAT volume: %d\n", errno);
+              ferr("ERROR: Failed to mount the FAT volume: %d\n", errno);
               return ret;
             }
 
@@ -305,7 +305,7 @@ int board_app_initialize(uintptr_t arg)
 
     /* Start the USB Monitor */
 
-    ret = usbmonitor_start(0, NULL);
+    ret = usbmonitor_start();
     if (ret != OK)
       {
         syslog(LOG_ERR, "ERROR: Failed to start USB monitor: %d\n", ret);
diff --git a/configs/spark/src/stm32_autoleds.c b/configs/spark/src/stm32_autoleds.c
index e195ae1b940b81078e53fabb3d0b22bf797d3868..8d72a6678cb04061b14c8fd90adae40c081f610f 100644
--- a/configs/spark/src/stm32_autoleds.c
+++ b/configs/spark/src/stm32_autoleds.c
@@ -59,18 +59,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* The following definitions map the encoded LED setting to bit sets used to
  * manipulate the LEDs. All terms are in true logic, the led polarity is dealt
  * with in the  phy_xxx operations
diff --git a/configs/spark/src/stm32_buttons.c b/configs/spark/src/stm32_buttons.c
index 4f4224146ed3fdbcdea786b8628a5d4c7e95ccf4..e41463d6c9fc4ed3b0b6d92913c8a01a136448e3 100644
--- a/configs/spark/src/stm32_buttons.c
+++ b/configs/spark/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/spark/src/stm32_buttons.c
  *
- *   Copyright (C) 2011-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -49,18 +50,6 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -114,23 +103,23 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   /* The following should be atomic */
 
   if (id == BUTTON_USER)
     {
-      oldhandler = stm32_gpiosetevent(GPIO_BTN, true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(GPIO_BTN, true, true, true, irqhandler, arg);
     }
-  return oldhandler;
+
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/spark/src/stm32_composite.c b/configs/spark/src/stm32_composite.c
index 2720de1af4f5a0b29da616011066c50f94bac04e..2c50a59a1f89c948f4b5c3e299b3ddbbb5f003be 100644
--- a/configs/spark/src/stm32_composite.c
+++ b/configs/spark/src/stm32_composite.c
@@ -54,8 +54,8 @@
 #  include 
 #endif
 
-#ifdef CONFIG_SYSTEM_USBMONITOR
-#  include 
+#ifdef CONFIG_USBMONITOR
+#  include 
 #endif
 
 #ifdef CONFIG_USBDEV
@@ -112,7 +112,7 @@
 
 /* Check if we should enable the USB monitor before starting NSH */
 
-#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_SYSTEM_USBMONITOR)
+#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_USBMONITOR)
 #  undef HAVE_USBMONITOR
 #endif
 
@@ -140,30 +140,30 @@ static int stm32_composite_initialize(void)
 
   /* Get the SPI port */
 
-  fvdbg("Initializing SPI port %d\n", CONFIG_SPARK_FLASH_SPI);
+  finfo("Initializing SPI port %d\n", CONFIG_SPARK_FLASH_SPI);
 
   spi = stm32_spibus_initialize(CONFIG_SPARK_FLASH_SPI);
   if (!spi)
     {
-      fdbg("ERROR: Failed to initialize SPI port %d\n",
+      ferr("ERROR: Failed to initialize SPI port %d\n",
            CONFIG_SPARK_FLASH_SPI);
       return -ENODEV;
     }
 
-  fvdbg("Successfully initialized SPI port %d\n", CONFIG_SPARK_FLASH_SPI);
+  finfo("Successfully initialized SPI port %d\n", CONFIG_SPARK_FLASH_SPI);
 
   /* Now bind the SPI interface to the SST25 SPI FLASH driver */
 
-  fvdbg("Bind SPI to the SPI flash driver\n");
+  finfo("Bind SPI to the SPI flash driver\n");
   mtd = sst25_initialize(spi);
   if (!mtd)
     {
-      fdbg("ERROR: Failed to bind SPI port %d to the SPI FLASH driver\n",
+      ferr("ERROR: Failed to bind SPI port %d to the SPI FLASH driver\n",
            CONFIG_SPARK_FLASH_SPI);
     }
   else
     {
-      fvdbg("Successfully bound SPI port %d to the SPI FLASH driver\n",
+      finfo("Successfully bound SPI port %d to the SPI FLASH driver\n",
             CONFIG_SPARK_FLASH_SPI);
     }
 
@@ -174,7 +174,7 @@ static int stm32_composite_initialize(void)
   ret = ftl_initialize(CONFIG_SPARK_FLASH_MINOR, mtd);
   if (ret < 0)
     {
-      fdbg("ERROR: Initialize the FTL layer\n");
+      ferr("ERROR: Initialize the FTL layer\n");
       return ret;
     }
 
@@ -194,7 +194,7 @@ static int stm32_composite_initialize(void)
   ret = mount(partname, mntpoint, "vfat", 0, NULL);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to mount the FAT volume: %d\n", errno);
+      ferr("ERROR: Failed to mount the FAT volume: %d\n", errno);
       return ret;
     }
 
@@ -228,7 +228,7 @@ static int stm32_composite_initialize(void)
           ret = ftl_initialize(partno, mtd_part);
           if (ret < 0)
             {
-              fdbg("ERROR: Initialize the FTL layer\n");
+              ferr("ERROR: Initialize the FTL layer\n");
               return ret;
             }
 
@@ -241,7 +241,7 @@ static int stm32_composite_initialize(void)
           ret = mount(partname, mntpoint, "vfat", 0, NULL);
           if (ret < 0)
             {
-              fdbg("ERROR: Failed to mount the FAT volume: %d\n", errno);
+              ferr("ERROR: Failed to mount the FAT volume: %d\n", errno);
               return ret;
             }
 
@@ -269,10 +269,10 @@ static int stm32_composite_initialize(void)
 #ifdef HAVE_USBMONITOR
   /* Start the USB Monitor */
 
-  ret = usbmonitor_start(0, NULL);
+  ret = usbmonitor_start();
   if (ret != OK)
     {
-      fdbg("ERROR: Failed to start USB monitor: %d\n", ret);
+      ferr("ERROR: Failed to start USB monitor: %d\n", ret);
     }
 #endif
 
diff --git a/configs/spark/src/stm32_io.c b/configs/spark/src/stm32_io.c
index 404cd4143ae0b3bf6b8b2cc02638ca276dc9b260..b6601c1ac61a69e11c193ed143af756801c6bed1 100644
--- a/configs/spark/src/stm32_io.c
+++ b/configs/spark/src/stm32_io.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/spark/src/stm32_io.c
  *
- *   Copyright (C) 2011-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -175,21 +175,21 @@ void up_write_outputs(int id, bool bits)
  *
  ****************************************************************************/
 
-xcpt_t up_irqio(int id, xcpt_t irqhandler)
+int up_irqio(int id, xcpt_t irqhandler, void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   /* The following should be atomic */
 
   if (id == 0)
     {
-      oldhandler = stm32_gpiosetevent(GPIO_D0, true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(GPIO_D0, true, true, true, irqhandler, arg);
     }
   else if (id == 1)
     {
-      oldhandler = stm32_gpiosetevent(GPIO_D1, true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(GPIO_D1, true, true, true, irqhandler, arg);
     }
 
-  return oldhandler;
+  return ret;
 }
 #endif /* CONFIG_CC3000_PROBES */
diff --git a/configs/spark/src/stm32_spi.c b/configs/spark/src/stm32_spi.c
index 0dd71f1c16742d4381ed70a28bb161442bcd753d..f631052d313883a4251d08bc88982e16318ba1e1 100644
--- a/configs/spark/src/stm32_spi.c
+++ b/configs/spark/src/stm32_spi.c
@@ -59,32 +59,6 @@
 
 #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -144,7 +118,7 @@ void weak_function stm32_spidev_initialize(void)
 #ifdef CONFIG_STM32_SPI1
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -156,7 +130,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI2
 void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
 #if defined(CONFIG_MTD_SST25)
 
@@ -186,7 +160,7 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI3
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
 }
 
diff --git a/configs/spark/src/stm32_usbdev.c b/configs/spark/src/stm32_usbdev.c
index 87af0a3bc787256d21aacafa0f874868ff14ccaf..ef59cef0c65a3213d122caccf743ba4b507a60df 100644
--- a/configs/spark/src/stm32_usbdev.c
+++ b/configs/spark/src/stm32_usbdev.c
@@ -74,7 +74,7 @@
 
 void stm32_usbinitialize(void)
 {
-  ulldbg("called\n");
+  uinfo("called\n");
 
   /* USB Soft Connect Pullup */
 
@@ -113,5 +113,5 @@ int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable)
 
 void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
diff --git a/configs/spark/src/stm32_userleds.c b/configs/spark/src/stm32_userleds.c
index 41641fd7f131704b32acb4882cccbf2af9b6d5ea..30cd9e1f4105e80ecb2e2192d968d03a08eb4746 100644
--- a/configs/spark/src/stm32_userleds.c
+++ b/configs/spark/src/stm32_userleds.c
@@ -54,22 +54,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
diff --git a/configs/spark/src/stm32_wireless.c b/configs/spark/src/stm32_wireless.c
index 912670b9167bc12b4be49a82c9c302bb92c8564e..afd0f9a819da1ef1607a9429925c6197eee0f6d7 100644
--- a/configs/spark/src/stm32_wireless.c
+++ b/configs/spark/src/stm32_wireless.c
@@ -96,6 +96,7 @@ struct stm32_config_s
 {
   struct cc3000_config_s dev;
   xcpt_t handler;
+  void *arg;
 };
 
 /****************************************************************************
@@ -118,7 +119,8 @@ struct stm32_config_s
  *   wl_read_irq        - Return the state of the interrupt GPIO input
  */
 
-static int  wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler);
+static int  wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler,
+                          FAR void *arg);
 static void wl_enable_irq(FAR struct cc3000_config_s *state, bool enable);
 static void wl_clear_irq(FAR struct cc3000_config_s *state);
 static void wl_select(FAR struct cc3000_config_s *state, bool enable);
@@ -157,6 +159,7 @@ static struct stm32_config_s g_cc3000_info =
   .dev.probe            = probe, /* This is used for debugging */
 #endif
   .handler              = NULL,
+  .arg                  = NULL,
 };
 
 /****************************************************************************
@@ -175,13 +178,15 @@ static struct stm32_config_s g_cc3000_info =
  * pendown - Return the state of the pen down GPIO input
  */
 
-static int wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler)
+static int wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler,
+                         FAR void *arg)
 {
   FAR struct stm32_config_s *priv = (FAR struct stm32_config_s *)state;
 
   /* Just save the handler for use when the interrupt is enabled */
 
   priv->handler = handler;
+  priv->arg     = arg;
   return OK;
 }
 
@@ -197,20 +202,22 @@ static void wl_enable_irq(FAR struct cc3000_config_s *state, bool enable)
 
   /* Attach and enable, or detach and disable */
 
-  ivdbg("enable:%d\n", enable);
+  iinfo("enable:%d\n", enable);
   if (enable)
     {
-      (void)stm32_gpiosetevent(GPIO_WIFI_INT, false, true, false, priv->handler);
+      (void)stm32_gpiosetevent(GPIO_WIFI_INT, false, true, false,
+                               priv->handler, priv->arg);
     }
   else
     {
-      (void)stm32_gpiosetevent(GPIO_WIFI_INT, false, false, false, NULL);
+      (void)stm32_gpiosetevent(GPIO_WIFI_INT, false, false, false,
+                               NULL, NULL);
     }
 }
 
 static void wl_enable_power(FAR struct cc3000_config_s *state, bool enable)
 {
-  ivdbg("enable:%d\n", enable);
+  iinfo("enable:%d\n", enable);
 
   /* Active high enable */
 
@@ -219,7 +226,7 @@ static void wl_enable_power(FAR struct cc3000_config_s *state, bool enable)
 
 static void wl_select(FAR struct cc3000_config_s *state, bool enable)
 {
-  ivdbg("enable:%d\n", enable);
+  iinfo("enable:%d\n", enable);
 
   /* Active high enable */
 
@@ -281,7 +288,7 @@ int wireless_archinitialize(size_t max_rx_size)
 
   /* Init SPI bus */
 
-  idbg("minor %d\n", minor);
+  iinfo("minor %d\n", minor);
   DEBUGASSERT(CONFIG_CC3000_DEVMINOR == 0);
 
 #ifdef CONFIG_CC3000_PROBES
@@ -296,7 +303,7 @@ int wireless_archinitialize(size_t max_rx_size)
   spi = stm32_spibus_initialize(CONFIG_CC3000_SPIDEV);
   if (!spi)
     {
-      idbg("Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV);
+      ierr("ERROR: Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV);
       return -ENODEV;
     }
 
@@ -305,7 +312,7 @@ int wireless_archinitialize(size_t max_rx_size)
   int ret = cc3000_register(spi, &g_cc3000_info.dev, CONFIG_CC3000_DEVMINOR);
   if (ret < 0)
     {
-      idbg("Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV);
+      ierr("ERROR: Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV);
       return -ENODEV;
     }
 
diff --git a/configs/spark/usbmsc/Make.defs b/configs/spark/usbmsc/Make.defs
index 423f70ada7139885d506489b338f42859da997e0..64e116c29f3986949c8f58c46c8f34dc46d00856 100644
--- a/configs/spark/usbmsc/Make.defs
+++ b/configs/spark/usbmsc/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/spark/usbmsc/defconfig b/configs/spark/usbmsc/defconfig
index ae97bcd86c8bb329c653b48efa59b7860a3c0887..e75dd29766c7036fa7ffe4d4463de45604ad1c14 100644
--- a/configs/spark/usbmsc/defconfig
+++ b/configs/spark/usbmsc/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +199,7 @@ CONFIG_ARCH_CHIP_STM32F103CB=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -407,6 +408,12 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_DMACAPABLE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -418,10 +425,18 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
 # CONFIG_USART2_RXDMA is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -527,7 +542,6 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -536,13 +550,12 @@ CONFIG_SPARK_FLASH=y
 CONFIG_SPARK_FLASH_SPI=2
 CONFIG_SPARK_FLASH_MINOR=0
 # CONFIG_SPARK_FLASH_PART is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -554,9 +567,12 @@ CONFIG_BOARDCTL_USBDEVCTRL=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=11
@@ -650,6 +666,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=340
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -669,9 +686,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -687,8 +709,18 @@ CONFIG_ANALOG=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -696,6 +728,7 @@ CONFIG_ANALOG=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -718,6 +751,7 @@ CONFIG_MTD_BYTE_WRITE=y
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
 # CONFIG_MTD_S25FL1 is not set
 # CONFIG_MTD_N25QXXX is not set
@@ -739,9 +773,10 @@ CONFIG_SST25_SECTOR512=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -787,6 +822,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -826,6 +862,8 @@ CONFIG_USBMSC_VERSIONNO=0x399
 CONFIG_USBMSC_SCSI_PRIO=128
 CONFIG_USBMSC_SCSI_STACKSIZE=340
 # CONFIG_USBHOST is not set
+CONFIG_HAVE_USBTRACE=y
+# CONFIG_USBMONITOR is not set
 CONFIG_DRIVERS_WIRELESS=y
 # CONFIG_WL_CC1101 is not set
 CONFIG_WL_CC3000=y
@@ -839,17 +877,22 @@ CONFIG_CC3000_SELECT_STACKSIZE=390
 CONFIG_CC3000_UNSOLICED_STACKSIZE=264
 # CONFIG_CC3000_PROBES is not set
 # CONFIG_WL_NRF24L01 is not set
+# CONFIG_CL_MFRC522 is not set
 # CONFIG_WL_PN532 is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -899,12 +942,6 @@ CONFIG_FS_FATTIME=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -945,7 +982,7 @@ CONFIG_SYMTAB_ORDEREDBYNAME=y
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
@@ -971,7 +1008,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=0
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -980,8 +1016,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1011,17 +1049,16 @@ CONFIG_EXAMPLES_CC3000BASIC=y
 # CONFIG_EXAMPLES_CC3000_STACK_CHECK is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1031,39 +1068,39 @@ CONFIG_EXAMPLES_CC3000BASIC=y
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1083,8 +1120,8 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1150,7 +1187,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1172,6 +1208,7 @@ CONFIG_NSH_DISABLE_UNAME=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1213,13 +1250,13 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1227,7 +1264,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
 CONFIG_SYSTEM_USBMSC=y
 CONFIG_SYSTEM_USBMSC_NLUNS=1
@@ -1240,5 +1276,5 @@ CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2"
 # CONFIG_SYSTEM_USBMSC_DEBUGMM is not set
 CONFIG_SYSTEM_USBMSC_CMD_STACKSIZE=768
 CONFIG_SYSTEM_USBMSC_CMD_PRIORITY=100
-# CONFIG_SYSTEM_USBMONITOR is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/spark/usbnsh/Make.defs b/configs/spark/usbnsh/Make.defs
index 8820947ef8f3f037a12cccad2b637aef02e0eb92..a52241bf0c36b270c0358f6a4a7662413bbcbb13 100644
--- a/configs/spark/usbnsh/Make.defs
+++ b/configs/spark/usbnsh/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/spark/usbnsh/defconfig b/configs/spark/usbnsh/defconfig
index 5c7f49052dc1ceba0b08488dfee51cde4151a2cd..d13857bfd9299cef07b0810cf1a157d18c810024 100644
--- a/configs/spark/usbnsh/defconfig
+++ b/configs/spark/usbnsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +199,7 @@ CONFIG_ARCH_CHIP_STM32F103CB=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -407,6 +408,12 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_DMACAPABLE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -418,10 +425,18 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
 # CONFIG_USART2_RXDMA is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -526,7 +541,6 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -535,13 +549,12 @@ CONFIG_SPARK_FLASH=y
 CONFIG_SPARK_FLASH_SPI=2
 CONFIG_SPARK_FLASH_MINOR=0
 # CONFIG_SPARK_FLASH_PART is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -553,9 +566,12 @@ CONFIG_BOARDCTL_USBDEVCTRL=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=10
@@ -653,6 +669,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=1024
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -672,9 +689,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -688,8 +710,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -697,6 +729,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -719,6 +752,7 @@ CONFIG_MTD_BYTE_WRITE=y
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
 # CONFIG_MTD_S25FL1 is not set
 # CONFIG_MTD_N25QXXX is not set
@@ -740,9 +774,9 @@ CONFIG_SST25_SPIFREQUENCY=20000000
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_SERIAL_REMOVABLE=y
+# CONFIG_SERIAL_CONSOLE is not set
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -788,6 +822,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -832,16 +867,22 @@ CONFIG_CDCACM_VENDORSTR="NuttX"
 CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+CONFIG_HAVE_USBTRACE=y
+# CONFIG_USBMONITOR is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_NONE=y
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -885,12 +926,6 @@ CONFIG_FS_FAT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -957,7 +992,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -966,8 +1000,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -993,17 +1029,16 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1012,39 +1047,39 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1064,8 +1099,8 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1131,7 +1166,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1153,6 +1187,7 @@ CONFIG_NSH_DISABLE_UNAME=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1196,13 +1231,14 @@ CONFIG_USBDEV_MINOR=0
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1210,8 +1246,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
-# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
-# CONFIG_SYSTEM_USBMONITOR is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/spark/usbserial/Make.defs b/configs/spark/usbserial/Make.defs
index 317945bc3a0719e29e81d1fe58af6ce40e498323..9cfb9024e5a073a8e83c722e03fe03c08ad5649f 100644
--- a/configs/spark/usbserial/Make.defs
+++ b/configs/spark/usbserial/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/spark/usbserial/defconfig b/configs/spark/usbserial/defconfig
index aba09edc98589c18e80163cab5188294055b6372..303fa1a49cba3b36d2e8a60f69dc949cd2fdc286 100644
--- a/configs/spark/usbserial/defconfig
+++ b/configs/spark/usbserial/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +199,7 @@ CONFIG_ARCH_CHIP_STM32F103CB=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -407,6 +408,12 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_DMACAPABLE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -418,10 +425,18 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
 # CONFIG_USART2_RXDMA is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -535,13 +550,12 @@ CONFIG_SPARK_FLASH=y
 CONFIG_SPARK_FLASH_SPI=2
 CONFIG_SPARK_FLASH_MINOR=0
 # CONFIG_SPARK_FLASH_PART is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -558,9 +572,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=11
@@ -654,6 +671,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=340
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -673,9 +691,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -691,8 +714,18 @@ CONFIG_ANALOG=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -700,6 +733,7 @@ CONFIG_ANALOG=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -722,6 +756,7 @@ CONFIG_MTD_BYTE_WRITE=y
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
 # CONFIG_MTD_S25FL1 is not set
 # CONFIG_MTD_N25QXXX is not set
@@ -743,10 +778,10 @@ CONFIG_SST25_SECTOR512=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -792,6 +827,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -836,6 +872,8 @@ CONFIG_CDCACM_VENDORSTR="NuttX"
 CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+CONFIG_HAVE_USBTRACE=y
+# CONFIG_USBMONITOR is not set
 CONFIG_DRIVERS_WIRELESS=y
 # CONFIG_WL_CC1101 is not set
 CONFIG_WL_CC3000=y
@@ -849,17 +887,22 @@ CONFIG_CC3000_SELECT_STACKSIZE=390
 CONFIG_CC3000_UNSOLICED_STACKSIZE=264
 CONFIG_CC3000_PROBES=y
 # CONFIG_WL_NRF24L01 is not set
+# CONFIG_CL_MFRC522 is not set
 # CONFIG_WL_PN532 is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -909,12 +952,6 @@ CONFIG_FS_FATTIME=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -955,7 +992,7 @@ CONFIG_SYMTAB_ORDEREDBYNAME=y
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
@@ -981,7 +1018,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=0
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -990,8 +1026,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1021,17 +1059,16 @@ CONFIG_EXAMPLES_CC3000BASIC=y
 # CONFIG_EXAMPLES_CC3000_STACK_CHECK is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1041,20 +1078,18 @@ CONFIG_EXAMPLES_CC3000BASIC=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1066,7 +1101,6 @@ CONFIG_EXAMPLES_CC3000BASIC=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 CONFIG_EXAMPLES_USBSERIAL=y
 CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
 CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=y
@@ -1076,10 +1110,12 @@ CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER=y
 CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=y
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1099,8 +1135,8 @@ CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1133,18 +1169,17 @@ CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
-# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
-# CONFIG_SYSTEM_USBMONITOR is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3210e-eval/README.txt b/configs/stm3210e-eval/README.txt
index a83f40875303205cf55ef56bb2f1396847a18f8f..62b78a4a9adf2e11c5bd71c8a4df5bb60d3feea5 100644
--- a/configs/stm3210e-eval/README.txt
+++ b/configs/stm3210e-eval/README.txt
@@ -365,7 +365,7 @@ Temperature Sensor
 
   More complex temperature sensor operations are also available.  See the
   IOCTL commands enumerated in include/nuttx/sensors/lm75.h.  Also read the 
-  escriptions of the stm32_lm75initialize() and stm32_lm75attach()
+  descriptions of the stm32_lm75initialize() and stm32_lm75attach()
   interfaces in the arch/board/board.h file (sames as
   configs/stm3210e-eval/include/board.h).
 
@@ -635,10 +635,10 @@ STM3210E-EVAL-specific Configuration Options
 
     CONFIG_SDIO_DMA - Support DMA data transfers.  Requires CONFIG_STM32_SDIO
       and CONFIG_STM32_DMA2.
-    CONFIG_SDIO_PRI - Select SDIO interrupt prority.  Default: 128
-    CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
+    CONFIG_STM32_SDIO_PRI - Select SDIO interrupt prority.  Default: 128
+    CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
       Default:  Medium
-    CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode.  Default:
+    CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode.  Default:
       4-bit transfer mode.
 
   STM3210E-EVAL CAN Configuration
@@ -657,7 +657,7 @@ STM3210E-EVAL-specific Configuration Options
     CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
     CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
     CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
-    CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+    CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
       dump of all CAN registers.
 
   STM3210E-EVAL LCD Hardware Configuration
@@ -705,14 +705,6 @@ can be selected as follow:
 
 Where  is one of the following:
 
-  buttons:
-  --------
-
-    Uses apps/examples/buttons to exercise STM3210E-EVAL buttons and
-    button interrupts.
-
-    CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y  : CodeSourcery under Windows
-
   composite
   ---------
 
@@ -1064,11 +1056,11 @@ Where  is one of the following:
     USB debug output can be enabled as by changing the following
     settings in the configuration file:
 
-      -CONFIG_DEBUG=n
-      -CONFIG_DEBUG_VERBOSE=n
+      -CONFIG_DEBUG_FEATURES=n
+      -CONFIG_DEBUG_INFO=n
       -CONFIG_DEBUG_USB=n
-      +CONFIG_DEBUG=y
-      +CONFIG_DEBUG_VERBOSE=y
+      +CONFIG_DEBUG_FEATURES=y
+      +CONFIG_DEBUG_INFO=y
       +CONFIG_DEBUG_USB=y
 
       -CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=n
diff --git a/configs/stm3210e-eval/buttons/setenv.sh b/configs/stm3210e-eval/buttons/setenv.sh
deleted file mode 100755
index 2bdf5367426a09a0164591203cc9bb7cd50197f1..0000000000000000000000000000000000000000
--- a/configs/stm3210e-eval/buttons/setenv.sh
+++ /dev/null
@@ -1,47 +0,0 @@
-#!/bin/bash
-# configs/stm3210e-eval/buttons/setenv.sh
-#
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
-#   Author: Gregory Nutt 
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name NuttX nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-
-if [ "$(basename $0)" = "setenv.sh" ] ; then
-  echo "You must source this script, not run it!" 1>&2
-  exit 1
-fi
-
-if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi
-
-WD=`pwd`
-export RIDE_BIN="/cygdrive/c/Program Files/Raisonance/Ride/arm-gcc/bin"
-export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
-export PATH="${BUILDROOT_BIN}:${RIDE_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
-
-echo "PATH : ${PATH}"
diff --git a/configs/stm3210e-eval/composite/Make.defs b/configs/stm3210e-eval/composite/Make.defs
index 599b5d021a8afe0de7d3d26a1dd10b532d328322..17c4fec622db499fc4d8fc913876d2b7a17531f5 100644
--- a/configs/stm3210e-eval/composite/Make.defs
+++ b/configs/stm3210e-eval/composite/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3210e-eval/composite/defconfig b/configs/stm3210e-eval/composite/defconfig
index d4664da4222b57470d7db55f51fb7008fc3c2901..8e3a48b02b90f520417d5f642174086c0b852dd4 100644
--- a/configs/stm3210e-eval/composite/defconfig
+++ b/configs/stm3210e-eval/composite/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +67,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +82,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -107,7 +112,9 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -153,8 +160,6 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # STM32 Configuration Options
@@ -209,6 +214,7 @@ CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 CONFIG_ARCH_CHIP_STM32F103ZE=y
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -356,6 +362,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 CONFIG_STM32_HAVE_DAC1=y
@@ -421,6 +433,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_DMACAPABLE is not set
 # CONFIG_STM32_FSMC_SRAM is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -432,12 +450,20 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -446,7 +472,9 @@ CONFIG_STM32_USART2_SERIALDRIVER=y
 #
 # SDIO Configuration
 #
-CONFIG_SDIO_DMAPRIO=0x00001000
+CONFIG_STM32_SDIO_DMA=y
+CONFIG_STM32_SDIO_DMAPRIO=0x00001000
+# CONFIG_STM32_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_STM32_HAVE_RTC_COUNTER=y
 # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
 
@@ -548,13 +576,12 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # STM3210E-EVAL LCD Hardware Configuration
 #
 # CONFIG_STM3210E_LCD is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -571,9 +598,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=11
@@ -586,6 +616,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -602,6 +633,8 @@ CONFIG_MAX_TASKS=16
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -671,6 +704,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -686,12 +720,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -699,8 +737,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -708,6 +756,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -715,11 +764,13 @@ CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_MMCSUPPORT is not set
 # CONFIG_MMCSD_HAVECARDDETECT is not set
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y
 CONFIG_MMCSD_SDIO=y
 CONFIG_SDIO_PREFLIGHT=y
 # CONFIG_SDIO_MUXBUS is not set
 # CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 # CONFIG_SDIO_BLOCKSETUP is not set
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -742,7 +793,9 @@ CONFIG_MTD=y
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
 # CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
@@ -757,10 +810,10 @@ CONFIG_MTD=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -820,6 +873,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -892,17 +946,23 @@ CONFIG_USBMSC_REMOVABLE=y
 CONFIG_USBMSC_SCSI_PRIO=128
 CONFIG_USBMSC_SCSI_STACKSIZE=2048
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -939,12 +999,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -989,11 +1043,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1011,17 +1082,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1040,19 +1116,20 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1061,20 +1138,18 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1086,14 +1161,15 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1113,8 +1189,9 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1147,18 +1224,8 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
-# CONFIG_SYSTEM_CLE is not set
-# CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_SYSTEM_HEXED is not set
-# CONFIG_SYSTEM_RAMTEST is not set
-# CONFIG_READLINE_HAVE_EXTMATCH is not set
-# CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_CDCACM is not set
+# CONFIG_SYSTEM_CLE is not set
 CONFIG_SYSTEM_COMPOSITE=y
 CONFIG_SYSTEM_COMPOSITE_NLUNS=1
 CONFIG_SYSTEM_COMPOSITE_DEVMINOR1=0
@@ -1171,6 +1238,17 @@ CONFIG_SYSTEM_COMPOSITE_TTYUSB=0
 CONFIG_SYSTEM_COMPOSITE_SERDEV="/dev/ttyACM0"
 CONFIG_SYSTEM_COMPOSITE_BUFSIZE=256
 # CONFIG_SYSTEM_COMPOSITE_DEBUGMM is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
+# CONFIG_SYSTEM_READLINE is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_USBMSC is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3210e-eval/include/board.h b/configs/stm3210e-eval/include/board.h
index 462d07ca538fac38da175313e1d2a870d94b2b69..d5f9c13f3811498a4d2783231f1b23ce9028afda 100644
--- a/configs/stm3210e-eval/include/board.h
+++ b/configs/stm3210e-eval/include/board.h
@@ -1,8 +1,7 @@
 /************************************************************************************
  * configs/stm3210e-eval/include/board.h
- * include/arch/board/board.h
  *
- *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -94,14 +93,14 @@
 #define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd2
 #define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
 
-/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */
+/* APB1 timers 2-7 will be twice PCLK1 */
 
 #define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM5_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM6_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM7_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 
 /* USB divider -- Divide PLL clock by 1.5 */
 
@@ -111,8 +110,14 @@
  * otherwise frequency is 2xAPBx.
  * Note: TIM1,8 are on APB2, others on APB1 */
 
-#define STM32_TIM18_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_TIM27_FREQUENCY   STM32_HCLK_FREQUENCY
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM3_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM4_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM5_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM6_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM7_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM8_FREQUENCY    STM32_HCLK_FREQUENCY
 
 /* SDIO dividers.  Note that slower clocking is required when DMA is disabled
  * in order to avoid RX overrun/TX underrun errors due to delayed responses
@@ -284,14 +289,15 @@ int stm32_lm75initialize(FAR const char *devpath);
  *
  * Input parameters:
  *   irqhandler - the LM-75 interrupt handler
+ *   arg        - The argument that will accompany the interrupt
  *
  * Returned Value:
- *   The previous LM-75 interrupt handler
+ *   Zero (OK) returned on success; a negated errno value is returned on failure.
  *
  ************************************************************************************/
 
 #if defined(CONFIG_I2C) && defined(CONFIG_I2C_LM75) && defined(CONFIG_STM32_I2C1)
-xcpt_t stm32_lm75attach(xcpt_t irqhandler);
+int stm32_lm75attach(xcpt_t irqhandler, void *arg);
 #endif
 
 #undef EXTERN
diff --git a/configs/stm3210e-eval/nsh/Make.defs b/configs/stm3210e-eval/nsh/Make.defs
index 34750c07481a23a1aca2c77e025fff626841a7d4..b94472a6e66688b554e029a75dba8cb12c53872c 100644
--- a/configs/stm3210e-eval/nsh/Make.defs
+++ b/configs/stm3210e-eval/nsh/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3210e-eval/nsh/defconfig b/configs/stm3210e-eval/nsh/defconfig
index bc1df0013a4a2fbbaf73cb165b24fb2aedb56d5f..d233f7dc33f7e39c9400d0e486d2f4c02b195b5f 100644
--- a/configs/stm3210e-eval/nsh/defconfig
+++ b/configs/stm3210e-eval/nsh/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +67,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +82,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -107,7 +112,9 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -154,8 +161,6 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # STM32 Configuration Options
@@ -210,6 +215,7 @@ CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 CONFIG_ARCH_CHIP_STM32F103ZE=y
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -357,6 +363,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 CONFIG_STM32_HAVE_DAC1=y
@@ -422,6 +434,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_DMACAPABLE is not set
 # CONFIG_STM32_FSMC_SRAM is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -433,12 +451,20 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -447,7 +473,9 @@ CONFIG_STM32_USART2_SERIALDRIVER=y
 #
 # SDIO Configuration
 #
-CONFIG_SDIO_DMAPRIO=0x00001000
+CONFIG_STM32_SDIO_DMA=y
+CONFIG_STM32_SDIO_DMAPRIO=0x00001000
+# CONFIG_STM32_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_STM32_HAVE_RTC_COUNTER=y
 # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
 
@@ -540,8 +568,6 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
@@ -551,13 +577,12 @@ CONFIG_NSH_MMCSDSLOTNO=0
 # STM3210E-EVAL LCD Hardware Configuration
 #
 # CONFIG_STM3210E_LCD is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_USBDEVCTRL is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -574,9 +599,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=9
@@ -589,6 +617,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -605,6 +634,8 @@ CONFIG_MAX_TASKS=16
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -674,6 +705,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -689,12 +721,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -702,8 +738,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -711,6 +757,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -718,11 +765,13 @@ CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_MMCSUPPORT is not set
 # CONFIG_MMCSD_HAVECARDDETECT is not set
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y
 CONFIG_MMCSD_SDIO=y
 CONFIG_SDIO_PREFLIGHT=y
 # CONFIG_SDIO_MUXBUS is not set
 # CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 # CONFIG_SDIO_BLOCKSETUP is not set
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -745,7 +794,9 @@ CONFIG_MTD=y
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
 # CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
@@ -760,9 +811,10 @@ CONFIG_MTD=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -822,6 +874,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -844,17 +897,23 @@ CONFIG_USBDEV_MAXPOWER=100
 # CONFIG_CDCACM is not set
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -897,12 +956,6 @@ CONFIG_FAT_LCNAMES=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -947,11 +1000,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -969,17 +1039,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -998,19 +1073,20 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1019,20 +1095,18 @@ CONFIG_ARCH_HAVE_TLS=y
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1044,14 +1118,15 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1071,8 +1146,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1137,12 +1213,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1159,11 +1235,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_FILEIOSIZE=512
@@ -1196,12 +1275,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1209,6 +1288,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3210e-eval/nsh2/Make.defs b/configs/stm3210e-eval/nsh2/Make.defs
index 7ee439bba42fad3ee2c9658a2c5bd70561139048..abbcfdfb1fc2a9c3e58e069fd641a7c12ac4c2d3 100644
--- a/configs/stm3210e-eval/nsh2/Make.defs
+++ b/configs/stm3210e-eval/nsh2/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3210e-eval/nsh2/defconfig b/configs/stm3210e-eval/nsh2/defconfig
index c22258756197a7efc6580d15f932f740e9ffda4e..74add5e197060faf4b673b1c2afa73cbd9fe04b8 100644
--- a/configs/stm3210e-eval/nsh2/defconfig
+++ b/configs/stm3210e-eval/nsh2/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +67,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +82,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -107,7 +112,9 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -153,8 +160,6 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # STM32 Configuration Options
@@ -209,6 +214,7 @@ CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 CONFIG_ARCH_CHIP_STM32F103ZE=y
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -356,6 +362,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 CONFIG_STM32_HAVE_DAC1=y
@@ -423,6 +435,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_DMACAPABLE is not set
 # CONFIG_STM32_FSMC_SRAM is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -434,12 +452,20 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -458,7 +484,9 @@ CONFIG_STM32_I2CTIMEOTICKS=500
 #
 # SDIO Configuration
 #
-CONFIG_SDIO_DMAPRIO=0x00001000
+CONFIG_STM32_SDIO_DMA=y
+CONFIG_STM32_SDIO_DMAPRIO=0x00001000
+# CONFIG_STM32_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_STM32_HAVE_RTC_COUNTER=y
 # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
 
@@ -551,8 +579,6 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
@@ -567,13 +593,12 @@ CONFIG_STM3210E_LCD_RDSHIFT=5
 # CONFIG_STM3210E_AM240320_DISABLE is not set
 # CONFIG_STM3210E_SPFD5408B_DISABLE is not set
 CONFIG_STM3210E_R61580_DISABLE=y
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -590,9 +615,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=7
@@ -605,6 +633,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -621,6 +650,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -690,6 +721,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -710,12 +742,16 @@ CONFIG_I2C_POLLED=y
 # CONFIG_I2C_TRACE is not set
 CONFIG_I2C_DRIVER=y
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_TIMERS_CS2100CP is not set
@@ -724,11 +760,20 @@ CONFIG_I2C_DRIVER=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 CONFIG_LCD_NOGETRUN=y
@@ -742,6 +787,7 @@ CONFIG_LCD_MAXPOWER=1
 # CONFIG_LCD_NOKIA6100 is not set
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 # CONFIG_LCD_SSD1351 is not set
@@ -756,12 +802,7 @@ CONFIG_LCD_RPORTRAIT=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
-# CONFIG_LCD_BACKPACK is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -769,6 +810,7 @@ CONFIG_LCD_RPORTRAIT=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -776,11 +818,13 @@ CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_MMCSUPPORT is not set
 # CONFIG_MMCSD_HAVECARDDETECT is not set
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y
 CONFIG_MMCSD_SDIO=y
 CONFIG_SDIO_PREFLIGHT=y
 # CONFIG_SDIO_MUXBUS is not set
 # CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 # CONFIG_SDIO_BLOCKSETUP is not set
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -803,7 +847,9 @@ CONFIG_MTD=y
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
 # CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
@@ -818,9 +864,10 @@ CONFIG_MTD=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -880,6 +927,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -917,17 +965,23 @@ CONFIG_USBMSC_REMOVABLE=y
 CONFIG_USBMSC_SCSI_PRIO=128
 CONFIG_USBMSC_SCSI_STACKSIZE=2048
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -972,12 +1026,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1065,6 +1113,7 @@ CONFIG_NXFONT_SANS28X37B=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 # CONFIG_NXTERM is not set
 
 #
@@ -1111,11 +1160,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1133,17 +1199,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1167,19 +1238,20 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -1203,7 +1275,6 @@ CONFIG_EXAMPLES_NX_BPP=16
 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set
 CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 # CONFIG_EXAMPLES_NX_EXTERNINIT is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 CONFIG_EXAMPLES_NXHELLO=y
 CONFIG_EXAMPLES_NXHELLO_VPLANE=0
@@ -1225,34 +1296,35 @@ CONFIG_EXAMPLES_NXHELLO_FONTID=6
 # CONFIG_EXAMPLES_NXHELLO_EXTERNINIT is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1272,8 +1344,9 @@ CONFIG_EXAMPLES_NXHELLO_FONTID=6
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1339,12 +1412,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1361,11 +1434,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_FILEIOSIZE=512
@@ -1398,12 +1474,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=1
 CONFIG_I2CTOOL_MAXBUS=2
@@ -1411,7 +1487,7 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=100000
-# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1419,7 +1495,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
 CONFIG_SYSTEM_USBMSC=y
 CONFIG_SYSTEM_USBMSC_NLUNS=1
@@ -1432,4 +1509,5 @@ CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2"
 # CONFIG_SYSTEM_USBMSC_DEBUGMM is not set
 CONFIG_SYSTEM_USBMSC_CMD_STACKSIZE=768
 CONFIG_SYSTEM_USBMSC_CMD_PRIORITY=100
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3210e-eval/nx/Make.defs b/configs/stm3210e-eval/nx/Make.defs
index 2cea907920bde922968adc7474394244c3906869..acf41aac4c93c1e9a31ead0896b7deb512b62fde 100644
--- a/configs/stm3210e-eval/nx/Make.defs
+++ b/configs/stm3210e-eval/nx/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3210e-eval/nx/defconfig b/configs/stm3210e-eval/nx/defconfig
index 2554b724aacdd853eaf2e058e92893be3ece8965..928a13da078107ed54cc7dfc03bef23ec05887ab 100644
--- a/configs/stm3210e-eval/nx/defconfig
+++ b/configs/stm3210e-eval/nx/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +67,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +82,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -207,6 +212,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 CONFIG_ARCH_CHIP_STM32F103ZE=y
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -354,6 +360,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 CONFIG_STM32_HAVE_DAC1=y
@@ -421,6 +433,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_DMACAPABLE is not set
 # CONFIG_STM32_FSMC_SRAM is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -432,12 +450,20 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -558,6 +584,7 @@ CONFIG_STM3210E_LCD_RDSHIFT=5
 # CONFIG_STM3210E_AM240320_DISABLE is not set
 # CONFIG_STM3210E_SPFD5408B_DISABLE is not set
 CONFIG_STM3210E_R61580_DISABLE=y
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -573,9 +600,12 @@ CONFIG_DISABLE_ENVIRON=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=7
@@ -588,6 +618,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -604,6 +635,8 @@ CONFIG_MAX_TASKS=16
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -673,6 +706,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -688,12 +722,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -701,11 +739,20 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 CONFIG_LCD_NOGETRUN=y
@@ -719,6 +766,7 @@ CONFIG_LCD_MAXPOWER=1
 # CONFIG_LCD_NOKIA6100 is not set
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 # CONFIG_LCD_SSD1351 is not set
@@ -733,11 +781,7 @@ CONFIG_LCD_RPORTRAIT=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -745,6 +789,7 @@ CONFIG_LCD_RPORTRAIT=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -753,9 +798,10 @@ CONFIG_LCD_RPORTRAIT=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -814,6 +860,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -836,17 +883,23 @@ CONFIG_USBDEV_MAXPOWER=100
 # CONFIG_CDCACM is not set
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -877,12 +930,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -970,6 +1017,7 @@ CONFIG_NXFONT_SANS23X27=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 # CONFIG_NXTERM is not set
 
 #
@@ -1019,6 +1067,8 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1033,16 +1083,19 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1061,18 +1114,19 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -1095,20 +1149,18 @@ CONFIG_EXAMPLES_NX_FONTID=0
 CONFIG_EXAMPLES_NX_BPP=16
 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set
 CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1120,9 +1172,9 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1144,8 +1196,9 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1178,16 +1231,17 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3210e-eval/nxterm/Make.defs b/configs/stm3210e-eval/nxterm/Make.defs
index ef8c9bc3802080cb9f26676d464a4ad990752f07..7d3044aa5638797d1cbe289d7d5d8a59125a5e7f 100644
--- a/configs/stm3210e-eval/nxterm/Make.defs
+++ b/configs/stm3210e-eval/nxterm/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3210e-eval/nxterm/defconfig b/configs/stm3210e-eval/nxterm/defconfig
index 4a19b0a255cfebb43bd0550bdc46c99ae920b47d..25dccb496de953b1f160f497595899ecff8f1287 100644
--- a/configs/stm3210e-eval/nxterm/defconfig
+++ b/configs/stm3210e-eval/nxterm/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +67,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +82,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -207,6 +212,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 CONFIG_ARCH_CHIP_STM32F103ZE=y
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -354,6 +360,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 CONFIG_STM32_HAVE_DAC1=y
@@ -419,6 +431,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_DMACAPABLE is not set
 # CONFIG_STM32_FSMC_SRAM is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -430,12 +448,20 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -532,7 +558,6 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -547,12 +572,11 @@ CONFIG_STM3210E_LCD_RDSHIFT=5
 # CONFIG_STM3210E_AM240320_DISABLE is not set
 # CONFIG_STM3210E_SPFD5408B_DISABLE is not set
 CONFIG_STM3210E_R61580_DISABLE=y
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -569,9 +593,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2012
 CONFIG_START_MONTH=3
@@ -584,6 +611,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -600,6 +628,8 @@ CONFIG_MAX_TASKS=16
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -641,7 +671,7 @@ CONFIG_SIG_SIGWORK=17
 # POSIX Message Queue Options
 #
 CONFIG_PREALLOC_MQ_MSGS=8
-CONFIG_MQ_MAXMSGSIZE=32
+CONFIG_MQ_MAXMSGSIZE=64
 # CONFIG_MODULE is not set
 
 #
@@ -669,6 +699,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -684,12 +715,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -697,11 +732,20 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 CONFIG_LCD_NOGETRUN=y
@@ -715,6 +759,7 @@ CONFIG_LCD_MAXPOWER=1
 # CONFIG_LCD_NOKIA6100 is not set
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 # CONFIG_LCD_SSD1351 is not set
@@ -729,11 +774,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -741,6 +782,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -749,9 +791,10 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -811,19 +854,26 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -861,12 +911,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -954,13 +998,14 @@ CONFIG_NXFONT_SANS23X27=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 CONFIG_NXTERM=y
 
 #
 # NxTerm Output Text/Graphics Options
 #
 CONFIG_NXTERM_BPP=16
-CONFIG_NXTERM_CURSORCHAR=137
+CONFIG_NXTERM_CURSORCHAR=95
 CONFIG_NXTERM_MXCHARS=256
 CONFIG_NXTERM_CACHESIZE=32
 CONFIG_NXTERM_LINESEPARATION=0
@@ -980,7 +1025,10 @@ CONFIG_NX_MULTIUSER=y
 CONFIG_NX_BLOCKING=y
 CONFIG_NX_MXSERVERMSGS=32
 CONFIG_NX_MXCLIENTMSGS=16
-# CONFIG_NX_NXSTART is not set
+# CONFIG_NXSTART_EXTERNINIT is not set
+CONFIG_NXSTART_SERVERPRIO=110
+CONFIG_NXSTART_SERVERSTACK=2048
+CONFIG_NXSTART_DEVNO=0
 
 #
 # Memory Management
@@ -1026,6 +1074,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1041,16 +1091,19 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1074,18 +1127,19 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -1095,35 +1149,34 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-CONFIG_EXAMPLES_NXTERM=y
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+CONFIG_EXAMPLES_NXTERM=y
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1145,8 +1198,9 @@ CONFIG_EXAMPLES_NXTERM=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1211,12 +1265,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1233,11 +1287,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
 CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_FILEIOSIZE=512
@@ -1270,12 +1326,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1283,6 +1339,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3210e-eval/pm/Make.defs b/configs/stm3210e-eval/pm/Make.defs
index a4da9f3a8a761286dafb1785d6e2bcf64664663c..76a1e828f5938ca74d754c7adbdedda447a786e5 100644
--- a/configs/stm3210e-eval/pm/Make.defs
+++ b/configs/stm3210e-eval/pm/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3210e-eval/pm/defconfig b/configs/stm3210e-eval/pm/defconfig
index 4acbe0d3a7e82a161e8210346a7277c03e8b1b17..c7f0d9ed5987080b6394db843bfdcf9f8917437d 100644
--- a/configs/stm3210e-eval/pm/defconfig
+++ b/configs/stm3210e-eval/pm/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +67,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +82,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -207,6 +212,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 CONFIG_ARCH_CHIP_STM32F103ZE=y
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -354,6 +360,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 CONFIG_STM32_HAVE_DAC1=y
@@ -421,6 +433,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_FSMC_SRAM is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_PWM is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -433,12 +451,20 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -540,7 +566,6 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -567,12 +592,11 @@ CONFIG_PM_BUTTONS_MAX=7
 CONFIG_PM_IRQBUTTONS_MIN=0
 CONFIG_PM_IRQBUTTONS_MAX=7
 CONFIG_PM_BUTTON_ACTIVITY=10
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -589,9 +613,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=4
@@ -601,6 +628,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -617,6 +645,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -686,6 +716,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -701,12 +732,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 # CONFIG_RTC_DATETIME is not set
 CONFIG_RTC_HIRES=y
@@ -721,11 +756,20 @@ CONFIG_RTC_NALARMS=1
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 CONFIG_LCD_NOGETRUN=y
@@ -739,6 +783,7 @@ CONFIG_LCD_MAXPOWER=100
 # CONFIG_LCD_NOKIA6100 is not set
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 # CONFIG_LCD_SSD1351 is not set
@@ -753,11 +798,7 @@ CONFIG_LCD_RPORTRAIT=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -765,6 +806,7 @@ CONFIG_LCD_RPORTRAIT=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -791,9 +833,10 @@ CONFIG_PM_SLEEPEXIT_THRESH=2
 CONFIG_PM_SLEEPENTER_COUNT=70
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -853,19 +896,26 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -903,12 +953,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -996,6 +1040,7 @@ CONFIG_NXFONT_SANS28X37B=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 # CONFIG_NXTERM is not set
 
 #
@@ -1047,6 +1092,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1062,16 +1109,19 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1096,18 +1146,18 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -1131,7 +1181,6 @@ CONFIG_EXAMPLES_NX_BPP=16
 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set
 CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 # CONFIG_EXAMPLES_NX_EXTERNINIT is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 CONFIG_EXAMPLES_NXHELLO=y
 CONFIG_EXAMPLES_NXHELLO_VPLANE=0
@@ -1153,30 +1202,30 @@ CONFIG_EXAMPLES_NXHELLO_FONTID=6
 # CONFIG_EXAMPLES_NXHELLO_EXTERNINIT is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1198,8 +1247,9 @@ CONFIG_EXAMPLES_NXHELLO_FONTID=6
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1264,12 +1314,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1286,11 +1336,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
 CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_FILEIOSIZE=512
@@ -1323,12 +1375,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1336,6 +1388,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3210e-eval/src/stm3210e-eval.h b/configs/stm3210e-eval/src/stm3210e-eval.h
index aa129bf9ce7ca5a65409a0093a725371fd50131b..1426785854c56cff86c73e8b7f3f93ddf5fde588 100644
--- a/configs/stm3210e-eval/src/stm3210e-eval.h
+++ b/configs/stm3210e-eval/src/stm3210e-eval.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm3210e_eval/src/stm3210e-eval.h
  *
- *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -192,6 +192,30 @@ void weak_function stm32_spidev_initialize(void);
 
 void weak_function stm32_usbinitialize(void);
 
+/************************************************************************************
+ * Name: stm32_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ADC
+int stm32_adc_setup(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_can_setup
+ *
+ * Description:
+ *  Initialize CAN and register the CAN device
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CAN
+int stm32_can_setup(void);
+#endif
+
 /************************************************************************************
  * Name: stm32_extcontextsave
  *
diff --git a/configs/stm3210e-eval/src/stm32_adc.c b/configs/stm3210e-eval/src/stm32_adc.c
index a3beeab10f796ed3b92a4031ed7a0d9bc58b93fd..bb92bf9e93170370eb18f58fecdda0a363388279 100644
--- a/configs/stm3210e-eval/src/stm32_adc.c
+++ b/configs/stm3210e-eval/src/stm32_adc.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm3210e-eval/src/stm32_adc.c
  *
- *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -95,24 +95,19 @@ static const uint8_t  g_chanlist[ADC1_NCHANNELS] = {14};
 static const uint32_t g_pinlist[ADC1_NCHANNELS]  = {GPIO_ADC1_IN14};
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_adc_setup
+ * Name: stm32_adc_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/adc.
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
-int board_adc_setup(void)
+int stm32_adc_setup(void)
 {
 #ifdef CONFIG_STM32_ADC1
   static bool initialized = false;
@@ -136,7 +131,7 @@ int board_adc_setup(void)
       adc = stm32_adcinitialize(1, g_chanlist, ADC1_NCHANNELS);
       if (adc == NULL)
         {
-          adbg("ERROR: Failed to get ADC interface\n");
+          aerr("ERROR: Failed to get ADC interface\n");
           return -ENODEV;
         }
 
@@ -145,7 +140,7 @@ int board_adc_setup(void)
       ret = adc_register("/dev/adc0", adc);
       if (ret < 0)
         {
-          adbg("adc_register failed: %d\n", ret);
+          aerr("ERROR: adc_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/stm3210e-eval/src/stm32_appinit.c b/configs/stm3210e-eval/src/stm32_appinit.c
index 4a5d55c9ebee583e8b36a4b6ea4d6a6af65aed59..0b4a1c52c2da7b71298c2e760a8f581b5496e517 100644
--- a/configs/stm3210e-eval/src/stm32_appinit.c
+++ b/configs/stm3210e-eval/src/stm32_appinit.c
@@ -129,14 +129,14 @@ static void stm32_i2c_register(int bus)
   i2c = stm32_i2cbus_initialize(bus);
   if (i2c == NULL)
     {
-      dbg("ERROR: Failed to get I2C%d interface\n", bus);
+      _err("ERROR: Failed to get I2C%d interface\n", bus);
     }
   else
     {
       ret = i2c_register(i2c, bus);
       if (ret < 0)
         {
-          dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
+          _err("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
           stm32_i2cbus_uninitialize(i2c);
         }
     }
@@ -206,9 +206,7 @@ int board_app_initialize(uintptr_t arg)
 #ifdef NSH_HAVEMMCSD
   FAR struct sdio_dev_s *sdio;
 #endif
-#if defined(NSH_HAVEMMCSD) || defined(CONFIG_DJOYSTICK)
   int ret;
-#endif
 
   /* Register I2C drivers on behalf of the I2C tool */
 
@@ -286,6 +284,26 @@ int board_app_initialize(uintptr_t arg)
    sdio_mediachange(sdio, true);
 #endif
 
+#ifdef CONFIG_ADC
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = stm32_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_adc_setup failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_CAN
+  /* Initialize CAN and register the CAN driver. */
+
+  ret = stm32_can_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_can_setup failed: %d\n", ret);
+    }
+#endif
+
 #ifdef CONFIG_DJOYSTICK
   /* Initialize and register the joystick driver */
 
@@ -299,5 +317,6 @@ int board_app_initialize(uintptr_t arg)
   syslog(LOG_INFO, "Successfully registered the joystick driver\n");
 #endif
 
+  UNUSED(ret);
   return OK;
 }
diff --git a/configs/stm3210e-eval/src/stm32_buttons.c b/configs/stm3210e-eval/src/stm32_buttons.c
index 526309f01785ac885254e116071d281310c0724c..043535444c84a92263252074807cfa5229b3ca85 100644
--- a/configs/stm3210e-eval/src/stm32_buttons.c
+++ b/configs/stm3210e-eval/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/stm3210e-eval/src/stm32_buttons.c
  *
- *   Copyright (C) 2009, 2011, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2011, 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -155,24 +156,23 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   /* The following should be atomic */
 
   if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
     {
-      oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler, arg);
     }
 
-  return oldhandler;
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/stm3210e-eval/src/stm32_can.c b/configs/stm3210e-eval/src/stm32_can.c
index 2efb493ca1c62b7c1d1a93dcfce6e37a3da2e07b..06e24930ea61083da405d0b5cc4e9670e412858f 100644
--- a/configs/stm3210e-eval/src/stm32_can.c
+++ b/configs/stm3210e-eval/src/stm32_can.c
@@ -42,7 +42,7 @@
 #include 
 #include 
 
-#include 
+#include 
 #include 
 
 #include "chip.h"
@@ -52,7 +52,7 @@
 #include "stm32_can.h"
 #include "stm3210e-eval.h"
 
-#if defined(CONFIG_CAN) && defined(CONFIG_STM32_CAN1)
+#ifdef CONFIG_CAN
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -62,72 +62,46 @@
 
 #define CAN_PORT 1
 
-/* Debug ***************************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
-
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
-#else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_can_initialize
+ * Name: stm32_can_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/can.
+ *  Initialize CAN and register the CAN device
  *
  ************************************************************************************/
 
-int board_can_initialize(void)
+int stm32_can_setup(void)
 {
-  static bool initialized = false;
+#ifdef CONFIG_STM32_CAN1
   struct can_dev_s *can;
   int ret;
 
-  /* Check if we have already initialized */
+  /* Call stm32_caninitialize() to get an instance of the CAN interface */
 
-  if (!initialized)
+  can = stm32_caninitialize(CAN_PORT);
+  if (can == NULL)
     {
-      /* Call stm32_caninitialize() to get an instance of the CAN interface */
-
-      can = stm32_caninitialize(CAN_PORT);
-      if (can == NULL)
-        {
-          candbg("ERROR:  Failed to get CAN interface\n");
-          return -ENODEV;
-        }
-
-      /* Register the CAN driver at "/dev/can0" */
-
-      ret = can_register("/dev/can0", can);
-      if (ret < 0)
-        {
-          candbg("ERROR: can_register failed: %d\n", ret);
-          return ret;
-        }
+      canerr("ERROR:  Failed to get CAN interface\n");
+      return -ENODEV;
+    }
 
-      /* Now we are initialized */
+  /* Register the CAN driver at "/dev/can0" */
 
-      initialized = true;
+  ret = can_register("/dev/can0", can);
+  if (ret < 0)
+    {
+      canerr("ERROR: can_register failed: %d\n", ret);
+      return ret;
     }
 
   return OK;
+#else
+  return -ENODEV;
+#endif
 }
 
-#endif /* CONFIG_CAN && CONFIG_STM32_CAN1 */
+#endif /* CONFIG_CAN */
diff --git a/configs/stm3210e-eval/src/stm32_djoystick.c b/configs/stm3210e-eval/src/stm32_djoystick.c
index a8d9001f7e9eaf6d83694ae4dcd945652fd15781..40e8e3bf2656ef453997864eb9d6399f21f21625 100644
--- a/configs/stm3210e-eval/src/stm32_djoystick.c
+++ b/configs/stm3210e-eval/src/stm32_djoystick.c
@@ -120,7 +120,7 @@ static const struct djoy_lowerhalf_s g_djoylower =
 
 static djoy_buttonset_t djoy_supported(FAR const struct djoy_lowerhalf_s *lower)
 {
-  ivdbg("Supported: %02x\n", DJOY_SUPPORTED);
+  iinfo("Supported: %02x\n", DJOY_SUPPORTED);
   return (djoy_buttonset_t)DJOY_SUPPORTED;
 }
 
@@ -148,7 +148,7 @@ static djoy_buttonset_t djoy_sample(FAR const struct djoy_lowerhalf_s *lower)
          }
     }
 
-  ivdbg("Retuning: %02x\n", DJOY_SUPPORTED);
+  iinfo("Retuning: %02x\n", DJOY_SUPPORTED);
   return ret;
 }
 
@@ -177,8 +177,8 @@ static void djoy_enable(FAR const struct djoy_lowerhalf_s *lower,
   flags = enter_critical_section();
   djoy_disable();
 
-  illvdbg("press: %02x release: %02x handler: %p arg: %p\n",
-          press, release, handler, arg);
+  iinfo("press: %02x release: %02x handler: %p arg: %p\n",
+        press, release, handler, arg);
 
   /* If no events are indicated or if no handler is provided, then this
    * must really be a request to disable interrupts.
@@ -209,11 +209,11 @@ static void djoy_enable(FAR const struct djoy_lowerhalf_s *lower,
                falling = ((press & bit) != 0);
                rising  = ((release & bit) != 0);
 
-               illvdbg("GPIO %d: rising: %d falling: %d\n",
-                        i, rising, falling);
+               iinfo("GPIO %d: rising: %d falling: %d\n",
+                      i, rising, falling);
 
                (void)stm32_gpiosetevent(g_joygpio[i], rising, falling,
-                                        true, djoy_interrupt);
+                                        true, djoy_interrupt, NULL);
              }
         }
     }
@@ -239,7 +239,7 @@ static void djoy_disable(void)
   flags = enter_critical_section();
   for (i = 0; i < DJOY_NGPIOS; i++)
     {
-      (void)stm32_gpiosetevent(g_joygpio[i], false, false, false, NULL);
+      (void)stm32_gpiosetevent(g_joygpio[i], false, false, false, NULL, NULL);
     }
 
   leave_critical_section(flags);
diff --git a/configs/stm3210e-eval/src/stm32_idle.c b/configs/stm3210e-eval/src/stm32_idle.c
index aba327a64c94d245591c20f5cd8a2d0f9f9e7c20..673b19953f00886db193c5bcecfa6043359f917a 100644
--- a/configs/stm3210e-eval/src/stm32_idle.c
+++ b/configs/stm3210e-eval/src/stm32_idle.c
@@ -159,7 +159,7 @@ static void stm32_alarmcb(void)
  ****************************************************************************/
 
 #if defined(CONFIG_PM) && defined(CONFIG_RTC_ALARM)
-static int stm32_alarm_exti(int irq, FAR void *context)
+static int stm32_alarm_exti(int irq, FAR void *context, FAR void *arg)
 {
   stm32_alarmcb();
   return OK;
@@ -177,7 +177,7 @@ static int stm32_alarm_exti(int irq, FAR void *context)
 #if defined(CONFIG_PM) && defined(CONFIG_RTC_ALARM)
 static void stm32_exti_cancel(void)
 {
-  (void)stm32_exti_alarm(false, false, false, NULL);
+  (void)stm32_exti_alarm(false, false, false, NULL, NULL);
 }
 #endif
 
@@ -201,7 +201,7 @@ static int stm32_rtc_alarm(time_t tv_sec, time_t tv_nsec, bool exti)
     {
       /* TODO: Make sure that that is no pending EXTI interrupt */
 
-      (void)stm32_exti_alarm(true, true, true, stm32_alarm_exti);
+      (void)stm32_exti_alarm(true, true, true, stm32_alarm_exti, NULL);
     }
 
   /* Configure the RTC alarm to Auto Wake the system */
@@ -229,7 +229,7 @@ static int stm32_rtc_alarm(time_t tv_sec, time_t tv_nsec, bool exti)
   ret = stm32_rtc_setalarm(&alarmtime, stm32_alarmcb);
   if (ret < 0)
     {
-      lldbg("Warning: The alarm is already set\n");
+      serr("ERROR: Warning: The alarm is already set\n");
     }
 
   return ret;
@@ -290,7 +290,7 @@ static void stm32_idlepm(void)
 
   if (newstate != oldstate)
     {
-      llvdbg("newstate= %d oldstate=%d\n", newstate, oldstate);
+      _info("newstate= %d oldstate=%d\n", newstate, oldstate);
 
       sched_lock();
 
@@ -366,7 +366,7 @@ static void stm32_idlepm(void)
             ret = stm32_rtc_cancelalarm();
             if (ret < 0)
               {
-                lldbg("Warning: Cancel alarm failed\n");
+                swarn("WARNING: Cancel alarm failed\n");
               }
 #endif
             /* Note:  See the additional PM_STANDBY related logic at the
diff --git a/configs/stm3210e-eval/src/stm32_lcd.c b/configs/stm3210e-eval/src/stm32_lcd.c
index ed7ca1f2d8ff0de91ee5809cbe4f53e4964ee911..cc4f25d6b785d9e0e99bd8913adff17689443f60 100644
--- a/configs/stm3210e-eval/src/stm32_lcd.c
+++ b/configs/stm3210e-eval/src/stm32_lcd.c
@@ -36,6 +36,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  *
  **************************************************************************************/
+
 /* This driver supports the following LCDs:
  *
  * 1. Ampire AM-240320LTNQW00H
@@ -81,6 +82,7 @@
 /**************************************************************************************
  * Pre-processor Definitions
  **************************************************************************************/
+
 /* Configuration **********************************************************************/
 /* Check contrast selection */
 
@@ -157,20 +159,6 @@
 
 #define SPFD5408B_RDSHIFT 5
 
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
 /* Display/Color Properties ***********************************************************/
 /* Display Resolution */
 
@@ -309,14 +297,6 @@
 #define SPFD5408B_ID          0x5408
 #define R61580_ID             0x1580
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-# define lcddbg(format, ...)  vdbg(format, ##__VA_ARGS__)
-#else
-# define lcddbg(x...)
-#endif
-
 /**************************************************************************************
  * Private Type Definition
  **************************************************************************************/
@@ -742,7 +722,7 @@ static int stm3210e_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *bu
 
   /* Buffer must be provided and aligned to a 16-bit address boundary */
 
-  lcddbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
 
   /* Write the run to GRAM. */
@@ -835,7 +815,7 @@ static int stm3210e_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
 
   /* Buffer must be provided and aligned to a 16-bit address boundary */
 
-  lcddbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
 
   /* Configure according to the LCD type */
@@ -952,7 +932,7 @@ static int stm3210e_getvideoinfo(FAR struct lcd_dev_s *dev,
                               FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  gvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+  ginfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
          g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
   memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
   return OK;
@@ -970,7 +950,7 @@ static int stm3210e_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno
                               FAR struct lcd_planeinfo_s *pinfo)
 {
   DEBUGASSERT(dev && pinfo && planeno == 0);
-  gvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+  ginfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
   memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
   return OK;
 }
@@ -986,7 +966,7 @@ static int stm3210e_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno
 
 static int stm3210e_getpower(struct lcd_dev_s *dev)
 {
-  gvdbg("power: %d\n", 0);
+  ginfo("power: %d\n", 0);
   return g_lcddev.power;
 }
 
@@ -1038,7 +1018,7 @@ static int stm3210e_poweroff(void)
 
 static int stm3210e_setpower(struct lcd_dev_s *dev, int power)
 {
-  gvdbg("power: %d\n", power);
+  ginfo("power: %d\n", power);
   DEBUGASSERT((unsigned)power <= CONFIG_LCD_MAXPOWER);
 
   /* Set new power level */
@@ -1114,7 +1094,7 @@ static int stm3210e_setpower(struct lcd_dev_s *dev, int power)
 
 static int stm3210e_getcontrast(struct lcd_dev_s *dev)
 {
-  gvdbg("Not implemented\n");
+  ginfo("Not implemented\n");
   return -ENOSYS;
 }
 
@@ -1128,7 +1108,7 @@ static int stm3210e_getcontrast(struct lcd_dev_s *dev)
 
 static int stm3210e_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
 {
-  gvdbg("contrast: %d\n", contrast);
+  ginfo("contrast: %d\n", contrast);
   return -ENOSYS;
 }
 
@@ -1321,7 +1301,7 @@ static inline void stm3210e_lcdinitialize(void)
    */
 
   id = stm3210e_readreg(LCD_REG_0);
-  lcddbg("LCD ID: %04x\n", id);
+  lcdinfo("LCD ID: %04x\n", id);
 
   /* Check if the ID is for the SPFD5408B */
 
@@ -1331,7 +1311,7 @@ static inline void stm3210e_lcdinitialize(void)
       /* Set the LCD type for the SPFD5408B */
 
       g_lcddev.type = LCD_TYPE_SPFD5408B;
-      lcddbg("LCD type: %d\n", g_lcddev.type);
+      lcdinfo("LCD type: %d\n", g_lcddev.type);
 
       /* Start Initial Sequence */
 
@@ -1436,7 +1416,7 @@ static inline void stm3210e_lcdinitialize(void)
       /* Set the LCD type for the R61580 */
 
       g_lcddev.type = LCD_TYPE_R61580;
-      lcddbg("LCD type: %d\n", g_lcddev.type);
+      lcdinfo("LCD type: %d\n", g_lcddev.type);
 
       /* Start Initial Sequence */
 
@@ -1506,7 +1486,7 @@ static inline void stm3210e_lcdinitialize(void)
       /* Set the LCD type for the AM240320 */
 
       g_lcddev.type = LCD_TYPE_AM240320;
-      lcddbg("LCD type: %d\n", g_lcddev.type);
+      lcdinfo("LCD type: %d\n", g_lcddev.type);
 
       /* Start Initial Sequence */
 
@@ -1595,7 +1575,7 @@ static inline void stm3210e_lcdinitialize(void)
       stm3210e_writereg(LCD_REG_3, 0x1018);
       stm3210e_writereg(LCD_REG_7, 0);       /* Display off */
 #else
-      lcddbg("Unsupported LCD type\n");
+      lcderr("ERROR: Unsupported LCD type\n");
 #endif
   }
 }
@@ -1743,25 +1723,25 @@ static void stm3210e_backlight(void)
 
   /* Dump timer1 registers */
 
-  lcddbg("APB2ENR: %08x\n", getreg32(STM32_RCC_APB2ENR));
-  lcddbg("CR1:     %04x\n", getreg32(STM32_TIM1_CR1));
-  lcddbg("CR2:     %04x\n", getreg32(STM32_TIM1_CR2));
-  lcddbg("SMCR:    %04x\n", getreg32(STM32_TIM1_SMCR));
-  lcddbg("DIER:    %04x\n", getreg32(STM32_TIM1_DIER));
-  lcddbg("SR:      %04x\n", getreg32(STM32_TIM1_SR));
-  lcddbg("BDTR:    %04x\n", getreg32(STM32_TIM1_BDTR));
-  lcddbg("CCMR1:   %04x\n", getreg32(STM32_TIM1_CCMR1));
-  lcddbg("CCMR2:   %04x\n", getreg32(STM32_TIM1_CCMR2));
-  lcddbg("CCER:    %04x\n", getreg32(STM32_TIM1_CCER));
-  lcddbg("CNT:     %04x\n", getreg32(STM32_TIM1_CNT));
-  lcddbg("PSC:     %04x\n", getreg32(STM32_TIM1_PSC));
-  lcddbg("ARR:     %04x\n", getreg32(STM32_TIM1_ARR));
-  lcddbg("RCR:     %04x\n", getreg32(STM32_TIM1_RCR));
-  lcddbg("CCR1:    %04x\n", getreg32(STM32_TIM1_CCR1));
-  lcddbg("CCR2:    %04x\n", getreg32(STM32_TIM1_CCR2));
-  lcddbg("CCR3:    %04x\n", getreg32(STM32_TIM1_CCR3));
-  lcddbg("CCR4:    %04x\n", getreg32(STM32_TIM1_CCR4));
-  lcddbg("DMAR:    %04x\n", getreg32(STM32_TIM1_DMAR));
+  lcdinfo("APB2ENR: %08x\n", getreg32(STM32_RCC_APB2ENR));
+  lcdinfo("CR1:     %04x\n", getreg32(STM32_TIM1_CR1));
+  lcdinfo("CR2:     %04x\n", getreg32(STM32_TIM1_CR2));
+  lcdinfo("SMCR:    %04x\n", getreg32(STM32_TIM1_SMCR));
+  lcdinfo("DIER:    %04x\n", getreg32(STM32_TIM1_DIER));
+  lcdinfo("SR:      %04x\n", getreg32(STM32_TIM1_SR));
+  lcdinfo("BDTR:    %04x\n", getreg32(STM32_TIM1_BDTR));
+  lcdinfo("CCMR1:   %04x\n", getreg32(STM32_TIM1_CCMR1));
+  lcdinfo("CCMR2:   %04x\n", getreg32(STM32_TIM1_CCMR2));
+  lcdinfo("CCER:    %04x\n", getreg32(STM32_TIM1_CCER));
+  lcdinfo("CNT:     %04x\n", getreg32(STM32_TIM1_CNT));
+  lcdinfo("PSC:     %04x\n", getreg32(STM32_TIM1_PSC));
+  lcdinfo("ARR:     %04x\n", getreg32(STM32_TIM1_ARR));
+  lcdinfo("RCR:     %04x\n", getreg32(STM32_TIM1_RCR));
+  lcdinfo("CCR1:    %04x\n", getreg32(STM32_TIM1_CCR1));
+  lcdinfo("CCR2:    %04x\n", getreg32(STM32_TIM1_CCR2));
+  lcdinfo("CCR3:    %04x\n", getreg32(STM32_TIM1_CCR3));
+  lcdinfo("CCR4:    %04x\n", getreg32(STM32_TIM1_CCR4));
+  lcdinfo("DMAR:    %04x\n", getreg32(STM32_TIM1_DMAR));
 #endif
 }
 #endif
@@ -1786,16 +1766,16 @@ int board_lcd_initialize(void)
   int ret;
 #endif
 
-  gvdbg("Initializing\n");
+  ginfo("Initializing\n");
 
   /* Register to receive power management callbacks */
 
 #ifdef CONFIG_PM
   ret = pm_register(&g_lcdcb);
   if (ret != OK)
-  {
-    lcddbg("ERROR: pm_register failed: %d\n", ret);
-  }
+    {
+      lcderr("ERROR: pm_register failed: %d\n", ret);
+    }
 #endif
 
   /* Configure GPIO pins and configure the FSMC to support the LCD */
diff --git a/configs/stm3210e-eval/src/stm32_leds.c b/configs/stm3210e-eval/src/stm32_leds.c
index 66679b48a3247658d0fd35bf57afd54b780f2509..acdd62b1e584c70bc5782408a831606471df6e2c 100644
--- a/configs/stm3210e-eval/src/stm32_leds.c
+++ b/configs/stm3210e-eval/src/stm32_leds.c
@@ -57,18 +57,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* The following definitions map the encoded LED setting to GPIO settings */
 
 #define STM3210E_LED1     (1 << 0)
diff --git a/configs/stm3210e-eval/src/stm32_lm75.c b/configs/stm3210e-eval/src/stm32_lm75.c
index ba0591fb87c450072d7827f79b9ecb8e8e8f8fbc..959dd6731c6c10b6dd2592158a20a4cae63e2434 100644
--- a/configs/stm3210e-eval/src/stm32_lm75.c
+++ b/configs/stm3210e-eval/src/stm32_lm75.c
@@ -106,15 +106,17 @@ int stm32_lm75initialize(FAR const char *devpath)
  *
  * Input parameters:
  *   irqhandler - the LM-75 interrupt handler
+ *   arg        - The argument that will accompany the interrupt
  *
  * Returned Value:
- *   The previous LM-75 interrupt handler
+ *   Zero (OK) returned on success; a negated errno value is returned on failure.
  *
  ************************************************************************************/
 
-xcpt_t stm32_lm75attach(xcpt_t irqhandler)
+int stm32_lm75attach(xcpt_t irqhandler, void *arg)
 {
-  return stm32_gpiosetevent(GPIO_LM75_OSINT, true, true, true, irqhandler);
+  (void)stm32_gpiosetevent(GPIO_LM75_OSINT, true, true, true, irqhandler, arg);
+  return OK;
 }
 
 #endif /* CONFIG_I2C && CONFIG_I2C_LM75 && CONFIG_STM32_I2C1 */
diff --git a/configs/stm3210e-eval/src/stm32_pmbuttons.c b/configs/stm3210e-eval/src/stm32_pmbuttons.c
index 49be1db7e223cb8c4a2d243fe4d9207836f4a50e..8688ec2d4965e1a585e10b446ca2027b859dffb7 100644
--- a/configs/stm3210e-eval/src/stm32_pmbuttons.c
+++ b/configs/stm3210e-eval/src/stm32_pmbuttons.c
@@ -136,75 +136,11 @@
  * Private Function Prototypes
  ****************************************************************************/
 
-#ifdef CONFIG_ARCH_IRQBUTTONS
-static void button_handler(int id, int irq);
-
-#if MIN_BUTTON < 1
-static int button0_handler(int irq, FAR void *context);
-#endif
-#if MIN_BUTTON < 2 && MAX_BUTTON > 0
-static int button1_handler(int irq, FAR void *context);
-#endif
-#if MIN_BUTTON < 3 && MAX_BUTTON > 1
-static int button2_handler(int irq, FAR void *context);
-#endif
-#if MIN_BUTTON < 4 && MAX_BUTTON > 2
-static int button3_handler(int irq, FAR void *context);
-#endif
-#if MIN_BUTTON < 5 && MAX_BUTTON > 3
-static int button4_handler(int irq, FAR void *context);
-#endif
-#if MIN_BUTTON < 6 && MAX_BUTTON > 4
-static int button5_handler(int irq, FAR void *context);
-#endif
-#if MIN_BUTTON < 7 && MAX_BUTTON > 5
-static int button6_handler(int irq, FAR void *context);
-#endif
-#if MAX_BUTTON > 6
-static int button7_handler(int irq, FAR void *context);
-#endif
-#endif /* CONFIG_ARCH_IRQBUTTONS */
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/* Button interrupt handlers */
-
-#ifdef CONFIG_ARCH_IRQBUTTONS
-static const xcpt_t g_buttonhandlers[NUM_PMBUTTONS] =
-{
-#if MIN_BUTTON < 1
-    button0_handler,
-#endif
-#if MIN_BUTTON < 2 && MAX_BUTTON > 0
-    button1_handler,
-#endif
-#if MIN_BUTTON < 3 && MAX_BUTTON > 1
-    button2_handler,
-#endif
-#if MIN_BUTTON < 4 && MAX_BUTTON > 2
-    button3_handler,
-#endif
-#if MIN_BUTTON < 5 && MAX_BUTTON > 3
-    button4_handler,
-#endif
-#if MIN_BUTTON < 6 && MAX_BUTTON > 4
-    button5_handler,
-#endif
-#if MIN_BUTTON < 7 && MAX_BUTTON > 5
-    button6_handler,
-#endif
-#if MAX_BUTTON > 6
-    button7_handler,
-#endif
-};
-#endif /* CONFIG_ARCH_IRQBUTTONS */
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
 
+#ifdef CONFIG_ARCH_IRQBUTTONS
 /****************************************************************************
  * Name: button_handler
  *
@@ -212,9 +148,7 @@ static const xcpt_t g_buttonhandlers[NUM_PMBUTTONS] =
  *   Handle a button wake-up interrupt
  *
  ****************************************************************************/
-
-#ifdef CONFIG_ARCH_IRQBUTTONS
-static void button_handler(int id, int irq)
+static int button_handler(int irq, FAR void *context, FAR void *arg)
 {
   /* At this point the MCU should have already awakened.  The state
    * change will be handled in the IDLE loop when the system is re-awakened
@@ -224,71 +158,8 @@ static void button_handler(int id, int irq)
    */
 
   pm_activity(PM_IDLE_DOMAIN, CONFIG_PM_BUTTON_ACTIVITY);
+  return 0;
 }
-
-#if MIN_BUTTON < 1
-static int button0_handler(int irq, FAR void *context)
-{
-  button_handler(0, irq);
-  return OK;
-}
-#endif
-
-#if MIN_BUTTON < 2 && MAX_BUTTON > 0
-static int button1_handler(int irq, FAR void *context)
-{
-  button_handler(1, irq);
-  return OK;
-}
-#endif
-
-#if MIN_BUTTON < 3 && MAX_BUTTON > 1
-static int button2_handler(int irq, FAR void *context)
-{
-  button_handler(2, irq);
-  return OK;
-}
-#endif
-
-#if MIN_BUTTON < 4 && MAX_BUTTON > 2
-static int button3_handler(int irq, FAR void *context)
-{
-  button_handler(3, irq);
-  return OK;
-}
-#endif
-
-#if MIN_BUTTON < 5 && MAX_BUTTON > 3
-static int button4_handler(int irq, FAR void *context)
-{
-  button_handler(4, irq);
-  return OK;
-}
-#endif
-
-#if MIN_BUTTON < 6 && MAX_BUTTON > 4
-static int button5_handler(int irq, FAR void *context)
-{
-  button_handler(5, irq);
-  return OK;
-}
-#endif
-
-#if MIN_BUTTON < 7 && MAX_BUTTON > 5
-static int button6_handler(int irq, FAR void *context)
-{
-  button_handler(6, irq);
-  return OK;
-}
-#endif
-
-#if MAX_BUTTON > 6
-static int button7_handler(int irq, FAR void *context)
-{
-  button_handler(7, irq);
-  return OK;
-}
-#endif
 #endif /* CONFIG_ARCH_IRQBUTTONS */
 
 /****************************************************************************
@@ -306,21 +177,22 @@ static int button7_handler(int irq, FAR void *context)
 
 void stm32_pmbuttons(void)
 {
+#ifdef CONFIG_ARCH_IRQBUTTONS
+  int ret;
+  int i;
+#endif
+
   /* Initialize the button GPIOs */
 
   board_button_initialize();
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-  int i;
   for (i = CONFIG_PM_IRQBUTTONS_MIN; i <= CONFIG_PM_IRQBUTTONS_MAX; i++)
     {
-      xcpt_t oldhandler = board_button_irq(i, g_buttonhandlers[BUTTON_INDEX(i)]);
-
-      if (oldhandler != NULL)
+      ret = board_button_irq(i, button_handler, (void*)i);
+      if (ret < 0)
         {
-          lowsyslog(LOG_WARNING, "WARNING: oldhandler:%p is not NULL!  "
-                    "Button events may be lost or aliased!\n",
-                    oldhandler);
+          serr("ERROR: board_button_irq failed: %d\n", ret);
         }
     }
 #endif
diff --git a/configs/stm3210e-eval/src/stm32_spi.c b/configs/stm3210e-eval/src/stm32_spi.c
index b64df8d679a8c02330021f862ac7d9cca711ed31..4df6531cefbf5a7fd9554531c8d6c9b7dfa0dd71 100644
--- a/configs/stm3210e-eval/src/stm32_spi.c
+++ b/configs/stm3210e-eval/src/stm32_spi.c
@@ -53,32 +53,6 @@
 
 #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -134,7 +108,7 @@ void weak_function stm32_spidev_initialize(void)
 #ifdef CONFIG_STM32_SPI1
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
   if (devid == SPIDEV_FLASH)
     {
@@ -153,7 +127,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI2
 void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -165,7 +139,7 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI3
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
diff --git a/configs/stm3210e-eval/src/stm32_usbdev.c b/configs/stm3210e-eval/src/stm32_usbdev.c
index 9864798835c786a5c775acafd23a08c8ce4674e4..89eed63bc9e971e5f81785e268cb74a0e25b8285 100644
--- a/configs/stm3210e-eval/src/stm32_usbdev.c
+++ b/configs/stm3210e-eval/src/stm32_usbdev.c
@@ -110,6 +110,5 @@ int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable)
 
 void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
-
diff --git a/configs/stm3210e-eval/usbmsc/Make.defs b/configs/stm3210e-eval/usbmsc/Make.defs
index 2f4e87a1988775db8331d4320dcb795fa0db6317..b7b9f13c4721e5259173eab1895fb034eaa3c204 100644
--- a/configs/stm3210e-eval/usbmsc/Make.defs
+++ b/configs/stm3210e-eval/usbmsc/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3210e-eval/usbmsc/defconfig b/configs/stm3210e-eval/usbmsc/defconfig
index 001c83e4f563a9d0dca2ef13d78ba241625cfdc9..6195a1053322964f311854a7807e302a9d8f6d39 100644
--- a/configs/stm3210e-eval/usbmsc/defconfig
+++ b/configs/stm3210e-eval/usbmsc/defconfig
@@ -42,10 +42,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -103,7 +106,9 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -146,8 +151,6 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # STM32 Configuration Options
@@ -202,6 +205,7 @@ CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 CONFIG_ARCH_CHIP_STM32F103ZE=y
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -349,6 +353,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 CONFIG_STM32_HAVE_DAC1=y
@@ -414,6 +424,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_DMACAPABLE is not set
 # CONFIG_STM32_FSMC_SRAM is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -425,12 +441,20 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -439,7 +463,9 @@ CONFIG_STM32_USART2_SERIALDRIVER=y
 #
 # SDIO Configuration
 #
-CONFIG_SDIO_DMAPRIO=0x00001000
+CONFIG_STM32_SDIO_DMA=y
+CONFIG_STM32_SDIO_DMAPRIO=0x00001000
+# CONFIG_STM32_SDIO_WIDTH_D1_ONLY is not set
 CONFIG_STM32_HAVE_RTC_COUNTER=y
 # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
 
@@ -541,13 +567,12 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # STM3210E-EVAL LCD Hardware Configuration
 #
 # CONFIG_STM3210E_LCD is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -564,9 +589,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=11
@@ -579,6 +607,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -595,6 +624,8 @@ CONFIG_MAX_TASKS=16
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -664,6 +695,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -679,12 +711,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -692,8 +728,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -701,6 +747,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -708,11 +755,13 @@ CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_MMCSUPPORT is not set
 # CONFIG_MMCSD_HAVECARDDETECT is not set
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y
 CONFIG_MMCSD_SDIO=y
 CONFIG_SDIO_PREFLIGHT=y
 # CONFIG_SDIO_MUXBUS is not set
 # CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 # CONFIG_SDIO_BLOCKSETUP is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -721,9 +770,10 @@ CONFIG_SDIO_PREFLIGHT=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -783,6 +833,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -820,17 +871,23 @@ CONFIG_USBMSC_REMOVABLE=y
 CONFIG_USBMSC_SCSI_PRIO=128
 CONFIG_USBMSC_SCSI_STACKSIZE=2048
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -867,12 +924,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -917,11 +968,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -939,17 +1007,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -968,19 +1041,20 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -989,20 +1063,18 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1014,10 +1086,10 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1041,8 +1113,9 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1075,17 +1148,17 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
 CONFIG_SYSTEM_USBMSC=y
 CONFIG_SYSTEM_USBMSC_NLUNS=1
@@ -1096,4 +1169,5 @@ CONFIG_SYSTEM_USBMSC_DEVPATH2="/dev/mmcsd1"
 CONFIG_SYSTEM_USBMSC_DEVMINOR3=2
 CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2"
 # CONFIG_SYSTEM_USBMSC_DEBUGMM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3210e-eval/usbserial/Make.defs b/configs/stm3210e-eval/usbserial/Make.defs
index 5c49c1a196760636bfc7f95794a17354829f0cff..2ba8d703f155a7a1cfa93ccc0571c2034257af94 100644
--- a/configs/stm3210e-eval/usbserial/Make.defs
+++ b/configs/stm3210e-eval/usbserial/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3210e-eval/usbserial/defconfig b/configs/stm3210e-eval/usbserial/defconfig
index 4e6b606f27526993adb56f2ea866a5e11b67e832..4dde9d14193ef6d64f51e9bd747801d9f6dd3f43 100644
--- a/configs/stm3210e-eval/usbserial/defconfig
+++ b/configs/stm3210e-eval/usbserial/defconfig
@@ -42,10 +42,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -200,6 +203,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 CONFIG_ARCH_CHIP_STM32F103ZE=y
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -347,6 +351,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 CONFIG_STM32_HAVE_DAC1=y
@@ -411,6 +421,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_FSMC_SRAM is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -422,12 +438,20 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -533,13 +557,12 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # STM3210E-EVAL LCD Hardware Configuration
 #
 # CONFIG_STM3210E_LCD is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -556,9 +579,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=10
@@ -571,6 +597,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -587,6 +614,8 @@ CONFIG_MAX_TASKS=16
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -651,6 +680,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -666,12 +696,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -679,8 +713,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -688,6 +732,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -696,10 +741,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -759,6 +804,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -795,17 +841,23 @@ CONFIG_PL2303_PRODUCTSTR="USBdev Serial"
 # CONFIG_CDCACM is not set
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -836,12 +888,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -891,6 +937,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -906,16 +954,19 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -934,18 +985,19 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -954,20 +1006,18 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -979,11 +1029,11 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 CONFIG_EXAMPLES_USBSERIAL=y
 CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1005,8 +1055,9 @@ CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1039,16 +1090,17 @@ CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3220g-eval/README.txt b/configs/stm3220g-eval/README.txt
index c30383cbdfdddd21c6d69e5d5c95f014fa55992f..aa4b365791fc9a4c0e14cd7cd1d3d306c19b91ff 100644
--- a/configs/stm3220g-eval/README.txt
+++ b/configs/stm3220g-eval/README.txt
@@ -486,7 +486,7 @@ Configuration Options:
   CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
   CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
   CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
-  CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+  CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
     dump of all CAN registers.
 
 FSMC SRAM
@@ -773,10 +773,10 @@ STM3220G-EVAL-specific Configuration Options
 
     CONFIG_SDIO_DMA - Support DMA data transfers.  Requires CONFIG_STM32_SDIO
       and CONFIG_STM32_DMA2.
-    CONFIG_SDIO_PRI - Select SDIO interrupt prority.  Default: 128
-    CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
+    CONFIG_STM32_SDIO_PRI - Select SDIO interrupt prority.  Default: 128
+    CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
       Default:  Medium
-    CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode.  Default:
+    CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode.  Default:
       4-bit transfer mode.
 
     CONFIG_STM32_PHYADDR - The 5-bit address of the PHY on the board
@@ -817,7 +817,7 @@ STM3220G-EVAL-specific Configuration Options
     CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
     CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
     CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
-    CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+    CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
       dump of all CAN registers.
 
   STM3220G-EVAL LCD Hardware Configuration
@@ -842,9 +842,9 @@ STM3220G-EVAL-specific Configuration Options
    CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts.  Why would you ever
      want to do that?
    CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
-     debug.  Depends on CONFIG_DEBUG.
+     debug.  Depends on CONFIG_DEBUG_FEATURES.
    CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
-     packets. Depends on CONFIG_DEBUG.
+     packets. Depends on CONFIG_DEBUG_FEATURES.
 
 Configurations
 ==============
@@ -989,7 +989,7 @@ Where  is one of the following:
 
        Special PWM-only debug options:
 
-       CONFIG_DEBUG_PWM
+       CONFIG_DEBUG_PWM_INFO
 
     5. This example supports the CAN loopback test (apps/examples/can) but this
        must be manually enabled by selecting:
@@ -1003,8 +1003,8 @@ Where  is one of the following:
 
        Special CAN-only debug options:
 
-       CONFIG_DEBUG_CAN
-       CONFIG_CAN_REGDEBUG
+       CONFIG_DEBUG_CAN_INFO
+       CONFIG_STM32_CAN_REGDEBUG
 
     6. This example can support an FTP client.  In order to build in FTP client
        support simply reconfigure NuttX, adding:
@@ -1087,7 +1087,6 @@ Where  is one of the following:
 
     There are some special settings to make life with only a Telnet
 
-    CONFIG_SYSLOG=y - Enables the System Logging feature.
     CONFIG_RAMLOG=y - Enable the RAM-based logging feature.
     CONFIG_RAMLOG_CONSOLE=y - Use the RAM logger as the default console.
       This means that any console output from non-Telnet threads will
diff --git a/configs/stm3220g-eval/dhcpd/Make.defs b/configs/stm3220g-eval/dhcpd/Make.defs
index 6f84793960f3e6b5911d5969f50d4a058ae15615..64f7bf9de741fd2d1ff1551858a6d0aef8aa4aff 100644
--- a/configs/stm3220g-eval/dhcpd/Make.defs
+++ b/configs/stm3220g-eval/dhcpd/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3220g-eval/dhcpd/defconfig b/configs/stm3220g-eval/dhcpd/defconfig
index 1a09df8349a512112668e60ab24aae70bdcd76ef..06f421502f7726d54fd59cfe2740c6721d0c7b53 100644
--- a/configs/stm3220g-eval/dhcpd/defconfig
+++ b/configs/stm3220g-eval/dhcpd/defconfig
@@ -46,10 +46,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +65,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +80,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -207,6 +210,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 CONFIG_ARCH_CHIP_STM32F207IG=y
@@ -354,6 +358,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -432,6 +442,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -449,9 +465,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART3_SERIALDRIVER=y
 # CONFIG_STM32_USART3_1WIREDRIVER is not set
 # CONFIG_USART3_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -476,6 +500,7 @@ CONFIG_STM32_PHYSR_100MBPS=0x0000
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 # CONFIG_STM32_ETH_PTP is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -570,6 +595,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -585,9 +611,12 @@ CONFIG_DISABLE_ENVIRON=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2012
 CONFIG_START_MONTH=12
@@ -636,6 +665,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -643,13 +673,17 @@ CONFIG_NAME_MAX=32
 CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGWORK=17
 # CONFIG_MODULE is not set
 
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -667,6 +701,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -682,12 +717,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -695,8 +734,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -704,6 +753,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -724,10 +774,8 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -751,9 +799,10 @@ CONFIG_ETH0_PHY_DP83848C=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -799,19 +848,26 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USART3_IFLOWCONTROL is not set
 # CONFIG_USART3_OFLOWCONTROL is not set
 # CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -819,13 +875,11 @@ CONFIG_USART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_GUARDSIZE=2
 
@@ -939,12 +993,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -984,7 +1032,7 @@ CONFIG_MM_REGIONS=2
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 # CONFIG_STDIO_LINEBUFFER is not set
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -992,6 +1040,8 @@ CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1006,7 +1056,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -1015,8 +1064,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1042,24 +1093,26 @@ CONFIG_HAVE_CXXINITIALIZE=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 CONFIG_EXAMPLES_DHCPD=y
 CONFIG_EXAMPLES_DHCPD_NOMAC=y
 CONFIG_EXAMPLES_DHCPD_IPADDR=0x0a000001
 CONFIG_EXAMPLES_DHCPD_DRIPADDR=0x0a000001
 CONFIG_EXAMPLES_DHCPD_NETMASK=0xffffff00
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1068,20 +1121,18 @@ CONFIG_EXAMPLES_DHCPD_NETMASK=0xffffff00
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1095,10 +1146,9 @@ CONFIG_EXAMPLES_DHCPD_NETMASK=0xffffff00
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1120,8 +1170,9 @@ CONFIG_EXAMPLES_DHCPD_NETMASK=0xffffff00
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1146,15 +1197,15 @@ CONFIG_NETUTILS_DHCPD_NETMASK=0xffffff00
 CONFIG_NETUTILS_DHCPD_DNSIP=0x08080808
 CONFIG_NETUTILS_DHCPD_OFFERTIME=3600
 CONFIG_NETUTILS_DHCPD_DECLINETIME=3600
+# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
-# CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
 CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_PPPD is not set
+# CONFIG_NETUTILS_SMTP is not set
+# CONFIG_NETUTILS_TFTPC is not set
 
 #
 # NSH Library
@@ -1173,16 +1224,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3220g-eval/ide/nsh/iar/libc.ewp b/configs/stm3220g-eval/ide/nsh/iar/libc.ewp
index 8804fd90438463b9193f1934101e9fe4c40d8bbd..15e9c88df48e1f2aa04eb5361912591434ad3a09 100644
--- a/configs/stm3220g-eval/ide/nsh/iar/libc.ewp
+++ b/configs/stm3220g-eval/ide/nsh/iar/libc.ewp
@@ -2313,9 +2313,6 @@
     
       $PROJ_DIR$/../../../../../libc/stdio/lib_memsostream.c
     
-    
-      $PROJ_DIR$/../../../../../libc/stdio/lib_lowinstream.c
-    
     
       $PROJ_DIR$/../../../../../libc/stdio/lib_lowoutstream.c
     
@@ -2631,9 +2628,6 @@
     
       $PROJ_DIR$/../../../../../libc/syslog/lib_syslog.c
     
-    
-      $PROJ_DIR$/../../../../../libc/syslog/lib_lowsyslog.c
-    
     
       $PROJ_DIR$/../../../../../libc/syslog/lib_setlogmask.c
     
diff --git a/configs/stm3220g-eval/ide/nsh/iar/libdrivers.ewp b/configs/stm3220g-eval/ide/nsh/iar/libdrivers.ewp
index b009ac58d0feb304dc6691049489368fc90b90d0..0f2f399a3ec60b132b02f08bd491ec91b991dbff 100644
--- a/configs/stm3220g-eval/ide/nsh/iar/libdrivers.ewp
+++ b/configs/stm3220g-eval/ide/nsh/iar/libdrivers.ewp
@@ -1991,9 +1991,6 @@
     
       $PROJ_DIR$/../../../../../drivers/mtd/at45db.c
     
-    
-      $PROJ_DIR$/../../../../../drivers/mtd/flash_eraseall.c
-    
     
       $PROJ_DIR$/../../../../../drivers/mtd/ftl.c
     
diff --git a/configs/stm3220g-eval/ide/nsh/uvision/libc.uvproj b/configs/stm3220g-eval/ide/nsh/uvision/libc.uvproj
index 5baf501cd84263ba625f5ca08fa3ca846febd708..90ecb7c9c133efc1eaa0e29119a6c19977ea46b9 100644
--- a/configs/stm3220g-eval/ide/nsh/uvision/libc.uvproj
+++ b/configs/stm3220g-eval/ide/nsh/uvision/libc.uvproj
@@ -953,11 +953,6 @@
               1
               ../../../../../libc/stdio/lib_memsostream.c
             
-            
-              lib_lowinstream.c
-              1
-              ../../../../../libc/stdio/lib_lowinstream.c
-            
             
               lib_lowoutstream.c
               1
@@ -1478,16 +1473,6 @@
               1
               ../../../../../libc/symtab/symtab_findorderedbyvalue.c
             
-            
-              lib_syslog.c
-              1
-              ../../../../../libc/syslog/lib_syslog.c
-            
-            
-              lib_lowsyslog.c
-              1
-              ../../../../../libc/syslog/lib_lowsyslog.c
-            
             
               lib_setlogmask.c
               1
diff --git a/configs/stm3220g-eval/ide/nsh/uvision/libdrivers.uvproj b/configs/stm3220g-eval/ide/nsh/uvision/libdrivers.uvproj
index f1343317b79de9f97fd18bbc424477acd04864ef..f31ea50bf860b852db499b839ba5ed1177af70af 100644
--- a/configs/stm3220g-eval/ide/nsh/uvision/libdrivers.uvproj
+++ b/configs/stm3220g-eval/ide/nsh/uvision/libdrivers.uvproj
@@ -383,11 +383,6 @@
               1
               ../../../../../drivers/mtd/at45db.c
             
-            
-              flash_eraseall.c
-              1
-              ../../../../../drivers/mtd/flash_eraseall.c
-            
             
               ftl.c
               1
diff --git a/configs/stm3220g-eval/include/board.h b/configs/stm3220g-eval/include/board.h
index d8dad32f74fe36ee01024f0ca22059cf655dad66..74d2b5bea787fc7afa5c16c8671dcf1b186fb734 100644
--- a/configs/stm3220g-eval/include/board.h
+++ b/configs/stm3220g-eval/include/board.h
@@ -1,8 +1,7 @@
 /************************************************************************************
  * configs/stm3220g-eval/include/board.h
- * include/arch/board/board.h
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -162,8 +161,14 @@
  * Note: TIM1,8 are on APB2, others on APB1
  */
 
-#define STM32_TIM18_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_TIM27_FREQUENCY   STM32_HCLK_FREQUENCY
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM3_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM4_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM5_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM6_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM7_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM8_FREQUENCY    STM32_HCLK_FREQUENCY
 
 /* SDIO dividers.  Note that slower clocking is required when DMA is disabled
  * in order to avoid RX overrun/TX underrun errors due to delayed responses
diff --git a/configs/stm3220g-eval/nettest/Make.defs b/configs/stm3220g-eval/nettest/Make.defs
index 525d5e47738968cc5c1b607202498f5a2e4613a1..e1f71e4a39d6883de48a6730f8d2fe2cf000f383 100644
--- a/configs/stm3220g-eval/nettest/Make.defs
+++ b/configs/stm3220g-eval/nettest/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3220g-eval/nettest/defconfig b/configs/stm3220g-eval/nettest/defconfig
index 59d9ac24fadb1178d3716c0faf7cb42cf4218644..f52adbc0c5b76103ca7a343dd2f5b3f1d3831d73 100644
--- a/configs/stm3220g-eval/nettest/defconfig
+++ b/configs/stm3220g-eval/nettest/defconfig
@@ -46,10 +46,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +65,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +80,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -207,6 +210,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 CONFIG_ARCH_CHIP_STM32F207IG=y
@@ -354,6 +358,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -432,6 +442,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -449,9 +465,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART3_SERIALDRIVER=y
 # CONFIG_STM32_USART3_1WIREDRIVER is not set
 # CONFIG_USART3_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -476,6 +500,7 @@ CONFIG_STM32_PHYSR_100MBPS=0x0000
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 # CONFIG_STM32_ETH_PTP is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -570,6 +595,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -585,9 +611,12 @@ CONFIG_DISABLE_ENVIRON=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2012
 CONFIG_START_MONTH=12
@@ -636,6 +665,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -643,13 +673,17 @@ CONFIG_NAME_MAX=32
 CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGWORK=17
 # CONFIG_MODULE is not set
 
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -667,6 +701,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -682,12 +717,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -695,8 +734,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -704,6 +753,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -725,10 +775,8 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -752,9 +800,10 @@ CONFIG_ETH0_PHY_DP83848C=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -799,19 +848,26 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USART3_IFLOWCONTROL is not set
 # CONFIG_USART3_OFLOWCONTROL is not set
 # CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -819,13 +875,11 @@ CONFIG_USART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -944,12 +998,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -989,7 +1037,7 @@ CONFIG_MM_REGIONS=1
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -997,6 +1045,8 @@ CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1011,7 +1061,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -1019,8 +1068,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1046,9 +1097,10 @@ CONFIG_HAVE_CXXINITIALIZE=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -1056,10 +1108,10 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1082,20 +1134,18 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1107,9 +1157,9 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
@@ -1132,8 +1182,9 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1147,9 +1198,9 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
@@ -1171,16 +1222,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3220g-eval/nsh/Make.defs b/configs/stm3220g-eval/nsh/Make.defs
index a55be90f7bc6f336013469001f9ec6be55582d27..cd1dd159e6dd22ee25d393aa275f0fbc427c3b9c 100644
--- a/configs/stm3220g-eval/nsh/Make.defs
+++ b/configs/stm3220g-eval/nsh/Make.defs
@@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3220g-eval/nsh/defconfig b/configs/stm3220g-eval/nsh/defconfig
index aca94bb076c967989608268f6190ab9d9cf77b61..6d006d350e68f2b9e68cab35e11ee42af1b20249 100644
--- a/configs/stm3220g-eval/nsh/defconfig
+++ b/configs/stm3220g-eval/nsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +202,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 CONFIG_ARCH_CHIP_STM32F207IG=y
@@ -346,6 +350,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -425,6 +435,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -442,9 +458,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART3_SERIALDRIVER=y
 # CONFIG_STM32_USART3_1WIREDRIVER is not set
 # CONFIG_USART3_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -484,6 +508,7 @@ CONFIG_STM32_PHYSR_100MBPS=0x0000
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 # CONFIG_STM32_ETH_PTP is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -574,12 +599,11 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -595,9 +619,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=8
@@ -649,6 +676,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -657,6 +685,7 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
@@ -668,8 +697,11 @@ CONFIG_MQ_MAXMSGSIZE=32
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -687,6 +719,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -707,12 +740,16 @@ CONFIG_I2C_POLLED=y
 # CONFIG_I2C_TRACE is not set
 # CONFIG_I2C_DRIVER is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 # CONFIG_RTC_ALARM is not set
@@ -725,8 +762,18 @@ CONFIG_RTC_DATETIME=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -734,6 +781,7 @@ CONFIG_RTC_DATETIME=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -763,7 +811,9 @@ CONFIG_MTD=y
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
 # CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
@@ -791,10 +841,8 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -818,9 +866,10 @@ CONFIG_ETH0_PHY_DP83848C=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -866,19 +915,26 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USART3_IFLOWCONTROL is not set
 # CONFIG_USART3_OFLOWCONTROL is not set
 # CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -886,13 +942,11 @@ CONFIG_USART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -1032,12 +1086,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1087,6 +1135,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1104,7 +1154,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
@@ -1122,8 +1171,10 @@ CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1154,21 +1205,23 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1179,26 +1232,25 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1206,14 +1258,14 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1233,8 +1285,9 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1247,21 +1300,21 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1314,13 +1367,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1338,6 +1391,8 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
@@ -1364,6 +1419,7 @@ CONFIG_NSH_CONSOLE=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1394,14 +1450,14 @@ CONFIG_NSH_MAX_ROUNDTRIP=20
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_SYSTEM_I2CTOOL is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_I2CTOOL is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1410,6 +1466,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3220g-eval/nsh2/Make.defs b/configs/stm3220g-eval/nsh2/Make.defs
index 1872665fcf4cdcd5ab28f48c5f95024d2cd5bf34..518cacac287c7f96e0a13fbe14309a6f31b6b71e 100644
--- a/configs/stm3220g-eval/nsh2/Make.defs
+++ b/configs/stm3220g-eval/nsh2/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3220g-eval/nsh2/defconfig b/configs/stm3220g-eval/nsh2/defconfig
index b689019b0163f1e1c3405f0aba730e7e5ddaa9d0..34f4a3302038f01d21eb4c73ccdf69e943668e91 100644
--- a/configs/stm3220g-eval/nsh2/defconfig
+++ b/configs/stm3220g-eval/nsh2/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +67,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +82,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -107,7 +112,9 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM33 is not set
 # CONFIG_ARCH_CORTEXM4 is not set
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -152,8 +159,6 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
 CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # STM32 Configuration Options
@@ -208,6 +213,7 @@ CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 CONFIG_ARCH_CHIP_STM32F207IG=y
@@ -355,6 +361,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -435,6 +447,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_DMACAPABLE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -460,7 +478,9 @@ CONFIG_STM32_I2CTIMEOTICKS=500
 #
 # SDIO Configuration
 #
-CONFIG_SDIO_DMAPRIO=0x00010000
+CONFIG_STM32_SDIO_DMA=y
+CONFIG_STM32_SDIO_DMAPRIO=0x00010000
+# CONFIG_STM32_SDIO_WIDTH_D1_ONLY is not set
 # CONFIG_STM32_HAVE_RTC_COUNTER is not set
 # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
 CONFIG_RTC_MAGIC_REG=0
@@ -486,6 +506,7 @@ CONFIG_STM32_PHYSR_100MBPS=0x0000
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 # CONFIG_STM32_ETH_PTP is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -576,18 +597,15 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -604,9 +622,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=16
@@ -616,6 +637,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -632,6 +654,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -701,6 +725,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -721,12 +746,16 @@ CONFIG_I2C_POLLED=y
 # CONFIG_I2C_TRACE is not set
 CONFIG_I2C_DRIVER=y
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 # CONFIG_RTC_ALARM is not set
@@ -739,8 +768,18 @@ CONFIG_RTC_DATETIME=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -748,6 +787,7 @@ CONFIG_RTC_DATETIME=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -755,11 +795,13 @@ CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
 # CONFIG_MMCSD_MMCSUPPORT is not set
 # CONFIG_MMCSD_HAVECARDDETECT is not set
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y
 CONFIG_MMCSD_SDIO=y
 CONFIG_SDIO_PREFLIGHT=y
 # CONFIG_SDIO_MUXBUS is not set
 # CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 # CONFIG_SDIO_BLOCKSETUP is not set
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -782,7 +824,9 @@ CONFIG_MTD=y
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
 # CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
@@ -812,10 +856,8 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -839,8 +881,9 @@ CONFIG_ETH0_PHY_DP83848C=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
+# CONFIG_SERIAL_REMOVABLE is not set
+# CONFIG_SERIAL_CONSOLE is not set
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -870,23 +913,30 @@ CONFIG_SERIAL=y
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 CONFIG_RAMLOG=y
-CONFIG_RAMLOG_SYSLOG=y
 CONFIG_RAMLOG_BUFSIZE=1024
 # CONFIG_RAMLOG_CRLF is not set
 CONFIG_RAMLOG_NONBLOCKING=y
 CONFIG_RAMLOG_NPOLLWAITERS=4
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_RAMLOG_SYSLOG=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -894,13 +944,11 @@ CONFIG_RAMLOG_NPOLLWAITERS=4
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -1040,13 +1088,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-# CONFIG_SYSLOG_CHAR is not set
-
 #
 # Graphics Support
 #
@@ -1091,11 +1132,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1113,9 +1171,11 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -1130,8 +1190,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1162,21 +1224,23 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1187,26 +1251,25 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1214,16 +1277,16 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1243,8 +1306,9 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1258,22 +1322,22 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1326,13 +1390,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1350,11 +1414,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_FILEIOSIZE=512
@@ -1375,6 +1442,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1419,12 +1487,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=1
 CONFIG_I2CTOOL_MAXBUS=3
@@ -1432,7 +1500,7 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=100000
-# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1441,6 +1509,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3220g-eval/nxwm/Make.defs b/configs/stm3220g-eval/nxwm/Make.defs
index 0a94be44478a4bcb3c0ee3b4d14954400d53d653..49eda2b97db4cd7a31110075f3b5714a3d4fa68e 100644
--- a/configs/stm3220g-eval/nxwm/Make.defs
+++ b/configs/stm3220g-eval/nxwm/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3220g-eval/nxwm/defconfig b/configs/stm3220g-eval/nxwm/defconfig
index fadce2d0abcdddbbe6892dd4926271b729132d20..11b63db793db6d9fe1193125b03e9f4bc843bcf5 100644
--- a/configs/stm3220g-eval/nxwm/defconfig
+++ b/configs/stm3220g-eval/nxwm/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +67,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +82,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -207,6 +212,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 CONFIG_ARCH_CHIP_STM32F207IG=y
@@ -354,6 +360,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -434,6 +446,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_FSMC_SRAM is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -451,9 +469,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART3_SERIALDRIVER=y
 # CONFIG_STM32_USART3_1WIREDRIVER is not set
 # CONFIG_USART3_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -493,6 +519,7 @@ CONFIG_STM32_PHYSR_100MBPS=0x0000
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 # CONFIG_STM32_ETH_PTP is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -583,8 +610,6 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
@@ -593,7 +618,13 @@ CONFIG_NSH_MMCSDSLOTNO=0
 # CONFIG_STM32_ILI9325_DISABLE is not set
 CONFIG_STM3220G_LCD=y
 CONFIG_LCD_RDSHIFT=5
-# CONFIG_LIB_BOARDCTL is not set
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+CONFIG_BOARDCTL_TSCTEST=y
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
 
 #
 # RTOS Features
@@ -608,9 +639,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=8
@@ -620,6 +654,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -636,6 +671,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -678,7 +715,7 @@ CONFIG_SIG_SIGWORK=17
 # POSIX Message Queue Options
 #
 CONFIG_PREALLOC_MQ_MSGS=32
-CONFIG_MQ_MAXMSGSIZE=48
+CONFIG_MQ_MAXMSGSIZE=64
 # CONFIG_MODULE is not set
 
 #
@@ -706,6 +743,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -726,12 +764,16 @@ CONFIG_I2C_POLLED=y
 # CONFIG_I2C_TRACE is not set
 # CONFIG_I2C_DRIVER is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 # CONFIG_RTC_ALARM is not set
@@ -765,11 +807,20 @@ CONFIG_STMPE811_TEMP_DISABLE=y
 # CONFIG_BUTTONS is not set
 # CONFIG_DJOYSTICK is not set
 # CONFIG_AJOYSTICK is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 CONFIG_LCD_NOGETRUN=y
@@ -783,6 +834,7 @@ CONFIG_LCD_MAXPOWER=1
 # CONFIG_LCD_NOKIA6100 is not set
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 # CONFIG_LCD_SSD1351 is not set
@@ -797,12 +849,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
-# CONFIG_LCD_BACKPACK is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -810,6 +857,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -840,10 +888,8 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -867,9 +913,10 @@ CONFIG_ETH0_PHY_DP83848C=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -915,19 +962,26 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USART3_IFLOWCONTROL is not set
 # CONFIG_USART3_OFLOWCONTROL is not set
 # CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -935,13 +989,11 @@ CONFIG_USART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -1080,12 +1132,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1173,13 +1219,14 @@ CONFIG_NXFONT_SANS22X29B=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 CONFIG_NXTERM=y
 
 #
 # NxTerm Output Text/Graphics Options
 #
 CONFIG_NXTERM_BPP=16
-CONFIG_NXTERM_CURSORCHAR=137
+CONFIG_NXTERM_CURSORCHAR=95
 CONFIG_NXTERM_MXCHARS=325
 CONFIG_NXTERM_CACHESIZE=32
 CONFIG_NXTERM_LINESEPARATION=0
@@ -1199,7 +1246,10 @@ CONFIG_NX_MULTIUSER=y
 CONFIG_NX_BLOCKING=y
 CONFIG_NX_MXSERVERMSGS=32
 CONFIG_NX_MXCLIENTMSGS=16
-# CONFIG_NX_NXSTART is not set
+# CONFIG_NXSTART_EXTERNINIT is not set
+CONFIG_NXSTART_SERVERPRIO=110
+CONFIG_NXSTART_SERVERSTACK=2048
+CONFIG_NXSTART_DEVNO=0
 
 #
 # Memory Management
@@ -1245,6 +1295,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1262,9 +1314,9 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 # CONFIG_NETDB_DNSCLIENT is not set
@@ -1272,8 +1324,10 @@ CONFIG_LIBC_NETDB=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1299,21 +1353,23 @@ CONFIG_HAVE_CXXINITIALIZE=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -1324,20 +1380,18 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1351,10 +1405,10 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
@@ -1379,8 +1433,9 @@ CONFIG_HAVE_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1392,21 +1447,21 @@ CONFIG_HAVE_CXXINITIALIZE=y
 #
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1458,12 +1513,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1481,11 +1536,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 CONFIG_NSH_FILEIOSIZE=512
@@ -1506,6 +1564,7 @@ CONFIG_NSH_CONSOLE=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1546,10 +1605,8 @@ CONFIG_NXWIDGETS=y
 # NX Server/Device Configuration
 #
 CONFIG_NXWIDGETS_FLICKERFREE=y
-CONFIG_NXWIDGETS_DEVNO=0
+# CONFIG_NXWIDGETS_EXTERNINIT is not set
 CONFIG_NXWIDGET_SERVERINIT=y
-CONFIG_NXWIDGETS_SERVERPRIO=110
-CONFIG_NXWIDGETS_SERVERSTACK=2048
 CONFIG_NXWIDGETS_CLIENTPRIO=100
 CONFIG_NXWIDGETS_LISTENERPRIO=100
 CONFIG_NXWIDGETS_LISTENERSTACK=2048
@@ -1648,7 +1705,7 @@ CONFIG_NXWM_TASKBAR_LEFT=y
 CONFIG_NXWM_STARTWINDOW_VSPACING=4
 CONFIG_NXWM_STARTWINDOW_HSPACING=4
 # CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set
-CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm"
+CONFIG_NXWM_STARTWINDOW_MQNAME="nxwm"
 CONFIG_NXWM_STARTWINDOW_MXMSGS=32
 CONFIG_NXWM_STARTWINDOW_MXMPRIO=42
 CONFIG_NXWM_STARTWINDOW_PRIO=100
@@ -1726,13 +1783,13 @@ CONFIG_NXWM_HEXCALCULATOR_FONTID=5
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_SYSTEM_I2CTOOL is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_I2CTOOL is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1741,6 +1798,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3220g-eval/src/stm3220g-eval.h b/configs/stm3220g-eval/src/stm3220g-eval.h
index d00b0e8eaeae444b0599b946e12090d0c1af0f28..1e3087109f491931c8a3bd93bceffb8958f69801 100644
--- a/configs/stm3220g-eval/src/stm3220g-eval.h
+++ b/configs/stm3220g-eval/src/stm3220g-eval.h
@@ -1,7 +1,7 @@
 /****************************************************************************************************
  * configs/stm3220g_eval/src/stm3220g.h
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -249,6 +249,42 @@ void weak_function stm32_usbinitialize(void);
 int stm32_usbhost_initialize(void);
 #endif
 
+/****************************************************************************************************
+ * Name: stm32_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ****************************************************************************************************/
+
+#ifdef CONFIG_PWM
+int stm32_pwm_setup(void);
+#endif
+
+/****************************************************************************************************
+ * Name: stm32_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ****************************************************************************************************/
+
+#ifdef CONFIG_ADC
+int stm32_adc_setup(void);
+#endif
+
+/****************************************************************************************************
+ * Name: stm32_can_setup
+ *
+ * Description:
+ *  Initialize CAN and register the CAN device
+ *
+ ****************************************************************************************************/
+
+#ifdef CONFIG_CAN
+int stm32_can_setup(void);
+#endif
+
 /****************************************************************************************************
  * Name: stm32_extmemgpios
  *
diff --git a/configs/stm3220g-eval/src/stm32_adc.c b/configs/stm3220g-eval/src/stm32_adc.c
index f79ca23c535f6046635765c0b7b65401b19f6f57..e020101a01fb1246a8b05207a2a9723a2aefe9f4 100644
--- a/configs/stm3220g-eval/src/stm32_adc.c
+++ b/configs/stm3220g-eval/src/stm32_adc.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm3220g-eval/src/stm32_adc.c
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -99,24 +99,19 @@ static const uint8_t  g_chanlist[ADC3_NCHANNELS] = {7};
 static const uint32_t g_pinlist[ADC3_NCHANNELS]  = {GPIO_ADC3_IN7};
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_adc_setup
+ * Name: stm32_adc_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/adc.
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
-int board_adc_setup(void)
+int stm32_adc_setup(void)
 {
 #ifdef CONFIG_STM32_ADC3
   static bool initialized = false;
@@ -140,7 +135,7 @@ int board_adc_setup(void)
       adc = stm32_adcinitialize(3, g_chanlist, ADC3_NCHANNELS);
       if (adc == NULL)
         {
-          adbg("ERROR: Failed to get ADC interface\n");
+          aerr("ERROR: Failed to get ADC interface\n");
           return -ENODEV;
         }
 
@@ -149,7 +144,7 @@ int board_adc_setup(void)
       ret = adc_register("/dev/adc0", adc);
       if (ret < 0)
         {
-          adbg("adc_register failed: %d\n", ret);
+          aerr("ERROR: adc_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/stm3220g-eval/src/stm32_appinit.c b/configs/stm3220g-eval/src/stm32_appinit.c
index 89795b54d50a478650e660bf9f508140c81fb1d4..0fd45e4a6e5570003b85c15d7f670b3b58b11850 100644
--- a/configs/stm3220g-eval/src/stm32_appinit.c
+++ b/configs/stm3220g-eval/src/stm32_appinit.c
@@ -142,14 +142,14 @@ static void stm32_i2c_register(int bus)
   i2c = stm32_i2cbus_initialize(bus);
   if (i2c == NULL)
     {
-      dbg("ERROR: Failed to get I2C%d interface\n", bus);
+      _err("ERROR: Failed to get I2C%d interface\n", bus);
     }
   else
     {
       ret = i2c_register(i2c, bus);
       if (ret < 0)
         {
-          dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
+          _err("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
           stm32_i2cbus_uninitialize(i2c);
         }
     }
@@ -219,9 +219,7 @@ int board_app_initialize(uintptr_t arg)
 #ifdef HAVE_MMCSD
   FAR struct sdio_dev_s *sdio;
 #endif
-#if defined(HAVE_MMCSD) || defined (HAVE_USBHOST)
   int ret;
-#endif
 
   /* Register I2C drivers on behalf of the I2C tool */
 
@@ -294,5 +292,36 @@ int board_app_initialize(uintptr_t arg)
     }
 #endif
 
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device. */
+
+  ret = stm32_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_pwm_setup() failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_ADC
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = stm32_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_adc_setup failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_CAN
+  /* Initialize CAN and register the CAN driver. */
+
+  ret = stm32_can_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_can_setup failed: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
   return OK;
 }
diff --git a/configs/stm3220g-eval/src/stm32_autoleds.c b/configs/stm3220g-eval/src/stm32_autoleds.c
index e2d5a67aa1a09634f7762a1e29f0dae1e81f50dd..476816cac11256148dea4c539d4b7b4d473b094e 100644
--- a/configs/stm3220g-eval/src/stm32_autoleds.c
+++ b/configs/stm3220g-eval/src/stm32_autoleds.c
@@ -58,18 +58,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* The following definitions map the encoded LED setting to GPIO settings */
 
 #define STM3210E_LED1     (1 << 0)
diff --git a/configs/stm3220g-eval/src/stm32_buttons.c b/configs/stm3220g-eval/src/stm32_buttons.c
index 85db973fa5595bae04cdc6ca34dc78f745e0fd7c..115fea249ea6f0c16aa66d4d0d6a13dbb256cd14 100644
--- a/configs/stm3220g-eval/src/stm32_buttons.c
+++ b/configs/stm3220g-eval/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/stm3220g-eval/src/stm32_buttons.c
  *
- *   Copyright (C) 2012, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -49,18 +50,10 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /* Pin configuration for each STM3210E-EVAL button.  This array is indexed by
  * the BUTTON_* and JOYSTICK_* definitions in board.h
  */
@@ -151,23 +144,23 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   /* The following should be atomic */
 
   if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
     {
-      oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler, arg);
     }
-  return oldhandler;
+
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/stm3220g-eval/src/stm32_can.c b/configs/stm3220g-eval/src/stm32_can.c
index 1c9b4fda7712d4b5f7b2fbf2daa3a48abba7d5cd..e362ad95c5bfa4db1f90c42625eb9dc144fe5a98 100644
--- a/configs/stm3220g-eval/src/stm32_can.c
+++ b/configs/stm3220g-eval/src/stm32_can.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm3220g-eval/src/stm32_can.c
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,7 +42,7 @@
 #include 
 #include 
 
-#include 
+#include 
 #include 
 
 #include "chip.h"
@@ -52,7 +52,7 @@
 #include "stm32_can.h"
 #include "stm3220g-eval.h"
 
-#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2))
+#ifdef CONFIG_CAN
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -70,72 +70,46 @@
 #  define CAN_PORT 2
 #endif
 
-/* Debug ***************************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
-
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
-#else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_can_initialize
+ * Name: stm32_can_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/can.
+ *  Initialize CAN and register the CAN device
  *
  ************************************************************************************/
 
-int board_can_initialize(void)
+int stm32_can_setup(void)
 {
-  static bool initialized = false;
+#if defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)
   struct can_dev_s *can;
   int ret;
 
-  /* Check if we have already initialized */
+  /* Call stm32_caninitialize() to get an instance of the CAN interface */
 
-  if (!initialized)
+  can = stm32_caninitialize(CAN_PORT);
+  if (can == NULL)
     {
-      /* Call stm32_caninitialize() to get an instance of the CAN interface */
-
-      can = stm32_caninitialize(CAN_PORT);
-      if (can == NULL)
-        {
-          candbg("ERROR:  Failed to get CAN interface\n");
-          return -ENODEV;
-        }
-
-      /* Register the CAN driver at "/dev/can0" */
-
-      ret = can_register("/dev/can0", can);
-      if (ret < 0)
-        {
-          candbg("ERROR: can_register failed: %d\n", ret);
-          return ret;
-        }
+      canerr("ERROR:  Failed to get CAN interface\n");
+      return -ENODEV;
+    }
 
-      /* Now we are initialized */
+  /* Register the CAN driver at "/dev/can0" */
 
-      initialized = true;
+  ret = can_register("/dev/can0", can);
+  if (ret < 0)
+    {
+      canerr("ERROR: can_register failed: %d\n", ret);
+      return ret;
     }
 
   return OK;
+#else
+  return -ENODEV;
+#endif
 }
 
-#endif /* CONFIG_CAN && (CONFIG_STM32_CAN1 || CONFIG_STM32_CAN2) */
+#endif /* CONFIG_CAN */
diff --git a/configs/stm3220g-eval/src/stm32_lcd.c b/configs/stm3220g-eval/src/stm32_lcd.c
index 43ef81fe3eff10cb337fa979efba95e8018c6c6f..f2002c137131696603a963524e4fb5dbb213d0bc 100644
--- a/configs/stm3220g-eval/src/stm32_lcd.c
+++ b/configs/stm3220g-eval/src/stm32_lcd.c
@@ -33,6 +33,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  *
  **************************************************************************************/
+
 /* This driver supports the following LCDs on the STM324xG_EVAL board:
  *
  *   AM-240320L8TNQW00H (LCD_ILI9320 or LCD_ILI9321) OR
@@ -109,20 +110,6 @@
 #  define CONFIG_LCD_LANDSCAPE 1
 #endif
 
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
 /* Display/Color Properties ***********************************************************/
 /* Display Resolution */
 
@@ -262,16 +249,6 @@
 #define ILI9321_ID            0x9321
 #define ILI9325_ID            0x9325
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg              dbg
-#  define lcdvdbg             vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /**************************************************************************************
  * Private Type Definition
  **************************************************************************************/
@@ -586,7 +563,7 @@ static int stm3220g_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *bu
 
   /* Buffer must be provided and aligned to a 16-bit address boundary */
 
-  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
 
   /* Write the run to GRAM. */
@@ -704,7 +681,7 @@ static int stm3220g_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
 
   /* Buffer must be provided and aligned to a 16-bit address boundary */
 
-  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
 
   /* Configure according to the LCD type.  Kind of silly with only one LCD type. */
@@ -830,7 +807,7 @@ static int stm3220g_getvideoinfo(FAR struct lcd_dev_s *dev,
                                  FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  lcdvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+  lcdinfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
           g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
   memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
   return OK;
@@ -848,7 +825,7 @@ static int stm3220g_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno
                               FAR struct lcd_planeinfo_s *pinfo)
 {
   DEBUGASSERT(dev && pinfo && planeno == 0);
-  lcdvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+  lcdinfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
   memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
   return OK;
 }
@@ -864,7 +841,7 @@ static int stm3220g_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno
 
 static int stm3220g_getpower(struct lcd_dev_s *dev)
 {
-  lcdvdbg("power: %d\n", 0);
+  lcdinfo("power: %d\n", 0);
   return g_lcddev.power;
 }
 
@@ -900,7 +877,7 @@ static int stm3220g_poweroff(void)
 
 static int stm3220g_setpower(struct lcd_dev_s *dev, int power)
 {
-  lcdvdbg("power: %d\n", power);
+  lcdinfo("power: %d\n", power);
   DEBUGASSERT((unsigned)power <= CONFIG_LCD_MAXPOWER);
 
   /* Set new power level */
@@ -934,7 +911,7 @@ static int stm3220g_setpower(struct lcd_dev_s *dev, int power)
 
 static int stm3220g_getcontrast(struct lcd_dev_s *dev)
 {
-  lcdvdbg("Not implemented\n");
+  lcdinfo("Not implemented\n");
   return -ENOSYS;
 }
 
@@ -948,7 +925,7 @@ static int stm3220g_getcontrast(struct lcd_dev_s *dev)
 
 static int stm3220g_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
 {
-  lcdvdbg("contrast: %d\n", contrast);
+  lcdinfo("contrast: %d\n", contrast);
   return -ENOSYS;
 }
 
@@ -967,7 +944,7 @@ static inline void stm3220g_lcdinitialize(void)
   /* Check LCD ID */
 
   id = stm3220g_readreg(LCD_REG_0);
-  lcddbg("LCD ID: %04x\n", id);
+  lcdinfo("LCD ID: %04x\n", id);
 
   /* Check if the ID is for the STM32_ILI9320 (or ILI9321) or STM32_ILI9325 */
 
@@ -996,7 +973,7 @@ static inline void stm3220g_lcdinitialize(void)
 #else /* if !defined(CONFIG_STM32_ILI9325_DISABLE) */
       g_lcddev.type = LCD_TYPE_ILI9325;
 #endif
-      lcddbg("LCD type: %d\n", g_lcddev.type);
+      lcdinfo("LCD type: %d\n", g_lcddev.type);
 
       /* Start Initial Sequence */
 
@@ -1114,7 +1091,7 @@ static inline void stm3220g_lcdinitialize(void)
     }
   else
     {
-      lcddbg("Unsupported LCD type\n");
+      lcderr("ERROR: Unsupported LCD type\n");
     }
 }
 
@@ -1134,7 +1111,7 @@ static inline void stm3220g_lcdinitialize(void)
 
 int board_lcd_initialize(void)
 {
-  lcdvdbg("Initializing\n");
+  lcdinfo("Initializing\n");
 
   /* Configure GPIO pins and configure the FSMC to support the LCD */
 
diff --git a/configs/stm3220g-eval/src/stm32_pwm.c b/configs/stm3220g-eval/src/stm32_pwm.c
index 9c0467138a924d7b327e76dc367d99f328aba8bc..3063d1621ea3ff3b5404158446d4410ee09df731 100644
--- a/configs/stm3220g-eval/src/stm32_pwm.c
+++ b/configs/stm3220g-eval/src/stm32_pwm.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm3220g-eval/src/stm32_pwm.c
  *
- *   Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -43,7 +43,7 @@
 #include 
 
 #include 
-#include 
+#include 
 
 #include 
 
@@ -65,24 +65,19 @@
 
 #ifdef CONFIG_PWM
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_pwm_setup
+ * Name: stm32_pwm_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/pwm.
+ *   Initialize PWM and register the PWM device.
  *
  ************************************************************************************/
 
-int board_pwm_setup(void)
+int stm32_pwm_setup(void)
 {
   static bool initialized = false;
   struct pwm_lowerhalf_s *pwm;
@@ -97,7 +92,7 @@ int board_pwm_setup(void)
       pwm = stm32_pwminitialize(STM3220G_EVAL_PWMTIMER);
       if (!pwm)
         {
-          dbg("Failed to get the STM32 PWM lower half\n");
+          aerr("ERROR: Failed to get the STM32 PWM lower half\n");
           return -ENODEV;
         }
 
@@ -106,7 +101,7 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/pwm0", pwm);
       if (ret < 0)
         {
-          adbg("pwm_register failed: %d\n", ret);
+          aerr("ERROR: pwm_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/stm3220g-eval/src/stm32_spi.c b/configs/stm3220g-eval/src/stm32_spi.c
index 5f6332c7fcaf7987987326946bae5093d295c381..9e171b9bfaf551eb61980d5789473c659c554791 100644
--- a/configs/stm3220g-eval/src/stm32_spi.c
+++ b/configs/stm3220g-eval/src/stm32_spi.c
@@ -53,32 +53,6 @@
 
 #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -124,7 +98,7 @@ void weak_function stm32_spidev_initialize(void)
 #ifdef CONFIG_STM32_SPI1
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -136,7 +110,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI2
 void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -148,7 +122,7 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI3
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
diff --git a/configs/stm3220g-eval/src/stm32_stmpe811.c b/configs/stm3220g-eval/src/stm32_stmpe811.c
index c3fcf6de4b05833bab1ff8c4079867e242c2032b..ec79a318644e6d284b7aba6c123e8dfa247e7707 100644
--- a/configs/stm3220g-eval/src/stm32_stmpe811.c
+++ b/configs/stm3220g-eval/src/stm32_stmpe811.c
@@ -137,6 +137,7 @@ struct stm32_stmpe811config_s
 
   STMPE811_HANDLE handle;   /* The STMPE811 driver handle */
   xcpt_t          handler;  /* The STMPE811 interrupt handler */
+  void           *arg;      /* Interrupt handler argument */
 };
 
 /****************************************************************************
@@ -152,7 +153,8 @@ struct stm32_stmpe811config_s
  * clear   - Acknowledge/clear any pending GPIO interrupt
  */
 
-static int  stmpe811_attach(FAR struct stmpe811_config_s *state, xcpt_t isr);
+static int  stmpe811_attach(FAR struct stmpe811_config_s *state, xcpt_t isr,
+                            FAR void *arg);
 static void stmpe811_enable(FAR struct stmpe811_config_s *state, bool enable);
 static void stmpe811_clear(FAR struct stmpe811_config_s *state);
 
@@ -191,6 +193,7 @@ static struct stm32_stmpe811config_s g_stmpe811config =
     .clear     = stmpe811_clear,
   },
   .handler     = NULL,
+  .arg         = NULL,
 };
 #endif
 
@@ -207,16 +210,18 @@ static struct stm32_stmpe811config_s g_stmpe811config =
  * clear   - Acknowledge/clear any pending GPIO interrupt
  */
 
-static int stmpe811_attach(FAR struct stmpe811_config_s *state, xcpt_t isr)
+static int stmpe811_attach(FAR struct stmpe811_config_s *state, xcpt_t isr,
+                           FAR void *arg)
 {
   FAR struct stm32_stmpe811config_s *priv = (FAR struct stm32_stmpe811config_s *)state;
 
-  ivdbg("Saving handler %p\n", isr);
+  iinfo("Saving handler %p\n", isr);
   DEBUGASSERT(priv);
 
   /* Just save the handler.  We will use it when EXTI interruptsare enabled */
 
   priv->handler = isr;
+  priv->arg     = arg;
   return OK;
 }
 
@@ -235,14 +240,17 @@ static void stmpe811_enable(FAR struct stmpe811_config_s *state, bool enable)
     {
       /* Configure the EXTI interrupt using the SAVED handler */
 
-      (void)stm32_gpiosetevent(GPIO_IO_EXPANDER, true, true, true, priv->handler);
+      (void)stm32_gpiosetevent(GPIO_IO_EXPANDER, true, true, true,
+                               priv->handler, priv->arg);
     }
   else
     {
       /* Configure the EXTI interrupt with a NULL handler to disable it */
 
-     (void)stm32_gpiosetevent(GPIO_IO_EXPANDER, false, false, false, NULL);
+     (void)stm32_gpiosetevent(GPIO_IO_EXPANDER, false, false, false,
+                              NULL, NULL);
     }
+
   leave_critical_section(flags);
 }
 
@@ -279,14 +287,14 @@ int board_tsc_setup(int minor)
   FAR struct i2c_master_s *dev;
   int ret;
 
-  idbg("minor %d\n", minor);
+  iinfo("minor %d\n", minor);
   DEBUGASSERT(minor == 0);
 
   /* Check if we are already initialized */
 
   if (!g_stmpe811config.handle)
     {
-      ivdbg("Initializing\n");
+      iinfo("Initializing\n");
 
       /* Configure the STMPE811 interrupt pin as an input */
 
@@ -297,7 +305,7 @@ int board_tsc_setup(int minor)
       dev = stm32_i2cbus_initialize(CONFIG_STMPE811_I2CDEV);
       if (!dev)
         {
-          idbg("Failed to initialize I2C bus %d\n", CONFIG_STMPE811_I2CDEV);
+          ierr("ERROR: Failed to initialize I2C bus %d\n", CONFIG_STMPE811_I2CDEV);
           return -ENODEV;
         }
 
@@ -307,7 +315,7 @@ int board_tsc_setup(int minor)
         stmpe811_instantiate(dev, (FAR struct stmpe811_config_s *)&g_stmpe811config);
       if (!g_stmpe811config.handle)
         {
-          idbg("Failed to instantiate the STMPE811 driver\n");
+          ierr("ERROR: Failed to instantiate the STMPE811 driver\n");
           return -ENODEV;
         }
 
@@ -316,7 +324,7 @@ int board_tsc_setup(int minor)
       ret = stmpe811_register(g_stmpe811config.handle, CONFIG_STMPE811_DEVMINOR);
       if (ret < 0)
         {
-          idbg("Failed to register STMPE driver: %d\n", ret);
+          ierr("ERROR: Failed to register STMPE driver: %d\n", ret);
           /* stm32_i2cbus_uninitialize(dev); */
           return -ENODEV;
         }
diff --git a/configs/stm3220g-eval/src/stm32_usb.c b/configs/stm3220g-eval/src/stm32_usb.c
index 3d0e183b6118a8a1e5ac9d042918273c13a1d505..33809073c8430e9055bcff9f567bad1c6a19e35f 100644
--- a/configs/stm3220g-eval/src/stm32_usb.c
+++ b/configs/stm3220g-eval/src/stm32_usb.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm3220g-eval/src/stm32_usb.c
  *
- *   Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012-2013, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -106,13 +106,13 @@ static int usbhost_waiter(int argc, char *argv[])
 {
   struct usbhost_hubport_s *hport;
 
-  uvdbg("Running\n");
+  uinfo("Running\n");
   for (;;)
     {
       /* Wait for the device to change state */
 
       DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
-      uvdbg("%s\n", hport->connected ? "connected" : "disconnected");
+      uinfo("%s\n", hport->connected ? "connected" : "disconnected");
 
       /* Did we just become connected? */
 
@@ -176,7 +176,7 @@ int stm32_usbhost_initialize(void)
    * that we care about:
    */
 
-  uvdbg("Register class drivers\n");
+  uinfo("Register class drivers\n");
 
 #ifdef CONFIG_USBHOST_MSC
   /* Register the USB mass storage class class */
@@ -184,7 +184,7 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_msc_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the mass storage class: %d\n", ret);
+      uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
     }
 #endif
 
@@ -194,19 +194,19 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_cdcacm_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
+      uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
     }
 #endif
 
   /* Then get an instance of the USB host interface */
 
-  uvdbg("Initialize USB host\n");
+  uinfo("Initialize USB host\n");
   g_usbconn = stm32_otgfshost_initialize(0);
   if (g_usbconn)
     {
       /* Start a thread to handle device connection. */
 
-      uvdbg("Start usbhost_waiter\n");
+      uinfo("Start usbhost_waiter\n");
 
       pid = task_create("usbhost", CONFIG_USBHOST_DEFPRIO,
                         CONFIG_USBHOST_STACKSIZE,
@@ -273,16 +273,18 @@ void stm32_usbhost_vbusdrive(int iface, bool enable)
  *
  * Input Parameter:
  *   handler - New overcurrent interrupt handler
+ *   arg     - The argument provided for the interrupt handler
  *
  * Returned value:
- *   Old overcurrent interrupt handler
+ *   Zero (OK) is returned on success.  Otherwise, a negated errno value is returned
+ *   to indicate the nature of the failure.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_USBHOST
-xcpt_t stm32_setup_overcurrent(xcpt_t handler)
+int stm32_setup_overcurrent(xcpt_t handler, void *arg)
 {
-  return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler);
+  return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler, arg);
 }
 #endif
 
@@ -300,7 +302,7 @@ xcpt_t stm32_setup_overcurrent(xcpt_t handler)
 #ifdef CONFIG_USBDEV
 void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
 #endif
 
diff --git a/configs/stm3220g-eval/src/stm32_userleds.c b/configs/stm3220g-eval/src/stm32_userleds.c
index 182e3b17529d08b4c8e16ade0ec1885d91b9cf2b..a94c8c360fc0d5b9aeb1c4d367944d237bb4c916 100644
--- a/configs/stm3220g-eval/src/stm32_userleds.c
+++ b/configs/stm3220g-eval/src/stm32_userleds.c
@@ -53,22 +53,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
diff --git a/configs/stm3220g-eval/telnetd/Make.defs b/configs/stm3220g-eval/telnetd/Make.defs
index 34b07b3accab6ff73da81e19fc9f0c0b22da7db7..8d6f5d5f137aa525266cd25e2ac4334171118156 100644
--- a/configs/stm3220g-eval/telnetd/Make.defs
+++ b/configs/stm3220g-eval/telnetd/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3220g-eval/telnetd/defconfig b/configs/stm3220g-eval/telnetd/defconfig
index 2e65dced62706fb1e7729b16dafd60d99f070355..3c966b124b336af0fa7930312c3e582952106b07 100644
--- a/configs/stm3220g-eval/telnetd/defconfig
+++ b/configs/stm3220g-eval/telnetd/defconfig
@@ -46,10 +46,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +65,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +80,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -207,6 +210,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 CONFIG_ARCH_CHIP_STM32F207IG=y
@@ -354,6 +358,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -432,6 +442,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -449,9 +465,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART3_SERIALDRIVER=y
 # CONFIG_STM32_USART3_1WIREDRIVER is not set
 # CONFIG_USART3_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -476,6 +500,7 @@ CONFIG_STM32_PHYSR_100MBPS=0x0000
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 # CONFIG_STM32_ETH_PTP is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -570,6 +595,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -585,9 +611,12 @@ CONFIG_DISABLE_ENVIRON=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2012
 CONFIG_START_MONTH=12
@@ -636,6 +665,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -643,13 +673,17 @@ CONFIG_NAME_MAX=32
 CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGWORK=17
 # CONFIG_MODULE is not set
 
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -667,6 +701,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -682,12 +717,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -695,8 +734,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -704,6 +753,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -727,10 +777,8 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -754,9 +802,10 @@ CONFIG_ETH0_PHY_DP83848C=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -801,19 +850,26 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USART3_IFLOWCONTROL is not set
 # CONFIG_USART3_OFLOWCONTROL is not set
 # CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -821,13 +877,11 @@ CONFIG_USART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -946,12 +1000,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -999,6 +1047,8 @@ CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1013,7 +1063,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -1021,8 +1070,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1048,9 +1099,10 @@ CONFIG_HAVE_CXXINITIALIZE=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -1058,10 +1110,10 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1071,20 +1123,18 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1104,9 +1154,9 @@ CONFIG_EXAMPLES_TELNETD_CLIENTPRIO=128
 CONFIG_EXAMPLES_TELNETD_CLIENTSTACKSIZE=2048
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
@@ -1129,8 +1179,9 @@ CONFIG_EXAMPLES_TELNETD_CLIENTSTACKSIZE=2048
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1144,9 +1195,9 @@ CONFIG_EXAMPLES_TELNETD_CLIENTSTACKSIZE=2048
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
@@ -1168,16 +1219,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3240g-eval/README.txt b/configs/stm3240g-eval/README.txt
index e6dfe3cf53bd26fe95e31cef83bc6b2fa89ba657..4b9a1f3ce8faceec330c63d5dd3c6de07db0c34b 100644
--- a/configs/stm3240g-eval/README.txt
+++ b/configs/stm3240g-eval/README.txt
@@ -382,7 +382,7 @@ Configuration Options:
   CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
   CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
   CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
-  CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+  CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
     dump of all CAN registers.
 
 FPU
@@ -766,10 +766,10 @@ STM3240G-EVAL-specific Configuration Options
 
     CONFIG_SDIO_DMA - Support DMA data transfers.  Requires CONFIG_STM32_SDIO
       and CONFIG_STM32_DMA2.
-    CONFIG_SDIO_PRI - Select SDIO interrupt prority.  Default: 128
-    CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
+    CONFIG_STM32_SDIO_PRI - Select SDIO interrupt prority.  Default: 128
+    CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
       Default:  Medium
-    CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode.  Default:
+    CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode.  Default:
       4-bit transfer mode.
 
     CONFIG_STM32_PHYADDR - The 5-bit address of the PHY on the board
@@ -810,7 +810,7 @@ STM3240G-EVAL-specific Configuration Options
     CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
     CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
     CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
-    CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+    CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
       dump of all CAN registers.
 
   STM3240G-EVAL LCD Hardware Configuration
@@ -877,9 +877,9 @@ STM3240G-EVAL-specific Configuration Options
    CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts.  Why would you ever
      want to do that?
    CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
-     debug.  Depends on CONFIG_DEBUG.
+     debug.  Depends on CONFIG_DEBUG_FEATURES.
    CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
-     packets. Depends on CONFIG_DEBUG.
+     packets. Depends on CONFIG_DEBUG_FEATURES.
 
 Configurations
 ==============
@@ -1165,7 +1165,7 @@ Where  is one of the following:
 
        Special PWM-only debug options:
 
-       CONFIG_DEBUG_PWM
+       CONFIG_DEBUG_PWM_INFO
 
     5. This example supports the CAN loopback test (apps/examples/can) but this
        must be manually enabled by selecting:
@@ -1179,8 +1179,8 @@ Where  is one of the following:
 
        Special CAN-only debug options:
 
-       CONFIG_DEBUG_CAN
-       CONFIG_CAN_REGDEBUG
+       CONFIG_DEBUG_CAN_INFO
+       CONFIG_STM32_CAN_REGDEBUG
 
     6. This example can support an FTP client.  In order to build in FTP client
        support simply uncomment the following lines in the defconfig file (before
@@ -1327,7 +1327,6 @@ Where  is one of the following:
 
     There are some special settings to make life with only a Telnet
 
-    CONFIG_SYSLOG=y - Enables the System Logging feature.
     CONFIG_RAMLOG=y - Enable the RAM-based logging feature.
     CONFIG_RAMLOG_CONSOLE=y - Use the RAM logger as the default console.
       This means that any console output from non-Telnet threads will
diff --git a/configs/stm3240g-eval/dhcpd/Make.defs b/configs/stm3240g-eval/dhcpd/Make.defs
index df5aa899ba15eadfd2cffdd1e5d063ef994ee4bb..dccf4e50947730c06fb52416f47456f97ad55f57 100644
--- a/configs/stm3240g-eval/dhcpd/Make.defs
+++ b/configs/stm3240g-eval/dhcpd/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3240g-eval/dhcpd/defconfig b/configs/stm3240g-eval/dhcpd/defconfig
index e78e7312170eda05e4d877de58e14692196904d6..69eb3f61ace385c359ec94ac17ec2bddb4f1543f 100644
--- a/configs/stm3240g-eval/dhcpd/defconfig
+++ b/configs/stm3240g-eval/dhcpd/defconfig
@@ -46,10 +46,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +65,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +80,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -208,6 +211,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -355,6 +359,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -435,6 +445,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -453,9 +469,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART3_SERIALDRIVER=y
 # CONFIG_STM32_USART3_1WIREDRIVER is not set
 # CONFIG_USART3_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -480,6 +504,7 @@ CONFIG_STM32_PHYSR_100MBPS=0x0000
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 # CONFIG_STM32_ETH_PTP is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -574,6 +599,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -589,9 +615,12 @@ CONFIG_DISABLE_ENVIRON=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=12
@@ -640,6 +669,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -647,13 +677,17 @@ CONFIG_NAME_MAX=32
 CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGWORK=17
 # CONFIG_MODULE is not set
 
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -671,6 +705,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -686,12 +721,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -699,8 +738,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -708,6 +757,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -728,10 +778,8 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -755,9 +803,10 @@ CONFIG_ETH0_PHY_DP83848C=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -803,19 +852,26 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USART3_IFLOWCONTROL is not set
 # CONFIG_USART3_OFLOWCONTROL is not set
 # CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -823,13 +879,11 @@ CONFIG_USART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_GUARDSIZE=2
 
@@ -943,12 +997,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -988,7 +1036,7 @@ CONFIG_MM_REGIONS=2
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 # CONFIG_STDIO_LINEBUFFER is not set
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -996,6 +1044,8 @@ CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1010,7 +1060,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -1019,8 +1068,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1046,24 +1097,26 @@ CONFIG_HAVE_CXXINITIALIZE=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 CONFIG_EXAMPLES_DHCPD=y
 CONFIG_EXAMPLES_DHCPD_NOMAC=y
 CONFIG_EXAMPLES_DHCPD_IPADDR=0x0a000001
 CONFIG_EXAMPLES_DHCPD_DRIPADDR=0x0a000001
 CONFIG_EXAMPLES_DHCPD_NETMASK=0xffffff00
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1072,20 +1125,18 @@ CONFIG_EXAMPLES_DHCPD_NETMASK=0xffffff00
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1099,10 +1150,9 @@ CONFIG_EXAMPLES_DHCPD_NETMASK=0xffffff00
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1124,8 +1174,9 @@ CONFIG_EXAMPLES_DHCPD_NETMASK=0xffffff00
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1150,15 +1201,15 @@ CONFIG_NETUTILS_DHCPD_NETMASK=0xffffff00
 CONFIG_NETUTILS_DHCPD_DNSIP=0x08080808
 CONFIG_NETUTILS_DHCPD_OFFERTIME=3600
 CONFIG_NETUTILS_DHCPD_DECLINETIME=3600
+# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
-# CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
 CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_PPPD is not set
+# CONFIG_NETUTILS_SMTP is not set
+# CONFIG_NETUTILS_TFTPC is not set
 
 #
 # NSH Library
@@ -1177,16 +1228,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3240g-eval/discover/Make.defs b/configs/stm3240g-eval/discover/Make.defs
index 7265cae8abb32d505f3476f281f2a3f17b5630e5..78d1d036defe53862c326b8c7f4ef466b98edd03 100644
--- a/configs/stm3240g-eval/discover/Make.defs
+++ b/configs/stm3240g-eval/discover/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3240g-eval/discover/defconfig b/configs/stm3240g-eval/discover/defconfig
index 6e6116857e0e94c8e186a57cfd05f3c8f63a0177..b151ca1010cab4ff7fc44a8340f226e3bbf61f92 100644
--- a/configs/stm3240g-eval/discover/defconfig
+++ b/configs/stm3240g-eval/discover/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -200,6 +203,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -347,6 +351,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -428,6 +438,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -446,9 +462,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART3_SERIALDRIVER=y
 # CONFIG_STM32_USART3_1WIREDRIVER is not set
 # CONFIG_USART3_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -483,6 +507,7 @@ CONFIG_STM32_PHYSR_100MBPS=0x0000
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 # CONFIG_STM32_ETH_PTP is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -577,6 +602,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -592,9 +618,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=12
@@ -649,6 +678,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -657,6 +687,7 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
@@ -668,8 +699,11 @@ CONFIG_MQ_MAXMSGSIZE=32
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -687,6 +721,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -707,12 +742,16 @@ CONFIG_I2C_POLLED=y
 # CONFIG_I2C_TRACE is not set
 # CONFIG_I2C_DRIVER is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_TIMERS_CS2100CP is not set
@@ -721,8 +760,18 @@ CONFIG_I2C_POLLED=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -730,6 +779,7 @@ CONFIG_I2C_POLLED=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -751,10 +801,8 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -778,9 +826,10 @@ CONFIG_ETH0_PHY_DP83848C=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -826,19 +875,26 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USART3_IFLOWCONTROL is not set
 # CONFIG_USART3_OFLOWCONTROL is not set
 # CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -846,13 +902,11 @@ CONFIG_USART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=650
 CONFIG_NET_ETH_TCP_RECVWNDO=624
 CONFIG_NET_GUARDSIZE=2
@@ -991,12 +1045,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1046,6 +1094,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1063,7 +1113,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
@@ -1081,8 +1130,10 @@ CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1108,21 +1159,27 @@ CONFIG_HAVE_CXXINITIALIZE=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+CONFIG_EXAMPLES_DISCOVER=y
+CONFIG_EXAMPLES_DISCOVER_DHCPC=y
+CONFIG_EXAMPLES_DISCOVER_NOMAC=y
+CONFIG_EXAMPLES_DISCOVER_DRIPADDR=0xc0a80201
+CONFIG_EXAMPLES_DISCOVER_NETMASK=0xffffff00
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1132,20 +1189,18 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1159,14 +1214,9 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-CONFIG_EXAMPLES_DISCOVER=y
-CONFIG_EXAMPLES_DISCOVER_DHCPC=y
-CONFIG_EXAMPLES_DISCOVER_NOMAC=y
-CONFIG_EXAMPLES_DISCOVER_DRIPADDR=0xc0a80201
-CONFIG_EXAMPLES_DISCOVER_NETMASK=0xffffff00
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
@@ -1191,8 +1241,9 @@ CONFIG_EXAMPLES_DISCOVER_NETMASK=0xffffff00
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1205,25 +1256,25 @@ CONFIG_EXAMPLES_DISCOVER_NETMASK=0xffffff00
 # CONFIG_NETUTILS_CODECS is not set
 CONFIG_NETUTILS_DHCPC=y
 # CONFIG_NETUTILS_DHCPD is not set
+CONFIG_NETUTILS_DISCOVER=y
+CONFIG_DISCOVER_STACK_SIZE=1024
+CONFIG_DISCOVER_PRIORITY=50
+CONFIG_DISCOVER_PORT=96
+CONFIG_DISCOVER_INTERFACE="eth0"
+CONFIG_DISCOVER_DEVICE_CLASS=0xff
+CONFIG_DISCOVER_DESCR="STM3240G-EVAL"
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
 # CONFIG_NETUTILS_TFTPC is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-CONFIG_NETUTILS_DISCOVER=y
-CONFIG_DISCOVER_STACK_SIZE=1024
-CONFIG_DISCOVER_PRIORITY=50
-CONFIG_DISCOVER_PORT=96
-CONFIG_DISCOVER_INTERFACE="eth0"
-CONFIG_DISCOVER_DEVICE_CLASS=0xff
-CONFIG_DISCOVER_DESCR="STM3240G-EVAL"
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1242,18 +1293,19 @@ CONFIG_DISCOVER_DESCR="STM3240G-EVAL"
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_SYSTEM_I2CTOOL is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_I2CTOOL is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3240g-eval/include/board.h b/configs/stm3240g-eval/include/board.h
index d693bdacf652c155c6789c2c79939072610c945b..674d58000e27b466b3255c68422652ad2b29e6b0 100644
--- a/configs/stm3240g-eval/include/board.h
+++ b/configs/stm3240g-eval/include/board.h
@@ -2,7 +2,7 @@
  * configs/stm3240g-eval/include/board.h
  * include/arch/board/board.h
  *
- *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -161,8 +161,14 @@
  * Note: TIM1,8 are on APB2, others on APB1
  */
 
-#define STM32_TIM18_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_TIM27_FREQUENCY   STM32_HCLK_FREQUENCY
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM3_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM4_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM5_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM6_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM7_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM8_FREQUENCY    STM32_HCLK_FREQUENCY
 
 /* SDIO dividers.  Note that slower clocking is required when DMA is disabled
  * in order to avoid RX overrun/TX underrun errors due to delayed responses
diff --git a/configs/stm3240g-eval/knxwm/Make.defs b/configs/stm3240g-eval/knxwm/Make.defs
index c138b17cf740023c1d52281c26d74ad6de164691..7fdc7b275d5ab66d4ba280978eeebc544bde6b33 100644
--- a/configs/stm3240g-eval/knxwm/Make.defs
+++ b/configs/stm3240g-eval/knxwm/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3240g-eval/knxwm/defconfig b/configs/stm3240g-eval/knxwm/defconfig
index fe098b72e1a16bbef465a5f219ebf985d5cfeb16..14dc0b5cc29e935d59820bb75b2a9cfa047425bd 100644
--- a/configs/stm3240g-eval/knxwm/defconfig
+++ b/configs/stm3240g-eval/knxwm/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -51,10 +53,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -68,10 +72,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -81,7 +87,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -215,6 +220,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -362,6 +368,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -444,6 +456,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
 # CONFIG_STM32_FSMC_SRAM is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -462,9 +480,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART3_SERIALDRIVER=y
 # CONFIG_STM32_USART3_1WIREDRIVER is not set
 # CONFIG_USART3_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -586,7 +612,13 @@ CONFIG_STM3240G_LCD_RDSHIFT=5
 # CONFIG_STM3240G_ILI9325_DISABLE is not set
 CONFIG_STM3240G_BOARDINIT_PRIO=196
 CONFIG_STM3240G_BOARDINIT_STACK=2048
-# CONFIG_LIB_BOARDCTL is not set
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+CONFIG_BOARDCTL_TSCTEST=y
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
 
 #
 # RTOS Features
@@ -601,9 +633,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=8
@@ -613,6 +648,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -629,6 +665,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -671,7 +709,7 @@ CONFIG_SIG_SIGWORK=17
 # POSIX Message Queue Options
 #
 CONFIG_PREALLOC_MQ_MSGS=32
-CONFIG_MQ_MAXMSGSIZE=48
+CONFIG_MQ_MAXMSGSIZE=64
 # CONFIG_MODULE is not set
 
 #
@@ -701,6 +739,7 @@ CONFIG_SYS_NNEST=2
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -721,12 +760,16 @@ CONFIG_I2C_POLLED=y
 # CONFIG_I2C_TRACE is not set
 # CONFIG_I2C_DRIVER is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 # CONFIG_RTC_ALARM is not set
@@ -760,11 +803,20 @@ CONFIG_STMPE811_TEMP_DISABLE=y
 # CONFIG_BUTTONS is not set
 # CONFIG_DJOYSTICK is not set
 # CONFIG_AJOYSTICK is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 CONFIG_LCD_NOGETRUN=y
@@ -778,6 +830,7 @@ CONFIG_LCD_MAXPOWER=1
 # CONFIG_LCD_NOKIA6100 is not set
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 # CONFIG_LCD_SSD1351 is not set
@@ -792,12 +845,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
-# CONFIG_LCD_BACKPACK is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -805,6 +853,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -813,9 +862,10 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -861,19 +911,26 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USART3_IFLOWCONTROL is not set
 # CONFIG_USART3_OFLOWCONTROL is not set
 # CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -917,12 +974,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1010,6 +1061,7 @@ CONFIG_NXFONT_SANS22X29B=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 # CONFIG_NXTERM is not set
 
 #
@@ -1019,7 +1071,6 @@ CONFIG_NX_MULTIUSER=y
 CONFIG_NX_BLOCKING=y
 CONFIG_NX_MXSERVERMSGS=32
 CONFIG_NX_MXCLIENTMSGS=16
-CONFIG_NX_NXSTART=y
 # CONFIG_NXSTART_EXTERNINIT is not set
 CONFIG_NXSTART_SERVERPRIO=110
 CONFIG_NXSTART_SERVERSTACK=1596
@@ -1070,6 +1121,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1087,21 +1140,24 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 CONFIG_LIB_USRWORK=y
 CONFIG_LIB_USRWORKPRIORITY=100
 CONFIG_LIB_USRWORKPERIOD=100000
 CONFIG_LIB_USRWORKSTACKSIZE=2048
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1127,9 +1183,10 @@ CONFIG_CXX_NEWLONG=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -1138,9 +1195,9 @@ CONFIG_CXX_NEWLONG=y
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_IGMP is not set
 # CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_KEYPADTEST is not set
-# CONFIG_EXAMPLES_IGMP is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -1150,20 +1207,18 @@ CONFIG_CXX_NEWLONG=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1175,9 +1230,10 @@ CONFIG_CXX_NEWLONG=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1201,8 +1257,9 @@ CONFIG_CXX_NEWLONG=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1232,7 +1289,7 @@ CONFIG_NXWIDGETS=y
 # NX Server/Device Configuration
 #
 CONFIG_NXWIDGETS_FLICKERFREE=y
-CONFIG_NXWIDGETS_DEVNO=0
+# CONFIG_NXWIDGETS_EXTERNINIT is not set
 CONFIG_NXWIDGETS_CLIENTPRIO=100
 CONFIG_NXWIDGETS_LISTENERPRIO=100
 CONFIG_NXWIDGETS_LISTENERSTACK=2048
@@ -1331,7 +1388,7 @@ CONFIG_NXWM_TASKBAR_LEFT=y
 CONFIG_NXWM_STARTWINDOW_VSPACING=4
 CONFIG_NXWM_STARTWINDOW_HSPACING=4
 # CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set
-CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm"
+CONFIG_NXWM_STARTWINDOW_MQNAME="nxwm"
 CONFIG_NXWM_STARTWINDOW_MXMSGS=32
 CONFIG_NXWM_STARTWINDOW_MXMPRIO=42
 CONFIG_NXWM_STARTWINDOW_PRIO=100
@@ -1403,19 +1460,20 @@ CONFIG_NXWM_HEXCALCULATOR_FONTID=5
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_SYSTEM_I2CTOOL is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_I2CTOOL is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3240g-eval/nettest/Make.defs b/configs/stm3240g-eval/nettest/Make.defs
index 3f2604c8b9d6c2478c340dca7066d8cf89bd77dc..ce352cf3d258b0431e648f92c70de35b04e19582 100644
--- a/configs/stm3240g-eval/nettest/Make.defs
+++ b/configs/stm3240g-eval/nettest/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3240g-eval/nettest/defconfig b/configs/stm3240g-eval/nettest/defconfig
index d8f93001ea3a523463f30e93a31510e72392560d..e1e0eedc91587d5ae8866affeec648f46c9498ed 100644
--- a/configs/stm3240g-eval/nettest/defconfig
+++ b/configs/stm3240g-eval/nettest/defconfig
@@ -46,10 +46,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +65,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +80,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -208,6 +211,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -355,6 +359,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -435,6 +445,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -453,9 +469,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART3_SERIALDRIVER=y
 # CONFIG_STM32_USART3_1WIREDRIVER is not set
 # CONFIG_USART3_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -480,6 +504,7 @@ CONFIG_STM32_PHYSR_100MBPS=0x0000
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 # CONFIG_STM32_ETH_PTP is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -574,6 +599,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -589,9 +615,12 @@ CONFIG_DISABLE_ENVIRON=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=12
@@ -640,6 +669,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -647,13 +677,17 @@ CONFIG_NAME_MAX=32
 CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGWORK=17
 # CONFIG_MODULE is not set
 
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -671,6 +705,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -686,12 +721,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -699,8 +738,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -708,6 +757,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -729,10 +779,8 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -756,9 +804,10 @@ CONFIG_ETH0_PHY_DP83848C=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -803,19 +852,26 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USART3_IFLOWCONTROL is not set
 # CONFIG_USART3_OFLOWCONTROL is not set
 # CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -823,13 +879,11 @@ CONFIG_USART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -948,12 +1002,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -993,7 +1041,7 @@ CONFIG_MM_REGIONS=2
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -1001,6 +1049,8 @@ CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1015,7 +1065,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -1023,8 +1072,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1050,9 +1101,10 @@ CONFIG_HAVE_CXXINITIALIZE=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -1060,10 +1112,10 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1086,20 +1138,18 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1111,9 +1161,9 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
@@ -1136,8 +1186,9 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1151,9 +1202,9 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
@@ -1175,16 +1226,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3240g-eval/nsh/Make.defs b/configs/stm3240g-eval/nsh/Make.defs
index 3d371f1764dfdb86ddbba6e6dbe3351778d03e55..36f5cf7875b363ec182ae155f6b3b947bf82d9db 100644
--- a/configs/stm3240g-eval/nsh/Make.defs
+++ b/configs/stm3240g-eval/nsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3240g-eval/nsh/defconfig b/configs/stm3240g-eval/nsh/defconfig
index 7456227bc7007c3b0b01156ccc31eb8ede14c769..97a703b843bf4930bb2faa7865b9e33f6d89a081 100644
--- a/configs/stm3240g-eval/nsh/defconfig
+++ b/configs/stm3240g-eval/nsh/defconfig
@@ -46,10 +46,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +65,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +80,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -208,6 +211,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -355,6 +359,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -436,6 +446,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -454,9 +470,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART3_SERIALDRIVER=y
 # CONFIG_STM32_USART3_1WIREDRIVER is not set
 # CONFIG_USART3_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -496,6 +520,7 @@ CONFIG_STM32_PHYSR_100MBPS=0x0000
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 # CONFIG_STM32_ETH_PTP is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -586,11 +611,11 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -606,9 +631,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=8
@@ -660,6 +688,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -668,6 +697,7 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
@@ -679,8 +709,11 @@ CONFIG_MQ_MAXMSGSIZE=32
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -700,6 +733,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
 CONFIG_ARCH_HAVE_RNG=y
 CONFIG_DEV_RANDOM=y
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -720,12 +754,16 @@ CONFIG_I2C_POLLED=y
 # CONFIG_I2C_TRACE is not set
 CONFIG_I2C_DRIVER=y
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 # CONFIG_RTC_ALARM is not set
@@ -738,8 +776,18 @@ CONFIG_RTC_DATETIME=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -747,6 +795,7 @@ CONFIG_RTC_DATETIME=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -770,10 +819,8 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -797,9 +844,10 @@ CONFIG_ETH0_PHY_DP83848C=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -845,19 +893,26 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USART3_IFLOWCONTROL is not set
 # CONFIG_USART3_OFLOWCONTROL is not set
 # CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -865,13 +920,11 @@ CONFIG_USART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -1011,12 +1064,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1066,6 +1113,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1083,7 +1132,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
@@ -1100,8 +1148,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1132,21 +1182,23 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1157,27 +1209,26 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RANDOM is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1185,10 +1236,9 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1212,8 +1262,9 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1226,21 +1277,21 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1293,13 +1344,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1317,6 +1368,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1342,6 +1394,7 @@ CONFIG_NSH_CONSOLE=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1386,11 +1439,11 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=1
 CONFIG_I2CTOOL_MAXBUS=3
@@ -1398,7 +1451,7 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=100000
-# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1407,6 +1460,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3240g-eval/nsh2/Make.defs b/configs/stm3240g-eval/nsh2/Make.defs
index 01fd1a369df0c2638ea6aed6b41682bbd45131ab..fb47d90477b4aeb823da98c9abe1bf6f5fe89515 100644
--- a/configs/stm3240g-eval/nsh2/Make.defs
+++ b/configs/stm3240g-eval/nsh2/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3240g-eval/nsh2/defconfig b/configs/stm3240g-eval/nsh2/defconfig
index 1752213148f7ea8a5cd3c19481968c65b3243aab..5065e288c671719d54c4b785f776c87ed3f59194 100644
--- a/configs/stm3240g-eval/nsh2/defconfig
+++ b/configs/stm3240g-eval/nsh2/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +67,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +82,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -107,7 +112,9 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -153,8 +160,6 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
 CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # STM32 Configuration Options
@@ -209,6 +214,7 @@ CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -356,6 +362,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -438,6 +450,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 CONFIG_STM32_CCMEXCLUDE=y
 # CONFIG_STM32_DMACAPABLE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -464,7 +482,9 @@ CONFIG_STM32_I2CTIMEOTICKS=500
 #
 # SDIO Configuration
 #
-CONFIG_SDIO_DMAPRIO=0x00010000
+CONFIG_STM32_SDIO_DMA=y
+CONFIG_STM32_SDIO_DMAPRIO=0x00010000
+# CONFIG_STM32_SDIO_WIDTH_D1_ONLY is not set
 # CONFIG_STM32_HAVE_RTC_COUNTER is not set
 # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
 CONFIG_RTC_MAGIC_REG=0
@@ -490,6 +510,7 @@ CONFIG_STM32_PHYSR_100MBPS=0x0000
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 # CONFIG_STM32_ETH_PTP is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -580,18 +601,15 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -608,9 +626,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=16
@@ -620,6 +641,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -636,6 +658,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -705,6 +729,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -725,12 +750,16 @@ CONFIG_I2C_POLLED=y
 # CONFIG_I2C_TRACE is not set
 CONFIG_I2C_DRIVER=y
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 # CONFIG_RTC_ALARM is not set
@@ -743,8 +772,18 @@ CONFIG_RTC_DATETIME=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -752,6 +791,7 @@ CONFIG_RTC_DATETIME=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -759,11 +799,13 @@ CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
 # CONFIG_MMCSD_MMCSUPPORT is not set
 # CONFIG_MMCSD_HAVECARDDETECT is not set
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y
 CONFIG_MMCSD_SDIO=y
 CONFIG_SDIO_PREFLIGHT=y
 # CONFIG_SDIO_MUXBUS is not set
 # CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 # CONFIG_SDIO_BLOCKSETUP is not set
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -786,7 +828,9 @@ CONFIG_MTD=y
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
 # CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
@@ -816,10 +860,8 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -843,8 +885,9 @@ CONFIG_ETH0_PHY_DP83848C=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
+# CONFIG_SERIAL_REMOVABLE is not set
+# CONFIG_SERIAL_CONSOLE is not set
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -874,23 +917,30 @@ CONFIG_SERIAL=y
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 CONFIG_RAMLOG=y
-CONFIG_RAMLOG_SYSLOG=y
 CONFIG_RAMLOG_BUFSIZE=1024
 # CONFIG_RAMLOG_CRLF is not set
 CONFIG_RAMLOG_NONBLOCKING=y
 CONFIG_RAMLOG_NPOLLWAITERS=4
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_RAMLOG_SYSLOG=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -898,13 +948,11 @@ CONFIG_RAMLOG_NPOLLWAITERS=4
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -1044,13 +1092,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-# CONFIG_SYSLOG_CHAR is not set
-
 #
 # Graphics Support
 #
@@ -1095,11 +1136,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1117,9 +1175,11 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -1134,8 +1194,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1166,21 +1228,23 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1191,26 +1255,25 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1218,16 +1281,16 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1247,8 +1310,9 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1262,22 +1326,22 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1330,13 +1394,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1354,11 +1418,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_FILEIOSIZE=512
@@ -1379,6 +1446,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1423,12 +1491,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=1
 CONFIG_I2CTOOL_MAXBUS=3
@@ -1436,7 +1504,7 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=100000
-# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1445,6 +1513,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3240g-eval/nxterm/Make.defs b/configs/stm3240g-eval/nxterm/Make.defs
index 6c7e72d33c34d5422e12669cd06e9fde55229d04..c38ffc8c404b0d6ea9dd7be2479e8a8327768b11 100644
--- a/configs/stm3240g-eval/nxterm/Make.defs
+++ b/configs/stm3240g-eval/nxterm/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3240g-eval/nxterm/defconfig b/configs/stm3240g-eval/nxterm/defconfig
index 8a947a2bb279271e9fc1d0465c52c564c5710b0f..1010b569420899a88de8a024e20765bd49b44246 100644
--- a/configs/stm3240g-eval/nxterm/defconfig
+++ b/configs/stm3240g-eval/nxterm/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +67,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +82,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -208,6 +213,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -355,6 +361,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -437,6 +449,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
 CONFIG_STM32_FSMC_SRAM=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -455,9 +473,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART3_SERIALDRIVER=y
 # CONFIG_STM32_USART3_1WIREDRIVER is not set
 # CONFIG_USART3_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -497,6 +523,7 @@ CONFIG_STM32_PHYSR_100MBPS=0x0000
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 # CONFIG_STM32_ETH_PTP is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -587,7 +614,6 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -596,7 +622,13 @@ CONFIG_STM3240G_LCD=y
 CONFIG_STM3240G_LCD_RDSHIFT=5
 # CONFIG_STM3240G_ILI9320_DISABLE is not set
 # CONFIG_STM3240G_ILI9325_DISABLE is not set
-# CONFIG_LIB_BOARDCTL is not set
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
 
 #
 # RTOS Features
@@ -611,9 +643,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=8
@@ -623,6 +658,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -639,6 +675,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -665,6 +703,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -673,19 +712,23 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
 #
 CONFIG_PREALLOC_MQ_MSGS=8
-CONFIG_MQ_MAXMSGSIZE=32
+CONFIG_MQ_MAXMSGSIZE=64
 # CONFIG_MODULE is not set
 
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -703,6 +746,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -723,12 +767,16 @@ CONFIG_I2C_POLLED=y
 # CONFIG_I2C_TRACE is not set
 CONFIG_I2C_DRIVER=y
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 # CONFIG_RTC_ALARM is not set
@@ -741,11 +789,20 @@ CONFIG_RTC_DATETIME=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 CONFIG_LCD_NOGETRUN=y
@@ -759,6 +816,7 @@ CONFIG_LCD_MAXPOWER=1
 # CONFIG_LCD_NOKIA6100 is not set
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 # CONFIG_LCD_SSD1351 is not set
@@ -773,12 +831,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
-# CONFIG_LCD_BACKPACK is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -786,6 +839,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -809,10 +863,8 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -836,9 +888,10 @@ CONFIG_ETH0_PHY_DP83848C=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -884,19 +937,26 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USART3_IFLOWCONTROL is not set
 # CONFIG_USART3_OFLOWCONTROL is not set
 # CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -904,13 +964,11 @@ CONFIG_USART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -1043,12 +1101,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1136,13 +1188,14 @@ CONFIG_NXFONT_SANS23X27=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 CONFIG_NXTERM=y
 
 #
 # NxTerm Output Text/Graphics Options
 #
 CONFIG_NXTERM_BPP=16
-CONFIG_NXTERM_CURSORCHAR=137
+CONFIG_NXTERM_CURSORCHAR=95
 CONFIG_NXTERM_MXCHARS=256
 CONFIG_NXTERM_CACHESIZE=32
 CONFIG_NXTERM_LINESEPARATION=0
@@ -1162,7 +1215,10 @@ CONFIG_NX_MULTIUSER=y
 CONFIG_NX_BLOCKING=y
 CONFIG_NX_MXSERVERMSGS=32
 CONFIG_NX_MXCLIENTMSGS=16
-# CONFIG_NX_NXSTART is not set
+# CONFIG_NXSTART_EXTERNINIT is not set
+CONFIG_NXSTART_SERVERPRIO=110
+CONFIG_NXSTART_SERVERSTACK=2048
+CONFIG_NXSTART_DEVNO=0
 
 #
 # Memory Management
@@ -1210,6 +1266,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1225,9 +1283,9 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 CONFIG_LIBC_NETDB=y
 CONFIG_NETDB_DNSCLIENT=y
 CONFIG_NETDB_DNSCLIENT_ENTRIES=4
@@ -1240,8 +1298,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1272,20 +1332,22 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -1296,26 +1358,25 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-CONFIG_EXAMPLES_NXTERM=y
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+CONFIG_EXAMPLES_NXTERM=y
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1323,10 +1384,10 @@ CONFIG_EXAMPLES_NXTERM=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1348,8 +1409,9 @@ CONFIG_EXAMPLES_NXTERM=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1362,21 +1424,21 @@ CONFIG_EXAMPLES_NXTERM=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1428,13 +1490,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1452,11 +1514,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
 CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_FILEIOSIZE=512
@@ -1477,6 +1541,7 @@ CONFIG_NSH_CONSOLE=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1522,11 +1587,11 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=1
 CONFIG_I2CTOOL_MAXBUS=3
@@ -1534,7 +1599,7 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=100000
-# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1543,6 +1608,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3240g-eval/nxwm/Make.defs b/configs/stm3240g-eval/nxwm/Make.defs
index adc137c72ff04db87c3e2043b358d3d542fba60d..14741aaf72dd4a030f17f4e239ab96ad1613138c 100644
--- a/configs/stm3240g-eval/nxwm/Make.defs
+++ b/configs/stm3240g-eval/nxwm/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3240g-eval/nxwm/defconfig b/configs/stm3240g-eval/nxwm/defconfig
index e3e15ad43edd9e5c329f3ef5a0282b8bf2fd55a0..8dc6030f8137b13dc3a544cc1dc885f566957d60 100644
--- a/configs/stm3240g-eval/nxwm/defconfig
+++ b/configs/stm3240g-eval/nxwm/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +67,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +82,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -208,6 +213,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -355,6 +361,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -437,6 +449,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
 # CONFIG_STM32_FSMC_SRAM is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -455,9 +473,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART3_SERIALDRIVER=y
 # CONFIG_STM32_USART3_1WIREDRIVER is not set
 # CONFIG_USART3_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -497,6 +523,7 @@ CONFIG_STM32_PHYSR_100MBPS=0x0000
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 # CONFIG_STM32_ETH_PTP is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -587,7 +614,6 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -596,7 +622,13 @@ CONFIG_STM3240G_LCD=y
 CONFIG_STM3240G_LCD_RDSHIFT=5
 # CONFIG_STM3240G_ILI9320_DISABLE is not set
 # CONFIG_STM3240G_ILI9325_DISABLE is not set
-# CONFIG_LIB_BOARDCTL is not set
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+CONFIG_BOARDCTL_TSCTEST=y
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
 
 #
 # RTOS Features
@@ -611,9 +643,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=8
@@ -623,6 +658,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -639,6 +675,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -681,7 +719,7 @@ CONFIG_SIG_SIGWORK=17
 # POSIX Message Queue Options
 #
 CONFIG_PREALLOC_MQ_MSGS=32
-CONFIG_MQ_MAXMSGSIZE=48
+CONFIG_MQ_MAXMSGSIZE=64
 # CONFIG_MODULE is not set
 
 #
@@ -709,6 +747,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -729,12 +768,16 @@ CONFIG_I2C_POLLED=y
 # CONFIG_I2C_TRACE is not set
 # CONFIG_I2C_DRIVER is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 # CONFIG_RTC_ALARM is not set
@@ -768,11 +811,20 @@ CONFIG_STMPE811_TEMP_DISABLE=y
 # CONFIG_BUTTONS is not set
 # CONFIG_DJOYSTICK is not set
 # CONFIG_AJOYSTICK is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 CONFIG_LCD_NOGETRUN=y
@@ -786,6 +838,7 @@ CONFIG_LCD_MAXPOWER=1
 # CONFIG_LCD_NOKIA6100 is not set
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 # CONFIG_LCD_SSD1351 is not set
@@ -800,12 +853,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
-# CONFIG_LCD_BACKPACK is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -813,6 +861,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -836,10 +885,8 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -863,9 +910,10 @@ CONFIG_ETH0_PHY_NONE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -911,19 +959,26 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USART3_IFLOWCONTROL is not set
 # CONFIG_USART3_OFLOWCONTROL is not set
 # CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -931,13 +986,11 @@ CONFIG_USART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -1076,12 +1129,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1169,13 +1216,14 @@ CONFIG_NXFONT_SANS22X29B=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 CONFIG_NXTERM=y
 
 #
 # NxTerm Output Text/Graphics Options
 #
 CONFIG_NXTERM_BPP=16
-CONFIG_NXTERM_CURSORCHAR=137
+CONFIG_NXTERM_CURSORCHAR=95
 CONFIG_NXTERM_MXCHARS=325
 CONFIG_NXTERM_CACHESIZE=32
 CONFIG_NXTERM_LINESEPARATION=0
@@ -1195,7 +1243,10 @@ CONFIG_NX_MULTIUSER=y
 CONFIG_NX_BLOCKING=y
 CONFIG_NX_MXSERVERMSGS=32
 CONFIG_NX_MXCLIENTMSGS=16
-# CONFIG_NX_NXSTART is not set
+# CONFIG_NXSTART_EXTERNINIT is not set
+CONFIG_NXSTART_SERVERPRIO=110
+CONFIG_NXSTART_SERVERSTACK=2048
+CONFIG_NXSTART_DEVNO=0
 
 #
 # Memory Management
@@ -1241,6 +1292,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1258,9 +1311,9 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -1275,8 +1328,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1302,21 +1357,23 @@ CONFIG_HAVE_CXXINITIALIZE=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -1327,20 +1384,18 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1354,10 +1409,10 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
@@ -1382,8 +1437,9 @@ CONFIG_HAVE_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1395,21 +1451,21 @@ CONFIG_HAVE_CXXINITIALIZE=y
 #
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1461,13 +1517,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1485,11 +1541,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 CONFIG_NSH_FILEIOSIZE=512
@@ -1510,6 +1568,7 @@ CONFIG_NSH_CONSOLE=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1551,10 +1610,8 @@ CONFIG_NXWIDGETS=y
 # NX Server/Device Configuration
 #
 CONFIG_NXWIDGETS_FLICKERFREE=y
-CONFIG_NXWIDGETS_DEVNO=0
+# CONFIG_NXWIDGETS_EXTERNINIT is not set
 CONFIG_NXWIDGET_SERVERINIT=y
-CONFIG_NXWIDGETS_SERVERPRIO=110
-CONFIG_NXWIDGETS_SERVERSTACK=2048
 CONFIG_NXWIDGETS_CLIENTPRIO=100
 CONFIG_NXWIDGETS_LISTENERPRIO=100
 CONFIG_NXWIDGETS_LISTENERSTACK=2048
@@ -1653,7 +1710,7 @@ CONFIG_NXWM_TASKBAR_LEFT=y
 CONFIG_NXWM_STARTWINDOW_VSPACING=4
 CONFIG_NXWM_STARTWINDOW_HSPACING=4
 # CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set
-CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm"
+CONFIG_NXWM_STARTWINDOW_MQNAME="nxwm"
 CONFIG_NXWM_STARTWINDOW_MXMSGS=32
 CONFIG_NXWM_STARTWINDOW_MXMPRIO=42
 CONFIG_NXWM_STARTWINDOW_PRIO=100
@@ -1731,13 +1788,13 @@ CONFIG_NXWM_HEXCALCULATOR_FONTID=5
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_SYSTEM_I2CTOOL is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_I2CTOOL is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1746,6 +1803,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3240g-eval/src/stm3240g-eval.h b/configs/stm3240g-eval/src/stm3240g-eval.h
index 696d29e6a5e9e63bace133082626be1bcd3bd1c1..f645db52f256fd7cc0299a364e478c38197f6468 100644
--- a/configs/stm3240g-eval/src/stm3240g-eval.h
+++ b/configs/stm3240g-eval/src/stm3240g-eval.h
@@ -1,7 +1,7 @@
 /****************************************************************************************************
  * configs/stm3240g_eval/src/stm3240g_eval.h
  *
- *   Copyright (C) 2011-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -262,6 +262,42 @@ int stm32_usbhost_initialize(void);
 void stm32_led_initialize(void);
 #endif
 
+/****************************************************************************************************
+ * Name: stm32_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ****************************************************************************************************/
+
+#ifdef CONFIG_PWM
+int stm32_pwm_setup(void);
+#endif
+
+/****************************************************************************************************
+ * Name: stm32_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ****************************************************************************************************/
+
+#ifdef CONFIG_ADC
+int stm32_adc_setup(void);
+#endif
+
+/****************************************************************************************************
+ * Name: stm32_can_setup
+ *
+ * Description:
+ *  Initialize CAN and register the CAN device
+ *
+ ****************************************************************************************************/
+
+#ifdef CONFIG_CAN
+int stm32_can_setup(void);
+#endif
+
 /****************************************************************************************************
  * Name: stm32_extmemgpios
  *
diff --git a/configs/stm3240g-eval/src/stm32_adc.c b/configs/stm3240g-eval/src/stm32_adc.c
index da37355e506d150501c1a268fbc4296811f696b2..82a5531edb00ad387981e829b39090752809e37c 100644
--- a/configs/stm3240g-eval/src/stm32_adc.c
+++ b/configs/stm3240g-eval/src/stm32_adc.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm3240g-eval/src/stm32_adc.c
  *
- *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -99,24 +99,19 @@ static const uint8_t  g_chanlist[ADC3_NCHANNELS] = {7};
 static const uint32_t g_pinlist[ADC3_NCHANNELS]  = {GPIO_ADC3_IN7};
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_adc_setup
+ * Name: stm32_adc_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/adc.
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
-int board_adc_setup(void)
+int stm32_adc_setup(void)
 {
 #ifdef CONFIG_STM32_ADC3
   static bool initialized = false;
@@ -140,7 +135,7 @@ int board_adc_setup(void)
       adc = stm32_adcinitialize(3, g_chanlist, ADC3_NCHANNELS);
       if (adc == NULL)
         {
-          adbg("ERROR: Failed to get ADC interface\n");
+          aerr("ERROR: Failed to get ADC interface\n");
           return -ENODEV;
         }
 
@@ -149,7 +144,7 @@ int board_adc_setup(void)
       ret = adc_register("/dev/adc0", adc);
       if (ret < 0)
         {
-          adbg("adc_register failed: %d\n", ret);
+          aerr("ERROR: adc_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/stm3240g-eval/src/stm32_appinit.c b/configs/stm3240g-eval/src/stm32_appinit.c
index 469180c390ce1f9892fa1e542a004b7f957abc9d..448c48ba368f8c9bcc0549393f8b2ac7849a0361 100644
--- a/configs/stm3240g-eval/src/stm32_appinit.c
+++ b/configs/stm3240g-eval/src/stm32_appinit.c
@@ -160,14 +160,14 @@ static void stm32_i2c_register(int bus)
   i2c = stm32_i2cbus_initialize(bus);
   if (i2c == NULL)
     {
-      dbg("ERROR: Failed to get I2C%d interface\n", bus);
+      _err("ERROR: Failed to get I2C%d interface\n", bus);
     }
   else
     {
       ret = i2c_register(i2c, bus);
       if (ret < 0)
         {
-          dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
+          _err("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
           stm32_i2cbus_uninitialize(i2c);
         }
     }
@@ -240,9 +240,7 @@ int board_app_initialize(uintptr_t arg)
 #ifdef HAVE_MMCSD
   FAR struct sdio_dev_s *sdio;
 #endif
-#if defined(HAVE_MMCSD) || defined(HAVE_USBHOST) || defined(HAVE_RTC_DRIVER)
   int ret;
-#endif
 
   /* Register I2C drivers on behalf of the I2C tool */
 
@@ -254,7 +252,8 @@ int board_app_initialize(uintptr_t arg)
   lower = stm32_rtc_lowerhalf();
   if (!lower)
     {
-      sdbg("ERROR: Failed to instantiate the RTC lower-half driver\n");
+      syslog(LOG_ERR,
+             "ERROR: Failed to instantiate the RTC lower-half driver\n");
       return -ENOMEM;
     }
   else
@@ -266,7 +265,9 @@ int board_app_initialize(uintptr_t arg)
       ret = rtc_initialize(0, lower);
       if (ret < 0)
         {
-          sdbg("ERROR: Failed to bind/register the RTC driver: %d\n", ret);
+          syslog(LOG_ERR,
+                 "ERROR: Failed to bind/register the RTC driver: %d\n",
+                 ret);
           return ret;
         }
     }
@@ -289,21 +290,22 @@ int board_app_initialize(uintptr_t arg)
   mtd = m25p_initialize(spi);
   if (!mtd)
     {
-      syslog(LOG_ERR, "ERROR: Failed to bind SPI port 0 to the SPI FLASH driver\n");
+      syslog(LOG_ERR,
+             "ERROR: Failed to bind SPI port 0 to the SPI FLASH driver\n");
       return -ENODEV;
     }
 #warning "Now what are we going to do with this SPI FLASH driver?"
 #endif
 
-  /* Mount the SDIO-based MMC/SD block driver */
-
 #ifdef HAVE_MMCSD
+  /* Mount the SDIO-based MMC/SD block driver */
   /* First, get an instance of the SDIO interface */
 
   sdio = sdio_initialize(CONFIG_NSH_MMCSDSLOTNO);
   if (!sdio)
     {
-      syslog(LOG_ERR, "ERROR: Failed to initialize SDIO slot %d\n",
+      syslog(LOG_ERR,
+             "ERROR: Failed to initialize SDIO slot %d\n",
              CONFIG_NSH_MMCSDSLOTNO);
       return -ENODEV;
     }
@@ -313,7 +315,9 @@ int board_app_initialize(uintptr_t arg)
   ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, sdio);
   if (ret != OK)
     {
-      syslog(LOG_ERR, "ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
+      syslog(LOG_ERR,
+             "ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n",
+             ret);
       return ret;
     }
 
@@ -338,5 +342,36 @@ int board_app_initialize(uintptr_t arg)
     }
 #endif
 
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device. */
+
+  ret = stm32_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_pwm_setup() failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_ADC
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = stm32_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_adc_setup failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_CAN
+  /* Initialize CAN and register the CAN driver. */
+
+  ret = stm32_can_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_can_setup failed: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
   return OK;
 }
diff --git a/configs/stm3240g-eval/src/stm32_autoleds.c b/configs/stm3240g-eval/src/stm32_autoleds.c
index 410e944795424e391bf1ead37fc1daf7f2a5cea6..71fc384d5cf20ff86260079f2305a3df7bc1c808 100644
--- a/configs/stm3240g-eval/src/stm32_autoleds.c
+++ b/configs/stm3240g-eval/src/stm32_autoleds.c
@@ -58,18 +58,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* The following definitions map the encoded LED setting to GPIO settings */
 
 #define STM3210E_LED1     (1 << 0)
diff --git a/configs/stm3240g-eval/src/stm32_boot.c b/configs/stm3240g-eval/src/stm32_boot.c
index 09b3b82eed4ec8fe9abfa9b3834f77c3df668082..61daf3d2d702535229f2fd92580ede526888db58 100644
--- a/configs/stm3240g-eval/src/stm32_boot.c
+++ b/configs/stm3240g-eval/src/stm32_boot.c
@@ -49,11 +49,11 @@
  * Pre-processor Definitions
  ************************************************************************************/
 /* Configuration ********************************************************************/
-/* Should we initialize the NX server?  This is done for NxWidgets (CONFIG_NXWIDGETS=y)
- * if nx_start() is available (CONFIG_NX_NXSTART=y) and if the NxWidget::CNxServer
- * class expects the RTOS to do the NX initialization (CONFIG_NXWIDGET_SERVERINIT=n).
- * This combination of settings is normally only used in the kernel build mode
- * (CONFIG_BUILD_PROTECTED) when NxWidgets is unable to initialize NX from user-space.
+/* Should we initialize the NX server using nx_start?  This is done for NxWidgets
+ * (CONFIG_NXWIDGETS=y) and if the NxWidget::CNxServer class expects the RTOS do the
+ * the NX initialization (CONFIG_NXWIDGET_SERVERINIT=n).  This combination of
+ * settings is normally only used in the kernel build mode* (CONFIG_BUILD_PROTECTED)
+ * when NxWidgets is unable to initialize NX from user-space.
  */
 
 #undef HAVE_NXSTART
@@ -62,17 +62,9 @@
 #  undef CONFIG_NX_START
 #endif
 
-#if defined(CONFIG_NXWIDGETS)
-#  if defined(CONFIG_NX_NXSTART)
-#    if !defined(CONFIG_NXWIDGET_SERVERINIT)
-#      define HAVE_NXSTART
-#      include 
-#    endif
-#  else
-#    if !defined(CONFIG_NXWIDGET_SERVERINIT) && defined(CONFIG_BUILD_PROTECTED)
-#      error CONFIG_NX_NXSTART=y is needed
-#    endif
-#  endif
+#if defined(CONFIG_NXWIDGETS) && !defined(CONFIG_NXWIDGET_SERVERINIT)
+#   define HAVE_NXSTART
+#   include 
 #endif
 
 /* Should we initialize the touchscreen for the NxWM (CONFIG_NXWM=y)?  This
@@ -164,7 +156,7 @@ static int board_initthread(int argc, char *argv[])
   ret = board_app_initialize(0);
   if (ret < 0)
     {
-      gdbg("ERROR: board_app_initialize failed: %d\n", ret);
+      gerr("ERROR: board_app_initialize failed: %d\n", ret);
     }
 #endif
 
@@ -174,7 +166,7 @@ static int board_initthread(int argc, char *argv[])
   ret = nx_start();
   if (ret < 0)
     {
-      gdbg("ERROR: nx_start failed: %d\n", ret);
+      gerr("ERROR: nx_start failed: %d\n", ret);
     }
 #endif
 
@@ -184,7 +176,7 @@ static int board_initthread(int argc, char *argv[])
   ret = board_tsc_setup(CONFIG_NXWM_TOUCHSCREEN_DEVNO);
   if (ret < 0)
     {
-      gdbg("ERROR: board_tsc_setup failed: %d\n", ret);
+      gerr("ERROR: board_tsc_setup failed: %d\n", ret);
     }
 #endif
 
diff --git a/configs/stm3240g-eval/src/stm32_buttons.c b/configs/stm3240g-eval/src/stm32_buttons.c
index e3e761b217bae6462be68f84446677f918e84088..a20c03f16aebac3fd1bd7324d7711631b2cfb616 100644
--- a/configs/stm3240g-eval/src/stm32_buttons.c
+++ b/configs/stm3240g-eval/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/stm3240g-eval/src/stm32_buttons.c
  *
- *   Copyright (C) 2011, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -151,23 +152,23 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   /* The following should be atomic */
 
   if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
     {
-      oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler, arg);
     }
-  return oldhandler;
+
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/stm3240g-eval/src/stm32_can.c b/configs/stm3240g-eval/src/stm32_can.c
index 40a29e50d8044fadeb7060d6edcfe4d777507f00..3ebae0dfa3482cfd5f5f9faac25108216ea6c2cb 100644
--- a/configs/stm3240g-eval/src/stm32_can.c
+++ b/configs/stm3240g-eval/src/stm32_can.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm3240g-eval/src/stm32_can.c
  *
- *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,7 +42,7 @@
 #include 
 #include 
 
-#include 
+#include 
 #include 
 
 #include "chip.h"
@@ -52,7 +52,7 @@
 #include "stm32_can.h"
 #include "stm3240g-eval.h"
 
-#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2))
+#ifdef CONFIG_CAN
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -70,72 +70,46 @@
 #  define CAN_PORT 2
 #endif
 
-/* Debug ***************************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
-
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
-#else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_can_initialize
+ * Name: stm32_can_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/can.
+ *  Initialize CAN and register the CAN device
  *
  ************************************************************************************/
 
-int board_can_initialize(void)
+int stm32_can_setup(void)
 {
-  static bool initialized = false;
+#if defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)
   struct can_dev_s *can;
   int ret;
 
-  /* Check if we have already initialized */
+  /* Call stm32_caninitialize() to get an instance of the CAN interface */
 
-  if (!initialized)
+  can = stm32_caninitialize(CAN_PORT);
+  if (can == NULL)
     {
-      /* Call stm32_caninitialize() to get an instance of the CAN interface */
-
-      can = stm32_caninitialize(CAN_PORT);
-      if (can == NULL)
-        {
-          candbg("ERROR:  Failed to get CAN interface\n");
-          return -ENODEV;
-        }
-
-      /* Register the CAN driver at "/dev/can0" */
-
-      ret = can_register("/dev/can0", can);
-      if (ret < 0)
-        {
-          candbg("ERROR: can_register failed: %d\n", ret);
-          return ret;
-        }
+      canerr("ERROR:  Failed to get CAN interface\n");
+      return -ENODEV;
+    }
 
-      /* Now we are initialized */
+  /* Register the CAN driver at "/dev/can0" */
 
-      initialized = true;
+  ret = can_register("/dev/can0", can);
+  if (ret < 0)
+    {
+      canerr("ERROR: can_register failed: %d\n", ret);
+      return ret;
     }
 
   return OK;
+#else
+  return -ENODEV;
+#endif
 }
 
-#endif /* CONFIG_CAN && (CONFIG_STM32_CAN1 || CONFIG_STM32_CAN2) */
+#endif /* CONFIG_CAN */
diff --git a/configs/stm3240g-eval/src/stm32_lcd.c b/configs/stm3240g-eval/src/stm32_lcd.c
index c358ffd1eb21fb19a546fcd178f605c117f8595d..1db56387063f78cc806c1be1afe0d5c30d90d62a 100644
--- a/configs/stm3240g-eval/src/stm32_lcd.c
+++ b/configs/stm3240g-eval/src/stm32_lcd.c
@@ -33,6 +33,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  *
  **************************************************************************************/
+
 /* This driver supports the following LCDs on the STM324xG_EVAL board:
  *
  *   AM-240320L8TNQW00H (LCD_ILI9320 or LCD_ILI9321) OR
@@ -109,20 +110,6 @@
 #  define CONFIG_LCD_LANDSCAPE 1
 #endif
 
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
 /* Display/Color Properties ***********************************************************/
 /* Display Resolution */
 
@@ -262,16 +249,6 @@
 #define ILI9321_ID            0x9321
 #define ILI9325_ID            0x9325
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg              dbg
-#  define lcdvdbg             vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /**************************************************************************************
  * Private Type Definition
  **************************************************************************************/
@@ -585,7 +562,7 @@ static int stm3240g_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *bu
 
   /* Buffer must be provided and aligned to a 16-bit address boundary */
 
-  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
 
   /* Write the run to GRAM. */
@@ -703,7 +680,7 @@ static int stm3240g_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
 
   /* Buffer must be provided and aligned to a 16-bit address boundary */
 
-  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
 
   /* Configure according to the LCD type.  Kind of silly with only one LCD type. */
@@ -829,7 +806,7 @@ static int stm3240g_getvideoinfo(FAR struct lcd_dev_s *dev,
                                  FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  lcdvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+  lcdinfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
           g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
   memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
   return OK;
@@ -847,7 +824,7 @@ static int stm3240g_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno
                               FAR struct lcd_planeinfo_s *pinfo)
 {
   DEBUGASSERT(dev && pinfo && planeno == 0);
-  lcdvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+  lcdinfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
   memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
   return OK;
 }
@@ -863,7 +840,7 @@ static int stm3240g_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno
 
 static int stm3240g_getpower(struct lcd_dev_s *dev)
 {
-  lcdvdbg("power: %d\n", 0);
+  lcdinfo("power: %d\n", 0);
   return g_lcddev.power;
 }
 
@@ -899,7 +876,7 @@ static int stm3240g_poweroff(void)
 
 static int stm3240g_setpower(struct lcd_dev_s *dev, int power)
 {
-  lcdvdbg("power: %d\n", power);
+  lcdinfo("power: %d\n", power);
   DEBUGASSERT((unsigned)power <= CONFIG_LCD_MAXPOWER);
 
   /* Set new power level */
@@ -933,7 +910,7 @@ static int stm3240g_setpower(struct lcd_dev_s *dev, int power)
 
 static int stm3240g_getcontrast(struct lcd_dev_s *dev)
 {
-  lcdvdbg("Not implemented\n");
+  lcdinfo("Not implemented\n");
   return -ENOSYS;
 }
 
@@ -947,7 +924,7 @@ static int stm3240g_getcontrast(struct lcd_dev_s *dev)
 
 static int stm3240g_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
 {
-  lcdvdbg("contrast: %d\n", contrast);
+  lcdinfo("contrast: %d\n", contrast);
   return -ENOSYS;
 }
 
@@ -966,7 +943,7 @@ static inline void stm3240g_lcdinitialize(void)
   /* Check LCD ID */
 
   id = stm3240g_readreg(LCD_REG_0);
-  lcddbg("LCD ID: %04x\n", id);
+  lcdinfo("LCD ID: %04x\n", id);
 
   /* Check if the ID is for the STM32_ILI9320 (or ILI9321) or STM32_ILI9325 */
 
@@ -995,7 +972,7 @@ static inline void stm3240g_lcdinitialize(void)
 #else /* if !defined(CONFIG_STM3240G_ILI9325_DISABLE) */
       g_lcddev.type = LCD_TYPE_ILI9325;
 #endif
-      lcddbg("LCD type: %d\n", g_lcddev.type);
+      lcdinfo("LCD type: %d\n", g_lcddev.type);
 
       /* Start Initial Sequence */
 
@@ -1113,7 +1090,7 @@ static inline void stm3240g_lcdinitialize(void)
     }
   else
     {
-      lcddbg("Unsupported LCD type\n");
+      lcderr("ERROR: Unsupported LCD type\n");
     }
 }
 
@@ -1133,7 +1110,7 @@ static inline void stm3240g_lcdinitialize(void)
 
 int board_lcd_initialize(void)
 {
-  lcdvdbg("Initializing\n");
+  lcdinfo("Initializing\n");
 
   /* Configure GPIO pins and configure the FSMC to support the LCD */
 
diff --git a/configs/stm3240g-eval/src/stm32_pwm.c b/configs/stm3240g-eval/src/stm32_pwm.c
index c10853a1b9a66548c57147954fe5b7b90df018b7..e4085ee117eca87cadcb218fa59cee18ec48640f 100644
--- a/configs/stm3240g-eval/src/stm32_pwm.c
+++ b/configs/stm3240g-eval/src/stm32_pwm.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm3240g-eval/src/stm32_pwm.c
  *
- *   Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -43,7 +43,7 @@
 #include 
 
 #include 
-#include 
+#include 
 
 #include 
 
@@ -65,24 +65,19 @@
 
 #ifdef CONFIG_PWM
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_pwm_setup
+ * Name: stm32_pwm_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/pwm.
+ *   Initialize PWM and register the PWM device.
  *
  ************************************************************************************/
 
-int board_pwm_setup(void)
+int stm32_pwm_setup(void)
 {
   static bool initialized = false;
   struct pwm_lowerhalf_s *pwm;
@@ -97,7 +92,7 @@ int board_pwm_setup(void)
       pwm = stm32_pwminitialize(STM3240G_EVAL_PWMTIMER);
       if (!pwm)
         {
-          dbg("Failed to get the STM32 PWM lower half\n");
+          aerr("ERROR: Failed to get the STM32 PWM lower half\n");
           return -ENODEV;
         }
 
@@ -106,7 +101,7 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/pwm0", pwm);
       if (ret < 0)
         {
-          adbg("pwm_register failed: %d\n", ret);
+          aerr("ERROR: pwm_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/stm3240g-eval/src/stm32_spi.c b/configs/stm3240g-eval/src/stm32_spi.c
index 5e247d8c35783ce3ba12efc220d59a5bd611894d..45b7f894e14e4d33042d980a50cb800cf5771e2c 100644
--- a/configs/stm3240g-eval/src/stm32_spi.c
+++ b/configs/stm3240g-eval/src/stm32_spi.c
@@ -53,32 +53,6 @@
 
 #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -124,7 +98,7 @@ void weak_function stm32_spidev_initialize(void)
 #ifdef CONFIG_STM32_SPI1
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -136,7 +110,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI2
 void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -148,7 +122,7 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI3
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
diff --git a/configs/stm3240g-eval/src/stm32_stmpe811.c b/configs/stm3240g-eval/src/stm32_stmpe811.c
index 30b06c12505ef926e8948cd94fcf4c097bb96b10..b1b8126c579bb7c1b67c6905cc14ddc62ecf603f 100644
--- a/configs/stm3240g-eval/src/stm32_stmpe811.c
+++ b/configs/stm3240g-eval/src/stm32_stmpe811.c
@@ -137,6 +137,7 @@ struct stm32_stmpe811config_s
 
   STMPE811_HANDLE handle;   /* The STMPE811 driver handle */
   xcpt_t          handler;  /* The STMPE811 interrupt handler */
+  FAR void       *arg;      /* Interrupt handler argument */
 };
 
 /****************************************************************************
@@ -152,7 +153,8 @@ struct stm32_stmpe811config_s
  * clear   - Acknowledge/clear any pending GPIO interrupt
  */
 
-static int  stmpe811_attach(FAR struct stmpe811_config_s *state, xcpt_t isr);
+static int  stmpe811_attach(FAR struct stmpe811_config_s *state, xcpt_t isr,
+                            FAR void *arg);
 static void stmpe811_enable(FAR struct stmpe811_config_s *state, bool enable);
 static void stmpe811_clear(FAR struct stmpe811_config_s *state);
 
@@ -191,6 +193,7 @@ static struct stm32_stmpe811config_s g_stmpe811config =
     .clear     = stmpe811_clear,
   },
   .handler     = NULL,
+  .arg         = NULL,
 };
 #endif
 
@@ -207,16 +210,18 @@ static struct stm32_stmpe811config_s g_stmpe811config =
  * clear   - Acknowledge/clear any pending GPIO interrupt
  */
 
-static int stmpe811_attach(FAR struct stmpe811_config_s *state, xcpt_t isr)
+static int stmpe811_attach(FAR struct stmpe811_config_s *state, xcpt_t isr,
+                           FAR void *arg)
 {
   FAR struct stm32_stmpe811config_s *priv = (FAR struct stm32_stmpe811config_s *)state;
 
-  ivdbg("Saving handler %p\n", isr);
+  iinfo("Saving handler %p\n", isr);
   DEBUGASSERT(priv);
 
   /* Just save the handler.  We will use it when EXTI interruptsare enabled */
 
   priv->handler = isr;
+  priv->arg     = arg;
   return OK;
 }
 
@@ -235,14 +240,17 @@ static void stmpe811_enable(FAR struct stmpe811_config_s *state, bool enable)
     {
       /* Configure the EXTI interrupt using the SAVED handler */
 
-      (void)stm32_gpiosetevent(GPIO_IO_EXPANDER, true, true, true, priv->handler);
+      (void)stm32_gpiosetevent(GPIO_IO_EXPANDER, true, true, true,
+                               priv->handler, priv->arg);
     }
   else
     {
       /* Configure the EXTI interrupt with a NULL handler to disable it */
 
-     (void)stm32_gpiosetevent(GPIO_IO_EXPANDER, false, false, false, NULL);
+     (void)stm32_gpiosetevent(GPIO_IO_EXPANDER, false, false, false,
+                              NULL, NULL);
     }
+
   leave_critical_section(flags);
 }
 
@@ -279,14 +287,14 @@ int board_tsc_setup(int minor)
   FAR struct i2c_master_s *dev;
   int ret;
 
-  idbg("minor %d\n", minor);
+  iinfo("minor %d\n", minor);
   DEBUGASSERT(minor == 0);
 
   /* Check if we are already initialized */
 
   if (!g_stmpe811config.handle)
     {
-      ivdbg("Initializing\n");
+      iinfo("Initializing\n");
 
       /* Configure the STMPE811 interrupt pin as an input */
 
@@ -297,7 +305,7 @@ int board_tsc_setup(int minor)
       dev = stm32_i2cbus_initialize(CONFIG_STMPE811_I2CDEV);
       if (!dev)
         {
-          idbg("Failed to initialize I2C bus %d\n", CONFIG_STMPE811_I2CDEV);
+          ierr("ERROR: Failed to initialize I2C bus %d\n", CONFIG_STMPE811_I2CDEV);
           return -ENODEV;
         }
 
@@ -307,7 +315,7 @@ int board_tsc_setup(int minor)
         stmpe811_instantiate(dev, (FAR struct stmpe811_config_s *)&g_stmpe811config);
       if (!g_stmpe811config.handle)
         {
-          idbg("Failed to instantiate the STMPE811 driver\n");
+          ierr("ERROR: Failed to instantiate the STMPE811 driver\n");
           return -ENODEV;
         }
 
@@ -316,7 +324,7 @@ int board_tsc_setup(int minor)
       ret = stmpe811_register(g_stmpe811config.handle, CONFIG_STMPE811_DEVMINOR);
       if (ret < 0)
         {
-          idbg("Failed to register STMPE driver: %d\n", ret);
+          ierr("ERROR: Failed to register STMPE driver: %d\n", ret);
           /* stm32_i2cbus_uninitialize(dev); */
           return -ENODEV;
         }
diff --git a/configs/stm3240g-eval/src/stm32_usb.c b/configs/stm3240g-eval/src/stm32_usb.c
index 449c80af8ebbc3cb59c8d2e35a8861f8eecc8cbd..27846d9cf66c6297169fbd9a8d8f15f5d17bb318 100644
--- a/configs/stm3240g-eval/src/stm32_usb.c
+++ b/configs/stm3240g-eval/src/stm32_usb.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm3240g-eval/src/stm32_usbdev.c
  *
- *   Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012-2013, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -106,13 +106,13 @@ static int usbhost_waiter(int argc, char *argv[])
 {
   struct usbhost_hubport_s *hport;
 
-  uvdbg("Running\n");
+  uinfo("Running\n");
   for (;;)
     {
       /* Wait for the device to change state */
 
       DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
-      uvdbg("%s\n", hport->connected ? "connected" : "disconnected");
+      uinfo("%s\n", hport->connected ? "connected" : "disconnected");
 
       /* Did we just become connected? */
 
@@ -176,7 +176,7 @@ int stm32_usbhost_initialize(void)
    * that we care about:
    */
 
-  uvdbg("Register class drivers\n");
+  uinfo("Register class drivers\n");
 
 #ifdef CONFIG_USBHOST_MSC
   /* Register the USB mass storage class class */
@@ -184,7 +184,7 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_msc_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the mass storage class: %d\n", ret);
+      uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
     }
 #endif
 
@@ -194,19 +194,19 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_cdcacm_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
+      uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
     }
 #endif
 
   /* Then get an instance of the USB host interface */
 
-  uvdbg("Initialize USB host\n");
+  uinfo("Initialize USB host\n");
   g_usbconn = stm32_otgfshost_initialize(0);
   if (g_usbconn)
     {
       /* Start a thread to handle device connection. */
 
-      uvdbg("Start usbhost_waiter\n");
+      uinfo("Start usbhost_waiter\n");
 
       pid = task_create("usbhost", CONFIG_USBHOST_DEFPRIO,
                         CONFIG_USBHOST_STACKSIZE,
@@ -273,16 +273,18 @@ void stm32_usbhost_vbusdrive(int iface, bool enable)
  *
  * Input Parameter:
  *   handler - New overcurrent interrupt handler
+ *   arg     - The argument provided for the interrupt handler
  *
  * Returned value:
- *   Old overcurrent interrupt handler
+ *   Zero (OK) is returned on success.  Otherwise, a negated errno value is returned
+ *   to indicate the nature of the failure.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_USBHOST
-xcpt_t stm32_setup_overcurrent(xcpt_t handler)
+int stm32_setup_overcurrent(xcpt_t handler, void *arg)
 {
-  return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler);
+  return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler, arg);
 }
 #endif
 
@@ -300,7 +302,7 @@ xcpt_t stm32_setup_overcurrent(xcpt_t handler)
 #ifdef CONFIG_USBDEV
 void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
 #endif
 
diff --git a/configs/stm3240g-eval/src/stm32_userleds.c b/configs/stm3240g-eval/src/stm32_userleds.c
index eadca33b22794aae072525dabe53259ad61cfe87..18d380c99cb8030036bc6269a7dfd5beabf8d20b 100644
--- a/configs/stm3240g-eval/src/stm32_userleds.c
+++ b/configs/stm3240g-eval/src/stm32_userleds.c
@@ -53,22 +53,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
diff --git a/configs/stm3240g-eval/telnetd/Make.defs b/configs/stm3240g-eval/telnetd/Make.defs
index 34a6989ef177b84bb812f8ca2de6bbe386175532..4e1bd7ee9d8a6952e56a81795b968a9501b4dd75 100644
--- a/configs/stm3240g-eval/telnetd/Make.defs
+++ b/configs/stm3240g-eval/telnetd/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3240g-eval/telnetd/defconfig b/configs/stm3240g-eval/telnetd/defconfig
index b2cc945bdd467641091a78b3e04c2c4cf162d736..b1a9ec005b6192e075f016d704b3a312d7164280 100644
--- a/configs/stm3240g-eval/telnetd/defconfig
+++ b/configs/stm3240g-eval/telnetd/defconfig
@@ -46,10 +46,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +65,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +80,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -208,6 +211,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -355,6 +359,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -435,6 +445,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -453,9 +469,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART3_SERIALDRIVER=y
 # CONFIG_STM32_USART3_1WIREDRIVER is not set
 # CONFIG_USART3_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -480,6 +504,7 @@ CONFIG_STM32_PHYSR_100MBPS=0x0000
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 # CONFIG_STM32_ETH_PTP is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -574,6 +599,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -589,9 +615,12 @@ CONFIG_DISABLE_ENVIRON=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=12
@@ -640,6 +669,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -647,13 +677,17 @@ CONFIG_NAME_MAX=32
 CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGWORK=17
 # CONFIG_MODULE is not set
 
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -671,6 +705,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -686,12 +721,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -699,8 +738,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -708,6 +757,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -731,10 +781,8 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -758,9 +806,10 @@ CONFIG_ETH0_PHY_DP83848C=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -805,19 +854,26 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USART3_IFLOWCONTROL is not set
 # CONFIG_USART3_OFLOWCONTROL is not set
 # CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -825,13 +881,11 @@ CONFIG_USART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -950,12 +1004,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1003,6 +1051,8 @@ CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1017,7 +1067,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -1025,8 +1074,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1052,9 +1103,10 @@ CONFIG_HAVE_CXXINITIALIZE=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -1062,10 +1114,10 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1075,20 +1127,18 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1108,9 +1158,9 @@ CONFIG_EXAMPLES_TELNETD_CLIENTPRIO=128
 CONFIG_EXAMPLES_TELNETD_CLIENTSTACKSIZE=2048
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
@@ -1133,8 +1183,9 @@ CONFIG_EXAMPLES_TELNETD_CLIENTSTACKSIZE=2048
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1148,9 +1199,9 @@ CONFIG_EXAMPLES_TELNETD_CLIENTSTACKSIZE=2048
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
@@ -1172,16 +1223,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3240g-eval/webserver/Make.defs b/configs/stm3240g-eval/webserver/Make.defs
index bf77efb4e8bd406b1a30441cd87ccf9cce284500..84bb35cc266aed993d83a2b8841d47a15c08d299 100644
--- a/configs/stm3240g-eval/webserver/Make.defs
+++ b/configs/stm3240g-eval/webserver/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3240g-eval/webserver/defconfig b/configs/stm3240g-eval/webserver/defconfig
index d6107112897814b25ccdb3b78f27c0104e98c325..1e7d068c89c2ff90f777c1407bcc00f94d5da2b3 100644
--- a/configs/stm3240g-eval/webserver/defconfig
+++ b/configs/stm3240g-eval/webserver/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -200,6 +203,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -347,6 +351,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -428,6 +438,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 CONFIG_STM32_CCMEXCLUDE=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -446,9 +462,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART3_SERIALDRIVER=y
 # CONFIG_STM32_USART3_1WIREDRIVER is not set
 # CONFIG_USART3_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -488,6 +512,7 @@ CONFIG_STM32_PHYSR_100MBPS=0x0000
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 # CONFIG_STM32_ETH_PTP is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -578,11 +603,11 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -598,9 +623,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=8
@@ -652,6 +680,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -660,6 +689,7 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
@@ -671,8 +701,11 @@ CONFIG_MQ_MAXMSGSIZE=32
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -690,6 +723,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -710,12 +744,16 @@ CONFIG_I2C_POLLED=y
 # CONFIG_I2C_TRACE is not set
 # CONFIG_I2C_DRIVER is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 # CONFIG_RTC_ALARM is not set
@@ -728,8 +766,18 @@ CONFIG_RTC_DATETIME=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -737,6 +785,7 @@ CONFIG_RTC_DATETIME=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -759,7 +808,9 @@ CONFIG_MTD=y
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
 # CONFIG_MTD_N25QXXX is not set
 # CONFIG_MTD_SMART is not set
@@ -789,10 +840,8 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -816,9 +865,10 @@ CONFIG_ETH0_PHY_NONE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -864,19 +914,26 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USART3_IFLOWCONTROL is not set
 # CONFIG_USART3_OFLOWCONTROL is not set
 # CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -884,13 +941,11 @@ CONFIG_USART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -1029,12 +1084,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1084,6 +1133,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1101,7 +1152,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
@@ -1111,8 +1161,10 @@ CONFIG_LIBC_NETDB=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1138,21 +1190,23 @@ CONFIG_HAVE_CXXINITIALIZE=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1175,20 +1229,18 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1202,19 +1254,19 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
 CONFIG_EXAMPLES_WEBSERVER=y
 CONFIG_EXAMPLES_WEBSERVER_IPADDR=0x0a000002
 CONFIG_EXAMPLES_WEBSERVER_DRIPADDR=0x0a000001
 CONFIG_EXAMPLES_WEBSERVER_NETMASK=0xffffff00
 CONFIG_EXAMPLES_WEBSERVER_NOMAC=y
-# CONFIG_EXAMPLES_USBTERM is not set
-# CONFIG_EXAMPLES_WATCHDOG is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -1234,8 +1286,9 @@ CONFIG_EXAMPLES_WEBSERVER_NOMAC=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1247,13 +1300,16 @@ CONFIG_EXAMPLES_WEBSERVER_NOMAC=y
 #
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 # CONFIG_NETUTILS_TFTPC is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 CONFIG_NETUTILS_WEBSERVER=y
 # CONFIG_NETUTILS_HTTPD_SINGLECONNECT is not set
@@ -1267,10 +1323,7 @@ CONFIG_NETUTILS_HTTPD_CLASSIC=y
 # CONFIG_NETUTILS_HTTPD_MMAP is not set
 # CONFIG_NETUTILS_HTTPD_SENDFILE is not set
 CONFIG_NETUTILS_HTTPD_KEEPALIVE_DISABLE=y
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1322,12 +1375,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1345,6 +1398,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1370,6 +1424,7 @@ CONFIG_NSH_CONSOLE=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1413,13 +1468,13 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_SYSTEM_I2CTOOL is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_I2CTOOL is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1428,6 +1483,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm3240g-eval/xmlrpc/Make.defs b/configs/stm3240g-eval/xmlrpc/Make.defs
index f196d3b4f3a8c065abe250dd986640fc33e54c77..2f5cd93509d279eacf6cc0f68dbe6981865dd4ac 100644
--- a/configs/stm3240g-eval/xmlrpc/Make.defs
+++ b/configs/stm3240g-eval/xmlrpc/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm3240g-eval/xmlrpc/defconfig b/configs/stm3240g-eval/xmlrpc/defconfig
index 010bb5d881cc5ae8bedf98e8548d73b7365414e5..7de2eeb60bfe4e0c9d78bffa25783212332da90e 100644
--- a/configs/stm3240g-eval/xmlrpc/defconfig
+++ b/configs/stm3240g-eval/xmlrpc/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -200,6 +203,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -347,6 +351,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -428,6 +438,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -446,9 +462,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART3_SERIALDRIVER=y
 # CONFIG_STM32_USART3_1WIREDRIVER is not set
 # CONFIG_USART3_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -483,6 +507,7 @@ CONFIG_STM32_PHYSR_100MBPS=0x0000
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 # CONFIG_STM32_ETH_PTP is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -577,6 +602,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -587,9 +613,12 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=12
@@ -644,6 +673,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -652,6 +682,7 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
 
 #
 # POSIX Message Queue Options
@@ -663,8 +694,11 @@ CONFIG_MQ_MAXMSGSIZE=32
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -682,6 +716,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -702,12 +737,16 @@ CONFIG_I2C_POLLED=y
 # CONFIG_I2C_TRACE is not set
 # CONFIG_I2C_DRIVER is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_TIMERS_CS2100CP is not set
@@ -716,8 +755,18 @@ CONFIG_I2C_POLLED=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -725,6 +774,7 @@ CONFIG_I2C_POLLED=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -746,10 +796,8 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -773,9 +821,10 @@ CONFIG_ETH0_PHY_DP83848C=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -822,19 +871,26 @@ CONFIG_USART3_2STOP=0
 # CONFIG_USART3_IFLOWCONTROL is not set
 # CONFIG_USART3_OFLOWCONTROL is not set
 # CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -842,13 +898,11 @@ CONFIG_USART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=650
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -987,12 +1041,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1042,6 +1090,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1059,7 +1109,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
@@ -1077,8 +1126,10 @@ CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1104,21 +1155,23 @@ CONFIG_HAVE_CXXINITIALIZE=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1128,20 +1181,18 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1155,10 +1206,9 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 CONFIG_EXAMPLES_XMLRPC=y
 CONFIG_EXAMPLES_XMLRPC_BUFFERSIZE=1024
@@ -1189,8 +1239,9 @@ CONFIG_EXAMPLES_XMLRPC_NETMASK=0xffffff00
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1204,21 +1255,21 @@ CONFIG_EXAMPLES_XMLRPC_NETMASK=0xffffff00
 # CONFIG_NETUTILS_CODECS is not set
 CONFIG_NETUTILS_DHCPC=y
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
 # CONFIG_NETUTILS_TFTPC is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 CONFIG_NETUTILS_XMLRPC=y
 CONFIG_XMLRPC_STRINGSIZE=64
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1237,18 +1288,19 @@ CONFIG_XMLRPC_STRINGSIZE=64
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_SYSTEM_I2CTOOL is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_I2CTOOL is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32_tiny/README.txt b/configs/stm32_tiny/README.txt
index 1909b9dac8b4afed3679e5aee51dfb0321cbab7c..7abbc4ccb0ef12d3f9b674c75662bc1a2b02a8b3 100644
--- a/configs/stm32_tiny/README.txt
+++ b/configs/stm32_tiny/README.txt
@@ -493,7 +493,7 @@ STM32 Tiny - specific Configuration Options
     CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
     CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
     CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
-    CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+    CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
       dump of all CAN registers.
 
   STM32Tiny SPI Configuration
@@ -563,7 +563,7 @@ Where  is one of the following:
 
        Special PWM-only debug options:
 
-       CONFIG_DEBUG_PWM
+       CONFIG_DEBUG_PWM_INFO
 
      7. USB Support (CDC/ACM device)
 
@@ -617,14 +617,14 @@ Where  is one of the following:
 
         - /dev/console still exists and still refers to the serial port. So
           you can still use certain kinds of debug output (see include/debug.h, all
-          of the interfaces based on lowsyslog will work in this configuration).
+          of the debug output from interrupt handlers will be lost.
 
         - But don't enable USB debug output!  Since USB is console is used for
           USB debug output and you are using a USB console, there will be
           infinite loops and deadlocks:  Debug output generates USB debug
           output which generatates USB debug output, etc.  If you want USB
           debug output, you should consider enabling USB trace
-          (CONFIG_USBDEV_TRACE) and perhaps the USB monitor (CONFIG_SYSTEM_USBMONITOR).
+          (CONFIG_USBDEV_TRACE) and perhaps the USB monitor (CONFIG_USBMONITOR).
 
           See the usbnsh configuration below for more information on configuring
           USB trace output and the USB monitor.
@@ -657,7 +657,6 @@ Where  is one of the following:
     3. This configuration does have UART2 output enabled and set up as
        the system logging device:
 
-       CONFIG_SYSLOG=y                    : Enable output to syslog, not console
        CONFIG_SYSLOG_CHAR=y               : Use a character device for system logging
        CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART2 will be /dev/ttyS0
 
@@ -675,16 +674,16 @@ Where  is one of the following:
        CONFIG_USBDEV_TRACE_NRECORDS=128        : Buffer 128 records in memory
        CONFIG_NSH_USBDEV_TRACE=n               : No builtin tracing from NSH
        CONFIG_NSH_ARCHINIT=y                   : Automatically start the USB monitor
-       CONFIG_SYSTEM_USBMONITOR=y              : Enable the USB monitor daemon
-       CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
-       CONFIG_SYSTEM_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
-       CONFIG_SYSTEM_USBMONITOR_INTERVAL=2     : Dump trace data every 2 seconds
-
-       CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y    : Enable TRACE output
-       CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y
-       CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y
-       CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y
-       CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y
+       CONFIG_USBMONITOR=y              : Enable the USB monitor daemon
+       CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
+       CONFIG_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
+       CONFIG_USBMONITOR_INTERVAL=2     : Dump trace data every 2 seconds
+
+       CONFIG_USBMONITOR_TRACEINIT=y    : Enable TRACE output
+       CONFIG_USBMONITOR_TRACECLASS=y
+       CONFIG_USBMONITOR_TRACETRANSFERS=y
+       CONFIG_USBMONITOR_TRACECONTROLLER=y
+       CONFIG_USBMONITOR_TRACEINTERRUPTS=y
 
     5. By default, this project assumes that you are *NOT* using the DFU
        bootloader.
diff --git a/configs/stm32_tiny/include/board.h b/configs/stm32_tiny/include/board.h
index d393437c50ca0655c5f8aa865f8e2262dec622ef..30b472ca186214af06de5345624c630ddd3c2fc0 100644
--- a/configs/stm32_tiny/include/board.h
+++ b/configs/stm32_tiny/include/board.h
@@ -1,8 +1,7 @@
 /************************************************************************************
  * configs/stm32_tiny/include/board.h
- * include/arch/board/board.h
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Authors: Gregory Nutt 
  *            Laurent Latil 
  *
@@ -94,14 +93,14 @@
 #define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd2
 #define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
 
-/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */
+/* APB1 timers 2-7 will be twice PCLK1 */
 
 #define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM5_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM6_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM7_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 
 /* USB divider -- Divide PLL clock by 1.5 */
 
@@ -111,8 +110,14 @@
  * otherwise frequency is 2xAPBx.
  * Note: TIM1,8 are on APB2, others on APB1 */
 
-#define STM32_TIM18_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_TIM27_FREQUENCY   STM32_HCLK_FREQUENCY
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM3_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM4_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM5_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM6_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM7_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM8_FREQUENCY    STM32_HCLK_FREQUENCY
 
 /* SDIO dividers.  Note that slower clocking is required when DMA is disabled
  * in order to avoid RX overrun/TX underrun errors due to delayed responses
diff --git a/configs/stm32_tiny/nsh/Make.defs b/configs/stm32_tiny/nsh/Make.defs
index 61f1d54b581a594da77d1a700ad86ee13599253a..34619c299d840e5dc6675e858152a20820db39b4 100644
--- a/configs/stm32_tiny/nsh/Make.defs
+++ b/configs/stm32_tiny/nsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32_tiny/nsh/defconfig b/configs/stm32_tiny/nsh/defconfig
index 488ebd637b05e6cd9cb71ca2ee6615622a270f9b..6c7c600d0fde329e55b9db0ffcfec276a236b6a6 100644
--- a/configs/stm32_tiny/nsh/defconfig
+++ b/configs/stm32_tiny/nsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -200,6 +200,7 @@ CONFIG_ARCH_CHIP_STM32F103C8=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -407,6 +408,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -418,9 +425,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -521,17 +536,15 @@ CONFIG_ARCH_BOARD="stm32_tiny"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -543,9 +556,12 @@ CONFIG_LIB_BOARDCTL=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=7
@@ -643,6 +659,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -662,9 +679,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -678,8 +700,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -687,6 +719,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -695,9 +728,10 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -744,8 +778,10 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 CONFIG_DRIVERS_WIRELESS=y
 # CONFIG_WL_CC1101 is not set
 # CONFIG_WL_CC3000 is not set
@@ -754,17 +790,22 @@ CONFIG_WL_NRF24L01_DFLT_ADDR_WIDTH=5
 CONFIG_WL_NRF24L01_CHECK_PARAMS=y
 CONFIG_WL_NRF24L01_RXSUPPORT=y
 CONFIG_WL_NRF24L01_RXFIFO_LEN=128
+# CONFIG_CL_MFRC522 is not set
 # CONFIG_WL_PN532 is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -802,12 +843,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -872,7 +907,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -880,8 +914,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -907,16 +943,15 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -925,35 +960,34 @@ CONFIG_EXAMPLES_NRF24L01TERM=y
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -975,8 +1009,8 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1042,7 +1076,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1064,6 +1097,7 @@ CONFIG_NSH_DISABLE_UNAME=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1100,12 +1134,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1113,6 +1147,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32_tiny/src/stm32_appinit.c b/configs/stm32_tiny/src/stm32_appinit.c
index 4b590de5d539a5bb0ce22a23457d63f3fa21d458..d9152f5ddf5562049aae39f9a12a86336cec0f84 100644
--- a/configs/stm32_tiny/src/stm32_appinit.c
+++ b/configs/stm32_tiny/src/stm32_appinit.c
@@ -80,6 +80,18 @@
 
 int board_app_initialize(uintptr_t arg)
 {
+#ifdef CONFIG_PWM
+  int ret;
+
+  /* Initialize PWM and register the PWM device. */
+
+  ret = stm32_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_pwm_setup() failed: %d\n", ret);
+    }
+#endif
+
 #if defined(CONFIG_WL_NRF24L01)
   syslog(LOG_INFO, "Register the nRF24L01 module");
   stm32_wlinitialize();
diff --git a/configs/stm32_tiny/src/stm32_leds.c b/configs/stm32_tiny/src/stm32_leds.c
index b39f6b97ee9ee2b33d3a3ef77c2ec41440a5ea80..36b9a913adb885efa73f8f832d43c24ab8258d08 100644
--- a/configs/stm32_tiny/src/stm32_leds.c
+++ b/configs/stm32_tiny/src/stm32_leds.c
@@ -52,33 +52,13 @@
 #include "stm32.h"
 #include "stm32_tiny.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
 
 static inline void set_led(bool v)
 {
-  ledvdbg("Turn LED %s\n", v? "on":"off");
+  ledinfo("Turn LED %s\n", v? "on":"off");
   stm32_gpiowrite(GPIO_LED, v);
 }
 
@@ -103,7 +83,7 @@ void board_autoled_initialize(void)
 
 void board_autoled_on(int led)
 {
-  ledvdbg("board_autoled_on(%d)\n",led);
+  ledinfo("board_autoled_on(%d)\n",led);
   switch (led)
     {
     case LED_STARTED:
diff --git a/configs/stm32_tiny/src/stm32_pwm.c b/configs/stm32_tiny/src/stm32_pwm.c
index 715d8d3a700928de513c0deb395f14c5bbc1b738..86fb75cdfd1e97e7c8d4d6be6df4f73f3b634068 100644
--- a/configs/stm32_tiny/src/stm32_pwm.c
+++ b/configs/stm32_tiny/src/stm32_pwm.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm32_tiny/src/stm32_pwm.c
  *
- *   Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012-2013, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -43,7 +43,7 @@
 #include 
 
 #include 
-#include 
+#include 
 
 #include 
 
@@ -63,24 +63,19 @@
 
 #ifdef CONFIG_PWM
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_pwm_setup
+ * Name: stm32_pwm_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/pwm.
+ *   Initialize PWM and register the PWM device.
  *
  ************************************************************************************/
 
-int board_pwm_setup(void)
+int stm32_pwm_setup(void)
 {
   static bool initialized = false;
   struct pwm_lowerhalf_s *pwm;
@@ -95,7 +90,7 @@ int board_pwm_setup(void)
       pwm = stm32_pwminitialize(STM32TINY_PWMTIMER);
       if (!pwm)
         {
-          adbg("Failed to get the STM32 PWM lower half\n");
+          aerr("ERROR: Failed to get the STM32 PWM lower half\n");
           return -ENODEV;
         }
 
@@ -104,7 +99,7 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/pwm0", pwm);
       if (ret < 0)
         {
-          adbg("pwm_register failed: %d\n", ret);
+          aerr("ERROR: pwm_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/stm32_tiny/src/stm32_spi.c b/configs/stm32_tiny/src/stm32_spi.c
index 0af605950843d06dd9da1215cb047a918ef3a26e..ac4e3eb68ed58f91d34a1e8a2f1c0adf3c18670e 100644
--- a/configs/stm32_tiny/src/stm32_spi.c
+++ b/configs/stm32_tiny/src/stm32_spi.c
@@ -54,33 +54,6 @@
 
 #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_SPI
-#endif
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -104,7 +77,7 @@ void stm32_spidev_initialize(void)
 #ifdef CONFIG_STM32_SPI2
 #  ifdef CONFIG_WL_NRF24L01
   /* Configure the SPI-based NRF24L01 chip select GPIO */
-  spivdbg("Configure GPIO for SPI2/CS\n");
+  spiinfo("Configure GPIO for SPI2/CS\n");
   stm32_configgpio(GPIO_NRF24L01_CS);
 #  endif
 #endif
@@ -153,7 +126,7 @@ void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele
   {
 #ifdef CONFIG_WL_NRF24L01
     case SPIDEV_WIRELESS:
-      spivdbg("nRF24L01 device %s\n", selected ? "asserted" : "de-asserted");
+      spiinfo("nRF24L01 device %s\n", selected ? "asserted" : "de-asserted");
 
       /* Set the GPIO low to select and high to de-select */
 
diff --git a/configs/stm32_tiny/src/stm32_tiny.h b/configs/stm32_tiny/src/stm32_tiny.h
index daadcf2605c8551eb294680862a8969a8b8d0ecc..5a75d25d9fce7452d9419695b097ff76c46f2155 100644
--- a/configs/stm32_tiny/src/stm32_tiny.h
+++ b/configs/stm32_tiny/src/stm32_tiny.h
@@ -121,7 +121,7 @@
  *
  ************************************************************************************/
 
-extern void stm32_spidev_initialize(void);
+void stm32_spidev_initialize(void);
 
 /************************************************************************************
  * Name: stm32_usbinitialize
@@ -131,7 +131,19 @@ extern void stm32_spidev_initialize(void);
  *
  ************************************************************************************/
 
-extern void stm32_usbinitialize(void);
+void stm32_usbinitialize(void);
+
+/************************************************************************************
+ * Name: stm32_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PWM
+int stm32_pwm_setup(void);
+#endif
 
 /************************************************************************************
  * Name: stm32_wlinitialize
@@ -141,7 +153,7 @@ extern void stm32_usbinitialize(void);
  *
  ************************************************************************************/
 
-extern void stm32_wlinitialize(void);
+void stm32_wlinitialize(void);
 
 #endif /* __ASSEMBLY__ */
 #endif /* __CONFIGS_HYMINI_STM32V_H */
diff --git a/configs/stm32_tiny/src/stm32_usbdev.c b/configs/stm32_tiny/src/stm32_usbdev.c
index 80e3671e3bfd0e345608a41b7d86ac5435894f63..e9e76b4c2e21f47ff9043455076c0f1111c7397a 100644
--- a/configs/stm32_tiny/src/stm32_usbdev.c
+++ b/configs/stm32_tiny/src/stm32_usbdev.c
@@ -74,7 +74,7 @@
 
 void stm32_usbinitialize(void)
 {
-  ulldbg("called\n");
+  uinfo("called\n");
 
   /* USB Soft Connect Pullup */
   stm32_configgpio(GPIO_USB_PULLUP);
@@ -112,6 +112,5 @@ int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable)
 
 void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
-
diff --git a/configs/stm32_tiny/src/stm32_wireless.c b/configs/stm32_tiny/src/stm32_wireless.c
index 5a8b6b0da95d98ed65145534bdedf42faa679bf5..a08e48a65ab5d74aa34c0e7f6caf4a1fab7d3f2a 100644
--- a/configs/stm32_tiny/src/stm32_wireless.c
+++ b/configs/stm32_tiny/src/stm32_wireless.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm32_tiny/src/stm32_wireless.c
  *
- *   Copyright (C) 2009, 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Laurent Latil 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -57,7 +57,7 @@
  * Private Function Prototypes
  ************************************************************************************/
 
-static int stm32tiny_wl_irq_attach(xcpt_t isr);
+static int stm32tiny_wl_irq_attach(xcpt_t isr, FAR void *arg);
 
 static void stm32tiny_wl_chip_enable(bool enable);
 
@@ -72,22 +72,24 @@ static FAR struct nrf24l01_config_s nrf_cfg =
 };
 
 static xcpt_t g_isr;
+static FAR void *g_arg;
 
 /************************************************************************************
  * Private Functions
  ************************************************************************************/
 
-static int stm32tiny_wl_irq_attach(xcpt_t isr)
+static int stm32tiny_wl_irq_attach(xcpt_t isr, FAR void *arg)
 {
-  vdbg("Attach IRQ\n");
+  _info("Attach IRQ\n");
   g_isr = isr;
-  stm32_gpiosetevent(GPIO_NRF24L01_IRQ, false, true, false, g_isr);
+  g_arg = arg;
+  (void)stm32_gpiosetevent(GPIO_NRF24L01_IRQ, false, true, false, g_isr, g_arg);
   return OK;
 }
 
 static void stm32tiny_wl_chip_enable(bool enable)
 {
-  vdbg("CE:%d\n", enable);
+  _info("CE:%d\n", enable);
   stm32_gpiowrite(GPIO_NRF24L01_CE, enable);
 }
 
@@ -114,14 +116,14 @@ void stm32_wlinitialize(void)
   spidev = stm32_spibus_initialize(2);
   if (!spidev)
     {
-      dbg("Failed to initialize SPI bus\n");
+      _err("ERROR: Failed to initialize SPI bus\n");
       return;
     }
 
   result = nrf24l01_register(spidev, &nrf_cfg);
   if (result != OK)
     {
-      dbg("Failed to register initialize SPI bus\n");
+      _err("ERROR: Failed to register initialize SPI bus\n");
       return;
     }
 }
diff --git a/configs/stm32_tiny/usbnsh/Make.defs b/configs/stm32_tiny/usbnsh/Make.defs
index 0c87213a5972c41fe32cd63d693760c3e9633f4d..c15224fc72b7a20e7e50279f86726e82a3e98a4e 100644
--- a/configs/stm32_tiny/usbnsh/Make.defs
+++ b/configs/stm32_tiny/usbnsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32_tiny/usbnsh/defconfig b/configs/stm32_tiny/usbnsh/defconfig
index 18a9cdab677664c022a5c16bb54e73e3a82fc4ec..f3f2025f0363e8f463dd7edfbfe426dc02d5dc87 100644
--- a/configs/stm32_tiny/usbnsh/defconfig
+++ b/configs/stm32_tiny/usbnsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +199,7 @@ CONFIG_ARCH_CHIP_STM32F103C8=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -405,6 +406,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -416,9 +423,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -514,18 +529,16 @@ CONFIG_ARCH_BOARD="stm32_tiny"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -537,9 +550,12 @@ CONFIG_BOARDCTL_USBDEVCTRL=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=7
@@ -632,6 +648,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -647,6 +664,7 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
@@ -660,8 +678,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -669,6 +697,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -677,9 +706,9 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -725,6 +754,7 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -769,16 +799,22 @@ CONFIG_CDCACM_VENDORSTR="NuttX"
 CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+CONFIG_HAVE_USBTRACE=y
+# CONFIG_USBMONITOR is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_NONE=y
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -816,12 +852,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -886,7 +916,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -894,8 +923,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -921,16 +952,15 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -939,35 +969,34 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -989,8 +1018,8 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1055,7 +1084,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1077,6 +1105,7 @@ CONFIG_NSH_DISABLE_UNAME=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1119,12 +1148,13 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1132,8 +1162,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
-# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
-# CONFIG_SYSTEM_USBMONITOR is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32butterfly2/Kconfig b/configs/stm32butterfly2/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..9f26f5f3d273498f7431dba22273316eaf6a3aaa
--- /dev/null
+++ b/configs/stm32butterfly2/Kconfig
@@ -0,0 +1,7 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_BOARD_STM32_BUTTERFLY2
+endif
diff --git a/configs/stm32butterfly2/include/board.h b/configs/stm32butterfly2/include/board.h
new file mode 100644
index 0000000000000000000000000000000000000000..05a28cb94b8051c5fe1508f355b8b8c7cd148d2d
--- /dev/null
+++ b/configs/stm32butterfly2/include/board.h
@@ -0,0 +1,204 @@
+/*******************************************************************************
+ * configs/stm32butterfly2/include/board.h
+ *
+ *   Copyright (C) 2016 Michał Łyszczek. All rights reserved.
+ *   Author: Michał Łyszczek 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************/
+
+#ifndef __CONFIGS_STM32_BUTTERFLY2_INCLUDE_BOARD_H
+#define __CONFIGS_STM32_BUTTERFLY2_INCLUDE_BOARD_H 1
+
+/*******************************************************************************
+ * Included Files
+ ******************************************************************************/
+
+#include 
+
+#ifndef __ASSEMBLY__
+# include 
+#endif
+
+#include "stm32_rcc.h"
+
+/*******************************************************************************
+ * Pre-processor Definitions
+ ******************************************************************************/
+
+/* Clocking *******************************************************************/
+
+/* HSI - 8 MHz RC factory-trimmed
+ * LSI - 40 KHz RC (30-60KHz, uncalibrated)
+ * HSE - On-board crystal frequency is 14.7456MHz
+ * LSE - LSE is not connected
+ */
+
+#define STM32_BOARD_XTAL        14745600ul
+
+#define STM32_HSI_FREQUENCY     8000000ul
+#define STM32_LSI_FREQUENCY     40000u
+#define STM32_HSE_FREQUENCY     STM32_BOARD_XTAL
+#define STM32_LSE_FREQUENCY     0
+
+/* PLL output is 71.8848MHz */
+
+#define STM32_PLL_PREDIV2       RCC_CFGR2_PREDIV2d4
+#define STM32_PLL_PLL2MUL       RCC_CFGR2_PLL2MULx12
+#define STM32_PLL_PREDIV1       RCC_CFGR2_PREDIV1d4
+#define STM32_PLL_PLLMUL        RCC_CFGR_PLLMUL_CLKx65
+#define STM32_PLL_FREQUENCY     71884800ul
+
+/* SYSCLK and HCLK adre the PLL frequency */
+
+#define STM32_SYSCLK_FREQUENCY  STM32_PLL_FREQUENCY
+#define STM32_HCLK_FREQUENCY    STM32_PLL_FREQUENCY
+#define STM32_BOARD_HCLK        STM32_HCLK_FREQUENCY
+
+/* USB clock output is 47.9232MHz */
+
+#define STM32_CFGR_OTGFSPRE     RCC_CFGR_OTGFSPREd3
+
+/* APB2 clock (PCLK2) is HCLK */
+
+#define STM32_RCC_CFGR_PPRE2    RCC_CFGR_PPRE2_HCLK
+#define STM32_PCLK2_FREQUENCY   STM32_HCLK_FREQUENCY
+#define STM32_APB2_CLKIN        STM32_PCLK2_FREQUENCY
+
+#define STM32APB_TIM1_CLKIN     STM32_PCLK2_FREQUENCY
+
+/* APB1 clock (PCLK1) is HCLK/2 (35.9424MHz) */
+
+#define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd2
+#define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
+
+#define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+
+/* LED definitions ************************************************************/
+/* There are four LEDs on stm32butterfly2 board that can be controlled by
+ * software. All pulled high and van be illuminated by driving the output low.
+ *
+ *   LED1 PB0
+ *   LED2 PB1
+ *   LED3 PC4
+ *   LED4 PC5
+ */
+
+/* LED index values for use with board_userled() */
+
+#define BOARD_LED1      0
+#define BOARD_LED2      1
+#define BOARD_LED3      2
+#define BOARD_LED4      3
+#define BOARD_NLEDS     4
+
+/* LED bits for use with board_userled_all() */
+
+#define BOARD_LED1_BIT  (1 << BOARD_LED1)
+#define BOARD_LED2_BIT  (1 << BOARD_LED2)
+#define BOARD_LED3_BIT  (1 << BOARD_LED3)
+#define BOARD_LED4_BIT  (1 << BOARD_LED4)
+
+/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is defined.
+ * In thath case, the usage by the board port is defined in include/board.h and
+ * src/stm32_leds.c. The LEDs are used to encode OS-related events as follows:
+ *
+ *      SYMBOL            Val    Meaning                     LED state
+ *                                                       LED1 LED2 LED3 LED4
+ *      ----------------- ---   -----------------------  ---- ---- ---- ----  */
+#define LED_STARTED       0  /* NuttX has been started   ON   OFF  OFF  OFF   */
+#define LED_HEAPALLOCATE  1  /* Heap has been allocated  OFF  ON   OFF  OFF   */
+#define LED_IRQSENABLED   2  /* Interrupts enabled       OFF  OFF  ON   OFF   */
+#define LED_STACKCREATED  3  /* Idle stack created       OFF  OFF  OFF  ON    */
+#define LED_INIRQ         5  /* In an interrupt          N/C  N/C  N/C  GLOW  */
+#define LED_SIGNAL        6  /* In a signal handler      N/C  N/C  N/C  GLOW  */
+#define LED_ASSERTION     7  /* An assertion failed      N/C  N/C  N/C  GLOW  */
+#define LED_PANIC         8  /* The system has crashed   N/C  N/C  N/C  FLASH */
+#undef  LED_IDLE             /* MCU is is sleep mode         Not used         */
+
+/* After booting, LED1-3 are not longer used by the system and can be used for
+ * other purposes by the application (Of course, all LEDs are available to the
+ * application if CONFIG_ARCH_LEDS is not defined.
+ */
+
+/* ADC configuration. Right now only ADC12_IN10 is supported (potentiometer) */
+
+#ifdef CONFIG_STM32_ADC2
+#  error "CONFIG_STM32_ADC2 is not supported"
+#endif
+
+/* SPI configuration. Only SPI1 is supported */
+
+#ifdef CONFIG_STM32_SPI2
+#  error "CONFIG_STM32_SPI2 is not supported"
+#endif
+
+/*******************************************************************************
+ * Public Data
+ ******************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/*******************************************************************************
+ * Public Function Prototypes
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ *     All STM32 architectures must provide the following entry point. This
+ *     entry point is called early in the initialization -- after all memory
+ *     has been configured and mapped but before any devices have been
+ *     initialized.
+ ******************************************************************************/
+
+void stm32_boardinitialize(void);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __CONFIGS_STM32_BUTTERFLY2_INCLUDE_BOARD_H */
diff --git a/configs/stm3210e-eval/buttons/Make.defs b/configs/stm32butterfly2/nsh/Make.defs
similarity index 94%
rename from configs/stm3210e-eval/buttons/Make.defs
rename to configs/stm32butterfly2/nsh/Make.defs
index e460dc236ea54cff003b0759b7cb90af42de9263..fdb1fc9867c7bfc0ce765bc7ee651f284055478c 100644
--- a/configs/stm3210e-eval/buttons/Make.defs
+++ b/configs/stm32butterfly2/nsh/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
-# configs/stm3210e-eval/buttons/Make.defs
+# configs/stm32butterfly2/nsh/Make.defs
 #
-#   Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -38,9 +38,9 @@ include ${TOPDIR}/tools/Config.mk
 include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
 
 ifeq ($(CONFIG_STM32_DFU),y)
-  LDSCRIPT = ld.script.dfu
+  LDSCRIPT = dfu.ld
 else
-  LDSCRIPT = ld.script
+  LDSCRIPT = flash.ld
 endif
 
 ifeq ($(WINTOOL),y)
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
@@ -94,7 +94,7 @@ CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
 AFLAGS = $(CFLAGS) -D__ASSEMBLY__
 
 NXFLATLDFLAGS1 = -r -d -warn-common
-NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
 LDNXFLATFLAGS = -e main -s 2048
 
 ASMEXT = .S
diff --git a/configs/stm32butterfly2/nsh/defconfig b/configs/stm32butterfly2/nsh/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..0bcc423bd769f117b76fe3cca0384cabe9435680
--- /dev/null
+++ b/configs/stm32butterfly2/nsh/defconfig
@@ -0,0 +1,1268 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+# CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
+# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+# CONFIG_USBHOST_BULK_DISABLE is not set
+# CONFIG_USBHOST_INT_DISABLE is not set
+# CONFIG_USBHOST_ISOC_DISABLE is not set
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+# CONFIG_ARCH_CHIP_STM32F103C8 is not set
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+CONFIG_ARCH_CHIP_STM32F107VC=y
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+# CONFIG_ARCH_CHIP_STM32F407ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+CONFIG_STM32_STM32F10XX=y
+# CONFIG_STM32_VALUELINE is not set
+CONFIG_STM32_CONNECTIVITYLINE=y
+# CONFIG_STM32_PERFORMANCELINE is not set
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+# CONFIG_STM32_MEDIUMDENSITY is not set
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+# CONFIG_STM32_STM32F40XX is not set
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+# CONFIG_STM32_STM32F407 is not set
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+# CONFIG_STM32_HAVE_CCM is not set
+# CONFIG_STM32_HAVE_USBDEV is not set
+CONFIG_STM32_HAVE_OTGFS=y
+# CONFIG_STM32_HAVE_FSMC is not set
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+# CONFIG_STM32_HAVE_USART6 is not set
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+# CONFIG_STM32_HAVE_TIM2 is not set
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+# CONFIG_STM32_HAVE_TIM8 is not set
+# CONFIG_STM32_HAVE_TIM9 is not set
+# CONFIG_STM32_HAVE_TIM10 is not set
+# CONFIG_STM32_HAVE_TIM11 is not set
+# CONFIG_STM32_HAVE_TIM12 is not set
+# CONFIG_STM32_HAVE_TIM13 is not set
+# CONFIG_STM32_HAVE_TIM14 is not set
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+# CONFIG_STM32_HAVE_ADC3 is not set
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+CONFIG_STM32_HAVE_CAN2=y
+CONFIG_STM32_HAVE_DAC1=y
+CONFIG_STM32_HAVE_DAC2=y
+# CONFIG_STM32_HAVE_RNG is not set
+CONFIG_STM32_HAVE_ETHMAC=y
+# CONFIG_STM32_HAVE_I2C2 is not set
+# CONFIG_STM32_HAVE_I2C3 is not set
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+CONFIG_STM32_ADC1=y
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_BKP is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CAN2 is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_DAC1 is not set
+# CONFIG_STM32_DAC2 is not set
+# CONFIG_STM32_ETHMAC is not set
+# CONFIG_STM32_I2C1 is not set
+CONFIG_STM32_OTGFS=y
+CONFIG_STM32_PWR=y
+CONFIG_STM32_SPI1=y
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SYSCFG=y
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_USART1 is not set
+CONFIG_STM32_USART2=y
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+CONFIG_STM32_ADC=y
+CONFIG_STM32_SPI=y
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_SPI1_REMAP is not set
+CONFIG_STM32_USART2_REMAP=y
+# CONFIG_STM32_JTAG_DISABLE is not set
+CONFIG_STM32_JTAG_FULL_ENABLE=y
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+# CONFIG_STM32_JTAG_SW_ENABLE is not set
+# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32_CCM_PROCFS is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+
+#
+# ADC Configuration
+#
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
+# CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+
+#
+# SPI Configuration
+#
+# CONFIG_STM32_SPI_INTERRUPTS is not set
+# CONFIG_STM32_SPI_DMA is not set
+CONFIG_STM32_HAVE_RTC_COUNTER=y
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+CONFIG_STM32_OTGFS_RXFIFO_SIZE=128
+CONFIG_STM32_OTGFS_NPTXFIFO_SIZE=96
+CONFIG_STM32_OTGFS_PTXFIFO_SIZE=128
+CONFIG_STM32_OTGFS_DESCSIZE=128
+# CONFIG_STM32_OTGFS_SOFINTR is not set
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=5483
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=65536
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_CLOUDCTRL is not set
+# CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set
+# CONFIG_ARCH_BOARD_SHENZHOU is not set
+CONFIG_ARCH_BOARD_STM32_BUTTERFLY2=y
+# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="stm32butterfly2"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+# CONFIG_DISABLE_OS_API is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+CONFIG_CLOCK_MONOTONIC=y
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=1970
+CONFIG_START_MONTH=1
+CONFIG_START_DAY=1
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=8
+CONFIG_WDOG_INTRESERVE=1
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=100
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=31
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+# CONFIG_SCHED_WAITPID is not set
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+CONFIG_SCHED_CPULOAD=y
+# CONFIG_SCHED_CPULOAD_EXTCLK is not set
+CONFIG_SCHED_CPULOAD_TIMECONSTANT=2
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=1024
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+CONFIG_RAMDISK=y
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+CONFIG_SPI_CALLBACK=y
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_ANALOG=y
+CONFIG_ADC=y
+CONFIG_ADC_FIFOSIZE=8
+# CONFIG_ADC_NO_STARTUP_CONV is not set
+# CONFIG_ADC_ADS1242 is not set
+# CONFIG_ADC_ADS125X is not set
+# CONFIG_ADC_PGA11X is not set
+# CONFIG_DAC is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+CONFIG_MMCSD=y
+CONFIG_MMCSD_NSLOTS=1
+# CONFIG_MMCSD_READONLY is not set
+# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set
+# CONFIG_MMCSD_MMCSUPPORT is not set
+CONFIG_MMCSD_HAVECARDDETECT=y
+CONFIG_MMCSD_SPI=y
+CONFIG_MMCSD_SPICLOCK=20000000
+CONFIG_MMCSD_SPIMODE=0
+# CONFIG_ARCH_HAVE_SDIO is not set
+# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART2_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART2 Configuration
+#
+CONFIG_USART2_RXBUFSIZE=256
+CONFIG_USART2_TXBUFSIZE=256
+CONFIG_USART2_BAUD=115200
+CONFIG_USART2_BITS=8
+CONFIG_USART2_PARITY=0
+CONFIG_USART2_2STOP=0
+# CONFIG_USART2_IFLOWCONTROL is not set
+# CONFIG_USART2_OFLOWCONTROL is not set
+# CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+CONFIG_USBHOST=y
+CONFIG_USBHOST_NPREALLOC=4
+CONFIG_USBHOST_HAVE_ASYNCH=y
+# CONFIG_USBHOST_ASYNCH is not set
+# CONFIG_USBHOST_HUB is not set
+# CONFIG_USBHOST_COMPOSITE is not set
+CONFIG_USBHOST_MSC=y
+# CONFIG_USBHOST_CDCACM is not set
+CONFIG_USBHOST_HIDKBD=y
+CONFIG_HIDKBD_POLLUSEC=100000
+CONFIG_HIDKBD_DEFPRIO=50
+CONFIG_HIDKBD_STACKSIZE=1024
+CONFIG_HIDKBD_BUFSIZE=64
+CONFIG_HIDKBD_NPOLLWAITERS=2
+# CONFIG_HIDKBD_RAWSCANCODES is not set
+# CONFIG_HIDKBD_ALLSCANCODES is not set
+# CONFIG_HIDKBD_NODEBOUNCE is not set
+# CONFIG_USBHOST_HIDMOUSE is not set
+# CONFIG_USBHOST_TRACE is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+CONFIG_SYSLOG_TIMESTAMP=y
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+CONFIG_FS_READABLE=y
+CONFIG_FS_WRITABLE=y
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+CONFIG_FS_FAT=y
+CONFIG_FAT_LCNAMES=y
+CONFIG_FAT_LFN=y
+CONFIG_FAT_MAXFNAME=32
+# CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
+# CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_REGISTER=y
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_CPULOAD is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+CONFIG_LIBC_STRERROR=y
+CONFIG_LIBC_STRERROR_SHORT=y
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+CONFIG_EXAMPLES_ADC=y
+CONFIG_EXAMPLES_ADC_DEVPATH="/dev/adc0"
+CONFIG_EXAMPLES_ADC_GROUPSIZE=4
+CONFIG_EXAMPLES_ADC_SWTRIG=y
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+CONFIG_EXAMPLES_HIDKBD=y
+CONFIG_EXAMPLES_HIDKBD_DEFPRIO=50
+CONFIG_EXAMPLES_HIDKBD_STACKSIZE=1024
+CONFIG_EXAMPLES_HIDKBD_DEVNAME="/dev/kbda"
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+CONFIG_EXAMPLES_MOUNT=y
+# CONFIG_EXAMPLES_MOUNT_BLOCKDEVICE is not set
+CONFIG_EXAMPLES_MOUNT_NSECTORS=2048
+CONFIG_EXAMPLES_MOUNT_SECTORSIZE=512
+CONFIG_EXAMPLES_MOUNT_RAMDEVNO=0
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+CONFIG_NSH_MOTD=y
+# CONFIG_NSH_PLATFORM_MOTD is not set
+CONFIG_NSH_MOTD_STRING="stm32butterfly2 welcoms you"
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=80
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+# CONFIG_NSH_DISABLE_DATE is not set
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_IFUPDOWN is not set
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+# CONFIG_NSH_DISABLE_LOSMART is not set
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFATFS is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CMDOPT_DF_H=y
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=1024
+CONFIG_NSH_STRERROR=y
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+# CONFIG_NSH_USBKBD is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+CONFIG_SYSTEM_RAMTEST=y
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_READLINE_MAX_BUILTINS=64
+CONFIG_READLINE_MAX_EXTCMDS=64
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+CONFIG_SYSTEM_VI=y
+CONFIG_SYSTEM_VI_COLS=64
+CONFIG_SYSTEM_VI_ROWS=16
+CONFIG_SYSTEM_VI_DEBUGLEVEL=0
+CONFIG_SYSTEM_VI_STACKSIZE=2048
+CONFIG_SYSTEM_VI_PRIORITY=100
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/freedom-kl25z/minnsh/setenv.sh b/configs/stm32butterfly2/nsh/setenv.sh
similarity index 86%
rename from configs/freedom-kl25z/minnsh/setenv.sh
rename to configs/stm32butterfly2/nsh/setenv.sh
index 2541df62fdff3075633bb56a85ca3806e1decc48..da893d41e6a1702e6a7cc4450d41a284b3d1eddc 100755
--- a/configs/freedom-kl25z/minnsh/setenv.sh
+++ b/configs/stm32butterfly2/nsh/setenv.sh
@@ -1,7 +1,7 @@
 #!/bin/bash
-# configs/freedom-kl25z/minnsh/setenv.sh
+# configs/stm32butterfly2/nsh/setenv.sh
 #
-#   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -56,6 +56,9 @@ fi
 # toolchain under windows.  You will also have to edit this if you install
 # the CodeSourcery toolchain in any other location
 #export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
 
 # These are the Cygwin paths to the locations where I installed the Atollic
 # toolchain under windows.  You will also have to edit this if you install
@@ -67,7 +70,7 @@ fi
 
 # This is the Cygwin path to the location where I build the buildroot
 # toolchain.
-export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
 
 # Add the path to the toolchain to the PATH varialble
 export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
diff --git a/configs/stm32butterfly2/nshnet/Make.defs b/configs/stm32butterfly2/nshnet/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..fdb1fc9867c7bfc0ce765bc7ee651f284055478c
--- /dev/null
+++ b/configs/stm32butterfly2/nshnet/Make.defs
@@ -0,0 +1,117 @@
+############################################################################
+# configs/stm32butterfly2/nsh/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+ifeq ($(CONFIG_STM32_DFU),y)
+  LDSCRIPT = dfu.ld
+else
+  LDSCRIPT = flash.ld
+endif
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/stm32butterfly2/nshnet/defconfig b/configs/stm32butterfly2/nshnet/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..7f09b71361769fe13a2a1488379aa07ef0500735
--- /dev/null
+++ b/configs/stm32butterfly2/nshnet/defconfig
@@ -0,0 +1,1488 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+# CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
+# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+# CONFIG_ARCH_CHIP_STM32F103C8 is not set
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+CONFIG_ARCH_CHIP_STM32F107VC=y
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+# CONFIG_ARCH_CHIP_STM32F407ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+CONFIG_STM32_STM32F10XX=y
+# CONFIG_STM32_VALUELINE is not set
+CONFIG_STM32_CONNECTIVITYLINE=y
+# CONFIG_STM32_PERFORMANCELINE is not set
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+# CONFIG_STM32_MEDIUMDENSITY is not set
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+# CONFIG_STM32_STM32F40XX is not set
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+# CONFIG_STM32_STM32F407 is not set
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+# CONFIG_STM32_HAVE_CCM is not set
+# CONFIG_STM32_HAVE_USBDEV is not set
+CONFIG_STM32_HAVE_OTGFS=y
+# CONFIG_STM32_HAVE_FSMC is not set
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+# CONFIG_STM32_HAVE_USART6 is not set
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+# CONFIG_STM32_HAVE_TIM2 is not set
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+# CONFIG_STM32_HAVE_TIM8 is not set
+# CONFIG_STM32_HAVE_TIM9 is not set
+# CONFIG_STM32_HAVE_TIM10 is not set
+# CONFIG_STM32_HAVE_TIM11 is not set
+# CONFIG_STM32_HAVE_TIM12 is not set
+# CONFIG_STM32_HAVE_TIM13 is not set
+# CONFIG_STM32_HAVE_TIM14 is not set
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+# CONFIG_STM32_HAVE_ADC3 is not set
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+CONFIG_STM32_HAVE_CAN2=y
+CONFIG_STM32_HAVE_DAC1=y
+CONFIG_STM32_HAVE_DAC2=y
+# CONFIG_STM32_HAVE_RNG is not set
+CONFIG_STM32_HAVE_ETHMAC=y
+# CONFIG_STM32_HAVE_I2C2 is not set
+# CONFIG_STM32_HAVE_I2C3 is not set
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+CONFIG_STM32_ADC1=y
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_BKP is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CAN2 is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_DAC1 is not set
+# CONFIG_STM32_DAC2 is not set
+CONFIG_STM32_ETHMAC=y
+# CONFIG_STM32_I2C1 is not set
+CONFIG_STM32_OTGFS=y
+CONFIG_STM32_PWR=y
+CONFIG_STM32_SPI1=y
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SYSCFG=y
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_USART1 is not set
+CONFIG_STM32_USART2=y
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+CONFIG_STM32_ADC=y
+CONFIG_STM32_SPI=y
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+CONFIG_STM32_ETH_REMAP=y
+# CONFIG_STM32_SPI1_REMAP is not set
+CONFIG_STM32_USART2_REMAP=y
+# CONFIG_STM32_JTAG_DISABLE is not set
+CONFIG_STM32_JTAG_FULL_ENABLE=y
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+# CONFIG_STM32_JTAG_SW_ENABLE is not set
+# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32_CCM_PROCFS is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+
+#
+# ADC Configuration
+#
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
+# CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+
+#
+# SPI Configuration
+#
+# CONFIG_STM32_SPI_INTERRUPTS is not set
+# CONFIG_STM32_SPI_DMA is not set
+CONFIG_STM32_HAVE_RTC_COUNTER=y
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# Ethernet MAC configuration
+#
+CONFIG_STM32_PHYADDR=1
+# CONFIG_STM32_PHYINIT is not set
+CONFIG_STM32_MII=y
+# CONFIG_STM32_MII_MCO is not set
+CONFIG_STM32_MII_EXTCLK=y
+# CONFIG_STM32_AUTONEG is not set
+CONFIG_STM32_ETHFD=y
+CONFIG_STM32_ETH100MBPS=y
+# CONFIG_STM32_ETH_PTP is not set
+CONFIG_STM32_ETHMAC_HPWORK=y
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=5483
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=65536
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_CLOUDCTRL is not set
+# CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set
+# CONFIG_ARCH_BOARD_SHENZHOU is not set
+CONFIG_ARCH_BOARD_STM32_BUTTERFLY2=y
+# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="stm32butterfly2"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+CONFIG_BOARDCTL_USBDEVCTRL=y
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+# CONFIG_DISABLE_OS_API is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+CONFIG_CLOCK_MONOTONIC=y
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=1970
+CONFIG_START_MONTH=1
+CONFIG_START_DAY=1
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=8
+CONFIG_WDOG_INTRESERVE=1
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=100
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=31
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+# CONFIG_SCHED_WAITPID is not set
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+CONFIG_SCHED_CPULOAD=y
+# CONFIG_SCHED_CPULOAD_EXTCLK is not set
+CONFIG_SCHED_CPULOAD_TIMECONSTANT=2
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=1024
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+CONFIG_RAMDISK=y
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+CONFIG_SPI_CALLBACK=y
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_ANALOG=y
+CONFIG_ADC=y
+CONFIG_ADC_FIFOSIZE=8
+# CONFIG_ADC_NO_STARTUP_CONV is not set
+# CONFIG_ADC_ADS1242 is not set
+# CONFIG_ADC_ADS125X is not set
+# CONFIG_ADC_PGA11X is not set
+# CONFIG_DAC is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+CONFIG_MMCSD=y
+CONFIG_MMCSD_NSLOTS=1
+# CONFIG_MMCSD_READONLY is not set
+# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set
+# CONFIG_MMCSD_MMCSUPPORT is not set
+CONFIG_MMCSD_HAVECARDDETECT=y
+CONFIG_MMCSD_SPI=y
+CONFIG_MMCSD_SPICLOCK=20000000
+CONFIG_MMCSD_SPIMODE=0
+# CONFIG_ARCH_HAVE_SDIO is not set
+# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+CONFIG_NETDEVICES=y
+
+#
+# General Ethernet MAC Driver Options
+#
+# CONFIG_NETDEV_LOOPBACK is not set
+# CONFIG_NETDEV_TELNET is not set
+# CONFIG_NETDEV_MULTINIC is not set
+# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set
+# CONFIG_NETDEV_LATEINIT is not set
+
+#
+# External Ethernet MAC Device Support
+#
+# CONFIG_NET_DM90x0 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ENCX24J600 is not set
+
+# CONFIG_NET_SLIP is not set
+# CONFIG_NET_FTMAC100 is not set
+
+#
+# External Ethernet PHY Device Support
+#
+# CONFIG_ARCH_PHY_INTERRUPT is not set
+# CONFIG_ETH0_PHY_NONE is not set
+# CONFIG_ETH0_PHY_AM79C874 is not set
+# CONFIG_ETH0_PHY_KS8721 is not set
+# CONFIG_ETH0_PHY_KSZ8041 is not set
+# CONFIG_ETH0_PHY_KSZ8051 is not set
+# CONFIG_ETH0_PHY_KSZ8061 is not set
+# CONFIG_ETH0_PHY_KSZ8081 is not set
+# CONFIG_ETH0_PHY_KSZ90x1 is not set
+CONFIG_ETH0_PHY_DP83848C=y
+# CONFIG_ETH0_PHY_LAN8720 is not set
+# CONFIG_ETH0_PHY_LAN8740 is not set
+# CONFIG_ETH0_PHY_LAN8740A is not set
+# CONFIG_ETH0_PHY_LAN8742A is not set
+# CONFIG_ETH0_PHY_DM9161 is not set
+CONFIG_PIPES=y
+CONFIG_DEV_PIPE_MAXSIZE=1024
+CONFIG_DEV_PIPE_SIZE=1024
+CONFIG_DEV_FIFO_SIZE=1024
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART2_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART2 Configuration
+#
+CONFIG_USART2_RXBUFSIZE=256
+CONFIG_USART2_TXBUFSIZE=256
+CONFIG_USART2_BAUD=115200
+CONFIG_USART2_BITS=8
+CONFIG_USART2_PARITY=0
+CONFIG_USART2_2STOP=0
+# CONFIG_USART2_IFLOWCONTROL is not set
+# CONFIG_USART2_OFLOWCONTROL is not set
+# CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+CONFIG_USBDEV=y
+
+#
+# USB Device Controller Driver Options
+#
+# CONFIG_USBDEV_ISOCHRONOUS is not set
+# CONFIG_USBDEV_DUALSPEED is not set
+# CONFIG_USBDEV_SELFPOWERED is not set
+CONFIG_USBDEV_BUSPOWERED=y
+CONFIG_USBDEV_MAXPOWER=500
+# CONFIG_USBDEV_DMA is not set
+# CONFIG_ARCH_USBDEV_STALLQUEUE is not set
+# CONFIG_USBDEV_TRACE is not set
+
+#
+# USB Device Class Driver Options
+#
+# CONFIG_USBDEV_COMPOSITE is not set
+CONFIG_PL2303=y
+# CONFIG_PL2303_CONSOLE is not set
+CONFIG_PL2303_EPINTIN=1
+CONFIG_PL2303_EPBULKOUT=2
+CONFIG_PL2303_EPBULKIN=3
+CONFIG_PL2303_EP0MAXPACKET=64
+CONFIG_PL2303_NWRREQS=4
+CONFIG_PL2303_NRDREQS=4
+CONFIG_PL2303_BULKIN_REQLEN=96
+CONFIG_PL2303_RXBUFSIZE=257
+CONFIG_PL2303_TXBUFSIZE=193
+CONFIG_PL2303_VENDORID=0x067b
+CONFIG_PL2303_PRODUCTID=0x2303
+CONFIG_PL2303_VENDORSTR="NuttX"
+CONFIG_PL2303_PRODUCTSTR="PL2303 Emulation"
+# CONFIG_CDCACM is not set
+# CONFIG_USBMSC is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+CONFIG_SYSLOG_TIMESTAMP=y
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+CONFIG_ARCH_HAVE_NET=y
+CONFIG_ARCH_HAVE_PHY=y
+CONFIG_NET=y
+# CONFIG_NET_PROMISCUOUS is not set
+
+#
+# Driver buffer configuration
+#
+CONFIG_NET_ETH_MTU=1500
+CONFIG_NET_ETH_TCP_RECVWNDO=536
+CONFIG_NET_GUARDSIZE=2
+
+#
+# Data link support
+#
+# CONFIG_NET_MULTILINK is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
+# CONFIG_NET_TUN is not set
+
+#
+# Network Device Operations
+#
+# CONFIG_NETDEV_PHY_IOCTL is not set
+
+#
+# Internet Protocol Selection
+#
+CONFIG_NET_IPv4=y
+# CONFIG_NET_IPv6 is not set
+
+#
+# Socket Support
+#
+CONFIG_NSOCKET_DESCRIPTORS=8
+CONFIG_NET_NACTIVESOCKETS=16
+# CONFIG_NET_SOCKOPTS is not set
+
+#
+# Raw Socket Support
+#
+# CONFIG_NET_PKT is not set
+
+#
+# Unix Domain Socket Support
+#
+CONFIG_NET_LOCAL=y
+CONFIG_NET_LOCAL_STREAM=y
+CONFIG_NET_LOCAL_DGRAM=y
+
+#
+# TCP/IP Networking
+#
+CONFIG_NET_TCP=y
+# CONFIG_NET_TCPURGDATA is not set
+CONFIG_NET_TCP_CONNS=8
+CONFIG_NET_MAX_LISTENPORTS=20
+CONFIG_NET_TCP_READAHEAD=y
+# CONFIG_NET_TCP_WRITE_BUFFERS is not set
+CONFIG_NET_TCP_RECVDELAY=0
+# CONFIG_NET_TCPBACKLOG is not set
+CONFIG_NET_TCP_SPLIT=y
+CONFIG_NET_TCP_SPLIT_SIZE=40
+# CONFIG_NET_SENDFILE is not set
+
+#
+# UDP Networking
+#
+CONFIG_NET_UDP=y
+# CONFIG_NET_UDP_CHECKSUMS is not set
+CONFIG_NET_UDP_CONNS=8
+# CONFIG_NET_BROADCAST is not set
+# CONFIG_NET_RXAVAIL is not set
+CONFIG_NET_UDP_READAHEAD=y
+
+#
+# ICMP Networking Support
+#
+CONFIG_NET_ICMP=y
+CONFIG_NET_ICMP_PING=y
+
+#
+# IGMPv2 Client Support
+#
+# CONFIG_NET_IGMP is not set
+
+#
+# ARP Configuration
+#
+CONFIG_NET_ARP=y
+CONFIG_NET_ARPTAB_SIZE=16
+CONFIG_NET_ARP_MAXAGE=120
+CONFIG_NET_ARP_IPIN=y
+# CONFIG_NET_ARP_SEND is not set
+
+#
+# Network I/O Buffer Support
+#
+CONFIG_NET_IOB=y
+CONFIG_IOB_NBUFFERS=24
+CONFIG_IOB_BUFSIZE=196
+CONFIG_IOB_NCHAINS=8
+# CONFIG_NET_ARCH_INCR32 is not set
+# CONFIG_NET_ARCH_CHKSUM is not set
+# CONFIG_NET_STATISTICS is not set
+
+#
+# Routing Table Configuration
+#
+# CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME="butterfly2"
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+CONFIG_FS_READABLE=y
+CONFIG_FS_WRITABLE=y
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+CONFIG_FS_FAT=y
+CONFIG_FAT_LCNAMES=y
+CONFIG_FAT_LFN=y
+CONFIG_FAT_MAXFNAME=32
+# CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
+# CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
+# CONFIG_NFS is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_REGISTER=y
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_CPULOAD is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_NET is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+CONFIG_LIBC_STRERROR=y
+CONFIG_LIBC_STRERROR_SHORT=y
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+CONFIG_LIBC_NETDB=y
+# CONFIG_NETDB_HOSTFILE is not set
+# CONFIG_NETDB_DNSCLIENT is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+CONFIG_EXAMPLES_ADC=y
+CONFIG_EXAMPLES_ADC_DEVPATH="/dev/adc0"
+CONFIG_EXAMPLES_ADC_GROUPSIZE=4
+CONFIG_EXAMPLES_ADC_SWTRIG=y
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CPUHOG is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+CONFIG_EXAMPLES_MOUNT=y
+# CONFIG_EXAMPLES_MOUNT_BLOCKDEVICE is not set
+CONFIG_EXAMPLES_MOUNT_NSECTORS=2048
+CONFIG_EXAMPLES_MOUNT_SECTORSIZE=512
+CONFIG_EXAMPLES_MOUNT_RAMDEVNO=0
+# CONFIG_EXAMPLES_NETTEST is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_PIPE is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_UDGRAM is not set
+# CONFIG_EXAMPLES_UDP is not set
+# CONFIG_EXAMPLES_UDPBLASTER is not set
+CONFIG_EXAMPLES_USBSERIAL=y
+CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
+CONFIG_EXAMPLES_USBTERM=y
+# CONFIG_EXAMPLES_USTREAM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_XMLRPC is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_FTPD is not set
+# CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
+# CONFIG_NETUTILS_SMTP is not set
+# CONFIG_NETUTILS_TELNETD is not set
+# CONFIG_NETUTILS_TFTPC is not set
+# CONFIG_NETUTILS_WEBCLIENT is not set
+# CONFIG_NETUTILS_WEBSERVER is not set
+# CONFIG_NETUTILS_XMLRPC is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+CONFIG_NSH_MOTD=y
+# CONFIG_NSH_PLATFORM_MOTD is not set
+CONFIG_NSH_MOTD_STRING="stm32butterfly2 welcoms you"
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=80
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+# CONFIG_NSH_DISABLE_DATE is not set
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_IFUPDOWN is not set
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+# CONFIG_NSH_DISABLE_LOSMART is not set
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFATFS is not set
+# CONFIG_NSH_DISABLE_MKFIFO is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PING is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CMDOPT_DF_H=y
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=1024
+CONFIG_NSH_STRERROR=y
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_USBCONSOLE is not set
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+
+#
+# Networking Configuration
+#
+CONFIG_NSH_NETINIT=y
+# CONFIG_NSH_NETINIT_THREAD is not set
+
+#
+# IP Address Configuration
+#
+
+#
+# IPv4 Addresses
+#
+CONFIG_NSH_IPADDR=0x0a010163
+CONFIG_NSH_DRIPADDR=0x0a010101
+CONFIG_NSH_NETMASK=0xffffff00
+CONFIG_NSH_NOMAC=y
+CONFIG_NSH_SWMAC=y
+CONFIG_NSH_MACADDR=0x00e0deadbeef
+CONFIG_NSH_MAX_ROUNDTRIP=20
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_NETDB is not set
+CONFIG_SYSTEM_RAMTEST=y
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_READLINE_MAX_BUILTINS=64
+CONFIG_READLINE_MAX_EXTCMDS=64
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+CONFIG_SYSTEM_VI=y
+CONFIG_SYSTEM_VI_COLS=64
+CONFIG_SYSTEM_VI_ROWS=16
+CONFIG_SYSTEM_VI_DEBUGLEVEL=0
+CONFIG_SYSTEM_VI_STACKSIZE=2048
+CONFIG_SYSTEM_VI_PRIORITY=100
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/freedom-kl26z/minnsh/setenv.sh b/configs/stm32butterfly2/nshnet/setenv.sh
similarity index 82%
rename from configs/freedom-kl26z/minnsh/setenv.sh
rename to configs/stm32butterfly2/nshnet/setenv.sh
index 755c02b4b6b8c3359c3dc706109574f92a543dcd..da893d41e6a1702e6a7cc4450d41a284b3d1eddc 100755
--- a/configs/freedom-kl26z/minnsh/setenv.sh
+++ b/configs/stm32butterfly2/nshnet/setenv.sh
@@ -1,7 +1,7 @@
 #!/bin/bash
-# configs/freedom-kl26z/minnsh/setenv.sh
+# configs/stm32butterfly2/nsh/setenv.sh
 #
-#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -47,10 +47,17 @@ if [ -z "${PATH_ORIG}" ]; then
   export PATH_ORIG="${PATH}"
 fi
 
+# This is the Cygwin path to the location where I installed the RIDE
+# toolchain under windows.  You will also have to edit this if you install
+# the RIDE toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin"
+
 # This is the Cygwin path to the location where I installed the CodeSourcery
 # toolchain under windows.  You will also have to edit this if you install
 # the CodeSourcery toolchain in any other location
 #export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
 #export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
 
 # These are the Cygwin paths to the locations where I installed the Atollic
@@ -63,7 +70,7 @@ fi
 
 # This is the Cygwin path to the location where I build the buildroot
 # toolchain.
-export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
 
 # Add the path to the toolchain to the PATH varialble
 export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
diff --git a/configs/stm32butterfly2/nshusbdev/Make.defs b/configs/stm32butterfly2/nshusbdev/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..fdb1fc9867c7bfc0ce765bc7ee651f284055478c
--- /dev/null
+++ b/configs/stm32butterfly2/nshusbdev/Make.defs
@@ -0,0 +1,117 @@
+############################################################################
+# configs/stm32butterfly2/nsh/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+ifeq ($(CONFIG_STM32_DFU),y)
+  LDSCRIPT = dfu.ld
+else
+  LDSCRIPT = flash.ld
+endif
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/stm32butterfly2/nshusbdev/defconfig b/configs/stm32butterfly2/nshusbdev/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..f302c878fd59c58a8a06b2b8641460aa0e0b9a07
--- /dev/null
+++ b/configs/stm32butterfly2/nshusbdev/defconfig
@@ -0,0 +1,1275 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+# CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
+# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+# CONFIG_ARCH_CHIP_STM32F103C8 is not set
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+CONFIG_ARCH_CHIP_STM32F107VC=y
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+# CONFIG_ARCH_CHIP_STM32F407ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+CONFIG_STM32_STM32F10XX=y
+# CONFIG_STM32_VALUELINE is not set
+CONFIG_STM32_CONNECTIVITYLINE=y
+# CONFIG_STM32_PERFORMANCELINE is not set
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+# CONFIG_STM32_MEDIUMDENSITY is not set
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+# CONFIG_STM32_STM32F40XX is not set
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+# CONFIG_STM32_STM32F407 is not set
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+# CONFIG_STM32_HAVE_CCM is not set
+# CONFIG_STM32_HAVE_USBDEV is not set
+CONFIG_STM32_HAVE_OTGFS=y
+# CONFIG_STM32_HAVE_FSMC is not set
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+# CONFIG_STM32_HAVE_USART6 is not set
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+# CONFIG_STM32_HAVE_TIM2 is not set
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+# CONFIG_STM32_HAVE_TIM8 is not set
+# CONFIG_STM32_HAVE_TIM9 is not set
+# CONFIG_STM32_HAVE_TIM10 is not set
+# CONFIG_STM32_HAVE_TIM11 is not set
+# CONFIG_STM32_HAVE_TIM12 is not set
+# CONFIG_STM32_HAVE_TIM13 is not set
+# CONFIG_STM32_HAVE_TIM14 is not set
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+# CONFIG_STM32_HAVE_ADC3 is not set
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+CONFIG_STM32_HAVE_CAN2=y
+CONFIG_STM32_HAVE_DAC1=y
+CONFIG_STM32_HAVE_DAC2=y
+# CONFIG_STM32_HAVE_RNG is not set
+CONFIG_STM32_HAVE_ETHMAC=y
+# CONFIG_STM32_HAVE_I2C2 is not set
+# CONFIG_STM32_HAVE_I2C3 is not set
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+CONFIG_STM32_ADC1=y
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_BKP is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CAN2 is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_DAC1 is not set
+# CONFIG_STM32_DAC2 is not set
+# CONFIG_STM32_ETHMAC is not set
+# CONFIG_STM32_I2C1 is not set
+CONFIG_STM32_OTGFS=y
+CONFIG_STM32_PWR=y
+CONFIG_STM32_SPI1=y
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SYSCFG=y
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_USART1 is not set
+CONFIG_STM32_USART2=y
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+CONFIG_STM32_ADC=y
+CONFIG_STM32_SPI=y
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_SPI1_REMAP is not set
+CONFIG_STM32_USART2_REMAP=y
+# CONFIG_STM32_JTAG_DISABLE is not set
+CONFIG_STM32_JTAG_FULL_ENABLE=y
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+# CONFIG_STM32_JTAG_SW_ENABLE is not set
+# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32_CCM_PROCFS is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+
+#
+# ADC Configuration
+#
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
+# CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+
+#
+# SPI Configuration
+#
+# CONFIG_STM32_SPI_INTERRUPTS is not set
+# CONFIG_STM32_SPI_DMA is not set
+CONFIG_STM32_HAVE_RTC_COUNTER=y
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=5483
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=65536
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_CLOUDCTRL is not set
+# CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set
+# CONFIG_ARCH_BOARD_SHENZHOU is not set
+CONFIG_ARCH_BOARD_STM32_BUTTERFLY2=y
+# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="stm32butterfly2"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+CONFIG_BOARDCTL_USBDEVCTRL=y
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+# CONFIG_DISABLE_OS_API is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+CONFIG_CLOCK_MONOTONIC=y
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=1970
+CONFIG_START_MONTH=1
+CONFIG_START_DAY=1
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=8
+CONFIG_WDOG_INTRESERVE=1
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=100
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=31
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+# CONFIG_SCHED_WAITPID is not set
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+CONFIG_SCHED_CPULOAD=y
+# CONFIG_SCHED_CPULOAD_EXTCLK is not set
+CONFIG_SCHED_CPULOAD_TIMECONSTANT=2
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=1024
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+CONFIG_RAMDISK=y
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+CONFIG_SPI_CALLBACK=y
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_ANALOG=y
+CONFIG_ADC=y
+CONFIG_ADC_FIFOSIZE=8
+# CONFIG_ADC_NO_STARTUP_CONV is not set
+# CONFIG_ADC_ADS1242 is not set
+# CONFIG_ADC_ADS125X is not set
+# CONFIG_ADC_PGA11X is not set
+# CONFIG_DAC is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+CONFIG_MMCSD=y
+CONFIG_MMCSD_NSLOTS=1
+# CONFIG_MMCSD_READONLY is not set
+# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set
+# CONFIG_MMCSD_MMCSUPPORT is not set
+CONFIG_MMCSD_HAVECARDDETECT=y
+CONFIG_MMCSD_SPI=y
+CONFIG_MMCSD_SPICLOCK=20000000
+CONFIG_MMCSD_SPIMODE=0
+# CONFIG_ARCH_HAVE_SDIO is not set
+# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART2_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART2 Configuration
+#
+CONFIG_USART2_RXBUFSIZE=256
+CONFIG_USART2_TXBUFSIZE=256
+CONFIG_USART2_BAUD=115200
+CONFIG_USART2_BITS=8
+CONFIG_USART2_PARITY=0
+CONFIG_USART2_2STOP=0
+# CONFIG_USART2_IFLOWCONTROL is not set
+# CONFIG_USART2_OFLOWCONTROL is not set
+# CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+CONFIG_USBDEV=y
+
+#
+# USB Device Controller Driver Options
+#
+# CONFIG_USBDEV_ISOCHRONOUS is not set
+# CONFIG_USBDEV_DUALSPEED is not set
+# CONFIG_USBDEV_SELFPOWERED is not set
+CONFIG_USBDEV_BUSPOWERED=y
+CONFIG_USBDEV_MAXPOWER=500
+# CONFIG_USBDEV_DMA is not set
+# CONFIG_ARCH_USBDEV_STALLQUEUE is not set
+# CONFIG_USBDEV_TRACE is not set
+
+#
+# USB Device Class Driver Options
+#
+# CONFIG_USBDEV_COMPOSITE is not set
+CONFIG_PL2303=y
+# CONFIG_PL2303_CONSOLE is not set
+CONFIG_PL2303_EPINTIN=1
+CONFIG_PL2303_EPBULKOUT=2
+CONFIG_PL2303_EPBULKIN=3
+CONFIG_PL2303_EP0MAXPACKET=64
+CONFIG_PL2303_NWRREQS=4
+CONFIG_PL2303_NRDREQS=4
+CONFIG_PL2303_BULKIN_REQLEN=96
+CONFIG_PL2303_RXBUFSIZE=257
+CONFIG_PL2303_TXBUFSIZE=193
+CONFIG_PL2303_VENDORID=0x067b
+CONFIG_PL2303_PRODUCTID=0x2303
+CONFIG_PL2303_VENDORSTR="NuttX"
+CONFIG_PL2303_PRODUCTSTR="PL2303 Emulation"
+# CONFIG_CDCACM is not set
+# CONFIG_USBMSC is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+CONFIG_SYSLOG_TIMESTAMP=y
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+CONFIG_FS_READABLE=y
+CONFIG_FS_WRITABLE=y
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+CONFIG_FS_FAT=y
+CONFIG_FAT_LCNAMES=y
+CONFIG_FAT_LFN=y
+CONFIG_FAT_MAXFNAME=32
+# CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
+# CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_REGISTER=y
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_CPULOAD is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+CONFIG_LIBC_STRERROR=y
+CONFIG_LIBC_STRERROR_SHORT=y
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+CONFIG_EXAMPLES_ADC=y
+CONFIG_EXAMPLES_ADC_DEVPATH="/dev/adc0"
+CONFIG_EXAMPLES_ADC_GROUPSIZE=4
+CONFIG_EXAMPLES_ADC_SWTRIG=y
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+CONFIG_EXAMPLES_MOUNT=y
+# CONFIG_EXAMPLES_MOUNT_BLOCKDEVICE is not set
+CONFIG_EXAMPLES_MOUNT_NSECTORS=2048
+CONFIG_EXAMPLES_MOUNT_SECTORSIZE=512
+CONFIG_EXAMPLES_MOUNT_RAMDEVNO=0
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+CONFIG_EXAMPLES_USBSERIAL=y
+CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
+CONFIG_EXAMPLES_USBTERM=y
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+CONFIG_NSH_MOTD=y
+# CONFIG_NSH_PLATFORM_MOTD is not set
+CONFIG_NSH_MOTD_STRING="stm32butterfly2 welcoms you"
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=80
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+# CONFIG_NSH_DISABLE_DATE is not set
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_IFUPDOWN is not set
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+# CONFIG_NSH_DISABLE_LOSMART is not set
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFATFS is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CMDOPT_DF_H=y
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=1024
+CONFIG_NSH_STRERROR=y
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_USBCONSOLE is not set
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+CONFIG_SYSTEM_RAMTEST=y
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_READLINE_MAX_BUILTINS=64
+CONFIG_READLINE_MAX_EXTCMDS=64
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+CONFIG_SYSTEM_VI=y
+CONFIG_SYSTEM_VI_COLS=64
+CONFIG_SYSTEM_VI_ROWS=16
+CONFIG_SYSTEM_VI_DEBUGLEVEL=0
+CONFIG_SYSTEM_VI_STACKSIZE=2048
+CONFIG_SYSTEM_VI_PRIORITY=100
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32butterfly2/nshusbdev/setenv.sh b/configs/stm32butterfly2/nshusbdev/setenv.sh
new file mode 100755
index 0000000000000000000000000000000000000000..da893d41e6a1702e6a7cc4450d41a284b3d1eddc
--- /dev/null
+++ b/configs/stm32butterfly2/nshusbdev/setenv.sh
@@ -0,0 +1,78 @@
+#!/bin/bash
+# configs/stm32butterfly2/nsh/setenv.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the RIDE
+# toolchain under windows.  You will also have to edit this if you install
+# the RIDE toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# These are the Cygwin paths to the locations where I installed the Atollic
+# toolchain under windows.  You will also have to edit this if you install
+# the Atollic toolchain in any other location.  /usr/bin is added before
+# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
+# at those locations as well.
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/stm32butterfly2/nshusbhost/Make.defs b/configs/stm32butterfly2/nshusbhost/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..fdb1fc9867c7bfc0ce765bc7ee651f284055478c
--- /dev/null
+++ b/configs/stm32butterfly2/nshusbhost/Make.defs
@@ -0,0 +1,117 @@
+############################################################################
+# configs/stm32butterfly2/nsh/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+ifeq ($(CONFIG_STM32_DFU),y)
+  LDSCRIPT = dfu.ld
+else
+  LDSCRIPT = flash.ld
+endif
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/stm32butterfly2/nshusbhost/defconfig b/configs/stm32butterfly2/nshusbhost/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..0bcc423bd769f117b76fe3cca0384cabe9435680
--- /dev/null
+++ b/configs/stm32butterfly2/nshusbhost/defconfig
@@ -0,0 +1,1268 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+# CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
+# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+# CONFIG_USBHOST_BULK_DISABLE is not set
+# CONFIG_USBHOST_INT_DISABLE is not set
+# CONFIG_USBHOST_ISOC_DISABLE is not set
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+# CONFIG_ARCH_CHIP_STM32F103C8 is not set
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+CONFIG_ARCH_CHIP_STM32F107VC=y
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+# CONFIG_ARCH_CHIP_STM32F407ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+CONFIG_STM32_STM32F10XX=y
+# CONFIG_STM32_VALUELINE is not set
+CONFIG_STM32_CONNECTIVITYLINE=y
+# CONFIG_STM32_PERFORMANCELINE is not set
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+# CONFIG_STM32_MEDIUMDENSITY is not set
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+# CONFIG_STM32_STM32F40XX is not set
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+# CONFIG_STM32_STM32F407 is not set
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+# CONFIG_STM32_HAVE_CCM is not set
+# CONFIG_STM32_HAVE_USBDEV is not set
+CONFIG_STM32_HAVE_OTGFS=y
+# CONFIG_STM32_HAVE_FSMC is not set
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+# CONFIG_STM32_HAVE_USART6 is not set
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+# CONFIG_STM32_HAVE_TIM2 is not set
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+# CONFIG_STM32_HAVE_TIM8 is not set
+# CONFIG_STM32_HAVE_TIM9 is not set
+# CONFIG_STM32_HAVE_TIM10 is not set
+# CONFIG_STM32_HAVE_TIM11 is not set
+# CONFIG_STM32_HAVE_TIM12 is not set
+# CONFIG_STM32_HAVE_TIM13 is not set
+# CONFIG_STM32_HAVE_TIM14 is not set
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+# CONFIG_STM32_HAVE_ADC3 is not set
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+CONFIG_STM32_HAVE_CAN2=y
+CONFIG_STM32_HAVE_DAC1=y
+CONFIG_STM32_HAVE_DAC2=y
+# CONFIG_STM32_HAVE_RNG is not set
+CONFIG_STM32_HAVE_ETHMAC=y
+# CONFIG_STM32_HAVE_I2C2 is not set
+# CONFIG_STM32_HAVE_I2C3 is not set
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+CONFIG_STM32_ADC1=y
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_BKP is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CAN2 is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_DAC1 is not set
+# CONFIG_STM32_DAC2 is not set
+# CONFIG_STM32_ETHMAC is not set
+# CONFIG_STM32_I2C1 is not set
+CONFIG_STM32_OTGFS=y
+CONFIG_STM32_PWR=y
+CONFIG_STM32_SPI1=y
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SYSCFG=y
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_USART1 is not set
+CONFIG_STM32_USART2=y
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+CONFIG_STM32_ADC=y
+CONFIG_STM32_SPI=y
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_SPI1_REMAP is not set
+CONFIG_STM32_USART2_REMAP=y
+# CONFIG_STM32_JTAG_DISABLE is not set
+CONFIG_STM32_JTAG_FULL_ENABLE=y
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+# CONFIG_STM32_JTAG_SW_ENABLE is not set
+# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32_CCM_PROCFS is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+
+#
+# ADC Configuration
+#
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
+# CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+
+#
+# SPI Configuration
+#
+# CONFIG_STM32_SPI_INTERRUPTS is not set
+# CONFIG_STM32_SPI_DMA is not set
+CONFIG_STM32_HAVE_RTC_COUNTER=y
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+CONFIG_STM32_OTGFS_RXFIFO_SIZE=128
+CONFIG_STM32_OTGFS_NPTXFIFO_SIZE=96
+CONFIG_STM32_OTGFS_PTXFIFO_SIZE=128
+CONFIG_STM32_OTGFS_DESCSIZE=128
+# CONFIG_STM32_OTGFS_SOFINTR is not set
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=5483
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=65536
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_CLOUDCTRL is not set
+# CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set
+# CONFIG_ARCH_BOARD_SHENZHOU is not set
+CONFIG_ARCH_BOARD_STM32_BUTTERFLY2=y
+# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="stm32butterfly2"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+# CONFIG_DISABLE_OS_API is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+CONFIG_CLOCK_MONOTONIC=y
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=1970
+CONFIG_START_MONTH=1
+CONFIG_START_DAY=1
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=8
+CONFIG_WDOG_INTRESERVE=1
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=100
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=31
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+# CONFIG_SCHED_WAITPID is not set
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+CONFIG_SCHED_CPULOAD=y
+# CONFIG_SCHED_CPULOAD_EXTCLK is not set
+CONFIG_SCHED_CPULOAD_TIMECONSTANT=2
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=1024
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+CONFIG_RAMDISK=y
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+CONFIG_SPI_CALLBACK=y
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_ANALOG=y
+CONFIG_ADC=y
+CONFIG_ADC_FIFOSIZE=8
+# CONFIG_ADC_NO_STARTUP_CONV is not set
+# CONFIG_ADC_ADS1242 is not set
+# CONFIG_ADC_ADS125X is not set
+# CONFIG_ADC_PGA11X is not set
+# CONFIG_DAC is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+CONFIG_MMCSD=y
+CONFIG_MMCSD_NSLOTS=1
+# CONFIG_MMCSD_READONLY is not set
+# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set
+# CONFIG_MMCSD_MMCSUPPORT is not set
+CONFIG_MMCSD_HAVECARDDETECT=y
+CONFIG_MMCSD_SPI=y
+CONFIG_MMCSD_SPICLOCK=20000000
+CONFIG_MMCSD_SPIMODE=0
+# CONFIG_ARCH_HAVE_SDIO is not set
+# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART2_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART2 Configuration
+#
+CONFIG_USART2_RXBUFSIZE=256
+CONFIG_USART2_TXBUFSIZE=256
+CONFIG_USART2_BAUD=115200
+CONFIG_USART2_BITS=8
+CONFIG_USART2_PARITY=0
+CONFIG_USART2_2STOP=0
+# CONFIG_USART2_IFLOWCONTROL is not set
+# CONFIG_USART2_OFLOWCONTROL is not set
+# CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+CONFIG_USBHOST=y
+CONFIG_USBHOST_NPREALLOC=4
+CONFIG_USBHOST_HAVE_ASYNCH=y
+# CONFIG_USBHOST_ASYNCH is not set
+# CONFIG_USBHOST_HUB is not set
+# CONFIG_USBHOST_COMPOSITE is not set
+CONFIG_USBHOST_MSC=y
+# CONFIG_USBHOST_CDCACM is not set
+CONFIG_USBHOST_HIDKBD=y
+CONFIG_HIDKBD_POLLUSEC=100000
+CONFIG_HIDKBD_DEFPRIO=50
+CONFIG_HIDKBD_STACKSIZE=1024
+CONFIG_HIDKBD_BUFSIZE=64
+CONFIG_HIDKBD_NPOLLWAITERS=2
+# CONFIG_HIDKBD_RAWSCANCODES is not set
+# CONFIG_HIDKBD_ALLSCANCODES is not set
+# CONFIG_HIDKBD_NODEBOUNCE is not set
+# CONFIG_USBHOST_HIDMOUSE is not set
+# CONFIG_USBHOST_TRACE is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+CONFIG_SYSLOG_TIMESTAMP=y
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+CONFIG_FS_READABLE=y
+CONFIG_FS_WRITABLE=y
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+CONFIG_FS_FAT=y
+CONFIG_FAT_LCNAMES=y
+CONFIG_FAT_LFN=y
+CONFIG_FAT_MAXFNAME=32
+# CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
+# CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_REGISTER=y
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_CPULOAD is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+CONFIG_LIBC_STRERROR=y
+CONFIG_LIBC_STRERROR_SHORT=y
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+CONFIG_EXAMPLES_ADC=y
+CONFIG_EXAMPLES_ADC_DEVPATH="/dev/adc0"
+CONFIG_EXAMPLES_ADC_GROUPSIZE=4
+CONFIG_EXAMPLES_ADC_SWTRIG=y
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+CONFIG_EXAMPLES_HIDKBD=y
+CONFIG_EXAMPLES_HIDKBD_DEFPRIO=50
+CONFIG_EXAMPLES_HIDKBD_STACKSIZE=1024
+CONFIG_EXAMPLES_HIDKBD_DEVNAME="/dev/kbda"
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+CONFIG_EXAMPLES_MOUNT=y
+# CONFIG_EXAMPLES_MOUNT_BLOCKDEVICE is not set
+CONFIG_EXAMPLES_MOUNT_NSECTORS=2048
+CONFIG_EXAMPLES_MOUNT_SECTORSIZE=512
+CONFIG_EXAMPLES_MOUNT_RAMDEVNO=0
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+CONFIG_NSH_MOTD=y
+# CONFIG_NSH_PLATFORM_MOTD is not set
+CONFIG_NSH_MOTD_STRING="stm32butterfly2 welcoms you"
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=80
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+# CONFIG_NSH_DISABLE_DATE is not set
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_IFUPDOWN is not set
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+# CONFIG_NSH_DISABLE_LOSMART is not set
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFATFS is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CMDOPT_DF_H=y
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=1024
+CONFIG_NSH_STRERROR=y
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+# CONFIG_NSH_USBKBD is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+CONFIG_SYSTEM_RAMTEST=y
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_READLINE_MAX_BUILTINS=64
+CONFIG_READLINE_MAX_EXTCMDS=64
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+CONFIG_SYSTEM_VI=y
+CONFIG_SYSTEM_VI_COLS=64
+CONFIG_SYSTEM_VI_ROWS=16
+CONFIG_SYSTEM_VI_DEBUGLEVEL=0
+CONFIG_SYSTEM_VI_STACKSIZE=2048
+CONFIG_SYSTEM_VI_PRIORITY=100
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32butterfly2/nshusbhost/setenv.sh b/configs/stm32butterfly2/nshusbhost/setenv.sh
new file mode 100755
index 0000000000000000000000000000000000000000..da893d41e6a1702e6a7cc4450d41a284b3d1eddc
--- /dev/null
+++ b/configs/stm32butterfly2/nshusbhost/setenv.sh
@@ -0,0 +1,78 @@
+#!/bin/bash
+# configs/stm32butterfly2/nsh/setenv.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the RIDE
+# toolchain under windows.  You will also have to edit this if you install
+# the RIDE toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# These are the Cygwin paths to the locations where I installed the Atollic
+# toolchain under windows.  You will also have to edit this if you install
+# the Atollic toolchain in any other location.  /usr/bin is added before
+# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
+# at those locations as well.
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/stm32butterfly2/scripts/dfu.ld b/configs/stm32butterfly2/scripts/dfu.ld
new file mode 100644
index 0000000000000000000000000000000000000000..b4a2d8331834341d7e17e9b211a41f6b859714be
--- /dev/null
+++ b/configs/stm32butterfly2/scripts/dfu.ld
@@ -0,0 +1,116 @@
+/****************************************************************************
+ * configs/stm32butterfly2/scripts/dfu.ld
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+MEMORY
+{
+    flash (rx) : ORIGIN = 0x08003000, LENGTH = 208K
+    sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
+}
+
+OUTPUT_ARCH(arm)
+EXTERN(_vectors)
+ENTRY(_stext)
+SECTIONS
+{
+	.text : {
+		_stext = ABSOLUTE(.);
+		*(.vectors)
+		*(.text .text.*)
+		*(.fixup)
+		*(.gnu.warning)
+		*(.rodata .rodata.*)
+		*(.gnu.linkonce.t.*)
+		*(.glue_7)
+		*(.glue_7t)
+		*(.got)
+		*(.gcc_except_table)
+		*(.gnu.linkonce.r.*)
+		_etext = ABSOLUTE(.);
+	} > flash
+
+	.init_section : {
+		_sinit = ABSOLUTE(.);
+		*(.init_array .init_array.*)
+		_einit = ABSOLUTE(.);
+	} > flash
+
+	.ARM.extab : {
+		*(.ARM.extab*)
+	} > flash
+
+	__exidx_start = ABSOLUTE(.);
+	.ARM.exidx : {
+		*(.ARM.exidx*)
+	} > flash
+	__exidx_end = ABSOLUTE(.);
+
+	_eronly = ABSOLUTE(.);
+
+	/* The RAM vector table (if present) should lie at the beginning of SRAM */
+
+	.ram_vectors : {
+		*(.ram_vectors)
+	} > sram
+
+	.data : {
+		_sdata = ABSOLUTE(.);
+		*(.data .data.*)
+		*(.gnu.linkonce.d.*)
+		CONSTRUCTORS
+		_edata = ABSOLUTE(.);
+	} > sram AT > flash
+
+	.bss : {
+		_sbss = ABSOLUTE(.);
+		*(.bss .bss.*)
+		*(.gnu.linkonce.b.*)
+		*(COMMON)
+		_ebss = ABSOLUTE(.);
+	} > sram
+
+	/* Stabs debugging sections. */
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_info 0 : { *(.debug_info) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/stm32butterfly2/scripts/flash.ld b/configs/stm32butterfly2/scripts/flash.ld
new file mode 100644
index 0000000000000000000000000000000000000000..1050b3501f9a8d83251ad71da87bfea2ae845b07
--- /dev/null
+++ b/configs/stm32butterfly2/scripts/flash.ld
@@ -0,0 +1,116 @@
+/****************************************************************************
+ * configs/stm32butterfly2/scripts/flash.ld
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+MEMORY
+{
+	flash (rx) : ORIGIN = 0x08000000, LENGTH = 256K
+	sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
+}
+
+OUTPUT_ARCH(arm)
+EXTERN(_vectors)
+ENTRY(_stext)
+SECTIONS
+{
+	.text : {
+		_stext = ABSOLUTE(.);
+		*(.vectors)
+		*(.text .text.*)
+		*(.fixup)
+		*(.gnu.warning)
+		*(.rodata .rodata.*)
+		*(.gnu.linkonce.t.*)
+		*(.glue_7)
+		*(.glue_7t)
+		*(.got)
+		*(.gcc_except_table)
+		*(.gnu.linkonce.r.*)
+		_etext = ABSOLUTE(.);
+	} > flash
+
+	.init_section : {
+		_sinit = ABSOLUTE(.);
+		*(.init_array .init_array.*)
+		_einit = ABSOLUTE(.);
+	} > flash
+
+	.ARM.extab : {
+		*(.ARM.extab*)
+	} > flash
+
+	__exidx_start = ABSOLUTE(.);
+	.ARM.exidx : {
+		*(.ARM.exidx*)
+	} > flash
+	__exidx_end = ABSOLUTE(.);
+
+	_eronly = ABSOLUTE(.);
+
+	/* The RAM vector table (if present) should lie at the beginning of SRAM */
+
+	.ram_vectors : {
+		*(.ram_vectors)
+	} > sram
+
+	.data : {
+		_sdata = ABSOLUTE(.);
+		*(.data .data.*)
+		*(.gnu.linkonce.d.*)
+		CONSTRUCTORS
+		_edata = ABSOLUTE(.);
+	} > sram AT > flash
+
+	.bss : {
+		_sbss = ABSOLUTE(.);
+		*(.bss .bss.*)
+		*(.gnu.linkonce.b.*)
+		*(COMMON)
+		_ebss = ABSOLUTE(.);
+	} > sram
+
+	/* Stabs debugging sections. */
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_info 0 : { *(.debug_info) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/stm32butterfly2/src/Makefile b/configs/stm32butterfly2/src/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..480c84a8a47029cbe4589f2c51a3b7350acb6a36
--- /dev/null
+++ b/configs/stm32butterfly2/src/Makefile
@@ -0,0 +1,68 @@
+############################################################################
+# configs/stm32butterfly2/src/Makefile
+#
+#   Copyright (C) 2016 Michał Łyszczek. All rights reserved.
+#   Author: Michał Łyszczek 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+ASRCS =
+CSRCS = stm32_boot.c stm32_leds.c
+
+ifeq ($(CONFIG_STM32_ADC),y)
+CSRCS += stm32_adc.c
+endif
+
+ifeq ($(CONFIG_STM32_SPI1),y)
+CSRCS += stm32_spi.c
+endif
+
+ifeq ($(CONFIG_STM32_OTGFS),y)
+CSRCS += stm32_usb.c
+endif
+
+ifeq ($(CONFIG_USBHOST),y)
+CSRCS += stm32_usbhost.c
+endif
+
+ifeq ($(CONFIG_USBDEV),y)
+CSRCS += stm32_usbdev.c
+endif
+
+ifeq ($(CONFIG_MMCSD),y)
+CSRCS += stm32_mmcsd.c
+endif
+
+ifeq ($(CONFIG_ARCH_BUTTONS),y)
+CSRCS += stm32_buttons.c
+endif
+
+include $(TOPDIR)/configs/Board.mk
diff --git a/configs/stm32butterfly2/src/stm32_adc.c b/configs/stm32butterfly2/src/stm32_adc.c
new file mode 100644
index 0000000000000000000000000000000000000000..eaac1722e715d01c73b26e273705db5935c59014
--- /dev/null
+++ b/configs/stm32butterfly2/src/stm32_adc.c
@@ -0,0 +1,86 @@
+/*****************************************************************************
+ * configs/stm32butterfly2/src/stm32_adc.c
+ *
+ *   Copyright (C) 2016 Michał Łyszczek. All rights reserved.
+ *   Author: Michał Łyszczek 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+#include "stm32_adc.h"
+
+/*****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+int stm32_adc_setup(void)
+{
+  static bool initialized = false;
+  uint8_t channel[1] = {10};
+  struct adc_dev_s *adc;
+  int rv;
+
+  if (initialized)
+    {
+      return OK;
+    }
+
+  ainfo("INFO: Initializing ADC12_IN10\n");
+  stm32_configgpio(GPIO_ADC12_IN10);
+  if ((adc = stm32_adcinitialize(1, channel, 1)) == NULL)
+    {
+      aerr("ERROR: Failed to get adc interface\n");
+      return -ENODEV;
+    }
+
+  if ((rv = adc_register("/dev/adc0", adc)) < 0)
+    {
+      aerr("ERROR: adc_register failed: %d\n", rv);
+      return rv;
+    }
+
+  initialized = true;
+  ainfo("INFO: ADC12_IN10 initialized succesfully\n");
+  return OK;
+}
diff --git a/configs/stm32butterfly2/src/stm32_boot.c b/configs/stm32butterfly2/src/stm32_boot.c
new file mode 100644
index 0000000000000000000000000000000000000000..f42e7a7fd7f788d120d89e38cc0133e965ad8e35
--- /dev/null
+++ b/configs/stm32butterfly2/src/stm32_boot.c
@@ -0,0 +1,107 @@
+/*****************************************************************************
+ * configs/stm32butterfly2/src/boot.c
+ *
+ *   Copyright (C) 2016 Michał Łyszczek. All rights reserved.
+ *   Author: Michał Łyszczek 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+#include "stm32_butterfly2.h"
+
+/*****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ *   Initializes low level pins for the drivers.
+ ****************************************************************************/
+
+void stm32_boardinitialize(void)
+{
+  stm32_led_initialize();
+  stm32_spidev_initialize();
+  stm32_usb_initialize();
+}
+
+/*****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ *   Initializes upper half drivers with board specific settings
+ *
+ * Returned value:
+ *   0 on sucess or errno value of failed init function.
+ ****************************************************************************/
+
+int board_app_initialize(uintptr_t arg)
+{
+  int ret = 0;
+
+#ifdef CONFIG_MMCSD
+  ret = stm32_mmcsd_initialize(CONFIG_NSH_MMCSDMINOR);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "Failed to initialize SD slot %d: %d\n", ret);
+      return ret;
+    }
+#endif
+
+#ifdef CONFIG_USBHOST
+  ret = stm32_usbhost_initialize();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to initialize USB host: %d\n", ret);
+      return ret;
+    }
+#endif
+
+#ifdef CONFIG_ADC
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = stm32_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_adc_setup failed: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
+  return ret;
+}
diff --git a/configs/stm32butterfly2/src/stm32_butterfly2.h b/configs/stm32butterfly2/src/stm32_butterfly2.h
new file mode 100644
index 0000000000000000000000000000000000000000..b309939d0d52dccd46bd9ff136bce9dd7117792f
--- /dev/null
+++ b/configs/stm32butterfly2/src/stm32_butterfly2.h
@@ -0,0 +1,145 @@
+/*****************************************************************************
+ * configs/stm32butterfly2/src/stm32_butterfly2.h
+ *
+ *   Copyright (C) 2016 Michał Łyszczek. All rights reserved.
+ *   Author: Michał Łyszczek 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ ****************************************************************************/
+
+#ifndef __CONFIGS_STM32_BUTTERFLY2_SRC_STM32_BUTTERFLY2_H
+#define __CONFIGS_STM32_BUTTERFLY2_SRC_STM32_BUTTERFLY2_H 1
+
+/*****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include "stm32_gpio.h"
+
+/*****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* SD Card pins */
+
+#define GPIO_SD_CS      (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz |\
+                         GPIO_OUTPUT_SET | GPIO_PORTA | GPIO_PIN4)
+#define GPIO_SD_CD      (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_EXTI |\
+                         GPIO_PORTB | GPIO_PIN9)
+
+/* USB pins */
+
+#define GPIO_OTGFS_PWRON (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz |\
+                          GPIO_OUTPUT_SET | GPIO_PORTD | GPIO_PIN15)
+
+/*****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Name: stm32_led_initialize
+ *
+ * Description:
+ *      Initializes low level gpio pins for board LEDS
+ ****************************************************************************/
+
+void stm32_led_initialize(void);
+
+/*****************************************************************************
+ * Name: stm32_spidev_initialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins.
+ *
+ * Note:
+ *   Here only CS pins are configured as SPI pins are configured by driver
+ *   itself.
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32_SPI1
+void stm32_spidev_initialize(void);
+#else
+static inline void stm32_spidev_initialize(void) {}
+#endif
+
+/*****************************************************************************
+ * Name: stm32_mmcsd_initialize
+ *
+ * Description:
+ *   Initializes SPI-based SD card
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_MMCSD
+int stm32_mmcsd_initialize(int minor);
+#else
+static inline int stm32_mmcsd_initialize(int minor) { (void)minor; return 0; }
+#endif
+
+/*****************************************************************************
+ * Name: stm32_usb_initialize
+ *
+ * Description:
+ *   Initializes USB pins
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32_OTGFS
+void stm32_usb_initialize(void);
+#else
+static inline void stm32_usb_initialize(void) {}
+#endif
+
+/*****************************************************************************
+ * Name: stm32_usbhost_initialize
+ *
+ * Description:
+ *   Initializes USB host functionality.
+ ****************************************************************************/
+
+#ifdef CONFIG_USBHOST
+int stm32_usbhost_initialize(void);
+#else
+static inline int stm32_usbhost_initialize(void) { return 0; }
+#endif
+
+/************************************************************************************
+ * Name: stm32_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32_ADC
+int stm32_adc_setup(void);
+#else
+static inline int stm32_adc_setup(void) { return 0; }
+#endif
+
+#endif /* __CONFIGS_STM32_BUTTERFLY2_SRC_STM32_BUTTERFLY2_H */
+
diff --git a/configs/stm32butterfly2/src/stm32_buttons.c b/configs/stm32butterfly2/src/stm32_buttons.c
new file mode 100644
index 0000000000000000000000000000000000000000..85e7a0751c4f15bd1c0458ec1971a7a592e7493a
--- /dev/null
+++ b/configs/stm32butterfly2/src/stm32_buttons.c
@@ -0,0 +1,109 @@
+/*****************************************************************************
+ * configs/stm32butterfly2/src/stm32_buttons.c
+ *
+ *   Copyright (C) 2016 Michał Łyszczek. All rights reserved.
+ *   Author: Michał Łyszczek 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Public Includes
+ ****************************************************************************/
+
+#include "stm32_gpio.h"
+
+/*****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define NUM_BUTTONS 5
+
+#define GPIO_JOY_O (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT |\
+                    GPIO_PORTC | GPIO_PIN7)
+#define GPIO_JOY_U (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT |\
+                    GPIO_PORTC | GPIO_PIN8)
+#define GPIO_JOY_D (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT |\
+                    GPIO_PORTC | GPIO_PIN9)
+#define GPIO_JOY_R (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT |\
+                    GPIO_PORTC | GPIO_PIN10)
+#define GPIO_JOY_L (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT |\
+                    GPIO_PORTC | GPIO_PIN11)
+
+/*****************************************************************************
+ * Private Declarations
+ ****************************************************************************/
+
+static const uint32_t buttons[NUM_BUTTONS] =
+{
+  GPIO_JOY_O, GPIO_JOY_U, GPIO_JOY_D, GPIO_JOY_R, GPIO_JOY_L
+};
+
+/*****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Name: board_button_initialize
+ *
+ * Description:
+ *      Initializes gpio pins for joystick buttons
+ ****************************************************************************/
+
+void board_button_initialize(void)
+{
+  int i;
+
+  for (i = 0; i != NUM_BUTTONS; ++i)
+    {
+      stm32_configgpio(buttons[i]);
+    }
+}
+
+/*****************************************************************************
+ * Name: board_buttons
+ *
+ * Description:
+ *      Reads keys
+ ****************************************************************************/
+
+uint8_t board_buttons(void)
+{
+  uint8_t rv = 0;
+  int i;
+
+  for (i = 0; i != NUM_BUTTONS; ++i)
+    {
+      if (stm32_gpioread(buttons[i]) == 0)
+        {
+          rv |= 1 << i;
+        }
+    }
+
+  return rv;
+}
diff --git a/configs/stm32butterfly2/src/stm32_leds.c b/configs/stm32butterfly2/src/stm32_leds.c
new file mode 100644
index 0000000000000000000000000000000000000000..dae6352fa7b7d79e0f641082e3bc84a473bd9e36
--- /dev/null
+++ b/configs/stm32butterfly2/src/stm32_leds.c
@@ -0,0 +1,267 @@
+/*****************************************************************************
+ * configs/stm32butterfly2/src/stm32_leds.c
+ *
+ *   Copyright (C) 2016 Michał Łyszczek. All rights reserved.
+ *   Author: Michał Łyszczek 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "stm32_gpio.h"
+
+/*****************************************************************************
+ * Pre-processor definitions
+ ****************************************************************************/
+
+#define GPIO_LED1       (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz |\
+                         GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN0)
+#define GPIO_LED2       (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz |\
+                         GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN1)
+#define GPIO_LED3       (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz |\
+                         GPIO_OUTPUT_SET | GPIO_PORTC | GPIO_PIN4)
+#define GPIO_LED4       (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz |\
+                         GPIO_OUTPUT_SET | GPIO_PORTC | GPIO_PIN5)
+
+/*****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* Identifies led state */
+
+enum led_state
+{
+  LED_ON = false,
+  LED_OFF = true
+};
+
+/*****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Name: led_state
+ *
+ * Description:
+ *   Sets pack of leds to given state
+ ****************************************************************************/
+
+static void led_state(enum led_state state, unsigned int leds)
+{
+  if (leds & BOARD_LED1_BIT)
+    {
+      stm32_gpiowrite(GPIO_LED1, state);
+    }
+
+  if (leds & BOARD_LED2_BIT)
+    {
+      stm32_gpiowrite(GPIO_LED2, state);
+    }
+
+  if (leds & BOARD_LED3_BIT)
+    {
+      stm32_gpiowrite(GPIO_LED3, state);
+    }
+
+  if (leds & BOARD_LED4_BIT)
+    {
+      stm32_gpiowrite(GPIO_LED4, state);
+    }
+}
+
+/*****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Name: stm32_led_initialize
+ *
+ * Description:
+ *   Initializes low level gpio pins for board LEDS
+ ****************************************************************************/
+
+void stm32_led_initialize(void)
+{
+  stm32_configgpio(GPIO_LED1);
+  stm32_configgpio(GPIO_LED2);
+  stm32_configgpio(GPIO_LED3);
+  stm32_configgpio(GPIO_LED4);
+}
+
+#ifdef CONFIG_ARCH_LEDS
+
+/*****************************************************************************
+ * Name: board_autoled_on
+ *
+ * Description:
+ *   Drives board leds when specific RTOS state led occurs.
+ *
+ * Input parameters:
+ *   led - This is actually an RTOS state not led number of anything like that
+ ****************************************************************************/
+
+void board_autoled_on(int led)
+{
+  switch (led)
+    {
+    case LED_STARTED:
+      led_state(LED_OFF, BOARD_LED2_BIT | BOARD_LED3_BIT | BOARD_LED4_BIT);
+      led_state(LED_ON,  BOARD_LED1_BIT);
+      break;
+
+    case LED_HEAPALLOCATE:
+      led_state(LED_OFF, BOARD_LED1_BIT | BOARD_LED3_BIT | BOARD_LED4_BIT);
+      led_state(LED_ON,  BOARD_LED2_BIT);
+      break;
+
+    case LED_IRQSENABLED:
+      led_state(LED_OFF, BOARD_LED1_BIT | BOARD_LED2_BIT | BOARD_LED4_BIT);
+      led_state(LED_ON,  BOARD_LED3_BIT);
+      break;
+
+    case LED_STACKCREATED:
+      led_state(LED_OFF, BOARD_LED1_BIT | BOARD_LED2_BIT | BOARD_LED3_BIT);
+      led_state(LED_ON,  BOARD_LED4_BIT);
+      break;
+
+    case LED_INIRQ:
+    case LED_SIGNAL:
+    case LED_ASSERTION:
+    case LED_PANIC:
+      led_state(LED_ON,  BOARD_LED4_BIT);
+      break;
+    }
+}
+
+/*****************************************************************************
+ * Name: board_autoled_off
+ *
+ * Description:
+ *   Drives board leds when specific RTOS state led ends
+ *
+ * Input parameters:
+ *   led - This is actually an RTOS state not led number of anything like that
+ ****************************************************************************/
+
+void board_autoled_off(int led)
+{
+  switch (led)
+    {
+    case LED_STARTED:
+      led_state(LED_OFF, BOARD_LED1_BIT);
+      break;
+
+    case LED_HEAPALLOCATE:
+      led_state(LED_OFF, BOARD_LED2_BIT);
+      break;
+
+    case LED_IRQSENABLED:
+      led_state(LED_OFF, BOARD_LED3_BIT);
+      break;
+
+    case LED_STACKCREATED:
+    case LED_INIRQ:
+    case LED_SIGNAL:
+    case LED_ASSERTION:
+    case LED_PANIC:
+      led_state(LED_OFF,  BOARD_LED4_BIT);
+      break;
+    }
+}
+#endif
+
+/*****************************************************************************
+ * Name: board_userled_initialize
+ *
+ * Description:
+ *   This function should initialize leds for user use, but on RTOS start we
+ *   initialize every led for use by RTOS and at end, when RTOS is fully
+ *   booted up, we give control of these specific leds for user. So that's why
+ *   this function is empty.
+ ****************************************************************************/
+
+void board_userled_initialize(void)
+{
+  /* Already initialized by stm32_led_initialize. */
+}
+
+/*****************************************************************************
+ * Name: board_userled
+ *
+ * Description:
+ *   Sets led to ledon state.
+ *
+ * Input parameters:
+ *   led - Led to be set, indexed from 0
+ *   ledon - new state for the led.
+ ****************************************************************************/
+
+void board_userled(int led, bool ledon)
+{
+  unsigned int ledbit;
+
+#ifndef CONFIG_ARCH_LEDS
+  if (led == BOARD_LED4)
+    {
+      return;
+    }
+#endif
+
+  ledbit = 1 << led;
+  led_state(ledon, ledbit);
+}
+
+/*****************************************************************************
+ * Name: board_userled_all
+ *
+ * Description:
+ *   Sets whole ledset to given state.
+ *
+ * Input parameters:
+ *   ledset - Led bits to be set on or off
+ ****************************************************************************/
+
+void board_userled_all(uint8_t ledset)
+{
+#ifdef CONFIG_ARCH_LEDS
+  led_state(LED_ON, ledset & ~BOARD_LED4_BIT);
+  led_state(LED_OFF, ~(ledset | BOARD_LED4_BIT));
+#else
+  led_state(LED_ON, ledset);
+  led_state(led_OFF, ~ledset);
+#endif
+}
diff --git a/configs/stm32butterfly2/src/stm32_mmcsd.c b/configs/stm32butterfly2/src/stm32_mmcsd.c
new file mode 100644
index 0000000000000000000000000000000000000000..a244a5b5ff657823932f16dd6063f5eebec87eca
--- /dev/null
+++ b/configs/stm32butterfly2/src/stm32_mmcsd.c
@@ -0,0 +1,216 @@
+/*****************************************************************************
+ * configs/stm32butterfly2/src/stm32_mmcsd.c
+ *
+ *   Copyright (C) 2016-2017 Michał Łyszczek. All rights reserved.
+ *   Author: Michał Łyszczek 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "stm32.h"
+#include "stm32_butterfly2.h"
+#include "stm32_spi.h"
+
+/*****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef CONFIG_STM32_SPI1
+#  error "SD driver requires CONFIG_STM32_SPI1 to be enabled"
+#endif
+
+#ifdef CONFIG_DISABLE_MOUNTPOINT
+#  error "SD driver requires CONFIG_DISABLE_MOUNTPOINT to be disabled"
+#endif
+
+/*****************************************************************************
+ * Private Definitions
+ ****************************************************************************/
+
+static const int SD_SPI_PORT = 1; /* SD is connected to SPI1 port */
+static const int SD_SLOT_NO = 0;  /* There is only one SD slot */
+
+/* Media changed callback */
+
+static spi_mediachange_t g_chmediaclbk;
+
+/* Argument for media changed callback */
+
+static void *g_chmediaarg;
+
+/* Semafor to inform stm32_cd_thread that card was inserted or pulled out */
+
+static sem_t g_cdsem;
+
+/*****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Name: stm32_cd_thread
+ *
+ * Description:
+ *   Working thread to call mediachanged function when card is inserted or
+ *   pulled out.
+ ****************************************************************************/
+
+static void *stm32_cd_thread(void *arg)
+{
+  (void)arg;
+
+  spiinfo("INFO: Runnig card detect thread\n");
+  while (1)
+    {
+      sem_wait(&g_cdsem);
+      spiinfo("INFO: Card has been inserted, initializing\n");
+
+      if (g_chmediaclbk)
+        {
+          /* Card doesn't seem to initialize properly without letting it to
+           * rest for a millsecond or so.
+           */
+
+          usleep(1 * 1000);
+          g_chmediaclbk(g_chmediaarg);
+        }
+    }
+
+  return NULL;
+}
+
+/*****************************************************************************
+ * Name: stm32_cd
+ *
+ * Description:
+ *   Card detect interrupt handler.
+ ****************************************************************************/
+
+static int stm32_cd(int irq, void *context, void *arg)
+{
+  static const int debounce_time = 100; /* [ms] */
+  static uint32_t now = 0;
+  static uint32_t prev = 0;
+  struct timespec tp;
+
+  clock_gettime(CLOCK_MONOTONIC, &tp);
+  now = tp.tv_sec * 1000 + tp.tv_nsec / 1000000;
+
+  /* When inserting card, card detect plate might bounce causing this
+   * interrupt to be called many time on single card insert/deinsert. Thus
+   * we are allowing only one interrupt every 100ms.
+   */
+
+  if (now - debounce_time > prev)
+    {
+      prev = now;
+      sem_post(&g_cdsem);
+    }
+
+  return OK;
+}
+
+/*****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Name: stm32_spi1register
+ *
+ * Description:
+ *   Registers media change callback
+ ****************************************************************************/
+
+int stm32_spi1register(struct spi_dev_s *dev, spi_mediachange_t callback,
+                       void *arg)
+{
+  spiinfo("INFO: Registering spi1 device\n");
+  g_chmediaclbk = callback;
+  g_chmediaarg = arg;
+  return OK;
+}
+
+/*****************************************************************************
+ * Name: stm32_mmcsd_initialize
+ *
+ * Description:
+ *   Initialize SPI-based SD card and card detect thread.
+ ****************************************************************************/
+
+int stm32_mmcsd_initialize(int minor)
+{
+  struct spi_dev_s *spi;
+  struct sched_param schparam;
+  pthread_attr_t pattr;
+  int rv;
+
+  spiinfo("INFO: Initializing mmcsd card\n");
+  if ((spi = stm32_spibus_initialize(SD_SPI_PORT)) == NULL)
+    {
+      ferr("failed to initialize SPI port %d\n", SD_SPI_PORT);
+      return -ENODEV;
+    }
+
+  if ((rv = mmcsd_spislotinitialize(minor, SD_SLOT_NO, spi)) < 0)
+    {
+      ferr("failed to bind SPI port %d to SD slot %d\n", SD_SPI_PORT,
+           SD_SLOT_NO);
+      return rv;
+    }
+
+  (void)stm32_gpiosetevent(GPIO_SD_CD, true, true, true, stm32_cd, NULL);
+
+  sem_init(&g_cdsem, 0, 0);
+  pthread_attr_init(&pattr);
+
+#ifdef CONFIG_DEBUG_FS
+  pthread_attr_setstacksize(&pattr, 1024);
+#else
+  pthread_attr_setstacksize(&pattr, 256);
+#endif
+
+  schparam.sched_priority = 50;
+  pthread_attr_setschedparam(&pattr, &schparam);
+  pthread_create(NULL, &pattr, stm32_cd_thread, NULL);
+
+  spiinfo("INFO: mmcsd card has been initialized successfully\n");
+  return OK;
+}
diff --git a/configs/stm32butterfly2/src/stm32_spi.c b/configs/stm32butterfly2/src/stm32_spi.c
new file mode 100644
index 0000000000000000000000000000000000000000..fa2fd2e7628552698d79591297fdcf1a4efe5874
--- /dev/null
+++ b/configs/stm32butterfly2/src/stm32_spi.c
@@ -0,0 +1,107 @@
+/*****************************************************************************
+ * configs/stm32butterfly2/src/stm32_spi.c
+ *
+ *   Copyright (C) 2016 Michał Łyszczek. All rights reserved.
+ *   Author: Michał Łyszczek 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#include "stm32_butterfly2.h"
+#include "stm32_gpio.h"
+#include "stm32_spi.h"
+
+/*****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Name: stm32_spidev_initialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins.
+ *
+ * Note:
+ *   Here only CS pins are configured as SPI pins are configured by driver
+ *   itself.
+ ****************************************************************************/
+
+void stm32_spidev_initialize(void)
+{
+  spiinfo("INFO: Initializing spi gpio pins\n");
+
+  stm32_configgpio(GPIO_SD_CS);
+  stm32_configgpio(GPIO_SD_CD);
+}
+
+/*****************************************************************************
+ * Name: stm32_spi1select
+ *
+ * Description:
+ *   Function asserts given devid based on select
+ ****************************************************************************/
+
+void stm32_spi1select(struct spi_dev_s *dev, enum spi_dev_e devid,
+                      bool select)
+{
+  spiinfo("INFO: Selecting spi dev: %d, state: %d\n", devid, select);
+
+  if (devid == SPIDEV_MMCSD)
+    {
+      stm32_gpiowrite(GPIO_SD_CS, !select);
+    }
+}
+
+/*****************************************************************************
+ * Name: stm32_spi1status
+ *
+ * Description:
+ *   Return status of devid
+ ****************************************************************************/
+
+uint8_t stm32_spi1status(struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  spiinfo("INFO: Requesting info from spi dev: %d\n", devid);
+
+  if (devid == SPIDEV_MMCSD)
+    {
+      if (stm32_gpioread(GPIO_SD_CD) == 0)
+        {
+          return SPI_STATUS_PRESENT;
+        }
+    }
+
+  return 0;
+}
diff --git a/configs/stm32butterfly2/src/stm32_usb.c b/configs/stm32butterfly2/src/stm32_usb.c
new file mode 100644
index 0000000000000000000000000000000000000000..fa84e88e32bea85258b6b2a73c6a32b1eb9e6770
--- /dev/null
+++ b/configs/stm32butterfly2/src/stm32_usb.c
@@ -0,0 +1,62 @@
+/*****************************************************************************
+ * configs/stm32butterfly2/src/stm32_usb.c
+ *
+ *   Copyright (C) 2016 Michał Łyszczek. All rights reserved.
+ *   Author: Michał Łyszczek 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Include Files
+ ****************************************************************************/
+
+#include 
+
+#include "stm32_gpio.h"
+
+#include "stm32_butterfly2.h"
+
+/*****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Name: stm32_usb_initialize
+ *
+ * Description:
+ *   Initializes USB pins
+ ****************************************************************************/
+
+void stm32_usb_initialize(void)
+{
+  uinfo("INFO: Initializing usb otgfs gpio pins\n");
+
+  stm32_configgpio(GPIO_OTGFS_VBUS);
+  stm32_configgpio(GPIO_OTGFS_PWRON);
+}
diff --git a/configs/stm32butterfly2/src/stm32_usbdev.c b/configs/stm32butterfly2/src/stm32_usbdev.c
new file mode 100644
index 0000000000000000000000000000000000000000..a538222ca039a6dea0e5de545dd10ce0334ad2ee
--- /dev/null
+++ b/configs/stm32butterfly2/src/stm32_usbdev.c
@@ -0,0 +1,77 @@
+/*****************************************************************************
+ * configs/stm32butterfly2/src/stm32_usbdev.c
+ *
+ *   Copyright (C) 2016 Michał Łyszczek. All rights reserved.
+ *   Author: Michał Łyszczek 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+#include "stm32_otgfs.h"
+
+/*****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef CONFIG_STM32_OTGFS
+#  error "CONFIG_USBDEV requires CONFIG_STM32_OTGFS to be enabled"
+#endif
+
+#ifdef CONFIG_USBHOST
+#  error "CONFIG_USBDEV cannot be set alongside CONFIG_USBHOST"
+#endif
+
+/*****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Name: stm32_usbsuspend
+ *
+ * Description:
+ *   Board logic must provide the stm32_usbsuspend logic if the USBDEV driver
+ *   is used. This function is called whenever the USB enters or leaves
+ *   suspend mode. This is an oportunity for the board logic to shutdown
+ *   clocks, power, etc. while the USB is suspended.
+ *
+ * TODO:
+ *   - Well... implement those features like clock shutdown.
+ ****************************************************************************/
+
+void stm32_usbsuspend(struct usbdev_s *dev, bool resume)
+{
+  uinfo("INFO: usb %s", resume ? "resumed" : "suspended");
+}
diff --git a/configs/stm32butterfly2/src/stm32_usbhost.c b/configs/stm32butterfly2/src/stm32_usbhost.c
new file mode 100644
index 0000000000000000000000000000000000000000..2f44425eead369d55ffc813508531ada7cb03d9d
--- /dev/null
+++ b/configs/stm32butterfly2/src/stm32_usbhost.c
@@ -0,0 +1,200 @@
+/*****************************************************************************
+ * configs/stm32butterfly2/src/stm32_usbhost.c
+ *
+ *   Copyright (C) 2016 Michał Łyszczek. All rights reserved.
+ *   Author: Michał Łyszczek 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Include Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "stm32.h"
+#include "stm32_butterfly2.h"
+#include "stm32_otgfs.h"
+
+/*****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef CONFIG_STM32_OTGFS
+#  error "CONFIG_USBHOST requires CONFIG_STM32_OTGFS to be enabled"
+#endif
+
+#ifdef CONFIG_USBDEV
+#  error "CONFIG_USBHOST cannot be set alongside CONFIG_USBDEV"
+#endif
+
+/*****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static struct usbhost_connection_s *g_usbconn;
+
+/*****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Name: usbhost_detect
+ *
+ * Description:
+ *   Wait for USB devices to be connected.
+ ****************************************************************************/
+
+static void* usbhost_detect(void *arg)
+{
+  (void)arg;
+  struct usbhost_hubport_s *hport;
+
+  uinfo("INFO: Starting usb detect thread\n");
+
+  for (;;)
+    {
+      CONN_WAIT(g_usbconn, &hport);
+
+      if (hport->connected)
+        {
+          CONN_ENUMERATE(g_usbconn, hport);
+        }
+    }
+
+  return 0;
+}
+
+/*****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Name: stm32_usbhost_initialize
+ *
+ * Description:
+ *   Initializes USB host functionality.
+ ****************************************************************************/
+
+int stm32_usbhost_initialize(void)
+{
+  int rv;
+
+#ifdef CONFIG_USBHOST_MSC
+  uinfo("INFO: Initializing USB MSC class\n");
+
+  if ((rv = usbhost_msc_initialize()) < 0)
+    {
+      uerr("ERROR: Failed to register mass storage class: %d\n", rv);
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_CDACM
+  uinfo("INFO: Initializing CDCACM usb class\n");
+
+  if ((rv = usbhost_cdacm_initialize()) < 0)
+    {
+      uerr("ERROR: Failed to register CDC/ACM serial class: %d\n", rv);
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_HIDKBD
+  uinfo("INFO: Initializing HID Keyboard usb class\n");
+
+  if ((rv = usbhost_kbdinit()) < 0)
+    {
+      uerr("ERROR: Failed to register the KBD class: %d\n", rv);
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_HIDMOUSE
+  uinfo("INFO: Initializing HID Mouse usb class\n");
+
+  if ((rv = usbhost_mouse_init()) < 0)
+    {
+      uerr("ERROR: Failed to register the mouse class: %d\n", rv);
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_HUB
+  uinfo("INFO: Initializing USB HUB class\n");
+
+  if ((rv = usbhost_hub_initialize()) < 0)
+    {
+      uerr("ERROR: Failed to register hub class: %d\n", rv);
+    }
+#endif
+
+  if ((g_usbconn = stm32_otgfshost_initialize(0)))
+    {
+      pthread_attr_t pattr;
+      struct sched_param schparam;
+
+      pthread_attr_init(&pattr);
+      pthread_attr_setstacksize(&pattr, 2048);
+
+      schparam.sched_priority = 50;
+      pthread_attr_setschedparam(&pattr, &schparam);
+
+      return pthread_create(NULL, &pattr, usbhost_detect, NULL);
+    }
+
+  return -ENODEV;
+}
+
+/*****************************************************************************
+ * Name: stm32_usbhost_vbusdrive
+ *
+ * Description:
+ *   Enable/disable driving of VBUS 5V output.
+ *
+ *   The application uses this field to control power to this port, and the
+ *   core clears this bit on an overcurrent condition.
+ *
+ * Input Parameters:
+ *   iface - For future growth to handle multiple USB host interface.
+ *     Should be zero.
+ *   enable - true: enable VBUS power; false: disable VBUS power
+ *
+ * Returned Value:
+ *   None
+ ****************************************************************************/
+
+void stm32_usbhost_vbusdrive(int iface, bool enable)
+{
+  stm32_gpiowrite(GPIO_OTGFS_PWRON, enable);
+}
diff --git a/configs/stm32f103-minimum/Kconfig b/configs/stm32f103-minimum/Kconfig
index 15ead9d2c21b3441305b56eca95e963a01b7c095..3479da272510a3e44b4ba313bf13ae609a9f1358 100644
--- a/configs/stm32f103-minimum/Kconfig
+++ b/configs/stm32f103-minimum/Kconfig
@@ -4,4 +4,10 @@
 #
 
 if ARCH_BOARD_STM32F103_MINIMUM
+
+config STM32F103MINIMUM_QETIMER
+	int "Timer to use with QE encoder"
+	default 4
+	depends on QENCODER
+
 endif
diff --git a/configs/stm32f103-minimum/README.txt b/configs/stm32f103-minimum/README.txt
index 59bef3ef6a89c56ec0b77d26a703f53abccef6ab..82f9f33ce89e1b21f86b864d10af62f30c89b3a7 100644
--- a/configs/stm32f103-minimum/README.txt
+++ b/configs/stm32f103-minimum/README.txt
@@ -4,70 +4,88 @@ README
 This README discusses issues unique to NuttX configurations for the
 STM32F103C8T6 Minimum System Development Board for ARM Microcontroller.
 
-This board is available from several vendors on the net, and may
-be sold under different names or no name at all. It is based on a
-STM32F103C8T6 and has a DIP-40 form-factor.
+Contents
+========
 
-There are two versions of very similar boards:  One is red and one is
-blue.  See http://www.stm32duino.com/viewtopic.php?f=28&t=117
+  - STM32F103C8T6 Minimum System Development Boards:
+  - LEDs
+  - UARTs
+  - Timer Inputs/Outputs
+  - Using 128KiB of Flash instead of 64KiB
+  - Quadrature Encoder
+  - SDCard support
+  - USB Console support
+  - STM32F103 Minimum - specific Configuration Options
+  - Configurations
 
-The Red Board:
+STM32F103C8T6 Minimum System Development Boards:
+================================================
 
-  Good things about the red board:
+  This STM32F103C8T6 minimum system development board is available from
+  several vendors on the net, and may be sold under different names or
+  no name at all. It is based on a STM32F103C8T6 and has a DIP-40 form-
+  factor.
 
-  - 1.5k pull up resistor on the PA12 pin (USB D+) which you can
-    programatically drag down for automated USB reset.
-  - large power capacitors and LDO power.
+  There are two versions of very similar boards:  One is red and one is
+  blue.  See http://www.stm32duino.com/viewtopic.php?f=28&t=117
 
-  Problems with the red board:
+  The Red Board:
 
-  - Silk screen is barely readable, the text is chopped off on some of
-    the pins
-  - USB connector only has two anchor points and it is directly soldered
-    on the surface
-  - Small reset button with hardly any resistance
+    Good things about the red board:
 
-The Blue Board:
+    - 1.5k pull up resistor on the PA12 pin (USB D+) which you can
+      programatically drag down for automated USB reset.
+    - large power capacitors and LDO power.
 
-  Good things about the blue board:
+    Problems with the red board:
 
-  - Four soldered anchor point on the USB connector. What you can't tell
-    from this picture is that there is a notch in the pcb board and the USB
-    connector sits down inside it some. This provides some lateral stability
-    that takes some of the stress off the solder points.
-  - It has nice clear readable silkscreen printing.
-  - It also a larger reset button.
+    - Silk screen is barely readable, the text is chopped off on some of
+      the pins
+    - USB connector only has two anchor points and it is directly soldered
+      on the surface
+    - Small reset button with hardly any resistance
 
-  Problems with the blue board:
+  The Blue Board:
 
-  - Probably won't work as a USB device if it has a 10k pull-up on PA12. You
-    have to check the pull up on PA12 (USB D+). If it has a 10k pull-up
-    resistor, you will need to replace it with a 1.5k one to use the native
-    USB.
-  - Puny voltage regulator probably 100mA.
+    Good things about the blue board:
 
-  A schematic for the blue board is available here:
-  http://www.stm32duino.com/download/file.php?id=276
+    - Four soldered anchor point on the USB connector. What you can't tell
+      from this picture is that there is a notch in the pcb board and the USB
+      connector sits down inside it some. This provides some lateral stability
+      that takes some of the stress off the solder points.
+    - It has nice clear readable silkscreen printing.
+    - It also a larger reset button.
 
-Both Boards:
+    Problems with the blue board:
 
-  Nice features common to both:
+    - Probably won't work as a USB device if it has a 10k pull-up on PA12. You
+      have to check the pull up on PA12 (USB D+). If it has a 10k pull-up
+      resistor, you will need to replace it with a 1.5k one to use the native
+      USB.
+    - Puny voltage regulator probably 100mA.
 
-  - SWD pins broken out and easily connected (VCC, GND, SWDIO, SWCLK)
-  - USB 5V is broken out with easy access.
-  - User LED on PC13
-  - Power LED
-  - You can probably use more flash (128k) than officially documented for
-    the chip (stm32f103c8t6 64k), I was able to load 115k of flash on mine
-    and it seemed to work.
+    A schematic for the blue board is available here:
+    http://www.stm32duino.com/download/file.php?id=276
 
-  Problems with both boards:
+  Both Boards:
 
-  - No preloaded bootloader * to me this isn't really a problem as the
-    entire 64k of flash is available for use
-  - No user button
+    Nice features common to both:
 
-This is the board pinout based on its form-factor for the Blue board:
+    - SWD pins broken out and easily connected (VCC, GND, SWDIO, SWCLK)
+    - USB 5V is broken out with easy access.
+    - User LED on PC13
+    - Power LED
+    - You can probably use more flash (128k) than officially documented for
+      the chip (stm32f103c8t6 64k), I was able to load 115k of flash on mine
+      and it seemed to work.
+
+    Problems with both boards:
+
+    - No preloaded bootloader * to me this isn't really a problem as the
+      entire 64k of flash is available for use
+    - No user button
+
+  This is the board pinout based on its form-factor for the Blue board:
 
         USB
         ___
@@ -94,25 +112,15 @@ This is the board pinout based on its form-factor for the Blue board:
   |3.3V       VB|
   |_____________|
 
-Contents
-========
-
-  - LEDs
-  - UARTs
-  - Timer Inputs/Outputs
-  - Using 128KiB of Flash instead of 64KiB
-  - STM32F103 Minimum - specific Configuration Options
-  - Configurations
-
 LEDs
 ====
 
-The STM32F103 Minimum board has only one software controllable LED.
-This LED can be used by the board port when CONFIG_ARCH_LEDS option is
-enabled.
+  The STM32F103 Minimum board has only one software controllable LED.
+  This LED can be used by the board port when CONFIG_ARCH_LEDS option is
+  enabled.
 
-If enabled the LED is simply turned on when the board boots
-succesfully, and is blinking on panic / assertion failed.
+  If enabled the LED is simply turned on when the board boots
+  succesfully, and is blinking on panic / assertion failed.
 
 UARTs
 =====
@@ -139,7 +147,7 @@ UARTs
 Default USART/UART Configuration
 --------------------------------
 
-USART1 (RX & TX only) is available through pins PA9 (TX) and PA10 (RX).
+  USART1 (RX & TX only) is available through pins PA9 (TX) and PA10 (RX).
 
 Timer Inputs/Outputs
 ====================
@@ -171,69 +179,175 @@ Timer Inputs/Outputs
 Using 128KiB of Flash instead of 64KiB
 ======================================
 
-Some people figured out that the STM32F103C8T6 has 128KiB of internal memory
-instead of 64KiB as documented in the datasheet and reported by its internal
-register.
+  Some people figured out that the STM32F103C8T6 has 128KiB of internal memory
+  instead of 64KiB as documented in the datasheet and reported by its internal
+  register.
+
+  In order to enable 128KiB you need modify the linker script to reflect this
+  new size. Open the configs/stm32f103-minimum/scripts/ld.script and replace:
+
+    flash (rx) : ORIGIN = 0x08000000, LENGTH = 64K
+
+  with
+
+    flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
+
+  Enable many NuttX features (ie. many filesystems and applications) to get a
+  large binary image with more than 64K.
+
+  We will use OpenOCD to write the firmware in the STM32F103C8T6 Flash. Use a
+  up to dated OpenOCD version (ie. openocd-0.9).
+
+  You will need to create a copy of original openocd/scripts/target/stm32f1x.cfg
+  to openocd/scripts/target/stm32f103c8t6.cfg and edit the later file replacing:
+
+    flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
 
-In order to enable 128KiB you need modify the linker script to reflect this
-new size. Open the configs/stm32f103-minimum/scripts/ld.script and replace:
+  with
 
-  flash (rx) : ORIGIN = 0x08000000, LENGTH = 64K
+    flash bank $_FLASHNAME stm32f1x 0x08000000 0x20000 0 0 $_TARGETNAME
 
-with
+  We will use OpenOCD with STLink-V2 programmer, but it will work with other
+  programmers (JLink, Versaloon, or some based on FTDI FT232, etc).
 
-  flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
+  Open a terminal and execute:
 
-Enable many NuttX features (ie. many filesystems and applications) to get a
-large binary image with more than 64K.
+    $ sudo openocd -f interface/stlink-v2.cfg -f target/stm32f103c8t6.cfg
 
-We will use OpenOCD to write the firmware in the STM32F103C8T6 Flash. Use a
-up to dated OpenOCD version (ie. openocd-0.9).
+  Now in other terminal execute:
 
-You will need to create a copy of original openocd/scripts/target/stm32f1x.cfg
-to openocd/scripts/target/stm32f103c8t6.cfg and edit the later file replacing:
+    $ telnet localhost 4444
 
-  flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
+    Trying 127.0.0.1...
+    Connected to localhost.
+    Escape character is '^]'.
+    Open On-Chip Debugger
 
-with
+    > reset halt
+    stm32f1x.cpu: target state: halted
+    target halted due to debug-request, current mode: Thread
+    xPSR: 0x01000000 pc: 0x080003ac msp: 0x20000d78
 
-  flash bank $_FLASHNAME stm32f1x 0x08000000 0x20000 0 0 $_TARGETNAME
+    > flash write_image erase nuttx.bin 0x08000000
+    auto erase enabled
+    device id = 0x20036410
+    ignoring flash probed value, using configured bank size
+    flash size = 128kbytes
+    stm32f1x.cpu: target state: halted
+    target halted due to breakpoint, current mode: Thread
+    xPSR: 0x61000000 pc: 0x2000003a msp: 0x20000d78
+    wrote 92160 bytes from file nuttx.bin in 4.942194s (18.211 KiB/s)
 
-We will use OpenOCD with STLink-V2 programmer, but it will work with other
-programmers (JLink, Versaloon, or some based on FTDI FT232, etc).
+    > reset run
+    > exit
 
-Open a terminal and execute:
+  Now NuttX should start normally.
 
-  $ sudo openocd -f interface/stlink-v2.cfg -f target/stm32f103c8t6.cfg
+Quadrature Encoder:
+===================
 
-Now in other terminal execute:
+  The nsh configuration has been used to test the Quadrture Encoder
+  (QEncoder, QE) with the following modifications to the configuration
+  file:
 
-  $ telnet localhost 4444
+  - These setting enable support for the common QEncode upper half driver:
 
-  Trying 127.0.0.1...
-  Connected to localhost.
-  Escape character is '^]'.
-  Open On-Chip Debugger
+   CONFIG_SENSORS=y
+     CONFIG_QENCODER=y
 
-  > reset halt
-  stm32f1x.cpu: target state: halted
-  target halted due to debug-request, current mode: Thread
-  xPSR: 0x01000000 pc: 0x080003ac msp: 0x20000d78
+  - This is a board setting that selected timer 4 for use with the
+    quadrature encode:
 
-  > flash write_image erase nuttx.bin 0x08000000
-  auto erase enabled
-  device id = 0x20036410
-  ignoring flash probed value, using configured bank size
-  flash size = 128kbytes
-  stm32f1x.cpu: target state: halted
-  target halted due to breakpoint, current mode: Thread
-  xPSR: 0x61000000 pc: 0x2000003a msp: 0x20000d78
-  wrote 92160 bytes from file nuttx.bin in 4.942194s (18.211 KiB/s)
+    CONFIG_STM32F103MINIMUM_QETIMER=4
 
-  > reset run
-  > exit
+  - These settings enable the STM32 Quadrature encoder on timer 4:
 
-Now NuttX should start normally.
+    CONFIG_STM32_TIM4_CAP=y
+    CONFIG_STM32_TIM4_QE=y
+    CONFIG_STM32_TIM4_QECLKOUT=2800000
+    CONFIG_STM32_QENCODER_FILTER=y
+    CONFIG_STM32_QENCODER_SAMPLE_EVENT_6=y
+    CONFIG_STM32_QENCODER_SAMPLE_FDTS_4=y
+
+  - These settings enable the test case at apps/examples/qencoder:
+
+    CONFIG_EXAMPLES_QENCODER=y
+    CONFIG_EXAMPLES_QENCODER_DELAY=100
+    CONFIG_EXAMPLES_QENCODER_DEVPATH="/dev/qe0"
+
+  In this configuration, the QEncoder inputs will be on the TIM4 inputs of
+  PB6 and PB7.
+
+SDCard support:
+===============
+
+  Only STM32F103xx High-density devices has SDIO controller. STM32F103C8T6 is a
+  Medium-density device, but we can use SDCard over SPI.
+
+  You can do that enabling these options:
+
+    CONFIG_FS_FAT=y
+
+    CONFIG_FS_WRITABLE=y
+
+    CONFIG_MMCSD=y
+    CONFIG_MMCSD_NSLOTS=1
+    CONFIG_MMCSD_SPI=y
+    CONFIG_MMCSD_SPICLOCK=20000000
+    CONFIG_MMCSD_SPIMODE=0
+
+    CONFIG_STM32_SPI=y
+    CONFIG_STM32_SPI1=y
+
+    CONFIG_SPI=y
+    CONFIG_SPI_CALLBACK=y
+    CONFIG_SPI_EXCHANGE=y
+
+  And connect a SDCard/SPI board on SPI1. Connect the CS pin to PA4, SCK to
+  PA5, MOSI to PA7 and MISO to PA6. Note: some chinese boards use MOSO instead
+  of MISO.
+
+USB Console support:
+====================
+
+  The STM32F103C8 has a USB Device controller, then we can use NuttX support
+  to USB Device. We can the console over USB enabling these options:
+
+  System Type  --->
+    STM32 Peripheral Support  --->
+      [*] USB Device
+
+  It will enable:  CONFIG_STM32_USB=y
+
+  Board Selection  --->
+    -*- Enable boardctl() interface
+    [*]   Enable USB device controls
+
+  It will enable: CONFIG_BOARDCTL_USBDEVCTRL=y
+
+  Device Drivers  --->
+    -*- USB Device Driver Support  --->
+      [*]   USB Modem (CDC/ACM) support  --->
+
+  It will enable:  CONFIG_CDCACM=y and many default options.
+
+  Device Drivers  --->
+    -*- USB Device Driver Support  --->
+      [*]   USB Modem (CDC/ACM) support  --->
+        [*]   CDC/ACM console device
+
+  It will enable: CONFIG_CDCACM_CONSOLE=y
+
+  Device Drivers  --->
+    [*] Serial Driver Support  --->
+      Serial console (No serial console)  --->
+        (X) No serial console
+
+  It will enable: CONFIG_NO_SERIAL_CONSOLE=y
+
+  After flashing the firmware in the board, unplug and plug it in the computer
+  and it will create a /dev/ttyACM0 device in the Linux. Use minicom with this
+  device to get access to NuttX NSH console (press Enter three times to start)
 
 STM32F103 Minimum - specific Configuration Options
 ==================================================
@@ -392,7 +506,7 @@ STM32F103 Minimum - specific Configuration Options
     CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
     CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
     CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
-    CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+    CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
       dump of all CAN registers.
 
   STM32F103 Minimum SPI Configuration
@@ -406,21 +520,25 @@ STM32F103 Minimum - specific Configuration Options
 Configurations
 ==============
 
-Each STM32F103 Minimum configuration is maintained in a sub-directory and
-can be selected as follow:
+  Instantiating Configurations
+  ----------------------------
+  Each STM32F103 Minimum configuration is maintained in a sub-directory and
+  can be selected as follow:
 
     cd tools
     ./configure.sh STM32F103 Minimum/
     cd -
     . ./setenv.sh
 
-If this is a Windows native build, then configure.bat should be used
-instead of configure.sh:
+  If this is a Windows native build, then configure.bat should be used
+  instead of configure.sh:
 
     configure.bat STM32F103-Minimum\
 
-Where  is one of the following:
+  Where  is one of the following:
 
+  Configuration Directories
+  -------------------------
   nsh:
   ---
     Configures the NuttShell (nsh) located at apps/examples/nsh. This
@@ -428,6 +546,19 @@ Where  is one of the following:
     builtin applications is enabled, but in the base configuration no
     builtin applications are selected.
 
+  jlx12864g:
+  ---------
+    This is a config example to use the JLX12864G-086 LCD module. To use this
+    LCD you need to connect PA5 (SPI1 CLK) to SCK; PA7 (SPI1 MOSI) to SDA; PA4
+    to CS; PA3 to RST; PA2 to RS.
+
+  nrf24:
+  ---------
+    This is a config example to test the nrf24 terminal example. You will need
+    two stm32f103-minimum board each one with a nRF24L01 module connected this
+    way: connect PB1 to nRF24 CE pin; PA4 to CSN; PA5 (SPI1 CLK) to SCK; PA7
+    (SPI1 MOSI) to MOSI; PA6 (SPI1 MISO) to MISO; PA0 to IRQ.
+
   usbnsh:
   -------
 
@@ -456,7 +587,6 @@ Where  is one of the following:
     3. This configuration does have UART2 output enabled and set up as
        the system logging device:
 
-       CONFIG_SYSLOG=y                    : Enable output to syslog, not console
        CONFIG_SYSLOG_CHAR=y               : Use a character device for system logging
        CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART2 will be /dev/ttyS0
 
@@ -474,16 +604,16 @@ Where  is one of the following:
        CONFIG_USBDEV_TRACE_NRECORDS=128        : Buffer 128 records in memory
        CONFIG_NSH_USBDEV_TRACE=n               : No builtin tracing from NSH
        CONFIG_NSH_ARCHINIT=y                   : Automatically start the USB monitor
-       CONFIG_SYSTEM_USBMONITOR=y              : Enable the USB monitor daemon
-       CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
-       CONFIG_SYSTEM_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
-       CONFIG_SYSTEM_USBMONITOR_INTERVAL=2     : Dump trace data every 2 seconds
+       CONFIG_USBMONITOR=y              : Enable the USB monitor daemon
+       CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
+       CONFIG_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
+       CONFIG_USBMONITOR_INTERVAL=2     : Dump trace data every 2 seconds
 
-       CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y    : Enable TRACE output
-       CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y
-       CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y
-       CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y
-       CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y
+       CONFIG_USBMONITOR_TRACEINIT=y    : Enable TRACE output
+       CONFIG_USBMONITOR_TRACECLASS=y
+       CONFIG_USBMONITOR_TRACETRANSFERS=y
+       CONFIG_USBMONITOR_TRACECONTROLLER=y
+       CONFIG_USBMONITOR_TRACEINTERRUPTS=y
 
     5. By default, this project assumes that you are *NOT* using the DFU
        bootloader.
@@ -497,3 +627,9 @@ Where  is one of the following:
       CONFIG_CDCACM_CONSOLE=y       : The CDC/ACM serial device is NOT the console
       CONFIG_PL2303=y               : The Prolifics PL2303 emulation is enabled
       CONFIG_PL2303_CONSOLE=y       : The PL2303 serial device is the console
+
+  veml6070:
+  --------
+    This is a config example to use the Vishay VEML6070 UV-A sensor. To use this
+    sensor you need to connect PB6 (I2C1 CLK) to SCL; PB7 (I2C1 SDA) to SDA of
+    sensor module. I used a GY-VEML6070 module to test this driver.
diff --git a/configs/stm32f103-minimum/audio_tone/Make.defs b/configs/stm32f103-minimum/audio_tone/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..3ff4e7eb8253f9d01dcf6ebb26ed0a6fe39b0719
--- /dev/null
+++ b/configs/stm32f103-minimum/audio_tone/Make.defs
@@ -0,0 +1,113 @@
+############################################################################
+# configs/stm32f103-minimum/audio_tone/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/stm32f103-minimum/audio_tone/defconfig b/configs/stm32f103-minimum/audio_tone/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..47bc80d08ffe4086b448223d3a67567512632e86
--- /dev/null
+++ b/configs/stm32f103-minimum/audio_tone/defconfig
@@ -0,0 +1,1227 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+CONFIG_DEFAULT_SMALL=y
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+# CONFIG_INTELHEX_BINARY is not set
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
+CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM33 is not set
+# CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+# CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+CONFIG_SERIAL_TERMIOS=y
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+CONFIG_ARCH_CHIP_STM32F103C8=y
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+# CONFIG_ARCH_CHIP_STM32F407ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+CONFIG_STM32_STM32F10XX=y
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+CONFIG_STM32_PERFORMANCELINE=y
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+CONFIG_STM32_MEDIUMDENSITY=y
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+# CONFIG_STM32_STM32F40XX is not set
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+# CONFIG_STM32_STM32F407 is not set
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+# CONFIG_STM32_HAVE_CCM is not set
+CONFIG_STM32_HAVE_USBDEV=y
+# CONFIG_STM32_HAVE_OTGFS is not set
+# CONFIG_STM32_HAVE_FSMC is not set
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+# CONFIG_STM32_HAVE_USART6 is not set
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+# CONFIG_STM32_HAVE_TIM2 is not set
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+# CONFIG_STM32_HAVE_TIM9 is not set
+# CONFIG_STM32_HAVE_TIM10 is not set
+# CONFIG_STM32_HAVE_TIM11 is not set
+# CONFIG_STM32_HAVE_TIM12 is not set
+# CONFIG_STM32_HAVE_TIM13 is not set
+# CONFIG_STM32_HAVE_TIM14 is not set
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+# CONFIG_STM32_HAVE_CAN2 is not set
+# CONFIG_STM32_HAVE_DAC1 is not set
+# CONFIG_STM32_HAVE_DAC2 is not set
+# CONFIG_STM32_HAVE_RNG is not set
+# CONFIG_STM32_HAVE_ETHMAC is not set
+CONFIG_STM32_HAVE_I2C2=y
+# CONFIG_STM32_HAVE_I2C3 is not set
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKP is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_PWR is not set
+# CONFIG_STM32_SDIO is not set
+# CONFIG_STM32_SPI1 is not set
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+# CONFIG_STM32_TIM1 is not set
+CONFIG_STM32_TIM2=y
+CONFIG_STM32_TIM3=y
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+CONFIG_STM32_USART1=y
+# CONFIG_STM32_USART2 is not set
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USB is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+CONFIG_STM32_TIM2_NO_REMAP=y
+# CONFIG_STM32_TIM2_FULL_REMAP is not set
+# CONFIG_STM32_TIM2_PARTIAL_REMAP_1 is not set
+# CONFIG_STM32_TIM2_PARTIAL_REMAP_2 is not set
+CONFIG_STM32_TIM3_NO_REMAP=y
+# CONFIG_STM32_TIM3_FULL_REMAP is not set
+# CONFIG_STM32_TIM3_PARTIAL_REMAP is not set
+# CONFIG_STM32_USART1_REMAP is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+CONFIG_STM32_JTAG_FULL_ENABLE=y
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+# CONFIG_STM32_JTAG_SW_ENABLE is not set
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+CONFIG_STM32_ONESHOT=y
+# CONFIG_STM32_FREERUN is not set
+CONFIG_STM32_ONESHOT_MAXTIMERS=1
+CONFIG_STM32_TIM2_PWM=y
+CONFIG_STM32_TIM2_MODE=0
+CONFIG_STM32_TIM2_CHANNEL=2
+CONFIG_STM32_TIM2_CHMODE=0
+# CONFIG_STM32_TIM3_PWM is not set
+# CONFIG_STM32_PWM_MULTICHAN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
+# CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+CONFIG_STM32_HAVE_RTC_COUNTER=y
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=5483
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=20480
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_STM32_TINY is not set
+CONFIG_ARCH_BOARD_STM32F103_MINIMUM=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="stm32f103-minimum"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+# CONFIG_ARCH_BUTTONS is not set
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+# CONFIG_DISABLE_OS_API is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=7
+CONFIG_START_DAY=5
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_SPINLOCK is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+CONFIG_ARCH_HAVE_PWM_PULSECOUNT=y
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+CONFIG_PWM=y
+# CONFIG_PWM_PULSECOUNT is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+CONFIG_AUDIO_DEVICES=y
+CONFIG_AUDIO_TONE=y
+# CONFIG_VS1053 is not set
+# CONFIG_AUDIO_WM8904 is not set
+# CONFIG_AUDIO_NULL is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART1_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART1 Configuration
+#
+CONFIG_USART1_RXBUFSIZE=256
+CONFIG_USART1_TXBUFSIZE=256
+CONFIG_USART1_BAUD=115200
+CONFIG_USART1_BITS=8
+CONFIG_USART1_PARITY=0
+CONFIG_USART1_2STOP=0
+# CONFIG_USART1_IFLOWCONTROL is not set
+# CONFIG_USART1_OFLOWCONTROL is not set
+# CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
+# CONFIG_FS_READABLE is not set
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+CONFIG_AUDIO=y
+# CONFIG_AUDIO_MULTI_SESSION is not set
+
+#
+# Audio Buffer Configuration
+#
+# CONFIG_AUDIO_LARGE_BUFFERS is not set
+CONFIG_AUDIO_NUM_BUFFERS=2
+CONFIG_AUDIO_BUFFER_NUMBYTES=8192
+# CONFIG_AUDIO_DRIVER_SPECIFIC_BUFFERS is not set
+
+#
+# Supported Audio Formats
+#
+# CONFIG_AUDIO_FORMAT_AC3 is not set
+# CONFIG_AUDIO_FORMAT_DTS is not set
+CONFIG_AUDIO_FORMAT_PCM=y
+CONFIG_AUDIO_FORMAT_MP3=y
+# CONFIG_AUDIO_FORMAT_MIDI is not set
+# CONFIG_AUDIO_FORMAT_WMA is not set
+# CONFIG_AUDIO_FORMAT_OGG_VORBIS is not set
+
+#
+# Exclude Specific Audio Features
+#
+# CONFIG_AUDIO_EXCLUDE_VOLUME is not set
+# CONFIG_AUDIO_EXCLUDE_BALANCE is not set
+CONFIG_AUDIO_EXCLUDE_EQUALIZER=y
+# CONFIG_AUDIO_EXCLUDE_TONE is not set
+# CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME is not set
+# CONFIG_AUDIO_EXCLUDE_STOP is not set
+# CONFIG_AUDIO_EXCLUDE_FFORWARD is not set
+CONFIG_AUDIO_EXCLUDE_REWIND=y
+# CONFIG_AUDIO_CUSTOM_DEV_PATH is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+CONFIG_SYMTAB_ORDEREDBYNAME=y
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
+# CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+# CONFIG_LIBC_LONG_LONG is not set
+# CONFIG_LIBC_SCANSET is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
+# CONFIG_LIBC_NETDB is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PWM is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=80
+CONFIG_NSH_DISABLE_SEMICOLON=y
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_NESTDEPTH=3
+CONFIG_NSH_DISABLEBG=y
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+CONFIG_NSH_DISABLE_ADDROUTE=y
+CONFIG_NSH_DISABLE_BASENAME=y
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+CONFIG_NSH_DISABLE_CMP=y
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+CONFIG_NSH_DISABLE_DF=y
+CONFIG_NSH_DISABLE_DELROUTE=y
+CONFIG_NSH_DISABLE_DIRNAME=y
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+CONFIG_NSH_DISABLE_IFCONFIG=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+CONFIG_NSH_DISABLE_LOSETUP=y
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+CONFIG_NSH_DISABLE_TIME=y
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+CONFIG_NSH_DISABLE_UNAME=y
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_NSH_FILEIOSIZE=1024
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+CONFIG_NSH_DISABLE_ITEF=y
+CONFIG_NSH_DISABLE_LOOPS=y
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_NXPLAYER is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f103-minimum/audio_tone/setenv.sh b/configs/stm32f103-minimum/audio_tone/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..665d744a6ed8f1fa7e8c36048ff06032e0701795
--- /dev/null
+++ b/configs/stm32f103-minimum/audio_tone/setenv.sh
@@ -0,0 +1,100 @@
+#!/bin/bash
+# configs//stm32f103-minimum/audio_tone/setenv.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/stm32f103-minimum/buttons/Make.defs b/configs/stm32f103-minimum/buttons/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..d7974b005f7218d4df16d38374fb60a2c3d823d3
--- /dev/null
+++ b/configs/stm32f103-minimum/buttons/Make.defs
@@ -0,0 +1,113 @@
+############################################################################
+# configs/stm32f103-minimum/userled/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/stm32f103-minimum/buttons/defconfig b/configs/stm32f103-minimum/buttons/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..dbdd40f7ba91f8cb68238444bd880e211b12f0b5
--- /dev/null
+++ b/configs/stm32f103-minimum/buttons/defconfig
@@ -0,0 +1,1152 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+CONFIG_DEFAULT_SMALL=y
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+# CONFIG_INTELHEX_BINARY is not set
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+# CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+CONFIG_SERIAL_TERMIOS=y
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+CONFIG_ARCH_CHIP_STM32F103C8=y
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+# CONFIG_ARCH_CHIP_STM32F407ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+CONFIG_STM32_STM32F10XX=y
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+CONFIG_STM32_PERFORMANCELINE=y
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+CONFIG_STM32_MEDIUMDENSITY=y
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+# CONFIG_STM32_STM32F40XX is not set
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+# CONFIG_STM32_STM32F407 is not set
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+# CONFIG_STM32_HAVE_CCM is not set
+CONFIG_STM32_HAVE_USBDEV=y
+# CONFIG_STM32_HAVE_OTGFS is not set
+# CONFIG_STM32_HAVE_FSMC is not set
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+# CONFIG_STM32_HAVE_USART6 is not set
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+# CONFIG_STM32_HAVE_TIM2 is not set
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+# CONFIG_STM32_HAVE_TIM9 is not set
+# CONFIG_STM32_HAVE_TIM10 is not set
+# CONFIG_STM32_HAVE_TIM11 is not set
+# CONFIG_STM32_HAVE_TIM12 is not set
+# CONFIG_STM32_HAVE_TIM13 is not set
+# CONFIG_STM32_HAVE_TIM14 is not set
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+# CONFIG_STM32_HAVE_CAN2 is not set
+# CONFIG_STM32_HAVE_DAC1 is not set
+# CONFIG_STM32_HAVE_DAC2 is not set
+# CONFIG_STM32_HAVE_RNG is not set
+# CONFIG_STM32_HAVE_ETHMAC is not set
+CONFIG_STM32_HAVE_I2C2=y
+# CONFIG_STM32_HAVE_I2C3 is not set
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKP is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_PWR is not set
+# CONFIG_STM32_SDIO is not set
+# CONFIG_STM32_SPI1 is not set
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+CONFIG_STM32_USART1=y
+# CONFIG_STM32_USART2 is not set
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USB is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_USART1_REMAP is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+# CONFIG_STM32_JTAG_FULL_ENABLE is not set
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+CONFIG_STM32_JTAG_SW_ENABLE=y
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
+# CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+CONFIG_STM32_HAVE_RTC_COUNTER=y
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=5483
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=20480
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_STM32_TINY is not set
+CONFIG_ARCH_BOARD_STM32F103_MINIMUM=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="stm32f103-minimum"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+# CONFIG_ARCH_LEDS is not set
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+CONFIG_ARCH_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+# CONFIG_DISABLE_OS_API is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=7
+CONFIG_START_DAY=5
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+CONFIG_BOARD_INITIALIZE=y
+# CONFIG_BOARD_INITTHREAD is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+CONFIG_INPUT=y
+# CONFIG_MOUSE is not set
+# CONFIG_INPUT_MAX11802 is not set
+# CONFIG_INPUT_TSC2007 is not set
+# CONFIG_INPUT_ADS7843E is not set
+# CONFIG_INPUT_MXT is not set
+# CONFIG_INPUT_STMPE811 is not set
+CONFIG_BUTTONS=y
+CONFIG_BUTTONS_LOWER=y
+CONFIG_BUTTONS_NPOLLWAITERS=2
+# CONFIG_DJOYSTICK is not set
+# CONFIG_AJOYSTICK is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART1_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART1 Configuration
+#
+CONFIG_USART1_RXBUFSIZE=256
+CONFIG_USART1_TXBUFSIZE=256
+CONFIG_USART1_BAUD=115200
+CONFIG_USART1_BITS=8
+CONFIG_USART1_PARITY=0
+CONFIG_USART1_2STOP=0
+# CONFIG_USART1_IFLOWCONTROL is not set
+# CONFIG_USART1_OFLOWCONTROL is not set
+# CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
+# CONFIG_FS_READABLE is not set
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+CONFIG_SYMTAB_ORDEREDBYNAME=y
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+# CONFIG_LIBC_LONG_LONG is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+CONFIG_EXAMPLES_BUTTONS=y
+CONFIG_EXAMPLES_BUTTONS_PRIORITY=100
+CONFIG_EXAMPLES_BUTTONS_STACKSIZE=2048
+CONFIG_EXAMPLES_BUTTONS_DEVPATH="/dev/buttons"
+# CONFIG_EXAMPLES_BUTTONS_NAMES is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_LEDS is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=80
+CONFIG_NSH_DISABLE_SEMICOLON=y
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_NESTDEPTH=3
+CONFIG_NSH_DISABLEBG=y
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+CONFIG_NSH_DISABLE_ADDROUTE=y
+CONFIG_NSH_DISABLE_BASENAME=y
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+CONFIG_NSH_DISABLE_CMP=y
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+CONFIG_NSH_DISABLE_DF=y
+CONFIG_NSH_DISABLE_DELROUTE=y
+CONFIG_NSH_DISABLE_DIRNAME=y
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+CONFIG_NSH_DISABLE_IFCONFIG=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+CONFIG_NSH_DISABLE_LOSETUP=y
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+CONFIG_NSH_DISABLE_TIME=y
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+CONFIG_NSH_DISABLE_UNAME=y
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CODECS_BUFSIZE=128
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_NSH_FILEIOSIZE=1024
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+CONFIG_NSH_DISABLE_ITEF=y
+CONFIG_NSH_DISABLE_LOOPS=y
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f103-minimum/buttons/setenv.sh b/configs/stm32f103-minimum/buttons/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..73dfab5a4d0b4ffc9b5d6cc3c7dd42df6131bd7e
--- /dev/null
+++ b/configs/stm32f103-minimum/buttons/setenv.sh
@@ -0,0 +1,100 @@
+#!/bin/bash
+# configs//stm32f103-minimum/nsh/setenv.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/stm32f103-minimum/include/board.h b/configs/stm32f103-minimum/include/board.h
index 8c5385e45b4a33f563877846760e61db01d961dd..321d5b40fbae1ceb77f9c084f95b576879d8c643 100644
--- a/configs/stm32f103-minimum/include/board.h
+++ b/configs/stm32f103-minimum/include/board.h
@@ -43,11 +43,14 @@
 
 #include 
 #ifndef __ASSEMBLY__
-# include 
+#  include 
+#endif
+
+#ifdef __KERNEL__
+#  include "stm32_rcc.h"
+#  include "stm32_sdio.h"
+#  include "stm32.h"
 #endif
-#include "stm32_rcc.h"
-#include "stm32_sdio.h"
-#include "stm32.h"
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -93,14 +96,14 @@
 #define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd2
 #define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
 
-/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */
+/* APB1 timers 2-7 will be twice PCLK1 */
 
 #define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM5_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM6_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM7_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 
 /* USB divider -- Divide PLL clock by 1.5 */
 
@@ -110,8 +113,14 @@
  * otherwise frequency is 2xAPBx.
  * Note: TIM1,8 are on APB2, others on APB1 */
 
-#define STM32_TIM18_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_TIM27_FREQUENCY   STM32_HCLK_FREQUENCY
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    STM32_PCLK1_FREQUENCY
+#define BOARD_TIM3_FREQUENCY    STM32_PCLK1_FREQUENCY
+#define BOARD_TIM4_FREQUENCY    STM32_PCLK1_FREQUENCY
+#define BOARD_TIM5_FREQUENCY    STM32_PCLK1_FREQUENCY
+#define BOARD_TIM6_FREQUENCY    STM32_PCLK1_FREQUENCY
+#define BOARD_TIM7_FREQUENCY    STM32_PCLK1_FREQUENCY
+#define BOARD_TIM8_FREQUENCY    STM32_HCLK_FREQUENCY
 
 /* SDIO dividers.  Note that slower clocking is required when DMA is disabled
  * in order to avoid RX overrun/TX underrun errors due to delayed responses
@@ -143,8 +152,21 @@
 #  define SDIO_SDXFR_CLKDIV     (3 << SDIO_CLKCR_CLKDIV_SHIFT)
 #endif
 
+/* BUTTON definitions ***************************************************************/
+
+#define NUM_BUTTONS       2
+
+#define BUTTON_USER1      0
+#define BUTTON_USER2      1
+#define BUTTON_USER1_BIT  (1 << BUTTON_USER1)
+#define BUTTON_USER2_BIT  (1 << BUTTON_USER2)
+
 /* LED definitions ******************************************************************/
 
+/* Define how many LEDs this board has (needed by userleds) */
+
+#define BOARD_NLEDS       1
+
 /* The board has only one controllable LED */
 
 #define LED_STARTED       0  /* No LEDs */
@@ -156,6 +178,28 @@
 #define LED_ASSERTION     6  /* LED1 + LED2 */
 #define LED_PANIC         7  /* LED1 / LED2 blinking */
 
+/* PWM
+ *
+ * The STM32F103-Minimum has no real on-board PWM devices, but the board can
+ * be configured to output a pulse train using TIM3 CH3 on PB0.
+ *
+ * Note: we don't need redefine GPIO_TIM3_CH3OUT because PB0 is not remap pin.
+ */
+
+/* RGB LED
+ *
+ * R = TIM1 CH1 on PA8 | G = TIM2 CH2 on PA1 | B = TIM4 CH4 on PB9
+ *
+ * Note: Pin configs: GPIO_TIM1_CH1OUT ; GPIO_TIM2_CH2OUT ; GPIO_TIM4_CH4OUT
+ */
+
+#define RGBLED_RPWMTIMER   1
+#define RGBLED_RPWMCHANNEL 1
+#define RGBLED_GPWMTIMER   2
+#define RGBLED_GPWMCHANNEL 2
+#define RGBLED_BPWMTIMER   4
+#define RGBLED_BPWMCHANNEL 4
+
 /************************************************************************************
  * Public Data
  ************************************************************************************/
diff --git a/configs/stm32f103-minimum/jlx12864g/Make.defs b/configs/stm32f103-minimum/jlx12864g/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..06fcf0d63f1ea7251fab593ea60452dfd467cf67
--- /dev/null
+++ b/configs/stm32f103-minimum/jlx12864g/Make.defs
@@ -0,0 +1,113 @@
+############################################################################
+# configs/stm32f103-minimum/jlx12864g/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/stm32f103-minimum/jlx12864g/defconfig b/configs/stm32f103-minimum/jlx12864g/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..88c999987d959ee42eaf27203042fa9bdb302ab4
--- /dev/null
+++ b/configs/stm32f103-minimum/jlx12864g/defconfig
@@ -0,0 +1,1372 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+CONFIG_DEFAULT_SMALL=y
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+# CONFIG_INTELHEX_BINARY is not set
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+CONFIG_DEBUG_FEATURES=y
+
+#
+# Debug SYSLOG Output Controls
+#
+CONFIG_DEBUG_ERROR=y
+CONFIG_DEBUG_WARN=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_ASSERTIONS is not set
+
+#
+# Subsystem Debug Options
+#
+# CONFIG_DEBUG_BINFMT is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_GRAPHICS is not set
+# CONFIG_DEBUG_LIB is not set
+# CONFIG_DEBUG_MM is not set
+# CONFIG_DEBUG_SCHED is not set
+
+#
+# OS Function Debug Options
+#
+# CONFIG_DEBUG_IRQ is not set
+
+#
+# Driver Debug Options
+#
+CONFIG_DEBUG_LCD=y
+CONFIG_DEBUG_LCD_ERROR=y
+CONFIG_DEBUG_LCD_WARN=y
+CONFIG_DEBUG_LCD_INFO=y
+# CONFIG_DEBUG_LEDS is not set
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_SPI is not set
+# CONFIG_DEBUG_TIMER is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+# CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+# CONFIG_DEBUG_HARDFAULT is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+CONFIG_SERIAL_TERMIOS=y
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+CONFIG_ARCH_CHIP_STM32F103C8=y
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+# CONFIG_ARCH_CHIP_STM32F407ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+CONFIG_STM32_STM32F10XX=y
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+CONFIG_STM32_PERFORMANCELINE=y
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+CONFIG_STM32_MEDIUMDENSITY=y
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+# CONFIG_STM32_STM32F40XX is not set
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+# CONFIG_STM32_STM32F407 is not set
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+# CONFIG_STM32_HAVE_CCM is not set
+CONFIG_STM32_HAVE_USBDEV=y
+# CONFIG_STM32_HAVE_OTGFS is not set
+# CONFIG_STM32_HAVE_FSMC is not set
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+# CONFIG_STM32_HAVE_USART6 is not set
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+# CONFIG_STM32_HAVE_TIM2 is not set
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+# CONFIG_STM32_HAVE_TIM9 is not set
+# CONFIG_STM32_HAVE_TIM10 is not set
+# CONFIG_STM32_HAVE_TIM11 is not set
+# CONFIG_STM32_HAVE_TIM12 is not set
+# CONFIG_STM32_HAVE_TIM13 is not set
+# CONFIG_STM32_HAVE_TIM14 is not set
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+# CONFIG_STM32_HAVE_CAN2 is not set
+# CONFIG_STM32_HAVE_DAC1 is not set
+# CONFIG_STM32_HAVE_DAC2 is not set
+# CONFIG_STM32_HAVE_RNG is not set
+# CONFIG_STM32_HAVE_ETHMAC is not set
+CONFIG_STM32_HAVE_I2C2=y
+# CONFIG_STM32_HAVE_I2C3 is not set
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKP is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_PWR is not set
+# CONFIG_STM32_SDIO is not set
+CONFIG_STM32_SPI1=y
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+CONFIG_STM32_USART1=y
+# CONFIG_STM32_USART2 is not set
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USB is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+CONFIG_STM32_SPI=y
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_SPI1_REMAP is not set
+# CONFIG_STM32_USART1_REMAP is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+CONFIG_STM32_JTAG_FULL_ENABLE=y
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+# CONFIG_STM32_JTAG_SW_ENABLE is not set
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
+# CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+
+#
+# SPI Configuration
+#
+# CONFIG_STM32_SPI_INTERRUPTS is not set
+# CONFIG_STM32_SPI_DMA is not set
+CONFIG_STM32_HAVE_RTC_COUNTER=y
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=5483
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=20480
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_STM32_TINY is not set
+CONFIG_ARCH_BOARD_STM32F103_MINIMUM=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="stm32f103-minimum"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+# CONFIG_ARCH_BUTTONS is not set
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+# CONFIG_DISABLE_OS_API is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=7
+CONFIG_START_DAY=5
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+CONFIG_SPI_CMDDATA=y
+# CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+CONFIG_LCD=y
+
+#
+# Common Graphic LCD Settings
+#
+# CONFIG_LCD_CONSOLE is not set
+# CONFIG_LCD_NOGETRUN is not set
+CONFIG_LCD_MAXCONTRAST=63
+CONFIG_LCD_MAXPOWER=1
+
+#
+# Graphic LCD Devices
+#
+# CONFIG_LCD_P14201 is not set
+# CONFIG_LCD_NOKIA6100 is not set
+# CONFIG_LCD_MIO283QT2 is not set
+# CONFIG_LCD_MIO283QT9A is not set
+# CONFIG_LCD_UG9664HSWAG01 is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
+# CONFIG_LCD_UG2864HSWEG01 is not set
+# CONFIG_LCD_UG2832HSWEG04 is not set
+# CONFIG_LCD_SSD1351 is not set
+# CONFIG_LCD_ST7565 is not set
+CONFIG_LCD_ST7567=y
+CONFIG_ST7567_SPIMODE=0
+CONFIG_ST7567_FREQUENCY=3500000
+CONFIG_ST7567_NINTERFACES=1
+# CONFIG_ST7567_POWER is not set
+CONFIG_ST7567_XRES=128
+CONFIG_ST7567_YRES=64
+# CONFIG_LCD_UG2864AMBAG01 is not set
+# CONFIG_LCD_SSD1289 is not set
+# CONFIG_LCD_SHARP_MEMLCD is not set
+CONFIG_LCD_LANDSCAPE=y
+# CONFIG_LCD_PORTRAIT is not set
+# CONFIG_LCD_RPORTRAIT is not set
+# CONFIG_LCD_RLANDSCAPE is not set
+# CONFIG_LCD_ILI9341 is not set
+# CONFIG_LCD_RA8875 is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART1_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART1 Configuration
+#
+CONFIG_USART1_RXBUFSIZE=256
+CONFIG_USART1_TXBUFSIZE=256
+CONFIG_USART1_BAUD=115200
+CONFIG_USART1_BITS=8
+CONFIG_USART1_PARITY=0
+CONFIG_USART1_2STOP=0
+# CONFIG_USART1_IFLOWCONTROL is not set
+# CONFIG_USART1_OFLOWCONTROL is not set
+# CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
+# CONFIG_FS_READABLE is not set
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+CONFIG_NX=y
+CONFIG_NX_LCDDRIVER=y
+CONFIG_NX_NPLANES=1
+CONFIG_NX_BGCOLOR=0x0
+CONFIG_NX_WRITEONLY=y
+# CONFIG_NX_UPDATE is not set
+
+#
+# Supported Pixel Depths
+#
+# CONFIG_NX_DISABLE_1BPP is not set
+CONFIG_NX_DISABLE_2BPP=y
+CONFIG_NX_DISABLE_4BPP=y
+CONFIG_NX_DISABLE_8BPP=y
+CONFIG_NX_DISABLE_16BPP=y
+CONFIG_NX_DISABLE_24BPP=y
+CONFIG_NX_DISABLE_32BPP=y
+CONFIG_NX_PACKEDMSFIRST=y
+
+#
+# Input Devices
+#
+# CONFIG_NX_XYINPUT is not set
+CONFIG_NX_XYINPUT_NONE=y
+# CONFIG_NX_XYINPUT_MOUSE is not set
+# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set
+# CONFIG_NX_KBD is not set
+
+#
+# Framed Window Borders
+#
+CONFIG_NXTK_BORDERWIDTH=1
+CONFIG_NXTK_DEFAULT_BORDERCOLORS=y
+# CONFIG_NXTK_AUTORAISE is not set
+
+#
+# Font Selections
+#
+CONFIG_NXFONTS_CHARBITS=7
+CONFIG_NXFONT_MONO5X8=y
+# CONFIG_NXFONT_SANS17X22 is not set
+# CONFIG_NXFONT_SANS20X26 is not set
+# CONFIG_NXFONT_SANS23X27 is not set
+# CONFIG_NXFONT_SANS22X29 is not set
+# CONFIG_NXFONT_SANS28X37 is not set
+# CONFIG_NXFONT_SANS39X48 is not set
+# CONFIG_NXFONT_SANS17X23B is not set
+# CONFIG_NXFONT_SANS20X27B is not set
+# CONFIG_NXFONT_SANS22X29B is not set
+# CONFIG_NXFONT_SANS28X37B is not set
+# CONFIG_NXFONT_SANS40X49B is not set
+# CONFIG_NXFONT_SERIF22X29 is not set
+# CONFIG_NXFONT_SERIF29X37 is not set
+# CONFIG_NXFONT_SERIF38X48 is not set
+# CONFIG_NXFONT_SERIF22X28B is not set
+# CONFIG_NXFONT_SERIF27X38B is not set
+# CONFIG_NXFONT_SERIF38X49B is not set
+# CONFIG_NXFONT_PIXEL_UNICODE is not set
+# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXTERM is not set
+
+#
+# NX Multi-user only options
+#
+# CONFIG_NX_MULTIUSER is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+CONFIG_SYMTAB_ORDEREDBYNAME=y
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+# CONFIG_LIBC_LONG_LONG is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_LCDRW is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+CONFIG_EXAMPLES_NXHELLO=y
+CONFIG_EXAMPLES_NXHELLO_VPLANE=0
+CONFIG_EXAMPLES_NXHELLO_DEVNO=0
+CONFIG_EXAMPLES_NXHELLO_BPP=1
+
+#
+# Example Color Configuration
+#
+CONFIG_EXAMPLES_NXHELLO_DEFAULT_COLORS=y
+
+#
+# Example Font Configuration
+#
+CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y
+# CONFIG_EXAMPLES_NXHELLO_EXTERNINIT is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+CONFIG_EXAMPLES_NXLINES=y
+CONFIG_EXAMPLES_NXLINES_VPLANE=0
+CONFIG_EXAMPLES_NXLINES_DEVNO=0
+# CONFIG_EXAMPLES_NXLINES_DEFAULT_COLORS is not set
+CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x00
+CONFIG_EXAMPLES_NXLINES_LINEWIDTH=2
+CONFIG_EXAMPLES_NXLINES_LINECOLOR=0x00
+CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=2
+CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0x00
+CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0x00
+CONFIG_EXAMPLES_NXLINES_BPP=1
+# CONFIG_EXAMPLES_NXLINES_EXTERNINIT is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+CONFIG_EXAMPLES_NXTEXT=y
+
+#
+# Basic Configuration of the example
+#
+CONFIG_EXAMPLES_NXTEXT_VPLANE=0
+CONFIG_EXAMPLES_NXTEXT_DEVNO=0
+CONFIG_EXAMPLES_NXTEXT_BPP=1
+CONFIG_EXAMPLES_NXTEXT_BMCACHE=128
+CONFIG_EXAMPLES_NXTEXT_GLCACHE=16
+
+#
+# Example Color Configuration
+#
+CONFIG_EXAMPLES_NXTEXT_DEFAULT_COLORS=y
+
+#
+# Example Font Configuration
+#
+CONFIG_EXAMPLES_NXTEXT_DEFAULT_FONT=y
+# CONFIG_EXAMPLES_NXTEXT_EXTERNINIT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=80
+CONFIG_NSH_DISABLE_SEMICOLON=y
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_NESTDEPTH=3
+CONFIG_NSH_DISABLEBG=y
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+CONFIG_NSH_DISABLE_ADDROUTE=y
+CONFIG_NSH_DISABLE_BASENAME=y
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+CONFIG_NSH_DISABLE_CMP=y
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+CONFIG_NSH_DISABLE_DF=y
+CONFIG_NSH_DISABLE_DELROUTE=y
+CONFIG_NSH_DISABLE_DIRNAME=y
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+CONFIG_NSH_DISABLE_IFCONFIG=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+CONFIG_NSH_DISABLE_LOSETUP=y
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+CONFIG_NSH_DISABLE_TIME=y
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+CONFIG_NSH_DISABLE_UNAME=y
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CODECS_BUFSIZE=128
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_NSH_FILEIOSIZE=1024
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+CONFIG_NSH_DISABLE_ITEF=y
+CONFIG_NSH_DISABLE_LOOPS=y
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f103-minimum/jlx12864g/setenv.sh b/configs/stm32f103-minimum/jlx12864g/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..4a9a11eff24ff2ba1bb5021f8603a4c358d87d5e
--- /dev/null
+++ b/configs/stm32f103-minimum/jlx12864g/setenv.sh
@@ -0,0 +1,100 @@
+#!/bin/bash
+# configs//stm32f103-minimum/jlx12864g/setenv.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/hymini-stm32v/buttons/Make.defs b/configs/stm32f103-minimum/nrf24/Make.defs
similarity index 94%
rename from configs/hymini-stm32v/buttons/Make.defs
rename to configs/stm32f103-minimum/nrf24/Make.defs
index 47431700b7d7e2e6990cb734526368fcaae684bb..214ad61a92565590b30ce9ab7ff0824b16b03652 100644
--- a/configs/hymini-stm32v/buttons/Make.defs
+++ b/configs/stm32f103-minimum/nrf24/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
-# configs/hymini-stm32v/buttons/Make.defs
+# configs/stm32f103-minimum/nrf24/Make.defs
 #
-#   Copyright (C) 2011, 2012 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -37,11 +37,7 @@ include ${TOPDIR}/.config
 include ${TOPDIR}/tools/Config.mk
 include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
 
-ifeq ($(CONFIG_STM32_DFU),y)
-  LDSCRIPT = ld.script.dfu
-else
-  LDSCRIPT = ld.script
-endif
+LDSCRIPT = ld.script
 
 ifeq ($(WINTOOL),y)
   # Windows-native toolchains
@@ -80,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f103-minimum/nrf24/defconfig b/configs/stm32f103-minimum/nrf24/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..7b16b504c9ce8d5fd4c17bc45ab6ed631e92aeb6
--- /dev/null
+++ b/configs/stm32f103-minimum/nrf24/defconfig
@@ -0,0 +1,1211 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+CONFIG_DEFAULT_SMALL=y
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+# CONFIG_INTELHEX_BINARY is not set
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+CONFIG_DEBUG_FEATURES=y
+
+#
+# Debug SYSLOG Output Controls
+#
+CONFIG_DEBUG_ERROR=y
+CONFIG_DEBUG_WARN=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_ASSERTIONS is not set
+
+#
+# Subsystem Debug Options
+#
+# CONFIG_DEBUG_BINFMT is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_GRAPHICS is not set
+# CONFIG_DEBUG_LIB is not set
+# CONFIG_DEBUG_MM is not set
+# CONFIG_DEBUG_SCHED is not set
+
+#
+# OS Function Debug Options
+#
+# CONFIG_DEBUG_IRQ is not set
+
+#
+# Driver Debug Options
+#
+# CONFIG_DEBUG_LEDS is not set
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_SPI is not set
+# CONFIG_DEBUG_TIMER is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+# CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+# CONFIG_DEBUG_HARDFAULT is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+CONFIG_SERIAL_TERMIOS=y
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+CONFIG_ARCH_CHIP_STM32F103C8=y
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+# CONFIG_ARCH_CHIP_STM32F407ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+CONFIG_STM32_STM32F10XX=y
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+CONFIG_STM32_PERFORMANCELINE=y
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+CONFIG_STM32_MEDIUMDENSITY=y
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+# CONFIG_STM32_STM32F40XX is not set
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+# CONFIG_STM32_STM32F407 is not set
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+# CONFIG_STM32_HAVE_CCM is not set
+CONFIG_STM32_HAVE_USBDEV=y
+# CONFIG_STM32_HAVE_OTGFS is not set
+# CONFIG_STM32_HAVE_FSMC is not set
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+# CONFIG_STM32_HAVE_USART6 is not set
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+# CONFIG_STM32_HAVE_TIM2 is not set
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+# CONFIG_STM32_HAVE_TIM9 is not set
+# CONFIG_STM32_HAVE_TIM10 is not set
+# CONFIG_STM32_HAVE_TIM11 is not set
+# CONFIG_STM32_HAVE_TIM12 is not set
+# CONFIG_STM32_HAVE_TIM13 is not set
+# CONFIG_STM32_HAVE_TIM14 is not set
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+# CONFIG_STM32_HAVE_CAN2 is not set
+# CONFIG_STM32_HAVE_DAC1 is not set
+# CONFIG_STM32_HAVE_DAC2 is not set
+# CONFIG_STM32_HAVE_RNG is not set
+# CONFIG_STM32_HAVE_ETHMAC is not set
+CONFIG_STM32_HAVE_I2C2=y
+# CONFIG_STM32_HAVE_I2C3 is not set
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKP is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_PWR is not set
+# CONFIG_STM32_SDIO is not set
+CONFIG_STM32_SPI1=y
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+CONFIG_STM32_USART1=y
+# CONFIG_STM32_USART2 is not set
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USB is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+CONFIG_STM32_SPI=y
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_SPI1_REMAP is not set
+# CONFIG_STM32_USART1_REMAP is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+CONFIG_STM32_JTAG_FULL_ENABLE=y
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+# CONFIG_STM32_JTAG_SW_ENABLE is not set
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
+# CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+
+#
+# SPI Configuration
+#
+# CONFIG_STM32_SPI_INTERRUPTS is not set
+# CONFIG_STM32_SPI_DMA is not set
+CONFIG_STM32_HAVE_RTC_COUNTER=y
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=5483
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=20480
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_STM32_TINY is not set
+CONFIG_ARCH_BOARD_STM32F103_MINIMUM=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="stm32f103-minimum"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+# CONFIG_ARCH_BUTTONS is not set
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+# CONFIG_DISABLE_OS_API is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=7
+CONFIG_START_DAY=5
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_SPINLOCK is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART1_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART1 Configuration
+#
+CONFIG_USART1_RXBUFSIZE=256
+CONFIG_USART1_TXBUFSIZE=256
+CONFIG_USART1_BAUD=115200
+CONFIG_USART1_BITS=8
+CONFIG_USART1_PARITY=0
+CONFIG_USART1_2STOP=0
+# CONFIG_USART1_IFLOWCONTROL is not set
+# CONFIG_USART1_OFLOWCONTROL is not set
+# CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+CONFIG_DRIVERS_WIRELESS=y
+# CONFIG_WL_CC1101 is not set
+# CONFIG_WL_CC3000 is not set
+CONFIG_WL_NRF24L01=y
+CONFIG_WL_NRF24L01_DFLT_ADDR_WIDTH=5
+CONFIG_WL_NRF24L01_CHECK_PARAMS=y
+CONFIG_WL_NRF24L01_RXSUPPORT=y
+CONFIG_WL_NRF24L01_RXFIFO_LEN=128
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
+# CONFIG_FS_READABLE is not set
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+CONFIG_SYMTAB_ORDEREDBYNAME=y
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+# CONFIG_LIBC_LONG_LONG is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
+# CONFIG_LIBC_NETDB is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+CONFIG_EXAMPLES_NRF24L01TERM=y
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=80
+CONFIG_NSH_DISABLE_SEMICOLON=y
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_NESTDEPTH=3
+CONFIG_NSH_DISABLEBG=y
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+CONFIG_NSH_DISABLE_ADDROUTE=y
+CONFIG_NSH_DISABLE_BASENAME=y
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+CONFIG_NSH_DISABLE_CMP=y
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+CONFIG_NSH_DISABLE_DF=y
+CONFIG_NSH_DISABLE_DELROUTE=y
+CONFIG_NSH_DISABLE_DIRNAME=y
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+CONFIG_NSH_DISABLE_IFCONFIG=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+CONFIG_NSH_DISABLE_LOSETUP=y
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+CONFIG_NSH_DISABLE_TIME=y
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+CONFIG_NSH_DISABLE_UNAME=y
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_NSH_FILEIOSIZE=1024
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+CONFIG_NSH_DISABLE_ITEF=y
+CONFIG_NSH_DISABLE_LOOPS=y
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f103-minimum/nrf24/setenv.sh b/configs/stm32f103-minimum/nrf24/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..1cba74e39dc6a5faecaa225acd539d4384e0b3e9
--- /dev/null
+++ b/configs/stm32f103-minimum/nrf24/setenv.sh
@@ -0,0 +1,100 @@
+#!/bin/bash
+# configs/stm32f103-minimum/nrf24/setenv.sh
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/stm32f103-minimum/nsh/Make.defs b/configs/stm32f103-minimum/nsh/Make.defs
index b77741df2552a0967fa976703c5a841822f276b4..8d3d47830537e30dac2dbbe27cf1085bfea495df 100644
--- a/configs/stm32f103-minimum/nsh/Make.defs
+++ b/configs/stm32f103-minimum/nsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f103-minimum/nsh/defconfig b/configs/stm32f103-minimum/nsh/defconfig
index c489f2182c924813b11cc7f57c045af3af18e410..4c1c4522feadb4c53953c386114b09eaae9b4f66 100644
--- a/configs/stm32f103-minimum/nsh/defconfig
+++ b/configs/stm32f103-minimum/nsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +199,7 @@ CONFIG_ARCH_CHIP_STM32F103C8=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -405,6 +406,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -416,9 +423,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -513,17 +528,15 @@ CONFIG_ARCH_BOARD="stm32f103-minimum"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -535,9 +548,12 @@ CONFIG_LIB_BOARDCTL=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=7
@@ -635,6 +651,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -650,6 +667,7 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
@@ -663,8 +681,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -672,6 +700,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -680,9 +709,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -729,19 +759,25 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -779,12 +815,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -849,7 +879,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -857,8 +886,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -884,16 +915,15 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -902,35 +932,34 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -952,8 +981,8 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1019,7 +1048,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1041,6 +1069,7 @@ CONFIG_NSH_DISABLE_UNAME=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1077,12 +1106,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1090,6 +1119,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f103-minimum/pwm/Make.defs b/configs/stm32f103-minimum/pwm/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..8d3d47830537e30dac2dbbe27cf1085bfea495df
--- /dev/null
+++ b/configs/stm32f103-minimum/pwm/Make.defs
@@ -0,0 +1,113 @@
+############################################################################
+# configs/stm32f103-minimum/nsh/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/stm32f103-minimum/pwm/defconfig b/configs/stm32f103-minimum/pwm/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..dbfd2287598730ceae38da861628f264ad77eb2c
--- /dev/null
+++ b/configs/stm32f103-minimum/pwm/defconfig
@@ -0,0 +1,1151 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+CONFIG_DEFAULT_SMALL=y
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+# CONFIG_INTELHEX_BINARY is not set
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+# CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+CONFIG_SERIAL_TERMIOS=y
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+CONFIG_ARCH_CHIP_STM32F103C8=y
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+# CONFIG_ARCH_CHIP_STM32F407ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+CONFIG_STM32_STM32F10XX=y
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+CONFIG_STM32_PERFORMANCELINE=y
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+CONFIG_STM32_MEDIUMDENSITY=y
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+# CONFIG_STM32_STM32F40XX is not set
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+# CONFIG_STM32_STM32F407 is not set
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+# CONFIG_STM32_HAVE_CCM is not set
+CONFIG_STM32_HAVE_USBDEV=y
+# CONFIG_STM32_HAVE_OTGFS is not set
+# CONFIG_STM32_HAVE_FSMC is not set
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+# CONFIG_STM32_HAVE_USART6 is not set
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+# CONFIG_STM32_HAVE_TIM2 is not set
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+# CONFIG_STM32_HAVE_TIM9 is not set
+# CONFIG_STM32_HAVE_TIM10 is not set
+# CONFIG_STM32_HAVE_TIM11 is not set
+# CONFIG_STM32_HAVE_TIM12 is not set
+# CONFIG_STM32_HAVE_TIM13 is not set
+# CONFIG_STM32_HAVE_TIM14 is not set
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+# CONFIG_STM32_HAVE_CAN2 is not set
+# CONFIG_STM32_HAVE_DAC1 is not set
+# CONFIG_STM32_HAVE_DAC2 is not set
+# CONFIG_STM32_HAVE_RNG is not set
+# CONFIG_STM32_HAVE_ETHMAC is not set
+CONFIG_STM32_HAVE_I2C2=y
+# CONFIG_STM32_HAVE_I2C3 is not set
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKP is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_PWR is not set
+# CONFIG_STM32_SDIO is not set
+# CONFIG_STM32_SPI1 is not set
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+CONFIG_STM32_TIM3=y
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+CONFIG_STM32_USART1=y
+# CONFIG_STM32_USART2 is not set
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USB is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+CONFIG_STM32_TIM3_NO_REMAP=y
+# CONFIG_STM32_TIM3_FULL_REMAP is not set
+# CONFIG_STM32_TIM3_PARTIAL_REMAP is not set
+# CONFIG_STM32_USART1_REMAP is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+CONFIG_STM32_JTAG_FULL_ENABLE=y
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+# CONFIG_STM32_JTAG_SW_ENABLE is not set
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+CONFIG_STM32_TIM3_PWM=y
+CONFIG_STM32_TIM3_MODE=0
+CONFIG_STM32_TIM3_CHANNEL=3
+CONFIG_STM32_TIM3_CHMODE=0
+# CONFIG_STM32_PWM_MULTICHAN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
+# CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+CONFIG_STM32_HAVE_RTC_COUNTER=y
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=5483
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=20480
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_STM32_TINY is not set
+CONFIG_ARCH_BOARD_STM32F103_MINIMUM=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="stm32f103-minimum"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+# CONFIG_ARCH_BUTTONS is not set
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+# CONFIG_DISABLE_OS_API is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=7
+CONFIG_START_DAY=5
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+CONFIG_ARCH_HAVE_PWM_PULSECOUNT=y
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+CONFIG_PWM=y
+# CONFIG_PWM_PULSECOUNT is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART1_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART1 Configuration
+#
+CONFIG_USART1_RXBUFSIZE=256
+CONFIG_USART1_TXBUFSIZE=256
+CONFIG_USART1_BAUD=115200
+CONFIG_USART1_BITS=8
+CONFIG_USART1_PARITY=0
+CONFIG_USART1_2STOP=0
+# CONFIG_USART1_IFLOWCONTROL is not set
+# CONFIG_USART1_OFLOWCONTROL is not set
+# CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
+# CONFIG_FS_READABLE is not set
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+CONFIG_SYMTAB_ORDEREDBYNAME=y
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+# CONFIG_LIBC_LONG_LONG is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+CONFIG_EXAMPLES_PWM=y
+CONFIG_EXAMPLES_PWM_DEVPATH="/dev/pwm0"
+CONFIG_EXAMPLES_PWM_FREQUENCY=100
+CONFIG_EXAMPLES_PWM_DURATION=5
+CONFIG_EXAMPLES_PWM_DUTYPCT=50
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=80
+CONFIG_NSH_DISABLE_SEMICOLON=y
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_NESTDEPTH=3
+CONFIG_NSH_DISABLEBG=y
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+CONFIG_NSH_DISABLE_ADDROUTE=y
+CONFIG_NSH_DISABLE_BASENAME=y
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+CONFIG_NSH_DISABLE_CMP=y
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+CONFIG_NSH_DISABLE_DF=y
+CONFIG_NSH_DISABLE_DELROUTE=y
+CONFIG_NSH_DISABLE_DIRNAME=y
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+CONFIG_NSH_DISABLE_IFCONFIG=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+CONFIG_NSH_DISABLE_LOSETUP=y
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+CONFIG_NSH_DISABLE_TIME=y
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+CONFIG_NSH_DISABLE_UNAME=y
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CODECS_BUFSIZE=128
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_NSH_FILEIOSIZE=1024
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+CONFIG_NSH_DISABLE_ITEF=y
+CONFIG_NSH_DISABLE_LOOPS=y
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f103-minimum/pwm/setenv.sh b/configs/stm32f103-minimum/pwm/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..73dfab5a4d0b4ffc9b5d6cc3c7dd42df6131bd7e
--- /dev/null
+++ b/configs/stm32f103-minimum/pwm/setenv.sh
@@ -0,0 +1,100 @@
+#!/bin/bash
+# configs//stm32f103-minimum/nsh/setenv.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/stm32f103-minimum/rfid-rc522/Make.defs b/configs/stm32f103-minimum/rfid-rc522/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..9fa0444e4551fe30f2896085eb05ad47d7501aa8
--- /dev/null
+++ b/configs/stm32f103-minimum/rfid-rc522/Make.defs
@@ -0,0 +1,113 @@
+############################################################################
+# configs/stm32f103-minimum/rfid-rc522/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/stm32f103-minimum/rfid-rc522/defconfig b/configs/stm32f103-minimum/rfid-rc522/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..a13ac49392195e8508d6b57ee92bf05f57103a58
--- /dev/null
+++ b/configs/stm32f103-minimum/rfid-rc522/defconfig
@@ -0,0 +1,1155 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+CONFIG_DEFAULT_SMALL=y
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+# CONFIG_INTELHEX_BINARY is not set
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+# CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+CONFIG_SERIAL_TERMIOS=y
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+CONFIG_ARCH_CHIP_STM32F103C8=y
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+# CONFIG_ARCH_CHIP_STM32F407ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+CONFIG_STM32_STM32F10XX=y
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+CONFIG_STM32_PERFORMANCELINE=y
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+CONFIG_STM32_MEDIUMDENSITY=y
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+# CONFIG_STM32_STM32F40XX is not set
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+# CONFIG_STM32_STM32F407 is not set
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+# CONFIG_STM32_HAVE_CCM is not set
+CONFIG_STM32_HAVE_USBDEV=y
+# CONFIG_STM32_HAVE_OTGFS is not set
+# CONFIG_STM32_HAVE_FSMC is not set
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+# CONFIG_STM32_HAVE_USART6 is not set
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+# CONFIG_STM32_HAVE_TIM2 is not set
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+# CONFIG_STM32_HAVE_TIM9 is not set
+# CONFIG_STM32_HAVE_TIM10 is not set
+# CONFIG_STM32_HAVE_TIM11 is not set
+# CONFIG_STM32_HAVE_TIM12 is not set
+# CONFIG_STM32_HAVE_TIM13 is not set
+# CONFIG_STM32_HAVE_TIM14 is not set
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+# CONFIG_STM32_HAVE_CAN2 is not set
+# CONFIG_STM32_HAVE_DAC1 is not set
+# CONFIG_STM32_HAVE_DAC2 is not set
+# CONFIG_STM32_HAVE_RNG is not set
+# CONFIG_STM32_HAVE_ETHMAC is not set
+CONFIG_STM32_HAVE_I2C2=y
+# CONFIG_STM32_HAVE_I2C3 is not set
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKP is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_PWR is not set
+# CONFIG_STM32_SDIO is not set
+CONFIG_STM32_SPI1=y
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+CONFIG_STM32_USART1=y
+# CONFIG_STM32_USART2 is not set
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USB is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+CONFIG_STM32_SPI=y
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_SPI1_REMAP is not set
+# CONFIG_STM32_USART1_REMAP is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+CONFIG_STM32_JTAG_FULL_ENABLE=y
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+# CONFIG_STM32_JTAG_SW_ENABLE is not set
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
+# CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+
+#
+# SPI Configuration
+#
+# CONFIG_STM32_SPI_INTERRUPTS is not set
+# CONFIG_STM32_SPI_DMA is not set
+CONFIG_STM32_HAVE_RTC_COUNTER=y
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=5483
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=20480
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_STM32_TINY is not set
+CONFIG_ARCH_BOARD_STM32F103_MINIMUM=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="stm32f103-minimum"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+# CONFIG_DISABLE_OS_API is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=7
+CONFIG_START_DAY=5
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART1_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART1 Configuration
+#
+CONFIG_USART1_RXBUFSIZE=256
+CONFIG_USART1_TXBUFSIZE=256
+CONFIG_USART1_BAUD=115200
+CONFIG_USART1_BITS=8
+CONFIG_USART1_PARITY=0
+CONFIG_USART1_2STOP=0
+# CONFIG_USART1_IFLOWCONTROL is not set
+# CONFIG_USART1_OFLOWCONTROL is not set
+# CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+CONFIG_DRIVERS_CONTACTLESS=y
+CONFIG_CL_MFRC522=y
+CONFIG_MFRC522_SPI_FREQ=1000000
+# CONFIG_CL_MFRC522_DEBUG is not set
+# CONFIG_CL_PN532 is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
+# CONFIG_FS_READABLE is not set
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+CONFIG_SYMTAB_ORDEREDBYNAME=y
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+# CONFIG_LIBC_LONG_LONG is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+CONFIG_EXAMPLES_RFID_READUID=y
+CONFIG_EXAMPLES_RFID_READUID_PRIORITY=100
+CONFIG_EXAMPLES_RFID_READUID_STACKSIZE=2048
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=80
+CONFIG_NSH_DISABLE_SEMICOLON=y
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_NESTDEPTH=3
+CONFIG_NSH_DISABLEBG=y
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+CONFIG_NSH_DISABLE_ADDROUTE=y
+CONFIG_NSH_DISABLE_BASENAME=y
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+CONFIG_NSH_DISABLE_CMP=y
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+CONFIG_NSH_DISABLE_DF=y
+CONFIG_NSH_DISABLE_DELROUTE=y
+CONFIG_NSH_DISABLE_DIRNAME=y
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+CONFIG_NSH_DISABLE_IFCONFIG=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+CONFIG_NSH_DISABLE_LOSETUP=y
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+CONFIG_NSH_DISABLE_TIME=y
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+CONFIG_NSH_DISABLE_UNAME=y
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CODECS_BUFSIZE=128
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_NSH_FILEIOSIZE=1024
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+CONFIG_NSH_DISABLE_ITEF=y
+CONFIG_NSH_DISABLE_LOOPS=y
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f103-minimum/rfid-rc522/setenv.sh b/configs/stm32f103-minimum/rfid-rc522/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..a6e56493897566c2905547e77ba7b4f68980c505
--- /dev/null
+++ b/configs/stm32f103-minimum/rfid-rc522/setenv.sh
@@ -0,0 +1,100 @@
+#!/bin/bash
+# configs//stm32f103-minimum/rfid-rc522/setenv.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/stm32f103-minimum/rgbled/Make.defs b/configs/stm32f103-minimum/rgbled/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..8d3d47830537e30dac2dbbe27cf1085bfea495df
--- /dev/null
+++ b/configs/stm32f103-minimum/rgbled/Make.defs
@@ -0,0 +1,113 @@
+############################################################################
+# configs/stm32f103-minimum/nsh/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/stm32f103-minimum/rgbled/defconfig b/configs/stm32f103-minimum/rgbled/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..b9050368e446b2bd8e8212c8cdd6846b91c7b357
--- /dev/null
+++ b/configs/stm32f103-minimum/rgbled/defconfig
@@ -0,0 +1,1177 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+CONFIG_DEFAULT_SMALL=y
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+# CONFIG_INTELHEX_BINARY is not set
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+# CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+CONFIG_SERIAL_TERMIOS=y
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+CONFIG_ARCH_CHIP_STM32F103C8=y
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+# CONFIG_ARCH_CHIP_STM32F407ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+CONFIG_STM32_STM32F10XX=y
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+CONFIG_STM32_PERFORMANCELINE=y
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+CONFIG_STM32_MEDIUMDENSITY=y
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+# CONFIG_STM32_STM32F40XX is not set
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+# CONFIG_STM32_STM32F407 is not set
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+# CONFIG_STM32_HAVE_CCM is not set
+CONFIG_STM32_HAVE_USBDEV=y
+# CONFIG_STM32_HAVE_OTGFS is not set
+# CONFIG_STM32_HAVE_FSMC is not set
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+# CONFIG_STM32_HAVE_USART6 is not set
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+# CONFIG_STM32_HAVE_TIM2 is not set
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+# CONFIG_STM32_HAVE_TIM9 is not set
+# CONFIG_STM32_HAVE_TIM10 is not set
+# CONFIG_STM32_HAVE_TIM11 is not set
+# CONFIG_STM32_HAVE_TIM12 is not set
+# CONFIG_STM32_HAVE_TIM13 is not set
+# CONFIG_STM32_HAVE_TIM14 is not set
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+# CONFIG_STM32_HAVE_CAN2 is not set
+# CONFIG_STM32_HAVE_DAC1 is not set
+# CONFIG_STM32_HAVE_DAC2 is not set
+# CONFIG_STM32_HAVE_RNG is not set
+# CONFIG_STM32_HAVE_ETHMAC is not set
+CONFIG_STM32_HAVE_I2C2=y
+# CONFIG_STM32_HAVE_I2C3 is not set
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKP is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_PWR is not set
+# CONFIG_STM32_SDIO is not set
+# CONFIG_STM32_SPI1 is not set
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_TIM1=y
+CONFIG_STM32_TIM2=y
+CONFIG_STM32_TIM3=y
+CONFIG_STM32_TIM4=y
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+CONFIG_STM32_USART1=y
+# CONFIG_STM32_USART2 is not set
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USB is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+CONFIG_STM32_TIM1_NO_REMAP=y
+# CONFIG_STM32_TIM1_FULL_REMAP is not set
+# CONFIG_STM32_TIM1_PARTIAL_REMAP is not set
+CONFIG_STM32_TIM2_NO_REMAP=y
+# CONFIG_STM32_TIM2_FULL_REMAP is not set
+# CONFIG_STM32_TIM2_PARTIAL_REMAP_1 is not set
+# CONFIG_STM32_TIM2_PARTIAL_REMAP_2 is not set
+CONFIG_STM32_TIM3_NO_REMAP=y
+# CONFIG_STM32_TIM3_FULL_REMAP is not set
+# CONFIG_STM32_TIM3_PARTIAL_REMAP is not set
+# CONFIG_STM32_TIM4_REMAP is not set
+# CONFIG_STM32_USART1_REMAP is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+CONFIG_STM32_JTAG_FULL_ENABLE=y
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+# CONFIG_STM32_JTAG_SW_ENABLE is not set
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+CONFIG_STM32_TIM1_PWM=y
+CONFIG_STM32_TIM1_MODE=0
+CONFIG_STM32_TIM1_CHANNEL=1
+CONFIG_STM32_TIM1_CHMODE=0
+CONFIG_STM32_TIM2_PWM=y
+CONFIG_STM32_TIM2_MODE=0
+CONFIG_STM32_TIM2_CHANNEL=2
+CONFIG_STM32_TIM2_CHMODE=0
+CONFIG_STM32_TIM3_PWM=y
+CONFIG_STM32_TIM3_MODE=0
+CONFIG_STM32_TIM3_CHANNEL=3
+CONFIG_STM32_TIM3_CHMODE=0
+CONFIG_STM32_TIM4_PWM=y
+CONFIG_STM32_TIM4_MODE=0
+CONFIG_STM32_TIM4_CHANNEL=4
+CONFIG_STM32_TIM4_CHMODE=0
+# CONFIG_STM32_PWM_MULTICHAN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
+# CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+CONFIG_STM32_HAVE_RTC_COUNTER=y
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=5483
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=20480
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_STM32_TINY is not set
+CONFIG_ARCH_BOARD_STM32F103_MINIMUM=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="stm32f103-minimum"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+# CONFIG_ARCH_BUTTONS is not set
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+# CONFIG_DISABLE_OS_API is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=7
+CONFIG_START_DAY=5
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+CONFIG_ARCH_HAVE_PWM_PULSECOUNT=y
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+CONFIG_PWM=y
+# CONFIG_PWM_PULSECOUNT is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+CONFIG_RGBLED=y
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART1_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART1 Configuration
+#
+CONFIG_USART1_RXBUFSIZE=256
+CONFIG_USART1_TXBUFSIZE=256
+CONFIG_USART1_BAUD=115200
+CONFIG_USART1_BITS=8
+CONFIG_USART1_PARITY=0
+CONFIG_USART1_2STOP=0
+# CONFIG_USART1_IFLOWCONTROL is not set
+# CONFIG_USART1_OFLOWCONTROL is not set
+# CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
+# CONFIG_FS_READABLE is not set
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+CONFIG_SYMTAB_ORDEREDBYNAME=y
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+# CONFIG_LIBC_LONG_LONG is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PWM is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+CONFIG_EXAMPLES_RGBLED=y
+CONFIG_EXAMPLES_RGBLED_DEVNAME="/dev/rgbled0"
+CONFIG_EXAMPLES_RGBLED_PRIORITY=100
+CONFIG_EXAMPLES_RGBLED_STACKSIZE=2048
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=80
+CONFIG_NSH_DISABLE_SEMICOLON=y
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_NESTDEPTH=3
+CONFIG_NSH_DISABLEBG=y
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+CONFIG_NSH_DISABLE_ADDROUTE=y
+CONFIG_NSH_DISABLE_BASENAME=y
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+CONFIG_NSH_DISABLE_CMP=y
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+CONFIG_NSH_DISABLE_DF=y
+CONFIG_NSH_DISABLE_DELROUTE=y
+CONFIG_NSH_DISABLE_DIRNAME=y
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+CONFIG_NSH_DISABLE_IFCONFIG=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+CONFIG_NSH_DISABLE_LOSETUP=y
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+CONFIG_NSH_DISABLE_TIME=y
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+CONFIG_NSH_DISABLE_UNAME=y
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CODECS_BUFSIZE=128
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_NSH_FILEIOSIZE=1024
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+CONFIG_NSH_DISABLE_ITEF=y
+CONFIG_NSH_DISABLE_LOOPS=y
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f103-minimum/rgbled/setenv.sh b/configs/stm32f103-minimum/rgbled/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..73dfab5a4d0b4ffc9b5d6cc3c7dd42df6131bd7e
--- /dev/null
+++ b/configs/stm32f103-minimum/rgbled/setenv.sh
@@ -0,0 +1,100 @@
+#!/bin/bash
+# configs//stm32f103-minimum/nsh/setenv.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/stm32f103-minimum/src/Makefile b/configs/stm32f103-minimum/src/Makefile
index b29ce8090830b1c0d4e28dead3d84a20832c1caf..7eaf2d9c2778586c35abe3463d9ae03cc1ac9ee9 100644
--- a/configs/stm32f103-minimum/src/Makefile
+++ b/configs/stm32f103-minimum/src/Makefile
@@ -1,7 +1,7 @@
 ############################################################################
 # configs/stm32f103-minimum/src/Makefile
 #
-#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #           Laurent Latil 
 #
@@ -37,10 +37,60 @@
 -include $(TOPDIR)/Make.defs
 
 ASRCS =
-CSRCS = stm32_boot.c stm32_autoleds.c stm32_spi.c stm32_usbdev.c
+CSRCS = stm32_boot.c stm32_bringup.c stm32_spi.c
 
 ifeq ($(CONFIG_LIB_BOARDCTL),y)
 CSRCS += stm32_appinit.c
 endif
 
+ifeq ($(CONFIG_ARCH_BUTTONS),y)
+CSRCS += stm32_buttons.c
+endif
+
+ifeq ($(CONFIG_ARCH_LEDS),y)
+CSRCS += stm32_autoleds.c
+else
+CSRCS += stm32_userleds.c
+endif
+
+ifeq ($(CONFIG_PWM),y)
+CSRCS += stm32_pwm.c
+endif
+
+ifeq ($(CONFIG_RGBLED),y)
+CSRCS += stm32_rgbled.c
+endif
+
+ifeq ($(CONFIG_MMCSD),y)
+CSRCS += stm32_mmcsd.c
+endif
+
+ifeq ($(CONFIG_AUDIO_TONE),y)
+CSRCS += stm32_tone.c
+endif
+
+ifeq ($(CONFIG_CL_MFRC522),y)
+CSRCS += stm32_mfrc522.c
+endif
+
+ifeq ($(CONFIG_LCD_ST7567),y)
+CSRCS += stm32_lcd.c
+endif
+
+ifeq ($(CONFIG_QENCODER),y)
+CSRCS += stm32_qencoder.c
+endif
+
+ifeq ($(CONFIG_VEML6070),y)
+CSRCS += stm32_veml6070.c
+endif
+
+ifeq ($(CONFIG_WL_NRF24L01),y)
+CSRCS += stm32_wireless.c
+endif
+
+ifeq ($(CONFIG_USBDEV),y)
+CSRCS += stm32_usbdev.c
+endif
+
 include $(TOPDIR)/configs/Board.mk
diff --git a/configs/stm32f103-minimum/src/stm32_appinit.c b/configs/stm32f103-minimum/src/stm32_appinit.c
index d9291f9a16035ed31f7ab72b67955dabf0876528..e8d545ff66622823b763298a4c67c4d9513824c8 100644
--- a/configs/stm32f103-minimum/src/stm32_appinit.c
+++ b/configs/stm32f103-minimum/src/stm32_appinit.c
@@ -45,6 +45,7 @@
 #include 
 
 #include 
+#include 
 
 #include "stm32.h"
 #include "stm32f103_minimum.h"
@@ -80,5 +81,7 @@
 
 int board_app_initialize(uintptr_t arg)
 {
-  return OK;
+  /* Perform board initialization here */
+
+  return stm32_bringup();
 }
diff --git a/configs/stm32f103-minimum/src/stm32_autoleds.c b/configs/stm32f103-minimum/src/stm32_autoleds.c
index 71d2bfdb05b50d65cc5635df37673d3571cc7044..b2c8b33576c98b3dffc39395bcc31d197ad1de55 100644
--- a/configs/stm32f103-minimum/src/stm32_autoleds.c
+++ b/configs/stm32f103-minimum/src/stm32_autoleds.c
@@ -52,30 +52,14 @@
 #include "stm32.h"
 #include "stm32f103_minimum.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
 
 static inline void set_led(bool v)
 {
-  ledvdbg("Turn LED %s\n", v? "on":"off");
-  stm32_gpiowrite(GPIO_LED, !v);
+  ledinfo("Turn LED %s\n", v? "on":"off");
+  stm32_gpiowrite(GPIO_LED1, !v);
 }
 
 /****************************************************************************
@@ -91,7 +75,7 @@ void board_autoled_initialize(void)
 {
   /* Configure LED GPIO for output */
 
-  stm32_configgpio(GPIO_LED);
+  stm32_configgpio(GPIO_LED1);
 }
 
 /****************************************************************************
@@ -100,7 +84,7 @@ void board_autoled_initialize(void)
 
 void board_autoled_on(int led)
 {
-  ledvdbg("board_autoled_on(%d)\n",led);
+  ledinfo("board_autoled_on(%d)\n",led);
 
   switch (led)
     {
diff --git a/configs/stm32f103-minimum/src/stm32_boot.c b/configs/stm32f103-minimum/src/stm32_boot.c
index c7b9b4df9977126e4e5c6b6bd2fbb3864c779f66..92f321fbcb8eb1662b0d56de1e515ddb64ed604b 100644
--- a/configs/stm32f103-minimum/src/stm32_boot.c
+++ b/configs/stm32f103-minimum/src/stm32_boot.c
@@ -87,3 +87,27 @@ void stm32_boardinitialize(void)
   stm32_usbinitialize();
 #endif
 }
+
+/************************************************************************************
+ * Name: board_initialize
+ *
+ * Description:
+ *   If CONFIG_BOARD_INITIALIZE is selected, then an additional initialization call
+ *   will be performed in the boot-up sequence to a function called
+ *   board_initialize().  board_initialize() will be called immediately after
+ *   up_initialize() is called and just before the initial application is started.
+ *   This additional initialization phase may be used, for example, to initialize
+ *   board-specific device drivers.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_BOARD_INITIALIZE
+void board_initialize(void)
+{
+#ifndef CONFIG_LIB_BOARDCTL
+  /* Perform board initialization here instead of from the board_app_initialize(). */
+
+  (void)stm32_bringup();
+#endif
+}
+#endif
diff --git a/configs/stm32f103-minimum/src/stm32_bringup.c b/configs/stm32f103-minimum/src/stm32_bringup.c
new file mode 100644
index 0000000000000000000000000000000000000000..2e76db5b8cd52f370592d5e26ad8ffc24fe9b10c
--- /dev/null
+++ b/configs/stm32f103-minimum/src/stm32_bringup.c
@@ -0,0 +1,220 @@
+/****************************************************************************
+ * config/stm32f103-minimum/src/stm32_bringup.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#ifdef CONFIG_USBMONITOR
+#  include 
+#endif
+
+#include 
+
+#include "stm32.h"
+
+#ifdef CONFIG_STM32_OTGFS
+#  include "stm32_usbhost.h"
+#endif
+
+#ifdef CONFIG_BUTTONS
+#  include 
+#endif
+
+#ifdef CONFIG_USERLED
+#  include 
+#endif
+
+#include "stm32f103_minimum.h"
+
+/* Conditional logic in stm32f103_minimum.h will determine if certain features
+ * are supported.  Tests for these features need to be made after including
+ * stm32f103_minimum.h.
+ */
+
+#ifdef HAVE_RTC_DRIVER
+#  include 
+#  include "stm32_rtc.h"
+#endif
+
+#ifdef CONFIG_NSH_MMCSDMINOR
+#  define MMCSD_MINOR CONFIG_NSH_MMCSDMINOR
+#else
+#  define MMCSD_MINOR 0
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_bringup
+ *
+ * Description:
+ *   Perform architecture-specific initialization
+ *
+ *   CONFIG_BOARD_INITIALIZE=y :
+ *     Called from board_initialize().
+ *
+ *   CONFIG_BOARD_INITIALIZE=n && CONFIG_LIB_BOARDCTL=y :
+ *     Called from the NSH library
+ *
+ ****************************************************************************/
+
+int stm32_bringup(void)
+{
+#ifdef CONFIG_ONESHOT
+  struct oneshot_lowerhalf_s *os = NULL;
+#endif
+  int ret = OK;
+
+#ifdef CONFIG_MMCSD
+  ret = stm32_mmcsd_initialize(MMCSD_MINOR);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "Failed to initialize SD slot %d: %d\n", ret);
+      return ret;
+    }
+#endif
+
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device. */
+
+  ret = stm32_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_pwm_setup() failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_AUDIO_TONE
+  /* Configure and initialize the tone generator. */
+
+  ret = stm32_tone_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_tone_setup() failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_RGBLED
+  /* Configure and initialize the RGB LED. */
+
+  ret = stm32_rgbled_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_rgbled_setup() failed: %d\n", ret);
+    }
+#endif
+
+
+#ifdef CONFIG_CL_MFRC522
+  ret = stm32_mfrc522initialize("/dev/rfid0");
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_mfrc522initialize() failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_ONESHOT
+  os = oneshot_initialize(1, 10);
+  if (os)
+    {
+      ret = oneshot_register("/dev/oneshot", os);
+    }
+#endif
+
+#ifdef CONFIG_BUTTONS
+  /* Register the BUTTON driver */
+
+  ret = btn_lower_initialize("/dev/buttons");
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: btn_lower_initialize() failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_QENCODER
+  /* Initialize and register the qencoder driver */
+
+  ret = stm32_qencoder_initialize("/dev/qe0", CONFIG_STM32F103MINIMUM_QETIMER);
+  if (ret != OK)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to register the qencoder: %d\n",
+             ret);
+    }
+#endif
+
+#ifdef CONFIG_USERLED
+  /* Register the LED driver */
+
+  ret = userled_lower_initialize("/dev/userleds");
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: userled_lower_initialize() failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_VEML6070
+  /* Register the UV-A light sensor */
+
+  ret = stm32_veml6070initialize("/dev/uvlight0");
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_veml6070initialize() failed: %d\n", ret);
+    }
+#endif
+
+#if defined(CONFIG_WL_NRF24L01)
+  /* Initialize the NRF24L01 wireless module */
+
+  stm32_wlinitialize();
+#endif
+
+  return ret;
+}
diff --git a/configs/stm32f103-minimum/src/stm32_buttons.c b/configs/stm32f103-minimum/src/stm32_buttons.c
new file mode 100644
index 0000000000000000000000000000000000000000..ebca1469f1d9ab847704256594946418307c3971
--- /dev/null
+++ b/configs/stm32f103-minimum/src/stm32_buttons.c
@@ -0,0 +1,171 @@
+/****************************************************************************
+ * configs/stm32f103-minimum/src/stm32_buttons.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "stm32f103_minimum.h"
+
+#if defined(CONFIG_ARCH_BUTTONS)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if defined(CONFIG_BUTTONS) && !defined(CONFIG_ARCH_IRQBUTTONS)
+#  error "The NuttX Buttons Driver depends on IRQ support to work!\n"
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/* Pin configuration for each STM32F3Discovery button.  This array is indexed
+ * by the BUTTON_* definitions in board.h
+ */
+
+static const uint32_t g_buttons[NUM_BUTTONS] =
+{
+  GPIO_BTN_USER1, GPIO_BTN_USER2
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_button_initialize
+ *
+ * Description:
+ *   board_button_initialize() must be called to initialize button resources.  After
+ *   that, board_buttons() may be called to collect the current state of all
+ *   buttons or board_button_irq() may be called to register button interrupt
+ *   handlers.
+ *
+ ****************************************************************************/
+
+void board_button_initialize(void)
+{
+  int i;
+
+  /* Configure the GPIO pins as inputs.  NOTE that EXTI interrupts are
+   * configured for all pins.
+   */
+
+  for (i = 0; i < NUM_BUTTONS; i++)
+    {
+      stm32_configgpio(g_buttons[i]);
+    }
+}
+
+/****************************************************************************
+ * Name: board_buttons
+ ****************************************************************************/
+
+uint8_t board_buttons(void)
+{
+  uint8_t ret = 0;
+  int i;
+
+  /* Check that state of each key */
+
+  for (i = 0; i < NUM_BUTTONS; i++)
+    {
+       /* A LOW value means that the key is pressed.
+        */
+
+       bool released = stm32_gpioread(g_buttons[i]);
+
+       /* Accumulate the set of depressed (not released) keys */
+
+       if (!released)
+         {
+            ret |= (1 << i);
+         }
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Button support.
+ *
+ * Description:
+ *   board_button_initialize() must be called to initialize button resources.
+ *   After that, board_buttons() may be called to collect the current state
+ *   of all buttons or board_button_irq() may be called to register button
+ *   interrupt handlers.
+ *
+ *   After board_button_initialize() has been called, board_buttons() may be
+ *   called to collect the state of all buttons.  board_buttons() returns
+ *   an 8-bit bit set with each bit associated with a button.  See the
+ *   BUTTON_*_BIT definitions in board.h for the meaning of each bit.
+ *
+ *   board_button_irq() may be called to register an interrupt handler that
+ *   will be called when a button is depressed or released.  The ID value is
+ *   a button enumeration value that uniquely identifies a button resource.
+ *   See the BUTTON_* definitions in board.h for the meaning of enumeration
+ *   value.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_IRQBUTTONS
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
+{
+  int ret = -EINVAL;
+
+  /* The following should be atomic */
+
+  if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
+    {
+      ret = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler,
+                               arg);
+    }
+
+  return ret;
+}
+#endif
+
+#endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/stm32f103-minimum/src/stm32_lcd.c b/configs/stm32f103-minimum/src/stm32_lcd.c
new file mode 100644
index 0000000000000000000000000000000000000000..22e345b3f0bed8a87bb8545caafb70f64261729a
--- /dev/null
+++ b/configs/stm32f103-minimum/src/stm32_lcd.c
@@ -0,0 +1,153 @@
+/****************************************************************************
+ * configs/stm32f103-minimum/src/stm32_lcd.c
+ *
+ *   Copyright (C) 2016 Uniquix Tecnologia. All rights reserved.
+ *   Author: Alan Carvalho de Assis 
+ *
+ * I used the JLX12864G-086 LCD module based on ST7567 controller.
+ *
+ * Based on configs/zkit-arm-1769/src/lpc17_lcd.c
+ *
+ *   Copyright (C) 2013 Zilogic Systems. All rights reserved.
+ *   Author: Manikandan 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "up_arch.h"
+#include "up_internal.h"
+
+#include "stm32_gpio.h"
+#include "stm32_spi.h"
+#include "stm32f103_minimum.h"
+
+#ifdef CONFIG_NX_LCDDRIVER
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define LCD_SPI_PORTNO 1   /* On SPI1 */
+
+#ifndef CONFIG_LCD_CONTRAST
+# define CONFIG_LCD_CONTRAST 0x1f
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+FAR struct spi_dev_s *g_spidev;
+FAR struct lcd_dev_s *g_lcddev;
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_lcd_initialize
+ ****************************************************************************/
+
+int board_lcd_initialize(void)
+{
+  stm32_configgpio(STM32_LCD_RST);
+  stm32_configgpio(STM32_LCD_RS);
+  stm32_gpiowrite(STM32_LCD_RST, 1);
+  stm32_gpiowrite(STM32_LCD_RS, 1);
+
+  g_spidev = stm32_spibus_initialize(LCD_SPI_PORTNO);
+
+  if (!g_spidev)
+    {
+      lcderr("ERROR: Failed to initialize SPI port %d\n", LCD_SPI_PORTNO);
+      return 0;
+    }
+
+  stm32_gpiowrite(STM32_LCD_RST, 0);
+  up_mdelay(1);
+  stm32_gpiowrite(STM32_LCD_RST, 1);
+  return 1;
+}
+
+/****************************************************************************
+ * Name: board_lcd_getdev
+ ****************************************************************************/
+
+FAR struct lcd_dev_s *board_lcd_getdev(int lcddev)
+{
+  g_lcddev = st7567_initialize(g_spidev, lcddev);
+  if (!g_lcddev)
+    {
+      lcderr("ERROR: Failed to bind SPI port 1 to LCD %d: %d\n", lcddev);
+    }
+  else
+    {
+      lcdinfo("SPI port 1 bound to LCD %d\n", lcddev);
+
+      /* And turn the LCD on (CONFIG_LCD_MAXPOWER should be 1) */
+
+      (void)g_lcddev->setpower(g_lcddev, CONFIG_LCD_MAXPOWER);
+
+      /* Set contrast to right value, otherwise background too dark */
+
+      (void)g_lcddev->setcontrast(g_lcddev, CONFIG_LCD_CONTRAST);
+
+      return g_lcddev;
+    }
+
+  return NULL;
+}
+
+/****************************************************************************
+ * Name: board_lcd_uninitialize
+ ****************************************************************************/
+
+void board_lcd_uninitialize(void)
+{
+  /* TO-FIX */
+}
+
+#endif /* CONFIG_NX_LCDDRIVER */
diff --git a/configs/stm32f103-minimum/src/stm32_mfrc522.c b/configs/stm32f103-minimum/src/stm32_mfrc522.c
new file mode 100644
index 0000000000000000000000000000000000000000..d55842eca7f0e489129806648dd146393e564210
--- /dev/null
+++ b/configs/stm32f103-minimum/src/stm32_mfrc522.c
@@ -0,0 +1,101 @@
+/************************************************************************************
+ * configs/stm32f4discovery/src/stm32_mfrc522.c
+ *
+ *   Copyright (C) 2015 Alan Carvalho de Assis. All rights reserved.
+ *   Author: Alan Carvalho de Assis 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "stm32.h"
+#include "stm32_spi.h"
+#include "stm32f103_minimum.h"
+
+#if defined(CONFIG_SPI) && defined(CONFIG_STM32_SPI1) && defined(CONFIG_CL_MFRC522)
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#define MFRC522_SPI_PORTNO 1   /* On SPI1 */
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_mfrc522initialize
+ *
+ * Description:
+ *   Initialize and register the MFRC522 RFID driver.
+ *
+ * Input parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/rfid0"
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ************************************************************************************/
+
+int stm32_mfrc522initialize(FAR const char *devpath)
+{
+  FAR struct spi_dev_s *spi;
+  int ret;
+
+  spi = stm32_spibus_initialize(MFRC522_SPI_PORTNO);
+
+  if (!spi)
+    {
+      return -ENODEV;
+    }
+
+  /* Then register the MFRC522 */
+  
+  ret = mfrc522_register(devpath, spi);
+  if (ret < 0)
+    {
+      snerr("ERROR: Error registering MFRC522\n");
+    }
+
+  return ret;
+}
+
+#endif /* CONFIG_SPI && CONFIG_MFRC522 */
diff --git a/arch/arm/src/calypso/calypso_lowputc.S b/configs/stm32f103-minimum/src/stm32_mmcsd.c
similarity index 56%
rename from arch/arm/src/calypso/calypso_lowputc.S
rename to configs/stm32f103-minimum/src/stm32_mmcsd.c
index 5556b3baca956f135b3d956f10c43c62c9933b59..2b657a66473003a1312897d4b77e6fbc6a061e4e 100644
--- a/arch/arm/src/calypso/calypso_lowputc.S
+++ b/configs/stm32f103-minimum/src/stm32_mmcsd.c
@@ -1,12 +1,8 @@
-/**************************************************************************
- * calypso/calypso_lowputc.S
+/*****************************************************************************
+ * configs/stm32f103-minimum/src/stm32_mmcsd.c
  *
- *   Copyright (C) 2011 Stefan Richter. All rights reserved.
- *   Author: Stefan Richter 
- *
- * based on: c5471/c5471_lowputc.S
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt 
+ *   Copyright (C) 2017 Greg Nutt. All rights reserved.
+ *   Author: Alan Carvalho de Assis 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -34,100 +30,100 @@
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
- *
- **************************************************************************/
+ ****************************************************************************/
 
-/**************************************************************************
+/*****************************************************************************
  * Included Files
- **************************************************************************/
+ ****************************************************************************/
 
+#include 
 #include 
-
-#include "chip.h"
-#include "up_arch.h"
-#include "up_internal.h"
-
-/**************************************************************************
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "stm32.h"
+#include "stm32f103_minimum.h"
+#include "stm32_spi.h"
+
+/*****************************************************************************
  * Pre-processor Definitions
- **************************************************************************/
+ ****************************************************************************/
 
-/**************************************************************************
- * Private Types
- **************************************************************************/
+#ifndef CONFIG_STM32_SPI1
+#  error "SD driver requires CONFIG_STM32_SPI1 to be enabled"
+#endif
 
-/**************************************************************************
- * Private Function Prototypes
- **************************************************************************/
+#ifdef CONFIG_DISABLE_MOUNTPOINT
+#  error "SD driver requires CONFIG_DISABLE_MOUNTPOINT to be disabled"
+#endif
 
-/**************************************************************************
- * Public Data
- **************************************************************************/
+/*****************************************************************************
+ * Private Definitions
+ ****************************************************************************/
 
-/**************************************************************************
- * Private Data
- **************************************************************************/
+static const int SD_SPI_PORT = 1; /* SD is connected to SPI1 port */
+static const int SD_SLOT_NO  = 0; /* There is only one SD slot */
 
-/**************************************************************************
+/*****************************************************************************
  * Private Functions
- **************************************************************************/
+ ****************************************************************************/
 
-/**************************************************************************
- * Public Functions
- **************************************************************************/
-
-/**************************************************************************
- * Name: up_lowputc
- **************************************************************************/
-
-/* This assembly language version has the advantage that it can does not
- * require a C stack and uses only r0-r1.  Hence it can be used during
- * early boot phases.
+/* NOTE:  We are using a SDCard adapter/module without Card Detect pin!
+ * Then we don't need to Card Detect callback here.
  */
 
-	.text
-	.global	up_lowputc
-	.type	up_lowputc, function
-up_lowputc:
-	/* On entry, r0 holds the character to be printed */
-
-#ifdef CONFIG_SERIAL_IRDA_CONSOLE
-	ldr	r2, =UART_IRDA_BASE	/* r2=IRDA UART base */
-#else
-	ldr	r2, =UART_MODEM_BASE	/* r2=Modem UART base */
-#endif
-
-	/* Poll bit 0 of the UART_SSR register.  When the bit
-	 * is clear, the TX FIFO is no longer full
-	 */
-
-1:	ldrb	r1, [r2, #UART_SSR_OFFS]
-	tst	r1, #UART_SSR_TXFULL
-	bne	1b
-
-	/* Send the character by writing it into the UART_THR
-	 * register.
-	 */
-
-	strb     r0, [r2, #UART_THR_OFFS]
-
-	/* Wait for the tranmsit holding regiser (THR) to be
-	 * emptied. This is detemined when bit 6 of the LSR
-	 * is set.
-	 */
-
-2:	ldrb     r1, [r2, #UART_LSR_OFFS]
-	tst     r1, #0x00000020
-	beq     2b
-
-	/* If the character that we just sent was a linefeed,
-	 * then send a carriage return as well.
-	 */
-
-	teq     r0, #'\n'
-	moveq   r0, #'\r'
-	beq     1b
-
-	/* And return */
-
-	mov     pc, lr
+/*****************************************************************************
+ * Public Functions
+ ****************************************************************************/
 
+/*****************************************************************************
+ * Name: stm32_spi1register
+ *
+ * Description:
+ *   Registers media change callback
+ ****************************************************************************/
+
+int stm32_spi1register(struct spi_dev_s *dev, spi_mediachange_t callback,
+                       void *arg)
+{
+  spiinfo("INFO: Registering spi1 device\n");
+  return OK;
+}
+
+/*****************************************************************************
+ * Name: stm32_mmcsd_initialize
+ *
+ * Description:
+ *   Initialize SPI-based SD card and card detect thread.
+ ****************************************************************************/
+
+int stm32_mmcsd_initialize(int minor)
+{
+  struct spi_dev_s *spi;
+  int rv;
+
+  mcinfo("INFO: Initializing mmcsd card\n");
+
+  spi = stm32_spibus_initialize(SD_SPI_PORT);
+  if (spi == NULL)
+    {
+      mcerr("ERROR: Failed to initialize SPI port %d\n", SD_SPI_PORT);
+      return -ENODEV;
+    }
+
+  rv = mmcsd_spislotinitialize(minor, SD_SLOT_NO, spi);
+  if (rv < 0)
+    {
+      mcerr("ERROR: Failed to bind SPI port %d to SD slot %d\n",
+            SD_SPI_PORT, SD_SLOT_NO);
+      return rv;
+    }
+
+  spiinfo("INFO: mmcsd card has been initialized successfully\n");
+  return OK;
+}
diff --git a/configs/stm32f103-minimum/src/stm32_pwm.c b/configs/stm32f103-minimum/src/stm32_pwm.c
new file mode 100644
index 0000000000000000000000000000000000000000..dec2597991d3dfd2dd0c8fdde23d50f5af04f616
--- /dev/null
+++ b/configs/stm32f103-minimum/src/stm32_pwm.c
@@ -0,0 +1,139 @@
+/************************************************************************************
+ * configs/stm32f103-minimum/src/stm32_pwm.c
+ *
+ *   Copyright (C) 2013, 2015, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Alan Carvalho de Assis 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include "chip.h"
+#include "up_arch.h"
+#include "stm32_pwm.h"
+#include "stm32f103_minimum.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Configuration *******************************************************************/
+/* PWM
+ *
+ * The stm32f103-minimum has no real on-board PWM devices, but the board can be
+ * configured to output a pulse train using TIM4 CH2.  This pin is used by FSMC
+ * is connect to CN5 just for this purpose:
+ *
+ * PB0 ADC12_IN8/TIM3_CH3
+ *
+ */
+
+#define HAVE_PWM 1
+
+#ifndef CONFIG_PWM
+#  undef HAVE_PWM
+#endif
+
+#ifndef CONFIG_STM32_TIM3
+#  undef HAVE_PWM
+#endif
+
+#ifndef CONFIG_STM32_TIM3_PWM
+#  undef HAVE_PWM
+#endif
+
+#if !defined(CONFIG_STM32_TIM3_CHANNEL) || CONFIG_STM32_TIM3_CHANNEL != STM32F103MINIMUM_PWMCHANNEL
+#  undef HAVE_PWM
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+int stm32_pwm_setup(void)
+{
+#ifdef HAVE_PWM
+  static bool initialized = false;
+  struct pwm_lowerhalf_s *pwm;
+  int ret;
+
+  /* Have we already initialized? */
+
+  if (!initialized)
+    {
+      /* Call stm32_pwminitialize() to get an instance of the PWM interface */
+
+      pwm = stm32_pwminitialize(STM32F103MINIMUM_PWMTIMER);
+      if (!pwm)
+        {
+          aerr("ERROR: Failed to get the STM32 PWM lower half\n");
+          return -ENODEV;
+        }
+
+      /* Register the PWM driver at "/dev/pwm0" */
+
+      ret = pwm_register("/dev/pwm0", pwm);
+      if (ret < 0)
+        {
+          aerr("ERROR: pwm_register failed: %d\n", ret);
+          return ret;
+        }
+
+      /* Now we are initialized */
+
+      initialized = true;
+    }
+
+  return OK;
+#else
+  return -ENODEV;
+#endif
+}
+
diff --git a/configs/stm32f103-minimum/src/stm32_qencoder.c b/configs/stm32f103-minimum/src/stm32_qencoder.c
new file mode 100644
index 0000000000000000000000000000000000000000..ae4508b02b36348f19524408b6524e6f98dc296c
--- /dev/null
+++ b/configs/stm32f103-minimum/src/stm32_qencoder.c
@@ -0,0 +1,80 @@
+/************************************************************************************
+ * configs/stm32f103-minimum/src/stm32_qencoder.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "chip.h"
+#include "up_arch.h"
+#include "stm32_qencoder.h"
+#include "stm32f103_minimum.h"
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_qencoder_initialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following interface to work with
+ *   examples/qencoder.
+ *
+ ************************************************************************************/
+
+int stm32_qencoder_initialize(FAR const char *devpath, int timer)
+{
+  int ret;
+
+  /* Initialize a quadrature encoder interface. */
+
+  sninfo("Initializing the quadrature encoder using TIM%d\n", timer);
+  ret = stm32_qeinitialize(devpath, timer);
+  if (ret < 0)
+    {
+      snerr("ERROR: stm32_qeinitialize failed: %d\n", ret);
+    }
+
+  return ret;
+}
diff --git a/configs/stm32f103-minimum/src/stm32_rgbled.c b/configs/stm32f103-minimum/src/stm32_rgbled.c
new file mode 100644
index 0000000000000000000000000000000000000000..21b7a0b78c98d25e8df57f11c051cfcdffc3052a
--- /dev/null
+++ b/configs/stm32f103-minimum/src/stm32_rgbled.c
@@ -0,0 +1,194 @@
+/************************************************************************************
+ * configs/stm32f4discovery/src/stm32_rgbled.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Alan Carvalho de Assis 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "chip.h"
+#include "up_arch.h"
+#include "stm32_pwm.h"
+#include "stm32f103_minimum.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Configuration ********************************************************************/
+
+#define HAVE_RGBLED 1
+
+#ifndef CONFIG_PWM
+#  undef HAVE_RGBLED
+#endif
+
+#ifndef CONFIG_STM32_TIM1
+#  undef HAVE_RGBLED
+#endif
+
+#ifndef CONFIG_STM32_TIM2
+#  undef HAVE_RGBLED
+#endif
+
+#ifndef CONFIG_STM32_TIM4
+#  undef HAVE_RGBLED
+#endif
+
+#ifndef CONFIG_STM32_TIM1_PWM
+#  undef HAVE_RGBLED
+#endif
+
+#ifndef CONFIG_STM32_TIM2_PWM
+#  undef HAVE_RGBLED
+#endif
+
+#ifndef CONFIG_STM32_TIM4_PWM
+#  undef HAVE_RGBLED
+#endif
+
+#if CONFIG_STM32_TIM1_CHANNEL != RGBLED_RPWMCHANNEL
+#  undef HAVE_PWM
+#endif
+
+#if CONFIG_STM32_TIM2_CHANNEL != RGBLED_GPWMCHANNEL
+#  undef HAVE_PWM
+#endif
+
+#if CONFIG_STM32_TIM4_CHANNEL != RGBLED_BPWMCHANNEL
+#  undef HAVE_PWM
+#endif
+
+#ifdef HAVE_RGBLED
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_rgbled_setup
+ *
+ * Description:
+ *   Initial for support of a connected RGB LED using PWM.
+ *
+ ************************************************************************************/
+
+int stm32_rgbled_setup(void)
+{
+  static bool initialized = false;
+  struct pwm_lowerhalf_s    *ledr;
+  struct pwm_lowerhalf_s    *ledg;
+  struct pwm_lowerhalf_s    *ledb;
+  struct pwm_info_s info;
+  int ret;
+
+  /* Have we already initialized? */
+
+  if (!initialized)
+    {
+      /* Call stm32_pwminitialize() to get an instance of the PWM interface */
+
+      ledr = stm32_pwminitialize(RGBLED_RPWMTIMER);
+      if (!ledr)
+        {
+          lederr("ERROR: Failed to get the STM32 PWM lower half to LEDR\n");
+          return -ENODEV;
+        }
+
+      /* Define frequency and duty cycle */
+
+      info.frequency = 100;
+      info.duty = 0;
+
+      /* Initialize LED R */
+
+      ledr->ops->setup(ledr);
+      ledr->ops->start(ledr, &info);
+
+      /* Call stm32_pwminitialize() to get an instance of the PWM interface */
+
+      ledg = stm32_pwminitialize(RGBLED_GPWMTIMER);
+      if (!ledg)
+        {
+          lederr("ERROR: Failed to get the STM32 PWM lower half to LEDG\n");
+          return -ENODEV;
+        }
+
+      /* Initialize LED G */
+
+      ledg->ops->setup(ledg);
+      ledg->ops->start(ledg, &info);
+
+      /* Call stm32_pwminitialize() to get an instance of the PWM interface */
+
+      ledb = stm32_pwminitialize(RGBLED_BPWMTIMER);
+      if (!ledb)
+        {
+          lederr("ERROR: Failed to get the STM32 PWM lower half to LEDB\n");
+          return -ENODEV;
+        }
+
+      /* Initialize LED B */
+
+      ledb->ops->setup(ledb);
+      ledb->ops->start(ledb, &info);
+
+      /* Register the RGB LED diver at "/dev/rgbled0" */
+
+      ret = rgbled_register("/dev/rgbled0", ledr, ledg, ledb);
+      if (ret < 0)
+        {
+          lederr("ERROR: rgbled_register failed: %d\n", ret);
+          return ret;
+        }
+
+      /* Now we are initialized */
+
+      initialized = true;
+    }
+
+  return OK;
+}
+
+#else
+#  error "HAVE_RGBLED is undefined"
+#endif /* HAVE_RGBLED */
diff --git a/configs/stm32f103-minimum/src/stm32_spi.c b/configs/stm32f103-minimum/src/stm32_spi.c
index 791bf94cc15d95de91f7d161e181239952496315..2d24b7aa3d9d8360975975b14766e6262fd7c7e8 100644
--- a/configs/stm32f103-minimum/src/stm32_spi.c
+++ b/configs/stm32f103-minimum/src/stm32_spi.c
@@ -54,29 +54,6 @@
 
 #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_SPI
-#endif
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -96,6 +73,22 @@ void stm32_spidev_initialize(void)
    *       Here, we only initialize chip select pins unique to the board
    *       architecture.
    */
+
+#ifdef CONFIG_CL_MFRC522
+  (void)stm32_configgpio(GPIO_CS_MFRC522);    /* MFRC522 chip select */
+#endif
+
+#ifdef CONFIG_LCD_ST7567
+  (void)stm32_configgpio(STM32_LCD_CS);       /* ST7567 chip select */
+#endif
+
+#ifdef CONFIG_WL_NRF24L01
+  stm32_configgpio(GPIO_NRF24L01_CS);         /* nRF24L01 chip select */
+#endif
+
+#ifdef CONFIG_MMCSD_SPI
+  stm32_configgpio(GPIO_SDCARD_CS);           /* SD/MMC Card chip select */
+#endif
 }
 
 /****************************************************************************
@@ -124,18 +117,63 @@ void stm32_spidev_initialize(void)
  ****************************************************************************/
 
 #ifdef CONFIG_STM32_SPI1
-void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
+                      bool selected)
 {
+#if defined(CONFIG_CL_MFRC522)
+  if (devid == SPIDEV_WIRELESS)
+    {
+      stm32_gpiowrite(GPIO_CS_MFRC522, !selected);
+    }
+#endif
+
+#ifdef CONFIG_LCD_ST7567
+  if (devid == SPIDEV_DISPLAY)
+    {
+      stm32_gpiowrite(GPIO_CS_MFRC522, !selected);
+    }
+#endif
+
+#ifdef CONFIG_WL_NRF24L01
+  if (devid == SPIDEV_WIRELESS)
+    {
+      stm32_gpiowrite(GPIO_NRF24L01_CS, !selected);
+    }
+#endif
+
+#ifdef CONFIG_MMCSD_SPI
+  if (devid == SPIDEV_MMCSD)
+    {
+      stm32_gpiowrite(GPIO_SDCARD_CS, !selected);
+    }
+#endif
 }
 
 uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  return 0;
+  uint8_t status = 0;
+
+#ifdef CONFIG_WL_NRF24L01
+  if (devid == SPIDEV_WIRELESS)
+    {
+       status |= SPI_STATUS_PRESENT;
+    }
+#endif
+
+#ifdef CONFIG_MMCSD_SPI
+  if (devid == SPIDEV_MMCSD)
+    {
+       status |= SPI_STATUS_PRESENT;
+    }
+#endif
+
+  return status;
 }
 #endif
 
 #ifdef CONFIG_STM32_SPI2
-void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
+                      bool selected)
 {
 }
 
@@ -145,4 +183,51 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 }
 #endif
 
+
+/****************************************************************************
+ * Name: stm32_spi1cmddata
+ *
+ * Description:
+ *   Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true)
+ *   or command (false). This function must be provided by platform-specific
+ *   logic. This is an implementation of the cmddata method of the SPI
+ *   interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
+ *
+ * Input Parameters:
+ *
+ *   spi - SPI device that controls the bus the device that requires the CMD/
+ *         DATA selection.
+ *   devid - If there are multiple devices on the bus, this selects which one
+ *         to select cmd or data.  NOTE:  This design restricts, for example,
+ *         one one SPI display per SPI bus.
+ *   cmd - true: select command; false: select data
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI_CMDDATA
+#ifdef CONFIG_STM32_SPI1
+int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
+                      bool cmd)
+{
+#ifdef CONFIG_LCD_ST7567
+  if (devid == SPIDEV_DISPLAY)
+    {
+      /*  This is the Data/Command control pad which determines whether the
+       *  data bits are data or a command.
+       */
+
+      (void)stm32_gpiowrite(STM32_LCD_RS, !cmd);
+
+      return OK;
+    }
+#endif
+
+  return -ENODEV;
+}
+#endif
+#endif
+
 #endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */
diff --git a/configs/stm32f103-minimum/src/stm32_tone.c b/configs/stm32f103-minimum/src/stm32_tone.c
new file mode 100644
index 0000000000000000000000000000000000000000..4afeb09f826ea6de6aa7ea093afb33ea40214cc1
--- /dev/null
+++ b/configs/stm32f103-minimum/src/stm32_tone.c
@@ -0,0 +1,152 @@
+/************************************************************************************
+ * configs/stm32f103minimum/src/stm32_tone.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Alan Carvalho de Assis  
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "chip.h"
+#include "up_arch.h"
+#include "stm32_pwm.h"
+#include "stm32f103_minimum.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Configuration ********************************************************************/
+
+#define HAVE_TONE 1
+
+/* TIMx used to generate PWM signal to Buzzer/Speaker */
+
+#define TONE_PWM_TIMER 2
+
+/* TIMx used to generate oneshot */
+
+#define ONESHOT_TIMER 3
+
+/* Oneshot timer resolution in microseconds */
+
+#define OST_RES        10
+
+#ifndef CONFIG_PWM
+#  undef HAVE_TONE
+#endif
+
+#ifndef CONFIG_STM32_TIM2
+#  undef HAVE_TONE
+#endif
+
+#ifndef CONFIG_STM32_TIM2_PWM
+#  undef HAVE_TONE
+#endif
+
+#ifdef HAVE_TONE
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_tone_setup
+ *
+ * Description:
+ *   Configure and initialize the tone generator.
+ *
+ ************************************************************************************/
+
+int stm32_tone_setup(void)
+{
+  static bool                initialized = false;
+  struct pwm_lowerhalf_s     *tone;
+  struct pwm_info_s          info;
+  struct oneshot_lowerhalf_s *oneshot = NULL;
+  int                        ret;
+
+  /* Have we already initialized? */
+
+  if (!initialized)
+    {
+      /* Call stm32_pwminitialize() to get an instance of the PWM interface */
+
+      tone = stm32_pwminitialize(TONE_PWM_TIMER);
+      if (!tone)
+        {
+          auderr("Failed to get the STM32 PWM lower half to AUDIO TONE\n");
+          return -ENODEV;
+        }
+
+      /* Initialize TONE PWM */
+
+      tone->ops->setup(tone);
+      tone->ops->start(tone, &info);
+
+      /* Initialize ONESHOT Timer */
+
+      oneshot = oneshot_initialize(ONESHOT_TIMER, OST_RES);
+      if (!oneshot)
+        {
+          auderr("Failed to initialize ONESHOT Timer!\n");
+          return -ENODEV;
+        }
+
+      /* Register the Audio Tone driver at "/dev/tone0" */
+
+      ret = tone_register("/dev/tone0", tone, oneshot);
+      if (ret < 0)
+        {
+          auderr("ERROR: tone_register failed: %d\n", ret);
+          return ret;
+        }
+
+      /* Now we are initialized */
+
+      initialized = true;
+    }
+
+  return OK;
+}
+
+#endif /* HAVE_TONE */
diff --git a/configs/stm32f103-minimum/src/stm32_usbdev.c b/configs/stm32f103-minimum/src/stm32_usbdev.c
index cc1d00df73b0070582e06a3271cd622143c3de6b..92fc01f095d23740748b57bdf55ce23c4b7850cb 100644
--- a/configs/stm32f103-minimum/src/stm32_usbdev.c
+++ b/configs/stm32f103-minimum/src/stm32_usbdev.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm32f103-minimum/src/stm32_usbdev.c
  *
- *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *           Laurent Latil 
  *
@@ -60,7 +60,7 @@
  * Name: stm32_usbinitialize
  *
  * Description:
- *   Called to setup USB-related GPIO pins for the Hy-Mini STM32v board.
+ *   Called to setup USB-related GPIO pins for the STM32F103 Minimum board.
  *
  ************************************************************************************/
 
@@ -103,5 +103,5 @@ int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable)
 
 void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
diff --git a/configs/stm32f103-minimum/src/stm32_userleds.c b/configs/stm32f103-minimum/src/stm32_userleds.c
new file mode 100644
index 0000000000000000000000000000000000000000..ac26d4d4d011315da24007b4460971dcc036f4f3
--- /dev/null
+++ b/configs/stm32f103-minimum/src/stm32_userleds.c
@@ -0,0 +1,112 @@
+/****************************************************************************
+ * configs/stm32f103-minimum/src/stm32_userleds.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "chip.h"
+#include "stm32.h"
+#include "stm32f103_minimum.h"
+
+#ifndef CONFIG_ARCH_LEDS
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+/* This array maps an LED number to GPIO pin configuration */
+
+static const uint32_t g_ledcfg[BOARD_NLEDS] =
+{
+  GPIO_LED1,
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_userled_initialize
+ ****************************************************************************/
+
+void board_userled_initialize(void)
+{
+  int i;
+
+  /* Configure LED1-8 GPIOs for output */
+
+  for (i = 0; i < BOARD_NLEDS; i++)
+    {
+      stm32_configgpio(g_ledcfg[i]);
+    }
+}
+
+/****************************************************************************
+ * Name: board_userled
+ ****************************************************************************/
+
+void board_userled(int led, bool ledon)
+{
+  if ((unsigned)led < BOARD_NLEDS)
+    {
+      stm32_gpiowrite(g_ledcfg[led], ledon);
+    }
+}
+
+/****************************************************************************
+ * Name: board_userled_all
+ ****************************************************************************/
+
+void board_userled_all(uint8_t ledset)
+{
+  int i;
+
+  /* Configure LED1-8 GPIOs for output */
+
+  for (i = 0; i < BOARD_NLEDS; i++)
+    {
+      stm32_gpiowrite(g_ledcfg[i], (ledset & (1 << i)) != 0);
+    }
+}
+
+#endif /* !CONFIG_ARCH_LEDS */
diff --git a/configs/stm32f103-minimum/src/stm32_veml6070.c b/configs/stm32f103-minimum/src/stm32_veml6070.c
new file mode 100644
index 0000000000000000000000000000000000000000..72c6583bbcb8b6e571c7dc79050c4a568a798687
--- /dev/null
+++ b/configs/stm32f103-minimum/src/stm32_veml6070.c
@@ -0,0 +1,105 @@
+/************************************************************************************
+ * configs/stm32f103-minimum/src/stm32_veml6070.c
+ *
+ *   Copyright (C) 2016 Alan Carvalho de Assis. All rights reserved.
+ *   Author: Alan Carvalho de Assis 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "stm32.h"
+#include "stm32_i2c.h"
+#include "stm32f103_minimum.h"
+
+#if defined(CONFIG_I2C) && defined(CONFIG_VEML6070)
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#define VEML6070_I2C_PORTNO 1   /* On I2C1 */
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_veml6070initialize
+ *
+ * Description:
+ *   Initialize and register the VEML6070 UV-A Light sensor.
+ *
+ * Input parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/uvlight0"
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ************************************************************************************/
+
+int stm32_veml6070initialize(FAR const char *devpath)
+{
+  FAR struct i2c_master_s *i2c;
+  int ret;
+
+  sninfo("Initializing VEML6070!\n");
+
+  /* Initialize I2C */
+
+  i2c = stm32_i2cbus_initialize(VEML6070_I2C_PORTNO);
+
+  if (!i2c)
+    {
+      return -ENODEV;
+    }
+
+  /* Then register the light sensor */
+
+  ret = veml6070_register(devpath, i2c, VEML6070_I2C_DATA_LSB_CMD_ADDR);
+  if (ret < 0)
+    {
+      snerr("ERROR: Error registering BM180\n");
+    }
+
+  return ret;
+}
+
+#endif /* CONFIG_I2C && CONFIG_VEML6070 && CONFIG_STM32_I2C1 */
diff --git a/configs/stm32f103-minimum/src/stm32_wireless.c b/configs/stm32f103-minimum/src/stm32_wireless.c
new file mode 100644
index 0000000000000000000000000000000000000000..c3ddcff7848967d58a8f8b89edb02301c8058b4f
--- /dev/null
+++ b/configs/stm32f103-minimum/src/stm32_wireless.c
@@ -0,0 +1,147 @@
+/************************************************************************************
+ * configs/stm32f103-minimum//src/stm32_wireless.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Laurent Latil 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "up_arch.h"
+#include "chip.h"
+#include "stm32.h"
+
+#include "stm32f103_minimum.h"
+
+#ifdef CONFIG_WL_NRF24L01
+
+/************************************************************************************
+ * Private Function Prototypes
+ ************************************************************************************/
+
+static int stm32tiny_wl_irq_attach(xcpt_t isr, FAR void *arg);
+static void stm32tiny_wl_chip_enable(bool enable);
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+static FAR struct nrf24l01_config_s nrf_cfg =
+{
+  .irqattach = stm32tiny_wl_irq_attach,
+  .chipenable = stm32tiny_wl_chip_enable,
+};
+
+static xcpt_t g_isr;
+static FAR void *g_arg;
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+static int stm32tiny_wl_irq_attach(xcpt_t isr, FAR void *arg)
+{
+  winfo("Attach IRQ\n");
+  g_isr = isr;
+  g_arg = arg;
+  (void)stm32_gpiosetevent(GPIO_NRF24L01_IRQ, false, true, false, g_isr, g_arg);
+  return OK;
+}
+
+static void stm32tiny_wl_chip_enable(bool enable)
+{
+  winfo("CE:%d\n", enable);
+  stm32_gpiowrite(GPIO_NRF24L01_CE, enable);
+}
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_wlinitialize
+ *
+ * Description:
+ *   Initialize the NRF24L01 wireless module
+ *
+ * Input Parmeters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+void stm32_wlinitialize(void)
+{
+#ifndef CONFIG_STM32_SPI1
+# error "STM32_SPI1 is required to support nRF24L01 module on this board"
+#endif
+
+  FAR struct spi_dev_s *spidev;
+  int result;
+
+  /* Setup CE & IRQ line IOs */
+
+  stm32_configgpio(GPIO_NRF24L01_CE);
+  stm32_configgpio(GPIO_NRF24L01_IRQ);
+
+  /* Init SPI bus */
+
+  spidev = stm32_spibus_initialize(1);
+  if (!spidev)
+    {
+      werr("ERROR: Failed to initialize SPI bus\n");
+      return;
+    }
+
+  result = nrf24l01_register(spidev, &nrf_cfg);
+  if (result != OK)
+    {
+      werr("ERROR: Failed to register initialize SPI bus\n");
+      return;
+    }
+}
+
+#endif /* CONFIG_WL_NRF24L01 */
diff --git a/configs/stm32f103-minimum/src/stm32f103_minimum.h b/configs/stm32f103-minimum/src/stm32f103_minimum.h
index 47691a195c676e08a49fca6581032446bbff5ebc..5495596a0be9890d6afde31ec0c04ace76bc4ace 100644
--- a/configs/stm32f103-minimum/src/stm32f103_minimum.h
+++ b/configs/stm32f103-minimum/src/stm32f103_minimum.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm32f103-minimum/src/stm32f103_minimum.h
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Laurent Latil 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -63,13 +63,61 @@
 /* GPIOs **************************************************************/
 /* LEDs */
 
-#define GPIO_LED        (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
-                         GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN13)
+#define GPIO_LED1         (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
+                           GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN13)
+/* BUTTONs */
+
+#define GPIO_BTN_USER1    (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\
+                           GPIO_EXTI|GPIO_PORTA|GPIO_PIN0)
+
+#define GPIO_BTN_USER2    (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\
+                           GPIO_EXTI|GPIO_PORTA|GPIO_PIN1)
+
+#define MIN_IRQBUTTON     BUTTON_USER1
+#define MAX_IRQBUTTON     BUTTON_USER2
+#define NUM_IRQBUTTONS    (BUTTON_USER1 - BUTTON_USER2 + 1)
+
+
+/* SPI chip selects */
+
+#define GPIO_CS_MFRC522   (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
+                           GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
+
+#define STM32_LCD_CS      (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
+                           GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
+
+#define GPIO_NRF24L01_CS  (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
+                           GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
+
+#define GPIO_SDCARD_CS    (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
+                           GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
+
+#define STM32_LCD_RST     (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
+                           GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN3)
+
+#define STM32_LCD_RS      (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
+                           GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN2)
+
+/* PWN Configuration */
+
+#define STM32F103MINIMUM_PWMTIMER   3
+#define STM32F103MINIMUM_PWMCHANNEL 3
+
+/* nRF24 Configuration */
+
+/* NRF24L01 chip enable:  PB.1 */
+
+#define GPIO_NRF24L01_CE  (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
+                           GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN1)
+
+/* NRF24L01 IRQ line:  PA.0 */
+
+#define GPIO_NRF24L01_IRQ (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTA|GPIO_PIN0)
 
 /* USB Soft Connect Pullup: PC.13 */
 
-#define GPIO_USB_PULLUP (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
-                         GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN13)
+#define GPIO_USB_PULLUP   (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
+                           GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN13)
 
 /************************************************************************************
  * Public Functions
@@ -77,6 +125,26 @@
 
 #ifndef __ASSEMBLY__
 
+/****************************************************************************
+ * Name: stm32_bringup
+ *
+ * Description:
+ *   Perform architecture specific initialization
+ *
+ *   CONFIG_LIB_BOARDCTL=y:
+ *     If CONFIG_NSH_ARCHINITIALIZE=y:
+ *       Called from the NSH library (or other application)
+ *     Otherse, assumed to be called from some other application.
+ *
+ *   Otherwise CONFIG_BOARD_INITIALIZE=y:
+ *     Called from board_initialize().
+ *
+ *   Otherise, bad news:  Never called
+ *
+ ****************************************************************************/
+
+int stm32_bringup(void);
+
 /************************************************************************************
  * Name: stm32_spidev_initialize
  *
@@ -87,6 +155,38 @@
 
 void stm32_spidev_initialize(void);
 
+/****************************************************************************
+ * Name: stm32_qencoder_initialize
+ *
+ * Description:
+ *   Initialize and register a qencoder
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_QENCODER
+int stm32_qencoder_initialize(FAR const char *devpath, int timer);
+#endif
+
+/****************************************************************************
+ * Name stm32_rgbled_setup
+ *
+ * Description:
+ *   This function is called by board initialization logic to configure the
+ *   RGB LED driver.  This function will register the driver as /dev/rgbled0.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero is returned on success.  Otherwise, a negated errno value is
+ *   returned to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_RGBLED
+int stm32_rgbled_setup(void);
+#endif
+
 /************************************************************************************
  * Name: stm32_usbinitialize
  *
@@ -97,6 +197,72 @@ void stm32_spidev_initialize(void);
 
 void stm32_usbinitialize(void);
 
+/************************************************************************************
+ * Name: stm32_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PWM
+int stm32_pwm_setup(void);
+#endif
+
+/************************************************************************************
+ * Name: stm32_wlinitialize
+ *
+ * Description:
+ *   Initialize the NRF24L01 wireless module
+ *
+ * Input Parmeters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_WL_NRF24L01
+void stm32_wlinitialize(void);
+#endif
+
+/************************************************************************************
+ * Name: stm32_mfrc522initialize
+ *
+ * Description:
+ *   Function used to initialize the MFRC522 RFID Transceiver
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_CL_MFRC522
+int stm32_mfrc522initialize(FAR const char *devpath);
+#endif
+
+/************************************************************************************
+ * Name: stm32_tone_setup
+ *
+ * Description:
+ *   Function used to initialize a PWM and Oneshot timers to Audio Tone Generator.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_AUDIO_TONE
+int stm32_tone_setup(void);
+#endif
+
+/***********************************************************************************
+ * Name: stm32_veml6070initialize
+ *
+ * Description:
+ *   Called to configure an I2C and to register VEML6070 for the stm32f103-minimum
+ *   board.
+ *
+ ***********************************************************************************/
+
+#ifdef CONFIG_VEML6070
+int stm32_veml6070initialize(FAR const char *devpath);
+#endif
+
 #endif /* __ASSEMBLY__ */
 #endif /* __CONFIGS_STM32F103_MINIMUM_SRC_STM32F103_MINIMUM_H */
-
diff --git a/configs/stm32f103-minimum/usbnsh/Make.defs b/configs/stm32f103-minimum/usbnsh/Make.defs
index 9f134fbf1320e4c04dd1cb46bbf18c687b9019e7..79bc3fa28406d4e210f954f64f5d0672644e74ff 100644
--- a/configs/stm32f103-minimum/usbnsh/Make.defs
+++ b/configs/stm32f103-minimum/usbnsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f103-minimum/usbnsh/defconfig b/configs/stm32f103-minimum/usbnsh/defconfig
index 84579e2f49f848e0ce7884cc18c81dc8c7a53947..3335a533e5f2cad4386522516a34271ea82d824e 100644
--- a/configs/stm32f103-minimum/usbnsh/defconfig
+++ b/configs/stm32f103-minimum/usbnsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +199,7 @@ CONFIG_ARCH_CHIP_STM32F103C8=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -405,6 +406,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -416,9 +423,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -514,18 +529,16 @@ CONFIG_ARCH_BOARD="stm32f103-minimum"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -537,9 +550,12 @@ CONFIG_BOARDCTL_USBDEVCTRL=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=7
@@ -632,6 +648,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -647,6 +664,7 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
@@ -660,8 +678,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -669,6 +697,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -677,9 +706,9 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -725,6 +754,7 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -769,16 +799,22 @@ CONFIG_CDCACM_VENDORSTR="NuttX"
 CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+CONFIG_HAVE_USBTRACE=y
+# CONFIG_USBMONITOR is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_NONE=y
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -816,12 +852,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -886,7 +916,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -894,8 +923,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -921,16 +952,15 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -939,35 +969,34 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -989,8 +1018,8 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1055,7 +1084,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1077,6 +1105,7 @@ CONFIG_NSH_DISABLE_UNAME=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1119,12 +1148,13 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1132,8 +1162,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
-# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
-# CONFIG_SYSTEM_USBMONITOR is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f103-minimum/userled/Make.defs b/configs/stm32f103-minimum/userled/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..d7974b005f7218d4df16d38374fb60a2c3d823d3
--- /dev/null
+++ b/configs/stm32f103-minimum/userled/Make.defs
@@ -0,0 +1,113 @@
+############################################################################
+# configs/stm32f103-minimum/userled/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/stm3210e-eval/buttons/defconfig b/configs/stm32f103-minimum/userled/defconfig
similarity index 77%
rename from configs/stm3210e-eval/buttons/defconfig
rename to configs/stm32f103-minimum/userled/defconfig
index 11783f5652943bd32781d8965f87b2f9eb5d9639..718e1bd1a820530f847013bc029e8914cd82540c 100644
--- a/configs/stm3210e-eval/buttons/defconfig
+++ b/configs/stm32f103-minimum/userled/defconfig
@@ -7,15 +7,11 @@
 # Build Setup
 #
 # CONFIG_EXPERIMENTAL is not set
-# CONFIG_DEFAULT_SMALL is not set
-# CONFIG_HOST_LINUX is not set
+CONFIG_DEFAULT_SMALL=y
+CONFIG_HOST_LINUX=y
 # CONFIG_HOST_OSX is not set
-CONFIG_HOST_WINDOWS=y
+# CONFIG_HOST_WINDOWS is not set
 # CONFIG_HOST_OTHER is not set
-# CONFIG_WINDOWS_NATIVE is not set
-CONFIG_WINDOWS_CYGWIN=y
-# CONFIG_WINDOWS_MSYS is not set
-# CONFIG_WINDOWS_OTHER is not set
 
 #
 # Build Configuration
@@ -28,9 +24,9 @@ CONFIG_BUILD_FLAT=y
 # Binary Output Formats
 #
 # CONFIG_RRLOAD_BINARY is not set
-CONFIG_INTELHEX_BINARY=y
+# CONFIG_INTELHEX_BINARY is not set
 # CONFIG_MOTOROLA_SREC is not set
-# CONFIG_RAW_BINARY is not set
+CONFIG_RAW_BINARY=y
 # CONFIG_UBOOT_UIMAGE is not set
 
 #
@@ -46,10 +42,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -140,19 +136,15 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
-# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
-# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
-# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
-CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
-# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set
-# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
-# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set
-# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
 CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_SERIAL_TERMIOS is not set
+CONFIG_SERIAL_TERMIOS=y
 
 #
 # STM32 Configuration Options
@@ -193,7 +185,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103T8 is not set
 # CONFIG_ARCH_CHIP_STM32F103TB is not set
 # CONFIG_ARCH_CHIP_STM32F103C4 is not set
-# CONFIG_ARCH_CHIP_STM32F103C8 is not set
+CONFIG_ARCH_CHIP_STM32F103C8=y
 # CONFIG_ARCH_CHIP_STM32F103CB is not set
 # CONFIG_ARCH_CHIP_STM32F103R8 is not set
 # CONFIG_ARCH_CHIP_STM32F103RB is not set
@@ -205,8 +197,9 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VB is not set
 # CONFIG_ARCH_CHIP_STM32F103VC is not set
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
-CONFIG_ARCH_CHIP_STM32F103ZE=y
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -295,8 +288,8 @@ CONFIG_STM32_STM32F10XX=y
 # CONFIG_STM32_CONNECTIVITYLINE is not set
 CONFIG_STM32_PERFORMANCELINE=y
 # CONFIG_STM32_USBACCESSLINE is not set
-CONFIG_STM32_HIGHDENSITY=y
-# CONFIG_STM32_MEDIUMDENSITY is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+CONFIG_STM32_MEDIUMDENSITY=y
 # CONFIG_STM32_LOWDENSITY is not set
 # CONFIG_STM32_STM32F20XX is not set
 # CONFIG_STM32_STM32F205 is not set
@@ -314,7 +307,7 @@ CONFIG_STM32_HIGHDENSITY=y
 # CONFIG_STM32_STM32F429 is not set
 # CONFIG_STM32_STM32F446 is not set
 # CONFIG_STM32_STM32F469 is not set
-CONFIG_STM32_DFU=y
+# CONFIG_STM32_DFU is not set
 
 #
 # STM32 Peripheral Support
@@ -322,7 +315,7 @@ CONFIG_STM32_DFU=y
 # CONFIG_STM32_HAVE_CCM is not set
 CONFIG_STM32_HAVE_USBDEV=y
 # CONFIG_STM32_HAVE_OTGFS is not set
-CONFIG_STM32_HAVE_FSMC=y
+# CONFIG_STM32_HAVE_FSMC is not set
 # CONFIG_STM32_HAVE_LTDC is not set
 CONFIG_STM32_HAVE_USART3=y
 CONFIG_STM32_HAVE_UART4=y
@@ -356,8 +349,8 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
-CONFIG_STM32_HAVE_DAC1=y
-CONFIG_STM32_HAVE_DAC2=y
+# CONFIG_STM32_HAVE_DAC1 is not set
+# CONFIG_STM32_HAVE_DAC2 is not set
 # CONFIG_STM32_HAVE_RNG is not set
 # CONFIG_STM32_HAVE_ETHMAC is not set
 CONFIG_STM32_HAVE_I2C2=y
@@ -377,9 +370,6 @@ CONFIG_STM32_HAVE_SPI3=y
 # CONFIG_STM32_CRC is not set
 # CONFIG_STM32_DMA1 is not set
 # CONFIG_STM32_DMA2 is not set
-# CONFIG_STM32_DAC1 is not set
-# CONFIG_STM32_DAC2 is not set
-CONFIG_STM32_FSMC=y
 # CONFIG_STM32_I2C1 is not set
 # CONFIG_STM32_I2C2 is not set
 # CONFIG_STM32_PWR is not set
@@ -396,7 +386,7 @@ CONFIG_STM32_FSMC=y
 # CONFIG_STM32_TIM7 is not set
 # CONFIG_STM32_TIM8 is not set
 CONFIG_STM32_USART1=y
-CONFIG_STM32_USART2=y
+# CONFIG_STM32_USART2 is not set
 # CONFIG_STM32_USART3 is not set
 # CONFIG_STM32_UART4 is not set
 # CONFIG_STM32_UART5 is not set
@@ -409,15 +399,19 @@ CONFIG_STM32_USART2=y
 # Alternate Pin Mapping
 #
 # CONFIG_STM32_USART1_REMAP is not set
-# CONFIG_STM32_USART2_REMAP is not set
 # CONFIG_STM32_JTAG_DISABLE is not set
-CONFIG_STM32_JTAG_FULL_ENABLE=y
+# CONFIG_STM32_JTAG_FULL_ENABLE is not set
 # CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
-# CONFIG_STM32_JTAG_SW_ENABLE is not set
-# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
+CONFIG_STM32_JTAG_SW_ENABLE=y
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
-# CONFIG_STM32_FSMC_SRAM is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -429,12 +423,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
-CONFIG_STM32_USART2_SERIALDRIVER=y
-# CONFIG_STM32_USART2_1WIREDRIVER is not set
-# CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -513,56 +512,52 @@ CONFIG_BOOT_RUNFROMFLASH=y
 # Boot Memory Configuration
 #
 CONFIG_RAM_START=0x20000000
-CONFIG_RAM_SIZE=65536
+CONFIG_RAM_SIZE=20480
 # CONFIG_ARCH_HAVE_SDRAM is not set
 
 #
 # Board Selection
 #
-CONFIG_ARCH_BOARD_STM3210E_EVAL=y
+# CONFIG_ARCH_BOARD_STM32_TINY is not set
+CONFIG_ARCH_BOARD_STM32F103_MINIMUM=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
-CONFIG_ARCH_BOARD="stm3210e-eval"
+CONFIG_ARCH_BOARD="stm32f103-minimum"
 
 #
 # Common Board Options
 #
 CONFIG_ARCH_HAVE_LEDS=y
-CONFIG_ARCH_LEDS=y
-CONFIG_ARCH_HAVE_BUTTONS=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_ARCH_IRQBUTTONS=y
+# CONFIG_ARCH_LEDS is not set
 
 #
 # Board-Specific Options
 #
-
-#
-# STM3210E-EVAL LCD Hardware Configuration
-#
-# CONFIG_STM3210E_LCD is not set
-# CONFIG_LIB_BOARDCTL is not set
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
 
 #
 # RTOS Features
 #
-CONFIG_DISABLE_OS_API=y
-CONFIG_DISABLE_POSIX_TIMERS=y
-CONFIG_DISABLE_PTHREAD=y
-# CONFIG_DISABLE_SIGNALS is not set
-CONFIG_DISABLE_MQUEUE=y
-CONFIG_DISABLE_ENVIRON=y
+# CONFIG_DISABLE_OS_API is not set
 
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=7
-CONFIG_START_DAY=7
+CONFIG_START_DAY=5
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=4
 CONFIG_WDOG_INTRESERVE=0
@@ -574,13 +569,19 @@ CONFIG_PREALLOC_TIMERS=4
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
-CONFIG_USER_ENTRYPOINT="buttons_main"
+CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
 # CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
-CONFIG_MAX_TASKS=8
+CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
-# CONFIG_SCHED_WAITPID is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
 
 #
 # Performance Monitoring
@@ -595,18 +596,20 @@ CONFIG_DEV_CONSOLE=y
 # CONFIG_FDCLONE_DISABLE is not set
 # CONFIG_FDCLONE_STDIO is not set
 CONFIG_SDCLONE_DISABLE=y
-CONFIG_NFILE_DESCRIPTORS=6
-CONFIG_NFILE_STREAMS=6
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
 CONFIG_NAME_MAX=32
 # CONFIG_PRIORITY_INHERITANCE is not set
 
 #
 # RTOS hooks
 #
-# CONFIG_BOARD_INITIALIZE is not set
+CONFIG_BOARD_INITIALIZE=y
+# CONFIG_BOARD_INITTHREAD is not set
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -614,13 +617,24 @@ CONFIG_NAME_MAX=32
 CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
 # CONFIG_MODULE is not set
 
 #
 # Work queue support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
-# CONFIG_SCHED_HPWORK is not set
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
 # CONFIG_SCHED_LPWORK is not set
 
 #
@@ -635,9 +649,10 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 #
 # Device Drivers
 #
-CONFIG_DISABLE_POLL=y
+# CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -653,12 +668,14 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -666,15 +683,27 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
-# CONFIG_USERLED is not set
+CONFIG_USERLED=y
+CONFIG_USERLED_LOWER=y
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -683,9 +712,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
-CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -701,7 +731,7 @@ CONFIG_DEV_LOWCONSOLE=y
 # CONFIG_SCI1_SERIALDRIVER is not set
 # CONFIG_USART0_SERIALDRIVER is not set
 CONFIG_USART1_SERIALDRIVER=y
-CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART2_SERIALDRIVER is not set
 # CONFIG_USART3_SERIALDRIVER is not set
 # CONFIG_USART4_SERIALDRIVER is not set
 # CONFIG_USART5_SERIALDRIVER is not set
@@ -710,12 +740,13 @@ CONFIG_USART2_SERIALDRIVER=y
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
 CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_USART1_SERIAL_CONSOLE=y
-# CONFIG_USART2_SERIAL_CONSOLE is not set
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
 
@@ -731,32 +762,26 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
-
-#
-# USART2 Configuration
-#
-CONFIG_USART2_RXBUFSIZE=256
-CONFIG_USART2_TXBUFSIZE=256
-CONFIG_USART2_BAUD=115200
-CONFIG_USART2_BITS=8
-CONFIG_USART2_PARITY=0
-CONFIG_USART2_2STOP=0
-# CONFIG_USART2_IFLOWCONTROL is not set
-# CONFIG_USART2_OFLOWCONTROL is not set
-# CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -777,21 +802,23 @@ CONFIG_USART2_2STOP=0
 #
 # File system configuration
 #
-CONFIG_DISABLE_MOUNTPOINT=y
-# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
 # CONFIG_FS_READABLE is not set
 # CONFIG_FS_WRITABLE is not set
 # CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -818,11 +845,12 @@ CONFIG_MM_REGIONS=1
 # Binary Loader
 #
 # CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
 # CONFIG_NXFLAT is not set
 # CONFIG_ELF is not set
-# CONFIG_BUILTIN is not set
+CONFIG_BUILTIN=y
 # CONFIG_PIC is not set
-# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+CONFIG_SYMTAB_ORDEREDBYNAME=y
 
 #
 # Library Routines
@@ -834,10 +862,11 @@ CONFIG_MM_REGIONS=1
 CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBM is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
-CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_LONG_LONG is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
@@ -850,10 +879,10 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
 CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -861,8 +890,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -874,6 +905,11 @@ CONFIG_ARCH_HAVE_TLS=y
 # Application Configuration
 #
 
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
 #
 # CAN Utilities
 #
@@ -881,67 +917,58 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Examples
 #
-CONFIG_EXAMPLES_BUTTONS=y
-CONFIG_EXAMPLES_BUTTONS_MIN=0
-CONFIG_EXAMPLES_BUTTONS_MAX=7
-CONFIG_EXAMPLES_IRQBUTTONS_MIN=2
-CONFIG_EXAMPLES_IRQBUTTONS_MAX=7
-CONFIG_EXAMPLES_BUTTONS_NAME0="WAKEUP"
-CONFIG_EXAMPLES_BUTTONS_NAME1="TAMPER"
-CONFIG_EXAMPLES_BUTTONS_NAME2="KEY"
-CONFIG_EXAMPLES_BUTTONS_NAME3="SELECT"
-CONFIG_EXAMPLES_BUTTONS_NAME4="DOWN"
-CONFIG_EXAMPLES_BUTTONS_NAME5="LEFT"
-CONFIG_EXAMPLES_BUTTONS_NAME6="RIGHT"
-CONFIG_EXAMPLES_BUTTONS_NAME7="UP"
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+CONFIG_EXAMPLES_LEDS=y
+CONFIG_EXAMPLES_LEDS_PRIORITY=100
+CONFIG_EXAMPLES_LEDS_STACKSIZE=2048
+CONFIG_EXAMPLES_LEDS_DEVPATH="/dev/userleds"
+CONFIG_EXAMPLES_LEDS_LEDSET=0x0f
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
 # CONFIG_EXAMPLES_NRF24L01TERM is not set
-# CONFIG_EXAMPLES_NSH is not set
+CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -963,8 +990,9 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="UP"
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -974,6 +1002,7 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="UP"
 #
 # Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
@@ -983,7 +1012,97 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="UP"
 #
 # NSH Library
 #
-# CONFIG_NSH_LIBRARY is not set
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=80
+CONFIG_NSH_DISABLE_SEMICOLON=y
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_NESTDEPTH=3
+CONFIG_NSH_DISABLEBG=y
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+CONFIG_NSH_DISABLE_ADDROUTE=y
+CONFIG_NSH_DISABLE_BASENAME=y
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+CONFIG_NSH_DISABLE_CMP=y
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+CONFIG_NSH_DISABLE_DF=y
+CONFIG_NSH_DISABLE_DELROUTE=y
+CONFIG_NSH_DISABLE_DIRNAME=y
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+CONFIG_NSH_DISABLE_IFCONFIG=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+CONFIG_NSH_DISABLE_LOSETUP=y
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+CONFIG_NSH_DISABLE_TIME=y
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+CONFIG_NSH_DISABLE_UNAME=y
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CODECS_BUFSIZE=128
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_NSH_FILEIOSIZE=1024
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+CONFIG_NSH_DISABLE_ITEF=y
+CONFIG_NSH_DISABLE_LOOPS=y
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -997,16 +1116,21 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="UP"
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
-# CONFIG_READLINE_HAVE_EXTMATCH is not set
-# CONFIG_SYSTEM_READLINE is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f103-minimum/userled/setenv.sh b/configs/stm32f103-minimum/userled/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..73dfab5a4d0b4ffc9b5d6cc3c7dd42df6131bd7e
--- /dev/null
+++ b/configs/stm32f103-minimum/userled/setenv.sh
@@ -0,0 +1,100 @@
+#!/bin/bash
+# configs//stm32f103-minimum/nsh/setenv.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/stm32f103-minimum/veml6070/Make.defs b/configs/stm32f103-minimum/veml6070/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..c6d573f6ea20b37f92ac3f64baf9b057b44e0be3
--- /dev/null
+++ b/configs/stm32f103-minimum/veml6070/Make.defs
@@ -0,0 +1,113 @@
+############################################################################
+# configs/stm32f103-minimum/vem6070/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/stm32f103-minimum/veml6070/defconfig b/configs/stm32f103-minimum/veml6070/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..325c8344756b26c0a80ba1c710e0eb0802c59dc9
--- /dev/null
+++ b/configs/stm32f103-minimum/veml6070/defconfig
@@ -0,0 +1,1194 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+CONFIG_DEFAULT_SMALL=y
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+# CONFIG_INTELHEX_BINARY is not set
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+CONFIG_ARCH_CORTEXM3=y
+# CONFIG_ARCH_CORTEXM4 is not set
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+# CONFIG_ARCH_HAVE_FPU is not set
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+# CONFIG_DEBUG_HARDFAULT is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+CONFIG_SERIAL_TERMIOS=y
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+CONFIG_ARCH_CHIP_STM32F103C8=y
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+# CONFIG_ARCH_CHIP_STM32F407ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+CONFIG_STM32_STM32F10XX=y
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+CONFIG_STM32_PERFORMANCELINE=y
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+CONFIG_STM32_MEDIUMDENSITY=y
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+# CONFIG_STM32_STM32F40XX is not set
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+# CONFIG_STM32_STM32F407 is not set
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+# CONFIG_STM32_HAVE_CCM is not set
+CONFIG_STM32_HAVE_USBDEV=y
+# CONFIG_STM32_HAVE_OTGFS is not set
+# CONFIG_STM32_HAVE_FSMC is not set
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+# CONFIG_STM32_HAVE_USART6 is not set
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+# CONFIG_STM32_HAVE_TIM2 is not set
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+# CONFIG_STM32_HAVE_TIM9 is not set
+# CONFIG_STM32_HAVE_TIM10 is not set
+# CONFIG_STM32_HAVE_TIM11 is not set
+# CONFIG_STM32_HAVE_TIM12 is not set
+# CONFIG_STM32_HAVE_TIM13 is not set
+# CONFIG_STM32_HAVE_TIM14 is not set
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+# CONFIG_STM32_HAVE_CAN2 is not set
+# CONFIG_STM32_HAVE_DAC1 is not set
+# CONFIG_STM32_HAVE_DAC2 is not set
+# CONFIG_STM32_HAVE_RNG is not set
+# CONFIG_STM32_HAVE_ETHMAC is not set
+CONFIG_STM32_HAVE_I2C2=y
+# CONFIG_STM32_HAVE_I2C3 is not set
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKP is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+CONFIG_STM32_I2C1=y
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_PWR is not set
+# CONFIG_STM32_SDIO is not set
+# CONFIG_STM32_SPI1 is not set
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+CONFIG_STM32_USART1=y
+# CONFIG_STM32_USART2 is not set
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USB is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+CONFIG_STM32_I2C=y
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_I2C1_REMAP is not set
+# CONFIG_STM32_USART1_REMAP is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+# CONFIG_STM32_JTAG_FULL_ENABLE is not set
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+CONFIG_STM32_JTAG_SW_ENABLE=y
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
+# CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+
+#
+# I2C Configuration
+#
+CONFIG_STM32_I2C_ALT=y
+# CONFIG_STM32_I2C_DYNTIMEO is not set
+CONFIG_STM32_I2CTIMEOSEC=0
+CONFIG_STM32_I2CTIMEOMS=500
+CONFIG_STM32_I2CTIMEOTICKS=500
+# CONFIG_STM32_I2C_DUTY16_9 is not set
+CONFIG_STM32_HAVE_RTC_COUNTER=y
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=5483
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=20480
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_STM32_TINY is not set
+CONFIG_ARCH_BOARD_STM32F103_MINIMUM=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="stm32f103-minimum"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+# CONFIG_ARCH_BUTTONS is not set
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+# CONFIG_DISABLE_OS_API is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=7
+CONFIG_START_DAY=5
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+CONFIG_BOARD_INITIALIZE=y
+# CONFIG_BOARD_INITTHREAD is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+CONFIG_I2C=y
+# CONFIG_I2C_SLAVE is not set
+# CONFIG_I2C_POLLED is not set
+# CONFIG_I2C_RESET is not set
+# CONFIG_I2C_TRACE is not set
+# CONFIG_I2C_DRIVER is not set
+# CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_TIMERS_CS2100CP is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+CONFIG_SENSORS=y
+# CONFIG_AS5048B is not set
+# CONFIG_BH1750FVI is not set
+# CONFIG_BMG160 is not set
+# CONFIG_BMP180 is not set
+# CONFIG_SENSOR_KXTJ9 is not set
+# CONFIG_LIS3DSH is not set
+# CONFIG_LIS331DL is not set
+# CONFIG_SN_LSM9DS1 is not set
+# CONFIG_MB7040 is not set
+# CONFIG_MLX90393 is not set
+# CONFIG_MCP9844 is not set
+# CONFIG_MS58XX is not set
+CONFIG_MS58XX_VDD=30
+# CONFIG_MPL115A is not set
+# CONFIG_SENSORS_ADXL345 is not set
+# CONFIG_MAX31855 is not set
+# CONFIG_MAX6675 is not set
+# CONFIG_LIS3MDL is not set
+# CONFIG_LM75 is not set
+# CONFIG_LM92 is not set
+# CONFIG_QENCODER is not set
+CONFIG_VEML6070=y
+# CONFIG_XEN1210 is not set
+# CONFIG_ZEROCROSS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART1_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART1 Configuration
+#
+CONFIG_USART1_RXBUFSIZE=256
+CONFIG_USART1_TXBUFSIZE=256
+CONFIG_USART1_BAUD=115200
+CONFIG_USART1_BITS=8
+CONFIG_USART1_PARITY=0
+CONFIG_USART1_2STOP=0
+# CONFIG_USART1_IFLOWCONTROL is not set
+# CONFIG_USART1_OFLOWCONTROL is not set
+# CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
+# CONFIG_FS_READABLE is not set
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+CONFIG_SYMTAB_ORDEREDBYNAME=y
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+# CONFIG_LIBC_LONG_LONG is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=80
+CONFIG_NSH_DISABLE_SEMICOLON=y
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_NESTDEPTH=3
+CONFIG_NSH_DISABLEBG=y
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+CONFIG_NSH_DISABLE_ADDROUTE=y
+CONFIG_NSH_DISABLE_BASENAME=y
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+CONFIG_NSH_DISABLE_CMP=y
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+CONFIG_NSH_DISABLE_DF=y
+CONFIG_NSH_DISABLE_DELROUTE=y
+CONFIG_NSH_DISABLE_DIRNAME=y
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+CONFIG_NSH_DISABLE_IFCONFIG=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+CONFIG_NSH_DISABLE_LOSETUP=y
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+CONFIG_NSH_DISABLE_TIME=y
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+CONFIG_NSH_DISABLE_UNAME=y
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CODECS_BUFSIZE=128
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_NSH_FILEIOSIZE=1024
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+CONFIG_NSH_DISABLE_ITEF=y
+CONFIG_NSH_DISABLE_LOOPS=y
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_I2CTOOL is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f103-minimum/veml6070/setenv.sh b/configs/stm32f103-minimum/veml6070/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..efcbfee1429b75babd2060867f75a562eae5923c
--- /dev/null
+++ b/configs/stm32f103-minimum/veml6070/setenv.sh
@@ -0,0 +1,100 @@
+#!/bin/bash
+# configs//stm32f103-minimum/veml6070/setenv.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/stm32f3discovery/Kconfig b/configs/stm32f3discovery/Kconfig
index de0d2da5f804e52caef006e5cd5f5693dae789c8..71e736df11f7abd50c7f6c87fde9721ea4c84f88 100644
--- a/configs/stm32f3discovery/Kconfig
+++ b/configs/stm32f3discovery/Kconfig
@@ -5,6 +5,11 @@
 
 if ARCH_BOARD_STM32F3_DISCOVERY
 
+config STM32F3DISCO_QETIMER
+	int "Timer to use with QE encoder"
+	default 3
+	depends on QENCODER
+
 config PM_BUTTONS
 	bool "PM Button support"
 	default n
diff --git a/configs/stm32f3discovery/README.txt b/configs/stm32f3discovery/README.txt
index 4c5a16c803e92b2de4a37286e7d786f0014ce057..8cb94aa2f70032c679913c5168204f9b2b331238 100644
--- a/configs/stm32f3discovery/README.txt
+++ b/configs/stm32f3discovery/README.txt
@@ -637,7 +637,7 @@ STM32F3Discovery-specific Configuration Options
     CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
     CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
     CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
-    CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+    CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
       dump of all CAN registers.
 
   STM32F3Discovery SPI Configuration
@@ -778,7 +778,6 @@ Where  is one of the following:
        the system logging device:
 
        Device Drivers -> System Logging Device Options:
-         CONFIG_SYSLOG=y                    : Enable output to syslog, not console
          CONFIG_SYSLOG_CHAR=y               : Use a character device for system logging
          CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : USART2 will be /dev/ttyS0
 
@@ -807,15 +806,15 @@ Where  is one of the following:
           CONFIG_NSH_ARCHINIT=y                   : Automatically start the USB monitor
 
         Application Configuration -> System NSH Add-Ons:
-          CONFIG_SYSTEM_USBMONITOR=y              : Enable the USB monitor daemon
-          CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
-          CONFIG_SYSTEM_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
-          CONFIG_SYSTEM_USBMONITOR_INTERVAL=1     : Dump trace data every second
-          CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y    : Enable TRACE output
-          CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y
-          CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y
-          CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y
-          CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y
+          CONFIG_USBMONITOR=y              : Enable the USB monitor daemon
+          CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
+          CONFIG_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
+          CONFIG_USBMONITOR_INTERVAL=1     : Dump trace data every second
+          CONFIG_USBMONITOR_TRACEINIT=y    : Enable TRACE output
+          CONFIG_USBMONITOR_TRACECLASS=y
+          CONFIG_USBMONITOR_TRACETRANSFERS=y
+          CONFIG_USBMONITOR_TRACECONTROLLER=y
+          CONFIG_USBMONITOR_TRACEINTERRUPTS=y
 
        NOTE: USB debug output also be enabled in this case.  Both will appear
        on the serial SYSLOG output.  However, the debug output will be
diff --git a/configs/stm32f3discovery/include/board.h b/configs/stm32f3discovery/include/board.h
index e1fd1ed2a3dafc28e9acca9ac36a2e1e362e8de6..bde225476e19da1e7b8aed2a990acfbe27253b11 100644
--- a/configs/stm32f3discovery/include/board.h
+++ b/configs/stm32f3discovery/include/board.h
@@ -1,8 +1,7 @@
 /************************************************************************************
  * configs/stm32f3discovery/include/board.h
- * include/arch/board/board.h
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -92,13 +91,14 @@
 
 #define STM32_RCC_CFGR_PPRE2    RCC_CFGR_PPRE2_HCLK
 #define STM32_PCLK2_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_APB2_CLKIN        (STM32_PCLK2_FREQUENCY)   /* Timers 2-7, 12-14 */
+#define STM32_APB2_CLKIN        (STM32_PCLK2_FREQUENCY)   /* Timers 1 and 8, 15-17 */
 
-/* APB2 timers 1 and 8 will receive PCLK2. */
+/* APB2 timers 1 and 8, 15-17 will receive PCLK2. */
+
+/* Timers driven from APB2 will be PCLK2 */
 
 #define STM32_APB2_TIM1_CLKIN   (STM32_PCLK2_FREQUENCY)
 #define STM32_APB2_TIM8_CLKIN   (STM32_PCLK2_FREQUENCY)
-
 #define STM32_APB1_TIM15_CLKIN  (STM32_PCLK2_FREQUENCY)
 #define STM32_APB1_TIM16_CLKIN  (STM32_PCLK2_FREQUENCY)
 #define STM32_APB1_TIM17_CLKIN  (STM32_PCLK2_FREQUENCY)
@@ -108,50 +108,32 @@
 #define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd2
 #define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
 
-/* APB1 timers 2-4 will be twice PCLK1 (REVISIT) */
-
-#define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM6_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM7_CLKIN   (STM32_PCLK1_FREQUENCY)
-
-/* USB divider -- Divide PLL clock by 1.5 */
-
-#define STM32_CFGR_USBPRE       0
-
-/* Timers driven from APB1 will be twice PCLK1 */
+/* APB1 timers 2-7 will be twice PCLK1 */
 
 #define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM12_CLKIN  (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM13_CLKIN  (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM14_CLKIN  (2*STM32_PCLK1_FREQUENCY)
 
-/* APB2 clock (PCLK2) is HCLK/2 (84MHz) */
-
-#define STM32_RCC_CFGR_PPRE2    RCC_CFGR_PPRE2_HCLKd2     /* PCLK2 = HCLK / 2 */
-#define STM32_PCLK2_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
+/* USB divider -- Divide PLL clock by 1.5 */
 
-/* Timers driven from APB2 will be twice PCLK2 */
+#define STM32_CFGR_USBPRE       0
 
-#define STM32_APB2_TIM1_CLKIN   (2*STM32_PCLK2_FREQUENCY)
-#define STM32_APB2_TIM8_CLKIN   (2*STM32_PCLK2_FREQUENCY)
-#define STM32_APB2_TIM9_CLKIN   (2*STM32_PCLK2_FREQUENCY)
-#define STM32_APB2_TIM10_CLKIN  (2*STM32_PCLK2_FREQUENCY)
-#define STM32_APB2_TIM11_CLKIN  (2*STM32_PCLK2_FREQUENCY)
 
 /* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
  * otherwise frequency is 2xAPBx.
  * Note: TIM1,8 are on APB2, others on APB1
  */
 
-#define STM32_TIM18_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_TIM27_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM3_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM4_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM5_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM6_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM7_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM8_FREQUENCY    STM32_HCLK_FREQUENCY
 
 /* LED definitions ******************************************************************/
 /* The STM32F3Discovery board has ten LEDs.  Two of these are controlled by logic on
diff --git a/configs/stm32f3discovery/nsh/Make.defs b/configs/stm32f3discovery/nsh/Make.defs
index 02c4d7cfb3e6c7da70fa6d9b0d06e9531e8f9a21..932fa94560f036ba3c0ac256770a269d9fd0a923 100644
--- a/configs/stm32f3discovery/nsh/Make.defs
+++ b/configs/stm32f3discovery/nsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f3discovery/nsh/defconfig b/configs/stm32f3discovery/nsh/defconfig
index 9c48a2059a956de78493b9f7bb76d508d1a93cc5..4a91033d6f8f0b1114a5af4d92b8d71befde5233 100644
--- a/configs/stm32f3discovery/nsh/defconfig
+++ b/configs/stm32f3discovery/nsh/defconfig
@@ -46,10 +46,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +65,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,7 +77,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -208,6 +208,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -419,6 +420,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -429,9 +436,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -530,18 +545,16 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -558,9 +571,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=12
@@ -653,6 +669,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -668,6 +685,7 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
@@ -681,8 +699,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -690,6 +718,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -698,10 +727,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -747,6 +776,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -789,17 +819,22 @@ CONFIG_CDCACM_VENDORSTR="NuttX"
 CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -837,12 +872,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -907,7 +936,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -915,8 +943,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -950,7 +980,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_BUTTONS is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -958,10 +987,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -971,35 +1000,34 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1021,8 +1049,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1087,7 +1115,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1109,6 +1136,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1147,12 +1175,14 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
+CONFIG_SYSTEM_CDCACM=y
+CONFIG_SYSTEM_CDCACM_DEVMINOR=0
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1160,8 +1190,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
-CONFIG_SYSTEM_CDCACM=y
-CONFIG_SYSTEM_CDCACM_DEVMINOR=0
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f3discovery/src/stm32_appinit.c b/configs/stm32f3discovery/src/stm32_appinit.c
index 3d23db62969d10c60d783a748c6810b7de135796..6007b0a4f6cff1b1ac78aafa3efb2ce3d19e776b 100644
--- a/configs/stm32f3discovery/src/stm32_appinit.c
+++ b/configs/stm32f3discovery/src/stm32_appinit.c
@@ -46,8 +46,8 @@
 
 #include 
 
-#ifdef CONFIG_SYSTEM_USBMONITOR
-#  include 
+#ifdef CONFIG_USBMONITOR
+#  include 
 #endif
 
 #include "stm32.h"
@@ -80,7 +80,7 @@
 
 /* Check if we should enable the USB monitor before starting NSH */
 
-#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_SYSTEM_USBMONITOR)
+#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_USBMONITOR)
 #  undef HAVE_USBMONITOR
 #endif
 
@@ -115,17 +115,40 @@
 
 int board_app_initialize(uintptr_t arg)
 {
-#ifdef HAVE_USBMONITOR
-  int ret;
+  int ret = OK;
 
+#ifdef HAVE_USBMONITOR
   /* Start the USB Monitor */
 
-  ret = usbmonitor_start(0, NULL);
+  ret = usbmonitor_start();
   if (ret != OK)
     {
       syslog(LOG_ERR, "ERROR: Failed to start USB monitor: %d\n", ret);
     }
 #endif
 
-  return OK;
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device. */
+
+  ret = stm32_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_pwm_setup() failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_QENCODER
+  /* Initialize and register the qencoder driver */
+
+  ret = stm32_qencoder_initialize("/dev/qe0", CONFIG_STM32F3DISCO_QETIMER);
+  if (ret != OK)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to register the qencoder: %d\n",
+             ret);
+      return ret;
+    }
+#endif
+
+  return ret;
 }
diff --git a/configs/stm32f3discovery/src/stm32_autoleds.c b/configs/stm32f3discovery/src/stm32_autoleds.c
index d55a5835ce35c3d9e2bde3bc2dc499a6ded6f2c4..313176f561e201ffec4690580fead2a90087113a 100644
--- a/configs/stm32f3discovery/src/stm32_autoleds.c
+++ b/configs/stm32f3discovery/src/stm32_autoleds.c
@@ -52,22 +52,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
diff --git a/configs/stm32f3discovery/src/stm32_buttons.c b/configs/stm32f3discovery/src/stm32_buttons.c
index db0d6418313ad16ffa7cbf75c5c6b1e18c3391ba..f89fd207a3bd4a82caa6c88d283ebbf56461ebae 100644
--- a/configs/stm32f3discovery/src/stm32_buttons.c
+++ b/configs/stm32f3discovery/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/stm32f3discovery/src/stm32_buttons.c
  *
- *   Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -49,18 +50,10 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /* Pin configuration for each STM32F3Discovery button.  This array is indexed by
  * the BUTTON_* definitions in board.h
  */
@@ -146,24 +139,23 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   /* The following should be atomic */
 
   if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
     {
-      oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler, arg);
     }
 
-  return oldhandler;
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/stm32f3discovery/src/stm32_pwm.c b/configs/stm32f3discovery/src/stm32_pwm.c
index 7b1dd6830a9f190344f32c5ffc3818533bc1c052..262c1bc851a7d060a5f1121966a2ac283ca5eae3 100644
--- a/configs/stm32f3discovery/src/stm32_pwm.c
+++ b/configs/stm32f3discovery/src/stm32_pwm.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm32f3discovery/src/stm32_pwm.c
  *
- *   Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -43,7 +43,7 @@
 #include 
 
 #include 
-#include 
+#include 
 
 #include 
 
@@ -58,9 +58,9 @@
 /* Configuration *******************************************************************/
 /* PWM
  *
- * The stm32f3discovery has no real on-board PWM devices, but the board can be configured to output
- * a pulse train using TIM4 CH2.  This pin is used by FSMC is connect to CN5 just for this
- * purpose:
+ * The stm32f3discovery has no real on-board PWM devices, but the board can be
+ * configured to output a pulse train using TIM4 CH2.  This pin is used by FSMC is
+ * connected to CN5 just for this purpose:
  *
  * PD13 FSMC_A18 / MC_TIM4_CH2OUT pin 33 (EnB)
  *
@@ -85,27 +85,21 @@
 #  undef HAVE_PWM
 #endif
 
-#ifdef HAVE_PWM
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_pwm_setup
+ * Name: stm32_pwm_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/pwm.
+ *   Initialize PWM and register the PWM device.
  *
  ************************************************************************************/
 
-int board_pwm_setup(void)
+int stm32_pwm_setup(void)
 {
+#ifdef HAVE_PWM
   static bool initialized = false;
   struct pwm_lowerhalf_s *pwm;
   int ret;
@@ -119,7 +113,7 @@ int board_pwm_setup(void)
       pwm = stm32_pwminitialize(STM32F3DISCOVERY_PWMTIMER);
       if (!pwm)
         {
-          dbg("Failed to get the STM32 PWM lower half\n");
+          aerr("ERROR: Failed to get the STM32 PWM lower half\n");
           return -ENODEV;
         }
 
@@ -128,7 +122,7 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/pwm0", pwm);
       if (ret < 0)
         {
-          adbg("pwm_register failed: %d\n", ret);
+          aerr("ERROR: pwm_register failed: %d\n", ret);
           return ret;
         }
 
@@ -138,6 +132,8 @@ int board_pwm_setup(void)
     }
 
   return OK;
+#else
+  return -ENODEV;
+#endif
 }
 
-#endif /* HAVE_PWM */
diff --git a/configs/stm32f3discovery/src/stm32_qencoder.c b/configs/stm32f3discovery/src/stm32_qencoder.c
index 88a45c0722853b9c112e405f37696ed835b8a2fa..76697af9809aab15b44cc51b88ed816e6d7d7318 100644
--- a/configs/stm32f3discovery/src/stm32_qencoder.c
+++ b/configs/stm32f3discovery/src/stm32_qencoder.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm32f3discovery/src/stm32_qencoder.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -50,83 +50,12 @@
 #include "stm32_qencoder.h"
 #include "stm32f3discovery.h"
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-/* Configuration *******************************************************************/
-/* Check if we have a timer configured for quadrature encoder -- assume YES. */
-
-#define HAVE_QENCODER 1
-
-/* If TIMn is not enabled (via CONFIG_STM32_TIMn), then the configuration cannot
- * specify TIMn as a quadrature encoder (via CONFIG_STM32_TIMn_QE).
- */
-
-#ifndef CONFIG_STM32_TIM1
-#  undef CONFIG_STM32_TIM1_QE
-#endif
-#ifndef CONFIG_STM32_TIM2
-#  undef CONFIG_STM32_TIM2_QE
-#endif
-#ifndef CONFIG_STM32_TIM3
-#  undef CONFIG_STM32_TIM3_QE
-#endif
-#ifndef CONFIG_STM32_TIM4
-#  undef CONFIG_STM32_TIM4_QE
-#endif
-#ifndef CONFIG_STM32_TIM5
-#  undef CONFIG_STM32_TIM5_QE
-#endif
-#ifndef CONFIG_STM32_TIM8
-#  undef CONFIG_STM32_TIM8_QE
-#endif
-
-/* If the upper-half quadrature encoder driver is not enabled, then we cannot
- * support the quadrature encoder.
- */
-
-#ifndef CONFIG_QENCODER
-#  undef HAVE_QENCODER
-#endif
-
-/* Which Timer should we use, TIMID={1,2,3,4,5,8}.  If multiple timers are
- * configured as quadrature encoders, this logic will arbitrarily select
- * the lowest numbered timer.
- *
- * At least one TIMn, n={1,2,3,4,5,8}, must be both enabled and configured
- * as a quadrature encoder in order to support the lower half quadrature
- * encoder driver.  The above check assures that if CONFIG_STM32_TIMn_QE
- * is defined, then the correspdonding TIMn is also enabled.
- */
-
-#if defined CONFIG_STM32_TIM1_QE
-#  define TIMID 1
-#elif defined CONFIG_STM32_TIM2_QE
-#  define TIMID 2
-#elif defined CONFIG_STM32_TIM3_QE
-#  define TIMID 3
-#elif defined CONFIG_STM32_TIM4_QE
-#  define TIMID 4
-#elif defined CONFIG_STM32_TIM5_QE
-#  define TIMID 5
-#elif defined CONFIG_STM32_TIM8_QE
-#  define TIMID 8
-#else
-#  undef HAVE_QENCODER
-#endif
-
-#ifdef HAVE_QENCODER
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: qe_devinit
+ * Name: stm32_qencoder_initialize
  *
  * Description:
  *   All STM32 architectures must provide the following interface to work with
@@ -134,29 +63,20 @@
  *
  ************************************************************************************/
 
-int qe_devinit(void)
+int stm32_qencoder_initialize(FAR const char *devpath, int timer)
 {
-  static bool initialized = false;
   int ret;
 
-  /* Check if we are already initialized */
+  /* Initialize a quadrature encoder interface. */
 
-  if (!initialized)
+  sninfo("Initializing the quadrature encoder using TIM%d\n", timer);
+  ret = stm32_qeinitialize(devpath, timer);
+  if (ret < 0)
     {
-      /* Initialize a quadrature encoder interface. */
-
-      snvdbg("Initializing the quadrature encoder using TIM%d\n", TIMID);
-      ret = stm32_qeinitialize("/dev/qe0", TIMID);
-      if (ret < 0)
-        {
-          sndbg("stm32_qeinitialize failed: %d\n", ret);
-          return ret;
-        }
-
-      initialized = true;
+      snerr("ERROR: stm32_qeinitialize failed: %d\n", ret);
     }
 
-  return OK;
+  return ret;
 }
 
 #endif /* HAVE_QENCODER */
diff --git a/configs/stm32f3discovery/src/stm32_spi.c b/configs/stm32f3discovery/src/stm32_spi.c
index 6c8b28869eb6c658e8fa7346ecaeb9408a437db5..712db25d2dd50c74c9c90757b75b42fa70c5b0b9 100644
--- a/configs/stm32f3discovery/src/stm32_spi.c
+++ b/configs/stm32f3discovery/src/stm32_spi.c
@@ -54,32 +54,6 @@
 
 #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -129,7 +103,7 @@ void weak_function stm32_spidev_initialize(void)
 #ifdef CONFIG_STM32_SPI1
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
   stm32_gpiowrite(GPIO_MEMS_CS, !selected);
 }
@@ -143,7 +117,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI2
 void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -155,7 +129,7 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI3
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
diff --git a/configs/stm32f3discovery/src/stm32_usb.c b/configs/stm32f3discovery/src/stm32_usb.c
index bdeef5886d5b71d642fa5bcc0af22e39b36d8393..d824090bad3a8bd04b923a26022450cd5e080d76 100644
--- a/configs/stm32f3discovery/src/stm32_usb.c
+++ b/configs/stm32f3discovery/src/stm32_usb.c
@@ -121,10 +121,7 @@ int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable)
 
 void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("Resume: %d\n", resume);
 }
 
 #endif /* CONFIG_STM32_USB */
-
-
-
diff --git a/configs/stm32f3discovery/src/stm32_userleds.c b/configs/stm32f3discovery/src/stm32_userleds.c
index 8c5d8065a95ec383a43bb8659962203c1f742600..b68e261d1290327bdd1e92bb8064b6a3186efb69 100644
--- a/configs/stm32f3discovery/src/stm32_userleds.c
+++ b/configs/stm32f3discovery/src/stm32_userleds.c
@@ -51,22 +51,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
diff --git a/configs/stm32f3discovery/src/stm32f3discovery.h b/configs/stm32f3discovery/src/stm32f3discovery.h
index eb35061c01c811ab6eccf27c44237ae83da70384..0926778d8abba8bfb933d0b4b9997522043b0796 100644
--- a/configs/stm32f3discovery/src/stm32f3discovery.h
+++ b/configs/stm32f3discovery/src/stm32f3discovery.h
@@ -1,8 +1,7 @@
 /****************************************************************************************************
  * configs/stm32f3discovery/src/stm32f3discovery.h
- * arch/arm/src/board/stm32f3discovery.n
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -162,6 +161,30 @@ void weak_function stm32_spidev_initialize(void);
 void weak_function stm32_usbinitialize(void);
 #endif
 
+/************************************************************************************
+ * Name: stm32_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PWM
+int stm32_pwm_setup(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_qencoder_initialize
+ *
+ * Description:
+ *   Initialize and register a qencoder
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_QENCODER
+int stm32_qencoder_initialize(FAR const char *devpath, int timer);
+#endif
+
 #endif /* __ASSEMBLY__ */
 #endif /* __CONFIGS_STM32F3DISCOVERY_SRC_STM32F3DISCOVERY_H */
 
diff --git a/configs/stm32f3discovery/usbnsh/Make.defs b/configs/stm32f3discovery/usbnsh/Make.defs
index 2c82f6ebcef8e3ba42e6dc765be70de4596ee463..9ad12ec92d5f4a8ea4d885b5d361313c36b8cc2c 100644
--- a/configs/stm32f3discovery/usbnsh/Make.defs
+++ b/configs/stm32f3discovery/usbnsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f3discovery/usbnsh/defconfig b/configs/stm32f3discovery/usbnsh/defconfig
index ed5e23a9d98201a8a10cfd2f3c5a21fcea2ca38d..f33978f277cffc39c81e39a4f709aaecc9f90d77 100644
--- a/configs/stm32f3discovery/usbnsh/defconfig
+++ b/configs/stm32f3discovery/usbnsh/defconfig
@@ -46,10 +46,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +65,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,7 +77,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -208,6 +208,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -420,6 +421,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -430,9 +437,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -537,18 +552,16 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -565,9 +578,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=1
@@ -660,6 +676,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -679,9 +696,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -695,8 +717,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -704,6 +736,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -712,9 +745,9 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_SERIAL_REMOVABLE=y
+# CONFIG_SERIAL_CONSOLE is not set
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -760,6 +793,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -802,16 +836,23 @@ CONFIG_CDCACM_VENDORSTR="NuttX"
 CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+CONFIG_SYSLOG_CHAR=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+CONFIG_SYSLOG_CHAR_CRLF=y
+CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -849,14 +890,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-CONFIG_SYSLOG_CHAR=y
-CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
-
 #
 # Graphics Support
 #
@@ -921,7 +954,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -929,8 +961,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -964,7 +998,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_BUTTONS is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -972,10 +1005,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -985,35 +1018,34 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1035,8 +1067,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1101,7 +1133,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1123,6 +1154,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1161,12 +1193,13 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1174,7 +1207,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
-# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f411e-disco/include/board.h b/configs/stm32f411e-disco/include/board.h
index 46d2df971e002172b4f1c5dbafa39f0670c16133..a50e2d3a5335c8f59774307c25c084667c9ae028 100644
--- a/configs/stm32f411e-disco/include/board.h
+++ b/configs/stm32f411e-disco/include/board.h
@@ -163,8 +163,14 @@
  */
 /* REVISIT */
 
-#define STM32_TIM18_FREQUENCY   (2*STM32_PCLK2_FREQUENCY)
-#define STM32_TIM27_FREQUENCY   (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM1_FREQUENCY    (2 * STM32_PCLK2_FREQUENCY)
+#define BOARD_TIM2_FREQUENCY    (2 * STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM3_FREQUENCY    (2 * STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM4_FREQUENCY    (2 * STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM5_FREQUENCY    (2 * STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM6_FREQUENCY    (2 * STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM7_FREQUENCY    (2 * STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM8_FREQUENCY    (2 * STM32_PCLK2_FREQUENCY)
 
 /* SDIO dividers.  Note that slower clocking is required when DMA is disabled
  * in order to avoid RX overrun/TX underrun errors due to delayed responses
diff --git a/configs/stm32f411e-disco/nsh/Make.defs b/configs/stm32f411e-disco/nsh/Make.defs
index b0f06ba60b3bca4f885ae51c99380e2c65356f1b..1a3cbc6cb3888a54152735988d1691c32d5a3d79 100644
--- a/configs/stm32f411e-disco/nsh/Make.defs
+++ b/configs/stm32f411e-disco/nsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f411e-disco/nsh/defconfig b/configs/stm32f411e-disco/nsh/defconfig
index e9719959a96082e4cc065650b62e7c8d8a9682eb..5c0590cef0f24b7e4598dbcab11ee3c131aaedcd 100644
--- a/configs/stm32f411e-disco/nsh/defconfig
+++ b/configs/stm32f411e-disco/nsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -200,6 +200,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -410,6 +411,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -423,9 +430,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -522,11 +537,11 @@ CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -537,9 +552,12 @@ CONFIG_NSH_MMCSDMINOR=0
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=10
@@ -632,6 +650,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -647,6 +666,7 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
@@ -660,8 +680,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -669,6 +699,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -677,9 +708,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -725,19 +757,25 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -775,12 +813,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -845,7 +877,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -853,8 +884,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -887,7 +920,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -895,10 +927,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LEDS is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -908,34 +940,33 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -957,8 +988,8 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1023,7 +1054,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1045,6 +1075,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1082,12 +1113,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1095,6 +1126,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f429i-disco/README.txt b/configs/stm32f429i-disco/README.txt
index 1a1960a0d24b1f7f7c1a3cfad878a7b3d4760531..2b406e035cbe5b22aa16c496949bbc1f03635da1 100644
--- a/configs/stm32f429i-disco/README.txt
+++ b/configs/stm32f429i-disco/README.txt
@@ -8,7 +8,7 @@ memory and 256kbytes. The board features:
 
   - On-board ST-LINK/V2 for programming and debugging,
   - On-board 64 Mbits (8 Mbytes) External SDRAM (1 Mbit x 16-bit x 4-bank)
-  - LIS302DL, ST MEMS motion sensor, 3-axis digital output accelerometer,
+  - L3GD20, ST MEMS motion sensor, 3-axis digital output gyroscope,
   - TFT 2.4" LCD, 262K color RGB, 240 x 320 pixels
   - Touchscreen controller
   - Two user LEDs and two push-buttons,
@@ -35,8 +35,10 @@ Contents
 
   - Development Environment
   - GNU Toolchain Options
+  - Setup and Programming Flash
   - LEDs
   - UARTs
+  - Ser
   - Timer Inputs/Outputs
   - FPU
   - FSMC SRAM
@@ -46,16 +48,64 @@ Contents
 Development Environment
 =======================
 
-  The Development environments for the STM32F429I-DISCO board are identical
-  to the environments for other STM32F boards.  For full details on the
-  environment options and setup, see the README.txt file in the
-  config/stm32f4discovery directory.
+The Development environments for the STM32F429I-DISCO board are identical
+to the environments for other STM32F boards.  For full details on the
+environment options and setup, see the README.txt file in the
+config/stm32f4discovery directory.
+
+Setup and Programming Flash
+===========================
+
+I use a USB cable to power and program it.  And I use a USB/Serial
+connected to pins PA9 and PA10 for the serial console (See the section
+"UARTs" below).
+
+FLASH may be programmed:
+
+  - Via USB using STM32 ST-Link Utility
+
+  - Via USB using OpenOCD.  This command may be used to flash the
+    firmware using OpenOCD:
+
+    $ sudo openocd -f interface/stlink-v2.cfg -f target/stm32f4x.cfg -c init -c "reset halt" -c "flash write_image erase nuttx.bin 0x08000000"
+
+  - Via JTAG/SWD connected to the SWD connector CN2.
+
+    CN4 Jumpers.  Remove jumpers to enable signals at SWD connector CN2.
+
+    SWD 6-Pin STM32F429i-Discovery Connector CN2
+    Pin   Signal Name       Description
+    ----- ------ ---------- ------------------------------
+    Pin 1 AIN_1  VDD_TARGET VDD from application
+    Pin 2 T_JCLK SWCLK      SWD Clock
+    Pin 3 GND    GND        Ground
+    Pin 4 T_JTMS SWDIO      SWD data input/output
+    Pin 5 T_NRST NRST       Reset of target MCU
+    Pin 6 T_SWO  SWO        Reserved
+
+    SWD 20-pin J-Link Connector
+    Pin    Name      Type   Description
+    ------ --------- ------ ------------------------------
+    Pin  1 VTref     Input  Target reference voltage
+    Pin  2 Vsupply   NC     Not connected in J-Link
+    Pin  3 Not used  NC     Not used in J-Link
+    Pin  5 Not used  NC     Not used in J-Link
+    Pin  7 SWDIO     I/O    Bi-directional data pin
+    Pin  9 SWCLK     Output Clock signal to target CPU
+    Pin 11 Not used  NC     Not used in J-Link
+    Pin 13 SWO       Output Serial wire output trace port
+    Pin 15 RESET     I/O    Target CPU reset signal (nRST)
+    Pin 17 Not used  NC     Not connected in J-Link
+    Pin 19 5V-Supply Output Supplies power to some boards.
+
+    Pins 4, 45, 8, 10, 12, 14, 16, 18 and 20 are GND pins in J-Link.  They
+    should also be connected to ground in the target system.
 
 LEDs
 ====
 
-The STM32F429I-DISCO board has two user LEDs; green, and red on the board
-board. These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
+The STM32F429I-DISCO board has two user LEDs; green, and red on the board.
+These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
 defined.  In that case, the usage by the board port is defined in
 include/board.h and src/up_leds.c. The LEDs are used to encode OS-related
 events as follows:
@@ -82,8 +132,8 @@ UARTs
 =====
 
 On the STM32F429I-DISCO board, because of pin mappings to support the
-onboard SDRAM and LCD, the only UARTs that has both RX and TX pins
-avilalbe are USART1 and UART5.  Other USARTS could be used for RX or TX
+onboard SDRAM and LCD, the only UARTs that have both RX and TX pins
+available are USART1 and UART5.  Other USARTS could be used for RX or TX
 only, or they could be used for full-duplex if the other pin functions
 aren't being used (i.e. LCD or SDRAM).
 
@@ -91,101 +141,112 @@ UART/USART PINS
 ---------------
 
 USART1
-  CK      PA8
+  CK      PA8*
   CTS     PA11*
   RTS     PA12*
-  RX      PA10*, PB7*
-  TX      PA9*, PB6*
+  RX      PA10, PB7
+  TX      PA9, PB6*
 USART2
   CK      PA4*, PD7
-  CTS     PA0*, PD3
-  RTS     PA1, PD4*
-  RX      PA3, PD6
-  TX      PA2, PD5*
+  CTS     PA0*, PD3*
+  RTS     PA1*, PD4
+  RX      PA3*, PD6*
+  TX      PA2*, PD5
 USART3
-  CK      PB12, PC12*, PD10
-  CTS     PB13, PD11
-  RTS     PB14, PD12*
-  RX      PB11, PC11, PD9
-  TX      PB10*, PC10*, PD8
+  CK      PB12*, PC12, PD10*
+  CTS     PB13*, PD11*
+  RTS     PB14*, PD12*
+  RX      PB11*, PC11, PD9*
+  TX      PB10*, PC10*, PD8*
 UART4
-  RX      PA1, PC11
+  RX      PA1*, PC11
   TX      PA0*, PC10*
 UART5
   RX      PD2
-  TX      PC12*
+  TX      PC12
 USART6
   CK      PC8, PG7*
   CTS     PG13*, PG15*
   RTS     PG12*, PG8*
-  RX      PC7*, PG9*
-  TX      PC6, PG14*
+  RX      PC7*, PG9
+  TX      PC6*, PG14*
 UART7
-  RX      PE7*,PF6*
-  TX      PE8*,PF7*
+  RX      PE7*, PF6
+  TX      PE8*, PF7*
 
  * Indicates pins that have other on-board functions and should be used only
    with care (See table 6 in the STM32F429I-DISCO User Guide for a list of free
    I/O pins on the board).
 
-Default USART/UART Configuration
---------------------------------
+Default Serial Console
+----------------------
+
+USART1 is enabled as the serial console in all configurations (see */defconfig).
+USART1 RX and TX are configured on pins PA10 and PA9, respectively (see
+include/board.h).
+
+  Header 32X2 P1
+  --------------
+  Pin 1  5V
+  Pin 51 PA10
+  Pin 52 PA9
+  Pin 63 GND
 
-USART1 is enabled in all configurations (see */defconfig).  RX and TX are
-configured on pins PA3 and PA2, respectively (see include/board.h).
+If solder bridges SB11 and SB12 are closed, then USART1 will be connected to
+the ST-Link and should be available over USB as a virtual COM interface.
 
 Timer Inputs/Outputs
 ====================
 
 TIM1
-  CH1     PA8, PE9
-  CH2     PA9*, PE11
-  CH3     PA10*, PE13
-  CH4     PA11*, PE14
+  CH1     PA8*, PE9*
+  CH2     PA9, PE11*
+  CH3     PA10, PE13*
+  CH4     PA11*, PE14*
 TIM2
-  CH1     PA0*, PA15, PA5*
-  CH2     PA1, PB3*
-  CH3     PA2, PB10*
-  CH4     PA3, PB11
+  CH1     PA0*, PA15*, PA5
+  CH2     PA1*, PB3*
+  CH3     PA2*, PB10*
+  CH4     PA3*, PB11*
 TIM3
-  CH1     PA6*, PB4, PC6
-  CH2     PA7*, PB5, PC7*
-  CH3     PB0, PC8
-  CH4     PB1, PC9
+  CH1     PA6*, PB4, PC6*
+  CH2     PA7*, PB5*, PC7*
+  CH3     PB0*, PC8
+  CH4     PB1*, PC9*
 TIM4
   CH1     PB6*, PD12*
   CH2     PB7, PD13*
-  CH3     PB8, PD14*
+  CH3     PB8*, PD14*
   CH4     PB9*, PD15*
 TIM5
-  CH1     PA0*, PH10**
-  CH2     PA1, PH11**
-  CH3     PA2, PH12**
-  CH4     PA3, PI0
+  CH1     PA0*, PH10*
+  CH2     PA1*, PH11*
+  CH3     PA2*, PH12*
+  CH4     PA3*, PI0**
 TIM8
-  CH1     PC6, PI5
-  CH2     PC7*, PI6
-  CH3     PC8, PI7
-  CH4     PC9, PI2
+  CH1     PC6*, PI5**
+  CH2     PC7*, PI6**
+  CH3     PC8, PI7**
+  CH4     PC9*, PI2**
 TIM9
-  CH1     PA2, PE5
-  CH2     PA3, PE6
+  CH1     PA2*, PE5
+  CH2     PA3*, PE6
 TIM10
-  CH1     PB8, PF6
+  CH1     PB8*, PF6
 TIM11
-  CH1     PB9*, PF7
+  CH1     PB9*, PF7*
 TIM12
-  CH1     PH6**, PB14
-  CH2     PC15, PH9**
+  CH1     PH6*, PB14*
+  CH2     PC15*, PH9*
 TIM13
-  CH1     PA6*, PF8
+  CH1     PA6*, PF8*
 TIM14
-  CH1     PA7*, PF9
+  CH1     PA7*, PF9*
 
  * Indicates pins that have other on-board functions and should be used only
-   with care (See table 5 in the STM32F429I-DISCO User Guide).  The rest are
-   free I/O pins.
-** Port H pins are not supported by the MCU
+   with care (See table 6 in the STM32F429I-DISCO User Guide).  The rest are
+   free I/O pins (This need to be updated.  They are incorrect!)
+** Port I pins are not supported by the MCU
 
 FPU
 ===
@@ -240,7 +301,7 @@ the following lines in each Make.defs file:
 Configuration Changes
 ---------------------
 
-Below are all of the configuration changes that I had to make to configs/stm3240g-eval/nsh2
+Below are all of the configuration changes that I had to make to configs/stm32f429i-disco/nsh2
 in order to successfully build NuttX using the Atollic toolchain WITH FPU support:
 
   -CONFIG_ARCH_FPU=n                       : Enable FPU support
@@ -533,7 +594,7 @@ STM32F429I-DISCO-specific Configuration Options
     CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
     CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
     CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
-    CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+    CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
       dump of all CAN registers.
 
   STM32F429I-DISCO SPI Configuration
@@ -548,10 +609,10 @@ STM32F429I-DISCO-specific Configuration Options
 
     CONFIG_SDIO_DMA - Support DMA data transfers.  Requires CONFIG_STM32_SDIO
       and CONFIG_STM32_DMA2.
-    CONFIG_SDIO_PRI - Select SDIO interrupt prority.  Default: 128
-    CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
+    CONFIG_STM32_SDIO_PRI - Select SDIO interrupt prority.  Default: 128
+    CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
       Default:  Medium
-    CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode.  Default:
+    CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode.  Default:
       4-bit transfer mode.
 
   STM32 USB OTG FS Host Driver Support
@@ -576,9 +637,9 @@ STM32F429I-DISCO-specific Configuration Options
    CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts.  Why would you ever
      want to do that?
    CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
-     debug.  Depends on CONFIG_DEBUG.
+     debug.  Depends on CONFIG_DEBUG_FEATURES.
    CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
-     packets. Depends on CONFIG_DEBUG.
+     packets. Depends on CONFIG_DEBUG_FEATURES.
 
 Configurations
 ==============
@@ -598,6 +659,30 @@ instead of configure.sh:
 
 Where  is one of the following:
 
+  extflash:
+  ---------
+
+    This is another NSH example.  If differs from other 'nsh' configurations
+    in that this configuration defines an external 8 MByte SPI FLASH (the
+    SST25VF064C part from Silicon Storage Technology, Inc.) which must be
+    be connected to the Discovery board's SPI4 pins on the expansion pins.
+    Additionally, this demo uses UART1 for the console
+
+    NOTES:
+
+    1. This configuration assumes an SST25VF064C 8Mbyte SPI FLASH is
+       connected to SPI4 on the following Discovery board Pins:
+
+       SCK:   Port PE2   Board Connector P1, Pin 15
+       MOSI:  Port PE6   Board Connector P1, Pin 11
+       MISO:  Port PE5   Board Connector P1, Pin 14
+       CS:    Port PE4   Board Connector P1, Pin 13
+
+    2. This configuration does have UART1 output enabled and set up as
+       the system logging device.  To use this UART, you must add an
+       external RS-232 line driver to the UART1 pins of the DISCO board
+       on PA9 and PA10 of connector P1.
+
   ltdc:
   ----
     STM32F429I-DISCO LTDC Framebuffer demo example.  See
@@ -640,7 +725,7 @@ Where  is one of the following:
 
        Special PWM-only debug options:
 
-       CONFIG_DEBUG_PWM
+       CONFIG_DEBUG_PWM_INFO
 
     5. This example supports the Quadrature Encode test (apps/examples/qencoder)
        but this must be manually enabled by selecting:
@@ -726,14 +811,14 @@ Where  is one of the following:
 
         - /dev/console still exists and still refers to the serial port. So
           you can still use certain kinds of debug output (see include/debug.h, all
-          of the interfaces based on lowsyslog will work in this configuration).
+          debug output from interrupt handlers will be lost.
 
         - But don't enable USB debug output!  Since USB is console is used for
           USB debug output and you are using a USB console, there will be
           infinite loops and deadlocks:  Debug output generates USB debug
           output which generatates USB debug output, etc.  If you want USB
           debug output, you should consider enabling USB trace
-          (CONFIG_USBDEV_TRACE) and perhaps the USB monitor (CONFIG_SYSTEM_USBMONITOR).
+          (CONFIG_USBDEV_TRACE) and perhaps the USB monitor (CONFIG_USBMONITOR).
 
           See the usbnsh configuration below for more information on configuring
           USB trace output and the USB monitor.
@@ -843,29 +928,77 @@ Where  is one of the following:
        2015-04-30
           Appears to be fully functional.
 
-  extflash:
-  ---------
-
-    This is another NSH example.  If differs from other 'nsh' configurations
-    in that this configuration defines an external 8 MByte SPI FLASH (the
-    SST25VF064C part from Silicon Storage Technology, Inc.) which must be
-    be connected to the Discovery board's SPI4 pins on the expansion pins.
-    Additionally, this demo uses UART1 for the console
+  nxwm
+  ----
+    This is a special configuration setup for the NxWM window manager
+    UnitTest.
 
     NOTES:
+    1. The NxWM window manager can be found here:
 
-    1. This configuration assumes an SST25VF064C 8Mbyte SPI FLASH is
-       connected to SPI4 on the following Discovery board Pins:
+         nuttx-code/NxWidgets/nxwm
 
-       SCK:   Port PE2   Board Connector P1, Pin 15
-       MOSI:  Port PE6   Board Connector P1, Pin 11
-       MISO:  Port PE5   Board Connector P1, Pin 14
-       CS:    Port PE4   Board Connector P1, Pin 13
+       The NxWM unit test can be found at:
 
-    2. This configuration does have UART1 output enabled and set up as
-       the system logging device.  To use this UART, you must add an
-       external RS-232 line driver to the UART1 pins of the DISCO board
-       on PA9 and PA10 of connector P1.
+         nuttx-code/NxWidgets/UnitTests/nxwm
+
+       Documentation for installing the NxWM unit test can be found here:
+
+         nuttx-code/NxWidgets/UnitTests/README.txt
+
+    2. Here is the quick summary of the build steps (Assuming that all of
+       the required packages are available in a directory ~/nuttx-code):
+
+       1. Install the nxwm configuration
+
+          $ cd ~/nuttx-code/nuttx/tools
+          $ ./configure.sh stm32f429i-disco/nxwm
+
+       2. Make the build context (only)
+
+          $ cd ..
+          $ . ./setenv.sh
+          $ make context
+          ...
+
+       3. Install the nxwm unit test
+
+          $ cd ~/nuttx-code/NxWidgets
+          $ tools/install.sh ~/nuttx-code/apps nxwm
+          Creating symbolic link
+        - To ~/nuttx-code/NxWidgets/UnitTests/nxwm
+        - At ~/nuttx-code/apps/external
+
+       4. Build the NxWidgets library
+
+          $ cd ~/nuttx-code/NxWidgets/libnxwidgets
+          $ make TOPDIR=~/nuttx-code/nuttx
+         ...
+
+       5. Build the NxWM library
+
+          $ cd ~/nuttx-code/NxWidgets/nxwm
+          $ make TOPDIR=~/nuttx-code/nuttx
+          ...
+
+       6. Built NuttX with the installed unit test as the application
+
+          $ cd ~/nuttx-code/nuttx
+          $ make
+
+    3. Performance is not so good in this example configuration because it
+       uses the slower SPI interfaces.
+
+    STATUS:
+      17-01-08:  There are instabilities in this configuration that make it
+      not usable on this platform.  While the equivalent configuration works
+      on other platforms, this one does not:  The calculator display does
+      not form properly.  There are fails in the NxTerm display, usually around
+      the point where the display should scroll up.
+
+      Update:  With all optimizations disabled, the issue seems to go away.
+      So this is most likely due to using high levels of optimization with a
+      bleeding edge GCC toolchain.
 
   usbnsh:
   ------
diff --git a/configs/stm32f429i-disco/extflash/Make.defs b/configs/stm32f429i-disco/extflash/Make.defs
index c8cd4116d694a4115ce7cb32a1015d2111c27460..07fa3b5d009f5c64c35d8d7ddec67fb49926e526 100644
--- a/configs/stm32f429i-disco/extflash/Make.defs
+++ b/configs/stm32f429i-disco/extflash/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f429i-disco/extflash/defconfig b/configs/stm32f429i-disco/extflash/defconfig
index f1601ff527a7c792c42c8e1b812c9e0945725840..adb39d76a141832c0fd65bd7629ed23bc7c0f596 100644
--- a/configs/stm32f429i-disco/extflash/defconfig
+++ b/configs/stm32f429i-disco/extflash/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 CONFIG_DEBUG_NOOPT=y
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -103,7 +106,9 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -200,6 +205,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -347,6 +353,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -435,6 +447,12 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
 CONFIG_STM32_FSMC_SRAM=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -451,9 +469,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -557,7 +583,6 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -573,12 +598,11 @@ CONFIG_STM32F429I_DISCO_RAMMTD=y
 CONFIG_STM32F429I_DISCO_RAMMTD_MINOR=1
 CONFIG_STM32F429I_DISCO_RAMMTD_SIZE=256
 # CONFIG_STM32F429I_DISCO_ILI9341 is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -595,9 +619,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=12
@@ -610,6 +637,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -626,6 +654,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -692,6 +722,7 @@ CONFIG_DEV_NULL=y
 CONFIG_DEV_ZERO=y
 CONFIG_ARCH_HAVE_RNG=y
 CONFIG_DEV_RANDOM=y
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -707,19 +738,25 @@ CONFIG_DEV_RANDOM=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -727,8 +764,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -736,6 +783,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -765,7 +813,9 @@ CONFIG_RAMMTD_ERASESTATE=0xff
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
 # CONFIG_MTD_N25QXXX is not set
 CONFIG_MTD_SMART=y
@@ -792,9 +842,10 @@ CONFIG_SST25XX_MEMORY_TYPE=0x25
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -840,19 +891,26 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -905,12 +963,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_SMARTFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -957,11 +1009,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -979,17 +1048,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1021,21 +1095,22 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FLASH_TEST is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1045,42 +1120,41 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RANDOM is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_FLASH_TEST is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+CONFIG_FSUTILS_FLASH_ERASEALL=y
 # CONFIG_FSUTILS_INIFILE is not set
 CONFIG_FSUTILS_MKSMARTFS=y
 # CONFIG_FSUTILS_PASSWD is not set
@@ -1101,8 +1175,9 @@ CONFIG_FSUTILS_MKSMARTFS=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1167,13 +1242,13 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MKSMARTFS is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1190,11 +1265,13 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
 CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -1228,13 +1305,13 @@ CONFIG_PLATFORM_CONFIGDATA=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 CONFIG_SYSTEM_FLASH_ERASEALL=y
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1242,6 +1319,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f429i-disco/ide/ltcd/uvision/libc.uvproj b/configs/stm32f429i-disco/ide/ltcd/uvision/libc.uvproj
index 9a501a0b517d654199f0835c49a9d82385d48e1e..97ded008652a96d12bfd9851e94ce222c78e3175 100644
--- a/configs/stm32f429i-disco/ide/ltcd/uvision/libc.uvproj
+++ b/configs/stm32f429i-disco/ide/ltcd/uvision/libc.uvproj
@@ -915,11 +915,6 @@
               1
               ../../../../../libc/stdio/lib_memsostream.c
             
-            
-              lib_lowinstream.c
-              1
-              ../../../../../libc/stdio/lib_lowinstream.c
-            
             
               lib_lowoutstream.c
               1
@@ -1425,11 +1420,6 @@
               1
               ../../../../../libc/syslog/lib_syslog.c
             
-            
-              lib_lowsyslog.c
-              1
-              ../../../../../libc/syslog/lib_lowsyslog.c
-            
             
               lib_setlogmask.c
               1
diff --git a/configs/stm32f429i-disco/ide/ltcd/uvision/libcxx.uvproj b/configs/stm32f429i-disco/ide/ltcd/uvision/libcxx.uvproj
index fd3d5edc3ef88a52edd3a03ff4a4469c996f89ed..f4013fcd59dc0ac324baacb5ce865981de5f1bbb 100644
--- a/configs/stm32f429i-disco/ide/ltcd/uvision/libcxx.uvproj
+++ b/configs/stm32f429i-disco/ide/ltcd/uvision/libcxx.uvproj
@@ -274,7 +274,7 @@
             1
             1
             
-               -fno-builtin -fno-exceptions -fno-rtti -Wall -Wshadow -Wundef -g
+               -fno-builtin -fno-exceptions -fcheck-new -fno-rtti -Wall -Wshadow -Wundef -g
                CONFIG_WCHAR_BUILTIN
               
               ../../../../../libxx;../../../../../include;../../../../../include/cxx
diff --git a/configs/stm32f429i-disco/include/board.h b/configs/stm32f429i-disco/include/board.h
index adcd72adde2ef4094c4429cd3c066c91d8a1226b..c3dfbea085615802fcda24825b61f315f17ec209 100644
--- a/configs/stm32f429i-disco/include/board.h
+++ b/configs/stm32f429i-disco/include/board.h
@@ -2,7 +2,7 @@
  * configs/stm32f429i-disco/include/board.h
  * include/arch/board/board.h
  *
- *   Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -154,8 +154,14 @@
  * Note: TIM1,8 are on APB2, others on APB1
  */
 
-#define STM32_TIM18_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_TIM27_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    (STM32_HCLK_FREQUENCY/2)
+#define BOARD_TIM3_FREQUENCY    (STM32_HCLK_FREQUENCY/2)
+#define BOARD_TIM4_FREQUENCY    (STM32_HCLK_FREQUENCY/2)
+#define BOARD_TIM5_FREQUENCY    (STM32_HCLK_FREQUENCY/2)
+#define BOARD_TIM6_FREQUENCY    (STM32_HCLK_FREQUENCY/2)
+#define BOARD_TIM7_FREQUENCY    (STM32_HCLK_FREQUENCY/2)
+#define BOARD_TIM8_FREQUENCY    STM32_HCLK_FREQUENCY
 
 /* LED definitions ******************************************************************/
 /* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any
@@ -218,6 +224,11 @@
 
 #define GPIO_TIM4_CH2OUT GPIO_TIM4_CH2OUT_2
 
+/* I2C - There is a STMPE811 TouchPanel on I2C3 using these pins: */
+
+#define GPIO_I2C3_SCL GPIO_I2C3_SCL_1
+#define GPIO_I2C3_SDA GPIO_I2C3_SDA_1
+
 /* SPI - There is a MEMS device on SPI5 using these pins: */
 
 #define GPIO_SPI5_MISO GPIO_SPI5_MISO_1
diff --git a/configs/stm32f429i-disco/lcd/Make.defs b/configs/stm32f429i-disco/lcd/Make.defs
index fc3f4112f1335af8d7008ab161cfbb48d0691c98..6e09dae1b91f1767260649f4244df668c2252c20 100644
--- a/configs/stm32f429i-disco/lcd/Make.defs
+++ b/configs/stm32f429i-disco/lcd/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f429i-disco/lcd/defconfig b/configs/stm32f429i-disco/lcd/defconfig
index 7d399bb399685b645026b234dc3eab0f81b934cb..55c086a56c39b944a20255022d77bc372373841a 100644
--- a/configs/stm32f429i-disco/lcd/defconfig
+++ b/configs/stm32f429i-disco/lcd/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -60,10 +62,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -73,7 +77,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -104,7 +107,9 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -201,6 +206,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -348,6 +354,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -435,6 +447,12 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
 CONFIG_STM32_FSMC_SRAM=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -451,9 +469,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -551,7 +577,6 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -564,7 +589,13 @@ CONFIG_STM32F429I_DISCO_ILI9341_LCDIFACE=y
 CONFIG_STM32F429I_DISCO_ILI9341_LCDDEVICE=0
 CONFIG_STM32F429I_DISCO_ILI9341_SPIFREQUENCY=20000000
 CONFIG_STM32F429I_DISCO_ILI9341_SPIBITS16=y
-# CONFIG_LIB_BOARDCTL is not set
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
 
 #
 # RTOS Features
@@ -579,9 +610,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=12
@@ -594,6 +628,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -610,6 +645,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -675,6 +712,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -690,12 +728,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -703,11 +745,20 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 # CONFIG_LCD_NOGETRUN is not set
@@ -721,6 +772,7 @@ CONFIG_LCD_MAXPOWER=1
 # CONFIG_LCD_NOKIA6100 is not set
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 # CONFIG_LCD_SSD1351 is not set
@@ -742,11 +794,7 @@ CONFIG_LCD_ILI9341_IFACE0_LANDSCAPE=y
 # CONFIG_LCD_ILI9341_IFACE0_RPORTRAIT is not set
 CONFIG_LCD_ILI9341_IFACE0_RGB565=y
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -754,6 +802,7 @@ CONFIG_LCD_ILI9341_IFACE0_RGB565=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -762,9 +811,10 @@ CONFIG_LCD_ILI9341_IFACE0_RGB565=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -810,19 +860,26 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -860,12 +917,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -950,6 +1001,7 @@ CONFIG_NXFONT_MONO5X8=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 # CONFIG_NXTERM is not set
 
 #
@@ -959,7 +1011,10 @@ CONFIG_NX_MULTIUSER=y
 CONFIG_NX_BLOCKING=y
 CONFIG_NX_MXSERVERMSGS=32
 CONFIG_NX_MXCLIENTMSGS=16
-# CONFIG_NX_NXSTART is not set
+# CONFIG_NXSTART_EXTERNINIT is not set
+CONFIG_NXSTART_SERVERPRIO=110
+CONFIG_NXSTART_SERVERSTACK=2048
+CONFIG_NXSTART_DEVNO=0
 
 #
 # Memory Management
@@ -1002,11 +1057,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1022,16 +1094,21 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1063,9 +1140,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -1073,10 +1150,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 CONFIG_EXAMPLES_LCDRW=y
 CONFIG_EXAMPLES_LDCRW_DEVNO=0
 CONFIG_EXAMPLES_LDCRW_XRES=320
@@ -1089,14 +1166,16 @@ CONFIG_EXAMPLES_LDCRW_YRES=240
 CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
 CONFIG_EXAMPLES_NX=y
-CONFIG_EXAMPLES_NX_VPLANE=0
-CONFIG_EXAMPLES_NX_DEVNO=0
 CONFIG_EXAMPLES_NX_DEFAULT_COLORS=y
 CONFIG_EXAMPLES_NX_DEFAULT_FONT=y
 CONFIG_EXAMPLES_NX_BPP=16
 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set
 CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
+# CONFIG_EXAMPLES_NX_EXTERNINIT is not set
 
 #
 # Multi-User Configuration Options
@@ -1106,34 +1185,31 @@ CONFIG_EXAMPLES_NX_CLIENTPRIO=100
 CONFIG_EXAMPLES_NX_SERVERPRIO=120
 CONFIG_EXAMPLES_NX_LISTENERPRIO=80
 CONFIG_EXAMPLES_NX_NOTIFYSIGNO=4
-# CONFIG_EXAMPLES_NXTERM is not set
-# CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXHELLO is not set
-# CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1155,8 +1231,9 @@ CONFIG_EXAMPLES_NX_NOTIFYSIGNO=4
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1221,12 +1298,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1243,11 +1320,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
 CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_FILEIOSIZE=512
@@ -1281,12 +1360,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1294,6 +1373,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f429i-disco/ltdc/Make.defs b/configs/stm32f429i-disco/ltdc/Make.defs
index c98f7c48a4f7f68758f865056fc2ca56dc29f850..3f55428d2db964d568dd65b1ae8f89cfd9375529 100644
--- a/configs/stm32f429i-disco/ltdc/Make.defs
+++ b/configs/stm32f429i-disco/ltdc/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f429i-disco/ltdc/defconfig b/configs/stm32f429i-disco/ltdc/defconfig
index f4eb8234c756c9c943053342f5b66c3907720f1f..f534914cda98cf988e775decf959a01206daa27b 100644
--- a/configs/stm32f429i-disco/ltdc/defconfig
+++ b/configs/stm32f429i-disco/ltdc/defconfig
@@ -42,35 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-CONFIG_ARCH_HAVE_HEAPCHECK=y
-# CONFIG_DEBUG_VERBOSE is not set
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_HEAP is not set
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_LEDS is not set
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
-# CONFIG_DEBUG_SPI is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -85,10 +62,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -98,7 +77,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -129,7 +107,9 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -155,7 +135,6 @@ CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
-# CONFIG_DEBUG_HARDFAULT is not set
 
 #
 # ARMV7M Configuration Options
@@ -227,6 +206,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -374,6 +354,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -463,6 +449,12 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 CONFIG_STM32_CCMEXCLUDE=y
 CONFIG_STM32_CCM_PROCFS=y
 CONFIG_STM32_FSMC_SRAM=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -479,9 +471,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -627,7 +627,6 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -641,6 +640,7 @@ CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE=y
 CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE_PORTRAIT=y
 # CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE_RLANDSCAPE is not set
 # CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE_RORTRAIT is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -656,9 +656,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=12
@@ -671,6 +674,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -687,6 +691,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -752,6 +758,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -767,19 +774,25 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 CONFIG_SPI_CMDDATA=y
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -787,8 +800,18 @@ CONFIG_SPI_CMDDATA=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -796,6 +819,7 @@ CONFIG_SPI_CMDDATA=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -804,9 +828,10 @@ CONFIG_SPI_CMDDATA=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -835,7 +860,6 @@ CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
-# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_USART1_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -853,19 +877,26 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -911,12 +942,6 @@ CONFIG_FS_PROCFS_REGISTER=y
 # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1001,6 +1026,7 @@ CONFIG_NXFONT_MONO5X8=y
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
 # CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
 # CONFIG_NXTERM is not set
 
 #
@@ -1049,11 +1075,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1069,17 +1112,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1111,9 +1159,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -1121,10 +1169,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 CONFIG_EXAMPLES_LTDC=y
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -1134,6 +1182,9 @@ CONFIG_EXAMPLES_LTDC=y
 CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
 CONFIG_EXAMPLES_NX=y
 CONFIG_EXAMPLES_NX_VPLANE=0
 CONFIG_EXAMPLES_NX_DEVNO=0
@@ -1142,34 +1193,30 @@ CONFIG_EXAMPLES_NX_DEFAULT_FONT=y
 CONFIG_EXAMPLES_NX_BPP=16
 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set
 CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
-# CONFIG_EXAMPLES_NXTERM is not set
-# CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXHELLO is not set
-# CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1193,8 +1240,9 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1259,12 +1307,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1281,11 +1329,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
 CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -1320,12 +1370,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1333,6 +1383,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f429i-disco/nsh/Make.defs b/configs/stm32f429i-disco/nsh/Make.defs
index a2b4778579c017623565c36b8a89e0b85f3d362d..53025b6f67bb419c2bb0263365fd83ec7c7591f9 100644
--- a/configs/stm32f429i-disco/nsh/Make.defs
+++ b/configs/stm32f429i-disco/nsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f429i-disco/nsh/defconfig b/configs/stm32f429i-disco/nsh/defconfig
index 37e776417d66ef0a5a517f0e03647ee0de8fb80c..aa843ace342c06be5575b116edde8d480ab27320 100644
--- a/configs/stm32f429i-disco/nsh/defconfig
+++ b/configs/stm32f429i-disco/nsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 CONFIG_DEBUG_NOOPT=y
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -103,7 +106,9 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -200,6 +205,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -347,6 +353,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -434,6 +446,12 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
 CONFIG_STM32_FSMC_SRAM=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -450,9 +468,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -550,7 +576,6 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -558,6 +583,7 @@ CONFIG_NSH_MMCSDMINOR=0
 # CONFIG_STM32F429I_DISCO_FLASH is not set
 # CONFIG_STM32F429I_DISCO_RAMMTD is not set
 # CONFIG_STM32F429I_DISCO_ILI9341 is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -573,9 +599,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=12
@@ -588,6 +617,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -604,6 +634,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -668,6 +700,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -683,19 +716,25 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -703,8 +742,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -712,6 +761,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -720,9 +770,10 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -768,19 +819,26 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -818,12 +876,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -870,11 +922,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -890,16 +959,21 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -931,9 +1005,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -941,10 +1015,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -953,35 +1027,34 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1003,8 +1076,9 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1069,12 +1143,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1091,11 +1165,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
 CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_FILEIOSIZE=512
@@ -1128,12 +1204,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1141,6 +1217,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f746g-disco/knsh/Make.defs b/configs/stm32f429i-disco/nxwm/Make.defs
similarity index 95%
rename from configs/stm32f746g-disco/knsh/Make.defs
rename to configs/stm32f429i-disco/nxwm/Make.defs
index c3735a3848f514c22cd4427d222f6b7bf6907816..8440d1c06ad4f3d0a6f5e9b85fec2d643998c483 100644
--- a/configs/stm32f746g-disco/knsh/Make.defs
+++ b/configs/stm32f429i-disco/nxwm/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
-# configs/stm32f746g-disco/knsh/Make.defs
+# configs/stm32f429i-disco/nxwm/Make.defs
 #
-#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -37,7 +37,7 @@ include ${TOPDIR}/.config
 include ${TOPDIR}/tools/Config.mk
 include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
 
-LDSCRIPT = flash.ld
+LDSCRIPT = ld.script
 
 ifeq ($(WINTOOL),y)
   # Windows-native toolchains
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
@@ -110,4 +110,3 @@ HOSTCC = gcc
 HOSTINCLUDES = -I.
 HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
 HOSTLDFLAGS =
-
diff --git a/configs/stm32f429i-disco/nxwm/defconfig b/configs/stm32f429i-disco/nxwm/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..6c90c64117adb64782adcba97d93130045009184
--- /dev/null
+++ b/configs/stm32f429i-disco/nxwm/defconfig
@@ -0,0 +1,1614 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+CONFIG_DEBUG_CUSTOMOPT=y
+# CONFIG_DEBUG_FULLOPT is not set
+CONFIG_DEBUG_OPTLEVEL="-O2"
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+# CONFIG_ARCH_CHIP_STM32F103C8 is not set
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+# CONFIG_ARCH_CHIP_STM32F407ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+CONFIG_ARCH_CHIP_STM32F429Z=y
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+# CONFIG_STM32_STM32F10XX is not set
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+# CONFIG_STM32_PERFORMANCELINE is not set
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+# CONFIG_STM32_MEDIUMDENSITY is not set
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+CONFIG_STM32_STM32F40XX=y
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+# CONFIG_STM32_STM32F407 is not set
+# CONFIG_STM32_STM32F427 is not set
+CONFIG_STM32_STM32F429=y
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+CONFIG_STM32_HAVE_CCM=y
+# CONFIG_STM32_HAVE_USBDEV is not set
+CONFIG_STM32_HAVE_OTGFS=y
+CONFIG_STM32_HAVE_FSMC=y
+CONFIG_STM32_HAVE_LTDC=y
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+CONFIG_STM32_HAVE_USART6=y
+CONFIG_STM32_HAVE_UART7=y
+CONFIG_STM32_HAVE_UART8=y
+CONFIG_STM32_HAVE_TIM1=y
+# CONFIG_STM32_HAVE_TIM2 is not set
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+# CONFIG_STM32_HAVE_TIM5 is not set
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+CONFIG_STM32_HAVE_TIM9=y
+CONFIG_STM32_HAVE_TIM10=y
+CONFIG_STM32_HAVE_TIM11=y
+CONFIG_STM32_HAVE_TIM12=y
+CONFIG_STM32_HAVE_TIM13=y
+CONFIG_STM32_HAVE_TIM14=y
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+CONFIG_STM32_HAVE_CAN2=y
+CONFIG_STM32_HAVE_DAC1=y
+CONFIG_STM32_HAVE_DAC2=y
+CONFIG_STM32_HAVE_RNG=y
+CONFIG_STM32_HAVE_ETHMAC=y
+CONFIG_STM32_HAVE_I2C2=y
+CONFIG_STM32_HAVE_I2C3=y
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+CONFIG_STM32_HAVE_SPI4=y
+CONFIG_STM32_HAVE_SPI5=y
+CONFIG_STM32_HAVE_SPI6=y
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKPSRAM is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CAN2 is not set
+# CONFIG_STM32_CCMDATARAM is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_CRYP is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_DAC1 is not set
+# CONFIG_STM32_DAC2 is not set
+# CONFIG_STM32_DCMI is not set
+# CONFIG_STM32_ETHMAC is not set
+CONFIG_STM32_FSMC=y
+# CONFIG_STM32_HASH is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+CONFIG_STM32_I2C3=y
+# CONFIG_STM32_LTDC is not set
+# CONFIG_STM32_DMA2D is not set
+# CONFIG_STM32_OTGFS is not set
+# CONFIG_STM32_OTGHS is not set
+CONFIG_STM32_PWR=y
+# CONFIG_STM32_RNG is not set
+# CONFIG_STM32_SDIO is not set
+# CONFIG_STM32_SPI1 is not set
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+# CONFIG_STM32_SPI4 is not set
+# CONFIG_STM32_SPI5 is not set
+# CONFIG_STM32_SPI6 is not set
+CONFIG_STM32_SYSCFG=y
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+# CONFIG_STM32_TIM9 is not set
+# CONFIG_STM32_TIM10 is not set
+# CONFIG_STM32_TIM11 is not set
+# CONFIG_STM32_TIM12 is not set
+# CONFIG_STM32_TIM13 is not set
+# CONFIG_STM32_TIM14 is not set
+CONFIG_STM32_USART1=y
+# CONFIG_STM32_USART2 is not set
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USART6 is not set
+# CONFIG_STM32_UART7 is not set
+# CONFIG_STM32_UART8 is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+CONFIG_STM32_I2C=y
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_FLASH_PREFETCH is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+# CONFIG_STM32_JTAG_FULL_ENABLE is not set
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+CONFIG_STM32_JTAG_SW_ENABLE=y
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32_CCMEXCLUDE is not set
+CONFIG_STM32_FSMC_SRAM=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+# CONFIG_STM32_TIM9_CAP is not set
+# CONFIG_STM32_TIM10_CAP is not set
+# CONFIG_STM32_TIM11_CAP is not set
+# CONFIG_STM32_TIM12_CAP is not set
+# CONFIG_STM32_TIM13_CAP is not set
+# CONFIG_STM32_TIM14_CAP is not set
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART1_SERIALDRIVER=y
+# CONFIG_STM32_USART1_1WIREDRIVER is not set
+# CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+
+#
+# I2C Configuration
+#
+# CONFIG_STM32_I2C_ALT is not set
+# CONFIG_STM32_I2C_DYNTIMEO is not set
+CONFIG_STM32_I2CTIMEOSEC=0
+CONFIG_STM32_I2CTIMEOMS=500
+CONFIG_STM32_I2CTIMEOTICKS=500
+# CONFIG_STM32_I2C_DUTY16_9 is not set
+# CONFIG_STM32_HAVE_RTC_COUNTER is not set
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=16717
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=114688
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_STM32F429I_DISCO=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="stm32f429i-disco"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+# CONFIG_ARCH_IRQBUTTONS is not set
+
+#
+# Board-Specific Options
+#
+# CONFIG_STM32F429I_DISCO_FLASH is not set
+# CONFIG_STM32F429I_DISCO_RAMMTD is not set
+CONFIG_STM32F429I_DISCO_ILI9341=y
+# CONFIG_STM32F429I_DISCO_ILI9341_NONE is not set
+CONFIG_STM32F429I_DISCO_ILI9341_LCDIFACE=y
+CONFIG_STM32F429I_DISCO_ILI9341_LCDDEVICE=0
+CONFIG_STM32F429I_DISCO_ILI9341_SPIFREQUENCY=20000000
+CONFIG_STM32F429I_DISCO_ILI9341_SPIBITS16=y
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+CONFIG_BOARDCTL_TSCTEST=y
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=12
+CONFIG_START_DAY=6
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_SPINLOCK is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nxwm_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+CONFIG_BOARD_INITIALIZE=y
+# CONFIG_BOARD_INITTHREAD is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+CONFIG_SCHED_ONEXIT=y
+CONFIG_SCHED_ONEXIT_MAX=1
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=32
+CONFIG_MQ_MAXMSGSIZE=64
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+CONFIG_DISABLE_POLL=y
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+CONFIG_I2C=y
+# CONFIG_I2C_SLAVE is not set
+CONFIG_I2C_POLLED=y
+# CONFIG_I2C_RESET is not set
+# CONFIG_I2C_TRACE is not set
+# CONFIG_I2C_DRIVER is not set
+# CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_TIMERS_CS2100CP is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+CONFIG_INPUT=y
+# CONFIG_MOUSE is not set
+# CONFIG_INPUT_MAX11802 is not set
+# CONFIG_INPUT_TSC2007 is not set
+# CONFIG_INPUT_ADS7843E is not set
+# CONFIG_INPUT_MXT is not set
+CONFIG_INPUT_STMPE811=y
+# CONFIG_STMPE811_SPI is not set
+CONFIG_STMPE811_I2C=y
+CONFIG_STMPE811_ACTIVELOW=y
+CONFIG_STMPE811_EDGE=y
+# CONFIG_STMPE811_MULTIPLE is not set
+# CONFIG_STMPE811_TSC_DISABLE is not set
+# CONFIG_STMPE811_SWAPXY is not set
+CONFIG_STMPE811_THRESHX=39
+CONFIG_STMPE811_THRESHY=51
+CONFIG_STMPE811_ADC_DISABLE=y
+CONFIG_STMPE811_GPIO_DISABLE=y
+CONFIG_STMPE811_TEMP_DISABLE=y
+# CONFIG_BUTTONS is not set
+# CONFIG_DJOYSTICK is not set
+# CONFIG_AJOYSTICK is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+CONFIG_LCD=y
+
+#
+# Common Graphic LCD Settings
+#
+# CONFIG_LCD_CONSOLE is not set
+# CONFIG_LCD_NOGETRUN is not set
+CONFIG_LCD_MAXCONTRAST=63
+CONFIG_LCD_MAXPOWER=1
+
+#
+# Graphic LCD Devices
+#
+# CONFIG_LCD_P14201 is not set
+# CONFIG_LCD_NOKIA6100 is not set
+# CONFIG_LCD_MIO283QT2 is not set
+# CONFIG_LCD_MIO283QT9A is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
+# CONFIG_LCD_UG2864HSWEG01 is not set
+# CONFIG_LCD_UG2832HSWEG04 is not set
+# CONFIG_LCD_SSD1351 is not set
+# CONFIG_LCD_ST7565 is not set
+# CONFIG_LCD_ST7567 is not set
+# CONFIG_LCD_UG2864AMBAG01 is not set
+# CONFIG_LCD_SSD1289 is not set
+# CONFIG_LCD_SHARP_MEMLCD is not set
+CONFIG_LCD_LANDSCAPE=y
+# CONFIG_LCD_PORTRAIT is not set
+# CONFIG_LCD_RPORTRAIT is not set
+# CONFIG_LCD_RLANDSCAPE is not set
+CONFIG_LCD_ILI9341=y
+CONFIG_LCD_ILI9341_NINTERFACES=1
+CONFIG_LCD_ILI9341_IFACE0=y
+CONFIG_LCD_ILI9341_IFACE0_LANDSCAPE=y
+# CONFIG_LCD_ILI9341_IFACE0_PORTRAIT is not set
+# CONFIG_LCD_ILI9341_IFACE0_RLANDSCAPE is not set
+# CONFIG_LCD_ILI9341_IFACE0_RPORTRAIT is not set
+CONFIG_LCD_ILI9341_IFACE0_RGB565=y
+# CONFIG_LCD_RA8875 is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+CONFIG_USART1_SERIALDRIVER=y
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART1_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART1 Configuration
+#
+CONFIG_USART1_RXBUFSIZE=256
+CONFIG_USART1_TXBUFSIZE=256
+CONFIG_USART1_BAUD=115200
+CONFIG_USART1_BITS=8
+CONFIG_USART1_PARITY=0
+CONFIG_USART1_2STOP=0
+# CONFIG_USART1_IFLOWCONTROL is not set
+# CONFIG_USART1_OFLOWCONTROL is not set
+# CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+CONFIG_FS_READABLE=y
+CONFIG_FS_WRITABLE=y
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+CONFIG_FS_FAT=y
+CONFIG_FAT_LCNAMES=y
+CONFIG_FAT_LFN=y
+CONFIG_FAT_MAXFNAME=32
+# CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
+# CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+CONFIG_NX=y
+CONFIG_NX_LCDDRIVER=y
+CONFIG_NX_NPLANES=1
+CONFIG_NX_BGCOLOR=0x0
+# CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
+
+#
+# Supported Pixel Depths
+#
+CONFIG_NX_DISABLE_1BPP=y
+CONFIG_NX_DISABLE_2BPP=y
+CONFIG_NX_DISABLE_4BPP=y
+CONFIG_NX_DISABLE_8BPP=y
+# CONFIG_NX_DISABLE_16BPP is not set
+CONFIG_NX_DISABLE_24BPP=y
+CONFIG_NX_DISABLE_32BPP=y
+CONFIG_NX_PACKEDMSFIRST=y
+
+#
+# Input Devices
+#
+CONFIG_NX_XYINPUT=y
+# CONFIG_NX_XYINPUT_NONE is not set
+# CONFIG_NX_XYINPUT_MOUSE is not set
+CONFIG_NX_XYINPUT_TOUCHSCREEN=y
+CONFIG_NX_KBD=y
+
+#
+# Framed Window Borders
+#
+CONFIG_NXTK_BORDERWIDTH=4
+# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set
+CONFIG_NXTK_BORDERCOLOR1=0x5cb7
+CONFIG_NXTK_BORDERCOLOR2=0x21c9
+CONFIG_NXTK_BORDERCOLOR3=0xffdf
+# CONFIG_NXTK_AUTORAISE is not set
+
+#
+# Font Selections
+#
+CONFIG_NXFONTS_CHARBITS=7
+# CONFIG_NXFONT_MONO5X8 is not set
+# CONFIG_NXFONT_SANS17X22 is not set
+# CONFIG_NXFONT_SANS20X26 is not set
+CONFIG_NXFONT_SANS23X27=y
+# CONFIG_NXFONT_SANS22X29 is not set
+# CONFIG_NXFONT_SANS28X37 is not set
+# CONFIG_NXFONT_SANS39X48 is not set
+# CONFIG_NXFONT_SANS17X23B is not set
+# CONFIG_NXFONT_SANS20X27B is not set
+CONFIG_NXFONT_SANS22X29B=y
+# CONFIG_NXFONT_SANS28X37B is not set
+# CONFIG_NXFONT_SANS40X49B is not set
+# CONFIG_NXFONT_SERIF22X29 is not set
+# CONFIG_NXFONT_SERIF29X37 is not set
+# CONFIG_NXFONT_SERIF38X48 is not set
+# CONFIG_NXFONT_SERIF22X28B is not set
+# CONFIG_NXFONT_SERIF27X38B is not set
+# CONFIG_NXFONT_SERIF38X49B is not set
+# CONFIG_NXFONT_PIXEL_UNICODE is not set
+# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set
+# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set
+# CONFIG_NXFONT_TOM_THUMB_4X6 is not set
+CONFIG_NXTERM=y
+
+#
+# NxTerm Output Text/Graphics Options
+#
+CONFIG_NXTERM_BPP=16
+CONFIG_NXTERM_CURSORCHAR=95
+CONFIG_NXTERM_MXCHARS=325
+CONFIG_NXTERM_CACHESIZE=32
+CONFIG_NXTERM_LINESEPARATION=0
+# CONFIG_NXTERM_NOWRAP is not set
+
+#
+# NxTerm Input options
+#
+CONFIG_NXTERM_NXKBDIN=y
+CONFIG_NXTERM_KBDBUFSIZE=16
+CONFIG_NXTERM_NPOLLWAITERS=4
+
+#
+# NX Multi-user only options
+#
+CONFIG_NX_MULTIUSER=y
+CONFIG_NX_BLOCKING=y
+CONFIG_NX_MXSERVERMSGS=32
+CONFIG_NX_MXCLIENTMSGS=16
+# CONFIG_NXSTART_EXTERNINIT is not set
+CONFIG_NXSTART_SERVERPRIO=110
+CONFIG_NXSTART_SERVERSTACK=2048
+CONFIG_NXSTART_DEVNO=0
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=3
+CONFIG_ARCH_HAVE_HEAP2=y
+CONFIG_HEAP2_BASE=0xD0000000
+CONFIG_HEAP2_SIZE=8388608
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
+# CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_LCDRW is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+# CONFIG_EXAMPLES_NSH is not set
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFATFS is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+CONFIG_NXWIDGETS=y
+
+#
+# NX Server/Device Configuration
+#
+CONFIG_NXWIDGETS_FLICKERFREE=y
+# CONFIG_NXWIDGETS_EXTERNINIT is not set
+CONFIG_NXWIDGET_SERVERINIT=y
+CONFIG_NXWIDGETS_CLIENTPRIO=100
+CONFIG_NXWIDGETS_LISTENERPRIO=100
+CONFIG_NXWIDGETS_LISTENERSTACK=2048
+# CONFIG_NXWIDGET_EVENTWAIT is not set
+
+#
+# NXWidget Configuration
+#
+CONFIG_NXWIDGETS_BPP=16
+# CONFIG_NXWIDGETS_GREYSCALE is not set
+CONFIG_NXWIDGETS_SIZEOFCHAR=1
+
+#
+# NXWidget Default Values
+#
+# CONFIG_NXWIDGETS_SYSTEM_CUSTOM_FONTID is not set
+CONFIG_NXWIDGETS_TNXARRAY_INITIALSIZE=16
+CONFIG_NXWIDGETS_TNXARRAY_SIZEINCREMENT=8
+CONFIG_NXWIDGETS_CUSTOM_FILLCOLORS=y
+CONFIG_NXWIDGETS_DEFAULT_BACKGROUNDCOLOR=0x9dfb
+CONFIG_NXWIDGETS_DEFAULT_SELECTEDBACKGROUNDCOLOR=0xd73e
+CONFIG_NXWIDGETS_DEFAULT_HIGHLIGHTCOLOR=0xc618
+CONFIG_NXWIDGETS_CUSTOM_EDGECOLORS=y
+CONFIG_NXWIDGETS_DEFAULT_SHINEEDGECOLOR=0xffdf
+CONFIG_NXWIDGETS_DEFAULT_SHADOWEDGECOLOR=0x21e9
+# CONFIG_NXWIDGETS_CUSTOM_TEXTCOLORS is not set
+CONFIG_NXWIDGETS_TRANSPARENT_COLOR=0x0
+
+#
+# Keypad behavior
+#
+CONFIG_NXWIDGETS_FIRST_REPEAT_TIME=500
+CONFIG_NXWIDGETS_CONTINUE_REPEAT_TIME=200
+CONFIG_NXWIDGETS_DOUBLECLICK_TIME=350
+CONFIG_NXWIDGETS_KBDBUFFER_SIZE=16
+CONFIG_NXWIDGETS_CURSORCONTROL_SIZE=4
+# CONFIG_NXWIDGET_MEMMONITOR is not set
+CONFIG_NXWM=y
+
+#
+# NxWM General Settings
+#
+# CONFIG_NXWM_LARGE_ICONS is not set
+# CONFIG_NXWM_CUSTOM_FONTID is not set
+CONFIG_NXWM_UNITTEST=y
+
+#
+# Color configuration
+#
+# CONFIG_NXWM_CUSTOM_FILLCOLORS is not set
+# CONFIG_NXWM_CUSTOM_EDGECOLORS is not set
+# CONFIG_NXWM_CUSTOM_TEXTCOLORS is not set
+
+#
+# Background Image
+#
+# CONFIG_NXWM_DISABLE_BACKGROUND_IMAGE is not set
+CONFIG_NXWM_BACKGROUND_IMAGE="NXWidgets::g_nuttxBitmap160x160"
+
+#
+# NxWM Taskbar Configuration
+#
+
+#
+# Horizontal and vertical spacing of icons in the task bar
+#
+CONFIG_NXWM_TASKBAR_VSPACING=4
+CONFIG_NXWM_TASKBAR_HSPACING=2
+# CONFIG_NXWM_TASKBAR_TOP is not set
+# CONFIG_NXWM_TASKBAR_BOTTOM is not set
+CONFIG_NXWM_TASKBAR_LEFT=y
+# CONFIG_NXWM_TASKBAR_RIGHT is not set
+# CONFIG_NXWM_CUSTOM_TASKBAR_WIDTH is not set
+# CONFIG_NXWM_TASKBAR_ICONSCALE is not set
+# CONFIG_NXWM_DISABLE_MINIMIZE is not set
+# CONFIG_NXWM_TASKBAR_NO_BORDER is not set
+
+#
+# NxWM Toolbar Configuration
+#
+# CONFIG_NXWM_CUSTOM_TOOLBAR_HEIGHT is not set
+# CONFIG_NXWM_TOOLBAR_CUSTOM_FONTID is not set
+
+#
+# NxWM Application Window Configuration
+#
+# CONFIG_NXWM_CUSTOM_APPWINDOW_ICONS is not set
+
+#
+# NxWM Start Window Configuration
+#
+
+#
+# Horizontal and vertical spacing of icons in the task bar
+#
+CONFIG_NXWM_STARTWINDOW_VSPACING=4
+CONFIG_NXWM_STARTWINDOW_HSPACING=4
+# CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set
+CONFIG_NXWM_STARTWINDOW_MQNAME="nxwm"
+CONFIG_NXWM_STARTWINDOW_MXMSGS=32
+CONFIG_NXWM_STARTWINDOW_MXMPRIO=42
+CONFIG_NXWM_STARTWINDOW_PRIO=100
+CONFIG_NXWM_STARTWINDOW_STACKSIZE=2048
+
+#
+# NxTerm Window Settings
+#
+CONFIG_NXWM_NXTERM=y
+CONFIG_NXWM_NXTERM_PRIO=100
+CONFIG_NXWM_NXTERM_STACKSIZE=2048
+# CONFIG_NXWM_NXTERM_CUSTOM_COLORS is not set
+# CONFIG_NXWM_NXTERM_CUSTOM_FONTID is not set
+# CONFIG_NXWM_CUSTOM_NXTERM_ICON is not set
+
+#
+# NxWM Touchscreen Configuration
+#
+CONFIG_NXWM_TOUCHSCREEN=y
+
+#
+# Touchscreen Device Settings
+#
+CONFIG_NXWM_TOUCHSCREEN_DEVINIT=y
+CONFIG_NXWM_TOUCHSCREEN_DEVNO=0
+CONFIG_NXWM_TOUCHSCREEN_DEVPATH="/dev/input0"
+CONFIG_NXWM_TOUCHSCREEN_SIGNO=5
+CONFIG_NXWM_TOUCHSCREEN_LISTENERPRIO=120
+CONFIG_NXWM_TOUCHSCREEN_LISTENERSTACK=1596
+
+#
+# NxWM Keyboard Configuration
+#
+CONFIG_NXWM_KEYBOARD=y
+
+#
+# Keyboard Device Settings
+#
+CONFIG_NXWM_KEYBOARD_DEVPATH="/dev/console"
+# CONFIG_NXWM_KEYBOARD_USBHOST is not set
+CONFIG_NXWM_KEYBOARD_SIGNO=6
+CONFIG_NXWM_KEYBOARD_BUFSIZE=16
+CONFIG_NXWM_KEYBOARD_LISTENERPRIO=120
+CONFIG_NXWM_KEYBOARD_LISTENERSTACK=2048
+
+#
+# NxWM Calibration Display Settings
+#
+CONFIG_NXWM_CALIBRATION_MARGIN=40
+# CONFIG_NXWM_CALIBRATION_CUSTOM_COLORS is not set
+# CONFIG_NXWM_CALIBRATION_MESSAGES is not set
+# CONFIG_NXWM_CALIBRATION_ANISOTROPIC is not set
+# CONFIG_NXWM_CUSTOM_CALIBRATION_ICON is not set
+CONFIG_NXWM_CALIBRATION_SIGNO=5
+CONFIG_NXWM_CALIBRATION_LISTENERPRIO=100
+CONFIG_NXWM_CALIBRATION_LISTENERSTACK=2048
+
+#
+# NxWM Hex Calculator Display Settings
+#
+# CONFIG_NXWM_HEXCALCULATOR_CUSTOM_COLORS is not set
+# CONFIG_NXWM_CUSTOM_HEXCALCULATOR_ICON is not set
+CONFIG_NXWM_HEXCALCULATOR_CUSTOM_FONTID=y
+CONFIG_NXWM_HEXCALCULATOR_FONTID=5
+
+#
+# NxWM Media Player Display Settings
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_I2CTOOL is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f429i-disco/nxwm/setenv.sh b/configs/stm32f429i-disco/nxwm/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..9e49945922dde8eedfc66525d0e497033c0bc44b
--- /dev/null
+++ b/configs/stm32f429i-disco/nxwm/setenv.sh
@@ -0,0 +1,80 @@
+#!/bin/bash
+# configs/stm32f429i-disco/nxwm/setenv.sh
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# These are the Cygwin paths to the locations where I installed the Atollic
+# toolchain under windows.  You will also have to edit this if you install
+# the Atollic toolchain in any other location.  /usr/bin is added before
+# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
+# at those locations as well.
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/stm32f429i-disco/src/Makefile b/configs/stm32f429i-disco/src/Makefile
index aec191fdc2bb3f5aa63361c22c552664136f3434..2ff0cb8d235584b97ff8aa2629468de51077f17e 100644
--- a/configs/stm32f429i-disco/src/Makefile
+++ b/configs/stm32f429i-disco/src/Makefile
@@ -64,10 +64,18 @@ ifeq ($(CONFIG_STM32_OTGHS),y)
 CSRCS += stm32_usb.c
 endif
 
+ifeq ($(CONFIG_INPUT_STMPE811),y)
+CSRCS += stm32_stmpe811.c
+endif
+
 ifeq ($(CONFIG_STM32F429I_DISCO_ILI9341),y)
 CSRCS += stm32_ili93414ws.c
 endif
 
+ifeq ($(CONFIG_SENSORS_L3GD20),y)
+CSRCS += stm32_l3gd20.c
+endif
+
 ifeq ($(and \
       $(CONFIG_STM32F429I_DISCO_ILI9341_LCDIFACE), \
       $(CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE), \
diff --git a/configs/stm32f429i-disco/src/stm32_appinit.c b/configs/stm32f429i-disco/src/stm32_appinit.c
index 29bbb24320db517d965b0c994a926353c2dae5e6..bbd1b18078c7bc5538ed8e27edca71bcacc7b7cb 100644
--- a/configs/stm32f429i-disco/src/stm32_appinit.c
+++ b/configs/stm32f429i-disco/src/stm32_appinit.c
@@ -55,8 +55,8 @@
 #  include 
 #endif
 
-#ifdef CONFIG_SYSTEM_USBMONITOR
-#  include 
+#ifdef CONFIG_USBMONITOR
+#  include 
 #endif
 
 #ifndef CONFIG_STM32F429I_DISCO_FLASH_MINOR
@@ -65,7 +65,7 @@
 
 #ifdef CONFIG_STM32F429I_DISCO_FLASH_CONFIG_PART
 #ifdef CONFIG_PLATFORM_CONFIGDATA
-#  include 
+#  include 
 #endif
 #endif
 
@@ -109,7 +109,7 @@
 
 /* Check if we should enable the USB monitor before starting NSH */
 
-#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_SYSTEM_USBMONITOR)
+#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_USBMONITOR)
 #  undef HAVE_USBMONITOR
 #endif
 
@@ -165,6 +165,8 @@ int board_app_initialize(uintptr_t arg)
   int ret;
 #elif defined(HAVE_USBHOST) || defined(HAVE_USBMONITOR)
   int ret;
+#elif defined(CONFIG_SENSORS_L3GD20)
+  int ret;
 #endif
 
   /* Configure SPI-based devices */
@@ -205,7 +207,7 @@ int board_app_initialize(uintptr_t arg)
       ret = mtd->ioctl(mtd, MTDIOC_GEOMETRY, (unsigned long)((uintptr_t)&geo));
       if (ret < 0)
         {
-          fdbg("ERROR: mtd->ioctl failed: %d\n", ret);
+          ferr("ERROR: mtd->ioctl failed: %d\n", ret);
           return ret;
         }
 
@@ -242,7 +244,7 @@ int board_app_initialize(uintptr_t arg)
 
             if (partszbytes < erasesize)
               {
-                fdbg("ERROR: Partition size is lesser than erasesize!\n");
+                ferr("ERROR: Partition size is lesser than erasesize!\n");
                 return -1;
               }
 
@@ -250,7 +252,7 @@ int board_app_initialize(uintptr_t arg)
 
             if ((partszbytes % erasesize) != 0)
               {
-                fdbg("ERROR: Partition size is not multiple of erasesize!\n");
+                ferr("ERROR: Partition size is not multiple of erasesize!\n");
                 return -1;
               }
 
@@ -284,7 +286,7 @@ int board_app_initialize(uintptr_t arg)
 
             if (mtd_part == NULL)
               {
-                dbg("Error: failed to create partition %s\n", partname);
+                ferr("ERROR: failed to create partition %s\n", partname);
                 return -1;
               }
 
@@ -371,12 +373,20 @@ int board_app_initialize(uintptr_t arg)
 #ifdef HAVE_USBMONITOR
   /* Start the USB Monitor */
 
-  ret = usbmonitor_start(0, NULL);
+  ret = usbmonitor_start();
   if (ret != OK)
     {
       syslog(LOG_ERR, "ERROR: Failed to start USB monitor: %d\n", ret);
     }
 #endif
 
+#ifdef CONFIG_SENSORS_L3GD20
+  ret = stm32_l3gd20initialize("/dev/gyr0");
+  if (ret != OK)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to initialize l3gd20 sensor: %d\n", ret);
+    }
+#endif
+
   return OK;
 }
diff --git a/configs/stm32f429i-disco/src/stm32_autoleds.c b/configs/stm32f429i-disco/src/stm32_autoleds.c
index ce9d5bcb4029f19e3d2c22b2f828a1544c53c759..afe6f244db180d5b5c3d5db37a1a889c7fe08911 100644
--- a/configs/stm32f429i-disco/src/stm32_autoleds.c
+++ b/configs/stm32f429i-disco/src/stm32_autoleds.c
@@ -58,18 +58,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* The following definitions map the encoded LED setting to GPIO settings */
 
 #define STM32F4_LED1      (1 << 0)
diff --git a/configs/stm32f429i-disco/src/stm32_boot.c b/configs/stm32f429i-disco/src/stm32_boot.c
index 33f855a28ce2b6e7c057eeb0c292ae3b2039d3a6..763c1a8766b4d0555a9bc0297b893cb443d01654 100644
--- a/configs/stm32f429i-disco/src/stm32_boot.c
+++ b/configs/stm32f429i-disco/src/stm32_boot.c
@@ -52,9 +52,50 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
+/* Configuration ********************************************************************/
+/* Should we initialize the NX server using nx_start?  This is done for NxWidgets
+ * (CONFIG_NXWIDGETS=y) and if the NxWidget::CNxServer class expects the RTOS do the
+ * the NX initialization (CONFIG_NXWIDGET_SERVERINIT=n).  This combination of
+ * settings is normally only used in the kernel build mode* (CONFIG_BUILD_PROTECTED)
+ * when NxWidgets is unable to initialize NX from user-space.
+ */
+
+#undef HAVE_NXSTART
+
+#if !defined(CONFIG_NX_MULTIUSER)
+#  undef CONFIG_NX_START
+#endif
+
+#if defined(CONFIG_NXWIDGETS) && !defined(CONFIG_NXWIDGET_SERVERINIT)
+#   define HAVE_NXSTART
+#   include 
+#endif
+
+/* Should we initialize the touchscreen for the NxWM (CONFIG_NXWM=y)?  This
+ * is done if we have a touchscreen (CONFIG_INPUT_STMPE811=y), NxWM uses the
+ * touchscreen (CONFIG_NXWM_TOUCHSCREEN=y), and if we were asked to
+ * initialize the touchscreen for NxWM (NXWM_TOUCHSCREEN_DEVINIT=n). This
+ * combination of settings is normally only used in the kernel build mode
+ * (CONFIG_BUILD_PROTECTED) when NxWidgets is unable to initialize NX from
+ * user-space.
+ */
+
+#undef HAVE_TCINIT
+
+#if defined(CONFIG_NXWM_TOUCHSCREEN)
+#  if !defined(CONFIG_NXWM_TOUCHSCREEN_DEVNO)
+#    error CONFIG_NXWM_TOUCHSCREEN_DEVNO is not defined
+#  elif defined(CONFIG_INPUT_STMPE811)
+#    if !defined(CONFIG_NXWM_TOUCHSCREEN_DEVINIT)
+#      define HAVE_TCINIT
+#      include 
+#    endif
+#  else
+#    if !defined(CONFIG_NXWM_TOUCHSCREEN_DEVINIT) && defined(CONFIG_BUILD_PROTECTED)
+#      error CONFIG_INPUT_STMPE811=y is needed
+#    endif
+#  endif
+#endif
 
 /************************************************************************************
  * Public Functions
diff --git a/configs/stm32f429i-disco/src/stm32_buttons.c b/configs/stm32f429i-disco/src/stm32_buttons.c
index 6dbe3cba7a9b53205b7de2a1ad9027eb3e49af11..a6ffed5433de97a068f8107996e6572d0708b101 100644
--- a/configs/stm32f429i-disco/src/stm32_buttons.c
+++ b/configs/stm32f429i-disco/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/stm32f429i-disco/src/stm32_buttons.c
  *
- *   Copyright (C) 2011-2012, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -49,18 +50,10 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /* Pin configuration for each STM32F4 Discovery button.  This array is indexed by
  * the BUTTON_* definitions in board.h
  */
@@ -146,23 +139,23 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   /* The following should be atomic */
 
   if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
     {
-      oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler, arg);
     }
-  return oldhandler;
+
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/stm32f429i-disco/src/stm32_idle.c b/configs/stm32f429i-disco/src/stm32_idle.c
index 1654e0fed23bafe0e1c120010c87be306456b3ee..03bf79db1a517455077cf7465b179962502c81a4 100644
--- a/configs/stm32f429i-disco/src/stm32_idle.c
+++ b/configs/stm32f429i-disco/src/stm32_idle.c
@@ -125,7 +125,7 @@ static void stm32_idlepm(void)
 
   if (newstate != oldstate)
     {
-      lldbg("newstate= %d oldstate=%d\n", newstate, oldstate);
+      sinfo("newstate= %d oldstate=%d\n", newstate, oldstate);
 
       flags = enter_critical_section();
 
diff --git a/configs/stm32f429i-disco/src/stm32_ili93414ws.c b/configs/stm32f429i-disco/src/stm32_ili93414ws.c
index 58dad6eae23e8d5b403b0b69c9b371988ba0df91..7948c035957eb1ea305293c267ec2d3ff48e7d40 100644
--- a/configs/stm32f429i-disco/src/stm32_ili93414ws.c
+++ b/configs/stm32f429i-disco/src/stm32_ili93414ws.c
@@ -132,16 +132,6 @@
 #  define ILI93414WS_SPI
 #endif
 
-/* Debug option */
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg       dbg
-#  define lcdvdbg      vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Type Definition
  ****************************************************************************/
@@ -167,8 +157,7 @@ struct ili93414ws_lcd_s
 #endif
 
 #ifndef CONFIG_STM32F429I_DISCO_ILI9341_SPIBITS16
-  /*
-   * Marks current display operation mode (gram or command/parameter)
+  /* Marks current display operation mode (gram or command/parameter)
    * If 16-bit spi mode is enabled for pixel data operation, the flag is not
    * neccessary. The pixel data operation mode can then be recognized by the
    * DFF flag in the cr1 register.
@@ -178,39 +167,38 @@ struct ili93414ws_lcd_s
 #endif
 };
 
-
 /****************************************************************************
  * Private Function Protototypes
  ****************************************************************************/
 
 /* Low-level spi transfer */
 
-static void stm32_ili93414ws_modifyreg(
-                uint32_t reg, uint16_t setbits, uint16_t clrbits);
-static inline void stm32_ili93414ws_modifycr1(
-                      uint16_t setbits, uint16_t clrbits);
-static inline void stm32_ili93414ws_modifycr2(
-                      uint16_t setbits, uint16_t clrbits);
+static void stm32_ili93414ws_modifyreg(uint32_t reg, uint16_t setbits,
+              uint16_t clrbits);
+static inline void stm32_ili93414ws_modifycr1(uint16_t setbits,
+              uint16_t clrbits);
+static inline void stm32_ili93414ws_modifycr2(uint16_t setbits,
+              uint16_t clrbits);
 static void stm32_ili93414ws_spisendmode(void);
 static void stm32_ili93414ws_spirecvmode(void);
 static void stm32_ili93414ws_spienable(void);
 static void stm32_ili93414ws_spidisable(void);
 
 static inline void stm32_ili93414ws_set8bitmode(
-                        FAR struct ili93414ws_lcd_s *dev);
+              FAR struct ili93414ws_lcd_s *dev);
 static inline void stm32_ili93414ws_set16bitmode(
-                        FAR struct ili93414ws_lcd_s *dev);
+              FAR struct ili93414ws_lcd_s *dev);
 
 /* Command and data transmission control */
 
 static void stm32_ili93414ws_sndword(uint16_t wd);
 static int stm32_ili93414ws_sendblock(FAR struct ili93414ws_lcd_s *lcd,
-                                const uint16_t *wd, uint16_t nwords);
+              const uint16_t *wd, uint16_t nwords);
 static uint16_t stm32_ili93414ws_recvword(void);
 static int stm32_ili93414ws_recvblock(FAR struct ili93414ws_lcd_s *lcd,
-                                uint16_t *wd, uint16_t nwords);
+              uint16_t *wd, uint16_t nwords);
 static inline void stm32_ili93414ws_cmddata(
-                        FAR struct ili9341_lcd_s *lcd, bool cmd);
+              FAR struct ili9341_lcd_s *lcd, bool cmd);
 
 /* Initializing / Configuration */
 
@@ -242,17 +230,17 @@ struct ili93414ws_lcd_s g_lcddev;
  *
  ****************************************************************************/
 
-static void stm32_ili93414ws_modifyreg(
-                uint32_t reg, uint16_t setbits, uint16_t clrbits)
+static void stm32_ili93414ws_modifyreg(uint32_t reg, uint16_t setbits,
+                                       uint16_t clrbits)
 {
   uint16_t regval;
-  regval = getreg16(reg);
+
+  regval  = getreg16(reg);
   regval &= ~clrbits;
   regval |= setbits;
   putreg16(regval, reg);
 }
 
-
 /****************************************************************************
  * Name: stm32_ili93414ws_modifycr1
  *
@@ -264,10 +252,12 @@ static void stm32_ili93414ws_modifyreg(
  *   setbits - The bits to set
  *
  * Returned Value:
+ *   None
  *
  ****************************************************************************/
 
-static inline void stm32_ili93414ws_modifycr1(uint16_t setbits, uint16_t clrbits)
+static inline void stm32_ili93414ws_modifycr1(uint16_t setbits,
+                                              uint16_t clrbits)
 {
   stm32_ili93414ws_modifyreg(ILI93414WS_SPI_CR1, setbits, clrbits);
 }
@@ -283,15 +273,16 @@ static inline void stm32_ili93414ws_modifycr1(uint16_t setbits, uint16_t clrbits
  *   setbits - The bits to set
  *
  * Returned Value:
+ *   None
  *
  ****************************************************************************/
 
-static inline void stm32_ili93414ws_modifycr2(uint16_t setbits, uint16_t clrbits)
+static inline void stm32_ili93414ws_modifycr2(uint16_t setbits,
+                                              uint16_t clrbits)
 {
   stm32_ili93414ws_modifyreg(ILI93414WS_SPI_CR2, setbits, clrbits);
 }
 
-
 /****************************************************************************
  * Name: stm32_ili93414ws_spirecvmode
  *
@@ -314,15 +305,13 @@ static void stm32_ili93414ws_spirecvmode(void)
 
   stm32_ili93414ws_spidisable();
 
-  /*
-   * Clear the rx buffer if received data exist e.g. from previous
+  /* Clear the rx buffer if received data exist e.g. from previous
    * broken transfer.
    */
 
   (void)getreg16(ILI93414WS_SPI_DR);
 }
 
-
 /****************************************************************************
  * Name: stm32_ili93414ws_spisendmode
  *
@@ -330,8 +319,10 @@ static void stm32_ili93414ws_spirecvmode(void)
  *   Sets the spi device to the bidirectional transmit mode
  *
  * Input Parameters:
+ *   None
  *
  * Returned Value:
+ *   None
  *
  ****************************************************************************/
 
@@ -346,7 +337,6 @@ static void stm32_ili93414ws_spisendmode(void)
   stm32_ili93414ws_spienable();
 }
 
-
 /****************************************************************************
  * Name: stm32_ili93414ws_spienable
  *
@@ -354,8 +344,10 @@ static void stm32_ili93414ws_spisendmode(void)
  *   Enable the spi device
  *
  * Input Parameters:
+ *   None
  *
  * Returned Value:
+ *   None
  *
  ****************************************************************************/
 
@@ -368,7 +360,6 @@ static void stm32_ili93414ws_spienable(void)
   putreg16(regval, ILI93414WS_SPI_CR1);
 }
 
-
 /****************************************************************************
  * Name: stm32_ili93414ws_spidisable
  *
@@ -376,8 +367,10 @@ static void stm32_ili93414ws_spienable(void)
  *   Disable the spi device
  *
  * Input Parameters:
+ *   None
  *
  * Returned Value:
+ *   None
  *
  ****************************************************************************/
 
@@ -390,7 +383,6 @@ static void stm32_ili93414ws_spidisable(void)
   putreg16(regval, ILI93414WS_SPI_CR1);
 }
 
-
 /****************************************************************************
  * Name: stm32_ili93414ws_sndword
  *
@@ -401,6 +393,7 @@ static void stm32_ili93414ws_spidisable(void)
  *   wd  - word to send
  *
  * Returned Value:
+ *   None
  *
  ****************************************************************************/
 
@@ -432,13 +425,14 @@ static void stm32_ili93414ws_sndword(uint16_t wd)
  ****************************************************************************/
 
 static int stm32_ili93414ws_sendblock(FAR struct ili93414ws_lcd_s *lcd,
-                                const uint16_t *wd, uint16_t nwords)
+                                      const uint16_t *wd, uint16_t nwords)
 {
   /* Set to bidirectional transmit mode and enable spi */
 
   stm32_ili93414ws_spisendmode();
 
   /* Check if 16-bit spi mode is configured for transmit */
+
 #ifdef CONFIG_STM32F429I_DISCO_ILI9341_SPIBITS16
   if ((getreg16(ILI93414WS_SPI_CR1) & SPI_CR1_DFF) != 0)
     {
@@ -454,10 +448,10 @@ static int stm32_ili93414ws_sendblock(FAR struct ili93414ws_lcd_s *lcd,
         }
     }
 #else
-  /*
-   * 8-bit spi mode is enabled for pixel data operations.
+  /* 8-bit spi mode is enabled for pixel data operations.
    * Each pixel must be transmitted by two write operations.
    */
+
   if (lcd->gmode == 16)
     {
       /* 8-bit spi mode */
@@ -488,8 +482,7 @@ static int stm32_ili93414ws_sendblock(FAR struct ili93414ws_lcd_s *lcd,
 
     }
 
-  /*
-   * Wait until transmit is not busy after the last word is transmitted, marked
+  /* Wait until transmit is not busy after the last word is transmitted, marked
    * by the BSY flag in the cr1 register. This is neccessary if entering in halt
    * mode or disable the spi periphery.
    */
@@ -503,7 +496,6 @@ static int stm32_ili93414ws_sendblock(FAR struct ili93414ws_lcd_s *lcd,
   return OK;
 }
 
-
 /****************************************************************************
  * Name: stm32_ili93414ws_recvword
  *
@@ -511,6 +503,7 @@ static int stm32_ili93414ws_sendblock(FAR struct ili93414ws_lcd_s *lcd,
  *   Receive a word from the lcd driver.
  *
  * Input Parameters:
+ *   None
  *
  * Returned Value:
  *   On success - The received word from the LCD Single Chip Driver.
@@ -524,8 +517,7 @@ static uint16_t stm32_ili93414ws_recvword(void)
           uint16_t   regval;
         irqstate_t   flags;
 
-  /*
-   * Disable interrupts during time critical spi sequence.
+  /* Disable interrupts during time critical spi sequence.
    * In bidrectional receive mode the data transfer can only be stopped by
    * disabling the spi device. This is here done by disabling the spi device
    * immediately after enabling it. If the pixel data stream is interrupted
@@ -544,8 +536,7 @@ static uint16_t stm32_ili93414ws_recvword(void)
 
   regval = getreg16(ILI93414WS_SPI_CR1);
 
-  /*
-   * Enable spi device followed by disable the spi device.
+  /* Enable spi device followed by disable the spi device.
    *
    * Ensure that the spi is disabled within 8 or 16 spi clock cycles depending
    * on the configured spi bit mode. This is neccessary to prevent that the next
@@ -568,8 +559,7 @@ static uint16_t stm32_ili93414ws_recvword(void)
 
   leave_critical_section(flags);
 
-  /*
-   * Waits until the RX buffer is filled with the received data word signalized
+  /* Waits until the RX buffer is filled with the received data word signalized
    * by the spi hardware through the RXNE flag.
    * A busy loop is preferred against interrupt driven receiving method here
    * because this happend fairly often. Also we have to ensure to avoid a big
@@ -587,12 +577,11 @@ static uint16_t stm32_ili93414ws_recvword(void)
         }
     }
 
-  dbg("Timeout during receiving pixel word\n");
+  lcdinfo("Timeout during receiving pixel word\n");
 
   return 0;
 }
 
-
 /****************************************************************************
  * Name: stm32_ili93414ws_recvblock
  *
@@ -613,8 +602,7 @@ static uint16_t stm32_ili93414ws_recvword(void)
 static int stm32_ili93414ws_recvblock(FAR struct ili93414ws_lcd_s *lcd,
                                 uint16_t *wd, uint16_t nwords)
 {
-  /*
-   * ili9341 uses a 18-bit pixel format packed in a 24-bit stream per pixel.
+  /* ili9341 uses a 18-bit pixel format packed in a 24-bit stream per pixel.
    * The following format is transmitted: RRRRRR00 GGGGGG00 BBBBBB00
    * Convert it to:                       RRRRRGGG GGGBBBBB
    */
@@ -655,8 +643,7 @@ static int stm32_ili93414ws_recvblock(FAR struct ili93414ws_lcd_s *lcd,
           --nwords;
         }
 
-      /*
-       * Receive
+      /* Receive
        * if nwords even and greater than 2: pixel 2 to n-1
        * if nwords odd and greater than 2:  pixel 2 to n
        */
@@ -664,9 +651,11 @@ static int stm32_ili93414ws_recvblock(FAR struct ili93414ws_lcd_s *lcd,
       while (nwords--)
         {
           /* RRRRRR00 GGGGGG00 */
+
           w1 = stm32_ili93414ws_recvword();
 
           /* BBBBBB00 RRRRRR00 */
+
           w2 = stm32_ili93414ws_recvword();
 
           *dest++ = ((w1 & 0xf800) | ((w1 << 3) & 0x7e0) | (w2 >> 11));
@@ -677,6 +666,7 @@ static int stm32_ili93414ws_recvblock(FAR struct ili93414ws_lcd_s *lcd,
             }
 
           /* GGGGGG00 BBBBBB00 */
+
           w1 = stm32_ili93414ws_recvword();
 
           *dest++ = (((w1 >> 5) & 0x7e0) |
@@ -687,16 +677,18 @@ static int stm32_ili93414ws_recvblock(FAR struct ili93414ws_lcd_s *lcd,
         }
     }
 #else
-  /*
-   * 8-bit spi mode is enabled for pixel data operations.
+  /* 8-bit spi mode is enabled for pixel data operations.
    * Each pixel must be received by three read operations.
    */
+
   if (lcd->gmode == 16)
     {
       /* 8-bit spi mode but 16-bit mode is done by two 8-bit transmits */
+
       uint16_t *dest = wd;
 
       /* Dummy read to discard the first 8 bit. */
+
       (void)stm32_ili93414ws_recvword();
 
       while (nwords--)
@@ -726,7 +718,6 @@ static int stm32_ili93414ws_recvblock(FAR struct ili93414ws_lcd_s *lcd,
   return OK;
 }
 
-
 /****************************************************************************
  * Name: stm32_ili93414ws_set8bitmode
  *
@@ -737,6 +728,7 @@ static int stm32_ili93414ws_recvblock(FAR struct ili93414ws_lcd_s *lcd,
  *   dev  - Reference to the private driver structure
  *
  * Returned Value:
+ *   None
  *
  ****************************************************************************/
 
@@ -749,7 +741,6 @@ static inline void stm32_ili93414ws_set8bitmode(
 #endif
 }
 
-
 #ifdef CONFIG_STM32F429I_DISCO_ILI9341_SPIBITS16
 /****************************************************************************
  * Name: stm32_ili93414ws_set16bitmode
@@ -761,6 +752,7 @@ static inline void stm32_ili93414ws_set8bitmode(
  *   dev  - Reference to the private driver structure
  *
  * Returned Value:
+ *   None
  *
  ****************************************************************************/
 
@@ -778,7 +770,6 @@ static inline void stm32_ili93414ws_set16bitmode(
 }
 #endif
 
-
 /****************************************************************************
  * Name: stm32_ili93414ws_spiconfig
  *
@@ -789,6 +780,7 @@ static inline void stm32_ili93414ws_set16bitmode(
  *   lcd  - Reference to the private driver structure
  *
  * Returned Value:
+ *   None
  *
  ****************************************************************************/
 
@@ -830,8 +822,7 @@ static void stm32_ili93414ws_spiconfig(FAR struct ili9341_lcd_s *lcd)
   priv->cr1 = getreg16(ILI93414WS_SPI_CR1);
 #endif
 
-  /*
-   * Set spi device to bidirectional half duplex
+  /* Set spi device to bidirectional half duplex
    * Configure to master with 8-bit data format and SPIDEV_MODE0
    */
 
@@ -898,7 +889,6 @@ static int stm32_ili93414ws_backlight(FAR struct ili9341_lcd_s *lcd, int level)
   return OK;
 }
 
-
 /****************************************************************************
  * Name: stm32_ili93414ws_select
  *
@@ -917,8 +907,7 @@ static void stm32_ili93414ws_select(FAR struct ili9341_lcd_s *lcd)
 {
   FAR struct ili93414ws_lcd_s *priv = (FAR struct ili93414ws_lcd_s *)lcd;
 
-  /*
-   * Select ili9341 (locking the SPI bus in case there are multiple
+  /* Select ili9341 (locking the SPI bus in case there are multiple
    * devices competing for the SPI bus
    */
 
@@ -932,7 +921,7 @@ static void stm32_ili93414ws_select(FAR struct ili9341_lcd_s *lcd)
 #else
 static void stm32_ili93414ws_select(FAR struct ili9341_lcd_s *lcd)
 {
-  /* we own the spi bus, so just select the chip */
+  /* We own the spi bus, so just select the chip */
 
   (void)stm32_gpiowrite(GPIO_CS_LCD, false);
 
@@ -963,8 +952,7 @@ static void stm32_ili93414ws_deselect(FAR struct ili9341_lcd_s *lcd)
 
   flags = enter_critical_section();
 
-  /*
-   * Restore cr1 and cr2 register to be sure they will be usable
+  /* Restore cr1 and cr2 register to be sure they will be usable
    * by default spi interface structure. (This is an important workarround as
    * long as half duplex mode is not supported by the spi interface in
    * arch/arm/src/stm32/stm32_spi.c).
@@ -973,8 +961,7 @@ static void stm32_ili93414ws_deselect(FAR struct ili9341_lcd_s *lcd)
   putreg16(priv->cr2, ILI93414WS_SPI_CR2);
   putreg16(priv->cr1, ILI93414WS_SPI_CR1);
 
-  /*
-   * Enable spi device is default for initialized spi ports (see
+  /* Enable spi device is default for initialized spi ports (see
    * arch/arm/src/stm32/stm32_spi.c).
    */
 
@@ -994,7 +981,6 @@ static void stm32_ili93414ws_deselect(FAR struct ili9341_lcd_s *lcd)
 }
 #endif
 
-
 /****************************************************************************
  * Name: stm32_ili93414ws_sndcmd
  *
@@ -1021,7 +1007,7 @@ static int stm32_ili93414ws_sendcmd(
 
   stm32_ili93414ws_set8bitmode(priv);
 
-  lcdvdbg("cmd=%04x\n", bw);
+  lcdinfo("cmd=%04x\n", bw);
   stm32_ili93414ws_cmddata(lcd, true);
   ret = stm32_ili93414ws_sendblock(priv, &bw, 1);
   stm32_ili93414ws_cmddata(lcd, false);
@@ -1029,7 +1015,6 @@ static int stm32_ili93414ws_sendcmd(
   return ret;
 }
 
-
 /****************************************************************************
  * Name: stm32_ili93414ws_sendparam
  *
@@ -1055,11 +1040,10 @@ static int stm32_ili93414ws_sendparam(FAR struct ili9341_lcd_s *lcd,
 
   stm32_ili93414ws_set8bitmode(priv);
 
-  lcdvdbg("param=%04x\n", bw);
+  lcdinfo("param=%04x\n", bw);
   return stm32_ili93414ws_sendblock(priv, &bw, 1);
 }
 
-
 /****************************************************************************
  * Name: stm32_ili93414ws_sendgram
  *
@@ -1081,7 +1065,7 @@ static int stm32_ili93414ws_sendgram(FAR struct ili9341_lcd_s *lcd,
 {
   FAR struct ili93414ws_lcd_s *priv = (FAR struct ili93414ws_lcd_s *)lcd;
 
-  lcdvdbg("wd=%p, nwords=%d\n", wd, nwords);
+  lcdinfo("wd=%p, nwords=%d\n", wd, nwords);
 
   /* Set to 16-bit mode transfer mode, spi device is in disabled state */
 
@@ -1090,7 +1074,6 @@ static int stm32_ili93414ws_sendgram(FAR struct ili9341_lcd_s *lcd,
   return stm32_ili93414ws_sendblock(priv, wd, nwords);
 };
 
-
 /****************************************************************************
  * Name: stm32_ili93414ws_recvparam
  *
@@ -1117,11 +1100,10 @@ static int stm32_ili93414ws_recvparam(FAR struct ili9341_lcd_s *lcd,
   stm32_ili93414ws_set8bitmode(priv);
 #endif
 
-  lcdvdbg("param=%04x\n", param);
+  lcdinfo("param=%04x\n", param);
   return stm32_ili93414ws_recvblock(priv, (uint16_t*)param, 1);
 }
 
-
 /****************************************************************************
  * Name: stm32_ili93414ws_recvgram
  *
@@ -1143,7 +1125,7 @@ static int stm32_ili93414ws_recvgram(FAR struct ili9341_lcd_s *lcd,
 {
   FAR struct ili93414ws_lcd_s *priv = (FAR struct ili93414ws_lcd_s *)lcd;
 
-  lcdvdbg("wd=%p, nwords=%d\n", wd, nwords);
+  lcdinfo("wd=%p, nwords=%d\n", wd, nwords);
 
   /* Set to 16-bit mode in disabled state */
 
@@ -1152,7 +1134,6 @@ static int stm32_ili93414ws_recvgram(FAR struct ili9341_lcd_s *lcd,
   return stm32_ili93414ws_recvblock(priv, wd, nwords);
 };
 
-
 /****************************************************************************
  * Name:  stm32_ili93414ws_initialize
  *
@@ -1174,9 +1155,9 @@ FAR struct ili9341_lcd_s *stm32_ili93414ws_initialize(void)
   FAR struct spi_dev_s *spi;
   FAR struct ili93414ws_lcd_s *priv = &g_lcddev;
 
-  lcddbg("initialize ili9341 4-wire serial subdriver\n");
+  lcdinfo("initialize ili9341 4-wire serial subdriver\n");
 
-  lcdvdbg("initialize spi device: %d\n", ILI93414WS_SPI_DEVICE);
+  lcdinfo("initialize spi device: %d\n", ILI93414WS_SPI_DEVICE);
   spi = stm32_spi5initialize();
 
   if (spi)
@@ -1206,7 +1187,7 @@ FAR struct ili9341_lcd_s *stm32_ili93414ws_initialize(void)
   uint32_t    regval;
   FAR struct ili93414ws_lcd_s *priv = &g_lcddev;
 
-  lcddbg("initialize ili9341 4-wire serial subdriver\n");
+  lcdinfo("initialize ili9341 4-wire serial subdriver\n");
 
   /* Enable spi bus */
 
@@ -1236,7 +1217,7 @@ FAR struct ili9341_lcd_s *stm32_ili93414ws_initialize(void)
 
   /* Configure to bidirectional transfer mode */
 
-  lcdvdbg("Configure spi device %d to bidirectional transfer mode\n",
+  lcdinfo("Configure spi device %d to bidirectional transfer mode\n",
             ILI93414WS_SPI_DEVICE);
 
   stm32_ili93414ws_spiconfig(&priv->dev);
diff --git a/configs/stm32f429i-disco/src/stm32_l3gd20.c b/configs/stm32f429i-disco/src/stm32_l3gd20.c
new file mode 100644
index 0000000000000000000000000000000000000000..4cdc0a896e01be6b4c844311b17f3fbbe0aa0a1c
--- /dev/null
+++ b/configs/stm32f429i-disco/src/stm32_l3gd20.c
@@ -0,0 +1,142 @@
+/****************************************************************************
+ * configs/stm32f429i-disco/src/stm32_l3gd20.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt.  All rights reserved.
+ *   Author: Mateusz Szafoni 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "stm32.h"
+#include "stm32_spi.h"
+#include "stm32f429i-disco.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if defined(CONFIG_SPI) & defined(CONFIG_SENSORS_L3GD20)
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int l3gd20_attach(FAR struct l3gd20_config_s * cfg, xcpt_t irq);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Only one L3GD20 device on board */
+
+static struct l3gd20_config_s g_l3gd20_config =
+{
+  .attach = l3gd20_attach,
+  .irq = L3GD20_IRQ,
+  .spi_devid = SPIDEV_ACCELEROMETER
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: l3gd20_attach()
+ *
+ * Description: Attach the l3gd20 interrupt handler to the GPIO interrupt
+ *
+ ****************************************************************************/
+
+static int l3gd20_attach(FAR struct l3gd20_config_s *cfg, xcpt_t irq)
+{
+  return stm32_gpiosetevent(GPIO_L3GD20_DREADY, true, false, true, irq, NULL);
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_l3gd20initialize()
+ *
+ * Description:
+ *   Initialize and register the L3GD20 3 axis gyroscope sensor driver.
+ *
+ * Input parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/gyro0"
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int stm32_l3gd20initialize(FAR const char *devpath)
+{
+  int ret = 0;
+  struct spi_dev_s *spi;
+
+  /* Configure DREADY IRQ input */
+
+  stm32_configgpio(GPIO_L3GD20_DREADY);
+
+  /* Initialize SPI */
+
+  spi = stm32_spi5initialize();
+
+  if (!spi)
+    {
+      ret = -ENODEV;
+      goto errout;
+    }
+
+  /* Then register the gyro */
+
+  ret = l3gd20_register(devpath, spi, &g_l3gd20_config);
+  if (ret != OK)
+    {
+      goto errout;
+    }
+
+errout:
+  return ret;
+}
+
+#endif  /* CONFIG_SPI && CONFIG_SENSORS_L3GD20 */
diff --git a/configs/stm32f429i-disco/src/stm32_lcd.c b/configs/stm32f429i-disco/src/stm32_lcd.c
index 2f527abc81e883f53b6b6a9d7afd82012aaa301e..581216274bc1b936779074594acdf18e83e1e24f 100644
--- a/configs/stm32f429i-disco/src/stm32_lcd.c
+++ b/configs/stm32f429i-disco/src/stm32_lcd.c
@@ -57,6 +57,7 @@
 /************************************************************************************
  * Pre-processor Definitions
  ************************************************************************************/
+
 #ifdef CONFIG_STM32F429I_DISCO_ILI9341_LCDDEVICE
 # define ILI9341_LCD_DEVICE CONFIG_STM32F429I_DISCO_ILI9341_LCDDEVICE
 #else
@@ -169,8 +170,7 @@
                                         ILI9341_MADCTL_LANDSCAPE_BGR | \
                                         ILI9341_MADCTL_LANDSCAPE_MH)
 
-/*
- * Portrait:    00000000 / 00001000 / h08
+/* Portrait:    00000000 / 00001000 / h08
  *
  * MY:          0
  * MX:          0
@@ -198,8 +198,7 @@
                                         ILI9341_MADCTL_PORTRAIT_BGR | \
                                         ILI9341_MADCTL_PORTRAIT_MH)
 
-/*
- * RLandscape:  01100000 / 01101000 / h68
+/* RLandscape:  01100000 / 01101000 / h68
  *
  * MY:          0
  * MX:          1
@@ -228,8 +227,7 @@
                                         ILI9341_MADCTL_RLANDSCAPE_BGR | \
                                         ILI9341_MADCTL_RLANDSCAPE_MH)
 
-/*
- * RPortrait:   11000000 / 11001000 / hc8
+/* RPortrait:   11000000 / 11001000 / hc8
  *
  * MY:          1
  * MX:          1
@@ -317,44 +315,46 @@ static int stm32_ili9341_initialize(void)
 
   /* Select spi device */
 
-  dbg("Initialize ili9341 lcd driver\n");
+  lcdinfo("Initialize ili9341 lcd driver\n");
   lcd->select(lcd);
 
-#ifdef CONFIG_DEBUG_LCD
+#ifdef CONFIG_DEBUG_LCD_INFO
   /* Read display identification */
 
   lcd->sendcmd(lcd, ILI9341_READ_ID1);
   lcd->recvparam(lcd, ¶m);
-  dbg("ili9341 LCD driver: LCD modules manufacturer ID: %d\n", param);
+  lcdinfo("ili9341 LCD driver: LCD modules manufacturer ID: %d\n", param);
+
   lcd->sendcmd(lcd, ILI9341_READ_ID2);
   lcd->recvparam(lcd, ¶m);
-  dbg("ili9341 LCD driver: LCD modules driver version ID: %d\n", param);
+  lcdinfo("ili9341 LCD driver: LCD modules driver version ID: %d\n", param);
+
   lcd->sendcmd(lcd, ILI9341_READ_ID3);
   lcd->recvparam(lcd, ¶m);
-  dbg("ili9341 LCD driver: LCD modules driver ID: %d\n", param);
+  lcdinfo("ili9341 LCD driver: LCD modules driver ID: %d\n", param);
 #endif
 
   /* Reset the lcd display to the default state */
 
-  vdbg("ili9341 LCD driver: Software Reset\n");
+  lcdinfo("ili9341 LCD driver: Software Reset\n");
   lcd->sendcmd(lcd, ILI9341_SOFTWARE_RESET);
   up_mdelay(5);
 
-  vdbg("ili9341 LCD driver: set Memory Access Control %08x\n",
+  lcdinfo("ili9341 LCD driver: set Memory Access Control %08x\n",
         STM32_ILI9341_MADCTL_PARAM);
   lcd->sendcmd(lcd, ILI9341_MEMORY_ACCESS_CONTROL);
   lcd->sendparam(lcd, STM32_ILI9341_MADCTL_PARAM);
 
   /* Pixel Format */
 
-  vdbg("ili9341 LCD driver: Set Pixel Format: %02x\n",
+  lcdinfo("ili9341 LCD driver: Set Pixel Format: %02x\n",
           STM32_ILI9341_PIXSET_PARAM);
   lcd->sendcmd(lcd, ILI9341_PIXEL_FORMAT_SET);
   lcd->sendparam(lcd, STM32_ILI9341_PIXSET_PARAM);
 
   /* Select column */
 
-  vdbg("ili9341 LCD driver: Set Column Address\n");
+  lcdinfo("ili9341 LCD driver: Set Column Address\n");
   lcd->sendcmd(lcd, ILI9341_COLUMN_ADDRESS_SET);
   lcd->sendparam(lcd, 0);
   lcd->sendparam(lcd, 0);
@@ -363,7 +363,7 @@ static int stm32_ili9341_initialize(void)
 
   /* Select page */
 
-  vdbg("ili9341 LCD driver: Set Page Address\n");
+  lcdinfo("ili9341 LCD driver: Set Page Address\n");
   lcd->sendcmd(lcd, ILI9341_PAGE_ADDRESS_SET);
   lcd->sendparam(lcd, 0);
   lcd->sendparam(lcd, 0);
@@ -372,14 +372,14 @@ static int stm32_ili9341_initialize(void)
 
   /* RGB Interface signal control */
 
-  vdbg("ili9341 LCD driver: Set RGB Interface signal control: %02x\n",
+  lcdinfo("ili9341 LCD driver: Set RGB Interface signal control: %02x\n",
           STM32_ILI9341_IFMODE_PARAM);
   lcd->sendcmd(lcd, ILI9341_RGB_SIGNAL_CONTROL);
   lcd->sendparam(lcd, STM32_ILI9341_IFMODE_PARAM);
 
   /* Interface control */
 
-  vdbg("ili9341 LCD driver: Set Interface control: %d:%d:%d\n",
+  lcdinfo("ili9341 LCD driver: Set Interface control: %d:%d:%d\n",
           STM32_ILI9341_IFCTL_PARAM1,
           STM32_ILI9341_IFCTL_PARAM2,
           STM32_ILI9341_IFCTL_PARAM3);
@@ -391,13 +391,13 @@ static int stm32_ili9341_initialize(void)
 
   /* Sleep out set to the end */
 
-  vdbg("ili9341 LCD driver: Sleep Out\n");
+  lcdinfo("ili9341 LCD driver: Sleep Out\n");
   lcd->sendcmd(lcd, ILI9341_SLEEP_OUT);
   up_mdelay(5); /* 120? */
 
   /* Display on */
 
-  vdbg("ili9341 LCD driver: Display On\n");
+  lcdinfo("ili9341 LCD driver: Display On\n");
   lcd->sendcmd(lcd, ILI9341_DISPLAY_ON);
 
   /* Deselect spi device */
@@ -460,7 +460,6 @@ FAR struct lcd_dev_s *board_lcd_getdev(int lcddev)
   return NULL;
 }
 
-
 /************************************************************************************
  * Name: board_lcd_initialize
  *
@@ -491,8 +490,7 @@ int board_lcd_initialize(void)
 
       if (dev)
         {
-          /*
-           * Get a reference to valid lcd driver structure to avoid repeated
+          /* Get a reference to valid lcd driver structure to avoid repeated
            * initialization of the LCD Device. Also enables uninitializing of
            * the LCD Device.
            */
diff --git a/configs/stm32f429i-disco/src/stm32_spi.c b/configs/stm32f429i-disco/src/stm32_spi.c
index 5021da510898fc1046f674e36308cff17836210f..69d2de2997a913c2c1543a86d8f94d806ac979d9 100644
--- a/configs/stm32f429i-disco/src/stm32_spi.c
+++ b/configs/stm32f429i-disco/src/stm32_spi.c
@@ -56,28 +56,6 @@
 #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) ||\
     defined(CONFIG_STM32_SPI4) || defined(CONFIG_STM32_SPI5)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /************************************************************************************
  * Private Data
  ************************************************************************************/
@@ -86,10 +64,6 @@
 FAR struct spi_dev_s *g_spidev5 = NULL;
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -143,7 +117,7 @@ void weak_function stm32_spidev_initialize(void)
 #ifdef CONFIG_STM32_SPI1
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -155,7 +129,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI2
 void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -167,7 +141,7 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI3
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -196,7 +170,7 @@ uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI5
 void stm32_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
 #if defined(CONFIG_STM32F429I_DISCO_ILI9341)
   if (devid == SPIDEV_DISPLAY)
diff --git a/configs/stm32f429i-disco/src/stm32_stmpe811.c b/configs/stm32f429i-disco/src/stm32_stmpe811.c
new file mode 100644
index 0000000000000000000000000000000000000000..29fb9284a8bcf8efefac96c547aaf295dfbaa2d9
--- /dev/null
+++ b/configs/stm32f429i-disco/src/stm32_stmpe811.c
@@ -0,0 +1,364 @@
+/************************************************************************************
+ * configs/stm32f429i-disco/src/stm32_stmpe811.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "stm32.h"
+#include "stm32f429i-disco.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* Configuration ************************************************************/
+
+#ifdef CONFIG_INPUT_STMPE811
+#ifndef CONFIG_INPUT
+#  error "STMPE811 support requires CONFIG_INPUT"
+#endif
+
+#ifndef CONFIG_STM32_I2C3
+#  error "STMPE811 support requires CONFIG_STM32_I2C3"
+#endif
+
+#ifndef CONFIG_STMPE811_I2C
+#  error "Only the STMPE811 I2C interface is supported"
+#endif
+
+#ifdef CONFIG_STMPE811_SPI
+#  error "Only the STMPE811 SPI interface is supported"
+#endif
+
+#ifndef CONFIG_STMPE811_FREQUENCY
+#  define CONFIG_STMPE811_FREQUENCY 100000
+#endif
+
+#ifndef CONFIG_STMPE811_I2CDEV
+#  define CONFIG_STMPE811_I2CDEV 3
+#endif
+
+#if CONFIG_STMPE811_I2CDEV != 3
+#  error "CONFIG_STMPE811_I2CDEV must be three"
+#endif
+
+#ifndef CONFIG_STMPE811_DEVMINOR
+#  define CONFIG_STMPE811_DEVMINOR 0
+#endif
+
+/* Board definitions ********************************************************/
+/* The STM3240G-EVAL has two STMPE811QTR I/O expanders on board both connected
+ * to the STM32 via I2C1.  They share a common interrupt line: PI2.
+ *
+ * STMPE811 U24, I2C address 0x41 (7-bit)
+ * ------ ---- ---------------- --------------------------------------------
+ * STPE11 PIN  BOARD SIGNAL     BOARD CONNECTION
+ * ------ ---- ---------------- --------------------------------------------
+ *   Y-        TouchScreen_Y-   LCD Connector XL
+ *   X-        TouchScreen_X-   LCD Connector XR
+ *   Y+        TouchScreen_Y+   LCD Connector XD
+ *   X+        TouchScreen_X+   LCD Connector XU
+ *   IN3       EXP_IO9
+ *   IN2       EXP_IO10
+ *   IN1       EXP_IO11
+ *   IN0       EXP_IO12
+ *
+ * STMPE811 U29, I2C address 0x44 (7-bit)
+ * ------ ---- ---------------- --------------------------------------------
+ * STPE11 PIN  BOARD SIGNAL     BOARD CONNECTION
+ * ------ ---- ---------------- --------------------------------------------
+ *   Y-        EXP_IO1
+ *   X-        EXP_IO2
+ *   Y+        EXP_IO3
+ *   X+        EXP_IO4
+ *   IN3       EXP_IO5
+ *   IN2       EXP_IO6
+ *   IN1       EXP_IO7
+ *   IN0       EXP_IO8
+ */
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct stm32_stmpe811config_s
+{
+  /* Configuration structure as seen by the STMPE811 driver */
+
+  struct stmpe811_config_s config;
+
+  /* Additional private definitions only known to this driver */
+
+  STMPE811_HANDLE handle;   /* The STMPE811 driver handle */
+  xcpt_t          handler;  /* The STMPE811 interrupt handler */
+  FAR void       *arg;      /* Interrupt handler argument */
+};
+
+/****************************************************************************
+ * Static Function Prototypes
+ ****************************************************************************/
+
+/* IRQ/GPIO access callbacks.  These operations all hidden behind callbacks
+ * to isolate the STMPE811 driver from differences in GPIO
+ * interrupt handling by varying boards and MCUs.* so that contact and loss-
+ * of-contact events can be detected.
+ *
+ * attach  - Attach the STMPE811 interrupt handler to the GPIO interrupt
+ * enable  - Enable or disable the GPIO interrupt
+ * clear   - Acknowledge/clear any pending GPIO interrupt
+ */
+
+static int  stmpe811_attach(FAR struct stmpe811_config_s *state, xcpt_t isr,
+                            FAR void *arg);
+static void stmpe811_enable(FAR struct stmpe811_config_s *state, bool enable);
+static void stmpe811_clear(FAR struct stmpe811_config_s *state);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* A reference to a structure of this type must be passed to the STMPE811
+ * driver.  This structure provides information about the configuration
+ * of the STMPE811 and provides some board-specific hooks.
+ *
+ * Memory for this structure is provided by the caller.  It is not copied
+ * by the driver and is presumed to persist while the driver is active. The
+ * memory must be writable because, under certain circumstances, the driver
+ * may modify frequency or X plate resistance values.
+ */
+
+#ifndef CONFIG_STMPE811_TSC_DISABLE
+static struct stm32_stmpe811config_s g_stmpe811config =
+{
+  .config =
+  {
+#ifdef CONFIG_STMPE811_I2C
+    .address   = STMPE811_ADDR1,
+#endif
+    .frequency = CONFIG_STMPE811_FREQUENCY,
+
+#ifdef CONFIG_STMPE811_MULTIPLE
+    .irq       = STM32_IRQ_EXTI2,
+#endif
+    .ctrl1     = (ADC_CTRL1_SAMPLE_TIME_80 | ADC_CTRL1_MOD_12B),
+    .ctrl2     = ADC_CTRL2_ADC_FREQ_3p25,
+
+    .attach    = stmpe811_attach,
+    .enable    = stmpe811_enable,
+    .clear     = stmpe811_clear,
+  },
+  .handler     = NULL,
+  .arg         = NULL,
+};
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/* IRQ/GPIO access callbacks.  These operations all hidden behind
+ * callbacks to isolate the STMPE811 driver from differences in GPIO
+ * interrupt handling by varying boards and MCUs.
+ *
+ * attach  - Attach the STMPE811 interrupt handler to the GPIO interrupt
+ * enable  - Enable or disable the GPIO interrupt
+ * clear   - Acknowledge/clear any pending GPIO interrupt
+ */
+
+static int stmpe811_attach(FAR struct stmpe811_config_s *state, xcpt_t isr,
+                           FAR void *arg)
+{
+  FAR struct stm32_stmpe811config_s *priv =
+    (FAR struct stm32_stmpe811config_s *)state;
+
+  iinfo("Saving handler %p\n", isr);
+  DEBUGASSERT(priv);
+
+  /* Just save the handler.  We will use it when EXTI interruptsare enabled */
+
+  priv->handler = isr;
+  priv->arg     = arg;
+  return OK;
+}
+
+static void stmpe811_enable(FAR struct stmpe811_config_s *state, bool enable)
+{
+  FAR struct stm32_stmpe811config_s *priv =
+    (FAR struct stm32_stmpe811config_s *)state;
+  irqstate_t flags;
+
+  /* Attach and enable, or detach and disable.  Enabling and disabling GPIO
+   * interrupts is a multi-step process so the safest thing is to keep
+   * interrupts disabled during the reconfiguration.
+   */
+
+  flags = enter_critical_section();
+  if (enable)
+    {
+      /* Configure the EXTI interrupt using the SAVED handler */
+
+      (void)stm32_gpiosetevent(GPIO_IO_EXPANDER, true, true, true,
+                               priv->handler, priv->arg);
+    }
+  else
+    {
+      /* Configure the EXTI interrupt with a NULL handler to disable it */
+
+     (void)stm32_gpiosetevent(GPIO_IO_EXPANDER, false, false, false,
+                              NULL, NULL);
+    }
+
+  leave_critical_section(flags);
+}
+
+static void stmpe811_clear(FAR struct stmpe811_config_s *state)
+{
+  /* Does nothing */
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_tsc_setup
+ *
+ * Description:
+ *   Each board that supports a touchscreen device must provide this function.
+ *   This function is called by application-specific, setup logic to
+ *   configure the touchscreen device.  This function will register the driver
+ *   as /dev/inputN where N is the minor device number.
+ *
+ * Input Parameters:
+ *   minor   - The input device minor number
+ *
+ * Returned Value:
+ *   Zero is returned on success.  Otherwise, a negated errno value is
+ *   returned to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+int board_tsc_setup(int minor)
+{
+#ifndef CONFIG_STMPE811_TSC_DISABLE
+  FAR struct i2c_master_s *dev;
+  int ret;
+
+  iinfo("minor %d\n", minor);
+  DEBUGASSERT(minor == 0);
+
+  /* Check if we are already initialized */
+
+  if (!g_stmpe811config.handle)
+    {
+      iinfo("Initializing\n");
+
+      /* Configure the STMPE811 interrupt pin as an input */
+
+      (void)stm32_configgpio(GPIO_IO_EXPANDER);
+
+      /* Get an instance of the I2C interface */
+
+      dev = stm32_i2cbus_initialize(CONFIG_STMPE811_I2CDEV);
+      if (!dev)
+        {
+          ierr("ERROR: Failed to initialize I2C bus %d\n", CONFIG_STMPE811_I2CDEV);
+          return -ENODEV;
+        }
+
+      /* Instantiate the STMPE811 driver */
+
+      g_stmpe811config.handle =
+        stmpe811_instantiate(dev, (FAR struct stmpe811_config_s *)&g_stmpe811config);
+      if (!g_stmpe811config.handle)
+        {
+          ierr("ERROR: Failed to instantiate the STMPE811 driver\n");
+          return -ENODEV;
+        }
+
+      /* Initialize and register the I2C touchscreen device */
+
+      ret = stmpe811_register(g_stmpe811config.handle, CONFIG_STMPE811_DEVMINOR);
+      if (ret < 0)
+        {
+          ierr("ERROR: Failed to register STMPE driver: %d\n", ret);
+          /* stm32_i2cbus_uninitialize(dev); */
+          return -ENODEV;
+        }
+    }
+
+  return OK;
+#else
+  return -ENOSYS;
+#endif
+}
+
+/****************************************************************************
+ * Name: board_tsc_teardown
+ *
+ * Description:
+ *   Each board that supports a touchscreen device must provide this function.
+ *   This function is called by application-specific, setup logic to
+ *   uninitialize the touchscreen device.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+void board_tsc_teardown(void)
+{
+  /* No support for un-initializing the touchscreen STMPE811 device yet */
+}
+
+#endif /* CONFIG_INPUT_STMPE811 */
+
diff --git a/configs/stm32f429i-disco/src/stm32_usb.c b/configs/stm32f429i-disco/src/stm32_usb.c
index 291c025730d54a89c4a5f0fbb284429bea1117bb..33718f15344a482e7e79233692814ee9390a538d 100644
--- a/configs/stm32f429i-disco/src/stm32_usb.c
+++ b/configs/stm32f429i-disco/src/stm32_usb.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm32f429i-disco/src/stm32_usbdev.c
  *
- *   Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -102,13 +102,13 @@ static int usbhost_waiter(int argc, char *argv[])
 {
   struct usbhost_hubport_s *hport;
 
-  uvdbg("Running\n");
+  uinfo("Running\n");
   for (;;)
     {
       /* Wait for the device to change state */
 
       DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
-      uvdbg("%s\n", hport->connected ? "connected" : "disconnected");
+      uinfo("%s\n", hport->connected ? "connected" : "disconnected");
 
       /* Did we just become connected? */
 
@@ -172,7 +172,7 @@ int stm32_usbhost_initialize(void)
    * that we care about:
    */
 
-  uvdbg("Register class drivers\n");
+  uinfo("Register class drivers\n");
 
 #ifdef CONFIG_USBHOST_HUB
   /* Initialize USB hub class support */
@@ -180,7 +180,7 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_hub_initialize();
   if (ret < 0)
     {
-      udbg("ERROR: usbhost_hub_initialize failed: %d\n", ret);
+      uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
     }
 #endif
 
@@ -190,7 +190,7 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_msc_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the mass storage class: %d\n", ret);
+      uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
     }
 #endif
 
@@ -200,19 +200,19 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_cdcacm_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
+      uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
     }
 #endif
 
   /* Then get an instance of the USB host interface */
 
-  uvdbg("Initialize USB host\n");
+  uinfo("Initialize USB host\n");
   g_usbconn = stm32_otghshost_initialize(0);
   if (g_usbconn)
     {
       /* Start a thread to handle device connection. */
 
-      uvdbg("Start usbhost_waiter\n");
+      uinfo("Start usbhost_waiter\n");
 
       pid = task_create("usbhost", CONFIG_STM32F429IDISCO_USBHOST_PRIO,
                         CONFIG_STM32F429IDISCO_USBHOST_STACKSIZE,
@@ -279,16 +279,18 @@ void stm32_usbhost_vbusdrive(int iface, bool enable)
  *
  * Input Parameters:
  *   handler - New overcurrent interrupt handler
+ *   arg     - The argument provided for the interrupt handler
  *
- * Returned Value:
- *   Old overcurrent interrupt handler
+ * Returned value:
+ *   Zero (OK) is returned on success.  Otherwise, a negated errno value is returned
+ *   to indicate the nature of the failure.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_USBHOST
-xcpt_t stm32_setup_overcurrent(xcpt_t handler)
+int stm32_setup_overcurrent(xcpt_t handler, void *arg)
 {
-  return stm32_gpiosetevent(GPIO_OTGHS_OVER, true, true, true, handler);
+  return stm32_gpiosetevent(GPIO_OTGHS_OVER, true, true, true, handler, arg);
 }
 #endif
 
@@ -306,7 +308,7 @@ xcpt_t stm32_setup_overcurrent(xcpt_t handler)
 #ifdef CONFIG_USBDEV
 void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
 #endif
 
diff --git a/configs/stm32f429i-disco/src/stm32_userleds.c b/configs/stm32f429i-disco/src/stm32_userleds.c
index 682ccfd5f979450d55076310fc72c33c2701198b..6bb638889df5d1d49399a5a6c74a21ea04463d92 100644
--- a/configs/stm32f429i-disco/src/stm32_userleds.c
+++ b/configs/stm32f429i-disco/src/stm32_userleds.c
@@ -54,22 +54,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
diff --git a/configs/stm32f429i-disco/src/stm32f429i-disco.h b/configs/stm32f429i-disco/src/stm32f429i-disco.h
index 789929facd7c14ae14e7c175874d925b5076763a..e9408e3355b1f3b7ec84699b73a2d3be5e54ca62 100644
--- a/configs/stm32f429i-disco/src/stm32f429i-disco.h
+++ b/configs/stm32f429i-disco/src/stm32f429i-disco.h
@@ -66,6 +66,16 @@
 #  undef CONFIG_STM32_SPI3
 #endif
 
+/* STMPE811 on I2C3 */
+
+//#define GPIO_I2C3_SCL GPIO_I2C3_SCL_1
+//#define GPIO_I2C3_SDA GPIO_I2C3_SDA_1
+
+#define STMPE811_ADDR1    0x41
+#define STMPE811_ADDR2    0x44
+
+#define GPIO_IO_EXPANDER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN15)
+
 /* STM32F429 Discovery GPIOs **************************************************************************/
 /* LEDs */
 
@@ -104,6 +114,11 @@
 #define GPIO_CS_SST25   (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
                          GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN4)
 
+/* L3GD20 MEMS */
+
+#define GPIO_L3GD20_DREADY (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN2)
+#define L3GD20_IRQ      (2 + STM32_IRQ_EXTI0)
+
 /* USB OTG HS
  *
  * PA9  OTG_HS_VBUS VBUS sensing (also connected to the green LED)
@@ -220,7 +235,6 @@ void stm32_ledpminitialize(void);
 void stm32_pmbuttons(void);
 #endif
 
-#ifdef CONFIG_STM32F429I_DISCO_ILI9341
 /****************************************************************************
  * Name:  stm32_ili93414ws_initialize
  *
@@ -236,10 +250,10 @@ void stm32_pmbuttons(void);
  *
  ****************************************************************************/
 
+#ifdef CONFIG_STM32F429I_DISCO_ILI9341
 FAR struct ili9341_lcd_s *stm32_ili93414ws_initialize(void);
 #endif
 
-#ifdef CONFIG_STM32_SPI5
 /****************************************************************************
  * Name: stm32_spi5initialize
  *
@@ -262,9 +276,29 @@ FAR struct ili9341_lcd_s *stm32_ili93414ws_initialize(void);
  *
  ****************************************************************************/
 
+#ifdef CONFIG_STM32_SPI5
 FAR struct spi_dev_s *stm32_spi5initialize(void);
 #endif
 
+
+/****************************************************************************
+ * Name: stm32_l3gd20initialize()
+ *
+ * Description:
+ *   Initialize and register the L3GD20 3 axis gyroscope sensor driver.
+ *
+ * Input parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/gyro0"
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_SPI) & defined(CONFIG_SENSORS_L3GD20)
+int stm32_l3gd20initialize(FAR const char *devpath);
+#endif
+
 #endif /* __ASSEMBLY__ */
 #endif /* __CONFIGS_STM32F429I_DISCO_SRC_STM32F429I_DISCO_H */
 
diff --git a/configs/stm32f429i-disco/usbmsc/Make.defs b/configs/stm32f429i-disco/usbmsc/Make.defs
index c8cd4116d694a4115ce7cb32a1015d2111c27460..07fa3b5d009f5c64c35d8d7ddec67fb49926e526 100644
--- a/configs/stm32f429i-disco/usbmsc/Make.defs
+++ b/configs/stm32f429i-disco/usbmsc/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f429i-disco/usbmsc/defconfig b/configs/stm32f429i-disco/usbmsc/defconfig
index 802ff5915b9dabd8dd8aff1b6bbdf463d9536172..fa1af2fa9100faf79fa44cee5b477305fabc9610 100644
--- a/configs/stm32f429i-disco/usbmsc/defconfig
+++ b/configs/stm32f429i-disco/usbmsc/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 CONFIG_DEBUG_NOOPT=y
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -103,7 +106,9 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -203,6 +208,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -350,6 +356,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -437,6 +449,12 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
 CONFIG_STM32_FSMC_SRAM=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -453,9 +471,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -479,8 +505,6 @@ CONFIG_STM32_OTGHS_DESCSIZE=128
 #
 # USB Host Debug Configuration
 #
-# CONFIG_STM32_USBHOST_REGDEBUG is not set
-# CONFIG_STM32_USBHOST_PKTDUMP is not set
 
 #
 # USB Device Configuration
@@ -560,7 +584,6 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -570,12 +593,11 @@ CONFIG_NSH_MMCSDMINOR=0
 CONFIG_STM32F429IDISCO_USBHOST_STACKSIZE=1024
 CONFIG_STM32F429IDISCO_USBHOST_PRIO=100
 # CONFIG_STM32F429I_DISCO_ILI9341 is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -592,9 +614,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=12
@@ -607,6 +632,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -623,6 +649,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -692,6 +720,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -707,19 +736,25 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -727,8 +762,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -736,6 +781,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -744,9 +790,10 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -792,28 +839,36 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 CONFIG_USBHOST=y
 CONFIG_USBHOST_NPREALLOC=4
 CONFIG_USBHOST_HAVE_ASYNCH=y
 # CONFIG_USBHOST_ASYNCH is not set
 # CONFIG_USBHOST_HUB is not set
+# CONFIG_USBHOST_COMPOSITE is not set
 CONFIG_USBHOST_MSC=y
 # CONFIG_USBHOST_CDCACM is not set
 # CONFIG_USBHOST_HIDKBD is not set
 # CONFIG_USBHOST_HIDMOUSE is not set
 # CONFIG_USBHOST_TRACE is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -857,12 +912,6 @@ CONFIG_FS_FAT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -909,11 +958,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -931,17 +997,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -973,9 +1044,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -984,10 +1055,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -996,36 +1067,35 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1049,8 +1119,9 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1116,12 +1187,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1138,11 +1209,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
 CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_FILEIOSIZE=512
@@ -1175,12 +1248,12 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1188,6 +1261,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f429i-disco/usbnsh/Make.defs b/configs/stm32f429i-disco/usbnsh/Make.defs
index c8cd4116d694a4115ce7cb32a1015d2111c27460..07fa3b5d009f5c64c35d8d7ddec67fb49926e526 100644
--- a/configs/stm32f429i-disco/usbnsh/Make.defs
+++ b/configs/stm32f429i-disco/usbnsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f429i-disco/usbnsh/defconfig b/configs/stm32f429i-disco/usbnsh/defconfig
index 0a9deac046188988c1894619785a9e05b34766c4..aa1481a5e8d5d8431e0e4538bcbfdf3ea88f8d19 100644
--- a/configs/stm32f429i-disco/usbnsh/defconfig
+++ b/configs/stm32f429i-disco/usbnsh/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 CONFIG_DEBUG_NOOPT=y
@@ -59,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -72,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -103,7 +106,9 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -200,6 +205,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -347,6 +353,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -434,6 +446,12 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
 CONFIG_STM32_FSMC_SRAM=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -450,9 +468,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -550,7 +576,6 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -558,13 +583,12 @@ CONFIG_NSH_MMCSDMINOR=0
 # CONFIG_STM32F429I_DISCO_FLASH is not set
 # CONFIG_STM32F429I_DISCO_RAMMTD is not set
 # CONFIG_STM32F429I_DISCO_ILI9341 is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -581,9 +605,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=12
@@ -596,6 +623,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -612,6 +640,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -676,6 +706,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 CONFIG_DEV_ZERO=y
+# CONFIG_DEV_URANDOM is not set
 CONFIG_DEV_LOOP=y
 
 #
@@ -691,19 +722,25 @@ CONFIG_RAMDISK=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -711,8 +748,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -720,6 +767,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -728,9 +776,9 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_SERIAL_REMOVABLE=y
+# CONFIG_SERIAL_CONSOLE is not set
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -776,6 +824,7 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -818,16 +867,22 @@ CONFIG_CDCACM_VENDORSTR="NuttX"
 CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_NONE=y
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -871,12 +926,6 @@ CONFIG_FS_FAT=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -923,11 +972,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -946,17 +1012,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -988,9 +1059,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -999,10 +1070,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1011,36 +1082,35 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1064,8 +1134,9 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1131,12 +1202,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1153,11 +1224,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
 CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 CONFIG_NSH_CMDOPT_HEXDUMP=y
 CONFIG_NSH_FILEIOSIZE=512
@@ -1192,12 +1265,13 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 CONFIG_SYSTEM_RAMTEST=y
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1205,7 +1279,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
-# CONFIG_SYSTEM_CDCACM is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f4discovery/Kconfig b/configs/stm32f4discovery/Kconfig
index 3c84095efce3569d7168682b35d1970db9720e6d..badfd635f94e2450c5db108c5b0cab57caf34ec7 100644
--- a/configs/stm32f4discovery/Kconfig
+++ b/configs/stm32f4discovery/Kconfig
@@ -22,6 +22,11 @@ config STM32F4DISCO_USBHOST_PRIO
 	default 100
 	depends on USBHOST
 
+config STM32F4DISCO_QETIMER
+	int "Timer to use with QE encoder"
+	default 2
+	depends on QENCODER
+
 config PM_BUTTONS
 	bool "PM button support"
 	default n
diff --git a/configs/stm32f4discovery/README.txt b/configs/stm32f4discovery/README.txt
index a5ce946ad7619c828c6a1b03372cb80a0ea53480..472621c1fece6af65803afb0dbab731071cdc7ed 100644
--- a/configs/stm32f4discovery/README.txt
+++ b/configs/stm32f4discovery/README.txt
@@ -31,6 +31,7 @@ Contents
   - PWM
   - UARTs
   - Timer Inputs/Outputs
+  - Quadrature Encoder
   - FPU
   - STM32F4DIS-BB
   - FSMC SRAM
@@ -447,14 +448,52 @@ TIM14
    free I/O pins.
 ** Port H pins are not supported by the MCU
 
-Quadrature Encode Timer Inputs
-------------------------------
+Quadrature Encoder:
+===================
 
-If enabled (by setting CONFIG_QENCODER=y), then quadrature encoder will
-use either TIM2 or TIM8 (see nsh/defconfig).  If TIM2 is selected, the input
-pins PA15 and PA1 for CH1 and CH2, respectively).  If TIM8 is selected, then
-PC6 and PI5 will be used for CH1 and CH2  (see include board.h for pin
-definitions).
+  The nsh configuration has been used to test the Quadrture Encoder
+  (QEncoder, QE) with the following modifications to the configuration
+  file:
+
+  - These setting enable support for the common QEncode upper half driver:
+
+   CONFIG_BOARD_INITIALIZE=y
+
+   CONFIG_SENSORS=y
+     CONFIG_QENCODER=y
+
+  - The timer 2 needs to be enabled:
+
+  CONFIG_STM32_TIM2=y
+
+  - This is a board setting that selected timer 2 for use with the
+    quadrature encode:
+
+    CONFIG_STM32F4DISCO_QETIMER=2
+
+  - These settings enable the STM32 Quadrature encoder on timer 2:
+
+    CONFIG_STM32_TIM2_QE=y
+    CONFIG_STM32_TIM4_QECLKOUT=2800000
+    CONFIG_STM32_QENCODER_FILTER=y
+    CONFIG_STM32_QENCODER_SAMPLE_EVENT_6=y
+    CONFIG_STM32_QENCODER_SAMPLE_FDTS_4=y
+
+  - These settings enable the test case at apps/examples/qencoder:
+
+    CONFIG_EXAMPLES_QENCODER=y
+    CONFIG_EXAMPLES_QENCODER_DELAY=100
+    CONFIG_EXAMPLES_QENCODER_DEVPATH="/dev/qe0"
+
+  In this configuration, the QEncoder inputs will be on the TIM2 inputs of
+  PA15 and PA1 (CH1 and CH2 respectively).
+
+  You can also use QEncoder with other timers, but keep in mind that only TIM2
+  and TIM5 are 32bits timers, all other timers are 16-bit then the QE counter
+  will overflow after 65535.
+
+  If TIM4 is selected, then PB6 and PB7 will be used for CH1 and CH2.
+  If TIM8 is selected, then PC6 and PI5 will be used for CH1 and CH2.
 
 FPU
 ===
@@ -1024,7 +1063,7 @@ STM32F4Discovery-specific Configuration Options
     CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
     CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
     CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
-    CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+    CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
       dump of all CAN registers.
 
   STM32F4Discovery SPI Configuration
@@ -1039,10 +1078,10 @@ STM32F4Discovery-specific Configuration Options
 
     CONFIG_SDIO_DMA - Support DMA data transfers.  Requires CONFIG_STM32_SDIO
       and CONFIG_STM32_DMA2.
-    CONFIG_SDIO_PRI - Select SDIO interrupt prority.  Default: 128
-    CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
+    CONFIG_STM32_SDIO_PRI - Select SDIO interrupt prority.  Default: 128
+    CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
       Default:  Medium
-    CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode.  Default:
+    CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode.  Default:
       4-bit transfer mode.
 
   STM32 USB OTG FS Host Driver Support
@@ -1067,9 +1106,9 @@ STM32F4Discovery-specific Configuration Options
    CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts.  Why would you ever
      want to do that?
    CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
-     debug.  Depends on CONFIG_DEBUG.
+     debug.  Depends on CONFIG_DEBUG_FEATURES.
    CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
-     packets. Depends on CONFIG_DEBUG.
+     packets. Depends on CONFIG_DEBUG_FEATURES.
 
 BASIC
 =====
@@ -1566,7 +1605,7 @@ Where  is one of the following:
 
        Special PWM-only debug options:
 
-       CONFIG_DEBUG_PWM
+       CONFIG_DEBUG_PWM_INFO
 
     5. This example supports the Quadrature Encode test (apps/examples/qencoder)
        but this must be manually enabled by selecting:
@@ -1652,14 +1691,14 @@ Where  is one of the following:
 
         - /dev/console still exists and still refers to the serial port. So
           you can still use certain kinds of debug output (see include/debug.h, all
-          of the interfaces based on lowsyslog will work in this configuration).
+          of the debug output from interrupt handlers will be lost.
 
         - But don't enable USB debug output!  Since USB is console is used for
           USB debug output and you are using a USB console, there will be
           infinite loops and deadlocks:  Debug output generates USB debug
           output which generatates USB debug output, etc.  If you want USB
           debug output, you should consider enabling USB trace
-          (CONFIG_USBDEV_TRACE) and perhaps the USB monitor (CONFIG_SYSTEM_USBMONITOR).
+          (CONFIG_USBDEV_TRACE) and perhaps the USB monitor (CONFIG_USBMONITOR).
 
           See the usbnsh configuration below for more information on configuring
           USB trace output and the USB monitor.
@@ -1934,6 +1973,18 @@ Where  is one of the following:
     3. By default, this project assumes that you are *NOT* using the DFU
        bootloader.
 
+  pseudoterm:
+  -----------
+
+    This is a configuration to test the Pseudo Terminal support for NuttX.
+
+    To test it you will need two USB/Serial dongles. The first dongle as
+    usual will be used to main NSH console port in UART2 (PA2 and PA3) and
+    the second dongle you will connect to UART3 (PB10 and PB11).
+
+    In the main NSH console (in UART2) type: "pts_test &". It will create a
+    new console in UART3. Just press ENTER and start typing commands on it.
+
   rgbled:
   -------
 
@@ -1979,7 +2030,6 @@ Where  is one of the following:
     3. This configuration does have UART2 output enabled and set up as
        the system logging device:
 
-       CONFIG_SYSLOG=y                    : Enable output to syslog, not console
        CONFIG_SYSLOG_CHAR=y               : Use a character device for system logging
        CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART2 will be /dev/ttyS0
 
@@ -2003,16 +2053,16 @@ Where  is one of the following:
        CONFIG_USBDEV_TRACE_NRECORDS=128        : Buffer 128 records in memory
        CONFIG_NSH_USBDEV_TRACE=n               : No builtin tracing from NSH
        CONFIG_NSH_ARCHINIT=y                   : Automatically start the USB monitor
-       CONFIG_SYSTEM_USBMONITOR=y              : Enable the USB monitor daemon
-       CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
-       CONFIG_SYSTEM_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
-       CONFIG_SYSTEM_USBMONITOR_INTERVAL=2     : Dump trace data every 2 seconds
-
-       CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y    : Enable TRACE output
-       CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y
-       CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y
-       CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y
-       CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y
+       CONFIG_USBMONITOR=y              : Enable the USB monitor daemon
+       CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
+       CONFIG_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
+       CONFIG_USBMONITOR_INTERVAL=2     : Dump trace data every 2 seconds
+
+       CONFIG_USBMONITOR_TRACEINIT=y    : Enable TRACE output
+       CONFIG_USBMONITOR_TRACECLASS=y
+       CONFIG_USBMONITOR_TRACETRANSFERS=y
+       CONFIG_USBMONITOR_TRACECONTROLLER=y
+       CONFIG_USBMONITOR_TRACEINTERRUPTS=y
 
     5. By default, this project assumes that you are *NOT* using the DFU
        bootloader.
diff --git a/configs/stm32f4discovery/canard/Make.defs b/configs/stm32f4discovery/canard/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..081b85aadce1072a5e40d35baaa4862c085a5af9
--- /dev/null
+++ b/configs/stm32f4discovery/canard/Make.defs
@@ -0,0 +1,113 @@
+############################################################################
+# configs/stm32f4discovery/canard/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/stm32f4discovery/canard/defconfig b/configs/stm32f4discovery/canard/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..a8154cec686709b5ca0a1c1b5fa68ce2ce8d1f74
--- /dev/null
+++ b/configs/stm32f4discovery/canard/defconfig
@@ -0,0 +1,1228 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+CONFIG_CAN_EXTID=y
+CONFIG_CAN1_BAUD=500000
+CONFIG_CAN_TSEG1=6
+CONFIG_CAN_TSEG2=7
+# CONFIG_CAN_LOOPBACK is not set
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+# CONFIG_ARCH_CHIP_STM32F103C8 is not set
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+CONFIG_ARCH_CHIP_STM32F407VG=y
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+# CONFIG_ARCH_CHIP_STM32F407ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+# CONFIG_STM32_STM32F10XX is not set
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+# CONFIG_STM32_PERFORMANCELINE is not set
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+# CONFIG_STM32_MEDIUMDENSITY is not set
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+CONFIG_STM32_STM32F40XX=y
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+CONFIG_STM32_STM32F407=y
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+CONFIG_STM32_HAVE_CCM=y
+# CONFIG_STM32_HAVE_USBDEV is not set
+CONFIG_STM32_HAVE_OTGFS=y
+CONFIG_STM32_HAVE_FSMC=y
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+CONFIG_STM32_HAVE_USART6=y
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+CONFIG_STM32_HAVE_TIM2=y
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+CONFIG_STM32_HAVE_TIM9=y
+CONFIG_STM32_HAVE_TIM10=y
+CONFIG_STM32_HAVE_TIM11=y
+CONFIG_STM32_HAVE_TIM12=y
+CONFIG_STM32_HAVE_TIM13=y
+CONFIG_STM32_HAVE_TIM14=y
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+CONFIG_STM32_HAVE_CAN2=y
+CONFIG_STM32_HAVE_DAC1=y
+CONFIG_STM32_HAVE_DAC2=y
+CONFIG_STM32_HAVE_RNG=y
+CONFIG_STM32_HAVE_ETHMAC=y
+CONFIG_STM32_HAVE_I2C2=y
+CONFIG_STM32_HAVE_I2C3=y
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKPSRAM is not set
+CONFIG_STM32_CAN1=y
+# CONFIG_STM32_CAN2 is not set
+# CONFIG_STM32_CCMDATARAM is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_CRYP is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_DAC1 is not set
+# CONFIG_STM32_DAC2 is not set
+# CONFIG_STM32_DCMI is not set
+# CONFIG_STM32_ETHMAC is not set
+# CONFIG_STM32_FSMC is not set
+# CONFIG_STM32_HASH is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_I2C3 is not set
+CONFIG_STM32_OTGFS=y
+# CONFIG_STM32_OTGHS is not set
+CONFIG_STM32_PWR=y
+# CONFIG_STM32_RNG is not set
+# CONFIG_STM32_SDIO is not set
+CONFIG_STM32_SPI1=y
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SYSCFG=y
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+# CONFIG_STM32_TIM9 is not set
+# CONFIG_STM32_TIM10 is not set
+# CONFIG_STM32_TIM11 is not set
+# CONFIG_STM32_TIM12 is not set
+# CONFIG_STM32_TIM13 is not set
+# CONFIG_STM32_TIM14 is not set
+# CONFIG_STM32_USART1 is not set
+CONFIG_STM32_USART2=y
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USART6 is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+CONFIG_STM32_SPI=y
+CONFIG_STM32_CAN=y
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_FLASH_PREFETCH is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+# CONFIG_STM32_JTAG_FULL_ENABLE is not set
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+CONFIG_STM32_JTAG_SW_ENABLE=y
+# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM2_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+# CONFIG_STM32_TIM9_CAP is not set
+# CONFIG_STM32_TIM10_CAP is not set
+# CONFIG_STM32_TIM11_CAP is not set
+# CONFIG_STM32_TIM12_CAP is not set
+# CONFIG_STM32_TIM13_CAP is not set
+# CONFIG_STM32_TIM14_CAP is not set
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
+# CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+
+#
+# SPI Configuration
+#
+# CONFIG_STM32_SPI_INTERRUPTS is not set
+# CONFIG_STM32_SPI_DMA is not set
+# CONFIG_STM32_HAVE_RTC_COUNTER is not set
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# CAN driver configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=16717
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=114688
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y
+# CONFIG_ARCH_BOARD_MIKROE_STM32F4 is not set
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="stm32f4discovery"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+# CONFIG_ARCH_IRQBUTTONS is not set
+
+#
+# Board-Specific Options
+#
+# CONFIG_STM32F4DISBB is not set
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+CONFIG_SYSTEM_TIME64=y
+CONFIG_CLOCK_MONOTONIC=y
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=12
+CONFIG_START_DAY=6
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=16
+CONFIG_WDOG_INTRESERVE=4
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=31
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+CONFIG_CAN=y
+# CONFIG_ARCH_HAVE_CAN_ERRORS is not set
+# CONFIG_CAN_FD is not set
+CONFIG_CAN_FIFOSIZE=8
+CONFIG_CAN_NPENDINGRTR=4
+# CONFIG_CAN_TXREADY is not set
+CONFIG_CAN_NPOLLWAITERS=2
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART2_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART2 Configuration
+#
+CONFIG_USART2_RXBUFSIZE=128
+CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART2_BAUD=115200
+CONFIG_USART2_BITS=8
+CONFIG_USART2_PARITY=0
+CONFIG_USART2_2STOP=0
+# CONFIG_USART2_IFLOWCONTROL is not set
+# CONFIG_USART2_OFLOWCONTROL is not set
+# CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+CONFIG_FS_READABLE=y
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=2
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+# CONFIG_CANUTILS_CANLIB is not set
+CONFIG_CANUTILS_LIBCANARD=y
+CONFIG_LIBCANARD_URL="https://github.com/UAVCAN/libcanard/archive"
+CONFIG_LIBCANARD_VERSION="e4a1d52be862b03e5872add75890e67bf1d9187c"
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CAN is not set
+CONFIG_EXAMPLES_LIBCANARD=y
+CONFIG_EXAMPLES_LIBCANARD_DEVPATH="/dev/can0"
+CONFIG_EXAMPLES_LIBCANARD_NODE_ID=1
+CONFIG_EXAMPLES_LIBCANARD_APP_NODE_NAME="org.uavcan.libcanard.nuttx.demo"
+CONFIG_EXAMPLES_LIBCANARD_NODE_MEM_POOL_SIZE=1024
+CONFIG_EXAMPLES_LIBCANARD_DAEMON_PRIORITY=100
+CONFIG_EXAMPLES_LIBCANARD_STACKSIZE=2048
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_IFUPDOWN is not set
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+# CONFIG_NSH_CMDOPT_DF_H is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+# CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f4discovery/canard/setenv.sh b/configs/stm32f4discovery/canard/setenv.sh
new file mode 100755
index 0000000000000000000000000000000000000000..ed2adcd4fff2f7c0cc98b2569525d8adc57febfb
--- /dev/null
+++ b/configs/stm32f4discovery/canard/setenv.sh
@@ -0,0 +1,80 @@
+#!/bin/bash
+# configs/stm32f4discovery/canard/setenv.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the RIDE
+# toolchain under windows.  You will also have to edit this if you install
+# the RIDE toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# These are the Cygwin paths to the locations where I installed the Atollic
+# toolchain under windows.  You will also have to edit this if you install
+# the Atollic toolchain in any other location.  /usr/bin is added before
+# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
+# at those locations as well.
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH variable
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/stm32f4discovery/cxxtest/Make.defs b/configs/stm32f4discovery/cxxtest/Make.defs
index c31bef20e3563bbf9d1f3fde6aef747f3553c674..30fe1f2d37338aacfa22a1680e56bfca20d0ab02 100644
--- a/configs/stm32f4discovery/cxxtest/Make.defs
+++ b/configs/stm32f4discovery/cxxtest/Make.defs
@@ -85,7 +85,7 @@ ARCHCFLAGS = -fno-builtin
 ifeq ($(CONFIG_UCLIBCXX_EXCEPTION),y)
   ARCHCPUFLAGSXX = -fno-builtin
 else
-  ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions
+  ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new
 endif
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
diff --git a/configs/stm32f4discovery/cxxtest/defconfig b/configs/stm32f4discovery/cxxtest/defconfig
index 7a4a6262adb7074df760a8c298b1a995e2ede872..71704220b611bfac12c69dca7802b30f246fc1f4 100644
--- a/configs/stm32f4discovery/cxxtest/defconfig
+++ b/configs/stm32f4discovery/cxxtest/defconfig
@@ -46,10 +46,12 @@ CONFIG_ARCH_FLOAT_H=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +65,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,7 +77,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -208,6 +208,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -435,6 +436,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -453,9 +460,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -558,6 +573,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # Board-Specific Options
 #
 # CONFIG_STM32F4DISBB is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -573,9 +589,12 @@ CONFIG_DISABLE_ENVIRON=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2012
 CONFIG_START_MONTH=11
@@ -669,6 +688,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -684,6 +704,7 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
@@ -697,8 +718,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -706,6 +737,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -714,9 +746,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -762,19 +795,25 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -805,12 +844,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -872,7 +905,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -880,8 +912,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -912,7 +946,6 @@ CONFIG_UCLIBCXX_HAVE_LIBSUPCXX=y
 #
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 CONFIG_EXAMPLES_CXXTEST=y
 CONFIG_EXAMPLES_CXXTEST_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -921,10 +954,10 @@ CONFIG_EXAMPLES_CXXTEST_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -933,20 +966,18 @@ CONFIG_EXAMPLES_CXXTEST_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -958,9 +989,9 @@ CONFIG_EXAMPLES_CXXTEST_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -982,8 +1013,8 @@ CONFIG_EXAMPLES_CXXTEST_CXXINITIALIZE=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1016,16 +1047,16 @@ CONFIG_EXAMPLES_CXXTEST_CXXINITIALIZE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f4discovery/elf/Make.defs b/configs/stm32f4discovery/elf/Make.defs
index 77d0869652f02faf899b95d964eb375da6bb62bb..aa901675810cf5ab30ebe3ee257bfbfcbfe9cb49 100644
--- a/configs/stm32f4discovery/elf/Make.defs
+++ b/configs/stm32f4discovery/elf/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f4discovery/elf/defconfig b/configs/stm32f4discovery/elf/defconfig
index d31cbd08ca0dd0c3af697fa6b0161f3c773f98ec..254c8c9fadf5f22b3534879e6f341bcae6f6aef1 100644
--- a/configs/stm32f4discovery/elf/defconfig
+++ b/configs/stm32f4discovery/elf/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +67,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +82,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -107,7 +112,9 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -209,6 +216,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -356,6 +364,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -436,6 +450,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 CONFIG_STM32_CCMEXCLUDE=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -454,9 +474,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -559,6 +587,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # Board-Specific Options
 #
 # CONFIG_STM32F4DISBB is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -574,9 +603,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2012
 CONFIG_START_MONTH=10
@@ -589,6 +621,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -605,6 +638,8 @@ CONFIG_MAX_TASKS=16
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -669,6 +704,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -684,12 +720,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -697,8 +737,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -706,6 +756,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -714,9 +765,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -761,19 +813,26 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -810,12 +869,6 @@ CONFIG_FS_ROMFS=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -867,10 +920,25 @@ CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+CONFIG_LIBC_ARCH_ELF=y
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -886,17 +954,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -922,9 +995,10 @@ CONFIG_HAVE_CXX=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 CONFIG_EXAMPLES_ELF=y
@@ -935,10 +1009,10 @@ CONFIG_EXAMPLES_ELF_DEVPATH="/dev/ram0"
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -947,20 +1021,18 @@ CONFIG_EXAMPLES_ELF_DEVPATH="/dev/ram0"
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
@@ -974,10 +1046,10 @@ CONFIG_EXAMPLES_ELF_DEVPATH="/dev/ram0"
 # CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1001,8 +1073,9 @@ CONFIG_EXAMPLES_ELF_DEVPATH="/dev/ram0"
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1036,16 +1109,17 @@ CONFIG_EXAMPLES_ELF_DEVPATH="/dev/ram0"
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f4discovery/include/board.h b/configs/stm32f4discovery/include/board.h
index 2ab3c99132fd1bebfb3a3704b8b78465aad49fc4..805d5f6ce12724fae3d9906b6f045ca07b45cbd8 100644
--- a/configs/stm32f4discovery/include/board.h
+++ b/configs/stm32f4discovery/include/board.h
@@ -156,8 +156,14 @@
  * Note: TIM1,8 are on APB2, others on APB1
  */
 
-#define STM32_TIM18_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_TIM27_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM3_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM4_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM5_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM6_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM7_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
+#define BOARD_TIM8_FREQUENCY    STM32_HCLK_FREQUENCY
 
 /* SDIO dividers.  Note that slower clocking is required when DMA is disabled
  * in order to avoid RX overrun/TX underrun errors due to delayed responses
@@ -261,6 +267,11 @@
 #  define GPIO_USART2_TX GPIO_USART2_TX_1
 #endif
 
+/* UART3: (Used in pseudoterm configuration) */
+
+#define GPIO_USART3_TX GPIO_USART3_TX_1
+#define GPIO_USART3_RX GPIO_USART3_RX_1
+
 /* UART6:
  *
  * The STM32F4DIS-BB base board provides RS-232 drivers and a DB9 connector
diff --git a/configs/stm32f4discovery/ipv6/Make.defs b/configs/stm32f4discovery/ipv6/Make.defs
index 59e8e4a50aa2b4f4d50669393184503314ceaa0c..bb876684f9fa243112fb91bf55427386b069f0c0 100644
--- a/configs/stm32f4discovery/ipv6/Make.defs
+++ b/configs/stm32f4discovery/ipv6/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f4discovery/ipv6/defconfig b/configs/stm32f4discovery/ipv6/defconfig
index 9c276b4e9bea82f3dd47ddd861187f041610d815..297762a9b9a30ccfc46ded01790b45c8bc4a143e 100644
--- a/configs/stm32f4discovery/ipv6/defconfig
+++ b/configs/stm32f4discovery/ipv6/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +67,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +82,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -107,7 +112,9 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -154,8 +161,6 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # STM32 Configuration Options
@@ -210,6 +215,7 @@ CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -357,6 +363,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -439,6 +451,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 CONFIG_STM32_CCMEXCLUDE=y
 CONFIG_STM32_DMACAPABLE=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -457,10 +475,18 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART6_SERIALDRIVER=y
 # CONFIG_STM32_USART6_1WIREDRIVER is not set
 # CONFIG_USART6_RS485 is not set
 # CONFIG_USART6_RXDMA is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -475,7 +501,9 @@ CONFIG_STM32_USART6_SERIALDRIVER=y
 #
 # SDIO Configuration
 #
-CONFIG_SDIO_DMAPRIO=0x00010000
+CONFIG_STM32_SDIO_DMA=y
+CONFIG_STM32_SDIO_DMAPRIO=0x00010000
+# CONFIG_STM32_SDIO_WIDTH_D1_ONLY is not set
 # CONFIG_STM32_HAVE_RTC_COUNTER is not set
 # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
 
@@ -498,6 +526,7 @@ CONFIG_STM32_RMII=y
 # CONFIG_STM32_RMII_MCO1 is not set
 # CONFIG_STM32_RMII_MCO2 is not set
 CONFIG_STM32_RMII_EXTCLK=y
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -590,19 +619,16 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
 CONFIG_STM32F4DISBB=y
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -619,9 +645,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=9
@@ -634,6 +663,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -650,6 +680,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -719,6 +751,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -734,19 +767,25 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -754,8 +793,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -763,6 +812,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -771,11 +821,13 @@ CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
 CONFIG_MMCSD_HAVECARDDETECT=y
 # CONFIG_MMCSD_SPI is not set
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y
 CONFIG_MMCSD_SDIO=y
 CONFIG_SDIO_PREFLIGHT=y
 # CONFIG_SDIO_MUXBUS is not set
 # CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 # CONFIG_SDIO_BLOCKSETUP is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -797,10 +849,8 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -824,9 +874,10 @@ CONFIG_ETH0_PHY_LAN8720=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -872,19 +923,26 @@ CONFIG_USART6_2STOP=0
 # CONFIG_USART6_IFLOWCONTROL is not set
 # CONFIG_USART6_OFLOWCONTROL is not set
 # CONFIG_USART6_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -892,13 +950,11 @@ CONFIG_USART6_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -1048,12 +1104,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_NET is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1098,11 +1148,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1120,9 +1187,11 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 # CONFIG_NETDB_DNSCLIENT is not set
@@ -1130,8 +1199,10 @@ CONFIG_LIBC_NETDB=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1163,21 +1234,22 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1188,26 +1260,25 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1215,11 +1286,10 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1243,8 +1313,9 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1255,19 +1326,19 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
 # CONFIG_NETUTILS_TFTPC is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1319,12 +1390,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1341,11 +1412,14 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -1368,6 +1442,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1428,12 +1503,12 @@ CONFIG_NSH_MAX_ROUNDTRIP=20
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1442,6 +1517,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f4discovery/kostest/Make.defs b/configs/stm32f4discovery/kostest/Make.defs
index cdc6b370b8e0843cd9166139735e570dc3143367..26abce54857de7d43986a428e76ed134fce31aaf 100644
--- a/configs/stm32f4discovery/kostest/Make.defs
+++ b/configs/stm32f4discovery/kostest/Make.defs
@@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f4discovery/kostest/defconfig b/configs/stm32f4discovery/kostest/defconfig
index c3f185487763c96e135ea46e0973fb8b72368577..25da39fdf86488f8a86015703c139d24a8ab9a9e 100644
--- a/configs/stm32f4discovery/kostest/defconfig
+++ b/configs/stm32f4discovery/kostest/defconfig
@@ -51,10 +51,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -68,8 +70,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -81,7 +82,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -214,6 +214,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -441,6 +442,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -459,9 +466,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -564,6 +579,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # Board-Specific Options
 #
 # CONFIG_STM32F4DISBB is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -579,9 +595,12 @@ CONFIG_DISABLE_ENVIRON=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=3
@@ -677,6 +696,7 @@ CONFIG_SYS_NNEST=2
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -692,6 +712,7 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
@@ -705,8 +726,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -714,6 +745,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -722,9 +754,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -769,19 +802,25 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -812,12 +851,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -880,7 +913,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -888,9 +920,11 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_USRWORK is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -911,15 +945,14 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_IGMP is not set
 # CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_KEYPADTEST is not set
-# CONFIG_EXAMPLES_IGMP is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -928,11 +961,11 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 CONFIG_EXAMPLES_OSTEST=y
 CONFIG_EXAMPLES_OSTEST_LOOPS=1
@@ -942,12 +975,10 @@ CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000
 CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 CONFIG_EXAMPLES_OSTEST_WAITRESULT=y
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -959,9 +990,9 @@ CONFIG_EXAMPLES_OSTEST_WAITRESULT=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -983,8 +1014,8 @@ CONFIG_EXAMPLES_OSTEST_WAITRESULT=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1017,16 +1048,16 @@ CONFIG_EXAMPLES_OSTEST_WAITRESULT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f4discovery/netnsh/Make.defs b/configs/stm32f4discovery/netnsh/Make.defs
index d229b8e7603ced04d056c71b60cede70c6c12c36..e8e90334947b347429e78862eb758d13364cf251 100644
--- a/configs/stm32f4discovery/netnsh/Make.defs
+++ b/configs/stm32f4discovery/netnsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f4discovery/netnsh/defconfig b/configs/stm32f4discovery/netnsh/defconfig
index 21fa2ec42ff36d5950f128f52f6374b29a39c0b9..a7f1bfd9e9d14067034b131d830d1c7c9feb92da 100644
--- a/configs/stm32f4discovery/netnsh/defconfig
+++ b/configs/stm32f4discovery/netnsh/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +67,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +82,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -107,7 +112,9 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -154,8 +161,6 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
-CONFIG_SDIO_DMA=y
-# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 
 #
 # STM32 Configuration Options
@@ -210,6 +215,7 @@ CONFIG_SDIO_DMA=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -357,6 +363,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -439,6 +451,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 CONFIG_STM32_CCMEXCLUDE=y
 CONFIG_STM32_DMACAPABLE=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -457,10 +475,18 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART6_SERIALDRIVER=y
 # CONFIG_STM32_USART6_1WIREDRIVER is not set
 # CONFIG_USART6_RS485 is not set
 # CONFIG_USART6_RXDMA is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -475,7 +501,9 @@ CONFIG_STM32_USART6_SERIALDRIVER=y
 #
 # SDIO Configuration
 #
-CONFIG_SDIO_DMAPRIO=0x00010000
+CONFIG_STM32_SDIO_DMA=y
+CONFIG_STM32_SDIO_DMAPRIO=0x00010000
+# CONFIG_STM32_SDIO_WIDTH_D1_ONLY is not set
 # CONFIG_STM32_HAVE_RTC_COUNTER is not set
 # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
 
@@ -498,6 +526,7 @@ CONFIG_STM32_RMII=y
 # CONFIG_STM32_RMII_MCO1 is not set
 # CONFIG_STM32_RMII_MCO2 is not set
 CONFIG_STM32_RMII_EXTCLK=y
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -590,19 +619,16 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
 CONFIG_STM32F4DISBB=y
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 CONFIG_BOARDCTL_RESET=y
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -619,9 +645,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2014
 CONFIG_START_MONTH=9
@@ -634,6 +663,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -650,6 +680,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -719,6 +751,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -734,19 +767,25 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -754,8 +793,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -763,6 +812,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -771,11 +821,13 @@ CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
 CONFIG_MMCSD_HAVECARDDETECT=y
 # CONFIG_MMCSD_SPI is not set
 CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
 CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y
 CONFIG_MMCSD_SDIO=y
 CONFIG_SDIO_PREFLIGHT=y
 # CONFIG_SDIO_MUXBUS is not set
 # CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
 # CONFIG_SDIO_BLOCKSETUP is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -799,10 +851,8 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -826,9 +876,10 @@ CONFIG_ETH0_PHY_LAN8720=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -874,19 +925,26 @@ CONFIG_USART6_2STOP=0
 # CONFIG_USART6_IFLOWCONTROL is not set
 # CONFIG_USART6_OFLOWCONTROL is not set
 # CONFIG_USART6_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -894,13 +952,11 @@ CONFIG_USART6_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -1052,12 +1108,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_NET is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1102,11 +1152,28 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1124,9 +1191,11 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -1141,8 +1210,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1174,21 +1245,22 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1199,26 +1271,25 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1226,11 +1297,10 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1254,8 +1324,9 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1268,21 +1339,21 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1335,13 +1406,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1361,11 +1432,14 @@ CONFIG_NSH_DISABLE_SHUTDOWN=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -1387,6 +1461,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 CONFIG_NSH_NETINIT_THREAD=y
 CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568
 CONFIG_NSH_NETINIT_THREAD_PRIORITY=80
@@ -1433,12 +1508,13 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_MDIO is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1446,8 +1522,9 @@ CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
-# CONFIG_SYSTEM_MDIO is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f4discovery/nsh/Make.defs b/configs/stm32f4discovery/nsh/Make.defs
index bf06630d058d44a91a9c4d678597554eb7afd89f..02251501c88f94099fdc0a453b986add39667bc3 100644
--- a/configs/stm32f4discovery/nsh/Make.defs
+++ b/configs/stm32f4discovery/nsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f4discovery/nsh/defconfig b/configs/stm32f4discovery/nsh/defconfig
index e57c9fd05e36de84d14e64b3060afa12f053c940..f20f89223932d8bf905bd469aa58448580f8927b 100644
--- a/configs/stm32f4discovery/nsh/defconfig
+++ b/configs/stm32f4discovery/nsh/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +67,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +82,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -107,7 +112,9 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -208,6 +215,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -355,6 +363,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -436,6 +450,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -454,9 +474,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -561,12 +589,12 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
 # CONFIG_STM32F4DISBB is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -582,9 +610,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=12
@@ -597,6 +628,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -613,6 +645,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -677,6 +711,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -692,19 +727,25 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -712,8 +753,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -721,6 +772,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -729,9 +781,10 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -777,19 +830,26 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -835,12 +895,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -885,11 +939,27 @@ CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -905,17 +975,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -947,9 +1022,9 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -957,10 +1032,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -970,34 +1045,33 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1021,8 +1095,9 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1087,12 +1162,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1109,11 +1184,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -1147,12 +1224,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1160,6 +1237,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f4discovery/nxlines/Make.defs b/configs/stm32f4discovery/nxlines/Make.defs
index 5b6ee054c44cbfc813a09507fb0866048c0a2edc..f1cbc25e729394d5e26c19b3e1bd6c1fd384bb0d 100644
--- a/configs/stm32f4discovery/nxlines/Make.defs
+++ b/configs/stm32f4discovery/nxlines/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f4discovery/nxlines/defconfig b/configs/stm32f4discovery/nxlines/defconfig
index 284eef1c4cf5f63306a0c7b005a6f157bf53e640..cd78fa5b5732b8cfcfe55dc9df2359cdba722320 100644
--- a/configs/stm32f4discovery/nxlines/defconfig
+++ b/configs/stm32f4discovery/nxlines/defconfig
@@ -46,10 +46,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +65,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,7 +77,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -208,6 +208,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -437,6 +438,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
 # CONFIG_STM32_FSMC_SRAM is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -455,9 +462,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -562,12 +577,12 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
 # CONFIG_STM32F4DISBB is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -583,9 +598,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=12
@@ -678,6 +696,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -697,9 +716,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -713,11 +737,20 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 # CONFIG_LCD_NOGETRUN is not set
@@ -749,11 +782,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
-
-#
-# Alphanumeric/Segment LCD Devices
-#
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -761,6 +790,7 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -769,9 +799,10 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -817,19 +848,25 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -874,12 +911,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1033,7 +1064,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -1042,8 +1072,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1072,7 +1104,6 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_BUTTONS is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -1080,10 +1111,10 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -1093,7 +1124,6 @@ CONFIG_HAVE_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
@@ -1108,15 +1138,14 @@ CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=4
 CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0xffe0
 CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0xf7bb
 CONFIG_EXAMPLES_NXLINES_BPP=16
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -1128,9 +1157,9 @@ CONFIG_EXAMPLES_NXLINES_BPP=16
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1154,8 +1183,8 @@ CONFIG_EXAMPLES_NXLINES_BPP=16
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1219,7 +1248,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1241,6 +1269,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1280,12 +1309,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1293,6 +1322,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f4discovery/pm/Make.defs b/configs/stm32f4discovery/pm/Make.defs
index 61081de08a27b1c7c1d660eda371f9e2ff19173f..52cbca1fa23fcb6ce941962fd08abb1735e0801f 100644
--- a/configs/stm32f4discovery/pm/Make.defs
+++ b/configs/stm32f4discovery/pm/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f4discovery/pm/defconfig b/configs/stm32f4discovery/pm/defconfig
index f9444cbdbeb4d5f865aaddaab075976acf9617fe..f908632cdcaa78f998251a229ef5e3de3e3c3ff3 100644
--- a/configs/stm32f4discovery/pm/defconfig
+++ b/configs/stm32f4discovery/pm/defconfig
@@ -46,10 +46,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +65,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,7 +77,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -208,6 +208,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -435,6 +436,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_PWM is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
@@ -454,9 +461,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -561,7 +576,6 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -574,6 +588,7 @@ CONFIG_PM_SLEEP_WAKEUP_NSEC=0
 CONFIG_PM_BUTTONS=y
 CONFIG_PM_BUTTON_ACTIVITY=10
 # CONFIG_STM32F4DISBB is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -589,9 +604,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=4
@@ -686,6 +704,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -701,6 +720,7 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
@@ -719,8 +739,18 @@ CONFIG_RTC_NALARMS=1
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -728,6 +758,7 @@ CONFIG_RTC_NALARMS=1
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -754,9 +785,10 @@ CONFIG_PM_SLEEPEXIT_THRESH=2
 CONFIG_PM_SLEEPENTER_COUNT=70
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -802,19 +834,25 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -860,12 +898,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -930,7 +962,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -939,8 +970,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -974,7 +1007,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_BUTTONS is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -982,10 +1014,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LEDS is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -996,34 +1028,33 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1047,8 +1078,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1113,7 +1144,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1135,6 +1165,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1173,12 +1204,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1186,6 +1217,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f4discovery/posix_spawn/Make.defs b/configs/stm32f4discovery/posix_spawn/Make.defs
index 1d45cdd8d94a60cd8016d56f03046f267e8c60f0..40929ec4ddf2321407cec3a59267ae28c9dac42f 100644
--- a/configs/stm32f4discovery/posix_spawn/Make.defs
+++ b/configs/stm32f4discovery/posix_spawn/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f4discovery/posix_spawn/defconfig b/configs/stm32f4discovery/posix_spawn/defconfig
index 2eaef4047318b967f3737249734b167e310d3525..e25f358c9a3a13e84d072af2588fcbf828bfc471 100644
--- a/configs/stm32f4discovery/posix_spawn/defconfig
+++ b/configs/stm32f4discovery/posix_spawn/defconfig
@@ -12,8 +12,10 @@
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
 # CONFIG_HOST_OTHER is not set
+CONFIG_TOOLCHAIN_WINDOWS=y
 # CONFIG_WINDOWS_NATIVE is not set
 CONFIG_WINDOWS_CYGWIN=y
+# CONFIG_WINDOWS_UBUNTU is not set
 # CONFIG_WINDOWS_MSYS is not set
 # CONFIG_WINDOWS_OTHER is not set
 
@@ -46,10 +48,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +67,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +82,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -107,7 +112,9 @@ CONFIG_ARCH_CHIP_STM32=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -209,6 +216,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -356,6 +364,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -436,6 +450,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 CONFIG_STM32_CCMEXCLUDE=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -454,9 +474,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -559,6 +587,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # Board-Specific Options
 #
 # CONFIG_STM32F4DISBB is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -574,9 +603,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2012
 CONFIG_START_MONTH=10
@@ -589,6 +621,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -605,6 +638,8 @@ CONFIG_MAX_TASKS=16
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -669,6 +704,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -684,12 +720,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -697,8 +737,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -706,6 +756,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -714,9 +765,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -761,19 +813,26 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -810,12 +869,6 @@ CONFIG_FS_ROMFS=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -867,10 +920,25 @@ CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
 CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+CONFIG_LIBC_ARCH_ELF=y
+# CONFIG_ARMV7M_MEMCPY is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -889,17 +957,22 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -925,9 +998,10 @@ CONFIG_HAVE_CXX=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -935,10 +1009,10 @@ CONFIG_HAVE_CXX=y
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -947,22 +1021,20 @@ CONFIG_HAVE_CXX=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 CONFIG_EXAMPLES_POSIXSPAWN=y
 CONFIG_EXAMPLES_POSIXSPAWN_DEVMINOR=0
 CONFIG_EXAMPLES_POSIXSPAWN_DEVPATH="/dev/ram0"
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
@@ -976,10 +1048,10 @@ CONFIG_EXAMPLES_POSIXSPAWN_DEVPATH="/dev/ram0"
 # CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1003,8 +1075,9 @@ CONFIG_EXAMPLES_POSIXSPAWN_DEVPATH="/dev/ram0"
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1038,16 +1111,17 @@ CONFIG_EXAMPLES_POSIXSPAWN_DEVPATH="/dev/ram0"
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f4discovery/pseudoterm/Make.defs b/configs/stm32f4discovery/pseudoterm/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..9ec926c48c6217a32e84f5e135e1d8798b20b706
--- /dev/null
+++ b/configs/stm32f4discovery/pseudoterm/Make.defs
@@ -0,0 +1,113 @@
+############################################################################
+# configs/stm32f4discovery/pseudoterm/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/stm32f4discovery/pseudoterm/defconfig b/configs/stm32f4discovery/pseudoterm/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..143132c10d9a7663d5ed99b76dc1ffe351b17730
--- /dev/null
+++ b/configs/stm32f4discovery/pseudoterm/defconfig
@@ -0,0 +1,1230 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+CONFIG_EXPERIMENTAL=y
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+CONFIG_SERIAL_TERMIOS=y
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+# CONFIG_ARCH_CHIP_STM32F103C8 is not set
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+CONFIG_ARCH_CHIP_STM32F407VG=y
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+# CONFIG_ARCH_CHIP_STM32F407ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+# CONFIG_STM32_STM32F10XX is not set
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+# CONFIG_STM32_PERFORMANCELINE is not set
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+# CONFIG_STM32_MEDIUMDENSITY is not set
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+CONFIG_STM32_STM32F40XX=y
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+CONFIG_STM32_STM32F407=y
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+CONFIG_STM32_HAVE_CCM=y
+# CONFIG_STM32_HAVE_USBDEV is not set
+CONFIG_STM32_HAVE_OTGFS=y
+CONFIG_STM32_HAVE_FSMC=y
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+CONFIG_STM32_HAVE_USART6=y
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+CONFIG_STM32_HAVE_TIM2=y
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+CONFIG_STM32_HAVE_TIM9=y
+CONFIG_STM32_HAVE_TIM10=y
+CONFIG_STM32_HAVE_TIM11=y
+CONFIG_STM32_HAVE_TIM12=y
+CONFIG_STM32_HAVE_TIM13=y
+CONFIG_STM32_HAVE_TIM14=y
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+CONFIG_STM32_HAVE_CAN2=y
+CONFIG_STM32_HAVE_DAC1=y
+CONFIG_STM32_HAVE_DAC2=y
+CONFIG_STM32_HAVE_RNG=y
+CONFIG_STM32_HAVE_ETHMAC=y
+CONFIG_STM32_HAVE_I2C2=y
+CONFIG_STM32_HAVE_I2C3=y
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKPSRAM is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CAN2 is not set
+# CONFIG_STM32_CCMDATARAM is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_CRYP is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_DAC1 is not set
+# CONFIG_STM32_DAC2 is not set
+# CONFIG_STM32_DCMI is not set
+# CONFIG_STM32_ETHMAC is not set
+# CONFIG_STM32_FSMC is not set
+# CONFIG_STM32_HASH is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_I2C3 is not set
+CONFIG_STM32_OTGFS=y
+# CONFIG_STM32_OTGHS is not set
+CONFIG_STM32_PWR=y
+# CONFIG_STM32_RNG is not set
+# CONFIG_STM32_SDIO is not set
+CONFIG_STM32_SPI1=y
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SYSCFG=y
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+# CONFIG_STM32_TIM9 is not set
+# CONFIG_STM32_TIM10 is not set
+# CONFIG_STM32_TIM11 is not set
+# CONFIG_STM32_TIM12 is not set
+# CONFIG_STM32_TIM13 is not set
+# CONFIG_STM32_TIM14 is not set
+# CONFIG_STM32_USART1 is not set
+CONFIG_STM32_USART2=y
+CONFIG_STM32_USART3=y
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USART6 is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+CONFIG_STM32_SPI=y
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_FLASH_PREFETCH is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+# CONFIG_STM32_JTAG_FULL_ENABLE is not set
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+CONFIG_STM32_JTAG_SW_ENABLE=y
+# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM2_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+# CONFIG_STM32_TIM9_CAP is not set
+# CONFIG_STM32_TIM10_CAP is not set
+# CONFIG_STM32_TIM11_CAP is not set
+# CONFIG_STM32_TIM12_CAP is not set
+# CONFIG_STM32_TIM13_CAP is not set
+# CONFIG_STM32_TIM14_CAP is not set
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
+# CONFIG_USART2_RS485 is not set
+CONFIG_STM32_USART3_SERIALDRIVER=y
+# CONFIG_STM32_USART3_1WIREDRIVER is not set
+# CONFIG_USART3_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+
+#
+# SPI Configuration
+#
+# CONFIG_STM32_SPI_INTERRUPTS is not set
+# CONFIG_STM32_SPI_DMA is not set
+# CONFIG_STM32_HAVE_RTC_COUNTER is not set
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=16717
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=114688
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y
+# CONFIG_ARCH_BOARD_MIKROE_STM32F4 is not set
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="stm32f4discovery"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+# CONFIG_ARCH_IRQBUTTONS is not set
+
+#
+# Board-Specific Options
+#
+# CONFIG_STM32F4DISBB is not set
+# CONFIG_BOARD_CRASHDUMP is not set
+# CONFIG_LIB_BOARDCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_CLOCK_TIMEKEEPING is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=12
+CONFIG_START_DAY=6
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=16
+CONFIG_WDOG_INTRESERVE=4
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_SPINLOCK is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=31
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+CONFIG_PIPES=y
+CONFIG_DEV_PIPE_MAXSIZE=1024
+CONFIG_DEV_PIPE_SIZE=1024
+CONFIG_DEV_FIFO_SIZE=1024
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+CONFIG_USART3_SERIALDRIVER=y
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART2_SERIAL_CONSOLE=y
+# CONFIG_USART3_SERIAL_CONSOLE is not set
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART2 Configuration
+#
+CONFIG_USART2_RXBUFSIZE=128
+CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART2_BAUD=115200
+CONFIG_USART2_BITS=8
+CONFIG_USART2_PARITY=0
+CONFIG_USART2_2STOP=0
+# CONFIG_USART2_IFLOWCONTROL is not set
+# CONFIG_USART2_OFLOWCONTROL is not set
+# CONFIG_USART2_DMA is not set
+
+#
+# USART3 Configuration
+#
+CONFIG_USART3_RXBUFSIZE=256
+CONFIG_USART3_TXBUFSIZE=256
+CONFIG_USART3_BAUD=115200
+CONFIG_USART3_BITS=8
+CONFIG_USART3_PARITY=0
+CONFIG_USART3_2STOP=0
+# CONFIG_USART3_IFLOWCONTROL is not set
+# CONFIG_USART3_OFLOWCONTROL is not set
+# CONFIG_USART3_DMA is not set
+CONFIG_PSEUDOTERM=y
+# CONFIG_PSEUDOTERM_BSD is not set
+CONFIG_PSEUDOTERM_SUSV1=y
+CONFIG_PSEUDOTERM_RXBUFSIZE=256
+CONFIG_PSEUDOTERM_TXBUFSIZE=256
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+CONFIG_FS_READABLE=y
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=2
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+# CONFIG_WIRELESS is not set
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CPUHOG is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_PIPE is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+CONFIG_EXAMPLES_PTYTEST=y
+CONFIG_EXAMPLES_PTYTEST_POLL=y
+CONFIG_EXAMPLES_PTYTEST_SERIALDEV="/dev/ttyS1"
+CONFIG_EXAMPLES_PTYTEST_PRIORITY=100
+CONFIG_EXAMPLES_PTYTEST_STACKSIZE=2048
+CONFIG_EXAMPLES_PTYTEST_DAEMONPRIO=100
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_IFUPDOWN is not set
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFIFO is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+# CONFIG_NSH_CMDOPT_DF_H is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+# CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f4discovery/pseudoterm/setenv.sh b/configs/stm32f4discovery/pseudoterm/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..d67e6fdc7df5d7baae84ec95846aff8859a19cde
--- /dev/null
+++ b/configs/stm32f4discovery/pseudoterm/setenv.sh
@@ -0,0 +1,80 @@
+#!/bin/bash
+# configs/stm32f4discovery/nsh/setenv.sh
+#
+#   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the RIDE
+# toolchain under windows.  You will also have to edit this if you install
+# the RIDE toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# These are the Cygwin paths to the locations where I installed the Atollic
+# toolchain under windows.  You will also have to edit this if you install
+# the Atollic toolchain in any other location.  /usr/bin is added before
+# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
+# at those locations as well.
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH variable
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/stm32f4discovery/rgbled/Make.defs b/configs/stm32f4discovery/rgbled/Make.defs
index bf06630d058d44a91a9c4d678597554eb7afd89f..02251501c88f94099fdc0a453b986add39667bc3 100644
--- a/configs/stm32f4discovery/rgbled/Make.defs
+++ b/configs/stm32f4discovery/rgbled/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f4discovery/rgbled/defconfig b/configs/stm32f4discovery/rgbled/defconfig
index 27023676715054162508eeca0ec7419cf4c390ea..954b36f1588c699d7efbc81643d6774887f2774f 100644
--- a/configs/stm32f4discovery/rgbled/defconfig
+++ b/configs/stm32f4discovery/rgbled/defconfig
@@ -42,36 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-CONFIG_ARCH_HAVE_HEAPCHECK=y
-# CONFIG_DEBUG_VERBOSE is not set
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_HEAP is not set
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_LEDS is not set
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
-# CONFIG_DEBUG_PWM is not set
-# CONFIG_DEBUG_SPI is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -85,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -98,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -155,7 +129,6 @@ CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
-# CONFIG_DEBUG_HARDFAULT is not set
 
 #
 # ARMV7M Configuration Options
@@ -227,6 +200,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -455,6 +429,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 CONFIG_STM32_TIM1_PWM=y
 CONFIG_STM32_TIM1_MODE=0
 CONFIG_STM32_TIM1_CHANNEL=1
@@ -486,9 +466,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -593,12 +581,12 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
 # CONFIG_STM32F4DISBB is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -614,9 +602,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=12
@@ -710,6 +701,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -730,9 +722,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -746,8 +743,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -755,6 +762,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 CONFIG_RGBLED=y
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -763,9 +771,10 @@ CONFIG_RGBLED=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -794,7 +803,6 @@ CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
-# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_USART2_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -812,19 +820,25 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -870,12 +884,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -940,7 +948,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -949,8 +956,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -984,7 +993,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_BUTTONS is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -992,10 +1000,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1005,37 +1013,36 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 CONFIG_EXAMPLES_RGBLED=y
 CONFIG_EXAMPLES_RGBLED_DEVNAME="/dev/rgbled0"
 CONFIG_EXAMPLES_RGBLED_PRIORITY=100
 CONFIG_EXAMPLES_RGBLED_STACKSIZE=2048
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1059,8 +1066,8 @@ CONFIG_EXAMPLES_RGBLED_STACKSIZE=2048
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1125,7 +1132,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1147,6 +1153,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1185,12 +1192,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1198,6 +1205,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f4discovery/src/Makefile b/configs/stm32f4discovery/src/Makefile
index 58d3e7c48776508e409c8240febbc74430bcd5fb..d51d09ce1da007ce9fa22e30c9fd48f673d4d809 100644
--- a/configs/stm32f4discovery/src/Makefile
+++ b/configs/stm32f4discovery/src/Makefile
@@ -48,6 +48,10 @@ ifeq ($(CONFIG_ARCH_BUTTONS),y)
 CSRCS +=  stm32_buttons.c
 endif
 
+ifeq ($(CONFIG_CAN),y)
+CSRCS += stm32_can.c
+endif
+
 ifeq ($(CONFIG_STM32_OTGFS),y)
 CSRCS += stm32_usb.c
 endif
@@ -92,6 +96,10 @@ ifeq ($(CONFIG_QENCODER),y)
 CSRCS += stm32_qencoder.c
 endif
 
+ifeq ($(CONFIG_XEN1210),y)
+CSRCS += stm32_xen1210.c
+endif
+
 ifeq ($(CONFIG_NSH_LIBRARY),y)
 CSRCS += stm32_appinit.c
 endif
@@ -132,6 +140,10 @@ ifeq ($(CONFIG_LCD_UG2864HSWEG01),y)
 CSRCS += stm32_ug2864hsweg01.c
 endif
 
+ifeq ($(CONFIG_EXAMPLES_OSTEST),y)
+CSRCS += stm32_ostest.c
+endif
+
 ifeq ($(CONFIG_TIMER),y)
 CSRCS += stm32_timer.c
 endif
diff --git a/configs/stm32f4discovery/src/stm32_autoleds.c b/configs/stm32f4discovery/src/stm32_autoleds.c
index f4dd057b6688dce2a42b15dbe9d0135fa1e33c43..b7ebe06d6ff1b9c770eb9c709e2dc8788305cdcb 100644
--- a/configs/stm32f4discovery/src/stm32_autoleds.c
+++ b/configs/stm32f4discovery/src/stm32_autoleds.c
@@ -58,18 +58,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* The following definitions map the encoded LED setting to GPIO settings */
 
 #define STM32F4_LED1      (1 << 0)
diff --git a/configs/stm32f4discovery/src/stm32_bh1750fvi.c b/configs/stm32f4discovery/src/stm32_bh1750fvi.c
index 5455c05ea318d5c988d6d8ccb1b7564264e3b11a..be896409644a99b1dbda757c5ae1363d9a203307 100644
--- a/configs/stm32f4discovery/src/stm32_bh1750fvi.c
+++ b/configs/stm32f4discovery/src/stm32_bh1750fvi.c
@@ -80,7 +80,7 @@ int stm32_bh1750initialize(FAR const char *devpath)
   FAR struct i2c_master_s *i2c;
   int ret;
 
-  sndbg("Initializing BH1750FVI!\n");
+  sninfo("Initializing BH1750FVI!\n");
 
   /* Initialize I2C */
 
@@ -96,7 +96,7 @@ int stm32_bh1750initialize(FAR const char *devpath)
   ret = bh1750fvi_register(devpath, i2c, BH1750FVI_I2C_ADDR);
   if (ret < 0)
     {
-      sndbg("Error registering BM180\n");
+      snerr("ERROR: Error registering BM180\n");
     }
 
   return ret;
diff --git a/configs/stm32f4discovery/src/stm32_bmp180.c b/configs/stm32f4discovery/src/stm32_bmp180.c
index 5f6aa85ac459b5843d6bcdbe60ea3c60a7faa1eb..bd90a808f77044b72e08abd6dec7afd8dff5511a 100644
--- a/configs/stm32f4discovery/src/stm32_bmp180.c
+++ b/configs/stm32f4discovery/src/stm32_bmp180.c
@@ -80,7 +80,7 @@ int stm32_bmp180initialize(FAR const char *devpath)
   FAR struct i2c_master_s *i2c;
   int ret;
 
-  sndbg("Initializing BMP180!\n");
+  sninfo("Initializing BMP180!\n");
 
   /* Initialize I2C */
 
@@ -96,7 +96,7 @@ int stm32_bmp180initialize(FAR const char *devpath)
   ret = bmp180_register(devpath, i2c);
   if (ret < 0)
     {
-      sndbg("Error registering BM180\n");
+      snerr("ERROR: Error registering BM180\n");
     }
 
   return ret;
diff --git a/configs/stm32f4discovery/src/stm32_boot.c b/configs/stm32f4discovery/src/stm32_boot.c
index 41eb13dcc726823c8f3d56fb454035015b7a306f..483f5edd13bf72eafb3231950944752ca52c6847 100644
--- a/configs/stm32f4discovery/src/stm32_boot.c
+++ b/configs/stm32f4discovery/src/stm32_boot.c
@@ -47,14 +47,6 @@
 #include "up_arch.h"
 #include "stm32f4discovery.h"
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
diff --git a/configs/stm32f4discovery/src/stm32_bringup.c b/configs/stm32f4discovery/src/stm32_bringup.c
index fd4e7937515ba28f1eb9b713d473452efbd79c25..e360c8cc0c72ccb2f04cf0546952e58d27e15689 100644
--- a/configs/stm32f4discovery/src/stm32_bringup.c
+++ b/configs/stm32f4discovery/src/stm32_bringup.c
@@ -45,8 +45,8 @@
 #include 
 #include 
 
-#ifdef CONFIG_SYSTEM_USBMONITOR
-#  include 
+#ifdef CONFIG_USBMONITOR
+#  include 
 #endif
 
 #include 
@@ -120,7 +120,7 @@ int stm32_bringup(void)
   ret = stm32_pca9635_initialize();
   if (ret < 0)
     {
-      sdbg("ERROR: stm32_pca9635_initialize failed: %d\n", ret);
+      serr("ERROR: stm32_pca9635_initialize failed: %d\n", ret);
     }
 #endif
 
@@ -130,7 +130,7 @@ int stm32_bringup(void)
   ret = stm32_sdio_initialize();
   if (ret != OK)
     {
-      fdbg("ERROR: Failed to initialize MMC/SD driver: %d\n", ret);
+      ferr("ERROR: Failed to initialize MMC/SD driver: %d\n", ret);
       return ret;
     }
 #endif
@@ -143,7 +143,7 @@ int stm32_bringup(void)
   ret = stm32_usbhost_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to initialize USB host: %d\n", ret);
+      uerr("ERROR: Failed to initialize USB host: %d\n", ret);
       return ret;
     }
 #endif
@@ -151,10 +151,43 @@ int stm32_bringup(void)
 #ifdef HAVE_USBMONITOR
   /* Start the USB Monitor */
 
-  ret = usbmonitor_start(0, NULL);
+  ret = usbmonitor_start();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to start USB monitor: %d\n", ret);
+      uerr("ERROR: Failed to start USB monitor: %d\n", ret);
+      return ret;
+    }
+#endif
+
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device. */
+
+  ret = stm32_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_pwm_setup() failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_CAN
+  /* Initialize CAN and register the CAN driver. */
+
+  ret = stm32_can_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_can_setup failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_QENCODER
+  /* Initialize and register the qencoder driver */
+
+  ret = stm32_qencoder_initialize("/dev/qe0", CONFIG_STM32F4DISCO_QETIMER);
+  if (ret != OK)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to register the qencoder: %d\n",
+             ret);
       return ret;
     }
 #endif
@@ -165,7 +198,7 @@ int stm32_bringup(void)
   lower = stm32_rtc_lowerhalf();
   if (!lower)
     {
-      sdbg("ERROR: Failed to instantiate the RTC lower-half driver\n");
+      serr("ERROR: Failed to instantiate the RTC lower-half driver\n");
       return -ENOMEM;
     }
   else
@@ -177,7 +210,7 @@ int stm32_bringup(void)
       ret = rtc_initialize(0, lower);
       if (ret < 0)
         {
-          sdbg("ERROR: Failed to bind/register the RTC driver: %d\n", ret);
+          serr("ERROR: Failed to bind/register the RTC driver: %d\n", ret);
           return ret;
         }
     }
@@ -189,7 +222,7 @@ int stm32_bringup(void)
   ret = elf_initialize();
   if (ret < 0)
     {
-      sdbg("ERROR: Initialization of the ELF loader failed: %d\n", ret);
+      serr("ERROR: Initialization of the ELF loader failed: %d\n", ret);
     }
 #endif
 
@@ -207,10 +240,14 @@ int stm32_bringup(void)
   ret = mount(NULL, STM32_PROCFS_MOUNTPOINT, "procfs", 0, NULL);
   if (ret < 0)
     {
-      sdbg("ERROR: Failed to mount procfs at %s: %d\n",
+      serr("ERROR: Failed to mount procfs at %s: %d\n",
            STM32_PROCFS_MOUNTPOINT, ret);
     }
 #endif
 
+#ifdef CONFIG_XEN1210
+  ret = xen1210_archinitialize(0);
+#endif
+
   return ret;
 }
diff --git a/configs/stm32f4discovery/src/stm32_buttons.c b/configs/stm32f4discovery/src/stm32_buttons.c
index b068e03dad2b85595628ad91c4e6c24a7e54b9cc..449001f13ad3e53a2abd1a049699b1be1fc4af5c 100644
--- a/configs/stm32f4discovery/src/stm32_buttons.c
+++ b/configs/stm32f4discovery/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/stm32f4discovery/src/stm32_buttons.c
  *
- *   Copyright (C) 2011-2012, 2014=2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -49,18 +50,10 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /* Pin configuration for each STM32F4 Discovery button.  This array is indexed by
  * the BUTTON_* definitions in board.h
  */
@@ -146,23 +139,23 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   /* The following should be atomic */
 
   if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
     {
-      oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler, arg);
     }
-  return oldhandler;
+
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/stm32f4discovery/src/stm32_can.c b/configs/stm32f4discovery/src/stm32_can.c
new file mode 100644
index 0000000000000000000000000000000000000000..702dff902f3fe5734512175c8c846ae0e5f44cd4
--- /dev/null
+++ b/configs/stm32f4discovery/src/stm32_can.c
@@ -0,0 +1,116 @@
+/************************************************************************************
+ * configs/stm32f4discovery/src/stm32_can.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "chip.h"
+#include "up_arch.h"
+
+#include "stm32.h"
+#include "stm32_can.h"
+#include "stm32f4discovery.h"
+
+#ifdef CONFIG_CAN
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Configuration ********************************************************************/
+
+#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2)
+#  warning "Both CAN1 and CAN2 are enabled.  Assuming only CAN1."
+#  undef CONFIG_STM32_CAN2
+#endif
+
+#ifdef CONFIG_STM32_CAN1
+#  define CAN_PORT 1
+#else
+#  define CAN_PORT 2
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_can_setup
+ *
+ * Description:
+ *  Initialize CAN and register the CAN device
+ *
+ ************************************************************************************/
+
+int stm32_can_setup(void)
+{
+#if defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)
+  struct can_dev_s *can;
+  int ret;
+
+  /* Call stm32_caninitialize() to get an instance of the CAN interface */
+
+  can = stm32_caninitialize(CAN_PORT);
+  if (can == NULL)
+    {
+      canerr("ERROR:  Failed to get CAN interface\n");
+      return -ENODEV;
+    }
+
+  /* Register the CAN driver at "/dev/can0" */
+
+  ret = can_register("/dev/can0", can);
+  if (ret < 0)
+    {
+      canerr("ERROR: can_register failed: %d\n", ret);
+      return ret;
+    }
+
+  return OK;
+#else
+  return -ENODEV;
+#endif
+}
+
+#endif /* CONFIG_CAN */
diff --git a/configs/stm32f4discovery/src/stm32_ethernet.c b/configs/stm32f4discovery/src/stm32_ethernet.c
index 1d0d97d48ff2ac1a110cd71a3453c85e22088283..fcd6d6c2149ac31a2fd4e0ba2d7b1afa9185bc8e 100644
--- a/configs/stm32f4discovery/src/stm32_ethernet.c
+++ b/configs/stm32f4discovery/src/stm32_ethernet.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm32f4discovery/src/stm32_ethernet.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,8 +42,8 @@
 /* Force verbose debug on in this file only to support unit-level testing. */
 
 #ifdef CONFIG_NETDEV_PHY_DEBUG
-#  undef  CONFIG_DEBUG_VERBOSE
-#  define CONFIG_DEBUG_VERBOSE 1
+#  undef  CONFIG_DEBUG_INFO
+#  define CONFIG_DEBUG_INFO 1
 #  undef  CONFIG_DEBUG_NET
 #  define CONFIG_DEBUG_NET 1
 #endif
@@ -79,11 +79,13 @@
  */
 
 #ifdef CONFIG_NETDEV_PHY_DEBUG
-#  define phydbg    dbg
-#  define phylldbg  lldbg
+#  define phyerr    _err
+#  define phywarn   _warn
+#  define phyinfo   _info
 #else
-#  define phydbg(x...)
-#  define phylldbg(x...)
+#  define phyerr(x...)
+#  define phywarn(x...)
+#  define phyinfo(x...)
 #endif
 
 /************************************************************************************
@@ -92,6 +94,7 @@
 
 #ifdef HAVE_NETMONITOR
 static xcpt_t g_ethmac_handler;
+static void  *g_ethmac_arg;
 #endif
 
 /************************************************************************************
@@ -105,18 +108,20 @@ static xcpt_t g_ethmac_handler;
 #ifdef HAVE_NETMONITOR
 static void stm32_emac0_phy_enable(bool enable)
 {
-  phydbg("enable=%d\n", enable);
+  phyinfo("enable=%d\n", enable);
   if (enable && g_ethmac_handler != NULL)
     {
       /* Attach and enable GPIO interrupt (and event) on the falling edge */
 
-      (void)stm32_gpiosetevent(GPIO_EMAC_NINT, false, true, true, g_ethmac_handler);
+      (void)stm32_gpiosetevent(GPIO_EMAC_NINT, false, true, true,
+                               g_ethmac_handler, g_ethmac_arg);
     }
   else
     {
       /* Detach and disable GPIO interrupt */
 
-      (void)stm32_gpiosetevent(GPIO_EMAC_NINT, false, false, false, NULL);
+      (void)stm32_gpiosetevent(GPIO_EMAC_NINT, false, false, false,
+                               NULL, NULL);
     }
 }
 #endif
@@ -138,7 +143,7 @@ void weak_function stm32_netinitialize(void)
 #ifdef HAVE_NETMONITOR
   /* Configure the PHY interrupt GPIO */
 
-  phydbg("Configuring %08x\n", GPIO_EMAC_NINT);
+  phyinfo("Configuring %08x\n", GPIO_EMAC_NINT);
   stm32_configgpio(GPIO_EMAC_NINT);
 #endif
 
@@ -199,41 +204,40 @@ void weak_function stm32_netinitialize(void)
  *             asserts an interrupt.  Must reside in OS space, but can
  *             signal tasks in user space.  A value of NULL can be passed
  *             in order to detach and disable the PHY interrupt.
+ *   arg     - The argument that will accompany the interrupt
  *   enable  - A function pointer that be unsed to enable or disable the
  *             PHY interrupt.
  *
  * Returned Value:
- *   The previous PHY interrupt handler address is returned.  This allows you
- *   to temporarily replace an interrupt handler, then restore the original
- *   interrupt handler.  NULL is returned if there is was not handler in
- *   place when the call was made.
+ *   Zero (OK) returned on success; a negated errno value is returned on
+ *   failure.
  *
  ****************************************************************************/
 
 #ifdef HAVE_NETMONITOR
-xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
+int arch_phy_irq(FAR const char *intf, xcpt_t handler, void *arg,
+                 phy_enable_t *enable)
 {
   phy_enable_t enabler;
-  xcpt_t oldhandler;
   irqstate_t flags;
 
-  nvdbg("%s: handler=%p\n", intf, handler);
-  phydbg("ETHMAC: devname=%s\n", STM32_ETHMAC_DEVNAME);
+  ninfo("%s: handler=%p\n", intf, handler);
+  phyinfo("ETHMAC: devname=%s\n", STM32_ETHMAC_DEVNAME);
 
   DEBUGASSERT(intf);
 
-  flags      = enter_critical_section();
-  oldhandler = g_ethmac_handler;
+  flags = enter_critical_section();
 
   if (strcmp(intf, STM32_ETHMAC_DEVNAME) == 0)
     {
-      phydbg("Select ETHMAC\n");
+      phyinfo("Select ETHMAC\n");
       g_ethmac_handler = handler;
+      g_ethmac_arg     = arg;
       enabler          = stm32_emac0_phy_enable;
     }
   else
     {
-      ndbg("Unsupported interface: %s\n", intf);
+      nerr("ERROR: Unsupported interface: %s\n", intf);
       enabler          = NULL;
     }
 
@@ -243,7 +247,7 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
     }
 
   leave_critical_section(flags);
-  return oldhandler;
+  return OK;
 }
 #endif
 
diff --git a/configs/stm32f4discovery/src/stm32_idle.c b/configs/stm32f4discovery/src/stm32_idle.c
index 0e0ead83608934aafa3a3a06d77e9ee43e331617..a73ee49ba838dfdd6aecf0e314b108c1a0c42d71 100644
--- a/configs/stm32f4discovery/src/stm32_idle.c
+++ b/configs/stm32f4discovery/src/stm32_idle.c
@@ -122,7 +122,7 @@ static void stm32_idlepm(void)
 
   if (newstate != oldstate)
     {
-      lldbg("newstate= %d oldstate=%d\n", newstate, oldstate);
+      sinfo("newstate= %d oldstate=%d\n", newstate, oldstate);
 
       flags = enter_critical_section();
 
diff --git a/configs/stm32f4discovery/src/stm32_max31855.c b/configs/stm32f4discovery/src/stm32_max31855.c
index 4422b5e7b3e998eae3c11a778565328d754f36f0..8b4539fa5bcdcf7ec5b0b344bbcb107ba31d4933 100644
--- a/configs/stm32f4discovery/src/stm32_max31855.c
+++ b/configs/stm32f4discovery/src/stm32_max31855.c
@@ -92,7 +92,7 @@ int stm32_max31855initialize(FAR const char *devpath)
   ret = max31855_register(devpath, spi);
   if (ret < 0)
     {
-      sndbg("Error registering MAX31855\n");
+      snerr("ERROR: Error registering MAX31855\n");
     }
 
   return ret;
diff --git a/configs/stm32f4discovery/src/stm32_max6675.c b/configs/stm32f4discovery/src/stm32_max6675.c
index 6f356aaaf8258cc22f1df31e11c5848d28237642..1b298daf9fa5f92e91514a64d665f00a4683b85f 100644
--- a/configs/stm32f4discovery/src/stm32_max6675.c
+++ b/configs/stm32f4discovery/src/stm32_max6675.c
@@ -92,7 +92,7 @@ int stm32_max6675initialize(FAR const char *devpath)
   ret = max6675_register(devpath, spi);
   if (ret < 0)
     {
-      sndbg("Error registering MAX6675\n");
+      snerr("ERROR: Error registering MAX6675\n");
     }
 
   return ret;
diff --git a/configs/stm32f4discovery/src/stm32_ostest.c b/configs/stm32f4discovery/src/stm32_ostest.c
new file mode 100644
index 0000000000000000000000000000000000000000..289db1b3edcf97e0cd340e48895620c846357dbd
--- /dev/null
+++ b/configs/stm32f4discovery/src/stm32_ostest.c
@@ -0,0 +1,111 @@
+/************************************************************************************
+ * configs/stm32f4discovery/src/stm32_ostest.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "up_arch.h"
+#include "up_internal.h"
+#include "stm32f4discovery.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Configuration ********************************************************************/
+
+#undef HAVE_FPU
+#if defined(CONFIG_ARCH_FPU) && !defined(CONFIG_EXAMPLES_OSTEST_FPUTESTDISABLE) && \
+    defined(CONFIG_EXAMPLES_OSTEST_FPUSIZE) && defined(CONFIG_SCHED_WAITPID) && \
+    !defined(CONFIG_DISABLE_SIGNALS)
+#    define HAVE_FPU 1
+#endif
+
+#ifdef HAVE_FPU
+
+#if CONFIG_EXAMPLES_OSTEST_FPUSIZE != (4*SW_FPU_REGS)
+#  error "CONFIG_EXAMPLES_OSTEST_FPUSIZE has the wrong size"
+#endif
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+static uint32_t g_saveregs[XCPTCONTEXT_REGS];
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/* Given an array of size CONFIG_EXAMPLES_OSTEST_FPUSIZE, this function will return
+ * the current FPU registers.
+ */
+
+void arch_getfpu(FAR uint32_t *fpusave)
+{
+  irqstate_t flags;
+
+  /* Take a snapshot of the thread context right now */
+
+  flags = enter_critical_section();
+  up_saveusercontext(g_saveregs);
+
+  /* Return only the floating register values */
+
+  memcpy(fpusave, &g_saveregs[REG_S0], (4*SW_FPU_REGS));
+  leave_critical_section(flags);
+}
+
+/* Given two arrays of size CONFIG_EXAMPLES_OSTEST_FPUSIZE this function
+ * will compare them and return true if they are identical.
+ */
+
+bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2)
+{
+  return memcmp(fpusave1, fpusave2, (4*SW_FPU_REGS)) == 0;
+}
+
+#endif /* HAVE_FPU */
diff --git a/configs/stm32f4discovery/src/stm32_pca9635.c b/configs/stm32f4discovery/src/stm32_pca9635.c
index 7fcae301d14f551c34a949522e2772a776266a2d..dfea887d0ec335afb39acefd5ff888a33330f39c 100644
--- a/configs/stm32f4discovery/src/stm32_pca9635.c
+++ b/configs/stm32f4discovery/src/stm32_pca9635.c
@@ -86,14 +86,14 @@ int stm32_pca9635_initialize(void)
   i2c = stm32_i2cbus_initialize(PCA9635_I2CBUS);
   if (!i2c)
     {
-      dbg("ERROR: Failed to initialize I2C%d\n", PCA9635_I2CBUS);
+      _err("ERROR: Failed to initialize I2C%d\n", PCA9635_I2CBUS);
       return -1;
     }
 
   ret = pca9635pw_register("/dev/leddrv0", i2c, PCA9635_I2CADDR);
   if (ret < 0)
     {
-      sndbg("Failed to register PCA9635 driver: %d\n", ret);
+      snerr("ERROR: Failed to register PCA9635 driver: %d\n", ret);
      return ret;
     }
 
diff --git a/configs/stm32f4discovery/src/stm32_pmbuttons.c b/configs/stm32f4discovery/src/stm32_pmbuttons.c
index 0ca71c9dcdef6902c35bebaf0f46767f92c36153..a60e7f67995a1e33f29c94789c6792e1006dec73 100644
--- a/configs/stm32f4discovery/src/stm32_pmbuttons.c
+++ b/configs/stm32f4discovery/src/stm32_pmbuttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/stm32f4discovery/src/stm32_pm_buttons.c
  *
- *   Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2015-2017 Gregory Nutt. All rights reserved.
  *   Authors: Gregory Nutt 
  *            Diego Sanchez 
  *
@@ -41,13 +41,13 @@
 #include 
 #include 
 
+#include 
+#include 
+
 #include 
 #include 
 #include 
 
-#include 
-#include 
-
 #include "up_arch.h"
 #include "nvic.h"
 #include "stm32_pwr.h"
@@ -75,22 +75,14 @@
 
 #define PM_IDLE_DOMAIN  0 /* Revisit */
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
 /****************************************************************************
  * Private Function Prototypes
  ****************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-static int button_handler(int irq, FAR void *context);
+static int button_handler(int irq, FAR void *context, FAR void *arg);
 #endif /* CONFIG_ARCH_IRQBUTTONS */
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -104,7 +96,7 @@ static int button_handler(int irq, FAR void *context);
  ****************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-static int button_handler(int irq, FAR void *context)
+static int button_handler(int irq, FAR void *context, FAR void *arg)
 {
   /* At this point the MCU should have already awakened.  The state
    * change will be handled in the IDLE loop when the system is re-awakened
@@ -138,14 +130,7 @@ void stm32_pm_buttons(void)
   board_button_initialize();
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-      xcpt_t oldhandler = board_button_irq(0, button_handler);
-
-      if (oldhandler != NULL)
-        {
-          lowsyslog(LOG_WARNING, "WARNING: oldhandler:%p is not NULL!  "
-                   "Button events may be lost or aliased!\n",
-                   oldhandler);
-        }
+  (void)board_button_irq(0, button_handler, NULL);
 #endif
 }
 
diff --git a/configs/stm32f4discovery/src/stm32_pwm.c b/configs/stm32f4discovery/src/stm32_pwm.c
index b4a7eeba08d70c7fd09bc1652e427dd0ec62608b..48b7ff3a5f9c26af0962210b35e1d3a482e28c31 100644
--- a/configs/stm32f4discovery/src/stm32_pwm.c
+++ b/configs/stm32f4discovery/src/stm32_pwm.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm32f4discovery/src/stm32_pwm.c
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,7 +42,7 @@
 #include 
 #include 
 
-#include 
+#include 
 #include 
 
 #include "chip.h"
@@ -56,9 +56,9 @@
 /* Configuration *******************************************************************/
 /* PWM
  *
- * The stm32f4discovery has no real on-board PWM devices, but the board can be configured to output
- * a pulse train using TIM4 CH2.  This pin is used by FSMC is connect to CN5 just for this
- * purpose:
+ * The stm32f4discovery has no real on-board PWM devices, but the board can be
+ * configured to output a pulse train using TIM4 CH2.  This pin is used by FSMC is
+ * connected to CN5 just for this purpose:
  *
  * PD13 FSMC_A18 / MC_TIM4_CH2OUT pin 33 (EnB)
  *
@@ -79,31 +79,25 @@
 #  undef HAVE_PWM
 #endif
 
-#if CONFIG_STM32_TIM4_CHANNEL != STM32F4DISCOVERY_PWMCHANNEL
+#if !defined(CONFIG_STM32_TIM4_CHANNEL) || CONFIG_STM32_TIM4_CHANNEL != STM32F4DISCOVERY_PWMCHANNEL
 #  undef HAVE_PWM
 #endif
 
-#ifdef HAVE_PWM
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_pwm_setup
+ * Name: stm32_pwm_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/pwm.
+ *   Initialize PWM and register the PWM device.
  *
  ************************************************************************************/
 
-int board_pwm_setup(void)
+int stm32_pwm_setup(void)
 {
+#ifdef HAVE_PWM
   static bool initialized = false;
   struct pwm_lowerhalf_s *pwm;
   int ret;
@@ -117,7 +111,7 @@ int board_pwm_setup(void)
       pwm = stm32_pwminitialize(STM32F4DISCOVERY_PWMTIMER);
       if (!pwm)
         {
-          adbg("Failed to get the STM32 PWM lower half\n");
+          aerr("ERROR: Failed to get the STM32 PWM lower half\n");
           return -ENODEV;
         }
 
@@ -126,7 +120,7 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/pwm0", pwm);
       if (ret < 0)
         {
-          adbg("pwm_register failed: %d\n", ret);
+          aerr("ERROR: pwm_register failed: %d\n", ret);
           return ret;
         }
 
@@ -136,6 +130,7 @@ int board_pwm_setup(void)
     }
 
   return OK;
+#else
+  return -ENODEV;
+#endif
 }
-
-#endif /* HAVE_PWM */
diff --git a/configs/stm32f4discovery/src/stm32_qencoder.c b/configs/stm32f4discovery/src/stm32_qencoder.c
index 823c846cf7361ef8c6817ed325791afa4aec1a25..24bf2519d30457b718e11b2dc44dd7e7264471a4 100644
--- a/configs/stm32f4discovery/src/stm32_qencoder.c
+++ b/configs/stm32f4discovery/src/stm32_qencoder.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm32f4discovery/src/stm32_qencoder.c
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -50,83 +50,12 @@
 #include "stm32_qencoder.h"
 #include "stm32f4discovery.h"
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-/* Configuration *******************************************************************/
-/* Check if we have a timer configured for quadrature encoder -- assume YES. */
-
-#define HAVE_QENCODER 1
-
-/* If TIMn is not enabled (via CONFIG_STM32_TIMn), then the configuration cannot
- * specify TIMn as a quadrature encoder (via CONFIG_STM32_TIMn_QE).
- */
-
-#ifndef CONFIG_STM32_TIM1
-#  undef CONFIG_STM32_TIM1_QE
-#endif
-#ifndef CONFIG_STM32_TIM2
-#  undef CONFIG_STM32_TIM2_QE
-#endif
-#ifndef CONFIG_STM32_TIM3
-#  undef CONFIG_STM32_TIM3_QE
-#endif
-#ifndef CONFIG_STM32_TIM4
-#  undef CONFIG_STM32_TIM4_QE
-#endif
-#ifndef CONFIG_STM32_TIM5
-#  undef CONFIG_STM32_TIM5_QE
-#endif
-#ifndef CONFIG_STM32_TIM8
-#  undef CONFIG_STM32_TIM8_QE
-#endif
-
-/* If the upper-half quadrature encoder driver is not enabled, then we cannot
- * support the quadrature encoder.
- */
-
-#ifndef CONFIG_QENCODER
-#  undef HAVE_QENCODER
-#endif
-
-/* Which Timer should we use, TIMID={1,2,3,4,5,8}.  If multiple timers are
- * configured as quadrature encoders, this logic will arbitrarily select
- * the lowest numbered timer.
- *
- * At least one TIMn, n={1,2,3,4,5,8}, must be both enabled and configured
- * as a quadrature encoder in order to support the lower half quadrature
- * encoder driver.  The above check assures that if CONFIG_STM32_TIMn_QE
- * is defined, then the correspdonding TIMn is also enabled.
- */
-
-#if defined CONFIG_STM32_TIM1_QE
-#  define TIMID 1
-#elif defined CONFIG_STM32_TIM2_QE
-#  define TIMID 2
-#elif defined CONFIG_STM32_TIM3_QE
-#  define TIMID 3
-#elif defined CONFIG_STM32_TIM4_QE
-#  define TIMID 4
-#elif defined CONFIG_STM32_TIM5_QE
-#  define TIMID 5
-#elif defined CONFIG_STM32_TIM8_QE
-#  define TIMID 8
-#else
-#  undef HAVE_QENCODER
-#endif
-
-#ifdef HAVE_QENCODER
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: qe_devinit
+ * Name: stm32_qencoder_initialize
  *
  * Description:
  *   All STM32 architectures must provide the following interface to work with
@@ -134,29 +63,18 @@
  *
  ************************************************************************************/
 
-int qe_devinit(void)
+int stm32_qencoder_initialize(FAR const char *devpath, int timer)
 {
-  static bool initialized = false;
   int ret;
 
-  /* Check if we are already initialized */
+  /* Initialize a quadrature encoder interface. */
 
-  if (!initialized)
+  sninfo("Initializing the quadrature encoder using TIM%d\n", timer);
+  ret = stm32_qeinitialize(devpath, timer);
+  if (ret < 0)
     {
-      /* Initialize a quadrature encoder interface. */
-
-      snvdbg("Initializing the quadrature encoder using TIM%d\n", TIMID);
-      ret = stm32_qeinitialize("/dev/qe0", TIMID);
-      if (ret < 0)
-        {
-          sndbg("stm32_qeinitialize failed: %d\n", ret);
-          return ret;
-        }
-
-      initialized = true;
+      snerr("ERROR: stm32_qeinitialize failed: %d\n", ret);
     }
 
-  return OK;
+  return ret;
 }
-
-#endif /* HAVE_QENCODER */
diff --git a/configs/stm32f4discovery/src/stm32_rgbled.c b/configs/stm32f4discovery/src/stm32_rgbled.c
index 8391f445589c1bef827d9be5ef980baae1853e2f..8f6fd9c8e703f3c514c60c42d212cde72b01d094 100644
--- a/configs/stm32f4discovery/src/stm32_rgbled.c
+++ b/configs/stm32f4discovery/src/stm32_rgbled.c
@@ -42,7 +42,7 @@
 #include 
 #include 
 
-#include 
+#include 
 #include 
 #include 
 
@@ -93,11 +93,10 @@
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_pwm_setup
+ * Name: stm32_rgbled_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/pwm.
+ *   Configure the RGB LED.
  *
  ************************************************************************************/
 
@@ -119,7 +118,7 @@ int stm32_rgbled_setup(void)
       ledr = stm32_pwminitialize(1);
       if (!ledr)
         {
-          dbg("Failed to get the STM32 PWM lower half to LEDR\n");
+          lederr("ERROR: Failed to get the STM32 PWM lower half to LEDR\n");
           return -ENODEV;
         }
 
@@ -138,7 +137,7 @@ int stm32_rgbled_setup(void)
       ledg = stm32_pwminitialize(2);
       if (!ledg)
         {
-          dbg("Failed to get the STM32 PWM lower half to LEDG\n");
+          lederr("ERROR: Failed to get the STM32 PWM lower half to LEDG\n");
           return -ENODEV;
         }
 
@@ -152,7 +151,7 @@ int stm32_rgbled_setup(void)
       ledb = stm32_pwminitialize(3);
       if (!ledb)
         {
-          dbg("Failed to get the STM32 PWM lower half to LEDB\n");
+          lederr("ERROR: Failed to get the STM32 PWM lower half to LEDB\n");
           return -ENODEV;
         }
 
@@ -166,7 +165,7 @@ int stm32_rgbled_setup(void)
       ret = rgbled_register("/dev/rgbled0", ledr, ledg, ledb);
       if (ret < 0)
         {
-          dbg("rgbled_register failed: %d\n", ret);
+          lederr("ERROR: rgbled_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/stm32f4discovery/src/stm32_sdio.c b/configs/stm32f4discovery/src/stm32_sdio.c
index 7d28442cf3b17a7b94598524752c498950d1ac97..75e87866d655c5ed01d3aa57c7d19d1970cea451 100644
--- a/configs/stm32f4discovery/src/stm32_sdio.c
+++ b/configs/stm32f4discovery/src/stm32_sdio.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * config/stm32f4discovery/src/stm32_sdio.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -86,7 +86,7 @@ static bool g_sd_inserted = 0xff; /* Impossible value */
  ****************************************************************************/
 
 #ifdef HAVE_NCD
-static int stm32_ncd_interrupt(int irq, FAR void *context)
+static int stm32_ncd_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   bool present;
 
@@ -128,39 +128,40 @@ int stm32_sdio_initialize(void)
 
   /* Register an interrupt handler for the card detect pin */
 
-  stm32_gpiosetevent(GPIO_SDIO_NCD, true, true, true, stm32_ncd_interrupt);
+  (void)stm32_gpiosetevent(GPIO_SDIO_NCD, true, true, true,
+                           stm32_ncd_interrupt, NULL);
 #endif
 
   /* Mount the SDIO-based MMC/SD block driver */
   /* First, get an instance of the SDIO interface */
 
-  fvdbg("Initializing SDIO slot %d\n", SDIO_SLOTNO);
+  finfo("Initializing SDIO slot %d\n", SDIO_SLOTNO);
 
   g_sdio_dev = sdio_initialize(SDIO_SLOTNO);
   if (!g_sdio_dev)
     {
-      fdbg("Failed to initialize SDIO slot %d\n", SDIO_SLOTNO);
+      ferr("ERROR: Failed to initialize SDIO slot %d\n", SDIO_SLOTNO);
       return -ENODEV;
     }
 
   /* Now bind the SDIO interface to the MMC/SD driver */
 
-  fvdbg("Bind SDIO to the MMC/SD driver, minor=%d\n", SDIO_MINOR);
+  finfo("Bind SDIO to the MMC/SD driver, minor=%d\n", SDIO_MINOR);
 
   ret = mmcsd_slotinitialize(SDIO_MINOR, g_sdio_dev);
   if (ret != OK)
     {
-      fdbg("Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
+      ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
       return ret;
     }
 
-  fvdbg("Successfully bound SDIO to the MMC/SD driver\n");
+  finfo("Successfully bound SDIO to the MMC/SD driver\n");
 
 #ifdef HAVE_NCD
   /* Use SD card detect pin to check if a card is g_sd_inserted */
 
   cd_status = !stm32_gpioread(GPIO_SDIO_NCD);
-  fvdbg("Card detect : %d\n", cd_status);
+  finfo("Card detect : %d\n", cd_status);
 
   sdio_mediachange(g_sdio_dev, cd_status);
 #else
diff --git a/configs/stm32f4discovery/src/stm32_spi.c b/configs/stm32f4discovery/src/stm32_spi.c
index f057b874d4e4aa828143acaf9499c2054d61cd84..c6d7506fc184b3f2d5a7b28b3e06e8b234c6aa64 100644
--- a/configs/stm32f4discovery/src/stm32_spi.c
+++ b/configs/stm32f4discovery/src/stm32_spi.c
@@ -55,32 +55,6 @@
 
 #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -144,7 +118,7 @@ void weak_function stm32_spidev_initialize(void)
 #ifdef CONFIG_STM32_SPI1
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
 #if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01) || \
     defined(CONFIG_LCD_SSD1351)
@@ -168,7 +142,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI2
 void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
 #if defined(CONFIG_MAX31855)
   if (devid == SPIDEV_TEMPERATURE)
@@ -193,7 +167,7 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI3
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
diff --git a/configs/stm32f4discovery/src/stm32_ssd1289.c b/configs/stm32f4discovery/src/stm32_ssd1289.c
index 588b9ee82bc2e7b03f4f31f61ef85cb4d4a962e6..488316763cc63c684a5e20fcf05153481357fcb4 100644
--- a/configs/stm32f4discovery/src/stm32_ssd1289.c
+++ b/configs/stm32f4discovery/src/stm32_ssd1289.c
@@ -72,20 +72,6 @@
 #  error "CONFIG_STM32_FSMC is required to use the LCD"
 #endif
 
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
 /* STM32F4Discovery LCD Hardware Definitions ******************************************/
 /* LCD /CS is CE1 ==  NOR/SRAM Bank 1
  *
@@ -107,23 +93,10 @@
 #define LCD_NADDRLINES   1   /* A16 */
 #define LCD_NDATALINES   16  /* D0-15 */
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg         dbg
-#  define lcdvdbg        vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
-/**************************************************************************************
- * Private Type Definition
- **************************************************************************************/
-
 /**************************************************************************************
  * Private Function Protototypes
  **************************************************************************************/
+
 /* Low Level LCD access */
 
 static void stm32_select(FAR struct ssd1289_lcd_s *dev);
@@ -355,7 +328,7 @@ int board_lcd_initialize(void)
 
   if (!g_ssd1289drvr)
     {
-      lcdvdbg("Initializing\n");
+      lcdinfo("Initializing\n");
 
       /* Configure GPIO pins and configure the FSMC to support the LCD */
 
@@ -373,7 +346,7 @@ int board_lcd_initialize(void)
       g_ssd1289drvr = ssd1289_lcdinitialize(&g_ssd1289);
       if (!g_ssd1289drvr)
         {
-          lcddbg("ERROR: ssd1289_lcdinitialize failed\n");
+          lcderr("ERROR: ssd1289_lcdinitialize failed\n");
           return -ENODEV;
         }
     }
diff --git a/configs/stm32f4discovery/src/stm32_ssd1351.c b/configs/stm32f4discovery/src/stm32_ssd1351.c
index 26e77e8ee05c9826c9915d12fe9816e50d2adea4..7df8510a35b8b069b5e556514c130fa21ac0dbf5 100644
--- a/configs/stm32f4discovery/src/stm32_ssd1351.c
+++ b/configs/stm32f4discovery/src/stm32_ssd1351.c
@@ -71,16 +71,6 @@
 #  error "The configuration requires the SPI 4-wire interface"
 #endif
 
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg(format, ...)  dbg(format, ##__VA_ARGS__)
-#  define lcdvdbg(format, ...) vdbg(format, ##__VA_ARGS__)
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -114,7 +104,7 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
   spi = stm32_spibus_initialize(1);
   if (spi == NULL)
     {
-      lcddbg("Failed to initialize SPI port 1\n");
+      lcderr("ERROR: Failed to initialize SPI port 1\n");
     }
   else
     {
@@ -123,11 +113,11 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
       dev = ssd1351_initialize(spi, devno);
       if (dev == NULL)
         {
-          lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno);
+          lcderr("ERROR: Failed to bind SPI port 1 to OLED %d: %d\n", devno);
         }
      else
         {
-          lcdvdbg("Bound SPI port 1 to OLED %d\n", devno);
+          lcdinfo("Bound SPI port 1 to OLED %d\n", devno);
 
           /* And turn the OLED on */
 
diff --git a/configs/stm32f4discovery/src/stm32_ug2864ambag01.c b/configs/stm32f4discovery/src/stm32_ug2864ambag01.c
index 24e5c840341518a37918d7395c738644d6296b29..c67a570388ae1e047fb79fae85c3ec0aa56f5036 100644
--- a/configs/stm32f4discovery/src/stm32_ug2864ambag01.c
+++ b/configs/stm32f4discovery/src/stm32_ug2864ambag01.c
@@ -93,16 +93,6 @@
 
 /* Definitions in stm32f4discovery.h */
 
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg(format, ...)   dbg(format, ##__VA_ARGS__)
-#  define lcdvdbg(format, ...)  vdbg(format, ##__VA_ARGS__)
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -136,7 +126,7 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
   spi = stm32_spibus_initialize(1);
   if (!spi)
     {
-      lcddbg("Failed to initialize SPI port 1\n");
+      lcderr("ERROR: Failed to initialize SPI port 1\n");
     }
   else
     {
@@ -145,11 +135,11 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
       dev = ug2864ambag01_initialize(spi, devno);
       if (!dev)
         {
-          lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno);
+          lcderr("ERROR: Failed to bind SPI port 1 to OLED %d: %d\n", devno);
         }
      else
         {
-          lcdvdbg("Bound SPI port 1 to OLED %d\n", devno);
+          lcdinfo("Bound SPI port 1 to OLED %d\n", devno);
 
           /* And turn the OLED on */
 
diff --git a/configs/stm32f4discovery/src/stm32_ug2864hsweg01.c b/configs/stm32f4discovery/src/stm32_ug2864hsweg01.c
index 78c24bc368316c88014cef0396a58a776161023a..3723f3ecbc886880cc226bfd9b8e4d1d8b905b76 100644
--- a/configs/stm32f4discovery/src/stm32_ug2864hsweg01.c
+++ b/configs/stm32f4discovery/src/stm32_ug2864hsweg01.c
@@ -93,16 +93,6 @@
 
 /* Definitions in stm32f4discovery.h */
 
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg(format, ...)   dbg(format, ##__VA_ARGS__)
-#  define lcdvdbg(format, ...)  vdbg(format, ##__VA_ARGS__)
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -136,7 +126,7 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
   spi = stm32_spibus_initialize(1);
   if (!spi)
     {
-      lcddbg("Failed to initialize SPI port 1\n");
+      lcderr("ERROR: Failed to initialize SPI port 1\n");
     }
   else
     {
@@ -145,11 +135,11 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
       dev = ssd1306_initialize(spi, devno);
       if (!dev)
         {
-          lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno);
+          lcderr("ERROR: Failed to bind SPI port 1 to OLED %d: %d\n", devno);
         }
      else
         {
-          lcdvdbg("Bound SPI port 1 to OLED %d\n", devno);
+          lcdinfo("Bound SPI port 1 to OLED %d\n", devno);
 
           /* And turn the OLED on */
 
diff --git a/configs/stm32f4discovery/src/stm32_usb.c b/configs/stm32f4discovery/src/stm32_usb.c
index 24f35f726a1d247e70610507b637645c33e649a3..c929c1bfe2c93a4831b955746a05f741132c8ac6 100644
--- a/configs/stm32f4discovery/src/stm32_usb.c
+++ b/configs/stm32f4discovery/src/stm32_usb.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm32f4discovery/src/stm32_usb.c
  *
- *   Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012-2013, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -102,13 +102,13 @@ static int usbhost_waiter(int argc, char *argv[])
 {
   struct usbhost_hubport_s *hport;
 
-  uvdbg("Running\n");
+  uinfo("Running\n");
   for (;;)
     {
       /* Wait for the device to change state */
 
       DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
-      uvdbg("%s\n", hport->connected ? "connected" : "disconnected");
+      uinfo("%s\n", hport->connected ? "connected" : "disconnected");
 
       /* Did we just become connected? */
 
@@ -175,7 +175,7 @@ int stm32_usbhost_initialize(void)
    * that we care about:
    */
 
-  uvdbg("Register class drivers\n");
+  uinfo("Register class drivers\n");
 
 #ifdef CONFIG_USBHOST_HUB
   /* Initialize USB hub class support */
@@ -183,7 +183,7 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_hub_initialize();
   if (ret < 0)
     {
-      udbg("ERROR: usbhost_hub_initialize failed: %d\n", ret);
+      uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
     }
 #endif
 
@@ -193,7 +193,7 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_msc_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the mass storage class: %d\n", ret);
+      uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
     }
 #endif
 
@@ -203,7 +203,7 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_cdcacm_initialize();
   if (ret != OK)
     {
-      udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
+      uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
     }
 #endif
 
@@ -213,7 +213,7 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_kbdinit();
   if (ret != OK)
     {
-      udbg("Failed to register the HID keyboard class\n");
+      uerr("ERROR: Failed to register the HID keyboard class\n");
     }
 #endif
 
@@ -223,19 +223,19 @@ int stm32_usbhost_initialize(void)
   ret = usbhost_mouse_init();
   if (ret != OK)
     {
-      udbg("Failed to register the HID mouse class\n");
+      uerr("ERROR: Failed to register the HID mouse class\n");
     }
 #endif
 
   /* Then get an instance of the USB host interface */
 
-  uvdbg("Initialize USB host\n");
+  uinfo("Initialize USB host\n");
   g_usbconn = stm32_otgfshost_initialize(0);
   if (g_usbconn)
     {
       /* Start a thread to handle device connection. */
 
-      uvdbg("Start usbhost_waiter\n");
+      uinfo("Start usbhost_waiter\n");
 
       pid = task_create("usbhost", CONFIG_STM32F4DISCO_USBHOST_PRIO,
                         CONFIG_STM32F4DISCO_USBHOST_STACKSIZE,
@@ -302,16 +302,18 @@ void stm32_usbhost_vbusdrive(int iface, bool enable)
  *
  * Input Parameter:
  *   handler - New overcurrent interrupt handler
+ *   arg     - The argument provided for the interrupt handler
  *
  * Returned value:
- *   Old overcurrent interrupt handler
+ *   Zero (OK) is returned on success.  Otherwise, a negated errno value is returned
+ *   to indicate the nature of the failure.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_USBHOST
-xcpt_t stm32_setup_overcurrent(xcpt_t handler)
+int stm32_setup_overcurrent(xcpt_t handler, void *arg)
 {
-  return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler);
+  return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler, arg);
 }
 #endif
 
@@ -329,7 +331,7 @@ xcpt_t stm32_setup_overcurrent(xcpt_t handler)
 #ifdef CONFIG_USBDEV
 void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
 #endif
 
diff --git a/configs/stm32f4discovery/src/stm32_userleds.c b/configs/stm32f4discovery/src/stm32_userleds.c
index 1401ca2bb4cbe2a52b03c45852ee02ecdf038ed5..392b14f73e6b23e89a9c5a482d282c4748ab3de8 100644
--- a/configs/stm32f4discovery/src/stm32_userleds.c
+++ b/configs/stm32f4discovery/src/stm32_userleds.c
@@ -55,22 +55,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
diff --git a/configs/stm32f4discovery/src/stm32_xen1210.c b/configs/stm32f4discovery/src/stm32_xen1210.c
new file mode 100644
index 0000000000000000000000000000000000000000..b6363a1e2ecf1b57c96861281fd90a96a41e105d
--- /dev/null
+++ b/configs/stm32f4discovery/src/stm32_xen1210.c
@@ -0,0 +1,356 @@
+/************************************************************************************
+ * configs/stm32f4discovery/src/stm32_xen1210.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author:  Alan Carvalho de Assis 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "stm32_gpio.h"
+#include "stm32_spi.h"
+#include "stm32_pwm.h"
+
+#include "stm32f4discovery.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* Configuration ************************************************************/
+
+#ifdef CONFIG_XEN1210
+#ifndef CONFIG_STM32_SPI1
+#  error "XEN1210 support requires CONFIG_STM32_SPI1"
+#endif
+
+#define CONFIG_XEN1210_SPIDEV 1
+
+#ifndef CONFIG_XEN1210_DEVMINOR
+#  define CONFIG_XEN1210_DEVMINOR 0
+#endif
+
+#ifndef CONFIG_STM32_TIM1
+#  error "XEN1210 needs PWM on TIM1 CH1 to be its clock!"
+#endif
+
+#ifndef CONFIG_STM32_TIM1_PWM
+#  error "XEN1210 needs PWM on TIM1 CH1 to be its clock!"
+#endif
+
+#if CONFIG_STM32_TIM1_CHANNEL != XEN1210_PWMCHANNEL
+#  error "XEN1210 needs PWM on TIM1 CH1 to be its clock!"
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct stm32_xen1210config_s
+{
+  /* Configuration structure as seen by the XEN1210 driver */
+
+  struct xen1210_config_s config;
+
+  /* Additional private definitions only known to this driver */
+
+  XEN1210_HANDLE handle;      /* The XEN1210 driver handle */
+  xen1210_handler_t handler;  /* The XEN1210 interrupt handler */
+  FAR void *arg;              /* Argument to pass to the interrupt handler */
+};
+
+/****************************************************************************
+ * Static Function Prototypes
+ ****************************************************************************/
+
+/* IRQ/GPIO access callbacks.  These operations all hidden behind callbacks
+ * to isolate the XEN1210 driver from differences in GPIO interrupt handling
+ * by varying boards and MCUs.
+ *
+ *   attach  - Attach the XEN1210 interrupt handler to the GPIO interrupt
+ *   enable  - Enable or disable the GPIO interrupt
+ *   clear   - Acknowledge/clear any pending GPIO interrupt
+ */
+
+static int  xen1210_attach(FAR struct xen1210_config_s *state,
+                           xen1210_handler_t handler, FAR void *arg);
+static void xen1210_enable(FAR struct xen1210_config_s *state, bool enable);
+static void xen1210_clear(FAR struct xen1210_config_s *state);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* A reference to a structure of this type must be passed to the XEN1210
+ * driver.  This structure provides information about the configuration
+ * of the XEN1210 and provides some board-specific hooks.
+ *
+ * Memory for this structure is provided by the caller.  It is not copied
+ * by the driver and is presumed to persist while the driver is active. The
+ * memory must be writable because, under certain circumstances, the driver
+ * may modify frequency or X plate resistance values.
+ */
+
+static struct stm32_xen1210config_s g_xen1210config =
+{
+  .config =
+  {
+    .frequency = XEN1210_SPI_MAXFREQUENCY,
+    .attach    = xen1210_attach,
+    .enable    = xen1210_enable,
+    .clear     = xen1210_clear,
+  },
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/* This is the XEN1210 Interrupt handler */
+
+int xen1210_interrupt(int irq, FAR void *context, FAR void *arg)
+{
+  /* Verify that we have a handler attached */
+
+  if (g_xen1210config.handler)
+    {
+      /* Yes.. forward with interrupt along with its argument */
+
+      g_xen1210config.handler(&g_xen1210config.config, g_xen1210config.arg);
+    }
+
+  return OK;
+}
+
+/* IRQ/GPIO access callbacks.  These operations all hidden behind
+ * callbacks to isolate the XEN1210 driver from differences in GPIO
+ * interrupt handling by varying boards and MCUs.
+ *
+ *   attach  - Attach the XEN1210 interrupt handler to the GPIO interrupt
+ *   enable  - Enable or disable the GPIO interrupt
+ *   clear   - Acknowledge/clear any pending GPIO interrupt
+ */
+
+static int xen1210_attach(FAR struct xen1210_config_s *state,
+                           xen1210_handler_t handler, FAR void *arg)
+{
+  FAR struct stm32_xen1210config_s *priv =
+    (FAR struct stm32_xen1210config_s *)state;
+
+  sninfo("Saving handler %p\n", handler);
+  DEBUGASSERT(priv);
+
+  /* Just save the handler and its argument.  We will use it when interrupts
+   * are enabled
+   */
+
+  priv->handler = handler;
+  priv->arg = arg;
+  return OK;
+}
+
+static void xen1210_enable(FAR struct xen1210_config_s *state, bool enable)
+{
+  irqstate_t flags;
+
+  /* Attach and enable, or detach and disable.  Enabling and disabling GPIO
+   * interrupts is a multi-step process so the safest thing is to keep
+   * interrupts disabled during the reconfiguration.
+   */
+
+  flags = enter_critical_section();
+  if (enable)
+    {
+      /* Configure the interrupt using the SAVED handler */
+
+      stm32_configgpio(GPIO_XEN1210_INT);
+      (void)stm32_gpiosetevent(GPIO_XEN1210_INT, false, true,
+                               true, xen1210_interrupt, NULL);
+    }
+  else
+    {
+      /* Configure the interrupt with a NULL handler to disable it */
+
+      (void)stm32_gpiosetevent(GPIO_XEN1210_INT, false, false, false,
+                               NULL, NULL);
+    }
+
+  leave_critical_section(flags);
+}
+
+static void xen1210_clear(FAR struct xen1210_config_s *state)
+{
+  /* Does nothing */
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/************************************************************************************
+ * Name: xen1210_pwm_setup
+ *
+ * Description:
+ *   All STM32 architectures must provide the following interface to work with
+ *   examples/pwm.
+ *
+ ************************************************************************************/
+
+int xen1210_pwm_setup(void)
+{
+  static bool initialized = false;
+  struct pwm_lowerhalf_s *pwm;
+  struct pwm_info_s info;
+
+  /* Have we already initialized? */
+
+  if (!initialized)
+    {
+      /* Call stm32_pwminitialize() to get an instance of the PWM interface */
+
+      pwm = stm32_pwminitialize(XEN1210_PWMTIMER);
+      if (!pwm)
+        {
+          _err("ERROR: Failed to get the STM32 PWM lower half\n");
+          return -ENODEV;
+        }
+
+      /* Define frequency and duty cycle: 2MHz @ 50% */
+
+      info.frequency = 2000000; /* 2MHz */
+      info.duty = 32768;        /* This value means 50% */
+
+      /* Initialize PWM */
+
+      pwm->ops->setup(pwm);
+      pwm->ops->start(pwm, &info);
+
+      /* Now we are initialized */
+
+      initialized = true;
+    }
+
+  return 0;
+}
+
+/****************************************************************************
+ * Name: xen1210_archinitialize
+ *
+ * Description:
+ *   Each board that supports an xen1210 device must provide this function.
+ *   This function is called by application-specific, setup logic to
+ *   configure the accelerometer device.  This function will register the
+ *   driver as /dev/accelN where N is the minor device number.
+ *
+ * Input Parameters:
+ *   minor   - The input device minor number
+ *
+ * Returned Value:
+ *   Zero is returned on success.  Otherwise, a negated errno value is
+ *   returned to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+int xen1210_archinitialize(int minor)
+{
+  FAR struct spi_dev_s *dev;
+  int ret;
+
+  sninfo("minor %d\n", minor);
+  DEBUGASSERT(minor == 0);
+
+  /* Check if we are already initialized */
+
+  if (!g_xen1210config.handle)
+    {
+      sninfo("Initializing\n");
+
+      /* XEN1210 needs an external clock 1-4MHz
+       * We are using PWM on TIM1 CH1 to do it!
+       */
+
+      (void)xen1210_pwm_setup();
+
+      /* Configure the XEN1210 interrupt pin as an input */
+
+      (void)stm32_configgpio(GPIO_XEN1210_INT);
+
+      /* Get an instance of the I2C interface */
+
+      dev = stm32_spibus_initialize(CONFIG_XEN1210_SPIDEV);
+      if (!dev)
+        {
+          snerr("ERROR: Failed to initialize SPI bus %d\n", CONFIG_XEN1210_SPIDEV);
+          return -ENODEV;
+        }
+
+      /* Instantiate the XEN1210 driver */
+
+      g_xen1210config.handle =
+        xen1210_instantiate(dev, (FAR struct xen1210_config_s *)&g_xen1210config);
+      if (!g_xen1210config.handle)
+        {
+          snerr("ERROR: Failed to instantiate the XEN1210 driver\n");
+          return -ENODEV;
+        }
+
+      /* Initialize and register the XEN1210 driver */
+
+      ret = xen1210_register(g_xen1210config.handle, CONFIG_XEN1210_DEVMINOR);
+      if (ret < 0)
+        {
+          snerr("ERROR: Failed to register XEN1210 driver: %d\n", ret);
+          return ret;
+        }
+    }
+
+  return OK;
+}
+
+#endif /* CONFIG_SENSORS_XEN1210 */
diff --git a/configs/stm32f4discovery/src/stm32_zerocross.c b/configs/stm32f4discovery/src/stm32_zerocross.c
index 23154764487a0ab5b482610c9b504e52252f2902..92703f56615581719be8a56cdde450fbc23651c7 100644
--- a/configs/stm32f4discovery/src/stm32_zerocross.c
+++ b/configs/stm32f4discovery/src/stm32_zerocross.c
@@ -111,7 +111,7 @@ static void zcross_enable(FAR const struct zc_lowerhalf_s *lower,
   flags = enter_critical_section();
   zcross_disable();
 
-  snllvdbg("handler: %p arg: %p\n", handler, arg);
+  sninfo("handler: %p arg: %p\n", handler, arg);
 
   if (handler)
     {
@@ -120,7 +120,7 @@ static void zcross_enable(FAR const struct zc_lowerhalf_s *lower,
     }
 
   (void)stm32_gpiosetevent(GPIO_ZEROCROSS, rising, falling,
-                           true, zcross_interrupt);
+                           true, zcross_interrupt, NULL);
 
   leave_critical_section(flags);
 }
diff --git a/configs/stm32f4discovery/src/stm32f4discovery.h b/configs/stm32f4discovery/src/stm32f4discovery.h
index 3d3400920b44983ab08c75155edf50d324d117a4..75892830adb536219709b0c6bc1f939ce32e57e9 100644
--- a/configs/stm32f4discovery/src/stm32f4discovery.h
+++ b/configs/stm32f4discovery/src/stm32f4discovery.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/stm32f4discovery/src/stm32f4discovery.h
  *
- *   Copyright (C) 2011-2012, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -49,6 +49,12 @@
  * Pre-processor Definitions
  ****************************************************************************/
 /* Configuration *************************************************************/
+
+/* Define what timer and channel to use as XEN1210 CLK */
+
+#define XEN1210_PWMTIMER   1
+#define XEN1210_PWMCHANNEL 1
+
 /* How many SPI modules does this chip support? */
 
 #if STM32_NSPI < 1
@@ -98,7 +104,7 @@
 
 /* Check if we should enable the USB monitor before starting NSH */
 
-#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_SYSTEM_USBMONITOR)
+#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_USBMONITOR)
 #  undef HAVE_USBMONITOR
 #endif
 
@@ -230,6 +236,14 @@
 #define GPIO_MAX6675_CS  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
                            GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN8)
 
+/* XEN1210 magnetic sensor */
+
+#define GPIO_XEN1210_INT (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|\
+                          GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN5)
+
+#define GPIO_CS_XEN1210  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
+                          GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
+
 /* USB OTG FS
  *
  * PA9  OTG_FS_VBUS VBUS sensing (also connected to the green LED)
@@ -424,6 +438,30 @@ void weak_function stm32_usbinitialize(void);
 int stm32_usbhost_initialize(void);
 #endif
 
+/****************************************************************************
+ * Name: stm32_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_PWM
+int stm32_pwm_setup(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_can_setup
+ *
+ * Description:
+ *  Initialize CAN and register the CAN device
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CAN
+int stm32_can_setup(void);
+#endif
+
 /****************************************************************************
  * Name: stm32_extmemgpios
  *
@@ -510,22 +548,6 @@ void stm32_led_pminitialize(void);
 void stm32_pm_buttons(void);
 #endif
 
-/****************************************************************************
- * Name: stm32_bringup
- *
- * Description:
- *   Perform architecture-specific initialization
- *
- *   CONFIG_BOARD_INITIALIZE=y :
- *     Called from board_initialize().
- *
- *   CONFIG_BOARD_INITIALIZE=n && CONFIG_LIB_BOARDCTL=y :
- *     Called from the NSH library
- *
- ****************************************************************************/
-
-int stm32_bringup(void);
-
 /****************************************************************************
  * Name: stm32_sdio_initialize
  *
@@ -550,6 +572,18 @@ int stm32_sdio_initialize(void);
 void weak_function stm32_netinitialize(void);
 #endif
 
+/****************************************************************************
+ * Name: stm32_qencoder_initialize
+ *
+ * Description:
+ *   Initialize and register a qencoder
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_QENCODER
+int stm32_qencoder_initialize(FAR const char *devpath, int timer);
+#endif
+
 /****************************************************************************
  * Name: stm32_zerocross_initialize
  *
@@ -635,5 +669,25 @@ int stm32_rgbled_setup(void);
 int stm32_timer_driver_setup(FAR const char *devpath, int timer);
 #endif
 
+/****************************************************************************
+ * Name xen1210_archinitialize
+ *
+ * Description:
+ *   This function is called by board initialization logic to configure the
+ *   XEN1210 driver.  This function will register the driver as /dev/mag0
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero is returned on success.  Otherwise, a negated errno value is
+ *   returned to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_XEN1210
+int xen1210_archinitialize(int minor);
+#endif
+
 #endif /* __ASSEMBLY__ */
 #endif /* __CONFIGS_STM32F4DISCOVERY_SRC_STM32F4DISCOVERY_H */
diff --git a/configs/stm32f4discovery/uavcan/Make.defs b/configs/stm32f4discovery/uavcan/Make.defs
index e911bdd2d531defbd345df99450ea71926b533ab..3a0c6c6df354d28de9fa8a2f01a3d0ac2e785f08 100644
--- a/configs/stm32f4discovery/uavcan/Make.defs
+++ b/configs/stm32f4discovery/uavcan/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f4discovery/uavcan/defconfig b/configs/stm32f4discovery/uavcan/defconfig
index 97db93590ef907e241f0f667dd393a6cf626b267..4bb7e6f15526b6fe5ebe9143816aa8e7d3307df8 100644
--- a/configs/stm32f4discovery/uavcan/defconfig
+++ b/configs/stm32f4discovery/uavcan/defconfig
@@ -42,10 +42,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -59,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -72,7 +73,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -199,6 +199,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -426,6 +427,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -537,6 +544,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # Board-Specific Options
 #
 # CONFIG_STM32F4DISBB is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -552,9 +560,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=12
@@ -647,6 +658,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -662,6 +674,7 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
@@ -675,8 +688,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -684,6 +707,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -692,25 +716,29 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 # CONFIG_SERIAL is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 CONFIG_RAMLOG=y
-CONFIG_RAMLOG_SYSLOG=y
 CONFIG_RAMLOG_BUFSIZE=1024
 # CONFIG_RAMLOG_CRLF is not set
 CONFIG_RAMLOG_NONBLOCKING=y
 CONFIG_RAMLOG_NPOLLWAITERS=4
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_RAMLOG_SYSLOG=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -747,13 +775,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-# CONFIG_SYSLOG_CHAR is not set
-
 #
 # Graphics Support
 #
@@ -818,7 +839,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -826,8 +846,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -887,7 +909,6 @@ CONFIG_LIBUAVCAN_INIT_RETRIES=0
 # CONFIG_EXAMPLES_BUTTONS is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -895,10 +916,10 @@ CONFIG_LIBUAVCAN_INIT_RETRIES=0
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -907,20 +928,18 @@ CONFIG_LIBUAVCAN_INIT_RETRIES=0
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -936,9 +955,9 @@ CONFIG_EXAMPLES_UAVCAN=y
 CONFIG_EXAMPLES_UAVCAN_NODE_MEM_POOL_SIZE=4096
 CONFIG_EXAMPLES_UAVCAN_NODE_ID=1
 CONFIG_EXAMPLES_UAVCAN_NODE_NAME="org.nuttx.apps.examples.uavcan"
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -960,8 +979,8 @@ CONFIG_EXAMPLES_UAVCAN_NODE_NAME="org.nuttx.apps.examples.uavcan"
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -995,16 +1014,16 @@ CONFIG_EXAMPLES_UAVCAN_NODE_NAME="org.nuttx.apps.examples.uavcan"
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f4discovery/usbnsh/Make.defs b/configs/stm32f4discovery/usbnsh/Make.defs
index 4ba2909b7a794a72195f3a712ab868d25c1adc4e..69574bbbd7c653c23897eec50fe6ed7299cc73ca 100644
--- a/configs/stm32f4discovery/usbnsh/Make.defs
+++ b/configs/stm32f4discovery/usbnsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f4discovery/usbnsh/defconfig b/configs/stm32f4discovery/usbnsh/defconfig
index 66134476b765b85c0971426242dcb7388c4a2ba8..15f26591788a23c06a7347b2baac54759379a52c 100644
--- a/configs/stm32f4discovery/usbnsh/defconfig
+++ b/configs/stm32f4discovery/usbnsh/defconfig
@@ -46,10 +46,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +65,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,7 +77,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -208,6 +208,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -436,6 +437,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
 # CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM2_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
@@ -454,9 +461,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART2_SERIALDRIVER=y
 # CONFIG_STM32_USART2_1WIREDRIVER is not set
 # CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -561,19 +576,17 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
 # CONFIG_STM32F4DISBB is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -590,9 +603,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=1
@@ -685,6 +701,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -704,9 +721,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -720,8 +742,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -729,6 +761,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -737,9 +770,9 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_SERIAL_REMOVABLE=y
+# CONFIG_SERIAL_CONSOLE is not set
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -785,6 +818,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 CONFIG_USBDEV=y
 
 #
@@ -827,16 +861,23 @@ CONFIG_CDCACM_VENDORSTR="NuttX"
 CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
 # CONFIG_USBMSC is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+CONFIG_SYSLOG_CHAR=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+CONFIG_SYSLOG_CHAR_CRLF=y
+CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -882,14 +923,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-CONFIG_SYSLOG_CHAR=y
-CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
-
 #
 # Graphics Support
 #
@@ -954,7 +987,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -963,8 +995,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -998,7 +1032,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_BUTTONS is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -1006,10 +1039,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1019,35 +1052,34 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -1071,8 +1103,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1137,7 +1169,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1159,6 +1190,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1198,12 +1230,13 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1211,7 +1244,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
-# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f4discovery/winbuild/Make.defs b/configs/stm32f4discovery/winbuild/Make.defs
index cfc4261cbf55ce3787632d7e00811b22d193ec5d..ecf9a22b123ddae8c9756fc73f7c7d51467fc878 100644
--- a/configs/stm32f4discovery/winbuild/Make.defs
+++ b/configs/stm32f4discovery/winbuild/Make.defs
@@ -64,7 +64,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f4discovery/winbuild/defconfig b/configs/stm32f4discovery/winbuild/defconfig
index 079f197c1ff76b0b08905966aaacfc7a930396da..9d78555ec03c7ab7b9cf1a2871f5b8e65ac53e42 100644
--- a/configs/stm32f4discovery/winbuild/defconfig
+++ b/configs/stm32f4discovery/winbuild/defconfig
@@ -45,7 +45,7 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_HEAPCHECK=y
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
@@ -62,8 +62,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -75,7 +74,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -654,7 +652,6 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
 # CONFIG_16550_UART is not set
@@ -715,7 +712,7 @@ CONFIG_USART2_2STOP=0
 # System Logging
 #
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
 
 #
 # Networking Support
@@ -749,7 +746,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 # CONFIG_SYSLOG_TIMESTAMP is not set
 
 #
@@ -809,7 +805,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
@@ -872,7 +867,6 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -935,7 +929,7 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
diff --git a/configs/stm32f4discovery/xen1210/Make.defs b/configs/stm32f4discovery/xen1210/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..a48fe944d14ae8b53f165c6768544cc7a46ead92
--- /dev/null
+++ b/configs/stm32f4discovery/xen1210/Make.defs
@@ -0,0 +1,113 @@
+############################################################################
+# configs/stm32f4discovery/xen1210/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/stm32f4discovery/xen1210/defconfig b/configs/stm32f4discovery/xen1210/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..ae56617e194548a966a7af11c239e8ba31283103
--- /dev/null
+++ b/configs/stm32f4discovery/xen1210/defconfig
@@ -0,0 +1,1241 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+# CONFIG_WINDOWS_NATIVE is not set
+# CONFIG_WINDOWS_CYGWIN is not set
+# CONFIG_WINDOWS_MSYS is not set
+# CONFIG_WINDOWS_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set
+# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set
+# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+# CONFIG_ARCH_CHIP_STM32F103C8 is not set
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+CONFIG_ARCH_CHIP_STM32F407VG=y
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+# CONFIG_ARCH_CHIP_STM32F407ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+# CONFIG_STM32_STM32F10XX is not set
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+# CONFIG_STM32_PERFORMANCELINE is not set
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+# CONFIG_STM32_MEDIUMDENSITY is not set
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F37XX is not set
+CONFIG_STM32_STM32F40XX=y
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+CONFIG_STM32_STM32F407=y
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+CONFIG_STM32_HAVE_CCM=y
+# CONFIG_STM32_HAVE_USBDEV is not set
+CONFIG_STM32_HAVE_OTGFS=y
+CONFIG_STM32_HAVE_FSMC=y
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+CONFIG_STM32_HAVE_USART6=y
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+CONFIG_STM32_HAVE_TIM2=y
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+CONFIG_STM32_HAVE_TIM9=y
+CONFIG_STM32_HAVE_TIM10=y
+CONFIG_STM32_HAVE_TIM11=y
+CONFIG_STM32_HAVE_TIM12=y
+CONFIG_STM32_HAVE_TIM13=y
+CONFIG_STM32_HAVE_TIM14=y
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+CONFIG_STM32_HAVE_CAN2=y
+CONFIG_STM32_HAVE_DAC1=y
+CONFIG_STM32_HAVE_DAC2=y
+CONFIG_STM32_HAVE_RNG=y
+CONFIG_STM32_HAVE_ETHMAC=y
+CONFIG_STM32_HAVE_I2C2=y
+CONFIG_STM32_HAVE_I2C3=y
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKPSRAM is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CAN2 is not set
+# CONFIG_STM32_CCMDATARAM is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_CRYP is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_DAC1 is not set
+# CONFIG_STM32_DAC2 is not set
+# CONFIG_STM32_DCMI is not set
+# CONFIG_STM32_ETHMAC is not set
+# CONFIG_STM32_FSMC is not set
+# CONFIG_STM32_HASH is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_I2C3 is not set
+CONFIG_STM32_OTGFS=y
+# CONFIG_STM32_OTGHS is not set
+CONFIG_STM32_PWR=y
+# CONFIG_STM32_RNG is not set
+# CONFIG_STM32_SDIO is not set
+CONFIG_STM32_SPI1=y
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SYSCFG=y
+CONFIG_STM32_TIM1=y
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+# CONFIG_STM32_TIM9 is not set
+# CONFIG_STM32_TIM10 is not set
+# CONFIG_STM32_TIM11 is not set
+# CONFIG_STM32_TIM12 is not set
+# CONFIG_STM32_TIM13 is not set
+# CONFIG_STM32_TIM14 is not set
+# CONFIG_STM32_USART1 is not set
+CONFIG_STM32_USART2=y
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USART6 is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+CONFIG_STM32_SPI=y
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_FLASH_PREFETCH is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+# CONFIG_STM32_JTAG_FULL_ENABLE is not set
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+CONFIG_STM32_JTAG_SW_ENABLE=y
+# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32_CCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+CONFIG_STM32_TIM1_PWM=y
+CONFIG_STM32_TIM1_MODE=0
+CONFIG_STM32_TIM1_CHANNEL=1
+CONFIG_STM32_TIM1_CHMODE=0
+# CONFIG_STM32_PWM_MULTICHAN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM2_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+# CONFIG_STM32_TIM9_CAP is not set
+# CONFIG_STM32_TIM10_CAP is not set
+# CONFIG_STM32_TIM11_CAP is not set
+# CONFIG_STM32_TIM12_CAP is not set
+# CONFIG_STM32_TIM13_CAP is not set
+# CONFIG_STM32_TIM14_CAP is not set
+CONFIG_STM32_USART=y
+CONFIG_STM32_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+
+#
+# U[S]ART Device Configuration
+#
+CONFIG_STM32_USART2_SERIALDRIVER=y
+# CONFIG_STM32_USART2_1WIREDRIVER is not set
+# CONFIG_USART2_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32_USART_BREAKS is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+
+#
+# SPI Configuration
+#
+# CONFIG_STM32_SPI_INTERRUPTS is not set
+# CONFIG_STM32_SPI_DMA is not set
+# CONFIG_STM32_HAVE_RTC_COUNTER is not set
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=16717
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=114688
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y
+# CONFIG_ARCH_BOARD_MIKROE_STM32F4 is not set
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="stm32f4discovery"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+# CONFIG_ARCH_IRQBUTTONS is not set
+
+#
+# Board-Specific Options
+#
+# CONFIG_STM32F4DISBB is not set
+# CONFIG_BOARD_CRASHDUMP is not set
+# CONFIG_LIB_BOARDCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2016
+CONFIG_START_MONTH=8
+CONFIG_START_DAY=17
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=16
+CONFIG_WDOG_INTRESERVE=4
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=31
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+CONFIG_BOARD_INITIALIZE=y
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+CONFIG_DISABLE_POLL=y
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+CONFIG_ARCH_HAVE_PWM_PULSECOUNT=y
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+CONFIG_PWM=y
+# CONFIG_PWM_PULSECOUNT is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+CONFIG_SENSORS=y
+# CONFIG_AS5048B is not set
+# CONFIG_BH1750FVI is not set
+# CONFIG_BMG160 is not set
+# CONFIG_BMP180 is not set
+# CONFIG_SENSOR_KXTJ9 is not set
+# CONFIG_LIS3DSH is not set
+# CONFIG_LIS331DL is not set
+# CONFIG_MB7040 is not set
+# CONFIG_MLX90393 is not set
+# CONFIG_MCP9844 is not set
+# CONFIG_MS58XX is not set
+CONFIG_MS58XX_VDD=30
+# CONFIG_MPL115A is not set
+# CONFIG_SENSORS_ADXL345 is not set
+# CONFIG_MAX31855 is not set
+# CONFIG_MAX6675 is not set
+# CONFIG_LIS3MDL is not set
+# CONFIG_LM75 is not set
+# CONFIG_LM92 is not set
+# CONFIG_QENCODER is not set
+CONFIG_XEN1210=y
+# CONFIG_ZEROCROSS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART2_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART2 Configuration
+#
+CONFIG_USART2_RXBUFSIZE=128
+CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART2_BAUD=115200
+CONFIG_USART2_BITS=8
+CONFIG_USART2_PARITY=0
+CONFIG_USART2_2STOP=0
+# CONFIG_USART2_IFLOWCONTROL is not set
+# CONFIG_USART2_OFLOWCONTROL is not set
+# CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+CONFIG_FS_READABLE=y
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=2
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_IFUPDOWN is not set
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+# CONFIG_NSH_CMDOPT_DF_H is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+# CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f4discovery/xen1210/setenv.sh b/configs/stm32f4discovery/xen1210/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..1f3a4940ed2b49f95cbaac33644329d6106ea62e
--- /dev/null
+++ b/configs/stm32f4discovery/xen1210/setenv.sh
@@ -0,0 +1,80 @@
+#!/bin/bash
+# configs/stm32f4discovery/xen1210/setenv.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the RIDE
+# toolchain under windows.  You will also have to edit this if you install
+# the RIDE toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# These are the Cygwin paths to the locations where I installed the Atollic
+# toolchain under windows.  You will also have to edit this if you install
+# the Atollic toolchain in any other location.  /usr/bin is added before
+# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
+# at those locations as well.
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH variable
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/stm32f746-ws/Kconfig b/configs/stm32f746-ws/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..03e46e8266abeadc4f9806af0953d388b281812e
--- /dev/null
+++ b/configs/stm32f746-ws/Kconfig
@@ -0,0 +1,8 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_BOARD_STM32F746_WS
+
+endif # ARCH_BOARD_STM32F746_WS
diff --git a/configs/stm32f746-ws/include/board.h b/configs/stm32f746-ws/include/board.h
new file mode 100644
index 0000000000000000000000000000000000000000..b58542d120e437ace6a695a96b4a39eca07bfab7
--- /dev/null
+++ b/configs/stm32f746-ws/include/board.h
@@ -0,0 +1,334 @@
+/************************************************************************************
+ * configs/stm32f746-ws/include/board.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *   Author: Mark Olsson 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __CONFIG_STM32F746_WS_INCLUDE_BOARD_H
+#define __CONFIG_STM32F746_WS_INCLUDE_BOARD_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#ifndef __ASSEMBLY__
+# include 
+#endif
+
+#ifdef __KERNEL__
+#include "stm32_rcc.h"
+#ifdef CONFIG_STM32F7_SDMMC1
+#  include "stm32_sdmmc.h"
+#endif
+#endif
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Clocking *************************************************************************/
+/* The STM32F7 Discovery board provides the following clock sources:
+ *
+ *   X1:  24 MHz oscillator for USB OTG HS PHY and camera module (daughter board)
+ *   X2:  25 MHz oscillator for STM32F746NGH6 microcontroller and Ethernet PHY.
+ *   X3:  32.768 KHz crystal for STM32F746NGH6 embedded RTC
+ *
+ * So we have these clock source available within the STM32
+ *
+ *   HSI: 16 MHz RC factory-trimmed
+ *   LSI: 32 KHz RC
+ *   HSE: On-board crystal frequency is 25MHz
+ *   LSE: 32.768 kHz
+ */
+
+#define STM32_BOARD_XTAL        8000000ul
+
+#define STM32_HSI_FREQUENCY     16000000ul
+#define STM32_LSI_FREQUENCY     32000
+#define STM32_HSE_FREQUENCY     STM32_BOARD_XTAL
+#define STM32_LSE_FREQUENCY     32768
+
+/* Main PLL Configuration.
+ *
+ * PLL source is HSE = 8,000,000
+ *
+ * PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN
+ * Subject to:
+ *
+ *     2 <= PLLM <= 63
+ *   192 <= PLLN <= 432
+ *   192 MHz <= PLL_VCO <= 432MHz
+ *
+ * SYSCLK  = PLL_VCO / PLLP
+ * Subject to
+ *
+ *   PLLP = {2, 4, 6, 8}
+ *   SYSCLK <= 216 MHz
+ *
+ * USB OTG FS, SDMMC and RNG Clock = PLL_VCO / PLLQ
+ * Subject to
+ *   The USB OTG FS requires a 48 MHz clock to work correctly. The SDMMC
+ *   and the random number generator need a frequency lower than or equal
+ *   to 48 MHz to work correctly.
+ *
+ * 2 <= PLLQ <= 15
+ */
+
+/* Highest SYSCLK with USB OTG FS clock <= 48MHz
+ *
+ * PLL_VCO = (8,000,000 / 8) * 432 = 432 MHz
+ * SYSCLK  = 432 MHz / 2 = 216 MHz
+ * USB OTG FS, SDMMC and RNG Clock = 432 MHz / 9 = 48 MHz
+ */
+
+#define STM32_PLLCFG_PLLM       RCC_PLLCFG_PLLM(8)
+#define STM32_PLLCFG_PLLN       RCC_PLLCFG_PLLN(432)
+#define STM32_PLLCFG_PLLP       RCC_PLLCFG_PLLP_2
+#define STM32_PLLCFG_PLLQ       RCC_PLLCFG_PLLQ(9)
+
+#define STM32_VCO_FREQUENCY     ((STM32_HSE_FREQUENCY / 8) * 432)
+#define STM32_SYSCLK_FREQUENCY  (STM32_VCO_FREQUENCY / 2)
+#define STM32_OTGFS_FREQUENCY   (STM32_VCO_FREQUENCY / 9)
+
+/* Configure factors for  PLLSAI clock */
+
+#define CONFIG_STM32F7_PLLSAI           1
+#define STM32_RCC_PLLSAICFGR_PLLSAIN    RCC_PLLSAICFGR_PLLSAIN(192)
+#define STM32_RCC_PLLSAICFGR_PLLSAIP    RCC_PLLSAICFGR_PLLSAIP(2)
+#define STM32_RCC_PLLSAICFGR_PLLSAIQ    RCC_PLLSAICFGR_PLLSAIQ(2)
+#define STM32_RCC_PLLSAICFGR_PLLSAIR    RCC_PLLSAICFGR_PLLSAIR(2)
+
+/* Configure Dedicated Clock Configuration Register */
+
+#define STM32_RCC_DCKCFGR1_PLLI2SDIVQ  RCC_DCKCFGR1_PLLI2SDIVQ(1)
+#define STM32_RCC_DCKCFGR1_PLLSAIDIVQ  RCC_DCKCFGR1_PLLSAIDIVQ(1)
+#define STM32_RCC_DCKCFGR1_PLLSAIDIVR  RCC_DCKCFGR1_PLLSAIDIVR(0)
+#define STM32_RCC_DCKCFGR1_SAI1SRC     RCC_DCKCFGR1_SAI1SEL(0)
+#define STM32_RCC_DCKCFGR1_SAI2SRC     RCC_DCKCFGR1_SAI2SEL(0)
+#define STM32_RCC_DCKCFGR1_TIMPRESRC   0
+#define STM32_RCC_DCKCFGR1_DFSDM1SRC   0
+#define STM32_RCC_DCKCFGR1_ADFSDM1SRC  0
+
+/* Configure factors for  PLLI2S clock */
+
+#define CONFIG_STM32F7_PLLI2S          1
+#define STM32_RCC_PLLI2SCFGR_PLLI2SN   RCC_PLLI2SCFGR_PLLI2SN(192)
+#define STM32_RCC_PLLI2SCFGR_PLLI2SP   RCC_PLLI2SCFGR_PLLI2SP(2)
+#define STM32_RCC_PLLI2SCFGR_PLLI2SQ   RCC_PLLI2SCFGR_PLLI2SQ(2)
+#define STM32_RCC_PLLI2SCFGR_PLLI2SR   RCC_PLLI2SCFGR_PLLI2SR(2)
+
+/* Configure Dedicated Clock Configuration Register 2 */
+
+#define STM32_RCC_DCKCFGR2_USART1SRC  RCC_DCKCFGR2_USART1SEL_APB
+#define STM32_RCC_DCKCFGR2_USART2SRC  RCC_DCKCFGR2_USART2SEL_APB
+#define STM32_RCC_DCKCFGR2_UART4SRC   RCC_DCKCFGR2_UART4SEL_APB
+#define STM32_RCC_DCKCFGR2_UART5SRC   RCC_DCKCFGR2_UART5SEL_APB
+#define STM32_RCC_DCKCFGR2_USART6SRC  RCC_DCKCFGR2_USART6SEL_APB
+#define STM32_RCC_DCKCFGR2_UART7SRC   RCC_DCKCFGR2_UART7SEL_APB
+#define STM32_RCC_DCKCFGR2_UART8SRC   RCC_DCKCFGR2_UART8SEL_APB
+#define STM32_RCC_DCKCFGR2_I2C1SRC    RCC_DCKCFGR2_I2C1SEL_HSI
+#define STM32_RCC_DCKCFGR2_I2C2SRC    RCC_DCKCFGR2_I2C2SEL_HSI
+#define STM32_RCC_DCKCFGR2_I2C3SRC    RCC_DCKCFGR2_I2C3SEL_HSI
+#define STM32_RCC_DCKCFGR2_I2C4SRC    RCC_DCKCFGR2_I2C4SEL_HSI
+#define STM32_RCC_DCKCFGR2_LPTIM1SRC  RCC_DCKCFGR2_LPTIM1SEL_APB
+#define STM32_RCC_DCKCFGR2_CECSRC     RCC_DCKCFGR2_CECSEL_HSI
+#define STM32_RCC_DCKCFGR2_CK48MSRC   RCC_DCKCFGR2_CK48MSEL_PLLSAI
+#define STM32_RCC_DCKCFGR2_SDMMCSRC   RCC_DCKCFGR2_SDMMCSEL_48MHZ
+#define STM32_RCC_DCKCFGR2_SDMMC2SRC  RCC_DCKCFGR2_SDMMC2SEL_48MHZ
+#define STM32_RCC_DCKCFGR2_DSISRC     RCC_DCKCFGR2_DSISEL_48MHZ
+
+/* Several prescalers allow the configuration of the two AHB buses, the
+ * high-speed APB (APB2) and the low-speed APB (APB1) domains. The maximum
+ * frequency of the two AHB buses is 216 MHz while the maximum frequency of
+ * the high-speed APB domains is 108 MHz. The maximum allowed frequency of
+ * the low-speed APB domain is 54 MHz.
+ */
+
+/* AHB clock (HCLK) is SYSCLK (216 MHz) */
+
+#define STM32_RCC_CFGR_HPRE     RCC_CFGR_HPRE_SYSCLK  /* HCLK  = SYSCLK / 1 */
+#define STM32_HCLK_FREQUENCY    STM32_SYSCLK_FREQUENCY
+#define STM32_BOARD_HCLK        STM32_HCLK_FREQUENCY  /* same as above, to satisfy compiler */
+
+/* APB1 clock (PCLK1) is HCLK/4 (54 MHz) */
+
+#define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd4     /* PCLK1 = HCLK / 4 */
+#define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/4)
+
+/* Timers driven from APB1 will be twice PCLK1 */
+
+#define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM12_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM13_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM14_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+
+/* APB2 clock (PCLK2) is HCLK/2 (108MHz) */
+
+#define STM32_RCC_CFGR_PPRE2    RCC_CFGR_PPRE2_HCLKd2     /* PCLK2 = HCLK / 2 */
+#define STM32_PCLK2_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
+
+/* Timers driven from APB2 will be twice PCLK2 */
+
+#define STM32_APB2_TIM1_CLKIN   (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM8_CLKIN   (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM9_CLKIN   (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM10_CLKIN  (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM11_CLKIN  (2*STM32_PCLK2_FREQUENCY)
+
+/* FLASH wait states
+ *
+ *  --------- ---------- -----------
+ *  VDD       MAX SYSCLK WAIT STATES
+ *  --------- ---------- -----------
+ *  1.7-2.1 V   180 MHz    8
+ *  2.1-2.4 V   216 MHz    9
+ *  2.4-2.7 V   216 MHz    8
+ *  2.7-3.6 V   216 MHz    7
+ *  --------- ---------- -----------
+ */
+
+#define BOARD_FLASH_WAITSTATES 7
+
+/* Alternate function pin selections ************************************************/
+
+/* USART6:
+ *
+ * These configurations assume that you are using a standard Arduio RS-232 shield
+ * with the serial interface with RX on pin D0 and TX on pin D1:
+ *
+ *   -------- ---------------
+ *               STM32F7
+ *   ARDUIONO FUNCTION  GPIO
+ *   -- ----- --------- -----
+ *   DO RX    USART6_RX PC7
+ *   D1 TX    USART6_TX PC6
+ *   -- ----- --------- -----
+ */
+
+#define GPIO_USART6_RX GPIO_USART6_RX_1
+#define GPIO_USART6_TX GPIO_USART6_TX_1
+
+#define GPIO_SPI1_SCK  GPIO_SPI1_SCK_1
+#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
+#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
+
+#define GPIO_I2C1_SCL  GPIO_I2C1_SCL_1
+#define GPIO_I2C1_SDA  GPIO_I2C1_SDA_1
+
+/* SDMMC */
+
+/* Stream selections are arbitrary for now but might become important in the future
+ * if we set aside more DMA channels/streams.
+ *
+ * SDIO DMA
+ *   DMAMAP_SDMMC1_1 = Channel 4, Stream 3
+ *   DMAMAP_SDMMC1_2 = Channel 4, Stream 6
+ */
+
+#define DMAMAP_SDMMC1  DMAMAP_SDMMC1_1
+
+/* SDIO dividers.  Note that slower clocking is required when DMA is disabled
+ * in order to avoid RX overrun/TX underrun errors due to delayed responses
+ * to service FIFOs in interrupt driven mode.  These values have not been
+ * tuned!!!
+ *
+ * SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(118+2)=400 KHz
+ */
+
+#define STM32_SDMMC_INIT_CLKDIV      (118 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
+
+/* DMA ON:  SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
+ * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz
+ */
+
+#ifdef CONFIG_SDIO_DMA
+#  define STM32_SDMMC_MMCXFR_CLKDIV  (1 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
+#else
+#  define STM32_SDMMC_MMCXFR_CLKDIV  (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
+#endif
+
+/* DMA ON:  SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
+ * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz
+ */
+
+#ifdef CONFIG_SDIO_DMA
+#  define STM32_SDMMC_SDXFR_CLKDIV   (1 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
+#else
+#  define STM32_SDMMC_SDXFR_CLKDIV   (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
+#endif
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.  This entry point
+ *   is called early in the initialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void stm32_boardinitialize(void);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif  /* __CONFIG_STM32F746_WS_INCLUDE_BOARD_H */
diff --git a/configs/nucleo-144/nsh/Make.defs b/configs/stm32f746-ws/nsh/Make.defs
similarity index 97%
rename from configs/nucleo-144/nsh/Make.defs
rename to configs/stm32f746-ws/nsh/Make.defs
index 45b3f5f4aee98b1defe940c9560d22d8d92aadda..cbf3bbdb2bb10f4768948ad1367bbe87bed14824 100644
--- a/configs/nucleo-144/nsh/Make.defs
+++ b/configs/stm32f746-ws/nsh/Make.defs
@@ -1,5 +1,5 @@
 ############################################################################
-# configs/nucleo-144/nsh/Make.defs
+# configs/stm32f746-ws/nsh/Make.defs
 #
 #   Copyright (C) 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f746-ws/nsh/defconfig b/configs/stm32f746-ws/nsh/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..1aecbaa4f1b0443d15df4803db134c6ffdd65d64
--- /dev/null
+++ b/configs/stm32f746-ws/nsh/defconfig
@@ -0,0 +1,1228 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+# CONFIG_INTELHEX_BINARY is not set
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+CONFIG_ARCH_STDARG_H=y
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+CONFIG_STACK_COLORATION=y
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+CONFIG_DEBUG_NOOPT=y
+# CONFIG_DEBUG_CUSTOMOPT is not set
+# CONFIG_DEBUG_FULLOPT is not set
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+# CONFIG_ARCH_CHIP_STM32 is not set
+CONFIG_ARCH_CHIP_STM32F7=y
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
+# CONFIG_ARCH_CORTEXM4 is not set
+CONFIG_ARCH_CORTEXM7=y
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32f7"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+CONFIG_ARMV7M_USEBASEPRI=y
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+CONFIG_ARMV7M_CMNVECTOR=y
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+CONFIG_ARCH_FPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+CONFIG_ARMV7M_HAVE_ICACHE=y
+CONFIG_ARMV7M_HAVE_DCACHE=y
+CONFIG_ARMV7M_ICACHE=y
+CONFIG_ARMV7M_DCACHE=y
+CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
+CONFIG_ARMV7M_HAVE_ITCM=y
+CONFIG_ARMV7M_HAVE_DTCM=y
+# CONFIG_ARMV7M_ITCM is not set
+CONFIG_ARMV7M_DTCM=y
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+# CONFIG_USART6_RS485 is not set
+# CONFIG_USART6_RXDMA is not set
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+
+#
+# STM32 F7 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32F745VG is not set
+# CONFIG_ARCH_CHIP_STM32F745VE is not set
+# CONFIG_ARCH_CHIP_STM32F745IG is not set
+# CONFIG_ARCH_CHIP_STM32F745IE is not set
+# CONFIG_ARCH_CHIP_STM32F745ZE is not set
+# CONFIG_ARCH_CHIP_STM32F745ZG is not set
+# CONFIG_ARCH_CHIP_STM32F746BG is not set
+# CONFIG_ARCH_CHIP_STM32F746VG is not set
+# CONFIG_ARCH_CHIP_STM32F746VE is not set
+# CONFIG_ARCH_CHIP_STM32F746BE is not set
+# CONFIG_ARCH_CHIP_STM32F746ZG is not set
+# CONFIG_ARCH_CHIP_STM32F746IE is not set
+# CONFIG_ARCH_CHIP_STM32F746NG is not set
+# CONFIG_ARCH_CHIP_STM32F746NE is not set
+# CONFIG_ARCH_CHIP_STM32F746ZE is not set
+CONFIG_ARCH_CHIP_STM32F746IG=y
+# CONFIG_ARCH_CHIP_STM32F756NG is not set
+# CONFIG_ARCH_CHIP_STM32F756BG is not set
+# CONFIG_ARCH_CHIP_STM32F756IG is not set
+# CONFIG_ARCH_CHIP_STM32F756VG is not set
+# CONFIG_ARCH_CHIP_STM32F756ZG is not set
+# CONFIG_ARCH_CHIP_STM32F765NI is not set
+# CONFIG_ARCH_CHIP_STM32F765VI is not set
+# CONFIG_ARCH_CHIP_STM32F765VG is not set
+# CONFIG_ARCH_CHIP_STM32F765BI is not set
+# CONFIG_ARCH_CHIP_STM32F765NG is not set
+# CONFIG_ARCH_CHIP_STM32F765ZG is not set
+# CONFIG_ARCH_CHIP_STM32F765ZI is not set
+# CONFIG_ARCH_CHIP_STM32F765IG is not set
+# CONFIG_ARCH_CHIP_STM32F765BG is not set
+# CONFIG_ARCH_CHIP_STM32F765II is not set
+# CONFIG_ARCH_CHIP_STM32F767NG is not set
+# CONFIG_ARCH_CHIP_STM32F767IG is not set
+# CONFIG_ARCH_CHIP_STM32F767VG is not set
+# CONFIG_ARCH_CHIP_STM32F767ZG is not set
+# CONFIG_ARCH_CHIP_STM32F767NI is not set
+# CONFIG_ARCH_CHIP_STM32F767VI is not set
+# CONFIG_ARCH_CHIP_STM32F767BG is not set
+# CONFIG_ARCH_CHIP_STM32F767ZI is not set
+# CONFIG_ARCH_CHIP_STM32F767II is not set
+# CONFIG_ARCH_CHIP_STM32F769BI is not set
+# CONFIG_ARCH_CHIP_STM32F769II is not set
+# CONFIG_ARCH_CHIP_STM32F769BG is not set
+# CONFIG_ARCH_CHIP_STM32F769NI is not set
+# CONFIG_ARCH_CHIP_STM32F769AI is not set
+# CONFIG_ARCH_CHIP_STM32F769NG is not set
+# CONFIG_ARCH_CHIP_STM32F769IG is not set
+# CONFIG_ARCH_CHIP_STM32F777ZI is not set
+# CONFIG_ARCH_CHIP_STM32F777VI is not set
+# CONFIG_ARCH_CHIP_STM32F777NI is not set
+# CONFIG_ARCH_CHIP_STM32F777BI is not set
+# CONFIG_ARCH_CHIP_STM32F777II is not set
+# CONFIG_ARCH_CHIP_STM32F778AI is not set
+# CONFIG_ARCH_CHIP_STM32F779II is not set
+# CONFIG_ARCH_CHIP_STM32F779NI is not set
+# CONFIG_ARCH_CHIP_STM32F779BI is not set
+# CONFIG_ARCH_CHIP_STM32F779AI is not set
+CONFIG_STM32F7_STM32F74XX=y
+# CONFIG_STM32F7_STM32F75XX is not set
+# CONFIG_STM32F7_STM32F76XX is not set
+# CONFIG_STM32F7_STM32F77XX is not set
+# CONFIG_STM32F7_IO_CONFIG_V is not set
+CONFIG_STM32F7_IO_CONFIG_I=y
+# CONFIG_STM32F7_IO_CONFIG_Z is not set
+# CONFIG_STM32F7_IO_CONFIG_N is not set
+# CONFIG_STM32F7_IO_CONFIG_B is not set
+# CONFIG_STM32F7_IO_CONFIG_A is not set
+# CONFIG_STM32F7_STM32F745XX is not set
+CONFIG_STM32F7_STM32F746XX=y
+# CONFIG_STM32F7_STM32F756XX is not set
+# CONFIG_STM32F7_STM32F765XX is not set
+# CONFIG_STM32F7_STM32F767XX is not set
+# CONFIG_STM32F7_STM32F768XX is not set
+# CONFIG_STM32F7_STM32F768AX is not set
+# CONFIG_STM32F7_STM32F769XX is not set
+# CONFIG_STM32F7_STM32F769AX is not set
+# CONFIG_STM32F7_STM32F777XX is not set
+# CONFIG_STM32F7_STM32F778XX is not set
+# CONFIG_STM32F7_STM32F778AX is not set
+# CONFIG_STM32F7_STM32F779XX is not set
+# CONFIG_STM32F7_STM32F779AX is not set
+# CONFIG_STM32F7_FLASH_CONFIG_E is not set
+# CONFIG_STM32F7_FLASH_CONFIG_I is not set
+CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT=y
+# CONFIG_STM32F7_FLASH_OVERRIDE_E is not set
+# CONFIG_STM32F7_FLASH_OVERRIDE_G is not set
+# CONFIG_STM32F7_FLASH_OVERRIDE_I is not set
+
+#
+# STM32 Peripheral Support
+#
+CONFIG_STM32F7_HAVE_LTDC=y
+CONFIG_STM32F7_HAVE_FSMC=y
+CONFIG_STM32F7_HAVE_ETHRNET=y
+CONFIG_STM32F7_HAVE_RNG=y
+CONFIG_STM32F7_HAVE_SPI5=y
+CONFIG_STM32F7_HAVE_SPI6=y
+# CONFIG_STM32F7_HAVE_SDMMC2 is not set
+CONFIG_STM32F7_HAVE_ADC1_DMA=y
+# CONFIG_STM32F7_HAVE_ADC2_DMA is not set
+# CONFIG_STM32F7_HAVE_ADC3_DMA is not set
+# CONFIG_STM32F7_HAVE_CAN3 is not set
+CONFIG_STM32F7_HAVE_DCMI=y
+# CONFIG_STM32F7_HAVE_DSIHOST is not set
+CONFIG_STM32F7_HAVE_DMA2D=y
+# CONFIG_STM32F7_HAVE_JPEG is not set
+# CONFIG_STM32F7_HAVE_CRYP is not set
+# CONFIG_STM32F7_HAVE_HASH is not set
+# CONFIG_STM32F7_HAVE_DFSDM1 is not set
+CONFIG_STM32F7_ADC=y
+# CONFIG_STM32F7_CAN is not set
+# CONFIG_STM32F7_DAC is not set
+CONFIG_STM32F7_DMA=y
+CONFIG_STM32F7_I2C=y
+# CONFIG_STM32F7_SAI is not set
+CONFIG_STM32F7_SDMMC=y
+CONFIG_STM32F7_SPI=y
+# CONFIG_STM32F7_TIM is not set
+CONFIG_STM32F7_USART=y
+CONFIG_STM32F7_ADC1=y
+# CONFIG_STM32F7_ADC2 is not set
+# CONFIG_STM32F7_ADC3 is not set
+# CONFIG_STM32F7_BKPSRAM is not set
+# CONFIG_STM32F7_CAN1 is not set
+# CONFIG_STM32F7_CAN2 is not set
+# CONFIG_STM32F7_CEC is not set
+# CONFIG_STM32F7_CRC is not set
+# CONFIG_STM32F7_DMA1 is not set
+CONFIG_STM32F7_DMA2=y
+# CONFIG_STM32F7_DAC1 is not set
+# CONFIG_STM32F7_DAC2 is not set
+# CONFIG_STM32F7_DCMI is not set
+# CONFIG_STM32F7_DMA2D is not set
+# CONFIG_STM32F7_ETHMAC is not set
+# CONFIG_STM32F7_FSMC is not set
+CONFIG_STM32F7_I2C1=y
+# CONFIG_STM32F7_I2C2 is not set
+# CONFIG_STM32F7_I2C3 is not set
+# CONFIG_STM32F7_I2C4 is not set
+# CONFIG_STM32F7_LPTIM1 is not set
+# CONFIG_STM32F7_LTDC is not set
+CONFIG_STM32F7_OTGFS=y
+# CONFIG_STM32F7_OTGHS is not set
+# CONFIG_STM32F7_QUADSPI is not set
+# CONFIG_STM32F7_PWR is not set
+# CONFIG_STM32F7_RNG is not set
+# CONFIG_STM32F7_SAI1 is not set
+# CONFIG_STM32F7_SAI2 is not set
+CONFIG_STM32F7_SDMMC1=y
+# CONFIG_STM32F7_SPDIFRX is not set
+CONFIG_STM32F7_SPI1=y
+# CONFIG_STM32F7_SPI2 is not set
+# CONFIG_STM32F7_SPI3 is not set
+# CONFIG_STM32F7_SPI4 is not set
+# CONFIG_STM32F7_SPI5 is not set
+# CONFIG_STM32F7_SPI6 is not set
+# CONFIG_STM32F7_TIM1 is not set
+# CONFIG_STM32F7_TIM2 is not set
+# CONFIG_STM32F7_TIM3 is not set
+# CONFIG_STM32F7_TIM4 is not set
+# CONFIG_STM32F7_TIM5 is not set
+# CONFIG_STM32F7_TIM6 is not set
+# CONFIG_STM32F7_TIM7 is not set
+# CONFIG_STM32F7_TIM8 is not set
+# CONFIG_STM32F7_TIM9 is not set
+# CONFIG_STM32F7_TIM10 is not set
+# CONFIG_STM32F7_TIM11 is not set
+# CONFIG_STM32F7_TIM12 is not set
+# CONFIG_STM32F7_TIM13 is not set
+# CONFIG_STM32F7_TIM14 is not set
+# CONFIG_STM32F7_USART1 is not set
+# CONFIG_STM32F7_USART2 is not set
+# CONFIG_STM32F7_USART3 is not set
+# CONFIG_STM32F7_UART4 is not set
+# CONFIG_STM32F7_UART5 is not set
+CONFIG_STM32F7_USART6=y
+# CONFIG_STM32F7_UART7 is not set
+# CONFIG_STM32F7_UART8 is not set
+# CONFIG_STM32F7_IWDG is not set
+# CONFIG_STM32F7_WWDG is not set
+
+#
+# U[S]ART Configuration
+#
+# CONFIG_STM32F7_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32F7_USART_BREAKS is not set
+
+#
+# SPI Configuration
+#
+# CONFIG_STM32F7_SPI_INTERRUPTS is not set
+# CONFIG_STM32F7_SPI_DMA is not set
+
+#
+# I2C Configuration
+#
+# CONFIG_STM32F7_I2C_DYNTIMEO is not set
+CONFIG_STM32F7_I2CTIMEOSEC=0
+CONFIG_STM32F7_I2CTIMEOMS=500
+CONFIG_STM32F7_I2CTIMEOTICKS=500
+# CONFIG_STM32F7_I2C_DUTY16_9 is not set
+
+#
+# SD/MMC Configuration
+#
+CONFIG_STM32F7_SDMMC_DMA=y
+
+#
+# SDMMC1 Configuration
+#
+CONFIG_STM32F7_SDMMC1_DMAPRIO=0x00010000
+# CONFIG_SDMMC1_WIDTH_D1_ONLY is not set
+# CONFIG_STM32F7_HAVE_RTC_COUNTER is not set
+# CONFIG_STM32F7_HAVE_RTC_SUBSECONDS is not set
+# CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32F7_DTCMEXCLUDE is not set
+CONFIG_STM32F7_DMACAPABLE=y
+
+#
+# Timer Configuration
+#
+
+#
+# ADC Configuration
+#
+# CONFIG_STM32F7_ADC1_DMA is not set
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+CONFIG_ARCH_DMA=y
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=43103
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=2600
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20010000
+CONFIG_RAM_SIZE=245760
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_STM32F746_WS=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="stm32f746-ws"
+
+#
+# Common Board Options
+#
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+CONFIG_BOARDCTL_USBDEVCTRL=y
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_USEC_PER_TICK=1000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=12
+CONFIG_START_DAY=6
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_SPINLOCK is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=0
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=24
+CONFIG_MAX_TASKS=32
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+CONFIG_SCHED_INSTRUMENTATION=y
+# CONFIG_SCHED_INSTRUMENTATION_PREEMPTION is not set
+# CONFIG_SCHED_INSTRUMENTATION_CSECTION is not set
+# CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS is not set
+CONFIG_SCHED_INSTRUMENTATION_BUFFER=y
+CONFIG_SCHED_NOTE_BUFSIZE=512
+CONFIG_SCHED_NOTE_GET=2048
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=4
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=5000
+CONFIG_SCHED_HPWORKSTACKSIZE=1800
+CONFIG_SCHED_LPWORK=y
+CONFIG_SCHED_LPNTHREADS=1
+CONFIG_SCHED_LPWORKPRIORITY=50
+CONFIG_SCHED_LPWORKPERIOD=50000
+CONFIG_SCHED_LPWORKSTACKSIZE=1800
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=2500
+CONFIG_USERMAIN_STACKSIZE=2500
+CONFIG_PTHREAD_STACK_MIN=512
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+CONFIG_I2C=y
+# CONFIG_I2C_SLAVE is not set
+# CONFIG_I2C_POLLED is not set
+CONFIG_I2C_RESET=y
+# CONFIG_I2C_TRACE is not set
+CONFIG_I2C_DRIVER=y
+CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0"
+# CONFIG_TIMERS_CS2100CP is not set
+CONFIG_ANALOG=y
+CONFIG_ADC=y
+CONFIG_ADC_FIFOSIZE=8
+# CONFIG_ADC_ADS1242 is not set
+# CONFIG_ADC_ADS125X is not set
+# CONFIG_ADC_PGA11X is not set
+# CONFIG_DAC is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+CONFIG_MMCSD=y
+CONFIG_MMCSD_NSLOTS=1
+# CONFIG_MMCSD_READONLY is not set
+CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
+# CONFIG_MMCSD_MMCSUPPORT is not set
+CONFIG_MMCSD_HAVECARDDETECT=y
+# CONFIG_MMCSD_SPI is not set
+CONFIG_ARCH_HAVE_SDIO=y
+CONFIG_SDIO_DMA=y
+CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y
+CONFIG_MMCSD_SDIO=y
+CONFIG_SDIO_PREFLIGHT=y
+# CONFIG_SDIO_MUXBUS is not set
+# CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
+# CONFIG_SDIO_BLOCKSETUP is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+CONFIG_PIPES=y
+CONFIG_DEV_PIPE_MAXSIZE=1024
+CONFIG_DEV_PIPE_SIZE=1024
+CONFIG_DEV_FIFO_SIZE=1024
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+CONFIG_USART6_SERIALDRIVER=y
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART6_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART6 Configuration
+#
+CONFIG_USART6_RXBUFSIZE=256
+CONFIG_USART6_TXBUFSIZE=256
+CONFIG_USART6_BAUD=115200
+CONFIG_USART6_BITS=8
+CONFIG_USART6_PARITY=0
+CONFIG_USART6_2STOP=0
+# CONFIG_USART6_IFLOWCONTROL is not set
+# CONFIG_USART6_OFLOWCONTROL is not set
+# CONFIG_USART6_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+CONFIG_USBDEV=y
+
+#
+# USB Device Controller Driver Options
+#
+# CONFIG_USBDEV_ISOCHRONOUS is not set
+# CONFIG_USBDEV_DUALSPEED is not set
+CONFIG_USBDEV_SELFPOWERED=y
+# CONFIG_USBDEV_BUSPOWERED is not set
+CONFIG_USBDEV_MAXPOWER=100
+# CONFIG_USBDEV_DMA is not set
+# CONFIG_ARCH_USBDEV_STALLQUEUE is not set
+# CONFIG_USBDEV_TRACE is not set
+
+#
+# USB Device Class Driver Options
+#
+# CONFIG_USBDEV_COMPOSITE is not set
+# CONFIG_PL2303 is not set
+CONFIG_CDCACM=y
+# CONFIG_CDCACM_CONSOLE is not set
+CONFIG_CDCACM_EP0MAXPACKET=64
+CONFIG_CDCACM_EPINTIN=1
+CONFIG_CDCACM_EPINTIN_FSSIZE=64
+CONFIG_CDCACM_EPINTIN_HSSIZE=512
+CONFIG_CDCACM_EPBULKOUT=3
+CONFIG_CDCACM_EPBULKOUT_FSSIZE=64
+CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
+CONFIG_CDCACM_EPBULKIN=2
+CONFIG_CDCACM_EPBULKIN_FSSIZE=64
+CONFIG_CDCACM_EPBULKIN_HSSIZE=512
+CONFIG_CDCACM_NRDREQS=4
+CONFIG_CDCACM_NWRREQS=4
+CONFIG_CDCACM_BULKIN_REQLEN=96
+CONFIG_CDCACM_RXBUFSIZE=257
+CONFIG_CDCACM_TXBUFSIZE=193
+CONFIG_CDCACM_VENDORID=0x0525
+CONFIG_CDCACM_PRODUCTID=0xa4a7
+CONFIG_CDCACM_VENDORSTR="NuttX"
+CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
+# CONFIG_USBMSC is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+CONFIG_FS_READABLE=y
+CONFIG_FS_WRITABLE=y
+# CONFIG_FS_AIO is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+CONFIG_FS_FAT=y
+CONFIG_FAT_LCNAMES=y
+CONFIG_FAT_LFN=y
+CONFIG_FAT_MAXFNAME=32
+# CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
+CONFIG_FAT_DMAMEMORY=y
+CONFIG_FAT_DIRECT_RETRY=y
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=3
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+CONFIG_GRAN=y
+# CONFIG_GRAN_SINGLE is not set
+CONFIG_GRAN_INTR=y
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
+# CONFIG_LIBM is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+CONFIG_LIBC_STRERROR=y
+# CONFIG_LIBC_STRERROR_SHORT is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_MEMSET_OPTSPEED is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+CONFIG_C99_BOOL8=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_ADC is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CPUHOG is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_PIPE is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=128
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=12
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=8
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+# CONFIG_NSH_DISABLE_DATE is not set
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFATFS is not set
+# CONFIG_NSH_DISABLE_MKFIFO is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PSSTACKUSAGE is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_FILEIOSIZE=512
+# CONFIG_NSH_STRERROR is not set
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_USBCONSOLE is not set
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+CONFIG_SYSTEM_CDCACM=y
+CONFIG_SYSTEM_CDCACM_DEVMINOR=0
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+CONFIG_SYSTEM_I2CTOOL=y
+CONFIG_I2CTOOL_MINBUS=1
+CONFIG_I2CTOOL_MAXBUS=1
+CONFIG_I2CTOOL_MINADDR=0x03
+CONFIG_I2CTOOL_MAXADDR=0x77
+CONFIG_I2CTOOL_MAXREGADDR=0xff
+CONFIG_I2CTOOL_DEFFREQ=100000
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_STACKMONITOR is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f746-ws/nsh/setenv.sh b/configs/stm32f746-ws/nsh/setenv.sh
new file mode 100644
index 0000000000000000000000000000000000000000..2d66398c3b4c4dab424a14e031582bbec50bb6e4
--- /dev/null
+++ b/configs/stm32f746-ws/nsh/setenv.sh
@@ -0,0 +1,77 @@
+#!/bin/bash
+# configs/stm32f746-ws/nsh/setenv.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the Atmel GCC
+# toolchain under Windows.  You will also have to edit this if you install
+# this toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Users/Public/tools/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/nucleo-144/scripts/flash.ld b/configs/stm32f746-ws/scripts/flash.ld
similarity index 99%
rename from configs/nucleo-144/scripts/flash.ld
rename to configs/stm32f746-ws/scripts/flash.ld
index 90e589ed8abf06d52d43c6f7810dc02fa7dd326e..09378918de5150b8b938b3f0014e37a721deb5ad 100644
--- a/configs/nucleo-144/scripts/flash.ld
+++ b/configs/stm32f746-ws/scripts/flash.ld
@@ -1,5 +1,5 @@
 /****************************************************************************
- * configs/nucleo-144/scripts/flash.ld
+ * configs/stm32f746-ws/scripts/flash.ld
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/configs/stm32f746-ws/scripts/kernel-space.ld b/configs/stm32f746-ws/scripts/kernel-space.ld
new file mode 100644
index 0000000000000000000000000000000000000000..8d471a57ba4f2ea4dcdbd3b8f911940d4738e1a1
--- /dev/null
+++ b/configs/stm32f746-ws/scripts/kernel-space.ld
@@ -0,0 +1,109 @@
+/****************************************************************************
+ * configs/stm32f746-ws/scripts/kernel-space.ld
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* NOTE:  This depends on the memory.ld script having been included prior to
+ * this script.
+ */
+
+OUTPUT_ARCH(arm)
+ENTRY(_stext)
+SECTIONS
+{
+    .text : {
+        _stext = ABSOLUTE(.);
+        *(.vectors)
+        *(.text .text.*)
+        *(.fixup)
+        *(.gnu.warning)
+        *(.rodata .rodata.*)
+        *(.gnu.linkonce.t.*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.got)
+        *(.gcc_except_table)
+        *(.gnu.linkonce.r.*)
+        _etext = ABSOLUTE(.);
+    } > kflash
+
+    .init_section : {
+        _sinit = ABSOLUTE(.);
+        *(.init_array .init_array.*)
+        _einit = ABSOLUTE(.);
+    } > kflash
+
+    .ARM.extab : {
+        *(.ARM.extab*)
+    } > kflash
+
+    __exidx_start = ABSOLUTE(.);
+    .ARM.exidx : {
+        *(.ARM.exidx*)
+    } > kflash
+
+    __exidx_end = ABSOLUTE(.);
+
+    _eronly = ABSOLUTE(.);
+
+    .data : {
+        _sdata = ABSOLUTE(.);
+        *(.data .data.*)
+        *(.gnu.linkonce.d.*)
+        CONSTRUCTORS
+        _edata = ABSOLUTE(.);
+    } > ksram AT > kflash
+
+    .bss : {
+        _sbss = ABSOLUTE(.);
+        *(.bss .bss.*)
+        *(.gnu.linkonce.b.*)
+        *(COMMON)
+        _ebss = ABSOLUTE(.);
+    } > ksram
+
+    /* Stabs debugging sections */
+
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+    .stab.excl 0 : { *(.stab.excl) }
+    .stab.exclstr 0 : { *(.stab.exclstr) }
+    .stab.index 0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment 0 : { *(.comment) }
+    .debug_abbrev 0 : { *(.debug_abbrev) }
+    .debug_info 0 : { *(.debug_info) }
+    .debug_line 0 : { *(.debug_line) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/stm32f746-ws/scripts/memory.ld b/configs/stm32f746-ws/scripts/memory.ld
new file mode 100644
index 0000000000000000000000000000000000000000..7371dc061ba3e5dbc9081a4ac1e55dffdf08d109
--- /dev/null
+++ b/configs/stm32f746-ws/scripts/memory.ld
@@ -0,0 +1,129 @@
+/****************************************************************************
+ * configs/stm32f746-ws/scripts/memory.ld
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* The STM32F746NGH6 has 1024Kb of main FLASH memory.  This FLASH memory can
+ * be accessed from either the AXIM interface at address 0x0800:0000 or from
+ * the ITCM interface at address 0x0020:0000.
+ *
+ * Additional information, including the option bytes, is available at at
+ * FLASH at address 0x1ff0:0000 (AXIM) or 0x0010:0000 (ITCM).
+ *
+ * In the STM32F746NGH6, two different boot spaces can be selected through
+ * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
+ * BOOT_ADD1 option bytes:
+ *
+ *   1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
+ *      ST programmed value: Flash on ITCM at 0x0020:0000
+ *   2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
+ *      ST programmed value: System bootloader at 0x0010:0000
+ *
+ * NuttX does not modify these option byes.  On the unmodified STM32F746G
+ * DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot
+ * to address 0x0020:0000 in ITCM FLASH.
+ *
+ * The STM32F746NGH6 also has 320Kb of data SRAM (in addition to ITCM SRAM).
+ * SRAM is split up into three blocks:
+ *
+ *   1)  64Kb of DTCM SRM beginning at address 0x2000:0000
+ *   2) 240Kb of SRAM1 beginning at address 0x2001:0000
+ *   3)  16Kb of SRAM2 beginning at address 0x2004:c000
+ *
+ * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
+ * where the code expects to begin execution by jumping to the entry point in
+ * the 0x0800:0000 address range.
+ *
+ * For MPU support, the kernel-mode NuttX section is assumed to be 128Kb of
+ * FLASH and 4Kb of SRAM.  That is an excessive amount for the kernel which
+ * should fit into 64KB and, of course, can be optimized as needed (See
+ * also configs/stm32f746g-disco/scripts/kernel-space.ld).  Allowing the
+ * additional does permit addition debug instrumentation to be added to the
+ * kernel space without overflowing the partition.
+ *
+ * Alignment of the user space FLASH partition is also a critical factor:
+ * The user space FLASH partition will be spanned with a single region of
+ * size 2**n bytes.  The alignment of the user-space region must be the same.
+ * As a consequence, as the user-space increases in size, the alignment
+ * requirement also increases.
+ *
+ * This alignment requirement means that the largest user space FLASH region
+ * you can have will be 512KB at it would have to be positioned at
+ * 0x08800000.  If you change this address, don't forget to change the
+ * CONFIG_NUTTX_USERSPACE configuration setting to match and to modify
+ * the check in kernel/userspace.c.
+ *
+ * For the same reasons, the maximum size of the SRAM mapping is limited to
+ * 4KB.  Both of these alignment limitations could be reduced by using
+ * multiple regions to map the FLASH/SDRAM range or perhaps with some
+ * clever use of subregions.
+ *
+ * A detailed memory map for the 112KB SRAM region is as follows:
+ *
+ *   0x20001 0000:  Kernel .data region.  Typical size: 0.1KB
+ *   ------- ----   Kernel .bss  region.  Typical size: 1.8KB
+ *   0x20001 0800:  Kernel IDLE thread stack (approximate).  Size is
+ *                  determined by CONFIG_IDLETHREAD_STACKSIZE and
+ *                  adjustments for alignment.  Typical is 1KB.
+ *   ------- ----   Padded to 4KB
+ *   0x20001 1000:  User .data region.  Size is variable.
+ *   ------- ----   User .bss region  Size is variable.
+ *   0x20001 2000:  Beginning of kernel heap.  Size determined by
+ *                  CONFIG_MM_KERNEL_HEAPSIZE.
+ *   ------- ----   Beginning of user heap.  Can vary with other settings.
+ *   0x20004 c000:  End+1 of SRAM1
+ */
+
+MEMORY
+{
+	/* ITCM boot address */
+
+	itcm  (rwx) : ORIGIN = 0x00200000, LENGTH = 1024K
+
+	/* 1024KB FLASH */
+
+	kflash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
+	uflash (rx) : ORIGIN = 0x08020000, LENGTH = 128K
+	xflash (rx) : ORIGIN = 0x08040000, LENGTH = 768K
+
+	/* 240KB of contiguous SRAM1 */
+
+	ksram (rwx) : ORIGIN = 0x20010000, LENGTH = 4K
+	usram (rwx) : ORIGIN = 0x20011000, LENGTH = 4K
+	xsram (rwx) : ORIGIN = 0x20012000, LENGTH = 240K - 8K
+
+    /* DTCM SRAM */
+
+	dtcm  (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
+	sram2 (rwx) : ORIGIN = 0x2004c000, LENGTH = 16K
+}
diff --git a/configs/stm32f746-ws/scripts/user-space.ld b/configs/stm32f746-ws/scripts/user-space.ld
new file mode 100644
index 0000000000000000000000000000000000000000..ebf30ef9da948eb2a46bb4a9b0bc092b67005914
--- /dev/null
+++ b/configs/stm32f746-ws/scripts/user-space.ld
@@ -0,0 +1,111 @@
+/****************************************************************************
+ * configs/stm32f746-ws/scripts/user-space.ld
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* NOTE:  This depends on the memory.ld script having been included prior to
+ * this script.
+ */
+
+OUTPUT_ARCH(arm)
+SECTIONS
+{
+    .userspace : {
+        *(.userspace)
+    } > uflash
+
+    .text : {
+        _stext = ABSOLUTE(.);
+        *(.text .text.*)
+        *(.fixup)
+        *(.gnu.warning)
+        *(.rodata .rodata.*)
+        *(.gnu.linkonce.t.*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.got)
+        *(.gcc_except_table)
+        *(.gnu.linkonce.r.*)
+        _etext = ABSOLUTE(.);
+    } > uflash
+
+    .init_section : {
+        _sinit = ABSOLUTE(.);
+        *(.init_array .init_array.*)
+        _einit = ABSOLUTE(.);
+    } > uflash
+
+    .ARM.extab : {
+        *(.ARM.extab*)
+    } > uflash
+
+    __exidx_start = ABSOLUTE(.);
+    .ARM.exidx : {
+        *(.ARM.exidx*)
+    } > uflash
+
+    __exidx_end = ABSOLUTE(.);
+
+    _eronly = ABSOLUTE(.);
+
+    .data : {
+        _sdata = ABSOLUTE(.);
+        *(.data .data.*)
+        *(.gnu.linkonce.d.*)
+        CONSTRUCTORS
+        _edata = ABSOLUTE(.);
+    } > usram AT > uflash
+
+    .bss : {
+        _sbss = ABSOLUTE(.);
+        *(.bss .bss.*)
+        *(.gnu.linkonce.b.*)
+        *(COMMON)
+        _ebss = ABSOLUTE(.);
+    } > usram
+
+    /* Stabs debugging sections */
+
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+    .stab.excl 0 : { *(.stab.excl) }
+    .stab.exclstr 0 : { *(.stab.exclstr) }
+    .stab.index 0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment 0 : { *(.comment) }
+    .debug_abbrev 0 : { *(.debug_abbrev) }
+    .debug_info 0 : { *(.debug_info) }
+    .debug_line 0 : { *(.debug_line) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/stm32f746-ws/src/.gitignore b/configs/stm32f746-ws/src/.gitignore
new file mode 100644
index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b
--- /dev/null
+++ b/configs/stm32f746-ws/src/.gitignore
@@ -0,0 +1,2 @@
+/.depend
+/Make.dep
diff --git a/configs/stm32f746-ws/src/Makefile b/configs/stm32f746-ws/src/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..4096729548c837343451e3200800e6daa9c63412
--- /dev/null
+++ b/configs/stm32f746-ws/src/Makefile
@@ -0,0 +1,53 @@
+############################################################################
+# configs/stm32f746-ws/src/Makefile
+#
+#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+ASRCS =
+CSRCS = stm32_boot.c stm32_spi.c stm32_dma_alloc.c
+
+ifeq ($(CONFIG_LIB_BOARDCTL),y)
+CSRCS += stm32_appinitialize.c
+endif
+
+ifeq ($(CONFIG_STM32F7_OTGFS),y)
+CSRCS += stm32_usb.c
+endif
+
+ifeq ($(CONFIG_STM32F7_SDMMC1),y)
+CSRCS += stm32_sdmmc.c
+endif
+
+include $(TOPDIR)/configs/Board.mk
diff --git a/configs/stm32f746-ws/src/stm32_appinitialize.c b/configs/stm32f746-ws/src/stm32_appinitialize.c
new file mode 100644
index 0000000000000000000000000000000000000000..8079b43f69ef48bc654fa70ecb6af22ff97321e8
--- /dev/null
+++ b/configs/stm32f746-ws/src/stm32_appinitialize.c
@@ -0,0 +1,117 @@
+/****************************************************************************
+ * config/stm32f746-ws/src/stm32_appinitilaize.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *   Author: Mark Olsson 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "stm32f746-ws.h"
+#include "stm32_i2c.h"
+
+static void stm32_i2c_register(int bus)
+{
+  FAR struct i2c_master_s *i2c;
+  int ret;
+
+  i2c = stm32_i2cbus_initialize(bus);
+  if (i2c == NULL)
+    {
+      serr("ERROR: Failed to get I2C%d interface\n", bus);
+    }
+  else
+    {
+      ret = i2c_register(i2c, bus);
+      if (ret < 0)
+        {
+          serr("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
+          stm32_i2cbus_uninitialize(i2c);
+        }
+    }
+}
+
+static void stm32_i2ctool(void)
+{
+  stm32_i2c_register(1);
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ *   Perform application specific initialization.  This function is never
+ *   called directly from application code, but only indirectly via the
+ *   (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ ****************************************************************************/
+
+int board_app_initialize(void)
+{
+  /* Register I2C drivers on behalf of the I2C tool */
+
+  stm32_i2ctool();
+
+#if defined(CONFIG_FAT_DMAMEMORY)
+  if (stm32_dma_alloc_init() < 0)
+    {
+      syslog(LOG_ERR, "DMA alloc FAILED");
+    }
+#endif
+
+#ifdef CONFIG_STM32F7_SDMMC1
+  /* Initialize the SDIO block driver */
+
+  int ret = OK;
+
+  ret = stm32_sdio_initialize();
+  if (ret != OK)
+    {
+      ferr("ERROR: Failed to initialize MMC/SD driver: %d\n", ret);
+      return ret;
+    }
+#endif
+
+  return OK;
+}
diff --git a/configs/stm32f746-ws/src/stm32_boot.c b/configs/stm32f746-ws/src/stm32_boot.c
new file mode 100644
index 0000000000000000000000000000000000000000..3b2821100544e3ee2505c1e0d970b0c3113cb5b9
--- /dev/null
+++ b/configs/stm32f746-ws/src/stm32_boot.c
@@ -0,0 +1,105 @@
+/************************************************************************************
+ * configs/stm32f746-ws/src/stm32_boot.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+
+#include "up_arch.h"
+#include "stm32f746-ws.h"
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.  This entry point
+ *   is called early in the initialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void stm32_boardinitialize(void)
+{
+#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \
+    defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \
+    defined(CONFIG_STM32F7_SPI5) || defined(CONFIG_STM32F7_SPI6)
+  /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
+   * stm32_spidev_initialize() has been brought into the link.
+   */
+
+  if (stm32_spidev_initialize)
+    {
+      stm32_spidev_initialize();
+    }
+#endif
+}
+
+/************************************************************************************
+ * Name: board_initialize
+ *
+ * Description:
+ *   If CONFIG_BOARD_INITIALIZE is selected, then an additional initialization call
+ *   will be performed in the boot-up sequence to a function called
+ *   board_initialize().  board_initialize() will be called immediately after
+ *   up_initialize() is called and just before the initial application is started.
+ *   This additional initialization phase may be used, for example, to initialize
+ *   board-specific device drivers.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_BOARD_INITIALIZE
+void board_initialize(void)
+{
+#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL)
+  /* Perform NSH initialization here instead of from the NSH.  This
+   * alternative NSH initialization is necessary when NSH is ran in user-space
+   * but the initialization function must run in kernel space.
+   */
+
+  (void)board_app_initialize();
+#endif
+}
+#endif
diff --git a/configs/stm32f746-ws/src/stm32_dma_alloc.c b/configs/stm32f746-ws/src/stm32_dma_alloc.c
new file mode 100644
index 0000000000000000000000000000000000000000..e6d2744529a0abe50b987ce3860612a3c9443434
--- /dev/null
+++ b/configs/stm32f746-ws/src/stm32_dma_alloc.c
@@ -0,0 +1,117 @@
+/****************************************************************************
+ * configs/nucleo-144/stc/stm32_dma_alloc.c
+ *
+ *   Copyright (C) 2016 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "stm32f746-ws.h"
+
+#if defined(CONFIG_FAT_DMAMEMORY)
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#if !defined(CONFIG_GRAN)
+#  error microSD DMA support requires CONFIG_GRAN
+#endif
+
+#define BOARD_DMA_ALLOC_POOL_SIZE (8*512)
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+static GRAN_HANDLE dma_allocator;
+
+/* The DMA heap size constrains the total number of things that can be
+ * ready to do DMA at a time.
+ *
+ * For example, FAT DMA depends on one sector-sized buffer per filesystem plus
+ * one sector-sized buffer per file.
+ *
+ * We use a fundamental alignment / granule size of 64B; this is sufficient
+ * to guarantee alignment for the largest STM32 DMA burst (16 beats x 32bits).
+ */
+
+static uint8_t g_dma_heap[BOARD_DMA_ALLOC_POOL_SIZE] __attribute__((aligned(64)));
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_dma_alloc_init
+ *
+ * Description:
+ *   All boards may optionally provide this API to instantiate a pool of
+ *   memory for uses with FAST FS DMA operations.
+ *
+ ************************************************************************************/
+
+int stm32_dma_alloc_init(void)
+{
+  dma_allocator = gran_initialize(g_dma_heap,
+                                  sizeof(g_dma_heap),
+                                  7,  /* 128B granule - must be > alignment (XXX bug?) */
+                                  6); /* 64B alignment */
+
+  if (dma_allocator == NULL)
+    {
+      return -ENOMEM;
+    }
+
+  return OK;
+}
+
+/* DMA-aware allocator stubs for the FAT filesystem. */
+
+void *fat_dma_alloc(size_t size)
+{
+  return gran_alloc(dma_allocator, size);
+}
+
+void fat_dma_free(FAR void *memory, size_t size)
+{
+  gran_free(dma_allocator, memory, size);
+}
+
+#endif /* CONFIG_FAT_DMAMEMORY */
diff --git a/configs/stm32f746-ws/src/stm32_sdmmc.c b/configs/stm32f746-ws/src/stm32_sdmmc.c
new file mode 100644
index 0000000000000000000000000000000000000000..daca5a160ffe9df67a06fd3766a59cb5a13a7bae
--- /dev/null
+++ b/configs/stm32f746-ws/src/stm32_sdmmc.c
@@ -0,0 +1,172 @@
+/****************************************************************************
+ * config/stm32f746-ws/src/stm32_sdmmc.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "stm32_sdmmc.h"
+#include "stm32f746-ws.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* Configuration ************************************************************/
+
+/* Card detections requires card support and a card detection GPIO */
+
+#define HAVE_NCD   1
+#if !defined(HAVE_SDIO) || !defined(GPIO_SDIO_NCD)
+#  undef HAVE_NCD
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static FAR struct sdio_dev_s *g_sdio_dev;
+#ifdef HAVE_NCD
+static bool g_sd_inserted = 0xff; /* Impossible value */
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_ncd_interrupt
+ *
+ * Description:
+ *   Card detect interrupt handler.
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_NCD
+static int stm32_ncd_interrupt(int irq, FAR void *context)
+{
+  bool present;
+
+  present = !stm32_gpioread(GPIO_SDIO_NCD);
+  if (present != g_sd_inserted)
+    {
+      sdio_mediachange(g_sdio_dev, present);
+      g_sd_inserted = present;
+    }
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_sdio_initialize
+ *
+ * Description:
+ *   Initialize SDIO-based MMC/SD card support
+ *
+ ****************************************************************************/
+
+int stm32_sdio_initialize(void)
+{
+  int ret;
+
+#ifdef HAVE_NCD
+  /* Card detect */
+
+  bool cd_status;
+
+  /* Configure the card detect GPIO */
+
+  stm32_configgpio(GPIO_SDIO_NCD);
+
+  /* Register an interrupt handler for the card detect pin */
+
+  (void)stm32_gpiosetevent(GPIO_SDIO_NCD, true, true, true,
+                           stm32_ncd_interrupt, NULL);
+#endif
+
+  /* Mount the SDIO-based MMC/SD block driver */
+  /* First, get an instance of the SDIO interface */
+
+  finfo("Initializing SDIO slot %d\n", SDIO_SLOTNO);
+
+  g_sdio_dev = sdio_initialize(SDIO_SLOTNO);
+  if (!g_sdio_dev)
+    {
+      ferr("ERROR: Failed to initialize SDIO slot %d\n", SDIO_SLOTNO);
+      return -ENODEV;
+    }
+
+  /* Now bind the SDIO interface to the MMC/SD driver */
+
+  finfo("Bind SDIO to the MMC/SD driver, minor=%d\n", SDIO_MINOR);
+
+  ret = mmcsd_slotinitialize(SDIO_MINOR, g_sdio_dev);
+  if (ret != OK)
+    {
+      ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
+      return ret;
+    }
+
+  finfo("Successfully bound SDIO to the MMC/SD driver\n");
+
+#ifdef HAVE_NCD
+  /* Use SD card detect pin to check if a card is g_sd_inserted */
+
+  cd_status = !stm32_gpioread(GPIO_SDIO_NCD);
+  finfo("Card detect : %d\n", cd_status);
+
+  sdio_mediachange(g_sdio_dev, cd_status);
+#else
+  /* Assume that the SD card is inserted.  What choice do we have? */
+
+  sdio_mediachange(g_sdio_dev, true);
+#endif
+
+  return OK;
+}
diff --git a/configs/stm32f746-ws/src/stm32_spi.c b/configs/stm32f746-ws/src/stm32_spi.c
new file mode 100644
index 0000000000000000000000000000000000000000..517ea3761b2f430c4c24aafee988084f34b7749a
--- /dev/null
+++ b/configs/stm32f746-ws/src/stm32_spi.c
@@ -0,0 +1,240 @@
+/************************************************************************************
+ * configs/nucleo-144/src/stm32_spi.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "up_arch.h"
+#include "chip.h"
+#include "stm32_spi.h"
+
+#include "stm32f746-ws.h"
+
+#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \
+    defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \
+    defined(CONFIG_STM32F7_SPI5) || defined(CONFIG_STM32F7_SPI6)
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_spidev_initialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins for the stm32f746g-disco board.
+ *
+ ************************************************************************************/
+
+void weak_function stm32_spidev_initialize(void)
+{
+}
+
+/****************************************************************************
+ * Name:  stm32_spi1-6 select and stm32_spi1-6 status
+ *
+ * Description:
+ *   The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
+ *   provided by board-specific logic.  They are implementations of the select
+ *   and status methods of the SPI interface defined by struct spi_ops_s (see
+ *   include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize())
+ *   are provided by common STM32 logic.  To use this common SPI logic on your
+ *   board:
+ *
+ *   1. Provide logic in stm32_boardinitialize() to configure SPI chip select
+ *      pins.
+ *   2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
+ *      board-specific logic.  These functions will perform chip selection and
+ *      status operations using GPIOs in the way your board is configured.
+ *   3. Add a calls to stm32_spibus_initialize() in your low level application
+ *      initialization logic
+ *   4. The handle returned by stm32_spibus_initialize() may then be used to bind the
+ *      SPI driver to higher level logic (e.g., calling
+ *      mmcsd_spislotinitialize(), for example, will bind the SPI driver to
+ *      the SPI MMC/SD driver).
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32F7_SPI1
+void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+}
+
+uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  return 0;
+}
+#endif
+
+#ifdef CONFIG_STM32F7_SPI2
+void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+}
+
+uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  return 0;
+}
+#endif
+
+#ifdef CONFIG_STM32F7_SPI3
+void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+}
+
+uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  return 0;
+}
+#endif
+
+#ifdef CONFIG_STM32F7_SPI4
+void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+}
+
+uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  return 0;
+}
+#endif
+
+#ifdef CONFIG_STM32F7_SPI5
+void stm32_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+}
+
+uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  return 0;
+}
+#endif
+
+#ifdef CONFIG_STM32F7_SPI6
+void stm32_spi6select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+}
+
+uint8_t stm32_spi6status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  return 0;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_spi1cmddata
+ *
+ * Description:
+ *   Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true)
+ *   or command (false). This function must be provided by platform-specific
+ *   logic. This is an implementation of the cmddata method of the SPI
+ *   interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
+ *
+ * Input Parameters:
+ *
+ *   spi - SPI device that controls the bus the device that requires the CMD/
+ *         DATA selection.
+ *   devid - If there are multiple devices on the bus, this selects which one
+ *         to select cmd or data.  NOTE:  This design restricts, for example,
+ *         one one SPI display per SPI bus.
+ *   cmd - true: select command; false: select data
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI_CMDDATA
+#ifdef CONFIG_STM32F7_SPI1
+int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
+{
+  return -ENODEV;
+}
+#endif
+
+#ifdef CONFIG_STM32F7_SPI2
+int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
+{
+  return -ENODEV;
+}
+#endif
+
+#ifdef CONFIG_STM32F7_SPI3
+int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
+{
+  return -ENODEV;
+}
+#endif
+
+#ifdef CONFIG_STM32F7_SPI4
+int stm32_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
+{
+  return -ENODEV;
+}
+#endif
+
+#ifdef CONFIG_STM32F7_SPI5
+int stm32_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
+{
+  return -ENODEV;
+}
+#endif
+
+#ifdef CONFIG_STM32F7_SPI6
+int stm32_spi6cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
+{
+  return -ENODEV;
+}
+#endif
+
+#endif /* CONFIG_SPI_CMDDATA */
+#endif /* CONFIG_STM32F7_SPI1 || ... CONFIG_STM32F7_SPI6 */
diff --git a/configs/stm32f746-ws/src/stm32_usb.c b/configs/stm32f746-ws/src/stm32_usb.c
new file mode 100644
index 0000000000000000000000000000000000000000..a2985140b32665ab5160d91b28d3719206c06087
--- /dev/null
+++ b/configs/stm32f746-ws/src/stm32_usb.c
@@ -0,0 +1,341 @@
+/************************************************************************************
+ * configs/stm32f4discovery/src/stm32_usb.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "up_arch.h"
+#include "stm32_otg.h"
+#include "stm32_gpio.h"
+#include "stm32f746-ws.h"
+
+#ifdef CONFIG_STM32F7_OTGFS
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST)
+#  define HAVE_USB 1
+#else
+#  warning "CONFIG_STM32F7_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST"
+#  undef HAVE_USB
+#endif
+
+#ifndef CONFIG_STM32F7F4DISCO_USBHOST_PRIO
+#  define CONFIG_STM32F7F4DISCO_USBHOST_PRIO 100
+#endif
+
+#ifndef CONFIG_STM32F7F4DISCO_USBHOST_STACKSIZE
+#  define CONFIG_STM32F7F4DISCO_USBHOST_STACKSIZE 1024
+#endif
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+#ifdef CONFIG_USBHOST
+static struct usbhost_connection_s *g_usbconn;
+#endif
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: usbhost_waiter
+ *
+ * Description:
+ *   Wait for USB devices to be connected.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_USBHOST
+static int usbhost_waiter(int argc, char *argv[])
+{
+  struct usbhost_hubport_s *hport;
+
+  uinfo("Running\n");
+  for (;;)
+    {
+      /* Wait for the device to change state */
+
+      DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
+      uinfo("%s\n", hport->connected ? "connected" : "disconnected");
+
+      /* Did we just become connected? */
+
+      if (hport->connected)
+        {
+          /* Yes.. enumerate the newly connected device */
+
+          (void)CONN_ENUMERATE(g_usbconn, hport);
+        }
+    }
+
+  /* Keep the compiler from complaining */
+
+  return 0;
+}
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_usbinitialize
+ *
+ * Description:
+ *   Called from stm32_usbinitialize very early in inialization to setup USB-related
+ *   GPIO pins for the STM32F4Discovery board.
+ *
+ ************************************************************************************/
+
+void stm32_usbinitialize(void)
+{
+  /* The OTG FS has an internal soft pull-up.  No GPIO configuration is required */
+
+  /* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
+
+#ifdef CONFIG_STM32F7_OTGFS
+  stm32_configgpio(GPIO_OTGFS_VBUS);
+
+#ifdef CONFIG_USBHOST
+  stm32_configgpio(GPIO_OTGFS_PWRON);
+  stm32_configgpio(GPIO_OTGFS_OVER);
+#endif
+#endif
+}
+
+/***********************************************************************************
+ * Name: stm32_usbhost_initialize
+ *
+ * Description:
+ *   Called at application startup time to initialize the USB host functionality.
+ *   This function will start a thread that will monitor for device
+ *   connection/disconnection events.
+ *
+ ***********************************************************************************/
+
+#ifdef CONFIG_USBHOST
+int stm32_usbhost_initialize(void)
+{
+  int pid;
+#if defined(CONFIG_USBHOST_HUB)    || defined(CONFIG_USBHOST_MSC) || \
+    defined(CONFIG_USBHOST_HIDKBD) || defined(CONFIG_USBHOST_HIDMOUSE)
+  int ret;
+#endif
+
+  /* First, register all of the class drivers needed to support the drivers
+   * that we care about:
+   */
+
+  uinfo("Register class drivers\n");
+
+#ifdef CONFIG_USBHOST_HUB
+  /* Initialize USB hub class support */
+
+  ret = usbhost_hub_initialize();
+  if (ret < 0)
+    {
+      uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_MSC
+  /* Register the USB mass storage class class */
+
+  ret = usbhost_msc_initialize();
+  if (ret != OK)
+    {
+      uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_CDCACM
+  /* Register the CDC/ACM serial class */
+
+  ret = usbhost_cdcacm_initialize();
+  if (ret != OK)
+    {
+      uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_HIDKBD
+  /* Initialize the HID keyboard class */
+
+  ret = usbhost_kbdinit();
+  if (ret != OK)
+    {
+      uerr("ERROR: Failed to register the HID keyboard class\n");
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_HIDMOUSE
+  /* Initialize the HID mouse class */
+
+  ret = usbhost_mouse_init();
+  if (ret != OK)
+    {
+      uerr("ERROR: Failed to register the HID mouse class\n");
+    }
+#endif
+
+  /* Then get an instance of the USB host interface */
+
+  uinfo("Initialize USB host\n");
+  g_usbconn = stm32_otgfshost_initialize(0);
+  if (g_usbconn)
+    {
+      /* Start a thread to handle device connection. */
+
+      uinfo("Start usbhost_waiter\n");
+
+      pid = task_create("usbhost", CONFIG_STM32F7F4DISCO_USBHOST_PRIO,
+                        CONFIG_STM32F7F4DISCO_USBHOST_STACKSIZE,
+                        (main_t)usbhost_waiter, (FAR char * const *)NULL);
+      return pid < 0 ? -ENOEXEC : OK;
+    }
+
+  return -ENODEV;
+}
+#endif
+
+/***********************************************************************************
+ * Name: stm32_usbhost_vbusdrive
+ *
+ * Description:
+ *   Enable/disable driving of VBUS 5V output.  This function must be provided be
+ *   each platform that implements the STM32 OTG FS host interface
+ *
+ *   "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
+ *    or, if 5 V are available on the application board, a basic power switch, must
+ *    be added externally to drive the 5 V VBUS line. The external charge pump can
+ *    be driven by any GPIO output. When the application decides to power on VBUS
+ *    using the chosen GPIO, it must also set the port power bit in the host port
+ *    control and status register (PPWR bit in OTG_FS_HPRT).
+ *
+ *   "The application uses this field to control power to this port, and the core
+ *    clears this bit on an overcurrent condition."
+ *
+ * Input Parameters:
+ *   iface - For future growth to handle multiple USB host interface.  Should be zero.
+ *   enable - true: enable VBUS power; false: disable VBUS power
+ *
+ * Returned Value:
+ *   None
+ *
+ ***********************************************************************************/
+
+#ifdef CONFIG_USBHOST
+void stm32_usbhost_vbusdrive(int iface, bool enable)
+{
+  DEBUGASSERT(iface == 0);
+
+  if (enable)
+    {
+      /* Enable the Power Switch by driving the enable pin low */
+
+      stm32_gpiowrite(GPIO_OTGFS_PWRON, false);
+    }
+  else
+    {
+      /* Disable the Power Switch by driving the enable pin high */
+
+      stm32_gpiowrite(GPIO_OTGFS_PWRON, true);
+    }
+}
+#endif
+
+/************************************************************************************
+ * Name: stm32_setup_overcurrent
+ *
+ * Description:
+ *   Setup to receive an interrupt-level callback if an overcurrent condition is
+ *   detected.
+ *
+ * Input Parameter:
+ *   handler - New overcurrent interrupt handler
+ *   arg     - The argument provided for the interrupt handler
+ *
+ * Returned value:
+ *   Zero (OK) is returned on success.  Otherwise, a negated errno value is returned
+ *   to indicate the nature of the failure.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_USBHOST
+int stm32_setup_overcurrent(xcpt_t handler, void *arg)
+{
+  return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler, arg);
+}
+#endif
+
+/************************************************************************************
+ * Name:  stm32_usbsuspend
+ *
+ * Description:
+ *   Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is
+ *   used.  This function is called whenever the USB enters or leaves suspend mode.
+ *   This is an opportunity for the board logic to shutdown clocks, power, etc.
+ *   while the USB is suspended.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_USBDEV
+void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
+{
+  uinfo("resume: %d\n", resume);
+}
+#endif
+
+#endif /* CONFIG_STM32F7_OTGFS */
diff --git a/configs/stm32f746-ws/src/stm32f746-ws.h b/configs/stm32f746-ws/src/stm32f746-ws.h
new file mode 100644
index 0000000000000000000000000000000000000000..681ceb3068b32e90b9aaf75d722cbebe3bc589e7
--- /dev/null
+++ b/configs/stm32f746-ws/src/stm32f746-ws.h
@@ -0,0 +1,139 @@
+/****************************************************************************************************
+ * configs/stm32f746-ws/src/stm32f746-ws.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *   Author: Mark Olsson 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __CONFIGS_STM32F746_WS_SRC_STM32F746_WS_H
+#define __CONFIGS_STM32F746_WS_SRC_STM32F746_WS_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include 
+#include 
+#include 
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+/* procfs File System */
+
+#ifdef CONFIG_FS_PROCFS
+#  ifdef CONFIG_NSH_PROC_MOUNTPOINT
+#    define STM32_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT
+#  else
+#    define STM32_PROCFS_MOUNTPOINT "/proc"
+#  endif
+#endif
+
+/* STM32F736G Discovery GPIOs ***********************************************************************/
+/* The STM32F746G-DISCO board has numerous LEDs but only one, LD1 located near the reset button, that
+ * can be controlled by software (LD2 is a power indicator, LD3-6 indicate USB status, LD7 is
+ * controlled by the ST-Link).
+ *
+ * LD1 is controlled by PI1 which is also the SPI2_SCK at the Arduino interface. One end of LD1 is
+ * grounded so a high output on PI1 will illuminate the LED.
+ */
+
+#define GPIO_LD1           (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
+                            GPIO_PORTB | GPIO_PIN0)
+#define GPIO_LD2           (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
+                            GPIO_PORTB | GPIO_PIN7)
+#define GPIO_LD3           (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
+                            GPIO_PORTB | GPIO_PIN14)
+
+#define LED_DRIVER_PATH "/dev/userleds"
+
+/* Pushbutton B1, labelled "User", is connected to GPIO PC13.  A high value will be sensed when the
+ * button is depressed. Note that the EXTI interrupt is configured.
+ */
+
+#define GPIO_BTN_USER      (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTC | GPIO_PIN13)
+
+#define GPIO_OTGFS_VBUS    (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
+                            GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN9)
+
+#define SDIO_SLOTNO        0
+#define SDIO_MINOR         0
+
+/****************************************************************************************************
+ * Public data
+ ****************************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************************************
+ * Public Functions
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Name: stm32_spidev_initialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins for the stm32f746g-disco board.
+ *
+ ****************************************************************************************************/
+
+void weak_function stm32_spidev_initialize(void);
+
+/****************************************************************************
+ * Name: stm32_sdio_initialize
+ *
+ * Description:
+ *   Initialize SDIO-based MMC/SD card support
+ *
+ ****************************************************************************/
+
+#if !defined(CONFIG_DISABLE_MOUNTPOINT) && defined(CONFIG_STM32F7_SDMMC1)
+int stm32_sdio_initialize(void);
+#endif
+
+/************************************************************************************
+ * Name: stm32_dma_alloc_init
+ *
+ * Description:
+ *   Called to create a FAT DMA allocator
+ *
+ * Returned Value:
+ *   0 on success or -ENOMEM
+ *
+ ************************************************************************************/
+
+#if defined (CONFIG_FAT_DMAMEMORY)
+int stm32_dma_alloc_init(void);
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __CONFIGS_STM32F746_WS_SRC_STM32F746_WS_H */
diff --git a/configs/stm32f746g-disco/README.txt b/configs/stm32f746g-disco/README.txt
index eff9a8035361f392e30f98023752ecbfaf3bff30..47dc3a646888c57a43dddd0b9944cc0d6d2eaef8 100644
--- a/configs/stm32f746g-disco/README.txt
+++ b/configs/stm32f746g-disco/README.txt
@@ -49,14 +49,6 @@ STATUS
   2015-07-20:  STM32 F7 Ethernet appears to be functional, but has had
     only light testing.
 
-  2015-07-21:  Added a protected build version of the NSH configuration
-    (called knsh).  That configuration is close:  It boots, but I get
-    a hard fault each time I do the NSH "help" command.  Everything else
-    works fine.  I am thinking this is a corrupted binary; I am thinking
-    that there is a bad pointer in the command table.  But this is hard
-    to prove but possible because the steps to produce and load the
-    binary are awkward.
-
 Development Environment
 =======================
 
@@ -416,7 +408,7 @@ STM32F746G-DISCO-specific Configuration Options
     CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32F7_CAN2 is defined.
     CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
     CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
-    CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+    CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
       dump of all CAN registers.
 
   STM32F746G-DISCO SPI Configuration
@@ -431,10 +423,9 @@ STM32F746G-DISCO-specific Configuration Options
 
     CONFIG_SDIO_DMA - Support DMA data transfers.  Requires CONFIG_STM32F7_SDIO
       and CONFIG_STM32F7_DMA2.
-    CONFIG_SDIO_PRI - Select SDIO interrupt prority.  Default: 128
-    CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
+    CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
       Default:  Medium
-    CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode.  Default:
+    CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode.  Default:
       4-bit transfer mode.
 
   STM32 USB OTG FS Host Driver Support
@@ -459,9 +450,9 @@ STM32F746G-DISCO-specific Configuration Options
    CONFIG_STM32F7_OTGFS_SOFINTR - Enable SOF interrupts.  Why would you ever
      want to do that?
    CONFIG_STM32F7_USBHOST_REGDEBUG - Enable very low-level register access
-     debug.  Depends on CONFIG_DEBUG.
+     debug.  Depends on CONFIG_DEBUG_FEATURES.
    CONFIG_STM32F7_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
-     packets. Depends on CONFIG_DEBUG.
+     packets. Depends on CONFIG_DEBUG_FEATURES.
 
 Configurations
 ==============
@@ -535,136 +526,6 @@ Configurations
 Configuration Directories
 -------------------------
 
-  kostest:
-  -------
-    This is identical to the nsh configuration below except that NuttX is
-    built as a kernel-mode, monolithic module and the user applications are
-    built separately.  Is is recommended to use a special make command;
-    not just 'make' but make with the following two arguments:
-
-        make pass1 pass2
-
-    In the normal case (just 'make'), make will attempt to build both user-
-    and kernel-mode blobs more or less interleaved.  This actual works!
-    However, for me it is very confusing so I prefer the above make command:
-    Make the user-space binaries first (pass1), then make the kernel-space
-    binaries (pass2)
-
-    NOTES:
-
-    1. At the end of the build, there will be several files in the top-level
-       NuttX build directory:
-
-       PASS1:
-         nuttx_user.elf    - The pass1 user-space ELF file
-         nuttx_user.hex    - The pass1 Intel HEX format file (selected in defconfig)
-         User.map          - Symbols in the user-space ELF file
-
-       PASS2:
-         nuttx             - The pass2 kernel-space ELF file
-         nuttx.hex         - The pass2 Intel HEX file (selected in defconfig)
-         System.map        - Symbols in the kernel-space ELF file
-
-    2. Combining .hex files.  If you plan to use the STM32 ST-Link Utility to
-       load the .hex files into FLASH, then you need to combine the two hex
-       files into a single .hex file.  Here is how you can do that.
-
-       a. The 'tail' of the nuttx.hex file should look something like this
-          (with my comments added):
-
-            $ tail nuttx.hex
-            # 00, data records
-            ...
-            :10 9DC0 00 01000000000800006400020100001F0004
-            :10 9DD0 00 3B005A0078009700B500D400F300110151
-            :08 9DE0 00 30014E016D0100008D
-            # 05, Start Linear Address Record
-            :04 0000 05 0800 0419 D2
-            # 01, End Of File record
-            :00 0000 01 FF
-
-          Use an editor such as vi to remove the 05 and 01 records.
-
-       b. The 'head' of the nuttx_user.hex file should look something like
-          this (again with my comments added):
-
-            $ head nuttx_user.hex
-            # 04, Extended Linear Address Record
-            :02 0000 04 0801 F1
-            # 00, data records
-            :10 8000 00 BD89 01084C800108C8110208D01102087E
-            :10 8010 00 0010 00201C1000201C1000203C16002026
-            :10 8020 00 4D80 01085D80010869800108ED83010829
-            ...
-
-          Nothing needs to be done here.  The nuttx_user.hex file should
-          be fine.
-
-       c. Combine the edited nuttx.hex and un-edited nuttx_user.hex
-          file to produce a single combined hex file:
-
-          $ cat nuttx.hex nuttx_user.hex >combined.hex
-
-       Then use the combined.hex file with the STM32 ST-Link tool.  The
-       mbed interface does not seem to except .hex files, but you can
-       also convert the .hex file to binary with this command:
-
-         arm-none-eabi-objcopy.exe -I ihex -O binary combined.hex combined.bin
-
-       If you do this a lot, you will probably want to invest a little time
-       to develop a tool to automate these steps.
-
-  netnsh:
-  ------
-    This is a NetShell (NSH) very similar to the nsh configuration described
-    below.  It differs in that it has networking enabled.
-
-    NOTES:
-
-    1. Both IPv4 and IPv6 protocoals are enabled.  Fixed IP addresses are
-       used.  The default configurationi target has these IP address:
-
-       IPv4: 10.0.0.2
-       IPv6: fc00::2
-
-       These are, of course, easily changes by reconfiguring via 'make
-       menuconfig'
-
-    2. UDP, TCIP/IP, ARP, ICMP, and ICMPv6 are also enabled.
-
-    3. NSH offers several network oriented commands such as:  ipconfig,
-       ifup, ifdown, ping, and ping6.
-
-    4. Telnet sessions are supported.  You can start a Telnet session from
-       any host on the network using a command like:
-
-         $ telnet 10.0.0.2
-         Trying 10.0.0.2...
-         Connected to 10.0.0.2.
-         Escape character is '^]'.
-
-         NuttShell (NSH) NuttX-7.10
-         nsh> help
-         help usage:  help [-v] []
-
-           [           dd          hexdump     mb          ping6       sleep
-           ?           echo        ifconfig    mkdir       ps          test
-           break       exec        ifdown      mkfifo      pwd         true
-           cat         exit        ifup        mh          rm          uname
-           cd          false       kill        mv          rmdir       unset
-           cp          free        losetup     mw          set         usleep
-           cmp         help        ls          ping        sh          xd
-
-         Builtin Apps:
-         nsh>
-
-       Under either Linux or Cygwin
-
-    5. The PHY address is either 0 or 1, depending on the state of the
-       LAN8720 RXER/PHYAD0 when the hardware is reset.  That connects to the
-       STM32 F7 via PG2. PG2 is not controlled but appears to result in a
-       PHY address of 0.
-
   nsh:
   ---
     Configures the NuttShell (NSH) located at apps/examples/nsh.  The
diff --git a/configs/stm32f746g-disco/include/board.h b/configs/stm32f746g-disco/include/board.h
index 6e9da62de0b5bdd63f9a5a506beaaf240b21105c..9482371499081834a456f8cb2c0fdb9973411458 100644
--- a/configs/stm32f746g-disco/include/board.h
+++ b/configs/stm32f746g-disco/include/board.h
@@ -154,6 +154,53 @@
 #define STM32_OTGFS_FREQUENCY   (STM32_VCO_FREQUENCY / 10)
 #endif
 
+/* Configure factors for  PLLSAI clock */
+
+#define STM32_RCC_PLLSAICFGR_PLLSAIN    RCC_PLLSAICFGR_PLLSAIN(192)
+#define STM32_RCC_PLLSAICFGR_PLLSAIP    RCC_PLLSAICFGR_PLLSAIP(2)
+#define STM32_RCC_PLLSAICFGR_PLLSAIQ    RCC_PLLSAICFGR_PLLSAIQ(2)
+#define STM32_RCC_PLLSAICFGR_PLLSAIR    RCC_PLLSAICFGR_PLLSAIR(2)
+
+/* Configure Dedicated Clock Configuration Register */
+
+#define STM32_RCC_DCKCFGR1_PLLI2SDIVQ  RCC_DCKCFGR1_PLLI2SDIVQ(1)
+#define STM32_RCC_DCKCFGR1_PLLSAIDIVQ  RCC_DCKCFGR1_PLLSAIDIVQ(1)
+#define STM32_RCC_DCKCFGR1_PLLSAIDIVR  RCC_DCKCFGR1_PLLSAIDIVR(0)
+#define STM32_RCC_DCKCFGR1_SAI1SRC     RCC_DCKCFGR1_SAI1SEL(0)
+#define STM32_RCC_DCKCFGR1_SAI2SRC     RCC_DCKCFGR1_SAI2SEL(0)
+#define STM32_RCC_DCKCFGR1_TIMPRESRC   0
+#define STM32_RCC_DCKCFGR1_DFSDM1SRC   0
+#define STM32_RCC_DCKCFGR1_ADFSDM1SRC  0
+
+
+
+/* Configure factors for  PLLI2S clock */
+
+#define STM32_RCC_PLLI2SCFGR_PLLI2SN   RCC_PLLI2SCFGR_PLLI2SN(192)
+#define STM32_RCC_PLLI2SCFGR_PLLI2SP   RCC_PLLI2SCFGR_PLLI2SP(2)
+#define STM32_RCC_PLLI2SCFGR_PLLI2SQ   RCC_PLLI2SCFGR_PLLI2SQ(2)
+#define STM32_RCC_PLLI2SCFGR_PLLI2SR   RCC_PLLI2SCFGR_PLLI2SR(2)
+
+/* Configure Dedicated Clock Configuration Register 2 */
+
+#define STM32_RCC_DCKCFGR2_USART1SRC  RCC_DCKCFGR2_USART1SEL_APB
+#define STM32_RCC_DCKCFGR2_USART2SRC  RCC_DCKCFGR2_USART2SEL_APB
+#define STM32_RCC_DCKCFGR2_UART4SRC   RCC_DCKCFGR2_UART4SEL_APB
+#define STM32_RCC_DCKCFGR2_UART5SRC   RCC_DCKCFGR2_UART5SEL_APB
+#define STM32_RCC_DCKCFGR2_USART6SRC  RCC_DCKCFGR2_USART6SEL_APB
+#define STM32_RCC_DCKCFGR2_UART7SRC   RCC_DCKCFGR2_UART7SEL_APB
+#define STM32_RCC_DCKCFGR2_UART8SRC   RCC_DCKCFGR2_UART8SEL_APB
+#define STM32_RCC_DCKCFGR2_I2C1SRC    RCC_DCKCFGR2_I2C1SEL_HSI
+#define STM32_RCC_DCKCFGR2_I2C2SRC    RCC_DCKCFGR2_I2C2SEL_HSI
+#define STM32_RCC_DCKCFGR2_I2C3SRC    RCC_DCKCFGR2_I2C3SEL_HSI
+#define STM32_RCC_DCKCFGR2_I2C4SRC    RCC_DCKCFGR2_I2C4SEL_HSI
+#define STM32_RCC_DCKCFGR2_LPTIM1SRC  RCC_DCKCFGR2_LPTIM1SEL_APB
+#define STM32_RCC_DCKCFGR2_CECSRC     RCC_DCKCFGR2_CECSEL_HSI
+#define STM32_RCC_DCKCFGR2_CK48MSRC   RCC_DCKCFGR2_CK48MSEL_PLLSAI
+#define STM32_RCC_DCKCFGR2_SDMMCSRC   RCC_DCKCFGR2_SDMMCSEL_48MHZ
+#define STM32_RCC_DCKCFGR2_SDMMC2SRC  RCC_DCKCFGR2_SDMMC2SEL_48MHZ
+#define STM32_RCC_DCKCFGR2_DSISRC     RCC_DCKCFGR2_DSISEL_48MHZ
+
 /* Several prescalers allow the configuration of the two AHB buses, the
  * high-speed APB (APB2) and the low-speed APB (APB1) domains. The maximum
  * frequency of the two AHB buses is 216 MHz while the maximum frequency of
diff --git a/configs/stm32f746g-disco/nsh/Make.defs b/configs/stm32f746g-disco/nsh/Make.defs
index 608dd2a00bb922675fbc0f67ee995f13df01bbb8..cb8ea0725108964ccccfb85417a81249911d2fdc 100644
--- a/configs/stm32f746g-disco/nsh/Make.defs
+++ b/configs/stm32f746g-disco/nsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32f746g-disco/nsh/defconfig b/configs/stm32f746g-disco/nsh/defconfig
index fdac7f8dd688c6062131c1f8a23611167aa8fda0..8d24e4b5ee94b17e7bc1e51d9c638830992197e3 100644
--- a/configs/stm32f746g-disco/nsh/defconfig
+++ b/configs/stm32f746g-disco/nsh/defconfig
@@ -46,10 +46,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 CONFIG_DEBUG_NOOPT=y
@@ -63,8 +65,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,10 +77,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -98,6 +99,7 @@ CONFIG_ARCH="arm"
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 CONFIG_ARCH_CHIP_STM32F7=y
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -119,14 +121,16 @@ CONFIG_ARCH_CORTEXM7=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="stm32f7"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
 CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 CONFIG_ARMV7M_CMNVECTOR=y
 # CONFIG_ARMV7M_LAZYFPU is not set
 CONFIG_ARCH_HAVE_FPU=y
-CONFIG_ARCH_HAVE_DPFPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
 # CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
@@ -142,34 +146,134 @@ CONFIG_ARMV7M_HAVE_ITCM=y
 CONFIG_ARMV7M_HAVE_DTCM=y
 # CONFIG_ARMV7M_ITCM is not set
 CONFIG_ARMV7M_DTCM=y
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set
-# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
-CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set
 CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARMV7M_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 # CONFIG_SERIAL_TERMIOS is not set
+# CONFIG_USART6_RS485 is not set
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
 
 #
 # STM32 F7 Configuration Options
 #
-# CONFIG_ARCH_CHIP_STM32F745 is not set
-CONFIG_ARCH_CHIP_STM32F746=y
-# CONFIG_ARCH_CHIP_STM32F756 is not set
+# CONFIG_ARCH_CHIP_STM32F745VG is not set
+# CONFIG_ARCH_CHIP_STM32F745VE is not set
+# CONFIG_ARCH_CHIP_STM32F745IG is not set
+# CONFIG_ARCH_CHIP_STM32F745IE is not set
+# CONFIG_ARCH_CHIP_STM32F745ZE is not set
+# CONFIG_ARCH_CHIP_STM32F745ZG is not set
+# CONFIG_ARCH_CHIP_STM32F746BG is not set
+# CONFIG_ARCH_CHIP_STM32F746VG is not set
+# CONFIG_ARCH_CHIP_STM32F746VE is not set
+# CONFIG_ARCH_CHIP_STM32F746BE is not set
+# CONFIG_ARCH_CHIP_STM32F746ZG is not set
+# CONFIG_ARCH_CHIP_STM32F746IE is not set
+CONFIG_ARCH_CHIP_STM32F746NG=y
+# CONFIG_ARCH_CHIP_STM32F746NE is not set
+# CONFIG_ARCH_CHIP_STM32F746ZE is not set
+# CONFIG_ARCH_CHIP_STM32F746IG is not set
+# CONFIG_ARCH_CHIP_STM32F756NG is not set
+# CONFIG_ARCH_CHIP_STM32F756BG is not set
+# CONFIG_ARCH_CHIP_STM32F756IG is not set
+# CONFIG_ARCH_CHIP_STM32F756VG is not set
+# CONFIG_ARCH_CHIP_STM32F756ZG is not set
+# CONFIG_ARCH_CHIP_STM32F765NI is not set
+# CONFIG_ARCH_CHIP_STM32F765VI is not set
+# CONFIG_ARCH_CHIP_STM32F765VG is not set
+# CONFIG_ARCH_CHIP_STM32F765BI is not set
+# CONFIG_ARCH_CHIP_STM32F765NG is not set
+# CONFIG_ARCH_CHIP_STM32F765ZG is not set
+# CONFIG_ARCH_CHIP_STM32F765ZI is not set
+# CONFIG_ARCH_CHIP_STM32F765IG is not set
+# CONFIG_ARCH_CHIP_STM32F765BG is not set
+# CONFIG_ARCH_CHIP_STM32F765II is not set
+# CONFIG_ARCH_CHIP_STM32F767NG is not set
+# CONFIG_ARCH_CHIP_STM32F767IG is not set
+# CONFIG_ARCH_CHIP_STM32F767VG is not set
+# CONFIG_ARCH_CHIP_STM32F767ZG is not set
+# CONFIG_ARCH_CHIP_STM32F767NI is not set
+# CONFIG_ARCH_CHIP_STM32F767VI is not set
+# CONFIG_ARCH_CHIP_STM32F767BG is not set
+# CONFIG_ARCH_CHIP_STM32F767ZI is not set
+# CONFIG_ARCH_CHIP_STM32F767II is not set
+# CONFIG_ARCH_CHIP_STM32F769BI is not set
+# CONFIG_ARCH_CHIP_STM32F769II is not set
+# CONFIG_ARCH_CHIP_STM32F769BG is not set
+# CONFIG_ARCH_CHIP_STM32F769NI is not set
+# CONFIG_ARCH_CHIP_STM32F769AI is not set
+# CONFIG_ARCH_CHIP_STM32F769NG is not set
+# CONFIG_ARCH_CHIP_STM32F769IG is not set
+# CONFIG_ARCH_CHIP_STM32F777ZI is not set
+# CONFIG_ARCH_CHIP_STM32F777VI is not set
+# CONFIG_ARCH_CHIP_STM32F777NI is not set
+# CONFIG_ARCH_CHIP_STM32F777BI is not set
+# CONFIG_ARCH_CHIP_STM32F777II is not set
+# CONFIG_ARCH_CHIP_STM32F778AI is not set
+# CONFIG_ARCH_CHIP_STM32F779II is not set
+# CONFIG_ARCH_CHIP_STM32F779NI is not set
+# CONFIG_ARCH_CHIP_STM32F779BI is not set
+# CONFIG_ARCH_CHIP_STM32F779AI is not set
 CONFIG_STM32F7_STM32F74XX=y
 # CONFIG_STM32F7_STM32F75XX is not set
-# CONFIG_STM32F7_FLASH_512KB is not set
-CONFIG_STM32F7_FLASH_1024KB=y
+# CONFIG_STM32F7_STM32F76XX is not set
+# CONFIG_STM32F7_STM32F77XX is not set
+# CONFIG_STM32F7_IO_CONFIG_V is not set
+# CONFIG_STM32F7_IO_CONFIG_I is not set
+# CONFIG_STM32F7_IO_CONFIG_Z is not set
+CONFIG_STM32F7_IO_CONFIG_N=y
+# CONFIG_STM32F7_IO_CONFIG_B is not set
+# CONFIG_STM32F7_IO_CONFIG_A is not set
+# CONFIG_STM32F7_STM32F745XX is not set
+CONFIG_STM32F7_STM32F746XX=y
+# CONFIG_STM32F7_STM32F756XX is not set
+# CONFIG_STM32F7_STM32F765XX is not set
+# CONFIG_STM32F7_STM32F767XX is not set
+# CONFIG_STM32F7_STM32F768XX is not set
+# CONFIG_STM32F7_STM32F768AX is not set
+# CONFIG_STM32F7_STM32F769XX is not set
+# CONFIG_STM32F7_STM32F769AX is not set
+# CONFIG_STM32F7_STM32F777XX is not set
+# CONFIG_STM32F7_STM32F778XX is not set
+# CONFIG_STM32F7_STM32F778AX is not set
+# CONFIG_STM32F7_STM32F779XX is not set
+# CONFIG_STM32F7_STM32F779AX is not set
+# CONFIG_STM32F7_FLASH_CONFIG_E is not set
+# CONFIG_STM32F7_FLASH_CONFIG_I is not set
+CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT=y
+# CONFIG_STM32F7_FLASH_OVERRIDE_E is not set
+# CONFIG_STM32F7_FLASH_OVERRIDE_G is not set
+# CONFIG_STM32F7_FLASH_OVERRIDE_I is not set
 
 #
 # STM32 Peripheral Support
 #
 CONFIG_STM32F7_HAVE_LTDC=y
+CONFIG_STM32F7_HAVE_FSMC=y
+CONFIG_STM32F7_HAVE_ETHRNET=y
+CONFIG_STM32F7_HAVE_RNG=y
+CONFIG_STM32F7_HAVE_SPI5=y
+CONFIG_STM32F7_HAVE_SPI6=y
+# CONFIG_STM32F7_HAVE_SDMMC2 is not set
+# CONFIG_STM32F7_HAVE_ADC1_DMA is not set
+# CONFIG_STM32F7_HAVE_ADC2_DMA is not set
+# CONFIG_STM32F7_HAVE_ADC3_DMA is not set
+# CONFIG_STM32F7_HAVE_CAN3 is not set
+CONFIG_STM32F7_HAVE_DCMI=y
+# CONFIG_STM32F7_HAVE_DSIHOST is not set
+CONFIG_STM32F7_HAVE_DMA2D=y
+# CONFIG_STM32F7_HAVE_JPEG is not set
+# CONFIG_STM32F7_HAVE_CRYP is not set
+# CONFIG_STM32F7_HAVE_HASH is not set
+# CONFIG_STM32F7_HAVE_DFSDM1 is not set
 # CONFIG_STM32F7_ADC is not set
 # CONFIG_STM32F7_CAN is not set
 # CONFIG_STM32F7_DAC is not set
@@ -177,6 +281,7 @@ CONFIG_STM32F7_HAVE_LTDC=y
 # CONFIG_STM32F7_I2C is not set
 # CONFIG_STM32F7_SAI is not set
 # CONFIG_STM32F7_SPI is not set
+# CONFIG_STM32F7_TIM is not set
 CONFIG_STM32F7_USART=y
 # CONFIG_STM32F7_ADC1 is not set
 # CONFIG_STM32F7_ADC2 is not set
@@ -186,25 +291,26 @@ CONFIG_STM32F7_USART=y
 # CONFIG_STM32F7_CAN2 is not set
 # CONFIG_STM32F7_CEC is not set
 # CONFIG_STM32F7_CRC is not set
-# CONFIG_STM32F7_CRYP is not set
 # CONFIG_STM32F7_DMA1 is not set
 # CONFIG_STM32F7_DMA2 is not set
 # CONFIG_STM32F7_DAC1 is not set
 # CONFIG_STM32F7_DAC2 is not set
 # CONFIG_STM32F7_DCMI is not set
+# CONFIG_STM32F7_DMA2D is not set
 # CONFIG_STM32F7_ETHMAC is not set
 # CONFIG_STM32F7_FSMC is not set
 # CONFIG_STM32F7_I2C1 is not set
 # CONFIG_STM32F7_I2C2 is not set
 # CONFIG_STM32F7_I2C3 is not set
+# CONFIG_STM32F7_I2C4 is not set
 # CONFIG_STM32F7_LPTIM1 is not set
 # CONFIG_STM32F7_LTDC is not set
-# CONFIG_STM32F7_DMA2D is not set
 # CONFIG_STM32F7_OTGFS is not set
 # CONFIG_STM32F7_OTGHS is not set
 # CONFIG_STM32F7_QUADSPI is not set
-# CONFIG_STM32F7_SAI1 is not set
+# CONFIG_STM32F7_PWR is not set
 # CONFIG_STM32F7_RNG is not set
+# CONFIG_STM32F7_SAI1 is not set
 # CONFIG_STM32F7_SAI2 is not set
 # CONFIG_STM32F7_SDMMC1 is not set
 # CONFIG_STM32F7_SPDIFRX is not set
@@ -228,7 +334,6 @@ CONFIG_STM32F7_USART=y
 # CONFIG_STM32F7_TIM12 is not set
 # CONFIG_STM32F7_TIM13 is not set
 # CONFIG_STM32F7_TIM14 is not set
-# CONFIG_STM32F7_TIM15 is not set
 # CONFIG_STM32F7_USART1 is not set
 # CONFIG_STM32F7_USART2 is not set
 # CONFIG_STM32F7_USART3 is not set
@@ -239,7 +344,20 @@ CONFIG_STM32F7_USART6=y
 # CONFIG_STM32F7_UART8 is not set
 # CONFIG_STM32F7_IWDG is not set
 # CONFIG_STM32F7_WWDG is not set
+
+#
+# U[S]ART Configuration
+#
+# CONFIG_STM32F7_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32F7_USART_BREAKS is not set
+# CONFIG_STM32F7_HAVE_RTC_COUNTER is not set
+# CONFIG_STM32F7_HAVE_RTC_SUBSECONDS is not set
 # CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32F7_DTCMEXCLUDE is not set
+
+#
+# Timer Configuration
+#
 
 #
 # Architecture Options
@@ -315,11 +433,11 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 # CONFIG_ARCH_IRQBUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -338,6 +456,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2011
 CONFIG_START_MONTH=12
@@ -430,6 +549,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -449,9 +569,14 @@ CONFIG_SPI=y
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
@@ -465,8 +590,18 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -474,6 +609,7 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -482,9 +618,10 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -508,10 +645,6 @@ CONFIG_USART6_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -534,19 +667,25 @@ CONFIG_USART6_2STOP=0
 # CONFIG_USART6_IFLOWCONTROL is not set
 # CONFIG_USART6_OFLOWCONTROL is not set
 # CONFIG_USART6_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -584,12 +723,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -599,7 +732,7 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # Memory Management
 #
 # CONFIG_MM_SMALL is not set
-CONFIG_MM_REGIONS=2
+CONFIG_MM_REGIONS=3
 # CONFIG_ARCH_HAVE_HEAP2 is not set
 # CONFIG_GRAN is not set
 
@@ -654,14 +787,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -695,7 +831,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_BUTTONS is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -703,10 +838,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -716,35 +851,33 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -766,8 +899,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -778,6 +911,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -831,7 +965,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -853,6 +986,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -890,12 +1024,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -903,6 +1037,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32f746g-disco/src/stm32_autoleds.c b/configs/stm32f746g-disco/src/stm32_autoleds.c
index 47a1d45bbabc681be3f06634e9d3297f1e64dd63..3875d4a54f468b133a0c96775ee831d8265c25f4 100644
--- a/configs/stm32f746g-disco/src/stm32_autoleds.c
+++ b/configs/stm32f746g-disco/src/stm32_autoleds.c
@@ -49,22 +49,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/stm32f746g-disco/src/stm32_buttons.c b/configs/stm32f746g-disco/src/stm32_buttons.c
index 8578c0794ed4b4b8e575bd33f746828fbcf333cd..ec08616aa6cfe20d40e7edc218ef75b6399955bc 100644
--- a/configs/stm32f746g-disco/src/stm32_buttons.c
+++ b/configs/stm32f746g-disco/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/stm32f746g-disco/src/stm32_buttons.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,6 +39,8 @@
 
 #include 
 
+#include 
+
 #include 
 #include 
 
@@ -98,15 +100,15 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
 #warning Missing logic
+  return -ENOSYS;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/stm32f746g-disco/src/stm32_spi.c b/configs/stm32f746g-disco/src/stm32_spi.c
index 38f62be076b286563b301c8843d2594b6206c3ed..c2bea9894d613e1fc5bbaa331350665a14dbe7d3 100644
--- a/configs/stm32f746g-disco/src/stm32_spi.c
+++ b/configs/stm32f746g-disco/src/stm32_spi.c
@@ -57,31 +57,6 @@
     defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \
     defined(CONFIG_STM32F7_SPI5)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Data
- ************************************************************************************/
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -126,7 +101,7 @@ void weak_function stm32_spidev_initialize(void)
 #ifdef CONFIG_STM32F7_SPI1
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -138,7 +113,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32F7_SPI2
 void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -150,7 +125,7 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32F7_SPI3
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -162,7 +137,7 @@ uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32F7_SPI4
 void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -174,7 +149,7 @@ uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32F7_SPI5
 void stm32_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
diff --git a/configs/stm32f746g-disco/src/stm32_userleds.c b/configs/stm32f746g-disco/src/stm32_userleds.c
index f4d90b146b7a5c1d0a2d3b32ca94aed2afae5a21..4541668075cef28f198a1d2ca870a7db9de5b9cf 100644
--- a/configs/stm32f746g-disco/src/stm32_userleds.c
+++ b/configs/stm32f746g-disco/src/stm32_userleds.c
@@ -47,22 +47,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/stm32l476-mdk/Kconfig b/configs/stm32l476-mdk/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..5c3f42f6bdf72f14022cdbec5a3ef33b9d6742a1
--- /dev/null
+++ b/configs/stm32l476-mdk/Kconfig
@@ -0,0 +1,8 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_BOARD_STM32L476VG_MDK
+
+endif # ARCH_BOARD_STM32L476VG_MDK
diff --git a/configs/stm32l476-mdk/README.txt b/configs/stm32l476-mdk/README.txt
new file mode 100644
index 0000000000000000000000000000000000000000..8b60f0d0db12891918c69e354d22564d1e9d7d74
--- /dev/null
+++ b/configs/stm32l476-mdk/README.txt
@@ -0,0 +1,35 @@
+README
+======
+
+This README discusses issues unique to NuttX configurations for Motorola
+MDK.
+
+STM32L476ME:
+
+  Microprocessor: 32-bit ARM Cortex M4 at 80MHz STM32L476ME
+  Memory:         1024 KB Flash and 96+32 KB SRAM
+  ADC:            3x12-bit, 2.4 MSPS A/D converter: up to 24 channels
+  DMA:            16-stream DMA controllers with FIFOs and burst support
+  Timers:         Up to 11 timers: up to eight 16-bit, two 32-bit timers, two
+                  watchdog timers, and a SysTick timer
+  GPIO:           Up to 51 I/O ports with interrupt capability
+  I2C:            Up to 3 x I2C interfaces
+  USARTs:         Up to 3 USARTs, 2 UARTs, 1 LPUART
+  SPIs:           Up to 3 SPIs
+  SAIs:           Up to 2 dual-channel audio interfaces
+  CAN interface
+  SDIO interface (not connected)
+  QSPI interface (not connected)
+  USB:            USB 2.0 full-speed device/host/OTG controller with on-chip PHY
+  CRC calculation unit
+  RTC
+
+Flashing:
+
+The MDK has a builtin FTDI to support flashing from openocd.  There are a few extensions
+to openocd that haven't been integrated upstream yet.  To flash (or debug) the MDK, you
+will need the code from:
+	git clone https://github.com/MotorolaMobilityLLC/openocd
+
+After building, you can flash with the following command:
+	openocd -f board/moto_mdk_muc.cfg -c "program nuttx.bin 0x08000000 reset exit"
diff --git a/configs/stm32l476-mdk/include/board.h b/configs/stm32l476-mdk/include/board.h
new file mode 100644
index 0000000000000000000000000000000000000000..39f0e861ef706fbcc1c44d2781d8fbe744fe63ef
--- /dev/null
+++ b/configs/stm32l476-mdk/include/board.h
@@ -0,0 +1,155 @@
+/************************************************************************************
+ * configs/stm32l476-mdk/include/board.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Motorola Mobility, LLC.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __CONFIGS_STM32L476_MDK_INCLUDE_BOARD_H
+#define __CONFIGS_STM32L476_MDK_INCLUDE_BOARD_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#ifndef __ASSEMBLY__
+# include 
+#endif
+
+#include 
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Clocking *************************************************************************/
+
+#include 
+
+/* DMA Channel/Stream Selections ****************************************************/
+/* Stream selections are arbitrary for now but might become important in the future
+ * is we set aside more DMA channels/streams.
+ */
+
+/* Alternate function pin selections ************************************************/
+
+/* USART1:
+ *   RXD: PB7
+ *   TXD: PA6
+ *
+ * these pins are shared with the I2C1, which is used for some onboard
+ * devices, so I am disabling USART1, however I'm leaving the declarations
+ * here for documentation for anyone who might want to use it instead of
+ * those onboard devices.
+ */
+
+/* USART */
+
+#define GPIO_USART1_CTS  GPIO_USART1_CTS_3   /* PG11 */
+#define GPIO_USART1_RTS  GPIO_USART1_RTS_DE_2  /* PB3  */
+#define GPIO_USART1_RX   GPIO_USART1_RX_2    /* PB7  */
+#define GPIO_USART1_TX   GPIO_USART1_TX_2    /* PB6  */
+
+#define GPIO_USART2_CTS  GPIO_USART2_CTS_1   /* PA0  */
+#define GPIO_USART2_RTS  GPIO_USART2_RTS_DE_1 /* PA1  */
+#define GPIO_USART2_RX   GPIO_USART2_RX_1    /* PA3  */
+#define GPIO_USART2_TX   GPIO_USART2_TX_1    /* PA2  */
+
+#define GPIO_USART3_RX   GPIO_USART3_RX_3    /* PC11 */
+#define GPIO_USART3_TX   GPIO_USART3_TX_3    /* PC10 */
+
+/* I2C */
+
+#define GPIO_I2C2_SCL    GPIO_I2C2_SCL_1     /* PB10 */
+#define GPIO_I2C2_SDA    GPIO_I2C2_SDA_1     /* PB11 */
+
+#define GPIO_I2C3_SCL    GPIO_I2C3_SCL_1     /* PC0  */
+#define GPIO_I2C3_SDA    GPIO_I2C3_SDA_1     /* PC1  */
+
+/* SPI */
+
+#define GPIO_SPI1_MISO   GPIO_SPI1_MISO_1    /* PA6  */
+#define GPIO_SPI1_MOSI   GPIO_SPI1_MOSI_1    /* PA7  */
+#define GPIO_SPI1_SCK    GPIO_SPI1_SCK_1     /* PA5  */
+#define GPIO_SPI1_NSS    GPIO_SPI1_NSS_1     /* PA4  */
+#define DMACHAN_SPI1_RX  DMACHAN_SPI1_RX_1
+#define DMACHAN_SPI1_TX  DMACHAN_SPI1_TX_1
+
+#define GPIO_SPI2_MISO   GPIO_SPI2_MISO_1    /* PB14 */
+#define GPIO_SPI2_MOSI   GPIO_SPI2_MOSI_1    /* PB15 */
+#define GPIO_SPI2_SCK    GPIO_SPI2_SCK_2     /* PB13 */
+#define GPIO_SPI2_NSS    GPIO_SPI2_NSS_2     /* PB12 */
+
+/* Buttons **************************************************************************/
+/* The board only has one button */
+
+#define BUTTON_POWER       0
+#define NUM_BUTTONS        1
+#define BUTTON_POWER_BIT   (1 << BUTTON_POWER)
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+/************************************************************************************
+ * Name: stm32l4_boardinitialize
+ *
+ * Description:
+ *   All STM32L4 architectures must provide the following entry point.  This entry
+ *   point is called early in the initialization -- after all memory has been
+ *   configured and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void stm32l4_boardinitialize(void);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif  /* __CONFIGS_STM32L476_MDK_INCLUDE_BOARD_H */
diff --git a/configs/stm32l476-mdk/include/stm32l476-mdk-clocking.h b/configs/stm32l476-mdk/include/stm32l476-mdk-clocking.h
new file mode 100644
index 0000000000000000000000000000000000000000..95df16a9591c47094c64a609a840cd84fb20d306
--- /dev/null
+++ b/configs/stm32l476-mdk/include/stm32l476-mdk-clocking.h
@@ -0,0 +1,302 @@
+/************************************************************************************
+ * configs/stm32l476-mdk/include/stm32l476-mdk-clocking.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Motorola Mobility, LLC. All rights reserved.
+ *   Author: dev@ziggurat29.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __CONFIGS_STM32L476_MDK_INCLUDE_STM32L476_MDK_CLOCKING_H
+#define __CONFIGS_STM32L476_MDK_INCLUDE_STM32L476_MDK_CLOCKING_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#ifndef __ASSEMBLY__
+# include 
+#endif
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Clocking *************************************************************************/
+
+/* HSI - 16 MHz RC factory-trimmed
+ * LSI - 32 KHz RC
+ * HSE - not installed
+ * LSE - not installed
+ */
+
+#define STM32L4_HSI_FREQUENCY     16000000ul
+#define STM32L4_LSI_FREQUENCY     32000
+#define STM32L4_LSE_FREQUENCY     32768
+
+#define BOARD_AHB_FREQUENCY       80000000ul
+
+/* XXX there needs to be independent selections for the System Clock Mux and
+ * the PLL Source Mux; currently System Clock Mux always is PLL, and PLL
+ * Source Mux is chosen by the following define.  This is probably OK in many
+ * cases, but should be separated to support other power configurations.
+ */
+
+#if 0
+#  define HSI_CLOCK_CONFIG          /* HSI-16 clock configuration */
+#else
+#  define MSI_CLOCK_CONFIG          /* MSI @ 4 MHz autotrimmed via LSE */
+#endif
+
+#if defined(HSI_CLOCK_CONFIG)
+
+#define STM32L4_BOARD_USEHSI           1
+
+/* Prescaler common to all PLL inputs; will be 1 (XXX source is implicitly
+ as per comment above HSI) */
+
+#define STM32L4_PLLCFG_PLLM             RCC_PLLCFG_PLLM(1)
+
+/* 'main' PLL config; we use this to generate our system clock via the R
+ *  output.  We set it up as 16 MHz / 1 * 10 / 2 = 80 MHz
+ *
+ * XXX NOTE:  currently the main PLL is implicitly turned on and is implicitly
+ * the system clock; this should be configurable since not all applications may
+ * want things done this way.
+ */
+
+#define STM32L4_PLLCFG_PLLN             RCC_PLLCFG_PLLN(10)
+#define STM32L4_PLLCFG_PLLP             0
+#undef  STM32L4_PLLCFG_PLLP_ENABLED
+#define STM32L4_PLLCFG_PLLQ             RCC_PLLCFG_PLLQ_2
+#define STM32L4_PLLCFG_PLLQ_ENABLED
+#define STM32L4_PLLCFG_PLLR             RCC_PLLCFG_PLLR_2
+#define STM32L4_PLLCFG_PLLR_ENABLED
+
+/* 'SAIPLL1' is used to generate the 48 MHz clock, since we can't
+ * do that with the main PLL's N value.  We set N = 13, and enable
+ * the Q output (ultimately for CLK48) with /4.  So,
+ * 16 MHz / 1 * 12 / 4 = 48 MHz
+ *
+ * XXX NOTE:  currently the SAIPLL /must/ be explicitly selected in the
+ * menuconfig, or else all this is a moot point, and the various 48 MHz
+ * peripherals will not work (RNG at present).  I would suggest removing
+ * that option from Kconfig altogether, and simply making it an option
+ * that is selected via a #define here, like all these other params.
+ */
+
+#define STM32L4_PLLSAI1CFG_PLLN         RCC_PLLSAI1CFG_PLLN(12)
+#define STM32L4_PLLSAI1CFG_PLLP         0
+#undef  STM32L4_PLLSAI1CFG_PLLP_ENABLED
+#define STM32L4_PLLSAI1CFG_PLLQ         RCC_PLLSAI1CFG_PLLQ_4
+#define STM32L4_PLLSAI1CFG_PLLQ_ENABLED
+#define STM32L4_PLLSAI1CFG_PLLR         0
+#undef  STM32L4_PLLSAI1CFG_PLLR_ENABLED
+
+/* 'SAIPLL2' is not used in this application */
+
+#define STM32L4_PLLSAI2CFG_PLLN         RCC_PLLSAI2CFG_PLLN(8)
+#define STM32L4_PLLSAI2CFG_PLLP         0
+#undef  STM32L4_PLLSAI2CFG_PLLP_ENABLED
+#define STM32L4_PLLSAI2CFG_PLLR         0
+#undef  STM32L4_PLLSAI2CFG_PLLR_ENABLED
+
+#define STM32L4_SYSCLK_FREQUENCY  80000000ul
+
+/* CLK48 will come from PLLSAI1 (implicitly Q) */
+
+#define STM32L4_USE_CLK48         1
+#define STM32L4_CLK48_SEL         RCC_CCIPR_CLK48SEL_PLLSAI1
+
+/* Enable the LSE oscillator, used automatically trim the MSI, and for RTC */
+
+#define STM32L4_USE_LSE           1
+
+/* AHB clock (HCLK) is SYSCLK (80MHz) */
+
+#define STM32L4_RCC_CFGR_HPRE     RCC_CFGR_HPRE_SYSCLK      /* HCLK  = SYSCLK / 1 */
+#define STM32L4_HCLK_FREQUENCY    STM32L4_SYSCLK_FREQUENCY
+#define STM32L4_BOARD_HCLK        STM32L4_HCLK_FREQUENCY    /* Same as above, to satisfy compiler */
+
+/* APB1 clock (PCLK1) is HCLK/1 (80MHz) */
+
+#define STM32L4_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLK       /* PCLK1 = HCLK / 1 */
+#define STM32L4_PCLK1_FREQUENCY   (STM32L4_HCLK_FREQUENCY/1)
+
+/* Timers driven from APB1 will be twice PCLK1 */
+/* REVISIT : this can be configured */
+
+#define STM32L4_APB1_TIM2_CLKIN   (2*STM32L4_PCLK1_FREQUENCY)
+#define STM32L4_APB1_TIM3_CLKIN   (2*STM32L4_PCLK1_FREQUENCY)
+#define STM32L4_APB1_TIM4_CLKIN   (2*STM32L4_PCLK1_FREQUENCY)
+#define STM32L4_APB1_TIM5_CLKIN   (2*STM32L4_PCLK1_FREQUENCY)
+#define STM32L4_APB1_TIM6_CLKIN   (2*STM32L4_PCLK1_FREQUENCY)
+#define STM32L4_APB1_TIM7_CLKIN   (2*STM32L4_PCLK1_FREQUENCY)
+
+/* APB2 clock (PCLK2) is HCLK (80MHz) */
+
+#define STM32L4_RCC_CFGR_PPRE2    RCC_CFGR_PPRE2_HCLK       /* PCLK2 = HCLK / 1 */
+#define STM32L4_PCLK2_FREQUENCY   (STM32L4_HCLK_FREQUENCY/1)
+
+/* Timers driven from APB2 will be twice PCLK2 */
+/* REVISIT : this can be configured */
+
+#define STM32L4_APB2_TIM1_CLKIN   (2*STM32L4_PCLK2_FREQUENCY)
+#define STM32L4_APB2_TIM8_CLKIN   (2*STM32L4_PCLK2_FREQUENCY)
+
+/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
+ * otherwise frequency is 2xAPBx.
+ * Note: TIM1,8 are on APB2, others on APB1
+ */
+
+#elif defined(MSI_CLOCK_CONFIG)
+
+/* Use the MSI; frequ = 4 MHz; autotrim from LSE */
+
+#define STM32L4_BOARD_USEMSI      1
+#define STM32L4_BOARD_MSIRANGE    RCC_CR_MSIRANGE_4M
+
+/* Prescaler common to all PLL inputs */
+
+#define STM32L4_PLLCFG_PLLM             RCC_PLLCFG_PLLM(1)
+
+/* 'main' PLL config; we use this to generate our system clock */
+
+#define STM32L4_PLLCFG_PLLN             RCC_PLLCFG_PLLN(40)
+#define STM32L4_PLLCFG_PLLP             0
+#undef  STM32L4_PLLCFG_PLLP_ENABLED
+#define STM32L4_PLLCFG_PLLQ             0
+#undef  STM32L4_PLLCFG_PLLQ_ENABLED
+#define STM32L4_PLLCFG_PLLR             RCC_PLLCFG_PLLR_2
+#define STM32L4_PLLCFG_PLLR_ENABLED
+
+/* 'SAIPLL1' is used to generate the 48 MHz clock */
+
+#define STM32L4_PLLSAI1CFG_PLLN         RCC_PLLSAI1CFG_PLLN(24)
+#define STM32L4_PLLSAI1CFG_PLLP         0
+#undef  STM32L4_PLLSAI1CFG_PLLP_ENABLED
+#define STM32L4_PLLSAI1CFG_PLLQ         RCC_PLLSAI1CFG_PLLQ_2
+#define STM32L4_PLLSAI1CFG_PLLQ_ENABLED
+#define STM32L4_PLLSAI1CFG_PLLR         0
+#undef  STM32L4_PLLSAI1CFG_PLLR_ENABLED
+
+/* 'SAIPLL2' is not used in this application */
+
+#define STM32L4_PLLSAI2CFG_PLLN         RCC_PLLSAI2CFG_PLLN(8)
+#define STM32L4_PLLSAI2CFG_PLLP         0
+#undef  STM32L4_PLLSAI2CFG_PLLP_ENABLED
+#define STM32L4_PLLSAI2CFG_PLLR         0
+#undef  STM32L4_PLLSAI2CFG_PLLR_ENABLED
+
+#define STM32L4_SYSCLK_FREQUENCY  80000000ul
+
+/* Enable CLK48; get it from PLLSAI1 */
+
+#define STM32L4_USE_CLK48
+#define STM32L4_CLK48_SEL         RCC_CCIPR_CLK48SEL_PLLSAI1
+
+/* Disable LSE (for the RTC) */
+
+#undef STM32L4_USE_LSE
+
+/* Configure the HCLK divisor (for the AHB bus, core, memory, and DMA */
+
+#define STM32L4_RCC_CFGR_HPRE     RCC_CFGR_HPRE_SYSCLK      /* HCLK  = SYSCLK / 1 */
+#define STM32L4_HCLK_FREQUENCY    STM32L4_SYSCLK_FREQUENCY
+#define STM32L4_BOARD_HCLK        STM32L4_HCLK_FREQUENCY      /* Same as above, to satisfy compiler */
+
+/* Configure the APB1 prescaler */
+
+#define STM32L4_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLK       /* PCLK1 = HCLK / 1 */
+#define STM32L4_PCLK1_FREQUENCY   (STM32L4_HCLK_FREQUENCY/1)
+
+#define STM32L4_APB1_TIM2_CLKIN   (2*STM32L4_PCLK1_FREQUENCY)
+#define STM32L4_APB1_TIM3_CLKIN   (2*STM32L4_PCLK1_FREQUENCY)
+#define STM32L4_APB1_TIM4_CLKIN   (2*STM32L4_PCLK1_FREQUENCY)
+#define STM32L4_APB1_TIM5_CLKIN   (2*STM32L4_PCLK1_FREQUENCY)
+#define STM32L4_APB1_TIM6_CLKIN   (2*STM32L4_PCLK1_FREQUENCY)
+#define STM32L4_APB1_TIM7_CLKIN   (2*STM32L4_PCLK1_FREQUENCY)
+
+/* Configure the APB2 prescaler */
+
+#define STM32L4_RCC_CFGR_PPRE2    RCC_CFGR_PPRE2_HCLK       /* PCLK2 = HCLK / 1 */
+#define STM32L4_PCLK2_FREQUENCY   (STM32L4_HCLK_FREQUENCY/1)
+
+#define STM32L4_APB2_TIM1_CLKIN   (2*STM32L4_PCLK2_FREQUENCY)
+#define STM32L4_APB2_TIM8_CLKIN   (2*STM32L4_PCLK2_FREQUENCY)
+
+#endif
+
+/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
+ * otherwise frequency is 2xAPBx.
+ * Note: TIM1,8,15,16,17 are on APB2, others on APB1
+ */
+
+#define BOARD_TIM1_FREQUENCY    STM32L4_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    (STM32L4_HCLK_FREQUENCY / 2)
+#define BOARD_TIM3_FREQUENCY    (STM32L4_HCLK_FREQUENCY / 2)
+#define BOARD_TIM4_FREQUENCY    (STM32L4_HCLK_FREQUENCY / 2)
+#define BOARD_TIM5_FREQUENCY    (STM32L4_HCLK_FREQUENCY / 2)
+#define BOARD_TIM6_FREQUENCY    (STM32L4_HCLK_FREQUENCY / 2)
+#define BOARD_TIM7_FREQUENCY    (STM32L4_HCLK_FREQUENCY / 2)
+#define BOARD_TIM8_FREQUENCY    STM32L4_HCLK_FREQUENCY
+#define BOARD_TIM15_FREQUENCY   STM32L4_HCLK_FREQUENCY
+#define BOARD_TIM16_FREQUENCY   STM32L4_HCLK_FREQUENCY
+#define BOARD_TIM17_FREQUENCY   STM32L4_HCLK_FREQUENCY
+#define BOARD_LPTIM1_FREQUENCY  (STM32L4_HCLK_FREQUENCY / 2)
+#define BOARD_LPTIM2_FREQUENCY  (STM32L4_HCLK_FREQUENCY / 2)
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif  /* __CONFIGS_STM32L476_MDK_INCLUDE_STM32L476_MDK_CLOCKING_H */
diff --git a/configs/stm32l476-mdk/nsh/Make.defs b/configs/stm32l476-mdk/nsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..d67a91823352e9988b4bab8b8b7d667bd05ce2db
--- /dev/null
+++ b/configs/stm32l476-mdk/nsh/Make.defs
@@ -0,0 +1,116 @@
+############################################################################
+# configs/stm32l476-mdk/nsh/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: dev@ziggurat29.com
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mknulldeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+LDFLAGS += -Map=${TOPDIR}/nuttx.map
+#CFLAGS += -Wa,-adhln
+#CXXFLAGS += -Wa,-adhln
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/stm32l476-mdk/nsh/defconfig b/configs/stm32l476-mdk/nsh/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..9ff2d597c4f3ed356e2b87943d26e51522ccc8d6
--- /dev/null
+++ b/configs/stm32l476-mdk/nsh/defconfig
@@ -0,0 +1,1103 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+# CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+CONFIG_ARCH_CHIP_STM32L4=y
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32l4"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+CONFIG_ARMV7M_CMNVECTOR=y
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+CONFIG_ARCH_HAVE_DPFPU=y
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+CONFIG_ARMV7M_HAVE_ITCM=y
+CONFIG_ARMV7M_HAVE_DTCM=y
+# CONFIG_ARMV7M_ITCM is not set
+# CONFIG_ARMV7M_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+# CONFIG_USART3_RS485 is not set
+# CONFIG_USART3_RXDMA is not set
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+
+#
+# STM32L4 Configuration Options
+#
+CONFIG_ARCH_CHIP_STM32L476RG=y
+# CONFIG_ARCH_CHIP_STM32L476RE is not set
+# CONFIG_ARCH_CHIP_STM32L486 is not set
+# CONFIG_STM32L4_STM32L4X3 is not set
+CONFIG_STM32L4_STM32L4X6=y
+CONFIG_STM32L4_STM32L476XX=y
+# CONFIG_STM32L4_STM32L486XX is not set
+# CONFIG_STM32L4_FLASH_256KB is not set
+# CONFIG_STM32L4_FLASH_512KB is not set
+CONFIG_STM32L4_FLASH_1024KB=y
+
+#
+# STM32L4 SRAM2 Options
+#
+# CONFIG_STM32L4_SRAM2_HEAP is not set
+# CONFIG_STM32L4_SRAM2_INIT is not set
+
+#
+# STM32L4 Peripherals
+#
+
+#
+# STM32L4 Peripheral Support
+#
+# CONFIG_STM32L4_HAVE_LTDC is not set
+CONFIG_STM32L4_HAVE_SAI1=y
+CONFIG_STM32L4_HAVE_SAI2=y
+# CONFIG_STM32L4_ADC is not set
+# CONFIG_STM32L4_CAN is not set
+# CONFIG_STM32L4_DAC is not set
+CONFIG_STM32L4_DMA=y
+# CONFIG_STM32L4_I2C is not set
+# CONFIG_STM32L4_SAI is not set
+# CONFIG_STM32L4_SPI is not set
+CONFIG_STM32L4_USART=y
+# CONFIG_STM32L4_LPTIM is not set
+
+#
+# AHB1 Peripherals
+#
+CONFIG_STM32L4_DMA1=y
+CONFIG_STM32L4_DMA2=y
+# CONFIG_STM32L4_CRC is not set
+# CONFIG_STM32L4_TSC is not set
+
+#
+# AHB2 Peripherals
+#
+# CONFIG_STM32L4_OTGFS is not set
+# CONFIG_STM32L4_ADC1 is not set
+# CONFIG_STM32L4_ADC2 is not set
+# CONFIG_STM32L4_ADC3 is not set
+# CONFIG_STM32L4_AES is not set
+CONFIG_STM32L4_RNG=y
+# CONFIG_STM32L4_SAI1_A is not set
+# CONFIG_STM32L4_SAI1_B is not set
+# CONFIG_STM32L4_SAI2_A is not set
+# CONFIG_STM32L4_SAI2_B is not set
+
+#
+# AHB3 Peripherals
+#
+# CONFIG_STM32L4_FMC is not set
+# CONFIG_STM32L4_QSPI is not set
+
+#
+# APB1 Peripherals
+#
+CONFIG_STM32L4_PWR=y
+# CONFIG_STM32L4_TIM2 is not set
+# CONFIG_STM32L4_TIM3 is not set
+# CONFIG_STM32L4_TIM4 is not set
+# CONFIG_STM32L4_TIM5 is not set
+# CONFIG_STM32L4_TIM6 is not set
+# CONFIG_STM32L4_TIM7 is not set
+# CONFIG_STM32L4_LCD is not set
+# CONFIG_STM32L4_SPI2 is not set
+# CONFIG_STM32L4_SPI3 is not set
+# CONFIG_STM32L4_USART1 is not set
+# CONFIG_STM32L4_USART2 is not set
+CONFIG_STM32L4_USART3=y
+# CONFIG_STM32L4_UART4 is not set
+# CONFIG_STM32L4_UART5 is not set
+# CONFIG_STM32L4_I2C1 is not set
+# CONFIG_STM32L4_I2C2 is not set
+# CONFIG_STM32L4_I2C3 is not set
+# CONFIG_STM32L4_CAN1 is not set
+# CONFIG_STM32L4_DAC1 is not set
+# CONFIG_STM32L4_DAC2 is not set
+# CONFIG_STM32L4_OPAMP is not set
+# CONFIG_STM32L4_LPTIM1 is not set
+# CONFIG_STM32L4_LPUART1 is not set
+# CONFIG_STM32L4_SWPMI is not set
+# CONFIG_STM32L4_LPTIM2 is not set
+
+#
+# APB2 Peripherals
+#
+CONFIG_STM32L4_SYSCFG=y
+CONFIG_STM32L4_FIREWALL=y
+# CONFIG_STM32L4_SDMMC1 is not set
+# CONFIG_STM32L4_TIM1 is not set
+# CONFIG_STM32L4_SPI1 is not set
+# CONFIG_STM32L4_TIM8 is not set
+# CONFIG_STM32L4_TIM15 is not set
+# CONFIG_STM32L4_TIM16 is not set
+# CONFIG_STM32L4_TIM17 is not set
+# CONFIG_STM32L4_SAI1 is not set
+# CONFIG_STM32L4_SAI2 is not set
+# CONFIG_STM32L4_DFSDM is not set
+
+#
+# Other Peripherals
+#
+# CONFIG_STM32L4_BKPSRAM is not set
+# CONFIG_STM32L4_IWDG is not set
+# CONFIG_STM32L4_WWDG is not set
+CONFIG_STM32L4_FLASH_PREFETCH=y
+CONFIG_STM32L4_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+# CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG is not set
+CONFIG_STM32L4_RTC_LSECLOCK=y
+# CONFIG_STM32L4_RTC_LSICLOCK is not set
+# CONFIG_STM32L4_RTC_HSECLOCK is not set
+CONFIG_STM32L4_SAI1PLL=y
+# CONFIG_STM32L4_SAI2PLL is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32L4_ONESHOT is not set
+# CONFIG_STM32L4_FREERUN is not set
+CONFIG_STM32L4_HAVE_USART1=y
+CONFIG_STM32L4_HAVE_USART2=y
+CONFIG_STM32L4_HAVE_USART3=y
+CONFIG_STM32L4_HAVE_UART4=y
+CONFIG_STM32L4_HAVE_UART5=y
+
+#
+# U[S]ART Configuration
+#
+# CONFIG_STM32L4_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32L4_USART_BREAKS is not set
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+CONFIG_ARCH_DMA=y
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=8499
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=98304
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_NUCLEO_L476RG is not set
+# CONFIG_ARCH_BOARD_STM32L476VG_DISCO is not set
+CONFIG_ARCH_BOARD_STM32L476_MDK=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="stm32l476-mdk"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+# CONFIG_ARCH_LEDS is not set
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+CONFIG_ARCH_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+CONFIG_BOARDCTL_UNIQUEID=y
+CONFIG_BOARDCTL_UNIQUEID_SIZE=12
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=8
+CONFIG_WDOG_INTRESERVE=1
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_SPINLOCK is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+CONFIG_DISABLE_POLL=y
+CONFIG_DEV_NULL=y
+CONFIG_DEV_ZERO=y
+CONFIG_ARCH_HAVE_RNG=y
+CONFIG_DEV_RANDOM=y
+# CONFIG_DEV_URANDOM is not set
+CONFIG_DEV_LOOP=y
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+CONFIG_RTC=y
+CONFIG_RTC_DATETIME=y
+CONFIG_RTC_ALARM=y
+CONFIG_RTC_NALARMS=2
+CONFIG_RTC_DRIVER=y
+CONFIG_RTC_IOCTL=y
+# CONFIG_RTC_EXTERNAL is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+CONFIG_USART3_SERIALDRIVER=y
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART3_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART3 Configuration
+#
+CONFIG_USART3_RXBUFSIZE=256
+CONFIG_USART3_TXBUFSIZE=256
+CONFIG_USART3_BAUD=115200
+CONFIG_USART3_BITS=8
+CONFIG_USART3_PARITY=0
+CONFIG_USART3_2STOP=0
+# CONFIG_USART3_IFLOWCONTROL is not set
+# CONFIG_USART3_OFLOWCONTROL is not set
+# CONFIG_USART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_PSEUDOFS_SOFTLINKS is not set
+CONFIG_FS_READABLE=y
+CONFIG_FS_WRITABLE=y
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+CONFIG_FS_ROMFS=y
+CONFIG_FS_TMPFS=y
+CONFIG_FS_TMPFS_BLOCKSIZE=512
+CONFIG_FS_TMPFS_DIRECTORY_ALLOCGUARD=64
+CONFIG_FS_TMPFS_DIRECTORY_FREEGUARD=128
+CONFIG_FS_TMPFS_FILE_ALLOCGUARD=512
+CONFIG_FS_TMPFS_FILE_FREEGUARD=1024
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_REGISTER=y
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+
+#
+# Standard C I/O
+#
+# CONFIG_STDIO_DISABLE_BUFFERING is not set
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_MEMCPY_VIK is not set
+CONFIG_LIBM=y
+
+#
+# Architecture-Specific Support
+#
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
+
+#
+# stdlib Options
+#
+CONFIG_LIB_RAND_ORDER=1
+CONFIG_LIB_HOMEDIR="/"
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
+
+#
+# Program Execution Options
+#
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+
+#
+# errno Decode Support
+#
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+
+#
+# memcpy/memset Options
+#
+# CONFIG_MEMSET_OPTSPEED is not set
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+
+#
+# Time/Time Zone Support
+#
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_ARCH_HAVE_TLS=y
+
+#
+# Thread Local Storage (TLS)
+#
+# CONFIG_TLS is not set
+
+#
+# Network-Related Options
+#
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
+# CONFIG_LIBC_NETDB is not set
+
+#
+# NETDB Support
+#
+# CONFIG_NETDB_HOSTFILE is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+# CONFIG_HAVE_CXXINITIALIZE is not set
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_ALARM is not set
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_LEDS is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RANDOM is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_STAT is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_THTTPD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_UNIONFS is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+# CONFIG_NSH_DISABLE_DATE is not set
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+# CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+# CONFIG_NSH_ROMFSETC is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32l476-mdk/nsh/setenv.sh b/configs/stm32l476-mdk/nsh/setenv.sh
new file mode 100755
index 0000000000000000000000000000000000000000..196fbd3993e9a568c0e53ad9b30e2cb869ce219c
--- /dev/null
+++ b/configs/stm32l476-mdk/nsh/setenv.sh
@@ -0,0 +1,64 @@
+#!/bin/bash
+# configs/stm32l476-mdk/nsh/setenv.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/stm32l476-mdk/scripts/ld.script b/configs/stm32l476-mdk/scripts/ld.script
new file mode 100644
index 0000000000000000000000000000000000000000..9b264217d4c64d93bb4fbf8d237b0545a536e8d8
--- /dev/null
+++ b/configs/stm32l476-mdk/scripts/ld.script
@@ -0,0 +1,125 @@
+/****************************************************************************
+ * configs/stm32l476-mdk/scripts/ld.script
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Sebastien Lorquet 
+ *           dev@ziggurat29.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* The STM32L476VG has 1024Kb of FLASH beginning at address 0x0800:0000,
+ * 96Kb of SRAM beginning at address 0x2000:0000, and 32Kb of SRAM2 beginning
+ * at address 0x1000:0000.  The SRAM2 has special properties (e.g. parity
+ * check, separate power domain for retention in low power modes, write
+ * protection).  Alas, it is non-contiguous with main SRAM.
+ * When booting from FLASH,
+ * FLASH memory is aliased to address 0x0000:0000 where the code expects to
+ * begin execution by jumping to the entry point in the 0x0800:0000 address
+ * range.
+ */
+
+MEMORY
+{
+    flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
+    sram (rwx) : ORIGIN = 0x20000000, LENGTH = 96K
+    sram2 (rwx) : ORIGIN = 0x10000000, LENGTH = 32K
+}
+
+OUTPUT_ARCH(arm)
+ENTRY(_stext)
+SECTIONS
+{
+	.text : {
+		_stext = ABSOLUTE(.);
+		*(.vectors)
+		*(.text .text.*)
+		*(.fixup)
+		*(.gnu.warning)
+		*(.rodata .rodata.*)
+		*(.gnu.linkonce.t.*)
+		*(.glue_7)
+		*(.glue_7t)
+		*(.got)
+		*(.gcc_except_table)
+		*(.gnu.linkonce.r.*)
+		_etext = ABSOLUTE(.);
+	} > flash
+
+	.init_section : {
+		_sinit = ABSOLUTE(.);
+		*(.init_array .init_array.*)
+		_einit = ABSOLUTE(.);
+	} > flash
+
+	.ARM.extab : {
+		*(.ARM.extab*)
+	} > flash
+
+	__exidx_start = ABSOLUTE(.);
+	.ARM.exidx : {
+		*(.ARM.exidx*)
+	} > flash
+	__exidx_end = ABSOLUTE(.);
+
+	_eronly = ABSOLUTE(.);
+
+	/* The STM32L476RG has 96Kb of SRAM beginning at the following address */
+
+	.data : {
+		_sdata = ABSOLUTE(.);
+		*(.data .data.*)
+		*(.gnu.linkonce.d.*)
+		CONSTRUCTORS
+		_edata = ABSOLUTE(.);
+	} > sram AT > flash
+
+	.bss : {
+		_sbss = ABSOLUTE(.);
+		*(.bss .bss.*)
+		*(.gnu.linkonce.b.*)
+		*(COMMON)
+		_ebss = ABSOLUTE(.);
+	} > sram
+
+	/* Stabs debugging sections. */
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_info 0 : { *(.debug_info) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/stm32l476-mdk/src/Makefile b/configs/stm32l476-mdk/src/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..f74969e08b10646cef3d38a61618244e1cc403db
--- /dev/null
+++ b/configs/stm32l476-mdk/src/Makefile
@@ -0,0 +1,53 @@
+############################################################################
+# configs/stm32l476-mdk/src/Makefile
+#
+#   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+#   Author: dev@ziggurat29.com
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+ASRCS =
+CSRCS = stm32_boot.c stm32_spi.c
+
+ifeq ($(CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG),y)
+CSRCS += stm32_clockconfig.c
+endif
+
+ifeq ($(CONFIG_ARCH_BUTTONS),y)
+CSRCS +=  stm32_buttons.c
+endif
+
+ifeq ($(CONFIG_LIB_BOARDCTL),y)
+CSRCS += stm32_appinit.c
+endif
+
+include $(TOPDIR)/configs/Board.mk
diff --git a/configs/stm32l476-mdk/src/stm32_appinit.c b/configs/stm32l476-mdk/src/stm32_appinit.c
new file mode 100644
index 0000000000000000000000000000000000000000..99a42e0a4a45c025b9d6c95575c49e2443061a54
--- /dev/null
+++ b/configs/stm32l476-mdk/src/stm32_appinit.c
@@ -0,0 +1,176 @@
+/****************************************************************************
+ * configs/stm32l476-mdk/src/stm32_appinit.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include 
+
+#include "stm32l476-mdk.h"
+
+/* Conditional logic in stm32l476-mdk.h will determine if certain features
+ * are supported.  Tests for these features need to be made after including
+ * stm32l476-mdk.h.
+ */
+
+#ifdef HAVE_RTC_DRIVER
+#  include 
+#  include "stm32l4_rtc.h"
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ *   Perform application specific initialization.  This function is never
+ *   called directly from application code, but only indirectly via the
+ *   (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ *   arg - The boardctl() argument is passed to the board_app_initialize()
+ *         implementation without modification.  The argument has no
+ *         meaning to NuttX; the meaning of the argument is a contract
+ *         between the board-specific initalization logic and the the
+ *         matching application logic.  The value cold be such things as a
+ *         mode enumeration value, a set of DIP switch switch settings, a
+ *         pointer to configuration data read from a file or serial FLASH,
+ *         or whatever you would like to do with it.  Every implementation
+ *         should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_LIB_BOARDCTL
+int board_app_initialize(uintptr_t arg)
+{
+#ifdef HAVE_RTC_DRIVER
+  FAR struct rtc_lowerhalf_s *rtclower;
+#endif
+  int ret;
+
+  (void)ret;
+
+#ifdef CONFIG_SCHED_INSTRUMENTATION
+  /* Configure CPU load estimation */
+
+  cpuload_initialize_once();
+#endif
+
+#ifdef HAVE_PROC
+  /* mount the proc filesystem */
+
+  syslog(LOG_INFO, "Mounting procfs to /proc\n");
+
+  ret = mount(NULL, CONFIG_NSH_PROC_MOUNTPOINT, "procfs", 0, NULL);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to mount the PROC filesystem: %d (%d)\n",
+             ret, errno);
+      return ret;
+    }
+#endif
+
+#ifdef HAVE_RTC_DRIVER
+  /* Instantiate the STM32 lower-half RTC driver */
+
+  rtclower = stm32l4_rtc_lowerhalf();
+  if (!rtclower)
+    {
+      serr("ERROR: Failed to instantiate the RTC lower-half driver\n");
+      return -ENOMEM;
+    }
+  else
+    {
+      /* Bind the lower half driver and register the combined RTC driver
+       * as /dev/rtc0
+       */
+
+      ret = rtc_initialize(0, rtclower);
+      if (ret < 0)
+        {
+          serr("ERROR: Failed to bind/register the RTC driver: %d\n", ret);
+          return ret;
+        }
+    }
+#endif
+
+  return OK;
+}
+#endif /* CONFIG_LIB_BOARDCTL */
+
+#if defined(CONFIG_BOARDCTL_UNIQUEID)
+int board_uniqueid(uint8_t *uniqueid)
+{
+  if (uniqueid == 0)
+    {
+      return -EINVAL;
+    }
+
+  stm32l4_get_uniqueid(uniqueid);
+  return OK;
+}
+#endif
diff --git a/configs/stm32l476-mdk/src/stm32_boot.c b/configs/stm32l476-mdk/src/stm32_boot.c
new file mode 100644
index 0000000000000000000000000000000000000000..3d907d49bb73ebbcb98d6c075f533563caeb0518
--- /dev/null
+++ b/configs/stm32l476-mdk/src/stm32_boot.c
@@ -0,0 +1,110 @@
+/************************************************************************************
+ * configs/stm32l476-mdk/src/stm32_boot.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           dev@ziggurat29.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "up_arch.h"
+#include "stm32l476-mdk.h"
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32l4_boardinitialize
+ *
+ * Description:
+ *   All STM32L4 architectures must provide the following entry point.  This entry point
+ *   is called early in the initialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void stm32l4_boardinitialize(void)
+{
+  /* Configure on-board LEDs if LED support has been selected. */
+
+#ifdef CONFIG_ARCH_LEDS
+  board_autoled_initialize();
+#endif
+
+  /* Configure SPI chip selects if 1) SP2 is not disabled, and 2) the weak function
+   * stm32_spiinitialize() has been brought into the link.
+   */
+
+#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
+  stm32l4_spiinitialize();
+#endif
+}
+
+/****************************************************************************
+ * Name: board_initialize
+ *
+ * Description:
+ *   If CONFIG_BOARD_INITIALIZE is selected, then an additional
+ *   initialization call will be performed in the boot-up sequence to a
+ *   function called board_initialize().  board_initialize() will be
+ *   called immediately after up_intiialize() is called and just before the
+ *   initial application is started.  This additional initialization phase
+ *   may be used, for example, to initialize board-specific device drivers.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BOARD_INITIALIZE
+void board_initialize(void)
+{
+  /* Perform NSH initialization here instead of from the NSH.  This
+   * alternative NSH initialization is necessary when NSH is ran in user-space
+   * but the initialization function must run in kernel space.
+   */
+
+#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_NSH_ARCHINIT)
+  board_app_initialize(0);
+#endif
+}
+#endif
diff --git a/configs/stm32l476-mdk/src/stm32_buttons.c b/configs/stm32l476-mdk/src/stm32_buttons.c
new file mode 100644
index 0000000000000000000000000000000000000000..955cba926d363ed03055135c104fb5fd52b7aa90
--- /dev/null
+++ b/configs/stm32l476-mdk/src/stm32_buttons.c
@@ -0,0 +1,166 @@
+/****************************************************************************
+ * configs/stm32l476-mdk/src/stm32_buttons.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: dev@ziggurat29.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "stm32l476-mdk.h"
+
+#ifdef CONFIG_ARCH_BUTTONS
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+/* Pin configuration for each button.  This array is indexed by
+ * the BUTTON_* definitions in board.h
+ */
+
+static const uint32_t g_buttons[NUM_BUTTONS] =
+{
+  GPIO_BTN_POWER
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_button_initialize
+ *
+ * Description:
+ *   board_button_initialize() must be called to initialize button resources.
+ *   After that, board_buttons() may be called to collect the current state
+ *   of all buttons or board_button_irq() may be called to register button
+ *   interrupt handlers.
+ *
+ ****************************************************************************/
+
+void board_button_initialize(void)
+{
+  int i;
+
+  /* Configure the GPIO pins as inputs.  NOTE that EXTI interrupts are
+   * configured for all pins.
+   */
+
+  for (i = 0; i < NUM_BUTTONS; i++)
+    {
+      stm32l4_configgpio(g_buttons[i]);
+    }
+}
+
+/****************************************************************************
+ * Name: board_buttons
+ ****************************************************************************/
+
+uint8_t board_buttons(void)
+{
+  uint8_t ret = 0;
+  int i;
+
+  /* Check that state of each key */
+
+  for (i = 0; i < NUM_BUTTONS; i++)
+    {
+       /* A LOW value means that the key is pressed. */
+
+       bool released = stm32l4_gpioread(g_buttons[i]);
+
+       /* Accumulate the set of depressed (not released) keys */
+
+       if (!released)
+         {
+            ret |= (1 << i);
+         }
+    }
+
+  return ret;
+}
+
+/*****************************************************************************
+ * Button support.
+ *
+ * Description:
+ *   board_button_initialize() must be called to initialize button resources.
+ *   After that, board_buttons() may be called to collect the current state
+ *   of all buttons or board_button_irq() may be called to register button
+ *   interrupt handlers.
+ *
+ *   After board_button_initialize() has been called, board_buttons() may be
+ *   called to collect the state of all buttons.  board_buttons() returns an
+ *   8-bit bit set with each bit associated with a button.  See the
+ *   BUTTON_*_BIT definitions in board.h for the meaning of each bit.
+ *
+ *   board_button_irq() may be called to register an interrupt handler that
+ *   will be called when a button is depressed or released.  The ID value
+ *   is a button enumeration value that uniquely identifies a button resource.
+ *   See the BUTTON_* definitions in board.h for the meaning of enumeration
+ *   value.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_IRQBUTTONS
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
+{
+  int ret = -EINVAL;
+
+  if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
+    {
+      ret = stm32l4_gpiosetevent(g_buttons[id], true, true, true,
+                                 irqhandler, arg);
+    }
+
+  return ret;
+}
+#endif
+#endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/stm32l476-mdk/src/stm32_clockconfig.c b/configs/stm32l476-mdk/src/stm32_clockconfig.c
new file mode 100644
index 0000000000000000000000000000000000000000..d2ae4263e1cab134c8031065fe4caa6912e83cef
--- /dev/null
+++ b/configs/stm32l476-mdk/src/stm32_clockconfig.c
@@ -0,0 +1,239 @@
+/************************************************************************************
+ * configs/stm32l476-mdk/src/stm32_clockconfig.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: dev@ziggurat29.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+
+#include "up_arch.h"
+#include "stm32l476-mdk.h"
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_board_clockconfig
+ *
+ * Description:
+ *   I provided this module when I was doing some debugging of a problem I had with
+ *   clocking (it was helpful to do A/B tests).  I'm leaving it here in the config
+ *   partially because I expect to have similar problems again as I develop more of
+ *   the various peripheral support, but also because it may become necessary in the
+ *   end for certain project configurations which have specialized clock
+ *   configurationsthat aren't appropriate to expose in the 'arch' default code.
+ *
+ ************************************************************************************/
+
+#if defined(CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG)
+void stm32l4_board_clockconfig(void)
+{
+  uint32_t regval;
+
+  /* Enable Internal High-Speed Clock (HSI) */
+
+  regval  = getreg32(STM32L4_RCC_CR);
+  regval |= RCC_CR_HSION;           /* Enable HSI */
+  putreg32(regval, STM32L4_RCC_CR);
+
+  /* Wait until the HSI is ready */
+
+  while ((getreg32(STM32L4_RCC_CR) & RCC_CR_HSIRDY) == 0)
+    {
+    }
+
+  /* Set the HCLK source/divider */
+
+  regval  = getreg32(STM32L4_RCC_CFGR);
+  regval &= ~RCC_CFGR_HPRE_MASK;
+  regval |= STM32L4_RCC_CFGR_HPRE;
+  putreg32(regval, STM32L4_RCC_CFGR);
+
+  /* Set the PCLK2 divider */
+
+  regval  = getreg32(STM32L4_RCC_CFGR);
+  regval &= ~RCC_CFGR_PPRE2_MASK;
+  regval |= STM32L4_RCC_CFGR_PPRE2;
+  putreg32(regval, STM32L4_RCC_CFGR);
+
+  /* Set the PCLK1 divider */
+
+  regval  = getreg32(STM32L4_RCC_CFGR);
+  regval &= ~RCC_CFGR_PPRE1_MASK;
+  regval |= STM32L4_RCC_CFGR_PPRE1;
+  putreg32(regval, STM32L4_RCC_CFGR);
+
+  /* Set the PLL source and main divider */
+
+  regval  = getreg32(STM32L4_RCC_PLLCFG);
+
+  /* Configure Main PLL */
+  /* Set the PLL dividers and multipliers to configure the main PLL */
+
+  regval = (STM32L4_PLLCFG_PLLM | STM32L4_PLLCFG_PLLN | STM32L4_PLLCFG_PLLP
+             | STM32L4_PLLCFG_PLLQ | STM32L4_PLLCFG_PLLR);
+  regval |= RCC_PLLCFG_PLLQEN;
+  regval |= RCC_PLLCFG_PLLREN;
+
+  /* XXX The choice of clock source to PLL (all three) is independent
+   * of the sys clock source choice, review the STM32L4_BOARD_USEHSI
+   * name; probably split it into two, one for PLL source and one
+   * for sys clock source.
+   */
+
+  regval |= RCC_PLLCFG_PLLSRC_HSI;
+  putreg32(regval, STM32L4_RCC_PLLCFG);
+
+  /* Enable the main PLL */
+
+  regval  = getreg32(STM32L4_RCC_CR);
+  regval |= RCC_CR_PLLON;
+  putreg32(regval, STM32L4_RCC_CR);
+
+  /* Wait until the PLL is ready */
+
+  while ((getreg32(STM32L4_RCC_CR) & RCC_CR_PLLRDY) == 0)
+    {
+    }
+
+  /* Configure SAI1 PLL */
+
+  regval  = getreg32(STM32L4_RCC_PLLSAI1CFG);
+
+  /* Set the PLL dividers and multipliers to configure the SAI1 PLL */
+
+  regval  = (STM32L4_PLLSAI1CFG_PLLN | STM32L4_PLLSAI1CFG_PLLP |
+             STM32L4_PLLSAI1CFG_PLLQ | STM32L4_PLLSAI1CFG_PLLR);
+  regval |= RCC_PLLSAI1CFG_PLLQEN;
+  putreg32(regval, STM32L4_RCC_PLLSAI1CFG);
+
+  /* Enable the SAI1 PLL */
+
+  regval  = getreg32(STM32L4_RCC_CR);
+  regval |= RCC_CR_PLLSAI1ON;
+  putreg32(regval, STM32L4_RCC_CR);
+
+  /* Wait until the PLL is ready */
+
+  while ((getreg32(STM32L4_RCC_CR) & RCC_CR_PLLSAI1RDY) == 0)
+    {
+    }
+
+  /* Configure SAI2 PLL */
+
+  regval  = getreg32(STM32L4_RCC_PLLSAI2CFG);
+
+  /* Enable the SAI2 PLL */
+  /* Set the PLL dividers and multipliers to configure the SAI2 PLL */
+
+  regval = (STM32L4_PLLSAI2CFG_PLLN | STM32L4_PLLSAI2CFG_PLLP |
+            STM32L4_PLLSAI2CFG_PLLR);
+  putreg32(regval, STM32L4_RCC_PLLSAI2CFG);
+
+  /* Enable the SAI1 PLL */
+
+  regval  = getreg32(STM32L4_RCC_CR);
+  regval |= RCC_CR_PLLSAI2ON;
+  putreg32(regval, STM32L4_RCC_CR);
+
+  /* Wait until the PLL is ready */
+
+  while ((getreg32(STM32L4_RCC_CR) & RCC_CR_PLLSAI2RDY) == 0)
+    {
+    }
+
+  /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */
+
+#ifdef CONFIG_STM32L4_FLASH_PREFETCH
+  regval = (FLASH_ACR_LATENCY_4 | FLASH_ACR_ICEN | FLASH_ACR_DCEN |
+            FLASH_ACR_PRFTEN);
+#else
+  regval = (FLASH_ACR_LATENCY_4 | FLASH_ACR_ICEN | FLASH_ACR_DCEN);
+#endif
+  putreg32(regval, STM32L4_FLASH_ACR);
+
+  /* Select the main PLL as system clock source */
+
+  regval  = getreg32(STM32L4_RCC_CFGR);
+  regval &= ~RCC_CFGR_SW_MASK;
+  regval |= RCC_CFGR_SW_PLL;
+  putreg32(regval, STM32L4_RCC_CFGR);
+
+  /* Wait until the PLL source is used as the system clock source */
+
+  while ((getreg32(STM32L4_RCC_CFGR) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_PLL)
+    {
+    }
+
+#if defined(CONFIG_STM32L4_IWDG) || defined(CONFIG_RTC_LSICLOCK)
+
+  /* Low speed internal clock source LSI */
+
+   stm32l4_rcc_enablelsi();
+#endif
+
+#if defined(STM32L4_USE_LSE)
+
+  /* Low speed external clock source LSE
+   *
+   * TODO: There is another case where the LSE needs to
+   * be enabled: if the MCO1 pin selects LSE as source.
+   */
+
+  stm32l4_pwr_enableclk(true);
+  stm32l4_rcc_enablelse();
+#endif
+
+  /* XXX sanity if sdmmc1 or usb or rng, then we need to set the clk48 source
+   * and then we can also do away with STM32L4_USE_CLK48, and give better
+   * warning messages
+   *
+   * XXX sanity if our STM32L4_CLK48_SEL is YYY then we need to have already
+   * enabled ZZZ
+   */
+
+  regval  = getreg32(STM32L4_RCC_CCIPR);
+  regval &= RCC_CCIPR_CLK48SEL_MASK;
+  regval |= STM32L4_CLK48_SEL;
+  putreg32(regval, STM32L4_RCC_CCIPR);
+}
+#endif
diff --git a/configs/stm32l476-mdk/src/stm32_spi.c b/configs/stm32l476-mdk/src/stm32_spi.c
new file mode 100644
index 0000000000000000000000000000000000000000..8b1cb7a8a6e90169978e7a268ba694b417a9f1c4
--- /dev/null
+++ b/configs/stm32l476-mdk/src/stm32_spi.c
@@ -0,0 +1,210 @@
+/****************************************************************************
+ * configs/stm32l476-mdk/src/stm32_spi.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "stm32l476-mdk.h"
+
+#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+/* Global driver instances */
+
+#ifdef CONFIG_STM32_SPI1
+struct spi_dev_s *g_spi1;
+#endif
+#ifdef CONFIG_STM32_SPI2
+struct spi_dev_s *g_spi2;
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_spiinitialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins for the Nucleo-F401RE and
+ *   Nucleo-F411RE boards.
+ *
+ ************************************************************************************/
+
+void weak_function stm32_spiinitialize(void)
+{
+#ifdef CONFIG_STM32_SPI1
+  /* Configure SPI-based devices */
+
+  g_spi1 = up_spiinitialize(1);
+  if (!g_spi1)
+    {
+      spierr("ERROR: [boot] FAILED to initialize SPI port 1\n");
+    }
+#endif
+
+#ifdef CONFIG_STM32_SPI2
+  /* Configure SPI-based devices */
+
+  g_spi2 = up_spiinitialize(2);
+
+#endif
+}
+
+/****************************************************************************
+ * Name:  stm32_spi1/2/3select and stm32_spi1/2/3status
+ *
+ * Description:
+ *   The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
+ *   provided by board-specific logic.  They are implementations of the select
+ *   and status methods of the SPI interface defined by struct spi_ops_s (see
+ *   include/nuttx/spi/spi.h). All other methods (including up_spiinitialize())
+ *   are provided by common STM32 logic.  To use this common SPI logic on your
+ *   board:
+ *
+ *   1. Provide logic in stm32_boardinitialize() to configure SPI chip select
+ *      pins.
+ *   2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
+ *      board-specific logic.  These functions will perform chip selection and
+ *      status operations using GPIOs in the way your board is configured.
+ *   3. Add a calls to up_spiinitialize() in your low level application
+ *      initialization logic
+ *   4. The handle returned by up_spiinitialize() may then be used to bind the
+ *      SPI driver to higher level logic (e.g., calling
+ *      mmcsd_spislotinitialize(), for example, will bind the SPI driver to
+ *      the SPI MMC/SD driver).
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32_SPI1
+void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+}
+
+uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  return 0;
+}
+#endif
+
+#ifdef CONFIG_STM32_SPI2
+void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+}
+
+uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  return 0;
+}
+#endif
+
+#ifdef CONFIG_STM32_SPI3
+void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+}
+
+uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  return 0;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_spi1cmddata
+ *
+ * Description:
+ *   Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true)
+ *   or command (false). This function must be provided by platform-specific
+ *   logic. This is an implementation of the cmddata method of the SPI
+ *   interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
+ *
+ * Input Parameters:
+ *
+ *   spi - SPI device that controls the bus the device that requires the CMD/
+ *         DATA selection.
+ *   devid - If there are multiple devices on the bus, this selects which one
+ *         to select cmd or data.  NOTE:  This design restricts, for example,
+ *         one one SPI display per SPI bus.
+ *   cmd - true: select command; false: select data
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI_CMDDATA
+#ifdef CONFIG_STM32_SPI1
+int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
+{
+  return OK;
+}
+#endif
+
+#ifdef CONFIG_STM32_SPI2
+int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
+{
+  return OK;
+}
+#endif
+
+#ifdef CONFIG_STM32_SPI3
+int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
+{
+  return OK;
+}
+#endif
+#endif /* CONFIG_SPI_CMDDATA */
+
+#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 || CONFIG_STM32_SPI3 */
diff --git a/configs/stm32l476-mdk/src/stm32l476-mdk.h b/configs/stm32l476-mdk/src/stm32l476-mdk.h
new file mode 100644
index 0000000000000000000000000000000000000000..51e883907eff10a8791cf7860743d1078477ccc1
--- /dev/null
+++ b/configs/stm32l476-mdk/src/stm32l476-mdk.h
@@ -0,0 +1,140 @@
+/************************************************************************************
+ * configs/stm32l476-mdk/src/stm32l476-mdk.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Frank Bennett
+ *            Gregory Nutt 
+ *            Sebastien Lorquet 
+ *            dev@ziggurat29.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __CONFIGS_STM32L476_MDK_SRC_STM32L476_MDK_H
+#define __CONFIGS_STM32L476_MDK_SRC_STM32L476_MDK_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include 
+
+#include 
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Configuration ********************************************************************/
+
+#define HAVE_PROC             1
+#define HAVE_RTC_DRIVER       1
+
+#if !defined(CONFIG_FS_PROCFS)
+#  undef HAVE_PROC
+#endif
+
+#if defined(HAVE_PROC) && defined(CONFIG_DISABLE_MOUNTPOINT)
+#  warning Mountpoints disabled.  No procfs support
+#  undef HAVE_PROC
+#endif
+
+/* Check if we can support the RTC driver */
+
+#if !defined(CONFIG_RTC) || !defined(CONFIG_RTC_DRIVER)
+#  undef HAVE_RTC_DRIVER
+#endif
+
+/* LED.
+ * LD4: the red LED on PB2
+ * LD5: the green LED on PE8
+ *
+ * - When the I/O is HIGH value, the LED is on.
+ * - When the I/O is LOW, the LED is off.
+ */
+
+#define GPIO_LED_RED \
+  (GPIO_PORTB | GPIO_PIN2 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_PUSHPULL | \
+   GPIO_PULLUP | GPIO_SPEED_50MHz)
+
+#define GPIO_LED_GRN \
+  (GPIO_PORTE | GPIO_PIN8 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_PUSHPULL | \
+   GPIO_PULLUP | GPIO_SPEED_50MHz)
+
+/* BUTTONS -- NOTE that all have EXTI interrupts configured */
+
+#define MIN_IRQBUTTON   BUTTON_POWER
+#define MAX_IRQBUTTON   BUTTON_POWER
+#define NUM_IRQBUTTONS  1
+
+#define GPIO_BTN_POWER  (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTD|GPIO_PIN2)
+
+/* SPI1 off */
+#define GPIO_SPI1_MOSI_OFF (GPIO_INPUT | GPIO_PULLDOWN | \
+                            GPIO_PORTE | GPIO_PIN15)
+#define GPIO_SPI1_MISO_OFF (GPIO_INPUT | GPIO_PULLDOWN | \
+                            GPIO_PORTE | GPIO_PIN14)
+#define GPIO_SPI1_SCK_OFF  (GPIO_INPUT | GPIO_PULLDOWN | \
+                            GPIO_PORTE | GPIO_PIN13)
+#define GPIO_SPI1_NSS_OFF  (GPIO_INPUT | GPIO_PULLDOWN | \
+                            GPIO_PORTE | GPIO_PIN12)
+
+/* Devices on the onboard I2C bus.
+ *
+ * Note that these are unshifted addresses.
+ */
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/* Global driver instances */
+
+#ifdef CONFIG_STM32_SPI1
+extern struct spi_dev_s *g_spi1;
+#endif
+#ifdef CONFIG_STM32_SPI2
+extern struct spi_dev_s *g_spi2;
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_spiinitialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins.
+ *
+ ************************************************************************************/
+
+void stm32_spiinitialize(void);
+
+#endif /* __CONFIGS_STM32L476_MDK_SRC_STM32L476_MDK_H */
diff --git a/configs/stm32l476vg-disco/README.txt b/configs/stm32l476vg-disco/README.txt
index e8355e79bc8116ac10764dcdd45a4243fbf71145..7f6113b51819347563b94d4baa14358f93ef70a6 100644
--- a/configs/stm32l476vg-disco/README.txt
+++ b/configs/stm32l476vg-disco/README.txt
@@ -43,11 +43,7 @@ Board features:
 Contents
 ========
 
-  - Development Environment
-  - GNU Toolchain Options
-  - IDEs
-  - NuttX EABI "buildroot" Toolchain
-  - NXFLAT Toolchain
+  - mbed
   - Hardware
     - Button
     - LED
@@ -57,230 +53,6 @@ Contents
   - Shields
   - Configurations
 
-Development Environment
-=======================
-
-  Either Linux or Cygwin on Windows can be used for the development environment.
-  The source has been built only using the GNU toolchain (see below).  Other
-  toolchains will likely cause problems.
-
-GNU Toolchain Options
-=====================
-
-  Toolchain Configurations
-  ------------------------
-  The NuttX make system has been modified to support the following different
-  toolchain options.
-
-    1. The CodeSourcery GNU toolchain,
-    2. The Atollic Toolchain,
-    3. The devkitARM GNU toolchain,
-    4. Raisonance GNU toolchain, or
-    5. The NuttX buildroot Toolchain (see below).
-
-  All testing has been conducted using the CodeSourcery toolchain for Linux.
-  To use the Atollic, devkitARM, Raisonance GNU, or NuttX buildroot toolchain,
-  you simply need to add one of the following configuration options to your
-  .config (or defconfig) file:
-
-    CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=n  : CodeSourcery under Windows
-    CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y  : CodeSourcery under Linux
-    CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y        : The Atollic toolchain under Windows
-    CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=n      : devkitARM under Windows
-    CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE=y     : Raisonance RIDE7 under Windows
-    CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=n      : NuttX buildroot under Linux or Cygwin (default)
-
-  If you change the default toolchain, then you may also have to modify the PATH in
-  the setenv.h file if your make cannot find the tools.
-
-  NOTE: There are several limitations to using a Windows based toolchain in a
-  Cygwin environment.  The three biggest are:
-
-  1. The Windows toolchain cannot follow Cygwin paths.  Path conversions are
-     performed automatically in the Cygwin makefiles using the 'cygpath' utility
-     but you might easily find some new path problems.  If so, check out 'cygpath -w'
-
-  2. Windows toolchains cannot follow Cygwin symbolic links.  Many symbolic links
-     are used in Nuttx (e.g., include/arch).  The make system works around these
-     problems for the Windows tools by copying directories instead of linking them.
-     But this can also cause some confusion for you:  For example, you may edit
-     a file in a "linked" directory and find that your changes had no effect.
-     That is because you are building the copy of the file in the "fake" symbolic
-     directory.  If you use a Windows toolchain, you should get in the habit of
-     making like this:
-
-       V=1 make clean_context all 2>&1 |tee mout
-
-     An alias in your .bashrc file might make that less painful.
-
-  3. Dependencies are not made when using Windows versions of the GCC.  This is
-     because the dependencies are generated using Windows pathes which do not
-     work with the Cygwin make.
-
-       MKDEP = $(TOPDIR)/tools/mknulldeps.sh
-
-  The Atollic "Pro" and "Lite" Toolchain
-  --------------------------------------
-  One problem that I had with the Atollic toolchains is that the provide a gcc.exe
-  and g++.exe in the same bin/ file as their ARM binaries.  If the Atollic bin/ path
-  appears in your PATH variable before /usr/bin, then you will get the wrong gcc
-  when you try to build host executables.  This will cause to strange, uninterpretable
-  errors build some host binaries in tools/ when you first make.
-
-  Also, the Atollic toolchains are the only toolchains that have built-in support for
-  the FPU in these configurations.  If you plan to use the Cortex-M4 FPU, you will
-  need to use the Atollic toolchain for now.  See the FPU section below for more
-  information.
-
-  The Atollic "Lite" Toolchain
-  ----------------------------
-  The free, "Lite" version of the Atollic toolchain does not support C++ nor
-  does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite"
-  toolchain, you will have to set:
-
-    CONFIG_HAVE_CXX=n
-
-  In order to compile successfully.  Otherwise, you will get errors like:
-
-    "C++ Compiler only available in TrueSTUDIO Professional"
-
-  The make may then fail in some of the post link processing because of some of
-  the other missing tools.  The Make.defs file replaces the ar and nm with
-  the default system x86 tool versions and these seem to work okay.  Disable all
-  of the following to avoid using objcopy:
-
-    CONFIG_RRLOAD_BINARY=n
-    CONFIG_INTELHEX_BINARY=n
-    CONFIG_MOTOROLA_SREC=n
-    CONFIG_RAW_BINARY=n
-
-  devkitARM
-  ---------
-  The devkitARM toolchain includes a version of MSYS make.  Make sure that the
-  the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM
-  path or will get the wrong version of make.
-
-IDEs
-====
-
-  NuttX is built using command-line make.  It can be used with an IDE, but some
-  effort will be required to create the project.
-
-  Makefile Build
-  --------------
-  Under Eclipse, it is pretty easy to set up an "empty makefile project" and
-  simply use the NuttX makefile to build the system.  That is almost for free
-  under Linux.  Under Windows, you will need to set up the "Cygwin GCC" empty
-  makefile project in order to work with Windows (Google for "Eclipse Cygwin" -
-  there is a lot of help on the internet).
-
-  Using Sourcery CodeBench from http://www.mentor.com/embedded-software/sourcery-tools/sourcery-codebench/overview
-    Download and install the latest version (as of this writting it was
-    sourceryg++-2013.05-64-arm-none-eabi)
-
-   Import the  project from git.
-     File->import->Git-URI, then import a Exiting code as a Makefile progject
-     from the working directory the git clone was done to.
-
-   Select the Sourcery CodeBench for ARM EABI. N.B. You must do one command line
-     build, before the make will work in CodeBench.
-
-  Native Build
-  ------------
-  Here are a few tips before you start that effort:
-
-  1) Select the toolchain that you will be using in your .config file
-  2) Start the NuttX build at least one time from the Cygwin command line
-     before trying to create your project.  This is necessary to create
-     certain auto-generated files and directories that will be needed.
-  3) Set up include pathes:  You will need include/, arch/arm/src/stm32,
-     arch/arm/src/common, arch/arm/src/armv7-m, and sched/.
-  4) All assembly files need to have the definition option -D __ASSEMBLY__
-     on the command line.
-
-  Startup files will probably cause you some headaches.  The NuttX startup file
-  is arch/arm/src/stm32/stm32_vectors.S.  With RIDE, I have to build NuttX
-  one time from the Cygwin command line in order to obtain the pre-built
-  startup object needed by RIDE.
-
-NuttX EABI "buildroot" Toolchain
-================================
-
-  A GNU GCC-based toolchain is assumed.  The files */setenv.sh should
-  be modified to point to the correct path to the Cortex-M3 GCC toolchain (if
-  different from the default in your PATH variable).
-
-  If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX
-  Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/).
-  This GNU toolchain builds and executes in the Linux or Cygwin environment.
-
-  1. You must have already configured Nuttx in /nuttx.
-
-     $ (cd tools; ./configure.sh nucleo-f4x1re/f401-nsh)
-     $ make qconfig
-     $ V=1 make context all 2>&1 | tee mout
-
-     Use the f411-nsh configuration if you have the Nucleo-F411RE board.
-
-  2. Download the latest buildroot package into 
-
-  3. unpack the buildroot tarball.  The resulting directory may
-     have versioning information on it like buildroot-x.y.z.  If so,
-     rename /buildroot-x.y.z to /buildroot.
-
-  4. cd /buildroot
-
-  5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config
-
-  6. make oldconfig
-
-  7. make
-
-  8. Edit setenv.h, if necessary, so that the PATH variable includes
-     the path to the newly built binaries.
-
-  See the file configs/README.txt in the buildroot source tree.  That has more
-  details PLUS some special instructions that you will need to follow if you are
-  building a Cortex-M3 toolchain for Cygwin under Windows.
-
-  NOTE:  Unfortunately, the 4.6.3 EABI toolchain is not compatible with the
-  the NXFLAT tools.  See the top-level TODO file (under "Binary loaders") for
-  more information about this problem. If you plan to use NXFLAT, please do not
-  use the GCC 4.6.3 EABI toolchain; instead use the GCC 4.3.3 EABI toolchain.
-
-NXFLAT Toolchain
-================
-
-  If you are *not* using the NuttX buildroot toolchain and you want to use
-  the NXFLAT tools, then you will still have to build a portion of the buildroot
-  tools -- just the NXFLAT tools.  The buildroot with the NXFLAT tools can
-  be downloaded from the NuttX Bitbucket download site
-  (https://bitbucket.org/nuttx/nuttx/downloads/).
-
-  This GNU toolchain builds and executes in the Linux or Cygwin environment.
-
-  1. You must have already configured Nuttx in /nuttx.
-
-     cd tools
-     ./configure.sh lpcxpresso-lpc1768/
-
-  2. Download the latest buildroot package into 
-
-  3. unpack the buildroot tarball.  The resulting directory may
-     have versioning information on it like buildroot-x.y.z.  If so,
-     rename /buildroot-x.y.z to /buildroot.
-
-  4. cd /buildroot
-
-  5. cp configs/cortexm3-defconfig-nxflat .config
-
-  6. make oldconfig
-
-  7. make
-
-  8. Edit setenv.h, if necessary, so that the PATH variable includes
-     the path to the newly builtNXFLAT binaries.
-
 mbed
 ====
 
@@ -568,8 +340,8 @@ Shields
 Configurations
 ==============
 
-  f401-nsh:
-  ---------
+  nsh:
+  ---
     Configures the NuttShell (nsh) located at apps/examples/nsh for the
     Nucleo-F401RE board.  The Configuration enables the serial interfaces
     on UART2.  Support for builtin applications is enabled, but in the base
@@ -586,26 +358,76 @@ Configurations
        b. Execute 'make menuconfig' in nuttx/ in order to start the
           reconfiguration process.
 
-    2. By default, this configuration uses the CodeSourcery toolchain
+    2. By default, this configuration uses the Generic ARM EABI toolchain
        for Linux.  That can easily be reconfigured, of course.
 
-       CONFIG_HOST_LINUX=y                     : Builds under Linux
-       CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery for Linux
+       CONFIG_HOST_LINUX=y                 : Builds under Linux
+       CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : Generic EABI toolchain for Linux
 
     3. Although the default console is USART2 (which would correspond to
        the Virtual COM port) I have done all testing with the console
        device configured for USART1 (see instruction above under "Serial
-       Consoles).  I have been using a TTL-to-RS-232 converter connected
-       as shown below:
-
-       Nucleo CN10 STM32F4x1RE
-       ----------- ------------
-       Pin 21 PA9  USART1_RX   *Warning you make need to reverse RX/TX on
-       Pin 33 PA10 USART1_TX    some RS-232 converters
-       Pin 20 GND
-       Pin 8  U5V
-
-  f411-nsh
-  --------
-    This configuration is the same as the f401-nsh configuration, except
-    that it is configured to support the Nucleo-F411RE.
+       Consoles).  I have been using a TTL-to-RS-232 converter.
+
+    4. This example has been used to verify the OTGFS functionality.  USB is
+       not enabled in the default configuration but can be enabled with the
+       following settings:
+
+         CONFIG_STM32L4_OTGFS=y
+
+         CONFIG_USBDEV=y
+         CONFIG_USBDEV_SELFPOWERED=y
+
+     These will enable the USB CDC/ACM serial device
+
+         CONFIG_CDCACM=y
+         CONFIG_CDCACM_EP0MAXPACKET=64
+         CONFIG_CDCACM_EPINTIN=1
+         CONFIG_CDCACM_EPINTIN_FSSIZE=64
+         CONFIG_CDCACM_EPINTIN_HSSIZE=64
+         CONFIG_CDCACM_EPBULKOUT=3
+         CONFIG_CDCACM_EPBULKOUT_FSSIZE=64
+         CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
+         CONFIG_CDCACM_EPBULKIN=2
+         CONFIG_CDCACM_EPBULKIN_FSSIZE=64
+         CONFIG_CDCACM_EPBULKIN_HSSIZE=512
+         CONFIG_CDCACM_NRDREQS=4
+         CONFIG_CDCACM_NWRREQS=4
+         CONFIG_CDCACM_BULKIN_REQLEN=96
+         CONFIG_CDCACM_RXBUFSIZE=257
+         CONFIG_CDCACM_TXBUFSIZE=193
+         CONFIG_CDCACM_VENDORID=0x0525
+         CONFIG_CDCACM_PRODUCTID=0xa4a7
+         CONFIG_CDCACM_VENDORSTR="NuttX"
+         CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
+
+         CONFIG_SERIAL_REMOVABLE=y
+
+    These will enable the USB serial example at apps/examples/usbserial
+
+         CONFIG_BOARDCTL_USBDEVCTRL=y
+
+         CONFIG_EXAMPLES_USBSERIAL=y
+         CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
+         CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=y
+         CONFIG_EXAMPLES_USBSERIAL_TRACECLASS=y
+         CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS=y
+         CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER=y
+         CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=y
+
+    Optional USB debug features:
+
+         CONFIG_DEBUG_FEATURES=y
+         CONFIG_DEBUG_USB=y
+         CONFIG_ARCH_USBDUMP=y
+         CONFIG_USBDEV_TRACE=y
+         CONFIG_USBDEV_TRACE_NRECORDS=128
+         CONFIG_USBDEV_TRACE_STRINGS=y
+         CONFIG_USBDEV_TRACE_INITIALIDSET=y
+
+         CONFIG_NSH_USBDEV_TRACE=y
+         CONFIG_NSH_USBDEV_TRACEINIT=y
+         CONFIG_NSH_USBDEV_TRACECLASS=y
+         CONFIG_NSH_USBDEV_TRACETRANSFERS=y
+         CONFIG_NSH_USBDEV_TRACECONTROLLER=y
+         CONFIG_NSH_USBDEV_TRACEINTERRUPTS=y
diff --git a/configs/stm32l476vg-disco/include/board.h b/configs/stm32l476vg-disco/include/board.h
index c05f74a7e5d290affea31bdfbba55ac5d5358a78..ee28c35a06e67a0e645eb86bca6340e6529e57df 100644
--- a/configs/stm32l476vg-disco/include/board.h
+++ b/configs/stm32l476vg-disco/include/board.h
@@ -271,7 +271,7 @@
 #define BUTTON_CENTER_BIT  (1 << BUTTON_CENTER)
 #define BUTTON_LEFT_BIT    (1 << BUTTON_LEFT)
 #define BUTTON_DOWN_BIT    (1 << BUTTON_DOWN)
-#define BUTTON_TIGHT_BIT   (1 << BUTTON_RIGHT)
+#define BUTTON_RIGHT_BIT   (1 << BUTTON_RIGHT)
 #define BUTTON_UP_BIT      (1 << BUTTON_UP)
 
 /************************************************************************************
diff --git a/configs/stm32l476vg-disco/include/stm32l476vg-disco-clocking.h b/configs/stm32l476vg-disco/include/stm32l476vg-disco-clocking.h
index 7db8d8603ebddafadee0ec013ca45c6e2cfea057..9ceef6c2b24820ff09fe8bb3b2e4a97291c9e069 100644
--- a/configs/stm32l476vg-disco/include/stm32l476vg-disco-clocking.h
+++ b/configs/stm32l476vg-disco/include/stm32l476vg-disco-clocking.h
@@ -348,6 +348,25 @@
 
 #endif
 
+/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
+ * otherwise frequency is 2xAPBx.
+ * Note: TIM1,8,15,16,17 are on APB2, others on APB1
+ */
+
+#define BOARD_TIM1_FREQUENCY    STM32L4_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    (STM32L4_HCLK_FREQUENCY / 2)
+#define BOARD_TIM3_FREQUENCY    (STM32L4_HCLK_FREQUENCY / 2)
+#define BOARD_TIM4_FREQUENCY    (STM32L4_HCLK_FREQUENCY / 2)
+#define BOARD_TIM5_FREQUENCY    (STM32L4_HCLK_FREQUENCY / 2)
+#define BOARD_TIM6_FREQUENCY    (STM32L4_HCLK_FREQUENCY / 2)
+#define BOARD_TIM7_FREQUENCY    (STM32L4_HCLK_FREQUENCY / 2)
+#define BOARD_TIM8_FREQUENCY    STM32L4_HCLK_FREQUENCY
+#define BOARD_TIM15_FREQUENCY   STM32L4_HCLK_FREQUENCY
+#define BOARD_TIM16_FREQUENCY   STM32L4_HCLK_FREQUENCY
+#define BOARD_TIM17_FREQUENCY   STM32L4_HCLK_FREQUENCY
+#define BOARD_LPTIM1_FREQUENCY  (STM32L4_HCLK_FREQUENCY / 2)
+#define BOARD_LPTIM2_FREQUENCY  (STM32L4_HCLK_FREQUENCY / 2)
+
 /************************************************************************************
  * Public Data
  ************************************************************************************/
diff --git a/configs/stm32l476vg-disco/nsh/Make.defs b/configs/stm32l476vg-disco/nsh/Make.defs
index 0819e438c21190e75109b1a14a6baa830a6c3dd4..836070c0d0d88176f3b2d1c92a64d8b1644cf268 100644
--- a/configs/stm32l476vg-disco/nsh/Make.defs
+++ b/configs/stm32l476vg-disco/nsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32l476vg-disco/nsh/defconfig b/configs/stm32l476vg-disco/nsh/defconfig
index 1b79946f714192b967d0da066dcf52e6c08bab50..c98f47a46cf994c03e121651476f02aa9153a7d3 100644
--- a/configs/stm32l476vg-disco/nsh/defconfig
+++ b/configs/stm32l476vg-disco/nsh/defconfig
@@ -42,42 +42,17 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-CONFIG_ARCH_HAVE_HEAPCHECK=y
-# CONFIG_DEBUG_VERBOSE is not set
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_DMA is not set
-# CONFIG_DEBUG_HEAP is not set
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_LEDS is not set
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
-# CONFIG_DEBUG_RTC is not set
-# CONFIG_DEBUG_SPI is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
-CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
-CONFIG_DEBUG_NOOPT=y
+# CONFIG_DEBUG_NOOPT is not set
 # CONFIG_DEBUG_CUSTOMOPT is not set
-# CONFIG_DEBUG_FULLOPT is not set
+CONFIG_DEBUG_FULLOPT=y
 
 #
 # System Type
@@ -86,10 +61,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -99,7 +76,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -130,7 +106,9 @@ CONFIG_ARCH_CHIP_STM32L4=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
 CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
@@ -156,7 +134,6 @@ CONFIG_ARCH_HAVE_DPFPU=y
 # CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
-# CONFIG_DEBUG_HARDFAULT is not set
 
 #
 # ARMV7M Configuration Options
@@ -186,6 +163,8 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 CONFIG_ARCH_CHIP_STM32L476RG=y
 # CONFIG_ARCH_CHIP_STM32L476RE is not set
 # CONFIG_ARCH_CHIP_STM32L486 is not set
+# CONFIG_STM32L4_STM32L4X3 is not set
+CONFIG_STM32L4_STM32L4X6=y
 CONFIG_STM32L4_STM32L476XX=y
 # CONFIG_STM32L4_STM32L486XX is not set
 # CONFIG_STM32L4_FLASH_256KB is not set
@@ -193,15 +172,21 @@ CONFIG_STM32L4_STM32L476XX=y
 CONFIG_STM32L4_FLASH_1024KB=y
 
 #
-# SRAM2 Options
+# STM32L4 SRAM2 Options
 #
 # CONFIG_STM32L4_SRAM2_HEAP is not set
 # CONFIG_STM32L4_SRAM2_INIT is not set
 
+#
+# STM32L4 Peripherals
+#
+
 #
 # STM32L4 Peripheral Support
 #
 # CONFIG_STM32L4_HAVE_LTDC is not set
+CONFIG_STM32L4_HAVE_SAI1=y
+CONFIG_STM32L4_HAVE_SAI2=y
 # CONFIG_STM32L4_ADC is not set
 # CONFIG_STM32L4_CAN is not set
 # CONFIG_STM32L4_DAC is not set
@@ -229,6 +214,10 @@ CONFIG_STM32L4_DMA2=y
 # CONFIG_STM32L4_ADC3 is not set
 # CONFIG_STM32L4_AES is not set
 CONFIG_STM32L4_RNG=y
+# CONFIG_STM32L4_SAI1_A is not set
+# CONFIG_STM32L4_SAI1_B is not set
+# CONFIG_STM32L4_SAI2_A is not set
+# CONFIG_STM32L4_SAI2_B is not set
 
 #
 # AHB3 Peripherals
@@ -248,7 +237,6 @@ CONFIG_STM32L4_QSPI_DMA_CHAN_1_5=y
 CONFIG_STM32L4_QSPI_DMAPRIORITY_MEDIUM=y
 # CONFIG_STM32L4_QSPI_DMAPRIORITY_LOW is not set
 CONFIG_STM32L4_QSPI_DMATHRESHOLD=4
-# CONFIG_STM32L4_QSPI_REGDEBUG is not set
 
 #
 # APB1 Peripherals
@@ -311,10 +299,22 @@ CONFIG_STM32L4_RTC_LSECLOCK=y
 CONFIG_STM32L4_SAI1PLL=y
 # CONFIG_STM32L4_SAI2PLL is not set
 
+#
+# Timer Configuration
+#
+# CONFIG_STM32L4_ONESHOT is not set
+# CONFIG_STM32L4_FREERUN is not set
+CONFIG_STM32L4_HAVE_USART1=y
+CONFIG_STM32L4_HAVE_USART2=y
+CONFIG_STM32L4_HAVE_USART3=y
+CONFIG_STM32L4_HAVE_UART4=y
+CONFIG_STM32L4_HAVE_UART5=y
+
 #
 # U[S]ART Configuration
 #
 # CONFIG_STM32L4_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32L4_USART_BREAKS is not set
 
 #
 # Architecture Options
@@ -379,6 +379,7 @@ CONFIG_RAM_SIZE=98304
 #
 # CONFIG_ARCH_BOARD_NUCLEO_L476RG is not set
 CONFIG_ARCH_BOARD_STM32L476VG_DISCO=y
+# CONFIG_ARCH_BOARD_STM32L476_MDK is not set
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="stm32l476vg-disco"
 
@@ -391,18 +392,16 @@ CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
 CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 CONFIG_BOARDCTL_UNIQUEID=y
 CONFIG_BOARDCTL_UNIQUEID_SIZE=12
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 CONFIG_BOARDCTL_IOCTL=y
 
@@ -419,9 +418,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=8
@@ -431,6 +433,7 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_SPINLOCK is not set
 # CONFIG_INIT_NONE is not set
 CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
@@ -447,6 +450,8 @@ CONFIG_SCHED_WAITPID=y
 #
 # CONFIG_MUTEX_TYPES is not set
 CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
 
 #
 # Performance Monitoring
@@ -513,6 +518,7 @@ CONFIG_DEV_NULL=y
 CONFIG_DEV_ZERO=y
 CONFIG_ARCH_HAVE_RNG=y
 CONFIG_DEV_RANDOM=y
+# CONFIG_DEV_URANDOM is not set
 CONFIG_DEV_LOOP=y
 
 #
@@ -528,19 +534,25 @@ CONFIG_DEV_LOOP=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
-# CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_HWFEATURES is not set
-# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 CONFIG_RTC_ALARM=y
@@ -554,8 +566,18 @@ CONFIG_RTC_IOCTL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -563,6 +585,7 @@ CONFIG_RTC_IOCTL=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 CONFIG_MTD=y
@@ -586,7 +609,9 @@ CONFIG_MTD_PARTITION=y
 # CONFIG_MTD_AT24XX is not set
 # CONFIG_MTD_AT25 is not set
 # CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_IS25XP is not set
 # CONFIG_MTD_M25P is not set
+# CONFIG_MTD_MX25L is not set
 # CONFIG_MTD_S25FL1 is not set
 CONFIG_MTD_N25QXXX=y
 CONFIG_N25QXXX_QSPIMODE=0
@@ -596,6 +621,7 @@ CONFIG_N25QXXX_SECTOR512=y
 # CONFIG_MTD_RAMTRON is not set
 # CONFIG_MTD_SST25 is not set
 # CONFIG_MTD_SST25XX is not set
+# CONFIG_MTD_SST26 is not set
 # CONFIG_MTD_SST39FV is not set
 # CONFIG_MTD_W25 is not set
 # CONFIG_EEPROM is not set
@@ -603,9 +629,10 @@ CONFIG_N25QXXX_SECTOR512=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -629,16 +656,11 @@ CONFIG_USART2_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
-# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_USART2_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -656,19 +678,26 @@ CONFIG_USART2_2STOP=0
 # CONFIG_USART2_IFLOWCONTROL is not set
 # CONFIG_USART2_OFLOWCONTROL is not set
 # CONFIG_USART2_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -692,6 +721,7 @@ CONFIG_USART2_2STOP=0
 # CONFIG_DISABLE_MOUNTPOINT is not set
 # CONFIG_FS_AUTOMOUNTER is not set
 # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_PSEUDOFS_SOFTLINKS is not set
 CONFIG_FS_READABLE=y
 CONFIG_FS_WRITABLE=y
 # CONFIG_FS_NAMED_SEMAPHORES is not set
@@ -721,12 +751,6 @@ CONFIG_FS_PROCFS_REGISTER=y
 # CONFIG_FS_PROCFS_EXCLUDE_PARTITIONS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -767,43 +791,106 @@ CONFIG_BUILTIN=y
 #
 # Standard C Library Options
 #
+
+#
+# Standard C I/O
+#
+# CONFIG_STDIO_DISABLE_BUFFERING is not set
 CONFIG_STDIO_BUFFER_SIZE=64
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=2
-CONFIG_LIB_HOMEDIR="/"
-# CONFIG_LIBM is not set
 # CONFIG_NOPRINTF_FIELDWIDTH is not set
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
-# CONFIG_LIBC_IOCTL_VARIADIC is not set
-CONFIG_LIB_RAND_ORDER=1
+# CONFIG_LIBC_SCANSET is not set
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
 # CONFIG_EOL_IS_BOTH_CRLF is not set
 CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_LIBM is not set
+
+#
+# Architecture-Specific Support
+#
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
+
+#
+# stdlib Options
+#
+CONFIG_LIB_RAND_ORDER=1
+CONFIG_LIB_HOMEDIR="/"
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
+
+#
+# Program Execution Options
+#
 # CONFIG_LIBC_EXECFUNCS is not set
 CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
 CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+
+#
+# errno Decode Support
+#
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
-CONFIG_LIBC_TMPDIR="/tmp"
-CONFIG_LIBC_MAX_TMPFILE=32
-CONFIG_ARCH_LOWPUTC=y
+
+#
+# memcpy/memset Options
+#
+# CONFIG_MEMSET_OPTSPEED is not set
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+
+#
+# Time/Time Zone Support
+#
 # CONFIG_LIBC_LOCALTIME is not set
 # CONFIG_TIME_EXTENDED is not set
-CONFIG_LIB_SENDFILE_BUFSIZE=512
-# CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
+
+#
+# Thread Local Storage (TLS)
+#
 # CONFIG_TLS is not set
+
+#
+# Network-Related Options
+#
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
 # CONFIG_LIBC_NETDB is not set
+
+#
+# NETDB Support
+#
 # CONFIG_NETDB_HOSTFILE is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -839,22 +926,10 @@ CONFIG_EXAMPLES_ALARM_PRIORITY=100
 CONFIG_EXAMPLES_ALARM_STACKSIZE=2048
 CONFIG_EXAMPLES_ALARM_DEVPATH="/dev/rtc0"
 CONFIG_EXAMPLES_ALARM_SIGNO=1
-CONFIG_EXAMPLES_BUTTONS=y
-CONFIG_EXAMPLES_BUTTONS_MIN=0
-CONFIG_EXAMPLES_BUTTONS_MAX=4
-CONFIG_EXAMPLES_IRQBUTTONS_MIN=0
-CONFIG_EXAMPLES_IRQBUTTONS_MAX=4
-CONFIG_EXAMPLES_BUTTONS_NAME0="Center"
-CONFIG_EXAMPLES_BUTTONS_NAME1="Left"
-CONFIG_EXAMPLES_BUTTONS_NAME2="Down"
-CONFIG_EXAMPLES_BUTTONS_NAME3="Right"
-CONFIG_EXAMPLES_BUTTONS_NAME4="Up"
-CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5"
-CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6"
-CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
@@ -863,10 +938,10 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 CONFIG_EXAMPLES_MEDIA=y
 CONFIG_EXAMPLES_MEDIA_DEVPATH="/dev/mtd0"
 CONFIG_EXAMPLES_MEDIA_BLOCKSIZE=512
@@ -879,43 +954,44 @@ CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_RANDOM is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_STAT is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_FLASH_ERASEALL is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
@@ -935,8 +1011,9 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -947,6 +1024,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -1000,12 +1078,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1022,11 +1100,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
 #
 # CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
 CONFIG_NSH_CODECS_BUFSIZE=128
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 CONFIG_NSH_PROC_MOUNTPOINT="/proc"
@@ -1069,13 +1149,13 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_FLASH_ERASEALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1083,7 +1163,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
-CONFIG_SYSTEM_DISCOTEST=y
diff --git a/configs/stm32l476vg-disco/src/Makefile b/configs/stm32l476vg-disco/src/Makefile
index 64e8fa360c543bc034fae541f09237b1d564ebca..a41699b66de7b3390b1e5fd26470f8b204ccfbfc 100644
--- a/configs/stm32l476vg-disco/src/Makefile
+++ b/configs/stm32l476vg-disco/src/Makefile
@@ -42,7 +42,7 @@ ifeq ($(CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG),y)
 CSRCS += stm32_clockconfig.c
 endif
 
-ifeq ($(CONFIG_STM32_OTGFS),y)
+ifeq ($(CONFIG_STM32L4_OTGFS),y)
 CSRCS += stm32_usb.c
 endif
 
diff --git a/configs/stm32l476vg-disco/src/stm32_appinit.c b/configs/stm32l476vg-disco/src/stm32_appinit.c
index 0c5591dcfa355d02642f76d1b06f94785cc07490..4cccfd503926dce32e1dbff742c4951d40e0518b 100644
--- a/configs/stm32l476vg-disco/src/stm32_appinit.c
+++ b/configs/stm32l476vg-disco/src/stm32_appinit.c
@@ -58,8 +58,8 @@
 #include 
 #include 
 
-#include 
-#include 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -87,26 +87,6 @@
 #endif
 
 /****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_BOARD_INITIALIZE
-#  define SYSLOG lldbg
-#else
-#  define SYSLOG dbg
-#endif
-
-/****************************************************************************
- * Private Type Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
- /****************************************************************************
  * Private Data
  ****************************************************************************/
 
@@ -188,7 +168,7 @@ FAR struct mtd_dev_s *mtd_temp;
   rtclower = stm32l4_rtc_lowerhalf();
   if (!rtclower)
     {
-      sdbg("ERROR: Failed to instantiate the RTC lower-half driver\n");
+      serr("ERROR: Failed to instantiate the RTC lower-half driver\n");
       return -ENOMEM;
     }
   else
@@ -200,7 +180,7 @@ FAR struct mtd_dev_s *mtd_temp;
       ret = rtc_initialize(0, rtclower);
       if (ret < 0)
         {
-          sdbg("ERROR: Failed to bind/register the RTC driver: %d\n", ret);
+          serr("ERROR: Failed to bind/register the RTC driver: %d\n", ret);
           return ret;
         }
     }
@@ -212,7 +192,7 @@ FAR struct mtd_dev_s *mtd_temp;
   g_qspi = stm32l4_qspi_initialize(0);
   if (!g_qspi)
     {
-      SYSLOG("ERROR: stm32l4_qspi_initialize failed\n");
+      _err("ERROR: stm32l4_qspi_initialize failed\n");
       return ret;
     }
   else
@@ -224,34 +204,72 @@ FAR struct mtd_dev_s *mtd_temp;
       mtd_temp = n25qxxx_initialize(g_qspi, true);
       if (!mtd_temp)
         {
-          SYSLOG("ERROR: n25qxxx_initialize failed\n");
+          _err("ERROR: n25qxxx_initialize failed\n");
           return ret;
         }
       g_mtd_fs = mtd_temp;
         
 #ifdef CONFIG_MTD_PARTITION
-      /* Setup a partition of 256KiB for our file system. */
-
-#if defined(CONFIG_N25QXXX_SECTOR512)
-      mtd_temp = mtd_partition(g_mtd_fs, 0, 512);
-#else
-      mtd_temp = mtd_partition(g_mtd_fs, 0, 64);
+      {
+        FAR struct mtd_geometry_s geo;
+        off_t nblocks;
+
+        /* Setup a partition of 256KiB for our file system. */
+
+        ret = MTD_IOCTL(g_mtd_fs, MTDIOC_GEOMETRY, (unsigned long)(uintptr_t)&geo);
+        if (ret < 0)
+          {
+            _err("ERROR: MTDIOC_GEOMETRY failed\n");
+            return ret;
+          }
+
+        nblocks = (256*1024) / geo.blocksize;
+
+        mtd_temp = mtd_partition(g_mtd_fs, 0, nblocks);
+        if (!mtd_temp)
+          {
+            _err("ERROR: mtd_partition failed\n");
+            return ret;
+          }
+
+        g_mtd_fs = mtd_temp;
+      }
 #endif
-      if (!g_mtd_fs)
+
+#ifdef HAVE_N25QXXX_SMARTFS
+      /* Configure the device with no partition support */
+
+      ret = smart_initialize(N25QXXX_SMART_MINOR, g_mtd_fs, NULL);
+      if (ret != OK)
         {
-          SYSLOG("ERROR: mtd_partition failed\n");
-          return ret;
+          _err("ERROR: Failed to initialize SmartFS: %d\n", ret);
         }
 
-      g_mtd_fs = mtd_temp;
-#endif
+#elif defined(HAVE_N25QXXX_NXFFS)
+      /* Initialize to provide NXFFS on the N25QXXX MTD interface */
+
+      ret = nxffs_initialize(g_mtd_fs);
+      if (ret < 0)
+        {
+         _err("ERROR: NXFFS initialization failed: %d\n", ret);
+        }
+
+      /* Mount the file system at /mnt/nxffs */
+
+      ret = mount(NULL, "/mnt/nxffs", "nxffs", 0, NULL);
+      if (ret < 0)
+        {
+          _err("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
+          return ret;
+        }
 
+#else /* if  defined(HAVE_N25QXXX_CHARDEV) */
       /* Use the FTL layer to wrap the MTD driver as a block driver */
 
       ret = ftl_initialize(N25QXXX_MTD_MINOR, g_mtd_fs);
       if (ret < 0)
         {
-          SYSLOG("ERROR: Failed to initialize the FTL layer: %d\n", ret);
+          _err("ERROR: Failed to initialize the FTL layer: %d\n", ret);
           return ret;
         }
 
@@ -273,9 +291,34 @@ FAR struct mtd_dev_s *mtd_temp;
       ret = bchdev_register(blockdev, chardev, false);
       if (ret < 0)
         {
-          SYSLOG("ERROR: bchdev_register %s failed: %d\n", chardev, ret);
+          _err("ERROR: bchdev_register %s failed: %d\n", chardev, ret);
           return ret;
         }
+#endif
+    }
+#endif
+
+#ifdef HAVE_USBHOST
+  /* Initialize USB host operation.  stm32l4_usbhost_initialize() starts a thread
+   * will monitor for USB connection and disconnection events.
+   */
+
+  ret = stm32l4_usbhost_initialize();
+  if (ret != OK)
+    {
+      udbg("ERROR: Failed to initialize USB host: %d\n", ret);
+      return ret;
+    }
+#endif
+
+#ifdef HAVE_USBMONITOR
+  /* Start the USB Monitor */
+
+  ret = usbmonitor_start(0, NULL);
+  if (ret != OK)
+    {
+      udbg("ERROR: Failed to start USB monitor: %d\n", ret);
+      return ret;
     }
 #endif
 
diff --git a/configs/stm32l476vg-disco/src/stm32_autoleds.c b/configs/stm32l476vg-disco/src/stm32_autoleds.c
index 22ee6771760bc545dadefed4c15ccdd20a00f248..e21faf7249cf3d50f5c7e4180f5def616ea0cd4b 100644
--- a/configs/stm32l476vg-disco/src/stm32_autoleds.c
+++ b/configs/stm32l476vg-disco/src/stm32_autoleds.c
@@ -54,22 +54,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/stm32l476vg-disco/src/stm32_boot.c b/configs/stm32l476vg-disco/src/stm32_boot.c
index 59d3822f2fe4796dd820ddf487d56ccf6e2c8d48..e3711ec9bada749954f90ff3e076bb963f202b7d 100644
--- a/configs/stm32l476vg-disco/src/stm32_boot.c
+++ b/configs/stm32l476vg-disco/src/stm32_boot.c
@@ -81,12 +81,12 @@ void stm32l4_boardinitialize(void)
   stm32l4_spiinitialize();
 #endif
 
-  /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
+#ifdef CONFIG_STM32L4_OTGFS
+  /* Initialize USB if the 1) OTG FS controller is in the configuration and 2)
    * disabled, and 3) the weak function stm32_usbinitialize() has been brought
-   * into the build.
+   * into the build. Presumably either CONFIG_USBDEV or CONFIG_USBHOST is also
+   * selected.
    */
-
-#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB)
   stm32l4_usbinitialize();
 #endif
 }
diff --git a/configs/stm32l476vg-disco/src/stm32_buttons.c b/configs/stm32l476vg-disco/src/stm32_buttons.c
index 6a49927e80217458ebe1bc7077c7cfb7e334d39b..1d85b278756666c87c640738a38abae3ff726b70 100644
--- a/configs/stm32l476vg-disco/src/stm32_buttons.c
+++ b/configs/stm32l476vg-disco/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/stm32l476vg-disco/src/stm32_buttons.c
  *
- *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: dev@ziggurat29.com
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -176,7 +177,7 @@ static void button_pm_notify(struct pm_callback_s *cb, int domain,
 
 #if 0
 #ifdef CONFIG_ARCH_IRQBUTTONS
-static int button_handler(int irq, FAR void *context)
+static int button_handler(int irq, FAR void *context, FAR void *arg)
 {
 #ifdef CONFIG_PM
   /* At this point the MCU should have already awakened.  The state
@@ -244,19 +245,13 @@ void board_button_initialize(void)
     {
       stm32l4_configgpio(g_buttons[i]);
 
-  /* It's not clear if this is correct; I think so, but then there are
-   * conflicts with the 'buttons' sample app.
-   */
+      /* It's not clear if this is correct; I think so, but then there are
+       * conflicts with the 'buttons' sample app.
+       */
 
 #if 0
 #ifdef CONFIG_ARCH_IRQBUTTONS
-      xcpt_t oldhandler = board_button_irq(i, button_handler);
-      if (oldhandler != NULL)
-        {
-          lowsyslog(LOG_WARNING, "WARNING: oldhandler:%p is not NULL!  "
-                   "Button events may be lost or aliased!\n",
-                   oldhandler);
-        }
+      (void)board_button_irq(i, button_handler);
 #endif
 #endif
     }
@@ -319,24 +314,23 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   /* The following should be atomic */
 
   if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
     {
-      oldhandler = stm32l4_gpiosetevent(g_buttons[id], true, true, true, irqhandler);
+      ret = stm32l4_gpiosetevent(g_buttons[id], true, true, true, irqhandler, arg);
     }
 
-  return oldhandler;
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/stm32l476vg-disco/src/stm32_spi.c b/configs/stm32l476vg-disco/src/stm32_spi.c
index c37d3a7a7c6460f06069b981af7cb06565dcaaba..3b8420c62afb11ac00eb28685174d0b1507d1a99 100644
--- a/configs/stm32l476vg-disco/src/stm32_spi.c
+++ b/configs/stm32l476vg-disco/src/stm32_spi.c
@@ -55,29 +55,6 @@
 
 #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_SPI
-#  undef CONFIG_DEBUG_VERBOSE
-#endif
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /************************************************************************************
  * Public Data
  ************************************************************************************/
@@ -113,7 +90,7 @@ void weak_function stm32_spiinitialize(void)
   g_spi1 = up_spiinitialize(1);
   if (!g_spi1)
     {
-      spidbg("[boot] FAILED to initialize SPI port 1\n");
+      spierr("ERROR: [boot] FAILED to initialize SPI port 1\n");
     }
 
 #ifdef CONFIG_WL_CC3000
@@ -168,7 +145,7 @@ void weak_function stm32_spiinitialize(void)
 #ifdef CONFIG_STM32_SPI1
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
 #ifdef CONFIG_WL_CC3000
   if (devid == SPIDEV_WIRELESS)
@@ -194,7 +171,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI2
 void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
 #ifdef CONFIG_WL_CC3000
   if (devid == SPIDEV_WIRELESS)
@@ -213,7 +190,7 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI3
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
diff --git a/configs/stm32l476vg-disco/src/stm32_usb.c b/configs/stm32l476vg-disco/src/stm32_usb.c
new file mode 100644
index 0000000000000000000000000000000000000000..0f51871e1ac000c2b642404a000ac534b19b1a16
--- /dev/null
+++ b/configs/stm32l476vg-disco/src/stm32_usb.c
@@ -0,0 +1,337 @@
+/************************************************************************************
+ * configs/stm32f4discovery/src/stm32_usb.c
+ *
+ *   Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "up_arch.h"
+#include "stm32l4.h"
+#include "stm32l4_otgfs.h"
+#include "stm32l476vg-disco.h"
+
+#ifdef CONFIG_STM32L4_OTGFS
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST)
+#  define HAVE_USB 1
+#else
+#  warning "CONFIG_STM32L4_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST"
+#  undef HAVE_USB
+#endif
+
+#ifndef CONFIG_STM32L4DISCO_USBHOST_PRIO
+#  define CONFIG_STM32L4DISCO_USBHOST_PRIO 100
+#endif
+
+#ifndef CONFIG_STM32L4DISCO_USBHOST_STACKSIZE
+#  define CONFIG_STM32L4DISCO_USBHOST_STACKSIZE 1024
+#endif
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+#ifdef CONFIG_USBHOST
+static struct usbhost_connection_s *g_usbconn;
+#endif
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: usbhost_waiter
+ *
+ * Description:
+ *   Wait for USB devices to be connected.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_USBHOST
+static int usbhost_waiter(int argc, char *argv[])
+{
+  struct usbhost_hubport_s *hport;
+
+  uvdbg("Running\n");
+  for (;;)
+    {
+      /* Wait for the device to change state */
+
+      DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
+      uvdbg("%s\n", hport->connected ? "connected" : "disconnected");
+
+      /* Did we just become connected? */
+
+      if (hport->connected)
+        {
+          /* Yes.. enumerate the newly connected device */
+
+          (void)CONN_ENUMERATE(g_usbconn, hport);
+        }
+    }
+
+  /* Keep the compiler from complaining */
+
+  return 0;
+}
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32l4_usbinitialize
+ *
+ * Description:
+ *   Called from stm32l4_usbinitialize very early in initialization to setup USB-related
+ *   GPIO pins for the STM32L4Discovery board.
+ *
+ ************************************************************************************/
+
+void stm32l4_usbinitialize(void)
+{
+  /* The OTG FS has an internal soft pull-up.  No GPIO configuration is required */
+
+  /* Configure the OTG FS VBUS sensing GPIO, Power On, and Over current GPIOs */
+
+#ifdef CONFIG_STM32L4_OTGFS
+  stm32l4_configgpio(GPIO_OTGFS_VBUS);
+  stm32l4_configgpio(GPIO_OTGFS_PWRON);
+  stm32l4_configgpio(GPIO_OTGFS_OVER);
+#endif
+}
+
+/***********************************************************************************
+ * Name: stm32l4_usbhost_initialize
+ *
+ * Description:
+ *   Called at application startup time to initialize the USB host functionality.
+ *   This function will start a thread that will monitor for device
+ *   connection/disconnection events.
+ *
+ ***********************************************************************************/
+
+#ifdef CONFIG_USBHOST
+int stm32l4_usbhost_initialize(void)
+{
+  int pid;
+#if defined(CONFIG_USBHOST_HUB)    || defined(CONFIG_USBHOST_MSC) || \
+    defined(CONFIG_USBHOST_HIDKBD) || defined(CONFIG_USBHOST_HIDMOUSE)
+  int ret;
+#endif
+
+  /* First, register all of the class drivers needed to support the drivers
+   * that we care about:
+   */
+
+  uvdbg("Register class drivers\n");
+
+#ifdef CONFIG_USBHOST_HUB
+  /* Initialize USB hub class support */
+
+  ret = usbhost_hub_initialize();
+  if (ret < 0)
+    {
+      udbg("ERROR: usbhost_hub_initialize failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_MSC
+  /* Register the USB mass storage class class */
+
+  ret = usbhost_msc_initialize();
+  if (ret != OK)
+    {
+      udbg("ERROR: Failed to register the mass storage class: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_CDCACM
+  /* Register the CDC/ACM serial class */
+
+  ret = usbhost_cdcacm_initialize();
+  if (ret != OK)
+    {
+      udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_HIDKBD
+  /* Initialize the HID keyboard class */
+
+  ret = usbhost_kbdinit();
+  if (ret != OK)
+    {
+      udbg("Failed to register the HID keyboard class\n");
+    }
+#endif
+
+#ifdef CONFIG_USBHOST_HIDMOUSE
+  /* Initialize the HID mouse class */
+
+  ret = usbhost_mouse_init();
+  if (ret != OK)
+    {
+      udbg("Failed to register the HID mouse class\n");
+    }
+#endif
+
+  /* Then get an instance of the USB host interface */
+
+  uvdbg("Initialize USB host\n");
+  g_usbconn = stm32l4_otgfshost_initialize(0);
+  if (g_usbconn)
+    {
+      /* Start a thread to handle device connection. */
+
+      uvdbg("Start usbhost_waiter\n");
+
+      pid = task_create("usbhost", CONFIG_STM32L4DISCO_USBHOST_PRIO,
+                        CONFIG_STM32L4DISCO_USBHOST_STACKSIZE,
+                        (main_t)usbhost_waiter, (FAR char * const *)NULL);
+      return pid < 0 ? -ENOEXEC : OK;
+    }
+
+  return -ENODEV;
+}
+#endif
+
+/***********************************************************************************
+ * Name: stm32l4_usbhost_vbusdrive
+ *
+ * Description:
+ *   Enable/disable driving of VBUS 5V output.  This function must be provided be
+ *   each platform that implements the STM32 OTG FS host interface
+ *
+ *   "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
+ *    or, if 5 V are available on the application board, a basic power switch, must
+ *    be added externally to drive the 5 V VBUS line. The external charge pump can
+ *    be driven by any GPIO output. When the application decides to power on VBUS
+ *    using the chosen GPIO, it must also set the port power bit in the host port
+ *    control and status register (PPWR bit in OTG_FS_HPRT).
+ *
+ *   "The application uses this field to control power to this port, and the core
+ *    clears this bit on an over current condition."
+ *
+ * Input Parameters:
+ *   iface - For future growth to handle multiple USB host interface.  Should be zero.
+ *   enable - true: enable VBUS power; false: disable VBUS power
+ *
+ * Returned Value:
+ *   None
+ *
+ ***********************************************************************************/
+
+#ifdef CONFIG_USBHOST
+void stm32l4_usbhost_vbusdrive(int iface, bool enable)
+{
+  DEBUGASSERT(iface == 0);
+
+  if (enable)
+    {
+      /* Enable the Power Switch by driving the enable pin low */
+
+      stm32l4_gpiowrite(GPIO_OTGFS_PWRON, false);
+    }
+  else
+    {
+      /* Disable the Power Switch by driving the enable pin high */
+
+      stm32l4_gpiowrite(GPIO_OTGFS_PWRON, true);
+    }
+}
+#endif
+
+/************************************************************************************
+ * Name: stm32l4_setup_overcurrent
+ *
+ * Description:
+ *   Setup to receive an interrupt-level callback if an over current condition is
+ *   detected.
+ *
+ * Input Parameter:
+ *   handler - New over current interrupt handler
+ *
+ * Returned value:
+ *   Old over current interrupt handler
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_USBHOST
+xcpt_t stm32l4_setup_overcurrent(xcpt_t handler)
+{
+  (void)stm32l4_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler, NULL);
+  return NULL;
+}
+#endif
+
+/************************************************************************************
+ * Name:  stm32l4_usbsuspend
+ *
+ * Description:
+ *   Board logic must provide the stm32l4_usbsuspend logic if the USBDEV driver is
+ *   used.  This function is called whenever the USB enters or leaves suspend mode.
+ *   This is an opportunity for the board logic to shutdown clocks, power, etc.
+ *   while the USB is suspended.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_USBDEV
+void stm32l4_usbsuspend(FAR struct usbdev_s *dev, bool resume)
+{
+  uinfo("resume: %d\n", resume);
+}
+#endif
+
+#endif /* CONFIG_STM32L4_OTGFS */
diff --git a/configs/stm32l476vg-disco/src/stm32_userleds.c b/configs/stm32l476vg-disco/src/stm32_userleds.c
index 5e5c56d5f2c4451348c9728c5db98290ce46e0a4..4bee92bde819ff5eae619be1400a5184582639bb 100644
--- a/configs/stm32l476vg-disco/src/stm32_userleds.c
+++ b/configs/stm32l476vg-disco/src/stm32_userleds.c
@@ -54,22 +54,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Function Prototypes
  ****************************************************************************/
diff --git a/configs/stm32l476vg-disco/src/stm32l476vg-disco.h b/configs/stm32l476vg-disco/src/stm32l476vg-disco.h
index 4331d064d54b896b147e49b493db90bd444d2cc1..dfa9b4ebfa0b86bf97cea70a6e247cc91e98464f 100644
--- a/configs/stm32l476vg-disco/src/stm32l476vg-disco.h
+++ b/configs/stm32l476vg-disco/src/stm32l476vg-disco.h
@@ -59,6 +59,9 @@
 #define HAVE_N25QXXX_NXFFS    1
 #define HAVE_N25QXXX_SMARTFS  1
 #define HAVE_N25QXXX_CHARDEV  1
+#define HAVE_USBDEV           1
+#define HAVE_USBHOST          1
+#define HAVE_USBMONITOR       1
 
 #if !defined(CONFIG_FS_PROCFS)
 #  undef HAVE_PROC
@@ -124,6 +127,55 @@
 
 #define PROGMEM_MTD_MINOR 1
 
+/* Can't support USB host or device features if USB OTG FS is not enabled */
+
+#ifndef CONFIG_STM32L4_OTGFS
+#  undef HAVE_USBDEV
+#  undef HAVE_USBHOST
+#  undef HAVE_USBMONITOR
+#endif
+
+/* Can't support USB device monitor if USB device is not enabled */
+
+#ifndef CONFIG_USBDEV
+#  undef HAVE_USBDEV
+#  undef HAVE_USBMONITOR
+#endif
+
+/* Can't support USB host is USB host is not enabled */
+
+#ifndef CONFIG_USBHOST
+#  undef HAVE_USBHOST
+#endif
+
+/* Check if we should enable the USB monitor before starting NSH */
+
+#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_SYSTEM_USBMONITOR)
+#  undef HAVE_USBMONITOR
+#endif
+
+/* USB OTG FS
+ *
+ * PC11  OTG_FS_VBUS VBUS sensing (also connected to the green LED)
+ * PC9   OTG_FS_PowerSwitchOn
+ * PC10  OTG_FS_Overcurrent
+ */
+
+#define GPIO_OTGFS_VBUS   (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
+                           GPIO_OPENDRAIN|GPIO_PORTC|GPIO_PIN11)
+#define GPIO_OTGFS_PWRON  (GPIO_OUTPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
+                           GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9)
+
+#ifdef CONFIG_USBHOST
+#  define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_EXTI|GPIO_FLOAT|\
+                           GPIO_SPEED_100MHz|GPIO_PUSHPULL|\
+                           GPIO_PORTC|GPIO_PIN10)
+
+#else
+#  define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
+                           GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN10)
+#endif
+
 /* LED.
  * LD4: the red LED on PB2
  * LD5: the green LED on PE8
@@ -211,25 +263,13 @@ extern struct spi_dev_s *g_spi2;
 void stm32_spiinitialize(void);
 
 /************************************************************************************
- * Name: stm32_usbinitialize
+ * Name: stm32l4_usbinitialize
  *
  * Description:
  *   Called to setup USB-related GPIO pins.
  *
  ************************************************************************************/
 
-void stm32_usbinitialize(void);
-
-/************************************************************************************
- * Name: board_adc_initialize
- *
- * Description:
- *   Initialize and register the ADC driver(s)
- *
- ************************************************************************************/
-
-#ifdef CONFIG_ADC
-int board_adc_initialize(void);
-#endif
+void stm32l4_usbinitialize(void);
 
 #endif /* __CONFIGS_STM32L476VG_DISCO_SRC_STM32L476VG_DISCO_H */
diff --git a/configs/stm32ldiscovery/Kconfig b/configs/stm32ldiscovery/Kconfig
index 2d37b4e88db9311339e2de0c913660cb34069d2a..34e1f833880d0e0bb2656aab37cf0b357347e13a 100644
--- a/configs/stm32ldiscovery/Kconfig
+++ b/configs/stm32ldiscovery/Kconfig
@@ -4,4 +4,10 @@
 #
 
 if ARCH_BOARD_STM32FL_DISCOVERY
+
+config STM32LDISCO_QETIMER
+	int "Timer to use with QE encoder"
+	default 3
+	depends on QENCODER
+
 endif
diff --git a/configs/stm32ldiscovery/README.txt b/configs/stm32ldiscovery/README.txt
index 532fbe198cd43f5fe93c5db49ff5428bd41492be..4158273b5add37da8788b3127b1dbe4a51699d15 100644
--- a/configs/stm32ldiscovery/README.txt
+++ b/configs/stm32ldiscovery/README.txt
@@ -707,7 +707,7 @@ STM32L-Discovery-specific Configuration Options
     CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
     CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
     CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
-    CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+    CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
       dump of all CAN registers.
 
   STM32L-Discovery SPI Configuration
@@ -813,8 +813,8 @@ Configuration sub-directories
          CONFIG_LCD=y                            : (Needed to enable LCD debug)
 
        Build Setup -> Debug Options:
-         CONFIG_DEBUG=y                          : Enable debug features
-         CONFIG_DEBUG_VERBOSE=y                  : Enable LCD debug
+         CONFIG_DEBUG_FEATURES=y                 : Enable debug features
+         CONFIG_DEBUG_INFO=y                     : Enable LCD debug
 
        NOTE:  At this point in time, testing of the SLCD is very limited because
        there is not much in apps/examples/slcd.  Certainly there are more bugs
diff --git a/configs/stm32ldiscovery/nsh/Make.defs b/configs/stm32ldiscovery/nsh/Make.defs
index fc936f8f9da0a439c6a0a65be5c64e0ba3c489fa..1d4b9050ccaeee23df647d742513c7660739a48d 100644
--- a/configs/stm32ldiscovery/nsh/Make.defs
+++ b/configs/stm32ldiscovery/nsh/Make.defs
@@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32ldiscovery/nsh/defconfig b/configs/stm32ldiscovery/nsh/defconfig
index d497e5e5d923f2bcee9d74a4c7951b4a2c6b3fa5..4261827aa33c7a36993c26b4ae4641461818b2df 100644
--- a/configs/stm32ldiscovery/nsh/defconfig
+++ b/configs/stm32ldiscovery/nsh/defconfig
@@ -46,10 +46,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +65,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,7 +77,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -207,6 +207,7 @@ CONFIG_ARCH_CHIP_STM32L152RB=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -412,6 +413,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
 # CONFIG_STM32_TIM9_CAP is not set
@@ -423,9 +430,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -522,11 +537,11 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -542,9 +557,12 @@ CONFIG_DISABLE_ENVIRON=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=5
@@ -630,6 +648,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=1536
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -645,6 +664,7 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
@@ -658,8 +678,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -667,6 +697,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -675,9 +706,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -723,19 +755,25 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -765,12 +803,6 @@ CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -807,7 +839,7 @@ CONFIG_BINFMT_DISABLE=y
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -828,7 +860,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -836,8 +867,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -858,16 +891,15 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -876,20 +908,18 @@ CONFIG_ARCH_HAVE_TLS=y
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -901,9 +931,9 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -925,8 +955,8 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -989,7 +1019,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 CONFIG_NSH_DISABLE_MKDIR=y
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 CONFIG_NSH_DISABLE_MKRD=y
 # CONFIG_NSH_DISABLE_MH is not set
 CONFIG_NSH_DISABLE_MOUNT=y
@@ -1011,6 +1040,7 @@ CONFIG_NSH_DISABLE_UNAME=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 CONFIG_NSH_DISABLE_WGET=y
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1045,12 +1075,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1058,6 +1088,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32ldiscovery/src/stm32_appinit.c b/configs/stm32ldiscovery/src/stm32_appinit.c
index 359e271eb95569d966b195b68b9fa1c4d999e6de..30db4f50f284594cdde8115a8824e899cbffb36c 100644
--- a/configs/stm32ldiscovery/src/stm32_appinit.c
+++ b/configs/stm32ldiscovery/src/stm32_appinit.c
@@ -47,10 +47,6 @@
 
 #include "stm32ldiscovery.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -82,11 +78,40 @@
 
 int board_app_initialize(uintptr_t arg)
 {
+  int ret = OK;
+
 #ifdef CONFIG_STM32_LCD
   /* Initialize the SLCD and register the SLCD device as /dev/slcd */
 
-  return stm32_slcd_initialize();
-#else
-  return OK;
+  ret = stm32_slcd_initialize();
+  if (ret != OK)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_slcd_initialize failed: %d\n", ret);
+      return ret;
+    }
 #endif
+
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device. */
+
+  ret = stm32_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_pwm_setup() failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_QENCODER
+  /* Initialize and register the qencoder driver */
+
+  ret = stm32_qencoder_initialize("/dev/qe0", CONFIG_STM32LDISCO_QETIMER);
+  if (ret != OK)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to register the qencoder: %d\n",
+             ret);
+    }
+#endif
+
+  return ret;
 }
diff --git a/configs/stm32ldiscovery/src/stm32_autoleds.c b/configs/stm32ldiscovery/src/stm32_autoleds.c
index 073391b938be01fc0c05b61a8de145a74ceca16b..5f4ea2e0318c209e03b3281e3424d00a352b3193 100644
--- a/configs/stm32ldiscovery/src/stm32_autoleds.c
+++ b/configs/stm32ldiscovery/src/stm32_autoleds.c
@@ -73,26 +73,6 @@
  *   LED_IDLE             STM32 is is sleep mode       Not used
  */
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/stm32ldiscovery/src/stm32_buttons.c b/configs/stm32ldiscovery/src/stm32_buttons.c
index 5427ac751b116eac504de5cbb62476f3efcd8940..f599b0c851769bec67bb3d78388cca46cecbb2a7 100644
--- a/configs/stm32ldiscovery/src/stm32_buttons.c
+++ b/configs/stm32ldiscovery/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/stm32ldiscovery/src/board_buttons.c
  *
- *   Copyright (C) 2013-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -49,18 +50,10 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /* Pin configuration for each STM32F3Discovery button.  This array is indexed by
  * the BUTTON_* definitions in board.h
  */
@@ -146,24 +139,23 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   /* The following should be atomic */
 
   if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
     {
-      oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler, arg);
     }
 
-  return oldhandler;
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/stm32ldiscovery/src/stm32_lcd.c b/configs/stm32ldiscovery/src/stm32_lcd.c
index 3c249a76d91e4eb9356a8bf8fd05c09179b24ebf..1f4a843c87f913501f6ba281c9ceb82751eca98d 100644
--- a/configs/stm32ldiscovery/src/stm32_lcd.c
+++ b/configs/stm32ldiscovery/src/stm32_lcd.c
@@ -76,24 +76,12 @@
  ****************************************************************************/
 /* Configuration ************************************************************/
 
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug
- * must also be enabled.
- */
+/* Define CONFIG_DEBUG_LCD_INFO to enable detailed LCD debug output. */
 
 #ifndef CONFIG_LIB_SLCDCODEC
 #  error "This SLCD driver requires CONFIG_LIB_SLCDCODEC"
 #endif
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
 /* The ever-present MIN/MAX macros ******************************************/
 
 #ifndef MIN
@@ -259,16 +247,6 @@
                               (((uint32_t)(s) & 0x03) << 14)
 #define SLCD_CHAR6_UPDATE3(s) SLCD_CHAR6_UPDATE2(s)
 
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg              dbg
-#  define lcdvdbg             vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Type Definition
  ****************************************************************************/
@@ -298,7 +276,7 @@ struct stm32_slcdstate_s
  ****************************************************************************/
 /* Debug */
 
-#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_LCD_INFO
 static void slcd_dumpstate(FAR const char *msg);
 static void slcd_dumpslcd(FAR const char *msg);
 #else
@@ -440,19 +418,19 @@ static uint32_t g_slcdgpio[BOARD_SLCD_NGPIOS] =
  * Name: slcd_dumpstate
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_LCD_INFO
 static void slcd_dumpstate(FAR const char *msg)
 {
-  lcdvdbg("%s:\n", msg);
-  lcdvdbg("  curpos: %d\n",
+  lcdinfo("%s:\n", msg);
+  lcdinfo("  curpos: %d\n",
           g_slcdstate.curpos);
-  lcdvdbg("  Display: [%c%c%c%c%c%c]\n",
+  lcdinfo("  Display: [%c%c%c%c%c%c]\n",
           g_slcdstate.buffer[0], g_slcdstate.buffer[1], g_slcdstate.buffer[2],
           g_slcdstate.buffer[3], g_slcdstate.buffer[4], g_slcdstate.buffer[5]);
-  lcdvdbg("  Options: [%d%d%d%d%d%d]\n",
+  lcdinfo("  Options: [%d%d%d%d%d%d]\n",
           g_slcdstate.options[0], g_slcdstate.options[1], g_slcdstate.options[2],
           g_slcdstate.options[3], g_slcdstate.options[4], g_slcdstate.options[5]);
-  lcdvdbg("  Bar:     %02x %02x\n",
+  lcdinfo("  Bar:     %02x %02x\n",
           g_slcdstate.bar[0], g_slcdstate.bar[1]);
 }
 #endif
@@ -461,14 +439,14 @@ static void slcd_dumpstate(FAR const char *msg)
  * Name: slcd_dumpslcd
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_LCD_INFO
 static void slcd_dumpslcd(FAR const char *msg)
 {
-  lcdvdbg("%s:\n", msg);
-  lcdvdbg("  CR: %08x FCR: %08x SR: %08x CLR: %08x\n",
+  lcdinfo("%s:\n", msg);
+  lcdinfo("  CR: %08x FCR: %08x SR: %08x CLR: %08x\n",
           getreg32(STM32_LCD_CR), getreg32(STM32_LCD_FCR),
           getreg32(STM32_LCD_SR), getreg32(STM32_LCD_CLR));
-  lcdvdbg("  RAM0L: %08x RAM1L: %08x RAM2L: %08x RAM3L: %08x\n",
+  lcdinfo("  RAM0L: %08x RAM1L: %08x RAM2L: %08x RAM3L: %08x\n",
           getreg32(STM32_LCD_RAM0L), getreg32(STM32_LCD_RAM1L),
           getreg32(STM32_LCD_RAM2L), getreg32(STM32_LCD_RAM3L));
 }
@@ -482,7 +460,7 @@ static void slcd_clear(void)
 {
   uint32_t regaddr;
 
-  lvdbg("Clearing\n");
+  linfo("Clearing\n");
 
   /* Make sure that any previous transfer is complete.  The firmware sets
    * the UDR each it modifies the LCD_RAM. The UDR bit stays set until the
@@ -565,7 +543,7 @@ static int slcd_setcontrast(uint8_t contrast)
   regval |= contrast << LCD_FCR_CC_SHIFT;
   putreg32(regval, STM32_LCD_FCR);
 
-  lcdvdbg("contrast: %d FCR: %08x\n",
+  lcdinfo("contrast: %d FCR: %08x\n",
           getreg32(STM32_LCD_FCR), contrast);
 
   return ret;
@@ -579,7 +557,7 @@ static void slcd_writebar(void)
 {
   uint32_t regval;
 
-  lcdvdbg("bar: %02x %02x\n", g_slcdstate.bar[0], g_slcdstate.bar[1]);
+  lcdinfo("bar: %02x %02x\n", g_slcdstate.bar[0], g_slcdstate.bar[1]);
   slcd_dumpslcd("BEFORE WRITE");
 
   /* Make sure that any previous transfer is complete.  The firmware sets
@@ -695,7 +673,7 @@ static inline void slcd_writemem(uint16_t segset, int curpos)
   int i;
   int j;
 
-  lcdvdbg("segset: %04x curpos: %d\n", segset, curpos);
+  lcdinfo("segset: %04x curpos: %d\n", segset, curpos);
   slcd_dumpslcd("BEFORE WRITE");
 
   /* Isolate the least significant bits
@@ -714,7 +692,7 @@ static inline void slcd_writemem(uint16_t segset, int curpos)
       segments[j] = (segset >> i) & 0x0f;
     }
 
-  lcdvdbg("segments: %02x %02x %02x %02x\n",
+  lcdinfo("segments: %02x %02x %02x %02x\n",
           segments[0], segments[1], segments[2], segments[3]);
 
   /* Make sure that any previous transfer is complete.  The firmware sets
@@ -859,7 +837,7 @@ static void slcd_writech(uint8_t ch, uint8_t curpos, uint8_t options)
       segset |= 0x0020;
     }
 
-  lcdvdbg("ch: [%c] options: %02x segset: %04x\n", ch, options, segset);
+  lcdinfo("ch: [%c] options: %02x segset: %04x\n", ch, options, segset);
 
   /* Decode the value and write it to the SLCD segment memory */
 
@@ -879,7 +857,7 @@ static void slcd_writech(uint8_t ch, uint8_t curpos, uint8_t options)
 
 static void slcd_appendch(uint8_t ch, uint8_t options)
 {
-  lcdvdbg("ch: [%c] options: %02x\n", ch, options);
+  lcdinfo("ch: [%c] options: %02x\n", ch, options);
 
   /* Write the character at the current cursor position */
 
@@ -898,7 +876,7 @@ static void slcd_appendch(uint8_t ch, uint8_t options)
 
 static void slcd_action(enum slcdcode_e code, uint8_t count)
 {
-  lcdvdbg("Action: %d count: %d\n", code, count);
+  lcdinfo("Action: %d count: %d\n", code, count);
   slcd_dumpstate("BEFORE ACTION");
 
   switch (code)
@@ -1152,7 +1130,7 @@ static ssize_t slcd_write(FAR struct file *filep,
   memset(&state, 0, sizeof(struct slcdstate_s));
   result = slcd_decode(&instream.stream, &state, &prev, &count);
 
-  lcdvdbg("slcd_decode returned result=%d char=%d count=%d\n",
+  lcdinfo("slcd_decode returned result=%d char=%d count=%d\n",
            result, prev, count);
 
   switch (result)
@@ -1176,7 +1154,7 @@ static ssize_t slcd_write(FAR struct file *filep,
 
   while ((result = slcd_decode(&instream.stream, &state, &ch, &count)) != SLCDRET_EOF)
     {
-      lcdvdbg("slcd_decode returned result=%d char=%d count=%d\n",
+      lcdinfo("slcd_decode returned result=%d char=%d count=%d\n",
               result, ch, count);
 
       if (result == SLCDRET_CHAR)          /* A normal character was returned */
@@ -1329,7 +1307,7 @@ static int slcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
         {
           FAR struct slcd_attributes_s *attr = (FAR struct slcd_attributes_s *)((uintptr_t)arg);
 
-          lcdvdbg("SLCDIOC_GETATTRIBUTES:\n");
+          lcdinfo("SLCDIOC_GETATTRIBUTES:\n");
 
           if (!attr)
             {
@@ -1354,7 +1332,7 @@ static int slcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
         {
           FAR struct slcd_curpos_s *curpos = (FAR struct slcd_curpos_s *)((uintptr_t)arg);
 
-          lcdvdbg("SLCDIOC_CURPOS: row=0 column=%d\n", g_slcdstate.curpos);
+          lcdinfo("SLCDIOC_CURPOS: row=0 column=%d\n", g_slcdstate.curpos);
 
           if (!curpos)
             {
@@ -1373,7 +1351,7 @@ static int slcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case SLCDIOC_SETBAR:
         {
-          lcdvdbg("SLCDIOC_SETBAR: arg=0x%02lx\n", arg);
+          lcdinfo("SLCDIOC_SETBAR: arg=0x%02lx\n", arg);
 
           /* Format the bar */
 
@@ -1421,7 +1399,7 @@ static int slcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
             }
 
           *contrast = (int)slcd_getcontrast();
-          lcdvdbg("SLCDIOC_GETCONTRAST: contrast=%d\n", *contrast);
+          lcdinfo("SLCDIOC_GETCONTRAST: contrast=%d\n", *contrast);
         }
         break;
 
@@ -1432,7 +1410,7 @@ static int slcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case SLCDIOC_SETCONTRAST:
         {
-          lcdvdbg("SLCDIOC_SETCONTRAST: arg=%ld\n", arg);
+          lcdinfo("SLCDIOC_SETCONTRAST: arg=%ld\n", arg);
 
           if (arg > SLCD_MAXCONTRAST)
             {
@@ -1498,7 +1476,7 @@ int stm32_slcd_initialize(void)
 
   if (!g_slcdstate.initialized)
     {
-      lcdvdbg("Initializing\n");
+      lcdinfo("Initializing\n");
 
       /* Configure LCD GPIO pins */
 
@@ -1515,7 +1493,7 @@ int stm32_slcd_initialize(void)
 
       stm32_rcc_enablelse();
 
-      lcdvdbg("APB1ENR: %08x CSR: %08x\n",
+      lcdinfo("APB1ENR: %08x CSR: %08x\n",
               getreg32(STM32_RCC_APB1ENR), getreg32(STM32_RCC_CSR));
 
       /* Set the LCD prescaler and divider values */
@@ -1527,7 +1505,7 @@ int stm32_slcd_initialize(void)
 
       /* Wait for the FCRSF flag to be set */
 
-      lcdvdbg("Wait for FCRSF, FSR: %08x SR: %08x\n",
+      lcdinfo("Wait for FCRSF, FSR: %08x SR: %08x\n",
               getreg32(STM32_LCD_FCR), getreg32(STM32_LCD_SR));
 
       while ((getreg32(STM32_LCD_SR) & LCD_SR_FCRSF) == 0);
@@ -1564,7 +1542,7 @@ int stm32_slcd_initialize(void)
 
       /* Wait Until the LCD FCR register is synchronized */
 
-      lcdvdbg("Wait for FCRSF, FSR: %08x SR: %08x\n",
+      lcdinfo("Wait for FCRSF, FSR: %08x SR: %08x\n",
               getreg32(STM32_LCD_FCR), getreg32(STM32_LCD_SR));
 
       while ((getreg32(STM32_LCD_SR) & LCD_SR_FCRSF) == 0);
@@ -1575,7 +1553,7 @@ int stm32_slcd_initialize(void)
 
       /* Wait Until the LCD is enabled and the LCD booster is ready */
 
-      lcdvdbg("Wait for LCD_SR_ENS and LCD_SR_RDY, CR: %08x SR: %08x\n",
+      lcdinfo("Wait for LCD_SR_ENS and LCD_SR_RDY, CR: %08x SR: %08x\n",
               getreg32(STM32_LCD_CR), getreg32(STM32_LCD_SR));
 
       while ((getreg32(STM32_LCD_SR) & (LCD_SR_ENS | LCD_SR_RDY)) != (LCD_SR_ENS | LCD_SR_RDY));
diff --git a/configs/stm32ldiscovery/src/stm32_pwm.c b/configs/stm32ldiscovery/src/stm32_pwm.c
index 60eeb9bfcb7a35bcc481bce411a17fb7864fb276..908307565ceeec062bd989d735eaf41546fbc1a5 100644
--- a/configs/stm32ldiscovery/src/stm32_pwm.c
+++ b/configs/stm32ldiscovery/src/stm32_pwm.c
@@ -1,8 +1,7 @@
 /************************************************************************************
  * configs/stm32ldiscovery/src/up_pwm.c
- * arch/arm/src/board/up_pwm.c
  *
- *   Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -44,7 +43,7 @@
 #include 
 
 #include 
-#include 
+#include 
 
 #include 
 
@@ -59,9 +58,9 @@
 /* Configuration *******************************************************************/
 /* PWM
  *
- * The stm32ldiscovery has no real on-board PWM devices, but the board can be configured to output
- * a pulse train using TIM4 CH2.  This pin is used by FSMC is connect to CN5 just for this
- * purpose:
+ * The stm32ldiscovery has no real on-board PWM devices, but the board can be
+ * configured to output a pulse train using TIM4 CH2.  This pin is used by FSMC is
+ * connected to CN5 just for this purpose:
  *
  * PD13 FSMC_A18 / MC_TIM4_CH2OUT pin 33 (EnB)
  *
@@ -86,27 +85,21 @@
 #  undef HAVE_PWM
 #endif
 
-#ifdef HAVE_PWM
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_pwm_setup
+ * Name: stm32_pwm_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/pwm.
+ *   Initialize PWM and register the PWM device.
  *
  ************************************************************************************/
 
-int board_pwm_setup(void)
+int stm32_pwm_setup(void)
 {
+#ifdef HAVE_PWM
   static bool initialized = false;
   struct pwm_lowerhalf_s *pwm;
   int ret;
@@ -120,7 +113,7 @@ int board_pwm_setup(void)
       pwm = stm32_pwminitialize(STM32F3DISCOVERY_PWMTIMER);
       if (!pwm)
         {
-          dbg("Failed to get the STM32 PWM lower half\n");
+          _err("ERROR: Failed to get the STM32 PWM lower half\n");
           return -ENODEV;
         }
 
@@ -129,7 +122,7 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/pwm0", pwm);
       if (ret < 0)
         {
-          adbg("pwm_register failed: %d\n", ret);
+          aerr("ERROR: pwm_register failed: %d\n", ret);
           return ret;
         }
 
@@ -139,6 +132,8 @@ int board_pwm_setup(void)
     }
 
   return OK;
+#else
+  return -ENODEV;
+#endif
 }
 
-#endif /* HAVE_PWM */
diff --git a/configs/stm32ldiscovery/src/stm32_qencoder.c b/configs/stm32ldiscovery/src/stm32_qencoder.c
index e765750692aa51cd9bd9a24d29ea4bc023160005..7306b14127c3006b67f5145bdea79eeb44192ea8 100644
--- a/configs/stm32ldiscovery/src/stm32_qencoder.c
+++ b/configs/stm32ldiscovery/src/stm32_qencoder.c
@@ -1,8 +1,7 @@
 /************************************************************************************
  * configs/stm32ldiscovery/src/up_qencoder.c
- * arch/arm/src/board/up_qencoder.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -51,83 +50,12 @@
 #include "stm32_qencoder.h"
 #include "stm32ldiscovery.h"
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-/* Configuration *******************************************************************/
-/* Check if we have a timer configured for quadrature encoder -- assume YES. */
-
-#define HAVE_QENCODER 1
-
-/* If TIMn is not enabled (via CONFIG_STM32_TIMn), then the configuration cannot
- * specify TIMn as a quadrature encoder (via CONFIG_STM32_TIMn_QE).
- */
-
-#ifndef CONFIG_STM32_TIM1
-#  undef CONFIG_STM32_TIM1_QE
-#endif
-#ifndef CONFIG_STM32_TIM2
-#  undef CONFIG_STM32_TIM2_QE
-#endif
-#ifndef CONFIG_STM32_TIM3
-#  undef CONFIG_STM32_TIM3_QE
-#endif
-#ifndef CONFIG_STM32_TIM4
-#  undef CONFIG_STM32_TIM4_QE
-#endif
-#ifndef CONFIG_STM32_TIM5
-#  undef CONFIG_STM32_TIM5_QE
-#endif
-#ifndef CONFIG_STM32_TIM8
-#  undef CONFIG_STM32_TIM8_QE
-#endif
-
-/* If the upper-half quadrature encoder driver is not enabled, then we cannot
- * support the quadrature encoder.
- */
-
-#ifndef CONFIG_QENCODER
-#  undef HAVE_QENCODER
-#endif
-
-/* Which Timer should we use, TIMID={1,2,3,4,5,8}.  If multiple timers are
- * configured as quadrature encoders, this logic will arbitrarily select
- * the lowest numbered timer.
- *
- * At least one TIMn, n={1,2,3,4,5,8}, must be both enabled and configured
- * as a quadrature encoder in order to support the lower half quadrature
- * encoder driver.  The above check assures that if CONFIG_STM32_TIMn_QE
- * is defined, then the correspdonding TIMn is also enabled.
- */
-
-#if defined CONFIG_STM32_TIM1_QE
-#  define TIMID 1
-#elif defined CONFIG_STM32_TIM2_QE
-#  define TIMID 2
-#elif defined CONFIG_STM32_TIM3_QE
-#  define TIMID 3
-#elif defined CONFIG_STM32_TIM4_QE
-#  define TIMID 4
-#elif defined CONFIG_STM32_TIM5_QE
-#  define TIMID 5
-#elif defined CONFIG_STM32_TIM8_QE
-#  define TIMID 8
-#else
-#  undef HAVE_QENCODER
-#endif
-
-#ifdef HAVE_QENCODER
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: qe_devinit
+ * Name: stm32_qencoder_initialize
  *
  * Description:
  *   All STM32 architectures must provide the following interface to work with
@@ -135,29 +63,20 @@
  *
  ************************************************************************************/
 
-int qe_devinit(void)
+int stm32_qencoder_initialize(FAR const char *devpath, int timer)
 {
-  static bool initialized = false;
   int ret;
 
-  /* Check if we are already initialized */
+  /* Initialize a quadrature encoder interface. */
 
-  if (!initialized)
+  sninfo("Initializing the quadrature encoder using TIM%d\n", timer);
+  ret = stm32_qeinitialize(devpath, timer);
+  if (ret < 0)
     {
-      /* Initialize a quadrature encoder interface. */
-
-      snvdbg("Initializing the quadrature encoder using TIM%d\n", TIMID);
-      ret = stm32_qeinitialize("/dev/qe0", TIMID);
-      if (ret < 0)
-        {
-          sndbg("stm32_qeinitialize failed: %d\n", ret);
-          return ret;
-        }
-
-      initialized = true;
+      snerr("ERROR: stm32_qeinitialize failed: %d\n", ret);
     }
 
-  return OK;
+  return ret;
 }
 
 #endif /* HAVE_QENCODER */
diff --git a/configs/stm32ldiscovery/src/stm32_spi.c b/configs/stm32ldiscovery/src/stm32_spi.c
index b56ed221fb7f891d482ee28431081c315b98d1db..d923a8b2c9ce1d715cee250e824d805000a71a02 100644
--- a/configs/stm32ldiscovery/src/stm32_spi.c
+++ b/configs/stm32ldiscovery/src/stm32_spi.c
@@ -55,32 +55,6 @@
 
 #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -130,7 +104,7 @@ void weak_function stm32_spidev_initialize(void)
 #ifdef CONFIG_STM32_SPI1
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
   stm32_gpiowrite(GPIO_MEMS_CS, !selected);
 }
@@ -144,7 +118,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI2
 void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -156,7 +130,7 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI3
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
diff --git a/configs/stm32ldiscovery/src/stm32_userleds.c b/configs/stm32ldiscovery/src/stm32_userleds.c
index 4686eb97c7cb93696357e27950876b30ae90b024..a90ff178e9b52c94326e71a4b794c581e2e35bbd 100644
--- a/configs/stm32ldiscovery/src/stm32_userleds.c
+++ b/configs/stm32ldiscovery/src/stm32_userleds.c
@@ -51,22 +51,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/stm32ldiscovery/src/stm32ldiscovery.h b/configs/stm32ldiscovery/src/stm32ldiscovery.h
index 1bd424f37623126fee2f8b147cd365d89ec5d1c9..c8d05a2c44e8fbc9901968e8261893f1d7cc6b62 100644
--- a/configs/stm32ldiscovery/src/stm32ldiscovery.h
+++ b/configs/stm32ldiscovery/src/stm32ldiscovery.h
@@ -2,7 +2,7 @@
  * configs/stm32ldiscovery/src/stm32ldiscovery.h
  * arch/arm/src/board/stm32ldiscovery.h
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -243,6 +243,30 @@
 
 void weak_function stm32_spidev_initialize(void);
 
+/************************************************************************************
+ * Name: stm32_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PWM
+int stm32_pwm_setup(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_qencoder_initialize
+ *
+ * Description:
+ *   Initialize and register a qencoder
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_QENCODER
+int stm32_qencoder_initialize(FAR const char *devpath, int timer);
+#endif
+
 #endif /* __ASSEMBLY__ */
 #endif /* __CONFIGS_STM32F3DISCOVERY_SRC_STM32F3DISCOVERY_H */
 
diff --git a/configs/stm32vldiscovery/README.txt b/configs/stm32vldiscovery/README.txt
index 28986df04dd6477098057794f4e9304c6f9e7f54..963a85ff7cf26834a2975930f57c32f122f6b9f3 100644
--- a/configs/stm32vldiscovery/README.txt
+++ b/configs/stm32vldiscovery/README.txt
@@ -342,7 +342,7 @@ RX pin (PA10) of your board besides, of course, the GND pin.
 
     CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
 
-    CONFIG_ARCH_CALIBRATION - when used togeter with CONFIG_DEBUG enables some
+    CONFIG_ARCH_CALIBRATION - when used togeter with CONFIG_DEBUG_FEATURES enables some
 	   build in instrumentation that cause a 100 second delay during boot-up.
 	   This 100 second delay serves no purpose other than it allows you to
 	   calibratre CONFIG_ARCH_LOOPSPERMSEC.  You simply use a stop watch to
diff --git a/configs/stm32vldiscovery/include/board.h b/configs/stm32vldiscovery/include/board.h
index efbb3f3e8cd9f1fbc8ae7f74052b30f42aac1b27..19e167309d3a02b136d511bffa63b4f31183048b 100644
--- a/configs/stm32vldiscovery/include/board.h
+++ b/configs/stm32vldiscovery/include/board.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/stm32vldiscovery/include/board.h
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *           Freddie Chopin 
  *
@@ -110,8 +110,14 @@
  * otherwise frequency is 2xAPBx.
  * Note: TIM1,15-17 are on APB2, others on APB1 */
 
-#define STM32_TIM18_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_TIM27_FREQUENCY   STM32_HCLK_FREQUENCY
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM3_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM4_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM5_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM6_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM7_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM8_FREQUENCY    STM32_HCLK_FREQUENCY
 
 /* LED definitions ******************************************************************/
 
diff --git a/configs/stm32vldiscovery/nsh/Make.defs b/configs/stm32vldiscovery/nsh/Make.defs
index 3f02d1771a7509cfce1c6e6c91bcbf5f12919140..54853c23b572645f896a941f09e81a3d1f4e2f21 100644
--- a/configs/stm32vldiscovery/nsh/Make.defs
+++ b/configs/stm32vldiscovery/nsh/Make.defs
@@ -77,7 +77,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/stm32vldiscovery/nsh/defconfig b/configs/stm32vldiscovery/nsh/defconfig
index d1911fb96169e96763d695db6f12f2c59967fdda..728804b5a158d7a8d1cea3d9174f2498be380637 100644
--- a/configs/stm32vldiscovery/nsh/defconfig
+++ b/configs/stm32vldiscovery/nsh/defconfig
@@ -46,10 +46,12 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,8 +65,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -76,7 +77,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -207,6 +207,7 @@ CONFIG_ARCH_CHIP_STM32F100RB=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -346,7 +347,7 @@ CONFIG_STM32_HAVE_TIM14=y
 CONFIG_STM32_HAVE_TIM15=y
 CONFIG_STM32_HAVE_TIM16=y
 CONFIG_STM32_HAVE_TIM17=y
-CONFIG_STM32_HAVE_ADC2=y
+# CONFIG_STM32_HAVE_ADC2 is not set
 # CONFIG_STM32_HAVE_ADC3 is not set
 # CONFIG_STM32_HAVE_ADC4 is not set
 # CONFIG_STM32_HAVE_ADC1_DMA is not set
@@ -369,7 +370,6 @@ CONFIG_STM32_HAVE_I2C2=y
 # CONFIG_STM32_HAVE_SAIPLL is not set
 # CONFIG_STM32_HAVE_I2SPLL is not set
 # CONFIG_STM32_ADC1 is not set
-# CONFIG_STM32_ADC2 is not set
 CONFIG_STM32_BKP=y
 # CONFIG_STM32_CEC is not set
 # CONFIG_STM32_CRC is not set
@@ -413,6 +413,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -426,9 +432,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -528,7 +542,6 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
@@ -537,6 +550,7 @@ CONFIG_NSH_MMCSDMINOR=0
 #
 # STM32VL-Discovery Hardware Configuration
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -552,9 +566,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_PREALLOC_WDOGS=4
@@ -644,6 +661,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -659,6 +677,7 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
@@ -677,8 +696,18 @@ CONFIG_RTC=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -686,6 +715,7 @@ CONFIG_RTC=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -694,9 +724,10 @@ CONFIG_RTC=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -742,19 +773,25 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -799,12 +836,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -871,7 +902,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -880,8 +910,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -907,17 +939,16 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -926,34 +957,33 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -977,8 +1007,8 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1044,7 +1074,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
@@ -1066,6 +1095,7 @@ CONFIG_NSH_DISABLE_UNAME=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1101,12 +1131,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1114,6 +1144,6 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/stm32vldiscovery/src/stm32_buttons.c b/configs/stm32vldiscovery/src/stm32_buttons.c
index 87442c115e1e7bdb53ca78df5bcda9a68706f88c..259cfee756e9a82a8ad37f69376eef098100c4ee 100644
--- a/configs/stm32vldiscovery/src/stm32_buttons.c
+++ b/configs/stm32vldiscovery/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/stm32vldiscovery/src/stm32_buttons.c
  *
- *   Copyright (C) 2012, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *           Freddie Chopin 
  *
@@ -41,6 +41,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -101,20 +102,21 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   if (id == 0)
-    oldhandler = stm32_gpiosetevent(GPIO_BTN_0, true, true, true, irqhandler);
+    {
+      ret = stm32_gpiosetevent(GPIO_BTN_0, true, true, true, irqhandler, arg);
+    }
 
-  return oldhandler;
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/stm32vldiscovery/src/stm32_leds.c b/configs/stm32vldiscovery/src/stm32_leds.c
index 62cc0a20db0714b9c6d2536d4ff0f7af188e3186..1174511a60d2519c8383f00be7fc856b16f789f7 100644
--- a/configs/stm32vldiscovery/src/stm32_leds.c
+++ b/configs/stm32vldiscovery/src/stm32_leds.c
@@ -54,22 +54,6 @@
 #include "stm32.h"
 #include "stm32vldiscovery.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/sure-pic32mx/README.txt b/configs/sure-pic32mx/README.txt
index 8ce44ce3c73e3bf01945fcb1f5b07aeb36dbe008..07c89ad9d3704e02b50c2a9f193d24fb13dd1cec 100644
--- a/configs/sure-pic32mx/README.txt
+++ b/configs/sure-pic32mx/README.txt
@@ -735,13 +735,13 @@ Where  is one of the following:
 
        File Systems:
          CONFIG_FS_FAT=y            : FAT file system
-                                  : Other FAT options
+                                    : Other FAT options
 
     Debug output for testing the SD card can be enabled using:
 
        Build Setup:
-         CONFIG_DEBUG=y             : Enable debug features
-         CONFIG_DEBUG_VERBOSE=y     : Enable verbose debug output
+         CONFIG_DEBUG_FEATURES=y    : Enable debug features
+         CONFIG_DEBUG_INFO=y        : Enable verbose debug output
          CONFIG_DEBUG_FS=y          : Enable file system debug
          CONFIG_DEBUG_SPI=y         : Enable SPI debug
 
@@ -772,8 +772,8 @@ Where  is one of the following:
        To enable LCD debug output:
 
        Build Setup -> Debug Options:
-         CONFIG_DEBUG=y             : Enable debug features
-         CONFIG_DEBUG_VERBOSE=y     : Enable verbose debug output
+         CONFIG_DEBUG_FEATURES=y             : Enable debug features
+         CONFIG_DEBUG_INFO=y     : Enable verbose debug output
          CONFIG_DEBUG_LCD=y         : Enable LCD debug output
 
        NOTES:
@@ -847,7 +847,6 @@ Where  is one of the following:
        settings do nothing until you enable debug ouput.
 
         Device Drivers -> System Logging Device Options:
-          CONFIG_SYSLOG=y             : Configure SYSLOG output
           CONFIG_SYSLOG_CHAR=y
           CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
 
@@ -883,15 +882,15 @@ Where  is one of the following:
           CONFIG_NSH_ARCHINIT=y                   : Automatically start the USB monitor
 
         Application Configuration -> System NSH Add-Ons:
-          CONFIG_SYSTEM_USBMONITOR=y              : Enable the USB monitor daemon
-          CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
-          CONFIG_SYSTEM_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
-          CONFIG_SYSTEM_USBMONITOR_INTERVAL=1     : Dump trace data every second
-          CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y    : Enable TRACE output
-          CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y
-          CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y
-          CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y
-          CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y
+          CONFIG_USBMONITOR=y              : Enable the USB monitor daemon
+          CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
+          CONFIG_USBMONITOR_PRIORITY=50    : USB monitor daemon priority
+          CONFIG_USBMONITOR_INTERVAL=1     : Dump trace data every second
+          CONFIG_USBMONITOR_TRACEINIT=y    : Enable TRACE output
+          CONFIG_USBMONITOR_TRACECLASS=y
+          CONFIG_USBMONITOR_TRACETRANSFERS=y
+          CONFIG_USBMONITOR_TRACECONTROLLER=y
+          CONFIG_USBMONITOR_TRACEINTERRUPTS=y
 
        NOTE: USB debug output also be enabled in this case.  Both will appear
        on the serial SYSLOG output.  However, the debug output will be
@@ -913,16 +912,12 @@ Where  is one of the following:
         output will come the USB console, and 2) all debug output prior
         to connecting the USB console will be lost:
 
-        Device Drivers -> System Logging Device Options:
-           CONFIG_SYSLOG=n            : Disable SYSLOG output
-
         The second options is to configure a RAM SYLOG device.  This is
         a circular buffer that accumulated debug output in memory.  The
         contents of the circular buffer can be dumped from the NSH command
         line using the 'dmesg' command.
 
         Device Drivers -> System Logging Device Options:
-          CONFIG_SYSLOG=y             : Enables the System Logging feature.
           CONFIG_RAMLOG=y             : Enable the RAM-based logging feature.
           CONFIG_RAMLOG_CONSOLE=n     : (there is no default console device)
           CONFIG_RAMLOG_SYSLOG=y      : This enables the RAM-based logger as the
diff --git a/configs/sure-pic32mx/nsh/Make.defs b/configs/sure-pic32mx/nsh/Make.defs
index 430f95a8f08708a058dcdf5bdbbea7e791d8d40a..9134fd6b253a270395a6a9de965eca284bfa5b4b 100644
--- a/configs/sure-pic32mx/nsh/Make.defs
+++ b/configs/sure-pic32mx/nsh/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sure-pic32mx/nsh/defconfig b/configs/sure-pic32mx/nsh/defconfig
index 25e91c17f2e5a7d37f78e36f6d6bca3ac26db875..3d742cac90135125315202ae49f173491c1bd6cb 100644
--- a/configs/sure-pic32mx/nsh/defconfig
+++ b/configs/sure-pic32mx/nsh/defconfig
@@ -41,13 +41,15 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -61,8 +63,7 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 CONFIG_ARCH_MIPS=y
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -266,12 +267,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
@@ -314,6 +317,8 @@ CONFIG_RAM_SIZE=32768
 #
 CONFIG_ARCH_BOARD_SUREPIC32MX=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD_CUSTOM_DIR="configs/dummy"
+CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD="sure-pic32mx"
 
 #
@@ -324,17 +329,16 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
 CONFIG_ARCH_DBDP11215=y
 # CONFIG_ARCH_DBDP11212 is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -371,6 +375,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=0
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -421,9 +426,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -454,6 +460,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
@@ -471,17 +478,38 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -505,14 +533,11 @@ CONFIG_UART2_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART2_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -529,19 +554,23 @@ CONFIG_UART2_PARITY=0
 CONFIG_UART2_2STOP=0
 # CONFIG_UART2_IFLOWCONTROL is not set
 # CONFIG_UART2_OFLOWCONTROL is not set
+# CONFIG_UART2_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -573,17 +602,12 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -602,6 +626,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -644,11 +672,13 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -667,11 +697,14 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -679,11 +712,11 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -691,33 +724,44 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -729,30 +773,28 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -772,6 +814,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
@@ -780,6 +823,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -788,8 +832,10 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -807,12 +853,15 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -835,6 +884,8 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -848,15 +899,19 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/sure-pic32mx/src/pic32mx_appinit.c b/configs/sure-pic32mx/src/pic32mx_appinit.c
index ef09c7641c93f37a2ca53047fb2cb27f213ebf85..ae36428317f8cc08b7470b9f8bb06495b288b244 100644
--- a/configs/sure-pic32mx/src/pic32mx_appinit.c
+++ b/configs/sure-pic32mx/src/pic32mx_appinit.c
@@ -51,8 +51,8 @@
 #include 
 #include 
 
-#ifdef CONFIG_SYSTEM_USBMONITOR
-#  include 
+#ifdef CONFIG_USBMONITOR
+#  include 
 #endif
 
 #include "pic32mx.h"
@@ -152,7 +152,7 @@
 
 /* Check if we should enable the USB monitor before starting NSH */
 
-#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_SYSTEM_USBMONITOR)
+#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_USBMONITOR)
 #  undef NSH_HAVE_USBMONITOR
 #endif
 
@@ -415,7 +415,7 @@ int board_app_initialize(uintptr_t arg)
     {
       /* Start the USB Monitor */
 
-      ret = usbmonitor_start(0, NULL);
+      ret = usbmonitor_start();
     }
 #endif
 
diff --git a/configs/sure-pic32mx/src/pic32mx_autoleds.c b/configs/sure-pic32mx/src/pic32mx_autoleds.c
index 46cf61993e9beedaa1edbd106fa8419e04a54f84..18e587267cac234007600315b8120a6587c6ff25 100644
--- a/configs/sure-pic32mx/src/pic32mx_autoleds.c
+++ b/configs/sure-pic32mx/src/pic32mx_autoleds.c
@@ -86,22 +86,6 @@
 #define LED_ON  1
 #define LED_NC  2
 
-/* Debug ********************************************************************/
-
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_LEDS)
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  undef CONFIG_DEBUG_LEDS
-#  undef CONFIG_DEBUG_VERBOSE
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private types
  ****************************************************************************/
diff --git a/configs/sure-pic32mx/src/pic32mx_buttons.c b/configs/sure-pic32mx/src/pic32mx_buttons.c
index 62e0330c410713711895d2fa9b634c0043232ada..6c378dd0a6fe1d1fdc11a5e9c52fc17917b83290 100644
--- a/configs/sure-pic32mx/src/pic32mx_buttons.c
+++ b/configs/sure-pic32mx/src/pic32mx_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sure-pic32mx/src/pic32mx_buttons.c
  *
- *   Copyright (C) 2011, 2013-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2013-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -41,6 +41,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -192,8 +193,7 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  *   Interrupts are automatically enabled when the button handler is attached and
  *   automatically disabled when the button handler is detached.
@@ -206,21 +206,21 @@ uint8_t board_buttons(void)
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   if (id < NUM_BUTTONS)
     {
       pic32mx_gpioirqdisable(g_buttoncn[id]);
-      oldhandler = pic32mx_gpioattach(g_buttonset[id], g_buttoncn[id], irqhandler);
-      if (irqhandler != NULL)
+      ret = pic32mx_gpioattach(g_buttonset[id], g_buttoncn[id], irqhandler, arg);
+      if (ret >= 0)
         {
           pic32mx_gpioirqenable(g_buttoncn[id]);
         }
     }
 
-  return oldhandler;
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/sure-pic32mx/src/pic32mx_lcd1602.c b/configs/sure-pic32mx/src/pic32mx_lcd1602.c
index 8911d8dd841fb5d2d8f07f52f4614ef41d4089d7..53663f11e0cb5b132ede58e1d713102c1e2eb0d3 100644
--- a/configs/sure-pic32mx/src/pic32mx_lcd1602.c
+++ b/configs/sure-pic32mx/src/pic32mx_lcd1602.c
@@ -109,20 +109,6 @@
 #  define CONFIG_LCD_MAXPOWER 100
 #endif
 
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
 /* The ever-present MIN/MAX macros ******************************************/
 
 #ifndef MIN
@@ -141,16 +127,6 @@
 
 #define NOP              __asm__ __volatile__ ("nop");
 
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg         dbg
-#  define lcdvdbg        vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Type Definition
  ****************************************************************************/
@@ -179,7 +155,7 @@ struct lcd1602_2
  ****************************************************************************/
 /* Debug */
 
-#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_LCD_INFO
 static void lcd_dumpstate(FAR const char *msg);
 static void lcd_dumpstream(FAR const char *msg,
                            FAR const struct lcd_instream_s *stream);
@@ -243,7 +219,7 @@ static struct lcd1602_2 g_lcd1602;
  * Name: lcd_dumpstate
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_LCD_INFO
 static void lcd_dumpstate(FAR const char *msg)
 {
   uint8_t buffer[LCD_NCOLUMNS];
@@ -251,8 +227,8 @@ static void lcd_dumpstate(FAR const char *msg)
   int row;
   int column;
 
-  lcdvdbg("%s:\n", msg);
-  lcdvdbg("  currow: %d curcol: %d\n",
+  lcdinfo("%s:\n", msg);
+  lcdinfo("  currow: %d curcol: %d\n",
           g_lcd1602.currow, g_lcd1602.curcol);
 
   for (row = 0, column = 0; row < LCD_NROWS; )
@@ -261,7 +237,7 @@ static void lcd_dumpstate(FAR const char *msg)
       buffer[column] = isprint(ch) ? ch : '.';
       if (++column >= LCD_NCOLUMNS)
         {
-          lcdvdbg("  [%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c]\n",
+          lcdinfo("  [%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c]\n",
                   buffer[0],  buffer[1],  buffer[2],  buffer[3],
                   buffer[4],  buffer[5],  buffer[6],  buffer[7],
                   buffer[8],  buffer[9],  buffer[10], buffer[11],
@@ -278,12 +254,12 @@ static void lcd_dumpstate(FAR const char *msg)
  * Name: lcd_dumpstate
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_LCD_INFO
 static void lcd_dumpstream(FAR const char *msg,
                            FAR const struct lcd_instream_s *stream)
 {
-  lcdvdbg("%s:\n", msg);
-  lcdvdbg("  nget: %d nbytes: %d\n",
+  lcdinfo("%s:\n", msg);
+  lcdinfo("  nget: %d nbytes: %d\n",
           stream->stream.nget, stream->nbytes);
   lib_dumpbuffer("STREAM", stream->buffer, stream->nbytes);
 }
@@ -592,7 +568,7 @@ static void lcd_appendch(uint8_t ch)
 
 static void lcd_action(enum slcdcode_e code, uint8_t count)
 {
-  lcdvdbg("Action: %d count: %d\n", code, count);
+  lcdinfo("Action: %d count: %d\n", code, count);
   lcd_dumpstate("BEFORE ACTION");
 
   switch (code)
@@ -874,7 +850,7 @@ static ssize_t lcd_write(FAR struct file *filep,  FAR const char *buffer,
   memset(&state, 0, sizeof(struct slcdstate_s));
   while ((result = slcd_decode(&instream.stream, &state, &ch, &count)) != SLCDRET_EOF)
     {
-      lcdvdbg("slcd_decode returned result=%d char=%d count=%d\n",
+      lcdinfo("slcd_decode returned result=%d char=%d count=%d\n",
               result, ch, count);
 
       if (result == SLCDRET_CHAR)          /* A normal character was returned */
@@ -951,7 +927,7 @@ static int lcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
         {
           FAR struct slcd_attributes_s *attr = (FAR struct slcd_attributes_s *)((uintptr_t)arg);
 
-          lcdvdbg("SLCDIOC_GETATTRIBUTES:\n");
+          lcdinfo("SLCDIOC_GETATTRIBUTES:\n");
 
           if (!attr)
             {
@@ -977,7 +953,7 @@ static int lcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
         {
           FAR struct slcd_curpos_s *curpos = (FAR struct slcd_curpos_s *)((uintptr_t)arg);
 
-          lcdvdbg("SLCDIOC_CURPOS: row=%d column=%d\n", g_lcd1602.currow, g_lcd1602.curcol);
+          lcdinfo("SLCDIOC_CURPOS: row=%d column=%d\n", g_lcd1602.currow, g_lcd1602.curcol);
 
           if (!curpos)
             {
@@ -1004,7 +980,7 @@ static int lcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
             }
 
           *brightness = (int)g_lcd1602.brightness;
-          lcdvdbg("SLCDIOC_GETCONTRAST: brightness=%d\n", *brightness);
+          lcdinfo("SLCDIOC_GETCONTRAST: brightness=%d\n", *brightness);
         }
         break;
 
@@ -1015,7 +991,7 @@ static int lcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case SLCDIOC_SETBRIGHTNESS:
         {
-          lcdvdbg("SLCDIOC_SETCONTRAST: arg=%ld\n", arg);
+          lcdinfo("SLCDIOC_SETCONTRAST: arg=%ld\n", arg);
 
           if (arg > CONFIG_LCD_MAXPOWER)
             {
@@ -1079,7 +1055,7 @@ int up_lcd1602_initialize(void)
 
   if (!g_lcd1602.initialized)
     {
-      lcdvdbg("Initializing\n");
+      lcdinfo("Initializing\n");
 
       /* Configure GPIO pins */
 
diff --git a/configs/sure-pic32mx/src/pic32mx_spi.c b/configs/sure-pic32mx/src/pic32mx_spi.c
index dc7cd4334b29a5ef09d4b3ced511cbabf4924f0a..74671256baa53db8f6da81ae9c02e7559983bb97 100644
--- a/configs/sure-pic32mx/src/pic32mx_spi.c
+++ b/configs/sure-pic32mx/src/pic32mx_spi.c
@@ -118,33 +118,6 @@
 #  define GPIO_SOIC_CS (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTB|GPIO_PIN11)
 #endif
 
-/* The following enable debug output from this file.
- *
- * CONFIG_DEBUG_SPI && CONFIG_DEBUG - Define to enable basic SPI debug
- * CONFIG_DEBUG_VERBOSE - Define to enable verbose SPI debug
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_SPI
-#  undef CONFIG_DEBUG_VERBOSE
-#endif
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -203,7 +176,7 @@ void weak_function pic32mx_spidev_initialize(void)
 #ifdef CONFIG_PIC32MX_SPI2
 void pic32mx_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spivdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
   /* The SD card chip select is pulled high and active low */
 
@@ -263,7 +236,7 @@ uint8_t pic32mx_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
     }
 #endif
 
-  spivdbg("Returning %d\n", ret);
+  spiinfo("Returning %d\n", ret);
   return ret;
 }
 #endif
diff --git a/configs/sure-pic32mx/usbnsh/Make.defs b/configs/sure-pic32mx/usbnsh/Make.defs
index 9eaf383f2df2358d1783fc431d9ae1094f4580d1..3d1b7dee386e5d865c7566b46eff4a515dfe030c 100644
--- a/configs/sure-pic32mx/usbnsh/Make.defs
+++ b/configs/sure-pic32mx/usbnsh/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/sure-pic32mx/usbnsh/defconfig b/configs/sure-pic32mx/usbnsh/defconfig
index 572454b95ab31ed8dc37471e186aad2f68057672..005c5cbaf4b34bd71d181c630a6e45dbbc744d20 100644
--- a/configs/sure-pic32mx/usbnsh/defconfig
+++ b/configs/sure-pic32mx/usbnsh/defconfig
@@ -41,13 +41,15 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -61,8 +63,7 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 CONFIG_ARCH_MIPS=y
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -267,12 +268,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
@@ -315,6 +318,8 @@ CONFIG_RAM_SIZE=32768
 #
 CONFIG_ARCH_BOARD_SUREPIC32MX=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD_CUSTOM_DIR="configs/dummy"
+CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD="sure-pic32mx"
 
 #
@@ -325,18 +330,17 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
 CONFIG_ARCH_DBDP11215=y
 # CONFIG_ARCH_DBDP11212 is not set
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
 CONFIG_BOARDCTL_USBDEVCTRL=y
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -373,6 +377,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=0
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -423,9 +428,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -456,6 +462,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
@@ -473,17 +480,37 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_SERIAL_REMOVABLE=y
+# CONFIG_SERIAL_CONSOLE is not set
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -507,14 +534,11 @@ CONFIG_UART2_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 # CONFIG_UART2_SERIAL_CONSOLE is not set
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -531,6 +555,7 @@ CONFIG_UART2_PARITY=0
 CONFIG_UART2_2STOP=0
 # CONFIG_UART2_IFLOWCONTROL is not set
 # CONFIG_UART2_OFLOWCONTROL is not set
+# CONFIG_UART2_DMA is not set
 CONFIG_USBDEV=y
 
 #
@@ -562,8 +587,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
 CONFIG_CDCACM_EPBULKIN=2
 CONFIG_CDCACM_EPBULKIN_FSSIZE=64
 CONFIG_CDCACM_EPBULKIN_HSSIZE=512
-CONFIG_CDCACM_NWRREQS=4
 CONFIG_CDCACM_NRDREQS=4
+CONFIG_CDCACM_NWRREQS=4
 CONFIG_CDCACM_BULKIN_REQLEN=96
 CONFIG_CDCACM_RXBUFSIZE=256
 CONFIG_CDCACM_TXBUFSIZE=256
@@ -575,14 +600,19 @@ CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+CONFIG_SYSLOG_CHAR=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+CONFIG_SYSLOG_CHAR_CRLF=y
+CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
 
 #
 # Networking Support
@@ -614,19 +644,12 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-CONFIG_SYSLOG=y
-# CONFIG_SYSLOG_TIMESTAMP is not set
-CONFIG_SYSLOG_CHAR=y
-CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
-
 #
 # Graphics Support
 #
@@ -645,6 +668,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -687,11 +714,13 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -710,11 +739,14 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -722,11 +754,11 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -734,33 +766,44 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -772,30 +815,28 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -815,6 +856,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
@@ -823,6 +865,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -831,8 +874,10 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -850,12 +895,15 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -879,6 +927,8 @@ CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_USBCONSOLE is not set
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -892,16 +942,20 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-# CONFIG_SYSTEM_CDCACM is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/teensy-2.0/hello/Make.defs b/configs/teensy-2.0/hello/Make.defs
index 24cf2831919fa9c726f4bd40a5456012c3903847..d5eb3f9c4c8bbc9d3b03c1839016a7069f6c94c5 100644
--- a/configs/teensy-2.0/hello/Make.defs
+++ b/configs/teensy-2.0/hello/Make.defs
@@ -73,7 +73,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/teensy-2.0/hello/defconfig b/configs/teensy-2.0/hello/defconfig
index 423049ad667845e375f90929f818c39365290a71..c1a3fe1b077b940f906bca13d982f395518d1cf2 100644
--- a/configs/teensy-2.0/hello/defconfig
+++ b/configs/teensy-2.0/hello/defconfig
@@ -45,7 +45,7 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
@@ -62,8 +62,7 @@ CONFIG_DEBUG_FULLOPT=y
 CONFIG_ARCH_AVR=y
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -301,7 +300,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
 # CONFIG_16550_UART is not set
@@ -364,7 +362,7 @@ CONFIG_USART1_2STOP=0
 # System Logging
 #
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
 
 #
 # Networking Support
@@ -397,7 +395,6 @@ CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 # CONFIG_SYSLOG_TIMESTAMP is not set
 
 #
@@ -435,7 +432,7 @@ CONFIG_MM_REGIONS=1
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -457,7 +454,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
@@ -517,7 +513,6 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
 # CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -584,7 +579,7 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_RAMTEST is not set
diff --git a/configs/teensy-2.0/nsh/Make.defs b/configs/teensy-2.0/nsh/Make.defs
index 726fc73f85b8b96d3948e365d27d81b2df3267d3..abf35b198bee5544e9d4fe87f894fa9af80d2a55 100644
--- a/configs/teensy-2.0/nsh/Make.defs
+++ b/configs/teensy-2.0/nsh/Make.defs
@@ -73,7 +73,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/teensy-2.0/nsh/defconfig b/configs/teensy-2.0/nsh/defconfig
index eaf3e24cc9eacc51e6ce2854a4181f5c98519e43..905f64dff3467701f35b9cad8042f1db29e77602 100644
--- a/configs/teensy-2.0/nsh/defconfig
+++ b/configs/teensy-2.0/nsh/defconfig
@@ -45,7 +45,7 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
@@ -62,8 +62,7 @@ CONFIG_DEBUG_FULLOPT=y
 CONFIG_ARCH_AVR=y
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -312,7 +311,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 # CONFIG_16550_UART is not set
@@ -376,7 +374,7 @@ CONFIG_USART1_2STOP=0
 # System Logging
 #
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
 
 #
 # Networking Support
@@ -409,7 +407,6 @@ CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 # CONFIG_SYSLOG_TIMESTAMP is not set
 
 #
@@ -448,7 +445,7 @@ CONFIG_MM_REGIONS=1
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 CONFIG_LIB_HOMEDIR="/"
@@ -472,7 +469,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
@@ -530,7 +526,6 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -679,7 +674,7 @@ CONFIG_NSH_CONSOLE=y
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_RAMTEST is not set
diff --git a/configs/teensy-2.0/src/Makefile b/configs/teensy-2.0/src/Makefile
index 48e413ceda33a3eaccfe1650f50a6b81e27d8b8c..b56c428442e2312cc9e7fdfd1e18b2b4b61cdcf5 100644
--- a/configs/teensy-2.0/src/Makefile
+++ b/configs/teensy-2.0/src/Makefile
@@ -1,7 +1,7 @@
 ############################################################################
 # configs/teensy-2.0/src/Makefile
 #
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -41,9 +41,15 @@ CSRCS = at90usb_boot.c
 ifeq ($(CONFIG_ARCH_LEDS),y)
 CSRCS += at90usb_leds.c
 endif
+
+ifeq ($(CONFIG_LIB_BOARDCTL),y)
+CSRCS += at90usb_appinit.c
+endif
+
 ifeq ($(CONFIG_USBMSC),y)
 CSRCS += at90usb_usbmsc.c
 endif
+
 ifeq ($(CONFIG_AVR_SPI),y)
 CSRCS += at90usb_spi.c
 endif
diff --git a/configs/pirelli_dpl10/src/boot.c b/configs/teensy-2.0/src/at90usb_appinit.c
similarity index 94%
rename from configs/pirelli_dpl10/src/boot.c
rename to configs/teensy-2.0/src/at90usb_appinit.c
index 38d1fe8ac2b33463a7deab02517033a996ff242f..ab482aa62f5e8d94518ca9998c18137cc81dfd49 100644
--- a/configs/pirelli_dpl10/src/boot.c
+++ b/configs/teensy-2.0/src/at90usb_appinit.c
@@ -1,8 +1,8 @@
 /****************************************************************************
- * configs/pirelli_dpl10/boot.c
+ * configs/teensy-2.0/src/at90usb_appinit.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
- *   Author:  Gregory Nutt 
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -38,8 +38,12 @@
  ****************************************************************************/
 
 #include 
+
+#include 
 #include 
 
+#ifdef CONFIG_LIB_BOARDCTL
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -69,9 +73,9 @@
  *
  ****************************************************************************/
 
-#ifdef CONFIG_LIB_BOARDCTL
 int board_app_initialize(uintptr_t arg)
 {
-  return 0;
+  return OK;
 }
+
 #endif /* CONFIG_LIB_BOARDCTL */
diff --git a/configs/teensy-2.0/src/at90usb_boot.c b/configs/teensy-2.0/src/at90usb_boot.c
index ad3379a42f09fe3c94bef387b1a2435d78122ae2..93ce9a76ffea330cef1a881b9db5e138331869b2 100644
--- a/configs/teensy-2.0/src/at90usb_boot.c
+++ b/configs/teensy-2.0/src/at90usb_boot.c
@@ -49,14 +49,6 @@
 #include "at90usb.h"
 #include "teensy-20.h"
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -73,20 +65,20 @@
 
 void at90usb_boardinitialize(void)
 {
+#ifdef CONFIG_AVR_SPI
   /* Configure SSP chip selects if 1) at least one SSP is enabled, and 2) the weak
    * function at90usb_spidev_initialize() has been brought into the link.
    */
 
-#ifdef CONFIG_AVR_SPI
   if (at90usb_spidev_initialize)
     {
       at90usb_spidev_initialize();
     }
 #endif
 
+#ifdef CONFIG_ARCH_LEDS
   /* Configure on-board LEDs if LED support has been selected. */
 
-#ifdef CONFIG_ARCH_LEDS
   at90usb_led_initialize();
 #endif
 }
diff --git a/configs/teensy-2.0/src/at90usb_leds.c b/configs/teensy-2.0/src/at90usb_leds.c
index 9cd4821f42f518b134d7061cfc449a8b728dffbb..b81afc6f5d8af71cac2fa4eee2bb26b36f871282 100644
--- a/configs/teensy-2.0/src/at90usb_leds.c
+++ b/configs/teensy-2.0/src/at90usb_leds.c
@@ -53,36 +53,12 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
 static bool g_ncoff;
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/teensy-2.0/src/at90usb_spi.c b/configs/teensy-2.0/src/at90usb_spi.c
index 77422d601e0a6485171a4b7e5bae86e004f130e5..6c55945b3d49d8ea76abde43c5cd40ce1b9bd104 100644
--- a/configs/teensy-2.0/src/at90usb_spi.c
+++ b/configs/teensy-2.0/src/at90usb_spi.c
@@ -80,29 +80,6 @@
 #define TEENSY_CD (1 << 4)
 #define TEENSY_WP (1 << 5)
 
-/* The following enable debug output from this file (needs CONFIG_DEBUG too).
- *
- * CONFIG_SPI_DEBUG - Define to enable basic SSP debug
- * CONFIG_SPI_VERBOSE - Define to enable verbose SSP debug
- */
-
-#ifdef CONFIG_SPI_DEBUG
-#  define sspdbg  lldbg
-#  ifdef CONFIG_SPI_VERBOSE
-#    define sspvdbg lldbg
-#  else
-#    define sspvdbg(x...)
-#  endif
-#else
-#  undef CONFIG_SPI_VERBOSE
-#  define sspdbg(x...)
-#  define sspvdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -161,7 +138,7 @@ void weak_function at90usb_spidev_initialize(void)
 
 void  avr_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
   /* Assert/de-assert the CS pin to the card */
 
@@ -194,7 +171,7 @@ uint8_t avr_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
       ret |= SPI_STATUS_WRPROTECTED;
     }
 
-  sspdbg("Returning %02x\n", ret);
+  spiinfo("Returning %02x\n", ret);
   return ret;
 }
 
diff --git a/configs/teensy-2.0/src/at90usb_usbmsc.c b/configs/teensy-2.0/src/at90usb_usbmsc.c
index d519c5d429cb57e02b1c28ee39ebb5820938c4f2..9fbc1735b98687af1e581a34d84bbc55fd3d190c 100644
--- a/configs/teensy-2.0/src/at90usb_usbmsc.c
+++ b/configs/teensy-2.0/src/at90usb_usbmsc.c
@@ -49,6 +49,7 @@
 #include 
 #include 
 
+#include "avr.h"
 #include "at90usb.h"
 #include "teensy-20.h"
 
@@ -62,17 +63,10 @@
 #  define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0
 #endif
 
-/* PORT and SLOT number probably depend on the board configuration */
+/* MMC/SD PORT and SLOT number */
 
-#ifdef CONFIG_ARCH_BOARD_TEENSY_20
-#  undef AVR_MMCSDSPIPORTNO
-#  define AVR_MMCSDSPIPORTNO 0
-#  undef AVR_MMCSDSLOTNO
-#  define AVR_MMCSDSLOTNO 0
-#else
-   /* Add configuration for new AVR boards here */
-#  error "Unrecognized AVR board"
-#endif
+#define AVR_MMCSDSPIPORTNO 0
+#define AVR_MMCSDSLOTNO 0
 
 /****************************************************************************
  * Public Functions
diff --git a/configs/teensy-2.0/src/teensy-20.h b/configs/teensy-2.0/src/teensy-20.h
index ad1f2530bb68859112b2f6f675fc66e79ba89325..16dbb086b134398fdcdb1a39cfba483d922cb4dc 100644
--- a/configs/teensy-2.0/src/teensy-20.h
+++ b/configs/teensy-2.0/src/teensy-20.h
@@ -43,24 +43,11 @@
 #include 
 
 /****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-/* Configuration ************************************************************/
-
-/****************************************************************************
- * Public Types
+ * Public Function Prototypes
  ****************************************************************************/
 
 #ifndef __ASSEMBLY__
 
-/****************************************************************************
- * Inline Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Public Function Prototypes
- ****************************************************************************/
-
 #ifdef __cplusplus
 #define EXTERN extern "C"
 extern "C"
diff --git a/configs/teensy-2.0/usbmsc/Make.defs b/configs/teensy-2.0/usbmsc/Make.defs
index 785aa0a9c623e24b7d816720d18d5c76acfeecb9..f0518e9448ab3c0ad1b511820601bfc190bf1fdf 100644
--- a/configs/teensy-2.0/usbmsc/Make.defs
+++ b/configs/teensy-2.0/usbmsc/Make.defs
@@ -73,7 +73,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/teensy-2.0/usbmsc/defconfig b/configs/teensy-2.0/usbmsc/defconfig
index b185f2467c6f311dcaf23dc88ecac80a30ddb83c..437fecf2fe0bf580939f6ca30f1af78edc9f4b01 100644
--- a/configs/teensy-2.0/usbmsc/defconfig
+++ b/configs/teensy-2.0/usbmsc/defconfig
@@ -45,7 +45,7 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
@@ -62,8 +62,7 @@ CONFIG_DEBUG_FULLOPT=y
 CONFIG_ARCH_AVR=y
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -334,7 +333,6 @@ CONFIG_MMCSD_SPIMODE=0
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
 # CONFIG_16550_UART is not set
@@ -432,7 +430,7 @@ CONFIG_USBMSC_SCSI_STACKSIZE=512
 # System Logging
 #
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_CONSOLE_SYSLOG is not set
 
 #
 # Networking Support
@@ -471,7 +469,6 @@ CONFIG_FS_WRITABLE=y
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 # CONFIG_SYSLOG_TIMESTAMP is not set
 
 #
@@ -509,7 +506,7 @@ CONFIG_MM_REGIONS=1
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -533,7 +530,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 # CONFIG_LIBC_NETDB is not set
 # CONFIG_NETDB_HOSTFILE is not set
 
@@ -593,7 +589,6 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -661,7 +656,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_LIB_HEX2BIN is not set
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_RAMTEST is not set
diff --git a/configs/teensy-3.x/include/board.h b/configs/teensy-3.x/include/board.h
index 5fc8db18e7e0e70ea43acd333b488b6f312b28ad..508d5a811dc833ea4d0b69c67d0d5b423bdb8080 100644
--- a/configs/teensy-3.x/include/board.h
+++ b/configs/teensy-3.x/include/board.h
@@ -2,7 +2,7 @@
  * configs/teensy-3.x/include/board.h
  * include/arch/board/board.h
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -56,6 +56,16 @@
 /* The teensy-3.1 has a 16MHz crystal on board */
 
 #undef  BOARD_EXTCLOCK                      /* Crystal */
+#define BOARD_EXTAL_LP                      /* Low Power, as opposed to Hi Gain */
+
+/* BOARD_FRDIV is MCG_C1_FRDIV_DIV512 from kinetis_mcg.h. According to the k20
+ * reference manual, when transitioning MCG clock modes to FLL Bypassed External
+ * the C1 divider must be set so that the FLL clock is between 31.25 and 39.0625 khz.
+ * For teensy-3.x that works out to a divider of 512.
+ */
+
+#define BOARD_FRDIV          MCG_C1_FRDIV_DIV512
+
 #define BOARD_EXTAL_FREQ     16000000       /* 16MHz crystal frequency (REFCLK) */
 #define BOARD_XTAL32_FREQ    32768          /* 32KHz RTC Oscillator (not populated) */
 
@@ -64,10 +74,10 @@
  * is 72MHz and 50MHz for the MK20DX128VLH5, but according to the PJRC website,
  * both can be overclocked at 96MHz
  *
- * MK20DX128VLH5 Rated Frequency 50MHz
+ * MK20DX128VLH5 Rated Frequency 50MHz (selecting 48Mhz to use USB)
  *
  *   PLL Input frequency:   PLLIN  = REFCLK/PRDIV = 16MHz/8 = 2MHz
- *   PLL Output frequency:  PLLOUT = PLLIN*VDIV   = 2Mhz*25  = 50MHz
+ *   PLL Output frequency:  PLLOUT = PLLIN*VDIV   = 2Mhz*24  = 48MHz
  *   MCG Frequency:         PLLOUT = 48MHz
  *
  * MK20DX256VLH7 Rated Frequency 72MHz
@@ -92,7 +102,7 @@
 
 #  define BOARD_OUTDIV1      1              /* Core        = MCG, 96MHz */
 #  define BOARD_OUTDIV2      2              /* Bus         = MCG/2, 48MHz */
-#  define BOARD_OUTDIV3      2              /* FlexBus     = MCG/2, 48MHz */
+#  define BOARD_OUTDIV3      0              /* N/A         = No  OUTDIV3 */
 #  define BOARD_OUTDIV4      4              /* Flash clock = MCG/4, 24MHz */
 
 #elif defined(CONFIG_ARCH_CHIP_MK20DX256VLH7)
@@ -106,21 +116,21 @@
 
 #  define BOARD_OUTDIV1      1              /* Core        = MCG, 72MHz */
 #  define BOARD_OUTDIV2      2              /* Bus         = MCG/2, 36MHz */
-#  define BOARD_OUTDIV3      2              /* FlexBus     = MCG/2, 36MHz */
+#  define BOARD_OUTDIV3      0              /* N/A         = No  OUTDIV3 */
 #  define BOARD_OUTDIV4      3              /* Flash clock = MCG/3, 72MHz */
 
 #elif defined(CONFIG_ARCH_CHIP_MK20DX128VLH5)
 /* PLL Configuration */
 
 #  define BOARD_PRDIV        8              /* PLL External Reference Divider */
-#  define BOARD_VDIV         25             /* PLL VCO Divider (frequency multiplier) */
+#  define BOARD_VDIV         24             /* PLL VCO Divider (frequency multiplier) */
 
 /* SIM CLKDIV1 dividers */
 
-#  define BOARD_OUTDIV1      1              /* Core        = MCG, 50MHz */
-#  define BOARD_OUTDIV2      1              /* Bus         = MCG/1, 50MHz */
-#  define BOARD_OUTDIV3      1              /* FlexBus     = MCG/1, 20MHz */
-#  define BOARD_OUTDIV4      2              /* Flash clock = MCG/2, 25MHz */
+#  define BOARD_OUTDIV1      1              /* Core        = MCG, 48MHz */
+#  define BOARD_OUTDIV2      1              /* Bus         = MCG/1, 48MHz */
+#  define BOARD_OUTDIV3      0              /* N/A         = No  OUTDIV3 */
+#  define BOARD_OUTDIV4      2              /* Flash clock = MCG/2, 24MHz */
 #endif
 
 #define BOARD_PLLIN_FREQ     (BOARD_EXTAL_FREQ / BOARD_PRDIV)
@@ -132,6 +142,66 @@
 #define BOARD_FLEXBUS_FREQ   (BOARD_MCG_FREQ / BOARD_OUTDIV3)
 #define BOARD_FLASHCLK_FREQ  (BOARD_MCG_FREQ / BOARD_OUTDIV4)
 
+/* Use MCGPLLCLK as the output SIM_SOPT2 MUX selected by
+ * SIM_SOPT2[PLLFLLSEL]
+ */
+
+#define BOARD_SOPT2_PLLFLLSEL        SIM_SOPT2_PLLFLLSEL_MCGPLLCLK
+#define BOARD_SOPT2_FREQ             BOARD_MCG_FREQ
+
+ /* Divider output clock = Divider input clock × [ (USBFRAC+1) / (USBDIV+1) ]
+ *     SIM_CLKDIV2_FREQ = BOARD_SOPT2_FREQ × [ (USBFRAC+1) / (USBDIV+1) ]
+ */
+
+#if BOARD_SOPT2_FREQ == 96000000
+  /* USBFRAC/USBDIV = 1/2 of 96Mhz clock = 48MHz */
+
+#  define BOARD_SIM_CLKDIV2_USBFRAC  1
+#  define BOARD_SIM_CLKDIV2_USBDIV   2
+#elif BOARD_SOPT2_FREQ == 72000000
+  /* USBFRAC/USBDIV = 2/3 of 72Mhz clock = 48MHz */
+
+#  define BOARD_SIM_CLKDIV2_USBFRAC  2
+#  define BOARD_SIM_CLKDIV2_USBDIV   3
+#elif BOARD_SOPT2_FREQ == 48000000
+  /* USBFRAC/USBDIV = 1/1 of 48Mhz clock = 48MHz */
+
+#  define BOARD_SIM_CLKDIV2_USBFRAC  1
+#  define BOARD_SIM_CLKDIV2_USBDIV   1
+#endif
+
+#define BOARD_SIM_CLKDIV2_FREQ       (BOARD_SOPT2_FREQ / \
+                                      BOARD_SIM_CLKDIV2_USBDIV * \
+                                      BOARD_SIM_CLKDIV2_USBFRAC)
+
+/* Use the output of SIM_SOPT2[PLLFLLSEL] as the USB clock source */
+
+#define BOARD_USB_CLKSRC              SIM_SOPT2_USBSRC
+#define BOARD_USB_FREQ                BOARD_SIM_CLKDIV2_FREQ
+
+
+/* PWM Configuration */
+/* FTM0 Channels */
+
+#define GPIO_FTM0_CH0OUT PIN_FTM0_CH0_2  /* Pin 22: PTC1 */
+#define GPIO_FTM0_CH1OUT PIN_FTM0_CH1_2  /* Pin 23: PTC2 */
+#define GPIO_FTM0_CH2OUT PIN_FTM0_CH2_2  /* Pin  9: PTC3 */
+#define GPIO_FTM0_CH3OUT PIN_FTM0_CH3    /* Pin 10: PTC4 */
+#define GPIO_FTM0_CH4OUT PIN_FTM0_CH4    /* Pin  6: PTD4 */
+#define GPIO_FTM0_CH5OUT PIN_FTM0_CH5_2  /* Pin 20: PTD5 */
+#define GPIO_FTM0_CH6OUT PIN_FTM0_CH6_2  /* Pin 21: PTD6 */
+#define GPIO_FTM0_CH7OUT PIN_FTM0_CH7_2  /* Pin  5: PTD7 */
+
+/* FTM1 Channels */
+
+#define GPIO_FTM1_CH0OUT PIN_FTM1_CH0_1  /* Pin  3: PTA12 */
+#define GPIO_FTM1_CH1OUT PIN_FTM1_CH1_1  /* Pin  4: PTA13 */
+
+/* FTM2 Channels */
+
+#define GPIO_FTM2_CH0OUT PIN_FTM2_CH0    /* Pin 25: PTB18 */
+#define GPIO_FTM2_CH1OUT PIN_FTM2_CH1    /* Pin 32: PTB19 */
+
 /* LED definitions ******************************************************************/
 /* A single LED is available driven by PTC5.  The LED is grounded so bringing PTC5
  * high will illuminate the LED.
@@ -159,7 +229,7 @@
 #define LED_STACKCREATED             1 /* STATUS LED=ON */
 #define LED_INIRQ                    2 /* STATUS LED=no change */
 #define LED_SIGNAL                   2 /* STATUS LED=no change */
-#define LED_ASSERTION                2 /* STATUS LED=no change */
+#define LED_ASSERTION                3 /* STATUS LED=no change */
 #define LED_PANIC                    3 /* STATUS LED=flashing */
 
 /* Button definitions ***************************************************************/
@@ -201,6 +271,28 @@
 #  define PIN_UART0_TX  PIN_UART1_TX_1
 #endif
 
+#ifdef CONFIG_KINETIS_I2C0
+#ifdef CONFIG_TEENSY_3X_I2C_ALT_PINS
+#  define PIN_I2C0_SCL      (PIN_I2C0_SCL_1 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW)
+#  define PIN_I2C0_SDA      (PIN_I2C0_SDA_1 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW)
+#else
+#  define PIN_I2C0_SCL      (PIN_I2C0_SCL_2 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW)
+#  define PIN_I2C0_SDA      (PIN_I2C0_SDA_2 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW)
+#endif
+#endif
+
+/* REVISIT: Added only for clean compilation with I2C1 enabled. */
+
+#ifdef CONFIG_KINETIS_I2C1
+#ifdef CONFIG_TEENSY_3X_I2C_ALT_PINS
+#  define PIN_I2C1_SCL      (PIN_I2C1_SCL_1 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW)
+#  define PIN_I2C1_SDA      (PIN_I2C1_SDA_1 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW)
+#else
+#  define PIN_I2C1_SCL      (PIN_I2C1_SCL_2 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW)
+#  define PIN_I2C1_SDA      (PIN_I2C1_SDA_2 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW)
+#endif
+#endif
+
 /************************************************************************************
  * Public Data
  ************************************************************************************/
diff --git a/configs/teensy-3.x/nsh/Make.defs b/configs/teensy-3.x/nsh/Make.defs
index 597d2e8cf3e94730bcddf53bf9a1053ef7497e42..f42e7beae3aca4d333a827d1f75c05761ce0b6ea 100644
--- a/configs/teensy-3.x/nsh/Make.defs
+++ b/configs/teensy-3.x/nsh/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/teensy-3.x/nsh/defconfig b/configs/teensy-3.x/nsh/defconfig
index 2b5dfa6aecb52c145a25ada30042d29a133a51ae..d765fefd8b7e56a767892ed8792e4f440539df9f 100644
--- a/configs/teensy-3.x/nsh/defconfig
+++ b/configs/teensy-3.x/nsh/defconfig
@@ -41,14 +41,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -62,8 +64,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -75,10 +76,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 CONFIG_ARCH_CHIP_KINETIS=y
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -96,7 +97,11 @@ CONFIG_ARCH_CHIP_KINETIS=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -106,12 +111,23 @@ CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="kinetis"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 # CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -121,6 +137,7 @@ CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set
 # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
@@ -152,6 +169,7 @@ CONFIG_ARCH_CHIP_MK20DX256VLH7=y
 # CONFIG_ARCH_CHIP_MK40X256VMD100 is not set
 # CONFIG_ARCH_CHIP_MK60N256VLQ100 is not set
 # CONFIG_ARCH_CHIP_MK60N256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VLL100 is not set
 # CONFIG_ARCH_CHIP_MK60N512VLQ100 is not set
 # CONFIG_ARCH_CHIP_MK60N512VMD100 is not set
 # CONFIG_ARCH_CHIP_MK60X256VLQ100 is not set
@@ -206,7 +224,7 @@ CONFIG_KINETIS_UART0=y
 #
 # Kinetis GPIO Interrupt Configuration
 #
-# CONFIG_GPIO_IRQ is not set
+# CONFIG_KINETIS_GPIOIRQ is not set
 
 #
 # Kinetis UART Configuration
@@ -224,11 +242,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -322,6 +343,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -372,9 +394,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -405,14 +428,20 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_I2S is not set
 
 #
@@ -426,17 +455,33 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -460,14 +505,11 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -484,19 +526,23 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -528,17 +574,12 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -557,6 +598,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -599,11 +644,14 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -622,11 +670,14 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -634,11 +685,11 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -646,33 +697,43 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -684,30 +745,28 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -727,6 +786,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
@@ -735,6 +795,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -743,8 +804,10 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -762,8 +825,10 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
@@ -790,6 +855,8 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 # CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -803,16 +870,19 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-# CONFIG_SYSTEM_POWEROFF is not set
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/teensy-3.x/src/Makefile b/configs/teensy-3.x/src/Makefile
index ad839632dda729d1d17d702388c6d66d1329004a..fdb261c551ebcd23abccc93d247714da15735c6b 100644
--- a/configs/teensy-3.x/src/Makefile
+++ b/configs/teensy-3.x/src/Makefile
@@ -1,7 +1,7 @@
 ############################################################################
 # configs/teensy-3.x/src/Makefile
 #
-#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2015, 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -36,16 +36,23 @@
 -include $(TOPDIR)/Make.defs
 
 ASRCS =
-CSRCS = k20_boot.c k20_spi.c
+CSRCS = k20_boot.c k20_spi.c k20_i2c.c
 
 ifeq ($(CONFIG_ARCH_LEDS),y)
 CSRCS += k20_autoleds.c
 else
 CSRCS += k20_userleds.c
 endif
+ifeq ($(CONFIG_KINETIS_USBOTG),y)
+CSRCS += k20_usbdev.c
+endif
 
 ifeq ($(CONFIG_LIB_BOARDCTL),y)
 CSRCS += k20_appinit.c
 endif
 
+ifeq ($(CONFIG_PWM),y)
+CSRCS += k20_pwm.c
+endif
+
 include $(TOPDIR)/configs/Board.mk
diff --git a/configs/teensy-3.x/src/k20_appinit.c b/configs/teensy-3.x/src/k20_appinit.c
index fd1b2bd5c86228206f3a56e3e49d9d9079179c0c..ae26f993f688fbdaf8ebacc09fb8bfc12ba14b02 100644
--- a/configs/teensy-3.x/src/k20_appinit.c
+++ b/configs/teensy-3.x/src/k20_appinit.c
@@ -39,8 +39,12 @@
 
 #include 
 
+#include 
+#include 
+
 #include 
 
+#include "kinetis_usbotg.h"
 #include "teensy-3x.h"
 
 /****************************************************************************
@@ -74,5 +78,26 @@
 
 int board_app_initialize(uintptr_t arg)
 {
+  int ret;
+
+#ifdef CONFIG_USBDEV
+  /* Teensy is powered from usb and (bug?) only boots from being programmed, 
+   * so if usb is compiled in signal the controller driver that we're attached now.
+   */
+
+  khci_usbattach();
+#endif
+
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device. */
+
+  ret = kinetis_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: kinetis_pwm_setup() failed: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
   return OK;
 }
diff --git a/configs/teensy-3.x/src/k20_autoleds.c b/configs/teensy-3.x/src/k20_autoleds.c
index 67ce3776a3003f55e3e3080d0d0b0b9b9a544970..7682bab7f52b531d08b3319a9b0c810153e438c2 100644
--- a/configs/teensy-3.x/src/k20_autoleds.c
+++ b/configs/teensy-3.x/src/k20_autoleds.c
@@ -48,18 +48,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/teensy-3.x/src/k20_boot.c b/configs/teensy-3.x/src/k20_boot.c
index 6bd0282ddf48f564bea65e49406116aec7aed455..e6447871e60833e982a11fb8439bd2547362f036 100644
--- a/configs/teensy-3.x/src/k20_boot.c
+++ b/configs/teensy-3.x/src/k20_boot.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/teensy-3.x/src/k20_boot.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -47,14 +47,6 @@
 #include "up_arch.h"
 #include "teensy-3x.h"
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -88,3 +80,12 @@ void kinetis_boardinitialize(void)
   board_autoled_initialize();
 #endif
 }
+
+#if defined(CONFIG_BOARD_INITIALIZE)
+void board_initialize(void)
+{
+#if defined(CONFIG_KINETIS_I2C0) || defined(CONFIG_KINETIS_I2C1)
+  kinetis_i2cdev_initialize();
+#endif
+}
+#endif
diff --git a/configs/teensy-3.x/src/k20_i2c.c b/configs/teensy-3.x/src/k20_i2c.c
new file mode 100644
index 0000000000000000000000000000000000000000..76cc8e884aa7bd485f0d41e3c120d36f08965ccf
--- /dev/null
+++ b/configs/teensy-3.x/src/k20_i2c.c
@@ -0,0 +1,88 @@
+/****************************************************************************
+ * configs/teensy-3.x/src/k20_i2c.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author:  Matias v01d 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "up_arch.h"
+#include "chip.h"
+#include "kinetis.h"
+#include "kinetis_i2c.h"
+#include "teensy-3x.h"
+
+#if defined(CONFIG_KINETIS_I2C0) || defined(CONFIG_KINETIS_I2C1)
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: kinetis_i2cdev_initialize
+ *
+ * Description:
+ *   Called to configure I2C
+ *
+ ************************************************************************************/
+
+void kinetis_i2cdev_initialize(void)
+{
+  i2c_dev = NULL;
+
+#if defined(CONFIG_KINETIS_I2C0)
+  i2c_dev = kinetis_i2cbus_initialize(0);
+#if defined(CONFIG_I2C_DRIVER)
+  i2c_register(i2c_dev, 0);
+#endif
+#endif
+
+#if defined(CONFIG_KINETIS_I2C1)
+  i2c_dev  = kinetis_i2cbus_initialize(1);
+#if defined(CONFIG_I2C_DRIVER)
+  i2c_register(i2c_dev, 1);
+#endif
+#endif
+}
+
+#endif /* CONFIG_KINETIS_I2C0 || CONFIG_KINETIS_I2C1 */
diff --git a/configs/teensy-3.x/src/k20_pwm.c b/configs/teensy-3.x/src/k20_pwm.c
new file mode 100644
index 0000000000000000000000000000000000000000..6e0d384c18411bfbfe59088ea88fa2d8325de7ba
--- /dev/null
+++ b/configs/teensy-3.x/src/k20_pwm.c
@@ -0,0 +1,158 @@
+/************************************************************************************
+ * configs/teensy-3.x/src/k20_pwm.c
+ *
+ *   Copyright (C) 2015, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Alan Carvalho de Assis 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include "chip.h"
+#include "up_arch.h"
+#include "kinetis_pwm.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Configuration *******************************************************************/
+/* PWM
+ *
+ * The Kinetis Freedom board provides a LED on GPIO.
+ */
+
+#ifdef CONFIG_PWM
+
+extern struct pwm_lowerhalf_s *kinetis_pwminitialize(int timer);
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: kinetis_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+int kinetis_pwm_setup(void)
+{
+  static bool initialized = false;
+  struct pwm_lowerhalf_s *pwm;
+  int ret;
+
+  /* Have we already initialized? */
+
+  if (!initialized)
+    {
+#ifdef CONFIG_KINETIS_FTM0_PWM
+      /* Call kinetis_pwminitialize() to get an instance of the PWM interface */
+
+      pwm = kinetis_pwminitialize(0);
+      if (!pwm)
+        {
+          aerr("ERROR: Failed to get the KL20 PWM lower half\n");
+          return -ENODEV;
+        }
+
+      /* Register the PWM driver at "/dev/pwm0" */
+
+      ret = pwm_register("/dev/pwm0", pwm);
+      if (ret < 0)
+        {
+          aerr("ERROR: pwm_register failed: %d\n", ret);
+          return ret;
+        }
+
+      /* Now we are initialized */
+#endif
+
+#ifdef CONFIG_KINETIS_FTM1_PWM
+      pwm = kinetis_pwminitialize(1);
+      if (!pwm)
+        {
+          aerr("ERROR: Failed to get the KL20 PWM lower half\n");
+          return -ENODEV;
+        }
+
+      /* Register the PWM driver at "/dev/pwm1" */
+
+      ret = pwm_register("/dev/pwm1", pwm);
+      if (ret < 0)
+        {
+          aerr("ERROR: pwm_register failed: %d\n", ret);
+          return ret;
+        }
+
+      /* Now we are initialized */
+#endif
+
+#ifdef CONFIG_KINETIS_FTM2_PWM
+      pwm = kinetis_pwminitialize(2);
+      if (!pwm)
+        {
+          aerr("ERROR: Failed to get the KL20 PWM lower half\n");
+          return -ENODEV;
+        }
+
+      /* Register the PWM driver at "/dev/pwm2" */
+
+      ret = pwm_register("/dev/pwm2", pwm);
+      if (ret < 0)
+        {
+          aerr("ERROR: pwm_register failed: %d\n", ret);
+          return ret;
+        }
+
+      /* Now we are initialized */
+#endif
+      initialized = true;
+    }
+
+  return OK;
+}
+
+#endif /* CONFIG_PWM */
diff --git a/configs/teensy-3.x/src/k20_spi.c b/configs/teensy-3.x/src/k20_spi.c
index edd63b41354632c0bd3b41709dfa4e6996839c4f..3bcef38e55da0ff01a419d753bceab17384a2ecc 100644
--- a/configs/teensy-3.x/src/k20_spi.c
+++ b/configs/teensy-3.x/src/k20_spi.c
@@ -51,30 +51,8 @@
 #include "kinetis.h"
 #include "teensy-3x.h"
 
-#if defined(CONFIG_KINETIS_SPI1) || defined(CONFIG_KINETIS_SPI2)
-
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef CONFIG_DEBUG_SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
+#if defined(CONFIG_KINETIS_SPI0) || defined(CONFIG_KINETIS_SPI1) || \
+	defined(CONFIG_KINETIS_SPI2)
 
 /************************************************************************************
  * Public Functions
@@ -94,10 +72,10 @@ void weak_function kinetis_spidev_initialize(void)
 }
 
 /************************************************************************************
- * Name:  kinetis_spi1/2/3select and kinetis_spi1/2/3status
+ * Name:  kinetis_spi0/1/2select and kinetis_spi0/1/2status
  *
  * Description:
- *   The external functions, kinetis_spi1/2/3select and kinetis_spi1/2/3status must be
+ *   The external functions, kinetis_spi0/1/2select and kinetis_spi0/1/2status must be
  *   provided by board-specific logic.  They are implementations of the select
  *   and status methods of the SPI interface defined by struct spi_ops_s (see
  *   include/nuttx/spi/spi.h). All other methods (including kinetis_spibus_initialize())
@@ -106,7 +84,7 @@ void weak_function kinetis_spidev_initialize(void)
  *
  *   1. Provide logic in kinetis_boardinitialize() to configure SPI chip select
  *      pins.
- *   2. Provide kinetis_spi1/2/3select() and kinetis_spi1/2/3status() functions in your
+ *   2. Provide kinetis_spi0/1/2select() and kinetis_spi0/1/2status() functions in your
  *      board-specific logic.  These functions will perform chip selection and
  *      status operations using GPIOs in the way your board is configured.
  *   3. Add a calls to kinetis_spibus_initialize() in your low level application
@@ -118,46 +96,46 @@ void weak_function kinetis_spidev_initialize(void)
  *
  ************************************************************************************/
 
-#ifdef CONFIG_KINETIS_SPI1
-void kinetis_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+#ifdef CONFIG_KINETIS_SPI0
+void kinetis_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 # warning "Missing logic"
 }
 
-uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+uint8_t kinetis_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
 # warning "Missing logic"
   return SPI_STATUS_PRESENT;
 }
 #endif
 
-#ifdef CONFIG_KINETIS_SPI2
-void kinetis_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+#ifdef CONFIG_KINETIS_SPI1
+void kinetis_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 # warning "Missing logic"
 }
 
-uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
 # warning "Missing logic"
   return SPI_STATUS_PRESENT;
 }
 #endif
 
-#ifdef CONFIG_KINETIS_SPI3
-void kinetis_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+#ifdef CONFIG_KINETIS_SPI2
+void kinetis_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 # warning "Missing logic"
 }
 
-uint8_t kinetis_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
 # warning "Missing logic"
   return SPI_STATUS_PRESENT;
 }
 #endif
 
-#endif /* CONFIG_KINETIS_SPI1 || CONFIG_KINETIS_SPI2 */
+#endif /* CONFIG_KINETIS_SPI0 || CONFIG_KINETIS_SPI1 || CONFIG_KINETIS_SPI2 */
diff --git a/configs/teensy-3.x/src/k20_usbdev.c b/configs/teensy-3.x/src/k20_usbdev.c
new file mode 100644
index 0000000000000000000000000000000000000000..f5f20fbf246ddb42f88e53114d62e3635b5f8066
--- /dev/null
+++ b/configs/teensy-3.x/src/k20_usbdev.c
@@ -0,0 +1,140 @@
+/************************************************************************************
+ * configs/teensy-3.x/src/k20_usbdev.c
+ *
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "up_arch.h"
+#include "kinetis.h"
+#include "kinetis_usbotg.h"
+#include "chip/kinetis_sim.h"
+#include "teensy-3x.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#define khci_getreg(addr)      getreg8(addr)
+#define khci_putreg(val,addr)  putreg8(val,addr)
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: kinetis_usbinitialize
+ *
+ * Description:
+ *   Called to setup USB-related GPIO pins for the KwikStik-K40 board.
+ *
+ ************************************************************************************/
+
+void kinetis_usbinitialize(void)
+{
+}
+
+/************************************************************************************
+ * Name:  kinetis_usbpullup
+ *
+ * Description:
+ *   If USB is supported and the board supports a pullup via GPIO (for USB software
+ *   connect and disconnect), then the board software must provide kinetis_pullup.
+ *   See include/nuttx/usb/usbdev.h for additional description of this method.
+ *   Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be
+ *   NULL.
+ *
+ ************************************************************************************/
+
+int kinetis_usbpullup(FAR struct usbdev_s *dev, bool enable)
+{
+  usbtrace(TRACE_DEVPULLUP, (uint16_t)enable);
+#if 0
+  uint32_t regval;
+#endif
+
+  if (enable)
+    {
+      khci_putreg(USB_CONTROL_DPPULLUPNONOTG, KINETIS_USB0_CONTROL);
+    }
+  else
+    {
+      khci_putreg(0,KINETIS_USB0_CONTROL);
+    }
+
+#if 0
+  regval = khci_getreg(KINETIS_USB0_OTGCTL);
+
+  if (enable)
+    {
+      regval |= (1 << 2);
+    }
+  else
+    {
+      regval &= ~(1 << 2);
+    }
+
+  khci_putreg(regval,KINETIS_USB0_OTGCTL);
+#endif
+
+  return OK;
+}
+
+/************************************************************************************
+ * Name:  kinetis_usbsuspend
+ *
+ * Description:
+ *   Board logic must provide the kinetis_usbsuspend logic if the USBDEV driver is
+ *   used.  This function is called whenever the USB enters or leaves suspend mode.
+ *   This is an opportunity for the board logic to shutdown clocks, power, etc.
+ *   while the USB is suspended.
+ *
+ ************************************************************************************/
+
+void kinetis_usbsuspend(FAR struct usbdev_s *dev, bool resume)
+{
+  uinfo("resume: %d\n", resume);
+#warning "Missing logic"
+}
diff --git a/configs/teensy-3.x/src/teensy-3x.h b/configs/teensy-3.x/src/teensy-3x.h
index 0e0b16b25994f2df95923de5a73094567369f3ed..890845adbdbd5e2429c765bdf40a7addbda28e33 100644
--- a/configs/teensy-3.x/src/teensy-3x.h
+++ b/configs/teensy-3.x/src/teensy-3x.h
@@ -44,6 +44,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -76,6 +77,8 @@
  * Public data
  ************************************************************************************/
 
+FAR struct i2c_master_s* i2c_dev;
+
 #ifndef __ASSEMBLY__
 
 /************************************************************************************
@@ -92,6 +95,16 @@
 
 extern void weak_function kinetis_spidev_initialize(void);
 
+/************************************************************************************
+ * Name: kinetis_i2cdev_initialize
+ *
+ * Description:
+ *   Called to configure I2C
+ *
+ ************************************************************************************/
+
+void kinetis_i2cdev_initialize(void);
+
 /************************************************************************************
  * Name: kinetis_usbinitialize
  *
@@ -102,6 +115,18 @@ extern void weak_function kinetis_spidev_initialize(void);
 
 extern void weak_function kinetis_usbinitialize(void);
 
+/************************************************************************************
+ * Name: kinetis_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PWM
+int kinetis_pwm_setup(void);
+#endif
+
 #endif /* __ASSEMBLY__ */
 #endif /* __CONFIGS_TEENSY_3X_SRC_TEENSY_3X_H */
 
diff --git a/configs/teensy-3.x/usbnsh/Make.defs b/configs/teensy-3.x/usbnsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..0d0d0dfa56a9f4dfb34165eef0a055927ca72328
--- /dev/null
+++ b/configs/teensy-3.x/usbnsh/Make.defs
@@ -0,0 +1,116 @@
+############################################################################
+# configs/teensy-3.1/nsh/Make.defs
+#
+#   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+ifeq ($(CONFIG_ARCH_CHIP_MK20DX256VLH7),y)
+  LDSCRIPT = mk20dx256vlh7.ld
+else ifeq ($(CONFIG_ARCH_CHIP_MK20DX128VLH5),y)
+  LDSCRIPT = mk20dx128vlh5.ld
+endif
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
diff --git a/configs/teensy-3.x/usbnsh/defconfig b/configs/teensy-3.x/usbnsh/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..b460645fff7acc9020f26306fd6b3fe1e1898eff
--- /dev/null
+++ b/configs/teensy-3.x/usbnsh/defconfig
@@ -0,0 +1,962 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+CONFIG_EXPERIMENTAL=y
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+CONFIG_ARCH_CHIP_KINETIS=y
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+# CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="kinetis"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+
+#
+# Kinetis Configuration Options
+#
+# CONFIG_ARCH_CHIP_MK20DN32VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX32VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DN64VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX64VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DN128VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX128VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX64VLH7 is not set
+# CONFIG_ARCH_CHIP_MK20DX128VLH7 is not set
+CONFIG_ARCH_CHIP_MK20DX256VLH7=y
+# CONFIG_ARCH_CHIP_MK40N512VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK40N512VMD100 is not set
+# CONFIG_ARCH_CHIP_MK40X128VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK40X128VMD100 is not set
+# CONFIG_ARCH_CHIP_MK40X256VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK40X256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60N256VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK60N256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VLL100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60X256VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK60X256VMD100 is not set
+CONFIG_ARCH_FAMILY_K20=y
+# CONFIG_ARCH_FAMILY_K40 is not set
+# CONFIG_ARCH_FAMILY_K60 is not set
+
+#
+# Kinetis Peripheral Support
+#
+# CONFIG_KINETIS_TRACE is not set
+# CONFIG_KINETIS_FLEXBUS is not set
+CONFIG_KINETIS_UART0=y
+# CONFIG_KINETIS_UART1 is not set
+# CONFIG_KINETIS_UART2 is not set
+# CONFIG_KINETIS_UART3 is not set
+# CONFIG_KINETIS_UART4 is not set
+# CONFIG_KINETIS_UART5 is not set
+# CONFIG_KINETIS_FLEXCAN0 is not set
+# CONFIG_KINETIS_FLEXCAN1 is not set
+# CONFIG_KINETIS_SPI0 is not set
+# CONFIG_KINETIS_SPI1 is not set
+# CONFIG_KINETIS_SPI2 is not set
+# CONFIG_KINETIS_I2C0 is not set
+# CONFIG_KINETIS_I2C1 is not set
+# CONFIG_KINETIS_I2S is not set
+# CONFIG_KINETIS_DAC0 is not set
+# CONFIG_KINETIS_DAC1 is not set
+# CONFIG_KINETIS_ADC0 is not set
+# CONFIG_KINETIS_ADC1 is not set
+# CONFIG_KINETIS_CMP is not set
+# CONFIG_KINETIS_VREF is not set
+# CONFIG_KINETIS_SDHC is not set
+# CONFIG_KINETIS_FTM0 is not set
+# CONFIG_KINETIS_FTM1 is not set
+# CONFIG_KINETIS_FTM2 is not set
+# CONFIG_KINETIS_LPTIMER is not set
+# CONFIG_KINETIS_RTC is not set
+# CONFIG_KINETIS_EWM is not set
+# CONFIG_KINETIS_CMT is not set
+CONFIG_KINETIS_USBOTG=y
+# CONFIG_KINETIS_USBDCD is not set
+# CONFIG_KINETIS_LLWU is not set
+# CONFIG_KINETIS_TSI is not set
+# CONFIG_KINETIS_FTFL is not set
+# CONFIG_KINETIS_DMA is not set
+# CONFIG_KINETIS_CRC is not set
+# CONFIG_KINETIS_PDB is not set
+# CONFIG_KINETIS_PIT is not set
+
+#
+# Kinetis GPIO Interrupt Configuration
+#
+# CONFIG_KINETIS_GPIOIRQ is not set
+
+#
+# Kinetis UART Configuration
+#
+CONFIG_KINETIS_UARTFIFOS=y
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ARCH_USBDUMP is not set
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+CONFIG_ARCH_HAVE_RAMFUNCS=y
+CONFIG_ARCH_RAMFUNCS=y
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=6024
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x1fff8000
+CONFIG_RAM_SIZE=65536
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_TEENSY_3X=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="teensy-3.x"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Board-Specific Options
+#
+# CONFIG_TEENSY_3X_OVERCLOCK is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+CONFIG_BOARDCTL_USBDEVCTRL=y
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=12
+CONFIG_START_DAY=6
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=16
+CONFIG_WDOG_INTRESERVE=4
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_SPINLOCK is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+CONFIG_DISABLE_POLL=y
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+# CONFIG_ARCH_HAVE_I2CRESET is not set
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+CONFIG_SERIAL_REMOVABLE=y
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+CONFIG_UART0_SERIALDRIVER=y
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+CONFIG_UART0_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# UART0 Configuration
+#
+CONFIG_UART0_RXBUFSIZE=256
+CONFIG_UART0_TXBUFSIZE=256
+CONFIG_UART0_BAUD=115200
+CONFIG_UART0_BITS=8
+CONFIG_UART0_PARITY=0
+CONFIG_UART0_2STOP=0
+# CONFIG_UART0_IFLOWCONTROL is not set
+# CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+CONFIG_USBDEV=y
+
+#
+# USB Device Controller Driver Options
+#
+# CONFIG_USBDEV_ISOCHRONOUS is not set
+CONFIG_USBDEV_DUALSPEED=y
+CONFIG_USBDEV_SELFPOWERED=y
+# CONFIG_USBDEV_BUSPOWERED is not set
+CONFIG_USBDEV_MAXPOWER=100
+# CONFIG_USBDEV_DMA is not set
+# CONFIG_ARCH_USBDEV_STALLQUEUE is not set
+CONFIG_USBDEV_TRACE=y
+CONFIG_USBDEV_TRACE_NRECORDS=128
+CONFIG_USBDEV_TRACE_INITIALIDSET=y
+
+#
+# USB Device Class Driver Options
+#
+# CONFIG_USBDEV_COMPOSITE is not set
+# CONFIG_PL2303 is not set
+CONFIG_CDCACM=y
+# CONFIG_CDCACM_CONSOLE is not set
+# CONFIG_CDCACM_IFLOWCONTROL is not set
+CONFIG_CDCACM_EP0MAXPACKET=64
+CONFIG_CDCACM_EPINTIN=1
+CONFIG_CDCACM_EPINTIN_FSSIZE=64
+CONFIG_CDCACM_EPINTIN_HSSIZE=64
+CONFIG_CDCACM_EPBULKOUT=3
+CONFIG_CDCACM_EPBULKOUT_FSSIZE=64
+CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
+CONFIG_CDCACM_EPBULKIN=2
+CONFIG_CDCACM_EPBULKIN_FSSIZE=64
+CONFIG_CDCACM_EPBULKIN_HSSIZE=512
+CONFIG_CDCACM_NRDREQS=4
+CONFIG_CDCACM_NWRREQS=4
+CONFIG_CDCACM_BULKIN_REQLEN=768
+CONFIG_CDCACM_RXBUFSIZE=513
+CONFIG_CDCACM_TXBUFSIZE=769
+CONFIG_CDCACM_VENDORID=0x0525
+CONFIG_CDCACM_PRODUCTID=0xa4a7
+CONFIG_CDCACM_VENDORSTR="NuttX"
+CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
+# CONFIG_USBMSC is not set
+# CONFIG_USBHOST is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_FS_READABLE is not set
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+# CONFIG_WIRELESS is not set
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CPUHOG is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_PIPE is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFIFO is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+
+#
+# Configure Command Options
+#
+# CONFIG_NSH_CMDOPT_DF_H is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+CONFIG_NSH_USBCONSOLE=y
+CONFIG_NSH_USBCONDEV="/dev/ttyACM0"
+CONFIG_USBDEV_MINOR=0
+
+#
+# USB Device Trace Support
+#
+# CONFIG_NSH_USBDEV_TRACE is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+CONFIG_SYSTEM_CDCACM=y
+CONFIG_SYSTEM_CDCACM_DEVMINOR=0
+# CONFIG_SYSTEM_CDCACM_TRACEINIT is not set
+# CONFIG_SYSTEM_CDCACM_TRACECLASS is not set
+# CONFIG_SYSTEM_CDCACM_TRACETRANSFERS is not set
+# CONFIG_SYSTEM_CDCACM_TRACECONTROLLER is not set
+# CONFIG_SYSTEM_CDCACM_TRACEINTERRUPTS is not set
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+CONFIG_SYSTEM_HEXED=y
+CONFIG_SYSTEM_HEXED_STACKSIZE=2048
+CONFIG_SYSTEM_HEXED_PRIORITY=100
+# CONFIG_SYSTEM_INSTALL is not set
+CONFIG_SYSTEM_RAMTEST=y
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_READLINE_MAX_BUILTINS=64
+CONFIG_READLINE_MAX_EXTCMDS=64
+CONFIG_READLINE_CMD_HISTORY=y
+CONFIG_READLINE_CMD_HISTORY_LINELEN=80
+CONFIG_READLINE_CMD_HISTORY_LEN=16
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+CONFIG_USBMONITOR=y
+CONFIG_USBMONITOR_STACKSIZE=2048
+CONFIG_USBMONITOR_PRIORITY=50
+CONFIG_USBMONITOR_INTERVAL=2
+CONFIG_USBMONITOR_TRACEINIT=y
+CONFIG_USBMONITOR_TRACECLASS=y
+CONFIG_USBMONITOR_TRACETRANSFERS=y
+CONFIG_USBMONITOR_TRACECONTROLLER=y
+CONFIG_USBMONITOR_TRACEINTERRUPTS=y
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/teensy-3.x/usbnsh/setenv.sh b/configs/teensy-3.x/usbnsh/setenv.sh
new file mode 100755
index 0000000000000000000000000000000000000000..dedab5191ede28ee9f2a30f8e9fdc992b7a0d4f7
--- /dev/null
+++ b/configs/teensy-3.x/usbnsh/setenv.sh
@@ -0,0 +1,76 @@
+#!/bin/bash
+# configs/teensy-3.1/nsh/setenv.sh
+#
+#   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the RIDE
+# toolchain under windows.  You will also have to edit this if you install
+# the RIDE toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH variable
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/teensy-lc/nsh/Make.defs b/configs/teensy-lc/nsh/Make.defs
index f70645f9e8fad2842f60911b6ed9b3e2f9d8f64e..aa08be609c3bafc183ebe9bff4b9496ab8123c2b 100644
--- a/configs/teensy-lc/nsh/Make.defs
+++ b/configs/teensy-lc/nsh/Make.defs
@@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/teensy-lc/nsh/defconfig b/configs/teensy-lc/nsh/defconfig
index f19be2371851c26ebe7587f9c07c3682bbe74892..8a28b949a9d9b6da8874843d0b999fe99e6363dd 100644
--- a/configs/teensy-lc/nsh/defconfig
+++ b/configs/teensy-lc/nsh/defconfig
@@ -16,7 +16,7 @@ CONFIG_HOST_LINUX=y
 #
 # Build Configuration
 #
-CONFIG_APPS_DIR="../apps"
+# CONFIG_APPS_DIR="../apps"
 CONFIG_BUILD_FLAT=y
 # CONFIG_BUILD_2PASS is not set
 
@@ -37,40 +37,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-CONFIG_DEBUG_VERBOSE=y
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_AUDIO is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_LEDS is not set
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
-# CONFIG_DEBUG_PWM is not set
-# CONFIG_DEBUG_SPI is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 CONFIG_STACK_COLORATION=y
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -85,8 +61,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -98,14 +73,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 CONFIG_ARCH_CHIP_KL=y
 # CONFIG_ARCH_CHIP_LM is not set
 # CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -114,10 +90,15 @@ CONFIG_ARCH_CHIP_KL=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -127,13 +108,24 @@ CONFIG_ARCH_CORTEXM0=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv6-m"
 CONFIG_ARCH_CHIP="kl"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 
 #
 # ARMV6M Configuration Options
@@ -142,7 +134,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV6M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL is not set
 CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL=y
-# CONFIG_GPIO_IRQ is not set
+# CONFIG_KL_GPIOIRQ is not set
 
 #
 # Kinetis Configuration Options
@@ -214,11 +206,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
@@ -267,14 +262,15 @@ CONFIG_ARCH_BOARD="teensy-lc"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -311,6 +307,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=8
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -355,9 +352,10 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -388,14 +386,20 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 CONFIG_PWM=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
 CONFIG_SPI_EXCHANGE=y
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_I2S is not set
 
 #
@@ -409,17 +413,38 @@ CONFIG_SPI_EXCHANGE=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -443,15 +468,11 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
-# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -468,19 +489,25 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -509,12 +536,7 @@ CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_BINFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -534,6 +556,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -551,7 +577,7 @@ CONFIG_BUILTIN=y
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -573,13 +599,17 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -603,11 +633,14 @@ CONFIG_HAVE_CXXINITIALIZE=y
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_CXXTEST is not set
@@ -617,10 +650,11 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
 # CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -629,36 +663,45 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PWM is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PWM is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -670,32 +713,28 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_PPPD is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -714,6 +753,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+CONFIG_NSH_DISABLE_BASENAME=y
 # CONFIG_NSH_DISABLE_CAT is not set
 CONFIG_NSH_DISABLE_CD=y
 CONFIG_NSH_DISABLE_CP=y
@@ -722,6 +762,7 @@ CONFIG_NSH_DISABLE_DATE=y
 CONFIG_NSH_DISABLE_DD=y
 CONFIG_NSH_DISABLE_DF=y
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+CONFIG_NSH_DISABLE_DIRNAME=y
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -730,8 +771,10 @@ CONFIG_NSH_DISABLE_GET=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 CONFIG_NSH_DISABLE_IFCONFIG=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 CONFIG_NSH_DISABLE_LOSETUP=y
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 CONFIG_NSH_DISABLE_MKDIR=y
@@ -742,6 +785,7 @@ CONFIG_NSH_DISABLE_MOUNT=y
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PSSTACKUSAGE is not set
 CONFIG_NSH_DISABLE_PUT=y
 # CONFIG_NSH_DISABLE_PWD is not set
 CONFIG_NSH_DISABLE_RM=y
@@ -749,12 +793,15 @@ CONFIG_NSH_DISABLE_RMDIR=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+CONFIG_NSH_DISABLE_TIME=y
 # CONFIG_NSH_DISABLE_TEST is not set
 CONFIG_NSH_DISABLE_UMOUNT=y
+CONFIG_NSH_DISABLE_UNAME=y
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 CONFIG_NSH_DISABLE_WGET=y
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -774,6 +821,8 @@ CONFIG_NSH_DISABLESCRIPT=y
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 # CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -787,20 +836,23 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-# CONFIG_SYSTEM_POWEROFF is not set
-# CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 CONFIG_SYSTEM_STACKMONITOR=y
 CONFIG_SYSTEM_STACKMONITOR_STACKSIZE=2048
 CONFIG_SYSTEM_STACKMONITOR_PRIORITY=50
 CONFIG_SYSTEM_STACKMONITOR_INTERVAL=2
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/teensy-lc/src/kl_appinit.c b/configs/teensy-lc/src/kl_appinit.c
index fdd1e3bd307f0230cf877b068b646b147c813bf6..cfe2684ebd638b1dd315903955d3d8d59f70a1e4 100644
--- a/configs/teensy-lc/src/kl_appinit.c
+++ b/configs/teensy-lc/src/kl_appinit.c
@@ -45,6 +45,8 @@
 
 #include 
 
+#include "teensy-lc.h"
+
 #ifdef CONFIG_LIB_BOARDCTL
 
 /****************************************************************************
@@ -78,6 +80,19 @@
 
 int board_app_initialize(uintptr_t arg)
 {
+  int ret;
+
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device. */
+
+  ret = kl_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: kl_pwm_setup() failed: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
   return OK;
 }
 
diff --git a/configs/teensy-lc/src/kl_led.c b/configs/teensy-lc/src/kl_led.c
index fbc967208de0a2df1f8aeaa6019da7b67b556338..e4e4cac6211607637ea0db214dc37740ff6c5c0b 100644
--- a/configs/teensy-lc/src/kl_led.c
+++ b/configs/teensy-lc/src/kl_led.c
@@ -52,34 +52,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/teensy-lc/src/kl_pwm.c b/configs/teensy-lc/src/kl_pwm.c
index 94c84397bea37db296afb5a161f3f50fae990774..82d80b543283447f370bcd009330861a870c04be 100644
--- a/configs/teensy-lc/src/kl_pwm.c
+++ b/configs/teensy-lc/src/kl_pwm.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/teensy-lc/src/kl_pwm.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *           Alan Carvalho de Assis 
  *
@@ -45,7 +45,7 @@
 #include 
 
 #include 
-#include 
+#include 
 
 #include 
 
@@ -66,24 +66,19 @@
 
 extern struct pwm_lowerhalf_s *kl_pwminitialize(int timer);
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_pwm_setup
+ * Name: kl_pwm_setup
  *
  * Description:
- *   All Kinetis KL architectures must provide the following interface to work with
- *   examples/pwm.
+ *   Initialize PWM and register the PWM device.
  *
  ************************************************************************************/
 
-int board_pwm_setup(void)
+int kl_pwm_setup(void)
 {
   static bool initialized = false;
   struct pwm_lowerhalf_s *pwm;
@@ -98,7 +93,7 @@ int board_pwm_setup(void)
       pwm = kl_pwminitialize(0);
       if (!pwm)
         {
-          adbg("Failed to get the KL25 PWM lower half\n");
+          aerr("ERROR: Failed to get the KL25 PWM lower half\n");
           return -ENODEV;
         }
 
@@ -107,7 +102,7 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/pwm0", pwm);
       if (ret < 0)
         {
-          adbg("pwm_register failed: %d\n", ret);
+          aerr("ERROR: pwm_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/teensy-lc/src/kl_spi.c b/configs/teensy-lc/src/kl_spi.c
index 4227fea056a948691fd26ff4c4e1746bc1c4ad9f..b4d36cb75525d82e34f9473e85705eadf8818aa3 100644
--- a/configs/teensy-lc/src/kl_spi.c
+++ b/configs/teensy-lc/src/kl_spi.c
@@ -51,28 +51,6 @@
 
 #if defined(CONFIG_KL_SPI0) || defined(CONFIG_KL_SPI1)
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -155,7 +133,7 @@ void weak_function kl_spidev_initialize(void)
 void kl_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
                    bool selected)
 {
-  spivdbg("devid: %d CS: %s\n",
+  spiinfo("devid: %d CS: %s\n",
            (int)devid, selected ? "assert" : "de-assert");
 }
 #endif
@@ -164,7 +142,7 @@ void kl_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
 void kl_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
                    bool selected)
 {
-  spivdbg("devid: %d CS: %s\n",
+  spiinfo("devid: %d CS: %s\n",
            (int)devid, selected ? "assert" : "de-assert");
 }
 #endif
diff --git a/configs/teensy-lc/src/teensy-lc.h b/configs/teensy-lc/src/teensy-lc.h
index 048fcaeab431fb0a4d966d30740be2afcf903bf9..996c8677c4d323e0c769cf874a30a323e324bd9f 100644
--- a/configs/teensy-lc/src/teensy-lc.h
+++ b/configs/teensy-lc/src/teensy-lc.h
@@ -79,6 +79,18 @@
 
 void weak_function kl_spidev_initialize(void);
 
+/************************************************************************************
+ * Name: kl_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PWM
+int kl_pwm_setup(void);
+#endif
+
 /****************************************************************************
  * Name: kl_led_initialize
  *
diff --git a/configs/tm4c123g-launchpad/nsh/Make.defs b/configs/tm4c123g-launchpad/nsh/Make.defs
index c297559d64fbd9f5ee35dac0827049f5edabb4c7..9414fd49837c161d935167707e5e557146994d74 100644
--- a/configs/tm4c123g-launchpad/nsh/Make.defs
+++ b/configs/tm4c123g-launchpad/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/tm4c123g-launchpad/nsh/defconfig b/configs/tm4c123g-launchpad/nsh/defconfig
index 454af5b842f12eb35656f3b7b148a95d0a3707ba..5eeaac57eec515f5707c14ff23efbdb8d579522e 100644
--- a/configs/tm4c123g-launchpad/nsh/defconfig
+++ b/configs/tm4c123g-launchpad/nsh/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -71,14 +72,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
 CONFIG_ARCH_CHIP_TIVA=y
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -87,10 +89,15 @@ CONFIG_ARCH_CHIP_TIVA=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -100,8 +107,17 @@ CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="tiva"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
@@ -109,6 +125,8 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 # CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -118,11 +136,13 @@ CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
 CONFIG_ARMV7M_OABI_TOOLCHAIN=y
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 
 #
@@ -197,7 +217,6 @@ CONFIG_TIVA_SSI0=y
 # CONFIG_TIVA_TIMER3 is not set
 # CONFIG_TIVA_TIMER4 is not set
 # CONFIG_TIVA_TIMER5 is not set
-# CONFIG_TIVA_ETHERNET is not set
 # CONFIG_TIVA_FLASH is not set
 
 #
@@ -247,11 +266,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -311,6 +333,12 @@ CONFIG_NSH_MMCSDMINOR=0
 #
 # Board-Specific Options
 #
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
 
 #
 # RTOS Features
@@ -345,6 +373,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -395,9 +424,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -428,11 +458,16 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
 # CONFIG_TIMER is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
@@ -441,17 +476,33 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -475,14 +526,11 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -499,19 +547,23 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -543,15 +595,11 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -571,6 +619,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -610,13 +662,17 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_PERROR_STDOUT is not set
 CONFIG_ARCH_LOWPUTC=y
 # CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -635,11 +691,14 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -647,11 +706,11 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -659,35 +718,44 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -699,35 +767,28 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
-# CONFIG_NETUTILS_PPPD is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -747,13 +808,16 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
 # CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -762,8 +826,10 @@ CONFIG_NSH_BUILTIN_APPS=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -781,8 +847,10 @@ CONFIG_NSH_BUILTIN_APPS=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
@@ -809,7 +877,8 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
-CONFIG_LIB_BOARDCTL=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -823,120 +892,19 @@ CONFIG_LIB_BOARDCTL=y
 #
 # System Libraries and NSH Add-Ons
 #
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# EMACS-like Command Line Editor
-#
 # CONFIG_SYSTEM_CLE is not set
-
-#
-# CU Minimal Terminal
-#
 # CONFIG_SYSTEM_CUTERM is not set
-
-#
-# FLASH Program Installation
-#
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# Intel HEX to binary conversion
-#
-# CONFIG_SYSTEM_HEX2BIN is not set
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# NxPlayer media player library / command Line
-#
-
-#
-# RAM test
-#
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-
-#
-# P-Code Support
-#
-
-#
-# PHY Tool
-#
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sudoku
-#
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-
-#
-# Sysinfo
-#
-
-#
-# Temperature
-#
-
-#
-# VI Work-Alike Editor
-#
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# USB Monitor
-#
-
-#
-# Zmodem Commands
-#
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/tm4c123g-launchpad/src/tm4c123g-launchpad.h b/configs/tm4c123g-launchpad/src/tm4c123g-launchpad.h
index b9ca7ce4808cb9d07baa6c3f09975ffbcc32b6a0..4b8df2c9e1e339fe10fdcf108a45e037f57be4d3 100644
--- a/configs/tm4c123g-launchpad/src/tm4c123g-launchpad.h
+++ b/configs/tm4c123g-launchpad/src/tm4c123g-launchpad.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/tm4c123g-launchpad/src/tm4c123g-launchpad.h
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -213,6 +213,18 @@ void tm4c_led_initialize(void);
 
 int tm4c_bringup(void);
 
+/************************************************************************************
+ * Name: tm4c_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_TIVA_ADC
+int tm4c_adc_setup(void);
+#endif
+
 /****************************************************************************
  * Name: tm4c_at24_automount
  *
@@ -237,17 +249,5 @@ int tm4c_at24_automount(int minor);
 int tiva_timer_configure(void);
 #endif
 
-/************************************************************************************
- * Name: board_adc_initialize
- *
- * Description:
- *   Initialize and register the ADC driver
- *
- ************************************************************************************/
-
-#ifdef CONFIG_TIVA_ADC
-int board_adc_initialize(void);
-#endif
-
 #endif /* __ASSEMBLY__ */
 #endif /* __CONFIGS_TM4C123G_LAUNCHPAD_TM4C123G_LAUNCHPAD_H */
diff --git a/configs/tm4c123g-launchpad/src/tm4c_adc.c b/configs/tm4c123g-launchpad/src/tm4c_adc.c
index c4494b5579cf0437ebb45f9e366a9ff624ba1681..a43f5ee9612be42e827e238b866cad0765b8f082 100644
--- a/configs/tm4c123g-launchpad/src/tm4c_adc.c
+++ b/configs/tm4c123g-launchpad/src/tm4c_adc.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/tm4c123g-launchpad/tm4c_adc.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -50,34 +50,23 @@
 #include "tm4c123g-launchpad.h"
 #include "chip/tiva_pinmap.h"
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/************************************************************************************
- * Private Data
- ************************************************************************************/
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
+#ifdef CONFIG_TIVA_ADC
 
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_adc_initialize
+ * Name: tm4c_adc_setup
  *
  * Description:
- *   Initialize and register the ADC driver.
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
-#ifdef CONFIG_TIVA_ADC
-int board_adc_initialize(void)
+int tm4c_adc_setup(void)
 {
-#  if defined (CONFIG_TIVA_ADC) && defined (CONFIG_ADC)
+#ifdef CONFIG_ADC
   static bool initialized = false;
   int ret;
   uint8_t srate = 0;
@@ -90,11 +79,11 @@ int board_adc_initialize(void)
   };
 
   sse_cfg0.priority = 0;
-#    ifdef CONFIG_EXAMPLES_ADC_SWTRIG
+#ifdef CONFIG_EXAMPLES_ADC_SWTRIG
   sse_cfg0.trigger = TIVA_ADC_TRIG_SW;
-#    else
+#else
   sse_cfg0.trigger = TIVA_ADC_TRIG_ALWAYS;
-#    endif
+#endif
 
   adc_cfg.adc = 0;
   adc_cfg.sse[0] = true;
@@ -105,11 +94,11 @@ int board_adc_initialize(void)
   adc_cfg.steps = 1;
   adc_cfg.stepcfg = step_cfg;
 
-#    ifdef CONFIG_EXAMPLES_ADC_SWTRIG
+#ifdef CONFIG_EXAMPLES_ADC_SWTRIG
   srate = TIVA_ADC_SAMPLE_RATE_FASTEST;
-#    else
+#else
   srate = TIVA_ADC_SAMPLE_RATE_SLOWEST;
-#    endif
+#endif
 
   /* Check if we have already initialized */
 
@@ -132,35 +121,11 @@ int board_adc_initialize(void)
 
       initialized = true;
     }
-  return OK;
-}
 #endif /* CONFIG_ADC */
 
-/************************************************************************************
- * Name: board_adc_setup
- *
- * Description:
- *   All Tiva architectures must provide the following interface to work with
- *   examples/adc.
- *
- ************************************************************************************/
-
-#ifdef CONFIG_EXAMPLES_ADC
-int board_adc_setup(void)
-{
-#ifdef CONFIG_TIVA_ADC
-  return board_adc_initialize();
-#else
-  return -ENOSYS;
-#endif
+  return OK;
 }
-#endif /* CONFIG_EXAMPLES_ADC */
-
-#if defined (CONFIG_TIVA_ADC) && defined (CONFIG_TIVA_TIMER)
-
-/* Tiva timer interface does not currently support user configuration */
 
-#if 0
 /************************************************************************************
  * Name: adc_timer_init
  *
@@ -169,6 +134,9 @@ int board_adc_setup(void)
  *
  ************************************************************************************/
 
+/* Tiva timer interface does not currently support user configuration */
+
+#if 0 /* defined(CONFIG_TIVA_TIMER) */
 TIMER_HANDLE adc_timer_init(void)
 {
   struct tiva_gptm32config_s adctimer =
@@ -189,6 +157,6 @@ TIMER_HANDLE adc_timer_init(void)
 
   return tiva_gptm_configure((const struct tiva_gptmconfig_s *)&adctimer);
 }
+#endif /* CONFIG_TIVA_TIMER */
 
-#endif
-#endif /* defined (CONFIG_TIVA_ADC) && defined (CONFIG_TIVA_TIMER) */
+#endif /* CONFIG_TIVA_ADC */
diff --git a/configs/tm4c123g-launchpad/src/tm4c_autoleds.c b/configs/tm4c123g-launchpad/src/tm4c_autoleds.c
index 01c6c9a71a11b69a4e256ab884c8c7fb2665f89f..c07c1b9dc81ef7c5fe9fdf8e5dfd5aa5c10bf1a7 100644
--- a/configs/tm4c123g-launchpad/src/tm4c_autoleds.c
+++ b/configs/tm4c123g-launchpad/src/tm4c_autoleds.c
@@ -97,34 +97,14 @@
  * LED_PANIC         4      ON   OFF   OFF (flashing 2Hz)
  */
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#ifdef CONFIG_DEBUG_LEDS
+#ifdef CONFIG_DEBUG_LEDS_INFO
 #  define led_dumpgpio(m) tiva_dumpgpio(LED_GPIO, m)
 #else
 #  define led_dumpgpio(m)
 #endif
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -140,7 +120,7 @@
 #ifdef CONFIG_ARCH_LEDS
 void tm4c_led_initialize(void)
 {
-  leddbg("Initializing\n");
+  ledinfo("Initializing\n");
 
   /* Configure Port E, Bit 1 as an output, initial value=OFF */
 
diff --git a/configs/tm4c123g-launchpad/src/tm4c_bringup.c b/configs/tm4c123g-launchpad/src/tm4c_bringup.c
index 48a8d649fea3236f59bcc6ded6a97ab7f3368c07..d70b9156bab3b215034240529ea3dc2aeb01f86a 100644
--- a/configs/tm4c123g-launchpad/src/tm4c_bringup.c
+++ b/configs/tm4c123g-launchpad/src/tm4c_bringup.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * config/tm4c123g-launchpad/src/tm4c_bringup.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -63,6 +63,16 @@ int tm4c_bringup(void)
 {
   int ret = OK;
 
+#ifdef CONFIG_TIVA_ADC
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = tm4c_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: tm4c_adc_setup failed: %d\n", ret);
+    }
+#endif
+
 #ifdef HAVE_AT24
   /* Initialize the AT24 driver */
 
@@ -85,5 +95,6 @@ int tm4c_bringup(void)
     }
 #endif /* CONFIG_TIVA_TIMER */
 
+  UNUSED(ret);
   return ret;
 }
diff --git a/configs/tm4c123g-launchpad/src/tm4c_buttons.c b/configs/tm4c123g-launchpad/src/tm4c_buttons.c
index 57c285ea60b74d9685fca0ec828b07a2469de36d..a61c7e9c78d497c71be309ad29be0a478093d105 100644
--- a/configs/tm4c123g-launchpad/src/tm4c_buttons.c
+++ b/configs/tm4c123g-launchpad/src/tm4c_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * config/tm4c123g-launchpad/src/tm4c_buttons.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Bradley Noyes 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,6 +39,8 @@
 
 #include 
 
+#include 
+
 #include 
 #include 
 #include 
@@ -143,16 +145,15 @@ uint8_t board_buttons(void)
  * Description:
  *   This function may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is one
- *   of the BUTTON* definitions provided above. The previous interrupt
- *   handler address is returned (so that it may restored, if so desired).
+ *   of the BUTTON* definitions provided above.
  *
  ****************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
-  uint32_t pinset= 0;
+  uint32_t pinset = 0;
+  int ret;
 
   /* Determine which switch to set the irq handler for */
 
@@ -167,23 +168,21 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
         break;
 
       default:
-        return NULL;
+        return -EINVAL;
     }
 
     /* Are we attaching or detaching? */
 
     if (irqhandler != NULL)
       {
-        oldhandler = tiva_gpioirqattach(pinset, irqhandler);
+        ret = tiva_gpioirqattach(pinset, irqhandler, arg);
       }
     else
       {
-        oldhandler = tiva_gpioirqdetach(pinset);
+        ret = tiva_gpioirqdetach(pinset);
       }
 
-  /* Return the old button handler (so that it can be restored) */
-
-  return oldhandler;
+  return ret;
 }
 #endif
 
diff --git a/configs/tm4c123g-launchpad/src/tm4c_ssi.c b/configs/tm4c123g-launchpad/src/tm4c_ssi.c
index e1127a01f5ad318a5cc25b2e2f507fd13f59ef6e..7b295f76aa842ca48d2ce65f893d09b8bf449f0b 100644
--- a/configs/tm4c123g-launchpad/src/tm4c_ssi.c
+++ b/configs/tm4c123g-launchpad/src/tm4c_ssi.c
@@ -59,28 +59,12 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* CONFIG_DEBUG_SPI enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define ssidbg lldbg
-#else
-#  define ssidbg(x...)
-#endif
-
-/* Dump GPIO registers */
-
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
-#  define ssivdbg lldbg
+#ifdef CONFIG_DEBUG_SPI_INFO)
 #  define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
 #else
-#  define ssivdbg(x...)
 #  define ssi_dumpgpio(m)
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -118,14 +102,14 @@ void weak_function tm4c_ssidev_initialize(void)
 
 void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
   ssi_dumpgpio("tiva_ssiselect() Entry");
   ssi_dumpgpio("tiva_ssiselect() Exit");
 }
 
 uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  ssidbg("Returning SPI_STATUS_PRESENT\n");
+  spiinfo("Returning SPI_STATUS_PRESENT\n");
   return SPI_STATUS_PRESENT;
 }
 
diff --git a/configs/tm4c1294-launchpad/ipv6/Make.defs b/configs/tm4c1294-launchpad/ipv6/Make.defs
index 13fa06838c28b7940d16281f39b0a81e9869d97c..286f00894f84a56cb920ef69f235bf5fd9abafc5 100644
--- a/configs/tm4c1294-launchpad/ipv6/Make.defs
+++ b/configs/tm4c1294-launchpad/ipv6/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/tm4c1294-launchpad/ipv6/defconfig b/configs/tm4c1294-launchpad/ipv6/defconfig
index d7d7d7641294775bdb7ff9e483690648bdd7b815..d42abef3b3fe8fae735a2196db22765b78334e18 100644
--- a/configs/tm4c1294-launchpad/ipv6/defconfig
+++ b/configs/tm4c1294-launchpad/ipv6/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,14 +75,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
 CONFIG_ARCH_CHIP_TIVA=y
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 # CONFIG_ARCH_CHIP_LPC214X is not set
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -87,33 +92,59 @@ CONFIG_ARCH_CHIP_TIVA=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
 # CONFIG_ARCH_CORTEXM0 is not set
 # CONFIG_ARCH_CORTEXM3 is not set
 CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="tiva"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
 CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
 # CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
 # ARMV7M Configuration Options
 #
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
 CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
 
 #
@@ -233,7 +264,7 @@ CONFIG_TIVA_I2C_TIMEOMS=500
 CONFIG_TIVA_I2C_TIMEOTICKS=500
 
 #
-# Tiva Ethernet Configuration
+# Ethernet Configuration
 #
 CONFIG_TIVA_PHY_INTERNAL=y
 CONFIG_TIVA_AUTONEG=y
@@ -241,6 +272,7 @@ CONFIG_TIVA_PHY_INTERRUPTS=y
 CONFIG_TIVA_EMAC_NRXDESC=8
 CONFIG_TIVA_EMAC_NTXDESC=4
 # CONFIG_TIVA_EMAC_ENHANCEDDESC is not set
+CONFIG_TIVA_ETHERNET_HPWORK=y
 CONFIG_TIVA_BOARDMAC=y
 
 #
@@ -254,11 +286,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -312,11 +347,17 @@ CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
 
 #
 # RTOS Features
@@ -334,6 +375,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=3
@@ -351,6 +393,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=31
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -387,6 +430,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -402,9 +446,10 @@ CONFIG_SIG_SIGWORK=17
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -428,6 +473,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -438,24 +484,55 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 CONFIG_I2C=y
 # CONFIG_I2C_SLAVE is not set
 # CONFIG_I2C_POLLED is not set
 # CONFIG_I2C_TRACE is not set
+CONFIG_I2C_DRIVER=y
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
-# CONFIG_TIMER is not set
+# CONFIG_TIMERS_CS2100CP is not set
 # CONFIG_ANALOG is not set
 # CONFIG_AUDIO_DEVICES is not set
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -463,7 +540,11 @@ CONFIG_NETDEVICES=y
 #
 # General Ethernet MAC Driver Options
 #
+# CONFIG_NETDEV_LOOPBACK is not set
+# CONFIG_NETDEV_TELNET is not set
 # CONFIG_NETDEV_MULTINIC is not set
+# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set
+# CONFIG_NETDEV_LATEINIT is not set
 
 #
 # External Ethernet MAC Device Support
@@ -471,17 +552,18 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
-# CONFIG_NET_VNET is not set
+# CONFIG_NET_FTMAC100 is not set
 CONFIG_ARCH_PHY_INTERRUPT=y
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -505,14 +587,11 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -529,19 +608,27 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -549,13 +636,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -565,6 +650,8 @@ CONFIG_NET_GUARDSIZE=2
 #
 # CONFIG_NET_MULTILINK is not set
 CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
+# CONFIG_NET_TUN is not set
 
 #
 # Network Device Operations
@@ -654,6 +741,7 @@ CONFIG_NET_STATISTICS=y
 # Routing Table Configuration
 #
 # CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME=""
 
 #
 # Crypto API
@@ -676,18 +764,13 @@ CONFIG_NET_STATISTICS=y
 CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_FAT is not set
-# CONFIG_NFS is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -707,6 +790,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -734,6 +821,8 @@ CONFIG_LIBM=y
 CONFIG_LIBC_FLOATINGPOINT=y
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -746,15 +835,21 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_PERROR_STDOUT is not set
 CONFIG_ARCH_LOWPUTC=y
 # CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+CONFIG_LIBC_NETDB=y
+# CONFIG_NETDB_DNSCLIENT is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -771,23 +866,28 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -796,37 +896,46 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_UDPBLASTER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -838,41 +947,38 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
-# CONFIG_NETDB_DNSCLIENT is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
 # CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -892,13 +998,16 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
 # CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -907,16 +1016,19 @@ CONFIG_NSH_BUILTIN_APPS=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -925,12 +1037,15 @@ CONFIG_NSH_BUILTIN_APPS=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -953,11 +1068,11 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
-CONFIG_LIB_BOARDCTL=y
 
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 CONFIG_NSH_NETINIT_THREAD=y
 CONFIG_NSH_NETINIT_MONITOR=y
 CONFIG_NSH_NETINIT_SIGNO=18
@@ -1006,6 +1121,8 @@ CONFIG_NSH_IPv6NETMASK_7=0xffff
 CONFIG_NSH_IPv6NETMASK_8=0xff80
 # CONFIG_NSH_NOMAC is not set
 CONFIG_NSH_MAX_ROUNDTRIP=20
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -1019,39 +1136,11 @@ CONFIG_NSH_MAX_ROUNDTRIP=20
 #
 # System Libraries and NSH Add-Ons
 #
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# EMACS-like Command Line Editor
-#
 # CONFIG_SYSTEM_CLE is not set
-
-#
-# CU Minimal Terminal
-#
 # CONFIG_SYSTEM_CUTERM is not set
-
-#
-# FLASH Program Installation
-#
-# CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# Intel HEX to binary conversion
-#
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-
-#
-# I2C tool
-#
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=6
 CONFIG_I2CTOOL_MAXBUS=6
@@ -1059,88 +1148,18 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=400000
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# NxPlayer media player library / command Line
-#
-
-#
-# RAM test
-#
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_MDIO is not set
+# CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-
-#
-# P-Code Support
-#
-
-#
-# PHY Tool
-#
-# CONFIG_SYSTEM_MDIO is not set
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sudoku
-#
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-
-#
-# Sysinfo
-#
-
-#
-# Temperature
-#
-
-#
-# VI Work-Alike Editor
-#
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# USB Monitor
-#
-
-#
-# Zmodem Commands
-#
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/tm4c1294-launchpad/nsh/Make.defs b/configs/tm4c1294-launchpad/nsh/Make.defs
index bb91d3bb86c0e3390c3ba03cf541d15920a5152f..a3773d93004dd7239fca3201eeecd0b23bd57883 100644
--- a/configs/tm4c1294-launchpad/nsh/Make.defs
+++ b/configs/tm4c1294-launchpad/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/tm4c1294-launchpad/nsh/defconfig b/configs/tm4c1294-launchpad/nsh/defconfig
index 6c504d9f42c97dd8782b7323b8839d7a4a1665b2..5dddd2cc5d6e5c64cfe1e945cd276b2c2611008b 100644
--- a/configs/tm4c1294-launchpad/nsh/defconfig
+++ b/configs/tm4c1294-launchpad/nsh/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -93,7 +97,9 @@ CONFIG_ARCH_CHIP_TIVA=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
@@ -104,8 +110,17 @@ CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="tiva"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
@@ -113,6 +128,8 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 # CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -122,6 +139,7 @@ CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -254,6 +272,7 @@ CONFIG_TIVA_PHY_INTERRUPTS=y
 CONFIG_TIVA_EMAC_NRXDESC=8
 CONFIG_TIVA_EMAC_NTXDESC=4
 # CONFIG_TIVA_EMAC_ENHANCEDDESC is not set
+CONFIG_TIVA_ETHERNET_HPWORK=y
 CONFIG_TIVA_BOARDMAC=y
 
 #
@@ -267,6 +286,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -327,17 +347,15 @@ CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -357,6 +375,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2015
 CONFIG_START_MONTH=1
@@ -411,6 +430,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -426,9 +446,10 @@ CONFIG_SIG_SIGWORK=17
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -452,6 +473,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -469,13 +491,18 @@ CONFIG_I2C=y
 # CONFIG_I2C_SLAVE is not set
 # CONFIG_I2C_POLLED is not set
 # CONFIG_I2C_TRACE is not set
+CONFIG_I2C_DRIVER=y
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_TIMERS_CS2100CP is not set
@@ -484,8 +511,28 @@ CONFIG_I2C=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -507,18 +554,18 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 CONFIG_ARCH_PHY_INTERRUPT=y
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -542,10 +589,6 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -568,19 +611,26 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
 # CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -588,13 +638,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 # CONFIG_ARCH_HAVE_PHY is not set
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -730,12 +778,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -754,6 +796,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -781,6 +827,8 @@ CONFIG_LIBM=y
 CONFIG_LIBC_FLOATINGPOINT=y
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -796,7 +844,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
 CONFIG_NETDB_DNSCLIENT=y
 CONFIG_NETDB_DNSCLIENT_ENTRIES=8
@@ -809,8 +858,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -834,17 +885,20 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -854,40 +908,46 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -899,8 +959,9 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -913,25 +974,27 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CODECS is not set
 # CONFIG_NETUTILS_DHCPC is not set
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -951,6 +1014,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
 # CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
@@ -976,13 +1040,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -992,6 +1056,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -999,6 +1064,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1024,6 +1090,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 CONFIG_NSH_NETINIT_THREAD=y
 CONFIG_NSH_NETINIT_MONITOR=y
 CONFIG_NSH_NETINIT_SIGNO=18
@@ -1055,6 +1122,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
 CONFIG_NSH_TELNETD_CLIENTPRIO=100
 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
 CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 # CONFIG_NSH_TELNET_LOGIN is not set
 
 #
@@ -1069,11 +1138,11 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_I2CTOOL_MINBUS=6
 CONFIG_I2CTOOL_MAXBUS=6
@@ -1081,8 +1150,8 @@ CONFIG_I2CTOOL_MINADDR=0x03
 CONFIG_I2CTOOL_MAXADDR=0x77
 CONFIG_I2CTOOL_MAXREGADDR=0xff
 CONFIG_I2CTOOL_DEFFREQ=400000
-# CONFIG_FSUTILS_INIFILE is not set
-# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_MDIO is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1090,7 +1159,9 @@ CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
-# CONFIG_SYSTEM_MDIO is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/tm4c1294-launchpad/src/tm4c_appinit.c b/configs/tm4c1294-launchpad/src/tm4c_appinit.c
index 2245ac31e9eb3f9ab791834dcba96813f26b7328..35b1f1ce1b84cb74c754af1d63aef996a2cf02ab 100644
--- a/configs/tm4c1294-launchpad/src/tm4c_appinit.c
+++ b/configs/tm4c1294-launchpad/src/tm4c_appinit.c
@@ -43,6 +43,8 @@
 
 #include "tm4c1294-launchpad.h"
 
+#ifdef CONFIG_LIB_BOARDCTL
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -84,3 +86,5 @@ int board_app_initialize(uintptr_t arg)
   return OK;
 #endif
 }
+
+#endif /* CONFIG_LIB_BOARDCTL */
diff --git a/configs/tm4c1294-launchpad/src/tm4c_bringup.c b/configs/tm4c1294-launchpad/src/tm4c_bringup.c
index a6608ff431a0669a5b05b05f3f9b0eed5c1b5423..35e1f760278c295cc15cd6784c6f1e12107dd85d 100644
--- a/configs/tm4c1294-launchpad/src/tm4c_bringup.c
+++ b/configs/tm4c1294-launchpad/src/tm4c_bringup.c
@@ -39,12 +39,19 @@
 
 #include 
 
+#include 
+#include 
 #include 
 
 #include 
+#include 
 #include 
 
+#include 
+
 #include "tiva_i2c.h"
+#include "tiva_pwm.h"
+#include "tiva_qencoder.h"
 #include "tm4c1294-launchpad.h"
 
 /****************************************************************************
@@ -55,6 +62,20 @@
 #  define HAVE_TIMER
 #endif
 
+#ifdef CONFIG_TM4C1294_LAUNCHPAD_PWM
+#  define HAVE_PWM
+#endif
+
+#if defined(CONFIG_TIVA_QEI0) || defined(CONFIG_TIVA_QEI1)
+#  define HAVE_QEI
+#endif
+
+#define PWM_PATH_FMT        "/dev/pwm%d"
+#define PWM_PATH_FMTLEN     (10)
+
+#define QEI_PATH_FMT        "/dev/qei%d"
+#define QEI_PATH_FMTLEN     (10)
+
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -76,14 +97,14 @@ static void tm4c_i2c_register(int bus)
   i2c = tiva_i2cbus_initialize(bus);
   if (i2c == NULL)
     {
-      dbg("ERROR: Failed to get I2C%d interface\n", bus);
+      _err("ERROR: Failed to get I2C%d interface\n", bus);
     }
   else
     {
       ret = i2c_register(i2c, bus);
       if (ret < 0)
         {
-          dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
+          _err("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
           tiva_i2cbus_uninitialize(i2c);
         }
     }
@@ -136,6 +157,141 @@ static void tm4c_i2ctool(void)
 #  define tm4c_i2ctool()
 #endif
 
+/****************************************************************************
+* Name: tm4c_pwm_register
+*
+* Description:
+*   Register a PWM dev file with the upper_level PWM driver.
+*
+* Input Parameters:
+*   channel - A number identifying the PWM channel use.
+*
+* Returned Value:
+*   None.
+*
+****************************************************************************/
+
+#ifdef HAVE_PWM
+static void tm4c_pwm_register(int channel)
+{
+  FAR struct pwm_lowerhalf_s *dev;
+  char pwm_path[PWM_PATH_FMTLEN];
+  int ret;
+
+  dev = tiva_pwm_initialize(channel);
+  if (dev == NULL)
+    {
+      _err("ERROR: Failed to get PWM%d interface\n", channel);
+    }
+  else
+    {
+      snprintf(pwm_path, PWM_PATH_FMTLEN, PWM_PATH_FMT, channel);
+      ret = pwm_register(pwm_path, dev);
+      if (ret < 0)
+        {
+          _err("ERROR: Failed to register PWM%d driver: %d\n",
+                 channel, ret);
+        }
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: tm4c_pwm
+ *
+ * Description:
+ *   Register PWM drivers for the PWM tool.
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_PWM
+static void tm4c_pwm(void)
+{
+#ifdef CONFIG_TIVA_PWM0_CHAN0
+  tm4c_pwm_register(0);
+#endif
+#ifdef CONFIG_TIVA_PWM0_CHAN1
+  tm4c_pwm_register(1);
+#endif
+#ifdef CONFIG_TIVA_PWM0_CHAN2
+  tm4c_pwm_register(2);
+#endif
+#ifdef CONFIG_TIVA_PWM0_CHAN3
+  tm4c_pwm_register(3);
+#endif
+#ifdef CONFIG_TIVA_PWM0_CHAN4
+  tm4c_pwm_register(4);
+#endif
+#ifdef CONFIG_TIVA_PWM0_CHAN5
+  tm4c_pwm_register(5);
+#endif
+#ifdef CONFIG_TIVA_PWM0_CHAN6
+  tm4c_pwm_register(6);
+#endif
+#ifdef CONFIG_TIVA_PWM0_CHAN7
+  tm4c_pwm_register(7);
+#endif
+}
+#endif
+
+/****************************************************************************
+ * Name: tm4c_qei_register
+ *
+ * Description:
+ *   Register a QEI dev file with the upper_level QEI driver.
+ *
+ * Input Parameters:
+ *   id - A number identifying the QEI.
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_QEI
+static void tm4c_qei_register(int id)
+{
+  FAR struct qe_lowerhalf_s *dev;
+  int ret;
+  char qe_path[QEI_PATH_FMTLEN];
+
+  dev = tiva_qei_initialize(id);
+  if (dev == NULL)
+    {
+      _err("ERROR: Failed to get QEI %d\n", id);
+    }
+  else
+    {
+      snprintf(qe_path, QEI_PATH_FMTLEN, QEI_PATH_FMT, id);
+      ret = qe_register(qe_path, dev);
+      if (ret < 0)
+        {
+          _err("ERROR: Failed to register QEI %d driver: %d\n", id, ret);
+        }
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: tm4c_qei
+ *
+ * Description:
+ *   Register QEI drivers for the QEI tool.
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_QEI
+static void tm4c_qei(void)
+{
+#ifdef CONFIG_TIVA_QEI0
+  tm4c_qei_register(0);
+#endif
+#ifdef CONFIG_TIVA_QEI1
+  tm4c_qei_register(1);
+#endif
+}
+#endif
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -158,13 +314,25 @@ int tm4c_bringup(void)
 
   tm4c_i2ctool();
 
+#ifdef HAVE_PWM
+  /* Register PWM drivers */
+
+  tm4c_pwm();
+#endif
+
+#ifdef HAVE_QEI
+  /* Register QEI drivers */
+
+  tm4c_qei();
+#endif
+
 #ifdef HAVE_TIMER
   /* Initialize the timer driver */
 
   ret = tiva_timer_configure();
   if (ret < 0)
     {
-      dbg("ERROR: Failed to initialize timer driver: %d\n", ret);
+      _err("ERROR: Failed to initialize timer driver: %d\n", ret);
     }
 #endif
 
diff --git a/configs/tm4c1294-launchpad/src/tm4c_ethernet.c b/configs/tm4c1294-launchpad/src/tm4c_ethernet.c
index 3b70b2385320867ae31742f60a77823b50fd4090..c62d0fc01237fc9936010b2992fb41c3c2a68336 100644
--- a/configs/tm4c1294-launchpad/src/tm4c_ethernet.c
+++ b/configs/tm4c1294-launchpad/src/tm4c_ethernet.c
@@ -84,7 +84,7 @@ void tiva_ethernetmac(struct ether_addr *ethaddr)
   user0 = getreg32(TIVA_FLASH_USERREG0);
   user1 = getreg32(TIVA_FLASH_USERREG1);
 
-  nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
+  ninfo("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
   DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff);
 
   /* Re-format that MAC address the way that the network expects to see it */
diff --git a/configs/tm4c1294-launchpad/src/tm4c_timer.c b/configs/tm4c1294-launchpad/src/tm4c_timer.c
index 0d661307c3979f1c5e199194e5b7323b3e4dd644..7405bcc06d64e09969fd50bccffac8803b263ce6 100644
--- a/configs/tm4c1294-launchpad/src/tm4c_timer.c
+++ b/configs/tm4c1294-launchpad/src/tm4c_timer.c
@@ -101,14 +101,14 @@ int tiva_timer_configure(void)
 {
   int ret;
 
-  timvdbg("Registering TIMER%d at %s\n",
+  tmrinfo("Registering TIMER%d at %s\n",
           GPTM, CONFIG_TM4C1294_LAUNCHPAD_TIMER_DEVNAME);
 
   ret = tiva_timer_register(CONFIG_TM4C1294_LAUNCHPAD_TIMER_DEVNAME,
                             GPTM, ALTCLK);
   if (ret < 0)
     {
-      timdbg("ERROR: Failed to register timer driver: %d\n", ret);
+      tmrerr("ERROR: Failed to register timer driver: %d\n", ret);
     }
 
   return ret;
diff --git a/configs/tm4c1294-launchpad/src/tm4c_userleds.c b/configs/tm4c1294-launchpad/src/tm4c_userleds.c
index d73ab5a13f7b5740bd4d6d50ca7fdf0e6fc3379b..c3a285b29cd5409ea76b9080548c549e98ed08d6 100644
--- a/configs/tm4c1294-launchpad/src/tm4c_userleds.c
+++ b/configs/tm4c1294-launchpad/src/tm4c_userleds.c
@@ -63,22 +63,6 @@
 
 #ifndef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/configs/twr-k60n512/README.txt b/configs/twr-k60n512/README.txt
index e3c827f9875156acc923f1b232f48e8e5a544df3..9c64cae46db830079bdc936b64ec9bf960f4818c 100644
--- a/configs/twr-k60n512/README.txt
+++ b/configs/twr-k60n512/README.txt
@@ -605,7 +605,7 @@ TWR-K60N512-specific Configuration Options
 
   PIN Interrupt Support
 
-    CONFIG_GPIO_IRQ          -- Enable pin interrupt support.  Also needs
+    CONFIG_KINETIS_GPIOIRQ   -- Enable pin interrupt support.  Also needs
       one or more of the following:
     CONFIG_KINETIS_PORTAINTS -- Support 32 Port A interrupts
     CONFIG_KINETIS_PORTBINTS -- Support 32 Port B interrupts
@@ -687,7 +687,7 @@ Where  is one of the following:
       CONFIG_FAT_LFN=y                     : FAT long file name support
       CONFIG_FAT_MAXFNAME=32               : Maximum lenght of a long file name
 
-      CONFIG_GPIO_IRQ=y                    : Enable GPIO interrupts
+      CONFIG_KINETIS_GPIOIRQ=y             : Enable GPIO interrupts
       CONFIG_KINETIS_PORTEINTS=y           : Enable PortE GPIO interrupts
 
       CONFIG_SCHED_WORKQUEUE=y             : Enable the NuttX workqueue
diff --git a/configs/twr-k60n512/include/board.h b/configs/twr-k60n512/include/board.h
index 92c6dce940483dc7cae38c3dc4c62fd94efa2563..ea464c0d439ec572d4083401bfbacb335539c4cf 100644
--- a/configs/twr-k60n512/include/board.h
+++ b/configs/twr-k60n512/include/board.h
@@ -154,8 +154,8 @@
 #define BUTTON_SW1        0
 #define BUTTON_SW2        1
 
-#define BUTTON_SW1_BIT    (1 << BUTTON_WAKEUP)
-#define BUTTON_SW2_BIT    (1 << BUTTON_TAMPER)
+#define BUTTON_SW1_BIT    (1 << BUTTON_SW1)
+#define BUTTON_SW2_BIT    (1 << BUTTON_SW2)
 
 /* Alternative pin resolution *******************************************************/
 /* If there are alternative configurations for various pins in the
diff --git a/configs/twr-k60n512/nsh/Make.defs b/configs/twr-k60n512/nsh/Make.defs
index e002cca1a053466b45471b88570eb6b02389cb6d..948929aca67f69fac43c168be2328a4109d490dd 100644
--- a/configs/twr-k60n512/nsh/Make.defs
+++ b/configs/twr-k60n512/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/twr-k60n512/nsh/defconfig b/configs/twr-k60n512/nsh/defconfig
index ac65d4c0257020aec86199c36776a94a0cb7e861..c56aa24933e309b59d9371ceaa4417dc81084050 100644
--- a/configs/twr-k60n512/nsh/defconfig
+++ b/configs/twr-k60n512/nsh/defconfig
@@ -37,14 +37,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -71,10 +72,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 CONFIG_ARCH_CHIP_KINETIS=y
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -92,7 +93,11 @@ CONFIG_ARCH_CHIP_KINETIS=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -102,12 +107,23 @@ CONFIG_ARCH_CORTEXM4=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="kinetis"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARCH_HAVE_DPFPU is not set
 # CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -117,6 +133,7 @@ CONFIG_ARCH_HAVE_FPU=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -128,6 +145,14 @@ CONFIG_ARMV7M_OABI_TOOLCHAIN=y
 #
 # Kinetis Configuration Options
 #
+# CONFIG_ARCH_CHIP_MK20DN32VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX32VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DN64VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX64VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DN128VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX128VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX64VLH7 is not set
+# CONFIG_ARCH_CHIP_MK20DX128VLH7 is not set
 # CONFIG_ARCH_CHIP_MK20DX256VLH7 is not set
 # CONFIG_ARCH_CHIP_MK40N512VLQ100 is not set
 # CONFIG_ARCH_CHIP_MK40N512VMD100 is not set
@@ -137,6 +162,7 @@ CONFIG_ARMV7M_OABI_TOOLCHAIN=y
 # CONFIG_ARCH_CHIP_MK40X256VMD100 is not set
 # CONFIG_ARCH_CHIP_MK60N256VLQ100 is not set
 # CONFIG_ARCH_CHIP_MK60N256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VLL100 is not set
 # CONFIG_ARCH_CHIP_MK60N512VLQ100 is not set
 CONFIG_ARCH_CHIP_MK60N512VMD100=y
 # CONFIG_ARCH_CHIP_MK60X256VLQ100 is not set
@@ -193,7 +219,7 @@ CONFIG_KINETIS_UART3=y
 #
 # Kinetis GPIO Interrupt Configuration
 #
-# CONFIG_GPIO_IRQ is not set
+# CONFIG_KINETIS_GPIOIRQ is not set
 
 #
 # Kinetis UART Configuration
@@ -210,11 +236,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -310,6 +339,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -360,9 +390,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -393,6 +424,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
@@ -410,17 +442,33 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -444,14 +492,11 @@ CONFIG_UART3_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART3_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -468,19 +513,23 @@ CONFIG_UART3_PARITY=0
 CONFIG_UART3_2STOP=0
 # CONFIG_UART3_IFLOWCONTROL is not set
 # CONFIG_UART3_OFLOWCONTROL is not set
+# CONFIG_UART3_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -513,19 +562,16 @@ CONFIG_FS_FAT=y
 # CONFIG_FAT_LCNAMES is not set
 # CONFIG_FAT_LFN is not set
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -544,6 +590,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -588,11 +638,15 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -607,26 +661,26 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -634,33 +688,44 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -673,30 +738,28 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -715,6 +778,7 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
@@ -723,6 +787,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -731,8 +796,10 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -751,8 +818,10 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
@@ -779,6 +848,8 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 # CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -792,16 +863,19 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-# CONFIG_SYSTEM_POWEROFF is not set
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/twr-k60n512/src/k60_appinit.c b/configs/twr-k60n512/src/k60_appinit.c
index ffcb0b7f9f397acab2d9888be0eb6db03fe0b83b..4bbbaee8ddb56477ba0fb65359bcfe0a46585980 100644
--- a/configs/twr-k60n512/src/k60_appinit.c
+++ b/configs/twr-k60n512/src/k60_appinit.c
@@ -98,8 +98,8 @@
 
 /* We expect to receive GPIO interrupts for card insertion events */
 
-#ifndef CONFIG_GPIO_IRQ
-#  error "CONFIG_GPIO_IRQ required for card detect interrupt"
+#ifndef CONFIG_KINETIS_GPIOIRQ
+#  error "CONFIG_KINETIS_GPIOIRQ required for card detect interrupt"
 #endif
 
 #ifndef CONFIG_KINETIS_PORTEINTS
@@ -224,7 +224,7 @@ int board_app_initialize(uintptr_t arg)
   /* Attached the card detect interrupt (but don't enable it yet) */
 
   kinetis_pinconfig(GPIO_SD_CARDDETECT);
-  kinetis_pinirqattach(GPIO_SD_CARDDETECT, kinetis_cdinterrupt);
+  (void)kinetis_pinirqattach(GPIO_SD_CARDDETECT, kinetis_cdinterrupt, NULL);
 
   /* Configure the write protect GPIO */
 
diff --git a/configs/twr-k60n512/src/k60_buttons.c b/configs/twr-k60n512/src/k60_buttons.c
index 0cda432483819ab5049ec0f3f83101eeb31b1689..a952f64828d8d8d107727f1e9bb5853690c285f6 100644
--- a/configs/twr-k60n512/src/k60_buttons.c
+++ b/configs/twr-k60n512/src/k60_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/twr-k60n512/src/k60_buttons.c
  *
- *   Copyright (C) 2011, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -128,15 +129,13 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler;
   uint32_t pinset;
 
   /* Map the button id to the GPIO bit set. */
@@ -151,7 +150,7 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
     }
   else
     {
-      return NULL;
+      return -EINVAL;
     }
 
   /* The button has already been configured as an interrupting input (by
@@ -160,12 +159,15 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
    * Attach the new button handler.
    */
 
-  oldhandler = knetis_pinirqattach(pinset, irqhandler);
+  ret = kinetis_pinirqattach(pinset, irqhandler, arg);
+  if (ret >= 0)
+    {
+      /* Then make sure that interrupts are enabled on the pin */
 
-  /* Then make sure that interrupts are enabled on the pin */
+      kinetis_pindmaenable(pinset);
+    }
 
-  kinetis_pindmaenable(pinset);
-  return oldhandler;
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/twr-k60n512/src/k60_leds.c b/configs/twr-k60n512/src/k60_leds.c
index 76238c548ab7443aeea9a65ef99f804f525568d8..c11e04cb2ed20dae500f30917725e282eba74c66 100644
--- a/configs/twr-k60n512/src/k60_leds.c
+++ b/configs/twr-k60n512/src/k60_leds.c
@@ -119,18 +119,6 @@
 #define LED_PANIC_OFF_SETBITS        ((0) << OFF_SETBITS_SHIFT)
 #define LED_PANIC_OFF_CLRBITS        ((K60_LED4) << OFF_CLRBITS_SHIFT)
 
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
diff --git a/configs/twr-k60n512/src/k60_spi.c b/configs/twr-k60n512/src/k60_spi.c
index 8aa48e369bcb423213da1e9e0d4e006caca27268..92e3649000f2c260402e0a8e93af2fd06f85dfc5 100644
--- a/configs/twr-k60n512/src/k60_spi.c
+++ b/configs/twr-k60n512/src/k60_spi.c
@@ -51,30 +51,8 @@
 #include "kinetis.h"
 #include "twr-k60n512.h"
 
-#if defined(CONFIG_KINETIS_SPI1) || defined(CONFIG_KINETIS_SPI2)
-
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef CONFIG_DEBUG_SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
+#if defined(CONFIG_KINETIS_SPI0) || defined(CONFIG_KINETIS_SPI1) || \
+	defined(CONFIG_KINETIS_SPI2)
 
 /************************************************************************************
  * Public Functions
@@ -94,10 +72,10 @@ void weak_function kinetis_spidev_initialize(void)
 }
 
 /****************************************************************************
- * Name:  kinetis_spi1/2/3select and kinetis_spi1/2/3status
+ * Name:  kinetis_spi0/1/2select and kinetis_spi0/1/2status
  *
  * Description:
- *   The external functions, kinetis_spi1/2/3select and kinetis_spi1/2/3status must be
+ *   The external functions, kinetis_spi0/1/2select and kinetis_spi0/1/2status must be
  *   provided by board-specific logic.  They are implementations of the select
  *   and status methods of the SPI interface defined by struct spi_ops_s (see
  *   include/nuttx/spi/spi.h). All other methods (including kinetis_spibus_initialize())
@@ -106,7 +84,7 @@ void weak_function kinetis_spidev_initialize(void)
  *
  *   1. Provide logic in kinetis_boardinitialize() to configure SPI chip select
  *      pins.
- *   2. Provide kinetis_spi1/2/3select() and kinetis_spi1/2/3status() functions in your
+ *   2. Provide kinetis_spi0/1/2select() and kinetis_spi0/1/2status() functions in your
  *      board-specific logic.  These functions will perform chip selection and
  *      status operations using GPIOs in the way your board is configured.
  *   3. Add a calls to kinetis_spibus_initialize() in your low level application
@@ -118,46 +96,46 @@ void weak_function kinetis_spidev_initialize(void)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_KINETIS_SPI1
-void kinetis_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+#ifdef CONFIG_KINETIS_SPI0
+void kinetis_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 # warning "Missing logic"
 }
 
-uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+uint8_t kinetis_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
 # warning "Missing logic"
   return SPI_STATUS_PRESENT;
 }
 #endif
 
-#ifdef CONFIG_KINETIS_SPI2
-void kinetis_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+#ifdef CONFIG_KINETIS_SPI1
+void kinetis_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 # warning "Missing logic"
 }
 
-uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
 # warning "Missing logic"
   return SPI_STATUS_PRESENT;
 }
 #endif
 
-#ifdef CONFIG_KINETIS_SPI3
-void kinetis_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+#ifdef CONFIG_KINETIS_SPI2
+void kinetis_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 # warning "Missing logic"
 }
 
-uint8_t kinetis_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
 # warning "Missing logic"
   return SPI_STATUS_PRESENT;
 }
 #endif
 
-#endif /* CONFIG_KINETIS_SPI1 || CONFIG_KINETIS_SPI2 */
+#endif /* CONFIG_KINETIS_SPI0 || CONFIG_KINETIS_SPI1 || CONFIG_KINETIS_SPI2 */
diff --git a/configs/twr-k60n512/src/k60_usbdev.c b/configs/twr-k60n512/src/k60_usbdev.c
index b542834768f1c1e65182562664931dfd1eba009a..23c43088665a4b54d44e4067a125b782c979549c 100644
--- a/configs/twr-k60n512/src/k60_usbdev.c
+++ b/configs/twr-k60n512/src/k60_usbdev.c
@@ -108,7 +108,6 @@ int kinetis_usbpullup(FAR struct usbdev_s *dev, bool enable)
 
 void kinetis_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 #warning "Missing logic"
 }
-
diff --git a/configs/twr-k64f120m/Kconfig b/configs/twr-k64f120m/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..4131b4feac4c89139541657d3605ca52842beb91
--- /dev/null
+++ b/configs/twr-k64f120m/Kconfig
@@ -0,0 +1,36 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_BOARD_TWR_K64F120M
+
+config TWR_K64F120M_SDHC_AUTOMOUNT
+	bool "SDHC automounter"
+	default n
+	depends on FS_AUTOMOUNTER && KINETIS_SDHC
+
+if TWR_K64F120M_SDHC_AUTOMOUNT
+
+config TWR_K64F120M_SDHC_AUTOMOUNT_FSTYPE
+	string "SDHC file system type"
+	default "vfat"
+
+config TWR_K64F120M_SDHC_AUTOMOUNT_BLKDEV
+	string "SDHC block device"
+	default "/dev/mmcsd0"
+
+config TWR_K64F120M_SDHC_AUTOMOUNT_MOUNTPOINT
+	string "SDHC mount point"
+	default "/mnt/sdcard"
+
+config TWR_K64F120M_SDHC_AUTOMOUNT_DDELAY
+	int "SDHC debounce delay (milliseconds)"
+	default 1000
+
+config TWR_K64F120M_SDHC_AUTOMOUNT_UDELAY
+	int "SDHC unmount retry delay (milliseconds)"
+	default 2000
+
+endif # TWR_K64F120M_SDHC_AUTOMOUNT
+endif # ARCH_BOARD_TWR_K64F120M
diff --git a/configs/twr-k64f120m/README.txt b/configs/twr-k64f120m/README.txt
new file mode 100644
index 0000000000000000000000000000000000000000..cbb5a88b8d34996b46ecb131372a11f1e2b62a97
--- /dev/null
+++ b/configs/twr-k64f120m/README.txt
@@ -0,0 +1,821 @@
+README.txt
+==========
+
+This is the README file for the port of NuttX to the Freescale Kinetis
+TWR-K64F120M.  Refer to the Freescale web site for further information
+about this part:
+
+www.nxp.com/products/sensors/accelerometers/3-axis-accelerometers/kinetis-k64-mcu-tower-system-module:TWR-K64F120M
+
+The board may be complemented by TWR-SER which includes (among other things), an RS232 and Ethernet connections:
+
+http://www.nxp.com/pages/serial-usb-ethernet-can-rs232-485-tower-system-module:TWR-SER
+
+Contents
+========
+
+  o Kinetis TWR-K64F120M Features
+  o Kinetis TWR-K64F120M Pin Configuration
+    - On-Board Connections
+    - Connections via the General Purpose Tower Plug-in (TWRPI) Socket
+    - Connections via the Tower Primary Connector Side A
+    - Connections via the Tower Primary Connector Side B
+    - TWR-SER Serial Board Connection
+  o LEDs
+  o Development Environment
+  o GNU Toolchain Options
+  o IDEs
+  o NuttX EABI "buildroot" Toolchain
+  o NuttX OABI "buildroot" Toolchain
+  o NXFLAT Toolchain
+
+Kinetis TWR-K64F120M Features:
+=============================
+
+  o K64N1M in 144 MAPBGA, MK64FN1M0VMD12
+  o Integrated, Open-SDA serial, flash and debug through USB
+  o SD Card Slot
+  o MMA7660 3-axis accelerometer
+  o Tower Plug-In (TWRPI) Socket for expansion (sensors, etc.)
+  o Touch TWRPI Socket adds support for various capacitive touch boards
+    (e.g. keypads, rotary dials, sliders, etc.)
+  o Tower connectivity for access to USB, Ethernet, RS232/RS485, CAN, SPI,
+    IC, Flexbus, etc.
+  o Plus: Potentiometer, 4 LEDs, 2 pushbuttons, accelerometer, RTC battery
+
+Kinetis TWR-K64F120M Pin Configuration
+======================================
+
+On-Board Connections
+-------------------- ------------------------- -------- -------------------
+FEATURE              CONNECTION                PORT/PIN PIN FUNCTION
+-------------------- ------------------------- -------- -------------------
+OSJTAG USB-to-serial OSJTAG Bridge RX Data     PTC3     UART1_RX
+Bridge               OSJTAG Bridge TX Data     PTC4     UART1_TX
+SD Card Slot         SD Clock                  PTE2     SDHC0_DCLK
+                     SD Command                PTE3     SDHC0_CMD
+                     SD Data0                  PTE1     SDHC0_D0
+                     SD Data1                  PTE0     SDHC0_D1
+                     SD Data2                  PTE5     SDHC0_D2
+                     SD Data3                  PTE4     SDHC0_D3
+                     SD Card Detect            PTB20    PTB20
+                     SD Write Protect          PTB21    PTB21
+Micro-USB            K64_MICRO_USB_DN          USB0_DN
+                     K64_MICRO_USB_DP          USB0_DP
+                     K64_USB_ID_J              PTE12
+                     K64_USB_FLGA              PTC8
+                     K64_USB_ENABLE            PTC9
+Pushbuttons          SW1 (LLWU_P10)            PTC6     PTC6
+                     SW2 (RSTIN_B_R)           RSTIN    RESET
+                     SW3 (NMI B)               PTA4     PTA4
+LEDs                 D5 / Green LED            PTE6     PTE6 
+                     D6 / Yellow LED           PTE7     PTE7 
+                     D7 / Orange LED           PTE8     PTE8 
+                     D9 / Blue LED             PTE9     PTE9 
+Potentiometer        Potentiometer (R526)      ?        ADC1_SE18
+Accelerometer        I2C SDA                   PTC11    I2C1_SDA
+                     I2C SCL                   PTC10    I2C1_SCL
+                     INT1                      PTA6     PTA6
+                     INT2                      PTA8     PTA8
+                     
+SDHC important notice: on TWR-K64F120M, R521 (close to the SD card holder) is not placed,
+hence WRPROTEC is always ON. Either place a 4.7KOhm resistor or change PIN config
+to PULLDOWN, loosing Write Protect function. See twrk64.h.                     
+
+Connections via the General Purpose Tower Plug-in (TWRPI) Socket
+-------------------- ------------------------- -------- -------------------
+FEATURE              CONNECTION                PORT/PIN PIN FUNCTION
+-------------------- ------------------------- -------- -------------------
+General Purpose      TWRPI ADC0 (J4 Pin 8)     ?        ADC1_SE16/ADC0_SE22
+TWRPI Socket         TWRPI_ADC1 (J4 Pin 9)     ?        ADC0_SE16/ADC0_SE21
+                     TWRPI_ADC2 (J4 Pin 12)    ?        ADC1_DP0/ADC0_DP3
+                     TWRPI_ID0 (J4 Pin 17)     ?        ADC0_DP0/AD1_DP3
+                     TWRPI_ID1 (J4 Pin 18)     ?        ADC0_DM0/ADC1_DM3
+                     TWRPI I2C SCL (J3 Pin 3)  PTC10    I2C1_SCL
+                     TWRPI I2C SDA (J3 Pin 4)  PTC11    I2C1_SDA
+                     SPI1_SOUT (J3 Pin 10)     PTB16    ?
+                     SPI1_PCS0 (J3 Pin 11)     PTB10    PTB10
+                     SPI1_SCK (J3 Pin 12)      PTB11    ?
+                     TWRPI_GPIO0 (J3 Pin 15)   PTB3     PTB3
+                     TWRPI GPIO1 (J3 Pin 16)   PTC0     PTC0
+                     TWRPI GPIO2 (J3 Pin 17)   PTC16    PTC16
+                     TWRPI GPIO3 (J3 Pin 18)   PTC17    PTC17
+                     TWRPI GPIO4 (J3 Pin 19)   PTC18    PTC18
+                     TWRPI GPIO5 (J3 Pin 20)   PTC19    PTC19
+
+The TWR-K64F120M features two expansion card-edge connectors that interface
+to the Primary and Secondary Elevator boards in a Tower system. The Primary
+Connector (comprised of sides A and B) is identified by a white strip.
+The Secondary Connector is comprised of sides C and D.
+
+
+TWR-SER Serial Board Connection
+===============================
+
+The serial board connects into the tower and then maps to the tower pins to
+yet other functions (see TWR-SER-SCH.pdf).
+
+In particular it features an Ethernet port.
+
+Networking Support
+==================
+
+  U2 is a 25 MHz oscillator (which may be disabled by setting J4), which clock is sent to U1.
+  U1 has two clock output banks: 25MHz (CLKBx) and 50MHz (CLKAx).
+  J2 (ser board) is used to select the PHY clock source: 50MHz, 25MHz or CLCKOUT0 from K64. Set it to 25MHz.
+  In order to keep synchornized the PHY clock with the K64 clock, one can set J3 (default is open)
+  to route CLOCKIN0 either from 25MHz or 50Mhz lines. In that case, J33 (main board) will have to be removed
+  and J32 (main board set) set to disable its 50MHz_OSC and use CLKIN0 provided by ser board.
+  J12 is by default set to RMII mode. In this case J2 should be placed to 50MHz clock
+  Note that in MII mode, MII0_TXER is required by kinetis driver, but not connected on ser board
+
+  Ethernet MAC/KSZ8041NL PHY
+  --------------------------
+  ------------ ---------------------------------------------------------- ------------------------------ -------------------------------
+  KSZ8041      TWR Board Signal(s)                                        K64F Pin                       Pin name
+  Pin Signal                                                              Function                       MII              RMII
+  --- -------- ---------------------------------------------------------- ------------------------------ -------------------------------
+   9  REFCLK   CLK_SEL J2: CLOCKOUT0/25MHz/50MHz, PHY clock input         PTC3/CLKOUT                    ---            direct to PHY
+  11  MDIO     FEC_MDIO                                                   PTB0/RMII0_MDIO/MII0_MDIO      PIN_MII0_MDIO  PIN_RMII0_MDIO
+  12  MDC      FEC_MDC                                                    PTB1/RMII0_MDC/MII0_MDC        PIN_MII0_MDC   PIN_RMII0_MDC
+  13  PHYAD0   FEC_RXD3 J12: PHY Adress select (pull-down if set)         PTA9/MII0_RXD3                 PIN_RMII0_RXD3 ---
+  14  PHYAD1   FEC_RXD2 J12: PHY Adress select (pull-up if set)           PTA10/MII0_RXD2                PIN_RMII0_RXD2 ---
+  15  PHYAD2   FEC_RXD1 J12: PHY Adress select (pull-up if set)           PTA12/RMII0_RXD1/MII0_RXD1     PIN_MII0_RXD1  PIN_RMII0_RXD1
+  16  DUPLEX   FEC_RXD0 J12: Half-duplex (pull-down if set)               PTA13/RMII0_RXD0/MII0_RXD0     PIN_MII0_RXD0  PIN_RMII0_RXD0
+  18  CONFIG2  FEC_RXDV J12: Loopback select (pull-up if set)             PTA14/RMII0_CRS_DV/MII0_RXDV   PIN_MII0_RXDV  PIN_RMII0_CRS_DV
+  19  RXC      FEC_RXCLK                                                  PTA11/MII0_RXCLK               PIN_MII0_RXCLK ---
+  20  ISO      FEC_RXER J12: Isolation mode select (pull-up if set)       PTA5/RMII0_RXER/MII0_RXER      PIN_MII_RXER   PIN_RMII_RXER
+  22  TXC      FEC_TXCLK                                                  PTA25/MII0_TXCLK               PIN_MII0_TXCLK ---
+  23  TXEN     FEC_TXEN                                                   PTA15/RMII0_TXEN/MII0_TXEN     PIN_MII0_TXEN  PIN_RMII0_TXEN
+  24  TXD0     FEC_TXD0                                                   PTA16/RMII0_TXD0/MII0_TXD0     PIN_MII0_TXD0  PIN_RMII0_TXD0
+  25  TXD1     FEC_TXD1                                                   PTA17/RMII0_TXD1/MII0_TXD1     PIN_MII0_TXD1  PIN_RMII0_TXD1
+  26  TXD2     FEC_TXD2                                                   PTA24/MII0_TXD2                PIN_MII0_TXD2  ---
+  27  TXD3     FEC_TXD3                                                   PTA26/MII0_TXD3                PIN_MII0_TXD3  ---
+  28  CONFIG0  FEC_COL J12: RMII select (pull-up if set)                  PTA29/MII0_COL                 PIN_MII0_COL   ---
+  29  CONFIG1  FEC_CRS                                                    PTA27/MII0_CRS                 PIN_MII0_CRS   ---
+  30  LED0     LED0/NWAYEN J12: Disable auto_negotiation (pull-down if s  ---                            ---
+  31  LED1     LED1/SPEED J12: 10Mbps select (pull-down if set)           ---                            ---
+  --- -------- ----------------- ---------------------------------------- ------------------------------ -------------------------------
+
+  Networking support can be added to NSH by selecting the following
+  configuration options.
+
+  Selecting the MAC peripheral
+  ----------------------------
+
+  System Type -> Kinetis Peripheral Support
+    CONFIG_KINETIS_ENET=y               : Enable the Ethernet MAC peripheral
+
+  System Type -> Ethernet Configuration
+    CONFIG_KINETIS_ENETNETHIFS=1
+    CONFIG_KINETIS_ENETNRXBUFFERS=6
+    CONFIG_KINETIS_ENETNTXBUFFERS=2
+    CONFIG_KINETIS_ENET_MDIOPULLUP=y
+
+  Networking Support
+    CONFIG_NET=y                        : Enable Neworking
+    CONFIG_NET_ETHERNET=y               : Support Ethernet data link
+    CONFIG_NET_SOCKOPTS=y               : Enable socket operations
+    CONFIG_NET_ETH_MTU=590              : Maximum packet size (MTU) 1518 is more standard
+    CONFIG_NET_ETH_TCP_RECVWNDO=536     : Should be the same as CONFIG_NET_ETH_MTU
+    CONFIG_NET_ARP=y                    : Enable ARP
+    CONFIG_NET_ARPTAB_SIZE=16           : ARP table size
+    CONFIG_NET_ARP_IPIN=y               : Enable ARP address harvesting
+    CONFIG_NET_ARP_SEND=y               : Send ARP request before sending data
+    CONFIG_NET_TCP=y                    : Enable TCP/IP networking
+    CONFIG_NET_TCP_READAHEAD=y          : Support TCP read-ahead
+    CONFIG_NET_TCP_WRITE_BUFFERS=y      : Support TCP write-buffering
+    CONFIG_NET_TCPBACKLOG=y             : Support TCP/IP backlog
+    CONFIG_NET_MAX_LISTENPORTS=20       :
+    CONFIG_NET_TCP_READAHEAD_BUFSIZE=536  Read-ahead buffer size
+    CONFIG_NET_UDP=y                    : Enable UDP networking
+    CONFIG_NET_BROADCAST=y              : Needed for DNS name resolution
+    CONFIG_NET_ICMP=y                   : Enable ICMP networking
+    CONFIG_NET_ICMP_PING=y              : Needed for NSH ping command
+                                        : Defaults should be okay for other options
+  Application Configuration -> Network Utilities
+    CONFIG_NETDB_DNSCLIENT=y            : Enable host address resolution
+    CONFIG_NETUTILS_TELNETD=y           : Enable the Telnet daemon
+    CONFIG_NETUTILS_TFTPC=y             : Enable TFTP data file transfers for get and put commands
+    CONFIG_NETUTILS_NETLIB=y            : Network library support is needed
+    CONFIG_NETUTILS_WEBCLIENT=y         : Needed for wget support
+                                        : Defaults should be okay for other options
+  Application Configuration -> NSH Library
+    CONFIG_NSH_TELNET=y                 : Enable NSH session via Telnet
+    CONFIG_NSH_IPADDR=0xc0a800e9        : Select a fixed IP address
+    CONFIG_NSH_DRIPADDR=0xc0a800fe      : IP address of gateway/host PC
+    CONFIG_NSH_NETMASK=0xffffff00       : Netmask
+    CONFIG_NSH_NOMAC=y                  : Need to make up a bogus MAC address
+                                        : Defaults should be okay for other options
+
+  You can also enable enable the DHCPC client for networks that use
+  dynamically assigned address:
+
+  Application Configuration -> Network Utilities
+    CONFIG_NETUTILS_DHCPC=y             : Enables the DHCP client
+
+  Networking Support
+    CONFIG_NET_UDP=y                    : Depends on broadcast UDP
+
+  Application Configuration -> NSH Library
+    CONFIG_NET_BROADCAST=y
+    CONFIG_NSH_DHCPC=y                  : Tells NSH to use DHCPC, not
+                                        : the fixed addresses
+
+  Using the network with NSH
+  --------------------------
+
+  So what can you do with this networking support?  First you see that
+  NSH has several new network related commands:
+
+    ifconfig, ifdown, ifup:  Commands to help manage your network
+    get and put:             TFTP file transfers
+    wget:                    HTML file transfers
+    ping:                    Check for access to peers on the network
+    Telnet console:          You can access the NSH remotely via telnet.
+
+  You can also enable other add on features like full FTP or a Web
+  Server or XML RPC and others.  There are also other features that
+  you can enable like DHCP client (or server) or network name
+  resolution.
+
+  By default, the IP address of the DK-TM4C129X will be 192.168.0.233 and
+  it will assume that your host is the gateway and has the IP address
+  192.168.0.254.
+
+    nsh> ifconfig
+    eth0	Link encap:Ethernet HWaddr 16:03:60:0f:00:33 at UP
+	    inet addr:192.168.0.233 DRaddr:192.168.0.254 Mask:255.255.255.
+
+  You can use ping to test for connectivity to the host (Careful,
+  Window firewalls usually block ping-related ICMP traffic).
+
+  On the host PC side, you may be able to ping the TWR-K64F120M:
+
+    $ ping 192.168.0.233
+    PING 192.168.0.233 (192.168.0.233) 56(84) bytes of data.
+    64 bytes from 192.168.0.233: icmp_seq=1 ttl=64 time=7.82 ms
+    64 bytes from 192.168.0.233: icmp_seq=2 ttl=64 time=4.50 ms
+    64 bytes from 192.168.0.233: icmp_seq=3 ttl=64 time=2.04 ms
+    ^C
+    --- 192.168.0.233 ping statistics ---
+    3 packets transmitted, 3 received, 0% packet loss, time 2003ms
+    rtt min/avg/max/mdev = 2.040/4.789/7.822/2.369 ms
+
+
+  From the target side, you may should also be able to ping the host
+  (assuming it's IP is 192.168.0.1):
+  
+    nsh> ping 192.168.0.1
+    PING 192.168.0.1 56 bytes of data
+    56 bytes from 192.168.0.1: icmp_seq=1 time=0 ms
+    56 bytes from 192.168.0.1: icmp_seq=2 time=0 ms
+    56 bytes from 192.168.0.1: icmp_seq=3 time=0 ms
+    56 bytes from 192.168.0.1: icmp_seq=4 time=0 ms
+    56 bytes from 192.168.0.1: icmp_seq=5 time=0 ms
+    56 bytes from 192.168.0.1: icmp_seq=6 time=0 ms
+    56 bytes from 192.168.0.1: icmp_seq=7 time=0 ms
+    56 bytes from 192.168.0.1: icmp_seq=8 time=0 ms
+    56 bytes from 192.168.0.1: icmp_seq=9 time=0 ms
+    56 bytes from 192.168.0.1: icmp_seq=10 time=0 ms
+    10 packets transmitted, 10 received, 0% packet loss, time 10100 ms
+    nsh> 
+
+  You can also log into the NSH from the host PC like this:
+
+    $ telnet 192.168.0.233
+    Trying 192.168.0.233...
+    Connected to 192.168.0.233.
+    Escape character is '^]'.
+
+    NuttShell (NSH)
+    nsh>
+
+  NOTE:  If you enable this networking as described above, you will
+  experience a delay on booting NSH.  That is because the start-up logic
+  waits for the network connection to be established before starting
+  NuttX.  In a real application, you would probably want to do the
+  network bringup on a separate thread so that access to the NSH prompt
+  is not delayed.
+
+  The kinetis_enet.c driver, does not wait too long for PHY to negotiate
+  the link speed. In this case it folds back to 10Mbs half-duplex
+  mode. This behaviour should be improved in order to cope with the
+  plug and play nature of this port.
+
+  Reconfiguring after the network becomes available requires the
+  network monitor feature, also discussed below.
+
+  Network Initialization Thread
+  -----------------------------
+  [not tested on K64F120M]
+  There is a configuration option enabled by CONFIG_NSH_NETINIT_THREAD
+  that will do the NSH network bring-up asynchronously in parallel on
+  a separate thread.  This eliminates the (visible) networking delay
+  altogether.  This current implementation, however, has some limitations:
+
+    - If no network is connected, the network bring-up will fail and
+      the network initialization thread will simply exit.  There are no
+      retries and no mechanism to know if the network initialization was
+      successful (it could perform a network Ioctl to see if the link is
+      up and it now, keep trying, but it does not do that now).
+
+    - Furthermore, there is currently no support for detecting loss of
+      network connection and recovery of the connection (similarly, this
+      thread could poll periodically for network status, but does not).
+
+  Both of these shortcomings could be eliminated by enabling the network
+  monitor:
+
+  Network Monitor
+  ---------------
+  By default the network initialization thread will bring-up the network
+  then exit, freeing all of the resources that it required.  This is a
+  good behavior for systems with limited memory.
+
+  If the CONFIG_NSH_NETINIT_MONITOR option is selected, however, then the
+  network initialization thread will persist forever; it will monitor the
+  network status.  In the event that the network goes down (for example, if
+  a cable is removed), then the thread will monitor the link status and
+  attempt to bring the network back up.  In this case the resources
+  required for network initialization are never released.
+
+  Pre-requisites:
+
+    - CONFIG_NSH_NETINIT_THREAD as described above.
+
+    - The K64F EMAC block does not support PHY interrupts.  The KSZ8081
+      PHY interrupt line is brought to a jumper block and it should be
+      possible to connect that some some interrupt port pin.  You would
+      need to provide some custom logic in the Freedcom K64F
+      configuration to set up that PHY interrupt.
+
+    - In addtion to the PHY interrupt, the Network Monitor also requires the
+      following setting:
+
+        CONFIG_NETDEV_PHY_IOCTL. Enable PHY IOCTL commands in the Ethernet
+        device driver. Special IOCTL commands must be provided by the Ethernet
+        driver to support certain PHY operations that will be needed for link
+        management. There operations are not complex and are implemented for
+        the Atmel SAMA5 family.
+
+        CONFIG_ARCH_PHY_INTERRUPT. This is not a user selectable option.
+        Rather, it is set when you select a board that supports PHY
+        interrupts.  For the K64F, like most other architectures, the PHY
+        interrupt must be provided via some board-specific GPIO.  In any
+        event, the board-specific logic must provide support for the PHY
+        interrupt. To do this, the board logic must do two things: (1) It
+        must provide the function arch_phy_irq() as described and prototyped
+        in the nuttx/include/nuttx/arch.h, and (2) it must select
+        CONFIG_ARCH_PHY_INTERRUPT in the board configuration file to
+        advertise that it supports arch_phy_irq().
+
+        And a few other things: UDP support is required (CONFIG_NET_UDP) and
+        signals must not be disabled (CONFIG_DISABLE_SIGNALS).
+
+  Given those prerequisites, the network monitor can be selected with these
+  additional settings.
+
+    System Type -> Kinetis Ethernet Configuration
+      CONFIG_ARCH_PHY_INTERRUPT=y           : (auto-selected)
+      CONFIG_NETDEV_PHY_IOCTL=y             : (auto-selected)
+
+    Application Configuration -> NSH Library -> Networking Configuration
+      CONFIG_NSH_NETINIT_THREAD             : Enable the network initialization thread
+      CONFIG_NSH_NETINIT_MONITOR=y          : Enable the network monitor
+      CONFIG_NSH_NETINIT_RETRYMSEC=2000     : Configure the network monitor as you like
+      CONFIG_NSH_NETINIT_SIGNO=18
+
+
+LEDs
+====
+
+The TWR-K64F120M board has four LEDs labeled D5, D6, D7, D9 on the board.  Usage of
+these LEDs is defined in include/board.h and src/up_leds.c.  They are encoded
+as follows:
+
+    SYMBOL                Meaning                  LED1*    LED2    LED3    LED4
+    -------------------   -----------------------  -------  ------- ------- ------
+    LED_STARTED           NuttX has been started   OFF      OFF     OFF     N/A
+    LED_HEAPALLOCATE      Heap has been allocated  OFF      OFF     OFF     N/A
+    LED_IRQSENABLED       Interrupts enabled       OFF      OFF     OFF     N/A
+    LED_STACKCREATED      Idle stack created       ON       OFF     OFF     N/A
+    LED_INIRQ             In an interrupt**        N/C      ON      N/C     N/A
+    LED_SIGNAL            In a signal handler***   N/C      N/C     ON      N/A
+    LED_ASSERTION         An assertion failed      ON       ON      ON      N/A
+    LED_PANIC             The system has crashed   Blink    N/C     N/C    N/A
+    LED_IDLE              K64 is is sleep mode   (Optional, not used)
+
+  * If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot
+    and these LEDs will give you some indication of where the failure was
+ ** The normal state is LED1 ON and LED2 faintly glowing.  This faint glow
+    is because of timer interrupts and signal that result in the LED being 
+    illuminated on a small proportion of the time.
+*** LED3 may even glow faintlier then LED2 while signals are processed.
+
+Development Environment
+=======================
+
+  Either Linux or Cygwin on Windows can be used for the development environment.
+  The source has been built only using the GNU toolchain (see below).  Other
+  toolchains will likely cause problems. Testing was performed using the Linux
+  environment.
+
+GNU Toolchain Options
+=====================
+
+  The NuttX make system has been modified to support the following different
+  toolchain options.
+
+  1. The CodeSourcery GNU toolchain,
+  2. The devkitARM GNU toolchain,
+  3. The NuttX buildroot Toolchain (see below).
+
+  All testing has been conducted using the CodeSourcery Windows toolchain.  To
+  use the devkitARM or the NuttX GNU toolchain, you simply need to change the
+  the following configuration options to your .config (or defconfig) file:
+
+    CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y  : CodeSourcery under Windows
+    CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y  : CodeSourcery under Linux
+    CONFIG_ARMV7M_TOOLCHAIN_IARL=y           : IAR
+    CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y      : devkitARM under Windows
+    CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y      : NuttX buildroot under Linux or Cygwin
+    CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y      : GCC (default)
+
+  If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also have to modify
+  the PATH in the setenv.h file if your make cannot find the tools.
+
+  NOTE: the CodeSourcery (for Windows) and devkitARM toolchains are
+  Windows native toolchains.  The CodeSourcey (for Linux) and NuttX buildroot
+  toolchains are Cygwin and/or Linux native toolchains. There are several limitations
+  to using a Windows based toolchain in a Cygwin environment.  The three biggest are:
+
+  1. The Windows toolchain cannot follow Cygwin paths.  Path conversions are
+     performed automatically in the Cygwin makefiles using the 'cygpath' utility
+     but you might easily find some new path problems.  If so, check out 'cygpath -w'
+
+  2. Windows toolchains cannot follow Cygwin symbolic links.  Many symbolic links
+     are used in Nuttx (e.g., include/arch).  The make system works around these
+     problems for the Windows tools by copying directories instead of linking them.
+     But this can also cause some confusion for you:  For example, you may edit
+     a file in a "linked" directory and find that your changes had no effect.
+     That is because you are building the copy of the file in the "fake" symbolic
+     directory.  If you use a Windows toolchain, you should get in the habit of
+     making like this:
+
+       make clean_context all
+
+     An alias in your .bashrc file might make that less painful.
+
+  NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization
+  level of -Os (See Make.defs).  It will work with -O0, -O1, or -O2, but not with
+  -Os.
+
+  NOTE 2: The devkitARM toolchain includes a version of MSYS make.  Make sure that
+  the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM
+  path or will get the wrong version of make.
+
+IDEs
+====
+
+  NuttX is built using command-line make.  It can be used with an IDE, but some
+  effort will be required to create the project.
+
+  Makefile Build
+  --------------
+  Under Eclipse, it is pretty easy to set up an "empty makefile project" and
+  simply use the NuttX makefile to build the system.  That is almost for free
+  under Linux.  Under Windows, you will need to set up the "Cygwin GCC" empty
+  makefile project in order to work with Windows (Google for "Eclipse Cygwin" -
+  there is a lot of help on the internet).
+
+  Native Build
+  ------------
+  Here are a few tips before you start that effort:
+
+  1) Select the toolchain that you will be using in your .config file
+  2) Start the NuttX build at least one time from the Cygwin command line
+     before trying to create your project.  This is necessary to create
+     certain auto-generated files and directories that will be needed.
+  3) Set up include pathes:  You will need include/, arch/arm/src/k40,
+     arch/arm/src/common, arch/arm/src/armv7-m, and sched/.
+  4) All assembly files need to have the definition option -D __ASSEMBLY__
+     on the command line.
+
+  Startup files will probably cause you some headaches.  The NuttX startup file
+  is arch/arm/src/kinetis/k40_vectors.S.
+
+NuttX EABI "buildroot" Toolchain
+================================
+
+  A GNU GCC-based toolchain is assumed.  The files */setenv.sh should
+  be modified to point to the correct path to the Cortex-M4 GCC toolchain (if
+  different from the default in your PATH variable).
+
+  If you have no Cortex-M4 toolchain, one can be downloaded from the NuttX
+  Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/).
+  This GNU toolchain builds and executes in the Linux or Cygwin environment.
+
+  NOTE:  The NuttX toolchain may not include optimizations for Cortex-M4 (ARMv7E-M).
+
+  1. You must have already configured Nuttx in /nuttx.
+
+     cd tools
+     ./configure.sh twr-k64f120m/
+
+  2. Download the latest buildroot package into 
+
+  3. unpack the buildroot tarball.  The resulting directory may
+     have versioning information on it like buildroot-x.y.z.  If so,
+     rename /buildroot-x.y.z to /buildroot.
+
+  4. cd /buildroot
+
+  5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config
+
+  6. make oldconfig
+
+  7. make
+
+  8. Edit setenv.h, if necessary, so that the PATH variable includes
+     the path to the newly built binaries.
+
+  See the file configs/README.txt in the buildroot source tree.  That has more
+  details PLUS some special instructions that you will need to follow if you are
+  building a Cortex-M4 toolchain for Cygwin under Windows.
+
+  NOTE:  Unfortunately, the 4.6.3 EABI toolchain is not compatible with the
+  the NXFLAT tools.  See the top-level TODO file (under "Binary loaders") for
+  more information about this problem. If you plan to use NXFLAT, please do not
+  use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain.
+  See instructions below.
+
+NuttX OABI "buildroot" Toolchain
+================================
+
+  The older, OABI buildroot toolchain is also available.  To use the OABI
+  toolchain:
+
+  1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3
+     configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI
+     configuration such as cortexm3-defconfig-4.3.3
+
+  2. Modify the Make.defs file to use the OABI conventions:
+
+    +CROSSDEV = arm-nuttx-elf-
+    +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft
+    +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
+    -CROSSDEV = arm-nuttx-eabi-
+    -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
+    -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+
+NXFLAT Toolchain
+================
+
+  If you are *not* using the NuttX buildroot toolchain and you want to use
+  the NXFLAT tools, then you will still have to build a portion of the buildroot
+  tools -- just the NXFLAT tools.  The buildroot with the NXFLAT tools can
+  be downloaded from the NuttX Bitbucket download site
+  (https://bitbucket.org/nuttx/nuttx/downloads/).
+
+  This GNU toolchain builds and executes in the Linux or Cygwin environment.
+
+  1. You must have already configured Nuttx in /nuttx.
+
+     cd tools
+     ./configure.sh lpcxpresso-lpc1768/
+
+  2. Download the latest buildroot package into 
+
+  3. unpack the buildroot tarball.  The resulting directory may
+     have versioning information on it like buildroot-x.y.z.  If so,
+     rename /buildroot-x.y.z to /buildroot.
+
+  4. cd /buildroot
+
+  5. cp configs/cortexm3-defconfig-nxflat .config
+
+  6. make oldconfig
+
+  7. make
+
+  8. Edit setenv.h, if necessary, so that the PATH variable includes
+     the path to the newly builtNXFLAT binaries.
+
+TWR-K64F120M-specific Configuration Options
+==========================================
+
+    CONFIG_ARCH - Identifies the arch/ subdirectory.  This sould
+       be set to:
+
+       CONFIG_ARCH=arm
+
+    CONFIG_ARCH_family - For use in C code:
+
+       CONFIG_ARCH_ARM=y
+
+    CONFIG_ARCH_architecture - For use in C code:
+
+       CONFIG_ARCH_CORTEXM4=y
+
+    CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
+
+       CONFIG_ARCH_CHIP=kinetis
+
+    CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
+       chip:
+
+       CONFIG_ARCH_CHIP_MK64FN1M0VMD12=y
+
+    CONFIG_ARCH_BOARD - Identifies the configs subdirectory and
+       hence, the board that supports the particular chip or SoC.
+
+       CONFIG_ARCH_BOARD=twr-k64f120m (for the TWR-K64F120M development board)
+
+    CONFIG_ARCH_BOARD_name - For use in C code
+
+       CONFIG_ARCH_BOARD_TWR_K64F120M=y
+
+    CONFIG_ENDIAN_BIG - define if big endian (default is little
+       endian)
+
+    CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
+
+       CONFIG_RAM_SIZE=262144 (256Kb)
+
+    CONFIG_RAM_START - The start address of installed DRAM
+
+       CONFIG_RAM_START=0x1fff0000
+
+    CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
+       have LEDs
+
+       CONFIG_ARCH_LEDS=y
+
+    CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
+       stack. If defined, this symbol is the size of the interrupt
+        stack in bytes.  If not defined, the user task stacks will be
+      used during interrupt handling.
+
+    CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
+
+    CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that
+       cause a 100 second delay during boot-up.  This 100 second delay
+       serves no purpose other than it allows you to calibratre
+       CONFIG_ARCH_LOOPSPERMSEC.  You simply use a stop watch to measure
+       the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until
+       the delay actually is 100 seconds.
+
+  Individual subsystems can be enabled:
+
+    CONFIG_KINETIS_TRACE    -- Enable trace clocking on power up.
+    CONFIG_KINETIS_FLEXBUS  -- Enable flexbus clocking on power up.
+    CONFIG_KINETIS_UART0    -- Support UART0
+    CONFIG_KINETIS_UART1    -- Support UART1
+    CONFIG_KINETIS_UART2    -- Support UART2
+    CONFIG_KINETIS_UART3    -- Support UART3
+    CONFIG_KINETIS_UART4    -- Support UART4
+    CONFIG_KINETIS_UART5    -- Support UART5
+    CONFIG_KINETIS_ENET     -- Support Ethernet (K60 only)
+    CONFIG_KINETIS_RNGB     -- Support the random number generator(K60 only)
+    CONFIG_KINETIS_FLEXCAN0 -- Support FlexCAN0
+    CONFIG_KINETIS_FLEXCAN1 -- Support FlexCAN1
+    CONFIG_KINETIS_SPI0     -- Support SPI0
+    CONFIG_KINETIS_SPI1     -- Support SPI1
+    CONFIG_KINETIS_SPI2     -- Support SPI2
+    CONFIG_KINETIS_I2C0     -- Support I2C0
+    CONFIG_KINETIS_I2C1     -- Support I2C1
+    CONFIG_KINETIS_I2S      -- Support I2S
+    CONFIG_KINETIS_DAC0     -- Support DAC0
+    CONFIG_KINETIS_DAC1     -- Support DAC1
+    CONFIG_KINETIS_ADC0     -- Support ADC0
+    CONFIG_KINETIS_ADC1     -- Support ADC1
+    CONFIG_KINETIS_CMP      -- Support CMP
+    CONFIG_KINETIS_VREF     -- Support VREF
+    CONFIG_KINETIS_SDHC     -- Support SD host controller
+    CONFIG_KINETIS_FTM0     -- Support FlexTimer 0
+    CONFIG_KINETIS_FTM1     -- Support FlexTimer 1
+    CONFIG_KINETIS_FTM2     -- Support FlexTimer 2
+    CONFIG_KINETIS_LPTIMER  -- Support the low power timer
+    CONFIG_KINETIS_RTC      -- Support RTC
+    CONFIG_KINETIS_SLCD     -- Support the segment LCD (K60 only)
+    CONFIG_KINETIS_EWM      -- Support the external watchdog
+    CONFIG_KINETIS_CMT      -- Support Carrier Modulator Transmitter
+    CONFIG_KINETIS_USBOTG   -- Support USB OTG (see also CONFIG_USBHOST and CONFIG_USBDEV)
+    CONFIG_KINETIS_USBDCD   -- Support the USB Device Charger Detection module
+    CONFIG_KINETIS_LLWU     -- Support the Low Leakage Wake-Up Unit
+    CONFIG_KINETIS_TSI      -- Support the touch screeen interface
+    CONFIG_KINETIS_FTFL     -- Support FLASH
+    CONFIG_KINETIS_DMA      -- Support DMA
+    CONFIG_KINETIS_CRC      -- Support CRC
+    CONFIG_KINETIS_PDB      -- Support the Programmable Delay Block
+    CONFIG_KINETIS_PIT      -- Support Programmable Interval Timers
+    CONFIG_ARM_MPU          -- Support the MPU
+
+  Kinetis interrupt priorities (Default is the mid priority).  These should
+  not be set because they can cause unhandled, nested interrupts.  All
+  interrupts need to be at the default priority in the current design.
+
+    CONFIG_KINETIS_UART0PRIO
+    CONFIG_KINETIS_UART1PRIO
+    CONFIG_KINETIS_UART2PRIO
+    CONFIG_KINETIS_UART3PRIO
+    CONFIG_KINETIS_UART4PRIO
+    CONFIG_KINETIS_UART5PRIO
+
+    CONFIG_KINETIS_EMACTMR_PRIO
+    CONFIG_KINETIS_EMACTX_PRIO
+    CONFIG_KINETIS_EMACRX_PRIO
+    CONFIG_KINETIS_EMACMISC_PRIO
+
+    CONFIG_KINETIS_SDHC_PRIO
+
+  PIN Interrupt Support
+
+    CONFIG_KINETIS_GPIOIRQ   -- Enable pin interrupt support.  Also needs
+      one or more of the following:
+    CONFIG_KINETIS_PORTAINTS -- Support 32 Port A interrupts
+    CONFIG_KINETIS_PORTBINTS -- Support 32 Port B interrupts
+    CONFIG_KINETIS_PORTCINTS -- Support 32 Port C interrupts
+    CONFIG_KINETIS_PORTDINTS -- Support 32 Port D interrupts
+    CONFIG_KINETIS_PORTEINTS -- Support 32 Port E interrupts
+
+  Kinetis specific device driver settings
+
+    CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn (n=0..5) for the
+      console and ttys0 (default is the UART0).
+    CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received.
+       This specific the size of the receive buffer
+    CONFIG_UARTn_TXBUFSIZE - Characters are buffered before
+       being sent.  This specific the size of the transmit buffer
+    CONFIG_UARTn_BAUD - The configure BAUD of the UART.
+    CONFIG_UARTn_BITS - The number of bits.  Must be either 8 or 8.
+    CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
+
+  Kenetis ethernet controller settings
+
+    CONFIG_ENET_NRXBUFFERS - Number of RX buffers.  The size of one
+        buffer is determined by CONFIG_NET_ETH_MTU.  Default: 6
+    CONFIG_ENET_NTXBUFFERS - Number of TX buffers.  The size of one
+        buffer is determined by CONFIG_NET_ETH_MTU.  Default: 2
+    CONFIG_ENET_USEMII - Use MII mode.  Default: RMII mode.
+    CONFIG_ENET_PHYADDR - PHY address
+
+Configurations
+==============
+
+Each TWR-K64F120M configuration is maintained in a sub-directory and
+can be selected as follow:
+
+    cd tools
+    ./configure.sh twr-k64f120m/
+    cd ..
+    . ./setenv.sh
+
+Where  is one of the following:
+
+  nsh:
+  ---
+    Configures the NuttShell (nsh) located at apps/examples/nsh.  The
+    Configuration enables only the serial interface.
+    The serial console is on OpenSDA serial bridge. For access,
+    use $ miniterm.py -f direct /dev/ttyACM0 115200 from Linux PC
+    Support for the board's SDHC MicroSD card is included.
+
+    NOTES:
+
+    1. The SDHC driver is under work and currently support IRQ mode (no DMA):
+
+      CONFIG_KINETIS_SDHC=y                : Enable the SDHC driver
+
+      CONFIG_MMCSD=y                       : Enable MMC/SD support
+      CONFIG_MMCSD_SDIO=y                  : Use the SDIO-based MMC/SD driver
+      CONFIG_MMCSD_NSLOTS=1                : One MMC/SD slot
+
+      CONFIG_FAT=y                         : Eable FAT file system
+      CONFIG_FAT_LCNAMES=n                 : FAT lower case name support
+      CONFIG_FAT_LFN=y                     : FAT long file name support
+      CONFIG_FAT_MAXFNAME=32               : Maximum length of a long file name
+
+      CONFIG_KINETIS_GPIOIRQ=y             : Enable GPIO interrupts
+      CONFIG_KINETIS_PORTEINTS=y           : Enable PortE GPIO interrupts
+
+      CONFIG_SCHED_WORKQUEUE=y             : Enable the NuttX workqueue
+
+      CONFIG_NSH_ARCHINIT=y                : Provide NSH initializeation logic
+    
+  netnsh:
+  ------
+    This is the same config then nsh, but it adds Ethernet support with the
+    TWR-SER card. It includes telnetd in order to access nsh from Ethernet.
+    IP address defaults to 192.168.0.233/24.
+ 
+    NOTES:
+
+    1. See networking support for application and especially for jumper setting.
+       In this config, this is TWR-SER that clocks the MCU.
+    
+    2. The PHY link negotiation is done at boot time only. If no link is then
+       available, a fallback mode is used at 10Mbs/half-duplex. Please make sure
+       your ethernet cable and switches are on before booting.
+
diff --git a/configs/twr-k64f120m/include/board.h b/configs/twr-k64f120m/include/board.h
new file mode 100644
index 0000000000000000000000000000000000000000..638bdd57121ec02b8c4d3157e7d6495cf824dfdc
--- /dev/null
+++ b/configs/twr-k64f120m/include/board.h
@@ -0,0 +1,197 @@
+/************************************************************************************
+ * configs/twr-k64f120m/include/board.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __CONFIGS_TWR_K64F120M_INCLUDE_BOARCH_H
+#define __CONFIGS_TWR_K64F120M_INCLUDE_BOARCH_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#ifndef __ASSEMBLY__
+# include 
+#endif
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Clocking *************************************************************************/
+/* The K64 tower board uses a 50MHz external clock */
+
+#define BOARD_EXTCLOCK       1              /* External clock */
+#define BOARD_EXTAL_FREQ     50000000       /* 50MHz Oscillator */
+#define BOARD_XTAL32_FREQ    32768          /* 32KHz RTC Oscillator */
+
+/* PLL Configuration.  Either the external clock or crystal frequency is used to
+ * select the PRDIV value. Only reference clock frequencies are supported that will
+ * produce a range 2MHz-4MHz reference clock to the PLL.
+ *
+ *   PLL Input frequency:   PLLIN  = REFCLK/PRDIV = 50MHz/20 = 2.5 MHz
+ *   PLL Output frequency:  PLLOUT = PLLIN*VDIV   = 2.5Mhz*48 = 120MHz
+ *   MCG Frequency:         PLLOUT = 120 Mhz
+ */
+
+#define BOARD_PRDIV          20             /* PLL External Reference Divider */
+#define BOARD_VDIV           48             /* PLL VCO Divider (frequency multiplier) */
+
+#define BOARD_PLLIN_FREQ     (BOARD_EXTAL_FREQ / BOARD_PRDIV)
+#define BOARD_PLLOUT_FREQ    (BOARD_PLLIN_FREQ * BOARD_VDIV)
+#define BOARD_MCG_FREQ       BOARD_PLLOUT_FREQ
+
+/* Define additional MCG_C2 Setting */
+
+#define BOARD_MCG_C2_FCFTRIM 0              /* Do not enable FCFTRIM */
+#define BOARD_MCG_C2_LOCRE0  MCG_C2_LOCRE0  /* Enable reset on loss of clock */
+
+/* SIM CLKDIV1 dividers */
+
+#define BOARD_OUTDIV1        1              /* Core        = MCG, 120MHz */
+#define BOARD_OUTDIV2        2              /* Bus         = MCG/2, 60MHz */
+#define BOARD_OUTDIV3        2              /* FlexBus     = MCG/2, 60MHz */
+#define BOARD_OUTDIV4        5              /* Flash clock = MCG/5, 24MHz */
+
+#define BOARD_CORECLK_FREQ  (BOARD_MCG_FREQ / BOARD_OUTDIV1)
+#define BOARD_BUS_FREQ      (BOARD_MCG_FREQ / BOARD_OUTDIV2)
+#define BOARD_FLEXBUS_FREQ  (BOARD_MCG_FREQ / BOARD_OUTDIV3)
+#define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4)
+
+/* SDHC clocking ********************************************************************/
+
+/* SDCLK configurations corresponding to various modes of operation.   Formula is:
+ *
+ *   SDCLK  frequency = (base clock) / (prescaler * divisor)
+ *
+ * The SDHC module is always configure configured so that the core clock is the base
+ * clock.
+ */
+
+/* Identification mode:  375KHz = 120MHz / ( 64 * 5) <= 400 KHz */
+
+#define BOARD_SDHC_IDMODE_PRESCALER    SDHC_SYSCTL_SDCLKFS_DIV64
+#define BOARD_SDHC_IDMODE_DIVISOR      SDHC_SYSCTL_DVS_DIV(5)
+
+/* MMC normal mode: 15MHz  = 120MHz / (8 * 1) <= 16 MHz*/
+
+#define BOARD_SDHC_MMCMODE_PRESCALER   SDHC_SYSCTL_SDCLKFS_DIV8
+#define BOARD_SDHC_MMCMODE_DIVISOR     SDHC_SYSCTL_DVS_DIV(1)
+
+/* SD normal mode (1-bit): 15MHz  = 120MHz / (8 * 1) <= 16 MHz*/
+
+#define BOARD_SDHC_SD1MODE_PRESCALER   SDHC_SYSCTL_SDCLKFS_DIV8
+#define BOARD_SDHC_SD1MODE_DIVISOR     SDHC_SYSCTL_DVS_DIV(1)
+
+/* SD normal mode (4-bit): 20MHz  = 120MHz / (2 * 3) (with DMA) <= 24MHz
+ * SD normal mode (4-bit): 15MHz  = 120MHz / (8 * 1) (no DMA) <= 16MHz
+ */
+
+#ifdef CONFIG_SDIO_DMA
+#  define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
+#  define BOARD_SDHC_SD4MODE_DIVISOR   SDHC_SYSCTL_DVS_DIV(3)
+#else
+#  define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV8
+#  define BOARD_SDHC_SD4MODE_DIVISOR   SDHC_SYSCTL_DVS_DIV(1)
+#endif
+
+
+/* LED definitions ******************************************************************/
+/* The TWR-K64F120M has four LEDs:
+ *
+ * 1. D5 / Green LED    PTE6 
+ * 2. D6 / Yellow LED   PTE7 
+ * 3. D7 / Orange LED   PTE8 
+ * 4  D9 / Blue LED     PTE9 
+ *
+ * LED4 is reservered for user.
+ * The 3 first LEDs are encoded as follows:
+ */
+
+#define LED_STARTED       0  /* N/A */
+#define LED_HEAPALLOCATE  1  /* N/A */
+#define LED_IRQSENABLED   2  /* N/A */
+#define LED_STACKCREATED  3  /* LED1 - OS is started */
+#define LED_INIRQ         4  /* LED2 */
+#define LED_SIGNAL        5  /* LED3 */
+#define LED_ASSERTION     6  /* LED1 + LED2 + LED3 */
+#define LED_PANIC         7  /* LED1 (blink) */
+
+
+/* Open SDA serial link */
+#define PIN_UART1_RX  PIN_UART1_RX_1
+#define PIN_UART1_TX  PIN_UART1_TX_1
+
+
+/* Ethernet */
+#ifdef CONFIG_KINETIS_ENET
+#  define CONFIG_KINETIS_NENET 1
+#endif
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+/************************************************************************************
+ * Name: kinetis_boardinitialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.  This entry point
+ *   is called early in the intitialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void kinetis_boardinitialize(void);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif  /* __CONFIGS_TWR_K64F120M_INCLUDE_BOARCH_H */
diff --git a/configs/twr-k64f120m/netnsh/Make.defs b/configs/twr-k64f120m/netnsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..4ed1515b60a84b004910cfdbc5f38a9ec98e21fd
--- /dev/null
+++ b/configs/twr-k64f120m/netnsh/Make.defs
@@ -0,0 +1,111 @@
+############################################################################
+# configs/twr-k64f120m/netnsh/Make.defs
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/twr-k64f120m/netnsh/defconfig b/configs/twr-k64f120m/netnsh/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..d0b964f8ef22fe6600f9aeb1940152f229c719e2
--- /dev/null
+++ b/configs/twr-k64f120m/netnsh/defconfig
@@ -0,0 +1,1263 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+# CONFIG_RAW_BINARY is not set
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+CONFIG_ARCH_CHIP_KINETIS=y
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+# CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="kinetis"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+
+#
+# Kinetis Configuration Options
+#
+# CONFIG_ARCH_CHIP_MK20DN32VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX32VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DN64VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX64VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DN128VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX128VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX64VLH7 is not set
+# CONFIG_ARCH_CHIP_MK20DX128VLH7 is not set
+# CONFIG_ARCH_CHIP_MK20DX256VLH7 is not set
+# CONFIG_ARCH_CHIP_MK40N512VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK40N512VMD100 is not set
+# CONFIG_ARCH_CHIP_MK40X128VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK40X128VMD100 is not set
+# CONFIG_ARCH_CHIP_MK40X256VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK40X256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60N256VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK60N256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VLL100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60X256VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK60X256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60FN1M0VLQ12 is not set
+# CONFIG_ARCH_CHIP_MK64FN1M0VLL12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VLL12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VDC12 is not set
+# CONFIG_ARCH_CHIP_MK64FN1M0VDC12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VLQ12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VMD12 is not set
+CONFIG_ARCH_CHIP_MK64FN1M0VMD12=y
+# CONFIG_ARCH_CHIP_MK66FX1M0VMD18 is not set
+# CONFIG_ARCH_CHIP_MK66FN2M0VMD18 is not set
+# CONFIG_ARCH_CHIP_MK66FX1M0VLQ18 is not set
+# CONFIG_ARCH_CHIP_MK66FN2M0VLQ18 is not set
+# CONFIG_ARCH_FAMILY_K20 is not set
+# CONFIG_ARCH_FAMILY_K40 is not set
+# CONFIG_ARCH_FAMILY_K60 is not set
+CONFIG_ARCH_FAMILY_K64=y
+# CONFIG_ARCH_FAMILY_K66 is not set
+
+#
+# Kinetis Peripheral Support
+#
+CONFIG_KINETIS_HAVE_I2C1=y
+CONFIG_KINETIS_HAVE_I2C2=y
+# CONFIG_KINETIS_HAVE_I2C3 is not set
+CONFIG_KINETIS_HAVE_SPI1=y
+CONFIG_KINETIS_HAVE_SPI2=y
+# CONFIG_KINETIS_TRACE is not set
+# CONFIG_KINETIS_FLEXBUS is not set
+# CONFIG_KINETIS_UART0 is not set
+CONFIG_KINETIS_UART1=y
+# CONFIG_KINETIS_UART2 is not set
+# CONFIG_KINETIS_UART3 is not set
+# CONFIG_KINETIS_UART4 is not set
+# CONFIG_KINETIS_UART5 is not set
+CONFIG_KINETIS_ENET=y
+# CONFIG_KINETIS_RNGB is not set
+# CONFIG_KINETIS_FLEXCAN0 is not set
+# CONFIG_KINETIS_FLEXCAN1 is not set
+# CONFIG_KINETIS_SPI0 is not set
+# CONFIG_KINETIS_SPI1 is not set
+# CONFIG_KINETIS_SPI2 is not set
+# CONFIG_KINETIS_I2C0 is not set
+# CONFIG_KINETIS_I2C1 is not set
+# CONFIG_KINETIS_I2C2 is not set
+# CONFIG_KINETIS_I2S is not set
+# CONFIG_KINETIS_DAC0 is not set
+# CONFIG_KINETIS_DAC1 is not set
+# CONFIG_KINETIS_ADC0 is not set
+# CONFIG_KINETIS_ADC1 is not set
+# CONFIG_KINETIS_CMP is not set
+# CONFIG_KINETIS_VREF is not set
+CONFIG_KINETIS_SDHC=y
+# CONFIG_KINETIS_FTM0 is not set
+# CONFIG_KINETIS_FTM1 is not set
+# CONFIG_KINETIS_FTM2 is not set
+# CONFIG_KINETIS_FTM3 is not set
+# CONFIG_KINETIS_LPTIMER is not set
+# CONFIG_KINETIS_RTC is not set
+# CONFIG_KINETIS_EWM is not set
+# CONFIG_KINETIS_CMT is not set
+# CONFIG_KINETIS_USBOTG is not set
+# CONFIG_KINETIS_USBDCD is not set
+# CONFIG_KINETIS_LLWU is not set
+# CONFIG_KINETIS_TSI is not set
+# CONFIG_KINETIS_FTFL is not set
+# CONFIG_KINETIS_DMA is not set
+# CONFIG_KINETIS_CRC is not set
+# CONFIG_KINETIS_PDB is not set
+# CONFIG_KINETIS_PIT is not set
+
+#
+# Kinetis GPIO Interrupt Configuration
+#
+CONFIG_KINETIS_GPIOIRQ=y
+# CONFIG_KINETIS_PORTAINTS is not set
+CONFIG_KINETIS_PORTBINTS=y
+# CONFIG_KINETIS_PORTCINTS is not set
+# CONFIG_KINETIS_PORTDINTS is not set
+# CONFIG_KINETIS_PORTEINTS is not set
+
+#
+# Kinetis Ethernet Configuration
+#
+# CONFIG_KINETIS_ENETENHANCEDBD is not set
+CONFIG_KINETIS_ENETNETHIFS=1
+CONFIG_KINETIS_ENETNRXBUFFERS=6
+CONFIG_KINETIS_ENETNTXBUFFERS=2
+# CONFIG_KINETIS_ENETUSEMII is not set
+# CONFIG_KINETIS_ENET_MDIOPULLUP is not set
+# CONFIG_KINETIS_ENET_NORXER is not set
+CONFIG_KINETIS_EMAC_RMIICLKEXTAL=y
+# CONFIG_KINETIS_EMAC_RMIICLK1588CLKIN is not set
+CONFIG_KINETIS_EMAC_HPWORK=y
+
+#
+# Kinetis SDHC Configuration
+#
+# CONFIG_KINETIS_SDHC_DMA is not set
+# CONFIG_KINETIS_SDHC_WIDTH_D1_ONLY is not set
+# CONFIG_KINETIS_SDHC_ABSFREQ is not set
+
+#
+# Kinetis UART Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+CONFIG_ARCH_HAVE_RAMFUNCS=y
+CONFIG_ARCH_RAMFUNCS=y
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=9535
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x1fff0000
+CONFIG_RAM_SIZE=262144
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_TWR_K64F120M=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="twr-k64f120m"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+# CONFIG_ARCH_BUTTONS is not set
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT=y
+CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_FSTYPE="vfat"
+CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_BLKDEV="/dev/mmcsd0"
+CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_MOUNTPOINT="/mnt/sdcard"
+CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_DDELAY=1000
+CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_UDELAY=2000
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2017
+CONFIG_START_MONTH=1
+CONFIG_START_DAY=23
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_SPINLOCK is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=10
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+CONFIG_DISABLE_POLL=y
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+# CONFIG_ARCH_HAVE_I2CRESET is not set
+# CONFIG_I2C is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
+# CONFIG_SPI is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+CONFIG_MMCSD=y
+CONFIG_MMCSD_NSLOTS=1
+# CONFIG_MMCSD_READONLY is not set
+# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set
+CONFIG_MMCSD_MMCSUPPORT=y
+CONFIG_MMCSD_HAVECARDDETECT=y
+CONFIG_ARCH_HAVE_SDIO=y
+# CONFIG_SDIO_DMA is not set
+# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+CONFIG_MMCSD_SDIO=y
+# CONFIG_SDIO_PREFLIGHT is not set
+# CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
+# CONFIG_SDIO_BLOCKSETUP is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+CONFIG_NETDEVICES=y
+
+#
+# General Ethernet MAC Driver Options
+#
+# CONFIG_NETDEV_LOOPBACK is not set
+CONFIG_NETDEV_TELNET=y
+CONFIG_TELNET_RXBUFFER_SIZE=256
+CONFIG_TELNET_TXBUFFER_SIZE=256
+# CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
+# CONFIG_NETDEV_LATEINIT is not set
+
+#
+# External Ethernet MAC Device Support
+#
+# CONFIG_NET_DM90x0 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ENCX24J600 is not set
+# CONFIG_NET_SLIP is not set
+# CONFIG_NET_FTMAC100 is not set
+
+#
+# External Ethernet PHY Device Support
+#
+# CONFIG_ARCH_PHY_INTERRUPT is not set
+# CONFIG_ETH0_PHY_NONE is not set
+# CONFIG_ETH0_PHY_AM79C874 is not set
+# CONFIG_ETH0_PHY_KS8721 is not set
+CONFIG_ETH0_PHY_KSZ8041=y
+# CONFIG_ETH0_PHY_KSZ8051 is not set
+# CONFIG_ETH0_PHY_KSZ8061 is not set
+# CONFIG_ETH0_PHY_KSZ8081 is not set
+# CONFIG_ETH0_PHY_KSZ90x1 is not set
+# CONFIG_ETH0_PHY_DP83848C is not set
+# CONFIG_ETH0_PHY_LAN8720 is not set
+# CONFIG_ETH0_PHY_LAN8740 is not set
+# CONFIG_ETH0_PHY_LAN8740A is not set
+# CONFIG_ETH0_PHY_LAN8742A is not set
+# CONFIG_ETH0_PHY_DM9161 is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+CONFIG_UART1_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# UART1 Configuration
+#
+CONFIG_UART1_RXBUFSIZE=256
+CONFIG_UART1_TXBUFSIZE=256
+CONFIG_UART1_BAUD=115200
+CONFIG_UART1_BITS=8
+CONFIG_UART1_PARITY=0
+CONFIG_UART1_2STOP=0
+# CONFIG_UART1_IFLOWCONTROL is not set
+# CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+CONFIG_ARCH_HAVE_NET=y
+CONFIG_ARCH_HAVE_PHY=y
+CONFIG_NET=y
+# CONFIG_NET_PROMISCUOUS is not set
+
+#
+# Driver buffer configuration
+#
+CONFIG_NET_ETH_MTU=590
+CONFIG_NET_ETH_TCP_RECVWNDO=536
+CONFIG_NET_GUARDSIZE=2
+
+#
+# Data link support
+#
+# CONFIG_NET_MULTILINK is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
+# CONFIG_NET_TUN is not set
+
+#
+# Network Device Operations
+#
+# CONFIG_NETDEV_PHY_IOCTL is not set
+
+#
+# Internet Protocol Selection
+#
+CONFIG_NET_IPv4=y
+# CONFIG_NET_IPv6 is not set
+
+#
+# Socket Support
+#
+CONFIG_NSOCKET_DESCRIPTORS=8
+CONFIG_NET_NACTIVESOCKETS=16
+# CONFIG_NET_SOCKOPTS is not set
+
+#
+# Raw Socket Support
+#
+# CONFIG_NET_PKT is not set
+
+#
+# Unix Domain Socket Support
+#
+# CONFIG_NET_LOCAL is not set
+
+#
+# TCP/IP Networking
+#
+CONFIG_NET_TCP=y
+# CONFIG_NET_TCPURGDATA is not set
+CONFIG_NET_TCP_CONNS=8
+CONFIG_NET_MAX_LISTENPORTS=20
+CONFIG_NET_TCP_READAHEAD=y
+CONFIG_NET_TCP_WRITE_BUFFERS=y
+CONFIG_NET_TCP_NWRBCHAINS=8
+CONFIG_NET_TCP_RECVDELAY=0
+# CONFIG_NET_TCPBACKLOG is not set
+# CONFIG_NET_SENDFILE is not set
+
+#
+# UDP Networking
+#
+CONFIG_NET_UDP=y
+# CONFIG_NET_UDP_CHECKSUMS is not set
+CONFIG_NET_UDP_CONNS=8
+CONFIG_NET_BROADCAST=y
+# CONFIG_NET_RXAVAIL is not set
+CONFIG_NET_UDP_READAHEAD=y
+
+#
+# ICMP Networking Support
+#
+CONFIG_NET_ICMP=y
+CONFIG_NET_ICMP_PING=y
+
+#
+# IGMPv2 Client Support
+#
+# CONFIG_NET_IGMP is not set
+
+#
+# ARP Configuration
+#
+CONFIG_NET_ARP=y
+CONFIG_NET_ARPTAB_SIZE=16
+CONFIG_NET_ARP_MAXAGE=120
+CONFIG_NET_ARP_IPIN=y
+CONFIG_NET_ARP_SEND=y
+CONFIG_ARP_SEND_MAXTRIES=5
+CONFIG_ARP_SEND_DELAYMSEC=20
+
+#
+# Network I/O Buffer Support
+#
+CONFIG_NET_IOB=y
+CONFIG_IOB_NBUFFERS=36
+CONFIG_IOB_BUFSIZE=196
+CONFIG_IOB_NCHAINS=8
+CONFIG_IOB_THROTTLE=8
+# CONFIG_NET_ARCH_INCR32 is not set
+# CONFIG_NET_ARCH_CHKSUM is not set
+# CONFIG_NET_STATISTICS is not set
+
+#
+# Routing Table Configuration
+#
+# CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME="TWRK64"
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+CONFIG_FS_AUTOMOUNTER=y
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_PSEUDOFS_SOFTLINKS is not set
+CONFIG_FS_READABLE=y
+CONFIG_FS_WRITABLE=y
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+CONFIG_FS_FAT=y
+# CONFIG_FAT_LCNAMES is not set
+CONFIG_FAT_LFN=y
+CONFIG_FAT_MAXFNAME=32
+# CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
+# CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
+# CONFIG_NFS is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_NET is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+# CONFIG_BUILTIN is not set
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+
+#
+# Standard C I/O
+#
+# CONFIG_STDIO_DISABLE_BUFFERING is not set
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_LIBM is not set
+
+#
+# Architecture-Specific Support
+#
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
+
+#
+# stdlib Options
+#
+CONFIG_LIB_RAND_ORDER=1
+CONFIG_LIB_HOMEDIR="/"
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
+
+#
+# Program Execution Options
+#
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+
+#
+# errno Decode Support
+#
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+
+#
+# memcpy/memset Options
+#
+# CONFIG_MEMSET_OPTSPEED is not set
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+
+#
+# Time/Time Zone Support
+#
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_ARCH_HAVE_TLS=y
+
+#
+# Thread Local Storage (TLS)
+#
+# CONFIG_TLS is not set
+
+#
+# Network-Related Options
+#
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
+CONFIG_LIBC_NETDB=y
+
+#
+# NETDB Support
+#
+# CONFIG_NETDB_HOSTFILE is not set
+# CONFIG_NETDB_DNSCLIENT is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NETTEST is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_STAT is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_UDP is not set
+# CONFIG_EXAMPLES_UDPBLASTER is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_WGET is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_DHCPC is not set
+# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
+# CONFIG_NETUTILS_SMTP is not set
+CONFIG_NETUTILS_TELNETD=y
+# CONFIG_NETUTILS_TFTPC is not set
+# CONFIG_NETUTILS_WEBCLIENT is not set
+# CONFIG_NETUTILS_WEBSERVER is not set
+# CONFIG_NETUTILS_XMLRPC is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFATFS is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PING is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+CONFIG_NSH_ARCHINIT=y
+
+#
+# Networking Configuration
+#
+CONFIG_NSH_NETINIT=y
+# CONFIG_NSH_NETINIT_THREAD is not set
+
+#
+# IP Address Configuration
+#
+
+#
+# IPv4 Addresses
+#
+CONFIG_NSH_IPADDR=0xc0a800e9
+CONFIG_NSH_DRIPADDR=0xc0a800fe
+CONFIG_NSH_NETMASK=0xffffff00
+# CONFIG_NSH_NOMAC is not set
+CONFIG_NSH_MAX_ROUNDTRIP=20
+
+#
+# Telnet Configuration
+#
+CONFIG_NSH_TELNET=y
+CONFIG_NSH_TELNETD_PORT=23
+CONFIG_NSH_TELNETD_DAEMONPRIO=100
+CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
+CONFIG_NSH_TELNETD_CLIENTPRIO=100
+CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
+CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+# CONFIG_NSH_TELNET_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_NETDB is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/pirelli_dpl10/nsh_highram/setenv.sh b/configs/twr-k64f120m/netnsh/setenv.sh
similarity index 93%
rename from configs/pirelli_dpl10/nsh_highram/setenv.sh
rename to configs/twr-k64f120m/netnsh/setenv.sh
index 56d2c4cf94e0c2411f645114703d850f376618bb..009064720ba47911a52a97dcab6ab8e1c56a6108 100755
--- a/configs/pirelli_dpl10/nsh_highram/setenv.sh
+++ b/configs/twr-k64f120m/netnsh/setenv.sh
@@ -1,8 +1,8 @@
 #!/bin/bash
-# configs/pirelli_dpl10/nsh/setenv.sh
+# configs/twr-k64f120m/netnsh/setenv.sh
 #
-#   Copyright (C) 2007, 2008, 2011, 2013 Gregory Nutt. All rights reserved.
-#   Author: Gregory Nutt 
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions
@@ -58,5 +58,4 @@ export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
 
 # Add the path to the toolchain to the PATH varialble
 export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
-
 echo "PATH : ${PATH}"
diff --git a/configs/twr-k64f120m/nsh/Make.defs b/configs/twr-k64f120m/nsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..5b468a19c2002e8d1d31cbf5da72e05d7ca9bec4
--- /dev/null
+++ b/configs/twr-k64f120m/nsh/Make.defs
@@ -0,0 +1,111 @@
+############################################################################
+# configs/twr-k64f120m/nsh/Make.defs
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/twr-k64f120m/nsh/defconfig b/configs/twr-k64f120m/nsh/defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..d819dfe55f9e7dbe3f4246e4e8904e71ed57d7ac
--- /dev/null
+++ b/configs/twr-k64f120m/nsh/defconfig
@@ -0,0 +1,1050 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+# CONFIG_RAW_BINARY is not set
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+CONFIG_ARCH_CHIP_KINETIS=y
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+# CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="kinetis"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+# CONFIG_ARMV7M_HAVE_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+
+#
+# Kinetis Configuration Options
+#
+# CONFIG_ARCH_CHIP_MK20DN32VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX32VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DN64VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX64VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DN128VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX128VLH5 is not set
+# CONFIG_ARCH_CHIP_MK20DX64VLH7 is not set
+# CONFIG_ARCH_CHIP_MK20DX128VLH7 is not set
+# CONFIG_ARCH_CHIP_MK20DX256VLH7 is not set
+# CONFIG_ARCH_CHIP_MK40N512VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK40N512VMD100 is not set
+# CONFIG_ARCH_CHIP_MK40X128VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK40X128VMD100 is not set
+# CONFIG_ARCH_CHIP_MK40X256VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK40X256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60N256VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK60N256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VLL100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK60N512VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60X256VLQ100 is not set
+# CONFIG_ARCH_CHIP_MK60X256VMD100 is not set
+# CONFIG_ARCH_CHIP_MK60FN1M0VLQ12 is not set
+# CONFIG_ARCH_CHIP_MK64FN1M0VLL12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VLL12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VDC12 is not set
+# CONFIG_ARCH_CHIP_MK64FN1M0VDC12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VLQ12 is not set
+# CONFIG_ARCH_CHIP_MK64FX512VMD12 is not set
+CONFIG_ARCH_CHIP_MK64FN1M0VMD12=y
+# CONFIG_ARCH_CHIP_MK66FX1M0VMD18 is not set
+# CONFIG_ARCH_CHIP_MK66FN2M0VMD18 is not set
+# CONFIG_ARCH_CHIP_MK66FX1M0VLQ18 is not set
+# CONFIG_ARCH_CHIP_MK66FN2M0VLQ18 is not set
+# CONFIG_ARCH_FAMILY_K20 is not set
+# CONFIG_ARCH_FAMILY_K40 is not set
+# CONFIG_ARCH_FAMILY_K60 is not set
+CONFIG_ARCH_FAMILY_K64=y
+# CONFIG_ARCH_FAMILY_K66 is not set
+
+#
+# Kinetis Peripheral Support
+#
+CONFIG_KINETIS_HAVE_I2C1=y
+CONFIG_KINETIS_HAVE_I2C2=y
+# CONFIG_KINETIS_HAVE_I2C3 is not set
+CONFIG_KINETIS_HAVE_SPI1=y
+CONFIG_KINETIS_HAVE_SPI2=y
+# CONFIG_KINETIS_TRACE is not set
+# CONFIG_KINETIS_FLEXBUS is not set
+# CONFIG_KINETIS_UART0 is not set
+CONFIG_KINETIS_UART1=y
+# CONFIG_KINETIS_UART2 is not set
+# CONFIG_KINETIS_UART3 is not set
+# CONFIG_KINETIS_UART4 is not set
+# CONFIG_KINETIS_UART5 is not set
+# CONFIG_KINETIS_ENET is not set
+# CONFIG_KINETIS_RNGB is not set
+# CONFIG_KINETIS_FLEXCAN0 is not set
+# CONFIG_KINETIS_FLEXCAN1 is not set
+# CONFIG_KINETIS_SPI0 is not set
+# CONFIG_KINETIS_SPI1 is not set
+# CONFIG_KINETIS_SPI2 is not set
+# CONFIG_KINETIS_I2C0 is not set
+# CONFIG_KINETIS_I2C1 is not set
+# CONFIG_KINETIS_I2C2 is not set
+# CONFIG_KINETIS_I2S is not set
+# CONFIG_KINETIS_DAC0 is not set
+# CONFIG_KINETIS_DAC1 is not set
+# CONFIG_KINETIS_ADC0 is not set
+# CONFIG_KINETIS_ADC1 is not set
+# CONFIG_KINETIS_CMP is not set
+# CONFIG_KINETIS_VREF is not set
+CONFIG_KINETIS_SDHC=y
+# CONFIG_KINETIS_FTM0 is not set
+# CONFIG_KINETIS_FTM1 is not set
+# CONFIG_KINETIS_FTM2 is not set
+# CONFIG_KINETIS_FTM3 is not set
+# CONFIG_KINETIS_LPTIMER is not set
+# CONFIG_KINETIS_RTC is not set
+# CONFIG_KINETIS_EWM is not set
+# CONFIG_KINETIS_CMT is not set
+# CONFIG_KINETIS_USBOTG is not set
+# CONFIG_KINETIS_USBDCD is not set
+# CONFIG_KINETIS_LLWU is not set
+# CONFIG_KINETIS_TSI is not set
+# CONFIG_KINETIS_FTFL is not set
+# CONFIG_KINETIS_DMA is not set
+# CONFIG_KINETIS_CRC is not set
+# CONFIG_KINETIS_PDB is not set
+# CONFIG_KINETIS_PIT is not set
+
+#
+# Kinetis GPIO Interrupt Configuration
+#
+CONFIG_KINETIS_GPIOIRQ=y
+# CONFIG_KINETIS_PORTAINTS is not set
+CONFIG_KINETIS_PORTBINTS=y
+# CONFIG_KINETIS_PORTCINTS is not set
+# CONFIG_KINETIS_PORTDINTS is not set
+# CONFIG_KINETIS_PORTEINTS is not set
+
+#
+# Kinetis SDHC Configuration
+#
+# CONFIG_KINETIS_SDHC_DMA is not set
+# CONFIG_KINETIS_SDHC_WIDTH_D1_ONLY is not set
+# CONFIG_KINETIS_SDHC_ABSFREQ is not set
+
+#
+# Kinetis UART Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+CONFIG_ARCH_HAVE_RAMFUNCS=y
+CONFIG_ARCH_RAMFUNCS=y
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=9535
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x1fff0000
+CONFIG_RAM_SIZE=262144
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_TWR_K64F120M=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="twr-k64f120m"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+# CONFIG_ARCH_BUTTONS is not set
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT=y
+CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_FSTYPE="vfat"
+CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_BLKDEV="/dev/mmcsd0"
+CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_MOUNTPOINT="/mnt/sdcard"
+CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_DDELAY=1000
+CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_UDELAY=2000
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2017
+CONFIG_START_MONTH=1
+CONFIG_START_DAY=23
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_SPINLOCK is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=10
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=224
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+CONFIG_DISABLE_POLL=y
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+# CONFIG_ARCH_HAVE_I2CRESET is not set
+# CONFIG_I2C is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
+# CONFIG_SPI is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+CONFIG_MMCSD=y
+CONFIG_MMCSD_NSLOTS=1
+# CONFIG_MMCSD_READONLY is not set
+# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set
+CONFIG_MMCSD_MMCSUPPORT=y
+CONFIG_MMCSD_HAVECARDDETECT=y
+CONFIG_ARCH_HAVE_SDIO=y
+# CONFIG_SDIO_DMA is not set
+# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+CONFIG_MMCSD_SDIO=y
+# CONFIG_SDIO_PREFLIGHT is not set
+# CONFIG_SDIO_MUXBUS is not set
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
+# CONFIG_SDIO_BLOCKSETUP is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+CONFIG_UART1_SERIALDRIVER=y
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+CONFIG_UART1_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# UART1 Configuration
+#
+CONFIG_UART1_RXBUFSIZE=256
+CONFIG_UART1_TXBUFSIZE=256
+CONFIG_UART1_BAUD=115200
+CONFIG_UART1_BITS=8
+CONFIG_UART1_PARITY=0
+CONFIG_UART1_2STOP=0
+# CONFIG_UART1_IFLOWCONTROL is not set
+# CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+CONFIG_FS_AUTOMOUNTER=y
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_PSEUDOFS_SOFTLINKS is not set
+CONFIG_FS_READABLE=y
+CONFIG_FS_WRITABLE=y
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+CONFIG_FS_FAT=y
+# CONFIG_FAT_LCNAMES is not set
+CONFIG_FAT_LFN=y
+CONFIG_FAT_MAXFNAME=32
+# CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
+# CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+# CONFIG_BUILTIN is not set
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+
+#
+# Standard C I/O
+#
+# CONFIG_STDIO_DISABLE_BUFFERING is not set
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_LIBM is not set
+
+#
+# Architecture-Specific Support
+#
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
+
+#
+# stdlib Options
+#
+CONFIG_LIB_RAND_ORDER=1
+CONFIG_LIB_HOMEDIR="/"
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
+
+#
+# Program Execution Options
+#
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+
+#
+# errno Decode Support
+#
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+
+#
+# memcpy/memset Options
+#
+# CONFIG_MEMSET_OPTSPEED is not set
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+
+#
+# Time/Time Zone Support
+#
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_ARCH_HAVE_TLS=y
+
+#
+# Thread Local Storage (TLS)
+#
+# CONFIG_TLS is not set
+
+#
+# Network-Related Options
+#
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
+# CONFIG_LIBC_NETDB is not set
+
+#
+# NETDB Support
+#
+# CONFIG_NETDB_HOSTFILE is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+# CONFIG_HAVE_CXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_STAT is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFATFS is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CMDOPT_DF_H=y
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/compal_e99/nsh_compalram/setenv.sh b/configs/twr-k64f120m/nsh/setenv.sh
similarity index 88%
rename from configs/compal_e99/nsh_compalram/setenv.sh
rename to configs/twr-k64f120m/nsh/setenv.sh
index 16a2fe30fa842bb35b3a985e57bb4947ca1ec31f..7761313c011f60e00840174a3669561d01fa4838 100755
--- a/configs/compal_e99/nsh_compalram/setenv.sh
+++ b/configs/twr-k64f120m/nsh/setenv.sh
@@ -1,7 +1,7 @@
 #!/bin/bash
-# c5471evm/nsh/setenv.sh
+# configs/twr-k64f120m/nsh/setenv.sh
 #
-#   Copyright (C) 2007, 2008, 2011 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -50,8 +50,7 @@ fi
 # This is the Cygwin path to the location where I installed the CodeSourcery
 # toolchain under windows.  You will also have to edit this if you install
 # the CodeSourcery toolchain in any other location
-# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
-# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
 
 # This is the Cygwin path to the location where I build the buildroot
 # toolchain.
@@ -59,5 +58,4 @@ export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
 
 # Add the path to the toolchain to the PATH varialble
 export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
-
 echo "PATH : ${PATH}"
diff --git a/configs/twr-k64f120m/scripts/ld.script b/configs/twr-k64f120m/scripts/ld.script
new file mode 100644
index 0000000000000000000000000000000000000000..9ddd83ff6c5540c4c60be711fcb1577ccf7ecd26
--- /dev/null
+++ b/configs/twr-k64f120m/scripts/ld.script
@@ -0,0 +1,142 @@
+/****************************************************************************
+ * configs/twr-k64f120m/scripts/ld.script
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* The MK64FN1M0VMD12 has 1MB of FLASH beginning at address 0x0000:0000 and
+ * 256KB of SRAM beginning at address 0x1fff:0000 (SRAM_L 64KB) and 0x2000:0000
+ * (SRAM_U 192KB).
+ *
+ * NOTE: that the first part of the K64 FLASH region is reserved for
+ *       interrupt vectflash and, following that, is a region from 0x0000:0400
+ *       to 0x0000:040f that is reserved for the FLASH control fields (FCF).
+ *
+ * NOTE: The on-chip RAM is split evenly among SRAM_L and SRAM_U. The RAM is
+ *       also implemented such that the SRAM_L and SRAM_U ranges form a
+ *       contiguous block in the memory map.
+ */
+
+MEMORY
+{
+	vectflash (rx)  : ORIGIN = 0x00000000, LENGTH = 1K
+	cfmprotect (rx) : ORIGIN = 0x00000400, LENGTH = 16
+	progflash (rx)  : ORIGIN = 0x00000800, LENGTH = 1M - 2K
+	datasram (rwx)  : ORIGIN = 0x1fff0000, LENGTH = 256K
+}
+
+OUTPUT_ARCH(arm)
+ENTRY(_stext)
+EXTERN(__flashconfigbytes)
+SECTIONS
+{
+	.vectors : {
+		_svectors = ABSOLUTE(.);
+		*(.vectors)
+		_evectors = ABSOLUTE(.);
+	} > vectflash
+
+	.cfmprotect : {
+		KEEP(*(.cfmconfig))
+	} > cfmprotect
+
+	.text : {
+		_stext = ABSOLUTE(.);
+		*(.text .text.*)
+		*(.fixup)
+		*(.gnu.warning)
+		*(.rodata .rodata.*)
+		*(.gnu.linkonce.t.*)
+		*(.glue_7)
+		*(.glue_7t)
+		*(.got)
+		*(.gcc_except_table)
+		*(.gnu.linkonce.r.*)
+		_etext = ABSOLUTE(.);
+	} > progflash
+
+	.init_section : {
+		_sinit = ABSOLUTE(.);
+		*(.init_array .init_array.*)
+		_einit = ABSOLUTE(.);
+	} > progflash
+
+	.ARM.extab : {
+		*(.ARM.extab*)
+	} > progflash
+
+	__exidx_start = ABSOLUTE(.);
+	.ARM.exidx : {
+		*(.ARM.exidx*)
+	} > progflash
+	__exidx_end = ABSOLUTE(.);
+
+	.data : {
+		_sdata = ABSOLUTE(.);
+		*(.data .data.*)
+		*(.gnu.linkonce.d.*)
+		CONSTRUCTORS
+		_edata = ABSOLUTE(.);
+	} > datasram AT > progflash
+
+	_eronly = LOADADDR(.data);
+
+	.ramfunc ALIGN(4): {
+		_sramfuncs = ABSOLUTE(.);
+		*(.ramfunc  .ramfunc.*)
+		_eramfuncs = ABSOLUTE(.);
+	} > datasram AT > progflash
+
+	_framfuncs = LOADADDR(.ramfunc);
+
+	.bss : {
+		_sbss = ABSOLUTE(.);
+		*(.bss .bss.*)
+		*(.gnu.linkonce.b.*)
+		*(COMMON)
+		_ebss = ABSOLUTE(.);
+	} > datasram
+
+	/* Stabs debugging sections. */
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_info 0 : { *(.debug_info) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/twr-k64f120m/src/Makefile b/configs/twr-k64f120m/src/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..7f9b01022082ff6f6f52e69d7ab3c352c7c3018a
--- /dev/null
+++ b/configs/twr-k64f120m/src/Makefile
@@ -0,0 +1,69 @@
+############################################################################
+# configs/twr-k64f120m/src/Makefile
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+ASRCS =
+#CSRCS = k64_boot.c k64_spi.c
+CSRCS = k64_boot.c
+
+ifeq ($(CONFIG_ARCH_LEDS),y)
+CSRCS += k64_leds.c
+endif
+
+ifeq ($(CONFIG_ARCH_BUTTONS),y)
+#CSRCS += k64_buttons.c
+endif
+
+ifeq ($(CONFIG_LIB_BOARDCTL),y)
+CSRCS += k64_appinit.c
+endif
+
+ifeq ($(CONFIG_KINETIS_SDHC),y)
+CSRCS += k64_sdhc.c
+ifeq ($(CONFIG_FS_AUTOMOUNTER),y)
+CSRCS += k64_automount.c
+endif
+endif
+
+ifeq ($(CONFIG_USBDEV),y)
+#CSRCS += k64_usbdev.c
+endif
+
+ifeq ($(CONFIG_USBMSC),y)
+#CSRCS += k64_usbmsc.c
+endif
+
+include $(TOPDIR)/configs/Board.mk
diff --git a/configs/twr-k64f120m/src/k64_appinit.c b/configs/twr-k64f120m/src/k64_appinit.c
new file mode 100644
index 0000000000000000000000000000000000000000..1c59c4aa2af57f165314c3e1eb6f686b157b7d52
--- /dev/null
+++ b/configs/twr-k64f120m/src/k64_appinit.c
@@ -0,0 +1,112 @@
+/****************************************************************************
+ * config/twr-k64f120m/src/k64_appinit.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#ifdef CONFIG_KINETIS_SDHC
+#  include 
+#  include 
+#endif
+
+#include "kinetis.h"
+#include "twrk64.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ *   Perform application specific initialization.  This function is never
+ *   called directly from application code, but only indirectly via the
+ *   (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ *   arg - The boardctl() argument is passed to the board_app_initialize()
+ *         implementation without modification.  The argument has no
+ *         meaning to NuttX; the meaning of the argument is a contract
+ *         between the board-specific initalization logic and the the
+ *         matching application logic.  The value cold be such things as a
+ *         mode enumeration value, a set of DIP switch switch settings, a
+ *         pointer to configuration data read from a file or serial FLASH,
+ *         or whatever you would like to do with it.  Every implementation
+ *         should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+int board_app_initialize(uintptr_t arg)
+{
+  int ret;
+
+#ifdef HAVE_PROC
+  /* Mount the proc filesystem */
+
+  syslog(LOG_INFO, "Mounting procfs to /proc\n");
+
+  ret = mount(NULL, PROCFS_MOUNTPOUNT, "procfs", 0, NULL);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to mount the PROC filesystem: %d (%d)\n",
+             ret, errno);
+      return ret;
+    }
+#endif
+ 
+#ifdef HAVE_MMCSD
+  /* Initialize the MMC/SD driver and possible automount */
+
+  return k64_sdhc_initialize();
+#endif
+  return OK;
+}
diff --git a/configs/twr-k64f120m/src/k64_automount.c b/configs/twr-k64f120m/src/k64_automount.c
new file mode 100644
index 0000000000000000000000000000000000000000..5e0ddfb46599076582230897542bf8a8926d8bde
--- /dev/null
+++ b/configs/twr-k64f120m/src/k64_automount.c
@@ -0,0 +1,311 @@
+/************************************************************************************
+ * configs/twr-k64f120m/src/k64_automount.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#if defined(CONFIG_FS_AUTOMOUNTER_DEBUG) && !defined(CONFIG_DEBUG_FS)
+#  define CONFIG_DEBUG_FS 1
+#endif
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include "twrk64.h"
+
+#ifdef HAVE_AUTOMOUNTER
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+
+/* This structure represents the changeable state of the automounter */
+
+struct k64_automount_state_s
+{
+  volatile automount_handler_t handler;    /* Upper half handler */
+  FAR void *arg;                           /* Handler argument */
+  bool enable;                             /* Fake interrupt enable */
+  bool pending;                            /* Set if there an event while disabled */
+};
+
+/* This structure represents the static configuration of an automounter */
+
+struct k64_automount_config_s
+{
+  /* This must be first thing in structure so that we can simply cast from struct
+   * automount_lower_s to struct k64_automount_config_s
+   */
+
+  struct automount_lower_s lower;          /* Publicly visible part */
+  FAR struct k64_automount_state_s *state; /* Changeable state */
+};
+
+/************************************************************************************
+ * Private Function Prototypes
+ ************************************************************************************/
+
+static int  k64_attach(FAR const struct automount_lower_s *lower,
+                       automount_handler_t isr, FAR void *arg);
+static void k64_enable(FAR const struct automount_lower_s *lower, bool enable);
+static bool k64_inserted(FAR const struct automount_lower_s *lower);
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+static struct k64_automount_state_s g_sdhc_state;
+static const struct k64_automount_config_s g_sdhc_config =
+{
+  .lower        =
+  {
+    .fstype     = CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_FSTYPE,
+    .blockdev   = CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_BLKDEV,
+    .mountpoint = CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_MOUNTPOINT,
+    .ddelay     = MSEC2TICK(CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_DDELAY),
+    .udelay     = MSEC2TICK(CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_UDELAY),
+    .attach     = k64_attach,
+    .enable     = k64_enable,
+    .inserted   = k64_inserted
+  },
+  .state        = &g_sdhc_state
+};
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name:  k64_attach
+ *
+ * Description:
+ *   Attach a new SDHC event handler
+ *
+ * Input Parameters:
+ *   lower - An instance of the auto-mounter lower half state structure
+ *   isr   - The new event handler to be attach
+ *   arg   - Client data to be provided when the event handler is invoked.
+ *
+ *  Returned Value:
+ *    Always returns OK
+ *
+ ************************************************************************************/
+
+static int k64_attach(FAR const struct automount_lower_s *lower,
+                      automount_handler_t isr, FAR void *arg)
+{
+  FAR const struct k64_automount_config_s *config;
+  FAR struct k64_automount_state_s *state;
+
+  /* Recover references to our structure */
+
+  config = (FAR struct k64_automount_config_s *)lower;
+  DEBUGASSERT(config != NULL && config->state != NULL);
+
+  state = config->state;
+
+  /* Save the new handler info (clearing the handler first to eliminate race
+   * conditions).
+   */
+
+  state->handler = NULL;
+  state->pending = false;
+  state->arg     = arg;
+  state->handler = isr;
+  return OK;
+}
+
+/************************************************************************************
+ * Name:  k64_enable
+ *
+ * Description:
+ *   Enable card insertion/removal event detection
+ *
+ * Input Parameters:
+ *   lower - An instance of the auto-mounter lower half state structure
+ *   enable - True: enable event detection; False: disable
+ *
+ *  Returned Value:
+ *    None
+ *
+ ************************************************************************************/
+
+static void k64_enable(FAR const struct automount_lower_s *lower, bool enable)
+{
+  FAR const struct k64_automount_config_s *config;
+  FAR struct k64_automount_state_s *state;
+  irqstate_t flags;
+
+  /* Recover references to our structure */
+
+  config = (FAR struct k64_automount_config_s *)lower;
+  DEBUGASSERT(config != NULL && config->state != NULL);
+
+  state = config->state;
+
+  /* Save the fake enable setting */
+
+  flags = enter_critical_section();
+  state->enable = enable;
+
+  /* Did an interrupt occur while interrupts were disabled? */
+
+  if (enable && state->pending)
+    {
+      /* Yes.. perform the fake interrupt if the interrutp is attached */
+
+      if (state->handler)
+        {
+          bool inserted = k64_cardinserted();
+          (void)state->handler(&config->lower, state->arg, inserted);
+        }
+
+      state->pending = false;
+    }
+
+  leave_critical_section(flags);
+}
+
+/************************************************************************************
+ * Name: k64_inserted
+ *
+ * Description:
+ *   Check if a card is inserted into the slot.
+ *
+ * Input Parameters:
+ *   lower - An instance of the auto-mounter lower half state structure
+ *
+ *  Returned Value:
+ *    True if the card is inserted; False otherwise
+ *
+ ************************************************************************************/
+
+static bool k64_inserted(FAR const struct automount_lower_s *lower)
+{
+  return k64_cardinserted();
+}
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name:  k64_automount_initialize
+ *
+ * Description:
+ *   Configure auto-mounters for each enable and so configured SDHC
+ *
+ * Input Parameters:
+ *   None
+ *
+ *  Returned Value:
+ *    None
+ *
+ ************************************************************************************/
+
+void k64_automount_initialize(void)
+{
+  FAR void *handle;
+
+  finfo("Initializing automounter(s)\n");
+
+  /* Initialize the SDHC0 auto-mounter */
+
+  handle = automount_initialize(&g_sdhc_config.lower);
+  if (!handle)
+    {
+      ferr("ERROR: Failed to initialize auto-mounter for SDHC0\n");
+    }
+}
+
+/************************************************************************************
+ * Name:  k64_automount_event
+ *
+ * Description:
+ *   The SDHC card detection logic has detected an insertion or removal event.  It
+ *   has already scheduled the MMC/SD block driver operations.  Now we need to
+ *   schedule the auto-mount event which will occur with a substantial delay to make
+ *   sure that everything has settle down.
+ *
+ * Input Parameters:
+ *   slotno - Identifies the SDHC0 slot: SDHC0_SLOTNO or SDHC1_SLOTNO.  There is a
+ *      terminology problem here:  Each SDHC supports two slots, slot A and slot B.
+ *      Only slot A is used.  So this is not a really a slot, but an HSCMI peripheral
+ *      number.
+ *   inserted - True if the card is inserted in the slot.  False otherwise.
+ *
+ *  Returned Value:
+ *    None
+ *
+ *  Assumptions:
+ *    Interrupts are disabled.
+ *
+ ************************************************************************************/
+
+void k64_automount_event(bool inserted)
+{
+  FAR const struct k64_automount_config_s *config = &g_sdhc_config;
+  FAR struct k64_automount_state_s *state = &g_sdhc_state;
+
+  /* Is the auto-mounter interrupt attached? */
+
+  if (state->handler)
+    {
+      /* Yes.. Have we been asked to hold off interrupts? */
+
+      if (!state->enable)
+        {
+          /* Yes.. just remember the there is a pending interrupt. We will
+           * deliver the interrupt when interrupts are "re-enabled."
+           */
+
+          state->pending = true;
+        }
+      else
+        {
+          /* No.. forward the event to the handler */
+
+          (void)state->handler(&config->lower, state->arg, inserted);
+        }
+    }
+}
+
+#endif /* HAVE_AUTOMOUNTER */
diff --git a/configs/twr-k64f120m/src/k64_boot.c b/configs/twr-k64f120m/src/k64_boot.c
new file mode 100644
index 0000000000000000000000000000000000000000..b185423ed23597d23c3c5589cc8c0f53c3f02a03
--- /dev/null
+++ b/configs/twr-k64f120m/src/k64_boot.c
@@ -0,0 +1,102 @@
+/************************************************************************************
+ * configs/twr-k64f120m/src/k64_boot.c
+ *
+ *   Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+
+#include "up_arch.h"
+#include "twrk64.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: kinetis_boardinitialize
+ *
+ * Description:
+ *   All Kinetis architectures must provide the following entry point.  This entry
+ *   point is called early in the initialization -- after all memory has been
+ *   configured and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void kinetis_boardinitialize(void)
+{
+  /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
+   * kinetis_spidev_initialize() has been brought into the link.
+   */
+
+#if defined(CONFIG_KINETIS_SPI1) || defined(CONFIG_KINETIS_SPI2)
+  if (kinetis_spidev_initialize)
+    {
+      kinetis_spidev_initialize();
+    }
+#endif
+
+   /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
+    * disabled, and 3) the weak function kinetis_usbinitialize() has been brought
+    * into the build.
+    */
+
+#if defined(CONFIG_USBDEV) && defined(CONFIG_KINETIS_USB)
+  if (kinetis_usbinitialize)
+    {
+      kinetis_usbinitialize();
+    }
+#endif
+
+  /* Configure on-board LEDs if LED support has been selected. */
+
+#ifdef CONFIG_ARCH_LEDS
+  board_autoled_initialize();
+#endif
+}
diff --git a/configs/twr-k64f120m/src/k64_leds.c b/configs/twr-k64f120m/src/k64_leds.c
new file mode 100644
index 0000000000000000000000000000000000000000..ec120b4faf5f5490feadbf03636546e327920f7c
--- /dev/null
+++ b/configs/twr-k64f120m/src/k64_leds.c
@@ -0,0 +1,250 @@
+/****************************************************************************
+ * configs/twr-k64f120m/src/k64_leds.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+
+#include "kinetis.h"
+#include "twrk64.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* The TWR-K64F120M has four LEDs:
+ *
+ * 1. D5 / Green LED    PTE6 
+ * 2. D6 / Yellow LED   PTE7 
+ * 3. D7 / Orange LED   PTE8 
+ * 4  D9 / Blue LED     PTE9 
+ *
+ * LED4 is reservered for user.
+ */
+
+/* The following definitions map the encoded LED setting to GPIO settings */
+
+#define K64_LED1          (1 << 0)
+#define K64_LED2          (1 << 1)
+#define K64_LED3          (1 << 2)
+// #define K64_LED4          (1 << 3)
+
+#define ON_SETBITS_SHIFT  (0)
+#define ON_CLRBITS_SHIFT  (4)
+#define OFF_SETBITS_SHIFT (8)
+#define OFF_CLRBITS_SHIFT (12)
+
+#define ON_BITS(v)        ((v) & 0xff)
+#define OFF_BITS(v)       (((v) >> 8) & 0x0ff)
+#define SETBITS(b)        ((b) & 0x0f)
+#define CLRBITS(b)        (((b) >> 4) & 0x0f)
+
+#define ON_SETBITS(v)     (SETBITS(ON_BITS(v))
+#define ON_CLRBITS(v)     (CLRBITS(ON_BITS(v))
+#define OFF_SETBITS(v)    (SETBITS(OFF_BITS(v))
+#define OFF_CLRBITS(v)    (CLRBITS(OFF_BITS(v))
+
+#define LED_STARTED_ON_SETBITS       (0 << ON_SETBITS_SHIFT)
+#define LED_STARTED_ON_CLRBITS       (0 << ON_CLRBITS_SHIFT)
+#define LED_STARTED_OFF_SETBITS      (0 << OFF_SETBITS_SHIFT)
+#define LED_STARTED_OFF_CLRBITS      (0 << OFF_CLRBITS_SHIFT)
+
+#define LED_HEAPALLOCATE_ON_SETBITS  (0 << ON_SETBITS_SHIFT)
+#define LED_HEAPALLOCATE_ON_CLRBITS  (0 << ON_CLRBITS_SHIFT)
+#define LED_HEAPALLOCATE_OFF_SETBITS (0 << OFF_SETBITS_SHIFT)
+#define LED_HEAPALLOCATE_OFF_CLRBITS (0 << OFF_CLRBITS_SHIFT)
+
+#define LED_IRQSENABLED_ON_SETBITS   (0 << ON_SETBITS_SHIFT)
+#define LED_IRQSENABLED_ON_CLRBITS   (0 << ON_CLRBITS_SHIFT)
+#define LED_IRQSENABLED_OFF_SETBITS  (0 << OFF_SETBITS_SHIFT)
+#define LED_IRQSENABLED_OFF_CLRBITS  (0 << OFF_CLRBITS_SHIFT)
+
+#define LED_STACKCREATED_ON_SETBITS  (K64_LED1 << ON_SETBITS_SHIFT)
+#define LED_STACKCREATED_ON_CLRBITS  (0 << ON_CLRBITS_SHIFT)
+#define LED_STACKCREATED_OFF_SETBITS (0 << OFF_SETBITS_SHIFT)
+#define LED_STACKCREATED_OFF_CLRBITS (0 << OFF_CLRBITS_SHIFT)
+
+#define LED_INIRQ_ON_SETBITS         (K64_LED2 << ON_SETBITS_SHIFT)
+#define LED_INIRQ_ON_CLRBITS         (0 << ON_CLRBITS_SHIFT)
+#define LED_INIRQ_OFF_SETBITS        (0 << OFF_SETBITS_SHIFT)
+#define LED_INIRQ_OFF_CLRBITS        (K64_LED2 << OFF_CLRBITS_SHIFT)
+
+#define LED_SIGNAL_ON_SETBITS        (K64_LED3 << ON_SETBITS_SHIFT)
+#define LED_SIGNAL_ON_CLRBITS        (0 << ON_CLRBITS_SHIFT)
+#define LED_SIGNAL_OFF_SETBITS       (0 << OFF_SETBITS_SHIFT)
+#define LED_SIGNAL_OFF_CLRBITS       (K64_LED3 << OFF_CLRBITS_SHIFT)
+
+#define LED_ASSERTION_ON_SETBITS     ((K64_LED1|K64_LED2|K64_LED3) << ON_SETBITS_SHIFT)
+#define LED_ASSERTION_ON_CLRBITS     (0 << ON_CLRBITS_SHIFT)
+#define LED_ASSERTION_OFF_SETBITS    (0 << OFF_SETBITS_SHIFT)
+#define LED_ASSERTION_OFF_CLRBITS    (0 << OFF_CLRBITS_SHIFT)
+
+#define LED_PANIC_ON_SETBITS         (K64_LED1 << ON_SETBITS_SHIFT)
+#define LED_PANIC_ON_CLRBITS         (0 << ON_CLRBITS_SHIFT)
+#define LED_PANIC_OFF_SETBITS        (0 << OFF_SETBITS_SHIFT)
+#define LED_PANIC_OFF_CLRBITS        (K64_LED1 << OFF_CLRBITS_SHIFT)
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const uint16_t g_ledbits[8] =
+{
+  (LED_STARTED_ON_SETBITS       | LED_STARTED_ON_CLRBITS |
+   LED_STARTED_OFF_SETBITS      | LED_STARTED_OFF_CLRBITS),
+
+  (LED_HEAPALLOCATE_ON_SETBITS  | LED_HEAPALLOCATE_ON_CLRBITS |
+   LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS),
+
+  (LED_IRQSENABLED_ON_SETBITS   | LED_IRQSENABLED_ON_CLRBITS |
+   LED_IRQSENABLED_OFF_SETBITS  | LED_IRQSENABLED_OFF_CLRBITS),
+
+  (LED_STACKCREATED_ON_SETBITS  | LED_STACKCREATED_ON_CLRBITS |
+   LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS),
+
+  (LED_INIRQ_ON_SETBITS         | LED_INIRQ_ON_CLRBITS |
+   LED_INIRQ_OFF_SETBITS        | LED_INIRQ_OFF_CLRBITS),
+
+  (LED_SIGNAL_ON_SETBITS        | LED_SIGNAL_ON_CLRBITS |
+   LED_SIGNAL_OFF_SETBITS       | LED_SIGNAL_OFF_CLRBITS),
+
+  (LED_ASSERTION_ON_SETBITS     | LED_ASSERTION_ON_CLRBITS |
+   LED_ASSERTION_OFF_SETBITS    | LED_ASSERTION_OFF_CLRBITS),
+
+  (LED_PANIC_ON_SETBITS         | LED_PANIC_ON_CLRBITS |
+   LED_PANIC_OFF_SETBITS        | LED_PANIC_OFF_CLRBITS)
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+static inline void led_clrbits(unsigned int clrbits)
+{
+  if ((clrbits & K64_LED1) != 0)
+    {
+      kinetis_gpiowrite(GPIO_LED1, true);
+    }
+
+  if ((clrbits & K64_LED2) != 0)
+    {
+      kinetis_gpiowrite(GPIO_LED2, true);
+    }
+
+  if ((clrbits & K64_LED3) != 0)
+    {
+      kinetis_gpiowrite(GPIO_LED3, true);
+    }
+
+}
+
+static inline void led_setbits(unsigned int setbits)
+{
+  if ((setbits & K64_LED1) != 0)
+    {
+      kinetis_gpiowrite(GPIO_LED1, false);
+    }
+
+  if ((setbits & K64_LED2) != 0)
+    {
+      kinetis_gpiowrite(GPIO_LED2, false);
+    }
+
+  if ((setbits & K64_LED3) != 0)
+    {
+      kinetis_gpiowrite(GPIO_LED3, false);
+    }
+
+}
+
+static void led_setonoff(unsigned int bits)
+{
+  led_clrbits(CLRBITS(bits));
+  led_setbits(SETBITS(bits));
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_autoled_initialize
+ *
+ * Description:
+ *   Initialize LED GPIOs so that LEDs can be controlled.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_LEDS
+void board_autoled_initialize(void)
+{
+   /* Configure LED1-3 GPIOs for output */
+
+   kinetis_pinconfig(GPIO_LED1);
+   kinetis_pinconfig(GPIO_LED2);
+   kinetis_pinconfig(GPIO_LED3);
+}
+
+/****************************************************************************
+ * Name: board_autoled_on
+ *
+ * Description:
+ *   Puts on the relevants LEDs for one of the LED_condition (see board.h)
+ ****************************************************************************/
+
+void board_autoled_on(int led)
+{
+  led_setonoff(ON_BITS(g_ledbits[led]));
+}
+
+/****************************************************************************
+ * Name: board_autoled_off
+ *
+ * Description:
+ *   Puts off the relevants LEDs for one of the LED_condition (see board.h)
+ ****************************************************************************/
+
+void board_autoled_off(int led)
+{
+  led_setonoff(OFF_BITS(g_ledbits[led]));
+}
+
+#endif /* CONFIG_ARCH_LEDS */
diff --git a/configs/twr-k64f120m/src/k64_sdhc.c b/configs/twr-k64f120m/src/k64_sdhc.c
new file mode 100644
index 0000000000000000000000000000000000000000..f7d4d1edff10ccb7505d9fddd07f28de76ab87ad
--- /dev/null
+++ b/configs/twr-k64f120m/src/k64_sdhc.c
@@ -0,0 +1,254 @@
+/****************************************************************************
+ * config/twr-k64f120m/src/k64_sdhc.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* A micro Secure Digital (SD) card slot is available on the FRDM-K64F connected to
+ * the SD Host Controller (SDHC) signals of the MCU. This slot will accept micro
+ * format SD memory cards. The SD card detect pin (PTE6) is an open switch that
+ * shorts with VDD when card is inserted.
+ *
+ *   ------------ ------------- --------
+ *    SD Card Slot Board Signal  K64F Pin
+ *    ------------ ------------- --------
+ *    DAT0         SDHC0_D0      PTE0
+ *    DAT1         SDHC0_D1      PTE1
+ *    DAT2         SDHC0_D2      PTE5
+ *    CD/DAT3      SDHC0_D3      PTE4
+ *    CMD          SDHC0_CMD     PTE3
+ *    CLK          SDHC0_DCLK    PTE2
+ *    SWITCH       D_CARD_DETECT PTE6
+ *    ------------ ------------- --------
+ *
+ * There is no Write Protect pin available to the K64F.
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "kinetis.h"
+
+#include "twrk64.h"
+
+#ifdef HAVE_MMCSD
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* This structure holds static information unique to one SDHC peripheral */
+
+struct k64_sdhc_state_s
+{
+  struct sdio_dev_s *sdhc;    /* R/W device handle */
+  bool inserted;              /* TRUE: card is inserted */
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* HSCMI device state */
+
+static struct k64_sdhc_state_s g_sdhc;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: k64_mediachange
+ ****************************************************************************/
+
+static void k64_mediachange(void)
+{
+  bool inserted;
+
+  /* Get the current value of the card detect pin.  This pin is pulled up on
+   * board.  So low means that a card is present.
+   */
+
+  inserted = !kinetis_gpioread(GPIO_SD_CARDDETECT);
+  mcinfo("inserted: %s\n", inserted ? "Yes" : "No");
+
+  /* Has the pin changed state? */
+
+  if (inserted != g_sdhc.inserted)
+    {
+      mcinfo("Media change: %d->%d\n",  g_sdhc.inserted, inserted);
+
+      /* Yes.. perform the appropriate action (this might need some debounce). */
+
+      g_sdhc.inserted = inserted;
+      sdhc_mediachange(g_sdhc.sdhc, inserted);
+
+#ifdef CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT
+      /* Let the automounter know about the insertion event */
+
+      k64_automount_event(k64_cardinserted());
+#endif
+    }
+}
+
+/****************************************************************************
+ * Name: k64_cdinterrupt
+ ****************************************************************************/
+
+static int k64_cdinterrupt(int irq, FAR void *context, FAR void *arg)
+{
+  /* All of the work is done by k64_mediachange() */
+
+  k64_mediachange();
+  return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: k64_sdhc_initialize
+ *
+ * Description:
+ *   Inititialize the SDHC SD card slot
+ *
+ ****************************************************************************/
+
+int k64_sdhc_initialize(void)
+{
+  int ret;
+
+  /* Configure GPIO pins */
+
+  kinetis_pinconfig(GPIO_SD_CARDDETECT);
+
+  /* Attached the card detect interrupt (but don't enable it yet) */
+
+  (void)kinetis_pinirqattach(GPIO_SD_CARDDETECT, k64_cdinterrupt, NULL);
+
+  /* Configure the write protect GPIO -- None */
+
+  /* Mount the SDHC-based MMC/SD block driver */
+  /* First, get an instance of the SDHC interface */
+
+  mcinfo("Initializing SDHC slot %d\n", MMCSD_SLOTNO);
+
+  g_sdhc.sdhc = sdhc_initialize(MMCSD_SLOTNO);
+  if (!g_sdhc.sdhc)
+    {
+      mcerr("ERROR: Failed to initialize SDHC slot %d\n", MMCSD_SLOTNO);
+      return -ENODEV;
+    }
+
+  /* Now bind the SDHC interface to the MMC/SD driver */
+
+  mcinfo("Bind SDHC to the MMC/SD driver, minor=%d\n", MMSCD_MINOR);
+
+  ret = mmcsd_slotinitialize(MMSCD_MINOR, g_sdhc.sdhc);
+  if (ret != OK)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to bind SDHC to the MMC/SD driver: %d\n", ret);
+      return ret;
+    }
+
+  syslog(LOG_INFO, "Successfully bound SDHC to the MMC/SD driver\n");
+
+  /* Handle the initial card state */
+
+  k64_mediachange();
+
+  /* Enable CD interrupts to handle subsequent media changes */
+
+  kinetis_pinirqenable(GPIO_SD_CARDDETECT);
+
+  /* Initialize automount system if configured */
+#ifdef CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT
+  k64_automount_initialize();
+#endif
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: k64_cardinserted
+ *
+ * Description:
+ *   Check if a card is inserted into the SDHC slot
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_AUTOMOUNTER
+bool k64_cardinserted(void)
+{
+  bool inserted;
+
+  /* Get the current value of the card detect pin.  This pin is pulled up on
+   * board.  So low means that a card is present.
+   */
+
+  inserted = !kinetis_gpioread(GPIO_SD_CARDDETECT);
+  mcinfo("inserted: %s\n", inserted ? "Yes" : "No");
+  return inserted;
+}
+#endif
+
+/****************************************************************************
+ * Name: k64_writeprotected
+ *
+ * Description:
+ *   Check if a card is inserted into the SDHC slot
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_AUTOMOUNTER
+bool k64_writeprotected(void)
+{
+  /* There are no write protect pins */
+
+  return false;
+}
+#endif
+
+#endif /* HAVE_MMCSD */
diff --git a/configs/twr-k64f120m/src/twrk64.h b/configs/twr-k64f120m/src/twrk64.h
new file mode 100644
index 0000000000000000000000000000000000000000..5de682600e8aace5b1512805a20c2ee79ecd7764
--- /dev/null
+++ b/configs/twr-k64f120m/src/twrk64.h
@@ -0,0 +1,388 @@
+/************************************************************************************
+ * configs/twr-k64f120m/src/twrk64.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *           Marc Rechte 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * This header file is only accessible from the src directory.
+ * For /arch/arm/src accessibilty use ../include/board.h instead.
+ ************************************************************************************/
+
+#ifndef __CONFIGS_TWR_K64F120M_SRC_TWRK64_H
+#define __CONFIGS_TWR_K64F120M_SRC_TWRK64_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+#include 
+#include 
+#include 
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Assume we have everything */
+
+#define HAVE_PROC        1
+#define HAVE_MMCSD       1
+#define HAVE_AUTOMOUNTER 1
+#define HAVE_USBDEV      1
+
+#if defined(CONFIG_KINETIS_RTC)
+#define HAVE_RTC_DRIVER  1
+#endif
+
+/* Automount procfs */
+
+#if !defined(CONFIG_FS_PROCFS)
+#  undef HAVE_PROC
+#endif
+
+#if defined(HAVE_PROC) && defined(CONFIG_DISABLE_MOUNTPOINT)
+#  warning Mountpoints disabled.  No procfs support
+#  undef HAVE_PROC
+#endif
+
+#if defined(CONFIG_NSH_PROC_MOUNTPOINT)
+#  define PROCFS_MOUNTPOUNT CONFIG_NSH_PROC_MOUNTPOINT
+#else
+#  define PROCFS_MOUNTPOUNT "/proc"
+#endif
+
+/* SD card support */
+
+#define MMCSD_SLOTNO 0
+
+/* Can't support MMC/SD features if mountpoints are disabled or if SDHC support
+ * is not enabled.
+ */
+
+#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_KINETIS_SDHC)
+#  undef HAVE_MMCSD
+#endif
+
+#ifdef HAVE_MMCSD
+#  if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != 0
+#    error Only one MMC/SD slot, slot 0
+#  endif
+
+#  ifdef CONFIG_NSH_MMCSDMINOR
+#    define MMSCD_MINOR CONFIG_NSH_MMCSDMINOR
+#  else
+#    define MMSCD_MINOR 0
+#  endif
+
+/* We expect to receive GPIO interrupts for card insertion events */
+
+#  ifndef CONFIG_KINETIS_GPIOIRQ
+#    error "CONFIG_KINETIS_GPIOIRQ required for card detect interrupt"
+#  endif
+
+#  ifndef CONFIG_KINETIS_PORTBINTS
+#    error "CONFIG_KINETIS_PORTBINTS required for card detect interrupt"
+#  endif
+
+#endif
+
+/* Automounter */
+
+#if !defined(CONFIG_FS_AUTOMOUNTER) || !defined(HAVE_MMCSD)
+#  undef HAVE_AUTOMOUNTER
+#  undef CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT
+#endif
+
+#ifndef CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT
+#  undef HAVE_AUTOMOUNTER
+#endif
+
+/* Automounter defaults */
+
+#ifdef HAVE_AUTOMOUNTER
+
+#  ifndef CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_FSTYPE
+#    define CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_FSTYPE "vfat"
+#  endif
+
+#  ifndef CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_BLKDEV
+#    define CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_BLKDEV "/dev/mmcds0"
+#  endif
+
+#  ifndef CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_MOUNTPOINT
+#    define CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_MOUNTPOINT "/mnt/sdcard"
+#  endif
+
+#  ifndef CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_DDELAY
+#    define CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_DDELAY 1000
+#  endif
+
+#  ifndef CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_UDELAY
+#    define CONFIG_TWR_K64F120M_SDHC_AUTOMOUNT_UDELAY 2000
+#  endif
+#endif /* HAVE_AUTOMOUNTER */
+
+/* Can't support USB features if USB is not enabled */
+
+#ifndef CONFIG_USBDEV
+#  undef HAVE_USBDEV
+#endif
+
+/* How many SPI modules does this chip support? The LM3S6918 supports 2 SPI
+ * modules (others may support more -- in such case, the following must be
+ * expanded).
+ */
+
+#if KINETIS_NSPI < 1
+#  undef CONFIG_KINETIS_SPI1
+#  undef CONFIG_KINETIS_SPI2
+#elif KINETIS_NSPI < 2
+#  undef CONFIG_KINETIS_SPI2
+#endif
+
+/* Button definitions ***************************************************************/
+/* The TWR-K64F120M has 2 user buttons (plus a reset button):
+ *
+ * 1. SW1 (IRQ?)   PTC6
+ * 2. SW3 (IRQ?)   PTA4
+ */
+
+#define BUTTON_SW1        0
+#define BUTTON_SW3        1
+
+#define BUTTON_SW1_BIT    (1 << BUTTON_SW1)
+#define BUTTON_SW3_BIT    (1 << BUTTON_SW3)
+
+/* Alternative pin resolution *******************************************************/
+/* If there are alternative configurations for various pins in the
+ * kinetis_k64pinmux.h header file, those alternative pins will be labeled with a
+ * suffix like _1, _2, etc.  The logic in this file must select the correct pin
+ * configuration for the board by defining a pin configuration (with no suffix) that
+ * maps to the correct alternative.
+ * Please refer to board README for pin explanation.
+ */
+
+#if 0
+#define PIN_I2C0_SDA  PIN_I2C0_SDA_3
+#define PIN_I2C0_SCL  PIN_I2C0_SCL_3
+
+/* Connections via the General Purpose Tower Plug-in (TWRPI) Socket
+TODO See README
+ */
+
+#define PIN_SPI2_SIN   PIN_SPI2_SIN_2
+#define PIN_SPI2_SOUT  PIN_SPI2_SOUT_2
+#define PIN_SPI2_SCK   PIN_SPI2_SCK_2
+
+/* Connections via the Tower Primary Connector Side A
+TODO See README
+ */
+
+/* PTE 26/27 */
+
+#define PIN_UART3_RX   PIN_UART3_RX_2
+#define PIN_UART3_TX   PIN_UART3_TX_2
+
+/* PTE 24/25 */
+
+#define PIN_UART4_RX   PIN_UART4_RX_2
+#define PIN_UART4_TX   PIN_UART4_TX_2
+
+/* Connections via the Tower Primary Connector Side B
+TODO See README
+ */
+#endif
+
+/* SDHC 
+   important notice: on TWR-K64F120M, R521 (close to the SD card holder) is not placed,
+   hence WRPROTEC is always ON. Either place a 4.7KOhm resistor or change PIN config
+   to PULLDOWN, loosing Write Protect function */
+
+#define GPIO_SD_CARDDETECT (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTB | PIN20)
+#define GPIO_SD_WRPROTECT  (GPIO_PULLUP | PIN_PORTB | PIN21)
+
+/* SW */
+
+#define GPIO_SW1           (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTC | PIN6)
+#define GPIO_SW3           (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTA | PIN4)
+
+/* LEDs. Note that LED1-3 are used by system, LED4 is for user defined apps. */
+
+#define GPIO_LED1          (GPIO_LOWDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTE | PIN6)
+#define GPIO_LED2          (GPIO_LOWDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTE | PIN7)
+#define GPIO_LED3          (GPIO_LOWDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTE | PIN8)
+#define GPIO_LED4          (GPIO_LOWDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTE | PIN9)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: k64_spidev_initialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins for the TWR-K64F120M board.
+ *
+ ************************************************************************************/
+
+void weak_function k64_spidev_initialize(void);
+
+/************************************************************************************
+ * Name: k64_usbinitialize
+ *
+ * Description:
+ *   Called to setup USB-related GPIO pins for the TWR-K64F120M board.
+ *
+ ************************************************************************************/
+
+void weak_function k64_usbinitialize(void);
+
+/************************************************************************************
+ * Name: k64_bringup
+ *
+ * Description:
+ *   Bring up board features
+ *
+ ************************************************************************************/
+
+#if defined(CONFIG_LIB_BOARDCTL) || defined(CONFIG_BOARD_INITIALIZE)
+int k64_bringup(void);
+#endif
+
+/****************************************************************************
+ * Name: k64_sdhc_initialize
+ *
+ * Description:
+ *   Inititialize the SDHC SD card slot
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_MMCSD
+int k64_sdhc_initialize(void);
+#else
+#  define k64_sdhc_initialize() (OK)
+#endif
+
+/************************************************************************************
+ * Name: k64_cardinserted
+ *
+ * Description:
+ *   Check if a card is inserted into the SDHC slot
+ *
+ ************************************************************************************/
+
+#ifdef HAVE_AUTOMOUNTER
+bool k64_cardinserted(void);
+#else
+#  define k64_cardinserted() (false)
+#endif
+
+/************************************************************************************
+ * Name: k64_writeprotected
+ *
+ * Description:
+ *   Check if the card in the MMC/SD slot is write protected
+ *
+ ************************************************************************************/
+
+#ifdef HAVE_AUTOMOUNTER
+bool k64_writeprotected(void);
+#else
+#  define k64_writeprotected() (false)
+#endif
+
+/************************************************************************************
+ * Name:  k64_automount_initialize
+ *
+ * Description:
+ *   Configure auto-mounter for the configured SDHC slot
+ *
+ * Input Parameters:
+ *   None
+ *
+ *  Returned Value:
+ *    None
+ *
+ ************************************************************************************/
+
+#ifdef HAVE_AUTOMOUNTER
+void k64_automount_initialize(void);
+#endif
+
+/************************************************************************************
+ * Name:  k64_automount_event
+ *
+ * Description:
+ *   The SDHC card detection logic has detected an insertion or removal event.  It
+ *   has already scheduled the MMC/SD block driver operations.  Now we need to
+ *   schedule the auto-mount event which will occur with a substantial delay to make
+ *   sure that everything has settle down.
+ *
+ * Input Parameters:
+ *   inserted - True if the card is inserted in the slot.  False otherwise.
+ *
+ *  Returned Value:
+ *    None
+ *
+ *  Assumptions:
+ *    Interrupts are disabled.
+ *
+ ************************************************************************************/
+
+#ifdef HAVE_AUTOMOUNTER
+void k64_automount_event(bool inserted);
+#endif
+
+/************************************************************************************
+ * Name: k64_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PWM
+int k64_pwm_setup(void);
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __CONFIGS_TWR_K64F120M_SRC_TWRK64_H */
diff --git a/configs/u-blox-c027/nsh/Make.defs b/configs/u-blox-c027/nsh/Make.defs
index 7d08bc556877703992488bef48ed7407c29d4345..938059a6f98f0d3c12f5cbebde9dc4bea42816b6 100644
--- a/configs/u-blox-c027/nsh/Make.defs
+++ b/configs/u-blox-c027/nsh/Make.defs
@@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/u-blox-c027/nsh/defconfig b/configs/u-blox-c027/nsh/defconfig
index ca3feaaa15d6838aa7fccb6f607a7ceb5696cceb..2acb55848fa5bd32c8556ba99384c9770eacacc0 100644
--- a/configs/u-blox-c027/nsh/defconfig
+++ b/configs/u-blox-c027/nsh/defconfig
@@ -42,35 +42,11 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_AUDIO is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_NET is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_LEDS is not set
-# CONFIG_DEBUG_ANALOG is not set
-CONFIG_DEBUG_GPIO=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -84,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -97,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -119,6 +97,7 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
 # CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
@@ -131,6 +110,7 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
 # CONFIG_ARCH_CORTEXR4 is not set
 # CONFIG_ARCH_CORTEXR4F is not set
 # CONFIG_ARCH_CORTEXR5 is not set
@@ -139,15 +119,17 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
 CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
-# CONFIG_DEBUG_HARDFAULT is not set
 
 #
 # ARMV7M Configuration Options
@@ -156,13 +138,13 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
 CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -238,6 +220,7 @@ CONFIG_LPC17_I2C1=y
 # Serial driver options
 #
 CONFIG_UART1_RINGINDICATOR=y
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
 # I2C driver options
@@ -253,9 +236,9 @@ CONFIG_NET_EMACRAM_SIZE=7296
 CONFIG_NET_NTXDESC=6
 CONFIG_NET_NRXDESC=6
 # CONFIG_NET_WOL is not set
-# CONFIG_NET_REGDEBUG is not set
 # CONFIG_NET_HASH is not set
 # CONFIG_LPC17_MULTICAST is not set
+CONFIG_LPC17_ETHERNET_HPWORK=y
 
 #
 # Architecture Options
@@ -268,6 +251,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -329,17 +313,15 @@ CONFIG_ARCH_BOARD="u-blox-c027"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -359,6 +341,7 @@ CONFIG_DISABLE_ENVIRON=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 CONFIG_CLOCK_MONOTONIC=y
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2016
 CONFIG_START_MONTH=1
@@ -457,6 +440,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 CONFIG_DEV_ZERO=y
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -472,12 +456,16 @@ CONFIG_DEV_ZERO=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -485,14 +473,26 @@ CONFIG_DEV_ZERO=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 CONFIG_MODEM=y
 CONFIG_MODEM_U_BLOX=y
@@ -512,7 +512,6 @@ CONFIG_NETDEV_MULTINIC=y
 CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NETDEV_STATISTICS is not set
 CONFIG_NETDEV_LATEINIT=y
-# CONFIG_NET_DUMPPACKET is not set
 
 #
 # External Ethernet MAC Device Support
@@ -520,10 +519,9 @@ CONFIG_NETDEV_LATEINIT=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -553,14 +551,14 @@ CONFIG_ETH1_PHY_NONE=y
 # CONFIG_ETH1_PHY_DP83848C is not set
 # CONFIG_ETH1_PHY_LAN8720 is not set
 # CONFIG_ETH1_PHY_DM9161 is not set
-# CONFIG_NETDEV_PHY_DEBUG is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -584,10 +582,6 @@ CONFIG_UART3_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 CONFIG_SERIAL_NPOLLWAITERS=2
@@ -595,7 +589,6 @@ CONFIG_SERIAL_IFLOWCONTROL=y
 CONFIG_SERIAL_OFLOWCONTROL=y
 # CONFIG_SERIAL_DMA is not set
 # CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS is not set
-# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_UART1_SERIAL_CONSOLE is not set
@@ -655,19 +648,26 @@ CONFIG_UART3_2STOP=0
 # CONFIG_UART3_IFLOWCONTROL is not set
 # CONFIG_UART3_OFLOWCONTROL is not set
 # CONFIG_UART3_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -675,17 +675,13 @@ CONFIG_UART3_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
-CONFIG_NET_TUN_MTU=296
-CONFIG_NET_TUN_TCP_RECVWNDO=256
 CONFIG_NET_GUARDSIZE=2
 
 #
@@ -696,6 +692,9 @@ CONFIG_NET_ETHERNET=y
 # CONFIG_NET_LOOPBACK is not set
 CONFIG_NET_TUN=y
 CONFIG_TUN_NINTERFACES=1
+CONFIG_NET_TUN_MTU=296
+CONFIG_NET_TUN_TCP_RECVWNDO=256
+CONFIG_TUN_HPWORK=y
 
 #
 # Network Device Operations
@@ -736,7 +735,6 @@ CONFIG_NET_MAX_LISTENPORTS=8
 CONFIG_NET_TCP_READAHEAD=y
 CONFIG_NET_TCP_WRITE_BUFFERS=y
 CONFIG_NET_TCP_NWRBCHAINS=8
-# CONFIG_NET_TCP_WRBUFFER_DEBUG is not set
 CONFIG_NET_TCP_RECVDELAY=0
 CONFIG_NET_TCPBACKLOG=y
 # CONFIG_NET_SENDFILE is not set
@@ -772,7 +770,6 @@ CONFIG_NET_ARP_MAXAGE=120
 CONFIG_NET_ARP_SEND=y
 CONFIG_ARP_SEND_MAXTRIES=5
 CONFIG_ARP_SEND_DELAYMSEC=20
-# CONFIG_NET_ARP_DUMP is not set
 
 #
 # Network I/O Buffer Support
@@ -782,7 +779,6 @@ CONFIG_IOB_NBUFFERS=24
 CONFIG_IOB_BUFSIZE=196
 CONFIG_IOB_NCHAINS=8
 CONFIG_IOB_THROTTLE=8
-# CONFIG_IOB_DEBUG is not set
 # CONFIG_NET_ARCH_INCR32 is not set
 # CONFIG_NET_ARCH_CHKSUM is not set
 CONFIG_NET_STATISTICS=y
@@ -818,7 +814,9 @@ CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_NFS is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
@@ -837,12 +835,6 @@ CONFIG_FS_PROCFS=y
 # CONFIG_FS_PROCFS_EXCLUDE_NET is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -861,6 +853,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -886,6 +882,8 @@ CONFIG_NUNGET_CHARS=2
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -903,7 +901,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -918,8 +917,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -944,6 +945,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BRIDGE is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 CONFIG_EXAMPLES_CHAT=y
 CONFIG_EXAMPLES_CHAT_TTY_DEVNODE="/dev/ttyS1"
 CONFIG_EXAMPLES_CHAT_TIMEOUT_SECONDS=20
@@ -953,17 +955,17 @@ CONFIG_EXAMPLES_CHAT_PRESET1="\"\" AT+UPSDA=0,3 OK AT+UPSND=0,8 OK AT+UPSND=0,0
 CONFIG_EXAMPLES_CHAT_PRESET2="\"\" AT+USOCR=6 OK AT+USOCO=0,\\\"195.34.89.241\\\",7 PAUSE 10 OK AT+USORD=0,32 u-blox \\c"
 CONFIG_EXAMPLES_CHAT_PRESET3="\"\" AT+USOWR=0,5,\\\"NuttX\\\" PAUSE 10 OK AT+USORD=0,5 NuttX AT+USOCL=0"
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -973,36 +975,36 @@ CONFIG_EXAMPLES_CHAT_PRESET3="\"\" AT+USOWR=0,5,\\\"NuttX\\\" PAUSE 10 OK AT+USO
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-CONFIG_EXAMPLES_PPPD=y
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_RGMP is not set
+CONFIG_EXAMPLES_PPPD=y
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
 #
@@ -1011,6 +1013,11 @@ CONFIG_EXAMPLES_PPPD=y
 # CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_FSUTILS_PASSWD is not set
 
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -1022,8 +1029,9 @@ CONFIG_EXAMPLES_PPPD=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1037,23 +1045,24 @@ CONFIG_NETUTILS_CHAT=y
 # CONFIG_NETUTILS_CODECS is not set
 CONFIG_NETUTILS_DHCPC=y
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+CONFIG_NETUTILS_PPPD=y
+CONFIG_NETUTILS_PPPD_STACKSIZE=2048
+CONFIG_NETUTILS_PPPD_PAP=y
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/7.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-CONFIG_NETUTILS_PPPD=y
-CONFIG_NETUTILS_PPPD_STACKSIZE=2048
-CONFIG_NETUTILS_PPPD_PAP=y
 
 #
 # NSH Library
@@ -1079,6 +1088,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
 # CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
@@ -1105,13 +1115,13 @@ CONFIG_NSH_BUILTIN_APPS=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1129,6 +1139,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1156,10 +1167,10 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 CONFIG_NSH_NETINIT_THREAD=y
 CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568
 CONFIG_NSH_NETINIT_THREAD_PRIORITY=80
-# CONFIG_NSH_NETINIT_DEBUG is not set
 
 #
 # IP Address Configuration
@@ -1209,13 +1220,13 @@ CONFIG_NSH_LOGIN_FAILCOUNT=3
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 CONFIG_SYSTEM_CLE=y
 CONFIG_SYSTEM_CLE_DEBUGLEVEL=0
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1224,10 +1235,11 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 CONFIG_SYSTEM_UBLOXMODEM=y
 CONFIG_SYSTEM_UBLOXMODEM_TTY_DEVNODE="/dev/ttyS1"
 CONFIG_SYSTEM_UBLOXMODEM_DEVNODE="/dev/ubxmdm"
+# CONFIG_SYSTEM_VI is not set
 CONFIG_SYSTEM_ZMODEM=y
 CONFIG_SYSTEM_ZMODEM_DEVNAME="/dev/console"
 CONFIG_SYSTEM_ZMODEM_RCVBUFSIZE=512
diff --git a/configs/u-blox-c027/src/Makefile b/configs/u-blox-c027/src/Makefile
index 844046486e37f3fb20ba0878ca36625557a86134..e76c00febd438d343bb2b4c52b9b28776f70eb65 100644
--- a/configs/u-blox-c027/src/Makefile
+++ b/configs/u-blox-c027/src/Makefile
@@ -36,12 +36,20 @@
 -include $(TOPDIR)/Make.defs
 
 ASRCS =
-CSRCS = lpc17_boot.c lpc17_leds.c lpc17_ssp.c lpc17_adc.c lpc17_dac.c lpc17_pwm.c
+CSRCS = lpc17_boot.c lpc17_leds.c lpc17_ssp.c lpc17_dac.c
 
 ifeq ($(CONFIG_LIB_BOARDCTL),y)
 CSRCS += lpc17_appinit.c
 endif
 
+ifeq ($(CONFIG_PWM),y)
+CSRCS += lpc17_pwm.c
+endif
+
+ifeq ($(CONFIG_ADC),y)
+CSRCS += lpc17_adc.c
+endif
+
 ifeq ($(CONFIG_MODEM_U_BLOX),y)
 CSRCS += lpc17_ubxmdm.c
 endif
diff --git a/configs/u-blox-c027/src/lpc17_adc.c b/configs/u-blox-c027/src/lpc17_adc.c
index 9d620f84c69357495d4d1c53d3d1414812457e98..0321cda7e7c8fdd6d4efc7ac0bed29de0086a09a 100644
--- a/configs/u-blox-c027/src/lpc17_adc.c
+++ b/configs/u-blox-c027/src/lpc17_adc.c
@@ -8,7 +8,7 @@
  *
  * which, in turn, was based on configs/stm3220g-eval/src/lpc17_adc.c
  *
- *   Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -66,15 +66,14 @@
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_adc_setup
+ * Name: lpc17_adc_setup
  *
  * Description:
- *   All LPC17 architectures must provide the following interface to work with
- *   examples/adc.
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
-int board_adc_setup(void)
+int lpc17_adc_setup(void)
 {
   static bool initialized = false;
   struct adc_dev_s *adc;
@@ -89,7 +88,7 @@ int board_adc_setup(void)
       adc = lpc17_adcinitialize();
       if (adc == NULL)
         {
-          adbg("ERROR: Failed to get ADC interface\n");
+          aerr("ERROR: Failed to get ADC interface\n");
           return -ENODEV;
         }
 
@@ -98,7 +97,7 @@ int board_adc_setup(void)
       ret = adc_register("/dev/adc0", adc);
       if (ret < 0)
         {
-          adbg("adc_register failed: %d\n", ret);
+          aerr("ERROR: adc_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/u-blox-c027/src/lpc17_appinit.c b/configs/u-blox-c027/src/lpc17_appinit.c
index f315953dfb9dfd632e2f6b3f23d8b9645f5cfc4a..30c6d271617940e9375b0d5b76f77d3a5bb7207c 100644
--- a/configs/u-blox-c027/src/lpc17_appinit.c
+++ b/configs/u-blox-c027/src/lpc17_appinit.c
@@ -195,5 +195,28 @@ int board_app_initialize(uintptr_t arg)
   syslog(LOG_INFO, "Successfuly bound SSP port %d to MMC/SD slot %d\n",
          CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO);
 #endif
+
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device. */
+
+  ret = lpc17_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: lpc17_pwm_setup() failed: %d\n", ret);
+      return ret;
+    }
+#endif
+
+#ifdef CONFIG_ADC
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = lpc17_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: lpc17_adc_setup failed: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
   return OK;
 }
diff --git a/configs/u-blox-c027/src/lpc17_dac.c b/configs/u-blox-c027/src/lpc17_dac.c
index 91c1585f058f006b4bd1bd94957a7e1e5e3913a5..c1924c2f309c2d94d022bd89942f77b34aabf0ed 100644
--- a/configs/u-blox-c027/src/lpc17_dac.c
+++ b/configs/u-blox-c027/src/lpc17_dac.c
@@ -85,14 +85,14 @@ int dac_devinit(void)
       dac = lpc17_dacinitialize();
       if (dac == NULL)
         {
-          adbg("ERROR: Failed to get dac interface\n");
+          aerr("ERROR: Failed to get dac interface\n");
           return -ENODEV;
         }
 
       ret = dac_register("/dev/dac0", dac);
       if (ret < 0)
         {
-          adbg("dac_register failed: %d\n", ret);
+          aerr("ERROR: dac_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/u-blox-c027/src/lpc17_leds.c b/configs/u-blox-c027/src/lpc17_leds.c
index 5987d6f66ec44a8be8bb2961d577306b98e8d1e0..d29fe996dd915d8417b324ee6b3dd6d99fca5c8c 100644
--- a/configs/u-blox-c027/src/lpc17_leds.c
+++ b/configs/u-blox-c027/src/lpc17_leds.c
@@ -52,26 +52,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
diff --git a/configs/u-blox-c027/src/lpc17_pwm.c b/configs/u-blox-c027/src/lpc17_pwm.c
index d5d4bb506cea2375562b317a28a474882d488c80..3c4630d0f220dddfd75ce2d3f013d1b6ba6a8959 100644
--- a/configs/u-blox-c027/src/lpc17_pwm.c
+++ b/configs/u-blox-c027/src/lpc17_pwm.c
@@ -44,7 +44,7 @@
 #include 
 
 #include 
-#include 
+#include 
 
 #include 
 
@@ -64,24 +64,19 @@ FAR struct pwm_lowerhalf_s *lpc17_pwminitialize(int timer);
 FAR struct pwm_lowerhalf_s *lpc17_mcpwminitialize(int timer);
 FAR struct pwm_lowerhalf_s *lpc17_timerinitialize(int timer);
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_pwm_setup
+ * Name: lpc17_pwm_setup
  *
  * Description:
- *   All LPC17 architectures must provide the following interface to work with
- *   examples/pwm.
+ *   Initialize PWM and register the PWM device.
  *
  ************************************************************************************/
 
-int board_pwm_setup(void)
+int lpc17_pwm_setup(void)
 {
   static bool initialized = false;
   struct pwm_lowerhalf_s *pwm;
@@ -98,7 +93,7 @@ int board_pwm_setup(void)
       pwm = lpc17_pwminitialize(0);
       if (!pwm)
         {
-          adbg("Failed to get the LPC17XX PWM lower half\n");
+          aerr("ERROR: Failed to get the LPC17XX PWM lower half\n");
           return -ENODEV;
         }
 
@@ -107,14 +102,14 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/pwm0", pwm);
       if (ret < 0)
         {
-          adbg("pwm_register failed: %d\n", ret);
+          aerr("ERROR: pwm_register failed: %d\n", ret);
           return ret;
         }
 
       mcpwm = lpc17_mcpwminitialize(0);
       if (!mcpwm)
         {
-          adbg("Failed to get the LPC17XX MOTOR PWM lower half\n");
+          aerr("ERROR: Failed to get the LPC17XX MOTOR PWM lower half\n");
           return -ENODEV;
         }
 
@@ -123,14 +118,14 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/mcpwm0", mcpwm);
       if (ret < 0)
         {
-          adbg("mcpwm_register failed: %d\n", ret);
+          aerr("ERROR: mcpwm_register failed: %d\n", ret);
           return ret;
         }
 
       timer = lpc17_timerinitialize(0);
       if (!timer)
         {
-          adbg("Failed to get the LPC17XX TIMER lower half\n");
+          aerr("ERROR: Failed to get the LPC17XX TIMER lower half\n");
           return -ENODEV;
         }
 
@@ -139,7 +134,7 @@ int board_pwm_setup(void)
       ret = pwm_register("/dev/timer0", timer);
       if (ret < 0)
         {
-          adbg("timer_register failed: %d\n", ret);
+          aerr("ERROR: timer_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/u-blox-c027/src/lpc17_ssp.c b/configs/u-blox-c027/src/lpc17_ssp.c
index 640732aa471ba1318b4bd03f05fe99ce01fb6c0c..7090bcbb313efc4adb254a3fbf2602a35730a926 100644
--- a/configs/u-blox-c027/src/lpc17_ssp.c
+++ b/configs/u-blox-c027/src/lpc17_ssp.c
@@ -58,27 +58,9 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SSP_DEBUG   /* Define to enable debug */
-#undef SSP_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SSP_DEBUG
-#  define sspdbg  lldbg
-#  ifdef SSP_VERBOSE
-#    define sspvdbg lldbg
-#  else
-#    define sspvdbg(x...)
-#  endif
-#else
-#  undef SSP_VERBOSE
-#  define sspdbg(x...)
-#  define sspvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#ifdef SSP_VERBOSE
+#ifdef CONFIG_DEBUG_GPIO_INFO
 #  define ssp_dumpgpio(m) lpc17_dumpgpio(SDCCS_GPIO, m)
 #else
 #  define ssp_dumpgpio(m)
@@ -140,7 +122,7 @@ void weak_function c027_sspdev_initialize(void)
 #ifdef CONFIG_LPC17_SSP0
 void  lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
   ssp_dumpgpio("lpc17_ssp0select() Entry");
 
 #warning "Assert CS here (false)"
@@ -150,7 +132,7 @@ void  lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
 
 uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  sspdbg("Returning SPI_STATUS_PRESENT\n");
+  spiinfo("Returning SPI_STATUS_PRESENT\n");
   return SPI_STATUS_PRESENT;
 }
 #endif
@@ -158,7 +140,7 @@ uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_LPC17_SSP1
 void  lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
   ssp_dumpgpio("lpc17_ssp1select() Entry");
 
   if (devid == SPIDEV_MMCSD)
@@ -186,12 +168,12 @@ uint8_t lpc17_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 
       if (lpc17_gpioread(C027_SD_CD) == 0)
         {
-          sspdbg("Returning SPI_STATUS_PRESENT\n");
+          spiinfo("Returning SPI_STATUS_PRESENT\n");
           return SPI_STATUS_PRESENT;
         }
     }
 
-  sspdbg("Returning zero\n");
+  spiinfo("Returning zero\n");
   return 0;
 }
 #endif
diff --git a/configs/u-blox-c027/src/lpc17_ubxmdm.c b/configs/u-blox-c027/src/lpc17_ubxmdm.c
index a6615e54aa65f44180b0e49c13bf27dbca18428c..183e076ec40ad7ea89c2a901634cccb92d169b16 100644
--- a/configs/u-blox-c027/src/lpc17_ubxmdm.c
+++ b/configs/u-blox-c027/src/lpc17_ubxmdm.c
@@ -62,15 +62,11 @@
 /* Non-standard debug that may be enabled just for testing the modem driver */
 
 #ifdef CONFIG_MODEM_U_BLOX_DEBUG
-#  define m_dbg    dbg
-#  define m_vdbg   vdbg
-#  define m_vlldbg  lldbg
-#  define m_vllvdbg llvdbg
+#  define m_err     _err
+#  define m_info    _info
 #else
-#  define m_dbg(x...)
-#  define m_vdbg(x...)
-#  define m_lldbg(x...)
-#  define m_llvdbg(x...)
+#  define m_err(x...)
+#  define m_info(x...)
 #endif
 
 #define UBXMDM_REGISTER_COUNT                           \
diff --git a/configs/u-blox-c027/src/u-blox-c027.h b/configs/u-blox-c027/src/u-blox-c027.h
index 577bf4179056c4c2f273b635b5bc73ab36e93d5f..edeb43dbe1025683d46e5d2212b10506de8c5205 100644
--- a/configs/u-blox-c027/src/u-blox-c027.h
+++ b/configs/u-blox-c027/src/u-blox-c027.h
@@ -50,7 +50,7 @@
 #define C027_LED (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT3 | GPIO_PIN25)
 
 #define C027_SD_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN2)
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
 #  define C027_SD_CD (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN11)
 #else
 #  define C027_SD_CD (GPIO_INPUT   | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN11)
@@ -90,14 +90,41 @@
 
 void weak_function c027_sspdev_initialize(void);
 
-#if defined(CONFIG_MODEM_U_BLOX)
+/************************************************************************************
+ * Name: lpc17_ubxmdm_init
+ *
+ * Description:
+ *   Initialisation function for the u-blox modem.
+ *
+ ************************************************************************************/
 
-/*
- * Initialisation function for the u-blox modem.
- */
+#if defined(CONFIG_MODEM_U_BLOX)
 void lpc17_ubxmdm_init(bool usb_used);
-
 #endif /* CONFIG_MODEM_U_BLOX */
 
+/************************************************************************************
+ * Name: lpc17_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PWM
+int lpc17_pwm_setup(void);
+#endif
+
+/************************************************************************************
+ * Name: lpc17_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ADC
+int lpc17_adc_setup(void);
+#endif
+
 #endif /* __ASSEMBLY__ */
 #endif /* __CONFIGS_U_BLOX_C027_SRC_U_BLOX_C027_H */
diff --git a/configs/ubw32/nsh/Make.defs b/configs/ubw32/nsh/Make.defs
index 236169bdca8474c5bb82e015bca61c2bde9cf9fe..27398b70bccde17ed8e13821a9145fd4318b765e 100644
--- a/configs/ubw32/nsh/Make.defs
+++ b/configs/ubw32/nsh/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/ubw32/nsh/defconfig b/configs/ubw32/nsh/defconfig
index b6ec91adbca271103b80397d1561b5b2c8ff7ba1..4cb1e3f3273a5e11d971fb60c2526056d3466b6e 100644
--- a/configs/ubw32/nsh/defconfig
+++ b/configs/ubw32/nsh/defconfig
@@ -41,13 +41,15 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -61,8 +63,7 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 CONFIG_ARCH_MIPS=y
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -266,12 +267,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
 # CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
@@ -315,6 +318,8 @@ CONFIG_RAM_SIZE=32768
 # CONFIG_ARCH_BOARD_PCBLOGICPIC32MX is not set
 CONFIG_ARCH_BOARD_UBW32=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD_CUSTOM_DIR="configs/dummy"
+CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD="ubw32"
 
 #
@@ -325,16 +330,14 @@ CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
 CONFIG_ARCH_HAVE_IRQBUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -371,6 +374,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=0
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -421,9 +425,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -454,6 +459,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
@@ -471,7 +477,26 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -480,15 +505,17 @@ CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_HAVECARDDETECT is not set
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -512,14 +539,11 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART1_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -536,19 +560,23 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -582,20 +610,17 @@ CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -614,6 +639,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -658,11 +687,14 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -681,23 +713,27 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -705,33 +741,45 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -744,30 +792,28 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -787,6 +833,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
@@ -795,6 +842,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -803,8 +851,10 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -823,12 +873,16 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
 
 #
 # Configure Command Options
@@ -851,6 +905,8 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 CONFIG_NSH_ARCHINIT=y
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -864,15 +920,19 @@ CONFIG_NSH_ARCHINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/ubw32/src/pic32_buttons.c b/configs/ubw32/src/pic32_buttons.c
index 290832c3690b8d8c2dc89a88f77cf9340ff897dd..f612e1eea4b9fb6e14417b956e6f8d63c363430a 100644
--- a/configs/ubw32/src/pic32_buttons.c
+++ b/configs/ubw32/src/pic32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/ubw32/src/pic32_buttons.c
  *
- *   Copyright (C) 2012, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -41,6 +41,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -166,9 +167,7 @@ uint8_t board_buttons(void)
  *   board_button_irq() may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
- *   BUTTON_* definitions in board.h for the meaning of enumeration value.  The
- *   previous interrupt handler address is returned (so that it may restored, if
- *   so desired).
+ *   BUTTON_* definitions in board.h for the meaning of enumeration value.
  *
  *   Interrupts are automatically enabled when the button handler is attached and
  *   automatically disabled when the button handler is detached.
@@ -181,21 +180,21 @@ uint8_t board_buttons(void)
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   if (id < NUM_BUTTONS)
     {
       pic32mx_gpioirqdisable(g_buttoncn[id]);
-      oldhandler = pic32mx_gpioattach(g_buttonset[id], g_buttoncn[id], irqhandler);
-      if (irqhandler)
+      ret = pic32mx_gpioattach(g_buttonset[id], g_buttoncn[id], irqhandler, arg);
+      if (ret >= 0)
         {
           pic32mx_gpioirqenable(g_buttoncn[id]);
         }
     }
 
-  return oldhandler;
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/ubw32/src/pic32_leds.c b/configs/ubw32/src/pic32_leds.c
index a4884c2d33da031ea75edafff2811eaeca2a7019..cc7dd9a0ee64fb374c3f3419c1c3e0bc00c75bb6 100644
--- a/configs/ubw32/src/pic32_leds.c
+++ b/configs/ubw32/src/pic32_leds.c
@@ -95,22 +95,6 @@
 #  define LED_NC  2
 #endif
 
-/* Debug ********************************************************************/
-
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_LEDS)
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  undef CONFIG_DEBUG_LEDS
-#  undef CONFIG_DEBUG_VERBOSE
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private types
  ****************************************************************************/
diff --git a/configs/us7032evb1/README.txt b/configs/us7032evb1/README.txt
index 7a94b1af06c2cf5f872e0f9fa99e2f339d1b00c7..15efbddfe0003139768dbdc800942748f7e080c8 100644
--- a/configs/us7032evb1/README.txt
+++ b/configs/us7032evb1/README.txt
@@ -110,9 +110,9 @@ specific to the SH-1
 Architecture selection
 
   CONFIG_ARCH - identifies the arch subdirectory and, hence, the
-    processor architecture.  This should be sh (for arch/sh)
+    processor architecture.  This should be renesas (for arch/renesas)
   CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory.
-    This should be sh1 (for arch/sh/src/sh1 and arch/sh/include/sh1)
+    This should be sh1 (for arch/renesas/src/sh1 and arch/renesas/include/sh1)
   CONFIG_ARCH_SH1 and CONFIG_ARCH_CHIP_SH7032 - for use in C code.  These
     identify the particular chip or SoC that the architecture is
     implemented in.
diff --git a/configs/us7032evb1/nsh/defconfig b/configs/us7032evb1/nsh/defconfig
index e18cd49cc8c2c05c78c14523cbe464c7cd135f66..82a725a488f175896ba5e1652cde3468fbd39a6f 100644
--- a/configs/us7032evb1/nsh/defconfig
+++ b/configs/us7032evb1/nsh/defconfig
@@ -38,7 +38,7 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
@@ -53,13 +53,12 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-CONFIG_ARCH_SH=y
+CONFIG_ARCH_RENESAS=y
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
-CONFIG_ARCH="sh"
+CONFIG_ARCH="renesas"
 CONFIG_ARCH_CHIP="sh1"
 CONFIG_ARCH_CHIP_SH7032=y
 # CONFIG_ARCH_CHIP_M30262F8 is not set
@@ -239,7 +238,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 # CONFIG_16550_UART is not set
@@ -322,7 +320,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # System Logging
 #
 
-# CONFIG_SYSLOG is not set
 
 #
 # Graphics Support
@@ -360,7 +357,7 @@ CONFIG_MM_REGIONS=1
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 CONFIG_LIB_HOMEDIR="/"
@@ -381,7 +378,6 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Non-standard Library Support
@@ -440,7 +436,6 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
diff --git a/configs/us7032evb1/ostest/defconfig b/configs/us7032evb1/ostest/defconfig
index 7490f982d79e7416af4cc914f083f076fb4230bf..2b025f8ccec795b2081fa93dca98fb51bb423f6a 100644
--- a/configs/us7032evb1/ostest/defconfig
+++ b/configs/us7032evb1/ostest/defconfig
@@ -38,7 +38,7 @@ CONFIG_RAW_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
@@ -53,13 +53,12 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-CONFIG_ARCH_SH=y
+CONFIG_ARCH_RENESAS=y
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
-CONFIG_ARCH="sh"
+CONFIG_ARCH="renesas"
 CONFIG_ARCH_CHIP="sh1"
 CONFIG_ARCH_CHIP_SH7032=y
 # CONFIG_ARCH_CHIP_M30262F8 is not set
@@ -182,7 +181,7 @@ CONFIG_USER_ENTRYPOINT="ostest_main"
 CONFIG_DISABLE_OS_API=y
 CONFIG_DISABLE_POSIX_TIMERS=y
 CONFIG_DISABLE_PTHREAD=y
-CONFIG_DISABLE_SIGNALS=y
+# CONFIG_DISABLE_SIGNALS is not set
 CONFIG_DISABLE_MQUEUE=y
 CONFIG_DISABLE_ENVIRON=y
 
@@ -238,7 +237,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
 # CONFIG_16550_UART is not set
@@ -320,7 +318,6 @@ CONFIG_DISABLE_MOUNTPOINT=y
 # System Logging
 #
 
-# CONFIG_SYSLOG is not set
 
 #
 # Graphics Support
@@ -357,7 +354,7 @@ CONFIG_MM_REGIONS=1
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -377,7 +374,6 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Non-standard Library Support
@@ -441,7 +437,6 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
diff --git a/configs/us7032evb1/shterm/shterm.c b/configs/us7032evb1/shterm/shterm.c
index 83284d493b95c82d7f1f32e7cd6b02d73e1cbe85..8b70d71301bfbec3be78fa06e1a669c608b43c40 100644
--- a/configs/us7032evb1/shterm/shterm.c
+++ b/configs/us7032evb1/shterm/shterm.c
@@ -62,8 +62,8 @@
 
 #define DEFAULT_BAUD 9600
 
-#define dbg(format, ...)  if (debug > 0) printconsole(format, ##__VA_ARGS__)
-#define vdbg(format, ...) if (debug > 1) printconsole(format, ##__VA_ARGS__)
+#define  _err(format, ...)  if (debug > 0) printconsole(format, ##__VA_ARGS__)
+#define _info(format, ...) if (debug > 1) printconsole(format, ##__VA_ARGS__)
 
 /****************************************************************************
  * Private Types
diff --git a/configs/viewtool-stm32f107/README.txt b/configs/viewtool-stm32f107/README.txt
index 509a476170216a4e149ab9dfb7455515f41da678..04ff1afbb2a30a93ec8f4712cba72453c916759e 100644
--- a/configs/viewtool-stm32f107/README.txt
+++ b/configs/viewtool-stm32f107/README.txt
@@ -365,7 +365,6 @@ ViewTool DP83848 Ethernet Module
 
     Networking (required)
       CONFIG_NET=y                           : Enabled networking support
-      CONFIG_NET_MULTIBUFFER=y               : Required by driver
       CONFIG_NSH_NOMAC=y
 
     Networking (recommended/typical)
@@ -766,8 +765,8 @@ Configurations
           debug output on USART1 can be enabled with:
 
           Build Setup:
-            CONFIG_DEBUG=y                     : Enable debug features
-            CONFIG_DEBUG_VERBOSE=y             : Enable verbose debug output
+            CONFIG_DEBUG_FEATURES=y            : Enable debug features
+            CONFIG_DEBUG_INFO=y                : Enable verbose debug output
             CONFIG_DEBUG_INPUT=y               : Enable debug output from input devices
 
        STATUS: Working
diff --git a/configs/viewtool-stm32f107/highpri/Make.defs b/configs/viewtool-stm32f107/highpri/Make.defs
index 485e163139d427d41b17ecd1db1d582059fb5767..ba912c3b509fa82bb779ef3e9bdf0fc802bd94a4 100644
--- a/configs/viewtool-stm32f107/highpri/Make.defs
+++ b/configs/viewtool-stm32f107/highpri/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/viewtool-stm32f107/highpri/defconfig b/configs/viewtool-stm32f107/highpri/defconfig
index 0fcfc13a51b96523e00f26f69e3326e0493c5014..62cfe0076ed412ee8d5764b9e154ed82403f1b5b 100644
--- a/configs/viewtool-stm32f107/highpri/defconfig
+++ b/configs/viewtool-stm32f107/highpri/defconfig
@@ -46,10 +46,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +65,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +80,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -207,6 +210,7 @@ CONFIG_ARCH_CHIP_STM32F103VC=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 # CONFIG_ARCH_CHIP_STM32F107VC is not set
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -354,6 +358,12 @@ CONFIG_STM32_HAVE_ADC3=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 # CONFIG_STM32_HAVE_CAN2 is not set
 CONFIG_STM32_HAVE_DAC1=y
@@ -416,6 +426,12 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
@@ -427,9 +443,17 @@ CONFIG_STM32_SERIALDRIVER=y
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -533,6 +557,7 @@ CONFIG_ARCH_BUTTONS=y
 CONFIG_VIEWTOOL_HIGHPRI=y
 CONFIG_VIEWTOOL_TIM6_FREQUENCY=36000000
 CONFIG_VIEWTOOL_TIM6_PERIOD=36000
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -548,9 +573,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=12
@@ -648,6 +676,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -663,12 +692,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -676,8 +709,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -685,6 +728,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -693,9 +737,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -742,19 +787,26 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -791,12 +843,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -846,6 +892,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -861,7 +909,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -869,8 +916,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -890,18 +939,18 @@ CONFIG_ARCH_HAVE_TLS=y
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -910,20 +959,18 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
@@ -935,9 +982,9 @@ CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -959,8 +1006,9 @@ CONFIG_ARCH_HAVE_TLS=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -994,16 +1042,17 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/viewtool-stm32f107/include/board-stm32f103vct6.h b/configs/viewtool-stm32f107/include/board-stm32f103vct6.h
index 54731ecf726e6289d0567a34262a698f98eb3e1d..a1e40a9bd26567ea8e72c246ca353524c9d32a0f 100644
--- a/configs/viewtool-stm32f107/include/board-stm32f103vct6.h
+++ b/configs/viewtool-stm32f107/include/board-stm32f103vct6.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/viewtool-stm32f107/include/board-stm32f103vct6.h
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -93,14 +93,14 @@
 #define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd2
 #define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
 
-/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */
+/* APB1 timers 2-7 will be twice PCLK1 */
 
 #define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM5_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM6_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM7_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 
 /* USB divider -- Divide PLL clock by 1.5
  *
@@ -113,8 +113,14 @@
  * otherwise frequency is 2xAPBx.
  * Note: TIM1,8 are on APB2, others on APB1 */
 
-#define STM32_TIM18_FREQUENCY   STM32_HCLK_FREQUENCY
-#define STM32_TIM27_FREQUENCY   STM32_HCLK_FREQUENCY
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM3_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM4_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM5_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM6_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM7_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM8_FREQUENCY    STM32_HCLK_FREQUENCY
 
 /************************************************************************************
  * Public Data
diff --git a/configs/viewtool-stm32f107/include/board-stm32f107vct6.h b/configs/viewtool-stm32f107/include/board-stm32f107vct6.h
index 1c200a133e84d12a78ad625f81c361a6a8f8fc76..7f5088f2c12a99262ad149533812bfb16a4ad3fb 100644
--- a/configs/viewtool-stm32f107/include/board-stm32f107vct6.h
+++ b/configs/viewtool-stm32f107/include/board-stm32f107vct6.h
@@ -97,14 +97,14 @@
 #define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd2
 #define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
 
-/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */
+/* APB1 timers 2-7 will be twice PCLK1 */
 
 #define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 #define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM5_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM6_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM7_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
 
 /* USB divider -- Divide PLL clock by 1.5
  *
diff --git a/configs/viewtool-stm32f107/include/board.h b/configs/viewtool-stm32f107/include/board.h
index 242feeb67ae213acb2d6ada35566b9bdb931246c..2fea6a29daebe6447b242bfd1e439008e7cdb031 100644
--- a/configs/viewtool-stm32f107/include/board.h
+++ b/configs/viewtool-stm32f107/include/board.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/viewtool-stm32f107/include/board.h
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/configs/viewtool-stm32f107/netnsh/Make.defs b/configs/viewtool-stm32f107/netnsh/Make.defs
index d36b783357972afac0817a01c115177cf3168be7..0a39dda71c7bca5057eda66cbb00b92600df376e 100644
--- a/configs/viewtool-stm32f107/netnsh/Make.defs
+++ b/configs/viewtool-stm32f107/netnsh/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/viewtool-stm32f107/netnsh/defconfig b/configs/viewtool-stm32f107/netnsh/defconfig
index f6f1b6b4d1d4d3e5179a0faf2a36f334f336ef16..1c5bd509b69e60483ab21225fb0d534183522705 100644
--- a/configs/viewtool-stm32f107/netnsh/defconfig
+++ b/configs/viewtool-stm32f107/netnsh/defconfig
@@ -46,10 +46,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +65,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +80,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -207,6 +210,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 CONFIG_ARCH_CHIP_STM32F107VC=y
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -337,7 +341,7 @@ CONFIG_STM32_HAVE_TIM4=y
 CONFIG_STM32_HAVE_TIM5=y
 CONFIG_STM32_HAVE_TIM6=y
 CONFIG_STM32_HAVE_TIM7=y
-CONFIG_STM32_HAVE_TIM8=y
+# CONFIG_STM32_HAVE_TIM8 is not set
 # CONFIG_STM32_HAVE_TIM9 is not set
 # CONFIG_STM32_HAVE_TIM10 is not set
 # CONFIG_STM32_HAVE_TIM11 is not set
@@ -354,6 +358,12 @@ CONFIG_STM32_HAVE_ADC2=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -386,6 +396,7 @@ CONFIG_STM32_PWR=y
 # CONFIG_STM32_SPI1 is not set
 # CONFIG_STM32_SPI2 is not set
 # CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SYSCFG=y
 # CONFIG_STM32_TIM1 is not set
 # CONFIG_STM32_TIM2 is not set
 # CONFIG_STM32_TIM3 is not set
@@ -393,7 +404,6 @@ CONFIG_STM32_PWR=y
 # CONFIG_STM32_TIM5 is not set
 # CONFIG_STM32_TIM6 is not set
 # CONFIG_STM32_TIM7 is not set
-# CONFIG_STM32_TIM8 is not set
 CONFIG_STM32_USART1=y
 # CONFIG_STM32_USART2 is not set
 # CONFIG_STM32_USART3 is not set
@@ -415,20 +425,33 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
 # CONFIG_STM32_TIM5_CAP is not set
-# CONFIG_STM32_TIM8_CAP is not set
 CONFIG_STM32_USART=y
 CONFIG_STM32_SERIALDRIVER=y
 
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -453,6 +476,7 @@ CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 CONFIG_STM32_RMII=y
 # CONFIG_STM32_RMII_MCO is not set
 CONFIG_STM32_RMII_EXTCLK=y
+CONFIG_STM32_ETHMAC_HPWORK=y
 
 #
 # USB FS Host Configuration
@@ -534,6 +558,7 @@ CONFIG_RAM_SIZE=65536
 # CONFIG_ARCH_BOARD_CLOUDCTRL is not set
 # CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set
 # CONFIG_ARCH_BOARD_SHENZHOU is not set
+# CONFIG_ARCH_BOARD_STM32_BUTTERFLY2 is not set
 CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="viewtool-stm32f107"
@@ -545,11 +570,11 @@ CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 # CONFIG_ARCH_BUTTONS is not set
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -565,9 +590,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=9
@@ -665,6 +693,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -680,12 +709,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -693,8 +726,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -702,6 +745,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -725,10 +769,9 @@ CONFIG_TELNET_TXBUFFER_SIZE=256
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -752,9 +795,10 @@ CONFIG_ETH0_PHY_DP83848C=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -801,19 +845,26 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -821,13 +872,11 @@ CONFIG_USART1_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-# CONFIG_NET_NOINTS is not set
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-CONFIG_NET_MULTIBUFFER=y
 CONFIG_NET_ETH_MTU=650
 CONFIG_NET_ETH_TCP_RECVWNDO=624
 CONFIG_NET_GUARDSIZE=2
@@ -963,12 +1012,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -1018,6 +1061,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -1033,7 +1078,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
@@ -1048,8 +1092,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -1073,18 +1119,20 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 #
 # Examples
 #
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -1094,26 +1142,25 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
@@ -1121,10 +1168,9 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
 #
@@ -1147,8 +1193,9 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1162,22 +1209,22 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CODECS is not set
 CONFIG_NETUTILS_DHCPC=y
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
@@ -1229,13 +1276,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1253,6 +1300,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1278,6 +1326,7 @@ CONFIG_NSH_CONSOLE=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 CONFIG_NSH_NETINIT_THREAD=y
 CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568
 CONFIG_NSH_NETINIT_THREAD_PRIORITY=80
@@ -1325,12 +1374,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1339,6 +1388,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/viewtool-stm32f107/nsh/Make.defs b/configs/viewtool-stm32f107/nsh/Make.defs
index 55c08e0406d2287c4c0fccdad03914c4bc14bce2..39eaa39e1786c013d36366a916528cdb7a8b37ff 100644
--- a/configs/viewtool-stm32f107/nsh/Make.defs
+++ b/configs/viewtool-stm32f107/nsh/Make.defs
@@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/viewtool-stm32f107/nsh/defconfig b/configs/viewtool-stm32f107/nsh/defconfig
index eac5f7d914713cd4e165c0be42bba54e8c22eb8a..ba1eeabe11023659b6d2c1775a6ed27ab8771943 100644
--- a/configs/viewtool-stm32f107/nsh/defconfig
+++ b/configs/viewtool-stm32f107/nsh/defconfig
@@ -46,10 +46,12 @@ CONFIG_INTELHEX_BINARY=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -63,10 +65,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -76,7 +80,6 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
@@ -207,6 +210,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
 # CONFIG_ARCH_CHIP_STM32F103VE is not set
 # CONFIG_ARCH_CHIP_STM32F103ZE is not set
 # CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
 CONFIG_ARCH_CHIP_STM32F107VC=y
 # CONFIG_ARCH_CHIP_STM32F205RG is not set
 # CONFIG_ARCH_CHIP_STM32F207IG is not set
@@ -337,7 +341,7 @@ CONFIG_STM32_HAVE_TIM4=y
 CONFIG_STM32_HAVE_TIM5=y
 CONFIG_STM32_HAVE_TIM6=y
 CONFIG_STM32_HAVE_TIM7=y
-CONFIG_STM32_HAVE_TIM8=y
+# CONFIG_STM32_HAVE_TIM8 is not set
 # CONFIG_STM32_HAVE_TIM9 is not set
 # CONFIG_STM32_HAVE_TIM10 is not set
 # CONFIG_STM32_HAVE_TIM11 is not set
@@ -354,6 +358,12 @@ CONFIG_STM32_HAVE_ADC2=y
 # CONFIG_STM32_HAVE_ADC2_DMA is not set
 # CONFIG_STM32_HAVE_ADC3_DMA is not set
 # CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
 CONFIG_STM32_HAVE_CAN1=y
 CONFIG_STM32_HAVE_CAN2=y
 CONFIG_STM32_HAVE_DAC1=y
@@ -386,6 +396,7 @@ CONFIG_STM32_PWR=y
 # CONFIG_STM32_SPI1 is not set
 # CONFIG_STM32_SPI2 is not set
 # CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SYSCFG=y
 # CONFIG_STM32_TIM1 is not set
 # CONFIG_STM32_TIM2 is not set
 # CONFIG_STM32_TIM3 is not set
@@ -393,7 +404,6 @@ CONFIG_STM32_PWR=y
 # CONFIG_STM32_TIM5 is not set
 # CONFIG_STM32_TIM6 is not set
 # CONFIG_STM32_TIM7 is not set
-# CONFIG_STM32_TIM8 is not set
 CONFIG_STM32_USART1=y
 # CONFIG_STM32_USART2 is not set
 # CONFIG_STM32_USART3 is not set
@@ -414,20 +424,33 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
 # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
 # CONFIG_STM32_FORCEPOWER is not set
 # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
 # CONFIG_STM32_TIM1_CAP is not set
 # CONFIG_STM32_TIM3_CAP is not set
 # CONFIG_STM32_TIM4_CAP is not set
 # CONFIG_STM32_TIM5_CAP is not set
-# CONFIG_STM32_TIM8_CAP is not set
 CONFIG_STM32_USART=y
 CONFIG_STM32_SERIALDRIVER=y
 
 #
 # U[S]ART Configuration
 #
+
+#
+# U[S]ART Device Configuration
+#
 CONFIG_STM32_USART1_SERIALDRIVER=y
 # CONFIG_STM32_USART1_1WIREDRIVER is not set
 # CONFIG_USART1_RS485 is not set
+
+#
+# Serial Driver Configuration
+#
 # CONFIG_SERIAL_DISABLE_REORDERING is not set
 # CONFIG_STM32_FLOWCONTROL_BROKEN is not set
 # CONFIG_STM32_USART_BREAKS is not set
@@ -515,6 +538,7 @@ CONFIG_RAM_SIZE=65536
 # CONFIG_ARCH_BOARD_CLOUDCTRL is not set
 # CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set
 # CONFIG_ARCH_BOARD_SHENZHOU is not set
+# CONFIG_ARCH_BOARD_STM32_BUTTERFLY2 is not set
 CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="viewtool-stm32f107"
@@ -526,11 +550,11 @@ CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
 CONFIG_ARCH_HAVE_BUTTONS=y
 CONFIG_ARCH_BUTTONS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -546,9 +570,12 @@ CONFIG_DISABLE_OS_API=y
 #
 # Clocks and Timers
 #
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2009
 CONFIG_START_MONTH=9
@@ -646,6 +673,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -661,12 +689,16 @@ CONFIG_DEV_NULL=y
 CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -674,8 +706,18 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
@@ -683,6 +725,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_USERLED is not set
 # CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -691,9 +734,10 @@ CONFIG_ARCH_HAVE_I2CRESET=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 # CONFIG_UART0_SERIALDRIVER is not set
@@ -740,19 +784,26 @@ CONFIG_USART1_2STOP=0
 # CONFIG_USART1_IFLOWCONTROL is not set
 # CONFIG_USART1_OFLOWCONTROL is not set
 # CONFIG_USART1_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -790,12 +841,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -845,6 +890,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -860,7 +907,6 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 CONFIG_ARCH_HAVE_TLS=y
 # CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
@@ -868,8 +914,10 @@ CONFIG_ARCH_HAVE_TLS=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -894,18 +942,18 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # Examples
 #
 # CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
 # CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -914,34 +962,33 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
 # CONFIG_EXAMPLES_PCA9635 is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
 # CONFIG_EXAMPLES_RGBLED is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
@@ -963,8 +1010,9 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1030,12 +1078,12 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
 # CONFIG_NSH_DISABLE_PWD is not set
@@ -1052,6 +1100,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -1089,12 +1138,12 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
@@ -1102,6 +1151,7 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_TEE is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/viewtool-stm32f107/src/stm32_appinit.c b/configs/viewtool-stm32f107/src/stm32_appinit.c
index 8bc77a200c160b55f6d782f66264b2dd0c0abc65..82e4ff85af40fdd18cb278f91f85ed1909ade4bc 100644
--- a/configs/viewtool-stm32f107/src/stm32_appinit.c
+++ b/configs/viewtool-stm32f107/src/stm32_appinit.c
@@ -95,7 +95,7 @@ static int rtc_driver_initialize(void)
   lower = stm32_rtc_lowerhalf();
   if (lower == NULL)
     {
-      sdbg("ERROR: Failed to instantiate the RTC lower-half driver\n");
+      serr("ERROR: Failed to instantiate the RTC lower-half driver\n");
       ret = -ENOMEM;
     }
   else
@@ -107,7 +107,7 @@ static int rtc_driver_initialize(void)
       ret = rtc_initialize(0, lower);
       if (ret < 0)
         {
-          sdbg("ERROR: Failed to bind/register the RTC driver: %d\n", ret);
+          serr("ERROR: Failed to bind/register the RTC driver: %d\n", ret);
         }
     }
 
@@ -146,17 +146,42 @@ static int rtc_driver_initialize(void)
 
 int board_app_initialize(uintptr_t arg)
 {
+  int ret;
+
 #ifdef HAVE_RTC_DRIVER
-  (void)rtc_driver_initialize();
+  ret = rtc_driver_initialize();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: rtc_driver_initialize failed: %d\n", ret);
+    }
+#endif
+
+#ifdef HAVE_MMCSD
+  ret = stm32_sdinitialize(CONFIG_NSH_MMCSDSLOTNO);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_sdinitialize failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_CAN
+  /* Initialize CAN and register the CAN driver. */
+
+  ret = stm32_can_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_can_setup failed: %d\n", ret);
+    }
 #endif
 
 #ifdef CONFIG_MPL115A
-  stm32_mpl115ainitialize("/dev/press");
+  ret = stm32_mpl115ainitialize("/dev/press");
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_mpl115ainitialize failed: %d\n", ret);
+    }
 #endif
 
-#ifdef HAVE_MMCSD
-  return stm32_sdinitialize(CONFIG_NSH_MMCSDSLOTNO);
-#else
+  UNUSED(ret);
   return OK;
-#endif
 }
diff --git a/configs/viewtool-stm32f107/src/stm32_buttons.c b/configs/viewtool-stm32f107/src/stm32_buttons.c
index cff85be4c6ea0ce7c73aecdb5262d8a1469b73df..9039e72e091cc0a23be485cc0390ef0f3a2c7953 100644
--- a/configs/viewtool-stm32f107/src/stm32_buttons.c
+++ b/configs/viewtool-stm32f107/src/stm32_buttons.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/viewtool-stm32f107/src/stm32_buttons.c
  *
- *   Copyright (C) 2013, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -49,13 +50,10 @@
 
 #ifdef CONFIG_ARCH_BUTTONS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
+
 /* Pin configuration for each STM3210E-EVAL button.  This array is indexed by
  * the BUTTON_* and JOYSTICK_* definitions in board.h
  */
@@ -65,10 +63,6 @@ static const uint32_t g_buttons[NUM_BUTTONS] =
   GPIO_SW2, GPIO_SW3, GPIO_SW4
 };
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -146,24 +140,23 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t oldhandler = NULL;
+  int ret = -EINVAL;
 
   /* The following should be atomic */
 
   if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
     {
-      oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler);
+      ret = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler, arg);
     }
 
-  return oldhandler;
+  return ret;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/viewtool-stm32f107/src/stm32_can.c b/configs/viewtool-stm32f107/src/stm32_can.c
index c6d0616ee3f31cbfab54aa09dc803dee6ba7d829..462e5a72ba84d4cbccd69de1525f7fe2715727b8 100644
--- a/configs/viewtool-stm32f107/src/stm32_can.c
+++ b/configs/viewtool-stm32f107/src/stm32_can.c
@@ -1,7 +1,7 @@
 /************************************************************************************
  * configs/viewtool-stm32f107/src/stm32_can.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,7 +42,7 @@
 #include 
 #include 
 
-#include 
+#include 
 #include 
 
 #include "chip.h"
@@ -51,7 +51,7 @@
 #include "stm32.h"
 #include "stm32_can.h"
 
-#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2))
+#ifdef CONFIG_CAN
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -59,74 +59,57 @@
 /* Configuration ********************************************************************/
 /* The STM32F107VC supports CAN1 and CAN2 */
 
-#define CAN_PORT 1
-
-/* Debug ***************************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
+#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2)
+#  warning "Both CAN1 and CAN2 are enabled.  Assuming only CAN1."
+#  undef CONFIG_STM32_CAN2
+#endif
 
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
+#ifdef CONFIG_STM32_CAN1
+#  define CAN_PORT 1
 #else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
+#  define CAN_PORT 2
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_can_initialize
+ * Name: stm32_can_setup
  *
  * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/can.
+ *  Initialize CAN and register the CAN device
  *
  ************************************************************************************/
 
-int board_can_initialize(void)
+int stm32_can_setup(void)
 {
-  static bool initialized = false;
+#if defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)
   struct can_dev_s *can;
   int ret;
 
-  /* Check if we have already initialized */
+  /* Call stm32_caninitialize() to get an instance of the CAN interface */
 
-  if (!initialized)
+  can = stm32_caninitialize(CAN_PORT);
+  if (can == NULL)
     {
-      /* Call stm32_caninitialize() to get an instance of the CAN interface */
-
-      can = stm32_caninitialize(CAN_PORT);
-      if (can == NULL)
-        {
-          candbg("ERROR:  Failed to get CAN interface\n");
-          return -ENODEV;
-        }
-
-      /* Register the CAN driver at "/dev/can0" */
-
-      ret = can_register("/dev/can0", can);
-      if (ret < 0)
-        {
-          candbg("ERROR: can_register failed: %d\n", ret);
-          return ret;
-        }
+      canerr("ERROR:  Failed to get CAN interface\n");
+      return -ENODEV;
+    }
 
-      /* Now we are initialized */
+  /* Register the CAN driver at "/dev/can0" */
 
-      initialized = true;
+  ret = can_register("/dev/can0", can);
+  if (ret < 0)
+    {
+      canerr("ERROR: can_register failed: %d\n", ret);
+      return ret;
     }
 
   return OK;
+#else
+  return -ENODEV;
+#endif
 }
 
-#endif /* CONFIG_CAN && CONFIG_STM32_CAN1 */
+#endif /* CONFIG_CAN */
diff --git a/configs/viewtool-stm32f107/src/stm32_leds.c b/configs/viewtool-stm32f107/src/stm32_leds.c
index f6ba968118a7373f6edda1c559b5adeff565ff3a..4653c4a341faf0be5368d8b8b6ecef7872f77025 100644
--- a/configs/viewtool-stm32f107/src/stm32_leds.c
+++ b/configs/viewtool-stm32f107/src/stm32_leds.c
@@ -49,26 +49,6 @@
 #include "stm32_gpio.h"
 #include "viewtool_stm32f107.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  define ledvdbg llvdbg
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
diff --git a/configs/viewtool-stm32f107/src/stm32_mmcsd.c b/configs/viewtool-stm32f107/src/stm32_mmcsd.c
index 0ca39d6b062bcea91461b6f6a5f2cafdabd55619..d40b86899ca2169550348feae8ddd6b7ca4bd553 100644
--- a/configs/viewtool-stm32f107/src/stm32_mmcsd.c
+++ b/configs/viewtool-stm32f107/src/stm32_mmcsd.c
@@ -100,22 +100,22 @@ int stm32_sdinitialize(int minor)
   sdio = sdio_initialize(STM32_MMCSDSLOTNO);
   if (!sdio)
     {
-      fdbg("Failed to initialize SDIO slot %d\n", STM32_MMCSDSLOTNO);
+      ferr("ERROR: Failed to initialize SDIO slot %d\n", STM32_MMCSDSLOTNO);
       return -ENODEV;
     }
 
-  fvdbg("Initialized SDIO slot %d\n", STM32_MMCSDSLOTNO);
+  finfo("Initialized SDIO slot %d\n", STM32_MMCSDSLOTNO);
 
   /* Now bind the SDIO interface to the MMC/SD driver */
 
   ret = mmcsd_slotinitialize(minor, sdio);
   if (ret != OK)
     {
-      fdbg("Failed to bind SDIO slot %d to the MMC/SD driver, minor=%d\n",
-              STM32_MMCSDSLOTNO, minor);
+      ferr("ERROR: Failed to bind SDIO slot %d to the MMC/SD driver, minor=%d\n",
+           STM32_MMCSDSLOTNO, minor);
     }
 
-  fvdbg("Bound SDIO slot %d to the MMC/SD driver, minor=%d\n",
+  finfo("Bound SDIO slot %d to the MMC/SD driver, minor=%d\n",
          STM32_MMCSDSLOTNO, minor);
 
   /* Then let's guess and say that there is a card in the slot.  I need to check to
diff --git a/configs/viewtool-stm32f107/src/stm32_mpl115a.c b/configs/viewtool-stm32f107/src/stm32_mpl115a.c
index 45cce7e9c5ec6474344406fa1e881f2679c264d1..487f7392f41ea5adecdf7863a8d458945c902d8b 100644
--- a/configs/viewtool-stm32f107/src/stm32_mpl115a.c
+++ b/configs/viewtool-stm32f107/src/stm32_mpl115a.c
@@ -92,7 +92,7 @@ int stm32_mpl115ainitialize(FAR const char *devpath)
   ret = mpl115a_register(devpath, spi);
   if (ret < 0)
     {
-      sndbg("Error registering MPL115A\n");
+      snerr("ERROR: Error registering MPL115A\n");
     }
 
   return ret;
diff --git a/configs/viewtool-stm32f107/src/stm32_spi.c b/configs/viewtool-stm32f107/src/stm32_spi.c
index 6f9cca78b213f8f001bb1c2a899a131814fb9f7b..3e8996f3afa0b76a443b9bf80c2331103267fc4f 100644
--- a/configs/viewtool-stm32f107/src/stm32_spi.c
+++ b/configs/viewtool-stm32f107/src/stm32_spi.c
@@ -53,32 +53,6 @@
 
 #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -141,7 +115,7 @@ void weak_function stm32_spidev_initialize(void)
 #ifdef CONFIG_STM32_SPI1
 void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -153,7 +127,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI2
 void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
 #ifdef CONFIG_INPUT_ADS7843E
   /* Select/de-select the touchscreen */
@@ -174,7 +148,7 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI3
 void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 }
 
 uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
diff --git a/configs/viewtool-stm32f107/src/stm32_ssd1289.c b/configs/viewtool-stm32f107/src/stm32_ssd1289.c
index c938e80852d0730dfd3f48a4145a8445430eae18..de4d3a57a8626972adf46ee4425ddc44bb29096a 100644
--- a/configs/viewtool-stm32f107/src/stm32_ssd1289.c
+++ b/configs/viewtool-stm32f107/src/stm32_ssd1289.c
@@ -64,20 +64,6 @@
 #  error "CONFIG_STM32_FSMC is required to use the LCD"
 #endif
 
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
 /* Color depth and format */
 
 #define LCD_BPP          16
@@ -101,20 +87,6 @@
 #define LCD_INDEX        0x60000000  /* RS = 0 */
 #define LCD_DATA         0x60020000  /* RS = 1 */
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg         dbg
-#  define lcdvdbg        vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
-/**************************************************************************************
- * Private Type Definition
- **************************************************************************************/
-
 /**************************************************************************************
  * Private Function Prototypes
  **************************************************************************************/
@@ -425,26 +397,26 @@ static void init_lcd_backlight(void)
 
   /* Dump timer3 registers */
 
-  lcddbg("APB1ENR: %08x\n", getreg32(STM32_RCC_APB1ENR));
-  lcddbg("CR1:     %04x\n", getreg32(STM32_TIM3_CR1));
-  lcddbg("CR2:     %04x\n", getreg32(STM32_TIM3_CR2));
-  lcddbg("SMCR:    %04x\n", getreg32(STM32_TIM3_SMCR));
-  lcddbg("DIER:    %04x\n", getreg32(STM32_TIM3_DIER));
-  lcddbg("SR:      %04x\n", getreg32(STM32_TIM3_SR));
-  lcddbg("EGR:     %04x\n", getreg32(STM32_TIM3_EGR));
-  lcddbg("CCMR1:   %04x\n", getreg32(STM32_TIM3_CCMR1));
-  lcddbg("CCMR2:   %04x\n", getreg32(STM32_TIM3_CCMR2));
-  lcddbg("CCER:    %04x\n", getreg32(STM32_TIM3_CCER));
-  lcddbg("CNT:     %04x\n", getreg32(STM32_TIM3_CNT));
-  lcddbg("PSC:     %04x\n", getreg32(STM32_TIM3_PSC));
-  lcddbg("ARR:     %04x\n", getreg32(STM32_TIM3_ARR));
-  lcddbg("CCR1:    %04x\n", getreg32(STM32_TIM3_CCR1));
-  lcddbg("CCR2:    %04x\n", getreg32(STM32_TIM3_CCR2));
-  lcddbg("CCR3:    %04x\n", getreg32(STM32_TIM3_CCR3));
-  lcddbg("CCR4:    %04x\n", getreg32(STM32_TIM3_CCR4));
-  lcddbg("CCR4:    %04x\n", getreg32(STM32_TIM3_CCR4));
-  lcddbg("CCR4:    %04x\n", getreg32(STM32_TIM3_CCR4));
-  lcddbg("DMAR:    %04x\n", getreg32(STM32_TIM3_DMAR));
+  lcdinfo("APB1ENR: %08x\n", getreg32(STM32_RCC_APB1ENR));
+  lcdinfo("CR1:     %04x\n", getreg32(STM32_TIM3_CR1));
+  lcdinfo("CR2:     %04x\n", getreg32(STM32_TIM3_CR2));
+  lcdinfo("SMCR:    %04x\n", getreg32(STM32_TIM3_SMCR));
+  lcdinfo("DIER:    %04x\n", getreg32(STM32_TIM3_DIER));
+  lcdinfo("SR:      %04x\n", getreg32(STM32_TIM3_SR));
+  lcdinfo("EGR:     %04x\n", getreg32(STM32_TIM3_EGR));
+  lcdinfo("CCMR1:   %04x\n", getreg32(STM32_TIM3_CCMR1));
+  lcdinfo("CCMR2:   %04x\n", getreg32(STM32_TIM3_CCMR2));
+  lcdinfo("CCER:    %04x\n", getreg32(STM32_TIM3_CCER));
+  lcdinfo("CNT:     %04x\n", getreg32(STM32_TIM3_CNT));
+  lcdinfo("PSC:     %04x\n", getreg32(STM32_TIM3_PSC));
+  lcdinfo("ARR:     %04x\n", getreg32(STM32_TIM3_ARR));
+  lcdinfo("CCR1:    %04x\n", getreg32(STM32_TIM3_CCR1));
+  lcdinfo("CCR2:    %04x\n", getreg32(STM32_TIM3_CCR2));
+  lcdinfo("CCR3:    %04x\n", getreg32(STM32_TIM3_CCR3));
+  lcdinfo("CCR4:    %04x\n", getreg32(STM32_TIM3_CCR4));
+  lcdinfo("CCR4:    %04x\n", getreg32(STM32_TIM3_CCR4));
+  lcdinfo("CCR4:    %04x\n", getreg32(STM32_TIM3_CCR4));
+  lcdinfo("DMAR:    %04x\n", getreg32(STM32_TIM3_DMAR));
 }
 
 /************************************************************************************
@@ -548,7 +520,7 @@ int board_lcd_initialize(void)
 
   if (!g_ssd1289drvr)
     {
-      lcdvdbg("Initializing\n");
+      lcdinfo("Initializing\n");
 
       /* Initialize the backlight */
 
@@ -564,7 +536,7 @@ int board_lcd_initialize(void)
       g_ssd1289drvr = ssd1289_lcdinitialize(&g_ssd1289);
       if (!g_ssd1289drvr)
         {
-          lcddbg("ERROR: ssd1289_lcdinitialize failed\n");
+          lcderr("ERROR: ssd1289_lcdinitialize failed\n");
           return -ENODEV;
         }
     }
diff --git a/configs/viewtool-stm32f107/src/stm32_touchscreen.c b/configs/viewtool-stm32f107/src/stm32_touchscreen.c
index 7106fcdc96face8ef286a555c6a683e53463f3cc..8d6bc3c2593288dcdee3b0ba4d6b55f73a18834f 100644
--- a/configs/viewtool-stm32f107/src/stm32_touchscreen.c
+++ b/configs/viewtool-stm32f107/src/stm32_touchscreen.c
@@ -173,12 +173,12 @@ static int tsc_attach(FAR struct ads7843e_config_s *state, xcpt_t isr)
        * be attached when the interrupt is next enabled.
        */
 
-      ivdbg("Attaching %p\n", isr);
+      iinfo("Attaching %p\n", isr);
       priv->handler = isr;
     }
   else
     {
-      ivdbg("Detaching %p\n", priv->handler);
+      iinfo("Detaching %p\n", priv->handler);
       tsc_enable(state, false);
       priv->handler = NULL;
     }
@@ -201,13 +201,15 @@ static void tsc_enable(FAR struct ads7843e_config_s *state, bool enable)
     {
       /* Configure the EXTI interrupt using the SAVED handler */
 
-      (void)stm32_gpiosetevent(GPIO_LCDTP_IRQ, true, true, true, priv->handler);
+      (void)stm32_gpiosetevent(GPIO_LCDTP_IRQ, true, true, true,
+                               priv->handler, NULL);
     }
   else
     {
       /* Configure the EXTI interrupt with a NULL handler to disable it */
 
-     (void)stm32_gpiosetevent(GPIO_LCDTP_IRQ, false, false, false, NULL);
+     (void)stm32_gpiosetevent(GPIO_LCDTP_IRQ, false, false, false,
+                              NULL, NULL);
     }
 
   leave_critical_section(flags);
@@ -228,7 +230,7 @@ static bool tsc_pendown(FAR struct ads7843e_config_s *state)
   /* The /PENIRQ value is active low */
 
   bool pendown = !stm32_gpioread(GPIO_LCDTP_IRQ);
-  ivdbg("pendown=%d\n", pendown);
+  iinfo("pendown=%d\n", pendown);
   return pendown;
 }
 
@@ -260,7 +262,7 @@ int board_tsc_setup(int minor)
   static bool initialized = false;
   int ret;
 
-  idbg("minor %d\n", minor);
+  iinfo("minor %d\n", minor);
   DEBUGASSERT(minor == 0);
 
   /* Have we already initialized?  Since we never uninitialize we must prevent
@@ -280,7 +282,7 @@ int board_tsc_setup(int minor)
       dev = stm32_spibus_initialize(TSC_DEVNUM);
       if (!dev)
         {
-          idbg("Failed to initialize SPI%d\n", TSC_DEVNUM);
+          ierr("ERROR: Failed to initialize SPI%d\n", TSC_DEVNUM);
           return -ENODEV;
         }
 
@@ -289,7 +291,7 @@ int board_tsc_setup(int minor)
       ret = ads7843e_register(dev, &g_tscinfo.config, CONFIG_ADS7843E_DEVMINOR);
       if (ret < 0)
         {
-          idbg("Failed to register touchscreen device\n");
+          ierr("ERROR: Failed to register touchscreen device\n");
           /* up_spiuninitialize(dev); */
           return -ENODEV;
         }
diff --git a/configs/viewtool-stm32f107/src/stm32_usbdev.c b/configs/viewtool-stm32f107/src/stm32_usbdev.c
index 1c35e9bb505aa96835d2231f75445d101b0a44b8..cd7b9acaab0ba4967cc2c918d6c9513515310300 100644
--- a/configs/viewtool-stm32f107/src/stm32_usbdev.c
+++ b/configs/viewtool-stm32f107/src/stm32_usbdev.c
@@ -118,7 +118,7 @@ int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable)
 
 void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-  ulldbg("resume: %d\n", resume);
+  uinfo("resume: %d\n", resume);
 }
 
 #endif /* CONFIG_STM32_OTGFS || CONFIG_STM32_USB*/
diff --git a/configs/viewtool-stm32f107/src/viewtool_stm32f107.h b/configs/viewtool-stm32f107/src/viewtool_stm32f107.h
index bf4c2692adbe339266240ffcf89be1db7e91b4d1..508f10c8a27571a7cdb1f9266d8456e4325e2749 100644
--- a/configs/viewtool-stm32f107/src/viewtool_stm32f107.h
+++ b/configs/viewtool-stm32f107/src/viewtool_stm32f107.h
@@ -342,6 +342,18 @@ void weak_function stm32_usbdev_initialize(void);
 
 int stm32_sdinitialize(int minor);
 
+/****************************************************************************
+ * Name: stm32_can_setup
+ *
+ * Description:
+ *  Initialize CAN and register the CAN device
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CAN
+int stm32_can_setup(void);
+#endif
+
 /****************************************************************************
  * Name: stm32_mpl115ainitialize
  *
diff --git a/configs/xtrs/nsh/defconfig b/configs/xtrs/nsh/defconfig
index fed3d18a034b2e8af045d2b50b9b8c70d585f0ee..057aa917d430ca4cfea6dd5e179a2fd9b3cd2166 100644
--- a/configs/xtrs/nsh/defconfig
+++ b/configs/xtrs/nsh/defconfig
@@ -43,7 +43,7 @@ CONFIG_WINDOWS_NATIVE=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 
 #
@@ -53,8 +53,7 @@ CONFIG_WINDOWS_NATIVE=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -193,7 +192,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 # CONFIG_16550_UART is not set
@@ -242,7 +240,6 @@ CONFIG_UART_2STOP=0
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 
 #
 # Graphics Support
@@ -270,7 +267,7 @@ CONFIG_HEAP2_SIZE=0
 #
 # Library Routines
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -286,7 +283,6 @@ CONFIG_EOL_IS_EITHER_CRLF=y
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Basic CXX Support
@@ -340,7 +336,6 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
diff --git a/configs/xtrs/ostest/defconfig b/configs/xtrs/ostest/defconfig
index d0f9abadd0d90bb5e432d77fca016affcf84c791..373e087c99d468d8e970fe4e5898e296026684de 100644
--- a/configs/xtrs/ostest/defconfig
+++ b/configs/xtrs/ostest/defconfig
@@ -43,7 +43,7 @@ CONFIG_WINDOWS_NATIVE=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 
 #
@@ -53,8 +53,7 @@ CONFIG_WINDOWS_NATIVE=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -140,7 +139,7 @@ CONFIG_USER_ENTRYPOINT="ostest_main"
 CONFIG_DISABLE_OS_API=y
 CONFIG_DISABLE_POSIX_TIMERS=y
 CONFIG_DISABLE_PTHREAD=y
-CONFIG_DISABLE_SIGNALS=y
+# CONFIG_DISABLE_SIGNALS is not set
 CONFIG_DISABLE_MQUEUE=y
 CONFIG_DISABLE_MOUNTPOINT=y
 CONFIG_DISABLE_ENVIRON=y
@@ -192,7 +191,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
 # CONFIG_16550_UART is not set
@@ -241,7 +239,6 @@ CONFIG_UART_2STOP=0
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 
 #
 # Graphics Support
@@ -269,7 +266,7 @@ CONFIG_HEAP2_SIZE=0
 #
 # Library Routines
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -285,7 +282,6 @@ CONFIG_EOL_IS_EITHER_CRLF=y
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Basic CXX Support
@@ -344,7 +340,6 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
diff --git a/configs/xtrs/pashello/defconfig b/configs/xtrs/pashello/defconfig
index eeceb9e5829b4f85c83a97333b3f5740adf80acc..4f05dd02565ce42d43a4f99e38171b9466bed165 100644
--- a/configs/xtrs/pashello/defconfig
+++ b/configs/xtrs/pashello/defconfig
@@ -43,7 +43,7 @@ CONFIG_WINDOWS_NATIVE=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 
 #
@@ -53,8 +53,7 @@ CONFIG_WINDOWS_NATIVE=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -193,7 +192,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
 # CONFIG_16550_UART is not set
@@ -241,7 +239,6 @@ CONFIG_UART_2STOP=0
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 
 #
 # Graphics Support
@@ -269,7 +266,7 @@ CONFIG_HEAP2_SIZE=0
 #
 # Library Routines
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 CONFIG_LIB_HOMEDIR="/"
@@ -286,7 +283,6 @@ CONFIG_EOL_IS_EITHER_CRLF=y
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Basic CXX Support
@@ -340,7 +336,6 @@ CONFIG_EXAMPLES_PASHELLO=y
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
diff --git a/configs/xtrs/src/xtr_irq.c b/configs/xtrs/src/xtr_irq.c
index 38047c9d669cea85dd463896929caa0646085ed1..5cc00da95038004e29a7606fbe2b132693dad7c4 100644
--- a/configs/xtrs/src/xtr_irq.c
+++ b/configs/xtrs/src/xtr_irq.c
@@ -44,6 +44,16 @@
 #include "up_arch.h"
 #include "up_internal.h"
 
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+int xtrs_timerisr(int irq, FAR chipreg_t *regs);
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
 /****************************************************************************
  * Name: up_irqinitialize
  ****************************************************************************/
@@ -56,10 +66,11 @@ void up_irqinitialize(void)
    *
    * NOTE:  Normally, there are seperate enables for "global" interrupts
    * and specific device interrupts.  In such a "normal" case, the timer
-   * interrupt should be attached and enabled in the function up_timer_initialize()
+   * interrupt should be attached and enabled in the function
+   * xtrs_timer_initialize()
    */
 
-  irq_attach(Z80_IRQ_SYSTIMER, (xcpt_t)up_timerisr);
+  irq_attach(Z80_IRQ_SYSTIMER, (xcpt_t)xtrs_timerisr, NULL);
 
   /* And finally, enable interrupts (including the timer) */
 
diff --git a/configs/xtrs/src/xtr_timerisr.c b/configs/xtrs/src/xtr_timerisr.c
index 62afe947aacc5395f938e433d46b3c6a8a0a0f12..c05c661b35e372d39d86d47b61582493bf2710ae 100644
--- a/configs/xtrs/src/xtr_timerisr.c
+++ b/configs/xtrs/src/xtr_timerisr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/xtrs/src/xtr_timerisr.c
  *
- *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -46,24 +46,12 @@
 #include "clock/clock.h"
 #include "up_internal.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Function:  up_timerisr
+ * Function:  xtrs_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions of
@@ -71,7 +59,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, FAR chipreg_t *regs)
+int xtrs_timerisr(int irq, FAR chipreg_t *regs, FAR void *arg)
 {
    /* Process timer interrupt */
 
@@ -80,7 +68,7 @@ int up_timerisr(int irq, FAR chipreg_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Function:  xtrs_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize the timer
@@ -88,7 +76,7 @@ int up_timerisr(int irq, FAR chipreg_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void xtrs_timer_initialize(void)
 {
   /* The timer interrupt was attached in up_irqinitialize -- see comments there */
 }
diff --git a/configs/z16f2800100zcog/nsh/defconfig b/configs/z16f2800100zcog/nsh/defconfig
index fe61c46aa11b8786a5a94965f3bffcfe844cb1c7..17d6a8dfdfc528e3b890862b16f70480fce0360f 100644
--- a/configs/z16f2800100zcog/nsh/defconfig
+++ b/configs/z16f2800100zcog/nsh/defconfig
@@ -21,6 +21,7 @@ CONFIG_WINDOWS_CYGWIN=y
 # Build Configuration
 #
 # CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
 # CONFIG_BUILD_2PASS is not set
 
 #
@@ -40,33 +41,15 @@ CONFIG_WINDOWS_CYGWIN=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_LEDS is not set
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
-# CONFIG_DEBUG_AUDIO is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 # CONFIG_DEBUG_NOOPT is not set
@@ -79,8 +62,7 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 CONFIG_ARCH_Z16=y
@@ -119,10 +101,18 @@ CONFIG_Z16F_UART1=y
 # CONFIG_ARCH_VECNOTIRQ is not set
 # CONFIG_ARCH_DMA is not set
 CONFIG_ARCH_HAVE_IRQPRIO=y
-# CONFIG_ARCH_ADDRENV is not set
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 # CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
+# CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 # CONFIG_ARCH_IRQPRIO is not set
 # CONFIG_ARCH_STACKDUMP is not set
 CONFIG_ENDIAN_BIG=y
@@ -170,11 +160,12 @@ CONFIG_ARCH_BOARD="z16f2800100zcog"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
+# CONFIG_LIB_BOARDCTL is not set
 
 #
 # RTOS Features
@@ -204,8 +195,12 @@ CONFIG_PREALLOC_TIMERS=4
 #
 # Tasks and Scheduling
 #
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -256,6 +251,14 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
 
 #
 # Stack and heap information
@@ -264,6 +267,7 @@ CONFIG_IDLETHREAD_STACKSIZE=1024
 CONFIG_USERMAIN_STACKSIZE=2048
 CONFIG_PTHREAD_STACK_MIN=256
 CONFIG_PTHREAD_STACK_DEFAULT=1536
+# CONFIG_LIB_SYSCALL is not set
 
 #
 # Device Drivers
@@ -272,32 +276,65 @@ CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
 # CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
-# CONFIG_TIMER is not set
 # CONFIG_ANALOG is not set
 # CONFIG_AUDIO_DEVICES is not set
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -320,15 +357,16 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART6_SERIALDRIVER is not set
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
-# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_UART1_SERIAL_CONSOLE is not set
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
 
 #
@@ -342,6 +380,7 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 
 #
 # UART1 Configuration
@@ -354,20 +393,25 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -376,6 +420,11 @@ CONFIG_UART1_2STOP=0
 # CONFIG_ARCH_HAVE_PHY is not set
 # CONFIG_NET is not set
 
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
 #
 # File Systems
 #
@@ -384,22 +433,21 @@ CONFIG_UART1_2STOP=0
 # File system configuration
 #
 # CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
 # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
 # CONFIG_FS_READABLE is not set
 # CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_BINFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -422,7 +470,11 @@ CONFIG_HEAP2_SIZE=0
 # CONFIG_AUDIO is not set
 
 #
-# Binary Formats
+# Wireless Support
+#
+
+#
+# Binary Loader
 #
 # CONFIG_BINFMT_DISABLE is not set
 # CONFIG_BINFMT_EXEPATH is not set
@@ -447,6 +499,7 @@ CONFIG_LIB_HOMEDIR="/"
 CONFIG_NOPRINTF_FIELDWIDTH=y
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -458,16 +511,20 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
 CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -484,11 +541,14 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 
+#
+# CAN Utilities
+#
+
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -496,11 +556,11 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -508,91 +568,105 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PASHELLO is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
-# CONFIG_EXAMPLES_SMART_TEST is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
 #
 # CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
 
 #
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
 # CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
 
 #
-# FreeModBus
+# NSH Library
 #
-# CONFIG_MODBUS is not set
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
-# NSH Library
+# Command Line Configuration
 #
-CONFIG_NSH_LIBRARY=y
 CONFIG_NSH_READLINE=y
 # CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=80
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_NSH_MAXARGUMENTS=6
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
 CONFIG_NSH_BUILTIN_APPS=y
 
 #
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
 # CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -601,8 +675,10 @@ CONFIG_NSH_BUILTIN_APPS=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -610,6 +686,7 @@ CONFIG_NSH_BUILTIN_APPS=y
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -619,12 +696,15 @@ CONFIG_NSH_BUILTIN_APPS=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
 # CONFIG_NSH_DISABLE_UNSET is not set
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
 
 #
 # Configure Command Options
@@ -633,23 +713,22 @@ CONFIG_NSH_BUILTIN_APPS=y
 CONFIG_NSH_CODECS_BUFSIZE=128
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=80
-# CONFIG_NSH_DISABLE_SEMICOLON is not set
-# CONFIG_NSH_CMDPARMS is not set
-CONFIG_NSH_MAXARGUMENTS=6
-# CONFIG_NSH_ARGCAT is not set
-CONFIG_NSH_NESTDEPTH=3
+
+#
+# Scripting Support
+#
 # CONFIG_NSH_DISABLESCRIPT is not set
 # CONFIG_NSH_DISABLE_ITEF is not set
 # CONFIG_NSH_DISABLE_LOOPS is not set
-# CONFIG_NSH_DISABLEBG is not set
-CONFIG_NSH_CONSOLE=y
 
 #
-# USB Trace Support
+# Console Configuration
 #
+CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 # CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -663,94 +742,19 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-
-#
-# Custom Free Memory Command
-#
-# CONFIG_SYSTEM_FREE is not set
-
-#
-# EMACS-like Command Line Editor
-#
 # CONFIG_SYSTEM_CLE is not set
-
-#
-# FLASH Program Installation
-#
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# I2C tool
-#
-
-#
-# INI File Parser
-#
-# CONFIG_FSUTILS_INIFILE is not set
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sysinfo
-#
-
-#
-# VI Work-Alike Editor
-#
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
-
-#
-# Stack Monitor
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# USB Monitor
-#
-
-#
-# Zmodem Commands
-#
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/z16f2800100zcog/ostest/defconfig b/configs/z16f2800100zcog/ostest/defconfig
index 6ee164a4eaf84288f5dff5d700bd21b14428715a..456e988fb85f74e16bebace0c93d3b414933ef9e 100644
--- a/configs/z16f2800100zcog/ostest/defconfig
+++ b/configs/z16f2800100zcog/ostest/defconfig
@@ -7,6 +7,7 @@
 # Build Setup
 #
 # CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
 # CONFIG_HOST_LINUX is not set
 # CONFIG_HOST_OSX is not set
 CONFIG_HOST_WINDOWS=y
@@ -20,6 +21,7 @@ CONFIG_WINDOWS_CYGWIN=y
 # Build Configuration
 #
 # CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
 # CONFIG_BUILD_2PASS is not set
 
 #
@@ -29,43 +31,29 @@ CONFIG_WINDOWS_CYGWIN=y
 # CONFIG_INTELHEX_BINARY is not set
 # CONFIG_MOTOROLA_SREC is not set
 # CONFIG_RAW_BINARY is not set
+# CONFIG_UBOOT_UIMAGE is not set
 
 #
 # Customize Header Files
 #
+# CONFIG_ARCH_STDINT_H is not set
 # CONFIG_ARCH_STDBOOL_H is not set
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
 # CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_LEDS is not set
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
-# CONFIG_DEBUG_AUDIO is not set
 # CONFIG_DEBUG_SYMBOLS is not set
+# CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 # CONFIG_DEBUG_NOOPT is not set
+CONFIG_DEBUG_FULLOPT=y
 
 #
 # System Type
@@ -74,8 +62,7 @@ CONFIG_DEBUG=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 CONFIG_ARCH_Z16=y
@@ -99,6 +86,11 @@ CONFIG_ARCH_CHIP_Z16F=y
 #
 # Z16F Configuration Options
 #
+
+#
+# Z16F Peripheral Selection
+#
+# CONFIG_Z16F_ESPI is not set
 CONFIG_Z16F_UART0=y
 CONFIG_Z16F_UART1=y
 
@@ -109,11 +101,22 @@ CONFIG_Z16F_UART1=y
 # CONFIG_ARCH_VECNOTIRQ is not set
 # CONFIG_ARCH_DMA is not set
 CONFIG_ARCH_HAVE_IRQPRIO=y
-# CONFIG_ARCH_ADDRENV is not set
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 # CONFIG_ARCH_HAVE_VFORK is not set
+# CONFIG_ARCH_HAVE_MMU is not set
+# CONFIG_ARCH_HAVE_MPU is not set
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 # CONFIG_ARCH_IRQPRIO is not set
 # CONFIG_ARCH_STACKDUMP is not set
 CONFIG_ENDIAN_BIG=y
+# CONFIG_ARCH_IDLE_CUSTOM is not set
 # CONFIG_ARCH_HAVE_RAMFUNCS is not set
 # CONFIG_ARCH_HAVE_RAMVECTORS is not set
 
@@ -143,6 +146,7 @@ CONFIG_BOOT_RUNFROMFLASH=y
 #
 CONFIG_RAM_START=0x0
 CONFIG_RAM_SIZE=65536
+# CONFIG_ARCH_HAVE_SDRAM is not set
 
 #
 # Board Selection
@@ -160,38 +164,79 @@ CONFIG_ARCH_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
+# CONFIG_LIB_BOARDCTL is not set
 
 #
 # RTOS Features
 #
-# CONFIG_BOARD_INITIALIZE is not set
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
-CONFIG_RR_INTERVAL=200
-# CONFIG_SCHED_INSTRUMENTATION is not set
-CONFIG_TASK_NAME_SIZE=0
-# CONFIG_SCHED_HAVE_PARENT is not set
+# CONFIG_CLOCK_MONOTONIC is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2012
 CONFIG_START_MONTH=11
 CONFIG_START_DAY=29
-CONFIG_DEV_CONSOLE=y
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="ostest_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+# CONFIG_SCHED_WAITPID is not set
+
+#
+# Pthread Options
+#
 # CONFIG_MUTEX_TYPES is not set
-# CONFIG_PRIORITY_INHERITANCE is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
 # CONFIG_FDCLONE_DISABLE is not set
 # CONFIG_FDCLONE_STDIO is not set
 CONFIG_SDCLONE_DISABLE=y
-# CONFIG_SCHED_WAITPID is not set
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
-CONFIG_USER_ENTRYPOINT="ostest_main"
-CONFIG_DISABLE_OS_API=y
-# CONFIG_DISABLE_POSIX_TIMERS is not set
-# CONFIG_DISABLE_PTHREAD is not set
-# CONFIG_DISABLE_SIGNALS is not set
-# CONFIG_DISABLE_MQUEUE is not set
-# CONFIG_DISABLE_ENVIRON is not set
 
 #
 # Signal Numbers
@@ -202,19 +247,18 @@ CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGCONDTIMEDOUT=16
 
 #
-# Sizes of configurable things (0 disables)
+# POSIX Message Queue Options
 #
-CONFIG_MAX_TASKS=16
-CONFIG_NPTHREAD_KEYS=4
-CONFIG_NFILE_DESCRIPTORS=8
-CONFIG_NFILE_STREAMS=8
-CONFIG_NAME_MAX=32
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
-CONFIG_MAX_WDOGPARMS=2
-CONFIG_PREALLOC_WDOGS=4
-CONFIG_WDOG_INTRESERVE=0
-CONFIG_PREALLOC_TIMERS=4
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
 
 #
 # Stack and heap information
@@ -223,6 +267,7 @@ CONFIG_IDLETHREAD_STACKSIZE=4096
 CONFIG_USERMAIN_STACKSIZE=4096
 CONFIG_PTHREAD_STACK_MIN=256
 CONFIG_PTHREAD_STACK_DEFAULT=4096
+# CONFIG_LIB_SYSCALL is not set
 
 #
 # Device Drivers
@@ -231,14 +276,26 @@ CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
 # CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
 # CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -246,27 +303,69 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
 CONFIG_UART1_SERIALDRIVER=y
-
-#
-# USART Configuration
-#
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
 CONFIG_MCU_SERIAL=y
-# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_UART1_SERIAL_CONSOLE is not set
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
 # CONFIG_NO_SERIAL_CONSOLE is not set
 
 #
@@ -280,6 +379,7 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 
 #
 # UART1 Configuration
@@ -292,20 +392,25 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
-# CONFIG_SERIAL_IFLOWCONTROL is not set
-# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -314,6 +419,11 @@ CONFIG_UART1_2STOP=0
 # CONFIG_ARCH_HAVE_PHY is not set
 # CONFIG_NET is not set
 
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
 #
 # File Systems
 #
@@ -322,20 +432,20 @@ CONFIG_UART1_2STOP=0
 # File system configuration
 #
 # CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
 # CONFIG_FS_READABLE is not set
 # CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_RAMMAP is not set
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-
-# CONFIG_SYSLOG is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -358,7 +468,11 @@ CONFIG_HEAP2_SIZE=0
 # CONFIG_AUDIO is not set
 
 #
-# Binary Formats
+# Wireless Support
+#
+
+#
+# Binary Loader
 #
 # CONFIG_BINFMT_DISABLE is not set
 # CONFIG_BINFMT_EXEPATH is not set
@@ -383,6 +497,7 @@ CONFIG_LIB_HOMEDIR="/"
 CONFIG_NOPRINTF_FIELDWIDTH=y
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -394,16 +509,20 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
 # CONFIG_LIBC_STRERROR is not set
 # CONFIG_LIBC_PERROR_STDOUT is not set
 CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
-# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -416,26 +535,25 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
-# CONFIG_EXAMPLES_LCDRW is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -443,12 +561,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 CONFIG_EXAMPLES_OSTEST=y
 CONFIG_EXAMPLES_OSTEST_LOOPS=1
@@ -456,64 +573,63 @@ CONFIG_EXAMPLES_OSTEST_STACKSIZE=8192
 CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=8
 CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000
 CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
-# CONFIG_EXAMPLES_PASHELLO is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_UDP is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
 #
 # CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
 
 #
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
 # CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
-# CONFIG_NETUTILS_DHCPC is not set
-# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
-# CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
-# CONFIG_NETDB_DNSCLIENT is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_TELNETD is not set
-# CONFIG_NETUTILS_TFTPC is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
-# CONFIG_NETUTILS_WEBCLIENT is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
@@ -530,80 +646,18 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # CONFIG_PLATFORM_CONFIGDATA is not set
 
 #
-# System NSH Add-Ons
-#
-
-#
-# USB CDC/ACM Device Commands
-#
-
-#
-# USB Composite Device Commands
-#
-
-#
-# Custom Free Memory Command
+# System Libraries and NSH Add-Ons
 #
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
 # CONFIG_SYSTEM_FREE is not set
-
-#
-# I2C tool
-#
-
-#
-# FLASH Program Installation
-#
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-
-#
-# FLASH Erase-all Command
-#
-
-#
-# NxPlayer media player library / command Line
-#
-# CONFIG_SYSTEM_NXPLAYER is not set
-
-#
-# RAM test
-#
 # CONFIG_SYSTEM_RAMTEST is not set
-
-#
-# readline()
-#
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-
-#
-# Power Off
-#
-# CONFIG_SYSTEM_POWEROFF is not set
-
-#
-# RAMTRON
-#
-
-#
-# SD Card
-#
-
-#
-# Sysinfo
-#
-
-#
-# USB Monitor
-#
-
-#
-# Stack Monitor
-#
-
-#
-# USB Mass Storage Device Commands
-#
-
-#
-# Zmodem Commands
-#
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/z16f2800100zcog/pashello/defconfig b/configs/z16f2800100zcog/pashello/defconfig
index 3d4744e090823325793c4866d913556626295240..2667e2c6da562f73ac83376582fd7192493d3d77 100644
--- a/configs/z16f2800100zcog/pashello/defconfig
+++ b/configs/z16f2800100zcog/pashello/defconfig
@@ -41,8 +41,8 @@ CONFIG_WINDOWS_CYGWIN=y
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-# CONFIG_DEBUG_VERBOSE is not set
+# CONFIG_DEBUG_FEATURES is not set
+# CONFIG_DEBUG_INFO is not set
 
 
 #
@@ -69,8 +69,7 @@ CONFIG_DEBUG=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 CONFIG_ARCH_Z16=y
@@ -216,7 +215,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
 # CONFIG_16550_UART is not set
@@ -280,7 +278,6 @@ CONFIG_UART1_2STOP=0
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 
 #
 # Graphics Support
@@ -325,7 +322,6 @@ CONFIG_EOL_IS_EITHER_CRLF=y
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Basic CXX Support
@@ -377,7 +373,6 @@ CONFIG_EXAMPLES_PASHELLO=y
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
diff --git a/configs/z80sim/nsh/defconfig b/configs/z80sim/nsh/defconfig
index ab5c5da665c5256ccc337a1d131cf714619ba116..a3fb674d317d9beb16bd41598f39a55495530e3e 100644
--- a/configs/z80sim/nsh/defconfig
+++ b/configs/z80sim/nsh/defconfig
@@ -43,7 +43,7 @@ CONFIG_WINDOWS_NATIVE=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 
 #
@@ -53,8 +53,7 @@ CONFIG_WINDOWS_NATIVE=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -193,7 +192,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
 # CONFIG_16550_UART is not set
@@ -242,7 +240,6 @@ CONFIG_UART_2STOP=0
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 
 #
 # Graphics Support
@@ -270,7 +267,7 @@ CONFIG_HEAP2_SIZE=0
 #
 # Library Routines
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -286,7 +283,6 @@ CONFIG_EOL_IS_EITHER_CRLF=y
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Basic CXX Support
@@ -340,7 +336,6 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
diff --git a/configs/z80sim/ostest/defconfig b/configs/z80sim/ostest/defconfig
index dc0a04bc13f4195efbb637cfb5976cc339018054..7f91b79769965f53f3164f5fb32572548439c247 100644
--- a/configs/z80sim/ostest/defconfig
+++ b/configs/z80sim/ostest/defconfig
@@ -43,7 +43,7 @@ CONFIG_WINDOWS_NATIVE=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 
 #
@@ -53,8 +53,7 @@ CONFIG_WINDOWS_NATIVE=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -140,7 +139,7 @@ CONFIG_USER_ENTRYPOINT="ostest_main"
 CONFIG_DISABLE_OS_API=y
 CONFIG_DISABLE_POSIX_TIMERS=y
 CONFIG_DISABLE_PTHREAD=y
-CONFIG_DISABLE_SIGNALS=y
+# CONFIG_DISABLE_SIGNALS is not set
 CONFIG_DISABLE_MQUEUE=y
 CONFIG_DISABLE_MOUNTPOINT=y
 CONFIG_DISABLE_ENVIRON=y
@@ -192,7 +191,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
 # CONFIG_16550_UART is not set
@@ -241,7 +239,6 @@ CONFIG_UART_2STOP=0
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 
 #
 # Graphics Support
@@ -269,7 +266,7 @@ CONFIG_HEAP2_SIZE=0
 #
 # Library Routines
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -285,7 +282,6 @@ CONFIG_EOL_IS_EITHER_CRLF=y
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Basic CXX Support
@@ -344,7 +340,6 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
diff --git a/configs/z80sim/pashello/defconfig b/configs/z80sim/pashello/defconfig
index 4a702c2638925d23ca1fd004aa1ed9ffaa85818c..0ad39d3b309b09fa03b1231446fdb4e592b8a8da 100644
--- a/configs/z80sim/pashello/defconfig
+++ b/configs/z80sim/pashello/defconfig
@@ -43,7 +43,7 @@ CONFIG_WINDOWS_NATIVE=y
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 
 #
@@ -53,8 +53,7 @@ CONFIG_WINDOWS_NATIVE=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -192,7 +191,6 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
 # CONFIG_16550_UART is not set
@@ -240,7 +238,6 @@ CONFIG_UART_2STOP=0
 #
 # System Logging
 #
-# CONFIG_SYSLOG is not set
 
 #
 # Graphics Support
@@ -268,7 +265,7 @@ CONFIG_HEAP2_SIZE=0
 #
 # Library Routines
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 CONFIG_LIB_HOMEDIR="/"
@@ -285,7 +282,6 @@ CONFIG_EOL_IS_EITHER_CRLF=y
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
 
 #
 # Basic CXX Support
@@ -339,7 +335,6 @@ CONFIG_EXAMPLES_PASHELLO=y
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
diff --git a/configs/z80sim/src/z80_irq.c b/configs/z80sim/src/z80_irq.c
index 3bfdb00035a7178cdefd5ceb04e8bd66b91580bd..27f3c393e97278d09b0917b47fed4d9b282a8e04 100644
--- a/configs/z80sim/src/z80_irq.c
+++ b/configs/z80sim/src/z80_irq.c
@@ -45,20 +45,10 @@
 #include "up_internal.h"
 
 /****************************************************************************
- * Pre-processor Definitions
+ * Public Function Prototypes
  ****************************************************************************/
 
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
+int z80sim_timerisr(int irq, FAR chipreg_t *regs);
 
 /****************************************************************************
  * Public Functions
@@ -76,10 +66,11 @@ void up_irqinitialize(void)
    *
    * NOTE:  Normally, there are seperate enables for "global" interrupts
    * and specific device interrupts.  In such a "normal" case, the timer
-   * interrupt should be attached and enabled in the function up_timer_initialize()
+   * interrupt should be attached and enabled in the function
+   * z80sim_timer_initialize()
    */
 
-  irq_attach(Z80_IRQ_SYSTIMER, (xcpt_t)up_timerisr);
+  irq_attach(Z80_IRQ_SYSTIMER, (xcpt_t)z80sim_timerisr, NULL);
 
   /* And finally, enable interrupts (including the timer) */
 
diff --git a/configs/z80sim/src/z80_timerisr.c b/configs/z80sim/src/z80_timerisr.c
index 91c1b809d80df03a8ff848cffb6b7e69d84cda2c..a230652d5cc0da0f63ad6e3b5031c362202a4cae 100644
--- a/configs/z80sim/src/z80_timerisr.c
+++ b/configs/z80sim/src/z80_timerisr.c
@@ -46,24 +46,12 @@
 #include "clock/clock.h"
 #include "up_internal.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Function:  up_timerisr
+ * Function:  z80sim_timerisr
  *
  * Description:
  *   The timer ISR will perform a variety of services for various portions of
@@ -71,7 +59,7 @@
  *
  ****************************************************************************/
 
-int up_timerisr(int irq, FAR chipreg_t *regs)
+int z80sim_timerisr(int irq, FAR chipreg_t *regs, void *arg)
 {
    /* Process timer interrupt */
 
@@ -80,7 +68,7 @@ int up_timerisr(int irq, FAR chipreg_t *regs)
 }
 
 /****************************************************************************
- * Function:  up_timer_initialize
+ * Function:  z80sim_timer_initialize
  *
  * Description:
  *   This function is called during start-up to initialize the timer
@@ -88,8 +76,7 @@ int up_timerisr(int irq, FAR chipreg_t *regs)
  *
  ****************************************************************************/
 
-void up_timer_initialize(void)
+void z80sim_timer_initialize(void)
 {
   /* The timer interrupt was attached in up_irqinitialize -- see comments there */
 }
-
diff --git a/configs/z8encore000zco/ostest/defconfig b/configs/z8encore000zco/ostest/defconfig
index aa8fc95358881eb01cb1e34d689b27a68dcfe81b..e294983e7a998ef43e6aee4fdb66f8b325e88b07 100644
--- a/configs/z8encore000zco/ostest/defconfig
+++ b/configs/z8encore000zco/ostest/defconfig
@@ -46,33 +46,10 @@ CONFIG_BUILD_FLAT=y
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_AUDIO is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_LEDS is not set
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 # CONFIG_DEBUG_NOOPT is not set
@@ -85,8 +62,7 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -167,6 +143,7 @@ CONFIG_Z8_ZDSII_V522=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 # CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -224,6 +201,7 @@ CONFIG_ARCH_HAVE_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -232,7 +210,7 @@ CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_DISABLE_OS_API=y
 CONFIG_DISABLE_POSIX_TIMERS=y
 CONFIG_DISABLE_PTHREAD=y
-CONFIG_DISABLE_SIGNALS=y
+# CONFIG_DISABLE_SIGNALS is not set
 CONFIG_DISABLE_MQUEUE=y
 CONFIG_DISABLE_ENVIRON=y
 
@@ -339,14 +317,26 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -355,9 +345,10 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -381,15 +372,10 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
-# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_UART1_SERIAL_CONSOLE is not set
@@ -423,17 +409,22 @@ CONFIG_UART1_2STOP=0
 # CONFIG_UART1_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -463,12 +454,6 @@ CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -489,6 +474,10 @@ CONFIG_HEAP2_SIZE=0
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -506,7 +495,7 @@ CONFIG_HEAP2_SIZE=0
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -528,14 +517,16 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -562,10 +553,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_LEDS is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -574,11 +566,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 CONFIG_EXAMPLES_OSTEST=y
 CONFIG_EXAMPLES_OSTEST_LOOPS=1
@@ -589,29 +581,34 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
 # CONFIG_FSUTILS_INIFILE is not set
 
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -622,8 +619,8 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -634,6 +631,7 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -655,16 +653,16 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/z8f64200100kit/ostest/defconfig b/configs/z8f64200100kit/ostest/defconfig
index df99499d711c54bab7fec3f5e03d2a6a123c32de..dea4dffa3f5de03a74c1b7720f800b149ae12c7a 100644
--- a/configs/z8f64200100kit/ostest/defconfig
+++ b/configs/z8f64200100kit/ostest/defconfig
@@ -46,33 +46,10 @@ CONFIG_BUILD_FLAT=y
 #
 # Debug Options
 #
-CONFIG_DEBUG=y
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
-
-#
-# Subsystem Debug Options
-#
-# CONFIG_DEBUG_AUDIO is not set
-# CONFIG_DEBUG_BINFMT is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_GRAPHICS is not set
-# CONFIG_DEBUG_LIB is not set
-# CONFIG_DEBUG_MM is not set
-# CONFIG_DEBUG_SCHED is not set
-
-#
-# OS Function Debug Options
-#
-# CONFIG_DEBUG_IRQ is not set
-
-#
-# Driver Debug Options
-#
-# CONFIG_DEBUG_LEDS is not set
-# CONFIG_DEBUG_ANALOG is not set
-# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_ALERT is not set
+# CONFIG_DEBUG_FEATURES is not set
 # CONFIG_ARCH_HAVE_STACKCHECK is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 # CONFIG_ARCH_HAVE_CUSTOMOPT is not set
 # CONFIG_DEBUG_NOOPT is not set
@@ -85,8 +62,7 @@ CONFIG_DEBUG_FULLOPT=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -167,6 +143,7 @@ CONFIG_Z8_ZDSII_V522=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 # CONFIG_ARCH_HAVE_VFORK is not set
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -224,6 +201,7 @@ CONFIG_ARCH_HAVE_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -232,7 +210,7 @@ CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_DISABLE_OS_API=y
 CONFIG_DISABLE_POSIX_TIMERS=y
 CONFIG_DISABLE_PTHREAD=y
-CONFIG_DISABLE_SIGNALS=y
+# CONFIG_DISABLE_SIGNALS is not set
 CONFIG_DISABLE_MQUEUE=y
 CONFIG_DISABLE_ENVIRON=y
 
@@ -339,14 +317,26 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
 # CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
 
 #
 # LED Support
 #
 # CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
 # CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
 # CONFIG_MODEM is not set
 # CONFIG_MTD is not set
@@ -355,9 +345,10 @@ CONFIG_DEV_NULL=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -381,16 +372,11 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
 # CONFIG_SERIAL_DMA is not set
-# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_UART1_SERIAL_CONSOLE is not set
@@ -424,17 +410,22 @@ CONFIG_UART1_2STOP=0
 # CONFIG_UART1_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -464,12 +455,6 @@ CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -490,6 +475,10 @@ CONFIG_HEAP2_SIZE=0
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -507,7 +496,7 @@ CONFIG_HEAP2_SIZE=0
 #
 # Standard C Library Options
 #
-CONFIG_STDIO_BUFFER_SIZE=0
+CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STDIO_LINEBUFFER=y
 CONFIG_NUNGET_CHARS=0
 # CONFIG_LIBM is not set
@@ -529,14 +518,16 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_ARCH_HAVE_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -563,10 +554,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_LEDS is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -575,11 +567,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 CONFIG_EXAMPLES_OSTEST=y
 CONFIG_EXAMPLES_OSTEST_LOOPS=1
@@ -590,29 +582,34 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 
 #
 # File System Utilities
 #
 # CONFIG_FSUTILS_INIFILE is not set
 
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -623,8 +620,8 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -635,6 +632,7 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 # Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
@@ -656,16 +654,16 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 # CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
 # CONFIG_SYSTEM_SUDOKU is not set
-# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/zkit-arm-1769/README.txt b/configs/zkit-arm-1769/README.txt
index 7c27c53144750e63841457d07f37ae449d227400..b645c7f6b249a655d5d9c5555c0eb59bb9f7e4b3 100644
--- a/configs/zkit-arm-1769/README.txt
+++ b/configs/zkit-arm-1769/README.txt
@@ -469,9 +469,9 @@ ZKit-ARM Configuration Options
     CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18
     CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented).
     CONFIG_NET_REGDEBUG - Enabled low level register debug.  Also needs
-      CONFIG_DEBUG.
+      CONFIG_DEBUG_FEATURES.
     CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets.
-      Also needs CONFIG_DEBUG.
+      Also needs CONFIG_DEBUG_FEATURES.
     CONFIG_NET_HASH - Enable receipt of near-perfect match frames.
     CONFIG_LPC17_MULTICAST - Enable receipt of multicast (and unicast) frames.
       Automatically set if CONFIG_NET_IGMP is selected.
diff --git a/configs/zkit-arm-1769/hello/Make.defs b/configs/zkit-arm-1769/hello/Make.defs
index 102dbfe1c4b8f66d3539912f9a0b8653e632282d..c1e800774275a669f9332755fa0c9de55e3472ec 100644
--- a/configs/zkit-arm-1769/hello/Make.defs
+++ b/configs/zkit-arm-1769/hello/Make.defs
@@ -84,7 +84,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/zkit-arm-1769/hello/defconfig b/configs/zkit-arm-1769/hello/defconfig
index 4cbbb539541049de8e7cce19a0f8ffde36f136c5..57c0eb7c5e459c0c60f0f9c39861871aa5422ee2 100644
--- a/configs/zkit-arm-1769/hello/defconfig
+++ b/configs/zkit-arm-1769/hello/defconfig
@@ -37,14 +37,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -92,7 +96,11 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -102,14 +110,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -119,6 +138,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -126,7 +146,6 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 CONFIG_ARMV7M_OABI_TOOLCHAIN=y
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -201,6 +220,7 @@ CONFIG_LPC17_UART0=y
 #
 # Serial driver options
 #
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
 # Ethernet driver options
@@ -212,6 +232,7 @@ CONFIG_NET_NRXDESC=13
 # CONFIG_NET_WOL is not set
 # CONFIG_NET_HASH is not set
 # CONFIG_LPC17_MULTICAST is not set
+CONFIG_LPC17_ETHERNET_HPWORK=y
 
 #
 # Architecture Options
@@ -224,11 +245,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -273,6 +297,7 @@ CONFIG_RAM_SIZE=32768
 #
 # CONFIG_ARCH_BOARD_LPCXPRESSO is not set
 # CONFIG_ARCH_BOARD_MBED is not set
+# CONFIG_ARCH_BOARD_U_BLOX_C027 is not set
 CONFIG_ARCH_BOARD_ZKITARM=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="zkit-arm-1769"
@@ -286,6 +311,7 @@ CONFIG_ARCH_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -304,6 +330,7 @@ CONFIG_DISABLE_MQUEUE=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=3
@@ -321,6 +348,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="hello_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -351,6 +379,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -359,9 +388,10 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -385,6 +415,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -395,16 +426,21 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -412,8 +448,28 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -421,7 +477,11 @@ CONFIG_NETDEVICES=y
 #
 # General Ethernet MAC Driver Options
 #
+# CONFIG_NETDEV_LOOPBACK is not set
+# CONFIG_NETDEV_TELNET is not set
 # CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
+# CONFIG_NETDEV_LATEINIT is not set
 
 #
 # External Ethernet MAC Device Support
@@ -429,9 +489,9 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
-# CONFIG_NET_VNET is not set
+# CONFIG_NET_FTMAC100 is not set
 
 #
 # External Ethernet PHY Device Support
@@ -449,14 +509,16 @@ CONFIG_ETH0_PHY_DP83848C=y
 # CONFIG_ETH0_PHY_LAN8720 is not set
 # CONFIG_ETH0_PHY_LAN8740 is not set
 # CONFIG_ETH0_PHY_LAN8740A is not set
+# CONFIG_ETH0_PHY_LAN8742A is not set
 # CONFIG_ETH0_PHY_DM9161 is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -480,13 +542,10 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -503,19 +562,27 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -523,13 +590,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -539,6 +604,7 @@ CONFIG_NET_GUARDSIZE=2
 #
 # CONFIG_NET_MULTILINK is not set
 CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
 # CONFIG_NET_TUN is not set
 
 #
@@ -624,6 +690,7 @@ CONFIG_IOB_NCHAINS=8
 # Routing Table Configuration
 #
 # CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME=""
 
 #
 # Crypto API
@@ -647,16 +714,11 @@ CONFIG_FS_READABLE=y
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 CONFIG_FS_ROMFS=y
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -675,6 +737,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -702,6 +768,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -717,13 +785,18 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -736,26 +809,27 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 CONFIG_EXAMPLES_HELLO=y
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
+CONFIG_EXAMPLES_HELLO_PRIORITY=100
+CONFIG_EXAMPLES_HELLO_STACKSIZE=2048
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -764,20 +838,19 @@ CONFIG_EXAMPLES_HELLO=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
@@ -785,19 +858,30 @@ CONFIG_EXAMPLES_HELLO=y
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_UNIONFS is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -809,33 +893,32 @@ CONFIG_EXAMPLES_HELLO=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_NETLIB is not set
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
 # CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_NETLIB is not set
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -853,15 +936,17 @@ CONFIG_EXAMPLES_HELLO=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/zkit-arm-1769/include/board.h b/configs/zkit-arm-1769/include/board.h
index 544ce3d133e5fe9d84879bb6bb17da71cfa0046f..5003145d5228fc13de6293d999fb19f3b7c83050 100644
--- a/configs/zkit-arm-1769/include/board.h
+++ b/configs/zkit-arm-1769/include/board.h
@@ -50,7 +50,7 @@
 
 #include 
 
-#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ)
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_GPIOIRQ)
 #  include 
 #endif
 
diff --git a/configs/zkit-arm-1769/nsh/Make.defs b/configs/zkit-arm-1769/nsh/Make.defs
index c53eade8a423cb3e9028cbc9a7e2cddacb6e654d..d8a9f5a1f6955c416120b9c6d04519351ae3a361 100644
--- a/configs/zkit-arm-1769/nsh/Make.defs
+++ b/configs/zkit-arm-1769/nsh/Make.defs
@@ -84,7 +84,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/zkit-arm-1769/nsh/defconfig b/configs/zkit-arm-1769/nsh/defconfig
index 250f73fecf090037be4f3ccf4fe621c81ed9a7cb..812afbc929bb98bd7621fc162167874400cbc8c4 100644
--- a/configs/zkit-arm-1769/nsh/defconfig
+++ b/configs/zkit-arm-1769/nsh/defconfig
@@ -37,14 +37,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -93,7 +97,9 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
@@ -104,14 +110,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -121,6 +138,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -128,7 +146,6 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 CONFIG_ARMV7M_OABI_TOOLCHAIN=y
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -203,6 +220,7 @@ CONFIG_LPC17_SPI=y
 #
 # Serial driver options
 #
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
 # Ethernet driver options
@@ -214,6 +232,7 @@ CONFIG_NET_NRXDESC=6
 # CONFIG_NET_WOL is not set
 # CONFIG_NET_HASH is not set
 # CONFIG_LPC17_MULTICAST is not set
+CONFIG_LPC17_ETHERNET_HPWORK=y
 
 #
 # Architecture Options
@@ -226,6 +245,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -277,6 +297,7 @@ CONFIG_RAM_SIZE=32768
 #
 # CONFIG_ARCH_BOARD_LPCXPRESSO is not set
 # CONFIG_ARCH_BOARD_MBED is not set
+# CONFIG_ARCH_BOARD_U_BLOX_C027 is not set
 CONFIG_ARCH_BOARD_ZKITARM=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="zkit-arm-1769"
@@ -286,19 +307,15 @@ CONFIG_ARCH_BOARD="zkit-arm-1769"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -318,6 +335,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=2
@@ -372,6 +390,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -387,9 +406,10 @@ CONFIG_SIG_SIGWORK=17
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -413,6 +433,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -428,10 +449,15 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 # CONFIG_SPI_EXCHANGE is not set
 # CONFIG_SPI_CMDDATA is not set
 # CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
@@ -439,6 +465,7 @@ CONFIG_SPI=y
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -446,7 +473,26 @@ CONFIG_SPI=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -458,6 +504,7 @@ CONFIG_MMCSD_SPICLOCK=12500000
 CONFIG_MMCSD_SPIMODE=0
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -479,10 +526,9 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -506,9 +552,10 @@ CONFIG_ETH0_PHY_DP83848C=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -532,10 +579,6 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -558,19 +601,26 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
 # CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -578,13 +628,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -713,7 +761,9 @@ CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
 # CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
 # CONFIG_NFS is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
@@ -722,12 +772,6 @@ CONFIG_FAT_MAXFNAME=32
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -746,6 +790,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -773,6 +821,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -790,7 +840,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
 # CONFIG_NETDB_HOSTFILE is not set
 CONFIG_NETDB_DNSCLIENT=y
@@ -798,14 +849,17 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=8
 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32
 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600
 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96
+# CONFIG_NETDB_RESOLVCONF is not set
 CONFIG_NETDB_DNSSERVER_NOADDR=y
 # CONFIG_NETDB_DNSSERVER_IPv4 is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -824,18 +878,20 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FSTEST is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
@@ -845,41 +901,47 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -892,8 +954,9 @@ CONFIG_EXAMPLES_NSH=y
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -906,25 +969,27 @@ CONFIG_EXAMPLES_NSH=y
 # CONFIG_NETUTILS_CODECS is not set
 CONFIG_NETUTILS_DHCPC=y
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -943,6 +1008,7 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
 # CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
@@ -969,13 +1035,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
 # CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -985,6 +1051,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -992,6 +1059,9 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Configure Command Options
@@ -1017,6 +1087,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1046,6 +1117,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
 CONFIG_NSH_TELNETD_CLIENTPRIO=100
 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
 CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 # CONFIG_NSH_TELNET_LOGIN is not set
 
 #
@@ -1060,13 +1133,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1075,5 +1147,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/zkit-arm-1769/nxhello/Make.defs b/configs/zkit-arm-1769/nxhello/Make.defs
index ae83d3bf59e4a7b0ef5e22edb060a6d64ef99d0e..18df46e580473ed583af637076dbdd75e8522706 100644
--- a/configs/zkit-arm-1769/nxhello/Make.defs
+++ b/configs/zkit-arm-1769/nxhello/Make.defs
@@ -84,7 +84,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/zkit-arm-1769/nxhello/defconfig b/configs/zkit-arm-1769/nxhello/defconfig
index fb677a4b2f2bfd18248fbdfd06a5c63e3f297c63..8534d9b0628f79d918ab1e75b1053c681b705fb3 100644
--- a/configs/zkit-arm-1769/nxhello/defconfig
+++ b/configs/zkit-arm-1769/nxhello/defconfig
@@ -37,14 +37,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -93,7 +97,9 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
 # CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
 # CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
@@ -104,14 +110,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -121,6 +138,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -128,7 +146,6 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 CONFIG_ARMV7M_OABI_TOOLCHAIN=y
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -203,6 +220,7 @@ CONFIG_LPC17_SSP0=y
 #
 # Serial driver options
 #
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
 # Ethernet driver options
@@ -214,6 +232,7 @@ CONFIG_NET_NRXDESC=6
 # CONFIG_NET_WOL is not set
 # CONFIG_NET_HASH is not set
 # CONFIG_LPC17_MULTICAST is not set
+CONFIG_LPC17_ETHERNET_HPWORK=y
 
 #
 # Architecture Options
@@ -226,6 +245,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
@@ -277,6 +297,7 @@ CONFIG_RAM_SIZE=32768
 #
 # CONFIG_ARCH_BOARD_LPCXPRESSO is not set
 # CONFIG_ARCH_BOARD_MBED is not set
+# CONFIG_ARCH_BOARD_U_BLOX_C027 is not set
 CONFIG_ARCH_BOARD_ZKITARM=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="zkit-arm-1769"
@@ -286,19 +307,15 @@ CONFIG_ARCH_BOARD="zkit-arm-1769"
 #
 CONFIG_ARCH_HAVE_LEDS=y
 CONFIG_ARCH_LEDS=y
-CONFIG_NSH_MMCSDMINOR=0
-CONFIG_NSH_MMCSDSLOTNO=0
-CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 CONFIG_LIB_BOARDCTL=y
 # CONFIG_BOARDCTL_RESET is not set
 # CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
-# CONFIG_BOARDCTL_PWMTEST is not set
 # CONFIG_BOARDCTL_GRAPHICS is not set
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -318,6 +335,7 @@ CONFIG_DISABLE_OS_API=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=2
@@ -372,6 +390,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -387,9 +406,10 @@ CONFIG_SIG_SIGWORK=17
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -413,6 +433,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 CONFIG_DISABLE_POLL=y
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -428,10 +449,15 @@ CONFIG_DEV_NULL=y
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_SPI_SLAVE is not set
 # CONFIG_SPI_EXCHANGE is not set
 CONFIG_SPI_CMDDATA=y
 # CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_I2S is not set
 
@@ -439,6 +465,7 @@ CONFIG_SPI_CMDDATA=y
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -446,10 +473,20 @@ CONFIG_SPI_CMDDATA=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 # CONFIG_LCD_NOGETRUN is not set
@@ -464,6 +501,7 @@ CONFIG_LCD_MAXPOWER=1
 # CONFIG_LCD_MIO283QT2 is not set
 # CONFIG_LCD_MIO283QT9A is not set
 # CONFIG_LCD_UG9664HSWAG01 is not set
+# CONFIG_LCD_SH1106_OLED_132 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
 # CONFIG_LCD_SSD1351 is not set
@@ -484,11 +522,15 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
 # CONFIG_LCD_RA8875 is not set
+# CONFIG_SLCD is not set
 
 #
-# Alphanumeric/Segment LCD Devices
+# LED Support
 #
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 CONFIG_MMCSD=y
 CONFIG_MMCSD_NSLOTS=1
 # CONFIG_MMCSD_READONLY is not set
@@ -500,6 +542,7 @@ CONFIG_MMCSD_SPICLOCK=12500000
 CONFIG_MMCSD_SPIMODE=0
 # CONFIG_ARCH_HAVE_SDIO is not set
 # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -521,10 +564,9 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
 # CONFIG_NET_FTMAC100 is not set
-# CONFIG_NET_VNET is not set
 
 #
 # External Ethernet PHY Device Support
@@ -548,9 +590,10 @@ CONFIG_ETH0_PHY_DP83848C=y
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -574,10 +617,6 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
@@ -600,19 +639,26 @@ CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
 # CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -620,13 +666,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -759,12 +803,6 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -773,6 +811,7 @@ CONFIG_NX_LCDDRIVER=y
 CONFIG_NX_NPLANES=1
 CONFIG_NX_BGCOLOR=0x0
 # CONFIG_NX_WRITEONLY is not set
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -871,6 +910,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -898,6 +941,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -913,7 +958,8 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 CONFIG_LIBC_NETDB=y
 CONFIG_NETDB_DNSCLIENT=y
 CONFIG_NETDB_DNSCLIENT_ENTRIES=8
@@ -926,8 +972,10 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -946,17 +994,19 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 #
 # Examples
 #
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
-# CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
 # CONFIG_EXAMPLES_ELF is not set
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
 # CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
@@ -967,7 +1017,6 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 CONFIG_EXAMPLES_NXHELLO=y
 CONFIG_EXAMPLES_NXHELLO_VPLANE=0
@@ -988,36 +1037,42 @@ CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y
 # CONFIG_EXAMPLES_NXHELLO_EXTERNINIT is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
-# CONFIG_EXAMPLES_PIPE is not set
-# CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
 # CONFIG_EXAMPLES_UDP is not set
 # CONFIG_EXAMPLES_UDPBLASTER is not set
-# CONFIG_EXAMPLES_DISCOVER is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 
 #
 # File System Utilities
 #
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -1029,8 +1084,9 @@ CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
 # FreeModBus
@@ -1043,25 +1099,27 @@ CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y
 # CONFIG_NETUTILS_CODECS is not set
 CONFIG_NETUTILS_DHCPC=y
 # CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
 # CONFIG_NETUTILS_SMTP is not set
 CONFIG_NETUTILS_TELNETD=y
 CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_NETLIB=y
 CONFIG_NETUTILS_WEBCLIENT=y
 CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)"
 CONFIG_WEBCLIENT_TIMEOUT=10
 # CONFIG_NETUTILS_WEBSERVER is not set
-# CONFIG_NETUTILS_NTPCLIENT is not set
-# CONFIG_NETUTILS_DISCOVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
-# CONFIG_NETUTILS_PPPD is not set
 
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -1080,6 +1138,7 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_ARP is not set
 # CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
@@ -1105,13 +1164,13 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFIFO is not set
 # CONFIG_NSH_DISABLE_MKRD is not set
 # CONFIG_NSH_DISABLE_MH is not set
 # CONFIG_NSH_DISABLE_MOUNT is not set
 # CONFIG_NSH_DISABLE_MV is not set
 # CONFIG_NSH_DISABLE_MW is not set
 # CONFIG_NSH_DISABLE_NSLOOKUP is not set
+CONFIG_NSH_DISABLE_PRINTF=y
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NSH_DISABLE_PING is not set
 # CONFIG_NSH_DISABLE_PUT is not set
@@ -1121,6 +1180,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -1128,6 +1188,9 @@ CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_USLEEP is not set
 # CONFIG_NSH_DISABLE_WGET is not set
 # CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=0
 
 #
 # Configure Command Options
@@ -1153,6 +1216,7 @@ CONFIG_NSH_ARCHINIT=y
 #
 # Networking Configuration
 #
+CONFIG_NSH_NETINIT=y
 # CONFIG_NSH_NETINIT_THREAD is not set
 
 #
@@ -1182,6 +1246,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
 CONFIG_NSH_TELNETD_CLIENTPRIO=100
 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
 CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 # CONFIG_NSH_TELNET_LOGIN is not set
 
 #
@@ -1196,13 +1262,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_NETDB is not set
 # CONFIG_SYSTEM_RAMTEST is not set
 CONFIG_READLINE_HAVE_EXTMATCH=y
@@ -1211,5 +1276,8 @@ CONFIG_READLINE_ECHO=y
 # CONFIG_READLINE_TABCOMPLETION is not set
 # CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/zkit-arm-1769/src/Makefile b/configs/zkit-arm-1769/src/Makefile
index 80905b88538044e8c6d5695c7a1ff6dfb78651c1..9e1a628a18460f4f21727eedce6fc6575a7f628a 100644
--- a/configs/zkit-arm-1769/src/Makefile
+++ b/configs/zkit-arm-1769/src/Makefile
@@ -6,7 +6,7 @@
 #
 # Based on configs/lpcxpresso-lpc1768/src/Makefile
 #
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+#   Copyright (C) 201, 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
diff --git a/configs/zkit-arm-1769/src/lpc17_adc.c b/configs/zkit-arm-1769/src/lpc17_adc.c
index 091d859bd6b7c83442cb879b703091b06720ab81..207aa83f82c8cda14825bb51db8aa05c5b0eab53 100644
--- a/configs/zkit-arm-1769/src/lpc17_adc.c
+++ b/configs/zkit-arm-1769/src/lpc17_adc.c
@@ -6,7 +6,7 @@
  *
  * Based on configs/stm3220g-eval/src/lpc17_adc.c
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -76,15 +76,14 @@
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_adc_setup
+ * Name: zkit_adc_setup
  *
  * Description:
- *   All LPC17 architectures must provide the following interface to work with
- *   examples/adc.
+ *   Initialize ADC and register the ADC driver.
  *
  ************************************************************************************/
 
-int board_adc_setup(void)
+int zkit_adc_setup(void)
 {
   static bool initialized = false;
   struct adc_dev_s *adc;
@@ -99,7 +98,7 @@ int board_adc_setup(void)
       adc = lpc17_adcinitialize();
       if (adc == NULL)
         {
-          adbg("ERROR: Failed to get ADC interface\n");
+          aerr("ERROR: ERROR: Failed to get ADC interface\n");
           return -ENODEV;
         }
 
@@ -108,7 +107,7 @@ int board_adc_setup(void)
       ret = adc_register("/dev/adc0", adc);
       if (ret < 0)
         {
-          adbg("adc_register failed: %d\n", ret);
+          aerr("ERROR: adc_register failed: %d\n", ret);
           return ret;
         }
 
diff --git a/configs/zkit-arm-1769/src/lpc17_appinit.c b/configs/zkit-arm-1769/src/lpc17_appinit.c
index 9817d76c336098a394c44e6738e039553bffdc78..b98cb2bab9c2a3a23c2abc2600621cac76a839ef 100644
--- a/configs/zkit-arm-1769/src/lpc17_appinit.c
+++ b/configs/zkit-arm-1769/src/lpc17_appinit.c
@@ -6,7 +6,7 @@
  *
  * Based on config/lpcxpresso-lpc1768/src/lpc17_appinit.c
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -53,6 +53,7 @@
 #include 
 
 #include "lpc17_spi.h"
+#include "zkit-arm-1769.h"
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -116,14 +117,14 @@
 /* Debug ********************************************************************/
 
 #ifdef CONFIG_CPP_HAVE_VARARGS
-#  ifdef CONFIG_DEBUG
-#    define message(...) lib_lowprintf(__VA_ARGS__)
+#  ifdef CONFIG_DEBUG_INFO
+#    define message(...) _info(__VA_ARGS__)
 #  else
 #    define message(...) printf(__VA_ARGS__)
 #  endif
 #else
-#  ifdef CONFIG_DEBUG
-#    define message lib_lowprintf
+#  ifdef CONFIG_DEBUG_INFO
+#    define message _info
 #  else
 #    define message printf
 #  endif
@@ -160,9 +161,10 @@
 
 int board_app_initialize(uintptr_t arg)
 {
+  int ret;
+
 #ifdef CONFIG_NSH_HAVEMMCSD
   FAR struct spi_dev_s *spi;
-  int ret;
 
   /* Get the SPI port */
 
@@ -190,5 +192,27 @@ int board_app_initialize(uintptr_t arg)
   message("Successfuly bound SPI port %d to MMC/SD slot %d\n",
           CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO);
 #endif
+
+#ifdef CONFIG_ADC
+  /* Initialize ADC and register the ADC driver. */
+
+  ret = zkit_adc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: zkit_adc_setup failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_CAN
+  /* Initialize CAN and register the CAN driver. */
+
+  ret = zkit_can_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: zkit_can_setup failed: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
   return OK;
 }
diff --git a/configs/zkit-arm-1769/src/lpc17_buttons.c b/configs/zkit-arm-1769/src/lpc17_buttons.c
index d33219c98d23b072677235b1dfca8e42a46fd027..6c98465032369118cb9bb1cf6ee5a64643ab6365 100644
--- a/configs/zkit-arm-1769/src/lpc17_buttons.c
+++ b/configs/zkit-arm-1769/src/lpc17_buttons.c
@@ -6,7 +6,7 @@
  *
  * Based on configs/stm3210e-eval/src/board_buttons.c
  *
- *   Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2011, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -76,10 +76,6 @@ static const uint16_t g_buttons[BOARD_NUM_BUTTONS] =
   ZKITARM_KEY1, ZKITARM_KEY2, ZKITARM_KEY3, ZKITARM_KEY4, ZKITARM_KEY5
 };
 
-/* Old KEY5 interrupt handler */
-
-static xcpt_t g_oldhandler;
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -154,27 +150,21 @@ uint8_t board_buttons(void)
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource. See the
  *   BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
+ *   value.
  *
  ************************************************************************************/
 
-#if defined CONFIG_ARCH_IRQBUTTONS && CONFIG_GPIO_IRQ
-xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+#if defined CONFIG_ARCH_IRQBUTTONS && CONFIG_LPC17_GPIOIRQ
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
 {
-  xcpt_t rethandler = NULL;
   irqstate_t flags;
-  int ret;
+  int ret = -EINVAL;
 
   /* Interrupts are supported on KEY5 only */
 
   if (id == BOARD_BUTTON_5)
     {
-      /* Return the previous value of the interrupt handler */
-
       flags = enter_critical_section();
-      rethandler   = g_oldhandler;
-      g_oldhandler = irqhandler;
 
       /* Attach or detach the interrupt handler for KEY5. */
 
@@ -186,7 +176,7 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
 
           /* Attach the new interrupt handler and enable the interrupt */
 
-          ret = irq_attach(ZKITARM_KEY5_IRQ, irqhandler);
+          ret = irq_attach(ZKITARM_KEY5_IRQ, irqhandler, arg);
           if (ret == OK)
             {
               up_enable_irq(ZKITARM_KEY5_IRQ);
@@ -202,13 +192,13 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
           /* Configure KEY5 as a non-interrupting input */
 
           lpc17_configgpio(ZKITARM_KEY5);
-
+          ret = OK;
         }
 
       leave_critical_section(flags);
     }
 
-  return rethandler;
+  return ret;
 }
 
 #endif
diff --git a/configs/zkit-arm-1769/src/lpc17_can.c b/configs/zkit-arm-1769/src/lpc17_can.c
index 4d63da365bdcb3d0dd68948a7fda31101194587c..6b4a1021f8c7baa0fb9ba7acaa6fc5ad6f2b6716 100644
--- a/configs/zkit-arm-1769/src/lpc17_can.c
+++ b/configs/zkit-arm-1769/src/lpc17_can.c
@@ -6,7 +6,7 @@
  *
  *   Based on configs/olimex-lpc1766stk/src/lpc17_can.c
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -47,7 +47,7 @@
 #include 
 #include 
 
-#include 
+#include 
 #include 
 
 #include "chip.h"
@@ -56,104 +56,78 @@
 #include "lpc17_can.h"
 #include "zkit-arm-1769.h"
 
-#if defined(CONFIG_CAN) && (defined(CONFIG_LPC17_CAN1) || defined(CONFIG_LPC17_CAN2))
+#ifdef CONFIG_CAN
 
 /************************************************************************************
  * Pre-processor Definitions
  ************************************************************************************/
 /* Configuration ********************************************************************/
+
 #define CAN_PORT1 1
 #define CAN_PORT2 2
 
-
-/* Debug ***************************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
-
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
-#else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
 
 /************************************************************************************
- * Name: board_can_initialize
+ * Name: zkit_can_setup
  *
  * Description:
- *   All LPC17 architectures must provide the following interface to work with
- *   examples/can.
+ *  Initialize CAN and register the CAN device
  *
  ************************************************************************************/
 
-int board_can_initialize(void)
+int zkit_can_setup(void)
 {
-  static bool initialized = false;
+#if defined(CONFIG_LPC17_CAN1) || defined(CONFIG_LPC17_CAN2)
   struct can_dev_s *can;
   int ret;
 
-  /* Check if we have already initialized */
+#ifdef CONFIG_LPC17_CAN1
+  /* Call lpc17_caninitialize() to get an instance of the CAN1 interface */
 
-  if (!initialized)
+  can = lpc17_caninitialize(CAN_PORT1);
+  if (can == NULL)
     {
-#ifdef CONFIG_LPC17_CAN1
-      /* Call lpc17_caninitialize() to get an instance of the CAN1 interface */
-
-      can = lpc17_caninitialize(CAN_PORT1);
-      if (can == NULL)
-        {
-          candbg("ERROR:  Failed to get CAN1 interface\n");
-          return -ENODEV;
-        }
-
-      /* Register the CAN1 driver at "/dev/can0" */
-
-      ret = can_register("/dev/can0", can);
-      if (ret < 0)
-        {
-          candbg("ERROR: CAN1 register failed: %d\n", ret);
-          return ret;
-        }
+      canerr("ERROR:  Failed to get CAN1 interface\n");
+      return -ENODEV;
+    }
+
+  /* Register the CAN1 driver at "/dev/can0" */
+
+  ret = can_register("/dev/can0", can);
+  if (ret < 0)
+    {
+      canerr("ERROR: CAN1 register failed: %d\n", ret);
+      return ret;
+    }
 #endif
 
 #ifdef CONFIG_LPC17_CAN2
-      /* Call lpc17_caninitialize() to get an instance of the CAN2 interface */
-
-      can = lpc17_caninitialize(CAN_PORT2);
-      if (can == NULL)
-        {
-          candbg("ERROR:  Failed to get CAN2 interface\n");
-          return -ENODEV;
-        }
-
-      /* Register the CAN2 driver at "/dev/can1" */
-
-      ret = can_register("/dev/can1", can);
-      if (ret < 0)
-        {
-          candbg("ERROR: CAN2 register failed: %d\n", ret);
-          return ret;
-        }
-#endif
+  /* Call lpc17_caninitialize() to get an instance of the CAN2 interface */
+
+  can = lpc17_caninitialize(CAN_PORT2);
+  if (can == NULL)
+    {
+      canerr("ERROR:  Failed to get CAN2 interface\n");
+      return -ENODEV;
+    }
 
-      /* Now we are initialized */
+  /* Register the CAN2 driver at "/dev/can1" */
 
-      initialized = true;
+  ret = can_register("/dev/can1", can);
+  if (ret < 0)
+    {
+      canerr("ERROR: CAN2 register failed: %d\n", ret);
+      return ret;
     }
+#endif
 
   return OK;
+#else
+  return -ENODEV;
+#endif
 }
 
-#endif /* CONFIG_CAN && (CONFIG_LPC17_CAN1 || CONFIG_LPC17_CAN2) */
+#endif /* CONFIG_CAN */
diff --git a/configs/zkit-arm-1769/src/lpc17_dac.c b/configs/zkit-arm-1769/src/lpc17_dac.c
index 3f3362cd4716c8ef7e40cbf0d3a05ffadd67e0c3..70616d39a45193a2b5aa39cde9cc1266aa97e834 100644
--- a/configs/zkit-arm-1769/src/lpc17_dac.c
+++ b/configs/zkit-arm-1769/src/lpc17_dac.c
@@ -80,14 +80,14 @@ int dac_devinit(void)
     dac = lpc17_dacinitialize();
     if (dac == NULL)
       {
-        adbg("ERROR: Failed to get dac interface\n");
+        aerr("ERROR: Failed to get dac interface\n");
         return -ENODEV;
       }
 
     ret = dac_register("/dev/dac0", dac);
     if (ret < 0)
       {
-        adbg("dac_register failed: %d\n", ret);
+        aerr("ERROR: dac_register failed: %d\n", ret);
         return ret;
       }
 
diff --git a/configs/zkit-arm-1769/src/lpc17_lcd.c b/configs/zkit-arm-1769/src/lpc17_lcd.c
index 01bf1d58a8dc95f6fad98c7cec33c1f2c521edf4..f02977316987bde730024182db01ad2cbaf59fe7 100644
--- a/configs/zkit-arm-1769/src/lpc17_lcd.c
+++ b/configs/zkit-arm-1769/src/lpc17_lcd.c
@@ -64,30 +64,6 @@
 
 #ifdef CONFIG_NX_LCDDRIVER
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* Enables debug output from this file (needs CONFIG_DEBUG with
- * CONFIG_DEBUG_VERBOSE too)
- */
-
-#undef LCD_DEBUG   /* Define to enable debug */
-#undef LCD_VERBOSE /* Define to enable verbose debug */
-
-#ifdef LCD_DEBUG
-#  define leddbg  lldbg
-#  ifdef LCD_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  undef LCD_VERBOSE
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
@@ -95,10 +71,6 @@
 FAR struct spi_dev_s *g_spidev;
 FAR struct lcd_dev_s *g_lcddev;
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -118,7 +90,7 @@ int board_lcd_initialize(void)
   g_spidev = lpc17_sspbus_initialize(0);
   if (!g_spidev)
     {
-      glldbg("Failed to initialize SSP port 0\n");
+      lcderr("ERROR: Failed to initialize SSP port 0\n");
       return 0;
     }
 
@@ -137,13 +109,14 @@ FAR struct lcd_dev_s *board_lcd_getdev(int lcddev)
   g_lcddev = st7567_initialize(g_spidev, lcddev);
   if (!g_lcddev)
     {
-      glldbg("Failed to bind SSI port 0 to OLCD %d: %d\n", lcddev);
+      lcderr("ERROR: Failed to bind SSI port 0 to OLCD %d: %d\n", lcddev);
     }
   else
     {
-      gllvdbg("Bound SSI port 0 to OLCD %d\n", lcddev);
+      lcdinfo("Bound SSI port 0 to OLCD %d\n", lcddev);
 
       /* And turn the OLCD on (CONFIG_LCD_MAXPOWER should be 1) */
+
       (void)g_lcddev->setpower(g_lcddev, CONFIG_LCD_MAXPOWER);
       return g_lcddev;
     }
diff --git a/configs/zkit-arm-1769/src/lpc17_leds.c b/configs/zkit-arm-1769/src/lpc17_leds.c
index 5f8454463d51a3f52754f504d779917bf9de54c7..59c9fd6d838c3468b154f42604e9fe9d5da6b295 100644
--- a/configs/zkit-arm-1769/src/lpc17_leds.c
+++ b/configs/zkit-arm-1769/src/lpc17_leds.c
@@ -58,26 +58,6 @@
 
 #ifdef CONFIG_ARCH_LEDS
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * and pherhaps CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define leddbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define ledvdbg lldbg
-#  else
-#    define ledvdbg(x...)
-#  endif
-#else
-#  define leddbg(x...)
-#  define ledvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
diff --git a/configs/zkit-arm-1769/src/lpc17_spi.c b/configs/zkit-arm-1769/src/lpc17_spi.c
index 3adb005d89bc340a9bce93c3b31ecae387127f3b..4418cb5bdfc45ab1ac8467ddc4fea4ff4a602148 100644
--- a/configs/zkit-arm-1769/src/lpc17_spi.c
+++ b/configs/zkit-arm-1769/src/lpc17_spi.c
@@ -63,32 +63,14 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* CONFIG_DEBUG_SPI enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_SPI_INFO
 #  define spi_dumpgpio(m) lpc17_dumpgpio(SDCCS_GPIO, m)
 #else
 #  define spi_dumpgpio(m)
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -143,7 +125,7 @@ void weak_function zkit_spidev_initialize(void)
 
 void  lpc17_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
   spi_dumpgpio("lpc17_spiselect() Entry");
 
   if (devid == SPIDEV_MMCSD)
@@ -164,12 +146,12 @@ uint8_t lpc17_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 
       if (lpc17_gpioread(ZKITARM_SD_CD) == 0)
         {
-          spidbg("Returning SPI_STATUS_PRESENT\n");
+          spiinfo("Returning SPI_STATUS_PRESENT\n");
           return SPI_STATUS_PRESENT;
         }
     }
 
-  spidbg("Returning zero\n");
+  spiinfo("Returning zero\n");
   return 0;
 }
 
diff --git a/configs/zkit-arm-1769/src/lpc17_ssp.c b/configs/zkit-arm-1769/src/lpc17_ssp.c
index d72192c367d0a620956a92ce82c4a068c8ba5902..09cf3833c85bbe6cd8697516324c4224b13e5380 100644
--- a/configs/zkit-arm-1769/src/lpc17_ssp.c
+++ b/configs/zkit-arm-1769/src/lpc17_ssp.c
@@ -63,32 +63,14 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-/* CONFIG_DEBUG_SPI enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define sspdbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define sspvdbg lldbg
-#  else
-#    define sspvdbg(x...)
-#  endif
-#else
-#  define sspdbg(x...)
-#  define sspvdbg(x...)
-#endif
-
 /* Dump GPIO registers */
 
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#ifdef CONFIG_DEBUG_SPI_INFO
 #  define ssp_dumpgpio(m) lpc17_dumpgpio(SDCCS_GPIO, m)
 #else
 #  define ssp_dumpgpio(m)
 #endif
 
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -146,7 +128,7 @@ void weak_function zkit_sspdev_initialize(void)
 #ifdef CONFIG_LPC17_SSP1
 void  lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
   ssp_dumpgpio("lpc17_ssp1select() Entry");
 
 #warning "Assert CS here (false)"
@@ -156,7 +138,7 @@ void  lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
 
 uint8_t lpc17_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  sspdbg("Returning SPI_STATUS_PRESENT\n");
+  spiinfo("Returning SPI_STATUS_PRESENT\n");
   return SPI_STATUS_PRESENT;
 }
 
@@ -180,7 +162,7 @@ int weak_function lpc17_ssp1cmddata(FAR struct spi_dev_s *dev,
 #ifdef CONFIG_LPC17_SSP0
 void  lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-  sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
   ssp_dumpgpio("lpc17_ssp0select() Entry");
 
 #ifdef CONFIG_NX_LCDDRIVER
@@ -199,11 +181,11 @@ uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
   if (devid == SPIDEV_DISPLAY)
     {
-      sspdbg("Returning SPI_STATUS_PRESENT\n");
+      spiinfo("Returning SPI_STATUS_PRESENT\n");
       return SPI_STATUS_PRESENT;
     }
 
-  sspdbg("Returning zero\n");
+  spiinfo("Returning zero\n");
   return 0;
 }
 
diff --git a/configs/zkit-arm-1769/src/zkit-arm-1769.h b/configs/zkit-arm-1769/src/zkit-arm-1769.h
index 0b51e1f685c2356f9ea40c17325d20660b85459d..1928c0bbb8db7ab1980ab2a693a4cb3fe69a0fdb 100644
--- a/configs/zkit-arm-1769/src/zkit-arm-1769.h
+++ b/configs/zkit-arm-1769/src/zkit-arm-1769.h
@@ -6,7 +6,7 @@
  *
  * Based on configs/lpcxpresso-lpc1768/src/lpcxpresso.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -160,7 +160,7 @@
  */
 
 #define ZKITARM_SD_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN16)
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
 #  define ZKITARM_SD_CD (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN12)
 #else
 #  define ZKITARM_SD_CD (GPIO_INPUT   | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN12)
@@ -182,7 +182,7 @@
  */
 
 #define ZKITARM_USB_CONNECT (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN9)
-#ifdef CONFIG_GPIO_IRQ
+#ifdef CONFIG_LPC17_GPIOIRQ
 #  define ZKITARM_USB_VBUSSENSE (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT1 | GPIO_PIN30)
 #else
 #  define ZKITARM_USB_VBUSSENSE (GPIO_INPUT   | GPIO_PULLUP | GPIO_PORT1 | GPIO_PIN30)
@@ -249,5 +249,29 @@ void weak_function zkit_sspdev_initialize(void);
 
 void weak_function zkit_spidev_initialize(void);
 
+/************************************************************************************
+ * Name: zkit_adc_setup
+ *
+ * Description:
+ *   Initialize ADC and register the ADC driver.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ADC
+int zkit_adc_setup(void);
+#endif
+
+/************************************************************************************
+ * Name: zkit_can_setup
+ *
+ * Description:
+ *  Initialize CAN and register the CAN device
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_CAN
+int zkit_can_setup(void);
+#endif
+
 #endif /* __ASSEMBLY__ */
 #endif /* _CONFIGS_ZKITARM_LPC1768_SRC_ZKITARM_H */
diff --git a/configs/zkit-arm-1769/thttpd/Make.defs b/configs/zkit-arm-1769/thttpd/Make.defs
index a11c2868e8066d90803f38288ecddf43a167b904..018ce9ba7ad0f5622e5de5ab672b2c62d482ea98 100644
--- a/configs/zkit-arm-1769/thttpd/Make.defs
+++ b/configs/zkit-arm-1769/thttpd/Make.defs
@@ -84,7 +84,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHDEFINES =
diff --git a/configs/zkit-arm-1769/thttpd/defconfig b/configs/zkit-arm-1769/thttpd/defconfig
index 5f7f9ab01a813fd62313c083f8cbf2ab11ed57a8..79095b575d28f94702df35116b3f04aa5735fb1d 100644
--- a/configs/zkit-arm-1769/thttpd/defconfig
+++ b/configs/zkit-arm-1769/thttpd/defconfig
@@ -37,14 +37,16 @@ CONFIG_INTELHEX_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,10 +60,12 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
 # CONFIG_ARCH_Z16 is not set
 # CONFIG_ARCH_Z80 is not set
 CONFIG_ARCH="arm"
@@ -71,10 +75,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -92,7 +96,11 @@ CONFIG_ARCH_CHIP_LPC17XX=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 # CONFIG_ARCH_ARM7TDMI is not set
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -102,14 +110,25 @@ CONFIG_ARCH_CORTEXM3=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="armv7-m"
 CONFIG_ARCH_CHIP="lpc17xx"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
 # CONFIG_ARMV7M_USEBASEPRI is not set
 CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_CMNVECTOR is not set
 # CONFIG_ARMV7M_LAZYFPU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
 # CONFIG_ARM_MPU is not set
 
 #
@@ -119,6 +138,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y
 # CONFIG_ARMV7M_HAVE_DCACHE is not set
 # CONFIG_ARMV7M_HAVE_ITCM is not set
 # CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
 CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
 # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
@@ -126,7 +146,6 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 CONFIG_ARMV7M_OABI_TOOLCHAIN=y
 # CONFIG_ARMV7M_HAVE_STACKCHECK is not set
 # CONFIG_ARMV7M_ITMSYSLOG is not set
-# CONFIG_GPIO_IRQ is not set
 # CONFIG_SERIAL_TERMIOS is not set
 
 #
@@ -201,6 +220,7 @@ CONFIG_LPC17_UART0=y
 #
 # Serial driver options
 #
+# CONFIG_LPC17_GPIOIRQ is not set
 
 #
 # Ethernet driver options
@@ -212,6 +232,7 @@ CONFIG_NET_NRXDESC=18
 # CONFIG_NET_WOL is not set
 # CONFIG_NET_HASH is not set
 # CONFIG_LPC17_MULTICAST is not set
+CONFIG_LPC17_ETHERNET_HPWORK=y
 
 #
 # Architecture Options
@@ -224,11 +245,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 CONFIG_ARCH_HAVE_MPU=y
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
 # CONFIG_ARCH_USE_MPU is not set
 # CONFIG_ARCH_IRQPRIO is not set
 CONFIG_ARCH_STACKDUMP=y
@@ -273,6 +297,7 @@ CONFIG_RAM_SIZE=32768
 #
 # CONFIG_ARCH_BOARD_LPCXPRESSO is not set
 # CONFIG_ARCH_BOARD_MBED is not set
+# CONFIG_ARCH_BOARD_U_BLOX_C027 is not set
 CONFIG_ARCH_BOARD_ZKITARM=y
 # CONFIG_ARCH_BOARD_CUSTOM is not set
 CONFIG_ARCH_BOARD="zkit-arm-1769"
@@ -286,6 +311,7 @@ CONFIG_ARCH_LEDS=y
 #
 # Board-Specific Options
 #
+# CONFIG_BOARD_CRASHDUMP is not set
 # CONFIG_LIB_BOARDCTL is not set
 
 #
@@ -304,6 +330,7 @@ CONFIG_DISABLE_MQUEUE=y
 CONFIG_USEC_PER_TICK=10000
 # CONFIG_SYSTEM_TIME64 is not set
 # CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
 # CONFIG_JULIAN_TIME is not set
 CONFIG_START_YEAR=2013
 CONFIG_START_MONTH=2
@@ -321,6 +348,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="thttp_main"
 CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -351,6 +379,7 @@ CONFIG_NAME_MAX=32
 # CONFIG_SCHED_STARTHOOK is not set
 # CONFIG_SCHED_ATEXIT is not set
 # CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
 
 #
 # Signal Numbers
@@ -359,9 +388,10 @@ CONFIG_SIG_SIGUSR1=1
 CONFIG_SIG_SIGUSR2=2
 CONFIG_SIG_SIGALARM=3
 CONFIG_SIG_SIGWORK=17
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 CONFIG_SCHED_WORKQUEUE=y
 CONFIG_SCHED_HPWORK=y
@@ -385,6 +415,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
 # CONFIG_DISABLE_POLL is not set
 CONFIG_DEV_NULL=y
 # CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
 # CONFIG_DEV_LOOP is not set
 
 #
@@ -395,16 +426,21 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
 # CONFIG_I2S is not set
 
 #
 # Timer Driver Support
 #
 # CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
 # CONFIG_RTC is not set
 # CONFIG_WATCHDOG is not set
 # CONFIG_ANALOG is not set
@@ -412,8 +448,28 @@ CONFIG_DEV_NULL=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 CONFIG_NETDEVICES=y
@@ -421,7 +477,11 @@ CONFIG_NETDEVICES=y
 #
 # General Ethernet MAC Driver Options
 #
+# CONFIG_NETDEV_LOOPBACK is not set
+# CONFIG_NETDEV_TELNET is not set
 # CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
+# CONFIG_NETDEV_LATEINIT is not set
 
 #
 # External Ethernet MAC Device Support
@@ -429,9 +489,9 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_DM90x0 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_ENCX24J600 is not set
-# CONFIG_NET_E1000 is not set
+
 # CONFIG_NET_SLIP is not set
-# CONFIG_NET_VNET is not set
+# CONFIG_NET_FTMAC100 is not set
 
 #
 # External Ethernet PHY Device Support
@@ -440,6 +500,7 @@ CONFIG_NETDEVICES=y
 # CONFIG_ETH0_PHY_NONE is not set
 # CONFIG_ETH0_PHY_AM79C874 is not set
 # CONFIG_ETH0_PHY_KS8721 is not set
+# CONFIG_ETH0_PHY_KSZ8041 is not set
 # CONFIG_ETH0_PHY_KSZ8051 is not set
 # CONFIG_ETH0_PHY_KSZ8061 is not set
 # CONFIG_ETH0_PHY_KSZ8081 is not set
@@ -448,14 +509,19 @@ CONFIG_ETH0_PHY_DP83848C=y
 # CONFIG_ETH0_PHY_LAN8720 is not set
 # CONFIG_ETH0_PHY_LAN8740 is not set
 # CONFIG_ETH0_PHY_LAN8740A is not set
+# CONFIG_ETH0_PHY_LAN8742A is not set
 # CONFIG_ETH0_PHY_DM9161 is not set
-# CONFIG_PIPES is not set
+CONFIG_PIPES=y
+CONFIG_DEV_PIPE_MAXSIZE=1024
+CONFIG_DEV_PIPE_SIZE=1024
+CONFIG_DEV_FIFO_SIZE=1024
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -479,13 +545,10 @@ CONFIG_UART0_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_OTHER_SERIAL_CONSOLE is not set
@@ -502,19 +565,27 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
+# CONFIG_PSEUDOTERM is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
+# CONFIG_HAVE_USBTRACE is not set
 # CONFIG_DRIVERS_WIRELESS is not set
-
-#
-# System Logging Device Options
-#
+# CONFIG_DRIVERS_CONTACTLESS is not set
 
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
 
 #
 # Networking Support
@@ -522,13 +593,11 @@ CONFIG_UART0_2STOP=0
 CONFIG_ARCH_HAVE_NET=y
 CONFIG_ARCH_HAVE_PHY=y
 CONFIG_NET=y
-CONFIG_NET_NOINTS=y
 # CONFIG_NET_PROMISCUOUS is not set
 
 #
 # Driver buffer configuration
 #
-# CONFIG_NET_MULTIBUFFER is not set
 CONFIG_NET_ETH_MTU=590
 CONFIG_NET_ETH_TCP_RECVWNDO=536
 CONFIG_NET_GUARDSIZE=2
@@ -538,6 +607,7 @@ CONFIG_NET_GUARDSIZE=2
 #
 # CONFIG_NET_MULTILINK is not set
 CONFIG_NET_ETHERNET=y
+# CONFIG_NET_LOOPBACK is not set
 # CONFIG_NET_TUN is not set
 
 #
@@ -623,6 +693,7 @@ CONFIG_IOB_NCHAINS=8
 # Routing Table Configuration
 #
 # CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME=""
 
 #
 # Crypto API
@@ -646,14 +717,10 @@ CONFIG_FS_READABLE=y
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 CONFIG_FS_ROMFS=y
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -673,6 +740,10 @@ CONFIG_MM_REGIONS=2
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -700,6 +771,8 @@ CONFIG_LIB_HOMEDIR="/"
 # CONFIG_LIBC_FLOATINGPOINT is not set
 CONFIG_LIBC_LONG_LONG=y
 # CONFIG_LIBC_IOCTL_VARIADIC is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
 CONFIG_LIB_RAND_ORDER=1
 # CONFIG_EOL_IS_CR is not set
 # CONFIG_EOL_IS_LF is not set
@@ -715,13 +788,18 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+# CONFIG_NETDB_HOSTFILE is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
 
 #
 # Basic CXX Support
@@ -734,14 +812,14 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -749,11 +827,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -762,20 +840,21 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_ROMFS is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
@@ -783,6 +862,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 CONFIG_EXAMPLES_THTTPD=y
@@ -791,13 +871,24 @@ CONFIG_EXAMPLES_THTTPD_DRIPADDR=0xac100002
 CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_UNIONFS is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_WGET is not set
 # CONFIG_EXAMPLES_XMLRPC is not set
 
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
 #
 # Graphics Support
 #
@@ -809,20 +900,25 @@ CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00
 #
 # CONFIG_INTERPRETERS_BAS is not set
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
+# CONFIG_NETUTILS_CHAT is not set
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_FTPD is not set
 # CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_SMTP is not set
 # CONFIG_NETUTILS_TELNETD is not set
 CONFIG_NETUTILS_THTTPD=y
@@ -857,16 +953,10 @@ CONFIG_THTTPD_IDLE_SEND_LIMIT_SEC=300
 CONFIG_THTTPD_TILDE_MAP_NONE=y
 # CONFIG_THTTPD_GENERATE_INDICES is not set
 # CONFIG_THTTPD_USE_URLPATTERN is not set
-CONFIG_NETUTILS_NETLIB=y
 # CONFIG_NETUTILS_WEBCLIENT is not set
 # CONFIG_NETUTILS_WEBSERVER is not set
 # CONFIG_NETUTILS_XMLRPC is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
@@ -884,15 +974,17 @@ CONFIG_NETUTILS_NETLIB=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
-# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/zp214xpa/nsh/Make.defs b/configs/zp214xpa/nsh/Make.defs
index 5fdba6c38ba82661b59bd1022b4fd7775333c475..aa76faf4f3b08c7486b4b3efe48bc3b1aeb4af86 100644
--- a/configs/zp214xpa/nsh/Make.defs
+++ b/configs/zp214xpa/nsh/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(HOSTOS),Cygwin)
 endif
 endif
 
-ifeq ("${CONFIG_DEBUG}","y")
+ifeq ("${CONFIG_DEBUG_FEATURES}","y")
   ARCHOPTIMIZATION = -g
 endif
 
@@ -86,7 +86,7 @@ else
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
@@ -115,7 +115,7 @@ EXEEXT =
 ifneq ($(CROSSDEV),arm-nuttx-elf-)
   LDFLAGS += -nostartfiles -nodefaultlibs
 endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
   LDFLAGS += -g
 endif
 
diff --git a/configs/zp214xpa/nsh/defconfig b/configs/zp214xpa/nsh/defconfig
index 1fa5f238cc58c9973070811a4597fd894a9c98ac..70e723a1ea6e7446bf76b721be8a3f7129b86d6f 100644
--- a/configs/zp214xpa/nsh/defconfig
+++ b/configs/zp214xpa/nsh/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -71,10 +72,10 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
@@ -92,7 +93,11 @@ CONFIG_ARCH_CHIP_LPC214X=y
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -102,10 +107,21 @@ CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="lpc214x"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 # CONFIG_ARCH_LOWVECTORS is not set
 
@@ -158,6 +174,7 @@ CONFIG_LPC214X_UART1=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
@@ -251,6 +268,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_RR_INTERVAL=0
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -301,9 +319,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -334,6 +353,7 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
@@ -352,17 +372,31 @@ CONFIG_DEV_NULL=y
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
 # CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 # CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 # CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -386,14 +420,11 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 CONFIG_STANDARD_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_UART1_SERIAL_CONSOLE is not set
@@ -411,6 +442,7 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 
 #
 # UART1 Configuration
@@ -423,19 +455,23 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -467,16 +503,11 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
 # CONFIG_FS_UNIONFS is not set
 
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
-
 #
 # Graphics Support
 #
@@ -495,6 +526,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -537,12 +572,14 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
 # CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -557,14 +594,13 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -572,11 +608,11 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -584,33 +620,43 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 CONFIG_EXAMPLES_NSH=y
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 # CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
-# CONFIG_EXAMPLES_PPPD is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
-# CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -622,30 +668,28 @@ CONFIG_EXAMPLES_NSH=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
 
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
-
 #
 # NSH Library
 #
 CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
 
 #
 # Command Line Configuration
@@ -664,6 +708,7 @@ CONFIG_NSH_NESTDEPTH=3
 # Disable Individual commands
 #
 # CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
 # CONFIG_NSH_DISABLE_CAT is not set
 # CONFIG_NSH_DISABLE_CD is not set
 # CONFIG_NSH_DISABLE_CP is not set
@@ -672,6 +717,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_DD is not set
 # CONFIG_NSH_DISABLE_DF is not set
 # CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
 # CONFIG_NSH_DISABLE_ECHO is not set
 # CONFIG_NSH_DISABLE_EXEC is not set
 # CONFIG_NSH_DISABLE_EXIT is not set
@@ -680,8 +726,10 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_HELP is not set
 # CONFIG_NSH_DISABLE_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 # CONFIG_NSH_DISABLE_KILL is not set
 # CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
 # CONFIG_NSH_DISABLE_LS is not set
 # CONFIG_NSH_DISABLE_MB is not set
 # CONFIG_NSH_DISABLE_MKDIR is not set
@@ -699,6 +747,7 @@ CONFIG_NSH_DISABLE_DATE=y
 # CONFIG_NSH_DISABLE_SET is not set
 # CONFIG_NSH_DISABLE_SH is not set
 # CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
 # CONFIG_NSH_DISABLE_TEST is not set
 # CONFIG_NSH_DISABLE_UMOUNT is not set
 # CONFIG_NSH_DISABLE_UNAME is not set
@@ -728,6 +777,8 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_CONSOLE=y
 # CONFIG_NSH_ALTCONDEV is not set
 # CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
 
 #
 # NxWidgets/NxWM
@@ -741,15 +792,19 @@ CONFIG_NSH_CONSOLE=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
 CONFIG_SYSTEM_READLINE=y
 CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/zp214xpa/nxlines/Make.defs b/configs/zp214xpa/nxlines/Make.defs
index 8f8f9b00890df4aa349c3ee455780c8c45003155..e86090ca97f750189d3ad05f250f29505523b966 100644
--- a/configs/zp214xpa/nxlines/Make.defs
+++ b/configs/zp214xpa/nxlines/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(HOSTOS),Cygwin)
 endif
 endif
 
-ifeq ("${CONFIG_DEBUG}","y")
+ifeq ("${CONFIG_DEBUG_FEATURES}","y")
   ARCHOPTIMIZATION = -g
 endif
 
@@ -86,7 +86,7 @@ else
 endif
 
 ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
@@ -115,7 +115,7 @@ EXEEXT =
 ifneq ($(CROSSDEV),arm-nuttx-elf-)
   LDFLAGS += -nostartfiles -nodefaultlibs
 endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
   LDFLAGS += -g
 endif
 
diff --git a/configs/zp214xpa/nxlines/defconfig b/configs/zp214xpa/nxlines/defconfig
index 580c2a8070cc4825b1bb7877a000326312ff2810..ab4edf274bffc338c83904d1f3409b741e3fe32e 100644
--- a/configs/zp214xpa/nxlines/defconfig
+++ b/configs/zp214xpa/nxlines/defconfig
@@ -37,14 +37,16 @@ CONFIG_RAW_BINARY=y
 # CONFIG_ARCH_MATH_H is not set
 # CONFIG_ARCH_FLOAT_H is not set
 # CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
 
 #
 # Debug Options
 #
-# CONFIG_DEBUG is not set
-# CONFIG_ARCH_HAVE_HEAPCHECK is not set
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
 CONFIG_ARCH_HAVE_STACKCHECK=y
 # CONFIG_STACK_COLORATION is not set
+# CONFIG_ARCH_HAVE_HEAPCHECK is not set
 # CONFIG_DEBUG_SYMBOLS is not set
 CONFIG_ARCH_HAVE_CUSTOMOPT=y
 # CONFIG_DEBUG_NOOPT is not set
@@ -58,8 +60,7 @@ CONFIG_ARCH_ARM=y
 # CONFIG_ARCH_AVR is not set
 # CONFIG_ARCH_HC is not set
 # CONFIG_ARCH_MIPS is not set
-# CONFIG_ARCH_RGMP is not set
-# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SIM is not set
 # CONFIG_ARCH_X86 is not set
 # CONFIG_ARCH_Z16 is not set
@@ -71,14 +72,15 @@ CONFIG_ARCH="arm"
 #
 # CONFIG_ARCH_CHIP_A1X is not set
 # CONFIG_ARCH_CHIP_C5471 is not set
-# CONFIG_ARCH_CHIP_CALYPSO is not set
 # CONFIG_ARCH_CHIP_DM320 is not set
 # CONFIG_ARCH_CHIP_EFM32 is not set
 # CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
 # CONFIG_ARCH_CHIP_KINETIS is not set
 # CONFIG_ARCH_CHIP_KL is not set
 # CONFIG_ARCH_CHIP_LM is not set
 # CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
 # CONFIG_ARCH_CHIP_LPC17XX is not set
 CONFIG_ARCH_CHIP_LPC214X=y
 # CONFIG_ARCH_CHIP_LPC2378 is not set
@@ -87,10 +89,15 @@ CONFIG_ARCH_CHIP_LPC214X=y
 # CONFIG_ARCH_CHIP_NUC1XX is not set
 # CONFIG_ARCH_CHIP_SAMA5 is not set
 # CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
 # CONFIG_ARCH_CHIP_SAM34 is not set
 # CONFIG_ARCH_CHIP_SAMV7 is not set
 # CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
 # CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
 CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_ARM926EJS is not set
 # CONFIG_ARCH_ARM920T is not set
@@ -100,10 +107,21 @@ CONFIG_ARCH_ARM7TDMI=y
 # CONFIG_ARCH_CORTEXM7 is not set
 # CONFIG_ARCH_CORTEXA5 is not set
 # CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
 CONFIG_ARCH_FAMILY="arm"
 CONFIG_ARCH_CHIP="lpc214x"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+# CONFIG_ARM_TOOLCHAIN_GNU is not set
 # CONFIG_ARCH_HAVE_FPU is not set
 # CONFIG_ARCH_HAVE_DPFPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+# CONFIG_ARM_HAVE_MPU_UNIFIED is not set
 CONFIG_ARCH_HAVE_LOWVECTORS=y
 # CONFIG_ARCH_LOWVECTORS is not set
 
@@ -156,11 +174,14 @@ CONFIG_LPC214X_UART1=y
 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
 # CONFIG_ARCH_HAVE_ADDRENV is not set
 # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
 CONFIG_ARCH_HAVE_VFORK=y
 # CONFIG_ARCH_HAVE_MMU is not set
 # CONFIG_ARCH_HAVE_MPU is not set
 # CONFIG_ARCH_NAND_HWECC is not set
 # CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
 CONFIG_ARCH_STACKDUMP=y
 # CONFIG_ENDIAN_BIG is not set
 # CONFIG_ARCH_IDLE_CUSTOM is not set
@@ -212,8 +233,8 @@ CONFIG_ARCH_BOARD="zp214xpa"
 # Board-Specific Options
 #
 CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_UNIQUEID is not set
 # CONFIG_BOARDCTL_TSCTEST is not set
-# CONFIG_BOARDCTL_ADCTEST is not set
 CONFIG_BOARDCTL_GRAPHICS=y
 # CONFIG_BOARDCTL_IOCTL is not set
 
@@ -250,6 +271,7 @@ CONFIG_INIT_ENTRYPOINT=y
 # CONFIG_INIT_FILEPATH is not set
 CONFIG_USER_ENTRYPOINT="nxlines_main"
 CONFIG_RR_INTERVAL=0
+# CONFIG_SCHED_SPORADIC is not set
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_MAX_TASKS=16
 # CONFIG_SCHED_HAVE_PARENT is not set
@@ -300,9 +322,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16
 #
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
 
 #
-# Work Queue Support
+# Work queue support
 #
 # CONFIG_SCHED_WORKQUEUE is not set
 # CONFIG_SCHED_HPWORK is not set
@@ -333,14 +356,20 @@ CONFIG_DEV_NULL=y
 # CONFIG_RAMDISK is not set
 # CONFIG_CAN is not set
 # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
 # CONFIG_PWM is not set
 # CONFIG_ARCH_HAVE_I2CRESET is not set
 # CONFIG_I2C is not set
 CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
 # CONFIG_SPI_EXCHANGE is not set
 CONFIG_SPI_CMDDATA=y
 # CONFIG_SPI_CALLBACK is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_SPI_CS_CONTROL is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
 # CONFIG_I2S is not set
 
 #
@@ -354,10 +383,15 @@ CONFIG_SPI_CMDDATA=y
 # CONFIG_VIDEO_DEVICES is not set
 # CONFIG_BCH is not set
 # CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+
+#
+# LCD Driver Support
+#
 CONFIG_LCD=y
 
 #
-# Common LCD Settings
+# Common Graphic LCD Settings
 #
 # CONFIG_LCD_CONSOLE is not set
 # CONFIG_LCD_NOGETRUN is not set
@@ -374,6 +408,7 @@ CONFIG_LCD_MAXPOWER=1
 # CONFIG_LCD_UG9664HSWAG01 is not set
 # CONFIG_LCD_UG2864HSWEG01 is not set
 # CONFIG_LCD_UG2832HSWEG04 is not set
+# CONFIG_LCD_SSD1351 is not set
 # CONFIG_LCD_ST7565 is not set
 # CONFIG_LCD_ST7567 is not set
 CONFIG_LCD_UG2864AMBAG01=y
@@ -387,21 +422,27 @@ CONFIG_LCD_LANDSCAPE=y
 # CONFIG_LCD_RPORTRAIT is not set
 # CONFIG_LCD_RLANDSCAPE is not set
 # CONFIG_LCD_ILI9341 is not set
+# CONFIG_LCD_RA8875 is not set
+# CONFIG_SLCD is not set
 
 #
-# Alphanumeric/Segment LCD Devices
+# LED Support
 #
-# CONFIG_LCD_LCD1602 is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
 # CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
 # CONFIG_MTD is not set
 # CONFIG_EEPROM is not set
 # CONFIG_PIPES is not set
 # CONFIG_PM is not set
 # CONFIG_POWER is not set
 # CONFIG_SENSORS is not set
-# CONFIG_SERCOMM_CONSOLE is not set
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
 # CONFIG_16550_UART is not set
 # CONFIG_UART_SERIALDRIVER is not set
 CONFIG_UART0_SERIALDRIVER=y
@@ -425,13 +466,10 @@ CONFIG_UART1_SERIALDRIVER=y
 # CONFIG_USART7_SERIALDRIVER is not set
 # CONFIG_USART8_SERIALDRIVER is not set
 # CONFIG_OTHER_UART_SERIALDRIVER is not set
-
-#
-# USART Configuration
-#
 CONFIG_MCU_SERIAL=y
 # CONFIG_SERIAL_IFLOWCONTROL is not set
 # CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
 # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
 CONFIG_UART0_SERIAL_CONSOLE=y
 # CONFIG_UART1_SERIAL_CONSOLE is not set
@@ -449,6 +487,7 @@ CONFIG_UART0_PARITY=0
 CONFIG_UART0_2STOP=0
 # CONFIG_UART0_IFLOWCONTROL is not set
 # CONFIG_UART0_OFLOWCONTROL is not set
+# CONFIG_UART0_DMA is not set
 
 #
 # UART1 Configuration
@@ -461,19 +500,23 @@ CONFIG_UART1_PARITY=0
 CONFIG_UART1_2STOP=0
 # CONFIG_UART1_IFLOWCONTROL is not set
 # CONFIG_UART1_OFLOWCONTROL is not set
+# CONFIG_UART1_DMA is not set
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_DRIVERS_WIRELESS is not set
 
-#
-# System Logging Device Options
-#
-
 #
 # System Logging
 #
+# CONFIG_ARCH_SYSLOG is not set
 # CONFIG_RAMLOG is not set
-# CONFIG_SYSLOG_CONSOLE is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
 
 #
 # Networking Support
@@ -505,14 +548,10 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
 # CONFIG_FS_FAT is not set
 # CONFIG_FS_NXFFS is not set
 # CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
 # CONFIG_FS_SMARTFS is not set
 # CONFIG_FS_PROCFS is not set
-
-#
-# System Logging
-#
-# CONFIG_SYSLOG is not set
-# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_FS_UNIONFS is not set
 
 #
 # Graphics Support
@@ -522,6 +561,7 @@ CONFIG_NX_LCDDRIVER=y
 CONFIG_NX_NPLANES=1
 CONFIG_NX_BGCOLOR=0x0
 CONFIG_NX_WRITEONLY=y
+# CONFIG_NX_UPDATE is not set
 
 #
 # Supported Pixel Depths
@@ -620,6 +660,10 @@ CONFIG_MM_REGIONS=1
 #
 # CONFIG_AUDIO is not set
 
+#
+# Wireless Support
+#
+
 #
 # Binary Loader
 #
@@ -662,11 +706,14 @@ CONFIG_ARCH_LOWPUTC=y
 # CONFIG_TIME_EXTENDED is not set
 CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_ARCH_ROMGETC is not set
-# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
 
 #
 # Non-standard Library Support
 #
+# CONFIG_LIB_CRC64_FAST is not set
 # CONFIG_LIB_KBDCODEC is not set
 # CONFIG_LIB_SLCDCODEC is not set
 
@@ -681,14 +728,13 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 #
 
 #
-# Built-In Applications
+# CAN Utilities
 #
 
 #
 # Examples
 #
-# CONFIG_EXAMPLES_BUTTONS is not set
-# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CHAT is not set
 # CONFIG_EXAMPLES_CONFIGDATA is not set
 # CONFIG_EXAMPLES_CPUHOG is not set
 # CONFIG_EXAMPLES_DHCPD is not set
@@ -696,12 +742,12 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_FTPC is not set
 # CONFIG_EXAMPLES_FTPD is not set
 # CONFIG_EXAMPLES_HELLO is not set
-# CONFIG_EXAMPLES_HELLOXX is not set
-# CONFIG_EXAMPLES_JSON is not set
 # CONFIG_EXAMPLES_HIDKBD is not set
-# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
 # CONFIG_EXAMPLES_LCDRW is not set
+# CONFIG_EXAMPLES_MEDIA is not set
 # CONFIG_EXAMPLES_MM is not set
 # CONFIG_EXAMPLES_MODBUS is not set
 # CONFIG_EXAMPLES_MOUNT is not set
@@ -709,9 +755,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
 # CONFIG_EXAMPLES_NSH is not set
 # CONFIG_EXAMPLES_NULL is not set
 # CONFIG_EXAMPLES_NX is not set
-# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXFFS is not set
-# CONFIG_EXAMPLES_NXFLAT is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
 CONFIG_EXAMPLES_NXLINES=y
@@ -726,29 +770,40 @@ CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0x01
 CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0x00
 CONFIG_EXAMPLES_NXLINES_BPP=1
 CONFIG_EXAMPLES_NXLINES_EXTERNINIT=y
+# CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set
 # CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
 # CONFIG_EXAMPLES_PIPE is not set
 # CONFIG_EXAMPLES_POLL is not set
 # CONFIG_EXAMPLES_POSIXSPAWN is not set
-# CONFIG_EXAMPLES_QENCODER is not set
-# CONFIG_EXAMPLES_RGMP is not set
-# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RGBLED is not set
 # CONFIG_EXAMPLES_SENDMAIL is not set
 # CONFIG_EXAMPLES_SERIALBLASTER is not set
 # CONFIG_EXAMPLES_SERIALRX is not set
 # CONFIG_EXAMPLES_SERLOOP is not set
 # CONFIG_EXAMPLES_SLCD is not set
 # CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
 # CONFIG_EXAMPLES_TCPECHO is not set
 # CONFIG_EXAMPLES_TELNETD is not set
-# CONFIG_EXAMPLES_THTTPD is not set
 # CONFIG_EXAMPLES_TIFF is not set
 # CONFIG_EXAMPLES_TOUCHSCREEN is not set
-# CONFIG_EXAMPLES_WEBSERVER is not set
 # CONFIG_EXAMPLES_USBSERIAL is not set
 # CONFIG_EXAMPLES_USBTERM is not set
 # CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
 
 #
 # Graphics Support
@@ -760,27 +815,22 @@ CONFIG_EXAMPLES_NXLINES_EXTERNINIT=y
 # Interpreters
 #
 # CONFIG_INTERPRETERS_FICL is not set
-# CONFIG_INTERPRETERS_PCODE is not set
 # CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_PCODE is not set
 
 #
-# Network Utilities
+# FreeModBus
 #
+# CONFIG_MODBUS is not set
 
 #
-# Networking Utilities
+# Network Utilities
 #
 # CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
 # CONFIG_NETUTILS_FTPC is not set
 # CONFIG_NETUTILS_JSON is not set
 # CONFIG_NETUTILS_SMTP is not set
-# CONFIG_NETUTILS_THTTPD is not set
-# CONFIG_NETUTILS_PPPD is not set
-
-#
-# FreeModBus
-#
-# CONFIG_MODBUS is not set
 
 #
 # NSH Library
@@ -799,15 +849,16 @@ CONFIG_EXAMPLES_NXLINES_EXTERNINIT=y
 #
 # System Libraries and NSH Add-Ons
 #
-# CONFIG_SYSTEM_FREE is not set
 # CONFIG_SYSTEM_CLE is not set
 # CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_LIB_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
 # CONFIG_SYSTEM_INSTALL is not set
-# CONFIG_SYSTEM_HEX2BIN is not set
-# CONFIG_FSUTILS_INIFILE is not set
 # CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
 # CONFIG_SYSTEM_READLINE is not set
-# CONFIG_SYSTEM_POWEROFF is not set
 # CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
 # CONFIG_SYSTEM_VI is not set
 # CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/zp214xpa/src/lpc2148_spi1.c b/configs/zp214xpa/src/lpc2148_spi1.c
index 43fb0e095b43ee16e17c1b1a68cd0399aeec5884..72110a423abc59307d34b57df9234d16a340b705 100644
--- a/configs/zp214xpa/src/lpc2148_spi1.c
+++ b/configs/zp214xpa/src/lpc2148_spi1.c
@@ -87,20 +87,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* Enables debug output from this file */
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg  lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /* Clocking */
 
 #define LPC214X_CCLKFREQ  (LPC214X_FOSC*LPC214X_PLL_M)
@@ -229,7 +215,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
 
 static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
-#ifdef CONFIG_DEBUG_SPI
+#ifdef CONFIG_DEBUG_SPI_INFO
   uint32_t regval;
 #endif
   uint32_t bit = 1 << 20;
@@ -238,7 +224,7 @@ static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
    * only thing on the bus.
    */
 
-#ifdef CONFIG_DEBUG_SPI
+#ifdef CONFIG_DEBUG_SPI_INFO
   regval = getreg32(CS_PIN_REGISTER);
 #endif
 
@@ -247,14 +233,14 @@ static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
       /* Enable slave select (low enables) */
 
       putreg32(bit, CS_CLR_REGISTER);
-      spidbg("CS asserted: %08x->%08x\n", regval, getreg32(CS_PIN_REGISTER));
+      spiinfo("CS asserted: %08x->%08x\n", regval, getreg32(CS_PIN_REGISTER));
     }
   else
     {
       /* Disable slave select (low enables) */
 
       putreg32(bit, CS_SET_REGISTER);
-      spidbg("CS de-asserted: %08x->%08x\n", regval, getreg32(CS_PIN_REGISTER));
+      spiinfo("CS de-asserted: %08x->%08x\n", regval, getreg32(CS_PIN_REGISTER));
 
       /* Wait for the TX FIFO not full indication */
 
@@ -310,7 +296,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
   divisor = (divisor + 1) & ~1;
   putreg8(divisor, LPC214X_SPI1_CPSR);
 
-  spidbg("Frequency %d->%d\n", frequency, LPC214X_PCLKFREQ / divisor);
+  spiinfo("Frequency %d->%d\n", frequency, LPC214X_PCLKFREQ / divisor);
   return LPC214X_PCLKFREQ / divisor;
 }
 
@@ -331,7 +317,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
 
 static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  spidbg("Return 0\n");
+  spiinfo("Return 0\n");
   return 0;
 }
 
@@ -362,7 +348,7 @@ static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_SPI_CMDDATA
 static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
 {
-#ifdef CONFIG_DEBUG_SPI
+#ifdef CONFIG_DEBUG_SPI_INFO
   uint32_t regval;
 #endif
   uint32_t bit = 1 << 23;
@@ -378,7 +364,7 @@ static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd
    *  A0 = L: the inputs at D0 to D7 are transferred to the command registers."
    */
 
-#ifdef CONFIG_DEBUG_SPI
+#ifdef CONFIG_DEBUG_SPI_INFO
   regval = getreg32(CS_PIN_REGISTER);
 #endif
 
@@ -387,14 +373,14 @@ static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd
       /* L: the inputs at D0 to D7 are transferred to the command registers */
 
       putreg32(bit, CS_CLR_REGISTER);
-      spidbg("Command: %08x->%08x\n", regval, getreg32(CS_PIN_REGISTER));
+      spiinfo("Command: %08x->%08x\n", regval, getreg32(CS_PIN_REGISTER));
     }
   else
     {
       /* H: the inputs at D0 to D7 are treated as display data. */
 
       putreg32(bit, CS_SET_REGISTER);
-      spidbg("Data: %08x->%08x\n", regval, getreg32(CS_PIN_REGISTER));
+      spiinfo("Data: %08x->%08x\n", regval, getreg32(CS_PIN_REGISTER));
     }
 
   return OK;
@@ -436,7 +422,7 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
   /* Get the value from the RX FIFO and return it */
 
   regval = getreg16(LPC214X_SPI1_DR);
-  spidbg("%04x->%04x\n", wd, regval);
+  spiinfo("%04x->%04x\n", wd, regval);
   return regval;
 }
 
@@ -466,7 +452,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
 
   /* Loop while thre are bytes remaining to be sent */
 
-  spidbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
   while (nwords > 0)
     {
       /* While the TX FIFO is not full and there are bytes left to send */
@@ -483,7 +469,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
 
   /* Then discard all card responses until the RX & TX FIFOs are emptied. */
 
-  spidbg("discarding\n");
+  spiinfo("discarding\n");
   do
     {
       /* Is there anything in the RX fifo? */
@@ -537,7 +523,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
 
   /* While there is remaining to be sent (and no synchronization error has occurred) */
 
-  spidbg("nwords: %d\n", nwords);
+  spiinfo("nwords: %d\n", nwords);
   while (nwords || rxpending)
     {
       /* Fill the transmit FIFO with 0xff...
@@ -546,7 +532,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
        * and (3) there are more bytes to be sent.
        */
 
-      spivdbg("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
+      spiinfo("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
       while ((getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_TNF) &&
              (rxpending < LPC214X_SPI1_FIFOSZ) && nwords)
         {
@@ -557,7 +543,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
 
       /* Now, read the RX data from the RX FIFO while the RX FIFO is not empty */
 
-      spivdbg("RX: rxpending: %d\n", rxpending);
+      spiinfo("RX: rxpending: %d\n", rxpending);
       while (getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE)
         {
           *ptr++ = (uint8_t)getreg16(LPC214X_SPI1_DR);
@@ -592,7 +578,7 @@ FAR struct spi_dev_s *lpc214x_spibus_initialize(int port)
 
   /* Only the SPI1 interface is supported */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (port != 1)
     {
       return NULL;
@@ -635,9 +621,9 @@ FAR struct spi_dev_s *lpc214x_spibus_initialize(int port)
   regval32 |= getreg32(CS_DIR_REGISTER);
   putreg32(regval32, CS_DIR_REGISTER);
 
-  spidbg("CS Pin Config: PINSEL1: %08x PIN: %08x DIR: %08x\n",
-         getreg32(LPC214X_PINSEL1), getreg32(CS_PIN_REGISTER),
-         getreg32(CS_DIR_REGISTER));
+  spiinfo("CS Pin Config: PINSEL1: %08x PIN: %08x DIR: %08x\n",
+          getreg32(LPC214X_PINSEL1), getreg32(CS_PIN_REGISTER),
+          getreg32(CS_DIR_REGISTER));
 
   /* Enable peripheral clocking to SPI1 */
 
diff --git a/configs/zp214xpa/src/lpc2148_ug2864ambag01.c b/configs/zp214xpa/src/lpc2148_ug2864ambag01.c
index c857b43ba81d9aa4c968139e6b9359d09b237367..ca43d4555384e0071f316ee3b61f2c8fc447a6bd 100644
--- a/configs/zp214xpa/src/lpc2148_ug2864ambag01.c
+++ b/configs/zp214xpa/src/lpc2148_ug2864ambag01.c
@@ -97,16 +97,6 @@
 #  define RESET_DIR_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_DIR_OFFSET)
 #endif
 
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg(format, ...)   dbg(format, ##__VA_ARGS__)
-#  define lcdvdbg(format, ...)  vdbg(format, ##__VA_ARGS__)
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -143,7 +133,7 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
   regval32 = getreg32(RESET_DIR_REGISTER);
   putreg32(regval32 | bits32, RESET_DIR_REGISTER);
 
-  lcdvdbg("RESET Pin Config: PINSEL1: %08x PIN: %08x DIR: %08x\n",
+  lcdinfo("RESET Pin Config: PINSEL1: %08x PIN: %08x DIR: %08x\n",
           getreg32(LPC214X_PINSEL1), getreg32(RESET_PIN_REGISTER),
           getreg32(RESET_DIR_REGISTER));
 
@@ -152,7 +142,7 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
   up_mdelay(20);
   putreg32(bits32, RESET_SET_REGISTER);
 
-  lcdvdbg("RESET release: PIN: %08x DIR: %08x\n",
+  lcdinfo("RESET release: PIN: %08x DIR: %08x\n",
           getreg32(RESET_PIN_REGISTER), getreg32(RESET_DIR_REGISTER));
 
   /* Get the SPI1 port interface */
@@ -160,7 +150,7 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
   spi = lpc214x_spibus_initialize(1);
   if (!spi)
     {
-      lcddbg("Failed to initialize SPI port 1\n");
+      lcderr("ERROR: Failed to initialize SPI port 1\n");
     }
   else
     {
@@ -169,11 +159,11 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
       dev = ug2864ambag01_initialize(spi, devno);
       if (!dev)
         {
-          lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno);
+          lcderr("ERROR: Failed to bind SPI port 1 to OLED %d: %d\n", devno);
         }
      else
         {
-          lcdvdbg("Bound SPI port 1 to OLED %d\n", devno);
+          lcdinfo("Bound SPI port 1 to OLED %d\n", devno);
 
           /* And turn the OLED on */
 
diff --git a/crypto/crypto.c b/crypto/crypto.c
index 401417d8744fafd95339479522b309ca5506c238..57839fa0fef7559a08a1e1495f874c78a7826522 100644
--- a/crypto/crypto.c
+++ b/crypto/crypto.c
@@ -81,11 +81,11 @@ int up_cryptoinitialize(void)
   res = crypto_test();
   if (res)
     {
-      cryptlldbg("crypto test failed\n");
+      crypterr("ERROR: crypto test failed\n");
     }
   else
     {
-      cryptllvdbg("crypto test OK\n");
+      cryptinfo("crypto test OK\n");
     }
 #endif
 
diff --git a/crypto/cryptodev.c b/crypto/cryptodev.c
index 9710acf028180fdb68cc08cc5b42448840e2cfe3..970992274211a104d0ec5704bc1990bc0180be2f 100644
--- a/crypto/cryptodev.c
+++ b/crypto/cryptodev.c
@@ -46,6 +46,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
diff --git a/crypto/testmngr.c b/crypto/testmngr.c
index c7fe86e78add3b1d246e64c2b4e5dafff66c6c6d..1554e1e3017e1ee3e1c2b55fe06167dae47383c0 100644
--- a/crypto/testmngr.c
+++ b/crypto/testmngr.c
@@ -86,7 +86,7 @@ static int do_test_aes(FAR struct cipher_testvec *test, int mode, int encrypt)
 #define AES_CYPHER_TEST_ENCRYPT(mode, mode_str, count, template) \
   for (i = 0; i < count; i++) { \
     if (do_test_aes(template + i, mode, CYPHER_ENCRYPT)) { \
-      cryptlldbg("Failed " mode_str " encrypt test #%i\n", i); \
+      crypterr("ERROR: Failed " mode_str " encrypt test #%i\n", i); \
       return -1; \
     } \
   }
@@ -94,7 +94,7 @@ static int do_test_aes(FAR struct cipher_testvec *test, int mode, int encrypt)
 #define AES_CYPHER_TEST_DECRYPT(mode, mode_str, count, template) \
   for (i = 0; i < count; i++) { \
     if (do_test_aes(template + i, mode, CYPHER_DECRYPT)) { \
-      cryptlldbg("Failed " mode_str " decrypt test #%i\n", i); \
+      crypterr("ERROR: Failed " mode_str " decrypt test #%i\n", i); \
       return -1; \
     } \
   }
diff --git a/drivers/Kconfig b/drivers/Kconfig
index df45c0d17220777d3ed608c8208cc1fe846fcd53..00adcc8f17f922b97236e572af4db7d077f89921 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -29,6 +29,61 @@ config DEV_RANDOM
 	bool "Enable /dev/random"
 	default y
 	depends on ARCH_HAVE_RNG
+	---help---
+		Enable support for /dev/urandom provided by a hardware TRNG.
+
+config DEV_URANDOM
+	bool "Enable /dev/urandom"
+	default n
+	---help---
+		Enable support for /dev/urandom provided by either a hardware TRNG or
+		by a software PRNG implementation.
+
+		NOTE:  This option may not be cryptographially secure and should not
+		be enabled if you are concerned about cyptographically secure
+		pseudo-random numbers (CPRNG) and do not know the characteristics
+		of the software PRNG impelementation!
+
+if DEV_URANDOM
+
+choice
+	prompt "/dev/urandom algorithm"
+	default DEV_URANDOM_ARCH if ARCH_HAVE_RNG
+	default DEV_URANDOM_XORSHIFT128 if !ARCH_HAVE_RNG
+
+config DEV_URANDOM_XORSHIFT128
+	bool "xorshift128"
+	---help---
+		xorshift128 is a pseudorandom number generator that is simple,
+		portable, and can also be used on 8-bit and 16-bit MCUs.
+
+		NOTE: Not cyptographically secure
+
+config DEV_URANDOM_CONGRUENTIAL
+	bool "Conguential"
+	---help---
+		Use the same congruential general used with srand().  This algorithm
+		is computationally more intense and uses double precision floating
+		point.  NOTE: Good randomness from the congruential generator also
+		requires that you also select CONFIG_LIB_RAND_ORDER > 2
+
+		NOTE: Not cyptographically secure
+
+config DEV_URANDOM_ARCH
+	bool "Architecture-specific"
+	depends on ARCH_HAVE_RNG
+	---help---
+		The implementation of /dev/urandom is provided in archtecture-
+		specific logic using hardware TRNG logic.  architecture-specific
+		logic must provide the whole implementation in this case, including
+		the function devurandom_register().  In this case, /dev/urandom may
+		refer to the same driver as /dev/random.
+
+		NOTE: May or may not be cyptographically secure, depending upon the
+		implementation.
+
+endchoice # /dev/urandom algorithm
+endif # DEV_URANDOM
 
 source drivers/loop/Kconfig
 
@@ -86,14 +141,14 @@ config RAMDISK
 	---help---
 		Can be used to set up a block of memory or (read-only) FLASH as
 		a block driver that can be mounted as a files system.  See
-		include/nuttx/fs/ramdisk.h.
+		include/nuttx/drivers/ramdisk.h.
 
 menuconfig CAN
 	bool "CAN Driver Support"
 	default n
 	---help---
 		This selection enables building of the "upper-half" CAN driver.
-		See include/nuttx/can.h for further CAN driver information.
+		See include/nuttx/drivers/can.h for further CAN driver information.
 
 if CAN
 
@@ -208,6 +263,14 @@ config CAN_LOOPBACK
 		driver does support loopback mode, the setting will enable it. (If the
 		driver does not, this setting will have no effect).
 
+config CAN_NPOLLWAITERS
+	int "Number of poll waiters"
+	default 2
+	depends on !DISABLE_POLL
+	---help---
+		The maximum number of threads that may be waiting on the
+		poll method.
+
 endif # CAN
 
 config ARCH_HAVE_PWM_PULSECOUNT
@@ -223,7 +286,7 @@ menuconfig PWM
 	default n
 	---help---
 		This selection enables building of the "upper-half" PWM driver.
-		See include/nuttx/pwm.h for further PWM driver information.
+		See include/nuttx/drivers/pwm.h for further PWM driver information.
 
 if PWM
 
@@ -250,7 +313,7 @@ if PWM_MULTICHAN
 config PWM_NCHANNELS
 	int "Number of Output Channels Per Timer"
 	default 1
-	range 1 4
+	range 1 6
 	---help---
 		Specifies the number of output channels per timer.  Each timer
 		may support fewer output channels than this value.
@@ -274,17 +337,7 @@ if I2C
 source drivers/i2c/Kconfig
 endif
 
-menuconfig SPI
-	bool "SPI Driver Support"
-	default n
-	---help---
-		This selection enables selection of common SPI options.  This option
-		should be enabled by all platforms that support SPI interfaces.
-		See include/nuttx/spi/spi.h for further SPI driver information.
-
-if SPI
 source drivers/spi/Kconfig
-endif
 
 menuconfig I2S
 	bool "I2S Driver Support"
@@ -343,8 +396,8 @@ menuconfig BCH
 	---help---
 		Contains logic that may be used to convert a block driver into
 		a character driver.  This is the complementary conversion as that
-		performed by loop.c.  See include/nuttx/fs/fs.h for registration
-		information.
+		performed by loop.c.  See include/nuttx/drivers/drivers.h for
+		registration information.
 
 if BCH
 source drivers/bch/Kconfig
@@ -362,17 +415,7 @@ if INPUT
 source drivers/input/Kconfig
 endif # INPUT
 
-menuconfig IOEXPANDER
-	bool "IO Expander Support"
-	default n
-	---help---
-		This directory holds implementations of IO expander drivers.
-		See include/nuttx/ioexpander/ioexpander.h for registration information.
-
-if IOEXPANDER
 source drivers/ioexpander/Kconfig
-endif # IOEXPANDER
-
 source drivers/lcd/Kconfig
 source drivers/leds/Kconfig
 
@@ -468,23 +511,6 @@ if SENSORS
 source drivers/sensors/Kconfig
 endif # SENSORS
 
-menuconfig SERCOMM_CONSOLE
-	bool "Osmocom-bb Sercomm Driver Support"
-	default n
-	---help---
-		Sercomm is the transport used by osmocom-bb that runs on top of serial.
-		See http://bb.osmocom.org/trac/wiki/nuttx-bb/run for detailed the usage
-		of nuttx with sercomm.
-
-		drivers/sercomm is only built if SERCOMM_CONSOLE in the NuttX
-		configuration file.  If you attempt to build this driver without
-		osmocom-bb, you will get compilation errors because of header files
-		that are needed from the osmocom-bb.
-
-if SERCOMM_CONSOLE
-source drivers/sercomm/Kconfig
-endif # SERCOMM_CONSOLE
-
 menuconfig SERIAL
 	bool "Serial Driver Support"
 	default y
@@ -517,6 +543,24 @@ if USBHOST
 source drivers/usbhost/Kconfig
 endif # USBHOST
 
+config HAVE_USBTRACE
+	bool
+	default n
+
+menuconfig USBMONITOR
+	bool "USB Monitor"
+	default n
+	depends on HAVE_USBTRACE
+	---help---
+		If USB device tracing (USBDEV_TRACE) AND/OR USB host tracing
+		(USBHOST_TRACE) are enabled then this option will select the USB
+		monitor.  The USB monitor is a daemon that will periodically collect
+		the buffered USB trace data and dump it to the SYSLOG device.
+
+if USBMONITOR
+source drivers/usbmonitor/Kconfig
+endif # USBMONITOR
+
 menuconfig DRIVERS_WIRELESS
 	bool "Wireless Device Support"
 	default n
@@ -525,6 +569,12 @@ menuconfig DRIVERS_WIRELESS
 
 source drivers/wireless/Kconfig
 
-comment "System Logging Device Options"
+menuconfig DRIVERS_CONTACTLESS
+	bool "Contactless Device Support"
+	default n
+	---help---
+		Drivers for various contactless devices.
+
+source drivers/contactless/Kconfig
 
 source drivers/syslog/Kconfig
diff --git a/drivers/Makefile b/drivers/Makefile
index 224cd78f6e53b097902a50c2903060155f662a3d..94f027afbbf822f8405ec5006f0f29118442248e 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -66,15 +66,16 @@ include net$(DELIM)Make.defs
 include pipes$(DELIM)Make.defs
 include power$(DELIM)Make.defs
 include sensors$(DELIM)Make.defs
-include sercomm$(DELIM)Make.defs
 include serial$(DELIM)Make.defs
 include spi$(DELIM)Make.defs
 include syslog$(DELIM)Make.defs
 include timers$(DELIM)Make.defs
 include usbdev$(DELIM)Make.defs
 include usbhost$(DELIM)Make.defs
+include usbmonitor$(DELIM)Make.defs
 include video$(DELIM)Make.defs
 include wireless$(DELIM)Make.defs
+include contactless$(DELIM)Make.defs
 
 ifneq ($(CONFIG_NFILE_DESCRIPTORS),0)
   CSRCS += dev_null.c dev_zero.c
@@ -97,7 +98,13 @@ endif
 ifeq ($(CONFIG_PWM),y)
   CSRCS += pwm.c
 endif
+
+ifeq ($(CONFIG_DEV_URANDOM),y)
+ifneq ($(CONFIG_DEV_URANDOM_ARCH),y)
+  CSRCS += dev_urandom.c
+endif
 endif
+endif # CONFIG_NFILE_DESCRIPTORS != 0
 
 AOBJS = $(ASRCS:.S=$(OBJEXT))
 COBJS = $(CSRCS:.c=$(OBJEXT))
diff --git a/drivers/README.txt b/drivers/README.txt
index 420988ccd485ff8b8ecd25d59d7e6014ff762fb5..f9f23af06f2ee1ae4baa5ed7db95f52d92b7385a 100644
--- a/drivers/README.txt
+++ b/drivers/README.txt
@@ -13,7 +13,8 @@ Files in this directory
 ^^^^^^^^^^^^^^^^^^^^^^^
 
 can.c
-  This is a CAN driver.  See include/nuttx/can.h for usage information.
+  This is a CAN driver.  See include/nuttx/drivers/can.h for usage
+  information.
 
 dev_null.c and dev_zero.c
   These files provide the standard /dev/null and /dev/zero devices.
@@ -24,12 +25,12 @@ dev_null.c and dev_zero.c
 pwm.c
   Provides the "upper half" of a pulse width modulation (PWM) driver.
   The "lower half" of the PWM driver is provided by device-specific
-  logic.  See include/nuttx/pwm.h for usage information.
+  logic.  See include/nuttx/drivers/pwm.h for usage information.
 
 ramdisk.c
   Can be used to set up a block of memory or (read-only) FLASH as
   a block driver that can be mounted as a files system.  See
-  include/nuttx/fs/ramdisk.h.
+  include/nuttx/drivers/ramdisk.h.
 
 rwbuffer.c
   A facility that can be use by any block driver in-order to add
@@ -54,6 +55,11 @@ bch/
   performed by loop.c.  See include/nuttx/fs/fs.h for registration
   information.
 
+contactless/
+  Contactless devices are related to wireless devices.  They are not
+  communication devices with other similar peers, but couplers/interfaces
+  to contactless cards and tags.
+
 eeprom/
   An EEPROM is a form of Memory Technology Device (see drivers/mtd).
   EEPROMs are non-volatile memory like FLASH, but differ in underlying
@@ -131,16 +137,6 @@ sensors/
   measure and convert voltage levels.  DACs, however, are retained in
   the analog/ sub-directory.
 
-sercomm/
-  Sercomm is the transport used by osmocom-bb that runs on top of serial.
-  See http://bb.osmocom.org/trac/wiki/nuttx-bb/run for detailed the usage
-  of nuttx with sercomm.
-
-  drivers/sercomm is only built if CONFIG_SERCOMM_CONSOLE in the NuttX
-  configuration file.  If you attempt to build this driver without
-  osmocom-bb, you will get compilation errors because of header files
-  that are needed from the osmocom-bb.
-
 serial/
   Front-end character drivers for chip-specific UARTs.  This provide
   some TTY-like functionality and are commonly used (but not required for)
diff --git a/drivers/analog/ad5410.c b/drivers/analog/ad5410.c
index 58db6a7ceaf12646cbb3844fdd8e84e219f39469..679edf2c5f25ffdc7ddd393d0746dcfb11237195 100644
--- a/drivers/analog/ad5410.c
+++ b/drivers/analog/ad5410.c
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
  * arch/drivers/analog/ad5410.c
  *
  *   Copyright (C) 2010, 2016 Gregory Nutt. All rights reserved.
@@ -37,7 +37,7 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 #include 
 
@@ -97,7 +97,7 @@ static void dac_shutdown(FAR struct dac_dev_s *dev);
 static void dac_txint(FAR struct dac_dev_s *dev, bool enable);
 static int  dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg);
 static int  dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg);
-static int  dac_interrupt(int irq, void *context);
+static int  dac_interrupt(int irq, void *context, FAR void *arg);
 
 /****************************************************************************
  * ad_private Data
@@ -256,7 +256,7 @@ static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg)
 
 static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg)
 {
-  dbg("Fix me:Not Implemented\n");
+  _err("ERROR: Fix me; Not Implemented\n");
   return 0;
 }
 
diff --git a/drivers/analog/adc.c b/drivers/analog/adc.c
index 3dc8a4e42c9abd83707cc4642158cce99dd180a5..d81971f10125a11a68fd3c6c6478748983b6aab4 100644
--- a/drivers/analog/adc.c
+++ b/drivers/analog/adc.c
@@ -58,6 +58,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -233,7 +234,7 @@ static ssize_t adc_read(FAR struct file *filep, FAR char *buffer, size_t buflen)
   int                   ret   = 0;
   int                   msglen;
 
-  avdbg("buflen: %d\n", (int)buflen);
+  ainfo("buflen: %d\n", (int)buflen);
 
   if (buflen % 5 == 0)
     msglen = 5;
@@ -351,7 +352,7 @@ return_with_irqdisabled:
       leave_critical_section(flags);
     }
 
-  avdbg("Returning: %d\n", ret);
+  ainfo("Returning: %d\n", ret);
   return ret;
 }
 
@@ -377,7 +378,7 @@ static int adc_receive(FAR struct adc_dev_s *dev, uint8_t ch, int32_t data)
 {
   FAR struct adc_fifo_s *fifo = &dev->ad_recv;
   int                    nexttail;
-  int                    err = -ENOMEM;
+  int                    errcode = -ENOMEM;
 
   /* Check if adding this new message would over-run the drivers ability to enqueue
    * read data.
@@ -407,9 +408,10 @@ static int adc_receive(FAR struct adc_dev_s *dev, uint8_t ch, int32_t data)
           sem_post(&fifo->af_sem);
         }
 
-      err = OK;
+      errcode = OK;
     }
-    return err;
+
+  return errcode;
 }
 
 /****************************************************************************
@@ -432,7 +434,7 @@ int adc_register(FAR const char *path, FAR struct adc_dev_s *dev)
   ret = dev->ad_ops->ao_bind(dev, &g_adc_callback);
   if (ret < 0)
     {
-      adbg("ERROR: Failed to bind callbacks: %d\n", ret);
+      aerr("ERROR: Failed to bind callbacks: %d\n", ret);
       return ret;
     }
 
@@ -440,9 +442,17 @@ int adc_register(FAR const char *path, FAR struct adc_dev_s *dev)
 
   dev->ad_ocount = 0;
 
+  /* Initialize semaphores */
+
   sem_init(&dev->ad_recv.af_sem, 0, 0);
   sem_init(&dev->ad_closesem, 0, 1);
 
+  /* The receive semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&dev->ad_recv.af_sem, SEM_PRIO_NONE);
+
   /* Reset the ADC hardware */
 
   DEBUGASSERT(dev->ad_ops->ao_reset != NULL);
diff --git a/drivers/analog/ads1242.c b/drivers/analog/ads1242.c
index ccd9c0d18d02a5a392cc7bf37abfd7eb764341c1..018da51cf53c7117400f9a62003930c456618f25 100644
--- a/drivers/analog/ads1242.c
+++ b/drivers/analog/ads1242.c
@@ -97,9 +97,9 @@ static void    ads1242_set_negative_input(FAR struct ads1242_dev_s *dev,
                  ADS1242_NEGATIVE_INPUT_SELECTION const neg_in_sel);
 static bool    ads1242_is_data_ready(FAR struct ads1242_dev_s *dev);
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_INFO)
 static void    ads1242_print_regs(FAR struct ads1242_dev_s *dev, char const *msg);
-#endif /* CONFIG_DEBUG && CONFIG_DEBUG_VERBOSE */
+#endif /* CONFIG_DEBUG_FEATURES && CONFIG_DEBUG_INFO */
 
 /* Character driver methods */
 
@@ -331,7 +331,7 @@ static void ads1242_set_gain(FAR struct ads1242_dev_s *dev,
   setup_reg_value |= (uint8_t)(gain_selection);
   ads1242_write_reg(dev, ADS1242_REG_SETUP, setup_reg_value);
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_INFO)
   ads1242_print_regs(dev, "ads1242_set_gain");
 #endif
 
@@ -355,7 +355,7 @@ static void ads1242_set_positive_input(FAR struct ads1242_dev_s *dev,
   mux_reg_value |= (uint8_t)(pos_in_sel);
   ads1242_write_reg(dev, ADS1242_REG_MUX, mux_reg_value);
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_INFO)
   ads1242_print_regs(dev, "ads1242_set_positive_input");
 #endif
 }
@@ -375,7 +375,7 @@ static void ads1242_set_negative_input(FAR struct ads1242_dev_s *dev,
   mux_reg_value |= (uint8_t)(neg_in_sel);
   ads1242_write_reg(dev, ADS1242_REG_MUX, mux_reg_value);
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_INFO)
   ads1242_print_regs(dev, "ads1242_set_negative_input");
 #endif
 }
@@ -396,24 +396,24 @@ static bool ads1242_is_data_ready(FAR struct ads1242_dev_s *dev)
  * Name: ads1242_print_regs
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_INFO)
 static void ads1242_print_regs(FAR struct ads1242_dev_s *dev, char const *msg)
 {
  uint8_t setup_reg_value = 0;
  uint8_t mux_reg_value   = 0;
  uint8_t acr_reg_value   = 0;
 
- dbg("%s\n", msg);
+ ainfo("%s\n", msg);
 
  ads1242_read_reg(dev, ADS1242_REG_SETUP, &setup_reg_value);
  ads1242_read_reg(dev, ADS1242_REG_MUX, &mux_reg_value);
  ads1242_read_reg(dev, ADS1242_REG_ACR, &acr_reg_value);
 
- dbg("SETUP  %02X\n", setup_reg_value);
- dbg("MUX    %02X\n", mux_reg_value);
- dbg("ACR    %02X\n", acr_reg_value);
+ ainfo("SETUP  %02X\n", setup_reg_value);
+ ainfo("MUX    %02X\n", mux_reg_value);
+ ainfo("ACR    %02X\n", acr_reg_value);
 }
-#endif /* CONFIG_DEBUG && CONFIG_DEBUG_VERBOSE */
+#endif /* CONFIG_DEBUG_FEATURES && CONFIG_DEBUG_INFO */
 
 /****************************************************************************
  * Name: ads1242_open
@@ -441,7 +441,7 @@ static int ads1242_open(FAR struct file *filep)
   ads1242_performSelfOffsetCalibration(priv);
   up_mdelay(100);
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_INFO)
   ads1242_print_regs(priv, "ads1242_open");
 #endif
 
@@ -552,7 +552,7 @@ static int ads1242_ioctl (FAR struct file *filep, int cmd, unsigned long arg)
       /* Command was not recognized */
 
     default:
-      dbg ("Unrecognized cmd: %d\n", cmd);
+       _err("ERROR: Unrecognized cmd: %d\n", cmd);
       ret = -ENOTTY;
       break;
     }
@@ -596,7 +596,7 @@ int ads1242_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
   priv = (FAR struct ads1242_dev_s *)kmm_malloc(sizeof(struct ads1242_dev_s));
   if (priv == NULL)
     {
-      dbg ("Failed to allocate instance\n");
+       _err("ERROR: Failed to allocate instance\n");
       return -ENOMEM;
     }
 
@@ -610,7 +610,7 @@ int ads1242_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
   ret = register_driver(devpath, &g_ads1242_fops, 0666, priv);
   if (ret < 0)
     {
-      dbg ("Failed to register driver: %d\n", ret);
+       _err("ERROR: Failed to register driver: %d\n", ret);
       kmm_free(priv);
     }
 
diff --git a/drivers/analog/ads1255.c b/drivers/analog/ads1255.c
index adb8933b380bd0f35e192f60aedb294861607142..94b278de096042a0a031bc0f9816adca6bb70e59 100644
--- a/drivers/analog/ads1255.c
+++ b/drivers/analog/ads1255.c
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
  * arch/drivers/analog/ads1255.c
  *
  *   Copyright (C) 2010, 2016 Gregory Nutt. All rights reserved.
@@ -37,7 +37,7 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 /****************************************************************************
  * Included Files
@@ -148,7 +148,7 @@ static int  adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg);
 /* Interrupt handling */
 
 static void adc_worker(FAR void *arg);
-static int  adc_interrupt(int irq, void *context);
+static int  adc_interrupt(int irq, void *context, FAR void *arg);
 
 /****************************************************************************
  * Private Data
@@ -312,7 +312,7 @@ static int adc_setup(FAR struct adc_dev_s *dev)
   DEBUGASSERT(priv != NULL && priv->spi != NULL);
   spi = priv->spi;
 
-  ret = irq_attach(priv->irq, adc_interrupt);
+  ret = irq_attach(priv->irq, adc_interrupt, NULL);
   if (ret == OK)
     {
       adc_lock(spi);
@@ -396,7 +396,7 @@ static void adc_rxint(FAR struct adc_dev_s *dev, bool enable)
 
 static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg)
 {
-  dbg("Fix me:Not Implemented\n");
+  _err("ERROR: Fix me; Not Implemented\n");
   return 0;
 }
 
@@ -473,7 +473,7 @@ static void adc_worker(FAR void *arg)
  *
  ****************************************************************************/
 
-static int adc_interrupt(int irq, void *context)
+static int adc_interrupt(int irq, void *context, FAR void *arg)
 {
   FAR struct ads1255_dev_s *priv = (FAR struct ads1255_dev_s *)g_adcdev.ad_priv;
 
diff --git a/drivers/analog/dac.c b/drivers/analog/dac.c
index daf8b5f34a458b244998b1b7582af7faae11286a..131b7e800fb43e30ae363791a7ffe289df44a155 100644
--- a/drivers/analog/dac.c
+++ b/drivers/analog/dac.c
@@ -55,8 +55,9 @@
 #include 
 #include 
 
-#include 
 #include 
+#include 
+#include 
 #include 
 
 #include 
@@ -478,6 +479,7 @@ static int dac_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 int dac_txdone(FAR struct dac_dev_s *dev)
 {
   int ret = -ENOENT;
+  int sval;
 
   /* Verify that the xmit FIFO is not empty */
 
@@ -497,7 +499,11 @@ int dac_txdone(FAR struct dac_dev_s *dev)
         {
           /* Inform any waiting threads that new xmit space is available */
 
-          ret = sem_post(&dev->ad_xmit.af_sem);
+          ret = sem_getvalue(&dev->ad_xmit.af_sem, &sval);
+          if (ret == OK && sval <= 0)
+            {
+              ret = sem_post(&dev->ad_xmit.af_sem);
+            }
         }
     }
 
@@ -510,9 +516,17 @@ int dac_register(FAR const char *path, FAR struct dac_dev_s *dev)
 
   dev->ad_ocount = 0;
 
+  /* Initialize semaphores */
+
   sem_init(&dev->ad_xmit.af_sem, 0, 0);
   sem_init(&dev->ad_closesem, 0, 1);
 
+  /* The transmit semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&dev->ad_xmit.af_sem, SEM_PRIO_NONE);
+
   dev->ad_ops->ao_reset(dev);
 
   return register_driver(path, &dac_fops, 0555, dev);
diff --git a/drivers/analog/pga11x.c b/drivers/analog/pga11x.c
index d542bb77978ced27efdb4a2e512ad1d1a434b748..de86444b3854ae120cc72cdfa383aa8e40698ddc 100644
--- a/drivers/analog/pga11x.c
+++ b/drivers/analog/pga11x.c
@@ -101,26 +101,6 @@
 
 #define SPI_DUMMY 0xff
 
-/* Debug ********************************************************************/
-/* Check if (non-standard) SPI debug is enabled */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_SPI
-#endif
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg dbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg dbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -138,7 +118,7 @@
 
 static void pga11x_configure(FAR struct spi_dev_s *spi)
 {
-  spivdbg("MODE: %d BITS: 8 Frequency: %d\n",
+  spiinfo("MODE: %d BITS: 8 Frequency: %d\n",
           CONFIG_PGA11X_SPIMODE, CONFIG_PGA11X_SPIFREQUENCY);
 
   /* Call the setfrequency, setbits, and setmode methods to make sure that
@@ -164,7 +144,7 @@ static void pga11x_configure(FAR struct spi_dev_s *spi)
 
 static void pga11x_lock(FAR struct spi_dev_s *spi)
 {
-  spivdbg("Locking\n");
+  spiinfo("Locking\n");
 
   /* On SPI busses where there are multiple devices, it will be necessary to
    * lock SPI to have exclusive access to the busses for a sequence of
@@ -198,7 +178,7 @@ static void pga11x_lock(FAR struct spi_dev_s *spi)
 
 static inline void pga11x_unlock(FAR struct spi_dev_s *spi)
 {
-  spivdbg("Unlocking\n");
+  spiinfo("Unlocking\n");
 
   SPI_LOCK(spi, false);
 }
@@ -223,7 +203,7 @@ static inline void pga11x_unlock(FAR struct spi_dev_s *spi)
 
 static void pga11x_send16(FAR struct spi_dev_s *spi, uint16_t word)
 {
-  spivdbg("Send %04x\n", word);
+  spiinfo("Send %04x\n", word);
 
   /* The logical interface is 16-bits wide.  However, this driver uses a
    * 8-bit configuration for greaer portability.
@@ -265,7 +245,7 @@ static uint16_t pga11x_recv16(FAR struct spi_dev_s *spi)
 
   msb = SPI_SEND(spi, SPI_DUMMY);
   lsb = SPI_SEND(spi, SPI_DUMMY);
-  spivdbg("Received %02x %02x\n", msb, lsb);
+  spiinfo("Received %02x %02x\n", msb, lsb);
 
   return ((uint16_t)msb << 8) | (uint16_t)lsb;
 }
@@ -293,7 +273,7 @@ static uint16_t pga11x_recv16(FAR struct spi_dev_s *spi)
 #ifndef CONFIG_PGA11X_DAISYCHAIN
 static void pga11x_write(FAR struct spi_dev_s *spi, uint16_t cmd)
 {
-  spivdbg("cmd %04x\n", cmd);
+  spiinfo("cmd %04x\n", cmd);
 
   /* Lock, select, send the 16-bit command, de-select, and un-lock. */
 
@@ -306,7 +286,7 @@ static void pga11x_write(FAR struct spi_dev_s *spi, uint16_t cmd)
 #else
 static void pga11x_write(FAR struct spi_dev_s *spi, uint16_t u1cmd, uint16_t u2cmd)
 {
-  spivdbg("U1 cmd: %04x U2 cmd: %04x\n", u1cmd, u2cmd);
+  spiinfo("U1 cmd: %04x U2 cmd: %04x\n", u1cmd, u2cmd);
 
   /* Lock, select, send the U2 16-bit command, the U1 16-bit command, de-select,
    * and un-lock.
@@ -343,7 +323,7 @@ static void pga11x_write(FAR struct spi_dev_s *spi, uint16_t u1cmd, uint16_t u2c
 
 PGA11X_HANDLE pga11x_initialize(FAR struct spi_dev_s *spi)
 {
-  spivdbg("Entry\n");
+  spiinfo("Entry\n");
 
   /* No Special state is required, just return the SPI driver instance as
    * the handle.  This gives us a place to extend functionality in the
@@ -380,7 +360,7 @@ int pga11x_select(PGA11X_HANDLE handle,
   uint16_t cmd;
 
   DEBUGASSERT(handle && settings);
-  spivdbg("channel: %d gain: %d\n", settings->channel, settings->gain);
+  spiinfo("channel: %d gain: %d\n", settings->channel, settings->gain);
 
   /* Format the command */
 
@@ -398,8 +378,8 @@ int pga11x_select(PGA11X_HANDLE handle,
   uint16_t u2cmd;
 
   DEBUGASSERT(handle && settings);
-  spivdbg("U1 channel: %d gain: %d\n", settings->u1.channel, settings->u1.gain);
-  spivdbg("U1 channel: %d gain: %d\n", settings->u1.channel, settings->u1.gain);
+  spiinfo("U1 channel: %d gain: %d\n", settings->u1.channel, settings->u1.gain);
+  spiinfo("U1 channel: %d gain: %d\n", settings->u1.channel, settings->u1.gain);
 
   /* Format the commands */
 
@@ -445,7 +425,7 @@ int pga11x_uselect(PGA11X_HANDLE handle, int pos,
   uint16_t u1cmd;
   uint16_t u2cmd;
 
-  spivdbg("channel: %d gain: %d\n", settings->channel, settings->gain);
+  spiinfo("channel: %d gain: %d\n", settings->channel, settings->gain);
   DEBUGASSERT(handle);
 
   /* Format the commands */
@@ -498,7 +478,7 @@ int pga11x_read(PGA11X_HANDLE handle, FAR struct pga11x_settings_s *settings)
   uint16_t u1value;
   uint16_t u2value;
 
-  spivdbg("Entry\n");
+  spiinfo("Entry\n");
   DEBUGASSERT(handle && settings);
 
   /* Lock the bus and read the configuration */
@@ -526,7 +506,7 @@ int pga11x_read(PGA11X_HANDLE handle, FAR struct pga11x_settings_s *settings)
 
   /* Decode the returned value */
 
-  spivdbg("Returning %04x %04x\n", u2value, u1value);
+  spiinfo("Returning %04x %04x\n", u2value, u1value);
   settings->u1.channel = (uint8_t)((u1value & PGA11X_CHAN_MASK) >> PGA11X_CHAN_SHIFT);
   settings->u1.gain    = (uint8_t)((u1value & PGA11X_GAIN_MASK) >> PGA11X_GAIN_SHIFT);
   settings->u2.channel = (uint8_t)((u2value & PGA11X_CHAN_MASK) >> PGA11X_CHAN_SHIFT);
@@ -536,7 +516,7 @@ int pga11x_read(PGA11X_HANDLE handle, FAR struct pga11x_settings_s *settings)
   FAR struct spi_dev_s *spi = (FAR struct spi_dev_s *)handle;
   uint16_t value;
 
-  spivdbg("Entry\n");
+  spiinfo("Entry\n");
   DEBUGASSERT(handle);
 
   /* Lock the bus and read the configuration */
@@ -561,7 +541,7 @@ int pga11x_read(PGA11X_HANDLE handle, FAR struct pga11x_settings_s *settings)
 
   /* Decode the returned value */
 
-  spivdbg("Returning: %04x\n", value);
+  spiinfo("Returning: %04x\n", value);
   settings->channel = (uint8_t)((value & PGA11X_CHAN_MASK) >> PGA11X_CHAN_SHIFT);
   settings->gain    = (uint8_t)((value & PGA11X_GAIN_MASK) >> PGA11X_GAIN_SHIFT);
   return OK;
@@ -633,7 +613,7 @@ int pga11x_shutdown(PGA11X_HANDLE handle)
 {
   FAR struct spi_dev_s *spi = (FAR struct spi_dev_s *)handle;
 
-  spivdbg("Entry\n");
+  spiinfo("Entry\n");
   DEBUGASSERT(handle);
 
   /* Enter shutdown mode by issuing an SDN_EN command */
@@ -669,7 +649,7 @@ int pga11x_ushutdown(PGA11X_HANDLE handle, int pos)
 {
   FAR struct spi_dev_s *spi = (FAR struct spi_dev_s *)handle;
 
-  spivdbg("Entry\n");
+  spiinfo("Entry\n");
   DEBUGASSERT(handle);
 
   /* Enter shutdown mode by issuing an SDN_EN command */
@@ -709,7 +689,7 @@ int pga11x_enable(PGA11X_HANDLE handle)
 {
   FAR struct spi_dev_s *spi = (FAR struct spi_dev_s *)handle;
 
-  spivdbg("Entry\n");
+  spiinfo("Entry\n");
   DEBUGASSERT(handle);
 
   /* Lock the bus and send the shutdown disable command.  Shutdown mode is
@@ -748,7 +728,7 @@ int pga11x_uenable(PGA11X_HANDLE handle, int pos)
 {
   FAR struct spi_dev_s *spi = (FAR struct spi_dev_s *)handle;
 
-  spivdbg("Entry\n");
+  spiinfo("Entry\n");
   DEBUGASSERT(handle);
 
   /* Enter shutdown mode by issuing an SDN_EN command */
diff --git a/drivers/audio/Kconfig b/drivers/audio/Kconfig
index 81c247a64200c4d018efb5a6f4c3cb41e5fe600f..ade8bc93756d09d136813759b3dd3e656e20363f 100644
--- a/drivers/audio/Kconfig
+++ b/drivers/audio/Kconfig
@@ -33,7 +33,18 @@ config AUDIO_I2SCHAR_TXTIMEOUT
 		transfers.  This is in units of system clock ticks (configurable).
 		The special value of zero disables RX timeouts.  Default: 0
 
-endif #AUDIO_I2SCHAR
+endif # AUDIO_I2SCHAR
+
+config AUDIO_TONE
+	bool "Audio Tone Generator using PWM"
+	default n
+	depends on PWM && AUDIO_DEVICES
+	---help---
+		This driver enables the Audio Tone Generator for NuttX.
+
+if AUDIO_TONE
+
+endif # AUDIO_TONE
 
 config VS1053
 	bool "VS1053 codec chip"
diff --git a/drivers/audio/Make.defs b/drivers/audio/Make.defs
index f645deade79368faca5f2440f92409e6e5215bef..5932714f6d68d9570376441e93d97bb798f5276b 100644
--- a/drivers/audio/Make.defs
+++ b/drivers/audio/Make.defs
@@ -62,6 +62,10 @@ ifeq ($(CONFIG_AUDIO_I2SCHAR),y)
 CSRCS += i2schar.c
 endif
 
+ifeq ($(CONFIG_AUDIO_TONE),y)
+CSRCS += tone.c
+endif
+
 # Include Audio driver support
 
 DEPPATH += --dep-path audio
diff --git a/drivers/audio/audio_null.c b/drivers/audio/audio_null.c
index f5a1337f5cabf0cc6b5f436c6f536d829a359408..d6c522101ae6e69c9e35f806915d3f6d8f67c302 100644
--- a/drivers/audio/audio_null.c
+++ b/drivers/audio/audio_null.c
@@ -178,7 +178,7 @@ static const struct audio_ops_s g_audioops =
 static int null_getcaps(FAR struct audio_lowerhalf_s *dev, int type,
                           FAR struct audio_caps_s *caps)
 {
-  audvdbg("type=%d\n", type);
+  audinfo("type=%d\n", type);
 
   /* Validate the structure */
 
@@ -324,7 +324,7 @@ static int null_getcaps(FAR struct audio_lowerhalf_s *dev, int type,
    * proper Audio device type.
    */
 
-  audvdbg("Return %d\n", caps->ac_len);
+  audinfo("Return %d\n", caps->ac_len);
   return caps->ac_len;
 }
 
@@ -345,14 +345,14 @@ static int null_configure(FAR struct audio_lowerhalf_s *dev,
                           FAR const struct audio_caps_s *caps)
 #endif
 {
-  audvdbg("ac_type: %d\n", caps->ac_type);
+  audinfo("ac_type: %d\n", caps->ac_type);
 
   /* Process the configure operation */
 
   switch (caps->ac_type)
     {
     case AUDIO_TYPE_FEATURE:
-      audvdbg("  AUDIO_TYPE_FEATURE\n");
+      audinfo("  AUDIO_TYPE_FEATURE\n");
 
       /* Process based on Feature Unit */
 
@@ -360,39 +360,39 @@ static int null_configure(FAR struct audio_lowerhalf_s *dev,
         {
 #ifndef CONFIG_AUDIO_EXCLUDE_VOLUME
         case AUDIO_FU_VOLUME:
-          audvdbg("    Volume: %d\n", caps->ac_controls.hw[0]);
+          audinfo("    Volume: %d\n", caps->ac_controls.hw[0]);
           break;
 #endif  /* CONFIG_AUDIO_EXCLUDE_VOLUME */
 
 #ifndef CONFIG_AUDIO_EXCLUDE_TONE
         case AUDIO_FU_BASS:
-          audvdbg("    Bass: %d\n", caps->ac_controls.b[0]);
+          audinfo("    Bass: %d\n", caps->ac_controls.b[0]);
           break;
 
         case AUDIO_FU_TREBLE:
-          audvdbg("    Treble: %d\n", caps->ac_controls.b[0]);
+          audinfo("    Treble: %d\n", caps->ac_controls.b[0]);
           break;
 #endif  /* CONFIG_AUDIO_EXCLUDE_TONE */
 
         default:
-          auddbg("    Unrecognized feature unit\n");
+          auderr("    ERROR: Unrecognized feature unit\n");
           break;
         }
       break;
 
     case AUDIO_TYPE_OUTPUT:
-      audvdbg("  AUDIO_TYPE_OUTPUT:\n");
-      audvdbg("    Number of channels: %u\n", caps->ac_channels);
-      audvdbg("    Sample rate:        %u\n", caps->ac_controls.hw[0]);
-      audvdbg("    Sample width:       %u\n", caps->ac_controls.b[2]);
+      audinfo("  AUDIO_TYPE_OUTPUT:\n");
+      audinfo("    Number of channels: %u\n", caps->ac_channels);
+      audinfo("    Sample rate:        %u\n", caps->ac_controls.hw[0]);
+      audinfo("    Sample width:       %u\n", caps->ac_controls.b[2]);
       break;
 
     case AUDIO_TYPE_PROCESSING:
-      audvdbg("  AUDIO_TYPE_PROCESSING:\n");
+      audinfo("  AUDIO_TYPE_PROCESSING:\n");
       break;
     }
 
-  audvdbg("Return OK\n");
+  audinfo("Return OK\n");
   return OK;
 }
 
@@ -406,7 +406,7 @@ static int null_configure(FAR struct audio_lowerhalf_s *dev,
 
 static int null_shutdown(FAR struct audio_lowerhalf_s *dev)
 {
-  audvdbg("Return OK\n");
+  audinfo("Return OK\n");
   return OK;
 }
 
@@ -425,7 +425,7 @@ static void *null_workerthread(pthread_addr_t pvarg)
   int msglen;
   int prio;
 
-  audvdbg("Entry\n");
+  audinfo("Entry\n");
 
   /* Loop as long as we are supposed to be running */
 
@@ -443,7 +443,7 @@ static void *null_workerthread(pthread_addr_t pvarg)
 
       if (msglen < sizeof(struct audio_msg_s))
         {
-          auddbg("ERROR: Message too small: %d\n", msglen);
+          auderr("ERROR: Message too small: %d\n", msglen);
           continue;
         }
 
@@ -467,7 +467,7 @@ static void *null_workerthread(pthread_addr_t pvarg)
             break;
 
           default:
-            auddbg("ERROR: Ignoring message ID %d\n", msg.msgId);
+            auderr("ERROR: Ignoring message ID %d\n", msg.msgId);
             break;
         }
     }
@@ -486,7 +486,7 @@ static void *null_workerthread(pthread_addr_t pvarg)
   priv->dev.upper(priv->dev.priv, AUDIO_CALLBACK_COMPLETE, NULL, OK);
 #endif
 
-  audvdbg("Exit\n");
+  audinfo("Exit\n");
   return NULL;
 }
 
@@ -511,7 +511,7 @@ static int null_start(FAR struct audio_lowerhalf_s *dev)
   FAR void *value;
   int ret;
 
-  audvdbg("Entry\n");
+  audinfo("Entry\n");
 
   /* Create a message queue for the worker thread */
 
@@ -527,7 +527,7 @@ static int null_start(FAR struct audio_lowerhalf_s *dev)
     {
       /* Error creating message queue! */
 
-      auddbg("ERROR: Couldn't allocate message queue\n");
+      auderr("ERROR: Couldn't allocate message queue\n");
       return -ENOMEM;
     }
 
@@ -535,7 +535,7 @@ static int null_start(FAR struct audio_lowerhalf_s *dev)
 
   if (priv->threadid != 0)
     {
-      audvdbg("Joining old thread\n");
+      audinfo("Joining old thread\n");
       pthread_join(priv->threadid, &value);
     }
 
@@ -546,20 +546,20 @@ static int null_start(FAR struct audio_lowerhalf_s *dev)
   (void)pthread_attr_setschedparam(&tattr, &sparam);
   (void)pthread_attr_setstacksize(&tattr, CONFIG_AUDIO_NULL_WORKER_STACKSIZE);
 
-  audvdbg("Starting worker thread\n");
+  audinfo("Starting worker thread\n");
   ret = pthread_create(&priv->threadid, &tattr, null_workerthread,
                        (pthread_addr_t)priv);
   if (ret != OK)
     {
-      auddbg("ERROR: pthread_create failed: %d\n", ret);
+      auderr("ERROR: pthread_create failed: %d\n", ret);
     }
   else
     {
       pthread_setname_np(priv->threadid, "null audio");
-      audvdbg("Created worker thread\n");
+      audinfo("Created worker thread\n");
     }
 
-  audvdbg("Return %d\n", ret);
+  audinfo("Return %d\n", ret);
   return ret;
 }
 
@@ -597,7 +597,7 @@ static int null_stop(FAR struct audio_lowerhalf_s *dev)
   pthread_join(priv->threadid, &value);
   priv->threadid = 0;
 
-  audvdbg("Return OK\n");
+  audinfo("Return OK\n");
   return OK;
 }
 #endif
@@ -616,7 +616,7 @@ static int null_pause(FAR struct audio_lowerhalf_s *dev, FAR void *session)
 static int null_pause(FAR struct audio_lowerhalf_s *dev)
 #endif
 {
-  audvdbg("Return OK\n");
+  audinfo("Return OK\n");
   return OK;
 }
 #endif /* CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME */
@@ -635,7 +635,7 @@ static int null_resume(FAR struct audio_lowerhalf_s *dev, FAR void *session)
 static int null_resume(FAR struct audio_lowerhalf_s *dev)
 #endif
 {
-  audvdbg("Return OK\n");
+  audinfo("Return OK\n");
   return OK;
 }
 #endif /* CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME */
@@ -653,7 +653,7 @@ static int null_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
   FAR struct null_dev_s *priv = (FAR struct null_dev_s *)dev;
   bool done;
 
-  audvdbg("apb=%p curbyte=%d nbytes=%d\n", apb, apb->curbyte, apb->nbytes);
+  audinfo("apb=%p curbyte=%d nbytes=%d\n", apb, apb->curbyte, apb->nbytes);
 
   /* Say that we consumed all of the data */
 
@@ -688,7 +688,7 @@ static int null_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
 #endif
     }
 
-  audvdbg("Return OK\n");
+  audinfo("Return OK\n");
   return OK;
 }
 
@@ -702,7 +702,7 @@ static int null_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
 static int null_cancelbuffer(FAR struct audio_lowerhalf_s *dev,
                              FAR struct ap_buffer_s *apb)
 {
-  audvdbg("apb=%p curbyte=%d nbytes=%d, return OK\n",
+  audinfo("apb=%p curbyte=%d nbytes=%d, return OK\n",
           apb, apb->curbyte, apb->nbytes);
 
   return OK;
@@ -722,7 +722,7 @@ static int null_ioctl(FAR struct audio_lowerhalf_s *dev, int cmd,
   FAR struct ap_buffer_info_s *bufinfo;
 #endif
 
-  audvdbg("cmd=%d arg=%ld\n");
+  audinfo("cmd=%d arg=%ld\n");
 
   /* Deal with ioctls passed from the upper-half driver */
 
@@ -734,7 +734,7 @@ static int null_ioctl(FAR struct audio_lowerhalf_s *dev, int cmd,
 
       case AUDIOIOC_HWRESET:
         {
-          audvdbg("AUDIOIOC_HWRESET:\n");
+          audinfo("AUDIOIOC_HWRESET:\n");
         }
         break;
 
@@ -743,7 +743,7 @@ static int null_ioctl(FAR struct audio_lowerhalf_s *dev, int cmd,
 #ifdef CONFIG_AUDIO_DRIVER_SPECIFIC_BUFFERS
       case AUDIOIOC_GETBUFFERINFO:
         {
-          audvdbg("AUDIOIOC_GETBUFFERINFO:\n");
+          audinfo("AUDIOIOC_GETBUFFERINFO:\n");
           bufinfo              = (FAR struct ap_buffer_info_s *) arg;
           bufinfo->buffer_size = CONFIG_AUDIO_NULL_BUFFER_SIZE;
           bufinfo->nbuffers    = CONFIG_AUDIO_NULL_NUM_BUFFERS;
@@ -755,7 +755,7 @@ static int null_ioctl(FAR struct audio_lowerhalf_s *dev, int cmd,
         break;
     }
 
-  audvdbg("Return OK\n");
+  audinfo("Return OK\n");
   return OK;
 }
 
@@ -773,7 +773,7 @@ static int null_reserve(FAR struct audio_lowerhalf_s *dev,
 static int null_reserve(FAR struct audio_lowerhalf_s *dev)
 #endif
 {
-  audvdbg("Return OK\n");
+  audinfo("Return OK\n");
   return OK;
 }
 
@@ -843,6 +843,6 @@ FAR struct audio_lowerhalf_s *audio_null_initialize(void)
       return &priv->dev;
     }
 
-  auddbg("ERROR: Failed to allocate null audio device\n");
+  auderr("ERROR: Failed to allocate null audio device\n");
   return NULL;
 }
diff --git a/drivers/audio/i2schar.c b/drivers/audio/i2schar.c
index 5f2d6a5c024265d0939f9d5f637626e416aae199..2701a67dc2813aab7f0b6438d3ddba316c186851 100644
--- a/drivers/audio/i2schar.c
+++ b/drivers/audio/i2schar.c
@@ -75,32 +75,6 @@
 #define DEVNAME_FMT    "/dev/i2schar%d"
 #define DEVNAME_FMTLEN (12 + 3 + 1)
 
-/* Debug *******************************************************************/
-/* Check if SSC debut is enabled (non-standard.. no support in
- * include/debug.h
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_I2S
-#endif
-
-#ifdef CONFIG_DEBUG_I2S
-#  define i2sdbg         dbg
-#  define i2slldbg       lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define i2svdbg      dbg
-#    define i2sllvdbg    lldbg
-#  else
-#    define i2svdbg(x...)
-#  endif
-#else
-#  define i2sdbg(x...)
-#  define i2slldbg(x...)
-#  define i2svdbg(x...)
-#  define i2sllvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -174,7 +148,7 @@ static void i2schar_rxcallback(FAR struct i2s_dev_s *dev,
   FAR struct i2schar_dev_s *priv = (FAR struct i2schar_dev_s *)arg;
 
   DEBUGASSERT(priv && apb);
-  i2svdbg("apb=%p nbytes=%d result=%d\n", apb, apb->nbytes, result);
+  i2sinfo("apb=%p nbytes=%d result=%d\n", apb, apb->nbytes, result);
 
   /* REVISIT: If you want this to actually do something other than
    * test I2S data transfer, then this is the point where you would
@@ -185,7 +159,7 @@ static void i2schar_rxcallback(FAR struct i2s_dev_s *dev,
    * now.
    */
 
-  i2svdbg("Freeing apb=%p crefs=%d\n", apb, apb->crefs);
+  i2sinfo("Freeing apb=%p crefs=%d\n", apb, apb->crefs);
   apb_free(apb);
 }
 
@@ -209,7 +183,7 @@ static void i2schar_txcallback(FAR struct i2s_dev_s *dev,
   FAR struct i2schar_dev_s *priv = (FAR struct i2schar_dev_s *)arg;
 
   DEBUGASSERT(priv && apb);
-  i2svdbg("apb=%p nbytes=%d result=%d\n", apb, apb->nbytes, result);
+  i2sinfo("apb=%p nbytes=%d result=%d\n", apb, apb->nbytes, result);
 
   /* REVISIT: If you want this to actually do something other than
    * test I2S data transfer, then this is the point where you would
@@ -220,7 +194,7 @@ static void i2schar_txcallback(FAR struct i2s_dev_s *dev,
    * now.
    */
 
-  i2svdbg("Freeing apb=%p crefs=%d\n", apb, apb->crefs);
+  i2sinfo("Freeing apb=%p crefs=%d\n", apb, apb->crefs);
   apb_free(apb);
 }
 
@@ -241,7 +215,7 @@ static ssize_t i2schar_read(FAR struct file *filep, FAR char *buffer,
   size_t nbytes;
   int ret;
 
-  i2svdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+  i2sinfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
 
   /* Get our private data structure */
 
@@ -272,7 +246,7 @@ static ssize_t i2schar_read(FAR struct file *filep, FAR char *buffer,
     {
       ret = -errno;
       DEBUGASSERT(ret < 0);
-      i2sdbg("ERROR: sem_wait returned: %d\n", ret);
+      i2serr("ERROR: sem_wait returned: %d\n", ret);
       goto errout_with_reference;
     }
 
@@ -282,7 +256,7 @@ static ssize_t i2schar_read(FAR struct file *filep, FAR char *buffer,
                     CONFIG_AUDIO_I2SCHAR_RXTIMEOUT);
   if (ret < 0)
     {
-      i2sdbg("ERROR: I2S_RECEIVE returned: %d\n", ret);
+      i2serr("ERROR: I2S_RECEIVE returned: %d\n", ret);
       goto errout_with_reference;
     }
 
@@ -316,7 +290,7 @@ static ssize_t i2schar_write(FAR struct file *filep, FAR const char *buffer,
   size_t nbytes;
   int ret;
 
-  i2svdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+  i2sinfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
 
   /* Get our private data structure */
 
@@ -347,7 +321,7 @@ static ssize_t i2schar_write(FAR struct file *filep, FAR const char *buffer,
     {
       ret = -errno;
       DEBUGASSERT(ret < 0);
-      i2sdbg("ERROR: sem_wait returned: %d\n", ret);
+      i2serr("ERROR: sem_wait returned: %d\n", ret);
       goto errout_with_reference;
     }
 
@@ -357,7 +331,7 @@ static ssize_t i2schar_write(FAR struct file *filep, FAR const char *buffer,
                  CONFIG_AUDIO_I2SCHAR_TXTIMEOUT);
   if (ret < 0)
     {
-      i2sdbg("ERROR: I2S_SEND returned: %d\n", ret);
+      i2serr("ERROR: I2S_SEND returned: %d\n", ret);
       goto errout_with_reference;
     }
 
diff --git a/drivers/audio/tone.c b/drivers/audio/tone.c
new file mode 100644
index 0000000000000000000000000000000000000000..f9b5393f73b45ebb010c2e93a8fc9753d39905e6
--- /dev/null
+++ b/drivers/audio/tone.c
@@ -0,0 +1,978 @@
+/****************************************************************************
+ * drivers/audio/tone.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Alan Carvalho de Assis 
+ *
+ * This driver is based on Tone Alarm driver from PX4 project. It was
+ * modified to become a NuttX driver and to use the Oneshot Timer API.
+ *
+ * The PX4 driver is here:
+ * https://github.com/PX4/Firmware/blob/master/src/drivers/stm32/tone_alarm/tone_alarm.cpp
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#ifdef CONFIG_AUDIO_TONE
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Define tone modes */
+
+#define MODE_NORMAL   1
+#define MODE_LEGATO   2
+#define MODE_STACCATO 3
+
+/* Max tune string length*/
+
+#define MAX_TUNE_LEN (1 * 256)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* This structure describes the state of the upper half driver */
+
+struct tone_upperhalf_s
+{
+  uint8_t crefs;                       /* The number of times the device has been
+                                        * opened */
+#ifdef CONFIG_PWM_MULTICHAN
+  uint8_t channel;                     /* Output channel that drives the tone. */
+#endif
+  volatile bool started;               /* True: pulsed output is being generated */
+  sem_t exclsem;                       /* Supports mutual exclusion */
+  struct pwm_info_s tone;              /* Pulsed output for Audio Tone */
+  struct pwm_lowerhalf_s *devtone;
+  struct oneshot_lowerhalf_s *oneshot;
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Buffer to store the tune */
+
+static char tune_buf[MAX_TUNE_LEN];
+
+/* Semitone offsets from C for the characters 'A'-'G' */
+
+static const uint8_t g_note_tab[] = { 9, 11, 0, 2, 4, 5, 7 };
+
+/* Notes in Frequency */
+
+static const uint16_t g_notes_freq[84] =
+{
+  0x0041, 0x0045, 0x0049, 0x004d, 0x0052, 0x0057, 0x005c,
+  0x0061, 0x0067, 0x006e, 0x0074, 0x007b, 0x0082, 0x008a,
+  0x0092, 0x009b, 0x00a4, 0x00ae, 0x00b8, 0x00c3, 0x00cf,
+  0x00dc, 0x00e9, 0x00f6, 0x0105, 0x0115, 0x0125, 0x0137,
+  0x0149, 0x015d, 0x0171, 0x0187, 0x019f, 0x01b8, 0x01d2,
+  0x01ed, 0x020b, 0x022a, 0x024b, 0x026e, 0x0293, 0x02ba,
+  0x02e3, 0x030f, 0x033e, 0x0370, 0x03a4, 0x03db, 0x0416,
+  0x0454, 0x0496, 0x04dc, 0x0526, 0x0574, 0x05c7, 0x061f,
+  0x067d, 0x06e0, 0x0748, 0x07b7, 0x082d, 0x08a9, 0x092d,
+  0x09b9, 0x0a4d, 0x0ae9, 0x0b8f, 0x0c3f, 0x0cfa, 0x0dc0,
+  0x0e91, 0x0f6f, 0x105a, 0x1152, 0x125a, 0x1372, 0x149a,
+  0x15d3, 0x171f, 0x187f, 0x19f4, 0x1b80, 0x1d22, 0x1ede
+};
+
+/* Global variable used by the tone generator */
+
+static const char *g_tune;
+static const char *g_next;
+static uint8_t g_tempo;
+static uint8_t g_note_mode;
+static uint32_t g_note_length;
+static uint32_t g_silence_length;
+static uint8_t g_octave;
+static bool g_repeat;
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static void oneshot_callback(FAR struct oneshot_lowerhalf_s *lower,
+                             FAR void *arg);
+static uint32_t note_duration(FAR uint32_t *silence, uint32_t note_length,
+                              uint32_t dots);
+static uint32_t rest_duration(uint32_t rest_length, uint32_t dots);
+static void start_note(FAR struct tone_upperhalf_s *upper, uint8_t note);
+static void stop_note(FAR struct tone_upperhalf_s *upper);
+static void start_tune(FAR struct tone_upperhalf_s *upper, const char *tune);
+static void next_note(FAR struct tone_upperhalf_s *upper);
+static int next_char(void);
+static uint8_t next_number(void);
+static uint8_t next_dots(void);
+
+static int tone_open(FAR struct file *filep);
+static int tone_close(FAR struct file *filep);
+static ssize_t tone_read(FAR struct file *filep, FAR char *buffer,
+                         size_t buflen);
+static ssize_t tone_write(FAR struct file *filep, FAR const char *buffer,
+                          size_t buflen);
+
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct file_operations g_toneops =
+{
+  tone_open,                    /* open */
+  tone_close,                   /* close */
+  tone_read,                    /* read */
+  tone_write,                   /* write */
+  0,                            /* seek */
+  0                             /* ioctl */
+#ifndef CONFIG_DISABLE_POLL
+  , 0                           /* poll */
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  , 0                           /* unlink */
+#endif
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: oneshot_callback
+ ****************************************************************************/
+
+static void oneshot_callback(FAR struct oneshot_lowerhalf_s *lower,
+                             FAR void *arg)
+{
+  FAR struct tone_upperhalf_s *upper = (FAR struct tone_upperhalf_s *)arg;
+
+  audinfo("Oneshot timer expired!\n");
+
+  /* Play the next note */
+
+  next_note(upper);
+}
+
+/****************************************************************************
+ * Name: note_duration
+ *
+ * Description:
+ *   This function calculates the duration in microseconds of play and
+ *   silence for a note given the current tempo, length and mode and the
+ *   number of dots following in the play string.
+ *
+ ****************************************************************************/
+
+static uint32_t note_duration(FAR uint32_t *silence, uint32_t note_length,
+                              uint32_t dots)
+{
+  uint32_t whole_note_period = (60 * 1000000 * 4) / g_tempo;
+  uint32_t note_period;
+  uint32_t dot_extension;
+
+  if (note_length == 0)
+    {
+      note_length = 1;
+    }
+
+  note_period = whole_note_period / note_length;
+
+  switch (g_note_mode)
+  {
+    case MODE_NORMAL:
+      *silence = note_period / 8;
+      break;
+
+    case MODE_STACCATO:
+      *silence = note_period / 4;
+      break;
+
+    case MODE_LEGATO:
+      *silence = 0;
+      break;
+
+    default:
+      auderr("Mode undefined!\n");
+      break;
+  }
+
+  note_period -= *silence;
+  dot_extension = note_period / 2;
+
+  while (dots--)
+    {
+      note_period += dot_extension;
+      dot_extension /= 2;
+    }
+
+  return note_period;
+}
+
+/****************************************************************************
+ * Name: rest_duration
+ *
+ * Description:
+ *   This function calculates the duration in microseconds of a rest
+ *   corresponding to a given note length.
+ *
+ ****************************************************************************/
+
+static uint32_t rest_duration(uint32_t rest_length, uint32_t dots)
+{
+  uint32_t whole_note_period = (60 * 1000000 * 4) / g_tempo;
+  uint32_t rest_period;
+  uint32_t dot_extension;
+
+  if (rest_length == 0)
+    {
+      rest_length = 1;
+    }
+
+  rest_period = whole_note_period / rest_length;
+
+  dot_extension = rest_period / 2;
+
+  while (dots--)
+    {
+      rest_period += dot_extension;
+      dot_extension /= 2;
+    }
+
+  return rest_period;
+}
+
+/****************************************************************************
+ * Name: start_note
+ ****************************************************************************/
+
+static void start_note(FAR struct tone_upperhalf_s *upper, uint8_t note)
+{
+  FAR struct pwm_lowerhalf_s *tone = upper->devtone;
+
+  upper->tone.frequency           = g_notes_freq[note - 1];
+#ifdef CONFIG_PWM_MULTICHAN
+  upper->tone.channels[0].channel = upper->channel;
+  upper->tone.channels[0].duty    = b16HALF;
+#else
+  upper->tone.duty                = b16HALF;
+#endif
+
+  /* REVISIT: Should check the return value */
+
+  tone->ops->start(tone, &upper->tone);
+}
+
+/****************************************************************************
+ * Name: stop_note
+ ****************************************************************************/
+
+static void stop_note(FAR struct tone_upperhalf_s *upper)
+{
+  FAR struct pwm_lowerhalf_s *tone = upper->devtone;
+
+  tone->ops->stop(tone);
+}
+
+/****************************************************************************
+ * Name: start_tune
+ *
+ * Description:
+ *   This function starts playing the note.
+ *
+ ****************************************************************************/
+
+static void start_tune(FAR struct tone_upperhalf_s *upper, const char *tune)
+{
+  FAR struct timespec ts;
+
+  /* Kill any current playback */
+
+  ONESHOT_CANCEL(upper->oneshot, &ts);
+
+  /* Record the tune */
+
+  g_tune           = tune;
+  g_next           = tune;
+
+  /* Initialise player state */
+
+  g_tempo          = 120;
+  g_note_length    = 4;
+  g_note_mode      = MODE_NORMAL;
+  g_octave         = 4;
+  g_silence_length = 0;
+  g_repeat         = false;
+
+  /* Schedule a callback to start playing */
+
+  ts.tv_sec        = 1;
+  ts.tv_nsec       = 0;
+
+  ONESHOT_START(upper->oneshot, oneshot_callback, upper, &ts);
+}
+
+/****************************************************************************
+ * Name: next_note
+ *
+ * Description:
+ *   This function parses the next note out of the string and play it.
+ *
+ ****************************************************************************/
+
+static void next_note(FAR struct tone_upperhalf_s *upper)
+{
+  uint32_t note;
+  uint32_t note_length;
+  uint32_t duration;
+  uint32_t sec;
+  uint32_t nsec;
+  FAR struct timespec ts;
+
+  /* Do we have an inter-note gap to wait for? */
+
+  if (g_silence_length > 0)
+    {
+      stop_note(upper);
+
+      duration = g_silence_length;
+
+      /* Setup the time duration */
+
+      sec = duration / USEC_PER_SEC;
+      nsec = ((duration) - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
+
+      ts.tv_sec = (time_t) sec;
+      ts.tv_nsec = (unsigned long)nsec;
+
+      ONESHOT_START(upper->oneshot, oneshot_callback, upper, &ts);
+
+      g_silence_length = 0;
+      return;
+    }
+
+  /* Make sure we still have a tune - may be removed by the write / ioctl
+   * handler */
+
+  if ((g_next == NULL) || (g_tune == NULL))
+    {
+      stop_note(upper);
+      return;
+    }
+
+  /* Parse characters out of the string until we have resolved a note */
+
+  note = 0;
+  note_length = g_note_length;
+
+  while (note == 0)
+    {
+      /* We always need at least one character from the string */
+
+      int c = next_char();
+
+      if (c == 0)
+        {
+          goto tune_end;
+        }
+
+      g_next++;
+
+      switch (c)
+        {
+          uint8_t nt;
+
+          /* Select note length */
+
+        case 'L':
+          g_note_length = next_number();
+          if (g_note_length < 1)
+            {
+              auderr("note length too short!\n");
+              goto tune_error;
+            }
+          break;
+
+          /* Select octave */
+
+        case 'O':
+          g_octave = next_number();
+          if (g_octave > 6)
+            {
+              g_octave = 6;
+            }
+          break;
+
+          /* Decrease octave */
+
+        case '<':
+          if (g_octave > 0)
+            {
+              g_octave--;
+            }
+          break;
+
+          /* Increase octave */
+
+        case '>':
+          if (g_octave < 6)
+            {
+              g_octave++;
+            }
+          break;
+
+          /* Select inter-note gap */
+
+        case 'M':
+          c = next_char();
+
+          if (c == 0)
+            {
+              auderr("no character after M!\n");
+              goto tune_error;
+            }
+
+          g_next++;
+
+          switch (c)
+            {
+            case 'N':
+              g_note_mode = MODE_NORMAL;
+              break;
+
+            case 'L':
+              g_note_mode = MODE_LEGATO;
+              break;
+
+            case 'S':
+              g_note_mode = MODE_STACCATO;
+              break;
+
+            case 'F':
+              g_repeat = false;
+              break;
+
+            case 'B':
+              g_repeat = true;
+              break;
+
+            default:
+              auderr("unknown symbol: %c!\n", c);
+              goto tune_error;
+              break;
+            }
+
+          /* Pause for a note length */
+
+        case 'P':
+
+          stop_note(upper);
+
+          duration = rest_duration(next_number(), next_dots());
+
+          /* Setup the time duration */
+
+          sec = duration / USEC_PER_SEC;
+          nsec = ((duration) - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
+
+          ts.tv_sec = (time_t) sec;
+          ts.tv_nsec = (unsigned long)nsec;
+
+          ONESHOT_START(upper->oneshot, oneshot_callback, upper, &ts);
+          return;
+
+          /* Change tempo */
+
+        case 'T':
+          nt = next_number();
+
+          if ((nt >= 32) && (nt <= 255))
+            {
+              g_tempo = nt;
+            }
+          else
+            {
+              auderr("T is out of range 32-255!\n");
+              goto tune_error;
+            }
+          break;
+
+          /* Play an arbitrary note */
+
+        case 'N':
+          note = next_number();
+          if (note > 84)
+            {
+              auderr("Note higher than 84!\n");
+              goto tune_error;
+            }
+
+          /* This is a rest - pause for the current note length */
+
+          if (note == 0)
+            {
+              duration = rest_duration(g_note_length, next_dots());
+
+              /* Setup the time duration */
+
+              sec = duration / USEC_PER_SEC;
+              nsec = ((duration) - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
+
+              ts.tv_sec = (time_t) sec;
+              ts.tv_nsec = (unsigned long)nsec;
+
+              ONESHOT_START(upper->oneshot, oneshot_callback, upper, &ts);
+
+              return;
+            }
+          break;
+
+          /* Play a note in the current octave */
+
+        case 'A':
+        case 'B':
+        case 'C':
+        case 'D':
+        case 'E':
+        case 'F':
+        case 'G':
+          note = g_note_tab[c - 'A'] + (g_octave * 12) + 1;
+
+          c = next_char();
+
+          switch (c)
+            {
+              /* Up a semitone */
+
+            case '#':
+            case '+':
+              if (note < 84)
+                {
+                  note++;
+                }
+
+              g_next++;
+              break;
+
+              /* Down a semitone */
+
+            case '-':
+              if (note > 1)
+                {
+                  note--;
+                }
+
+              g_next++;
+              break;
+
+              /* No next char here is OK */
+
+            default:
+              break;
+            }
+
+          /* Shorthand length notation */
+
+          note_length = next_number();
+
+          if (note_length == 0)
+            {
+              note_length = g_note_length;
+            }
+
+          break;
+
+        default:
+          goto tune_error;
+        }
+    }
+
+  /* Compute the duration of the note and the following silence (if any) */
+
+  duration = note_duration(&g_silence_length, note_length, next_dots());
+
+  /* Start playing the note */
+
+  start_note(upper, note);
+
+  /* Setup time duration */
+
+  sec = duration / USEC_PER_SEC;
+  nsec = ((duration) - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
+
+  ts.tv_sec = (time_t) sec;
+  ts.tv_nsec = (unsigned long)nsec;
+
+  /* And arrange a callback when the note should stop */
+
+  ONESHOT_START(upper->oneshot, oneshot_callback, upper, &ts);
+  return;
+
+  /* Tune looks bad (unexpected EOF, bad character, etc.) */
+
+tune_error:
+  auderr("tune error\n");
+
+  /* Don't loop on error */
+
+  g_repeat = false;
+
+  /* Stop (and potentially restart) the tune */
+
+tune_end:
+  stop_note(upper);
+
+  if (g_repeat)
+    {
+      start_tune(upper, g_tune);
+    }
+  else
+    {
+      g_tune = NULL;
+    }
+}
+
+/****************************************************************************
+ * Name: next_char
+ *
+ * Description:
+ *   This function find the next character in the string, discard any
+ *   whitespace and return the canonical (uppercase) version.
+ *
+ ****************************************************************************/
+
+static int next_char(void)
+{
+  while (isspace(*g_next))
+    {
+      g_next++;
+    }
+
+  return toupper(*g_next);
+}
+
+/****************************************************************************
+ * Name: next_number
+ *
+ * Description:
+ *   This function extract a number from the string, consuming all the digit
+ *   characters.
+ *
+ ****************************************************************************/
+
+static uint8_t next_number(void)
+{
+  uint8_t number = 0;
+  int c;
+
+  for (;;)
+    {
+      c = next_char();
+
+      if (!isdigit(c))
+        {
+          return number;
+        }
+
+      g_next++;
+      number = (number * 10) + (c - '0');
+    }
+
+  return number;
+}
+
+/****************************************************************************
+ * Name: next_dots
+ *
+ * Description:
+ *   This function consumes dot characters from the string, returning the
+ *   number consumed.
+ *
+ ****************************************************************************/
+
+static uint8_t next_dots(void)
+{
+  uint8_t dots = 0;
+
+  while (next_char() == '.')
+    {
+      g_next++;
+      dots++;
+    }
+
+  return dots;
+}
+
+/****************************************************************************
+ * Name: tone_open
+ *
+ * Description:
+ *   This function is called whenever the PWM device is opened.
+ *
+ ****************************************************************************/
+
+static int tone_open(FAR struct file *filep)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct tone_upperhalf_s *upper = inode->i_private;
+  uint8_t tmp;
+  int ret;
+
+  audinfo("crefs: %d\n", upper->crefs);
+
+  /* Get exclusive access to the device structures */
+
+  ret = sem_wait(&upper->exclsem);
+  if (ret < 0)
+    {
+      ret = -get_errno();
+      goto errout;
+    }
+
+  /* Increment the count of references to the device.  If this the first time
+   * that the driver has been opened for this device, then initialize the
+   * device. */
+
+  tmp = upper->crefs + 1;
+  if (tmp == 0)
+    {
+      /* More than 255 opens; uint8_t overflows to zero */
+
+      ret = -EMFILE;
+      goto errout_with_sem;
+    }
+
+  /* Save the new open count on success */
+
+  upper->crefs = tmp;
+  ret = OK;
+
+errout_with_sem:
+  sem_post(&upper->exclsem);
+
+errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Name: tone_close
+ *
+ * Description:
+ *   This function is called when the PWM device is closed.
+ *
+ ****************************************************************************/
+
+static int tone_close(FAR struct file *filep)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct tone_upperhalf_s *upper = inode->i_private;
+  int ret;
+
+  audinfo("crefs: %d\n", upper->crefs);
+
+  /* Get exclusive access to the device structures */
+
+  ret = sem_wait(&upper->exclsem);
+  if (ret < 0)
+    {
+      ret = -get_errno();
+      goto errout;
+    }
+
+  /* Decrement the references to the driver.  If the reference count will
+   * decrement to 0, then uninitialize the driver. */
+
+  if (upper->crefs > 1)
+    {
+      upper->crefs--;
+    }
+
+  sem_post(&upper->exclsem);
+  ret = OK;
+
+errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Name: tone_read
+ *
+ * Description:
+ *   A dummy read method.  This is provided only to satisfy the VFS layer.
+ *
+ ****************************************************************************/
+
+static ssize_t tone_read(FAR struct file *filep, FAR char *buffer,
+                         size_t buflen)
+{
+  /* Return zero -- usually meaning end-of-file */
+
+  return 0;
+}
+
+/****************************************************************************
+ * Name: tone_write
+ *
+ * Description:
+ *   A dummy write method.  This is provided only to satisfy the VFS layer.
+ *
+ ****************************************************************************/
+
+static ssize_t tone_write(FAR struct file *filep, FAR const char *buffer,
+                          size_t buflen)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct tone_upperhalf_s *upper = inode->i_private;
+
+  /* We need to receive a string #RRGGBB = 7 bytes */
+
+  if (buffer == NULL)
+    {
+      /* Well... nothing to do */
+
+      return -EINVAL;
+    }
+
+  if (buflen >= MAX_TUNE_LEN)
+    {
+      /* Too big to it inside internal buffer (with extra NUL terminator) */
+
+      return -EINVAL;
+    }
+
+  /* Copy music to internal buffer */
+
+  memcpy(tune_buf, buffer, buflen);
+
+  /* Failsafe NUL terminated string */
+
+  tune_buf[buflen] = '\0';
+
+  /* Let the music play */
+
+  start_tune(upper, tune_buf);
+
+  return buflen;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: tone_register
+ *
+ * Description:
+ *   This function binds an instance of a "lower half" PWM driver with
+ *   the "upper half" Audio Tone device and registers that device so that can
+ *   be used by application code.
+ *
+ *
+ * Input parameters:
+ *   path - The full path to the driver to be registers in the NuttX pseudo-
+ *     filesystem.  The recommended convention is to name of PWM driver
+ *     as "/dev/tone0".
+ *   tone - A pointer to an instance of lower half PWM
+ *     drivers for the tone device.  This instance will be bound to the Audio
+ *     tone driver and must persists as long as that driver persists.
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int tone_register(FAR const char *path, FAR struct pwm_lowerhalf_s *tone,
+#ifdef CONFIG_PWM_MULTICHAN
+                  int channel,
+#endif
+                  FAR struct oneshot_lowerhalf_s *oneshot)
+{
+  FAR struct tone_upperhalf_s *upper;
+
+  DEBUGASSERT(path != NULL && tone != NULL);
+
+  /* Allocate the upper-half data structure */
+
+  upper =
+    (FAR struct tone_upperhalf_s *)kmm_zalloc(sizeof(struct tone_upperhalf_s));
+
+  if (!upper)
+    {
+      auderr("ERROR: Allocation failed\n");
+      return -ENOMEM;
+    }
+
+  /* Initialize the PWM device structure (it was already zeroed by
+   * kmm_zalloc()).
+   */
+
+  sem_init(&upper->exclsem, 0, 1);
+  upper->devtone = tone;
+  upper->oneshot = oneshot;
+#ifdef CONFIG_PWM_MULTICHAN
+  upper->channel = (uint8_t)channel;
+#endif
+
+  /* Register the PWM device */
+
+  audinfo("Registering %s\n", path);
+  return register_driver(path, &g_toneops, 0666, upper);
+}
+
+#endif /* CONFIG_AUDIO_TONE */
diff --git a/drivers/audio/vs1053.c b/drivers/audio/vs1053.c
index 68167ca31eb287173e49e5519ea861e7c6c927c7..3582bf98e1c7606abb40d66464be71164c9ba176 100644
--- a/drivers/audio/vs1053.c
+++ b/drivers/audio/vs1053.c
@@ -58,7 +58,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 #include "vs1053.h"
 
@@ -217,13 +217,6 @@ static const struct audio_ops_s g_audioops =
   vs1053_release        /* release        */
 };
 
-/* ISR context pointers */
-
-static struct vs1053_struct_s *g_isrdata[CONFIG_VS1053_DEVICE_COUNT] =
-{
-  NULL,
-};
-
 /* Volume control log table.  This table is in increments of 2% of
  * requested volume level and is the register value that should be
  * programmed to the VS1053 to achieve that volume pecentage.
@@ -329,7 +322,7 @@ static void vs1053_writereg(FAR struct vs1053_struct_s *dev, uint8_t reg, uint16
 
   /* Select the AUDIO_CTRL device on the SPI bus */
 
-  audvdbg("Write Reg %d = 0x%0X\n", reg, val);
+  audinfo("Write Reg %d = 0x%0X\n", reg, val);
 
   SPI_SELECT(spi, SPIDEV_AUDIO_CTRL, true);
 
@@ -365,7 +358,7 @@ static int vs1053_setfrequency(FAR struct vs1053_struct_s *dev, uint32_t freq)
   uint16_t  reg;
   uint8_t   timeout;
 
-  audvdbg("Entry\n");
+  audinfo("Entry\n");
 
   /* Calculate the clock divisor based on the input frequency */
 
@@ -375,7 +368,7 @@ static int vs1053_setfrequency(FAR struct vs1053_struct_s *dev, uint32_t freq)
 
   if (factor > 50.0)
     {
-      audvdbg("Frequency too high!  Limiting to XTALI * 5\n");
+      audinfo("Frequency too high!  Limiting to XTALI * 5\n");
       factor = 50.0;
       return -EINVAL;
     }
@@ -566,7 +559,7 @@ static void vs1053_setbass(FAR struct vs1053_struct_s *dev)
 static int vs1053_getcaps(FAR struct audio_lowerhalf_s *lower, int type,
             FAR struct audio_caps_s *pCaps)
 {
-  audvdbg("Entry\n");
+  audinfo("Entry\n");
 
   /* Validate the structure */
 
@@ -769,7 +762,7 @@ static int vs1053_configure(FAR struct audio_lowerhalf_s *lower,
   FAR struct vs1053_struct_s *dev = (struct vs1053_struct_s *) lower;
 #endif
 
-  audvdbg("Entry\n");
+  audinfo("Entry\n");
 
   /* Process the configure operation */
 
@@ -924,7 +917,7 @@ static int vs1053_shutdown(FAR struct audio_lowerhalf_s *lower)
   FAR struct vs1053_struct_s *dev = (struct vs1053_struct_s *) lower;
   FAR struct spi_dev_s  *spi = dev->spi;
 
-  audvdbg("Entry\n");
+  audinfo("Entry\n");
   vs1053_spi_lock(spi, dev->spi_freq);            /* Lock the device */
   vs1053_setfrequency(dev, CONFIG_VS1053_XTALI);  /* Reduce speed to minimum */
   vs1053_writereg(dev, VS1053_SCI_VOL, 0xFEFE);   /* Power down the DAC outputs */
@@ -967,7 +960,7 @@ static void vs1053_feeddata(FAR struct vs1053_struct_s *dev)
   /* Local stack copy of our active buffer */
 
   apb = dev->apb;
-  //auddbg("Entry apb=%p, Bytes left=%d\n", apb, apb->nbytes - apb->curbyte);
+  //audinfo("Entry apb=%p, Bytes left=%d\n", apb, apb->nbytes - apb->curbyte);
 
   /* Setup pointer to the next sample in the buffer */
 
@@ -1039,12 +1032,16 @@ static void vs1053_feeddata(FAR struct vs1053_struct_s *dev)
                 {
                   (void)SPI_SETFREQUENCY(dev->spi, dev->spi_freq);
                   dev->hw_lower->disable(dev->hw_lower);   /* Disable the DREQ interrupt */
-                  auddbg("HDAT1: 0x%0X   HDAT0: 0x%0X\n",
-                      vs1053_readreg(dev, VS1053_SCI_HDAT1),
-                      vs1053_readreg(dev, VS1053_SCI_HDAT0));
+
+                  audinfo("HDAT1: 0x%0X   HDAT0: 0x%0X\n",
+                          vs1053_readreg(dev, VS1053_SCI_HDAT1),
+                          vs1053_readreg(dev, VS1053_SCI_HDAT0));
+
                   vs1053_writereg(dev, VS1053_SCI_WRAMADDR, VS1053_END_FILL_BYTE);
                   dev->endfillchar = vs1053_readreg(dev, VS1053_SCI_WRAM) >> 8;
-                  auddbg("EndFillChar: 0x%0X\n", dev->endfillchar);
+
+                  audinfo("EndFillChar: 0x%0X\n", dev->endfillchar);
+
                   reg = vs1053_readreg(dev, VS1053_SCI_MODE);
                   vs1053_writereg(dev, VS1053_SCI_MODE, reg | VS1053_SM_RESET);
 
@@ -1171,7 +1168,7 @@ static void vs1053_feeddata(FAR struct vs1053_struct_s *dev)
                   dev->lower.upper(dev->lower.priv,
                       AUDIO_CALLBACK_IOERR, NULL, ret);
 #endif
-                  auddbg("I/O error!\n");
+                  auderr("ERROR: I/O error!\n");
 
                   goto err_out;
                 }
@@ -1181,7 +1178,7 @@ static void vs1053_feeddata(FAR struct vs1053_struct_s *dev)
               apb = (struct ap_buffer_s *) dq_remfirst(&dev->apbq);
               dev->apb = apb;
 
-              //auddbg("Next Buffer = %p, bytes = %d\n", apb, apb ? apb->nbytes : 0);
+              //audinfo("Next Buffer = %p, bytes = %d\n", apb, apb ? apb->nbytes : 0);
               if (apb == NULL)
                 {
                   sem_post(&dev->apbq_sem);
@@ -1211,32 +1208,12 @@ err_out:
  *
  ****************************************************************************/
 
-static int vs1053_dreq_isr(int irq, FAR void *context)
+static int vs1053_dreq_isr(int irq, FAR void *context, FAR void *arg)
 {
-  struct vs1053_struct_s *dev = NULL;
+  struct vs1053_struct_s *dev = (struct vs1053_struct_s *)arg;
   struct audio_msg_s      msg;
 
-  /* Get the driver context */
-
-#if CONFIG_VS1053_DEVICE_COUNT == 1
-  dev = g_isrdata[0];       /* Simple case */
-#else
-  /* More complex case */
-  {
-    int x;
-
-    for (x = 0; x < CONFIG_VS1053_DEVICE_COUNT; x++)
-      {
-        if (g_isrdata[x]->hw_lower->irq == irq)
-          {
-            dev = g_isrdata[x];
-            break;
-          }
-      }
-
-    DEBUGASSERT(dev);
-  }
-#endif
+  DEBUGASSERT(dev != NULL);
 
   /* Now create a message and send it to the workerthread */
 
@@ -1274,7 +1251,7 @@ static void *vs1053_workerthread(pthread_addr_t pvarg)
 #endif
   uint8_t                 timeout;
 
-  auddbg("Entry\n");
+  audinfo("Entry\n");
 
 #ifndef CONFIG_AUDIO_EXCLUDE_STOP
   dev->cancelmode   = false;
@@ -1404,8 +1381,7 @@ static void *vs1053_workerthread(pthread_addr_t pvarg)
   dev->lower.upper(dev->lower.priv, AUDIO_CALLBACK_COMPLETE, NULL, OK);
 #endif
 
-  auddbg("Exit\n");
-
+  audinfo("Exit\n");
   return NULL;
 }
 
@@ -1430,12 +1406,12 @@ static int vs1053_start(FAR struct audio_lowerhalf_s *lower)
   int                 ret;
   void                *value;
 
-  auddbg("Entry\n");
+  audinfo("Entry\n");
 
   vs1053_spi_lock(dev->spi, dev->spi_freq);     /* Lock the device */
-  auddbg("Entry HDAT1=0x%0X  HDAT0=0x%0X\n",
-      vs1053_readreg(dev, VS1053_SCI_HDAT1),
-      vs1053_readreg(dev, VS1053_SCI_HDAT0));
+  audinfo("Entry HDAT1=0x%0X  HDAT0=0x%0X\n",
+          vs1053_readreg(dev, VS1053_SCI_HDAT1),
+          vs1053_readreg(dev, VS1053_SCI_HDAT0));
   vs1053_spi_unlock(dev->spi);
 
   /* Do a soft reset, just in case */
@@ -1446,9 +1422,9 @@ static int vs1053_start(FAR struct audio_lowerhalf_s *lower)
 
   vs1053_spi_lock(dev->spi, dev->spi_freq);     /* Lock the device */
   vs1053_setfrequency(dev, CONFIG_VS1053_MP3_DECODE_FREQ);
-  auddbg("Reset HDAT1=0x%0X  HDAT0=0x%0X\n",
-      vs1053_readreg(dev, VS1053_SCI_HDAT1),
-      vs1053_readreg(dev, VS1053_SCI_HDAT0));
+  audinfo("Reset HDAT1=0x%0X  HDAT0=0x%0X\n",
+          vs1053_readreg(dev, VS1053_SCI_HDAT1),
+          vs1053_readreg(dev, VS1053_SCI_HDAT0));
   vs1053_spi_unlock(dev->spi);
 
   /* Create a message queue for the worker thread */
@@ -1463,7 +1439,7 @@ static int vs1053_start(FAR struct audio_lowerhalf_s *lower)
     {
       /* Error creating message queue! */
 
-      auddbg("Couldn't allocate message queue\n");
+      auderr("ERROR: Couldn't allocate message queue\n");
       return -ENOMEM;
     }
 
@@ -1477,7 +1453,7 @@ static int vs1053_start(FAR struct audio_lowerhalf_s *lower)
     }
   else
     {
-      auddbg("Error getting APB Queue sem\n");
+      auderr("ERROR: Error getting APB Queue sem\n");
       return ret;
     }
 
@@ -1485,7 +1461,7 @@ static int vs1053_start(FAR struct audio_lowerhalf_s *lower)
 
   if (dev->threadid != 0)
     {
-      auddbg("Joining old thread\n");
+      audinfo("Joining old thread\n");
       pthread_join(dev->threadid, &value);
     }
 
@@ -1496,17 +1472,17 @@ static int vs1053_start(FAR struct audio_lowerhalf_s *lower)
   (void)pthread_attr_setschedparam(&tattr, &sparam);
   (void)pthread_attr_setstacksize(&tattr, CONFIG_VS1053_WORKER_STACKSIZE);
 
-  auddbg("Starting workerthread\n");
+  audinfo("Starting workerthread\n");
   ret = pthread_create(&dev->threadid, &tattr, vs1053_workerthread,
       (pthread_addr_t) dev);
   if (ret != OK)
     {
-      auddbg("Can't create worker thread, errno=%d\n", errno);
+      auderr("ERROR: Can't create worker thread, errno=%d\n", errno);
     }
   else
     {
       pthread_setname_np(dev->threadid, "vs1053");
-      auddbg("Created worker thread\n");
+      audinfo("Created worker thread\n");
     }
 
   return ret;
@@ -1630,7 +1606,7 @@ static int vs1053_enqueuebuffer(FAR struct audio_lowerhalf_s *lower,
   struct audio_msg_s  term_msg;
   int ret;
 
-  audvdbg("Entry\n");
+  audinfo("Entry\n");
 
   /* Lock access to the apbq */
 
@@ -1896,43 +1872,20 @@ struct audio_lowerhalf_s *vs1053_initialize(FAR struct spi_dev_s *spi,
       id = (status & VS1053_SS_VER) >> VS1053_VER_SHIFT;
       if (id != VS1053_VER_VS1053)
         {
-          auddbg("Unexpected VER bits: 0x%0X\n", id);
+          auderr("ERROR: Unexpected VER bits: 0x%0X\n", id);
           kmm_free(dev);
           return NULL;
         }
       else
         {
-          auddbg("VS1053 Detected!\n");
+          audinfo("VS1053 Detected!\n");
         }
 
       /* Attach our ISR to this device */
-      dev->hw_lower->attach(dev->hw_lower, vs1053_dreq_isr);
-
-      /* Find a slot to save the device context for ISR lookup */
-
-#if CONFIG_VS1053_DEVICE_COUNT == 1
-      g_isrdata[0] = dev;         /* The simple case */
-#else
-      /* The more complex case */
-      {
-        int   x;
-
-        /* Initialize the ISR data if not alrady */
 
-        for (x = 0; x < CONFIG_VS1053_DEVICE_COUNT; x++)
-          {
-            /* Find an empty slot */
-
-            if (g_isrdata[x] == NULL)
-              {
-                g_isrdata[x] = dev;
-                break;
-              }
-          }
-      }
-#endif
+      dev->hw_lower->attach(dev->hw_lower, vs1053_dreq_isr, dev);
 
-        /* Do some initialization of the codec */
+      /* Do some initialization of the codec */
 
       vs1053_shutdown(&dev->lower);                   /* Go to shutdown state */
     }
diff --git a/drivers/audio/wm8904.c b/drivers/audio/wm8904.c
index a437c137e83c2ddbb8dadddf421a88996fd91e71..4489ae0f2215564e5ff437791cf1587f4dba8d33 100644
--- a/drivers/audio/wm8904.c
+++ b/drivers/audio/wm8904.c
@@ -69,7 +69,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 #include "wm8904.h"
 
@@ -283,16 +283,16 @@ uint16_t wm8904_readreg(FAR struct wm8904_dev_s *priv, uint8_t regaddr)
 #ifdef CONFIG_I2C_RESET
           /* Perhaps the I2C bus is locked up?  Try to shake the bus free */
 
-          auddbg("WARNING: I2C_TRANSFER failed: %d ... Resetting\n", ret);
+          audwarn("WARNING: I2C_TRANSFER failed: %d ... Resetting\n", ret);
 
           ret = I2C_RESET(priv->i2c);
           if (ret < 0)
             {
-              auddbg("ERROR: I2C_RESET failed: %d\n", ret);
+              auderr("ERROR: I2C_RESET failed: %d\n", ret);
               break;
             }
 #else
-          auddbg("ERROR: I2C_TRANSFER failed: %d\n", ret);
+          auderr("ERROR: I2C_TRANSFER failed: %d\n", ret);
 #endif
         }
       else
@@ -304,11 +304,11 @@ uint16_t wm8904_readreg(FAR struct wm8904_dev_s *priv, uint8_t regaddr)
            */
 
           regval = ((uint16_t)data[0] << 8) | (uint16_t)data[1];
-          audvdbg("Read: %02x -> %04x\n", regaddr, regval);
+          audinfo("Read: %02x -> %04x\n", regaddr, regval);
           return regval;
         }
 
-      audvdbg("retries=%d regaddr=%02x\n", retries, regaddr);
+      audinfo("retries=%d regaddr=%02x\n", retries, regaddr);
     }
 
   /* No error indication is returned on a failure... just return zero */
@@ -359,16 +359,16 @@ static void wm8904_writereg(FAR struct wm8904_dev_s *priv, uint8_t regaddr,
 #ifdef CONFIG_I2C_RESET
           /* Perhaps the I2C bus is locked up?  Try to shake the bus free */
 
-          auddbg("WARNING: i2c_write failed: %d ... Resetting\n", ret);
+          audwarn("WARNING: i2c_write failed: %d ... Resetting\n", ret);
 
           ret = I2C_RESET(priv->i2c);
           if (ret < 0)
             {
-              auddbg("ERROR: I2C_RESET failed: %d\n", ret);
+              auderr("ERROR: I2C_RESET failed: %d\n", ret);
               break;
             }
 #else
-          auddbg("ERROR: I2C_TRANSFER failed: %d\n", ret);
+          auderr("ERROR: I2C_TRANSFER failed: %d\n", ret);
 #endif
         }
       else
@@ -377,11 +377,11 @@ static void wm8904_writereg(FAR struct wm8904_dev_s *priv, uint8_t regaddr,
            * return the value read.
            */
 
-          audvdbg("Write: %02x <- %04x\n", regaddr, regval);
+          audinfo("Write: %02x <- %04x\n", regaddr, regval);
           return;
         }
 
-      audvdbg("retries=%d regaddr=%02x\n", retries, regaddr);
+      audinfo("retries=%d regaddr=%02x\n", retries, regaddr);
     }
 }
 
@@ -439,7 +439,7 @@ static void wm8904_setvolume(FAR struct wm8904_dev_s *priv, uint16_t volume,
   uint32_t rightlevel;
   uint16_t regval;
 
-  audvdbg("volume=%u mute=%u\n", volume, mute);
+  audinfo("volume=%u mute=%u\n", volume, mute);
 
 #ifndef CONFIG_AUDIO_EXCLUDE_BALANCE
   /* Calculate the left channel volume level {0..1000} */
@@ -514,7 +514,7 @@ static void wm8904_setvolume(FAR struct wm8904_dev_s *priv, uint16_t volume,
 #ifndef CONFIG_AUDIO_EXCLUDE_TONE
 static void wm8904_setbass(FAR struct wm8904_dev_s *priv, uint8_t bass)
 {
-  audvdbg("bass=%u\n", bass);
+  audinfo("bass=%u\n", bass);
 #warning Missing logic
 }
 #endif /* CONFIG_AUDIO_EXCLUDE_TONE */
@@ -532,7 +532,7 @@ static void wm8904_setbass(FAR struct wm8904_dev_s *priv, uint8_t bass)
 #ifndef CONFIG_AUDIO_EXCLUDE_TONE
 static void wm8904_settreble(FAR struct wm8904_dev_s *priv, uint8_t treble)
 {
-  audvdbg("treble=%u\n", treble);
+  audinfo("treble=%u\n", treble);
 #warning Missing logic
 }
 #endif /* CONFIG_AUDIO_EXCLUDE_TONE */
@@ -658,7 +658,7 @@ static void wm8904_setbitrate(FAR struct wm8904_dev_s *priv)
   regval = WM8904_LRCLK_DIR | WM8904_LRCLK_RATE(framelen << 1);
   wm8904_writereg(priv, WM8904_AIF3, regval);
 
-  audvdbg("sample rate=%u nchannels=%u bpsamp=%u framelen=%d fout=%lu\n",
+  audinfo("sample rate=%u nchannels=%u bpsamp=%u framelen=%d fout=%lu\n",
           priv->samprate, priv->nchannels, priv->bpsamp, framelen,
           (unsigned long)fout);
 
@@ -815,10 +815,10 @@ static void wm8904_setbitrate(FAR struct wm8904_dev_s *priv)
   tmp64 = ((uint64_t)fvco << 16) / (g_fllratio[fllndx] * fref);
   nk    = (b16_t)tmp64;
 
-  audvdbg("mclk=%lu fref=%lu fvco=%lu fout=%lu divndx=%u\n",
+  audinfo("mclk=%lu fref=%lu fvco=%lu fout=%lu divndx=%u\n",
           (unsigned long)priv->lower->mclk, (unsigned long)fref,
           (unsigned long)fvco, (unsigned long)fout, divndx);
-  audvdbg("N.K=%08lx outdiv=%u fllratio=%u\n",
+  audinfo("N.K=%08lx outdiv=%u fllratio=%u\n",
           (unsigned long)nk, outdiv, g_fllratio[fllndx]);
 
   /* Save the actual bit rate that we are using.  This will be used by the
@@ -961,7 +961,7 @@ static int wm8904_getcaps(FAR struct audio_lowerhalf_s *dev, int type,
   /* Validate the structure */
 
   DEBUGASSERT(caps && caps->ac_len >= sizeof(struct audio_caps_s));
-  audvdbg("type=%d ac_type=%d\n", type, caps->ac_type);
+  audinfo("type=%d ac_type=%d\n", type, caps->ac_type);
 
   /* Fill in the caller's structure based on requested info */
 
@@ -1129,14 +1129,14 @@ static int wm8904_configure(FAR struct audio_lowerhalf_s *dev,
   int ret = OK;
 
   DEBUGASSERT(priv && caps);
-  audvdbg("ac_type: %d\n", caps->ac_type);
+  audinfo("ac_type: %d\n", caps->ac_type);
 
   /* Process the configure operation */
 
   switch (caps->ac_type)
     {
     case AUDIO_TYPE_FEATURE:
-      audvdbg("  AUDIO_TYPE_FEATURE\n");
+      audinfo("  AUDIO_TYPE_FEATURE\n");
 
       /* Process based on Feature Unit */
 
@@ -1148,7 +1148,7 @@ static int wm8904_configure(FAR struct audio_lowerhalf_s *dev,
             /* Set the volume */
 
             uint16_t volume = caps->ac_controls.hw[0];
-            audvdbg("    Volume: %d\n", volume);
+            audinfo("    Volume: %d\n", volume);
 
             if (volume >= 0 && volume <= 1000)
               {
@@ -1172,7 +1172,7 @@ static int wm8904_configure(FAR struct audio_lowerhalf_s *dev,
              */
 
             uint8_t bass = caps->ac_controls.b[0];
-            audvdbg("    Bass: %d\n", bass);
+            audinfo("    Bass: %d\n", bass);
 
             if (bass <= 100)
               {
@@ -1192,7 +1192,7 @@ static int wm8904_configure(FAR struct audio_lowerhalf_s *dev,
              */
 
             uint8_t treble = caps->ac_controls.b[0];
-            audvdbg("    Treble: %d\n", treble);
+            audinfo("    Treble: %d\n", treble);
 
             if (treble <= 100)
               {
@@ -1207,7 +1207,7 @@ static int wm8904_configure(FAR struct audio_lowerhalf_s *dev,
 #endif  /* CONFIG_AUDIO_EXCLUDE_TONE */
 
         default:
-          auddbg("    Unrecognized feature unit\n");
+          auderr("    ERROR: Unrecognized feature unit\n");
           ret = -ENOTTY;
           break;
         }
@@ -1215,24 +1215,24 @@ static int wm8904_configure(FAR struct audio_lowerhalf_s *dev,
 
     case AUDIO_TYPE_OUTPUT:
       {
-        audvdbg("  AUDIO_TYPE_OUTPUT:\n");
-        audvdbg("    Number of channels: %u\n", caps->ac_channels);
-        audvdbg("    Sample rate:        %u\n", caps->ac_controls.hw[0]);
-        audvdbg("    Sample width:       %u\n", caps->ac_controls.b[2]);
+        audinfo("  AUDIO_TYPE_OUTPUT:\n");
+        audinfo("    Number of channels: %u\n", caps->ac_channels);
+        audinfo("    Sample rate:        %u\n", caps->ac_controls.hw[0]);
+        audinfo("    Sample width:       %u\n", caps->ac_controls.b[2]);
 
         /* Verify that all of the requested values are supported */
 
         ret = -ERANGE;
         if (caps->ac_channels != 1 && caps->ac_channels != 2)
           {
-            auddbg("ERROR: Unsupported number of channels: %d\n",
+            auderr("ERROR: Unsupported number of channels: %d\n",
                    caps->ac_channels);
             break;
           }
 
         if (caps->ac_controls.b[2] != 8 && caps->ac_controls.b[2] != 16)
           {
-            auddbg("ERROR: Unsupported bits per sample: %d\n",
+            auderr("ERROR: Unsupported bits per sample: %d\n",
                    caps->ac_controls.b[2]);
             break;
           }
@@ -1308,7 +1308,7 @@ static void  wm8904_senddone(FAR struct i2s_dev_s *i2s,
   int ret;
 
   DEBUGASSERT(i2s && priv && priv->running && apb);
-  audvdbg("apb=%p inflight=%d result=%d\n", apb, priv->inflight, result);
+  audinfo("apb=%p inflight=%d result=%d\n", apb, priv->inflight, result);
 
   /* We do not place any restriction on the context in which this function
    * is called.  It may be called from an interrupt handler.  Therefore, the
@@ -1345,7 +1345,7 @@ static void  wm8904_senddone(FAR struct i2s_dev_s *i2s,
                 CONFIG_WM8904_MSG_PRIO);
   if (ret < 0)
     {
-      audlldbg("ERROR: mq_send failed: %d\n", errno);
+      auderr("ERROR: mq_send failed: %d\n", errno);
     }
 }
 
@@ -1377,7 +1377,7 @@ static void wm8904_returnbuffers(FAR struct wm8904_dev_s *priv)
       apb = (FAR struct ap_buffer_s *)dq_remfirst(&priv->doneq);
       leave_critical_section(flags);
 
-      audvdbg("Returning: apb=%p curbyte=%d nbytes=%d flags=%04x\n",
+      audinfo("Returning: apb=%p curbyte=%d nbytes=%d flags=%04x\n",
               apb, apb->curbyte, apb->nbytes, apb->flags);
 
       /* Are we returning the final buffer in the stream? */
@@ -1395,7 +1395,7 @@ static void wm8904_returnbuffers(FAR struct wm8904_dev_s *priv)
            * worker thread to exit (if it is not already terminating).
            */
 
-          audvdbg("Terminating\n");
+          audinfo("Terminating\n");
           priv->terminating = true;
         }
 
@@ -1454,7 +1454,7 @@ static int wm8904_sendbuffer(FAR struct wm8904_dev_s *priv)
       /* Take next buffer from the queue of pending transfers */
 
       apb = (FAR struct ap_buffer_s *)dq_remfirst(&priv->pendq);
-      audvdbg("Sending apb=%p, size=%d inflight=%d\n",
+      audinfo("Sending apb=%p, size=%d inflight=%d\n",
               apb, apb->nbytes, priv->inflight);
 
       /* Increment the number of buffers in-flight before sending in order
@@ -1496,7 +1496,7 @@ static int wm8904_sendbuffer(FAR struct wm8904_dev_s *priv)
       ret = I2S_SEND(priv->i2s, apb, wm8904_senddone, priv, timeout);
       if (ret < 0)
         {
-          auddbg("ERROR: I2S_SEND failed: %d\n", ret);
+          auderr("ERROR: I2S_SEND failed: %d\n", ret);
           break;
         }
     }
@@ -1526,7 +1526,7 @@ static int wm8904_start(FAR struct audio_lowerhalf_s *dev)
   FAR void *value;
   int ret;
 
-  audvdbg("Entry\n");
+  audinfo("Entry\n");
 
   /* Exit reduced power modes of operation */
   /* REVISIT */
@@ -1545,7 +1545,7 @@ static int wm8904_start(FAR struct audio_lowerhalf_s *dev)
     {
       /* Error creating message queue! */
 
-      auddbg("ERROR: Couldn't allocate message queue\n");
+      auderr("ERROR: Couldn't allocate message queue\n");
       return -ENOMEM;
     }
 
@@ -1553,7 +1553,7 @@ static int wm8904_start(FAR struct audio_lowerhalf_s *dev)
 
   if (priv->threadid != 0)
     {
-      audvdbg("Joining old thread\n");
+      audinfo("Joining old thread\n");
       pthread_join(priv->threadid, &value);
     }
 
@@ -1564,17 +1564,17 @@ static int wm8904_start(FAR struct audio_lowerhalf_s *dev)
   (void)pthread_attr_setschedparam(&tattr, &sparam);
   (void)pthread_attr_setstacksize(&tattr, CONFIG_WM8904_WORKER_STACKSIZE);
 
-  audvdbg("Starting worker thread\n");
+  audinfo("Starting worker thread\n");
   ret = pthread_create(&priv->threadid, &tattr, wm8904_workerthread,
                        (pthread_addr_t)priv);
   if (ret != OK)
     {
-      auddbg("ERROR: pthread_create failed: %d\n", ret);
+      auderr("ERROR: pthread_create failed: %d\n", ret);
     }
   else
     {
       pthread_setname_np(priv->threadid, "wm8904");
-      audvdbg("Created worker thread\n");
+      audinfo("Created worker thread\n");
     }
 
   return ret;
@@ -1694,7 +1694,7 @@ static int wm8904_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
   struct audio_msg_s  term_msg;
   int ret;
 
-  audvdbg("Enqueueing: apb=%p curbyte=%d nbytes=%d flags=%04x\n",
+  audinfo("Enqueueing: apb=%p curbyte=%d nbytes=%d flags=%04x\n",
           apb, apb->curbyte, apb->nbytes, apb->flags);
 
   /* Take a reference on the new audio buffer */
@@ -1726,7 +1726,7 @@ static int wm8904_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
           int errcode = errno;
           DEBUGASSERT(errcode > 0);
 
-          auddbg("ERROR: mq_send failed: %d\n", errcode);
+          auderr("ERROR: mq_send failed: %d\n", errcode);
           UNUSED(errcode);
         }
     }
@@ -1744,7 +1744,7 @@ static int wm8904_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
 static int wm8904_cancelbuffer(FAR struct audio_lowerhalf_s *dev,
                                FAR struct ap_buffer_s *apb)
 {
-  audvdbg("apb=%p\n", apb);
+  audinfo("apb=%p\n", apb);
   return OK;
 }
 
@@ -1777,7 +1777,7 @@ static int wm8904_ioctl(FAR struct audio_lowerhalf_s *dev, int cmd,
            * registers back in their default state.
            */
 
-          audvdbg("AUDIOIOC_HWRESET:\n");
+          audinfo("AUDIOIOC_HWRESET:\n");
         }
         break;
 
@@ -1786,7 +1786,7 @@ static int wm8904_ioctl(FAR struct audio_lowerhalf_s *dev, int cmd,
 #ifdef CONFIG_AUDIO_DRIVER_SPECIFIC_BUFFERS
       case AUDIOIOC_GETBUFFERINFO:
         {
-          audvdbg("AUDIOIOC_GETBUFFERINFO:\n");
+          audinfo("AUDIOIOC_GETBUFFERINFO:\n");
           bufinfo              = (FAR struct ap_buffer_info_s *) arg;
           bufinfo->buffer_size = CONFIG_WM8904_BUFFER_SIZE;
           bufinfo->nbuffers    = CONFIG_WM8904_NUM_BUFFERS;
@@ -1795,7 +1795,7 @@ static int wm8904_ioctl(FAR struct audio_lowerhalf_s *dev, int cmd,
 #endif
 
       default:
-        audvdbg("Ignored\n");
+        audinfo("Ignored\n");
         break;
     }
 
@@ -1908,7 +1908,7 @@ static void wm8904_interrupt_work(FAR void *arg)
   /* Sample the interrupt status */
 
   regval = wm8904_readreg(priv, WM8904_INT_STATUS);
-  audvdbg("INT_STATUS: %04x\n", regval);
+  audinfo("INT_STATUS: %04x\n", regval);
 
   /* Check for the FLL lock interrupt.  We are sloppy here since at
    * present, only the FLL lock interrupt is used.
@@ -1971,7 +1971,7 @@ static int wm8904_interrupt(FAR const struct wm8904_lower_s *lower,
   ret = work_queue(LPWORK, &priv->work, wm8904_interrupt_work, priv, 0);
   if (ret < 0)
     {
-      audlldbg("ERROR: Failed to schedule work\n");
+      auderr("ERROR: Failed to schedule work\n");
     }
 
   return OK;
@@ -1994,7 +1994,7 @@ static void *wm8904_workerthread(pthread_addr_t pvarg)
   int msglen;
   int prio;
 
-  audvdbg("Entry\n");
+  audinfo("Entry\n");
 
 #ifndef CONFIG_AUDIO_EXCLUDE_STOP
   priv->terminating = false;
@@ -2042,7 +2042,7 @@ static void *wm8904_workerthread(pthread_addr_t pvarg)
 
       if (msglen < sizeof(struct audio_msg_s))
         {
-          auddbg("ERROR: Message too small: %d\n", msglen);
+          auderr("ERROR: Message too small: %d\n", msglen);
           continue;
         }
 
@@ -2055,7 +2055,7 @@ static void *wm8904_workerthread(pthread_addr_t pvarg)
            */
 
           case AUDIO_MSG_DATA_REQUEST:
-            audvdbg("AUDIO_MSG_DATA_REQUEST\n");
+            audinfo("AUDIO_MSG_DATA_REQUEST\n");
             break;
 
           /* Stop the playback */
@@ -2064,7 +2064,7 @@ static void *wm8904_workerthread(pthread_addr_t pvarg)
           case AUDIO_MSG_STOP:
             /* Indicate that we are terminating */
 
-            audvdbg("AUDIO_MSG_STOP: Terminating\n");
+            audinfo("AUDIO_MSG_STOP: Terminating\n");
             priv->terminating = true;
             break;
 #endif
@@ -2074,18 +2074,18 @@ static void *wm8904_workerthread(pthread_addr_t pvarg)
            */
 
           case AUDIO_MSG_ENQUEUE:
-            audvdbg("AUDIO_MSG_ENQUEUE\n");
+            audinfo("AUDIO_MSG_ENQUEUE\n");
             break;
 
           /* We will wake up from the I2S callback with this message */
 
           case AUDIO_MSG_COMPLETE:
-            audvdbg("AUDIO_MSG_COMPLETE\n");
+            audinfo("AUDIO_MSG_COMPLETE\n");
             wm8904_returnbuffers(priv);
             break;
 
           default:
-            auddbg("ERROR: Ignoring message ID %d\n", msg.msgId);
+            auderr("ERROR: Ignoring message ID %d\n", msg.msgId);
             break;
         }
     }
@@ -2132,7 +2132,7 @@ static void *wm8904_workerthread(pthread_addr_t pvarg)
   priv->dev.upper(priv->dev.priv, AUDIO_CALLBACK_COMPLETE, NULL, OK);
 #endif
 
-  audvdbg("Exit\n");
+  audinfo("Exit\n");
   return NULL;
 }
 
@@ -2506,7 +2506,7 @@ FAR struct audio_lowerhalf_s *
       regval = wm8904_readreg(priv, WM8904_ID);
       if (regval != WM8904_SW_RST_DEV_ID1)
         {
-          auddbg("ERROR: WM8904 not found: ID=%04x\n", regval);
+          auderr("ERROR: WM8904 not found: ID=%04x\n", regval);
           goto errout_with_dev;
         }
 
diff --git a/drivers/bch/bchdev_driver.c b/drivers/bch/bchdev_driver.c
index 198cd334b381df1fb272d7b40031531f3984f4b1..e74ef3f7f7be68237622bcfa60224781668a29d4 100644
--- a/drivers/bch/bchdev_driver.c
+++ b/drivers/bch/bchdev_driver.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/bch/bchdev_driver.c
  *
- *   Copyright (C) 2008-2009, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2014-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -57,6 +53,7 @@
 
 #include 
 #include 
+#include 
 
 #include "bch.h"
 
diff --git a/drivers/bch/bchdev_register.c b/drivers/bch/bchdev_register.c
index 139c2925767d1a7a90ebdc3e3facb42494f7ad05..b199dd4a4c276a480f2deb61856cc265257197eb 100644
--- a/drivers/bch/bchdev_register.c
+++ b/drivers/bch/bchdev_register.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/bch/bchdev_register.c
  *
- *   Copyright (C) 2008-2009, 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -44,23 +44,10 @@
 #include 
 #include 
 
-#include "bch.h"
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
+#include 
+#include 
 
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
+#include "bch.h"
 
 /****************************************************************************
  * Public Functions
@@ -86,7 +73,7 @@ int bchdev_register(FAR const char *blkdev, FAR const char *chardev,
   ret = bchlib_setup(blkdev, readonly, &handle);
   if (ret < 0)
     {
-      fdbg("bchlib_setup failed: %d\n", -ret);
+      ferr("ERROR: bchlib_setup failed: %d\n", -ret);
       return ret;
     }
 
@@ -95,7 +82,7 @@ int bchdev_register(FAR const char *blkdev, FAR const char *chardev,
   ret = register_driver(chardev, &bch_fops, 0666, handle);
   if (ret < 0)
     {
-      fdbg("register_driver failed: %d\n", -ret);
+      ferr("ERROR: register_driver failed: %d\n", -ret);
       bchlib_teardown(handle);
       handle = NULL;
     }
diff --git a/drivers/bch/bchdev_unregister.c b/drivers/bch/bchdev_unregister.c
index 0c6a35d4b18d9be1bb2b1473e3027bfcf1fadc8f..1b4e1e138e48d4c5daf8538934e816b1a60c9d7d 100644
--- a/drivers/bch/bchdev_unregister.c
+++ b/drivers/bch/bchdev_unregister.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/bch/bchdev_unregister.c
  *
- *   Copyright (C) 2008-2009, 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -51,25 +51,10 @@
 
 #include 
 #include 
+#include 
 
 #include "bch.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -91,7 +76,7 @@ int bchdev_unregister(FAR const char *chardev)
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!chardev)
     {
       return -EINVAL;
@@ -103,7 +88,7 @@ int bchdev_unregister(FAR const char *chardev)
   fd = open(chardev, O_RDONLY);
   if (fd < 0)
     {
-      dbg("Failed to open %s: %d\n", chardev, errno);
+      _err("ERROR: Failed to open %s: %d\n", chardev, errno);
       return -errno;
     }
 
@@ -116,7 +101,7 @@ int bchdev_unregister(FAR const char *chardev)
 
   if (ret < 0)
     {
-      dbg("ioctl failed: %d\n", errno);
+      _err("ERROR: ioctl failed: %d\n", errno);
       return -errno;
     }
 
diff --git a/drivers/bch/bchlib_cache.c b/drivers/bch/bchlib_cache.c
index 8ad543b4b008d0f17388cb57324036a0a69941d0..82090981cd10543d0128165bbf5f72b3b52abe1e 100644
--- a/drivers/bch/bchlib_cache.c
+++ b/drivers/bch/bchlib_cache.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/bch/bchlib_cache.c
  *
- *   Copyright (C) 2008-2009, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -45,26 +45,12 @@
 #include 
 #include 
 
-#include 
-
 #include "bch.h"
 
 #if defined(CONFIG_BCH_ENCRYPTION)
 #  include 
 #endif
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -156,7 +142,7 @@ int bchlib_flushsector(FAR struct bchlib_s *bch)
       ret = inode->u.i_bops->write(inode, bch->buffer, bch->sector, 1);
       if (ret < 0)
         {
-          fdbg("Write failed: %d\n");
+          ferr("Write failed: %d\n");
         }
 
 #if defined(CONFIG_BCH_ENCRYPTION)
@@ -201,7 +187,7 @@ int bchlib_readsector(FAR struct bchlib_s *bch, size_t sector)
       ret = inode->u.i_bops->read(inode, bch->buffer, sector, 1);
       if (ret < 0)
         {
-          fdbg("Read failed: %d\n");
+          ferr("Read failed: %d\n");
         }
       bch->sector = sector;
 #if defined(CONFIG_BCH_ENCRYPTION)
diff --git a/drivers/bch/bchlib_read.c b/drivers/bch/bchlib_read.c
index d534d8491963b58e995dd1de9f89d48b519adcda..5fe680acb49b35f7feaf2b3ced614f485c5e3ae4 100644
--- a/drivers/bch/bchlib_read.c
+++ b/drivers/bch/bchlib_read.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/bch/bchlib_read.c
  *
- *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -46,8 +46,6 @@
 #include 
 #include 
 
-#include 
-
 #include "bch.h"
 
 /****************************************************************************
@@ -160,7 +158,7 @@ ssize_t bchlib_read(FAR void *handle, FAR char *buffer, size_t offset, size_t le
                                        sector, nsectors);
       if (ret < 0)
         {
-          fdbg("Read failed: %d\n");
+          ferr("ERROR: Read failed: %d\n");
           return ret;
         }
 
diff --git a/drivers/bch/bchlib_setup.c b/drivers/bch/bchlib_setup.c
index 6ec7a878a63c8ebe3b715506c860596e2bb10299..be20613fdcf5a3ba0ca0fd3fe1a90cc36f17b98d 100644
--- a/drivers/bch/bchlib_setup.c
+++ b/drivers/bch/bchlib_setup.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/bch/bchlib_setup.c
  *
- *   Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -54,22 +54,6 @@
 
 #include "bch.h"
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -96,7 +80,7 @@ int bchlib_setup(const char *blkdev, bool readonly, FAR void **handle)
   bch = (FAR struct bchlib_s *)kmm_zalloc(sizeof(struct bchlib_s));
   if (!bch)
     {
-      fdbg("Failed to allocate BCH structure\n");
+      ferr("ERROR: Failed to allocate BCH structure\n");
       return -ENOMEM;
     }
 
@@ -105,7 +89,7 @@ int bchlib_setup(const char *blkdev, bool readonly, FAR void **handle)
   ret = open_blockdriver(blkdev, readonly ? MS_RDONLY : 0, &bch->inode);
   if (ret < 0)
     {
-      fdbg("Failed to open driver %s: %d\n", blkdev, -ret);
+      ferr("ERROR: Failed to open driver %s: %d\n", blkdev, -ret);
       goto errout_with_bch;
     }
 
@@ -114,20 +98,20 @@ int bchlib_setup(const char *blkdev, bool readonly, FAR void **handle)
   ret = bch->inode->u.i_bops->geometry(bch->inode, &geo);
   if (ret < 0)
     {
-      fdbg("geometry failed: %d\n", -ret);
+      ferr("ERROR: geometry failed: %d\n", -ret);
       goto errout_with_bch;
     }
 
   if (!geo.geo_available)
     {
-      fdbg("geometry failed: %d\n", -ret);
+      ferr("ERROR: geometry failed: %d\n", -ret);
       ret = -ENODEV;
       goto errout_with_bch;
     }
 
   if (!readonly && (!bch->inode->u.i_bops->write || !geo.geo_writeenabled))
     {
-      fdbg("write access not supported\n");
+      ferr("ERROR: write access not supported\n");
       ret = -EACCES;
       goto errout_with_bch;
     }
@@ -145,7 +129,7 @@ int bchlib_setup(const char *blkdev, bool readonly, FAR void **handle)
   bch->buffer = (FAR uint8_t *)kmm_malloc(bch->sectsize);
   if (!bch->buffer)
     {
-      fdbg("Failed to allocate sector buffer\n");
+      ferr("ERROR: Failed to allocate sector buffer\n");
       ret = -ENOMEM;
       goto errout_with_bch;
     }
diff --git a/drivers/bch/bchlib_teardown.c b/drivers/bch/bchlib_teardown.c
index d97d3b8ffcdc8261ce57923272e76e61728b6d1c..aa20b4b4ad3d1bca14dedb64b91416fa74e1d2d1 100644
--- a/drivers/bch/bchlib_teardown.c
+++ b/drivers/bch/bchlib_teardown.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/bch/bchlib_teardown.c
  *
- *   Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -49,22 +49,6 @@
 
 #include "bch.h"
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/drivers/bch/bchlib_write.c b/drivers/bch/bchlib_write.c
index b1636c6d450914330d2415624e46f05bd993b1c2..f5fa299657206a0e235e06dd79d55eb486ec3a48 100644
--- a/drivers/bch/bchlib_write.c
+++ b/drivers/bch/bchlib_write.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/bch/bchlib_write.c
  *
- *   Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -51,22 +51,6 @@
 
 #include "bch.h"
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -80,7 +64,8 @@
  *
  ****************************************************************************/
 
-ssize_t bchlib_write(FAR void *handle, FAR const char *buffer, size_t offset, size_t len)
+ssize_t bchlib_write(FAR void *handle, FAR const char *buffer, size_t offset,
+        size_t len)
 {
   FAR struct bchlib_s *bch = (FAR struct bchlib_s *)handle;
   size_t   nsectors;
@@ -162,7 +147,7 @@ ssize_t bchlib_write(FAR void *handle, FAR const char *buffer, size_t offset, si
                                         sector, nsectors);
       if (ret < 0)
         {
-          fdbg("Write failed: %d\n", ret);
+          ferr("ERROR: Write failed: %d\n", ret);
           return ret;
         }
 
@@ -204,7 +189,7 @@ ssize_t bchlib_write(FAR void *handle, FAR const char *buffer, size_t offset, si
   ret = bchlib_flushsector(bch);
   if (ret < 0)
     {
-      fdbg("Flush failed: %d\n", ret);
+      ferr("ERROR: Flush failed: %d\n", ret);
       return ret;
     }
 
diff --git a/drivers/can.c b/drivers/can.c
index 2454f06c2d3284db8983c2d77ccc3352b5056965..dd810ebcd18964b9a19c358ddee6e19c64fc99b5 100644
--- a/drivers/can.c
+++ b/drivers/can.c
@@ -4,6 +4,9 @@
  *   Copyright (C) 2008-2009, 2011-2012, 2014-2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
@@ -47,12 +50,14 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
-#include 
 #include 
-#include 
+#include 
+#include 
+#include 
 
 #ifdef CONFIG_CAN_TXREADY
 #  include 
@@ -96,21 +101,6 @@
 #  endif
 #endif
 
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
-
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
-#else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
-#endif
-
 /* Timing Definitions *******************************************************/
 
 #define HALF_SECOND_MSEC 500
@@ -120,6 +110,17 @@
  * Private Function Prototypes
  ****************************************************************************/
 
+/* Semaphore helpers */
+
+static int            can_takesem(FAR sem_t *sem);
+
+/* Poll helpers */
+
+#ifndef CONFIG_DISABLE_POLL
+static void           can_pollnotify(FAR struct can_dev_s *dev,
+                                     pollevent_t eventset);
+#endif
+
 /* CAN helpers */
 
 static uint8_t        can_dlc2bytes(uint8_t dlc);
@@ -135,14 +136,18 @@ static void           can_txready_work(FAR void *arg);
 static int            can_open(FAR struct file *filep);
 static int            can_close(FAR struct file *filep);
 static ssize_t        can_read(FAR struct file *filep, FAR char *buffer,
-                         size_t buflen);
+                               size_t buflen);
 static int            can_xmit(FAR struct can_dev_s *dev);
 static ssize_t        can_write(FAR struct file *filep,
-                         FAR const char *buffer, size_t buflen);
+                                FAR const char *buffer, size_t buflen);
 static inline ssize_t can_rtrread(FAR struct can_dev_s *dev,
-                         FAR struct canioc_rtr_s *rtr);
+                                  FAR struct canioc_rtr_s *rtr);
 static int            can_ioctl(FAR struct file *filep, int cmd,
-                         unsigned long arg);
+                                unsigned long arg);
+#ifndef CONFIG_DISABLE_POLL
+static int            can_poll(FAR struct file *filep, FAR struct pollfd *fds,
+                               bool setup);
+#endif
 
 /****************************************************************************
  * Private Data
@@ -154,13 +159,13 @@ static const struct file_operations g_canops =
   can_close, /* close */
   can_read,  /* read */
   can_write, /* write */
-  0,         /* seek */
+  NULL,      /* seek */
   can_ioctl  /* ioctl */
 #ifndef CONFIG_DISABLE_POLL
-  , 0        /* poll */
+  , can_poll /* poll */
 #endif
 #ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
-  , 0        /* unlink */
+  , NULL     /* unlink */
 #endif
 };
 
@@ -168,6 +173,64 @@ static const struct file_operations g_canops =
  * Private Functions
  ****************************************************************************/
 
+/****************************************************************************
+ * Name: can_takesem
+ ****************************************************************************/
+
+static int can_takesem(FAR sem_t *sem)
+{
+  int errcode;
+
+  /* Take a count from the semaphore, possibly waiting */
+
+  if (sem_wait(sem) < 0)
+    {
+      /* The only case that an error should occur here is if the wait
+       * was awakened by a signal
+       */
+
+      errcode = get_errno();
+      DEBUGASSERT(errcode == EINTR);
+      return -errcode;
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: can_givesem
+ ****************************************************************************/
+
+#define can_givesem(sem) sem_post(sem)
+
+/****************************************************************************
+ * Name: can_pollnotify
+ ****************************************************************************/
+
+#ifndef CONFIG_DISABLE_POLL
+static void can_pollnotify(FAR struct can_dev_s *dev, pollevent_t eventset)
+{
+  FAR struct pollfd *fds;
+  int i;
+
+  for (i = 0; i < CONFIG_CAN_NPOLLWAITERS; i++)
+    {
+      fds = dev->cd_fds[i];
+      if (fds != NULL)
+        {
+          fds->revents |= fds->events & eventset;
+          if (fds->revents != 0)
+            {
+              caninfo("Report events: %02x\n", fds->revents);
+              sem_post(fds->sem);
+            }
+        }
+    }
+}
+#else
+#  define can_pollnotify(dev, eventset)
+#endif
+
 /****************************************************************************
  * Name: can_dlc2bytes
  *
@@ -296,9 +359,9 @@ static void can_txready_work(FAR void *arg)
   irqstate_t flags;
   int ret;
 
-  canllvdbg("xmit head: %d queue: %d tail: %d\n",
-            dev->cd_xmit.tx_head, dev->cd_xmit.tx_queue,
-            dev->cd_xmit.tx_tail);
+  caninfo("xmit head: %d queue: %d tail: %d\n",
+          dev->cd_xmit.tx_head, dev->cd_xmit.tx_queue,
+          dev->cd_xmit.tx_tail);
 
   /* Verify that the xmit FIFO is not empty.  The following operations must
    * be performed with interrupt disabled.
@@ -324,7 +387,7 @@ static void can_txready_work(FAR void *arg)
             {
               /* Yes.. Inform them that new xmit space is available */
 
-              (void)sem_post(&dev->cd_xmit.tx_sem);
+              can_givesem(&dev->cd_xmit.tx_sem);
             }
         }
     }
@@ -346,72 +409,70 @@ static int can_open(FAR struct file *filep)
   FAR struct inode     *inode = filep->f_inode;
   FAR struct can_dev_s *dev   = inode->i_private;
   uint8_t               tmp;
-  int                   ret   = OK;
+  int                   ret;
 
-  canvdbg("ocount: %d\n", dev->cd_ocount);
+  caninfo("ocount: %d\n", dev->cd_ocount);
 
   /* If the port is the middle of closing, wait until the close is finished */
 
-  if (sem_wait(&dev->cd_closesem) != OK)
+  ret = can_takesem(&dev->cd_closesem);
+  if (ret < 0)
     {
-      ret = -get_errno();
+      return ret;
     }
-  else
+
+  /* Increment the count of references to the device.  If this is the first
+   * time that the driver has been opened for this device, then initialize
+   * the device.
+   */
+
+  tmp = dev->cd_ocount + 1;
+  if (tmp == 0)
     {
-      /* Increment the count of references to the device.  If this is the first
-       * time that the driver has been opened for this device, then initialize
-       * the device.
-       */
+      /* More than 255 opens; uint8_t overflows to zero */
 
-      tmp = dev->cd_ocount + 1;
-      if (tmp == 0)
-        {
-          /* More than 255 opens; uint8_t overflows to zero */
+      ret = -EMFILE;
+    }
+  else
+    {
+      /* Check if this is the first time that the driver has been opened. */
 
-          ret = -EMFILE;
-        }
-      else
+      if (tmp == 1)
         {
-          /* Check if this is the first time that the driver has been opened. */
+          /* Yes.. perform one time hardware initialization. */
 
-          if (tmp == 1)
+          irqstate_t flags = enter_critical_section();
+          ret = dev_setup(dev);
+          if (ret >= 0)
             {
-              /* Yes.. perform one time hardware initialization. */
-
-              irqstate_t flags = enter_critical_section();
-              ret = dev_setup(dev);
-              if (ret == OK)
-                {
-                  /* Mark the FIFOs empty */
+              /* Mark the FIFOs empty */
 
-                  dev->cd_xmit.tx_head  = 0;
-                  dev->cd_xmit.tx_queue = 0;
-                  dev->cd_xmit.tx_tail  = 0;
-                  dev->cd_recv.rx_head  = 0;
-                  dev->cd_recv.rx_tail  = 0;
+              dev->cd_xmit.tx_head  = 0;
+              dev->cd_xmit.tx_queue = 0;
+              dev->cd_xmit.tx_tail  = 0;
+              dev->cd_recv.rx_head  = 0;
+              dev->cd_recv.rx_tail  = 0;
 
-                  /* Finally, Enable the CAN RX interrupt */
+              /* Finally, Enable the CAN RX interrupt */
 
-                  dev_rxint(dev, true);
+              dev_rxint(dev, true);
 
-                  /* Save the new open count only on success */
+              /* Save the new open count only on success */
 
-                  dev->cd_ocount = 1;
-                }
-
-              leave_critical_section(flags);
+              dev->cd_ocount = 1;
             }
-          else
-            {
-              /* Save the incremented open count */
 
-              dev->cd_ocount = tmp;
-            }
+          leave_critical_section(flags);
         }
+      else
+        {
+          /* Save the incremented open count */
 
-      sem_post(&dev->cd_closesem);
+          dev->cd_ocount = tmp;
+        }
     }
 
+  can_givesem(&dev->cd_closesem);
   return ret;
 }
 
@@ -429,67 +490,64 @@ static int can_close(FAR struct file *filep)
   FAR struct inode     *inode = filep->f_inode;
   FAR struct can_dev_s *dev   = inode->i_private;
   irqstate_t            flags;
-  int                   ret = OK;
+  int                   ret;
 
-  canvdbg("ocount: %d\n", dev->cd_ocount);
+  caninfo("ocount: %d\n", dev->cd_ocount);
 
-  if (sem_wait(&dev->cd_closesem) != OK)
+  ret = can_takesem(&dev->cd_closesem);
+  if (ret < 0)
     {
-      ret = -get_errno();
+      return ret;
     }
-  else
+
+  /* Decrement the references to the driver.  If the reference count will
+   * decrement to 0, then uninitialize the driver.
+   */
+
+  if (dev->cd_ocount > 1)
     {
-      /* Decrement the references to the driver.  If the reference count will
-       * decrement to 0, then uninitialize the driver.
-       */
+      dev->cd_ocount--;
+      goto errout;
+    }
 
-      if (dev->cd_ocount > 1)
-        {
-          dev->cd_ocount--;
-          sem_post(&dev->cd_closesem);
-        }
-      else
-        {
-          /* There are no more references to the port */
+  /* There are no more references to the port */
 
-          dev->cd_ocount = 0;
+  dev->cd_ocount = 0;
 
-          /* Stop accepting input */
+  /* Stop accepting input */
 
-          dev_rxint(dev, false);
+  dev_rxint(dev, false);
 
-          /* Now we wait for the transmit FIFO to clear */
+  /* Now we wait for the transmit FIFO to clear */
 
-          while (dev->cd_xmit.tx_head != dev->cd_xmit.tx_tail)
-            {
+  while (dev->cd_xmit.tx_head != dev->cd_xmit.tx_tail)
+    {
 #ifndef CONFIG_DISABLE_SIGNALS
-               usleep(HALF_SECOND_USEC);
+       usleep(HALF_SECOND_USEC);
 #else
-               up_mdelay(HALF_SECOND_MSEC);
+       up_mdelay(HALF_SECOND_MSEC);
 #endif
-            }
+    }
 
-          /* And wait for the TX hardware FIFO to drain */
+  /* And wait for the TX hardware FIFO to drain */
 
-          while (!dev_txempty(dev))
-            {
+  while (!dev_txempty(dev))
+    {
 #ifndef CONFIG_DISABLE_SIGNALS
-              usleep(HALF_SECOND_USEC);
+      usleep(HALF_SECOND_USEC);
 #else
-              up_mdelay(HALF_SECOND_MSEC);
+      up_mdelay(HALF_SECOND_MSEC);
 #endif
-            }
-
-          /* Free the IRQ and disable the CAN device */
+    }
 
-          flags = enter_critical_section();       /* Disable interrupts */
-          dev_shutdown(dev);       /* Disable the CAN */
-          leave_critical_section(flags);
+  /* Free the IRQ and disable the CAN device */
 
-          sem_post(&dev->cd_closesem);
-        }
-    }
+  flags = enter_critical_section(); /* Disable interrupts */
+  dev_shutdown(dev);                /* Disable the CAN */
+  leave_critical_section(flags);
 
+errout:
+  can_givesem(&dev->cd_closesem);
   return ret;
 }
 
@@ -510,7 +568,7 @@ static ssize_t can_read(FAR struct file *filep, FAR char *buffer,
   irqstate_t            flags;
   int                   ret   = 0;
 
-  canvdbg("buflen: %d\n", buflen);
+  caninfo("buflen: %d\n", buflen);
 
   /* The caller must provide enough memory to catch the smallest possible
    * message.  This is not a system error condition, but we won't permit
@@ -572,18 +630,12 @@ static ssize_t can_read(FAR struct file *filep, FAR char *buffer,
 
           /* Wait for a message to be received */
 
+          DEBUGASSERT(dev->cd_nrxwaiters < 255);
           dev->cd_nrxwaiters++;
-          do
-            {
-              ret = sem_wait(&dev->cd_recv.rx_sem);
-            }
-          while (ret >= 0 && dev->cd_recv.rx_head == dev->cd_recv.rx_tail);
-
+          ret = can_takesem(&dev->cd_recv.rx_sem);
           dev->cd_nrxwaiters--;
-
           if (ret < 0)
             {
-              ret = -get_errno();
               goto return_with_irqdisabled;
             }
         }
@@ -649,8 +701,8 @@ static int can_xmit(FAR struct can_dev_s *dev)
   int tmpndx;
   int ret = -EBUSY;
 
-  canllvdbg("xmit head: %d queue: %d tail: %d\n",
-            dev->cd_xmit.tx_head, dev->cd_xmit.tx_queue, dev->cd_xmit.tx_tail);
+  caninfo("xmit head: %d queue: %d tail: %d\n",
+          dev->cd_xmit.tx_head, dev->cd_xmit.tx_queue, dev->cd_xmit.tx_tail);
 
   /* If there is nothing to send, then just disable interrupts and return */
 
@@ -700,9 +752,9 @@ static int can_xmit(FAR struct can_dev_s *dev)
       /* Send the next message at the FIFO queue index */
 
       ret = dev_send(dev, &dev->cd_xmit.tx_buffer[tmpndx]);
-      if (ret != OK)
+      if (ret < 0)
         {
-          candbg("dev_send failed: %d\n", ret);
+          canerr("dev_send failed: %d\n", ret);
           break;
         }
     }
@@ -732,7 +784,7 @@ static ssize_t can_write(FAR struct file *filep, FAR const char *buffer,
   int                      msglen;
   int                      ret   = 0;
 
-  canvdbg("buflen: %d\n", buflen);
+  caninfo("buflen: %d\n", buflen);
 
   /* Interrupts must disabled throughout the following */
 
@@ -794,20 +846,14 @@ static ssize_t can_write(FAR struct file *filep, FAR const char *buffer,
 
           /* Wait for a message to be sent */
 
-          do
+          DEBUGASSERT(dev->cd_ntxwaiters < 255);
+          dev->cd_ntxwaiters++;
+          ret = can_takesem(&fifo->tx_sem);
+          dev->cd_ntxwaiters--;
+          if (ret < 0)
             {
-              DEBUGASSERT(dev->cd_ntxwaiters < 255);
-              dev->cd_ntxwaiters++;
-              ret = sem_wait(&fifo->tx_sem);
-              dev->cd_ntxwaiters--;
-
-              if (ret < 0 && get_errno() != EINTR)
-                {
-                  ret = -get_errno();
-                  goto return_with_irqdisabled;
-                }
+              goto return_with_irqdisabled;
             }
-          while (ret < 0);
 
           /* Re-check the FIFO state */
 
@@ -833,7 +879,7 @@ static ssize_t can_write(FAR struct file *filep, FAR const char *buffer,
     }
 
   /* We get here after all messages have been added to the FIFO.  Check if
-   * we need to kick of the XMIT sequence.
+   * we need to kick off the XMIT sequence.
    */
 
   if (inactive)
@@ -893,11 +939,11 @@ static inline ssize_t can_rtrread(FAR struct can_dev_s *dev,
       /* Send the remote transmission request */
 
       ret = dev_remoterequest(dev, wait->cr_id);
-      if (ret == OK)
+      if (ret >= 0)
         {
           /* Then wait for the response */
 
-          ret = sem_wait(&wait->cr_sem);
+          ret = can_takesem(&wait->cr_sem);
         }
     }
 
@@ -915,7 +961,7 @@ static int can_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   FAR struct can_dev_s *dev   = inode->i_private;
   int                   ret   = OK;
 
-  canvdbg("cmd: %d arg: %ld\n", cmd, arg);
+  caninfo("cmd: %d arg: %ld\n", cmd, arg);
 
   /* Handle built-in ioctl commands */
 
@@ -944,6 +990,157 @@ static int can_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   return ret;
 }
 
+/****************************************************************************
+ * Name: can_poll
+ ****************************************************************************/
+
+#ifndef CONFIG_DISABLE_POLL
+static int can_poll(FAR struct file *filep, FAR struct pollfd *fds,
+                    bool setup)
+{
+  FAR struct inode     *inode = (FAR struct inode *)filep->f_inode;
+  FAR struct can_dev_s *dev   = (FAR struct can_dev_s *)inode->i_private;
+  pollevent_t eventset;
+  int ndx;
+  int ret;
+  int i;
+
+  /* Some sanity checking */
+
+#ifdef CONFIG_DEBUG_FEATURES
+  if (dev == NULL || fds == NULL)
+    {
+      return -ENODEV;
+    }
+#endif
+
+  /* Get exclusive access to the poll structures */
+
+  ret = can_takesem(&dev->cd_pollsem);
+  if (ret < 0)
+    {
+      /* A signal received while waiting for access to the poll data
+       * will abort the operation
+       */
+
+      return ret;
+    }
+
+  /* Are we setting up the poll?  Or tearing it down? */
+
+  if (setup)
+    {
+      /* This is a request to set up the poll.  Find an available
+       * slot for the poll structure reference.
+       */
+
+      for (i = 0; i < CONFIG_CAN_NPOLLWAITERS; i++)
+        {
+          /* Find an available slot */
+
+          if (dev->cd_fds[i] == NULL)
+            {
+              /* Bind the poll structure and this slot */
+
+              dev->cd_fds[i] = fds;
+              fds->priv       = &dev->cd_fds[i];
+              break;
+            }
+        }
+
+      if (i >= CONFIG_CAN_NPOLLWAITERS)
+        {
+          fds->priv = NULL;
+          ret       = -EBUSY;
+          goto errout;
+        }
+
+      /* Should we immediately notify on any of the requested events?
+       * First, check if the xmit buffer is full.
+       *
+       * Get exclusive access to the cd_xmit buffer indices.  NOTE: that
+       * we do not let this wait be interrupted by a signal (we probably
+       * should, but that would be a little awkward).
+       */
+
+      eventset = 0;
+
+      DEBUGASSERT(dev->cd_ntxwaiters < 255);
+      dev->cd_ntxwaiters++;
+      do
+        {
+          ret = can_takesem(&dev->cd_xmit.tx_sem);
+        }
+      while (ret < 0);
+      dev->cd_ntxwaiters--;
+
+      ndx = dev->cd_xmit.tx_head + 1;
+      if (ndx >= CONFIG_CAN_FIFOSIZE)
+        {
+          ndx = 0;
+        }
+
+      if (ndx != dev->cd_xmit.tx_tail)
+        {
+          eventset |= fds->events & POLLOUT;
+        }
+
+      can_givesem(&dev->cd_xmit.tx_sem);
+
+      /* Check if the receive buffer is empty.
+       *
+       * Get exclusive access to the cd_recv buffer indices.  NOTE: that
+       * we do not let this wait be interrupted by a signal (we probably
+       * should, but that would be a little awkward).
+       */
+
+      DEBUGASSERT(dev->cd_nrxwaiters < 255);
+      dev->cd_nrxwaiters++;
+      do
+        {
+          ret = can_takesem(&dev->cd_recv.rx_sem);
+        }
+      while (ret < 0);
+      dev->cd_nrxwaiters--;
+
+      if (dev->cd_recv.rx_head != dev->cd_recv.rx_tail)
+        {
+          eventset |= fds->events & POLLIN;
+        }
+
+      can_givesem(&dev->cd_recv.rx_sem);
+
+      if (eventset != 0)
+        {
+          can_pollnotify(dev, eventset);
+        }
+    }
+  else if (fds->priv != NULL)
+    {
+      /* This is a request to tear down the poll */
+
+      struct pollfd **slot = (struct pollfd **)fds->priv;
+
+#ifdef CONFIG_DEBUG_FEATURES
+      if (slot == NULL)
+        {
+          ret = -EIO;
+          goto errout;
+        }
+#endif
+
+      /* Remove all memory of the poll setup */
+
+      *slot     = NULL;
+      fds->priv = NULL;
+    }
+
+errout:
+  can_givesem(&dev->cd_pollsem);
+  return ret;
+}
+#endif
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -970,13 +1167,23 @@ int can_register(FAR const char *path, FAR struct can_dev_s *dev)
   dev->cd_error      = 0;
 #endif
 
-  sem_init(&dev->cd_xmit.tx_sem, 0, 0);
-  sem_init(&dev->cd_recv.rx_sem, 0, 0);
-  sem_init(&dev->cd_closesem, 0, 1);
+  /* Initialize semaphores */
+
+  sem_init(&dev->cd_xmit.tx_sem, 0, 1);
+  sem_init(&dev->cd_recv.rx_sem, 0, 1);
+  sem_init(&dev->cd_closesem,    0, 1);
+#ifndef CONFIG_DISABLE_POLL
+  sem_init(&dev->cd_pollsem,     0, 1);
+#endif
 
   for (i = 0; i < CONFIG_CAN_NPENDINGRTR; i++)
     {
+      /* Initialize wait semaphores.  These semaphores are used for signaling
+       * and should not have priority inheritance enabled.
+       */
+
       sem_init(&dev->cd_rtr[i].cr_sem, 0, 0);
+      sem_setprotocol(&dev->cd_rtr[i].cr_sem, SEM_PRIO_NONE);
       dev->cd_rtr[i].cr_msg = NULL;
     }
 
@@ -986,7 +1193,7 @@ int can_register(FAR const char *path, FAR struct can_dev_s *dev)
 
   /* Register the CAN device */
 
-  canvdbg("Registering %s\n", path);
+  caninfo("Registering %s\n", path);
   return register_driver(path, &g_canops, 0666, dev);
 }
 
@@ -1015,10 +1222,10 @@ int can_receive(FAR struct can_dev_s *dev, FAR struct can_hdr_s *hdr,
   FAR struct can_rxfifo_s *fifo = &dev->cd_recv;
   FAR uint8_t             *dest;
   int                      nexttail;
-  int                      err = -ENOMEM;
+  int                      errcode = -ENOMEM;
   int                      i;
 
-  canllvdbg("ID: %d DLC: %d\n", hdr->ch_id, hdr->ch_dlc);
+  caninfo("ID: %d DLC: %d\n", hdr->ch_id, hdr->ch_dlc);
 
   /* Check if adding this new message would over-run the drivers ability to
    * enqueue read data.
@@ -1070,7 +1277,7 @@ int can_receive(FAR struct can_dev_s *dev, FAR struct can_hdr_s *hdr,
 
               /* And restart the waiting thread */
 
-              sem_post(&rtr->cr_sem);
+              can_givesem(&rtr->cr_sem);
             }
         }
     }
@@ -1110,10 +1317,16 @@ int can_receive(FAR struct can_dev_s *dev, FAR struct can_hdr_s *hdr,
 
       if (dev->cd_nrxwaiters > 0)
         {
-          sem_post(&fifo->rx_sem);
+          can_givesem(&fifo->rx_sem);
         }
 
-      err = OK;
+      errcode = OK;
+
+      /* Notify all poll/select waiters that they can read from the
+       * cd_recv buffer
+       */
+
+      can_pollnotify(dev, POLLIN);
     }
 #ifdef CONFIG_CAN_ERRORS
   else
@@ -1124,7 +1337,7 @@ int can_receive(FAR struct can_dev_s *dev, FAR struct can_hdr_s *hdr,
     }
 #endif
 
-  return err;
+  return errcode;
 }
 
 /****************************************************************************
@@ -1203,8 +1416,8 @@ int can_txdone(FAR struct can_dev_s *dev)
 {
   int ret = -ENOENT;
 
-  canllvdbg("xmit head: %d queue: %d tail: %d\n",
-            dev->cd_xmit.tx_head, dev->cd_xmit.tx_queue, dev->cd_xmit.tx_tail);
+  caninfo("xmit head: %d queue: %d tail: %d\n",
+          dev->cd_xmit.tx_head, dev->cd_xmit.tx_queue, dev->cd_xmit.tx_tail);
 
   /* Verify that the xmit FIFO is not empty */
 
@@ -1235,7 +1448,7 @@ int can_txdone(FAR struct can_dev_s *dev)
         {
           /* Yes.. Inform them that new xmit space is available */
 
-          ret = sem_post(&dev->cd_xmit.tx_sem);
+          ret = can_givesem(&dev->cd_xmit.tx_sem);
         }
       else
         {
@@ -1243,6 +1456,12 @@ int can_txdone(FAR struct can_dev_s *dev)
         }
     }
 
+  /* Notify all poll/select waiters that they can write to the cd_xmit
+   * buffer
+   */
+
+  can_pollnotify(dev, POLLOUT);
+
   return ret;
 }
 
@@ -1307,9 +1526,9 @@ int can_txready(FAR struct can_dev_s *dev)
 {
   int ret = -ENOENT;
 
-  canllvdbg("xmit head: %d queue: %d tail: %d waiters: %d\n",
-            dev->cd_xmit.tx_head, dev->cd_xmit.tx_queue, dev->cd_xmit.tx_tail,
-            dev->cd_ntxwaiters);
+  caninfo("xmit head: %d queue: %d tail: %d waiters: %d\n",
+          dev->cd_xmit.tx_head, dev->cd_xmit.tx_queue, dev->cd_xmit.tx_tail,
+          dev->cd_ntxwaiters);
 
   /* Verify that the xmit FIFO is not empty.  This is safe because interrupts
    * are always disabled when calling into can_xmit(); this cannot collide
diff --git a/drivers/contactless/Kconfig b/drivers/contactless/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..b26177eb9cbae7b5bfe61fa8af4437b54d79c206
--- /dev/null
+++ b/drivers/contactless/Kconfig
@@ -0,0 +1,69 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if DRIVERS_CONTACTLESS
+
+config CL_MFRC522
+	bool "NXP MFRC522 ISO14443/Mifare Transceiver"
+	default n
+	select SPI
+	---help---
+		This options adds driver support for the MFRC522 ISO14443/Mifare chip.
+
+if CL_MFRC522
+
+config MFRC522_SPI_FREQ
+	int "SPI frequency for MFRC522"
+	default 1000000
+	depends on CL_MFRC522
+
+config CL_MFRC522_DEBUG
+	bool "Enable MFRC522 debug"
+	default n
+	depends on CL_MFRC522
+
+config CL_MFRC522_DEBUG_TX
+	bool "trace TX frames"
+	default n
+	depends on MFRC522_DEBUG
+
+config CL_MFRC522_DEBUG_RX
+	bool "trace RX frames"
+	default n
+	depends on MFRC522_DEBUG
+
+endif # CL_MFRC522
+
+config CL_PN532
+	bool "pn532 NFC-chip support"
+	default n
+	select SPI
+	---help---
+		This options adds driver support for the PN532 NFC chip.
+
+if CL_PN532
+
+config PN532_SPI_FREQ
+	int "SPI frequency for PN532"
+	default 1000000
+	depends on CL_PN532
+
+config CL_PN532_DEBUG
+	bool "Enable PN532 debug"
+	default n
+	depends on CL_PN532
+
+config CL_PN532_DEBUG_TX
+	bool "trace TX frames"
+	default n
+	depends on CL_PN532_DEBUG
+
+config CL_PN532_DEBUG_RX
+	bool "trace RX frames"
+	default n
+	depends on CL_PN532_DEBUG
+
+endif # CL_PN532
+endif # DRIVERS_CONTACTLESS
diff --git a/drivers/sercomm/Make.defs b/drivers/contactless/Make.defs
similarity index 78%
rename from drivers/sercomm/Make.defs
rename to drivers/contactless/Make.defs
index 0cf93d4c805ba915b653c45af95a2d63844a5931..0df7134d88e9848f06b7c815ed57f0d04e5c5776 100644
--- a/drivers/sercomm/Make.defs
+++ b/drivers/contactless/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
-# drivers/serial/Make.defs
+# drivers/contactless/Make.defs
 #
-#   Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -33,23 +33,21 @@
 #
 ############################################################################
 
-# File descriptor support is needed for this driver
+ifeq ($(CONFIG_DRIVERS_CONTACTLESS),y)
 
-ifneq ($(CONFIG_NFILE_DESCRIPTORS),0)
+# Include contactless drivers
 
-# The sercomm driver should not be build for all platforms.  Only build it
-# is so configured
-
-ifeq ($(CONFIG_SERCOMM_CONSOLE),y)
-
-# Include serial drivers
-
-CSRCS += console.c uart.c
+ifeq ($(CONFIG_CL_MFRC522),y)
+CSRCS += mfrc522.c
+endif
 
-# Include sercomm build support
+ifeq ($(CONFIG_CL_PN532),y)
+CSRCS += pn532.c
+endif
 
-DEPPATH += --dep-path sercomm
-VPATH += :sercomm
+# Include contactless devices build support
 
-endif
+DEPPATH += --dep-path contactless
+VPATH += :contactless
+CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)contactless}
 endif
diff --git a/drivers/contactless/mfrc522.c b/drivers/contactless/mfrc522.c
new file mode 100644
index 0000000000000000000000000000000000000000..804ea0fa4b6c6190f9c75afb867452da06c3a23e
--- /dev/null
+++ b/drivers/contactless/mfrc522.c
@@ -0,0 +1,1616 @@
+/****************************************************************************
+ * drivers/contactless/mfrc522.c
+ *
+ *   Copyright(C) 2016 Uniquix Ltda. All rights reserved.
+ *   Author: Alan Carvalho de Assis 
+ *
+ * This driver is based on Arduino library for MFRC522 from Miguel
+ * Balboa released into the public domain:
+ * https://github.com/miguelbalboa/rfid/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "mfrc522.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_CL_MFRC522_DEBUG
+#  define mfrc522err    _err
+#  define mfrc522info   _info
+#else
+#  ifdef CONFIG_CPP_HAVE_VARARGS
+#    define mfrc522err(x...)
+#    define mfrc522info(x...)
+#  else
+#    define mfrc522err  (void)
+#    define mfrc522info (void)
+#  endif
+#endif
+
+#ifdef CONFIG_CL_MFRC522_DEBUG_TX
+#  define tracetx errdumpbuffer
+#else
+#  define tracetx(x...)
+#endif
+
+#ifdef CONFIG_CL_MFRC522_DEBUG_RX
+#  define tracerx errdumpbuffer
+#else
+#  define tracerx(x...)
+#endif
+
+#define FRAME_SIZE(f) (sizeof(struct mfrc522_frame) + f->len + 2)
+#define FRAME_POSTAMBLE(f) (f->data[f->len + 1])
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static inline void mfrc522_configspi(FAR struct spi_dev_s *spi);
+static void mfrc522_lock(FAR struct spi_dev_s *spi);
+static void mfrc522_unlock(FAR struct spi_dev_s *spi);
+
+/* Character driver methods */
+
+static int mfrc522_open(FAR struct file *filep);
+static int mfrc522_close(FAR struct file *filep);
+static ssize_t mfrc522_read(FAR struct file *, FAR char *, size_t);
+static ssize_t mfrc522_write(FAR struct file *filep, FAR const char *buffer,
+                             size_t buflen);
+static int mfrc522_ioctl(FAR struct file *filep, int cmd,
+                         unsigned long arg);
+
+uint8_t mfrc522_readu8(FAR struct mfrc522_dev_s *dev, uint8_t regaddr);
+void mfrc522_writeu8(FAR struct mfrc522_dev_s *dev, uint8_t regaddr,
+                     FAR uint8_t regval);
+void mfrc522_writeblk(FAR struct mfrc522_dev_s *dev, uint8_t regaddr,
+                      uint8_t *regval, int length);
+void mfrc522_readblk(FAR struct mfrc522_dev_s *dev, uint8_t regaddr,
+                     FAR uint8_t *regval, int length, uint8_t rxalign);
+
+void mfrc522_softreset(FAR struct mfrc522_dev_s *dev);
+
+int mfrc522_picc_select(FAR struct mfrc522_dev_s *dev,
+                        FAR struct picc_uid_s *uid, uint8_t validbits);
+
+/* IRQ Handling TODO:
+static int mfrc522_irqhandler(FAR int irq, FAR void *context, FAR void* dev);
+static inline int mfrc522_attachirq(FAR struct mfrc522_dev_s *dev, xcpt_t isr);
+*/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct file_operations g_mfrc522fops =
+{
+  mfrc522_open,
+  mfrc522_close,
+  mfrc522_read,
+  mfrc522_write,
+  0,
+  mfrc522_ioctl
+#ifndef CONFIG_DISABLE_POLL
+    , 0
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+    , 0
+#endif
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+static void mfrc522_lock(FAR struct spi_dev_s *spi)
+{
+  (void)SPI_LOCK(spi, true);
+
+  SPI_SETMODE(spi, SPIDEV_MODE0);
+  SPI_SETBITS(spi, 8);
+  (void)SPI_HWFEATURES(spi, 0);
+  (void)SPI_SETFREQUENCY(spi, CONFIG_MFRC522_SPI_FREQ);
+}
+
+static void mfrc522_unlock(FAR struct spi_dev_s *spi)
+{
+  (void)SPI_LOCK(spi, false);
+}
+
+static inline void mfrc522_configspi(FAR struct spi_dev_s *spi)
+{
+  /* Configure SPI for the MFRC522 module. */
+
+  SPI_SETMODE(spi, SPIDEV_MODE0);
+  SPI_SETBITS(spi, 8);
+  (void)SPI_HWFEATURES(spi, 0);
+  (void)SPI_SETFREQUENCY(spi, CONFIG_MFRC522_SPI_FREQ);
+}
+
+static inline void mfrc522_select(struct mfrc522_dev_s *dev)
+{
+  SPI_SELECT(dev->spi, SPIDEV_CONTACTLESS, true);
+}
+
+static inline void mfrc522_deselect(struct mfrc522_dev_s *dev)
+{
+  SPI_SELECT(dev->spi, SPIDEV_CONTACTLESS, false);
+}
+
+/****************************************************************************
+ * Name: mfrc522_readu8
+ *
+ * Description:
+ *   Read a byte from a register address.
+ *
+ * Input Parameters:
+ *
+ * Returned Value: the read byte from the register
+ *
+ ****************************************************************************/
+
+uint8_t mfrc522_readu8(FAR struct mfrc522_dev_s *dev, uint8_t regaddr)
+{
+  uint8_t regval;
+  uint8_t address = (0x80 | (regaddr & 0x7E));
+
+  mfrc522_lock(dev->spi);
+  mfrc522_select(dev);
+  SPI_SEND(dev->spi, address);
+  regval = SPI_SEND(dev->spi, 0);
+  mfrc522_deselect(dev);
+  mfrc522_unlock(dev->spi);
+
+  tracerx("read", regval, 1);
+  return regval;
+}
+
+/****************************************************************************
+ * Name: mfrc522_write8
+ *
+ * Description:
+ *   Write a byte to a register address.
+ *
+ * Input Parameters:
+ *
+ * Returned Value:
+ *
+ ****************************************************************************/
+
+void mfrc522_writeu8(FAR struct mfrc522_dev_s *dev, uint8_t regaddr,
+                     FAR uint8_t regval)
+{
+  mfrc522_lock(dev->spi);
+  mfrc522_select(dev);
+  SPI_SEND(dev->spi, regaddr & 0x7E);
+  SPI_SEND(dev->spi, regval);
+  mfrc522_deselect(dev);
+  mfrc522_unlock(dev->spi);
+
+  tracerx("write", ®val, 1);
+}
+
+/****************************************************************************
+ * Name: mfrc522_readblk
+ *
+ * Description:
+ *   Read a block of bytes from a register address. Align the bit positions of
+ * regval[0] from rxalign..7.
+ *
+ * Input Parameters:
+ *
+ * Returned Value: none
+ *
+ ****************************************************************************/
+
+void mfrc522_readblk(FAR struct mfrc522_dev_s *dev, uint8_t regaddr,
+                     FAR uint8_t *regval, int length, uint8_t rxalign)
+{
+  uint8_t i = 0;
+  uint8_t address = (0x80 | (regaddr & 0x7E));
+
+  mfrc522_lock(dev->spi);
+  mfrc522_select(dev);
+
+  /* Inform the MFRC522 the address we want to read */
+
+  SPI_SEND(dev->spi, address);
+
+  while (i < length)
+    {
+      if (i == 0 && rxalign)
+        {
+          uint8_t mask = 0;
+          uint8_t value;
+          uint8_t j;
+
+          for (j = rxalign; j <= 7; j++)
+            {
+              mask |= (1 << j);
+            }
+
+          /* Read the first byte */
+
+          value = SPI_SEND(dev->spi, address);
+
+          /* Apply mask to current regval[0] with the read value */
+
+          regval[0] = (regval[0] & ~mask) | (value & mask);
+        }
+      else
+        {
+          /* Read the remaining bytes */
+
+          regval[i] = SPI_SEND(dev->spi, address);
+        }
+      i++;
+    }
+
+  /* Read the last byte. Send 0 to stop reading (it maybe wrong, 1 byte out) */
+
+  regval[i] = SPI_SEND(dev->spi, 0);
+
+  mfrc522_deselect(dev);
+  mfrc522_unlock(dev->spi);
+
+  tracerx("readblk", regval, size);
+}
+
+/****************************************************************************
+ * Name: mfrc522_writeblk
+ *
+ * Description:
+ *   Write a block of bytes to a register address.
+ *
+ * Input Parameters:
+ *
+ * Returned Value: none
+ *
+ ****************************************************************************/
+
+void mfrc522_writeblk(FAR struct mfrc522_dev_s *dev, uint8_t regaddr,
+                      uint8_t *regval, int length)
+{
+  uint8_t address = (regaddr & 0x7E);
+
+  mfrc522_lock(dev->spi);
+  mfrc522_select(dev);
+
+  /* Inform the MFRC522 the address we want write to */
+
+  SPI_SEND(dev->spi, address);
+
+  /* Send the block of bytes */
+
+  SPI_SNDBLOCK(dev->spi, regval, length);
+
+  mfrc522_deselect(dev);
+  mfrc522_unlock(dev->spi);
+
+  tracerx("writeblk", regval, size);
+}
+
+/****************************************************************************
+ * Name: mfrc522_calc_crc
+ *
+ * Description:
+ *   Use the CRC coprocessor in the MFRC522 to calculate a CRC_A.
+ *
+ * Input Parameters:
+ *
+ * Returned Value: OK or -ETIMEDOUT
+ *
+ ****************************************************************************/
+
+int mfrc522_calc_crc(FAR struct mfrc522_dev_s *dev, uint8_t *buffer,
+                     int length, uint8_t *result)
+{
+  struct timespec tstart;
+  struct timespec tend;
+
+  /* Stop any command in execution */
+
+  mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_IDLE_CMD);
+
+  /* Clear the CRCIRq interrupt request bit */
+
+  mfrc522_writeu8(dev, MFRC522_DIV_IRQ_REG, MFRC522_CRC_IRQ);
+
+  /* Flush all bytes in the FIFO */
+
+  mfrc522_writeu8(dev, MFRC522_FIFO_LEVEL_REG, MFRC522_FLUSH_BUFFER);
+
+  /* Write data to the FIFO */
+
+  mfrc522_writeblk(dev, MFRC522_FIFO_DATA_REG, buffer, length);
+
+  /* Start the calculation */
+
+  mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_CALC_CRC_CMD);
+
+  /* Wait for CRC completion or 200ms time-out */
+
+  clock_gettime(CLOCK_REALTIME, &tstart);
+  tstart.tv_nsec += 200000;
+  if (tstart.tv_nsec >= 1000 * 1000 * 1000)
+    {
+      tstart.tv_sec++;
+      tstart.tv_nsec -= 1000 * 1000 * 1000;
+    }
+
+  while(1)
+    {
+      uint8_t irqreg;
+
+      irqreg = mfrc522_readu8(dev, MFRC522_DIV_IRQ_REG);
+      if ( irqreg & MFRC522_CRC_IRQ)
+        {
+          break;
+        }
+
+      /* Get time now */
+
+      clock_gettime(CLOCK_REALTIME, &tend);
+
+      if ((tend.tv_sec > tstart.tv_sec) && (tend.tv_nsec > tstart.tv_nsec))
+        {
+          return -ETIMEDOUT;
+        }
+    }
+
+  /* Stop calculating CRC for new content of FIFO */
+
+  mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_IDLE_CMD);
+
+  result[0] = mfrc522_readu8(dev, MFRC522_CRC_RESULT_REGL);
+  result[1] = mfrc522_readu8(dev, MFRC522_CRC_RESULT_REGH);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: mfrc522_comm_picc
+ *
+ * Description:
+ *   Transfers data to the MFRC522 FIFO, executes a command, waits for
+ * completion and transfers data back from the FIFO.
+ * CRC validation can only be done if back_data and back_len are specified.
+ *
+ * Input Parameters:
+ *
+ * Returned Value: OK or -ETIMEDOUT
+ *
+ ****************************************************************************/
+
+int mfrc522_comm_picc(FAR struct mfrc522_dev_s *dev, uint8_t command,
+                      uint8_t waitirq, uint8_t *send_data, uint8_t send_len,
+                      uint8_t *back_data, uint8_t *back_len,
+                      uint8_t *validbits, uint8_t rxalign, bool checkcrc)
+{
+  int ret;
+  uint8_t errors;
+  uint8_t vbits;
+  uint8_t value;
+  struct timespec tstart;
+  struct timespec tend;
+
+  /* Prepare values for BitFramingReg */
+
+  uint8_t txlastbits = validbits ? *validbits : 0;
+  uint8_t bitframing = (rxalign << 4) + txlastbits;
+
+  /* Stop any active command */
+
+  mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_IDLE_CMD);
+
+  /* Clear all seven interrupt request bits */
+
+  value = mfrc522_readu8(dev, MFRC522_COM_IRQ_REG);
+  mfrc522_writeu8(dev, MFRC522_COM_IRQ_REG, value | MFRC522_COM_IRQ_MASK);
+
+  /* Flush all bytes in the FIFO */
+
+  mfrc522_writeu8(dev, MFRC522_FIFO_LEVEL_REG, MFRC522_FLUSH_BUFFER);
+
+  /* Write data to FIFO */
+
+  mfrc522_writeblk(dev, MFRC522_FIFO_DATA_REG, send_data, send_len);
+
+  /* Bit adjustments */
+
+  mfrc522_writeu8(dev, MFRC522_BIT_FRAMING_REG, bitframing);
+
+  /* Execute command */
+
+  mfrc522_writeu8(dev, MFRC522_COMMAND_REG, command);
+
+  /* We setup the TAuto flag in the mfrc522_init() then we could use the
+   * internal MFC522 Timer to detect timeout, but because there could be some
+   * hardware fault, let us to use a NuttX timeout as well.
+   */
+
+  clock_gettime(CLOCK_REALTIME, &tstart);
+  tstart.tv_nsec += 200000;
+  if (tstart.tv_nsec >= 1000 * 1000 * 1000)
+    {
+      tstart.tv_sec++;
+      tstart.tv_nsec -= 1000 * 1000 * 1000;
+    }
+
+  /* If it is a Transceive command, then start transmittion */
+
+  if (command == MFRC522_TRANSCV_CMD)
+    {
+      value = mfrc522_readu8(dev, MFRC522_BIT_FRAMING_REG);
+      mfrc522_writeu8(dev, MFRC522_BIT_FRAMING_REG, value | MFRC522_START_SEND);
+    }
+
+  /* Wait for the command to complete */
+
+  while (1)
+    {
+      uint8_t irqsreg;
+
+      irqsreg = mfrc522_readu8(dev, MFRC522_COM_IRQ_REG);
+
+      /* If at least an of selected IRQ happened */
+
+      if (irqsreg & waitirq)
+        {
+          break;
+        }
+
+      /* Timer expired */
+
+      if (irqsreg & MFRC522_TIMER_IRQ)
+        {
+          return -ETIMEDOUT;
+        }
+
+      /* Get time now */
+
+      clock_gettime(CLOCK_REALTIME, &tend);
+
+      if ((tend.tv_sec > tstart.tv_sec) && (tend.tv_nsec > tstart.tv_nsec))
+        {
+          return -ETIMEDOUT;
+        }
+    }
+
+  /* Read error register to verify if there are any issue */
+
+  errors = mfrc522_readu8(dev, MFRC522_ERROR_REG);
+
+  /* Check for Protocol error */
+
+  if (errors & (MFRC522_PROTO_ERR))
+    {
+      return -EPROTO;
+    }
+
+  /* Check for Parity and Buffer Overflow errors */
+
+  if (errors & (MFRC522_PARITY_ERR | MFRC522_BUF_OVFL_ERR))
+    {
+      return -EIO;
+    }
+
+  /* Check collision error */
+
+  if (errors & MFRC522_COLL_ERR)
+    {
+      return -EBUSY;            /* should it be EAGAIN ? */
+    }
+
+  /* If the caller wants data back, get it from the MFRC522 */
+
+  if (back_data && back_len)
+    {
+      uint8_t nbytes;
+
+      /* Number of bytes in the FIFO */
+
+      nbytes = mfrc522_readu8(dev, MFRC522_FIFO_LEVEL_REG);
+
+      /* Returned more bytes than the expected */
+
+      if (nbytes > *back_len)
+        {
+          return -ENOMEM;
+        }
+
+      *back_len = nbytes;
+
+      /* Read the data from FIFO */
+
+      mfrc522_readblk(dev, MFRC522_FIFO_DATA_REG, back_data, nbytes, rxalign);
+
+      /* RxLastBits[2:0] indicates the number of valid bits received */
+
+      vbits = mfrc522_readu8(dev, MFRC522_CONTROL_REG)
+              & MFRC522_RX_LAST_BITS_MASK;
+
+      if (validbits)
+        {
+          *validbits = vbits;
+        }
+    }
+
+  /* Perform CRC_A validation if requested */
+
+  if (back_data && back_len && checkcrc)
+    {
+      uint8_t ctrlbuf[2];
+
+      /* In this case a MIFARE Classic NAK is not OK */
+
+      if (*back_len == 1 && vbits == 4)
+        {
+          return -EACCES;
+        }
+
+      /* We need the CRC_A value or all 8 bits of the last byte */
+
+      if (*back_len < 2 || vbits != 0)
+        {
+          return -EPERM;
+        }
+
+      /* Verify CRC_A */
+
+      ret = mfrc522_calc_crc(dev, &back_data[0], *back_len - 2, &ctrlbuf[0]);
+      if (ret != OK)
+        {
+          return ret;
+        }
+
+      if ((back_data[*back_len - 2] != ctrlbuf[0]) ||
+          (back_data[*back_len - 1] != ctrlbuf[1]))
+        {
+          return -EFAULT;
+        }
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: mfrc522_transcv_data
+ *
+ * Description:
+ *   Executes the Transceive command
+ *
+ * Input Parameters:
+ *
+ * Returned Value: OK or -ETIMEDOUT
+ *
+ ****************************************************************************/
+
+int mfrc522_transcv_data(FAR struct mfrc522_dev_s *dev, uint8_t *senddata,
+                         uint8_t sendlen, uint8_t *backdata, uint8_t *backlen,
+                         uint8_t *validbits, uint8_t rxalign, bool check_crc)
+{
+  uint8_t waitirq = MFRC522_RX_IRQ | MFRC522_IDLE_IRQ;
+
+  return mfrc522_comm_picc(dev, MFRC522_TRANSCV_CMD, waitirq, senddata,
+                           sendlen, backdata, backlen, validbits, rxalign,
+                           check_crc);
+}
+
+/****************************************************************************
+ * Name: mfrc522_picc_reqa_wupa
+ *
+ * Description:
+ *   Transmits REQA or WUPA commands
+ *
+ * Input Parameters:
+ *
+ * Returned Value: OK or -ETIMEDOUT
+ *
+ ****************************************************************************/
+
+int mfrc522_picc_reqa_wupa(FAR struct mfrc522_dev_s *dev, uint8_t command,
+                           uint8_t *buffer, uint8_t length)
+{
+  uint8_t validbits;
+  uint8_t value;
+  int status;
+
+  if (!buffer || length < 2)
+    {
+      return -EINVAL;
+    }
+
+  /* Force clear of received bits if a collision is detected */
+
+  value = mfrc522_readu8(dev, MFRC522_COLL_REG);
+  mfrc522_writeu8(dev, MFRC522_COLL_REG, value & MFRC522_VALUES_AFTER_COLL);
+
+  validbits = 7;
+  status = mfrc522_transcv_data(dev, &command, 1, buffer, &length, &validbits,
+                                0, false);
+
+  /* For REQA and WUPA we need to transmit only 7 bits */
+
+  if (status != OK)
+    {
+      return status;
+    }
+
+  /* ATQA must be exactly 16 bits */
+
+  if (length != 2 || validbits != 0)
+    {
+      return -EAGAIN;
+    }
+
+  mfrc522info("buffer[0]=0x%02X | buffer[1]=0x%02X\n", buffer[0], buffer[1]);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: mfrc522_picc_request_a
+ *
+ * Description:
+ *   Transmits a REQuest command, Type A. Invites PICCs in state IDLE to go to
+ * READY and prepare for anticollision or selection.
+ *
+ * Input Parameters:
+ *
+ * Returned Value: OK or -ETIMEDOUT
+ *
+ ****************************************************************************/
+
+int mfrc522_picc_request_a(FAR struct mfrc522_dev_s *dev, uint8_t *buffer,
+                           uint8_t length)
+{
+  return mfrc522_picc_reqa_wupa(dev, PICC_CMD_REQA, buffer, length);
+}
+
+/****************************************************************************
+ * Name: mfrc522_picc_detect
+ *
+ * Description:
+ *   Detects if a Contactless Card is near
+ *
+ * Input Parameters:
+ *
+ * Returned Value: OK or -ETIMEDOUT
+ *
+ ****************************************************************************/
+
+int mfrc522_picc_detect(FAR struct mfrc522_dev_s *dev)
+{
+  int ret;
+  uint8_t buffer_atqa[2];
+  uint8_t length = sizeof(buffer_atqa);
+
+  /* Send a REQA command */
+
+  ret = mfrc522_picc_request_a(dev, buffer_atqa, length);
+  return (ret == OK || ret == -EBUSY);
+}
+
+/****************************************************************************
+ * Name: mfrc522_picc_select
+ *
+ * Description:
+ *   Selects a near Card and read its UID.
+ *
+ * Input Parameters:
+ *
+ * Returned Value: OK or -ETIMEDOUT
+ *
+ ****************************************************************************/
+
+int mfrc522_picc_select(FAR struct mfrc522_dev_s *dev,
+                        FAR struct picc_uid_s *uid, uint8_t validbits)
+{
+  bool uid_complete;
+  bool select_done;
+  bool use_cascade_tag;
+  uint8_t cascade_level = 1;
+  int result;
+  uint8_t i;
+  uint8_t value;
+  uint8_t count;
+
+  /* The first index in uid->data[] that is used in the current Cascade Level */
+
+  uint8_t uid_index;
+
+  /* The number of known UID bits in the current Cascade Level. */
+
+  uint8_t curr_level_known_bits;
+
+  /* The SELECT/ANTICOLLISION uses a 7 byte standard frame + 2 bytes CRC_A */
+
+  uint8_t buffer[9];
+
+  /* The number of bytes used in the buffer, number bytes on FIFO */
+
+  uint8_t buffer_used;
+
+  /* Used to defines the bit position for the first bit received */
+
+  uint8_t rxalign;
+
+  /* The number of valid bits in the last transmitted byte. */
+
+  uint8_t txlastbits;
+
+  uint8_t *resp_buf;
+  uint8_t resp_len;
+
+  /* Sanity check */
+
+  if (validbits > 80)
+    {
+      return -EINVAL;
+    }
+
+  /* Force clear of received bits if a collision is detected */
+
+  value = mfrc522_readu8(dev, MFRC522_COLL_REG);
+  mfrc522_writeu8(dev, MFRC522_COLL_REG, value & MFRC522_VALUES_AFTER_COLL);
+
+  /* Repeat cascade level loop until we have a complete UID */
+
+  uid_complete = false;
+  while (!uid_complete)
+    {
+      uint8_t bytes_to_copy;
+
+      /* Set the Cascade Level in the SEL byte, find out if we need to use the
+       * Cascade Tag in byte 2.
+       */
+
+      switch (cascade_level)
+        {
+        case 1:
+          buffer[0] = PICC_CMD_SEL_CL1;
+          uid_index = 0;
+
+          /* When we know that the UID has more than 4 bytes */
+
+          use_cascade_tag = validbits && (uid->size > 4);
+          break;
+
+        case 2:
+          buffer[0] = PICC_CMD_SEL_CL2;
+          uid_index = 3;
+
+          /* When we know that the UID has more than 7 bytes */
+
+          use_cascade_tag = validbits && (uid->size > 7);
+          break;
+
+        case 3:
+          buffer[0] = PICC_CMD_SEL_CL3;
+          uid_index = 6;
+          use_cascade_tag = false;
+          break;
+
+        default:
+          return -EIO;          /* Internal error */
+        }
+
+      /* How many UID bits are known in this Cascade Level? */
+
+      curr_level_known_bits = validbits - (8 * uid_index);
+      if (curr_level_known_bits < 0)
+        {
+          curr_level_known_bits = 0;
+        }
+
+      /* Copy the known bits from uid->uid_data[] to buffer[] */
+
+      i = 2;                    /* destination index in buffer[] */
+      if (use_cascade_tag)
+        {
+          buffer[i++] = PICC_CMD_CT;
+        }
+
+      /* Number of bytes needed to represent the known bits for this level */
+
+      bytes_to_copy = curr_level_known_bits / 8 +
+                      (curr_level_known_bits % 8 ? 1 : 0);
+
+      if (bytes_to_copy)
+        {
+          /* Max 4 bytes in each Cascade Level. Only 3 left if we use the
+           * Cascade Tag.
+           */
+
+          uint8_t max_bytes = use_cascade_tag ? 3 : 4;
+
+          if (bytes_to_copy > max_bytes)
+            {
+              bytes_to_copy = max_bytes;
+            }
+
+          for (count = 0; count < bytes_to_copy; count++)
+            {
+              buffer[i++] = uid->uid_data[uid_index + count];
+            }
+        }
+
+      /* Now that the data has been copied we need to include the 8 bits in CT
+       * in curr_level_known_bits.
+       */
+
+      if (use_cascade_tag)
+        {
+          curr_level_known_bits += 8;
+        }
+
+      /* Repeat anti collision loop until we can transmit all UID bits + BCC
+       * and receive a SAK - max 32 iterations.
+       */
+
+      select_done = false;
+      while (!select_done)
+        {
+          /* Find out how many bits and bytes to send and receive. */
+
+          if (curr_level_known_bits >= 32)
+            {
+              /* All UID bits in this Cascade Level are known. This is a
+               * SELECT.
+               */
+
+              /* NVB - Number of Valid Bits: Seven whole bytes */
+
+              buffer[1] = 0x70;
+
+              /* Calculate BCC - Block Check Character */
+
+              buffer[6] = buffer[2] ^ buffer[3] ^ buffer[4] ^ buffer[5];
+
+              /* Calculate CRC_A */
+
+              result = mfrc522_calc_crc(dev, buffer, 7, &buffer[7]);
+              if (result != OK)
+                {
+                  return result;
+                }
+
+              txlastbits = 0;   /* 0 => All 8 bits are valid. */
+              buffer_used = 9;
+
+              /* Store response in the last 3 bytes of buffer (BCC and CRC_A -
+               * not needed after tx).
+               */
+
+              resp_buf = &buffer[6];
+              resp_len = 3;
+            }
+          else
+            {
+              /* This is an ANTICOLLISION */
+
+              txlastbits = curr_level_known_bits % 8;
+
+              /* Number of whole bytes in the UID part. */
+
+              count = curr_level_known_bits / 8;
+              i = 2 + count;
+
+              /* NVB - Number of Valid Bits */
+
+              buffer[1] = (i << 4) + txlastbits;
+              buffer_used = i + (txlastbits ? 1 : 0);
+
+              /* Store response in the unused part of buffer */
+
+              resp_buf = &buffer[i];
+              resp_len = sizeof(buffer) - i;
+            }
+
+          /* Set bit adjustments */
+
+          rxalign = txlastbits;
+          mfrc522_writeu8(dev, MFRC522_BIT_FRAMING_REG,
+                          (rxalign << 4) + txlastbits);
+
+          /* Transmit the buffer and receive the response */
+
+          result = mfrc522_transcv_data(dev, buffer, buffer_used, resp_buf,
+                                        &resp_len, &txlastbits, rxalign, false);
+
+          /* More than one PICC in the field => collision */
+
+          if (result == -EBUSY)
+            {
+              uint8_t coll_pos;
+              uint8_t coll_reg = mfrc522_readu8(dev, MFRC522_COLL_REG);
+
+              /* CollPosNotValid */
+
+              if (coll_reg & 0x20)
+                {
+                  /* Without a valid collision position we cannot continue */
+
+                  return -EBUSY;
+                }
+
+              coll_pos = coll_reg & 0x1F; /* Values 0-31, 0 means bit 32. */
+              if (coll_pos == 0)
+                {
+                  coll_pos = 32;
+                }
+
+              if (coll_pos <= curr_level_known_bits)
+                {
+                  /* No progress - should not happen */
+
+                  return -EIO;
+                }
+
+              /* Choose the PICC with the bit set. */
+
+              curr_level_known_bits = coll_pos;
+
+              /* The bit to modify */
+
+              count = (curr_level_known_bits - 1) % 8;
+
+              /* First byte is index 0. */
+
+              i = 1 + (curr_level_known_bits / 8) + (count ? 1 : 0);
+              buffer[i] |= (1 << count);
+            }
+          else if (result != OK)
+            {
+              return result;
+            }
+          else                  /* OK */
+            {
+              /* This was a SELECT. */
+
+              if (curr_level_known_bits >= 32)
+                {
+                  /* No more collision */
+
+                  select_done = true;
+                }
+              else
+                {
+                  /* This was an ANTICOLLISION. */
+                  /* We have all 32 bits of the UID in this Cascade Level */
+
+                  curr_level_known_bits = 32;
+
+                  /* Run loop again to do the SELECT */
+                }
+            }
+        }
+
+      /* We do not check the CBB - it was constructed by us above. */
+      /* Copy the found UID bytes from buffer[] to uid->uid_data[] */
+
+      i = (buffer[2] == PICC_CMD_CT) ? 3 : 2;   /* source index in buffer[] */
+      bytes_to_copy = (buffer[2] == PICC_CMD_CT) ? 3 : 4;
+
+      for (count = 0; count < bytes_to_copy; count++)
+        {
+          uid->uid_data[uid_index + count] = buffer[i++];
+        }
+
+      /* Check response SAK (Select Acknowledge) */
+
+      if (resp_len != 3 || txlastbits != 0)
+        {
+          /* SAK must be exactly 24 bits (1 byte + CRC_A). */
+
+          return -EIO;
+        }
+
+      /* Verify CRC_A - do our own calculation and store the control in
+       * buffer[2..3] - those bytes are not needed anymore.
+       */
+
+      result = mfrc522_calc_crc(dev, resp_buf, 1, &buffer[2]);
+      if (result != OK)
+        {
+          return result;
+        }
+
+      /* Is it correct */
+
+      if ((buffer[2] != resp_buf[1]) || (buffer[3] != resp_buf[2]))
+        {
+          return -EINVAL;
+        }
+
+      /* Cascade bit set - UID not complete yes */
+
+      if (resp_buf[0] & 0x04)
+        {
+          cascade_level++;
+        }
+      else
+        {
+          uid_complete = true;
+          uid->sak = resp_buf[0];
+        }
+    }
+
+  /* Set correct uid->size */
+
+  uid->size = 3 * cascade_level + 1;
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: mfrc522_softreset
+ *
+ * Description:
+ *   Send a software reset command
+ *
+ * Input Parameters: a pointer to mfrc522_dev_s structure
+ *
+ * Returned Value: none
+ *
+ ****************************************************************************/
+
+void mfrc522_softreset(FAR struct mfrc522_dev_s *dev)
+{
+  /* Send a software reset command */
+
+  mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_SOFTRST_CMD);
+
+  /* Wait the internal state machine to initialize */
+
+  usleep(50000);
+
+  /* Wait for the PowerDown bit in COMMAND_REG to be cleared */
+
+  while (mfrc522_readu8(dev, MFRC522_COMMAND_REG) & MFRC522_POWER_DOWN);
+}
+
+/****************************************************************************
+ * Name: mfrc522_enableantenna
+ *
+ * Description:
+ *   Turns the antenna on by enabling the pins TX1 and TX2
+ *
+ * Input Parameters: a pointer to mfrc522_dev_s structure
+ *
+ * Returned Value: none
+ *
+ ****************************************************************************/
+
+void mfrc522_enableantenna(FAR struct mfrc522_dev_s *dev)
+{
+  uint8_t value = mfrc522_readu8(dev, MFRC522_TX_CTRL_REG);
+
+  if ((value & (MFRC522_TX1_RF_EN | MFRC522_TX2_RF_EN)) != 0x03)
+    {
+      mfrc522_writeu8(dev, MFRC522_TX_CTRL_REG, value | 0x03);
+    }
+}
+
+/****************************************************************************
+ * Name: mfrc522_disableantenna
+ *
+ * Description:
+ *   Turns the antenna off cutting the signals on TX1 and TX2
+ *
+ * Input Parameters: a pointer to mfrc522_dev_s structure
+ *
+ * Returned Value: none
+ *
+ ****************************************************************************/
+
+void mfrc522_disableantenna(FAR struct mfrc522_dev_s *dev)
+{
+  uint8_t value = mfrc522_readu8(dev, MFRC522_TX_CTRL_REG);
+
+  value &= ~(MFRC522_TX1_RF_EN | MFRC522_TX2_RF_EN);
+  mfrc522_writeu8(dev, MFRC522_TX_CTRL_REG, value);
+}
+
+/****************************************************************************
+ * Name: mfrc522_getfwversion
+ *
+ * Description:
+ *   Read the MFRC522 firmware version.
+ *
+ * Input Parameters: a pointer to mfrc522_dev_s structure
+ *
+ * Returned Value: the firmware version byte
+ *
+ ****************************************************************************/
+
+uint8_t mfrc522_getfwversion(FAR struct mfrc522_dev_s *dev)
+{
+  return mfrc522_readu8(dev, MFRC522_VERSION_REG);
+}
+
+/****************************************************************************
+ * Name: mfrc522_getantennagain
+ *
+ * Description:
+ *   Read the MFRC522 receiver gain (RxGain).
+ * See 9.3.3.6 / table 98 in MFRC522 datasheet.
+ *
+ * Input Parameters: a pointer to mfrc522_dev_s structure
+ *
+ * Returned Value: none
+ *
+ ****************************************************************************/
+
+uint8_t mfrc522_getantennagain(FAR struct mfrc522_dev_s *dev)
+{
+  return mfrc522_readu8(dev, MFRC522_RF_CFG_REG) & MFRC522_RX_GAIN_MASK;
+}
+
+/****************************************************************************
+ * Name: mfrc522_setantennagain
+ *
+ * Description:
+ *   Set the MFRC522 receiver gain (RxGain) to value value specified in mask.
+ * See 9.3.3.6 / table 98 in MFRC522 datasheet.
+ *
+ * Input Parameters: a pointer to mfrc522_dev_s structure
+ *
+ * Returned Value: none
+ *
+ ****************************************************************************/
+
+void mfrc522_setantennagain(FAR struct mfrc522_dev_s *dev, uint8_t mask)
+{
+  uint8_t value;
+
+  if ((value = mfrc522_getantennagain(dev)) != mask)
+    {
+      mfrc522_writeu8(dev, MFRC522_RF_CFG_REG, value & ~MFRC522_RX_GAIN_MASK);
+      mfrc522_writeu8(dev, MFRC522_RF_CFG_REG, mask & MFRC522_RX_GAIN_MASK);
+    }
+}
+
+/****************************************************************************
+ * Name: mfrc522_init
+ *
+ * Description:
+ *   Initializes the MFRC522 chip
+ *
+ * Input Parameters: a pointer to mfrc522_dev_s structure
+ *
+ * Returned Value: none
+ *
+ ****************************************************************************/
+
+void mfrc522_init(FAR struct mfrc522_dev_s *dev)
+{
+  /* Force a reset */
+
+  mfrc522_softreset(dev);
+
+  /* We need a timeout if something when communicating with a TAG case
+   * something goes wrong. f_timer = 13.56 MHz / (2*TPreScaler+1) where:
+   * TPreScaler = [TPrescaler_Hi:Tprescaler_Lo]. Tprescaler_Hi are the four
+   * low bits in TmodeReg. Tprescaler_Lo is on TPrescalerReg.
+   *
+   * TAuto=1; timer starts automatically at the end of the transmission in
+   * all communication modes at all speeds.
+   */
+
+  mfrc522_writeu8(dev, MFRC522_TMODE_REG, MFRC522_TAUTO);
+
+  /* TPreScaler = TModeReg[3..0]:TPrescalerReg, ie: 0x0A9 = 169 =>
+   * f_timer=40kHz, then the timer period will be 25us.
+   */
+
+  mfrc522_writeu8(dev, MFRC522_TPRESCALER_REG, 0xA9);
+
+  /* Reload timer with 0x3E8 = 1000, ie 25ms before timeout. */
+
+  mfrc522_writeu8(dev, MFRC522_TRELOAD_REGH, 0x06);
+  mfrc522_writeu8(dev, MFRC522_TRELOAD_REGL, 0xE8);
+
+  /* Force 100% ASK modulation independent of the ModGsPReg setting */
+
+  mfrc522_writeu8(dev, MFRC522_TX_ASK_REG, MFRC522_FORCE_100ASK);
+
+  /* Set the preset value for the CRC to 0x6363 (ISO 14443-3 part 6.2.4) */
+
+  mfrc522_writeu8(dev, MFRC522_MODE_REG, 0x3D);
+
+  /* Enable the Antenna pins */
+
+  mfrc522_enableantenna(dev);
+}
+
+/****************************************************************************
+ * Name: mfrc522_selftest
+ *
+ * Description:
+ *   Executes a self-test of the MFRC522 chip
+ *
+ * See 16.1.1 in the MFRC522 datasheet
+ *
+ * Input Parameters: a pointer to mfrc522_dev_s structure
+ *
+ * Returned Value: none
+ *
+ ****************************************************************************/
+
+int mfrc522_selftest(FAR struct mfrc522_dev_s *dev)
+{
+  uint8_t i;
+  uint8_t result[64];
+  uint8_t zeros[25] = {0, 0, 0, 0, 0,
+                       0, 0, 0, 0, 0,
+                       0, 0, 0, 0, 0,
+                       0, 0, 0, 0, 0,
+                       0, 0, 0, 0, 0};
+
+  /* Execute a software reset */
+
+  mfrc522_softreset(dev);
+
+  /* Flush the FIFO buffer */
+
+  mfrc522_writeu8(dev, MFRC522_FIFO_LEVEL_REG, MFRC522_FLUSH_BUFFER);
+
+  /* Clear the internal buffer by writing 25 bytes 0x00 */
+
+  mfrc522_writeblk(dev, MFRC522_FIFO_DATA_REG, zeros, 25);
+
+  /* Transfer to internal buffer */
+
+  mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_MEM_CMD);
+
+  /* Enable self-test */
+
+  mfrc522_writeu8(dev, MFRC522_AUTOTEST_REG, MFRC522_SELFTEST_EN);
+
+  /* Write 0x00 to FIFO buffer */
+
+  mfrc522_writeu8(dev, MFRC522_FIFO_DATA_REG, 0x00);
+
+  /* Start self-test by issuing the CalcCRC command */
+
+  mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_CALC_CRC_CMD);
+
+  /* Wait for self-test to complete */
+
+  for (i = 0; i < 255; i++)
+    {
+      uint8_t n;
+
+      n = mfrc522_readu8(dev, MFRC522_DIV_IRQ_REG);
+      if (n & MFRC522_CRC_IRQ)
+        {
+          break;
+        }
+    }
+
+  /* Stop calculating CRC for new content in the FIFO */
+
+  mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_IDLE_CMD);
+
+  /* Read out the 64 bytes result from the FIFO buffer */
+
+  mfrc522_readblk(dev, MFRC522_FIFO_DATA_REG, result, 64, 0);
+
+  /* Self-test done. Reset AutoTestReg register to normal operation */
+
+  mfrc522_writeu8(dev, MFRC522_AUTOTEST_REG, 0x00);
+
+  mfrc522info("Self Test Result:\n");
+  for (i = 1; i <= 64; i++)
+    {
+      printf("0x%02X ", result[i - 1]);
+
+      if ((i % 8) == 0)
+        {
+          printf("\n");
+        }
+    }
+
+  mfrc522info("Done!\n");
+  return OK;
+}
+
+/****************************************************************************
+ * Name: mfrc522_open
+ *
+ * Description:
+ *   This function is called whenever the MFRC522 device is opened.
+ *
+ ****************************************************************************/
+
+static int mfrc522_open(FAR struct file *filep)
+{
+  FAR struct inode *inode;
+  FAR struct mfrc522_dev_s *dev;
+
+  DEBUGASSERT(filep);
+  inode = filep->f_inode;
+
+  DEBUGASSERT(inode && inode->i_private);
+  dev = inode->i_private;
+
+  mfrc522_configspi(dev->spi);
+
+  usleep(10000);
+
+  mfrc522_getfwversion(dev);
+
+  dev->state = MFRC522_STATE_IDLE;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: mfrc522_close
+ *
+ * Description:
+ *   This routine is called when the MFRC522 device is closed.
+ *
+ ****************************************************************************/
+
+static int mfrc522_close(FAR struct file *filep)
+{
+  FAR struct inode *inode;
+  FAR struct mfrc522_dev_s *dev;
+
+  DEBUGASSERT(filep);
+  inode = filep->f_inode;
+
+  DEBUGASSERT(inode && inode->i_private);
+  dev = inode->i_private;
+
+  dev->state = MFRC522_STATE_NOT_INIT;
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: mfrc522_read
+ *
+ * Description:
+ *   This routine is called when the device is read.
+ *
+ * Returns TAG id as string to buffer.
+ * or -EIO if no TAG found
+ *
+ ****************************************************************************/
+
+static ssize_t mfrc522_read(FAR struct file *filep, FAR char *buffer,
+                            size_t buflen)
+{
+  FAR struct inode *inode;
+  FAR struct mfrc522_dev_s *dev;
+  FAR struct picc_uid_s uid;
+
+  DEBUGASSERT(filep);
+  inode = filep->f_inode;
+
+  DEBUGASSERT(inode && inode->i_private);
+  dev = inode->i_private;
+
+  /* Is a card near? */
+
+  if (!mfrc522_picc_detect(dev))
+    {
+      mfrc522err("Card is not present!\n");
+      return -EAGAIN;
+    }
+
+  /* Now read the UID */
+
+  mfrc522_picc_select(dev, &uid, 0);
+
+  if (uid.sak != 0)
+    {
+      if (buffer)
+        {
+          snprintf(buffer, buflen, "0x%02X%02X%02X%02X",
+                   uid.uid_data[0], uid.uid_data[1],
+                   uid.uid_data[2], uid.uid_data[3]);
+          return buflen;
+        }
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: mfrc522_write
+ ****************************************************************************/
+
+static ssize_t mfrc522_write(FAR struct file *filep, FAR const char *buffer,
+                             size_t buflen)
+{
+  FAR struct inode *inode;
+  FAR struct mfrc522_dev_s *dev;
+
+  DEBUGASSERT(filep);
+  inode = filep->f_inode;
+
+  DEBUGASSERT(inode && inode->i_private);
+  dev = inode->i_private;
+
+  (void)dev;
+
+  return -ENOSYS;
+}
+
+/****************************************************************************
+ * Name: mfrc522_ioctl
+ ****************************************************************************/
+
+static int mfrc522_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
+{
+  FAR struct inode *inode;
+  FAR struct mfrc522_dev_s *dev;
+  int ret = OK;
+
+  DEBUGASSERT(filep);
+  inode = filep->f_inode;
+
+  DEBUGASSERT(inode && inode->i_private);
+  dev = inode->i_private;
+
+  switch (cmd)
+    {
+    case MFRC522IOC_GET_PICC_UID:
+      {
+        struct picc_uid_s *uid = (struct picc_uid_s *)arg;
+
+        /* Is a card near? */
+
+        if (mfrc522_picc_detect(dev))
+          {
+            ret = mfrc522_picc_select(dev, uid, 0);
+          }
+      }
+      break;
+
+    case MFRC522IOC_GET_STATE:
+      ret = dev->state;
+      break;
+
+    default:
+      mfrc522err("ERROR: Unrecognized cmd: %d\n", cmd);
+      ret = -ENOTTY;
+      break;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: mfrc522_register
+ *
+ * Description:
+ *   Register the MFRC522 character device as 'devpath'
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register.
+ *             E.g., "/dev/rfid0"
+ *   spi     - An instance of the SPI interface to use to communicate with
+ *             MFRC522.
+ *   config  - chip config
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int mfrc522_register(FAR const char *devpath, FAR struct spi_dev_s *spi)
+{
+  FAR struct mfrc522_dev_s *dev;
+  uint8_t fwver;
+  int ret = 0;
+
+  /* Initialize the MFRC522 device structure */
+
+  dev = (FAR struct mfrc522_dev_s *)kmm_malloc(sizeof(struct mfrc522_dev_s));
+  if (!dev)
+    {
+      mfrc522err("ERROR: Failed to allocate instance\n");
+      return -ENOMEM;
+    }
+
+  dev->spi = spi;
+
+  /* Device is not initialized yet */
+
+  dev->state = MFRC522_STATE_NOT_INIT;
+
+#if defined CONFIG_PM
+  dev->pm_level = PM_IDLE;
+#endif
+
+  /* mfrc522_attachirq(dev, mfrc522_irqhandler); */
+
+  /* Initialize the MFRC522 */
+
+  mfrc522_init(dev);
+
+  /* Device initialized and idle */
+
+  dev->state = MFRC522_STATE_IDLE;
+
+  /* Read the Firmware Version */
+
+  fwver = mfrc522_getfwversion(dev);
+
+  mfrc522info("MFRC522 Firmware Version: 0x%02X!\n", fwver);
+
+  /* If returned firmware version is unknown don't register the device */
+
+  if (fwver != 0x90 && fwver != 0x91 && fwver != 0x92 && fwver != 0x88 )
+    {
+      mfrc522err("None supported device detected!\n");
+      goto firmware_error;
+    }
+
+  /* Register the character driver */
+
+  ret = register_driver(devpath, &g_mfrc522fops, 0666, dev);
+  if (ret < 0)
+    {
+      mfrc522err("ERROR: Failed to register driver: %d\n", ret);
+      kmm_free(dev);
+    }
+
+  return ret;
+
+firmware_error:
+  kmm_free(dev);
+  return -ENODEV;
+}
diff --git a/drivers/contactless/mfrc522.h b/drivers/contactless/mfrc522.h
new file mode 100644
index 0000000000000000000000000000000000000000..9bc3903fd4fa21fcc11dc19eb5f4c3505e41a016
--- /dev/null
+++ b/drivers/contactless/mfrc522.h
@@ -0,0 +1,429 @@
+/****************************************************************************
+ * drivers/contactless/mfrc522.h
+ *
+ *   Copyright(C) 2016 Uniquix Ltda. All rights reserved.
+ *   Authors: Alan Carvalho de Assis 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __DRIVERS_CONTACTLESS_MFRC522_H
+#define __DRIVERS_CONTACTLESS_MFRC522_H 1
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-Processor Definitions
+ ****************************************************************************/
+
+/* The commands used by the PCD to manage communication with several PICCs
+ * (ISO 14443-3, Type A, section 6.4)
+ */
+
+#define PICC_CMD_REQA    0x26 /* REQuest command, Type A */
+#define PICC_CMD_WUPA    0x52 /* Wake-UP command, Type A */
+#define PICC_CMD_CT      0x88 /* Cascade Tag, used during anti collision. */
+#define PICC_CMD_SEL_CL1 0x93 /* Anti collision/Select, Cascade Level 1 */
+#define PICC_CMD_SEL_CL2 0x95 /* Anti collision/Select, Cascade Level 2 */
+#define PICC_CMD_SEL_CL3 0x97 /* Anti collision/Select, Cascade Level 3 */
+#define PICC_CMD_HLTA    0x50 /* HaLT command, Type A */
+
+/* The commands used for MIFARE Classic
+ * (from http://www.mouser.com/ds/2/302/MF1S503x-89574.pdf, Section 9)
+ * Use PCD_MFAuthent to authenticate access to a sector, then use these
+ * commands to read/write/modify the blocks on the sector.
+ * The read/write commands can also be used for MIFARE Ultralight.
+ */
+
+#define PICC_CMD_MF_AUTH_KEY_A  0x60 /* Perform authentication with Key A */
+#define PICC_CMD_MF_AUTH_KEY_B  0x61 /* Perform authentication with Key B */
+#define PICC_CMD_MF_READ        0x30 /* Reads one 16 byte block from auth sector */
+#define PICC_CMD_MF_WRITE       0xA0 /* Writes one 16 byte block to auth senctor */
+#define PICC_CMD_MF_DECREMENT   0xC0 /* Decrements contents of a block */
+#define PICC_CMD_MF_INCREMENT   0xC1 /* Increments contents of a block  */
+#define PICC_CMD_MF_RESTORE     0xC2 /* Reads the contents of a block */
+#define PICC_CMD_MF_TRANSFER    0xB0 /* Writes the contents of a block */
+
+/* The commands used for MIFARE Ultralight
+ * (from http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf, Section 8.6)
+ * The PICC_CMD_MF_READ/_MF_WRITE can also be used for MIFARE Ultralight.
+ */
+
+#define PICC_CMD_UL_WRITE       0xA2 /* Writes one 4 byte page to the PICC. */
+
+/* MFRC522 Registers */
+
+/* NOTE: All SPI addresses are shifted one bit left in the SPI address byte
+ * See section 8.1.2.3 from MFRC522 datasheet
+ */
+
+/* Page 0: Commands and status */
+                                             /* 0x00 - reserved for future use */
+#define MFRC522_COMMAND_REG      (0x01 << 1) /* starts/stops command execution */
+#define MFRC522_COM_IEN_REG      (0x02 << 1) /* dis/enable int. req. ctrl bits */
+#define MFRC522_DIV_IEN_REG      (0x03 << 1) /* dis/enable int. req. ctrl bits */
+#define MFRC522_COM_IRQ_REG      (0x04 << 1) /* interrupt request bits */
+#define MFRC522_DIV_IRQ_REG      (0x05 << 1) /* interrupt request bits */
+#define MFRC522_ERROR_REG        (0x06 << 1) /* error bits status of last cmd */
+#define MFRC522_STATUS1_REG      (0x07 << 1) /* communication status bits */
+#define MFRC522_STATUS2_REG      (0x08 << 1) /* rcvr and transmitter status */
+#define MFRC522_FIFO_DATA_REG    (0x09 << 1) /* input/output of FIFO buffer */
+#define MFRC522_FIFO_LEVEL_REG   (0x0A << 1) /* number of bytes stored in the FIFO */
+#define MFRC522_WATER_LEVEL_REG  (0x0B << 1) /* level for FIFO under/overflow */
+#define MFRC522_CONTROL_REG      (0x0C << 1) /* miscellaneos control register */
+#define MFRC522_BIT_FRAMING_REG  (0x0D << 1) /* adjustments for bit-oriented frames */
+#define MFRC522_COLL_REG         (0x0E << 1) /* bit position of first bit-collision detected */
+                                             /* 0x0F - reserved for future use */
+/* Page 1: Commands */
+                                             /* 0x10 - reserved for future use */
+#define MFRC522_MODE_REG         (0x11 << 1) /* defines general modes for transmit/receive */
+#define MFRC522_TX_MODE_REG      (0x12 << 1) /* defines transmission data rate and framing */
+#define MFRC522_RX_MODE_REG      (0x13 << 1) /* defines reception data rate and framing */
+#define MFRC522_TX_CTRL_REG      (0x14 << 1) /* controls antenna driver pins TX1 and TX2 */
+#define MFRC522_TX_ASK_REG       (0x15 << 1) /* controls the setting of transmission modulation */
+#define MFRC522_TX_SEL_REG       (0x16 << 1) /* selects the internal sources for antenna driver */
+#define MFRC522_RX_SEL_REG       (0x17 << 1) /* selects the internal receiver settings */
+#define MFRC522_RX_THLD_REG      (0x18 << 1) /* selects the thresholds for bit decoder */
+#define MFRC522_DEMOD_REG        (0x19 << 1) /* defines demodulator settings */
+                                             /* 0x1A - reserved for future use */
+                                             /* 0x1B - reserved for future use */
+#define MFRC522_MF_TX_REG        (0x1C << 1) /* controls some MIFARE comm tx param */
+#define MFRC522_MF_RX_REG        (0x1D << 1) /* controls some MIFARE comm rx param */
+                                             /* 0x1E - reserved for future use */
+#define MFRC522_SERIAL_SPD_REG   (0x1F << 1) /* selects the speed of the serial UART */
+
+/* Page 2: Configuration */
+                                             /* 0x20 - reserved for future use */
+#define MFRC522_CRC_RESULT_REGH  (0x21 << 1) /* shows the MSB values of CRC calc. */
+#define MFRC522_CRC_RESULT_REGL  (0x22 << 1) /* shows the LSB values of CRC calc. */
+                                             /* 0x23 - reserved for future use */
+#define MFRC522_MOD_WIDTH_REG    (0x24 << 1) /* controls the ModWidth setting */
+                                             /* 0x25 - reserved for future use */
+#define MFRC522_RF_CFG_REG       (0x26 << 1) /* configures the receiver gain */
+#define MFRC522_GSN_REG          (0x27 << 1) /* selects the conductance of n-driver TX1/2 */
+#define MFRC522_CW_GSP_REG       (0x28 << 1) /* defines the conductance of p-driver during no modulation */
+#define MFRC522_MOD_GSP_REG      (0x29 << 1) /* defines the conductance of p-driver during modulation */
+#define MFRC522_TMODE_REG        (0x2A << 1) /* defines settings for the internal timer */
+#define MFRC522_TPRESCALER_REG   (0x2B << 1) /* the lower 8 bits of TPrescaler value */
+#define MFRC522_TRELOAD_REGH     (0x2C << 1) /* defines the 16-bit timer reload value */
+#define MFRC522_TRELOAD_REGL     (0x2D << 1) /* defines the 16-bit timer reload value */
+#define MFRC522_TCOUNT_VAL_REGH  (0x2E << 1) /* shows the 16-bit timer value */
+#define MFRC522_TCOUNT_VAL_REGL  (0x2F << 1) /* shows the 16-bit timer value */
+
+/* Page 3: Test Registers */
+                                             /* 0x30 - reserved for future use */
+#define MFRC522_TEST_SEL1_REG    (0x31 << 1) /* general test signal configuration */
+#define MFRC522_TEST_SEL2_REG    (0x32 << 1) /* general test signal configuration */
+#define MFRC522_TEST_PIN_EN_REG  (0x33 << 1) /* enables pin output driver on pins D1 to D7 */
+#define MFRC522_TEST_PIN_VAL_REG (0x34 << 1) /* defines the values to D1 to D7 */
+#define MFRC522_TEST_BUS_REG     (0x35 << 1) /* shows the status of the internal test bus */
+#define MFRC522_AUTOTEST_REG     (0x36 << 1) /* controls the digital self test */
+#define MFRC522_VERSION_REG      (0x37 << 1) /* shows the software version */
+#define MFRC522_ANALOG_TEST_REG  (0x38 << 1) /* controls the pins AUX1 and AUX2 */
+#define MFRC522_TEST_DAC1_REG    (0x39 << 1) /* defines the test value for TestDAC1 */
+#define MFRC522_TEST_DAC2_REG    (0x3A << 1) /* defines the test value for TestDAC2 */
+#define MFRC522_TEST_ADC_REG     (0x3B << 1) /* show the value of ADC I and Q channels */
+
+/* Section 9.3.1.2: MFRC522 Command Register */
+
+#define MFRC522_CMD_MASK           0x0F
+#  define MFRC522_IDLE_CMD         0x00 /* no action, cancels current command execution */
+#  define MFRC522_MEM_CMD          0x01 /* stores 25 bytes into the internal buffer */
+#  define MFRC522_GEN_RND_ID_CMD   0x02 /* generates a 10-bytes random ID number */
+#  define MFRC522_CALC_CRC_CMD     0x03 /* activates the CRC coprocessor or self test */
+#  define MFRC522_TRANSMIT_CMD     0x04 /* transmits data from the FIFO buffer */
+#  define MFRC522_NO_CHANGE_CMD    0x07 /* no command change, used to modify CommandReg */
+#  define MFRC522_RECEIVE_CMD      0x08 /* activates the receiver circuits */
+#  define MFRC522_TRANSCV_CMD      0x0C /* transmits data from FIFO and receive automatically */
+#  define MFRC522_MF_AUTH_CMD      0x0E /* performs the MIFARE stand authentication as a reader */
+#  define MFRC522_SOFTRST_CMD      0x0F /* resets the MFRC522 */
+#define MFRC522_POWER_DOWN         (1 << 4) /* soft power-down mode entered */
+#define MFRC522_RCV_OFF            (1 << 5) /* turns off analog part of receiver */
+
+/* Section 9.3.1.3: ComIEnReg register */
+
+#define MFRC522_TIMER_IEN          (1 << 0) /* allows the timer interrupt request on pin IRQ */
+#define MFRC522_ERR_IEN            (1 << 1) /* allows the error interrupt request on pin IRQ */
+#define MFRC522_LO_ALERT_IEN       (1 << 2) /* allows the low alert interrupt request on pin IRQ */
+#define MFRC522_HI_ALERT_IEN       (1 << 3) /* allows the high alert interrupt request on pin IRQ */
+#define MFRC522_IDLE_IEN           (1 << 4) /* allows the idle interrupt request on pin IRQ */
+#define MFRC522_RX_IEN             (1 << 5) /* allows the receiver interrupt request on pin IRQ */
+#define MFRC522_TX_IEN             (1 << 6) /* allows the transmitter interrupt request on pin IRQ */
+#define MFRC522_IRQ_INV            (1 << 7) /* signal on pin IRQ is inverse of IRq bit from Status1Reg */
+
+/* Section 9.3.1.4: DivIEnReg register */
+
+#define MFRC522_CRC_IEN            (1 << 2) /* allows the CRC interrupt request on pin IRQ */
+#define MFRC522_MFIN_ACT_IEN       (1 << 4) /* allows the MFIN active interrupt request on pin IRQ */
+#define MFRC522_IRQ_PUSH_PULL      (1 << 7) /* 1 = IRQ pin is a standard CMOS output pin, 0 = open-drain */
+
+/* Section 9.3.1.5: ComIrqReg register */
+
+#define MFRC522_COM_IRQ_MASK       (0x7F)
+#define MFRC522_TIMER_IRQ          (1 << 0) /* enabled when TCounterValReg reaches value 0 */
+#define MFRC522_ERR_IRQ            (1 << 1) /* any error bit in the ErrorReg register is set */
+#define MFRC522_LO_ALERT_IRQ       (1 << 2) /* Status1Reg register’s LoAlert bit is set */
+#define MFRC522_HI_ALERT_IRQ       (1 << 3) /* Status1Reg register’s HiAlert bit is set */
+#define MFRC522_IDLE_IRQ           (1 << 4) /* if a command terminates this bit is set */
+#define MFRC522_RX_IRQ             (1 << 5) /* receiver has detected the end of a valid data stream */
+#define MFRC522_TX_IRQ             (1 << 6) /* set immediately after the last data bit was transmitted */
+#define MFRC522_SET1               (1 << 7) /* indicate the status of ComIrqReg bits */
+
+/* Section 9.3.1.6: DivIrqReg register */
+
+#define MFRC522_CRC_IRQ            (1 << 2) /* the CalcCRC command is active and all data is processed */
+#define MFRC522_MFIN_ACT_IRQ       (1 << 4) /* MFIN is active, int is set on rising/falling signal edge */
+#define MFRC522_SET2               (1 << 7) /* indicates the status of the marked bits in the DivIrqReg */
+
+/* Section 9.3.1.7: ErrorReg register */
+
+#define MFRC522_PROTO_ERR       (1 << 0) /* set if the SOF is incorrect or during MFAuthent if data is incorrect */
+#define MFRC522_PARITY_ERR         (1 << 1) /* parity check failed */
+#define MFRC522_CRC_ERR            (1 << 2) /* the RxCRCEn bit is set and the CRC calculation fails */
+#define MFRC522_COLL_ERR           (1 << 3) /* a bit-collision is detected */
+#define MFRC522_BUF_OVFL_ERR    (1 << 4) /* FIFO is full and the host or internal state machine try to write data */
+#define MFRC522_TEMP_ERR           (1 << 6) /* internal temperature sensor detects overheating */
+#define MFRC522_WR_ERR             (1 << 7) /* data write error in the FIFO, host writing to FIFO at the wrong time */
+
+/* Section 9.3.1.8: Status1Reg register */
+
+#define MFRC522_LO_ALERT           (1 << 0) /* number of bytes on FIFO lower than the water-mark */
+#define MFRC522_HI_ALERT           (1 << 1) /* number of bytes on FIFO higher than the water-mark */
+#define MFRC522_TRUNNING           (1 << 3) /* timer is running */
+#define MFRC522_IRQ                (1 << 4) /* indicates if any interrupt source requests attention */
+#define MFRC522_CRC_READY          (1 << 5) /* the CRC calculation has finished */
+#define MFRC522_CRC_OK             (1 << 6) /* when the calculation is done correctly this bit change to 1 */
+
+/* Section 9.3.1.9: Status2Reg register */
+
+#define MFRC522_MODEM_STATE_MASK   (7 << 0) /* shows the state of the transmitter and receiver state machine */
+#define MFRC522_MODEM_IDLE         (0)      /* idle */
+#define MFRC522_MODEM_WAIT_BFR     (1)      /* wait for the BitFramingReg register’s StartSend bit */
+#define MFRC522_MODEM_TXWAIT       (2)      /* wait until RF field is present if TxWaitRF bit is set to 1 */
+#define MFRC522_MODEM_TXING        (3)      /* transmitting */
+#define MFRC522_MODEM_RXWAIT       (4)      /* wait until RF field is present if TxWaitRF bit is set to 1 */
+#define MFRC522_MODEM_WAIT_DATA    (5)      /* wait for data */
+#define MFRC522_MODEM_RXING        (6)      /* receiving */
+#define MFRC522_MF_CRYPTO1_ON      (1 << 3) /* MIFARE Crypto1 unit is switched on */
+#define MFRC522_I2C_FORCE_HS       (1 << 6) /* set the I2C to high-speed mode (R/W bit) */
+#define MFRC522_TEMP_SENS_CLEAR    (1 << 7) /* clears the temperature error if it is below 125C (R/W bit) */
+
+/* Section 9.3.1.10: FIFODataReg register */
+
+#define MFRC522_FIFO_DATA_MASK     (0xFF)   /* Input and output of 64 byte FIFO buffer */
+
+/* Section 9.3.1.11: FIFOLevelReg register */
+
+#define MFRC522_FIFOLEVEL_MASK     (0x7F)   /* indicates the number of bytes stored in the FIFO buffer */
+#define MFRC522_FLUSH_BUFFER       (1 << 7) /* immediately clears the internal FIFO buffer */
+
+/* Section 9.3.1.12: WaterLevelReg register */
+
+#define MFRC522_WATER_LEVEL_MASK   (0x3F)   /* level for FIFO under- and overflow warning */
+
+/* Section 9.3.1.13: ControlReg register */
+
+#define MFRC522_RX_LAST_BITS_MASK  (7 << 0) /* indicates the number of valid bits in the last received byte */
+#define MFRC522_TSTART_NOW         (1 << 6) /* timer starts immediately */
+#define MFRC522_TSTOP_NOW          (1 << 7) /* timer stops immediately */
+
+/* Section 9.3.1.14: BitFramingReg register */
+
+#define MFRC522_TX_LAST_BITS_MASK  (7 << 0) /* defines the number of bits of the last byte that will be transmitted */
+#define MFRC522_RX_ALIGN_MASK      (7 << 4) /* used for reception of bit-oriented frames */
+#define MFRC522_START_SEND         (1 << 7) /* starts the transmission of data */
+
+/* Section 9.3.1.15: CollReg register */
+
+#define MFRC522_COLL_POS_MASK      (0x1F)   /* shows the bit position of the first detected collision */
+#define MFRC522_COLL_POS_NOT_VALID (1 << 5) /* no collision detected or it is out of the range of CollPos[4:0] */
+#define MFRC522_VALUES_AFTER_COLL  (1 << 7) /* 0 means: all received bits will be cleared after a collision */
+
+/* Section 9.3.2.2: ModeReg register */
+
+#define MFRC522_CRC_PRESET_MASK    (0x3) /* defines the preset value for the CalcCRC */
+#define MFRC522_CRC_PRESET_0000    (0x0) /* 0000h CRC preset value */
+#define MFRC522_CRC_PRESET_6363    (0x1) /* 6363h CRC preset value */
+#define MFRC522_CRC_PRESET_A671    (0x2) /* A671h CRC preset value */
+#define MFRC522_CRC_PRESET_FFFF    (0x3) /* FFFFh CRC preset value */
+#define MFRC522_POL_MFIN           (1 << 3) /* defines the polarity of pin MFIN */
+#define MFRC522_TX_WAIT_RF         (1 << 5) /* transmitter can only be started if an RF field is generated */
+#define MFRC522_MSB_FIRST          (1 << 7) /* CRC coprocessor calculates the CRC with MSB first */
+
+/* Section 9.3.2.3: TxModeReg register */
+
+#define MFRC522_INV_MOD             (1 << 3) /* modulation of transmitted data is inverted */
+#define MFRC522_TX_SPEED_MASK       (7 << 4) /* defines the bit rate during data transmission */
+#define MFRC522_TX_106KBD           (0 << 4) /* 106 kBd */ 
+#define MFRC522_TX_212KBD           (1 << 4) /* 212 kBd */ 
+#define MFRC522_TX_424KBD           (2 << 4) /* 424 kBd */ 
+#define MFRC522_TX_848KBD           (3 << 4) /* 848 kBd */ 
+                                             /* 4-7 << 4 - reserved */
+#define MFRC522_TX_CRC_EN           (1 << 7) /* enables CRC generation during data transmission */
+
+/* Section 9.3.2.4: RxModeReg register */
+
+#define MFRC522_RX_MULTIPLE         (1 << 2) /* enable to receive more than one data frame, only at 106kBd */
+#define MFRC522_RX_NO_ERR           (1 << 3) /* ignore invalid data stream error (less than 4 bits received) */
+#define MFRC522_RX_SPEED_MASK       (7 << 4) /* defines the bit rate during data reception */
+#define MFRC522_RX_106KBD           (0 << 4) /* 106 kBd */ 
+#define MFRC522_RX_212KBD           (1 << 4) /* 212 kBd */ 
+#define MFRC522_RX_424KBD           (2 << 4) /* 424 kBd */ 
+#define MFRC522_RX_848KBD           (3 << 4) /* 848 kBd */ 
+                                             /* 4-7 << 4 - reserved */
+#define MFRC522_RX_CRC_EN           (1 << 7) /* enables CRC generation during data reception */
+
+/* Section 9.3.2.5: TxControlReg register */
+
+#define MFRC522_TX1_RF_EN          (1 << 0) /* output signal on pin TX1 delivers 13.56MHz */
+#define MFRC522_TX2_RF_EN          (1 << 1) /* output signal on pin TX2 delivers 13.56MHz */
+                                            /* bit 2 - reserved */
+#define MFRC522_TX2_CW             (1 << 3) /* output signal on pin TX2 delivers (un)modulated 13.56MHz */
+#define MFRC522_INV_TX1_RF_OFF     (1 << 4) /* output signal on pin TX1 is inverted when driver TX1 is disabled */
+#define MFRC522_INV_TX2_RF_OFF     (1 << 5) /* output signal on pin TX2 is inverted when driver TX2 is disabled */
+#define MFRC522_INV_TX1_RF_ON      (1 << 6) /* output signal on pin TX1 is inverted when driver TX1 is enabled */
+#define MFRC522_INV_TX2_RF_ON      (1 << 7) /* output signal on pin TX2 is inverted when driver TX2 is enabled */
+
+/* Section 9.3.2.6: TxASKReg register */
+
+#define MFRC522_FORCE_100ASK       (1 << 6) /* forces a 100% ASK modulation independent of the ModGsPReg setting */
+
+/* Section 9.3.2.7: TxSelReg register */
+
+#define MFRC522_MFOUT_SEL_MASK     (0xF)    /* selects the input for pin MFOUT */
+#define MFRC522_MFOUT_3STATE       (0)      /* 3-state */
+#define MFRC522_MFOUT_LOW          (1)      /* constant Low */
+#define MFRC522_MFOUT_HIGH         (2)      /* constant High */
+#define MFRC522_MFOUT_TEST_BUS     (3)      /* test bus signal as defined by the TstBusBitSel[2:0] value */
+#define MFRC522_MFOUT_INT_ENV      (4)      /* modulation signal (envelope) from the internal encoder */
+#define MFRC522_MFOUT_TX_STREAM    (5)      /* serial data stream to be transmitted, data stream before Miller encoder */
+                                            /* 6 - reserved */
+#define MFRC522_MFOUT_RX_STREAM    (7)      /* serial data stream received, data stream after Manchester decoder */
+                                            /* 8-15 - reserved */
+#define MFRC522_DRV_SEL_MASK       (3 << 4) /* selects the input of drivers TX1 and TX2 */
+#define MFRC522_DRV_SEL_3STATE     (0 << 4) /* 3-state */
+#define MFRC522_DRV_SEL_INT_ENV    (1 << 4) /* modulation signal (envelope) from the internal encoder */
+#define MFRC522_DVR_SEL_ENV_MFIN   (2 << 4) /* modulation signal (envelope) from pin MFIN */
+#define MFRC522_DVR_SEL_HIGH       (3 << 4) /* High: depends on InvTx1RFOn/InvTx1RFOff and InvTx2RFOn/InvTx2RFOff */
+
+/* Section 9.3.2.8: RxSelReg register */
+
+#define MFRC522_RX_WAIT_MASK       (0x3F)   /* delay the receiver RxWait bit-clocks after transmission */
+#define MFRC522_UART_SEL_MASK      (3 << 6) /* selects the input of the contactless UART */
+#define MFRC522_UART_LOW           (0 << 6) /* constant Low */
+#define MFRC522_UART_MANCHESTER    (1 << 6) /* Manchester with subcarrier from pin MFIN */
+#define MFRC522_UART_INT_MOD       (2 << 6) /* modulated signal from the internal analog module, default */
+#define MFRC522_UART_NRZ_CODE      (3 << 6) /* NRZ coding without subcarrier from pin MFIN */
+
+/* Section 9.3.2.9: RxThresholdReg register */
+
+#define MFRC522_COLL_LEVEL_MASK    (7) /* the minimum signal strength to generate a bit-collision */
+#define MFRC522_MIN_LEVEL_MASK     (0xF << 4) /* the minimum signal strength that will be accepted */
+
+/* Section 9.3.2.10: DemodReg register */
+
+#define MFRC522_TAU_SYNC_MASK      (3 << 0) /* changes the time-constant of the internal PLL during burst */
+#define MFRC522_TAU_RCV_MASK       (3 << 2) /* changes the time-constant of the internal PLL during data reception */
+#define MFRC522_TPRESCAL_EVEN      (1 << 4) /* defines the Timer Prescaler formula to use */
+#define MFRC522_FIX_IQ             (1 << 5) /* defines if reception will be fixed at channel I or Q based on AddIQ[1:0] */
+#define MFRC522_ADD_IQ_MASK        (3 << 6) /* defines the use of I and Q channel during reception */
+
+/* Section 9.3.2.13: MfTxReg register */
+
+#define MFRC522_MF_TX_WAIT_MASK    (3 << 0) /* defines the additional response time */
+
+/* Section 9.3.2.14 MfRxReg register */
+
+#define MFRC522_MF_RX_PARITY_DIS   (1 << 4 ) /* disable parity bit to transmittion and reception */
+
+/* Section 9.3.2.16: SerialSpeedReg register */
+
+#define MFRC522_BR_T1_MASK         (0x1F)   /* factor BR_T1 adjusts the transfer speed */
+#define MFRC522_BR_T0_MASK         (7 << 5) /* factor BR_T0 adjusts the transfer speed */
+
+/* Section 9.3.3.6: RFCfgReg register */
+
+#define MFRC522_RX_GAIN_MASK       (0x7 << 4)
+#define MFRC522_RX_GAIN_18DB       (0x0 << 4)
+#define MFRC522_RX_GAIN_23DB       (0x1 << 4)
+#define MFRC522_RX_GAIN_18DB_2     (0x2 << 4)
+#define MFRC522_RX_GAIN_23DB_2     (0x3 << 4)
+#define MFRC522_RX_GAIN_33DB       (0x4 << 4)
+#define MFRC522_RX_GAIN_38DB       (0x5 << 4)
+#define MFRC522_RX_GAIN_43DB       (0x6 << 4)
+#define MFRC522_RX_GAIN_48DB       (0x7 << 4)
+
+/* MFRC522 TModeReg and TPrescalerReg registers */
+
+#define MFRC522_TPRESCALER_HI_MASK (0xF)
+#define MFRC522_TAUTO_RESTART      (1 << 4)
+#define MFRC522_TGATED_MASK        (3 << 5)
+#define MFRC522_TGATED_NONGATED    (0 << 5) /* non-gated mode */
+#define MFRC522_TGATED_MFIN        (1 << 5) /* gated by pin MFIN */
+#define MFRC522_TGATED_AUX1        (2 << 5) /* gated by pin AUX1 */
+#define MFRC522_TAUTO              (1 << 7) /* timer starts automatically at the end of the transmission */
+
+/* MFRC522 AutoTestReg register */
+
+#define MFRC522_SELFTEST_MASK      (0xF)    /* for default operation the self test must be disabled by value 0000b */
+#define MFRC522_RFT_MASK           (3 << 4) /* reserved for production tests */
+#define MFRC522_AMP_RCV            (1 << 6) /* non-linear signal processing mode, increase range distance at 106kBd */
+
+#define MFRC522_SELFTEST_EN        9        /* the self test is enabled by value 1001b */
+
+#ifndef CONFIG_MFRC522_SPI_FREQ
+#  define CONFIG_MFRC522_SPI_FREQ  (5000000)
+#endif
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+struct mfrc522_dev_s
+{
+  uint8_t state;
+  FAR struct spi_dev_s *spi;          /* SPI interface */
+};
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+bool mfrc522_set_config(struct mfrc522_dev_s *dev, uint8_t flags);
+
+#endif /* __DRIVERS_CONTACTLESS_MFRC522_H */
diff --git a/drivers/wireless/pn532.c b/drivers/contactless/pn532.c
similarity index 92%
rename from drivers/wireless/pn532.c
rename to drivers/contactless/pn532.c
index 0f171950de9f995be69e5323f203add6ef931a1b..a7b21131810ae9797cb231ed67209b0fa15ea7eb 100644
--- a/drivers/wireless/pn532.c
+++ b/drivers/contactless/pn532.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * include/wireless/pn532.h
+ * drivers/contactless/pn532.c
  *
  *   Copyright(C) 2012, 2013, 2016 Offcode Ltd. All rights reserved.
  *   Authors: Janne Rosberg 
@@ -48,7 +48,6 @@
 #include 
 
 #include 
-#include 
 
 #include "pn532.h"
 
@@ -56,24 +55,40 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-#ifdef CONFIG_WL_PN532_DEBUG
-#  define pn532dbg dbg
+/* Configuration ************************************************************/
+/* Bit order H/W feature must be enabled in order to support LSB first
+ * operation.
+ */
+
+#if !defined(CONFIG_SPI_HWFEATURES) || !defined(CONFIG_SPI_BITORDER)
+#  error CONFIG_SPI_HWFEATURES=y and CONFIG_SPI_BITORDER=y required by this driver
+#endif
+
+#ifndef CONFIG_ARCH_HAVE_SPI_BITORDER
+#  warning This platform does not support SPI LSB-bit order
+#endif
+
+#ifdef CONFIG_CL_PN532_DEBUG
+#  define pn532err    _err
+#  define pn532info   _info
 #else
 #  ifdef CONFIG_CPP_HAVE_VARARGS
-#    define pn532dbg(x...)
+#    define pn532err(x...)
+#    define pn532info(x...)
 #  else
-#    define pn532dbg (void)
+#    define pn532err  (void)
+#    define pn532info (void)
 #    endif
 #endif
 
-#ifdef CONFIG_WL_PN532_DEBUG_TX
-#  define tracetx dbgdumpbuffer
+#ifdef CONFIG_CL_PN532_DEBUG_TX
+#  define tracetx errdumpbuffer
 #else
 #    define tracetx(x...)
 #endif
 
-#ifdef CONFIG_WL_PN532_DEBUG_RX
-#  define tracerx dbgdumpbuffer
+#ifdef CONFIG_CL_PN532_DEBUG_RX
+#  define tracerx errdumpbuffer
 #else
 #    define tracerx(x...)
 #endif
@@ -139,11 +154,19 @@ static const uint8_t pn532ack[] =
 
 static void pn532_lock(FAR struct spi_dev_s *spi)
 {
+  int ret;
+
   (void)SPI_LOCK(spi, true);
 
   SPI_SETMODE(spi, SPIDEV_MODE0);
-  SPI_SETBITS(spi, -8);
-  (void)SPI_HWFEATURES(spi, 0);
+  SPI_SETBITS(spi, 8);
+
+  ret = SPI_HWFEATURES(spi, HWFEAT_LSBFIRST);
+  if (ret < 0)
+    {
+      pn532err("ERROR: SPI_HWFEATURES failed to set bit order: %d\n", ret);
+    }
+
   (void)SPI_SETFREQUENCY(spi, CONFIG_PN532_SPI_FREQ);
 }
 
@@ -154,11 +177,19 @@ static void pn532_unlock(FAR struct spi_dev_s *spi)
 
 static inline void pn532_configspi(FAR struct spi_dev_s *spi)
 {
+  int ret;
+
   /* Configure SPI for the PN532 module. */
 
   SPI_SETMODE(spi, SPIDEV_MODE0);
-  SPI_SETBITS(spi, -8);
-  (void)SPI_HWFEATURES(spi, 0);
+  SPI_SETBITS(spi, 8);
+
+  ret = SPI_HWFEATURES(spi, HWFEAT_LSBFIRST);
+  if (ret < 0)
+    {
+      pn532err("ERROR: SPI_HWFEATURES failed to set bit order: %d\n", ret);
+    }
+
   (void)SPI_SETFREQUENCY(spi, CONFIG_PN532_SPI_FREQ);
 }
 
@@ -170,7 +201,7 @@ static inline void pn532_select(struct pn532_dev_s *dev)
     }
   else
     {
-      SPI_SELECT(dev->spi, SPIDEV_WIRELESS, true);
+      SPI_SELECT(dev->spi, SPIDEV_CONTACTLESS, true);
     }
 }
 
@@ -182,7 +213,7 @@ static inline void pn532_deselect(struct pn532_dev_s *dev)
     }
   else
     {
-      SPI_SELECT(dev->spi, SPIDEV_WIRELESS, false);
+      SPI_SELECT(dev->spi, SPIDEV_CONTACTLESS, false);
     }
 }
 
@@ -226,7 +257,8 @@ bool pn532_rx_frame_is_valid(struct pn532_frame *f, bool check_data)
 
   if (f->start_code != PN532_SOF)
     {
-      pn532dbg("Frame startcode 0x%X != 0x%X\n", PN532_SOF, f->start_code);
+      pn532err("ERROR: Frame startcode 0x%X != 0x%X\n",
+               PN532_SOF, f->start_code);
       return false;
     }
 
@@ -238,7 +270,7 @@ bool pn532_rx_frame_is_valid(struct pn532_frame *f, bool check_data)
   chk = pn532_checksum(f->len);
   if (chk != f->lcs)
     {
-      pn532dbg("Frame data len checksum failed");
+      pn532err("ERROR: Frame data len checksum failed");
       return false;
     }
 
@@ -247,7 +279,8 @@ bool pn532_rx_frame_is_valid(struct pn532_frame *f, bool check_data)
       chk = pn532_data_checksum(&f->tfi, f->len);
       if (chk != f->data[f->len-1])
         {
-          pn532dbg("Frame data checksum failed: calc=0x%X != 0x%X", chk, f->data[f->len-1]);
+          pn532err("ERROR: Frame data checksum failed: calc=0x%X != 0x%X",
+                   chk, f->data[f->len-1]);
           return false;
         }
     }
@@ -303,7 +336,7 @@ static int pn532_wait_rx_ready(struct pn532_dev_s *dev, int timeout)
     {
       if (--timeout == 0x00)
         {
-          pn532dbg("wait RX timeout!\n");
+          pn532err("ERROR: wait RX timeout!\n");
           return -ETIMEDOUT;
         }
 
@@ -414,7 +447,7 @@ int pn532_read_ack(struct pn532_dev_s *dev)
     }
   else
     {
-      pn532dbg("ACK NOK");
+      pn532info("ACK NOK");
       res = 0;
     }
 
@@ -460,7 +493,7 @@ int pn532_write_frame(struct pn532_dev_s *dev, struct pn532_frame *f)
     {
       if (!pn532_read_ack(dev))
         {
-          pn532dbg("command FAILED\n");
+          pn532err("ERROR: command FAILED\n");
           res = -EIO;
         }
     }
@@ -490,7 +523,7 @@ int pn532_read_frame(struct pn532_dev_s *dev, struct pn532_frame *f, int max_siz
 
           /* TODO: optimize frame integrity check...
            * pn532_data_checksum(&f.tfi, f->len);
-           * dbgdumpbuffer("RX Frame:", f, f->len+6);
+           * errdumpbuffer("RX Frame:", f, f->len+6);
            */
 
           if (pn532_rx_frame_is_valid(f, true))
@@ -580,8 +613,8 @@ int pn532_get_fw_version(struct pn532_dev_s *dev,
           if (f->data[0] == PN532_COMMAND_GETFIRMWAREVERSION + 1)
             {
               fw = (struct pn_firmware_version*) &f->data[1];
-              pn532dbg("FW: %d.%d on IC:0x%X (Features: 0x%X)\n",
-                       fw->ver, fw->rev, fw->ic, fw->support);
+              pn532info("FW: %d.%d on IC:0x%X (Features: 0x%X)\n",
+                        fw->ver, fw->rev, fw->ic, fw->support);
               if (fv)
                 {
                   memcpy(fv, fw, sizeof(struct pn_firmware_version));
@@ -611,7 +644,7 @@ int pn532_write_gpio(struct pn532_dev_s *dev, uint8_t p3, uint8_t p7)
     {
       pn532_read(dev, cmd_buffer, 10);
       tracetx("Resp:", cmd_buffer, 10);
-      pn532dbg("TFI=%x, data0=%X", f->tfi, f->data[0]);
+      pn532info("TFI=%x, data0=%X", f->tfi, f->data[0]);
       if ((f->tfi == PN532_PN532TOHOST) && (f->data[0] == PN532_COMMAND_WRITEGPIO+1))
         {
           res = OK;
@@ -723,15 +756,15 @@ uint32_t pn532_read_passive_target_id(struct pn532_dev_s *dev, uint8_t baudrate)
 
               if (r->nbtg == 1)
                 {
-                  pn532dbg("Found %d card(s)\n", r->nbtg);
+                  pn532info("Found %d card(s)\n", r->nbtg);
 
                   /* now supports only type_a cards
                    * if (poll_mode == PN532_POLL_MOD_106KBPS_A)
                    */
 
                   struct pn_target_type_a *t = (struct pn_target_type_a *) &r->target_data;
-                  pn532dbg("sens:0x%x  sel:0x%x", t->sens_res, t->sel_res);
-                  pn532dbg("idlen:0x%x ", t->nfcid_len);
+                  pn532info("sens:0x%x  sel:0x%x", t->sens_res, t->sel_res);
+                  pn532info("idlen:0x%x ", t->nfcid_len);
 
                   /* generate 32bit cid from id (could be longer)
                    * HACK: Using only top 4 bytes.
@@ -817,7 +850,7 @@ static int irq_handler(int irq, FAR void *context)
   (void) irq;
   (void) context;
 
-  /* pn532dbg("*IRQ*\n"); */
+  /* pn532info("*IRQ*\n"); */
   /* work_queue(HPWORK, &g_dev->irq_work, pn532_worker, dev, 0); */
 
   return OK;
@@ -1064,7 +1097,7 @@ static int _ioctl(FAR struct file *filep, int cmd, unsigned long arg)
       break;
 
     default:
-      pn532dbg("Unrecognized cmd: %d\n", cmd);
+      pn532err("ERROR: Unrecognized cmd: %d\n", cmd);
       ret = -EINVAL;
       break;
     }
@@ -1105,7 +1138,7 @@ int pn532_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
   dev = (FAR struct pn532_dev_s *)kmm_malloc(sizeof(struct pn532_dev_s));
   if (!dev)
     {
-      pn532dbg("Failed to allocate instance\n");
+      pn532err("ERROR: Failed to allocate instance\n");
       return -ENOMEM;
     }
 
@@ -1123,7 +1156,7 @@ int pn532_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
   ret = register_driver(devpath, &g_pn532fops, 0666, dev);
   if (ret < 0)
     {
-      pn532dbg("Failed to register driver: %d\n", ret);
+      pn532err("ERROR: Failed to register driver: %d\n", ret);
       kmm_free(dev);
     }
 
diff --git a/drivers/wireless/pn532.h b/drivers/contactless/pn532.h
similarity index 94%
rename from drivers/wireless/pn532.h
rename to drivers/contactless/pn532.h
index 8361f5ed505bf2c1229ca7493f0e145d35fe066e..87013f7dbe1cf0bcb700ed5fed6996faffa4f537 100644
--- a/drivers/wireless/pn532.h
+++ b/drivers/contactless/pn532.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * drivers/wireless/pn532.h
+ * drivers/contactless/pn532.h
  *
  *   Copyright(C) 2012, 2013, 2016 Offcode Ltd. All rights reserved.
  *   Authors: Janne Rosberg 
@@ -35,8 +35,8 @@
  *
  ****************************************************************************/
 
-#ifndef __DRIVERS_WIRELESS_PN532_H
-#define __DRIVERS_WIRELESS_PN532_H 1
+#ifndef __DRIVERS_CONTACTLESS_PN532_H
+#define __DRIVERS_CONTACTLESS_PN532_H 1
 
 /****************************************************************************
  * Included Files
@@ -48,7 +48,7 @@
 
 #include 
 #include 
-#include 
+#include 
 
 /****************************************************************************
  * Pre-Processor Definitions
@@ -119,7 +119,7 @@
  * Public Types
  ****************************************************************************/
 
-struct pn532_frame
+begin_packed_struct struct pn532_frame
 {
   uint8_t  preamble;    /* 0x00 */
   uint16_t start_code;  /* 0x00FF (BE) -> 0xFF00 (LE) */
@@ -130,22 +130,22 @@ struct pn532_frame
   uint8_t  tfi;         /* Frame idenfifier 0xD4, 0xD5 */
   uint8_t  data[];      /* LEN-1 bytes of Packet Data Information.
                          * The first byte PD0 is the Command Code */
-} packed_struct;
+} end_packed_struct;
 
-struct pn_poll_response
+begin_packed_struct struct pn_poll_response
 {
   uint8_t nbtg;
   uint8_t tg;
   uint8_t target_data[];
-} packed_struct;
+} end_packed_struct;
 
-struct pn_target_type_a
+begin_packed_struct struct pn_target_type_a
 {
   uint16_t sens_res;
   uint8_t  sel_res;
   uint8_t  nfcid_len;
   uint8_t  nfcid_data[];
-} packed_struct;
+} end_packed_struct;
 
 struct pn_firmware_version
 {
@@ -168,4 +168,4 @@ struct pn532_dev_s
 
 bool pn532_set_config(struct pn532_dev_s *dev, uint8_t flags);
 
-#endif /* __DRIVERS_WIRELESS_PN532_H */
+#endif /* __DRIVERS_CONTACTLESS_PN532_H */
diff --git a/drivers/dev_null.c b/drivers/dev_null.c
index ff535df34440faffc7e24aed1d006b73b5b4fb50..2f2b6f2a7553b671fd0943ae95785b9d3eb14951 100644
--- a/drivers/dev_null.c
+++ b/drivers/dev_null.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/dev_null.c
  *
- *   Copyright (C) 2007, 2008, 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2008, 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -44,7 +44,9 @@
 #include 
 #include 
 #include 
+
 #include 
+#include 
 
 /****************************************************************************
  * Private Function Prototypes
diff --git a/drivers/dev_urandom.c b/drivers/dev_urandom.c
new file mode 100644
index 0000000000000000000000000000000000000000..e7022cb9f54e7effafb27eae4ff2616c28410e14
--- /dev/null
+++ b/drivers/dev_urandom.c
@@ -0,0 +1,287 @@
+/****************************************************************************
+ * drivers/dev_urandom.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: David S. Alessio
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This random number generator is simple, fast and portable.
+ *      Ref:  https://en.wikipedia.org/wiki/Xorshift
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#if defined(CONFIG_DEV_URANDOM) && !defined(CONFIG_DEV_URANDOM_ARCH)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if !defined(CONFIG_DEV_URANDOM_CONGRUENTIAL) && \
+    !defined(CONFIG_DEV_URANDOM_XORSHIFT128)
+#  define CONFIG_DEV_URANDOM_XORSHIFT128 1
+#endif
+
+#ifdef CONFIG_DEV_URANDOM_XORSHIFT128
+#  define PRNG() do_xorshift128()
+#else /* CONFIG_DEV_URANDOM_CONGRUENTIAL */
+#  define PRNG() do_congruential()
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+union xorshift128_state_u
+{
+  struct xorshift128_state_s state;
+  uint8_t u[16];
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+#define min(a, b)   (((a) < (b)) ? (a) : (b))
+
+static ssize_t devurand_read(FAR struct file *filep, FAR char *buffer,
+                             size_t buflen);
+static ssize_t devurand_write(FAR struct file *filep, FAR const char *buffer,
+                              size_t buflen);
+#ifndef CONFIG_DISABLE_POLL
+static int devurand_poll(FAR struct file *filep, FAR struct pollfd *fds,
+                         bool setup);
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct file_operations g_urand_fops =
+{
+  NULL,                         /* open */
+  NULL,                         /* close */
+  devurand_read,                /* read */
+  devurand_write,               /* write */
+  NULL,                         /* seek */
+  NULL                          /* ioctl */
+#ifndef CONFIG_DISABLE_POLL
+  , devurand_poll               /* poll */
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  , NULL                        /* unlink */
+#endif
+};
+
+#ifdef CONFIG_DEV_URANDOM_XORSHIFT128
+static union xorshift128_state_u g_prng;
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: do_xorshift128
+ ****************************************************************************/
+
+#ifdef CONFIG_DEV_URANDOM_XORSHIFT128
+static inline uint32_t do_xorshift128(void)
+{
+  return xorshift128(&g_prng.state);
+}
+#endif
+
+/****************************************************************************
+ * Name: do_congruential
+ ****************************************************************************/
+
+#ifdef CONFIG_DEV_URANDOM_CONGRUENTIAL
+static inline uint32_t do_congruential(void)
+{
+  /* REVISIT:  We could probably generate a 32-bit value with a single
+   * call to nrand().
+   */
+
+  return (uint32_t)nrand(65536L) << (uint32_t)nrand(65536L);
+}
+#endif
+
+/****************************************************************************
+ * Name: devurand_read
+ ****************************************************************************/
+
+static ssize_t devurand_read(FAR struct file *filep, FAR char *buffer,
+                             size_t len)
+{
+  size_t n;
+  uint32_t rnd;
+
+  n = len;
+
+  /* Align buffer pointer to 4-byte boundry */
+
+  if (((uintptr_t)buffer & 0x03) != 0)
+    {
+      /* Generate a pseudo random number */
+
+      rnd = PRNG();
+
+      while (((uintptr_t)buffer & 0x03) != 0)
+        {
+          if (n <= 0)
+            {
+              return len;
+            }
+
+          *buffer++ = rnd & 0xff;
+          rnd >>= 8;
+          --n;
+        }
+    }
+
+  /* Stuff buffer with PRNGs 4 bytes at a time */
+
+  while (n >= 4)
+    {
+      *(uint32_t *)buffer = PRNG();
+      buffer += 4;
+      n -= 4;
+    }
+
+  /* Stuff remaining 1, 2, or 3 bytes */
+
+  if (n > 0)
+    {
+      /* Generate a pseudo random number */
+
+      rnd = PRNG();
+
+      do
+        {
+          *buffer++ = rnd & 0xFF;
+          rnd >>= 8;
+        }
+      while (--n > 0);
+    }
+
+  return len;
+}
+
+/****************************************************************************
+ * Name: devurand_write
+ ****************************************************************************/
+
+static ssize_t devurand_write(FAR struct file *filep, FAR const char *buffer,
+                              size_t len)
+{
+  /* Write can be used to re-seed the PRNG state. */
+
+#ifdef CONFIG_DEV_URANDOM_CONGRUENTIAL
+  unsigned int seed = 0;
+
+  len = min(len, sizeof(unsigned int));
+  memcpy(&seed, buffer, len);
+  srand(seed);
+  return len;
+#else
+  len = min(len, sizeof(g_prng.u));
+  memcpy(&g_prng.u, buffer, len);
+  return len;
+#endif
+}
+
+/****************************************************************************
+ * Name: devurand_poll
+ ****************************************************************************/
+
+#ifndef CONFIG_DISABLE_POLL
+static int devurand_poll(FAR struct file *filep, FAR struct pollfd *fds,
+                         bool setup)
+{
+  if (setup)
+    {
+      fds->revents |= (fds->events & (POLLIN | POLLOUT));
+      if (fds->revents != 0)
+        {
+          sem_post(fds->sem);
+        }
+    }
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: devurandom_register
+ *
+ * Description:
+ *   Register /dev/urandom
+ *
+ ****************************************************************************/
+
+void devurandom_register(void)
+{
+  /* Seed the PRNG */
+
+#ifdef CONFIG_DEV_URANDOM_CONGRUENTIAL
+  srand(10197);
+#else
+  g_prng.state.w = 97;
+  g_prng.state.x = 101;
+  g_prng.state.y = g_prng.state.w << 17;
+  g_prng.state.z = g_prng.state.x << 25;
+#endif
+
+  (void)register_driver("/dev/urandom", &g_urand_fops, 0666, NULL);
+}
+
+#endif /* CONFIG_DEV_URANDOM && CONFIG_DEV_URANDOM_ARCH */
diff --git a/drivers/dev_zero.c b/drivers/dev_zero.c
index 5a0ce6692522eeca60575be93479d9c2519e38de..93b14c31693baed1f3809ac56dd0477ae5562d8d 100644
--- a/drivers/dev_zero.c
+++ b/drivers/dev_zero.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/dev_zero.c
  *
- *   Copyright (C) 2008-2009, 2012-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2012-2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -44,7 +44,9 @@
 #include 
 #include 
 #include 
+
 #include 
+#include 
 
 /****************************************************************************
  * Private Function Prototypes
diff --git a/drivers/eeprom/spi_xx25xx.c b/drivers/eeprom/spi_xx25xx.c
index 1f9335b856778d9a2c62c2d24f4eb8bfeb10e74c..437dfbea85424887a605e7a9fc083611dfef4d01 100644
--- a/drivers/eeprom/spi_xx25xx.c
+++ b/drivers/eeprom/spi_xx25xx.c
@@ -387,8 +387,6 @@ static void ee25xx_waitwritecomplete(struct ee25xx_dev_s *priv)
         }
     }
   while ((status & EE25XX_SR_WIP) != 0);
-
-  fvdbg("Complete\n");
 }
 
 /****************************************************************************
@@ -815,9 +813,8 @@ int ee25xx_initialize(FAR struct spi_dev_s *dev, FAR char *devname,
 
   eedev->readonly = !!readonly;
 
-  lowsyslog(LOG_NOTICE,
-            "EEPROM device %s, %d bytes, %d per page, addrlen %d, readonly %d\n",
-            devname, eedev->size, eedev->pgsize, eedev->addrlen, eedev->readonly);
+  finfo("EEPROM device %s, %d bytes, %d per page, addrlen %d, readonly %d\n",
+       devname, eedev->size, eedev->pgsize, eedev->addrlen, eedev->readonly);
 
   return register_driver(devname, &ee25xx_fops, 0666, eedev);
 }
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 95bd11250073c7d6e33829a512a5ed2ec56dc670..b5a7399f2c002cf4b8caf5cec57d190554404975 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -30,5 +30,10 @@ config I2C_NTRACE
 config I2C_DRIVER
 	bool "I2C character driver"
 	default n
+	---help---
+		Build in support for a character driver at /dev/i2c[N] that may be
+		used to perform I2C bus transfers from applications.  The intent of
+		this driver is to support I2C testing.  It is not suitable for use
+		in any real driver application.
 
 endif # I2C
diff --git a/drivers/i2c/i2c_driver.c b/drivers/i2c/i2c_driver.c
index ac53f0f1f1c16f427e3da45aa4d8497fa0d1e749..1e5024b3ec8bdb55cd2e34246fe2f979216d86f2 100644
--- a/drivers/i2c/i2c_driver.c
+++ b/drivers/i2c/i2c_driver.c
@@ -62,17 +62,6 @@
 #define DEVNAME_FMT    "/dev/i2c%d"
 #define DEVNAME_FMTLEN (8 + 3 + 1)
 
-/* Debug ********************************************************************/
-/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
-
-#ifdef CONFIG_DEBUG_I2C
-#  define i2cdbg dbg
-#  define i2cvdbg vdbg
-#else
-#  define i2cdbg(x...)
-#  define i2cvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -254,7 +243,7 @@ static int i2cdrvr_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   FAR struct i2c_transfer_s *transfer;
   int ret;
 
-  i2cvdbg("cmd=%d arg=%lu\n", cmd, arg);
+  i2cinfo("cmd=%d arg=%lu\n", cmd, arg);
 
   /* Get our private data structure */
 
@@ -435,4 +424,4 @@ int i2c_register(FAR struct i2c_master_s *i2c, int bus)
   return -ENOMEM;
 }
 
-#endif /* CONFIG_I2C_DRIVER */
\ No newline at end of file
+#endif /* CONFIG_I2C_DRIVER */
diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index ebf00232ee4a9cdc1652d013260a0d891b94f960..0fc96d6c918856929375655f99f595351b686024 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -176,10 +176,10 @@ config MXT_NPOLLWAITERS
 	---help---
 		Maximum number of threads that can be waiting on poll()
 
-config MXT_DISABLE_DEBUG_VERBOSE
+config MXT_DISABLE_CONFIG_DEBUG_INFO
 	bool "Disable verbose debug output"
 	default y
-	depends on DEBUG_VERBOSE && DEBUG_INPUT
+	depends on DEBUG_INPUT_INFO
 	---help---
 		The maXTouch tends to generate interrupts at a high rate during the
 		contact.  If verbose debug is enabled in this driver, you may not
@@ -316,7 +316,7 @@ config STMPE811_TEMP_DISABLE
 config STMPE811_REGDEBUG
 	bool "Enable Register-Level STMPE811 Debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_FEATURES
 	---help---
 		Enable very low register-level debug output.
 
@@ -331,7 +331,7 @@ config BUTTONS
 if BUTTONS
 
 config BUTTONS_LOWER
-	bool "Generic Lower Half Button Dirver"
+	bool "Generic Lower Half Button Driver"
 	default n
 	depends on ARCH_BUTTONS && ARCH_IRQBUTTONS
 	---help---
diff --git a/drivers/input/ads7843e.c b/drivers/input/ads7843e.c
index 22b7606e63f9a1476d5bc2c316454e6552db5556..d9c2c3b98823b09383628cd69f9a32789160ec12 100644
--- a/drivers/input/ads7843e.c
+++ b/drivers/input/ads7843e.c
@@ -71,6 +71,7 @@
 #include 
 #include 
 
+#include 
 #include 
 #include 
 
@@ -108,7 +109,7 @@ static int ads7843e_sample(FAR struct ads7843e_dev_s *priv,
 static int ads7843e_waitsample(FAR struct ads7843e_dev_s *priv,
                                FAR struct ads7843e_sample_s *sample);
 static void ads7843e_worker(FAR void *arg);
-static int ads7843e_interrupt(int irq, FAR void *context);
+static int ads7843e_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Character driver methods */
 
@@ -279,7 +280,7 @@ static uint16_t ads7843e_sendcmd(FAR struct ads7843e_dev_s *priv, uint8_t cmd)
   result = ((uint16_t)buffer[0] << 8) | (uint16_t)buffer[1];
   result = result >> 4;
 
-  ivdbg("cmd:%02x response:%04x\n", cmd, result);
+  iinfo("cmd:%02x response:%04x\n", cmd, result);
   return result;
 }
 
@@ -319,7 +320,7 @@ static void ads7843e_notify(FAR struct ads7843e_dev_s *priv)
       if (fds)
         {
           fds->revents |= POLLIN;
-          ivdbg("Report events: %02x\n", fds->revents);
+          iinfo("Report events: %02x\n", fds->revents);
           sem_post(fds->sem);
         }
     }
@@ -416,7 +417,7 @@ static int ads7843e_waitsample(FAR struct ads7843e_dev_s *priv,
     {
       /* Wait for a change in the ADS7843E state */
 
-      ivdbg("Waiting..\n");
+      iinfo("Waiting..\n");
       priv->nwaiters++;
       ret = sem_wait(&priv->waitsem);
       priv->nwaiters--;
@@ -427,14 +428,14 @@ static int ads7843e_waitsample(FAR struct ads7843e_dev_s *priv,
            * the failure now.
            */
 
-          idbg("sem_wait: %d\n", errno);
+          ierr("ERROR: sem_wait: %d\n", errno);
           DEBUGASSERT(errno == EINTR);
           ret = -EINTR;
           goto errout;
         }
     }
 
-  ivdbg("Sampled\n");
+  iinfo("Sampled\n");
 
   /* Re-acquire the semaphore that manages mutually exclusive access to
    * the device structure.  We may have to wait here.  But we have our sample.
@@ -498,7 +499,7 @@ static int ads7843e_schedule(FAR struct ads7843e_dev_s *priv)
   ret = work_queue(HPWORK, &priv->work, ads7843e_worker, priv, 0);
   if (ret != 0)
     {
-      illdbg("Failed to queue work: %d\n", ret);
+      ierr("ERROR: Failed to queue work: %d\n", ret);
     }
 
   return OK;
@@ -702,7 +703,7 @@ ignored:
  * Name: ads7843e_interrupt
  ****************************************************************************/
 
-static int ads7843e_interrupt(int irq, FAR void *context)
+static int ads7843e_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   FAR struct ads7843e_dev_s    *priv;
   FAR struct ads7843e_config_s *config;
@@ -749,7 +750,7 @@ static int ads7843e_open(FAR struct file *filep)
   uint8_t                   tmp;
   int                       ret;
 
-  ivdbg("Opening\n");
+  iinfo("Opening\n");
 
   DEBUGASSERT(filep);
   inode = filep->f_inode;
@@ -791,7 +792,7 @@ errout_with_sem:
   sem_post(&priv->devsem);
   return ret;
 #else
-  ivdbg("Opening\n");
+  iinfo("Opening\n");
   return OK;
 #endif
 }
@@ -807,7 +808,7 @@ static int ads7843e_close(FAR struct file *filep)
   FAR struct ads7843e_dev_s *priv;
   int                       ret;
 
-  ivdbg("Closing\n");
+  iinfo("Closing\n");
   DEBUGASSERT(filep);
   inode = filep->f_inode;
 
@@ -837,7 +838,7 @@ static int ads7843e_close(FAR struct file *filep)
 
   sem_post(&priv->devsem);
 #endif
-  ivdbg("Closing\n");
+  iinfo("Closing\n");
   return OK;
 }
 
@@ -853,7 +854,7 @@ static ssize_t ads7843e_read(FAR struct file *filep, FAR char *buffer, size_t le
   struct ads7843e_sample_s   sample;
   int                        ret;
 
-  ivdbg("buffer:%p len:%d\n", buffer, len);
+  iinfo("buffer:%p len:%d\n", buffer, len);
   DEBUGASSERT(filep);
   inode = filep->f_inode;
 
@@ -870,7 +871,7 @@ static ssize_t ads7843e_read(FAR struct file *filep, FAR char *buffer, size_t le
        * handle smaller reads... but why?
        */
 
-      idbg("Unsupported read size: %d\n", len);
+      ierr("ERROR: Unsupported read size: %d\n", len);
       return -ENOSYS;
     }
 
@@ -881,7 +882,7 @@ static ssize_t ads7843e_read(FAR struct file *filep, FAR char *buffer, size_t le
     {
       /* This should only happen if the wait was cancelled by an signal */
 
-      idbg("sem_wait: %d\n", errno);
+      ierr("ERROR: sem_wait: %d\n", errno);
       DEBUGASSERT(errno == EINTR);
       return -EINTR;
     }
@@ -896,7 +897,7 @@ static ssize_t ads7843e_read(FAR struct file *filep, FAR char *buffer, size_t le
        * option, then just return an error.
        */
 
-      ivdbg("Sample data is not available\n");
+      iinfo("Sample data is not available\n");
       if (filep->f_oflags & O_NONBLOCK)
         {
           ret = -EAGAIN;
@@ -910,7 +911,7 @@ static ssize_t ads7843e_read(FAR struct file *filep, FAR char *buffer, size_t le
         {
           /* We might have been awakened by a signal */
 
-          idbg("ads7843e_waitsample: %d\n", ret);
+          ierr("ERROR: ads7843e_waitsample: %d\n", ret);
           goto errout;
         }
     }
@@ -957,16 +958,16 @@ static ssize_t ads7843e_read(FAR struct file *filep, FAR char *buffer, size_t le
       report->point[0].flags  = TOUCH_MOVE | TOUCH_ID_VALID | TOUCH_POS_VALID;
     }
 
-  ivdbg("  id:      %d\n", report->point[0].id);
-  ivdbg("  flags:   %02x\n", report->point[0].flags);
-  ivdbg("  x:       %d\n", report->point[0].x);
-  ivdbg("  y:       %d\n", report->point[0].y);
+  iinfo("  id:      %d\n", report->point[0].id);
+  iinfo("  flags:   %02x\n", report->point[0].flags);
+  iinfo("  x:       %d\n", report->point[0].x);
+  iinfo("  y:       %d\n", report->point[0].y);
 
   ret = SIZEOF_TOUCH_SAMPLE_S(1);
 
 errout:
   sem_post(&priv->devsem);
-  ivdbg("Returning: %d\n", ret);
+  iinfo("Returning: %d\n", ret);
   return ret;
 }
 
@@ -980,7 +981,7 @@ static int ads7843e_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   FAR struct ads7843e_dev_s *priv;
   int                       ret;
 
-  ivdbg("cmd: %d arg: %ld\n", cmd, arg);
+  iinfo("cmd: %d arg: %ld\n", cmd, arg);
   DEBUGASSERT(filep);
   inode = filep->f_inode;
 
@@ -1040,7 +1041,7 @@ static int ads7843e_poll(FAR struct file *filep, FAR struct pollfd *fds,
   int ret;
   int i;
 
-  ivdbg("setup: %d\n", (int)setup);
+  iinfo("setup: %d\n", (int)setup);
   DEBUGASSERT(filep && fds);
   inode = filep->f_inode;
 
@@ -1156,7 +1157,7 @@ int ads7843e_register(FAR struct spi_dev_s *spi,
 #endif
   int ret;
 
-  ivdbg("spi: %p minor: %d\n", spi, minor);
+  iinfo("spi: %p minor: %d\n", spi, minor);
 
   /* Debug-only sanity checks */
 
@@ -1170,7 +1171,7 @@ int ads7843e_register(FAR struct spi_dev_s *spi,
   priv = (FAR struct ads7843e_dev_s *)kmm_malloc(sizeof(struct ads7843e_dev_s));
   if (!priv)
     {
-      idbg("kmm_malloc(%d) failed\n", sizeof(struct ads7843e_dev_s));
+      ierr("ERROR: kmm_malloc(%d) failed\n", sizeof(struct ads7843e_dev_s));
       return -ENOMEM;
     }
 #endif
@@ -1184,9 +1185,17 @@ int ads7843e_register(FAR struct spi_dev_s *spi,
   priv->threshx = INVALID_THRESHOLD; /* Initialize thresholding logic */
   priv->threshy = INVALID_THRESHOLD; /* Initialize thresholding logic */
 
+  /* Initialize semaphores */
+
   sem_init(&priv->devsem,  0, 1);    /* Initialize device structure semaphore */
   sem_init(&priv->waitsem, 0, 0);    /* Initialize pen event wait semaphore */
 
+  /* The pen event semaphore is used for signaling and, hence, should not
+   * have priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
+
   /* Make sure that interrupts are disabled */
 
   config->clear(config);
@@ -1197,12 +1206,12 @@ int ads7843e_register(FAR struct spi_dev_s *spi,
   ret = config->attach(config, ads7843e_interrupt);
   if (ret < 0)
     {
-      idbg("Failed to attach interrupt\n");
+      ierr("ERROR: Failed to attach interrupt\n");
       goto errout_with_priv;
     }
 
-  idbg("Mode: %d Bits: 8 Frequency: %d\n",
-       CONFIG_ADS7843E_SPIMODE, CONFIG_ADS7843E_FREQUENCY);
+  iinfo("Mode: %d Bits: 8 Frequency: %d\n",
+        CONFIG_ADS7843E_SPIMODE, CONFIG_ADS7843E_FREQUENCY);
 
   /* Lock the SPI bus so that we have exclusive access */
 
@@ -1219,12 +1228,12 @@ int ads7843e_register(FAR struct spi_dev_s *spi,
   /* Register the device as an input device */
 
   (void)snprintf(devname, DEV_NAMELEN, DEV_FORMAT, minor);
-  ivdbg("Registering %s\n", devname);
+  iinfo("Registering %s\n", devname);
 
   ret = register_driver(devname, &ads7843e_fops, 0666, priv);
   if (ret < 0)
     {
-      idbg("register_driver() failed: %d\n", ret);
+      ierr("ERROR: register_driver() failed: %d\n", ret);
       goto errout_with_priv;
     }
 
@@ -1246,7 +1255,7 @@ int ads7843e_register(FAR struct spi_dev_s *spi,
   ret = work_queue(HPWORK, &priv->work, ads7843e_worker, priv, 0);
   if (ret != 0)
     {
-      idbg("Failed to queue work: %d\n", ret);
+      ierr("ERROR: Failed to queue work: %d\n", ret);
       goto errout_with_priv;
     }
 
diff --git a/drivers/input/ajoystick.c b/drivers/input/ajoystick.c
index 6c916d9f398e44e6b578c904be0d574ab12ec773..aaba021b95bccf72750a5727b17500f2ded601a1 100644
--- a/drivers/input/ajoystick.c
+++ b/drivers/input/ajoystick.c
@@ -352,7 +352,7 @@ static void ajoy_sample(FAR struct ajoy_upperhalf_s *priv)
                   fds->revents |= (fds->events & POLLIN);
                   if (fds->revents != 0)
                     {
-                      ivdbg("Report events: %02x\n", fds->revents);
+                      iinfo("Report events: %02x\n", fds->revents);
                       sem_post(fds->sem);
                     }
                 }
@@ -414,7 +414,7 @@ static int ajoy_open(FAR struct file *filep)
   ret = ajoy_takesem(&priv->au_exclsem);
   if (ret < 0)
     {
-      ivdbg("ERROR: ajoy_takesem failed: %d\n", ret);
+      ierr("ERROR: ajoy_takesem failed: %d\n", ret);
       return ret;
     }
 
@@ -423,7 +423,7 @@ static int ajoy_open(FAR struct file *filep)
   opriv = (FAR struct ajoy_open_s *)kmm_zalloc(sizeof(struct ajoy_open_s));
   if (!opriv)
     {
-      ivdbg("ERROR: Failled to allocate open structure\n");
+      ierr("ERROR: Failled to allocate open structure\n");
       ret = -ENOMEM;
       goto errout_with_sem;
     }
@@ -502,7 +502,7 @@ static int ajoy_close(FAR struct file *filep)
   ret = ajoy_takesem(&priv->au_exclsem);
   if (ret < 0)
     {
-      ivdbg("ERROR: ajoy_takesem failed: %d\n", ret);
+      ierr("ERROR: ajoy_takesem failed: %d\n", ret);
       return ret;
     }
 
@@ -515,7 +515,7 @@ static int ajoy_close(FAR struct file *filep)
   DEBUGASSERT(curr);
   if (!curr)
     {
-      ivdbg("ERROR: Failed to find open entry\n");
+      ierr("ERROR: Failed to find open entry\n");
       ret = -ENOENT;
       goto errout_with_exclsem;
     }
@@ -570,7 +570,7 @@ static ssize_t ajoy_read(FAR struct file *filep, FAR char *buffer,
 
   if (len < sizeof(struct ajoy_sample_s))
     {
-      ivdbg("ERROR: buffer too small: %lu\n", (unsigned long)len);
+      ierr("ERROR: buffer too small: %lu\n", (unsigned long)len);
       return -EINVAL;
     }
 
@@ -579,7 +579,7 @@ static ssize_t ajoy_read(FAR struct file *filep, FAR char *buffer,
   ret = ajoy_takesem(&priv->au_exclsem);
   if (ret < 0)
     {
-      ivdbg("ERROR: ajoy_takesem failed: %d\n", ret);
+      ierr("ERROR: ajoy_takesem failed: %d\n", ret);
       return ret;
     }
 
@@ -620,7 +620,7 @@ static int ajoy_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   ret = ajoy_takesem(&priv->au_exclsem);
   if (ret < 0)
     {
-      ivdbg("ERROR: ajoy_takesem failed: %d\n", ret);
+      ierr("ERROR: ajoy_takesem failed: %d\n", ret);
       return ret;
     }
 
@@ -720,7 +720,7 @@ static int ajoy_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 #endif
 
     default:
-      ivdbg("ERROR: Unrecognized command: %ld\n", cmd);
+      ierr("ERROR: Unrecognized command: %ld\n", cmd);
       ret = -ENOTTY;
       break;
     }
@@ -754,7 +754,7 @@ static int ajoy_poll(FAR struct file *filep, FAR struct pollfd *fds,
   ret = ajoy_takesem(&priv->au_exclsem);
   if (ret < 0)
     {
-      ivdbg("ERROR: ajoy_takesem failed: %d\n", ret);
+      ierr("ERROR: ajoy_takesem failed: %d\n", ret);
       return ret;
     }
 
@@ -782,7 +782,7 @@ static int ajoy_poll(FAR struct file *filep, FAR struct pollfd *fds,
 
       if (i >= CONFIG_AJOYSTICK_NPOLLWAITERS)
         {
-          ivdbg("ERROR: Too man poll waiters\n");
+          ierr("ERROR: Too man poll waiters\n");
           fds->priv    = NULL;
           ret          = -EBUSY;
           goto errout_with_dusem;
@@ -794,10 +794,10 @@ static int ajoy_poll(FAR struct file *filep, FAR struct pollfd *fds,
 
       FAR struct pollfd **slot = (FAR struct pollfd **)fds->priv;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       if (!slot)
         {
-          ivdbg("ERROR: Poll slot not found\n");
+          ierr("ERROR: Poll slot not found\n");
           ret = -EIO;
           goto errout_with_dusem;
         }
@@ -856,7 +856,7 @@ int ajoy_register(FAR const char *devname,
 
   if (!priv)
     {
-      ivdbg("ERROR: Failed to allocate device structure\n");
+      ierr("ERROR: Failed to allocate device structure\n");
       return -ENOMEM;
     }
 
@@ -878,7 +878,7 @@ int ajoy_register(FAR const char *devname,
   ret = register_driver(devname, &ajoy_fops, 0666, priv);
   if (ret < 0)
     {
-      ivdbg("ERROR: register_driver failed: %d\n", ret);
+      ierr("ERROR: register_driver failed: %d\n", ret);
       goto errout_with_priv;
     }
 
diff --git a/drivers/input/button_lower.c b/drivers/input/button_lower.c
index 868e1681a61249b168029f07d46e3c5daae95ddc..b2b830f8f56f614f991cf1da090b4594dbf1e4e1 100644
--- a/drivers/input/button_lower.c
+++ b/drivers/input/button_lower.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/input/button_lower.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -64,7 +64,7 @@ static void btn_enable(FAR const struct btn_lowerhalf_s *lower,
                        btn_handler_t handler, FAR void *arg);
 
 static void btn_disable(void);
-static int btn_interrupt(int irq, FAR void *context);
+static int btn_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /****************************************************************************
  * Private Data
@@ -98,7 +98,7 @@ static FAR void *g_btnarg;
 
 static btn_buttonset_t btn_supported(FAR const struct btn_lowerhalf_s *lower)
 {
-  ivdbg("NUM_BUTTONS: %02x\n", NUM_BUTTONS);
+  iinfo("NUM_BUTTONS: %02x\n", NUM_BUTTONS);
   return (btn_buttonset_t)((1 << NUM_BUTTONS) - 1);
 }
 
@@ -138,8 +138,8 @@ static void btn_enable(FAR const struct btn_lowerhalf_s *lower,
   flags = enter_critical_section();
   btn_disable();
 
-  illvdbg("press: %02x release: %02x handler: %p arg: %p\n",
-          press, release, handler, arg);
+  iinfo("press: %02x release: %02x handler: %p arg: %p\n",
+        press, release, handler, arg);
 
   /* If no events are indicated or if no handler is provided, then this
    * must really be a request to disable interrupts.
@@ -159,7 +159,7 @@ static void btn_enable(FAR const struct btn_lowerhalf_s *lower,
           mask = (1 << id);
           if ((either & mask) != 0)
             {
-              (void)board_button_irq(id, btn_interrupt);
+              (void)board_button_irq(id, btn_interrupt, NULL);
             }
         }
     }
@@ -185,7 +185,7 @@ static void btn_disable(void)
   flags = enter_critical_section();
   for (id = 0; id < NUM_BUTTONS; id++)
     {
-      (void)board_button_irq(id, NULL);
+      (void)board_button_irq(id, NULL, NULL);
     }
 
   /* Nullify the handler and argument */
@@ -203,7 +203,7 @@ static void btn_disable(void)
  *
  ****************************************************************************/
 
-static int btn_interrupt(int irq, FAR void *context)
+static int btn_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   DEBUGASSERT(g_btnhandler);
 
diff --git a/drivers/input/button_upper.c b/drivers/input/button_upper.c
index 5eadfd87e3b57daf34d9d6b2e677b0ede7f4c15d..2c03d3de3e0c7f39bba6bcc678fb8f865e4003fc 100644
--- a/drivers/input/button_upper.c
+++ b/drivers/input/button_upper.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/input/button_upper.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -230,8 +230,8 @@ static void btn_enable(FAR struct btn_upperhalf_s *priv)
             {
               /* Yes.. OR in the poll event buttons */
 
-              press   |= opriv->bo_pollevents.ap_press;
-              release |= opriv->bo_pollevents.ap_release;
+              press   |= opriv->bo_pollevents.bp_press;
+              release |= opriv->bo_pollevents.bp_release;
               break;
             }
         }
@@ -322,8 +322,8 @@ static void btn_sample(FAR struct btn_upperhalf_s *priv)
    * newly released.
    */
 
-  change  = sample ^ priv->bu_sample;
-  press   = change & sample;
+  change = sample ^ priv->bu_sample;
+  press  = change & sample;
 
   DEBUGASSERT(lower->bl_supported);
   release = change & (lower->bl_supported(lower) & ~sample);
@@ -335,8 +335,8 @@ static void btn_sample(FAR struct btn_upperhalf_s *priv)
 #ifndef CONFIG_DISABLE_POLL
       /* Have any poll events occurred? */
 
-      if ((press & opriv->bo_pollevents.ap_press)     != 0 ||
-          (release & opriv->bo_pollevents.ap_release) != 0)
+      if ((press & opriv->bo_pollevents.bp_press)     != 0 ||
+          (release & opriv->bo_pollevents.bp_release) != 0)
         {
           /* Yes.. Notify all waiters */
 
@@ -348,7 +348,7 @@ static void btn_sample(FAR struct btn_upperhalf_s *priv)
                   fds->revents |= (fds->events & POLLIN);
                   if (fds->revents != 0)
                     {
-                      ivdbg("Report events: %02x\n", fds->revents);
+                      iinfo("Report events: %02x\n", fds->revents);
                       sem_post(fds->sem);
                     }
                 }
@@ -410,7 +410,7 @@ static int btn_open(FAR struct file *filep)
   ret = btn_takesem(&priv->bu_exclsem);
   if (ret < 0)
     {
-      ivdbg("ERROR: btn_takesem failed: %d\n", ret);
+      ierr("ERROR: btn_takesem failed: %d\n", ret);
       return ret;
     }
 
@@ -419,7 +419,7 @@ static int btn_open(FAR struct file *filep)
   opriv = (FAR struct btn_open_s *)kmm_zalloc(sizeof(struct btn_open_s));
   if (!opriv)
     {
-      ivdbg("ERROR: Failled to allocate open structure\n");
+      ierr("ERROR: Failled to allocate open structure\n");
       ret = -ENOMEM;
       goto errout_with_sem;
     }
@@ -431,8 +431,8 @@ static int btn_open(FAR struct file *filep)
   DEBUGASSERT(lower && lower->bl_supported);
   supported = lower->bl_supported(lower);
 
-  opriv->bo_pollevents.ap_press   = supported;
-  opriv->bo_pollevents.ap_release = supported;
+  opriv->bo_pollevents.bp_press   = supported;
+  opriv->bo_pollevents.bp_release = supported;
 #endif
 
   /* Attach the open structure to the device */
@@ -498,7 +498,7 @@ static int btn_close(FAR struct file *filep)
   ret = btn_takesem(&priv->bu_exclsem);
   if (ret < 0)
     {
-      ivdbg("ERROR: btn_takesem failed: %d\n", ret);
+      ierr("ERROR: btn_takesem failed: %d\n", ret);
       return ret;
     }
 
@@ -511,7 +511,7 @@ static int btn_close(FAR struct file *filep)
   DEBUGASSERT(curr);
   if (!curr)
     {
-      ivdbg("ERROR: Failed to find open entry\n");
+      ierr("ERROR: Failed to find open entry\n");
       ret = -ENOENT;
       goto errout_with_exclsem;
     }
@@ -566,7 +566,7 @@ static ssize_t btn_read(FAR struct file *filep, FAR char *buffer,
 
   if (len < sizeof(btn_buttonset_t))
     {
-      ivdbg("ERROR: buffer too small: %lu\n", (unsigned long)len);
+      ierr("ERROR: buffer too small: %lu\n", (unsigned long)len);
       return -EINVAL;
     }
 
@@ -575,7 +575,7 @@ static ssize_t btn_read(FAR struct file *filep, FAR char *buffer,
   ret = btn_takesem(&priv->bu_exclsem);
   if (ret < 0)
     {
-      ivdbg("ERROR: btn_takesem failed: %d\n", ret);
+      ierr("ERROR: btn_takesem failed: %d\n", ret);
       return ret;
     }
 
@@ -612,7 +612,7 @@ static int btn_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   ret = btn_takesem(&priv->bu_exclsem);
   if (ret < 0)
     {
-      ivdbg("ERROR: btn_takesem failed: %d\n", ret);
+      ierr("ERROR: btn_takesem failed: %d\n", ret);
       return ret;
     }
 
@@ -664,8 +664,8 @@ static int btn_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
           {
             /* Save the poll events */
 
-            opriv->bo_pollevents.ap_press   = pollevents->ap_press;
-            opriv->bo_pollevents.ap_release = pollevents->ap_release;
+            opriv->bo_pollevents.bp_press   = pollevents->bp_press;
+            opriv->bo_pollevents.bp_release = pollevents->bp_release;
 
             /* Enable/disable interrupt handling */
 
@@ -712,7 +712,7 @@ static int btn_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 #endif
 
     default:
-      ivdbg("ERROR: Unrecognized command: %ld\n", cmd);
+      ierr("ERROR: Unrecognized command: %ld\n", cmd);
       ret = -ENOTTY;
       break;
     }
@@ -746,7 +746,7 @@ static int btn_poll(FAR struct file *filep, FAR struct pollfd *fds,
   ret = btn_takesem(&priv->bu_exclsem);
   if (ret < 0)
     {
-      ivdbg("ERROR: btn_takesem failed: %d\n", ret);
+      ierr("ERROR: btn_takesem failed: %d\n", ret);
       return ret;
     }
 
@@ -774,7 +774,7 @@ static int btn_poll(FAR struct file *filep, FAR struct pollfd *fds,
 
       if (i >= CONFIG_BUTTONS_NPOLLWAITERS)
         {
-          ivdbg("ERROR: Too man poll waiters\n");
+          ierr("ERROR: Too man poll waiters\n");
           fds->priv    = NULL;
           ret          = -EBUSY;
           goto errout_with_dusem;
@@ -786,10 +786,10 @@ static int btn_poll(FAR struct file *filep, FAR struct pollfd *fds,
 
       FAR struct pollfd **slot = (FAR struct pollfd **)fds->priv;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       if (!slot)
         {
-          ivdbg("ERROR: Poll slot not found\n");
+          ierr("ERROR: Poll slot not found\n");
           ret = -EIO;
           goto errout_with_dusem;
         }
@@ -847,7 +847,7 @@ int btn_register(FAR const char *devname,
 
   if (!priv)
     {
-      ivdbg("ERROR: Failed to allocate device structure\n");
+      ierr("ERROR: Failed to allocate device structure\n");
       return -ENOMEM;
     }
 
@@ -869,7 +869,7 @@ int btn_register(FAR const char *devname,
   ret = register_driver(devname, &btn_fops, 0666, priv);
   if (ret < 0)
     {
-      ivdbg("ERROR: register_driver failed: %d\n", ret);
+      ierr("ERROR: register_driver failed: %d\n", ret);
       goto errout_with_priv;
     }
 
diff --git a/drivers/input/djoystick.c b/drivers/input/djoystick.c
index 5ea4cd7d28d54eeb16d6f1900e63b97fe17a88bf..1cc1b540045d5054616c4b957ccce6e0d87df63b 100644
--- a/drivers/input/djoystick.c
+++ b/drivers/input/djoystick.c
@@ -352,7 +352,7 @@ static void djoy_sample(FAR struct djoy_upperhalf_s *priv)
                   fds->revents |= (fds->events & POLLIN);
                   if (fds->revents != 0)
                     {
-                      illvdbg("Report events: %02x\n", fds->revents);
+                      iinfo("Report events: %02x\n", fds->revents);
                       sem_post(fds->sem);
                     }
                 }
@@ -414,7 +414,7 @@ static int djoy_open(FAR struct file *filep)
   ret = djoy_takesem(&priv->du_exclsem);
   if (ret < 0)
     {
-      ivdbg("ERROR: djoy_takesem failed: %d\n", ret);
+      ierr("ERROR: djoy_takesem failed: %d\n", ret);
       return ret;
     }
 
@@ -423,7 +423,7 @@ static int djoy_open(FAR struct file *filep)
   opriv = (FAR struct djoy_open_s *)kmm_zalloc(sizeof(struct djoy_open_s));
   if (!opriv)
     {
-      ivdbg("ERROR: Failled to allocate open structure\n");
+      ierr("ERROR: Failled to allocate open structure\n");
       ret = -ENOMEM;
       goto errout_with_sem;
     }
@@ -502,7 +502,7 @@ static int djoy_close(FAR struct file *filep)
   ret = djoy_takesem(&priv->du_exclsem);
   if (ret < 0)
     {
-      ivdbg("ERROR: djoy_takesem failed: %d\n", ret);
+      ierr("ERROR: djoy_takesem failed: %d\n", ret);
       return ret;
     }
 
@@ -515,7 +515,7 @@ static int djoy_close(FAR struct file *filep)
   DEBUGASSERT(curr);
   if (!curr)
     {
-      ivdbg("ERROR: Failed to find open entry\n");
+      ierr("ERROR: Failed to find open entry\n");
       ret = -ENOENT;
       goto errout_with_exclsem;
     }
@@ -568,7 +568,7 @@ static ssize_t djoy_read(FAR struct file *filep, FAR char *buffer,
 
   if (len < sizeof(djoy_buttonset_t))
     {
-      ivdbg("ERROR: buffer too small: %lu\n", (unsigned long)len);
+      ierr("ERROR: buffer too small: %lu\n", (unsigned long)len);
       return -EINVAL;
     }
 
@@ -577,7 +577,7 @@ static ssize_t djoy_read(FAR struct file *filep, FAR char *buffer,
   ret = djoy_takesem(&priv->du_exclsem);
   if (ret < 0)
     {
-      ivdbg("ERROR: djoy_takesem failed: %d\n", ret);
+      ierr("ERROR: djoy_takesem failed: %d\n", ret);
       return ret;
     }
 
@@ -616,7 +616,7 @@ static int djoy_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   ret = djoy_takesem(&priv->du_exclsem);
   if (ret < 0)
     {
-      ivdbg("ERROR: djoy_takesem failed: %d\n", ret);
+      ierr("ERROR: djoy_takesem failed: %d\n", ret);
       return ret;
     }
 
@@ -716,7 +716,7 @@ static int djoy_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 #endif
 
     default:
-      ivdbg("ERROR: Unrecognized command: %ld\n", cmd);
+      ierr("ERROR: Unrecognized command: %ld\n", cmd);
       ret = -ENOTTY;
       break;
     }
@@ -750,7 +750,7 @@ static int djoy_poll(FAR struct file *filep, FAR struct pollfd *fds,
   ret = djoy_takesem(&priv->du_exclsem);
   if (ret < 0)
     {
-      ivdbg("ERROR: djoy_takesem failed: %d\n", ret);
+      ierr("ERROR: djoy_takesem failed: %d\n", ret);
       return ret;
     }
 
@@ -778,7 +778,7 @@ static int djoy_poll(FAR struct file *filep, FAR struct pollfd *fds,
 
       if (i >= CONFIG_DJOYSTICK_NPOLLWAITERS)
         {
-          ivdbg("ERROR: Too man poll waiters\n");
+          ierr("ERROR: Too man poll waiters\n");
           fds->priv    = NULL;
           ret          = -EBUSY;
           goto errout_with_dusem;
@@ -790,10 +790,10 @@ static int djoy_poll(FAR struct file *filep, FAR struct pollfd *fds,
 
       FAR struct pollfd **slot = (FAR struct pollfd **)fds->priv;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       if (!slot)
         {
-          ivdbg("ERROR: Poll slot not found\n");
+          ierr("ERROR: Poll slot not found\n");
           ret = -EIO;
           goto errout_with_dusem;
         }
@@ -852,7 +852,7 @@ int djoy_register(FAR const char *devname,
 
   if (!priv)
     {
-      ivdbg("ERROR: Failed to allocate device structure\n");
+      ierr("ERROR: Failed to allocate device structure\n");
       return -ENOMEM;
     }
 
@@ -874,7 +874,7 @@ int djoy_register(FAR const char *devname,
   ret = register_driver(devname, &djoy_fops, 0666, priv);
   if (ret < 0)
     {
-      ivdbg("ERROR: register_driver failed: %d\n", ret);
+      ierr("ERROR: register_driver failed: %d\n", ret);
       sem_destroy(&priv->du_exclsem);
       kmm_free(priv);
     }
diff --git a/drivers/input/max11802.c b/drivers/input/max11802.c
index 2c3c1f7813307a249bf480cbcc5d78c25c4abc68..82ad1f6689354f6ea7ef595aa8600da0b2982994 100644
--- a/drivers/input/max11802.c
+++ b/drivers/input/max11802.c
@@ -65,6 +65,7 @@
 #include 
 #include 
 
+#include 
 #include 
 #include 
 
@@ -244,7 +245,7 @@ static uint16_t max11802_sendcmd(FAR struct max11802_dev_s *priv,
   *tags = result & 0xF;
   result >>= 4; /* Get rid of tags */
 
-  ivdbg("cmd:%02x response:%04x\n", cmd, result);
+  iinfo("cmd:%02x response:%04x\n", cmd, result);
   return result;
 }
 
@@ -284,7 +285,7 @@ static void max11802_notify(FAR struct max11802_dev_s *priv)
       if (fds)
         {
           fds->revents |= POLLIN;
-          ivdbg("Report events: %02x\n", fds->revents);
+          iinfo("Report events: %02x\n", fds->revents);
           sem_post(fds->sem);
         }
     }
@@ -381,7 +382,7 @@ static int max11802_waitsample(FAR struct max11802_dev_s *priv,
     {
       /* Wait for a change in the MAX11802 state */
 
-      ivdbg("Waiting..\n");
+      iinfo("Waiting..\n");
       priv->nwaiters++;
       ret = sem_wait(&priv->waitsem);
       priv->nwaiters--;
@@ -392,14 +393,14 @@ static int max11802_waitsample(FAR struct max11802_dev_s *priv,
            * the failure now.
            */
 
-          idbg("sem_wait: %d\n", errno);
+          ierr("ERROR: sem_wait: %d\n", errno);
           DEBUGASSERT(errno == EINTR);
           ret = -EINTR;
           goto errout;
         }
     }
 
-  ivdbg("Sampled\n");
+  iinfo("Sampled\n");
 
   /* Re-acquire the semaphore that manages mutually exclusive access to
    * the device structure.  We may have to wait here.  But we have our
@@ -463,7 +464,7 @@ static int max11802_schedule(FAR struct max11802_dev_s *priv)
   ret = work_queue(HPWORK, &priv->work, max11802_worker, priv, 0);
   if (ret != 0)
     {
-      illdbg("Failed to queue work: %d\n", ret);
+      ierr("ERROR: Failed to queue work: %d\n", ret);
     }
 
   return OK;
@@ -540,11 +541,11 @@ static void max11802_worker(FAR void *arg)
 
   if (pendown)
     {
-      ivdbg("\nPD\n");
+      iinfo("\nPD\n");
     }
   else
     {
-      ivdbg("\nPU\n");
+      iinfo("\nPU\n");
     }
 
   if (!pendown)
@@ -559,7 +560,7 @@ static void max11802_worker(FAR void *arg)
        * reported).
        */
 
-      ivdbg("\nPC%d\n", priv->sample.contact);
+      iinfo("\nPC%d\n", priv->sample.contact);
 
       if (priv->sample.contact == CONTACT_NONE ||
           priv->sample.contact == CONTACT_UP)
@@ -589,7 +590,7 @@ static void max11802_worker(FAR void *arg)
        * again later.
        */
 
-       ivdbg("Previous pen up event still in buffer\n");
+       iinfo("Previous pen up event still in buffer\n");
        max11802_notify(priv);
        wd_start(priv->wdog, MAX11802_WDOG_DELAY, max11802_wdog, 1,
                 (uint32_t)priv);
@@ -636,7 +637,7 @@ static void max11802_worker(FAR void *arg)
 
       if ((tags & 0x03) != 0)
         {
-          ivdbg("Touch ended before measurement\n");
+          iinfo("Touch ended before measurement\n");
           goto ignored;
         }
 
@@ -755,7 +756,7 @@ static int max11802_open(FAR struct file *filep)
   uint8_t                   tmp;
   int                       ret;
 
-  ivdbg("Opening\n");
+  iinfo("Opening\n");
 
   DEBUGASSERT(filep);
   inode = filep->f_inode;
@@ -797,7 +798,7 @@ errout_with_sem:
   sem_post(&priv->devsem);
   return ret;
 #else
-  ivdbg("Opening\n");
+  iinfo("Opening\n");
   return OK;
 #endif
 }
@@ -813,7 +814,7 @@ static int max11802_close(FAR struct file *filep)
   FAR struct max11802_dev_s *priv;
   int                       ret;
 
-  ivdbg("Closing\n");
+  iinfo("Closing\n");
   DEBUGASSERT(filep);
   inode = filep->f_inode;
 
@@ -843,7 +844,7 @@ static int max11802_close(FAR struct file *filep)
 
   sem_post(&priv->devsem);
 #endif
-  ivdbg("Closing\n");
+  iinfo("Closing\n");
   return OK;
 }
 
@@ -860,7 +861,7 @@ static ssize_t max11802_read(FAR struct file *filep, FAR char *buffer,
   struct max11802_sample_s   sample;
   int                        ret;
 
-  ivdbg("buffer:%p len:%d\n", buffer, len);
+  iinfo("buffer:%p len:%d\n", buffer, len);
   DEBUGASSERT(filep);
   inode = filep->f_inode;
 
@@ -877,7 +878,7 @@ static ssize_t max11802_read(FAR struct file *filep, FAR char *buffer,
        * handle smaller reads... but why?
        */
 
-      idbg("Unsupported read size: %d\n", len);
+      ierr("ERROR: Unsupported read size: %d\n", len);
       return -ENOSYS;
     }
 
@@ -888,7 +889,7 @@ static ssize_t max11802_read(FAR struct file *filep, FAR char *buffer,
     {
       /* This should only happen if the wait was cancelled by an signal */
 
-      idbg("sem_wait: %d\n", errno);
+      ierr("ERROR: sem_wait: %d\n", errno);
       DEBUGASSERT(errno == EINTR);
       return -EINTR;
     }
@@ -903,7 +904,7 @@ static ssize_t max11802_read(FAR struct file *filep, FAR char *buffer,
        * option, then just return an error.
        */
 
-      ivdbg("Sample data is not available\n");
+      iinfo("Sample data is not available\n");
       if (filep->f_oflags & O_NONBLOCK)
         {
           ret = -EAGAIN;
@@ -917,7 +918,7 @@ static ssize_t max11802_read(FAR struct file *filep, FAR char *buffer,
         {
           /* We might have been awakened by a signal */
 
-          idbg("max11802_waitsample: %d\n", ret);
+          ierr("ERROR: max11802_waitsample: %d\n", ret);
           goto errout;
         }
     }
@@ -964,16 +965,16 @@ static ssize_t max11802_read(FAR struct file *filep, FAR char *buffer,
       report->point[0].flags  = TOUCH_MOVE | TOUCH_ID_VALID | TOUCH_POS_VALID;
     }
 
-  ivdbg("  id:      %d\n", report->point[0].id);
-  ivdbg("  flags:   %02x\n", report->point[0].flags);
-  ivdbg("  x:       %d\n", report->point[0].x);
-  ivdbg("  y:       %d\n", report->point[0].y);
+  iinfo("  id:      %d\n", report->point[0].id);
+  iinfo("  flags:   %02x\n", report->point[0].flags);
+  iinfo("  x:       %d\n", report->point[0].x);
+  iinfo("  y:       %d\n", report->point[0].y);
 
   ret = SIZEOF_TOUCH_SAMPLE_S(1);
 
 errout:
   sem_post(&priv->devsem);
-  ivdbg("Returning: %d\n", ret);
+  iinfo("Returning: %d\n", ret);
   return ret;
 }
 
@@ -987,7 +988,7 @@ static int max11802_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   FAR struct max11802_dev_s *priv;
   int                       ret;
 
-  ivdbg("cmd: %d arg: %ld\n", cmd, arg);
+  iinfo("cmd: %d arg: %ld\n", cmd, arg);
   DEBUGASSERT(filep);
   inode = filep->f_inode;
 
@@ -1047,7 +1048,7 @@ static int max11802_poll(FAR struct file *filep, FAR struct pollfd *fds,
   int ret;
   int i;
 
-  ivdbg("setup: %d\n", (int)setup);
+  iinfo("setup: %d\n", (int)setup);
   DEBUGASSERT(filep && fds);
   inode = filep->f_inode;
 
@@ -1159,7 +1160,7 @@ int max11802_register(FAR struct spi_dev_s *spi,
 #endif
   int ret;
 
-  ivdbg("spi: %p minor: %d\n", spi, minor);
+  iinfo("spi: %p minor: %d\n", spi, minor);
 
   /* Debug-only sanity checks */
 
@@ -1173,7 +1174,7 @@ int max11802_register(FAR struct spi_dev_s *spi,
   priv = (FAR struct max11802_dev_s *)kmm_malloc(sizeof(struct max11802_dev_s));
   if (!priv)
     {
-      idbg("kmm_malloc(%d) failed\n", sizeof(struct max11802_dev_s));
+      ierr("ERROR: kmm_malloc(%d) failed\n", sizeof(struct max11802_dev_s));
       return -ENOMEM;
     }
 #endif
@@ -1187,9 +1188,17 @@ int max11802_register(FAR struct spi_dev_s *spi,
   priv->threshx = INVALID_THRESHOLD; /* Initialize thresholding logic */
   priv->threshy = INVALID_THRESHOLD; /* Initialize thresholding logic */
 
+  /* Initialize semaphores */
+
   sem_init(&priv->devsem,  0, 1);    /* Initialize device structure semaphore */
   sem_init(&priv->waitsem, 0, 0);    /* Initialize pen event wait semaphore */
 
+  /* The pen event semaphore is used for signaling and, hence, should not
+   * have priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
+
   /* Make sure that interrupts are disabled */
 
   config->clear(config);
@@ -1200,12 +1209,12 @@ int max11802_register(FAR struct spi_dev_s *spi,
   ret = config->attach(config, max11802_interrupt);
   if (ret < 0)
     {
-      idbg("Failed to attach interrupt\n");
+      ierr("ERROR: Failed to attach interrupt\n");
       goto errout_with_priv;
     }
 
-  idbg("Mode: %d Bits: 8 Frequency: %d\n",
-       CONFIG_MAX11802_SPIMODE, CONFIG_MAX11802_FREQUENCY);
+  iinfo("Mode: %d Bits: 8 Frequency: %d\n",
+        CONFIG_MAX11802_SPIMODE, CONFIG_MAX11802_FREQUENCY);
 
   /* Lock the SPI bus so that we have exclusive access */
 
@@ -1246,19 +1255,19 @@ int max11802_register(FAR struct spi_dev_s *spi,
 
   if (ret != MAX11802_MODE)
   {
-    idbg("max11802 mode readback failed: %02x\n", ret);
+    ierr("ERROR: max11802 mode readback failed: %02x\n", ret);
     goto errout_with_priv;
   }
 
   /* Register the device as an input device */
 
   (void)snprintf(devname, DEV_NAMELEN, DEV_FORMAT, minor);
-  ivdbg("Registering %s\n", devname);
+  iinfo("Registering %s\n", devname);
 
   ret = register_driver(devname, &max11802_fops, 0666, priv);
   if (ret < 0)
     {
-      idbg("register_driver() failed: %d\n", ret);
+      ierr("ERROR: register_driver() failed: %d\n", ret);
       goto errout_with_priv;
     }
 
@@ -1281,7 +1290,7 @@ int max11802_register(FAR struct spi_dev_s *spi,
   ret = work_queue(HPWORK, &priv->work, max11802_worker, priv, 0);
   if (ret != 0)
     {
-      idbg("Failed to queue work: %d\n", ret);
+      ierr("ERROR: Failed to queue work: %d\n", ret);
       goto errout_with_priv;
     }
 
diff --git a/drivers/input/mxt.c b/drivers/input/mxt.c
index 1b370e9579be5154753636c5615bbd833c89f5d6..f19c2bb0be5e56165aafe45d2d18b973f32dd7c7 100644
--- a/drivers/input/mxt.c
+++ b/drivers/input/mxt.c
@@ -41,8 +41,8 @@
 
 /* Suppress verbose debug output so that we don't swamp the system */
 
-#ifdef CONFIG_MXT_DISABLE_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_VERBOSE
+#ifdef CONFIG_MXT_DISABLE_CONFIG_DEBUG_INFO
+#  undef CONFIG_DEBUG_INFO
 #endif
 
 #include 
@@ -65,6 +65,7 @@
 #include 
 #include 
 
+#include 
 #include 
 #include 
 
@@ -255,7 +256,7 @@ static void mxt_touch_event(FAR struct mxt_dev_s *priv,
               FAR struct mxt_msg_s *msg, int ndx);
 static void mxt_worker(FAR void *arg);
 static int  mxt_interrupt(FAR const struct mxt_lower_s *lower,
-              FAR void *arg);
+              FAR void *context);
 
 /* Character driver methods */
 
@@ -312,7 +313,7 @@ static int mxt_getreg(FAR struct mxt_dev_s *priv, uint16_t regaddr,
 
   for (retries = 1; retries <= 3; retries++)
     {
-      ivdbg("retries=%d regaddr=%04x buflen=%d\n", retries, regaddr, buflen);
+      iinfo("retries=%d regaddr=%04x buflen=%d\n", retries, regaddr, buflen);
 
       /* Set up to write the address */
 
@@ -343,16 +344,16 @@ static int mxt_getreg(FAR struct mxt_dev_s *priv, uint16_t regaddr,
 #ifdef CONFIG_I2C_RESET
           /* Perhaps the I2C bus is locked up?  Try to shake the bus free */
 
-          idbg("WARNING: I2C_TRANSFER failed: %d ... Resetting\n", ret);
+          iwarn("WARNING: I2C_TRANSFER failed: %d ... Resetting\n", ret);
 
           ret = I2C_RESET(priv->i2c);
           if (ret < 0)
             {
-              idbg("ERROR: I2C_RESET failed: %d\n", ret);
+              ierr("ERROR: I2C_RESET failed: %d\n", ret);
               break;
             }
 #else
-          idbg("ERROR: I2C_TRANSFER failed: %d\n", ret);
+          ierr("ERROR: I2C_TRANSFER failed: %d\n", ret);
 #endif
         }
       else
@@ -386,7 +387,7 @@ static int mxt_putreg(FAR struct mxt_dev_s *priv, uint16_t regaddr,
 
   for (retries = 1; retries <= 3; retries++)
     {
-      ivdbg("retries=%d regaddr=%04x buflen=%d\n", retries, regaddr, buflen);
+      iinfo("retries=%d regaddr=%04x buflen=%d\n", retries, regaddr, buflen);
 
       /* Set up to write the address */
 
@@ -417,15 +418,15 @@ static int mxt_putreg(FAR struct mxt_dev_s *priv, uint16_t regaddr,
 #ifdef CONFIG_I2C_RESET
           /* Perhaps the I2C bus is locked up?  Try to shake the bus free */
 
-          idbg("WARNING: I2C_TRANSFER failed: %d ... Resetting\n", ret);
+          iwarn("WARNING: I2C_TRANSFER failed: %d ... Resetting\n", ret);
 
           ret = I2C_RESET(priv->i2c);
           if (ret < 0)
             {
-              idbg("ERROR: I2C_RESET failed: %d\n", ret);
+              ierr("ERROR: I2C_RESET failed: %d\n", ret);
             }
 #else
-          idbg("ERROR: I2C_TRANSFER failed: %d\n", ret);
+          ierr("ERROR: I2C_TRANSFER failed: %d\n", ret);
 #endif
         }
       else
@@ -466,7 +467,7 @@ static FAR struct mxt_object_s *mxt_object(FAR struct mxt_dev_s *priv,
         }
     }
 
-  idbg("ERROR: Invalid object type: %d\n", type);
+  ierr("ERROR: Invalid object type: %d\n", type);
   return NULL;
 }
 
@@ -483,7 +484,7 @@ static int mxt_getmessage(FAR struct mxt_dev_s *priv,
   object = mxt_object(priv, MXT_GEN_MESSAGE_T5);
   if (object == NULL)
     {
-      idbg("ERROR: mxt_object failed\n");
+      ierr("ERROR: mxt_object failed\n");
       return -EINVAL;
     }
 
@@ -558,7 +559,7 @@ static int mxt_flushmsgs(FAR struct mxt_dev_s *priv)
       ret = mxt_getmessage(priv, &msg);
       if (ret < 0)
         {
-          idbg("ERROR: mxt_getmessage failed: %d\n", ret);
+          ierr("ERROR: mxt_getmessage failed: %d\n", ret);
           return ret;
         }
     }
@@ -568,7 +569,7 @@ static int mxt_flushmsgs(FAR struct mxt_dev_s *priv)
 
   if (retries <= 0)
     {
-      idbg("ERROR: Failed to clear messages: ID=%02x\n", msg.id);
+      ierr("ERROR: Failed to clear messages: ID=%02x\n", msg.id);
       return -EBUSY;
     }
 
@@ -611,7 +612,7 @@ static void mxt_notify(FAR struct mxt_dev_s *priv)
       if (fds)
         {
           fds->revents |= POLLIN;
-          ivdbg("Report events: %02x\n", fds->revents);
+          iinfo("Report events: %02x\n", fds->revents);
           sem_post(fds->sem);
         }
     }
@@ -796,7 +797,7 @@ static void mxt_touch_event(FAR struct mxt_dev_s *priv,
   pressure = msg->body[5];
 
   status = msg->body[0];
-  ivdbg("ndx=%u status=%02x pos(%u,%u) area=%u pressure=%u\n",
+  iinfo("ndx=%u status=%02x pos(%u,%u) area=%u pressure=%u\n",
         ndx, status, x, y, area, pressure);
 
   /* The normal sequence that we would see for a touch would be something
@@ -998,7 +999,7 @@ static void mxt_worker(FAR void *arg)
       ret = mxt_getmessage(priv, &msg);
       if (ret < 0)
         {
-          idbg("ERROR: mxt_getmessage failed: %d\n", ret);
+          ierr("ERROR: mxt_getmessage failed: %d\n", ret);
           goto errout_with_semaphore;
         }
 
@@ -1017,7 +1018,7 @@ static void mxt_worker(FAR void *arg)
                   ((uint32_t)msg.body[2] << 8) |
                   ((uint32_t)msg.body[3] << 16);
 
-          ivdbg("T6: status: %02x checksum: %06lx\n",
+          iinfo("T6: status: %02x checksum: %06lx\n",
                 status, (unsigned long)chksum);
 
           retries = 0;
@@ -1049,7 +1050,7 @@ static void mxt_worker(FAR void *arg)
 
       else if (msg.id != 0xff)
         {
-          ivdbg("Ignored: id=%u message={%02x %02x %02x %02x %02x %02x %02x}\n",
+          iinfo("Ignored: id=%u message={%02x %02x %02x %02x %02x %02x %02x}\n",
                 msg.id, msg.body[0], msg.body[1], msg.body[2], msg.body[3],
                 msg.body[4], msg.body[5], msg.body[6]);
 
@@ -1097,7 +1098,7 @@ static int mxt_interrupt(FAR const struct mxt_lower_s *lower, FAR void *arg)
   ret = work_queue(HPWORK, &priv->work, mxt_worker, priv, 0);
   if (ret != 0)
     {
-      illdbg("Failed to queue work: %d\n", ret);
+      ierr("ERROR: Failed to queue work: %d\n", ret);
     }
 
   /* Clear any pending interrupts and return success */
@@ -1141,7 +1142,7 @@ static int mxt_open(FAR struct file *filep)
     {
       /* More than 255 opens; uint8_t overflows to zero */
 
-      idbg("ERROR: Too many opens: %d\n", priv->crefs);
+      ierr("ERROR: Too many opens: %d\n", priv->crefs);
       ret = -EMFILE;
       goto errout_with_sem;
     }
@@ -1157,7 +1158,7 @@ static int mxt_open(FAR struct file *filep)
       ret = mxt_putobject(priv, MXT_TOUCH_MULTI_T9, MXT_TOUCH_CTRL, 0x83);
       if (ret < 0)
         {
-          idbg("ERROR: Failed to enable touch: %d\n", ret);
+          ierr("ERROR: Failed to enable touch: %d\n", ret);
           goto errout_with_sem;
         }
 
@@ -1169,7 +1170,7 @@ static int mxt_open(FAR struct file *filep)
       ret = mxt_flushmsgs(priv);
       if (ret < 0)
         {
-          idbg("ERROR: mxt_flushmsgs failed: %d\n", ret);
+          ierr("ERROR: mxt_flushmsgs failed: %d\n", ret);
           mxt_putobject(priv, MXT_TOUCH_MULTI_T9, MXT_TOUCH_CTRL, 0);
           goto errout_with_sem;
         }
@@ -1233,7 +1234,7 @@ static int mxt_close(FAR struct file *filep)
           ret = mxt_putobject(priv, MXT_TOUCH_MULTI_T9, MXT_TOUCH_CTRL, 0);
           if (ret < 0)
             {
-              idbg("ERROR: Failed to disable touch: %d\n", ret);
+              ierr("ERROR: Failed to disable touch: %d\n", ret);
             }
         }
     }
@@ -1490,7 +1491,7 @@ static int mxt_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   FAR struct mxt_dev_s *priv;
   int                       ret;
 
-  ivdbg("cmd: %d arg: %ld\n", cmd, arg);
+  iinfo("cmd: %d arg: %ld\n", cmd, arg);
   DEBUGASSERT(filep);
   inode = filep->f_inode;
 
@@ -1551,7 +1552,7 @@ static int mxt_poll(FAR struct file *filep, FAR struct pollfd *fds,
   int                       ret;
   int                       i;
 
-  ivdbg("setup: %d\n", (int)setup);
+  iinfo("setup: %d\n", (int)setup);
   DEBUGASSERT(filep && fds);
   inode = filep->f_inode;
 
@@ -1575,7 +1576,7 @@ static int mxt_poll(FAR struct file *filep, FAR struct pollfd *fds,
 
       if ((fds->events & POLLIN) == 0)
         {
-          idbg("Missing POLLIN: revents: %08x\n", fds->revents);
+          ierr("ERROR: Missing POLLIN: revents: %08x\n", fds->revents);
           ret = -EDEADLK;
           goto errout;
         }
@@ -1600,7 +1601,7 @@ static int mxt_poll(FAR struct file *filep, FAR struct pollfd *fds,
 
       if (i >= CONFIG_MXT_NPOLLWAITERS)
         {
-          idbg("No availabled slot found: %d\n", i);
+          ierr("ERROR: No availabled slot found: %d\n", i);
           fds->priv    = NULL;
           ret          = -EBUSY;
           goto errout;
@@ -1646,7 +1647,7 @@ static int mxt_getinfo(struct mxt_dev_s *priv)
                    sizeof(struct mxt_info_s));
   if (ret < 0)
     {
-      idbg("ERROR: mxt_getreg failed: %d\n", ret);
+      ierr("ERROR: mxt_getreg failed: %d\n", ret);
       return ret;
     }
 
@@ -1674,7 +1675,7 @@ static int mxt_getobjtab(FAR struct mxt_dev_s *priv)
                    tabsize);
   if (ret < 0)
     {
-      idbg("ERROR: Failed to object table size: %d\n", ret);
+      ierr("ERROR: Failed to object table size: %d\n", ret);
       return ret;
     }
 
@@ -1697,7 +1698,7 @@ static int mxt_getobjtab(FAR struct mxt_dev_s *priv)
           idmax  = 0;
         }
 
-      ivdbg("%2d. type %2d addr %04x size: %d instances: %d IDs: %u-%u\n",
+      iinfo("%2d. type %2d addr %04x size: %d instances: %d IDs: %u-%u\n",
             i, object->type, MXT_GETUINT16(object->addr), object->size + 1,
             object->ninstances + 1, idmin, idmax);
 
@@ -1747,7 +1748,7 @@ static int mxt_hwinitialize(FAR struct mxt_dev_s *priv)
   ret = mxt_getinfo(priv);
   if (ret < 0)
     {
-      idbg("ERROR: Failed to read info registers: %d\n", ret);
+      ierr("ERROR: Failed to read info registers: %d\n", ret);
       return ret;
     }
 
@@ -1756,7 +1757,7 @@ static int mxt_hwinitialize(FAR struct mxt_dev_s *priv)
   priv->objtab = kmm_zalloc(info->nobjects * sizeof(struct mxt_object_s));
   if (priv->objtab == NULL)
     {
-      idbg("ERROR: Failed to allocate object table\n");
+      ierr("ERROR: Failed to allocate object table\n");
       return -ENOMEM;
     }
 
@@ -1773,7 +1774,7 @@ static int mxt_hwinitialize(FAR struct mxt_dev_s *priv)
   ret = mxt_putobject(priv, MXT_GEN_COMMAND_T6, MXT_COMMAND_RESET, 1);
   if (ret < 0)
     {
-      idbg("ERROR: Soft reset failed: %d\n", ret);
+      ierr("ERROR: Soft reset failed: %d\n", ret);
       goto errout_with_objtab;
     }
 
@@ -1784,7 +1785,7 @@ static int mxt_hwinitialize(FAR struct mxt_dev_s *priv)
   ret = mxt_getreg(priv, MXT_MATRIX_X_SIZE, (FAR uint8_t *)®val, 1);
   if (ret < 0)
     {
-      idbg("ERROR: Failed to get X size: %d\n", ret);
+      ierr("ERROR: Failed to get X size: %d\n", ret);
       goto errout_with_objtab;
     }
 
@@ -1793,16 +1794,16 @@ static int mxt_hwinitialize(FAR struct mxt_dev_s *priv)
   ret = mxt_getreg(priv, MXT_MATRIX_Y_SIZE, (FAR uint8_t *)®val, 1);
   if (ret < 0)
     {
-      idbg("ERROR: Failed to get Y size: %d\n", ret);
+      ierr("ERROR: Failed to get Y size: %d\n", ret);
       goto errout_with_objtab;
     }
 
   info->ysize = regval;
 
-  ivdbg("Family: %u variant: %u version: %u.%u.%02x\n",
+  iinfo("Family: %u variant: %u version: %u.%u.%02x\n",
         info->family, info->variant, info->version >> 4, info->version & 0x0f,
         info->build);
-  ivdbg("Matrix size: (%u,%u) objects: %u\n",
+  iinfo("Matrix size: (%u,%u) objects: %u\n",
         info->xsize, info->ysize, info->nobjects);
 
   /* How many multi touch "slots" */
@@ -1818,7 +1819,7 @@ static int mxt_hwinitialize(FAR struct mxt_dev_s *priv)
     kmm_zalloc(nslots * sizeof(struct mxt_sample_s));
   if (priv->sample == NULL)
     {
-      idbg("ERROR: Failed to allocate object table\n");
+      ierr("ERROR: Failed to allocate object table\n");
       goto errout_with_objtab;
     }
 
@@ -1863,7 +1864,7 @@ int mxt_register(FAR struct i2c_master_s *i2c,
   char devname[DEV_NAMELEN];
   int ret;
 
-  ivdbg("i2c: %p minor: %d\n", i2c, minor);
+  iinfo("i2c: %p minor: %d\n", i2c, minor);
 
   /* Debug-only sanity checks */
 
@@ -1874,7 +1875,7 @@ int mxt_register(FAR struct i2c_master_s *i2c,
   priv = (FAR struct mxt_dev_s *)kmm_zalloc(sizeof(struct mxt_dev_s));
   if (priv == NULL)
     {
-      idbg("ERROR: Failed allocate device structure\n");
+      ierr("ERROR: Failed allocate device structure\n");
       return -ENOMEM;
     }
 
@@ -1884,9 +1885,17 @@ int mxt_register(FAR struct i2c_master_s *i2c,
   priv->i2c   = i2c;              /* Save the SPI device handle */
   priv->lower = lower;            /* Save the board configuration */
 
+  /* Initialize semaphores */
+
   sem_init(&priv->devsem, 0, 1);  /* Initialize device semaphore */
   sem_init(&priv->waitsem, 0, 0); /* Initialize event wait semaphore */
 
+  /* The event wait semaphore is used for signaling and, hence, should not
+   * have priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
+
   /* Make sure that interrupts are disabled */
 
   MXT_CLEAR(lower);
@@ -1897,7 +1906,7 @@ int mxt_register(FAR struct i2c_master_s *i2c,
   ret = MXT_ATTACH(lower, mxt_interrupt, priv);
   if (ret < 0)
     {
-      idbg("Failed to attach interrupt\n");
+      ierr("ERROR: Failed to attach interrupt\n");
       goto errout_with_priv;
     }
 
@@ -1906,19 +1915,19 @@ int mxt_register(FAR struct i2c_master_s *i2c,
   ret = mxt_hwinitialize(priv);
   if (ret < 0)
     {
-      idbg("ERROR: mxt_hwinitialize failed: %d\n", ret);
+      ierr("ERROR: mxt_hwinitialize failed: %d\n", ret);
       goto errout_with_irq;
     }
 
   /* Register the device as an input device */
 
   (void)snprintf(devname, DEV_NAMELEN, DEV_FORMAT, minor);
-  ivdbg("Registering %s\n", devname);
+  iinfo("Registering %s\n", devname);
 
   ret = register_driver(devname, &mxt_fops, 0666, priv);
   if (ret < 0)
     {
-      idbg("register_driver() failed: %d\n", ret);
+      ierr("ERROR: register_driver() failed: %d\n", ret);
       goto errout_with_hwinit;
     }
 
diff --git a/drivers/input/mxt.h b/drivers/input/mxt.h
index da7bf42966cccff5733c373a6d4f5d9a8f2e2244..94145b180122f80a184b98c90ac8f456e232cfeb 100644
--- a/drivers/input/mxt.h
+++ b/drivers/input/mxt.h
@@ -49,12 +49,12 @@
 /* Support T6 only if debug is enabled */
 
 #undef MXT_SUPPORT_T6
-#if !defined(CONFIG_DEBUG)
-#  undef CONFIG_DEBUG_VERBOSE
+#if !defined(CONFIG_DEBUG_FEATURES)
+#  undef CONFIG_DEBUG_INFO
 #  undef CONFIG_DEBUG_INPUT
 #endif
 
-#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_INPUT)
+#if defined(CONFIG_DEBUG_INFO) && defined(CONFIG_DEBUG_INPUT)
 #  define MXT_SUPPORT_T6 1
 #endif
 
diff --git a/drivers/input/stmpe811_adc.c b/drivers/input/stmpe811_adc.c
index d0fde02e1f232028f7c486d8775befae455cb130..563ebb26517b16a72b3dcc0105060a183a45248a 100644
--- a/drivers/input/stmpe811_adc.c
+++ b/drivers/input/stmpe811_adc.c
@@ -101,7 +101,7 @@ int stmpe811_adcinitialize(STMPE811_HANDLE handle)
   if (ret < 0)
     {
       int errval = errno;
-      idbg("sem_wait failed: %d\n", errval);
+      ierr("ERROR: sem_wait failed: %d\n", errval);
       return -errval;
     }
 
@@ -161,7 +161,7 @@ int stmpe811_adcconfig(STMPE811_HANDLE handle, int pin)
   if (ret < 0)
     {
       int errval = errno;
-      idbg("sem_wait failed: %d\n", errval);
+      ierr("ERROR: sem_wait failed: %d\n", errval);
       return -errval;
     }
 
@@ -169,7 +169,7 @@ int stmpe811_adcconfig(STMPE811_HANDLE handle, int pin)
 
   if ((priv->inuse & pinmask) != 0)
     {
-      idbg("PIN%d is already in-use\n", pin);
+      ierr("ERROR: PIN%d is already in-use\n", pin);
       sem_post(&priv->exclsem);
       return -EBUSY;
     }
@@ -221,7 +221,7 @@ uint16_t stmpe811_adcread(STMPE811_HANDLE handle, int pin)
   if (ret < 0)
     {
       int errval = errno;
-      idbg("sem_wait failed: %d\n", errval);
+      ierr("ERROR: sem_wait failed: %d\n", errval);
       return -errval;
     }
 
diff --git a/drivers/input/stmpe811_base.c b/drivers/input/stmpe811_base.c
index 224b9eaefc9eaaef568b77a0549bd39336994cfd..62b86a420fd670abfca125937fa1c529ee44ffb9 100644
--- a/drivers/input/stmpe811_base.c
+++ b/drivers/input/stmpe811_base.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/input/stmpe811_base.c
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * References:
@@ -54,10 +54,6 @@
 
 #if defined(CONFIG_INPUT) && defined(CONFIG_INPUT_STMPE811)
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
@@ -155,30 +151,14 @@ static void stmpe811_worker(FAR void *arg)
  *
  ****************************************************************************/
 
-static int stmpe811_interrupt(int irq, FAR void *context)
+static int stmpe811_interrupt(int irq, FAR void *context, FAR void *arg)
 {
-  FAR struct stmpe811_dev_s    *priv;
+  FAR struct stmpe811_dev_s    *priv = (FAR struct stmpe811_dev_s *)arg;
   FAR struct stmpe811_config_s *config;
-  int                          ret;
-
-  /* Which STMPE811 device caused the interrupt? */
-
-#ifndef CONFIG_STMPE811_MULTIPLE
-  priv = &g_stmpe811;
-#else
-  for (priv = g_stmpe811list;
-       priv && priv->config->irq != irq;
-       priv = priv->flink);
-
-  ASSERT(priv != NULL);
-#endif
-
-  /* Get a pointer the callbacks for convenience (and so the code is not so
-   * ugly).
-   */
+  int                           ret;
 
+  DEBUGASSERT(priv != NULL && priv->config != NULL);
   config = priv->config;
-  DEBUGASSERT(config != NULL);
 
   /* Disable further interrupts */
 
@@ -199,7 +179,7 @@ static int stmpe811_interrupt(int irq, FAR void *context)
       ret = work_queue(HPWORK, &priv->work, stmpe811_worker, priv, 0);
       if (ret != 0)
         {
-          illdbg("Failed to queue work: %d\n", ret);
+          ierr("ERROR: Failed to queue work: %d\n", ret);
         }
     }
 
@@ -226,7 +206,7 @@ static int stmpe811_checkid(FAR struct stmpe811_dev_s *priv)
   devid = stmpe811_getreg8(priv, STMPE811_CHIP_ID);
   devid = (uint32_t)(devid << 8);
   devid |= (uint32_t)stmpe811_getreg8(priv, STMPE811_CHIP_ID+1);
-  ivdbg("devid: %04x\n", devid);
+  iinfo("devid: %04x\n", devid);
 
   if (devid != (uint16_t)CHIP_ID)
     {
@@ -359,7 +339,7 @@ STMPE811_HANDLE stmpe811_instantiate(FAR struct i2c_master_s *dev,
 
   /* Attach the STMPE811 interrupt handler. */
 
-  config->attach(config, stmpe811_interrupt);
+  config->attach(config, stmpe811_interrupt, priv);
 
   /* Clear any pending interrupts */
 
@@ -422,12 +402,12 @@ uint8_t stmpe811_getreg8(FAR struct stmpe811_dev_s *priv, uint8_t regaddr)
   ret = I2C_TRANSFER(priv->i2c, msg, 2);
   if (ret < 0)
     {
-      idbg("I2C_TRANSFER failed: %d\n", ret);
+      ierr("ERROR: I2C_TRANSFER failed: %d\n", ret);
       return 0;
     }
 
 #ifdef CONFIG_STMPE811_REGDEBUG
-  dbg("%02x->%02x\n", regaddr, regval);
+  _err("%02x->%02x\n", regaddr, regval);
 #endif
   return regval;
 }
@@ -455,7 +435,7 @@ void stmpe811_putreg8(FAR struct stmpe811_dev_s *priv,
   int ret;
 
 #ifdef CONFIG_STMPE811_REGDEBUG
-  dbg("%02x<-%02x\n", regaddr, regval);
+  _err("%02x<-%02x\n", regaddr, regval);
 #endif
 
   /* Setup to the data to be transferred.  Two bytes:  The STMPE811 register
@@ -479,7 +459,7 @@ void stmpe811_putreg8(FAR struct stmpe811_dev_s *priv,
   ret = I2C_TRANSFER(priv->i2c, &msg, 1);
   if (ret < 0)
     {
-      idbg("I2C_TRANSFER failed: %d\n", ret);
+      ierr("ERROR: I2C_TRANSFER failed: %d\n", ret);
     }
 }
 #endif
@@ -530,12 +510,12 @@ uint16_t stmpe811_getreg16(FAR struct stmpe811_dev_s *priv, uint8_t regaddr)
   ret = I2C_TRANSFER(priv->i2c, msg, 2);
   if (ret < 0)
     {
-      idbg("I2C_TRANSFER failed: %d\n", ret);
+      ierr("ERROR: I2C_TRANSFER failed: %d\n", ret);
       return 0;
     }
 
 #ifdef CONFIG_STMPE811_REGDEBUG
-  dbg("%02x->%02x%02x\n", regaddr, rxbuffer[0], rxbuffer[1]);
+  _err("%02x->%02x%02x\n", regaddr, rxbuffer[0], rxbuffer[1]);
 #endif
   return (uint16_t)rxbuffer[0] << 8 | (uint16_t)rxbuffer[1];
 }
diff --git a/drivers/input/stmpe811_gpio.c b/drivers/input/stmpe811_gpio.c
index 267f26cf485006130ad0036197a138a652ab11f0..c9933df718b262b98504442ed1341f5f739d75b3 100644
--- a/drivers/input/stmpe811_gpio.c
+++ b/drivers/input/stmpe811_gpio.c
@@ -144,7 +144,7 @@ int stmpe811_gpioconfig(STMPE811_HANDLE handle, uint8_t pinconfig)
   if (ret < 0)
     {
       int errval = errno;
-      idbg("sem_wait failed: %d\n", errval);
+      ierr("ERROR: sem_wait failed: %d\n", errval);
       return -errval;
     }
 
@@ -152,7 +152,7 @@ int stmpe811_gpioconfig(STMPE811_HANDLE handle, uint8_t pinconfig)
 
   if ((priv->inuse & pinmask) != 0)
     {
-      idbg("PIN%d is already in-use\n", pin);
+      ierr("ERROR: PIN%d is already in-use\n", pin);
       sem_post(&priv->exclsem);
       return -EBUSY;
     }
@@ -259,7 +259,7 @@ void stmpe811_gpiowrite(STMPE811_HANDLE handle, uint8_t pinconfig, bool value)
   ret = sem_wait(&priv->exclsem);
   if (ret < 0)
     {
-      idbg("sem_wait failed: %d\n", errno);
+      ierr("ERROR: sem_wait failed: %d\n", errno);
       return;
     }
 
@@ -313,7 +313,7 @@ int stmpe811_gpioread(STMPE811_HANDLE handle, uint8_t pinconfig, bool *value)
   if (ret < 0)
     {
       int errval = errno;
-      idbg("sem_wait failed: %d\n", errval);
+      ierr("ERROR: sem_wait failed: %d\n", errval);
       return -errval;
     }
 
@@ -362,7 +362,7 @@ int stmpe811_gpioattach(STMPE811_HANDLE handle, uint8_t pinconfig,
   if (ret < 0)
     {
       int errval = errno;
-      idbg("sem_wait failed: %d\n", errval);
+      ierr("ERROR: sem_wait failed: %d\n", errval);
       return -errval;
     }
 
@@ -438,7 +438,7 @@ void stmpe811_gpioworker(FAR struct stmpe811_dev_s *priv)
             }
           else
             {
-              illdbg("No handler for PIN%d, GPIO_INTSTA: %02x\n", pin, regval);
+              ierr("ERROR: No handler for PIN%d, GPIO_INTSTA: %02x\n", pin, regval);
             }
 
           /* Clear the pending GPIO interrupt by writing a '1' to the
diff --git a/drivers/input/stmpe811_tsc.c b/drivers/input/stmpe811_tsc.c
index 55dce44272fff86a46bbc6311154aaaba1a66c79..b58e9feebd12608b56664cb35cf34aea55ef1272 100644
--- a/drivers/input/stmpe811_tsc.c
+++ b/drivers/input/stmpe811_tsc.c
@@ -196,7 +196,7 @@ static void stmpe811_notify(FAR struct stmpe811_dev_s *priv)
       if (fds)
         {
           fds->revents |= POLLIN;
-          ivdbg("Report events: %02x\n", fds->revents);
+          iinfo("Report events: %02x\n", fds->revents);
           sem_post(fds->sem);
         }
     }
@@ -306,7 +306,7 @@ static inline int stmpe811_waitsample(FAR struct stmpe811_dev_s *priv,
 
       if (ret < 0)
         {
-#ifdef CONFIG_DEBUG
+#if defined(CONFIG_DEBUG_INPUT_ERROR) || defined(CONFIG_DEBUG_ASSERTIONS)
           /* Sample the errno (debug output could change it) */
 
           int errval = errno;
@@ -315,7 +315,7 @@ static inline int stmpe811_waitsample(FAR struct stmpe811_dev_s *priv,
            * the failure now.
            */
 
-          idbg("ERROR: sem_wait failed: %d\n", errval);
+          ierr("ERROR: sem_wait failed: %d\n", errval);
           DEBUGASSERT(errval == EINTR);
 #endif
           ret = -EINTR;
@@ -464,7 +464,7 @@ static ssize_t stmpe811_read(FAR struct file *filep, FAR char *buffer, size_t le
   struct stmpe811_sample_s   sample;
   int                        ret;
 
-  ivdbg("len=%d\n", len);
+  iinfo("len=%d\n", len);
   DEBUGASSERT(filep);
   inode = filep->f_inode;
 
@@ -589,7 +589,7 @@ static int stmpe811_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   FAR struct stmpe811_dev_s *priv;
   int                        ret;
 
-  ivdbg("cmd: %d arg: %ld\n", cmd, arg);
+  iinfo("cmd: %d arg: %ld\n", cmd, arg);
   DEBUGASSERT(filep);
   inode = filep->f_inode;
 
@@ -653,7 +653,7 @@ static int stmpe811_poll(FAR struct file *filep, FAR struct pollfd *fds,
   int                        ret;
   int                        i;
 
-  ivdbg("setup: %d\n", (int)setup);
+  iinfo("setup: %d\n", (int)setup);
   DEBUGASSERT(filep && fds);
   inode = filep->f_inode;
 
@@ -677,7 +677,7 @@ static int stmpe811_poll(FAR struct file *filep, FAR struct pollfd *fds,
 
       if ((fds->events & POLLIN) == 0)
         {
-          idbg("ERROR: Missing POLLIN: revents: %08x\n", fds->revents);
+          ierr("ERROR: Missing POLLIN: revents: %08x\n", fds->revents);
           ret = -EDEADLK;
           goto errout;
         }
@@ -702,7 +702,7 @@ static int stmpe811_poll(FAR struct file *filep, FAR struct pollfd *fds,
 
       if (i >= CONFIG_STMPE811_NPOLLWAITERS)
         {
-          idbg("ERROR: No available slot found: %d\n", i);
+          ierr("ERROR: No available slot found: %d\n", i);
           fds->priv    = NULL;
           ret          = -EBUSY;
           goto errout;
@@ -786,7 +786,7 @@ static void stmpe811_timeout(int argc, uint32_t arg1, ...)
           ret = work_queue(HPWORK, &priv->timeout, stmpe811_timeoutworker, priv, 0);
           if (ret != 0)
             {
-              illdbg("Failed to queue work: %d\n", ret);
+              ierr("ERROR: Failed to queue work: %d\n", ret);
             }
         }
     }
@@ -805,7 +805,7 @@ static inline void stmpe811_tscinitialize(FAR struct stmpe811_dev_s *priv)
 {
   uint8_t regval;
 
-  ivdbg("Initializing touchscreen controller\n");
+  iinfo("Initializing touchscreen controller\n");
 
   /* Enable TSC and ADC functions */
 
@@ -898,7 +898,7 @@ int stmpe811_register(STMPE811_HANDLE handle, int minor)
   char devname[DEV_NAMELEN];
   int ret;
 
-  ivdbg("handle=%p minor=%d\n", handle, minor);
+  iinfo("handle=%p minor=%d\n", handle, minor);
   DEBUGASSERT(priv);
 
   /* Get exclusive access to the device structure */
@@ -907,7 +907,7 @@ int stmpe811_register(STMPE811_HANDLE handle, int minor)
   if (ret < 0)
     {
       int errval = errno;
-      idbg("ERROR: sem_wait failed: %d\n", errval);
+      ierr("ERROR: sem_wait failed: %d\n", errval);
       return -errval;
     }
 
@@ -915,7 +915,7 @@ int stmpe811_register(STMPE811_HANDLE handle, int minor)
 
   if ((priv->inuse & TSC_PIN_SET) != 0)
     {
-      idbg("ERROR: TSC pins is already in-use: %02x\n", priv->inuse);
+      ierr("ERROR: TSC pins is already in-use: %02x\n", priv->inuse);
       sem_post(&priv->exclsem);
       return -EBUSY;
     }
@@ -932,7 +932,7 @@ int stmpe811_register(STMPE811_HANDLE handle, int minor)
   priv->wdog      = wd_create();
   if (!priv->wdog)
     {
-      idbg("ERROR: Failed to create a watchdog\n", errno);
+      ierr("ERROR: Failed to create a watchdog\n", errno);
       sem_post(&priv->exclsem);
       return -ENOSPC;
     }
@@ -943,7 +943,7 @@ int stmpe811_register(STMPE811_HANDLE handle, int minor)
   ret = register_driver(devname, &g_stmpe811fops, 0666, priv);
   if (ret < 0)
     {
-      idbg("ERROR: Failed to register driver %s: %d\n", devname, ret);
+      ierr("ERROR: Failed to register driver %s: %d\n", devname, ret);
       sem_post(&priv->exclsem);
       return ret;
     }
diff --git a/drivers/input/tsc2007.c b/drivers/input/tsc2007.c
index a27042400f28121fb3ffce722d906c649cfa06d4..8d49a2e0705bd4f66d55230e13bf4582cf644db5 100644
--- a/drivers/input/tsc2007.c
+++ b/drivers/input/tsc2007.c
@@ -278,7 +278,7 @@ static void tsc2007_notify(FAR struct tsc2007_dev_s *priv)
       if (fds)
         {
           fds->revents |= POLLIN;
-          ivdbg("Report events: %02x\n", fds->revents);
+          iinfo("Report events: %02x\n", fds->revents);
           sem_post(fds->sem);
         }
     }
@@ -456,7 +456,7 @@ static int tsc2007_activate(FAR struct tsc2007_dev_s *priv, uint8_t cmd)
    ret = I2C_TRANSFER(priv->i2c, &msg, 1);
    if (ret < 0)
      {
-       idbg("I2C_TRANSFER failed: %d\n", ret);
+       ierr("ERROR: I2C_TRANSFER failed: %d\n", ret);
      }
    return ret;
 }
@@ -495,7 +495,7 @@ static int tsc2007_transfer(FAR struct tsc2007_dev_s *priv, uint8_t cmd)
    ret = I2C_TRANSFER(priv->i2c, &msg, 1);
    if (ret < 0)
      {
-       idbg("I2C_TRANSFER failed: %d\n", ret);
+       ierr("ERROR: I2C_TRANSFER failed: %d\n", ret);
        return ret;
      }
 
@@ -540,7 +540,7 @@ static int tsc2007_transfer(FAR struct tsc2007_dev_s *priv, uint8_t cmd)
    ret = I2C_TRANSFER(priv->i2c, &msg, 1);
    if (ret < 0)
      {
-       idbg("I2C_TRANSFER failed: %d\n", ret);
+       ierr("ERROR: I2C_TRANSFER failed: %d\n", ret);
        return ret;
      }
 
@@ -550,7 +550,7 @@ static int tsc2007_transfer(FAR struct tsc2007_dev_s *priv, uint8_t cmd)
    */
 
    ret = (unsigned int)data12[0] << 4 | (unsigned int)data12[1] >> 4;
-   ivdbg("data: 0x%04x\n", ret);
+   iinfo("data: 0x%04x\n", ret);
    return ret;
 }
 
@@ -672,7 +672,7 @@ static void tsc2007_worker(FAR void *arg)
 
       if (z1 == 0)
         {
-          idbg("Z1 zero\n");
+          ierr("ERROR: Z1 zero\n");
           pressure = 0;
         }
       else
@@ -680,14 +680,14 @@ static void tsc2007_worker(FAR void *arg)
           pressure = (x * config->rxplate * (z2 - z1)) / z1;
           pressure = (pressure + 2048) >> 12;
 
-          ivdbg("Position: (%d,%4d) pressure: %u z1/2: (%d,%d)\n",
+          iinfo("Position: (%d,%4d) pressure: %u z1/2: (%d,%d)\n",
                 x, y, pressure, z1, z2);
 
           /* Ignore out of range caculcations */
 
           if (pressure > 0x0fff)
             {
-              idbg("Dropped out-of-range pressure: %d\n", pressure);
+              ierr("ERROR: Dropped out-of-range pressure: %d\n", pressure);
               pressure = 0;
             }
         }
@@ -783,7 +783,7 @@ static int tsc2007_interrupt(int irq, FAR void *context)
   ret = work_queue(HPWORK, &priv->work, tsc2007_worker, priv, 0);
   if (ret != 0)
     {
-      illdbg("Failed to queue work: %d\n", ret);
+      ierr("ERROR: Failed to queue work: %d\n", ret);
     }
 
   /* Clear any pending interrupts and return success */
@@ -1031,7 +1031,7 @@ static int tsc2007_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   FAR struct tsc2007_dev_s *priv;
   int                       ret;
 
-  ivdbg("cmd: %d arg: %ld\n", cmd, arg);
+  iinfo("cmd: %d arg: %ld\n", cmd, arg);
   DEBUGASSERT(filep);
   inode = filep->f_inode;
 
@@ -1107,7 +1107,7 @@ static int tsc2007_poll(FAR struct file *filep, FAR struct pollfd *fds,
   int                       ret;
   int                       i;
 
-  ivdbg("setup: %d\n", (int)setup);
+  iinfo("setup: %d\n", (int)setup);
   DEBUGASSERT(filep && fds);
   inode = filep->f_inode;
 
@@ -1131,7 +1131,7 @@ static int tsc2007_poll(FAR struct file *filep, FAR struct pollfd *fds,
 
       if ((fds->events & POLLIN) == 0)
         {
-          idbg("Missing POLLIN: revents: %08x\n", fds->revents);
+          ierr("ERROR: Missing POLLIN: revents: %08x\n", fds->revents);
           ret = -EDEADLK;
           goto errout;
         }
@@ -1156,7 +1156,7 @@ static int tsc2007_poll(FAR struct file *filep, FAR struct pollfd *fds,
 
       if (i >= CONFIG_TSC2007_NPOLLWAITERS)
         {
-          idbg("No availabled slot found: %d\n", i);
+          ierr("ERROR: No available slot found: %d\n", i);
           fds->priv    = NULL;
           ret          = -EBUSY;
           goto errout;
@@ -1225,7 +1225,7 @@ int tsc2007_register(FAR struct i2c_master_s *dev,
 #endif
   int ret;
 
-  ivdbg("dev: %p minor: %d\n", dev, minor);
+  iinfo("dev: %p minor: %d\n", dev, minor);
 
   /* Debug-only sanity checks */
 
@@ -1242,7 +1242,7 @@ int tsc2007_register(FAR struct i2c_master_s *dev,
   priv = (FAR struct tsc2007_dev_s *)kmm_malloc(sizeof(struct tsc2007_dev_s));
   if (!priv)
     {
-      idbg("kmm_malloc(%d) failed\n", sizeof(struct tsc2007_dev_s));
+      ierr("ERROR: kmm_malloc(%d) failed\n", sizeof(struct tsc2007_dev_s));
       return -ENOMEM;
     }
 #endif
@@ -1265,7 +1265,7 @@ int tsc2007_register(FAR struct i2c_master_s *dev,
   ret = config->attach(config, tsc2007_interrupt);
   if (ret < 0)
     {
-      idbg("Failed to attach interrupt\n");
+      ierr("ERROR: Failed to attach interrupt\n");
       goto errout_with_priv;
     }
 
@@ -1276,19 +1276,19 @@ int tsc2007_register(FAR struct i2c_master_s *dev,
   ret = tsc2007_transfer(priv, TSC2007_ENABLE_PENIRQ);
   if (ret < 0)
     {
-      idbg("tsc2007_transfer failed: %d\n", ret);
+      ierr("ERROR: tsc2007_transfer failed: %d\n", ret);
       goto errout_with_priv;
     }
 
   /* Register the device as an input device */
 
   (void)snprintf(devname, DEV_NAMELEN, DEV_FORMAT, minor);
-  ivdbg("Registering %s\n", devname);
+  iinfo("Registering %s\n", devname);
 
   ret = register_driver(devname, &tsc2007_fops, 0666, priv);
   if (ret < 0)
     {
-      idbg("register_driver() failed: %d\n", ret);
+      ierr("ERROR: register_driver() failed: %d\n", ret);
       goto errout_with_priv;
     }
 
@@ -1311,7 +1311,7 @@ int tsc2007_register(FAR struct i2c_master_s *dev,
   ret = work_queue(HPWORK, &priv->work, tsc2007_worker, priv, 0);
   if (ret != 0)
     {
-      idbg("Failed to queue work: %d\n", ret);
+      ierr("ERROR: Failed to queue work: %d\n", ret);
       goto errout_with_priv;
     }
 
diff --git a/drivers/ioexpander/Kconfig b/drivers/ioexpander/Kconfig
index 438beeed5ac891cb8d5bd140e60f0fcd8a2a5b6f..2b801e86dce1bb565b8356ceddb2725d5465b4e4 100644
--- a/drivers/ioexpander/Kconfig
+++ b/drivers/ioexpander/Kconfig
@@ -3,10 +3,21 @@
 # see the file kconfig-language.txt in the NuttX tools repository.
 #
 
+menu "IO Expander/GPIO Support"
+
+config IOEXPANDER
+	bool "Enable IO Expander Support"
+	default n
+	---help---
+		This directory holds implementations of IO expander drivers.
+		See include/nuttx/ioexpander/ioexpander.h for registration information.
+
+if IOEXPANDER
+
 config IOEXPANDER_PCA9555
 	bool "PCA9555 I2C IO expander"
 	default n
-	select I2C
+	depends on I2C
 	---help---
 		Enable support for the NXP PCA9555 IO Expander
 
@@ -26,17 +37,157 @@ config PCA9555_INT_ENABLE
 	---help---
 		Enable driver interrupt functionality
 
+config PCA9555_INT_NCALLBACKS
+	int "Max number of interrupt callbacks"
+	default 4
+	depends on PCA9555_INT_ENABLE
+	---help---
+		This is the maximum number of interrupt callbacks supported
+
+config PCA9555_SHADOW_MODE
+	bool "Use Shadow Mode instead of Read-Modify-Write Operations"
+	default n
+	---help---
+		This setting enables a mode where the output and pin
+		configuration registers are held in RAM.
+		With this for example we do not need to read back the
+		output-register every time we want to change one pin.
+		We do instead change the bit in the internal register
+		and then just write this register to the IO-Expander.
+		This reduces bus traffic and eliminates the problem of
+		EMC-caused toggling of output pins.
+
+config PCA9555_RETRY
+	bool "Retry to send commands and data at I2C communication errors"
+	default n
+	---help---
+		Retry to send commands and data if a I2C-communication
+		error occurs (eg. caused by EMC).
+
 endif # IOEXPANDER_PCA9555
 
+config IOEXPANDER_TCA64XX
+	bool "TCA64XX I2C IO expander"
+	default n
+	depends on I2C && EXPERIMENTAL
+	---help---
+		Enable support for the TCA64XX IO Expander
+
+if IOEXPANDER_TCA64XX
+
+config TCA64XX_MULTIPLE
+	bool "Multiple TCA64XX Devices"
+	default n
+	---help---
+		Can be defined to support multiple TCA64XX devices on board.
+
+config TCA64XX_INT_ENABLE
+	bool "Enable TCA64XX Interrupt Support"
+	default n
+	select IOEXPANDER_INT_ENABLE
+	---help---
+		Enable driver interrupt functionality
+
+config TCA64XX_INT_NCALLBACKS
+	int "Max number of interrupt callbacks"
+	default 4
+	depends on TCA64XX_INT_ENABLE
+	---help---
+		This is the maximum number of interrupt callbacks supported
+
+config TCA64XX_INT_POLL
+	bool "Enable interrupt poll"
+	default n
+	---help---
+		Enable polling for missed interrupts.
+
+config TCA64XX_INT_POLLDELAY
+	int "Interrupt poll delay (used)"
+	default 500000
+	depends on TCA64XX_INT_POLL
+	---help---
+		This microsecond delay defines the polling rate for missed interrupts.
+
+endif # IOEXPANDER_TCA64XX
+
+config IOEXPANDER_PCF8574
+	bool "PCF8574 I2C IO expander"
+	default n
+	depends on I2C && EXPERIMENTAL
+	---help---
+		Enable support for the PCF8574 IO Expander
+
+if IOEXPANDER_PCF8574
+
+config PCF8574_MULTIPLE
+	bool "Multiple PCF8574 Devices"
+	default n
+	---help---
+		Can be defined to support multiple PCF8574 devices on board.
+
+config PCF8574_INT_ENABLE
+	bool "Enable PCF8574 Interrupt Support"
+	default n
+	select IOEXPANDER_INT_ENABLE
+	---help---
+		Enable driver interrupt functionality
+
+config PCF8574_INT_NCALLBACKS
+	int "Max number of interrupt callbacks"
+	default 4
+	depends on PCF8574_INT_ENABLE
+	---help---
+		This is the maximum number of interrupt callbacks supported
+
+config PCF8574_INT_POLL
+	bool "Enable interrupt poll"
+	default n
+	---help---
+		Enable polling for missed interrupts.
+
+config PCF8574_INT_POLLDELAY
+	int "Interrupt poll delay (used)"
+	default 500000
+	depends on PCF8574_INT_POLL
+	---help---
+		This microsecond delay defines the polling rate for missed interrupts.
+
+endif # IOEXPANDER_PCF8574
+
 config IOEXPANDER_INT_ENABLE
 	bool
-	default y if PCA9555_INT_ENABLE
+	default n
 	---help---
 		This is the global INT supported flag for io expanders
 
+config IOEXPANDER_NPINS
+	int "Number of pins"
+	default 16
+	---help---
+		Maximum number of pins supported per driver.
+
 config IOEXPANDER_MULTIPIN
 	bool "Support multi-pin access routines"
 	default n
 	---help---
 		This settings enable the definition of routines for
 		optimized simultaneous access to multiple pins.
+
+endif # IOEXPANDER
+
+config DEV_GPIO
+	bool "GPIO driver"
+	default n
+	---help---
+		Enables a simple GPIO input/output driver to support application-
+		space testing of hardware.
+
+config GPIO_LOWER_HALF
+	bool "GPIO Lower Half"
+	default n
+	depends on DEV_GPIO && IOEXPANDER
+	---help---
+		Enable support for a lower half driver that provides GPIO driver
+		support for I/O expander pins.
+
+endmenu # IO Expander/GPIO Support
diff --git a/drivers/ioexpander/Make.defs b/drivers/ioexpander/Make.defs
index aea59aea51d829d30b9150e14fd121ede7ab232c..8c3107993e6126c769ec67a113084f67beed225a 100644
--- a/drivers/ioexpander/Make.defs
+++ b/drivers/ioexpander/Make.defs
@@ -1,8 +1,9 @@
 ############################################################################
 # drivers/ioexpander/Make.defs
 #
-#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
 #   Author: Sebastien Lorquet 
+#           Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions
@@ -43,6 +44,37 @@ ifeq ($(CONFIG_IOEXPANDER_PCA9555),y)
   CSRCS += pca9555.c
 endif
 
+ifeq ($(CONFIG_IOEXPANDER_TCA64XX),y)
+  CSRCS += tca64xx.c
+endif
+
+ifeq ($(CONFIG_IOEXPANDER_PCF8574),y)
+  CSRCS += pcf8574.c
+endif
+
+endif # CONFIG_IOEXPANDER
+
+# GPIO test device driver (independent of IOEXPANDERS)
+
+ifeq ($(CONFIG_DEV_GPIO),y)
+  CSRCS += gpio.c
+ifeq ($(CONFIG_GPIO_LOWER_HALF),y)
+  CSRCS += gpio_lower_half.c
+endif
+endif
+
+# The folling implements an awkward OR
+
+ifeq ($(CONFIG_IOEXPANDER),y)
+
+# Include ioexpander I/O device driver build support
+
+DEPPATH += --dep-path ioexpander
+VPATH += :ioexpander
+CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)ioexpander}
+
+else ifeq ($(CONFIG_DEV_GPIO),y)
+
 # Include ioexpander I/O device driver build support
 
 DEPPATH += --dep-path ioexpander
diff --git a/drivers/ioexpander/gpio.c b/drivers/ioexpander/gpio.c
new file mode 100644
index 0000000000000000000000000000000000000000..072687f1f80b904d0d97bcc6a1ab06df3bfdfa0e
--- /dev/null
+++ b/drivers/ioexpander/gpio.c
@@ -0,0 +1,380 @@
+/****************************************************************************
+ * drivers/ioexpander/gpio.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#ifdef CONFIG_DEV_GPIO
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int     gpio_handler(FAR struct gpio_dev_s *dev);
+static int     gpio_open(FAR struct file *filep);
+static int     gpio_close(FAR struct file *filep);
+static ssize_t gpio_read(FAR struct file *filep, FAR char *buffer,
+                         size_t buflen);
+static ssize_t gpio_write(FAR struct file *filep, FAR const char *buffer,
+                          size_t buflen);
+static int     gpio_ioctl(FAR struct file *filep, int cmd,
+                          unsigned long arg);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct file_operations g_gpio_drvrops =
+{
+  gpio_open,  /* open */
+  gpio_close, /* close */
+  gpio_read,  /* read */
+  gpio_write, /* write */
+  NULL,       /* seek */
+  gpio_ioctl  /* ioctl */
+#ifndef CONFIG_DISABLE_POLL
+  , NULL      /* poll */
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  , NULL      /* unlink */
+#endif
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: gpio_handler
+ *
+ * Description:
+ *   GPIO interrupt callback function.
+ *
+ ****************************************************************************/
+
+static int gpio_handler(FAR struct gpio_dev_s *dev)
+{
+  DEBUGASSERT(dev != NULL);
+  (void)kill(dev->gp_pid, dev->gp_signo);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: gpio_open
+ *
+ * Description:
+ *   Standard character driver open method.
+ *
+ ****************************************************************************/
+
+static int gpio_open(FAR struct file *filep)
+{
+  return OK;
+}
+
+/****************************************************************************
+ * Name: gpio_close
+ *
+ * Description:
+ *   Standard character driver close method.
+ *
+ ****************************************************************************/
+
+static int gpio_close(FAR struct file *filep)
+{
+  return OK;
+}
+
+/****************************************************************************
+ * Name: gpio_read
+ *
+ * Description:
+ *   Standard character driver read method.
+ *
+ ****************************************************************************/
+
+static ssize_t gpio_read(FAR struct file *filep, FAR char *buffer,
+                         size_t buflen)
+{
+  return 0;
+}
+
+/****************************************************************************
+ * Name: gpio_write
+ *
+ * Description:
+ *   Standard character driver write method.
+ *
+ ****************************************************************************/
+
+static ssize_t gpio_write(FAR struct file *filep, FAR const char *buffer,
+                          size_t buflen)
+{
+  return (ssize_t)buflen;
+}
+
+/****************************************************************************
+ * Name: gpio_ioctl
+ *
+ * Description:
+ *   Standard character driver ioctl method.
+ *
+ ****************************************************************************/
+
+static int gpio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
+{
+  FAR struct inode *inode;
+  FAR struct gpio_dev_s *dev;
+  int ret;
+
+  DEBUGASSERT(filep != NULL && filep->f_inode != NULL);
+  inode = filep->f_inode;
+  DEBUGASSERT(inode->i_private != NULL);
+  dev = inode->i_private;
+
+  switch (cmd)
+    {
+      /* Command:     GPIOC_WRITE
+       * Description: Set the value of an output GPIO
+       * Argument:    0=output a low value; 1=outut a high value
+       */
+
+      case GPIOC_WRITE:
+        if (dev->gp_pintype == GPIO_OUTPUT_PIN)
+          {
+            DEBUGASSERT(arg == 0ul || arg == 1ul);
+            ret = dev->gp_ops->go_write(dev, (bool)arg);
+          }
+        else
+          {
+            ret = -EACCES;
+          }
+        break;
+
+      /* Command:     GPIOC_READ
+       * Description: Read the value of an input or output GPIO
+       * Argument:    A pointer to an bool value to receive the result:
+       *              false=low value; true=high value.
+       */
+
+      case GPIOC_READ:
+        {
+          FAR bool *ptr = (FAR bool *)((uintptr_t)arg);
+          DEBUGASSERT(ptr != NULL);
+
+          ret = dev->gp_ops->go_read(dev, ptr);
+          DEBUGASSERT(ret < 0 || *ptr == 0 || *ptr == 1);
+        }
+        break;
+
+      /* Command:     GPIOC_PINTYPE
+       * Description: Return the GPIO pin type.
+       * Argument:    A pointer to an instance of type enum gpio_pintype_e
+       */
+
+      case GPIOC_PINTYPE:
+        {
+          FAR enum gpio_pintype_e *ptr = (FAR enum gpio_pintype_e *)((uintptr_t)arg);
+          DEBUGASSERT(ptr != NULL);
+
+          *ptr = dev->gp_pintype;
+          ret = OK;
+        }
+        break;
+
+      /* Command:     GPIOC_REGISTER
+       * Description: Register to receive a signal whenever there an
+       *              interrupt is received on an input gpio pin.  This
+       *              feature, of course, depends upon interrupt GPIO
+       *              support from the platform.
+       * Argument:    The number of signal to be generated when the
+       *              interrupt occurs.
+       */
+
+      case GPIOC_REGISTER:
+        if (dev->gp_pintype == GPIO_INTERRUPT_PIN)
+          {
+            /* Make sure that the pin interrupt is disabled */
+
+            ret = dev->gp_ops->go_enable(dev, false);
+            if (ret >= 0)
+              {
+                /* Save signal information */
+
+                DEBUGASSERT(GOOD_SIGNO(arg));
+
+                dev->gp_pid   = getpid();
+                dev->gp_signo = (uint8_t)arg;
+
+                /* Register our handler */
+
+                ret = dev->gp_ops->go_attach(dev,
+                                             (pin_interrupt_t)gpio_handler);
+                if (ret >= 0)
+                  {
+                    /* Enable pin interrupts */
+
+                    ret = dev->gp_ops->go_enable(dev, true);
+                  }
+              }
+          }
+        else
+          {
+            ret = -EACCES;
+          }
+        break;
+
+      /* Command:     GPIOC_UNREGISTER
+       * Description: Stop receiving signals for pin interrupts.
+       * Argument:    None.
+       */
+
+      case GPIOC_UNREGISTER:
+        if (dev->gp_pintype == GPIO_INTERRUPT_PIN)
+          {
+            /* Make sure that the pin interrupt is disabled */
+
+            ret = dev->gp_ops->go_enable(dev, false);
+            if (ret >= 0)
+              {
+                /* Detach the handler */
+
+                ret = dev->gp_ops->go_attach(dev, NULL);
+
+                dev->gp_pid   = 0;
+                dev->gp_signo = 0;
+              }
+          }
+        else
+          {
+            ret = -EACCES;
+          }
+        break;
+
+      /* Unrecognized command */
+
+      default:
+        ret = -ENOTTY;
+        break;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: gpio_pin_register
+ *
+ * Description:
+ *   Register GPIO pin device driver.
+ *
+ *   - Input pin types will be registered at /dev/gpinN
+ *   - Output pin types will be registered at /dev/gpoutN
+ *   - Interrupt pin types will be registered at /dev/gpintN
+ *
+ *   Where N is the provided minor number in the range of 0-99.
+ *
+ ****************************************************************************/
+
+int gpio_pin_register(FAR struct gpio_dev_s *dev, int minor)
+{
+  FAR const char *fmt;
+  char devname[16];
+  int ret;
+
+  DEBUGASSERT(dev != NULL && dev->gp_ops != NULL && (unsigned int)minor < 100);
+
+  switch (dev->gp_pintype)
+    {
+      case GPIO_INPUT_PIN:
+        {
+          DEBUGASSERT(dev->gp_ops->go_read != NULL);
+          fmt = "/dev/gpin%u";
+        }
+        break;
+
+      case GPIO_OUTPUT_PIN:
+        {
+          DEBUGASSERT(dev->gp_ops->go_read != NULL &&
+                     dev->gp_ops->go_write != NULL);
+          fmt = "/dev/gpout%u";
+
+        }
+        break;
+
+      case GPIO_INTERRUPT_PIN:
+        {
+          DEBUGASSERT(dev->gp_ops->go_read != NULL &&
+                      dev->gp_ops->go_attach != NULL &&
+                      dev->gp_ops->go_enable != NULL);
+
+          /* Make sure that the pin interrupt is disabled */
+
+          ret = dev->gp_ops->go_enable(dev, false);
+          if (ret < 0)
+            {
+              return ret;
+            }
+
+          fmt = "/dev/gpint%u";
+        }
+        break;
+
+      default:
+        return -EINVAL;
+    }
+
+  snprintf(devname, 16, fmt, (unsigned int)minor);
+  gpioinfo("Registering %s\n", devname);
+
+  return register_driver(devname, &g_gpio_drvrops, 0666, dev);
+}
+
+#endif /* CONFIG_DEV_GPIO */
diff --git a/drivers/ioexpander/gpio_lower_half.c b/drivers/ioexpander/gpio_lower_half.c
new file mode 100644
index 0000000000000000000000000000000000000000..a18d946e853d7d44a8faaae5c5d25a3e16134ec4
--- /dev/null
+++ b/drivers/ioexpander/gpio_lower_half.c
@@ -0,0 +1,375 @@
+/****************************************************************************
+ * drivers/ioexpander/gpio_lower_half.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_GPIO_LOWER_HALF
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* GPIO lower half driver state */
+
+struct gplh_dev_s
+{
+  /* Publically visible lower-half state */
+
+  struct gpio_dev_s gpio;
+ 
+  /* Private lower half data follows */
+
+  uint8_t pin;                      /* I/O expander pin ID */
+  FAR struct ioexpander_dev_s *ioe; /* Contain I/O expander interface */
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+  FAR void *handle;                 /* Interrupt attach handle */
+  pin_interrupt_t callback;         /* Interrupt callback */
+#endif
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+static int gplh_handler(FAR struct ioexpander_dev_s *ioe,
+                        ioe_pinset_t pinset, FAR void *arg);
+#endif
+
+/* GPIO lower half interface methods */
+
+static int gplh_read(FAR struct gpio_dev_s *gpio, FAR bool *value);
+static int gplh_write(FAR struct gpio_dev_s *gpio, bool value);
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+static int gplh_attach(FAR struct gpio_dev_s *gpio, pin_interrupt_t callback);
+static int gplh_enable(FAR struct gpio_dev_s *gpio, bool enable);
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* GPIO Lower Half interface operations */
+
+static const struct gpio_operations_s g_gplh_ops =
+{
+  gplh_read,   /* read   */
+  gplh_write,  /* write  */
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+  gplh_attach, /* attach */
+  gplh_enable, /* enable */
+#else
+  NULL,        /* attach */
+  NULL,        /* enable */
+#endif
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: gplh_handler
+ *
+ * Description:
+ *   I/O expander interrupt callback function.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+static int gplh_handler(FAR struct ioexpander_dev_s *ioe,
+                        ioe_pinset_t pinset, FAR void *arg)
+{
+  FAR struct gplh_dev_s *priv = (FAR struct gplh_dev_s *)arg;
+
+  DEBUGASSERT(priv != NULL && priv->callback != NULL);
+
+  gpioinfo("pin%u: pinset: %lx callback=%p\n",
+           priv->pin, (unsigned long)pinset, priv->callback);
+
+  /* We received the callback from the I/O expander, forward this to the
+   * upper half GPIO driver via its callback.
+   */
+
+  return priv->callback(&priv->gpio);
+}
+#endif
+
+/****************************************************************************
+ * Name: gplh_read
+ *
+ * Description:
+ *   Read the value of the I/O expander pin.
+ *
+ ****************************************************************************/
+
+static int gplh_read(FAR struct gpio_dev_s *gpio, FAR bool *value)
+{
+  FAR struct gplh_dev_s *priv = (FAR struct gplh_dev_s *)gpio;
+
+  DEBUGASSERT(priv != NULL && priv->ioe != NULL && value != NULL);
+
+  gpioinfo("pin%u: value=%p\n", priv->pin, value);
+
+  /* Return the value from the I/O expander */
+
+  return IOEXP_READPIN(priv->ioe, priv->pin, value);
+}
+
+/****************************************************************************
+ * Name: gplh_write
+ *
+ * Description:
+ *   Set the value of an I/O expander output pin
+ *
+ ****************************************************************************/
+
+static int gplh_write(FAR struct gpio_dev_s *gpio, bool value)
+{
+  FAR struct gplh_dev_s *priv = (FAR struct gplh_dev_s *)gpio;
+
+  DEBUGASSERT(priv != NULL && priv->ioe != NULL);
+
+  gpioinfo("pin%u: value=%u\n", priv->pin, value);
+
+  /* Write the value using the I/O expander */
+
+  return IOEXP_WRITEPIN(priv->ioe, priv->pin, value);
+}
+
+/****************************************************************************
+ * Name: gplh_attach
+ *
+ * Description:
+ *   Detach and disable any current interrupt on the pin.  Save the callback
+ *   information for use when the pin interrupt is enabled.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+static int gplh_attach(FAR struct gpio_dev_s *gpio, pin_interrupt_t callback)
+{
+  FAR struct gplh_dev_s *priv = (FAR struct gplh_dev_s *)gpio;
+
+  DEBUGASSERT(priv != NULL && priv->ioe != NULL);
+
+  gpioinfo("pin%u: callback=%p\n", priv->pin, callback);
+
+  /* Detach and disable any current interrupt on the pin. */
+
+  if (priv->handle != NULL)
+    {
+      gpioinfo("pin%u: Detaching handle %p\n", priv->pin, priv->handle);
+      (void)IOEP_DETACH(priv->ioe, priv->handle);
+      priv->handle = NULL;
+    }
+
+  /* Save the callback function pointer for use when the pin interrupt
+   * is enabled.
+   */
+
+  priv->callback = callback;
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: gplh_enable
+ *
+ * Description:
+ *   Enable or disable the I/O expander pin interrupt
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+static int gplh_enable(FAR struct gpio_dev_s *gpio, bool enable)
+{
+  FAR struct gplh_dev_s *priv = (FAR struct gplh_dev_s *)gpio;
+  int ret = OK;
+
+  DEBUGASSERT(priv != NULL && priv->ioe != NULL);
+
+  gpioinfo("pin%u: %s callback=%p handle=%p\n",
+           priv->pin, enable ? "Enabling" : "Disabling",
+           priv->callback, priv->handle);
+
+  /* Are we enabling or disabling the pin interrupt? */
+
+  if (enable)
+    {
+      /* We are enabling the pin interrupt.  Make certain that there is
+       * an interrupt handler already attached.
+       */
+
+      if (priv->callback == NULL)
+        {
+          /* No callback has been attached */
+
+          gpiowarn("WARNING: pin%u: Attempt to enable before attaching\n",
+                   priv->pin);
+          ret = -EPERM;
+        }
+
+      /* Check if the interrupt is already attached and enabled */
+
+      else if (priv->handle == NULL)
+        {
+          ioe_pinset_t pinset = ((ioe_pinset_t)1 << priv->pin);
+
+          /* We have a callback and the callback is not yet attached.
+           * do it now.
+           */
+
+          gpioinfo("pin%u: Attaching %p\n", priv->pin, priv->callback);
+
+          priv->handle = IOEP_ATTACH(priv->ioe, pinset, gplh_handler, priv);
+          if (priv->handle == NULL)
+            {
+              gpioerr("ERROR: pin%u: IOEP_ATTACH() failed\n", priv->pin);
+              ret = -EIO;
+            }
+        }
+    }
+  else
+    {
+      /* Check if we are already detached */
+
+      if (priv->handle == NULL)
+        {
+          gpiowarn("WARNING: pin%u: Already detached\n", priv->pin);
+        }
+      else
+        {
+          gpioinfo("pin%u: Detaching handle=%p\n", priv->pin, priv->handle);
+          ret = IOEP_DETACH(priv->ioe, priv->handle);
+          if (ret < 0)
+            {
+              gpioerr("ERROR: pin%u: IOEP_DETACH() failed\n",
+                      priv->pin, ret);
+            }
+
+          /* We are no longer attached */
+
+          priv->handle = NULL;
+        }
+    }
+
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: gpio_lower_half
+ *
+ * Description:
+ *   Create a GPIO pin device driver instance for an I/O expander pin.
+ *   The I/O expander pin must have already been configured by the caller
+ *   for the particular pintype.
+ *
+ * Input Parameters:
+ *   ioe     - An instance of the I/O expander interface
+ *   pin     - The I/O expander pin number for the driver
+ *   pintype - See enum gpio_pintype_e
+ *   minor   - The minor device number to use when registering the device
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int gpio_lower_half(FAR struct ioexpander_dev_s *ioe, unsigned int pin,
+                    enum gpio_pintype_e pintype, int minor)
+{
+  FAR struct gplh_dev_s *priv;
+  FAR struct gpio_dev_s *gpio;
+  int ret;
+
+  DEBUGASSERT(ioe != NULL && pin < CONFIG_IOEXPANDER_NPINS &&
+              (unsigned int)pintype < GPIO_NPINTYPES);
+
+#ifndef CONFIG_IOEXPANDER_INT_ENABLE
+  /* If there is no I/O expander interrupt support, then we cannot handle
+   * interrupting pin types.
+   */
+
+  DEBUGASSERT(pintype != GPIO_INTERRUPT_PIN);
+#endif
+
+  /* Allocate an new instance of the GPIO lower half driver */
+
+  priv = (FAR struct gplh_dev_s *)kmm_zalloc(sizeof(struct gplh_dev_s));
+  if (priv == NULL)
+    {
+      gpioerr("ERROR: Failed to allocate driver state\n");
+      return -ENOMEM;
+    }
+
+  /* Initialize the non-zero elements of the newly allocated instance */
+
+  priv->pin        = (uint8_t)pin;
+  priv->ioe        = ioe;
+  gpio             = &priv->gpio;
+  gpio->gp_pintype = (uint8_t)pintype;
+  gpio->gp_ops     = &g_gplh_ops;
+
+  /* Register the GPIO driver */
+
+  ret = gpio_pin_register(gpio, minor);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: gpio_pin_register() failed: %d\n", ret);
+      kmm_free(priv);
+    }
+
+  return ret;
+}
+
+#endif /* CONFIG_GPIO_LOWER_HALF */
diff --git a/drivers/ioexpander/pca9555.c b/drivers/ioexpander/pca9555.c
index c01f7c37a58449cd14cb01f4151e4bfd006831af..3da9849dc350aabdba845f0d31ed4e4c39d3c726 100644
--- a/drivers/ioexpander/pca9555.c
+++ b/drivers/ioexpander/pca9555.c
@@ -92,6 +92,12 @@ static int pca9555_multireadpin(FAR struct ioexpander_dev_s *dev,
 static int pca9555_multireadbuf(FAR struct ioexpander_dev_s *dev,
              FAR uint8_t *pins, FAR bool *values, int count);
 #endif
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+static FAR void *pca9555_attach(FAR struct ioexpander_dev_s *dev,
+             ioe_pinset_t pinset, ioe_callback_t callback, FAR void *arg);
+static int pca9555_detach(FAR struct ioexpander_dev_s *dev,
+             FAR void *handle);
+#endif
 
 /****************************************************************************
  * Private Data
@@ -110,17 +116,23 @@ static struct pca9555_dev_s g_pca9555;
 static struct pca9555_dev_s *g_pca9555list;
 #endif
 
+/* I/O expander vtable */
+
 static const struct ioexpander_ops_s g_pca9555_ops =
 {
   pca9555_direction,
   pca9555_option,
   pca9555_writepin,
   pca9555_readpin,
-  pca9555_readbuf,
+  pca9555_readbuf
 #ifdef CONFIG_IOEXPANDER_MULTIPIN
-  pca9555_multiwritepin,
-  pca9555_multireadpin,
-  pca9555_multireadbuf,
+  , pca9555_multiwritepin
+  , pca9555_multireadpin
+  , pca9555_multireadbuf
+#endif
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+  , pca9555_attach
+  , pca9555_detach
 #endif
 };
 
@@ -223,11 +235,20 @@ static int pca9555_setbit(FAR struct pca9555_dev_s *pca, uint8_t addr,
 
   buf[0] = addr;
 
+#ifdef CONFIG_PCA9555_SHADOW_MODE
+  /* Get the shadowed register value */
+
+  buf[1] = pca->sreg[addr];
+
+#else
+  /* Get the register value from the IO-Expander */
+
   ret = pca9555_writeread(pca, &buf[0], 1, &buf[1], 1);
   if (ret < 0)
     {
       return ret;
     }
+#endif
 
   if (bitval)
     {
@@ -238,7 +259,23 @@ static int pca9555_setbit(FAR struct pca9555_dev_s *pca, uint8_t addr,
       buf[1] &= ~(1 << pin);
     }
 
-  return pca9555_write(pca, buf, 2);
+#ifdef CONFIG_PCA9555_SHADOW_MODE
+  /* Save the new register value in the shadow register */
+
+  pca->sreg[addr] = buf[1];
+#endif
+
+  ret = pca9555_write(pca, buf, 2);
+#ifdef CONFIG_PCA9555_RETRY
+  if (ret != OK)
+    {
+      /* Try again (only once) */
+
+      ret = pca9555_write(pca, buf, 2);
+    }
+#endif
+
+  return ret;
 }
 
 /****************************************************************************
@@ -271,6 +308,12 @@ static int pca9555_getbit(FAR struct pca9555_dev_s *pca, uint8_t addr,
       return ret;
     }
 
+#ifdef CONFIG_PCA9555_SHADOW_MODE
+  /* Save the new register value in the shadow register */
+
+  pca->sreg[addr] = buf;
+#endif
+
   *val = (buf >> pin) & 1;
   return OK;
 }
@@ -279,7 +322,15 @@ static int pca9555_getbit(FAR struct pca9555_dev_s *pca, uint8_t addr,
  * Name: pca9555_direction
  *
  * Description:
- *  See include/nuttx/ioexpander/ioexpander.h
+ *   Set the direction of an ioexpander pin. Required.
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pin - The index of the pin to alter in this call
+ *   dir - One of the IOEXPANDER_DIRECTION_ macros
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
  *
  ****************************************************************************/
 
@@ -302,7 +353,18 @@ static int pca9555_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin,
  * Name: pca9555_option
  *
  * Description:
- *  See include/nuttx/ioexpander/ioexpander.h
+ *   Set pin options. Required.
+ *   Since all IO expanders have various pin options, this API allows setting
+ *     pin options in a flexible way.
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pin - The index of the pin to alter in this call
+ *   opt - One of the IOEXPANDER_OPTION_ macros
+ *   val - The option's value
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
  *
  ****************************************************************************/
 
@@ -310,11 +372,12 @@ static int pca9555_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
                           int opt, FAR void *val)
 {
   FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
-  int ival = (int)val;
   int ret = -EINVAL;
 
   if (opt == IOEXPANDER_OPTION_INVERT)
     {
+      int ival = (int)((intptr_t)val);
+
       /* Get exclusive access to the PCA555 */
 
       pca9555_lock(pca);
@@ -329,7 +392,16 @@ static int pca9555_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
  * Name: pca9555_writepin
  *
  * Description:
- *  See include/nuttx/ioexpander/ioexpander.h
+ *   Set the pin level. Required.
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pin - The index of the pin to alter in this call
+ *   val - The pin level. Usually TRUE will set the pin high,
+ *         except if OPTION_INVERT has been set on this pin.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
  *
  ****************************************************************************/
 
@@ -351,7 +423,17 @@ static int pca9555_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
  * Name: pca9555_readpin
  *
  * Description:
- *  See include/nuttx/ioexpander/ioexpander.h
+ *   Read the actual PIN level. This can be different from the last value written
+ *      to this pin. Required.
+ *
+ * Input Parameters:
+ *   dev    - Device-specific state data
+ *   pin    - The index of the pin
+ *   valptr - Pointer to a buffer where the pin level is stored. Usually TRUE
+ *            if the pin is high, except if OPTION_INVERT has been set on this pin.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
  *
  ****************************************************************************/
 
@@ -373,7 +455,16 @@ static int pca9555_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
  * Name: pca9555_readbuf
  *
  * Description:
- *  See include/nuttx/ioexpander/ioexpander.h
+ *   Read the buffered pin level.
+ *   This can be different from the actual pin state. Required.
+ *
+ * Input Parameters:
+ *   dev    - Device-specific state data
+ *   pin    - The index of the pin
+ *   valptr - Pointer to a buffer where the level is stored.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
  *
  ****************************************************************************/
 
@@ -417,6 +508,13 @@ static int pca9555_getmultibits(FAR struct pca9555_dev_s *pca, uint8_t addr,
       return ret;
     }
 
+#ifdef CONFIG_PCA9555_SHADOW_MODE
+  /* Save the new register value in the shadow register */
+
+  pca->sreg[addr]   = buf[0];
+  pca->sreg[addr+1] = buf[1];
+#endif
+
   /* Read the requested bits */
 
   for (i = 0; i < count; i++)
@@ -443,7 +541,16 @@ static int pca9555_getmultibits(FAR struct pca9555_dev_s *pca, uint8_t addr,
  * Name: pca9555_multiwritepin
  *
  * Description:
- *  See include/nuttx/ioexpander/ioexpander.h
+ *   Set the pin level for multiple pins. This routine may be faster than
+ *   individual pin accesses. Optional.
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pins - The list of pin indexes to alter in this call
+ *   val - The list of pin levels.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
  *
  ****************************************************************************/
 
@@ -465,15 +572,22 @@ static int pca9555_multiwritepin(FAR struct ioexpander_dev_s *dev,
 
   /* Start by reading both registers, whatever the pins to change. We could
    * attempt to read one port only if all pins were on the same port, but
-   * this would not save much. */
+   * this would not save much.
+   */
 
+#ifndef CONFIG_PCA9555_SHADOW_MODE
   ret = pca9555_writeread(pca, &addr, 1, &buf[1], 2);
   if (ret < 0)
     {
-
       pca9555_unlock(pca);
       return ret;
     }
+#else
+  /* In Shadow-Mode we "read" the pin status from the shadow registers */
+
+  buf[1] = pca->sreg[addr];
+  buf[2] = pca->sreg[addr+1];
+#endif
 
   /* Apply the user defined changes */
 
@@ -505,6 +619,11 @@ static int pca9555_multiwritepin(FAR struct ioexpander_dev_s *dev,
   /* Now write back the new pins states */
 
   buf[0] = addr;
+#ifdef CONFIG_PCA9555_SHADOW_MODE
+  /* Save the new register values in the shadow register */
+  pca->sreg[addr] = buf[1];
+  pca->sreg[addr+1] = buf[2];
+#endif
   ret = pca9555_write(pca, buf, 3);
 
   pca9555_unlock(pca);
@@ -515,7 +634,16 @@ static int pca9555_multiwritepin(FAR struct ioexpander_dev_s *dev,
  * Name: pca9555_multireadpin
  *
  * Description:
- *  See include/nuttx/ioexpander/ioexpander.h
+ *   Read the actual level for multiple pins. This routine may be faster than
+ *   individual pin accesses. Optional.
+ *
+ * Input Parameters:
+ *   dev    - Device-specific state data
+ *   pin    - The list of pin indexes to read
+ *   valptr - Pointer to a buffer where the pin levels are stored.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
  *
  ****************************************************************************/
 
@@ -539,7 +667,16 @@ static int pca9555_multireadpin(FAR struct ioexpander_dev_s *dev,
  * Name: pca9555_multireadbuf
  *
  * Description:
- *  See include/nuttx/ioexpander/ioexpander.h
+ *   Read the buffered level of multiple pins. This routine may be faster than
+ *   individual pin accesses. Optional.
+ *
+ * Input Parameters:
+ *   dev    - Device-specific state data
+ *   pin    - The index of the pin
+ *   valptr - Pointer to a buffer where the buffered levels are stored.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
  *
  ****************************************************************************/
 
@@ -563,6 +700,92 @@ static int pca9555_multireadbuf(FAR struct ioexpander_dev_s *dev,
 
 #ifdef CONFIG_PCA9555_INT_ENABLE
 
+/****************************************************************************
+ * Name: pca9555_attach
+ *
+ * Description:
+ *   Attach and enable a pin interrupt callback function.
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   pinset   - The set of pin events that will generate the callback
+ *   callback - The pointer to callback function.  NULL will detach the
+ *              callback.
+ *   arg      - User-provided callback argument
+ *
+ * Returned Value:
+ *   A non-NULL handle value is returned on success.  This handle may be
+ *   used later to detach and disable the pin interrupt.
+ *
+ ****************************************************************************/
+
+static FAR void *pca9555_attach(FAR struct ioexpander_dev_s *dev,
+                                ioe_pinset_t pinset, ioe_callback_t callback,
+                                FAR void *arg)
+{
+  FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
+  FAR void *handle = NULL;
+  int i;
+
+  /* Get exclusive access to the PCA555 */
+
+  pca9555_lock(pca);
+
+  /* Find and available in entry in the callback table */
+
+  for (i = 0; i < CONFIG_PCA9555_INT_NCALLBACKS; i++)
+    {
+       /* Is this entry available (i.e., no callback attached) */
+
+       if (pca->cb[i].cbfunc == NULL)
+         {
+           /* Yes.. use this entry */
+
+           pca->cb[i].pinset = pinset;
+           pca->cb[i].cbfunc = callback;
+           pca->cb[i].cbarg  = arg;
+           handle            = &pca->cb[i];
+           break;
+         }
+    }
+
+  /* Add this callback to the table */
+
+  pca9555_unlock(pca);
+  return handle;
+}
+
+/****************************************************************************
+ * Name: pca9555_detach
+ *
+ * Description:
+ *   Detach and disable a pin interrupt callback function.
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   handle   - The non-NULL opaque value return by pca9555_attch()
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+static int pca9555_detach(FAR struct ioexpander_dev_s *dev, FAR void *handle)
+{
+  FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
+  FAR struct pca9555_callback_s *cb = (FAR struct pca9555_callback_s *)handle;
+
+  DEBUGASSERT(pca != NULL && cb != NULL);
+  DEBUGASSERT((uintptr_t)cb >= (uintptr_t)&pca->cb[0] &&
+              (uintptr_t)cb <= (uintptr_t)&pca->cb[CONFIG_TCA64XX_INT_NCALLBACKS-1]);
+  UNUSED(pca);
+
+  cb->pinset = 0;
+  cb->cbfunc = NULL;
+  cb->cbarg  = NULL;
+  return OK;
+}
+
 /****************************************************************************
  * Name: pca9555_irqworker
  *
@@ -577,28 +800,46 @@ static void pca9555_irqworker(void *arg)
   FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)arg;
   uint8_t addr = PCA9555_REG_INPUT;
   uint8_t buf[2];
-  unsigned int bits;
+  ioe_pinset_t pinset;
   int ret;
+  int i;
 
   /* Read inputs */
 
   ret = pca9555_writeread(pca, &addr, 1, buf, 2);
   if (ret == OK)
     {
-      bits = ((unsigned int)buf[0] << 8) | buf[1];
+#ifdef CONFIG_PCA9555_SHADOW_MODE
+      /* Don't forget to update the shadow registers at this point */
 
-      /* If signal PID is registered, enqueue signal. */
+      pca->sreg[addr]   = buf[0];
+      pca->sreg[addr+1] = buf[1];
+#endif
+      /* Create a 16-bit pinset */
+
+      pinset = ((unsigned int)buf[0] << 8) | buf[1];
+
+      /* Perform pin interrupt callbacks */
 
-      if (pca->dev.sigpid)
+      for (i = 0; i < CONFIG_PCA9555_INT_NCALLBACKS; i++)
         {
-#ifdef CONFIG_CAN_PASS_STRUCTS
-          union sigval value;
-          value.sival_int = (int)bits;
-          ret = sigqueue(pca->dev.sigpid, pca->dev.sigval, value);
-#else
-          ret = sigqueue(pca->dev.sigpid, pca->dev.sigval,
-                         (FAR void *)bits);
-#endif
+          /* Is this entry valid (i.e., callback attached)?  If so, did
+           * any of the requested pin interrupts occur?
+           */
+
+          if (pca->cb[i].cbfunc != NULL)
+            {
+              /* Did any of the requested pin interrupts occur? */
+
+              ioe_pinset_t match = pinset & pca->cb[i].pinset;
+              if (match != 0)
+                {
+                  /* Yes.. perform the callback */
+
+                  (void)pca->cb[i].cbfunc(&pca->dev, match,
+                                          pca->cb[i].cbarg);
+                }
+            }
         }
     }
 
@@ -642,10 +883,10 @@ static int pca9555_interrupt(int irq, FAR void *context)
    * completed.
    */
 
-  if (work_available(&pca->dev.work))
+  if (work_available(&pca->work))
     {
       pca->config->enable(pca->config, FALSE);
-      work_queue(HPWORK, &pca->dev.work, pca9555_irqworker,
+      work_queue(HPWORK, &pca->work, pca9555_irqworker,
                  (FAR void *)pca, 0);
     }
 
diff --git a/drivers/ioexpander/pca9555.h b/drivers/ioexpander/pca9555.h
index 39435f23d61e23e8c76315a0d129564f80c31050..815d92de23708f8e86dbb25998a37d3db1a346f4 100644
--- a/drivers/ioexpander/pca9555.h
+++ b/drivers/ioexpander/pca9555.h
@@ -50,6 +50,8 @@
 
 #include 
 #include 
+
+#include 
 #include 
 #include 
 
@@ -61,6 +63,7 @@
 /********************************************************************************************
  * Pre-processor Definitions
  ********************************************************************************************/
+
 /* Configuration ****************************************************************************/
 /* Prerequisites:
  *   CONFIG_I2C
@@ -74,11 +77,22 @@
  *   Enables support for the PCA9555 driver (Needs CONFIG_INPUT)
  * CONFIG_PCA9555_MULTIPLE
  *   Can be defined to support multiple PCA9555 devices on board.
- * CONFIG_PCA9555_INT_DISABLE
- *   Disable driver GPIO interrupt functionality (ignored if GPIO functionality is
- *   disabled).
+ * CONFIG_PCA9555_INT_NCALLBACKS
+ *   Maximum number of supported pin interrupt callbacks.
  */
 
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+#  ifndef CONFIG_PCA9555_INT_NCALLBACKS
+#    define CONFIG_PCA9555_INT_NCALLBACKS 4
+#  endif
+#endif
+
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+#  ifndef CONFIG_SCHED_WORKQUEUE
+#    error Work queue support required.  CONFIG_SCHED_WORKQUEUE must be selected.
+#  endif
+#endif
+
 #undef CONFIG_PCA9555_REFCNT
 
 /* Driver support ***************************************************************************/
@@ -112,20 +126,41 @@
  * Public Types
  ********************************************************************************************/
 
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+/* This type represents on registered pin interrupt callback */
+
+struct pca9555_callback_s
+{
+   ioe_pinset_t pinset;                 /* Set of pin interrupts that will generate
+                                         * the callback. */
+   ioe_callback_t cbfunc;               /* The saved callback function pointer */
+   FAR void *cbarg;                       /* Callback argument */
+};
+#endif
+
 /* This structure represents the state of the PCA9555 driver */
 
 struct pca9555_dev_s
 {
   struct ioexpander_dev_s      dev;     /* Nested structure to allow casting as public gpio
                                          * expander. */
-
+#ifdef CONFIG_PCA9555_SHADOW_MODE
+  uint8_t sreg[8];                      /* Shadowed registers of the PCA9555 */
+#endif
 #ifdef CONFIG_PCA9555_MULTIPLE
   FAR struct pca9555_dev_s    *flink;   /* Supports a singly linked list of drivers */
 #endif
-
   FAR struct pca9555_config_s *config;  /* Board configuration data */
   FAR struct i2c_master_s     *i2c;     /* Saved I2C driver instance */
   sem_t                        exclsem; /* Mutual exclusion */
+
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+  struct work_s work;                   /* Supports the interrupt handling "bottom half" */
+
+  /* Saved callback information for each I/O expander client */
+
+  struct pca9555_callback_s cb[CONFIG_PCA9555_INT_NCALLBACKS];
+#endif
 };
 
 #endif /* CONFIG_IOEXPANDER && CONFIG_IOEXPANDER_PCA9555 */
diff --git a/drivers/ioexpander/pcf8574.c b/drivers/ioexpander/pcf8574.c
new file mode 100644
index 0000000000000000000000000000000000000000..53b938d03e2d3789bc98b5e39ab033ac4c8827e5
--- /dev/null
+++ b/drivers/ioexpander/pcf8574.c
@@ -0,0 +1,1133 @@
+/****************************************************************************
+ * drivers/ioexpander/pcf8574.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************************/
+
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "pcf8574.h"
+
+#ifdef CONFIG_IOEXPANDER_PCF8574
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef MAX
+#  define MAX(a,b) (((a) > (b)) ? (a) : (b))
+#endif
+
+#ifndef MIN
+#  define MIN(a,b) (((a) < (b)) ? (a) : (b))
+#endif
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* PCF8574xx Helpers */
+
+static void pcf8574_lock(FAR struct pcf8574_dev_s *priv);
+static int pcf8574_read(FAR struct pcf8574_dev_s *priv, FAR uint8_t *portval);
+static int pcf8574_write(struct pcf8574_dev_s *priv, uint8_t portval);
+
+/* I/O Expander Methods */
+
+static int pcf8574_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+             int dir);
+static int pcf8574_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+             int opt, void *regval);
+static int pcf8574_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+             bool value);
+static int pcf8574_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+             FAR bool *value);
+#ifdef CONFIG_IOEXPANDER_MULTIPIN
+static int pcf8574_multiwritepin(FAR struct ioexpander_dev_s *dev,
+             FAR uint8_t *pins, FAR bool *values, int count);
+static int pcf8574_multireadpin(FAR struct ioexpander_dev_s *dev,
+             FAR uint8_t *pins, FAR bool *values, int count);
+#endif
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+static FAR void *pcf8574_attach(FAR struct ioexpander_dev_s *dev,
+             ioe_pinset_t pinset, ioe_callback_t callback, FAR void *arg);
+static int pcf8574_detach(FAR struct ioexpander_dev_s *dev, FAR void *handle);
+#endif
+
+#ifdef CONFIG_PCF8574_INT_ENABLE
+static void pcf8574_int_update(void *handle, uint8_t input);
+static void pcf8574_register_update(FAR struct pcf8574_dev_s *priv);
+static void pcf8574_irqworker(void *arg);
+static void pcf8574_interrupt(FAR void *arg);
+#ifdef CONFIG_PCF8574_INT_POLL
+static void pcf8574_poll_expiry(int argc, wdparm_t arg1, ...);
+#endif
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+#ifndef CONFIG_PCF8574_MULTIPLE
+/* If only a single device is supported, then the driver state structure may
+ * as well be pre-allocated.
+ */
+
+static struct pcf8574_dev_s g_pcf8574;
+#endif
+
+/* I/O expander vtable */
+
+static const struct ioexpander_ops_s g_pcf8574_ops =
+{
+  pcf8574_direction,
+  pcf8574_option,
+  pcf8574_writepin,
+  pcf8574_readpin,
+  pcf8574_readpin
+#ifdef CONFIG_IOEXPANDER_MULTIPIN
+  , pcf8574_multiwritepin
+  , pcf8574_multireadpin
+  , pcf8574_multireadpin
+#endif
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+  , pcf8574_attach
+  , pcf8574_detach
+#endif
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: pcf8574_lock
+ *
+ * Description:
+ *   Get exclusive access to the I/O Expander
+ *
+ ****************************************************************************/
+
+static void pcf8574_lock(FAR struct pcf8574_dev_s *priv)
+{
+  while (sem_wait(&priv->exclsem) < 0)
+    {
+      /* EINTR is the only expected error from sem_wait() */
+
+      DEBUGASSERT(errno == EINTR);
+    }
+}
+
+#define pcf8574_unlock(p) sem_post(&(p)->exclsem)
+
+/****************************************************************************
+ * Name: pcf8574_read
+ *
+ * Description:
+ *  Read the PCF8574 8-bit value from a PCF8574xx port
+ *
+ *  Primitive I2C read operation for the PCA8574. The PCF8574 is
+ *  'interesting' in that it doesn't really have a data direction register,
+ *  but instead the outputs are current-limited when high, so by setting an
+ *  IO line high, you are also making it an input.  Consequently, before
+ *  using this method, you'll need to perform a pca8574_write() setting the
+ *  bits you are interested in reading to 1's, then call this method.
+ *
+ ****************************************************************************/
+
+static int pcf8574_read(FAR struct pcf8574_dev_s *priv, FAR uint8_t *portval)
+{
+  struct i2c_msg_s msg;
+
+  DEBUGASSERT(priv != NULL && priv->i2c != NULL && priv->config != NULL);
+
+  /* Setup for the transfer */
+
+  msg.frequency = priv->config->frequency,
+  msg.addr      = priv->config->address,
+  msg.flags     = I2C_M_READ;
+  msg.buffer    = portval;
+  msg.length    = 1;
+
+  /* Then perform the transfer. */
+
+  return I2C_TRANSFER(priv->i2c, &msg, 1);
+}
+
+/****************************************************************************
+ * Name: pcf8574_write
+ *
+ * Description:
+ *  Write an 8-bit value to a PCF8574xx port
+ *
+ *  Primitive I2C write operation for the PCA8574.  The I2C interface
+ *  simply sets the state of the 8 IO lines in the PCA8574 port.
+ *
+ ****************************************************************************/
+
+static int pcf8574_write(struct pcf8574_dev_s *priv, uint8_t portval)
+{
+  struct i2c_msg_s msg;
+
+  DEBUGASSERT(priv != NULL && priv->i2c != NULL && priv->config != NULL);
+
+  /* Setup for the transfer */
+
+  msg.frequency = priv->config->frequency,
+  msg.addr      = priv->config->address;
+  msg.flags     = 0;
+  msg.buffer    = (FAR uint8_t *)&portval;
+  msg.length    = 1;
+
+  /* Then perform the transfer. */
+
+  return I2C_TRANSFER(priv->i2c, &msg, 1);
+}
+
+/****************************************************************************
+ * Name: pcf8574_direction
+ *
+ * Description:
+ *   Set the direction of an ioexpander pin. Required.
+ *
+ *   The PCF8574 is 'interesting' in that it doesn't really have a data
+ *   direction register, but instead the outputs are current-limited when
+ *   high, so by setting an IO line high, you are also making it an input.
+ *   Consequently, before using this method, you'll need to perform a
+ *   pca8574_write() setting the bits you are interested in reading to 1's,
+ *   before calling pca8574_read().
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pin - The index of the pin to alter in this call
+ *   dir - One of the IOEXPANDER_DIRECTION_ macros
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+static int pcf8574_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+                          int direction)
+{
+  FAR struct pcf8574_dev_s *priv = (FAR struct pcf8574_dev_s *)dev;
+  int ret;
+
+  DEBUGASSERT(priv != NULL && priv->config != NULL && pin < 8 &&
+              (direction == IOEXPANDER_DIRECTION_IN ||
+               direction == IOEXPANDER_DIRECTION_OUT));
+
+  gpioinfo("I2C addr=%02x pin=%u direction=%s\n",
+           priv->config->address, pin,
+           (direction == IOEXPANDER_DIRECTION_IN) ? "IN" : "OUT");
+
+  /* Get exclusive access to the I/O Expander */
+
+  pcf8574_lock(priv);
+
+  /* Set a bit in inpins if the pin is an input.  Clear the bit in
+   * inpins if the pin is an output.
+   */
+
+  if (direction == IOEXPANDER_DIRECTION_IN)
+    {
+      priv->inpins   |= (1 << pin);
+      priv->outstate &= ~(1 << pin);
+    }
+  else
+    {
+      priv->inpins &= ~(1 << pin);
+    }
+
+  /* Write the OR of the set of input pins and the set of output pins.
+   * In order to read input pins, we have to write a '1' to putt he
+   * pin in the current limiting state.
+   */
+
+  ret = pcf8574_write(priv, priv->inpins | priv->outstate);
+
+  pcf8574_unlock(priv);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: pcf8574_option
+ *
+ * Description:
+ *   Set pin options. Required.
+ *   Since all IO expanders have various pin options, this API allows setting
+ *     pin options in a flexible way.
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pin - The index of the pin to alter in this call
+ *   opt - One of the IOEXPANDER_OPTION_ macros
+ *   val - The option's value
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+static int pcf8574_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+                          int opt, FAR void *value)
+{
+  FAR struct pcf8574_dev_s *priv = (FAR struct pcf8574_dev_s *)dev;
+  int ret = -ENOSYS;
+
+  DEBUGASSERT(priv != NULL && priv->config != NULL);
+
+  gpioinfo("I2C addr=%02x pin=%u option=%u\n",
+           priv->config->address, pin, opt);
+
+#ifdef CONFIG_PCF8574_INT_ENABLE
+  /* Interrupt configuration */
+
+  if (opt == IOEXPANDER_OPTION_INTCFG)
+    {
+      unsigned int ival = (unsigned int)((uintptr_t)value);
+      ioe_pinset_t bit = ((ioe_pinset_t)1 << pin);
+
+      ret = OK;
+      pcf8574_lock(priv);
+      switch (ival)
+        {
+          case IOEXPANDER_VAL_HIGH:    /* Interrupt on high level */
+            priv->trigger  &= ~bit;
+            priv->level[0] |= bit;
+            priv->level[1] &= ~bit;
+            break;
+
+          case IOEXPANDER_VAL_LOW:     /* Interrupt on low level */
+            priv->trigger  &= ~bit;
+            priv->level[0] &= ~bit;
+            priv->level[1] |= bit;
+            break;
+
+          case IOEXPANDER_VAL_RISING:  /* Interrupt on rising edge */
+            priv->trigger  |= bit;
+            priv->level[0] |= bit;
+            priv->level[1] &= ~bit;
+            break;
+
+          case IOEXPANDER_VAL_FALLING: /* Interrupt on falling edge */
+            priv->trigger  |= bit;
+            priv->level[0] &= ~bit;
+            priv->level[1] |= bit;
+            break;
+
+          case IOEXPANDER_VAL_BOTH:    /* Interrupt on both edges */
+            priv->trigger  |= bit;
+            priv->level[0] |= bit;
+            priv->level[1] |= bit;
+            break;
+
+          case IOEXPANDER_VAL_DISABLE:
+            break;
+
+          default:
+            ret = -EINVAL;
+        }
+
+      pcf8574_unlock(priv);
+    }
+#endif
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: pcf8574_writepin
+ *
+ * Description:
+ *   Set the pin level. Required.
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pin - The index of the pin to alter in this call
+ *   val - The pin level. Usually TRUE will set the pin high,
+ *         except if OPTION_INVERT has been set on this pin.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+static int pcf8574_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+                            bool value)
+{
+  FAR struct pcf8574_dev_s *priv = (FAR struct pcf8574_dev_s *)dev;
+  int ret;
+
+  DEBUGASSERT(priv != NULL && priv->config != NULL && pin < 8);
+
+  gpioinfo("I2C addr=%02x pin=%u value=%u\n",
+           priv->config->address, pin, value);
+
+  /* Get exclusive access to the I/O Expander */
+
+  pcf8574_lock(priv);
+
+  /* Make sure that this is an output pin */
+
+  if ((priv->inpins & (1 << pin)) != 0)
+    {
+      gpioerr("ERROR: pin%u is an input\n", pin);
+      pcf8574_unlock(priv);
+      return -EINVAL;
+    }
+
+  /* Set/clear a bit in outstate. */
+
+  if (value)
+    {
+      priv->outstate |= (1 << pin);
+    }
+  else
+    {
+      priv->outstate &= ~(1 << pin);
+    }
+
+  /* Write the OR of the set of input pins and the set of output pins.
+   * In order to set the new output value.
+   */
+
+  ret = pcf8574_write(priv, priv->inpins | priv->outstate);
+
+  pcf8574_unlock(priv);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: pcf8574_readpin
+ *
+ * Description:
+ *   Read the actual PIN level. This can be different from the last value written
+ *   to this pin. Required.
+ *
+ *   The PCF8574 is 'interesting' in that it doesn't really have a data
+ *   direction register, but instead the outputs are current-limited when
+ *   high, so by setting an IO line high, you are also making it an input.
+ *   Consequently, before using this method, you'll need to perform a
+ *   pca8574_write() setting the bits you are interested in reading to 1's,
+ *   before calling pca8574_read().
+ *
+ * Input Parameters:
+ *   dev    - Device-specific state data
+ *   pin    - The index of the pin
+ *   valptr - Pointer to a buffer where the pin level is stored. Usually TRUE
+ *            if the pin is high, except if OPTION_INVERT has been set on this pin.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+static int pcf8574_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+                           FAR bool *value)
+{
+  FAR struct pcf8574_dev_s *priv = (FAR struct pcf8574_dev_s *)dev;
+  uint8_t regval;
+  int ret;
+
+  DEBUGASSERT(priv != NULL && priv->config != NULL &&  pin < 8 && value != NULL);
+
+  gpioinfo("I2C addr=%02x, pin=%u\n", priv->config->address, pin);
+
+  /* Get exclusive access to the I/O Expander */
+
+  pcf8574_lock(priv);
+
+  /* Is the pin an output? */
+
+  if ((priv->inpins & (1 << pin)) == 0)
+    {
+      /* We cannot read the value on pin directly.  Just Return the last
+       * value that we wrote to the pin.
+       */
+
+      *value = ((priv->outstate & (1 << pin)) != 0);
+      pcf8574_unlock(priv);
+      return OK;
+    }
+
+  /* It is an input pin. Read the input register for this pin
+   *
+   * The Input Port Register reflects the incoming logic levels of the pins,
+   * regardless of whether the pin is defined as an input or an output by
+   * the Configuration Register. They act only on read operation.
+   */
+
+  ret = pcf8574_read(priv, ®val);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: Failed to read port register: %d\n", ret);
+
+      goto errout_with_lock;
+    }
+
+#ifdef CONFIG_PCF8574_INT_ENABLE
+  /* Update the input status with the 8 bits read from the expander */
+
+  pcf8574_int_update(priv, regval);
+#endif
+
+  /* Return 0 or 1 to indicate the state of pin */
+
+  *value = (bool)((regval >> (pin & 7)) & 1);
+  ret = OK;
+
+errout_with_lock:
+  pcf8574_unlock(priv);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: pcf8574_multiwritepin
+ *
+ * Description:
+ *   Set the pin level for multiple pins. This routine may be faster than
+ *   individual pin accesses. Optional.
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pins - The list of pin indexes to alter in this call
+ *   val - The list of pin levels.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_IOEXPANDER_MULTIPIN
+static int pcf8574_multiwritepin(FAR struct ioexpander_dev_s *dev,
+                                 FAR uint8_t *pins, FAR bool *values,
+                                 int count)
+{
+  FAR struct pcf8574_dev_s *priv = (FAR struct pcf8574_dev_s *)dev;
+  uint8_t pin;
+  int ret;
+  int i;
+
+  DEBUGASSERT(priv != NULL && priv->config != NULL &&
+              pins != NULL && values != NULL);
+
+  gpioinfo("I2C addr=%02x count=%d\n", priv->config->address, count);
+
+  /* Get exclusive access to the I/O Expander */
+
+  pcf8574_lock(priv);
+
+  /* Process each pin setting */
+
+  for (i = 0; i < count; i++)
+    {
+      /* Make sure that this is an output pin */
+
+      pin = pins[i];
+      DEBUGASSERT(pin < 8);
+
+      gpioinfo("%d. pin=%u value=%u\n", pin, values[i]);
+
+      if ((priv->inpins & (1 << pin)) != 0)
+        {
+          gpioerr("ERROR: pin%u is an input\n", pin);
+          continue;
+        }
+
+      /* Set/clear a bit in outstate. */
+
+      if (values[i])
+        {
+          priv->outstate |= (1 << pin);
+        }
+      else
+        {
+          priv->outstate &= ~(1 << pin);
+        }
+    }
+
+  /* Write the OR of the set of input pins and the set of output pins.
+   * In order to set the new output value.
+   */
+
+  ret = pcf8574_write(priv, priv->inpins | priv->outstate);
+
+  pcf8574_unlock(priv);
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: pcf8574_multireadpin
+ *
+ * Description:
+ *   Read the actual level for multiple pins. This routine may be faster than
+ *   individual pin accesses. Optional.
+ *
+ * Input Parameters:
+ *   dev    - Device-specific state data
+ *   pin    - The list of pin indexes to read
+ *   valptr - Pointer to a buffer where the pin levels are stored.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_IOEXPANDER_MULTIPIN
+static int pcf8574_multireadpin(FAR struct ioexpander_dev_s *dev,
+                                FAR uint8_t *pins, FAR bool *values,
+                                int count)
+{
+  FAR struct pcf8574_dev_s *priv = (FAR struct pcf8574_dev_s *)dev;
+  uint8_t regval;
+  uint8_t pin;
+  int ret;
+  int i;
+
+  DEBUGASSERT(priv != NULL && priv->config != NULL &&
+              pins != NULL && values != NULL);
+
+  gpioinfo("I2C addr=%02x, count=%d\n", priv->config->address, count);
+
+  /* Get exclusive access to the I/O Expander */
+
+  pcf8574_lock(priv);
+
+  /* Read the input register for this pin
+   *
+   * The Input Port Register reflects the incoming logic levels of the pins,
+   * regardless of whether the pin is defined as an input or an output by
+   * the Configuration Register. They act only on read operation.
+   */
+
+  ret = pcf8574_read(priv, ®val);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: Failed to read port register: %d\n", ret);
+      goto errout_with_lock;
+    }
+
+#ifdef CONFIG_PCF8574_INT_ENABLE
+  /* Update the input status with the 8 bits read from the expander */
+
+  pcf8574_int_update(priv, regval);
+#endif
+
+  /* Return the requested pin values */
+
+  for (i = 0; i < count; i++)
+    {
+      /* Make sure that this is an output pin */
+
+      pin = pins[i];
+      DEBUGASSERT(pin < 8);
+
+      /* Is the pin an output? */
+
+      if ((priv->inpins & (1 << pin)) == 0)
+        {
+          /* We cannot read the value on pin directly.  Just Return the last
+           * value that we wrote to the pin.
+           */
+
+          values[i] = ((priv->outstate & (1 << pin)) != 0);
+        }
+      else
+        {
+          values[i] = ((regval & (1 << pin)) != 0);
+        }
+
+      gpioinfo("%d. pin=%u value=%u\n", pin, values[i]);
+    }
+ 
+  ret = OK;
+
+errout_with_lock:
+  pcf8574_unlock(priv);
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: pcf8574_attach
+ *
+ * Description:
+ *   Attach and enable a pin interrupt callback function.
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   pinset   - The set of pin events that will generate the callback
+ *   callback - The pointer to callback function.  NULL will detach the
+ *              callback.
+ *   arg      - User-provided callback argument
+ *
+ * Returned Value:
+ *   A non-NULL handle value is returned on success.  This handle may be
+ *   used later to detach and disable the pin interrupt.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_PCF8574_INT_ENABLE
+static FAR void *pcf8574_attach(FAR struct ioexpander_dev_s *dev,
+                              ioe_pinset_t pinset, ioe_callback_t callback,
+                              FAR void *arg)
+{
+  FAR struct pcf8574_dev_s *priv = (FAR struct pcf8574_dev_s *)dev;
+  FAR void *handle = NULL;
+  int i;
+
+  /* Get exclusive access to the I/O Expander */
+
+  pcf8574_lock(priv);
+
+  /* Find and available in entry in the callback table */
+
+  for (i = 0; i < CONFIG_PCF8574_INT_NCALLBACKS; i++)
+    {
+       /* Is this entry available (i.e., no callback attached) */
+
+       if (priv->cb[i].cbfunc == NULL)
+         {
+           /* Yes.. use this entry */
+
+           priv->cb[i].pinset = pinset;
+           priv->cb[i].cbfunc = callback;
+           priv->cb[i].cbarg  = arg;
+           handle             = &priv->cb[i];
+           break;
+         }
+    }
+
+  pcf8574_unlock(priv);
+  return handle;
+}
+#endif
+
+/****************************************************************************
+ * Name: pcf8574_detach
+ *
+ * Description:
+ *   Detach and disable a pin interrupt callback function.
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   handle   - The non-NULL opaque value return by pcf8574_attch()
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+static int pcf8574_detach(FAR struct ioexpander_dev_s *dev, FAR void *handle)
+{
+  FAR struct pcf8574_dev_s *priv = (FAR struct pcf8574_dev_s *)dev;
+  FAR struct pcf8574_callback_s *cb = (FAR struct pcf8574_callback_s *)handle;
+
+  DEBUGASSERT(priv != NULL && cb != NULL);
+  DEBUGASSERT((uintptr_t)cb >= (uintptr_t)&priv->cb[0] &&
+              (uintptr_t)cb <= (uintptr_t)&priv->cb[CONFIG_PCF8574_INT_NCALLBACKS-1]);
+  UNUSED(priv);
+
+  cb->pinset = 0;
+  cb->cbfunc = NULL;
+  cb->cbarg  = NULL;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: pcf8574_int_update
+ *
+ * Description:
+ *   Check for pending interrupts.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_PCF8574_INT_ENABLE
+static void pcf8574_int_update(void *handle, uint8_t input)
+{
+  struct pcf8574_dev_s *priv = handle;
+  irqstate_t flags;
+  uint8_t diff;
+  int pin;
+
+  flags = enter_critical_section();
+
+  /* Check the changed bits from last read */
+
+  diff        = priv->input ^ input;
+  priv->input = input;
+
+  /* PCF8574 doesn't support irq trigger, we have to do this in software. */
+
+  for (pin = 0; pin < 8; pin++)
+    {
+      if (PCF8574_EDGE_SENSITIVE(priv, pin))
+        {
+          /* Edge triggered. Was there a change in the level? */
+
+          if ((diff & 1) != 0)
+            {
+              /* Set interrupt as a function of edge type */
+
+              if (((input & 1) == 0 && PCF8574_EDGE_FALLING(priv, pin)) ||
+                  ((input & 1) != 0 && PCF8574_EDGE_RISING(priv, pin)))
+                {
+                  priv->intstat |= 1 << pin;
+                }
+            }
+        }
+      else /* if (PCF8574_LEVEL_SENSITIVE(priv, pin)) */
+        {
+          /* Level triggered. Set intstat if match in level type. */
+
+          if (((input & 1) != 0 && PCF8574_LEVEL_HIGH(priv, pin)) ||
+              ((input & 1) == 0 && PCF8574_LEVEL_LOW(priv, pin)))
+            {
+              priv->intstat |= 1 << pin;
+            }
+        }
+
+      diff  >>= 1;
+      input >>= 1;
+    }
+
+  leave_critical_section(flags);
+}
+#endif
+
+/****************************************************************************
+ * Name: tc64_update_registers
+ *
+ * Description:
+ *   Read all pin states and update pending interrupts.
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pins - The list of pin indexes to alter in this call
+ *   val - The list of pin levels.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_PCF8574_INT_ENABLE
+static void pcf8574_register_update(FAR struct pcf8574_dev_s *priv)
+{
+  uint8_t regval;
+  int ret;
+
+  /* Read from the PCF8574 port.
+   *
+   * The Input Port Register reflects the incoming logic levels of the pins,
+   * regardless of whether the pin is defined as an input or an output by
+   * the Configuration Register. They act only on read operation.
+   */
+
+  ret = pcf8574_read(priv, ®val);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: Failed to read port register: %d\n", ret);
+    }
+  else
+    {
+      /* Update the input status with the 8 bits read from the expander */
+
+      pcf8574_int_update(priv, regval);
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: pcf8574_irqworker
+ *
+ * Description:
+ *   Handle GPIO interrupt events (this function actually executes in the
+ *   context of the worker thread).
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_PCF8574_INT_ENABLE
+static void pcf8574_irqworker(void *arg)
+{
+  FAR struct pcf8574_dev_s *priv = (FAR struct pcf8574_dev_s *)arg;
+  uint8_t pinset;
+  int ret;
+  int i;
+
+  DEBUGASSERT(priv != NULL && priv->config != NULL);
+
+  /* Check for pending interrupts */
+
+  pcf8574_lock(priv);
+  pcf8574_register_update(priv);
+
+  /* Sample and clear the pending interrupts.  */
+
+  pinset        = priv->intstat;
+  priv->intstat = 0;
+  pcf8574_unlock(priv);
+
+  /* Perform pin interrupt callbacks */
+
+  for (i = 0; i < CONFIG_PCF8574_INT_NCALLBACKS; i++)
+    {
+      /* Is this entry valid (i.e., callback attached)?  */
+
+      if (priv->cb[i].cbfunc != NULL)
+        {
+          /* Did any of the requested pin interrupts occur? */
+
+          ioe_pinset_t match = pinset & priv->cb[i].pinset;
+          if (match != 0)
+            {
+              /* Yes.. perform the callback */
+
+              (void)priv->cb[i].cbfunc(&priv->dev, match,
+                                       priv->cb[i].cbarg);
+            }
+        }
+    }
+
+#ifdef CONFIG_PCF8574_INT_POLL
+  /* Check for pending interrupts */
+
+  pcf8574_register_update(priv);
+
+  /* Re-start the poll timer */
+
+  sched_lock();
+  ret = wd_start(priv->wdog, PCF8574_POLLDELAY, (wdentry_t)pcf8574_poll_expiry,
+                 1, (wdparm_t)priv);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: Failed to start poll timer\n");
+    }
+#endif
+
+  /* Re-enable interrupts */
+
+  priv->config->enable(priv->config, true);
+
+#ifdef CONFIG_PCF8574_INT_POLL
+  sched_unlock();
+#endif
+}
+#endif
+
+/****************************************************************************
+ * Name: pcf8574_interrupt
+ *
+ * Description:
+ *   Handle GPIO interrupt events (this function executes in the
+ *   context of the interrupt).
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_PCF8574_INT_ENABLE
+static void pcf8574_interrupt(FAR void *arg)
+{
+  FAR struct pcf8574_dev_s *priv = (FAR struct pcf8574_dev_s *)arg;
+
+  DEBUGASSERT(priv != NULL && priv->config != NULL);
+
+  /* Defer interrupt processing to the worker thread.  This is not only
+   * much kinder in the use of system resources but is probably necessary
+   * to access the I/O expander device.
+   *
+   * Notice that further GPIO interrupts are disabled until the work is
+   * actually performed.  This is to prevent overrun of the worker thread.
+   * Interrupts are re-enabled in pcf8574_irqworker() when the work is
+   * completed.
+   */
+
+  if (work_available(&priv->work))
+    {
+#ifdef CONFIG_PCF8574_INT_POLL
+      /* Cancel the poll timer */
+
+      (void)wd_cancel(priv->wdog);
+#endif
+
+      /* Disable interrupts */
+
+      priv->config->enable(priv->config, false);
+
+      /* Schedule interrupt related work on the high priority worker thread. */
+
+      work_queue(HPWORK, &priv->work, pcf8574_irqworker,
+                 (FAR void *)priv, 0);
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: pcf8574_poll_expiry
+ *
+ * Description:
+ *   The poll timer has expired; check for missed interrupts
+ *
+ * Input Parameters:
+ *   Standard wdog expiration arguments.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_PCF8574_INT_ENABLE) && defined(CONFIG_PCF8574_INT_POLL)
+static void pcf8574_poll_expiry(int argc, wdparm_t arg1, ...)
+{
+  FAR struct pcf8574_dev_s *priv;
+
+  DEBUGASSERT(argc == 1);
+  priv = (FAR struct pcf8574_dev_s *)arg1;
+  DEBUGASSERT(priv != NULL && priv->config != NULL);
+
+  /* Defer interrupt processing to the worker thread.  This is not only
+   * much kinder in the use of system resources but is probably necessary
+   * to access the I/O expander device.
+   *
+   * Notice that further GPIO interrupts are disabled until the work is
+   * actually performed.  This is to prevent overrun of the worker thread.
+   * Interrupts are re-enabled in pcf8574_irqworker() when the work is
+   * completed.
+   */
+
+  if (work_available(&priv->work))
+    {
+      /* Disable interrupts */
+
+      priv->config->enable(priv->config, false);
+
+      /* Schedule interrupt related work on the high priority worker thread. */
+
+      work_queue(HPWORK, &priv->work, pcf8574_irqworker,
+                 (FAR void *)priv, 0);
+    }
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: pcf8574_initialize
+ *
+ * Description:
+ *   Instantiate and configure the PCF8574xx device driver to use the provided
+ *   I2C device instance.
+ *
+ * Input Parameters:
+ *   i2c     - An I2C driver instance
+ *   minor   - The device i2c address
+ *   config  - Persistent board configuration data
+ *
+ * Returned Value:
+ *   an ioexpander_dev_s instance on success, NULL on failure.
+ *
+ ****************************************************************************/
+
+FAR struct ioexpander_dev_s *pcf8574_initialize(FAR struct i2c_master_s *i2c,
+                                              FAR struct pcf8574_config_s *config)
+{
+  FAR struct pcf8574_dev_s *priv;
+  int ret;
+
+#ifdef CONFIG_PCF8574_MULTIPLE
+  /* Allocate the device state structure */
+
+  priv = (FAR struct pcf8574_dev_s *)kmm_zalloc(sizeof(struct pcf8574_dev_s));
+  if (!priv)
+    {
+      gpioerr("ERROR: Failed to allocate driver instance\n");
+      return NULL;
+    }
+#else
+  /* Use the one-and-only I/O Expander driver instance */
+
+  priv = &g_pcf8574;
+#endif
+
+  /* Initialize the device state structure */
+
+  priv->dev.ops  = &g_pcf8574_ops;
+  priv->i2c      = i2c;
+  priv->config   = config;
+
+#ifdef CONFIG_PCF8574_INT_ENABLE
+  /* Initial interrupt state:  Edge triggered on both edges */
+
+  priv->trigger  = 0xff;  /* All edge triggered */
+  priv->level[0] = 0xff;  /* All rising edge */
+  priv->level[1] = 0xff;  /* All falling edge */
+
+#ifdef CONFIG_PCF8574_INT_POLL
+  /* Set up a timer to poll for missed interrupts */
+
+  priv->wdog    = wd_create();
+  DEBUGASSERT(priv->wdog != NULL);
+
+  ret = wd_start(priv->wdog, PCF8574_POLLDELAY, (wdentry_t)pcf8574_poll_expiry,
+                 1, (wdparm_t)priv);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: Failed to start poll timer\n");
+    }
+#endif
+
+  /* Attach the I/O expander interrupt handler and enable interrupts */
+
+  priv->config->attach(config, pcf8574_interrupt, priv);
+  priv->config->enable(config, true);
+#endif
+
+  sem_init(&priv->exclsem, 0, 1);
+  return &priv->dev;
+}
+
+#endif /* CONFIG_IOEXPANDER_PCF8574 */
diff --git a/drivers/ioexpander/pcf8574.h b/drivers/ioexpander/pcf8574.h
new file mode 100644
index 0000000000000000000000000000000000000000..ec16490807367d81a25e571ff7b82b2929f2c3a5
--- /dev/null
+++ b/drivers/ioexpander/pcf8574.h
@@ -0,0 +1,172 @@
+/********************************************************************************************
+ * drivers/ioexpander/pcf8574.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************************/
+
+#ifndef __DRIVERS_IOEXPANDER_PCF8574_H
+#define __DRIVERS_IOEXPANDER_PCF8574_H
+
+/********************************************************************************************
+ * Included Files
+ ********************************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#if defined(CONFIG_IOEXPANDER) && defined(CONFIG_IOEXPANDER_PCF8574)
+
+/********************************************************************************************
+ * Pre-processor Definitions
+ ********************************************************************************************/
+
+/* Configuration ****************************************************************************/
+/* Prerequisites:
+ *   CONFIG_I2C
+ *     I2C support is required
+ *   CONFIG_IOEXPANDER
+ *     Enables I/O expander support
+ *
+ * Other settings that effect the driver: CONFIG_DISABLE_POLL
+ *
+ * CONFIG_IOEXPANDER_PCF8574
+ *   Enables support for the PCF8574 driver (Needs CONFIG_INPUT)
+ * CONFIG_PCF8574_MULTIPLE
+ *   Can be defined to support multiple PCF8574 devices on board.
+ * CONFIG_PCF8574_INT_NCALLBACKS
+ *   Maximum number of supported pin interrupt callbacks.
+ * CONFIG_PCF8574_INT_POLL
+ *   Enables a poll for missed interrupts
+ * CONFIG_PCF8574_INT_POLLDELAY
+ *   If CONFIG_PCF8574_INT_POLL=y, then this is the delay in microseconds
+ *   between polls for missed interrupts.
+ */
+
+#ifndef CONFIG_I2C
+#  error "CONFIG_I2C is required by PCF8574"
+#endif
+
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+#  ifndef CONFIG_PCF8574_INT_NCALLBACKS
+#    define CONFIG_PCF8574_INT_NCALLBACKS 4
+#  endif
+#endif
+
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+#  ifndef CONFIG_SCHED_WORKQUEUE
+#    error Work queue support required.  CONFIG_SCHED_WORKQUEUE must be selected.
+#  endif
+#endif
+
+#ifndef CONFIG_PCF8574_INT_POLLDELAY
+#  define CONFIG_PCF8574_INT_POLLDELAY 500000
+#endif
+
+/* PCF8574 Definitions **********************************************************************/
+
+#define PCF8574_I2C_MAXFREQUENCY  400000       /* 400KHz */
+#define PCF8574_POLLDELAY         (CONFIG_PCF8574_INT_POLLDELAY / USEC_PER_TICK)
+
+#define PCF8574_LEVEL_SENSITIVE(d,p) \
+  (((d)->trigger  & ((ioe_pinset_t)1 << (p))) == 0)
+#define PCF8574_LEVEL_HIGH(d,p) \
+  (((d)->level[0] & ((ioe_pinset_t)1 << (p))) != 0)
+#define PCF8574_LEVEL_LOW(d,p) \
+  (((d)->level[1] & ((ioe_pinset_t)1 << (p))) != 0)
+
+#define PCF8574_EDGE_SENSITIVE(d,p) \
+  (((d)->trigger  & ((ioe_pinset_t)1 << (p))) != 0)
+#define PCF8574_EDGE_RISING(d,p) \
+  (((d)->level[0] & ((ioe_pinset_t)1 << (p))) != 0)
+#define PCF8574_EDGE_FALLING(d,p) \
+  (((d)->level[1] & ((ioe_pinset_t)1 << (p))) != 0)
+#define PCF8574_EDGE_BOTH(d,p) \
+  (PCF8574_LEVEL_RISING(d,p) && PCF8574_LEVEL_FALLING(d,p))
+
+/********************************************************************************************
+ * Public Types
+ ********************************************************************************************/
+
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+/* This type represents on registered pin interrupt callback */
+
+struct pcf8574_callback_s
+{
+  ioe_pinset_t pinset;                 /* Set of pin interrupts that will generate
+                                        * the callback. */
+  ioe_callback_t cbfunc;               /* The saved callback function pointer */
+  FAR void *cbarg;                     /* Callback argument */
+};
+#endif
+
+/* This structure represents the state of the PCF8574 driver */
+
+struct pcf8574_dev_s
+{
+  struct ioexpander_dev_s dev;         /* Nested structure to allow casting as public gpio
+                                        * expander. */
+  FAR struct pcf8574_config_s *config; /* Board configuration data */
+  FAR struct i2c_master_s *i2c;        /* Saved I2C driver instance */
+  sem_t exclsem;                       /* Mutual exclusion */
+  uint8_t inpins;                      /* Set of input pins */
+  uint8_t outstate;                    /* State of all output pins */
+
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+#ifdef CONFIG_PCF8574_INT_POLL
+  WDOG_ID wdog;                        /* Timer used to poll for missed interrupts */
+#endif
+
+  uint8_t input;                       /* Last input registeres */
+  uint8_t intstat;                     /* Pending interrupts */
+  uint8_t trigger;                     /* Bit encoded: 0=level 1=edge */
+  uint8_t level[2];                    /* Bit encoded: 01=high/rising, 10 low/falling, 11 both */
+  struct work_s work;                  /* Supports the interrupt handling "bottom half" */
+
+  /* Saved callback information for each I/O expander client */
+
+  struct pcf8574_callback_s cb[CONFIG_PCF8574_INT_NCALLBACKS];
+#endif
+};
+
+#endif /* CONFIG_IOEXPANDER && CONFIG_IOEXPANDER_PCF8574 */
+#endif /* __DRIVERS_IOEXPANDER_PCF8574_H */
diff --git a/drivers/ioexpander/skeleton.c b/drivers/ioexpander/skeleton.c
new file mode 100644
index 0000000000000000000000000000000000000000..77e390a2f90455d6b70672e70a3a35051c603a89
--- /dev/null
+++ b/drivers/ioexpander/skeleton.c
@@ -0,0 +1,767 @@
+/****************************************************************************
+ * drivers/ioexpander/skeleton.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "skeleton.h"
+
+#if defined(CONFIG_IOEXPANDER_skeleton)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+/* This type represents on registered pin interrupt callback */
+
+struct skel_callback_s
+{
+   ioe_pinset_t pinset;                 /* Set of pin interrupts that will generate
+                                         * the callback. */
+   ioe_callback_t cbfunc;               /* The saved callback function pointer */
+};
+#endif
+
+/* This structure represents the state of the I/O Expander driver */
+
+struct skel_dev_s
+{
+  struct ioexpander_dev_s dev;          /* Nested structure to allow casting as public gpio
+                                         * expander. */
+#ifdef CONFIG_skeleton_MULTIPLE
+  FAR struct skel_dev_s *flink;         /* Supports a singly linked list of drivers */
+#endif
+  sem_t exclsem;                        /* Mutual exclusion */
+
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+  struct work_s work;                   /* Supports the interrupt handling "bottom half" */
+
+  /* Saved callback information for each I/O expander client */
+
+  struct skel_callback_s cb[CONFIG_skeleton_INT_NCALLBACKS];
+#endif
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static void skel_lock(FAR struct skel_dev_s *priv);
+
+static int skel_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+             int dir);
+static int skel_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+             int opt, void *val);
+static int skel_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+             bool value);
+static int skel_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+             FAR bool *value);
+static int skel_readbuf(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+             FAR bool *value);
+#ifdef CONFIG_IOEXPANDER_MULTIPIN
+static int skel_multiwritepin(FAR struct ioexpander_dev_s *dev,
+             FAR uint8_t *pins, FAR bool *values, int count);
+static int skel_multireadpin(FAR struct ioexpander_dev_s *dev,
+             FAR uint8_t *pins, FAR bool *values, int count);
+static int skel_multireadbuf(FAR struct ioexpander_dev_s *dev,
+             FAR uint8_t *pins, FAR bool *values, int count);
+#endif
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+static int skel_attach(FAR struct ioexpander_dev_s *dev,
+             ioe_pinset_t pinset, ioe_callback_t callback);
+#endif
+
+static void skel_irqworker(void *arg);
+static void skel_interrupt(FAR void *arg);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+#ifndef CONFIG_skeleton_MULTIPLE
+/* If only a single device is supported, then the driver state structure may
+ * as well be pre-allocated.
+ */
+
+static struct skel_dev_s g_skel;
+#endif
+
+/* I/O expander vtable */
+
+static const struct ioexpander_ops_s g_skel_ops =
+{
+  skel_direction,
+  skel_option,
+  skel_writepin,
+  skel_readpin,
+  skel_readbuf
+#ifdef CONFIG_IOEXPANDER_MULTIPIN
+  , skel_multiwritepin
+  , skel_multireadpin
+  , skel_multireadbuf
+#endif
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+  , skel_attach
+#endif
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: skel_lock
+ *
+ * Description:
+ *   Get exclusive access to the I/O Expander
+ *
+ ****************************************************************************/
+
+static void skel_lock(FAR struct skel_dev_s *priv)
+{
+  while (sem_wait(&priv->exclsem) < 0)
+    {
+      /* EINTR is the only expected error from sem_wait() */
+
+      DEBUGASSERT(errno == EINTR);
+    }
+}
+
+#define skel_unlock(p) sem_post(&(p)->exclsem)
+
+/****************************************************************************
+ * Name: skel_direction
+ *
+ * Description:
+ *   Set the direction of an ioexpander pin. Required.
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pin - The index of the pin to alter in this call
+ *   dir - One of the IOEXPANDER_DIRECTION_ macros
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+static int skel_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+                          int direction)
+{
+  FAR struct skel_dev_s *priv = (FAR struct skel_dev_s *)dev;
+  int ret;
+
+  gpioinfo("pin=%u direction=%s\n",
+           pin, (direction == IOEXPANDER_DIRECTION_IN) ? "IN" : "OUT");
+
+  DEBUGASSERT(priv != NULL && pin < CONFIG_IOEXPANDER_NPINS &&
+              (direction == IOEXPANDER_DIRECTION_IN ||
+               direction == IOEXPANDER_DIRECTION_IN));
+
+  /* Get exclusive access to the I/O Expander */
+
+  skel_lock(priv);
+
+  /* Set the pin direction in the I/O Expander */
+#warning Missing logic
+
+  skel_unlock(priv);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: skel_option
+ *
+ * Description:
+ *   Set pin options. Required.
+ *   Since all IO expanders have various pin options, this API allows setting
+ *     pin options in a flexible way.
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pin - The index of the pin to alter in this call
+ *   opt - One of the IOEXPANDER_OPTION_ macros
+ *   val - The option's value
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+static int skel_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+                       int opt, FAR void *val)
+{
+  FAR struct skel_dev_s *priv = (FAR struct skel_dev_s *)dev;
+  int ret = -ENOSYS;
+
+  gpioinfo("addr=%02x pin=%u option=%u\n",  priv->addr, pin, opt);
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Check for pin polarity inversion. */
+
+  if (opt == IOEXPANDER_OPTION_INVERT)
+    {
+      /* Get exclusive access to the I/O Expander */
+
+      skel_lock(priv);
+
+      /* Set the pin option */
+#warning Missing logic
+
+      skel_unlock(priv);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: skel_writepin
+ *
+ * Description:
+ *   Set the pin level. Required.
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pin - The index of the pin to alter in this call
+ *   val - The pin level. Usually TRUE will set the pin high,
+ *         except if OPTION_INVERT has been set on this pin.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+static int skel_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+                         bool value)
+{
+  FAR struct skel_dev_s *priv = (FAR struct skel_dev_s *)dev;
+  int ret;
+
+  gpioinfo("pin=%u value=%u\n", pin, value);
+
+  DEBUGASSERT(priv != NULL && pin < CONFIG_IOEXPANDER_NPINS);
+
+  /* Get exclusive access to the I/O Expander */
+
+  skel_lock(priv);
+
+  /* Write the pin value */
+#warning Missing logic
+
+  skel_unlock(priv);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: skel_readpin
+ *
+ * Description:
+ *   Read the actual PIN level. This can be different from the last value written
+ *      to this pin. Required.
+ *
+ * Input Parameters:
+ *   dev    - Device-specific state data
+ *   pin    - The index of the pin
+ *   valptr - Pointer to a buffer where the pin level is stored. Usually TRUE
+ *            if the pin is high, except if OPTION_INVERT has been set on this pin.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+static int skel_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+                        FAR bool *value)
+{
+  FAR struct skel_dev_s *priv = (FAR struct skel_dev_s *)dev;
+  int ret;
+
+  gpioinfo("pin=%u\n", priv->addr);
+
+  DEBUGASSERT(priv != NULL && pin < CONFIG_IOEXPANDER_NPINS && value != NULL);
+
+  /* Get exclusive access to the I/O Expander */
+
+  skel_lock(priv);
+
+  /* Read the pin value */
+#warning Missing logic
+
+  /* Return the pin value via the value pointer */
+#warning Missing logic
+
+  skel_unlock(priv);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: skel_readbuf
+ *
+ * Description:
+ *   Read the buffered pin level.
+ *   This can be different from the actual pin state. Required.
+ *
+ * Input Parameters:
+ *   dev    - Device-specific state data
+ *   pin    - The index of the pin
+ *   valptr - Pointer to a buffer where the level is stored.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+static int skel_readbuf(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+                        FAR bool *value)
+{
+  FAR struct skel_dev_s *priv = (FAR struct skel_dev_s *)dev;
+  int ret;
+
+  /* Get exclusive access to the I/O Expander */
+
+  skel_lock(priv);
+
+  /* Read the buffered pin level */
+#warning Missing logic
+
+  skel_unlock(priv);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: skel_getmultibits
+ *
+ * Description:
+ *  Read multiple bits from I/O Expander registers.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_IOEXPANDER_MULTIPIN
+static int skel_getmultibits(FAR struct skel_dev_s *priv, FAR uint8_t *pins,
+                             FAR bool *values, int count)
+{
+  ioe_pinset_t pinset;
+  int pin;
+  int ret = OK;
+  int i;
+
+  /* Read the pinset from the IO-Expander hardware */
+#warning Missing logic
+
+  /* Read the requested bits */
+
+  for (i = 0; i < count; i++)
+    {
+      pin = pins[i];
+      if (pin >= CONFIG_IOEXPANDER_NPINS)
+        {
+          return -ENXIO;
+        }
+
+      values[i] = ((pinset & (1 << pin) != 0);
+    }
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: skel_multiwritepin
+ *
+ * Description:
+ *   Set the pin level for multiple pins. This routine may be faster than
+ *   individual pin accesses. Optional.
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pins - The list of pin indexes to alter in this call
+ *   val - The list of pin levels.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_IOEXPANDER_MULTIPIN
+static int skel_multiwritepin(FAR struct ioexpander_dev_s *dev,
+                                 FAR uint8_t *pins, FAR bool *values,
+                                 int count)
+{
+  FAR struct skel_dev_s *priv = (FAR struct skel_dev_s *)dev;
+  ioe_pinset_t pinset;
+  int pin;
+  int ret;
+  int i;
+
+  /* Get exclusive access to the I/O Expander */
+
+  skel_lock(priv);
+
+  /* Read the pinset from the IO-Expander hardware */
+#warning Missing logic
+
+  /* Apply the user defined changes */
+
+  for (i = 0; i < count; i++)
+    {
+      pin = pins[i];
+      if (pin >= CONFIG_IOEXPANDER_NPINS)
+        {
+          skel_unlock(priv);
+          return -ENXIO;
+        }
+
+      if (values[i])
+        {
+          pinset |= (1 << pin);
+        }
+      else
+        {
+          pinset &= ~(1 << pin);
+        }
+    }
+
+  /* Now write back the new pins states */
+#warning Missing logic
+
+  skel_unlock(priv);
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: skel_multireadpin
+ *
+ * Description:
+ *   Read the actual level for multiple pins. This routine may be faster than
+ *   individual pin accesses. Optional.
+ *
+ * Input Parameters:
+ *   dev    - Device-specific state data
+ *   pin    - The list of pin indexes to read
+ *   valptr - Pointer to a buffer where the pin levels are stored.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_IOEXPANDER_MULTIPIN
+static int skel_multireadpin(FAR struct ioexpander_dev_s *dev,
+                                FAR uint8_t *pins, FAR bool *values,
+                                int count)
+{
+  FAR struct skel_dev_s *priv = (FAR struct skel_dev_s *)dev;
+  int ret;
+
+  gpioinfo("count=%u\n", count);
+
+  DEBUGASSERT(priv != NULL && pins != NULL && values != NULL && count > 0);
+
+  /* Get exclusive access to the I/O Expander */
+
+  skel_lock(priv);
+  ret = skel_getmultibits(priv, pins, values, count);
+  skel_unlock(priv);
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: skel_multireadbuf
+ *
+ * Description:
+ *   Read the buffered level of multiple pins. This routine may be faster than
+ *   individual pin accesses. Optional.
+ *
+ * Input Parameters:
+ *   dev    - Device-specific state data
+ *   pin    - The index of the pin
+ *   valptr - Pointer to a buffer where the buffered levels are stored.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_IOEXPANDER_MULTIPIN
+static int skel_multireadbuf(FAR struct ioexpander_dev_s *dev,
+                                FAR uint8_t *pins, FAR bool *values,
+                                int count)
+{
+  FAR struct skel_dev_s *priv = (FAR struct skel_dev_s *)dev;
+  int ret;
+
+  gpioinfo("count=%u\n", count);
+
+  DEBUGASSERT(priv != NULL && pins != NULL && values != NULL && count > 0);
+
+  /* Get exclusive access to the I/O Expander */
+
+  skel_lock(priv);
+  ret = skel_getmultibits(priv, pins, values, count);
+  skel_unlock(priv);
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: skel_attach
+ *
+ * Description:
+ *   Attach a pin interrupt callback function.
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   pinset   - The set of pin events that will generate the callback
+ *   callback - The pointer to callback function.  NULL will detach the
+ *              callback.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_skeleton_INT_ENABLE
+static int skel_attach(FAR struct ioexpander_dev_s *dev, ioe_pinset_t pinset,
+                       ioe_callback_t callback)
+{
+  FAR struct skel_dev_s *priv = (FAR struct skel_dev_s *)dev;
+  int ret;
+  int i;
+
+  /* Get exclusive access to the I/O Expander */
+
+  skel_lock(priv);
+
+  /* Find and available in entry in the callback table */
+
+  ret = -ENOSPC;
+  for (i = 0; i < CONFIG_skeleton_INT_NCALLBACKS; i++)
+    {
+       /* Is this entry available (i.e., no callback attached) */
+
+       if (priv->cb[i].cbfunc == NULL)
+         {
+           /* Yes.. use this entry */
+
+           priv->cb[i].pinset = pinset;
+           priv->cb[i].cbfunc = callback;
+           ret = OK;
+         }
+    }
+
+  /* Add this callback to the table */
+
+  skel_unlock(priv);
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: skel_irqworker
+ *
+ * Description:
+ *   Handle GPIO interrupt events (this function actually executes in the
+ *   context of the worker thread).
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_skeleton_INT_ENABLE
+static void skel_irqworker(void *arg)
+{
+  FAR struct skel_dev_s *priv = (FAR struct skel_dev_s *)arg;
+  ioe_pinset_t pinset;
+  int ret;
+  int i;
+
+  /* Read the pinset from the IO-Expander hardware */
+#warning Missing logic
+
+  /* Perform pin interrupt callbacks */
+
+  for (i = 0; i < CONFIG_skeleton_INT_NCALLBACKS; i++)
+    {
+      /* Is this entry valid (i.e., callback attached)?  If so, did andy of
+       * the requested pin interrupts occur?
+       */
+
+      if (priv->cb[i].cbfunc != NULL)
+        {
+          /* Did any of the requested pin interrupts occur? */
+
+          ioe_pinset_t match = pinset & priv->cb[i].pinset;
+          if (match != 0)
+            {
+              /* Yes.. perform the callback */
+
+              (void)priv->cb[i].cbfunc(&priv->dev, match);
+            }
+        }
+    }
+
+  /* Re-enable interrupts */
+#warning Missing logic
+}
+#endif
+
+/****************************************************************************
+ * Name: skel_interrupt
+ *
+ * Description:
+ *   Handle GPIO interrupt events (this function executes in the
+ *   context of the interrupt).
+ *
+ *   NOTE: A more typical prototype for an interrupt handler would be:
+ *
+ *     int skel_interrupt(int irq, FAR void *context, FAR void *arg)
+ *
+ *   However, it is assume that the lower half, board specific interface
+ *   can provide intercept the actual interrupt, and call this function with
+ *   the arg that can be mapped to the provide driver structure instance.
+ *
+ *   Presumably the lower level interface provides an attach() method that
+ *   provides both the address of skel_interrupt() as well as the arg value.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_skeleton_INT_ENABLE
+static void skel_interrupt(FAR void *arg)
+{
+  FAR struct skel_dev_s *priv = (FAR struct skel_dev_s )arg;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Defer interrupt processing to the worker thread.  This is not only
+   * much kinder in the use of system resources but is probably necessary
+   * to access the I/O expander device.
+   *
+   * Notice that further GPIO interrupts are disabled until the work is
+   * actually performed.  This is to prevent overrun of the worker thread.
+   * Interrupts are re-enabled in skel_irqworker() when the work is
+   * completed.
+   */
+
+  if (work_available(&priv->work))
+    {
+      /* Disable interrupts */
+#warning Missing logic
+
+      /* Schedule interrupt related work on the high priority worker thread. */
+
+      work_queue(HPWORK, &priv->work, skel_irqworker,
+                 (FAR void *)priv, 0);
+    }
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: skel_initialize
+ *
+ * Description:
+ *   Initialize a I/O Expander device.
+ *
+ * NOTE: There are no arguments to the initialization function this
+ * skelton example.  Typical implementations take two arguments:
+ *
+ * 1) A reference to an I2C or SPI interface used to interace with the
+ *    device, and
+ * 2) A read-only configuration structure that provides things like:  I2C
+ *    or SPI characteristics and callbacks to attache, enable, and disable
+ *    interrupts.
+ *
+ ****************************************************************************/
+
+FAR struct ioexpander_dev_s *skel_initialize(void)
+{
+  FAR struct skel_dev_s *priv;
+
+#ifdef CONFIG_skeleton_MULTIPLE
+  /* Allocate the device state structure */
+
+  priv = (FAR struct skel_dev_s *)kmm_zalloc(sizeof(struct skel_dev_s));
+  if (!priv)
+    {
+      gpioerr("ERROR: Failed to allocate driver instance\n");
+      return NULL;
+    }
+#else
+  /* Use the one-and-only I/O Expander driver instance */
+
+  priv = &g_skel;
+#endif
+
+  /* Initialize the device state structure */
+  /* NOTE: Normally you would also save the I2C/SPI device interface and
+   * any configuration information here as well.
+   */
+
+  priv->dev.ops = &g_skel_ops;
+
+#ifdef CONFIG_skeleton_INT_ENABLE
+  /* Attach the I/O expander interrupt handler and enable interrupts */
+#warning Missing logic
+
+#endif
+
+  sem_init(&priv->exclsem, 0, 1);
+  return &priv->dev;
+}
+
+#endif /* CONFIG_IOEXPANDER_skeleton */
diff --git a/drivers/ioexpander/tca64xx.c b/drivers/ioexpander/tca64xx.c
new file mode 100644
index 0000000000000000000000000000000000000000..72838d77b20b7d754e919bc800fcee671f235c8f
--- /dev/null
+++ b/drivers/ioexpander/tca64xx.c
@@ -0,0 +1,1412 @@
+/****************************************************************************
+ * drivers/ioexpander/tca64xx.h
+ * Supports the following parts: TCA6408, TCA6416, TCA6424
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * This header file derives, in part, from the Project Ara TCA64xx driver
+ * which has this copyright:
+ *
+ *   Copyright (c) 2014-2015 Google Inc.
+ *   All rights reserved.
+ *   Author:  Patrick Titiano, Jean Pihet
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "tca64xx.h"
+
+#ifdef CONFIG_IOEXPANDER_TCA64XX
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef MAX
+#  define MAX(a,b) (((a) > (b)) ? (a) : (b))
+#endif
+
+#ifndef MIN
+#  define MIN(a,b) (((a) < (b)) ? (a) : (b))
+#endif
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* TCA64xx Helpers */
+
+static void tca64_lock(FAR struct tca64_dev_s *priv);
+static FAR const struct tca64_part_s *tca64_getpart(FAR struct tca64_dev_s *priv);
+static uint8_t tca64_ngpios(FAR struct tca64_dev_s *priv);
+static uint8_t tca64_input_reg(FAR struct tca64_dev_s *priv, uint8_t pin);
+static uint8_t tca64_output_reg(FAR struct tca64_dev_s *priv, uint8_t pin);
+static uint8_t tca64_polarity_reg(FAR struct tca64_dev_s *priv, uint8_t pin);
+static uint8_t tca64_config_reg(FAR struct tca64_dev_s *priv, uint8_t pin);
+static int tca64_getreg(FAR struct tca64_dev_s *priv, uint8_t regaddr,
+             FAR uint8_t *regval, unsigned int count);
+static int tca64_putreg(struct tca64_dev_s *priv, uint8_t regaddr,
+             FAR uint8_t *regval, unsigned int count);
+
+/* I/O Expander Methods */
+
+static int tca64_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+             int dir);
+static int tca64_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+             int opt, void *regval);
+static int tca64_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+             bool value);
+static int tca64_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+             FAR bool *value);
+#ifdef CONFIG_IOEXPANDER_MULTIPIN
+static int tca64_multiwritepin(FAR struct ioexpander_dev_s *dev,
+             FAR uint8_t *pins, FAR bool *values, int count);
+static int tca64_multireadpin(FAR struct ioexpander_dev_s *dev,
+             FAR uint8_t *pins, FAR bool *values, int count);
+#endif
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+static FAR void *tca64_attach(FAR struct ioexpander_dev_s *dev,
+             ioe_pinset_t pinset, ioe_callback_t callback, FAR void *arg);
+static int tca64_detach(FAR struct ioexpander_dev_s *dev, FAR void *handle);
+#endif
+
+#ifdef CONFIG_TCA64XX_INT_ENABLE
+static void tca64_int_update(FAR struct tca64_dev_s *priv,
+             ioe_pinset_t input, ioe_pinset_t mask);
+static void tca64_register_update(FAR struct tca64_dev_s *priv);
+static void tca64_irqworker(void *arg);
+static void tca64_interrupt(FAR void *arg);
+#ifdef CONFIG_TCA64XX_INT_POLL
+static void tca64_poll_expiry(int argc, wdparm_t arg1, ...);
+#endif
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+#ifndef CONFIG_TCA64XX_MULTIPLE
+/* If only a single device is supported, then the driver state structure may
+ * as well be pre-allocated.
+ */
+
+static struct tca64_dev_s g_tca64;
+#endif
+
+/* I/O expander vtable */
+
+static const struct ioexpander_ops_s g_tca64_ops =
+{
+  tca64_direction,
+  tca64_option,
+  tca64_writepin,
+  tca64_readpin,
+  tca64_readpin
+#ifdef CONFIG_IOEXPANDER_MULTIPIN
+  , tca64_multiwritepin
+  , tca64_multireadpin
+  , tca64_multireadpin
+#endif
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+  , tca64_attach
+  , tca64_detach
+#endif
+};
+
+/* TCA64 part data */
+
+static const struct tca64_part_s g_tca64_parts[TCA64_NPARTS] =
+{
+  {
+    TCA6408_PART,
+    MIN(TCA6408_NR_GPIOS, CONFIG_IOEXPANDER_NPINS),
+    TCA6408_INPUT_REG,
+    TCA6408_OUTPUT_REG,
+    TCA6408_POLARITY_REG,
+    TCA6408_CONFIG_REG,
+  },
+  {
+    TCA6416_PART,
+    MIN(TCA6416_NR_GPIOS, CONFIG_IOEXPANDER_NPINS),
+    TCA6416_INPUT0_REG,
+    TCA6416_OUTPUT0_REG,
+    TCA6416_POLARITY0_REG,
+    TCA6416_CONFIG0_REG,
+  },
+  {
+    TCA6424_PART,
+    MIN(TCA6424_NR_GPIOS, CONFIG_IOEXPANDER_NPINS),
+    TCA6424_INPUT0_REG,
+    TCA6424_OUTPUT0_REG,
+    TCA6424_POLARITY0_REG,
+    TCA6424_CONFIG0_REG,
+  },
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: tca64_lock
+ *
+ * Description:
+ *   Get exclusive access to the I/O Expander
+ *
+ ****************************************************************************/
+
+static void tca64_lock(FAR struct tca64_dev_s *priv)
+{
+  while (sem_wait(&priv->exclsem) < 0)
+    {
+      /* EINTR is the only expected error from sem_wait() */
+
+      DEBUGASSERT(errno == EINTR);
+    }
+}
+
+#define tca64_unlock(p) sem_post(&(p)->exclsem)
+
+/****************************************************************************
+ * Name: tca64_getpart
+ *
+ * Description:
+ *  Look up information for the selected part
+ *
+ ****************************************************************************/
+
+static FAR const struct tca64_part_s *tca64_getpart(FAR struct tca64_dev_s *priv)
+{
+  DEBUGASSERT(priv != NULL && priv->config != NULL &&
+              priv->config->part < TCA64_NPARTS);
+
+  return &g_tca64_parts[priv->config->part];
+}
+
+/****************************************************************************
+ * Name: tca64_ngpios
+ *
+ * Description:
+ *  Return the number of GPIOs supported by the selected part
+ *
+ ****************************************************************************/
+
+static uint8_t tca64_ngpios(FAR struct tca64_dev_s *priv)
+{
+  FAR const struct tca64_part_s *part = tca64_getpart(priv);
+  return part->tp_ngpios;
+}
+
+/****************************************************************************
+ * Name: tca64_input_reg
+ *
+ * Description:
+ *  Return the address of the input register for the specified pin.
+ *
+ ****************************************************************************/
+
+static uint8_t tca64_input_reg(FAR struct tca64_dev_s *priv, uint8_t pin)
+{
+  FAR const struct tca64_part_s *part = tca64_getpart(priv);
+  uint8_t reg = part->tp_output;
+
+  DEBUGASSERT(pin <= part->tp_ngpios);
+  return reg + (pin >> 3);
+}
+
+/****************************************************************************
+ * Name: tca64_output_reg
+ *
+ * Description:
+ *  Return the address of the output register for the specified pin.
+ *
+ ****************************************************************************/
+
+static uint8_t tca64_output_reg(FAR struct tca64_dev_s *priv, uint8_t pin)
+{
+  FAR const struct tca64_part_s *part = tca64_getpart(priv);
+  uint8_t reg = part->tp_output;
+
+  DEBUGASSERT(pin <= part->tp_ngpios);
+  return reg + (pin >> 3);
+}
+
+/****************************************************************************
+ * Name: tca64_polarity_reg
+ *
+ * Description:
+ *  Return the address of the polarity register for the specified pin.
+ *
+ ****************************************************************************/
+
+static uint8_t tca64_polarity_reg(FAR struct tca64_dev_s *priv, uint8_t pin)
+{
+  FAR const struct tca64_part_s *part = tca64_getpart(priv);
+  uint8_t reg = part->tp_output;
+
+  DEBUGASSERT(pin <= part->tp_ngpios);
+  return reg + (pin >> 3);
+}
+
+/****************************************************************************
+ * Name: tca64_config_reg
+ *
+ * Description:
+ *  Return the address of the configuration register for the specified pin.
+ *
+ ****************************************************************************/
+
+static uint8_t tca64_config_reg(FAR struct tca64_dev_s *priv, uint8_t pin)
+{
+  FAR const struct tca64_part_s *part = tca64_getpart(priv);
+  uint8_t reg = part->tp_config;
+
+  DEBUGASSERT(pin <= part->tp_ngpios);
+  return reg + (pin >> 3);
+}
+
+/****************************************************************************
+ * Name: tca64_getreg
+ *
+ * Description:
+ *  Read an 8-bit value from a TCA64xx register
+ *
+ ****************************************************************************/
+
+static int tca64_getreg(FAR struct tca64_dev_s *priv, uint8_t regaddr,
+                        FAR uint8_t *regval, unsigned int count)
+{
+  struct i2c_msg_s msg[2];
+  int ret;
+
+  DEBUGASSERT(priv != NULL && priv->i2c != NULL && priv->config != NULL);
+
+  /* Set up for the transfer */
+
+  msg[0].frequency = TCA64XX_I2C_MAXFREQUENCY,
+  msg[0].addr      = priv->config->address,
+  msg[0].flags     = 0,
+  msg[0].buffer    = ®addr,
+  msg[0].length    = 1,
+
+  msg[1].frequency = TCA64XX_I2C_MAXFREQUENCY,
+  msg[1].addr      = priv->config->address,
+  msg[1].flags     = I2C_M_READ,
+  msg[1].buffer    = regval,
+  msg[1].length    = count,
+
+  /* Perform the transfer */
+
+  ret = I2C_TRANSFER(priv->i2c, msg, 2);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: I2C addr=%02x regaddr=%02x: failed, ret=%d!\n",
+              priv->config->address, regaddr, ret);
+    }
+  else
+    {
+      gpioinfo("I2C addr=%02x regaddr=%02x: read %02x\n",
+               priv->config->address, regaddr, *regval);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: tca64_putreg
+ *
+ * Description:
+ *  Write an 8-bit value to a TCA64xx register
+ *
+ ****************************************************************************/
+
+static int tca64_putreg(struct tca64_dev_s *priv, uint8_t regaddr,
+                        FAR uint8_t *regval, unsigned int count)
+{
+  struct i2c_msg_s msg[1];
+  uint8_t cmd[2];
+  int ret;
+  int i;
+
+  DEBUGASSERT(priv != NULL && priv->i2c != NULL && priv->config != NULL);
+
+  /* Set up for the transfer */
+
+  cmd[0] = regaddr;
+
+  for (i = 0; i < count; i++)
+    {
+      cmd[i+1] = regval[i];
+    }
+
+  msg[0].frequency = TCA64XX_I2C_MAXFREQUENCY,
+  msg[0].addr      = priv->config->address,
+  msg[0].flags     = 0,
+  msg[0].buffer    = cmd,
+  msg[0].length    = count + 1,
+
+  ret = I2C_TRANSFER(priv->i2c, msg, 1);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: claddr=%02x, regaddr=%02x: failed, ret=%d!\n",
+              priv->config->address, regaddr, ret);
+    }
+  else
+    {
+      gpioinfo("claddr=%02x, regaddr=%02x, regval=%02x\n",
+               priv->config->address, regaddr, regval);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: tca64_direction
+ *
+ * Description:
+ *   Set the direction of an ioexpander pin. Required.
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pin - The index of the pin to alter in this call
+ *   dir - One of the IOEXPANDER_DIRECTION_ macros
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+static int tca64_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+                          int direction)
+{
+  FAR struct tca64_dev_s *priv = (FAR struct tca64_dev_s *)dev;
+  uint8_t regaddr;
+  uint8_t regval;
+  int ret;
+
+  DEBUGASSERT(priv != NULL && priv->config != NULL &&
+              pin < CONFIG_IOEXPANDER_NPINS &&
+              (direction == IOEXPANDER_DIRECTION_IN ||
+               direction == IOEXPANDER_DIRECTION_OUT));
+
+  gpioinfo("I2C addr=%02x pin=%u direction=%s\n",
+           priv->config->address, pin,
+           (direction == IOEXPANDER_DIRECTION_IN) ? "IN" : "OUT");
+
+  /* Get exclusive access to the I/O Expander */
+
+  tca64_lock(priv);
+
+  /* Read the Configuration Register associated with this pin.  The
+   * Configuration Register configures the direction of the I/O pins.
+   */
+
+  regaddr = tca64_config_reg(priv, pin);
+  ret = tca64_getreg(priv, regaddr, ®val, 1);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: Failed to read config register at %u: %d\n",
+              regaddr, ret);
+      goto errout_with_lock;
+    }
+
+  /* Set the pin direction in the I/O Expander */
+
+  if (direction == IOEXPANDER_DIRECTION_IN)
+    {
+      /* Configure pin as input. If a bit in the configuration register is
+       * set to 1, the corresponding port pin is enabled as an input with a
+       * high-impedance output driver.
+       */
+
+      regval |= (1 << (pin & 7));
+    }
+  else /* if (direction == IOEXPANDER_DIRECTION_OUT) */
+    {
+      /* Configure pin as output.  If a bit in this register is cleared to
+       * 0, the corresponding port pin is enabled as an output.
+       *
+       * REVISIT: The value of output has not been selected!  This might
+       * put a glitch on the output.
+       */
+
+      regval &= ~(1 << (pin & 7));
+    }
+
+  /* Write back the modified register content */
+
+  ret = tca64_putreg(priv, regaddr, ®val, 1);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: Failed to write config register at %u: %d\n",
+              regaddr, ret);
+    }
+
+errout_with_lock:
+  tca64_unlock(priv);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: tca64_option
+ *
+ * Description:
+ *   Set pin options. Required.
+ *   Since all IO expanders have various pin options, this API allows setting
+ *     pin options in a flexible way.
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pin - The index of the pin to alter in this call
+ *   opt - One of the IOEXPANDER_OPTION_ macros
+ *   val - The option's value
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+static int tca64_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+                        int opt, FAR void *value)
+{
+  FAR struct tca64_dev_s *priv = (FAR struct tca64_dev_s *)dev;
+  int ret = -ENOSYS;
+
+  DEBUGASSERT(priv != NULL && priv->config != NULL);
+
+  gpioinfo("I2C addr=%02x pin=%u option=%u\n",
+           priv->config->address, pin, opt);
+
+  /* Check for pin polarity inversion.  The Polarity Inversion Register
+   * allows polarity inversion of pins defined as inputs by the
+   * Configuration Register. If a bit in this register is set, the
+   * corresponding port pin's polarity is inverted. If a bit in this
+   * register is cleared, the corresponding port pin's original polarity
+   * is retained.
+   */
+
+  if (opt == IOEXPANDER_OPTION_INVERT)
+    {
+      unsigned int ival = (unsigned int)((uintptr_t)value);
+      uint8_t regaddr;
+      uint8_t polarity;
+
+      /* Get exclusive access to the I/O Expander */
+
+      tca64_lock(priv);
+
+      /* Read the polarity register */
+
+      regaddr = tca64_polarity_reg(priv, pin);
+      ret = tca64_getreg(priv, regaddr, &polarity, 1);
+      if (ret < 0)
+        {
+          gpioerr("ERROR: Failed to read polarity register at %u: %d\n",
+                  regaddr, ret);
+          tca64_unlock(priv);
+          return ret;
+        }
+
+      /* Set/clear the pin option */
+
+      if (ival == IOEXPANDER_OPTION_INVERT)
+        {
+          polarity |= (1 << (pin & 7));
+        }
+      else
+        {
+          polarity &= ~(1 << (pin & 7));
+        }
+
+      /* Write back the modified register */
+
+      ret = tca64_putreg(priv, regaddr, &polarity, 1);
+      if (ret < 0)
+        {
+          gpioerr("ERROR: Failed to read polarity register at %u: %d\n",
+                  regaddr, ret);
+        }
+
+      tca64_unlock(priv);
+    }
+
+#ifdef CONFIG_TCA64XX_INT_ENABLE
+  /* Interrupt configuration */
+
+  else if (opt == IOEXPANDER_OPTION_INTCFG)
+    {
+      unsigned int ival = (unsigned int)((uintptr_t)value);
+      ioe_pinset_t bit = ((ioe_pinset_t)1 << pin);
+
+      ret = OK;
+      tca64_lock(priv);
+      switch (ival)
+        {
+          case IOEXPANDER_VAL_HIGH:    /* Interrupt on high level */
+            priv->trigger  &= ~bit;
+            priv->level[0] |= bit;
+            priv->level[1] &= ~bit;
+            break;
+
+          case IOEXPANDER_VAL_LOW:     /* Interrupt on low level */
+            priv->trigger  &= ~bit;
+            priv->level[0] &= ~bit;
+            priv->level[1] |= bit;
+            break;
+
+          case IOEXPANDER_VAL_RISING:  /* Interrupt on rising edge */
+            priv->trigger  |= bit;
+            priv->level[0] |= bit;
+            priv->level[1] &= ~bit;
+            break;
+
+          case IOEXPANDER_VAL_FALLING: /* Interrupt on falling edge */
+            priv->trigger  |= bit;
+            priv->level[0] &= ~bit;
+            priv->level[1] |= bit;
+            break;
+
+          case IOEXPANDER_VAL_BOTH:    /* Interrupt on both edges */
+            priv->trigger  |= bit;
+            priv->level[0] |= bit;
+            priv->level[1] |= bit;
+            break;
+
+          case IOEXPANDER_VAL_DISABLE:
+            break;
+
+          default:
+            ret = -EINVAL;
+        }
+
+      tca64_unlock(priv);
+    }
+#endif
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: tca64_writepin
+ *
+ * Description:
+ *   Set the pin level. Required.
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pin - The index of the pin to alter in this call
+ *   val - The pin level. Usually TRUE will set the pin high,
+ *         except if OPTION_INVERT has been set on this pin.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+static int tca64_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+                         bool value)
+{
+  FAR struct tca64_dev_s *priv = (FAR struct tca64_dev_s *)dev;
+  uint8_t regaddr;
+  uint8_t regval;
+  int ret;
+
+  DEBUGASSERT(priv != NULL && priv->config != NULL &&
+              pin < CONFIG_IOEXPANDER_NPINS);
+
+  gpioinfo("I2C addr=%02x pin=%u value=%u\n",
+           priv->config->address, pin, value);
+
+  /* Get exclusive access to the I/O Expander */
+
+  tca64_lock(priv);
+
+  /* Read the output register. */
+
+  regaddr = tca64_output_reg(priv, pin);
+  ret = tca64_getreg(priv, regaddr, ®val, 1);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: Failed to read output register at %u: %d\n",
+              regaddr, ret);
+      goto errout_with_lock;
+    }
+
+  /* Set output pins default value (before configuring it as output) The
+   * Output Port Register shows the outgoing logic levels of the pins
+   * defined as outputs by the Configuration Register.
+   */
+
+  if (value != 0)
+    {
+      regval |= (1 << (pin & 7));
+    }
+  else
+    {
+      regval &= ~(1 << (pin & 7));
+    }
+
+  /* Write the modified output register value */
+
+  ret = tca64_putreg(priv, regaddr, ®val, 1);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: Failed to write output register at %u: %d\n",
+              regaddr, ret);
+    }
+
+errout_with_lock:
+  tca64_unlock(priv);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: tca64_readpin
+ *
+ * Description:
+ *   Read the actual PIN level. This can be different from the last value written
+ *   to this pin. Required.
+ *
+ * Input Parameters:
+ *   dev    - Device-specific state data
+ *   pin    - The index of the pin
+ *   valptr - Pointer to a buffer where the pin level is stored. Usually TRUE
+ *            if the pin is high, except if OPTION_INVERT has been set on this pin.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+static int tca64_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
+                        FAR bool *value)
+{
+  FAR struct tca64_dev_s *priv = (FAR struct tca64_dev_s *)dev;
+  uint8_t regaddr;
+  uint8_t regval;
+  int ret;
+
+  DEBUGASSERT(priv != NULL && priv->config != NULL &&
+              pin < CONFIG_IOEXPANDER_NPINS && value != NULL);
+
+  gpioinfo("I2C addr=%02x, pin=%u\n", priv->config->address, pin);
+
+  /* Get exclusive access to the I/O Expander */
+
+  tca64_lock(priv);
+
+  /* Read the input register for this pin
+   *
+   * The Input Port Register reflects the incoming logic levels of the pins,
+   * regardless of whether the pin is defined as an input or an output by
+   * the Configuration Register. They act only on read operation.
+   */
+
+  regaddr = tca64_input_reg(priv, pin);
+  ret = tca64_getreg(priv, regaddr, ®val, 1);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: Failed to read input register at %u: %d\n",
+              regaddr, ret);
+      goto errout_with_lock;
+    }
+
+#ifdef CONFIG_TCA64XX_INT_ENABLE
+  /* Update the input status with the 8 bits read from the expander */
+
+  tca64_int_update(priv, (ioe_pinset_t)regval << (pin & ~7),
+                   (ioe_pinset_t)0xff << (pin & ~7));
+#endif
+
+  /* Return 0 or 1 to indicate the state of pin */
+
+  *value = (bool)((regval >> (pin & 7)) & 1);
+  ret = OK;
+
+errout_with_lock:
+  tca64_unlock(priv);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: tca64_multiwritepin
+ *
+ * Description:
+ *   Set the pin level for multiple pins. This routine may be faster than
+ *   individual pin accesses. Optional.
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pins - The list of pin indexes to alter in this call
+ *   val - The list of pin levels.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_IOEXPANDER_MULTIPIN
+static int tca64_multiwritepin(FAR struct ioexpander_dev_s *dev,
+                                 FAR uint8_t *pins, FAR bool *values,
+                                 int count)
+{
+  FAR struct tca64_dev_s *priv = (FAR struct tca64_dev_s *)dev;
+  ioe_pinset_t pinset;
+  uint8_t regaddr;
+  uint8_t ngpios;
+  uint8_t nregs;
+  uint8_t pin;
+  int ret;
+  int i;
+
+  /* Get exclusive access to the I/O Expander */
+
+  tca64_lock(priv);
+
+  /* Read the output registers for pin 0 through the number of supported
+   * pins.
+   */
+
+  ngpios  = tca64_ngpios(priv);
+  nregs   = (ngpios + 7) >> 3;
+  pinset  = 0;
+  regaddr = tca64_output_reg(priv, 0);
+
+  ret = tca64_getreg(priv, regaddr, (FAR uint8_t *)&pinset, nregs);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: Failed to read %u ouput registers at %u: %d\n",
+              nregs, regaddr, ret);
+      goto errout_with_lock;
+    }
+
+  /* Apply the user defined changes */
+
+  for (i = 0; i < count; i++)
+    {
+      pin = pins[i];
+      DEBUGASSERT(pin < CONFIG_IOEXPANDER_NPINS);
+
+      if (values[i])
+        {
+          pinset |= (1 << pin);
+        }
+      else
+        {
+          pinset &= ~(1 << pin);
+        }
+    }
+
+  /* Now write back the new pins states */
+
+  ret = tca64_putreg(priv, regaddr, (FAR uint8_t *)&pinset, nregs);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: Failed to write %u output registers at %u: %d\n",
+              nregs, regaddr, ret);
+    }
+
+errout_with_lock:
+  tca64_unlock(priv);
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: tca64_multireadpin
+ *
+ * Description:
+ *   Read the actual level for multiple pins. This routine may be faster than
+ *   individual pin accesses. Optional.
+ *
+ * Input Parameters:
+ *   dev    - Device-specific state data
+ *   pin    - The list of pin indexes to read
+ *   valptr - Pointer to a buffer where the pin levels are stored.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_IOEXPANDER_MULTIPIN
+static int tca64_multireadpin(FAR struct ioexpander_dev_s *dev,
+                                FAR uint8_t *pins, FAR bool *values,
+                                int count)
+{
+  FAR struct tca64_dev_s *priv = (FAR struct tca64_dev_s *)dev;
+  ioe_pinset_t pinset;
+  uint8_t regaddr;
+  uint8_t ngpios;
+  uint8_t nregs;
+  uint8_t pin;
+  int ret;
+  int i;
+
+  DEBUGASSERT(priv != NULL && priv->config != NULL && pins != NULL &&
+              values != NULL && count > 0);
+
+  gpioinfo("I2C addr=%02x, count=%u\n", priv->config->address, count);
+
+  /* Get exclusive access to the I/O Expander */
+
+  tca64_lock(priv);
+
+  /* Read the input register for pin 0 through the number of supported pins.
+   *
+   * The Input Port Register reflects the incoming logic levels of the pins,
+   * regardless of whether the pin is defined as an input or an output by
+   * the Configuration Register. They act only on read operation.
+   */
+
+  ngpios  = tca64_ngpios(priv);
+  nregs   = (ngpios + 7) >> 3;
+  pinset  = 0;
+  regaddr = tca64_input_reg(priv, 0);
+
+  ret = tca64_getreg(priv, regaddr, (FAR uint8_t *)&pinset, nregs);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: Failed to read input %u registers at %u: %d\n",
+              nregs, regaddr, ret);
+      goto errout_with_lock;
+    }
+
+  /* Update the input status with the 8 bits read from the expander */
+
+  for (i = 0; i < count; i++)
+    {
+      pin = pins[i];
+      DEBUGASSERT(pin < CONFIG_IOEXPANDER_NPINS);
+
+      values[i] = ((pinset & (1 << pin)) != 0);
+    }
+
+#ifdef CONFIG_TCA64XX_INT_ENABLE
+  /* Update the input status with the 32 bits read from the expander */
+
+  tca64_int_update(priv, pinset, PINSET_ALL);
+#endif
+
+errout_with_lock:
+  tca64_unlock(priv);
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: tca64_attach
+ *
+ * Description:
+ *   Attach and enable a pin interrupt callback function.
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   pinset   - The set of pin events that will generate the callback
+ *   callback - The pointer to callback function.  NULL will detach the
+ *              callback.
+ *   arg      - User-provided callback argument
+ *
+ * Returned Value:
+ *   A non-NULL handle value is returned on success.  This handle may be
+ *   used later to detach and disable the pin interrupt.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_TCA64XX_INT_ENABLE
+static FAR void *tca64_attach(FAR struct ioexpander_dev_s *dev,
+                              ioe_pinset_t pinset, ioe_callback_t callback,
+                              FAR void *arg)
+{
+  FAR struct tca64_dev_s *priv = (FAR struct tca64_dev_s *)dev;
+  FAR void *handle = NULL;
+  int i;
+
+  /* Get exclusive access to the I/O Expander */
+
+  tca64_lock(priv);
+
+  /* Find and available in entry in the callback table */
+
+  for (i = 0; i < CONFIG_TCA64XX_INT_NCALLBACKS; i++)
+    {
+       /* Is this entry available (i.e., no callback attached) */
+
+       if (priv->cb[i].cbfunc == NULL)
+         {
+           /* Yes.. use this entry */
+
+           priv->cb[i].pinset = pinset;
+           priv->cb[i].cbfunc = callback;
+           priv->cb[i].cbarg  = arg;
+           handle             = &priv->cb[i];
+           break;
+         }
+    }
+
+  tca64_unlock(priv);
+  return handle;
+}
+#endif
+
+/****************************************************************************
+ * Name: tca64_detach
+ *
+ * Description:
+ *   Detach and disable a pin interrupt callback function.
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   handle   - The non-NULL opaque value return by tca64_attch()
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+static int tca64_detach(FAR struct ioexpander_dev_s *dev, FAR void *handle)
+{
+  FAR struct tca64_dev_s *priv = (FAR struct tca64_dev_s *)dev;
+  FAR struct tca64_callback_s *cb = (FAR struct tca64_callback_s *)handle;
+
+  DEBUGASSERT(priv != NULL && cb != NULL);
+  DEBUGASSERT((uintptr_t)cb >= (uintptr_t)&priv->cb[0] &&
+              (uintptr_t)cb <= (uintptr_t)&priv->cb[CONFIG_TCA64XX_INT_NCALLBACKS-1]);
+  UNUSED(priv);
+
+  cb->pinset = 0;
+  cb->cbfunc = NULL;
+  cb->cbarg  = NULL;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: tca64_int_update
+ *
+ * Description:
+ *   Check for pending interrupts.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_TCA64XX_INT_ENABLE
+static void tca64_int_update(FAR struct tca64_dev_s *priv, ioe_pinset_t input,
+                             ioe_pinset_t mask)
+{
+  ioe_pinset_t diff;
+  irqstate_t flags;
+  int ngios = tca64_ngpios(priv);
+  int pin;
+
+  flags = enter_critical_section();
+
+  /* Check the changed bits from last read */
+
+  input       = (priv->input & ~mask) | (input & mask);
+  diff        = priv->input ^ input;
+  priv->input = input;
+
+  /* TCA64XX doesn't support irq trigger, we have to do this in software. */
+
+  for (pin = 0; pin < ngios; pin++)
+    {
+      if (TCA64_EDGE_SENSITIVE(priv, pin))
+        {
+          /* Edge triggered. Was there a change in the level? */
+
+          if ((diff & 1) != 0)
+            {
+              /* Set interrupt as a function of edge type */
+
+              if (((input & 1) == 0 && TCA64_EDGE_FALLING(priv, pin)) ||
+                  ((input & 1) != 0 && TCA64_EDGE_RISING(priv, pin)))
+                {
+                  priv->intstat |= 1 << pin;
+                }
+            }
+        }
+      else /* if (TCA64_LEVEL_SENSITIVE(priv, pin)) */
+        {
+          /* Level triggered. Set intstat bit if match in level type. */
+
+          if (((input & 1) != 0 && TCA64_LEVEL_HIGH(priv, pin)) ||
+              ((input & 1) == 0 && TCA64_LEVEL_LOW(priv, pin)))
+            {
+              priv->intstat |= 1 << pin;
+            }
+        }
+
+      diff  >>= 1;
+      input >>= 1;
+    }
+
+  leave_critical_section(flags);
+}
+#endif
+
+/****************************************************************************
+ * Name: tc64_update_registers
+ *
+ * Description:
+ *   Read all pin states and update pending interrupts.
+ *
+ * Input Parameters:
+ *   dev - Device-specific state data
+ *   pins - The list of pin indexes to alter in this call
+ *   val - The list of pin levels.
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_TCA64XX_INT_ENABLE
+static void tca64_register_update(FAR struct tca64_dev_s *priv)
+{
+  ioe_pinset_t pinset;
+  uint8_t regaddr;
+  uint8_t ngpios;
+  uint8_t nregs;
+  int ret;
+
+  /* Read the input register for pin 0 through the number of supported pins.
+   *
+   * The Input Port Register reflects the incoming logic levels of the pins,
+   * regardless of whether the pin is defined as an input or an output by
+   * the Configuration Register. They act only on read operation.
+   */
+
+  ngpios  = tca64_ngpios(priv);
+  nregs   = (ngpios + 7) >> 3;
+  pinset  = 0;
+  regaddr = tca64_input_reg(priv, 0);
+
+  ret = tca64_getreg(priv, regaddr, (FAR uint8_t *)&pinset, nregs);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: Failed to read input %u registers at %u: %d\n",
+              nregs, regaddr, ret);
+      return;
+    }
+
+  /* Update the input status with the 32 bits read from the expander */
+
+  tca64_int_update(priv, pinset, PINSET_ALL);
+}
+#endif
+
+/****************************************************************************
+ * Name: tca64_irqworker
+ *
+ * Description:
+ *   Handle GPIO interrupt events (this function actually executes in the
+ *   context of the worker thread).
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_TCA64XX_INT_ENABLE
+static void tca64_irqworker(void *arg)
+{
+  FAR struct tca64_dev_s *priv = (FAR struct tca64_dev_s *)arg;
+  ioe_pinset_t pinset;
+  uint8_t regaddr;
+  uint8_t ngpios;
+  uint8_t nregs;
+  int ret;
+  int i;
+
+  DEBUGASSERT(priv != NULL && priv->config != NULL);
+
+  /* Get exclusive access to read inputs and assess pending interrupts. */
+
+  tca64_lock(priv);
+
+  /* Read the input register for pin 0 through the number of supported pins.
+   *
+   * The Input Port Register reflects the incoming logic levels of the pins,
+   * regardless of whether the pin is defined as an input or an output by
+   * the Configuration Register. They act only on read operation.
+   */
+
+  ngpios  = tca64_ngpios(priv);
+  nregs   = (ngpios + 7) >> 3;
+  pinset  = 0;
+  regaddr = tca64_input_reg(priv, 0);
+
+  ret = tca64_getreg(priv, regaddr, (FAR uint8_t *)&pinset, nregs);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: Failed to read input %u registers at %u: %d\n",
+              nregs, regaddr, ret);
+      tca64_unlock(priv);
+      goto errout_with_restart;
+    }
+
+  /* Update the input status with the 32 bits read from the expander */
+
+  tca64_int_update(priv, pinset, PINSET_ALL);
+
+  /* Sample and clear the pending interrupts.  */
+
+  pinset        = priv->intstat;
+  priv->intstat = 0;
+  tca64_unlock(priv);
+
+  /* Perform pin interrupt callbacks */
+
+  for (i = 0; i < CONFIG_TCA64XX_INT_NCALLBACKS; i++)
+    {
+      /* Is this entry valid (i.e., callback attached)?  */
+
+      if (priv->cb[i].cbfunc != NULL)
+        {
+          /* Did any of the requested pin interrupts occur? */
+
+          ioe_pinset_t match = pinset & priv->cb[i].pinset;
+          if (match != 0)
+            {
+              /* Yes.. perform the callback */
+
+              (void)priv->cb[i].cbfunc(&priv->dev, match,
+                                       priv->cb[i].cbarg);
+            }
+        }
+    }
+
+errout_with_restart:
+
+#ifdef CONFIG_TCA64XX_INT_POLL
+  /* Check for pending interrupts */
+
+  tca64_register_update(priv);
+
+  /* Re-start the poll timer */
+
+  sched_lock();
+  ret = wd_start(priv->wdog, TCA64XX_POLLDELAY, (wdentry_t)tca64_poll_expiry,
+                 1, (wdparm_t)priv);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: Failed to start poll timer\n");
+    }
+#endif
+
+  /* Re-enable interrupts */
+
+  priv->config->enable(priv->config, true);
+
+#ifdef CONFIG_TCA64XX_INT_POLL
+  sched_unlock();
+#endif
+}
+#endif
+
+/****************************************************************************
+ * Name: tca64_interrupt
+ *
+ * Description:
+ *   Handle GPIO interrupt events (this function executes in the
+ *   context of the interrupt).
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_TCA64XX_INT_ENABLE
+static void tca64_interrupt(FAR void *arg)
+{
+  FAR struct tca64_dev_s *priv = (FAR struct tca64_dev_s *)arg;
+
+  DEBUGASSERT(priv != NULL && priv->config != NULL);
+
+  /* Defer interrupt processing to the worker thread.  This is not only
+   * much kinder in the use of system resources but is probably necessary
+   * to access the I/O expander device.
+   *
+   * Notice that further GPIO interrupts are disabled until the work is
+   * actually performed.  This is to prevent overrun of the worker thread.
+   * Interrupts are re-enabled in tca64_irqworker() when the work is
+   * completed.
+   */
+
+  if (work_available(&priv->work))
+    {
+#ifdef CONFIG_TCA64XX_INT_POLL
+      /* Cancel the poll timer */
+
+      (void)wd_cancel(priv->wdog);
+#endif
+
+      /* Disable interrupts */
+
+      priv->config->enable(priv->config, false);
+
+      /* Schedule interrupt related work on the high priority worker thread. */
+
+      work_queue(HPWORK, &priv->work, tca64_irqworker,
+                 (FAR void *)priv, 0);
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: tca64_poll_expiry
+ *
+ * Description:
+ *   The poll timer has expired; check for missed interrupts
+ *
+ * Input Parameters:
+ *   Standard wdog expiration arguments.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_TCA64XX_INT_ENABLE) && defined(CONFIG_TCA64XX_INT_POLL)
+static void tca64_poll_expiry(int argc, wdparm_t arg1, ...)
+{
+  FAR struct tca64_dev_s *priv;
+
+  DEBUGASSERT(argc == 1);
+  priv = (FAR struct tca64_dev_s *)arg1;
+  DEBUGASSERT(priv != NULL && priv->config != NULL);
+
+  /* Defer interrupt processing to the worker thread.  This is not only
+   * much kinder in the use of system resources but is probably necessary
+   * to access the I/O expander device.
+   *
+   * Notice that further GPIO interrupts are disabled until the work is
+   * actually performed.  This is to prevent overrun of the worker thread.
+   * Interrupts are re-enabled in tca64_irqworker() when the work is
+   * completed.
+   */
+
+  if (work_available(&priv->work))
+    {
+      /* Disable interrupts */
+
+      priv->config->enable(priv->config, false);
+
+      /* Schedule interrupt related work on the high priority worker thread. */
+
+      work_queue(HPWORK, &priv->work, tca64_irqworker,
+                 (FAR void *)priv, 0);
+    }
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: tca64_initialize
+ *
+ * Description:
+ *   Instantiate and configure the TCA64xx device driver to use the provided
+ *   I2C device instance.
+ *
+ * Input Parameters:
+ *   i2c     - An I2C driver instance
+ *   minor   - The device i2c address
+ *   config  - Persistent board configuration data
+ *
+ * Returned Value:
+ *   an ioexpander_dev_s instance on success, NULL on failure.
+ *
+ ****************************************************************************/
+
+FAR struct ioexpander_dev_s *tca64_initialize(FAR struct i2c_master_s *i2c,
+                                              FAR struct tca64_config_s *config)
+{
+  FAR struct tca64_dev_s *priv;
+  int ret;
+
+#ifdef CONFIG_TCA64XX_MULTIPLE
+  /* Allocate the device state structure */
+
+  priv = (FAR struct tca64_dev_s *)kmm_zalloc(sizeof(struct tca64_dev_s));
+  if (!priv)
+    {
+      gpioerr("ERROR: Failed to allocate driver instance\n");
+      return NULL;
+    }
+#else
+  /* Use the one-and-only I/O Expander driver instance */
+
+  priv = &g_tca64;
+#endif
+
+  /* Initialize the device state structure */
+
+  priv->dev.ops = &g_tca64_ops;
+  priv->i2c     = i2c;
+  priv->config  = config;
+
+#ifdef CONFIG_TCA64XX_INT_ENABLE
+  /* Initial interrupt state:  Edge triggered on both edges */
+
+  priv->trigger  = PINSET_ALL;  /* All edge triggered */
+  priv->level[0] = PINSET_ALL;  /* All rising edge */
+  priv->level[1] = PINSET_ALL;  /* All falling edge */
+
+#ifdef CONFIG_TCA64XX_INT_POLL
+  /* Set up a timer to poll for missed interrupts */
+
+  priv->wdog    = wd_create();
+  DEBUGASSERT(priv->wdog != NULL);
+
+  ret = wd_start(priv->wdog, TCA64XX_POLLDELAY, (wdentry_t)tca64_poll_expiry,
+                 1, (wdparm_t)priv);
+  if (ret < 0)
+    {
+      gpioerr("ERROR: Failed to start poll timer\n");
+    }
+#endif
+
+  /* Attach the I/O expander interrupt handler and enable interrupts */
+
+  priv->config->attach(config, tca64_interrupt, priv);
+  priv->config->enable(config, true);
+#endif
+
+  sem_init(&priv->exclsem, 0, 1);
+  return &priv->dev;
+}
+
+#endif /* CONFIG_IOEXPANDER_TCA64XX */
diff --git a/drivers/ioexpander/tca64xx.h b/drivers/ioexpander/tca64xx.h
new file mode 100644
index 0000000000000000000000000000000000000000..dbe9557b455731ca00ff97b194041277ac860a22
--- /dev/null
+++ b/drivers/ioexpander/tca64xx.h
@@ -0,0 +1,244 @@
+/********************************************************************************************
+ * drivers/ioexpander/tca64.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Sebastien Lorquet 
+ *
+ * References:
+ *   "16-bit I2C-bus and SMBus I/O port with interrupt product datasheet",
+ *   Rev. 08 - 22 October 2009, NXP
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************************/
+
+#ifndef __DRIVERS_IOEXPANDER_TCA64XX_H
+#define __DRIVERS_IOEXPANDER_TCA64XX_H
+
+/********************************************************************************************
+ * Included Files
+ ********************************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#if defined(CONFIG_IOEXPANDER) && defined(CONFIG_IOEXPANDER_TCA64XX)
+
+/********************************************************************************************
+ * Pre-processor Definitions
+ ********************************************************************************************/
+
+/* Configuration ****************************************************************************/
+/* Prerequisites:
+ *   CONFIG_I2C
+ *     I2C support is required
+ *   CONFIG_IOEXPANDER
+ *     Enables I/O expander support
+ *
+ * Other settings that effect the driver: CONFIG_DISABLE_POLL
+ *
+ * CONFIG_IOEXPANDER_TCA64XX
+ *   Enables support for the TCA64XX driver (Needs CONFIG_INPUT)
+ * CONFIG_TCA64XX_MULTIPLE
+ *   Can be defined to support multiple TCA64XX devices on board.
+ * CONFIG_TCA64XX_INT_NCALLBACKS
+ *   Maximum number of supported pin interrupt callbacks.
+ * CONFIG_TCA64XX_INT_POLL
+ *   Enables a poll for missed interrupts
+ * CONFIG_TCA64XX_INT_POLLDELAY
+ *   If CONFIG_TCA64XX_INT_POLL=y, then this is the delay in microseconds
+ *   between polls for missed interrupts.
+ */
+
+#ifndef CONFIG_I2C
+#  error "CONFIG_I2C is required by TCA64XX"
+#endif
+
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+#  ifndef CONFIG_TCA64XX_INT_NCALLBACKS
+#    define CONFIG_TCA64XX_INT_NCALLBACKS 4
+#  endif
+#endif
+
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+#  ifndef CONFIG_SCHED_WORKQUEUE
+#    error Work queue support required.  CONFIG_SCHED_WORKQUEUE must be selected.
+#  endif
+#endif
+
+#ifndef CONFIG_TCA64XX_INT_POLLDELAY
+#  define CONFIG_TCA64XX_INT_POLLDELAY 500000
+#endif
+
+/* TCA64XX Definitions **********************************************************************/
+
+/* I2C frequency */
+
+#define TCA64XX_I2C_MAXFREQUENCY        400000       /* 400KHz */
+
+/* TCA64XX Parts ****************************************************************************/
+
+#define TCA6408_INPUT_REG               0x00
+#define TCA6408_OUTPUT_REG              0x01
+#define TCA6408_POLARITY_REG            0x02
+#define TCA6408_CONFIG_REG              0x03
+
+#define TCA6408_NR_GPIOS                8
+
+#define TCA6416_INPUT0_REG              0x00
+#define TCA6416_INPUT1_REG              0x01
+#define TCA6416_OUTPUT0_REG             0x02
+#define TCA6416_OUTPUT1_REG             0x03
+#define TCA6416_POLARITY0_REG           0x04
+#define TCA6416_POLARITY1_REG           0x05
+#define TCA6416_CONFIG0_REG             0x06
+#define TCA6416_CONFIG1_REG             0x07
+
+#define TCA6416_NR_GPIOS                16
+
+#define TCA6424_INPUT0_REG              0x00
+#define TCA6424_INPUT1_REG              0x01
+#define TCA6424_INPUT2_REG              0x02
+#define TCA6424_OUTPUT0_REG             0x04
+#define TCA6424_OUTPUT1_REG             0x05
+#define TCA6424_OUTPUT2_REG             0x06
+#define TCA6424_POLARITY0_REG           0x08
+#define TCA6424_POLARITY1_REG           0x09
+#define TCA6424_POLARITY2_REG           0x0A
+#define TCA6424_CONFIG0_REG             0x0C
+#define TCA6424_CONFIG1_REG             0x0D
+#define TCA6424_CONFIG2_REG             0x0E
+
+#define TCA6424_NR_GPIOS                24
+
+#define TCA64XX_NR_GPIO_MAX             TCA6424_NR_GPIOS
+
+/* 1us (datasheet: reset pulse duration (Tw) is 4ns */
+
+#define TCA64XX_TW                      1
+
+/* 1us (datasheet: time to reset (Treset) is 600ns */
+
+#define TCA64XX_TRESET                  1
+
+#define TCA64XX_IRQ_TYPE_EDGE_BOTH      0x00000000
+#define TCA64XX_IRQ_TYPE_EDGE_RISING    0x00000001
+#define TCA64XX_IRQ_TYPE_EDGE_FALLING   0x00000002
+#define TCA64XX_IRQ_TYPE_LEVEL_HIGH     0x00000001
+#define TCA64XX_IRQ_TYPE_LEVEL_LOW      0x00000002
+
+#define TCA64XX_IRQ_TYPE_EDGE           0x00000000
+#define TCA64XX_IRQ_TYPE_LEVEL          0x00000001
+
+#define TCA64XX_POLLDELAY       (CONFIG_TCA64XX_INT_POLLDELAY / USEC_PER_TICK)
+
+#define TCA64_LEVEL_SENSITIVE(d,p) \
+  (((d)->trigger  & ((ioe_pinset_t)1 << (p))) == 0)
+#define TCA64_LEVEL_HIGH(d,p) \
+  (((d)->level[0] & ((ioe_pinset_t)1 << (p))) != 0)
+#define TCA64_LEVEL_LOW(d,p) \
+  (((d)->level[1] & ((ioe_pinset_t)1 << (p))) != 0)
+
+#define TCA64_EDGE_SENSITIVE(d,p) \
+  (((d)->trigger  & ((ioe_pinset_t)1 << (p))) != 0)
+#define TCA64_EDGE_RISING(d,p) \
+  (((d)->level[0] & ((ioe_pinset_t)1 << (p))) != 0)
+#define TCA64_EDGE_FALLING(d,p) \
+  (((d)->level[1] & ((ioe_pinset_t)1 << (p))) != 0)
+#define TCA64_EDGE_BOTH(d,p) \
+  (TCA64_LEVEL_RISING(d,p) && TCA64_LEVEL_FALLING(d,p))
+
+/********************************************************************************************
+ * Public Types
+ ********************************************************************************************/
+
+/* This structure represents the configuration of one part */
+
+struct tca64_part_s
+{
+  uint8_t tp_id;       /* Part ID (see enum tca64xx_part_e) */
+  uint8_t tp_ngpios;   /* Number of supported GPIOs */
+  uint8_t tp_input;    /* Address of first input register */
+  uint8_t tp_output;   /* Address of first output register */
+  uint8_t tp_polarity; /* Address of first polarity register */
+  uint8_t tp_config;   /* Address of first configuration register */
+};
+
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+/* This type represents on registered pin interrupt callback */
+
+struct tca64_callback_s
+{
+   ioe_pinset_t pinset;              /* Set of pin interrupts that will generate
+                                      * the callback. */
+   ioe_callback_t cbfunc;            /* The saved callback function pointer */
+   FAR void *cbarg;                  /* Callback argument */
+};
+#endif
+
+/* This structure represents the state of the TCA64XX driver */
+
+struct tca64_dev_s
+{
+  struct ioexpander_dev_s dev;       /* Nested structure to allow casting as public gpio
+                                      * expander. */
+  FAR struct tca64_config_s *config; /* Board configuration data */
+  FAR struct i2c_master_s *i2c;      /* Saved I2C driver instance */
+  uint8_t part;                      /* TCA64xx part ID (see enum tca64xx_part_e) */
+  sem_t exclsem;                     /* Mutual exclusion */
+
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+#ifdef CONFIG_TCA64XX_INT_POLL
+  WDOG_ID wdog;                      /* Timer used to poll for missed interrupts */
+#endif
+
+  ioe_pinset_t input;                /* Last input registeres */
+  ioe_pinset_t intstat;              /* Pending interrupts */
+  ioe_pinset_t trigger;              /* Bit encoded: 0=level 1=edge */
+  ioe_pinset_t level[2];             /* Bit encoded: 01=high/rising, 10 low/falling, 11 both */
+  struct work_s work;                /* Supports the interrupt handling "bottom half" */
+
+  /* Saved callback information for each I/O expander client */
+
+  struct tca64_callback_s cb[CONFIG_TCA64XX_INT_NCALLBACKS];
+#endif
+};
+
+#endif /* CONFIG_IOEXPANDER && CONFIG_IOEXPANDER_TCA64XX */
+#endif /* __DRIVERS_IOEXPANDER_TCA64XX_H */
diff --git a/drivers/lcd/Kconfig b/drivers/lcd/Kconfig
index 441e6fba2611af7c5295c2affec081f4103972b3..b3abcaeabd85ab4a9721ebab29ac1e49c907ef1b 100644
--- a/drivers/lcd/Kconfig
+++ b/drivers/lcd/Kconfig
@@ -19,7 +19,7 @@ menuconfig LCD
 
 if LCD
 
-comment "Common Graphipc LCD Settings"
+comment "Common Graphic LCD Settings"
 
 config LCD_CONSOLE
 	bool "LCD console output"
@@ -285,8 +285,21 @@ config UG9664HSWAG01_POWER
 
 endif
 
+config LCD_SH1106_OLED_132
+	bool "Generic 0.96'' OLED Display Module (SH1106/SSD1306)"
+	default n
+	select LCD_SSD1306
+	---help---
+		0.96'' OLED Display Module, featuring an SH1106, typically advertised as
+		SSD1306. Mostly similar to "UG2864HSWEG01" although it uses the full
+		132x28 pixels.
+
+		Required LCD driver settings:
+		LCD_MAXCONTRAST should be 255, but any value >0 and <=255 will be accepted.
+		LCD_MAXPOWER should be 1:  0=off, 1=on
+
 config LCD_UG2864HSWEG01
-	bool "UG-2864HSWEG01 OLED Display Module"
+	bool "UG-2864HSWEG01 OLED Display Module (SSD1306)"
 	default n
 	select LCD_SSD1306
 	---help---
@@ -301,7 +314,7 @@ config LCD_UG2864HSWEG01
 		SPI_CMDDATA - Include support for cmd/data selection.
 
 config LCD_UG2832HSWEG04
-	bool "UG-2832HSWEG04 OLED Display Module"
+	bool "UG-2832HSWEG04 OLED Display Module (SSD1306)"
 	default n
 	depends on !LCD_UG2864HSWEG01
 	select LCD_SSD1306
@@ -323,22 +336,22 @@ config LCD_SSD1306
 if LCD_SSD1306
 
 choice
-	prompt "UG-2832HSWEG04 Interface"
+	prompt "SSD1306 Interface"
 	default LCD_SSD1306_SPI
 
 config LCD_SSD1306_SPI
-	bool "UG-2832HSWEG04 on SPI Interface"
+	bool "SSD1306 on SPI Interface"
 	select SPI
 	---help---
 		Enables support for the SPI interface.
 
 config LCD_SSD1306_I2C
-	bool "UG-2832HSWEG04 on I2C Interface"
+	bool "SSD1306 on I2C Interface"
 	select I2C
 	---help---
 		Enables support for the I2C interface
 
-endchoice # UG-2832HSWEG04 Interface
+endchoice # SSD1306 Interface
 endif # LCD_SSD1306
 
 if LCD_SSD1306_SPI
@@ -369,13 +382,13 @@ endif # LCD_SSD1306_SPI
 if LCD_SSD1306_I2C
 
 config SSD1306_I2CADDR
-	int "UG-2832HSWEG04 I2C Address"
+	int "SSD1306 I2C Address"
 	default 120
 	---help---
 		I2C Address of SSD1306
 
 config SSD1306_I2CFREQ
-	int "UG-2832HSWEG04 I2C Frequency"
+	int "SSD1306 I2C Frequency"
 	default 400000
 	---help---
 		I2C Frequency to communicate with SSD1306
diff --git a/drivers/lcd/README.txt b/drivers/lcd/README.txt
index 85d4f52d71b10b0a858aba947fe29441b34a4e0d..266a583654dbb58b8b8bdb177cb9ee83b812e41f 100644
--- a/drivers/lcd/README.txt
+++ b/drivers/lcd/README.txt
@@ -162,10 +162,6 @@ that support additional LCDs.  LCD drivers in the configuration directory
 if they support some differ LCD interface (such as a parallel interface)
 that makes then less re-usable:
 
-  SSD1783 Drivers:
-
-    configs/compal_e99/src/ssd1783.c
-
   SSD1289 Drivers:
 
     configs/hymini-stm32v/src/ssd1289.c.  See also drivers/lcd/ssd1298.c
diff --git a/drivers/lcd/ili9341.c b/drivers/lcd/ili9341.c
index 1c19187ab547cf7ce8f3d0c97cad640810edc679..c281ab86c34d561781117fba8f1a0c3c1c790f7a 100644
--- a/drivers/lcd/ili9341.c
+++ b/drivers/lcd/ili9341.c
@@ -365,18 +365,6 @@
 #  endif
 #endif
 
-/* Add next LCD display */
-
-/* Debug option */
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg       dbg
-#  define lcdvdbg      vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Type Definition
  ****************************************************************************/
@@ -765,37 +753,39 @@ static int ili9341_getrun(int devno, fb_coord_t row, fb_coord_t col,
 
 static int ili9341_hwinitialize(FAR struct ili9341_dev_s *dev)
 {
-#ifdef CONFIG_DEBUG_LCD
+#ifdef CONFIG_DEBUG_LCD_INFO
   uint8_t param;
 #endif
   FAR struct ili9341_lcd_s *lcd = dev->lcd;
 
   /* Select spi device */
 
-  lcddbg("Initialize lcd driver\n");
+  lcdinfo("Initialize lcd driver\n");
   lcd->select(lcd);
 
-#ifdef CONFIG_DEBUG_LCD
+#ifdef CONFIG_DEBUG_LCD_INFO
   /* Read display identification */
 
   lcd->sendcmd(lcd, ILI9341_READ_ID1);
   lcd->recvparam(lcd, ¶m);
-  lcddbg("ili9341 LCD driver: LCD modules manufacturer ID: %d\n", param);
+  lcdinfo("ili9341 LCD driver: LCD modules manufacturer ID: %d\n", param);
+
   lcd->sendcmd(lcd, ILI9341_READ_ID2);
   lcd->recvparam(lcd, ¶m);
-  lcddbg("ili9341 LCD driver: LCD modules driver version ID: %d\n", param);
+  lcdinfo("ili9341 LCD driver: LCD modules driver version ID: %d\n", param);
+
   lcd->sendcmd(lcd, ILI9341_READ_ID3);
   lcd->recvparam(lcd, ¶m);
-  lcddbg("ili9341 LCD driver: LCD modules driver ID: %d\n", param);
+  lcdinfo("ili9341 LCD driver: LCD modules driver ID: %d\n", param);
 #endif
 
   /* Reset the lcd display to the default state */
 
-  lcdvdbg("ili9341 LCD driver: Software Reset\n");
+  lcdinfo("ili9341 LCD driver: Software Reset\n");
   lcd->sendcmd(lcd, ILI9341_SOFTWARE_RESET);
   up_mdelay(5);
 
-  lcdvdbg("ili9341 LCD driver: set Memory Access Control: %04x\n", dev->orient);
+  lcdinfo("ili9341 LCD driver: set Memory Access Control: %04x\n", dev->orient);
   lcd->sendcmd(lcd, ILI9341_MEMORY_ACCESS_CONTROL);
   lcd->sendparam(lcd, dev->orient);
 
@@ -809,13 +799,13 @@ static int ili9341_hwinitialize(FAR struct ili9341_dev_s *dev)
 
   /* 16 bit RGB565 */
 
-  lcdvdbg("ili9341 LCD driver: Set Pixel Format: %04x\n",
+  lcdinfo("ili9341 LCD driver: Set Pixel Format: %04x\n",
       ILI9341_PIXSET_16BITMCU_PARAM1);
   lcd->sendparam(lcd, ILI9341_PIXSET_16BITMCU_PARAM1);
 
   /* 18 bit RGB666, add settings here */
 
-  lcdvdbg("ili9341 LCD driver: Set Interface control\n");
+  lcdinfo("ili9341 LCD driver: Set Interface control\n");
   lcd->sendcmd(lcd, ILI9341_INTERFACE_CONTROL);
   lcd->sendparam(lcd, ILI9341_IFCTL_PARAM1);
   lcd->sendparam(lcd, ILI9341_IFCTL_PARAM2);
@@ -823,7 +813,7 @@ static int ili9341_hwinitialize(FAR struct ili9341_dev_s *dev)
 
   /* Sleep out */
 
-  lcdvdbg("ili9341 LCD driver: Sleep Out\n");
+  lcdinfo("ili9341 LCD driver: Sleep Out\n");
   lcd->sendcmd(lcd, ILI9341_SLEEP_OUT);
   up_mdelay(120);
 
@@ -948,7 +938,7 @@ static int ili9341_getvideoinfo(FAR struct lcd_dev_s *dev,
       vinfo->yres = ili9341_getyres(priv);
       vinfo->nplanes = 1;
 
-      lcdvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+      lcdinfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
       vinfo->fmt, vinfo->xres, vinfo->yres, vinfo->nplanes);
 
       return OK;
@@ -989,7 +979,7 @@ static int ili9341_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
       pinfo->bpp    = priv->bpp;
       pinfo->buffer = (FAR uint8_t *)priv->runbuffer;  /* Run scratch buffer */
 
-      lcdvdbg("planeno: %d bpp: %d\n", planeno, pinfo->bpp);
+      lcdinfo("planeno: %d bpp: %d\n", planeno, pinfo->bpp);
 
       return OK;
     }
@@ -1020,7 +1010,7 @@ static int ili9341_getpower(FAR struct lcd_dev_s *dev)
 
   if (priv)
     {
-      lcddbg("%d\n", priv->power);
+      lcdinfo("%d\n", priv->power);
 
       return priv->power;
     }
@@ -1053,7 +1043,7 @@ static int ili9341_setpower(FAR struct lcd_dev_s *dev, int power)
 
   if (dev)
     {
-      lcddbg("%d\n", power);
+      lcdinfo("%d\n", power);
 
       lcd->select(lcd);
 
@@ -1103,7 +1093,7 @@ static int ili9341_setpower(FAR struct lcd_dev_s *dev, int power)
 
 static int ili9341_getcontrast(struct lcd_dev_s *dev)
 {
-  lcdvdbg("Not implemented\n");
+  lcdinfo("Not implemented\n");
   return -ENOSYS;
 }
 
@@ -1125,7 +1115,7 @@ static int ili9341_getcontrast(struct lcd_dev_s *dev)
 
 static int ili9341_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
 {
-  lcdvdbg("contrast: %d\n", contrast);
+  lcdinfo("contrast: %d\n", contrast);
   return -ENOSYS;
 }
 
diff --git a/drivers/lcd/memlcd.c b/drivers/lcd/memlcd.c
index e960e27612a097b7314f43c5108d0a5817be2897..a7b192acae616398724d60e97437378c4a9067fb 100644
--- a/drivers/lcd/memlcd.c
+++ b/drivers/lcd/memlcd.c
@@ -59,7 +59,17 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* Configuration */
+/* Bit order H/W feature must be enabled in order to support LSB first
+ * operation.
+ */
+
+#if !defined(CONFIG_SPI_HWFEATURES) || !defined(CONFIG_SPI_BITORDER)
+#  error CONFIG_SPI_HWFEATURES=y and CONFIG_SPI_BITORDER=y required by this driver
+#endif
+
+#ifndef CONFIG_ARCH_HAVE_SPI_BITORDER
+#  warning This platform does not support SPI LSB-bit order
+#endif
 
 /* Cisplay resolution */
 
@@ -103,22 +113,12 @@
 /* Other misc settings */
 
 #define MEMLCD_SPI_FREQUENCY 2250000
-#define MEMLCD_SPI_BITS      (-8)
+#define MEMLCD_SPI_BITS      8
 #define MEMLCD_SPI_MODE      SPIDEV_MODE0
 
 #define LS_BIT               (1 << 0)
 #define MS_BIT               (1 << 7)
 
-/* Debug */
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg(format, ...)  dbg(format, ##__VA_ARGS__)
-#  define lcdvdbg(format, ...) vdbg(format, ##__VA_ARGS__)
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Type Definition
  ****************************************************************************/
@@ -278,6 +278,8 @@ static inline int __test_bit(int nr, const volatile uint8_t * addr)
 
 static void memlcd_select(FAR struct spi_dev_s *spi)
 {
+  int ret;
+
   /* Select memlcd (locking the SPI bus in case there are multiple
    * devices competing for the SPI bus
    */
@@ -291,12 +293,18 @@ static void memlcd_select(FAR struct spi_dev_s *spi)
 
   SPI_SETMODE(spi, MEMLCD_SPI_MODE);
   SPI_SETBITS(spi, MEMLCD_SPI_BITS);
-  (void)SPI_HWFEATURES(spi, 0);
-#  ifdef CONFIG_MEMLCD_SPI_FREQUENCY
+
+  ret = SPI_HWFEATURES(spi, HWFEAT_LSBFIRST);
+  if (ret < 0)
+    {
+      lcderr("ERROR: SPI_HWFEATURES failed to set bit order: %d\n", ret);
+    }
+
+#ifdef CONFIG_MEMLCD_SPI_FREQUENCY
   (void)SPI_SETFREQUENCY(spi, CONFIG_MEMLCD_SPI_FREQUENCY);
-#  else
+#else
   (void)SPI_SETFREQUENCY(spi, MEMLCD_SPI_FREQUENCY);
-#  endif
+#endif
 }
 
 /****************************************************************************
@@ -339,7 +347,8 @@ static void memlcd_deselect(FAR struct spi_dev_s *spi)
 static inline void memlcd_clear(FAR struct memlcd_dev_s *mlcd)
 {
   uint16_t cmd = MEMLCD_CMD_ALL_CLEAR;
-  lcddbg("Clear display\n");
+
+  lcdinfo("Clear display\n");
   memlcd_select(mlcd->spi);
   /* XXX Ensure 2us here */
   SPI_SNDBLOCK(mlcd->spi, &cmd, 2);
@@ -367,7 +376,7 @@ static inline void memlcd_clear(FAR struct memlcd_dev_s *mlcd)
  *
  ****************************************************************************/
 
-static int memlcd_extcominisr(int irq, FAR void *context)
+static int memlcd_extcominisr(int irq, FAR void *context, void *arg)
 {
   static bool pol = 0;
   struct memlcd_dev_s *mlcd = &g_memlcddev;
@@ -408,7 +417,7 @@ static int memlcd_putrun(fb_coord_t row, fb_coord_t col,
   int i;
 
   DEBUGASSERT(buffer);
-  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
 
 #ifdef CONFIG_NX_PACKEDMSFIRST
   usrmask = MS_BIT;
@@ -499,7 +508,7 @@ static int memlcd_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t * buffer,
   int i;
 
   DEBUGASSERT(buffer);
-  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
 
 #ifdef CONFIG_NX_PACKEDMSFIRST
   usrmask = MS_BIT;
@@ -553,11 +562,12 @@ static int memlcd_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t * buffer,
  *   Get information about the LCD video controller configuration.
  *
  ****************************************************************************/
+
 static int memlcd_getvideoinfo(FAR struct lcd_dev_s *dev,
                                FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  lcdvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+  lcdinfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
           g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres,
           g_videoinfo.nplanes);
   memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
@@ -576,7 +586,7 @@ static int memlcd_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
                                FAR struct lcd_planeinfo_s *pinfo)
 {
   DEBUGASSERT(pinfo && planeno == 0);
-  lcdvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+  lcdinfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
   memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
   return OK;
 }
@@ -593,8 +603,9 @@ static int memlcd_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
 static int memlcd_getpower(FAR struct lcd_dev_s *dev)
 {
   FAR struct memlcd_dev_s *mlcd = (FAR struct memlcd_dev_s *)dev;
+
   DEBUGASSERT(mlcd);
-  lcddbg("%d\n", mlcd->power);
+  lcdinfo("%d\n", mlcd->power);
   return mlcd->power;
 }
 
@@ -610,8 +621,9 @@ static int memlcd_getpower(FAR struct lcd_dev_s *dev)
 static int memlcd_setpower(FAR struct lcd_dev_s *dev, int power)
 {
   struct memlcd_dev_s *mlcd = (struct memlcd_dev_s *)dev;
+
   DEBUGASSERT(mlcd && (unsigned)power <= CONFIG_LCD_MAXPOWER && mlcd->spi);
-  lcddbg("%d\n", power);
+  lcdinfo("%d\n", power);
   mlcd->power = power;
 
   if (power > 0)
@@ -638,8 +650,9 @@ static int memlcd_setpower(FAR struct lcd_dev_s *dev, int power)
 static int memlcd_getcontrast(struct lcd_dev_s *dev)
 {
   struct memlcd_dev_s *mlcd = (struct memlcd_dev_s *)dev;
+
   DEBUGASSERT(mlcd);
-  lcddbg("contrast: %d\n", mlcd->contrast);
+  lcdinfo("contrast: %d\n", mlcd->contrast);
   return mlcd->contrast;
 }
 
@@ -654,8 +667,9 @@ static int memlcd_getcontrast(struct lcd_dev_s *dev)
 static int memlcd_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
 {
   struct memlcd_dev_s *mlcd = (struct memlcd_dev_s *)dev;
+
   DEBUGASSERT(mlcd);
-  lcddbg("contrast: %d\n", contrast);
+  lcdinfo("contrast: %d\n", contrast);
   if (contrast > MEMLCD_MAXCONTRAST)
     {
       contrast = MEMLCD_MAXCONTRAST;
@@ -695,6 +709,7 @@ static int memlcd_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
  *   the specified LCD.  NULL is returned on any failure.
  *
  ****************************************************************************/
+
 FAR struct lcd_dev_s *memlcd_initialize(FAR struct spi_dev_s *spi,
                                         FAR struct memlcd_priv_s *priv,
                                         unsigned int devno)
@@ -708,8 +723,8 @@ FAR struct lcd_dev_s *memlcd_initialize(FAR struct spi_dev_s *spi,
   mlcd->priv = priv;
   mlcd->spi = spi;
 
-  mlcd->priv->attachirq(memlcd_extcominisr);
+  mlcd->priv->attachirq(memlcd_extcominisr, mlcd);
 
-  lcddbg("done\n");
+  lcdinfo("done\n");
   return &mlcd->dev;
 }
diff --git a/drivers/lcd/mio283qt2.c b/drivers/lcd/mio283qt2.c
index 2d078e1ff09ff1c5dc1ec3dc90ecddd2c4978782..047716614caa9bbf12768908a86319a73cfde5a2 100644
--- a/drivers/lcd/mio283qt2.c
+++ b/drivers/lcd/mio283qt2.c
@@ -102,20 +102,6 @@
 #  define CONFIG_LCD_LANDSCAPE 1
 #endif
 
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
 /* Display/Color Properties ***********************************************************/
 /* Display Resolution */
 
@@ -237,16 +223,6 @@
 
 #endif
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg              dbg
-#  define lcdvdbg             vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /**************************************************************************************
  * Private Type Definition
  **************************************************************************************/
@@ -534,7 +510,7 @@ static int mio283qt2_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *b
 
   /* Buffer must be provided and aligned to a 16-bit address boundary */
 
-  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
 
   /* Select the LCD */
@@ -584,7 +560,7 @@ static int mio283qt2_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
 
   /* Buffer must be provided and aligned to a 16-bit address boundary */
 
-  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
 
   /* Select the LCD */
@@ -632,7 +608,7 @@ static int mio283qt2_getvideoinfo(FAR struct lcd_dev_s *dev,
                                   FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  lcdvdbg("fmt: %d xres: %d yres: %d nplanes: 1\n",
+  lcdinfo("fmt: %d xres: %d yres: %d nplanes: 1\n",
           MIO283QT2_COLORFMT, MIO283QT2_XRES, MIO283QT2_XRES);
 
   vinfo->fmt     = MIO283QT2_COLORFMT;  /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */
@@ -656,7 +632,7 @@ static int mio283qt2_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planen
   FAR struct mio283qt2_dev_s *priv = (FAR struct mio283qt2_dev_s *)dev;
 
   DEBUGASSERT(dev && pinfo && planeno == 0);
-  lcdvdbg("planeno: %d bpp: %d\n", planeno, MIO283QT2_BPP);
+  lcdinfo("planeno: %d bpp: %d\n", planeno, MIO283QT2_BPP);
 
   pinfo->putrun = mio283qt2_putrun;               /* Put a run into LCD memory */
   pinfo->getrun = mio283qt2_getrun;               /* Get a run from LCD memory */
@@ -676,7 +652,7 @@ static int mio283qt2_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planen
 
 static int mio283qt2_getpower(FAR struct lcd_dev_s *dev)
 {
-  lcdvdbg("power: %d\n", 0);
+  lcdinfo("power: %d\n", 0);
   return g_lcddev.power;
 }
 
@@ -727,7 +703,7 @@ static int mio283qt2_setpower(FAR struct lcd_dev_s *dev, int power)
   FAR struct mio283qt2_dev_s *priv = (FAR struct mio283qt2_dev_s *)dev;
   FAR struct mio283qt2_lcd_s *lcd  = priv->lcd;
 
-  lcdvdbg("power: %d\n", power);
+  lcdinfo("power: %d\n", power);
   DEBUGASSERT((unsigned)power <= CONFIG_LCD_MAXPOWER);
 
   /* Set new power level */
@@ -778,7 +754,7 @@ static int mio283qt2_setpower(FAR struct lcd_dev_s *dev, int power)
 
 static int mio283qt2_getcontrast(FAR struct lcd_dev_s *dev)
 {
-  lcdvdbg("Not implemented\n");
+  lcdinfo("Not implemented\n");
   return -ENOSYS;
 }
 
@@ -792,7 +768,7 @@ static int mio283qt2_getcontrast(FAR struct lcd_dev_s *dev)
 
 static int mio283qt2_setcontrast(FAR struct lcd_dev_s *dev, unsigned int contrast)
 {
-  lcdvdbg("contrast: %d\n", contrast);
+  lcdinfo("contrast: %d\n", contrast);
   return -ENOSYS;
 }
 
@@ -820,7 +796,7 @@ static inline int mio283qt2_hwinitialize(FAR struct mio283qt2_dev_s *priv)
 
 #ifndef CONFIG_LCD_NOGETRUN
   id = mio283qt2_readreg(lcd, 0x00);
-  lcddbg("LCD ID: %04x\n", id);
+  lcdinfo("LCD ID: %04x\n", id);
 
   /* Check if the ID is for the MIO283QT2 */
 
@@ -926,7 +902,7 @@ static inline int mio283qt2_hwinitialize(FAR struct mio283qt2_dev_s *priv)
 #ifndef CONFIG_LCD_NOGETRUN
   else
     {
-      lcddbg("Unsupported LCD type\n");
+      lcderr("ERROR: Unsupported LCD type\n");
       ret = -ENODEV;
     }
 #endif
@@ -955,7 +931,7 @@ FAR struct lcd_dev_s *mio283qt2_lcdinitialize(FAR struct mio283qt2_lcd_s *lcd)
 {
   int ret;
 
-  lcdvdbg("Initializing\n");
+  lcdinfo("Initializing\n");
 
   /* If we ccould support multiple MIO283QT2 devices, this is where we would allocate
    * a new driver data structure... but we can't.  Why not?  Because of a bad should
diff --git a/drivers/lcd/mio283qt9a.c b/drivers/lcd/mio283qt9a.c
index d98935f84f252685cc038e7cdee9147e2e0a75c8..7228b23c4d92bb31d683890521020a24845eae4b 100644
--- a/drivers/lcd/mio283qt9a.c
+++ b/drivers/lcd/mio283qt9a.c
@@ -96,20 +96,6 @@
 #  define CONFIG_LCD_LANDSCAPE 1
 #endif
 
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
 /* Display/Color Properties ***********************************************************/
 /* Display Resolution */
 
@@ -136,16 +122,6 @@
 #define ILI9341_ID_1 0x93
 #define ILI9341_ID_2 0x41
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg              dbg
-#  define lcdvdbg             vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /**************************************************************************************
  * Private Type Definition
  **************************************************************************************/
@@ -498,7 +474,7 @@ static int mio283qt9a_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer
 
   /* Buffer must be provided and aligned to a 16-bit address boundary */
 
-  lcdvdbg("mio283qt9a_getrun row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("mio283qt9a_getrun row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
 
   /* Read the run from GRAM. */
@@ -543,7 +519,7 @@ static int mio283qt9a_getvideoinfo(FAR struct lcd_dev_s *dev,
                                    FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  lcdvdbg("fmt: %d xres: %d yres: %d nplanes: 1\n",
+  lcdinfo("fmt: %d xres: %d yres: %d nplanes: 1\n",
           MIO283QT9A_COLORFMT, MIO283QT9A_XRES, MIO283QT9A_YRES);
 
   vinfo->fmt     = MIO283QT9A_COLORFMT;  /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */
@@ -567,7 +543,7 @@ static int mio283qt9a_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int plane
   FAR struct mio283qt9a_dev_s *priv = (FAR struct mio283qt9a_dev_s *)dev;
 
   DEBUGASSERT(dev && pinfo && planeno == 0);
-  lcdvdbg("planeno: %d bpp: %d\n", planeno, MIO283QT9A_BPP);
+  lcdinfo("planeno: %d bpp: %d\n", planeno, MIO283QT9A_BPP);
 
   pinfo->putrun = mio283qt9a_putrun;               /* Put a run into LCD memory */
   pinfo->getrun = mio283qt9a_getrun;               /* Get a run from LCD memory */
@@ -588,7 +564,7 @@ static int mio283qt9a_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int plane
 
 static int mio283qt9a_getpower(FAR struct lcd_dev_s *dev)
 {
-  lcdvdbg("getpower: %d\n", 0);
+  lcdinfo("getpower: %d\n", 0);
   return g_lcddev.power;
 }
 
@@ -604,7 +580,7 @@ static int mio283qt9a_getpower(FAR struct lcd_dev_s *dev)
 static int mio283qt9a_poweroff(FAR struct mio283qt9a_lcd_s *lcd)
 {
   /* Select the LCD */
-  lcdvdbg("mio283qt9a_poweroff\n");
+  lcdinfo("mio283qt9a_poweroff\n");
 
   lcd->select(lcd);
 
@@ -640,7 +616,7 @@ static int mio283qt9a_setpower(FAR struct lcd_dev_s *dev, int power)
   FAR struct mio283qt9a_dev_s *priv = (FAR struct mio283qt9a_dev_s *)dev;
   FAR struct mio283qt9a_lcd_s *lcd  = priv->lcd;
 
-  lcdvdbg("setpower: %d\n", power);
+  lcdinfo("setpower: %d\n", power);
   DEBUGASSERT((unsigned)power <= CONFIG_LCD_MAXPOWER);
 
   /* Set new power level */
@@ -687,7 +663,7 @@ static int mio283qt9a_setpower(FAR struct lcd_dev_s *dev, int power)
 
 static int mio283qt9a_getcontrast(FAR struct lcd_dev_s *dev)
 {
-  lcdvdbg("Not implemented\n");
+  lcdinfo("Not implemented\n");
   return -ENOSYS;
 }
 
@@ -701,7 +677,7 @@ static int mio283qt9a_getcontrast(FAR struct lcd_dev_s *dev)
 
 static int mio283qt9a_setcontrast(FAR struct lcd_dev_s *dev, unsigned int contrast)
 {
-  lcdvdbg("contrast: %d\n", contrast);
+  lcdinfo("contrast: %d\n", contrast);
   return -ENOSYS;
 }
 
@@ -739,7 +715,7 @@ static inline int mio283qt9a_hwinitialize(FAR struct mio283qt9a_dev_s *priv)
   id_c = lcd->read(lcd);
   id_d = lcd->read(lcd);
 
-  lcdvdbg("LCD ID: %04x %04x %04x %04x\n", id_a, id_b, id_c, id_d);
+  lcdinfo("LCD ID: %04x %04x %04x %04x\n", id_a, id_b, id_c, id_d);
   UNUSED(id_a);
   UNUSED(id_b);
 
@@ -781,45 +757,45 @@ static inline int mio283qt9a_hwinitialize(FAR struct mio283qt9a_dev_s *priv)
       id_b = lcd->read(lcd);
       id_c = lcd->read(lcd);
       id_d = lcd->read(lcd);
-      lcdvdbg("LCD man ID: %02x, version: %02x, driver ID: %02x\n", id_b, id_c, id_d);
+      lcdinfo("LCD man ID: %02x, version: %02x, driver ID: %02x\n", id_b, id_c, id_d);
 
       id_a = mio283qt9a_readreg(lcd, 0x09); /* Read display status */
       id_b = lcd->read(lcd);
       id_c = lcd->read(lcd);
       id_d = lcd->read(lcd);
       id_e = lcd->read(lcd);
-      lcdvdbg("Display status %02x, %02x, %02x, %02x, %02x\n", id_a, id_b, id_c, id_d, id_e);
+      lcdinfo("Display status %02x, %02x, %02x, %02x, %02x\n", id_a, id_b, id_c, id_d, id_e);
 
       id_a = mio283qt9a_readreg(lcd, 0x0a); /* Read power status */
       id_b = lcd->read(lcd);
-      lcdvdbg("Power status %02x, %02x\n", id_a, id_b);
+      lcdinfo("Power status %02x, %02x\n", id_a, id_b);
 
       id_a = mio283qt9a_readreg(lcd, 0x0b); /* Read MADCTL */
       id_b = lcd->read(lcd);
-      lcdvdbg("MADCTL %02x, %02x\n", id_a, id_b);
+      lcdinfo("MADCTL %02x, %02x\n", id_a, id_b);
 
       id_a = mio283qt9a_readreg(lcd, 0x0c); /* Read pixel format */
       id_b = lcd->read(lcd);
-      lcdvdbg("Pixel format %02x, %02x\n", id_a, id_b);
+      lcdinfo("Pixel format %02x, %02x\n", id_a, id_b);
 
       id_a = mio283qt9a_readreg(lcd, 0x0d); /* Read image format */
       id_b = lcd->read(lcd);
-      lcdvdbg("Image format %02x, %02x\n", id_a, id_b);
+      lcdinfo("Image format %02x, %02x\n", id_a, id_b);
 
       id_a = mio283qt9a_readreg(lcd, 0x0e);  /* read signal mode */
       id_b = lcd->read(lcd);
-      lcdvdbg("Signal mode %02x, %02x\n", id_a, id_b);
+      lcdinfo("Signal mode %02x, %02x\n", id_a, id_b);
 
       id_a = mio283qt9a_readreg(lcd, 0x0f);  /* read self diag */
       id_b = lcd->read(lcd);
-      lcdvdbg("Self diag %02x, %02x\n", id_a, id_b);
+      lcdinfo("Self diag %02x, %02x\n", id_a, id_b);
 #endif
       ret = OK;
     }
 #ifndef CONFIG_LCD_NOGETRUN
   else
     {
-      lcddbg("Unsupported LCD type\n");
+      lcderr("ERROR: Unsupported LCD type\n");
       ret = -ENODEV;
     }
 #endif
@@ -849,7 +825,7 @@ FAR struct lcd_dev_s *mio283qt9a_lcdinitialize(FAR struct mio283qt9a_lcd_s *lcd)
   FAR struct mio283qt9a_dev_s *priv;
   int ret;
 
-  lcdvdbg("Initializing\n");
+  lcdinfo("Initializing\n");
 
   /* If we could support multiple MIO283QT9A devices, this is where we would allocate
    * a new driver data structure... but we can't.  Why not?  Because of a bad should
diff --git a/drivers/lcd/nokia6100.c b/drivers/lcd/nokia6100.c
index 5a7e6ab976f0dcf53a1da18068078b350cb60d77..3b4a05383dab8ad8df64dbbbb758aa70863bc59c 100644
--- a/drivers/lcd/nokia6100.c
+++ b/drivers/lcd/nokia6100.c
@@ -238,12 +238,12 @@
  * (Verbose debug must also be enabled)
  */
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_FEATURES
+#  undef CONFIG_DEBUG_INFO
 #  undef CONFIG_DEBUG_GRAPHICS
 #endif
 
-#ifndef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_INFO
 #  undef CONFIG_LCD_REGDEBUG
 #endif
 
@@ -305,14 +305,6 @@
 #define NOKIA_ENDPAGE        131
 #define NOKIA_ENDCOL         131
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_LCD_REGDEBUG
-# define lcddbg(format, ...) llvdbg(format, ##__VA_ARGS__)
-#else
-# define lcddbg(x...)
-#endif
-
 /**************************************************************************************
  * Private Type Definition
  **************************************************************************************/
@@ -666,7 +658,8 @@ static void nokia_select(FAR struct spi_dev_s *spi)
    * devices competing for the SPI bus
    */
 
-  lcddbg("SELECTED\n");
+  lcdinfo("SELECTED\n");
+
   SPI_LOCK(spi, true);
   SPI_SELECT(spi, SPIDEV_DISPLAY, true);
 
@@ -700,7 +693,8 @@ static void nokia_deselect(FAR struct spi_dev_s *spi)
 {
   /* De-select Nokia 6100 chip and relinquish the SPI bus. */
 
-  lcddbg("DE-SELECTED\n");
+  lcdinfo("DE-SELECTED\n");
+
   SPI_SELECT(spi, SPIDEV_DISPLAY, false);
   SPI_LOCK(spi, false);
 }
@@ -717,7 +711,8 @@ static void nokia_sndcmd(FAR struct spi_dev_s *spi, const uint8_t cmd)
 {
   /* Select the LCD */
 
-  lcddbg("cmd: %02x\n", cmd);
+  lcdinfo("cmd: %02x\n", cmd);
+
   nokia_select(spi);
 
   /* Send the command. Bit 8 == 0 denotes a command */
@@ -743,7 +738,7 @@ static void nokia_cmddata(FAR struct spi_dev_s *spi, uint8_t cmd, int datlen,
   uint16_t *rowbuf = g_rowbuf;
   int i;
 
-  lcddbg("cmd: %02x datlen: %d\n", cmd, datlen);
+  lcdinfo("cmd: %02x datlen: %d\n", cmd, datlen);
   DEBUGASSERT(datlen <= NOKIA_STRIDE);
 
   /* Copy the command into the line buffer. Bit 8 == 0 denotes a command. */
@@ -800,7 +795,7 @@ static void nokia_cmdarray(FAR struct spi_dev_s *spi, int len, const uint8_t *cm
 
   for (i = 0; i < len; i++)
     {
-      lcddbg("cmddata[%d]: %02x\n", i, cmddata[i]);
+      lcdinfo("cmddata[%d]: %02x\n", i, cmddata[i]);
     }
 #endif
   nokia_cmddata(spi, cmddata[0], len-1, &cmddata[1]);
@@ -866,7 +861,7 @@ static int nokia_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffe
   FAR struct spi_dev_s *spi = priv->spi;
   uint16_t cmd[3];
 
-  gvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  ginfo("row: %d col: %d npixels: %d\n", row, col, npixels);
 
 #if NOKIA_XBIAS > 0
   col += NOKIA_XBIAS;
@@ -917,7 +912,7 @@ static int nokia_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffe
 static int nokia_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
                         size_t npixels)
 {
-  gvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  ginfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
 
   /* At present, this is a write-only LCD driver */
@@ -938,7 +933,7 @@ static int nokia_getvideoinfo(FAR struct lcd_dev_s *dev,
                               FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  gvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+  ginfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
          g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
   memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
   return OK;
@@ -956,7 +951,7 @@ static int nokia_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
                               FAR struct lcd_planeinfo_s *pinfo)
 {
   DEBUGASSERT(dev && pinfo && planeno == 0);
-  gvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+  ginfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
   memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
   return OK;
 }
@@ -973,7 +968,7 @@ static int nokia_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
 static int nokia_getpower(struct lcd_dev_s *dev)
 {
   struct nokia_dev_s *priv = (struct nokia_dev_s *)dev;
-  gvdbg("power: %d\n", priv->power);
+  ginfo("power: %d\n", priv->power);
   return priv->power;
 }
 
@@ -991,7 +986,7 @@ static int nokia_setpower(struct lcd_dev_s *dev, int power)
   struct nokia_dev_s *priv = (struct nokia_dev_s *)dev;
   int ret;
 
-  gvdbg("power: %d\n", power);
+  ginfo("power: %d\n", power);
   DEBUGASSERT(power <= CONFIG_LCD_MAXPOWER);
 
   /* Set new power level.  The backlight power is controlled outside of the LCD
@@ -1017,7 +1012,7 @@ static int nokia_setpower(struct lcd_dev_s *dev, int power)
 static int nokia_getcontrast(struct lcd_dev_s *dev)
 {
   struct nokia_dev_s *priv = (struct nokia_dev_s *)dev;
-  gvdbg("contrast: %d\n", priv->contrast);
+  ginfo("contrast: %d\n", priv->contrast);
   return priv->contrast;
 }
 
@@ -1056,7 +1051,7 @@ static int nokia_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
 #endif
     }
 
-  gvdbg("contrast: %d\n", contrast);
+  ginfo("contrast: %d\n", contrast);
   return -ENOSYS;
 }
 
@@ -1169,7 +1164,7 @@ FAR struct lcd_dev_s *nokia_lcdinitialize(FAR struct spi_dev_s *spi, unsigned in
 {
   struct nokia_dev_s *priv = &g_lcddev;
 
-  gvdbg("Initializing\n");
+  ginfo("Initializing\n");
   DEBUGASSERT(devno == 0);
 
   /* Initialize the driver data structure */
diff --git a/drivers/lcd/p14201.c b/drivers/lcd/p14201.c
index 8d51c77a97695823e8629b96ffc7eb8c05911ede..147e6414ed0e34d6f6d16072819847829f03afb3 100644
--- a/drivers/lcd/p14201.c
+++ b/drivers/lcd/p14201.c
@@ -147,12 +147,12 @@
  * Verbose debug must also be enabled
  */
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_FEATURES
+#  undef CONFIG_DEBUG_INFO
 #  undef CONFIG_DEBUG_GRAPHICS
 #endif
 
-#ifndef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_INFO
 #  undef CONFIG_LCD_RITDEBUG
 #endif
 
@@ -180,9 +180,13 @@
 /* Debug ******************************************************************************/
 
 #ifdef CONFIG_LCD_RITDEBUG
-#  define ritdbg(format, ...)  vdbg(format, ##__VA_ARGS__)
+#  define riterr(format, ...)  _err(format, ##__VA_ARGS__)
+#  define ritwarn(format, ...) _warn(format, ##__VA_ARGS__)
+#  define ritinfo(format, ...) _info(format, ##__VA_ARGS__)
 #else
-#  define ritdbg(x...)
+#  define riterr(x...)
+#  define ritwarn(x...)
+#  define ritinfo(x...)
 #endif
 
 /**************************************************************************************
@@ -508,8 +512,8 @@ static void rit_sndbytes(FAR struct rit_dev_s *priv, FAR const uint8_t *buffer,
   FAR struct spi_dev_s *spi = priv->spi;
   uint8_t tmp;
 
-  ritdbg("buflen: %d cmd: %s [%02x %02x %02x]\n",
-         buflen, cmd ? "YES" : "NO", buffer[0], buffer[1], buffer[2]);
+  ritinfo("buflen: %d cmd: %s [%02x %02x %02x]\n",
+          buflen, cmd ? "YES" : "NO", buffer[0], buffer[1], buffer[2]);
   DEBUGASSERT(spi);
 
   /* Clear/set the D/Cn bit to enable command or data mode */
@@ -552,7 +556,8 @@ static void rit_sndcmds(FAR struct rit_dev_s *priv, FAR const uint8_t *table)
 
   while ((cmdlen = *table++) != 0)
     {
-      ritdbg("command: %02x cmdlen: %d\n", *table, cmdlen);
+      ritinfo("command: %02x cmdlen: %d\n", *table, cmdlen);
+
       rit_sndcmd(priv, table, cmdlen);
       table += cmdlen;
     }
@@ -578,7 +583,7 @@ static inline void rit_clear(FAR struct rit_dev_s *priv)
   FAR uint8_t *ptr = g_framebuffer;
   unsigned int row;
 
-  ritdbg("Clear display\n");
+  ritinfo("Clear display\n");
 
   /* Initialize the framebuffer */
 
@@ -605,7 +610,7 @@ static inline void rit_clear(FAR struct rit_dev_s *priv)
 {
   unsigned int row;
 
-  ritdbg("Clear display\n");
+  ritinfo("Clear display\n");
 
   /* Create a black row */
 
@@ -655,7 +660,7 @@ static int rit_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
   int aend;
   int i;
 
-  ritdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  ritinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer);
 
   /* Toss out the special case of the empty run now */
@@ -678,7 +683,8 @@ static int rit_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
   start = col >> 1;
   aend  = (col + npixels) >> 1;
   end   = (col + npixels + 1) >> 1;
-  ritdbg("start: %d aend: %d end: %d\n", start, aend, end);
+
+  ritinfo("start: %d aend: %d end: %d\n", start, aend, end);
 
   /* Copy the run into the framebuffer, handling nibble alignment.
    *
@@ -814,7 +820,7 @@ static int rit_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
   FAR struct rit_dev_s *priv = (FAR struct rit_dev_s *)&g_oleddev;
   uint8_t cmd[3];
 
-  ritdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  ritinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer);
 
   if (npixels > 0)
@@ -885,7 +891,7 @@ static int rit_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
   int aend;
   int i;
 
-  ritdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  ritinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer);
 
   /* Can't read from OLED GDDRAM in SPI mode, but we can read from the framebuffer */
@@ -990,7 +996,7 @@ static int rit_getvideoinfo(FAR struct lcd_dev_s *dev,
                               FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  gvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+  ginfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
         g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
   memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
   return OK;
@@ -1008,7 +1014,7 @@ static int rit_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
                               FAR struct lcd_planeinfo_s *pinfo)
 {
   DEBUGASSERT(pinfo && planeno == 0);
-  gvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+  ginfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
   memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
   return OK;
 }
@@ -1027,7 +1033,7 @@ static int rit_getpower(FAR struct lcd_dev_s *dev)
   FAR struct rit_dev_s *priv = (FAR struct rit_dev_s *)dev;
   DEBUGASSERT(priv);
 
-  gvdbg("power: %s\n", priv->on ? "ON" : "OFF");
+  ginfo("power: %s\n", priv->on ? "ON" : "OFF");
   return priv->on ? CONFIG_LCD_MAXPOWER : 0;
 }
 
@@ -1045,7 +1051,7 @@ static int rit_setpower(struct lcd_dev_s *dev, int power)
   struct rit_dev_s *priv = (struct rit_dev_s *)dev;
   DEBUGASSERT(priv && (unsigned)power <= CONFIG_LCD_MAXPOWER && priv->spi);
 
-  gvdbg("power: %d\n", power);
+  ginfo("power: %d\n", power);
 
   /* Select the SD1329 controller */
 
@@ -1090,7 +1096,7 @@ static int rit_getcontrast(struct lcd_dev_s *dev)
 {
   struct rit_dev_s *priv = (struct rit_dev_s *)dev;
 
-  gvdbg("contrast: %d\n", priv->contrast);
+  ginfo("contrast: %d\n", priv->contrast);
   return priv->contrast;
 }
 
@@ -1107,7 +1113,7 @@ static int rit_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
   struct rit_dev_s *priv = (struct rit_dev_s *)dev;
   uint8_t cmd[3];
 
-  gvdbg("contrast: %d\n", contrast);
+  ginfo("contrast: %d\n", contrast);
   DEBUGASSERT(contrast <= CONFIG_LCD_MAXCONTRAST);
 
   /* Select the SD1329 controller */
@@ -1156,7 +1162,7 @@ FAR struct lcd_dev_s *rit_initialize(FAR struct spi_dev_s *spi, unsigned int dev
   FAR struct rit_dev_s *priv = (FAR struct rit_dev_s *)&g_oleddev;
   DEBUGASSERT(devno == 0 && spi);
 
-  gvdbg("Initializing devno: %d\n", devno);
+  ginfo("Initializing devno: %d\n", devno);
 
   /* Driver state data */
 
diff --git a/drivers/lcd/pcf8574_lcd_backpack.c b/drivers/lcd/pcf8574_lcd_backpack.c
index a8e288c6cc372dab379bf8420432aab26b4503cc..ad107f1ff4506cdea45cccfa84f35d45f22fc7be 100644
--- a/drivers/lcd/pcf8574_lcd_backpack.c
+++ b/drivers/lcd/pcf8574_lcd_backpack.c
@@ -78,14 +78,6 @@
 #define CMD_SET_CGADDR      0x40
 #define CMD_SET_DDADDR      0x80
 
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg            dbg
-#  define lcdvdbg           vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 #define MAX_OPENCNT     (255)                  /* Limit of uint8_t */
 
 /****************************************************************************
@@ -185,7 +177,7 @@ static void pca8574_write(FAR struct pcf8574_lcd_dev_s *priv, uint8_t data)
   ret = i2c_write(priv->i2c, &config, &data, 1);
   if (ret < 0)
     {
-      lcdvdbg("pca8574_write() failed: %d\n", ret);
+      lcdinfo("pca8574_write() failed: %d\n", ret);
       return;
     }
 
@@ -222,7 +214,7 @@ static int pca8574_read(FAR struct pcf8574_lcd_dev_s *priv, uint8_t* data)
   ret = i2c_read(priv->i2c, &config, data, 1);
   if (ret < 0)
     {
-      lcdvdbg("pca8574_read() failed: %d\n", ret);
+      lcdinfo("pca8574_read() failed: %d\n", ret);
     }
 
   return ret;
@@ -704,7 +696,7 @@ static void lcd_scroll_up(FAR struct pcf8574_lcd_dev_s *priv)
   data = (uint8_t *)malloc(priv->cfg.cols);
   if (NULL == data)
     {
-       lcdvdbg("Failed to allocate buffer in lcd_scroll_up()\n");
+       lcdinfo("Failed to allocate buffer in lcd_scroll_up()\n");
       return;
     }
 
@@ -1428,7 +1420,7 @@ static int pcf8574_lcd_ioctl(FAR struct file *filep, int cmd,
           FAR struct pcf8574_lcd_dev_s *priv = (FAR struct pcf8574_lcd_dev_s *)inode->i_private;
           FAR struct slcd_attributes_s *attr = (FAR struct slcd_attributes_s *)((uintptr_t)arg);
 
-          lcdvdbg("SLCDIOC_GETATTRIBUTES:\n");
+          lcdinfo("SLCDIOC_GETATTRIBUTES:\n");
 
           if (!attr)
             {
@@ -1578,13 +1570,13 @@ int pcf8574_lcd_backpack_register(FAR const char *devpath,
 
   if (cfg->rows < 1 || cfg->rows > 4)
     {
-      lcdvdbg("Display rows must be 1-4\n");
+      lcdinfo("Display rows must be 1-4\n");
       return -EINVAL;
     }
 
   if ((cfg->cols < 1 || cfg->cols > 64) || (cfg->rows == 4 && cfg->cols > 32))
     {
-      lcdvdbg("Display cols must be 1-64, and may not be part of a 4x40 configuration\n");
+      lcdinfo("Display cols must be 1-64, and may not be part of a 4x40 configuration\n");
       return -EINVAL;
     }
 
@@ -1593,7 +1585,7 @@ int pcf8574_lcd_backpack_register(FAR const char *devpath,
   priv = (FAR struct pcf8574_lcd_dev_s *)kmm_malloc(sizeof(struct pcf8574_lcd_dev_s));
   if (!priv)
     {
-      lcdvdbg("Failed to allocate instance\n");
+      lcdinfo("Failed to allocate instance\n");
       return -ENOMEM;
     }
 
@@ -1613,10 +1605,10 @@ int pcf8574_lcd_backpack_register(FAR const char *devpath,
   ret = register_driver(devpath, &g_pcf8574_lcd_fops, 0666, priv);
   if (ret < 0)
     {
-      lcdvdbg("Failed to register driver: %d\n", ret);
+      lcdinfo("Failed to register driver: %d\n", ret);
       kmm_free(priv);
     }
 
-  lcdvdbg("pcf8574_lcd_backpack driver loaded successfully!\n");
+  lcdinfo("pcf8574_lcd_backpack driver loaded successfully!\n");
   return ret;
 }
diff --git a/drivers/lcd/ra8875.c b/drivers/lcd/ra8875.c
index aa8758ab649baa083f5354e03e0b23d1d1185978..b9d7a30d4d258b24112647b12ea55c390c38f1a8 100644
--- a/drivers/lcd/ra8875.c
+++ b/drivers/lcd/ra8875.c
@@ -99,20 +99,6 @@
 #  define CONFIG_LCD_LANDSCAPE 1
 #endif
 
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
 /* Display/Color Properties ***********************************************************/
 /* Display Resolution */
 
@@ -172,16 +158,6 @@
 #  define RA8875_2LAYER_POSSIBLE 1
 #endif
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg  dbg
-#  define lcdvdbg vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /**************************************************************************************
  * Private Type Definition
  **************************************************************************************/
@@ -334,7 +310,7 @@ static void ra8875_putreg(FAR struct ra8875_lcd_s *lcd, uint8_t regaddr,
 {
   /* Set the index register to the register address and write the register contents */
 
-  lcdvdbg("putreg 0x%02x = 0x%02x\n", regaddr, regval);
+  lcdinfo("putreg 0x%02x = 0x%02x\n", regaddr, regval);
 
   lcd->write_reg(lcd, regaddr, regval);
 }
@@ -352,7 +328,7 @@ static void ra8875_putreg16(FAR struct ra8875_lcd_s *lcd, uint8_t regaddr,
 {
   /* Set the index register to the register address and write the register contents */
 
-  lcdvdbg("putreg 0x%02x = 0x%04x\n", regaddr, regval);
+  lcdinfo("putreg 0x%02x = 0x%04x\n", regaddr, regval);
 
   lcd->write_reg16(lcd, regaddr, regval);
 }
@@ -373,7 +349,7 @@ static uint8_t ra8875_readreg(FAR struct ra8875_lcd_s *lcd, uint8_t regaddr)
 
   regval = lcd->read_reg(lcd, regaddr);
 
-  lcdvdbg("readreg 0x%02x = 0x%02x\n", regaddr, regval);
+  lcdinfo("readreg 0x%02x = 0x%02x\n", regaddr, regval);
   return regval;
 }
 #endif
@@ -533,13 +509,13 @@ static inline void ra8875_setforeground(FAR struct ra8875_lcd_s *lcd, uint16_t c
 
 static void ra8875_clearmem(FAR struct ra8875_lcd_s *lcd)
 {
-  lcdvdbg("clearmem start\n");
+  lcdinfo("clearmem start\n");
   ra8875_putreg(lcd, RA8875_MCLR, RA8875_MCLR_CLEAR | RA8875_MCLR_FULL);
 
   /* Wait for operation to finish */
 
   ra8875_waitreg(lcd, RA8875_MCLR, RA8875_MCLR_CLEAR);
-  lcdvdbg("clearmem done\n");
+  lcdinfo("clearmem done\n");
 }
 
 /**************************************************************************************
@@ -574,18 +550,18 @@ static void ra8875_showrun(FAR struct ra8875_dev_s *priv, fb_coord_t row,
 
       if (priv->firstrow != priv->lastrow)
         {
-          lcddbg("...\n");
-          lcddbg("%s row: %d col: %d npixels: %d\n",
-                 priv->put ? "PUT" : "GET",
-                 priv->lastrow, priv->col, priv->npixels);
+          lcdinfo("...\n");
+          lcdinfo("%s row: %d col: %d npixels: %d\n",
+                  priv->put ? "PUT" : "GET",
+                  priv->lastrow, priv->col, priv->npixels);
         }
 
       /* And we are starting a new sequence.  Output the first run of the
        * new sequence
        */
 
-      lcddbg("%s row: %d col: %d npixels: %d\n",
-             put ? "PUT" : "GET", row, col, npixels);
+      lcdinfo("%s row: %d col: %d npixels: %d\n",
+              put ? "PUT" : "GET", row, col, npixels);
 
       /* And save information about the run so that we can detect continuations
        * of the sequence.
@@ -829,7 +805,7 @@ static int ra8875_getvideoinfo(FAR struct lcd_dev_s *dev,
                                FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  lcdvdbg("fmt: %d xres: %d yres: %d nplanes: 1\n",
+  lcdinfo("fmt: %d xres: %d yres: %d nplanes: 1\n",
           RA8875_COLORFMT, RA8875_XRES, RA8875_YRES);
 
   vinfo->fmt     = RA8875_COLORFMT;    /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */
@@ -853,7 +829,7 @@ static int ra8875_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
   FAR struct ra8875_dev_s *priv = (FAR struct ra8875_dev_s *)dev;
 
   DEBUGASSERT(dev && pinfo && planeno == 0);
-  lcdvdbg("planeno: %d bpp: %d\n", planeno, RA8875_BPP);
+  lcdinfo("planeno: %d bpp: %d\n", planeno, RA8875_BPP);
 
   pinfo->putrun = ra8875_putrun;                  /* Put a run into LCD memory */
   pinfo->getrun = ra8875_getrun;                  /* Get a run from LCD memory */
@@ -873,7 +849,7 @@ static int ra8875_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
 
 static int ra8875_getpower(FAR struct lcd_dev_s *dev)
 {
-  lcdvdbg("power: %d\n", 0);
+  lcdinfo("power: %d\n", 0);
   return g_lcddev.power;
 }
 
@@ -917,7 +893,7 @@ static int ra8875_setpower(FAR struct lcd_dev_s *dev, int power)
   FAR struct ra8875_dev_s *priv = (FAR struct ra8875_dev_s *)dev;
   FAR struct ra8875_lcd_s *lcd  = priv->lcd;
 
-  lcdvdbg("power: %d\n", power);
+  lcdinfo("power: %d\n", power);
   DEBUGASSERT((unsigned)power <= CONFIG_LCD_MAXPOWER);
 
   /* Set new power level */
@@ -960,7 +936,7 @@ static int ra8875_setpower(FAR struct lcd_dev_s *dev, int power)
 
 static int ra8875_getcontrast(FAR struct lcd_dev_s *dev)
 {
-  lcdvdbg("Not implemented\n");
+  lcdinfo("Not implemented\n");
   return -ENOSYS;
 }
 
@@ -974,7 +950,7 @@ static int ra8875_getcontrast(FAR struct lcd_dev_s *dev)
 
 static int ra8875_setcontrast(FAR struct lcd_dev_s *dev, unsigned int contrast)
 {
-  lcdvdbg("contrast: %d\n", contrast);
+  lcdinfo("contrast: %d\n", contrast);
   return -ENOSYS;
 }
 
@@ -993,7 +969,7 @@ static inline int ra8875_hwinitialize(FAR struct ra8875_dev_s *priv)
 
   /* REVISIT: Maybe some of these values needs to be configurable?? */
 
-  lcdvdbg("hwinitialize\n");
+  lcdinfo("hwinitialize\n");
 
   /* Reset */
 
@@ -1076,7 +1052,7 @@ static inline int ra8875_hwinitialize(FAR struct ra8875_dev_s *priv)
   priv->shadow_w_curh = 0;
   priv->shadow_w_curv = 0;
 
-  lcdvdbg("hwinitialize done\n");
+  lcdinfo("hwinitialize done\n");
   return OK;
 }
 
@@ -1098,7 +1074,7 @@ FAR struct lcd_dev_s *ra8875_lcdinitialize(FAR struct ra8875_lcd_s *lcd)
 {
   int ret;
 
-  lcdvdbg("Initializing\n");
+  lcdinfo("Initializing\n");
 
   /* If we could support multiple RA8875 devices, this is where we would allocate
    * a new driver data structure... but we can't.  Why not?  Because of a bad should
@@ -1130,7 +1106,7 @@ FAR struct lcd_dev_s *ra8875_lcdinitialize(FAR struct ra8875_lcd_s *lcd)
 
       ra8875_poweroff(lcd);
 
-      lcdvdbg("Initialized\n");
+      lcdinfo("Initialized\n");
 
       return &g_lcddev.dev;
     }
diff --git a/drivers/lcd/skeleton.c b/drivers/lcd/skeleton.c
index 454fdcc41a20f2a1e1bbfe68965f12866e4d7006..96be4b2e2c2f9ac4365a0b8ab7475b2e78e4c052 100644
--- a/drivers/lcd/skeleton.c
+++ b/drivers/lcd/skeleton.c
@@ -66,12 +66,12 @@
 
 /* Verbose debug must also be enabled */
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_FEATURES
+#  undef CONFIG_DEBUG_INFO
 #  undef CONFIG_DEBUG_GRAPHICS
 #endif
 
-#ifndef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_INFO
 #  undef CONFIG_LCD_SKELDEBUG
 #endif
 
@@ -90,9 +90,13 @@
 /* Debug ******************************************************************************/
 
 #ifdef CONFIG_LCD_SKELDEBUG
-# define skeldbg(format, ...)  vdbg(format, ##__VA_ARGS__)
+# define skelerr(format, ...)  _err(format, ##__VA_ARGS__)
+# define skelwarn(format, ...) _warn(format, ##__VA_ARGS__)
+# define skelinfo(format, ...) _info(format, ##__VA_ARGS__)
 #else
-# define skeldbg(x...)
+# define skelerr(x...)
+# define skelwarn(x...)
+# define skelinfo(x...)
 #endif
 
 /**************************************************************************************
@@ -230,7 +234,7 @@ static int skel_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer
 {
   /* Buffer must be provided and aligned to a 16-bit address boundary */
 
-  gvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  ginfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
 
   /* Set up to write the run. */
@@ -259,7 +263,7 @@ static int skel_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
 {
   /* Buffer must be provided and aligned to a 16-bit address boundary */
 
-  gvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  ginfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
 
 #warning "Missing logic"
@@ -278,7 +282,7 @@ static int skel_getvideoinfo(FAR struct lcd_dev_s *dev,
                               FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  gvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+  ginfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
          g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
   memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
   return OK;
@@ -296,7 +300,7 @@ static int skel_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
                               FAR struct lcd_planeinfo_s *pinfo)
 {
   DEBUGASSERT(dev && pinfo && planeno == 0);
-  gvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+  ginfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
   memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
   return OK;
 }
@@ -313,7 +317,7 @@ static int skel_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
 static int skel_getpower(struct lcd_dev_s *dev)
 {
   struct skel_dev_s *priv = (struct skel_dev_s *)dev;
-  gvdbg("power: %d\n", 0);
+  ginfo("power: %d\n", 0);
 #warning "Missing logic"
   return 0;
 }
@@ -331,7 +335,7 @@ static int skel_setpower(struct lcd_dev_s *dev, int power)
 {
   struct skel_dev_s *priv = (struct skel_dev_s *)dev;
 
-  gvdbg("power: %d\n", power);
+  ginfo("power: %d\n", power);
   DEBUGASSERT(power <= CONFIG_LCD_MAXPOWER);
 
   /* Set new power level */
@@ -350,7 +354,7 @@ static int skel_setpower(struct lcd_dev_s *dev, int power)
 
 static int skel_getcontrast(struct lcd_dev_s *dev)
 {
-  gvdbg("Not implemented\n");
+  ginfo("Not implemented\n");
 #warning "Missing logic"
   return -ENOSYS;
 }
@@ -365,7 +369,7 @@ static int skel_getcontrast(struct lcd_dev_s *dev)
 
 static int skel_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
 {
-  gvdbg("contrast: %d\n", contrast);
+  ginfo("contrast: %d\n", contrast);
 #warning "Missing logic"
   return -ENOSYS;
 }
@@ -386,7 +390,7 @@ static int skel_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
 
 FAR struct lcd_dev_s *up_oledinitialize(FAR struct spi_dev_s *spi)
 {
-  gvdbg("Initializing\n");
+  ginfo("Initializing\n");
 
   /* Configure GPIO pins */
 #warning "Missing logic"
diff --git a/drivers/lcd/ssd1289.c b/drivers/lcd/ssd1289.c
index f5cef7996c1aafe0485af965eecb94cc469e440d..78c2362d1452b7cc6f30582cc1734424202e6698 100644
--- a/drivers/lcd/ssd1289.c
+++ b/drivers/lcd/ssd1289.c
@@ -100,20 +100,6 @@
 #  define CONFIG_LCD_LANDSCAPE 1
 #endif
 
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
 /* Display/Color Properties ***********************************************************/
 /* Display Resolution */
 
@@ -226,16 +212,6 @@
 
 #endif
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg  dbg
-#  define lcdvdbg vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /**************************************************************************************
  * Private Type Definition
  **************************************************************************************/
@@ -543,18 +519,18 @@ static void ssd1289_showrun(FAR struct ssd1289_dev_s *priv, fb_coord_t row,
 
       if (priv->firstrow != priv->lastrow)
         {
-          lcddbg("...\n");
-          lcddbg("%s row: %d col: %d npixels: %d\n",
-                 priv->put ? "PUT" : "GET",
-                 priv->lastrow, priv->col, priv->npixels);
+          lcdinfo("...\n");
+          lcdinfo("%s row: %d col: %d npixels: %d\n",
+                  priv->put ? "PUT" : "GET",
+                  priv->lastrow, priv->col, priv->npixels);
         }
 
       /* And we are starting a new sequence.  Output the first run of the
        * new sequence
        */
 
-      lcddbg("%s row: %d col: %d npixels: %d\n",
-             put ? "PUT" : "GET", row, col, npixels);
+      lcdinfo("%s row: %d col: %d npixels: %d\n",
+              put ? "PUT" : "GET", row, col, npixels);
 
       /* And save information about the run so that we can detect continuations
        * of the sequence.
@@ -846,7 +822,7 @@ static int ssd1289_getvideoinfo(FAR struct lcd_dev_s *dev,
                                  FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  lcdvdbg("fmt: %d xres: %d yres: %d nplanes: 1\n",
+  lcdinfo("fmt: %d xres: %d yres: %d nplanes: 1\n",
           SSD1289_COLORFMT, SSD1289_XRES, SSD1289_YRES);
 
   vinfo->fmt     = SSD1289_COLORFMT;    /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */
@@ -870,7 +846,7 @@ static int ssd1289_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
   FAR struct ssd1289_dev_s *priv = (FAR struct ssd1289_dev_s *)dev;
 
   DEBUGASSERT(dev && pinfo && planeno == 0);
-  lcdvdbg("planeno: %d bpp: %d\n", planeno, SSD1289_BPP);
+  lcdinfo("planeno: %d bpp: %d\n", planeno, SSD1289_BPP);
 
   pinfo->putrun = ssd1289_putrun;                 /* Put a run into LCD memory */
   pinfo->getrun = ssd1289_getrun;                 /* Get a run from LCD memory */
@@ -890,7 +866,7 @@ static int ssd1289_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
 
 static int ssd1289_getpower(FAR struct lcd_dev_s *dev)
 {
-  lcdvdbg("power: %d\n", 0);
+  lcdinfo("power: %d\n", 0);
   return g_lcddev.power;
 }
 
@@ -933,7 +909,7 @@ static int ssd1289_setpower(FAR struct lcd_dev_s *dev, int power)
   FAR struct ssd1289_dev_s *priv = (FAR struct ssd1289_dev_s *)dev;
   FAR struct ssd1289_lcd_s *lcd  = priv->lcd;
 
-  lcdvdbg("power: %d\n", power);
+  lcdinfo("power: %d\n", power);
   DEBUGASSERT((unsigned)power <= CONFIG_LCD_MAXPOWER);
 
   /* Set new power level */
@@ -974,7 +950,7 @@ static int ssd1289_setpower(FAR struct lcd_dev_s *dev, int power)
 
 static int ssd1289_getcontrast(FAR struct lcd_dev_s *dev)
 {
-  lcdvdbg("Not implemented\n");
+  lcdinfo("Not implemented\n");
   return -ENOSYS;
 }
 
@@ -988,7 +964,7 @@ static int ssd1289_getcontrast(FAR struct lcd_dev_s *dev)
 
 static int ssd1289_setcontrast(FAR struct lcd_dev_s *dev, unsigned int contrast)
 {
-  lcdvdbg("contrast: %d\n", contrast);
+  lcdinfo("contrast: %d\n", contrast);
   return -ENOSYS;
 }
 
@@ -1020,7 +996,7 @@ static inline int ssd1289_hwinitialize(FAR struct ssd1289_dev_s *priv)
   id = ssd1289_readreg(lcd, SSD1289_DEVCODE);
   if (id != 0)
     {
-      lcddbg("LCD ID: %04x\n", id);
+      lcdinfo("LCD ID: %04x\n", id);
     }
 
   /* If we could not get the ID, then let's just assume that this is an SSD1289.
@@ -1030,7 +1006,7 @@ static inline int ssd1289_hwinitialize(FAR struct ssd1289_dev_s *priv)
 
   else
     {
-      lcddbg("No LCD ID, assuming SSD1289\n");
+      lcdwarn("WARNING: No LCD ID, assuming SSD1289\n");
       id = SSD1289_DEVCODE_VALUE;
     }
 
@@ -1273,7 +1249,7 @@ static inline int ssd1289_hwinitialize(FAR struct ssd1289_dev_s *priv)
 #ifndef CONFIG_LCD_NOGETRUN
   else
     {
-      lcddbg("Unsupported LCD type\n");
+      lcderr("ERROR: Unsupported LCD type\n");
       ret = -ENODEV;
     }
 #endif
@@ -1302,7 +1278,7 @@ FAR struct lcd_dev_s *ssd1289_lcdinitialize(FAR struct ssd1289_lcd_s *lcd)
 {
   int ret;
 
-  lcdvdbg("Initializing\n");
+  lcdinfo("Initializing\n");
 
   /* If we ccould support multiple SSD1289 devices, this is where we would allocate
    * a new driver data structure... but we can't.  Why not?  Because of a bad should
diff --git a/drivers/lcd/ssd1306.h b/drivers/lcd/ssd1306.h
index 6c008e7a9b530dcc69d28d4e85ff6d7222794d58..d1795cd2992e8a791c322f4ce4e5ec4f934111ba 100644
--- a/drivers/lcd/ssd1306.h
+++ b/drivers/lcd/ssd1306.h
@@ -64,7 +64,8 @@
 #  define CONFIG_SSD1306_NINTERFACES 1
 #endif
 
-#if !defined(CONFIG_LCD_UG2864HSWEG01) && !defined(CONFIG_LCD_UG2832HSWEG04)
+#if !defined(CONFIG_LCD_SH1106_OLED_132) && !defined(CONFIG_LCD_UG2864HSWEG01) && \
+    !defined(CONFIG_LCD_UG2832HSWEG04)
 #  error "Unknown and unsupported SSD1306 LCD"
 #endif
 
@@ -77,6 +78,14 @@
 #  undef CONFIG_LCD_RPORTRAIT
 #endif
 
+/**************************************************************************************
+ * Pre-processor Definitions
+ **************************************************************************************/
+
+#ifndef CONFIG_NX_BGCOLOR
+#  define CONFIG_NX_BGCOLOR SSD1306_Y1_BLACK
+#endif
+
 /* SSD1306 Commands *******************************************************************/
 
 #define SSD1306_SETCOLL(ad)      (0x00 | ((ad) & 0x0f)) /* Set Lower Column Address: (00h - 0fh) */
@@ -149,6 +158,12 @@
 #  define SSD1306_DEV_XOFFSET     2    /* Offset to logical column 0 */
 #  define SSD1306_DEV_PAGES       4    /* 4 pages */
 #  define SSD1306_DEV_CMNPAD      0x02 /* COM configuration */
+#elif defined(CONFIG_LCD_SH1106_OLED_132)
+#  define SSD1306_DEV_NATIVE_XRES 128  /* Only 128 columns used, supporting 132 is a bit difficult */
+#  define SSD1306_DEV_NATIVE_YRES 64   /* 8 pages each 8 rows */
+#  define SSD1306_DEV_XOFFSET     0    /* Offset to logical column 0 */
+#  define SSD1306_DEV_PAGES       8    /* 8 pages */
+#  define SSD1306_DEV_CMNPAD      0x12 /* COM configuration */
 #endif
 
 #if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE)
@@ -163,7 +178,12 @@
 
 /* Bytes per logical row and actual device row */
 
-#define SSD1306_DEV_XSTRIDE       (SSD1306_DEV_XRES >> 3)
+#if defined(CONFIG_LCD_SH1106_OLED_132)
+#  define SSD1306_DEV_XSTRIDE     (SSD1306_DEV_XRES >> 3)
+#else
+#  define SSD1306_DEV_XSTRIDE     (SSD1306_DEV_XRES >> 3)
+#endif
+
 #define SSD1306_DEV_YSTRIDE       (SSD1306_DEV_YRES >> 3)
 
 /* Color depth and format */
@@ -202,6 +222,14 @@
 #    undef  SSD1306_DEV_REVERSEX
 #    define SSD1306_DEV_REVERSEY  1
 #  endif
+#elif defined(CONFIG_LCD_SH1106_OLED_132)
+#  if defined(CONFIG_LCD_LANDSCAPE)
+#    undef SSD1306_DEV_REVERSEX
+#    define SSD1306_DEV_REVERSEY  1
+#  elif defined(CONFIG_LCD_RLANDSCAPE)
+#    define SSD1306_DEV_REVERSEX  1
+#    undef  SSD1306_DEV_REVERSEY
+#  endif
 #endif
 
 /* Bit helpers */
@@ -209,16 +237,6 @@
 #define LS_BIT                    (1 << 0)
 #define MS_BIT                    (1 << 7)
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg(format, ...)     dbg(format, ##__VA_ARGS__)
-#  define lcdvdbg(format, ...)    vdbg(format, ##__VA_ARGS__)
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /**************************************************************************************
  * Public Type Definition
  **************************************************************************************/
@@ -258,7 +276,7 @@ void ssd1306_sendblk(FAR struct ssd1306_dev_s *priv, uint8_t *data, uint8_t len)
 #ifdef CONFIG_LCD_SSD1306_SPI
 void ssd1306_select(FAR struct ssd1306_dev_s *priv, bool cs);
 void ssd1306_cmddata(FAR struct ssd1306_dev_s *priv, bool cmd);
-static inline void ssd1306_configspi(FAR struct spi_dev_s *spi)
+void ssd1306_configspi(FAR struct spi_dev_s *spi);
 
 #else
 #  define ssd1306_select(priv, cs)
@@ -267,3 +285,4 @@ static inline void ssd1306_configspi(FAR struct spi_dev_s *spi)
 #endif 
 
 #endif /* __DRIVERS_LCD_SSD1306_H */
+
diff --git a/drivers/lcd/ssd1306_base.c b/drivers/lcd/ssd1306_base.c
index db94d9ea834500a406181f92314809574a8b45ce..d26808e93d69a293a736bacbebc571985116d4ff 100644
--- a/drivers/lcd/ssd1306_base.c
+++ b/drivers/lcd/ssd1306_base.c
@@ -272,7 +272,7 @@ static int ssd1306_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buf
   int pixlen;
   uint8_t i;
 
-  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer);
 
   /* Clip the run to the display */
@@ -480,7 +480,7 @@ static int ssd1306_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
   int pixlen;
   uint8_t i;
 
-  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer);
 
   /* Clip the run to the display */
@@ -625,7 +625,7 @@ static int ssd1306_getvideoinfo(FAR struct lcd_dev_s *dev,
                                 FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  lcdvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+  lcdinfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
           g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
   memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
   return OK;
@@ -643,7 +643,7 @@ static int ssd1306_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
                                 FAR struct lcd_planeinfo_s *pinfo)
 {
   DEBUGASSERT(pinfo && planeno == 0);
-  lcdvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+  lcdinfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
   memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
   return OK;
 }
@@ -662,7 +662,7 @@ static int ssd1306_getpower(FAR struct lcd_dev_s *dev)
   FAR struct ssd1306_dev_s *priv = (FAR struct ssd1306_dev_s *)dev;
   DEBUGASSERT(priv);
 
-  lcdvdbg("power: %s\n", priv->on ? "ON" : "OFF");
+  lcdinfo("power: %s\n", priv->on ? "ON" : "OFF");
   return priv->on ? CONFIG_LCD_MAXPOWER : 0;
 }
 
@@ -680,7 +680,7 @@ static int ssd1306_setpower(FAR struct lcd_dev_s *dev, int power)
   struct ssd1306_dev_s *priv = (struct ssd1306_dev_s *)dev;
   DEBUGASSERT(priv && (unsigned)power <= CONFIG_LCD_MAXPOWER);
 
-  lcdvdbg("power: %d [%d]\n", power, priv->on ? CONFIG_LCD_MAXPOWER : 0);
+  lcdinfo("power: %d [%d]\n", power, priv->on ? CONFIG_LCD_MAXPOWER : 0);
 
   /* Lock and select device */
 
@@ -720,7 +720,7 @@ static int ssd1306_getcontrast(struct lcd_dev_s *dev)
   struct ssd1306_dev_s *priv = (struct ssd1306_dev_s *)dev;
   DEBUGASSERT(priv);
 
-  lcdvdbg("contrast: %d\n", priv->contrast);
+  lcdinfo("contrast: %d\n", priv->contrast);
   return priv->contrast;
 }
 
@@ -737,12 +737,12 @@ static int ssd1306_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
   struct ssd1306_dev_s *priv = (struct ssd1306_dev_s *)dev;
   unsigned int scaled;
 
-  lcdvdbg("contrast: %d\n", contrast);
+  lcdinfo("contrast: %d\n", contrast);
   DEBUGASSERT(priv);
 
   /* Verify the contrast value */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (contrast > CONFIG_LCD_MAXCONTRAST)
     {
       return -EINVAL;
@@ -812,7 +812,7 @@ FAR struct lcd_dev_s *ssd1306_initialize(FAR struct i2c_master_s *dev, unsigned
 {
   FAR struct ssd1306_dev_s  *priv = &g_oleddev;
 
-  lcdvdbg("Initializing\n");
+  lcdinfo("Initializing\n");
   DEBUGASSERT(spi && devno == 0);
 
 #ifdef CONFIG_LCD_SSD1306_SPI
@@ -885,7 +885,7 @@ FAR struct lcd_dev_s *ssd1306_initialize(FAR struct i2c_master_s *dev, unsigned
   /* Clear the display */
 
   up_mdelay(100);
-  ssd1306_fill(&priv->dev, SSD1306_Y1_BLACK);
+  ssd1306_fill(&priv->dev, CONFIG_NX_BGCOLOR);
   return &priv->dev;
 }
 
diff --git a/drivers/lcd/ssd1306_i2c.c b/drivers/lcd/ssd1306_i2c.c
index 1a5edaa6d1f2ef95ae46620116d5da95383c29b7..b6e0b03805c119999094272e2623978bf5322398 100644
--- a/drivers/lcd/ssd1306_i2c.c
+++ b/drivers/lcd/ssd1306_i2c.c
@@ -42,6 +42,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -51,6 +52,10 @@
 
 #if defined(CONFIG_LCD_SSD1306) && defined(CONFIG_LCD_SSD1306_I2C)
 
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
 /****************************************************************************
  * Name: ssd1306_sendbyte
  *
@@ -67,18 +72,19 @@ void ssd1306_sendbyte(FAR struct ssd1306_dev_s *priv, uint8_t regval)
    */
 
   struct i2c_msg_s msg;
-  uint8_t txbuffer[1];
+  uint8_t txbuffer[2];
   int ret;
 
 #ifdef CONFIG_LCD_SSD1306_REGDEBUG
-  lldbg("-> 0x%02x\n", regval);
+  _err("-> 0x%02x\n", regval);
 #endif
 
   /* Setup to the data to be transferred.  Two bytes:  The SSD1306 register
    * address followed by one byte of data.
    */
 
-  txbuffer[0] = regval;
+  txbuffer[0]   = 0x00;
+  txbuffer[1]   = regval;
 
   /* Setup 8-bit SSD1306 address write message */
 
@@ -86,15 +92,15 @@ void ssd1306_sendbyte(FAR struct ssd1306_dev_s *priv, uint8_t regval)
   msg.addr      = priv->addr;              /* 7-bit address */
   msg.flags     = 0;                       /* Write transaction, beginning with START */
   msg.buffer    = txbuffer;                /* Transfer from this address */
-  msg.length    = 1;                       /* Send one byte following the address
-                                            * (then STOP) */
+  msg.length    = 2;                       /* Send two bytes following the address
+                                            * then STOP */
 
   /* Perform the transfer */
 
   ret = I2C_TRANSFER(priv->i2c, &msg, 1);
   if (ret < 0)
     {
-      sndbg("I2C_TRANSFER failed: %d\n", ret);
+      lcderr("ERROR: I2C_TRANSFER failed: %d\n", ret);
     }
 }
 
@@ -108,30 +114,39 @@ void ssd1306_sendbyte(FAR struct ssd1306_dev_s *priv, uint8_t regval)
 
 void ssd1306_sendblk(FAR struct ssd1306_dev_s *priv, uint8_t *data, uint8_t len)
 {
+  struct i2c_msg_s msg[2];
+  uint8_t transfer_mode;
+  int ret;
+
   /* 8-bit data read sequence:
    *
-   *  Start - I2C_Write_Address - SSD1306_Reg_Address - SSD1306_Write_Data - STOP
+   *  Start - I2C_Write_Address - Data transfer select - SSD1306_Write_Data - STOP
    */
 
-  struct i2c_msg_s msg;
-  int ret;
+  /* Send the SSD1306 register address (with no STOP) */
+  
+  transfer_mode    = 0x40;                    /* Select data transfer */
 
-  /* Setup 8-bit SSD1306 address write message */
+  msg[0].frequency = CONFIG_SSD1306_I2CFREQ;  /* I2C frequency */
+  msg[0].addr      = priv->addr;              /* 7-bit address */
+  msg[0].flags     = 0;                       /* Write transaction, beginning with START */
+  msg[0].buffer    = &transfer_mode;          /* Transfer mode send */
+  msg[0].length    = 1;                       /* Send the one byte register address */
 
-  msg.frequency = CONFIG_SSD1306_I2CFREQ;  /* I2C frequency */
-  msg.addr      = priv->addr;              /* 7-bit address */
-  msg.flags     = 0;                       /* Write transaction, beginning with START */
-  msg.buffer    = data;                    /* Transfer from this address */
-  msg.length    = len;                     /* Send one byte following the address
-                                            * (then STOP) */
+  /* Followed by the SSD1306 write data (with no RESTART, then STOP) */
 
-  /* Perform the transfer */
+  msg[1].frequency = CONFIG_SSD1306_I2CFREQ;  /* I2C frequency */
+  msg[1].addr      = priv->addr;              /* 7-bit address */
+  msg[1].flags     = I2C_M_NORESTART;         /* Write transaction with no RESTART */
+  msg[1].buffer    = data;                    /* Transfer from this address */
+  msg[1].length    = len;                     /* Send the data, then STOP */
 
-  ret = I2C_TRANSFER(priv->i2c, &msg, 1);
+  ret = I2C_TRANSFER(priv->i2c, msg, 2);
   if (ret < 0)
     {
-      sndbg("I2C_TRANSFER failed: %d\n", ret);
+      lcderr("ERROR: I2C_TRANSFER failed: %d\n", ret);
     }
 }
 
 #endif /* CONFIG_LCD_SSD1306 &7 CONFIG_LCD_SSD1306_I2C */
+
diff --git a/drivers/lcd/ssd1306_spi.c b/drivers/lcd/ssd1306_spi.c
index b17466c40ea1cdb4a54f1c05b232f22b5fabba4e..9a547b8a163391e946844ccc4faf425be81f1055 100644
--- a/drivers/lcd/ssd1306_spi.c
+++ b/drivers/lcd/ssd1306_spi.c
@@ -45,13 +45,13 @@
 
 #include 
 #include 
-
+#include 
 #include "ssd1306.h"
 
 #if defined(CONFIG_LCD_SSD1306) && defined(CONFIG_LCD_SSD1306_SPI)
 
 /****************************************************************************
- * Private Functions
+ * Public Functions
  ****************************************************************************/
 
 /****************************************************************************
@@ -61,9 +61,9 @@
  *
  ****************************************************************************/
 
-static inline void ssd1306_configspi(FAR struct spi_dev_s *spi)
+void ssd1306_configspi(FAR struct spi_dev_s *spi)
 {
-  lcdvdbg("Mode: %d Bits: 8 Frequency: %d\n",
+  lcdinfo("Mode: %d Bits: 8 Frequency: %d\n",
           CONFIG_SSD1306_SPIMODE, CONFIG_SSD1306_FREQUENCY);
 
   /* Configure SPI for the SSD1306 */
@@ -74,10 +74,6 @@ static inline void ssd1306_configspi(FAR struct spi_dev_s *spi)
   (void)SPI_SETFREQUENCY(spi, CONFIG_SSD1306_FREQUENCY);
 }
 
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Name: ssd1306_sendbyte
  *
@@ -89,7 +85,7 @@ static inline void ssd1306_configspi(FAR struct spi_dev_s *spi)
 void ssd1306_sendbyte(FAR struct ssd1306_dev_s *priv, uint8_t regval)
 {
 #ifdef CONFIG_LCD_SSD1306_REGDEBUG
-  lldbg("->0x%02x\n", regval);
+  _err("->0x%02x\n", regval);
 #endif
 
   /* Send byte value to display */
@@ -109,7 +105,7 @@ void ssd1306_sendblk(FAR struct ssd1306_dev_s *priv, uint8_t *data, uint8_t len)
 {
   /* Send byte value to display */
 
-  (void)SPI_SNDBLOCK(priv, data, len);
+  (void)SPI_SNDBLOCK(priv->spi, data, len);
 }
 
 /****************************************************************************
diff --git a/drivers/lcd/ssd1351.c b/drivers/lcd/ssd1351.c
index c56cc2b682347c0dde91ca7f70ca95da24c4825f..f88c85ff85c782b4be9d54d7350319debf23eb80 100644
--- a/drivers/lcd/ssd1351.c
+++ b/drivers/lcd/ssd1351.c
@@ -499,7 +499,8 @@ static void ssd1351_select(FAR struct ssd1351_dev_s *priv)
    * competing for the SPI bus
    */
 
-  gdbg("SELECTED\n");
+  ginfo("SELECTED\n");
+
   SPI_LOCK(spi, true);
   SPI_SELECT(spi, SPIDEV_DISPLAY, true);
 
@@ -529,7 +530,8 @@ static void ssd1351_deselect(FAR struct ssd1351_dev_s *priv)
 
   /* De-select the chip and relinquish the SPI bus */
 
-  gdbg("DE-SELECTED\n");
+  ginfo("DE-SELECTED\n");
+
   SPI_SELECT(spi, SPIDEV_DISPLAY, false);
   SPI_LOCK(spi, false);
 }
@@ -821,7 +823,7 @@ static int ssd1351_getvideoinfo(FAR struct lcd_dev_s *dev,
   vinfo->yres    = SSD1351_YRES;
   vinfo->nplanes = 1;
 
-  gvdbg("fmt: %u xres: %u yres: %u nplanes: %u\n",
+  ginfo("fmt: %u xres: %u yres: %u nplanes: %u\n",
         vinfo->fmt, vinfo->xres, vinfo->yres, vinfo->nplanes);
   return OK;
 }
@@ -847,7 +849,7 @@ static int ssd1351_getplaneinfo(FAR struct lcd_dev_s *dev,
   pinfo->buffer = (uint8_t *)priv->runbuffer;
   pinfo->bpp    = SSD1351_BPP;
 
-  gvdbg("planeno: %u bpp: %u\n", planeno, pinfo->bpp);
+  ginfo("planeno: %u bpp: %u\n", planeno, pinfo->bpp);
   return OK;
 }
 
@@ -868,7 +870,7 @@ static int ssd1351_getpower(FAR struct lcd_dev_s *dev)
   /* Sanity check */
 
   DEBUGASSERT(priv != NULL);
-  gvdbg("power: %d\n", priv->power);
+  ginfo("power: %d\n", priv->power);
 
   return priv->power;
 }
@@ -890,7 +892,7 @@ static int ssd1351_setpower(FAR struct lcd_dev_s *dev, int power)
   /* Sanity check */
 
   DEBUGASSERT(priv != NULL && (unsigned int)power <= LCD_FULL_ON);
-  gvdbg("power: %d\n", power);
+  ginfo("power: %d\n", power);
 
   /* Select and lock the device */
 
diff --git a/drivers/lcd/st7565.c b/drivers/lcd/st7565.c
index 6b4a1c02883641e3f8f1a2638bea4f50b1439d48..0e52b58a3ec519a27db8ef853ccc1b92486615ff 100644
--- a/drivers/lcd/st7565.c
+++ b/drivers/lcd/st7565.c
@@ -79,7 +79,7 @@
  *   ST7565 devices that will be supported.  NOTE:  At present, this
  *   must be undefined or defined to be 1.
  * CONFIG_LCD_ST7565DEBUG - Enable detailed ST7565 debst7565 output
- *   (CONFIG_DEBUG and CONFIG_VERBOSE must also be enabled).
+ *   (CONFIG_DEBUG_FEATURES and CONFIG_VERBOSE must also be enabled).
  *
  * Required LCD driver settings:
  * CONFIG_LCD_ST7565 - Enable ST7565 support
@@ -105,12 +105,12 @@
 
 /* Verbose debst7565 must also be enabled to use the extra OLED debst7565 */
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_FEATURES
+#  undef CONFIG_DEBUG_INFO
 #  undef CONFIG_DEBUG_GRAPHICS
 #endif
 
-#ifndef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_INFO
 #  undef CONFIG_LCD_ST7565DEBUG
 #endif
 
@@ -176,14 +176,6 @@
 #define LS_BIT          (1 << 0)
 #define MS_BIT          (1 << 7)
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_LCD_ST7565DEBUG
-#  define st7565dbg(format, ...)  vdbg(format, ##__VA_ARGS__)
-#else
-#  define st7565dbg(x...)
-#endif
-
 /**************************************************************************************
  * Private Type Definition
  **************************************************************************************/
@@ -475,7 +467,7 @@ static int st7565_putrun(fb_coord_t row, fb_coord_t col,
   uint8_t i;
   int pixlen;
 
-  gvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  ginfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer);
 
   /* Clip the run to the display */
@@ -627,7 +619,7 @@ static int st7565_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t * buffer,
   uint8_t i;
   int pixlen;
 
-  gvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  ginfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer);
 
   /* Clip the run to the display */
@@ -736,7 +728,7 @@ static int st7565_getvideoinfo(FAR struct lcd_dev_s *dev,
                                FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  gvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+  ginfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
         g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres,
         g_videoinfo.nplanes);
   memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
@@ -755,7 +747,7 @@ static int st7565_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
                                FAR struct lcd_planeinfo_s *pinfo)
 {
   DEBUGASSERT(dev && pinfo && planeno == 0);
-  gvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+  ginfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
   memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
   return OK;
 }
@@ -773,7 +765,7 @@ static int st7565_getpower(struct lcd_dev_s *dev)
 {
   struct st7565_dev_s *priv = (struct st7565_dev_s *)dev;
   DEBUGASSERT(priv);
-  gvdbg("powered: %s\n", priv->power_level);
+  ginfo("powered: %s\n", priv->power_level);
   return priv->power_level;
 }
 
@@ -791,7 +783,7 @@ static int st7565_setpower(struct lcd_dev_s *dev, int power)
   struct st7565_dev_s *priv = (struct st7565_dev_s *)dev;
 
   DEBUGASSERT(priv && (unsigned)power <= CONFIG_LCD_MAXPOWER);
-  gvdbg("power: %s powered: %s\n", power, priv->power_level);
+  ginfo("power: %s powered: %s\n", power, priv->power_level);
 
   /* Select and lock the device */
 
@@ -859,7 +851,7 @@ static int st7565_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
 {
   struct st7565_dev_s *priv = (struct st7565_dev_s *)dev;
 
-  gvdbg("contrast: %d\n", contrast);
+  ginfo("contrast: %d\n", contrast);
   DEBUGASSERT(priv);
 
   if (contrast > 255)
@@ -974,7 +966,7 @@ FAR struct lcd_dev_s *st7565_initialize(FAR struct st7565_lcd_s *lcd,
 
   FAR struct st7565_dev_s *priv = &g_st7565dev;
 
-  gvdbg("Initializing\n");
+  ginfo("Initializing\n");
   DEBUGASSERT(lcd && devno == 0);
 
   /* Save the reference to the SPI device */
@@ -1017,7 +1009,7 @@ FAR struct lcd_dev_s *st7565_initialize(FAR struct st7565_lcd_s *lcd,
 
   /* Follow NHD-C12864KGZ DISPLAY INITIALIZATION...  */
 
-#ifdef CONFIG_NHD_C12864KGZ
+#if defined(CONFIG_NHD_C12864KGZ)
 
   (void)st7565_send_one_data(priv, ST7565_BIAS_1_9);
 
@@ -1027,7 +1019,7 @@ FAR struct lcd_dev_s *st7565_initialize(FAR struct st7565_lcd_s *lcd,
   (void)st7565_send_one_data(priv, ST7565_POWERCTRL_INT);
   (void)st7565_send_one_data(priv, ST7565_SETSTARTLINE);
 
-#elif CONFIG_ERC_12864_3
+#elif defined(CONFIG_ERC_12864_3)
 
   (void)st7565_send_one_data(priv, ST7565_ADCNORMAL);
   (void)st7565_send_one_data(priv, ST7565_SETCOMREVERSE);
diff --git a/drivers/lcd/st7567.c b/drivers/lcd/st7567.c
index 77ba1bbc1ddad5fd1970d8c2ff44593b9e296213..a1f8b136612fe3e3677c6aec1a4207f87aee141a 100644
--- a/drivers/lcd/st7567.c
+++ b/drivers/lcd/st7567.c
@@ -80,7 +80,7 @@
  *   If the hardware supports a controllable OLED a power supply, this
  *   configuration shold be defined.  (See st7567_power() below).
  * CONFIG_LCD_ST7567DEBUG - Enable detailed ST7567 debst7567 output
- *   (CONFIG_DEBUG and CONFIG_VERBOSE must also be enabled).
+ *   (CONFIG_DEBUG_FEATURES and CONFIG_VERBOSE must also be enabled).
  *
  * Required LCD driver settings:
  * CONFIG_LCD_ST7567 - Enable ST7567 support
@@ -123,12 +123,12 @@
 
 /* Verbose debst7567 must also be enabled to use the extra OLED debst7567 */
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_FEATURES
+#  undef CONFIG_DEBUG_INFO
 #  undef CONFIG_DEBUG_GRAPHICS
 #endif
 
-#ifndef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_INFO
 #  undef CONFIG_LCD_ST7567DEBUG
 #endif
 
@@ -206,14 +206,6 @@
 #define LS_BIT          (1 << 0)
 #define MS_BIT          (1 << 7)
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_LCD_ST7567DEBUG
-# define st7567dbg(format, ...)  vdbg(format, ##__VA_ARGS__)
-#else
-# define st7567dbg(x...)
-#endif
-
 /**************************************************************************************
  * Private Type Definition
  **************************************************************************************/
@@ -439,7 +431,7 @@ static int st7567_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buff
   uint8_t i;
   int pixlen;
 
-  gvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  ginfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer);
 
   /* Clip the run to the display */
@@ -587,7 +579,7 @@ static int st7567_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
   uint8_t i;
   int     pixlen;
 
-  gvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  ginfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer);
 
   /* Clip the run to the display */
@@ -698,7 +690,7 @@ static int st7567_getvideoinfo(FAR struct lcd_dev_s *dev,
                               FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  gvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+  ginfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
          g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
   memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
   return OK;
@@ -716,7 +708,7 @@ static int st7567_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
                               FAR struct lcd_planeinfo_s *pinfo)
 {
   DEBUGASSERT(dev && pinfo && planeno == 0);
-  gvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+  ginfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
   memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
   return OK;
 }
@@ -734,7 +726,7 @@ static int st7567_getpower(struct lcd_dev_s *dev)
 {
   struct st7567_dev_s *priv = (struct st7567_dev_s *)dev;
   DEBUGASSERT(priv);
-  gvdbg("powered: %s\n", st7567_powerstring(priv->powered));
+  ginfo("powered: %s\n", st7567_powerstring(priv->powered));
   return priv->powered;
 }
 
@@ -752,7 +744,7 @@ static int st7567_setpower(struct lcd_dev_s *dev, int power)
   struct st7567_dev_s *priv = (struct st7567_dev_s *)dev;
 
   DEBUGASSERT(priv && (unsigned)power <= CONFIG_LCD_MAXPOWER);
-  gvdbg("power: %s powered: %s\n",
+  ginfo("power: %s powered: %s\n",
         st7567_powerstring(power), st7567_powerstring(priv->powered));
 
   /* Select and lock the device */
@@ -806,7 +798,7 @@ static int st7567_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
 {
   struct st7567_dev_s *priv = (struct st7567_dev_s *)dev;
 
-  gvdbg("contrast: %d\n", contrast);
+  ginfo("contrast: %d\n", contrast);
   DEBUGASSERT(priv);
 
   if (contrast > 255)
@@ -915,7 +907,7 @@ FAR struct lcd_dev_s *st7567_initialize(FAR struct spi_dev_s *spi, unsigned int
 
   FAR struct st7567_dev_s  *priv = &g_st7567dev;
 
-  gvdbg("Initializing\n");
+  ginfo("Initializing\n");
   DEBUGASSERT(spi && devno == 0);
 
   /* Save the reference to the SPI device */
diff --git a/drivers/lcd/ug-2864ambag01.c b/drivers/lcd/ug-2864ambag01.c
index ab53fbc0247fb9bb12e0cb5522346728d81a0d30..ea6175a8560793066cbe00eb5b7af30fa5510715 100644
--- a/drivers/lcd/ug-2864ambag01.c
+++ b/drivers/lcd/ug-2864ambag01.c
@@ -260,16 +260,6 @@
 #define LS_BIT                     (1 << 0)
 #define MS_BIT                     (1 << 7)
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg(format, ...)      dbg(format, ##__VA_ARGS__)
-#  define lcdvdbg(format, ...)     vdbg(format, ##__VA_ARGS__)
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /**************************************************************************************
  * Private Type Definition
  **************************************************************************************/
@@ -487,7 +477,7 @@ static int ug2864ambag01_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_
   int pixlen;
   uint8_t i;
 
-  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer);
 
   /* Clip the run to the display */
@@ -697,7 +687,7 @@ static int ug2864ambag01_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buf
   int pixlen;
   uint8_t i;
 
-  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer);
 
   /* Clip the run to the display */
@@ -842,7 +832,7 @@ static int ug2864ambag01_getvideoinfo(FAR struct lcd_dev_s *dev,
                               FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  lcdvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+  lcdinfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
           g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
   memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
   return OK;
@@ -860,7 +850,7 @@ static int ug2864ambag01_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int pl
                               FAR struct lcd_planeinfo_s *pinfo)
 {
   DEBUGASSERT(pinfo && planeno == 0);
-  lcdvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+  lcdinfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
   memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
   return OK;
 }
@@ -879,7 +869,7 @@ static int ug2864ambag01_getpower(FAR struct lcd_dev_s *dev)
   FAR struct ug2864ambag01_dev_s *priv = (FAR struct ug2864ambag01_dev_s *)dev;
   DEBUGASSERT(priv);
 
-  lcdvdbg("power: %s\n", priv->on ? "ON" : "OFF");
+  lcdinfo("power: %s\n", priv->on ? "ON" : "OFF");
   return priv->on ? CONFIG_LCD_MAXPOWER : 0;
 }
 
@@ -897,7 +887,7 @@ static int ug2864ambag01_setpower(struct lcd_dev_s *dev, int power)
   struct ug2864ambag01_dev_s *priv = (struct ug2864ambag01_dev_s *)dev;
   DEBUGASSERT(priv && (unsigned)power <= CONFIG_LCD_MAXPOWER && priv->spi);
 
-  lcdvdbg("power: %d [%d]\n", power, priv->on ? CONFIG_LCD_MAXPOWER : 0);
+  lcdinfo("power: %d [%d]\n", power, priv->on ? CONFIG_LCD_MAXPOWER : 0);
 
   /* Lock and select device */
 
@@ -939,7 +929,7 @@ static int ug2864ambag01_getcontrast(struct lcd_dev_s *dev)
   struct ug2864ambag01_dev_s *priv = (struct ug2864ambag01_dev_s *)dev;
   DEBUGASSERT(priv);
 
-  lcdvdbg("contrast: %d\n", priv->contrast);
+  lcdinfo("contrast: %d\n", priv->contrast);
   return priv->contrast;
 }
 
@@ -956,12 +946,12 @@ static int ug2864ambag01_setcontrast(struct lcd_dev_s *dev, unsigned int contras
   struct ug2864ambag01_dev_s *priv = (struct ug2864ambag01_dev_s *)dev;
   unsigned int scaled;
 
-  lcdvdbg("contrast: %d\n", contrast);
+  lcdinfo("contrast: %d\n", contrast);
   DEBUGASSERT(priv);
 
   /* Verify the contrast value */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (contrast > CONFIG_LCD_MAXCONTRAST)
     {
       return -EINVAL;
@@ -1029,7 +1019,7 @@ FAR struct lcd_dev_s *ug2864ambag01_initialize(FAR struct spi_dev_s *spi, unsign
 {
   FAR struct ug2864ambag01_dev_s  *priv = &g_oleddev;
 
-  lcdvdbg("Initializing\n");
+  lcdinfo("Initializing\n");
   DEBUGASSERT(spi && devno == 0);
 
   /* Save the reference to the SPI device */
diff --git a/drivers/lcd/ug-9664hswag01.c b/drivers/lcd/ug-9664hswag01.c
index e9053a7218e6e7827999811e37f1813d71e0d405..1dadf526208551fd895192f4972fafbd6c85ad78 100644
--- a/drivers/lcd/ug-9664hswag01.c
+++ b/drivers/lcd/ug-9664hswag01.c
@@ -123,16 +123,6 @@
 #  undef CONFIG_LCD_RPORTRAIT
 #endif
 
-/* Verbose debug must also be enabled to use the extra OLED debug */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
 /* Check contrast selection */
 
 #ifndef CONFIG_LCD_MAXCONTRAST
@@ -221,14 +211,6 @@
 #define LS_BIT          (1 << 0)
 #define MS_BIT          (1 << 7)
 
-/* Debug ******************************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-# define lcddbg(format, ...)  vdbg(format, ##__VA_ARGS__)
-#else
-# define lcddbg(x...)
-#endif
-
 /**************************************************************************************
  * Private Type Definition
  **************************************************************************************/
@@ -484,7 +466,7 @@ static int ug_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
   uint8_t i;
   int     pixlen;
 
-  gvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  ginfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer);
 
   /* Clip the run to the display */
@@ -681,7 +663,7 @@ static int ug_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
   uint8_t i;
   int     pixlen;
 
-  gvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  ginfo("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer);
 
   /* Clip the run to the display */
@@ -824,7 +806,7 @@ static int ug_getvideoinfo(FAR struct lcd_dev_s *dev,
                               FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  gvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+  ginfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
          g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
   memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
   return OK;
@@ -842,7 +824,7 @@ static int ug_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
                               FAR struct lcd_planeinfo_s *pinfo)
 {
   DEBUGASSERT(dev && pinfo && planeno == 0);
-  gvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+  ginfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
   memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
   return OK;
 }
@@ -860,7 +842,7 @@ static int ug_getpower(struct lcd_dev_s *dev)
 {
   struct ug_dev_s *priv = (struct ug_dev_s *)dev;
   DEBUGASSERT(priv);
-  gvdbg("powered: %s\n", ug_powerstring(priv->powered));
+  ginfo("powered: %s\n", ug_powerstring(priv->powered));
   return priv->powered;
 }
 
@@ -878,7 +860,7 @@ static int ug_setpower(struct lcd_dev_s *dev, int power)
   struct ug_dev_s *priv = (struct ug_dev_s *)dev;
 
   DEBUGASSERT(priv && (unsigned)power <= CONFIG_LCD_MAXPOWER);
-  gvdbg("power: %s powered: %s\n",
+  ginfo("power: %s powered: %s\n",
         ug_powerstring(power), ug_powerstring(priv->powered));
 
   /* Select and lock the device */
@@ -947,7 +929,7 @@ static int ug_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
 {
   struct ug_dev_s *priv = (struct ug_dev_s *)dev;
 
-  gvdbg("contrast: %d\n", contrast);
+  ginfo("contrast: %d\n", contrast);
   DEBUGASSERT(priv);
 
   if (contrast > 255)
@@ -1056,7 +1038,7 @@ FAR struct lcd_dev_s *ug_initialize(FAR struct spi_dev_s *spi, unsigned int devn
 
   FAR struct ug_dev_s  *priv = &g_ugdev;
 
-  gvdbg("Initializing\n");
+  ginfo("Initializing\n");
   DEBUGASSERT(spi && devno == 0);
 
   /* Save the reference to the SPI device */
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index 5a673606fc7d6d236cd2f8135be362a97f28015f..edcbb975282fd3e8233b3f312dec67e2b9a9d4ca 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -56,4 +56,12 @@ config PCA9635PW
 		Enable support for the NXP PCA9635PW LED driver which can be
 		utilized to drive up to 16 LED's.
 
+config NCP5623C
+	bool "NCP5623C I2C LED Driver"
+	default n
+	select I2C
+	---help---
+		Enable support for the onsemi NCP5623C LED driver which can be
+		utilized to drive up to 3 LED's.
+
 endmenu # LED Support
diff --git a/drivers/leds/Make.defs b/drivers/leds/Make.defs
index 794ba4202c30671953d46377f3f6cb1e90ac1974..3c1a929ab8d4450e6db5ef56ccfebd813d28837f 100644
--- a/drivers/leds/Make.defs
+++ b/drivers/leds/Make.defs
@@ -61,6 +61,11 @@ ifeq ($(CONFIG_PCA9635PW),y)
   LEDDEPATH = --dep-path leds
   LEDVPATH = :leds
 endif
+ifeq ($(CONFIG_NCP5623C),y)
+  CSRCS += ncp5623c.c
+  LEDDEPATH = --dep-path leds
+  LEDVPATH = :leds
+endif
 
 # Include LED build support (if any LED drivers were selected)
 
diff --git a/drivers/leds/ncp5623c.c b/drivers/leds/ncp5623c.c
new file mode 100644
index 0000000000000000000000000000000000000000..7fb96a7bdc9ebb2d2655f4e2eae3382689d097ed
--- /dev/null
+++ b/drivers/leds/ncp5623c.c
@@ -0,0 +1,436 @@
+/****************************************************************************
+ * drivers/leds/ncp5623c.c
+ * based on drivers/leds/pca9635pw.c
+ *
+ *   Author: Konstantin Berzenko 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#if defined(CONFIG_I2C) && defined(CONFIG_NCP5623C)
+
+/****************************************************************************
+ * Private Type Definitions
+ ****************************************************************************/
+
+struct ncp5623c_dev_s
+{
+  FAR struct i2c_master_s *i2c;
+  uint8_t i2c_addr;
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int ncp5623c_i2c_write_byte(FAR struct ncp5623c_dev_s *priv,
+                 uint8_t const reg_addr, uint8_t const reg_val);
+
+static int ncp5623c_open(FAR struct file *filep);
+static int ncp5623c_close(FAR struct file *filep);
+static int ncp5623c_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
+static ssize_t ncp5623c_read(FAR struct file *filep, FAR char *buffer,
+                 size_t buflen);
+static ssize_t ncp5623c_write(FAR struct file *filep, FAR const char *buffer,
+                 size_t buflen);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct file_operations g_ncp5623c_fileops =
+{
+  ncp5623c_open,               /* open */
+  ncp5623c_close,              /* close */
+  ncp5623c_read,               /* read */
+  ncp5623c_write,              /* write */
+  0,                           /* seek */
+  ncp5623c_ioctl,              /* ioctl */
+  0                            /* poll */
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: ncp5623c_i2c_write_byte
+ *
+ * Description:
+ *   Write a single byte to one of the NCP5623C configuration registers.
+ *
+ ****************************************************************************/
+
+static int ncp5623c_i2c_write_byte(FAR struct ncp5623c_dev_s *priv,
+                                   uint8_t const reg_addr,
+                                   uint8_t const reg_val)
+{
+  struct i2c_config_s config;
+  int ret = OK;
+
+  /* Assemble the 1 byte message comprised of reg_val */
+
+  uint8_t const BUFFER_SIZE = 1;
+  uint8_t buffer[BUFFER_SIZE];
+
+  buffer[0] = NCP5623C_SET_REG(reg_addr, reg_val);
+
+  /* Setup up the I2C configuration */
+
+  config.frequency = I2C_BUS_FREQ_HZ;
+  config.address   = priv->i2c_addr;
+  config.addrlen   = 7;
+
+  /* Write the data (no RESTART) */
+
+  lcdinfo("i2c addr: 0x%02X value: 0x%02X\n", priv->i2c_addr,
+          buffer[0]);
+
+  ret = i2c_write(priv->i2c, &config, buffer, BUFFER_SIZE);
+  if (ret != OK)
+    {
+      lcderr("ERROR: i2c_write returned error code %d\n", ret);
+      return ret;
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: ncp5623c_open
+ *
+ * Description:
+ *   This function is called whenever a NCP5623C device is opened.
+ *
+ ****************************************************************************/
+
+static int ncp5623c_open(FAR struct file *filep)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct ncp5623c_dev_s *priv = inode->i_private;
+
+  int ret = -1;
+
+  /* Shutdown the NCP5623C */
+
+  ret = ncp5623c_i2c_write_byte(priv, NCP5623C_SHUTDOWN, 0x00);
+  if (ret != OK)
+    {
+      lcderr("ERROR: Could not shut down the NCP5623C\n");
+      return ret;
+    }
+
+  /* Set up Max current */
+
+  ret = ncp5623c_i2c_write_byte(priv, NCP5623C_ILED, 0x1F);
+  if (ret != OK)
+    {
+      lcderr("ERROR: Could not set up max current\n");
+      return ret;
+    }
+
+  /* Let the chip settle a bit */
+
+  usleep(1);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: ncp5623c_close
+ *
+ * Description:
+ *   This function is called whenever a NCP5623C device is closed.
+ *
+ ****************************************************************************/
+
+static int ncp5623c_close(FAR struct file *filep)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct ncp5623c_dev_s *priv = inode->i_private;
+  int ret = -1;
+
+  /* Shut down NCP5623C */
+
+  ret = ncp5623c_i2c_write_byte(priv, NCP5623C_SHUTDOWN, 0x00);
+  if (ret != OK)
+    {
+      return ret;
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: ncp5623c_ioctl
+ *
+ * Description:
+ *   This function is called whenever an ioctl call to a NCP5623C is performed.
+ *
+ ****************************************************************************/
+
+static int ncp5623c_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct ncp5623c_dev_s *priv = inode->i_private;
+  int ret = OK;
+
+  lcdinfo("cmd: %d arg: %ld\n", cmd, arg);
+
+  switch (cmd)
+    {
+    case LEDIOC_SET_REG:
+      {
+        /* Retrieve the information handed over as argument for this ioctl */
+
+        FAR const struct ncp5623c_set_reg_s *ptr =
+          (FAR const struct ncp5623c_set_reg_s *)((uintptr_t)arg);
+
+        DEBUGASSERT(ptr != NULL);
+        if (ptr->reg > NCP5623C_MAX_REG)
+          {
+            lcderr("ERROR: Unrecognized register: %d\n", ptr->reg);
+            ret = -EFAULT;
+            break;
+          }
+
+        ret = ncp5623c_i2c_write_byte(priv, ptr->reg, ptr->val);
+      }
+      break;
+
+      /* The used ioctl command was invalid */
+
+    default:
+      {
+        lcderr("ERROR: Unrecognized cmd: %d\n", cmd);
+        ret = -ENOTTY;
+      }
+      break;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: ncp5623c_register
+ *
+ * Description:
+ *   Register the NCP5623C device as 'devpath'
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/rgbdrv0".
+ *   i2c     - An instance of the I2C interface to use to communicate
+ *             with the LED driver.
+ *   ncp5623c_i2c_addr
+ *           - The I2C address of the NCP5623C.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int ncp5623c_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
+                      uint8_t const ncp5623c_i2c_addr)
+{
+  /* Sanity check */
+
+  DEBUGASSERT(i2c != NULL);
+
+  /* Initialize the NCP5623C device structure */
+
+  FAR struct ncp5623c_dev_s *priv =
+    (FAR struct ncp5623c_dev_s *)kmm_malloc(sizeof(struct ncp5623c_dev_s));
+
+  if (priv == NULL)
+    {
+      lcderr("ERROR: Failed to allocate instance of ncp5623c_dev_s\n");
+      return -ENOMEM;
+    }
+
+  priv->i2c = i2c;
+  priv->i2c_addr = ncp5623c_i2c_addr;
+
+  /* Register the character driver */
+
+  int const ret = register_driver(devpath, &g_ncp5623c_fileops, 666, priv);
+  if (ret != OK)
+    {
+      lcderr("ERROR: Failed to register driver: %d\n", ret);
+      kmm_free(priv);
+      return ret;
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: ncp5623c_read
+ *
+ * Description:
+ *   A dummy read method.  This is provided only to satisfy the VFS layer.
+ *
+ ****************************************************************************/
+
+static ssize_t ncp5623c_read(FAR struct file *filep, FAR char *buffer,
+                           size_t buflen)
+{
+  /* Return zero -- usually meaning end-of-file */
+
+  return 0;
+}
+
+/****************************************************************************
+ * Name: ncp5623c_write
+ *
+ * Description:
+ *   A dummy write method.  This is provided only to satisfy the VFS layer.
+ *
+ ****************************************************************************/
+
+static ssize_t ncp5623c_write(FAR struct file *filep, FAR const char *buffer,
+                              size_t buflen)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct ncp5623c_dev_s *priv = inode->i_private;
+  int ret = OK;
+
+  unsigned int red;
+  unsigned int green;
+  unsigned int blue;
+  char color[3];
+
+  lcdinfo("%s\n", buffer);
+
+  /* We need to receive a string #RRGGBB = 7 bytes */
+
+  if (buffer == NULL || buflen < 7)
+    {
+      /* Well... nothing to do */
+
+      return -EINVAL;
+    }
+
+  /* Check if it is a color format */
+
+  if (buffer[0] != '#')
+    {
+      /* The color code needs to start with # */
+
+      return -EINVAL;
+    }
+
+  /* Move buffer to next character */
+
+  buffer++;
+
+  color[0] = buffer[0];
+  color[1] = buffer[1];
+  color[2] = '\0';
+
+  red = strtol(color, NULL, 16);
+
+  color[0] = buffer[2];
+  color[1] = buffer[3];
+  color[2] = '\0';
+
+  green = strtol(color, NULL, 16);
+
+  color[0] = buffer[4];
+  color[1] = buffer[5];
+  color[2] = '\0';
+
+  blue = strtol(color, NULL, 16);
+
+  /* Sane check */
+
+  if (red > NCP5623C_MAX_VALUE)
+    {
+      red = NCP5623C_MAX_VALUE;
+    }
+
+  if (green > NCP5623C_MAX_VALUE)
+    {
+      green = NCP5623C_MAX_VALUE;
+    }
+
+  if (blue > NCP5623C_MAX_VALUE)
+    {
+      blue = NCP5623C_MAX_VALUE;
+    }
+
+  /* Setup LED R */
+
+  ret = ncp5623c_i2c_write_byte(priv, NCP5623C_PWM1,
+                                 red);
+  if (ret != OK)
+    {
+      lcderr("ERROR: Could not set red led\n");
+      return ret;
+    }
+
+  /* Setup LED G */
+
+  ret = ncp5623c_i2c_write_byte(priv, NCP5623C_PWM2,
+                                 green);
+  if (ret != OK)
+    {
+      lcderr("ERROR: Could not set green led\n");
+      return ret;
+    }
+
+  /* Setup LED B */
+
+  ret = ncp5623c_i2c_write_byte(priv, NCP5623C_PWM3,
+                                 blue);
+  if (ret != OK)
+    {
+      lcderr("ERROR: Could not set blue led\n");
+      return ret;
+    }
+
+  return buflen;
+}
+
+#endif /* CONFIG_I2C && CONFIG_I2C_NCP5623C */
diff --git a/drivers/leds/pca9635pw.c b/drivers/leds/pca9635pw.c
index 452891555a3a3927759cf40a33f188849ad55174..8d7039829686f65fd25d0d90dcd4522ff1d71149 100644
--- a/drivers/leds/pca9635pw.c
+++ b/drivers/leds/pca9635pw.c
@@ -105,8 +105,6 @@ static int pca9635pw_i2c_write_byte(FAR struct pca9635pw_dev_s *priv,
 {
   struct i2c_config_s config;
 
-  dbg("pca9635pw_i2c_write_byte\n");
-
   /* assemble the 2 byte message comprised of reg_addr and reg_val */
 
   uint8_t const BUFFER_SIZE = 2;
@@ -123,14 +121,13 @@ static int pca9635pw_i2c_write_byte(FAR struct pca9635pw_dev_s *priv,
 
   /* Write the register address followed by the data (no RESTART) */
 
-  dbg("i2c addr: 0x%02X reg addr: 0x%02X value: 0x%02X\n", priv->i2c_addr,
-      buffer[0], buffer[1]);
-
+  lcdinfo("i2c addr: 0x%02X reg addr: 0x%02X value: 0x%02X\n", priv->i2c_addr,
+          buffer[0], buffer[1]);
 
   ret = i2c_write(priv->i2c, &config, buffer, BUFFER_SIZE);
   if (ret != OK)
     {
-      dbg("i2c_write returned error code %d\n", ret);
+      lcderr("ERROR: i2c_write returned error code %d\n", ret);
       return ret;
     }
 
@@ -173,11 +170,8 @@ static int pca9635pw_set_led_mode(FAR struct pca9635pw_dev_s *priv,
 
 static int pca9635pw_open(FAR struct file *filep)
 {
-  dbg("pca9635pw_open\n");
-
   FAR struct inode *inode = filep->f_inode;
   FAR struct pca9635pw_dev_s *priv = inode->i_private;
-
   int ret = -1;
 
   /* Wake up the PCA9635PW (sleep bit PCA9635PW_MODE_1_SLEEP is set to zero
@@ -192,7 +186,7 @@ static int pca9635pw_open(FAR struct file *filep)
                                  PCA9635PW_MODE_1_INITIAL_VALUE);
   if (ret != OK)
     {
-      dbg("Could not set initial config for PCA9635PW_MODE_1\n");
+      lcderr("ERROR: Could not set initial config for PCA9635PW_MODE_1\n");
       return ret;
     }
 
@@ -209,7 +203,7 @@ static int pca9635pw_open(FAR struct file *filep)
                                  PCA9635PW_MODE_2_INITIAL_VALUE);
   if (ret != OK)
     {
-      dbg("Could not set initial config for PCA9635PW_MODE_2\n");
+      lcderr("ERROR: Could not set initial config for PCA9635PW_MODE_2\n");
       return ret;
     }
 
@@ -227,8 +221,8 @@ static int pca9635pw_open(FAR struct file *filep)
   ret = pca9635pw_set_led_mode(priv, PCA9635PW_LED_OUT_x_MODE_2);
   if (ret != OK)
     {
-      dbg("Could not set led driver outputs to MODE2 (LED's brightness are "
-          "controlled by pwm registers)\n");
+      lcderr("ERROR: Could not set led driver outputs to MODE2 (LED's brightness are "
+             "controlled by pwm registers)\n");
       return ret;
     }
 
@@ -245,11 +239,8 @@ static int pca9635pw_open(FAR struct file *filep)
 
 static int pca9635pw_close(FAR struct file *filep)
 {
-  dbg("pca9635pw_close\n");
-
   FAR struct inode *inode = filep->f_inode;
   FAR struct pca9635pw_dev_s *priv = inode->i_private;
-
   int ret = -1;
 
   /* Turn all led drivers off */
@@ -257,7 +248,7 @@ static int pca9635pw_close(FAR struct file *filep)
   ret = pca9635pw_set_led_mode(priv, PCA9635PW_LED_OUT_x_MODE_0);
   if (ret != OK)
     {
-      dbg("Could not set led driver outputs to MODE0 (LED's are off)\n");
+      lcderr("ERROR: Could not set led driver outputs to MODE0 (LED's are off)\n");
       return ret;
     }
 
@@ -285,14 +276,11 @@ static int pca9635pw_close(FAR struct file *filep)
 
 static int pca9635pw_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 {
-  dbg("pca9635pw_ioctl\n");
-
   FAR struct inode *inode = filep->f_inode;
   FAR struct pca9635pw_dev_s *priv = inode->i_private;
-
   int ret = OK;
 
-  dbg("cmd: %d arg: %ld\n", cmd, arg);
+  lcdinfo("cmd: %d arg: %ld\n", cmd, arg);
 
   switch (cmd)
     {
@@ -319,7 +307,7 @@ static int pca9635pw_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
     default:
       {
-        dbg("Unrecognized cmd: %d\n", cmd);
+        lcderr("ERROR: Unrecognized cmd: %d\n", cmd);
         ret = -ENOTTY;
       }
       break;
@@ -364,7 +352,7 @@ int pca9635pw_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
 
   if (priv == NULL)
     {
-      dbg("Failed to allocate instance of pca9635pw_dev_s\n");
+      lcderr("ERROR: Failed to allocate instance of pca9635pw_dev_s\n");
       return -ENOMEM;
     }
 
@@ -376,7 +364,7 @@ int pca9635pw_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
   int const ret = register_driver(devpath, &g_pca9635pw_fileops, 666, priv);
   if (ret != OK)
     {
-      dbg("Failed to register driver: %d\n", ret);
+      lcderr("ERROR: Failed to register driver: %d\n", ret);
       kmm_free(priv);
       return ret;
     }
diff --git a/drivers/leds/rgbled.c b/drivers/leds/rgbled.c
index 27e7a1a9ebeb1b80a43da3d4c642dd8e136d7ad2..81b2ff5591685b42222cada3541b8c5a1f775310 100644
--- a/drivers/leds/rgbled.c
+++ b/drivers/leds/rgbled.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -59,31 +55,13 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 
 #include 
 
 #ifdef CONFIG_RGBLED
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing PWM */
-
-#ifdef CONFIG_DEBUG_RGBLED
-#  define pwmdbg    dbg
-#  define pwmvdbg   vdbg
-#  define pwmlldbg  lldbg
-#  define pwmllvdbg llvdbg
-#else
-#  define pwmdbg(x...)
-#  define pwmvdbg(x...)
-#  define pwmlldbg(x...)
-#  define pwmllvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Type Definitions
  ****************************************************************************/
@@ -150,7 +128,7 @@ static int rgbled_open(FAR struct file *filep)
   uint8_t                     tmp;
   int                         ret;
 
-  pwmvdbg("crefs: %d\n", upper->crefs);
+  lcdinfo("crefs: %d\n", upper->crefs);
 
   /* Get exclusive access to the device structures */
 
@@ -201,7 +179,7 @@ static int rgbled_close(FAR struct file *filep)
   FAR struct rgbled_upperhalf_s *upper = inode->i_private;
   int                         ret;
 
-  pwmvdbg("crefs: %d\n", upper->crefs);
+  lcdinfo("crefs: %d\n", upper->crefs);
 
   /* Get exclusive access to the device structures */
 
@@ -395,7 +373,7 @@ int rgbled_register(FAR const char *path, FAR struct pwm_lowerhalf_s *ledr,
 
   if (!upper)
     {
-      pwmdbg("Allocation failed\n");
+      lcderr("ERROR: Allocation failed\n");
       return -ENOMEM;
     }
 
@@ -410,7 +388,7 @@ int rgbled_register(FAR const char *path, FAR struct pwm_lowerhalf_s *ledr,
 
   /* Register the PWM device */
 
-  pwmvdbg("Registering %s\n", path);
+  lcdinfo("Registering %s\n", path);
   return register_driver(path, &g_rgbledops, 0666, upper);
 }
 
diff --git a/drivers/leds/userled_lower.c b/drivers/leds/userled_lower.c
index 69e349f64d432baaac7b3ee2d7ddde6daeda3d89..32cff16e107ebef6dea6f49c8339e51e3d88833a 100644
--- a/drivers/leds/userled_lower.c
+++ b/drivers/leds/userled_lower.c
@@ -88,7 +88,7 @@ static const struct userled_lowerhalf_s g_userled_lower =
 
 static userled_set_t userled_supported(FAR const struct userled_lowerhalf_s *lower)
 {
-  ivdbg("BOARD_NLEDS: %02x\n", BOARD_NLEDS);
+  iinfo("BOARD_NLEDS: %02x\n", BOARD_NLEDS);
   return (userled_set_t)((1 << BOARD_NLEDS) - 1);
 }
 
diff --git a/drivers/leds/userled_upper.c b/drivers/leds/userled_upper.c
index 68fd8d5f7a6e552e3fd8a2185b4de5e0f1761bae..abf7cc719e33af1911764c9bac13238730fde4df 100644
--- a/drivers/leds/userled_upper.c
+++ b/drivers/leds/userled_upper.c
@@ -57,27 +57,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LEDS
-#endif
-
-#ifdef CONFIG_DEBUG_LEDS
-#  define ddbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define dvdbg lldbg
-#  else
-#    define dvdbg(x...)
-#  endif
-#else
-#  define ddbg(x...)
-#  define dvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -197,7 +176,7 @@ static int userled_open(FAR struct file *filep)
   ret = userled_takesem(&priv->lu_exclsem);
   if (ret < 0)
     {
-      dvdbg("ERROR: userled_takesem failed: %d\n", ret);
+      lcderr("ERROR: userled_takesem failed: %d\n", ret);
       return ret;
     }
 
@@ -206,7 +185,7 @@ static int userled_open(FAR struct file *filep)
   opriv = (FAR struct userled_open_s *)kmm_zalloc(sizeof(struct userled_open_s));
   if (!opriv)
     {
-      dvdbg("ERROR: Failled to allocate open structure\n");
+      lcderr("ERROR: Failled to allocate open structure\n");
       ret = -ENOMEM;
       goto errout_with_sem;
     }
@@ -274,7 +253,7 @@ static int userled_close(FAR struct file *filep)
   ret = userled_takesem(&priv->lu_exclsem);
   if (ret < 0)
     {
-      dvdbg("ERROR: userled_takesem failed: %d\n", ret);
+      lcderr("ERROR: userled_takesem failed: %d\n", ret);
       return ret;
     }
 
@@ -287,7 +266,7 @@ static int userled_close(FAR struct file *filep)
   DEBUGASSERT(curr);
   if (!curr)
     {
-      dvdbg("ERROR: Failed to find open entry\n");
+      lcderr("ERROR: Failed to find open entry\n");
       ret = -ENOENT;
       goto errout_with_exclsem;
     }
@@ -339,7 +318,7 @@ static ssize_t userled_write(FAR struct file *filep, FAR const char *buffer,
 
   if (len < sizeof(userled_set_t))
     {
-      dvdbg("ERROR: buffer too small: %lu\n", (unsigned long)len);
+      lcderr("ERROR: buffer too small: %lu\n", (unsigned long)len);
       return -EINVAL;
     }
 
@@ -356,7 +335,7 @@ static ssize_t userled_write(FAR struct file *filep, FAR const char *buffer,
   ret = userled_takesem(&priv->lu_exclsem);
   if (ret < 0)
     {
-      dvdbg("ERROR: userled_takesem failed: %d\n", ret);
+      lcderr("ERROR: userled_takesem failed: %d\n", ret);
       return ret;
     }
 
@@ -391,7 +370,7 @@ static int userled_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   ret = userled_takesem(&priv->lu_exclsem);
   if (ret < 0)
     {
-      dvdbg("ERROR: userled_takesem failed: %d\n", ret);
+      lcderr("ERROR: userled_takesem failed: %d\n", ret);
       return ret;
     }
 
@@ -521,7 +500,7 @@ static int userled_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
       break;
 
     default:
-      dvdbg("ERROR: Unrecognized command: %ld\n", cmd);
+      lcderr("ERROR: Unrecognized command: %ld\n", cmd);
       ret = -ENOTTY;
       break;
     }
@@ -569,7 +548,7 @@ int userled_register(FAR const char *devname,
 
   if (!priv)
     {
-      dvdbg("ERROR: Failed to allocate device structure\n");
+      lcderr("ERROR: Failed to allocate device structure\n");
       return -ENOMEM;
     }
 
@@ -590,7 +569,7 @@ int userled_register(FAR const char *devname,
   ret = register_driver(devname, &userled_fops, 0666, priv);
   if (ret < 0)
     {
-      dvdbg("ERROR: register_driver failed: %d\n", ret);
+      lcderr("ERROR: register_driver failed: %d\n", ret);
       goto errout_with_priv;
     }
 
diff --git a/drivers/loop/losetup.c b/drivers/loop/losetup.c
index ccc75a7971a9cd573b6edfb3fd4f2957a1e133fe..65d9f9e9cdf89fbbe80a61cd3e79489a3bf5fd26 100644
--- a/drivers/loop/losetup.c
+++ b/drivers/loop/losetup.c
@@ -246,7 +246,7 @@ static ssize_t loop_read(FAR struct inode *inode, FAR unsigned char *buffer,
 
   if (start_sector + nsectors > dev->nsectors)
     {
-      dbg("Read past end of file\n");
+      _err("ERROR: Read past end of file\n");
       return -EIO;
     }
 
@@ -256,7 +256,7 @@ static ssize_t loop_read(FAR struct inode *inode, FAR unsigned char *buffer,
   ret = lseek(dev->fd, offset, SEEK_SET);
   if (ret == (off_t)-1)
     {
-      dbg("Seek failed for offset=%d: %d\n", (int)offset, get_errno());
+      _err("ERROR: Seek failed for offset=%d: %d\n", (int)offset, get_errno());
       return -EIO;
     }
 
@@ -267,7 +267,7 @@ static ssize_t loop_read(FAR struct inode *inode, FAR unsigned char *buffer,
       nbytesread = read(dev->fd, buffer, nsectors * dev->sectsize);
       if (nbytesread < 0 && get_errno() != EINTR)
         {
-          dbg("Read failed: %d\n", get_errno());
+          _err("ERROR: Read failed: %d\n", get_errno());
           return -get_errno();
         }
     }
@@ -304,7 +304,7 @@ static ssize_t loop_write(FAR struct inode *inode,
   ret = lseek(dev->fd, offset, SEEK_SET);
   if (ret == (off_t)-1)
     {
-      dbg("Seek failed for offset=%d: %d\n", (int)offset, get_errno());
+      _err("ERROR: Seek failed for offset=%d: %d\n", (int)offset, get_errno());
     }
 
   /* Then write the requested number of sectors to that position */
@@ -314,7 +314,7 @@ static ssize_t loop_write(FAR struct inode *inode,
       nbyteswritten = write(dev->fd, buffer, nsectors * dev->sectsize);
       if (nbyteswritten < 0 && get_errno() != EINTR)
         {
-          dbg("Write failed: %d\n", get_errno());
+          _err("ERROR: Write failed: %d\n", get_errno());
           return -get_errno();
         }
     }
@@ -379,7 +379,7 @@ int losetup(FAR const char *devname, FAR const char *filename,
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!devname || !filename || !sectsize)
     {
       return -EINVAL;
@@ -391,7 +391,7 @@ int losetup(FAR const char *devname, FAR const char *filename,
   ret = stat(filename, &sb);
   if (ret < 0)
     {
-      dbg("Failed to stat %s: %d\n", filename, get_errno());
+      _err("ERROR: Failed to stat %s: %d\n", filename, get_errno());
       return -get_errno();
     }
 
@@ -399,7 +399,7 @@ int losetup(FAR const char *devname, FAR const char *filename,
 
   if (sb.st_size - offset < sectsize)
     {
-      dbg("File is too small for blocksize\n");
+      _err("ERROR: File is too small for blocksize\n");
       return -ERANGE;
     }
 
@@ -445,7 +445,7 @@ int losetup(FAR const char *devname, FAR const char *filename,
       dev->fd = open(filename, O_RDWR);
       if (dev->fd < 0)
         {
-          dbg("Failed to open %s: %d\n", filename, get_errno());
+          _err("ERROR: Failed to open %s: %d\n", filename, get_errno());
           ret = -get_errno();
           goto errout_with_dev;
         }
@@ -456,7 +456,7 @@ int losetup(FAR const char *devname, FAR const char *filename,
   ret = register_blockdriver(devname, &g_bops, 0, dev);
   if (ret < 0)
     {
-      fdbg("register_blockdriver failed: %d\n", -ret);
+      ferr("ERROR: register_blockdriver failed: %d\n", -ret);
       goto errout_with_fd;
     }
 
@@ -485,7 +485,7 @@ int loteardown(FAR const char *devname)
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!devname)
     {
       return -EINVAL;
@@ -499,7 +499,7 @@ int loteardown(FAR const char *devname)
   ret = open_blockdriver(devname, MS_RDONLY, &inode);
   if (ret < 0)
     {
-      dbg("Failed to open %s: %d\n", devname, -ret);
+      _err("ERROR: Failed to open %s: %d\n", devname, -ret);
       return ret;
     }
 
diff --git a/drivers/mmcsd/Kconfig b/drivers/mmcsd/Kconfig
index cae2887799aa82101ce34355f1e6f17d817608b6..4d4485e0d40db5549f38816f03044ad5a20a1d9a 100755
--- a/drivers/mmcsd/Kconfig
+++ b/drivers/mmcsd/Kconfig
@@ -65,6 +65,10 @@ config ARCH_HAVE_SDIO
 	bool
 	default n
 
+config SDIO_DMA
+	bool
+	default n
+
 config ARCH_HAVE_SDIOWAIT_WRCOMPLETE
 	bool
 	default n
@@ -76,12 +80,6 @@ config MMCSD_SDIO
 
 if MMCSD_SDIO
 
-config SDIO_DMA
-	bool "SDIO DMA support"
-	default n
-	---help---
-		SDIO driver supports DMA
-
 config SDIO_PREFLIGHT
 	bool
 	default n
diff --git a/drivers/mmcsd/mmcsd.h b/drivers/mmcsd/mmcsd.h
index 06d91348d02746063f2d8a65dbfc1e6eab473329..fb52726d4efbfa6f129a6fcea8ce2eacbc09aaec 100644
--- a/drivers/mmcsd/mmcsd.h
+++ b/drivers/mmcsd/mmcsd.h
@@ -52,7 +52,7 @@
 
 #undef CONFIG_MMCSD_DUMPALL /* MUST BE DEFINED MANUALLY */
 
-#if !defined(CONFIG_DEBUG_VERBOSE) || !defined(CONFIG_DEBUG_FS)
+#if !defined(CONFIG_DEBUG_INFO) || !defined(CONFIG_DEBUG_FS)
 #  undef CONFIG_MMCSD_DUMPALL
 #endif
 
@@ -87,12 +87,12 @@ extern "C" {
 #endif
 
 #ifdef CONFIG_MMCSD_DUMPALL
-#  define mmcsd_dumpbuffer(m,b,l) fvdbgdumpbuffer(m,b,l)
+#  define mmcsd_dumpbuffer(m,b,l) finfodumpbuffer(m,b,l)
 #else
 #  define mmcsd_dumpbuffer(m,b,l)
 #endif
 
-#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
+#if defined(CONFIG_DEBUG_INFO) && defined(CONFIG_DEBUG_FS)
 EXTERN void mmcsd_dmpcsd(FAR const uint8_t *csd, uint8_t cardtype);
 #else
 #  define mmcsd_dmpcsd(csd,cadtype)
diff --git a/drivers/mmcsd/mmcsd_debug.c b/drivers/mmcsd/mmcsd_debug.c
index e28b985a02553dccf1a335c5322daade4226d05a..817c0272c1ce08792bc56a002bd128a9a2fb02db 100644
--- a/drivers/mmcsd/mmcsd_debug.c
+++ b/drivers/mmcsd/mmcsd_debug.c
@@ -81,96 +81,96 @@
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
+#if defined(CONFIG_DEBUG_INFO) && defined(CONFIG_DEBUG_FS)
 void mmcsd_dmpcsd(FAR const uint8_t *csd, uint8_t cardtype)
 {
   bool mmc = (cardtype == MMCSD_CARDTYPE_MMC);
   bool sd2 = (MMCSD_CSD_CSDSTRUCT(csd) == 1);
 
-  fvdbg("CSD\n");
-  fvdbg("  CSD_STRUCTURE:           1.%d\n",   MMCSD_CSD_CSDSTRUCT(csd));
+  finfo("CSD\n");
+  finfo("  CSD_STRUCTURE:           1.%d\n",   MMCSD_CSD_CSDSTRUCT(csd));
   if (mmc)
     {
-      fvdbg("  MMC SPEC_VERS:           %d\n", MMC_CSD_SPECVERS(csd));
+      finfo("  MMC SPEC_VERS:           %d\n", MMC_CSD_SPECVERS(csd));
     }
 
-  fvdbg("  TAAC:\n",
+  finfo("  TAAC:\n",
       sd2 ? SD20_CSD_TAC_TIMEVALUE(csd) : MMCSD_CSD_TAAC_TIMEVALUE(csd));
-  fvdbg("    TIME_VALUE:            0x%02x\n",
+  finfo("    TIME_VALUE:            0x%02x\n",
       sd2 ? SD20_CSD_TAC_TIMEVALUE(csd) : MMCSD_CSD_TAAC_TIMEVALUE(csd));
-  fvdbg("    TIME_UNIT:             0x%02x\n",
+  finfo("    TIME_UNIT:             0x%02x\n",
       sd2 ? SD20_CSD_TAC_TIMEUNIT(csd) : MMCSD_CSD_TAAC_TIMEUNIT(csd));
-  fvdbg("  NSAC:                    0x%02x\n",
+  finfo("  NSAC:                    0x%02x\n",
       sd2 ? SD20_CSD_NSAC(csd) : MMCSD_CSD_NSAC(csd));
-  fvdbg("  TRAN_SPEED:\n");
-  fvdbg("    TIME_VALUE:            0x%02x\n",
+  finfo("  TRAN_SPEED:\n");
+  finfo("    TIME_VALUE:            0x%02x\n",
       sd2 ? SD20_CSD_TRANSPEED_TIMEVALUE(csd) : MMCSD_CSD_TRANSPEED_TIMEVALUE(csd));
-  fvdbg("    RATE_UNIT:             0x%02x\n",
+  finfo("    RATE_UNIT:             0x%02x\n",
       sd2 ? SD20_CSD_TRANSPEED_TRANSFERRATEUNIT(csd) : MMCSD_CSD_TRANSPEED_TRANSFERRATEUNIT(csd));
-  fvdbg("  CCC:                     0x%03x\n",
+  finfo("  CCC:                     0x%03x\n",
       sd2 ? SD20_CSD_CCC(csd) : MMCSD_CSD_CCC(csd));
-  fvdbg("  READ_BL_LEN:             %d\n",
+  finfo("  READ_BL_LEN:             %d\n",
       sd2 ? SD20_CSD_READBLLEN(csd) : MMCSD_CSD_READBLLEN(csd));
-  fvdbg("  READ_BL_PARTIAL:         %d\n",
+  finfo("  READ_BL_PARTIAL:         %d\n",
       sd2 ? SD20_CSD_READBLPARTIAL(csd) : MMCSD_CSD_READBLPARTIAL(csd));
-  fvdbg("  WRITE_BLK_MISALIGN:      %d\n",
+  finfo("  WRITE_BLK_MISALIGN:      %d\n",
       sd2 ? SD20_CSD_WRITEBLKMISALIGN(csd) : MMCSD_CSD_WRITEBLKMISALIGN(csd));
-  fvdbg("  READ_BLK_MISALIGN:       %d\n",
+  finfo("  READ_BLK_MISALIGN:       %d\n",
       sd2 ? SD20_CSD_READBLKMISALIGN(csd) : MMCSD_CSD_READBLKMISALIGN(csd));
-  fvdbg("  DSR_IMP:                 %d\n",
+  finfo("  DSR_IMP:                 %d\n",
       sd2 ? SD20_CSD_DSRIMP(csd) : MMCSD_CSD_DSRIMP(csd));
-  fvdbg("  C_SIZE:                  %d\n",
+  finfo("  C_SIZE:                  %d\n",
       sd2 ? SD20_CSD_CSIZE(csd) : MMCSD_CSD_CSIZE(csd));
-  fvdbg("  VDD_R_CURR_MIN:          %d\n",
+  finfo("  VDD_R_CURR_MIN:          %d\n",
       sd2 ? SD20_CSD_VDDRCURRMIN(csd) : MMCSD_CSD_VDDRCURRMIN(csd));
-  fvdbg("  VDD_R_CURR_MAX:          %d\n",
+  finfo("  VDD_R_CURR_MAX:          %d\n",
       sd2 ? SD20_CSD_VDDRCURRMAX(csd) : MMCSD_CSD_VDDRCURRMAX(csd));
-  fvdbg("  VDD_W_CURR_MIN:          %d\n",
+  finfo("  VDD_W_CURR_MIN:          %d\n",
       sd2 ? SD20_CSD_VDDWCURRMIN(csd) : MMCSD_CSD_VDDWCURRMIN(csd));
-  fvdbg("  VDD_W_CURR_MAX:          %d\n",
+  finfo("  VDD_W_CURR_MAX:          %d\n",
       sd2 ? SD20_CSD_VDDWCURRMAX(csd) : MMCSD_CSD_VDDWCURRMAX(csd));
-  fvdbg("  C_SIZE_MULT:             %d\n",
+  finfo("  C_SIZE_MULT:             %d\n",
       sd2 ? SD20_CSD_CSIZEMULT(csd) : MMCSD_CSD_CSIZEMULT(csd));
   if (mmc)
     {
-      fvdbg("  MMC SECTOR_SIZE:        %d\n", MMC_CSD_SECTORSIZE(csd));
-      fvdbg("  MMC ER_GRP_SIZE:        %d\n", MMC_CSD_ERGRPSIZE(csd));
-      fvdbg("  MMC WP_GRP_SIZE:        %d\n",  MMC_CSD_WPGRPSIZE(csd));
-      fvdbg("  MMC DFLT_ECC:           %d\n",  MMC_CSD_DFLTECC(csd));
+      finfo("  MMC SECTOR_SIZE:        %d\n", MMC_CSD_SECTORSIZE(csd));
+      finfo("  MMC ER_GRP_SIZE:        %d\n", MMC_CSD_ERGRPSIZE(csd));
+      finfo("  MMC WP_GRP_SIZE:        %d\n",  MMC_CSD_WPGRPSIZE(csd));
+      finfo("  MMC DFLT_ECC:           %d\n",  MMC_CSD_DFLTECC(csd));
     }
   else
     {
-      fvdbg("  SD ER_BLK_EN:            %d\n",
+      finfo("  SD ER_BLK_EN:            %d\n",
           sd2 ? SD20_CSD_SDERBLKEN(csd) : SD_CSD_SDERBLKEN(csd));
-      fvdbg("  SD SECTOR_SIZE:          %d\n",
+      finfo("  SD SECTOR_SIZE:          %d\n",
           sd2 ? SD20_CSD_SECTORSIZE(csd) : SD_CSD_SECTORSIZE(csd));
-      fvdbg("  SD WP_GRP_SIZE:          %d\n",
+      finfo("  SD WP_GRP_SIZE:          %d\n",
           sd2 ? SD_CSD_WPGRPSIZE(csd) : SD_CSD_WPGRPSIZE(csd));
     }
-  fvdbg("  WP_GRP_EN:               %d\n",
+  finfo("  WP_GRP_EN:               %d\n",
       sd2 ? SD20_WPGRPEN(csd) : MMCSD_WPGRPEN(csd));
-  fvdbg("  R2W_FACTOR:              %d\n",
+  finfo("  R2W_FACTOR:              %d\n",
       sd2 ? SD20_CSD_R2WFACTOR(csd) : MMCSD_CSD_R2WFACTOR(csd));
-  fvdbg("  WRITE_BL_LEN:            %d\n",
+  finfo("  WRITE_BL_LEN:            %d\n",
       sd2 ? SD20_CSD_WRITEBLLEN(csd) : MMCSD_CSD_WRITEBLLEN(csd));
-  fvdbg("  WRITE_BL_PARTIAL:        %d\n",
+  finfo("  WRITE_BL_PARTIAL:        %d\n",
       sd2 ? SD20_CSD_WRITEBLPARTIAL(csd) : MMCSD_CSD_WRITEBLPARTIAL(csd));
-  fvdbg("  FILE_FORMAT_GROUP:       %d\n",
+  finfo("  FILE_FORMAT_GROUP:       %d\n",
       sd2 ? SD20_CSD_FILEFORMATGRP(csd) : MMCSD_CSD_FILEFORMATGRP(csd));
-  fvdbg("  COPY:                    %d\n",
+  finfo("  COPY:                    %d\n",
       sd2 ? SD20_CSD_COPY(csd) : MMCSD_CSD_COPY(csd));
-  fvdbg("  PERM_WRITE_PROTECT:      %d\n",
+  finfo("  PERM_WRITE_PROTECT:      %d\n",
       sd2 ? SD20_CSD_PERMWRITEPROTECT(csd) : MMCSD_CSD_PERMWRITEPROTECT(csd));
-  fvdbg("  TMP_WRITE_PROTECT:       %d\n",
+  finfo("  TMP_WRITE_PROTECT:       %d\n",
       sd2 ?SD20_CSD_TMPWRITEPROTECT(csd) : MMCSD_CSD_TMPWRITEPROTECT(csd));
-  fvdbg("  FILE_FORMAT:             %d\n",
+  finfo("  FILE_FORMAT:             %d\n",
       sd2 ? SD20_CSD_FILEFORMAT(csd) : MMCSD_CSD_FILEFORMAT(csd));
   if (mmc)
     {
-      fvdbg("  MMC ECC:                 %d\n",
+      finfo("  MMC ECC:                 %d\n",
           sd2 ? MMC_CSD_ECC(csd) : MMC_CSD_ECC(csd));
     }
-  fvdbg("  CRC:                     %02x\n",
+  finfo("  CRC:                     %02x\n",
       sd2 ? SD20_CSD_CRC(csd) : MMCSD_CSD_CRC(csd));
 }
 #endif
diff --git a/drivers/mmcsd/mmcsd_sdio.c b/drivers/mmcsd/mmcsd_sdio.c
index e3097d481267160efbdfd6c9bb12ff9a1afca536..1411a6d5f587b576276059c437341be862f8848a 100644
--- a/drivers/mmcsd/mmcsd_sdio.c
+++ b/drivers/mmcsd/mmcsd_sdio.c
@@ -61,7 +61,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 
@@ -128,6 +128,7 @@ struct mmcsd_state_s
   uint8_t mode:2;                  /* (See MMCSDMODE_* definitions) */
   uint8_t type:4;                  /* Card type (See MMCSD_CARDTYPE_* definitions) */
   uint8_t buswidth:4;              /* Bus widthes supported (SD only) */
+  sdio_capset_t caps;              /* SDIO driver capabilities/limitations */
   uint16_t selblocklen;            /* The currently selected block length */
   uint16_t rca;                    /* Relative Card Address (RCS) register */
 
@@ -171,7 +172,7 @@ static int     mmcsd_getSCR(FAR struct mmcsd_state_s *priv, uint32_t scr[2]);
 
 static void    mmcsd_decodeCSD(FAR struct mmcsd_state_s *priv,
                  uint32_t csd[4]);
-#if defined(CONFIG_DEBUG) && defined (CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
+#ifdef CONFIG_DEBUG_FS_INFO
 static void    mmcsd_decodeCID(FAR struct mmcsd_state_s *priv,
                  uint32_t cid[4]);
 #else
@@ -340,7 +341,7 @@ static int mmcsd_sendcmdpoll(FAR struct mmcsd_state_s *priv, uint32_t cmd,
       ret = SDIO_WAITRESPONSE(priv->dev, cmd);
       if (ret != OK)
         {
-          fdbg("ERROR: Wait for response to cmd: %08x failed: %d\n", cmd, ret);
+          ferr("ERROR: Wait for response to cmd: %08x failed: %d\n", cmd, ret);
         }
     }
 
@@ -413,7 +414,7 @@ static int mmcsd_recvR1(FAR struct mmcsd_state_s *priv, uint32_t cmd)
            * indication for later use.
            */
 
-          fvdbg("ERROR: R1=%08x\n", r1);
+          ferr("ERROR: R1=%08x\n", r1);
           priv->locked = ((r1 & MMCSD_R1_CARDISLOCKED) != 0);
           ret = -EIO;
         }
@@ -467,7 +468,7 @@ static int mmcsd_recvR6(FAR struct mmcsd_state_s *priv, uint32_t cmd)
       ret = -EIO;
     }
 
-  fdbg("ERROR: Failed to get RCA. R6=%08x: %d\n", r6, ret);
+  ferr("ERROR: Failed to get RCA. R6=%08x: %d\n", r6, ret);
   return ret;
 }
 
@@ -491,7 +492,7 @@ static int mmcsd_getSCR(FAR struct mmcsd_state_s *priv, uint32_t scr[2])
   ret = mmcsd_setblocklen(priv, 8);
   if (ret != OK)
     {
-      fdbg("ERROR: mmcsd_setblocklen failed: %d\n", ret);
+      ferr("ERROR: mmcsd_setblocklen failed: %d\n", ret);
       return ret;
     }
 
@@ -510,7 +511,7 @@ static int mmcsd_getSCR(FAR struct mmcsd_state_s *priv, uint32_t scr[2])
   ret = mmcsd_recvR1(priv, SD_CMD55);
   if (ret != OK)
     {
-      fdbg("ERROR: RECVR1 for CMD55 failed: %d\n", ret);
+      ferr("ERROR: RECVR1 for CMD55 failed: %d\n", ret);
       return ret;
     }
 
@@ -520,7 +521,7 @@ static int mmcsd_getSCR(FAR struct mmcsd_state_s *priv, uint32_t scr[2])
   ret = mmcsd_recvR1(priv, SD_ACMD51);
   if (ret != OK)
     {
-      fdbg("ERROR: RECVR1 for ACMD51 failed: %d\n", ret);
+      ferr("ERROR: RECVR1 for ACMD51 failed: %d\n", ret);
       SDIO_CANCEL(priv->dev);
       return ret;
     }
@@ -531,7 +532,7 @@ static int mmcsd_getSCR(FAR struct mmcsd_state_s *priv, uint32_t scr[2])
                         MMCSD_SCR_DATADELAY);
   if (ret != OK)
     {
-      fdbg("ERROR: mmcsd_eventwait for READ DATA failed: %d\n", ret);
+      ferr("ERROR: mmcsd_eventwait for READ DATA failed: %d\n", ret);
     }
 
   return ret;
@@ -558,7 +559,7 @@ static int mmcsd_getSCR(FAR struct mmcsd_state_s *priv, uint32_t scr[2])
 
 static void mmcsd_decodeCSD(FAR struct mmcsd_state_s *priv, uint32_t csd[4])
 {
-#if defined(CONFIG_DEBUG) && defined (CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
+#ifdef CONFIG_DEBUG_FS_INFO
   struct mmcsd_csd_s decoded;
 #endif
   unsigned int readbllen;
@@ -578,7 +579,7 @@ static void mmcsd_decodeCSD(FAR struct mmcsd_state_s *priv, uint32_t csd[4])
    *   TRANSFER_RATE_UNIT 2:0 Rate mantissa
    */
 
-#if defined(CONFIG_DEBUG) && defined (CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
+#ifdef CONFIG_DEBUG_FS_INFO
   memset(&decoded, 0, sizeof(struct mmcsd_csd_s));
   decoded.csdstructure               =  csd[0] >> 30;
   decoded.mmcspecvers                = (csd[0] >> 26) & 0x0f;
@@ -606,7 +607,7 @@ static void mmcsd_decodeCSD(FAR struct mmcsd_state_s *priv, uint32_t csd[4])
   priv->dsrimp             = (csd[1] >> 12) & 1;
   readbllen                = (csd[1] >> 16) & 0x0f;
 
-#if defined(CONFIG_DEBUG) && defined (CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
+#ifdef CONFIG_DEBUG_FS_INFO
   decoded.ccc              = (csd[1] >> 20) & 0x0fff;
   decoded.readbllen        = (csd[1] >> 16) & 0x0f;
   decoded.readblpartial    = (csd[1] >> 15) & 1;
@@ -667,7 +668,7 @@ static void mmcsd_decodeCSD(FAR struct mmcsd_state_s *priv, uint32_t csd[4])
       priv->blocksize                = 1 << 9;
       priv->nblocks                  = priv->capacity >> 9;
 
-#if defined(CONFIG_DEBUG) && defined (CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
+#ifdef CONFIG_DEBUG_FS_INFO
       decoded.u.sdblock.csize        = csize;
       decoded.u.sdblock.sderblen     = (csd[2] >> 14) & 1;
       decoded.u.sdblock.sdsectorsize = (csd[2] >> 7) & 0x7f;
@@ -703,7 +704,7 @@ static void mmcsd_decodeCSD(FAR struct mmcsd_state_s *priv, uint32_t csd[4])
           priv->blockshift           = 9;
         }
 
-#if defined(CONFIG_DEBUG) && defined (CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
+#ifdef CONFIG_DEBUG_FS_INFO
       if (IS_SD(priv->type))
         {
           decoded.u.sdbyte.csize            = csize;
@@ -753,7 +754,7 @@ static void mmcsd_decodeCSD(FAR struct mmcsd_state_s *priv, uint32_t csd[4])
   tmpwriteprotect          = (csd[3] >> 12) & 1;
   priv->wrprotect          = (permwriteprotect || tmpwriteprotect);
 
-#if defined(CONFIG_DEBUG) && defined (CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
+#ifdef CONFIG_DEBUG_FS_INFO
   decoded.wpgrpen          =  csd[3] >> 31;
   decoded.mmcdfltecc       = (csd[3] >> 29) & 3;
   decoded.r2wfactor        = (csd[3] >> 26) & 7;
@@ -767,69 +768,69 @@ static void mmcsd_decodeCSD(FAR struct mmcsd_state_s *priv, uint32_t csd[4])
   decoded.mmcecc           = (csd[3] >> 8)  & 3;
   decoded.crc              = (csd[3] >> 1)  & 0x7f;
 
-  fvdbg("CSD:\n");
-  fvdbg("  CSD_STRUCTURE: %d SPEC_VERS: %d (MMC)\n",
+  finfo("CSD:\n");
+  finfo("  CSD_STRUCTURE: %d SPEC_VERS: %d (MMC)\n",
         decoded.csdstructure, decoded.mmcspecvers);
-  fvdbg("  TAAC {TIME_UNIT: %d TIME_VALUE: %d} NSAC: %d\n",
+  finfo("  TAAC {TIME_UNIT: %d TIME_VALUE: %d} NSAC: %d\n",
         decoded.taac.timeunit, decoded.taac.timevalue, decoded.nsac);
-  fvdbg("  TRAN_SPEED {TRANSFER_RATE_UNIT: %d TIME_VALUE: %d}\n",
+  finfo("  TRAN_SPEED {TRANSFER_RATE_UNIT: %d TIME_VALUE: %d}\n",
         decoded.transpeed.transferrateunit, decoded.transpeed.timevalue);
-  fvdbg("  CCC: %d\n", decoded.ccc);
-  fvdbg("  READ_BL_LEN: %d READ_BL_PARTIAL: %d\n",
+  finfo("  CCC: %d\n", decoded.ccc);
+  finfo("  READ_BL_LEN: %d READ_BL_PARTIAL: %d\n",
         decoded.readbllen, decoded.readblpartial);
-  fvdbg("  WRITE_BLK_MISALIGN: %d READ_BLK_MISALIGN: %d\n",
+  finfo("  WRITE_BLK_MISALIGN: %d READ_BLK_MISALIGN: %d\n",
         decoded.writeblkmisalign, decoded.readblkmisalign);
-  fvdbg("  DSR_IMP: %d\n",
+  finfo("  DSR_IMP: %d\n",
         decoded.dsrimp);
 
   if (IS_BLOCK(priv->type))
     {
-      fvdbg("  SD Block Addressing:\n");
-      fvdbg("    C_SIZE: %d SD_ER_BLK_EN: %d\n",
+      finfo("  SD Block Addressing:\n");
+      finfo("    C_SIZE: %d SD_ER_BLK_EN: %d\n",
             decoded.u.sdblock.csize, decoded.u.sdblock.sderblen);
-      fvdbg("    SD_SECTOR_SIZE: %d SD_WP_GRP_SIZE: %d\n",
+      finfo("    SD_SECTOR_SIZE: %d SD_WP_GRP_SIZE: %d\n",
             decoded.u.sdblock.sdsectorsize, decoded.u.sdblock.sdwpgrpsize);
     }
   else if (IS_SD(priv->type))
     {
-      fvdbg("  SD Byte Addressing:\n");
-      fvdbg("    C_SIZE: %d C_SIZE_MULT: %d\n",
+      finfo("  SD Byte Addressing:\n");
+      finfo("    C_SIZE: %d C_SIZE_MULT: %d\n",
             decoded.u.sdbyte.csize, decoded.u.sdbyte.csizemult);
-      fvdbg("    VDD_R_CURR_MIN: %d VDD_R_CURR_MAX: %d\n",
+      finfo("    VDD_R_CURR_MIN: %d VDD_R_CURR_MAX: %d\n",
             decoded.u.sdbyte.vddrcurrmin, decoded.u.sdbyte.vddrcurrmax);
-      fvdbg("    VDD_W_CURR_MIN: %d VDD_W_CURR_MAX: %d\n",
+      finfo("    VDD_W_CURR_MIN: %d VDD_W_CURR_MAX: %d\n",
             decoded.u.sdbyte.vddwcurrmin, decoded.u.sdbyte.vddwcurrmax);
-      fvdbg("    SD_ER_BLK_EN: %d SD_SECTOR_SIZE: %d (SD) SD_WP_GRP_SIZE: %d\n",
+      finfo("    SD_ER_BLK_EN: %d SD_SECTOR_SIZE: %d (SD) SD_WP_GRP_SIZE: %d\n",
             decoded.u.sdbyte.sderblen, decoded.u.sdbyte.sdsectorsize, decoded.u.sdbyte.sdwpgrpsize);
     }
 #ifdef CONFIG_MMCSD_MMCSUPPORT
   else if (IS_MMC(priv->type))
     {
-      fvdbg("  MMC:\n");
-      fvdbg("    C_SIZE: %d C_SIZE_MULT: %d\n",
+      finfo("  MMC:\n");
+      finfo("    C_SIZE: %d C_SIZE_MULT: %d\n",
             decoded.u.mmc.csize, decoded.u.mmc.csizemult);
-      fvdbg("    VDD_R_CURR_MIN: %d VDD_R_CURR_MAX: %d\n",
+      finfo("    VDD_R_CURR_MIN: %d VDD_R_CURR_MAX: %d\n",
             decoded.u.mmc.vddrcurrmin, decoded.u.mmc.vddrcurrmax);
-      fvdbg("    VDD_W_CURR_MIN: %d VDD_W_CURR_MAX: %d\n",
+      finfo("    VDD_W_CURR_MIN: %d VDD_W_CURR_MAX: %d\n",
             decoded.u.mmc.vddwcurrmin, decoded.u.mmc.vddwcurrmax);
-      fvdbg("    MMC_SECTOR_SIZE: %d MMC_ER_GRP_SIZE: %d MMC_WP_GRP_SIZE: %d\n",
+      finfo("    MMC_SECTOR_SIZE: %d MMC_ER_GRP_SIZE: %d MMC_WP_GRP_SIZE: %d\n",
             decoded.u.mmc.er.mmc22.sectorsize, decoded.u.mmc.er.mmc22.ergrpsize,
             decoded.u.mmc.mmcwpgrpsize);
     }
 #endif
 
-  fvdbg("  WP_GRP_EN: %d MMC DFLT_ECC: %d (MMC) R2W_FACTOR: %d\n",
+  finfo("  WP_GRP_EN: %d MMC DFLT_ECC: %d (MMC) R2W_FACTOR: %d\n",
         decoded.wpgrpen, decoded.mmcdfltecc, decoded.r2wfactor);
-  fvdbg("  WRITE_BL_LEN: %d WRITE_BL_PARTIAL: %d\n",
+  finfo("  WRITE_BL_LEN: %d WRITE_BL_PARTIAL: %d\n",
         decoded.writebllen, decoded.writeblpartial);
-  fvdbg("  FILE_FORMAT_GROUP: %d COPY: %d\n",
+  finfo("  FILE_FORMAT_GROUP: %d COPY: %d\n",
         decoded.fileformatgrp, decoded.copy);
-  fvdbg("  PERM_WRITE_PROTECT: %d TMP_WRITE_PROTECT: %d\n",
+  finfo("  PERM_WRITE_PROTECT: %d TMP_WRITE_PROTECT: %d\n",
         decoded.permwriteprotect, decoded.tmpwriteprotect);
-  fvdbg("  FILE_FORMAT: %d ECC: %d (MMC) CRC: %d\n",
+  finfo("  FILE_FORMAT: %d ECC: %d (MMC) CRC: %d\n",
         decoded.fileformat, decoded.mmcecc, decoded.crc);
 
-  fvdbg("Capacity: %luKb, Block size: %db, nblocks: %d wrprotect: %d\n",
+  finfo("Capacity: %luKb, Block size: %db, nblocks: %d wrprotect: %d\n",
          (unsigned long)(priv->capacity / 1024), priv->blocksize,
          priv->nblocks, priv->wrprotect);
 #endif
@@ -844,7 +845,7 @@ static void mmcsd_decodeCSD(FAR struct mmcsd_state_s *priv, uint32_t csd[4])
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG) && defined (CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
+#ifdef CONFIG_DEBUG_FS_INFO
 static void mmcsd_decodeCID(FAR struct mmcsd_state_s *priv, uint32_t cid[4])
 {
   struct mmcsd_cid_s decoded;
@@ -857,7 +858,7 @@ static void mmcsd_decodeCID(FAR struct mmcsd_state_s *priv, uint32_t cid[4])
    */
 
   decoded.mid    =  cid[0] >> 24;
-  decoded.oid    = (cid[0] >> 16) & 0xffff;
+  decoded.oid    = (cid[0] >> 8) & 0xffff;
   decoded.pnm[0] =  cid[0] & 0xff;
 
   /* Word 2: Bits 64:95
@@ -893,9 +894,9 @@ static void mmcsd_decodeCID(FAR struct mmcsd_state_s *priv, uint32_t cid[4])
   decoded.mdt    = (cid[3] >> 8) & 0x0fff;
   decoded.crc    = (cid[3] >> 1) & 0x7f;
 
-  fvdbg("mid: %02x oid: %04x pnm: %s prv: %d psn: %d mdt: %02x crc: %02x\n",
+  finfo("mid: %02x oid: %04x pnm: %s prv: %d psn: %lu mdt: %02x crc: %02x\n",
       decoded.mid, decoded.oid, decoded.pnm, decoded.prv,
-      decoded.psn, decoded.mdt, decoded.crc);
+      (unsigned long)decoded.psn, decoded.mdt, decoded.crc);
 }
 #endif
 
@@ -910,7 +911,7 @@ static void mmcsd_decodeCID(FAR struct mmcsd_state_s *priv, uint32_t cid[4])
 
 static void mmcsd_decodeSCR(FAR struct mmcsd_state_s *priv, uint32_t scr[2])
 {
-#if defined(CONFIG_DEBUG) && defined (CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
+#ifdef CONFIG_DEBUG_FS_INFO
 struct mmcsd_scr_s decoded;
 #endif
 
@@ -923,14 +924,14 @@ struct mmcsd_scr_s decoded;
    *   Reserved               47:32 16-bit SD reserved space
    */
 
-#ifdef CONFIG_ENDIAN_BIG	/* Card transfers SCR in big-endian order */
+#ifdef CONFIG_ENDIAN_BIG  /* Card transfers SCR in big-endian order */
   priv->buswidth     = (scr[0] >> 16) & 15;
 #else
   priv->buswidth     = (scr[0] >> 8) & 15;
 #endif
 
-#if defined(CONFIG_DEBUG) && defined (CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
-#ifdef CONFIG_ENDIAN_BIG	/* Card SCR is big-endian order / CPU also big-endian
+#ifdef CONFIG_DEBUG_FS_INFO
+#ifdef CONFIG_ENDIAN_BIG    /* Card SCR is big-endian order / CPU also big-endian
                              *   60   56   52   48   44   40   36   32
                              * VVVV SSSS ESSS BBBB RRRR RRRR RRRR RRRR */
   decoded.scrversion =  scr[0] >> 28;
@@ -952,15 +953,15 @@ struct mmcsd_scr_s decoded;
    *   Reserved               31:0  32-bits reserved for manufacturing usage.
    */
 
-#if defined(CONFIG_DEBUG) && defined (CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
+#ifdef CONFIG_DEBUG_FS_INFO
   decoded.mfgdata   = scr[1];  /* Might be byte reversed! */
 
-  fvdbg("SCR:\n");
-  fvdbg("  SCR_STRUCTURE: %d SD_VERSION: %d\n",
+  finfo("SCR:\n");
+  finfo("  SCR_STRUCTURE: %d SD_VERSION: %d\n",
         decoded.scrversion, decoded.sdversion);
-  fvdbg("  DATA_STATE_AFTER_ERASE: %d SD_SECURITY: %d SD_BUS_WIDTHS: %x\n",
+  finfo("  DATA_STATE_AFTER_ERASE: %d SD_SECURITY: %d SD_BUS_WIDTHS: %x\n",
         decoded.erasestate, decoded.security, decoded.buswidth);
-  fvdbg("  Manufacturing data: %08x\n",
+  finfo("  Manufacturing data: %08x\n",
         decoded.mfgdata);
 #endif
 }
@@ -1028,7 +1029,7 @@ static int mmcsd_verifystate(FAR struct mmcsd_state_s *priv, uint32_t state)
   ret = mmcsd_getR1(priv, &r1);
   if (ret != OK)
     {
-      fdbg("ERROR: mmcsd_getR1 failed: %d\n", ret);
+      ferr("ERROR: mmcsd_getR1 failed: %d\n", ret);
       return ret;
     }
 
@@ -1097,7 +1098,7 @@ static int mmcsd_eventwait(FAR struct mmcsd_state_s *priv,
     {
       /* Yes.. the failure event is probably SDIOWAIT_TIMEOUT */
 
-      fdbg("ERROR: Awakened with %02x\n", wkupevent);
+      ferr("ERROR: Awakened with %02x\n", wkupevent);
       return wkupevent & SDIOWAIT_TIMEOUT ? -ETIMEDOUT : -EIO;
     }
 
@@ -1129,7 +1130,7 @@ static int mmcsd_transferready(FAR struct mmcsd_state_s *priv)
 
   if (!SDIO_PRESENT(priv->dev))
     {
-      fdbg("ERROR: Card has been removed\n");
+      ferr("ERROR: Card has been removed\n");
       return -ENODEV;
     }
 
@@ -1158,7 +1159,7 @@ static int mmcsd_transferready(FAR struct mmcsd_state_s *priv)
                         MMCSD_BLOCK_WDATADELAY);
   if (ret != OK)
     {
-      fdbg("ERROR: mmcsd_eventwait for transfer ready failed: %d\n", ret);
+      ferr("ERROR: mmcsd_eventwait for transfer ready failed: %d\n", ret);
     }
 #endif
 
@@ -1170,7 +1171,7 @@ static int mmcsd_transferready(FAR struct mmcsd_state_s *priv)
       ret = mmcsd_getR1(priv, &r1);
       if (ret != OK)
         {
-          fdbg("ERROR: mmcsd_getR1 failed: %d\n", ret);
+          ferr("ERROR: mmcsd_getR1 failed: %d\n", ret);
           return ret;
         }
 
@@ -1197,7 +1198,7 @@ static int mmcsd_transferready(FAR struct mmcsd_state_s *priv)
            * if this error occurs.
            */
 
-          fdbg("ERROR: Unexpected R1 state: %08x\n", r1);
+          ferr("ERROR: Unexpected R1 state: %08x\n", r1);
           return -EINVAL;
         }
 
@@ -1231,7 +1232,7 @@ static int mmcsd_stoptransmission(FAR struct mmcsd_state_s *priv)
   ret = mmcsd_recvR1(priv, MMCSD_CMD12);
   if (ret != OK)
     {
-      fdbg("ERROR: mmcsd_recvR1 for CMD12 failed: %d\n", ret);
+      ferr("ERROR: mmcsd_recvR1 for CMD12 failed: %d\n", ret);
     }
 
   return ret;
@@ -1267,7 +1268,7 @@ static int mmcsd_setblocklen(FAR struct mmcsd_state_s *priv, uint32_t blocklen)
         }
       else
         {
-          fdbg("ERROR: mmcsd_recvR1 for CMD16 failed: %d\n", ret);
+          ferr("ERROR: mmcsd_recvR1 for CMD16 failed: %d\n", ret);
         }
     }
 
@@ -1288,14 +1289,14 @@ static ssize_t mmcsd_readsingle(FAR struct mmcsd_state_s *priv,
   off_t offset;
   int ret;
 
-  fvdbg("startblock=%d\n", startblock);
+  finfo("startblock=%d\n", startblock);
   DEBUGASSERT(priv != NULL && buffer != NULL);
 
   /* Check if the card is locked */
 
   if (priv->locked)
     {
-      fdbg("ERROR: Card is locked\n");
+      ferr("ERROR: Card is locked\n");
       return -EPERM;
     }
 
@@ -1304,7 +1305,7 @@ static ssize_t mmcsd_readsingle(FAR struct mmcsd_state_s *priv,
    * will be able to before we commit the card to the operation.
    */
 
-  if (priv->dma)
+  if ((priv->caps & SDIO_CAPS_DMASUPPORTED) != 0)
     {
       ret = SDIO_DMAPREFLIGHT(priv->dev, buffer, priv->blocksize);
 
@@ -1325,7 +1326,7 @@ static ssize_t mmcsd_readsingle(FAR struct mmcsd_state_s *priv,
   ret = mmcsd_transferready(priv);
   if (ret != OK)
     {
-      fdbg("ERROR: Card not ready: %d\n", ret);
+      ferr("ERROR: Card not ready: %d\n", ret);
       return ret;
     }
 
@@ -1342,14 +1343,14 @@ static ssize_t mmcsd_readsingle(FAR struct mmcsd_state_s *priv,
       offset = startblock << priv->blockshift;
     }
 
-  fvdbg("offset=%d\n", offset);
+  finfo("offset=%d\n", offset);
 
   /* Select the block size for the card */
 
   ret = mmcsd_setblocklen(priv, priv->blocksize);
   if (ret != OK)
     {
-      fdbg("ERROR: mmcsd_setblocklen failed: %d\n", ret);
+      ferr("ERROR: mmcsd_setblocklen failed: %d\n", ret);
       return ret;
     }
 
@@ -1360,12 +1361,12 @@ static ssize_t mmcsd_readsingle(FAR struct mmcsd_state_s *priv,
                   SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR);
 
 #ifdef CONFIG_SDIO_DMA
-  if (priv->dma)
+  if ((priv->caps & SDIO_CAPS_DMASUPPORTED) != 0)
     {
       ret = SDIO_DMARECVSETUP(priv->dev, buffer, priv->blocksize);
       if (ret != OK)
         {
-          fvdbg("SDIO_DMARECVSETUP: error %d\n", ret);
+          finfo("SDIO_DMARECVSETUP: error %d\n", ret);
           return ret;
         }
     }
@@ -1385,7 +1386,7 @@ static ssize_t mmcsd_readsingle(FAR struct mmcsd_state_s *priv,
   ret = mmcsd_recvR1(priv, MMCSD_CMD17);
   if (ret != OK)
     {
-      fdbg("ERROR: mmcsd_recvR1 for CMD17 failed: %d\n", ret);
+      ferr("ERROR: mmcsd_recvR1 for CMD17 failed: %d\n", ret);
       SDIO_CANCEL(priv->dev);
       return ret;
     }
@@ -1396,7 +1397,7 @@ static ssize_t mmcsd_readsingle(FAR struct mmcsd_state_s *priv,
                         MMCSD_BLOCK_RDATADELAY);
   if (ret != OK)
     {
-      fdbg("ERROR: CMD17 transfer failed: %d\n", ret);
+      ferr("ERROR: CMD17 transfer failed: %d\n", ret);
       return ret;
     }
 
@@ -1422,14 +1423,14 @@ static ssize_t mmcsd_readmultiple(FAR struct mmcsd_state_s *priv,
   off_t  offset;
   int ret;
 
-  fvdbg("startblock=%d nblocks=%d\n", startblock, nblocks);
+  finfo("startblock=%d nblocks=%d\n", startblock, nblocks);
   DEBUGASSERT(priv != NULL && buffer != NULL && nblocks > 1);
 
   /* Check if the card is locked */
 
   if (priv->locked)
     {
-      fdbg("ERROR: Card is locked\n");
+      ferr("ERROR: Card is locked\n");
       return -EPERM;
     }
 
@@ -1438,7 +1439,7 @@ static ssize_t mmcsd_readmultiple(FAR struct mmcsd_state_s *priv,
    * will be able to before we commit the card to the operation.
    */
 
-  if (priv->dma)
+  if ((priv->caps & SDIO_CAPS_DMASUPPORTED) != 0)
     {
       ret = SDIO_DMAPREFLIGHT(priv->dev, buffer, priv->blocksize);
 
@@ -1459,7 +1460,7 @@ static ssize_t mmcsd_readmultiple(FAR struct mmcsd_state_s *priv,
   ret = mmcsd_transferready(priv);
   if (ret != OK)
     {
-      fdbg("ERROR: Card not ready: %d\n", ret);
+      ferr("ERROR: Card not ready: %d\n", ret);
       return ret;
     }
 
@@ -1476,14 +1477,15 @@ static ssize_t mmcsd_readmultiple(FAR struct mmcsd_state_s *priv,
     {
       offset = startblock << priv->blockshift;
     }
-  fvdbg("nbytes=%d byte offset=%d\n", nbytes, offset);
+
+  finfo("nbytes=%d byte offset=%d\n", nbytes, offset);
 
   /* Select the block size for the card */
 
   ret = mmcsd_setblocklen(priv, priv->blocksize);
   if (ret != OK)
   {
-    fdbg("ERROR: mmcsd_setblocklen failed: %d\n", ret);
+    ferr("ERROR: mmcsd_setblocklen failed: %d\n", ret);
     return ret;
   }
 
@@ -1494,12 +1496,12 @@ static ssize_t mmcsd_readmultiple(FAR struct mmcsd_state_s *priv,
                  SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR);
 
 #ifdef CONFIG_SDIO_DMA
-  if (priv->dma)
+  if ((priv->caps & SDIO_CAPS_DMASUPPORTED) != 0)
     {
       ret = SDIO_DMARECVSETUP(priv->dev, buffer, nbytes);
       if (ret != OK)
         {
-          fvdbg("SDIO_DMARECVSETUP: error %d\n", ret);
+          finfo("SDIO_DMARECVSETUP: error %d\n", ret);
           return ret;
         }
     }
@@ -1517,7 +1519,7 @@ static ssize_t mmcsd_readmultiple(FAR struct mmcsd_state_s *priv,
   ret = mmcsd_recvR1(priv, MMCSD_CMD18);
   if (ret != OK)
     {
-      fdbg("ERROR: mmcsd_recvR1 for CMD18 failed: %d\n", ret);
+      ferr("ERROR: mmcsd_recvR1 for CMD18 failed: %d\n", ret);
       SDIO_CANCEL(priv->dev);
       return ret;
     }
@@ -1528,7 +1530,7 @@ static ssize_t mmcsd_readmultiple(FAR struct mmcsd_state_s *priv,
                         nblocks * MMCSD_BLOCK_RDATADELAY);
   if (ret != OK)
     {
-      fdbg("ERROR: CMD18 transfer failed: %d\n", ret);
+      ferr("ERROR: CMD18 transfer failed: %d\n", ret);
       return ret;
     }
 
@@ -1537,7 +1539,7 @@ static ssize_t mmcsd_readmultiple(FAR struct mmcsd_state_s *priv,
   ret = mmcsd_stoptransmission(priv);
   if (ret != OK)
     {
-      fdbg("ERROR: mmcsd_stoptransmission failed: %d\n", ret);
+      ferr("ERROR: mmcsd_stoptransmission failed: %d\n", ret);
     }
 
   /* On success, return the number of blocks read */
@@ -1625,7 +1627,7 @@ static ssize_t mmcsd_writesingle(FAR struct mmcsd_state_s *priv,
   off_t offset;
   int ret;
 
-  fvdbg("startblock=%d\n", startblock);
+  finfo("startblock=%d\n", startblock);
   DEBUGASSERT(priv != NULL && buffer != NULL);
 
   /* Check if the card is locked or write protected (either via software or
@@ -1634,7 +1636,7 @@ static ssize_t mmcsd_writesingle(FAR struct mmcsd_state_s *priv,
 
   if (mmcsd_wrprotected(priv))
     {
-      fdbg("ERROR: Card is locked or write protected\n");
+      ferr("ERROR: Card is locked or write protected\n");
       return -EPERM;
     }
 
@@ -1643,7 +1645,7 @@ static ssize_t mmcsd_writesingle(FAR struct mmcsd_state_s *priv,
    * will be able to before we commit the card to the operation.
    */
 
-  if (priv->dma)
+  if ((priv->caps & SDIO_CAPS_DMASUPPORTED) != 0)
     {
       ret = SDIO_DMAPREFLIGHT(priv->dev, buffer, priv->blocksize);
 
@@ -1664,7 +1666,7 @@ static ssize_t mmcsd_writesingle(FAR struct mmcsd_state_s *priv,
   ret = mmcsd_transferready(priv);
   if (ret != OK)
     {
-      fdbg("ERROR: Card not ready: %d\n", ret);
+      ferr("ERROR: Card not ready: %d\n", ret);
       return ret;
     }
 
@@ -1681,25 +1683,32 @@ static ssize_t mmcsd_writesingle(FAR struct mmcsd_state_s *priv,
       offset = startblock << priv->blockshift;
     }
 
-  fvdbg("offset=%d\n", offset);
+  finfo("offset=%d\n", offset);
 
   /* Select the block size for the card */
 
   ret = mmcsd_setblocklen(priv, priv->blocksize);
   if (ret != OK)
     {
-      fdbg("ERROR: mmcsd_setblocklen failed: %d\n", ret);
+      ferr("ERROR: mmcsd_setblocklen failed: %d\n", ret);
       return ret;
     }
 
-  /* Send CMD24, WRITE_BLOCK, and verify that good R1 status is returned */
+  /* If Controller does not need DMA setup before the write then send CMD24
+   * now.
+   */
 
-  mmcsd_sendcmdpoll(priv, MMCSD_CMD24, offset);
-  ret = mmcsd_recvR1(priv, MMCSD_CMD24);
-  if (ret != OK)
+  if ((priv->caps & SDIO_CAPS_DMABEFOREWRITE) == 0)
     {
-      fdbg("ERROR: mmcsd_recvR1 for CMD24 failed: %d\n", ret);
-      return ret;
+      /* Send CMD24, WRITE_BLOCK, and verify that good R1 status is returned */
+
+      mmcsd_sendcmdpoll(priv, MMCSD_CMD24, offset);
+      ret = mmcsd_recvR1(priv, MMCSD_CMD24);
+      if (ret != OK)
+        {
+          ferr("ERROR: mmcsd_recvR1 for CMD24 failed: %d\n", ret);
+          return ret;
+        }
     }
 
   /* Configure SDIO controller hardware for the write transfer */
@@ -1707,13 +1716,14 @@ static ssize_t mmcsd_writesingle(FAR struct mmcsd_state_s *priv,
   SDIO_BLOCKSETUP(priv->dev, priv->blocksize, 1);
   SDIO_WAITENABLE(priv->dev,
                   SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR);
+
 #ifdef CONFIG_SDIO_DMA
-  if (priv->dma)
+  if ((priv->caps & SDIO_CAPS_DMASUPPORTED) != 0)
     {
       ret = SDIO_DMASENDSETUP(priv->dev, buffer, priv->blocksize);
       if (ret != OK)
         {
-          fvdbg("SDIO_DMASENDSETUP: error %d\n", ret);
+          finfo("SDIO_DMASENDSETUP: error %d\n", ret);
           return ret;
         }
     }
@@ -1729,13 +1739,28 @@ static ssize_t mmcsd_writesingle(FAR struct mmcsd_state_s *priv,
 
   priv->wrbusy = true;
 
+  /* If Controller needs DMA setup before write then only send CMD24 now. */
+
+  if ((priv->caps & SDIO_CAPS_DMABEFOREWRITE) != 0)
+    {
+      /* Send CMD24, WRITE_BLOCK, and verify that good R1 status is returned */
+
+      mmcsd_sendcmdpoll(priv, MMCSD_CMD24, offset);
+      ret = mmcsd_recvR1(priv, MMCSD_CMD24);
+      if (ret != OK)
+        {
+          ferr("ERROR: mmcsd_recvR1 for CMD24 failed: %d\n", ret);
+          return ret;
+        }
+    }
+
   /* Wait for the transfer to complete */
 
   ret = mmcsd_eventwait(priv,
                         SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR, MMCSD_BLOCK_WDATADELAY);
   if (ret != OK)
     {
-      fdbg("ERROR: CMD24 transfer failed: %d\n", ret);
+      ferr("ERROR: CMD24 transfer failed: %d\n", ret);
       return ret;
     }
 
@@ -1768,7 +1793,7 @@ static ssize_t mmcsd_writemultiple(FAR struct mmcsd_state_s *priv,
   size_t nbytes;
   int ret;
 
-  fvdbg("startblock=%d nblocks=%d\n", startblock, nblocks);
+  finfo("startblock=%d nblocks=%d\n", startblock, nblocks);
   DEBUGASSERT(priv != NULL && buffer != NULL && nblocks > 1);
 
   /* Check if the card is locked or write protected (either via software or
@@ -1777,7 +1802,7 @@ static ssize_t mmcsd_writemultiple(FAR struct mmcsd_state_s *priv,
 
   if (mmcsd_wrprotected(priv))
     {
-      fdbg("ERROR: Card is locked or write protected\n");
+      ferr("ERROR: Card is locked or write protected\n");
       return -EPERM;
     }
 
@@ -1786,7 +1811,7 @@ static ssize_t mmcsd_writemultiple(FAR struct mmcsd_state_s *priv,
    * will be able to before we commit the card to the operation.
    */
 
-  if (priv->dma)
+  if ((priv->caps & SDIO_CAPS_DMASUPPORTED) != 0)
     {
       ret = SDIO_DMAPREFLIGHT(priv->dev, buffer, priv->blocksize);
 
@@ -1807,7 +1832,7 @@ static ssize_t mmcsd_writemultiple(FAR struct mmcsd_state_s *priv,
   ret = mmcsd_transferready(priv);
   if (ret != OK)
     {
-      fdbg("ERROR: Card not ready: %d\n", ret);
+      ferr("ERROR: Card not ready: %d\n", ret);
       return ret;
     }
 
@@ -1825,14 +1850,14 @@ static ssize_t mmcsd_writemultiple(FAR struct mmcsd_state_s *priv,
       offset = startblock << priv->blockshift;
     }
 
-  fvdbg("nbytes=%d byte offset=%d\n", nbytes, offset);
+  finfo("nbytes=%d byte offset=%d\n", nbytes, offset);
 
   /* Select the block size for the card */
 
   ret = mmcsd_setblocklen(priv, priv->blocksize);
   if (ret != OK)
     {
-      fdbg("ERROR: mmcsd_setblocklen failed: %d\n", ret);
+      ferr("ERROR: mmcsd_setblocklen failed: %d\n", ret);
       return ret;
     }
 
@@ -1850,7 +1875,7 @@ static ssize_t mmcsd_writemultiple(FAR struct mmcsd_state_s *priv,
       ret = mmcsd_recvR1(priv, SD_CMD55);
       if (ret != OK)
         {
-          fdbg("ERROR: mmcsd_recvR1 for CMD55 (ACMD23) failed: %d\n", ret);
+          ferr("ERROR: mmcsd_recvR1 for CMD55 (ACMD23) failed: %d\n", ret);
           return ret;
         }
 
@@ -1860,7 +1885,7 @@ static ssize_t mmcsd_writemultiple(FAR struct mmcsd_state_s *priv,
       ret = mmcsd_recvR1(priv, SD_ACMD23);
       if (ret != OK)
         {
-          fdbg("ERROR: mmcsd_recvR1 for ACMD23 failed: %d\n", ret);
+          ferr("ERROR: mmcsd_recvR1 for ACMD23 failed: %d\n", ret);
           return ret;
         }
     }
@@ -1870,13 +1895,14 @@ static ssize_t mmcsd_writemultiple(FAR struct mmcsd_state_s *priv,
   SDIO_BLOCKSETUP(priv->dev, priv->blocksize, nblocks);
   SDIO_WAITENABLE(priv->dev,
                   SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR);
+
 #ifdef CONFIG_SDIO_DMA
-  if (priv->dma)
+  if ((priv->caps & SDIO_CAPS_DMASUPPORTED) != 0)
     {
       ret = SDIO_DMASENDSETUP(priv->dev, buffer, nbytes);
       if (ret != OK)
         {
-          fvdbg("SDIO_DMASENDSETUP: error %d\n", ret);
+          finfo("SDIO_DMASENDSETUP: error %d\n", ret);
           return ret;
         }
     }
@@ -1900,7 +1926,7 @@ static ssize_t mmcsd_writemultiple(FAR struct mmcsd_state_s *priv,
   ret = mmcsd_recvR1(priv, MMCSD_CMD25);
   if (ret != OK)
     {
-      fdbg("ERROR: mmcsd_recvR1 for CMD25 failed: %d\n", ret);
+      ferr("ERROR: mmcsd_recvR1 for CMD25 failed: %d\n", ret);
       return ret;
     }
 
@@ -1909,7 +1935,7 @@ static ssize_t mmcsd_writemultiple(FAR struct mmcsd_state_s *priv,
   ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR, nblocks * MMCSD_BLOCK_WDATADELAY);
   if (ret != OK)
     {
-      fdbg("ERROR: CMD18 transfer failed: %d\n", ret);
+      ferr("ERROR: CMD18 transfer failed: %d\n", ret);
       return ret;
     }
 
@@ -1918,7 +1944,7 @@ static ssize_t mmcsd_writemultiple(FAR struct mmcsd_state_s *priv,
   ret = mmcsd_stoptransmission(priv);
   if (ret != OK)
     {
-      fdbg("ERROR: mmcsd_stoptransmission failed: %d\n", ret);
+      ferr("ERROR: mmcsd_stoptransmission failed: %d\n", ret);
       return ret;
     }
 
@@ -2003,7 +2029,7 @@ static int mmcsd_open(FAR struct inode *inode)
 {
   FAR struct mmcsd_state_s *priv;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
   DEBUGASSERT(inode && inode->i_private);
   priv = (FAR struct mmcsd_state_s *)inode->i_private;
 
@@ -2027,7 +2053,7 @@ static int mmcsd_close(FAR struct inode *inode)
 {
   FAR struct mmcsd_state_s *priv;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
   DEBUGASSERT(inode && inode->i_private);
   priv = (FAR struct mmcsd_state_s *)inode->i_private;
 
@@ -2061,7 +2087,7 @@ static ssize_t mmcsd_read(FAR struct inode *inode, unsigned char *buffer,
 
   DEBUGASSERT(inode && inode->i_private);
   priv = (FAR struct mmcsd_state_s *)inode->i_private;
-  fvdbg("startsector: %d nsectors: %d sectorsize: %d\n",
+  finfo("startsector: %d nsectors: %d sectorsize: %d\n",
         startsector, nsectors, priv->blocksize);
 
   if (nsectors > 0)
@@ -2094,7 +2120,7 @@ static ssize_t mmcsd_read(FAR struct inode *inode, unsigned char *buffer,
         }
 
 #else
-      /* Use either the single- or muliple-block transfer method */
+      /* Use either the single- or multiple-block transfer method */
 
       if (nsectors == 1)
         {
@@ -2137,7 +2163,7 @@ static ssize_t mmcsd_write(FAR struct inode *inode, FAR const unsigned char *buf
   DEBUGASSERT(inode && inode->i_private);
   priv = (FAR struct mmcsd_state_s *)inode->i_private;
 
-  fvdbg("sector: %lu nsectors: %u sectorsize: %u\n",
+  finfo("sector: %lu nsectors: %u sectorsize: %u\n",
         (unsigned long)startsector, nsectors, priv->blocksize);
 
   mmcsd_takesem(priv);
@@ -2200,7 +2226,7 @@ static int mmcsd_geometry(FAR struct inode *inode, struct geometry *geometry)
   FAR struct mmcsd_state_s *priv;
   int ret = -EINVAL;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
   DEBUGASSERT(inode && inode->i_private);
 
   if (geometry)
@@ -2213,7 +2239,7 @@ static int mmcsd_geometry(FAR struct inode *inode, struct geometry *geometry)
         {
           /* No.. return ENODEV */
 
-          fvdbg("IS_EMPTY\n");
+          finfo("IS_EMPTY\n");
           ret = -ENODEV;
         }
       else
@@ -2230,11 +2256,12 @@ static int mmcsd_geometry(FAR struct inode *inode, struct geometry *geometry)
           geometry->geo_nsectors      = priv->nblocks;
           geometry->geo_sectorsize    = priv->blocksize;
 
-          fvdbg("available: true mediachanged: %s writeenabled: %s\n",
+          finfo("available: true mediachanged: %s writeenabled: %s\n",
                  geometry->geo_mediachanged ? "true" : "false",
                  geometry->geo_writeenabled ? "true" : "false");
-          fvdbg("nsectors: %lu sectorsize: %d\n",
-                 (long)geometry->geo_nsectors, geometry->geo_sectorsize);
+          finfo("nsectors: %lu sectorsize: %d\n",
+                 (unsigned long)geometry->geo_nsectors,
+                 geometry->geo_sectorsize);
 
           priv->mediachanged = false;
           ret = OK;
@@ -2258,7 +2285,7 @@ static int mmcsd_ioctl(FAR struct inode *inode, int cmd, unsigned long arg)
   FAR struct mmcsd_state_s *priv;
   int ret;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
   DEBUGASSERT(inode && inode->i_private);
   priv  = (FAR struct mmcsd_state_s *)inode->i_private;
 
@@ -2269,28 +2296,28 @@ static int mmcsd_ioctl(FAR struct inode *inode, int cmd, unsigned long arg)
     {
     case BIOC_PROBE: /* Check for media in the slot */
       {
-        fvdbg("BIOC_PROBE\n");
+        finfo("BIOC_PROBE\n");
 
         /* Probe the MMC/SD slot for media */
 
         ret = mmcsd_probe(priv);
         if (ret != OK)
           {
-            fdbg("ERROR: mmcsd_probe failed: %d\n", ret);
+            ferr("ERROR: mmcsd_probe failed: %d\n", ret);
           }
       }
       break;
 
     case BIOC_EJECT: /* Media has been removed from the slot */
       {
-        fvdbg("BIOC_EJECT\n");
+        finfo("BIOC_EJECT\n");
 
         /* Process the removal of the card */
 
         ret = mmcsd_removed(priv);
         if (ret != OK)
           {
-            fdbg("ERROR: mmcsd_removed failed: %d\n", ret);
+            ferr("ERROR: mmcsd_removed failed: %d\n", ret);
           }
 
         /* Enable logic to detect if a card is re-inserted */
@@ -2330,7 +2357,7 @@ static void mmcsd_mediachange(FAR void *arg)
 {
   FAR struct mmcsd_state_s *priv = (FAR struct mmcsd_state_s *)arg;
 
-  fvdbg("arg: %p\n", arg);
+  finfo("arg: %p\n", arg);
   DEBUGASSERT(priv);
 
   /* Is there a card present in the slot? */
@@ -2379,12 +2406,14 @@ static void mmcsd_mediachange(FAR void *arg)
 
 static int mmcsd_widebus(FAR struct mmcsd_state_s *priv)
 {
-#ifndef CONFIG_SDIO_WIDTH_D1_ONLY
   int ret;
 
-  /* Check if the SD card supports this feature (as reported in the SCR) */
+  /* Check if the SD card supports wide bus operation (as reported in the
+   * SCR or in the SDIO driver capabililities)
+   */
 
-  if ((priv->buswidth & MMCSD_SCR_BUSWIDTH_4BIT) != 0)
+  if ((priv->buswidth & MMCSD_SCR_BUSWIDTH_4BIT) != 0 &&
+      (priv->caps & SDIO_CAPS_1BIT_ONLY) == 0)
     {
       /* Disconnect any CD/DAT3 pull up using ACMD42.  ACMD42 is optional and
        * need not be supported by all SD calls.
@@ -2396,7 +2425,7 @@ static int mmcsd_widebus(FAR struct mmcsd_state_s *priv)
       ret = mmcsd_recvR1(priv, SD_CMD55);
       if (ret != OK)
         {
-          fdbg("ERROR: RECVR1 for CMD55 of ACMD42: %d\n", ret);
+          ferr("ERROR: RECVR1 for CMD55 of ACMD42: %d\n", ret);
           return ret;
         }
 
@@ -2411,7 +2440,7 @@ static int mmcsd_widebus(FAR struct mmcsd_state_s *priv)
       ret = mmcsd_recvR1(priv, SD_ACMD42);
       if (ret != OK)
         {
-          fvdbg("WARNING: SD card does not support ACMD42: %d\n", ret);
+          fwarn("WARNING: SD card does not support ACMD42: %d\n", ret);
           return ret;
         }
 
@@ -2423,7 +2452,7 @@ static int mmcsd_widebus(FAR struct mmcsd_state_s *priv)
       ret = mmcsd_recvR1(priv, SD_CMD55);
       if (ret != OK)
         {
-          fdbg("ERROR: RECVR1 for CMD55 of ACMD6: %d\n", ret);
+          ferr("ERROR: RECVR1 for CMD55 of ACMD6: %d\n", ret);
           return ret;
         }
 
@@ -2438,7 +2467,7 @@ static int mmcsd_widebus(FAR struct mmcsd_state_s *priv)
 
       /* Configure the SDIO peripheral */
 
-      fvdbg("Wide bus operation selected\n");
+      finfo("Wide bus operation selected\n");
       SDIO_WIDEBUS(priv->dev, true);
       priv->widebus = true;
 
@@ -2449,15 +2478,8 @@ static int mmcsd_widebus(FAR struct mmcsd_state_s *priv)
 
   /* Wide bus operation not supported */
 
-  fdbg("WARNING: Card does not support wide-bus operation\n");
-  return -ENOSYS;
-
-#else /* CONFIG_SDIO_WIDTH_D1_ONLY */
-
-  fvdbg("Wide-bus operation is disabled\n");
+  fwarn("WARNING: Card does not support wide-bus operation\n");
   return -ENOSYS;
-
-#endif /* CONFIG_SDIO_WIDTH_D1_ONLY */
 }
 
 /****************************************************************************
@@ -2492,7 +2514,7 @@ static int mmcsd_mmcinitialize(FAR struct mmcsd_state_s *priv)
   ret = SDIO_RECVR2(priv->dev, MMCSD_CMD2, cid);
   if (ret != OK)
     {
-      fdbg("ERROR: SDIO_RECVR2 for MMC CID failed: %d\n", ret);
+      ferr("ERROR: SDIO_RECVR2 for MMC CID failed: %d\n", ret);
       return ret;
     }
 
@@ -2508,7 +2530,7 @@ static int mmcsd_mmcinitialize(FAR struct mmcsd_state_s *priv)
   ret = mmcsd_recvR1(priv, MMC_CMD3);
   if (ret != OK)
     {
-      fdbg("ERROR: mmcsd_recvR1(CMD3) failed: %d\n", ret);
+      ferr("ERROR: mmcsd_recvR1(CMD3) failed: %d\n", ret);
       return ret;
     }
 
@@ -2522,7 +2544,7 @@ static int mmcsd_mmcinitialize(FAR struct mmcsd_state_s *priv)
   ret = mmcsd_verifystate(priv, MMCSD_R1_STATE_STBY);
   if (ret != OK)
     {
-      fdbg("ERROR: Failed to enter standby state\n");
+      ferr("ERROR: Failed to enter standby state\n");
       return ret;
     }
 
@@ -2535,7 +2557,7 @@ static int mmcsd_mmcinitialize(FAR struct mmcsd_state_s *priv)
   ret = SDIO_RECVR2(priv->dev, MMCSD_CMD9, csd);
   if (ret != OK)
     {
-      fdbg("ERROR: Could not get SD CSD register: %d\n", ret);
+      ferr("ERROR: Could not get SD CSD register: %d\n", ret);
       return ret;
     }
 
@@ -2593,7 +2615,7 @@ static int mmcsd_sdinitialize(FAR struct mmcsd_state_s *priv)
   ret = SDIO_RECVR2(priv->dev, MMCSD_CMD2, cid);
   if (ret != OK)
     {
-      fdbg("ERROR: SDIO_RECVR2 for SD CID failed: %d\n", ret);
+      ferr("ERROR: SDIO_RECVR2 for SD CID failed: %d\n", ret);
       return ret;
     }
 
@@ -2611,11 +2633,11 @@ static int mmcsd_sdinitialize(FAR struct mmcsd_state_s *priv)
   ret = mmcsd_recvR6(priv, SD_CMD3);
   if (ret != OK)
     {
-      fdbg("ERROR: mmcsd_recvR2 for SD RCA failed: %d\n", ret);
+      ferr("ERROR: mmcsd_recvR2 for SD RCA failed: %d\n", ret);
       return ret;
     }
 
-  fvdbg("RCA: %04x\n", priv->rca);
+  finfo("RCA: %04x\n", priv->rca);
 
   /* This should have caused a transition to standby state. However, this will
    * not be reflected in the present R1 status.  R1/6 contains the state of
@@ -2627,7 +2649,7 @@ static int mmcsd_sdinitialize(FAR struct mmcsd_state_s *priv)
   ret = mmcsd_verifystate(priv, MMCSD_R1_STATE_STBY);
   if (ret != OK)
     {
-      fdbg("ERROR: Failed to enter standby state\n");
+      ferr("ERROR: Failed to enter standby state\n");
       return ret;
     }
 
@@ -2641,7 +2663,7 @@ static int mmcsd_sdinitialize(FAR struct mmcsd_state_s *priv)
   ret = SDIO_RECVR2(priv->dev, MMCSD_CMD9, csd);
   if (ret != OK)
     {
-      fdbg("ERROR: Could not get SD CSD register(%d)\n", ret);
+      ferr("ERROR: Could not get SD CSD register(%d)\n", ret);
       return ret;
     }
 
@@ -2656,7 +2678,7 @@ static int mmcsd_sdinitialize(FAR struct mmcsd_state_s *priv)
   ret = mmcsd_recvR1(priv, MMCSD_CMD7S);
   if (ret != OK)
     {
-      fdbg("ERROR: mmcsd_recvR1 for CMD7 failed: %d\n", ret);
+      ferr("ERROR: mmcsd_recvR1 for CMD7 failed: %d\n", ret);
       return ret;
     }
 
@@ -2680,7 +2702,7 @@ static int mmcsd_sdinitialize(FAR struct mmcsd_state_s *priv)
   ret = mmcsd_getSCR(priv, scr);
   if (ret != OK)
     {
-      fdbg("ERROR: Could not get SD SCR register(%d)\n", ret);
+      ferr("ERROR: Could not get SD SCR register(%d)\n", ret);
       return ret;
     }
 
@@ -2691,7 +2713,7 @@ static int mmcsd_sdinitialize(FAR struct mmcsd_state_s *priv)
   ret = mmcsd_widebus(priv);
   if (ret != OK)
     {
-      fdbg("WARN: Failed to set wide bus operation: %d\n", ret);
+      ferr("ERROR: Failed to set wide bus operation: %d\n", ret);
     }
 
   /* TODO: If wide-bus selected, then send CMD6 to see if the card supports
@@ -2729,7 +2751,7 @@ static int mmcsd_cardidentify(FAR struct mmcsd_state_s *priv)
 
   if (!SDIO_PRESENT(priv->dev))
     {
-      fvdbg("No card present\n");
+      finfo("No card present\n");
       return -ENODEV;
     }
 
@@ -2779,13 +2801,13 @@ static int mmcsd_cardidentify(FAR struct mmcsd_state_s *priv)
       if (((response & MMCSD_R7VOLTAGE_MASK) == MMCSD_R7VOLTAGE_27) &&
           ((response & MMCSD_R7ECHO_MASK) ==  MMCSD_R7CHECKPATTERN))
         {
-          fvdbg("SD V2.x card\n");
+          finfo("SD V2.x card\n");
           priv->type = MMCSD_CARDTYPE_SDV2;
           sdcapacity = MMCSD_ACMD41_HIGHCAPACITY;
         }
       else
         {
-          fdbg("ERROR: R7: %08x\n", response);
+          ferr("ERROR: R7: %08x\n", response);
           return -EIO;
         }
     }
@@ -2820,7 +2842,7 @@ static int mmcsd_cardidentify(FAR struct mmcsd_state_s *priv)
                * the MMC vs. SD decision based on CMD1 and ACMD41.
                */
 
-              fdbg("ERROR: mmcsd_recvR1(CMD55) failed: %d\n", ret);
+              ferr("ERROR: mmcsd_recvR1(CMD55) failed: %d\n", ret);
             }
           else
             {
@@ -2835,7 +2857,7 @@ static int mmcsd_cardidentify(FAR struct mmcsd_state_s *priv)
                    * but we will make the decision based on CMD1 below
                    */
 
-                  fdbg("ERROR: ACMD41 RECVR3: %d\n", ret);
+                  ferr("ERROR: ACMD41 RECVR3: %d\n", ret);
                 }
               else
                 {
@@ -2844,10 +2866,10 @@ static int mmcsd_cardidentify(FAR struct mmcsd_state_s *priv)
                    * an SD V2.x (via CMD8), then this must be SD V1.x
                    */
 
-                  fvdbg("R3: %08x\n", response);
+                  finfo("R3: %08x\n", response);
                   if (priv->type == MMCSD_CARDTYPE_UNKNOWN)
                     {
-                      fvdbg("SD V1.x card\n");
+                      finfo("SD V1.x card\n");
                       priv->type = MMCSD_CARDTYPE_SDV1;
                     }
 
@@ -2869,7 +2891,7 @@ static int mmcsd_cardidentify(FAR struct mmcsd_state_s *priv)
 
                       if ((response & MMCSD_R3_HIGHCAPACITY) != 0)
                         {
-                          fvdbg("SD V2.x card with block addressing\n");
+                          finfo("SD V2.x card with block addressing\n");
                           DEBUGASSERT(priv->type == MMCSD_CARDTYPE_SDV2);
                           priv->type |= MMCSD_CARDTYPE_BLOCK;
                         }
@@ -2912,13 +2934,13 @@ static int mmcsd_cardidentify(FAR struct mmcsd_state_s *priv)
 
           if (ret != OK)
             {
-              fdbg("ERROR: CMD1 RECVR3: %d\n", ret);
+              ferr("ERROR: CMD1 RECVR3: %d\n", ret);
             }
           else
             {
               /* CMD1 succeeded... this must be an MMC card */
 
-              fdbg("CMD1 succeeded, assuming MMC card\n");
+              finfo("CMD1 succeeded, assuming MMC card\n");
               priv->type = MMCSD_CARDTYPE_MMC;
 
               /* Check if the card is busy.  Very confusing, BUSY is set LOW
@@ -2955,7 +2977,7 @@ static int mmcsd_cardidentify(FAR struct mmcsd_state_s *priv)
 
   if (elapsed >= TICK_PER_SEC || priv->type == MMCSD_CARDTYPE_UNKNOWN)
     {
-      fdbg("ERROR: Failed to identify card\n");
+      ferr("ERROR: Failed to identify card\n");
       return -EIO;
     }
 
@@ -2977,7 +2999,7 @@ static int mmcsd_probe(FAR struct mmcsd_state_s *priv)
 {
   int ret;
 
-  fvdbg("type: %d probed: %d\n", priv->type, priv->probed);
+  finfo("type: %d probed: %d\n", priv->type, priv->probed);
 
   /* If we have reliable card detection events and if we have
    * already probed the card, then we don't need to do anything
@@ -3010,7 +3032,7 @@ static int mmcsd_probe(FAR struct mmcsd_state_s *priv)
       ret = mmcsd_cardidentify(priv);
       if (ret != OK)
         {
-          fdbg("ERROR: Failed to initialize card: %d\n", ret);
+          ferr("ERROR: Failed to initialize card: %d\n", ret);
 #ifdef CONFIG_MMCSD_HAVECARDDETECT
           SDIO_CALLBACKENABLE(priv->dev, SDIOMEDIA_INSERTED);
 #endif
@@ -3034,7 +3056,7 @@ static int mmcsd_probe(FAR struct mmcsd_state_s *priv)
 #endif
             case MMCSD_CARDTYPE_UNKNOWN:                     /* Unknown card type */
             default:
-              fdbg("ERROR: Internal confusion: %d\n", priv->type);
+              ferr("ERROR: Internal confusion: %d\n", priv->type);
               ret = -EPERM;
               break;
             }
@@ -3045,12 +3067,14 @@ static int mmcsd_probe(FAR struct mmcsd_state_s *priv)
             {
               /* Yes...  */
 
-              fvdbg("Capacity: %lu Kbytes\n", (unsigned long)(priv->capacity / 1024));
+              finfo("Capacity: %lu Kbytes\n", (unsigned long)(priv->capacity / 1024));
               priv->mediachanged = true;
 
+#ifdef CONFIG_MMCSD_HAVECARDDETECT
               /* Set up to receive asynchronous, media removal events */
 
               SDIO_CALLBACKENABLE(priv->dev, SDIOMEDIA_EJECTED);
+#endif
             }
 
           /* REVISIT: There is a problem here.  If mmcsd_initialize() returns a
@@ -3066,7 +3090,7 @@ static int mmcsd_probe(FAR struct mmcsd_state_s *priv)
     {
       /* There is no card in the slot */
 
-      fvdbg("No card\n");
+      finfo("No card\n");
 #ifdef CONFIG_MMCSD_HAVECARDDETECT
       SDIO_CALLBACKENABLE(priv->dev, SDIOMEDIA_INSERTED);
 #endif
@@ -3088,7 +3112,7 @@ static int mmcsd_probe(FAR struct mmcsd_state_s *priv)
 
 static int mmcsd_removed(FAR struct mmcsd_state_s *priv)
 {
-  fvdbg("type: %d present: %d\n", priv->type, SDIO_PRESENT(priv->dev));
+  finfo("type: %d present: %d\n", priv->type, SDIO_PRESENT(priv->dev));
 
   /* Forget the card geometry, pretend the slot is empty (it might not
    * be), and that the card has never been initialized.
@@ -3127,23 +3151,21 @@ static int mmcsd_hwinitialize(FAR struct mmcsd_state_s *priv)
 
   mmcsd_takesem(priv);
 
-#ifdef CONFIG_SDIO_DMA
-  /* Does this architecture support DMA with the MMC/SD device? */
+  /* Get the capabilities of the SDIO driver */
 
-  priv->dma = SDIO_DMASUPPORTED(priv->dev);
-  fvdbg("DMA supported: %d\n", priv->dma);
-#endif
+  priv->caps = SDIO_CAPABILITIES(priv->dev);
+  finfo("DMA supported: %d\n", (priv->caps & SDIO_CAPS_DMASUPPORTED) != 0);
 
   /* Attach and prepare MMC/SD interrupts */
 
   if (SDIO_ATTACH(priv->dev))
     {
-      fdbg("ERROR: Unable to attach MMC/SD interrupts\n");
+      ferr("ERROR: Unable to attach MMC/SD interrupts\n");
       mmcsd_givesem(priv);
       return -EBUSY;
     }
 
-  fvdbg("Attached MMC/SD interrupts\n");
+  finfo("Attached MMC/SD interrupts\n");
 
   /* Register a callback so that we get informed if media is inserted or
    * removed from the slot (Initially all callbacks are disabled).
@@ -3174,7 +3196,7 @@ static int mmcsd_hwinitialize(FAR struct mmcsd_state_s *priv)
       ret = mmcsd_probe(priv);
       if (ret != OK)
         {
-          fvdbg("Slot not empty, but initialization failed: %d\n", ret);
+          finfo("Slot not empty, but initialization failed: %d\n", ret);
 
           /* NOTE: The failure to initialize a card does not mean that
            * initialization has failed! A card could be installed in the slot
@@ -3247,11 +3269,11 @@ int mmcsd_slotinitialize(int minor, FAR struct sdio_dev_s *dev)
   char devname[16];
   int ret = -ENOMEM;
 
-  fvdbg("minor: %d\n", minor);
+  finfo("minor: %d\n", minor);
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (minor < 0 || minor > 255 || !dev)
     {
       return -EINVAL;
@@ -3293,13 +3315,13 @@ int mmcsd_slotinitialize(int minor, FAR struct sdio_dev_s *dev)
 
               SDIO_CALLBACKENABLE(priv->dev, SDIOMEDIA_INSERTED);
 
-              fvdbg("MMC/SD slot is empty\n");
+              finfo("MMC/SD slot is empty\n");
             }
           else
             {
               /* Some other non-recoverable bad thing happened */
 
-              fdbg("ERROR: Failed to initialize MMC/SD slot: %d\n", ret);
+              ferr("ERROR: Failed to initialize MMC/SD slot: %d\n", ret);
               goto errout_with_alloc;
             }
         }
@@ -3311,7 +3333,7 @@ int mmcsd_slotinitialize(int minor, FAR struct sdio_dev_s *dev)
       ret = rwb_initialize(&priv->rwbuffer);
       if (ret < 0)
         {
-          fdbg("ERROR: Buffer setup failed: %d\n", ret);
+          ferr("ERROR: Buffer setup failed: %d\n", ret);
           goto errout_with_hwinit;
         }
 #endif
@@ -3325,7 +3347,7 @@ int mmcsd_slotinitialize(int minor, FAR struct sdio_dev_s *dev)
       ret = register_blockdriver(devname, &g_bops, 0, priv);
       if (ret < 0)
         {
-          fdbg("ERROR: register_blockdriver failed: %d\n", ret);
+          ferr("ERROR: register_blockdriver failed: %d\n", ret);
           goto errout_with_buffers;
         }
     }
diff --git a/drivers/mmcsd/mmcsd_spi.c b/drivers/mmcsd/mmcsd_spi.c
index 9a44011f424566007a9ce7812acb4ae61f49c2d7..2a4cdee73dd314493a4cee5c0208edb692d1b00f 100644
--- a/drivers/mmcsd/mmcsd_spi.c
+++ b/drivers/mmcsd/mmcsd_spi.c
@@ -431,7 +431,7 @@ static int mmcsd_waitready(FAR struct mmcsd_slot_s *slot)
     }
   while (elapsed < MMCSD_DELAY_500MS);
 
-  fdbg("Card still busy, last response: %02x\n", response);
+  finfo("Card still busy, last response: %02x\n", response);
   return -EBUSY;
 }
 
@@ -504,7 +504,7 @@ static uint32_t mmcsd_sendcmd(FAR struct mmcsd_slot_s *slot,
 
   if ((response & 0x80) != 0)
     {
-      fdbg("Failed: i=%d response=%02x\n", i, response);
+      ferr("ERROR: Failed: i=%d response=%02x\n", i, response);
       return (uint32_t)-1;
     }
 
@@ -531,11 +531,11 @@ static uint32_t mmcsd_sendcmd(FAR struct mmcsd_slot_s *slot,
 
         if (busy != 0xff)
           {
-            fdbg("Failed: card still busy (%02x)\n", busy);
+            ferr("ERROR: Failed: card still busy (%02x)\n", busy);
             return (uint32_t)-1;
           }
 
-        fvdbg("CMD%d[%08x] R1B=%02x\n",
+        finfo("CMD%d[%08x] R1B=%02x\n",
               cmd->cmd & 0x3f, arg, response);
       }
       break;
@@ -544,7 +544,7 @@ static uint32_t mmcsd_sendcmd(FAR struct mmcsd_slot_s *slot,
 
     case MMCSD_CMDRESP_R1:
       {
-        fvdbg("CMD%d[%08x] R1=%02x\n",
+        finfo("CMD%d[%08x] R1=%02x\n",
               cmd->cmd & 0x3f, arg, response);
       }
       break;
@@ -556,7 +556,7 @@ static uint32_t mmcsd_sendcmd(FAR struct mmcsd_slot_s *slot,
         result  = ((uint32_t)(response & 0xff) << 8);
         result |= SPI_SEND(spi, 0xff) & 0xff;
 
-        fvdbg("CMD%d[%08x] R2=%04x\n",
+        finfo("CMD%d[%08x] R2=%04x\n",
               cmd->cmd & 0x3f, arg, result);
       }
       break;
@@ -570,7 +570,7 @@ static uint32_t mmcsd_sendcmd(FAR struct mmcsd_slot_s *slot,
         slot->ocr |= ((uint32_t)(SPI_SEND(spi, 0xff) & 0xff) << 8);
         slot->ocr |= SPI_SEND(spi, 0xff) & 0xff;
 
-        fvdbg("CMD%d[%08x] R1=%02x OCR=%08x\n",
+        finfo("CMD%d[%08x] R1=%02x OCR=%08x\n",
               cmd->cmd & 0x3f, arg, response, slot->ocr);
       }
       break;
@@ -585,7 +585,7 @@ static uint32_t mmcsd_sendcmd(FAR struct mmcsd_slot_s *slot,
         slot->r7 |= ((uint32_t)(SPI_SEND(spi, 0xff) & 0xff) << 8);
         slot->r7 |= SPI_SEND(spi, 0xff) & 0xff;
 
-        fvdbg("CMD%d[%08x] R1=%02x R7=%08x\n",
+        finfo("CMD%d[%08x] R1=%02x R7=%08x\n",
               cmd->cmd & 0x3f, arg, response, slot->r7);
       }
       break;
@@ -609,11 +609,11 @@ static void mmcsd_setblklen(FAR struct mmcsd_slot_s *slot, uint32_t length)
 {
   uint32_t response;
 
-  fvdbg("Set block length to %d\n", length);
+  finfo("Set block length to %d\n", length);
   response = mmcsd_sendcmd(slot, &g_cmd16, length);
   if (response != MMCSD_SPIR1_OK)
     {
-      fdbg("Failed to set block length: %02x\n", response);
+      ferr("ERROR: Failed to set block length: %02x\n", response);
     }
 }
 
@@ -750,11 +750,11 @@ static void mmcsd_decodecsd(FAR struct mmcsd_slot_s *slot, uint8_t *csd)
       slot->twrite   = SD_WRITEACCESS;
     }
 
-  fvdbg("SPI Frequency\n");
-  fvdbg("  Maximum:         %d Hz\n", maxfrequency);
-  fvdbg("  Actual:          %d Hz\n", frequency);
-  fvdbg("Read access time:  %d ticks\n", slot->taccess);
-  fvdbg("Write access time: %d ticks\n", slot->twrite);
+  finfo("SPI Frequency\n");
+  finfo("  Maximum:         %d Hz\n", maxfrequency);
+  finfo("  Actual:          %d Hz\n", frequency);
+  finfo("Read access time:  %d ticks\n", slot->taccess);
+  finfo("Write access time: %d ticks\n", slot->twrite);
 
   /* Get the physical geometry of the card: sector size and number of
    * sectors. The card's total capacity is computed from
@@ -813,7 +813,7 @@ static void mmcsd_decodecsd(FAR struct mmcsd_slot_s *slot, uint8_t *csd)
     {
       if (readbllen > 9)
         {
-          fdbg("Forcing 512 byte sector size\n");
+          fwarn("WARNING: Forcing 512 byte sector size\n");
           csizemult += (readbllen - 9);
           readbllen  = 9;
         }
@@ -822,8 +822,8 @@ static void mmcsd_decodecsd(FAR struct mmcsd_slot_s *slot, uint8_t *csd)
   slot->sectorsize = 1 << readbllen;
 #endif
   slot->nsectors   = csize << csizemult;
-  fvdbg("Sector size:       %d\n", SECTORSIZE(slot));
-  fvdbg("Number of sectors: %d\n", slot->nsectors);
+  finfo("Sector size:       %d\n", SECTORSIZE(slot));
+  finfo("Number of sectors: %d\n", slot->nsectors);
 }
 
 /****************************************************************************
@@ -880,7 +880,7 @@ static int mmcsd_getcardinfo(FAR struct mmcsd_slot_s *slot, uint8_t *buffer,
   result = mmcsd_sendcmd(slot, cmd, 0);
   if (result != MMCSD_SPIR1_OK)
     {
-      fdbg("CMD9/10 failed: R1=%02x\n", result);
+      ferr("ERROR: CMD9/10 failed: R1=%02x\n", result);
       return -EIO;
     }
 
@@ -889,7 +889,7 @@ static int mmcsd_getcardinfo(FAR struct mmcsd_slot_s *slot, uint8_t *buffer,
   for (i = 0; i < 8; i++)
     {
       response = SPI_SEND(spi, 0xff);
-      fvdbg("%d. SPI send returned %02x\n", i, response);
+      finfo("%d. SPI send returned %02x\n", i, response);
 
       /* If a read operation fails and the card cannot provide the requested
        * data, it will send a data error token instead.  The 4 least
@@ -898,7 +898,7 @@ static int mmcsd_getcardinfo(FAR struct mmcsd_slot_s *slot, uint8_t *buffer,
 
       if (response != 0 && (response & MMCSD_SPIDET_UPPER) == 0)
         {
-          fdbg("%d. Data transfer error: %02x\n", i, response);
+          ferr("ERROR: %d. Data transfer error: %02x\n", i, response);
           return -EIO;
         }
       else if (response == MMCSD_SPIDT_STARTBLKSNGL)
@@ -916,7 +916,7 @@ static int mmcsd_getcardinfo(FAR struct mmcsd_slot_s *slot, uint8_t *buffer,
         }
     }
 
-  fdbg("%d. Did not find start of block\n");
+  ferr("ERROR: %d. Did not find start of block\n");
   return -EIO;
 }
 
@@ -960,7 +960,7 @@ static int mmcsd_recvblock(FAR struct mmcsd_slot_s *slot, uint8_t *buffer,
       return OK;
     }
 
-  fdbg("Did not receive data token (%02x)\n", token);
+  ferr("ERROR: Did not receive data token (%02x)\n", token);
   return ERROR;
 }
 
@@ -1004,7 +1004,7 @@ static int mmcsd_xmitblock(FAR struct mmcsd_slot_s *slot,
   response = SPI_SEND(spi, 0xff);
   if ((response & MMCSD_SPIDR_MASK) != MMCSD_SPIDR_ACCEPTED)
     {
-      fdbg("Bad data response: %02x\n", response);
+      ferr("ERROR: Bad data response: %02x\n", response);
       return -EIO;
     }
 
@@ -1029,12 +1029,12 @@ static int mmcsd_open(FAR struct inode *inode)
   FAR struct spi_dev_s *spi;
   int ret;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!inode || !inode->i_private)
     {
-      fdbg("Internal confusion\n");
+      ferr("ERROR: Internal confusion\n");
       return -EIO;
     }
 #endif
@@ -1044,10 +1044,10 @@ static int mmcsd_open(FAR struct inode *inode)
   slot = (FAR struct mmcsd_slot_s *)inode->i_private;
   spi  = slot->spi;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!spi)
     {
-      fdbg("Internal confusion\n");
+      ferr("ERROR: Internal confusion\n");
       return -EIO;
     }
 #endif
@@ -1067,7 +1067,7 @@ static int mmcsd_open(FAR struct inode *inode)
           ret = mmcsd_mediainitialize(slot);
           if (ret < 0)
             {
-              fvdbg("Failed to initialize card\n");
+              finfo("Failed to initialize card\n");
               goto errout_with_sem;
             }
         }
@@ -1093,7 +1093,7 @@ errout_with_sem:
 
 static int mmcsd_close(FAR struct inode *inode)
 {
-  fvdbg("Entry\n");
+  finfo("Entry\n");
   return OK;
 }
 
@@ -1114,18 +1114,18 @@ static ssize_t mmcsd_read(FAR struct inode *inode, unsigned char *buffer,
   uint8_t  response;
   int    i;
 
-  fvdbg("start_sector=%d nsectors=%d\n", start_sector, nsectors);
+  finfo("start_sector=%d nsectors=%d\n", start_sector, nsectors);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!buffer)
     {
-      fdbg("Invalid parameters\n");
+      ferr("ERROR: Invalid parameters\n");
       return -EINVAL;
     }
 
   if (!inode || !inode->i_private)
     {
-      fdbg("Internal confusion\n");
+      ferr("ERROR: Internal confusion\n");
       return -EIO;
     }
 #endif
@@ -1135,10 +1135,10 @@ static ssize_t mmcsd_read(FAR struct inode *inode, unsigned char *buffer,
   slot = (FAR struct mmcsd_slot_s *)inode->i_private;
   spi  = slot->spi;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!spi)
     {
-      fdbg("Internal confusion\n");
+      ferr("ERROR: Internal confusion\n");
       return -EIO;
     }
 #endif
@@ -1147,7 +1147,7 @@ static ssize_t mmcsd_read(FAR struct inode *inode, unsigned char *buffer,
 
   if (slot->state & MMCSD_SLOTSTATUS_NOTREADY)
     {
-      fdbg("Slot not ready\n");
+      ferr("ERROR: Slot not ready\n");
       return -ENODEV;
     }
 
@@ -1166,12 +1166,12 @@ static ssize_t mmcsd_read(FAR struct inode *inode, unsigned char *buffer,
   if (IS_BLOCK(slot->type))
     {
       offset = start_sector;
-      fvdbg("nbytes=%d sector offset=%d\n", nbytes, offset);
+      finfo("nbytes=%d sector offset=%d\n", nbytes, offset);
     }
   else
     {
       offset = start_sector * SECTORSIZE(slot);
-      fvdbg("nbytes=%d byte offset=%d\n", nbytes, offset);
+      finfo("nbytes=%d byte offset=%d\n", nbytes, offset);
     }
 
   /* Select the slave */
@@ -1190,7 +1190,7 @@ static ssize_t mmcsd_read(FAR struct inode *inode, unsigned char *buffer,
       response = mmcsd_sendcmd(slot, &g_cmd17, offset);
       if (response != MMCSD_SPIR1_OK)
         {
-          fdbg("CMD17 failed: R1=%02x\n", response);
+          ferr("ERROR: CMD17 failed: R1=%02x\n", response);
           goto errout_with_eio;
         }
 
@@ -1198,7 +1198,7 @@ static ssize_t mmcsd_read(FAR struct inode *inode, unsigned char *buffer,
 
       if (mmcsd_recvblock(slot, buffer, SECTORSIZE(slot)) != 0)
         {
-          fdbg("Failed: to receive the block\n");
+          ferr("ERROR: Failed: to receive the block\n");
           goto errout_with_eio;
         }
     }
@@ -1211,7 +1211,7 @@ static ssize_t mmcsd_read(FAR struct inode *inode, unsigned char *buffer,
       response = mmcsd_sendcmd(slot, &g_cmd18, offset);
       if (response != MMCSD_SPIR1_OK)
         {
-          fdbg("CMD18 failed: R1=%02x\n", response);
+          ferr("ERROR: CMD18 failed: R1=%02x\n", response);
           goto errout_with_eio;
         }
 
@@ -1221,7 +1221,7 @@ static ssize_t mmcsd_read(FAR struct inode *inode, unsigned char *buffer,
         {
           if (mmcsd_recvblock(slot, buffer, SECTORSIZE(slot)) != 0)
             {
-              fdbg("Failed: to receive the block\n");
+              ferr("ERROR: Failed: to receive the block\n");
               goto errout_with_eio;
             }
 
@@ -1239,7 +1239,7 @@ static ssize_t mmcsd_read(FAR struct inode *inode, unsigned char *buffer,
   SPI_SEND(spi, 0xff);
   mmcsd_semgive(slot);
 
-  fvdbg("Read %d bytes:\n", nbytes);
+  finfo("Read %d bytes:\n", nbytes);
   mmcsd_dumpbuffer("Read buffer", buffer, nbytes);
   return nsectors;
 
@@ -1268,18 +1268,18 @@ static ssize_t mmcsd_write(FAR struct inode *inode, const unsigned char *buffer,
   uint8_t response;
   int i;
 
-  fvdbg("start_sector=%d nsectors=%d\n", start_sector, nsectors);
+  finfo("start_sector=%d nsectors=%d\n", start_sector, nsectors);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!buffer)
     {
-      fdbg("Invalid parameters\n");
+      ferr("ERROR: Invalid parameters\n");
       return -EINVAL;
     }
 
   if (!inode || !inode->i_private)
     {
-      fdbg("Internal confusion\n");
+      ferr("ERROR: Internal confusion\n");
       return -EIO;
     }
 #endif
@@ -1289,10 +1289,10 @@ static ssize_t mmcsd_write(FAR struct inode *inode, const unsigned char *buffer,
   slot = (FAR struct mmcsd_slot_s *)inode->i_private;
   spi  = slot->spi;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!spi)
     {
-      fdbg("Internal confusion\n");
+      ferr("ERROR: Internal confusion\n");
       return -EIO;
     }
 #endif
@@ -1301,7 +1301,7 @@ static ssize_t mmcsd_write(FAR struct inode *inode, const unsigned char *buffer,
 
   if (slot->state & MMCSD_SLOTSTATUS_NOTREADY)
     {
-      fdbg("Slot not ready\n");
+      ferr("ERROR: Slot not ready\n");
       return -ENODEV;
     }
 
@@ -1309,7 +1309,7 @@ static ssize_t mmcsd_write(FAR struct inode *inode, const unsigned char *buffer,
 
   if (slot->state & MMCSD_SLOTSTATUS_WRPROTECT)
     {
-      fdbg("Not write enabled\n");
+      ferr("ERROR: Not write enabled\n");
       return -EACCES;
     }
 
@@ -1328,12 +1328,12 @@ static ssize_t mmcsd_write(FAR struct inode *inode, const unsigned char *buffer,
   if (IS_BLOCK(slot->type))
     {
       offset = start_sector;
-      fvdbg("nbytes=%d sector offset=%d\n", nbytes, offset);
+      finfo("nbytes=%d sector offset=%d\n", nbytes, offset);
     }
   else
     {
       offset = start_sector * SECTORSIZE(slot);
-      fvdbg("nbytes=%d byte offset=%d\n", nbytes, offset);
+      finfo("nbytes=%d byte offset=%d\n", nbytes, offset);
     }
 
   mmcsd_dumpbuffer("Write buffer", buffer, nbytes);
@@ -1352,7 +1352,7 @@ static ssize_t mmcsd_write(FAR struct inode *inode, const unsigned char *buffer,
       response = mmcsd_sendcmd(slot, &g_cmd24, offset);
       if (response != MMCSD_SPIR1_OK)
         {
-          fdbg("CMD24 failed: R1=%02x\n", response);
+          ferr("ERROR: CMD24 failed: R1=%02x\n", response);
           goto errout_with_sem;
         }
 
@@ -1360,7 +1360,7 @@ static ssize_t mmcsd_write(FAR struct inode *inode, const unsigned char *buffer,
 
       if (mmcsd_xmitblock(slot, buffer, SECTORSIZE(slot), 0xfe) != 0)
         {
-          fdbg("Block transfer failed\n");
+          ferr("ERROR: Block transfer failed\n");
           goto errout_with_sem;
         }
     }
@@ -1373,14 +1373,14 @@ static ssize_t mmcsd_write(FAR struct inode *inode, const unsigned char *buffer,
           response = mmcsd_sendcmd(slot, &g_cmd55, 0);
           if (response != MMCSD_SPIR1_OK)
             {
-              fdbg("CMD55 failed: R1=%02x\n", response);
+              ferr("ERROR: CMD55 failed: R1=%02x\n", response);
               goto errout_with_sem;
             }
 
           response = mmcsd_sendcmd(slot, &g_acmd23, nsectors);
           if (response != MMCSD_SPIR1_OK)
             {
-              fdbg("ACMD23 failed: R1=%02x\n", response);
+              ferr("ERROR: ACMD23 failed: R1=%02x\n", response);
               goto errout_with_sem;
             }
        }
@@ -1392,7 +1392,7 @@ static ssize_t mmcsd_write(FAR struct inode *inode, const unsigned char *buffer,
       response = mmcsd_sendcmd(slot, &g_cmd25, offset);
       if (response != MMCSD_SPIR1_OK)
         {
-          fdbg("CMD25 failed: R1=%02x\n", response);
+          ferr("ERROR: CMD25 failed: R1=%02x\n", response);
           goto errout_with_sem;
         }
 
@@ -1402,14 +1402,14 @@ static ssize_t mmcsd_write(FAR struct inode *inode, const unsigned char *buffer,
         {
           if (mmcsd_xmitblock(slot, buffer, SECTORSIZE(slot), 0xfc) != 0)
             {
-              fdbg("Failed: to receive the block\n");
+              ferr("ERROR: Failed: to receive the block\n");
               goto errout_with_sem;
             }
           buffer += SECTORSIZE(slot);
 
           if (mmcsd_waitready(slot) != OK)
             {
-              fdbg("Failed: card is busy\n");
+              ferr("ERROR: Failed: card is busy\n");
               goto errout_with_sem;
             }
         }
@@ -1452,16 +1452,16 @@ static int mmcsd_geometry(FAR struct inode *inode, struct geometry *geometry)
   uint8_t csd[16];
   int ret;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!geometry)
     {
-      fdbg("Invalid parameters\n");
+      ferr("ERROR: Invalid parameters\n");
       return -EINVAL;
     }
 
   if (!inode || !inode->i_private)
     {
-      fdbg("Internal confusion\n");
+      ferr("ERROR: Internal confusion\n");
       return -EIO;
     }
 #endif
@@ -1471,10 +1471,10 @@ static int mmcsd_geometry(FAR struct inode *inode, struct geometry *geometry)
   slot = (FAR struct mmcsd_slot_s *)inode->i_private;
   spi  = slot->spi;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!spi)
     {
-      fdbg("Internal confusion\n");
+      ferr("ERROR: Internal confusion\n");
       return -EIO;
     }
 #endif
@@ -1489,7 +1489,7 @@ static int mmcsd_geometry(FAR struct inode *inode, struct geometry *geometry)
   if (ret < 0)
     {
       mmcsd_semgive(slot);
-      fdbg("mmcsd_getcsd returned %d\n", ret);
+      ferr("ERROR: mmcsd_getcsd returned %d\n", ret);
       return ret;
     }
 
@@ -1519,11 +1519,11 @@ static int mmcsd_geometry(FAR struct inode *inode, struct geometry *geometry)
   slot->state &= ~MMCSD_SLOTSTATUS_MEDIACHGD;
   mmcsd_semgive(slot);
 
-  fvdbg("geo_available:     %d\n", geometry->geo_available);
-  fvdbg("geo_mediachanged:  %d\n", geometry->geo_mediachanged);
-  fvdbg("geo_writeenabled:  %d\n", geometry->geo_writeenabled);
-  fvdbg("geo_nsectors:      %d\n", geometry->geo_nsectors);
-  fvdbg("geo_sectorsize:    %d\n", geometry->geo_sectorsize);
+  finfo("geo_available:     %d\n", geometry->geo_available);
+  finfo("geo_mediachanged:  %d\n", geometry->geo_mediachanged);
+  finfo("geo_writeenabled:  %d\n", geometry->geo_writeenabled);
+  finfo("geo_nsectors:      %d\n", geometry->geo_nsectors);
+  finfo("geo_sectorsize:    %d\n", geometry->geo_sectorsize);
 
   return OK;
 }
@@ -1566,7 +1566,7 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
 
   if ((SPI_STATUS(spi, SPIDEV_MMCSD) & SPI_STATUS_PRESENT) == 0)
     {
-      fdbg("No card present\n");
+      fwarn("WARNING: No card present\n");
       slot->state |= MMCSD_SLOTSTATUS_NODISK;
       return -ENODEV;
     }
@@ -1601,14 +1601,14 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
        * show IDLE STATE
        */
 
-      fvdbg("Send CMD0\n");
+      finfo("Send CMD0\n");
       SPI_SELECT(spi, SPIDEV_MMCSD, true);
       result = mmcsd_sendcmd(slot, &g_cmd0, 0);
       if (result == MMCSD_SPIR1_IDLESTATE)
         {
           /* Break out of the loop with card selected */
 
-          fvdbg("Card is in IDLE state\n");
+          finfo("Card is in IDLE state\n");
           break;
         }
 
@@ -1621,7 +1621,7 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
 
   if (result != MMCSD_SPIR1_IDLESTATE)
     {
-      fdbg("Send CMD0 failed: R1=%02x\n", result);
+      ferr("ERROR: Send CMD0 failed: R1=%02x\n", result);
       SPI_SELECT(spi, SPIDEV_MMCSD, false);
       mmcsd_semgive(slot);
       return -EIO;
@@ -1633,7 +1633,7 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
    * MMC.
    */
 
-  fvdbg("Send CMD8\n");
+  finfo("Send CMD8\n");
   result = mmcsd_sendcmd(slot, &g_cmd8, 0x1aa);
   if (result == MMCSD_SPIR1_IDLESTATE)
     {
@@ -1650,7 +1650,7 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
           elapsed = 0;
           do
             {
-              fvdbg("%d. Send CMD55/ACMD41\n", elapsed);
+              finfo("%d. Send CMD55/ACMD41\n", elapsed);
               result = mmcsd_sendcmd(slot, &g_cmd55, 0);
               if (result == MMCSD_SPIR1_IDLESTATE || result == MMCSD_SPIR1_OK)
                 {
@@ -1669,21 +1669,21 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
 
           if (elapsed < MMCSD_DELAY_1SEC)
            {
-             fvdbg("Send CMD58\n");
+             finfo("Send CMD58\n");
 
              SPI_SEND(spi, 0xff);
              result = mmcsd_sendcmd(slot, &g_cmd58, 0);
              if (result == MMCSD_SPIR1_OK)
                {
-                  fvdbg("OCR: %08x\n", slot->ocr);
+                  finfo("OCR: %08x\n", slot->ocr);
                   if ((slot->ocr & MMCSD_OCR_CCS) != 0)
                     {
-                      fdbg("Identified SD ver2 card/with block access\n");
+                      finfo("Identified SD ver2 card/with block access\n");
                       slot->type = MMCSD_CARDTYPE_SDV2 | MMCSD_CARDTYPE_BLOCK;
                     }
                   else
                     {
-                      fdbg("Identified SD ver2 card\n");
+                      finfo("Identified SD ver2 card\n");
                       slot->type = MMCSD_CARDTYPE_SDV2;
                     }
                }
@@ -1697,7 +1697,7 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
     {
       /* Both the MMC card and the SD card support CMD55 */
 
-      fvdbg("Send CMD55/ACMD41\n");
+      finfo("Send CMD55/ACMD41\n");
       result = mmcsd_sendcmd(slot, &g_cmd55, 0);
       if (result == MMCSD_SPIR1_IDLESTATE || result == MMCSD_SPIR1_OK)
         {
@@ -1706,7 +1706,7 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
           result = mmcsd_sendcmd(slot, &g_acmd41, 0);
           if (result == MMCSD_SPIR1_IDLESTATE || result == MMCSD_SPIR1_OK)
             {
-              fdbg("Identified SD ver1 card\n");
+              finfo("Identified SD ver1 card\n");
               slot->type = MMCSD_CARDTYPE_SDV1;
             }
         }
@@ -1719,7 +1719,7 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
         {
           if (IS_SD(slot->type))
             {
-              fvdbg("%d. Send CMD55/ACMD41\n", elapsed);
+              finfo("%d. Send CMD55/ACMD41\n", elapsed);
               result = mmcsd_sendcmd(slot, &g_cmd55, 0);
               if (result == MMCSD_SPIR1_IDLESTATE || result == MMCSD_SPIR1_OK)
                 {
@@ -1732,11 +1732,11 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
             }
           else
             {
-              fvdbg("%d. Send CMD1\n", i);
+              finfo("%d. Send CMD1\n", i);
               result = mmcsd_sendcmd(slot, &g_cmd1, 0);
               if (result == MMCSD_SPIR1_OK)
                 {
-                   fdbg("%d. Identified MMC card\n", i);
+                   finfo("%d. Identified MMC card\n", i);
                    slot->type = MMCSD_CARDTYPE_MMC;
                    break;
                 }
@@ -1748,7 +1748,7 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
 
       if (elapsed >= MMCSD_DELAY_1SEC)
         {
-          fdbg("Failed to exit IDLE state\n");
+          ferr("ERROR: Failed to exit IDLE state\n");
           SPI_SELECT(spi, SPIDEV_MMCSD, false);
           mmcsd_semgive(slot);
           return -EIO;
@@ -1757,7 +1757,7 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
 
   if (slot->type == MMCSD_CARDTYPE_UNKNOWN)
     {
-      fdbg("Failed to identify card\n");
+      ferr("ERROR: Failed to identify card\n");
       SPI_SELECT(spi, SPIDEV_MMCSD, false);
       mmcsd_semgive(slot);
       return -EIO;
@@ -1765,11 +1765,11 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
 
   /* Read CSD. CSD must always be valid */
 
-  fvdbg("Get CSD\n");
+  finfo("Get CSD\n");
   result = mmcsd_getcsd(slot, csd);
   if (result != OK)
     {
-      fdbg("mmcsd_getcsd(CMD9) failed: %d\n", result);
+      ferr("ERROR: mmcsd_getcsd(CMD9) failed: %d\n", result);
       SPI_SELECT(spi, SPIDEV_MMCSD, false);
       mmcsd_semgive(slot);
       return -EIO;
@@ -1833,10 +1833,10 @@ static void mmcsd_mediachanged(void *arg)
   uint8_t oldstate;
   int ret;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!slot || !slot->spi)
     {
-      fdbg("Internal confusion\n");
+      ferr("ERROR: Internal confusion\n");
       return;
     }
 #endif
@@ -1857,7 +1857,7 @@ static void mmcsd_mediachanged(void *arg)
     {
       /* Media is not present */
 
-      fdbg("No card present\n");
+      fwarn("WARNING: No card present\n");
       slot->state |= (MMCSD_SLOTSTATUS_NODISK | MMCSD_SLOTSTATUS_NOTREADY);
 
       /* Was media removed? */
@@ -1879,7 +1879,7 @@ static void mmcsd_mediachanged(void *arg)
       ret = mmcsd_mediainitialize(slot);
       if (ret == 0)
         {
-          fvdbg("mmcsd_mediainitialize returned OK\n");
+          finfo("mmcsd_mediainitialize returned OK\n");
           slot->state |= MMCSD_SLOTSTATUS_MEDIACHGD;
         }
     }
@@ -1915,10 +1915,10 @@ int mmcsd_spislotinitialize(int minor, int slotno, FAR struct spi_dev_s *spi)
   char devname[16];
   int ret;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if ((unsigned)slotno >= CONFIG_MMCSD_NSLOTS || (unsigned)minor > 255 || !spi)
     {
-      fdbg("Invalid arguments\n");
+      ferr("ERROR: Invalid arguments\n");
       return -EINVAL;
     }
 #endif
@@ -1929,10 +1929,10 @@ int mmcsd_spislotinitialize(int minor, int slotno, FAR struct spi_dev_s *spi)
   memset(slot, 0, sizeof(struct mmcsd_slot_s));
   sem_init(&slot->sem, 0, 1);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (slot->spi)
     {
-      fdbg("Already registered\n");
+      ferr("ERROR: Already registered\n");
       return -EBUSY;
     }
 #endif
@@ -1954,7 +1954,7 @@ int mmcsd_spislotinitialize(int minor, int slotno, FAR struct spi_dev_s *spi)
   mmcsd_semgive(slot);
   if (ret == 0)
     {
-      fvdbg("mmcsd_mediainitialize returned OK\n");
+      finfo("mmcsd_mediainitialize returned OK\n");
       slot->state |= MMCSD_SLOTSTATUS_MEDIACHGD;
     }
 
@@ -1969,7 +1969,7 @@ int mmcsd_spislotinitialize(int minor, int slotno, FAR struct spi_dev_s *spi)
   ret = register_blockdriver(devname, &g_bops, MMCSD_MODE, slot);
   if (ret < 0)
     {
-      fdbg("register_blockdriver failed: %d\n", -ret);
+      ferr("ERROR: register_blockdriver failed: %d\n", -ret);
       slot->spi = NULL;
       return ret;
     }
diff --git a/drivers/modem/u-blox.c b/drivers/modem/u-blox.c
index 05e4453ba963f077f2116cd298656a568d07cbdc..95a7fc29d28f5f0f288c9e06895c765faa0f980e 100644
--- a/drivers/modem/u-blox.c
+++ b/drivers/modem/u-blox.c
@@ -54,19 +54,16 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
 /* Debug ********************************************************************/
 /* Non-standard debug that may be enabled just for testing the modem driver */
 
 #ifdef CONFIG_MODEM_U_BLOX_DEBUG
-#  define m_dbg    dbg
-#  define m_vdbg   vdbg
-#  define m_vlldbg  lldbg
-#  define m_vllvdbg llvdbg
+#  define m_err     _err
+#  define m_info    _info
 #else
-#  define m_dbg(x...)
-#  define m_vdbg(x...)
-#  define m_lldbg(x...)
-#  define m_llvdbg(x...)
+#  define m_err(x...)
+#  define m_info(x...)
 #endif
 
 /****************************************************************************
@@ -149,7 +146,7 @@ static int ubxmdm_ioctl(FAR struct file* filep,
   int                       ret;
   FAR struct ubxmdm_status* status;
 
-  m_vdbg("cmd: %d arg: %ld\n", cmd, arg);
+  m_info("cmd: %d arg: %ld\n", cmd, arg);
   DEBUGASSERT(upper && lower);
 
   switch (cmd)
@@ -235,7 +232,7 @@ static int ubxmdm_ioctl(FAR struct file* filep,
        */
 
     default:
-      m_vdbg("Forwarding unrecognized cmd: %d arg: %ld\n", cmd, arg);
+      m_info("Forwarding unrecognized cmd: %d arg: %ld\n", cmd, arg);
 
       if (lower->ops->ioctl)
         {
@@ -286,7 +283,7 @@ FAR void* ubxmdm_register(FAR const char *path,
     kmm_zalloc(sizeof(struct ubxmdm_upper));
   if (!upper)
     {
-      m_dbg("Upper half allocation failed\n");
+      m_err("ERROR: Upper half allocation failed\n");
       goto errout;
     }
 
@@ -294,14 +291,14 @@ FAR void* ubxmdm_register(FAR const char *path,
   upper->path = strdup(path);
   if (!upper->path)
     {
-      m_dbg("Path allocation failed\n");
+      m_err("ERROR: Path allocation failed\n");
       goto errout_with_upper;
     }
 
   ret = register_driver(path, &ubxmdm_fops, 0666, upper);
   if (ret < 0)
     {
-      m_dbg("register_driver failed: %d\n", ret);
+      m_err("ERROR: register_driver failed: %d\n", ret);
       goto errout_with_path;
     }
 
@@ -326,7 +323,7 @@ void ubxmdm_unregister(FAR void *handle)
   lower = upper->lower;
   DEBUGASSERT(upper && lower);
 
-  m_vdbg("Unregistering: %s\n", upper->path);
+  m_info("Unregistering: %s\n", upper->path);
 
   DEBUGASSERT(lower->ops->poweroff);
   (void) lower->ops->poweroff(lower);
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index a15c01d7f6a2c37295234edb98a4d2b77e5d50fe..ba45d0f512304984e462097d968eec8500964f72 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -397,6 +397,23 @@ config AT45DB_PWRSAVE
 
 endif # MTD_AT45DB
 
+config MTD_IS25XP
+	bool "SPI-based IS25XP FLASH"
+	default n
+	select SPI
+
+if MTD_IS25XP
+
+config IS25XP_SPIMODE
+	int "IS25 SPI Mode"
+	default 0
+
+config IS25XP_SPIFREQUENCY
+	int "IS25 SPI Frequency"
+	default 20000000
+
+endif # MTD_IS25XP
+
 config MTD_M25P
 	bool "SPI-based M25P FLASH"
 	default n
@@ -439,6 +456,41 @@ config M25P_SUBSECTOR_ERASE
 
 endif # MTD_M25P
 
+config MTD_MX25L
+	bool "SPI-based MX25L3233F / MX25L6433F"
+	default n
+	select SPI
+	---help---
+		SPI-based driver for Macronix MX25L3233F or MX25L6433F.
+
+if MTD_MX25L
+
+config MX25L_SPIMODE
+	int "MX25L SPI mode"
+	default 0
+
+config MX25L_SPIFREQUENCY
+	int "MX25L SPI Frequency"
+	default 20000000
+
+config MX25L_SECTOR512
+	bool "Simulate 512 byte Erase Blocks"
+	default n
+
+config MX25L_SUBSECTOR_ERASE
+	bool "Sub-Sector Erase"
+	default n
+	---help---
+		Some devices (such as the EON EN25F80) support a smaller erase block
+		size (4K vs 64K).  This option enables support for sub-sector erase.
+		The SMART file system can take advantage of this option if it is enabled.
+
+config MX25L_DEBUG
+	bool "Enable driver debug features"
+	default n
+
+endif # MTD_MX25L
+
 config MTD_S25FL1
 	bool "QuadSPI-based S25FL1 FLASH"
 	default n
@@ -496,7 +548,6 @@ config MTD_N25QXXX
 	default n
 	---help---
 		Support the N25Q016A, N25Q032A, N25Q064A, N25Q128A, N25Q256A
-		
 
 if MTD_N25QXXX
 
diff --git a/drivers/mtd/Make.defs b/drivers/mtd/Make.defs
index 1d1ba6d26b75d6aad733dd93f45b911a1257dca9..bef1779f7a655f7f7d0ac67a212bd70de1df3fb7 100644
--- a/drivers/mtd/Make.defs
+++ b/drivers/mtd/Make.defs
@@ -39,7 +39,7 @@
 
 ifeq ($(CONFIG_MTD),y)
 
-CSRCS += at45db.c flash_eraseall.c ftl.c m25px.c ramtron.c mtd_config.c
+CSRCS += at45db.c ftl.c ramtron.c mtd_config.c
 
 ifeq ($(CONFIG_MTD_PARTITION),y)
 CSRCS += mtd_partition.c
@@ -104,6 +104,14 @@ ifeq ($(CONFIG_MTD_AT25),y)
 CSRCS += at25.c
 endif
 
+ifeq ($(CONFIG_MTD_M25P),y)
+CSRCS += m25px.c
+endif
+
+ifeq ($(CONFIG_MTD_MX25L),y)
+CSRCS += mx25lx.c
+endif
+
 ifeq ($(CONFIG_MTD_S25FL1),y)
 CSRCS += s25fl1.c
 endif
@@ -112,6 +120,10 @@ ifeq ($(CONFIG_MTD_N25QXXX),y)
 CSRCS += n25qxxx.c
 endif
 
+ifeq ($(CONFIG_MTD_IS25XP),y)
+CSRCS += is25xp.c
+endif
+
 ifeq ($(CONFIG_MTD_SMART),y)
 ifeq ($(CONFIG_FS_SMARTFS),y)
 CSRCS += smart.c
diff --git a/drivers/mtd/at24xx.c b/drivers/mtd/at24xx.c
index 76d2cf2659341ab54208212f18f5fe01f4350960..936008a567212bea12ee4a9d1878e27593bd9e2e 100644
--- a/drivers/mtd/at24xx.c
+++ b/drivers/mtd/at24xx.c
@@ -139,6 +139,10 @@
 #  define CONFIG_AT24XX_MTD_BLOCKSIZE AT24XX_PAGESIZE
 #endif
 
+#ifndef CONFIG_AT24XX_TIMEOUT_MS
+#  define CONFIG_AT24XX_TIMEOUT_MS 10
+#endif
+
 /************************************************************************************
  * Private Types
  ************************************************************************************/
@@ -252,6 +256,7 @@ static int at24c_eraseall(FAR struct at24c_dev_s *priv)
 {
   uint8_t buf[AT24XX_PAGESIZE + AT24XX_ADDRSIZE];
   int startblock = 0;
+  uint16_t wait;
 
   memset(&buf[AT24XX_ADDRSIZE], 0xff, priv->pagesize);
 
@@ -269,8 +274,15 @@ static int at24c_eraseall(FAR struct at24c_dev_s *priv)
       at24addr = (priv->addr | ((offset >> 8) & 0x07));
 #endif
 
+      wait = CONFIG_AT24XX_TIMEOUT_MS;
       while (at24c_i2c_write(priv, at24addr, buf, AT24XX_ADDRSIZE) < 0)
         {
+          finfo("wait\n");
+          if (!wait--) 
+            {
+              return -ETIMEDOUT;
+            }
+
           usleep(1000);
         }
 
@@ -301,8 +313,9 @@ static ssize_t at24c_read_internal(FAR struct at24c_dev_s *priv, off_t offset,
 {
   uint8_t buf[AT24XX_ADDRSIZE];
   uint16_t at24addr;
+  uint16_t wait;
 
-  fvdbg("offset: %lu nbytes: %lu address: %02x\n",
+  finfo("offset: %lu nbytes: %lu address: %02x\n",
         (unsigned long)offset, (unsigned long)nbytes, address);
 
   /* "Random Read: A Random Read requires a dummy byte write sequence to load in the
@@ -327,9 +340,15 @@ static ssize_t at24c_read_internal(FAR struct at24c_dev_s *priv, off_t offset,
   at24addr = (address | ((offset >> 8) & 0x07));
 #endif
 
+  wait = CONFIG_AT24XX_TIMEOUT_MS;
   while (at24c_i2c_write(priv, at24addr, buf, AT24XX_ADDRSIZE) < 0)
     {
-      fvdbg("wait\n");
+      finfo("wait\n");
+      if (!wait--) 
+        {
+          return -ETIMEDOUT;
+        }
+
       usleep(1000);
     }
 
@@ -356,7 +375,7 @@ static ssize_t at24c_bread(FAR struct mtd_dev_s *dev, off_t startblock,
   nblocks    *= (CONFIG_AT24XX_MTD_BLOCKSIZE / AT24XX_PAGESIZE);
 #endif
 
-  fvdbg("startblock: %08lx nblocks: %lu\n",
+  finfo("startblock: %08lx nblocks: %lu\n",
         (unsigned long)startblock, (unsigned long)nblocks);
 
   if (startblock >= priv->npages)
@@ -410,6 +429,7 @@ static ssize_t at24c_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t
   FAR struct at24c_dev_s *priv = (FAR struct at24c_dev_s *)dev;
   size_t blocksleft;
   uint8_t buf[AT24XX_PAGESIZE + AT24XX_ADDRSIZE];
+  uint16_t wait;
 
 #if CONFIG_AT24XX_MTD_BLOCKSIZE > AT24XX_PAGESIZE
   startblock *= (CONFIG_AT24XX_MTD_BLOCKSIZE / AT24XX_PAGESIZE);
@@ -427,7 +447,7 @@ static ssize_t at24c_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t
       nblocks = priv->npages - startblock;
     }
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   while (blocksleft-- > 0)
     {
@@ -443,9 +463,15 @@ static ssize_t at24c_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t
       at24addr = (priv->addr | ((offset >> 8) & 0x07));
 #endif
 
+      wait = CONFIG_AT24XX_TIMEOUT_MS;
       while (at24c_i2c_write(priv, at24addr, buf, AT24XX_ADDRSIZE) < 0)
         {
-          fvdbg("wait\n");
+          finfo("wait\n");
+          if (!wait--) 
+            {
+              return -ETIMEDOUT;
+            }
+
           usleep(1000);
         }
 
@@ -474,7 +500,7 @@ static ssize_t at24c_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes
   size_t  memsize;
   uint8_t addr;
 
-  fvdbg("offset: %lu nbytes: %lu\n", (unsigned long)offset, (unsigned long)nbytes);
+  finfo("offset: %lu nbytes: %lu\n", (unsigned long)offset, (unsigned long)nbytes);
 
   /* Don't permit reads beyond the end of the memory region */
 
@@ -520,7 +546,7 @@ static int at24c_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
   FAR struct at24c_dev_s *priv = (FAR struct at24c_dev_s *)dev;
   int ret = -EINVAL; /* Assume good command with bad parameters */
 
-  fvdbg("cmd: %d \n", cmd);
+  finfo("cmd: %d \n", cmd);
 
   switch (cmd)
     {
@@ -561,7 +587,7 @@ static int at24c_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
 #endif
               ret               = OK;
 
-              fvdbg("blocksize: %d erasesize: %d neraseblocks: %d\n",
+              finfo("blocksize: %d erasesize: %d neraseblocks: %d\n",
                     geo->blocksize, geo->erasesize, geo->neraseblocks);
             }
         }
@@ -610,7 +636,7 @@ FAR struct mtd_dev_s *at24c_initialize(FAR struct i2c_master_s *dev)
   FAR struct at24c_dev_s *priv;
 
 #ifdef CONFIG_AT24XX_MULTI
-  fvdbg("dev: %p address: %02x\n", dev, address);
+  finfo("dev: %p address: %02x\n", dev, address);
 
   /* Allocate a state structure (we allocate the structure instead of using
    * a fixed, static allocation so that we can handle multiple FLASH devices.
@@ -622,12 +648,12 @@ FAR struct mtd_dev_s *at24c_initialize(FAR struct i2c_master_s *dev)
   priv = (FAR struct at24c_dev_s *)kmm_zalloc(sizeof(struct at24c_dev_s));
   if (priv == NULL)
     {
-      fdbg("ERROR: Failed to allocate device structure\n");
+      ferr("ERROR: Failed to allocate device structure\n");
       return NULL;
     }
 
 #else
-  fvdbg("dev: %p\n", dev);
+  finfo("dev: %p\n", dev);
 
   /* If only a signal AT24 part is supported then a statically allocated state
    * structure is used.
@@ -669,7 +695,7 @@ FAR struct mtd_dev_s *at24c_initialize(FAR struct i2c_master_s *dev)
 
   /* Return the implementation-specific state structure as the MTD device */
 
-  fvdbg("Return %p\n", priv);
+  finfo("Return %p\n", priv);
   return (FAR struct mtd_dev_s *)priv;
 }
 
diff --git a/drivers/mtd/at25.c b/drivers/mtd/at25.c
index e085ca8b89bb25de7861e981d34942d31f6f202b..777ff3877f328081bb79e550f3cf8bf0514e05be 100644
--- a/drivers/mtd/at25.c
+++ b/drivers/mtd/at25.c
@@ -213,7 +213,7 @@ static inline int at25_readid(struct at25_dev_s *priv)
   uint16_t manufacturer;
   uint16_t memory;
 
-  fvdbg("priv: %p\n", priv);
+  finfo("priv: %p\n", priv);
 
   /* Lock the SPI bus, configure the bus, and select this FLASH part. */
 
@@ -231,7 +231,7 @@ static inline int at25_readid(struct at25_dev_s *priv)
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
   at25_unlock(priv->dev);
 
-  fvdbg("manufacturer: %02x memory: %02x\n",
+  finfo("manufacturer: %02x memory: %02x\n",
         manufacturer, memory);
 
   /* Check for a valid manufacturer and memory type */
@@ -292,10 +292,10 @@ static void at25_waitwritecomplete(struct at25_dev_s *priv)
 
   if (status & AT25_SR_EPE)
     {
-      fdbg("ERROR: Write error, status: 0x%02x\n", status);
+      ferr("ERROR: Write error, status: 0x%02x\n", status);
     }
 
-  fvdbg("Complete, status: 0x%02x\n", status);
+  finfo("Complete, status: 0x%02x\n", status);
 }
 
 /************************************************************************************
@@ -307,7 +307,7 @@ static void at25_writeenable(struct at25_dev_s *priv)
   SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
   (void)SPI_SEND(priv->dev, AT25_WREN);
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
-  fvdbg("Enabled\n");
+  finfo("Enabled\n");
 }
 
 /************************************************************************************
@@ -318,7 +318,7 @@ static inline void at25_sectorerase(struct at25_dev_s *priv, off_t sector)
 {
   off_t offset = sector << priv->sectorshift;
 
-  fvdbg("sector: %08lx\n", (long)sector);
+  finfo("sector: %08lx\n", (long)sector);
 
   /* Wait for any preceding write to complete.  We could simplify things by
    * perform this wait at the end of each write operation (rather than at
@@ -352,7 +352,7 @@ static inline void at25_sectorerase(struct at25_dev_s *priv, off_t sector)
   /* Deselect the FLASH */
 
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
-  fvdbg("Erased\n");
+  finfo("Erased\n");
 }
 
 /************************************************************************************
@@ -361,7 +361,7 @@ static inline void at25_sectorerase(struct at25_dev_s *priv, off_t sector)
 
 static inline int at25_bulkerase(struct at25_dev_s *priv)
 {
-  fvdbg("priv: %p\n", priv);
+  finfo("priv: %p\n", priv);
 
   /* Wait for any preceding write to complete.  We could simplify things by
    * perform this wait at the end of each write operation (rather than at
@@ -386,7 +386,7 @@ static inline int at25_bulkerase(struct at25_dev_s *priv)
   /* Deselect the FLASH */
 
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
-  fvdbg("Return: OK\n");
+  finfo("Return: OK\n");
   return OK;
 }
 
@@ -399,7 +399,7 @@ static inline void at25_pagewrite(struct at25_dev_s *priv, FAR const uint8_t *bu
 {
   off_t offset = page << 8;
 
-  fvdbg("page: %08lx offset: %08lx\n", (long)page, (long)offset);
+  finfo("page: %08lx offset: %08lx\n", (long)page, (long)offset);
 
   /* Wait for any preceding write to complete.  We could simplify things by
    * perform this wait at the end of each write operation (rather than at
@@ -434,7 +434,7 @@ static inline void at25_pagewrite(struct at25_dev_s *priv, FAR const uint8_t *bu
   /* Deselect the FLASH: Chip Select high */
 
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
-  fvdbg("Written\n");
+  finfo("Written\n");
 }
 
 /************************************************************************************
@@ -446,7 +446,7 @@ static int at25_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblock
   FAR struct at25_dev_s *priv = (FAR struct at25_dev_s *)dev;
   size_t blocksleft = nblocks;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* Lock access to the SPI bus until we complete the erase */
 
@@ -473,7 +473,7 @@ static ssize_t at25_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t nb
   FAR struct at25_dev_s *priv = (FAR struct at25_dev_s *)dev;
   ssize_t nbytes;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* On this device, we can handle the block read just like the byte-oriented read */
 
@@ -496,7 +496,7 @@ static ssize_t at25_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t n
   FAR struct at25_dev_s *priv = (FAR struct at25_dev_s *)dev;
   size_t blocksleft = nblocks;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* Lock the SPI bus and write each page to FLASH */
 
@@ -522,7 +522,7 @@ static ssize_t at25_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
 {
   FAR struct at25_dev_s *priv = (FAR struct at25_dev_s *)dev;
 
-  fvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+  finfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
 
   /* Wait for any preceding write to complete.  We could simplify things by
    * perform this wait at the end of each write operation (rather than at
@@ -556,7 +556,7 @@ static ssize_t at25_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
   at25_unlock(priv->dev);
 
-  fvdbg("return nbytes: %d\n", (int)nbytes);
+  finfo("return nbytes: %d\n", (int)nbytes);
   return nbytes;
 }
 
@@ -569,7 +569,7 @@ static int at25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
   FAR struct at25_dev_s *priv = (FAR struct at25_dev_s *)dev;
   int ret = -EINVAL; /* Assume good command with bad parameters */
 
-  fvdbg("cmd: %d \n", cmd);
+  finfo("cmd: %d \n", cmd);
 
   switch (cmd)
     {
@@ -592,7 +592,7 @@ static int at25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
               geo->neraseblocks = priv->nsectors;
               ret               = OK;
 
-              fvdbg("blocksize: %d erasesize: %d neraseblocks: %d\n",
+              finfo("blocksize: %d erasesize: %d neraseblocks: %d\n",
                     geo->blocksize, geo->erasesize, geo->neraseblocks);
             }
         }
@@ -614,7 +614,7 @@ static int at25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
         break;
     }
 
-  fvdbg("return %d\n", ret);
+  finfo("return %d\n", ret);
   return ret;
 }
 
@@ -637,7 +637,7 @@ FAR struct mtd_dev_s *at25_initialize(FAR struct spi_dev_s *dev)
   FAR struct at25_dev_s *priv;
   int ret;
 
-  fvdbg("dev: %p\n", dev);
+  finfo("dev: %p\n", dev);
 
   /* Allocate a state structure (we allocate the structure instead of using
    * a fixed, static allocation so that we can handle multiple FLASH devices.
@@ -671,9 +671,9 @@ FAR struct mtd_dev_s *at25_initialize(FAR struct spi_dev_s *dev)
         {
           /* Unrecognized! Discard all of that work we just did and return NULL */
 
-          fdbg("ERROR: Unrecognized\n");
+          ferr("ERROR: Unrecognized\n");
           kmm_free(priv);
-          priv = NULL;
+          return NULL;
         }
       else
         {
@@ -695,6 +695,6 @@ FAR struct mtd_dev_s *at25_initialize(FAR struct spi_dev_s *dev)
 
   /* Return the implementation-specific state structure as the MTD device */
 
-  fvdbg("Return %p\n", priv);
+  finfo("Return %p\n", priv);
   return (FAR struct mtd_dev_s *)priv;
 }
diff --git a/drivers/mtd/at45db.c b/drivers/mtd/at45db.c
index a76994d5e4c56e98a016aabca30c0a62386b8f14..4219c0d3b9f2aea12453769d76a234f43696f3d9 100644
--- a/drivers/mtd/at45db.c
+++ b/drivers/mtd/at45db.c
@@ -341,7 +341,7 @@ static inline int at45db_rdid(FAR struct at45db_dev_s *priv)
   uint8_t capacity;
   uint8_t devid[3];
 
-  fvdbg("priv: %p\n", priv);
+  finfo("priv: %p\n", priv);
 
   /* Configure the bus, and select this FLASH part. (The caller should already have
    * locked the bus for exclusive access)
@@ -360,7 +360,7 @@ static inline int at45db_rdid(FAR struct at45db_dev_s *priv)
 
   SPI_SELECT(priv->spi, SPIDEV_FLASH, false);
 
-  fvdbg("manufacturer: %02x devid1: %02x devid2: %02x\n",
+  finfo("manufacturer: %02x devid1: %02x devid2: %02x\n",
         devid[0], devid[1], devid[2]);
 
   /* Check for a valid manufacturer and memory family */
@@ -474,7 +474,7 @@ static inline void at45db_pgerase(FAR struct at45db_dev_s *priv, off_t sector)
   uint8_t erasecmd[4];
   off_t offset = sector << priv->pageshift;
 
-  fvdbg("sector: %08lx\n", (long)sector);
+  finfo("sector: %08lx\n", (long)sector);
 
   /* Higher performance write logic:  We leave the chip busy after write and erase
    * operations.  This improves write and erase performance because we do not have
@@ -514,7 +514,7 @@ static inline void at45db_pgerase(FAR struct at45db_dev_s *priv, off_t sector)
 #ifndef CONFIG_AT45DB_PREWAIT
   at45db_waitbusy(priv);
 #endif
-  fvdbg("Erased\n");
+  finfo("Erased\n");
 }
 
 /************************************************************************************
@@ -523,7 +523,7 @@ static inline void at45db_pgerase(FAR struct at45db_dev_s *priv, off_t sector)
 
 static inline int at32db_chiperase(FAR struct at45db_dev_s *priv)
 {
-  fvdbg("priv: %p\n", priv);
+  finfo("priv: %p\n", priv);
 
   /* Higher performance write logic:  We leave the chip busy after write and erase
    * operations.  This improves write and erase performance because we do not have
@@ -569,7 +569,7 @@ static inline void at45db_pgwrite(FAR struct at45db_dev_s *priv,
   uint8_t wrcmd [4];
   off_t offset = page << priv->pageshift;
 
-  fvdbg("page: %08lx offset: %08lx\n", (long)page, (long)offset);
+  finfo("page: %08lx offset: %08lx\n", (long)page, (long)offset);
 
   /* We assume that sectors are not write protected */
 
@@ -601,7 +601,7 @@ static inline void at45db_pgwrite(FAR struct at45db_dev_s *priv,
 #ifndef CONFIG_AT45DB_PREWAIT
   at45db_waitbusy(priv);
 #endif
-  fvdbg("Written\n");
+  finfo("Written\n");
 }
 
 /************************************************************************************
@@ -613,7 +613,7 @@ static int at45db_erase(FAR struct mtd_dev_s *mtd, off_t startblock, size_t nblo
   FAR struct at45db_dev_s *priv = (FAR struct at45db_dev_s *)mtd;
   size_t pgsleft = nblocks;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* Take the lock so that we have exclusive access to the bus, then power up the
    * FLASH device.
@@ -669,7 +669,7 @@ static ssize_t at45db_bwrite(FAR struct mtd_dev_s *mtd, off_t startblock,
   FAR struct at45db_dev_s *priv = (FAR struct at45db_dev_s *)mtd;
   size_t pgsleft = nblocks;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* Take the lock so that we have exclusive access to the bus, then power up the
    * FLASH device.
@@ -703,7 +703,7 @@ static ssize_t at45db_read(FAR struct mtd_dev_s *mtd, off_t offset, size_t nbyte
   FAR struct at45db_dev_s *priv = (FAR struct at45db_dev_s *)mtd;
   uint8_t rdcmd [5];
 
-  fvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+  finfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
 
   /* Set up for the read */
 
@@ -741,7 +741,7 @@ static ssize_t at45db_read(FAR struct mtd_dev_s *mtd, off_t offset, size_t nbyte
   at45db_pwrdown(priv);
   at45db_unlock(priv);
 
-  fvdbg("return nbytes: %d\n", (int)nbytes);
+  finfo("return nbytes: %d\n", (int)nbytes);
   return nbytes;
 }
 
@@ -754,7 +754,7 @@ static int at45db_ioctl(FAR struct mtd_dev_s *mtd, int cmd, unsigned long arg)
   FAR struct at45db_dev_s *priv = (FAR struct at45db_dev_s *)mtd;
   int ret = -EINVAL; /* Assume good command with bad parameters */
 
-  fvdbg("cmd: %d \n", cmd);
+  finfo("cmd: %d \n", cmd);
 
   switch (cmd)
     {
@@ -777,7 +777,7 @@ static int at45db_ioctl(FAR struct mtd_dev_s *mtd, int cmd, unsigned long arg)
               geo->neraseblocks = priv->npages;
               ret               = OK;
 
-              fvdbg("blocksize: %d erasesize: %d neraseblocks: %d\n",
+              finfo("blocksize: %d erasesize: %d neraseblocks: %d\n",
                     geo->blocksize, geo->erasesize, geo->neraseblocks);
             }
         }
@@ -806,7 +806,7 @@ static int at45db_ioctl(FAR struct mtd_dev_s *mtd, int cmd, unsigned long arg)
         break;
     }
 
-  fvdbg("return %d\n", ret);
+  finfo("return %d\n", ret);
   return ret;
 }
 
@@ -830,7 +830,7 @@ FAR struct mtd_dev_s *at45db_initialize(FAR struct spi_dev_s *spi)
   uint8_t sr;
   int ret;
 
-  fvdbg("spi: %p\n", spi);
+  finfo("spi: %p\n", spi);
 
   /* Allocate a state structure (we allocate the structure instead of using a fixed,
    * static allocation so that we can handle multiple FLASH devices.  The current
@@ -869,7 +869,7 @@ FAR struct mtd_dev_s *at45db_initialize(FAR struct spi_dev_s *spi)
         {
           /* Unrecognized! Discard all of that work we just did and return NULL */
 
-          fdbg("Unrecognized\n");
+          ferr("ERROR: Unrecognized\n");
           goto errout;
         }
 
@@ -887,7 +887,8 @@ FAR struct mtd_dev_s *at45db_initialize(FAR struct spi_dev_s *spi)
            * is required after the device has be re-programmed.
            */
 
-          fdbg("Reprogramming page size\n");
+          fwarn("WARNING: Reprogramming page size\n");
+
           SPI_SELECT(priv->spi, SPIDEV_FLASH, true);
           SPI_SNDBLOCK(priv->spi, g_binpgsize, BINPGSIZE_SIZE);
           SPI_SELECT(priv->spi, SPIDEV_FLASH, false);
@@ -906,7 +907,7 @@ FAR struct mtd_dev_s *at45db_initialize(FAR struct spi_dev_s *spi)
   mtd_register(&priv->mtd, "at45db");
 #endif
 
-  fvdbg("Return %p\n", priv);
+  finfo("Return %p\n", priv);
   return (FAR struct mtd_dev_s *)priv;
 
   /* On any failure, we need free memory allocations and release the lock that
diff --git a/drivers/mtd/filemtd.c b/drivers/mtd/filemtd.c
index 18b2e19e1a9d0a2d85c2b1e3f2cb55695c56cbb8..6154de1d2d9d13656708f0b1fc4ffc29d345d69e 100644
--- a/drivers/mtd/filemtd.c
+++ b/drivers/mtd/filemtd.c
@@ -115,19 +115,19 @@ static ssize_t filemtd_write(FAR struct file_dev_s *priv, size_t offset,
 
 /* MTD driver methods */
 
-static int file_erase(FAR struct mtd_dev_s *dev, off_t startblock,
+static int filemtd_erase(FAR struct mtd_dev_s *dev, off_t startblock,
                  size_t nblocks);
-static ssize_t file_bread(FAR struct mtd_dev_s *dev, off_t startblock,
+static ssize_t filemtd_bread(FAR struct mtd_dev_s *dev, off_t startblock,
                  size_t nblocks, FAR uint8_t *buf);
-static ssize_t file_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
+static ssize_t filemtd_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
                  size_t nblocks, FAR const uint8_t *buf);
-static ssize_t file_byteread(FAR struct mtd_dev_s *dev, off_t offset,
+static ssize_t filemtd_byteread(FAR struct mtd_dev_s *dev, off_t offset,
                  size_t nbytes, FAR uint8_t *buf);
 #ifdef CONFIG_MTD_BYTE_WRITE
 static ssize_t file_bytewrite(FAR struct mtd_dev_s *dev, off_t offset,
                  size_t nbytes, FAR const uint8_t *buf);
 #endif
-static int file_ioctl(FAR struct mtd_dev_s *dev, int cmd,
+static int filemtd_ioctl(FAR struct mtd_dev_s *dev, int cmd,
                  unsigned long arg);
 
 /****************************************************************************
@@ -184,10 +184,10 @@ static ssize_t filemtd_write(FAR struct file_dev_s *priv, size_t offset,
        * erased state.
        */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       if (newvalue != srcvalue)
         {
-          dbg("ERROR: Bad write: source=%02x dest=%02x result=%02x\n",
+          _err("ERROR: Bad write: source=%02x dest=%02x result=%02x\n",
               srcvalue, oldvalue, newvalue);
         }
 #endif
@@ -236,10 +236,10 @@ static ssize_t filemtd_read(FAR struct file_dev_s *priv,
 }
 
 /****************************************************************************
- * Name: file_erase
+ * Name: filemtd_erase
  ****************************************************************************/
 
-static int file_erase(FAR struct mtd_dev_s *dev, off_t startblock,
+static int filemtd_erase(FAR struct mtd_dev_s *dev, off_t startblock,
                       size_t nblocks)
 {
   FAR struct file_dev_s *priv = (FAR struct file_dev_s *)dev;
@@ -289,10 +289,10 @@ static int file_erase(FAR struct mtd_dev_s *dev, off_t startblock,
 }
 
 /****************************************************************************
- * Name: file_bread
+ * Name: filemtd_bread
  ****************************************************************************/
 
-static ssize_t file_bread(FAR struct mtd_dev_s *dev, off_t startblock,
+static ssize_t filemtd_bread(FAR struct mtd_dev_s *dev, off_t startblock,
                           size_t nblocks, FAR uint8_t *buf)
 {
   FAR struct file_dev_s *priv = (FAR struct file_dev_s *)dev;
@@ -329,10 +329,10 @@ static ssize_t file_bread(FAR struct mtd_dev_s *dev, off_t startblock,
 }
 
 /****************************************************************************
- * Name: file_bwrite
+ * Name: filemtd_bwrite
  ****************************************************************************/
 
-static ssize_t file_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
+static ssize_t filemtd_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
                           size_t nblocks, FAR const uint8_t *buf)
 {
   FAR struct file_dev_s *priv = (FAR struct file_dev_s *)dev;
@@ -369,10 +369,10 @@ static ssize_t file_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
 }
 
 /****************************************************************************
- * Name: file_byteread
+ * Name: filemtd_byteread
  ****************************************************************************/
 
-static ssize_t file_byteread(FAR struct mtd_dev_s *dev, off_t offset,
+static ssize_t filemtd_byteread(FAR struct mtd_dev_s *dev, off_t offset,
                             size_t nbytes, FAR uint8_t *buf)
 {
   FAR struct file_dev_s *priv = (FAR struct file_dev_s *)dev;
@@ -419,10 +419,10 @@ static ssize_t file_bytewrite(FAR struct mtd_dev_s *dev, off_t offset,
 #endif
 
 /****************************************************************************
- * Name: file_ioctl
+ * Name: filemtd_ioctl
  ****************************************************************************/
 
-static int file_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
+static int filemtd_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
 {
   FAR struct file_dev_s *priv = (FAR struct file_dev_s *)dev;
   int ret = -EINVAL; /* Assume good command with bad parameters */
@@ -456,7 +456,7 @@ static int file_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
         {
           /* Erase the entire device */
 
-          file_erase(dev, 0, priv->nblocks);
+          filemtd_erase(dev, 0, priv->nblocks);
           ret = OK;
         }
         break;
@@ -498,7 +498,7 @@ FAR struct mtd_dev_s *filemtd_initialize(FAR const char *path, size_t offset,
   priv = (FAR struct file_dev_s *)kmm_zalloc(sizeof(struct file_dev_s));
   if (!priv)
     {
-      fdbg("Failed to allocate the FILE MTD state structure\n");
+      ferr("ERROR: Failed to allocate the FILE MTD state structure\n");
       return NULL;
     }
 
@@ -514,7 +514,7 @@ FAR struct mtd_dev_s *filemtd_initialize(FAR const char *path, size_t offset,
   ret = stat(path, &sb);
   if (ret < 0)
     {
-      dbg("Failed to stat %s: %d\n", path, get_errno());
+      _err("ERROR: Failed to stat %s: %d\n", path, get_errno());
       return NULL;
     }
 
@@ -525,7 +525,7 @@ FAR struct mtd_dev_s *filemtd_initialize(FAR const char *path, size_t offset,
   priv->fd = open(path, mode);
   if (priv->fd == -1)
     {
-      fdbg("Failed to open the FILE MTD file %s\n", path);
+      ferr("ERROR: Failed to open the FILE MTD file %s\n", path);
       kmm_free(priv);
       return NULL;
     }
@@ -557,7 +557,7 @@ FAR struct mtd_dev_s *filemtd_initialize(FAR const char *path, size_t offset,
   nblocks = (filelen - offset) / priv->erasesize;
   if (nblocks < 3)
     {
-      fdbg("Need to provide at least three full erase block\n");
+      ferr("ERROR: Need to provide at least three full erase block\n");
       kmm_free(priv);
       return NULL;
     }
@@ -566,14 +566,14 @@ FAR struct mtd_dev_s *filemtd_initialize(FAR const char *path, size_t offset,
    * nullified by kmm_zalloc).
    */
 
-  priv->mtd.erase  = file_erase;
-  priv->mtd.bread  = file_bread;
-  priv->mtd.bwrite = file_bwrite;
-  priv->mtd.read   = file_byteread;
+  priv->mtd.erase  = filemtd_erase;
+  priv->mtd.bread  = filemtd_bread;
+  priv->mtd.bwrite = filemtd_bwrite;
+  priv->mtd.read   = filemtd_byteread;
 #ifdef CONFIG_MTD_BYTE_WRITE
   priv->mtd.write  = file_bytewrite;
 #endif
-  priv->mtd.ioctl  = file_ioctl;
+  priv->mtd.ioctl  = filemtd_ioctl;
   priv->offset     = offset;
   priv->nblocks    = nblocks;
 
@@ -632,7 +632,7 @@ bool filemtd_isfilemtd(FAR struct mtd_dev_s *dev)
 {
   FAR struct file_dev_s *priv = (FAR struct file_dev_s *) dev;
 
-  if (priv->mtd.erase == file_erase)
+  if (priv->mtd.erase == filemtd_erase)
     return 1;
 
   return 0;
diff --git a/drivers/mtd/ftl.c b/drivers/mtd/ftl.c
index b18767f01364167aef2c3db58a648c47326a4a48..13f832c3515ee525b40d9b3a5f07feba60d018a7 100644
--- a/drivers/mtd/ftl.c
+++ b/drivers/mtd/ftl.c
@@ -53,7 +53,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -133,7 +133,7 @@ static const struct block_operations g_bops =
 
 static int ftl_open(FAR struct inode *inode)
 {
-  fvdbg("Entry\n");
+  finfo("Entry\n");
   return OK;
 }
 
@@ -146,7 +146,7 @@ static int ftl_open(FAR struct inode *inode)
 
 static int ftl_close(FAR struct inode *inode)
 {
-  fvdbg("Entry\n");
+  finfo("Entry\n");
   return OK;
 }
 
@@ -168,7 +168,7 @@ static ssize_t ftl_reload(FAR void *priv, FAR uint8_t *buffer,
   nread   = MTD_BREAD(dev->mtd, startblock, nblocks, buffer);
   if (nread != nblocks)
     {
-      fdbg("Read %d blocks starting at block %d failed: %d\n",
+      ferr("ERROR: Read %d blocks starting at block %d failed: %d\n",
             nblocks, startblock, nread);
     }
 
@@ -187,7 +187,7 @@ static ssize_t ftl_read(FAR struct inode *inode, unsigned char *buffer,
 {
   FAR struct ftl_struct_s *dev;
 
-  fvdbg("sector: %d nsectors: %d\n", start_sector, nsectors);
+  finfo("sector: %d nsectors: %d\n", start_sector, nsectors);
 
   DEBUGASSERT(inode && inode->i_private);
 
@@ -244,7 +244,7 @@ static ssize_t ftl_flush(FAR void *priv, FAR const uint8_t *buffer,
       nxfrd   = MTD_BREAD(dev->mtd, rwblock, dev->blkper, dev->eblock);
       if (nxfrd != dev->blkper)
         {
-          fdbg("Read erase block %d failed: %d\n", rwblock, nxfrd);
+          ferr("ERROR: Read erase block %d failed: %d\n", rwblock, nxfrd);
           return -EIO;
         }
 
@@ -254,7 +254,7 @@ static ssize_t ftl_flush(FAR void *priv, FAR const uint8_t *buffer,
       ret        = MTD_ERASE(dev->mtd, eraseblock, 1);
       if (ret < 0)
         {
-          fdbg("Erase block=%d failed: %d\n", eraseblock, ret);
+          ferr("ERROR: Erase block=%d failed: %d\n", eraseblock, ret);
           return ret;
         }
 
@@ -271,7 +271,7 @@ static ssize_t ftl_flush(FAR void *priv, FAR const uint8_t *buffer,
           nbytes = dev->geo.erasesize - offset;
         }
 
-      fvdbg("Copy %d bytes into erase block=%d at offset=%d\n",
+      finfo("Copy %d bytes into erase block=%d at offset=%d\n",
              nbytes, eraseblock, offset);
 
       memcpy(dev->eblock + offset, buffer, nbytes);
@@ -281,7 +281,7 @@ static ssize_t ftl_flush(FAR void *priv, FAR const uint8_t *buffer,
       nxfrd = MTD_BWRITE(dev->mtd, rwblock, dev->blkper, dev->eblock);
       if (nxfrd != dev->blkper)
         {
-          fdbg("Write erase block %d failed: %d\n", rwblock, nxfrd);
+          ferr("ERROR: Write erase block %d failed: %d\n", rwblock, nxfrd);
           return -EIO;
         }
 
@@ -309,19 +309,19 @@ static ssize_t ftl_flush(FAR void *priv, FAR const uint8_t *buffer,
       ret        = MTD_ERASE(dev->mtd, eraseblock, 1);
       if (ret < 0)
         {
-          fdbg("Erase block=%d failed: %d\n", eraseblock, ret);
+          ferr("ERROR: Erase block=%d failed: %d\n", eraseblock, ret);
           return ret;
         }
 
       /* Write a full erase back to flash */
 
-      fvdbg("Write %d bytes into erase block=%d at offset=0\n",
+      finfo("Write %d bytes into erase block=%d at offset=0\n",
              dev->geo.erasesize, alignedblock);
 
       nxfrd = MTD_BWRITE(dev->mtd, alignedblock, dev->blkper, buffer);
       if (nxfrd != dev->blkper)
         {
-          fdbg("Write erase block %d failed: %d\n", alignedblock, nxfrd);
+          ferr("ERROR: Write erase block %d failed: %d\n", alignedblock, nxfrd);
           return -EIO;
         }
 
@@ -341,7 +341,7 @@ static ssize_t ftl_flush(FAR void *priv, FAR const uint8_t *buffer,
      nxfrd = MTD_BREAD(dev->mtd, alignedblock, dev->blkper, dev->eblock);
       if (nxfrd != dev->blkper)
         {
-          fdbg("Read erase block %d failed: %d\n", alignedblock, nxfrd);
+          ferr("ERROR: Read erase block %d failed: %d\n", alignedblock, nxfrd);
           return -EIO;
         }
 
@@ -351,14 +351,14 @@ static ssize_t ftl_flush(FAR void *priv, FAR const uint8_t *buffer,
       ret        = MTD_ERASE(dev->mtd, eraseblock, 1);
       if (ret < 0)
         {
-          fdbg("Erase block=%d failed: %d\n", eraseblock, ret);
+          ferr("ERROR: Erase block=%d failed: %d\n", eraseblock, ret);
           return ret;
         }
 
       /* Copy the user data at the beginning the buffered erase block */
 
       nbytes = remaining * dev->geo.blocksize;
-      fvdbg("Copy %d bytes into erase block=%d at offset=0\n",
+      finfo("Copy %d bytes into erase block=%d at offset=0\n",
              nbytes, alignedblock);
       memcpy(dev->eblock, buffer, nbytes);
 
@@ -367,7 +367,7 @@ static ssize_t ftl_flush(FAR void *priv, FAR const uint8_t *buffer,
       nxfrd = MTD_BWRITE(dev->mtd, alignedblock, dev->blkper, dev->eblock);
       if (nxfrd != dev->blkper)
         {
-          fdbg("Write erase block %d failed: %d\n", alignedblock, nxfrd);
+          ferr("ERROR: Write erase block %d failed: %d\n", alignedblock, nxfrd);
           return -EIO;
         }
     }
@@ -389,7 +389,7 @@ static ssize_t ftl_write(FAR struct inode *inode, const unsigned char *buffer,
 {
   struct ftl_struct_s *dev;
 
-  fvdbg("sector: %d nsectors: %d\n", start_sector, nsectors);
+  finfo("sector: %d nsectors: %d\n", start_sector, nsectors);
 
   DEBUGASSERT(inode && inode->i_private);
   dev = (struct ftl_struct_s *)inode->i_private;
@@ -412,7 +412,7 @@ static int ftl_geometry(FAR struct inode *inode, struct geometry *geometry)
 {
   struct ftl_struct_s *dev;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   DEBUGASSERT(inode);
   if (geometry)
@@ -428,9 +428,9 @@ static int ftl_geometry(FAR struct inode *inode, struct geometry *geometry)
       geometry->geo_nsectors      = dev->geo.neraseblocks * dev->blkper;
       geometry->geo_sectorsize    = dev->geo.blocksize;
 
-      fvdbg("available: true mediachanged: false writeenabled: %s\n",
+      finfo("available: true mediachanged: false writeenabled: %s\n",
             geometry->geo_writeenabled ? "true" : "false");
-      fvdbg("nsectors: %d sectorsize: %d\n",
+      finfo("nsectors: %d sectorsize: %d\n",
             geometry->geo_nsectors, geometry->geo_sectorsize);
 
       return OK;
@@ -451,7 +451,7 @@ static int ftl_ioctl(FAR struct inode *inode, int cmd, unsigned long arg)
   struct ftl_struct_s *dev ;
   int ret;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
   DEBUGASSERT(inode && inode->i_private);
 
   /* Only one block driver ioctl command is supported by this driver (and
@@ -466,10 +466,10 @@ static int ftl_ioctl(FAR struct inode *inode, int cmd, unsigned long arg)
        * driver.
        */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       if (arg == 0)
         {
-          fdbg("ERROR: BIOC_XIPBASE argument is NULL\n");
+          ferr("ERROR: BIOC_XIPBASE argument is NULL\n");
           return -EINVAL;
         }
 #endif
@@ -488,7 +488,7 @@ static int ftl_ioctl(FAR struct inode *inode, int cmd, unsigned long arg)
   ret = MTD_IOCTL(dev->mtd, cmd, arg);
   if (ret < 0)
     {
-      fdbg("ERROR: MTD ioctl(%04x) failed: %d\n", cmd, ret);
+      ferr("ERROR: MTD ioctl(%04x) failed: %d\n", cmd, ret);
     }
 
   return ret;
@@ -519,7 +519,7 @@ int ftl_initialize(int minor, FAR struct mtd_dev_s *mtd)
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (minor < 0 || minor > 255 || !mtd)
     {
       return -EINVAL;
@@ -543,7 +543,7 @@ int ftl_initialize(int minor, FAR struct mtd_dev_s *mtd)
       ret = MTD_IOCTL(mtd, MTDIOC_GEOMETRY, (unsigned long)((uintptr_t)&dev->geo));
       if (ret < 0)
         {
-          fdbg("MTD ioctl(MTDIOC_GEOMETRY) failed: %d\n", ret);
+          ferr("ERROR: MTD ioctl(MTDIOC_GEOMETRY) failed: %d\n", ret);
           kmm_free(dev);
           return ret;
         }
@@ -554,7 +554,7 @@ int ftl_initialize(int minor, FAR struct mtd_dev_s *mtd)
       dev->eblock  = (FAR uint8_t *)kmm_malloc(dev->geo.erasesize);
       if (!dev->eblock)
         {
-          fdbg("Failed to allocate an erase block buffer\n");
+          ferr("ERROR: Failed to allocate an erase block buffer\n");
           kmm_free(dev);
           return -ENOMEM;
         }
@@ -585,7 +585,7 @@ int ftl_initialize(int minor, FAR struct mtd_dev_s *mtd)
       ret = rwb_initialize(&dev->rwb);
       if (ret < 0)
         {
-          fdbg("rwb_initialize failed: %d\n", ret);
+          ferr("ERROR: rwb_initialize failed: %d\n", ret);
           kmm_free(dev);
           return ret;
         }
@@ -600,7 +600,7 @@ int ftl_initialize(int minor, FAR struct mtd_dev_s *mtd)
       ret = register_blockdriver(devname, &g_bops, 0, dev);
       if (ret < 0)
         {
-          fdbg("register_blockdriver failed: %d\n", -ret);
+          ferr("ERROR: register_blockdriver failed: %d\n", -ret);
           kmm_free(dev);
         }
     }
diff --git a/drivers/mtd/hamming.c b/drivers/mtd/hamming.c
index 95d4a5a699f6c4387ee266c8a71fe0b03aa0f4ff..95d192db11f2360ac514e3a8d2460e9c725ba32f 100644
--- a/drivers/mtd/hamming.c
+++ b/drivers/mtd/hamming.c
@@ -301,11 +301,11 @@ static int hamming_verify256(FAR uint8_t *data, FAR const uint8_t *original)
 
   /* There are bit errors */
 
-  fvdbg("Read:       %02x %02x %02x\n",
+  finfo("Read:       %02x %02x %02x\n",
         original[0], original[1], original[2]);
-  fvdbg("Computed:   %02x %02x %02x\n",
+  finfo("Computed:   %02x %02x %02x\n",
         computed[0], computed[1], computed[2]);
-  fvdbg("Correction: %02x %02x %02x\n",
+  finfo("Correction: %02x %02x %02x\n",
         correction[0], correction[1], correction[2]);
 
   /* If there is a single bit error, there are 11 bits set to 1 */
@@ -333,7 +333,7 @@ static int hamming_verify256(FAR uint8_t *data, FAR const uint8_t *original)
 
       /* Correct bit */
 
-      fdbg("Correcting byte %d at bit %d\n", byte, bit);
+      finfo("Correcting byte %d at bit %d\n", byte, bit);
       data[byte] ^= (1 << bit);
 
       return HAMMING_ERROR_SINGLEBIT;
@@ -343,7 +343,7 @@ static int hamming_verify256(FAR uint8_t *data, FAR const uint8_t *original)
 
   if (hamming_bitsincode256(correction) == 1)
     {
-      fdbg("ERROR: ECC has been correupted\n");
+      ferr("ERROR: ECC has been correupted\n");
       return HAMMING_ERROR_ECC;
     }
 
@@ -351,7 +351,7 @@ static int hamming_verify256(FAR uint8_t *data, FAR const uint8_t *original)
 
   else
     {
-      fdbg("ERROR: Multiple bit errors\n");
+      ferr("ERROR: Multiple bit errors\n");
       return HAMMING_ERROR_MULTIPLEBITS;
     }
 }
diff --git a/drivers/mtd/is25xp.c b/drivers/mtd/is25xp.c
new file mode 100644
index 0000000000000000000000000000000000000000..55b677b38a32bcb482de12ed6b2bbba8e97adb44
--- /dev/null
+++ b/drivers/mtd/is25xp.c
@@ -0,0 +1,1001 @@
+/************************************************************************************
+ * drivers/mtd/is25xp.c
+ * Driver for SPI-based IS25LPxx parts 32MBit and larger.
+ *
+ *   Copyright (C) 2016 Marten Svanfeldt. All rights reserved.
+ *
+ *   Copyright (C) 2009-2011, 2013 Gregory Nutt. All rights reserved.
+ *   Author: Ken Pettit 
+ *
+ *   Copied from / based on m25px.c and sst25.c drivers written by
+ *   Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Configuration ********************************************************************/
+/* Per the data sheet, IS25xP parts can be driven with either SPI mode 0 (CPOL=0 and
+ * CPHA=0) or mode 3 (CPOL=1 and CPHA=1).  So you may need to specify
+ * CONFIG_IS25XP_SPIMODE to select the best mode for your device.  If
+ * CONFIG_IS25XP_SPIMODE is not defined, mode 0 will be used.
+ */
+
+#ifndef CONFIG_IS25XP_SPIMODE
+#  define CONFIG_IS25XP_SPIMODE SPIDEV_MODE0
+#endif
+
+/* SPI Frequency.  May be up to 50MHz. */
+
+#ifndef CONFIG_IS25XP_SPIFREQUENCY
+#  define CONFIG_IS25XP_SPIFREQUENCY 20000000
+#endif
+
+/* IS25 Registers *******************************************************************/
+/* Indentification register values */
+
+#define IS25_MANUFACTURER         0x9d
+#define IS25_MEMORY_TYPE          0x60
+
+/*  IS25LP064 capacity is 8,388,608 bytes:
+ *  (2,048 sectors) * (4,096 bytes per sector)
+ *  (32,768 pages) * (256 bytes per page)
+ */
+
+#define IS25_IS25LP064_CAPACITY       0x17
+#define IS25_IS25LP064_SECTOR_SHIFT   12    /* Sector size 1 << 12 = 4,096 */
+#define IS25_IS25LP064_NSECTORS       2048
+#define IS25_IS25LP064_PAGE_SHIFT     8     /* Page size 1 << 8 = 256 */
+#define IS25_IS25LP064_NPAGES         32768
+
+/*  IS25LP128 capacity is 16,777,216 bytes:
+ *  (4,096 sectors) * (4,096 bytes per sector)
+ *  (65,536 pages) * (256 bytes per page)
+ */
+
+#define IS25_IS25LP128_CAPACITY       0x18
+#define IS25_IS25LP128_SECTOR_SHIFT   12    /* Sector size 1 << 12 = 4,096 */
+#define IS25_IS25LP128_NSECTORS       4096
+#define IS25_IS25LP128_PAGE_SHIFT     8     /* Page size 1 << 8 = 256 */
+#define IS25_IS25LP128_NPAGES         65536
+
+
+/* Instructions */
+/*      Command        Value      N Description             Addr Dummy  Data  */
+#define IS25_WREN      0x06    /* 1 Write Enable              0   0     0     */
+#define IS25_WRDI      0x04    /* 1 Write Disable             0   0     0     */
+#define IS25_RDID      0x9f    /* 1 Read Identification       0   0     1-3   */
+#define IS25_RDSR      0x05    /* 1 Read Status Register      0   0     >=1   */
+//#define IS25_EWSR    0x50    /* 1 Write enable status       0   0     0     */
+#define IS25_WRSR      0x01    /* 1 Write Status Register     0   0     1     */
+#define IS25_READ      0x03    /* 1 Read Data Bytes           3   0     >=1   */
+#define IS25_FAST_READ 0x0b    /* 1 Higher speed read         3   1     >=1   */
+#define IS25_PP        0x02    /* 1 Page Program              3   0     1-256 */
+#define IS25_SE        0x20    /* 1 Sector Erase              3   0     0     */
+#define IS25_BE32      0x52    /* 2 32K Block Erase           3   0     0     */
+#define IS25_BE64      0xD8    /* 2 64K Block Erase           3   0     0     */
+#define IS25_CER       0xC7    /* 1 Chip Erase                0   0     0     */
+
+/* NOTE 1: All parts.
+ * NOTE 2: In IS25XP terminology, 0x52 and 0xd8 are block erase and 0x20
+ *         is a sector erase.  Block erase provides a faster way to erase
+ *         multiple 4K sectors at once.
+ */
+
+/* Status register bit definitions */
+
+#define IS25_SR_WIP              (1 << 0)                /* Bit 0: Write in progress bit */
+#define IS25_SR_WEL              (1 << 1)                /* Bit 1: Write enable latch bit */
+#define IS25_SR_BP_SHIFT         (2)                     /* Bits 2-5: Block protect bits */
+#define IS25_SR_BP_MASK          (15 << IS25_SR_BP_SHIFT)
+#  define IS25_SR_BP_NONE        (0 << IS25_SR_BP_SHIFT) /* Unprotected */
+#  define IS25_SR_BP_UPPER128th  (1 << IS25_SR_BP_SHIFT) /* Upper 128th */
+#  define IS25_SR_BP_UPPER64th   (2 << IS25_SR_BP_SHIFT) /* Upper 64th */
+#  define IS25_SR_BP_UPPER32nd   (3 << IS25_SR_BP_SHIFT) /* Upper 32nd */
+#  define IS25_SR_BP_UPPER16th   (4 << IS25_SR_BP_SHIFT) /* Upper 16th */
+#  define IS25_SR_BP_UPPER8th    (5 << IS25_SR_BP_SHIFT) /* Upper 8th */
+#  define IS25_SR_BP_UPPERQTR    (6 << IS25_SR_BP_SHIFT) /* Upper quarter */
+#  define IS25_SR_BP_UPPERHALF   (7 << IS25_SR_BP_SHIFT) /* Upper half */
+#  define IS25_SR_BP_ALL         (8 << IS25_SR_BP_SHIFT) /* All sectors */
+#define IS25_SR_QE               (1 << 6)                /* Bit 6: Quad (QSPI) enable bit */
+#define IS25_SR_SRWD             (1 << 7)                /* Bit 7: Status register write protect */
+
+#define IS25_DUMMY     0xa5
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+
+/* This type represents the state of the MTD device.  The struct mtd_dev_s
+ * must appear at the beginning of the definition so that you can freely
+ * cast between pointers to struct mtd_dev_s and struct is25xp_dev_s.
+ */
+
+struct is25xp_dev_s
+{
+  struct mtd_dev_s mtd;      /* MTD interface */
+  FAR struct spi_dev_s *dev; /* Saved SPI interface instance */
+  uint8_t  sectorshift;      /* 12 */
+  uint8_t  pageshift;        /* 8 */
+  uint16_t nsectors;         /* 2,048 or 4,096 */
+  uint32_t npages;           /* 32,768 or 65,536 */
+  uint8_t  lastwaswrite;     /* Indicates if last operation was write */
+};
+
+/************************************************************************************
+ * Private Function Prototypes
+ ************************************************************************************/
+
+/* Helpers */
+
+static void is25xp_lock(FAR struct spi_dev_s *dev);
+static inline void is25xp_unlock(FAR struct spi_dev_s *dev);
+static inline int is25xp_readid(struct is25xp_dev_s *priv);
+static void is25xp_waitwritecomplete(struct is25xp_dev_s *priv);
+static void is25xp_writeenable(struct is25xp_dev_s *priv);
+static inline void is25xp_sectorerase(struct is25xp_dev_s *priv, off_t offset, uint8_t type);
+static inline int  is25xp_bulkerase(struct is25xp_dev_s *priv);
+static inline void is25xp_pagewrite(struct is25xp_dev_s *priv, FAR const uint8_t *buffer,
+                                  off_t offset);
+
+/* MTD driver methods */
+
+static int is25xp_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks);
+static ssize_t is25xp_bread(FAR struct mtd_dev_s *dev, off_t startblock,
+                          size_t nblocks, FAR uint8_t *buf);
+static ssize_t is25xp_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
+                           size_t nblocks, FAR const uint8_t *buf);
+static ssize_t is25xp_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
+                         FAR uint8_t *buffer);
+#ifdef CONFIG_MTD_BYTE_WRITE
+static ssize_t is25xp_write(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
+                         FAR const uint8_t *buffer);
+#endif
+static int is25xp_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg);
+
+/************************************************************************************
+ * Name: is25xp_lock
+ ************************************************************************************/
+
+static void is25xp_lock(FAR struct spi_dev_s *dev)
+{
+  /* On SPI busses where there are multiple devices, it will be necessary to
+   * lock SPI to have exclusive access to the busses for a sequence of
+   * transfers.  The bus should be locked before the chip is selected.
+   *
+   * This is a blocking call and will not return until we have exclusiv access to
+   * the SPI buss.  We will retain that exclusive access until the bus is unlocked.
+   */
+
+  (void)SPI_LOCK(dev, true);
+
+  /* After locking the SPI bus, the we also need call the setfrequency, setbits, and
+   * setmode methods to make sure that the SPI is properly configured for the device.
+   * If the SPI buss is being shared, then it may have been left in an incompatible
+   * state.
+   */
+
+  SPI_SETMODE(dev, CONFIG_IS25XP_SPIMODE);
+  SPI_SETBITS(dev, 8);
+  (void)SPI_HWFEATURES(dev, 0);
+  (void)SPI_SETFREQUENCY(dev, CONFIG_IS25XP_SPIFREQUENCY);
+}
+
+/************************************************************************************
+ * Name: is25xp_unlock
+ ************************************************************************************/
+
+static inline void is25xp_unlock(FAR struct spi_dev_s *dev)
+{
+  (void)SPI_LOCK(dev, false);
+}
+
+/************************************************************************************
+ * Name: is25xp_readid
+ ************************************************************************************/
+
+static inline int is25xp_readid(struct is25xp_dev_s *priv)
+{
+  uint16_t manufacturer;
+  uint16_t memory;
+  uint16_t capacity;
+
+  finfo("priv: %p\n", priv);
+
+  /* Lock the SPI bus, configure the bus, and select this FLASH part. */
+
+  is25xp_lock(priv->dev);
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send the "Read ID (RDID)" command and read the first three ID bytes */
+
+  (void)SPI_SEND(priv->dev, IS25_RDID);
+  manufacturer = SPI_SEND(priv->dev, IS25_DUMMY);
+  memory       = SPI_SEND(priv->dev, IS25_DUMMY);
+  capacity     = SPI_SEND(priv->dev, IS25_DUMMY);
+
+  /* Deselect the FLASH and unlock the bus */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+  is25xp_unlock(priv->dev);
+
+  finfo("manufacturer: %02x memory: %02x capacity: %02x\n",
+        manufacturer, memory, capacity);
+
+  /* Check for a valid manufacturer and memory type */
+
+  if (manufacturer == IS25_MANUFACTURER && memory == IS25_MEMORY_TYPE)
+    {
+      /* Okay.. is it a FLASH capacity that we understand? */
+
+      if (capacity == IS25_IS25LP064_CAPACITY)
+        {
+           /* Save the FLASH geometry */
+
+           priv->sectorshift = IS25_IS25LP064_SECTOR_SHIFT;
+           priv->nsectors    = IS25_IS25LP064_NSECTORS;
+           priv->pageshift   = IS25_IS25LP064_PAGE_SHIFT;
+           priv->npages      = IS25_IS25LP064_NPAGES;
+           return OK;
+        }
+      else if (capacity == IS25_IS25LP128_CAPACITY)
+        {
+           /* Save the FLASH geometry */
+
+           priv->sectorshift = IS25_IS25LP128_SECTOR_SHIFT;
+           priv->nsectors    = IS25_IS25LP128_NSECTORS;
+           priv->pageshift   = IS25_IS25LP128_PAGE_SHIFT;
+           priv->npages      = IS25_IS25LP128_NPAGES;
+           return OK;
+        }
+    }
+
+  return -ENODEV;
+}
+
+/************************************************************************************
+ * Name: is25xp_waitwritecomplete
+ ************************************************************************************/
+
+static void is25xp_waitwritecomplete(struct is25xp_dev_s *priv)
+{
+  uint8_t status;
+
+  /* No need to check if no write / erase was done */
+
+#if 0
+  if (!priv->lastwaswrite)
+    {
+      return;
+    }
+#endif
+
+  /* Are we the only device on the bus? */
+
+#ifdef CONFIG_SPI_OWNBUS
+
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send "Read Status Register (RDSR)" command */
+
+  (void)SPI_SEND(priv->dev, IS25_RDSR);
+
+  /* Loop as long as the memory is busy with a write cycle */
+
+  do
+    {
+      /* Send a dummy byte to generate the clock needed to shift out the status */
+
+      status = SPI_SEND(priv->dev, IS25_DUMMY);
+    }
+  while ((status & IS25_SR_WIP) != 0);
+
+  /* Deselect the FLASH */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+
+#else
+
+  /* Loop as long as the memory is busy with a write cycle */
+
+  do
+    {
+      /* Select this FLASH part */
+
+      SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+      /* Send "Read Status Register (RDSR)" command */
+
+      (void)SPI_SEND(priv->dev, IS25_RDSR);
+
+      /* Send a dummy byte to generate the clock needed to shift out the status */
+
+      status = SPI_SEND(priv->dev, IS25_DUMMY);
+
+      /* Deselect the FLASH */
+
+      SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+
+      /* Given that writing could take up to few tens of milliseconds, and erasing
+       * could take more.  The following short delay in the "busy" case will allow
+       * other peripherals to access the SPI bus.
+       */
+
+      if ((status & IS25_SR_WIP) != 0)
+        {
+          is25xp_unlock(priv->dev);
+          usleep(1000);
+          is25xp_lock(priv->dev);
+        }
+    }
+  while ((status & IS25_SR_WIP) != 0);
+#endif
+
+  priv->lastwaswrite = false;
+
+  finfo("Complete\n");
+}
+
+/************************************************************************************
+ * Name:  is25xp_writeenable
+ ************************************************************************************/
+
+static void is25xp_writeenable(struct is25xp_dev_s *priv)
+{
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send "Write Enable (WREN)" command */
+
+  (void)SPI_SEND(priv->dev, IS25_WREN);
+
+  /* Deselect the FLASH */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+  finfo("Enabled\n");
+}
+
+/************************************************************************************
+ * Name: is25xp_unprotect
+ ************************************************************************************/
+
+static void is25xp_unprotect(struct is25xp_dev_s *priv)
+{
+  /* Make writeable */
+
+  is25xp_writeenable(priv);
+
+  /* Send "Write status (WRSR)" */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+  SPI_SEND(priv->dev, IS25_WRSR);
+
+  /* Followed by the new status value */
+
+  SPI_SEND(priv->dev, 0);
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+}
+
+/************************************************************************************
+ * Name:  is25xp_sectorerase
+ ************************************************************************************/
+
+static void is25xp_sectorerase(struct is25xp_dev_s *priv, off_t sector, uint8_t type)
+{
+  off_t offset;
+
+  offset = sector << priv->sectorshift;
+
+  finfo("sector: %08lx\n", (long)sector);
+
+  /* Wait for any preceding write to complete.  We could simplify things by
+   * perform this wait at the end of each write operation (rather than at
+   * the beginning of ALL operations), but have the wait first will slightly
+   * improve performance.
+   */
+
+  is25xp_waitwritecomplete(priv);
+
+  /* Send write enable instruction */
+
+  is25xp_writeenable(priv);
+
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send the "Sector Erase (SE)" or Sub-Sector Erase (SSE) instruction
+   * that was passed in as the erase type.
+   */
+
+  (void)SPI_SEND(priv->dev, type);
+
+  /* Send the sector offset high byte first.  For all of the supported
+   * parts, the sector number is completely contained in the first byte
+   * and the values used in the following two bytes don't really matter.
+   */
+
+  (void)SPI_SEND(priv->dev, (offset >> 16) & 0xff);
+  (void)SPI_SEND(priv->dev, (offset >> 8) & 0xff);
+  (void)SPI_SEND(priv->dev, offset & 0xff);
+  priv->lastwaswrite = true;
+
+  /* Deselect the FLASH */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+  finfo("Erased\n");
+}
+
+/************************************************************************************
+ * Name:  is25xp_bulkerase
+ ************************************************************************************/
+
+static inline int is25xp_bulkerase(struct is25xp_dev_s *priv)
+{
+  finfo("priv: %p\n", priv);
+
+  /* Wait for any preceding write to complete.  We could simplify things by
+   * perform this wait at the end of each write operation (rather than at
+   * the beginning of ALL operations), but have the wait first will slightly
+   * improve performance.
+   */
+
+  is25xp_waitwritecomplete(priv);
+
+  /* Send write enable instruction */
+
+  is25xp_writeenable(priv);
+
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send the "Chip Erase (CER)" instruction */
+
+  (void)SPI_SEND(priv->dev, IS25_CER);
+
+  /* Deselect the FLASH */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+  is25xp_waitwritecomplete(priv);
+
+  finfo("Return: OK\n");
+  return OK;
+}
+
+/************************************************************************************
+ * Name:  is25xp_pagewrite
+ ************************************************************************************/
+
+static inline void is25xp_pagewrite(struct is25xp_dev_s *priv, FAR const uint8_t *buffer,
+                                  off_t page)
+{
+  off_t offset = page << priv->pageshift;
+
+  finfo("page: %08lx offset: %08lx\n", (long)page, (long)offset);
+
+  /* Wait for any preceding write to complete.  We could simplify things by
+   * perform this wait at the end of each write operation (rather than at
+   * the beginning of ALL operations), but have the wait first will slightly
+   * improve performance.
+   */
+
+  is25xp_waitwritecomplete(priv);
+
+  /* Enable the write access to the FLASH */
+
+  is25xp_writeenable(priv);
+
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send "Page Program (PP)" command */
+
+  (void)SPI_SEND(priv->dev, IS25_PP);
+
+  /* Send the page offset high byte first. */
+
+  (void)SPI_SEND(priv->dev, (offset >> 16) & 0xff);
+  (void)SPI_SEND(priv->dev, (offset >> 8) & 0xff);
+  (void)SPI_SEND(priv->dev, offset & 0xff);
+
+  /* Then write the specified number of bytes */
+
+  SPI_SNDBLOCK(priv->dev, buffer, 1 << priv->pageshift);
+  priv->lastwaswrite = true;
+
+  /* Deselect the FLASH: Chip Select high */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+  finfo("Written\n");
+}
+
+/************************************************************************************
+ * Name:  is25xp_bytewrite
+ ************************************************************************************/
+
+#ifdef CONFIG_MTD_BYTE_WRITE
+static inline void is25xp_bytewrite(struct is25xp_dev_s *priv, FAR const uint8_t *buffer,
+                                     off_t offset, uint16_t count)
+{
+  finfo("offset: %08lx  count:%d\n", (long)offset, count);
+
+  /* Wait for any preceding write to complete.  We could simplify things by
+   * perform this wait at the end of each write operation (rather than at
+   * the beginning of ALL operations), but have the wait first will slightly
+   * improve performance.
+   */
+
+  is25xp_waitwritecomplete(priv);
+
+  /* Enable the write access to the FLASH */
+
+  is25xp_writeenable(priv);
+
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send "Page Program (PP)" command */
+
+  (void)SPI_SEND(priv->dev, IS25_PP);
+
+  /* Send the page offset high byte first. */
+
+  (void)SPI_SEND(priv->dev, (offset >> 16) & 0xff);
+  (void)SPI_SEND(priv->dev, (offset >> 8) & 0xff);
+  (void)SPI_SEND(priv->dev, offset & 0xff);
+
+  /* Then write the specified number of bytes */
+
+  SPI_SNDBLOCK(priv->dev, buffer, count);
+  priv->lastwaswrite = true;
+
+  /* Deselect the FLASH: Chip Select high */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+  finfo("Written\n");
+}
+#endif
+
+/************************************************************************************
+ * Name: is25xp_erase
+ ************************************************************************************/
+
+static int is25xp_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks)
+{
+  FAR struct is25xp_dev_s *priv = (FAR struct is25xp_dev_s *)dev;
+  size_t blocksleft = nblocks;
+
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+
+  /* Lock access to the SPI bus until we complete the erase */
+
+  is25xp_lock(priv->dev);
+  while (blocksleft > 0)
+    {
+      size_t sectorboundry;
+      size_t blkper;
+
+      /* We will erase in either 4K sectors or 32K or 64K blocks depending
+       * on the largest unit we can use given the startblock and nblocks.
+       * This will reduce erase time (in the event we have partitions
+       * enabled and are doing a bulk erase which is translated into
+       * a block erase operation).
+       */
+
+      /* Test for 64K alignment */
+
+      blkper = 64 / 4;
+      sectorboundry = (startblock + blkper - 1) / blkper;
+      sectorboundry *= blkper;
+
+      /* If we are on a sector boundry and have at least a full sector
+       * of blocks left to erase, then we can do a full sector erase.
+       */
+
+      if (startblock == sectorboundry && blocksleft >= blkper)
+        {
+          /* Do a 64k block erase */
+
+          is25xp_sectorerase(priv, startblock, IS25_BE64);
+          startblock += blkper;
+          blocksleft -= blkper;
+          continue;
+        }
+
+      /* Test for 32K block alignment */
+
+      blkper = 32 / 4;
+      sectorboundry = (startblock + blkper - 1) / blkper;
+      sectorboundry *= blkper;
+
+      if (startblock == sectorboundry && blocksleft >= blkper)
+        {
+          /* Do a 32k block erase */
+
+          is25xp_sectorerase(priv, startblock, IS25_BE32);
+          startblock += blkper;
+          blocksleft -= blkper;
+          continue;
+        }
+      else
+        {
+          /* Just do a sector erase */
+
+          is25xp_sectorerase(priv, startblock, IS25_SE);
+          startblock++;
+          blocksleft--;
+          continue;
+        }
+    }
+
+  is25xp_unlock(priv->dev);
+  return (int)nblocks;
+}
+
+/************************************************************************************
+ * Name: is25xp_bread
+ ************************************************************************************/
+
+static ssize_t is25xp_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks,
+                             FAR uint8_t *buffer)
+{
+  FAR struct is25xp_dev_s *priv = (FAR struct is25xp_dev_s *)dev;
+  ssize_t nbytes;
+
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+
+  /* On this device, we can handle the block read just like the byte-oriented read */
+
+  nbytes = is25xp_read(dev, startblock << priv->pageshift, nblocks << priv->pageshift, buffer);
+  if (nbytes > 0)
+    {
+        return nbytes >> priv->pageshift;
+    }
+
+  return (int)nbytes;
+}
+
+/************************************************************************************
+ * Name: is25xp_bwrite
+ ************************************************************************************/
+
+static ssize_t is25xp_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks,
+                              FAR const uint8_t *buffer)
+{
+  FAR struct is25xp_dev_s *priv = (FAR struct is25xp_dev_s *)dev;
+  size_t blocksleft = nblocks;
+  size_t pagesize = 1 << priv->pageshift;
+
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+
+  /* Lock the SPI bus and write each page to FLASH */
+
+  is25xp_lock(priv->dev);
+  while (blocksleft-- > 0)
+    {
+      is25xp_pagewrite(priv, buffer, startblock);
+      buffer += pagesize;
+      startblock++;
+   }
+
+  is25xp_unlock(priv->dev);
+  return nblocks;
+}
+
+/************************************************************************************
+ * Name: is25xp_read
+ ************************************************************************************/
+
+static ssize_t is25xp_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
+                            FAR uint8_t *buffer)
+{
+  FAR struct is25xp_dev_s *priv = (FAR struct is25xp_dev_s *)dev;
+
+  finfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+
+  /* Wait for any preceding write to complete.  We could simplify things by
+   * perform this wait at the end of each write operation (rather than at
+   * the beginning of ALL operations), but have the wait first will slightly
+   * improve performance.
+   */
+
+  if (priv->lastwaswrite)
+    {
+      is25xp_waitwritecomplete(priv);
+    }
+
+  /* Lock the SPI bus and select this FLASH part */
+
+  is25xp_lock(priv->dev);
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send "Read from Memory " instruction */
+
+  (void)SPI_SEND(priv->dev, IS25_READ);
+
+  /* Send the page offset high byte first. */
+
+  (void)SPI_SEND(priv->dev, (offset >> 16) & 0xff);
+  (void)SPI_SEND(priv->dev, (offset >> 8) & 0xff);
+  (void)SPI_SEND(priv->dev, offset & 0xff);
+
+  /* Then read all of the requested bytes */
+
+  SPI_RECVBLOCK(priv->dev, buffer, nbytes);
+
+  /* Deselect the FLASH and unlock the SPI bus */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+  is25xp_unlock(priv->dev);
+  finfo("return nbytes: %d\n", (int)nbytes);
+  return nbytes;
+}
+
+/************************************************************************************
+ * Name: is25xp_write
+ ************************************************************************************/
+
+#ifdef CONFIG_MTD_BYTE_WRITE
+static ssize_t is25xp_write(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
+                         FAR const uint8_t *buffer)
+{
+  FAR struct is25xp_dev_s *priv = (FAR struct is25xp_dev_s *)dev;
+  int    startpage;
+  int    endpage;
+  int    count;
+  int    index;
+  int    pagesize;
+  int    bytestowrite;
+
+  finfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+
+  /* We must test if the offset + count crosses one or more pages
+   * and perform individual writes.  The devices can only write in
+   * page increments.
+   */
+
+  startpage = offset / (1 << priv->pageshift);
+  endpage = (offset + nbytes) / (1 << priv->pageshift);
+
+  if (startpage == endpage)
+    {
+      /* All bytes within one programmable page.  Just do the write. */
+
+      is25xp_bytewrite(priv, buffer, offset, nbytes);
+    }
+  else
+    {
+      /* Write the 1st partial-page */
+
+      count = nbytes;
+      pagesize = (1 << priv->pageshift);
+      bytestowrite = pagesize - (offset & (pagesize-1));
+      is25xp_bytewrite(priv, buffer, offset, bytestowrite);
+
+      /* Update offset and count */
+
+      offset += bytestowrite;
+      count -=  bytestowrite;
+      index = bytestowrite;
+
+      /* Write full pages */
+
+      while (count >= pagesize)
+        {
+          is25xp_bytewrite(priv, &buffer[index], offset, pagesize);
+
+          /* Update offset and count */
+
+          offset += pagesize;
+          count -= pagesize;
+          index += pagesize;
+        }
+
+      /* Now write any partial page at the end */
+
+      if (count > 0)
+        {
+          is25xp_bytewrite(priv, &buffer[index], offset, count);
+        }
+
+      priv->lastwaswrite = true;
+    }
+
+  return nbytes;
+}
+#endif /* CONFIG_MTD_BYTE_WRITE */
+
+/************************************************************************************
+ * Name: is25xp_ioctl
+ ************************************************************************************/
+
+static int is25xp_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
+{
+  FAR struct is25xp_dev_s *priv = (FAR struct is25xp_dev_s *)dev;
+  int ret = -EINVAL; /* Assume good command with bad parameters */
+
+  finfo("cmd: %d \n", cmd);
+
+  switch (cmd)
+    {
+      case MTDIOC_GEOMETRY:
+        {
+          FAR struct mtd_geometry_s *geo = (FAR struct mtd_geometry_s *)((uintptr_t)arg);
+          if (geo)
+            {
+              /* Populate the geometry structure with information need to know
+               * the capacity and how to access the device.
+               *
+               * NOTE: that the device is treated as though it where just an array
+               * of fixed size blocks.  That is most likely not true, but the client
+               * will expect the device logic to do whatever is necessary to make it
+               * appear so.
+               */
+
+              geo->blocksize = (1 << priv->pageshift);
+              geo->erasesize    = (1 << priv->sectorshift);
+              geo->neraseblocks = priv->nsectors;
+
+              ret = OK;
+
+              finfo("blocksize: %d erasesize: %d neraseblocks: %d\n",
+                    geo->blocksize, geo->erasesize, geo->neraseblocks);
+            }
+        }
+        break;
+
+      case MTDIOC_BULKERASE:
+        {
+            /* Erase the entire device */
+
+            is25xp_lock(priv->dev);
+            ret = is25xp_bulkerase(priv);
+            is25xp_unlock(priv->dev);
+        }
+        break;
+
+      case MTDIOC_XIPBASE:
+      default:
+        ret = -ENOTTY; /* Bad command */
+        break;
+    }
+
+  finfo("return %d\n", ret);
+  return ret;
+}
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: is25xp_initialize
+ *
+ * Description:
+ *   Create an initialize MTD device instance.  MTD devices are not registered
+ *   in the file system, but are created as instances that can be bound to
+ *   other functions (such as a block or character driver front end).
+ *
+ ************************************************************************************/
+
+FAR struct mtd_dev_s *is25xp_initialize(FAR struct spi_dev_s *dev)
+{
+  FAR struct is25xp_dev_s *priv;
+  int ret;
+
+  finfo("dev: %p\n", dev);
+
+  /* Allocate a state structure (we allocate the structure instead of using
+   * a fixed, static allocation so that we can handle multiple FLASH devices.
+   * The current implementation would handle only one FLASH part per SPI
+   * device (only because of the SPIDEV_FLASH definition) and so would have
+   * to be extended to handle multiple FLASH parts on the same SPI bus.
+   */
+
+  priv = (FAR struct is25xp_dev_s *)kmm_zalloc(sizeof(struct is25xp_dev_s));
+  if (priv)
+    {
+      /* Initialize the allocated structure. (unsupported methods were
+       * nullified by kmm_zalloc).
+       */
+
+      priv->mtd.erase  = is25xp_erase;
+      priv->mtd.bread  = is25xp_bread;
+      priv->mtd.bwrite = is25xp_bwrite;
+      priv->mtd.read   = is25xp_read;
+#ifdef CONFIG_MTD_BYTE_WRITE
+      priv->mtd.write  = is25xp_write;
+#endif
+      priv->mtd.ioctl  = is25xp_ioctl;
+      priv->dev        = dev;
+      priv->lastwaswrite = false;
+
+      /* Deselect the FLASH */
+
+      SPI_SELECT(dev, SPIDEV_FLASH, false);
+
+      /* Identify the FLASH chip and get its capacity */
+
+      ret = is25xp_readid(priv);
+      if (ret != OK)
+        {
+          /* Unrecognized! Discard all of that work we just did and return NULL */
+
+          ferr("ERROR: Unrecognized\n");
+          kmm_free(priv);
+          return NULL;
+        }
+      else
+        {
+          /* Make sure that the FLASH is unprotected so that we can write into it */
+
+          is25xp_unprotect(priv);
+        }
+    }
+
+  /* Register the MTD with the procfs system if enabled */
+
+#ifdef CONFIG_MTD_REGISTRATION
+  mtd_register(&priv->mtd, "is25xp");
+#endif
+
+  /* Return the implementation-specific state structure as the MTD device */
+
+  finfo("Return %p\n", priv);
+  return (FAR struct mtd_dev_s *)priv;
+}
diff --git a/drivers/mtd/m25px.c b/drivers/mtd/m25px.c
index f117c10d9124d8cfbd26c91c154c9af768fa7c73..4402995afbc326d51e7d127f675f49584efe5360 100644
--- a/drivers/mtd/m25px.c
+++ b/drivers/mtd/m25px.c
@@ -312,7 +312,7 @@ static inline int m25p_readid(struct m25p_dev_s *priv)
   uint16_t memory;
   uint16_t capacity;
 
-  fvdbg("priv: %p\n", priv);
+  finfo("priv: %p\n", priv);
 
   /* Lock the SPI bus, configure the bus, and select this FLASH part. */
 
@@ -331,7 +331,7 @@ static inline int m25p_readid(struct m25p_dev_s *priv)
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
   m25p_unlock(priv->dev);
 
-  fvdbg("manufacturer: %02x memory: %02x capacity: %02x\n",
+  finfo("manufacturer: %02x memory: %02x capacity: %02x\n",
         manufacturer, memory, capacity);
 
   /* Check for a valid manufacturer and memory type */
@@ -460,7 +460,7 @@ static void m25p_waitwritecomplete(struct m25p_dev_s *priv)
     }
   while ((status & M25P_SR_WIP) != 0);
 
-  fvdbg("Complete\n");
+  finfo("Complete\n");
 }
 
 /************************************************************************************
@@ -480,7 +480,7 @@ static void m25p_writeenable(struct m25p_dev_s *priv)
   /* Deselect the FLASH */
 
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
-  fvdbg("Enabled\n");
+  finfo("Enabled\n");
 }
 
 /************************************************************************************
@@ -502,7 +502,7 @@ static void m25p_sectorerase(struct m25p_dev_s *priv, off_t sector, uint8_t type
       offset = sector << priv->sectorshift;
     }
 
-  fvdbg("sector: %08lx\n", (long)sector);
+  finfo("sector: %08lx\n", (long)sector);
 
   /* Wait for any preceding write to complete.  We could simplify things by
    * perform this wait at the end of each write operation (rather than at
@@ -538,7 +538,7 @@ static void m25p_sectorerase(struct m25p_dev_s *priv, off_t sector, uint8_t type
   /* Deselect the FLASH */
 
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
-  fvdbg("Erased\n");
+  finfo("Erased\n");
 }
 
 /************************************************************************************
@@ -547,7 +547,7 @@ static void m25p_sectorerase(struct m25p_dev_s *priv, off_t sector, uint8_t type
 
 static inline int m25p_bulkerase(struct m25p_dev_s *priv)
 {
-  fvdbg("priv: %p\n", priv);
+  finfo("priv: %p\n", priv);
 
   /* Wait for any preceding write to complete.  We could simplify things by
    * perform this wait at the end of each write operation (rather than at
@@ -572,7 +572,7 @@ static inline int m25p_bulkerase(struct m25p_dev_s *priv)
   /* Deselect the FLASH */
 
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
-  fvdbg("Return: OK\n");
+  finfo("Return: OK\n");
   return OK;
 }
 
@@ -585,7 +585,7 @@ static inline void m25p_pagewrite(struct m25p_dev_s *priv, FAR const uint8_t *bu
 {
   off_t offset = page << priv->pageshift;
 
-  fvdbg("page: %08lx offset: %08lx\n", (long)page, (long)offset);
+  finfo("page: %08lx offset: %08lx\n", (long)page, (long)offset);
 
   /* Wait for any preceding write to complete.  We could simplify things by
    * perform this wait at the end of each write operation (rather than at
@@ -620,7 +620,7 @@ static inline void m25p_pagewrite(struct m25p_dev_s *priv, FAR const uint8_t *bu
   /* Deselect the FLASH: Chip Select high */
 
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
-  fvdbg("Written\n");
+  finfo("Written\n");
 }
 
 /************************************************************************************
@@ -631,7 +631,7 @@ static inline void m25p_pagewrite(struct m25p_dev_s *priv, FAR const uint8_t *bu
 static inline void m25p_bytewrite(struct m25p_dev_s *priv, FAR const uint8_t *buffer,
                                   off_t offset, uint16_t count)
 {
-  fvdbg("offset: %08lx  count:%d\n", (long)offset, count);
+  finfo("offset: %08lx  count:%d\n", (long)offset, count);
 
   /* Wait for any preceding write to complete.  We could simplify things by
    * perform this wait at the end of each write operation (rather than at
@@ -666,7 +666,7 @@ static inline void m25p_bytewrite(struct m25p_dev_s *priv, FAR const uint8_t *bu
   /* Deselect the FLASH: Chip Select high */
 
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
-  fvdbg("Written\n");
+  finfo("Written\n");
 }
 #endif
 
@@ -679,7 +679,7 @@ static int m25p_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblock
   FAR struct m25p_dev_s *priv = (FAR struct m25p_dev_s *)dev;
   size_t blocksleft = nblocks;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* Lock access to the SPI bus until we complete the erase */
 
@@ -747,7 +747,7 @@ static ssize_t m25p_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t nb
   FAR struct m25p_dev_s *priv = (FAR struct m25p_dev_s *)dev;
   ssize_t nbytes;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* On this device, we can handle the block read just like the byte-oriented read */
 
@@ -771,7 +771,7 @@ static ssize_t m25p_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t n
   size_t blocksleft = nblocks;
   size_t pagesize = 1 << priv->pageshift;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* Lock the SPI bus and write each page to FLASH */
 
@@ -796,7 +796,7 @@ static ssize_t m25p_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
 {
   FAR struct m25p_dev_s *priv = (FAR struct m25p_dev_s *)dev;
 
-  fvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+  finfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
 
   /* Wait for any preceding write to complete.  We could simplify things by
    * perform this wait at the end of each write operation (rather than at
@@ -829,7 +829,7 @@ static ssize_t m25p_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
 
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
   m25p_unlock(priv->dev);
-  fvdbg("return nbytes: %d\n", (int)nbytes);
+  finfo("return nbytes: %d\n", (int)nbytes);
   return nbytes;
 }
 
@@ -849,7 +849,7 @@ static ssize_t m25p_write(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes
   int    pagesize;
   int    bytestowrite;
 
-  fvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+  finfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
 
   /* We must test if the offset + count crosses one or more pages
    * and perform individual writes.  The devices can only write in
@@ -914,7 +914,7 @@ static int m25p_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
   FAR struct m25p_dev_s *priv = (FAR struct m25p_dev_s *)dev;
   int ret = -EINVAL; /* Assume good command with bad parameters */
 
-  fvdbg("cmd: %d \n", cmd);
+  finfo("cmd: %d \n", cmd);
 
   switch (cmd)
     {
@@ -949,7 +949,7 @@ static int m25p_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
 
               ret = OK;
 
-              fvdbg("blocksize: %d erasesize: %d neraseblocks: %d\n",
+              finfo("blocksize: %d erasesize: %d neraseblocks: %d\n",
                     geo->blocksize, geo->erasesize, geo->neraseblocks);
             }
         }
@@ -971,7 +971,7 @@ static int m25p_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
         break;
     }
 
-  fvdbg("return %d\n", ret);
+  finfo("return %d\n", ret);
   return ret;
 }
 
@@ -994,7 +994,7 @@ FAR struct mtd_dev_s *m25p_initialize(FAR struct spi_dev_s *dev)
   FAR struct m25p_dev_s *priv;
   int ret;
 
-  fvdbg("dev: %p\n", dev);
+  finfo("dev: %p\n", dev);
 
   /* Allocate a state structure (we allocate the structure instead of using
    * a fixed, static allocation so that we can handle multiple FLASH devices.
@@ -1031,9 +1031,9 @@ FAR struct mtd_dev_s *m25p_initialize(FAR struct spi_dev_s *dev)
         {
           /* Unrecognized! Discard all of that work we just did and return NULL */
 
-          fdbg("Unrecognized\n");
+          ferr("ERROR: Unrecognized\n");
           kmm_free(priv);
-          priv = NULL;
+          return NULL;
         }
     }
 
@@ -1045,6 +1045,6 @@ FAR struct mtd_dev_s *m25p_initialize(FAR struct spi_dev_s *dev)
 
   /* Return the implementation-specific state structure as the MTD device */
 
-  fvdbg("Return %p\n", priv);
+  finfo("Return %p\n", priv);
   return (FAR struct mtd_dev_s *)priv;
 }
diff --git a/drivers/mtd/mtd_config.c b/drivers/mtd/mtd_config.c
index d3cde695641eeb60099e4a85d8ee870c9cbb0097..ca6654b0e64687ade0232fbf6aee3390bb4c354c 100644
--- a/drivers/mtd/mtd_config.c
+++ b/drivers/mtd/mtd_config.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/mtd/mtd_config.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2017 Gregory Nutt. All rights reserved.
  *   Copyright (C) 2013 Ken Pettit. All rights reserved.
  *   Author: Ken Pettit 
  *           With Updates from Gregory Nutt 
@@ -61,7 +61,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 #ifdef CONFIG_MTD_CONFIG
 
@@ -101,13 +101,13 @@ struct mtdconfig_struct_s
   FAR uint8_t *buffer;        /* Temp block read buffer */
 };
 
-struct mtdconfig_header_s
+begin_packed_struct struct mtdconfig_header_s
 {
   uint8_t      flags;         /* Entry control flags */
   uint8_t      instance;      /* Instance of the item */
   uint16_t     id;            /* ID of the config data item */
   uint16_t     len;           /* Length of the data block */
-} packed_struct;
+} end_packed_struct;
 
 /****************************************************************************
  * Private Function Prototypes
@@ -1353,7 +1353,7 @@ int mtdconfig_register(FAR struct mtd_dev_s *mtd)
       ret = MTD_IOCTL(mtd, MTDIOC_GEOMETRY, (unsigned long)((uintptr_t)&geo));
       if (ret < 0)
         {
-          fdbg("MTD ioctl(MTDIOC_GEOMETRY) failed: %d\n", ret);
+          ferr("ERROR: MTD ioctl(MTDIOC_GEOMETRY) failed: %d\n", ret);
           kmm_free(dev);
           goto errout;
         }
diff --git a/drivers/mtd/mtd_nand.c b/drivers/mtd/mtd_nand.c
index da4327b50b581f0d33c895a760eba80df863917e..b5872e685427efaef5b3982c1bbd7598dd5a1530 100644
--- a/drivers/mtd/mtd_nand.c
+++ b/drivers/mtd/mtd_nand.c
@@ -153,7 +153,7 @@ static int nand_lock(FAR struct nand_dev_s *nand)
       errcode = errno;
       DEBUGASSERT(errcode != OK);
 
-      fdbg("sem_wait failed: %d\n", errcode);
+      ferr("ERROR: sem_wait failed: %d\n", errcode);
       return -errcode;
     }
 
@@ -200,14 +200,14 @@ static int nand_checkblock(FAR struct nand_dev_s *nand, off_t block)
   ret = NAND_RAWREAD(raw, block, 0, 0, spare);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to read page 0 of block %d\n", block);
+      ferr("ERROR: Failed to read page 0 of block %d\n", block);
       return ret;
     }
 
   nandscheme_readbadblockmarker(scheme, spare, &marker);
   if (marker != 0xff)
     {
-      fvdbg("Page 0 block %d marker=%02x\n", block, marker);
+      finfo("Page 0 block %d marker=%02x\n", block, marker);
       return BADBLOCK;
     }
 
@@ -216,14 +216,14 @@ static int nand_checkblock(FAR struct nand_dev_s *nand, off_t block)
   ret = NAND_RAWREAD(raw, block, 1, 0, spare);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to read page 1 of block %d\n", block);
+      ferr("ERROR: Failed to read page 1 of block %d\n", block);
       return ret;
     }
 
   nandscheme_readbadblockmarker(scheme, spare, &marker);
   if (marker != 0xff)
     {
-      fvdbg("Page 1 block %d marker=%02x\n", block, marker);
+      finfo("Page 1 block %d marker=%02x\n", block, marker);
       return BADBLOCK;
     }
 
@@ -250,7 +250,7 @@ static int nand_checkblock(FAR struct nand_dev_s *nand, off_t block)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_MTD_NAND_BLOCKCHECK) && defined(CONFIG_DEBUG_VERBOSE) && \
+#if defined(CONFIG_MTD_NAND_BLOCKCHECK) && defined(CONFIG_DEBUG_INFO) && \
     defined(CONFIG_DEBUG_FS)
 static int nand_devscan(FAR struct nand_dev_s *nand)
 {
@@ -258,7 +258,7 @@ static int nand_devscan(FAR struct nand_dev_s *nand)
   FAR struct nand_model_s *model;
   off_t nblocks;
   off_t block;
-#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
+#if defined(CONFIG_DEBUG_INFO) && defined(CONFIG_DEBUG_FS)
   off_t good;
   unsigned int ngood;
 #endif
@@ -275,11 +275,11 @@ static int nand_devscan(FAR struct nand_dev_s *nand)
 
   /* Initialize block statuses */
 
-  fvdbg("Retrieving bad block information. nblocks=%d\n", nblocks);
+  finfo("Retrieving bad block information. nblocks=%d\n", nblocks);
 
   /* Retrieve block status from their first page spare area */
 
-#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
+#if defined(CONFIG_DEBUG_INFO) && defined(CONFIG_DEBUG_FS)
   ngood = 0;
 #endif
 
@@ -290,24 +290,24 @@ static int nand_devscan(FAR struct nand_dev_s *nand)
       ret = nand_checkblock(nand, block);
       if (ret != GOODBLOCK)
         {
-#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
+#if defined(CONFIG_DEBUG_INFO) && defined(CONFIG_DEBUG_FS)
           if (ngood > 0)
             {
-              fvdbg("Good blocks: %u - %u\n", good, good + ngood);
+              finfo("Good blocks: %u - %u\n", good, good + ngood);
               ngood = 0;
             }
 #endif
           if (ret == BADBLOCK)
             {
-              fvdbg("Block %u is bad\n", (unsigned int)block);
+              finfo("Block %u is bad\n", (unsigned int)block);
             }
           else
             {
-              fdbg("ERROR: Cannot retrieve info from block %u: %d\n",
+              ferr("ERROR: Cannot retrieve info from block %u: %d\n",
                    (unsigned int)block, ret);
             }
         }
-#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
+#if defined(CONFIG_DEBUG_INFO) && defined(CONFIG_DEBUG_FS)
       else
         {
            if (ngood == 0)
@@ -320,16 +320,16 @@ static int nand_devscan(FAR struct nand_dev_s *nand)
 #endif
     }
 
-#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS)
+#if defined(CONFIG_DEBUG_INFO) && defined(CONFIG_DEBUG_FS)
   if (ngood > 0)
     {
-      fvdbg("Good blocks: %u - %u\n", good, good + ngood);
+      finfo("Good blocks: %u - %u\n", good, good + ngood);
     }
 #endif
 
   return OK;
 }
-#endif /* CONFIG_MTD_NAND_BLOCKCHECK &&  CONFIG_DEBUG_VERBOSE && CONFIG_DEBUG_FS */
+#endif /* CONFIG_MTD_NAND_BLOCKCHECK &&  CONFIG_DEBUG_INFO && CONFIG_DEBUG_FS */
 
 /****************************************************************************
  * Name: nand_chipid
@@ -360,7 +360,7 @@ static uint32_t nand_chipid(struct nand_raw_s *raw)
   id[3] = READ_DATA8(raw);
   id[4] = READ_DATA8(raw);
 
-  fvdbg("Chip ID: %02x %02x %02x %02x %02x\n",
+  finfo("Chip ID: %02x %02x %02x %02x %02x\n",
         id[0], id[1], id[2], id[3], id[4]);
 
   return  (uint32_t)id[0]        |
@@ -394,7 +394,7 @@ static int nand_eraseblock(FAR struct nand_dev_s *nand, off_t block,
   FAR struct nand_raw_s *raw;
   int ret;
 
-  /* fvdbg("Block %d\n", block); */
+  /* finfo("Block %d\n", block); */
   DEBUGASSERT(nand && nand->raw);
 
 #ifdef CONFIG_MTD_NAND_BLOCKCHECK
@@ -404,7 +404,7 @@ static int nand_eraseblock(FAR struct nand_dev_s *nand, off_t block,
 
       if (nand_checkblock(nand, block) != GOODBLOCK)
         {
-          fvdbg("Block is BAD\n");
+          finfo("Block is BAD\n");
           return -EAGAIN;
         }
     }
@@ -417,7 +417,7 @@ static int nand_eraseblock(FAR struct nand_dev_s *nand, off_t block,
     {
       int tmp;
 
-      fdbg("ERROR: Cannot erase block %ld\n", (long)block);
+      ferr("ERROR: Cannot erase block %ld\n", (long)block);
 
       /* Retrieve the model and scheme */
 
@@ -432,7 +432,7 @@ static int nand_eraseblock(FAR struct nand_dev_s *nand, off_t block,
       tmp = NAND_WRITEPAGE(nand->raw, block, 0, 0, spare);
       if (tmp < 0)
         {
-          fdbg("ERROR: Failed bo marke block %ld as BAD\n", (long)block);
+          ferr("ERROR: Failed bo marke block %ld as BAD\n", (long)block);
         }
     }
 
@@ -460,14 +460,14 @@ static int nand_eraseblock(FAR struct nand_dev_s *nand, off_t block,
 static int nand_readpage(FAR struct nand_dev_s *nand, off_t block,
                          unsigned int page, FAR uint8_t *data)
 {
-  fvdbg("block=%d page=%d data=%p\n", (int)block, page, data);
+  finfo("block=%d page=%d data=%p\n", (int)block, page, data);
 
 #ifdef CONFIG_MTD_NAND_BLOCKCHECK
   /* Check that the block is not BAD if data is requested */
 
   if (nand_checkblock(nand, block) != GOODBLOCK)
     {
-      fdbg("ERROR: Block is BAD\n");
+      ferr("ERROR: Block is BAD\n");
       return -EAGAIN;
    }
 #endif
@@ -520,7 +520,7 @@ static int nand_writepage(FAR struct nand_dev_s *nand, off_t block,
 
   if (nand_checkblock(nand, block) != GOODBLOCK)
     {
-      fdbg("ERROR: Block is BAD\n");
+      ferr("ERROR: Block is BAD\n");
       return -EAGAIN;
     }
 #endif
@@ -562,7 +562,7 @@ static int nand_erase(struct mtd_dev_s *dev, off_t startblock,
   size_t blocksleft = nblocks;
   int ret;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* Lock access to the NAND until we complete the erase */
 
@@ -574,7 +574,7 @@ static int nand_erase(struct mtd_dev_s *dev, off_t startblock,
       ret = nand_eraseblock(nand, startblock, false);
       if (ret < 0)
         {
-          fdbg("nand_eraseblock failed on block %ld: %d\n",
+          ferr("ERROR: nand_eraseblock failed on block %ld: %d\n",
                (long)startblock, ret);
           nand_unlock(nand);
           return ret;
@@ -609,7 +609,7 @@ static ssize_t nand_bread(struct mtd_dev_s *dev, off_t startpage,
   off_t block;
   int ret;
 
-  fvdbg("startpage: %ld npages: %d\n", (long)startpage, (int)npages);
+  finfo("startpage: %ld npages: %d\n", (long)startpage, (int)npages);
   DEBUGASSERT(nand && nand->raw);
 
   /* Retrieve the model */
@@ -642,7 +642,7 @@ static ssize_t nand_bread(struct mtd_dev_s *dev, off_t startpage,
 
       if (block > maxblock)
         {
-          fdbg("ERROR: Read beyond the end of FLASH, block=%ld\n",
+          ferr("ERROR: Read beyond the end of FLASH, block=%ld\n",
                (long)block);
 
           ret = -ESPIPE;
@@ -654,7 +654,7 @@ static ssize_t nand_bread(struct mtd_dev_s *dev, off_t startpage,
       ret = nand_readpage(nand, block, page, buffer);
       if (ret < 0)
         {
-          fdbg("ERROR: nand_readpage failed block=%ld page=%d: %d\n",
+          ferr("ERROR: nand_readpage failed block=%ld page=%d: %d\n",
                (long)block, page, ret);
           goto errout_with_lock;
         }
@@ -705,7 +705,7 @@ static ssize_t nand_bwrite(struct mtd_dev_s *dev, off_t startpage,
   off_t block;
   int ret;
 
-  fvdbg("startpage: %08lx npages: %d\n", (long)startpage, (int)npages);
+  finfo("startpage: %08lx npages: %d\n", (long)startpage, (int)npages);
   DEBUGASSERT(nand && nand->raw);
 
   /* Retrieve the model */
@@ -738,7 +738,7 @@ static ssize_t nand_bwrite(struct mtd_dev_s *dev, off_t startpage,
 
       if (block > maxblock)
         {
-          fdbg("ERROR: Write beyond the end of FLASH, block=%ld\n",
+          ferr("ERROR: Write beyond the end of FLASH, block=%ld\n",
                (long)block);
 
           ret = -ESPIPE;
@@ -750,7 +750,7 @@ static ssize_t nand_bwrite(struct mtd_dev_s *dev, off_t startpage,
       ret = nand_writepage(nand, block, page, buffer);
       if (ret < 0)
         {
-          fdbg("ERROR: nand_writepage failed block=%ld page=%d: %d\n",
+          ferr("ERROR: nand_writepage failed block=%ld page=%d: %d\n",
                (long)block, page, ret);
           goto errout_with_lock;
         }
@@ -864,7 +864,7 @@ FAR struct mtd_dev_s *nand_initialize(FAR struct nand_raw_s *raw)
   struct onfi_pgparam_s onfi;
   int ret;
 
-  fvdbg("cmdaddr=%p addraddr=%p dataaddr=%p\n",
+  finfo("cmdaddr=%p addraddr=%p dataaddr=%p\n",
         (FAR void *)raw->cmdaddr, (FAR void *)raw->addraddr,
         (FAR void *)raw->dataaddr);
 
@@ -872,7 +872,7 @@ FAR struct mtd_dev_s *nand_initialize(FAR struct nand_raw_s *raw)
 
   if (!onfi_ebidetect(raw->cmdaddr, raw->addraddr, raw->dataaddr))
     {
-      fdbg("ERROR: No NAND device detected at: %p %p %p\n",
+      ferr("ERROR: No NAND device detected at: %p %p %p\n",
            (FAR void *)raw->cmdaddr, (FAR void *)raw->addraddr,
            (FAR void *)raw->dataaddr);
       return NULL;
@@ -885,7 +885,7 @@ FAR struct mtd_dev_s *nand_initialize(FAR struct nand_raw_s *raw)
     {
       uint32_t chipid;
 
-      fvdbg("Failed to get ONFI page parameters: %d\n", ret);
+      finfo("Failed to get ONFI page parameters: %d\n", ret);
 
       /* If the ONFI model is not supported, determine the NAND
        * model from a lookup of known FLASH parts.
@@ -895,7 +895,7 @@ FAR struct mtd_dev_s *nand_initialize(FAR struct nand_raw_s *raw)
       if (nandmodel_find(g_nandmodels, NAND_NMODELS, chipid,
                          &raw->model))
        {
-          fdbg("ERROR: Could not determine NAND model\n");
+          ferr("ERROR: Could not determine NAND model\n");
           return NULL;
         }
     }
@@ -904,7 +904,7 @@ FAR struct mtd_dev_s *nand_initialize(FAR struct nand_raw_s *raw)
       FAR struct nand_model_s *model = &raw->model;
       uint64_t size;
 
-      fvdbg("Found ONFI compliant NAND FLASH\n");
+      finfo("Found ONFI compliant NAND FLASH\n");
 
       /* Construct the NAND model structure */
 
@@ -955,7 +955,7 @@ FAR struct mtd_dev_s *nand_initialize(FAR struct nand_raw_s *raw)
   nand = (FAR struct nand_dev_s *)kmm_zalloc(sizeof(struct nand_dev_s));
   if (!nand)
     {
-      fdbg("ERROR: Failed to allocate the NAND MTD device structure\n");
+      ferr("ERROR: Failed to allocate the NAND MTD device structure\n");
       return NULL;
     }
 
diff --git a/drivers/mtd/mtd_nandecc.c b/drivers/mtd/mtd_nandecc.c
index 55286b7460f8c5970c44e92d022c5769c22dd6d4..e22bc23175a69553a457c13ba92cdb11b5c0a880 100644
--- a/drivers/mtd/mtd_nandecc.c
+++ b/drivers/mtd/mtd_nandecc.c
@@ -97,7 +97,7 @@ int nandecc_readpage(FAR struct nand_dev_s *nand, off_t block,
   unsigned int sparesize;
   int ret;
 
-  fvdbg("block=%d page=%d data=%p spare=%d\n", (int)block, page, data, spare);
+  finfo("block=%d page=%d data=%p spare=%d\n", (int)block, page, data, spare);
 
   /* Get convenience pointers */
 
@@ -125,7 +125,7 @@ int nandecc_readpage(FAR struct nand_dev_s *nand, off_t block,
   ret = NAND_RAWREAD(raw, block, page, 0, spare);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to read page:d\n", ret);
+      ferr("ERROR: Failed to read page:d\n", ret);
       return ret;
     }
 
@@ -134,7 +134,7 @@ int nandecc_readpage(FAR struct nand_dev_s *nand, off_t block,
   ret = NAND_RAWREAD(nand->raw, block, page, data, 0);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to read page:d\n", ret);
+      ferr("ERROR: Failed to read page:d\n", ret);
       return ret;
     }
 
@@ -148,7 +148,7 @@ int nandecc_readpage(FAR struct nand_dev_s *nand, off_t block,
   ret = hamming_verify256x(data, pagesize, raw->ecc);
   if (ret && (ret != HAMMING_ERROR_SINGLEBIT))
     {
-      fdbg("ERROR: Block=%d page=%d Unrecoverable error: %d\n",
+      ferr("ERROR: Block=%d page=%d Unrecoverable error: %d\n",
            block, page, ret);
       return -EIO;
     }
@@ -189,7 +189,7 @@ int nandecc_writepage(FAR struct nand_dev_s *nand, off_t block,
   unsigned int sparesize;
   int ret;
 
-  fvdbg("block=%d page=%d data=%p spare=%d\n", (int)block, page, data, spare);
+  finfo("block=%d page=%d data=%p spare=%d\n", (int)block, page, data, spare);
 
   /* Get convenience pointers */
 
@@ -235,7 +235,7 @@ int nandecc_writepage(FAR struct nand_dev_s *nand, off_t block,
   ret = NAND_RAWWRITE(nand->raw, block, page, data, spare);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to write page:d\n", ret);
+      ferr("ERROR: Failed to write page:d\n", ret);
     }
 
   return ret;
diff --git a/drivers/mtd/mtd_nandmodel.c b/drivers/mtd/mtd_nandmodel.c
index f2dd2c259f21c3f22c729426b60727c9e68eb2af..cd3c324c9c3c033f76b5c8cf15a8ad38f56d6d66 100644
--- a/drivers/mtd/mtd_nandmodel.c
+++ b/drivers/mtd/mtd_nandmodel.c
@@ -92,13 +92,13 @@ int nandmodel_find(FAR const struct nand_model_s *modeltab, size_t size,
   id2 = (uint8_t)(chipid >> 8);
   id4 = (uint8_t)(chipid >> 24);
 
-  fvdbg("NAND ID is 0x%08x\n", (int)chipid);
+  finfo("NAND ID is 0x%08x\n", (int)chipid);
 
   for (i = 0; i < size; i++)
     {
       if (modeltab[i].devid == id2)
         {
-          fvdbg("NAND Model found: ID2=0x%02x ID4=0x%02x\n", id2, id4);
+          finfo("NAND Model found: ID2=0x%02x ID4=0x%02x\n", id2, id4);
           found = true;
 
           if (model)
@@ -155,11 +155,11 @@ int nandmodel_find(FAR const struct nand_model_s *modeltab, size_t size,
                     }
                 }
 
-              fvdbg("  devid:     0x%02x\n",  model->devid);
-              fvdbg("  devsize:   %d (MB)\n", model->devsize);
-              fvdbg("  blocksize: %d (KB)\n", model->blocksize);
-              fvdbg("  pagesize:  %d (B)\n",  model->pagesize);
-              fvdbg("  options:   0x%02x\n",  model->options);
+              finfo("  devid:     0x%02x\n",  model->devid);
+              finfo("  devsize:   %d (MB)\n", model->devsize);
+              finfo("  blocksize: %d (KB)\n", model->blocksize);
+              finfo("  pagesize:  %d (B)\n",  model->pagesize);
+              finfo("  options:   0x%02x\n",  model->options);
             }
           break;
         }
@@ -205,7 +205,7 @@ int nandmodel_translate(FAR const struct nand_model_s *model, off_t address,
 
   if ((address + size) > nandmodel_getdevbytesize(model))
     {
-      fvdbg("nandmodel_translate: out-of-bounds access.\n");
+      finfo("nandmodel_translate: out-of-bounds access.\n");
       return -ESPIPE;
     }
 
diff --git a/drivers/mtd/mtd_nandscheme.c b/drivers/mtd/mtd_nandscheme.c
index 367dcc18d6a4882b3eab8b7744b5e2bbd04661f2..cf0557f22ab1fbb85eda8754479eebbb0882e7ce 100644
--- a/drivers/mtd/mtd_nandscheme.c
+++ b/drivers/mtd/mtd_nandscheme.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * include/nuttx/mtd/mtd_nandscheme.c
+ * drivers/mtd/mtd_nandscheme.c
  *
  *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/drivers/mtd/mtd_onfi.c b/drivers/mtd/mtd_onfi.c
index aa4c6a09c0a06ae99b4b448dad96c400ae57532d..4a2a150f0f7241146d3d2657b6549f7060b776e1 100644
--- a/drivers/mtd/mtd_onfi.c
+++ b/drivers/mtd/mtd_onfi.c
@@ -273,12 +273,12 @@ int onfi_read(uintptr_t cmdaddr, uintptr_t addraddr, uintptr_t dataaddr,
   uint8_t parmtab[ONFI_PARAM_TABLE_SIZE];
   int i;
 
-  fvdbg("cmdaddr=%08x addraddr=%08x dataaddr=%08x\n",
+  finfo("cmdaddr=%08x addraddr=%08x dataaddr=%08x\n",
         (int)cmdaddr, (int)addraddr, (int)dataaddr);
 
   if (!onfi_compatible(cmdaddr, addraddr, dataaddr))
     {
-      fdbg("ERROR: No ONFI compatible device detected\n");
+      ferr("ERROR: No ONFI compatible device detected\n");
       return -ENODEV;
     }
 
@@ -316,7 +316,7 @@ int onfi_read(uintptr_t cmdaddr, uintptr_t addraddr, uintptr_t dataaddr,
 
   if (i == ONFI_PARAM_TABLE_SIZE)
     {
-      fdbg("ERROR: Failed to read ONFI parameter table\n");
+      ferr("ERROR: Failed to read ONFI parameter table\n");
       return -EIO;
    }
 
@@ -356,16 +356,16 @@ int onfi_read(uintptr_t cmdaddr, uintptr_t addraddr, uintptr_t dataaddr,
 
   onfi->model = *(FAR uint8_t *)(parmtab + 49);
 
-  fvdbg("Returning:\n");
-  fvdbg("  manufacturer:  0x%02x\n", onfi->manufacturer);
-  fvdbg("  buswidth:      %d\n",     onfi->buswidth);
-  fvdbg("  luns:          %d\n",     onfi->luns);
-  fvdbg("  eccsize:       %d\n",     onfi->eccsize);
-  fvdbg("  model:         0x%02s\n", onfi->model);
-  fvdbg("  sparesize:     %d\n",     onfi->sparesize);
-  fvdbg("  pagesperblock: %d\n",     onfi->pagesperblock);
-  fvdbg("  blocksperlun:  %d\n",     onfi->blocksperlun);
-  fvdbg("  pagesize:      %d\n",     onfi->pagesize);
+  finfo("Returning:\n");
+  finfo("  manufacturer:  0x%02x\n", onfi->manufacturer);
+  finfo("  buswidth:      %d\n",     onfi->buswidth);
+  finfo("  luns:          %d\n",     onfi->luns);
+  finfo("  eccsize:       %d\n",     onfi->eccsize);
+  finfo("  model:         0x%02s\n", onfi->model);
+  finfo("  sparesize:     %d\n",     onfi->sparesize);
+  finfo("  pagesperblock: %d\n",     onfi->pagesperblock);
+  finfo("  blocksperlun:  %d\n",     onfi->blocksperlun);
+  finfo("  pagesize:      %d\n",     onfi->pagesize);
   return OK;
 }
 
@@ -455,7 +455,7 @@ bool onfi_ebidetect(uintptr_t cmdaddr, uintptr_t addraddr,
   uint8_t ids[4];
   uint8_t i;
 
-  fvdbg("cmdaddr=%08x addraddr=%08x dataaddr=%08x\n",
+  finfo("cmdaddr=%08x addraddr=%08x dataaddr=%08x\n",
         (int)cmdaddr, (int)addraddr, (int)dataaddr);
 
   /* Send Reset command */
diff --git a/drivers/mtd/mtd_partition.c b/drivers/mtd/mtd_partition.c
index f6a148c753c80fb208a11e038ad9ec4f1079fd0d..655fe36826140445753bfd4e7f9adddd14e74a73 100644
--- a/drivers/mtd/mtd_partition.c
+++ b/drivers/mtd/mtd_partition.c
@@ -235,7 +235,7 @@ static int part_erase(FAR struct mtd_dev_s *dev, off_t startblock,
 
   if (!part_blockcheck(priv, (startblock + nblocks - 1) * priv->blkpererase))
     {
-      fdbg("ERROR: Erase beyond the end of the partition\n");
+      ferr("ERROR: Erase beyond the end of the partition\n");
       return -ENXIO;
     }
 
@@ -270,7 +270,7 @@ static ssize_t part_bread(FAR struct mtd_dev_s *dev, off_t startblock,
 
   if (!part_blockcheck(priv, startblock + nblocks - 1))
     {
-      fdbg("ERROR: Read beyond the end of the partition\n");
+      ferr("ERROR: Read beyond the end of the partition\n");
       return -ENXIO;
     }
 
@@ -301,7 +301,7 @@ static ssize_t part_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
 
   if (!part_blockcheck(priv, startblock + nblocks - 1))
     {
-      fdbg("ERROR: Write beyond the end of the partition\n");
+      ferr("ERROR: Write beyond the end of the partition\n");
       return -ENXIO;
     }
 
@@ -337,7 +337,7 @@ static ssize_t part_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
 
       if (!part_bytecheck(priv, offset + nbytes - 1))
         {
-          fdbg("ERROR: Read beyond the end of the partition\n");
+          ferr("ERROR: Read beyond the end of the partition\n");
           return -ENXIO;
         }
 
@@ -375,7 +375,7 @@ static ssize_t part_write(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes
 
       if (!part_bytecheck(priv, offset + nbytes - 1))
         {
-          fdbg("ERROR: Write beyond the end of the partition\n");
+          ferr("ERROR: Write beyond the end of the partition\n");
           return -ENXIO;
         }
 
@@ -479,7 +479,7 @@ static int part_procfs_open(FAR struct file *filep, FAR const char *relpath,
 {
   FAR struct part_procfs_file_s *attr;
 
-  fvdbg("Open '%s'\n", relpath);
+  finfo("Open '%s'\n", relpath);
 
   /* PROCFS is read-only.  Any attempt to open with any kind of write
    * access is not permitted.
@@ -489,7 +489,7 @@ static int part_procfs_open(FAR struct file *filep, FAR const char *relpath,
 
   if ((oflags & O_WRONLY) != 0 || (oflags & O_RDONLY) == 0)
     {
-      fdbg("ERROR: Only O_RDONLY supported\n");
+      ferr("ERROR: Only O_RDONLY supported\n");
       return -EACCES;
     }
 
@@ -498,7 +498,7 @@ static int part_procfs_open(FAR struct file *filep, FAR const char *relpath,
   attr = (FAR struct part_procfs_file_s *)kmm_zalloc(sizeof(struct part_procfs_file_s));
   if (!attr)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
@@ -550,7 +550,7 @@ static ssize_t part_procfs_read(FAR struct file *filep, FAR char *buffer,
   uint8_t x;
 #endif
 
-  fvdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+  finfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
 
   /* Recover our private data from the struct file instance */
 
@@ -591,7 +591,7 @@ static ssize_t part_procfs_read(FAR struct file *filep, FAR char *buffer,
                   MTDIOC_GEOMETRY, (unsigned long)((uintptr_t)&geo));
           if (ret < 0)
             {
-              fdbg("ERROR: mtd->ioctl failed: %d\n", ret);
+              ferr("ERROR: mtd->ioctl failed: %d\n", ret);
               return 0;
             }
 
@@ -702,7 +702,7 @@ static int part_procfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   FAR struct part_procfs_file_s *oldattr;
   FAR struct part_procfs_file_s *newattr;
 
-  fvdbg("Dup %p->%p\n", oldp, newp);
+  finfo("Dup %p->%p\n", oldp, newp);
 
   /* Recover our private data from the old struct file instance */
 
@@ -714,7 +714,7 @@ static int part_procfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   newattr = (FAR struct part_procfs_file_s *)kmm_zalloc(sizeof(struct part_procfs_file_s));
   if (!newattr)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
@@ -796,7 +796,7 @@ FAR struct mtd_dev_s *mtd_partition(FAR struct mtd_dev_s *mtd, off_t firstblock,
   ret = mtd->ioctl(mtd, MTDIOC_GEOMETRY, (unsigned long)((uintptr_t)&geo));
   if (ret < 0)
     {
-      fdbg("ERROR: mtd->ioctl failed: %d\n", ret);
+      ferr("ERROR: mtd->ioctl failed: %d\n", ret);
       return NULL;
     }
 
@@ -818,7 +818,7 @@ FAR struct mtd_dev_s *mtd_partition(FAR struct mtd_dev_s *mtd, off_t firstblock,
 
   if (erasestart >= eraseend)
     {
-      fdbg("ERROR: sub-region too small\n");
+      ferr("ERROR: sub-region too small\n");
       return NULL;
     }
 
@@ -827,7 +827,7 @@ FAR struct mtd_dev_s *mtd_partition(FAR struct mtd_dev_s *mtd, off_t firstblock,
   devblocks = blkpererase * geo.neraseblocks;
   if (eraseend > devblocks)
     {
-      fdbg("ERROR: sub-region too big\n");
+      ferr("ERROR: sub-region too big\n");
       return NULL;
     }
 
@@ -836,7 +836,7 @@ FAR struct mtd_dev_s *mtd_partition(FAR struct mtd_dev_s *mtd, off_t firstblock,
   part = (FAR struct mtd_partition_s *)kmm_zalloc(sizeof(struct mtd_partition_s));
   if (!part)
     {
-      fdbg("ERROR: Failed to allocate memory for the partition device\n");
+      ferr("ERROR: Failed to allocate memory for the partition device\n");
       return NULL;
     }
 
@@ -900,8 +900,8 @@ FAR struct mtd_dev_s *mtd_partition(FAR struct mtd_dev_s *mtd, off_t firstblock,
  *   Sets the name of the specified partition.
  *
  ****************************************************************************/
-#ifdef CONFIG_MTD_PARTITION_NAMES
 
+#ifdef CONFIG_MTD_PARTITION_NAMES
 int mtd_setpartitionname(FAR struct mtd_dev_s *mtd, FAR const char *name)
 {
   FAR struct mtd_partition_s *priv = (FAR struct mtd_partition_s *)mtd;
diff --git a/drivers/mtd/mtd_procfs.c b/drivers/mtd/mtd_procfs.c
index bc3071c7e078e6af32c84d0e47430bb10ff906de..4ba355110c62f2bdc43c717a798adb3cb647cb85 100644
--- a/drivers/mtd/mtd_procfs.c
+++ b/drivers/mtd/mtd_procfs.c
@@ -139,7 +139,7 @@ static int mtd_open(FAR struct file *filep, FAR const char *relpath,
 {
   FAR struct mtd_file_s *attr;
 
-  fvdbg("Open '%s'\n", relpath);
+  finfo("Open '%s'\n", relpath);
 
   /* PROCFS is read-only.  Any attempt to open with any kind of write
    * access is not permitted.
@@ -149,7 +149,7 @@ static int mtd_open(FAR struct file *filep, FAR const char *relpath,
 
   if ((oflags & O_WRONLY) != 0 || (oflags & O_RDONLY) == 0)
     {
-      fdbg("ERROR: Only O_RDONLY supported\n");
+      ferr("ERROR: Only O_RDONLY supported\n");
       return -EACCES;
     }
 
@@ -158,7 +158,7 @@ static int mtd_open(FAR struct file *filep, FAR const char *relpath,
   attr = (FAR struct mtd_file_s *)kmm_zalloc(sizeof(struct mtd_file_s));
   if (!attr)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
@@ -201,7 +201,7 @@ static ssize_t mtd_read(FAR struct file *filep, FAR char *buffer,
   ssize_t total = 0;
   ssize_t ret;
 
-  fvdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+  finfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
 
   /* Recover our private data from the struct file instance */
 
@@ -266,7 +266,7 @@ static int mtd_dup(FAR const struct file *oldp, FAR struct file *newp)
   FAR struct mtd_file_s *oldattr;
   FAR struct mtd_file_s *newattr;
 
-  fvdbg("Dup %p->%p\n", oldp, newp);
+  finfo("Dup %p->%p\n", oldp, newp);
 
   /* Recover our private data from the old struct file instance */
 
@@ -278,7 +278,7 @@ static int mtd_dup(FAR const struct file *oldp, FAR struct file *newp)
   newattr = (FAR struct mtd_file_s *)kmm_zalloc(sizeof(struct mtd_file_s));
   if (!newattr)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
diff --git a/drivers/mtd/mtd_rwbuffer.c b/drivers/mtd/mtd_rwbuffer.c
index 0e05a7c92bca2dbf82981d8f274820a068702c7c..8d2ffc2d47e2cce90ee3c4d709690a0c754711a6 100644
--- a/drivers/mtd/mtd_rwbuffer.c
+++ b/drivers/mtd/mtd_rwbuffer.c
@@ -52,7 +52,7 @@
 #include 
 
 #include 
-#include 
+#include 
 #include 
 #include 
 
@@ -174,7 +174,7 @@ static int mtd_erase(FAR struct mtd_dev_s *dev, off_t block, size_t nblocks)
   size_t nsectors;
   int ret;
 
-  fvdbg("block: %08lx nsectors: %lu\n",
+  finfo("block: %08lx nsectors: %lu\n",
         (unsigned long)block, (unsigned int)nsectors);
 
   /* Convert to logical sectors and sector numbers */
@@ -187,7 +187,7 @@ static int mtd_erase(FAR struct mtd_dev_s *dev, off_t block, size_t nblocks)
   ret = rwb_invalidate(&priv->rwb, sector, nsectors);
   if (ret < 0)
     {
-      fdbg("ERROR: rwb_invalidate failed: %d\n", ret);
+      ferr("ERROR: rwb_invalidate failed: %d\n", ret);
       return ret;
     }
 
@@ -253,7 +253,7 @@ static int mtd_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
   FAR struct mtd_rwbuffer_s *priv = (FAR struct mtd_rwbuffer_s *)dev;
   int ret = -EINVAL; /* Assume good command with bad parameters */
 
-  fvdbg("cmd: %d \n", cmd);
+  finfo("cmd: %d \n", cmd);
 
   switch (cmd)
     {
@@ -276,7 +276,7 @@ static int mtd_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
               geo->neraseblocks = priv->rwb.nblocks / priv->spb;
               ret               = OK;
 
-              fvdbg("blocksize: %d erasesize: %d neraseblocks: %d\n",
+              finfo("blocksize: %d erasesize: %d neraseblocks: %d\n",
                     geo->blocksize, geo->erasesize, geo->neraseblocks);
             }
         }
@@ -289,7 +289,7 @@ static int mtd_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
           ret = priv->dev->ioctl(priv->dev, MTDIOC_BULKERASE, 0);
           if (ret >= 0)
             {
-              fdbg("ERROR: Device ioctl failed: %d\n", ret);
+              ferr("ERROR: Device ioctl failed: %d\n", ret);
               break;
             }
 
@@ -298,7 +298,7 @@ static int mtd_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
          ret = rwb_invalidate(&priv->rwb, 0, priv->rwb.nblocks);
          if (ret < 0)
            {
-              fdbg("ERROR: rwb_invalidate failed: %d\n", ret);
+              ferr("ERROR: rwb_invalidate failed: %d\n", ret);
            }
         }
         break;
@@ -309,7 +309,7 @@ static int mtd_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
         break;
     }
 
-  fvdbg("return %d\n", ret);
+  finfo("return %d\n", ret);
   return ret;
 }
 
@@ -337,7 +337,7 @@ FAR struct mtd_dev_s *mtd_rwb_initialize(FAR struct mtd_dev_s *mtd)
   struct mtd_geometry_s geo;
   int ret;
 
-  fvdbg("mtd: %p\n", mtd);
+  finfo("mtd: %p\n", mtd);
   DEBUGASSERT(mtd && mtd->ioctl);
 
   /* Get the device geometry */
@@ -345,7 +345,7 @@ FAR struct mtd_dev_s *mtd_rwb_initialize(FAR struct mtd_dev_s *mtd)
   ret = mtd->ioctl(mtd, MTDIOC_GEOMETRY, (unsigned long)((uintptr_t)&geo));
   if (ret < 0)
     {
-      fdbg("ERROR: MTDIOC_GEOMETRY ioctl failed: %d\n", ret);
+      ferr("ERROR: MTDIOC_GEOMETRY ioctl failed: %d\n", ret);
       return NULL;
     }
 
@@ -404,7 +404,7 @@ FAR struct mtd_dev_s *mtd_rwb_initialize(FAR struct mtd_dev_s *mtd)
       ret = rwb_initialize(&priv->rwb);
       if (ret < 0)
         {
-          fdbg("ERROR: rwb_initialize failed: %d\n", ret);
+          ferr("ERROR: rwb_initialize failed: %d\n", ret);
           kmm_free(priv);
           return NULL;
         }
@@ -418,7 +418,7 @@ FAR struct mtd_dev_s *mtd_rwb_initialize(FAR struct mtd_dev_s *mtd)
 
   /* Return the implementation-specific state structure as the MTD device */
 
-  fvdbg("Return %p\n", priv);
+  finfo("Return %p\n", priv);
   return &priv->mtd;
 }
 
diff --git a/drivers/mtd/mx25lx.c b/drivers/mtd/mx25lx.c
new file mode 100644
index 0000000000000000000000000000000000000000..47c447cf1b2ba310b752e77c5b2ebac9233963e0
--- /dev/null
+++ b/drivers/mtd/mx25lx.c
@@ -0,0 +1,1052 @@
+/************************************************************************************
+ * drivers/mtd/mx25lx.c
+ * Driver for SPI-based or QSPI-based MX25Lxx33L parts of 32 or 64MBit.
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Aleksandr Vyhovanec 
+ *
+ *   Copied from / based on sst25.c and w25.c drivers written by
+ *   Gregory Nutt 
+ *   Ken Pettit 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Configuration ********************************************************************/
+/* Per the data sheet, MX25L parts can be driven with either SPI mode 0 (CPOL=0 and
+ * CPHA=0) or mode 3 (CPOL=1 and CPHA=1).  So you may need to specify
+ * CONFIG_MX25L_SPIMODE to select the best mode for your device.  If
+ * CONFIG_MX25L_SPIMODE is not defined, mode 0 will be used.
+ */
+
+#ifndef CONFIG_MX25L_SPIMODE
+#  define CONFIG_MX25L_SPIMODE SPIDEV_MODE0
+#endif
+
+/* SPI Frequency.  May be up to 133 MHz. */
+
+#ifndef CONFIG_MX25L_SPIFREQUENCY
+#  define CONFIG_MX25L_SPIFREQUENCY 20000000
+#endif
+
+/* Chip Geometries ******************************************************************/
+
+/* MX25L3233F capacity is 32Mbit  (4096Kbit x 8) =   4Mb (512kb x 8) */
+
+#define MX25L_MX25L3233F_SECTOR_SHIFT  12    /* Sector size 1 << 12 = 4Kb */
+#define MX25L_MX25L3233F_NSECTORS      1024
+#define MX25L_MX25L3233F_PAGE_SHIFT    8     /* Page size 1 << 8 = 256 */
+
+/* MX25L6433F capacity is 32Mbit  (8192Kbit x 8) =   8Mb (1024kb x 8) */
+
+#define MX25L_MX25L6433F_SECTOR_SHIFT  12    /* Sector size 1 << 12 = 4Kb */
+#define MX25L_MX25L6433F_NSECTORS      2048
+#define MX25L_MX25L6433F_PAGE_SHIFT    8     /* Page size 1 << 8 = 256 */
+   
+#ifdef CONFIG_MX25L_SECTOR512                /* Simulate a 512 byte sector */
+#  define MX25L_SECTOR512_SHIFT        9     /* Sector size 1 << 9 = 512 bytes */
+#endif
+
+#define MX25L_ERASED_STATE             0xff   /* State of FLASH when erased */
+
+#define MX25L_CACHE_VALID          (1 << 0)   /* 1=Cache has valid data */
+#define MX25L_CACHE_DIRTY          (1 << 1)   /* 1=Cache is dirty */
+#define MX25L_CACHE_ERASED         (1 << 2)   /* 1=Backing FLASH is erased */
+
+#define IS_VALID(p)                ((((p)->flags) & MX25L_CACHE_VALID) != 0)
+#define IS_DIRTY(p)                ((((p)->flags) & MX25L_CACHE_DIRTY) != 0)
+#define IS_ERASED(p)               ((((p)->flags) & MX25L_CACHE_ERASED) != 0)
+
+#define SET_VALID(p)               do { (p)->flags |= MX25L_CACHE_VALID; } while (0)
+#define SET_DIRTY(p)               do { (p)->flags |= MX25L_CACHE_DIRTY; } while (0)
+#define SET_ERASED(p)              do { (p)->flags |= MX25L_CACHE_ERASED; } while (0)
+
+#define CLR_VALID(p)               do { (p)->flags &= ~MX25L_CACHE_VALID; } while (0)
+#define CLR_DIRTY(p)               do { (p)->flags &= ~MX25L_CACHE_DIRTY; } while (0)
+#define CLR_ERASED(p)              do { (p)->flags &= ~MX25L_CACHE_ERASED; } while (0)
+
+/* MX25L Instructions *****************************************************************/
+/*      Command                    Value      Description               Addr   Data   */
+/*                                                                         Dummy      */
+#define MX25L_READ                  0x03    /* Read data bytes          3   0   >=1   */
+#define MX25L_FAST_READ             0x0b    /* Higher speed read        3   1   >=1   */
+#define MX25L_2READ                 0xbb    /* 2 x I/O read command     */
+#define MX25L_DREAD                 0x3b    /* 1I / 2O read command     3   1   >=1   */
+#define MX25L_4READ                 0xeb    /* 4 x I/O read command     */
+#define MX25L_QREAD                 0x6b    /* 1I / 4O read command     3   1   >=1   */
+#define MX25L_WREN                  0x06    /* Write Enable             0   0   0     */ 
+#define MX25L_WRDI                  0x04    /* Write Disable            0   0   0     */ 
+#define MX25L_RDSR                  0x05    /* Read status register     0   0   >=1   */ 
+#define MX25L_RDCR                  0x15    /* Read config register     0   0   >=1   */ 
+#define MX25L_WRSR                  0x01    /* Write stat/conf register 0   0   2     */ 
+#define MX25L_4PP                   0x38    /* Quad page program        3   0   1-256 */
+#define MX25L_SE                    0x20    /* 4Kb Sector erase         3   0   0     */
+#define MX25L_BE32                  0x52    /* 32Kbit block Erase       3   0   0     */
+#define MX25L_BE64                  0xd8    /* 64Kbit block Erase       3   0   0     */
+#define MX25L_CE                    0xc7    /* Chip erase               0   0   0     */ 
+#define MX25L_CE_ALT                0x60    /* Chip erase (alternate)   0   0   0     */ 
+#define MX25L_PP                    0x02    /* Page program             3   0   1-256 */
+#define MX25L_DP                    0xb9    /* Deep power down          0   0   0     */ 
+#define MX25L_RDP                   0xab    /* Release deep power down  0   0   0     */ 
+#define MX25L_PGM_SUSPEND           0x75    /* Suspends program         0   0   0     */ 
+#define MX25L_ERS_SUSPEND           0xb0    /* Suspends erase           0   0   0     */ 
+#define MX25L_PGM_RESUME            0x7A    /* Resume program           0   0   0     */ 
+#define MX25L_ERS_RESUME            0x30    /* Resume erase             0   0   0     */ 
+#define MX25L_RDID                  0x9f    /* Read identification      0   0   3     */ 
+#define MX25L_RES                   0xab    /* Read electronic ID       0   3   1     */
+#define MX25L_REMS                  0x90    /* Read manufacture and ID  1   2   >=2   */
+#define MX25L_ENSO                  0xb1    /* Enter secured OTP        0   0   0     */ 
+#define MX25L_EXSO                  0xc1    /* Exit secured OTP         0   0   0     */ 
+#define MX25L_RDSCUR                0x2b    /* Read security register   0   0   0     */ 
+#define MX25L_WRSCUR                0x2f    /* Write security register  0   0   0     */ 
+#define MX25L_RSTEN                 0x66    /* Reset Enable             0   0   0     */ 
+#define MX25L_RST                   0x99    /* Reset Memory             0   0   0     */ 
+#define MX25L_RDSFDP                0x5a    /* read out until CS# high  */
+#define MX25L_SBL                   0xc0    /* Set Burst Length         */
+#define MX25L_SBL_ALT               0x77    /* Set Burst Length         */
+#define MX25L_NOP                   0x00    /* No Operation             0   0   0     */ 
+
+/* MX25L Registers ******************************************************************/
+/* Read ID (RDID) register values */
+
+#define MX25L_MANUFACTURER          0xc2  /* Macronix manufacturer ID */
+#define MX25L3233F_DEVID            0x15  /* MX25L3233F device ID */
+
+/* JEDEC Read ID register values */
+
+#define MX25L_JEDEC_MANUFACTURER         0xc2  /* Macronix manufacturer ID */
+#define MX25L_JEDEC_MEMORY_TYPE          0x20  /* MX25Lx  memory type */
+#define MX25L_JEDEC_MX25L3233F_CAPACITY  0x16  /* MX25L3233F memory capacity */
+#define MX25L_JEDEC_MX25L6433F_CAPACITY  0x17  /* MX25L6433F memory capacity */
+
+/* Status register bit definitions */
+
+#define MX25L_SR_WIP                (1 << 0)  /* Bit 0: Write in progress */
+#define MX25L_SR_WEL                (1 << 1)  /* Bit 1: Write enable latch */
+#define MX25L_SR_BP_SHIFT           (2)       /* Bits 2-5: Block protect bits */
+#define MX25L_SR_BP_MASK            (15 << MX25L_SR_BP_SHIFT)
+#define MX25L_SR_QE                 (1 << 6)  /* Bit 6: Quad enable */
+#define MX25L_SR_SRWD               (1 << 7)  /* Bit 7: Status register write protect */
+
+/* Configuration registerregister bit definitions */
+
+#define MX25L_CR_ODS                (1 << 0)  /* Bit 0: Output driver strength */
+#define MX25L_CR_TB                 (1 << 3)  /* Bit 3: Top/bottom selected */
+#define MX25L_CR_DC                 (1 << 6)  /* Bit 6: Dummy cycle */
+
+#define MX25L_DUMMY                 MX25L_NOP
+
+/* Debug ****************************************************************************/
+
+#ifdef CONFIG_MX25L_DEBUG
+# define mxlerr(format, ...)    _err(format, ##__VA_ARGS__)
+# define mxlinfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+# define mxlerr(x...)
+# define mxlinfo(x...)
+#endif
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+
+/* This type represents the state of the MTD device.  The struct mtd_dev_s
+ * must appear at the beginning of the definition so that you can freely
+ * cast between pointers to struct mtd_dev_s and struct mx25l_dev_s.
+ */
+
+struct mx25l_dev_s
+{
+  struct mtd_dev_s mtd;              /* MTD interface */
+  FAR struct spi_dev_s *dev;         /* Saved SPI interface instance */
+  uint8_t               sectorshift;
+  uint8_t               pageshift;
+  uint16_t              nsectors;
+#if defined(CONFIG_MX25L_SECTOR512)
+  uint8_t               flags;       /* Buffered sector flags */
+  uint16_t              esectno;     /* Erase sector number in the cache */
+  FAR uint8_t          *sector;      /* Allocated sector data */
+#endif
+};
+
+/************************************************************************************
+ * Private Function Prototypes
+ ************************************************************************************/
+
+/* Helpers */
+
+static void mx25l_lock(FAR struct spi_dev_s *dev);
+static inline void mx25l_unlock(FAR struct spi_dev_s *dev);
+static inline int mx25l_readid(FAR struct mx25l_dev_s *priv);
+static void mx25l_waitwritecomplete(FAR struct mx25l_dev_s *priv);
+static void mx25l_writeenable(FAR struct mx25l_dev_s *priv);
+static void mx25l_writedisable(FAR struct mx25l_dev_s *priv);
+static inline void mx25l_sectorerase(FAR struct mx25l_dev_s *priv, off_t offset);
+static inline int  mx25l_chiperase(FAR struct mx25l_dev_s *priv);
+static void mx25l_byteread(FAR struct mx25l_dev_s *priv, FAR uint8_t *buffer,
+                           off_t address, size_t nbytes);
+static inline void mx25l_pagewrite(FAR struct mx25l_dev_s *priv,
+                                   FAR const uint8_t *buffer,
+                                   off_t address, size_t nbytes);
+#if defined(CONFIG_MX25L_SECTOR512)
+static void mx25l_cacheflush(FAR struct mx25l_dev_s *priv);
+static FAR uint8_t *mx25l_cacheread(FAR struct mx25l_dev_s *priv, off_t sector);
+static void mx25l_cacheerase(FAR struct mx25l_dev_s *priv, off_t sector);
+static void mx25l_cachewrite(FAR struct mx25l_dev_s *priv,
+                             FAR const uint8_t *buffer,
+                             off_t sector, size_t nsectors);
+#endif
+
+/* MTD driver methods */
+
+static int mx25l_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks);
+static ssize_t mx25l_bread(FAR struct mtd_dev_s *dev, off_t startblock,
+                           size_t nblocks, FAR uint8_t *buf);
+static ssize_t mx25l_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
+                            size_t nblocks, FAR const uint8_t *buf);
+static ssize_t mx25l_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
+                          FAR uint8_t *buffer);
+static int mx25l_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg);
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: mx25l_lock
+ ************************************************************************************/
+
+static void mx25l_lock(FAR struct spi_dev_s *dev)
+{
+  /* On SPI busses where there are multiple devices, it will be necessary to
+   * lock SPI to have exclusive access to the busses for a sequence of
+   * transfers.  The bus should be locked before the chip is selected.
+   *
+   * This is a blocking call and will not return until we have exclusiv access to
+   * the SPI buss.  We will retain that exclusive access until the bus is unlocked.
+   */
+
+  (void)SPI_LOCK(dev, true);
+
+  /* After locking the SPI bus, the we also need call the setfrequency, setbits, and
+   * setmode methods to make sure that the SPI is properly configured for the device.
+   * If the SPI buss is being shared, then it may have been left in an incompatible
+   * state.
+   */
+
+  SPI_SETMODE(dev, CONFIG_MX25L_SPIMODE);
+  SPI_SETBITS(dev, 8);
+  (void)SPI_HWFEATURES(dev, 0);
+  (void)SPI_SETFREQUENCY(dev, CONFIG_MX25L_SPIFREQUENCY);
+}
+
+/************************************************************************************
+ * Name: mx25l_unlock
+ ************************************************************************************/
+
+static inline void mx25l_unlock(FAR struct spi_dev_s *dev)
+{
+  (void)SPI_LOCK(dev, false);
+}
+
+/************************************************************************************
+ * Name: mx25l_readid
+ ************************************************************************************/
+
+static inline int mx25l_readid(FAR struct mx25l_dev_s *priv)
+{
+  uint16_t manufacturer;
+  uint16_t memory;
+  uint16_t capacity;
+
+  mxlinfo("priv: %p\n", priv);
+
+  /* Lock the SPI bus, configure the bus, and select this FLASH part. */
+
+  mx25l_lock(priv->dev);
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send the "Read ID (RDID)" command and read the first three ID bytes */
+
+  (void)SPI_SEND(priv->dev, MX25L_RDID);
+  manufacturer = SPI_SEND(priv->dev, MX25L_DUMMY);
+  memory       = SPI_SEND(priv->dev, MX25L_DUMMY);
+  capacity     = SPI_SEND(priv->dev, MX25L_DUMMY);
+
+  /* Deselect the FLASH and unlock the bus */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+  mx25l_unlock(priv->dev);
+
+  mxlinfo("manufacturer: %02x memory: %02x capacity: %02x\n",
+          manufacturer, memory, capacity);
+
+  /* Check for a valid manufacturer and memory type */
+
+  if (manufacturer == MX25L_JEDEC_MANUFACTURER && memory == MX25L_JEDEC_MEMORY_TYPE)
+    {
+      /* Okay.. is it a FLASH capacity that we understand? */
+
+      if (capacity == MX25L_JEDEC_MX25L3233F_CAPACITY)
+        {
+           /* Save the FLASH geometry */
+
+           priv->sectorshift = MX25L_MX25L3233F_SECTOR_SHIFT;
+           priv->nsectors    = MX25L_MX25L3233F_NSECTORS;
+           priv->pageshift   = MX25L_MX25L3233F_PAGE_SHIFT;
+           return OK;
+        }
+      else if (capacity == MX25L_JEDEC_MX25L6433F_CAPACITY)
+        {
+           /* Save the FLASH geometry */
+
+           priv->sectorshift = MX25L_MX25L6433F_SECTOR_SHIFT;
+           priv->nsectors    = MX25L_MX25L6433F_NSECTORS;
+           priv->pageshift   = MX25L_MX25L6433F_PAGE_SHIFT;
+           return OK;
+        }
+    }
+
+  return -ENODEV;
+}
+
+/************************************************************************************
+ * Name: mx25l_waitwritecomplete
+ ************************************************************************************/
+
+static void mx25l_waitwritecomplete(FAR struct mx25l_dev_s *priv)
+{
+  uint8_t status;
+
+  /* Loop as long as the memory is busy with a write cycle */
+
+  do
+    {
+      /* Select this FLASH part */
+
+      SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+      /* Send "Read Status Register (RDSR)" command */
+
+      (void)SPI_SEND(priv->dev, MX25L_RDSR);
+
+      /* Send a dummy byte to generate the clock needed to shift out the status */
+
+      status = SPI_SEND(priv->dev, MX25L_DUMMY);
+
+      /* Deselect the FLASH */
+
+      SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+
+      /* Given that writing could take up to few tens of milliseconds, and erasing
+       * could take more.  The following short delay in the "busy" case will allow
+       * other peripherals to access the SPI bus.
+       */
+
+      if ((status & MX25L_SR_WIP) != 0)
+        {
+          mx25l_unlock(priv->dev);
+          usleep(1000);
+          mx25l_lock(priv->dev);
+        }
+    }
+  while ((status & MX25L_SR_WIP) != 0);
+
+  mxlinfo("Complete\n");
+}
+
+/************************************************************************************
+ * Name:  mx25l_writeenable
+ ************************************************************************************/
+
+static void mx25l_writeenable(FAR struct mx25l_dev_s *priv)
+{
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send "Write Enable (WREN)" command */
+
+  (void)SPI_SEND(priv->dev, MX25L_WREN);
+
+  /* Deselect the FLASH */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+
+  mxlinfo("Enabled\n");
+}
+
+/************************************************************************************
+ * Name:  mx25l_writedisable
+ ************************************************************************************/
+
+static void mx25l_writedisable(FAR struct mx25l_dev_s *priv)
+{
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send "Write Disable (WRDI)" command */
+
+  (void)SPI_SEND(priv->dev, MX25L_WRDI);
+
+  /* Deselect the FLASH */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+
+  mxlinfo("Disabled\n");
+}
+
+/************************************************************************************
+ * Name:  mx25l_sectorerase (4k)
+ ************************************************************************************/
+
+static void mx25l_sectorerase(FAR struct mx25l_dev_s *priv, off_t sector)
+{
+  off_t offset;
+
+  offset = sector << priv->sectorshift;
+
+  mxlinfo("sector: %08lx\n", (long)sector);
+
+  /* Send write enable instruction */
+
+  mx25l_writeenable(priv);
+
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send the "Sector Erase (SE)" or "Block Erase (BE)" instruction
+   * that was passed in as the erase type.
+   */
+
+  (void)SPI_SEND(priv->dev, MX25L_SE);
+
+  /* Send the sector offset high byte first.  For all of the supported
+   * parts, the sector number is completely contained in the first byte
+   * and the values used in the following two bytes don't really matter.
+   */
+
+  (void)SPI_SEND(priv->dev, (offset >> 16) & 0xff);
+  (void)SPI_SEND(priv->dev, (offset >> 8) & 0xff);
+  (void)SPI_SEND(priv->dev, offset & 0xff);
+
+  /* Deselect the FLASH */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+
+  mx25l_waitwritecomplete(priv);
+
+  mxlinfo("Erased\n");
+}
+
+/************************************************************************************
+ * Name:  mx25l_chiperase
+ ************************************************************************************/
+
+static inline int mx25l_chiperase(FAR struct mx25l_dev_s *priv)
+{
+  mxlinfo("priv: %p\n", priv);
+
+  /* Send write enable instruction */
+
+  mx25l_writeenable(priv);
+
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send the "Chip Erase (CE)" instruction */
+
+  (void)SPI_SEND(priv->dev, MX25L_CE);
+
+  /* Deselect the FLASH */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+
+  mx25l_waitwritecomplete(priv);
+
+  mxlinfo("Return: OK\n");
+  return OK;
+}
+
+/************************************************************************************
+ * Name: mx25l_byteread
+ ************************************************************************************/
+
+static void mx25l_byteread(FAR struct mx25l_dev_s *priv, FAR uint8_t *buffer,
+                           off_t address, size_t nbytes)
+{
+  mxlinfo("address: %08lx nbytes: %d\n", (long)address, (int)nbytes);
+
+  /* Wait for any preceding write or erase operation to complete. */
+
+  mx25l_waitwritecomplete(priv);
+
+  /* Make sure that writing is disabled */
+
+  mx25l_writedisable(priv);
+
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send "Read from Memory " instruction */
+
+  (void)SPI_SEND(priv->dev, MX25L_FAST_READ);
+
+  /* Send the address high byte first. */
+
+  (void)SPI_SEND(priv->dev, (address >> 16) & 0xff);
+  (void)SPI_SEND(priv->dev, (address >> 8) & 0xff);
+  (void)SPI_SEND(priv->dev, address & 0xff);
+
+  /* Send a dummy byte */
+
+  (void)SPI_SEND(priv->dev, MX25L_DUMMY);
+
+  /* Then read all of the requested bytes */
+
+  SPI_RECVBLOCK(priv->dev, buffer, nbytes);
+
+  /* Deselect the FLASH */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+}
+
+/************************************************************************************
+ * Name:  mx25l_pagewrite
+ ************************************************************************************/
+
+static inline void mx25l_pagewrite(FAR struct mx25l_dev_s *priv,
+                                   FAR const uint8_t *buffer,
+                                   off_t address, size_t nbytes)
+{
+  mxlinfo("address: %08lx nwords: %d\n", (long)address, (int)nbytes);
+
+  for (; nbytes > 0; nbytes -= (1 << priv->pageshift))
+    {
+      /* Enable the write access to the FLASH */
+      
+      mx25l_writeenable(priv);
+      
+      /* Select this FLASH part */
+
+      SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+      /* Send the "Page Program (MX25L_PP)" Command */
+
+      SPI_SEND(priv->dev, MX25L_PP);
+
+      /* Send the address high byte first. */
+
+      (void)SPI_SEND(priv->dev, (address >> 16) & 0xff);
+      (void)SPI_SEND(priv->dev, (address >> 8) & 0xff);
+      (void)SPI_SEND(priv->dev, address & 0xff);
+
+      /* Then send the page of data */
+
+      SPI_SNDBLOCK(priv->dev, buffer, 1 << priv->pageshift);
+
+      /* Deselect the FLASH and setup for the next pass through the loop */
+
+      SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+      
+      /* Wait for any preceding write or erase operation to complete. */
+
+      mx25l_waitwritecomplete(priv);      
+
+      /* Update addresses */
+
+      address += 1 << priv->pageshift;
+      buffer  += 1 << priv->pageshift;
+    }
+
+  mxlinfo("Written\n");
+}
+
+/************************************************************************************
+ * Name: mx25l_cacheflush
+ ************************************************************************************/
+
+#if defined(CONFIG_MX25L_SECTOR512)
+static void mx25l_cacheflush(FAR struct mx25l_dev_s *priv)
+{
+  /* If the cached is dirty (meaning that it no longer matches the old FLASH contents)
+   * or was erased (with the cache containing the correct FLASH contents), then write
+   * the cached erase block to FLASH.
+   */
+
+  if (IS_DIRTY(priv) || IS_ERASED(priv))
+    {
+      /* Write entire erase block to FLASH */
+
+      mx25l_pagewrite(priv, priv->sector, (off_t)priv->esectno << priv->sectorshift,
+                      (1 << priv->sectorshift));
+
+      /* The case is no long dirty and the FLASH is no longer erased */
+
+      CLR_DIRTY(priv);
+      CLR_ERASED(priv);
+    }
+}
+#endif
+
+/************************************************************************************
+ * Name: mx25l_cacheread
+ ************************************************************************************/
+
+#if defined(CONFIG_MX25L_SECTOR512)
+static FAR uint8_t *mx25l_cacheread(FAR struct mx25l_dev_s *priv, off_t sector)
+{
+  off_t esectno;
+  int   shift;
+  int   index;
+
+  /* Convert from the 512 byte sector to the erase sector size of the device.  For
+   * exmample, if the actual erase sector size if 4Kb (1 << 12), then we first
+   * shift to the right by 3 to get the sector number in 4096 increments.
+   */
+
+  shift    = priv->sectorshift - MX25L_SECTOR512_SHIFT;
+  esectno  = sector >> shift;
+  mxlinfo("sector: %ld esectno: %d shift=%d\n", sector, esectno, shift);
+
+  /* Check if the requested erase block is already in the cache */
+
+  if (!IS_VALID(priv) || esectno != priv->esectno)
+    {
+      /* No.. Flush any dirty erase block currently in the cache */
+
+      mx25l_cacheflush(priv);
+
+      /* Read the erase block into the cache */
+
+      mx25l_byteread(priv, priv->sector, (esectno << priv->sectorshift), 1 << priv->sectorshift);
+
+      /* Mark the sector as cached */
+
+      priv->esectno = esectno;
+
+      SET_VALID(priv);          /* The data in the cache is valid */
+      CLR_DIRTY(priv);          /* It should match the FLASH contents */
+      CLR_ERASED(priv);         /* The underlying FLASH has not been erased */
+    }
+
+  /* Get the index to the 512 sector in the erase block that holds the argument */
+
+  index = sector & ((1 << shift) - 1);
+
+  /* Return the address in the cache that holds this sector */
+
+  return &priv->sector[index << MX25L_SECTOR512_SHIFT];
+}
+#endif
+
+/************************************************************************************
+ * Name: mx25l_cacheerase
+ ************************************************************************************/
+
+#if defined(CONFIG_MX25L_SECTOR512)
+static void mx25l_cacheerase(FAR struct mx25l_dev_s *priv, off_t sector)
+{
+  FAR uint8_t *dest;
+
+  /* First, make sure that the erase block containing the 512 byte sector is in
+   * the cache.
+   */
+
+  dest = mx25l_cacheread(priv, sector);
+
+  /* Erase the block containing this sector if it is not already erased.
+   * The erased indicated will be cleared when the data from the erase sector
+   * is read into the cache and set here when we erase the block.
+   */
+
+  if (!IS_ERASED(priv))
+    {
+      off_t esectno  = sector >> (priv->sectorshift - MX25L_SECTOR512_SHIFT);
+      mxlinfo("sector: %ld esectno: %d\n", sector, esectno);
+
+      mx25l_sectorerase(priv, esectno);
+      SET_ERASED(priv);
+    }
+
+  /* Put the cached sector data into the erase state and mart the cache as dirty
+   * (but don't update the FLASH yet.  The caller will do that at a more optimal
+   * time).
+   */
+
+  memset(dest, MX25L_ERASED_STATE, 1 << MX25L_SECTOR512_SHIFT);
+  SET_DIRTY(priv);
+}
+#endif
+
+/************************************************************************************
+ * Name: mx25l_cachewrite
+ ************************************************************************************/
+
+#if defined(CONFIG_MX25L_SECTOR512)
+static void mx25l_cachewrite(FAR struct mx25l_dev_s *priv, FAR const uint8_t *buffer,
+                            off_t sector, size_t nsectors)
+{
+  FAR uint8_t *dest;
+
+  for (; nsectors > 0; nsectors--)
+    {
+      /* First, make sure that the erase block containing 512 byte sector is in
+       * memory.
+       */
+
+      dest = mx25l_cacheread(priv, sector);
+
+      /* Erase the block containing this sector if it is not already erased.
+       * The erased indicated will be cleared when the data from the erase sector
+       * is read into the cache and set here when we erase the sector.
+       */
+
+      if (!IS_ERASED(priv))
+        {
+          off_t esectno  = sector >> (priv->sectorshift - MX25L_SECTOR512_SHIFT);
+          mxlinfo("sector: %ld esectno: %d\n", sector, esectno);
+
+          mx25l_sectorerase(priv, esectno);
+          SET_ERASED(priv);
+        }
+
+      /* Copy the new sector data into cached erase block */
+
+      memcpy(dest, buffer, 1 << MX25L_SECTOR512_SHIFT);
+      SET_DIRTY(priv);
+
+      /* Set up for the next 512 byte sector */
+
+      buffer += 1 << MX25L_SECTOR512_SHIFT;
+      sector++;
+    }
+
+  /* Flush the last erase block left in the cache */
+
+  mx25l_cacheflush(priv);
+}
+#endif
+
+/************************************************************************************
+ * Name: mx25l_erase
+ ************************************************************************************/
+
+static int mx25l_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks)
+{
+  FAR struct mx25l_dev_s *priv = (FAR struct mx25l_dev_s *)dev;
+  size_t blocksleft = nblocks;
+
+  mxlinfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+
+  /* Lock access to the SPI bus until we complete the erase */
+
+  mx25l_lock(priv->dev);
+  
+  while (blocksleft-- > 0)
+    {
+      /* MX25LVF parts have complex block overlay structure for the moment
+       * we just erase in 4k blocks.
+       */
+
+#ifdef CONFIG_MX25L_SECTOR512
+      mx25l_cacheerase(priv, startblock);
+#else
+      mx25l_sectorerase(priv, startblock);
+#endif
+      startblock++;
+    }
+
+#ifdef CONFIG_MX25L_SECTOR512
+  /* Flush the last erase block left in the cache */
+
+  mx25l_cacheflush(priv);
+#endif  
+  
+  mx25l_unlock(priv->dev);
+  return (int)nblocks;
+}
+
+/************************************************************************************
+ * Name: mx25l_bread
+ ************************************************************************************/
+
+static ssize_t mx25l_bread(FAR struct mtd_dev_s *dev, off_t startblock,
+                           size_t nblocks, FAR uint8_t *buffer)
+{
+  FAR struct mx25l_dev_s *priv = (FAR struct mx25l_dev_s *)dev;  
+  ssize_t nbytes;
+
+  mxlinfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+
+  /* On this device, we can handle the block read just like the byte-oriented read */
+
+#ifdef CONFIG_MX25L_SECTOR512
+  nbytes = mx25l_read(dev, startblock << MX25L_SECTOR512_SHIFT, nblocks << MX25L_SECTOR512_SHIFT,
+                      buffer);
+  if (nbytes > 0)
+    {
+      return nbytes >> MX25L_SECTOR512_SHIFT;
+    }  
+#else
+  nbytes = mx25l_read(dev, startblock << priv->pageshift, nblocks << priv->pageshift,
+                      buffer);
+  if (nbytes > 0)
+    {
+      return nbytes >> priv->pageshift;
+    }
+#endif  
+
+  return (int)nbytes;
+}
+
+/************************************************************************************
+ * Name: mx25l_bwrite
+ ************************************************************************************/
+
+static ssize_t mx25l_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
+                            size_t nblocks, FAR const uint8_t *buffer)
+{
+  FAR struct mx25l_dev_s *priv = (FAR struct mx25l_dev_s *)dev;
+
+  mxlinfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+
+  /* Lock the SPI bus and write all of the pages to FLASH */
+
+  mx25l_lock(priv->dev);
+
+#if defined(CONFIG_MX25L_SECTOR512)
+  mx25l_cachewrite(priv, buffer, startblock, nblocks);
+#else
+  mx25l_pagewrite(priv, buffer, startblock << priv->pageshift,
+                  nblocks << priv->pageshift);
+#endif
+  mx25l_unlock(priv->dev);
+
+  return nblocks;  
+}
+
+/************************************************************************************
+ * Name: mx25l_read
+ ************************************************************************************/
+
+static ssize_t mx25l_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
+                          FAR uint8_t *buffer)
+{
+  FAR struct mx25l_dev_s *priv = (FAR struct mx25l_dev_s *)dev; // TODO:
+
+  mxlinfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+
+  /* Lock the SPI bus and select this FLASH part */
+
+  mx25l_lock(priv->dev);
+  mx25l_byteread(priv, buffer, offset, nbytes);
+  mx25l_unlock(priv->dev);
+  mxlinfo("return nbytes: %d\n", (int)nbytes);
+  return nbytes;
+}
+
+/************************************************************************************
+ * Name: mx25l_ioctl
+ ************************************************************************************/
+
+static int mx25l_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
+{
+  FAR struct mx25l_dev_s *priv = (FAR struct mx25l_dev_s *)dev;
+  int ret = -EINVAL; /* Assume good command with bad parameters */
+
+  mxlinfo("cmd: %d \n", cmd);
+
+  switch (cmd)
+    {
+      case MTDIOC_GEOMETRY:
+        {
+          FAR struct mtd_geometry_s *geo = (FAR struct mtd_geometry_s *)((uintptr_t)arg);
+          if (geo)
+            {
+              /* Populate the geometry structure with information need to know
+               * the capacity and how to access the device.
+               *
+               * NOTE: that the device is treated as though it where just an array
+               * of fixed size blocks.  That is most likely not true, but the client
+               * will expect the device logic to do whatever is necessary to make it
+               * appear so.
+               */
+
+#ifdef CONFIG_MX25L_SECTOR512
+              geo->blocksize    = (1 << MX25L_SECTOR512_SHIFT);
+              geo->erasesize    = (1 << MX25L_SECTOR512_SHIFT);
+              geo->neraseblocks = priv->nsectors << (priv->sectorshift - MX25L_SECTOR512_SHIFT);
+#else                
+              geo->blocksize    = (1 << priv->pageshift);
+              geo->erasesize    = (1 << priv->sectorshift);
+              geo->neraseblocks = priv->nsectors;
+#endif              
+              ret = OK;
+
+              mxlinfo("blocksize: %d erasesize: %d neraseblocks: %d\n",
+                      geo->blocksize, geo->erasesize, geo->neraseblocks);
+            }
+        }
+        break;
+
+      case MTDIOC_BULKERASE:
+        {
+            /* Erase the entire device */
+
+            mx25l_lock(priv->dev);
+            ret = mx25l_chiperase(priv);
+            mx25l_unlock(priv->dev);
+        }
+        break;
+
+      case MTDIOC_XIPBASE:
+      default:
+        ret = -ENOTTY; /* Bad command */
+        break;
+    }
+
+  mxlinfo("return %d\n", ret);
+  return ret;
+}
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: mx25l_initialize_spi
+ *
+ * Description:
+ *   Create an initialize MTD device instance.  MTD devices are not registered
+ *   in the file system, but are created as instances that can be bound to
+ *   other functions (such as a block or character driver front end).
+ *
+ ************************************************************************************/
+
+FAR struct mtd_dev_s *mx25l_initialize_spi(FAR struct spi_dev_s *dev)
+{
+  FAR struct mx25l_dev_s *priv;
+  int ret;
+
+  mxlinfo("dev: %p\n", dev);
+
+  /* Allocate a state structure (we allocate the structure instead of using
+   * a fixed, static allocation so that we can handle multiple FLASH devices.
+   * The current implementation would handle only one FLASH part per SPI
+   * device (only because of the SPIDEV_FLASH definition) and so would have
+   * to be extended to handle multiple FLASH parts on the same SPI bus.
+   */
+
+  priv = (FAR struct mx25l_dev_s *)kmm_zalloc(sizeof(struct mx25l_dev_s));
+  if (priv)
+    {
+      /* Initialize the allocated structure. (unsupported methods were
+       * nullified by kmm_zalloc).
+       */
+
+      priv->mtd.erase  = mx25l_erase;
+      priv->mtd.bread  = mx25l_bread;
+      priv->mtd.bwrite = mx25l_bwrite;
+      priv->mtd.read   = mx25l_read;
+      priv->mtd.ioctl  = mx25l_ioctl;
+      priv->dev        = dev;
+
+      /* Deselect the FLASH */
+
+      SPI_SELECT(dev, SPIDEV_FLASH, false);
+
+      /* Identify the FLASH chip and get its capacity */
+
+      ret = mx25l_readid(priv);
+      if (ret != OK)
+        {
+          /* Unrecognized! Discard all of that work we just did and return NULL */
+
+          mxlerr("ERROR: Unrecognized\n");
+          kmm_free(priv);
+          return NULL;
+        }
+      else
+        {
+#ifdef CONFIG_MX25L_SECTOR512        /* Simulate a 512 byte sector */
+          /* Allocate a buffer for the erase block cache */
+
+          priv->sector = (FAR uint8_t *)kmm_malloc(1 << priv->sectorshift);
+          if (!priv->sector)
+            {
+              /* Allocation failed! Discard all of that work we just did and return NULL */
+
+              ferr("ERROR: Allocation failed\n");
+              kmm_free(priv);
+              return NULL;
+            }
+#endif          
+          
+#ifdef CONFIG_MTD_REGISTRATION
+          /* Register the MTD with the procfs system if enabled */
+
+          mtd_register(&priv->mtd, "mx25l");
+#endif
+        }
+    }
+
+  /* Return the implementation-specific state structure as the MTD device */
+
+  mxlinfo("Return %p\n", priv);
+  return (FAR struct mtd_dev_s *)priv;
+}
diff --git a/drivers/mtd/n25qxxx.c b/drivers/mtd/n25qxxx.c
index d79f2877b900f5097c1a60d5e6408c1061658718..e5272f47edf8008d7a39df14d83170381fa57a4a 100644
--- a/drivers/mtd/n25qxxx.c
+++ b/drivers/mtd/n25qxxx.c
@@ -87,7 +87,6 @@
 #  define CONFIG_N25QXXX_DUMMIES 6
 #endif
 
-
 /* N25QXXX Commands *****************************************************************/
 /* Configuration, Status, Erase, Program Commands ***********************************/
 /*      Command                    Value    Description:                            */
@@ -98,7 +97,7 @@
                                           *   0x01 | SR                             */
 #define N25QXXX_READ_VOLCFG        0x85  /* Read volatile configuration register:   *
                                           *   0x85 | VCR                            */
-#define N25QXXX_WRITE_VOLCFG       0x81  /* Write status register:                  *
+#define N25QXXX_WRITE_VOLCFG       0x81  /* Write svolatile configuration register: *
                                           *   0x81 | VCR                            */
 #define N25QXXX_WRITE_ENABLE       0x06  /* Write enable:                           *
                                           *   0x06                                  */
@@ -123,7 +122,7 @@
 /*      Command                    Value    Description:                            */
 /*                                            Data sequence                         */
 
-/* ID/Security Commands *************************&***********************************/
+/* ID/Security Commands *************************************************************/
 /*      Command                    Value    Description:                            */
 /*                                            Data sequence                         */
 #define N25QXXX_JEDEC_ID           0x9f  /* JEDEC ID:                               *
@@ -141,8 +140,8 @@
 
 /* N25QXXX JEDIC IDs */
 
-#define N25QXXX3V_JEDEC_DEVICE_TYPE   0xba  /* 3v memory device type */
-#define N25QXXX2V_JEDEC_DEVICE_TYPE   0xbb  /* 2v memory device type */
+#define N25QXXX3V_JEDEC_DEVICE_TYPE 0xba  /* 3v memory device type */
+#define N25QXXX2V_JEDEC_DEVICE_TYPE 0xbb  /* 2v memory device type */
 
 #define N25Q016_JEDEC_CAPACITY      0x15  /* N25Q016 (2 MB) memory capacity */
 #define N25Q032_JEDEC_CAPACITY      0x16  /* N25Q032 (4 MB) memory capacity */
@@ -168,7 +167,7 @@
 #define STATUS_TB_MASK             (1 << 5) /* Bit 5: Top / Bottom Protect          */
 #  define STATUS_TB_TOP            (0 << 5) /*   0 = BP2-BP0 protect Top down       */
 #  define STATUS_TB_BOTTOM         (1 << 5) /*   1 = BP2-BP0 protect Bottom up      */
-#define STATUS_BP3_MASK             (1 << 5) /* Bit 6: BP3                          */
+#define STATUS_BP3_MASK            (1 << 5) /* Bit 6: BP3                           */
 #define STATUS_SRP0_MASK           (1 << 7) /* Bit 7: Status register protect 0     */
 #  define STATUS_SRP0_UNLOCKED     (0 << 7) /*   0 = WP# no effect / PS Lock Down   */
 #  define STATUS_SRP0_LOCKED       (1 << 7) /*   1 = WP# protect / OTP Lock Down    */
@@ -242,15 +241,15 @@
 
 #define IS_VALID(p)                 ((((p)->flags) & N25QXXX_CACHE_VALID) != 0)
 #define IS_DIRTY(p)                 ((((p)->flags) & N25QXXX_CACHE_DIRTY) != 0)
-#define IS_ERASED(p)                ((((p)->flags) & N25QXXX_CACHE_DIRTY) != 0)
+#define IS_ERASED(p)                ((((p)->flags) & N25QXXX_CACHE_ERASED) != 0)
 
 #define SET_VALID(p)                do { (p)->flags |= N25QXXX_CACHE_VALID; } while (0)
 #define SET_DIRTY(p)                do { (p)->flags |= N25QXXX_CACHE_DIRTY; } while (0)
-#define SET_ERASED(p)               do { (p)->flags |= N25QXXX_CACHE_DIRTY; } while (0)
+#define SET_ERASED(p)               do { (p)->flags |= N25QXXX_CACHE_ERASED; } while (0)
 
 #define CLR_VALID(p)                do { (p)->flags &= ~N25QXXX_CACHE_VALID; } while (0)
 #define CLR_DIRTY(p)                do { (p)->flags &= ~N25QXXX_CACHE_DIRTY; } while (0)
-#define CLR_ERASED(p)               do { (p)->flags &= ~N25QXXX_CACHE_DIRTY; } while (0)
+#define CLR_ERASED(p)               do { (p)->flags &= ~N25QXXX_CACHE_ERASED; } while (0)
 
 /* 512 byte sector support **********************************************************/
 
@@ -391,7 +390,7 @@ static int n25qxxx_command(FAR struct qspi_dev_s *qspi, uint8_t cmd)
 {
   struct qspi_cmdinfo_s cmdinfo;
 
-  fvdbg("CMD: %02x\n", cmd);
+  finfo("CMD: %02x\n", cmd);
 
   cmdinfo.flags   = 0;
   cmdinfo.addrlen = 0;
@@ -412,7 +411,7 @@ static int n25qxxx_command_address(FAR struct qspi_dev_s *qspi, uint8_t cmd,
 {
   struct qspi_cmdinfo_s cmdinfo;
 
-  fvdbg("CMD: %02x Address: %04lx addrlen=%d\n", cmd, (unsigned long)addr, addrlen);
+  finfo("CMD: %02x Address: %04lx addrlen=%d\n", cmd, (unsigned long)addr, addrlen);
 
   cmdinfo.flags   = QSPICMD_ADDRESS;
   cmdinfo.addrlen = addrlen;
@@ -433,7 +432,7 @@ static int n25qxxx_command_read(FAR struct qspi_dev_s *qspi, uint8_t cmd,
 {
   struct qspi_cmdinfo_s cmdinfo;
 
-  fvdbg("CMD: %02x buflen: %lu\n", cmd, (unsigned long)buflen);
+  finfo("CMD: %02x buflen: %lu\n", cmd, (unsigned long)buflen);
 
   cmdinfo.flags   = QSPICMD_READDATA;
   cmdinfo.addrlen = 0;
@@ -454,7 +453,7 @@ static int n25qxxx_command_write(FAR struct qspi_dev_s *qspi, uint8_t cmd,
 {
   struct qspi_cmdinfo_s cmdinfo;
 
-  fvdbg("CMD: %02x buflen: %lu\n", cmd, (unsigned long)buflen);
+  finfo("CMD: %02x buflen: %lu\n", cmd, (unsigned long)buflen);
 
   cmdinfo.flags   = QSPICMD_WRITEDATA;
   cmdinfo.addrlen = 0;
@@ -567,7 +566,7 @@ static inline int n25qxxx_readid(struct n25qxxx_dev_s *priv)
 
   n25qxxx_unlock(priv->qspi);
 
-  fvdbg("Manufacturer: %02x Device Type %02x, Capacity: %02x\n",
+  finfo("Manufacturer: %02x Device Type %02x, Capacity: %02x\n",
         priv->cmdbuf[0], priv->cmdbuf[1], priv->cmdbuf[2]);
 
   /* Check for a recognized memory device type */
@@ -575,7 +574,7 @@ static inline int n25qxxx_readid(struct n25qxxx_dev_s *priv)
   if (priv->cmdbuf[1] != N25QXXX3V_JEDEC_DEVICE_TYPE &&
       priv->cmdbuf[1] != N25QXXX2V_JEDEC_DEVICE_TYPE)
     {
-      fdbg("ERROR: Unrecognized device type: 0x%02x\n", priv->cmdbuf[1]);
+      ferr("ERROR: Unrecognized device type: 0x%02x\n", priv->cmdbuf[1]);
       return -ENODEV;
     }
 
@@ -628,7 +627,7 @@ static inline int n25qxxx_readid(struct n25qxxx_dev_s *priv)
       /* Support for this part is not implemented yet */
 
       default:
-        fdbg("ERROR: Unsupported memory capacity: %02x\n", priv->cmdbuf[2]);
+        ferr("ERROR: Unsupported memory capacity: %02x\n", priv->cmdbuf[2]);
         return -ENODEV;
     }
 
@@ -795,14 +794,14 @@ static int n25qxxx_erase_sector(struct n25qxxx_dev_s *priv, off_t sector)
   off_t address;
   uint8_t status;
 
-  fvdbg("sector: %08lx\n", (unsigned long)sector);
+  finfo("sector: %08lx\n", (unsigned long)sector);
 
   /* Check that the flash is ready and unprotected */
 
   status = n25qxxx_read_status(priv);
   if ((status & STATUS_BUSY_MASK) != STATUS_READY)
     {
-      fdbg("ERROR: Flash busy: %02x", status);
+      ferr("ERROR: Flash busy: %02x", status);
       return -EBUSY;
     }
 
@@ -813,7 +812,7 @@ static int n25qxxx_erase_sector(struct n25qxxx_dev_s *priv, off_t sector)
   if ((status & (STATUS_BP3_MASK|STATUS_BP_MASK)) != 0 &&
       n25qxxx_isprotected(priv, status, address))
     {
-      fdbg("ERROR: Flash protected: %02x", status);
+      ferr("ERROR: Flash protected: %02x", status);
       return -EACCES;
     }
 
@@ -842,7 +841,7 @@ static int n25qxxx_erase_chip(struct n25qxxx_dev_s *priv)
   status = n25qxxx_read_status(priv);
   if ((status & (STATUS_BP3_MASK|STATUS_BP_MASK)) != 0)
     {
-      fdbg("ERROR: FLASH is Protected: %02x", status);
+      ferr("ERROR: FLASH is Protected: %02x", status);
       return -EACCES;
     }
 
@@ -872,7 +871,7 @@ static int n25qxxx_read_byte(FAR struct n25qxxx_dev_s *priv, FAR uint8_t *buffer
 {
   struct qspi_meminfo_s meminfo;
 
-  fvdbg("address: %08lx nbytes: %d\n", (long)address, (int)buflen);
+  finfo("address: %08lx nbytes: %d\n", (long)address, (int)buflen);
 
   meminfo.flags   = QSPIMEM_READ | QSPIMEM_QUADIO;
   meminfo.addrlen = 3;
@@ -898,7 +897,7 @@ static int n25qxxx_write_page(struct n25qxxx_dev_s *priv, FAR const uint8_t *buf
   int ret;
   int i;
 
-  fvdbg("address: %08lx buflen: %u\n", (unsigned long)address, (unsigned)buflen);
+  finfo("address: %08lx buflen: %u\n", (unsigned long)address, (unsigned)buflen);
 
   npages   = (buflen >> priv->pageshift);
   pagesize = (1 << priv->pageshift);
@@ -928,7 +927,7 @@ static int n25qxxx_write_page(struct n25qxxx_dev_s *priv, FAR const uint8_t *buf
 
       if (ret < 0)
         {
-          fdbg("ERROR: QSPI_MEMORY failed writing address=%06x\n",
+          ferr("ERROR: QSPI_MEMORY failed writing address=%06x\n",
                address);
           return ret;
         }
@@ -976,10 +975,10 @@ static int n25qxxx_flush_cache(struct n25qxxx_dev_s *priv)
       ret = n25qxxx_write_page(priv, priv->sector, address, 1 << priv->sectorshift);
       if (ret < 0)
         {
-          fdbg("ERROR: n25qxxx_write_page failed: %d\n", ret);
+          ferr("ERROR: n25qxxx_write_page failed: %d\n", ret);
         }
 
-      /* The case is no long dirty and the FLASH is no longer erased */
+      /* The cache is no long dirty and the FLASH is no longer erased */
 
       CLR_DIRTY(priv);
       CLR_ERASED(priv);
@@ -1002,13 +1001,13 @@ static FAR uint8_t *n25qxxx_read_cache(struct n25qxxx_dev_s *priv, off_t sector)
   int   ret;
 
   /* Convert from the 512 byte sector to the erase sector size of the device.  For
-   * exmample, if the actual erase sector size if 4Kb (1 << 12), then we first
+   * example, if the actual erase sector size is 4Kb (1 << 12), then we first
    * shift to the right by 3 to get the sector number in 4096 increments.
    */
 
   shift    = priv->sectorshift - N25QXXX_SECTOR512_SHIFT;
   esectno  = sector >> shift;
-  fvdbg("sector: %ld esectno: %d shift=%d\n", sector, esectno, shift);
+  finfo("sector: %ld esectno: %d shift=%d\n", sector, esectno, shift);
 
   /* Check if the requested erase block is already in the cache */
 
@@ -1019,7 +1018,7 @@ static FAR uint8_t *n25qxxx_read_cache(struct n25qxxx_dev_s *priv, off_t sector)
       ret = n25qxxx_flush_cache(priv);
       if (ret < 0)
         {
-          fdbg("ERROR: n25qxxx_flush_cache failed: %d\n", ret);
+          ferr("ERROR: n25qxxx_flush_cache failed: %d\n", ret);
           return NULL;
         }
 
@@ -1030,7 +1029,7 @@ static FAR uint8_t *n25qxxx_read_cache(struct n25qxxx_dev_s *priv, off_t sector)
                              (1 << priv->sectorshift));
       if (ret < 0)
         {
-          fdbg("ERROR: n25qxxx_read_byte failed: %d\n", ret);
+          ferr("ERROR: n25qxxx_read_byte failed: %d\n", ret);
           return NULL;
         }
 
@@ -1076,7 +1075,7 @@ static void n25qxxx_erase_cache(struct n25qxxx_dev_s *priv, off_t sector)
   if (!IS_ERASED(priv))
     {
       off_t esectno  = sector >> (priv->sectorshift - N25QXXX_SECTOR512_SHIFT);
-      fvdbg("sector: %ld esectno: %d\n", sector, esectno);
+      finfo("sector: %ld esectno: %d\n", sector, esectno);
 
       DEBUGVERIFY(n25qxxx_erase_sector(priv, esectno));
       SET_ERASED(priv);
@@ -1120,12 +1119,12 @@ static int n25qxxx_write_cache(FAR struct n25qxxx_dev_s *priv,
       if (!IS_ERASED(priv))
         {
           off_t esectno  = sector >> (priv->sectorshift - N25QXXX_SECTOR512_SHIFT);
-          fvdbg("sector: %ld esectno: %d\n", sector, esectno);
+          finfo("sector: %ld esectno: %d\n", sector, esectno);
 
           ret = n25qxxx_erase_sector(priv, esectno);
           if (ret < 0)
             {
-              fdbg("ERROR: n25qxxx_erase_sector failed: %d\n", ret);
+              ferr("ERROR: n25qxxx_erase_sector failed: %d\n", ret);
               return ret;
             }
 
@@ -1161,7 +1160,7 @@ static int n25qxxx_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nbl
   int ret;
 #endif
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* Lock access to the SPI bus until we complete the erase */
 
@@ -1206,7 +1205,7 @@ static ssize_t n25qxxx_bread(FAR struct mtd_dev_s *dev, off_t startblock,
 #endif
   ssize_t nbytes;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* On this device, we can handle the block read just like the byte-oriented read */
 
@@ -1218,11 +1217,11 @@ static ssize_t n25qxxx_bread(FAR struct mtd_dev_s *dev, off_t startblock,
       nbytes >>= N25QXXX_SECTOR512_SHIFT;
     }
 #else
-  nbytes = n25qxxx_read(dev, startblock << priv->sectorshift,
-                       nblocks << priv->sectorshift, buffer);
+  nbytes = n25qxxx_read(dev, startblock << priv->pageshift,
+                       nblocks << priv->pageshift, buffer);
   if (nbytes > 0)
     {
-      nbytes >>= priv->sectorshift;
+      nbytes >>= priv->pageshift;
     }
 #endif
 
@@ -1239,7 +1238,7 @@ static ssize_t n25qxxx_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
   FAR struct n25qxxx_dev_s *priv = (FAR struct n25qxxx_dev_s *)dev;
   int ret = (int)nblocks;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* Lock the QuadSPI bus and write all of the pages to FLASH */
 
@@ -1249,15 +1248,15 @@ static ssize_t n25qxxx_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
   ret = n25qxxx_write_cache(priv, buffer, startblock, nblocks);
   if (ret < 0)
     {
-      fdbg("ERROR: n25qxxx_write_cache failed: %d\n", ret);
+      ferr("ERROR: n25qxxx_write_cache failed: %d\n", ret);
     }
 
 #else
-  ret = n25qxxx_write_page(priv, buffer, startblock << priv->sectorshift,
-                          nblocks << priv->sectorshift);
+  ret = n25qxxx_write_page(priv, buffer, startblock << priv->pageshift,
+                          nblocks << priv->pageshift);
   if (ret < 0)
     {
-      fdbg("ERROR: n25qxxx_write_page failed: %d\n", ret);
+      ferr("ERROR: n25qxxx_write_page failed: %d\n", ret);
     }
 #endif
 
@@ -1276,7 +1275,7 @@ static ssize_t n25qxxx_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbyt
   FAR struct n25qxxx_dev_s *priv = (FAR struct n25qxxx_dev_s *)dev;
   int ret;
 
-  fvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+  finfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
 
   /* Lock the QuadSPI bus and select this FLASH part */
 
@@ -1286,11 +1285,11 @@ static ssize_t n25qxxx_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbyt
 
   if (ret < 0)
     {
-      fdbg("ERROR: n25qxxx_read_byte returned: %d\n", ret);
+      ferr("ERROR: n25qxxx_read_byte returned: %d\n", ret);
       return (ssize_t)ret;
     }
 
-  fvdbg("return nbytes: %d\n", (int)nbytes);
+  finfo("return nbytes: %d\n", (int)nbytes);
   return (ssize_t)nbytes;
 }
 
@@ -1303,7 +1302,7 @@ static int n25qxxx_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
   FAR struct n25qxxx_dev_s *priv = (FAR struct n25qxxx_dev_s *)dev;
   int ret = -EINVAL; /* Assume good command with bad parameters */
 
-  fvdbg("cmd: %d \n", cmd);
+  finfo("cmd: %d \n", cmd);
 
   switch (cmd)
     {
@@ -1328,13 +1327,13 @@ static int n25qxxx_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
               geo->erasesize    = (1 << N25QXXX_SECTOR512_SHIFT);
               geo->neraseblocks = priv->nsectors << (priv->sectorshift - N25QXXX_SECTOR512_SHIFT);
 #else
-              geo->blocksize    = (1 << priv->sectorshift);
+              geo->blocksize    = (1 << priv->pageshift);
               geo->erasesize    = (1 << priv->sectorshift);
               geo->neraseblocks = priv->nsectors;
 #endif
               ret               = OK;
 
-              fvdbg("blocksize: %d erasesize: %d neraseblocks: %d\n",
+              finfo("blocksize: %d erasesize: %d neraseblocks: %d\n",
                     geo->blocksize, geo->erasesize, geo->neraseblocks);
             }
         }
@@ -1375,7 +1374,7 @@ static int n25qxxx_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
         break;
     }
 
-  fvdbg("return %d\n", ret);
+  finfo("return %d\n", ret);
   return ret;
 }
 
@@ -1401,7 +1400,7 @@ FAR struct mtd_dev_s *n25qxxx_initialize(FAR struct qspi_dev_s *qspi, bool unpro
   FAR struct n25qxxx_dev_s *priv;
   int ret;
 
-  fvdbg("qspi: %p\n", qspi);
+  finfo("qspi: %p\n", qspi);
   DEBUGASSERT(qspi != NULL);
 
   /* Allocate a state structure (we allocate the structure instead of using
@@ -1430,7 +1429,7 @@ FAR struct mtd_dev_s *n25qxxx_initialize(FAR struct qspi_dev_s *qspi, bool unpro
       priv->cmdbuf = (FAR uint8_t *)QSPI_ALLOC(qspi, 4);
       if (priv->cmdbuf == NULL)
         {
-          fdbg("ERROR Failed to allocate command buffer\n");
+          ferr("ERROR Failed to allocate command buffer\n");
           goto errout_with_priv;
         }
 
@@ -1439,7 +1438,7 @@ FAR struct mtd_dev_s *n25qxxx_initialize(FAR struct qspi_dev_s *qspi, bool unpro
       priv->readbuf = (FAR uint8_t *)QSPI_ALLOC(qspi, 1);
       if (priv->readbuf == NULL)
         {
-          fdbg("ERROR Failed to allocate read buffer\n");
+          ferr("ERROR Failed to allocate read buffer\n");
           goto errout_with_cmdbuf;
         }
 
@@ -1450,7 +1449,7 @@ FAR struct mtd_dev_s *n25qxxx_initialize(FAR struct qspi_dev_s *qspi, bool unpro
         {
           /* Unrecognized! Discard all of that work we just did and return NULL */
 
-          fdbg("ERROR Unrecognized QSPI device\n");
+          ferr("ERROR Unrecognized QSPI device\n");
           goto errout_with_readbuf;
         }
 
@@ -1470,7 +1469,7 @@ FAR struct mtd_dev_s *n25qxxx_initialize(FAR struct qspi_dev_s *qspi, bool unpro
           ret = n25qxxx_unprotect(priv, 0, priv->nsectors - 1);
           if (ret < 0)
             {
-              fdbg("ERROR: Sector unprotect failed\n");
+              ferr("ERROR: Sector unprotect failed\n");
             }
         }
 
@@ -1482,7 +1481,7 @@ FAR struct mtd_dev_s *n25qxxx_initialize(FAR struct qspi_dev_s *qspi, bool unpro
         {
           /* Allocation failed! Discard all of that work we just did and return NULL */
 
-          fdbg("ERROR: Sector allocation failed\n");
+          ferr("ERROR: Sector allocation failed\n");
           goto errout_with_readbuf;
         }
 #endif
@@ -1496,7 +1495,7 @@ FAR struct mtd_dev_s *n25qxxx_initialize(FAR struct qspi_dev_s *qspi, bool unpro
 
   /* Return the implementation-specific state structure as the MTD device */
 
-  fvdbg("Return %p\n", priv);
+  finfo("Return %p\n", priv);
   return (FAR struct mtd_dev_s *)priv;
 
 errout_with_readbuf:
diff --git a/drivers/mtd/rammtd.c b/drivers/mtd/rammtd.c
index af63097723b7c69fb989d615adad77a05e870449..66c350888c4a9aa3dfb9e7af3a94795f2b8d12a5 100644
--- a/drivers/mtd/rammtd.c
+++ b/drivers/mtd/rammtd.c
@@ -169,10 +169,10 @@ static void *ram_write(FAR void *dest, FAR const void *src, size_t len)
        * erased state.
        */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       if (newvalue != srcvalue)
         {
-          dbg("ERROR: Bad write: source=%02x dest=%02x result=%02x\n",
+          _err("ERROR: Bad write: source=%02x dest=%02x result=%02x\n",
               srcvalue, oldvalue, newvalue);
         }
 #endif
@@ -446,7 +446,7 @@ FAR struct mtd_dev_s *rammtd_initialize(FAR uint8_t *start, size_t size)
   priv = (FAR struct ram_dev_s *)kmm_zalloc(sizeof(struct ram_dev_s));
   if (!priv)
     {
-      fdbg("Failed to allocate the RAM MTD state structure\n");
+      ferr("ERROR: Failed to allocate the RAM MTD state structure\n");
       return NULL;
     }
 
@@ -455,7 +455,7 @@ FAR struct mtd_dev_s *rammtd_initialize(FAR uint8_t *start, size_t size)
   nblocks = size / CONFIG_RAMMTD_ERASESIZE;
   if (nblocks < 1)
     {
-      fdbg("Need to provide at least one full erase block\n");
+      ferr("ERROR: Need to provide at least one full erase block\n");
       return NULL;
     }
 
diff --git a/drivers/mtd/ramtron.c b/drivers/mtd/ramtron.c
index 89e0ade8597aa2f6185d60c9fb3d1842948ea6bb..236084fb79dc3defd8fd490993c9519ba14268a8 100644
--- a/drivers/mtd/ramtron.c
+++ b/drivers/mtd/ramtron.c
@@ -264,6 +264,14 @@ static const struct ramtron_parts_s g_ramtron_parts[] =
     3,                            /* addr_len */
     25000000                      /* speed */
   },
+  {
+    "MB85RS256B",                 /* name */
+    0x05,                         /* id1 */
+    0x09,                         /* id2 */
+    32L*1024L,                    /* size */
+    3,                            /* addr_len */
+    25000000                      /* speed */
+  },
 #ifdef CONFIG_RAMTRON_FRAM_NON_JEDEC
   {
     "FM25H20",                    /* name */
@@ -368,7 +376,7 @@ static inline int ramtron_readid(struct ramtron_dev_s *priv)
   uint16_t part;
   int i;
 
-  fvdbg("priv: %p\n", priv);
+  finfo("priv: %p\n", priv);
 
   /* Lock the SPI bus, configure the bus, and select this FLASH part. */
 
@@ -418,7 +426,7 @@ static inline int ramtron_readid(struct ramtron_dev_s *priv)
       UNUSED(manufacturer); /* Eliminate warnings when debug is off */
       UNUSED(memory);       /* Eliminate warnings when debug is off */
 
-      fvdbg("RAMTRON %s of size %d bytes (mf:%02x mem:%02x cap:%02x part:%02x)\n",
+      finfo("RAMTRON %s of size %d bytes (mf:%02x mem:%02x cap:%02x part:%02x)\n",
             priv->part->name, priv->part->size, manufacturer, memory, capacity, part);
 
       priv->sectorshift = RAMTRON_EMULATE_SECTOR_SHIFT;
@@ -429,7 +437,7 @@ static inline int ramtron_readid(struct ramtron_dev_s *priv)
       return OK;
     }
 
-  fvdbg("RAMTRON device not found\n");
+  finfo("RAMTRON device not found\n");
   return -ENODEV;
 }
 
@@ -471,12 +479,12 @@ static int ramtron_waitwritecomplete(struct ramtron_dev_s *priv)
 
   if (retries > 0)
     {
-      fvdbg("Complete\n");
+      finfo("Complete\n");
       retries = OK;
     }
   else
     {
-      fdbg("timeout waiting for write completion\n");
+      ferr("ERROR: timeout waiting for write completion\n");
       retries = -EAGAIN;
     }
 
@@ -500,7 +508,7 @@ static void ramtron_writeenable(struct ramtron_dev_s *priv)
   /* Deselect the FLASH */
 
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
-  fvdbg("Enabled\n");
+  finfo("Enabled\n");
 }
 
 /************************************************************************************
@@ -529,9 +537,9 @@ static inline int ramtron_pagewrite(struct ramtron_dev_s *priv, FAR const uint8_
 {
   off_t offset = page << priv->pageshift;
 
-  fvdbg("page: %08lx offset: %08lx\n", (long)page, (long)offset);
+  finfo("page: %08lx offset: %08lx\n", (long)page, (long)offset);
 
-#ifndef RAMTRON_WRITEWAIT
+#ifndef CONFIG_RAMTRON_WRITEWAIT
   /* Wait for any preceding write to complete.  We could simplify things by
    * perform this wait at the end of each write operation (rather than at
    * the beginning of ALL operations), but have the wait first will slightly
@@ -564,9 +572,9 @@ static inline int ramtron_pagewrite(struct ramtron_dev_s *priv, FAR const uint8_
   /* Deselect the FLASH: Chip Select high */
 
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
-  fvdbg("Written\n");
+  finfo("Written\n");
 
-#ifdef RAMTRON_WRITEWAIT
+#ifdef CONFIG_RAMTRON_WRITEWAIT
   /* Wait for write completion now so we can report any errors to the caller. Thus
    * the caller will know whether or not if the data is on stable storage
    */
@@ -583,8 +591,8 @@ static inline int ramtron_pagewrite(struct ramtron_dev_s *priv, FAR const uint8_
 
 static int ramtron_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks)
 {
-  fvdbg("startblock: %08lx nblocks: %d\n", (unsigned long)startblock, (int)nblocks);
-  fvdbg("On RAMTRON devices erasing makes no sense, returning as OK\n");
+  finfo("startblock: %08lx nblocks: %d\n", (unsigned long)startblock, (int)nblocks);
+  finfo("On RAMTRON devices erasing makes no sense, returning as OK\n");
   return (int)nblocks;
 }
 
@@ -598,7 +606,7 @@ static ssize_t ramtron_bread(FAR struct mtd_dev_s *dev, off_t startblock,
   FAR struct ramtron_dev_s *priv = (FAR struct ramtron_dev_s *)dev;
   ssize_t nbytes;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* On this device, we can handle the block read just like the byte-oriented read */
 
@@ -622,7 +630,7 @@ static ssize_t ramtron_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
   FAR struct ramtron_dev_s *priv = (FAR struct ramtron_dev_s *)dev;
   size_t blocksleft = nblocks;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* Lock the SPI bus and write each page to FLASH */
 
@@ -649,13 +657,13 @@ static ssize_t ramtron_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbyt
                             FAR uint8_t *buffer)
 {
   FAR struct ramtron_dev_s *priv = (FAR struct ramtron_dev_s *)dev;
-#ifdef RAMTRON_WRITEWAIT
+#ifdef CONFIG_RAMTRON_WRITEWAIT
   uint8_t status;
 #endif
 
-  fvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+  finfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
 
-#ifndef RAMTRON_WRITEWAIT
+#ifndef CONFIG_RAMTRON_WRITEWAIT
   /* Wait for any preceding write to complete.  We could simplify things by
    * perform this wait at the end of each write operation (rather than at
    * the beginning of ALL operations), but have the wait first will slightly
@@ -682,7 +690,7 @@ static ssize_t ramtron_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbyt
 
   SPI_RECVBLOCK(priv->dev, buffer, nbytes);
 
-#ifdef RAMTRON_WRITEWAIT
+#ifdef CONFIG_RAMTRON_WRITEWAIT
   /* Read the status register. This isn't strictly needed, but it gives us a
    * chance to detect if SPI transactions are operating correctly, which
    * allows us to catch complete device failures in the read path. We expect
@@ -694,7 +702,7 @@ static ssize_t ramtron_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbyt
   status = SPI_SEND(priv->dev, RAMTRON_DUMMY);
   if ((status & ~RAMTRON_SR_SRWD) == 0)
     {
-      fdbg("read status failed - got 0x%02x\n", (unsigned)status);
+      ferr("ERROR: read status failed - got 0x%02x\n", (unsigned)status);
       nbytes = -EIO;
     }
 #endif
@@ -704,7 +712,7 @@ static ssize_t ramtron_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbyt
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
   ramtron_unlock(priv->dev);
 
-  fvdbg("return nbytes: %d\n", (int)nbytes);
+  finfo("return nbytes: %d\n", (int)nbytes);
   return nbytes;
 }
 
@@ -717,7 +725,7 @@ static int ramtron_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
   FAR struct ramtron_dev_s *priv = (FAR struct ramtron_dev_s *)dev;
   int ret = -EINVAL; /* Assume good command with bad parameters */
 
-  fvdbg("cmd: %d \n", cmd);
+  finfo("cmd: %d \n", cmd);
 
   switch (cmd)
     {
@@ -740,14 +748,14 @@ static int ramtron_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
               geo->neraseblocks = priv->nsectors;
               ret               = OK;
 
-              fvdbg("blocksize: %d erasesize: %d neraseblocks: %d\n",
+              finfo("blocksize: %d erasesize: %d neraseblocks: %d\n",
                     geo->blocksize, geo->erasesize, geo->neraseblocks);
             }
         }
         break;
 
       case MTDIOC_BULKERASE:
-        fvdbg("BULDERASE: Makes no sense in ramtron. Let's confirm operation as OK\n");
+        finfo("BULDERASE: Makes no sense in ramtron. Let's confirm operation as OK\n");
         ret = OK;
         break;
 
@@ -757,7 +765,7 @@ static int ramtron_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
           if (arg > 0 && arg <= RAMTRON_INIT_CLK_MAX)
             {
               priv->speed = arg;
-              fvdbg("set bus speed to %lu\n", priv->speed);
+              finfo("set bus speed to %lu\n", priv->speed);
               ret = OK;
             }
         }
@@ -770,7 +778,7 @@ static int ramtron_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
         break;
     }
 
-  fvdbg("return %d\n", ret);
+  finfo("return %d\n", ret);
   return ret;
 }
 
@@ -792,7 +800,7 @@ FAR struct mtd_dev_s *ramtron_initialize(FAR struct spi_dev_s *dev)
 {
   FAR struct ramtron_dev_s *priv;
 
-  fvdbg("dev: %p\n", dev);
+  finfo("dev: %p\n", dev);
 
   /* Allocate a state structure (we allocate the structure instead of using
    * a fixed, static allocation so that we can handle multiple FLASH devices.
@@ -826,7 +834,7 @@ FAR struct mtd_dev_s *ramtron_initialize(FAR struct spi_dev_s *dev)
           /* Unrecognized! Discard all of that work we just did and return NULL */
 
           kmm_free(priv);
-          priv = NULL;
+          return NULL;
         }
     }
 
@@ -838,6 +846,6 @@ FAR struct mtd_dev_s *ramtron_initialize(FAR struct spi_dev_s *dev)
 
   /* Return the implementation-specific state structure as the MTD device */
 
-  fvdbg("Return %p\n", priv);
+  finfo("Return %p\n", priv);
   return (FAR struct mtd_dev_s *)priv;
 }
diff --git a/drivers/mtd/s25fl1.c b/drivers/mtd/s25fl1.c
index 5a89c0d9e84abb74126c3ccf8a3dc06b98a3468b..33a2589638f678e6d60afe503a9f4fc41686d082 100644
--- a/drivers/mtd/s25fl1.c
+++ b/drivers/mtd/s25fl1.c
@@ -292,15 +292,15 @@
 
 #define IS_VALID(p)                ((((p)->flags) & S25FL1_CACHE_VALID) != 0)
 #define IS_DIRTY(p)                ((((p)->flags) & S25FL1_CACHE_DIRTY) != 0)
-#define IS_ERASED(p)               ((((p)->flags) & S25FL1_CACHE_DIRTY) != 0)
+#define IS_ERASED(p)               ((((p)->flags) & S25FL1_CACHE_ERASED) != 0)
 
 #define SET_VALID(p)               do { (p)->flags |= S25FL1_CACHE_VALID; } while (0)
 #define SET_DIRTY(p)               do { (p)->flags |= S25FL1_CACHE_DIRTY; } while (0)
-#define SET_ERASED(p)              do { (p)->flags |= S25FL1_CACHE_DIRTY; } while (0)
+#define SET_ERASED(p)              do { (p)->flags |= S25FL1_CACHE_ERASED; } while (0)
 
 #define CLR_VALID(p)               do { (p)->flags &= ~S25FL1_CACHE_VALID; } while (0)
 #define CLR_DIRTY(p)               do { (p)->flags &= ~S25FL1_CACHE_DIRTY; } while (0)
-#define CLR_ERASED(p)              do { (p)->flags &= ~S25FL1_CACHE_DIRTY; } while (0)
+#define CLR_ERASED(p)              do { (p)->flags &= ~S25FL1_CACHE_ERASED; } while (0)
 
 /* 512 byte sector support **********************************************************/
 
@@ -443,7 +443,7 @@ static int s25fl1_command(FAR struct qspi_dev_s *qspi, uint8_t cmd)
 {
   struct qspi_cmdinfo_s cmdinfo;
 
-  fvdbg("CMD: %02x\n", cmd);
+  finfo("CMD: %02x\n", cmd);
 
   cmdinfo.flags   = 0;
   cmdinfo.addrlen = 0;
@@ -464,7 +464,7 @@ static int s25fl1_command_address(FAR struct qspi_dev_s *qspi, uint8_t cmd,
 {
   struct qspi_cmdinfo_s cmdinfo;
 
-  fvdbg("CMD: %02x Address: %04lx addrlen=%d\n", cmd, (unsigned long)addr, addrlen);
+  finfo("CMD: %02x Address: %04lx addrlen=%d\n", cmd, (unsigned long)addr, addrlen);
 
   cmdinfo.flags   = QSPICMD_ADDRESS;
   cmdinfo.addrlen = addrlen;
@@ -485,7 +485,7 @@ static int s25fl1_command_read(FAR struct qspi_dev_s *qspi, uint8_t cmd,
 {
   struct qspi_cmdinfo_s cmdinfo;
 
-  fvdbg("CMD: %02x buflen: %lu\n", cmd, (unsigned long)buflen);
+  finfo("CMD: %02x buflen: %lu\n", cmd, (unsigned long)buflen);
 
   cmdinfo.flags   = QSPICMD_READDATA;
   cmdinfo.addrlen = 0;
@@ -506,7 +506,7 @@ static int s25fl1_command_write(FAR struct qspi_dev_s *qspi, uint8_t cmd,
 {
   struct qspi_cmdinfo_s cmdinfo;
 
-  fvdbg("CMD: %02x buflen: %lu\n", cmd, (unsigned long)buflen);
+  finfo("CMD: %02x buflen: %lu\n", cmd, (unsigned long)buflen);
 
   cmdinfo.flags   = QSPICMD_WRITEDATA;
   cmdinfo.addrlen = 0;
@@ -613,14 +613,14 @@ static inline int s25fl1_readid(struct s25fl1_dev_s *priv)
 
   s25fl1_unlock(priv->qspi);
 
-  fvdbg("Manufacturer: %02x Device Type %02x, Capacity: %02x",
+  finfo("Manufacturer: %02x Device Type %02x, Capacity: %02x",
         priv->cmdbuf[0], priv->cmdbuf[1], priv->cmdbuf[2]);
 
   /* Check for a recognized memory device type */
 
   if (priv->cmdbuf[1] != S25FL1_JEDEC_DEVICE_TYPE)
     {
-      fdbg("ERROR: Unrecognized device type: %02x\n", priv->cmdbuf[1]);
+      ferr("ERROR: Unrecognized device type: %02x\n", priv->cmdbuf[1]);
       return -ENODEV;
     }
 
@@ -649,7 +649,7 @@ static inline int s25fl1_readid(struct s25fl1_dev_s *priv)
       /* Support for this part is not implemented yet */
 
       default:
-        fdbg("ERROR: Unsupported memory capacity: %02x\n", priv->cmdbuf[2]);
+        ferr("ERROR: Unsupported memory capacity: %02x\n", priv->cmdbuf[2]);
         return -ENODEV;
     }
 
@@ -830,14 +830,14 @@ static int s25fl1_erase_sector(struct s25fl1_dev_s *priv, off_t sector)
   off_t address;
   uint8_t status;
 
-  fvdbg("sector: %08lx\n", (unsigned long)sector);
+  finfo("sector: %08lx\n", (unsigned long)sector);
 
   /* Check that the flash is ready and unprotected */
 
   status = sf25fl1_read_status1(priv);
   if ((status & STATUS1_BUSY_MASK) != STATUS1_READY)
     {
-      fdbg("ERROR: Flash busy: %02x", status);
+      ferr("ERROR: Flash busy: %02x", status);
       return -EBUSY;
     }
 
@@ -848,7 +848,7 @@ static int s25fl1_erase_sector(struct s25fl1_dev_s *priv, off_t sector)
   if ((status & STATUS1_BP_MASK) != 0 &&
       s25fl1_isprotected(priv, status, address))
     {
-      fdbg("ERROR: Flash protected: %02x", status);
+      ferr("ERROR: Flash protected: %02x", status);
       return -EACCES;
     }
 
@@ -876,7 +876,7 @@ static int s25fl1_erase_chip(struct s25fl1_dev_s *priv)
   status = sf25fl1_read_status1(priv);
   if ((status & STATUS1_BP_MASK) != 0)
     {
-      fdbg("ERROR: FLASH is Protected: %02x", status);
+      ferr("ERROR: FLASH is Protected: %02x", status);
       return -EACCES;
     }
 
@@ -906,7 +906,7 @@ static int s25fl1_read_byte(FAR struct s25fl1_dev_s *priv, FAR uint8_t *buffer,
 {
   struct qspi_meminfo_s meminfo;
 
-  fvdbg("address: %08lx nbytes: %d\n", (long)address, (int)buflen);
+  finfo("address: %08lx nbytes: %d\n", (long)address, (int)buflen);
 
 #ifdef CONFIG_S25FL1_SCRAMBLE
   meminfo.flags   = QSPIMEM_READ | QSPIMEM_QUADIO | QSPIMEM_SCRAMBLE;
@@ -939,7 +939,7 @@ static int s25fl1_write_page(struct s25fl1_dev_s *priv, FAR const uint8_t *buffe
   int ret;
   int i;
 
-  fvdbg("address: %08lx buflen: %u\n", (unsigned long)address, (unsigned)buflen);
+  finfo("address: %08lx buflen: %u\n", (unsigned long)address, (unsigned)buflen);
 
   npages   = (buflen >> priv->pageshift);
   pagesize = (1 << priv->pageshift);
@@ -976,7 +976,7 @@ static int s25fl1_write_page(struct s25fl1_dev_s *priv, FAR const uint8_t *buffe
 
       if (ret < 0)
         {
-          fdbg("ERROR: QSPI_MEMORY failed writing address=%06x\n",
+          ferr("ERROR: QSPI_MEMORY failed writing address=%06x\n",
                address);
           return ret;
         }
@@ -1023,7 +1023,7 @@ static int s25fl1_flush_cache(struct s25fl1_dev_s *priv)
       ret = s25fl1_write_page(priv, priv->sector, address, 1 << priv->sectorshift);
       if (ret < 0)
         {
-          fdbg("ERROR: s25fl1_write_page failed: %d\n", ret);
+          ferr("ERROR: s25fl1_write_page failed: %d\n", ret);
         }
 
       /* The case is no long dirty and the FLASH is no longer erased */
@@ -1055,7 +1055,7 @@ static FAR uint8_t *s25fl1_read_cache(struct s25fl1_dev_s *priv, off_t sector)
 
   shift    = priv->sectorshift - S25FL1_SECTOR512_SHIFT;
   esectno  = sector >> shift;
-  fvdbg("sector: %ld esectno: %d shift=%d\n", sector, esectno, shift);
+  finfo("sector: %ld esectno: %d shift=%d\n", sector, esectno, shift);
 
   /* Check if the requested erase block is already in the cache */
 
@@ -1066,7 +1066,7 @@ static FAR uint8_t *s25fl1_read_cache(struct s25fl1_dev_s *priv, off_t sector)
       ret = s25fl1_flush_cache(priv);
       if (ret < 0)
         {
-          fdbg("ERROR: s25fl1_flush_cache failed: %d\n", ret);
+          ferr("ERROR: s25fl1_flush_cache failed: %d\n", ret);
           return NULL;
         }
 
@@ -1077,7 +1077,7 @@ static FAR uint8_t *s25fl1_read_cache(struct s25fl1_dev_s *priv, off_t sector)
                              (1 << priv->sectorshift));
       if (ret < 0)
         {
-          fdbg("ERROR: s25fl1_read_byte failed: %d\n", ret);
+          ferr("ERROR: s25fl1_read_byte failed: %d\n", ret);
           return NULL;
         }
 
@@ -1123,7 +1123,7 @@ static void s25fl1_erase_cache(struct s25fl1_dev_s *priv, off_t sector)
   if (!IS_ERASED(priv))
     {
       off_t esectno  = sector >> (priv->sectorshift - S25FL1_SECTOR512_SHIFT);
-      fvdbg("sector: %ld esectno: %d\n", sector, esectno);
+      finfo("sector: %ld esectno: %d\n", sector, esectno);
 
       DEBUGVERIFY(s25fl1_erase_sector(priv, esectno));
       SET_ERASED(priv);
@@ -1167,12 +1167,12 @@ static int s25fl1_write_cache(FAR struct s25fl1_dev_s *priv,
       if (!IS_ERASED(priv))
         {
           off_t esectno  = sector >> (priv->sectorshift - S25FL1_SECTOR512_SHIFT);
-          fvdbg("sector: %ld esectno: %d\n", sector, esectno);
+          finfo("sector: %ld esectno: %d\n", sector, esectno);
 
           ret = s25fl1_erase_sector(priv, esectno);
           if (ret < 0)
             {
-              fdbg("ERROR: s25fl1_erase_sector failed: %d\n", ret);
+              ferr("ERROR: s25fl1_erase_sector failed: %d\n", ret);
               return ret;
             }
 
@@ -1208,7 +1208,7 @@ static int s25fl1_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblo
   int ret;
 #endif
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* Lock access to the SPI bus until we complete the erase */
 
@@ -1252,7 +1252,7 @@ static ssize_t s25fl1_bread(FAR struct mtd_dev_s *dev, off_t startblock,
 #endif
   ssize_t nbytes;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* On this device, we can handle the block read just like the byte-oriented read */
 
@@ -1285,7 +1285,7 @@ static ssize_t s25fl1_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
   FAR struct s25fl1_dev_s *priv = (FAR struct s25fl1_dev_s *)dev;
   int ret = (int)nblocks;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* Lock the QuadSPI bus and write all of the pages to FLASH */
 
@@ -1295,7 +1295,7 @@ static ssize_t s25fl1_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
   ret = s25fl1_write_cache(priv, buffer, startblock, nblocks);
   if (ret < 0)
     {
-      fdbg("ERROR: s25fl1_write_cache failed: %d\n", ret);
+      ferr("ERROR: s25fl1_write_cache failed: %d\n", ret);
     }
 
 #else
@@ -1303,7 +1303,7 @@ static ssize_t s25fl1_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
                           nblocks << priv->sectorshift);
   if (ret < 0)
     {
-      fdbg("ERROR: s25fl1_write_page failed: %d\n", ret);
+      ferr("ERROR: s25fl1_write_page failed: %d\n", ret);
     }
 #endif
 
@@ -1322,7 +1322,7 @@ static ssize_t s25fl1_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbyte
   FAR struct s25fl1_dev_s *priv = (FAR struct s25fl1_dev_s *)dev;
   int ret;
 
-  fvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+  finfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
 
   /* Lock the QuadSPI bus and select this FLASH part */
 
@@ -1332,11 +1332,11 @@ static ssize_t s25fl1_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbyte
 
   if (ret < 0)
     {
-      fdbg("ERROR: s25fl1_read_byte returned: %d\n", ret);
+      ferr("ERROR: s25fl1_read_byte returned: %d\n", ret);
       return (ssize_t)ret;
     }
 
-  fvdbg("return nbytes: %d\n", (int)nbytes);
+  finfo("return nbytes: %d\n", (int)nbytes);
   return (ssize_t)nbytes;
 }
 
@@ -1349,7 +1349,7 @@ static int s25fl1_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
   FAR struct s25fl1_dev_s *priv = (FAR struct s25fl1_dev_s *)dev;
   int ret = -EINVAL; /* Assume good command with bad parameters */
 
-  fvdbg("cmd: %d \n", cmd);
+  finfo("cmd: %d \n", cmd);
 
   switch (cmd)
     {
@@ -1380,7 +1380,7 @@ static int s25fl1_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
 #endif
               ret               = OK;
 
-              fvdbg("blocksize: %d erasesize: %d neraseblocks: %d\n",
+              finfo("blocksize: %d erasesize: %d neraseblocks: %d\n",
                     geo->blocksize, geo->erasesize, geo->neraseblocks);
             }
         }
@@ -1421,7 +1421,7 @@ static int s25fl1_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
         break;
     }
 
-  fvdbg("return %d\n", ret);
+  finfo("return %d\n", ret);
   return ret;
 }
 
@@ -1447,7 +1447,7 @@ FAR struct mtd_dev_s *s25fl1_initialize(FAR struct qspi_dev_s *qspi, bool unprot
   FAR struct s25fl1_dev_s *priv;
   int ret;
 
-  fvdbg("qspi: %p\n", qspi);
+  finfo("qspi: %p\n", qspi);
   DEBUGASSERT(qspi != NULL);
 
   /* Allocate a state structure (we allocate the structure instead of using
@@ -1476,7 +1476,7 @@ FAR struct mtd_dev_s *s25fl1_initialize(FAR struct qspi_dev_s *qspi, bool unprot
       priv->cmdbuf = (FAR uint8_t *)QSPI_ALLOC(qspi, 4);
       if (priv->cmdbuf == NULL)
         {
-          fdbg("ERROR Failed to allocate command buffer\n");
+          ferr("ERROR Failed to allocate command buffer\n");
           goto errout_with_priv;
         }
 
@@ -1485,7 +1485,7 @@ FAR struct mtd_dev_s *s25fl1_initialize(FAR struct qspi_dev_s *qspi, bool unprot
       priv->readbuf = (FAR uint8_t *)QSPI_ALLOC(qspi, 1);
       if (priv->readbuf == NULL)
         {
-          fdbg("ERROR Failed to allocate read buffer\n");
+          ferr("ERROR Failed to allocate read buffer\n");
           goto errout_with_cmdbuf;
         }
 
@@ -1496,7 +1496,7 @@ FAR struct mtd_dev_s *s25fl1_initialize(FAR struct qspi_dev_s *qspi, bool unprot
         {
           /* Unrecognized! Discard all of that work we just did and return NULL */
 
-          fdbg("ERROR Unrecognized QSPI device\n");
+          ferr("ERROR Unrecognized QSPI device\n");
           goto errout_with_readbuf;
         }
 
@@ -1521,7 +1521,7 @@ FAR struct mtd_dev_s *s25fl1_initialize(FAR struct qspi_dev_s *qspi, bool unprot
           ret = s25fl1_unprotect(priv, 0, priv->nsectors - 1);
           if (ret < 0)
             {
-              fdbg("ERROR: Sector unprotect failed\n");
+              ferr("ERROR: Sector unprotect failed\n");
             }
         }
 
@@ -1533,7 +1533,7 @@ FAR struct mtd_dev_s *s25fl1_initialize(FAR struct qspi_dev_s *qspi, bool unprot
         {
           /* Allocation failed! Discard all of that work we just did and return NULL */
 
-          fdbg("ERROR: Sector allocation failed\n");
+          ferr("ERROR: Sector allocation failed\n");
           goto errout_with_readbuf;
         }
 #endif
@@ -1547,7 +1547,7 @@ FAR struct mtd_dev_s *s25fl1_initialize(FAR struct qspi_dev_s *qspi, bool unprot
 
   /* Return the implementation-specific state structure as the MTD device */
 
-  fvdbg("Return %p\n", priv);
+  finfo("Return %p\n", priv);
   return (FAR struct mtd_dev_s *)priv;
 
 errout_with_readbuf:
diff --git a/drivers/mtd/sector512.c b/drivers/mtd/sector512.c
index 3705efb76903230c1f7604f07773d0bed2425f29..56e07c8c6a6cf117211b0e99bb6810b861e2701d 100644
--- a/drivers/mtd/sector512.c
+++ b/drivers/mtd/sector512.c
@@ -155,7 +155,7 @@ static FAR uint8_t *s512_cacheread(struct s512_dev_s *priv, off_t sector512)
   /* Get the erase block containing this sector */
 
   eblockno = sector512 / priv->stdperblock;
-  fvdbg("sector512: %lu eblockno: %lu\n",
+  finfo("sector512: %lu eblockno: %lu\n",
         (unsigned long)sector512, (unsigned long)eblockno);
 
   /* Check if the requested erase block is already in the cache */
@@ -173,7 +173,7 @@ static FAR uint8_t *s512_cacheread(struct s512_dev_s *priv, off_t sector512)
                                 priv->eblock);
       if (result < 0)
         {
-          fdbg("ERROR: bread(%lu, %lu) returned %ld\n",
+          ferr("ERROR: bread(%lu, %lu) returned %ld\n",
                (unsigned long)sector, (unsigned long)priv->eblocksize,
                (long)result);
 
@@ -221,7 +221,7 @@ static void s512_cacheflush(struct s512_dev_s *priv)
       result = priv->dev->bwrite(priv->dev, sector, priv->sectperblock, priv->eblock);
       if (result < 0)
         {
-          fdbg("ERROR: bwrite(%lu, %lu) returned %ld\n",
+          ferr("ERROR: bwrite(%lu, %lu) returned %ld\n",
                (unsigned long)sector, (unsigned long)priv->eblocksize,
                (long)result);
 
@@ -251,7 +251,7 @@ static int s512_erase(FAR struct mtd_dev_s *dev, off_t sector512, size_t nsector
   size_t eblockno;
   int ret;
 
-  fvdbg("sector512: %08lx nsectors: %lu\n",
+  finfo("sector512: %08lx nsectors: %lu\n",
         (unsigned long)sector512, (unsigned int)nsectors);
 
   while (sectorsleft-- > 0)
@@ -263,7 +263,7 @@ static int s512_erase(FAR struct mtd_dev_s *dev, off_t sector512, size_t nsector
       dest = s512_cacheread(priv, sector512);
       if (!dest)
         {
-          fdbg("ERROR: s512_cacheread(%ul) failed\n", (unsigned long)sector512);
+          ferr("ERROR: s512_cacheread(%ul) failed\n", (unsigned long)sector512);
           DEBUGPANIC();
           return -EIO;
         }
@@ -276,13 +276,13 @@ static int s512_erase(FAR struct mtd_dev_s *dev, off_t sector512, size_t nsector
       if (!IS_ERASED(priv))
         {
           eblockno  = sector512 / priv->stdperblock;
-          fvdbg("sector512: %lu eblockno: %lu\n",
+          finfo("sector512: %lu eblockno: %lu\n",
                 (unsigned long)sector512, (unsigned long)eblockno);
 
           ret = priv->dev->erase(priv->dev, eblockno, 1);
           if (ret < 0)
             {
-              fdbg("ERROR: Failed to erase block %lu: %d\n",
+              ferr("ERROR: Failed to erase block %lu: %d\n",
                    (unsigned long)eblockno, ret);
               return ret;
             }
@@ -320,7 +320,7 @@ static ssize_t s512_bread(FAR struct mtd_dev_s *dev, off_t sector512,
   ssize_t remaining;
   ssize_t result = nsectors;
 
-  fvdbg("sector512: %08lx nsectors: %d\n", (long)sector512, (int)nsectors);
+  finfo("sector512: %08lx nsectors: %d\n", (long)sector512, (int)nsectors);
 
   /* Read each 512 byte sector from the block via the erase block cache */
 
@@ -331,7 +331,7 @@ static ssize_t s512_bread(FAR struct mtd_dev_s *dev, off_t sector512,
       src = s512_cacheread(priv, sector512);
       if (!src)
         {
-          fdbg("ERROR: s512_cacheread(%ul) failed\n", (unsigned long)sector512);
+          ferr("ERROR: s512_cacheread(%ul) failed\n", (unsigned long)sector512);
           DEBUGPANIC();
 
           result = (ssize_t)nsectors - remaining;
@@ -369,7 +369,7 @@ static ssize_t s512_bwrite(FAR struct mtd_dev_s *dev, off_t sector512, size_t ns
   ssize_t result;
   off_t eblockno;
 
-  fvdbg("sector512: %08lx nsectors: %d\n", (long)sector512, (int)nsectors);
+  finfo("sector512: %08lx nsectors: %d\n", (long)sector512, (int)nsectors);
 
   FAR uint8_t *dest;
 
@@ -399,13 +399,13 @@ static ssize_t s512_bwrite(FAR struct mtd_dev_s *dev, off_t sector512, size_t ns
       if (!IS_ERASED(priv))
         {
           eblockno  = sector512 / priv->stdperblock;
-          fvdbg("sector512: %lu eblockno: %lu\n",
+          finfo("sector512: %lu eblockno: %lu\n",
                 (unsigned long)sector512, (unsigned long)eblockno);
 
           result = priv->dev->erase(priv->dev, eblockno, 1);
           if (result < 0)
             {
-              fdbg("ERROR: Failed to erase block %lu: %ld\n",
+              ferr("ERROR: Failed to erase block %lu: %ld\n",
                    (unsigned long)eblockno, (long)result);
               return result;
             }
@@ -445,7 +445,7 @@ static ssize_t s512_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
   off_t sectoffset;
   off_t sector;
 
-  fvdbg("offset: %08lx nbytes: %lu\n",
+  finfo("offset: %08lx nbytes: %lu\n",
         (unsigned long)offset, (unsigned long)nbytes);
 
   /* Convert the offset into 512 byte sector address and a byte offset */
@@ -464,7 +464,7 @@ static ssize_t s512_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
         {
           int result;
 
-          fdbg("ERROR: s512_cacheread(%ul) failed\n", (unsigned long)sector);
+          ferr("ERROR: s512_cacheread(%ul) failed\n", (unsigned long)sector);
           DEBUGPANIC();
 
           result = (ssize_t)nbytes - remaining;
@@ -488,7 +488,7 @@ static ssize_t s512_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
       buffer += xfrsize;
     }
 
-  fvdbg("return nbytes: %d\n", (int)nbytes);
+  finfo("return nbytes: %d\n", (int)nbytes);
   return nbytes;
 }
 
@@ -501,7 +501,7 @@ static int s512_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
   FAR struct s512_dev_s *priv = (FAR struct s512_dev_s *)dev;
   int ret = -EINVAL; /* Assume good command with bad parameters */
 
-  fvdbg("cmd: %d \n", cmd);
+  finfo("cmd: %d \n", cmd);
 
   switch (cmd)
     {
@@ -524,7 +524,7 @@ static int s512_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
               geo->neraseblocks = priv->neblocks * priv->stdperblock;
               ret               = OK;
 
-              fvdbg("blocksize: %d erasesize: %d neraseblocks: %d\n",
+              finfo("blocksize: %d erasesize: %d neraseblocks: %d\n",
                     geo->blocksize, geo->erasesize, geo->neraseblocks);
             }
         }
@@ -550,7 +550,7 @@ static int s512_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
         break;
     }
 
-  fvdbg("return %d\n", ret);
+  finfo("return %d\n", ret);
   return ret;
 }
 
@@ -578,7 +578,7 @@ FAR struct mtd_dev_s *s512_initialize(FAR struct mtd_dev_s *mtd)
   FAR struct mtd_geometry_s geo;
   int ret;
 
-  fvdbg("mtd: %p\n", mtd);
+  finfo("mtd: %p\n", mtd);
 
   /* Get the device geometry */
 
@@ -590,7 +590,7 @@ FAR struct mtd_dev_s *s512_initialize(FAR struct mtd_dev_s *mtd)
   if (ret < 0 || geo.erasesize <= SECTOR_512 ||
      (geo.erasesize & ~MASK_512) != geo.erasesize)
     {
-      fdbg("ERROR: MTDIOC_GEOMETRY ioctl returned %d, eraseize=%d\n",
+      ferr("ERROR: MTDIOC_GEOMETRY ioctl returned %d, eraseize=%d\n",
            ret, geo.erasesize);
       DEBUGPANIC();
       return NULL;
@@ -629,7 +629,7 @@ FAR struct mtd_dev_s *s512_initialize(FAR struct mtd_dev_s *mtd)
         {
           /* Allocation failed! Discard all of that work we just did and return NULL */
 
-          fdbg("Allocation failed\n");
+          ferr("ERROR: Allocation failed\n");
           kmm_free(priv);
           priv = NULL;
         }
@@ -643,6 +643,6 @@ FAR struct mtd_dev_s *s512_initialize(FAR struct mtd_dev_s *mtd)
 
   /* Return the implementation-specific state structure as the MTD device */
 
-  fvdbg("Return %p\n", priv);
+  finfo("Return %p\n", priv);
   return &priv->mtd;
 }
diff --git a/drivers/mtd/smart.c b/drivers/mtd/smart.c
index 50804cc3abc595f94f4c21a5543b90a353f586c3..bbd7be3cdd05c50b86a51ddd04452c1d59e30a63 100644
--- a/drivers/mtd/smart.c
+++ b/drivers/mtd/smart.c
@@ -3,7 +3,7 @@
  *
  * Sector Mapped Allocation for Really Tiny (SMART) Flash block driver.
  *
- *   Copyright (C) 2013-2015 Ken Pettit. All rights reserved.
+ *   Copyright (C) 2013-2016 Ken Pettit. All rights reserved.
  *   Author: Ken Pettit 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -73,7 +73,7 @@
 #define SMART_STATUS_COMMITTED    0x80
 #define SMART_STATUS_RELEASED     0x40
 #define SMART_STATUS_CRC          0x20
-#define SMART_STATUS_SIZEBITS     0x1C
+#define SMART_STATUS_SIZEBITS     0x1c
 #define SMART_STATUS_VERBITS      0x03
 
 #if defined(CONFIG_SMART_CRC_16)
@@ -87,7 +87,7 @@
 #define SMART_SECTSIZE_256        0x00
 #define SMART_SECTSIZE_512        0x04
 #define SMART_SECTSIZE_1024       0x08
-#define SMART_SECTSIZE_2048       0x0C
+#define SMART_SECTSIZE_2048       0x0c
 #define SMART_SECTSIZE_4096       0x10
 #define SMART_SECTSIZE_8192       0x14
 #define SMART_SECTSIZE_16384      0x18
@@ -134,7 +134,7 @@
 #define offsetof(type, member) ( (size_t) &( ( (type *) 0)->member))
 #endif
 
-#define SMART_MAX_ALLOCS        6
+#define SMART_MAX_ALLOCS        10
 //#define CONFIG_MTD_SMART_PACK_COUNTS
 
 #ifndef CONFIG_MTD_SMART_ALLOC_DEBUG
@@ -147,7 +147,7 @@
 #define SMART_WEAR_MIN_LEVEL                5
 #define SMART_WEAR_FORCE_REORG_THRESHOLD    1
 #define SMART_WEAR_BIT_DIVIDE               1
-#define SMART_WEAR_ZERO_MASK                0x0F
+#define SMART_WEAR_ZERO_MASK                0x0f
 #define SMART_WEAR_BLOCK_MASK               0x01
 
 /* Bit mapping for wear level bits */
@@ -167,10 +167,10 @@
 
 static const uint8_t gWearLevelToBitMap4[] =
 {
-  0x0F, 0x0E, 0x0C, 0x08,     /* Single bit erased (x3) */
+  0x0f, 0x0e, 0x0c, 0x08,     /* Single bit erased (x3) */
   0x07, 0x06, 0x04, 0x00,     /* Single bit erased (x3) */
-  0x0B, 0x0A, 0x02,           /* Single bit erased (x2) */
-  0x0D, 0x09, 0x01,           /* Single bit erased (x2) */
+  0x0b, 0x0a, 0x02,           /* Single bit erased (x2) */
+  0x0d, 0x09, 0x01,           /* Single bit erased (x2) */
   0x03,
   0x05
 };
@@ -441,7 +441,7 @@ static const struct file_operations g_fops =
 
 static int smart_open(FAR struct inode *inode)
 {
-  fvdbg("Entry\n");
+  finfo("Entry\n");
   return OK;
 }
 
@@ -454,7 +454,7 @@ static int smart_open(FAR struct inode *inode)
 
 static int smart_close(FAR struct inode *inode)
 {
-  fvdbg("Entry\n");
+  finfo("Entry\n");
   return OK;
 }
 
@@ -473,6 +473,18 @@ FAR static void *smart_malloc(FAR struct smart_struct_s *dev,
   FAR void *ret = kmm_malloc(bytes);
   uint8_t x;
 
+  /* Test if we are allocating the dev struct */
+
+  if (dev == NULL)
+    {
+      dev = ret;
+      dev->bytesalloc = 0;
+      for (x = 0; x < SMART_MAX_ALLOCS; x++)
+        {
+          dev->alloc[x].ptr = NULL;
+        }
+    }
+
   /* Keep track of the total allocation */
 
   if (ret != NULL)
@@ -493,7 +505,7 @@ FAR static void *smart_malloc(FAR struct smart_struct_s *dev,
         }
     }
 
-  fdbg("SMART alloc: %ld\n", dev->bytesalloc);
+  finfo("SMART alloc: %ld\n", dev->bytesalloc);
   return ret;
 }
 #endif
@@ -545,11 +557,11 @@ static void smart_set_count(FAR struct smart_struct_s *dev, FAR uint8_t *pCount,
 
       if (block & 0x01)
         {
-          pCount[block >> 1] = (pCount[block >> 1] & 0xF0) | (count & 0x0F);
+          pCount[block >> 1] = (pCount[block >> 1] & 0xf0) | (count & 0x0f);
         }
       else
         {
-          pCount[block >> 1] = (pCount[block >> 1] & 0x0F) | ((count & 0x0F) << 4);
+          pCount[block >> 1] = (pCount[block >> 1] & 0x0f) | ((count & 0x0f) << 4);
         }
 
       /* If we have 16 sectors per block, then the upper bit (representing 16)
@@ -595,7 +607,7 @@ static uint8_t smart_get_count(FAR struct smart_struct_s *dev,
 
       if (block & 0x01)
         {
-          count = pCount[block >> 1] & 0x0F;
+          count = pCount[block >> 1] & 0x0f;
         }
       else
         {
@@ -672,12 +684,12 @@ int smart_checkfree(FAR struct smart_struct_s *dev, int lineno)
 #ifdef CONFIG_DEBUG_FS
   if (freecount != dev->freesectors)
     {
-      fdbg("Free count incorrect in line %d!  Calculated=%d, dev->freesectors=%d\n",
+      fwarn("WARNING: Free count incorrect in line %d!  Calculated=%d, dev->freesectors=%d\n",
            lineno, freecount, dev->freesectors);
 
       /* Determine what changed from the last time which caused this error */
 
-      fdbg("   ... Prev freesectors=%d, prev releasesectors=%d\n",
+      fwarn("   ... Prev freesectors=%d, prev releasesectors=%d\n",
            prev_freesectors, prev_releasesectors);
 
       if (prev_freecount)
@@ -695,7 +707,7 @@ int smart_checkfree(FAR struct smart_struct_s *dev, int lineno)
                 {
                   /* This block's values are different from the last time ... report it */
 
-                  fdbg("   ... Block %d:  Old Free=%d, old release=%d,    New free=%d, new release = %d\n",
+                  fwarn("   ... Block %d:  Old Free=%d, old release=%d,    New free=%d, new release = %d\n",
                       x, prev_freecount[x], prev_releasecount[x], blockfree, blockrelease);
                 }
             }
@@ -767,11 +779,11 @@ static ssize_t smart_reload(struct smart_struct_s *dev, FAR uint8_t *buffer,
 
   /* Read the full erase block into the buffer */
 
-  fvdbg("Read %d blocks starting at block %d\n", mtdBlocks, mtdStartBlock);
+  finfo("Read %d blocks starting at block %d\n", mtdBlocks, mtdStartBlock);
   nread = MTD_BREAD(dev->mtd, mtdStartBlock, mtdBlocks, buffer);
   if (nread != mtdBlocks)
     {
-      fdbg("Read %d blocks starting at block %d failed: %d\n",
+      ferr("ERROR: Read %d blocks starting at block %d failed: %d\n",
            nblocks, startblock, nread);
     }
 
@@ -790,7 +802,7 @@ static ssize_t smart_read(FAR struct inode *inode, unsigned char *buffer,
 {
   FAR struct smart_struct_s *dev;
 
-  fvdbg("SMART: sector: %d nsectors: %d\n", start_sector, nsectors);
+  finfo("SMART: sector: %d nsectors: %d\n", start_sector, nsectors);
 
   DEBUGASSERT(inode && inode->i_private);
 #ifdef CONFIG_SMARTFS_MULTI_ROOT_DIRS
@@ -826,7 +838,7 @@ static ssize_t smart_write(FAR struct inode *inode,
   int    ret;
   off_t  mtdstartblock, mtdblockcount;
 
-  fvdbg("sector: %d nsectors: %d\n", start_sector, nsectors);
+  finfo("sector: %d nsectors: %d\n", start_sector, nsectors);
 
   DEBUGASSERT(inode && inode->i_private);
 #ifdef CONFIG_SMARTFS_MULTI_ROOT_DIRS
@@ -851,7 +863,7 @@ static ssize_t smart_write(FAR struct inode *inode,
   mtdblockcount = nsectors * dev->mtdBlksPerSector;
   mtdBlksPerErase = dev->mtdBlksPerSector * dev->sectorsPerBlk;
 
-  fvdbg("mtdsector: %d mtdnsectors: %d\n", mtdstartblock, mtdblockcount);
+  finfo("mtdsector: %d mtdnsectors: %d\n", mtdstartblock, mtdblockcount);
 
   /* Start at first block to be written */
 
@@ -873,7 +885,7 @@ static ssize_t smart_write(FAR struct inode *inode,
           ret = MTD_ERASE(dev->mtd, eraseblock, 1);
           if (ret < 0)
             {
-              fdbg("Erase block=%d failed: %d\n", eraseblock, ret);
+              ferr("ERROR: Erase block=%d failed: %d\n", eraseblock, ret);
 
               /* Unlock the mutex if we add one */
 
@@ -896,13 +908,13 @@ static ssize_t smart_write(FAR struct inode *inode,
 
       /* Try to write to the sector. */
 
-      fdbg("Write MTD block %d from offset %d\n", nextblock, offset);
+      finfo("Write MTD block %d from offset %d\n", nextblock, offset);
       nxfrd = MTD_BWRITE(dev->mtd, nextblock, blkstowrite, &buffer[offset]);
       if (nxfrd != blkstowrite)
         {
           /* The block is not empty!!  What to do? */
 
-          fdbg("Write block %d failed: %d.\n", nextblock, nxfrd);
+          ferr("ERROR: Write block %d failed: %d.\n", nextblock, nxfrd);
 
           /* Unlock the mutex if we add one */
 
@@ -933,7 +945,7 @@ static int smart_geometry(FAR struct inode *inode, struct geometry *geometry)
   FAR struct smart_struct_s *dev;
   uint32_t  erasesize;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   DEBUGASSERT(inode);
   if (geometry)
@@ -956,9 +968,9 @@ static int smart_geometry(FAR struct inode *inode, struct geometry *geometry)
                                     dev->sectorsize;
       geometry->geo_sectorsize    = dev->sectorsize;
 
-      fvdbg("available: true mediachanged: false writeenabled: %s\n",
+      finfo("available: true mediachanged: false writeenabled: %s\n",
             geometry->geo_writeenabled ? "true" : "false");
-      fvdbg("nsectors: %d sectorsize: %d\n",
+      finfo("nsectors: %d sectorsize: %d\n",
             geometry->geo_nsectors, geometry->geo_sectorsize);
 
       return OK;
@@ -999,9 +1011,12 @@ static int smart_setsectorsize(FAR struct smart_struct_s *dev, uint16_t size)
   dev->sectorsize       = size;
   dev->mtdBlksPerSector = dev->sectorsize / dev->geo.blocksize;
 
+  DEBUGASSERT(dev->sectorsize >= dev->geo.blocksize);
+  DEBUGASSERT(erasesize / dev->sectorsize <= 256);
+
   if (erasesize / dev->sectorsize > 256)
     {
-      /* We can't throw a dbg message here becasue it is too early.
+      /* We can't throw a error message here becasue it is too early.
        * set the erasesize to zero and exit, then we will detect
        * it during mksmartfs or mount.
        */
@@ -1051,7 +1066,7 @@ static int smart_setsectorsize(FAR struct smart_struct_s *dev, uint16_t size)
     }
 
   dev->cache_entries = 0;
-  dev->cache_lastlog = 0xFFFF;
+  dev->cache_lastlog = 0xffff;
   dev->cache_nextbirth = 0;
 #endif
 
@@ -1079,7 +1094,7 @@ static int smart_setsectorsize(FAR struct smart_struct_s *dev, uint16_t size)
 
   if (totalsectors > 65536)
     {
-      dbg("Invalid SMART sector count %ld\n", totalsectors);
+      ferr("ERROR: Invalid SMART sector count %ld\n", totalsectors);
       return -EINVAL;
     }
   else if (totalsectors == 65536)
@@ -1099,7 +1114,7 @@ static int smart_setsectorsize(FAR struct smart_struct_s *dev, uint16_t size)
               allocsize, "Sector map");
   if (!dev->sMap)
     {
-      fdbg("Error allocating SMART virtual map buffer\n");
+      ferr("ERROR: Error allocating SMART virtual map buffer\n");
       goto errexit;
     }
 
@@ -1109,7 +1124,7 @@ static int smart_setsectorsize(FAR struct smart_struct_s *dev, uint16_t size)
   dev->sBitMap = (FAR uint8_t *) smart_malloc(dev, (totalsectors+7) >> 3, "Sector Bitmap");
   if (dev->sBitMap == NULL)
     {
-      fdbg("Error allocating SMART sector cache\n");
+      ferr("ERROR: Error allocating SMART sector cache\n");
       goto errexit;
     }
 
@@ -1144,7 +1159,7 @@ static int smart_setsectorsize(FAR struct smart_struct_s *dev, uint16_t size)
 
   if (!dev->sCache)
     {
-      fdbg("Error allocating SMART sector cache\n");
+      ferr("ERROR: Error allocating SMART sector cache\n");
       goto errexit;
     }
 
@@ -1181,7 +1196,7 @@ static int smart_setsectorsize(FAR struct smart_struct_s *dev, uint16_t size)
 
   if (!dev->erasecounts)
     {
-      fdbg("Error allocating erase count array\n");
+      ferr("ERROR: Error allocating erase count array\n");
       goto errexit;
     }
 
@@ -1195,7 +1210,7 @@ static int smart_setsectorsize(FAR struct smart_struct_s *dev, uint16_t size)
       SMART_WEAR_BIT_DIVIDE, "Wear status");
   if (!dev->wearstatus)
     {
-      fdbg("Error allocating wear level status array\n");
+      ferr("ERROR: Error allocating wear level status array\n");
       goto errexit;
     }
 
@@ -1210,7 +1225,7 @@ static int smart_setsectorsize(FAR struct smart_struct_s *dev, uint16_t size)
   dev->rwbuffer = (FAR char *) smart_malloc(dev, size, "RW Buffer");
   if (!dev->rwbuffer)
     {
-      fdbg("Error allocating SMART read/write buffer\n");
+      ferr("ERROR: Error allocating SMART read/write buffer\n");
       goto errexit;
     }
 
@@ -1304,7 +1319,7 @@ static ssize_t smart_bytewrite(FAR struct smart_struct_s *dev, size_t offset,
       ret = MTD_BREAD(dev->mtd, startblock, nblocks, (FAR uint8_t *) dev->rwbuffer);
       if (ret < 0)
         {
-          fdbg("Error %d reading from device\n", -ret);
+          ferr("ERROR: Error %d reading from device\n", -ret);
           goto errout;
         }
 
@@ -1317,7 +1332,7 @@ static ssize_t smart_bytewrite(FAR struct smart_struct_s *dev, size_t offset,
       ret = MTD_BWRITE(dev->mtd, startblock, nblocks, (FAR uint8_t *) dev->rwbuffer);
       if (ret < 0)
         {
-          fdbg("Error %d writing to device\n", -ret);
+          ferr("ERROR: Error %d writing to device\n", -ret);
           goto errout;
         }
     }
@@ -1359,7 +1374,7 @@ static int smart_add_sector_to_cache(FAR struct smart_struct_s *dev,
     {
       /* Cache is full.  We must find the least accessed entry and replace it */
 
-      oldest = 0xFFFF;
+      oldest = 0xffff;
       for (x = 0; x < CONFIG_MTD_SMART_SECTOR_CACHE_SIZE; x++)
         {
           /* Never replace cache entries for system sectors */
@@ -1387,7 +1402,7 @@ static int smart_add_sector_to_cache(FAR struct smart_struct_s *dev,
 
   if (dev->debuglevel > 1)
     {
-      dbg("Add Cache sector:  Log=%d, Phys=%d at index %d from line %d\n",
+      _err("Add Cache sector:  Log=%d, Phys=%d at index %d from line %d\n",
           logical, physical, index, line);
     }
 
@@ -1427,7 +1442,7 @@ static uint16_t smart_cache_lookup(FAR struct smart_struct_s *dev, uint16_t logi
   struct    smart_sect_header_s header;
   size_t    readaddress;
 
-  physical = 0xFFFF;
+  physical = 0xffff;
 
   /* Test if searching for the last sector used */
 
@@ -1453,7 +1468,7 @@ static uint16_t smart_cache_lookup(FAR struct smart_struct_s *dev, uint16_t logi
    * for it and add it to the cache.
    */
 
-  if (physical == 0xFFFF)
+  if (physical == 0xffff)
     {
       /* Now scan the MTD device.  Instead of scanning start to end, we
        * span the erase blocks and read one sector from each at a time.
@@ -1462,7 +1477,7 @@ static uint16_t smart_cache_lookup(FAR struct smart_struct_s *dev, uint16_t logi
        * numbers in each erase block first.
        */
 
-      for (sector = 0; sector < dev->sectorsPerBlk && physical == 0xFFFF; sector++)
+      for (sector = 0; sector < dev->availSectPerBlk && physical == 0xffff; sector++)
         {
           /* Now scan across each erase block */
 
@@ -1566,7 +1581,7 @@ static void smart_update_cache(FAR struct smart_struct_s *dev, uint16_t
            * the cache.
            */
 
-          if (physical == 0xFFFF)
+          if (physical == 0xffff)
             {
                 dev->sCache[x].logical = dev->sCache[dev->cache_entries-1].logical;
                 dev->sCache[x].physical = dev->sCache[dev->cache_entries-1].physical;
@@ -1575,7 +1590,7 @@ static void smart_update_cache(FAR struct smart_struct_s *dev, uint16_t
 
           if (dev->debuglevel > 1)
             {
-              dbg("Update Cache:  Log=%d, Phys=%d at index %d\n", logical, physical, x);
+              _err("Update Cache:  Log=%d, Phys=%d at index %d\n", logical, physical, x);
             }
 
           break;
@@ -1615,7 +1630,7 @@ static uint8_t smart_get_wear_level(FAR struct smart_struct_s *dev, uint16_t blo
     {
       /* Use the lower nibble */
 
-      bits &= 0x0F;
+      bits &= 0x0f;
     }
 
   /* Lookup and return the level using the BitToLevel map */
@@ -1712,7 +1727,7 @@ static int smart_set_wear_level(FAR struct smart_struct_s *dev, uint16_t block,
 
   if (level > 15)
     {
-      dbg("Fatal Design Error!  Wear level > 15, block=%d\n", block);
+      _err("ERROR: Fatal Design Error!  Wear level > 15, block=%d\n", block);
 
       /* This is a design flaw, but we still allow processing, otherwise we
        * will corrupt the volume.  It's better to have a few blocks that are
@@ -1732,14 +1747,14 @@ static int smart_set_wear_level(FAR struct smart_struct_s *dev, uint16_t block,
     {
       /* Use the upper nibble */
 
-      dev->wearstatus[block >> SMART_WEAR_BIT_DIVIDE] &= 0x0F;
+      dev->wearstatus[block >> SMART_WEAR_BIT_DIVIDE] &= 0x0f;
       dev->wearstatus[block >> SMART_WEAR_BIT_DIVIDE] |= bits << 4;
     }
   else
     {
       /* Use the lower nibble */
 
-      dev->wearstatus[block >> SMART_WEAR_BIT_DIVIDE] &= 0xF0;
+      dev->wearstatus[block >> SMART_WEAR_BIT_DIVIDE] &= 0xf0;
       dev->wearstatus[block >> SMART_WEAR_BIT_DIVIDE] |= bits;
     }
 
@@ -1767,7 +1782,7 @@ static int smart_set_wear_level(FAR struct smart_struct_s *dev, uint16_t block,
           smart_find_wear_minmax(dev);
 
           if (oldlevel != dev->minwearlevel)
-              fvdbg("##### New min wear level = %d\n", dev->minwearlevel);
+              finfo("##### New min wear level = %d\n", dev->minwearlevel);
         }
     }
 
@@ -1807,7 +1822,7 @@ static int smart_scan(FAR struct smart_struct_s *dev)
   FAR struct smart_multiroot_device_s *rootdirdev;
 #endif
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* Find the sector size on the volume by reading headers from
    * sectors of decreasing size.  On a formatted volume, the sector
@@ -1817,10 +1832,10 @@ static int smart_scan(FAR struct smart_struct_s *dev)
    * a header and not sector data.
    */
 
-  sectorsize = 0xFFFF;
+  sectorsize = 0xffff;
   offset = 16384;
 
-  while (sectorsize == 0xFFFF)
+  while (sectorsize == 0xffff)
     {
       readaddress = 0;
 
@@ -1845,7 +1860,7 @@ static int smart_scan(FAR struct smart_struct_s *dev)
         }
 
       offset >>= 1;
-      if (offset < 256 && sectorsize == 0xFFFF)
+      if (offset < 256 && sectorsize == 0xffff)
         {
           /* No valid sectors found on device.  Default the
            * sector size to the CONFIG value
@@ -1909,7 +1924,7 @@ static int smart_scan(FAR struct smart_struct_s *dev)
 
   for (sector = 0; sector < totalsectors; sector++)
     {
-      fvdbg("Scan sector %d\n", sector);
+      finfo("Scan sector %d\n", sector);
 
       /* Calculate the read address for this sector */
 
@@ -1984,7 +1999,7 @@ static int smart_scan(FAR struct smart_struct_s *dev)
         {
           /* Error in logical sector read from the MTD device */
 
-          fdbg("Invalid logical sector %d at physical %d.\n",
+          ferr("ERROR: Invalid logical sector %d at physical %d.\n",
                logicalsector, sector);
           continue;
         }
@@ -2001,7 +2016,7 @@ static int smart_scan(FAR struct smart_struct_s *dev)
                          (FAR uint8_t *)dev->rwbuffer);
           if (ret != 32)
             {
-              fdbg("Error reading physical sector %d.\n", sector);
+              ferr("ERROR: Error reading physical sector %d.\n", sector);
               goto err_out;
             }
 
@@ -2053,7 +2068,7 @@ static int smart_scan(FAR struct smart_struct_s *dev)
                 smart_malloc(dev, sizeof(*rootdirdev), "Root Dir");
               if (rootdirdev == NULL)
                 {
-                  fdbg("Memory alloc failed\n");
+                  ferr("ERROR: Memory alloc failed\n");
                   ret = -ENOMEM;
                   goto err_out;
                 }
@@ -2074,7 +2089,7 @@ static int smart_scan(FAR struct smart_struct_s *dev)
       /* Test for duplicate logical sectors on the device */
 
 #ifndef CONFIG_MTD_SMART_MINIMIZE_RAM
-      if (dev->sMap[logicalsector] != 0xFFFF)
+      if (dev->sMap[logicalsector] != 0xffff)
 #else
       if (dev->sBitMap[logicalsector >> 3] & (1 << (logicalsector & 0x07)))
 #endif
@@ -2184,7 +2199,7 @@ static int smart_scan(FAR struct smart_struct_s *dev)
 
           /* Now determine who wins */
 
-          if ((seq1 > 0xFFF0 && seq2 < 10) || seq2 > seq1)
+          if ((seq1 > 0xfff0 && seq2 < 10) || seq2 > seq1)
             {
               /* Seq 2 is the winner ... bigger or it wrapped */
 
@@ -2212,7 +2227,7 @@ static int smart_scan(FAR struct smart_struct_s *dev)
               goto err_out;
             }
 
-#if CONFIG_SMARTFS_ERASEDSTATE == 0xFF
+#if CONFIG_SMARTFS_ERASEDSTATE == 0xff
           header.status &= ~SMART_STATUS_RELEASED;
 #else
           header.status |= SMART_STATUS_RELEASED;
@@ -2221,7 +2236,7 @@ static int smart_scan(FAR struct smart_struct_s *dev)
           ret = smart_bytewrite(dev, offset, 1, &header.status);
           if (ret < 0)
             {
-              fdbg("Error %d releasing duplicate sector\n", -ret);
+              ferr("ERROR: Error %d releasing duplicate sector\n", -ret);
               goto err_out;
             }
         }
@@ -2248,7 +2263,7 @@ static int smart_scan(FAR struct smart_struct_s *dev)
   /* We need to check if we are converting an older format with incorrect
    * wear leveling data in sector zero to the new format.  The old format
    * put all zeros in the wear level bit locations, but the new (better)
-   * way is to leave them 0xFF.
+   * way is to leave them 0xff.
    */
 
 #ifndef CONFIG_MTD_SMART_MINIMIZE_RAM
@@ -2259,7 +2274,7 @@ static int smart_scan(FAR struct smart_struct_s *dev)
 
   /* Validate the sector is valid ... may be an unformatted device */
 
-  if (sector != 0xFFFF)
+  if (sector != 0xffff)
     {
       /* Read the sector data */
 
@@ -2267,7 +2282,7 @@ static int smart_scan(FAR struct smart_struct_s *dev)
               dev->mtdBlksPerSector, (uint8_t *) dev->rwbuffer);
       if (ret != dev->mtdBlksPerSector)
         {
-          fdbg("Error reading physical sector %d.\n", sector);
+          ferr("ERROR: Error reading physical sector %d.\n", sector);
           goto err_out;
         }
 
@@ -2276,20 +2291,20 @@ static int smart_scan(FAR struct smart_struct_s *dev)
       if (dev->rwbuffer[SMART_WEAR_LEVEL_FORMAT_SIG] == 0)
         {
           /* Old format detected.  We must relocate sector zero and fill it
-           * in with 0xFF.
+           * in with 0xff.
            */
 
           uint16_t newsector = smart_findfreephyssector(dev, FALSE);
-          if (newsector == 0xFFFF)
+          if (newsector == 0xffff)
             {
               /* Unable to find a free sector!!! */
 
-              fdbg("Can't find a free sector for relocation\n");
+              ferr("ERROR: Can't find a free sector for relocation\n");
               ret = -ENOSPC;
               goto err_out;
             }
 
-          memset(&dev->rwbuffer[SMART_WEAR_LEVEL_FORMAT_SIG], 0xFF,
+          memset(&dev->rwbuffer[SMART_WEAR_LEVEL_FORMAT_SIG], 0xff,
               dev->mtdBlksPerSector * dev->geo.blocksize -
               SMART_WEAR_LEVEL_FORMAT_SIG);
 
@@ -2321,29 +2336,29 @@ static int smart_scan(FAR struct smart_struct_s *dev)
   smart_read_wearstatus(dev);
 #endif
 
-  fdbg("SMART Scan\n");
-  fdbg("   Erase size:   %10d\n", dev->sectorsPerBlk * dev->sectorsize);
-  fdbg("   Erase count:  %10d\n", dev->neraseblocks);
-  fdbg("   Sect/block:   %10d\n", dev->sectorsPerBlk);
-  fdbg("   MTD Blk/Sect: %10d\n", dev->mtdBlksPerSector);
+  finfo("SMART Scan\n");
+  finfo("   Erase size:   %10d\n", dev->sectorsPerBlk * dev->sectorsize);
+  finfo("   Erase count:  %10d\n", dev->neraseblocks);
+  finfo("   Sect/block:   %10d\n", dev->sectorsPerBlk);
+  finfo("   MTD Blk/Sect: %10d\n", dev->mtdBlksPerSector);
 
   /* Validate the geometry */
 
   if (dev->mtdBlksPerSector == 0 || dev->sectorsPerBlk == 0 ||
       dev->sectorsPerBlk == 0 || dev->sectorsize == 0)
     {
-      fdbg("Invalid Geometry!\n");
+      ferr("ERROR: Invalid Geometry!\n");
       ret = -EINVAL;
       goto err_out;
     }
 
 #ifdef CONFIG_MTD_SMART_ALLOC_DEBUG
-  fdbg("   Allocations:\n");
+  finfo("   Allocations:\n");
   for (sector = 0; sector < SMART_MAX_ALLOCS; sector++)
     {
       if (dev->alloc[sector].ptr != NULL)
         {
-          fdbg("       %s: %d\n", dev->alloc[sector].name, dev->alloc[sector].size);
+          finfo("       %s: %d\n", dev->alloc[sector].name, dev->alloc[sector].size);
         }
     }
 #endif
@@ -2373,7 +2388,7 @@ static inline int smart_getformat(FAR struct smart_struct_s *dev,
 {
   int ret;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
   DEBUGASSERT(fmt);
 
   /* Test if we know the format status or not.  If we don't know the
@@ -2515,7 +2530,7 @@ static void smart_erase_block_if_empty(FAR struct smart_struct_s *dev,
 #ifdef CONFIG_SMART_LOCAL_CHECKFREE
       if (smart_checkfree(dev, __LINE__) != OK)
         {
-          fdbg("   ...while eraseing block %d\n", block);
+          fwarn("   ...while eraseing block %d\n", block);
         }
 #endif
     }
@@ -2554,7 +2569,7 @@ static int smart_relocate_static_data(FAR struct smart_struct_s *dev, uint16_t b
 #ifdef CONFIG_SMART_LOCAL_CHECKFREE
   if (smart_checkfree(dev, __LINE__) != OK)
     {
-      fdbg("   ...about to relocate static data %d\n", block);
+      fwarn("   ...about to relocate static data %d\n", block);
     }
 #endif
 
@@ -2630,7 +2645,7 @@ static int smart_relocate_static_data(FAR struct smart_struct_s *dev, uint16_t b
       nextsector = dev->freecount[x];
       newsector = dev->releasecount[x];
 #endif
-      fvdbg("Moving block %d, wear %d, free %d, released %d to block %d, wear %d\n",
+      finfo("Moving block %d, wear %d, free %d, released %d to block %d, wear %d\n",
               x, smart_get_wear_level(dev, x),
               nextsector, newsector,
               block, smart_get_wear_level(dev, block));
@@ -2645,7 +2660,7 @@ static int smart_relocate_static_data(FAR struct smart_struct_s *dev, uint16_t b
               dev->mtdBlksPerSector, (FAR uint8_t *) dev->rwbuffer);
           if (ret != dev->mtdBlksPerSector)
             {
-              fdbg("Error reading sector %d\n", sector);
+              ferr("ERROR: Error reading sector %d\n", sector);
               ret = -EIO;
               goto errout;
             }
@@ -2677,11 +2692,11 @@ static int smart_relocate_static_data(FAR struct smart_struct_s *dev, uint16_t b
               /* Get next sector from 'block' */
 
               newsector = nextsector++;
-              if (newsector == 0xFFFF)
+              if (newsector == 0xffff)
                 {
                   /* Unable to find a free sector!!! */
 
-                  fdbg("Can't find a free sector for relocation\n");
+                  ferr("ERROR: Can't find a free sector for relocation\n");
                   ret = -ENOSPC;
                   goto errout;
                 }
@@ -2736,7 +2751,7 @@ static int smart_relocate_static_data(FAR struct smart_struct_s *dev, uint16_t b
 #ifdef CONFIG_SMART_LOCAL_CHECKFREE
       if (smart_checkfree(dev, __LINE__) != OK)
         {
-          fdbg("   ...about to erase static block %d\n", block);
+          fwarn("   ...about to erase static block %d\n", block);
         }
 #endif
 
@@ -2748,7 +2763,7 @@ static int smart_relocate_static_data(FAR struct smart_struct_s *dev, uint16_t b
 #ifdef CONFIG_SMART_LOCAL_CHECKFREE
   if (smart_checkfree(dev, __LINE__) != OK)
     {
-      fdbg("   ...done erasing static block %d\n", block);
+      fwarn("   ...done erasing static block %d\n", block);
     }
 #endif
 
@@ -2842,7 +2857,7 @@ static inline int smart_llformat(FAR struct smart_struct_s *dev, unsigned long a
   uint8_t     sectsize, prerelease;
   uint16_t    sectorsize;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* Get the sector size from the provided arg */
 
@@ -2862,10 +2877,10 @@ static inline int smart_llformat(FAR struct smart_struct_s *dev, unsigned long a
     {
       dev->erasesize = dev->geo.erasesize;
 
-      dbg("ERROR:  Invalid geometery ... Sectors per erase block must be 1-256\n");
-      dbg("        Erase block size    = %d\n", dev->erasesize);
-      dbg("        Sector size         = %d\n", dev->sectorsize);
-      dbg("        Sectors/erase block = %d\n", dev->erasesize / dev->sectorsize);
+      ferr("ERROR:  Invalid geometery ... Sectors per erase block must be 1-256\n");
+      ferr("        Erase block size    = %d\n", dev->erasesize);
+      ferr("        Sector size         = %d\n", dev->sectorsize);
+      ferr("        Sectors/erase block = %d\n", dev->erasesize / dev->sectorsize);
 
       return -EINVAL;
     }
@@ -2903,7 +2918,7 @@ static inline int smart_llformat(FAR struct smart_struct_s *dev, unsigned long a
 
   /* Set the sector logical sector to zero and setup the header status */
 
-#if ( CONFIG_SMARTFS_ERASEDSTATE == 0xFF )
+#if ( CONFIG_SMARTFS_ERASEDSTATE == 0xff )
   *((FAR uint16_t *) sectorheader->logicalsector) = 0;
   sectorheader->status = (uint8_t) ~(SMART_STATUS_COMMITTED | SMART_STATUS_VERBITS |
           SMART_STATUS_SIZEBITS) | SMART_STATUS_VERSION |
@@ -2912,14 +2927,14 @@ static inline int smart_llformat(FAR struct smart_struct_s *dev, unsigned long a
   sectorheader->status &= ~SMART_STATUS_CRC;
 #endif  /* CONFIG_MTD_SMART_ENABLE_CRC */
 
-#else   /* CONFIG_SMARTFS_ERASEDSTATE == 0xFF */
-  *((FAR uint16_t *) sectorheader->logicalsector) = 0xFFFF;
+#else   /* CONFIG_SMARTFS_ERASEDSTATE == 0xff */
+  *((FAR uint16_t *) sectorheader->logicalsector) = 0xffff;
   sectorheader->status = (uint8_t) (SMART_STATUS_COMMITTED | SMART_STATUS_VERSION |
           sectsize);
 #ifdef CONFIG_MTD_SMART_ENABLE_CRC
   sectorheader->status |= SMART_STATUS_CRC;
 #endif  /* CONFIG_MTD_SMART_ENABLE_CRC */
-#endif  /* CONFIG_SMARTFS_ERASEDSTATE == 0xFF */
+#endif  /* CONFIG_SMARTFS_ERASEDSTATE == 0xff */
 
   /* Now add the format signature to the sector */
 
@@ -2933,7 +2948,7 @@ static inline int smart_llformat(FAR struct smart_struct_s *dev, unsigned long a
 
   /* Record the number of root directory entries we have */
 
-  dev->rwbuffer[SMART_FMT_ROOTDIRS_POS] = (uint8_t) (arg & 0xFF);
+  dev->rwbuffer[SMART_FMT_ROOTDIRS_POS] = (uint8_t) (arg & 0xff);
 
 #ifdef CONFIG_SMART_CRC_8
   sectorheader->crc8 = smart_calc_sector_crc(dev);
@@ -2951,7 +2966,7 @@ static inline int smart_llformat(FAR struct smart_struct_s *dev, unsigned long a
     {
       /* The block is not empty!!  What to do? */
 
-      fdbg("Write block 0 failed: %d.\n", wrcount);
+      ferr("ERROR: Write block 0 failed: %d.\n", wrcount);
 
       /* Unlock the mutex if we add one */
 
@@ -3059,7 +3074,7 @@ static int smart_relocate_sector(FAR struct smart_struct_s *dev,
       /* Using 8-bit sequence */
 
       header->seq++;
-      if (header->seq == 0xFF)
+      if (header->seq == 0xff)
         {
           header->seq = 1;
         }
@@ -3070,7 +3085,7 @@ static int smart_relocate_sector(FAR struct smart_struct_s *dev,
       /* Using 16-bit sequence and no CRC */
 
       (*((FAR uint16_t *) &header->seq))++;
-      if (*((FAR uint16_t *) &header->seq) == 0xFFFF)
+      if (*((FAR uint16_t *) &header->seq) == 0xffff)
         {
           *((FAR uint16_t *) &header->seq) = 1;
         }
@@ -3086,7 +3101,7 @@ static int smart_relocate_sector(FAR struct smart_struct_s *dev,
 
   /* First pre-commit the sector */
 
-#if CONFIG_SMARTFS_ERASEDSTATE == 0xFF
+#if CONFIG_SMARTFS_ERASEDSTATE == 0xff
   header->status &= ~(SMART_STATUS_COMMITTED | SMART_STATUS_CRC);
 #else
   header->status |= SMART_STATUS_COMMITTED | SMART_STATUS_CRC;
@@ -3109,7 +3124,7 @@ static int smart_relocate_sector(FAR struct smart_struct_s *dev,
 
 #else   /* CONFIG_MTD_SMART_ENABLE_CRC */
 
-#if CONFIG_SMARTFS_ERASEDSTATE == 0xFF
+#if CONFIG_SMARTFS_ERASEDSTATE == 0xff
   header->status |= SMART_STATUS_COMMITTED;
 #else
   header->status &= ~SMART_STATUS_COMMITTED;
@@ -3124,7 +3139,7 @@ static int smart_relocate_sector(FAR struct smart_struct_s *dev,
 
   offset = newsector * dev->mtdBlksPerSector * dev->geo.blocksize +
       offsetof(struct smart_sect_header_s, status);
-#if CONFIG_SMARTFS_ERASEDSTATE == 0xFF
+#if CONFIG_SMARTFS_ERASEDSTATE == 0xff
   newstatus = header->status & ~SMART_STATUS_COMMITTED;
 #else
   newstatus = header->status | SMART_STATUS_COMMITTED;
@@ -3132,14 +3147,14 @@ static int smart_relocate_sector(FAR struct smart_struct_s *dev,
   ret = smart_bytewrite(dev, offset, 1, &newstatus);
   if (ret < 0)
     {
-      fdbg("Error %d committing new sector %d\n" -ret, newsector);
+      ferr("ERROR: Error %d committing new sector %d\n" -ret, newsector);
       goto errout;
     }
 #endif  /* CONFIG_MTD_SMART_ENABLE_CRC */
 
   /* Release the old physical sector */
 
-#if CONFIG_SMARTFS_ERASEDSTATE == 0xFF
+#if CONFIG_SMARTFS_ERASEDSTATE == 0xff
   newstatus = header->status & ~(SMART_STATUS_RELEASED | SMART_STATUS_COMMITTED);
 #else
   newstatus = header->status | SMART_STATUS_RELEASED | SMART_STATUS_COMMITTED;
@@ -3149,7 +3164,7 @@ static int smart_relocate_sector(FAR struct smart_struct_s *dev,
   ret = smart_bytewrite(dev, offset, 1, &newstatus);
   if (ret < 0)
     {
-      fdbg("Error %d releasing old sector %d\n" -ret, oldsector);
+      ferr("ERROR: Error %d releasing old sector %d\n" -ret, oldsector);
     }
 
 #ifndef CONFIG_MTD_SMART_ENABLE_CRC
@@ -3193,7 +3208,7 @@ static int smart_relocate_block(FAR struct smart_struct_s *dev, uint16_t block)
 #ifdef CONFIG_SMART_LOCAL_CHECKFREE
   if (smart_checkfree(dev, __LINE__) != OK)
     {
-      fdbg("   ...while relocating block %d, free=%d\n", block, dev->freesectors);
+      fwarn("   ...while relocating block %d, free=%d\n", block, dev->freesectors);
     }
 #endif
 
@@ -3210,7 +3225,7 @@ static int smart_relocate_block(FAR struct smart_struct_s *dev, uint16_t block)
 
   if (freecount >= dev->freesectors)
     {
-      fdbg("Program bug!  Relocating the only block (%d) with free sectors!\n",
+      ferr("ERROR: Program bug!  Relocating the only block (%d) with free sectors!\n",
            block);
       ret = -EIO;
       goto errout;
@@ -3240,7 +3255,7 @@ static int smart_relocate_block(FAR struct smart_struct_s *dev, uint16_t block)
           dev->mtdBlksPerSector, (FAR uint8_t *) dev->rwbuffer);
       if (ret != dev->mtdBlksPerSector)
         {
-          fdbg("Error reading sector %d\n", x);
+          ferr("ERROR: Error reading sector %d\n", x);
           ret = -EIO;
           goto errout;
         }
@@ -3267,11 +3282,11 @@ static int smart_relocate_block(FAR struct smart_struct_s *dev, uint16_t block)
       if (allocsector)
         {
           newsector = smart_findfreephyssector(dev, FALSE);
-          if (newsector == 0xFFFF)
+          if (newsector == 0xffff)
             {
               /* Unable to find a free sector!!! */
 
-              fdbg("Can't find a free sector for relocation\n");
+              ferr("ERROR: Can't find a free sector for relocation\n");
               ret = -ENOSPC;
               goto errout;
             }
@@ -3299,11 +3314,11 @@ static int smart_relocate_block(FAR struct smart_struct_s *dev, uint16_t block)
           /* Find a new sector where it can live, NOT in this erase block */
 
           newsector = smart_findfreephyssector(dev, FALSE);
-          if (newsector == 0xFFFF)
+          if (newsector == 0xffff)
             {
               /* Unable to find a free sector!!! */
 
-              fdbg("Can't find a free sector for relocation\n");
+              ferr("ERROR: Can't find a free sector for relocation\n");
               ret = -ENOSPC;
               goto errout;
             }
@@ -3383,8 +3398,8 @@ static int smart_relocate_block(FAR struct smart_struct_s *dev, uint16_t block)
 #ifdef CONFIG_SMART_LOCAL_CHECKFREE
   if (smart_checkfree(dev, __LINE__) != OK)
     {
-      fdbg("   ...while relocating block %d, free=%d, release=%d, oldrelease=%d\n",
-           block, freecount, releasecount, oldrelease);
+      fwarn("   ...while relocating block %d, free=%d, release=%d, oldrelease=%d\n",
+            block, freecount, releasecount, oldrelease);
     }
 #endif
 
@@ -3441,14 +3456,14 @@ static int smart_findfreephyssector(FAR struct smart_struct_s *dev,
 retry:
 #endif
   allocfreecount = 0;
-  allocblock = 0xFFFF;
+  allocblock = 0xffff;
 #ifdef CONFIG_MTD_SMART_WEAR_LEVEL
   wornfreecount = 0;
-  wornblock = 0xFFFF;
+  wornblock = 0xffff;
   wornlevel = 15;
   maxwearlevel = 0;
 #endif
-  physicalsector = 0xFFFF;
+  physicalsector = 0xffff;
   if (++dev->lastallocblock >= dev->neraseblocks)
     {
       dev->lastallocblock = 0;
@@ -3514,7 +3529,7 @@ retry:
 
   /* Check if we found an allocblock. */
 
-  if (allocblock == 0xFFFF)
+  if (allocblock == 0xffff)
     {
       /* No un-worn blocks with free sectors */
 
@@ -3533,7 +3548,7 @@ retry:
                 {
                   if (smart_relocate_block(dev, block) < 0)
                     {
-                      fdbg("Error relocating block while finding free phys sector\n");
+                      ferr("ERROR: Error relocating block while finding free phys sector\n");
                       return -1;
                     }
 
@@ -3558,7 +3573,7 @@ retry:
 
       /* Test if we found a worn block with free sectors */
 
-      if (wornblock != 0xFFFF)
+      if (wornblock != 0xffff)
         {
           allocblock = wornblock;
         }
@@ -3566,7 +3581,7 @@ retry:
 #endif
 
       {
-        dbg("Program bug!  Expected a free sector, free=%d\n", dev->freesectors);
+        ferr("ERROR: Program bug!  Expected a free sector, free=%d\n", dev->freesectors);
         for (x = 0; x < dev->neraseblocks; x++)
           {
             printf("%d ", dev->freecount[x]);
@@ -3620,13 +3635,13 @@ retry:
               (FAR uint8_t *) &header);
       if (ret != sizeof(struct smart_sect_header_s))
         {
-          fdbg("Error reading phys sector %d\n", physicalsector);
+          ferr("ERROR: Error reading phys sector %d\n", physicalsector);
           return -1;
         }
 
-      if ((*((FAR uint16_t *) header.logicalsector) == 0xFFFF) &&
+      if ((*((FAR uint16_t *) header.logicalsector) == 0xffff) &&
 #if SMART_STATUS_VERSION == 1
-          (*((FAR uint16_t *) &header.seq) == 0xFFFF) &&
+          (*((FAR uint16_t *) &header.seq) == 0xffff) &&
 #else
           (header.seq == CONFIG_SMARTFS_ERASEDSTATE) &&
 #endif
@@ -3639,14 +3654,14 @@ retry:
         }
     }
 
-  if (physicalsector == 0xFFFF)
+  if (physicalsector == 0xffff)
     {
-      dbg("Program bug!  Expected a free sector\n");
+      ferr("ERROR: Program bug!  Expected a free sector\n");
     }
 
   if (physicalsector >= dev->totalsectors)
     {
-      dbg("Program bug!  Selected sector too big!!!\n");
+      ferr("ERROR: Program bug!  Selected sector too big!!!\n");
     }
 
   return physicalsector;
@@ -3700,7 +3715,7 @@ static int smart_garbagecollect(FAR struct smart_struct_s *dev)
         {
           /* Find the block with the most released sectors */
 
-          collectblock = 0xFFFF;
+          collectblock = 0xffff;
           releasemax = 0;
           for (x = 0; x < dev->neraseblocks; x++)
             {
@@ -3731,7 +3746,7 @@ static int smart_garbagecollect(FAR struct smart_struct_s *dev)
 
           //releasemax = smart_get_count(dev, dev->releasecount, collectblock);
 
-          if (collectblock == 0xFFFF)
+          if (collectblock == 0xffff)
             {
               /* Need to collect, but no sectors with released blocks! */
 
@@ -3742,16 +3757,16 @@ static int smart_garbagecollect(FAR struct smart_struct_s *dev)
 #ifdef CONFIG_SMART_LOCAL_CHECKFREE
           if (smart_checkfree(dev, __LINE__) != OK)
             {
-              fdbg("   ...before collecting block %d\n", collectblock);
+              fwarn("   ...before collecting block %d\n", collectblock);
             }
 #endif
 
 #ifdef CONFIG_MTD_SMART_PACK_COUNTS
-          fvdbg("Collecting block %d, free=%d released=%d, totalfree=%d, totalrelease=%d\n",
+          finfo("Collecting block %d, free=%d released=%d, totalfree=%d, totalrelease=%d\n",
               collectblock, smart_get_count(dev, dev->freecount, collectblock),
               smart_get_count(dev, dev->releasecount, collectblock), dev->freesectors, dev->releasesectors);
 #else
-          fvdbg("Collecting block %d, free=%d released=%d\n",
+          finfo("Collecting block %d, free=%d released=%d\n",
               collectblock, dev->freecount[collectblock],
               dev->releasecount[collectblock]);
 #endif
@@ -3763,7 +3778,7 @@ static int smart_garbagecollect(FAR struct smart_struct_s *dev)
 #ifdef CONFIG_SMART_LOCAL_CHECKFREE
           if (smart_checkfree(dev, __LINE__) != OK)
             {
-              fdbg("   ...while collecting block %d\n", collectblock);
+              fwarn("   ...while collecting block %d\n", collectblock);
             }
 #endif
 
@@ -3801,7 +3816,7 @@ static int smart_write_wearstatus(struct smart_struct_s *dev)
 
   sector = 0;
   remaining = dev->geo.neraseblocks >> 1;
-  memset(buffer, 0xFF, sizeof(buffer));
+  memset(buffer, 0xff, sizeof(buffer));
 
 #if defined(CONFIG_FS_PROCFS) && !defined(CONFIG_FS_PROCFS_EXCLUDE_SMARTFS)
   if (dev->blockerases > 0)
@@ -3876,7 +3891,8 @@ static int smart_write_wearstatus(struct smart_struct_s *dev)
           if (sector >= SMART_FIRST_DIR_SECTOR)
             {
               /* Error, wear status bit too large! */
-              fdbg("Invalid geometry - wear level status too large\n");
+
+              ferr("ERROR: Invalid geometry - wear level status too large\n");
               ret = -EINVAL;
               goto errout;
             }
@@ -3931,8 +3947,8 @@ static inline int smart_read_wearstatus(FAR struct smart_struct_s *dev)
 
   /* Check for erased state */
 
-#if ( CONFIG_SMARTFS_ERASEDSTATE == 0xFF )
-  if (dev->uneven_wearcount == 0xFFFFFFFF)
+#if ( CONFIG_SMARTFS_ERASEDSTATE == 0xff )
+  if (dev->uneven_wearcount == 0xffffffff)
     {
       dev->uneven_wearcount = 0;
     }
@@ -3942,8 +3958,8 @@ static inline int smart_read_wearstatus(FAR struct smart_struct_s *dev)
   /* Get the block erases count */
 
   dev->blockerases = *((uint32_t *) buffer);
-#if ( CONFIG_SMARTFS_ERASEDSTATE == 0xFF )
-  if (dev->blockerases == 0xFFFFFFFF)
+#if ( CONFIG_SMARTFS_ERASEDSTATE == 0xff )
+  if (dev->blockerases == 0xffffffff)
     {
       dev->blockerases = 0;
     }
@@ -3978,7 +3994,7 @@ static inline int smart_read_wearstatus(FAR struct smart_struct_s *dev)
 #else
       physsector = smart_cache_lookup(dev, req.logsector);
 #endif
-      if ((sector != 0) && (physsector == 0xFFFF))
+      if ((sector != 0) && (physsector == 0xffff))
         {
 #ifdef CONFIG_FS_WRITABLE
 
@@ -3987,7 +4003,7 @@ static inline int smart_read_wearstatus(FAR struct smart_struct_s *dev)
           ret = smart_allocsector(dev, sector);
           if (ret != sector)
             {
-              fdbg("Unable to allocate wear level status sector %d\n", sector);
+              ferr("ERROR: Unable to allocate wear level status sector %d\n", sector);
               ret = -EINVAL;
               goto errout;
             }
@@ -4014,7 +4030,7 @@ static inline int smart_read_wearstatus(FAR struct smart_struct_s *dev)
             {
               /* Error, wear status bit too large! */
 
-              fdbg("Invalid geometry - wear level status too large\n");
+              ferr("ERROR: Invalid geometry - wear level status too large\n");
               ret = -EINVAL;
               goto errout;
             }
@@ -4072,7 +4088,7 @@ static int smart_write_alloc_sector(FAR struct smart_struct_s *dev,
 #endif
   sectsize = dev->sectorsize >> 7;
 
-#if CONFIG_SMARTFS_ERASEDSTATE == 0xFF
+#if CONFIG_SMARTFS_ERASEDSTATE == 0xff
   header->status = ~(SMART_STATUS_COMMITTED | SMART_STATUS_SIZEBITS |
           SMART_STATUS_VERBITS) | SMART_STATUS_VERSION | sectsize;
 #ifdef CONFIG_MTD_SMART_ENABLE_CRC
@@ -4088,14 +4104,14 @@ static int smart_write_alloc_sector(FAR struct smart_struct_s *dev,
   /* Write the header to the physical sector location */
 
 #ifndef CONFIG_MTD_SMART_ENABLE_CRC
-  fvdbg("Write MTD block %d\n", physical * dev->mtdBlksPerSector);
+  finfo("Write MTD block %d\n", physical * dev->mtdBlksPerSector);
   ret = MTD_BWRITE(dev->mtd, physical * dev->mtdBlksPerSector, 1,
       (FAR uint8_t *) dev->rwbuffer);
   if (ret != 1)
     {
       /* The block is not empty!!  What to do? */
 
-      fdbg("Write block %d failed: %d.\n", physical *
+      ferr("ERROR: Write block %d failed: %d.\n", physical *
            dev->mtdBlksPerSector, ret);
 
       /* Unlock the mutex if we add one */
@@ -4191,7 +4207,7 @@ static int smart_writesector(FAR struct smart_struct_s *dev,
   FAR struct  smart_allocsector_s *allocsector;
 #endif
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
   req = (FAR struct smart_read_write_s *) arg;
   DEBUGASSERT(req->offset <= dev->sectorsize);
   DEBUGASSERT(req->offset+req->count <= dev->sectorsize);
@@ -4200,7 +4216,7 @@ static int smart_writesector(FAR struct smart_struct_s *dev,
 
   if (req->logsector >= dev->totalsectors)
     {
-      fdbg("Logical sector %d too large\n", req->logsector);
+      ferr("ERROR: Logical sector %d too large\n", req->logsector);
 
       ret = -EINVAL;
       goto errout;
@@ -4216,7 +4232,7 @@ static int smart_writesector(FAR struct smart_struct_s *dev,
       /* Subtract dev->minwearlevel from all wear levels */
 
       offset = dev->minwearlevel;
-      fvdbg("Reducing wear level bits by %d\n", offset);
+      finfo("Reducing wear level bits by %d\n", offset);
       for (x = 0; x < dev->geo.neraseblocks; x++)
         {
           smart_set_wear_level(dev, x, smart_get_wear_level(dev, x) - offset);
@@ -4237,9 +4253,9 @@ static int smart_writesector(FAR struct smart_struct_s *dev,
 #else
   physsector = smart_cache_lookup(dev, req->logsector);
 #endif
-  if (physsector == 0xFFFF)
+  if (physsector == 0xffff)
     {
-      fdbg("Logical sector %d not allocated\n", req->logsector);
+      ferr("ERROR: Logical sector %d not allocated\n", req->logsector);
       ret = -EINVAL;
       goto errout;
     }
@@ -4251,7 +4267,7 @@ static int smart_writesector(FAR struct smart_struct_s *dev,
           dev->rwbuffer);
   if (ret != dev->mtdBlksPerSector)
     {
-      fdbg("Error reading phys sector %d\n", physsector);
+      ferr("ERROR: Error reading phys sector %d\n", physsector);
       ret = -EIO;
       goto errout;
     }
@@ -4293,7 +4309,7 @@ static int smart_writesector(FAR struct smart_struct_s *dev,
       /* Test if the next byte can be written to the flash */
 
       byte = dev->rwbuffer[sizeof(struct smart_sect_header_s) + req->offset + x];
-#if CONFIG_SMARTFS_ERASEDSTATE == 0xFF
+#if CONFIG_SMARTFS_ERASEDSTATE == 0xff
       if (((byte ^ req->buffer[x]) | byte) != byte)
         {
           needsrelocate = TRUE;
@@ -4321,9 +4337,9 @@ static int smart_writesector(FAR struct smart_struct_s *dev,
 
       oldphyssector = physsector;
       physsector = smart_findfreephyssector(dev, FALSE);
-      if (physsector == 0xFFFF)
+      if (physsector == 0xffff)
         {
-          fdbg("Error relocating sector %d\n", req->logsector);
+          ferr("ERROR: Error relocating sector %d\n", req->logsector);
           ret = -EIO;
           goto errout;
         }
@@ -4335,7 +4351,7 @@ static int smart_writesector(FAR struct smart_struct_s *dev,
         {
 #endif
           header->seq++;
-          if (header->seq == 0xFF)
+          if (header->seq == 0xff)
             {
               header->seq = 0;
             }
@@ -4344,13 +4360,13 @@ static int smart_writesector(FAR struct smart_struct_s *dev,
       else
         {
           (*((FAR uint16_t *) &header->seq))++;
-          if (*((FAR uint16_t *) &header->seq) == 0xFFFF)
+          if (*((FAR uint16_t *) &header->seq) == 0xffff)
             *((FAR uint16_t *) &header->seq) = 1;
         }
 #else
       header->seq++;
 #endif
-#if CONFIG_SMARTFS_ERASEDSTATE == 0xFF
+#if CONFIG_SMARTFS_ERASEDSTATE == 0xff
       header->status |= SMART_STATUS_COMMITTED;
 #else
       header->status &= SMART_STATUS_COMMITTED;
@@ -4408,7 +4424,7 @@ static int smart_writesector(FAR struct smart_struct_s *dev,
 
   /* Commit the sector ahead of time.  The CRC will protect us */
 
-#if CONFIG_SMARTFS_ERASEDSTATE == 0xFF
+#if CONFIG_SMARTFS_ERASEDSTATE == 0xff
   header->status &= ~(SMART_STATUS_COMMITTED | SMART_STATUS_CRC);
 #else
   header->status |= SMART_STATUS_COMMITTED | SMART_STATUS_CRC;
@@ -4443,7 +4459,7 @@ static int smart_writesector(FAR struct smart_struct_s *dev,
               dev->mtdBlksPerSector, (FAR uint8_t *) dev->rwbuffer);
       if (ret != dev->mtdBlksPerSector)
         {
-          fdbg("Error writing to physical sector %d\n", physsector);
+          ferr("ERROR: Error writing to physical sector %d\n", physsector);
           ret = -EIO;
           goto errout;
         }
@@ -4452,7 +4468,7 @@ static int smart_writesector(FAR struct smart_struct_s *dev,
 
 #ifndef CONFIG_MTD_SMART_ENABLE_CRC
 
-#if CONFIG_SMARTFS_ERASEDSTATE == 0xFF
+#if CONFIG_SMARTFS_ERASEDSTATE == 0xff
       byte = header->status & ~SMART_STATUS_COMMITTED;
 #else
       byte = header->status | SMART_STATUS_COMMITTED;
@@ -4462,7 +4478,7 @@ static int smart_writesector(FAR struct smart_struct_s *dev,
       ret = smart_bytewrite(dev, offset, 1, &byte);
       if (ret != 1)
         {
-          fvdbg("Error committing physical sector %d\n", physsector);
+          finfo("Error committing physical sector %d\n", physsector);
           ret = -EIO;
           goto errout;
         }
@@ -4470,7 +4486,7 @@ static int smart_writesector(FAR struct smart_struct_s *dev,
 
       /* Release the old physical sector */
 
-#if CONFIG_SMARTFS_ERASEDSTATE == 0xFF
+#if CONFIG_SMARTFS_ERASEDSTATE == 0xff
       byte = header->status & ~(SMART_STATUS_RELEASED | SMART_STATUS_COMMITTED);
 #else
       byte = header->status | SMART_STATUS_RELEASED | SMART_STATUS_COMMITTED;
@@ -4527,7 +4543,7 @@ static int smart_writesector(FAR struct smart_struct_s *dev,
               dev->mtdBlksPerSector, (FAR uint8_t *) dev->rwbuffer);
       if (ret != dev->mtdBlksPerSector)
         {
-          fdbg("Error writing to physical sector %d\n", physsector);
+          ferr("ERROR: Error writing to physical sector %d\n", physsector);
           ret = -EIO;
           goto errout;
         }
@@ -4547,7 +4563,7 @@ static int smart_writesector(FAR struct smart_struct_s *dev,
         {
           /* TODO: Mark this as a bad block! */
 
-          fdbg("Error validating physical sector %d\n", physsector);
+          ferr("ERROR: Error validating physical sector %d\n", physsector);
           ret = -EIO;
           goto errout;
         }
@@ -4592,7 +4608,7 @@ static int smart_readsector(FAR struct smart_struct_s *dev,
   struct smart_sect_header_s header;
 #endif
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
   req = (FAR struct smart_read_write_s *) arg;
   DEBUGASSERT(req->offset < dev->sectorsize);
   DEBUGASSERT(req->offset+req->count+ sizeof(struct smart_sect_header_s) <=
@@ -4602,7 +4618,7 @@ static int smart_readsector(FAR struct smart_struct_s *dev,
 
   if (req->logsector >= dev->totalsectors)
     {
-      fdbg("Logical sector %d too large\n", req->logsector);
+      ferr("ERROR: Logical sector %d too large\n", req->logsector);
 
       ret = -EINVAL;
       goto errout;
@@ -4613,9 +4629,9 @@ static int smart_readsector(FAR struct smart_struct_s *dev,
 #else
   physsector = smart_cache_lookup(dev, req->logsector);
 #endif
-  if (physsector == 0xFFFF)
+  if (physsector == 0xffff)
     {
-      fdbg("Logical sector %d not allocated\n", req->logsector);
+      ferr("ERROR: Logical sector %d not allocated\n", req->logsector);
       ret = -EINVAL;
       goto errout;
     }
@@ -4632,7 +4648,7 @@ static int smart_readsector(FAR struct smart_struct_s *dev,
     {
       /* TODO:  Mark the block bad */
 
-      fdbg("Error reading phys sector %d\n", physsector);
+      ferr("ERROR: Error reading phys sector %d\n", physsector);
       ret = -EIO;
       goto errout;
     }
@@ -4657,7 +4673,7 @@ static int smart_readsector(FAR struct smart_struct_s *dev,
         {
           /* TODO: Mark the block bad */
 
-          fdbg("Error validating sector %d CRC during read\n", physsector);
+          ferr("ERROR: Error validating sector %d CRC during read\n", physsector);
           ret = -EIO;
           goto errout;
         }
@@ -4677,7 +4693,7 @@ static int smart_readsector(FAR struct smart_struct_s *dev,
           sizeof(struct smart_sect_header_s), (FAR uint8_t *) &header);
   if (ret != sizeof(struct smart_sect_header_s))
     {
-      fvdbg("Error reading sector %d header\n", physsector);
+      ferr("ERROR: Error reading sector %d header\n", physsector);
       ret = -EIO;
       goto errout;
     }
@@ -4690,7 +4706,7 @@ static int smart_readsector(FAR struct smart_struct_s *dev,
     {
       /* Error in sector header! How do we handle this? */
 
-      fdbg("Error in logical sector %d header, phys=%d\n",
+      ferr("ERROR: Error in logical sector %d header, phys=%d\n",
           req->logsector, physsector);
       ret = -EIO;
       goto errout;
@@ -4705,7 +4721,7 @@ static int smart_readsector(FAR struct smart_struct_s *dev,
           req->buffer);
   if (ret != req->count)
     {
-      fdbg("Error reading phys sector %d\n", physsector);
+      ferr("ERROR: Error reading phys sector %d\n", physsector);
       ret = -EIO;
       goto errout;
     }
@@ -4728,7 +4744,7 @@ errout:
 static inline int smart_allocsector(FAR struct smart_struct_s *dev,
                     unsigned long requested)
 {
-  uint16_t  logsector = 0xFFFF; /* Logical sector number selected */
+  uint16_t  logsector = 0xffff; /* Logical sector number selected */
   uint16_t  physicalsector;     /* The selected physical sector */
 #ifndef CONFIG_MTD_SMART_ENABLE_CRC
   int       ret;
@@ -4744,7 +4760,7 @@ static inline int smart_allocsector(FAR struct smart_struct_s *dev,
     {
       /* Do a garbage collect and then test freesectors again */
 
-      if (dev->releasesectors + dev->freesectors > dev->availSectPerBlk + 4)
+      if (dev->releasesectors + dev->freesectors > dev->sectorsPerBlk + 4)
         {
 
           for (x = 0; x < dev->availSectPerBlk; x++)
@@ -4813,7 +4829,7 @@ static inline int smart_allocsector(FAR struct smart_struct_s *dev,
 
   /* Check if we need to scan for an available logical sector */
 
-  if (logsector == 0xFFFF)
+  if (logsector == 0xffff)
     {
       /* Loop through all sectors and find one to allocate */
 
@@ -4864,7 +4880,7 @@ static inline int smart_allocsector(FAR struct smart_struct_s *dev,
 
   /* Test for an error allocating a sector */
 
-  if (logsector == 0xFFFF)
+  if (logsector == 0xffff)
     {
       /* Hmmm.  We think we had enough logical sectors, but
        * something happened and we didn't find any free
@@ -4873,7 +4889,7 @@ static inline int smart_allocsector(FAR struct smart_struct_s *dev,
        * bug in our code?
        */
 
-      fdbg("No free logical sector numbers!  Free sectors = %d\n",
+      ferr("ERROR: No free logical sector numbers!  Free sectors = %d\n",
               dev->freesectors);
 
       return -EIO;
@@ -4891,10 +4907,15 @@ static inline int smart_allocsector(FAR struct smart_struct_s *dev,
   /* Find a free physical sector */
 
   physicalsector = smart_findfreephyssector(dev, FALSE);
-  fvdbg("Alloc: log=%d, phys=%d, erase block=%d, free=%d, released=%d\n",
+  finfo("Alloc: log=%d, phys=%d, erase block=%d, free=%d, released=%d\n",
           logsector, physicalsector, physicalsector /
           dev->sectorsPerBlk, dev->freesectors, dev->releasecount);
 
+  if (physicalsector == 0xffff)
+    {
+      return -ENOSPC;
+    }
+
 #ifdef CONFIG_MTD_SMART_ENABLE_CRC
 
   /* When CRC is enabled, we don't write the header to the device until
@@ -4907,7 +4928,7 @@ static inline int smart_allocsector(FAR struct smart_struct_s *dev,
       kmm_malloc(sizeof(struct smart_allocsector_s));
     if (allocsect == NULL)
       {
-        fdbg("Out of memory allocting sector\n");
+        ferr("ERROR: Out of memory allocting sector\n");
         return -ENOMEM;
       }
 
@@ -4988,7 +5009,7 @@ static inline int smart_freesector(FAR struct smart_struct_s *dev,
       if (!(dev->sBitMap[logicalsector >> 3] & (1 << (logicalsector & 0x07))))
 #endif
         {
-          fdbg("Invalid release - sector %d not allocated\n", logicalsector);
+          ferr("ERROR: Invalid release - sector %d not allocated\n", logicalsector);
           ret = -EINVAL;
           goto errout;
         }
@@ -5015,14 +5036,14 @@ static inline int smart_freesector(FAR struct smart_struct_s *dev,
     {
       /* Hmmm... something is wrong.  This should always match!  Bug in our code? */
 
-      fdbg("Sector %d logical sector in header doesn't match\n", logicalsector);
+      ferr("ERROR: Sector %d logical sector in header doesn't match\n", logicalsector);
       ret = -EINVAL;
       goto errout;
     }
 
   /* Mark the sector as released */
 
-#if CONFIG_SMARTFS_ERASEDSTATE == 0xFF
+#if CONFIG_SMARTFS_ERASEDSTATE == 0xff
   header.status &= ~SMART_STATUS_RELEASED;
 #else
   header.status |= SMART_STATUS_RELEASED;
@@ -5034,7 +5055,7 @@ static inline int smart_freesector(FAR struct smart_struct_s *dev,
   ret = smart_bytewrite(dev, offset, 1, &header.status);
   if (ret != 1)
     {
-      fdbg("Error updating physical sector %d status\n", physsector);
+      ferr("ERROR: Error updating physical sector %d status\n", physsector);
       goto errout;
     }
 
@@ -5054,7 +5075,7 @@ static inline int smart_freesector(FAR struct smart_struct_s *dev,
   dev->sMap[logicalsector] = (uint16_t) -1;
 #else
   dev->sBitMap[logicalsector >> 3] &= ~(1 << (logicalsector & 0x07));
-  smart_update_cache(dev, logicalsector, 0xFFFF);
+  smart_update_cache(dev, logicalsector, 0xffff);
 #endif
 
   /* If this block has only released blocks, then erase it */
@@ -5083,7 +5104,7 @@ static int smart_ioctl(FAR struct inode *inode, int cmd, unsigned long arg)
   FAR struct mtd_smart_debug_data_s *debug_data;
 #endif
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
   DEBUGASSERT(inode && inode->i_private);
 
 #ifdef CONFIG_SMARTFS_MULTI_ROOT_DIRS
@@ -5104,10 +5125,10 @@ static int smart_ioctl(FAR struct inode *inode, int cmd, unsigned long arg)
        * driver.
        */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       if (arg == 0)
         {
-          fdbg("ERROR: BIOC_XIPBASE argument is NULL\n");
+          ferr("ERROR: BIOC_XIPBASE argument is NULL\n");
           return -EINVAL;
         }
 #endif
@@ -5228,7 +5249,7 @@ static int smart_ioctl(FAR struct inode *inode, int cmd, unsigned long arg)
         {
         case SMART_DEBUG_CMD_SET_DEBUG_LEVEL:
           dev->debuglevel = debug_data->debugdata;
-          dbg("Debug level set to %d\n", dev->debuglevel);
+          finfo("Debug level set to %d\n", dev->debuglevel);
 
           ret = OK;
           goto ok_out;
@@ -5246,7 +5267,7 @@ static int smart_ioctl(FAR struct inode *inode, int cmd, unsigned long arg)
   ret = MTD_IOCTL(dev->mtd, cmd, arg);
   if (ret < 0)
     {
-      fdbg("ERROR: MTD ioctl(%04x) failed: %d\n", cmd, ret);
+      ferr("ERROR: MTD ioctl(%04x) failed: %d\n", cmd, ret);
     }
 
 ok_out:
@@ -5281,7 +5302,7 @@ int smart_initialize(int minor, FAR struct mtd_dev_s *mtd, FAR const char *partn
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (minor < 0 || minor > 255 || !mtd)
     {
       return -EINVAL;
@@ -5290,19 +5311,13 @@ int smart_initialize(int minor, FAR struct mtd_dev_s *mtd, FAR const char *partn
 
   /* Allocate a SMART device structure */
 
-  dev = (FAR struct smart_struct_s *)kmm_malloc(sizeof(struct smart_struct_s));
+  dev = (FAR struct smart_struct_s *)smart_malloc(NULL, sizeof(struct smart_struct_s),
+          "Dev struct");
   if (dev)
     {
       /* Initialize the SMART device structure */
 
       dev->mtd = mtd;
-#ifdef CONFIG_MTD_SMART_ALLOC_DEBUG
-      dev->bytesalloc = 0;
-      for (totalsectors = 0; totalsectors < SMART_MAX_ALLOCS; totalsectors++)
-        {
-          dev->alloc[totalsectors].ptr = NULL;
-        }
-#endif
 
       /* Get the device geometry. (casting to uintptr_t first eliminates
        * complaints on some architectures where the sizeof long is different
@@ -5314,7 +5329,7 @@ int smart_initialize(int minor, FAR struct mtd_dev_s *mtd, FAR const char *partn
       ret = MTD_IOCTL(mtd, MTDIOC_GEOMETRY, (unsigned long)((uintptr_t)&dev->geo));
       if (ret < 0)
         {
-          fdbg("MTD ioctl(MTDIOC_GEOMETRY) failed: %d\n", ret);
+          ferr("ERROR: MTD ioctl(MTDIOC_GEOMETRY) failed: %d\n", ret);
           goto errout;
         }
 
@@ -5348,7 +5363,7 @@ int smart_initialize(int minor, FAR struct mtd_dev_s *mtd, FAR const char *partn
       totalsectors = dev->neraseblocks * dev->sectorsPerBlk;
       if (totalsectors > 65536)
         {
-          fdbg("SMART Sector size too small for device\n");
+          ferr("ERROR: SMART Sector size too small for device\n");
           ret = -EINVAL;
           goto errout;
         }
@@ -5379,6 +5394,15 @@ int smart_initialize(int minor, FAR struct mtd_dev_s *mtd, FAR const char *partn
       dev->minor = minor;
 #endif
 
+      /* Do a scan of the device */
+
+      ret = smart_scan(dev);
+      if (ret < 0)
+        {
+          ferr("ERROR: smart_scan failed: %d\n", -ret);
+          goto errout;
+        }
+
       /* Create a MTD block device name */
 
 #ifdef CONFIG_SMARTFS_MULTI_ROOT_DIRS
@@ -5399,7 +5423,7 @@ int smart_initialize(int minor, FAR struct mtd_dev_s *mtd, FAR const char *partn
         smart_malloc(dev, sizeof(*rootdirdev), "Root Dir");
       if (rootdirdev == NULL)
         {
-          fdbg("register_blockdriver failed: %d\n", -ret);
+          ferr("ERROR: register_blockdriver failed: %d\n", -ret);
           ret = -ENOMEM;
           goto errout;
         }
@@ -5427,16 +5451,7 @@ int smart_initialize(int minor, FAR struct mtd_dev_s *mtd, FAR const char *partn
 
       if (ret < 0)
         {
-          fdbg("register_blockdriver failed: %d\n", -ret);
-          goto errout;
-        }
-
-      /* Do a scan of the device */
-
-      ret = smart_scan(dev);
-      if (ret < 0)
-        {
-          fdbg("smart_scan failed: %d\n", -ret);
+          ferr("ERROR: register_blockdriver failed: %d\n", -ret);
           goto errout;
         }
     }
@@ -5550,7 +5565,7 @@ static int smart_loteardown(FAR const char *devname)
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!devname)
     {
       return -EINVAL;
@@ -5564,7 +5579,7 @@ static int smart_loteardown(FAR const char *devname)
   ret = open_blockdriver(devname, MS_RDONLY, &inode);
   if (ret < 0)
     {
-      dbg("Failed to open %s: %d\n", devname, -ret);
+      ferr("ERROR: Failed to open %s: %d\n", devname, -ret);
       return ret;
     }
 
@@ -5576,7 +5591,7 @@ static int smart_loteardown(FAR const char *devname)
 
   if (!filemtd_isfilemtd(dev->mtd))
     {
-      fdbg("Device is not a SMART loop: %s\n", devname);
+      ferr("ERROR: Device is not a SMART loop: %s\n", devname);
       return -EINVAL;
     }
 
diff --git a/drivers/mtd/sst25.c b/drivers/mtd/sst25.c
index 61a79a63b5e09c1345ad66a4db80f18cdec58699..9c84c7fba90bd1db1bb341dceb933ffae6e7ae5b 100644
--- a/drivers/mtd/sst25.c
+++ b/drivers/mtd/sst25.c
@@ -171,15 +171,15 @@
 
 #define IS_VALID(p)                ((((p)->flags) & SST25_CACHE_VALID) != 0)
 #define IS_DIRTY(p)                ((((p)->flags) & SST25_CACHE_DIRTY) != 0)
-#define IS_ERASED(p)                ((((p)->flags) & SST25_CACHE_DIRTY) != 0)
+#define IS_ERASED(p)                ((((p)->flags) & SST25_CACHE_ERASED) != 0)
 
 #define SET_VALID(p)               do { (p)->flags |= SST25_CACHE_VALID; } while (0)
 #define SET_DIRTY(p)               do { (p)->flags |= SST25_CACHE_DIRTY; } while (0)
-#define SET_ERASED(p)              do { (p)->flags |= SST25_CACHE_DIRTY; } while (0)
+#define SET_ERASED(p)              do { (p)->flags |= SST25_CACHE_ERASED; } while (0)
 
 #define CLR_VALID(p)               do { (p)->flags &= ~SST25_CACHE_VALID; } while (0)
 #define CLR_DIRTY(p)               do { (p)->flags &= ~SST25_CACHE_DIRTY; } while (0)
-#define CLR_ERASED(p)              do { (p)->flags &= ~SST25_CACHE_DIRTY; } while (0)
+#define CLR_ERASED(p)              do { (p)->flags &= ~SST25_CACHE_ERASED; } while (0)
 
 /************************************************************************************
  * Private Types
@@ -309,7 +309,7 @@ static inline int sst25_readid(struct sst25_dev_s *priv)
   uint16_t memory;
   uint16_t capacity;
 
-  fvdbg("priv: %p\n", priv);
+  finfo("priv: %p\n", priv);
 
   /* Lock the SPI bus, configure the bus, and select this FLASH part. */
 
@@ -328,7 +328,7 @@ static inline int sst25_readid(struct sst25_dev_s *priv)
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
   sst25_unlock(priv->dev);
 
-  fvdbg("manufacturer: %02x memory: %02x capacity: %02x\n",
+  finfo("manufacturer: %02x memory: %02x capacity: %02x\n",
         manufacturer, memory, capacity);
 
   /* Check for a valid manufacturer and memory type */
@@ -486,7 +486,7 @@ static void sst25_sectorerase(struct sst25_dev_s *priv, off_t sector)
 {
   off_t address = sector << priv->sectorshift;
 
-  fvdbg("sector: %08lx\n", (long)sector);
+  finfo("sector: %08lx\n", (long)sector);
 
   /* Wait for any preceding write or erase operation to complete. */
 
@@ -523,7 +523,7 @@ static void sst25_sectorerase(struct sst25_dev_s *priv, off_t sector)
 
 static inline int sst25_chiperase(struct sst25_dev_s *priv)
 {
-  fvdbg("priv: %p\n", priv);
+  finfo("priv: %p\n", priv);
 
   /* Wait for any preceding write or erase operation to complete. */
 
@@ -537,7 +537,7 @@ static inline int sst25_chiperase(struct sst25_dev_s *priv)
 
   sst25_cmd(priv, SST25_CE);
 
-  fvdbg("Return: OK\n");
+  finfo("Return: OK\n");
   return OK;
 }
 
@@ -550,7 +550,7 @@ static void sst25_byteread(FAR struct sst25_dev_s *priv, FAR uint8_t *buffer,
 {
   uint8_t status;
 
-  fvdbg("address: %08lx nbytes: %d\n", (long)address, (int)nbytes);
+  finfo("address: %08lx nbytes: %d\n", (long)address, (int)nbytes);
 
   /* Wait for any preceding write or erase operation to complete. */
 
@@ -601,7 +601,7 @@ static void sst25_bytewrite(struct sst25_dev_s *priv, FAR const uint8_t *buffer,
 {
   uint8_t status;
 
-  fvdbg("address: %08lx nwords: %d\n", (long)address, (int)nbytes);
+  finfo("address: %08lx nwords: %d\n", (long)address, (int)nbytes);
   DEBUGASSERT(priv && buffer);
 
   /* Write each byte individually */
@@ -663,7 +663,7 @@ static void sst25_wordwrite(struct sst25_dev_s *priv, FAR const uint8_t *buffer,
   size_t nwords = (nbytes + 1) >> 1;
   uint8_t status;
 
-  fvdbg("address: %08lx nwords: %d\n", (long)address, (int)nwords);
+  finfo("address: %08lx nwords: %d\n", (long)address, (int)nwords);
   DEBUGASSERT(priv && buffer);
 
   /* Loop until all of the bytes have been written */
@@ -834,7 +834,7 @@ static FAR uint8_t *sst25_cacheread(struct sst25_dev_s *priv, off_t sector)
 
   shift    = priv->sectorshift - SST25_SECTOR_SHIFT;
   esectno  = sector >> shift;
-  fvdbg("sector: %ld esectno: %d shift=%d\n", sector, esectno, shift);
+  finfo("sector: %ld esectno: %d shift=%d\n", sector, esectno, shift);
 
   /* Check if the requested erase block is already in the cache */
 
@@ -890,7 +890,7 @@ static void sst25_cacheerase(struct sst25_dev_s *priv, off_t sector)
   if (!IS_ERASED(priv))
     {
       off_t esectno  = sector >> (priv->sectorshift - SST25_SECTOR_SHIFT);
-      fvdbg("sector: %ld esectno: %d\n", sector, esectno);
+      finfo("sector: %ld esectno: %d\n", sector, esectno);
 
       sst25_sectorerase(priv, esectno);
       SET_ERASED(priv);
@@ -932,7 +932,7 @@ static void sst25_cachewrite(FAR struct sst25_dev_s *priv, FAR const uint8_t *bu
       if (!IS_ERASED(priv))
         {
           off_t esectno  = sector >> (priv->sectorshift - SST25_SECTOR_SHIFT);
-          fvdbg("sector: %ld esectno: %d\n", sector, esectno);
+          finfo("sector: %ld esectno: %d\n", sector, esectno);
 
           sst25_sectorerase(priv, esectno);
           SET_ERASED(priv);
@@ -967,7 +967,7 @@ static int sst25_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nbloc
   FAR struct sst25_dev_s *priv = (FAR struct sst25_dev_s *)dev;
   size_t blocksleft = nblocks;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* Lock access to the SPI bus until we complete the erase */
 
@@ -1006,7 +1006,7 @@ static ssize_t sst25_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t n
 #ifdef CONFIG_SST25_SECTOR512
   ssize_t nbytes;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* On this device, we can handle the block read just like the byte-oriented read */
 
@@ -1021,7 +1021,7 @@ static ssize_t sst25_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t n
   FAR struct sst25_dev_s *priv = (FAR struct sst25_dev_s *)dev;
   ssize_t nbytes;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* On this device, we can handle the block read just like the byte-oriented read */
 
@@ -1047,7 +1047,7 @@ static ssize_t sst25_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t
 #else
   FAR struct sst25_dev_s *priv = (FAR struct sst25_dev_s *)dev;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* Lock the SPI bus and write all of the pages to FLASH */
 
@@ -1077,7 +1077,7 @@ static ssize_t sst25_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes
 {
   FAR struct sst25_dev_s *priv = (FAR struct sst25_dev_s *)dev;
 
-  fvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+  finfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
 
   /* Lock the SPI bus and select this FLASH part */
 
@@ -1085,7 +1085,7 @@ static ssize_t sst25_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes
   sst25_byteread(priv, buffer, offset, nbytes);
   sst25_unlock(priv->dev);
 
-  fvdbg("return nbytes: %d\n", (int)nbytes);
+  finfo("return nbytes: %d\n", (int)nbytes);
   return nbytes;
 }
 
@@ -1098,7 +1098,7 @@ static int sst25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
   FAR struct sst25_dev_s *priv = (FAR struct sst25_dev_s *)dev;
   int ret = -EINVAL; /* Assume good command with bad parameters */
 
-  fvdbg("cmd: %d \n", cmd);
+  finfo("cmd: %d \n", cmd);
 
   switch (cmd)
     {
@@ -1127,7 +1127,7 @@ static int sst25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
 #endif
               ret               = OK;
 
-              fvdbg("blocksize: %d erasesize: %d neraseblocks: %d\n",
+              finfo("blocksize: %d erasesize: %d neraseblocks: %d\n",
                     geo->blocksize, geo->erasesize, geo->neraseblocks);
             }
         }
@@ -1149,7 +1149,7 @@ static int sst25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
         break;
     }
 
-  fvdbg("return %d\n", ret);
+  finfo("return %d\n", ret);
   return ret;
 }
 
@@ -1172,7 +1172,7 @@ FAR struct mtd_dev_s *sst25_initialize(FAR struct spi_dev_s *dev)
   FAR struct sst25_dev_s *priv;
   int ret;
 
-  fvdbg("dev: %p\n", dev);
+  finfo("dev: %p\n", dev);
 
   /* Allocate a state structure (we allocate the structure instead of using
    * a fixed, static allocation so that we can handle multiple FLASH devices.
@@ -1206,9 +1206,9 @@ FAR struct mtd_dev_s *sst25_initialize(FAR struct spi_dev_s *dev)
         {
           /* Unrecognized! Discard all of that work we just did and return NULL */
 
-          fdbg("Unrecognized\n");
+          ferr("ERROR: Unrecognized\n");
           kmm_free(priv);
-          priv = NULL;
+          return NULL;
         }
       else
         {
@@ -1226,9 +1226,9 @@ FAR struct mtd_dev_s *sst25_initialize(FAR struct spi_dev_s *dev)
             {
               /* Allocation failed! Discard all of that work we just did and return NULL */
 
-              fdbg("Allocation failed\n");
+              ferr("ERROR: Allocation failed\n");
               kmm_free(priv);
-              priv = NULL;
+              return NULL;
             }
 #endif
         }
@@ -1242,6 +1242,6 @@ FAR struct mtd_dev_s *sst25_initialize(FAR struct spi_dev_s *dev)
 
   /* Return the implementation-specific state structure as the MTD device */
 
-  fvdbg("Return %p\n", priv);
+  finfo("Return %p\n", priv);
   return (FAR struct mtd_dev_s *)priv;
 }
diff --git a/drivers/mtd/sst25xx.c b/drivers/mtd/sst25xx.c
index ebbcfd33f2fab290ec517080a1476336380e601c..9f883483af71896ddf6add9b98d8558f64ea7266 100644
--- a/drivers/mtd/sst25xx.c
+++ b/drivers/mtd/sst25xx.c
@@ -259,7 +259,7 @@ static inline int sst25xx_readid(struct sst25xx_dev_s *priv)
   uint16_t memory;
   uint16_t capacity;
 
-  fvdbg("priv: %p\n", priv);
+  finfo("priv: %p\n", priv);
 
   /* Lock the SPI bus, configure the bus, and select this FLASH part. */
 
@@ -279,7 +279,7 @@ static inline int sst25xx_readid(struct sst25xx_dev_s *priv)
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
   sst25xx_unlock(priv->dev);
 
-  fvdbg("manufacturer: %02x memory: %02x capacity: %02x\n",
+  finfo("manufacturer: %02x memory: %02x capacity: %02x\n",
         manufacturer, memory, capacity);
 
   /* Check for a valid manufacturer and memory type */
@@ -356,7 +356,7 @@ static void sst25xx_waitwritecomplete(struct sst25xx_dev_s *priv)
 
   priv->lastwaswrite = false;
 
-  fvdbg("Complete\n");
+  finfo("Complete\n");
 }
 
 /************************************************************************************
@@ -376,7 +376,7 @@ static void sst25xx_writeenable(struct sst25xx_dev_s *priv)
   /* Deselect the FLASH */
 
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
-  fvdbg("Enabled\n");
+  finfo("Enabled\n");
 }
 
 /************************************************************************************
@@ -416,7 +416,7 @@ static void sst25xx_sectorerase(struct sst25xx_dev_s *priv, off_t sector, uint8_
 
   offset = sector << priv->sectorshift;
 
-  fvdbg("sector: %08lx\n", (long)sector);
+  finfo("sector: %08lx\n", (long)sector);
 
   /* Wait for any preceding write to complete.  We could simplify things by
    * perform this wait at the end of each write operation (rather than at
@@ -453,7 +453,7 @@ static void sst25xx_sectorerase(struct sst25xx_dev_s *priv, off_t sector, uint8_
   /* Deselect the FLASH */
 
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
-  fvdbg("Erased\n");
+  finfo("Erased\n");
 }
 
 /************************************************************************************
@@ -462,7 +462,7 @@ static void sst25xx_sectorerase(struct sst25xx_dev_s *priv, off_t sector, uint8_
 
 static inline int sst25xx_bulkerase(struct sst25xx_dev_s *priv)
 {
-  fvdbg("priv: %p\n", priv);
+  finfo("priv: %p\n", priv);
 
   /* Wait for any preceding write to complete.  We could simplify things by
    * perform this wait at the end of each write operation (rather than at
@@ -489,7 +489,7 @@ static inline int sst25xx_bulkerase(struct sst25xx_dev_s *priv)
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
   sst25xx_waitwritecomplete(priv);
 
-  fvdbg("Return: OK\n");
+  finfo("Return: OK\n");
   return OK;
 }
 
@@ -502,7 +502,7 @@ static inline void sst25xx_pagewrite(struct sst25xx_dev_s *priv, FAR const uint8
 {
   off_t offset = page << priv->pageshift;
 
-  fvdbg("page: %08lx offset: %08lx\n", (long)page, (long)offset);
+  finfo("page: %08lx offset: %08lx\n", (long)page, (long)offset);
 
   /* Wait for any preceding write to complete.  We could simplify things by
    * perform this wait at the end of each write operation (rather than at
@@ -538,7 +538,7 @@ static inline void sst25xx_pagewrite(struct sst25xx_dev_s *priv, FAR const uint8
   /* Deselect the FLASH: Chip Select high */
 
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
-  fvdbg("Written\n");
+  finfo("Written\n");
 }
 
 /************************************************************************************
@@ -549,7 +549,7 @@ static inline void sst25xx_pagewrite(struct sst25xx_dev_s *priv, FAR const uint8
 static inline void sst25xx_bytewrite(struct sst25xx_dev_s *priv, FAR const uint8_t *buffer,
                                      off_t offset, uint16_t count)
 {
-  fvdbg("offset: %08lx  count:%d\n", (long)offset, count);
+  finfo("offset: %08lx  count:%d\n", (long)offset, count);
 
   /* Wait for any preceding write to complete.  We could simplify things by
    * perform this wait at the end of each write operation (rather than at
@@ -585,7 +585,7 @@ static inline void sst25xx_bytewrite(struct sst25xx_dev_s *priv, FAR const uint8
   /* Deselect the FLASH: Chip Select high */
 
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
-  fvdbg("Written\n");
+  finfo("Written\n");
 }
 #endif
 
@@ -598,7 +598,7 @@ static int sst25xx_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nbl
   FAR struct sst25xx_dev_s *priv = (FAR struct sst25xx_dev_s *)dev;
   size_t blocksleft = nblocks;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* Lock access to the SPI bus until we complete the erase */
 
@@ -675,7 +675,7 @@ static ssize_t sst25xx_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t
   FAR struct sst25xx_dev_s *priv = (FAR struct sst25xx_dev_s *)dev;
   ssize_t nbytes;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* On this device, we can handle the block read just like the byte-oriented read */
 
@@ -699,7 +699,7 @@ static ssize_t sst25xx_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_
   size_t blocksleft = nblocks;
   size_t pagesize = 1 << priv->pageshift;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* Lock the SPI bus and write each page to FLASH */
 
@@ -724,7 +724,7 @@ static ssize_t sst25xx_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbyt
 {
   FAR struct sst25xx_dev_s *priv = (FAR struct sst25xx_dev_s *)dev;
 
-  fvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+  finfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
 
   /* Wait for any preceding write to complete.  We could simplify things by
    * perform this wait at the end of each write operation (rather than at
@@ -760,7 +760,7 @@ static ssize_t sst25xx_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbyt
 
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
   sst25xx_unlock(priv->dev);
-  fvdbg("return nbytes: %d\n", (int)nbytes);
+  finfo("return nbytes: %d\n", (int)nbytes);
   return nbytes;
 }
 
@@ -780,7 +780,7 @@ static ssize_t sst25xx_write(FAR struct mtd_dev_s *dev, off_t offset, size_t nby
   int    pagesize;
   int    bytestowrite;
 
-  fvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+  finfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
 
   /* We must test if the offset + count crosses one or more pages
    * and perform individual writes.  The devices can only write in
@@ -847,7 +847,7 @@ static int sst25xx_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
   FAR struct sst25xx_dev_s *priv = (FAR struct sst25xx_dev_s *)dev;
   int ret = -EINVAL; /* Assume good command with bad parameters */
 
-  fvdbg("cmd: %d \n", cmd);
+  finfo("cmd: %d \n", cmd);
 
   switch (cmd)
     {
@@ -871,7 +871,7 @@ static int sst25xx_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
 
               ret = OK;
 
-              fvdbg("blocksize: %d erasesize: %d neraseblocks: %d\n",
+              finfo("blocksize: %d erasesize: %d neraseblocks: %d\n",
                     geo->blocksize, geo->erasesize, geo->neraseblocks);
             }
         }
@@ -893,7 +893,7 @@ static int sst25xx_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
         break;
     }
 
-  fvdbg("return %d\n", ret);
+  finfo("return %d\n", ret);
   return ret;
 }
 
@@ -916,7 +916,7 @@ FAR struct mtd_dev_s *sst25xx_initialize(FAR struct spi_dev_s *dev)
   FAR struct sst25xx_dev_s *priv;
   int ret;
 
-  fvdbg("dev: %p\n", dev);
+  finfo("dev: %p\n", dev);
 
   /* Allocate a state structure (we allocate the structure instead of using
    * a fixed, static allocation so that we can handle multiple FLASH devices.
@@ -954,9 +954,9 @@ FAR struct mtd_dev_s *sst25xx_initialize(FAR struct spi_dev_s *dev)
         {
           /* Unrecognized! Discard all of that work we just did and return NULL */
 
-          fdbg("Unrecognized\n");
+          ferr("ERROR: Unrecognized\n");
           kmm_free(priv);
-          priv = NULL;
+          return NULL;
         }
       else
         {
@@ -974,6 +974,6 @@ FAR struct mtd_dev_s *sst25xx_initialize(FAR struct spi_dev_s *dev)
 
   /* Return the implementation-specific state structure as the MTD device */
 
-  fvdbg("Return %p\n", priv);
+  finfo("Return %p\n", priv);
   return (FAR struct mtd_dev_s *)priv;
 }
diff --git a/drivers/mtd/sst26.c b/drivers/mtd/sst26.c
index 94226064ccd9ca0db040386f636659247beafb96..2654a857e820f30bdd2e3737223fea1c341a26e2 100644
--- a/drivers/mtd/sst26.c
+++ b/drivers/mtd/sst26.c
@@ -208,15 +208,11 @@
 /* Debug ****************************************************************************/
 
 #ifdef CONFIG_SST26_DEBUG
-# define sstdbg(format, ...)    dbg(format, ##__VA_ARGS__)
-# define sstlldbg(format, ...)  lldbg(format, ##__VA_ARGS__)
-# define sstvdbg(format, ...)   vdbg(format, ##__VA_ARGS__)
-# define sstllvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
+# define ssterr(format, ...)    _err(format, ##__VA_ARGS__)
+# define sstinfo(format, ...)   _info(format, ##__VA_ARGS__)
 #else
-# define sstdbg(x...)
-# define sstlldbg(x...)
-# define sstvdbg(x...)
-# define sstllvdbg(x...)
+# define ssterr(x...)
+# define sstinfo(x...)
 #endif
 
 /************************************************************************************
@@ -249,6 +245,7 @@ static inline void sst26_unlock(FAR struct spi_dev_s *dev);
 static inline int sst26_readid(struct sst26_dev_s *priv);
 static void sst26_waitwritecomplete(struct sst26_dev_s *priv);
 static void sst26_writeenable(struct sst26_dev_s *priv);
+static void sst26_writedisable(struct sst26_dev_s *priv);
 static void sst26_globalunlock(struct sst26_dev_s *priv);
 static inline void sst26_sectorerase(struct sst26_dev_s *priv, off_t offset, uint8_t type);
 static inline int  sst26_chiperase(struct sst26_dev_s *priv);
@@ -321,7 +318,7 @@ static inline int sst26_readid(struct sst26_dev_s *priv)
   uint16_t memory;
   uint16_t capacity;
 
-  sstvdbg("priv: %p\n", priv);
+  sstinfo("priv: %p\n", priv);
 
   /* Lock the SPI bus, configure the bus, and select this FLASH part. */
 
@@ -340,8 +337,8 @@ static inline int sst26_readid(struct sst26_dev_s *priv)
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
   sst26_unlock(priv->dev);
 
-  lldbg("manufacturer: %02x memory: %02x capacity: %02x\n",
-        manufacturer, memory, capacity);
+  sstinfo("manufacturer: %02x memory: %02x capacity: %02x\n",
+          manufacturer, memory, capacity);
 
   /* Check for a valid manufacturer and memory type */
 
@@ -416,7 +413,7 @@ static void sst26_waitwritecomplete(struct sst26_dev_s *priv)
     }
   while ((status & SST26_SR_WIP) != 0);
 
-  sstvdbg("Complete\n");
+  sstinfo("Complete\n");
 }
 
 /************************************************************************************
@@ -431,7 +428,7 @@ static void sst26_globalunlock(struct sst26_dev_s *priv)
 
   SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
 
-  /* Send "Write Enable (WREN)" command */
+  /* Send "Global Unlock (ULBPR)" command */
 
   (void)SPI_SEND(priv->dev, SST26_ULBPR);
 
@@ -439,7 +436,7 @@ static void sst26_globalunlock(struct sst26_dev_s *priv)
 
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
 
-  sstvdbg("Device unlocked.\n");
+  sstinfo("Device unlocked.\n");
 }
 
 /************************************************************************************
@@ -460,7 +457,28 @@ static void sst26_writeenable(struct sst26_dev_s *priv)
 
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
 
-  sstvdbg("Enabled\n");
+  sstinfo("Enabled\n");
+}
+
+/************************************************************************************
+ * Name:  sst26_writedisable
+ ************************************************************************************/
+
+static void sst26_writedisable(struct sst26_dev_s *priv)
+{
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send "Write Disable (WRDI)" command */
+
+  (void)SPI_SEND(priv->dev, SST26_WRDI);
+
+  /* Deselect the FLASH */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+
+  sstinfo("Disabled\n");
 }
 
 /************************************************************************************
@@ -473,7 +491,7 @@ static void sst26_sectorerase(struct sst26_dev_s *priv, off_t sector, uint8_t ty
 
   offset = sector << priv->sectorshift;
 
-  sstvdbg("sector: %08lx\n", (long)sector);
+  sstinfo("sector: %08lx\n", (long)sector);
 
   /* Send write enable instruction */
 
@@ -504,7 +522,7 @@ static void sst26_sectorerase(struct sst26_dev_s *priv, off_t sector, uint8_t ty
 
   sst26_waitwritecomplete(priv);
 
-  sstvdbg("Erased\n");
+  sstinfo("Erased\n");
 }
 
 /************************************************************************************
@@ -513,7 +531,7 @@ static void sst26_sectorerase(struct sst26_dev_s *priv, off_t sector, uint8_t ty
 
 static inline int sst26_chiperase(struct sst26_dev_s *priv)
 {
-  sstvdbg("priv: %p\n", priv);
+  sstinfo("priv: %p\n", priv);
 
   /* Send write enable instruction */
 
@@ -533,7 +551,7 @@ static inline int sst26_chiperase(struct sst26_dev_s *priv)
 
   sst26_waitwritecomplete(priv);
 
-  sstvdbg("Return: OK\n");
+  sstinfo("Return: OK\n");
   return OK;
 }
 
@@ -546,7 +564,7 @@ static inline void sst26_pagewrite(struct sst26_dev_s *priv,
 {
   off_t offset = page << priv->pageshift;
 
-  sstvdbg("page: %08lx offset: %08lx\n", (long)page, (long)offset);
+  sstinfo("page: %08lx offset: %08lx\n", (long)page, (long)offset);
 
   /* Enable the write access to the FLASH */
 
@@ -576,7 +594,7 @@ static inline void sst26_pagewrite(struct sst26_dev_s *priv,
 
   sst26_waitwritecomplete(priv);
 
-  sstvdbg("Written\n");
+  sstinfo("Written\n");
 }
 
 /************************************************************************************
@@ -588,7 +606,7 @@ static inline void sst26_bytewrite(struct sst26_dev_s *priv,
                                    FAR const uint8_t *buffer, off_t offset,
                                    uint16_t count)
 {
-  sstvdbg("offset: %08lx  count:%d\n", (long)offset, count);
+  sstinfo("offset: %08lx  count:%d\n", (long)offset, count);
 
   /* Enable the write access to the FLASH */
 
@@ -619,7 +637,7 @@ static inline void sst26_bytewrite(struct sst26_dev_s *priv,
 
   sst26_waitwritecomplete(priv);
 
-  sstvdbg("Written\n");
+  sstinfo("Written\n");
 }
 #endif
 
@@ -634,7 +652,7 @@ static int sst26_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nbloc
   FAR struct sst26_dev_s *priv = (FAR struct sst26_dev_s *)dev;
   size_t blocksleft = nblocks;
 
-  sstvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  sstinfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* Lock access to the SPI bus until we complete the erase */
 
@@ -664,7 +682,7 @@ static ssize_t sst26_bread(FAR struct mtd_dev_s *dev, off_t startblock,
   FAR struct sst26_dev_s *priv = (FAR struct sst26_dev_s *)dev;
   ssize_t nbytes;
 
-  sstvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  sstinfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* On this device, we can handle the block read just like the byte-oriented read */
 
@@ -689,7 +707,7 @@ static ssize_t sst26_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t
   size_t blocksleft = nblocks;
   size_t pagesize = 1 << priv->pageshift;
 
-  sstvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  sstinfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* Lock the SPI bus and write each page to FLASH */
 
@@ -714,7 +732,7 @@ static ssize_t sst26_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes
 {
   FAR struct sst26_dev_s *priv = (FAR struct sst26_dev_s *)dev;
 
-  sstvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+  sstinfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
 
   /* Lock the SPI bus and select this FLASH part */
 
@@ -743,7 +761,7 @@ static ssize_t sst26_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes
 
   SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
   sst26_unlock(priv->dev);
-  sstvdbg("return nbytes: %d\n", (int)nbytes);
+  sstinfo("return nbytes: %d\n", (int)nbytes);
   return nbytes;
 }
 
@@ -763,7 +781,7 @@ static ssize_t sst26_write(FAR struct mtd_dev_s *dev, off_t offset, size_t nbyte
   int    pagesize;
   int    bytestowrite;
 
-  sstvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+  sstinfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
 
   /* We must test if the offset + count crosses one or more pages
    * and perform individual writes.  The devices can only write in
@@ -830,7 +848,7 @@ static int sst26_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
   FAR struct sst26_dev_s *priv = (FAR struct sst26_dev_s *)dev;
   int ret = -EINVAL; /* Assume good command with bad parameters */
 
-  sstvdbg("cmd: %d \n", cmd);
+  sstinfo("cmd: %d \n", cmd);
 
   switch (cmd)
     {
@@ -854,7 +872,7 @@ static int sst26_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
 
               ret = OK;
 
-              sstvdbg("blocksize: %d erasesize: %d neraseblocks: %d\n",
+              sstinfo("blocksize: %d erasesize: %d neraseblocks: %d\n",
                       geo->blocksize, geo->erasesize, geo->neraseblocks);
             }
         }
@@ -876,7 +894,7 @@ static int sst26_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
         break;
     }
 
-  sstvdbg("return %d\n", ret);
+  sstinfo("return %d\n", ret);
   return ret;
 }
 
@@ -899,7 +917,7 @@ FAR struct mtd_dev_s *sst26_initialize_spi(FAR struct spi_dev_s *dev)
   FAR struct sst26_dev_s *priv;
   int ret;
 
-  sstvdbg("dev: %p\n", dev);
+  sstinfo("dev: %p\n", dev);
 
   /* Allocate a state structure (we allocate the structure instead of using
    * a fixed, static allocation so that we can handle multiple FLASH devices.
@@ -936,15 +954,16 @@ FAR struct mtd_dev_s *sst26_initialize_spi(FAR struct spi_dev_s *dev)
         {
           /* Unrecognized! Discard all of that work we just did and return NULL */
 
-          sstdbg("Unrecognized\n");
+          ssterr("ERROR: Unrecognized\n");
           kmm_free(priv);
-          priv = NULL;
+          return NULL;
         }
       else
         {
           /* Make sure that the FLASH is unprotected so that we can write into it */
-
+          sst26_writeenable(priv);
           sst26_globalunlock(priv);
+          sst26_writedisable(priv);
 
 #ifdef CONFIG_MTD_REGISTRATION
           /* Register the MTD with the procfs system if enabled */
@@ -956,6 +975,6 @@ FAR struct mtd_dev_s *sst26_initialize_spi(FAR struct spi_dev_s *dev)
 
   /* Return the implementation-specific state structure as the MTD device */
 
-  sstvdbg("Return %p\n", priv);
+  sstinfo("Return %p\n", priv);
   return (FAR struct mtd_dev_s *)priv;
 }
diff --git a/drivers/mtd/sst39vf.c b/drivers/mtd/sst39vf.c
index 5386427587b372a731155e5e676f0e20bf361673..932950884523a67b648b9da68d3b7834ef939e47 100644
--- a/drivers/mtd/sst39vf.c
+++ b/drivers/mtd/sst39vf.c
@@ -697,7 +697,7 @@ static ssize_t sst39vf_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
 static ssize_t sst39vf_read(FAR struct mtd_dev_s *dev, off_t offset,
                             size_t nbytes, FAR uint8_t *buffer)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   FAR struct sst39vf_dev_s *priv = (FAR struct sst39vf_dev_s *)dev;
 #endif
   FAR const uint8_t *source;
@@ -814,12 +814,12 @@ FAR struct mtd_dev_s *sst39vf_initialize(void)
 
   /* Now see if we can suport the part */
 
-  fvdbg("Manufacturer: %02x\n", manufacturer);
-  fvdbg("Chip ID:      %04x\n", chipid);
+  finfo("Manufacturer: %02x\n", manufacturer);
+  finfo("Chip ID:      %04x\n", chipid);
 
   if (manufacturer != SST_MANUFACTURER_ID)
     {
-      fdbg("Unrecognized manufacturer: %02x\n", manufacturer);
+      ferr("ERROR: Unrecognized manufacturer: %02x\n", manufacturer);
       return NULL;
     }
   else if (chipid == g_sst39vf1601.chipid)
@@ -840,7 +840,7 @@ FAR struct mtd_dev_s *sst39vf_initialize(void)
     }
   else
     {
-      fdbg("Unrecognized chip ID: %04x\n", chipid);
+      ferr("ERROR: Unrecognized chip ID: %04x\n", chipid);
       return NULL;
     }
 
diff --git a/drivers/mtd/w25.c b/drivers/mtd/w25.c
index 09a7c015d2581f0e40b7f2cb02a7ba1fe572b61c..279525e1fc45623447f6e1fae16b54b4426603d0 100644
--- a/drivers/mtd/w25.c
+++ b/drivers/mtd/w25.c
@@ -200,15 +200,15 @@
 
 #define IS_VALID(p)                ((((p)->flags) & W25_CACHE_VALID) != 0)
 #define IS_DIRTY(p)                ((((p)->flags) & W25_CACHE_DIRTY) != 0)
-#define IS_ERASED(p)               ((((p)->flags) & W25_CACHE_DIRTY) != 0)
+#define IS_ERASED(p)               ((((p)->flags) & W25_CACHE_ERASED) != 0)
 
 #define SET_VALID(p)               do { (p)->flags |= W25_CACHE_VALID; } while (0)
 #define SET_DIRTY(p)               do { (p)->flags |= W25_CACHE_DIRTY; } while (0)
-#define SET_ERASED(p)              do { (p)->flags |= W25_CACHE_DIRTY; } while (0)
+#define SET_ERASED(p)              do { (p)->flags |= W25_CACHE_ERASED; } while (0)
 
 #define CLR_VALID(p)               do { (p)->flags &= ~W25_CACHE_VALID; } while (0)
 #define CLR_DIRTY(p)               do { (p)->flags &= ~W25_CACHE_DIRTY; } while (0)
-#define CLR_ERASED(p)              do { (p)->flags &= ~W25_CACHE_DIRTY; } while (0)
+#define CLR_ERASED(p)              do { (p)->flags &= ~W25_CACHE_ERASED; } while (0)
 
 /************************************************************************************
  * Private Types
@@ -333,7 +333,7 @@ static inline int w25_readid(struct w25_dev_s *priv)
   uint16_t memory;
   uint16_t capacity;
 
-  fvdbg("priv: %p\n", priv);
+  finfo("priv: %p\n", priv);
 
   /* Lock the SPI bus, configure the bus, and select this FLASH part. */
 
@@ -352,7 +352,7 @@ static inline int w25_readid(struct w25_dev_s *priv)
   SPI_SELECT(priv->spi, SPIDEV_FLASH, false);
   w25_unlock(priv->spi);
 
-  fvdbg("manufacturer: %02x memory: %02x capacity: %02x\n",
+  finfo("manufacturer: %02x memory: %02x capacity: %02x\n",
         manufacturer, memory, capacity);
 
   /* Check for a valid manufacturer and memory type */
@@ -557,7 +557,7 @@ static void w25_sectorerase(struct w25_dev_s *priv, off_t sector)
 {
   off_t address = sector << W25_SECTOR_SHIFT;
 
-  fvdbg("sector: %08lx\n", (long)sector);
+  finfo("sector: %08lx\n", (long)sector);
 
   /* Wait for any preceding write or erase operation to complete. */
 
@@ -594,7 +594,7 @@ static void w25_sectorerase(struct w25_dev_s *priv, off_t sector)
 
 static inline int w25_chiperase(struct w25_dev_s *priv)
 {
-  fvdbg("priv: %p\n", priv);
+  finfo("priv: %p\n", priv);
 
   /* Wait for any preceding write or erase operation to complete. */
 
@@ -615,7 +615,7 @@ static inline int w25_chiperase(struct w25_dev_s *priv)
   /* Deselect the FLASH */
 
   SPI_SELECT(priv->spi, SPIDEV_FLASH, false);
-  fvdbg("Return: OK\n");
+  finfo("Return: OK\n");
   return OK;
 }
 
@@ -628,7 +628,7 @@ static void w25_byteread(FAR struct w25_dev_s *priv, FAR uint8_t *buffer,
 {
   uint8_t status;
 
-  fvdbg("address: %08lx nbytes: %d\n", (long)address, (int)nbytes);
+  finfo("address: %08lx nbytes: %d\n", (long)address, (int)nbytes);
 
   /* Wait for any preceding write or erase operation to complete. */
 
@@ -682,7 +682,7 @@ static void w25_pagewrite(struct w25_dev_s *priv, FAR const uint8_t *buffer,
 {
   uint8_t status;
 
-  fvdbg("address: %08lx nwords: %d\n", (long)address, (int)nbytes);
+  finfo("address: %08lx nwords: %d\n", (long)address, (int)nbytes);
   DEBUGASSERT(priv && buffer && (address & 0xff) == 0 &&
              (nbytes & 0xff) == 0);
 
@@ -739,7 +739,7 @@ static void w25_pagewrite(struct w25_dev_s *priv, FAR const uint8_t *buffer,
 static inline void w25_bytewrite(struct w25_dev_s *priv, FAR const uint8_t *buffer,
                                   off_t offset, uint16_t count)
 {
-  fvdbg("offset: %08lx  count:%d\n", (long)offset, count);
+  finfo("offset: %08lx  count:%d\n", (long)offset, count);
 
   /* Wait for any preceding write to complete.  We could simplify things by
    * perform this wait at the end of each write operation (rather than at
@@ -774,7 +774,7 @@ static inline void w25_bytewrite(struct w25_dev_s *priv, FAR const uint8_t *buff
   /* Deselect the FLASH: Chip Select high */
 
   SPI_SELECT(priv->spi, SPIDEV_FLASH, false);
-  fvdbg("Written\n");
+  finfo("Written\n");
 }
 #endif /* defined(CONFIG_MTD_BYTE_WRITE) && !defined(CONFIG_W25_READONLY) */
 
@@ -823,7 +823,7 @@ static FAR uint8_t *w25_cacheread(struct w25_dev_s *priv, off_t sector)
 
   shift    = W25_SECTOR_SHIFT - W25_SECTOR512_SHIFT;
   esectno  = sector >> shift;
-  fvdbg("sector: %ld esectno: %d shift=%d\n", sector, esectno, shift);
+  finfo("sector: %ld esectno: %d shift=%d\n", sector, esectno, shift);
 
   /* Check if the requested erase block is already in the cache */
 
@@ -879,7 +879,7 @@ static void w25_cacheerase(struct w25_dev_s *priv, off_t sector)
   if (!IS_ERASED(priv))
     {
       off_t esectno  = sector >> (W25_SECTOR_SHIFT - W25_SECTOR512_SHIFT);
-      fvdbg("sector: %ld esectno: %d\n", sector, esectno);
+      finfo("sector: %ld esectno: %d\n", sector, esectno);
 
       w25_sectorerase(priv, esectno);
       SET_ERASED(priv);
@@ -921,7 +921,7 @@ static void w25_cachewrite(FAR struct w25_dev_s *priv, FAR const uint8_t *buffer
       if (!IS_ERASED(priv))
         {
           off_t esectno  = sector >> (W25_SECTOR_SHIFT - W25_SECTOR512_SHIFT);
-          fvdbg("sector: %ld esectno: %d\n", sector, esectno);
+          finfo("sector: %ld esectno: %d\n", sector, esectno);
 
           w25_sectorerase(priv, esectno);
           SET_ERASED(priv);
@@ -956,7 +956,7 @@ static int w25_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks
   FAR struct w25_dev_s *priv = (FAR struct w25_dev_s *)dev;
   size_t blocksleft = nblocks;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* Lock access to the SPI bus until we complete the erase */
 
@@ -994,7 +994,7 @@ static ssize_t w25_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t nbl
 {
   ssize_t nbytes;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* On this device, we can handle the block read just like the byte-oriented read */
 
@@ -1027,7 +1027,7 @@ static ssize_t w25_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t nb
 #else
   FAR struct w25_dev_s *priv = (FAR struct w25_dev_s *)dev;
 
-  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+  finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   /* Lock the SPI bus and write all of the pages to FLASH */
 
@@ -1054,7 +1054,7 @@ static ssize_t w25_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
 {
   FAR struct w25_dev_s *priv = (FAR struct w25_dev_s *)dev;
 
-  fvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+  finfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
 
   /* Lock the SPI bus and select this FLASH part */
 
@@ -1062,7 +1062,7 @@ static ssize_t w25_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
   w25_byteread(priv, buffer, offset, nbytes);
   w25_unlock(priv->spi);
 
-  fvdbg("return nbytes: %d\n", (int)nbytes);
+  finfo("return nbytes: %d\n", (int)nbytes);
   return nbytes;
 }
 
@@ -1081,7 +1081,7 @@ static ssize_t w25_write(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
   int    index;
   int    bytestowrite;
 
-  fvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+  finfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
 
   /* We must test if the offset + count crosses one or more pages
    * and perform individual writes.  The devices can only write in
@@ -1145,7 +1145,7 @@ static int w25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
   FAR struct w25_dev_s *priv = (FAR struct w25_dev_s *)dev;
   int ret = -EINVAL; /* Assume good command with bad parameters */
 
-  fvdbg("cmd: %d \n", cmd);
+  finfo("cmd: %d \n", cmd);
 
   switch (cmd)
     {
@@ -1174,7 +1174,7 @@ static int w25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
 #endif
               ret               = OK;
 
-              fvdbg("blocksize: %d erasesize: %d neraseblocks: %d\n",
+              finfo("blocksize: %d erasesize: %d neraseblocks: %d\n",
                     geo->blocksize, geo->erasesize, geo->neraseblocks);
             }
         }
@@ -1196,7 +1196,7 @@ static int w25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
         break;
     }
 
-  fvdbg("return %d\n", ret);
+  finfo("return %d\n", ret);
   return ret;
 }
 
@@ -1219,7 +1219,7 @@ FAR struct mtd_dev_s *w25_initialize(FAR struct spi_dev_s *spi)
   FAR struct w25_dev_s *priv;
   int ret;
 
-  fvdbg("spi: %p\n", spi);
+  finfo("spi: %p\n", spi);
 
   /* Allocate a state structure (we allocate the structure instead of using
    * a fixed, static allocation so that we can handle multiple FLASH devices.
@@ -1256,9 +1256,9 @@ FAR struct mtd_dev_s *w25_initialize(FAR struct spi_dev_s *spi)
         {
           /* Unrecognized! Discard all of that work we just did and return NULL */
 
-          fdbg("Unrecognized\n");
+          ferr("ERROR: Unrecognized\n");
           kmm_free(priv);
-          priv = NULL;
+          return NULL;
         }
       else
         {
@@ -1276,9 +1276,9 @@ FAR struct mtd_dev_s *w25_initialize(FAR struct spi_dev_s *spi)
             {
               /* Allocation failed! Discard all of that work we just did and return NULL */
 
-              fdbg("Allocation failed\n");
+              ferr("ERROR: Allocation failed\n");
               kmm_free(priv);
-              priv = NULL;
+              return NULL;
             }
 #endif
         }
@@ -1292,6 +1292,6 @@ FAR struct mtd_dev_s *w25_initialize(FAR struct spi_dev_s *spi)
 
   /* Return the implementation-specific state structure as the MTD device */
 
-  fvdbg("Return %p\n", priv);
+  finfo("Return %p\n", priv);
   return (FAR struct mtd_dev_s *)priv;
 }
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 49ad8d710fd25b0191d1eb9bdbcac157148c6574..d5466386ef67d69a85e97a89c105c8242973d4a3 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -9,12 +9,32 @@ config NETDEV_LOOPBACK
 	bool
 	default n if !NET_LOOPBACK
 	default y if NET_LOOPBACK
-	select NET_NOINTS
 	select ARCH_HAVE_NETDEV_STATISTICS
 	---help---
-		Add support for the local network loopback device, lo.  Any additional
-		networking devices that are enabled must be compatible with
-		CONFIG_NET_NOINTS.
+		Add support for the local network loopback device, lo.
+
+if NETDEV_LOOPBACK
+
+choice
+	prompt "Work queue"
+	default LOOPBACK_LPWORK if SCHED_LPWORK
+	default LOOPBACK_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the loopback driver.  If the
+		low priority work queue is available, then it should be used by the
+		loopback driver.
+
+config LOOPBACK_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
+
+config LOOPBACK_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
+
+endchoice # Work queue
+endif # NETDEV_LOOPBACK
 
 config NETDEV_TELNET
 	bool "Telnet driver"
@@ -95,12 +115,12 @@ config NETDEV_LATEINIT
 
 config NET_DUMPPACKET
 	bool "Enable packet dumping"
-	depends on DEBUG
+	depends on DEBUG_FEATURES
 	default n
 	---help---
 		Some Ethernet MAC drivers supporting dumping of received and
 		transmitted packets as a debug option.  This setting enables that
-		debug option. Also needs DEBUG.
+		debug option. Also needs CONFIG_DEBUG_FEATURES.
 
 comment "External Ethernet MAC Device Support"
 
@@ -172,6 +192,26 @@ config DM9X_NINTERFACES
 	default 1
 	depends on EXPERIMENTAL
 
+choice
+	prompt "Work queue"
+	default DM9X_LPWORK if SCHED_LPWORK
+	default DM9X_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the Ethernet driver.  If the
+		low priority work queue is available, then it should be used by the
+		driver.
+
+config DM9X_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
+
+config DM9X_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
+
+endchoice # Work queue
+
 endif # NET_DM90x0
 
 config NET_CS89x0
@@ -218,6 +258,26 @@ config ENC28J60_FREQUENCY
 	---help---
 		Define to use a different bus frequency
 
+choice
+	prompt "Work queue"
+	default ENC28J60_LPWORK if SCHED_LPWORK
+	default ENC28J60_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the ENC28J60 driver.  If the
+		low priority work queue is available, then it should be used by the
+		ENC28J60 driver.
+
+config ENC28J60_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
+
+config ENC28J60_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
+
+endchoice # Work queue
+
 config ENC28J60_HALFDUPPLEX
 	bool "Enable half dupplex"
 	default n
@@ -234,9 +294,10 @@ config ENC28J60_DUMPPACKET
 config ENC28J60_REGDEBUG
 	bool "Register-Level Debug"
 	default n
-	depends on DEBUG && DEBUG_NET
+	depends on DEBUG_FEATURES && DEBUG_NET
 	---help---
-		Enable very low-level register access debug.  Depends on DEBUG and DEBUG_NET.
+		Enable very low-level register access debug.  Depends on
+		CONFIG_DEBUG_FEATURES and CONFIG_DEBUG_NET.
 
 endif # ENC28J60
 
@@ -286,6 +347,26 @@ config ENCX24J600_NRXDESCR
 		The ENC has a relative large packet buffer of 24kB which can
 		be used to buffer multiple packets silmutaneously
 
+choice
+	prompt "Work queue"
+	default ENCX24J600_LPWORK if SCHED_LPWORK
+	default ENCX24J600_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the ENCX24J600 driver.  If the
+		low priority work queue is available, then it should be used by the
+		ENCX24J600 driver.
+
+config ENCX24J600_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
+
+config ENCX24J600_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
+
+endchoice # Work queue
+
 config ENCX24J600_DUMPPACKET
 	bool "Dump Packets"
 	default n
@@ -296,32 +377,13 @@ config ENCX24J600_DUMPPACKET
 config ENCX24J600_REGDEBUG
 	bool "Register-Level Debug"
 	default n
-	depends on DEBUG && DEBUG_NET
+	depends on DEBUG_FEATURES && DEBUG_NET
 	---help---
-		Enable very low-level register access debug.  Depends on DEBUG and DEBUG_NET.
+		Enable very low-level register access debug.  Depends on
+		CONFIG_DEBUG_FEATURES and CONFIG_DEBUG_NET.
 
 endif # ENCX24J600
 
-menuconfig NET_E1000
-	bool "E1000 support"
-	default n
-
-if NET_E1000
-
-config E1000_N_TX_DESC
-	int "Number of TX descriptors"
-	default 128
-
-config E1000_N_RX_DESC
-	int "Number of RX descriptors"
-	default 128
-
-config E1000_BUFF_SIZE
-	int "Buffer size"
-	default 2048
-
-endif # NET_E1000
-
 menuconfig NET_SLIP
 	bool "SLIP (serial line) support"
 	default n
@@ -379,19 +441,27 @@ config FTMAC100_MAC0_ENV_ADDR
 	hex "MAC0 address location"
 	default 0
 
-endif # NET_FTMAC100
+choice
+	prompt "Work queue"
+	default FTMAC100_LPWORK if SCHED_LPWORK
+	default FTMAC100_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the FTMAC100 driver.  If the
+		low priority work queue is available, then it should be used by the
+		FTMAC100 driver.
 
-menuconfig NET_VNET
-	bool "VNET support"
-	default n
+config FTMAC100_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
 
-if NET_VNET
+config FTMAC100_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
 
-config VNET_NINTERFACES
-	int "Number of VNET interfaces"
-	default 1
+endchoice # Work queue
 
-endif # NET_VNET
+endif # NET_FTMAC100
 
 if ARCH_HAVE_PHY
 
@@ -433,7 +503,7 @@ config ETH0_PHY_KSZ90x1
 	bool "Micrel KSZ9021/31 PHY"
 
 config ETH0_PHY_DP83848C
-	bool "National Semiconduction DP83848C PHY"
+	bool "National Semiconductor DP83848C PHY"
 
 config ETH0_PHY_LAN8720
 	bool "SMSC LAN8720 PHY"
@@ -482,7 +552,7 @@ config ETH1_PHY_KSZ90x1
 	bool "Micrel KSZ9021/31 PHY"
 
 config ETH1_PHY_DP83848C
-	bool "National Semiconduction DP83848C PHY"
+	bool "National Semiconductor DP83848C PHY"
 
 config ETH1_PHY_LAN8720
 	bool "SMSC LAN8720 PHY"
@@ -495,12 +565,12 @@ endchoice
 config NETDEV_PHY_DEBUG
 	bool "PHY debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_FEATURES
 	---help---
 		Normally debug output is controlled by DEBUG_NET.  However, that
-		may generate a LOT of debug output, especially if DEBUG_VERBOSE is
+		may generate a LOT of debug output, especially if CONFIG_DEBUG_INFO is
 		also selected.  This option is intended to force VERVOSE debug
-		output from certain PHY-related even if DEBUG_NET or DEBUG_VERBOSE
+		output from certain PHY-related even if DEBUG_NET or CONFIG_DEBUG_INFO
 		are not selected.  This allows for focused, unit-level debug of
 		the NSH network initialization logic.
 
diff --git a/drivers/net/Make.defs b/drivers/net/Make.defs
index fe68efb267aee7bf7a7f9efa1e2c2dc9f00c7f56..144313623b6a5656f9d4a7fe87e2c12993e1f235 100644
--- a/drivers/net/Make.defs
+++ b/drivers/net/Make.defs
@@ -63,14 +63,6 @@ ifeq ($(CONFIG_ENCX24J600),y)
   CSRCS += encx24j600.c
 endif
 
-ifeq ($(CONFIG_NET_VNET),y)
-  CSRCS += vnet.c
-endif
-
-ifeq ($(CONFIG_NET_E1000),y)
-  CSRCS += e1000.c
-endif
-
 ifeq ($(CONFIG_NET_SLIP),y)
   CSRCS += slip.c
 endif
diff --git a/drivers/net/cs89x0.c b/drivers/net/cs89x0.c
index be6a890d1b0cf74cf5cf7b36cdfb7c4315cf7894..ef2f7f46aed30d71e0a72ba48a53d8eb96def052 100644
--- a/drivers/net/cs89x0.c
+++ b/drivers/net/cs89x0.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/net/cs89x0.c
  *
- *   Copyright (C) 2009-2011, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009-2011, 2014-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -85,17 +85,7 @@
 
 #define BUF ((struct eth_hdr_s *)cs89x0->cs_dev.d_buf)
 
-/* If there is only one CS89x0 instance, then mapping the CS89x0 IRQ to
- * a driver state instance is trivial.
- */
-
-#if CONFIG_CS89x0_NINTERFACES == 1
-#  define cs89x0_mapirq(irq) g_cs89x0[0]
-#endif
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
+#define PKTBUF_SIZE (MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE)
 
 /****************************************************************************
  * Private Data
@@ -125,10 +115,7 @@ static int  cs89x0_txpoll(struct net_driver_s *dev);
 
 static void cs89x0_receive(struct cs89x0_driver_s *cs89x0);
 static void cs89x0_txdone(struct cs89x0_driver_s *cs89x0, uint16_t isq);
-#if CONFIG_CS89x0_NINTERFACES > 1
-static inline FAR struct cs89x0_driver_s *cs89x0_mapirq(int irq);
-#endif
-static int  cs89x0_interrupt(int irq, FAR void *context);
+static int  cs89x0_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
@@ -467,7 +454,7 @@ static void cs89x0_receive(FAR struct cs89x0_driver_s *cs89x0, uint16_t isq)
 #ifdef CONFIG_NET_IPv4
   if (BUF->type == HTONS(ETHTYPE_IP))
     {
-      nllvdbg("IPv4 frame\n");
+      ninfo("IPv4 frame\n");
       NETDEV_RXIPV4(&priv->cs_dev);
 
       /* Handle ARP on input then give the IPv4 packet to the network
@@ -508,7 +495,7 @@ static void cs89x0_receive(FAR struct cs89x0_driver_s *cs89x0, uint16_t isq)
 #ifdef CONFIG_NET_IPv6
   if (BUF->type == HTONS(ETHTYPE_IP6))
     {
-      nllvdbg("Iv6 frame\n");
+      ninfo("Iv6 frame\n");
       NETDEV_RXIPV6(&priv->cs_dev);
 
       /* Give the IPv6 packet to the network layer */
@@ -561,7 +548,7 @@ static void cs89x0_receive(FAR struct cs89x0_driver_s *cs89x0, uint16_t isq)
   else
 #endif
     {
-      nllvdbg("Unrecognized packet type %02x\n", BUF->type);
+      ninfo("Unrecognized packet type %02x\n", BUF->type);
       NETDEV_RXDROPPED(&priv->cs_dev);
     }
 }
@@ -623,40 +610,6 @@ static void cs89x0_txdone(struct cs89x0_driver_s *cs89x0, uint16_t isq)
   (void)devif_poll(&cs89x0->cs_dev, cs89x0_txpoll);
 }
 
-/****************************************************************************
- * Function: cs89x0_mapirq
- *
- * Description:
- *   Map an IRQ number to a CS89x0 device state instance.  This is only
- *   necessary to handler the case where the architecture includes more than
- *   on CS89x0 chip.
- *
- * Parameters:
- *   irq     - Number of the IRQ that generated the interrupt
- *
- * Returned Value:
- *   A reference to device state structure (NULL if irq does not correspond
- *   to any CS89x0 device).
- *
- * Assumptions:
- *
- ****************************************************************************/
-
-#if CONFIG_CS89x0_NINTERFACES > 1
-static inline FAR struct cs89x0_driver_s *cs89x0_mapirq(int irq)
-{
-  int i;
-  for (i = 0; i < CONFIG_CS89x0_NINTERFACES; i++)
-    {
-      if (g_cs89x0[i] && g_cs89x0[i].irq == irq)
-        {
-          return g_cs89x0[i];
-        }
-    }
-  return NULL;
-}
-#endif
-
 /****************************************************************************
  * Function: cs89x0_interrupt
  *
@@ -674,23 +627,18 @@ static inline FAR struct cs89x0_driver_s *cs89x0_mapirq(int irq)
  *
  ****************************************************************************/
 
-static int cs89x0_interrupt(int irq, FAR void *context)
+static int cs89x0_interrupt(int irq, FAR void *context, FAR void *arg)
 {
-  register struct cs89x0_driver_s *cs89x0 = s89x0_mapirq(irq);
+  FAR struct cs89x0_driver_s *cs89x0 = (FAR struct cs89x0_driver_s *)arg;
   uint16_t isq;
 
-#ifdef CONFIG_DEBUG
-  if (!cs89x0)
-    {
-      return -ENODEV;
-    }
-#endif
+  DEBUGASSERT(cs89x0 != NULL);
 
   /* Read and process all of the events from the ISQ */
 
   while ((isq = cs89x0_getreg(dev, CS89x0_ISQ_OFFSET)) != 0)
     {
-      nvdbg("ISQ: %04x\n", isq);
+      ninfo("ISQ: %04x\n", isq);
       switch (isq & ISQ_EVENTMASK)
         {
         case ISQ_RXEVENT:
@@ -704,7 +652,7 @@ static int cs89x0_interrupt(int irq, FAR void *context)
         case ISQ_BUFEVENT:
             if ((isq & ISQ_BUFEVENT_TXUNDERRUN) != 0)
               {
-                ndbg("Transmit underrun\n");
+                nerr("ERROR: Transmit underrun\n");
 #ifdef CONFIG_CS89x0_XMITEARLY
                 cd89x0->cs_txunderrun++;
                 if (cd89x0->cs_txunderrun == 3)
@@ -819,9 +767,9 @@ static int cs89x0_ifup(struct net_driver_s *dev)
 {
   struct cs89x0_driver_s *cs89x0 = (struct cs89x0_driver_s *)dev->d_private;
 
-  ndbg("Bringing up: %d.%d.%d.%d\n",
-       dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-       (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 
   /* Initialize the Ethernet interface */
 #warning "Missing logic"
@@ -1008,9 +956,11 @@ static int cs89x0_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac)
 
 int cs89x0_initialize(FAR const cs89x0_driver_s *cs89x0, int devno)
 {
+  FAR uint8_t *pktbuf;
+
   /* Sanity checks -- only performed with debug enabled */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!cs89x0 || (unsigned)devno > CONFIG_CS89x0_NINTERFACES || g_cs89x00[devno])
     {
       return -EINVAL;
@@ -1023,16 +973,25 @@ int cs89x0_initialize(FAR const cs89x0_driver_s *cs89x0, int devno)
 
   /* Attach the IRQ to the driver */
 
-  if (irq_attach(cs89x0->irq, cs89x0_interrupt))
+  if (irq_attach(cs89x0->irq, cs89x0_interrupt, cs89x0))
     {
       /* We could not attach the ISR to the ISR */
 
       return -EAGAIN;
     }
 
+  /* Allocate a packet buffer */
+
+  pktbuf = (FAR uint_t *)kmm_alloc(MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE);
+  if (pktbuf == NULL)
+    {
+      return -ENOMEM;
+    }
+
   /* Initialize the driver structure */
 
   g_cs89x[devno]           = cs89x0;             /* Used to map IRQ back to instance */
+  cs89x0->cs_dev.d_buf     = g_pktbuf;           /* Single packet buffer */
   cs89x0->cs_dev.d_ifup    = cs89x0_ifup;        /* I/F down callback */
   cs89x0->cs_dev.d_ifdown  = cs89x0_ifdown;      /* I/F up (new IP address) callback */
   cs89x0->cs_dev.d_txavail = cs89x0_txavail;     /* New TX data callback */
@@ -1056,4 +1015,3 @@ int cs89x0_initialize(FAR const cs89x0_driver_s *cs89x0, int devno)
 }
 
 #endif /* CONFIG_NET && CONFIG_NET_CS89x0 */
-
diff --git a/drivers/net/dm90x0.c b/drivers/net/dm90x0.c
index c1807b53037a8d4f758eb41fdb0e0ce062da2e8f..4707ff87f40063397f5d3949f2ff5fea1d3b78d4 100644
--- a/drivers/net/dm90x0.c
+++ b/drivers/net/dm90x0.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * drivers/net/dm9x.c
+ * drivers/net/dm90x0.c
  *
- *   Copyright (C) 2007-2010, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2010, 2014-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * References: Davicom data sheets (DM9000-DS-F03-041906.pdf,
@@ -65,6 +65,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -75,6 +76,24 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+/* If processing is not done at the interrupt level, then work queue support
+ * is required.
+ */
+
+#if !defined(CONFIG_SCHED_WORKQUEUE)
+#  error Work queue support is required in this configuration (CONFIG_SCHED_WORKQUEUE)
+#else
+
+  /* Use the low priority work queue if possible */
+
+#  if defined(CONFIG_DM9X_HPWORK)
+#    define ETHWORK HPWORK
+#  elif defined(CONFIG_DM9X_LPWORK)
+#    define ETHWORK LPWORK
+#  else
+#    error Neither CONFIG_DM9X_HPWORK nor CONFIG_DM9X_LPWORK defined
+#  endif
+#endif
 
 /* DM90000 and DM9010 register offets */
 
@@ -265,7 +284,7 @@
 
 /* TX poll deley = 1 seconds. CLK_TCK is the number of clock ticks per second */
 
-#define DM6X_WDDELAY   (1*CLK_TCK)
+#define DM9X_WDDELAY   (1*CLK_TCK)
 
 /* TX timeout = 1 minute */
 
@@ -273,7 +292,7 @@
 
 /* This is a helper pointer for accessing the contents of the Ethernet header */
 
-#define BUF ((struct eth_hdr_s *)dm9x->dm_dev.d_buf)
+#define BUF ((struct eth_hdr_s *)priv->dm_dev.d_buf)
 
 /****************************************************************************
  * Private Types
@@ -298,10 +317,12 @@ struct dm9x_driver_s
 {
   bool dm_bifup;               /* true:ifup false:ifdown */
   bool dm_b100M;               /* true:speed == 100M; false:speed == 10M */
-  WDOG_ID dm_txpoll;           /* TX poll timer */
-  WDOG_ID dm_txtimeout;        /* TX timeout timer */
   uint8_t dm_ntxpending;       /* Count of packets pending transmission */
   uint8_t ncrxpackets;         /* Number of continuous rx packets  */
+  WDOG_ID dm_txpoll;           /* TX poll timer */
+  WDOG_ID dm_txtimeout;        /* TX timeout timer */
+  struct work_s dm_irqwork;    /* For deferring interrupt work to the work queue */
+  struct work_s dm_pollwork;   /* For deferring poll work to the work queue */
 
   /* Mode-dependent function to move data in 8/16/32 I/O modes */
 
@@ -318,6 +339,10 @@ struct dm9x_driver_s
  * Private Data
  ****************************************************************************/
 
+/* A single packet buffer is used */
+
+static uint8_t g_pktbuf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
+
 /* At present, only a single DM90x0 device is supported. */
 
 static struct dm9x_driver_s g_dm9x[CONFIG_DM9X_NINTERFACES];
@@ -340,9 +365,9 @@ static void write8(const uint8_t *ptr, int len);
 static void write16(const uint8_t *ptr, int len);
 static void write32(const uint8_t *ptr, int len);
 
-/* static uint16_t dm9x_readsrom(struct dm9x_driver_s *dm9x, int offset); */
-static uint16_t dm9x_phyread(struct dm9x_driver_s *dm9x, int reg);
-static void dm9x_phywrite(struct dm9x_driver_s *dm9x, int reg, uint16_t value);
+/* static uint16_t dm9x_readsrom(struct dm9x_driver_s *priv, int offset); */
+static uint16_t dm9x_phyread(struct dm9x_driver_s *priv, int reg);
+static void dm9x_phywrite(struct dm9x_driver_s *priv, int reg, uint16_t value);
 
 #if defined(CONFIG_DM9X_CHECKSUM)
 static bool dm9x_rxchecksumready(uint8_t);
@@ -352,25 +377,33 @@ static bool dm9x_rxchecksumready(uint8_t);
 
 /* Common TX logic */
 
-static int  dm9x_transmit(struct dm9x_driver_s *dm9x);
+static int  dm9x_transmit(struct dm9x_driver_s *priv);
 static int  dm9x_txpoll(struct net_driver_s *dev);
 
 /* Interrupt handling */
 
-static void dm9x_receive(struct dm9x_driver_s *dm9x);
-static void dm9x_txdone(struct dm9x_driver_s *dm9x);
-static int  dm9x_interrupt(int irq, FAR void *context);
+static void dm9x_receive(struct dm9x_driver_s *priv);
+static void dm9x_txdone(struct dm9x_driver_s *priv);
+
+static void dm9x_interrupt_work(FAR void *arg);
+static int  dm9x_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
-static void dm9x_polltimer(int argc, uint32_t arg, ...);
-static void dm9x_txtimeout(int argc, uint32_t arg, ...);
+static void dm9x_txtimeout_work(FAR void *arg);
+static void dm9x_txtimeout_expiry(int argc, uint32_t arg, ...);
+
+static void dm9x_poll_work(FAR void *arg);
+static void dm9x_poll_expiry(int argc, uint32_t arg, ...);
 
 /* NuttX callback functions */
 
 static int dm9x_ifup(struct net_driver_s *dev);
 static int dm9x_ifdown(struct net_driver_s *dev);
+
+static void dm9x_txavail_work(FAR void *arg);
 static int dm9x_txavail(struct net_driver_s *dev);
+
 #ifdef CONFIG_NET_IGMP
 static int dm9x_addmac(struct net_driver_s *dev, FAR const uint8_t *mac);
 static int dm9x_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac);
@@ -378,8 +411,8 @@ static int dm9x_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac);
 
 /* Initialization functions */
 
-static void dm9x_bringup(struct dm9x_driver_s *dm9x);
-static void dm9x_reset(struct dm9x_driver_s *dm9x);
+static void dm9x_bringup(struct dm9x_driver_s *priv);
+static void dm9x_reset(struct dm9x_driver_s *priv);
 
 /****************************************************************************
  * Private Functions
@@ -433,7 +466,7 @@ static void putreg(int reg, uint8_t value)
 
 static void read8(FAR uint8_t *ptr, int len)
 {
-  nvdbg("Read %d bytes (8-bit mode)\n", len);
+  ninfo("Read %d bytes (8-bit mode)\n", len);
   for (; len > 0; len--)
     {
       *ptr++ = DM9X_DATA;
@@ -444,7 +477,7 @@ static void read16(FAR uint8_t *ptr, int len)
 {
   FAR uint16_t *ptr16 = (FAR uint16_t *)ptr;
 
-  nvdbg("Read %d bytes (16-bit mode)\n", len);
+  ninfo("Read %d bytes (16-bit mode)\n", len);
   for (; len > 0; len -= sizeof(uint16_t))
     {
       *ptr16++ = DM9X_DATA;
@@ -455,7 +488,7 @@ static void read32(FAR uint8_t *ptr, int len)
 {
   FAR uint32_t *ptr32 = (FAR uint32_t *)ptr;
 
-  nvdbg("Read %d bytes (32-bit mode)\n", len);
+  ninfo("Read %d bytes (32-bit mode)\n", len);
   for (; len > 0; len -= sizeof(uint32_t))
     {
       *ptr32++ = DM9X_DATA;
@@ -481,7 +514,7 @@ static void read32(FAR uint8_t *ptr, int len)
 
 static void discard8(int len)
 {
-  nvdbg("Discard %d bytes (8-bit mode)\n", len);
+  ninfo("Discard %d bytes (8-bit mode)\n", len);
   for (; len > 0; len--)
     {
       DM9X_DATA;
@@ -490,7 +523,7 @@ static void discard8(int len)
 
 static void discard16(int len)
 {
-  nvdbg("Discard %d bytes (16-bit mode)\n", len);
+  ninfo("Discard %d bytes (16-bit mode)\n", len);
   for (; len > 0; len -= sizeof(uint16_t))
     {
       DM9X_DATA;
@@ -499,7 +532,7 @@ static void discard16(int len)
 
 static void discard32(int len)
 {
-  nvdbg("Discard %d bytes (32-bit mode)\n", len);
+  ninfo("Discard %d bytes (32-bit mode)\n", len);
   for (; len > 0; len -= sizeof(uint32_t))
     {
       DM9X_DATA;
@@ -525,7 +558,7 @@ static void discard32(int len)
 
 static void write8(FAR const uint8_t *ptr, int len)
 {
-  nvdbg("Write %d bytes (8-bit mode)\n", len);
+  ninfo("Write %d bytes (8-bit mode)\n", len);
 
   for (; len > 0; len--)
     {
@@ -537,7 +570,7 @@ static void write16(const uint8_t *ptr, int len)
 {
   FAR uint16_t *ptr16 = (FAR uint16_t *)ptr;
 
-  nvdbg("Write %d bytes (16-bit mode)\n", len);
+  ninfo("Write %d bytes (16-bit mode)\n", len);
 
   for (; len > 0; len -= sizeof(uint16_t))
     {
@@ -549,7 +582,7 @@ static void write32(FAR const uint8_t *ptr, int len)
 {
   FAR uint32_t *ptr32 = (FAR uint32_t *)ptr;
 
-  nvdbg("Write %d bytes (32-bit mode)\n", len);
+  ninfo("Write %d bytes (32-bit mode)\n", len);
 
   for (; len > 0; len -= sizeof(uint32_t))
     {
@@ -564,7 +597,7 @@ static void write32(FAR const uint8_t *ptr, int len)
  *   Read a word from SROM
  *
  * Parameters:
- *   dm9x - Reference to the driver state structure
+ *   priv - Reference to the driver state structure
  *   offset - SROM offset to read from
  *
  * Returned Value:
@@ -575,7 +608,7 @@ static void write32(FAR const uint8_t *ptr, int len)
  ****************************************************************************/
 
 #if 0 /* Not used */
-static uint16_t dm9x_readsrom(struct dm9x_driver_s *dm9x, int offset)
+static uint16_t dm9x_readsrom(struct dm9x_driver_s *priv, int offset)
 {
   putreg(DM9X_EEPHYA, offset);
   putreg(DM9X_EEPHYC, DM9X_EEPHYC_ERPRR);
@@ -592,7 +625,7 @@ static uint16_t dm9x_readsrom(struct dm9x_driver_s *dm9x, int offset)
  *   Read/write data from/to the PHY
  *
  * Parameters:
- *   dm9x  - Reference to the driver state structure
+ *   priv  - Reference to the driver state structure
  *   reg   - PHY register offset
  *   value - The value to write to the PHY register (dm9x_write only)
  *
@@ -603,7 +636,7 @@ static uint16_t dm9x_readsrom(struct dm9x_driver_s *dm9x, int offset)
  *
  ****************************************************************************/
 
-static uint16_t dm9x_phyread(struct dm9x_driver_s *dm9x, int reg)
+static uint16_t dm9x_phyread(struct dm9x_driver_s *priv, int reg)
 {
   /* Setup DM9X_EEPHYA, the EEPROM/PHY address register */
 
@@ -620,7 +653,7 @@ static uint16_t dm9x_phyread(struct dm9x_driver_s *dm9x, int reg)
   return (((uint16_t)getreg(DM9X_EEPHYDH)) << 8) | (uint16_t)getreg(DM9X_EEPHYDL);
 }
 
-static void dm9x_phywrite(struct dm9x_driver_s *dm9x, int reg, uint16_t value)
+static void dm9x_phywrite(struct dm9x_driver_s *priv, int reg, uint16_t value)
 {
   /* Setup DM9X_EEPHYA, the EEPROM/PHY address register */
 
@@ -674,7 +707,7 @@ static inline bool dm9x_rxchecksumready(uint8_t rxbyte)
  *   handling or from watchdog based polling.
  *
  * Parameters:
- *   dm9x  - Reference to the driver state structure
+ *   priv  - Reference to the driver state structure
  *
  * Returned Value:
  *   OK on success; a negated errno on failure
@@ -683,17 +716,17 @@ static inline bool dm9x_rxchecksumready(uint8_t rxbyte)
  *
  ****************************************************************************/
 
-static int dm9x_transmit(struct dm9x_driver_s *dm9x)
+static int dm9x_transmit(struct dm9x_driver_s *priv)
 {
   /* Check if there is room in the DM90x0 to hold another packet.  In 100M mode,
    * that can be 2 packets, otherwise it is a single packet.
    */
 
-  if (dm9x->dm_ntxpending < 1 || (dm9x->dm_b100M && dm9x->dm_ntxpending < 2))
+  if (priv->dm_ntxpending < 1 || (priv->dm_b100M && priv->dm_ntxpending < 2))
     {
       /* Increment count of packets transmitted */
 
-      dm9x->dm_ntxpending++;
+      priv->dm_ntxpending++;
       NETDEV_TXPACKETS(&dm9x0->dm_dev);
 
       /* Disable all DM90x0 interrupts */
@@ -702,13 +735,13 @@ static int dm9x_transmit(struct dm9x_driver_s *dm9x)
 
       /* Set the TX length */
 
-      putreg(DM9X_TXPLL, (dm9x->dm_dev.d_len & 0xff));
-      putreg(DM9X_TXPLH, (dm9x->dm_dev.d_len >> 8) & 0xff);
+      putreg(DM9X_TXPLL, (priv->dm_dev.d_len & 0xff));
+      putreg(DM9X_TXPLH, (priv->dm_dev.d_len >> 8) & 0xff);
 
       /* Move the data to be sent into TX SRAM */
 
       DM9X_INDEX = DM9X_MWCMD;
-      dm9x->dm_write(dm9x->dm_dev.d_buf, dm9x->dm_dev.d_len);
+      priv->dm_write(priv->dm_dev.d_buf, priv->dm_dev.d_len);
 
 #if !defined(CONFIG_DM9X_ETRANS)
       /* Issue TX polling command */
@@ -718,7 +751,7 @@ static int dm9x_transmit(struct dm9x_driver_s *dm9x)
 
       /* Clear count of back-to-back RX packet transfers */
 
-      dm9x->ncrxpackets = 0;
+      priv->ncrxpackets = 0;
 
       /* Re-enable DM90x0 interrupts */
 
@@ -726,8 +759,8 @@ static int dm9x_transmit(struct dm9x_driver_s *dm9x)
 
       /* Setup the TX timeout watchdog (perhaps restarting the timer) */
 
-      (void)wd_start(dm9x->dm_txtimeout, DM6X_TXTIMEOUT, dm9x_txtimeout, 1,
-                     (wdparm_t)dm9x);
+      (void)wd_start(priv->dm_txtimeout, DM6X_TXTIMEOUT, dm9x_txtimeout_expiry, 1,
+                     (wdparm_t)priv);
       return OK;
     }
   return -EBUSY;
@@ -756,13 +789,13 @@ static int dm9x_transmit(struct dm9x_driver_s *dm9x)
 
 static int dm9x_txpoll(struct net_driver_s *dev)
 {
-  struct dm9x_driver_s *dm9x = (struct dm9x_driver_s *)dev->d_private;
+  struct dm9x_driver_s *priv = (struct dm9x_driver_s *)dev->d_private;
 
   /* If the polling resulted in data that should be sent out on the network,
    * the field d_len is set to a value > 0.
    */
 
-  if (dm9x->dm_dev.d_len > 0)
+  if (priv->dm_dev.d_len > 0)
     {
       /* Look up the destination MAC address and add it to the Ethernet
        * header.
@@ -770,10 +803,10 @@ static int dm9x_txpoll(struct net_driver_s *dev)
 
 #ifdef CONFIG_NET_IPv4
 #ifdef CONFIG_NET_IPv6
-      if (IFF_IS_IPv4(dm9x->dm_dev.d_flags))
+      if (IFF_IS_IPv4(priv->dm_dev.d_flags))
 #endif
         {
-          arp_out(&dm9x->dm_dev);
+          arp_out(&priv->dm_dev);
         }
 #endif /* CONFIG_NET_IPv4 */
 
@@ -782,19 +815,19 @@ static int dm9x_txpoll(struct net_driver_s *dev)
       else
 #endif
         {
-          neighbor_out(&dm9x->dm_dev);
+          neighbor_out(&priv->dm_dev);
         }
 #endif /* CONFIG_NET_IPv6 */
 
       /* Send the packet */
 
-      dm9x_transmit(dm9x);
+      dm9x_transmit(priv);
 
       /* Check if there is room in the DM90x0 to hold another packet.  In 100M mode,
        * that can be 2 packets, otherwise it is a single packet.
        */
 
-      if (dm9x->dm_ntxpending > 1 || !dm9x->dm_b100M)
+      if (priv->dm_ntxpending > 1 || !priv->dm_b100M)
         {
           /* Returning a non-zero value will terminate the poll operation */
 
@@ -816,7 +849,7 @@ static int dm9x_txpoll(struct net_driver_s *dev)
  *   An interrupt was received indicating the availability of a new RX packet
  *
  * Parameters:
- *   dm9x  - Reference to the driver state structure
+ *   priv  - Reference to the driver state structure
  *
  * Returned Value:
  *   None
@@ -825,13 +858,13 @@ static int dm9x_txpoll(struct net_driver_s *dev)
  *
  ****************************************************************************/
 
-static void dm9x_receive(FAR struct dm9x_driver_s *dm9x)
+static void dm9x_receive(FAR struct dm9x_driver_s *priv)
 {
   union rx_desc_u rx;
   bool bchecksumready;
   uint8_t rxbyte;
 
-  nvdbg("Packet received\n");
+  ninfo("Packet received\n");
 
   do
     {
@@ -857,7 +890,7 @@ static void dm9x_receive(FAR struct dm9x_driver_s *dm9x)
 
       /* Read packet status & length */
 
-      dm9x->dm_read((FAR uint8_t *)&rx, 4);
+      priv->dm_read((FAR uint8_t *)&rx, 4);
 
       /* Check if any errors were reported by the hardware */
 
@@ -865,36 +898,36 @@ static void dm9x_receive(FAR struct dm9x_driver_s *dm9x)
         {
           /* Bad RX packet... update statistics */
 
-          ndbg("Received packet with errors: %02x\n", rx.desc.rx_status);
-          NETDEV_RXERRORS(&dm9x->dm_dev);
+          nerr("ERROR: Received packet with errors: %02x\n", rx.desc.rx_status);
+          NETDEV_RXERRORS(&priv->dm_dev);
 
           /* Drop this packet and continue to check the next packet */
 
-          dm9x->dm_discard(rx.desc.rx_len);
+          priv->dm_discard(rx.desc.rx_len);
         }
 
       /* Also check if the packet is a valid size for the network configuration */
 
       else if (rx.desc.rx_len < ETH_HDRLEN || rx.desc.rx_len > (CONFIG_NET_ETH_MTU + 2))
         {
-          ndbg("RX length error\n");
-          NETDEV_RXERRORS(&dm9x->dm_dev);
+          nerr("ERROR: RX length error\n");
+          NETDEV_RXERRORS(&priv->dm_dev);
 
           /* Drop this packet and continue to check the next packet */
 
-          dm9x->dm_discard(rx.desc.rx_len);
+          priv->dm_discard(rx.desc.rx_len);
         }
       else
         {
           /* Good packet... Copy the packet data out of SRAM and pass it one to the network */
 
-          dm9x->dm_dev.d_len = rx.desc.rx_len;
-          dm9x->dm_read(dm9x->dm_dev.d_buf, rx.desc.rx_len);
+          priv->dm_dev.d_len = rx.desc.rx_len;
+          priv->dm_read(priv->dm_dev.d_buf, rx.desc.rx_len);
 
 #ifdef CONFIG_NET_PKT
           /* When packet sockets are enabled, feed the frame into the packet tap */
 
-          pkt_input(&dm9x->dm_dev);
+          pkt_input(&priv->dm_dev);
 #endif
 
           /* We only accept IP packets of the configured type and ARP packets */
@@ -902,40 +935,40 @@ static void dm9x_receive(FAR struct dm9x_driver_s *dm9x)
 #ifdef CONFIG_NET_IPv4
           if (BUF->type == HTONS(ETHTYPE_IP))
             {
-              nllvdbg("IPv4 frame\n");
+              ninfo("IPv4 frame\n");
               NETDEV_RXIPV4(&priv->dm_dev);
 
               /* Handle ARP on input then give the IPv4 packet to the network
                * layer
                */
 
-              arp_ipin(&dm9x->dm_dev);
-              ipv4_input(&dm9x->dm_dev);
+              arp_ipin(&priv->dm_dev);
+              ipv4_input(&priv->dm_dev);
 
               /* If the above function invocation resulted in data that should be
                * sent out on the network, the field  d_len will set to a value > 0.
                */
 
-              if (dm9x->dm_dev.d_len > 0)
+              if (priv->dm_dev.d_len > 0)
                 {
                   /* Update the Ethernet header with the correct MAC address */
 
 #ifdef CONFIG_NET_IPv6
-                  if (IFF_IS_IPv4(dm9x->dm_dev.d_flags))
+                  if (IFF_IS_IPv4(priv->dm_dev.d_flags))
 #endif
                     {
-                      arp_out(&dm9x->dm_dev);
+                      arp_out(&priv->dm_dev);
                     }
 #ifdef CONFIG_NET_IPv6
                   else
                     {
-                      neighbor_out(&dm9x->dm_dev);
+                      neighbor_out(&priv->dm_dev);
                     }
 #endif
 
                   /* And send the packet */
 
-                  dm9x_transmit(dm9x);
+                  dm9x_transmit(priv);
                 }
             }
           else
@@ -943,37 +976,37 @@ static void dm9x_receive(FAR struct dm9x_driver_s *dm9x)
 #ifdef CONFIG_NET_IPv6
           if (BUF->type == HTONS(ETHTYPE_IP6))
             {
-              nllvdbg("Iv6 frame\n");
+              ninfo("Iv6 frame\n");
               NETDEV_RXIPV6(&priv->dm_dev);
 
               /* Give the IPv6 packet to the network layer */
 
-              ipv6_input(&dm9x->dm_dev);
+              ipv6_input(&priv->dm_dev);
 
               /* If the above function invocation resulted in data that should be
                * sent out on the network, the field  d_len will set to a value > 0.
                */
 
-              if (dm9x->dm_dev.d_len > 0)
+              if (priv->dm_dev.d_len > 0)
                {
                   /* Update the Ethernet header with the correct MAC address */
 
 #ifdef CONFIG_NET_IPv4
-                  if (IFF_IS_IPv4(dm9x->dm_dev.d_flags))
+                  if (IFF_IS_IPv4(priv->dm_dev.d_flags))
                     {
-                      arp_out(&dm9x->dm_dev);
+                      arp_out(&priv->dm_dev);
                     }
                   else
 #endif
 #ifdef CONFIG_NET_IPv6
                     {
-                      neighbor_out(&dm9x->dm_dev);
+                      neighbor_out(&priv->dm_dev);
                     }
 #endif
 
                   /* And send the packet */
 
-                      dm9x_transmit(dm9x);
+                      dm9x_transmit(priv);
                 }
             }
           else
@@ -981,16 +1014,16 @@ static void dm9x_receive(FAR struct dm9x_driver_s *dm9x)
 #ifdef CONFIG_NET_ARP
           if (BUF->type == htons(ETHTYPE_ARP))
             {
-              arp_arpin(&dm9x->dm_dev);
+              arp_arpin(&priv->dm_dev);
               NETDEV_RXARP(&priv->dm_dev);
 
               /* If the above function invocation resulted in data that should be
                * sent out on the network, the field  d_len will set to a value > 0.
                */
 
-              if (dm9x->dm_dev.d_len > 0)
+              if (priv->dm_dev.d_len > 0)
                 {
-                  dm9x_transmit(dm9x);
+                  dm9x_transmit(priv);
                 }
             }
 #endif
@@ -1000,11 +1033,11 @@ static void dm9x_receive(FAR struct dm9x_driver_s *dm9x)
             }
         }
 
-      NETDEV_RXPACKETS(&dm9x->dm_dev);
-      dm9x->ncrxpackets++;
+      NETDEV_RXPACKETS(&priv->dm_dev);
+      priv->ncrxpackets++;
     }
-  while ((rxbyte & 0x01) == DM9X_PKTRDY && dm9x->ncrxpackets < DM9X_CRXTHRES);
-  nvdbg("All RX packets processed\n");
+  while ((rxbyte & 0x01) == DM9X_PKTRDY && priv->ncrxpackets < DM9X_CRXTHRES);
+  ninfo("All RX packets processed\n");
 }
 
 /****************************************************************************
@@ -1014,7 +1047,7 @@ static void dm9x_receive(FAR struct dm9x_driver_s *dm9x)
  *   An interrupt was received indicating that the last TX packet(s) is done
  *
  * Parameters:
- *   dm9x  - Reference to the driver state structure
+ *   priv  - Reference to the driver state structure
  *
  * Returned Value:
  *   None
@@ -1023,11 +1056,11 @@ static void dm9x_receive(FAR struct dm9x_driver_s *dm9x)
  *
  ****************************************************************************/
 
-static void dm9x_txdone(struct dm9x_driver_s *dm9x)
+static void dm9x_txdone(struct dm9x_driver_s *priv)
 {
   int  nsr;
 
-  nvdbg("TX done\n");
+  ninfo("TX done\n");
 
   /* Another packet has completed transmission.  Decrement the count of
    * of pending TX transmissions.
@@ -1036,68 +1069,68 @@ static void dm9x_txdone(struct dm9x_driver_s *dm9x)
   nsr = getreg(DM9X_NETS);
   if (nsr & DM9X_NETS_TX1END)
     {
-      if (dm9x->dm_ntxpending)
+      if (priv->dm_ntxpending)
         {
-          dm9x->dm_ntxpending--;
+          priv->dm_ntxpending--;
         }
       else
         {
-          ndbg("Bad TX count (TX1END)\n");
+          nerr("ERROR: Bad TX count (TX1END)\n");
         }
     }
 
   if (nsr & DM9X_NETS_TX2END)
     {
-      if (dm9x->dm_ntxpending)
+      if (priv->dm_ntxpending)
         {
-          dm9x->dm_ntxpending--;
+          priv->dm_ntxpending--;
         }
       else
         {
-          ndbg("Bad TX count (TX2END)\n");
+          nerr("ERROR: Bad TX count (TX2END)\n");
         }
     }
 
   /* Cancel the TX timeout */
 
-  if (dm9x->dm_ntxpending == 0)
+  if (priv->dm_ntxpending == 0)
     {
-      wd_cancel(dm9x->dm_txtimeout);
+      wd_cancel(priv->dm_txtimeout);
     }
 
   /* Then poll the network for new XMIT data */
 
-  (void)devif_poll(&dm9x->dm_dev, dm9x_txpoll);
+  (void)devif_poll(&priv->dm_dev, dm9x_txpoll);
 }
 
 /****************************************************************************
- * Function: dm9x_interrupt
+ * Function: dm9x_interrupt_work
  *
  * Description:
- *   DM90x0 interrupt handler
+ *   Perform interrupt related work from the worker thread
  *
  * Parameters:
- *   irq     - Number of the IRQ that generated the interrupt
- *   context - Interrupt register state save info (architecture-specific)
+ *   arg - The argument passed when work_queue() was called.
  *
  * Returned Value:
  *   OK on success
  *
  * Assumptions:
+ *   The network is locked.
  *
  ****************************************************************************/
 
-static int dm9x_interrupt(int irq, FAR void *context)
+static void dm9x_interrupt_work(FAR void *arg)
 {
-#if CONFIG_DM9X_NINTERFACES == 1
-  register struct dm9x_driver_s *dm9x = &g_dm9x[0];
-#else
-# error "Additional logic needed to support multiple interfaces"
-#endif
+  FAR struct dm9x_driver_s *priv = (FAR struct dm9x_driver_s *)arg;
   uint8_t isr;
   uint8_t save;
   int i;
 
+  /* Process pending Ethernet interrupts */
+
+  net_lock();
+
   /* Save previous register address */
 
   save = (uint8_t)DM9X_INDEX;
@@ -1110,7 +1143,7 @@ static int dm9x_interrupt(int irq, FAR void *context)
 
   isr = getreg(DM9X_ISR);
   putreg(DM9X_ISR, isr);
-  nvdbg("Interrupt status: %02x\n", isr);
+  ninfo("Interrupt status: %02x\n", isr);
 
   /* Check for link status change */
 
@@ -1120,8 +1153,8 @@ static int dm9x_interrupt(int irq, FAR void *context)
 
       for (i = 0; i < 500; i++)
         {
-          dm9x_phyread(dm9x, 0x1);
-          if (dm9x_phyread(dm9x, 0x1) & 0x4) /* Link OK */
+          dm9x_phyread(priv, 0x1);
+          if (dm9x_phyread(priv, 0x1) & 0x4) /* Link OK */
             {
               /* Wait to get detected speed */
 
@@ -1132,40 +1165,41 @@ static int dm9x_interrupt(int irq, FAR void *context)
 
               /* Set the new network speed */
 
-              if (dm9x_phyread(dm9x, 0) & 0x2000)
+              if (dm9x_phyread(priv, 0) & 0x2000)
                 {
-                  dm9x->dm_b100M = true;
+                  priv->dm_b100M = true;
                 }
               else
                 {
-                  dm9x->dm_b100M = false;
+                  priv->dm_b100M = false;
                 }
               break;
             }
           up_mdelay(1);
         }
-      ndbg("delay: %dmS speed: %s\n", i, dm9x->dm_b100M ? "100M" : "10M");
+
+      nerr("ERROR: delay: %dmS speed: %s\n", i, priv->dm_b100M ? "100M" : "10M");
     }
 
   /* Check if we received an incoming packet */
 
   if (isr & DM9X_INT_PR)
     {
-      dm9x_receive(dm9x);
+      dm9x_receive(priv);
     }
 
   /* Check if we are able to transmit a packet */
 
   if (isr & DM9X_INT_PT)
     {
-      dm9x_txdone(dm9x);
+      dm9x_txdone(priv);
     }
 
   /* If the number of consecutive receive packets exceeds a threshold,
    * then disable the RX interrupt.
    */
 
-  if (dm9x->ncrxpackets >= DM9X_CRXTHRES)
+  if (priv->ncrxpackets >= DM9X_CRXTHRES)
     {
       /* Eanble all DM90x0 interrupts EXCEPT for RX */
 
@@ -1181,57 +1215,115 @@ static int dm9x_interrupt(int irq, FAR void *context)
   /* Restore previous register address */
 
   DM9X_INDEX = save;
+  net_unlock();
+
+  /* Re-enable Ethernet interrupts */
+
+  up_enable_irq(CONFIG_DM9X_IRQ);
+}
+
+/****************************************************************************
+ * Function: dm9x_interrupt
+ *
+ * Description:
+ *   Hardware interrupt handler
+ *
+ * Parameters:
+ *   irq     - Number of the IRQ that generated the interrupt
+ *   context - Interrupt register state save info (architecture-specific)
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *
+ ****************************************************************************/
+
+static int dm9x_interrupt(int irq, FAR void *context, FAR void *arg)
+{
+#if CONFIG_DM9X_NINTERFACES == 1
+  FAR struct dm9x_driver_s *priv = &g_dm9x[0];
+#else
+# error "Additional logic needed to support multiple interfaces"
+#endif
+  uint8_t isr;
+
+  /* Disable further Ethernet interrupts.  Because Ethernet interrupts are
+   * also disabled if the TX timeout event occurs, there can be no race
+   * condition here.
+   */
+
+  up_disable_irq(CONFIG_DM9X_IRQ);
+
+  /* Determine if a TX transfer just completed */
+
+  isr = getreg(DM9X_ISR);
+  if ((isr & DM9X_INT_PT) != 0)
+    {
+      /* If a TX transfer just completed, then cancel the TX timeout so
+       * there will be no race condition between any subsequent timeout
+       * expiration and the deferred interrupt processing.
+       */
+
+       wd_cancel(priv->dm_txtimeout);
+    }
+
+  /* Schedule to perform the interrupt processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->dm_irqwork, dm9x_interrupt_work, priv, 0);
   return OK;
 }
 
 /****************************************************************************
- * Function: dm9x_txtimeout
+ * Function: dm9x_txtimeout_work
  *
  * Description:
- *   Our TX watchdog timed out.  Called from the timer interrupt handler.
- *   The last TX never completed.  Reset the DM90x0 and start again.
+ *   Perform TX timeout related work from the worker thread
  *
  * Parameters:
- *   argc - The number of available arguments
- *   arg  - The first argument
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
+ *   The network is locked.
  *
  ****************************************************************************/
 
-static void dm9x_txtimeout(int argc, uint32_t arg, ...)
+static void dm9x_txtimeout_work(FAR void *arg)
 {
-  struct dm9x_driver_s *dm9x = (struct dm9x_driver_s *)arg;
+  FAR struct dm9x_driver_s *priv = (FAR struct dm9x_driver_s *)arg;
 
-  ndbg("TX timeout\n");
+  nerr("ERROR: TX timeout\n");
 
   /* Increment statistics and dump debug info */
 
-  NETDEV_TXTIMEOUTS(dm9x->dm_dev);
+  net_lock();
+  NETDEV_TXTIMEOUTS(priv->dm_dev);
 
-  ndbg("  TX packet count:           %d\n", dm9x->dm_ntxpending);
-  ndbg("  TX read pointer address:   0x%02x:%02x\n",
-       getreg(DM9X_TRPAH), getreg(DM9X_TRPAL));
-  ndbg("  Memory data write address: 0x%02x:%02x (DM9010)\n",
-       getreg(DM9X_MDWAH), getreg(DM9X_MDWAL));
+  ninfo("  TX packet count:           %d\n", priv->dm_ntxpending);
+  ninfo("  TX read pointer address:   0x%02x:%02x\n",
+        getreg(DM9X_TRPAH), getreg(DM9X_TRPAL));
+  ninfo("  Memory data write address: 0x%02x:%02x (DM9010)\n",
+        getreg(DM9X_MDWAH), getreg(DM9X_MDWAL));
 
   /* Then reset the DM90x0 */
 
-  dm9x_reset(dm9x);
+  dm9x_reset(priv);
 
   /* Then poll the network for new XMIT data */
 
-  (void)devif_poll(&dm9x->dm_dev, dm9x_txpoll);
+  (void)devif_poll(&priv->dm_dev, dm9x_txpoll);
+  net_unlock();
 }
 
 /****************************************************************************
- * Function: dm9x_polltimer
+ * Function: dm9x_txtimeout_expiry
  *
  * Description:
- *   Periodic timer handler.  Called from the timer interrupt handler.
+ *   Our TX watchdog timed out.  Called from the timer interrupt handler.
+ *   The last TX never completed.  Reset the hardware and start again.
  *
  * Parameters:
  *   argc - The number of available arguments
@@ -1241,20 +1333,58 @@ static void dm9x_txtimeout(int argc, uint32_t arg, ...)
  *   None
  *
  * Assumptions:
+ *   Global interrupts are disabled by the watchdog logic.
  *
  ****************************************************************************/
 
-static void dm9x_polltimer(int argc, uint32_t arg, ...)
+static void dm9x_txtimeout_expiry(int argc, wdparm_t arg, ...)
 {
-  struct dm9x_driver_s *dm9x = (struct dm9x_driver_s *)arg;
+  FAR struct dm9x_driver_s *priv = (FAR struct dm9x_driver_s *)arg;
+
+  /* Disable further Ethernet interrupts.  This will prevent some race
+   * conditions with interrupt work.  There is still a potential race
+   * condition with interrupt work that is already queued and in progress.
+   */
+
+  up_disable_irq(CONFIG_DM9X_IRQ);
+
+  /* Schedule to perform the TX timeout processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->dm_irqwork, dm9x_txtimeout_work, priv, 0);
+}
+
+/****************************************************************************
+ * Function: dm9x_poll_work
+ *
+ * Description:
+ *   Perform periodic polling from the worker thread
+ *
+ * Parameters:
+ *   arg - The argument passed when work_queue() as called.
+ *
+ * Returned Value:
+ *   OK on success
+ *
+ * Assumptions:
+ *   The network is locked.
+ *
+ ****************************************************************************/
+
+static void dm9x_poll_work(FAR void *arg)
+{
+  FAR struct dm9x_driver_s *priv = (FAR struct dm9x_driver_s *)arg;
+
+  /* Perform the poll */
+
+  net_lock();
 
   /* If the number of contiguous RX packets exceeds a threshold, reset the counter and
    * re-enable RX interrupts
    */
 
-  if (dm9x->ncrxpackets >= DM9X_CRXTHRES)
+  if (priv->ncrxpackets >= DM9X_CRXTHRES)
     {
-      dm9x->ncrxpackets = 0;
+      priv->ncrxpackets = 0;
       putreg(DM9X_IMR, DM9X_IMRENABLE);
     }
 
@@ -1262,17 +1392,45 @@ static void dm9x_polltimer(int argc, uint32_t arg, ...)
    * that can be 2 packets, otherwise it is a single packet.
    */
 
-  if (dm9x->dm_ntxpending < 1 || (dm9x->dm_b100M && dm9x->dm_ntxpending < 2))
+  if (priv->dm_ntxpending < 1 || (priv->dm_b100M && priv->dm_ntxpending < 2))
     {
       /* If so, update TCP timing states and poll the network for new XMIT data */
 
-      (void)devif_timer(&dm9x->dm_dev, dm9x_txpoll);
+      (void)devif_timer(&priv->dm_dev, dm9x_txpoll);
     }
 
   /* Setup the watchdog poll timer again */
 
-  (void)wd_start(dm9x->dm_txpoll, DM6X_WDDELAY, dm9x_polltimer, 1,
-                 (wdparm_t)arg);
+  (void)wd_start(priv->dm_txpoll, DM9X_WDDELAY, dm9x_poll_expiry, 1,
+                 (wdparm_t)priv);
+  net_unlock();
+}
+
+/****************************************************************************
+ * Function: dm9x_poll_expiry
+ *
+ * Description:
+ *   Periodic timer handler.  Called from the timer interrupt handler.
+ *
+ * Parameters:
+ *   argc - The number of available arguments
+ *   arg  - The first argument
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Global interrupts are disabled by the watchdog logic.
+ *
+ ****************************************************************************/
+
+static void dm9x_poll_expiry(int argc, wdparm_t arg, ...)
+{
+  FAR struct dm9x_driver_s *priv = (FAR struct dm9x_driver_s *)arg;
+
+  /* Schedule to perform the interrupt processing on the worker thread. */
+
+  work_queue(ETHWORK, &priv->dm_pollwork, dm9x_poll_work, priv, 0);
 }
 
 /****************************************************************************
@@ -1282,7 +1440,7 @@ static void dm9x_polltimer(int argc, uint32_t arg, ...)
  *   Configure the PHY operating mode
  *
  * Parameters:
- *   dm9x  - Reference to the driver state structure
+ *   priv  - Reference to the driver state structure
  *
  * Returned Value:
  *   None
@@ -1291,7 +1449,7 @@ static void dm9x_polltimer(int argc, uint32_t arg, ...)
  *
  ****************************************************************************/
 
-static inline void dm9x_phymode(struct dm9x_driver_s *dm9x)
+static inline void dm9x_phymode(struct dm9x_driver_s *priv)
 {
   uint16_t phyreg0;
   uint16_t phyreg4;
@@ -1315,8 +1473,8 @@ static inline void dm9x_phymode(struct dm9x_driver_s *dm9x)
 # error "Recognized PHY mode"
 #endif
 
-  dm9x_phywrite(dm9x, 0, phyreg0);
-  dm9x_phywrite(dm9x, 4, phyreg4);
+  dm9x_phywrite(priv, 0, phyreg0);
+  dm9x_phywrite(priv, 4, phyreg4);
 }
 
 /****************************************************************************
@@ -1338,21 +1496,21 @@ static inline void dm9x_phymode(struct dm9x_driver_s *dm9x)
 
 static int dm9x_ifup(struct net_driver_s *dev)
 {
-  struct dm9x_driver_s *dm9x = (struct dm9x_driver_s *)dev->d_private;
+  struct dm9x_driver_s *priv = (struct dm9x_driver_s *)dev->d_private;
   uint8_t netstatus;
   int i;
 
-  ndbg("Bringing up: %d.%d.%d.%d\n",
-       dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-       (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 
   /* Initilize DM90x0 chip */
 
-  dm9x_bringup(dm9x);
+  dm9x_bringup(priv);
 
   /* Check link state and media speed (waiting up to 3s for link OK) */
 
-  dm9x->dm_b100M = false;
+  priv->dm_b100M = false;
   for (i = 0; i < 3000; i++)
     {
       netstatus = getreg(DM9X_NETS);
@@ -1364,7 +1522,7 @@ static int dm9x_ifup(struct net_driver_s *dev)
           netstatus = getreg(DM9X_NETS);
           if ((netstatus & DM9X_NETS_SPEED) == 0)
             {
-              dm9x->dm_b100M = true;
+              priv->dm_b100M = true;
             }
           break;
         }
@@ -1372,16 +1530,16 @@ static int dm9x_ifup(struct net_driver_s *dev)
       up_mdelay(1);
     }
 
-  ndbg("delay: %dmS speed: %s\n", i, dm9x->dm_b100M ? "100M" : "10M");
+  ninfo("delay: %dmS speed: %s\n", i, priv->dm_b100M ? "100M" : "10M");
 
   /* Set and activate a timer process */
 
-  (void)wd_start(dm9x->dm_txpoll, DM6X_WDDELAY, dm9x_polltimer, 1,
-                 (wdparm_t)dm9x);
+  (void)wd_start(priv->dm_txpoll, DM9X_WDDELAY, dm9x_poll_expiry, 1,
+                 (wdparm_t)priv);
 
   /* Enable the DM9X interrupt */
 
-  dm9x->dm_bifup = true;
+  priv->dm_bifup = true;
   up_enable_irq(CONFIG_DM9X_IRQ);
   return OK;
 }
@@ -1404,10 +1562,10 @@ static int dm9x_ifup(struct net_driver_s *dev)
 
 static int dm9x_ifdown(struct net_driver_s *dev)
 {
-  struct dm9x_driver_s *dm9x = (struct dm9x_driver_s *)dev->d_private;
+  struct dm9x_driver_s *priv = (struct dm9x_driver_s *)dev->d_private;
   irqstate_t flags;
 
-  ndbg("Stopping\n");
+  ninfo("Stopping\n");
 
   /* Disable the DM9X interrupt */
 
@@ -1416,66 +1574,101 @@ static int dm9x_ifdown(struct net_driver_s *dev)
 
   /* Cancel the TX poll timer and TX timeout timers */
 
-  wd_cancel(dm9x->dm_txpoll);
-  wd_cancel(dm9x->dm_txtimeout);
+  wd_cancel(priv->dm_txpoll);
+  wd_cancel(priv->dm_txtimeout);
 
   /* Reset the device */
 
-  dm9x_phywrite(dm9x, 0x00, 0x8000);  /* PHY reset */
+  dm9x_phywrite(priv, 0x00, 0x8000);  /* PHY reset */
   putreg(DM9X_GPD, 0x01);             /* Power-down PHY (GEPIO0=1) */
   putreg(DM9X_IMR, DM9X_IMRDISABLE);  /* Disable all interrupts */
   putreg(DM9X_RXC, 0x00);             /* Disable RX */
   putreg(DM9X_ISR, DM9X_INT_ALL);     /* Clear interrupt status */
 
-  dm9x->dm_bifup = false;
+  priv->dm_bifup = false;
   leave_critical_section(flags);
   return OK;
 }
 
 /****************************************************************************
- * Function: dm9x_txavail
+ * Function: dm9x_txavail_work
  *
  * Description:
- *   Driver callback invoked when new TX data is available.  This is a
- *   stimulus perform an out-of-cycle poll and, thereby, reduce the TX
- *   latency.
+ *   Perform an out-of-cycle poll on the worker thread.
  *
  * Parameters:
- *   dev  - Reference to the NuttX driver state structure
+ *   arg - Reference to the NuttX driver state structure (cast to void*)
  *
  * Returned Value:
  *   None
  *
  * Assumptions:
- *   Called in normal user mode
+ *   Called on the higher priority worker thread.
  *
  ****************************************************************************/
 
-static int dm9x_txavail(struct net_driver_s *dev)
+static void dm9x_txavail_work(FAR void *arg)
 {
-  struct dm9x_driver_s *dm9x = (struct dm9x_driver_s *)dev->d_private;
-  irqstate_t flags;
+  FAR struct dm9x_driver_s *priv = (FAR struct dm9x_driver_s *)arg;
 
-  ndbg("Polling\n");
-  flags = enter_critical_section();
+  ninfo("Polling\n");
 
   /* Ignore the notification if the interface is not yet up */
 
-  if (dm9x->dm_bifup)
+  net_lock();
+  if (priv->dm_bifup)
     {
 
       /* Check if there is room in the DM90x0 to hold another packet.  In 100M
        * mode, that can be 2 packets, otherwise it is a single packet.
        */
 
-      if (dm9x->dm_ntxpending < 1 || (dm9x->dm_b100M && dm9x->dm_ntxpending < 2))
+      if (priv->dm_ntxpending < 1 || (priv->dm_b100M && priv->dm_ntxpending < 2))
         {
           /* If so, then poll the network for new XMIT data */
 
-          (void)devif_poll(&dm9x->dm_dev, dm9x_txpoll);
+          (void)devif_poll(&priv->dm_dev, dm9x_txpoll);
         }
     }
-  leave_critical_section(flags);
+
+  net_unlock();
+}
+
+/****************************************************************************
+ * Function: dm9x_txavail
+ *
+ * Description:
+ *   Driver callback invoked when new TX data is available.  This is a
+ *   stimulus perform an out-of-cycle poll and, thereby, reduce the TX
+ *   latency.
+ *
+ * Parameters:
+ *   dev - Reference to the NuttX driver state structure
+ *
+ * Returned Value:
+ *   None
+ *
+ * Assumptions:
+ *   Called in normal user mode
+ *
+ ****************************************************************************/
+
+static int dm9x_txavail(FAR struct net_driver_s *dev)
+{
+  FAR struct dm9x_driver_s *priv = (FAR struct dm9x_driver_s *)dev->d_private;
+
+  /* Is our single work structure available?  It may not be if there are
+   * pending interrupt actions and we will have to ignore the Tx
+   * availability action.
+   */
+
+  if (work_available(&priv->dm_pollwork))
+    {
+      /* Schedule to serialize the poll on the worker thread. */
+
+      work_queue(ETHWORK, &priv->dm_pollwork, dm9x_txavail_work, priv, 0);
+    }
+
   return OK;
 }
 
@@ -1546,7 +1739,7 @@ static int dm9x_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac)
  *   Initialize the dm90x0 chip
  *
  * Parameters:
- *   dm9x  - Reference to the driver state structure
+ *   priv  - Reference to the driver state structure
  *
  * Returned Value:
  *   None
@@ -1555,9 +1748,9 @@ static int dm9x_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac)
  *
  ****************************************************************************/
 
-static void dm9x_bringup(struct dm9x_driver_s *dm9x)
+static void dm9x_bringup(struct dm9x_driver_s *priv)
 {
-  ndbg("Initializing\n");
+  ninfo("Initializing\n");
 
   /* Set the internal PHY power-on, GPIOs normal, and wait 2ms */
 
@@ -1580,21 +1773,21 @@ static void dm9x_bringup(struct dm9x_driver_s *dm9x)
   switch (getreg(DM9X_ISR) & DM9X_ISR_IOMODEM)
     {
       case DM9X_ISR_IOMODE8:
-        dm9x->dm_read    = read8;
-        dm9x->dm_write   = write8;
-        dm9x->dm_discard = discard8;
+        priv->dm_read    = read8;
+        priv->dm_write   = write8;
+        priv->dm_discard = discard8;
         break;
 
       case DM9X_ISR_IOMODE16:
-        dm9x->dm_read    = read16;
-        dm9x->dm_write   = write16;
-        dm9x->dm_discard = discard16;
+        priv->dm_read    = read16;
+        priv->dm_write   = write16;
+        priv->dm_discard = discard16;
         break;
 
       case DM9X_ISR_IOMODE32:
-        dm9x->dm_read    = read32;
-        dm9x->dm_write   = write32;
-        dm9x->dm_discard = discard32;
+        priv->dm_read    = read32;
+        priv->dm_write   = write32;
+        priv->dm_discard = discard32;
         break;
 
       default:
@@ -1603,7 +1796,7 @@ static void dm9x_bringup(struct dm9x_driver_s *dm9x)
 
   /* Program PHY operating mode */
 
-  dm9x_phymode(dm9x);
+  dm9x_phymode(priv);
 
   /* Program operating mode */
 
@@ -1625,9 +1818,9 @@ static void dm9x_bringup(struct dm9x_driver_s *dm9x)
 
   /* Initialize statistics */
 
-  dm9x->ncrxpackets   = 0; /* Number of continuous RX packets  */
-  dm9x->dm_ntxpending = 0; /* Number of pending TX packets */
-  NETDEV_RESET_STATISTICS(&dm9x->dm_dev);
+  priv->ncrxpackets   = 0; /* Number of continuous RX packets  */
+  priv->dm_ntxpending = 0; /* Number of pending TX packets */
+  NETDEV_RESET_STATISTICS(&priv->dm_dev);
 
   /* Activate DM9000A/DM9010 */
 
@@ -1643,7 +1836,7 @@ static void dm9x_bringup(struct dm9x_driver_s *dm9x)
  *   present, the chip is only reset after a TX timeout.
  *
  * Parameters:
- *   dm9x  - Reference to the driver state structure
+ *   priv  - Reference to the driver state structure
  *
  * Returned Value:
  *   None
@@ -1652,31 +1845,31 @@ static void dm9x_bringup(struct dm9x_driver_s *dm9x)
  *
  ****************************************************************************/
 
-static void dm9x_reset(struct dm9x_driver_s *dm9x)
+static void dm9x_reset(struct dm9x_driver_s *priv)
 {
   uint8_t save;
   int i;
 
   /* Cancel the TX poll timer and TX timeout timers */
 
-  wd_cancel(dm9x->dm_txpoll);
-  wd_cancel(dm9x->dm_txtimeout);
+  wd_cancel(priv->dm_txpoll);
+  wd_cancel(priv->dm_txtimeout);
 
   /* Save previous register address */
 
   save = (uint8_t)DM9X_INDEX;
-  dm9x_bringup(dm9x);
+  dm9x_bringup(priv);
 
   /* Wait up to 1 second for the link to be OK */
 
-  dm9x->dm_b100M = false;
+  priv->dm_b100M = false;
   for (i = 0; i < 1000; i++)
     {
-      if (dm9x_phyread(dm9x, 0x1) & 0x4)
+      if (dm9x_phyread(priv, 0x1) & 0x4)
         {
-          if (dm9x_phyread(dm9x, 0) &0x2000)
+          if (dm9x_phyread(priv, 0) &0x2000)
             {
-              dm9x->dm_b100M = true;
+              priv->dm_b100M = true;
             }
           break;
         }
@@ -1722,29 +1915,30 @@ int dm9x_initialize(void)
 
   vid = (((uint16_t)getreg(DM9X_VIDH)) << 8) | (uint16_t)getreg(DM9X_VIDL);
   pid = (((uint16_t)getreg(DM9X_PIDH)) << 8) | (uint16_t)getreg(DM9X_PIDL);
-  nlldbg("I/O base: %08x VID: %04x PID: %04x\n", CONFIG_DM9X_BASE, vid, pid);
+  ninfo("I/O base: %08x VID: %04x PID: %04x\n", CONFIG_DM9X_BASE, vid, pid);
 
   /* Check if a DM90x0 chip is recognized at this I/O base */
 
   if (vid != DM9X_DAVICOMVID || (pid != DM9X_DM9000PID && pid != DM9X_DM9010PID))
     {
-      nlldbg("DM90x0 vendor/product ID not found at this base address\n");
+      nerr("ERROR: DM90x0 vendor/product ID not found at this base address\n");
       return -ENODEV;
     }
 
   /* Attach the IRQ to the driver */
 
-  if (irq_attach(CONFIG_DM9X_IRQ, dm9x_interrupt))
+  if (irq_attach(CONFIG_DM9X_IRQ, dm9x_interrupt, NULL))
     {
       /* We could not attach the ISR to the ISR */
 
-      nlldbg("irq_attach() failed\n");
+      nerr("ERROR: irq_attach() failed\n");
       return -EAGAIN;
     }
 
   /* Initialize the driver structure */
 
   memset(g_dm9x, 0, CONFIG_DM9X_NINTERFACES*sizeof(struct dm9x_driver_s));
+  g_dm9x[0].dm_dev.d_buf     = g_pktbuf;      /* Single packet buffer */
   g_dm9x[0].dm_dev.d_ifup    = dm9x_ifup;     /* I/F down callback */
   g_dm9x[0].dm_dev.d_ifdown  = dm9x_ifdown;   /* I/F up (new IP address) callback */
   g_dm9x[0].dm_dev.d_txavail = dm9x_txavail;  /* New TX data callback */
@@ -1767,8 +1961,8 @@ int dm9x_initialize(void)
       mptr[i] = getreg(j);
     }
 
-  nlldbg("MAC: %0x:%0x:%0x:%0x:%0x:%0x\n",
-         mptr[0], mptr[1], mptr[2], mptr[3], mptr[4], mptr[5]);
+  ninfo("MAC: %0x:%0x:%0x:%0x:%0x:%0x\n",
+       mptr[0], mptr[1], mptr[2], mptr[3], mptr[4], mptr[5]);
 
   /* Register the device with the OS so that socket IOCTLs can be performed */
 
diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
deleted file mode 100644
index e7f3e2385c8b8190399784de3a982a678458066b..0000000000000000000000000000000000000000
--- a/drivers/net/e1000.c
+++ /dev/null
@@ -1,1275 +0,0 @@
-/****************************************************************************
- * drivers/net/e1000.c
- *
- *   Copyright (C) 2011 Yu Qiang. All rights reserved.
- *   Author: Yu Qiang 
- *
- * This file is a part of NuttX:
- *
- *   Copyright (C) 2011, 2014 Gregory Nutt. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#ifdef CONFIG_NET_PKT
-#  include 
-#endif
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include "e1000.h"
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* TX poll deley = 1 seconds. CLK_TCK is the number of clock ticks per second */
-
-#define E1000_WDDELAY   (1*CLK_TCK)
-
-/* TX timeout = 1 minute */
-
-#define E1000_TXTIMEOUT (60*CLK_TCK)
-
-/* This is a helper pointer for accessing the contents of the Ethernet header */
-
-#define BUF ((struct eth_hdr_s *)e1000->netdev.d_buf)
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-struct tx_ring
-{
-  struct tx_desc *desc;
-  char *buf;
-  int tail;      /* where to write desc */
-};
-
-struct rx_ring
-{
-  struct rx_desc *desc;
-  char *buf;
-  int head;      /* where to read */
-  int tail;      /* where to release free desc */
-  int free;      /* number of freed desc */
-};
-
-struct e1000_dev
-{
-  uint32_t phy_mem_base;
-  uint32_t io_mem_base;
-  uint32_t mem_size;
-  int pci_dev_id;
-  uint16_t pci_addr;
-  unsigned char src_mac[6];
-  unsigned char dst_mac[6];
-  struct irq_action int_desc;
-  struct tx_ring tx_ring;
-  struct rx_ring rx_ring;
-  struct e1000_dev *next;
-
-  /* NuttX net data */
-
-  bool bifup;                 /* true:ifup false:ifdown */
-  WDOG_ID txpoll;             /* TX poll timer */
-  WDOG_ID txtimeout;          /* TX timeout timer */
-
-  /* This holds the information visible to the NuttX network */
-
-  struct net_driver_s netdev; /* Interface understood by networking layer */
-};
-
-struct e1000_dev_head
-{
-  struct e1000_dev *next;
-};
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-static struct e1000_dev_head e1000_list =
-{
-  0
-};
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/* Common TX logic */
-
-static int  e1000_transmit(struct e1000_dev *e1000);
-static int  e1000_txpoll(struct net_driver_s *dev);
-
-/* Interrupt handling */
-
-static void e1000_receive(struct e1000_dev *e1000);
-
-/* Watchdog timer expirations */
-
-static void e1000_polltimer(int argc, uint32_t arg, ...);
-static void e1000_txtimeout(int argc, uint32_t arg, ...);
-
-/* NuttX callback functions */
-
-static int e1000_ifup(struct net_driver_s *dev);
-static int e1000_ifdown(struct net_driver_s *dev);
-static int e1000_txavail(struct net_driver_s *dev);
-#ifdef CONFIG_NET_IGMP
-static int e1000_addmac(struct net_driver_s *dev, const uint8_t *mac);
-static int e1000_rmmac(struct net_driver_s *dev, const uint8_t *mac);
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
-static inline void e1000_outl(struct e1000_dev *dev, int reg, uint32_t val)
-{
-  writel(dev->io_mem_base+reg, val);
-}
-
-static inline uint32_t e1000_inl(struct e1000_dev *dev, int reg)
-{
-  return readl(dev->io_mem_base+reg);
-}
-
-/****************************** e1000 driver ********************************/
-
-void e1000_reset(struct e1000_dev *dev)
-{
-  uint32_t dev_control;
-
-  /* Reset the network controller hardware */
-
-  dev_control = 0;
-  dev_control |= (1 << 0);   /* FD-bit (Full Duplex) */
-  dev_control |= (0 << 2);   /* GIOMD-bit (GIO Master Disable) */
-  dev_control |= (1 << 3);   /* LRST-bit (Link Reset) */
-  dev_control |= (1 << 6);   /* SLU-bit (Set Link Up) */
-  dev_control |= (2 << 8);   /* SPEED=2 (1000Mbps) */
-  dev_control |= (0 << 11);  /* FRCSPD-bit (Force Speed) */
-  dev_control |= (0 << 12);  /* FRCDPLX-bit (Force Duplex) */
-  dev_control |= (0 << 20);  /* ADVD3WUC-bit (Advertise D3 Wake Up Cap) */
-  dev_control |= (1 << 26);  /* RST-bit (Device Reset) */
-  dev_control |= (1 << 27);  /* RFCE-bit (Receive Flow Control Enable) */
-  dev_control |= (1 << 28);  /* TFCE-bit (Transmit Flow Control Enable) */
-  dev_control |= (0 << 30);  /* VME-bit (VLAN Mode Enable) */
-  dev_control |= (0 << 31);  /* PHY_RST-bit (PHY Reset) */
-
-  e1000_outl(dev, E1000_IMC, 0xFFFFFFFF);
-  e1000_outl(dev, E1000_STATUS, 0x00000000);
-  e1000_outl(dev, E1000_CTRL, dev_control);
-  dev_control &= ~(1 << 26);  /* clear RST-bit (Device Reset) */
-  e1000_outl(dev, E1000_CTRL, dev_control);
-  up_mdelay(10);
-  e1000_outl(dev, E1000_CTRL_EXT, 0x001401C0);
-  e1000_outl(dev, E1000_IMC, 0xFFFFFFFF);
-}
-
-void e1000_turn_on(struct e1000_dev *dev)
-{
-  int tx_control;
-  int rx_control;
-  uint32_t ims = 0;
-
-  /* turn on the controller's receive engine */
-
-  rx_control = e1000_inl(dev, E1000_RCTL);
-  rx_control |= (1 << 1);
-  e1000_outl(dev, E1000_RCTL, rx_control);
-
-  /* turn on the controller's transmit engine */
-
-  tx_control = e1000_inl(dev, E1000_TCTL);
-  tx_control |= (1 << 1);
-  e1000_outl(dev, E1000_TCTL, tx_control);
-
-  /* enable the controller's interrupts */
-
-  e1000_outl(dev, E1000_ICR, 0xFFFFFFFF);
-  e1000_outl(dev, E1000_IMC, 0xFFFFFFFF);
-
-  ims |= 1 << 0;      /* TXDW */
-  ims |= 1 << 1;      /* TXQE */
-  ims |= 1 << 2;      /* LSC */
-  ims |= 1 << 4;      /* RXDMT0 */
-  ims |= 1 << 7;      /* RXT0 */
-  e1000_outl(dev, E1000_IMS, ims);
-}
-
-void e1000_turn_off(struct e1000_dev *dev)
-{
-  int tx_control;
-  int rx_control;
-
-  /* turn off the controller's receive engine */
-
-  rx_control = e1000_inl(dev, E1000_RCTL);
-  rx_control &= ~(1 << 1);
-  e1000_outl(dev, E1000_RCTL, rx_control);
-
-  /* turn off the controller's transmit engine */
-
-  tx_control = e1000_inl(dev, E1000_TCTL);
-  tx_control &= ~(1 << 1);
-  e1000_outl(dev, E1000_TCTL, tx_control);
-
-  /* turn off the controller's interrupts */
-
-  e1000_outl(dev, E1000_IMC, 0xFFFFFFFF);
-}
-
-void e1000_init(struct e1000_dev *dev)
-{
-  uint32_t rxd_phys;
-  uint32_t txd_phys;
-  uint32_t kmem_phys;
-  uint32_t rx_control;
-  uint32_t tx_control;
-  uint32_t pba;
-  int i;
-
-  e1000_reset(dev);
-
-  /* configure the controller's 'receive' engine */
-
-  rx_control = 0;
-  rx_control |= (0 << 1);   /* EN-bit (Enable) */
-  rx_control |= (0 << 2);   /* SPB-bit (Store Bad Packets) */
-  rx_control |= (0 << 3);   /* UPE-bit (Unicast Promiscuous Mode) */
-  rx_control |= (1 << 4);   /* MPE-bit (Multicast Promiscuous Mode) */
-  rx_control |= (0 << 5);   /* LPE-bit (Long Packet Enable) */
-  rx_control |= (0 << 6);   /* LBM=0 (Loop-Back Mode) */
-  rx_control |= (0 << 8);   /* RDMTS=0 (Rx Descriptor Min Threshold Size) */
-  rx_control |= (0 << 10);  /* DTYPE=0 (Descriptor Type) */
-  rx_control |= (0 << 12);  /* MO=0 (Multicast Offset) */
-  rx_control |= (1 << 15);  /* BAM-bit (Broadcast Address Mode) */
-  rx_control |= (0 << 16);  /* BSIZE=0 (Buffer Size = 2048) */
-  rx_control |= (0 << 18);  /* VLE-bit (VLAN filter Enable) */
-  rx_control |= (0 << 19);  /* CFIEN-bit (Canonical Form Indicator Enable) */
-  rx_control |= (0 << 20);  /* CFI-bit (Canonical Form Indicator) */
-  rx_control |= (1 << 22);  /* DPF-bit (Discard Pause Frames) */
-  rx_control |= (0 << 23);  /* PMCF-bit (Pass MAC Control Frames) */
-  rx_control |= (0 << 25);  /* BSEX=0 (Buffer Size EXtension) */
-  rx_control |= (1 << 26);  /* SECRC-bit (Strip Ethernet CRC) */
-  rx_control |= (0 << 27);  /* FLEXBUF=0 (Flexible Buffer size) */
-  e1000_outl(dev, E1000_RCTL, rx_control);
-
-  /* configure the controller's 'transmit' engine */
-
-  tx_control = 0;
-  tx_control |= (0 << 1);    /* EN-bit (Enable) */
-  tx_control |= (1 << 3);    /* PSP-bit (Pad Short Packets) */
-  tx_control |= (15 << 4);   /* CT=15 (Collision Threshold) */
-  tx_control |= (63 << 12);  /* COLD=63 (Collision Distance) */
-  tx_control |= (0 << 22);   /* SWXOFF-bit (Software XOFF) */
-  tx_control |= (1 << 24);   /* RTLC-bit (Re-Transmit on Late Collision) */
-  tx_control |= (0 << 25);   /* UNORTX-bit (Underrun No Re-Transmit) */
-  tx_control |= (0 << 26);   /* TXCSCMT=0 (TxDesc Mininum Threshold) */
-  tx_control |= (0 << 28);   /* MULR-bit (Multiple Request Support) */
-  e1000_outl(dev, E1000_TCTL, tx_control);
-
-  /* hardware flow control */
-
-  pba = e1000_inl(dev, E1000_PBA);
-
-  /* get receive FIFO size */
-
-  pba = (pba & 0x000000ff) << 10;
-  e1000_outl(dev, E1000_FCAL, 0x00C28001);
-  e1000_outl(dev, E1000_FCAH, 0x00000100);
-  e1000_outl(dev, E1000_FCT, 0x00008808);
-  e1000_outl(dev, E1000_FCTTV, 0x00000680);
-  e1000_outl(dev, E1000_FCRTL, (pba * 8 / 10) | 0x80000000);
-  e1000_outl(dev, E1000_FCRTH, pba * 9 / 10);
-
-  /* setup tx rings */
-
-  txd_phys = PADDR((uintptr_t)dev->tx_ring.desc);
-  kmem_phys = PADDR((uintptr_t)dev->tx_ring.buf);
-  for (i = 0; i < CONFIG_E1000_N_TX_DESC; i++, kmem_phys += CONFIG_E1000_BUFF_SIZE)
-    {
-      dev->tx_ring.desc[i].base_address  = kmem_phys;
-      dev->tx_ring.desc[i].packet_length = 0;
-      dev->tx_ring.desc[i].cksum_offset  = 0;
-      dev->tx_ring.desc[i].cksum_origin  = 0;
-      dev->tx_ring.desc[i].desc_status   = 1;
-      dev->tx_ring.desc[i].desc_command  = (1 << 0) | (1 << 1) | (1 << 3);
-      dev->tx_ring.desc[i].special_info  = 0;
-    }
-
-  dev->tx_ring.tail = 0;
-  e1000_outl(dev, E1000_TDT, 0);
-  e1000_outl(dev, E1000_TDH, 0);
-
-  /* tell controller the location, size, and fetch-policy for Tx queue */
-
-  e1000_outl(dev, E1000_TDBAL, txd_phys);
-  e1000_outl(dev, E1000_TDBAH, 0x00000000);
-  e1000_outl(dev, E1000_TDLEN, CONFIG_E1000_N_TX_DESC * 16);
-  e1000_outl(dev, E1000_TXDCTL, 0x01010000);
-
-  /* setup rx rings */
-
-  rxd_phys = PADDR((uintptr_t)dev->rx_ring.desc);
-  kmem_phys = PADDR((uintptr_t)dev->rx_ring.buf);
-  for (i = 0; i < CONFIG_E1000_N_RX_DESC; i++, kmem_phys += CONFIG_E1000_BUFF_SIZE)
-    {
-      dev->rx_ring.desc[i].base_address = kmem_phys;
-      dev->rx_ring.desc[i].packet_length = 0;
-      dev->rx_ring.desc[i].packet_cksum = 0;
-      dev->rx_ring.desc[i].desc_status = 0;
-      dev->rx_ring.desc[i].desc_errors = 0;
-      dev->rx_ring.desc[i].vlan_tag = 0;
-    }
-
-  dev->rx_ring.head = 0;
-  dev->rx_ring.tail = CONFIG_E1000_N_RX_DESC-1;
-  dev->rx_ring.free = 0;
-
-  /* give the controller ownership of all receive descriptors */
-
-  e1000_outl(dev, E1000_RDH, 0);
-  e1000_outl(dev, E1000_RDT, CONFIG_E1000_N_RX_DESC-1);
-
-  /* tell controller the location, size, and fetch-policy for RX queue */
-
-  e1000_outl(dev, E1000_RDBAL, rxd_phys);
-  e1000_outl(dev, E1000_RDBAH, 0x00000000);
-  e1000_outl(dev, E1000_RDLEN, CONFIG_E1000_N_RX_DESC*16);
-  e1000_outl(dev, E1000_RXDCTL, 0x01010000);
-
-  e1000_turn_on(dev);
-}
-
-/****************************************************************************
- * Function: e1000_transmit
- *
- * Description:
- *   Start hardware transmission.  Called either from the txdone interrupt
- *   handling or from watchdog based polling.
- *
- * Parameters:
- *   e1000  - Reference to the driver state structure
- *
- * Returned Value:
- *   OK on success; a negated errno on failure
- *
- * Assumptions:
- *   May or may not be called from an interrupt handler.  In either case,
- *   global interrupts are disabled, either explicitly or indirectly through
- *   interrupt handling logic.
- *
- ****************************************************************************/
-
-static int e1000_transmit(struct e1000_dev *e1000)
-{
-  int tail = e1000->tx_ring.tail;
-  unsigned char *cp = (unsigned char *)
-      (e1000->tx_ring.buf + tail * CONFIG_E1000_BUFF_SIZE);
-  int count = e1000->netdev.d_len;
-
-  /* Verify that the hardware is ready to send another packet.  If we get
-   * here, then we are committed to sending a packet; Higher level logic
-   * must have assured that there is not transmission in progress.
-   */
-
-  if (!e1000->tx_ring.desc[tail].desc_status)
-    {
-      return -1;
-    }
-
-  /* Send the packet: address=skel->sk_dev.d_buf, length=skel->sk_dev.d_len */
-
-  memcpy(cp, e1000->netdev.d_buf, e1000->netdev.d_len);
-
-  /* prepare the transmit-descriptor */
-
-  e1000->tx_ring.desc[tail].packet_length = count < 60 ? 60 : count;
-  e1000->tx_ring.desc[tail].desc_status = 0;
-
-  /* give ownership of this descriptor to the network controller */
-
-  tail = (tail + 1) % CONFIG_E1000_N_TX_DESC;
-  e1000->tx_ring.tail = tail;
-  e1000_outl(e1000, E1000_TDT, tail);
-
-  /* Enable Tx interrupts */
-
-  /* Setup the TX timeout watchdog (perhaps restarting the timer) */
-
-  wd_start(e1000->txtimeout, E1000_TXTIMEOUT, e1000_txtimeout, 1,
-           (wdparm_t)e1000);
-  return OK;
-}
-
-/****************************************************************************
- * Function: e1000_txpoll
- *
- * Description:
- *   The transmitter is available, check if the network has any outgoing packets ready
- *   to send.  This is a callback from devif_poll().  devif_poll() may be called:
- *
- *   1. When the preceding TX packet send is complete,
- *   2. When the preceding TX packet send timesout and the interface is reset
- *   3. During normal TX polling
- *
- * Parameters:
- *   dev  - Reference to the NuttX driver state structure
- *
- * Returned Value:
- *   OK on success; a negated errno on failure
- *
- * Assumptions:
- *   May or may not be called from an interrupt handler.  In either case,
- *   global interrupts are disabled, either explicitly or indirectly through
- *   interrupt handling logic.
- *
- ****************************************************************************/
-
-static int e1000_txpoll(struct net_driver_s *dev)
-{
-  struct e1000_dev *e1000 = (struct e1000_dev *)dev->d_private;
-  int tail = e1000->tx_ring.tail;
-
-  /* If the polling resulted in data that should be sent out on the network,
-   * the field d_len is set to a value > 0.
-   */
-
-  if (e1000->netdev.d_len > 0)
-    {
-      /* Look up the destination MAC address and add it to the Ethernet
-       * header.
-       */
-
-#ifdef CONFIG_NET_IPv4
-#ifdef CONFIG_NET_IPv6
-      if (IFF_IS_IPv4(e1000->netdev.d_flags))
-#endif
-        {
-          arp_out(&e1000->netdev);
-        }
-#endif /* CONFIG_NET_IPv4 */
-
-#ifdef CONFIG_NET_IPv6
-#ifdef CONFIG_NET_IPv4
-      else
-#endif
-        {
-          neighbor_out(&e1000->netdev);
-        }
-#endif /* CONFIG_NET_IPv6 */
-
-      /* Send the packet */
-
-      e1000_transmit(e1000);
-
-      /* Check if there is room in the device to hold another packet. If not,
-       * return a non-zero value to terminate the poll.
-       */
-
-      if (!e1000->tx_ring.desc[tail].desc_status)
-        {
-          return -1;
-        }
-    }
-
-  /* If zero is returned, the polling will continue until all connections have
-   * been examined.
-   */
-
-  return 0;
-}
-
-/****************************************************************************
- * Function: e1000_receive
- *
- * Description:
- *   An interrupt was received indicating the availability of a new RX packet
- *
- * Parameters:
- *   e1000  - Reference to the driver state structure
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Global interrupts are disabled by interrupt handling logic.
- *
- ****************************************************************************/
-
-static void e1000_receive(struct e1000_dev *e1000)
-{
-  int head = e1000->rx_ring.head;
-  unsigned char *cp = (unsigned char *)
-      (e1000->rx_ring.buf + head * CONFIG_E1000_BUFF_SIZE);
-  int cnt;
-
-  while (e1000->rx_ring.desc[head].desc_status)
-    {
-      /* Here we do not handle packets that exceed packet-buffer size */
-
-      if ((e1000->rx_ring.desc[head].desc_status & 3) == 1)
-        {
-          cprintf("NIC READ: Oversized packet\n");
-          goto next;
-        }
-
-      /* Check if the packet is a valid size for the network buffer configuration */
-
-      /* get the number of actual data-bytes in this packet */
-
-      cnt = e1000->rx_ring.desc[head].packet_length;
-
-      if (cnt > CONFIG_NET_ETH_MTU || cnt < 14)
-        {
-          cprintf("NIC READ: invalid package size\n");
-          goto next;
-        }
-
-      /* Copy the data data from the hardware to e1000->netdev.d_buf.  Set
-       * amount of data in e1000->netdev.d_len
-       */
-
-      /* now we try to copy these data-bytes to the UIP buffer */
-
-      memcpy(e1000->netdev.d_buf, cp, cnt);
-      e1000->netdev.d_len = cnt;
-
-#ifdef CONFIG_NET_PKT
-      /* When packet sockets are enabled, feed the frame into the packet tap */
-
-       pkt_input(&e1000->netdev);
-#endif
-
-      /* We only accept IP packets of the configured type and ARP packets */
-
-#ifdef CONFIG_NET_IPv4
-      if (BUF->type == HTONS(ETHTYPE_IP))
-        {
-          nllvdbg("IPv4 frame\n");
-
-          /* Handle ARP on input then give the IPv4 packet to the network
-           * layer
-           */
-
-          arp_ipin(&e1000->netdev);
-          ipv4_input(&e1000->netdev);
-
-          /* If the above function invocation resulted in data that should be
-           * sent out on the network, the field  d_len will set to a value > 0.
-           */
-
-          if (e1000->netdev.d_len > 0)
-            {
-              /* Update the Ethernet header with the correct MAC address */
-
-#ifdef CONFIG_NET_IPv6
-              if (IFF_IS_IPv4(e1000->netdev.d_flags))
-#endif
-                {
-                  arp_out(&e1000->netdev);
-                }
-#ifdef CONFIG_NET_IPv6
-              else
-                {
-                  neighbor_out(&e1000->netdev);
-                }
-#endif
-
-              /* And send the packet */
-
-              e1000_transmit(e1000);
-            }
-        }
-      else
-#endif
-#ifdef CONFIG_NET_IPv6
-      if (BUF->type == HTONS(ETHTYPE_IP6))
-        {
-          nllvdbg("Iv6 frame\n");
-
-          /* Give the IPv6 packet to the network layer */
-
-          ipv6_input(&e1000->netdev);
-
-          /* If the above function invocation resulted in data that should be
-           * sent out on the network, the field  d_len will set to a value > 0.
-           */
-
-          if (e1000->netdev.d_len > 0)
-           {
-              /* Update the Ethernet header with the correct MAC address */
-
-#ifdef CONFIG_NET_IPv4
-              if (IFF_IS_IPv4(e1000->netdev.d_flags))
-                {
-                  arp_out(&e1000->netdev);
-                }
-              else
-#endif
-#ifdef CONFIG_NET_IPv6
-                {
-                  neighbor_out(&e1000->netdev);
-                }
-#endif
-
-              /* And send the packet */
-
-              e1000_transmit(e1000);
-            }
-        }
-      else
-#endif
-#ifdef CONFIG_NET_ARP
-      if (BUF->type == htons(ETHTYPE_ARP))
-        {
-          arp_arpin(&e1000->netdev);
-
-          /* If the above function invocation resulted in data that should be
-           * sent out on the network, the field  d_len will set to a value > 0.
-           */
-
-          if (e1000->netdev.d_len > 0)
-            {
-              e1000_transmit(e1000);
-            }
-#endif
-        }
-
-next:
-      e1000->rx_ring.desc[head].desc_status = 0;
-      e1000->rx_ring.head = (head + 1) % CONFIG_E1000_N_RX_DESC;
-      e1000->rx_ring.free++;
-      head = e1000->rx_ring.head;
-      cp = (unsigned char *)(e1000->rx_ring.buf + head * CONFIG_E1000_BUFF_SIZE);
-    }
-}
-
-/****************************************************************************
- * Function: e1000_txtimeout
- *
- * Description:
- *   Our TX watchdog timed out.  Called from the timer interrupt handler.
- *   The last TX never completed.  Reset the hardware and start again.
- *
- * Parameters:
- *   argc - The number of available arguments
- *   arg  - The first argument
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Global interrupts are disabled by the watchdog logic.
- *
- ****************************************************************************/
-
-static void e1000_txtimeout(int argc, uint32_t arg, ...)
-{
-  struct e1000_dev *e1000 = (struct e1000_dev *)arg;
-
-  /* Then reset the hardware */
-
-  e1000_init(e1000);
-
-  /* Then poll the network for new XMIT data */
-
-  (void)devif_poll(&e1000->netdev, e1000_txpoll);
-}
-
-/****************************************************************************
- * Function: e1000_polltimer
- *
- * Description:
- *   Periodic timer handler.  Called from the timer interrupt handler.
- *
- * Parameters:
- *   argc - The number of available arguments
- *   arg  - The first argument
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Global interrupts are disabled by the watchdog logic.
- *
- ****************************************************************************/
-
-static void e1000_polltimer(int argc, uint32_t arg, ...)
-{
-  struct e1000_dev *e1000 = (struct e1000_dev *)arg;
-  int tail = e1000->tx_ring.tail;
-
-  /* Check if there is room in the send another TX packet.  We cannot perform
-   * the TX poll if he are unable to accept another packet for transmission.
-   */
-
-  if (!e1000->tx_ring.desc[tail].desc_status)
-    {
-      return;
-    }
-
-  /* If so, update TCP timing states and poll the network for new XMIT data. Hmmm..
-   * might be bug here.  Does this mean if there is a transmit in progress,
-   * we will missing TCP time state updates?
-   */
-
-  (void)devif_timer(&e1000->netdev, e1000_txpoll);
-
-  /* Setup the watchdog poll timer again */
-
-  (void)wd_start(e1000->txpoll, E1000_WDDELAY, e1000_polltimer, 1,
-                 (wdparm_t)arg);
-}
-
-/****************************************************************************
- * Function: e1000_ifup
- *
- * Description:
- *   NuttX Callback: Bring up the Ethernet interface when an IP address is
- *   provided
- *
- * Parameters:
- *   dev  - Reference to the NuttX driver state structure
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *
- ****************************************************************************/
-
-static int e1000_ifup(struct net_driver_s *dev)
-{
-  struct e1000_dev *e1000 = (struct e1000_dev *)dev->d_private;
-
-  ndbg("Bringing up: %d.%d.%d.%d\n",
-       dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-       (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
-
-  /* Initialize PHYs, the Ethernet interface, and setup up Ethernet interrupts */
-
-  e1000_init(e1000);
-
-  /* Set and activate a timer process */
-
-  (void)wd_start(e1000->txpoll, E1000_WDDELAY, e1000_polltimer, 1,
-                 (wdparm_t)e1000);
-
-  if (e1000_inl(e1000, E1000_STATUS) & 2)
-    {
-      e1000->bifup = true;
-    }
-  else
-    {
-      e1000->bifup = false;
-    }
-
-  return OK;
-}
-
-/****************************************************************************
- * Function: e1000_ifdown
- *
- * Description:
- *   NuttX Callback: Stop the interface.
- *
- * Parameters:
- *   dev  - Reference to the NuttX driver state structure
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *
- ****************************************************************************/
-
-static int e1000_ifdown(struct net_driver_s *dev)
-{
-  struct e1000_dev *e1000 = (struct e1000_dev *)dev->d_private;
-  irqstate_t flags;
-
-  /* Disable the Ethernet interrupt */
-
-  flags = enter_critical_section();
-
-  e1000_turn_off(e1000);
-
-  /* Cancel the TX poll timer and TX timeout timers */
-
-  wd_cancel(e1000->txpoll);
-  wd_cancel(e1000->txtimeout);
-
-  /* Put the EMAC is its reset, non-operational state.  This should be
-   * a known configuration that will guarantee the skel_ifup() always
-   * successfully brings the interface back up.
-   */
-
-  //e1000_reset(e1000);
-
-  /* Mark the device "down" */
-
-  e1000->bifup = false;
-  leave_critical_section(flags);
-
-  return OK;
-}
-
-/****************************************************************************
- * Function: e1000_txavail
- *
- * Description:
- *   Driver callback invoked when new TX data is available.  This is a
- *   stimulus perform an out-of-cycle poll and, thereby, reduce the TX
- *   latency.
- *
- * Parameters:
- *   dev  - Reference to the NuttX driver state structure
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Called in normal user mode
- *
- ****************************************************************************/
-
-static int e1000_txavail(struct net_driver_s *dev)
-{
-  struct e1000_dev *e1000 = (struct e1000_dev *)dev->d_private;
-  int tail = e1000->tx_ring.tail;
-  irqstate_t flags;
-
-  /* Disable interrupts because this function may be called from interrupt
-   * level processing.
-   */
-
-  flags = enter_critical_section();
-
-  /* Ignore the notification if the interface is not yet up */
-
-  if (e1000->bifup)
-    {
-      /* Check if there is room in the hardware to hold another outgoing packet. */
-
-      if (e1000->tx_ring.desc[tail].desc_status)
-        {
-          (void)devif_poll(&e1000->netdev, e1000_txpoll);
-        }
-    }
-
-  leave_critical_section(flags);
-  return OK;
-}
-
-/****************************************************************************
- * Function: e1000_addmac
- *
- * Description:
- *   NuttX Callback: Add the specified MAC address to the hardware multicast
- *   address filtering
- *
- * Parameters:
- *   dev  - Reference to the NuttX driver state structure
- *   mac  - The MAC address to be added
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_IGMP
-static int e1000_addmac(struct net_driver_s *dev, const uint8_t *mac)
-{
-  /* Add the MAC address to the hardware multicast routing table */
-
-  return OK;
-}
-#endif
-
-/****************************************************************************
- * Function: e1000_rmmac
- *
- * Description:
- *   NuttX Callback: Remove the specified MAC address from the hardware multicast
- *   address filtering
- *
- * Parameters:
- *   dev  - Reference to the NuttX driver state structure
- *   mac  - The MAC address to be removed
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_IGMP
-static int e1000_rmmac(struct net_driver_s *dev, const uint8_t *mac)
-{
-  /* Add the MAC address to the hardware multicast routing table */
-
-  return OK;
-}
-#endif
-
-static irqreturn_t e1000_interrupt_handler(int irq, void *dev_id)
-{
-  struct e1000_dev *e1000 = (struct e1000_dev *)dev_id;
-
-  /* Get and clear interrupt status bits */
-
-  int intr_cause = e1000_inl(e1000, E1000_ICR);
-  e1000_outl(e1000, E1000_ICR, intr_cause);
-
-  /* not for me */
-
-  if (intr_cause == 0)
-    {
-      return IRQ_NONE;
-    }
-
-  /* Handle interrupts according to status bit settings */
-
-  /* Link status change */
-
-  if (intr_cause & (1 << 2))
-    {
-      if (e1000_inl(e1000, E1000_STATUS) & 2)
-        {
-          e1000->bifup = true;
-        }
-      else
-        {
-          e1000->bifup = false;
-        }
-    }
-
-  /* Check if we received an incoming packet, if so, call skel_receive() */
-
-  /* Rx-descriptor Timer expired */
-
-  if (intr_cause & (1 << 7))
-    {
-      e1000_receive(e1000);
-    }
-
-  /* Tx queue empty */
-
-  if (intr_cause & (1 << 1))
-    {
-      wd_cancel(e1000->txtimeout);
-    }
-
-  /* Tx-descriptor Written back */
-
-  if (intr_cause & (1 << 0))
-    {
-      devif_poll(&e1000->netdev, e1000_txpoll);
-    }
-
-  /* Rx-Descriptors Low */
-
-  if (intr_cause & (1 << 4))
-    {
-      int tail;
-
-      tail = e1000->rx_ring.tail + e1000->rx_ring.free;
-      tail %= CONFIG_E1000_N_RX_DESC;
-      e1000->rx_ring.tail = tail;
-      e1000->rx_ring.free = 0;
-      e1000_outl(e1000, E1000_RDT, tail);
-    }
-
-  return IRQ_HANDLED;
-}
-
-/******************************* PCI driver *********************************/
-
-static pci_id_t e1000_id_table[] =
-{
-  {
-    .sep =
-    {
-      INTEL_VENDERID, E1000_82573L
-    }
-  },
-  {
-    .sep =
-    {
-      INTEL_VENDERID, E1000_82540EM
-    }
-  },
-  {
-    .sep =
-    {
-      INTEL_VENDERID, E1000_82574L
-    }
-  },
-  {
-    .sep =
-    {
-      INTEL_VENDERID, E1000_82567LM
-    }
-  },
-  {
-    .sep =
-    {
-      INTEL_VENDERID, E1000_82541PI
-    }
-  },
-  {
-    .sep =
-    {
-      0, 0
-    }
-  }
-};
-
-static int e1000_probe(uint16_t addr, pci_id_t id)
-{
-  uint32_t mmio_base, mmio_size;
-  uint32_t size;
-  int err;
-  void *kmem;
-  void *omem;
-  struct e1000_dev *dev;
-
-  /* alloc e1000_dev memory */
-
-  if ((dev = kmm_zalloc(sizeof(struct e1000_dev))) == NULL)
-    {
-      return -1;
-    }
-
-  /* save pci addr */
-
-  dev->pci_addr = addr;
-
-  /* enable device */
-
-  if ((err = pci_enable_device(addr, PCI_BUS_MASTER)) < 0)
-    {
-      goto error;
-    }
-
-  /* get e1000 device type */
-
-  dev->pci_dev_id = id.join;
-
-  /* remap the controller's i/o-memory into kernel's address-space */
-
-  mmio_base = pci_resource_start(addr, 0);
-  mmio_size = pci_resource_len(addr, 0);
-  err = rgmp_memmap_nocache(mmio_base, mmio_size, mmio_base);
-  if (err)
-    {
-      goto error;
-    }
-
-  dev->phy_mem_base = mmio_base;
-  dev->io_mem_base = mmio_base;
-  dev->mem_size = mmio_size;
-
-  /* MAC address */
-
-  memset(dev->dst_mac, 0xFF, 6);
-  memcpy(dev->src_mac, (void *)(dev->io_mem_base+E1000_RA), 6);
-
-  /* IRQ setup */
-
-  dev->int_desc.handler = e1000_interrupt_handler;
-  dev->int_desc.dev_id = dev;
-  if ((err = pci_request_irq(addr, &dev->int_desc, 0)) < 0)
-    {
-      goto err0;
-    }
-
-  /* Here we alloc a big block of memory once and make it
-   * aligned to page boundary and multiple of page size. This
-   * is because the memory can be modified by E1000 DMA and
-   * should be mapped no-cache which will hugely reduce memory
-   * access performance. The page size alloc will restrict
-   * this bad effect only within the memory we alloc here.
-   *
-   * NEED FIX: the memalign may alloc memory continuous in
-   * virtual address but dis-continuous in physical address
-   * due to RGMP memory setup.
-   */
-
-  size = CONFIG_E1000_N_TX_DESC * sizeof(struct tx_desc) +
-         CONFIG_E1000_N_TX_DESC * CONFIG_E1000_BUFF_SIZE +
-         CONFIG_E1000_N_RX_DESC * sizeof(struct rx_desc) +
-         CONFIG_E1000_N_RX_DESC * CONFIG_E1000_BUFF_SIZE;
-  size = ROUNDUP(size, PGSIZE);
-  omem = kmem = memalign(PGSIZE, size);
-  if (kmem == NULL)
-    {
-      err = -ENOMEM;
-      goto err1;
-    }
-
-  rgmp_memremap_nocache((uintptr_t)kmem, size);
-
-  /* alloc memory for tx ring */
-
-  dev->tx_ring.desc = (FAR struct tx_desc *)kmem;
-  kmem += CONFIG_E1000_N_TX_DESC * sizeof(struct tx_desc);
-  dev->tx_ring.buf = kmem;
-  kmem += CONFIG_E1000_N_TX_DESC * CONFIG_E1000_BUFF_SIZE;
-
-  /* alloc memory for rx rings */
-
-  dev->rx_ring.desc = (FAR struct rx_desc *)kmem;
-  kmem += CONFIG_E1000_N_RX_DESC * sizeof(struct rx_desc);
-  dev->rx_ring.buf = kmem;
-
-  /* Initialize the driver structure */
-
-  dev->netdev.d_ifup    = e1000_ifup;     /* I/F up (new IP address) callback */
-  dev->netdev.d_ifdown  = e1000_ifdown;   /* I/F down callback */
-  dev->netdev.d_txavail = e1000_txavail;  /* New TX data callback */
-#ifdef CONFIG_NET_IGMP
-  dev->netdev.d_addmac  = e1000_addmac;   /* Add multicast MAC address */
-  dev->netdev.d_rmmac   = e1000_rmmac;    /* Remove multicast MAC address */
-#endif
-  dev->netdev.d_private = dev;            /* Used to recover private state from dev */
-
-  /* Create a watchdog for timing polling for and timing of transmisstions */
-
-  dev->txpoll       = wd_create();        /* Create periodic poll timer */
-  dev->txtimeout    = wd_create();        /* Create TX timeout timer */
-
-  /* Put the interface in the down state.
-   * e1000 reset
-   */
-
-  e1000_reset(dev);
-
-  /* Read the MAC address from the hardware */
-
-  memcpy(dev->netdev.d_mac.ether_addr_octet, (void *)(dev->io_mem_base+E1000_RA), 6);
-
-  /* Register the device with the OS so that socket IOCTLs can be performed */
-
-  err = netdev_register(&dev->netdev, NET_LL_ETHERNET);
-  if (err)
-    {
-      goto err2;
-    }
-
-  /* insert into e1000_list */
-
-  dev->next = e1000_list.next;
-  e1000_list.next = dev;
-  cprintf("bring up e1000 device: %04x %08x\n", addr, id.join);
-
-  return 0;
-
-err2:
-  rgmp_memremap((uintptr_t)omem, size);
-  free(omem);
-err1:
-  pci_free_irq(addr);
-err0:
-  rgmp_memunmap(mmio_base, mmio_size);
-error:
-  kmm_free(dev);
-  cprintf("e1000 device probe fail: %d\n", err);
-  return err;
-}
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-void e1000_mod_init(void)
-{
-  pci_probe_device(e1000_id_table, e1000_probe);
-}
-
-void e1000_mod_exit(void)
-{
-  uint32_t size;
-  struct e1000_dev *dev;
-
-  size = CONFIG_E1000_N_TX_DESC * sizeof(struct tx_desc) +
-         CONFIG_E1000_N_TX_DESC * CONFIG_E1000_BUFF_SIZE +
-         CONFIG_E1000_N_RX_DESC * sizeof(struct rx_desc) +
-        CONFIG_E1000_N_RX_DESC * CONFIG_E1000_BUFF_SIZE;
-  size = ROUNDUP(size, PGSIZE);
-
-  for (dev = e1000_list.next; dev != NULL; dev = dev->next)
-    {
-      netdev_unregister(&dev->netdev);
-      e1000_reset(dev);
-      wd_delete(dev->txpoll);
-      wd_delete(dev->txtimeout);
-      rgmp_memremap((uintptr_t)dev->tx_ring.desc, size);
-      free(dev->tx_ring.desc);
-      pci_free_irq(dev->pci_addr);
-      rgmp_memunmap((uintptr_t)dev->io_mem_base, dev->mem_size);
-      kmm_free(dev);
-    }
-
-  e1000_list.next = NULL;
-}
diff --git a/drivers/net/e1000.h b/drivers/net/e1000.h
deleted file mode 100644
index 63ff53e3c3f724bf24152f6155a775b888d9dd00..0000000000000000000000000000000000000000
--- a/drivers/net/e1000.h
+++ /dev/null
@@ -1,121 +0,0 @@
-/****************************************************************************
- * drivers/net/e1000.h
- *
- *   Copyright (C) 2011 Yu Qiang. All rights reserved.
- *   Author: Yu Qiang 
- *
- * This file is a part of NuttX:
- *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#ifndef __DRIVERS_NET_E1000_H
-#define __DRIVERS_NET_E1000_H
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include 
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/************** PCI ID ***************/
-
-#define INTEL_VENDERID   0x8086
-#define E1000_82573L     0x109a
-#define E1000_82540EM    0x100e
-#define E1000_82574L     0x10d3
-#define E1000_82567LM    0x10f5
-#define E1000_82541PI    0x107c
-
-/****************************************************************************
- * Public Types
- ****************************************************************************/
-
-enum e1000_registers {
-	E1000_CTRL	= 0x0000,	// Device Control
-	E1000_STATUS	= 0x0008,	// Device Status
-	E1000_CTRL_EXT	= 0x0018,	// Device Control Extension
-	E1000_FCAL      = 0x0028,       // Flow Control Address Low
-	E1000_FCAH      = 0x002C,       // Flow Control Address High
-	E1000_FCT       = 0x0030,       // Flow Control Type
-	E1000_ICR	= 0x00C0,	// Interrupt Cause Read
-	E1000_ICS	= 0x00C8,	// Interrupt Cause Set
-	E1000_IMS	= 0x00D0,	// Interrupt Mask Set
-	E1000_IMC	= 0x00D8,	// Interrupt Mask Clear
-	E1000_RCTL	= 0x0100,	// Receive Control
-	E1000_FCTTV     = 0x0170,       // Flow Control Transmit Timer Value
-	E1000_TCTL	= 0x0400,	// Transmit Control
-	E1000_PBA       = 0x1000,       // Packet Buffer Allocation
-	E1000_FCRTL     = 0x2160,       // Flow Control Receive Threshold Low
-	E1000_FCRTH     = 0x2168,       // Flow Control Receive Threshold High
-	E1000_RDBAL	= 0x2800,	// Rx Descriptor Base Address Low	
-	E1000_RDBAH	= 0x2804,	// Rx Descriptor Base Address High
-	E1000_RDLEN	= 0x2808,	// Rx Descriptor Length
-	E1000_RDH	= 0x2810,	// Rx Descriptor Head	
-	E1000_RDT	= 0x2818,	// Rx Descriptor Tail	
-	E1000_RXDCTL	= 0x2828,	// Rx Descriptor Control	
-	E1000_TDBAL	= 0x3800,	// Tx Descriptor Base Address Low	
-	E1000_TDBAH	= 0x3804,	// Tx Descriptor Base Address High
-	E1000_TDLEN	= 0x3808,	// Tx Descriptor Length
-	E1000_TDH	= 0x3810,	// Tx Descriptor Head	
-	E1000_TDT	= 0x3818,	// Tx Descriptor Tail	
-	E1000_TXDCTL	= 0x3828,	// Tx Descriptor Control	
-	E1000_TPR	= 0x40D0,	// Total Packets Received
-	E1000_TPT	= 0x40D4,	// Total Packets Transmitted
-	E1000_RA	= 0x5400,	// Receive-filter Array
-};
-
-/***************** e1000 device structure *****************/
-
-struct tx_desc {
-    uint64_t base_address;
-    uint16_t packet_length;
-    uint8_t  cksum_offset;
-    uint8_t  desc_command;
-    uint8_t  desc_status;
-    uint8_t  cksum_origin;
-    uint16_t special_info;
-};
-
-struct rx_desc {
-    uint64_t base_address;
-    uint16_t packet_length;
-    uint16_t packet_cksum;
-    uint8_t  desc_status;
-    uint8_t  desc_errors;
-    uint16_t vlan_tag;
-};
-
-#endif
diff --git a/drivers/net/enc28j60.c b/drivers/net/enc28j60.c
index df1fe7db47aefbe1730d1fcbe393ff427384cee9..4b6f93a712cc3c1aeebb0dd4c5daa69905f74cc5 100644
--- a/drivers/net/enc28j60.c
+++ b/drivers/net/enc28j60.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/net/enc28j60.c
  *
- *   Copyright (C) 2010-2012, 2014-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010-2012, 2014-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * References:
@@ -115,8 +115,16 @@
 
 /* We need to have the work queue to handle SPI interrupts */
 
-#ifndef CONFIG_SCHED_WORKQUEUE
+#if !defined(CONFIG_SCHED_WORKQUEUE)
 #  error "Worker thread support is required (CONFIG_SCHED_WORKQUEUE)"
+#else
+#  if defined(CONFIG_ENC28J60_HPWORK)
+#    define ENCWORK HPWORK
+#  elif defined(CONFIG_ENC28J60_LPWORK)
+#    define ENCWORK LPWORK
+#  else
+#    error "Neither CONFIG_ENC28J60_HPWORK nor CONFIG_ENC28J60_LPWORK defined"
+#  endif
 #endif
 
 /* CONFIG_ENC28J60_DUMPPACKET will dump the contents of each packet to the console. */
@@ -127,15 +135,9 @@
 #  define enc_dumppacket(m,a,n)
 #endif
 
-/* The ENC28J60 will not do interrupt level processing */
-
-#ifndef CONFIG_NET_NOINTS
-#  warrning "CONFIG_NET_NOINTS should be set"
-#endif
-
 /* Low-level register debug */
 
-#if !defined(CONFIG_DEBUG) || !defined(CONFIG_DEBUG_NET)
+#if !defined(CONFIG_DEBUG_FEATURES) || !defined(CONFIG_DEBUG_NET)
 #  undef CONFIG_ENC28J60_REGDEBUG
 #endif
 
@@ -195,13 +197,13 @@
 
 #ifdef CONFIG_ENC28J60_REGDEBUG
 #  define enc_wrdump(a,v) \
-   lowsyslog(LOG_DEBUG, "ENC28J60: %02x<-%02x\n", a, v);
+   syslog(LOG_DEBUG, "ENC28J60: %02x<-%02x\n", a, v);
 #  define enc_rddump(a,v) \
-   lowsyslog(LOG_DEBUG, "ENC28J60: %02x->%02x\n", a, v);
+   syslog(LOG_DEBUG, "ENC28J60: %02x->%02x\n", a, v);
 #  define enc_cmddump(c) \
-   lowsyslog(LOG_DEBUG, "ENC28J60: CMD: %02x\n", c);
+   syslog(LOG_DEBUG, "ENC28J60: CMD: %02x\n", c);
 #  define enc_bmdump(c,b,s) \
-   lowsyslog(LOG_DEBUG, "ENC28J60: CMD: %02x buffer: %p length: %d\n", c, b, s);
+   syslog(LOG_DEBUG, "ENC28J60: CMD: %02x buffer: %p length: %d\n", c, b, s);
 #else
 #  define enc_wrdump(a,v)
 #  define enc_rddump(a,v)
@@ -261,6 +263,12 @@ struct enc_driver_s
  * Private Data
  ****************************************************************************/
 
+/* A single packet buffer is used */
+
+static uint8_t g_pktbuf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
+
+/* Driver status structure */
+
 static struct enc_driver_s g_enc28j60[CONFIG_ENC28J60_NINTERFACES];
 
 /****************************************************************************
@@ -319,7 +327,7 @@ static void enc_rxerif(FAR struct enc_driver_s *priv);
 static void enc_rxdispatch(FAR struct enc_driver_s *priv);
 static void enc_pktif(FAR struct enc_driver_s *priv);
 static void enc_irqworker(FAR void *arg);
-static int  enc_interrupt(int irq, FAR void *context);
+static int  enc_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
@@ -774,56 +782,56 @@ static int enc_waitbreg(FAR struct enc_driver_s *priv, uint8_t ctrlreg,
 #if 0 /* Sometimes useful */
 static void enc_rxdump(FAR struct enc_driver_s *priv)
 {
-  lowsyslog(LOG_DEBUG, "Rx Registers:\n");
-  lowsyslog(LOG_DEBUG, "  EIE:      %02x EIR:      %02x\n",
-            enc_rdgreg(priv, ENC_EIE), enc_rdgreg(priv, ENC_EIR));
-  lowsyslog(LOG_DEBUG, "  ESTAT:    %02x ECON1:    %02x ECON2:    %02x\n",
-            enc_rdgreg(priv, ENC_ESTAT), enc_rdgreg(priv, ENC_ECON1),
-            enc_rdgreg(priv, ENC_ECON2));
-  lowsyslog(LOG_DEBUG, "  ERXST:    %02x %02x\n",
-            enc_rdbreg(priv, ENC_ERXSTH), enc_rdbreg(priv, ENC_ERXSTL));
-  lowsyslog(LOG_DEBUG, "  ERXND:    %02x %02x\n",
-            enc_rdbreg(priv, ENC_ERXNDH), enc_rdbreg(priv, ENC_ERXNDL));
-  lowsyslog(LOG_DEBUG, "  ERXRDPT:  %02x %02x\n",
-            enc_rdbreg(priv, ENC_ERXRDPTH), enc_rdbreg(priv, ENC_ERXRDPTL));
-  lowsyslog(LOG_DEBUG, "  ERXFCON:  %02x EPKTCNT:  %02x\n",
-            enc_rdbreg(priv, ENC_ERXFCON), enc_rdbreg(priv, ENC_EPKTCNT));
-  lowsyslog(LOG_DEBUG, "  MACON1:   %02x MACON3:   %02x\n",
-            enc_rdbreg(priv, ENC_MACON1), enc_rdbreg(priv, ENC_MACON3));
-  lowsyslog(LOG_DEBUG, "  MAMXFL:   %02x %02x\n",
-            enc_rdbreg(priv, ENC_MAMXFLH), enc_rdbreg(priv, ENC_MAMXFLL));
-  lowsyslog(LOG_DEBUG, "  MAADR:    %02x:%02x:%02x:%02x:%02x:%02x\n",
-            enc_rdbreg(priv, ENC_MAADR1), enc_rdbreg(priv, ENC_MAADR2),
-            enc_rdbreg(priv, ENC_MAADR3), enc_rdbreg(priv, ENC_MAADR4),
-            enc_rdbreg(priv, ENC_MAADR5), enc_rdbreg(priv, ENC_MAADR6));
+  syslog(LOG_DEBUG, "Rx Registers:\n");
+  syslog(LOG_DEBUG, "  EIE:      %02x EIR:      %02x\n",
+         enc_rdgreg(priv, ENC_EIE), enc_rdgreg(priv, ENC_EIR));
+  syslog(LOG_DEBUG, "  ESTAT:    %02x ECON1:    %02x ECON2:    %02x\n",
+         enc_rdgreg(priv, ENC_ESTAT), enc_rdgreg(priv, ENC_ECON1),
+         enc_rdgreg(priv, ENC_ECON2));
+  syslog(LOG_DEBUG, "  ERXST:    %02x %02x\n",
+         enc_rdbreg(priv, ENC_ERXSTH), enc_rdbreg(priv, ENC_ERXSTL));
+  syslog(LOG_DEBUG, "  ERXND:    %02x %02x\n",
+         enc_rdbreg(priv, ENC_ERXNDH), enc_rdbreg(priv, ENC_ERXNDL));
+  syslog(LOG_DEBUG, "  ERXRDPT:  %02x %02x\n",
+         enc_rdbreg(priv, ENC_ERXRDPTH), enc_rdbreg(priv, ENC_ERXRDPTL));
+  syslog(LOG_DEBUG, "  ERXFCON:  %02x EPKTCNT:  %02x\n",
+         enc_rdbreg(priv, ENC_ERXFCON), enc_rdbreg(priv, ENC_EPKTCNT));
+  syslog(LOG_DEBUG, "  MACON1:   %02x MACON3:   %02x\n",
+         enc_rdbreg(priv, ENC_MACON1), enc_rdbreg(priv, ENC_MACON3));
+  syslog(LOG_DEBUG, "  MAMXFL:   %02x %02x\n",
+         enc_rdbreg(priv, ENC_MAMXFLH), enc_rdbreg(priv, ENC_MAMXFLL));
+  syslog(LOG_DEBUG, "  MAADR:    %02x:%02x:%02x:%02x:%02x:%02x\n",
+         enc_rdbreg(priv, ENC_MAADR1), enc_rdbreg(priv, ENC_MAADR2),
+         enc_rdbreg(priv, ENC_MAADR3), enc_rdbreg(priv, ENC_MAADR4),
+         enc_rdbreg(priv, ENC_MAADR5), enc_rdbreg(priv, ENC_MAADR6));
 }
 #endif
 
 #if 0 /* Sometimes useful */
 static void enc_txdump(FAR struct enc_driver_s *priv)
 {
-  lowsyslog(LOG_DEBUG, "Tx Registers:\n");
-  lowsyslog(LOG_DEBUG, "  EIE:      %02x EIR:      %02x\n",
-            enc_rdgreg(priv, ENC_EIE), enc_rdgreg(priv, ENC_EIR));
-  lowsyslog(LOG_DEBUG, "  ESTAT:    %02x ECON1:    %02x\n",
-            enc_rdgreg(priv, ENC_ESTAT), enc_rdgreg(priv, ENC_ECON1));
-  lowsyslog(LOG_DEBUG, "  ETXST:    %02x %02x\n",
-            enc_rdbreg(priv, ENC_ETXSTH), enc_rdbreg(priv, ENC_ETXSTL));
-  lowsyslog(LOG_DEBUG, "  ETXND:    %02x %02x\n",
-            enc_rdbreg(priv, ENC_ETXNDH), enc_rdbreg(priv, ENC_ETXNDL));
-  lowsyslog(LOG_DEBUG, "  MACON1:   %02x MACON3:   %02x MACON4:   %02x\n",
-            enc_rdbreg(priv, ENC_MACON1), enc_rdbreg(priv, ENC_MACON3),
-            enc_rdbreg(priv, ENC_MACON4));
-  lowsyslog(LOG_DEBUG, "  MACON1:   %02x MACON3:   %02x MACON4:   %02x\n",
-            enc_rdbreg(priv, ENC_MACON1), enc_rdbreg(priv, ENC_MACON3),
-            enc_rdbreg(priv, ENC_MACON4));
-  lowsyslog(LOG_DEBUG, "  MABBIPG:  %02x MAIPG %02x %02x\n",
-            enc_rdbreg(priv, ENC_MABBIPG), enc_rdbreg(priv, ENC_MAIPGH),
-            enc_rdbreg(priv, ENC_MAIPGL));
-  lowsyslog(LOG_DEBUG, "  MACLCON1: %02x MACLCON2:   %02x\n",
-            enc_rdbreg(priv, ENC_MACLCON1), enc_rdbreg(priv, ENC_MACLCON2));
-  lowsyslog(LOG_DEBUG, "  MAMXFL:   %02x %02x\n",
-            enc_rdbreg(priv, ENC_MAMXFLH), enc_rdbreg(priv, ENC_MAMXFLL));
+  syslog(LOG_DEBUG, "Tx Registers:\n");
+  syslog(LOG_DEBUG, "  EIE:      %02x EIR:      %02x\n",
+         enc_rdgreg(priv, ENC_EIE), enc_rdgreg(priv, ENC_EIR));
+  syslog(LOG_DEBUG, "  ESTAT:    %02x ECON1:    %02x\n",
+         enc_rdgreg(priv, ENC_ESTAT), enc_rdgreg(priv, ENC_ECON1));
+  syslog(LOG_DEBUG, "  ETXST:    %02x %02x\n",
+         enc_rdbreg(priv, ENC_ETXSTH), enc_rdbreg(priv, ENC_ETXSTL));
+  syslog(LOG_DEBUG, "  ETXND:    %02x %02x\n",
+         enc_rdbreg(priv, ENC_ETXNDH), enc_rdbreg(priv, ENC_ETXNDL));
+  syslog(LOG_DEBUG, "  MACON1:   %02x MACON3:   %02x MACON4:   %02x\n",
+         enc_rdbreg(priv, ENC_MACON1), enc_rdbreg(priv, ENC_MACON3),
+         enc_rdbreg(priv, ENC_MACON4));
+  syslog(LOG_DEBUG, "  MACON1:   %02x MACON3:   %02x MACON4:   %02x\n",
+         enc_rdbreg(priv, ENC_MACON1), enc_rdbreg(priv, ENC_MACON3),
+         enc_rdbreg(priv, ENC_MACON4));
+  syslog(LOG_DEBUG, "  MABBIPG:  %02x MAIPG %02x %02x\n",
+         enc_rdbreg(priv, ENC_MABBIPG), enc_rdbreg(priv, ENC_MAIPGH),
+         enc_rdbreg(priv, ENC_MAIPGL));
+  syslog(LOG_DEBUG, "  MACLCON1: %02x MACLCON2:   %02x\n",
+         enc_rdbreg(priv, ENC_MACLCON1), enc_rdbreg(priv, ENC_MACLCON2));
+  syslog(LOG_DEBUG, "  MAMXFL:   %02x %02x\n",
+         enc_rdbreg(priv, ENC_MAMXFLH), enc_rdbreg(priv, ENC_MAMXFLL));
 }
 #endif
 
@@ -1092,7 +1100,7 @@ static int enc_transmit(FAR struct enc_driver_s *priv)
 
   /* Increment statistics */
 
-  nllvdbg("Sending packet, pktlen: %d\n", priv->dev.d_len);
+  ninfo("Sending packet, pktlen: %d\n", priv->dev.d_len);
   NETDEV_TXPACKETS(&priv->dev);
 
   /* Verify that the hardware is ready to send another packet.  The driver
@@ -1180,7 +1188,7 @@ static int enc_txpoll(struct net_driver_s *dev)
    * the field d_len is set to a value > 0.
    */
 
-  nllvdbg("Poll result: d_len=%d\n", priv->dev.d_len);
+  ninfo("Poll result: d_len=%d\n", priv->dev.d_len);
   if (priv->dev.d_len > 0)
     {
       /* Look up the destination MAC address and add it to the Ethernet
@@ -1279,15 +1287,6 @@ static void enc_txif(FAR struct enc_driver_s *priv)
 
   wd_cancel(priv->txtimeout);
 
-  /* Then make sure that the TX poll timer is running (if it is already
-   * running, the following would restart it).  This is necessary to
-   * avoid certain race conditions where the polling sequence can be
-   * interrupted.
-   */
-
-  (void)wd_start(priv->txpoll, ENC_WDDELAY, enc_polltimer, 1,
-                 (wdparm_t)priv);
-
   /* Then poll the network for new XMIT data */
 
   (void)devif_poll(&priv->dev, enc_txpoll);
@@ -1388,7 +1387,7 @@ static void enc_rxdispatch(FAR struct enc_driver_s *priv)
 #ifdef CONFIG_NET_IPv4
   if (BUF->type == HTONS(ETHTYPE_IP))
     {
-      nllvdbg("IPv4 frame\n");
+      ninfo("IPv4 frame\n");
       NETDEV_RXIPV4(&priv->dev);
 
       /* Handle ARP on input then give the IPv4 packet to the network
@@ -1429,7 +1428,7 @@ static void enc_rxdispatch(FAR struct enc_driver_s *priv)
 #ifdef CONFIG_NET_IPv6
   if (BUF->type == HTONS(ETHTYPE_IP6))
     {
-      nllvdbg("Iv6 frame\n");
+      ninfo("Iv6 frame\n");
       NETDEV_RXIPV6(&priv->dev);
 
       /* Give the IPv6 packet to the network layer */
@@ -1467,7 +1466,7 @@ static void enc_rxdispatch(FAR struct enc_driver_s *priv)
 #ifdef CONFIG_NET_ARP
   if (BUF->type == htons(ETHTYPE_ARP))
     {
-      nllvdbg("ARP packet received (%02x)\n", BUF->type);
+      ninfo("ARP packet received (%02x)\n", BUF->type);
       NETDEV_RXARP(&priv->dev);
 
       arp_arpin(&priv->dev);
@@ -1484,7 +1483,7 @@ static void enc_rxdispatch(FAR struct enc_driver_s *priv)
   else
 #endif
     {
-      nlldbg("Unsupported packet type dropped (%02x)\n", htons(BUF->type));
+      nerr("ERROR: Unsupported packet type dropped (%02x)\n", htons(BUF->type));
       NETDEV_RXDROPPED(&priv->dev);
     }
 }
@@ -1543,14 +1542,14 @@ static void enc_pktif(FAR struct enc_driver_s *priv)
   pktlen        = (uint16_t)rsv[3] << 8 | (uint16_t)rsv[2];
   rxstat        = (uint16_t)rsv[5] << 8 | (uint16_t)rsv[4];
 
-  nllvdbg("Receiving packet, nextpkt: %04x pktlen: %d rxstat: %04x\n",
-          priv->nextpkt, pktlen, rxstat);
+  ninfo("Receiving packet, nextpkt: %04x pktlen: %d rxstat: %04x\n",
+        priv->nextpkt, pktlen, rxstat);
 
   /* Check if the packet was received OK */
 
   if ((rxstat & RXSTAT_OK) == 0)
     {
-      nlldbg("ERROR: RXSTAT: %04x\n", rxstat);
+      nerr("ERROR: RXSTAT: %04x\n", rxstat);
       NETDEV_RXERRORS(&priv->dev);
     }
 
@@ -1558,7 +1557,7 @@ static void enc_pktif(FAR struct enc_driver_s *priv)
 
   else if (pktlen > (CONFIG_NET_ETH_MTU + 4) || pktlen <= (ETH_HDRLEN + 4))
     {
-      nlldbg("Bad packet size dropped (%d)\n", pktlen);
+      nerr("ERROR: Bad packet size dropped (%d)\n", pktlen);
       NETDEV_RXERRORS(&priv->dev);
     }
 
@@ -1615,14 +1614,13 @@ static void enc_pktif(FAR struct enc_driver_s *priv)
 static void enc_irqworker(FAR void *arg)
 {
   FAR struct enc_driver_s *priv = (FAR struct enc_driver_s *)arg;
-  net_lock_t lock;
   uint8_t eir;
 
   DEBUGASSERT(priv);
 
   /* Get exclusive access to both the network and the SPI bus. */
 
-  lock = net_lock();
+  net_lock();
   enc_lock(priv);
 
   /* Disable further interrupts by clearing the global interrupt enable bit.
@@ -1647,7 +1645,7 @@ static void enc_irqworker(FAR void *arg)
        * settings.
        */
 
-      nllvdbg("EIR: %02x\n", eir);
+      ninfo("EIR: %02x\n", eir);
 
       /* DMAIF: The DMA interrupt indicates that the DMA module has completed
        * its memory copy or checksum calculation. Additionally, this interrupt
@@ -1767,7 +1765,7 @@ static void enc_irqworker(FAR void *arg)
           uint8_t pktcnt = enc_rdbreg(priv, ENC_EPKTCNT);
           if (pktcnt > 0)
             {
-              nllvdbg("EPKTCNT: %02x\n", pktcnt);
+              nerr("EPKTCNT: %02x\n", pktcnt);
 
               /* Handle packet receipt */
 
@@ -1813,7 +1811,7 @@ static void enc_irqworker(FAR void *arg)
   /* Release lock on the SPI bus and the network */
 
   enc_unlock(priv);
-  net_unlock(lock);
+  net_unlock();
 }
 
 /****************************************************************************
@@ -1833,7 +1831,7 @@ static void enc_irqworker(FAR void *arg)
  *
  ****************************************************************************/
 
-static int enc_interrupt(int irq, FAR void *context)
+static int enc_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   register FAR struct enc_driver_s *priv = &g_enc28j60[0];
 
@@ -1852,7 +1850,7 @@ static int enc_interrupt(int irq, FAR void *context)
    */
 
   priv->lower->disable(priv->lower);
-  return work_queue(HPWORK, &priv->irqwork, enc_irqworker, (FAR void *)priv, 0);
+  return work_queue(ENCWORK, &priv->irqwork, enc_irqworker, (FAR void *)priv, 0);
 }
 
 /****************************************************************************
@@ -1875,15 +1873,14 @@ static int enc_interrupt(int irq, FAR void *context)
 static void enc_toworker(FAR void *arg)
 {
   FAR struct enc_driver_s *priv = (FAR struct enc_driver_s *)arg;
-  net_lock_t lock;
   int ret;
 
-  nlldbg("Tx timeout\n");
+  nerr("ERROR: Tx timeout\n");
   DEBUGASSERT(priv);
 
   /* Get exclusive access to the network */
 
-  lock = net_lock();
+  net_lock();
 
   /* Increment statistics and dump debug info */
 
@@ -1905,7 +1902,7 @@ static void enc_toworker(FAR void *arg)
 
   /* Release lock on the network */
 
-  net_unlock(lock);
+  net_unlock();
 }
 
 /****************************************************************************
@@ -1944,7 +1941,7 @@ static void enc_txtimeout(int argc, uint32_t arg, ...)
    * can occur until we restart the Tx timeout watchdog.
    */
 
-  ret = work_queue(HPWORK, &priv->towork, enc_toworker, (FAR void *)priv, 0);
+  ret = work_queue(ENCWORK, &priv->towork, enc_toworker, (FAR void *)priv, 0);
   DEBUGASSERT(ret == OK);
   UNUSED(ret);
 }
@@ -1969,13 +1966,12 @@ static void enc_txtimeout(int argc, uint32_t arg, ...)
 static void enc_pollworker(FAR void *arg)
 {
   FAR struct enc_driver_s *priv = (FAR struct enc_driver_s *)arg;
-  net_lock_t lock;
 
   DEBUGASSERT(priv);
 
   /* Get exclusive access to both the network and the SPI bus. */
 
-  lock = net_lock();
+  net_lock();
   enc_lock(priv);
 
   /* Verify that the hardware is ready to send another packet.  The driver
@@ -1997,7 +1993,7 @@ static void enc_pollworker(FAR void *arg)
   /* Release lock on the SPI bus and the network */
 
   enc_unlock(priv);
-  net_unlock(lock);
+  net_unlock();
 
   /* Setup the watchdog poll timer again */
 
@@ -2040,7 +2036,7 @@ static void enc_polltimer(int argc, uint32_t arg, ...)
    * occur until we restart the poll timeout watchdog.
    */
 
-  ret = work_queue(HPWORK, &priv->pollwork, enc_pollworker, (FAR void *)priv, 0);
+  ret = work_queue(ENCWORK, &priv->pollwork, enc_pollworker, (FAR void *)priv, 0);
   DEBUGASSERT(ret == OK);
   UNUSED(ret);
 }
@@ -2067,8 +2063,8 @@ static int enc_ifup(struct net_driver_s *dev)
   FAR struct enc_driver_s *priv = (FAR struct enc_driver_s *)dev->d_private;
   int ret;
 
-  nlldbg("Bringing up: %d.%d.%d.%d\n",
-         dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
         (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 
   /* Lock the SPI bus so that we have exclusive access */
@@ -2139,9 +2135,9 @@ static int enc_ifdown(struct net_driver_s *dev)
   irqstate_t flags;
   int ret;
 
-  nlldbg("Taking down: %d.%d.%d.%d\n",
-         dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-         (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Taking down: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 
   /* Lock the SPI bus so that we have exclusive access */
 
@@ -2336,7 +2332,7 @@ static int enc_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac)
 
 static void enc_pwrsave(FAR struct enc_driver_s *priv)
 {
-  nllvdbg("Set PWRSV\n");
+  ninfo("Set PWRSV\n");
 
   /* 1. Turn off packet reception by clearing ECON1.RXEN. */
 
@@ -2396,7 +2392,7 @@ static void enc_pwrsave(FAR struct enc_driver_s *priv)
 
 static void enc_pwrfull(FAR struct enc_driver_s *priv)
 {
-  nllvdbg("Clear PWRSV\n");
+  ninfo("Clear PWRSV\n");
 
   /* 1. Wake-up by clearing ECON2.PWRSV. */
 
@@ -2473,7 +2469,7 @@ static int enc_reset(FAR struct enc_driver_s *priv)
 {
   uint8_t regval;
 
-  nlldbg("Reset\n");
+  nwarn("WARNING: Reset\n");
 
   /* Configure SPI for the ENC28J60 */
 
@@ -2524,11 +2520,11 @@ static int enc_reset(FAR struct enc_driver_s *priv)
   regval = enc_rdbreg(priv, ENC_EREVID);
   if (regval == 0x00 || regval == 0xff)
     {
-      nlldbg("Bad Rev ID: %02x\n", regval);
+      nerr("ERROR: Bad Rev ID: %02x\n", regval);
       return -ENODEV;
     }
 
-  nllvdbg("Rev ID: %02x\n", regval);
+  ninfo("Rev ID: %02x\n", regval);
 
   /* Set filter mode: unicast OR broadcast AND crc valid */
 
@@ -2623,6 +2619,7 @@ int enc_initialize(FAR struct spi_dev_s *spi,
   /* Initialize the driver structure */
 
   memset(g_enc28j60, 0, CONFIG_ENC28J60_NINTERFACES*sizeof(struct enc_driver_s));
+  priv->dev.d_buf     = g_pktbuf;     /* Single packet buffer */
   priv->dev.d_ifup    = enc_ifup;     /* I/F down callback */
   priv->dev.d_ifdown  = enc_ifdown;   /* I/F up (new IP address) callback */
   priv->dev.d_txavail = enc_txavail;  /* New TX data callback */
diff --git a/drivers/net/encx24j600.c b/drivers/net/encx24j600.c
index c341c5486f7c47f21549f150e374e510ef82c147..3394710f8ad89582e41dffbf053d655b0fae028f 100644
--- a/drivers/net/encx24j600.c
+++ b/drivers/net/encx24j600.c
@@ -120,8 +120,16 @@
 
 /* We need to have the work queue to handle SPI interrupts */
 
-#ifndef CONFIG_SCHED_WORKQUEUE
+#if !defined(CONFIG_SCHED_WORKQUEUE)
 #  error "Worker thread support is required (CONFIG_SCHED_WORKQUEUE)"
+#else
+#  if defined(CONFIG_ENCX24J600_HPWORK)
+#    define ENCWORK HPWORK
+#  elif defined(CONFIG_ENCX24J600_LPWORK)
+#    define ENCWORK LPWORK
+#  else
+#    error "Neither CONFIG_ENCX24J600_HPWORK nor CONFIG_ENCX24J600_LPWORK defined"
+#  endif
 #endif
 
 /* CONFIG_ENCX24J600_DUMPPACKET will dump the contents of each packet to the console. */
@@ -132,15 +140,9 @@
 #  define enc_dumppacket(m,a,n)
 #endif
 
-/* The ENCX24J600 will not do interrupt level processing */
-
-#ifndef CONFIG_NET_NOINTS
-#  warning "CONFIG_NET_NOINTS should be set"
-#endif
-
 /* Low-level register debug */
 
-#if !defined(CONFIG_DEBUG) || !defined(CONFIG_DEBUG_NET)
+#if !defined(CONFIG_DEBUG_FEATURES) || !defined(CONFIG_DEBUG_NET)
 #  undef CONFIG_ENCX24J600_REGDEBUG
 #endif
 
@@ -187,17 +189,17 @@
 
 #ifdef CONFIG_ENCX24J600_REGDEBUG
 #  define enc_wrdump(a,v) \
-   lowsyslog(LOG_DEBUG, "ENCX24J600: %02x<-%04x\n", a, v);
+   syslog(LOG_DEBUG, "ENCX24J600: %02x<-%04x\n", a, v);
 #  define enc_rddump(a,v) \
-   lowsyslog(LOG_DEBUG, "ENCX24J600: %02x->%04x\n", a, v);
+   syslog(LOG_DEBUG, "ENCX24J600: %02x->%04x\n", a, v);
 #  define enc_bfsdump(a,m) \
-   lowsyslog(LOG_DEBUG, "ENCX24J600: %02x|=%04x\n", a, m);
+   syslog(LOG_DEBUG, "ENCX24J600: %02x|=%04x\n", a, m);
 #  define enc_bfcdump(a,m) \
-   lowsyslog(LOG_DEBUG, "ENCX24J600: %02x&=~%04x\n", a, m);
+   syslog(LOG_DEBUG, "ENCX24J600: %02x&=~%04x\n", a, m);
 #  define enc_cmddump(c) \
-   lowsyslog(LOG_DEBUG, "ENCX24J600: CMD: %02x\n", c);
+   syslog(LOG_DEBUG, "ENCX24J600: CMD: %02x\n", c);
 #  define enc_bmdump(c,b,s) \
-   lowsyslog(LOG_DEBUG, "ENCX24J600: CMD: %02x buffer: %p length: %d\n", c, b, s);
+   syslog(LOG_DEBUG, "ENCX24J600: CMD: %02x buffer: %p length: %d\n", c, b, s);
 #else
 #  define enc_wrdump(a,v)
 #  define enc_rddump(a,v)
@@ -274,6 +276,12 @@ struct enc_driver_s
  * Private Data
  ****************************************************************************/
 
+/* A single packet buffer is used */
+
+static uint8_t g_pktbuf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
+
+/* Driver status structure */
+
 static struct enc_driver_s g_encx24j600[CONFIG_ENCX24J600_NINTERFACES];
 
 /****************************************************************************
@@ -482,7 +490,7 @@ static inline void enc_setethrst(FAR struct enc_driver_s *priv)
 {
   DEBUGASSERT(priv && priv->spi);
 
-  /* Select ENC28J60 chip */
+  /* Select ENCX24J600 chip */
 
   SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
 
@@ -492,7 +500,7 @@ static inline void enc_setethrst(FAR struct enc_driver_s *priv)
 
   up_udelay(25);
 
-  /* De-select ENC28J60 chip. */
+  /* De-select ENCX24J600 chip. */
 
   SPI_SELECT(priv->spi, SPIDEV_ETHERNET, false);
   enc_cmddump(ENC_SETETHRST);
@@ -764,56 +772,56 @@ static void enc_bfc(FAR struct enc_driver_s *priv, uint16_t ctrlreg,
 #if 0 /* Sometimes useful */
 static void enc_rxdump(FAR struct enc_driver_s *priv)
 {
-  lowsyslog(LOG_DEBUG, "Rx Registers:\n");
-  lowsyslog(LOG_DEBUG, "  EIE:      %02x EIR:      %02x\n",
-            enc_rdgreg(priv, ENC_EIE), enc_rdgreg(priv, ENC_EIR));
-  lowsyslog(LOG_DEBUG, "  ESTAT:    %02x ECON1:    %02x ECON2:    %02x\n",
-            enc_rdgreg(priv, ENC_ESTAT), enc_rdgreg(priv, ENC_ECON1),
-            enc_rdgreg(priv, ENC_ECON2));
-  lowsyslog(LOG_DEBUG, "  ERXST:    %02x %02x\n",
-            enc_rdbreg(priv, ENC_ERXSTH), enc_rdbreg(priv, ENC_ERXSTL));
-  lowsyslog(LOG_DEBUG, "  ERXND:    %02x %02x\n",
-            enc_rdbreg(priv, ENC_ERXNDH), enc_rdbreg(priv, ENC_ERXNDL));
-  lowsyslog(LOG_DEBUG, "  ERXRDPT:  %02x %02x\n",
-            enc_rdbreg(priv, ENC_ERXRDPTH), enc_rdbreg(priv, ENC_ERXRDPTL));
-  lowsyslog(LOG_DEBUG, "  ERXFCON:  %02x EPKTCNT:  %02x\n",
-            enc_rdbreg(priv, ENC_ERXFCON), enc_rdbreg(priv, ENC_EPKTCNT));
-  lowsyslog(LOG_DEBUG, "  MACON1:   %02x MACON3:   %02x\n",
-            enc_rdbreg(priv, ENC_MACON1), enc_rdbreg(priv, ENC_MACON3));
-  lowsyslog(LOG_DEBUG, "  MAMXFL:   %02x %02x\n",
-            enc_rdbreg(priv, ENC_MAMXFLH), enc_rdbreg(priv, ENC_MAMXFLL));
-  lowsyslog(LOG_DEBUG, "  MAADR:    %02x:%02x:%02x:%02x:%02x:%02x\n",
-            enc_rdbreg(priv, ENC_MAADR1), enc_rdbreg(priv, ENC_MAADR2),
-            enc_rdbreg(priv, ENC_MAADR3), enc_rdbreg(priv, ENC_MAADR4),
-            enc_rdbreg(priv, ENC_MAADR5), enc_rdbreg(priv, ENC_MAADR6));
+  syslog(LOG_DEBUG, "Rx Registers:\n");
+  syslog(LOG_DEBUG, "  EIE:      %02x EIR:      %02x\n",
+         enc_rdgreg(priv, ENC_EIE), enc_rdgreg(priv, ENC_EIR));
+  syslog(LOG_DEBUG, "  ESTAT:    %02x ECON1:    %02x ECON2:    %02x\n",
+         enc_rdgreg(priv, ENC_ESTAT), enc_rdgreg(priv, ENC_ECON1),
+         enc_rdgreg(priv, ENC_ECON2));
+  syslog(LOG_DEBUG, "  ERXST:    %02x %02x\n",
+         enc_rdbreg(priv, ENC_ERXSTH), enc_rdbreg(priv, ENC_ERXSTL));
+  syslog(LOG_DEBUG, "  ERXND:    %02x %02x\n",
+         enc_rdbreg(priv, ENC_ERXNDH), enc_rdbreg(priv, ENC_ERXNDL));
+  syslog(LOG_DEBUG, "  ERXRDPT:  %02x %02x\n",
+         enc_rdbreg(priv, ENC_ERXRDPTH), enc_rdbreg(priv, ENC_ERXRDPTL));
+  syslog(LOG_DEBUG, "  ERXFCON:  %02x EPKTCNT:  %02x\n",
+         enc_rdbreg(priv, ENC_ERXFCON), enc_rdbreg(priv, ENC_EPKTCNT));
+  syslog(LOG_DEBUG, "  MACON1:   %02x MACON3:   %02x\n",
+         enc_rdbreg(priv, ENC_MACON1), enc_rdbreg(priv, ENC_MACON3));
+  syslog(LOG_DEBUG, "  MAMXFL:   %02x %02x\n",
+         enc_rdbreg(priv, ENC_MAMXFLH), enc_rdbreg(priv, ENC_MAMXFLL));
+  syslog(LOG_DEBUG, "  MAADR:    %02x:%02x:%02x:%02x:%02x:%02x\n",
+         enc_rdbreg(priv, ENC_MAADR1), enc_rdbreg(priv, ENC_MAADR2),
+         enc_rdbreg(priv, ENC_MAADR3), enc_rdbreg(priv, ENC_MAADR4),
+         enc_rdbreg(priv, ENC_MAADR5), enc_rdbreg(priv, ENC_MAADR6));
 }
 #endif
 
 #if 0 /* Sometimes useful */
 static void enc_txdump(FAR struct enc_driver_s *priv)
 {
-  lowsyslog(LOG_DEBUG, "Tx Registers:\n");
-  lowsyslog(LOG_DEBUG, "  EIE:      %02x EIR:      %02x\n",
-            enc_rdgreg(priv, ENC_EIE), enc_rdgreg(priv, ENC_EIR));
-  lowsyslog(LOG_DEBUG, "  ESTAT:    %02x ECON1:    %02x\n",
-            enc_rdgreg(priv, ENC_ESTAT), enc_rdgreg(priv, ENC_ECON1));
-  lowsyslog(LOG_DEBUG, "  ETXST:    %02x %02x\n",
-            enc_rdbreg(priv, ENC_ETXSTH), enc_rdbreg(priv, ENC_ETXSTL));
-  lowsyslog(LOG_DEBUG, "  ETXND:    %02x %02x\n",
-            enc_rdbreg(priv, ENC_ETXNDH), enc_rdbreg(priv, ENC_ETXNDL));
-  lowsyslog(LOG_DEBUG, "  MACON1:   %02x MACON3:   %02x MACON4:   %02x\n",
-            enc_rdbreg(priv, ENC_MACON1), enc_rdbreg(priv, ENC_MACON3),
-            enc_rdbreg(priv, ENC_MACON4));
-  lowsyslog(LOG_DEBUG, "  MACON1:   %02x MACON3:   %02x MACON4:   %02x\n",
-            enc_rdbreg(priv, ENC_MACON1), enc_rdbreg(priv, ENC_MACON3),
-            enc_rdbreg(priv, ENC_MACON4));
-  lowsyslog(LOG_DEBUG, "  MABBIPG:  %02x MAIPG %02x %02x\n",
-            enc_rdbreg(priv, ENC_MABBIPG), enc_rdbreg(priv, ENC_MAIPGH),
-            enc_rdbreg(priv, ENC_MAIPGL));
-  lowsyslog(LOG_DEBUG, "  MACLCON1: %02x MACLCON2:   %02x\n",
-            enc_rdbreg(priv, ENC_MACLCON1), enc_rdbreg(priv, ENC_MACLCON2));
-  lowsyslog(LOG_DEBUG, "  MAMXFL:   %02x %02x\n",
-            enc_rdbreg(priv, ENC_MAMXFLH), enc_rdbreg(priv, ENC_MAMXFLL));
+  syslog(LOG_DEBUG, "Tx Registers:\n");
+  syslog(LOG_DEBUG, "  EIE:      %02x EIR:      %02x\n",
+         enc_rdgreg(priv, ENC_EIE), enc_rdgreg(priv, ENC_EIR));
+  syslog(LOG_DEBUG, "  ESTAT:    %02x ECON1:    %02x\n",
+         enc_rdgreg(priv, ENC_ESTAT), enc_rdgreg(priv, ENC_ECON1));
+  syslog(LOG_DEBUG, "  ETXST:    %02x %02x\n",
+         enc_rdbreg(priv, ENC_ETXSTH), enc_rdbreg(priv, ENC_ETXSTL));
+  syslog(LOG_DEBUG, "  ETXND:    %02x %02x\n",
+         enc_rdbreg(priv, ENC_ETXNDH), enc_rdbreg(priv, ENC_ETXNDL));
+  syslog(LOG_DEBUG, "  MACON1:   %02x MACON3:   %02x MACON4:   %02x\n",
+         enc_rdbreg(priv, ENC_MACON1), enc_rdbreg(priv, ENC_MACON3),
+         enc_rdbreg(priv, ENC_MACON4));
+  syslog(LOG_DEBUG, "  MACON1:   %02x MACON3:   %02x MACON4:   %02x\n",
+         enc_rdbreg(priv, ENC_MACON1), enc_rdbreg(priv, ENC_MACON3),
+         enc_rdbreg(priv, ENC_MACON4));
+  syslog(LOG_DEBUG, "  MABBIPG:  %02x MAIPG %02x %02x\n",
+         enc_rdbreg(priv, ENC_MABBIPG), enc_rdbreg(priv, ENC_MAIPGH),
+         enc_rdbreg(priv, ENC_MAIPGL));
+  syslog(LOG_DEBUG, "  MACLCON1: %02x MACLCON2:   %02x\n",
+         enc_rdbreg(priv, ENC_MACLCON1), enc_rdbreg(priv, ENC_MACLCON2));
+  syslog(LOG_DEBUG, "  MAMXFL:   %02x %02x\n",
+         enc_rdbreg(priv, ENC_MAMXFLH), enc_rdbreg(priv, ENC_MAMXFLL));
 }
 #endif
 
@@ -1127,7 +1135,7 @@ static int enc_txenqueue(FAR struct enc_driver_s *priv)
     }
   else
     {
-      nlldbg("no free descriptors\n");
+      nerr("ERROR: no free descriptors\n");
       ret = -ENOMEM;
     }
 
@@ -1165,7 +1173,7 @@ static int enc_txpoll(struct net_driver_s *dev)
    * the field d_len is set to a value > 0.
    */
 
-  nllvdbg("Poll result: d_len=%d\n", priv->dev.d_len);
+  ninfo("Poll result: d_len=%d\n", priv->dev.d_len);
 
   if (priv->dev.d_len > 0)
     {
@@ -1287,15 +1295,6 @@ static void enc_txif(FAR struct enc_driver_s *priv)
 
       wd_cancel(priv->txtimeout);
 
-      /* Then make sure that the TX poll timer is running (if it is already
-       * running, the following would restart it).  This is necessary to
-       * avoid certain race conditions where the polling sequence can be
-       * interrupted.
-       */
-
-      (void)wd_start(priv->txpoll, ENC_WDDELAY, enc_polltimer, 1,
-                     (wdparm_t)priv);
-
       /* Poll for TX packets from the networking layer */
 
       devif_poll(&priv->dev, enc_txpoll);
@@ -1331,7 +1330,7 @@ static void enc_rxldpkt(FAR struct enc_driver_s *priv,
 {
   DEBUGASSERT(priv != NULL && descr != NULL);
 
-  nllvdbg("load packet @%04x len: %d\n", descr->addr, descr->len);
+  ninfo("load packet @%04x len: %d\n", descr->addr, descr->len);
 
   /* Set the rx data pointer to the start of the received packet (ERXRDPT) */
 
@@ -1403,7 +1402,7 @@ static void enc_rxrmpkt(FAR struct enc_driver_s *priv, FAR struct enc_descr_s *d
 {
   uint16_t addr;
 
-  nllvdbg("free descr: %p\n", descr);
+  ninfo("free descr: %p\n", descr);
 
   /* If it is the last descriptor in the queue, advance ERXTAIL.
    * This way it is possible that gaps occcur. Maybe pending packets
@@ -1420,7 +1419,7 @@ static void enc_rxrmpkt(FAR struct enc_driver_s *priv, FAR struct enc_descr_s *d
 
           DEBUGASSERT(addr >= PKTMEM_RX_START &&  addr < PKTMEM_RX_END);
 
-          nllvdbg("ERXTAIL %04x\n", addr);
+          ninfo("ERXTAIL %04x\n", addr);
 
           enc_wrreg(priv, ENC_ERXTAIL, addr);
 
@@ -1490,7 +1489,7 @@ static void enc_rxdispatch(FAR struct enc_driver_s *priv)
 #ifdef CONFIG_NET_IPv4
       if (BUF->type == HTONS(ETHTYPE_IP))
         {
-          nllvdbg("IPv4 frame\n");
+          ninfo("IPv4 frame\n");
           NETDEV_RXIPV4(&priv->dev);
 
           /* Handle ARP on input then give the IPv4 packet to the network
@@ -1540,7 +1539,7 @@ static void enc_rxdispatch(FAR struct enc_driver_s *priv)
 #ifdef CONFIG_NET_IPv6
       if (BUF->type == HTONS(ETHTYPE_IP6))
         {
-          nllvdbg("Iv6 frame\n");
+          ninfo("Iv6 frame\n");
           NETDEV_RXIPV6(&priv->dev);
 
           /* Give the IPv6 packet to the network layer */
@@ -1587,7 +1586,7 @@ static void enc_rxdispatch(FAR struct enc_driver_s *priv)
 #ifdef CONFIG_NET_ARP
       if (BUF->type == htons(ETHTYPE_ARP))
         {
-          nllvdbg("ARP packet received (%02x)\n", BUF->type);
+          ninfo("ARP packet received (%02x)\n", BUF->type);
           NETDEV_RXARP(&priv->dev);
 
           arp_arpin(&priv->dev);
@@ -1612,7 +1611,7 @@ static void enc_rxdispatch(FAR struct enc_driver_s *priv)
 
           enc_rxrmpkt(priv, descr);
 
-          nlldbg("Unsupported packet type dropped (%02x)\n", htons(BUF->type));
+          nerr("ERROR: Unsupported packet type dropped (%02x)\n", htons(BUF->type));
           NETDEV_RXDROPPED(&priv->dev);
         }
 
@@ -1684,8 +1683,8 @@ static void enc_pktif(FAR struct enc_driver_s *priv)
       rxstat        = (uint32_t)rsv[7] << 24 | (uint32_t)rsv[6] << 16 |
                       (uint32_t)rsv[5] << 8  | (uint32_t)rsv[4];
 
-      nllvdbg("Receiving packet, nextpkt: %04x pktlen: %d rxstat: %08x pktcnt: %d\n",
-             priv->nextpkt, pktlen, rxstat, pktcnt);
+      ninfo("Receiving packet, nextpkt: %04x pktlen: %d rxstat: %08x pktcnt: %d\n",
+            priv->nextpkt, pktlen, rxstat, pktcnt);
 
       /* We enqueue the packet first and remove it later if its faulty.
        * This way we avoid freeing packets that are not processed yet.
@@ -1707,7 +1706,7 @@ static void enc_pktif(FAR struct enc_driver_s *priv)
 
       if ((rxstat & RXSTAT_OK) == 0)
         {
-          nlldbg("ERROR: RXSTAT: %08x\n", rxstat);
+          nerr("ERROR: RXSTAT: %08x\n", rxstat);
 
           /* Discard packet */
 
@@ -1719,7 +1718,7 @@ static void enc_pktif(FAR struct enc_driver_s *priv)
 
       else if (pktlen > (CONFIG_NET_ETH_MTU + 4) || pktlen <= (ETH_HDRLEN + 4))
         {
-          nlldbg("Bad packet size dropped (%d)\n", pktlen);
+          nerr("ERROR: Bad packet size dropped (%d)\n", pktlen);
 
           /* Discard packet */
 
@@ -1774,17 +1773,17 @@ static void enc_rxabtif(FAR struct enc_driver_s *priv)
 #if 0
   /* Free the last received packet from the RX queue */
 
-  nlldbg("rx abort\n");
-  nlldbg("ESTAT:   %04x\n", enc_rdreg(priv, ENC_ESTAT));
-  nlldbg("EIR:     %04x\n", enc_rdreg(priv, ENC_EIR));
-  nlldbg("ERXTAIL: %04x\n", enc_rdreg(priv, ENC_ERXTAIL));
-  nlldbg("ERXHAED: %04x\n", enc_rdreg(priv, ENC_ERXHEAD));
+  ninfo("rx abort\n");
+  ninfo("ESTAT:   %04x\n", enc_rdreg(priv, ENC_ESTAT));
+  ninfo("EIR:     %04x\n", enc_rdreg(priv, ENC_EIR));
+  ninfo("ERXTAIL: %04x\n", enc_rdreg(priv, ENC_ERXTAIL));
+  ninfo("ERXHAED: %04x\n", enc_rdreg(priv, ENC_ERXHEAD));
 
   descr = (FAR struct enc_descr_s *)sq_peek(&priv->rxqueue);
 
   while (descr != NULL)
     {
-      nlldbg("addr: %04x len: %d\n", descr->addr, descr->len);
+      ninfo("addr: %04x len: %d\n", descr->addr, descr->len);
       descr = (FAR struct enc_descr_s *)sq_next(descr);
     }
 
@@ -1797,7 +1796,7 @@ static void enc_rxabtif(FAR struct enc_driver_s *priv)
     {
       enc_rxrmpkt(priv, descr);
 
-      nlldbg("pending packet freed\n");
+      ninfo("pending packet freed\n");
     }
   else
     {
@@ -1827,14 +1826,13 @@ static void enc_rxabtif(FAR struct enc_driver_s *priv)
 static void enc_irqworker(FAR void *arg)
 {
   FAR struct enc_driver_s *priv = (FAR struct enc_driver_s *)arg;
-  net_lock_t lock;
   uint16_t eir;
 
   DEBUGASSERT(priv);
 
   /* Get exclusive access to both the network and the SPI bus. */
 
-  lock = net_lock();
+  net_lock();
   enc_lock(priv);
 
   /* A good practice is for the host controller to clear the Global Interrupt
@@ -1859,7 +1857,7 @@ static void enc_irqworker(FAR void *arg)
        * settings.
        */
 
-      nllvdbg("EIR: %04x\n", eir);
+      ninfo("EIR: %04x\n", eir);
 
       if ((eir & EIR_DMAIF) != 0) /* DMA interrupt */
         {
@@ -1978,7 +1976,7 @@ static void enc_irqworker(FAR void *arg)
   /* Release lock on the SPI bus and the network */
 
   enc_unlock(priv);
-  net_unlock(lock);
+  net_unlock();
 }
 
 /****************************************************************************
@@ -2017,7 +2015,7 @@ static int enc_interrupt(int irq, FAR void *context)
    */
 
   priv->lower->disable(priv->lower);
-  return work_queue(HPWORK, &priv->irqwork, enc_irqworker, (FAR void *)priv, 0);
+  return work_queue(ENCWORK, &priv->irqwork, enc_irqworker, (FAR void *)priv, 0);
 }
 
 /****************************************************************************
@@ -2040,15 +2038,14 @@ static int enc_interrupt(int irq, FAR void *context)
 static void enc_toworker(FAR void *arg)
 {
   FAR struct enc_driver_s *priv = (FAR struct enc_driver_s *)arg;
-  net_lock_t lock;
   int ret;
 
-  nlldbg("Tx timeout\n");
+  nerr("ERROR: Tx timeout\n");
   DEBUGASSERT(priv);
 
   /* Get exclusive access to the network. */
 
-  lock = net_lock();
+  net_lock();
 
   /* Increment statistics and dump debug info */
 
@@ -2070,7 +2067,7 @@ static void enc_toworker(FAR void *arg)
 
   /* Release the network */
 
-  net_unlock(lock);
+  net_unlock();
 }
 
 /****************************************************************************
@@ -2109,7 +2106,7 @@ static void enc_txtimeout(int argc, uint32_t arg, ...)
    * can occur until we restart the Tx timeout watchdog.
    */
 
-  ret = work_queue(HPWORK, &priv->towork, enc_toworker, (FAR void *)priv, 0);
+  ret = work_queue(ENCWORK, &priv->towork, enc_toworker, (FAR void *)priv, 0);
   (void)ret;
   DEBUGASSERT(ret == OK);
 }
@@ -2134,13 +2131,12 @@ static void enc_txtimeout(int argc, uint32_t arg, ...)
 static void enc_pollworker(FAR void *arg)
 {
   FAR struct enc_driver_s *priv = (FAR struct enc_driver_s *)arg;
-  net_lock_t lock;
 
   DEBUGASSERT(priv);
 
   /* Get exclusive access to both the network and the SPI bus. */
 
-  lock = net_lock();
+  net_lock();
   enc_lock(priv);
 
   /* Verify that the hardware is ready to send another packet.  The driver
@@ -2162,7 +2158,7 @@ static void enc_pollworker(FAR void *arg)
   /* Release lock on the SPI bus and the network */
 
   enc_unlock(priv);
-  net_unlock(lock);
+  net_unlock();
 
   /* Setup the watchdog poll timer again */
 
@@ -2204,7 +2200,7 @@ static void enc_polltimer(int argc, uint32_t arg, ...)
    * occur until we restart the poll timeout watchdog.
    */
 
-  ret = work_queue(HPWORK, &priv->pollwork, enc_pollworker, (FAR void *)priv, 0);
+  ret = work_queue(ENCWORK, &priv->pollwork, enc_pollworker, (FAR void *)priv, 0);
   (void)ret;
   DEBUGASSERT(ret == OK);
 }
@@ -2231,8 +2227,8 @@ static int enc_ifup(struct net_driver_s *dev)
   FAR struct enc_driver_s *priv = (FAR struct enc_driver_s *)dev->d_private;
   int ret;
 
-  nlldbg("Bringing up: %d.%d.%d.%d\n",
-         dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
         (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 
   /* Lock the SPI bus so that we have exclusive access */
@@ -2307,9 +2303,9 @@ static int enc_ifdown(struct net_driver_s *dev)
   irqstate_t flags;
   int ret;
 
-  nlldbg("Taking down: %d.%d.%d.%d\n",
-         dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-         (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Taking down: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 
   /* Lock the SPI bus so that we have exclusive access */
 
@@ -2420,7 +2416,7 @@ static int enc_rxavail(struct net_driver_s *dev)
 
   if (!sq_empty(&priv->rxqueue))
     {
-      nllvdbg("RX queue not empty, trying to dispatch\n");
+      ninfo("RX queue not empty, trying to dispatch\n");
       enc_rxdispatch(priv);
     }
 
@@ -2546,7 +2542,7 @@ static void enc_pwrsave(FAR struct enc_driver_s *priv)
 {
   uint16_t regval;
 
-  nllvdbg("Set PWRSV\n");
+  ninfo("Set PWRSV\n");
 
   /* 1. Turn off AES */
 
@@ -2597,7 +2593,7 @@ static void enc_ldmacaddr(FAR struct enc_driver_s *priv)
   uint16_t regval;
   uint8_t *mac = priv->dev.d_mac.ether_addr_octet;
 
-  nvdbg("Using ENCX24J600's built in MAC address\n");
+  ninfo("Using ENCX24J600's built in MAC address\n");
 
   regval = enc_rdreg(priv, ENC_MAADR1);
   mac[0] = regval & 0xff;
@@ -2648,7 +2644,7 @@ static void enc_setmacaddr(FAR struct enc_driver_s *priv)
     {
       /* There is a user defined mac address. Write it to the ENCXJ600 */
 
-      nvdbg("Using an user defined MAC address\n");
+      ninfo("Using an user defined MAC address\n");
 
       enc_wrreg(priv, ENC_MAADR1, (uint16_t)mac[1] << 8 | (uint16_t)mac[0]);
       enc_wrreg(priv, ENC_MAADR2, (uint16_t)mac[3] << 8 | (uint16_t)mac[2]);
@@ -2728,7 +2724,7 @@ static int enc_reset(FAR struct enc_driver_s *priv)
   int ret;
   uint16_t regval;
 
-  nllvdbg("Reset\n");
+  ninfo("Reset\n");
 
   do
     {
@@ -2742,7 +2738,7 @@ static int enc_reset(FAR struct enc_driver_s *priv)
 
   if (ret != OK)
     {
-      nlldbg("ERROR: encx24j600 clock failed to become ready\n");
+      nerr("ERROR: encx24j600 clock failed to become ready\n");
       return -ENODEV;
     }
 
@@ -2756,7 +2752,7 @@ static int enc_reset(FAR struct enc_driver_s *priv)
 
   if (regval != 0x0000)
     {
-      nlldbg("ERROR: encx24j600 seems not to be reset properly\n");
+      nerr("ERROR: encx24j600 seems not to be reset properly\n");
       return -ENODEV;
     }
 
@@ -2793,7 +2789,7 @@ static int enc_reset(FAR struct enc_driver_s *priv)
     }
   while ((regval & PHSTAT1_ANDONE) != 0);
 
-  nllvdbg("Auto-negotation completed\n");
+  ninfo("Auto-negotation completed\n");
 
 #endif
 
@@ -2813,7 +2809,7 @@ static int enc_reset(FAR struct enc_driver_s *priv)
 #if 0
   if (ret != OK)
     {
-      nlldbg("ERROR: encx24j600 failed to establish link\n");
+      nerr("ERROR: encx24j600 failed to establish link\n");
       return -ENODEV;
     }
 #endif
@@ -2858,6 +2854,7 @@ int enc_initialize(FAR struct spi_dev_s *spi,
   /* Initialize the driver structure */
 
   memset(g_encx24j600, 0, CONFIG_ENCX24J600_NINTERFACES*sizeof(struct enc_driver_s));
+  priv->dev.d_buf     = g_pktbuf;     /* Single packet buffer */
   priv->dev.d_ifup    = enc_ifup;     /* I/F up (new IP address) callback */
   priv->dev.d_ifdown  = enc_ifdown;   /* I/F down callback */
   priv->dev.d_txavail = enc_txavail;  /* New TX data callback */
diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c
index 9cbdba7022dccdcc4b7625444f4cc346078fb366..fbc5f909b16a97e2e1addf56cb8dcedd30cc7110 100644
--- a/drivers/net/ftmac100.c
+++ b/drivers/net/ftmac100.c
@@ -56,11 +56,7 @@
 #include 
 #include 
 #include 
-
-#ifdef CONFIG_NET_NOINTS
-#  include 
-#endif
-
+#include 
 #include 
 #include 
 #include 
@@ -72,12 +68,23 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
-/* If processing is not done at the interrupt level, then high priority
- * work queue support is required.
+/* If processing is not done at the interrupt level, then work queue support
+ * is required.
  */
 
-#if defined(CONFIG_NET_NOINTS) && !defined(CONFIG_SCHED_HPWORK)
-#  error High priority work queue support is required
+#if !defined(CONFIG_SCHED_WORKQUEUE)
+#  error Work queue support is required in this configuration (CONFIG_SCHED_WORKQUEUE)
+#else
+
+  /* Use the low priority work queue if possible */
+
+#  if defined(CONFIG_FTMAC100_HPWORK)
+#    define FTMAWORK HPWORK
+#  elif defined(CONFIG_FTMAC100_LPWORK)
+#    define FTMAWORK LPWORK
+#  else
+#    error Neither CONFIG_FTMAC100_HPWORK nor CONFIG_FTMAC100_LPWORK defined
+#  endif
 #endif
 
 /* CONFIG_FTMAC100_NINTERFACES determines the number of physical interfaces
@@ -166,10 +173,9 @@ struct ftmac100_driver_s
   bool ft_bifup;               /* true:ifup false:ifdown */
   WDOG_ID ft_txpoll;           /* TX poll timer */
   WDOG_ID ft_txtimeout;        /* TX timeout timer */
-#ifdef CONFIG_NET_NOINTS
   unsigned int status;         /* Last ISR status */
-  struct work_s ft_work;       /* For deferring work to the work queue */
-#endif
+  struct work_s ft_irqwork;    /* For deferring work to the work queue */
+  struct work_s ft_pollwork;   /* For deferring work to the work queue */
 
   /* This holds the information visible to the NuttX network */
 
@@ -180,6 +186,12 @@ struct ftmac100_driver_s
  * Private Data
  ****************************************************************************/
 
+/* A single packet buffer is used */
+
+static uint8_t g_pktbuf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
+
+/* Driver state structure. */
+
 static struct ftmac100_driver_s g_ftmac100[CONFIG_FTMAC100_NINTERFACES]
   __attribute__((aligned(16)));
 
@@ -197,35 +209,26 @@ static int  ftmac100_txpoll(struct net_driver_s *dev);
 static void ftmac100_reset(FAR struct ftmac100_driver_s *priv);
 static void ftmac100_receive(FAR struct ftmac100_driver_s *priv);
 static void ftmac100_txdone(FAR struct ftmac100_driver_s *priv);
-static inline void ftmac100_interrupt_process(FAR struct ftmac100_driver_s *priv);
-#ifdef CONFIG_NET_NOINTS
+
 static void ftmac100_interrupt_work(FAR void *arg);
-#endif
-static int  ftmac100_interrupt(int irq, FAR void *context);
+static int  ftmac100_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
-static inline void ftmac100_txtimeout_process(FAR struct ftmac100_driver_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void ftmac100_txtimeout_work(FAR void *arg);
-#endif
 static void ftmac100_txtimeout_expiry(int argc, uint32_t arg, ...);
 
-static inline void ftmac100_poll_process(FAR struct ftmac100_driver_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void ftmac100_poll_work(FAR void *arg);
-#endif
 static void ftmac100_poll_expiry(int argc, uint32_t arg, ...);
 
 /* NuttX callback functions */
 
 static int ftmac100_ifup(FAR struct net_driver_s *dev);
 static int ftmac100_ifdown(FAR struct net_driver_s *dev);
-static inline void ftmac100_txavail_process(FAR struct ftmac100_driver_s *priv);
-#ifdef CONFIG_NET_NOINTS
+
 static void ftmac100_txavail_work(FAR void *arg);
-#endif
 static int ftmac100_txavail(FAR struct net_driver_s *dev);
+
 #if defined(CONFIG_NET_IGMP) || defined(CONFIG_NET_ICMPv6)
 static int ftmac100_addmac(FAR struct net_driver_s *dev, FAR const uint8_t *mac);
 #ifdef CONFIG_NET_IGMP
@@ -285,7 +288,7 @@ static int ftmac100_transmit(FAR struct ftmac100_driver_s *priv)
   int len = priv->ft_dev.d_len;
 //irqstate_t flags;
 //flags = enter_critical_section();
-//nvdbg("flags=%08x\n", flags);
+//ninfo("flags=%08x\n", flags);
 
   txdes = ftmac100_current_txdes(priv);
 
@@ -307,7 +310,7 @@ static int ftmac100_transmit(FAR struct ftmac100_driver_s *priv)
                     FTMAC100_TXDES1_TXBUF_SIZE(len));
   txdes->txdes0 |= FTMAC100_TXDES0_TXDMA_OWN;
 
-  nvdbg("ftmac100_transmit[%x]: copy %08x to %08x %04x\n",
+  ninfo("ftmac100_transmit[%x]: copy %08x to %08x %04x\n",
         priv->tx_pointer, priv->ft_dev.d_buf, txdes->txdes2, len);
 
   priv->tx_pointer = (priv->tx_pointer + 1) & (CONFIG_FTMAC100_TX_DESC - 1);
@@ -422,7 +425,7 @@ static void ftmac100_reset(FAR struct ftmac100_driver_s *priv)
 {
   FAR struct ftmac100_register_s *iobase = (FAR struct ftmac100_register_s *)priv->iobase;
 
-  nvdbg("%s(): iobase=%p\n", __func__, iobase);
+  ninfo("%s(): iobase=%p\n", __func__, iobase);
 
   putreg32 (FTMAC100_MACCR_SW_RST, &iobase->maccr);
 
@@ -455,7 +458,7 @@ static void ftmac100_init(FAR struct ftmac100_driver_s *priv)
   FAR unsigned char *kmem;
   int i;
 
-  ndbg ("%s()\n", __func__);
+  nerr ("%s()\n", __func__);
 
   /* Disable all interrupts */
 
@@ -472,7 +475,7 @@ static void ftmac100_init(FAR struct ftmac100_driver_s *priv)
 
   kmem = memalign(RX_BUF_SIZE, CONFIG_FTMAC100_RX_DESC * RX_BUF_SIZE);
 
-  nvdbg("KMEM=%08x\n", kmem);
+  ninfo("KMEM=%08x\n", kmem);
 
   for (i = 0; i < CONFIG_FTMAC100_RX_DESC; i++)
     {
@@ -502,7 +505,7 @@ static void ftmac100_init(FAR struct ftmac100_driver_s *priv)
 
   /* transmit ring */
 
-  nvdbg("priv=%08x txdes=%08x rxdes=%08x\n", priv, txdes, rxdes);
+  ninfo("priv=%08x txdes=%08x rxdes=%08x\n", priv, txdes, rxdes);
 
   putreg32 ((unsigned int)txdes, &iobase->txr_badr);
 
@@ -568,7 +571,7 @@ static uint32_t ftmac100_mdio_read(FAR struct ftmac100_register_s *iobase, int r
   for (i = 0; i < 10; i++)
     {
       phycr = getreg32(&iobase->phycr);
-      nvdbg("%02x %d phycr=%08x\n", reg, i, phycr);
+      ninfo("%02x %d phycr=%08x\n", reg, i, phycr);
 
       if ((phycr & FTMAC100_PHYCR_MIIRD) == 0)
         {
@@ -603,7 +606,7 @@ static void ftmac100_set_mac(FAR struct ftmac100_driver_s *priv,
   unsigned int maddr = mac[0] << 8 | mac[1];
   unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
 
-  nvdbg("%s(%x %x)\n", __func__, maddr, laddr);
+  ninfo("%s(%x %x)\n", __func__, maddr, laddr);
 
   putreg32(maddr, &iobase->mac_madr);
   putreg32(laddr, &iobase->mac_ladr);
@@ -656,7 +659,7 @@ static void ftmac100_receive(FAR struct ftmac100_driver_s *priv)
 
       if (!found)
         {
-          nvdbg("\nNOT FOUND\nCurrent RX %d rxdes0=%08x\n",
+          ninfo("\nNOT FOUND\nCurrent RX %d rxdes0=%08x\n",
                 priv->rx_pointer, rxdes->rxdes0);
           return;
         }
@@ -664,7 +667,7 @@ static void ftmac100_receive(FAR struct ftmac100_driver_s *priv)
       len = FTMAC100_RXDES0_RFL(rxdes->rxdes0);
       data = (uint8_t *)rxdes->rxdes2;
 
-      nvdbg ("RX buffer %d (%08x), %x received (%d)\n",
+      ninfo ("RX buffer %d (%08x), %x received (%d)\n",
              priv->rx_pointer, data, len, (rxdes->rxdes0 & FTMAC100_RXDES0_LRS));
 
       /* Copy the data data from the hardware to priv->ft_dev.d_buf.  Set
@@ -685,7 +688,7 @@ static void ftmac100_receive(FAR struct ftmac100_driver_s *priv)
 #ifdef CONFIG_NET_IPv4
       if (BUF->type == HTONS(ETHTYPE_IP))
         {
-          nllvdbg("IPv4 frame\n");
+          ninfo("IPv4 frame\n");
 
           /* Handle ARP on input then give the IPv4 packet to the network
            * layer
@@ -725,7 +728,7 @@ static void ftmac100_receive(FAR struct ftmac100_driver_s *priv)
 #ifdef CONFIG_NET_IPv6
       if (BUF->type == HTONS(ETHTYPE_IP6))
         {
-          nllvdbg("Iv6 frame\n");
+          ninfo("Iv6 frame\n");
 
           /* Give the IPv6 packet to the network layer */
 
@@ -835,56 +838,47 @@ static void ftmac100_txdone(FAR struct ftmac100_driver_s *priv)
    * disable further Tx interrupts.
    */
 
-  nvdbg("txpending=%d\n", priv->tx_pending);
+  ninfo("txpending=%d\n", priv->tx_pending);
 
   /* Cancel the TX timeout */
 
   wd_cancel(priv->ft_txtimeout);
 
-  /* Then make sure that the TX poll timer is running (if it is already
-   * running, the following would restart it).  This is necessary to avoid
-   * certain race conditions where the polling sequence can be interrupted.
-   */
-
-  (void)wd_start(priv->ft_txpoll, FTMAC100_WDDELAY, ftmac100_poll_expiry, 1,
-                 (wdparm_t)priv);
-
   /* Then poll the network for new XMIT data */
 
   (void)devif_poll(&priv->ft_dev, ftmac100_txpoll);
 }
 
 /****************************************************************************
- * Function: ftmac100_interrupt_process
+ * Function: ftmac100_interrupt_work
  *
  * Description:
- *   Interrupt processing.  This may be performed either within the interrupt
- *   handler or on the worker thread, depending upon the configuration
+ *   Perform interrupt related work from the worker thread
  *
  * Parameters:
- *   priv - Reference to the driver state structure
+ *   arg - The argument passed when work_queue() was called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
  *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static inline void ftmac100_interrupt_process(FAR struct ftmac100_driver_s *priv)
+static void ftmac100_interrupt_work(FAR void *arg)
 {
+  FAR struct ftmac100_driver_s *priv = (FAR struct ftmac100_driver_s *)arg;
   FAR struct ftmac100_register_s *iobase = (FAR struct ftmac100_register_s *)priv->iobase;
   unsigned int status;
   unsigned int phycr;
 
-#ifdef CONFIG_NET_NOINTS
+  /* Process pending Ethernet interrupts */
+
+  net_lock();
   status = priv->status;
-#else
-  status = getreg32 (&iobase->isr);
-#endif
 
-  nvdbg("status=%08x(%08x) BASE=%p ISR=%p PHYCR=%p\n",
+  ninfo("status=%08x(%08x) BASE=%p ISR=%p PHYCR=%p\n",
         status, getreg32(&iobase->isr), iobase, &iobase->isr, &iobase->phycr);
 
   if (!status)
@@ -913,7 +907,7 @@ static inline void ftmac100_interrupt_process(FAR struct ftmac100_driver_s *priv
 
   if (status & (FTMAC100_INT_XPKT_OK))
     {
-      nvdbg("\n\nTXDONE\n\n");
+      ninfo("\n\nTXDONE\n\n");
       ftmac100_txdone(priv);
     }
 
@@ -931,68 +925,33 @@ static inline void ftmac100_interrupt_process(FAR struct ftmac100_driver_s *priv
           priv->ft_bifup = false;
         }
 
-      nvdbg("Link: %s\n", priv->ft_bifup ? "UP" : "DOWN");
+      ninfo("Link: %s\n", priv->ft_bifup ? "UP" : "DOWN");
       ftmac100_mdio_read(iobase, 5);
     }
 
 #if 0
 #define REG(x) (*(volatile uint32_t *)(x))
-  nvdbg("\n=============================================================\n");
-  nvdbg("TM CNTL=%08x INTRS=%08x MASK=%08x LOAD=%08x COUNT=%08x M1=%08x\n",
+  ninfo("\n=============================================================\n");
+  ninfo("TM CNTL=%08x INTRS=%08x MASK=%08x LOAD=%08x COUNT=%08x M1=%08x\n",
         REG(0x98400030), REG(0x98400034), REG(0x98400038), REG(0x98400004),
         REG(0x98400000), REG(0x98400008));
-  nvdbg("IRQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n",
+  ninfo("IRQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n",
         REG(0x98800014), REG(0x98800004), REG(0x9880000C), REG(0x98800010));
-  nvdbg("FIQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n", REG(0x98800034),
+  ninfo("FIQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n", REG(0x98800034),
         REG(0x98800024), REG(0x9880002C), REG(0x98800020));
-  nvdbg("=============================================================\n");
+  ninfo("=============================================================\n");
 #endif
 
 out:
   putreg32 (INT_MASK_ALL_ENABLED, &iobase->imr);
 
-  nvdbg("ISR-done\n");
-}
-
-/****************************************************************************
- * Function: ftmac100_interrupt_work
- *
- * Description:
- *   Perform interrupt related work from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() was called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void ftmac100_interrupt_work(FAR void *arg)
-{
-  FAR struct ftmac100_driver_s *priv = (FAR struct ftmac100_driver_s *)arg;
-  net_lock_t state;
-//irqstate_t flags;
-
-  /* Process pending Ethernet interrupts */
-
-  state = net_lock();
-//flags = enter_critical_section();
-
-  ftmac100_interrupt_process(priv);
-
-//leave_critical_section(flags);
-  net_unlock(state);
+  ninfo("ISR-done\n");
+  net_unlock();
 
   /* Re-enable Ethernet interrupts */
 
   up_enable_irq(CONFIG_FTMAC100_IRQ);
 }
-#endif
 
 /****************************************************************************
  * Function: ftmac100_interrupt
@@ -1011,22 +970,17 @@ static void ftmac100_interrupt_work(FAR void *arg)
  *
  ****************************************************************************/
 
-static int ftmac100_interrupt(int irq, FAR void *context)
+static int ftmac100_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   FAR struct ftmac100_driver_s *priv = &g_ftmac100[0];
   FAR struct ftmac100_register_s *iobase = (FAR struct ftmac100_register_s *)priv->iobase;
 
-#ifdef CONFIG_NET_NOINTS
-  irqstate_t flags;
-
   /* Disable further Ethernet interrupts.  Because Ethernet interrupts are
    * also disabled if the TX timeout event occurs, there can be no race
    * condition here.
    */
 
-  flags = enter_critical_section();
-
-  priv->status = getreg32 (&iobase->isr);
+  priv->status = getreg32(&iobase->isr);
 
   up_disable_irq(CONFIG_FTMAC100_IRQ);
 
@@ -1034,7 +988,7 @@ static int ftmac100_interrupt(int irq, FAR void *context)
 
   /* TODO: Determine if a TX transfer just completed */
 
-  nvdbg("===> status=%08x\n", priv->status);
+  ninfo("===> status=%08x\n", priv->status);
 
   if (priv->status & (FTMAC100_INT_XPKT_OK))
     {
@@ -1043,57 +997,17 @@ static int ftmac100_interrupt(int irq, FAR void *context)
        * expiration and the deferred interrupt processing.
        */
 
-      nvdbg("\n\nTXDONE 0\n\n");
+      ninfo("\n\nTXDONE 0\n\n");
       wd_cancel(priv->ft_txtimeout);
     }
 
-  /* Cancel any pending poll work */
-
-  work_cancel(HPWORK, &priv->ft_work);
-
   /* Schedule to perform the interrupt processing on the worker thread. */
 
-  work_queue(HPWORK, &priv->ft_work, ftmac100_interrupt_work, priv, 0);
-
-  leave_critical_section(flags);
-#else
-  /* Process the interrupt now */
-  putreg32 (INT_MASK_ALL_DISABLED, &iobase->imr);
-
-  ftmac100_interrupt_process(priv);
-#endif
+  work_queue(FTMAWORK, &priv->ft_irqwork, ftmac100_interrupt_work, priv, 0);
 
   return OK;
 }
 
-/****************************************************************************
- * Function: ftmac100_txtimeout_process
- *
- * Description:
- *   Process a TX timeout.  Called from the either the watchdog timer
- *   expiration logic or from the worker thread, depending upon the
- *   configuration.  The timeout means that the last TX never completed.
- *   Reset the hardware and start again.
- *
- * Parameters:
- *   priv - Reference to the driver state structure
- *
- * Returned Value:
- *   None
- *
- ****************************************************************************/
-
-static inline void ftmac100_txtimeout_process(FAR struct ftmac100_driver_s *priv)
-{
-  /* Then reset the hardware */
-
-  nvdbg("TXTIMEOUT\n");
-
-  /* Then poll the network for new XMIT data */
-
-  (void)devif_poll(&priv->ft_dev, ftmac100_txpoll);
-}
-
 /****************************************************************************
  * Function: ftmac100_txtimeout_work
  *
@@ -1111,19 +1025,21 @@ static inline void ftmac100_txtimeout_process(FAR struct ftmac100_driver_s *priv
  *
  ****************************************************************************/
 
-#ifdef CONFIG_NET_NOINTS
 static void ftmac100_txtimeout_work(FAR void *arg)
 {
   FAR struct ftmac100_driver_s *priv = (FAR struct ftmac100_driver_s *)arg;
-  net_lock_t state;
+
+  ninfo("TXTIMEOUT\n");
 
   /* Process pending Ethernet interrupts */
 
-  state = net_lock();
-  ftmac100_txtimeout_process(priv);
-  net_unlock(state);
+  net_lock();
+
+  /* Then poll the network for new XMIT data */
+
+  (void)devif_poll(&priv->ft_dev, ftmac100_txpoll);
+  net_unlock();
 }
-#endif
 
 /****************************************************************************
  * Function: ftmac100_txtimeout_expiry
@@ -1148,7 +1064,6 @@ static void ftmac100_txtimeout_expiry(int argc, uint32_t arg, ...)
 {
   FAR struct ftmac100_driver_s *priv = (FAR struct ftmac100_driver_s *)arg;
 
-#ifdef CONFIG_NET_NOINTS
   /* Disable further Ethernet interrupts.  This will prevent some race
    * conditions with interrupt work.  There is still a potential race
    * condition with interrupt work that is already queued and in progress.
@@ -1156,41 +1071,36 @@ static void ftmac100_txtimeout_expiry(int argc, uint32_t arg, ...)
 
   up_disable_irq(CONFIG_FTMAC100_IRQ);
 
-  /* Cancel any pending poll or interrupt work.  This will have no effect
-   * on work that has already been started.
-   */
-
-  work_cancel(HPWORK, &priv->ft_work);
-
   /* Schedule to perform the TX timeout processing on the worker thread. */
 
-  work_queue(HPWORK, &priv->ft_work, ftmac100_txtimeout_work, priv, 0);
-#else
-  /* Process the timeout now */
-
-  ftmac100_txtimeout_process(priv);
-#endif
+  work_queue(FTMAWORK, &priv->ft_irqwork, ftmac100_txtimeout_work, priv, 0);
 }
 
 /****************************************************************************
- * Function: ftmac100_poll_process
+ * Function: ftmac100_poll_work
  *
  * Description:
- *   Perform the periodic poll.  This may be called either from watchdog
- *   timer logic or from the worker thread, depending upon the configuration.
+ *   Perform periodic polling from the worker thread
  *
  * Parameters:
- *   priv - Reference to the driver state structure
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
+ *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static inline void ftmac100_poll_process(FAR struct ftmac100_driver_s *priv)
+static void ftmac100_poll_work(FAR void *arg)
 {
+  FAR struct ftmac100_driver_s *priv = (FAR struct ftmac100_driver_s *)arg;
+
+  /* Perform the poll */
+
+  net_lock();
+
   /* Check if there is room in the send another TX packet.  We cannot perform
    * the TX poll if he are unable to accept another packet for transmission.
    */
@@ -1206,39 +1116,9 @@ static inline void ftmac100_poll_process(FAR struct ftmac100_driver_s *priv)
 
   (void)wd_start(priv->ft_txpoll, FTMAC100_WDDELAY, ftmac100_poll_expiry, 1,
                  (wdparm_t)priv);
+  net_unlock();
 }
 
-/****************************************************************************
- * Function: ftmac100_poll_work
- *
- * Description:
- *   Perform periodic polling from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() as called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void ftmac100_poll_work(FAR void *arg)
-{
-  FAR struct ftmac100_driver_s *priv = (FAR struct ftmac100_driver_s *)arg;
-  net_lock_t state;
-
-  /* Perform the poll */
-
-  state = net_lock();
-  ftmac100_poll_process(priv);
-  net_unlock(state);
-}
-#endif
-
 /****************************************************************************
  * Function: ftmac100_poll_expiry
  *
@@ -1261,32 +1141,9 @@ static void ftmac100_poll_expiry(int argc, uint32_t arg, ...)
 {
   FAR struct ftmac100_driver_s *priv = (FAR struct ftmac100_driver_s *)arg;
 
-#ifdef CONFIG_NET_NOINTS
-  /* Is our single work structure available?  It may not be if there are
-   * pending interrupt actions.
-   */
-
-  if (work_available(&priv->ft_work))
-    {
-      /* Schedule to perform the interrupt processing on the worker thread. */
-
-      work_queue(HPWORK, &priv->ft_work, ftmac100_poll_work, priv, 0);
-    }
-  else
-    {
-      /* No.. Just re-start the watchdog poll timer, missing one polling
-       * cycle.
-       */
-
-      (void)wd_start(priv->ft_txpoll, FTMAC100_WDDELAY, ftmac100_poll_expiry,
-                     1, (wdparm_t)arg);
-    }
-
-#else
-  /* Process the interrupt now */
+  /* Schedule to perform the interrupt processing on the worker thread. */
 
-  ftmac100_poll_process(priv);
-#endif
+  work_queue(FTMAWORK, &priv->ft_pollwork, ftmac100_poll_work, priv, 0);
 }
 
 /****************************************************************************
@@ -1311,15 +1168,15 @@ static int ftmac100_ifup(struct net_driver_s *dev)
   FAR struct ftmac100_driver_s *priv = (FAR struct ftmac100_driver_s *)dev->d_private;
 
 #ifdef CONFIG_NET_IPv4
-  ndbg("Bringing up: %d.%d.%d.%d\n",
-       dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-       (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 #endif
 #ifdef CONFIG_NET_IPv6
-  ndbg("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
-       dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
-       dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
-       dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
+  ninfo("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+        dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
+        dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
+        dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
 #endif
 
   /* Initialize PHYs, the Ethernet interface, and setup up Ethernet
@@ -1397,24 +1254,30 @@ static int ftmac100_ifdown(struct net_driver_s *dev)
 }
 
 /****************************************************************************
- * Function: ftmac100_txavail_process
+ * Function: ftmac100_txavail_work
  *
  * Description:
- *   Perform an out-of-cycle poll.
+ *   Perform an out-of-cycle poll on the worker thread.
  *
  * Parameters:
- *   dev - Reference to the NuttX driver state structure
+ *   arg - Reference to the NuttX driver state structure (cast to void*)
  *
  * Returned Value:
  *   None
  *
  * Assumptions:
- *   Called in normal user mode
+ *   Called on the higher priority worker thread.
  *
  ****************************************************************************/
 
-static inline void ftmac100_txavail_process(FAR struct ftmac100_driver_s *priv)
+static void ftmac100_txavail_work(FAR void *arg)
 {
+  FAR struct ftmac100_driver_s *priv = (FAR struct ftmac100_driver_s *)arg;
+
+  /* Perform the poll */
+
+  net_lock();
+
   /* Ignore the notification if the interface is not yet up */
 
   if (priv->ft_bifup)
@@ -1425,38 +1288,9 @@ static inline void ftmac100_txavail_process(FAR struct ftmac100_driver_s *priv)
 
       (void)devif_poll(&priv->ft_dev, ftmac100_txpoll);
     }
-}
-
-/****************************************************************************
- * Function: ftmac100_txavail_work
- *
- * Description:
- *   Perform an out-of-cycle poll on the worker thread.
- *
- * Parameters:
- *   arg - Reference to the NuttX driver state structure (cast to void*)
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Called on the higher priority worker thread.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void ftmac100_txavail_work(FAR void *arg)
-{
-  FAR struct ftmac100_driver_s *priv = (FAR struct ftmac100_driver_s *)arg;
-  net_lock_t state;
-
-  /* Perform the poll */
 
-  state = net_lock();
-  ftmac100_txavail_process(priv);
-  net_unlock(state);
+  net_unlock();
 }
-#endif
 
 /****************************************************************************
  * Function: ftmac100_txavail
@@ -1481,34 +1315,18 @@ static int ftmac100_txavail(struct net_driver_s *dev)
 {
   FAR struct ftmac100_driver_s *priv = (FAR struct ftmac100_driver_s *)dev->d_private;
 
-#ifdef CONFIG_NET_NOINTS
   /* Is our single work structure available?  It may not be if there are
    * pending interrupt actions and we will have to ignore the Tx
    * availability action.
    */
 
-  if (work_available(&priv->ft_work))
+  if (work_available(&priv->ft_pollwork))
     {
       /* Schedule to serialize the poll on the worker thread. */
 
-      work_queue(HPWORK, &priv->ft_work, ftmac100_txavail_work, priv, 0);
+      work_queue(FTMAWORK, &priv->ft_pollwork, ftmac100_txavail_work, priv, 0);
     }
 
-#else
-  irqstate_t flags;
-
-  /* Disable interrupts because this function may be called from interrupt
-   * level processing.
-   */
-
-  flags = enter_critical_section();
-
-  /* Perform the out-of-cycle poll now */
-
-  ftmac100_txavail_process(priv);
-  leave_critical_section(flags);
-#endif
-
   return OK;
 }
 
@@ -1658,7 +1476,7 @@ static void ftmac100_ipv6multicast(FAR struct ftmac100_driver_s *priv)
   mac[4] = tmp16 & 0xff;
   mac[5] = tmp16 >> 8;
 
-  nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+  ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
         mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   (void)ftmac100_addmac(dev, mac);
@@ -1716,7 +1534,7 @@ int ftmac100_initialize(int intf)
 
   /* Attach the IRQ to the driver */
 
-  if (irq_attach(CONFIG_FTMAC100_IRQ, ftmac100_interrupt))
+  if (irq_attach(CONFIG_FTMAC100_IRQ, ftmac100_interrupt, NULL))
     {
       /* We could not attach the ISR to the interrupt */
 
@@ -1726,6 +1544,7 @@ int ftmac100_initialize(int intf)
   /* Initialize the driver structure */
 
   memset(priv, 0, sizeof(struct ftmac100_driver_s));
+  priv->ft_dev.d_buf     = g_pktbuf;          /* Single packet buffer */
   priv->ft_dev.d_ifup    = ftmac100_ifup;     /* I/F up (new IP address) callback */
   priv->ft_dev.d_ifdown  = ftmac100_ifdown;   /* I/F down callback */
   priv->ft_dev.d_txavail = ftmac100_txavail;  /* New TX data callback */
diff --git a/drivers/net/loopback.c b/drivers/net/loopback.c
index 5b275474d09007e676cfa031859521031ae6183a..68f6c9abdc9010dfc5aae446adcfde6b5024b140 100644
--- a/drivers/net/loopback.c
+++ b/drivers/net/loopback.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/net/loopback.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -67,12 +67,18 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-#ifndef CONFIG_NET_NOINTS
-#  error CONFIG_NET_NOINTS must be selected
-#endif
-
-#ifndef CONFIG_SCHED_HPWORK
-#  error High priority work queue support is required (CONFIG_SCHED_HPWORK)
+/* We need to have the work queue to handle SPI interrupts */
+
+#if !defined(CONFIG_SCHED_WORKQUEUE)
+#  error Worker thread support is required (CONFIG_SCHED_WORKQUEUE)
+#else
+#  if defined(CONFIG_LOOPBACK_HPWORK)
+#    define LPBKWORK HPWORK
+#  elif defined(CONFIG_LOOPBACK_LPWORK)
+#    define LPBKWORK LPWORK
+#  else
+#    error Neither CONFIG_LOOPBACK_HPWORK nor CONFIG_LOOPBACK_LPWORK defined
+#  endif
 #endif
 
 /* TX poll delay = 1 seconds. CLK_TCK is the number of clock ticks per second */
@@ -97,7 +103,7 @@ struct lo_driver_s
   bool lo_bifup;               /* true:ifup false:ifdown */
   bool lo_txdone;              /* One RX packet was looped back */
   WDOG_ID lo_polldog;          /* TX poll timer */
-  struct work_s lo_work;       /* For deferring work to the work queue */
+  struct work_s lo_work;       /* For deferring poll work to the work queue */
 
   /* This holds the information visible to the NuttX network */
 
@@ -109,10 +115,7 @@ struct lo_driver_s
  ****************************************************************************/
 
 static struct lo_driver_s g_loopback;
-
-#ifdef CONFIG_NET_MULTIBUFFER
 static uint8_t g_iobuffer[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
-#endif
 
 /****************************************************************************
  * Private Function Prototypes
@@ -187,7 +190,7 @@ static int lo_txpoll(FAR struct net_driver_s *dev)
 #ifdef CONFIG_NET_IPv4
       if ((IPv4BUF->vhl & IP_VERSION_MASK) == IPv4_VERSION)
         {
-          nllvdbg("IPv4 frame\n");
+          ninfo("IPv4 frame\n");
           NETDEV_RXIPV4(&priv->lo_dev);
           ipv4_input(&priv->lo_dev);
         }
@@ -196,14 +199,14 @@ static int lo_txpoll(FAR struct net_driver_s *dev)
 #ifdef CONFIG_NET_IPv6
       if ((IPv6BUF->vtc & IP_VERSION_MASK) == IPv6_VERSION)
         {
-          nllvdbg("Iv6 frame\n");
+          ninfo("Iv6 frame\n");
           NETDEV_RXIPV6(&priv->lo_dev);
           ipv6_input(&priv->lo_dev);
         }
       else
 #endif
         {
-          ndbg("WARNING: Unrecognized packet type dropped: %02x\n", IPv4BUF->vhl);
+          nwarn("WARNING: Unrecognized packet type dropped: %02x\n", IPv4BUF->vhl);
           NETDEV_RXDROPPED(&priv->lo_dev);
           priv->lo_dev.d_len = 0;
         }
@@ -235,11 +238,10 @@ static int lo_txpoll(FAR struct net_driver_s *dev)
 static void lo_poll_work(FAR void *arg)
 {
   FAR struct lo_driver_s *priv = (FAR struct lo_driver_s *)arg;
-  net_lock_t state;
 
   /* Perform the poll */
 
-  state = net_lock();
+  net_lock();
   priv->lo_txdone = false;
   (void)devif_timer(&priv->lo_dev, lo_txpoll);
 
@@ -256,7 +258,7 @@ static void lo_poll_work(FAR void *arg)
   /* Setup the watchdog poll timer again */
 
   (void)wd_start(priv->lo_polldog, LO_WDDELAY, lo_poll_expiry, 1, priv);
-  net_unlock(state);
+  net_unlock();
 }
 
 /****************************************************************************
@@ -281,24 +283,9 @@ static void lo_poll_expiry(int argc, wdparm_t arg, ...)
 {
   FAR struct lo_driver_s *priv = (FAR struct lo_driver_s *)arg;
 
-  /* Is our single work structure available?  It may not be if there are
-   * pending interrupt actions.
-   */
-
-  if (work_available(&priv->lo_work))
-    {
-      /* Schedule to perform the interrupt processing on the worker thread. */
+  /* Schedule to perform the interrupt processing on the worker thread. */
 
-      work_queue(HPWORK, &priv->lo_work, lo_poll_work, priv, 0);
-    }
-  else
-    {
-      /* No.. Just re-start the watchdog poll timer, missing one polling
-       * cycle.
-       */
-
-      (void)wd_start(priv->lo_polldog, LO_WDDELAY, lo_poll_expiry, 1, arg);
-    }
+  work_queue(LPBKWORK, &priv->lo_work, lo_poll_work, priv, 0);
 }
 
 /****************************************************************************
@@ -323,20 +310,21 @@ static int lo_ifup(FAR struct net_driver_s *dev)
   FAR struct lo_driver_s *priv = (FAR struct lo_driver_s *)dev->d_private;
 
 #ifdef CONFIG_NET_IPv4
-  ndbg("Bringing up: %d.%d.%d.%d\n",
-       dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-       (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 #endif
 #ifdef CONFIG_NET_IPv6
-  ndbg("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
-       dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
-       dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
-       dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
+  ninfo("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+        dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
+        dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
+        dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
 #endif
 
   /* Set and activate a timer process */
 
-  (void)wd_start(priv->lo_polldog, LO_WDDELAY, lo_poll_expiry, 1, (wdparm_t)priv);
+  (void)wd_start(priv->lo_polldog, LO_WDDELAY, lo_poll_expiry,
+                 1, (wdparm_t)priv);
 
   priv->lo_bifup = true;
   return OK;
@@ -392,11 +380,10 @@ static int lo_ifdown(FAR struct net_driver_s *dev)
 static void lo_txavail_work(FAR void *arg)
 {
   FAR struct lo_driver_s *priv = (FAR struct lo_driver_s *)arg;
-  net_lock_t state;
 
   /* Ignore the notification if the interface is not yet up */
 
-  state = net_lock();
+  net_lock();
   if (priv->lo_bifup)
     {
       do
@@ -409,7 +396,7 @@ static void lo_txavail_work(FAR void *arg)
       while (priv->lo_txdone);
     }
 
-  net_unlock(state);
+  net_unlock();
 }
 
 /****************************************************************************
@@ -444,7 +431,7 @@ static int lo_txavail(FAR struct net_driver_s *dev)
     {
       /* Schedule to serialize the poll on the worker thread. */
 
-      work_queue(HPWORK, &priv->lo_work, lo_txavail_work, priv, 0);
+      work_queue(LPBKWORK, &priv->lo_work, lo_txavail_work, priv, 0);
     }
 
   return OK;
@@ -543,9 +530,7 @@ int localhost_initialize(void)
   priv->lo_dev.d_addmac  = lo_addmac;    /* Add multicast MAC address */
   priv->lo_dev.d_rmmac   = lo_rmmac;     /* Remove multicast MAC address */
 #endif
-#ifdef CONFIG_NET_MULTIBUFFER
   priv->lo_dev.d_buf     = g_iobuffer;   /* Attach the IO buffer */
-#endif
   priv->lo_dev.d_private = (FAR void *)priv; /* Used to recover private state from dev */
 
   /* Create a watchdog for timing polling for and timing of transmissions */
diff --git a/drivers/net/phy_notify.c b/drivers/net/phy_notify.c
index be34ecb8de71f76dfd48278d98e4ef5ca078674d..f26dad2b74294fd55b97f710a6c1c9ac9818ceb5 100644
--- a/drivers/net/phy_notify.c
+++ b/drivers/net/phy_notify.c
@@ -42,8 +42,8 @@
 /* Force verbose debug on in this file only to support unit-level testing. */
 
 #ifdef CONFIG_NETDEV_PHY_DEBUG
-#  undef  CONFIG_DEBUG_VERBOSE
-#  define CONFIG_DEBUG_VERBOSE 1
+#  undef  CONFIG_DEBUG_INFO
+#  define CONFIG_DEBUG_INFO 1
 #  undef  CONFIG_DEBUG_NET
 #  define CONFIG_DEBUG_NET 1
 #endif
@@ -82,11 +82,11 @@
  */
 
 #ifdef CONFIG_NETDEV_PHY_DEBUG
-#  define phydbg    dbg
-#  define phylldbg  lldbg
+#  define phyinfo   _info
+#  define phyerr    _err
 #else
-#  define phydbg(x...)
-#  define phylldbg(x...)
+#  define phyinfo(x...)
+#  define phyerr(x...)
 #endif
 
 /****************************************************************************
@@ -102,7 +102,6 @@ struct phy_notify_s
 {
   bool assigned;
   uint8_t signo;
-  uint8_t index;
 #ifdef CONFIG_NETDEV_MULTINIC
   char intf[CONFIG_PHY_NOTIFICATION_MAXINTFLEN+1];
 #endif
@@ -115,17 +114,11 @@ struct phy_notify_s
  * Private Function Prototypes
  ****************************************************************************/
 
-static int phy_handler(FAR struct phy_notify_s *client);
-static int phy_handler_0(int irq, FAR void *context);
-#if CONFIG_PHY_NOTIFICATION_NCLIENTS > 1
-static int phy_handler_1(int irq, FAR void *context);
-#if CONFIG_PHY_NOTIFICATION_NCLIENTS > 2
-static int phy_handler_2(int irq, FAR void *context);
-#if CONFIG_PHY_NOTIFICATION_NCLIENTS > 3
-static int phy_handler_3(int irq, FAR void *context);
-#endif
-#endif
-#endif
+static void phy_semtake(void);
+static FAR struct phy_notify_s *phy_find_unassigned(void);
+static FAR struct phy_notify_s *phy_find_assigned(FAR const char *intf,
+                                                  pid_t pid);
+static int phy_handler(int irq, FAR void *context, FAR void *arg);
 
 /****************************************************************************
  * Private Data
@@ -138,22 +131,6 @@ static sem_t g_notify_clients_sem = SEM_INITIALIZER(1);
 
 static struct phy_notify_s g_notify_clients[CONFIG_PHY_NOTIFICATION_NCLIENTS];
 
-/* Handler addresses accessed with the same index as g_notify_clients[] */
-
-static const xcpt_t g_notify_handler[CONFIG_PHY_NOTIFICATION_NCLIENTS] =
-{
-    phy_handler_0
-#if CONFIG_PHY_NOTIFICATION_NCLIENTS > 1
-    , phy_handler_1
-#if CONFIG_PHY_NOTIFICATION_NCLIENTS > 2
-    , phy_handler_2
-#if CONFIG_PHY_NOTIFICATION_NCLIENTS > 3
-    , phy_handler_3
-#endif
-#endif
-#endif
-};
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -197,7 +174,6 @@ static FAR struct phy_notify_s *phy_find_unassigned(void)
 
           client->assigned = true;
           client->signo    = 0;
-          client->index    = i;
 #ifdef CONFIG_NETDEV_MULTINIC
           client->intf[0]  = '\0';
 #endif
@@ -208,14 +184,14 @@ static FAR struct phy_notify_s *phy_find_unassigned(void)
           /* Return the client entry assigned to the caller */
 
           phy_semgive();
-          phydbg("Returning client %d\n", i);
+          phyinfo("Returning client %d\n", i);
           return client;
         }
     }
 
   /* Ooops... too many */
 
-  ndbg("ERROR: No free client entries\n");
+  nerr("ERROR: No free client entries\n");
   phy_semgive();
   return NULL;
 }
@@ -243,7 +219,7 @@ static FAR struct phy_notify_s *phy_find_assigned(FAR const char *intf,
           /* Return the matching client entry to the caller */
 
           phy_semgive();
-          phydbg("Returning client %d\n", i);
+          phyinfo("Returning client %d\n", i);
           return client;
         }
     }
@@ -258,16 +234,16 @@ static FAR struct phy_notify_s *phy_find_assigned(FAR const char *intf,
  * Name: phy_handler
  ****************************************************************************/
 
-static int phy_handler(FAR struct phy_notify_s *client)
+static int phy_handler(int irq, FAR void *context, FAR void *arg)
 {
+  FAR struct phy_notify_s *client = (FAR struct phy_notify_s *)arg;
 #ifdef CONFIG_CAN_PASS_STRUCTS
   union sigval value;
 #endif
   int ret;
 
-  DEBUGASSERT(client && client->assigned && client->enable);
-  phylldbg("Entry client %d, signalling PID=%d with signal %d\n",
-           client->index, client->pid, client->signo);
+  DEBUGASSERT(client != NULL && client->assigned && client->enable);
+  phyinfo("Signalling PID=%d with signal %d\n", client->pid, client->signo);
 
   /* Disable further interrupts */
 
@@ -287,43 +263,13 @@ static int phy_handler(FAR struct phy_notify_s *client)
       int errcode = errno;
       DEBUGASSERT(errcode > 0);
 
-      nlldbg("ERROR: sigqueue failed: %d\n", errcode);
+      nerr("ERROR: sigqueue failed: %d\n", errcode);
       UNUSED(errcode);
     }
 
   return OK;
 }
 
-/****************************************************************************
- * Name: phy_handler_0, phy_handler_1, ...
- ****************************************************************************/
-
-static int phy_handler_0(int irq, FAR void *context)
-{
-  return phy_handler(&g_notify_clients[0]);
-}
-
-#if CONFIG_PHY_NOTIFICATION_NCLIENTS > 1
-static int phy_handler_1(int irq, FAR void *context)
-{
-  return phy_handler(&g_notify_clients[1]);
-}
-#endif
-
-#if CONFIG_PHY_NOTIFICATION_NCLIENTS > 2
-static int phy_handler_2(int irq, FAR void *context)
-{
-  return phy_handler(&g_notify_clients[2]);
-}
-#endif
-
-#if CONFIG_PHY_NOTIFICATION_NCLIENTS > 3
-static int phy_handler_3(int irq, FAR void *context)
-{
-  return phy_handler(&g_notify_clients[3]);
-}
-#endif
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -358,16 +304,18 @@ int phy_notify_subscribe(FAR const char *intf, pid_t pid, int signo,
                          FAR void *arg)
 {
   FAR struct phy_notify_s *client;
+  int ret = OK;
+
   DEBUGASSERT(intf);
 
-  nvdbg("%s: PID=%d signo=%d arg=%p\n", intf, pid, signo, arg);
+  ninfo("%s: PID=%d signo=%d arg=%p\n", intf, pid, signo, arg);
 
   /* The special value pid == 0 means to use the pid of the current task. */
 
   if (pid == 0)
     {
       pid = getpid();
-      phydbg("Actual PID=%d\n", pid);
+      phyinfo("Actual PID=%d\n", pid);
     }
 
   /* Check if this client already exists */
@@ -387,7 +335,7 @@ int phy_notify_subscribe(FAR const char *intf, pid_t pid, int signo,
       client = phy_find_unassigned();
       if (!client)
         {
-          ndbg("ERROR: Failed to allocate a client entry\n");
+          nerr("ERROR: Failed to allocate a client entry\n");
           return -ENOMEM;
         }
 
@@ -403,14 +351,14 @@ int phy_notify_subscribe(FAR const char *intf, pid_t pid, int signo,
 
       /* Attach/re-attach the PHY interrupt */
 
-      (void)arch_phy_irq(intf, g_notify_handler[client->index], &client->enable);
+      ret = arch_phy_irq(intf, phy_handler, client, &client->enable);
     }
 
   /* Enable/re-enable the PH interrupt */
 
   DEBUGASSERT(client->enable);
   client->enable(true);
-  return OK;
+  return ret;
 }
 
 /****************************************************************************
@@ -439,21 +387,21 @@ int phy_notify_unsubscribe(FAR const char *intf, pid_t pid)
 {
   FAR struct phy_notify_s *client;
 
-  nvdbg("%s: PID=%d\n", intf, pid);
+  ninfo("%s: PID=%d\n", intf, pid);
 
   /* Find the client entry for this interface */
 
   client = phy_find_assigned(intf, pid);
   if (!client)
     {
-      ndbg("ERROR: No such client\n");
+      nerr("ERROR: No such client\n");
       return -ENOENT;
     }
 
   /* Detach and disable the PHY interrupt */
 
   phy_semtake();
-  (void)arch_phy_irq(intf, NULL, NULL);
+  (void)arch_phy_irq(intf, NULL, NULL, NULL);
 
   /* Un-initialize the client entry */
 
diff --git a/drivers/net/skeleton.c b/drivers/net/skeleton.c
index 6194fbce34133db9cb1bfb464389ff615b9e94e5..b33c46e6e09959dc4d09e2c7a77c7d40f36e4d5b 100644
--- a/drivers/net/skeleton.c
+++ b/drivers/net/skeleton.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/net/skeleton.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -53,13 +53,10 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
-#ifdef CONFIG_NET_NOINTS
-#  include 
-#endif
-
 #ifdef CONFIG_NET_PKT
 #  include 
 #endif
@@ -67,12 +64,24 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
-/* If processing is not done at the interrupt level, then high priority
- * work queue support is required.
+
+/* If processing is not done at the interrupt level, then work queue support
+ * is required.
  */
 
-#if defined(CONFIG_NET_NOINTS) && !defined(CONFIG_SCHED_HPWORK)
-#  error High priority work queue support is required
+#if !defined(CONFIG_SCHED_WORKQUEUE)
+#  error Work queue support is required in this configuration (CONFIG_SCHED_WORKQUEUE)
+#else
+
+   /* Use the selected work queue */
+
+#  if defined(CONFIG_skeleton_HPWORK)
+#    define ETHWORK HPWORK
+#  elif defined(CONFIG_skeleton_LPWORK)
+#    define ETHWORK LPWORK
+#  else
+#    error Neither CONFIG_skeleton_HPWORK nor CONFIG_skeleton_LPWORK defined
+#  endif
 #endif
 
 /* CONFIG_skeleton_NINTERFACES determines the number of physical interfaces
@@ -108,9 +117,8 @@ struct skel_driver_s
   bool sk_bifup;               /* true:ifup false:ifdown */
   WDOG_ID sk_txpoll;           /* TX poll timer */
   WDOG_ID sk_txtimeout;        /* TX timeout timer */
-#ifdef CONFIG_NET_NOINTS
-  struct work_s sk_work;       /* For deferring work to the work queue */
-#endif
+  struct work_s sk_irqwork;    /* For deferring interupt work to the work queue */
+  struct work_s sk_pollwork;   /* For deferring poll work to the work queue */
 
   /* This holds the information visible to the NuttX network */
 
@@ -121,6 +129,19 @@ struct skel_driver_s
  * Private Data
  ****************************************************************************/
 
+/* These statically allocated structur would mean that only a single
+ * instance of the device could be supported.  In order to support multiple
+ * devices instances, this data would have to be allocated dynamically.
+ */
+
+/* A single packet buffer per device is used here.  There might be multiple
+ * packet buffers in a more complex, pipelined design.
+ */
+
+static uint8_t g_pktbuf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
+
+/* Driver state structure */
+
 static struct skel_driver_s g_skel[CONFIG_skeleton_NINTERFACES];
 
 /****************************************************************************
@@ -136,35 +157,26 @@ static int  skel_txpoll(FAR struct net_driver_s *dev);
 
 static void skel_receive(FAR struct skel_driver_s *priv);
 static void skel_txdone(FAR struct skel_driver_s *priv);
-static inline void skel_interrupt_process(FAR struct skel_driver_s *priv);
-#ifdef CONFIG_NET_NOINTS
+
 static void skel_interrupt_work(FAR void *arg);
-#endif
-static int  skel_interrupt(int irq, FAR void *context);
+static int  skel_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Watchdog timer expirations */
 
-static inline void skel_txtimeout_process(FAR struct skel_driver_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void skel_txtimeout_work(FAR void *arg);
-#endif
 static void skel_txtimeout_expiry(int argc, wdparm_t arg, ...);
 
-static inline void skel_poll_process(FAR struct skel_driver_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void skel_poll_work(FAR void *arg);
-#endif
 static void skel_poll_expiry(int argc, wdparm_t arg, ...);
 
 /* NuttX callback functions */
 
 static int skel_ifup(FAR struct net_driver_s *dev);
 static int skel_ifdown(FAR struct net_driver_s *dev);
-static inline void skel_txavail_process(FAR struct skel_driver_s *priv);
-#ifdef CONFIG_NET_NOINTS
+
 static void skel_txavail_work(FAR void *arg);
-#endif
 static int skel_txavail(FAR struct net_driver_s *dev);
+
 #if defined(CONFIG_NET_IGMP) || defined(CONFIG_NET_ICMPv6)
 static int skel_addmac(FAR struct net_driver_s *dev, FAR const uint8_t *mac);
 #ifdef CONFIG_NET_IGMP
@@ -334,7 +346,7 @@ static void skel_receive(FAR struct skel_driver_s *priv)
 #ifdef CONFIG_NET_IPv4
       if (BUF->type == HTONS(ETHTYPE_IP))
         {
-          nllvdbg("IPv4 frame\n");
+          ninfo("IPv4 frame\n");
           NETDEV_RXIPV4(&priv->sk_dev);
 
           /* Handle ARP on input then give the IPv4 packet to the network
@@ -375,7 +387,7 @@ static void skel_receive(FAR struct skel_driver_s *priv)
 #ifdef CONFIG_NET_IPv6
       if (BUF->type == HTONS(ETHTYPE_IP6))
         {
-          nllvdbg("Iv6 frame\n");
+          ninfo("Iv6 frame\n");
           NETDEV_RXIPV6(&priv->sk_dev);
 
           /* Give the IPv6 packet to the network layer */
@@ -453,6 +465,8 @@ static void skel_receive(FAR struct skel_driver_s *priv)
 
 static void skel_txdone(FAR struct skel_driver_s *priv)
 {
+  int delay;
+
   /* Check for errors and update statistics */
 
   NETDEV_TXDONE(priv->sk_dev);
@@ -465,15 +479,6 @@ static void skel_txdone(FAR struct skel_driver_s *priv)
 
   wd_cancel(priv->sk_txtimeout);
 
-  /* Then make sure that the TX poll timer is running (if it is already
-   * running, the following would restart it).  This is necessary to
-   * avoid certain race conditions where the polling sequence can be
-   * interrupted.
-   */
-
-  (void)wd_start(priv->sk_txpoll, skeleton_WDDELAY, skel_poll_expiry, 1,
-                 (wdparm_t)priv);
-
   /* And disable further TX interrupts. */
 
   /* In any event, poll the network for new TX data */
@@ -482,25 +487,36 @@ static void skel_txdone(FAR struct skel_driver_s *priv)
 }
 
 /****************************************************************************
- * Function: skel_interrupt_process
+ * Function: skel_interrupt_work
  *
  * Description:
- *   Interrupt processing.  This may be performed either within the interrupt
- *   handler or on the worker thread, depending upon the configuration
+ *   Perform interrupt related work from the worker thread
  *
  * Parameters:
- *   priv - Reference to the driver state structure
+ *   arg - The argument passed when work_queue() was called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
  *   The network is locked.
  *
  ****************************************************************************/
 
-static inline void skel_interrupt_process(FAR struct skel_driver_s *priv)
+static void skel_interrupt_work(FAR void *arg)
 {
+  FAR struct skel_driver_s *priv = (FAR struct skel_driver_s *)arg;
+
+  /* Lock the network and serialize driver operations if necessary.
+   * NOTE: Serialization is only required in the case where the driver work
+   * is performed on an LP worker thread and where more than one LP worker
+   * thread has been configured.
+   */
+
+  net_lock();
+
+  /* Process pending Ethernet interrupts */
+
   /* Get and clear interrupt status bits */
 
   /* Handle interrupts according to status bit settings */
@@ -515,42 +531,12 @@ static inline void skel_interrupt_process(FAR struct skel_driver_s *priv)
    */
 
   skel_txdone(priv);
-}
-
-/****************************************************************************
- * Function: skel_interrupt_work
- *
- * Description:
- *   Perform interrupt related work from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() was called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   The network is locked.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void skel_interrupt_work(FAR void *arg)
-{
-  FAR struct skel_driver_s *priv = (FAR struct skel_driver_s *)arg;
-  net_lock_t state;
-
-  /* Process pending Ethernet interrupts */
-
-  state = net_lock();
-  skel_interrupt_process(priv);
-  net_unlock(state);
+  net_unlock();
 
   /* Re-enable Ethernet interrupts */
 
   up_enable_irq(CONFIG_skeleton_IRQ);
 }
-#endif
 
 /****************************************************************************
  * Function: skel_interrupt
@@ -569,11 +555,10 @@ static void skel_interrupt_work(FAR void *arg)
  *
  ****************************************************************************/
 
-static int skel_interrupt(int irq, FAR void *context)
+static int skel_interrupt(int irq, FAR void *context, FAR void *arg)
 {
   FAR struct skel_driver_s *priv = &g_skel[0];
 
-#ifdef CONFIG_NET_NOINTS
   /* Disable further Ethernet interrupts.  Because Ethernet interrupts are
    * also disabled if the TX timeout event occurs, there can be no race
    * condition here.
@@ -585,60 +570,19 @@ static int skel_interrupt(int irq, FAR void *context)
 
     {
       /* If a TX transfer just completed, then cancel the TX timeout so
-       * there will be do race condition between any subsequent timeout
+       * there will be no race condition between any subsequent timeout
        * expiration and the deferred interrupt processing.
        */
 
        wd_cancel(priv->sk_txtimeout);
     }
 
-  /* Cancel any pending poll work */
-
-  work_cancel(HPWORK, &priv->sk_work);
-
   /* Schedule to perform the interrupt processing on the worker thread. */
 
-  work_queue(HPWORK, &priv->sk_work, skel_interrupt_work, priv, 0);
-
-#else
-  /* Process the interrupt now */
-
-  skel_interrupt_process(priv);
-#endif
-
+  work_queue(ETHWORK, &priv->sk_irqwork, skel_interrupt_work, priv, 0);
   return OK;
 }
 
-/****************************************************************************
- * Function: skel_txtimeout_process
- *
- * Description:
- *   Process a TX timeout.  Called from the either the watchdog timer
- *   expiration logic or from the worker thread, depending upon the
- *   configuration.  The timeout means that the last TX never completed.
- *   Reset the hardware and start again.
- *
- * Parameters:
- *   priv - Reference to the driver state structure
- *
- * Returned Value:
- *   None
- *
- ****************************************************************************/
-
-static inline void skel_txtimeout_process(FAR struct skel_driver_s *priv)
-{
-  /* Increment statistics and dump debug info */
-
-  NETDEV_TXTIMEOUTS(priv->sk_dev);
-
-  /* Then reset the hardware */
-
-  /* Then poll the network for new XMIT data */
-
-  (void)devif_poll(&priv->sk_dev, skel_txpoll);
-}
-
 /****************************************************************************
  * Function: skel_txtimeout_work
  *
@@ -656,19 +600,29 @@ static inline void skel_txtimeout_process(FAR struct skel_driver_s *priv)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_NET_NOINTS
 static void skel_txtimeout_work(FAR void *arg)
 {
   FAR struct skel_driver_s *priv = (FAR struct skel_driver_s *)arg;
-  net_lock_t state;
 
-  /* Process pending Ethernet interrupts */
+  /* Lock the network and serialize driver operations if necessary.
+   * NOTE: Serialization is only required in the case where the driver work
+   * is performed on an LP worker thread and where more than one LP worker
+   * thread has been configured.
+   */
+
+  net_lock();
+
+  /* Increment statistics and dump debug info */
+
+  NETDEV_TXTIMEOUTS(priv->sk_dev);
+
+  /* Then reset the hardware */
+
+  /* Then poll the network for new XMIT data */
 
-  state = net_lock();
-  skel_txtimeout_process(priv);
-  net_unlock(state);
+  (void)devif_poll(&priv->sk_dev, skel_txpoll);
+  net_unlock();
 }
-#endif
 
 /****************************************************************************
  * Function: skel_txtimeout_expiry
@@ -693,7 +647,6 @@ static void skel_txtimeout_expiry(int argc, wdparm_t arg, ...)
 {
   FAR struct skel_driver_s *priv = (FAR struct skel_driver_s *)arg;
 
-#ifdef CONFIG_NET_NOINTS
   /* Disable further Ethernet interrupts.  This will prevent some race
    * conditions with interrupt work.  There is still a potential race
    * condition with interrupt work that is already queued and in progress.
@@ -701,20 +654,9 @@ static void skel_txtimeout_expiry(int argc, wdparm_t arg, ...)
 
   up_disable_irq(CONFIG_skeleton_IRQ);
 
-  /* Cancel any pending poll or interrupt work.  This will have no effect
-   * on work that has already been started.
-   */
-
-  work_cancel(HPWORK, &priv->sk_work);
-
   /* Schedule to perform the TX timeout processing on the worker thread. */
 
-  work_queue(HPWORK, &priv->sk_work, skel_txtimeout_work, priv, 0);
-#else
-  /* Process the timeout now */
-
-  skel_txtimeout_process(priv);
-#endif
+  work_queue(ETHWORK, &priv->sk_irqwork, skel_txtimeout_work, priv, 0);
 }
 
 /****************************************************************************
@@ -736,21 +678,6 @@ static void skel_txtimeout_expiry(int argc, wdparm_t arg, ...)
 
 static inline void skel_poll_process(FAR struct skel_driver_s *priv)
 {
-  /* Check if there is room in the send another TX packet.  We cannot perform
-   * the TX poll if he are unable to accept another packet for transmission.
-   */
-
-  /* If so, update TCP timing states and poll the network for new XMIT data.
-   * Hmmm.. might be bug here.  Does this mean if there is a transmit in
-   * progress, we will missing TCP time state updates?
-   */
-
-  (void)devif_timer(&priv->sk_dev, skel_txpoll);
-
-  /* Setup the watchdog poll timer again */
-
-  (void)wd_start(priv->sk_txpoll, skeleton_WDDELAY, skel_poll_expiry, 1,
-                 (wdparm_t)priv);
 }
 
 /****************************************************************************
@@ -770,19 +697,37 @@ static inline void skel_poll_process(FAR struct skel_driver_s *priv)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_NET_NOINTS
 static void skel_poll_work(FAR void *arg)
 {
   FAR struct skel_driver_s *priv = (FAR struct skel_driver_s *)arg;
-  net_lock_t state;
+
+  /* Lock the network and serialize driver operations if necessary.
+   * NOTE: Serialization is only required in the case where the driver work
+   * is performed on an LP worker thread and where more than one LP worker
+   * thread has been configured.
+   */
+
+  net_lock();
 
   /* Perform the poll */
 
-  state = net_lock();
-  skel_poll_process(priv);
-  net_unlock(state);
+  /* Check if there is room in the send another TX packet.  We cannot perform
+   * the TX poll if he are unable to accept another packet for transmission.
+   */
+
+  /* If so, update TCP timing states and poll the network for new XMIT data.
+   * Hmmm.. might be bug here.  Does this mean if there is a transmit in
+   * progress, we will missing TCP time state updates?
+   */
+
+  (void)devif_timer(&priv->sk_dev, skel_txpoll);
+
+  /* Setup the watchdog poll timer again */
+
+  (void)wd_start(priv->sk_txpoll, skeleton_WDDELAY, skel_poll_expiry, 1,
+                 (wdparm_t)priv);
+  net_unlock();
 }
-#endif
 
 /****************************************************************************
  * Function: skel_poll_expiry
@@ -806,31 +751,9 @@ static void skel_poll_expiry(int argc, wdparm_t arg, ...)
 {
   FAR struct skel_driver_s *priv = (FAR struct skel_driver_s *)arg;
 
-#ifdef CONFIG_NET_NOINTS
-  /* Is our single work structure available?  It may not be if there are
-   * pending interrupt actions.
-   */
-
-  if (work_available(&priv->sk_work))
-    {
-      /* Schedule to perform the interrupt processing on the worker thread. */
-
-      work_queue(HPWORK, &priv->sk_work, skel_poll_work, priv, 0);
-    }
-  else
-    {
-      /* No.. Just re-start the watchdog poll timer, missing one polling
-       * cycle.
-       */
-
-      (void)wd_start(priv->sk_txpoll, skeleton_WDDELAY, skel_poll_expiry, 1, arg);
-    }
-
-#else
-  /* Process the interrupt now */
+  /* Schedule to perform the interrupt processing on the worker thread. */
 
-  skel_poll_process(priv);
-#endif
+  work_queue(ETHWORK, &priv->sk_pollwork, skel_poll_work, priv, 0);
 }
 
 /****************************************************************************
@@ -855,15 +778,15 @@ static int skel_ifup(FAR struct net_driver_s *dev)
   FAR struct skel_driver_s *priv = (FAR struct skel_driver_s *)dev->d_private;
 
 #ifdef CONFIG_NET_IPv4
-  ndbg("Bringing up: %d.%d.%d.%d\n",
-       dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-       (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 #endif
 #ifdef CONFIG_NET_IPv6
-  ndbg("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
-       dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
-       dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
-       dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
+  ninfo("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+        dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
+        dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
+        dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
 #endif
 
   /* Initialize PHYs, the Ethernet interface, and setup up Ethernet interrupts */
@@ -932,24 +855,34 @@ static int skel_ifdown(FAR struct net_driver_s *dev)
 }
 
 /****************************************************************************
- * Function: skel_txavail_process
+ * Function: skel_txavail_work
  *
  * Description:
- *   Perform an out-of-cycle poll.
+ *   Perform an out-of-cycle poll on the worker thread.
  *
  * Parameters:
- *   dev - Reference to the NuttX driver state structure
+ *   arg - Reference to the NuttX driver state structure (cast to void*)
  *
  * Returned Value:
  *   None
  *
  * Assumptions:
- *   Called in normal user mode
+ *   Called on the higher priority worker thread.
  *
  ****************************************************************************/
 
-static inline void skel_txavail_process(FAR struct skel_driver_s *priv)
+static void skel_txavail_work(FAR void *arg)
 {
+  FAR struct skel_driver_s *priv = (FAR struct skel_driver_s *)arg;
+
+  /* Lock the network and serialize driver operations if necessary.
+   * NOTE: Serialization is only required in the case where the driver work
+   * is performed on an LP worker thread and where more than one LP worker
+   * thread has been configured.
+   */
+
+  net_lock();
+
   /* Ignore the notification if the interface is not yet up */
 
   if (priv->sk_bifup)
@@ -960,38 +893,9 @@ static inline void skel_txavail_process(FAR struct skel_driver_s *priv)
 
       (void)devif_poll(&priv->sk_dev, skel_txpoll);
     }
-}
 
-/****************************************************************************
- * Function: skel_txavail_work
- *
- * Description:
- *   Perform an out-of-cycle poll on the worker thread.
- *
- * Parameters:
- *   arg - Reference to the NuttX driver state structure (cast to void*)
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Called on the higher priority worker thread.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void skel_txavail_work(FAR void *arg)
-{
-  FAR struct skel_driver_s *priv = (FAR struct skel_driver_s *)arg;
-  net_lock_t state;
-
-  /* Perform the poll */
-
-  state = net_lock();
-  skel_txavail_process(priv);
-  net_unlock(state);
+  net_unlock();
 }
-#endif
 
 /****************************************************************************
  * Function: skel_txavail
@@ -1016,34 +920,18 @@ static int skel_txavail(FAR struct net_driver_s *dev)
 {
   FAR struct skel_driver_s *priv = (FAR struct skel_driver_s *)dev->d_private;
 
-#ifdef CONFIG_NET_NOINTS
   /* Is our single work structure available?  It may not be if there are
    * pending interrupt actions and we will have to ignore the Tx
    * availability action.
    */
 
-  if (work_available(&priv->sk_work))
+  if (work_available(&priv->sk_pollwork))
     {
       /* Schedule to serialize the poll on the worker thread. */
 
-      work_queue(HPWORK, &priv->sk_work, skel_txavail_work, priv, 0);
+      work_queue(ETHWORK, &priv->sk_pollwork, skel_txavail_work, priv, 0);
     }
 
-#else
-  irqstate_t flags;
-
-  /* Disable interrupts because this function may be called from interrupt
-   * level processing.
-   */
-
-  flags = enter_critical_section();
-
-  /* Perform the out-of-cycle poll now */
-
-  skel_txavail_process(priv);
-  leave_critical_section(flags);
-#endif
-
   return OK;
 }
 
@@ -1152,7 +1040,7 @@ static void skel_ipv6multicast(FAR struct skel_driver_s *priv)
   mac[4] = tmp16 & 0xff;
   mac[5] = tmp16 >> 8;
 
-  nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+  ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
         mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 
   (void)skel_addmac(dev, mac);
@@ -1166,6 +1054,7 @@ static void skel_ipv6multicast(FAR struct skel_driver_s *priv)
   (void)skel_addmac(dev, g_ipv6_ethallnodes.ether_addr_octet);
 
 #endif /* CONFIG_NET_ICMPv6_AUTOCONF */
+
 #ifdef CONFIG_NET_ICMPv6_ROUTER
   /* Add the IPv6 all link-local routers Ethernet address.  This is the
    * address that we expect to receive ICMPv6 Router Solicitation
@@ -1212,7 +1101,7 @@ int skel_initialize(int intf)
 
   /* Attach the IRQ to the driver */
 
-  if (irq_attach(CONFIG_skeleton_IRQ, skel_interrupt))
+  if (irq_attach(CONFIG_skeleton_IRQ, skel_interrupt, NULL))
     {
       /* We could not attach the ISR to the interrupt */
 
@@ -1222,6 +1111,7 @@ int skel_initialize(int intf)
   /* Initialize the driver structure */
 
   memset(priv, 0, sizeof(struct skel_driver_s));
+  priv->sk_dev.d_buf     = g_pktbuf;      /* Single packet buffer */
   priv->sk_dev.d_ifup    = skel_ifup;     /* I/F up (new IP address) callback */
   priv->sk_dev.d_ifdown  = skel_ifdown;   /* I/F down callback */
   priv->sk_dev.d_txavail = skel_txavail;  /* New TX data callback */
@@ -1233,8 +1123,10 @@ int skel_initialize(int intf)
 
   /* Create a watchdog for timing polling for and timing of transmisstions */
 
-  priv->sk_txpoll       = wd_create();    /* Create periodic poll timer */
-  priv->sk_txtimeout    = wd_create();    /* Create TX timeout timer */
+  priv->sk_txpoll        = wd_create();   /* Create periodic poll timer */
+  priv->sk_txtimeout     = wd_create();   /* Create TX timeout timer */
+
+  DEBUGASSERT(priv->sk_txpoll != NULL && priv->sk_txtimeout != NULL);
 
   /* Put the interface in the down state.  This usually amounts to resetting
    * the device and/or calling skel_ifdown().
diff --git a/drivers/net/slip.c b/drivers/net/slip.c
index 3691580341c6389ec83f644ea0a8376a79542446..afd3ca91ae268739219189990d908440f82febdf 100644
--- a/drivers/net/slip.c
+++ b/drivers/net/slip.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/net/slip.c
  *
- *   Copyright (C) 2011-2012, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Reference: RFC 1055
@@ -55,8 +55,9 @@
 #include 
 
 #include 
-#include 
 #include 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -75,14 +76,6 @@
 
 /* Configuration ************************************************************/
 
-#ifndef CONFIG_NET_NOINTS
-#  warning "CONFIG_NET_NOINTS must be set"
-#endif
-
-#ifndef CONFIG_NET_MULTIBUFFER
-#  warning "CONFIG_NET_MULTIBUFFER must be set"
-#endif
-
 #ifndef CONFIG_NET_SLIP_STACKSIZE
 #  define CONFIG_NET_SLIP_STACKSIZE 2048
 #endif
@@ -287,7 +280,7 @@ static int slip_transmit(FAR struct slip_driver_s *priv)
 
   /* Increment statistics */
 
-  nvdbg("Sending packet size %d\n", priv->dev.d_len);
+  ninfo("Sending packet size %d\n", priv->dev.d_len);
   NETDEV_TXPACKETS(&priv->dev);
 
   /* Send an initial END character to flush out any data that may have
@@ -433,12 +426,11 @@ static void slip_txtask(int argc, FAR char *argv[])
 {
   FAR struct slip_driver_s *priv;
   unsigned int index = *(argv[1]) - '0';
-  net_lock_t flags;
-  systime_t msec_start;
-  systime_t msec_now;
+  systime_t start_ticks;
+  systime_t now_ticks;
   unsigned int hsec;
 
-  ndbg("index: %d\n", index);
+  nerr("index: %d\n", index);
   DEBUGASSERT(index < CONFIG_NET_SLIP_NINTERFACES);
 
   /* Get our private data structure instance and wake up the waiting
@@ -450,7 +442,7 @@ static void slip_txtask(int argc, FAR char *argv[])
 
   /* Loop forever */
 
-  msec_start = clock_systimer() * MSEC_PER_TICK;
+  start_ticks = clock_systimer();
   for (;  ; )
     {
       /* Wait for the timeout to expire (or until we are signaled by by  */
@@ -479,19 +471,19 @@ static void slip_txtask(int argc, FAR char *argv[])
 
           /* Poll the networking layer for new XMIT data. */
 
-          flags = net_lock();
+          net_lock();
           priv->dev.d_buf = priv->txbuf;
 
           /* Has a half second elapsed since the last timer poll? */
 
-          msec_now = clock_systimer() * MSEC_PER_TICK;
-          hsec = (unsigned int)(msec_now - msec_start) / (MSEC_PER_SEC / 2);
-          if (hsec)
+          now_ticks = clock_systimer();
+          hsec = (unsigned int)((now_ticks - start_ticks) / TICK_PER_HSEC);
+          if (hsec > 0)
             {
               /* Yes, perform the timer poll */
 
               (void)devif_timer(&priv->dev, slip_txpoll);
-              msec_start += hsec * (MSEC_PER_SEC / 2);
+              start_ticks += hsec * TICK_PER_HSEC;
             }
           else
             {
@@ -500,7 +492,7 @@ static void slip_txtask(int argc, FAR char *argv[])
               (void)devif_poll(&priv->dev, slip_txpoll);
             }
 
-          net_unlock(flags);
+          net_unlock();
           slip_semgive(priv);
         }
     }
@@ -555,7 +547,7 @@ static inline void slip_receive(FAR struct slip_driver_s *priv)
    * packet if we run out of room.
    */
 
-  nvdbg("Receiving packet\n");
+  ninfo("Receiving packet\n");
   for (; ; )
     {
       /* Get the next character in the stream. */
@@ -572,7 +564,7 @@ static inline void slip_receive(FAR struct slip_driver_s *priv)
 
         case SLIP_END:
           {
-            nvdbg("END\n");
+            ninfo("END\n");
 
             /* A minor optimization: if there is no data in the packet,
              * ignore it. This is meant to avoid bothering IP with all the
@@ -582,7 +574,7 @@ static inline void slip_receive(FAR struct slip_driver_s *priv)
 
             if (priv->rxlen > 0)
               {
-                nvdbg("Received packet size %d\n", priv->rxlen);
+                ninfo("Received packet size %d\n", priv->rxlen);
                 return;
               }
           }
@@ -595,7 +587,7 @@ static inline void slip_receive(FAR struct slip_driver_s *priv)
 
         case SLIP_ESC:
           {
-            nvdbg("ESC\n");
+            ninfo("ESC\n");
             ch = slip_getc(priv);
 
             /* if "ch" is not one of these two, then we have a protocol
@@ -606,17 +598,17 @@ static inline void slip_receive(FAR struct slip_driver_s *priv)
             switch (ch)
               {
               case SLIP_ESC_END:
-                nvdbg("ESC-END\n");
+                ninfo("ESC-END\n");
                 ch = SLIP_END;
                 break;
 
                case SLIP_ESC_ESC:
-                nvdbg("ESC-ESC\n");
+                ninfo("ESC-ESC\n");
                 ch = SLIP_ESC;
                 break;
 
               default:
-                ndbg("ERROR: Protocol violation: %02x\n", ch);
+                nerr("ERROR: Protocol violation: %02x\n", ch);
                 break;
               }
 
@@ -658,10 +650,9 @@ static int slip_rxtask(int argc, FAR char *argv[])
 {
   FAR struct slip_driver_s *priv;
   unsigned int index = *(argv[1]) - '0';
-  net_lock_t flags;
   int ch;
 
-  ndbg("index: %d\n", index);
+  nerr("index: %d\n", index);
   DEBUGASSERT(index < CONFIG_NET_SLIP_NINTERFACES);
 
   /* Get our private data structure instance and wake up the waiting
@@ -677,7 +668,7 @@ static int slip_rxtask(int argc, FAR char *argv[])
     {
       /* Wait for the next character to be available on the input stream. */
 
-      nvdbg("Waiting...\n");
+      ninfo("Waiting...\n");
       ch = slip_getc(priv);
 
       /* Ignore any input that we receive before the interface is up. */
@@ -731,7 +722,7 @@ static int slip_rxtask(int argc, FAR char *argv[])
           priv->dev.d_buf = priv->rxbuf;
           priv->dev.d_len = priv->rxlen;
 
-          flags = net_lock();
+          net_lock();
           ipv4_input(&priv->dev);
 
           /* If the above function invocation resulted in data that should
@@ -744,7 +735,8 @@ static int slip_rxtask(int argc, FAR char *argv[])
               slip_transmit(priv);
               kill(priv->txpid, SIGALRM);
             }
-          net_unlock(flags);
+
+          net_unlock();
           slip_semgive(priv);
         }
       else
@@ -779,7 +771,7 @@ static int slip_ifup(FAR struct net_driver_s *dev)
 {
   FAR struct slip_driver_s *priv = (FAR struct slip_driver_s *)dev->d_private;
 
-  ndbg("Bringing up: %d.%d.%d.%d\n",
+  nerr("Bringing up: %d.%d.%d.%d\n",
        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 
@@ -958,13 +950,14 @@ int slip_initialize(int intf, FAR const char *devname)
   priv->fd            = open(devname, O_RDWR, 0666);
   if (priv->fd < 0)
     {
-      ndbg("ERROR: Failed to open %s: %d\n", devname, errno);
+      nerr("ERROR: Failed to open %s: %d\n", devname, errno);
       return -errno;
     }
 
   /* Initialize the wait semaphore */
 
   sem_init(&priv->waitsem, 0, 0);
+  sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
 
   /* Put the interface in the down state.  This usually amounts to resetting
    * the device and/or calling slip_ifdown().
@@ -983,7 +976,7 @@ int slip_initialize(int intf, FAR const char *devname)
                             (FAR char * const *)argv);
   if (priv->rxpid < 0)
     {
-      ndbg("ERROR: Failed to start receiver task\n");
+      nerr("ERROR: Failed to start receiver task\n");
       return -errno;
     }
 
@@ -998,7 +991,7 @@ int slip_initialize(int intf, FAR const char *devname)
                             (FAR char * const *)argv);
   if (priv->txpid < 0)
     {
-      ndbg("ERROR: Failed to start receiver task\n");
+      nerr("ERROR: Failed to start receiver task\n");
       return -errno;
     }
 
diff --git a/drivers/net/telnet.c b/drivers/net/telnet.c
index 505a01cb942ea75c81f52835017cb9e756f3b5a9..374af780cabbc7eacb636a642e8c392e09bde9f1 100644
--- a/drivers/net/telnet.c
+++ b/drivers/net/telnet.c
@@ -230,11 +230,11 @@ static inline void telnet_dumpbuffer(FAR const char *msg,
                                      FAR const char *buffer,
                                      unsigned int nbytes)
 {
-  /* CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, and CONFIG_DEBUG_NET have to be
+  /* CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO, and CONFIG_DEBUG_NET have to be
   * defined or the following does nothing.
   */
 
-  nvdbgdumpbuffer(msg, (FAR const uint8_t*)buffer, nbytes);
+  ninfodumpbuffer(msg, (FAR const uint8_t*)buffer, nbytes);
 }
 #endif
 
@@ -277,12 +277,12 @@ static ssize_t telnet_receive(FAR struct telnet_dev_s *priv, FAR const char *src
   int nread;
   uint8_t ch;
 
-  nllvdbg("srclen: %d destlen: %d\n", srclen, destlen);
+  ninfo("srclen: %d destlen: %d\n", srclen, destlen);
 
   for (nread = 0; srclen > 0 && nread < destlen; srclen--)
     {
       ch = *src++;
-      nllvdbg("ch=%02x state=%d\n", ch, priv->td_state);
+      ninfo("ch=%02x state=%d\n", ch, priv->td_state);
 
       switch (priv->td_state)
         {
@@ -447,7 +447,7 @@ static void telnet_sendopt(FAR struct telnet_dev_s *priv, uint8_t option,
   telnet_dumpbuffer("Send optbuf", optbuf, 4);
   if (psock_send(&priv->td_psock, optbuf, 4, 0) < 0)
     {
-      nlldbg("Failed to send TELNET_IAC\n");
+      nerr("ERROR: Failed to send TELNET_IAC\n");
     }
 }
 
@@ -462,7 +462,7 @@ static int telnet_open(FAR struct file *filep)
   int tmp;
   int ret;
 
-  nllvdbg("td_crefs: %d\n", priv->td_crefs);
+  ninfo("td_crefs: %d\n", priv->td_crefs);
 
   /* O_NONBLOCK is not supported */
 
@@ -518,7 +518,7 @@ static int telnet_close(FAR struct file *filep)
   FAR char *devpath;
   int ret;
 
-  nllvdbg("td_crefs: %d\n", priv->td_crefs);
+  ninfo("td_crefs: %d\n", priv->td_crefs);
 
   /* Get exclusive access to the device structures */
 
@@ -548,7 +548,7 @@ static int telnet_close(FAR struct file *filep)
       ret = asprintf(&devpath, TELNETD_DEVFMT, priv->td_minor);
       if (ret < 0)
         {
-          nlldbg("ERROR: Failed to allocate the driver path\n");
+          nerr("ERROR: Failed to allocate the driver path\n");
         }
       else
         {
@@ -566,8 +566,8 @@ static int telnet_close(FAR struct file *filep)
 
               if (ret != -EBUSY)
                 {
-                  nlldbg("Failed to unregister the driver %s: %d\n",
-                         devpath, ret);
+                  nerr("ERROR: Failed to unregister the driver %s: %d\n",
+                       devpath, ret);
                 }
             }
 
@@ -608,7 +608,7 @@ static ssize_t telnet_read(FAR struct file *filep, FAR char *buffer, size_t len)
   FAR struct telnet_dev_s *priv = inode->i_private;
   ssize_t ret;
 
-  nllvdbg("len: %d\n", len);
+  ninfo("len: %d\n", len);
 
   /* First, handle the case where there are still valid bytes left in the
    * I/O buffer from the last time that read was called.  NOTE:  Much of
@@ -681,7 +681,7 @@ static ssize_t telnet_write(FAR struct file *filep, FAR const char *buffer, size
   char ch;
   bool eol;
 
-  nllvdbg("len: %d\n", len);
+  ninfo("len: %d\n", len);
 
   /* Process each character from the user buffer */
 
@@ -706,7 +706,7 @@ static ssize_t telnet_write(FAR struct file *filep, FAR const char *buffer, size
           ret = psock_send(&priv->td_psock, priv->td_txbuffer, ncopied, 0);
           if (ret < 0)
             {
-              nlldbg("psock_send failed '%s': %d\n", priv->td_txbuffer, ret);
+              nerr("ERROR: psock_send failed '%s': %d\n", priv->td_txbuffer, ret);
               return ret;
             }
 
@@ -723,7 +723,7 @@ static ssize_t telnet_write(FAR struct file *filep, FAR const char *buffer, size
       ret = psock_send(&priv->td_psock, priv->td_txbuffer, ncopied, 0);
       if (ret < 0)
         {
-          nlldbg("psock_send failed '%s': %d\n", priv->td_txbuffer, ret);
+          nerr("ERROR: psock_send failed '%s': %d\n", priv->td_txbuffer, ret);
           return ret;
         }
     }
@@ -767,7 +767,7 @@ static int telnet_session(FAR struct telnet_session_s *session)
   priv = (FAR struct telnet_dev_s*)malloc(sizeof(struct telnet_dev_s));
   if (!priv)
     {
-      nlldbg("Failed to allocate the driver data structure\n");
+      nerr("ERROR: Failed to allocate the driver data structure\n");
       return -ENOMEM;
     }
 
@@ -788,7 +788,7 @@ static int telnet_session(FAR struct telnet_session_s *session)
   psock = sockfd_socket(session->ts_sd);
   if (!psock)
     {
-      nlldbg("Failed to convert sd=%d to a socket structure\n", session->ts_sd);
+      nerr("ERROR: Failed to convert sd=%d to a socket structure\n", session->ts_sd);
       ret = -EINVAL;
       goto errout_with_dev;
     }
@@ -796,7 +796,7 @@ static int telnet_session(FAR struct telnet_session_s *session)
   ret = net_clone(psock, &priv->td_psock);
   if (ret < 0)
     {
-      nlldbg("net_clone failed: %d\n", ret);
+      nerr("ERROR: net_clone failed: %d\n", ret);
       goto errout_with_dev;
     }
 
@@ -834,7 +834,7 @@ static int telnet_session(FAR struct telnet_session_s *session)
 
   if (ret >= 0)
     {
-      nlldbg("ERROR: Too many sessions\n");
+      nerr("ERROR: Too many sessions\n");
       ret = -ENFILE;
       goto errout_with_semaphore;
     }
@@ -844,8 +844,8 @@ static int telnet_session(FAR struct telnet_session_s *session)
   ret = register_driver(session->ts_devpath, &g_telnet_fops, 0666, priv);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to register the driver %s: %d\n",
-             session->ts_devpath, ret);
+      nerr("ERROR: Failed to register the driver %s: %d\n",
+           session->ts_devpath, ret);
       goto errout_with_semaphore;
     }
 
diff --git a/drivers/net/tun.c b/drivers/net/tun.c
index 9435f4a6177c56d5700b6376d4c80fcc9e289708..476308716275ec22df9f0f62c9810657d5b886e7 100644
--- a/drivers/net/tun.c
+++ b/drivers/net/tun.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/net/tun.c
  *
- *   Copyright (C) 2015 Max Nekludov. All rights reserved.
+ *   Copyright (C) 2015-2016 Max Nekludov. All rights reserved.
  *   Author: Max Nekludov 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -58,15 +58,12 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
-
-#include 
 #include 
 
-#ifdef CONFIG_NET_NOINTS
-#  include 
-#endif
+#include 
 
 #ifdef CONFIG_NET_PKT
 #  include 
@@ -79,8 +76,17 @@
  * work queue support is required.
  */
 
-#if defined(CONFIG_NET_NOINTS) && !defined(CONFIG_SCHED_HPWORK)
-#  error High priority work queue support is required
+#if !defined(CONFIG_SCHED_WORKQUEUE)
+#  error Work queue support is required in this configuration (CONFIG_SCHED_WORKQUEUE)
+#else
+
+#  if defined(CONFIG_TUN_HPWORK)
+#    define TUNWORK HPWORK
+#  elif defined(CONFIG_TUN_LPWORK)
+#    define TUNWORK LPWORK
+#  else
+#    error "Neither CONFIG_TUN_HPWORK nor CONFIG_TUN_LPWORK defined"
+#  endif
 #endif
 
 /* CONFIG_TUN_NINTERFACES determines the number of physical interfaces
@@ -109,9 +115,7 @@ struct tun_device_s
 {
   bool              bifup;   /* true:ifup false:ifdown */
   WDOG_ID           txpoll;  /* TX poll timer */
-#ifdef CONFIG_NET_NOINTS
-  struct work_s     work;    /* For deferring work to the work queue */
-#endif
+  struct work_s     work;    /* For deferring poll work to the work queue */
 
   FAR struct file  *filep;
 
@@ -149,20 +153,17 @@ static void tun_unlock(FAR struct tun_device_s *priv);
 
 /* Common TX logic */
 
-static int  tun_transmit(FAR struct tun_device_s *priv);
+static int  tun_fd_transmit(FAR struct tun_device_s *priv);
 static int  tun_txpoll(struct net_driver_s *dev);
 
 /* Interrupt handling */
 
-static void tun_receive(FAR struct tun_device_s *priv);
+static void tun_net_receive(FAR struct tun_device_s *priv);
 static void tun_txdone(FAR struct tun_device_s *priv);
 
 /* Watchdog timer expirations */
 
-static inline void tun_poll_process(FAR struct tun_device_s *priv);
-#ifdef CONFIG_NET_NOINTS
 static void tun_poll_work(FAR void *arg);
-#endif
 static void tun_poll_expiry(int argc, wdparm_t arg, ...);
 
 /* NuttX callback functions */
@@ -211,7 +212,7 @@ static const struct file_operations g_tun_file_ops =
   tun_close,    /* close */
   tun_read,     /* read */
   tun_write,    /* write */
-  0,                 /* seek */
+  0,            /* seek */
   tun_ioctl,    /* ioctl */
 #ifndef CONFIG_DISABLE_POLL
   tun_poll,     /* poll */
@@ -322,7 +323,7 @@ static void tun_pollnotify(FAR struct tun_device_s *priv, pollevent_t eventset)
  *
  ****************************************************************************/
 
-static int tun_transmit(FAR struct tun_device_s *priv)
+static int tun_fd_transmit(FAR struct tun_device_s *priv)
 {
   NETDEV_TXPACKETS(&priv->dev);
 
@@ -379,7 +380,7 @@ static int tun_txpoll(struct net_driver_s *dev)
       /* Send the packet */
 
       priv->read_d_len = priv->dev.d_len;
-      tun_transmit(priv);
+      tun_fd_transmit(priv);
 
       return 1;
     }
@@ -408,8 +409,10 @@ static int tun_txpoll(struct net_driver_s *dev)
  *
  ****************************************************************************/
 
-static void tun_receive(FAR struct tun_device_s *priv)
+static void tun_net_receive(FAR struct tun_device_s *priv)
 {
+  int ret;
+
   /* Copy the data data from the hardware to priv->dev.d_buf.  Set amount of
    * data in priv->dev.d_len
    */
@@ -425,44 +428,60 @@ static void tun_receive(FAR struct tun_device_s *priv)
   /* We only accept IP packets of the configured type and ARP packets */
 
 #if defined(CONFIG_NET_IPv4)
-  nllvdbg("IPv4 frame\n");
+  ninfo("IPv4 frame\n");
   NETDEV_RXIPV4(&priv->dev);
 
-  /* Give the IPv4 packet to the network layer */
-
-  ipv4_input(&priv->dev);
-
-  /* If the above function invocation resulted in data that should be
-   * sent out on the network, the field  d_len will set to a value > 0.
+  /* Give the IPv4 packet to the network layer.  ipv4_input will return
+   * an error if it is unable to dispatch the packet at this time.
    */
 
-  if (priv->dev.d_len > 0)
+  ret = ipv4_input(&priv->dev);
+  if (ret == OK)
     {
-      priv->write_d_len = priv->dev.d_len;
-      tun_transmit(priv);
+      /* If the above function invocation resulted in data that should be
+       * sent out on the network, the field d_len will set to a value > 0.
+       */
+
+      if (priv->dev.d_len > 0)
+        {
+          priv->write_d_len = priv->dev.d_len;
+          tun_fd_transmit(priv);
+        }
+      else
+        {
+          tun_pollnotify(priv, POLLOUT);
+        }
     }
   else
     {
-      priv->write_d_len = 0;
+      priv->dev.d_len = 0;
       tun_pollnotify(priv, POLLOUT);
     }
 
 #elif defined(CONFIG_NET_IPv6)
-  nllvdbg("Iv6 frame\n");
+  ninfo("Iv6 frame\n");
   NETDEV_RXIPV6(&priv->dev);
 
-  /* Give the IPv6 packet to the network layer */
-
-  ipv6_input(&priv->dev);
-
-  /* If the above function invocation resulted in data that should be
-   * sent out on the network, the field  d_len will set to a value > 0.
+  /* Give the IPv6 packet to the network layer.  ipv6_input will return
+   * an error if it is unable to dispatch the packet at this time.
    */
 
-  if (priv->dev.d_len > 0)
+  ret = ipv6_input(&priv->dev);
+  if (ret == OK)
     {
-      priv->write_d_len = priv->dev.d_len;
-      tun_transmit(priv);
+      /* If the above function invocation resulted in data that should be
+       * sent out on the network, the field  d_len will set to a value > 0.
+       */
+
+      if (priv->dev.d_len > 0)
+        {
+          priv->write_d_len = priv->dev.d_len;
+          tun_fd_transmit(priv);
+        }
+      else
+        {
+          tun_pollnotify(priv, POLLOUT);
+        }
     }
   else
     {
@@ -505,24 +524,31 @@ static void tun_txdone(FAR struct tun_device_s *priv)
 }
 
 /****************************************************************************
- * Function: tun_poll_process
+ * Function: tun_poll_work
  *
  * Description:
- *   Perform the periodic poll.  This may be called either from watchdog
- *   timer logic or from the worker thread, depending upon the configuration.
+ *   Perform periodic polling from the worker thread
  *
  * Parameters:
- *   priv - Reference to the driver state structure
+ *   arg - The argument passed when work_queue() as called.
  *
  * Returned Value:
- *   None
+ *   OK on success
  *
  * Assumptions:
+ *   Ethernet interrupts are disabled
  *
  ****************************************************************************/
 
-static void tun_poll_process(FAR struct tun_device_s *priv)
+static void tun_poll_work(FAR void *arg)
 {
+  FAR struct tun_device_s *priv = (FAR struct tun_device_s *)arg;
+
+  /* Perform the poll */
+
+  tun_lock(priv);
+  net_lock();
+
   /* Check if there is room in the send another TX packet.  We cannot perform
    * the TX poll if he are unable to accept another packet for transmission.
    */
@@ -538,42 +564,10 @@ static void tun_poll_process(FAR struct tun_device_s *priv)
   /* Setup the watchdog poll timer again */
 
   (void)wd_start(priv->txpoll, TUN_WDDELAY, tun_poll_expiry, 1, priv);
-}
 
-/****************************************************************************
- * Function: tun_poll_work
- *
- * Description:
- *   Perform periodic polling from the worker thread
- *
- * Parameters:
- *   arg - The argument passed when work_queue() as called.
- *
- * Returned Value:
- *   OK on success
- *
- * Assumptions:
- *   Ethernet interrupts are disabled
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_NOINTS
-static void tun_poll_work(FAR void *arg)
-{
-  FAR struct tun_device_s *priv = (FAR struct tun_device_s *)arg;
-  net_lock_t state;
-
-  /* Perform the poll */
-
-  tun_lock(priv);
-  state = net_lock();
-
-  tun_poll_process(priv);
-
-  net_unlock(state);
+  net_unlock();
   tun_unlock(priv);
 }
-#endif
 
 /****************************************************************************
  * Function: tun_poll_expiry
@@ -597,31 +591,9 @@ static void tun_poll_expiry(int argc, wdparm_t arg, ...)
 {
   FAR struct tun_device_s *priv = (FAR struct tun_device_s *)arg;
 
-#ifdef CONFIG_NET_NOINTS
-  /* Is our single work structure available?  It may not be if there are
-   * pending interrupt actions.
-   */
-
-  if (work_available(&priv->work))
-    {
-      /* Schedule to perform the interrupt processing on the worker thread. */
-
-      work_queue(HPWORK, &priv->work, tun_poll_work, priv, 0);
-    }
-  else
-    {
-      /* No.. Just re-start the watchdog poll timer, missing one polling
-       * cycle.
-       */
-
-      (void)wd_start(priv->txpoll, TUN_WDDELAY, tun_poll_expiry, 1, arg);
-    }
-
-#else
-  /* Process the interrupt now */
+  /* Schedule to perform the timer expiration on the worker thread. */
 
-  tun_poll_process(priv);
-#endif
+  work_queue(TUNWORK, &priv->work, tun_poll_work, priv, 0);
 }
 
 /****************************************************************************
@@ -646,15 +618,15 @@ static int tun_ifup(struct net_driver_s *dev)
   FAR struct tun_device_s *priv = (FAR struct tun_device_s *)dev->d_private;
 
 #ifdef CONFIG_NET_IPv4
-  ndbg("Bringing up: %d.%d.%d.%d\n",
-       dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-       (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+  ninfo("Bringing up: %d.%d.%d.%d\n",
+        dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+        (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
 #endif
 #ifdef CONFIG_NET_IPv6
-  ndbg("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
-       dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
-       dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
-       dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
+  ninfo("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+        dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
+        dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
+        dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
 #endif
 
   /* Initialize PHYs, the Ethernet interface, and setup up Ethernet interrupts */
@@ -669,7 +641,8 @@ static int tun_ifup(struct net_driver_s *dev)
 
   /* Set and activate a timer process */
 
-  (void)wd_start(priv->txpoll, TUN_WDDELAY, tun_poll_expiry, 1, (wdparm_t)priv);
+  (void)wd_start(priv->txpoll, TUN_WDDELAY, tun_poll_expiry,
+                 1, (wdparm_t)priv);
 
   priv->bifup = true;
   return OK;
@@ -730,19 +703,18 @@ static int tun_ifdown(struct net_driver_s *dev)
 static int tun_txavail(struct net_driver_s *dev)
 {
   FAR struct tun_device_s *priv = (FAR struct tun_device_s *)dev->d_private;
-  net_lock_t state;
 
   tun_lock(priv);
 
   /* Check if there is room to hold another network packet. */
 
-  if (priv->read_d_len)
+  if (priv->read_d_len != 0 || priv->write_d_len != 0)
     {
       tun_unlock(priv);
       return OK;
     }
 
-  state = net_lock();
+  net_lock();
 
   if (priv->bifup)
     {
@@ -752,7 +724,7 @@ static int tun_txavail(struct net_driver_s *dev)
       (void)devif_poll(&priv->dev, tun_txpoll);
     }
 
-  net_unlock(state);
+  net_unlock();
   tun_unlock(priv);
 
   return OK;
@@ -866,11 +838,17 @@ static int tun_dev_init(FAR struct tun_device_s *priv, FAR struct file *filep,
 #endif
   priv->dev.d_private = (FAR void *)priv; /* Used to recover private state from dev */
 
-  /* Initialize the wait semaphore */
+  /* Initialize the mutual exlcusion and wait semaphore */
 
   sem_init(&priv->waitsem, 0, 1);
   sem_init(&priv->read_wait_sem, 0, 0);
 
+  /* The wait semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->read_wait_sem, SEM_PRIO_NONE);
+
   /* Create a watchdog for timing polling for and timing of transmisstions */
 
   priv->txpoll        = wd_create();  /* Create periodic poll timer */
@@ -971,7 +949,6 @@ static ssize_t tun_write(FAR struct file *filep, FAR const char *buffer,
                          size_t buflen)
 {
   FAR struct tun_device_s *priv = filep->f_priv;
-  net_lock_t state;
   ssize_t ret;
 
   if (!priv)
@@ -987,7 +964,7 @@ static ssize_t tun_write(FAR struct file *filep, FAR const char *buffer,
       return -EBUSY;
     }
 
-  state = net_lock();
+  net_lock();
 
   if (buflen > CONFIG_NET_TUN_MTU)
     {
@@ -1000,12 +977,12 @@ static ssize_t tun_write(FAR struct file *filep, FAR const char *buffer,
       priv->dev.d_buf = priv->write_buf;
       priv->dev.d_len = buflen;
 
-      tun_receive(priv);
+      tun_net_receive(priv);
 
       ret = (ssize_t)buflen;
     }
 
-  net_unlock(state);
+  net_unlock();
   tun_unlock(priv);
 
   return ret;
@@ -1019,7 +996,6 @@ static ssize_t tun_read(FAR struct file *filep, FAR char *buffer,
                         size_t buflen)
 {
   FAR struct tun_device_s *priv = filep->f_priv;
-  net_lock_t state;
   ssize_t ret;
   size_t write_d_len;
   size_t read_d_len;
@@ -1047,6 +1023,14 @@ static ssize_t tun_read(FAR struct file *filep, FAR char *buffer,
 
       priv->write_d_len = 0;
       tun_pollnotify(priv, POLLOUT);
+
+      if (priv->read_d_len == 0)
+        {
+          net_lock();
+          tun_txdone(priv);
+          net_unlock();
+        }
+
       goto out;
     }
 
@@ -1064,7 +1048,7 @@ static ssize_t tun_read(FAR struct file *filep, FAR char *buffer,
       tun_lock(priv);
     }
 
-  state = net_lock();
+  net_lock();
 
   read_d_len = priv->read_d_len;
   if (buflen < read_d_len)
@@ -1080,7 +1064,7 @@ static ssize_t tun_read(FAR struct file *filep, FAR char *buffer,
   priv->read_d_len = 0;
   tun_txdone(priv);
 
-  net_unlock(state);
+  net_unlock();
 
 out:
   tun_unlock(priv);
diff --git a/drivers/net/vnet.c b/drivers/net/vnet.c
deleted file mode 100644
index eec509ec87dda166984abc63e1b00bdda3ec2f6c..0000000000000000000000000000000000000000
--- a/drivers/net/vnet.c
+++ /dev/null
@@ -1,776 +0,0 @@
-/****************************************************************************
- * drivers/net/vnet.c
- *
- *   Copyright (C) 2011 Yu Qiang. All rights reserved.
- *   Author: Yu Qiang 
- *
- * This file is a part of NuttX:
- *
- *   Copyright (C) 2011, 2014 Gregory Nutt. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include 
-#if defined(CONFIG_NET) && defined(CONFIG_NET_VNET)
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#ifdef CONFIG_NET_PKT
-#  include 
-#endif
-
-#include 
-#include 
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* CONFIG_VNET_NINTERFACES determines the number of physical interfaces
- * that will be supported.
- */
-
-#ifndef CONFIG_VNET_NINTERFACES
-#  define CONFIG_VNET_NINTERFACES 1
-#endif
-
-/* TX poll deley = 1 seconds. CLK_TCK is the number of clock ticks per second */
-
-#define VNET_WDDELAY   (1*CLK_TCK)
-
-/* TX timeout = 1 minute */
-
-#define VNET_TXTIMEOUT (60*CLK_TCK)
-
-/* This is a helper pointer for accessing the contents of the Ethernet header */
-
-#define BUF ((struct eth_hdr_s *)vnet->sk_dev.d_buf)
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/* The vnet_driver_s encapsulates all state information for a single hardware
- * interface
- */
-
-struct vnet_driver_s
-{
-  bool sk_bifup;               /* true:ifup false:ifdown */
-  WDOG_ID sk_txpoll;           /* TX poll timer */
-  struct rgmp_vnet *vnet;
-
-  /* This holds the information visible to the NuttX */
-
-  struct net_driver_s sk_dev;  /* Interface understood by the network */
-};
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-static struct vnet_driver_s g_vnet[CONFIG_VNET_NINTERFACES];
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/* Common TX logic */
-
-static int  vnet_transmit(FAR struct vnet_driver_s *vnet);
-static int  vnet_txpoll(struct net_driver_s *dev);
-
-/* Interrupt handling */
-
-static void vnet_txdone(FAR struct vnet_driver_s *vnet);
-
-/* Watchdog timer expirations */
-
-static void vnet_polltimer(int argc, uint32_t arg, ...);
-static void vnet_txtimeout(int argc, uint32_t arg, ...);
-
-/* NuttX callback functions */
-
-static int vnet_ifup(struct net_driver_s *dev);
-static int vnet_ifdown(struct net_driver_s *dev);
-static int vnet_txavail(struct net_driver_s *dev);
-#ifdef CONFIG_NET_IGMP
-static int vnet_addmac(struct net_driver_s *dev, FAR const uint8_t *mac);
-static int vnet_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac);
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function: vnet_transmit
- *
- * Description:
- *   Start hardware transmission.  Called either from the txdone interrupt
- *   handling or from watchdog based polling.
- *
- * Parameters:
- *   vnet  - Reference to the driver state structure
- *
- * Returned Value:
- *   OK on success; a negated errno on failure
- *
- * Assumptions:
- *   May or may not be called from an interrupt handler.  In either case,
- *   global interrupts are disabled, either explicitly or indirectly through
- *   interrupt handling logic.
- *
- ****************************************************************************/
-
-static int vnet_transmit(FAR struct vnet_driver_s *vnet)
-{
-  int err;
-
-  /* Verify that the hardware is ready to send another packet.  If we get
-   * here, then we are committed to sending a packet; Higher level logic
-   * must have assured that there is not transmission in progress.
-   */
-
-  /* Send the packet: address=vnet->sk_dev.d_buf, length=vnet->sk_dev.d_len */
-
-  err = vnet_xmit(vnet->vnet, (char *)vnet->sk_dev.d_buf, vnet->sk_dev.d_len);
-  if (err)
-    {
-      /* When vnet_xmit fail, it means TX buffer is full. Watchdog
-       * is of no use here because no TX done INT will happen. So
-       * we reset the TX buffer directly.
-       */
-
-#ifdef CONFIG_DEBUG
-      cprintf("VNET: TX buffer is full\n");
-#endif
-      return ERROR;
-    }
-  else
-    {
-      /* This step may be unnecessary here */
-
-      vnet_txdone(vnet);
-    }
-
-  return OK;
-}
-
-/****************************************************************************
- * Function: vnet_txpoll
- *
- * Description:
- *   The transmitter is available, check if the network has any outgoing
- *   packets ready to send.  This is a callback from devif_poll(). 
- *   devif_poll() may be called:
- *
- *   1. When the preceding TX packet send is complete,
- *   2. When the preceding TX packet send timesout and the interface is reset
- *   3. During normal TX polling
- *
- * Parameters:
- *   dev  - Reference to the NuttX driver state structure
- *
- * Returned Value:
- *   OK on success; a negated errno on failure
- *
- * Assumptions:
- *   May or may not be called from an interrupt handler.  In either case,
- *   global interrupts are disabled, either explicitly or indirectly through
- *   interrupt handling logic.
- *
- ****************************************************************************/
-
-static int vnet_txpoll(struct net_driver_s *dev)
-{
-  FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)dev->d_private;
-
-  /* If the polling resulted in data that should be sent out on the network,
-   * the field d_len is set to a value > 0.
-   */
-
-  if (vnet->sk_dev.d_len > 0)
-    {
-      /* Look up the destination MAC address and add it to the Ethernet
-       * header.
-       */
-
-#ifdef CONFIG_NET_IPv4
-#ifdef CONFIG_NET_IPv6
-      if (IFF_IS_IPv4(vnet->sk_dev.d_flags))
-#endif
-        {
-          arp_out(&vnet->sk_dev);
-        }
-#endif /* CONFIG_NET_IPv4 */
-
-#ifdef CONFIG_NET_IPv6
-#ifdef CONFIG_NET_IPv4
-      else
-#endif
-        {
-          neighbor_out(&vnet->sk_dev);
-        }
-#endif /* CONFIG_NET_IPv6 */
-
-      /* Send the packet */
-
-      vnet_transmit(vnet);
-
-      /* Check if there is room in the device to hold another packet. If not,
-       * return a non-zero value to terminate the poll.
-       */
-
-      if (vnet_is_txbuff_full(vnet->vnet))
-        {
-          return 1;
-        }
-    }
-
-  /* If zero is returned, the polling will continue until all connections have
-   * been examined.
-   */
-
-  return 0;
-}
-
-/****************************************************************************
- * Function: rtos_vnet_recv
- *
- * Description:
- *   An interrupt was received indicating the availability of a new RX packet
- *
- * Parameters:
- *   vnet  - Reference to the driver state structure
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Global interrupts are disabled by interrupt handling logic.
- *
- ****************************************************************************/
-
-void rtos_vnet_recv(struct rgmp_vnet *rgmp_vnet, char *data, int len)
-{
-  struct vnet_driver_s *vnet = rgmp_vnet->priv;
-
-  do
-    {
-      /* Check if the packet is a valid size for the network buffer
-       * configuration.
-       */
-
-      if (len > CONFIG_NET_ETH_MTU || len < 14)
-        {
-#ifdef CONFIG_DEBUG
-          cprintf("VNET: receive invalid packet of size %d\n", len);
-#endif
-          return;
-        }
-
-      /* Copy the data data from the hardware to vnet->sk_dev.d_buf.  Set
-       * amount of data in vnet->sk_dev.d_len
-       */
-
-      memcpy(vnet->sk_dev.d_buf, data, len);
-      vnet->sk_dev.d_len = len;
-
-#ifdef CONFIG_NET_PKT
-      /* When packet sockets are enabled, feed the frame into the packet tap */
-
-       pkt_input(&vnet->sk_dev);
-#endif
-
-      /* We only accept IP packets of the configured type and ARP packets */
-
-#ifdef CONFIG_NET_IPv4
-      if (BUF->type == HTONS(ETHTYPE_IP))
-        {
-          nllvdbg("IPv4 frame\n");
-
-          /* Handle ARP on input then give the IPv4 packet to the network
-           * layer
-           */
-
-          arp_ipin(&vnet->sk_dev);
-          ipv4_input(&vnet->sk_dev);
-
-          /* If the above function invocation resulted in data that should be
-           * sent out on the network, the field  d_len will set to a value > 0.
-           */
-
-          if (vnet->sk_dev.d_len > 0)
-            {
-              /* Update the Ethernet header with the correct MAC address */
-
-#ifdef CONFIG_NET_IPv6
-              if (IFF_IS_IPv4(vnet->sk_dev.d_flags))
-#endif
-                {
-                  arp_out(&vnet->sk_dev);
-                }
-#ifdef CONFIG_NET_IPv6
-              else
-                {
-                  neighbor_out(&vnet->sk_dev);
-                }
-#endif
-
-              /* And send the packet */
-
-              vnet_transmit(vnet);
-            }
-        }
-      else
-#endif
-#ifdef CONFIG_NET_IPv6
-      if (BUF->type == HTONS(ETHTYPE_IP6))
-        {
-          nllvdbg("Iv6 frame\n");
-
-          /* Give the IPv6 packet to the network layer */
-
-          ipv6_input(&vnet->sk_dev);
-
-          /* If the above function invocation resulted in data that should be
-           * sent out on the network, the field  d_len will set to a value > 0.
-           */
-
-          if (vnet->sk_dev.d_len > 0)
-           {
-              /* Update the Ethernet header with the correct MAC address */
-
-#ifdef CONFIG_NET_IPv4
-              if (IFF_IS_IPv4(vnet->sk_dev.d_flags))
-                {
-                  arp_out(&vnet->sk_dev);
-                }
-              else
-#endif
-#ifdef CONFIG_NET_IPv6
-                {
-                  neighbor_out(&vnet->sk_dev);
-                }
-#endif
-
-              /* And send the packet */
-
-              vnet_transmit(vnet);
-            }
-        }
-      else
-#endif
-#ifdef CONFIG_NET_ARP
-      if (BUF->type == htons(ETHTYPE_ARP))
-        {
-          arp_arpin(&vnet->sk_dev);
-
-          /* If the above function invocation resulted in data that should
-           * be sent out on the network, the field  d_len will set to a
-           * value > 0.
-           */
-
-          if (vnet->sk_dev.d_len > 0)
-            {
-              vnet_transmit(vnet);
-            }
-        }
-#endif
-    }
-  while (0); /* While there are more packets to be processed */
-}
-
-/****************************************************************************
- * Function: vnet_txdone
- *
- * Description:
- *   An interrupt was received indicating that the last TX packet(s) is done
- *
- * Parameters:
- *   vnet  - Reference to the driver state structure
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Global interrupts are disabled by the watchdog logic.
- *
- ****************************************************************************/
-
-static void vnet_txdone(FAR struct vnet_driver_s *vnet)
-{
-  /* Poll the network for new XMIT data */
-
-  (void)devif_poll(&vnet->sk_dev, vnet_txpoll);
-}
-
-/****************************************************************************
- * Function: vnet_txtimeout
- *
- * Description:
- *   Our TX watchdog timed out.  Called from the timer interrupt handler.
- *   The last TX never completed.  Reset the hardware and start again.
- *
- * Parameters:
- *   argc - The number of available arguments
- *   arg  - The first argument
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Global interrupts are disabled by the watchdog logic.
- *
- ****************************************************************************/
-
-static void vnet_txtimeout(int argc, uint32_t arg, ...)
-{
-  FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)arg;
-
-  /* Poll the network for new XMIT data */
-
-  (void)devif_poll(&vnet->sk_dev, vnet_txpoll);
-}
-
-/****************************************************************************
- * Function: vnet_polltimer
- *
- * Description:
- *   Periodic timer handler.  Called from the timer interrupt handler.
- *
- * Parameters:
- *   argc - The number of available arguments
- *   arg  - The first argument
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Global interrupts are disabled by the watchdog logic.
- *
- ****************************************************************************/
-
-static void vnet_polltimer(int argc, uint32_t arg, ...)
-{
-  FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)arg;
-
-  /* Check if there is room in the send another TX packet.  We cannot perform
-   * the TX poll if he are unable to accept another packet for transmission.
-   */
-
-  if (vnet_is_txbuff_full(vnet->vnet))
-    {
-#ifdef CONFIG_DEBUG
-      cprintf("VNET: TX buffer is full\n");
-#endif
-      return;
-    }
-
-  /* If so, update TCP timing states and poll the network for new XMIT data.
-   * Hmmm..  might be bug here.  Does this mean if there is a transmit in
-   * progress, we will missing TCP time state updates?
-   */
-
-  (void)devif_timer(&vnet->sk_dev, vnet_txpoll);
-
-  /* Setup the watchdog poll timer again */
-
-  (void)wd_start(vnet->sk_txpoll, VNET_WDDELAY, vnet_polltimer, 1,
-                 (wdparm_t)arg);
-}
-
-/****************************************************************************
- * Function: vnet_ifup
- *
- * Description:
- *   NuttX Callback: Bring up the Ethernet interface when an IP address is
- *   provided
- *
- * Parameters:
- *   dev  - Reference to the NuttX driver state structure
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *
- ****************************************************************************/
-
-static int vnet_ifup(struct net_driver_s *dev)
-{
-  FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)dev->d_private;
-
-  ndbg("Bringing up: %d.%d.%d.%d\n",
-     dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
-     (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
-
-  /* Initialize PHYs, the Ethernet interface, and setup up Ethernet interrupts */
-
-  /* Set and activate a timer process */
-
-  (void)wd_start(vnet->sk_txpoll, VNET_WDDELAY, vnet_polltimer, 1,
-                 (wdparm_t)vnet);
-
-  vnet->sk_bifup = true;
-  return OK;
-}
-
-/****************************************************************************
- * Function: vnet_ifdown
- *
- * Description:
- *   NuttX Callback: Stop the interface.
- *
- * Parameters:
- *   dev  - Reference to the NuttX driver state structure
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *
- ****************************************************************************/
-
-static int vnet_ifdown(struct net_driver_s *dev)
-{
-  FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)dev->d_private;
-  irqstate_t flags;
-
-  /* Disable the Ethernet interrupt */
-
-  flags = enter_critical_section();
-
-  /* Cancel the TX poll timer and TX timeout timers */
-
-  wd_cancel(vnet->sk_txpoll);
-
-  /* Put the EMAC is its reset, non-operational state.  This should be
-   * a known configuration that will guarantee the vnet_ifup() always
-   * successfully brings the interface back up.
-   */
-
-  /* Mark the device "down" */
-
-  vnet->sk_bifup = false;
-  leave_critical_section(flags);
-  return OK;
-}
-
-/****************************************************************************
- * Function: vnet_txavail
- *
- * Description:
- *   Driver callback invoked when new TX data is available.  This is a
- *   stimulus perform an out-of-cycle poll and, thereby, reduce the TX
- *   latency.
- *
- * Parameters:
- *   dev  - Reference to the NuttX driver state structure
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Called in normal user mode
- *
- ****************************************************************************/
-
-static int vnet_txavail(struct net_driver_s *dev)
-{
-  FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)dev->d_private;
-  irqstate_t flags;
-
-  /* Disable interrupts because this function may be called from interrupt
-   * level processing.
-   */
-
-  flags = enter_critical_section();
-
-  /* Ignore the notification if the interface is not yet up */
-
-  if (vnet->sk_bifup)
-    {
-      /* Check if there is room in the hardware to hold another outgoing packet. */
-
-      if (vnet_is_txbuff_full(vnet->vnet))
-        {
-#ifdef CONFIG_DEBUG
-          cprintf("VNET: TX buffer is full\n");
-#endif
-          goto out;
-        }
-
-      /* If so, then poll the network for new XMIT data */
-
-      (void)devif_poll(&vnet->sk_dev, vnet_txpoll);
-    }
-
-out:
-  leave_critical_section(flags);
-  return OK;
-}
-
-/****************************************************************************
- * Function: vnet_addmac
- *
- * Description:
- *   NuttX Callback: Add the specified MAC address to the hardware multicast
- *   address filtering
- *
- * Parameters:
- *   dev  - Reference to the NuttX driver state structure
- *   mac  - The MAC address to be added
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_IGMP
-static int vnet_addmac(struct net_driver_s *dev, FAR const uint8_t *mac)
-{
-  FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)dev->d_private;
-
-  /* Add the MAC address to the hardware multicast routing table */
-
-  return OK;
-}
-#endif
-
-/****************************************************************************
- * Function: vnet_rmmac
- *
- * Description:
- *   NuttX Callback: Remove the specified MAC address from the hardware multicast
- *   address filtering
- *
- * Parameters:
- *   dev  - Reference to the NuttX driver state structure
- *   mac  - The MAC address to be removed
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NET_IGMP
-static int vnet_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac)
-{
-  FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)dev->d_private;
-
-  /* Add the MAC address to the hardware multicast routing table */
-
-  return OK;
-}
-#endif
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Function: vnet_initialize
- *
- * Description:
- *   Initialize the Ethernet controller and driver
- *
- * Parameters:
- *   intf - In the case where there are multiple EMACs, this value
- *          identifies which EMAC is to be initialized.
- *
- * Returned Value:
- *   OK on success; Negated errno on failure.
- *
- * Assumptions:
- *
- ****************************************************************************/
-
-int vnet_init(struct rgmp_vnet *vnet)
-{
-  struct vnet_driver_s *priv;
-  static int i = 0;
-
-  if (i >= CONFIG_VNET_NINTERFACES)
-    {
-      return -1;
-    }
-
-  priv = &g_vnet[i++];
-
-  /* Initialize the driver structure */
-
-  memset(priv, 0, sizeof(struct vnet_driver_s));
-  priv->sk_dev.d_ifup    = vnet_ifup;     /* I/F down callback */
-  priv->sk_dev.d_ifdown  = vnet_ifdown;   /* I/F up (new IP address) callback */
-  priv->sk_dev.d_txavail = vnet_txavail;  /* New TX data callback */
-#ifdef CONFIG_NET_IGMP
-  priv->sk_dev.d_addmac  = vnet_addmac;   /* Add multicast MAC address */
-  priv->sk_dev.d_rmmac   = vnet_rmmac;    /* Remove multicast MAC address */
-#endif
-  priv->sk_dev.d_private = (FAR void *)priv; /* Used to recover private state from dev */
-
-  /* Create a watchdog for timing polling for and timing of transmisstions */
-
-  priv->sk_txpoll        = wd_create();   /* Create periodic poll timer */
-
-  priv->vnet             = vnet;
-  vnet->priv             = priv;
-
-  /* Register the device with the OS */
-
-  (void)netdev_register(&priv->sk_dev), NET_LL_ETHERNET;
-
-  return 0;
-}
-
-#endif /* CONFIG_NET && CONFIG_NET_VNET */
diff --git a/drivers/pipes/Kconfig b/drivers/pipes/Kconfig
index f72f3c094ce4c8f031445c514c343376e4e79e75..ace6ca8458db03dd16a4293c861943458adfbb14 100644
--- a/drivers/pipes/Kconfig
+++ b/drivers/pipes/Kconfig
@@ -2,3 +2,26 @@
 # For a description of the syntax of this configuration file,
 # see the file kconfig-language.txt in the NuttX tools repository.
 #
+
+config DEV_PIPE_MAXSIZE
+	int "Maximum pipe/FIFO size"
+	default 1024 if !DEFAULT_SMALL
+	default 256 if DEFAULT_SMALL
+	---help---
+		Maximum configurable size of a pipe or FIFO at runtime.
+
+config DEV_PIPE_SIZE
+	int "Default pipe size"
+	default 1024 if !DEFAULT_SMALL
+	default 256 if DEFAULT_SMALL
+	---help---
+		Sets the default size of the pipe ringbuffer in bytes.  A value of
+		zero disables pipe support.
+
+config DEV_FIFO_SIZE
+	int "Default FIFO size"
+	default 1024 if !DEFAULT_SMALL
+	default 256 if DEFAULT_SMALL
+	---help---
+		Sets the default size of the FIFO ringbuffer in bytes.  A value of
+		zero disables FIFO support.
diff --git a/drivers/pipes/fifo.c b/drivers/pipes/fifo.c
index b63f9a185614627f6cf8fdf5efb7265ffe3b217d..43afa5556f99faf79120c70a39c846fe3926147e 100644
--- a/drivers/pipes/fifo.c
+++ b/drivers/pipes/fifo.c
@@ -41,14 +41,15 @@
 
 #include 
 #include 
-
 #include 
-#include 
 #include 
 
+#include 
+#include 
+
 #include "pipe_common.h"
 
-#if CONFIG_DEV_PIPE_SIZE > 0
+#if CONFIG_DEV_FIFO_SIZE > 0
 
 /****************************************************************************
  * Private Data
@@ -75,7 +76,7 @@ static const struct file_operations fifo_fops =
  ****************************************************************************/
 
 /****************************************************************************
- * Name: mkfifo
+ * Name: mkfifo2
  *
  * Description:
  *   mkfifo() makes a FIFO device driver file with name 'pathname.'  Unlike
@@ -92,10 +93,15 @@ static const struct file_operations fifo_fops =
  *   If all threads that write to the FIFO have closed, subsequent calls to
  *   read() on the FIFO will return 0 (end-of-file).
  *
+ *   NOTE: mkfifo2 is a special, non-standard, NuttX-only interface.  Since
+ *   the NuttX FIFOs are based in in-memory, circular buffers, the ability
+ *   to control the size of those buffers is critical for system tuning.
+ *
  * Inputs:
  *   pathname - The full path to the FIFO instance to attach to or to create
  *     (if not already created).
  *   mode - Ignored for now
+ *   bufsize - The size of the in-memory, circular buffer in bytes.
  *
  * Return:
  *   0 is returned on success; otherwise, -1 is returned with errno set
@@ -103,14 +109,14 @@ static const struct file_operations fifo_fops =
  *
  ****************************************************************************/
 
-int mkfifo(FAR const char *pathname, mode_t mode)
+int mkfifo2(FAR const char *pathname, mode_t mode, size_t bufsize)
 {
   FAR struct pipe_dev_s *dev;
   int ret;
 
   /* Allocate and initialize a new device structure instance */
 
-  dev = pipecommon_allocdev();
+  dev = pipecommon_allocdev(bufsize);
   if (!dev)
     {
       return -ENOMEM;
@@ -125,4 +131,4 @@ int mkfifo(FAR const char *pathname, mode_t mode)
   return ret;
 }
 
-#endif /* CONFIG_DEV_PIPE_SIZE > 0 */
+#endif /* CONFIG_DEV_FIFO_SIZE > 0 */
diff --git a/drivers/pipes/pipe.c b/drivers/pipes/pipe.c
index b4c6acd72c4dbd0a649f0362f824d2e1d5f7784f..eb898bfec73853f4ad9e46e675e13082bd72b588 100644
--- a/drivers/pipes/pipe.c
+++ b/drivers/pipes/pipe.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -44,13 +40,16 @@
 #include 
 
 #include 
-#include 
+
 #include 
 #include 
 #include 
 #include 
 #include 
 
+#include 
+#include 
+
 #include "pipe_common.h"
 
 #if CONFIG_DEV_PIPE_SIZE > 0
@@ -167,16 +166,21 @@ static int pipe_close(FAR struct file *filep)
  ****************************************************************************/
 
 /****************************************************************************
- * Name: pipe
+ * Name: pipe2
  *
  * Description:
  *   pipe() creates a pair of file descriptors, pointing to a pipe inode,
  *   and  places them in the array pointed to by 'fd'. fd[0] is for reading,
  *   fd[1] is for writing.
  *
+ *   NOTE: mkfifo2 is a special, non-standard, NuttX-only interface.  Since
+ *   the NuttX FIFOs are based in in-memory, circular buffers, the ability
+ *   to control the size of those buffers is critical for system tuning.
+ *
  * Inputs:
  *   fd[2] - The user provided array in which to catch the pipe file
  *   descriptors
+ *   bufsize - The size of the in-memory, circular buffer in bytes.
  *
  * Return:
  *   0 is returned on success; otherwise, -1 is returned with errno set
@@ -184,12 +188,12 @@ static int pipe_close(FAR struct file *filep)
  *
  ****************************************************************************/
 
-int pipe(int fd[2])
+int pipe2(int fd[2], size_t bufsize)
 {
   FAR struct pipe_dev_s *dev = NULL;
   char devname[16];
   int pipeno;
-  int err;
+  int errcode;
   int ret;
 
   /* Get exclusive access to the pipe allocation data */
@@ -208,7 +212,7 @@ int pipe(int fd[2])
   if (pipeno < 0)
     {
       (void)sem_post(&g_pipesem);
-      err = -pipeno;
+      errcode = -pipeno;
       goto errout;
     }
 
@@ -222,11 +226,11 @@ int pipe(int fd[2])
     {
       /* No.. Allocate and initialize a new device structure instance */
 
-      dev = pipecommon_allocdev();
+      dev = pipecommon_allocdev(bufsize);
       if (!dev)
         {
           (void)sem_post(&g_pipesem);
-          err = ENOMEM;
+          errcode = ENOMEM;
           goto errout_with_pipe;
         }
 
@@ -238,7 +242,7 @@ int pipe(int fd[2])
       if (ret != 0)
         {
           (void)sem_post(&g_pipesem);
-          err = -ret;
+          errcode = -ret;
           goto errout_with_dev;
         }
 
@@ -254,7 +258,7 @@ int pipe(int fd[2])
   fd[1] = open(devname, O_WRONLY);
   if (fd[1] < 0)
     {
-      err = -fd[1];
+      errcode = -fd[1];
       goto errout_with_driver;
     }
 
@@ -263,7 +267,7 @@ int pipe(int fd[2])
   fd[0] = open(devname, O_RDONLY);
   if (fd[0] < 0)
     {
-      err = -fd[0];
+      errcode = -fd[0];
       goto errout_with_wrfd;
     }
 
@@ -285,7 +289,7 @@ errout_with_pipe:
   pipe_free(pipeno);
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 }
 
diff --git a/drivers/pipes/pipe_common.c b/drivers/pipes/pipe_common.c
index 862d244527f3110e99e9947bf10b2d4645828254..6fc0711dcf3474e256cead765255903083fde163 100644
--- a/drivers/pipes/pipe_common.c
+++ b/drivers/pipes/pipe_common.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/pipes/pipe_common.c
  *
- *   Copyright (C) 2008-2009, 2011, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2011, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -53,16 +53,17 @@
 #include 
 #include 
 
+#ifdef CONFIG_DEBUG_FEATURES
+#  include 
+#endif
 #include 
+#include 
 #include 
 #include 
-#ifdef CONFIG_DEBUG
-#  include 
-#endif
 
 #include "pipe_common.h"
 
-#if CONFIG_DEV_PIPE_SIZE > 0
+#ifdef CONFIG_PIPES
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -122,6 +123,7 @@ static void pipecommon_pollnotify(FAR struct pipe_dev_s *dev,
   for (i = 0; i < CONFIG_DEV_PIPE_NPOLLWAITERS; i++)
     {
       FAR struct pollfd *fds = dev->d_fds[i];
+
       if (fds)
         {
           fds->revents |= eventset & (fds->events | POLLERR | POLLHUP);
@@ -135,7 +137,7 @@ static void pipecommon_pollnotify(FAR struct pipe_dev_s *dev,
 
           if (fds->revents != 0)
             {
-              fvdbg("Report events: %02x\n", fds->revents);
+              finfo("Report events: %02x\n", fds->revents);
               sem_post(fds->sem);
             }
         }
@@ -153,10 +155,12 @@ static void pipecommon_pollnotify(FAR struct pipe_dev_s *dev,
  * Name: pipecommon_allocdev
  ****************************************************************************/
 
-FAR struct pipe_dev_s *pipecommon_allocdev(void)
+FAR struct pipe_dev_s *pipecommon_allocdev(size_t bufsize)
 {
   FAR struct pipe_dev_s *dev;
 
+  DEBUGASSERT(bufsize <= CONFIG_DEV_PIPE_MAXSIZE);
+
   /* Allocate a private structure to manage the pipe */
 
   dev = (FAR struct pipe_dev_s *)kmm_malloc(sizeof(struct pipe_dev_s));
@@ -168,6 +172,15 @@ FAR struct pipe_dev_s *pipecommon_allocdev(void)
       sem_init(&dev->d_bfsem, 0, 1);
       sem_init(&dev->d_rdsem, 0, 0);
       sem_init(&dev->d_wrsem, 0, 0);
+
+     /* The read/write wait semaphores are used for signaling and, hence,
+      * should not have priority inheritance enabled.
+      */
+
+     sem_setprotocol(&dev->d_rdsem, SEM_PRIO_NONE);
+     sem_setprotocol(&dev->d_wrsem, SEM_PRIO_NONE);
+
+      dev->d_bufsize = bufsize;
     }
 
   return dev;
@@ -205,7 +218,7 @@ int pipecommon_open(FAR struct file *filep)
   ret = sem_wait(&dev->d_bfsem);
   if (ret != OK)
     {
-      fdbg("sem_wait failed: %d\n", get_errno());
+      ferr("ERROR: sem_wait failed: %d\n", get_errno());
       DEBUGASSERT(get_errno() > 0);
       return -get_errno();
     }
@@ -217,7 +230,7 @@ int pipecommon_open(FAR struct file *filep)
 
   if (dev->d_refs == 0 && dev->d_buffer == NULL)
     {
-      dev->d_buffer = (FAR uint8_t *)kmm_malloc(CONFIG_DEV_PIPE_SIZE);
+      dev->d_buffer = (FAR uint8_t *)kmm_malloc(dev->d_bufsize);
       if (!dev->d_buffer)
         {
           (void)sem_post(&dev->d_bfsem);
@@ -283,7 +296,7 @@ int pipecommon_open(FAR struct file *filep)
            * a signal.
            */
 
-          fdbg("sem_wait failed: %d\n", get_errno());
+          ferr("ERROR: sem_wait failed: %d\n", get_errno());
           DEBUGASSERT(get_errno() > 0);
           ret = -get_errno();
 
@@ -397,7 +410,7 @@ int pipecommon_close(FAR struct file *filep)
           return OK;
         }
 #endif
-   }
+    }
 
   sem_post(&dev->d_bfsem);
   return OK;
@@ -471,10 +484,11 @@ ssize_t pipecommon_read(FAR struct file *filep, FAR char *buffer, size_t len)
   while ((size_t)nread < len && dev->d_wrndx != dev->d_rdndx)
     {
       *buffer++ = dev->d_buffer[dev->d_rdndx];
-      if (++dev->d_rdndx >= CONFIG_DEV_PIPE_SIZE)
+      if (++dev->d_rdndx >= dev->d_bufsize)
         {
           dev->d_rdndx = 0;
         }
+
       nread++;
     }
 
@@ -519,9 +533,9 @@ ssize_t pipecommon_write(FAR struct file *filep, FAR const char *buffer,
   /* At present, this method cannot be called from interrupt handlers.  That is
    * because it calls sem_wait (via pipecommon_semtake below) and sem_wait cannot
    * be called from interrupt level.  This actually happens fairly commonly
-   * IF dbg() is called from interrupt handlers and stdout is being redirected
+   * IF [a-z]err() is called from interrupt handlers and stdout is being redirected
    * via a pipe.  In that case, the debug output will try to go out the pipe
-   * (interrupt handlers should use the lldbg() APIs).
+   * (interrupt handlers should use the  _err() APIs).
    *
    * On the other hand, it would be very valuable to be able to feed the pipe
    * from an interrupt handler!  TODO:  Consider disabling interrupts instead
@@ -545,7 +559,7 @@ ssize_t pipecommon_write(FAR struct file *filep, FAR const char *buffer,
       /* Calculate the write index AFTER the next byte is written */
 
       nxtwrndx = dev->d_wrndx + 1;
-      if (nxtwrndx >= CONFIG_DEV_PIPE_SIZE)
+      if (nxtwrndx >= dev->d_bufsize)
         {
           nxtwrndx = 0;
         }
@@ -594,6 +608,7 @@ ssize_t pipecommon_write(FAR struct file *filep, FAR const char *buffer,
                   sem_post(&dev->d_rdsem);
                 }
             }
+
           last = nwritten;
 
           /* If O_NONBLOCK was set, then return partial bytes written or EGAIN */
@@ -604,6 +619,7 @@ ssize_t pipecommon_write(FAR struct file *filep, FAR const char *buffer,
                 {
                   nwritten = -EAGAIN;
                 }
+
               sem_post(&dev->d_bfsem);
               return nwritten;
             }
@@ -676,14 +692,14 @@ int pipecommon_poll(FAR struct file *filep, FAR struct pollfd *fds,
         }
       else
         {
-          nbytes = (CONFIG_DEV_PIPE_SIZE-1) + dev->d_wrndx - dev->d_rdndx;
+          nbytes = (dev->d_bufsize - 1) + dev->d_wrndx - dev->d_rdndx;
         }
 
       /* Notify the POLLOUT event if the pipe is not full, but only if
        * there is readers. */
 
       eventset = 0;
-      if (nbytes < (CONFIG_DEV_PIPE_SIZE-1))
+      if (nbytes < (dev->d_bufsize - 1))
         {
           eventset |= POLLOUT;
         }
@@ -722,7 +738,7 @@ int pipecommon_poll(FAR struct file *filep, FAR struct pollfd *fds,
 
       FAR struct pollfd **slot = (FAR struct pollfd **)fds->priv;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       if (!slot)
         {
           ret              = -EIO;
@@ -752,7 +768,7 @@ int pipecommon_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   FAR struct pipe_dev_s *dev   = inode->i_private;
   int                    ret   = -EINVAL;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   /* Some sanity checking */
 
   if (dev == NULL)
@@ -780,31 +796,44 @@ int pipecommon_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
         }
         break;
 
-      case FIONREAD:
+      case FIONWRITE:  /* Number of bytes waiting in send queue */
+      case FIONREAD:   /* Number of bytes available for reading */
         {
           int count;
 
-          /* Determine the number of bytes available in the buffer */
+          /* Determine the number of bytes written to the buffer.  This is,
+           * of course, also the number of bytes that may be read from the
+           * buffer.
+           *
+           *   d_rdndx - index to remove next byte from the buffer
+           *   d_wrndx - Index to next location to add a byte to the buffer.
+           */
 
           if (dev->d_wrndx < dev->d_rdndx)
             {
-              count = (CONFIG_DEV_PIPE_SIZE - dev->d_rdndx) + dev->d_wrndx;
+              count = (dev->d_bufsize - dev->d_rdndx) + dev->d_wrndx;
             }
           else
             {
               count = dev->d_wrndx - dev->d_rdndx;
             }
 
-          *(FAR int *)arg = count;
+          *(FAR int *)((uintptr_t)arg) = count;
           ret = 0;
         }
         break;
 
-      case FIONWRITE:
+      /* Free space in buffer */
+
+      case FIONSPACE:
         {
           int count;
 
-          /* Determine the number of bytes free in the buffer */
+          /* Determine the number of bytes free in the buffer.
+           *
+           *   d_rdndx - index to remove next byte from the buffer
+           *   d_wrndx - Index to next location to add a byte to the buffer.
+           */
 
           if (dev->d_wrndx < dev->d_rdndx)
             {
@@ -812,10 +841,10 @@ int pipecommon_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
             }
           else
             {
-              count = ((CONFIG_DEV_PIPE_SIZE - dev->d_wrndx) + dev->d_rdndx) - 1;
+              count = ((dev->d_bufsize - dev->d_wrndx) + dev->d_rdndx) - 1;
             }
 
-          *(FAR int *)arg = count;
+          *(FAR int *)((uintptr_t)arg) = count;
           ret = 0;
         }
         break;
@@ -864,4 +893,4 @@ int pipecommon_unlink(FAR struct inode *inode)
 }
 #endif
 
-#endif /* CONFIG_DEV_PIPE_SIZE > 0 */
+#endif /* CONFIG_PIPES */
diff --git a/drivers/pipes/pipe_common.h b/drivers/pipes/pipe_common.h
index ae301795ecf42aa9262fb888535d16c217193f95..0986a27af17c70697e1713c25a88884776644956 100644
--- a/drivers/pipes/pipe_common.h
+++ b/drivers/pipes/pipe_common.h
@@ -47,15 +47,42 @@
 #include 
 #include 
 
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Pipe/FIFO support */
+
+#ifndef CONFIG_PIPES
+#  undef CONFIG_DEV_PIPE_MAXSIZE
+#  undef CONFIG_DEV_PIPE_SIZE
+#  undef CONFIG_DEV_FIFO_SIZE
+#  define CONFIG_DEV_PIPE_MAXSIZE 0
+#  define CONFIG_DEV_PIPE_SIZE 0
+#  define CONFIG_DEV_FIFO_SIZE 0
+#endif
+
+/* Pipe/FIFO size */
+
+#ifndef CONFIG_DEV_PIPE_MAXSIZE
+#  define CONFIG_DEV_PIPE_MAXSIZE 1024
+#endif
+
+#if CONFIG_DEV_PIPE_MAXSIZE <= 0
+#  undef CONFIG_PIPES
+#  undef CONFIG_DEV_PIPE_SIZE
+#  undef CONFIG_DEV_FIFO_SIZE
+#  define CONFIG_DEV_PIPE_SIZE 0
+#  define CONFIG_DEV_FIFO_SIZE 0
+#endif
+
 #ifndef CONFIG_DEV_PIPE_SIZE
 #  define CONFIG_DEV_PIPE_SIZE 1024
 #endif
 
-#if CONFIG_DEV_PIPE_SIZE > 0
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
+#ifndef CONFIG_DEV_FIFO_SIZE
+#  define CONFIG_DEV_FIFO_SIZE 1024
+#endif
 
 /* Maximum number of threads than can be waiting for POLL events */
 
@@ -87,9 +114,9 @@
 
 /* Make the buffer index as small as possible for the configured pipe size */
 
-#if CONFIG_DEV_PIPE_SIZE > 65535
+#if CONFIG_DEV_PIPE_MAXSIZE > 65535
 typedef uint32_t pipe_ndx_t;  /* 32-bit index */
-#elif CONFIG_DEV_PIPE_SIZE > 255
+#elif CONFIG_DEV_PIPE_MAXSIZE > 255
 typedef uint16_t pipe_ndx_t;  /* 16-bit index */
 #else
 typedef uint8_t pipe_ndx_t;   /*  8-bit index */
@@ -107,6 +134,7 @@ struct pipe_dev_s
   sem_t      d_wrsem;       /* Full buffer - Writer waits for data read */
   pipe_ndx_t d_wrndx;       /* Index in d_buffer to save next byte written */
   pipe_ndx_t d_rdndx;       /* Index in d_buffer to return the next byte read */
+  pipe_ndx_t d_bufsize;     /* allocated size of d_buffer in bytes */
   uint8_t    d_refs;        /* References counts on pipe (limited to 255) */
   uint8_t    d_nwriters;    /* Number of reference counts for write access */
   uint8_t    d_nreaders;    /* Number of reference counts for read access */
@@ -130,7 +158,8 @@ struct pipe_dev_s
 
 #ifdef __cplusplus
 #  define EXTERN extern "C"
-extern "C" {
+extern "C"
+{
 #else
 #  define EXTERN extern
 #endif
@@ -138,7 +167,7 @@ extern "C" {
 struct file;  /* Forward reference */
 struct inode; /* Forward reference */
 
-FAR struct pipe_dev_s *pipecommon_allocdev(void);
+FAR struct pipe_dev_s *pipecommon_allocdev(size_t bufsize);
 void    pipecommon_freedev(FAR struct pipe_dev_s *dev);
 int     pipecommon_open(FAR struct file *filep);
 int     pipecommon_close(FAR struct file *filep);
@@ -158,5 +187,4 @@ int     pipecommon_unlink(FAR struct inode *priv);
 }
 #endif
 
-#endif /* CONFIG_DEV_PIPE_SIZE > 0 */
 #endif /* __DRIVERS_PIPES_PIPE_COMMON_H */
diff --git a/drivers/power/battery_charger.c b/drivers/power/battery_charger.c
index 056e16e98c844046426c75fdb67ba7e065823b39..0a573375dc573a96dcc89f9d5985a258b6c29843 100644
--- a/drivers/power/battery_charger.c
+++ b/drivers/power/battery_charger.c
@@ -228,7 +228,7 @@ static int bat_charger_ioctl(FAR struct file *filep, int cmd,
         break;
 
       default:
-        dbg("Unrecognized cmd: %d\n", cmd);
+        _err("ERROR: Unrecognized cmd: %d\n", cmd);
         ret = -ENOTTY;
         break;
     }
@@ -268,7 +268,7 @@ int battery_charger_register(FAR const char *devpath,
   ret = register_driver(devpath, &g_batteryops, 0555, dev);
   if (ret < 0)
     {
-      dbg("Failed to register driver: %d\n", ret);
+      _err("ERROR: Failed to register driver: %d\n", ret);
     }
 
   return ret;
diff --git a/drivers/power/battery_gauge.c b/drivers/power/battery_gauge.c
index cf6a962e2b6bfc02d83b4c38b371d193f41c558a..f0b2f9f66c2667750b78c2f99c4854bcfa18e3c6 100644
--- a/drivers/power/battery_gauge.c
+++ b/drivers/power/battery_gauge.c
@@ -213,7 +213,7 @@ static int bat_gauge_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
         break;
 
       default:
-        dbg("Unrecognized cmd: %d\n", cmd);
+        _err("ERROR: Unrecognized cmd: %d\n", cmd);
         ret = -ENOTTY;
         break;
     }
@@ -253,7 +253,7 @@ int battery_gauge_register(FAR const char *devpath,
   ret = register_driver(devpath, &g_batteryops, 0555, dev);
   if (ret < 0)
     {
-      dbg("Failed to register driver: %d\n", ret);
+      _err("ERROR: Failed to register driver: %d\n", ret);
     }
 
   return ret;
diff --git a/drivers/power/bq2425x.c b/drivers/power/bq2425x.c
index 073c3ce379f6774378abb2e98188bc5ae2bde34f..661187cdee6defc41d653a2dc70001c908e4a7c6 100644
--- a/drivers/power/bq2425x.c
+++ b/drivers/power/bq2425x.c
@@ -78,12 +78,15 @@
 /* Debug ********************************************************************/
 
 #ifdef CONFIG_DEBUG_BQ2425X
-#  define batdbg dbg
+#  define baterr  _err
+#  define batreg  _err
 #else
 #  ifdef CONFIG_CPP_HAVE_VARARGS
-#    define batdbg(x...)
+#    define baterr(x...)
+#    define batreg(x...)
 #  else
-#    define batdbg (void)
+#    define baterr (void)
+#    define batreg (void)
 #  endif
 #endif
 
@@ -176,7 +179,7 @@ static int bq2425x_getreg8(FAR struct bq2425x_dev_s *priv, uint8_t regaddr,
   ret = i2c_write(priv->i2c, &config, ®addr, 1);
   if (ret < 0)
     {
-      batdbg("i2c_write failed: %d\n", ret);
+      baterr("ERROR: i2c_write failed: %d\n", ret);
       return ret;
     }
 
@@ -185,7 +188,7 @@ static int bq2425x_getreg8(FAR struct bq2425x_dev_s *priv, uint8_t regaddr,
   ret = i2c_read(priv->i2c, &config, &val, 1);
   if (ret < 0)
     {
-      batdbg("i2c_read failed: %d\n", ret);
+      baterr("ERROR: i2c_read failed: %d\n", ret);
       return ret;
     }
 
@@ -217,7 +220,7 @@ static int bq2425x_putreg8(FAR struct bq2425x_dev_s *priv, uint8_t regaddr,
   config.address   = priv->addr;
   config.addrlen   = 7;
 
-  batdbg("addr: %02x regval: %08x\n", regaddr, regval);
+  batreg("addr: %02x regval: %08x\n", regaddr, regval);
 
   /* Set up a 3 byte message to send */
 
@@ -270,7 +273,7 @@ static inline int bq2425x_reset(FAR struct bq2425x_dev_s *priv)
   ret = bq2425x_getreg8(priv, BQ2425X_REG_2, ®val);
   if (ret < 0)
     {
-      batdbg("Error reading from BQ2425X! Error =  %d\n", ret);
+      baterr("ERROR: Error reading from BQ2425X! Error =  %d\n", ret);
       return ret;
     }
 
@@ -280,7 +283,7 @@ static inline int bq2425x_reset(FAR struct bq2425x_dev_s *priv)
   ret = bq2425x_putreg8(priv, BQ2425X_REG_2, regval);
   if (ret < 0)
     {
-      batdbg("Error writing to BQ2425X! Error =  %d\n", ret);
+      baterr("ERROR: Error writing to BQ2425X! Error =  %d\n", ret);
       return ret;
     }
 
@@ -294,7 +297,7 @@ static inline int bq2425x_reset(FAR struct bq2425x_dev_s *priv)
   ret = bq2425x_putreg8(priv, BQ2425X_REG_2, regval);
   if (ret < 0)
     {
-      batdbg("Error writing to BQ2425X! Error =  %d\n", ret);
+      baterr("ERROR: Error writing to BQ2425X! Error =  %d\n", ret);
       return ret;
     }
 
@@ -317,7 +320,7 @@ static inline int bq2425x_watchdog(FAR struct bq2425x_dev_s *priv, bool enable)
   ret = bq2425x_getreg8(priv, BQ2425X_REG_1, ®val);
   if (ret < 0)
     {
-      batdbg("Error reading from BQ2425X! Error =  %d\n", ret);
+      baterr("ERROR: Error reading from BQ2425X! Error =  %d\n", ret);
       return ret;
     }
 
@@ -333,7 +336,7 @@ static inline int bq2425x_watchdog(FAR struct bq2425x_dev_s *priv, bool enable)
   ret = bq2425x_putreg8(priv, BQ2425X_REG_1, regval);
   if (ret < 0)
     {
-      batdbg("Error writing to BQ2425X! Error =  %d\n", ret);
+      baterr("ERROR: Error writing to BQ2425X! Error =  %d\n", ret);
       return ret;
     }
 
@@ -515,7 +518,7 @@ static inline int bq2425x_powersupply(FAR struct bq2425x_dev_s *priv, int curren
     break;
 
   default:
-    batdbg("Current not supported, setting default to 100mA.!\n");
+    baterr("ERROR: Current not supported, setting default to 100mA.!\n");
     idx = BQ2425X_INP_CURR_LIM_100MA;
     break;
   }
@@ -525,7 +528,7 @@ static inline int bq2425x_powersupply(FAR struct bq2425x_dev_s *priv, int curren
   ret = bq2425x_getreg8(priv, BQ2425X_REG_2, ®val);
   if (ret < 0)
     {
-      batdbg("Error reading from BQ2425X! Error =  %d\n", ret);
+      baterr("ERROR: Error reading from BQ2425X! Error =  %d\n", ret);
       return ret;
     }
 
@@ -541,7 +544,7 @@ static inline int bq2425x_powersupply(FAR struct bq2425x_dev_s *priv, int curren
   ret = bq2425x_putreg8(priv, BQ2425X_REG_2, regval);
   if (ret < 0)
     {
-      batdbg("Error writing to BQ2425X! Error =  %d\n", ret);
+      baterr("ERROR: Error writing to BQ2425X! Error =  %d\n", ret);
       return ret;
     }
 
@@ -565,14 +568,14 @@ static inline int bq2425x_setvolt(FAR struct bq2425x_dev_s *priv, int volts)
 
   if (volts < BQ2425X_VOLT_MIN || volts > BQ2425X_VOLT_MAX)
     {
-      batdbg("Voltage %d mV is out of range.\n", volts);
+      baterr("ERROR: Voltage %d mV is out of range.\n", volts);
       return -EINVAL;
     }
 
   ret = bq2425x_getreg8(priv, BQ2425X_REG_3, ®val);
   if (ret < 0)
     {
-      batdbg("Error reading from BQ2425X! Error =  %d\n", ret);
+      baterr("ERROR: Error reading from BQ2425X! Error =  %d\n", ret);
       return ret;
     }
 
@@ -589,7 +592,7 @@ static inline int bq2425x_setvolt(FAR struct bq2425x_dev_s *priv, int volts)
   ret = bq2425x_putreg8(priv, BQ2425X_REG_3, regval);
   if (ret < 0)
     {
-      batdbg("Error writing to BQ2425X! Error =  %d\n", ret);
+      baterr("ERROR: Error writing to BQ2425X! Error =  %d\n", ret);
       return ret;
     }
 
@@ -613,14 +616,14 @@ static inline int bq2425x_setcurr(FAR struct bq2425x_dev_s *priv, int current)
 
   if (current < BQ2425X_CURR_MIN || current > BQ2425X_CURR_MAX)
     {
-      batdbg("Current %d mA is out of range.\n", volts);
+      baterr("ERROR: Current %d mA is out of range.\n", volts);
       return -EINVAL;
     }
 
   ret = bq2425x_getreg8(priv, BQ2425X_REG_4, ®val);
   if (ret < 0)
     {
-      batdbg("Error reading from BQ2425X! Error =  %d\n", ret);
+      baterr("ERROR: Error reading from BQ2425X! Error =  %d\n", ret);
       return ret;
     }
 
@@ -637,7 +640,7 @@ static inline int bq2425x_setcurr(FAR struct bq2425x_dev_s *priv, int current)
   ret = bq2425x_putreg8(priv, BQ2425X_REG_4, regval);
   if (ret < 0)
     {
-      batdbg("Error writing to BQ2425X! Error =  %d\n", ret);
+      baterr("ERROR: Error writing to BQ2425X! Error =  %d\n", ret);
       return ret;
     }
 
@@ -663,7 +666,7 @@ static int bq2425x_voltage(struct battery_charger_dev_s *dev, int value)
   ret = bq2425x_setvolt(priv, value);
   if (ret < 0)
     {
-      batdbg("Error setting voltage to BQ2425X! Error =  %d\n", ret);
+      baterr("ERROR: Error setting voltage to BQ2425X! Error =  %d\n", ret);
       return ret;
     }
 
@@ -688,7 +691,7 @@ static int bq2425x_current(struct battery_charger_dev_s *dev, int value)
   ret = bq2425x_setcurr(priv, value);
   if (ret < 0)
     {
-      batdbg("Error setting current to BQ2425X! Error =  %d\n", ret);
+      baterr("ERROR: Error setting current to BQ2425X! Error =  %d\n", ret);
       return ret;
     }
 
@@ -749,7 +752,7 @@ FAR struct battery_charger_dev_s *
       ret = bq2425x_reset(priv);
       if (ret < 0)
         {
-          batdbg("Failed to reset the BQ2425x: %d\n", ret);
+          baterr("ERROR: Failed to reset the BQ2425x: %d\n", ret);
           kmm_free(priv);
           return NULL;
         }
@@ -759,7 +762,7 @@ FAR struct battery_charger_dev_s *
       ret = bq2425x_watchdog(priv, false);
       if (ret < 0)
         {
-          batdbg("Failed to disable BQ2425x watchdog: %d\n", ret);
+          baterr("ERROR: Failed to disable BQ2425x watchdog: %d\n", ret);
           kmm_free(priv);
           return NULL;
         }
@@ -769,7 +772,7 @@ FAR struct battery_charger_dev_s *
       ret = bq2425x_powersupply(priv, 2000);
       if (ret < 0)
         {
-          batdbg("Failed to set BQ2425x power supply current: %d\n", ret);
+          baterr("ERROR: Failed to set BQ2425x power supply current: %d\n", ret);
           kmm_free(priv);
           return NULL;
         }
diff --git a/drivers/power/max1704x.c b/drivers/power/max1704x.c
index 7fa3f850604e7e84cddd8d73d84d0c84e7d57a08..00f98fc189434f2c932134f981c27c39f26fe101 100644
--- a/drivers/power/max1704x.c
+++ b/drivers/power/max1704x.c
@@ -160,12 +160,12 @@
 /* Debug ********************************************************************/
 
 #ifdef CONFIG_DEBUG_MAX1704X
-#  define batdbg dbg
+#  define baterr  _err
 #else
 #  ifdef CONFIG_CPP_HAVE_VARARGS
-#    define batdbg(x...)
+#    define baterr(x...)
 #  else
-#    define batdbg (void)
+#    define baterr (void)
 #  endif
 #endif
 
@@ -258,7 +258,7 @@ static int max1704x_getreg16(FAR struct max1704x_dev_s *priv, uint8_t regaddr,
   ret = i2c_write(priv->i2c, &config, ®addr, 1);
   if (ret < 0)
     {
-      batdbg("i2c_write failed: %d\n", ret);
+      baterr("i2c_write failed: %d\n", ret);
       return ret;
     }
 
@@ -267,7 +267,7 @@ static int max1704x_getreg16(FAR struct max1704x_dev_s *priv, uint8_t regaddr,
   ret = i2c_read(priv->i2c, &config, buffer, 2);
   if (ret < 0)
     {
-      batdbg("i2c_read failed: %d\n", ret);
+      baterr("i2c_read failed: %d\n", ret);
       return ret;
     }
 
@@ -292,7 +292,7 @@ static int max1704x_putreg16(FAR struct max1704x_dev_s *priv, uint8_t regaddr,
   struct i2c_config_s config;
   uint8_t buffer[3];
 
-  batdbg("addr: %02x regval: %08x\n", regaddr, regval);
+  baterr("addr: %02x regval: %08x\n", regaddr, regval);
 
   /* Set up a 3 byte message to send */
 
@@ -554,7 +554,7 @@ FAR struct battery_gauge_dev_s *max1704x_initialize(FAR struct i2c_master_s *i2c
       ret = max1704x_reset(priv);
       if (ret < 0)
         {
-          batdbg("Failed to reset the MAX1704x: %d\n", ret);
+          baterr("Failed to reset the MAX1704x: %d\n", ret);
           kmm_free(priv);
           return NULL;
         }
diff --git a/drivers/pwm.c b/drivers/pwm.c
index b07e44ae2cf4c56a1256e555927dacde68f036ab..78b60751c04584f25fb8f398b3d948a11d5579a4 100644
--- a/drivers/pwm.c
+++ b/drivers/pwm.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/pwm.c
  *
- *   Copyright (C) 2011-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -55,33 +51,16 @@
 #include 
 #include 
 
+#include 
 #include 
+#include 
 #include 
-#include 
-#include 
+#include 
 
 #include 
 
 #ifdef CONFIG_PWM
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing PWM */
-
-#ifdef CONFIG_DEBUG_PWM
-#  define pwmdbg    dbg
-#  define pwmvdbg   vdbg
-#  define pwmlldbg  lldbg
-#  define pwmllvdbg llvdbg
-#else
-#  define pwmdbg(x...)
-#  define pwmvdbg(x...)
-#  define pwmlldbg(x...)
-#  define pwmllvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Type Definitions
  ****************************************************************************/
@@ -152,23 +131,23 @@ static void pwm_dump(FAR const char *msg, FAR const struct pwm_info_s *info,
   int i;
 #endif
 
-  pwmvdbg("%s: frequency: %d", msg, info->frequency);
+  pwminfo("%s: frequency: %d", msg, info->frequency);
 
 #ifdef CONFIG_PWM_MULTICHAN
   for (i = 0; i < CONFIG_PWM_NCHANNELS; i++)
     {
-      pwmvdbg(" channel: %d duty: %08x",
+      pwminfo(" channel: %d duty: %08x",
               info->channels[i].channel, info->channels[i].duty);
     }
 #else
-  pwmvdbg(" duty: %08x", info->duty);
+  pwminfo(" duty: %08x", info->duty);
 #endif
 
 #ifdef CONFIG_PWM_PULSECOUNT
-  pwmvdbg(" count: %d\n", info->count);
+  pwminfo(" count: %d\n", info->count);
 #endif
 
-  pwmvdbg(" started: %d\n", started);
+  pwminfo(" started: %d\n", started);
 }
 
 /****************************************************************************
@@ -186,7 +165,7 @@ static int pwm_open(FAR struct file *filep)
   uint8_t                     tmp;
   int                         ret;
 
-  pwmvdbg("crefs: %d\n", upper->crefs);
+  pwminfo("crefs: %d\n", upper->crefs);
 
   /* Get exclusive access to the device structures */
 
@@ -220,7 +199,7 @@ static int pwm_open(FAR struct file *filep)
       /* Yes.. perform one time hardware initialization. */
 
       DEBUGASSERT(lower->ops->setup != NULL);
-      pwmvdbg("calling setup\n");
+      pwminfo("calling setup\n");
 
       ret = lower->ops->setup(lower);
       if (ret < 0)
@@ -255,7 +234,7 @@ static int pwm_close(FAR struct file *filep)
   FAR struct pwm_upperhalf_s *upper = inode->i_private;
   int                         ret;
 
-  pwmvdbg("crefs: %d\n", upper->crefs);
+  pwminfo("crefs: %d\n", upper->crefs);
 
   /* Get exclusive access to the device structures */
 
@@ -285,7 +264,7 @@ static int pwm_close(FAR struct file *filep)
       /* Disable the PWM device */
 
       DEBUGASSERT(lower->ops->shutdown != NULL);
-      pwmvdbg("calling shutdown: %d\n");
+      pwminfo("calling shutdown: %d\n");
 
       lower->ops->shutdown(lower);
     }
@@ -393,7 +372,7 @@ static int pwm_start(FAR struct pwm_upperhalf_s *upper, unsigned int oflags)
         {
           /* Looks like we won't be waiting after all */
 
-          pwmvdbg("start failed: %d\n", ret);
+          pwminfo("start failed: %d\n", ret);
           upper->started = false;
           upper->waiting = false;
         }
@@ -450,7 +429,7 @@ static int pwm_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   FAR struct pwm_lowerhalf_s *lower = upper->dev;
   int                         ret;
 
-  pwmvdbg("cmd: %d arg: %ld\n", cmd, arg);
+  pwminfo("cmd: %d arg: %ld\n", cmd, arg);
 
   /* Get exclusive access to the device structures */
 
@@ -540,7 +519,7 @@ static int pwm_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case PWMIOC_STOP:
         {
-          pwmvdbg("PWMIOC_STOP: started: %d\n", upper->started);
+          pwminfo("PWMIOC_STOP: started: %d\n", upper->started);
           DEBUGASSERT(lower->ops->stop != NULL);
 
           if (upper->started)
@@ -561,7 +540,7 @@ static int pwm_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       default:
         {
-          pwmvdbg("Forwarding unrecognized cmd: %d arg: %ld\n", cmd, arg);
+          pwminfo("Forwarding unrecognized cmd: %d arg: %ld\n", cmd, arg);
           DEBUGASSERT(lower->ops->ioctl != NULL);
           ret = lower->ops->ioctl(lower, cmd, arg);
         }
@@ -610,7 +589,7 @@ int pwm_register(FAR const char *path, FAR struct pwm_lowerhalf_s *dev)
   upper = (FAR struct pwm_upperhalf_s *)kmm_zalloc(sizeof(struct pwm_upperhalf_s));
   if (!upper)
     {
-      pwmdbg("Allocation failed\n");
+      pwmerr("Allocation failed\n");
       return -ENOMEM;
     }
 
@@ -619,12 +598,19 @@ int pwm_register(FAR const char *path, FAR struct pwm_lowerhalf_s *dev)
   sem_init(&upper->exclsem, 0, 1);
 #ifdef CONFIG_PWM_PULSECOUNT
   sem_init(&upper->waitsem, 0, 0);
+
+  /* The wait semaphore is used for signaling and, hence, should not have priority
+   * inheritance enabled.
+   */
+
+  sem_setprotocol(&upper->waitsem, SEM_PRIO_NONE);
 #endif
+
   upper->dev = dev;
 
   /* Register the PWM device */
 
-  pwmvdbg("Registering %s\n", path);
+  pwminfo("Registering %s\n", path);
   return register_driver(path, &g_pwmops, 0666, upper);
 }
 
@@ -670,7 +656,7 @@ void pwm_expired(FAR void *handle)
 {
   FAR struct pwm_upperhalf_s *upper = (FAR struct pwm_upperhalf_s *)handle;
 
-  pwmllvdbg("started: %d waiting: %d\n", upper->started, upper->waiting);
+  pwminfo("started: %d waiting: %d\n", upper->started, upper->waiting);
 
   /* Make sure that the PWM is started */
 
diff --git a/drivers/ramdisk.c b/drivers/ramdisk.c
index 09382dadd679f0cbba163587a61595c02bce548f..4473a41ad1d1485c8b636f82401fdacbc3310d4c 100644
--- a/drivers/ramdisk.c
+++ b/drivers/ramdisk.c
@@ -51,7 +51,7 @@
 
 #include 
 #include 
-#include 
+#include 
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -158,7 +158,7 @@ static const struct block_operations g_bops =
 #ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
 static void rd_destroy(FAR struct rd_struct_s *dev)
 {
-  fvdbg("Destroying RAM disk\n");
+  finfo("Destroying RAM disk\n");
 
   /* We we configured to free the RAM disk memory when unlinked? */
 
@@ -197,7 +197,7 @@ static int rd_open(FAR struct inode *inode)
   dev->rd_crefs++;
   DEBUGASSERT(dev->rd_crefs > 0);
 
-  fvdbg("rd_crefs: %d\n", dev->rd_crefs);
+  finfo("rd_crefs: %d\n", dev->rd_crefs);
   return OK;
 }
 #endif
@@ -221,7 +221,7 @@ static int rd_close(FAR struct inode *inode)
 
   DEBUGASSERT(dev->rd_crefs > 0);
   dev->rd_crefs--;
-  fvdbg("rd_crefs: %d\n", dev->rd_crefs);
+  finfo("rd_crefs: %d\n", dev->rd_crefs);
 
 #ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
   /* Was that the last open reference to the RAM disk? */
@@ -258,13 +258,13 @@ static ssize_t rd_read(FAR struct inode *inode, unsigned char *buffer,
   DEBUGASSERT(inode && inode->i_private);
   dev = (FAR struct rd_struct_s *)inode->i_private;
 
-  fvdbg("sector: %d nsectors: %d sectorsize: %d\n",
+  finfo("sector: %d nsectors: %d sectorsize: %d\n",
         start_sector, dev->rd_sectsize, nsectors);
 
   if (start_sector < dev->rd_nsectors &&
       start_sector + nsectors <= dev->rd_nsectors)
     {
-       fvdbg("Transfer %d bytes from %p\n",
+       finfo("Transfer %d bytes from %p\n",
              nsectors * dev->rd_sectsize,
              &dev->rd_buffer[start_sector * dev->rd_sectsize]);
 
@@ -293,7 +293,7 @@ static ssize_t rd_write(FAR struct inode *inode, const unsigned char *buffer,
   DEBUGASSERT(inode && inode->i_private);
   dev = (struct rd_struct_s *)inode->i_private;
 
-  fvdbg("sector: %d nsectors: %d sectorsize: %d\n",
+  finfo("sector: %d nsectors: %d sectorsize: %d\n",
         start_sector, dev->rd_sectsize, nsectors);
 
   if (!RDFLAG_IS_WRENABLED(dev->rd_flags))
@@ -303,7 +303,7 @@ static ssize_t rd_write(FAR struct inode *inode, const unsigned char *buffer,
   else if (start_sector < dev->rd_nsectors &&
            start_sector + nsectors <= dev->rd_nsectors)
     {
-      fvdbg("Transfer %d bytes from %p\n",
+      finfo("Transfer %d bytes from %p\n",
              nsectors * dev->rd_sectsize,
              &dev->rd_buffer[start_sector * dev->rd_sectsize]);
 
@@ -328,7 +328,7 @@ static int rd_geometry(FAR struct inode *inode, struct geometry *geometry)
 {
   struct rd_struct_s *dev;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   DEBUGASSERT(inode);
   if (geometry)
@@ -344,9 +344,9 @@ static int rd_geometry(FAR struct inode *inode, struct geometry *geometry)
       geometry->geo_nsectors      = dev->rd_nsectors;
       geometry->geo_sectorsize    = dev->rd_sectsize;
 
-      fvdbg("available: true mediachanged: false writeenabled: %s\n",
+      finfo("available: true mediachanged: false writeenabled: %s\n",
             geometry->geo_writeenabled ? "true" : "false");
-      fvdbg("nsectors: %d sectorsize: %d\n",
+      finfo("nsectors: %d sectorsize: %d\n",
             geometry->geo_nsectors, geometry->geo_sectorsize);
 
       return OK;
@@ -368,7 +368,7 @@ static int rd_ioctl(FAR struct inode *inode, int cmd, unsigned long arg)
   FAR struct rd_struct_s *dev;
   FAR void **ppv = (void**)((uintptr_t)arg);
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* Only one ioctl command is supported */
 
@@ -378,7 +378,7 @@ static int rd_ioctl(FAR struct inode *inode, int cmd, unsigned long arg)
       dev  = (FAR struct rd_struct_s *)inode->i_private;
       *ppv = (FAR void *)dev->rd_buffer;
 
-      fvdbg("ppv: %p\n", *ppv);
+      finfo("ppv: %p\n", *ppv);
       return OK;
     }
 
@@ -452,11 +452,11 @@ int romdisk_register(int minor, FAR const uint8_t *buffer, uint32_t nsectors,
   char devname[16];
   int ret = -ENOMEM;
 
-  fvdbg("buffer: %p nsectors: %d sectsize: %d\n", buffer, nsectors, sectsize);
+  finfo("buffer: %p nsectors: %d sectsize: %d\n", buffer, nsectors, sectsize);
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (minor < 0 || minor > 255 || !buffer || !nsectors || !sectsize)
     {
       return -EINVAL;
@@ -487,7 +487,7 @@ int romdisk_register(int minor, FAR const uint8_t *buffer, uint32_t nsectors,
       ret = register_blockdriver(devname, &g_bops, 0, dev);
       if (ret < 0)
         {
-          fdbg("register_blockdriver failed: %d\n", -ret);
+          ferr("register_blockdriver failed: %d\n", -ret);
           kmm_free(dev);
         }
     }
diff --git a/drivers/rwbuffer.c b/drivers/rwbuffer.c
index 764a6ebbc1aaf04b6e560b0f21e2ab524791866c..a7db82e156d0ad06e19464a51424a237847413df 100644
--- a/drivers/rwbuffer.c
+++ b/drivers/rwbuffer.c
@@ -52,7 +52,7 @@
 
 #include 
 #include 
-#include 
+#include 
 
 #if defined(CONFIG_DRVR_WRITEBUFFER) || defined(CONFIG_DRVR_READAHEAD)
 
@@ -161,11 +161,11 @@ static void rwb_wrflush(struct rwbuffer_s *rwb)
 {
   int ret;
 
-  fvdbg("Timeout!\n");
+  finfo("Timeout!\n");
 
   if (rwb->wrnblocks > 0)
     {
-      fvdbg("Flushing: blockstart=0x%08lx nblocks=%d from buffer=%p\n",
+      finfo("Flushing: blockstart=0x%08lx nblocks=%d from buffer=%p\n",
       (long)rwb->wrblockstart, rwb->wrnblocks, rwb->wrbuffer);
 
       /* Flush cache.  On success, the flush method will return the number
@@ -176,7 +176,7 @@ static void rwb_wrflush(struct rwbuffer_s *rwb)
       ret = rwb->wrflush(rwb->dev, rwb->wrbuffer, rwb->wrblockstart, rwb->wrnblocks);
       if (ret != rwb->wrnblocks)
         {
-          fdbg("ERROR: Error flushing write buffer: %d\n", ret);
+          ferr("ERROR: Error flushing write buffer: %d\n", ret);
         }
 
       rwb_resetwrbuffer(rwb);
@@ -252,7 +252,7 @@ static ssize_t rwb_writebuffer(FAR struct rwbuffer_s *rwb,
   if (((startblock != rwb->wrexpectedblock) && (rwb->wrnblocks)) ||
       ((rwb->wrnblocks + nblocks) > rwb->wrmaxblocks))
     {
-      fvdbg("writebuffer miss, expected: %08x, given: %08x\n",
+      finfo("writebuffer miss, expected: %08x, given: %08x\n",
             rwb->wrexpectedblock, startblock);
 
       /* Flush the write buffer */
@@ -260,7 +260,7 @@ static ssize_t rwb_writebuffer(FAR struct rwbuffer_s *rwb,
       ret = rwb->wrflush(rwb->dev, rwb->wrbuffer, rwb->wrblockstart, rwb->wrnblocks);
       if (ret < 0)
         {
-          fdbg("ERROR: Error writing multiple from cache: %d\n", -ret);
+          ferr("ERROR: Error writing multiple from cache: %d\n", -ret);
           return ret;
         }
 
@@ -271,13 +271,13 @@ static ssize_t rwb_writebuffer(FAR struct rwbuffer_s *rwb,
 
   if (rwb->wrnblocks == 0)
     {
-      fvdbg("Fresh cache starting at block: 0x%08x\n", startblock);
+      finfo("Fresh cache starting at block: 0x%08x\n", startblock);
       rwb->wrblockstart = startblock;
     }
 
   /* Add data to cache */
 
-  fvdbg("writebuffer: copying %d bytes from %p to %p\n",
+  finfo("writebuffer: copying %d bytes from %p to %p\n",
         nblocks * rwb->blocksize, wrbuffer,
         &rwb->wrbuffer[rwb->wrnblocks * rwb->blocksize]);
   memcpy(&rwb->wrbuffer[rwb->wrnblocks * rwb->blocksize],
@@ -413,7 +413,7 @@ int rwb_invalidate_writebuffer(FAR struct rwbuffer_s *rwb,
       off_t wrbend;
       off_t invend;
 
-      fvdbg("startblock=%d blockcount=%p\n", startblock, blockcount);
+      finfo("startblock=%d blockcount=%p\n", startblock, blockcount);
 
       rwb_semtake(&rwb->wrsem);
 
@@ -461,7 +461,7 @@ int rwb_invalidate_writebuffer(FAR struct rwbuffer_s *rwb,
           ret = rwb->wrflush(rwb->dev, src, block, nblocks);
           if (ret < 0)
             {
-              fdbg("ERROR: wrflush failed: %d\n", ret);
+              ferr("ERROR: wrflush failed: %d\n", ret);
             }
 
           /* Keep the blocks at the beginning of the buffer up the
@@ -549,7 +549,7 @@ int rwb_invalidate_readahead(FAR struct rwbuffer_s *rwb,
       off_t rhbend;
       off_t invend;
 
-      fvdbg("startblock=%d blockcount=%p\n", startblock, blockcount);
+      finfo("startblock=%d blockcount=%p\n", startblock, blockcount);
 
       rwb_semtake(&rwb->rhsem);
 
@@ -651,7 +651,7 @@ int rwb_initialize(FAR struct rwbuffer_s *rwb)
 #ifdef CONFIG_DRVR_WRITEBUFFER
   if (rwb->wrmaxblocks > 0)
     {
-      fvdbg("Initialize the write buffer\n");
+      finfo("Initialize the write buffer\n");
 
       /* Initialize the write buffer access semaphore */
 
@@ -670,19 +670,19 @@ int rwb_initialize(FAR struct rwbuffer_s *rwb)
           rwb->wrbuffer = kmm_malloc(allocsize);
           if (!rwb->wrbuffer)
             {
-              fdbg("Write buffer kmm_malloc(%d) failed\n", allocsize);
+              ferr("Write buffer kmm_malloc(%d) failed\n", allocsize);
               return -ENOMEM;
             }
         }
 
-      fvdbg("Write buffer size: %d bytes\n", allocsize);
+      finfo("Write buffer size: %d bytes\n", allocsize);
     }
 #endif /* CONFIG_DRVR_WRITEBUFFER */
 
 #ifdef CONFIG_DRVR_READAHEAD
   if (rwb->rhmaxblocks > 0)
     {
-      fvdbg("Initialize the read-ahead buffer\n");
+      finfo("Initialize the read-ahead buffer\n");
 
       /* Initialize the read-ahead buffer access semaphore */
 
@@ -701,12 +701,12 @@ int rwb_initialize(FAR struct rwbuffer_s *rwb)
           rwb->rhbuffer = kmm_malloc(allocsize);
           if (!rwb->rhbuffer)
             {
-              fdbg("Read-ahead buffer kmm_malloc(%d) failed\n", allocsize);
+              ferr("Read-ahead buffer kmm_malloc(%d) failed\n", allocsize);
               return -ENOMEM;
             }
         }
 
-      fvdbg("Read-ahead buffer size: %d bytes\n", allocsize);
+      finfo("Read-ahead buffer size: %d bytes\n", allocsize);
     }
 #endif /* CONFIG_DRVR_READAHEAD */
 
@@ -753,7 +753,7 @@ ssize_t rwb_read(FAR struct rwbuffer_s *rwb, off_t startblock,
   size_t remaining;
   int ret = OK;
 
-  fvdbg("startblock=%ld nblocks=%ld rdbuffer=%p\n",
+  finfo("startblock=%ld nblocks=%ld rdbuffer=%p\n",
         (long)startblock, (long)nblocks, rdbuffer);
 
 #ifdef CONFIG_DRVR_WRITEBUFFER
@@ -821,7 +821,7 @@ ssize_t rwb_read(FAR struct rwbuffer_s *rwb, off_t startblock,
               ret = rwb_rhreload(rwb, startblock);
               if (ret < 0)
                 {
-                  fdbg("ERROR: Failed to fill the read-ahead buffer: %d\n", ret);
+                  ferr("ERROR: Failed to fill the read-ahead buffer: %d\n", ret);
                   return (ssize_t)ret;
                 }
             }
@@ -880,7 +880,7 @@ ssize_t rwb_write(FAR struct rwbuffer_s *rwb, off_t startblock,
 #ifdef CONFIG_DRVR_WRITEBUFFER
   if (rwb->wrmaxblocks > 0)
     {
-      fvdbg("startblock=%d wrbuffer=%p\n", startblock, wrbuffer);
+      finfo("startblock=%d wrbuffer=%p\n", startblock, wrbuffer);
 
       /* Use the block cache unless the buffer size is bigger than block cache */
 
@@ -999,7 +999,7 @@ int rwb_invalidate(FAR struct rwbuffer_s *rwb,
   ret = rwb_invalidate_writebuffer(rwb, startblock, blockcount);
   if (ret < 0)
     {
-      fdbg("ERROR: rwb_invalidate_writebuffer failed: %d\n", ret);
+      ferr("ERROR: rwb_invalidate_writebuffer failed: %d\n", ret);
       return ret;
     }
 #endif
@@ -1008,7 +1008,7 @@ int rwb_invalidate(FAR struct rwbuffer_s *rwb,
   ret = rwb_invalidate_readahead(rwb, startblock, blockcount);
   if (ret < 0)
     {
-      fdbg("ERROR: rwb_invalidate_readahead failed: %d\n", ret);
+      ferr("ERROR: rwb_invalidate_readahead failed: %d\n", ret);
       return ret;
     }
 #endif
diff --git a/drivers/sensors/Kconfig b/drivers/sensors/Kconfig
index 78e4cd009abd5fb5df503e95184d5822ceed840f..9b3e2660b200cef81786ca5b59bf2ac54cb8e882 100644
--- a/drivers/sensors/Kconfig
+++ b/drivers/sensors/Kconfig
@@ -18,6 +18,13 @@ config BH1750FVI
 	---help---
 		Enable driver support for the Rohm BH1750FVI light sensor.
 
+config BMG160
+	bool "Bosch BMG160 Gyroscope Sensor support"
+	default n
+	select SPI
+	---help---
+		Enable driver support for the Bosch BMG160 gyroscope sensor.
+
 config BMP180
 	bool "Bosch BMP180 Barometer Sensor support"
 	default n
@@ -25,6 +32,33 @@ config BMP180
 	---help---
 		Enable driver support for the Bosch BMP180 barometer sensor.
 
+config SENSORS_L3GD20
+	bool "ST L3GD20 Gyroscope Sensor support"
+	default n
+	select SPI
+	---help---
+		Enable driver support for the ST L3GD20 gyroscope sensor.
+
+config SENSOR_KXTJ9
+	bool "Kionix KXTJ9 Accelerometer support"
+	default n
+	select I2C
+
+if SENSOR_KXTJ9
+
+config SENSOR_KXTJ9_I2C_BUS_SPEED
+	int "Kionix KXTJ9 Bus Speed in Hz"
+	default 400000
+
+endif # SENSOR_KXTJ9
+
+config LIS3DSH
+	bool "STMicro LIS3DSH 3-Axis acclerometer support"
+	default n
+	select SPI
+	---help---
+		Enable driver support for the STMicro LIS3DSH 3-Axis acclerometer.
+
 config LIS331DL
 	bool "ST LIS331DL device support"
 	default n
@@ -62,6 +96,13 @@ config MB7040_I2C_FREQUENCY
 	range 1 400000
 	depends on MB7040
 
+config MLX90393
+	bool "MLX90393 3-Axis Magnetometer"
+	default n
+	select SPI
+	---help---
+		Enable driver support for the Melex MLX90393 3-Axis magnetometer.
+
 config MCP9844
 	bool "MCP9844 Temperature Sensor"
 	default n
@@ -136,7 +177,7 @@ config ADXL345_ACTIVELOW
 config ADXL345_REGDEBUG
 	bool "Enable Register-Level ADXL345 Debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_FEATURES
 	---help---
 		Enable very low register-level debug output.
 
@@ -160,6 +201,13 @@ config I2C_LM75
 	bool
 	default y if LM75
 
+config LIS3MDL
+	bool "STMicro LIS3MDL 3-Axis magnetometer support"
+	default n
+	select SPI
+	---help---
+		Enable driver support for the ST LIS3MDL 3-axis magnetometer.
+
 config LM75
 	bool "STMicro LM-75 Temperature Sensor support"
 	default n
@@ -193,6 +241,20 @@ config QENCODER
 	bool "Qencoder"
 	default n
 
+config VEML6070
+	bool "Vishay VEML6070 UV-A Light Sensor support"
+	default n
+	select I2C
+	---help---
+		Enable driver support for the Vishay VEML6070 UV-A light sensor.
+
+config XEN1210
+	bool "Sensixs XEN1210 Magnetometer"
+	default n
+	select SPI
+	---help---
+		Enable driver support for the Sensixs XEN1210 Magnetometer.
+
 config ZEROCROSS
 	bool "Zero Cross Sensor"
 	default n
diff --git a/drivers/sensors/Make.defs b/drivers/sensors/Make.defs
index b2d5d52f43c6d68bd11e1264619c107f04f4b803..c4b14ace8f6d2aba7b2cd4805b64e043e8ac4a42 100644
--- a/drivers/sensors/Make.defs
+++ b/drivers/sensors/Make.defs
@@ -49,6 +49,14 @@ ifeq ($(CONFIG_AS5048B),y)
   CSRCS += as5048b.c
 endif
 
+ifeq ($(CONFIG_SENSOR_KXTJ9),y)
+  CSRCS += kxtj9.c
+endif
+
+ifeq ($(CONFIG_LIS3DSH),y)
+  CSRCS += lis3dsh.c
+endif
+
 ifeq ($(CONFIG_LIS331DL),y)
   CSRCS += lis331dl.c
 endif
@@ -65,6 +73,10 @@ ifeq ($(CONFIG_BH1750FVI),y)
   CSRCS += bh1750fvi.c
 endif
 
+ifeq ($(CONFIG_BMG160),y)
+  CSRCS += bmg160.c
+endif
+
 ifeq ($(CONFIG_BMP180),y)
   CSRCS += bmp180.c
 endif
@@ -85,6 +97,10 @@ ifeq ($(CONFIG_MCP9844),y)
   CSRCS += mcp9844.c
 endif
 
+ifeq ($(CONFIG_MLX90393),y)
+  CSRCS += mlx90393.c
+endif
+
 ifeq ($(CONFIG_MS58XX),y)
   CSRCS += ms58xx.c
 endif
@@ -109,6 +125,15 @@ endif
 ifeq ($(CONFIG_MPL115A),y)
   CSRCS += mpl115a.c
 endif
+
+ifeq ($(CONFIG_LIS3MDL),y)
+  CSRCS += lis3mdl.c
+endif
+
+ifeq ($(CONFIG_SENSORS_L3GD20),y)
+  CSRCS += l3gd20.c
+endif
+
 endif # CONFIG_SPI
 
 # Quadrature encoder upper half
@@ -117,6 +142,18 @@ ifeq ($(CONFIG_QENCODER),y)
   CSRCS += qencoder.c
 endif
 
+# Vishay VEML6070
+
+ifeq ($(CONFIG_VEML6070),y)
+  CSRCS += veml6070.c
+endif
+
+# Sensixs XEN1210
+
+ifeq ($(CONFIG_XEN1210),y)
+  CSRCS += xen1210.c
+endif
+
 # Zero Cross upper half
 
 ifeq ($(CONFIG_ZEROCROSS),y)
diff --git a/drivers/sensors/adxl345_base.c b/drivers/sensors/adxl345_base.c
index 4cf667807d82d57a0a3d4b87b4b9f897a2327f3b..8a92d059eb6b7948fffa79d615a2894ce4cdd5ed 100644
--- a/drivers/sensors/adxl345_base.c
+++ b/drivers/sensors/adxl345_base.c
@@ -125,7 +125,7 @@ static ssize_t adxl345_read(FAR struct file *filep, FAR char *buffer, size_t len
   struct adxl345_sample_s   sample;
   int                       ret;
 
-  snvdbg("len=%d\n", len);
+  sninfo("len=%d\n", len);
   DEBUGASSERT(filep);
   inode = filep->f_inode;
 
@@ -196,7 +196,7 @@ int adxl345_register(ADXL345_HANDLE handle, int minor)
   char devname[DEV_NAMELEN];
   int ret;
 
-  snvdbg("handle=%p minor=%d\n", handle, minor);
+  sninfo("handle=%p minor=%d\n", handle, minor);
   DEBUGASSERT(priv);
 
   /* Get exclusive access to the device structure */
@@ -205,7 +205,7 @@ int adxl345_register(ADXL345_HANDLE handle, int minor)
   if (ret < 0)
     {
       int errval = errno;
-      sndbg("ERROR: sem_wait failed: %d\n", errval);
+      snerr("ERROR: sem_wait failed: %d\n", errval);
       return -errval;
     }
 
@@ -221,7 +221,7 @@ int adxl345_register(ADXL345_HANDLE handle, int minor)
   ret = register_driver(devname, &g_adxl345fops, 0666, priv);
   if (ret < 0)
     {
-      sndbg("ERROR: Failed to register driver %s: %d\n", devname, ret);
+      snerr("ERROR: Failed to register driver %s: %d\n", devname, ret);
       sem_post(&priv->exclsem);
       return ret;
     }
@@ -305,7 +305,7 @@ static void adxl345_interrupt(FAR struct adxl345_config_s *config, FAR void *arg
       ret = work_queue(HPWORK, &priv->work, adxl345_worker, priv, 0);
       if (ret != 0)
         {
-          snlldbg("Failed to queue work: %d\n", ret);
+          snerr("ERROR: Failed to queue work: %d\n", ret);
         }
     }
 
@@ -329,7 +329,7 @@ static int adxl345_checkid(FAR struct adxl345_dev_s *priv)
   /* Read device ID  */
 
   devid = adxl345_getreg8(priv, ADXL345_DEVID);
-  snvdbg("devid: %04x\n", devid);
+  sninfo("devid: %04x\n", devid);
 
   if (devid != (uint16_t) DEVID)
     {
@@ -397,7 +397,7 @@ ADXL345_HANDLE adxl345_instantiate(FAR struct i2c_master_s *dev,
   priv = (FAR struct adxl345_dev_s *)kmm_zalloc(sizeof(struct adxl345_dev_s));
   if (!priv)
     {
-      sndbg("Failed to allocate the device structure!\n");
+      snerr("ERROR: Failed to allocate the device structure!\n");
       return NULL;
     }
 
@@ -418,7 +418,7 @@ ADXL345_HANDLE adxl345_instantiate(FAR struct i2c_master_s *dev,
   ret = adxl345_checkid(priv);
   if (ret < 0)
     {
-      sndbg("Wrong Device ID!\n");
+      snerr("ERROR: Wrong Device ID!\n");
       kmm_free(priv);
       return NULL;
     }
diff --git a/drivers/sensors/adxl345_i2c.c b/drivers/sensors/adxl345_i2c.c
index a2dfd819610cbfc1e063ae0e271a3bbe9e4a1b13..96731bbe8a01fcd9503ef7694474841198d367d8 100644
--- a/drivers/sensors/adxl345_i2c.c
+++ b/drivers/sensors/adxl345_i2c.c
@@ -97,12 +97,12 @@ uint8_t adxl345_getreg8(FAR struct adxl345_dev_s *priv, uint8_t regaddr)
   ret = I2C_TRANSFER(priv->i2c, msg, 2);
   if (ret < 0)
     {
-      sndbg("I2C_TRANSFER failed: %d\n", ret);
+      snerr("ERROR: I2C_TRANSFER failed: %d\n", ret);
       return 0;
     }
 
 #ifdef CONFIG_ADXL345_REGDEBUG
-  dbg("%02x->%02x\n", regaddr, regval);
+  _err("%02x->%02x\n", regaddr, regval);
 #endif
   return regval;
 }
@@ -130,7 +130,7 @@ void adxl345_putreg8(FAR struct adxl345_dev_s *priv,
   int ret;
 
 #ifdef CONFIG_ADXL345_REGDEBUG
-  dbg("%02x<-%02x\n", regaddr, regval);
+  _err("%02x<-%02x\n", regaddr, regval);
 #endif
 
   /* Setup to the data to be transferred.  Two bytes:  The ADXL345 register
@@ -154,7 +154,7 @@ void adxl345_putreg8(FAR struct adxl345_dev_s *priv,
   ret = I2C_TRANSFER(priv->i2c, &msg, 1);
   if (ret < 0)
     {
-      sndbg("I2C_TRANSFER failed: %d\n", ret);
+      snerr("ERROR: I2C_TRANSFER failed: %d\n", ret);
     }
 }
 #endif
@@ -204,12 +204,12 @@ uint16_t adxl345_getreg16(FAR struct adxl345_dev_s *priv, uint8_t regaddr)
   ret = I2C_TRANSFER(priv->i2c, msg, 2);
   if (ret < 0)
     {
-      sndbg("I2C_TRANSFER failed: %d\n", ret);
+      snerr("ERROR: I2C_TRANSFER failed: %d\n", ret);
       return 0;
     }
 
 #ifdef CONFIG_ADXL345_REGDEBUG
-  dbg("%02x->%02x%02x\n", regaddr, rxbuffer[0], rxbuffer[1]);
+  _err("%02x->%02x%02x\n", regaddr, rxbuffer[0], rxbuffer[1]);
 #endif
   return (uint16_t)rxbuffer[0] << 8 | (uint16_t)rxbuffer[1];
 }
diff --git a/drivers/sensors/adxl345_spi.c b/drivers/sensors/adxl345_spi.c
index 1e837132af17807c44448dc1e9ea983f261bd196..a2d524bf50ff611b5f4e2ee994843ddfc67a0a58 100644
--- a/drivers/sensors/adxl345_spi.c
+++ b/drivers/sensors/adxl345_spi.c
@@ -113,7 +113,7 @@ uint8_t adxl345_getreg8(FAR struct adxl345_dev_s *priv, uint8_t regaddr)
   (void)SPI_LOCK(priv->spi, false);
 
 #ifdef CONFIG_ADXL345_REGDEBUG
-  dbg("%02x->%02x\n", regaddr, regval);
+  _err("%02x->%02x\n", regaddr, regval);
 #endif
   return regval;
 }
@@ -130,7 +130,7 @@ void adxl345_putreg8(FAR struct adxl345_dev_s *priv, uint8_t regaddr,
                      uint8_t regval)
 {
 #ifdef CONFIG_ADXL345_REGDEBUG
-  dbg("%02x<-%02x\n", regaddr, regval);
+  _err("%02x<-%02x\n", regaddr, regval);
 #endif
 
   /* If SPI bus is shared then lock and configure it */
@@ -191,7 +191,7 @@ uint16_t adxl345_getreg16(FAR struct adxl345_dev_s *priv, uint8_t regaddr)
   (void)SPI_LOCK(priv->spi, false);
 
 #ifdef CONFIG_ADXL345_REGDEBUG
-  dbg("%02x->%04x\n", regaddr, regval);
+  _err("%02x->%04x\n", regaddr, regval);
 #endif
 
   return regval;
diff --git a/drivers/sensors/as5048b.c b/drivers/sensors/as5048b.c
index 96b3d4d19fdcb73362846256d2b2a70e62b6d993..1de47ea323025aa04c4e28632b6c6fd5e926fa35 100644
--- a/drivers/sensors/as5048b.c
+++ b/drivers/sensors/as5048b.c
@@ -63,6 +63,7 @@ struct as5048b_dev_s
   struct qe_lowerhalf_s    lower; /* AS5048B quadrature encoder lower half */
   FAR struct i2c_master_s *i2c;   /* I2C interface */
   uint8_t                  addr;  /* I2C address */
+  uint32_t frequency;             /* I2C frequency */
 };
 
 /****************************************************************************
@@ -139,7 +140,7 @@ static int as5048b_readu8(FAR struct as5048b_dev_s *priv, uint8_t regaddr,
   ret = i2c_write(priv->i2c, &config, ®addr, sizeof(regaddr));
   if (ret < 0)
     {
-      sndbg("i2c_write failed: %d\n", ret);
+      snerr("ERROR: i2c_write failed: %d\n", ret);
       return ret;
     }
 
@@ -148,11 +149,11 @@ static int as5048b_readu8(FAR struct as5048b_dev_s *priv, uint8_t regaddr,
   ret = i2c_read(priv->i2c, &config, regval, sizeof(*regval));
   if (ret < 0)
     {
-      sndbg("i2c_read failed: %d\n", ret);
+      snerr("ERROR: i2c_read failed: %d\n", ret);
       return ret;
     }
 
-  sndbg("addr: %02x value: %02x ret: %d\n", regaddr, *regval, ret);
+  sninfo("addr: %02x value: %02x ret: %d\n", regaddr, *regval, ret);
   return ret;
 }
 
@@ -175,7 +176,7 @@ static int as5048b_readu16(FAR struct as5048b_dev_s *priv, uint8_t regaddrhi,
   ret = as5048b_readu8(priv, regaddrhi, &hi);
   if (ret < 0)
     {
-      sndbg("as5048b_readu8 failed: %d\n", ret);
+      snerr("ERROR: as5048b_readu8 failed: %d\n", ret);
       return ret;
     }
 
@@ -184,13 +185,13 @@ static int as5048b_readu16(FAR struct as5048b_dev_s *priv, uint8_t regaddrhi,
   ret = as5048b_readu8(priv, regaddrlo, &lo);
   if (ret < 0)
     {
-      sndbg("as5048b_readu8 failed: %d\n", ret);
+      snerr("ERROR: as5048b_readu8 failed: %d\n", ret);
       return ret;
     }
 
   *regval = (uint16_t)hi << 6 | (uint16_t)lo;
-  sndbg("addrhi: %02x addrlo: %02x value: %04x ret: %d\n",
-        regaddrhi, regaddrlo, *regval, ret);
+  sninfo("addrhi: %02x addrlo: %02x value: %04x ret: %d\n",
+         regaddrhi, regaddrlo, *regval, ret);
   return ret;
 }
 
@@ -209,7 +210,7 @@ static int as5048b_writeu8(FAR struct as5048b_dev_s *priv, uint8_t regaddr,
   uint8_t buffer[2];
   int ret;
 
-  sndbg("addr: %02x value: %02x\n", regaddr, regval);
+  sninfo("addr: %02x value: %02x\n", regaddr, regval);
 
   /* Set up the I2C configuration */
 
@@ -227,7 +228,7 @@ static int as5048b_writeu8(FAR struct as5048b_dev_s *priv, uint8_t regaddr,
   ret = i2c_write(priv->i2c, &config, buffer, sizeof(buffer));
   if (ret < 0)
     {
-      sndbg("i2c_write failed: %d\n", ret);
+      snerr("ERROR: i2c_write failed: %d\n", ret);
     }
 
   return ret;
@@ -246,7 +247,7 @@ static int as5048b_writeu16(FAR struct as5048b_dev_s *priv, uint8_t regaddrhi,
 {
   int ret;
 
-  sndbg("addrhi: %02x addrlo: %02x value: %04x\n",
+  sninfo("addrhi: %02x addrlo: %02x value: %04x\n",
         regaddrhi, regaddrlo, regval);
 
   /* Write the high 8 bits of the 13-bit value */
@@ -254,7 +255,7 @@ static int as5048b_writeu16(FAR struct as5048b_dev_s *priv, uint8_t regaddrhi,
   ret = as5048b_writeu8(priv, regaddrhi, (uint8_t)(regval >> 6));
   if (ret < 0)
     {
-      sndbg("as5048b_writeu8 failed: %d\n", ret);
+      snerr("ERROR: as5048b_writeu8 failed: %d\n", ret);
       return ret;
     }
 
@@ -263,7 +264,7 @@ static int as5048b_writeu16(FAR struct as5048b_dev_s *priv, uint8_t regaddrhi,
   ret = as5048b_writeu8(priv, regaddrhi, (uint8_t)regval);
   if (ret < 0)
     {
-      sndbg("as5048b_writeu8 failed: %d\n", ret);
+      snerr("ERROR: as5048b_writeu8 failed: %d\n", ret);
     }
 
   return ret;
@@ -285,11 +286,11 @@ static int as5048b_readzero(FAR struct as5048b_dev_s *priv,
   ret = as5048b_readu16(priv, AS5048B_ZEROHI_REG, AS5048B_ZEROLO_REG, zero);
   if (ret < 0)
     {
-      sndbg("as5048b_readu16 failed: %d\n", ret);
+      snerr("ERROR: as5048b_readu16 failed: %d\n", ret);
       return ret;
     }
 
-  sndbg("zero: %04x ret: %d\n", *zero, ret);
+  sninfo("zero: %04x ret: %d\n", *zero, ret);
   return ret;
 }
 
@@ -305,12 +306,12 @@ static int as5048b_writezero(FAR struct as5048b_dev_s *priv, uint16_t zero)
 {
   int ret;
 
-  sndbg("zero: %04x\n", zero);
+  sninfo("zero: %04x\n", zero);
 
   ret = as5048b_writeu16(priv, AS5048B_ZEROHI_REG, AS5048B_ZEROLO_REG, zero);
   if (ret < 0)
     {
-      sndbg("as5048b_writeu16 failed: %d\n", ret);
+      snerr("ERROR: as5048b_writeu16 failed: %d\n", ret);
     }
 
   return ret;
@@ -331,11 +332,11 @@ static int as5048b_readagc(FAR struct as5048b_dev_s *priv, FAR uint8_t *agc)
   ret = as5048b_readu8(priv, AS5048B_AGC_REG, agc);
   if (ret < 0)
     {
-      sndbg("as5048b_readu8 failed: %d\n", ret);
+      snerr("ERROR: as5048b_readu8 failed: %d\n", ret);
       return ret;
     }
 
-  sndbg("agc: %02x ret: %d\n", *agc, ret);
+  sninfo("agc: %02x ret: %d\n", *agc, ret);
   return ret;
 }
 
@@ -354,11 +355,11 @@ static int as5048b_readdiag(FAR struct as5048b_dev_s *priv, FAR uint8_t *diag)
   ret = as5048b_readu8(priv, AS5048B_DIAG_REG, diag);
   if (ret < 0)
     {
-      sndbg("as5048b_readu8 failed: %d\n", ret);
+      snerr("ERROR: as5048b_readu8 failed: %d\n", ret);
       return ret;
     }
 
-  sndbg("diag: %02x ret: %d\n", *diag, ret);
+  sninfo("diag: %02x ret: %d\n", *diag, ret);
   return ret;
 }
 
@@ -377,11 +378,11 @@ static int as5048b_readmag(FAR struct as5048b_dev_s *priv, FAR uint16_t *mag)
   ret = as5048b_readu16(priv, AS5048B_MAGHI_REG, AS5048B_MAGLO_REG, mag);
   if (ret < 0)
     {
-      sndbg("as5048b_readu16 failed: %d\n", ret);
+      snerr("ERROR: as5048b_readu16 failed: %d\n", ret);
       return ret;
     }
 
-  sndbg("mag: %04x ret: %d\n", *mag, ret);
+  sninfo("mag: %04x ret: %d\n", *mag, ret);
   return ret;
 }
 
@@ -400,11 +401,11 @@ static int as5048b_readang(FAR struct as5048b_dev_s *priv, FAR uint16_t *ang)
   ret = as5048b_readu16(priv, AS5048B_ANGHI_REG, AS5048B_ANGLO_REG, ang);
   if (ret < 0)
     {
-      sndbg("as5048b_readu16 failed: %d\n", ret);
+      snerr("ERROR: as5048b_readu16 failed: %d\n", ret);
       return ret;
     }
 
-  sndbg("ang: %04x ret: %d\n", *ang, ret);
+  sninfo("ang: %04x ret: %d\n", *ang, ret);
   return ret;
 }
 
@@ -452,7 +453,7 @@ static int as5048b_position(FAR struct qe_lowerhalf_s *lower,
   ret = as5048b_readang(priv, &ang);
   if (ret < 0)
     {
-      sndbg("as5048b_readang failed: %d\n", ret);
+      snerr("ERROR: as5048b_readang failed: %d\n", ret);
       return ret;
     }
 
@@ -477,21 +478,21 @@ static int as5048b_reset(FAR struct qe_lowerhalf_s *lower)
   ret = as5048b_writezero(priv, 0);
   if (ret < 0)
     {
-      sndbg("as5048b_writezero failed: %d\n", ret);
+      snerr("ERROR: as5048b_writezero failed: %d\n", ret);
       return ret;
     }
 
   ret = as5048b_readang(priv, &ang);
   if (ret < 0)
     {
-      sndbg("as5048b_readang failed: %d\n", ret);
+      snerr("ERROR: as5048b_readang failed: %d\n", ret);
       return ret;
     }
 
   ret = as5048b_writezero(priv, ang);
   if (ret < 0)
     {
-      sndbg("as5048b_writezero failed: %d\n", ret);
+      snerr("ERROR: as5048b_writezero failed: %d\n", ret);
     }
 
   return ret;
@@ -521,7 +522,8 @@ static int as5048b_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd,
             {
               *ptr = (int32_t)zero;
             }
-          sndbg("zero: %04x ret: %d\n", *ptr, ret);
+
+          sninfo("zero: %04x ret: %d\n", *ptr, ret);
         }
         break;
 
@@ -532,7 +534,7 @@ static int as5048b_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd,
           FAR uint8_t *ptr = (FAR uint8_t *)((uintptr_t)arg);
           DEBUGASSERT(ptr != NULL);
           ret = as5048b_readagc(priv, ptr);
-          sndbg("agc: %02x ret: %d\n", *ptr, ret);
+          sninfo("agc: %02x ret: %d\n", *ptr, ret);
         }
         break;
 
@@ -543,7 +545,7 @@ static int as5048b_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd,
           FAR uint8_t *ptr = (FAR uint8_t *)((uintptr_t)arg);
           DEBUGASSERT(ptr != NULL);
           ret = as5048b_readdiag(priv, ptr);
-          sndbg("diag: %02x ret: %d\n", *ptr, ret);
+          sninfo("diag: %02x ret: %d\n", *ptr, ret);
         }
         break;
 
@@ -559,12 +561,13 @@ static int as5048b_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd,
             {
               *ptr = (int32_t)mag;
             }
-          sndbg("mag: %04x ret: %d\n", *ptr, ret);
+
+          sninfo("mag: %04x ret: %d\n", *ptr, ret);
         }
         break;
 
       default:
-        sndbg("Unrecognized cmd: %d arg: %ld\n", cmd, arg);
+        snerr("ERROR: Unrecognized cmd: %d arg: %ld\n", cmd, arg);
         ret = -ENOTTY;
         break;
     }
@@ -593,7 +596,7 @@ static int as5048b_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd,
  ****************************************************************************/
 
 FAR struct qe_lowerhalf_s *as5048b_initialize(FAR struct i2c_master_s *i2c,
-                                              uint8_t addr)
+                                              uint8_t addr, uint32_t frequency)
 {
   FAR struct as5048b_dev_s *priv;
 
@@ -604,13 +607,14 @@ FAR struct qe_lowerhalf_s *as5048b_initialize(FAR struct i2c_master_s *i2c,
   priv = (FAR struct as5048b_dev_s *)kmm_malloc(sizeof(*priv));
   if (priv == NULL)
     {
-      sndbg("Failed to allocate instance\n");
+      snerr("ERROR: Failed to allocate instance\n");
       return NULL;
     }
 
   priv->lower.ops = &g_qeops;
   priv->i2c       = i2c;
   priv->addr      = addr;
+  priv->frequency = frequency;
 
   return &priv->lower;
 }
diff --git a/drivers/sensors/bh1750fvi.c b/drivers/sensors/bh1750fvi.c
index 9823e12997b0f6cfdb03f685b65f7f5291edd7ee..88ba994a3874ce329c8e25f63528b241b437a33a 100644
--- a/drivers/sensors/bh1750fvi.c
+++ b/drivers/sensors/bh1750fvi.c
@@ -144,7 +144,7 @@ static int bh1750fvi_read16(FAR struct bh1750fvi_dev_s *priv,
   ret = i2c_read(priv->i2c, &config, buffer, 2);
   if (ret < 0)
     {
-      sndbg ("i2c_read failed: %d\n", ret);
+      snerr ("i2c_read failed: %d\n", ret);
       return ret;
     }
 
@@ -152,7 +152,7 @@ static int bh1750fvi_read16(FAR struct bh1750fvi_dev_s *priv,
 
   *regval = (uint16_t)((buffer[0]<<8) | (buffer[1]));
 
-  sndbg("value: %08x ret: %d\n", *regval, ret);
+  sninfo("value: %08x ret: %d\n", *regval, ret);
   return OK;
 }
 
@@ -169,7 +169,7 @@ static int bh1750fvi_write8(FAR struct bh1750fvi_dev_s *priv, uint8_t regval)
   struct i2c_config_s config;
   int ret;
 
-  sndbg("value: %02x\n", regval);
+  sninfo("value: %02x\n", regval);
 
   /* Set up the I2C configuration */
 
@@ -182,7 +182,7 @@ static int bh1750fvi_write8(FAR struct bh1750fvi_dev_s *priv, uint8_t regval)
   ret = i2c_write(priv->i2c, &config, ®val, 1);
   if (ret < 0)
     {
-      sndbg("i2c_write failed: %d\n", ret);
+      snerr("ERROR: i2c_write failed: %d\n", ret);
     }
 
   return ret;
@@ -236,14 +236,14 @@ static ssize_t bh1750fvi_read(FAR struct file *filep, FAR char *buffer,
 
   if (buflen != 2)
     {
-      sndbg("You need to read 2 bytes from this sensor!\n");
+      snerr("ERROR: You need to read 2 bytes from this sensor!\n");
       return -EINVAL;
     }
 
   ret = bh1750fvi_read16(priv, &lux);
   if (ret < 0)
     {
-      sndbg("Error reading light sensor!\n");
+      snerr("ERROR: Error reading light sensor!\n");
       return ret;
     }
 
@@ -283,7 +283,7 @@ static int bh1750fvi_ioctl(FAR struct file *filep, int cmd,
           ret = bh1750fvi_write8(priv, BH1750FVI_CONTINUOUS_HRM);
           if (ret < 0)
             {
-              sndbg("Cannot change to Continuously H-Resolution Mode!\n");
+              snerr("ERROR: Cannot change to Continuously H-Resolution Mode!\n");
             }
         }
         break;
@@ -295,7 +295,7 @@ static int bh1750fvi_ioctl(FAR struct file *filep, int cmd,
           ret = bh1750fvi_write8(priv, BH1750FVI_CONTINUOUS_HRM2);
           if (ret < 0)
             {
-              sndbg("Cannot change to Continuously H-Resolution Mode2!\n");
+              snerr("ERROR: Cannot change to Continuously H-Resolution Mode2!\n");
             }
         }
         break;
@@ -307,7 +307,7 @@ static int bh1750fvi_ioctl(FAR struct file *filep, int cmd,
           ret = bh1750fvi_write8(priv, BH1750FVI_CONTINUOUS_LRM);
           if (ret < 0)
             {
-              sndbg("Cannot change to Continuously L-Resolution Mode!\n");
+              snerr("ERROR: Cannot change to Continuously L-Resolution Mode!\n");
             }
         }
         break;
@@ -319,7 +319,7 @@ static int bh1750fvi_ioctl(FAR struct file *filep, int cmd,
           ret = bh1750fvi_write8(priv, BH1750FVI_ONETIME_HRM);
           if (ret < 0)
             {
-              sndbg("Cannot change to One Time H-Resolution Mode!\n");
+              snerr("ERROR: Cannot change to One Time H-Resolution Mode!\n");
             }
         }
         break;
@@ -331,7 +331,7 @@ static int bh1750fvi_ioctl(FAR struct file *filep, int cmd,
           ret = bh1750fvi_write8(priv, BH1750FVI_ONETIME_HRM2);
           if (ret < 0)
             {
-              sndbg("Cannot change to One Time H-Resolution Mode2!\n");
+              snerr("ERROR: Cannot change to One Time H-Resolution Mode2!\n");
             }
         }
         break;
@@ -343,7 +343,7 @@ static int bh1750fvi_ioctl(FAR struct file *filep, int cmd,
           ret = bh1750fvi_write8(priv, BH1750FVI_ONETIME_LRM);
           if (ret < 0)
             {
-              sndbg("Cannot change to One Time L-Resolution Mode!\n");
+              snerr("ERROR: Cannot change to One Time L-Resolution Mode!\n");
             }
         }
         break;
@@ -361,7 +361,7 @@ static int bh1750fvi_ioctl(FAR struct file *filep, int cmd,
           ret = bh1750fvi_write8(priv, reg);
           if (ret < 0)
             {
-              sndbg("Cannot Change Measure Time at MEASURE_TIMEH!\n");
+              snerr("ERROR: Cannot Change Measure Time at MEASURE_TIMEH!\n");
             }
 
           reg = BH1750FVI_MEASURE_TIMEL | (*ptr & 0x1F);
@@ -369,13 +369,13 @@ static int bh1750fvi_ioctl(FAR struct file *filep, int cmd,
           ret = bh1750fvi_write8(priv, reg);
           if (ret < 0)
             {
-              sndbg("Cannot Change Measure Time at MEASURE_TIMEL!\n");
+              snerr("ERROR: Cannot Change Measure Time at MEASURE_TIMEL!\n");
             }
         }
         break;
 
       default:
-        sndbg("Unrecognized cmd: %d\n", cmd);
+        snerr("ERROR: Unrecognized cmd: %d\n", cmd);
         ret = -ENOTTY;
         break;
     }
@@ -419,7 +419,7 @@ int bh1750fvi_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
 
   if (priv == NULL)
     {
-      sndbg("Failed to allocate instance\n");
+      snerr("ERROR: Failed to allocate instance\n");
       return -ENOMEM;
     }
 
@@ -431,7 +431,7 @@ int bh1750fvi_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
   ret = bh1750fvi_write8(priv, BH1750FVI_POWERON);
   if (ret < 0)
     {
-      sndbg("Failed to power-on the BH1750FVI!\n");
+      snerr("ERROR: Failed to power-on the BH1750FVI!\n");
       return ret;
     }
 
@@ -440,7 +440,7 @@ int bh1750fvi_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
   ret = bh1750fvi_write8(priv, BH1750FVI_CONTINUOUS_HRM);
   if (ret < 0)
     {
-      sndbg("Failed to enable the Continuosly H-Resolution Mode!\n");
+      snerr("ERROR: Failed to enable the Continuosly H-Resolution Mode!\n");
       return ret;
     }
 
@@ -449,7 +449,7 @@ int bh1750fvi_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
   ret = register_driver(devpath, &g_bh1750fvi_fops, 0666, priv);
   if (ret < 0)
     {
-      sndbg("Failed to register driver: %d\n", ret);
+      snerr("ERROR: Failed to register driver: %d\n", ret);
       kmm_free(priv);
     }
 
diff --git a/drivers/sensors/bmg160.c b/drivers/sensors/bmg160.c
new file mode 100644
index 0000000000000000000000000000000000000000..03ad72a5d04d2bb39cf0b68ee64e9bf073525f63
--- /dev/null
+++ b/drivers/sensors/bmg160.c
@@ -0,0 +1,595 @@
+/****************************************************************************
+ * drivers/sensors/bmg160.c
+ * Character driver for the BMG160 3-Axis gyroscope.
+ *
+ *   Copyright (C) 2016 DS-Automotion GmbH. All rights reserved.
+ *   Author: Alexander Entinger 
+ *           Thomas Ilk
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#if defined(CONFIG_SPI) && defined(CONFIG_BMG160)
+
+/****************************************************************************
+ * Private
+ ****************************************************************************/
+
+struct bmg160_sensor_data_s
+{
+  int16_t x_gyr;              /* Measurement result for x axis */
+  int16_t y_gyr;              /* Measurement result for y axis */
+  int16_t z_gyr;              /* Measurement result for z axis */
+};
+
+struct bmg160_dev_s
+{
+  FAR struct bmg160_dev_s *flink;     /* Supports a singly linked list of
+                                       * drivers */
+  FAR struct spi_dev_s *spi;          /* Pointer to the SPI instance */
+  FAR struct bmg160_config_s *config; /* Pointer to the configuration of the
+                                       * BMG160 sensor */
+  sem_t datasem;                      /* Manages exclusive access to this
+                                       * structure */
+  struct bmg160_sensor_data_s data;   /* The data as measured by the sensor */
+  struct work_s work;                 /* The work queue is responsible for
+                                       * retrieving the data from the sensor
+                                       * after the arrival of new data was
+                                       * signalled in an interrupt */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static void bmg160_read_register(FAR struct bmg160_dev_s *dev,
+                                 uint8_t const reg_addr, uint8_t * reg_data);
+static void bmg160_write_register(FAR struct bmg160_dev_s *dev,
+                                  uint8_t const reg_addr,
+                                  uint8_t const reg_data);
+static void bmg160_reset(FAR struct bmg160_dev_s *dev);
+static void bmg160_read_measurement_data(FAR struct bmg160_dev_s *dev);
+static void bmg160_read_gyroscope_data(FAR struct bmg160_dev_s *dev,
+                                       uint16_t * x_gyr, uint16_t * y_gyr,
+                                       uint16_t * z_gyr);
+static int bmg160_interrupt_handler(int irq, FAR void *context);
+static void bmg160_worker(FAR void *arg);
+
+static int bmg160_open(FAR struct file *filep);
+static int bmg160_close(FAR struct file *filep);
+static ssize_t bmg160_read(FAR struct file *, FAR char *, size_t);
+static ssize_t bmg160_write(FAR struct file *filep, FAR const char *buffer,
+                            size_t buflen);
+static int bmg160_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct file_operations g_bmg160_fops =
+{
+  bmg160_open,
+  bmg160_close,
+  bmg160_read,
+  bmg160_write,
+  NULL,
+  bmg160_ioctl
+#ifndef CONFIG_DISABLE_POLL
+  , NULL
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  , NULL
+#endif
+};
+
+/* Single linked list to store instances of drivers */
+
+static struct bmg160_dev_s *g_bmg160_list = NULL;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: bmg160_read_register
+ ****************************************************************************/
+
+static void bmg160_read_register(FAR struct bmg160_dev_s *dev,
+                                 uint8_t const reg_addr, uint8_t * reg_data)
+{
+  /* Lock the SPI bus so that only one device can access it at the same time */
+
+  SPI_LOCK(dev->spi, true);
+
+  /* Set CS to low which selects the BMG160 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, true);
+
+  /* Transmit the register address from where we want to read - the MSB needs
+   * to be set to indicate the read indication.
+   */
+
+  SPI_SEND(dev->spi, reg_addr | 0x80);
+
+  /* Write an idle byte while receiving the required data */
+
+  *reg_data = (uint8_t) (SPI_SEND(dev->spi, 0));
+
+  /* Set CS to high which deselects the BMG160 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, false);
+
+  /* Unlock the SPI bus */
+
+  SPI_LOCK(dev->spi, false);
+}
+
+/****************************************************************************
+ * Name: bmg160_write_register
+ ****************************************************************************/
+
+static void bmg160_write_register(FAR struct bmg160_dev_s *dev,
+                                  uint8_t const reg_addr,
+                                  uint8_t const reg_data)
+{
+  /* Lock the SPI bus so that only one device can access it at the same time */
+
+  SPI_LOCK(dev->spi, true);
+
+  /* Set CS to low which selects the BMG160 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, true);
+
+  /* Transmit the register address from where we want to read */
+
+  SPI_SEND(dev->spi, reg_addr);
+
+  /* Transmit the content which should be written in the register */
+
+  SPI_SEND(dev->spi, reg_data);
+
+  /* Set CS to high which deselects the BMG160 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, false);
+
+  /* Unlock the SPI bus */
+
+  SPI_LOCK(dev->spi, false);
+}
+
+/****************************************************************************
+ * Name: bmg160_reset
+ ****************************************************************************/
+
+static void bmg160_reset(FAR struct bmg160_dev_s *dev)
+{
+  bmg160_write_register(dev, BMG160_BGW_SOFTRESET_REG, 0xB6);
+
+  up_mdelay(100);
+}
+
+/****************************************************************************
+ * Name: bmg160_read_measurement_data
+ ****************************************************************************/
+
+static void bmg160_read_measurement_data(FAR struct bmg160_dev_s *dev)
+{
+  int ret;
+
+  /* Read Gyroscope */
+
+  uint16_t x_gyr = 0, y_gyr = 0, z_gyr = 0;
+
+  bmg160_read_gyroscope_data(dev, &x_gyr, &y_gyr, &z_gyr);
+
+  /* Aquire the semaphore before the data is copied */
+
+  ret = sem_wait(&dev->datasem);
+  if (ret < 0)
+    {
+      snerr("ERROR: Could not aquire dev->datasem: %d\n", ret);
+      return;
+    }
+
+  /* Copy retrieve data to internal data structure */
+
+  dev->data.x_gyr = (int16_t) (x_gyr);
+  dev->data.y_gyr = (int16_t) (y_gyr);
+  dev->data.z_gyr = (int16_t) (z_gyr);
+
+  /* Give back the semaphore */
+
+  sem_post(&dev->datasem);
+}
+
+/****************************************************************************
+ * Name: bmg160_read_gyroscope_data
+ ****************************************************************************/
+
+static void bmg160_read_gyroscope_data(FAR struct bmg160_dev_s *dev,
+                                       uint16_t * x_gyr, uint16_t * y_gyr,
+                                       uint16_t * z_gyr)
+{
+  /* Lock the SPI bus so that only one device can access it at the same time */
+
+  SPI_LOCK(dev->spi, true);
+
+  /* Set CS to low which selects the BMG160 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, true);
+
+  /* Transmit the register address from where we want to start reading. 0x80
+   * -> MSB is set -> Read Indication.
+   */
+
+  SPI_SEND(dev->spi, (BMG160_RATE_X_LSB_REG | 0x80));
+
+  /* RX */
+
+  *x_gyr = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0);   /* LSB */
+  *x_gyr |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8);  /* MSB */
+
+  *y_gyr = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0);   /* LSB */
+  *y_gyr |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8);  /* MSB */
+
+  *z_gyr = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0);   /* LSB */
+  *z_gyr |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8);  /* MSB */
+
+  /* Set CS to high which deselects the BMG160 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, false);
+
+  /* Unlock the SPI bus */
+
+  SPI_LOCK(dev->spi, false);
+}
+
+/****************************************************************************
+ * Name: bmg160_interrupt_handler
+ ****************************************************************************/
+
+static int bmg160_interrupt_handler(int irq, FAR void *context)
+{
+  /* This function should be called upon a rising edge on the BMG160 new data
+   * interrupt pin since it signals that new data has been measured.
+   */
+
+  FAR struct bmg160_dev_s *priv = 0;
+  int ret;
+
+  /* Find out which BMG160 device caused the interrupt */
+
+  for (priv = g_bmg160_list; priv && priv->config->irq != irq;
+       priv = priv->flink);
+  DEBUGASSERT(priv != NULL);
+
+  /* Task the worker with retrieving the latest sensor data. We should not do
+   * this in a interrupt since it might take too long. Also we cannot lock the
+   * SPI bus from within an interrupt.
+   */
+
+  DEBUGASSERT(priv->work.worker == NULL);
+  ret = work_queue(HPWORK, &priv->work, bmg160_worker, priv, 0);
+  if (ret < 0)
+    {
+      snerr("ERROR: Failed to queue work: %d\n", ret);
+      return ret;
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: bmg160_worker
+ ****************************************************************************/
+
+static void bmg160_worker(FAR void *arg)
+{
+  FAR struct bmg160_dev_s *priv = (FAR struct bmg160_dev_s *)(arg);
+  DEBUGASSERT(priv != NULL);
+
+  /* Read out the latest sensor data */
+
+  bmg160_read_measurement_data(priv);
+}
+
+/****************************************************************************
+ * Name: bmg160_open
+ ****************************************************************************/
+
+static int bmg160_open(FAR struct file *filep)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct bmg160_dev_s *priv = inode->i_private;
+#ifdef CONFIG_DEBUG_SENSORS_INFO
+  uint8_t reg_content;
+#endif
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Perform a reset */
+
+  bmg160_reset(priv);
+
+  /* Configure the sensor for our needs */
+
+  /* Enable - the full scale range FS = +/- 250 °/s */
+
+  bmg160_write_register(priv,
+                        BMG160_RANGE_REG,
+                        BMG160_RANGE_REG_FIX_VAL_bm | BMG160_RANGE_REG_FSR_1_bm |
+                        BMG160_RANGE_REG_FSR_0_bm);
+
+  /* Enable - the fastest data output rate ODR = 2000 Hz -> BW = 230 Hz */
+
+  bmg160_write_register(priv, BMG160_BW_REG, BMG160_BW_REG_ODR_0_bm);
+
+  /* Enable - new data interrupt 1 */
+
+  bmg160_write_register(priv,
+                        BMG160_INT_EN_0_REG, BMG160_INT_EN_0_REG_DATA_EN_bm);
+
+  /* Enable - active high level interrupt 1 - push-pull interrupt */
+
+  bmg160_write_register(priv,
+                        BMG160_INT_EN_1_REG, BMG160_INT_EN_1_REG_INT1_LVL_bm);
+
+  /* Enable - map new data interrupt to INT1 */
+
+  bmg160_write_register(priv,
+                        BMG160_INT_MAP_1_REG,
+                        BMG160_INT_MAP_1_REG_INT1_DATA_bm);
+
+  /* Read measurement data to ensure DRDY is low */
+
+  bmg160_read_measurement_data(priv);
+
+#ifdef CONFIG_DEBUG_SENSORS_INFO
+  /* Read back the content of all control registers for debug purposes */
+
+  reg_content = 0;
+  bmg160_read_register(priv, BMG160_RANGE_REG, ®_content);
+  sninfo("BMG160_RANGE_REG = %04x\n", reg_content);
+
+  bmg160_read_register(priv, BMG160_BW_REG, ®_content);
+  sninfo("BMG160_BW_REG = %04x\n", reg_content);
+
+  bmg160_read_register(priv, BMG160_INT_EN_0_REG, ®_content);
+  sninfo("BMG160_INT_EN_0_REG = %04x\n", reg_content);
+
+  bmg160_read_register(priv, BMG160_INT_EN_1_REG, ®_content);
+  sninfo("BMG160_INT_EN_1_REG = %04x\n", reg_content);
+
+  bmg160_read_register(priv, BMG160_INT_MAP_1_REG, ®_content);
+  sninfo("BMG160_INT_MAP_1_REG = %04x\n", reg_content);
+#endif
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: bmg160_close
+ ****************************************************************************/
+
+static int bmg160_close(FAR struct file *filep)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct bmg160_dev_s *priv = inode->i_private;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Perform a reset */
+
+  bmg160_reset(priv);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: bmg160_read
+ ****************************************************************************/
+
+static ssize_t bmg160_read(FAR struct file *filep, FAR char *buffer,
+                           size_t buflen)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct bmg160_dev_s *priv = inode->i_private;
+  FAR struct bmg160_sensor_data_s *data;
+  int ret;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Check if enough memory was provided for the read call */
+
+  if (buflen < sizeof(FAR struct bmg160_sensor_data_s))
+    {
+      snerr("ERROR: Not enough memory for reading out a sensor data sample\n");
+      return -ENOSYS;
+    }
+
+  /* Aquire the semaphore before the data is copied */
+
+  ret = sem_wait(&priv->datasem);
+  if (ret < 0)
+    {
+      int errcode = errno;
+      snerr("ERROR: Could not aquire priv->datasem: %d\n", errcode);
+      return -errcode;
+    }
+
+  /* Copy the sensor data into the buffer */
+
+  data = (FAR struct bmg160_sensor_data_s *)buffer;
+  memset(data, 0, sizeof(FAR struct bmg160_sensor_data_s));
+
+  data->x_gyr = priv->data.x_gyr;
+  data->y_gyr = priv->data.y_gyr;
+  data->z_gyr = priv->data.z_gyr;
+
+  /* Give back the semaphore */
+
+  sem_post(&priv->datasem);
+
+  return sizeof(FAR struct bmg160_sensor_data_s);
+}
+
+/****************************************************************************
+ * Name: bmg160_write
+ ****************************************************************************/
+
+static ssize_t bmg160_write(FAR struct file *filep, FAR const char *buffer,
+                            size_t buflen)
+{
+  return -ENOSYS;
+}
+
+/****************************************************************************
+ * Name: bmg160_ioctl
+ ****************************************************************************/
+
+static int bmg160_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
+{
+  int ret = OK;
+
+  switch (cmd)
+    {
+      /* Command was not recognized */
+
+    default:
+      snerr("ERROR: Unrecognized cmd: %d\n", cmd);
+      ret = -ENOTTY;
+      break;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: bmg160_register
+ *
+ * Description:
+ *   Register the BMG160 character device as 'devpath'
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/gyr0"
+ *   spi     - An instance of the SPI interface to use to communicate with
+ *             BMG160
+ *   config  - configuration for the BMG160 driver. For details see
+ *             description above.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int bmg160_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
+                    FAR struct bmg160_config_s *config)
+{
+  FAR struct bmg160_dev_s *priv;
+  int ret;
+
+  /* Sanity check */
+
+  DEBUGASSERT(spi != NULL);
+  DEBUGASSERT(config != NULL);
+
+  /* Initialize the BMG160 device structure */
+
+  priv = (FAR struct bmg160_dev_s *)kmm_malloc(sizeof(struct bmg160_dev_s));
+  if (priv == NULL)
+    {
+      snerr("ERROR: Failed to allocate instance\n");
+      return -ENOMEM;
+    }
+
+  priv->spi         = spi;
+  priv->config      = config;
+  priv->work.worker = NULL;
+
+  /* Initialize sensor data access semaphore */
+
+  sem_init(&priv->datasem, 0, 1);
+
+  /* Setup SPI frequency and mode */
+
+  SPI_SETFREQUENCY(spi, BMG160_SPI_FREQUENCY);
+  SPI_SETMODE(spi, BMG160_SPI_MODE);
+
+  /* Attach the interrupt handler */
+
+  ret = priv->config->attach(priv->config, &bmg160_interrupt_handler);
+  if (ret < 0)
+    {
+      snerr("ERROR: Failed to attach interrupt\n");
+      return ret;
+    }
+
+  /* Register the character driver */
+
+  ret = register_driver(devpath, &g_bmg160_fops, 0666, priv);
+  if (ret < 0)
+    {
+      snerr("ERROR: Failed to register driver: %d\n", ret);
+      kmm_free(priv);
+      sem_destroy(&priv->datasem);
+      return ret;
+    }
+
+  /* Since we support multiple BMG160 devices, we will need to add this new
+   * instance to a list of device instances so that it can be found by the
+   * interrupt handler based on the received IRQ number. */
+
+  priv->flink = g_bmg160_list;
+  g_bmg160_list = priv;
+
+  return OK;
+}
+
+#endif /* CONFIG_SPI && CONFIG_BMG160 */
diff --git a/drivers/sensors/bmp180.c b/drivers/sensors/bmp180.c
index 2124066fe95bf73d61180caa80e4480fd0796ddc..1a7d538c3343c483a0e149403a405e2ca6a4df44 100644
--- a/drivers/sensors/bmp180.c
+++ b/drivers/sensors/bmp180.c
@@ -198,7 +198,7 @@ static uint8_t bmp180_getreg8(FAR struct bmp180_dev_s *priv, uint8_t regaddr)
   ret = i2c_write(priv->i2c, &config, ®addr, 1);
   if (ret < 0)
     {
-      sndbg("i2c_write failed: %d\n", ret);
+      snerr("ERROR: i2c_write failed: %d\n", ret);
       return ret;
     }
 
@@ -207,7 +207,7 @@ static uint8_t bmp180_getreg8(FAR struct bmp180_dev_s *priv, uint8_t regaddr)
   ret = i2c_read(priv->i2c, &config, ®val, 1);
   if (ret < 0)
     {
-      sndbg("i2c_read failed: %d\n", ret);
+      snerr("ERROR: i2c_read failed: %d\n", ret);
       return ret;
     }
 
@@ -240,7 +240,7 @@ static uint16_t bmp180_getreg16(FAR struct bmp180_dev_s *priv, uint8_t regaddr)
   ret = i2c_write(priv->i2c, &config, ®addr, 1);
   if (ret < 0)
     {
-      sndbg("i2c_write failed: %d\n", ret);
+      snerr("ERROR: i2c_write failed: %d\n", ret);
       return ret;
     }
 
@@ -249,7 +249,7 @@ static uint16_t bmp180_getreg16(FAR struct bmp180_dev_s *priv, uint8_t regaddr)
   ret = i2c_read(priv->i2c, &config, (uint8_t *)®val, 2);
   if (ret < 0)
     {
-      sndbg("i2c_read failed: %d\n", ret);
+      snerr("ERROR: i2c_read failed: %d\n", ret);
       return ret;
     }
 
@@ -292,7 +292,7 @@ static void bmp180_putreg8(FAR struct bmp180_dev_s *priv, uint8_t regaddr,
   ret = i2c_write(priv->i2c, &config, (uint8_t *) &data, 2);
   if (ret < 0)
     {
-      sndbg("i2c_write failed: %d\n", ret);
+      snerr("ERROR: i2c_write failed: %d\n", ret);
       return;
     }
 
@@ -314,13 +314,13 @@ static int bmp180_checkid(FAR struct bmp180_dev_s *priv)
   /* Read device ID */
 
   devid = bmp180_getreg8(priv, BMP180_DEVID);
-  snvdbg("devid: 0x%02x\n", devid);
+  sninfo("devid: 0x%02x\n", devid);
 
   if (devid != (uint16_t) DEVID)
     {
       /* ID is not Correct */
 
-      sndbg("Wrong Device ID!\n");
+      snerr("ERROR: Wrong Device ID!\n");
       return -ENODEV;
     }
 
@@ -421,8 +421,8 @@ static void bmp180_read_press_temp(FAR struct bmp180_dev_s *priv)
   priv->bmp180_upress |= bmp180_getreg8(priv, BMP180_ADC_OUT_XLSB);
   priv->bmp180_upress = priv->bmp180_upress >> (8 - (oss >> 6));
 
-  snvdbg("Uncompensated temperature = %d\n", priv->bmp180_utemp);
-  snvdbg("Uncompensated pressure = %d\n", priv->bmp180_upress);
+  sninfo("Uncompensated temperature = %d\n", priv->bmp180_utemp);
+  sninfo("Uncompensated pressure = %d\n", priv->bmp180_upress);
 }
 
 /****************************************************************************
@@ -470,7 +470,7 @@ static int bmp180_getpressure(FAR struct bmp180_dev_s *priv)
   x2 = (priv->bmp180_cal_mc << 11) / (x1 + priv->bmp180_cal_md);
   b5 = x1 + x2;
   temp = (b5 + 8) >> 4;
-  snvdbg("Compensated temperature = %d\n", temp);
+  sninfo("Compensated temperature = %d\n", temp);
 
   /* Calculate true pressure */
 
@@ -500,7 +500,7 @@ static int bmp180_getpressure(FAR struct bmp180_dev_s *priv)
 
   press = press + ((x1 + x2 + 3791) >> 4);
 
-  snvdbg("Compressed pressure = %d\n", press);
+  sninfo("Compressed pressure = %d\n", press);
   return press;
 }
 
@@ -543,13 +543,13 @@ static ssize_t bmp180_read(FAR struct file *filep, FAR char *buffer,
 
   if (!buffer)
     {
-      sndbg("Buffer is null\n");
+      snerr("ERROR: Buffer is null\n");
       return -1;
     }
 
   if (buflen != 4)
     {
-      sndbg("You can't read something other than 32 bits (4 bytes)\n");
+      snerr("ERROR: You can't read something other than 32 bits (4 bytes)\n");
       return -1;
     }
 
@@ -602,7 +602,7 @@ int bmp180_register(FAR const char *devpath, FAR struct i2c_master_s *i2c)
   priv = (FAR struct bmp180_dev_s *)kmm_malloc(sizeof(struct bmp180_dev_s));
   if (!priv)
     {
-      sndbg("Failed to allocate instance\n");
+      snerr("ERROR: Failed to allocate instance\n");
       return -ENOMEM;
     }
 
@@ -615,7 +615,7 @@ int bmp180_register(FAR const char *devpath, FAR struct i2c_master_s *i2c)
   ret = bmp180_checkid(priv);
   if (ret < 0)
     {
-      sndbg("Failed to register driver: %d\n", ret);
+      snerr("ERROR: Failed to register driver: %d\n", ret);
       kmm_free(priv);
       return ret;
     }
@@ -629,11 +629,11 @@ int bmp180_register(FAR const char *devpath, FAR struct i2c_master_s *i2c)
   ret = register_driver(devpath, &g_bmp180fops, 0666, priv);
   if (ret < 0)
     {
-      sndbg("Failed to register driver: %d\n", ret);
+      snerr("ERROR: Failed to register driver: %d\n", ret);
       kmm_free(priv);
     }
 
-  snvdbg("BMP180 driver loaded successfully!\n");
+  sninfo("BMP180 driver loaded successfully!\n");
   return ret;
 }
 
diff --git a/drivers/sensors/kxtj9.c b/drivers/sensors/kxtj9.c
new file mode 100644
index 0000000000000000000000000000000000000000..70ec5ec808b5554dc6b5b9e7fa0ec28cef909a7a
--- /dev/null
+++ b/drivers/sensors/kxtj9.c
@@ -0,0 +1,681 @@
+/****************************************************************************
+ * drivers/sensors/kxtj9.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * This driver derives from the Motorola Moto Z MDK:
+ *
+ *   Copyright (c) 2016 Motorola Mobility, LLC.
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#if defined(CONFIG_I2C) && defined(CONFIG_SENSOR_KXTJ9)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+#ifndef CONFIG_SENSOR_KXTJ9_I2C_BUS_SPEED
+#  define CONFIG_SENSOR_KXTJ9_I2C_BUS_SPEED 400000
+#endif
+
+/* Register Definitions *****************************************************/
+
+/* Output registers */
+
+#define XOUT_L          0x06
+#define WHO_AM_I        0x0f
+#define DCST_RESP       0x0c
+
+/* Control registers */
+
+#define INT_REL         0x1a
+#define CTRL_REG1       0x1b
+#define INT_CTRL1       0x1e
+#define DATA_CTRL       0x21
+#define CTRL_REG2       0x1d
+
+/* Control register 1 bits */
+
+#define PC1_OFF         0x7f
+#define PC1_ON          (1 << 7)
+
+/* CTRL_REG1: set resolution, g-range, data ready enable */
+/* Output resolution: 8-bit valid or 12-bit valid */
+
+#define RES_8BIT        0
+#define RES_12BIT       (1 << 6)
+
+/* Data ready funtion enable bit: set during probe if using irq mode */
+
+#define DRDYE           (1 << 5)
+
+/* Output g-range: +/-2g, 4g, or 8g */
+
+#define KXTJ9_G_2G      0
+#define KXTJ9_G_4G      (1 << 3)
+#define KXTJ9_G_8G      (1 << 4)
+
+/* Interrupt control register 1 bits */
+/* Set these during probe if using irq mode */
+
+#define KXTJ9_IEL       (1 << 3)
+#define KXTJ9_IEA       (1 << 4)
+#define KXTJ9_IEN       (1 << 5)
+
+#define KXTJ9_SRST      0x80
+#define WHO_AM_I_KXCJ9  0x0a
+
+#define KXTJ9_CTRL1_CONFIG  (RES_12BIT | KXTJ9_G_2G | DRDYE)
+
+/* Misc. driver defitions ***************************************************/
+
+#define ACCEL_NUM_RETRIES   5
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* This structure describes the state of one KXTJ9 device */
+
+struct kxtj9_dev_s
+{
+  FAR struct i2c_master_s *i2c;
+  sem_t exclsem;
+  bool enable;
+  bool power_enabled;
+  uint8_t address;
+  uint8_t shift;
+  uint8_t ctrl_reg1;
+  uint8_t data_ctrl;
+  uint8_t int_ctrl;
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* I2C helpers */
+
+static int     kxtj9_reg_read(FAR struct kxtj9_dev_s *priv, uint8_t regaddr,
+                 FAR uint8_t *regval, unsigned int len);
+static int     kxtj9_reg_write(FAR struct kxtj9_dev_s *priv,
+                 uint8_t regaddr,  uint8_t regval);
+
+/* KXTJ9 helpers */
+
+static int     kxtj9_configure(FAR struct kxtj9_dev_s *priv, uint8_t odr);
+static int     kxtj9_enable(FAR struct kxtj9_dev_s *priv, bool on);
+static int     kxtj9_read_sensor_data(FAR struct kxtj9_dev_s *priv,
+                 FAR struct kxtj9_sensor_data *sensor_data);
+static void    kxtj9_soft_reset(FAR struct kxtj9_dev_s *priv);
+static void    kxtj9_set_mode_standby(FAR struct kxtj9_dev_s *priv);
+
+/* Character driver methods */
+
+static int     kxtj9_open(FAR struct file *filep);
+static int     kxtj9_close(FAR struct file *filep);
+static ssize_t kxtj9_read(FAR struct file *filep, FAR char *buffer,
+                 size_t buflen);
+static ssize_t kxtj9_write(FAR struct file *filep, FAR const char *buffer,
+                 size_t buflen);
+static int     kxtj9_ioctl(FAR struct file *filep, int cmd,
+                 unsigned long arg);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct file_operations g_fops =
+{
+  kxtj9_open,
+  kxtj9_close,
+  kxtj9_read,
+  kxtj9_write,
+  NULL,
+  kxtj9_ioctl,
+#ifndef CONFIG_DISABLE_POLL
+  NULL,
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  NULL,
+#endif
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: kxtj9_reg_read
+ *
+ * Description:
+ *   Read from multiple KXTJ9 registers.
+ *
+ ****************************************************************************/
+
+static int kxtj9_reg_read(FAR struct kxtj9_dev_s *priv, uint8_t regaddr,
+                          FAR uint8_t *regval, unsigned int len)
+{
+  struct i2c_msg_s msg[2];
+  uint8_t buf[1];
+  int retries = ACCEL_NUM_RETRIES;
+  int ret;
+
+  do
+    {
+      /* Format two messages: The first is a write containing the register
+       * address
+       */
+
+      buf[0]           = regaddr;
+
+      msg[0].frequency = CONFIG_SENSOR_KXTJ9_I2C_BUS_SPEED,
+      msg[0].addr      = priv->address;
+      msg[0].flags     = 0;
+      msg[0].buffer    = buf;
+      msg[0].length    = 1;
+
+      /* The second is a read with a restart containing the register data */
+
+      msg[1].frequency = CONFIG_SENSOR_KXTJ9_I2C_BUS_SPEED,
+      msg[1].addr      = priv->address;
+      msg[1].flags     = I2C_M_READ;
+      msg[1].buffer    = regval;
+      msg[1].length    = len;
+
+      /* Then perform the transfer. */
+
+      ret = I2C_TRANSFER(priv->i2c, msg, 2);
+    }
+  while (ret < 0 && retries-- > 0);
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: kxtj9_reg_write
+ *
+ * Description:
+ *   Write a value to a single KXTJ9 register
+ *
+ ****************************************************************************/
+
+static int kxtj9_reg_write(FAR struct kxtj9_dev_s *priv, uint8_t regaddr,
+                           uint8_t regval)
+{
+  struct i2c_msg_s msg;
+  uint8_t buf[2];
+  int ret;
+  int retries = ACCEL_NUM_RETRIES;
+
+  do
+    {
+      /* Setup for the transfer */
+
+      buf[0]        = regaddr;
+      buf[1]        = regval;
+
+      msg.frequency = CONFIG_SENSOR_KXTJ9_I2C_BUS_SPEED,
+      msg.addr      = priv->address;
+      msg.flags     = 0;
+      msg.buffer    = buf;
+      msg.length    = 2;
+
+      /* Then perform the transfer. */
+
+      ret = I2C_TRANSFER(priv->i2c, &msg, 1);
+    }
+  while (ret < 0 && retries-- > 0);
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: kxtj9_soft_reset
+ *
+ * Description:
+ *   Configure the KXTJ9 device.  Handler the SNIOC_CONFIGURE IOCTL command.
+ *
+ ****************************************************************************/
+
+static void kxtj9_soft_reset(FAR struct kxtj9_dev_s *priv)
+{
+  uint8_t wbuf[1];
+
+  /* Set accel into standby and known state by disabling PC1 */
+
+  wbuf[0] = KXTJ9_CTRL1_CONFIG;
+  kxtj9_reg_write(priv, CTRL_REG1, wbuf[0]);
+
+  /* Send the reset command */
+
+  kxtj9_reg_read(priv, CTRL_REG2, &wbuf[0], 1);
+
+  wbuf[0] |= KXTJ9_SRST;
+  kxtj9_reg_write(priv, CTRL_REG2, wbuf[0]);
+
+  /* Delay 10ms for the accel parts to re-initialize */
+
+  usleep(10000);
+}
+
+/****************************************************************************
+ * Name: kxtj9_set_mode_standby
+ *
+ * Description:
+ *   Configure the KXTJ9 device.  Handler the SNIOC_CONFIGURE IOCTL command.
+ *
+ ****************************************************************************/
+
+static void kxtj9_set_mode_standby(FAR struct kxtj9_dev_s *priv)
+{
+  uint8_t wbuf[1];
+
+  /* Set Accel into standby and known state by disabling PC1 */
+
+  wbuf[0] = KXTJ9_CTRL1_CONFIG;
+  kxtj9_reg_write(priv, CTRL_REG1, wbuf[0]);
+
+  /* Clear interrupts */
+
+  wbuf[0] = 0;
+  kxtj9_reg_write(priv, INT_CTRL1, wbuf[0]);
+}
+
+/****************************************************************************
+ * Name: kxtj9_configure
+ *
+ * Description:
+ *   Configure the KXTJ9 device.  Handler the SNIOC_CONFIGURE IOCTL command.
+ *
+ ****************************************************************************/
+
+static int kxtj9_configure(FAR struct kxtj9_dev_s *priv, uint8_t odr)
+{
+  uint8_t wbuf[0];
+  int ret;
+
+  do
+    {
+      ret = sem_wait(&priv->exclsem);
+    }
+  while (ret < 0 && errno == EINTR);
+
+  kxtj9_soft_reset(priv);
+  kxtj9_set_mode_standby(priv);
+
+  /* Read WHO_AM_I register, should return 0x0a */
+
+  kxtj9_reg_read(priv, WHO_AM_I, &wbuf[0], 1);
+  if (wbuf[0] != WHO_AM_I_KXCJ9)
+    {
+      snerr("ERROR: Not KXCJ9 chipset, WHO_AM_I register is 0x%2x.\n",
+            wbuf[0]);
+    }
+
+  /* Ensure that PC1 is cleared before updating control registers */
+
+  kxtj9_reg_write(priv, CTRL_REG1, 0);
+
+  /* 12Bit Res and -2G~+2G range */
+
+  priv->ctrl_reg1 = KXTJ9_CTRL1_CONFIG;
+  kxtj9_reg_write(priv, CTRL_REG1, priv->ctrl_reg1);
+
+  priv->data_ctrl = odr;
+  kxtj9_reg_write(priv, DATA_CTRL, priv->data_ctrl);
+
+  /* In irq mode, populate INT_CTRL */
+
+  priv->int_ctrl = KXTJ9_IEN | KXTJ9_IEA | KXTJ9_IEL;
+  kxtj9_reg_write(priv, INT_CTRL1, priv->int_ctrl);
+
+  sem_post(&priv->exclsem);
+  return 0;
+}
+
+/****************************************************************************
+ * Name: kxtj9_enable
+ *
+ * Description:
+ *   Enable or disable the KXTJ9 device.  Handler the SNIOC_ENABLE and
+ *   SNIOC_DISABLE IOCTL commands.
+ *
+ ****************************************************************************/
+
+static int kxtj9_enable(FAR struct kxtj9_dev_s *priv, bool on)
+{
+  uint8_t wbuf[1];
+  int ret;
+
+  do
+    {
+      ret = sem_wait(&priv->exclsem);
+    }
+  while (ret < 0 && errno == EINTR);
+
+  if (!on && priv->power_enabled)
+    {
+      priv->ctrl_reg1 &= PC1_OFF;
+      kxtj9_reg_write(priv, CTRL_REG1, priv->ctrl_reg1);
+
+      priv->power_enabled = false;
+      sninfo("KXTJ9 in disabled mode\n");
+    }
+  else if (on && !priv->power_enabled)
+    {
+      /* Turn on outputs */
+
+      priv->ctrl_reg1 |= PC1_ON;
+      kxtj9_reg_write(priv, CTRL_REG1, priv->ctrl_reg1);
+
+      /* Clear initial interrupt if in irq mode */
+
+      kxtj9_reg_read(priv, INT_REL, wbuf, 1);
+      priv->power_enabled = true;
+      sninfo("KXTJ9 in operating mode\n");
+    }
+
+  sem_post(&priv->exclsem);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: kxtj9_read_sensor_data
+ *
+ * Description:
+ *   Read sensor data.  This supports the standard driver read() method.
+ *
+ ****************************************************************************/
+
+static int kxtj9_read_sensor_data(FAR struct kxtj9_dev_s *priv,
+                                  FAR struct kxtj9_sensor_data *sensor_data)
+{
+  int16_t acc_data[3];
+  uint8_t data;
+  int ret;
+
+  do
+    {
+      ret = sem_wait(&priv->exclsem);
+    }
+  while (ret < 0 && errno == EINTR);
+
+  kxtj9_reg_read(priv, XOUT_L, (uint8_t *)acc_data, 6);
+
+  /* 12 bit resolution, get rid of the lowest 4 bits */
+
+  sensor_data->x = acc_data[0] >> 4;
+  sensor_data->y = acc_data[1] >> 4;
+  sensor_data->z = acc_data[2] >> 4;
+
+  /* Read INT_REL to clear interrupt status */
+
+  kxtj9_reg_read(priv, INT_REL, &data, 1);
+  sem_post(&priv->exclsem);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: kxtj9_open
+ *
+ * Description:
+ *   This method is called when the device is opened.
+ *
+ ****************************************************************************/
+
+static int kxtj9_open(FAR struct file *filep)
+{
+  return OK;
+}
+
+/****************************************************************************
+ * Name: kxtj9_close
+ *
+ * Description:
+ *   This method is called when the device is closed.
+ *
+ ****************************************************************************/
+
+static int kxtj9_close(FAR struct file *filep)
+{
+  return OK;
+}
+
+/****************************************************************************
+ * Name: kxtj9_read
+ *
+ * Description:
+ *   The standard read method.
+ *
+ ****************************************************************************/
+
+static ssize_t kxtj9_read(FAR struct file *filep, FAR char *buffer,
+                          size_t buflen)
+{
+  FAR struct inode *inode;
+  FAR struct kxtj9_dev_s *priv;
+  size_t nsamples;
+  size_t i;
+  int ret;
+
+  /* How many samples will fit in the buffer? */
+
+  nsamples = buflen / sizeof(struct kxtj9_sensor_data);
+
+  /* If the provided buffer is not large enough to return a single sample,
+   * then return an error.
+   */
+
+  if (nsamples < 1)
+    {
+      snerr("ERROR: Bufer too small %lu < %u\n",
+            buflen, sizeof(struct kxtj9_sensor_data));
+      return (ssize_t)-EINVAL;
+    }
+
+  DEBUGASSERT(filep != NULL && filep->f_inode != NULL && buffer != NULL);
+  inode = filep->f_inode;
+
+  priv = (FAR struct kxtj9_dev_s *)inode->i_private;
+  DEBUGASSERT(priv != NULL  && priv->i2c != NULL);
+
+  /* Return all of the samples that will fit in the user-provided buffer */
+
+  for (i = 0; i < nsamples; i++)
+    {
+      /* Get the next sample data */
+
+      ret = kxtj9_read_sensor_data(priv, (FAR struct kxtj9_sensor_data *)buffer);
+      if (ret < 0)
+        {
+          snerr("ERROR: kxtj9_read_sensor_data failed: %d\n", ret);
+          return (ssize_t)ret;
+        }
+
+      /* Set up for the next sample */
+
+      buffer += sizeof(struct kxtj9_sensor_data);
+    }
+
+  return (ssize_t)(nsamples * sizeof(struct kxtj9_sensor_data));
+}
+
+/****************************************************************************
+ * Name: kxtj9_write
+ *
+ * Description:
+ *   A dummy write method.
+ *
+ ****************************************************************************/
+
+static ssize_t kxtj9_write(FAR struct file *filep, FAR const char *buffer,
+                             size_t buflen)
+{
+  return -ENOSYS;
+}
+
+/****************************************************************************
+ * Name: kxtj9_ioctl
+ *
+ * Description:
+ *   The standard ioctl method.
+ *
+ ****************************************************************************/
+
+static int kxtj9_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
+{
+  FAR struct inode *inode;
+  FAR struct kxtj9_dev_s *priv;
+  int  ret;
+
+  /* Sanity check */
+
+  DEBUGASSERT(filep != NULL && filep->f_inode != NULL);
+  inode = filep->f_inode;
+
+  priv = (FAR struct kxtj9_dev_s *)inode->i_private;
+  DEBUGASSERT(priv != NULL && priv->i2c != NULL);
+
+  /* Handle ioctl commands */
+
+  switch (cmd)
+    {
+      /* Start converting. Arg: None. */
+
+      case SNIOC_ENABLE:
+        ret = kxtj9_enable(priv, true);
+        break;
+
+      /* Stop converting. Arg: None. */
+
+      case SNIOC_DISABLE:
+        ret = kxtj9_enable(priv, false);
+        break;
+
+      /* Configure the KXTJ9. Arg: enum kxtj9_odr_e value. */
+
+      case SNIOC_CONFIGURE:
+        {
+          DEBUGASSERT(arg <= UINT8_MAX);
+          ret = kxtj9_configure(priv, (uint8_t)arg);
+          sninfo("SNIOC_CONFIGURE: ODR=%u ret=%d\n",
+                 (unsigned int)arg, ret);
+        }
+        break;
+
+      /* Unrecognized commands */
+
+      default:
+        snerr("ERROR: Unrecognized cmd: %d arg: %lu\n", cmd, arg);
+        ret = -ENOTTY;
+        break;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: kxtj9_register
+ *
+ * Description:
+ *   Register the KXTJ9 accelerometer device as 'devpath'.
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register, e.g., "/dev/accel0".
+ *   i2c     - An I2C driver instance.
+ *   addr    - The I2C address of the KXTJ9 accelerometer, gyroscope or
+ *             magnetometer.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int kxtj9_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
+                   uint8_t address)
+{
+  FAR struct kxtj9_dev_s *priv;
+  int ret;
+
+  /* Sanity check */
+
+  DEBUGASSERT(devpath != NULL && i2c != NULL);
+
+  /* Initialize the device's structure */
+
+  priv = (FAR struct kxtj9_dev_s *)kmm_zalloc(sizeof(struct kxtj9_dev_s));
+  if (priv == NULL)
+    {
+      snerr("ERROR: Failed to allocate driver instance\n");
+      return -ENOMEM;
+    }
+
+  priv->i2c     = i2c;
+  priv->address = address;
+  sem_init(&priv->exclsem, 0, 1);
+
+  /* Register the character driver */
+
+  ret = register_driver(devpath, &g_fops, 0666, priv);
+  if (ret < 0)
+    {
+      snerr("ERROR: Failed to register driver: %d\n", ret);
+      kmm_free(priv);
+      return ret;
+    }
+
+  return OK;
+}
+
+#endif /* CONFIG_I2C && CONFIG_SENSOR_KXTJ9 */
diff --git a/drivers/sensors/l3gd20.c b/drivers/sensors/l3gd20.c
new file mode 100644
index 0000000000000000000000000000000000000000..d400f213088f0f4ad4951f9abd0fe5f6de4bb569
--- /dev/null
+++ b/drivers/sensors/l3gd20.c
@@ -0,0 +1,653 @@
+/****************************************************************************
+ * drivers/sensors/l3gd20.c
+ * Character driver for the ST L3GD20 3-Axis gyroscope.
+ *
+ *   Copyright (C) Gregory Nutt. All rights reserved.
+ *   Author: Mateusz Szafoni 
+ *
+ * Based on drivers/sensors/lis3dsh.c
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include 
+
+#if defined(CONFIG_SPI) && defined(CONFIG_SENSORS_L3GD20)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if !defined(CONFIG_SCHED_HPWORK)
+#  error Hi-priority work queue support is required (CONFIG_SCHED_HPWORK)
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct l3gd20_dev_s
+{
+  FAR struct l3gd20_dev_s *flink;     /* Supports a singly linked list of
+                                       * drivers */
+  FAR struct spi_dev_s *spi;          /* Pointer to the SPI instance */
+  FAR struct l3gd20_config_s *config; /* Pointer to the configuration of the
+                                       * L3GD20 sensor */
+  sem_t datasem;                      /* Manages exclusive access to this
+                                       * structure */
+  struct l3gd20_sensor_data_s data;   /* The data as measured by the sensor */
+  struct work_s work;                 /* The work queue is responsible for
+                                       * retrieving the data from the sensor
+                                       * after the arrival of new data was
+                                       * signalled in an interrupt */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static void l3gd20_read_register(FAR struct l3gd20_dev_s *dev,
+                                 uint8_t const reg_addr, uint8_t *reg_data);
+static void l3gd20_write_register(FAR struct l3gd20_dev_s *dev,
+                                  uint8_t const reg_addr,
+                                  uint8_t const reg_data);
+static void l3gd20_reset(FAR struct l3gd20_dev_s *dev);
+static void l3gd20_read_measurement_data(FAR struct l3gd20_dev_s *dev);
+static void l3gd20_read_gyroscope_data(FAR struct l3gd20_dev_s *dev,
+                                       uint16_t *x_gyr, uint16_t *y_gyr,
+                                       uint16_t *z_gyr);
+static void l3gd20_read_temperature(FAR struct l3gd20_dev_s *dev,
+                                    uint8_t * temperature);
+static int l3gd20_interrupt_handler(int irq, FAR void *context);
+static void l3gd20_worker(FAR void *arg);
+
+static int l3gd20_open(FAR struct file *filep);
+static int l3gd20_close(FAR struct file *filep);
+static ssize_t l3gd20_read(FAR struct file *filep, FAR char *buffer,
+                           size_t buflen);
+static ssize_t l3gd20_write(FAR struct file *filep, FAR const char *buffer,
+                            size_t buflen);
+static int l3gd20_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct file_operations g_l3gd20_fops =
+{
+  l3gd20_open,
+  l3gd20_close,
+  l3gd20_read,
+  l3gd20_write,
+  NULL,
+  l3gd20_ioctl
+#ifndef CONFIG_DISABLE_POLL
+  , NULL
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  , NULL
+#endif
+};
+
+/* Single linked list to store instances of drivers */
+
+static struct l3gd20_dev_s *g_l3gd20_list = NULL;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: l3gd20_read_register
+ ****************************************************************************/
+
+static void l3gd20_read_register(FAR struct l3gd20_dev_s *dev,
+                                 uint8_t const reg_addr, uint8_t *reg_data)
+{
+  /* Lock the SPI bus so that only one device can access it at the same time */
+
+  SPI_LOCK(dev->spi, true);
+
+  /* Set CS to low which selects the L3GD20 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, true);
+
+  /* Transmit the register address from where we want to read - the MSB needs
+   * to be set to indicate the read indication.
+   */
+
+  SPI_SEND(dev->spi, reg_addr | 0x80);
+
+  /* Write an idle byte while receiving the required data */
+
+  *reg_data = (uint8_t) (SPI_SEND(dev->spi, 0));
+
+  /* Set CS to high which deselects the L3GD20 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, false);
+
+  /* Unlock the SPI bus */
+
+  SPI_LOCK(dev->spi, false);
+}
+
+/****************************************************************************
+ * Name: l3gd20_write_register
+ ****************************************************************************/
+
+static void l3gd20_write_register(FAR struct l3gd20_dev_s *dev,
+                                  uint8_t const reg_addr,
+                                  uint8_t const reg_data)
+{
+  /* Lock the SPI bus so that only one device can access it at the same time */
+
+  SPI_LOCK(dev->spi, true);
+
+  /* Set CS to low which selects the L3GD20 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, true);
+
+  /* Transmit the register address from where we want to read */
+
+  SPI_SEND(dev->spi, reg_addr);
+
+  /* Transmit the content which should be written in the register */
+
+  SPI_SEND(dev->spi, reg_data);
+
+  /* Set CS to high which deselects the L3GD20 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, false);
+
+  /* Unlock the SPI bus */
+
+  SPI_LOCK(dev->spi, false);
+}
+
+/****************************************************************************
+ * Name: l3gd20_reset
+ ****************************************************************************/
+
+static void l3gd20_reset(FAR struct l3gd20_dev_s *dev)
+{
+  /* Reboot memory content */
+
+  l3gd20_write_register(dev, L3GD20_CTRL_REG_5, L3GD20_CTRL_REG_5_BOOT_bm);
+
+  up_mdelay(100);
+}
+
+/****************************************************************************
+ * Name: l3gd20_read_measurement_data
+ ****************************************************************************/
+
+static void l3gd20_read_measurement_data(FAR struct l3gd20_dev_s *dev)
+{
+  uint16_t x_gyr = 0;
+  uint16_t y_gyr = 0;
+  uint16_t z_gyr = 0;
+  uint8_t temperature = 0;
+  int ret;
+
+  /* Read Gyroscope */
+
+  l3gd20_read_gyroscope_data(dev, &x_gyr, &y_gyr, &z_gyr);
+
+  /* Read Temperature */
+
+  l3gd20_read_temperature(dev, &temperature);
+
+  /* Aquire the semaphore before the data is copied */
+
+  ret = sem_wait(&dev->datasem);
+  if (ret < 0)
+    {
+      snerr("ERROR: Could not aquire dev->datasem: %d\n", ret);
+      return;
+    }
+
+  /* Copy retrieve data to internal data structure */
+
+  dev->data.x_gyr = (int16_t) (x_gyr);
+  dev->data.y_gyr = (int16_t) (y_gyr);
+  dev->data.z_gyr = (int16_t) (z_gyr);
+
+  /* Give back the semaphore */
+
+  sem_post(&dev->datasem);
+}
+
+/****************************************************************************
+ * Name: l3gd20_read_gyroscope_data
+ ****************************************************************************/
+
+static void l3gd20_read_gyroscope_data(FAR struct l3gd20_dev_s *dev,
+                                       uint16_t * x_gyr, uint16_t * y_gyr,
+                                       uint16_t * z_gyr)
+{
+  /* Lock the SPI bus so that only one device can access it at the same time */
+
+  SPI_LOCK(dev->spi, true);
+
+  /* Set CS to low which selects the L3GD20 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, true);
+
+  /* Transmit the register address from where we want to start reading
+   * 0x80 -> MSB is set -> Read Indication
+   * 0x40 -> MSB-1 (MS-Bit) is set -> auto increment of address when reading
+   * multiple bytes.
+   */
+
+  SPI_SEND(dev->spi, (L3GD20_OUT_X_L_REG | 0x80 | 0x40)); /* RX */
+
+  *x_gyr = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0);   /* LSB */
+  *x_gyr |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8);  /* MSB */
+
+  *y_gyr = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0);   /* LSB */
+  *y_gyr |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8);  /* MSB */
+
+  *z_gyr = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0);   /* LSB */
+  *z_gyr |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8);  /* MSB */
+
+  /* Set CS to high which deselects the L3GD20 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, false);
+
+  /* Unlock the SPI bus */
+
+  SPI_LOCK(dev->spi, false);
+}
+
+/****************************************************************************
+ * Name: l3gd20_read_temperature
+ ****************************************************************************/
+
+static void l3gd20_read_temperature(FAR struct l3gd20_dev_s* dev,
+                                    uint8_t* temperature)
+{
+  /* Lock the SPI bus so that only one device can access it at the same time */
+
+  SPI_LOCK(dev->spi, true);
+
+  /* Set CS to low which selects the L3GD20 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, true);
+
+  /* Transmit the register address from where we want to start reading
+   * 0x80  MSB is set -> Read Indication
+   */
+
+  SPI_SEND(dev->spi, (L3GD20_OUT_TEMP_REG | 0x80));
+
+  /* RX */
+
+  *temperature  = (SPI_SEND(dev->spi, 0));
+
+  /* Set CS to high which deselects the L3GD20 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, false);
+
+  /* Unlock the SPI bus */
+
+  SPI_LOCK(dev->spi, false);
+}
+
+/****************************************************************************
+ * Name: l3gd20_interrupt_handler
+ ****************************************************************************/
+
+static int l3gd20_interrupt_handler(int irq, FAR void* context)
+{
+  /* This function should be called upon a rising edge on the L3GD20 new data
+   * interrupt pin since it signals that new data has been measured.
+   */
+
+  FAR struct l3gd20_dev_s *priv = 0;
+  int ret;
+
+  /* Find out which L3GD20 device caused the interrupt */
+
+  for (priv = g_l3gd20_list;
+       priv && priv->config->irq != irq;
+       priv = priv->flink)
+    {
+      DEBUGASSERT(priv != NULL);
+    }
+
+  /* Task the worker with retrieving the latest sensor data. We should not do
+   * this in a interrupt since it might take too long. Also we cannot lock the
+   * SPI bus from within an interrupt.
+   */
+
+  DEBUGASSERT(priv->work.worker == NULL);
+  ret = work_queue(HPWORK, &priv->work, l3gd20_worker, priv, 0);
+  if (ret < 0)
+    {
+      snerr("ERROR: Failed to queue work: %d\n", ret);
+      return ret;
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: l3gd20_worker
+ ****************************************************************************/
+
+static void l3gd20_worker(FAR void *arg)
+{
+  FAR struct l3gd20_dev_s *priv = (FAR struct l3gd20_dev_s *)(arg);
+  DEBUGASSERT(priv != NULL);
+
+  /* Read out the latest sensor data */
+
+  l3gd20_read_measurement_data(priv);
+}
+
+/****************************************************************************
+ * Name: l3gd20_open
+ ****************************************************************************/
+
+static int l3gd20_open(FAR struct file *filep)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct l3gd20_dev_s *priv = inode->i_private;
+#ifdef CONFIG_DEBUG_SENSORS_INFO
+  uint8_t reg_content;
+  uint8_t reg_addr;
+#endif
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Perform a reset */
+
+  l3gd20_reset(priv);
+
+  /* Enable DRDY signal on INT 2 */
+
+  l3gd20_write_register(priv,
+                        L3GD20_CTRL_REG_3,
+                        L3GD20_CTRL_REG_3_I2_DRDY_bm);
+
+  /* Enable the maximum full scale mode.
+   * Enable block data update for gyro sensor data.
+   * This should prevent race conditions when reading sensor data.
+   */
+
+  l3gd20_write_register(priv,
+                        L3GD20_CTRL_REG_4,
+                        L3GD20_CTRL_REG_4_BDU_bm |
+                        L3GD20_CTRL_REG_4_FS_1_bm |
+                        L3GD20_CTRL_REG_4_FS_0_bm);
+
+  /* Enable X,Y,Z axis
+   * DR=00 -> Output data rate = 95 Hz, Cut-off = 12.5
+   */
+
+  l3gd20_write_register(priv,
+                        L3GD20_CTRL_REG_1,
+                        L3GD20_CTRL_REG_1_POWERDOWN_bm |
+                        L3GD20_CTRL_REG_1_X_EN_bm |
+                        L3GD20_CTRL_REG_1_Y_EN_bm |
+                        L3GD20_CTRL_REG_1_Z_EN_bm);
+
+  /* Read measurement data to ensure DRDY is low */
+
+  l3gd20_read_measurement_data(priv);
+
+  /* Read back the content of all control registers for debug purposes */
+
+#ifdef CONFIG_DEBUG_SENSORS_INFO
+  reg_content = 0;
+
+  l3gd20_read_register(priv, L3GD20_WHO_AM_I, ®_content);
+  sninfo("WHO_AM_I_REG = %04x\n", reg_content);
+
+  for (reg_addr = L3GD20_CTRL_REG_1;
+       reg_addr <= L3GD20_CTRL_REG_5;
+       reg_addr++)
+    {
+      l3gd20_read_register(priv, reg_addr, ®_content);
+      sninfo("R#%04x = %04x\n", reg_addr, reg_content);
+    }
+
+  l3gd20_read_register(priv, L3GD20_STATUS_REG, ®_content);
+  sninfo("STATUS_REG = %04x\n", reg_content);
+#endif
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: l3gd20_close
+ ****************************************************************************/
+
+static int l3gd20_close(FAR struct file *filep)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct l3gd20_dev_s *priv = inode->i_private;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Perform a reset */
+
+  l3gd20_reset(priv);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: l3gd20_read
+ ****************************************************************************/
+
+static ssize_t l3gd20_read(FAR struct file *filep, FAR char *buffer,
+                           size_t buflen)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct l3gd20_dev_s *priv = inode->i_private;
+  FAR struct l3gd20_sensor_data_s *data;
+  int ret;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Check if enough memory was provided for the read call */
+
+  if (buflen < sizeof(FAR struct l3gd20_sensor_data_s))
+    {
+      snerr("ERROR: Not enough memory for reading out a sensor data sample\n");
+      return -ENOSYS;
+    }
+
+  /* Acquire the semaphore before the data is copied */
+
+  ret = sem_wait(&priv->datasem);
+  if (ret < 0)
+    {
+      int errcode = errno;
+      snerr("ERROR: Could not aquire priv->datasem: %d\n", errcode);
+      return -errcode;
+    }
+
+  /* Copy the sensor data into the buffer */
+
+  data = (FAR struct l3gd20_sensor_data_s *)buffer;
+  memset(data, 0, sizeof(FAR struct l3gd20_sensor_data_s));
+
+  data->x_gyr = priv->data.x_gyr;
+  data->y_gyr = priv->data.y_gyr;
+  data->z_gyr = priv->data.z_gyr;
+  data->temperature = priv->data.temperature;
+
+  /* Give back the semaphore */
+
+  sem_post(&priv->datasem);
+
+  return sizeof(FAR struct l3gd20_sensor_data_s);
+}
+
+/****************************************************************************
+ * Name: l3gd20_write
+ ****************************************************************************/
+
+static ssize_t l3gd20_write(FAR struct file *filep, FAR const char *buffer,
+                            size_t buflen)
+{
+  return -ENOSYS;
+}
+
+/****************************************************************************
+ * Name: l3gd20_ioctl
+ ****************************************************************************/
+
+static int l3gd20_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
+{
+  int ret = OK;
+
+  switch (cmd)
+    {
+      /* @TODO */
+
+      /* Command was not recognized */
+
+    default:
+      snerr("ERROR: Unrecognized cmd: %d\n", cmd);
+      ret = -ENOTTY;
+      break;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: l3gd20_register
+ *
+ * Description:
+ *   Register the L3DF20 character device as 'devpath'.
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register, e.g., "/dev/gyr0".
+ *   spi     - An SPI driver instance.
+ *   config  - configuration for the L3GD20 driver.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int l3gd20_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
+                    FAR struct l3gd20_config_s *config)
+{
+  FAR struct l3gd20_dev_s *priv;
+  int ret = OK;
+
+  /* Sanity check */
+
+  DEBUGASSERT(spi != NULL);
+  DEBUGASSERT(config != NULL);
+
+  /* Initialize the L3GD20 device structure */
+
+  priv = (FAR struct l3gd20_dev_s *)kmm_malloc(sizeof(struct l3gd20_dev_s));
+  if (priv == NULL)
+    {
+      snerr("ERROR: Failed to allocate instance\n");
+      ret = -ENOMEM;
+      goto errout;
+    }
+
+  priv->spi              = spi;
+  priv->config           = config;
+  priv->work.worker      = NULL;
+
+  priv->data.x_gyr       = 0;
+  priv->data.y_gyr       = 0;
+  priv->data.z_gyr       = 0;
+  priv->data.temperature = 0;
+
+  /* Initialize sensor data access semaphore */
+
+  sem_init(&priv->datasem, 0, 1);
+
+  /* Setup SPI frequency and mode */
+
+  SPI_SETFREQUENCY(spi, L3GD20_SPI_FREQUENCY);
+  SPI_SETMODE(spi, L3GD20_SPI_MODE);
+
+  /* Attach the interrupt handler */
+
+  ret = priv->config->attach(priv->config, &l3gd20_interrupt_handler);
+  if (ret < 0)
+    {
+      snerr("ERROR: Failed to attach interrupt\n");
+      goto errout;
+    }
+
+  /* Register the character driver */
+
+  ret = register_driver(devpath, &g_l3gd20_fops, 0666, priv);
+  if (ret < 0)
+    {
+      snerr("ERROR: Failed to register driver: %d\n", ret);
+      kmm_free(priv);
+      sem_destroy(&priv->datasem);
+      goto errout;
+    }
+
+  /* Since we support multiple L3GD20 devices, we will need to add this new
+   * instance to a list of device instances so that it can be found by the
+   * interrupt handler based on the received IRQ number. */
+
+  priv->flink   = g_l3gd20_list;
+  g_l3gd20_list = priv;
+
+errout:
+  return ret;
+}
+
+#endif /* CONFIG_SPI && CONFIG_SENSORS_L3GD20 */
diff --git a/drivers/sensors/lis3dsh.c b/drivers/sensors/lis3dsh.c
new file mode 100644
index 0000000000000000000000000000000000000000..243f89874dc5265a20f1583c03a7fd9d04dc85e1
--- /dev/null
+++ b/drivers/sensors/lis3dsh.c
@@ -0,0 +1,590 @@
+/****************************************************************************
+ * drivers/sensors/lis3dsh.c
+ * Character driver for the LIS3DSH 3-Axis acclerometer.
+ *
+ *   Copyright (C) 2016 DS-Automotion GmbH. All rights reserved.
+ *   Author:  Alexander Entinger 
+ *            Thomas Ilk
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#if defined(CONFIG_SPI) && defined(CONFIG_LIS3DSH)
+
+/****************************************************************************
+ * Private
+ ****************************************************************************/
+
+struct lis3dsh_sensor_data_s
+{
+  int16_t x_acc;              /* Measurement result for x axis */
+  int16_t y_acc;              /* Measurement result for y axis */
+  int16_t z_acc;              /* Measurement result for z axis */
+};
+
+struct lis3dsh_dev_s
+{
+  FAR struct lis3dsh_dev_s *flink;     /* Supports a singly linked list of
+                                        * drivers */
+  FAR struct spi_dev_s *spi;           /* Pointer to the SPI instance */
+  FAR struct lis3dsh_config_s *config; /* Pointer to the configuration
+                                        * of the LIS3DSH sensor */
+  sem_t datasem;                       /* Manages exclusive access to this
+                                        * structure */
+  struct lis3dsh_sensor_data_s data;   /* The data as measured by the sensor */
+  struct work_s work;                  /* The work queue is responsible for
+                                        * retrieving the data from the
+                                        * sensor after the arrival of new
+                                        * data was signalled in an interrupt */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static void lis3dsh_read_register(FAR struct lis3dsh_dev_s *dev,
+                                  uint8_t const reg_addr, uint8_t *reg_data);
+static void lis3dsh_write_register(FAR struct lis3dsh_dev_s *dev,
+                                   uint8_t const reg_addr,
+                                   uint8_t const reg_data);
+static void lis3dsh_reset(FAR struct lis3dsh_dev_s *dev);
+static void lis3dsh_read_measurement_data(FAR struct lis3dsh_dev_s *dev);
+static void lis3dsh_read_acclerometer_data(FAR struct lis3dsh_dev_s *dev,
+                                           uint16_t *x_acc, uint16_t *y_acc,
+                                           uint16_t *z_acc);
+static int lis3dsh_interrupt_handler(int irq, FAR void *context);
+static void lis3dsh_worker(FAR void *arg);
+
+static int lis3dsh_open(FAR struct file *filep);
+static int lis3dsh_close(FAR struct file *filep);
+static ssize_t lis3dsh_read(FAR struct file *, FAR char *buffer,
+                            size_t buflen);
+static ssize_t lis3dsh_write(FAR struct file *filep, FAR const char *buffer,
+                             size_t buflen);
+static int lis3dsh_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct file_operations g_lis3dsh_fops =
+{
+  lis3dsh_open,
+  lis3dsh_close,
+  lis3dsh_read,
+  lis3dsh_write,
+  NULL,
+  lis3dsh_ioctl
+#ifndef CONFIG_DISABLE_POLL
+  , NULL
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  , NULL
+#endif
+};
+
+/* Single linked list to store instances of drivers */
+
+static struct lis3dsh_dev_s *g_lis3dsh_list = NULL;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lis3dsh_read_register
+ ****************************************************************************/
+
+static void lis3dsh_read_register(FAR struct lis3dsh_dev_s *dev,
+                                  uint8_t const reg_addr, uint8_t * reg_data)
+{
+  /* Lock the SPI bus so that only one device can access it at the same time */
+
+  SPI_LOCK(dev->spi, true);
+
+  /* Set CS to low which selects the LIS3DSH */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, true);
+
+  /* Transmit the register address from where we want to read - the MSB needs
+   * to be set to indicate the read indication.
+   */
+
+  SPI_SEND(dev->spi, reg_addr | 0x80);
+
+  /* Write an idle byte while receiving the required data */
+
+  *reg_data = (uint8_t) (SPI_SEND(dev->spi, 0));
+
+  /* Set CS to high which deselects the LIS3DSH */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, false);
+
+  /* Unlock the SPI bus */
+
+  SPI_LOCK(dev->spi, false);
+}
+
+/****************************************************************************
+ * Name: lis3dsh_write_register
+ ****************************************************************************/
+
+static void lis3dsh_write_register(FAR struct lis3dsh_dev_s *dev,
+                                   uint8_t const reg_addr,
+                                   uint8_t const reg_data)
+{
+  /* Lock the SPI bus so that only one device can access it at the same time */
+
+  SPI_LOCK(dev->spi, true);
+
+  /* Set CS to low which selects the LIS3DSH */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, true);
+
+  /* Transmit the register address from where we want to read */
+
+  SPI_SEND(dev->spi, reg_addr);
+
+  /* Transmit the content which should be written in the register */
+
+  SPI_SEND(dev->spi, reg_data);
+
+  /* Set CS to high which deselects the LIS3DSH */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, false);
+
+  /* Unlock the SPI bus */
+
+  SPI_LOCK(dev->spi, false);
+}
+
+/****************************************************************************
+ * Name: lis3dsh_reset
+ ****************************************************************************/
+
+static void lis3dsh_reset(FAR struct lis3dsh_dev_s *dev)
+{
+  lis3dsh_write_register(dev, LIS3DSH_CTRL_REG_6, LIS3DSH_CTRL_REG_6_BOOT_bm);
+
+  up_mdelay(100);
+}
+
+/****************************************************************************
+ * Name: lis3dsh_read_measurement_data
+ ****************************************************************************/
+
+static void lis3dsh_read_measurement_data(FAR struct lis3dsh_dev_s *dev)
+{
+  uint16_t x_acc = 0;
+  uint16_t y_acc = 0;
+  uint16_t z_acc = 0;
+  int ret;
+
+  /* Read acclerometer data */
+
+  lis3dsh_read_acclerometer_data(dev, &x_acc, &y_acc, &z_acc);
+
+  /* Aquire the semaphore before the data is copied */
+
+  ret = sem_wait(&dev->datasem);
+  if (ret < 0)
+    {
+      snerr("ERROR: Could not aquire dev->datasem: %d\n", ret);
+      return;
+    }
+
+  /* Copy retrieve data to internal data structure */
+
+  dev->data.x_acc = (int16_t)x_acc;
+  dev->data.y_acc = (int16_t)y_acc;
+  dev->data.z_acc = (int16_t)z_acc;
+
+  /* Give back the semaphore */
+
+  sem_post(&dev->datasem);
+}
+
+/****************************************************************************
+ * Name: lis3dsh_read_acclerometer_data
+ ****************************************************************************/
+
+static void lis3dsh_read_acclerometer_data(FAR struct lis3dsh_dev_s *dev,
+                                           uint16_t * x_acc, uint16_t * y_acc,
+                                           uint16_t * z_acc)
+{
+  /* Lock the SPI bus so that only one device can access it at the same time */
+
+  SPI_LOCK(dev->spi, true);
+
+  /* Set CS to low which selects the LIS3DSH */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, true);
+
+  /* Transmit the register address from where we want to start reading 0x80 ->
+   * MSB is set -> Read Indication.
+   */
+
+  SPI_SEND(dev->spi, (LIS3DSH_OUT_X_L_REG | 0x80));
+
+  /* RX */
+
+  *x_acc = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0);   /* LSB */
+  *x_acc |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8);  /* MSB */
+
+  *y_acc = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0);   /* LSB */
+  *y_acc |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8);  /* MSB */
+
+  *z_acc = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0);   /* LSB */
+  *z_acc |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8);  /* MSB */
+
+  /* Set CS to high which deselects the LIS3DSH */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, false);
+
+  /* Unlock the SPI bus */
+
+  SPI_LOCK(dev->spi, false);
+}
+
+/****************************************************************************
+ * Name: lis3dsh_interrupt_handler
+ ****************************************************************************/
+
+static int lis3dsh_interrupt_handler(int irq, FAR void *context)
+{
+  /* This function should be called upon a rising edge on the LIS3DSH new data
+   * interrupt pin since it signals that new data has been measured.
+   */
+
+  FAR struct lis3dsh_dev_s *priv = NULL;
+  int ret;
+
+  /* Find out which device caused the interrupt */
+
+  for (priv = g_lis3dsh_list; priv && priv->config->irq != irq;
+       priv = priv->flink);
+  DEBUGASSERT(priv != NULL);
+
+  /* Task the worker with retrieving the latest sensor data. We should not do
+   * this in a interrupt since it might take too long. Also we cannot lock the
+   * SPI bus from within an interrupt.
+   */
+
+  DEBUGASSERT(priv->work.worker == NULL);
+  ret = work_queue(HPWORK, &priv->work, lis3dsh_worker, priv, 0);
+  if (ret < 0)
+    {
+      snerr("ERROR: Failed to queue work: %d\n", ret);
+      return ret;
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: lis3dsh_worker
+ ****************************************************************************/
+
+static void lis3dsh_worker(FAR void *arg)
+{
+  FAR struct lis3dsh_dev_s *priv = (FAR struct lis3dsh_dev_s *)(arg);
+  DEBUGASSERT(priv != NULL);
+
+  /* Read out the latest sensor data */
+
+  lis3dsh_read_measurement_data(priv);
+}
+
+/****************************************************************************
+ * Name: lis3dsh_open
+ ****************************************************************************/
+
+static int lis3dsh_open(FAR struct file *filep)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct lis3dsh_dev_s *priv = inode->i_private;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Perform a reset */
+
+  lis3dsh_reset(priv);
+
+  /* Enable - the full scale range (FS = +/- 16 g) */
+
+  lis3dsh_write_register(priv,
+                         LIS3DSH_CTRL_REG_5, LIS3DSH_CTRL_REG_5_FSCALE_2_bm);
+
+  /* Enable - Auto increment of address when reading multiple bytes */
+
+  lis3dsh_write_register(priv,
+                         LIS3DSH_CTRL_REG_6, LIS3DSH_CTRL_REG_6_ADD_INC_bm);
+
+  /* Enable - Measurement of X-, Y-, and Z-axis - Block data update for
+   * accelerating data This should prevent race conditions when reading sensor
+   * data - fastest output data rate (ODR = 1600 Hz) */
+
+  lis3dsh_write_register(priv,
+                         LIS3DSH_CTRL_REG_4,
+                         LIS3DSH_CTRL_REG_4_XEN_bm | LIS3DSH_CTRL_REG_4_YEN_bm |
+                         LIS3DSH_CTRL_REG_4_ZEN_bm | LIS3DSH_CTRL_REG_4_BDU_bm |
+                         LIS3DSH_CTRL_REG_4_ODR_3_bm | LIS3DSH_CTRL_REG_4_ODR_0_bm);
+
+  /* Enable - DRDY signal enable to INT 1 */
+
+  lis3dsh_write_register(priv,
+                         LIS3DSH_CTRL_REG_3,
+                         LIS3DSH_CTRL_REG_3_DR_EN_bm | LIS3DSH_CTRL_REG_3_IEA_bm |
+                         LIS3DSH_CTRL_REG_3_IEL_bm | LIS3DSH_CTRL_REG_3_INT1_EN_bm);
+
+  /* Read back the content of all control registers for debug purposes */
+
+#ifdef CONFIG_DEBUG_SENSORS_INFO
+  {
+    uint8_t reg_content = 0;
+
+    lis3dsh_read_register(priv, LIS3DSH_CTRL_REG_1, ®_content);
+    sninfo("LIS3DSH_CTRL_REG_1 = %04x\n", reg_content);
+    lis3dsh_read_register(priv, LIS3DSH_CTRL_REG_2, ®_content);
+    sninfo("LIS3DSH_CTRL_REG_2 = %04x\n", reg_content);
+    lis3dsh_read_register(priv, LIS3DSH_CTRL_REG_3, ®_content);
+    sninfo("LIS3DSH_CTRL_REG_3 = %04x\n", reg_content);
+    lis3dsh_read_register(priv, LIS3DSH_CTRL_REG_4, ®_content);
+    sninfo("LIS3DSH_CTRL_REG_4 = %04x\n", reg_content);
+    lis3dsh_read_register(priv, LIS3DSH_CTRL_REG_5, ®_content);
+    sninfo("LIS3DSH_CTRL_REG_5 = %04x\n", reg_content);
+    lis3dsh_read_register(priv, LIS3DSH_CTRL_REG_6, ®_content);
+    sninfo("LIS3DSH_CTRL_REG_6 = %04x\n", reg_content);
+    lis3dsh_read_register(priv, LIS3DSH_STATUS_REG, ®_content);
+    sninfo("STATUS_REG = %04x\n", reg_content);
+  }
+#endif
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: lis3dsh_close
+ ****************************************************************************/
+
+static int lis3dsh_close(FAR struct file *filep)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct lis3dsh_dev_s *priv = inode->i_private;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Perform a reset */
+
+  lis3dsh_reset(priv);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: lis3dsh_read
+ ****************************************************************************/
+
+static ssize_t lis3dsh_read(FAR struct file *filep, FAR char *buffer,
+                            size_t buflen)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct lis3dsh_dev_s *priv = inode->i_private;
+  FAR struct lis3dsh_sensor_data_s *data;
+  int ret;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Check if enough memory was provided for the read call */
+
+  if (buflen < sizeof(FAR struct lis3dsh_sensor_data_s))
+    {
+      snerr("ERROR: Not enough memory for reading out a sensor data sample\n");
+      return -ENOSYS;
+    }
+
+  /* Aquire the semaphore before the data is copied */
+
+  ret = sem_wait(&priv->datasem);
+  if (ret < 0)
+    {
+      int errcode = errno;
+      snerr("ERROR: Could not aquire priv->datasem: %d\n", errcode);
+      return -errcode;
+    }
+
+  /* Copy the sensor data into the buffer */
+
+  data = (FAR struct lis3dsh_sensor_data_s *)buffer;
+  memset(data, 0, sizeof(FAR struct lis3dsh_sensor_data_s));
+
+  data->x_acc = priv->data.x_acc;
+  data->y_acc = priv->data.y_acc;
+  data->z_acc = priv->data.z_acc;
+
+  /* Give back the semaphore */
+
+  sem_post(&priv->datasem);
+
+  return sizeof(FAR struct lis3dsh_sensor_data_s);
+}
+
+/****************************************************************************
+ * Name: lis3dsh_write
+ ****************************************************************************/
+
+static ssize_t lis3dsh_write(FAR struct file *filep, FAR const char *buffer,
+                             size_t buflen)
+{
+  return -ENOSYS;
+}
+
+/****************************************************************************
+ * Name: lis3dsh_ioctl
+ ****************************************************************************/
+
+static int lis3dsh_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
+{
+  int ret = OK;
+
+  switch (cmd)
+    {
+      /* Command was not recognized */
+
+    default:
+      snerr("ERROR: Unrecognized cmd: %d\n", cmd);
+      ret = -ENOTTY;
+      break;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lis3dsh_register
+ *
+ * Description:
+ *   Register the LIS3DSH character device as 'devpath'
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/acc0"
+ *   spi     - An instance of the SPI interface to use to communicate with
+ *             LIS3DSH
+ *   config  - configuration for the LIS3DSH driver.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int lis3dsh_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
+                     FAR struct lis3dsh_config_s *config)
+{
+  FAR struct lis3dsh_dev_s *priv;
+  int ret;
+
+  /* Sanity check */
+
+  DEBUGASSERT(spi != NULL);
+  DEBUGASSERT(config != NULL);
+
+  /* Initialize the LIS3DSH device structure */
+
+  priv = (FAR struct lis3dsh_dev_s *)kmm_malloc(sizeof(struct lis3dsh_dev_s));
+  if (priv == NULL)
+    {
+      snerr("ERROR: Failed to allocate instance\n");
+      return -ENOMEM;
+    }
+
+  priv->spi         = spi;
+  priv->config      = config;
+  priv->work.worker = NULL;
+
+  sem_init(&priv->datasem, 0, 1);       /* Initialize sensor data access
+                                         * semaphore */
+
+  /* Setup SPI frequency and mode */
+
+  SPI_SETFREQUENCY(spi, LIS3DSH_SPI_FREQUENCY);
+  SPI_SETMODE(spi, LIS3DSH_SPI_MODE);
+
+  /* Register the character driver */
+
+  ret = register_driver(devpath, &g_lis3dsh_fops, 0666, priv);
+  if (ret < 0)
+    {
+      snerr("ERROR: Failed to register driver: %d\n", ret);
+      kmm_free(priv);
+      sem_destroy(&priv->datasem);
+      return ret;
+    }
+
+  /* Since we support multiple LIS3DSH devices, we will need to add this new
+   * instance to a list of device instances so that it can be found by the
+   * interrupt handler based on the received IRQ number.
+   */
+
+  priv->flink = g_lis3dsh_list;
+  g_lis3dsh_list = priv;
+
+  /* Attach the interrupt handler */
+
+  ret = priv->config->attach(priv->config, &lis3dsh_interrupt_handler);
+  if (ret < 0)
+    {
+      snerr("ERROR: Failed to attach interrupt: %d\n", ret);
+      return ret;
+    }
+
+  return OK;
+}
+
+#endif /* CONFIG_SPI && CONFIG_LIS3DSH */
diff --git a/drivers/sensors/lis3mdl.c b/drivers/sensors/lis3mdl.c
new file mode 100644
index 0000000000000000000000000000000000000000..cdb04e776e70590d24ec20b784daf28e1cf70d19
--- /dev/null
+++ b/drivers/sensors/lis3mdl.c
@@ -0,0 +1,635 @@
+/****************************************************************************
+ * drivers/sensors/lis3mdl.c
+ * Character driver for the LIS3MDL 3-Axis magnetometer.
+ *
+ *   Copyright (C) 2016 DS-Automotion GmbH. All rights reserved.
+ *   Author: Alexander Entinger 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#if defined(CONFIG_SPI) && defined(CONFIG_LIS3MDL)
+
+/****************************************************************************
+ * Private
+ ****************************************************************************/
+
+struct lis3mdl_sensor_data_s
+{
+  int16_t x_mag;              /* Measurement result for x axis */
+  int16_t y_mag;              /* Measurement result for y axis */
+  int16_t z_mag;              /* Measurement result for z axis */
+  int16_t temperature;        /* Measurement result for temperature sensor */
+};
+
+struct lis3mdl_dev_s
+{
+  FAR struct lis3mdl_dev_s *flink;     /* Supports a singly linked list of
+                                        * drivers */
+  FAR struct spi_dev_s *spi;           /* Pointer to the SPI instance */
+  FAR struct lis3mdl_config_s *config; /* Pointer to the configuration
+                                        * of the LIS3MDL sensor */
+  sem_t datasem;                       /* Manages exclusive access to this
+                                        * structure */
+  struct lis3mdl_sensor_data_s data;   /* The data as measured by the sensor */
+  struct work_s work;                  /* The work queue is responsible for
+                                        * retrieving the data from the
+                                        * sensor after the arrival of new
+                                        * data was signalled in an interrupt */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static void lis3mdl_read_register(FAR struct lis3mdl_dev_s *dev,
+                                  uint8_t const reg_addr, uint8_t * reg_data);
+static void lis3mdl_write_register(FAR struct lis3mdl_dev_s *dev,
+                                   uint8_t const reg_addr,
+                                   uint8_t const reg_data);
+static void lis3mdl_reset(FAR struct lis3mdl_dev_s *dev);
+static void lis3mdl_read_measurement_data(FAR struct lis3mdl_dev_s *dev);
+static void lis3mdl_read_magnetic_data(FAR struct lis3mdl_dev_s *dev,
+                                       uint16_t * x_mag, uint16_t * y_mag,
+                                       uint16_t * z_mag);
+static void lis3mdl_read_temperature(FAR struct lis3mdl_dev_s *dev,
+                                     uint16_t * temperature);
+static int lis3mdl_interrupt_handler(int irq, FAR void *context);
+static void lis3mdl_worker(FAR void *arg);
+
+static int lis3mdl_open(FAR struct file *filep);
+static int lis3mdl_close(FAR struct file *filep);
+static ssize_t lis3mdl_read(FAR struct file *, FAR char *, size_t);
+static ssize_t lis3mdl_write(FAR struct file *filep, FAR const char *buffer,
+                             size_t buflen);
+static int lis3mdl_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct file_operations g_lis3mdl_fops =
+{
+  lis3mdl_open,
+  lis3mdl_close,
+  lis3mdl_read,
+  lis3mdl_write,
+  NULL,
+  lis3mdl_ioctl
+#ifndef CONFIG_DISABLE_POLL
+  , NULL
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  , NULL
+#endif
+};
+
+/* Single linked list to store instances of drivers */
+
+static struct lis3mdl_dev_s *g_lis3mdl_list = 0;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lis3mdl_read_register
+ ****************************************************************************/
+
+static void lis3mdl_read_register(FAR struct lis3mdl_dev_s *dev,
+                                  uint8_t const reg_addr, uint8_t * reg_data)
+{
+  /* Lock the SPI bus so that only one device can access it at the same time */
+
+  SPI_LOCK(dev->spi, true);
+
+  /* Set CS to low which selects the LIS3MDL */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, true);
+
+  /* Transmit the register address from where we want to read - the MSB needs
+   * to be set to indicate the read indication.
+   */
+
+  SPI_SEND(dev->spi, reg_addr | 0x80);
+
+  /* Write an idle byte while receiving the required data */
+
+  *reg_data = (uint8_t) (SPI_SEND(dev->spi, 0));
+
+  /* Set CS to high which deselects the LIS3MDL */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, false);
+
+  /* Unlock the SPI bus */
+
+  SPI_LOCK(dev->spi, false);
+}
+
+/****************************************************************************
+ * Name: lis3mdl_write_register
+ ****************************************************************************/
+
+static void lis3mdl_write_register(FAR struct lis3mdl_dev_s *dev,
+                                   uint8_t const reg_addr,
+                                   uint8_t const reg_data)
+{
+  /* Lock the SPI bus so that only one device can access it at the same time */
+
+  SPI_LOCK(dev->spi, true);
+
+  /* Set CS to low which selects the LIS3MDL */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, true);
+
+  /* Transmit the register address from where we want to read */
+
+  SPI_SEND(dev->spi, reg_addr);
+
+  /* Transmit the content which should be written in the register */
+
+  SPI_SEND(dev->spi, reg_data);
+
+  /* Set CS to high which deselects the LIS3MDL */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, false);
+
+  /* Unlock the SPI bus */
+
+  SPI_LOCK(dev->spi, false);
+}
+
+/****************************************************************************
+ * Name: lis3mdl_reset
+ ****************************************************************************/
+
+static void lis3mdl_reset(FAR struct lis3mdl_dev_s *dev)
+{
+  lis3mdl_write_register(dev,
+                         LIS3MDL_CTRL_REG_2, LIS3MDL_CTRL_REG_2_SOFT_RST_bm);
+
+  up_mdelay(100);
+}
+
+/****************************************************************************
+ * Name: lis3mdl_interrupt_handler
+ ****************************************************************************/
+
+static void lis3mdl_read_measurement_data(FAR struct lis3mdl_dev_s *dev)
+{
+  /* Magnetic data */
+
+  uint16_t x_mag = 0, y_mag = 0, z_mag = 0;
+
+  lis3mdl_read_magnetic_data(dev, &x_mag, &y_mag, &z_mag);
+
+  /* Temperature */
+
+  uint16_t temperature = 0;
+
+  lis3mdl_read_temperature(dev, &temperature);
+
+  /* Aquire the semaphore before the data is copied */
+
+  int ret = sem_wait(&dev->datasem);
+  if (ret != OK)
+    {
+      snerr("ERROR: Could not aquire dev->datasem: %d\n", ret);
+      return;
+    }
+
+  /* Copy retrieve data to internal data structure */
+
+  dev->data.x_mag = (int16_t) (x_mag);
+  dev->data.y_mag = (int16_t) (y_mag);
+  dev->data.z_mag = (int16_t) (z_mag);
+  dev->data.temperature = (int16_t) (temperature);
+
+  /* Give back the semaphore */
+
+  sem_post(&dev->datasem);
+}
+
+/****************************************************************************
+ * Name: lis3mdl_read_magnetic_data
+ ****************************************************************************/
+
+static void lis3mdl_read_magnetic_data(FAR struct lis3mdl_dev_s *dev,
+                                       uint16_t * x_mag, uint16_t * y_mag,
+                                       uint16_t * z_mag)
+{
+  /* Lock the SPI bus so that only one device can access it at the same time */
+
+  SPI_LOCK(dev->spi, true);
+
+  /* Set CS to low which selects the LIS3MDL */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, true);
+
+  /* Transmit the register address from where we want to start reading 0x80 ->
+   * MSB is set -> Read Indication 0x40 -> MSB-1 (MS-Bit) is set -> auto
+   * increment of address when reading multiple bytes.
+   */
+
+  SPI_SEND(dev->spi, (LIS3MDL_OUT_X_L_REG | 0x80 | 0x40)); /* RX */
+  *x_mag  = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0);     /* LSB */
+  *x_mag |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8);     /* MSB */
+
+  *y_mag  = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0);     /* LSB */
+  *y_mag |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8);     /* MSB */
+
+  *z_mag  = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0);     /* LSB */
+  *z_mag |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8);     /* MSB */
+
+  /* Set CS to high which deselects the LIS3MDL */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, false);
+
+  /* Unlock the SPI bus */
+
+  SPI_LOCK(dev->spi, false);
+}
+
+/****************************************************************************
+ * Name: lis3mdl_read_temperature
+ ****************************************************************************/
+
+static void lis3mdl_read_temperature(FAR struct lis3mdl_dev_s *dev,
+                                     uint16_t * temperature)
+{
+  /* Lock the SPI bus so that only one device can access it at the same time */
+
+  SPI_LOCK(dev->spi, true);
+
+  /* Set CS to low which selects the LIS3MDL */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, true);
+
+  /* Transmit the register address from where we want to start reading 0x80 ->
+   * MSB is set -> Read Indication 0x40 -> MSB-1 (MS-Bit) is set -> auto
+   * increment of address when reading multiple bytes */
+
+  SPI_SEND(dev->spi, (LIS3MDL_TEMP_OUT_L_REG | 0x80 | 0x40));
+
+  /* RX */
+
+  *temperature  = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0);    /* LSB */
+  *temperature |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8);    /* MSB */
+
+  /* Set CS to high which deselects the LIS3MDL */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, false);
+
+  /* Unlock the SPI bus */
+
+  SPI_LOCK(dev->spi, false);
+}
+
+/****************************************************************************
+ * Name: lis3mdl_interrupt_handler
+ ****************************************************************************/
+
+static int lis3mdl_interrupt_handler(int irq, FAR void *context)
+{
+  /* This function should be called upon a rising edge on the LIS3MDL DRDY pin
+   * since it signals that new data has been measured. */
+
+  FAR struct lis3mdl_dev_s *priv = 0;
+  int ret;
+
+  /* Find out which LIS3MDL device caused the interrupt */
+
+  for (priv = g_lis3mdl_list; priv && priv->config->irq != irq;
+       priv = priv->flink);
+  DEBUGASSERT(priv != NULL);
+
+  /* Task the worker with retrieving the latest sensor data. We should not do
+   * this in a interrupt since it might take too long. Also we cannot lock the
+   * SPI bus from within an interrupt. */
+
+  DEBUGASSERT(priv->work.worker == NULL);
+  ret = work_queue(HPWORK, &priv->work, lis3mdl_worker, priv, 0);
+  if (ret < 0)
+    {
+      snerr("ERROR: Failed to queue work: %d\n", ret);
+      return ret;
+    }
+  else
+    {
+      return OK;
+    }
+}
+
+/****************************************************************************
+ * Name: lis3mdl_worker
+ ****************************************************************************/
+
+static void lis3mdl_worker(FAR void *arg)
+{
+  FAR struct lis3mdl_dev_s *priv = (FAR struct lis3mdl_dev_s *)(arg);
+  DEBUGASSERT(priv != NULL);
+
+  /* Read out the latest sensor data */
+
+  lis3mdl_read_measurement_data(priv);
+}
+
+/****************************************************************************
+ * Name: lis3mdl_open
+ ****************************************************************************/
+static int lis3mdl_open(FAR struct file *filep)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct lis3mdl_dev_s *priv = inode->i_private;
+  uint8_t reg_content;
+  uint8_t reg_addr;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Perform a reset */
+
+  lis3mdl_reset(priv);
+
+  /* Enable * - the maximum full scale mode. * Full scale = +/- 1.6 mT (16
+   * Gauss) */
+
+  lis3mdl_write_register(priv,
+                         LIS3MDL_CTRL_REG_2,
+                         LIS3MDL_CTRL_REG_2_FS_1_bm |
+                         LIS3MDL_CTRL_REG_2_FS_0_bm);
+
+  /* Enable - temperature sensor - ultra high performance mode (UMP) for X and
+   * Y - fast output data rates This results in a output data rate of 155 Hz
+   * for X and Y */
+
+  lis3mdl_write_register(priv,
+                         LIS3MDL_CTRL_REG_1,
+                         LIS3MDL_CTRL_REG_1_TEMP_EN_bm |
+                         LIS3MDL_CTRL_REG_1_OM_1_bm | LIS3MDL_CTRL_REG_1_OM_0_bm
+                         | LIS3MDL_CTRL_REG_1_FAST_ODR_bm);
+
+  /* Enable * - ultra high performance mode (UMP) for Z * This should result to
+   * the same output data rate as for X and Y. */
+
+  lis3mdl_write_register(priv,
+                         LIS3MDL_CTRL_REG_4,
+                         LIS3MDL_CTRL_REG_4_OMZ_1_bm |
+                         LIS3MDL_CTRL_REG_4_OMZ_0_bm);
+
+  /* Enable * - block data update for magnetic sensor data * This should
+   * prevent race conditions when reading sensor data. */
+
+  lis3mdl_write_register(priv, LIS3MDL_CTRL_REG_5, LIS3MDL_CTRL_REG_5_BDU_bm);
+
+  /* Enable continous conversion mode - the device starts measuring now. */
+
+  lis3mdl_write_register(priv, LIS3MDL_CTRL_REG_3, 0);
+
+  /* Read measurement data to ensure DRDY is low */
+
+  lis3mdl_read_measurement_data(priv);
+
+  /* Read back the content of all control registers for debug purposes */
+
+  reg_content = 0;
+  for (reg_addr = LIS3MDL_CTRL_REG_1;
+       reg_addr <= LIS3MDL_CTRL_REG_5;
+       reg_addr++)
+    {
+      lis3mdl_read_register(priv, reg_addr, ®_content);
+      sninfo("R#%04x = %04x\n", reg_addr, reg_content);
+    }
+
+  lis3mdl_read_register(priv, LIS3MDL_STATUS_REG, ®_content);
+  sninfo("STATUS_REG = %04x\n", reg_content);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: lis3mdl_close
+ ****************************************************************************/
+
+static int lis3mdl_close(FAR struct file *filep)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct lis3mdl_dev_s *priv = inode->i_private;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Perform a reset */
+
+  lis3mdl_reset(priv);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: lis3mdl_read
+ ****************************************************************************/
+
+static ssize_t lis3mdl_read(FAR struct file *filep, FAR char *buffer,
+                            size_t buflen)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct lis3mdl_dev_s *priv = inode->i_private;
+  FAR struct lis3mdl_sensor_data_s *data;
+  int ret;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Check if enough memory was provided for the read call */
+
+  if (buflen < sizeof(FAR struct lis3mdl_sensor_data_s))
+    {
+      snerr("ERROR: Not enough memory for reading out a sensor data sample\n");
+      return -ENOSYS;
+    }
+
+  /* Aquire the semaphore before the data is copied */
+
+  ret = sem_wait(&priv->datasem);
+  if (ret < 0)
+    {
+      int errcode = errno;
+      snerr("ERROR: Could not aquire priv->datasem: %d\n", errcode);
+      return -errcode;
+    }
+
+  /* Copy the sensor data into the buffer */
+
+  data = (FAR struct lis3mdl_sensor_data_s *)buffer;
+  memset(data, 0, sizeof(FAR struct lis3mdl_sensor_data_s));
+
+  data->x_mag = priv->data.x_mag;
+  data->y_mag = priv->data.y_mag;
+  data->z_mag = priv->data.z_mag;
+  data->temperature = priv->data.temperature;
+
+  /* Give back the semaphore */
+
+  sem_post(&priv->datasem);
+
+  return sizeof(FAR struct lis3mdl_sensor_data_s);
+}
+
+/****************************************************************************
+ * Name: lis3mdl_write
+ ****************************************************************************/
+
+static ssize_t lis3mdl_write(FAR struct file *filep, FAR const char *buffer,
+                             size_t buflen)
+{
+  return -ENOSYS;
+}
+
+/****************************************************************************
+ * Name: lis3mdl_ioctl
+ ****************************************************************************/
+
+static int lis3mdl_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
+{
+  int ret = OK;
+
+  switch (cmd)
+    {
+      /* Command was not recognized */
+
+    default:
+      snerr("ERROR: Unrecognized cmd: %d\n", cmd);
+      ret = -ENOTTY;
+      break;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lis3mdl_register
+ *
+ * Description:
+ *   Register the LIS3MDL character device as 'devpath'
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/mag0"
+ *   spi     - An instance of the SPI interface to use to communicate with
+ *             LIS3MDL
+ *   config  - configuration for the LIS3MDL driver. For details see
+ *             description above.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int lis3mdl_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
+                     FAR struct lis3mdl_config_s const *config)
+{
+  FAR struct lis3mdl_dev_s *priv;
+  int ret;
+
+  /* Sanity check */
+
+  DEBUGASSERT(spi != NULL);
+  DEBUGASSERT(config != NULL);
+
+  /* Initialize the LIS3MDL device structure */
+
+  priv = (FAR struct lis3mdl_dev_s *)kmm_malloc(sizeof(struct lis3mdl_dev_s));
+  if (priv == NULL)
+    {
+      snerr("ERROR: Failed to allocate instance\n");
+      return -ENOMEM;
+    }
+
+  priv->spi = spi;
+  priv->config = config;
+
+  priv->work.worker = NULL;
+
+  sem_init(&priv->datasem, 0, 1);       /* Initialize sensor data access
+                                         * semaphore */
+
+  /* Setup SPI frequency and mode */
+
+  SPI_SETFREQUENCY(spi, LIS3MDL_SPI_FREQUENCY);
+  SPI_SETMODE(spi, LIS3MDL_SPI_MODE);
+
+  /* Attach the interrupt handler */
+
+  ret = priv->config->attach(priv->config, &lis3mdl_interrupt_handler);
+  if (ret < 0)
+    {
+      snerr("ERROR: Failed to attach interrupt\n");
+      return -ENODEV;
+    }
+
+  /* Register the character driver */
+
+  ret = register_driver(devpath, &g_lis3mdl_fops, 0666, priv);
+  if (ret < 0)
+    {
+      snerr("ERROR: Failed to register driver: %d\n", ret);
+      kmm_free(priv);
+      sem_destroy(&priv->datasem);
+      return -ENODEV;
+    }
+
+  /* Since we support multiple LIS3MDL devices are supported, we will need to
+   * add this new instance to a list of device instances so that it can be
+   * found by the interrupt handler based on the received IRQ number. */
+
+  priv->flink    = g_lis3mdl_list;
+  g_lis3mdl_list = priv;
+
+  return OK;
+}
+
+#endif /* CONFIG_SPI && CONFIG_LIS3MDL */
diff --git a/drivers/sensors/lm75.c b/drivers/sensors/lm75.c
index f3fad7397216bd2fcce82d646d6802eb55dd5024..ce9445558b64ff19556891d07a10e2b41304b436 100644
--- a/drivers/sensors/lm75.c
+++ b/drivers/sensors/lm75.c
@@ -195,7 +195,7 @@ static int lm75_readb16(FAR struct lm75_dev_s *priv, uint8_t regaddr,
   ret = lm75_i2c_write(priv, ®addr, 1);
   if (ret < 0)
     {
-      sndbg("i2c_write failed: %d\n", ret);
+      snerr("ERROR: i2c_write failed: %d\n", ret);
       return ret;
     }
 
@@ -204,7 +204,7 @@ static int lm75_readb16(FAR struct lm75_dev_s *priv, uint8_t regaddr,
   ret = lm75_i2c_read(priv, buffer, 2);
   if (ret < 0)
     {
-      sndbg("i2c_read failed: %d\n", ret);
+      snerr("ERROR: i2c_read failed: %d\n", ret);
       return ret;
     }
 
@@ -214,7 +214,7 @@ static int lm75_readb16(FAR struct lm75_dev_s *priv, uint8_t regaddr,
    */
 
   *regvalue = b8tob16((b8_t)buffer[0] << 8 | (b8_t)buffer[1]);
-  sndbg("addr: %02x value: %08x ret: %d\n", regaddr, *regvalue, ret);
+  sninfo("addr: %02x value: %08x ret: %d\n", regaddr, *regvalue, ret);
   return OK;
 }
 
@@ -232,7 +232,7 @@ static int lm75_writeb16(FAR struct lm75_dev_s *priv, uint8_t regaddr,
   uint8_t buffer[3];
   b8_t regb8;
 
-  sndbg("addr: %02x value: %08x\n", regaddr, regval);
+  sninfo("addr: %02x value: %08x\n", regaddr, regval);
 
   /* Set up a 3 byte message to send */
 
@@ -265,11 +265,11 @@ static int lm75_readtemp(FAR struct lm75_dev_s *priv, FAR b16_t *temp)
   ret = lm75_readb16(priv, LM75_TEMP_REG, &temp16);
   if (ret < 0)
     {
-      sndbg("lm75_readb16 failed: %d\n", ret);
+      snerr("ERROR: lm75_readb16 failed: %d\n", ret);
       return ret;
     }
 
-  sndbg("Centigrade: %08x\n", temp16);
+  sninfo("Centigrade: %08x\n", temp16);
 
   /* Was fahrenheit requested? */
 
@@ -278,7 +278,7 @@ static int lm75_readtemp(FAR struct lm75_dev_s *priv, FAR b16_t *temp)
       /* Centigrade to Fahrenheit conversion:  F = 9*C/5 + 32 */
 
       temp16 =  b16mulb16(temp16, B16_9DIV5) + B16_32;
-      sndbg("Fahrenheit: %08x\n", temp16);
+      sninfo("Fahrenheit: %08x\n", temp16);
     }
 
   *temp = temp16;
@@ -305,14 +305,14 @@ static int lm75_readconf(FAR struct lm75_dev_s *priv, FAR uint8_t *conf)
   ret = lm75_i2c_write(priv, &buffer, 1);
   if (ret < 0)
     {
-      sndbg("i2c_write failed: %d\n", ret);
+      snerr("ERROR: i2c_write failed: %d\n", ret);
       return ret;
     }
 
   /* Restart and read 8-bits from the register */
 
   ret = lm75_i2c_read(priv, conf, 1);
-  sndbg("conf: %02x ret: %d\n", *conf, ret);
+  sninfo("conf: %02x ret: %d\n", *conf, ret);
   return ret;
 }
 
@@ -328,7 +328,7 @@ static int lm75_writeconf(FAR struct lm75_dev_s *priv, uint8_t conf)
 {
   uint8_t buffer[2];
 
-  sndbg("conf: %02x\n", conf);
+  sninfo("conf: %02x\n", conf);
 
   /* Set up a 2 byte message to send */
 
@@ -384,7 +384,7 @@ static ssize_t lm75_read(FAR struct file *filep, FAR char *buffer, size_t buflen
   nsamples = buflen / sizeof(b16_t);
   ptr      = (FAR b16_t *)buffer;
 
-  sndbg("buflen: %d nsamples: %d\n", buflen, nsamples);
+  sninfo("buflen: %d nsamples: %d\n", buflen, nsamples);
 
   /* Get the requested number of samples */
 
@@ -397,7 +397,7 @@ static ssize_t lm75_read(FAR struct file *filep, FAR char *buffer, size_t buflen
       ret = lm75_readtemp(priv, &temp);
       if (ret < 0)
         {
-          sndbg("lm75_readtemp failed: %d\n", ret);
+          snerr("ERROR: lm75_readtemp failed: %d\n", ret);
           return (ssize_t)ret;
         }
 
@@ -438,7 +438,7 @@ static int lm75_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
           FAR uint8_t *ptr = (FAR uint8_t *)((uintptr_t)arg);
           DEBUGASSERT(ptr != NULL);
           ret = lm75_readconf(priv, ptr);
-          sndbg("conf: %02x ret: %d\n", *ptr, ret);
+          sninfo("conf: %02x ret: %d\n", *ptr, ret);
         }
         break;
 
@@ -446,7 +446,7 @@ static int lm75_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case SNIOC_WRITECONF:
         ret = lm75_writeconf(priv, (uint8_t)arg);
-        sndbg("conf: %02x ret: %d\n", *(FAR uint8_t *)arg, ret);
+        sninfo("conf: %02x ret: %d\n", *(FAR uint8_t *)arg, ret);
         break;
 
       /* Shutdown the LM75, Arg: None */
@@ -460,7 +460,7 @@ static int lm75_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
               ret = lm75_writeconf(priv, conf | LM75_CONF_SHUTDOWN);
             }
 
-          sndbg("conf: %02x ret: %d\n", conf | LM75_CONF_SHUTDOWN, ret);
+          sninfo("conf: %02x ret: %d\n", conf | LM75_CONF_SHUTDOWN, ret);
         }
         break;
 
@@ -475,7 +475,7 @@ static int lm75_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
               ret = lm75_writeconf(priv, conf & ~LM75_CONF_SHUTDOWN);
             }
 
-          sndbg("conf: %02x ret: %d\n", conf & ~LM75_CONF_SHUTDOWN, ret);
+          sninfo("conf: %02x ret: %d\n", conf & ~LM75_CONF_SHUTDOWN, ret);
         }
         break;
 
@@ -483,14 +483,14 @@ static int lm75_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case SNIOC_FAHRENHEIT:
         priv->fahrenheit = true;
-        sndbg("Fahrenheit\n");
+        sninfo("Fahrenheit\n");
         break;
 
       /* Report Samples in Centigrade */
 
       case SNIOC_CENTIGRADE:
         priv->fahrenheit = false;
-        sndbg("Centigrade\n");
+        sninfo("Centigrade\n");
         break;
 
       /* Read THYS temperature register.  Arg: b16_t* pointer */
@@ -500,7 +500,7 @@ static int lm75_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
           FAR b16_t *ptr = (FAR b16_t *)((uintptr_t)arg);
           DEBUGASSERT(ptr != NULL);
           ret = lm75_readb16(priv, LM75_THYS_REG, ptr);
-          sndbg("THYS: %08x ret: %d\n", *ptr, ret);
+          sninfo("THYS: %08x ret: %d\n", *ptr, ret);
         }
         break;
 
@@ -508,7 +508,7 @@ static int lm75_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case SNIOC_WRITETHYS:
         ret = lm75_writeb16(priv, LM75_THYS_REG, (b16_t)arg);
-        sndbg("THYS: %08x ret: %d\n", (b16_t)arg, ret);
+        sninfo("THYS: %08x ret: %d\n", (b16_t)arg, ret);
         break;
 
       /* Read TOS (Over-temp Shutdown Threshold) Register. Arg: b16_t* pointer */
@@ -518,7 +518,7 @@ static int lm75_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
           FAR b16_t *ptr = (FAR b16_t *)((uintptr_t)arg);
           DEBUGASSERT(ptr != NULL);
           ret = lm75_readb16(priv, LM75_TOS_REG, ptr);
-          sndbg("TOS: %08x ret: %d\n", *ptr, ret);
+          sninfo("TOS: %08x ret: %d\n", *ptr, ret);
         }
         break;
 
@@ -526,11 +526,11 @@ static int lm75_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case SNIOC_WRITETOS:
         ret = lm75_writeb16(priv, LM75_TOS_REG, (b16_t)arg);
-        sndbg("TOS: %08x ret: %d\n", (b16_t)arg, ret);
+        sninfo("TOS: %08x ret: %d\n", (b16_t)arg, ret);
         break;
 
       default:
-        sndbg("Unrecognized cmd: %d\n", cmd);
+        sninfo("Unrecognized cmd: %d\n", cmd);
         ret = -ENOTTY;
         break;
     }
@@ -578,7 +578,7 @@ int lm75_register(FAR const char *devpath, FAR struct i2c_master_s *i2c, uint8_t
   priv = (FAR struct lm75_dev_s *)kmm_malloc(sizeof(struct lm75_dev_s));
   if (priv == NULL)
     {
-      sndbg("Failed to allocate instance\n");
+      snerr("ERROR: Failed to allocate instance\n");
       return -ENOMEM;
     }
 
@@ -591,7 +591,7 @@ int lm75_register(FAR const char *devpath, FAR struct i2c_master_s *i2c, uint8_t
   ret = register_driver(devpath, &g_lm75fops, 0666, priv);
   if (ret < 0)
     {
-      sndbg("Failed to register driver: %d\n", ret);
+      snerr("ERROR: Failed to register driver: %d\n", ret);
       kmm_free(priv);
     }
 
diff --git a/drivers/sensors/lm92.c b/drivers/sensors/lm92.c
index 73f4d54634ebc61322af6d7a98966d042cf27f3b..c801e6633c79c7390f09f39eac2b928505cb546f 100644
--- a/drivers/sensors/lm92.c
+++ b/drivers/sensors/lm92.c
@@ -198,7 +198,7 @@ static int lm92_readb16(FAR struct lm92_dev_s *priv, uint8_t regaddr,
   ret = lm92_i2c_write(priv, ®addr, 1);
   if (ret < 0)
     {
-      sndbg("i2c_write failed: %d\n", ret);
+      snerr("ERROR: i2c_write failed: %d\n", ret);
       return ret;
     }
 
@@ -207,7 +207,7 @@ static int lm92_readb16(FAR struct lm92_dev_s *priv, uint8_t regaddr,
   ret = lm92_i2c_read(priv, buffer, 2);
   if (ret < 0)
     {
-      sndbg("i2c_read failed: %d\n", ret);
+      snerr("ERROR: i2c_read failed: %d\n", ret);
       return ret;
     }
 
@@ -218,7 +218,7 @@ static int lm92_readb16(FAR struct lm92_dev_s *priv, uint8_t regaddr,
   *regvalue = (b16_t)((uint32_t)(buffer[0] & (1 << 7)) << 24 |
                       (uint32_t)(buffer[0] & ~(1 << 7)) << 17 |
                       (uint32_t)(buffer[1] & ~7) << 9);
-  sndbg("addr: %02x value: %08x ret: %d\n", regaddr, *regvalue, ret);
+  sninfo("addr: %02x value: %08x ret: %d\n", regaddr, *regvalue, ret);
   return OK;
 }
 
@@ -236,7 +236,7 @@ static int lm92_writeb16(FAR struct lm92_dev_s *priv, uint8_t regaddr,
 {
   uint8_t buffer[3];
 
-  sndbg("addr: %02x value: %08x\n", regaddr, regval);
+  sninfo("addr: %02x value: %08x\n", regaddr, regval);
 
   /* Set up a 3-byte message to send */
 
@@ -268,11 +268,11 @@ static int lm92_readtemp(FAR struct lm92_dev_s *priv, FAR b16_t *temp)
   ret = lm92_readb16(priv, LM92_TEMP_REG, &temp16);
   if (ret < 0)
     {
-      sndbg("lm92_readb16 failed: %d\n", ret);
+      snerr("ERROR: lm92_readb16 failed: %d\n", ret);
       return ret;
     }
 
-  sndbg("Centigrade: %08x\n", temp16);
+  sninfo("Centigrade: %08x\n", temp16);
 
   /* Was Fahrenheit requested? */
 
@@ -281,7 +281,7 @@ static int lm92_readtemp(FAR struct lm92_dev_s *priv, FAR b16_t *temp)
       /* Centigrade to Fahrenheit conversion:  F = 9*C/5 + 32 */
 
       temp16 = b16mulb16(temp16, B16_9DIV5) + B16_32;
-      sndbg("Fahrenheit: %08x\n", temp16);
+      sninfo("Fahrenheit: %08x\n", temp16);
     }
 
   *temp = temp16;
@@ -308,14 +308,14 @@ static int lm92_readconf(FAR struct lm92_dev_s *priv, FAR uint8_t *conf)
   ret = lm92_i2c_write(priv, &buffer, 1);
   if (ret < 0)
     {
-      sndbg("i2c_write failed: %d\n", ret);
+      snerr("ERROR: i2c_write failed: %d\n", ret);
       return ret;
     }
 
   /* Restart and read 8 bits from the register */
 
   ret = lm92_i2c_read(priv, conf, 1);
-  sndbg("conf: %02x ret: %d\n", *conf, ret);
+  sninfo("conf: %02x ret: %d\n", *conf, ret);
   return ret;
 }
 
@@ -331,7 +331,7 @@ static int lm92_writeconf(FAR struct lm92_dev_s *priv, uint8_t conf)
 {
   uint8_t buffer[2];
 
-  sndbg("conf: %02x\n", conf);
+  sninfo("conf: %02x\n", conf);
 
   /* Set up a 2-byte message to send */
 
@@ -364,7 +364,7 @@ static int lm92_readid(FAR struct lm92_dev_s *priv, FAR uint16_t *id)
   ret = lm92_i2c_write(priv, ®addr, 1);
   if (ret < 0)
     {
-      sndbg("i2c_write failed: %d\n", ret);
+      snerr("ERROR: i2c_write failed: %d\n", ret);
       return ret;
     }
 
@@ -373,12 +373,12 @@ static int lm92_readid(FAR struct lm92_dev_s *priv, FAR uint16_t *id)
   ret = lm92_i2c_read(priv, buffer, 2);
   if (ret < 0)
     {
-      sndbg("i2c_read failed: %d\n", ret);
+      snerr("ERROR: i2c_read failed: %d\n", ret);
       return ret;
     }
 
   *id = (uint16_t)buffer[0] << 8 | (uint16_t)buffer[1];
-  sndbg("id: %04x ret: %d\n", *id, ret);
+  sninfo("id: %04x ret: %d\n", *id, ret);
   return OK;
 }
 
@@ -427,7 +427,7 @@ static ssize_t lm92_read(FAR struct file *filep, FAR char *buffer,
   nsamples = buflen / sizeof(b16_t);
   ptr      = (FAR b16_t *)buffer;
 
-  sndbg("buflen: %d nsamples: %d\n", buflen, nsamples);
+  sninfo("buflen: %d nsamples: %d\n", buflen, nsamples);
 
   /* Get the requested number of samples */
 
@@ -440,7 +440,7 @@ static ssize_t lm92_read(FAR struct file *filep, FAR char *buffer,
       ret = lm92_readtemp(priv, &temp);
       if (ret < 0)
         {
-          sndbg("lm92_readtemp failed: %d\n", ret);
+          snerr("ERROR: lm92_readtemp failed: %d\n", ret);
           return (ssize_t)ret;
         }
 
@@ -481,7 +481,7 @@ static int lm92_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
           FAR uint8_t *ptr = (FAR uint8_t *)((uintptr_t)arg);
           DEBUGASSERT(ptr != NULL);
           ret = lm92_readconf(priv, ptr);
-          sndbg("conf: %02x ret: %d\n", *ptr, ret);
+          sninfo("conf: %02x ret: %d\n", *ptr, ret);
         }
         break;
 
@@ -489,7 +489,7 @@ static int lm92_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case SNIOC_WRITECONF:
         ret = lm92_writeconf(priv, (uint8_t)arg);
-        sndbg("conf: %02x ret: %d\n", *(uint8_t *)arg, ret);
+        sninfo("conf: %02x ret: %d\n", *(uint8_t *)arg, ret);
         break;
 
       /* Shutdown the LM92.  Arg:  None */
@@ -503,7 +503,7 @@ static int lm92_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
               ret = lm92_writeconf(priv, conf | LM92_CONF_SHUTDOWN);
             }
 
-          sndbg("conf: %02x ret: %d\n", conf | LM92_CONF_SHUTDOWN, ret);
+          sninfo("conf: %02x ret: %d\n", conf | LM92_CONF_SHUTDOWN, ret);
         }
         break;
 
@@ -518,7 +518,7 @@ static int lm92_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
               ret = lm92_writeconf(priv, conf & ~LM92_CONF_SHUTDOWN);
             }
 
-          sndbg("conf: %02x ret: %d\n", conf & ~LM92_CONF_SHUTDOWN, ret);
+          sninfo("conf: %02x ret: %d\n", conf & ~LM92_CONF_SHUTDOWN, ret);
         }
         break;
 
@@ -526,14 +526,14 @@ static int lm92_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case SNIOC_FAHRENHEIT:
         priv->fahrenheit = true;
-        sndbg("Fahrenheit\n");
+        sninfo("Fahrenheit\n");
         break;
 
       /* Report samples in Centigrade.  Arg: None */
 
       case SNIOC_CENTIGRADE:
         priv->fahrenheit = false;
-        sndbg("Centigrade\n");
+        sninfo("Centigrade\n");
         break;
 
       /* Read THYS temperature register.  Arg: b16_t* pointer */
@@ -543,7 +543,7 @@ static int lm92_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
           FAR b16_t *ptr = (FAR b16_t *)((uintptr_t)arg);
           DEBUGASSERT(ptr != NULL);
           ret = lm92_readb16(priv, LM92_THYS_REG, ptr);
-          sndbg("THYS: %08x ret: %d\n", *ptr, ret);
+          sninfo("THYS: %08x ret: %d\n", *ptr, ret);
         }
         break;
 
@@ -551,7 +551,7 @@ static int lm92_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case SNIOC_WRITETHYS:
         ret = lm92_writeb16(priv, LM92_THYS_REG, (b16_t)arg);
-        sndbg("THYS: %08x ret: %d\n", (b16_t)arg, ret);
+        sninfo("THYS: %08x ret: %d\n", (b16_t)arg, ret);
         break;
 
       /* Read TCRIT temperature register.  Arg: b16_t* pointer */
@@ -561,7 +561,7 @@ static int lm92_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
           FAR b16_t *ptr = (FAR b16_t *)((uintptr_t)arg);
           DEBUGASSERT(ptr != NULL);
           ret = lm92_readb16(priv, LM92_TCRIT_REG, ptr);
-          sndbg("TCRIT: %08x ret: %d\n", *ptr, ret);
+          sninfo("TCRIT: %08x ret: %d\n", *ptr, ret);
         }
         break;
 
@@ -569,7 +569,7 @@ static int lm92_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case SNIOC_WRITETCRIT:
         ret = lm92_writeb16(priv, LM92_TCRIT_REG, (b16_t)arg);
-        sndbg("TCRIT: %08x ret: %d\n", (b16_t)arg, ret);
+        sninfo("TCRIT: %08x ret: %d\n", (b16_t)arg, ret);
         break;
 
       /* Read TLOW temperature register.  Arg: b16_t* pointer */
@@ -579,7 +579,7 @@ static int lm92_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
           FAR b16_t *ptr = (FAR b16_t *)((uintptr_t)arg);
           DEBUGASSERT(ptr != NULL);
           ret = lm92_readb16(priv, LM92_TLOW_REG, ptr);
-          sndbg("TLOW: %08x ret: %d\n", *ptr, ret);
+          sninfo("TLOW: %08x ret: %d\n", *ptr, ret);
         }
         break;
 
@@ -587,7 +587,7 @@ static int lm92_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case SNIOC_WRITETLOW:
         ret = lm92_writeb16(priv, LM92_TLOW_REG, (b16_t)arg);
-        sndbg("TLOW: %08x ret: %d\n", (b16_t)arg, ret);
+        sninfo("TLOW: %08x ret: %d\n", (b16_t)arg, ret);
         break;
 
       /* Read THIGH temperature register.  Arg: b16_t* pointer */
@@ -597,7 +597,7 @@ static int lm92_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
           FAR b16_t *ptr = (FAR b16_t *)((uintptr_t)arg);
           DEBUGASSERT(ptr != NULL);
           ret = lm92_readb16(priv, LM92_THIGH_REG, ptr);
-          sndbg("THIGH: %08x ret: %d\n", *ptr, ret);
+          sninfo("THIGH: %08x ret: %d\n", *ptr, ret);
         }
         break;
 
@@ -605,7 +605,7 @@ static int lm92_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case SNIOC_WRITETHIGH:
         ret = lm92_writeb16(priv, LM92_THIGH_REG, (b16_t)arg);
-        sndbg("THIGH: %08x ret: %d\n", (b16_t)arg, ret);
+        sninfo("THIGH: %08x ret: %d\n", (b16_t)arg, ret);
         break;
 
       /* Read from the identification register.  Arg: uint16_t* pointer */
@@ -615,12 +615,12 @@ static int lm92_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
           FAR uint16_t *ptr = (FAR uint16_t *)((uintptr_t)arg);
           DEBUGASSERT(ptr != NULL);
           ret = lm92_readid(priv, ptr);
-          sndbg("id: %04x ret: %d\n", *ptr, ret);
+          sninfo("id: %04x ret: %d\n", *ptr, ret);
         }
         break;
 
       default:
-        sndbg("Unrecognized cmd: %d\n", cmd);
+        snerr("ERROR: Unrecognized cmd: %d\n", cmd);
         ret = -ENOTTY;
         break;
     }
@@ -668,7 +668,7 @@ int lm92_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
   priv = (FAR struct lm92_dev_s *)kmm_malloc(sizeof(struct lm92_dev_s));
   if (priv == NULL)
     {
-      sndbg("Failed to allocate instance\n");
+      snerr("ERROR: Failed to allocate instance\n");
       return -ENOMEM;
     }
 
@@ -681,7 +681,7 @@ int lm92_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
   ret = register_driver(devpath, &g_lm92fops, 0666, priv);
   if (ret < 0)
     {
-      sndbg("Failed to register driver: %d\n", ret);
+      snerr("ERROR: Failed to register driver: %d\n", ret);
       kmm_free(priv);
     }
 
diff --git a/drivers/sensors/lsm9ds1.c b/drivers/sensors/lsm9ds1.c
index 10f902aeaadb90ddfd7e9b6d010971d923b8b894..ae69bd68c7eb3c42724f045ba3357545ef172302 100644
--- a/drivers/sensors/lsm9ds1.c
+++ b/drivers/sensors/lsm9ds1.c
@@ -660,7 +660,7 @@ static int lsm9ds1_readreg8(FAR struct lsm9ds1_dev_s *priv, uint8_t regaddr,
   ret = i2c_write(priv->i2c, &config, ®addr, sizeof(regaddr));
   if (ret < 0)
     {
-      sndbg("i2c_write failed: %d\n", ret);
+      snerr("ERROR: i2c_write failed: %d\n", ret);
       return ret;
     }
 
@@ -669,11 +669,11 @@ static int lsm9ds1_readreg8(FAR struct lsm9ds1_dev_s *priv, uint8_t regaddr,
   ret = i2c_read(priv->i2c, &config, regval, sizeof(*regval));
   if (ret < 0)
     {
-      sndbg("i2c_read failed: %d\n", ret);
+      snerr("ERROR: i2c_read failed: %d\n", ret);
       return ret;
     }
 
-  snvdbg("addr: %02x value: %02x\n", regaddr, *regval);
+  sninfo("addr: %02x value: %02x\n", regaddr, *regval);
   return OK;
 }
 
@@ -712,11 +712,11 @@ static int lsm9ds1_writereg8(FAR struct lsm9ds1_dev_s *priv, uint8_t regaddr,
   ret = i2c_write(priv->i2c, &config, buffer, sizeof(buffer));
   if (ret < 0)
     {
-      sndbg("i2c_write failed: %d\n", ret);
+      snerr("ERROR: i2c_write failed: %d\n", ret);
       return ret;
     }
 
-  snvdbg("addr: %02x value: %02x\n", regaddr, regval);
+  sninfo("addr: %02x value: %02x\n", regaddr, regval);
   return OK;
 }
 
@@ -741,7 +741,7 @@ static int lsm9ds1_modifyreg8(FAR struct lsm9ds1_dev_s *priv, uint8_t regaddr,
   ret = lsm9ds1_readreg8(priv, regaddr, ®val);
   if (ret < 0)
     {
-      sndbg("lsm9ds1_readreg8 failed: %d\n", ret);
+      snerr("ERROR: lsm9ds1_readreg8 failed: %d\n", ret);
       return ret;
     }
 
@@ -751,7 +751,7 @@ static int lsm9ds1_modifyreg8(FAR struct lsm9ds1_dev_s *priv, uint8_t regaddr,
   ret = lsm9ds1_writereg8(priv, regaddr, regval);
   if (ret < 0)
     {
-      sndbg("lsm9ds1_writereg8 failed: %d\n", ret);
+      snerr("ERROR: lsm9ds1_writereg8 failed: %d\n", ret);
       return ret;
     }
 
@@ -793,13 +793,13 @@ static int lsm9ds1accelgyro_config(FAR struct lsm9ds1_dev_s *priv)
   ret = lsm9ds1_readreg8(priv, LSM9DS1_WHO_AM_I, ®val);
   if (ret < 0)
     {
-      sndbg("lsm9ds1_readreg8 failed: %d\n", ret);
+      snerr("ERROR: lsm9ds1_readreg8 failed: %d\n", ret);
       return ret;
     }
 
   if (regval != LSM9DS1_WHO_AM_I_VALUE)
     {
-      sndbg("Invalid device identification %02x\n", regval);
+      snerr("ERROR: Invalid device identification %02x\n", regval);
       return -ENODEV;
     }
 
@@ -1047,13 +1047,13 @@ static int lsm9ds1mag_config(FAR struct lsm9ds1_dev_s *priv)
   ret = lsm9ds1_readreg8(priv, LSM9DS1_WHO_AM_I_M, ®val);
   if (ret < 0)
     {
-      sndbg("lsm9ds1_readreg8 failed: %d\n", ret);
+      snerr("ERROR: lsm9ds1_readreg8 failed: %d\n", ret);
       return ret;
     }
 
   if (regval != LSM9DS1_WHO_AM_I_M_VALUE)
     {
-      sndbg("Invalid device identification %02x\n", regval);
+      snerr("ERROR: Invalid device identification %02x\n", regval);
       return -ENODEV;
     }
 
@@ -1280,7 +1280,7 @@ static ssize_t lsm9ds1_read(FAR struct file *filep, FAR char *buffer,
           ret = lsm9ds1_readreg8(priv, regaddr, &lo);
           if (ret < 0)
             {
-              sndbg("lsm9ds1_readreg8 failed: %d\n", ret);
+              snerr("ERROR: lsm9ds1_readreg8 failed: %d\n", ret);
               return (ssize_t)ret;
             }
 
@@ -1291,7 +1291,7 @@ static ssize_t lsm9ds1_read(FAR struct file *filep, FAR char *buffer,
           ret = lsm9ds1_readreg8(priv, regaddr, &hi);
           if (ret < 0)
             {
-              sndbg("lsm9ds1_readreg8 failed: %d\n", ret);
+              snerr("ERROR: lsm9ds1_readreg8 failed: %d\n", ret);
               return (ssize_t)ret;
             }
 
@@ -1390,20 +1390,20 @@ static int lsm9ds1_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case SNIOC_SETSAMPLERATE:
         ret = priv->ops->setsamplerate(priv, (uint32_t)arg);
-        sndbg("sample rate: %08x ret: %d\n", (uint32_t)arg, ret);
+        sninfo("sample rate: %08x ret: %d\n", (uint32_t)arg, ret);
         break;
 
       /* Set the full-scale range. Arg: uint32_t value. */
 
       case SNIOC_SETFULLSCALE:
         ret = priv->ops->setfullscale(priv, (uint32_t)arg);
-        sndbg("full-scale range: %08x ret: %d\n", (uint32_t)arg, ret);
+        sninfo("full-scale range: %08x ret: %d\n", (uint32_t)arg, ret);
         break;
 
       /* Unrecognized commands */
 
       default:
-        sndbg("Unrecognized cmd: %d arg: %lu\n", cmd, arg);
+        snerr("ERROR: Unrecognized cmd: %d arg: %lu\n", cmd, arg);
         ret = -ENOTTY;
         break;
     }
@@ -1453,7 +1453,7 @@ static int lsm9ds1_register(FAR const char *devpath,
   priv = (FAR struct lsm9ds1_dev_s *)kmm_malloc(sizeof(*priv));
   if (priv == NULL)
     {
-      sndbg("Failed to allocate instance\n");
+      snerr("ERROR: Failed to allocate instance\n");
       return -ENOMEM;
     }
 
@@ -1468,7 +1468,7 @@ static int lsm9ds1_register(FAR const char *devpath,
   ret = priv->ops->config(priv);
   if (ret < 0)
     {
-      sndbg("Failed to configure device: %d\n", ret);
+      snerr("ERROR: Failed to configure device: %d\n", ret);
       kmm_free(priv);
       return ret;
     }
@@ -1478,7 +1478,7 @@ static int lsm9ds1_register(FAR const char *devpath,
   ret = register_driver(devpath, &g_fops, 0666, priv);
   if (ret < 0)
     {
-      sndbg("Failed to register driver: %d\n", ret);
+      snerr("ERROR: Failed to register driver: %d\n", ret);
       kmm_free(priv);
       return ret;
     }
diff --git a/drivers/sensors/max31855.c b/drivers/sensors/max31855.c
index d3e5b8e8f6ed96b77af88be3dcac5dc5fc7578ea..19800a1c598399e2d1c4beeca90344a0ea70a9c6 100644
--- a/drivers/sensors/max31855.c
+++ b/drivers/sensors/max31855.c
@@ -189,13 +189,13 @@ static ssize_t max31855_read(FAR struct file *filep, FAR char *buffer, size_t bu
 
   if (!buffer)
     {
-      sndbg("Buffer is null\n");
+      snerr("ERROR: Buffer is null\n");
       return -EINVAL;
     }
 
   if (buflen != 2)
     {
-      sndbg("You can't read something other than 16 bits (2 bytes)\n");
+      snerr("ERROR: You can't read something other than 16 bits (2 bytes)\n");
       return -EINVAL;
     }
 
@@ -218,7 +218,7 @@ static ssize_t max31855_read(FAR struct file *filep, FAR char *buffer, size_t bu
   regval |= (regmsb & 0xFF00) << 8;
   regval |= (regmsb & 0xFF) << 24;
 
-  sndbg("Read from MAX31855 = 0x%08X\n", regval);
+  sninfo("Read from MAX31855 = 0x%08X\n", regval);
 
   /* If negative, fix signal bits */
 
@@ -235,21 +235,21 @@ static ssize_t max31855_read(FAR struct file *filep, FAR char *buffer, size_t bu
 
   if (regval & MAX31855_FAULT)
     {
-      sndbg("Error: A fault was detected by MAX31855:\n");
+      snerr("ERROR: A fault was detected by MAX31855:\n");
 
       if (regval & MAX31855_SHORT_VCC)
         {
-          sndbg("The thermocouple input is shorted to VCC!\n");
+          snerr("  The thermocouple input is shorted to VCC!\n");
         }
 
       if (regval & MAX31855_SHORT_GND)
         {
-          sndbg("The thermocouple input is shorted to GND!\n");
+          snerr("  The thermocouple input is shorted to GND!\n");
         }
 
       if (regval & MAX31855_OPEN_CIRCUIT)
         {
-          sndbg("The thermocouple input is not connected!\n");
+          snerr("  The thermocouple input is not connected!\n");
         }
 
       ret = -EINVAL;
@@ -308,7 +308,7 @@ int max31855_register(FAR const char *devpath, FAR struct spi_dev_s *spi)
   priv = (FAR struct max31855_dev_s *)kmm_malloc(sizeof(struct max31855_dev_s));
   if (priv == NULL)
     {
-      sndbg("Failed to allocate instance\n");
+      snerr("ERROR: Failed to allocate instance\n");
       return -ENOMEM;
     }
 
@@ -320,7 +320,7 @@ int max31855_register(FAR const char *devpath, FAR struct spi_dev_s *spi)
   ret = register_driver(devpath, &g_max31855fops, 0666, priv);
   if (ret < 0)
     {
-      sndbg("Failed to register driver: %d\n", ret);
+      snerr("ERROR: Failed to register driver: %d\n", ret);
       kmm_free(priv);
     }
 
diff --git a/drivers/sensors/max6675.c b/drivers/sensors/max6675.c
index 329f5185c5cbbf57293b076b0c31c262a4914ce5..0d205a049b8621f52340c06bd67ee3294d5ea693 100644
--- a/drivers/sensors/max6675.c
+++ b/drivers/sensors/max6675.c
@@ -80,8 +80,8 @@ struct max6675_dev_s
  * Private Function Prototypes
  ****************************************************************************/
 
-static void    max6675_lock(FAR struct spi_dev_s *spi)
-static void    max6675_unlock(FAR struct spi_dev_s *spi)
+static void    max6675_lock(FAR struct spi_dev_s *spi);
+static void    max6675_unlock(FAR struct spi_dev_s *spi);
 
 /* Character driver methods */
 
@@ -185,13 +185,13 @@ static ssize_t max6675_read(FAR struct file *filep, FAR char *buffer, size_t buf
 
   if (!buffer)
     {
-      sndbg("Buffer is null\n");
+      snerr("ERROR: Buffer is null\n");
       return -EINVAL;
     }
 
   if (buflen != 2)
     {
-      sndbg("You can't read something other than 16 bits (2 bytes)\n");
+      snerr("ERROR: You can't read something other than 16 bits (2 bytes)\n");
       return -EINVAL;
     }
 
@@ -212,13 +212,13 @@ static ssize_t max6675_read(FAR struct file *filep, FAR char *buffer, size_t buf
   regval  = (regmsb & 0xFF00) >> 8;
   regval |= (regmsb & 0xFF) << 8;
 
-  sndbg("Read from MAX6675 = 0x%04X\n", regval);
+  sninfo("Read from MAX6675 = 0x%04X\n", regval);
 
   /* Verify if the device ID bit is really zero */
 
   if (regval & MAX6675_DEV_ID)
     {
-      sndbg("ERROR: The Device ID bit needs to be 0 !\n");
+      snerr("ERROR: The Device ID bit needs to be 0 !\n");
       ret = -EINVAL;
     }
 
@@ -226,7 +226,7 @@ static ssize_t max6675_read(FAR struct file *filep, FAR char *buffer, size_t buf
 
   if (regval & MAX6675_OPEN_CIRCUIT)
     {
-      sndbg("The thermocouple input is not connected!\n");
+      snerr("ERROR: The thermocouple input is not connected!\n");
       ret = -EINVAL;
     }
 
@@ -285,7 +285,7 @@ int max6675_register(FAR const char *devpath, FAR struct spi_dev_s *spi)
   priv = (FAR struct max6675_dev_s *)kmm_malloc(sizeof(struct max6675_dev_s));
   if (priv == NULL)
     {
-      sndbg("Failed to allocate instance\n");
+      snerr("ERROR: Failed to allocate instance\n");
       return -ENOMEM;
     }
 
@@ -297,7 +297,7 @@ int max6675_register(FAR const char *devpath, FAR struct spi_dev_s *spi)
   ret = register_driver(devpath, &g_max6675fops, 0666, priv);
   if (ret < 0)
     {
-      sndbg("Failed to register driver: %d\n", ret);
+      snerr("ERROR: Failed to register driver: %d\n", ret);
       kmm_free(priv);
     }
 
diff --git a/drivers/sensors/mb7040.c b/drivers/sensors/mb7040.c
index 4308b2f73e7c4acbe3401d8da3a0844370c8ea49..2bdaecee0ef583949d5cf458f58dc5ffc68f3127 100644
--- a/drivers/sensors/mb7040.c
+++ b/drivers/sensors/mb7040.c
@@ -131,7 +131,7 @@ static int mb7040_measurerange(FAR struct mb7040_dev_s *priv)
   uint8_t regaddr;
   int ret;
 
-  sndbg("addr: %02x\n", regaddr);
+  sninfo("addr: %02x\n", regaddr);
 
   /* Set up the I2C configuration */
 
@@ -146,7 +146,7 @@ static int mb7040_measurerange(FAR struct mb7040_dev_s *priv)
   ret = i2c_write(priv->i2c, &config, ®addr, sizeof(regaddr));
   if (ret < 0)
     {
-      sndbg("i2c_write failed: %d\n", ret);
+      snerr("ERROR: i2c_write failed: %d\n", ret);
     }
 
   return ret;
@@ -178,12 +178,12 @@ static int mb7040_readrange(FAR struct mb7040_dev_s *priv,
   ret = i2c_read(priv->i2c, &config, buffer, sizeof(buffer));
   if (ret < 0)
     {
-      sndbg("i2c_read failed: %d\n", ret);
+      snerr("ERROR: i2c_read failed: %d\n", ret);
       return ret;
     }
 
   *range = (uint16_t)buffer[0] << 8 | (uint16_t)buffer[1];
-  sndbg("range: %04x ret: %d\n", *range, ret);
+  sninfo("range: %04x ret: %d\n", *range, ret);
   return ret;
 }
 
@@ -201,7 +201,7 @@ static int mb7040_changeaddr(FAR struct mb7040_dev_s *priv, uint8_t addr)
   uint8_t buffer[3];
   int ret;
 
-  sndbg("new addr: %02x\n", addr);
+  sninfo("new addr: %02x\n", addr);
 
   /* Sanity check */
 
@@ -225,7 +225,7 @@ static int mb7040_changeaddr(FAR struct mb7040_dev_s *priv, uint8_t addr)
   ret = i2c_write(priv->i2c, &config, buffer, sizeof(buffer));
   if (ret < 0)
     {
-      sndbg("i2c_write failed: %d\n", ret);
+      snerr("ERROR: i2c_write failed: %d\n", ret);
       return ret;
     }
 
@@ -324,7 +324,8 @@ static int mb7040_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
             {
               *ptr = (int32_t)range;
             }
-          sndbg("range: %04x ret: %d\n", *ptr, ret);
+
+          sninfo("range: %04x ret: %d\n", *ptr, ret);
         }
         break;
 
@@ -332,13 +333,13 @@ static int mb7040_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case SNIOC_CHANGEADDR:
         ret = mb7040_changeaddr(priv, (uint8_t)arg);
-        sndbg("new addr: %02x ret: %d\n", *(uint8_t *)arg, ret);
+        sninfo("new addr: %02x ret: %d\n", *(uint8_t *)arg, ret);
         break;
 
       /* Unrecognized commands */
 
       default:
-        sndbg("Unrecognized cmd: %d arg: %ld\n", cmd, arg);
+        snerr("ERROR: Unrecognized cmd: %d arg: %ld\n", cmd, arg);
         ret = -ENOTTY;
         break;
     }
@@ -381,7 +382,7 @@ int mb7040_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
   priv = (FAR struct mb7040_dev_s *)kmm_malloc(sizeof(*priv));
   if (priv == NULL)
     {
-      sndbg("Failed to allocate instance\n");
+      snerr("ERROR: Failed to allocate instance\n");
       return -ENOMEM;
     }
 
@@ -393,7 +394,7 @@ int mb7040_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
   ret = register_driver(devpath, &g_fops, 0666, priv);
   if (ret < 0)
     {
-      sndbg("Failed to register driver: %d\n", ret);
+      snerr("ERROR: Failed to register driver: %d\n", ret);
       kmm_free(priv);
     }
 
diff --git a/drivers/sensors/mcp9844.c b/drivers/sensors/mcp9844.c
index c21e4155606ea97d70d3d5beef0d040118a465cd..77dcee773e8b274e771a80c9e5ccf5f85a382697 100644
--- a/drivers/sensors/mcp9844.c
+++ b/drivers/sensors/mcp9844.c
@@ -140,7 +140,7 @@ static int mcp9844_read_u16(FAR struct mcp9844_dev_s *priv,
   ret = i2c_write(priv->i2c, &config, ®addr, 1);
   if (ret < 0)
     {
-      sndbg ("i2c_write failed: %d\n", ret);
+      snerr ("i2c_write failed: %d\n", ret);
       return ret;
     }
 
@@ -149,7 +149,7 @@ static int mcp9844_read_u16(FAR struct mcp9844_dev_s *priv,
   ret = i2c_read(priv->i2c, &config, buffer, 2);
   if (ret < 0)
     {
-      sndbg ("i2c_read failed: %d\n", ret);
+      snerr ("i2c_read failed: %d\n", ret);
       return ret;
     }
 
@@ -157,7 +157,7 @@ static int mcp9844_read_u16(FAR struct mcp9844_dev_s *priv,
 
   *value = (((uint16_t)(buffer[0]))<<8) + ((uint16_t)(buffer[1]));
 
-  sndbg("addr: %02x value: %08x ret: %d\n", regaddr, *value, ret);
+  sninfo("addr: %02x value: %08x ret: %d\n", regaddr, *value, ret);
   return OK;
 }
 
@@ -174,7 +174,7 @@ static int mcp9844_write_u16(FAR struct mcp9844_dev_s *priv,
 {
   struct i2c_config_s config;
 
-  sndbg("addr: %02x value: %08x\n", regaddr, regval);
+  sninfo("addr: %02x value: %08x\n", regaddr, regval);
 
   /* Set up a 3 byte message to send */
 
@@ -293,7 +293,7 @@ static int mcp9844_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
             }
           else
             {
-              sndbg("ioctl::SNIOC_READTEMP - mcp9844_read_u16 failed - no temperature retrieved\n");
+              snerr("ERROR: ioctl::SNIOC_READTEMP - mcp9844_read_u16 failed - no temperature retrieved\n");
             }
         }
         break;
@@ -303,13 +303,13 @@ static int mcp9844_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
           ret = mcp9844_write_u16(priv, MCP9844_RESO_REG, (uint16_t)(arg));
           if (ret != OK)
             {
-              sndbg("ioctl::SNIOC_SETRESOLUTION - mcp9844_write_u16 failed - no resolution set\n");
+              snerr("ERROR: ioctl::SNIOC_SETRESOLUTION - mcp9844_write_u16 failed - no resolution set\n");
             }
         }
         break;
 
       default:
-        sndbg("Unrecognized cmd: %d\n", cmd);
+        snerr("ERROR: Unrecognized cmd: %d\n", cmd);
         ret = -ENOTTY;
         break;
     }
@@ -351,7 +351,7 @@ int mcp9844_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
 
   if (priv == NULL)
     {
-      sndbg("Failed to allocate instance\n");
+      snerr("ERROR: Failed to allocate instance\n");
       return -ENOMEM;
     }
 
@@ -363,7 +363,7 @@ int mcp9844_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
   int ret = register_driver(devpath, &g_mcp9844_fops, 0666, priv);
   if (ret < 0)
     {
-      sndbg("Failed to register driver: %d\n", ret);
+      snerr("ERROR: Failed to register driver: %d\n", ret);
       kmm_free(priv);
     }
 
diff --git a/drivers/sensors/mlx90393.c b/drivers/sensors/mlx90393.c
new file mode 100644
index 0000000000000000000000000000000000000000..93a53ef871c7e50cdfad5cad88e7097ae3393df9
--- /dev/null
+++ b/drivers/sensors/mlx90393.c
@@ -0,0 +1,624 @@
+/****************************************************************************
+ * drivers/sensors/mlx90393.c
+ * Character driver for the MLX90393 3-Axis magnetometer.
+ *
+ *   Copyright (C) 2016 DS-Automotion GmbH. All rights reserved.
+ *   Author: Alexander Entinger 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#if defined(CONFIG_SPI) && defined(CONFIG_MLX90393)
+
+/****************************************************************************
+ * Private
+ ****************************************************************************/
+
+struct mlx90393_sensor_data_s
+{
+  int16_t x_mag;              /* Measurement result for x axis */
+  int16_t y_mag;              /* Measurement result for y axis */
+  int16_t z_mag;              /* Measurement result for z axis */
+  uint16_t temperature;       /* Measurement result for temperature sensor */
+};
+
+struct mlx90393_dev_s
+{
+  FAR struct mlx90393_dev_s *flink;     /* Supports a singly linked list
+                                         * of drivers */
+  FAR struct spi_dev_s *spi;            /* Pointer to the SPI instance */
+  FAR struct mlx90393_config_s *config; /* Pointer to the configuration of
+                                         * the MLX90393 sensor */
+
+  sem_t datasem;                        /* Manages exclusive access to
+                                         * this structure */
+  struct mlx90393_sensor_data_s data;   /* The data as measured by the
+                                         * sensor */
+  struct work_s work;                   /* The work queue is responsible
+                                         * for retrieving the data from
+                                         * the sensor after the arrival of
+                                         * new data was signalled in an
+                                         * interrupt */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static void mlx90393_start_burst_mode(FAR struct mlx90393_dev_s *dev);
+static void mlx90393_read_measurement_data(FAR struct mlx90393_dev_s *dev);
+static void mlx90393_read_register(FAR struct mlx90393_dev_s *dev,
+                                   uint8_t const reg_addr, uint16_t *reg_data);
+static void mlx90393_write_register(FAR struct mlx90393_dev_s *dev,
+                                    uint8_t const reg_addr,
+                                    uint16_t const reg_data);
+static void mlx90393_reset(FAR struct mlx90393_dev_s *dev);
+static int mlx90393_interrupt_handler(int irq, FAR void *context);
+static void mlx90393_worker(FAR void *arg);
+
+static int mlx90393_open(FAR struct file *filep);
+static int mlx90393_close(FAR struct file *filep);
+static ssize_t mlx90393_read(FAR struct file *, FAR char *, size_t);
+static ssize_t mlx90393_write(FAR struct file *filep, FAR const char *buffer,
+                              size_t buflen);
+static int mlx90393_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct file_operations g_mlx90393_fops =
+{
+  mlx90393_open,
+  mlx90393_close,
+  mlx90393_read,
+  mlx90393_write,
+  NULL,
+  mlx90393_ioctl
+#ifndef CONFIG_DISABLE_POLL
+  , NULL
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  , NULL
+#endif
+};
+
+/* Single linked list to store instances of drivers */
+
+static struct mlx90393_dev_s *g_mlx90393_list = NULL;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: mlx90393_start_burst_mode
+ ****************************************************************************/
+
+static void mlx90393_start_burst_mode(FAR struct mlx90393_dev_s *dev)
+{
+  /* Lock the SPI bus so that only one device can access it at the same time */
+
+  SPI_LOCK(dev->spi, true);
+
+  /* Set CS to low which selects the MLX90393 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, true);
+
+  /* Start Burst Mode (Continous Measurement on all channels) */
+
+  SPI_SEND(dev->spi, MLX90393_SB | MLX90393_ZYXT_bm);
+
+  /* Write an idle byte to retrieve the status byte */
+
+  SPI_SEND(dev->spi, 0);
+
+  /* Set CS to high which deselects the MLX90393 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, false);
+
+  /* Unlock the SPI bus */
+
+  SPI_LOCK(dev->spi, false);
+}
+
+/****************************************************************************
+ * Name: mlx90393_read_measurement_data
+ ****************************************************************************/
+
+static void mlx90393_read_measurement_data(FAR struct mlx90393_dev_s *dev)
+{
+  int ret;
+
+  /* Lock the SPI bus so that only one device can access it at the same time */
+
+  SPI_LOCK(dev->spi, true);
+
+  /* Set CS to low which selects the MLX90393 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, true);
+
+  /* Issue command to read measurement data on all channels */
+
+  SPI_SEND(dev->spi, MLX90393_RM | MLX90393_ZYXT_bm);
+
+  /* Write an idle byte to retrieve the status byte */
+
+  SPI_SEND(dev->spi, 0);
+
+  /* The data is output in the following order: T (MSB), T (LSB), X (MSB), X
+   * (LSB), Y (MSB), Y (LSB), Z (MSB), Z (LSB)
+   */
+
+  uint16_t temperature = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8); /* MSB */
+  temperature |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0);         /* LSB */
+
+  uint16_t x_mag = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8);       /* MSB */
+  x_mag |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0);               /* LSB */
+
+  uint16_t y_mag = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8);       /* MSB */
+  y_mag |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0);               /* LSB */
+
+  uint16_t z_mag = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8);       /* MSB */
+  z_mag |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0);               /* LSB */
+
+  /* Set CS to high which deselects the MLX90393 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, false);
+
+  /* Unlock the SPI bus */
+
+  SPI_LOCK(dev->spi, false);
+
+  /* Aquire the semaphore before the data is copied */
+
+  ret = sem_wait(&dev->datasem);
+  if (ret != OK)
+    {
+      snerr("ERROR: Could not aquire dev->datasem: %d\n", ret);
+      return;
+    }
+
+  /* Copy retrieve data to internal data structure */
+
+  dev->data.temperature = temperature;
+  dev->data.x_mag = (int16_t) (x_mag);
+  dev->data.y_mag = (int16_t) (y_mag);
+  dev->data.z_mag = (int16_t) (z_mag);
+
+  /* Give back the semaphore */
+
+  sem_post(&dev->datasem);
+}
+
+/****************************************************************************
+ * Name: mlx90393_start_burst_mode
+ ****************************************************************************/
+
+static void mlx90393_reset(FAR struct mlx90393_dev_s *dev)
+{
+  /* Lock the SPI bus so that only one device can access it at the same time */
+
+  SPI_LOCK(dev->spi, true);
+
+  /* Set CS to low which selects the MLX90393 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, true);
+
+  /* Issue reset command */
+
+  SPI_SEND(dev->spi, MLX90393_RT);
+
+  /* Write an idle byte to retrieve the status byte */
+
+  SPI_SEND(dev->spi, 0);
+
+  /* Set CS to high which deselects the MLX90393 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, false);
+
+  /* Unlock the SPI bus */
+
+  SPI_LOCK(dev->spi, false);
+
+  /* Wait a little so the device has time to perform a proper reset */
+
+  up_mdelay(100);
+}
+
+/****************************************************************************
+ * Name: mlx90393_read_register
+ ****************************************************************************/
+
+static void mlx90393_read_register(FAR struct mlx90393_dev_s *dev,
+                                   uint8_t const reg_addr, uint16_t *reg_data)
+{
+  /* Lock the SPI bus so that only one device can access it at the same time */
+
+  SPI_LOCK(dev->spi, true);
+
+  /* Set CS to low which selects the MLX90393 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, true);
+
+  /* Issue a read register command */
+
+  SPI_SEND(dev->spi, MLX90393_RR);
+
+  /* Send the register address which needs to be left shifted by 2 */
+
+  SPI_SEND(dev->spi, (reg_addr << 2));
+
+  /* Write an idle byte to retrieve the status byte */
+
+  SPI_SEND(dev->spi, 0);
+
+  *reg_data = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8);        /* MSB */
+  *reg_data |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0);       /* LSB */
+
+  /* Set CS to high which deselects the MLX90393 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, false);
+
+  /* Unlock the SPI bus */
+
+  SPI_LOCK(dev->spi, false);
+}
+
+/****************************************************************************
+ * Name: mlx90393_write_register
+ ****************************************************************************/
+
+static void mlx90393_write_register(FAR struct mlx90393_dev_s *dev,
+                                    uint8_t const reg_addr,
+                                    uint16_t const reg_data)
+{
+  /* Lock the SPI bus so that only one device can access it at the same time */
+
+  SPI_LOCK(dev->spi, true);
+
+  /* Set CS to low which selects the MLX90393 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, true);
+
+  /* Issue a write register command */
+
+  SPI_SEND(dev->spi, MLX90393_WR);
+
+  /* Send the data high byte of the register */
+
+  SPI_SEND(dev->spi, (uint8_t) ((reg_data & 0xFF00) >> 8));
+
+  /* Send the data low byte of the register */
+
+  SPI_SEND(dev->spi, (uint8_t) (reg_data & 0x00FF));
+
+  /* Send the register address which needs to be left shifted by 2 */
+
+  SPI_SEND(dev->spi, (uint8_t) (reg_addr << 2));
+
+  /* Write an idle byte to retrieve the status byte */
+
+  SPI_SEND(dev->spi, 0);
+
+  /* Set CS to high which deselects the MLX90393 */
+
+  SPI_SELECT(dev->spi, dev->config->spi_devid, false);
+
+  /* Unlock the SPI bus */
+
+  SPI_LOCK(dev->spi, false);
+}
+
+/****************************************************************************
+ * Name: mlx90393_interrupt_handler
+ ****************************************************************************/
+
+static int mlx90393_interrupt_handler(int irq, FAR void *context)
+{
+  /* This function should be called upon a rising edge on the MLX90393 INT pin
+   * since it signals that new data has been measured. (INT = DRDY).
+   */
+
+  FAR struct mlx90393_dev_s *priv = 0;
+  int ret;
+
+  /* Find out which MLX90396 device caused the interrupt */
+
+  for (priv = g_mlx90393_list; priv && priv->config->irq != irq;
+       priv = priv->flink);
+  DEBUGASSERT(priv != NULL);
+
+  /* Task the worker with retrieving the latest sensor data. We should not do
+   * this in a interrupt since it might take too long. Also we cannot lock the
+   * SPI bus from within an interrupt.
+   */
+
+  DEBUGASSERT(priv->work.worker == NULL);
+  ret = work_queue(HPWORK, &priv->work, mlx90393_worker, priv, 0);
+  if (ret < 0)
+    {
+      snerr("ERROR: Failed to queue work: %d\n", ret);
+      return ret;
+    }
+  else
+    {
+      return OK;
+    }
+}
+
+/****************************************************************************
+ * Name: mlx90393_worker
+ ****************************************************************************/
+
+static void mlx90393_worker(FAR void *arg)
+{
+  FAR struct mlx90393_dev_s *priv = (FAR struct mlx90393_dev_s *)(arg);
+  DEBUGASSERT(priv != NULL);
+
+  /* Read out the latest sensor data */
+
+  mlx90393_read_measurement_data(priv);
+}
+
+/****************************************************************************
+ * Name: mlx90393_open
+ ****************************************************************************/
+
+static int mlx90393_open(FAR struct file *filep)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct mlx90393_dev_s *priv = inode->i_private;
+  static int const NUM_REGS = 10;
+  int reg_addr;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Reset the device */
+
+  mlx90393_reset(priv);
+
+#ifdef CONFIG_DEBUG_SENSORS_INFO
+  /* Read the content of ALL registers for debug purposes */
+
+  for (reg_addr = 0; reg_addr < NUM_REGS; reg_addr++)
+    {
+      uint16_t reg_content = 0;
+      mlx90393_read_register(priv, reg_addr, ®_content);
+      sninfo("R%d = %x\n", reg_addr, reg_content);
+    }
+#endif
+
+  /* Start the burst mode */
+
+  mlx90393_start_burst_mode(priv);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: mlx90393_close
+ ****************************************************************************/
+
+static int mlx90393_close(FAR struct file *filep)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct mlx90393_dev_s *priv = inode->i_private;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Reset the device */
+
+  mlx90393_reset(priv);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: mlx90393_read
+ ****************************************************************************/
+
+static ssize_t mlx90393_read(FAR struct file *filep, FAR char *buffer,
+                             size_t buflen)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct mlx90393_dev_s *priv = inode->i_private;
+  FAR struct mlx90393_sensor_data_s *data;
+  int ret;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Check if enough memory was provided for the read call */
+
+  if (buflen < sizeof(FAR struct mlx90393_sensor_data_s))
+    {
+      snerr("ERROR: Not enough memory for reading out a sensor data sample\n");
+      return -ENOSYS;
+    }
+
+  /* Copy the sensor data into the buffer */
+
+  /* Aquire the semaphore before the data is copied */
+
+  ret = sem_wait(&priv->datasem);
+  if (ret < 0)
+    {
+      int errcode = errno;
+      snerr("ERROR: Could not aquire priv->datasem: %d\n", errcode);
+      return -errcode;
+    }
+
+  data = (FAR struct mlx90393_sensor_data_s *)buffer;
+  memset(data, 0, sizeof(FAR struct mlx90393_sensor_data_s));
+
+  data->x_mag = priv->data.x_mag;
+  data->y_mag = priv->data.y_mag;
+  data->z_mag = priv->data.z_mag;
+  data->temperature = priv->data.temperature;
+
+  /* Give back the semaphore */
+
+  sem_post(&priv->datasem);
+
+  return sizeof(FAR struct mlx90393_sensor_data_s);
+}
+
+/****************************************************************************
+ * Name: mlx90393_write
+ ****************************************************************************/
+
+static ssize_t mlx90393_write(FAR struct file *filep, FAR const char *buffer,
+                              size_t buflen)
+{
+  return -ENOSYS;
+}
+
+/****************************************************************************
+ * Name: mlx90393_ioctl
+ ****************************************************************************/
+
+static int mlx90393_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
+{
+  int ret = OK;
+
+  switch (cmd)
+    {
+      /* Command was not recognized */
+
+    default:
+      snerr("ERROR: Unrecognized cmd: %d\n", cmd);
+      ret = -ENOTTY;
+      break;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: mlx90393_register
+ *
+ * Description:
+ *   Register the MLX90393 character device as 'devpath'
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/mag0"
+ *   spi     - An instance of the SPI interface to use to communicate with
+ *             MLX90393
+ *   config  - Describes the configuration of the MLX90393 part.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int mlx90393_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
+                      FAR struct mlx90393_config_s *config)
+{
+  FAR struct mlx90393_dev_s *priv;
+  int ret;
+
+  /* Sanity check */
+
+  DEBUGASSERT(spi != NULL);
+  DEBUGASSERT(config != NULL);
+
+  /* Initialize the MLX90393 device structure */
+
+  priv = (FAR struct mlx90393_dev_s *)kmm_malloc(sizeof(struct mlx90393_dev_s));
+  if (priv == NULL)
+    {
+      snerr("ERROR: Failed to allocate instance\n");
+      return -ENOMEM;
+    }
+
+  priv->spi = spi;
+  priv->config = config;
+
+  priv->work.worker = NULL;
+
+  sem_init(&priv->datasem, 0, 1);       /* Initialize sensor data access
+                                         * semaphore */
+
+  /* Setup SPI frequency and mode */
+
+  SPI_SETFREQUENCY(spi, MLX90393_SPI_FREQUENCY);
+  SPI_SETMODE(spi, MLX90393_SPI_MODE);
+
+  /* Attach the interrupt handler */
+
+  ret = priv->config->attach(priv->config, &mlx90393_interrupt_handler);
+  if (ret < 0)
+    {
+      snerr("ERROR: Failed to attach interrupt\n");
+      return -ENODEV;
+    }
+
+  /* Register the character driver */
+
+  ret = register_driver(devpath, &g_mlx90393_fops, 0666, priv);
+  if (ret < 0)
+    {
+      snerr("ERROR: Failed to register driver: %d\n", ret);
+      kmm_free(priv);
+      sem_destroy(&priv->datasem);
+      return -ENODEV;
+    }
+
+  /* Since we support multiple MLX90393 devices are supported, we will need to
+   * add this new instance to a list of device instances so that it can be
+   * found by the interrupt handler based on the received IRQ number. */
+
+  priv->flink = g_mlx90393_list;
+  g_mlx90393_list = priv;
+
+  return OK;
+}
+
+#endif /* CONFIG_SPI && CONFIG_MLX90393 */
diff --git a/drivers/sensors/mpl115a.c b/drivers/sensors/mpl115a.c
index 0c4e87414c32a72cd65d044caf3678d225c6f57f..38763f5c71dd5d9b2315e94b31224d1c23ba1d04 100644
--- a/drivers/sensors/mpl115a.c
+++ b/drivers/sensors/mpl115a.c
@@ -157,7 +157,7 @@ static uint8_t mpl115a_getreg8(FAR struct mpl115a_dev_s *priv, uint8_t regaddr)
   (void)SPI_LOCK(priv->spi, false);
 
 #ifdef CONFIG_MPL115A_REGDEBUG
-  dbg("%02x->%02x\n", regaddr, regval);
+  _err("%02x->%02x\n", regaddr, regval);
 #endif
   return regval;
 }
@@ -176,25 +176,25 @@ static void mpl115a_updatecaldata(FAR struct mpl115a_dev_s *priv)
 
   priv->mpl115a_cal_a0 = mpl115a_getreg8(priv, MPL115A_BASE_CMD | (MPL115A_A0_MSB << 1)) << 8;
   priv->mpl115a_cal_a0 |= mpl115a_getreg8(priv, MPL115A_BASE_CMD | (MPL115A_A0_LSB << 1));
-  sndbg("a0 = %d\n", priv->mpl115a_cal_a0);
+  sninfo("a0 = %d\n", priv->mpl115a_cal_a0);
 
   /* Get b1 coefficient */
 
   priv->mpl115a_cal_b1 = mpl115a_getreg8(priv, MPL115A_BASE_CMD | (MPL115A_B1_MSB << 1)) << 8;
   priv->mpl115a_cal_b1 |= mpl115a_getreg8(priv, MPL115A_BASE_CMD | (MPL115A_B1_LSB << 1));
-  sndbg("b1 = %d\n", priv->mpl115a_cal_b1);
+  sninfo("b1 = %d\n", priv->mpl115a_cal_b1);
 
   /* Get b2 coefficient */
 
   priv->mpl115a_cal_b2 = mpl115a_getreg8(priv, MPL115A_BASE_CMD | (MPL115A_B2_MSB << 1)) << 8;
   priv->mpl115a_cal_b2 |= mpl115a_getreg8(priv, MPL115A_BASE_CMD | (MPL115A_B2_LSB << 1));
-  sndbg("b2 = %d\n", priv->mpl115a_cal_b2);
+  sninfo("b2 = %d\n", priv->mpl115a_cal_b2);
 
   /* Get c12 coefficient */
 
   priv->mpl115a_cal_c12 = mpl115a_getreg8(priv, MPL115A_BASE_CMD | (MPL115A_C12_MSB << 1)) << 8;
   priv->mpl115a_cal_c12 |= mpl115a_getreg8(priv, MPL115A_BASE_CMD | (MPL115A_C12_LSB << 1));
-  sndbg("c12 = %d\n", priv->mpl115a_cal_c12);
+  sninfo("c12 = %d\n", priv->mpl115a_cal_c12);
 }
 
 /****************************************************************************
@@ -220,13 +220,13 @@ static void mpl115a_read_press_temp(FAR struct mpl115a_dev_s *priv)
   priv->mpl115a_pressure |= mpl115a_getreg8(priv, MPL115A_BASE_CMD | (MPL115A_PADC_LSB << 1));
   priv->mpl115a_pressure >>= 6; /* Padc is 10bit unsigned */
 
-  sndbg("Pressure = %d\n", priv->mpl115a_pressure);
+  sninfo("Pressure = %d\n", priv->mpl115a_pressure);
 
   priv->mpl115a_temperature = mpl115a_getreg8(priv, MPL115A_BASE_CMD | (MPL115A_TADC_MSB << 1)) << 8;
   priv->mpl115a_temperature |= mpl115a_getreg8(priv, MPL115A_BASE_CMD | (MPL115A_TADC_LSB << 1));
   priv->mpl115a_temperature >>= 6; /* Tadc is 10bit unsigned */
 
-  sndbg("Temperature = %d\n", priv->mpl115a_temperature);
+  sninfo("Temperature = %d\n", priv->mpl115a_temperature);
 }
 
 /****************************************************************************
@@ -274,7 +274,7 @@ static int mpl115a_getpressure(FAR struct mpl115a_dev_s *priv)
    * This may be eliminated by right shifting the result 4 bits.
    */
 
-  sndbg("Final Pressure = %d\n", pressure >> 4);
+  sninfo("Final Pressure = %d\n", pressure >> 4);
   return pressure;
 }
 
@@ -316,13 +316,13 @@ static ssize_t mpl115a_read(FAR struct file *filep, FAR char *buffer, size_t buf
 
   if (!buffer)
     {
-      sndbg("Buffer is null\n");
+      snerr("ERROR: Buffer is null\n");
       return -1;
     }
 
   if (buflen != 2)
     {
-      sndbg("You can't read something other than 16 bits (2 bytes)\n");
+      snerr("ERROR: You can't read something other than 16 bits (2 bytes)\n");
       return -1;
     }
 
@@ -378,7 +378,7 @@ int mpl115a_register(FAR const char *devpath, FAR struct spi_dev_s *spi)
   priv = (FAR struct mpl115a_dev_s *)kmm_malloc(sizeof(struct mpl115a_dev_s));
   if (!priv)
     {
-      sndbg("Failed to allocate instance\n");
+      snerr("ERROR: Failed to allocate instance\n");
       return -ENOMEM;
     }
 
@@ -397,7 +397,7 @@ int mpl115a_register(FAR const char *devpath, FAR struct spi_dev_s *spi)
   ret = register_driver(devpath, &g_mpl115afops, 0666, priv);
   if (ret < 0)
     {
-      sndbg("Failed to register driver: %d\n", ret);
+      snerr("ERROR: Failed to register driver: %d\n", ret);
       kmm_free(priv);
     }
 
diff --git a/drivers/sensors/ms58xx.c b/drivers/sensors/ms58xx.c
index 1cbcdc37e94f4df82a0ed3a52a99bac7b6140c66..47f04e57cae2bb784155491d35132354c2ec4bcd 100644
--- a/drivers/sensors/ms58xx.c
+++ b/drivers/sensors/ms58xx.c
@@ -306,14 +306,14 @@ static int ms58xx_readu16(FAR struct ms58xx_dev_s *priv, uint8_t regaddr,
   uint8_t buffer[2];
   int ret;
 
-  sndbg("addr: %02x\n", regaddr);
+  sninfo("addr: %02x\n", regaddr);
 
   /* Write the register address */
 
   ret = ms58xx_i2c_write(priv, ®addr, sizeof(regaddr));
   if (ret < 0)
     {
-      sndbg("i2c_write failed: %d\n", ret);
+      snerr("ERROR: i2c_write failed: %d\n", ret);
       return ret;
     }
 
@@ -322,12 +322,12 @@ static int ms58xx_readu16(FAR struct ms58xx_dev_s *priv, uint8_t regaddr,
   ret = ms58xx_i2c_read(priv, buffer, sizeof(buffer));
   if (ret < 0)
     {
-      sndbg("i2c_read failed: %d\n", ret);
+      snerr("ERROR: i2c_read failed: %d\n", ret);
       return ret;
     }
 
   *regval = (uint16_t)buffer[0] << 8 | (uint16_t)buffer[1];
-  sndbg("value: %04x ret: %d\n", *regval, ret);
+  sninfo("value: %04x ret: %d\n", *regval, ret);
   return ret;
 }
 
@@ -346,14 +346,14 @@ static int ms58xx_readadc(FAR struct ms58xx_dev_s *priv, FAR uint32_t *adc)
   int ret;
 
   regaddr = MS58XX_ADC_REG;
-  sndbg("addr: %02x\n", regaddr);
+  sninfo("addr: %02x\n", regaddr);
 
   /* Write the register address */
 
   ret = ms58xx_i2c_write(priv, ®addr, sizeof(regaddr));
   if (ret < 0)
     {
-      sndbg("i2c_write failed: %d\n", ret);
+      snerr("ERROR: i2c_write failed: %d\n", ret);
       return ret;
     }
 
@@ -362,7 +362,7 @@ static int ms58xx_readadc(FAR struct ms58xx_dev_s *priv, FAR uint32_t *adc)
   ret = ms58xx_i2c_read(priv, buffer, sizeof(buffer));
   if (ret < 0)
     {
-      sndbg("i2c_read failed: %d\n", ret);
+      snerr("ERROR: i2c_read failed: %d\n", ret);
       return ret;
     }
 
@@ -370,7 +370,7 @@ static int ms58xx_readadc(FAR struct ms58xx_dev_s *priv, FAR uint32_t *adc)
          (uint32_t)buffer[1] << 8 |
          (uint32_t)buffer[2];
 
-  sndbg("adc: %06x ret: %d\n", *adc, ret);
+  sninfo("adc: %06x ret: %d\n", *adc, ret);
   return ret;
 }
 
@@ -483,7 +483,7 @@ static int ms58xx_setosr(FAR struct ms58xx_dev_s *priv, uint16_t osr)
 {
   int ret = OK;
 
-  sndbg("osr: %04x\n", osr);
+  sninfo("osr: %04x\n", osr);
 
   switch (priv->model)
     {
@@ -558,7 +558,7 @@ static int ms58xx_readprom(FAR struct ms58xx_dev_s *priv)
       ret = ms58xx_readu16(priv, MS58XX_PROM_REG + i * 2, prom + i);
       if (ret < 0)
         {
-          sndbg("ms58xx_readu16 failed: %d\n", ret);
+          snerr("ERROR: ms58xx_readu16 failed: %d\n", ret);
           return ret;
         }
     }
@@ -568,7 +568,7 @@ static int ms58xx_readprom(FAR struct ms58xx_dev_s *priv)
 
   if (crc != ms58xx_crc(prom, crcindex, crcmask))
     {
-      sndbg("crc mismatch\n");
+      snerr("ERROR: crc mismatch\n");
       return -ENODEV;
     }
 
@@ -620,14 +620,14 @@ static int ms58xx_reset(FAR struct ms58xx_dev_s *priv)
   int ret;
 
   regaddr = MS58XX_RESET_REG;
-  sndbg("addr: %02x\n", regaddr);
+  sninfo("addr: %02x\n", regaddr);
 
   /* Write the register address */
 
   ret = ms58xx_i2c_write(priv, ®addr, sizeof(regaddr));
   if (ret < 0)
     {
-      sndbg("i2c_write failed: %d\n", ret);
+      snerr("ERROR: i2c_write failed: %d\n", ret);
       return ret;
     }
 
@@ -636,7 +636,7 @@ static int ms58xx_reset(FAR struct ms58xx_dev_s *priv)
   ret = ms58xx_readprom(priv);
   if (ret < 0)
     {
-      sndbg("ms58xx_readprom failed: %d\n", ret);
+      snerr("ERROR: ms58xx_readprom failed: %d\n", ret);
     }
 
   return ret;
@@ -656,14 +656,14 @@ static int ms58xx_convert(FAR struct ms58xx_dev_s *priv, uint8_t regaddr,
   int ret;
 
   regaddr |= priv->osr;
-  sndbg("addr: %02x\n", regaddr);
+  sninfo("addr: %02x\n", regaddr);
 
   /* Write the register address */
 
   ret = ms58xx_i2c_write(priv, ®addr, sizeof(regaddr));
   if (ret < 0)
     {
-      sndbg("i2c_write failed: %d\n", ret);
+      snerr("ERROR: i2c_write failed: %d\n", ret);
     }
 
   /* Wait for the conversion to end */
@@ -675,7 +675,7 @@ static int ms58xx_convert(FAR struct ms58xx_dev_s *priv, uint8_t regaddr,
   ret = ms58xx_readadc(priv, regval);
   if (ret < 0)
     {
-      sndbg("ms58xx_readadc failed: %d\n", ret);
+      snerr("ERROR: ms58xx_readadc failed: %d\n", ret);
       return ret;
     }
 
@@ -714,14 +714,14 @@ static int ms58xx_measure(FAR struct ms58xx_dev_s *priv)
   ret = ms58xx_convert(priv, MS58XX_PRESS_REG, &rawpress);
   if (ret < 0)
     {
-      sndbg("ms58xx_convert failed: %d\n", ret);
+      snerr("ERROR: ms58xx_convert failed: %d\n", ret);
       return ret;
     }
 
   ret = ms58xx_convert(priv, MS58XX_TEMP_REG, &rawtemp);
   if (ret < 0)
     {
-      sndbg("ms58xx_convert failed: %d\n", ret);
+      snerr("ERROR: ms58xx_convert failed: %d\n", ret);
       return ret;
     }
 
@@ -923,7 +923,7 @@ static int ms58xx_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
           FAR int32_t *ptr = (FAR int32_t *)((uintptr_t)arg);
           DEBUGASSERT(ptr != NULL);
           *ptr = priv->temp;
-          sndbg("temp: %08x\n", *ptr);
+          sninfo("temp: %08x\n", *ptr);
         }
         break;
 
@@ -934,7 +934,7 @@ static int ms58xx_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
           FAR int32_t *ptr = (FAR int32_t *)((uintptr_t)arg);
           DEBUGASSERT(ptr != NULL);
           *ptr = priv->press;
-          sndbg("press: %08x\n", *ptr);
+          sninfo("press: %08x\n", *ptr);
         }
         break;
 
@@ -949,13 +949,13 @@ static int ms58xx_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case SNIOC_OVERSAMPLING:
         ret = ms58xx_setosr(priv, (uint16_t)arg);
-        sndbg("osr: %04x ret: %d\n", *(uint16_t *)arg, ret);
+        sninfo("osr: %04x ret: %d\n", *(uint16_t *)arg, ret);
         break;
 
       /* Unrecognized commands */
 
       default:
-        sndbg("Unrecognized cmd: %d arg: %ld\n", cmd, arg);
+        snerr("ERROR: Unrecognized cmd: %d arg: %ld\n", cmd, arg);
         ret = -ENOTTY;
         break;
     }
@@ -1010,7 +1010,7 @@ int ms58xx_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
   priv = (FAR struct ms58xx_dev_s *)kmm_malloc(sizeof(*priv));
   if (priv == NULL)
     {
-      sndbg("Failed to allocate instance\n");
+      snerr("ERROR: Failed to allocate instance\n");
       return -ENOMEM;
     }
 
@@ -1177,15 +1177,15 @@ int ms58xx_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
   ret = ms58xx_setosr(priv, osr);
   if (ret < 0)
     {
-      sndbg("ms58xx_setosr failed: %d\n", ret);
-      goto err;
+      snerr("ERROR: ms58xx_setosr failed: %d\n", ret);
+      goto errout;
     }
 
   ret = ms58xx_reset(priv);
   if (ret < 0)
     {
-      sndbg("ms58xx_reset failed: %d\n", ret);
-      goto err;
+      snerr("ERROR: ms58xx_reset failed: %d\n", ret);
+      goto errout;
     }
 
   /* Register the character driver */
@@ -1193,13 +1193,13 @@ int ms58xx_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
   ret = register_driver(devpath, &g_fops, 0666, priv);
   if (ret < 0)
     {
-      sndbg("Failed to register driver: %d\n", ret);
-      goto err;
+      snerr("ERROR: Failed to register driver: %d\n", ret);
+      goto errout;
     }
 
   return ret;
 
-err:
+errout:
   kmm_free(priv);
   return ret;
 }
diff --git a/drivers/sensors/qencoder.c b/drivers/sensors/qencoder.c
index 34cb029d4c3f32968c25f2e898e57426d540e8c6..7f6edd097888fb047b0906df178363f9d9e54e5c 100644
--- a/drivers/sensors/qencoder.c
+++ b/drivers/sensors/qencoder.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -128,7 +124,7 @@ static int qe_open(FAR struct file *filep)
   uint8_t                     tmp;
   int                         ret;
 
-  snvdbg("crefs: %d\n", upper->crefs);
+  sninfo("crefs: %d\n", upper->crefs);
 
   /* Get exclusive access to the device structures */
 
@@ -162,7 +158,7 @@ static int qe_open(FAR struct file *filep)
       /* Yes.. perform one time hardware initialization. */
 
       DEBUGASSERT(lower->ops->setup != NULL);
-      snvdbg("calling setup\n");
+      sninfo("calling setup\n");
 
       ret = lower->ops->setup(lower);
       if (ret < 0)
@@ -197,7 +193,7 @@ static int qe_close(FAR struct file *filep)
   FAR struct qe_upperhalf_s *upper = inode->i_private;
   int                         ret;
 
-  snvdbg("crefs: %d\n", upper->crefs);
+  sninfo("crefs: %d\n", upper->crefs);
 
   /* Get exclusive access to the device structures */
 
@@ -227,7 +223,7 @@ static int qe_close(FAR struct file *filep)
       /* Disable the PWM device */
 
       DEBUGASSERT(lower->ops->shutdown != NULL);
-      snvdbg("calling shutdown: %d\n");
+      sninfo("calling shutdown: %d\n");
 
       lower->ops->shutdown(lower);
     }
@@ -284,7 +280,7 @@ static int qe_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   FAR struct qe_lowerhalf_s *lower = upper->lower;
   int                        ret;
 
-  snvdbg("cmd: %d arg: %ld\n", cmd, arg);
+  sninfo("cmd: %d arg: %ld\n", cmd, arg);
   DEBUGASSERT(upper && lower);
 
   /* Get exclusive access to the device structures */
@@ -326,7 +322,7 @@ static int qe_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       default:
         {
-          snvdbg("Forwarding unrecognized cmd: %d arg: %ld\n", cmd, arg);
+          sninfo("Forwarding unrecognized cmd: %d arg: %ld\n", cmd, arg);
           DEBUGASSERT(lower->ops->ioctl != NULL);
           ret = lower->ops->ioctl(lower, cmd, arg);
         }
@@ -371,7 +367,7 @@ int qe_register(FAR const char *devpath, FAR struct qe_lowerhalf_s *lower)
   upper = (FAR struct qe_upperhalf_s *)kmm_zalloc(sizeof(struct qe_upperhalf_s));
   if (!upper)
     {
-      sndbg("Allocation failed\n");
+      snerr("ERROR: Allocation failed\n");
       return -ENOMEM;
     }
 
@@ -382,7 +378,7 @@ int qe_register(FAR const char *devpath, FAR struct qe_lowerhalf_s *lower)
 
   /* Register the PWM device */
 
-  snvdbg("Registering %s\n", devpath);
+  sninfo("Registering %s\n", devpath);
   return register_driver(devpath, &g_qeops, 0666, upper);
 }
 
diff --git a/drivers/sensors/veml6070.c b/drivers/sensors/veml6070.c
new file mode 100644
index 0000000000000000000000000000000000000000..28030ba7ced134f2d52e60003c17685ab777dc52
--- /dev/null
+++ b/drivers/sensors/veml6070.c
@@ -0,0 +1,352 @@
+/****************************************************************************
+ * drivers/sensors/veml6070.c
+ * Character driver for the Vishay UV-A Light Sensor VEML6070
+ *
+ *   Copyright (C) 2016 Alan Carvalho de Assis. All rights reserved.
+ *   Author: Alan Carvalho de Assis 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#if defined(CONFIG_I2C) && defined(CONFIG_VEML6070)
+
+/****************************************************************************
+ * Pre-process Definitions
+ ****************************************************************************/
+
+#ifndef CONFIG_VEML6070_I2C_FREQUENCY
+#  define CONFIG_VEML6070_I2C_FREQUENCY 100000
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct veml6070_dev_s
+{
+  FAR struct i2c_master_s *i2c; /* I2C interface */
+  uint8_t addr;                 /* I2C address */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* I2C Helpers */
+
+static int     veml6070_read8(FAR struct veml6070_dev_s *priv, int offset,
+                 FAR uint8_t *regval);
+static int     veml6070_write8(FAR struct veml6070_dev_s *priv,
+                 uint8_t regval);
+
+/* Character driver methods */
+
+static int     veml6070_open(FAR struct file *filep);
+static int     veml6070_close(FAR struct file *filep);
+static ssize_t veml6070_read(FAR struct file *filep, FAR char *buffer,
+                 size_t buflen);
+static ssize_t veml6070_write(FAR struct file *filep,
+                 FAR const char *buffer, size_t buflen);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct file_operations g_veml6070_fops =
+{
+  veml6070_open,   /* open */
+  veml6070_close,  /* close */
+  veml6070_read,   /* read */
+  veml6070_write,  /* write */
+  NULL,            /* seek */
+  NULL             /* ioctl */
+#ifndef CONFIG_DISABLE_POLL
+  , NULL           /* poll */
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  , NULL           /* unlink */
+#endif
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: veml6070_read8
+ *
+ * Description:
+ *   Read 8-bit register
+ *
+ ****************************************************************************/
+
+static int veml6070_read8(FAR struct veml6070_dev_s *priv, int offset,
+                            FAR uint8_t *regval)
+{
+  struct i2c_config_s config;
+  uint8_t data[1];
+  int ret = -1;
+
+  /* Set up the I2C configuration */
+
+  config.frequency = CONFIG_VEML6070_I2C_FREQUENCY;
+  config.address   = priv->addr + offset;
+  config.addrlen   = 7;
+
+  /* Read 8-bits from the device */
+
+  ret = i2c_read(priv->i2c, &config, data, 1);
+  if (ret < 0)
+    {
+      snerr ("i2c_read failed: %d\n", ret);
+      return ret;
+    }
+
+  /* Copy the content of the buffer to the location of the uint8_t pointer */
+
+  *regval = data[0];
+
+  sninfo("value: %08x ret: %d\n", *regval, ret);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: veml6070_write8
+ *
+ * Description:
+ *   Write from an 8-bit register
+ *
+ ****************************************************************************/
+
+static int veml6070_write8(FAR struct veml6070_dev_s *priv, uint8_t regval)
+{
+  struct i2c_config_s config;
+  int ret;
+
+  sninfo("value: %02x\n", regval);
+
+  /* Set up the I2C configuration */
+
+  config.frequency = CONFIG_VEML6070_I2C_FREQUENCY;
+  config.address   = priv->addr;
+  config.addrlen   = 7;
+
+  /* Write 8 bits to device */
+
+  ret = i2c_write(priv->i2c, &config, ®val, 1);
+  if (ret < 0)
+    {
+      snerr("ERROR: i2c_write failed: %d\n", ret);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: veml6070_open
+ *
+ * Description:
+ *   This function is called whenever the VEML6070 device is opened.
+ *
+ ****************************************************************************/
+
+static int veml6070_open(FAR struct file *filep)
+{
+  return OK;
+}
+
+/****************************************************************************
+ * Name: veml6070_close
+ *
+ * Description:
+ *   This routine is called when the VEML6070 device is closed.
+ *
+ ****************************************************************************/
+
+static int veml6070_close(FAR struct file *filep)
+{
+  return OK;
+}
+
+/****************************************************************************
+ * Name: veml6070_read
+ ****************************************************************************/
+
+static ssize_t veml6070_read(FAR struct file *filep, FAR char *buffer,
+                              size_t buflen)
+{
+  int ret;
+  FAR struct inode         *inode;
+  FAR struct veml6070_dev_s *priv;
+  int msb = 1;
+  uint16_t regdata;
+
+  DEBUGASSERT(filep);
+  inode = filep->f_inode;
+
+  DEBUGASSERT(inode && inode->i_private);
+  priv  = (FAR struct veml6070_dev_s *)inode->i_private;
+
+  /* Check if the user is reading the right size */
+
+  if (buflen != 2)
+    {
+      snerr("ERROR: You need to read 2 bytes from this sensor!\n");
+      return -EINVAL;
+    }
+
+  /* Enable the sensor */
+
+  ret = veml6070_write8(priv, VEML6070_CMD_RSV & ~VEML6070_CMD_SD);
+  if (ret < 0)
+    {
+      snerr("ERROR: Failed to enable the VEML6070!\n");
+      return -EINVAL;
+    }
+
+  /* 1T for Rset 270Kohms is 125ms */
+
+  usleep(125000);
+
+  /* Read the MSB first */
+
+  ret = veml6070_read8(priv, msb, (FAR uint8_t *) ®data);
+  if (ret < 0)
+    {
+      snerr("ERROR: Error reading light sensor!\n");
+      return ret;
+    }
+
+  buffer[1] = regdata;
+
+  /* Read the LSB */
+
+  msb = 0;
+  ret = veml6070_read8(priv, msb, (FAR uint8_t *) ®data);
+  if (ret < 0)
+    {
+      snerr("ERROR: Error reading light sensor!\n");
+      return ret;
+    }
+
+  buffer[0] = regdata;
+
+  return buflen;
+}
+
+/****************************************************************************
+ * Name: veml6070_write
+ ****************************************************************************/
+
+static ssize_t veml6070_write(FAR struct file *filep,
+                               FAR const char *buffer, size_t buflen)
+{
+  return -ENOSYS;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: veml6070_register
+ *
+ * Description:
+ *   Register the VEML6070 character device as 'devpath'
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/uvlight0"
+ *   i2c - An instance of the I2C interface to use to communicate with VEML6070
+ *   addr - The I2C address of the VEML6070.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int veml6070_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
+                       uint8_t addr)
+{
+  int ret;
+
+  /* Sanity check */
+
+  DEBUGASSERT(i2c != NULL);
+
+  /* Initialize the VEML6070 device structure */
+
+  FAR struct veml6070_dev_s *priv =
+    (FAR struct veml6070_dev_s *)kmm_malloc(sizeof(struct veml6070_dev_s));
+
+  if (priv == NULL)
+    {
+      snerr("ERROR: Failed to allocate instance\n");
+      return -ENOMEM;
+    }
+
+  priv->i2c  = i2c;
+  priv->addr = addr;
+
+  /* Initialize the device (shut it down) */
+
+  ret = veml6070_write8(priv, VEML6070_CMD_RSV | VEML6070_CMD_SD);
+  if (ret < 0)
+    {
+      snerr("ERROR: Failed to initialize the VEML6070!\n");
+      return ret;
+    }
+
+  /* Register the character driver */
+
+  ret = register_driver(devpath, &g_veml6070_fops, 0666, priv);
+  if (ret < 0)
+    {
+      snerr("ERROR: Failed to register driver: %d\n", ret);
+      kmm_free(priv);
+    }
+
+  return ret;
+}
+
+#endif /* CONFIG_I2C && CONFIG_VEML6070 */
diff --git a/drivers/sensors/xen1210.c b/drivers/sensors/xen1210.c
new file mode 100644
index 0000000000000000000000000000000000000000..0f7bfd2b1e65a8024924f1494a048c05171e5dcd
--- /dev/null
+++ b/drivers/sensors/xen1210.c
@@ -0,0 +1,486 @@
+/****************************************************************************
+ * drivers/sensors/xen1210.c
+ *
+ *   Copyright (C) 2016 Alan Carvalho de Assis. All rights reserved.
+ *   Author: Alan Carvalho de Assis 
+ *
+ * This driver is used to interface with Sensixs XEN1210 3D-board.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "xen1210.h"
+
+#if defined(CONFIG_XEN1210)
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* Character driver methods */
+
+static int     xen1210_open(FAR struct file *filep);
+static int     xen1210_close(FAR struct file *filep);
+static ssize_t xen1210_read(FAR struct file *filep, FAR char *buffer,
+                            size_t len);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* This the vtable that supports the character driver interface */
+
+static const struct file_operations g_xen1210fops =
+{
+  xen1210_open,    /* open */
+  xen1210_close,   /* close */
+  xen1210_read,    /* read */
+  NULL,            /* write */
+  NULL,            /* seek */
+  NULL             /* ioctl */
+#ifndef CONFIG_DISABLE_POLL
+  , NULL           /* poll */
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  , NULL           /* unlink */
+#endif
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: xen1210_configspi
+ *
+ * Description:
+ *
+ ****************************************************************************/
+
+static inline void xen1210_configspi(FAR struct spi_dev_s *spi)
+{
+  /* Configure SPI for the XEN1210 */
+
+  SPI_SETMODE(spi, SPIDEV_MODE1);
+  SPI_SETBITS(spi, 8);
+  (void)SPI_HWFEATURES(spi, 0);
+  (void)SPI_SETFREQUENCY(spi, XEN1210_SPI_MAXFREQUENCY);
+}
+
+/****************************************************************************
+ * Name: xen1210_open
+ *
+ * Description:
+ *   Standard character driver open method.
+ *
+ ****************************************************************************/
+
+static int xen1210_open(FAR struct file *filep)
+{
+  return OK;
+}
+
+/****************************************************************************
+ * Name: xen1210_close
+ *
+ * Description:
+ *   Standard character driver close method.
+ *
+ ****************************************************************************/
+
+static int xen1210_close(FAR struct file *filep)
+{
+  return OK;
+}
+
+/****************************************************************************
+ * Name: xen1210_read
+ *
+ * Description:
+ *   Standard character driver read method.
+ *
+ ****************************************************************************/
+
+static ssize_t xen1210_read(FAR struct file *filep, FAR char *buffer,
+                            size_t len)
+{
+  FAR struct inode         *inode;
+  FAR struct xen1210_dev_s *priv;
+  int                       ret;
+
+  sninfo("len=%d\n", len);
+  DEBUGASSERT(filep);
+  inode = filep->f_inode;
+
+  DEBUGASSERT(inode && inode->i_private);
+  priv  = (FAR struct xen1210_dev_s *)inode->i_private;
+
+  /* Verify that the caller has provided a buffer large enough to receive
+   * the magnetometer data.
+   */
+
+  if (len < sizeof(struct xen1210_sample_s))
+    {
+      /* We could provide logic to break up a touch report into segments and
+       * handle smaller reads... but why?
+       */
+
+      snerr("Failed: Trying to read less bytes than sensor sample!\n");
+      return -ENOSYS;
+    }
+
+  /* Get exclusive access to the driver data structure */
+
+  ret = sem_wait(&priv->exclsem);
+  if (ret < 0)
+    {
+      /* This should only happen if the wait was canceled by an signal */
+
+      snerr("Failed: Cannot get exclusive access to driver structure!\n");
+      DEBUGASSERT(errno == EINTR);
+      return -EINTR;
+    }
+
+  sninfo("X = 0x%06X\n", priv->sample.data_x);
+  sninfo("Y = 0x%06X\n", priv->sample.data_y);
+  sninfo("Z = 0x%06X\n", priv->sample.data_z);
+
+  /* Return read sample */
+
+  buffer = (FAR char *) &priv->sample;
+
+  sem_post(&priv->exclsem);
+  return sizeof(struct xen1210_sample_s);
+}
+
+/****************************************************************************
+ * Name: xen1210_worker
+ *
+ * Description:
+ *   This is the "bottom half" of the XEN1210 interrupt handler
+ *
+ ****************************************************************************/
+
+static void xen1210_worker(FAR void *arg)
+{
+  FAR struct xen1210_dev_s *priv = (FAR struct xen1210_dev_s *)arg;
+
+  DEBUGASSERT(priv && priv->config);
+
+  /* Read the sensors */
+
+  xen1210_getdata(priv);
+
+  /* Re-enable the XEN1210 GPIO interrupt */
+
+  priv->config->enable(priv->config, true);
+}
+
+/****************************************************************************
+ * Name: xen1210_interrupt
+ *
+ * Description:
+ *  The XEN1210 interrupt handler
+ *
+ ****************************************************************************/
+
+static void xen1210_interrupt(FAR struct xen1210_config_s *config,
+                              FAR void *arg)
+{
+  FAR struct xen1210_dev_s *priv = (FAR struct xen1210_dev_s *)arg;
+  int ret;
+
+  DEBUGASSERT(priv && priv->config == config);
+
+  /* Disable further interrupts */
+
+  config->enable(config, false);
+
+  /* Check if interrupt work is already queue.  If it is already busy, then
+   * we already have interrupt processing in the pipeline and we need to do
+   * nothing more.
+   */
+
+  if (work_available(&priv->work))
+    {
+      /* Yes.. Transfer processing to the worker thread.  Since XEN1210
+       * interrupts are disabled while the work is pending, no special
+       * action should be required to protect the work queue.
+       */
+
+      ret = work_queue(HPWORK, &priv->work, xen1210_worker, priv, 0);
+      if (ret != 0)
+        {
+          snerr("ERROR: Failed to queue work: %d\n", ret);
+        }
+    }
+
+  /* Clear any pending interrupts and return success */
+
+  config->clear(config);
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: xen1210_instantiate
+ *
+ * Description:
+ *   Instantiate and configure the XEN1210 device driver to use the provided
+ *   SPI device instance.
+ *
+ * Input Parameters:
+ *   dev     - An I2C or SPI driver instance
+ *   config  - Persistent board configuration data
+ *
+ * Returned Value:
+ *   A non-zero handle is returned on success.  This handle may then be used
+ *   to configure the XEN1210 driver as necessary.  A NULL handle value is
+ *   returned on failure.
+ *
+ ****************************************************************************/
+
+XEN1210_HANDLE xen1210_instantiate(FAR struct spi_dev_s *dev,
+                                   FAR struct xen1210_config_s *config)
+{
+  FAR struct xen1210_dev_s *priv;
+  uint32_t regval;
+
+  /* Allocate the XEN1210 driver instance */
+
+  priv = (FAR struct xen1210_dev_s *)kmm_zalloc(sizeof(struct xen1210_dev_s));
+  if (!priv)
+    {
+      snerr("ERROR: Failed to allocate the device structure!\n");
+      return NULL;
+    }
+
+  /* Initialize the device state structure */
+
+  sem_init(&priv->exclsem, 0, 1);
+  priv->config = config;
+
+  priv->spi = dev;
+
+  /* Attach the XEN1210 interrupt handler. */
+
+  config->attach(config, (xen1210_handler_t)xen1210_interrupt,
+                 (FAR void *)priv);
+
+  /* Device initialization sequence */
+  /* Power off */
+
+  regval = (XEN1210_POWEROFF);
+
+  xen1210_putdata(priv, regval);
+
+  /* Timing */
+
+  regval  = (XEN1210_TIMING);
+  regval |= 0x131100;
+
+  xen1210_putdata(priv, regval);
+
+  /* Test */
+
+  regval  = (XEN1210_TEST);
+  regval |= 0x003A00;
+
+  xen1210_putdata(priv, regval);
+
+  /* Power on */
+
+  regval = (XEN1210_POWERON);
+
+  xen1210_putdata(priv, regval); /* X axis */
+
+  config->clear(config);
+  config->enable(config, true);
+
+  /* Return our private data structure as an opaque handle */
+
+  return (XEN1210_HANDLE)priv;
+}
+
+/****************************************************************************
+ * Name: xen1210_register
+ *
+ * Description:
+ *  This function will register the touchscreen driver as /dev/accelN where N
+ *  is the minor device number
+ *
+ * Input Parameters:
+ *   handle    - The handle previously returned by xen1210_register
+ *   minor     - The input device minor number
+ *
+ * Returned Value:
+ *   Zero is returned on success.  Otherwise, a negated errno value is
+ *   returned to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+int xen1210_register(XEN1210_HANDLE handle, int minor)
+{
+  FAR struct xen1210_dev_s *priv = (FAR struct xen1210_dev_s *)handle;
+  char devname[DEV_NAMELEN];
+  int ret;
+
+  sninfo("handle=%p minor=%d\n", handle, minor);
+  DEBUGASSERT(priv);
+
+  /* Get exclusive access to the device structure */
+
+  ret = sem_wait(&priv->exclsem);
+  if (ret < 0)
+    {
+      int errval = errno;
+      snerr("ERROR: sem_wait failed: %d\n", errval);
+      return -errval;
+    }
+
+  /* Register the character driver */
+
+  snprintf(devname, DEV_NAMELEN, DEV_FORMAT, minor);
+  ret = register_driver(devname, &g_xen1210fops, 0666, priv);
+  if (ret < 0)
+    {
+      snerr("ERROR: Failed to register driver %s: %d\n", devname, ret);
+      sem_post(&priv->exclsem);
+      return ret;
+    }
+
+  /* Indicate that the accelerometer was successfully initialized */
+
+  priv->status |= XEN1210_STAT_INITIALIZED;  /* Accelerometer is initialized */
+  sem_post(&priv->exclsem);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: xen1210_getdata
+ *
+ * Description:
+ *   Read 24-bit from XEN1210 buffer, read three times (3 sensors)
+ *
+ ****************************************************************************/
+
+void xen1210_getdata(FAR struct xen1210_dev_s *priv)
+{
+  uint32_t regval;
+
+  /* If SPI bus is shared then lock and configure it */
+
+  (void)SPI_LOCK(priv->spi, true);
+  xen1210_configspi(priv->spi);
+
+  /* Select the XEN1210 */
+
+  SPI_SELECT(priv->spi, SPIDEV_ACCELEROMETER, true);
+
+  /* Read three times 3 bytes = 24 bits * 3 */
+
+  SPI_RECVBLOCK(priv->spi, ®val, 3);
+  priv->sample.data_x = regval & 0xFFFFFF;
+
+  SPI_RECVBLOCK(priv->spi, ®val, 3);
+  priv->sample.data_y = regval & 0xFFFFFF;
+
+  SPI_RECVBLOCK(priv->spi, ®val, 3);
+  priv->sample.data_z = regval & 0xFFFFFF;
+
+  /* Deselect the XEN1210 */
+
+  SPI_SELECT(priv->spi, SPIDEV_ACCELEROMETER, false);
+
+  /* Unlock bus */
+
+  (void)SPI_LOCK(priv->spi, false);
+
+#ifdef CONFIG_XEN1210_REGDEBUG
+  _err("%02x->%02x\n", regaddr, regval);
+#endif
+}
+
+/****************************************************************************
+ * Name: xen1210_putdata
+ *
+ * Description:
+ *   Write 24-bit to XEN1210 buffer, write three times (3 sensors)
+ *
+ ****************************************************************************/
+
+void xen1210_putdata(FAR struct xen1210_dev_s *priv, uint32_t regval)
+{
+#ifdef CONFIG_XEN1210_REGDEBUG
+  _err("%02x<-%02x\n", regaddr, regval);
+#endif
+
+  /* If SPI bus is shared then lock and configure it */
+
+  (void)SPI_LOCK(priv->spi, true);
+  xen1210_configspi(priv->spi);
+
+  /* Select the XEN1210 */
+
+  SPI_SELECT(priv->spi, SPIDEV_ACCELEROMETER, true);
+
+  /* We need to write to 3 sensors in the daisy-chain */
+  /* Write three times 3 bytes */
+
+  (void)SPI_SNDBLOCK(priv->spi, ®val, 3);
+  (void)SPI_SNDBLOCK(priv->spi, ®val, 3);
+  (void)SPI_SNDBLOCK(priv->spi, ®val, 3);
+
+  /* Deselect the XEN1210 */
+
+  SPI_SELECT(priv->spi, SPIDEV_ACCELEROMETER, false);
+
+  /* Unlock bus */
+
+  (void)SPI_LOCK(priv->spi, false);
+}
+
+#endif /* CONFIG_SENSORS_XEN1210 */
diff --git a/drivers/sensors/xen1210.h b/drivers/sensors/xen1210.h
new file mode 100644
index 0000000000000000000000000000000000000000..08e7b4aba4f86c765c88dc27846b1e0ffd661c86
--- /dev/null
+++ b/drivers/sensors/xen1210.h
@@ -0,0 +1,129 @@
+/********************************************************************************************
+ * drivers/sensors/xen1210.h
+ *
+ *   Copyright (C) 2014 Alan Carvalho de Assis
+ *   Author: Alan Carvalho de Assis 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************************/
+
+#ifndef __DRIVERS_SENSORS_XEN1210_H
+#define __DRIVERS_SENSORS_XEN1210_H
+
+/********************************************************************************************
+ * Included Files
+ ********************************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#if defined(CONFIG_XEN1210)
+
+/********************************************************************************************
+ * Pre-processor Definitions
+ ********************************************************************************************/
+
+/* Driver support ***************************************************************************/
+/* This format is used to construct the /dev/mag[n] device driver path.  It is defined here
+ * so that it will be used consistently in all places.
+ */
+
+#define DEV_FORMAT   "/dev/mag%d"
+#define DEV_NAMELEN  16
+
+/* Driver flags */
+
+#define XEN1210_STAT_INITIALIZED  1 /* Device has been initialized */
+
+/********************************************************************************************
+ * Public Types
+ ********************************************************************************************/
+
+/* This structure describes the results of one XEN1210 sample */
+
+struct xen1210_sample_s
+{
+  uint32_t data_x;                     /* Measured X-axis magnetic field */
+  uint32_t data_y;                     /* Measured Y-axis magnetic field */
+  uint32_t data_z;                     /* Measured Z-axis magnetic filed */
+};
+
+/* This structure represents the state of the XEN1210 driver */
+
+struct xen1210_dev_s
+{
+  /* Common fields */
+
+  FAR struct xen1210_config_s *config; /* Board configuration data */
+  sem_t exclsem;                       /* Manages exclusive access to this structure */
+  FAR struct spi_dev_s *spi;           /* Saved SPI driver instance */
+
+  uint8_t status;                      /* See XEN1210_STAT_* definitions */
+  struct work_s work;                  /* Supports the interrupt handling "bottom half" */
+
+  uint8_t nwaiters;                    /* Number of threads waiting for XEN1210 data */
+
+  sem_t waitsem;                       /* Used to wait for the availability of data */
+
+  struct work_s timeout;               /* Supports timeout work */
+  struct xen1210_sample_s sample;      /* Last sampled accelerometer data */
+};
+
+/********************************************************************************************
+ * Public Function Prototypes
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Name: xen1210_getdata
+ *
+ * Description:
+ *   Read 24-bit from XEN1210 buffer, read three times (3 sensors)
+ *
+ ********************************************************************************************/
+
+void xen1210_getdata(FAR struct xen1210_dev_s *priv);
+
+/********************************************************************************************
+ * Name: xen1210_putdata
+ *
+ * Description:
+ *   Write 24-bit to XEN1210 buffer, write three times (3 sensors)
+ *
+ ********************************************************************************************/
+
+void xen1210_putdata(FAR struct xen1210_dev_s *priv, uint32_t regval);
+
+#endif /* CONFIG_SENSORS_XEN1210 */
+#endif /* __DRIVERS_SENSORS_XEN1210_H */
diff --git a/drivers/sensors/zerocross.c b/drivers/sensors/zerocross.c
index 980ffdd86ca5a6390dfc77312dcf539c21feec1b..0140b9ba7287978678e52bf6b94e1dd7b3d8c04d 100644
--- a/drivers/sensors/zerocross.c
+++ b/drivers/sensors/zerocross.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -64,14 +60,13 @@
 
 #ifdef CONFIG_ZEROCROSS
 
-#ifdef CONFIG_DISABLE_SIGNALS
-#error "This driver needs SIGNAL support, remove CONFIG_DISABLE_SIGNALS"
-#endif
-
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
-/* Debug ********************************************************************/
+
+#ifdef CONFIG_DISABLE_SIGNALS
+#  error "This driver needs SIGNAL support, remove CONFIG_DISABLE_SIGNALS"
+#endif
 
 /****************************************************************************
  * Private Type Definitions
@@ -132,15 +127,18 @@ static void    zerocross_interrupt(FAR const struct zc_lowerhalf_s *lower,
 
 static const struct file_operations g_zcops =
 {
-  zc_open,  /* open */
-  zc_close, /* close */
-  zc_read,  /* read */
-  zc_write, /* write */
+  zc_open,   /* open */
+  zc_close,  /* close */
+  zc_read,   /* read */
+  zc_write,  /* write */
   0,         /* seek */
-  zc_ioctl  /* ioctl */
+  zc_ioctl   /* ioctl */
 #ifndef CONFIG_DISABLE_POLL
   , 0        /* poll */
 #endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  , 0        /* unlink */
+#endif
 };
 
 volatile int sample = 0;
@@ -244,7 +242,7 @@ static int zc_open(FAR struct file *filep)
   ret = sem_wait(&priv->exclsem);
   if (ret < 0)
     {
-      snvdbg("ERROR: sem_wait failed: %d\n", ret);
+      snerr("ERROR: sem_wait failed: %d\n", ret);
       return ret;
     }
 
@@ -253,7 +251,7 @@ static int zc_open(FAR struct file *filep)
   opriv = (FAR struct zc_open_s *)kmm_zalloc(sizeof(struct zc_open_s));
   if (!opriv)
     {
-      snvdbg("ERROR: Failled to allocate open structure\n");
+      snerr("ERROR: Failled to allocate open structure\n");
       ret = -ENOMEM;
       goto errout_with_sem;
     }
@@ -325,7 +323,7 @@ static int zc_close(FAR struct file *filep)
   ret = sem_wait(&priv->exclsem);
   if (ret < 0)
     {
-      snvdbg("ERROR: sem_wait failed: %d\n", ret);
+      snerr("ERROR: sem_wait failed: %d\n", ret);
       return ret;
     }
 
@@ -338,7 +336,7 @@ static int zc_close(FAR struct file *filep)
   DEBUGASSERT(curr);
   if (!curr)
     {
-      snvdbg("ERROR: Failed to find open entry\n");
+      snerr("ERROR: Failed to find open entry\n");
       ret = -ENOENT;
       goto errout_with_exclsem;
     }
@@ -414,7 +412,7 @@ static int zc_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   FAR struct zc_lowerhalf_s *lower;
   int                        ret;
 
-  snvdbg("cmd: %d arg: %ld\n", cmd, arg);
+  sninfo("cmd: %d arg: %ld\n", cmd, arg);
   DEBUGASSERT(filep && filep->f_priv && filep->f_inode);
   opriv = filep->f_priv;
   inode = filep->f_inode;
@@ -467,7 +465,7 @@ static int zc_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       default:
         {
-          snvdbg("Forwarding unrecognized cmd: %d arg: %ld\n", cmd, arg);
+          snerr("ERROR: Unrecognized cmd: %d arg: %ld\n", cmd, arg);
           ret = -ENOTTY;
         }
         break;
@@ -485,7 +483,7 @@ static int zc_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
  * Name: zc_register
  *
  * Description:
- *   Register the Zero Cross lower half device as 'devpath'
+ *   Register the Zero Cross character device as 'devpath'
  *
  * Input Parameters:
  *   devpath - The full path to the driver to register. E.g., "/dev/zc0"
@@ -516,7 +514,7 @@ int zc_register(FAR const char *devname, FAR struct zc_lowerhalf_s *lower)
 
   if (!priv)
     {
-      snvdbg("ERROR: Failed to allocate device structure\n");
+      snerr("ERROR: Failed to allocate device structure\n");
       return -ENOMEM;
     }
 
@@ -535,7 +533,7 @@ int zc_register(FAR const char *devname, FAR struct zc_lowerhalf_s *lower)
   ret = register_driver(devname, &g_zcops, 0666, priv);
   if (ret < 0)
     {
-      snvdbg("ERROR: register_driver failed: %d\n", ret);
+      snerr("ERROR: register_driver failed: %d\n", ret);
       sem_destroy(&priv->exclsem);
       kmm_free(priv);
     }
diff --git a/drivers/sercomm/README.txt b/drivers/sercomm/README.txt
deleted file mode 100644
index 06add26e88bda7bf977f2eb596944c7607cf65e5..0000000000000000000000000000000000000000
--- a/drivers/sercomm/README.txt
+++ /dev/null
@@ -1,19 +0,0 @@
-drivers/sercomm README
-======================
-
-If CONFIG_SERCOMM_CONSOLE is defined in the NuttX configuration file, NuttX
-will attempt to use sercomm (HDLC protocol) to communicate with the
-host system. Sercomm is the transport used by osmocom-bb that runs on top
-of serial.  See http://bb.osmocom.org/trac/wiki/nuttx-bb/run for detailed
-the usage of nuttx with sercomm.
-
-The drivers/sercomm build that you have the osmocom-bb project directory
-at same level as the nuttx project:
-
-  |- nuttx
-  |- apps
-  `- osmocom-bb
-
-If you attempt to build this driver without osmocom-bb, you will get
-compilation errors because of header files that are needed from the
-osmocom-bb directory.
diff --git a/drivers/sercomm/console.c b/drivers/sercomm/console.c
deleted file mode 100644
index 53b321964f7a6adcdab311bef5ee9c159e3dc44f..0000000000000000000000000000000000000000
--- a/drivers/sercomm/console.c
+++ /dev/null
@@ -1,212 +0,0 @@
-/****************************************************************************
- * drivers/sercomm/console.c
- * Driver for NuttX Console
- *
- * (C) 2010 by Harald Welte 
- * (C) 2011 Stefan Richter 
- *
- * This source code is derivated from Osmocom-BB project and was
- * relicensed as BSD with permission from original authors.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#include 
-#include 
-#include 
-#include 
-
-#include 
-#include 
-#include 
-
-#include "uart.h"
-#include 
-
-/************************************************************************************
- * Fileops Prototypes and Structures
- ************************************************************************************/
-
-typedef FAR struct file    file_t;
-
-static ssize_t sc_console_read(file_t *filep, FAR char *buffer, size_t buflen);
-static ssize_t sc_console_write(file_t *filep, FAR const char *buffer, size_t buflen);
-static int     sc_console_ioctl(file_t *filep, int cmd, unsigned long arg);
-#ifndef CONFIG_DISABLE_POLL
-static int     sc_console_poll(file_t *filep, FAR struct pollfd *fds, bool setup);
-#endif
-
-static const struct file_operations g_sercom_console_ops =
-{
-  0,      /* open, always opened */
-  0,      /* close, stays open */
-  sc_console_read,  /* read */
-  sc_console_write,  /* write */
-  0,      /* seek, not supported */
-  sc_console_ioctl,  /* ioctl */
-#ifndef CONFIG_DISABLE_POLL
-  sc_console_poll    /* poll */
-#endif
-};
-
-static FAR uart_dev_t *readdev = NULL;
-static struct msgb *recvmsg = NULL;
-
-/****************************************************************************
- * Helper functions
- ****************************************************************************/
-
-static void recv_cb(uint8_t dlci, struct msgb *msg)
-{
-  sem_post(&readdev->recvsem);
-  recvmsg = msg;
-}
-
-/****************************************************************************
- * Fileops
- ****************************************************************************/
-
-/* REVISIT: recvmsg is overwritten when multiple msg arrive! */
-
-static ssize_t sc_console_read(file_t *filep, FAR char *buffer, size_t buflen)
-{
-  size_t len;
-  struct msgb *tmp;
-
-  /* Wait until data is received */
-
-  while (recvmsg == NULL)
-    {
-      sem_wait(&readdev->recvsem);
-    }
-
-  len = recvmsg->len > buflen ? buflen : recvmsg->len;
-  memcpy(buffer, msgb_get(recvmsg, len), len);
-
-  if (recvmsg->len == 0)
-    {
-      /* prevent inconsistent msg by first invalidating it, then free it */
-
-      tmp = recvmsg;
-      recvmsg = NULL;
-      msgb_free(tmp);
-    }
-
-  return len;
-}
-
-/* REVISIT: redirect to old Osmocom-BB comm/sercomm_cons.c -> 2 buffers */
-
-extern int sercomm_puts(const char *s);
-
-static ssize_t sc_console_write(file_t *filep, FAR const char *buffer, size_t buflen)
-{
-  char dstbuf[32];
-  int cnt;
-
-  if (buflen >= 31)
-    {
-      cnt = 31;
-    }
-  else
-    {
-      cnt = buflen;
-    }
-
-  memcpy(dstbuf, buffer, cnt);
-  dstbuf[cnt] = '\0';
-
-  /* print part of our buffer */
-
-  sercomm_puts(dstbuf);
-
-  /* wait a little bit to get data transfered */
-
-  up_mdelay(1);
-
-  return cnt;
-}
-
-/* Forward ioctl to uart driver */
-
-static int sc_console_ioctl(struct file *filep, int cmd, unsigned long arg)
-{
-  FAR struct inode *inode = filep->f_inode;
-  FAR uart_dev_t   *dev   = inode->i_private;
-
-  return dev->ops->ioctl(filep, cmd, arg);
-}
-
-/************************************************************************************
- * Public Functions
- ************************************************************************************/
-
-/* Use sercomm on uart driver, register console driver */
-
-int sercomm_register(FAR const char *path, FAR uart_dev_t *dev)
-{
-  /* REVISIT: initialize MODEMUART to be used for sercomm */
-
-  uart_init(SERCOMM_UART_NR, 1);
-  uart_baudrate(SERCOMM_UART_NR, UART_115200);
-  readdev = dev;
-  sercomm_register_rx_cb(SC_DLCI_LOADER, &recv_cb);
-
-  sem_init(&dev->xmit.sem, 0, 1);
-  sem_init(&dev->recv.sem, 0, 1);
-  sem_init(&dev->closesem, 0, 1);
-  sem_init(&dev->xmitsem,  0, 0);
-  sem_init(&dev->recvsem,  0, 0);
-#ifndef CONFIG_DISABLE_POLL
-  sem_init(&dev->pollsem,  0, 1);
-#endif
-
-  dbg("Registering %s\n", path);
-  return register_driver(path, &g_sercom_console_ops, 0666, NULL);
-}
-
-/* Stubs to make serial driver happy */
-
-void sercomm_recvchars(void *a)
-{
-}
-
-void sercomm_xmitchars(void *a)
-{
-}
-
-/* Stubs to make memory allocator happy */
-
-void cons_puts(void *foo)
-{
-}
-
-void delay_ms(int ms)
-{
-}
diff --git a/drivers/sercomm/loadwriter.py b/drivers/sercomm/loadwriter.py
deleted file mode 100755
index 6234d6f0d3ec80053690c3719f40fde8072f4566..0000000000000000000000000000000000000000
--- a/drivers/sercomm/loadwriter.py
+++ /dev/null
@@ -1,19 +0,0 @@
-#!/usr/bin/python
-from socket import *
-import time
-
-SOCKET_NAME = '/tmp/osmocom_loader'
-
-s = socket(AF_UNIX, SOCK_STREAM)
-s.connect(SOCKET_NAME)
-
-while 1:
-  try:
-    x = raw_input(">")
-    y = len(x) + 1
-    s.send(chr(y>>8) + chr(y&255) + x + "\n")
-  except:
-    print ''
-    break
-
-s.close()
diff --git a/drivers/sercomm/uart.c b/drivers/sercomm/uart.c
deleted file mode 100644
index 9e257455a89c62631c921e8c6deee80f0549bc5c..0000000000000000000000000000000000000000
--- a/drivers/sercomm/uart.c
+++ /dev/null
@@ -1,607 +0,0 @@
-/****************************************************************************
- * drivers/sercomm/uart.c
- * Calypso DBB internal UART Driver
- *
- * (C) 2010 by Harald Welte 
- * (C) 2010 by Ingo Albrecht 
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#include 
-#include 
-#include 
-
-#include 
-#include 
-#include 
-
-#include 
-#include 
-
-#include 
-#include 
-
-#include "uart.h"
-
-#define BASE_ADDR_UART_MODEM  0xffff5000
-#define OFFSET_IRDA    0x800
-
-#define UART_REG(n,m)  (BASE_ADDR_UART_MODEM + ((n)*OFFSET_IRDA)+(m))
-
-#define LCR7BIT        0x80
-#define LCRBFBIT       0x40
-#define MCR6BIT        0x20
-#define REG_OFFS(m)    ((m) & ~(LCR7BIT|LCRBFBIT|MCR6BIT))
-
-/* read access LCR[7] = 0 */
-
-enum uart_reg
-{
-  RHR  = 0,
-  IER  = 1,
-  IIR  = 2,
-  LCR  = 3,
-  MCR  = 4,
-  LSR  = 5,
-  MSR  = 6,
-  SPR  = 7,
-  MDR1  = 8,
-  DMR2  = 9,
-  SFLSR  = 0x0a,
-  RESUME  = 0x0b,
-  SFREGL  = 0x0c,
-  SFREGH  = 0x0d,
-  BLR  = 0x0e,
-  ACREG  = 0x0f,
-  SCR  = 0x10,
-  SSR  = 0x11,
-  EBLR  = 0x12,
-
-  /* read access LCR[7] = 1 */
-
-  DLL  = RHR | LCR7BIT,
-  DLH  = IER | LCR7BIT,
-  DIV1_6  = ACREG | LCR7BIT,
-
-  /* read/write access LCR[7:0] = 0xbf */
-
-  EFR  = IIR | LCRBFBIT,
-  XON1  = MCR | LCRBFBIT,
-  XON2  = LSR | LCRBFBIT,
-  XOFF1  = MSR | LCRBFBIT,
-  XOFF2   = SPR | LCRBFBIT,
-
-  /* read/write access if EFR[4] = 1 and MCR[6] = 1 */
-
-  TCR  = MSR | MCR6BIT,
-  TLR  = SPR | MCR6BIT,
-};
-
-/* write access LCR[7] = 0 */
-
-#define THR    RHR
-#define FCR    IIR    /* only if EFR[4] = 1 */
-#define TXFLL  SFLSR
-#define TXFLH  RESUME
-#define RXFLL  SFREGL
-#define RXFLH  SFREGH
-
-enum fcr_bits
-{
-  FIFO_EN        = (1 << 0),
-  RX_FIFO_CLEAR  = (1 << 1),
-  TX_FIFO_CLEAR  = (1 << 2),
-  DMA_MODE       = (1 << 3),
-};
-
-#define TX_FIFO_TRIG_SHIFT  4
-#define RX_FIFO_TRIG_SHIFT  6
-
-enum iir_bits
-{
-  IIR_INT_PENDING              = 0x01,
-  IIR_INT_TYPE                 = 0x3E,
-  IIR_INT_TYPE_RX_STATUS_ERROR = 0x06,
-  IIR_INT_TYPE_RX_TIMEOUT      = 0x0C,
-  IIR_INT_TYPE_RHR             = 0x04,
-  IIR_INT_TYPE_THR             = 0x02,
-  IIR_INT_TYPE_MSR             = 0x00,
-  IIR_INT_TYPE_XOFF            = 0x10,
-  IIR_INT_TYPE_FLOW            = 0x20,
-  IIR_FCR0_MIRROR              = 0xC0,
-};
-
-#define UART_REG_UIR  0xffff6000
-
-/* enable or disable the divisor latch for access to DLL, DLH */
-
-static void uart_set_lcr7bit(int uart, int on)
-{
-  uint8_t reg;
-
-  reg = readb(UART_REG(uart, LCR));
-  if (on)
-    {
-      reg |= (1 << 7);
-    }
-  else
-    {
-      reg &= ~(1 << 7);
-    }
-
-  writeb(reg, UART_REG(uart, LCR));
-}
-
-static uint8_t old_lcr;
-static void uart_set_lcr_bf(int uart, int on)
-{
-  if (on)
-    {
-      old_lcr = readb(UART_REG(uart, LCR));
-      writeb(0xBF, UART_REG(uart, LCR));
-    }
-  else
-    {
-      writeb(old_lcr, UART_REG(uart, LCR));
-    }
-}
-
-/* Enable or disable the TCR_TLR latch bit in MCR[6] */
-
-static void uart_set_mcr6bit(int uart, int on)
-{
-  uint8_t mcr;
-
-  /* we assume EFR[4] is always set to 1 */
-
-  mcr = readb(UART_REG(uart, MCR));
-  if (on)
-    {
-      mcr |= (1 << 6);
-    }
-  else
-    {
-      mcr &= ~(1 << 6);
-    }
-
-  writeb(mcr, UART_REG(uart, MCR));
-}
-
-static void uart_reg_write(int uart, enum uart_reg reg, uint8_t val)
-{
-  if (reg & LCRBFBIT)
-    {
-      uart_set_lcr_bf(uart, 1);
-    }
-  else if (reg & LCR7BIT)
-    {
-      uart_set_lcr7bit(uart, 1);
-    }
-  else if (reg & MCR6BIT)
-    {
-      uart_set_mcr6bit(uart, 1);
-    }
-
-  writeb(val, UART_REG(uart, REG_OFFS(reg)));
-
-  if (reg & LCRBFBIT)
-    {
-      uart_set_lcr_bf(uart, 0);
-    }
-  else if (reg & LCR7BIT)
-    {
-      uart_set_lcr7bit(uart, 0);
-    }
-  else if (reg & MCR6BIT)
-    {
-      uart_set_mcr6bit(uart, 0);
-    }
-}
-
-/* read from a UART register, applying any required latch bits */
-
-static uint8_t uart_reg_read(int uart, enum uart_reg reg)
-{
-  uint8_t ret;
-
-  if (reg & LCRBFBIT)
-    {
-     uart_set_lcr_bf(uart, 1);
-    }
-  else if (reg & LCR7BIT)
-    {
-      uart_set_lcr7bit(uart, 1);
-    }
-  else if (reg & MCR6BIT)
-    {
-      uart_set_mcr6bit(uart, 1);
-    }
-
-  ret = readb(UART_REG(uart, REG_OFFS(reg)));
-
-  if (reg & LCRBFBIT)
-    {
-      uart_set_lcr_bf(uart, 0);
-    }
-  else if (reg & LCR7BIT)
-    {
-      uart_set_lcr7bit(uart, 0);
-    }
-  else if (reg & MCR6BIT)
-    {
-      uart_set_mcr6bit(uart, 0);
-    }
-
-  return ret;
-}
-
-#if 0
-static void uart_irq_handler_cons(__unused enum irq_nr irqnr)
-{
-  const uint8_t uart = CONS_UART_NR;
-  uint8_t iir;
-
-  iir = uart_reg_read(uart, IIR);
-  if (iir & IIR_INT_PENDING)
-    {
-      return;
-    }
-
-  switch (iir & IIR_INT_TYPE)
-    {
-    case IIR_INT_TYPE_RHR:
-      break;
-
-    case IIR_INT_TYPE_THR:
-      if (cons_rb_flush() == 1)
-        {
-          /* everything was flushed, disable THR IRQ */
-
-          uint8_t ier = uart_reg_read(uart, IER);
-          ier &= ~(1 << 1);
-          uart_reg_write(uart, IER, ier);
-        }
-      break;
-
-    case IIR_INT_TYPE_MSR:
-      break;
-
-    case IIR_INT_TYPE_RX_STATUS_ERROR:
-      break;
-
-    case IIR_INT_TYPE_RX_TIMEOUT:
-      break;
-
-    case IIR_INT_TYPE_XOFF:
-      break;
-  }
-}
-#endif
-
-static void uart_irq_handler_sercomm(__unused enum irq_nr irqnr, __unused void *context)
-{
-  const uint8_t uart = SERCOMM_UART_NR;
-  uint8_t iir, ch;
-
-  iir = uart_reg_read(uart, IIR);
-  if (iir & IIR_INT_PENDING)
-    {
-      return;
-    }
-
-  switch (iir & IIR_INT_TYPE)
-    {
-    case IIR_INT_TYPE_RX_TIMEOUT:
-    case IIR_INT_TYPE_RHR:
-      /* as long as we have rx data available */
-
-      while (uart_getchar_nb(uart, &ch))
-        {
-          if (sercomm_drv_rx_char(ch) < 0)
-            {
-              /* sercomm cannot receive more data right now */
-
-              uart_irq_enable(uart, UART_IRQ_RX_CHAR, 0);
-            }
-        }
-      break;
-
-    case IIR_INT_TYPE_THR:
-      /* as long as we have space in the FIFO */
-
-      while (!uart_tx_busy(uart))
-        {
-          /* get a byte from sercomm */
-
-          if (!sercomm_drv_pull(&ch))
-            {
-              /* no more bytes in sercomm, stop TX interrupts */
-
-              uart_irq_enable(uart, UART_IRQ_TX_EMPTY, 0);
-              break;
-            }
-
-          /* write the byte into the TX FIFO */
-
-          uart_putchar_nb(uart, ch);
-        }
-      break;
-
-    case IIR_INT_TYPE_MSR:
-      printf("UART IRQ MSR\n");
-      break;
-
-    case IIR_INT_TYPE_RX_STATUS_ERROR:
-      printf("UART IRQ RX_SE\n");
-      break;
-
-    case IIR_INT_TYPE_XOFF:
-      printf("UART IRQXOFF\n");
-      break;
-    }
-}
-
-static const uint8_t uart2irq[] =
-{
-  [0]  = IRQ_UART_IRDA,
-  [1]  = IRQ_UART_MODEM,
-};
-
-void uart_init(uint8_t uart, uint8_t interrupts)
-{
-#if 0
-  uint8_t irq = uart2irq[uart];
-#endif
-
-  uart_reg_write(uart, IER, 0x00);
-
-  if (uart == SERCOMM_UART_NR)
-    {
-      sercomm_init();
-      irq_attach(IRQ_UART_MODEM, (xcpt_t)uart_irq_handler_sercomm);
-      up_enable_irq(IRQ_UART_MODEM);
-      uart_irq_enable(uart, UART_IRQ_RX_CHAR, 1);
-    }
-
-#if 0
-  if (uart == CONS_UART_NR)
-    {
-      cons_init();
-      if (interrupts)
-        {
-          irq_register_handler(irq, &uart_irq_handler_cons);
-          irq_config(irq, 0, 0, 0xff);
-          irq_enable(irq);
-        }
-    }
-  else
-    {
-      sercomm_init();
-      if (interrupts)
-        {
-          irq_register_handler(irq, &uart_irq_handler_sercomm);
-          irq_config(irq, 0, 0, 0xff);
-          irq_enable(irq);
-        }
-
-      uart_irq_enable(uart, UART_IRQ_RX_CHAR, 1);
-    }
-#endif
-#if 0
-  if (uart == 1)
-    {
-      /* assign UART to MCU and unmask interrupts */
-
-      writeb(UART_REG_UIR, 0x00);
-    }
-#endif
-
-  /* if we don't initialize these, we get strange corruptions in the
-   * received data... :-(
-   */
-
-  uart_reg_write(uart,  MDR1, 0x07); /* turn off UART */
-  uart_reg_write(uart,  XON1, 0x00); /* Xon1/Addr Register */
-  uart_reg_write(uart,  XON2, 0x00); /* Xon2/Addr Register */
-  uart_reg_write(uart, XOFF1, 0x00); /* Xoff1 Register */
-  uart_reg_write(uart, XOFF2, 0x00); /* Xoff2 Register */
-  uart_reg_write(uart,   EFR, 0x00); /* Enhanced Features Register */
-
-  /* select  UART mode */
-
-  uart_reg_write(uart, MDR1, 0);
-
-  /* no XON/XOFF flow control, ENHANCED_EN, no auto-RTS/CTS */
-
-  uart_reg_write(uart, EFR, (1 << 4));
-
-  /* enable Tx/Rx FIFO, Tx trigger at 56 spaces, Rx trigger at 60 chars */
-
-  uart_reg_write(uart, FCR, FIFO_EN | RX_FIFO_CLEAR | TX_FIFO_CLEAR |
-                (3 << TX_FIFO_TRIG_SHIFT) | (3 << RX_FIFO_TRIG_SHIFT));
-
-  /* THR interrupt only when TX FIFO and TX shift register are empty */
-
-  uart_reg_write(uart, SCR, (1 << 0)); /* | (1 << 3)); */
-
-  /* 8 bit, 1 stop bit, no parity, no break */
-
-  uart_reg_write(uart, LCR, 0x03);
-
-  uart_set_lcr7bit(uart, 0);
-}
-
-void uart_poll(uint8_t uart)
-{
-#if 0
-  if (uart == CONS_UART_NR)
-    {
-      uart_irq_handler_cons(0);
-    }
-  else
-#endif
-    {
-      uart_irq_handler_sercomm(0, NULL);
-    }
-}
-
-void uart_irq_enable(uint8_t uart, enum uart_irq irq, int on)
-{
-  uint8_t ier = uart_reg_read(uart, IER);
-  uint8_t mask = 0;
-
-  switch (irq)
-    {
-    case UART_IRQ_TX_EMPTY:
-      mask = (1 << 1);
-      break;
-
-    case UART_IRQ_RX_CHAR:
-      mask = (1 << 0);
-      break;
-    }
-
-  if (on)
-    {
-      ier |= mask;
-    }
-  else
-    {
-      ier &= ~mask;
-    }
-
-  uart_reg_write(uart, IER, ier);
-}
-
-void uart_putchar_wait(uint8_t uart, int c)
-{
-  /* wait while TX FIFO indicates full */
-
-  while (readb(UART_REG(uart, SSR)) & 0x01) { }
-
-  /* put character in TX FIFO */
-
-  writeb(c, UART_REG(uart, THR));
-}
-
-int uart_putchar_nb(uint8_t uart, int c)
-{
-  /* if TX FIFO indicates full, abort */
-
-  if (readb(UART_REG(uart, SSR)) & 0x01)
-    {
-      return 0;
-    }
-
-  writeb(c, UART_REG(uart, THR));
-  return 1;
-}
-
-int uart_getchar_nb(uint8_t uart, uint8_t *ch)
-{
-  uint8_t lsr;
-
-  lsr = readb(UART_REG(uart, LSR));
-
-  /* something strange happened */
-
-  if (lsr & 0x02)
-    {
-      printf("LSR RX_OE\n");
-    }
-
-  if (lsr & 0x04)
-    {
-      printf("LSR RX_PE\n");
-    }
-
-  if (lsr & 0x08)
-    {
-      printf("LSR RX_FE\n");
-    }
-
-  if (lsr & 0x10)
-    {
-      printf("LSR RX_BI\n");
-    }
-
-  if (lsr & 0x80)
-    {
-      printf("LSR RX_FIFO_STS\n");
-    }
-
-  /* is the Rx FIFO empty? */
-
-  if (!(lsr & 0x01))
-    {
-      return 0;
-    }
-
-  *ch = readb(UART_REG(uart, RHR));
-  return 1;
-}
-
-int uart_tx_busy(uint8_t uart)
-{
-  if (readb(UART_REG(uart, SSR)) & 0x01)
-    {
-      return 1;
-    }
-
-  return 0;
-}
-
-static const uint16_t divider[] =
-{
-  [UART_38400]  = 21,  /*   38,690 */
-  [UART_57600]  = 14,  /*   58,035 */
-  [UART_115200]  = 7,  /*  116,071 */
-  [UART_230400]  = 4,  /*  203,125! (-3% would be 223,488) */
-  [UART_460800]  = 2,  /*  406,250! (-3% would be 446,976) */
-  [UART_921600]  = 1,  /*  812,500! (-3% would be 893,952) */
-};
-
-int uart_baudrate(uint8_t uart, enum uart_baudrate bdrt)
-{
-  uint16_t div;
-
-  if (bdrt > ARRAY_SIZE(divider))
-    {
-      return -1;
-    }
-
-  div = divider[bdrt];
-  uart_set_lcr7bit(uart, 1);
-  writeb(div & 0xff, UART_REG(uart, DLL));
-  writeb(div >> 8, UART_REG(uart, DLH));
-  uart_set_lcr7bit(uart, 0);
-
-  return 0;
-}
diff --git a/drivers/sercomm/uart.h b/drivers/sercomm/uart.h
deleted file mode 100644
index 81d7a15609ef9280c013602a85c644fe0bc3e1d6..0000000000000000000000000000000000000000
--- a/drivers/sercomm/uart.h
+++ /dev/null
@@ -1,32 +0,0 @@
-#ifndef _UART_H
-#define _UART_H
-
-#include 
-
-enum uart_baudrate {
-	UART_38400,
-	UART_57600,
-	UART_115200,
-	UART_230400,
-	UART_460800,
-	UART_614400,
-	UART_921600,
-};
-
-void uart_init(uint8_t uart, uint8_t interrupts);
-void uart_putchar_wait(uint8_t uart, int c);
-int uart_putchar_nb(uint8_t uart, int c);
-int uart_getchar_nb(uint8_t uart, uint8_t *ch);
-int uart_tx_busy(uint8_t uart);
-int uart_baudrate(uint8_t uart, enum uart_baudrate bdrt);
-
-enum uart_irq {
-	UART_IRQ_TX_EMPTY,
-	UART_IRQ_RX_CHAR,
-};
-
-void uart_irq_enable(uint8_t uart, enum uart_irq irq, int on);
-
-void uart_poll(uint8_t uart);
-
-#endif /* _UART_H */
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index ef4858171dce2d95ee179c57c91b078b29fb57bd..53ef72c3cb566afdefb7ce4d824934e4f7b124f8 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -13,6 +13,11 @@ config DEV_LOWCONSOLE
 
 config SERIAL_REMOVABLE
 	bool
+	default n
+
+config SERIAL_CONSOLE
+	bool
+	default n
 
 config 16550_UART
 	bool "16550 UART Chip support"
@@ -292,18 +297,22 @@ choice
 config 16550_UART0_SERIAL_CONSOLE
 	bool "16550 UART0 serial console"
 	depends on 16550_UART0
+	select SERIAL_CONSOLE
 
 config 16550_UART1_SERIAL_CONSOLE
 	bool "16550 UART1 serial console"
 	depends on 16550_UART1
+	select SERIAL_CONSOLE
 
 config 16550_UART2_SERIAL_CONSOLE
 	bool "16550 UART2 serial console"
 	depends on 16550_UART2
+	select SERIAL_CONSOLE
 
 config 16550_UART3_SERIAL_CONSOLE
 	bool "16550 UART3 serial console"
 	depends on 16550_UART3
+	select SERIAL_CONSOLE
 
 config 16550_NO_SERIAL_CONSOLE
 	bool "No 16550 serial console"
@@ -531,7 +540,7 @@ endif # SERIAL_IFLOWCONTROL_WATERMARKS
 config SERIAL_TIOCSERGSTRUCT
 	bool "Support TIOCSERGSTRUCT"
 	default n
-	depends on DEBUG && (MCU_SERIAL || 16550_UART)
+	depends on DEBUG_FEATURES && (MCU_SERIAL || 16550_UART)
 	---help---
 		As a debug option, many serial bottom half drivers support the TIOCSERGSTRUCT
 		that allows you to get the internal driver data structure.  By default, this
@@ -566,89 +575,111 @@ choice
 config UART_SERIAL_CONSOLE
 	bool "UART"
 	depends on UART_SERIALDRIVER
+	select SERIAL_CONSOLE
 
 config UART0_SERIAL_CONSOLE
 	bool "UART0"
 	depends on UART0_SERIALDRIVER
+	select SERIAL_CONSOLE
 
 config USART0_SERIAL_CONSOLE
 	bool "USART0"
 	depends on USART0_SERIALDRIVER
+	select SERIAL_CONSOLE
 
 config UART1_SERIAL_CONSOLE
 	bool "UART1"
 	depends on UART1_SERIALDRIVER
+	select SERIAL_CONSOLE
 
 config USART1_SERIAL_CONSOLE
 	bool "USART1"
 	depends on USART1_SERIALDRIVER
+	select SERIAL_CONSOLE
 
 config UART2_SERIAL_CONSOLE
 	bool "UART2"
 	depends on UART2_SERIALDRIVER
+	select SERIAL_CONSOLE
 
 config USART2_SERIAL_CONSOLE
 	bool "USART2"
 	depends on USART2_SERIALDRIVER
+	select SERIAL_CONSOLE
 
 config UART3_SERIAL_CONSOLE
 	bool "UART3"
 	depends on UART3_SERIALDRIVER
+	select SERIAL_CONSOLE
 
 config USART3_SERIAL_CONSOLE
 	bool "USART3"
 	depends on USART3_SERIALDRIVER
+	select SERIAL_CONSOLE
 
 config UART4_SERIAL_CONSOLE
 	bool "UART4"
 	depends on UART4_SERIALDRIVER
+	select SERIAL_CONSOLE
 
 config USART4_SERIAL_CONSOLE
 	bool "USART4"
 	depends on USART4_SERIALDRIVER
+	select SERIAL_CONSOLE
 
 config UART5_SERIAL_CONSOLE
 	bool "UART5"
 	depends on UART5_SERIALDRIVER
+	select SERIAL_CONSOLE
 
 config USART5_SERIAL_CONSOLE
 	bool "USART5"
 	depends on USART5_SERIALDRIVER
+	select SERIAL_CONSOLE
 
 config UART6_SERIAL_CONSOLE
 	bool "UART6"
 	depends on UART6_SERIALDRIVER
+	select SERIAL_CONSOLE
 
 config USART6_SERIAL_CONSOLE
 	bool "USART6"
 	depends on USART6_SERIALDRIVER
+	select SERIAL_CONSOLE
 
 config UART7_SERIAL_CONSOLE
 	bool "UART7"
 	depends on UART7_SERIALDRIVER
+	select SERIAL_CONSOLE
 
 config USART7_SERIAL_CONSOLE
 	bool "USART7"
 	depends on USART7_SERIALDRIVER
+	select SERIAL_CONSOLE
 
 config UART8_SERIAL_CONSOLE
 	bool "UART8"
 	depends on UART8_SERIALDRIVER
+	select SERIAL_CONSOLE
 
 config USART8_SERIAL_CONSOLE
 	bool "USART8"
 	depends on USART8_SERIALDRIVER
+	select SERIAL_CONSOLE
 
 config SCI0_SERIAL_CONSOLE
 	bool "SCI0"
 	depends on SCI0_SERIALDRIVER
+	select SERIAL_CONSOLE
 
 config SCI1_SERIAL_CONSOLE
 	bool "SCI1"
 	depends on SCI1_SERIALDRIVER
+	select SERIAL_CONSOLE
 
 config OTHER_SERIAL_CONSOLE
 	bool "Other serial console"
+	select SERIAL_CONSOLE
 
 config NO_SERIAL_CONSOLE
 	bool "No serial console"
@@ -1980,3 +2011,55 @@ config SCI1_2STOP
 		1=Two stop bits
 
 endmenu # SCI1 Configuration
+
+menuconfig PSEUDOTERM
+	bool "Pseudo-Terminal (PTY) suppport"
+	default n
+	select PIPES
+	select ARCH_HAVE_SERIAL_TERMIOS
+	---help---
+		Enable support support for master and slave pseudo-terminal devices.
+
+if PSEUDOTERM
+
+choice
+	prompt "PTY model"
+	default PSEUDOTERM_BSD if DISABLE_PSEUDOFS_OPERATIONS
+	default PSEUDOTERM_SUSV1 if !DISABLE_PSEUDOFS_OPERATIONS
+
+config PSEUDOTERM_BSD
+	bool "BSD style"
+	---help---
+		Deprecated BSD style PTYs.
+
+		Master: /dev/ptyN
+		Slave: /dev/ttypN
+
+		Where N is the minor number
+
+config PSEUDOTERM_SUSV1
+	bool "SUSv1 style"
+	depends on !DISABLE_PSEUDOFS_OPERATIONS
+	---help---
+		PTYs as specified in the Single Unix Specification (SUSv1).
+
+		Master: /dev/ptmx (multiplexor)
+		Slave: /dev/pts/N
+
+		Where N is the minor number
+
+endchoice # PTY model
+
+config PSEUDOTERM_RXBUFSIZE
+	int "Pseudo-Terminal Rx buffer size"
+	default 256
+	---help---
+		Master-to-slave pipe buffer size.  Default: 256
+
+config PSEUDOTERM_TXBUFSIZE
+	int "Pseudo-Terminal Tx buffer size"
+	default 256
+	---help---
+		Slave-to-master pipe buffer size.  Default: 256
+
+endif # PSEUDOTERM
diff --git a/drivers/serial/Make.defs b/drivers/serial/Make.defs
index bcbffd8368e8129e5034d7e67838d8a3bdc049f4..e7cc43426d2413c9c2fb7e2964d6ac9486e85a55 100644
--- a/drivers/serial/Make.defs
+++ b/drivers/serial/Make.defs
@@ -47,6 +47,15 @@ ifeq ($(CONFIG_16550_UART),y)
   CSRCS += uart_16550.c
 endif
 
+# Pseudo-terminal support
+
+ifeq ($(CONFIG_PSEUDOTERM),y)
+  CSRCS += pty.c
+ifeq ($(CONFIG_PSEUDOTERM_SUSV1),y)
+  CSRCS += ptmx.c
+endif
+endif
+
 # Include serial build support
 
 DEPPATH += --dep-path serial
diff --git a/drivers/serial/ptmx.c b/drivers/serial/ptmx.c
new file mode 100644
index 0000000000000000000000000000000000000000..dd6bd9fd3c54e369b0380e9e6b8f2f2fbc765236
--- /dev/null
+++ b/drivers/serial/ptmx.c
@@ -0,0 +1,350 @@
+/****************************************************************************
+ * drivers/serial/ptmx.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "pty.h"
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+#ifndef CONFIG_PTY_MAXPTY
+#  define CONFIG_PTY_MAXPTY 32
+#endif
+
+#if CONFIG_PTY_MAXPTY > 256
+#  define CONFIG_PTY_MAXPTY 256
+#endif
+
+#define PTY_MAX   ((CONFIG_PTY_MAXPTY + 31) & ~31)
+#define INDEX_MAX (PTY_MAX >> 5)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* PTMX device state */
+
+struct ptmx_dev_s
+{
+  uint8_t px_next;                  /* Next minor number to allocate */
+  sem_t px_exclsem;                 /* Supports mutual exclusion */
+  uint32_t px_alloctab[INDEX_MAX];  /* Set of allocated PTYs */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int     ptmx_open(FAR struct file *filep);
+static ssize_t ptmx_read(FAR struct file *filep, FAR char *buffer,
+                 size_t buflen);
+static ssize_t ptmx_write(FAR struct file *filep, FAR const char *buffer,
+                 size_t buflen);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct file_operations g_ptmx_fops =
+{
+  ptmx_open,     /* open */
+  NULL,          /* close */
+  ptmx_read,     /* read */
+  ptmx_write,    /* write */
+  NULL,          /* seek */
+  NULL           /* ioctl */
+#ifndef CONFIG_DISABLE_POLL
+  , NULL         /* poll */
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  , NULL         /* unlink */
+#endif
+};
+
+static struct ptmx_dev_s g_ptmx;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: ptmx_semtake and ptmx_semgive
+ *
+ * Description:
+ *   This is just a wrapper to handle the annoying behavior of semaphore
+ *   waits that return due to the receipt of a signal.
+ *
+ ****************************************************************************/
+
+static void ptmx_semtake(void)
+{
+  /* Take the semaphore (perhaps waiting) */
+
+  while (sem_wait(&g_ptmx.px_exclsem) != 0)
+    {
+      /* The only case that an error should occur here is if the wait was
+       * awakened by a signal.
+       */
+
+      DEBUGASSERT(errno == EINTR);
+    }
+}
+
+#define ptmx_semgive() sem_post(&g_ptmx.px_exclsem)
+
+/****************************************************************************
+ * Name: ptmx_minor_allocate
+ *
+ * Description:
+ *   Allocate a new unique PTY minor number.
+ *
+ * Assumptions:
+ *   Caller hold the px_exclsem
+ *
+ ****************************************************************************/
+
+static int ptmx_minor_allocate(void)
+{
+  uint8_t startaddr = g_ptmx.px_next;
+  uint8_t minor;
+  int index;
+  int bitno;
+
+  /* Loop until we find a valid device address */
+
+  for (; ; )
+    {
+      /* Try the next device address */
+
+      minor = g_ptmx.px_next;
+      if (g_ptmx.px_next >= PTY_MAX)
+        {
+          g_ptmx.px_next = 0;
+        }
+      else
+        {
+          g_ptmx.px_next++;
+        }
+
+      /* Is this address already allocated? */
+
+      index = minor >> 5;
+      bitno = minor & 31;
+      if ((g_ptmx.px_alloctab[index] & (1 << bitno)) == 0)
+        {
+          /* No... allocate it now */
+
+          g_ptmx.px_alloctab[index] |= (1 << bitno);
+          return (int)minor;
+        }
+
+      /* This address has already been allocated.  The following logic will
+       * prevent (unexpected) infinite loops.
+       */
+
+      if (startaddr == minor)
+        {
+          /* We are back where we started... the are no free device address */
+
+          return -ENOMEM;
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: ptmx_open
+ ****************************************************************************/
+
+static int ptmx_open(FAR struct file *filep)
+{
+  char devname[16];
+  int minor;
+  int fd;
+  int ret;
+
+  /* Get exclusive access */
+
+  ptmx_semtake();
+
+  /* Allocate a PTY minor */
+
+  minor = ptmx_minor_allocate();
+  if (minor < 0)
+    {
+      ret = minor;
+      goto errout_with_sem;
+    }
+
+  /* Create the master slave pair.  This should create:
+   *
+   *   Slave device:  /dev/pts/N
+   *   Master device: /dev/ptyN
+   *
+   * Where N=minor
+   */
+
+  ret = pty_register(minor);
+  if (ret < 0)
+    {
+      goto errout_with_minor;
+    }
+
+  /* Open the master device:  /dev/ptyN, where N=minor */
+
+  snprintf(devname, 16, "/dev/pty%d", minor);
+  fd = open(devname, O_RDWR);
+  DEBUGASSERT(fd >= 0);  /* open() should never fail */
+
+  /* No unlink the master.  This will remove it from the VFS namespace,
+   * the the driver will still persist because of the open count on the
+   * driver.
+   */
+
+  ret = unlink(devname);
+  DEBUGASSERT(ret >= 0);  /* unlink() should never fail */
+  UNUSED(ret);
+
+  /* Return the encoded, master file descriptor */
+
+  ptmx_semgive();
+  DEBUGASSERT((unsigned)fd <= OPEN_MAXFD);
+  return (int)OPEN_SETFD(fd);
+
+errout_with_minor:
+  ptmx_minor_free(minor);
+
+errout_with_sem:
+  ptmx_semgive();
+  return ret;
+}
+
+/****************************************************************************
+ * Name: ptmx_read
+ ****************************************************************************/
+
+static ssize_t ptmx_read(FAR struct file *filep, FAR char *buffer, size_t len)
+{
+  return 0; /* Return EOF */
+}
+
+/****************************************************************************
+ * Name: ptmx_write
+ ****************************************************************************/
+
+static ssize_t ptmx_write(FAR struct file *filep, FAR const char *buffer, size_t len)
+{
+  return len; /* Say that everything was written */
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: ptmx_register
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Description:
+ *   Register the master pseudo-terminal multiplexor device at /dev/ptmx
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure.
+ *
+ ****************************************************************************/
+
+int ptmx_register(void)
+{
+  /* Initialize driver state */
+
+  sem_init(&g_ptmx.px_exclsem, 0, 1);
+
+  /* Register the PTMX driver */
+
+  return register_driver("/dev/ptmx", &g_ptmx_fops, 0666, NULL);
+}
+
+/****************************************************************************
+ * Name: ptmx_minor_free
+ *
+ * Description:
+ *   De-allocate a PTY minor number.
+ *
+ * Assumptions:
+ *   Caller hold the px_exclsem
+ *
+ ****************************************************************************/
+
+void ptmx_minor_free(uint8_t minor)
+{
+  int index;
+  int bitno;
+
+  /* Free the address by clearing the associated bit in the px_alloctab[]; */
+
+  index = minor >> 5;
+  bitno = minor & 31;
+
+  DEBUGASSERT((g_ptmx.px_alloctab[index] |= (1 << bitno)) != 0);
+  g_ptmx.px_alloctab[index] &= ~(1 << bitno);
+
+  /* Reset the next pointer if the one just released has a lower value */
+
+  if (minor < g_ptmx.px_next)
+    {
+      g_ptmx.px_next = minor;
+    }
+}
diff --git a/drivers/serial/pty.c b/drivers/serial/pty.c
new file mode 100644
index 0000000000000000000000000000000000000000..4c27cd89bba8bb72481757f0ccca67f429d3efe3
--- /dev/null
+++ b/drivers/serial/pty.c
@@ -0,0 +1,1184 @@
+/****************************************************************************
+ * drivers/serial/pty.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* TODO:  O_NONBLOCK is not yet supported.  Currently, the source and sink
+ * pipes are opened in blocking mode on both the slave and master so only
+ * blocking behavior is supported.  This driver must be able to support
+ * multiple slave as well as master clients that may have the PTY device
+ * opened in blocking and non-blocking modes simultaneously.
+ *
+ * There are two different possible implementations under consideration:
+ *
+ * 1. Keep the pipes in blocking mode, but use a test based on FIONREAD (for
+ *    the source pipe) or FIONSPACE (for the sink pipe) to determine if the
+ *    read or write would block.  There is existing logic like this in
+ *    pty_read() to handle the case of a single byte reads which must never
+ *    block in any case:  Essentially, this logic uses FIONREAD to determine
+ *    if there is anything to read before calling file_read().  Similar
+ *    logic could be replicated for all read cases.
+ *
+ *    Analogous logic could be added for all writes using FIONSPACE to
+ *    assure that there is sufficient free space in the sink pipe to write
+ *    without blocking.  The write length could be adjusted, in necceary,
+ *    to assure that there is no blocking.
+ *
+ *    Locking, perhaps via sched_lock(), would be required to assure the
+ *    test via FIONREAD or FIONWRITE is atomic with respect to the
+ *    file_read() or file_write() operation.
+ *
+ * 2. An alternative that appeals to me is to modify the contained source
+ *    or sink pipe file structures before each file_read() or file_write()
+ *    operation to assure that the O_NONBLOCK is set correctly when the
+ *    pipe read or write operation is performed.  This might be done with
+ *    file_vfcntl() (there is no file_fcntl(), yet) or directly into the
+ *    source/sink file structure oflags mode settings.
+ *
+ *    This would require (1) the ability to lock each pipe individually,
+ *    setting the blocking mode for the source or sink pipe to match the
+ *    mode in the open flags of the PTY device file structure, and (2)
+ *    logic to restore the default pipe mode after the file_read/write()
+ *    operation and before the pipe is unlocked.
+ *
+ * There are existing locks to support (1) destruction of the driver
+ * (pp_exclsem) and (2) slave PTY locking (pp_slavesem), as well as (3)
+ * locks within the pipe implementation.  Care must be taken with any new
+ * source/sink pipe locking to assure that deadlocks are not possible.
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "pty.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Should never be set... only for comparison to serial.c */
+
+#undef CONFIG_PSEUDOTERM_FULLBLOCKS
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* This device structure describes on memory of the PTY device pair */
+
+struct pty_devpair_s;
+struct pty_dev_s
+{
+  FAR struct pty_devpair_s *pd_devpair;
+  struct file pd_src;           /* Provides data to read() method (pipe output) */
+  struct file pd_sink;          /* Accepts data from write() method (pipe input) */
+  bool pd_master;               /* True: this is the master */
+
+#ifdef CONFIG_SERIAL_TERMIOS
+  /* Terminal control flags */
+
+  tcflag_t pd_iflag;            /* Terminal nput modes */
+  tcflag_t pd_oflag;            /* Terminal output modes */
+#endif
+};
+
+/* This structure describes the pipe pair */
+
+struct pty_devpair_s
+{
+  struct pty_dev_s pp_master;   /* Maseter device */
+  struct pty_dev_s pp_slave;    /* Slave device */
+
+  bool pp_locked;               /* Slave is locked */
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  bool pp_unlinked;             /* File has been unlinked */
+  uint8_t pp_minor;             /* Minor device number */
+  uint16_t pp_nopen;            /* Open file count */
+#endif
+  sem_t pp_slavesem;            /* Slave lock semaphore */
+  sem_t pp_exclsem;             /* Mutual exclusion */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static void    pty_semtake(FAR struct pty_devpair_s *devpair);
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+static void    pty_destroy(FAR struct pty_devpair_s *devpair);
+#endif
+
+static int     pty_open(FAR struct file *filep);
+static int     pty_close(FAR struct file *filep);
+static ssize_t pty_read(FAR struct file *filep, FAR char *buffer,
+                 size_t buflen);
+static ssize_t pty_write(FAR struct file *filep, FAR const char *buffer,
+                 size_t buflen);
+static int     pty_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
+#ifndef CONFIG_DISABLE_POLL
+static int     pty_poll(FAR struct file *filep, FAR struct pollfd *fds,
+                 bool setup);
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+static int     pty_unlink(FAR struct inode *inode);
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct file_operations g_pty_fops =
+{
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  pty_open,      /* open */
+  pty_close,     /* close */
+#else
+  NULL,          /* open */
+  NULL,          /* close */
+#endif
+  pty_read,      /* read */
+  pty_write,     /* write */
+  NULL,          /* seek */
+  pty_ioctl      /* ioctl */
+#ifndef CONFIG_DISABLE_POLL
+  , pty_poll     /* poll */
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  , pty_unlink   /* unlink */
+#endif
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: pty_semtake
+ ****************************************************************************/
+
+static void pty_semtake(FAR struct pty_devpair_s *devpair)
+{
+  while (sem_wait(&devpair->pp_exclsem) < 0)
+    {
+      DEBUGASSERT(errno == EINTR);
+    }
+}
+
+/****************************************************************************
+ * Name: pty_semgive
+ ****************************************************************************/
+
+#define pty_semgive(c) sem_post(&(c)->pp_exclsem)
+
+/****************************************************************************
+ * Name: pty_destroy
+ ****************************************************************************/
+
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+static void pty_destroy(FAR struct pty_devpair_s *devpair)
+{
+  char devname[16];
+
+  /* Un-register the slave device */
+
+#ifdef CONFIG_PSEUDOTERM_BSD
+  snprintf(devname, 16, "/dev/ttyp%d", devpair->pp_minor);
+#else
+  snprintf(devname, 16, "/dev/pts/%d", devpair->pp_minor);
+#endif
+  (void)unregister_driver(devname);
+
+  /* Un-register the master device (/dev/ptyN may have already been
+   * unlinked).
+   */
+
+  snprintf(devname, 16, "/dev/pty%d", (int)devpair->pp_minor);
+  (void)unregister_driver(devname);
+
+  /* Close the contained file structures */
+
+  (void)file_close_detached(&devpair->pp_master.pd_src);
+  (void)file_close_detached(&devpair->pp_master.pd_sink);
+  (void)file_close_detached(&devpair->pp_slave.pd_src);
+  (void)file_close_detached(&devpair->pp_slave.pd_sink);
+
+#ifdef CONFIG_PSEUDOTERM_SUSV1
+  /* Free this minor number so that it can be reused */
+
+  ptmx_minor_free(devpair->pp_minor);
+#endif
+
+  /* And free the device structure */
+
+  sem_destroy(&devpair->pp_exclsem);
+  kmm_free(devpair);
+}
+#endif
+
+/****************************************************************************
+ * Name: pty_open
+ ****************************************************************************/
+
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+static int pty_open(FAR struct file *filep)
+{
+  FAR struct inode *inode;
+  FAR struct pty_dev_s *dev;
+  FAR struct pty_devpair_s *devpair;
+  int ret;
+
+  DEBUGASSERT(filep != NULL && filep->f_inode != NULL);
+  inode   = filep->f_inode;
+  dev     = inode->i_private;
+  DEBUGASSERT(dev != NULL && dev->pd_devpair != NULL);
+  devpair = dev->pd_devpair;
+
+  /* Wait if this is an attempt to open the slave device and the slave
+   * device is locked.
+   */
+
+  if (!dev->pd_master)
+    {
+      /* Slave... Check if the slave driver is locked.  We need to lock the
+       * scheduler while we are running to prevent asyncrhonous modification
+       * of pp_locked by pty_ioctl().
+       */
+
+      sched_lock();
+      while (devpair->pp_locked)
+        {
+          /* Wait until unlocked.  We will also most certainly suspend here. */
+
+          sem_wait(&devpair->pp_slavesem);
+
+          /* Get exclusive access to the device structure.  This might also
+           * cause suspension.
+           */
+
+          pty_semtake(devpair);
+
+          /* Check again in case something happened asynchronously while we
+           * were suspended.
+           */
+
+          if (devpair->pp_locked)
+           {
+             /* This cannot suspend because we have the scheduler locked.
+              * So pp_locked cannot change asyncrhonously between this test
+              * and the redundant test at the top of the loop.
+              */
+
+             pty_semgive(devpair);
+           }
+        }
+
+      sched_unlock();
+    }
+  else
+    {
+       /* Master ... Get exclusive access to the device structure */
+
+       pty_semtake(devpair);
+    }
+
+#ifndef CONFIG_PSEUDOTERM_SUSV1
+  /* If one side of the driver has been unlinked, then refuse further
+   * opens.
+   *
+   * NOTE: We ignore this case in the SUSv1 case.  In the SUSv1 case, the
+   * master side is always unlinked.
+   */
+
+  if (devpair->pp_unlinked)
+    {
+      ret = -EIDRM;
+    }
+  else
+#endif
+    {
+      /* Increment the count of open references on the driver */
+
+      devpair->pp_nopen++;
+      DEBUGASSERT(devpair->pp_nopen > 0);
+
+      ret = OK;
+    }
+
+  pty_semgive(devpair);
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: pty_open
+ ****************************************************************************/
+
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+static int pty_close(FAR struct file *filep)
+{
+  FAR struct inode *inode;
+  FAR struct pty_dev_s *dev;
+  FAR struct pty_devpair_s *devpair;
+
+  DEBUGASSERT(filep != NULL && filep->f_inode != NULL);
+  inode     = filep->f_inode;
+  dev       = inode->i_private;
+  DEBUGASSERT(dev != NULL && dev->pd_devpair != NULL);
+  devpair   = dev->pd_devpair;
+
+  /* Get exclusive access */
+
+  pty_semtake(devpair);
+
+#ifdef CONFIG_PSEUDOTERM_SUSV1
+  /* Did the (single) master just close its reference? */
+
+  if (dev->pd_master)
+    {
+      /* Yes, then we are essentially unlinked and when all of the
+       * slaves close there references, then the PTY should be
+       * destroyed.
+       */
+
+      devpair->pp_unlinked = true;
+    }
+#endif
+
+  /* Is this the last open reference?  If so, was the driver previously
+   * unlinked?
+   */
+
+  DEBUGASSERT(devpair->pp_nopen > 0);
+  if (devpair->pp_nopen <= 1 && devpair->pp_unlinked)
+    {
+      /* Yes.. Free the device pair now (without freeing the semaphore) */
+
+      pty_destroy(devpair);
+      return OK;
+    }
+  else
+    {
+      /* Otherwise just decrement the open count */
+
+      devpair->pp_nopen--;
+    }
+
+  pty_semgive(devpair);
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: pty_read
+ ****************************************************************************/
+
+static ssize_t pty_read(FAR struct file *filep, FAR char *buffer, size_t len)
+{
+  FAR struct inode *inode;
+  FAR struct pty_dev_s *dev;
+  ssize_t ntotal;
+#ifdef CONFIG_SERIAL_TERMIOS
+  ssize_t nread;
+  size_t i;
+  char ch;
+  int ret;
+#endif
+
+  DEBUGASSERT(filep != NULL && filep->f_inode != NULL);
+  inode = filep->f_inode;
+  dev   = inode->i_private;
+  DEBUGASSERT(dev != NULL);
+
+#ifdef CONFIG_SERIAL_TERMIOS
+  /* Do input processing if any is enabled
+   *
+   * Specifically not handled:
+   *
+   *   All of the local modes; echo, line editing, etc.
+   *   Anything to do with break or parity errors.
+   *   ISTRIP     - We should be 8-bit clean.
+   *   IUCLC      - Not Posix
+   *   IXON/OXOFF - No xon/xoff flow control.
+   */
+
+  if (dev->pd_iflag & (INLCR | IGNCR | ICRNL))
+    {
+      /* We will transfer one byte at a time, making the appropriate
+       * translations.
+       */
+
+      ntotal = 0;
+      for (i = 0; i < len; i++)
+        {
+#ifndef CONFIG_PSEUDOTERM_FULLBLOCKS
+          /* This logic should return if the pipe becomes empty after some
+           * bytes were read from the pipe.  If we have already read some
+           * data, we use the FIONREAD ioctl to test if there are more bytes
+           * in the pipe.
+           *
+           * REVISIT:  An alternative design might be to (1) configure the
+           * source file as non-blocking, then (2) wait using poll() for the
+           * first byte to be received.  (3) Subsequent bytes would
+           * use file_read() without polling and would (4) terminate when no
+           * data is returned.
+           */
+
+          if (ntotal > 0)
+            {
+              int nsrc;
+
+              /* There are inherent race conditions in this test.  We lock
+               * the scheduler before the test and after the file_read()
+               * below to eliminate one race:  (a) We detect that there is
+               * data in the source file, (b) we are suspended and another
+               * thread reads the data, emptying the fifo, then (c) we
+               * resume and call file_read(), blocking indefinitely.
+               */
+
+              sched_lock();
+
+              /* Check how many bytes are waiting in the pipe */
+
+              ret = file_ioctl(&dev->pd_src, FIONREAD,
+                               (unsigned long)((uintptr_t)&nsrc));
+              if (ret < 0)
+                {
+                  sched_unlock();
+                  ntotal = ret;
+                  break;
+                }
+
+              /* Break out of the loop and return ntotal if the pipe is
+               * empty.  This is another race:  There fifo was empty when we
+               * called file_ioctl() above, but it might not be empty right
+               * now.  Losing that race should not lead to any bad behaviors,
+               * however, we the caller will get those bytes on the next
+               * read.
+               */
+
+              if (nsrc < 1)
+                {
+                  sched_unlock();
+                  break;
+                }
+
+              /* Read one byte from the source the byte.  This should not
+               * block.
+               */
+
+              nread = file_read(&dev->pd_src, &ch, 1);
+              sched_unlock();
+            }
+          else
+#else
+          /* If we wanted to return full blocks of data, then file_read()
+           * may need to be called repeatedly.  That is because the pipe
+           * read() method will return early if the fifo becomes empty
+           * after any data has been read.
+           */
+
+# error Missing logic
+#endif
+            {
+              /* Read one byte from the source the byte.  This call will
+               * block if the source pipe is empty.
+               *
+               * REVISIT: Should not block if the oflags include O_NONBLOCK.
+               * How would we ripple the O_NONBLOCK characteristic to the
+               * contained soruce pipe?  file_vfcntl()?  Or FIONREAD? See the
+               * TODO comment at the top of this file.
+               */
+
+              nread = file_read(&dev->pd_src, &ch, 1);
+            }
+
+          /* Check if file_read was successful */
+
+          if (nread < 0)
+            {
+              ntotal = nread;
+              break;
+            }
+
+          /* Perform input processing */
+          /* \n -> \r or \r -> \n translation? */
+
+          if (ch == '\n' && (dev->pd_iflag & INLCR) != 0)
+            {
+               ch = '\r';
+            }
+          else if (ch == '\r' && (dev->pd_iflag & ICRNL) != 0)
+            {
+              ch = '\n';
+            }
+
+          /* Discarding \r ?  Print character if (1) character is not \r or
+           * if (2) we were not asked to ignore \r.
+           */
+
+          if (ch != '\r' || (dev->pd_iflag & IGNCR) == 0)
+            {
+
+              /* Transfer the (possibly translated) character and update the
+               * count of bytes transferred.
+               */
+
+              *buffer++ = ch;
+              ntotal++;
+            }
+        }
+    }
+  else
+#endif
+    {
+      /* NOTE: the source pipe will block if no data is available in
+       * the pipe.   Otherwise, it will return data from the pipe.  If
+       * there are fewer than 'len' bytes in the, it will return with
+       * ntotal < len.
+       *
+       * REVISIT: Should not block if the oflags include O_NONBLOCK.
+       * How would we ripple the O_NONBLOCK characteristic to the
+       * contained source pipe? file_vfcntl()?  Or FIONREAD?  See the
+       * TODO comment at the top of this file.
+       */
+
+      ntotal = file_read(&dev->pd_src, buffer, len);
+    }
+
+  return ntotal;
+}
+
+/****************************************************************************
+ * Name: pty_write
+ ****************************************************************************/
+
+static ssize_t pty_write(FAR struct file *filep, FAR const char *buffer, size_t len)
+{
+  FAR struct inode *inode;
+  FAR struct pty_dev_s *dev;
+  ssize_t ntotal;
+#ifdef CONFIG_SERIAL_TERMIOS
+  ssize_t nwritten;
+  size_t i;
+  char ch;
+#endif
+
+  DEBUGASSERT(filep != NULL && filep->f_inode != NULL);
+  inode = filep->f_inode;
+  dev   = inode->i_private;
+  DEBUGASSERT(dev != NULL);
+
+#ifdef CONFIG_SERIAL_TERMIOS
+  /* Do output post-processing */
+
+  if ((dev->pd_oflag & OPOST) != 0)
+    {
+      /* We will transfer one byte at a time, making the appropriae
+       * translations.  Specifically not handled:
+       *
+       *   OXTABS - primarily a full-screen terminal optimisation
+       *   ONOEOT - Unix interoperability hack
+       *   OLCUC  - Not specified by POSIX
+       *   ONOCR  - low-speed interactive optimisation
+       */
+
+      ntotal = 0;
+      for (i = 0; i < len; i++)
+        {
+          ch = *buffer++;
+
+          /* Mapping CR to NL? */
+
+          if (ch == '\r' && (dev->pd_oflag & OCRNL) != 0)
+            {
+              ch = '\n';
+            }
+
+          /* Are we interested in newline processing? */
+
+          if ((ch == '\n') && (dev->pd_oflag & (ONLCR | ONLRET)) != 0)
+            {
+              char cr = '\r';
+
+              /* Transfer the carriage return.  This will block if the
+               * sink pipe is full.
+               *
+               * REVISIT: Should not block if the oflags include O_NONBLOCK.
+               * How would we ripple the O_NONBLOCK characteristic to the
+               * contained sink pipe?  file_vfcntl()?  Or FIONSPACE?  See the
+               * TODO comment at the top of this file.
+               */
+
+              nwritten = file_write(&dev->pd_sink, &cr, 1);
+              if (nwritten < 0)
+                {
+                  ntotal = nwritten;
+                  break;
+                }
+
+              /* Update the count of bytes transferred */
+
+              ntotal++;
+            }
+
+          /* Transfer the (possibly translated) character..  This will block
+           * if the sink pipe is full
+           *
+           * REVISIT: Should not block if the oflags include O_NONBLOCK.
+           * How would we ripple the O_NONBLOCK characteristic to the
+           * contained sink pipe?  file_vfcntl()?  Or FIONSPACe?  See the
+           * TODO comment at the top of this file.
+           */
+
+          nwritten = file_write(&dev->pd_sink, &ch, 1);
+          if (nwritten < 0)
+            {
+              ntotal = nwritten;
+              break;
+            }
+
+          /* Update the count of bytes transferred */
+
+          ntotal++;
+        }
+    }
+  else
+#endif
+    {
+      /* Write the 'len' bytes to the sink pipe.  This will block until all
+       * 'len' bytes have been written to the pipe.
+       *
+       * REVISIT: Should not block if the oflags include O_NONBLOCK.
+       * How would we ripple the O_NONBLOCK characteristic to the
+       * contained sink pipe?  file_vfcntl()?  Or FIONSPACE?  See the
+       * TODO comment at the top of this file.
+       */
+
+      ntotal = file_write(&dev->pd_sink, buffer, len);
+    }
+
+  return ntotal;
+}
+
+/****************************************************************************
+ * Name: pty_ioctl
+ *
+ * Description:
+ *   The standard ioctl method.  This is where ALL of the PWM work is done.
+ *
+ ****************************************************************************/
+
+static int pty_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
+{
+  FAR struct inode *inode;
+  FAR struct pty_dev_s *dev;
+  FAR struct pty_devpair_s *devpair;
+  int ret;
+
+  DEBUGASSERT(filep != NULL && filep->f_inode != NULL);
+  inode   = filep->f_inode;
+  dev     = inode->i_private;
+  DEBUGASSERT(dev != NULL && dev->pd_devpair != NULL);
+  devpair = dev->pd_devpair;
+
+  /* Get exclusive access */
+
+  pty_semtake(devpair);
+
+  /* Handle IOCTL commands */
+
+  switch (cmd)
+    {
+      /* PTY IOCTL commands would be handled here */
+
+      case TIOCGPTN:    /* Get Pty Number (of pty-mux device): FAR int* */
+        {
+#ifdef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+          ret = -ENOSYS;
+#else
+          FAR int *ptyno = (FAR int *)((uintptr_t)arg);
+          if (ptyno == NULL)
+            {
+              ret = -EINVAL;
+            }
+          else
+            {
+              *ptyno = (int)devpair->pp_minor;
+              ret = OK;
+            }
+#endif
+        }
+        break;
+
+      case TIOCSPTLCK:  /* Lock/unlock Pty: int */
+        {
+          if (arg == 0)
+            {
+               int sval;
+
+               /* Unlocking */
+
+               sched_lock();
+               devpair->pp_locked = false;
+
+               /* Release any waiting threads */
+
+               do
+                 {
+                   DEBUGVERIFY(sem_getvalue(&devpair->pp_slavesem, &sval));
+                   if (sval < 0)
+                     {
+                       sem_post(&devpair->pp_slavesem);
+                     }
+                 }
+               while (sval < 0);
+
+               sched_unlock();
+               ret = OK;
+            }
+          else
+            {
+              /* Locking */
+
+               devpair->pp_locked = true;
+               ret = OK;
+            }
+        }
+        break;
+
+      case TIOCGPTLCK:  /* Get Pty lock state: FAR int* */
+        {
+          FAR int *ptr = (FAR int *)((uintptr_t)arg);
+          if (ptr == NULL)
+            {
+              ret = -EINVAL;
+            }
+          else
+            {
+              *ptr = (int)devpair->pp_locked;
+              ret = OK;
+            }
+        }
+        break;
+
+#ifdef CONFIG_SERIAL_TERMIOS
+      case TCGETS:
+        {
+          FAR struct termios *termiosp = (FAR struct termios *)arg;
+
+          if (!termiosp)
+            {
+              ret = -EINVAL;
+              break;
+            }
+
+          /* And update with flags from this layer */
+
+          termiosp->c_iflag = dev->pd_iflag;
+          termiosp->c_oflag = dev->pd_oflag;
+          termiosp->c_lflag = 0;
+          ret = OK;
+        }
+        break;
+
+      case TCSETS:
+        {
+          FAR struct termios *termiosp = (FAR struct termios *)arg;
+
+          if (!termiosp)
+            {
+              ret = -EINVAL;
+              break;
+            }
+
+          /* Update the flags we keep at this layer */
+
+          dev->pd_iflag = termiosp->c_iflag;
+          dev->pd_oflag = termiosp->c_oflag;
+          ret = OK;
+        }
+        break;
+#endif
+
+      /* Get the number of bytes that are immediately available for reading
+       * from the source pipe.
+       */
+
+      case FIONREAD:
+        {
+          ret = file_ioctl(&dev->pd_src, cmd, arg);
+        }
+        break;
+
+      /* Get the number of bytes waiting in the sink pipe (FIONWRITE) or the
+       * number of unused bytes in the sink pipe (FIONSPACE).
+       */
+
+      case FIONWRITE:
+      case FIONSPACE:
+        {
+          ret = file_ioctl(&dev->pd_sink, cmd, arg);
+        }
+        break;
+
+      /* Any unrecognized IOCTL commands will be passed to the contained
+       * pipe driver.
+       *
+       * REVISIT:  We know for a fact that the pipe driver only supports
+       * FIONREAD, FIONWRITE, FIONSPACE and PIPEIOC_POLICY.  The first two
+       * are handled above and PIPEIOC_POLICY should not be managed by
+       * applications -- it can break the PTY!
+       */
+
+      default:
+        {
+#if 0
+          ret = file_ioctl(&dev->pd_src, cmd, arg);
+          if (ret >= 0 || ret == -ENOTTY)
+            {
+              ret = file_ioctl(&dev->pd_sink, cmd, arg);
+            }
+#else
+          ret = ENOTTY;
+#endif
+        }
+        break;
+    }
+
+  pty_semgive(devpair);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: pty_poll
+ ****************************************************************************/
+
+#ifndef CONFIG_DISABLE_POLL
+static int pty_poll(FAR struct file *filep, FAR struct pollfd *fds,
+                    bool setup)
+{
+  FAR struct inode *inode;
+  FAR struct pty_dev_s *dev;
+  int ret = -ENOSYS;
+
+  DEBUGASSERT(filep != NULL && filep->f_inode != NULL);
+  inode   = filep->f_inode;
+  dev     = inode->i_private;
+
+  /* REVISIT: If both POLLIN and POLLOUT are set, might the following logic
+   * fail?  Could we not get POLLIN on the sink file and POLLOUT on the source
+   * file?
+   */
+
+  /* POLLIN: Data other than high-priority data may be read without blocking. */
+
+  if ((fds->events & POLLIN) != 0)
+    {
+      ret = file_poll(&dev->pd_src, fds, setup);
+    }
+
+  if (ret >= OK || ret == -ENOTTY)
+    {
+      /* POLLOUT: Normal data may be written without blocking. */
+
+      if ((fds->events & POLLOUT) != 0)
+        {
+          ret = file_poll(&dev->pd_sink, fds, setup);
+        }
+    }
+
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: pty_unlink
+ ****************************************************************************/
+
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+static int pty_unlink(FAR struct inode *inode)
+{
+  FAR struct pty_dev_s *dev;
+  FAR struct pty_devpair_s *devpair;
+
+  DEBUGASSERT(inode != NULL && inode->i_private != NULL);
+  dev       = inode->i_private;
+  devpair   = dev->pd_devpair;
+  DEBUGASSERT(dev->pd_devpair != NULL);
+
+  /* Get exclusive access */
+
+  pty_semtake(devpair);
+
+  /* Indicate that the driver has been unlinked */
+
+  devpair->pp_unlinked = true;
+
+  /* If there are no further open references to the driver, then commit
+   * Hara-Kiri now.
+   */
+
+  if (devpair->pp_nopen == 0)
+    {
+      pty_destroy(devpair);
+      return OK;
+    }
+
+  pty_semgive(devpair);
+  return OK;
+}
+#endif
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: pty_register
+ *
+ * Description:
+ *   Create and register PTY master and slave devices.  The slave side of
+ *   the interface is always locked initially.  The master must call
+ *   unlockpt() before the slave device can be opened.
+ *
+ * Input Parameters:
+ *   minor - The number that qualifies the naming of the created devices.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure.
+ *
+ ****************************************************************************/
+
+int pty_register(int minor)
+{
+  FAR struct pty_devpair_s *devpair;
+  int pipe_a[2];
+  int pipe_b[2];
+  char devname[16];
+  int ret;
+
+  /* Allocate a device instance */
+
+  devpair = kmm_zalloc(sizeof(struct pty_devpair_s));
+  if (devpair == NULL)
+    {
+      return -ENOMEM;
+    }
+
+  /* Initialize semaphores */
+
+  sem_init(&devpair->pp_slavesem, 0, 0);
+  sem_init(&devpair->pp_exclsem, 0, 1);
+
+  /* The pp_slavesem semaphore is used for signaling and, hence, should not
+   * have priority inheritance enabled.
+   */
+
+  sem_setprotocol(&devpair->pp_slavesem, SEM_PRIO_NONE);
+
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  devpair->pp_minor             = minor;
+#endif
+  devpair->pp_locked            = true;
+  devpair->pp_master.pd_devpair = devpair;
+  devpair->pp_master.pd_master  = true;
+  devpair->pp_slave.pd_devpair  = devpair;
+
+  /* Create two pipes:
+   *
+   *   pipe_a:  Master source, slave sink (TX, slave-to-master)
+   *   pipe_b:  Master sink, slave source (RX, master-to-slave)
+   */
+
+  ret = pipe2(pipe_a, CONFIG_PSEUDOTERM_TXBUFSIZE);
+  if (ret < 0)
+    {
+      goto errout_with_devpair;
+    }
+
+  ret = pipe2(pipe_b, CONFIG_PSEUDOTERM_RXBUFSIZE);
+  if (ret < 0)
+    {
+      goto errout_with_pipea;
+    }
+
+  /* Detach the pipe file descriptors (closing them in the process)
+   *
+   *  fd[0] is for reading;
+   *  fd[1] is for writing.
+   */
+
+  ret = file_detach(pipe_a[0], &devpair->pp_master.pd_src);
+  if (ret < 0)
+    {
+      goto errout_with_pipeb;
+    }
+
+  pipe_a[0] = -1;
+
+  ret = file_detach(pipe_a[1], &devpair->pp_slave.pd_sink);
+  if (ret < 0)
+    {
+      goto errout_with_pipeb;
+    }
+
+  pipe_a[1] = -1;
+
+  ret = file_detach(pipe_b[0], &devpair->pp_slave.pd_src);
+  if (ret < 0)
+    {
+      goto errout_with_pipeb;
+    }
+
+  pipe_b[0] = -1;
+
+  ret = file_detach(pipe_b[1], &devpair->pp_master.pd_sink);
+  if (ret < 0)
+    {
+      goto errout_with_pipeb;
+    }
+
+  pipe_b[1] = -1;
+
+  /* Register the slave device
+   *
+   * BSD style (deprecated): /dev/ttypN
+   * SUSv1 style:  /dev/pts/N
+   *
+   * Where N is the minor number
+   */
+
+#ifdef CONFIG_PSEUDOTERM_BSD
+  snprintf(devname, 16, "/dev/ttyp%d", minor);
+#else
+  snprintf(devname, 16, "/dev/pts/%d", minor);
+#endif
+
+  ret = register_driver(devname, &g_pty_fops, 0666, &devpair->pp_slave);
+  if (ret < 0)
+    {
+      goto errout_with_pipeb;
+    }
+
+  /* Register the master device
+   *
+   * BSD style (deprecated):  /dev/ptyN
+   * SUSv1 style: Master: /dev/ptmx (multiplexor, see ptmx.c)
+   *
+   * Where N is the minor number
+   */
+
+  snprintf(devname, 16, "/dev/pty%d", minor);
+
+  ret = register_driver(devname, &g_pty_fops, 0666, &devpair->pp_master);
+  if (ret < 0)
+    {
+      goto errout_with_slave;
+    }
+
+  return OK;
+
+errout_with_slave:
+#ifdef CONFIG_PSEUDOTERM_BSD
+  snprintf(devname, 16, "/dev/ttyp%d", minor);
+#else
+  snprintf(devname, 16, "/dev/pts/%d", minor);
+#endif
+  (void)unregister_driver(devname);
+
+errout_with_pipeb:
+  if (pipe_b[0] >= 0)
+    {
+      close(pipe_b[0]);
+    }
+  else
+    {
+      (void)file_close_detached(&devpair->pp_master.pd_src);
+    }
+
+  if (pipe_b[1] >= 0)
+    {
+      close(pipe_b[1]);
+    }
+  else
+    {
+      (void)file_close_detached(&devpair->pp_slave.pd_sink);
+    }
+
+errout_with_pipea:
+  if (pipe_a[0] >= 0)
+    {
+      close(pipe_a[0]);
+    }
+  else
+    {
+      (void)file_close_detached(&devpair->pp_slave.pd_src);
+    }
+
+  if (pipe_a[1] >= 0)
+    {
+      close(pipe_a[1]);
+    }
+  else
+    {
+      (void)file_close_detached(&devpair->pp_master.pd_sink);
+    }
+
+errout_with_devpair:
+   sem_destroy(&devpair->pp_exclsem);
+   sem_destroy(&devpair->pp_slavesem);
+   kmm_free(devpair);
+   return ret;
+}
diff --git a/drivers/serial/pty.h b/drivers/serial/pty.h
new file mode 100644
index 0000000000000000000000000000000000000000..1c3d96ae5d451fa8784d811d91a9c431ddd48425
--- /dev/null
+++ b/drivers/serial/pty.h
@@ -0,0 +1,101 @@
+/****************************************************************************
+ * drivers/serial/pty.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __DRIVERS_SERIAL_PTY_H
+#define __DRIVERS_SERIAL_PTY_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: ptmx_minor_free
+ *
+ * Description:
+ *   De-allocate a PTY minor number.
+ *
+ * Assumptions:
+ *   Caller hold the px_exclsem
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_PSEUDOTERM_SUSV1
+void ptmx_minor_free(uint8_t minor);
+#endif
+
+/****************************************************************************
+ * Name: pty_register
+ *
+ * Description:
+ *   Create and register PTY master and slave devices.  The master device
+ *   will be registered at /dev/ptyN and slave at /dev/pts/N where N is
+ *   the provided minor number.
+ *
+ *   The slave side of the interface is always locked initially.  The
+ *   master must call unlockpt() before the slave device can be opened.
+ *
+ * Input Parameters:
+ *   minor - The number that qualifies the naming of the created devices.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_PSEUDOTERM_SUSV1
+int pty_register(int minor);
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __DRIVERS_SERIAL_PTY_H */
diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c
index 2de293d0b037bd5fd0b45fb607d1354785ee27b9..85fded4e4707a97158b1a74689c92847da634e6b 100644
--- a/drivers/serial/serial.c
+++ b/drivers/serial/serial.c
@@ -43,7 +43,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -52,6 +51,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -112,16 +112,6 @@ static const struct file_operations g_serialops =
  * Private Functions
  ************************************************************************************/
 
-/************************************************************************************
- * Name: sem_reinit
- ************************************************************************************/
-
-static int sem_reinit(FAR sem_t *sem, int pshared, unsigned int value)
-{
-  sem_destroy(sem);
-  return sem_init(sem, pshared, value);
-}
-
 /************************************************************************************
  * Name: uart_takesem
  ************************************************************************************/
@@ -178,7 +168,7 @@ static void uart_pollnotify(FAR uart_dev_t *dev, pollevent_t eventset)
 #endif
           if (fds->revents != 0)
             {
-              fvdbg("Report events: %02x\n", fds->revents);
+              finfo("Report events: %02x\n", fds->revents);
               sem_post(fds->sem);
             }
         }
@@ -208,50 +198,75 @@ static int uart_putxmitchar(FAR uart_dev_t *dev, int ch, bool oktoblock)
       nexthead = 0;
     }
 
-  /* Loop until we are able to add the character to the TX buffer */
+  /* Loop until we are able to add the character to the TX buffer. */
 
   for (; ; )
     {
+      /* Check if the TX buffer is full */
+
       if (nexthead != dev->xmit.tail)
         {
+          /* No.. not full.  Add the character to the TX buffer and return. */
+
           dev->xmit.buffer[dev->xmit.head] = ch;
           dev->xmit.head = nexthead;
           return OK;
         }
 
-      /* The buffer is full and no data is available now.  Should be block,
-       * waiting for the hardware to remove some data from the TX
-       * buffer?
+      /* The TX buffer is full.  Should be block, waiting for the hardware
+       * to remove some data from the TX buffer?
        */
 
       else if (oktoblock)
         {
-          /* Inform the interrupt level logic that we are waiting. This and
-           * the following steps must be atomic.
+          /* The following steps must be atomic with respect to serial
+           * interrupt handling.
            */
 
           flags = enter_critical_section();
 
+          /* Check again...  In certain race conditions an interrupt may
+           * have occurred between the test at the top of the loop and
+           * entering the critical section and the TX buffer may no longer
+           * be full.
+           *
+           * NOTE: On certain devices, such as USB CDC/ACM, the entire TX
+           * buffer may have been emptied in this race condition.  In that
+           * case, the logic would hang below waiting for space in the TX
+           * buffer without this test.
+           */
+
+          if (nexthead != dev->xmit.tail)
+            {
+              ret = OK;
+            }
+
 #ifdef CONFIG_SERIAL_REMOVABLE
           /* Check if the removable device is no longer connected while we
            * have interrupts off.  We do not want the transition to occur
            * as a race condition before we begin the wait.
            */
 
-          if (dev->disconnected)
+          else if (dev->disconnected)
             {
               ret = -ENOTCONN;
             }
-          else
 #endif
+          else
             {
+              /* Inform the interrupt level logic that we are waiting. */
+
+              dev->xmitwaiting = true;
+
               /* Wait for some characters to be sent from the buffer with
-               * the TX interrupt enabled.  When the TX interrupt is
-               * enabled, uart_xmitchars should execute and remove some
-               * of the data from the TX buffer.
+               * the TX interrupt enabled.  When the TX interrupt is enabled,
+               * uart_xmitchars() should execute and remove some of the data
+               * from the TX buffer.
+               *
+               * NOTE that interrupts will be re-enabled while we wait for
+               * the semaphore.
                */
 
-              dev->xmitwaiting = true;
 #ifdef CONFIG_SERIAL_DMA
               uart_dmatxavail(dev);
 #endif
@@ -885,12 +900,16 @@ static int uart_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
     {
       switch (cmd)
         {
+          /* Get the number of bytes that may be read from the RX buffer
+           * (without waiting)
+           */
+
           case FIONREAD:
             {
               int count;
               irqstate_t flags = enter_critical_section();
 
-              /* Determine the number of bytes available in the buffer */
+              /* Determine the number of bytes available in the RX buffer */
 
               if (dev->recv.tail <= dev->recv.head)
                 {
@@ -908,12 +927,39 @@ static int uart_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
             }
             break;
 
+          /* Get the number of bytes that have been written to the TX buffer. */
+
           case FIONWRITE:
             {
               int count;
               irqstate_t flags = enter_critical_section();
 
-              /* Determine the number of bytes free in the buffer */
+              /* Determine the number of bytes waiting in the TX buffer */
+
+              if (dev->xmit.tail <= dev->xmit.head)
+                {
+                  count = dev->xmit.head - dev->xmit.tail;
+                }
+              else
+                {
+                  count = dev->xmit.size - (dev->xmit.tail - dev->xmit.head);
+                }
+
+              leave_critical_section(flags);
+
+              *(FAR int *)((uintptr_t)arg) = count;
+              ret = 0;
+            }
+            break;
+
+          /* Get the number of free bytes in the TX buffer */
+
+          case FIONSPACE:
+            {
+              int count;
+              irqstate_t flags = enter_critical_section();
+
+              /* Determine the number of bytes free in the TX buffer */
 
               if (dev->xmit.head < dev->xmit.tail)
                 {
@@ -998,7 +1044,7 @@ int uart_poll(FAR struct file *filep, FAR struct pollfd *fds, bool setup)
 
   /* Some sanity checking */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev || !fds)
     {
       return -ENODEV;
@@ -1104,7 +1150,7 @@ int uart_poll(FAR struct file *filep, FAR struct pollfd *fds, bool setup)
 
       struct pollfd **slot = (struct pollfd **)fds->priv;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       if (!slot)
         {
           ret              = -EIO;
@@ -1197,19 +1243,14 @@ static int uart_close(FAR struct file *filep)
   /* We need to re-initialize the semaphores if this is the last close
    * of the device, as the close might be caused by pthread_cancel() of
    * a thread currently blocking on any of them.
-   *
-   * REVISIT:  This logic *only* works in the case where the cancelled
-   * thread had the only reference to the serial driver.  If there other
-   * references, then the this logic will not be executed and the
-   * semaphore count will still be incorrect.
    */
 
-  sem_reinit(&dev->xmitsem,  0, 0);
-  sem_reinit(&dev->recvsem,  0, 0);
-  sem_reinit(&dev->xmit.sem, 0, 1);
-  sem_reinit(&dev->recv.sem, 0, 1);
+  sem_reset(&dev->xmitsem,  0);
+  sem_reset(&dev->recvsem,  0);
+  sem_reset(&dev->xmit.sem, 1);
+  sem_reset(&dev->recv.sem, 1);
 #ifndef CONFIG_DISABLE_POLL
-  sem_reinit(&dev->pollsem,  0, 1);
+  sem_reset(&dev->pollsem,  1);
 #endif
 
   uart_givesem(&dev->closesem);
@@ -1360,6 +1401,8 @@ errout_with_sem:
 
 int uart_register(FAR const char *path, FAR uart_dev_t *dev)
 {
+  /* Initialize semaphores */
+
   sem_init(&dev->xmit.sem, 0, 1);
   sem_init(&dev->recv.sem, 0, 1);
   sem_init(&dev->closesem, 0, 1);
@@ -1369,7 +1412,16 @@ int uart_register(FAR const char *path, FAR uart_dev_t *dev)
   sem_init(&dev->pollsem,  0, 1);
 #endif
 
-  dbg("Registering %s\n", path);
+  /* The recvsem and xmitsem are used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_setprotocol(&dev->xmitsem, SEM_PRIO_NONE);
+  sem_setprotocol(&dev->recvsem, SEM_PRIO_NONE);
+
+  /* Register the serial driver */
+
+  sinfo("Registering %s\n", path);
   return register_driver(path, &g_serialops, 0666, dev);
 }
 
diff --git a/drivers/serial/uart_16550.c b/drivers/serial/uart_16550.c
index c7de1031a38d55966f9aec493ad036bc5980b6c4..ab532a49db3a8fd0d6aac75a08cbcb8287850c4c 100644
--- a/drivers/serial/uart_16550.c
+++ b/drivers/serial/uart_16550.c
@@ -2,7 +2,7 @@
  * drivers/serial/uart_16550.c
  * Serial driver for 16550 UART
  *
- *   Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -74,10 +74,8 @@ struct u16550_s
   uint32_t         baud;      /* Configured baud */
   uint32_t         uartclk;   /* UART clock frequency */
 #endif
-#ifndef CONFIG_SUPPRESS_SERIAL_INTS
   uart_datawidth_t ier;       /* Saved IER value */
   uint8_t          irq;       /* IRQ associated with this UART */
-#endif
 #ifndef CONFIG_16550_SUPRESS_CONFIG
   uint8_t          parity;    /* 0=none, 1=odd, 2=even */
   uint8_t          bits;      /* Number of bits (7 or 8) */
@@ -89,21 +87,19 @@ struct u16550_s
  * Private Function Prototypes
  ****************************************************************************/
 
-static int  u16550_setup(struct uart_dev_s *dev);
-static void u16550_shutdown(struct uart_dev_s *dev);
-static int  u16550_attach(struct uart_dev_s *dev);
-static void u16550_detach(struct uart_dev_s *dev);
-#ifndef CONFIG_SUPPRESS_SERIAL_INTS
-static int  u16550_interrupt(int irq, void *context);
-#endif
-static int  u16550_ioctl(struct file *filep, int cmd, unsigned long arg);
-static int  u16550_receive(struct uart_dev_s *dev, uint32_t *status);
-static void u16550_rxint(struct uart_dev_s *dev, bool enable);
-static bool u16550_rxavailable(struct uart_dev_s *dev);
-static void u16550_send(struct uart_dev_s *dev, int ch);
-static void u16550_txint(struct uart_dev_s *dev, bool enable);
-static bool u16550_txready(struct uart_dev_s *dev);
-static bool u16550_txempty(struct uart_dev_s *dev);
+static int  u16550_setup(FAR struct uart_dev_s *dev);
+static void u16550_shutdown(FAR struct uart_dev_s *dev);
+static int  u16550_attach(FAR struct uart_dev_s *dev);
+static void u16550_detachFAR struct uart_dev_s *dev);
+static int  u16550_interrupt(int irq, FAR void *context, FAR void *arg);
+static int  u16550_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
+static int  u16550_receive(FAR struct uart_dev_s *dev, uint32_t *status);
+static void u16550_rxint(FAR struct uart_dev_s *dev, bool enable);
+static bool u16550_rxavailable(FAR struct uart_dev_s *dev);
+static void u16550_send(FAR struct uart_dev_s *dev, int ch);
+static void u16550_txint(FAR struct uart_dev_s *dev, bool enable);
+static bool u16550_txready(FAR struct uart_dev_s *dev);
+static bool u16550_txempty(FAR struct uart_dev_s *dev);
 
 /****************************************************************************
  * Private Data
@@ -157,9 +153,7 @@ static struct u16550_s g_uart0priv =
   .baud           = CONFIG_16550_UART0_BAUD,
   .uartclk        = CONFIG_16550_UART0_CLOCK,
 #endif
-#ifndef CONFIG_SUPPRESS_SERIAL_INTS
   .irq            = CONFIG_16550_UART0_IRQ,
-#endif
 #ifndef CONFIG_16550_SUPRESS_CONFIG
   .parity         = CONFIG_16550_UART0_PARITY,
   .bits           = CONFIG_16550_UART0_BITS,
@@ -194,9 +188,7 @@ static struct u16550_s g_uart1priv =
   .baud           = CONFIG_16550_UART1_BAUD,
   .uartclk        = CONFIG_16550_UART1_CLOCK,
 #endif
-#ifndef CONFIG_SUPPRESS_SERIAL_INTS
   .irq            = CONFIG_16550_UART1_IRQ,
-#endif
 #ifndef CONFIG_16550_SUPRESS_CONFIG
   .parity         = CONFIG_16550_UART1_PARITY,
   .bits           = CONFIG_16550_UART1_BITS,
@@ -231,9 +223,7 @@ static struct u16550_s g_uart2priv =
   .baud           = CONFIG_16550_UART2_BAUD,
   .uartclk        = CONFIG_16550_UART2_CLOCK,
 #endif
-#ifndef CONFIG_SUPPRESS_SERIAL_INTS
   .irq            = CONFIG_16550_UART2_IRQ,
-#endif
 #ifndef CONFIG_16550_SUPRESS_CONFIG
   .parity         = CONFIG_16550_UART2_PARITY,
   .bits           = CONFIG_16550_UART2_BITS,
@@ -268,9 +258,7 @@ static struct u16550_s g_uart3priv =
   .baud           = CONFIG_16550_UART3_BAUD,
   .uartclk        = CONFIG_16550_UART3_CLOCK,
 #endif
-#ifndef CONFIG_SUPPRESS_SERIAL_INTS
   .irq            = CONFIG_16550_UART3_IRQ,
-#endif
 #ifndef CONFIG_16550_SUPRESS_CONFIG
   .parity         = CONFIG_16550_UART3_PARITY,
   .bits           = CONFIG_16550_UART3_BITS,
@@ -483,7 +471,6 @@ static inline void u16550_serialout(FAR struct u16550_s *priv, int offset,
  * Name: u16550_disableuartint
  ****************************************************************************/
 
-#ifndef CONFIG_SUPPRESS_SERIAL_INTS
 static inline void u16550_disableuartint(FAR struct u16550_s *priv,
                                          FAR uart_datawidth_t *ier)
 {
@@ -495,23 +482,16 @@ static inline void u16550_disableuartint(FAR struct u16550_s *priv,
   priv->ier &= ~UART_IER_ALLIE;
   u16550_serialout(priv, UART_IER_OFFSET, priv->ier);
 }
-#else
-#  define u16550_disableuartint(priv,ier)
-#endif
 
 /****************************************************************************
  * Name: u16550_restoreuartint
  ****************************************************************************/
 
-#ifndef CONFIG_SUPPRESS_SERIAL_INTS
 static inline void u16550_restoreuartint(FAR struct u16550_s *priv, uint32_t ier)
 {
   priv->ier |= ier & UART_IER_ALLIE;
   u16550_serialout(priv, UART_IER_OFFSET, priv->ier);
 }
-#else
-#  define u16550_restoreuartint(priv,ier)
-#endif
 
 /****************************************************************************
  * Name: u16550_enablebreaks
@@ -586,9 +566,7 @@ static int u16550_setup(struct uart_dev_s *dev)
 
   /* Set up the IER */
 
-#ifndef CONFIG_SUPPRESS_SERIAL_INTS
   priv->ier = u16550_serialin(priv, UART_IER_OFFSET);
-#endif
 
   /* Set up the LCR */
 
@@ -682,13 +660,12 @@ static void u16550_shutdown(struct uart_dev_s *dev)
 
 static int u16550_attach(struct uart_dev_s *dev)
 {
-#ifndef CONFIG_SUPPRESS_SERIAL_INTS
   FAR struct u16550_s *priv = (FAR struct u16550_s *)dev->priv;
   int ret;
 
   /* Attach and enable the IRQ */
 
-  ret = irq_attach(priv->irq, u16550_interrupt);
+  ret = irq_attach(priv->irq, u16550_interrupt, dev);
 #ifndef CONFIG_ARCH_NOINTC
   if (ret == OK)
     {
@@ -700,9 +677,6 @@ static int u16550_attach(struct uart_dev_s *dev)
     }
 #endif
   return ret;
-#else
-  return OK;
-#endif
 }
 
 /****************************************************************************
@@ -717,13 +691,10 @@ static int u16550_attach(struct uart_dev_s *dev)
 
 static void u16550_detach(FAR struct uart_dev_s *dev)
 {
-#ifndef CONFIG_SUPPRESS_SERIAL_INTS
   FAR struct u16550_s *priv = (FAR struct u16550_s *)dev->priv;
-#ifndef CONFIG_ARCH_NOINTC
+
   up_disable_irq(priv->irq);
-#endif
   irq_detach(priv->irq);
-#endif
 }
 
 /****************************************************************************
@@ -738,42 +709,14 @@ static void u16550_detach(FAR struct uart_dev_s *dev)
  *
  ****************************************************************************/
 
-#ifndef CONFIG_SUPPRESS_SERIAL_INTS
-static int u16550_interrupt(int irq, void *context)
+static int u16550_interrupt(int irq, FAR void *context, FAR void *arg)
 {
-  struct uart_dev_s *dev = NULL;
+  struct uart_dev_s *dev = (struct uart_dev_s *)arg;
   struct u16550_s   *priv;
   uint32_t           status;
   int                passes;
 
-#ifdef CONFIG_16550_UART0
-  if (g_uart0priv.irq == irq)
-    {
-      dev = &g_uart0port;
-    }
-  else
-#endif
-#ifdef CONFIG_16550_UART1
-  if (g_uart1priv.irq == irq)
-    {
-      dev = &g_uart1port;
-    }
-  else
-#endif
-#ifdef CONFIG_16550_UART2
-  if (g_uart2priv.irq == irq)
-    {
-      dev = &g_uart2port;
-    }
-  else
-#endif
-#ifdef CONFIG_16550_UART3
-  if (g_uart3priv.irq == irq)
-    {
-      dev = &g_uart3port;
-    }
-#endif
-  ASSERT(dev != NULL);
+  DEBUGASSERT(dev != NULL && dev->priv != NULL);
   priv = (FAR struct u16550_s *)dev->priv;
 
   /* Loop until there are no characters to be transferred or,
@@ -829,7 +772,7 @@ static int u16550_interrupt(int irq, void *context)
               /* Read the modem status register (MSR) to clear */
 
               status = u16550_serialin(priv, UART_MSR_OFFSET);
-              vdbg("MSR: %02x\n", status);
+              sinfo("MSR: %02x\n", status);
               break;
             }
 
@@ -840,7 +783,7 @@ static int u16550_interrupt(int irq, void *context)
               /* Read the line status register (LSR) to clear */
 
               status = u16550_serialin(priv, UART_LSR_OFFSET);
-              vdbg("LSR: %02x\n", status);
+              sinfo("LSR: %02x\n", status);
               break;
             }
 
@@ -848,7 +791,7 @@ static int u16550_interrupt(int irq, void *context)
 
           default:
             {
-              dbg("Unexpected IIR: %02x\n", status);
+              _err("ERROR: Unexpected IIR: %02x\n", status);
               break;
             }
         }
@@ -856,7 +799,6 @@ static int u16550_interrupt(int irq, void *context)
 
   return OK;
 }
-#endif
 
 /****************************************************************************
  * Name: u16550_ioctl
@@ -871,14 +813,17 @@ static int u16550_ioctl(struct file *filep, int cmd, unsigned long arg)
   struct inode      *inode = filep->f_inode;
   struct uart_dev_s *dev   = inode->i_private;
   struct u16550_s   *priv  = (FAR struct u16550_s *)dev->priv;
+  int ret;
 
 #ifdef CONFIG_SERIAL_UART_ARCH_IOCTL
-  int ret = uart_ioctl(filep, cmd, arg);
+  ret = uart_ioctl(filep, cmd, arg);
 
   if (ret != -ENOTTY)
     {
       return ret;
     }
+#else
+  ret = OK;
 #endif
 
   switch (cmd)
@@ -956,7 +901,6 @@ static int u16550_receive(struct uart_dev_s *dev, uint32_t *status)
 
 static void u16550_rxint(struct uart_dev_s *dev, bool enable)
 {
-#ifndef CONFIG_SUPPRESS_SERIAL_INTS
   FAR struct u16550_s *priv = (FAR struct u16550_s *)dev->priv;
   if (enable)
     {
@@ -966,8 +910,8 @@ static void u16550_rxint(struct uart_dev_s *dev, bool enable)
     {
       priv->ier &= ~UART_IER_ERBFI;
     }
+
   u16550_serialout(priv, UART_IER_OFFSET, priv->ier);
-#endif
 }
 
 /****************************************************************************
@@ -1008,7 +952,6 @@ static void u16550_send(struct uart_dev_s *dev, int ch)
 
 static void u16550_txint(struct uart_dev_s *dev, bool enable)
 {
-#ifndef CONFIG_SUPPRESS_SERIAL_INTS
   FAR struct u16550_s *priv = (FAR struct u16550_s *)dev->priv;
   irqstate_t flags;
 
@@ -1031,7 +974,6 @@ static void u16550_txint(struct uart_dev_s *dev, bool enable)
     }
 
   leave_critical_section(flags);
-#endif
 }
 
 /****************************************************************************
@@ -1158,11 +1100,9 @@ void up_serialinit(void)
 int up_putc(int ch)
 {
   FAR struct u16550_s *priv = (FAR struct u16550_s *)CONSOLE_DEV.priv;
-#ifndef CONFIG_SUPPRESS_SERIAL_INTS
   uart_datawidth_t ier;
 
   u16550_disableuartint(priv, &ier);
-#endif
 
   /* Check for LF */
 
@@ -1174,9 +1114,7 @@ int up_putc(int ch)
     }
 
   u16550_putc(priv, ch);
-#ifndef CONFIG_SUPPRESS_SERIAL_INTS
   u16550_restoreuartint(priv, ier);
-#endif
   return ch;
 }
 #endif
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index b4c8e93bbc01fdf6df5da7a52489732b170c2961..c8bd5c72328f1d4a7600934a2879cb21dcb76cd4 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -3,6 +3,26 @@
 # see the file kconfig-language.txt in the NuttX tools repository.
 #
 
+config ARCH_HAVE_SPI_CRCGENERATION
+	bool
+	default n
+
+config ARCH_HAVE_SPI_CS_CONTROL
+	bool
+	default n
+
+config ARCH_HAVE_SPI_BITORDER
+	bool
+	default n
+
+menuconfig SPI
+	bool "SPI Driver Support"
+	default n
+	---help---
+		This selection enables selection of common SPI options.  This option
+		should be enabled by all platforms that support SPI interfaces.
+		See include/nuttx/spi/spi.h for further SPI driver information.
+
 if SPI
 
 config SPI_SLAVE
@@ -47,13 +67,6 @@ config SPI_CALLBACK
 		the SPI-based MMC/SD driver to get a notification of changes in the
 		card status when an SD card is inserted or removed.
 
-config SPI_BITBANG
-	bool "SPI bit-bang device"
-	default n
-	---help---
-		Enable support for a generic SPI bit-bang device.
-		See include/nuttx/spi/spi_bitbang.h for further information.
-
 config SPI_HWFEATURES
 	bool
 	default n
@@ -66,11 +79,58 @@ config SPI_CRCGENERATION
 	bool
 	default n
 	select SPI_HWFEATURES
+	depends on ARCH_HAVE_SPI_CRCGENERATION
 	---help---
 		Selected by MCU Kconfig logic if implementation supports automatic
 		generation of SPI CRCs.  Enables the HWFEAT_CRCGENERATION option
 		as well as the hwfeartures() interface method.
 
+config SPI_CS_CONTROL
+	bool "SPI CS Behavior Control"
+	default n
+	select SPI_HWFEATURES
+	depends on ARCH_HAVE_SPI_CS_CONTROL
+	---help---
+		Enables possibilities to define the behavior of CS.
+		Also enables the hwfeatures() interface method.
+
+config SPI_BITORDER
+	bool "SPI Bit Order Control"
+	default n
+	select SPI_HWFEATURES
+	depends on ARCH_HAVE_SPI_BITORDER
+	---help---
+		Enables capability to select MSB- or LSB-first hardware feature for
+		data transfers.
+
+config SPI_CS_DELAY_CONTROL
+	bool "SPI CS Delay Control"
+	default n
+	---help---
+		Enables possibilities to define the SPI-ChipSelect-Delays like
+		time between ChipSelect assertion and first Data-Bit, the time
+		between the last Data-Bit and the de-assertion and the minimum
+		delay between two ChipSelects.
+
+		This option enables the setdelay() interface method.
+
+config SPI_DRIVER
+	bool "SPI character driver"
+	default n
+	depends on SPI_EXCHANGE
+	---help---
+		Build in support for a character driver at /dev/spi[N] that may be
+		used to perform SPI bus transfers from applications.  The intent of
+		this driver is to support SPI testing.  It is not suitable for use
+		in any real driver application.
+
+config SPI_BITBANG
+	bool "SPI bit-bang device"
+	default n
+	---help---
+		Enable support for a generic SPI bit-bang device.
+		See include/nuttx/spi/spi_bitbang.h for further information.
+
 if SPI_BITBANG
 
 config SPI_BITBANG_VARWIDTH
diff --git a/drivers/spi/Make.defs b/drivers/spi/Make.defs
index 9581a2736f6de47a3478b1b5460986e4a6df394e..e489bd600e47e4113571536e6807f81c4cb07b85 100644
--- a/drivers/spi/Make.defs
+++ b/drivers/spi/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # drivers/spi/Make.defs
 #
-#   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -37,6 +37,13 @@
 
 ifeq ($(CONFIG_SPI),y)
 
+ifeq ($(CONFIG_SPI_EXCHANGE),y)
+  CSRCS += spi_transfer.c
+  ifeq ($(CONFIG_SPI_DRIVER),y)
+    CSRCS += spi_driver.c
+  endif
+endif
+
 # Include the selected SPI drivers
 
 ifeq ($(CONFIG_SPI_BITBANG),y)
@@ -49,4 +56,3 @@ DEPPATH += --dep-path spi
 VPATH += :spi
 CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)spi}
 endif
-
diff --git a/drivers/spi/spi_bitbang.c b/drivers/spi/spi_bitbang.c
index 823b330982f734a42527349377b8e31277d2136b..e20a28b2128f50991a285ae71abea699c586fc3f 100644
--- a/drivers/spi/spi_bitbang.c
+++ b/drivers/spi/spi_bitbang.c
@@ -78,31 +78,6 @@
  *    information.
  */
 
-/* Debug ********************************************************************/
-/* Check if SPI debut is enabled (non-standard.. no support in
- * include/debug.h
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_SPI
-#endif
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
 
 /****************************************************************************
  * Private Function Prototypes
@@ -193,7 +168,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
 {
   FAR struct spi_bitbang_s *priv = (FAR struct spi_bitbang_s *)dev;
 
-  spivdbg("lock=%d\n", lock);
+  spiinfo("lock=%d\n", lock);
   if (lock)
     {
       /* Take the semaphore (perhaps waiting) */
@@ -236,7 +211,7 @@ static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
 {
   FAR struct spi_bitbang_s *priv = (FAR struct spi_bitbang_s *)dev;
 
-  spivdbg("devid=%d selected=%d\n", devid, selected);
+  spiinfo("devid=%d selected=%d\n", devid, selected);
   DEBUGASSERT(priv && priv->low->select);
   priv->low->select(priv, devid, selected);
 }
@@ -263,7 +238,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
 
   DEBUGASSERT(priv && priv->low->setfrequency);
   actual = priv->low->setfrequency(priv, frequency);
-  spivdbg("frequency=%d holdtime=%d actual=%d\n",
+  spiinfo("frequency=%d holdtime=%d actual=%d\n",
           frequency, priv->holdtime, actual);
   return actual;
 }
@@ -289,7 +264,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
 
   DEBUGASSERT(priv && priv->low->setmode);
   priv->low->setmode(priv, mode);
-  spivdbg("mode=%d exchange=%p\n", mode, priv->exchange);
+  spiinfo("mode=%d exchange=%p\n", mode, priv->exchange);
 }
 
 /****************************************************************************
@@ -312,11 +287,11 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
 #ifdef CONFIG_SPI_BITBANG_VARWIDTH
   FAR struct spi_bitbang_s *priv = (FAR struct spi_bitbang_s *)dev;
 
-  spivdbg("nbits=%d\n", nbits);
+  spiinfo("nbits=%d\n", nbits);
   DEBUGASSERT(priv && nbits > 0 && nbits <= 16);
   priv->nbits = nbits;
 #else
-  spivdbg("nbits=%d\n", nbits);
+  spiinfo("nbits=%d\n", nbits);
   DEBUGASSERT(nbits == 8);
 #endif
 }
@@ -376,7 +351,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev,
   uint16_t dataout;
   uint16_t datain;
 
-  spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+  spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
   DEBUGASSERT(priv && priv->low && priv->low->exchange);
 
   /* If there is no data source, send 0xff */
@@ -564,7 +539,7 @@ FAR struct spi_dev_s *spi_create_bitbang(FAR const struct spi_bitbang_ops_s *low
   priv = (FAR struct spi_bitbang_s *)zalloc(sizeof(struct spi_bitbang_s));
   if (!priv)
     {
-      spidbg("Failed to allocate the device structure\n");
+      spierr("ERROR: Failed to allocate the device structure\n");
       return NULL;
     }
 
diff --git a/drivers/spi/spi_driver.c b/drivers/spi/spi_driver.c
new file mode 100644
index 0000000000000000000000000000000000000000..5f14827c03c3b3874983fec0bb4d80212ba1b2a0
--- /dev/null
+++ b/drivers/spi/spi_driver.c
@@ -0,0 +1,411 @@
+/****************************************************************************
+ * drivers/spi/spi_driver.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_SPI_DRIVER
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Device naming ************************************************************/
+
+#define DEVNAME_FMT    "/dev/spi%d"
+#define DEVNAME_FMTLEN (8 + 3 + 1)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* Driver state structure */
+
+struct spi_driver_s
+{
+  FAR struct spi_dev_s *spi;  /* Contained SPI lower half driver */
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  sem_t exclsem;              /* Mutual exclusion */
+  int16_t crefs;              /* Number of open references */
+  bool unlinked;              /* True, driver has been unlinked */
+#endif
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int     spidrvr_open(FAR struct file *filep);
+static int     spidrvr_close(FAR struct file *filep);
+static ssize_t spidrvr_read(FAR struct file *filep, FAR char *buffer,
+                 size_t buflen);
+static ssize_t spidrvr_write(FAR struct file *filep, FAR const char *buffer,
+                 size_t buflen);
+static int     spidrvr_ioctl(FAR struct file *filep, int cmd,
+                 unsigned long arg);
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+static int     spidrvr_unlink(FAR struct inode *inode);
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct file_operations spidrvr_fops =
+{
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  spidrvr_open,    /* open */
+  spidrvr_close,   /* close */
+#else
+  0,               /* open */
+  0,               /* close */
+#endif
+  spidrvr_read,    /* read */
+  spidrvr_write,   /* write */
+  0,               /* seek */
+  spidrvr_ioctl    /* ioctl */
+#ifndef CONFIG_DISABLE_POLL
+  , 0              /* poll */
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  , spidrvr_unlink /* unlink */
+#endif
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: spidrvr_open
+ ****************************************************************************/
+
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+static int spidrvr_open(FAR struct file *filep)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct spi_driver_s *priv;
+  int ret;
+
+  /* Get our private data structure */
+
+  DEBUGASSERT(filep != NULL && filep->f_inode != NULL);
+  inode = filep->f_inode;
+
+  priv = (FAR struct spi_driver_s *)inode->i_private;
+  DEBUGASSERT(priv);
+
+  /* Get exclusive access to the SPI driver state structure */
+
+  ret = sem_wait(&priv->exclsem);
+  if (ret < 0)
+    {
+      int errcode = errno;
+      DEBUGASSERT(errcode < 0);
+      return -errcode;
+    }
+
+  /* Increment the count of open references on the RTC driver */
+
+  priv->crefs++;
+  DEBUGASSERT(priv->crefs > 0);
+
+  sem_post(&priv->exclsem);
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: spidrvr_close
+ ****************************************************************************/
+
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+static int spidrvr_close(FAR struct file *filep)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct spi_driver_s *priv;
+  int ret;
+
+  /* Get our private data structure */
+
+  DEBUGASSERT(filep != NULL && filep->f_inode != NULL);
+  inode = filep->f_inode;
+
+  priv = (FAR struct spi_driver_s *)inode->i_private;
+  DEBUGASSERT(priv);
+
+  /* Get exclusive access to the SPI driver state structure */
+
+  ret = sem_wait(&priv->exclsem);
+  if (ret < 0)
+    {
+      int errcode = errno;
+      DEBUGASSERT(errcode < 0);
+      return -errcode;
+    }
+
+  /* Decrement the count of open references on the RTC driver */
+
+  DEBUGASSERT(priv->crefs > 0);
+  priv->crefs--;
+
+  /* If the count has decremented to zero and the driver has been unlinked,
+   * then commit Hara-Kiri now.
+   */
+
+  if (priv->crefs <= 0 && priv->unlinked)
+    {
+      sem_destroy(&priv->exclsem);
+      kmm_free(priv);
+      return OK;
+    }
+
+  sem_post(&priv->exclsem);
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: spidrvr_read
+ ****************************************************************************/
+
+static ssize_t spidrvr_read(FAR struct file *filep, FAR char *buffer,
+                            size_t len)
+{
+  return 0; /* Return EOF */
+}
+
+/****************************************************************************
+ * Name: spidrvr_write
+ ****************************************************************************/
+
+static ssize_t spidrvr_write(FAR struct file *filep, FAR const char *buffer,
+                             size_t len)
+{
+  return len; /* Say that everything was written */
+}
+
+/****************************************************************************
+ * Name: spidrvr_ioctl
+ ****************************************************************************/
+
+static int spidrvr_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
+{
+  FAR struct inode *inode = filep->f_inode;
+  FAR struct spi_driver_s *priv;
+  FAR struct spi_sequence_s *seq;
+  int ret;
+
+  spiinfo("cmd=%d arg=%lu\n", cmd, arg);
+
+  /* Get our private data structure */
+
+  DEBUGASSERT(filep != NULL && filep->f_inode != NULL);
+  inode = filep->f_inode;
+
+  priv = (FAR struct spi_driver_s *)inode->i_private;
+  DEBUGASSERT(priv);
+
+  /* Get exclusive access to the SPI driver state structure */
+
+  ret = sem_wait(&priv->exclsem);
+  if (ret < 0)
+    {
+      int errcode = errno;
+      DEBUGASSERT(errcode < 0);
+      return -errcode;
+    }
+
+  /* Process the IOCTL command */
+
+  switch (cmd)
+    {
+      /* Command:      SPIIOC_TRANSFER
+       * Description:  Perform a sequence of SPI transfers
+       * Argument:     A reference to an instance of struct spi_sequence_s.
+       * Dependencies: CONFIG_SPI_DRIVER
+       */
+
+      case SPIIOC_TRANSFER:
+        {
+          /* Get the reference to the spi_transfer_s structure */
+
+          seq = (FAR struct spi_sequence_s *)((uintptr_t)arg);
+          DEBUGASSERT(seq != NULL);
+
+          /* Perform the transfer */
+
+          ret = spi_transfer(priv->spi, seq);
+        }
+        break;
+
+      default:
+        ret = -ENOTTY;
+        break;
+    }
+
+  sem_post(&priv->exclsem);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: spidrvr_unlink
+ ****************************************************************************/
+
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+static int spidrvr_unlink(FAR struct inode *inode)
+{
+  FAR struct spi_driver_s *priv;
+  int ret;
+
+  /* Get our private data structure */
+
+  DEBUGASSERT(inode != NULL && inode->i_private != NULL);
+  priv = (FAR struct spi_driver_s *)inode->i_private;
+
+  /* Get exclusive access to the SPI driver state structure */
+
+  ret = sem_wait(&priv->exclsem);
+  if (ret < 0)
+    {
+      int errcode = errno;
+      DEBUGASSERT(errcode < 0);
+      return -errcode;
+    }
+
+  /* Are there open references to the driver data structure? */
+
+  if (priv->crefs <= 0)
+    {
+      sem_destroy(&priv->exclsem);
+      kmm_free(priv);
+      return OK;
+    }
+
+  /* No... just mark the driver as unlinked and free the resouces when the
+   * last client closes their reference to the driver.
+   */
+
+  priv->unlinked = true;
+  sem_post(&priv->exclsem);
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: spi_register
+ *
+ * Description:
+ *   Create and register the SPI character driver.
+ *
+ *   The SPI character driver is a simple character driver that supports SPI
+ *   transfers.  The intent of this driver is to support SPI testing.  It is
+ *   not suitable for use in any real driver application.
+ *
+ * Input Parameters:
+ *   spi - An instance of the lower half SPI driver
+ *   bus - The SPI bus number.  This will be used as the SPI device minor
+ *     number.  The SPI character device will be registered as /dev/spiN
+ *     where N is the minor number
+ *
+ * Returned Value:
+ *   OK if the driver was successfully register; A negated errno value is
+ *   returned on any failure.
+ *
+ ****************************************************************************/
+
+int spi_register(FAR struct spi_dev_s *spi, int bus)
+{
+  FAR struct spi_driver_s *priv;
+  char devname[DEVNAME_FMTLEN];
+  int ret;
+
+  /* Sanity check */
+
+  DEBUGASSERT(spi != NULL && (unsigned)bus < 1000);
+
+  /* Allocate a SPI character device structure */
+
+  priv = (FAR struct spi_driver_s *)kmm_zalloc(sizeof(struct spi_driver_s));
+  if (priv)
+    {
+      /* Initialize the SPI character device structure */
+
+      priv->spi = spi;
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+      sem_init(&priv->exclsem, 0, 1);
+#endif
+
+      /* Create the character device name */
+
+      snprintf(devname, DEVNAME_FMTLEN, DEVNAME_FMT, bus);
+      ret = register_driver(devname, &spidrvr_fops, 0666, priv);
+      if (ret < 0)
+        {
+          /* Free the device structure if we failed to create the character
+           * device.
+           */
+
+          kmm_free(priv);
+        }
+
+      /* Return the result of the registration */
+
+      return ret;
+    }
+
+  return -ENOMEM;
+}
+
+#endif /* CONFIG_SPI_DRIVER */
diff --git a/drivers/spi/spi_transfer.c b/drivers/spi/spi_transfer.c
new file mode 100644
index 0000000000000000000000000000000000000000..f8a92ebc705ee5f862c9d4db178fee13495839a4
--- /dev/null
+++ b/drivers/spi/spi_transfer.c
@@ -0,0 +1,160 @@
+/****************************************************************************
+ * drivers/spi/spi_transfer.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#ifdef CONFIG_SPI_EXCHANGE
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: spi_transfer
+ *
+ * Description:
+ *   This is a helper function that can be used to encapsulate and manage
+ *   a sequence of SPI transfers.  The SPI bus will be locked and the
+ *   SPI device selected for the duration of the transfers.
+ *
+ * Input Parameters:
+ *   spi - An instance of the SPI device to use for the transfer
+ *   seq - Describes the sequence of transfers.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int spi_transfer(FAR struct spi_dev_s *spi, FAR struct spi_sequence_s *seq)
+{
+  FAR struct spi_trans_s *trans;
+  int ret = OK;
+  int i;
+
+  DEBUGASSERT(spi != NULL && seq != NULL && seq->trans != NULL);
+
+  /* Get exclusive access to the SPI bus */
+
+  SPI_LOCK(spi, true);
+
+  /* Establish the fixed SPI attributes for all transfers in the sequence */
+
+  (void)SPI_SETFREQUENCY(spi, seq->frequency);
+
+#ifdef CONFIG_SPI_CS_DELAY_CONTROL
+  ret = SPI_SETDELAY(spi, seq->a, seq->b, seq->c);
+  if (ret < 0)
+    {
+      spierr("ERROR: SPI_SETDELAY failed: %d\n", ret);
+      SPI_LOCK(spi, false);
+      return ret;  
+    }
+#endif
+
+  SPI_SETMODE(spi, seq->mode);
+  SPI_SETBITS(spi, seq->nbits);
+
+  /* Select the SPI device in preparation for the transfer.
+   * REVISIT: This is redundant.
+   */
+
+  SPI_SELECT(spi, seq->dev, true);
+
+  /* Then perform each transfer is the sequence */
+
+  for (i = 0, trans = seq->trans; i < (int)seq->ntrans; i++, trans++)
+    {
+      /* Establish the fixed SPI attributes for unique to this transaction */
+
+#ifdef CONFIG_SPI_HWFEATURES
+      ret = SPI_HWFEATURES(spi, trans->hwfeat);
+      if (ret < 0)
+        {
+          spierr("ERROR: SPI_HWFEATURES failed: %d\n", ret);
+          break;
+        }
+#endif
+
+#ifdef CONFIG_SPI_CMDDATA
+      ret = SPI_CMDDATA(spi, seq->dev, trans->cmd);
+      if (ret < 0)
+        {
+          spierr("ERROR: SPI_CMDDATA failed: %d\n", ret);
+          break;
+        }
+#endif
+
+      /* [Re-]select the SPI device in preparation for the transfer */
+
+      SPI_SELECT(spi, seq->dev, true);
+
+      /* Perform the transfer */
+
+      SPI_EXCHANGE(spi, trans->txbuffer, trans->rxbuffer, trans->nwords);
+
+      /* Possibly de-select the SPI device after the transfer */
+
+      if (trans->deselect)
+        {
+          SPI_SELECT(spi, seq->dev, false);
+        }
+
+      /* Perform any requested inter-transfer delay */
+
+      if (trans->delay > 0)
+        {
+          usleep(trans->delay);
+        }
+    }
+
+  SPI_SELECT(spi, seq->dev, false);
+  SPI_LOCK(spi, false);
+  return ret;  
+}
+
+#endif /* CONFIG_SPI_EXCHANGE */
diff --git a/drivers/syslog/Kconfig b/drivers/syslog/Kconfig
index d273e3d1a3a8293165cb14a7d9c82808d1ac73ee..eb5b455af6d7a253e064a3f9fed7aba19491b7e9 100644
--- a/drivers/syslog/Kconfig
+++ b/drivers/syslog/Kconfig
@@ -3,7 +3,13 @@
 # see the file kconfig-language.txt in the NuttX tools repository.
 #
 
-comment "System Logging"
+menu "System Logging"
+
+# Selected if the architecture has its own, built-in SYSLOGging enabled
+
+config ARCH_SYSLOG
+	bool
+	default n
 
 config RAMLOG
 	bool "RAM log device support"
@@ -20,18 +26,6 @@ config RAMLOG
 		details as needed to support logging.
 
 if RAMLOG
-config RAMLOG_SYSLOG
-	bool "Use RAMLOG for SYSLOG"
-	default n
-	depends on SYSLOG
-	---help---
-		Use the RAM logging device for the syslogging interface.  If this feature
-		is enabled (along with SYSLOG), then all debug output (only) will be re-directed
-		to the circular buffer in RAM.  This RAM log can be view from NSH using the
-		'dmesg'command.
-
-		Do not enable more than one SYSLOG device.
-
 config RAMLOG_CONSOLE
 	bool "Use RAMLOG for /dev/console"
 	default n
@@ -54,7 +48,8 @@ config RAMLOG_CRLF
 	bool "RAMLOG CR/LF"
 	default n
 	---help---
-		Pre-pend a carriage return before every linefeed that goes into the RAM log.
+		Pre-pend a carriage return before every linefeed that goes into the
+		RAM log.
 
 config RAMLOG_NONBLOCKING
 	bool "RAMLOG non-block reads"
@@ -72,21 +67,130 @@ config RAMLOG_NPOLLWAITERS
 
 endif
 
+config DRIVER_NOTE
+	bool "Scheduler instrumentation driver"
+	default n
+	depends on SCHED_INSTRUMENTATION_BUFFER && SCHED_NOTE_GET
+	---help---
+		Enable building a serial driver that can be used by an application
+		to read data from the in-memory, scheduler instrumentation "note"
+		buffer.
+
+config SYSLOG_INTBUFFER
+	bool "Use interrupt buffer"
+	default n
+	---help---
+		Enables an interrupt buffer that will be used to serialize debug
+		output from interrupt handlers.
+
+config SYSLOG_INTBUFSIZE
+	int "Interrupt buffer size"
+	default 512
+	depends on SYSLOG_INTBUFFER
+	---help---
+		The size of the interrupt buffer in bytes.
+
+config SYSLOG_TIMESTAMP
+	bool "Prepend timestamp to syslog message"
+	default n
+	---help---
+		Prepend timestamp to syslog message.
+
+config SYSLOG_SERIAL_CONSOLE
+	bool
+	default n
+
+choice
+	prompt "System log device"
+	default SYSLOG_CONSOLE if DEV_CONSOLE
+	default SYSLOG_NONE if !DEV_CONSOLE
+	depends on !ARCH_SYSLOG
+
+config SYSLOG_CHAR
+	bool "Log to a character device"
+	---help---
+		Enable the generic character device for the SYSLOG. The full path to the
+		SYSLOG device is provided by SYSLOG_DEVPATH. A valid character device (or
+		file) must exist at this path.  It will by opened by syslog_initialize.
+
+config RAMLOG_SYSLOG
+	bool "Use RAMLOG for SYSLOG"
+	depends on RAMLOG && !ARCH_SYSLOG
+	---help---
+		Use the RAM logging device for the syslogging interface.  If this
+		feature is enabled (along with SYSLOG), then all debug output (only)
+		will be re-directed to the circular buffer in RAM.  This RAM log can
+		be viewed from NSH using the 'dmesg'command.
+
 config SYSLOG_CONSOLE
+	bool "Log to /dev/console"
+	depends on DEV_CONSOLE
+	select SYSLOG_SERIAL_CONSOLE if SERIAL_CONSOLE
+	---help---
+		Use the system console as a SYSLOG output device.
+
+config SYSLOG_NONE
+	bool "No SYSLOG device"
+	---help---
+		syslog() interfaces will be present, but all output will go to the
+		bit-bucket.
+
+endchoice
+
+config SYSLOG_FILE
+	bool "Sylog file output"
+	default n
+	---help---
+		Build in support to use a file to collect SYSOG output.  File SYSLOG
+		channels differ from other SYSLOG channels in that they cannot be
+		established until after fully booting and mounting the target file
+		system.  The function syslog_file_channel() would need to be called
+		from board-specific bring-up logic AFTER mounting the file system
+		containing 'devpath'.
+
+		NOTE interrupt level SYSLOG output will be lost in this case unless
+		the interrupt buffer is used.
+
+config CONSOLE_SYSLOG
 	bool "Use SYSLOG for /dev/console"
 	default n
-	depends on DEV_CONSOLE
+	depends on DEV_CONSOLE && !SYSLOG_CONSOLE
 	---help---
-		Use the syslog logging device as a system console. If this feature is enabled 
-		(along with DEV_CONSOLE), then all console output will be re-directed to syslog
-		output (syslog_putc). This is useful, for example, if the only console is a Telnet
-		console.  Then in that case, console output from non-Telnet threads will go to
-		the syslog output.
+		Use the syslog logging device as a system console. If this feature is
+		enabled (along with DEV_CONSOLE), then all console output will be
+		re-directed to syslog output (syslog_putc). This is useful, for
+		example, if the only console is a Telnet console.  Then in that case,
+		console output from non-Telnet threads will go to the syslog output.
 
-config DRIVER_NOTE
-	bool "Scheduler instrumentation driver"
+config SYSLOG_CHAR_CRLF
+	bool "SYSLOG device CR/LF"
+	default y
+	depends on SYSLOG_CHAR
+	---help---
+		Pre-pend a carriage return before every linefeed that goes to the
+		character device.
+
+config SYSLOG_DEVPATH
+	string "System log device"
+	default "/dev/ttyS1"
+	depends on SYSLOG_CHAR
+	---help---
+		The full path to the system logging device.  For the RAMLOG SYSLOG device,
+		this is normally "/dev/ramlog".  For character SYSLOG devices, it should be
+		some other existing character device (or file) supported by the configuration
+		(such as "/dev/ttyS1")/
+
+config SYSLOG_CHARDEV
+	bool "SYSLOG character device"
 	default n
-	depends on SCHED_INSTRUMENTATION_BUFFER
 	---help---
-		Enable building a serial driver that can be used by an application to read data
-		from the in-memory, scheduler instrumentatin "note" buffer.
+		Enables support for a simple character driver at /dev/syslog whose
+		write() method will transfer data to the SYSLOG device.  This can be
+		useful if, for example, you want to redirect the output of a program
+		to the SYSLOG.
+
+		NOTE that unlike other syslog output, this data is unformatted raw
+		byte output with no time-stamping or any other SYSLOG features
+		supported.
+
+endmenu # System logging
diff --git a/drivers/syslog/Make.defs b/drivers/syslog/Make.defs
index f573217d6de944a94ceedb65b77d2a084f1cf9b0..2cad218e5ae11518cd7baab3ce99f91285a610b7 100644
--- a/drivers/syslog/Make.defs
+++ b/drivers/syslog/Make.defs
@@ -2,7 +2,7 @@
 # drivers/syslog/Make.defs
 # These drivers support system logging devices
 #
-#   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -35,60 +35,62 @@
 ############################################################################
 
 ############################################################################
-# Include SYSLOG drivers (only one should be enabled)
-
-ifeq ($(CONFIG_SYSLOG),y)
+# Include SYSLOG Infrastructure
 
-# If no special loggin devices are implemented, then the default SYSLOG
-# logic at fs/fs_syslog.c will be used
+CSRCS += vsyslog.c syslog_stream.c syslog_emergstream.c syslog_channel.c
+CSRCS += syslog_putc.c syslog_force.c syslog_flush.c
 
-# (Add other SYSLOG drivers here)
+ifeq ($(CONFIG_SYSLOG_INTBUFFER),y)
+  CSRCS += syslog_intbuffer.c
+endif
 
-ifeq ($(CONFIG_RAMLOG),y)
-  CSRCS += ramlog.c
+ifneq ($(CONFIG_ARCH_SYSLOG),y)
+  CSRCS += syslog_initialize.c
 endif
 
+# The note driver is hosted in this directory, but is not associated with
+# SYSLOGging
+
 ifeq ($(CONFIG_DRIVER_NOTE),y)
   CSRCS += note_driver.c
 endif
 
-# (Add other SYSLOG_CONSOLE drivers here)
+# The RAMLOG device is usable as a system logging device or standalone
 
-ifeq ($(CONFIG_SYSLOG_CONSOLE),y)
-  CSRCS += syslog_console.c
+ifeq ($(CONFIG_RAMLOG),y)
+  CSRCS += ramlog.c
 endif
 
-# Include SYSLOG build support
-
-DEPPATH += --dep-path syslog
-VPATH += :syslog
-
 ############################################################################
-# The RAMLOG can be used even if system logging is not enabled.
+# Include SYSLOG drivers (only one should be enabled)
 
-else ifeq ($(CONFIG_RAMLOG),y)
+# System logging to a character device (or file)
 
-CSRCS += ramlog.c
+CSRCS += syslog_device.c
 
-ifeq ($(CONFIG_DRIVER_NOTE),y)
-  CSRCS += note_driver.c
+ifeq ($(CONFIG_SYSLOG_CHAR),y)
+CSRCS += syslog_devchannel.c
 endif
 
-# Include RAMLOG build support
+ifeq ($(CONFIG_SYSLOG_CONSOLE),y)
+CSRCS += syslog_consolechannel.c
+endif
 
-DEPPATH += --dep-path syslog
-VPATH += :syslog
+ifeq ($(CONFIG_SYSLOG_FILE),y)
+CSRCS += syslog_filechannel.c
+endif
 
-############################################################################
-# The scheduler note driver can be used in any event.
+ifeq ($(CONFIG_SYSLOG_CHARDEV),y)
+CSRCS += syslog_chardev.c
+endif
 
-else ifeq ($(CONFIG_DRIVER_NOTE),y)
+ifeq ($(CONFIG_CONSOLE_SYSLOG),y)
+  CSRCS += syslog_console.c
+endif
 
-CSRCS += note_driver.c
+# (Add other SYSLOG drivers here)
 
-# Include note driver build support
+# Include SYSLOG build support
 
 DEPPATH += --dep-path syslog
 VPATH += :syslog
-
-endif
diff --git a/drivers/syslog/README.txt b/drivers/syslog/README.txt
index 2d0445992e27d551d4901eb89fe44686d64a52d2..2764f0e2adf9a37f7f76584d85b327f603fa4327 100644
--- a/drivers/syslog/README.txt
+++ b/drivers/syslog/README.txt
@@ -1,75 +1,500 @@
 drivers/syslog README File
 ==========================
 
-This README file discusses the SYLOG drivers that can be found in the
-drivers/syslog directory.  The syslogging interfaces are defined in the
-header file include/syslog.h.  In NuttX, "syslog output" is really
-synonymous to "debug output" and, therefore, the debugging interfaces
-defined in the header file include/debug.h are also sysloggin interfaces.
-
-By default, all system log output goes to console (/dev/console).  But that
-behavior can be changed by the defining CONFIG_SYSLOG in the NuttX
-configuration.  In that, case all low-level debug output will go through
-syslog_putc().
-
-One version of syslog_putc() is defined in fs/fs_syslog.c; that version is
-used when CONFIG_SYSLOG_CHAR is defined.  That version of syslog_putc()
-just integrates with the file system to re-direct debug output to a
-character device or to a file. A disadvantage of using the generic character
-device for the SYSLOG is that it cannot handle debug output generated from
-interrupt level handles.
-
-If CONFIG_SYSLOG_CHAR is not defined, then other custom SYSLOG drivers
-can be used.  These custom SYSLOG drivers can do things like handle
-unusual logging media and since they can avoid the general file system
-interfaces, can be designed to support debug output from interrupt handlers.
-
-Those custom SYSLOG drivers reside in this directory.
-
-ramlog.c
---------
+SYSLOG Interfaces
+=================
+
+  Standard SYSLOG Interfaces
+  --------------------------
+  The NuttX SYSLOG is an architecture for getting debug and status
+  information from the system.  The syslogging interfaces are defined in the
+  header file include/syslog.h.  The primary interface to SYSLOG sub-system
+  is the function syslog() and, to a lesser extent, its companion vsyslog():
+
+  syslog() and vsyslog()
+  ----------------------
+  Prototypes:
+
+    int syslog(int priority, FAR const IPTR char *format, ...);
+    int vsyslog(int priority, FAR const IPTR char *src, va_list ap);
+
+  Description:
+
+    syslog() generates a log message. The priority argument is formed by
+    ORing the facility and the level values (see include/syslog.h). The
+    remaining arguments are a format, as in printf and any arguments to the
+    format.
+
+    The NuttX implementation does not support any special formatting
+    characters beyond those supported by printf.
+
+    The function vsyslog() performs the same task as syslog() with the
+    difference that it takes a set of arguments which have been obtained
+    using the stdarg variable argument list macros.
+
+  setlogmask()
+  ------------
+  The additional setlogmask() interface can use use to filter SYSLOG output:
+
+  Prototypes:
+
+    int setlogmask(int mask);
+
+  Description:
+
+    The setlogmask() function sets the logmask and returns the previous
+    mask. If the mask argument is 0, the current logmask is not modified.
+
+    The SYSLOG priorities are: LOG_EMERG, LOG_ALERT, LOG_CRIT, LOG_ERR,
+    LOG_WARNING, LOG_NOTICE, LOG_INFO, and LOG_DEBUG.  The bit corresponding
+    to a priority p is LOG_MASK(p); LOG_UPTO(p) provides the mask of all
+    priorities in the above list up to and including p.
+
+    Per OpenGroup.org "If the maskpri argument is 0, the current log mask
+    is not modified."  In this implementation, the value zero is permitted
+    in order to disable all syslog levels.
+
+    REVISIT: Per POSIX the syslog mask should be a per-process value but in
+    NuttX, the scope of the mask is dependent on the nature of the build:
+
+    * Flat Build:  There is one, global SYSLOG mask that controls all output.
+      Protected Build:  There are two SYSLOG masks.  One within the kernel
+      that controls only kernel output.  And one in user-space that controls
+      only user SYSLOG output.
+    * Kernel Build:  The kernel build is compliant with the POSIX requirement:
+      There will be one mask for for each user process, controlling the
+      SYSLOG output only form that process.  There will be a separate mask
+      accessable only in the kernel code to control kernel SYSLOG output.
+     *
+
+  These are all standard interfaces as defined at http://pubs.opengroup.org/onlinepubs/009695399/functions/closelog.html
+
+  Debug Interfaces
+  ----------------
+  In NuttX, syslog output is really synonymous to debug output and,
+  therefore, the debugging interface macros defined in the header file
+  include/debug.h are also syslogging interfaces.  Those macros are simply
+  wrappers around syslog().  The debugging interfaces differ from the syslog
+  interfaces in that:
+
+    * They do not take a priority parameter; the priority is inherent in the
+      debug macro name.
+    * They decorate the output stream with information such as the file name
+    * They can each be disabled via configuration options.
+
+  Each debug macro has a base name that represents the priority and a prefix
+  that represents the sub-system.  Each macro is individually initialized by
+  both priority and sub-system.  For example, uerr() is the macro used for
+  error level messages from the USB subsystem and is enabled with
+  CONFIG_DEBUG_USB_ERROR.
+
+  The base debug macro names, their priority, and configuration variable are
+  summarized below:
+
+    * info().  The info() macro is the lowest priority (LOG_INFO) and is
+      intended to provide general information about the flow of program
+      execution so that you can get an overview of the behavior of the
+      program.  info() is often very chatty and voluminous and usually more
+      information than you may want to see.  The info() macro is controlled
+      via CONFIG_DEBUG_subsystem_INFO
+    * warn().  The warn() macro has medium priority (LOG_WARN) and is
+      controlled by CONFIG_DEBUG_subsystem_WARN.  The warn() is intended to
+      note exceptional or unexpected conditions that meigh be potential
+      errors or, perhaps, minor errors that easily recovered.
+    * err().  This is a high priority debug macro (LOG_ERROR) and controlled
+      by CONFIG_DEBUG_subsystem_ERROR.  The err() is reserved to indicate
+      important error conditions.
+    * alert(). The highest priority debug macro (LOG_EMERG) and is
+      controlled by CONFIG_DEBUG_ALERT.  The alert() macro is reserved for
+      use solely by assertion and crash handling logic.  It also differs
+      from the other macros in that it cannot be enabled or disabled per
+      subsystem.
+
+SYSLOG Channels
+===============
+
+  SYSLOG Channel Interfaces
+  -------------------------
+  In the NuttX SYSLOG implementation, the underlying device logic the
+  supports the SYSLOG output is referred to as a SYSLOG channel//.  Each
+  SYSLOG channel is represented by an interface defined in
+  include/nuttx/syslog/syslog.h:
+
+    /* This structure provides the interface to a SYSLOG device */
+
+    typedef CODE int (*syslog_putc_t)(int ch);
+    typedef CODE int (*syslog_flush_t)(void);
+
+    struct syslog_channel_s
+    {
+      /* I/O redirection methods */
+
+      syslog_putc_t sc_putc;    /* Normal buffered output */
+      syslog_putc_t sc_force;   /* Low-level output for interrupt handlers */
+      syslog_flush_t sc_flush;  /* Flush buffered output (on crash) */
+
+      /* Implementation specific logic may follow */
+    };
+
+  The channel interface is instantiated by calling syslog_channel():
+
+  syslog_channel()
+  ----------------
+  Prototype:
+
+    int syslog_channel(FAR const struct syslog_channel_s *channel);
+
+  Description:
+
+    Configure the SYSLOGging function to use the provided channel to
+    generate SYSLOG output.
+
+    syslog_channel() is a non-standard, internal OS interface and is not
+    available to applications.  It may be called numerous times as
+    necessary to change channel interfaces.
+
+  Input Parmeters:
+
+     * channel - Provides the interface to the channel to be used.
+
+  Returned Value:
+
+    Zero (OK)is returned on  success.  A negated errno value is returned
+    on any failure.
+
+  SYSLOG Channel Initialization
+  -----------------------------
+  The initial, default SYSLOG channel is established with statically
+  initialized global variables so that some level of SYSLOG output may be
+  available immediately upon reset.  This initialized data is in the file
+  drivers/syslog/syslog_channel.c.  The initial SYSLOG capability is
+  determined by the selected SYSLOG channel:
+
+    * In-Memory Buffer (RAMLOG).  Full SYSLOG capability as available at
+      reset.
+    * Serial Console.  If the serial implementation provides the low-level
+      character output function up_putc(), then that low level serial output
+      is available as soon as the serial device has been configured.
+    * For all other SYSLOG channels, all SYSLOG output goes to the bit-
+      bucket until the SYSLOG channel device has been initialized.
+
+  The syslog channel device is initialized when the bring-up logic calls
+  syslog_intialize():
+
+  syslog_initialize()
+  -------------------
+  Prototype:
+
+    #ifndef CONFIG_ARCH_SYSLOG
+    int syslog_initialize(enum syslog_init_e phase);
+    #else
+    #  define syslog_initialize(phase)
+    #endif
+
+  Description:
+
+    One power up, the SYSLOG facility is non-existent or limited to very
+    low-level output.  This function is called later in the initialization
+    sequence after full driver support has been initialized.  It installs
+    the configured SYSLOG drivers and enables full SYSLOGing capability.
+
+    This function performs these basic operations:
+
+    * Initialize the SYSLOG device
+    * Call syslog_channel() to begin using that device.
+    * If CONFIG_ARCH_SYSLOG is selected, then the architecture-specific
+      logic will provide its own SYSLOG device initialize which must include
+      as a minimum a call to syslog_channel() to use the device.
+
+  Input Parameters:
+
+    * phase - One of {SYSLOG_INIT_EARLY, SYSLOG_INIT_LATE}
+
+  Returned Value:
+    Zero (OK) is returned on success; a negated errno value is returned on
+    any failure.
+
+  Different types of SYSLOG devices have different OS initialization
+  requirements.  Some are available immediately at reset, some are available
+  after some basic OS initialization, and some only after OS is fully
+  initialized.  In order to satisfy these different initialization
+  requirements, syslog_initialize() is called twice from the boot-up logic:
+
+    * syslog_initialize() is called from the architecture-specific
+      up_initialize() function as some as basic hardware resources have been
+      initialized: Timers, interrupts, etc.  In this case,
+      syslog_initialize() is called with the argument SYSLOG_INIT_EARLY.
+    * syslog_initialize() is called again from os_start() when the full OS
+      initialization has completed, just before the application main entry
+      point is spawned.  In this case, syslog_initialize() is called with
+      the argument SYSLOG_INIT_LATE.
+
+  There are other types of SYSLOG channel devices that may require even
+  further initialization.  For example, the file SYSLOG channel (described
+  below) cannot be initialized until the necessary file systems have been
+  mounted.
+
+  Interrupt Level SYSLOG Output
+  -----------------------------
+  As a general statement, SYSLOG output only supports //normal// output from
+  NuttX tasks.  However, for debugging purposes, it is also useful to get
+  SYSLOG output from interrupt level logic.  In an embedded system, that is
+  often where the most critical operations are performed.
+
+  There are three conditions under which SYSLOG output generated from interrupt level processing can a included the SYSLOG output stream:
+
+  1. Low-Level Serial Output
+  --------------------------
+  If you are using a SYSLOG console channel (CONFIG_SYSLOG_CONSOLE) with a
+  serial console (CONFIG_SYSLOG_SERIAL_CONSOLE) and if the underlying
+  architecture supports the low-level up_putc() interface
+  (CONFIG_ARCH_LOWPUTC), then the SYLOG logic will direct the output to
+  up_putc() which is capable of generating the serial output within the
+  context of an interrupt handler.
+
+  There are a few issues in doing this however:
+
+    * up_putc() is able to generate debug output in any context because it
+      disables serial interrupts and polls the hardware directly.  These
+      polls may take many milliseconds and during that time, all interrupts
+      are disable within the interrupt handler.  This, of course, interferes
+      with the real-time behavior of the RTOS.
+    * The output generated by up_putc() is immediate and in real-time.  The
+      normal SYSLOG output, on the other hand, is buffered in the serial
+      driver and may be delayed with respect to the immediate output by many
+      lines.  Therefore, the interrupt level SYSLOG ouput provided throug
+      up_putc() is grossly out of synchronization with other debug output
+
+  2. In-Memory Buffering
+  ----------------------
+  If the RAMLOG SYSLOG channel is supported, then all SYSLOG output is
+  buffered in memory.  Interrupt level SYSLOG output is no different than
+  normal SYSLOG output in this case.
+
+  3. Serialization Buffer
+  -----------------------
+  A final option is the use the an "interrupt buffer" to buffer the
+  interrupt level SYSLOG output.  In this case:
+
+    * SYSLOG output generated from interrupt level process in not sent to
+      the SYSLOG channel immediately.  Rather, it is buffered in the
+      interrupt serialization buffer.
+    * Later, when the next normal syslog output is generated, it will first
+      empty the content of the interrupt buffer to the SYSLOG device in the
+      proper context.  It will then be followed by the normal syslog output.
+      In this case, the interrupt level SYSLOG output will interrupt the
+      normal output stream and the interrupt level SYSLOG output will be
+      inserted into the correct position in the SYSLOG output when the next
+      normal SYLOG output is generated.
+
+  The SYSLOG interrupt buffer is enabled with CONFIG_SYSLOG_INTBUFFER.  When
+  the interrupt buffer is enabled, you must also provide the size of the
+  interrupt buffer with CONFIG_SYSLOG_INTBUFSIZE.
+
+SYSLOG Channel Options
+======================
+
+  SYSLOG Console Device
+  ---------------------
+  The typical SYSLOG device is the system console.  If you are using a
+  serial console, for example, then the SYSLOG output will appear on that
+  serial port.
+
+  This SYSLOG channel is automatically selected by syslog_initialize() in
+  the LATE initialization phase based on configuration options.  The
+  configuration options that affect this channel selection include:
+
+    * CONFIG_DEV_CONSOLE.  This setting indicates that the system supports a
+      console device, i.e., that the character device /dev/console exists.
+    * CONFIG_SERIAL_CONSOLE.  This configuration option is automatically
+      selected when a UART or USART is configured as the system console.
+      There is no user selection.
+    * CONFIG_SYSLOG_CONSOLE.  This configuration option is manually selected
+      from the SYSLOG menu.  This is the option that acutally enables the
+      SYSLOG console device.  It depends on CONFIG_DEV_CONSOLE and it will
+      automatically select CONFIG_SYSLOG_SERIAL_CONSOLE if
+      CONFIG_SERIAL_CONSOLE is selected.
+    * CONFIG_ARCH_LOWPUTC.  This is an indication from the architecture
+      configuration that the platform supports the up_putc() interface.
+      up_putc() is a very low level UART interface that can even be used from
+      interrupt handling.
+    * CONFIG_SYSLOG_SERIAL_CONSOLE.  This enables certain features of the
+      SYSLOG operation that depend on a serial console.  If
+      CONFIG_ARCH_LOWPUTC is also selected, for example, then up_putc() will
+      be used for the forced SYSLOG output.
+
+  Interrupt level SYSLOG output will be lost unless:  (1) the interrupt buffer
+  is enabled to support serialization, or (2) a serial console is used and
+  up_putc() is supported.
+
+  NOTE: The console channel uses the fixed character device at /dev/console.
+  The console channel is not synonymous with stdout (or file descriptor 1).
+  stdout is the current output from a task when, say, printf() if used.
+  Initially, stdout does, indeed, use the /dev/console device.  However,
+  stdout may subsequently be redirected to some other device or file.  This
+  is always the case, for example, when a transient device is used for a
+  console -- such as a USB console or a Telnet console.  The SYSLOG channel
+  is not redirected as stdout is; the SYSLOG channel will stayed fixed (unless
+  it is explicitly changed via syslog_channel()).
+
+  References: drivers/syslog/syslog_consolechannel.c and
+  drivers/syslog/syslog_device.c
+
+  SYSLOG Character Device
+  -----------------------
+  The system console device, /dev/console, is a character driver with some
+  special properties.  However, any character driver may be used as the
+  SYSLOG output channel.  For example, suppose you have a serial console on
+  /dev/ttyS0 and you want SYSLOG output on /dev/ttyS1.  Or suppose you
+  support only a Telnet console but want to capture debug output
+  /dev/ttyS0.
+
+  This SYSLOG device channel is selected with CONFIG_SYSLOG_CHAR and has no
+  other dependencies.  Differences fromthe SYSLOG console channel include:
+
+    * CONFIG_SYSLOG_DEVPATH.  This configuration option string must be set
+      provide the full path to the character device to be used.
+    * The forced SYSLOG output always goes to the bit-bucket.  This means
+      that interrupt level SYSLOG output will be lost unless the interrupt
+      buffer is enabled to support serialization.
+    * CONFIG_SYSLOG_CHAR_CRLF.  If CONFIG_SYSLOG_CHAR_CRLF is selected, then
+      linefeeds in the SYSLOG output will be expanded to Carriage Return +
+      Linefeed.  Since the character device is not a console device, the
+      addition of carriage returns to line feeds would not be performed
+      otherwise.  You would probably want this expansion if you use a serial
+      terminal program with the character device output.
+
+  References: drivers/syslog/syslog_devchannel.c and
+  drivers/syslog/syslog_device.c
+
+  SYSLOG File Device
+  ------------------
+  Files can also be used as the sink for SYSLOG output.  There is, however,
+  a very fundamental difference in using a file as opposed the system
+  console, a RAM buffer, or character device:  You must first mount the
+  file system that supports the SYSLOG file.  That difference means that
+  the file SYSLOG channel cannot be supported during the boot-up phase but
+  can be instantiated later when board level logic configures the application
+  environment, including mounting of the file systems.
+
+  The interface syslog_file_channel() is used to configure the SYSLOG file
+  channel:
+
+  syslog_file_channel()
+  ---------------------
+  Prototype:
+
+    #ifdef CONFIG_SYSLOG_FILE
+    int syslog_file_channel(FAR const char *devpath);
+    #endif
+
+  Description:
+
+    Configure to use a file in a mounted file system at 'devpath' as the
+    SYSLOG channel.
+
+    This tiny function is simply a wrapper around syslog_dev_initialize()
+    and syslog_channel().  It calls syslog_dev_initialize() to configure
+    the character file at 'devpath then calls syslog_channel() to use that
+    device as the SYSLOG output channel.
+
+    File SYSLOG channels differ from other SYSLOG channels in that they
+    cannot be established until after fully booting and mounting the target
+    file system.  This function would need to be called from board-specific
+    bring-up logic AFTER mounting the file system containing 'devpath'.
+
+    SYSLOG data generated prior to calling syslog_file_channel will, of
+    course, not be included in the file.
+
+    NOTE interrupt level SYSLOG output will be lost in this case unless
+    the interrupt buffer is used.
+
+  Input Parameters:
+
+    * devpath - The full path to the file to be used for SYSLOG output.
+      This may be an existing file or not.  If the file exists,
+      syslog_file_channel() will append new SYSLOG data to the end of the
+      file.  If it does not, then syslog_file_channel() will create the
+      file.
+
+  Returned Value:
+
+    Zero (OK) is returned on success; a negated errno value is returned on
+    any failure.
+
+  References: drivers/syslog/syslog_filechannel.c,
+  drivers/syslog/syslog_device.c, and include/nuttx/syslog/syslog.h.
+
+  SYSLOG RAMLOG Device
+  --------------------
+  The RAMLOG is a standalone feature that can be used to buffer any
+  character data in memory.  There are, however, special configurations
+  that can be used to configure the RAMLOG as a SYSLOG channel.  The RAMLOG
+  functionality is described in a more general way in the following
+  paragraphs.
+
+RAM Logging Device
+==================
+
   The RAM logging driver is a driver that was intended to support debugging
-  output (aka, syslogging).  It might be used when the normal serial output
-  is not available.  For example, if you are using a Telnet or USB serial
-  console, the debug output will get lost since the USB Telnet session does
-  not use the serial console.
-
-  The RAM logginc driver is also useful when debug output on the serial
-  console would interfere with performance or with usability.  The debug
-  output is write to RAM very quickly and so interferes less with realtime
-  performance.  And since the output does not appear on the serial console
-  until you want it to, it does not interfere with the usability of the
-  serial console.  The NuttShell (NSH), for eample, supports a 'dmesg'
-  command that can be used to dump the buffered output when you want to
-  see it.
-
-  The RAM logging  driver is similar to a pipe in that it saves the
-  debugging output in a FIFO in RAM.  It differs from a pipe in numerous
+  output (SYSLOG) when the normal serial output is not available.  For
+  example, if you are using a Telnet or USB serial console, the debug output
+  will get lost -- or worse.  For example, what if you want to debug the
+  network over Telnet?
+
+  The RAM logging driver can also accept debug output data from interrupt
+  handler with no special serialization buffering.  As an added benefit, the
+  RAM logging driver is much less invasive.  Since no actual I/O is performed
+  with the debug output is generated, the RAM logger tends to be much faster
+  and will interfere much less when used with time critical drivers.
+
+  The RAM logging driver is similar to a pipe in that it saves the debugging
+  output in a circular buffer in RAM.  It differs from a pipe in numerous
   details as needed to support logging.
 
   This driver is built when CONFIG_RAMLOG is defined in the Nuttx
   configuration.
 
-  Configuration options:
-
-    CONFIG_RAMLOG - Enables the RAM logging feature
-    CONFIG_RAMLOG_CONSOLE - Use the RAM logging device as a system console.
-      If this feature is enabled (along with CONFIG_DEV_CONSOLE), then all
-      console output will be re-directed to a circular buffer in RAM.  This
-      is useful, for example, if the only console is a Telnet console.  Then
-      in that case, console output from non-Telnet threads will go to the
-      circular buffer and can be viewed using the NSH 'dmesg' command.
-    CONFIG_RAMLOG_SYSLOG - Use the RAM logging device for the syslogging
-      interface.  If this feature is enabled (along with CONFIG_SYSLOG),
-      then all debug output (only) will be re-directed to the circular
-      buffer in RAM.  This RAM log can be view from NSH using the 'dmesg'
-      command.  NOTE:  Unlike the limited, generic character driver SYSLOG
-      device, the RAMLOG *can* be used to generate debug output from interrupt
-      level handlers.
-    CONFIG_RAMLOG_NPOLLWAITERS - The number of threads than can be waiting
+  dmesg
+  -----
+  When the RAMLOG (with SYSLOG) is enabled, a new NuttShell (NSH) command
+  will appear:  dmesg.  The dmsg command will dump the contents of the
+  circular buffer to the console (and also clear the circular buffer).
+
+  RAMLOG Configuration options
+  ----------------------------
+
+    * CONFIG_RAMLOG - Enables the RAM logging feature
+    * CONFIG_RAMLOG_CONSOLE - Use the RAM logging device as a system
+      console. If this feature is enabled (along with CONFIG_DEV_CONSOLE),
+      then all console output will be re-directed to a circular buffer in
+      RAM.  This might be useful, for example, if the only console is a
+      Telnet console.  Then in that case, console output from non-Telnet
+      threads will go to the circular buffer and can be viewed using the NSH
+      dmesg command.  This optional is not useful in other scenarios.
+    * CONFIG_RAMLOG_SYSLOG - Use the RAM logging device for the syslogging
+      interface.  If this feature is enabled, then all debug output (only)
+      will be re-directed to the circular buffer in RAM.  This RAM log can
+      be viewed from NSH using the 'dmesg' command.  NOTE:  Unlike the
+      limited, generic character driver SYSLOG device, the RAMLOG *can* be
+      used to capture debug output from interrupt level handlers.
+    * CONFIG_RAMLOG_NPOLLWAITERS - The number of threads than can be waiting
       for this driver on poll().  Default: 4
 
-   If CONFIG_RAMLOG_CONSOLE or CONFIG_RAMLOG_SYSLOG is selected, then the
-   following may also be provided:
+  If CONFIG_RAMLOG_CONSOLE or CONFIG_RAMLOG_SYSLOG is selected, then the
+  following must also be provided:
+
+    * CONFIG_RAMLOG_BUFSIZE - The size of the circular buffer to use.
+      Default: 1024 bytes.
+
+  Other miscellaneous settings
 
-   CONFIG_RAMLOG_BUFSIZE - Size of the console RAM log.  Default: 1024
+    * CONFIG_RAMLOG_CRLF - Pre-pend a carriage return before every linefeed
+      that goes into the RAM log.
+    * CONFIG_RAMLOG_NONBLOCKING - Reading from the RAMLOG will never block
+      if the RAMLOG is empty.  If the RAMLOG is empty, then zero is returned
+      (usually interpreted as end-of-file).  If you do not define this, the
+      NSH 'dmsg' command will lock up when called!  So you probably do want
+      this!
+    * CONFIG_RAMLOG_NPOLLWAITERS - The maximum number of threads that may be
+      waiting on the poll method.
diff --git a/drivers/syslog/ramlog.c b/drivers/syslog/ramlog.c
index 1025500987fb7843f02df1ab81646fcb1ab6be2a..d322710433c86719621ee0752dca2f78d18127d9 100644
--- a/drivers/syslog/ramlog.c
+++ b/drivers/syslog/ramlog.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/syslog/ramlog.c
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -53,20 +53,16 @@
 #include 
 #include 
 
-#include 
+#include 
 #include 
+#include 
 #include 
-#include 
 #include 
 
 #include 
 
 #ifdef CONFIG_RAMLOG
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -98,6 +94,13 @@ struct ramlog_dev_s
 /****************************************************************************
  * Private Function Prototypes
  ****************************************************************************/
+
+/* Syslog channel methods */
+
+#ifdef CONFIG_RAMLOG_SYSLOG
+static int ramlog_flush(void);
+#endif
+
 /* Helper functions */
 
 #ifndef CONFIG_DISABLE_POLL
@@ -117,6 +120,19 @@ static int     ramlog_poll(FAR struct file *filep, FAR struct pollfd *fds,
                            bool setup);
 #endif
 
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+#ifdef CONFIG_RAMLOG_SYSLOG
+static const struct syslog_channel_s g_ramlog_syslog_channel =
+{
+  ramlog_putc,
+  ramlog_putc,
+  ramlog_flush
+};
+#endif
+
 /****************************************************************************
  * Private Data
  ****************************************************************************/
@@ -145,7 +161,7 @@ static const struct file_operations g_ramlogfops =
 static char g_sysbuffer[CONFIG_RAMLOG_BUFSIZE];
 
 /* This is the device structure for the console or syslogging function.  It
- * must be statically initialized because the RAMLOG syslog_putc function
+ * must be statically initialized because the RAMLOG ramlog_putc function
  * could be called before the driver initialization logic executes.
  */
 
@@ -169,6 +185,17 @@ static struct ramlog_dev_s g_sysdev =
  * Private Functions
  ****************************************************************************/
 
+/****************************************************************************
+ * Name: ramlog_flush
+ ****************************************************************************/
+
+#ifdef CONFIG_RAMLOG_SYSLOG
+static int ramlog_flush(void)
+{
+  return OK;
+}
+#endif
+
 /****************************************************************************
  * Name: ramlog_pollnotify
  ****************************************************************************/
@@ -615,7 +642,7 @@ int ramlog_poll(FAR struct file *filep, FAR struct pollfd *fds, bool setup)
 
       struct pollfd **slot = (struct pollfd **)fds->priv;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       if (!slot)
         {
           ret = -EIO;
@@ -667,7 +694,14 @@ int ramlog_register(FAR const char *devpath, FAR char *buffer, size_t buflen)
       sem_init(&priv->rl_exclsem, 0, 1);
 #ifndef CONFIG_RAMLOG_NONBLOCKING
       sem_init(&priv->rl_waitsem, 0, 0);
+
+      /* The rl_waitsem semaphore is used for signaling and, hence, should
+       * not have priority inheritance enabled.
+       */
+
+      sem_setprotocol(&priv->rl_waitsem, SEM_PRIO_NONE);
 #endif
+
       priv->rl_bufsize = buflen;
       priv->rl_buffer  = buffer;
 
@@ -704,7 +738,7 @@ int ramlog_consoleinit(void)
 #endif
 
 /****************************************************************************
- * Name: ramlog_sysloginit
+ * Name: ramlog_syslog_channel
  *
  * Description:
  *   Use a pre-allocated RAM logging device and register it at the path
@@ -716,29 +750,34 @@ int ramlog_consoleinit(void)
  ****************************************************************************/
 
 #ifdef CONFIG_RAMLOG_SYSLOG
-int ramlog_sysloginit(void)
+int ramlog_syslog_channel(void)
 {
+  int ret;
+
   /* Register the syslog character driver */
 
-  return register_driver(CONFIG_SYSLOG_DEVPATH, &g_ramlogfops, 0666, &g_sysdev);
+  ret = register_driver(CONFIG_SYSLOG_DEVPATH, &g_ramlogfops, 0666, &g_sysdev);
+  if (ret < 0)
+    {
+      return ret;
+    }
+
+  /* Use the RAMLOG as the SYSLOG channel */
+
+  return syslog_channel(&g_ramlog_syslog_channel);
 }
 #endif
 
 /****************************************************************************
- * Name: syslog_putc
+ * Name: ramlog_putc
  *
  * Description:
- *   This is the low-level system logging interface.  The debugging/syslogging
- *   interfaces are syslog() and lowsyslog().  The difference is that
- *   the syslog() internface writes to syslog device (usually fd=1, stdout)
- *   whereas lowsyslog() uses a lower level interface that works from
- *   interrupt handlers.  This function is a a low-level interface used to
- *   implement lowsyslog() when CONFIG_RAMLOG_SYSLOG=y and CONFIG_SYSLOG=y
+ *   This is the low-level system logging interface.
  *
  ****************************************************************************/
 
 #if defined(CONFIG_RAMLOG_CONSOLE) || defined(CONFIG_RAMLOG_SYSLOG)
-int syslog_putc(int ch)
+int ramlog_putc(int ch)
 {
   FAR struct ramlog_dev_s *priv = &g_sysdev;
   int ret;
diff --git a/drivers/syslog/syslog.h b/drivers/syslog/syslog.h
new file mode 100644
index 0000000000000000000000000000000000000000..67aedbb9f1407ea86162ad8ae1f64fac2c98ae50
--- /dev/null
+++ b/drivers/syslog/syslog.h
@@ -0,0 +1,319 @@
+/****************************************************************************
+ * drivers/syslog/syslog.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __DRIVERS_SYSLOG_SYSLOG_H
+#define __DRIVERS_SYSLOG_SYSLOG_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/* The default SYSLOG channel */
+
+struct syslog_channel_s; /* Forward reference */
+EXTERN const struct syslog_channel_s g_default_channel;
+
+/* This is the current syslog channel in use.  It initially points to
+ * g_default_channel.
+ */
+
+EXTERN FAR const struct syslog_channel_s *g_syslog_channel;
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: syslog_dev_initialize
+ *
+ * Description:
+ *   Initialize to use the character device (or file) at
+ *   CONFIG_SYSLOG_DEVPATH as the SYSLOG sink.
+ *
+ *   One power up, the SYSLOG facility is non-existent or limited to very
+ *   low-level output.  This function may be called later in the
+ *   intialization sequence after full driver support has been initialized.
+ *   (via syslog_initialize())  It installs the configured SYSLOG drivers
+ *   and enables full SYSLOGing capability.
+ *
+ *   NOTE that this implementation excludes using a network connection as
+ *   SYSLOG device.  That would be a good extension.
+ *
+ * Input Parameters:
+ *   devpath - The full path to the character device to be used.
+ *   oflags  - File open flags
+ *   mode    - File open mode (only if oflags include O_CREAT)
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure.
+ *
+ ****************************************************************************/
+
+#if CONFIG_NFILE_DESCRIPTORS > 0
+int syslog_dev_initialize(FAR const char *devpath, int oflags, int mode);
+#endif
+
+/****************************************************************************
+ * Name: syslog_dev_uninitialize
+ *
+ * Description:
+ *   Called to disable the last device/file channel in preparation to use
+ *   a different SYSLOG device. Currently only used for CONFIG_SYSLOG_FILE.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure.
+ *
+ * Assumptions:
+ *   The caller has already switched the SYSLOG source to some safe channel
+ *   (the default channel).
+ *
+ ****************************************************************************/
+
+#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_SYSLOG_FILE)
+int syslog_dev_uninitialize(void);
+#endif /* CONFIG_SYSLOG_FILE */
+
+/****************************************************************************
+ * Name: syslog_dev_channel
+ *
+ * Description:
+ *   Configure to use the character device (or file) at
+ *   CONFIG_SYSLOG_DEVPATH as the SYSLOG channel.
+ *
+ *   This tiny function is simply a wrapper around syslog_dev_initialize()
+ *   and syslog_channel().  It calls syslog_dev_initialize() to configure
+ *   the character device at CONFIG_SYSLOG_DEVPATH then calls
+ *   syslog_channel() to use that device as the SYSLOG output channel.
+ *
+ *   NOTE interrupt level SYSLOG output will be lost in this case unless
+ *   the interrupt buffer is used.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SYSLOG_CHAR
+int syslog_dev_channel(void);
+#endif
+
+/****************************************************************************
+ * Name: syslog_console_channel
+ *
+ * Description:
+ *   Configure to use the character device (or file) at /dev/console as the
+ *   SYSLOG channel.
+ *
+ *   This tiny function is simply a wrapper around syslog_dev_initialize()
+ *   and syslog_channel().  It calls syslog_dev_initialize() to configure
+ *   the character device at /dev/console then calls syslog_channel() to
+ *   use that device as the SYSLOG output channel.
+ *
+ *   NOTE interrupt level SYSLOG output will be lost in the general case
+ *   unless the interrupt buffer is used.  As a special case:  If the serial
+ *   console is used and the architecture provides up_putc(), the interrupt
+ *   level output will be directed to up_putc() is the interrupt buffer is
+ *   disabled.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SYSLOG_CONSOLE
+int syslog_console_channel(void);
+#endif
+
+/****************************************************************************
+ * Name: syslog_add_intbuffer
+ *
+ * Description:
+ *   Add one more character to the interrupt buffer.  In the event of
+ *   buffer overlowed, the character will be dropped.  The indication
+ *   "[truncated]\n" will be appended to the end of the interrupt buffer.
+ *
+ * Input Parameters:
+ *   ch - The character to add to the interrupt buffer (must be positive).
+ *
+ * Returned Value:
+ *   Zero success, the character is echoed back to the caller.  A negated
+ *   errno value is returned on any failure.
+ *
+ * Assumptions:
+ *   Called only from interrupt handling logic; Interrupts will be disabled.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SYSLOG_INTBUFFER
+int syslog_add_intbuffer(int ch);
+#endif
+
+/****************************************************************************
+ * Name: syslog_flush_intbuffer
+ *
+ * Description:
+ *   Flush any characters that may have been added to the interrupt buffer
+ *   to the SYSLOG device.
+ *
+ * Input Parameters:
+ *   channel - The syslog channel to use in performing the flush operation.
+ *   force   - Use the force() method of the channel vs. the putc() method.
+ *
+ * Returned Value:
+ *   On success, the character is echoed back to the caller.  A negated
+ *   errno value is returned on any failure.
+ *
+ * Assumptions:
+ *   Interrupts may or may not be disabled.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SYSLOG_INTBUFFER
+int syslog_flush_intbuffer(FAR const struct syslog_channel_s *channel,
+                           bool force);
+#endif
+
+/****************************************************************************
+ * Name: syslog_putc
+ *
+ * Description:
+ *   This is the low-level system logging interface.
+ *
+ * Input Parameters:
+ *   ch - The character to add to the SYSLOG (must be positive).
+ *
+ * Returned Value:
+ *   On success, the character is echoed back to the caller.  A negated
+ *   errno value is returned on any failure.
+ *
+ ****************************************************************************/
+
+int syslog_putc(int ch);
+
+/****************************************************************************
+ * Name: syslog_force
+ *
+ * Description:
+ *   This is the low-level system logging interface.  This version forces
+ *   the output and is only used in emergency situations (e.g., in assertion
+ *   handling).
+ *
+ * Input Parameters:
+ *   ch - The character to add to the SYSLOG (must be positive).
+ *
+ * Returned Value:
+ *   On success, the character is echoed back to the caller.  A negated
+ *   errno value is returned on any failure.
+ *
+ ****************************************************************************/
+
+int syslog_force(int ch);
+
+/****************************************************************************
+ * Name: syslog_dev_putc
+ *
+ * Description:
+ *   This is the low-level system logging interface provided for the
+ *   character driver interface.
+ *
+ * Input Parameters:
+ *   ch - The character to add to the SYSLOG (must be positive).
+ *
+ * Returned Value:
+ *   On success, the character is echoed back to the caller.  A negated
+ *   errno value is returned on any failure.
+ *
+ ****************************************************************************/
+
+#if CONFIG_NFILE_DESCRIPTORS > 0
+int syslog_dev_putc(int ch);
+#endif
+
+/****************************************************************************
+ * Name: syslog_dev_flush
+ *
+ * Description:
+ *   Flush any buffer data in the file system to media.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value is returned on any failure.
+ *
+ ****************************************************************************/
+
+#if CONFIG_NFILE_DESCRIPTORS > 0
+int syslog_dev_flush(void);
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __DRIVERS_SYSLOG_SYSLOG_H */
diff --git a/drivers/syslog/syslog_channel.c b/drivers/syslog/syslog_channel.c
new file mode 100644
index 0000000000000000000000000000000000000000..a36cb6e70f4e78013a022f0c90798ef20f0d7c20
--- /dev/null
+++ b/drivers/syslog/syslog_channel.c
@@ -0,0 +1,164 @@
+/****************************************************************************
+ * drivers/syslog/syslog_channel.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+#ifdef CONFIG_RAMLOG_SYSLOG
+#  include 
+#elif defined(CONFIG_ARCH_LOWPUTC)
+#  include 
+#endif
+
+#include "syslog.h"
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+#if defined(CONFIG_SYSLOG_SERIAL_CONSOLE) && defined(CONFIG_ARCH_LOWPUTC)
+#  define HAVE_LOWPUTC
+#elif !defined(CONFIG_RAMLOG_SYSLOG)
+#  define NEED_LOWPUTC
+#endif
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+#ifdef NEED_LOWPUTC
+static int syslog_default_putc(int ch);
+#endif
+static int syslog_default_flush(void);
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#if defined(CONFIG_RAMLOG_SYSLOG)
+const struct syslog_channel_s g_default_channel =
+{
+  ramlog_putc,
+  ramlog_putc,
+  syslog_default_flush
+};
+#elif defined(HAVE_LOWPUTC)
+const struct syslog_channel_s g_default_channel =
+{
+  up_putc,
+  up_putc,
+  syslog_default_flush
+};
+#else
+const struct syslog_channel_s g_default_channel =
+{
+  syslog_default_putc,
+  syslog_default_putc,
+  syslog_default_flush
+};
+#endif
+
+/* This is the current syslog channel in use */
+
+FAR const struct syslog_channel_s *g_syslog_channel = &g_default_channel;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: syslog_default_putc and syslog_default_flush
+ *
+ * Description:
+ *   Dummy, no-nothing channel interface methods
+ *
+ ****************************************************************************/
+
+#ifdef NEED_LOWPUTC
+static int syslog_default_putc(int ch)
+{
+  return ch;
+}
+#endif
+
+static int syslog_default_flush(void)
+{
+  return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: syslog_channel
+ *
+ * Description:
+ *   Configure the SYSLOGging function to use the provided channel to
+ *   generate SYSLOG output.
+ *
+ * Input Parameters:
+ *   channel - Provides the interface to the channel to be used.
+ *
+ * Returned Value:
+ *   Zero (OK)is returned on  success.  A negated errno value is returned
+ *   on any failure.
+ *
+ ****************************************************************************/
+
+int syslog_channel(FAR const struct syslog_channel_s *channel)
+{
+  DEBUGASSERT(channel != NULL);
+
+  if (channel != NULL)
+    {
+      DEBUGASSERT(channel->sc_putc != NULL && channel->sc_force != NULL &&
+                  channel->sc_flush != NULL);
+
+      g_syslog_channel = channel;
+      return OK;
+    }
+
+  return -EINVAL;
+}
diff --git a/drivers/syslog/syslog_chardev.c b/drivers/syslog/syslog_chardev.c
new file mode 100644
index 0000000000000000000000000000000000000000..b852db05a214664db87f5fe2904d53cadbbe7070
--- /dev/null
+++ b/drivers/syslog/syslog_chardev.c
@@ -0,0 +1,129 @@
+/****************************************************************************
+ * drivers/syslog/syslog_chardev.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "syslog.h"
+
+#ifdef CONFIG_SYSLOG_CHARDEV
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static ssize_t syslog_write(FAR struct file *filep, FAR const char *buffer,
+                 size_t buflen);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct file_operations syslog_fops =
+{
+  NULL,          /* open */
+  NULL,          /* close */
+  NULL,          /* read */
+  syslog_write,  /* write */
+  NULL,          /* seek */
+  NULL           /* ioctl */
+#ifndef CONFIG_DISABLE_POLL
+  , NULL         /* poll */
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  , NULL         /* unlink */
+#endif
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: syslog_write
+ ****************************************************************************/
+
+static ssize_t syslog_write(FAR struct file *filep, FAR const char *buffer,
+                            size_t len)
+{
+  size_t nwritten;
+  int ret;
+
+  for (nwritten = 0; nwritten < len; nwritten++)
+    {
+      int ch = *buffer++;
+      ret = syslog_putc(ch);
+      UNUSED(ret);
+    }
+
+  return len;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: syslog_register
+ *
+ * Description:
+ *   Register a simple character driver at /dev/syslog whose write() method
+ *   will transfer data to the SYSLOG device.  This can be useful if, for
+ *   example, you want to redirect the output of a program to the SYSLOG.
+ *
+ *   NOTE that unlike other syslog output, this data is unformatted raw
+ *   byte output with no time-stamping or any other SYSLOG features
+ *   supported.
+ *
+ ****************************************************************************/
+
+void syslog_register(void)
+{
+  (void)register_driver("/dev/syslog", &syslog_fops, 0222, NULL);
+}
+
+#endif /* CONFIG_SYSLOG_CHARDEV */
diff --git a/drivers/syslog/syslog_console.c b/drivers/syslog/syslog_console.c
index a3d3bb2bea35ad979a5178f6a29bdf8cff478db1..04a21d2ec91978113257aed259c2573d8528d3b7 100644
--- a/drivers/syslog/syslog_console.c
+++ b/drivers/syslog/syslog_console.c
@@ -47,14 +47,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* The architecture must provide syslog_putc for this driver */
-
-#if defined(CONFIG_SYSLOG)
-
 /****************************************************************************
  * Private Function Prototypes
  ****************************************************************************/
@@ -136,4 +128,3 @@ void syslog_console_init(void)
 {
   (void)register_driver("/dev/console", &g_consoleops, 0666, NULL);
 }
-#endif /* CONFIG_SYSLOG */
diff --git a/drivers/syslog/syslog_consolechannel.c b/drivers/syslog/syslog_consolechannel.c
new file mode 100644
index 0000000000000000000000000000000000000000..8ed6374ff65b39bd880bf31e57d39d293615cbf8
--- /dev/null
+++ b/drivers/syslog/syslog_consolechannel.c
@@ -0,0 +1,162 @@
+/****************************************************************************
+ * drivers/syslog/syslog_consolechannel.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "syslog.h"
+
+#ifdef CONFIG_SYSLOG_CONSOLE
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#undef HAVE_LOWPUTC
+#if defined(CONFIG_SYSLOG_SERIAL_CONSOLE) && defined(CONFIG_ARCH_LOWPUTC)
+#  define HAVE_LOWPUTC 1
+#endif
+
+#define OPEN_FLAGS (O_WRONLY)
+#define OPEN_MODE  (S_IROTH | S_IRGRP | S_IRUSR | S_IWUSR)
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* SYSLOG channel methods */
+
+#ifndef HAVE_LOWPUTC
+static int syslog_console_force(int ch);
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* This structure describes the SYSLOG channel */
+
+static const struct syslog_channel_s g_syslog_console_channel =
+{
+  syslog_dev_putc,
+#ifdef HAVE_LOWPUTC
+  up_putc,
+#else
+  syslog_console_force,
+#endif
+  syslog_dev_flush,
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: syslog_console_force
+ *
+ * Description:
+ *   A dummy FORCE method
+ *
+ ****************************************************************************/
+
+#ifndef HAVE_LOWPUTC
+static int syslog_console_force(int ch)
+{
+  return ch;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: syslog_console_channel
+ *
+ * Description:
+ *   Configure to use the character device (or file) at /dev/console as the
+ *   SYSLOG channel.
+ *
+ *   This tiny function is simply a wrapper around syslog_dev_initialize()
+ *   and syslog_channel().  It calls syslog_dev_initialize() to configure
+ *   the character device at /dev/console then calls syslog_channel() to
+ *   use that device as the SYSLOG output channel.
+ *
+ *   NOTE interrupt level SYSLOG output will be lost in the general case
+ *   unless the interrupt buffer is used.  As a special case:  If the serial
+ *   console is used and the architecture provides up_putc(), the interrupt
+ *   level output will be directed to up_putc() is the interrupt buffer is
+ *   disabled.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure.
+ *
+ ****************************************************************************/
+
+int syslog_console_channel(void)
+{
+  int ret;
+
+  /* Initialize the character driver interface */
+
+  ret = syslog_dev_initialize("/dev/console", OPEN_FLAGS, OPEN_MODE);
+  if (ret < 0)
+    {
+      return ret;
+    }
+
+  /* Use the character driver as the SYSLOG channel */
+
+  return syslog_channel(&g_syslog_console_channel);
+}
+
+#endif /* CONFIG_SYSLOG_CONSOLE */
diff --git a/drivers/syslog/syslog_devchannel.c b/drivers/syslog/syslog_devchannel.c
new file mode 100644
index 0000000000000000000000000000000000000000..e0251efc8e2e0ec1dd9910c3d3a84d63a89a703b
--- /dev/null
+++ b/drivers/syslog/syslog_devchannel.c
@@ -0,0 +1,180 @@
+/****************************************************************************
+ * drivers/syslog/syslog_devchannel.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include "syslog.h"
+
+#ifdef CONFIG_SYSLOG_CHAR
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define OPEN_FLAGS (O_WRONLY)
+#define OPEN_MODE  (S_IROTH | S_IRGRP | S_IRUSR | S_IWUSR)
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* SYSLOG channel methods */
+
+#ifdef CONFIG_SYSLOG_CHAR_CRLF
+static int syslog_devchan_putc(int ch);
+#endif
+static int syslog_devchan_force(int ch);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* This structure describes the SYSLOG channel */
+
+static const struct syslog_channel_s g_syslog_dev_channel =
+{
+#ifdef CONFIG_SYSLOG_CHAR_CRLF
+  syslog_devchan_putc,
+#else
+  syslog_dev_putc,
+#endif
+  syslog_devchan_force,
+  syslog_dev_flush,
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: syslog_devchan_putc
+ *
+ * Description:
+ *   A front-end to syslog_dev_putc that does LF -> CR-LF expansion
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SYSLOG_CHAR_CRLF
+static int syslog_devchan_putc(int ch)
+{
+  int ret;
+
+  /* Check for a linefeed */
+
+  if (ch == '\n')
+    {
+      /* Pre-pend a carriage return */
+
+      ret = syslog_dev_putc('\r');
+      if (ret < 0)
+        {
+          return ret;
+        }
+    }
+
+  /* Output the provided character */
+
+  return syslog_dev_putc(ch);
+}
+#endif
+
+/****************************************************************************
+ * Name: syslog_devchan_force
+ *
+ * Description:
+ *   A dummy FORCE method
+ *
+ ****************************************************************************/
+
+static int syslog_devchan_force(int ch)
+{
+  return ch;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: syslog_dev_channel
+ *
+ * Description:
+ *   Configure to use the character device at CONFIG_SYSLOG_DEVPATH as the
+ *   SYSLOG channel.
+ *
+ *   This tiny function is simply a wrapper around syslog_dev_initialize()
+ *   and syslog_channel().  It calls syslog_dev_initialize() to configure
+ *   the character device at CONFIG_SYSLOG_DEVPATH then calls
+ *   syslog_channel() to use that device as the SYSLOG output channel.
+ *
+ *   NOTE interrupt level SYSLOG output will be lost in this case unless
+ *   the interrupt buffer is used.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure.
+ *
+ ****************************************************************************/
+
+int syslog_dev_channel(void)
+{
+  int ret;
+
+  /* Initialize the character driver interface */
+
+  ret = syslog_dev_initialize(CONFIG_SYSLOG_DEVPATH, OPEN_FLAGS, OPEN_MODE);
+  if (ret < 0)
+    {
+      return ret;
+    }
+
+  /* Use the character driver as the SYSLOG channel */
+
+  return syslog_channel(&g_syslog_dev_channel);
+}
+
+#endif /* CONFIG_SYSLOG_CHAR */
diff --git a/fs/driver/fs_devsyslog.c b/drivers/syslog/syslog_device.c
similarity index 58%
rename from fs/driver/fs_devsyslog.c
rename to drivers/syslog/syslog_device.c
index b33129a9241bd219a1e01e0dfe0c4faf9da50ba8..862a3d2b5dcc6176e301ce6d7b6b554961a54cd7 100644
--- a/fs/driver/fs_devsyslog.c
+++ b/drivers/syslog/syslog_device.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * fs/driver/fs_devsyslog.c
+ * drivers/syslog/syslog_device.c
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -44,18 +44,21 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 #include 
 #include 
 
-#include 
 #include 
+#include 
+#include 
 #include 
 
-#include "inode/inode.h"
+#include "syslog.h"
 
-#if defined(CONFIG_SYSLOG) && defined(CONFIG_SYSLOG_CHAR)
+#if CONFIG_NFILE_DESCRIPTORS > 0
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -78,7 +81,7 @@
 
 /* This enumeration represents the state of the SYSLOG device interface */
 
-enum syslog_state_e
+enum syslog_dev_state
 {
   SYSLOG_UNINITIALIZED = 0, /* SYSLOG has not been initialized */
   SYSLOG_INITIALIZING,      /* SYSLOG is being initialized */
@@ -91,10 +94,13 @@ enum syslog_state_e
 
 struct syslog_dev_s
 {
-  uint8_t     sl_state;     /* See enum syslog_state_e */
-  sem_t       sl_sem;       /* Enforces mutually exclusive access */
-  pid_t       sl_holder;    /* PID of the thread that holds the semaphore */
-  struct file sl_file;      /* The syslog file structure */
+  uint8_t      sl_state;    /* See enum syslog_dev_state */
+  uint8_t      sl_oflags;   /* Saved open mode (for re-open) */
+  uint16_t     sl_mode;     /* Saved open flags (for re-open) */
+  sem_t        sl_sem;      /* Enforces mutually exclusive access */
+  pid_t        sl_holder;   /* PID of the thread that holds the semaphore */
+  struct file  sl_file;     /* The syslog file structure */
+  FAR char    *sl_devpath;  /* Full path to the character device */
 };
 
 /****************************************************************************
@@ -103,7 +109,7 @@ struct syslog_dev_s
 
 /* This is the device structure for the console or syslogging function. */
 
-static struct syslog_dev_s g_sysdev;
+static struct syslog_dev_s g_syslog_dev;
 static const uint8_t g_syscrlf[2] =
 {
   '\r', '\n'
@@ -114,25 +120,25 @@ static const uint8_t g_syscrlf[2] =
  ****************************************************************************/
 
 /****************************************************************************
- * Name: syslog_takesem
+ * Name: syslog_dev_takesem
  *
  * Description:
  *   Write to the syslog device
  *
  ****************************************************************************/
 
-static inline int syslog_takesem(void)
+static inline int syslog_dev_takesem(void)
 {
   pid_t me = getpid();
   int ret;
 
   /* Does this thread already hold the semaphore?  That could happen if
-   * we wer called recursively, i.e., if the logic kicked off by
-   * syslog_write() where to generate more debug output.  Return an error
-   * in that case.
+   * we were called recursively, i.e., if the logic kicked off by
+   * file_write() where to generate more debug output.  Return an
+   * error in that case.
    */
 
-  if (g_sysdev.sl_holder == me)
+  if (g_syslog_dev.sl_holder == me)
     {
       /* Return an error (instead of deadlocking) */
 
@@ -143,7 +149,7 @@ static inline int syslog_takesem(void)
    * thread.  Wait for it to become available.
    */
 
-  ret = sem_wait(&g_sysdev.sl_sem);
+  ret = sem_wait(&g_syslog_dev.sl_sem);
   if (ret < 0)
     {
       return -get_errno();
@@ -153,220 +159,218 @@ static inline int syslog_takesem(void)
    * of the semaphore.
    */
 
-  g_sysdev.sl_holder = me;
+  g_syslog_dev.sl_holder = me;
   return OK;
 }
 
 /****************************************************************************
- * Name: syslog_givesem
+ * Name: syslog_dev_givesem
  *
  * Description:
  *   Write to the syslog device
  *
  ****************************************************************************/
 
-static inline void syslog_givesem(void)
+static inline void syslog_dev_givesem(void)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ASSERTIONS
   pid_t me = getpid();
-  DEBUGASSERT(g_sysdev.sl_holder == me);
+  DEBUGASSERT(g_syslog_dev.sl_holder == me);
 #endif
 
   /* Relinquish the semaphore */
 
-  g_sysdev.sl_holder = NO_HOLDER;
-  sem_post(&g_sysdev.sl_sem);
-}
-
-/****************************************************************************
- * Name: syslog_write
- *
- * Description:
- *   Write to the syslog device
- *
- ****************************************************************************/
-
-static inline ssize_t syslog_write(FAR const void *buf, size_t nbytes)
-{
-  FAR struct inode *inode;
-
-  /* Let the driver perform the write */
-
-  inode = g_sysdev.sl_file.f_inode;
-  return inode->u.i_ops->write(&g_sysdev.sl_file, buf, nbytes);
-}
-
-/****************************************************************************
- * Name: syslog_flush
- *
- * Description:
- *   Flush any buffer data in the file system to media.
- *
- ****************************************************************************/
-
-#ifndef CONFIG_DISABLE_MOUNTPOINT
-static inline void syslog_flush(void)
-{
-  FAR struct inode *inode = g_sysdev.sl_file.f_inode;
-
-  /* Is this a mountpoint? Does it support the sync method? */
-
-  if (INODE_IS_MOUNTPT(inode) && inode->u.i_mops->sync)
-    {
-      /* Yes... synchronize to the stream */
-
-      (void)inode->u.i_mops->sync(&g_sysdev.sl_file);
-    }
+  g_syslog_dev.sl_holder = NO_HOLDER;
+  sem_post(&g_syslog_dev.sl_sem);
 }
-#endif
 
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: syslog_initialize
+ * Name: syslog_dev_initialize
  *
  * Description:
  *   Initialize to use the character device (or file) at
  *   CONFIG_SYSLOG_DEVPATH as the SYSLOG sink.
  *
+ *   One power up, the SYSLOG facility is non-existent or limited to very
+ *   low-level output.  This function may be called later in the
+ *   intialization sequence after full driver support has been initialized.
+ *   (via syslog_initialize())  It installs the configured SYSLOG drivers
+ *   and enables full SYSLOGing capability.
+ *
  *   NOTE that this implementation excludes using a network connection as
  *   SYSLOG device.  That would be a good extension.
  *
+ * Input Parameters:
+ *   devpath - The full path to the character device to be used.
+ *   oflags  - File open flags
+ *   mode    - File open mode (only if oflags include O_CREAT)
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure.
+ *
  ****************************************************************************/
 
-int syslog_initialize(void)
+int syslog_dev_initialize(FAR const char *devpath, int oflags, int mode)
 {
-  FAR struct inode    *inode;
-  FAR const char      *relpath = NULL;
-  int                  ret;
+  int fd;
+  int ret;
 
   /* At this point, the only expected states are SYSLOG_UNINITIALIZED or
    * SYSLOG_REOPEN..  Not SYSLOG_INITIALIZING, SYSLOG_FAILURE, SYSLOG_OPENED.
    */
 
-  DEBUGASSERT(g_sysdev.sl_state == SYSLOG_UNINITIALIZED ||
-              g_sysdev.sl_state == SYSLOG_REOPEN);
+  DEBUGASSERT(g_syslog_dev.sl_state == SYSLOG_UNINITIALIZED ||
+              g_syslog_dev.sl_state == SYSLOG_REOPEN);
 
-  g_sysdev.sl_state = SYSLOG_INITIALIZING;
-
-  /* Try to open the device.
-   *
-   * Note that we cannot just call open.  The syslog device must work on all
-   * threads.  Open returns a file descriptor that is valid only for the
-   * task that opened the device (and its pthread children).  Instead, we
-   * essentially re-implement the guts of open() here so that we can get to
-   * the thread-independent structures of the inode.
+  /* Save the the path to the device in case we have to re-open it.
+   * If we get here and sl_devpath is not equal to NULL, that is a clue
+   * that we will are re-openingthe file.
    */
 
-  /* Get an inode for this file/device */
+  if (g_syslog_dev.sl_state == SYSLOG_REOPEN)
+    {
+      /* Re-opening: Then we should already have a copy of the path to the
+       * device.
+       */
 
-  inode = inode_find(CONFIG_SYSLOG_DEVPATH, &relpath);
-  if (!inode)
+      DEBUGASSERT(g_syslog_dev.sl_devpath != NULL &&
+                  strcmp(g_syslog_dev.sl_devpath, devpath) == 0);
+    }
+  else
     {
-      /* The inode was not found.  In this case, we will attempt to re-open
-       * the device repeatedly.  The assumption is that the device path is
-       * valid but that the driver has not yet been registered.
+      /* Initializing.  Copy the device path so that we can use it if we
+       * have to re-open the file.
        */
 
-      g_sysdev.sl_state = SYSLOG_REOPEN;
-      return -ENOENT;
+      DEBUGASSERT(g_syslog_dev.sl_devpath == NULL);
+      g_syslog_dev.sl_oflags  = oflags;
+      g_syslog_dev.sl_mode    = mode;
+      g_syslog_dev.sl_devpath = strdup(devpath);
+      DEBUGASSERT(g_syslog_dev.sl_devpath != NULL);
     }
 
-  /* Verify that the inode is valid and either a character driver or a
-   * mountpoint.
-   */
+  g_syslog_dev.sl_state = SYSLOG_INITIALIZING;
 
-#ifndef CONFIG_DISABLE_MOUNTPOINT
-  if ((!INODE_IS_DRIVER(inode) && !INODE_IS_MOUNTPT(inode)))
-#else
-  if (!INODE_IS_DRIVER(inode))
-#endif
+  /* Open the device driver. */
+
+  fd = open(devpath, oflags, mode);
+  if (fd < 0)
     {
-      ret = -ENXIO;
-      goto errout_with_inode;
+       int errcode = get_errno();
+       DEBUGASSERT(errcode > 0);
+
+      /* We failed to open the file. Perhaps it does exist?  Perhaps it
+       * exists, but is not ready because it depends on insertion of a
+       * removable device?
+       *
+       * In any case we will attempt to re-open the device repeatedly.
+       * The assumption is that the device path is valid but that the
+       * driver has not yet been registered or a removable device has
+       * not yet been installed.
+       */
+
+      g_syslog_dev.sl_state = SYSLOG_REOPEN;
+      return -errcode;
     }
 
-  /* Make sure that the "entity" at this inode supports write access */
+  /* Detach the file descriptor from the file structure.  The file
+   * descriptor is a task-specific concept.  Detaching the file
+   * descriptor allows us to use the device on all threads in all tasks.
+   */
 
-  if (!inode->u.i_ops || !inode->u.i_ops->write)
+  ret = file_detach(fd, &g_syslog_dev.sl_file);
+  if (ret < 0)
     {
-      ret = -EACCES;
-      goto errout_with_inode;
-    }
+      /* This should not happen and means that something very bad has
+       * occurred.
+       */
 
-  /* Initialize the file structure */
+      g_syslog_dev.sl_state = SYSLOG_FAILURE;
+      close(fd);
+      return ret;
+    }
 
-  g_sysdev.sl_file.f_oflags = SYSLOG_OFLAGS;
-  g_sysdev.sl_file.f_pos    = 0;
-  g_sysdev.sl_file.f_inode  = inode;
+  /* The SYSLOG device is open and ready for writing. */
 
-  /* Perform the low-level open operation. */
+  sem_init(&g_syslog_dev.sl_sem, 0, 1);
+  g_syslog_dev.sl_holder = NO_HOLDER;
+  g_syslog_dev.sl_state  = SYSLOG_OPENED;
+  return OK;
+}
 
-  ret = OK;
-  if (inode->u.i_ops->open)
-    {
-      /* Is the inode a mountpoint? */
+/****************************************************************************
+ * Name: syslog_dev_uninitialize
+ *
+ * Description:
+ *   Called to disable the last device/file channel in preparation to use
+ *   a different SYSLOG device. Currently only used for CONFIG_SYSLOG_FILE.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure.
+ *
+ * Assumptions:
+ *   The caller has already switched the SYSLOG source to some safe channel
+ *   (the default channel).
+ *
+ ****************************************************************************/
 
-#ifndef CONFIG_DISABLE_MOUNTPOINT
-      if (INODE_IS_MOUNTPT(inode))
-        {
-          /* Yes.  Open the device write-only, try to create it if it
-           * doesn't exist, if the file that already exists, then append the
-           * new log data to end of the file.
-           */
+#ifdef CONFIG_SYSLOG_FILE /* Currently only used in this configuration */
+int syslog_dev_uninitialize(void)
+{
+  /* Attempt to flush any buffered data */
 
-          ret = inode->u.i_mops->open(&g_sysdev.sl_file, relpath,
-                                      SYSLOG_OFLAGS, 0666);
-        }
+  sched_lock();
+  (void)syslog_dev_flush();
 
-      /* No... then it must be a character driver in the NuttX pseudo-
-       * file system.
-       */
+  /* Close the detached file instance */
 
-      else
-#endif
-        {
-          ret = inode->u.i_ops->open(&g_sysdev.sl_file);
-        }
-    }
+  (void)file_close_detached(&g_syslog_dev.sl_file);
 
-  /* Was the file/device successfully opened? */
+  /* Free the device path */
 
-  if (ret < 0)
+  if (g_syslog_dev.sl_devpath != NULL)
     {
-      ret = -ret;
-      goto errout_with_inode;
+      kmm_free(g_syslog_dev.sl_devpath);
     }
 
-  /* The SYSLOG device is open and ready for writing. */
+  /* Destroy the semaphore */
 
-  sem_init(&g_sysdev.sl_sem, 0, 1);
-  g_sysdev.sl_holder = NO_HOLDER;
-  g_sysdev.sl_state  = SYSLOG_OPENED;
-  return OK;
+  sem_destroy(&g_syslog_dev.sl_sem);
 
-errout_with_inode:
-  inode_release(inode);
-  g_sysdev.sl_state = SYSLOG_FAILURE;
-  return ret;
+  /* Reset the state structure */
+
+  memset(&g_syslog_dev, 0, sizeof(struct syslog_dev_s));
+  sched_unlock();
+  return OK;
 }
+#endif /* CONFIG_SYSLOG_FILE */
 
 /****************************************************************************
- * Name: syslog_putc
+ * Name: syslog_dev_putc
  *
  * Description:
- *   This is the low-level system logging interface.  The debugging/syslogging
- *   interfaces are syslog() and lowsyslog().  The difference is is that
- *   the syslog() function writes to syslogging device (usually fd=1, stdout)
- *   whereas lowsyslog() uses a lower level interface that works from
- *   interrupt handlers.  This function is a a low-level interface used to
- *   implement lowsyslog().
+ *   This is the low-level system logging interface provided for the
+ *   character driver interface.
+ *
+ * Input Parameters:
+ *   ch - The character to add to the SYSLOG (must be positive).
+ *
+ * Returned Value:
+ *   On success, the character is echoed back to the caller.  A negated
+ *   errno value is returned on any failure.
  *
  ****************************************************************************/
 
-int syslog_putc(int ch)
+int syslog_dev_putc(int ch)
 {
   ssize_t nbytes;
   uint8_t uch;
@@ -377,12 +381,12 @@ int syslog_putc(int ch)
    *
    * (1) Before the SYSLOG device has been initialized.  This could happen
    *     from debug output that occurs early in the boot sequence before
-   *     syslog_initialize() is called (SYSLOG_UNINITIALIZED).
+   *     syslog_dev_initialize() is called (SYSLOG_UNINITIALIZED).
    * (2) While the device is being initialized.  The case could happen if
-   *     debug output is generated while syslog_initialize() executes
+   *     debug output is generated while syslog_dev_initialize() executes
    *     (SYSLOG_INITIALIZING).
    * (3) While we are generating SYSLOG output.  The case could happen if
-   *     debug output is generated while syslog_putc() executes
+   *     debug output is generated while syslog_dev_putc() executes
    *     (This case is actually handled inside of syslog_semtake()).
    * (4) Any debug output generated from interrupt handlers.  A disadvantage
    *     of using the generic character device for the SYSLOG is that it
@@ -410,12 +414,12 @@ int syslog_putc(int ch)
    * has been successfully opened.
    */
 
-  if (g_sysdev.sl_state != SYSLOG_OPENED)
+  if (g_syslog_dev.sl_state != SYSLOG_OPENED)
     {
       /* Case (1) and (2) */
 
-      if (g_sysdev.sl_state == SYSLOG_UNINITIALIZED ||
-          g_sysdev.sl_state == SYSLOG_INITIALIZING)
+      if (g_syslog_dev.sl_state == SYSLOG_UNINITIALIZED ||
+          g_syslog_dev.sl_state == SYSLOG_INITIALIZING)
        {
          errcode = EAGAIN; /* Can't access the SYSLOG now... maybe next time? */
          goto errout_with_errcode;
@@ -423,13 +427,13 @@ int syslog_putc(int ch)
 
       /* Case (6) */
 
-      if (g_sysdev.sl_state == SYSLOG_FAILURE)
+      if (g_syslog_dev.sl_state == SYSLOG_FAILURE)
         {
           errcode = ENXIO;  /* There is no SYSLOG device */
           goto errout_with_errcode;
         }
 
-      /* syslog_initialize() is called as soon as enough of the operating
+      /* syslog_dev_initialize() is called as soon as enough of the operating
        * system is in place to support the open operation... but it is
        * possible that the SYSLOG device is not yet registered at that time.
        * In this case, we know that the system is sufficiently initialized
@@ -441,16 +445,19 @@ int syslog_putc(int ch)
        */
 
       sched_lock();
-      if (g_sysdev.sl_state == SYSLOG_REOPEN)
+      if (g_syslog_dev.sl_state == SYSLOG_REOPEN)
         {
           /* Try again to initialize the device.  We may do this repeatedly
            * because the log device might be something that was not ready
-           * the first time that syslog_initializee() was called (such as a
+           * the first time that syslog_dev_initializee() was called (such as a
            * USB serial device that has not yet been connected or a file in
            * an NFS mounted file system that has not yet been mounted).
            */
 
-          ret = syslog_initialize();
+          DEBUGASSERT(g_syslog_dev.sl_devpath != NULL);
+          ret = syslog_dev_initialize(g_syslog_dev.sl_devpath,
+                                      (int)g_syslog_dev.sl_oflags,
+                                      (int)g_syslog_dev.sl_mode);
           if (ret < 0)
             {
               sched_unlock();
@@ -460,7 +467,7 @@ int syslog_putc(int ch)
         }
 
       sched_unlock();
-      DEBUGASSERT(g_sysdev.sl_state == SYSLOG_OPENED);
+      DEBUGASSERT(g_syslog_dev.sl_state == SYSLOG_OPENED);
     }
 
   /* Ignore carriage returns */
@@ -474,11 +481,11 @@ int syslog_putc(int ch)
    * value to write.
    */
 
-  ret = syslog_takesem();
+  ret = syslog_dev_takesem();
   if (ret < 0)
     {
       /* We probably already hold the semaphore and were probably
-       * re-entered by the logic kicked off by syslog_write().
+       * re-entered by the logic kicked off by file_write().
        * We might also have been interrupted by a signal.  Either
        * way, we are outta here.
        */
@@ -493,7 +500,7 @@ int syslog_putc(int ch)
     {
       /* Write the CR-LF sequence */
 
-      nbytes = syslog_write(g_syscrlf, 2);
+      nbytes = file_write(&g_syslog_dev.sl_file, g_syscrlf, 2);
 
       /* Synchronize the file when each CR-LF is encountered (i.e.,
        * implements line buffering always).
@@ -502,7 +509,7 @@ int syslog_putc(int ch)
 #ifndef CONFIG_DISABLE_MOUNTPOINT
       if (nbytes > 0)
         {
-          syslog_flush();
+          (void)syslog_dev_flush();
         }
 #endif
     }
@@ -511,10 +518,10 @@ int syslog_putc(int ch)
       /* Write the non-newline character (and don't flush) */
 
       uch = (uint8_t)ch;
-      nbytes = syslog_write(&uch, 1);
+      nbytes = file_write(&g_syslog_dev.sl_file, &uch, 1);
     }
 
-  syslog_givesem();
+  syslog_dev_givesem();
 
   /* Check if the write was successful.  If not, nbytes will be
    * a negated errno value.
@@ -533,4 +540,32 @@ errout_with_errcode:
   return EOF;
 }
 
-#endif /* CONFIG_SYSLOG && CONFIG_SYSLOG_CHAR */
+/****************************************************************************
+ * Name: syslog_dev_flush
+ *
+ * Description:
+ *   Flush any buffer data in the file system to media.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value is returned on any failure.
+ *
+ ****************************************************************************/
+
+int syslog_dev_flush(void)
+{
+#if defined(CONFIG_SYSLOG_FILE) && !defined(CONFIG_DISABLE_MOUNTPOINT)
+  /* Ignore return value, always return success.  file_fsync() could fail
+   * because the file is not open, the inode is not a mountpoint, or the
+   * mountpoint does not support the sync() method.
+   */
+
+  (void)file_fsync(&g_syslog_dev.sl_file);
+#endif
+
+  return OK;
+}
+
+#endif /* CONFIG_NFILE_DESCRIPTORS > 0 */
diff --git a/drivers/syslog/syslog_emergstream.c b/drivers/syslog/syslog_emergstream.c
new file mode 100644
index 0000000000000000000000000000000000000000..2ea230b63cc1f2a273d0880cb81a970194ce6300
--- /dev/null
+++ b/drivers/syslog/syslog_emergstream.c
@@ -0,0 +1,114 @@
+/****************************************************************************
+ * drivers/syslog/syslog_emergtream.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "syslog.h"
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: emergstream_putc
+ ****************************************************************************/
+
+static void emergstream_putc(FAR struct lib_outstream_s *this, int ch)
+{
+  int ret;
+
+  /* Try writing until the write was successful or until an irrecoverable
+   * error occurs.
+   */
+
+  do
+    {
+      /* Write the character to the supported logging device.  On failure,
+       * syslog_putc returns EOF with the errno value set;
+       */
+
+      ret = syslog_force(ch);
+      if (ret != EOF)
+        {
+          this->nput++;
+          return;
+        }
+
+      /* The special errno value -EINTR means that syslog_putc() was
+       * awakened by a signal.  This is not a real error and must be
+       * ignored in this context.
+       */
+    }
+  while (errno == -EINTR);
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: emergstream
+ *
+ * Description:
+ *   Initializes a stream for use with the configured emergency syslog
+ *   interface.  Only accessible from with the OS SYSLOG logic.
+ *
+ * Input parameters:
+ *   stream - User allocated, uninitialized instance of struct
+ *            lib_lowoutstream_s to be initialized.
+ *
+ * Returned Value:
+ *   None (User allocated instance initialized).
+ *
+ ****************************************************************************/
+
+void emergstream(FAR struct lib_outstream_s *stream)
+{
+  stream->put   = emergstream_putc;
+  stream->flush = lib_noflush;
+  stream->nput  = 0;
+}
diff --git a/drivers/syslog/syslog_filechannel.c b/drivers/syslog/syslog_filechannel.c
new file mode 100644
index 0000000000000000000000000000000000000000..efd5e541b37be8876489fc9b7e2767b2d0db98b5
--- /dev/null
+++ b/drivers/syslog/syslog_filechannel.c
@@ -0,0 +1,194 @@
+/****************************************************************************
+ * drivers/syslog/syslog_filechannel.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "syslog.h"
+
+#ifdef CONFIG_SYSLOG_FILE
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define OPEN_FLAGS (O_WRONLY | O_CREAT | O_APPEND)
+#define OPEN_MODE  (S_IROTH | S_IRGRP | S_IRUSR | S_IWUSR)
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* SYSLOG channel methods */
+
+static int syslog_file_force(int ch);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* This structure describes the SYSLOG channel */
+
+static const struct syslog_channel_s g_syslog_file_channel =
+{
+  syslog_dev_putc,
+  syslog_file_force,
+  syslog_dev_flush,
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: syslog_file_force
+ *
+ * Description:
+ *   A dummy FORCE method
+ *
+ ****************************************************************************/
+
+static int syslog_file_force(int ch)
+{
+  return ch;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: syslog_file_channel
+ *
+ * Description:
+ *   Configure to use a file in a mounted file system at 'devpath' as the
+ *   SYSLOG channel.
+ *
+ *   This tiny function is simply a wrapper around syslog_dev_initialize()
+ *   and syslog_channel().  It calls syslog_dev_initialize() to configure
+ *   the character file at 'devpath then calls syslog_channel() to use that
+ *   device as the SYSLOG output channel.
+ *
+ *   File SYSLOG channels differ from other SYSLOG channels in that they
+ *   cannot be established until after fully booting and mounting the target
+ *   file system.  This function would need to be called from board-specific
+ *   bring-up logic AFTER mounting the file system containing 'devpath'.
+ *
+ *   SYSLOG data generated prior to calling syslog_file_channel will, of
+ *   course, not be included in the file.
+ *
+ *   NOTE interrupt level SYSLOG output will be lost in this case unless
+ *   the interrupt buffer is used.
+ *
+ * Input Parameters:
+ *   devpath - The full path to the file to be used for SYSLOG output.
+ *     This may be an existing file or not.  If the file exists,
+ *     syslog_file_channel() will append new SYSLOG data to the end of the
+ *     file.  If it does not, then syslog_file_channel() will create the
+ *     file.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure.
+ *
+ ****************************************************************************/
+
+int syslog_file_channel(FAR const char *devpath)
+{
+  FAR const struct syslog_channel_s *saved_channel;
+  int ret;
+
+  /* Reset the default SYSLOG channel so that we can safely modify the
+   * SYSLOG device.  This is an atomic operation and we should be safe
+   * after the default channel has been selected.
+   *
+   * We disable pre-emption only so that we are not suspended and a lot of
+   * important debug output is lost while we futz with the channels.
+   */
+
+  sched_lock();
+  saved_channel = g_syslog_channel;
+  ret = syslog_channel(&g_default_channel);
+  if (ret < 0)
+    {
+      goto errout_with_lock;
+    }
+
+  /* Uninitialize any driver interface that may have been in place */
+
+  ret = syslog_dev_uninitialize();
+  if (ret < 0)
+    {
+      /* Nothing fatal has happened yet, we can restore the last channel
+       * since it was not uninitialized (was it?)
+       */
+
+      (void)syslog_channel(saved_channel);
+      goto errout_with_lock;
+    }
+  
+  /* Then initialize the file interface */
+
+  ret = syslog_dev_initialize(devpath, OPEN_FLAGS, OPEN_MODE);
+  if (ret < 0)
+    {
+      /* We should still be able to back-up and re-initialized everything */
+
+      (void)syslog_initialize(SYSLOG_INIT_EARLY);
+      (void)syslog_initialize(SYSLOG_INIT_LATE);
+      goto errout_with_lock;
+    }
+
+  /* Use the file as the SYSLOG channel. If this fails we are pretty much
+   * screwed.
+   */
+
+  ret = syslog_channel(&g_syslog_file_channel);
+
+errout_with_lock:
+  sched_unlock();
+  return ret;
+}
+
+#endif /* CONFIG_SYSLOG_FILE */
diff --git a/drivers/syslog/syslog_flush.c b/drivers/syslog/syslog_flush.c
new file mode 100644
index 0000000000000000000000000000000000000000..bd30c8a506ab0c98d53d98f1d7884052481332ac
--- /dev/null
+++ b/drivers/syslog/syslog_flush.c
@@ -0,0 +1,95 @@
+/****************************************************************************
+ * drivers/syslog/syslog_flush.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include "syslog.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: syslog_flush
+ *
+ * Description:
+ *   This is called by system crash-handling logic.  It must flush any
+ *   buffered data to the SYSLOG device.
+ *
+ *   Interrupts are disabled at the time of the crash and this logic must
+ *   perform the flush using low-level, non-interrupt driven logic.
+ *
+ * Input Parameters:
+ *   ch - The character to add to the SYSLOG (must be positive).
+ *
+ * Returned Value:
+ *   Zero (OK)is returned on  success.  A negated errno value is returned
+ *   on any failure.
+ *
+ ****************************************************************************/
+
+#if 0
+/* REVISIT: (1) Not yet integrated into assertion handlers and (2) there is
+ * an implementation problem in that if a character driver is the underlying
+ * device, then there is no mechanism to flush the data buffered in the
+ * driver with interrupts disabled.
+ */
+
+int syslog_flush(void)
+{
+  DEBUGASSERT(g_syslog_channel != NULL && g_syslog_channel->sc_flush != NULL);
+
+#ifdef CONFIG_SYSLOG_INTBUFFER
+  /* Flush any characters that may have been added to the interrupt
+   * buffer.
+   */
+
+  (void)syslog_flush_intbuffer(g_syslog_channel, true);
+#endif
+
+  /* Then flush all of the buffered output to the SYSLOG device */
+
+  return g_syslog_channel->sc_flush();
+}
+#endif
diff --git a/drivers/syslog/syslog_force.c b/drivers/syslog/syslog_force.c
new file mode 100644
index 0000000000000000000000000000000000000000..418847371dcb7a81b8d18695e56d5caefc3f0822
--- /dev/null
+++ b/drivers/syslog/syslog_force.c
@@ -0,0 +1,86 @@
+/****************************************************************************
+ * drivers/syslog/syslog_force.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "syslog.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: syslog_force
+ *
+ * Description:
+ *   This is the low-level system logging interface.  This version forces
+ *   the output and is only used in emergency situations (e.g., in assertion
+ *   handling).
+ *
+ * Input Parameters:
+ *   ch - The character to add to the SYSLOG (must be positive).
+ *
+ * Returned Value:
+ *   On success, the character is echoed back to the caller.  A negated
+ *   errno value is returned on any failure.
+ *
+ ****************************************************************************/
+
+int syslog_force(int ch)
+{
+  DEBUGASSERT(g_syslog_channel != NULL && g_syslog_channel->sc_force != NULL);
+
+#ifdef CONFIG_SYSLOG_INTBUFFER
+  /* Flush any characters that may have been added to the interrupt
+   * buffer through the emergency channel
+   */
+
+  (void)syslog_flush_intbuffer(g_syslog_channel, true);
+#endif
+
+  /* Then send the character to the emergency channel */
+
+  return g_syslog_channel->sc_force(ch);
+}
diff --git a/drivers/syslog/syslog_initialize.c b/drivers/syslog/syslog_initialize.c
new file mode 100644
index 0000000000000000000000000000000000000000..3c408e61db97865e0bb8e6b4346174162e7cf629
--- /dev/null
+++ b/drivers/syslog/syslog_initialize.c
@@ -0,0 +1,115 @@
+/****************************************************************************
+ * drivers/syslog/syslog_initialize.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+#include 
+
+#include "syslog.h"
+
+#ifndef CONFIG_ARCH_SYSLOG
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: syslog_initialize
+ *
+ * Description:
+ *   One power up, the SYSLOG facility is non-existent or limited to very
+ *   low-level output.  This function is called later in the initialization
+ *   sequence after full driver support has been initialized.  It installs
+ *   the configured SYSLOG drivers and enables full SYSLOGing capability.
+ *
+ *   This function performs these basic operations:
+ *
+ *   - Initialize the SYSLOG device
+ *   - Call syslog_channel() to begin using that device.
+ *
+ *   If CONFIG_ARCH_SYSLOG is selected, then the architecture-specifica
+ *   logic will provide its own SYSLOG device initialize which must include
+ *   as a minimum a call to syslog_channel() to use the device.
+ *
+ * Input Parameters:
+ *   phase - One of {SYSLOG_INIT_EARLY, SYSLOG_INIT_LATE}
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure.
+ *
+ ****************************************************************************/
+
+int syslog_initialize(enum syslog_init_e phase)
+{
+  int ret = OK;
+
+#if defined(CONFIG_SYSLOG_CHAR)
+  if (phase == SYSLOG_INIT_LATE)
+    {
+      /* Enable use of a character device as the SYSLOG device */
+
+      ret = syslog_dev_channel();
+    }
+
+#elif defined(CONFIG_RAMLOG_SYSLOG)
+  if (phase == SYSLOG_INIT_EARLY)
+    {
+      /* Use the RAMLOG as the SYSLOG device */
+
+      ret = ramlog_syslog_channel();
+    }
+
+#elif defined(CONFIG_SYSLOG_CONSOLE)
+  if (phase == SYSLOG_INIT_LATE)
+    {
+      /* Use the console device as the SYSLOG device */
+
+      ret = syslog_console_channel();
+    }
+
+#endif
+
+  return ret;
+}
+
+#endif /* CONFIG_ARCH_SYSLOG */
diff --git a/drivers/syslog/syslog_intbuffer.c b/drivers/syslog/syslog_intbuffer.c
new file mode 100644
index 0000000000000000000000000000000000000000..28be3a74ca4b89203045e624dc6f98e406bf8a86
--- /dev/null
+++ b/drivers/syslog/syslog_intbuffer.c
@@ -0,0 +1,342 @@
+/****************************************************************************
+ * drivers/syslog/syslog_intbuffer.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "syslog.h"
+
+#ifdef CONFIG_SYSLOG_INTBUFFER
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Extend the size of the interrupt buffer so that a "[truncated]\n"
+ * indication can be append to the end.
+ *
+ * The usable capacity of the interrupt buffer is (CONFIG_SYSLOG_INTBUFSIZE - 1).
+ */
+
+#define SYSLOG_BUFOVERRUN_MESSAGE  "[truncated]\n"
+#define SYSLOG_BUFOVERRUN_SIZE     13
+
+#if CONFIG_SYSLOG_INTBUFSIZE > (65535 - SYSLOG_BUFOVERRUN_SIZE)
+#  undef  CONFIG_SYSLOG_INTBUFSIZE
+#  define CONFIG_SYSLOG_INTBUFSIZE (65535 - SYSLOG_BUFOVERRUN_SIZE)
+#  define SYSLOG_INTBUFSIZE        65535
+#else
+#  define SYSLOG_INTBUFSIZE \
+     (CONFIG_SYSLOG_INTBUFSIZE + SYSLOG_BUFOVERRUN_SIZE)
+#endif
+
+#define USABLE_INTBUFSIZE          (CONFIG_SYSLOG_INTBUFSIZE - 1)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* This structure encapsulates the interrupt buffer state */
+
+struct g_syslog_intbuffer_s
+{
+  volatile uint16_t si_inndx;
+  volatile uint16_t si_outndx;
+  uint8_t si_buffer[SYSLOG_INTBUFSIZE];
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static struct g_syslog_intbuffer_s g_syslog_intbuffer;
+static const char g_overrun_msg[SYSLOG_BUFOVERRUN_SIZE] = SYSLOG_BUFOVERRUN_MESSAGE;
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: syslog_remove_intbuffer
+ *
+ * Description:
+ *   Extract any characters that may have been added to the interrupt buffer
+ *   to the SYSLOG device.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   On success, the extracted character is returned.  EOF is returned if
+ *   the interrupt buffer is empty.
+ *
+ * Assumptions:
+ *   Interrupts may or may not be disabled.
+ *
+ ****************************************************************************/
+
+int syslog_remove_intbuffer(void)
+{
+  irqstate_t flags;
+  uint32_t inndx;
+  uint32_t outndx;
+  uint32_t endndx;
+  int inuse = 0;
+  int ch;
+
+  /* Extraction of the character and adjustment of the circular buffer
+   * indices must be performed in a critical section to protect from
+   * concurrent modification from interrupt handlers.
+   */
+
+  flags = enter_critical_section();
+
+  /* How much space is left in the inbuffer? */
+
+  inndx  = (uint32_t)g_syslog_intbuffer.si_inndx;
+  outndx = (uint32_t)g_syslog_intbuffer.si_outndx;
+  if (inndx != outndx)
+    {
+      /* Handle the case where the inndx has wrapped around */
+
+      endndx = inndx;
+      if (endndx < outndx)
+        {
+          endndx += SYSLOG_INTBUFSIZE;
+        }
+
+      inuse = (int)(endndx - outndx);
+
+      /* Take the next character from the interrupt buffer */
+
+      ch = g_syslog_intbuffer.si_buffer[outndx];
+
+      /* Increment the OUT index, handling wrap-around */
+
+      if (++outndx >= SYSLOG_INTBUFSIZE)
+        {
+          outndx -= SYSLOG_INTBUFSIZE;
+        }
+
+      g_syslog_intbuffer.si_outndx = (uint16_t)outndx;
+    }
+
+  leave_critical_section(flags);
+
+  /* Now we can send the extracted character to the SYSLOG device */
+
+  return (inuse > 0) ? ch : EOF;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: syslog_add_intbuffer
+ *
+ * Description:
+ *   Add one more character to the interrupt buffer.  In the event of
+ *   buffer overlowed, the character will be dropped.  The indication
+ *   "[truncated]\n" will be appended to the end of the interrupt buffer.
+ *
+ * Input Parameters:
+ *   ch - The character to add to the interrupt buffer (must be positive).
+ *
+ * Returned Value:
+ *   Zero success, the character is echoed back to the caller.  A negated
+ *   errno value is returned on any failure.
+ *
+ * Assumptions:
+ *   - Called either from (1) interrupt handling logic with interrupts
+ *     disabled or from an IDLE thread with interrupts enabled.
+ *   - Requires caution because there may be an interrupted execution of
+ *     syslog_flush_intbuffer():  Only the outndx can be modified.
+ *
+ ****************************************************************************/
+
+int syslog_add_intbuffer(int ch)
+{
+  irqstate_t flags;
+  uint32_t inndx;
+  uint32_t outndx;
+  uint32_t endndx;
+  unsigned int inuse;
+  int ret;
+  int i;
+
+  /* Disable concurrent modification from interrupt handling logic */
+
+  flags = enter_critical_section();
+
+  /* How much space is left in the inbuffer? */
+
+  inndx  = (uint32_t)g_syslog_intbuffer.si_inndx;
+  outndx = (uint32_t)g_syslog_intbuffer.si_outndx;
+
+  endndx = inndx;
+  if (endndx < outndx)
+    {
+      endndx += SYSLOG_INTBUFSIZE;
+    }
+
+  inuse = (unsigned int)(endndx - outndx);
+
+  /* Is there space for another character (reserving space for the overrun
+   * message)?
+   */
+
+  if (inuse == USABLE_INTBUFSIZE)
+    {
+      /* Copy the truncated message one character at a time, handing index
+       * wrap-around on each character.
+       */
+
+      for (i = 0; i < SYSLOG_BUFOVERRUN_SIZE; i++)
+        {
+          /* Copy one character */
+
+          g_syslog_intbuffer.si_buffer[inndx] = (uint8_t)g_overrun_msg[i];
+
+          /* Increment the IN index, handling wrap-around */
+
+          if (++inndx >= SYSLOG_INTBUFSIZE)
+            {
+              inndx -= SYSLOG_INTBUFSIZE;
+            }
+
+          DEBUGASSERT(inndx != outndx);
+        }
+
+      g_syslog_intbuffer.si_inndx = (uint16_t)inndx;
+      ret = -ENOSPC;
+    }
+  else if (inuse < USABLE_INTBUFSIZE)
+    {
+       /* Copy one character */
+
+       g_syslog_intbuffer.si_buffer[inndx] = (uint8_t)ch;
+
+       /* Increment the IN index, handling wrap-around */
+
+       if (++inndx >= SYSLOG_INTBUFSIZE)
+         {
+           inndx -= SYSLOG_INTBUFSIZE;
+         }
+
+      g_syslog_intbuffer.si_inndx = (uint16_t)inndx;
+      ret = OK;
+    }
+  else
+    {
+      /* This character goes to the bit bucket.  We have already copied
+       * the overrun message so there is nothing else to do.
+       */
+
+      ret = -ENOSPC;
+    }
+
+  leave_critical_section(flags);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: syslog_flush_intbuffer
+ *
+ * Description:
+ *   Flush any characters that may have been added to the interrupt buffer
+ *   to the SYSLOG device.
+ *
+ * Input Parameters:
+ *   channel - The syslog channel to use in performing the flush operation.
+ *   force   - Use the force() method of the channel vs. the putc() method.
+ *
+ * Returned Value:
+ *   On success, the character is echoed back to the caller.  A negated
+ *   errno value is returned on any failure.
+ *
+ * Assumptions:
+ *   Interrupts may or may not be disabled.
+ *
+ ****************************************************************************/
+
+int syslog_flush_intbuffer(FAR const struct syslog_channel_s *channel,
+                           bool force)
+{
+  syslog_putc_t putfunc;
+  int ch;
+  int ret = OK;
+
+  /* Select which putc function to use for this flush */
+
+  putfunc = force ? channel->sc_putc : channel->sc_force;
+
+  /* This logic is performed with the scheduler disabled to protect from
+   * concurrent modification by other tasks.
+   */
+
+  sched_lock();
+  do
+    {
+      /* Transfer one character to time.  This is inefficient, but is
+       * done in this way to: (1) Deal with concurrent modification of
+       * the interrupt buffer from interrupt activity, (2) Avoid keeper
+       * interrupts disabled for a long time, and (3) to handler
+       * wraparound of the circular buffer indices.
+       */
+
+      ch = syslog_remove_intbuffer();
+      if (ch != EOF)
+        {
+          ret = putfunc(ch);
+        }
+    }
+  while (ch != EOF && ret >= 0);
+
+  sched_unlock();
+  return ret;
+}
+
+#endif /* CONFIG_SYSLOG_INTBUFFER */
diff --git a/drivers/syslog/syslog_putc.c b/drivers/syslog/syslog_putc.c
new file mode 100644
index 0000000000000000000000000000000000000000..3f19b6c0050a9a057b6f0c6f7765d209986ebf7b
--- /dev/null
+++ b/drivers/syslog/syslog_putc.c
@@ -0,0 +1,110 @@
+/****************************************************************************
+ * drivers/syslog/syslog_putc.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "syslog.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: syslog_putc
+ *
+ * Description:
+ *   This is the low-level system logging interface.
+ *
+ * Input Parameters:
+ *   ch - The character to add to the SYSLOG (must be positive).
+ *
+ * Returned Value:
+ *   On success, the character is echoed back to the caller.  A negated
+ *   errno value is returned on any failure.
+ *
+ ****************************************************************************/
+
+int syslog_putc(int ch)
+{
+  DEBUGASSERT(g_syslog_channel != NULL);
+
+  /* Is this an attempt to do SYSLOG output from an interrupt handler? */
+
+  if (up_interrupt_context() || sched_idletask())
+    {
+#if defined(CONFIG_SYSLOG_INTBUFFER)
+      /* Buffer the character in the interrupt buffer.  The interrupt buffer
+       * will be flushed before the next normal, non-interrupt SYSLOG output.
+       */
+
+      return syslog_add_intbuffer(ch);
+#else
+      /* Force the character to the SYSLOG device immediately (if possible).
+       * This means that the interrupt data may not be in synchronization
+       * with output data that may have been buffered by sc_putc().
+       */
+
+      DEBUGASSERT(g_syslog_channel->sc_force != NULL);
+
+      return g_syslog_channel->sc_force(ch);
+#endif
+    }
+  else
+    {
+      DEBUGASSERT(g_syslog_channel->sc_putc != NULL);
+
+#ifdef CONFIG_SYSLOG_INTBUFFER
+      /* Flush any characters that may have been added to the interrupt
+       * buffer.
+       */
+
+      (void)syslog_flush_intbuffer(g_syslog_channel, false);
+#endif
+
+      return g_syslog_channel->sc_putc(ch);
+    }
+}
diff --git a/libc/syslog/lib_syslogstream.c b/drivers/syslog/syslog_stream.c
similarity index 86%
rename from libc/syslog/lib_syslogstream.c
rename to drivers/syslog/syslog_stream.c
index 4c6cfa8c2e1347654215e2a50bee7feec163d65a..8305089b8bdacb1ac3fb7b8182ac372a330ce256 100644
--- a/libc/syslog/lib_syslogstream.c
+++ b/drivers/syslog/syslog_stream.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * libc/syslog/lib_syslogstream.c
+ * drivers/syslog/syslog_stream.c
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -47,13 +47,7 @@
 #include 
 #include 
 
-#include "syslog/syslog.h"
-
-#ifdef CONFIG_SYSLOG
-
-/****************************************************************************
- * Pre-processor definition
- ****************************************************************************/
+#include "syslog.h"
 
 /****************************************************************************
  * Private Functions
@@ -97,27 +91,24 @@ static void syslogstream_putc(FAR struct lib_outstream_s *this, int ch)
  ****************************************************************************/
 
 /****************************************************************************
- * Name: lib_syslogstream
+ * Name: syslogstream
  *
  * Description:
  *   Initializes a stream for use with the configured syslog interface.
+ *   Only accessible from with the OS SYSLOG logic.
  *
  * Input parameters:
- *   lowoutstream - User allocated, uninitialized instance of struct
- *                  lib_lowoutstream_s to be initialized.
+ *   stream - User allocated, uninitialized instance of struct
+ *            lib_lowoutstream_s to be initialized.
  *
  * Returned Value:
  *   None (User allocated instance initialized).
  *
  ****************************************************************************/
 
-void lib_syslogstream(FAR struct lib_outstream_s *stream)
+void syslogstream(FAR struct lib_outstream_s *stream)
 {
   stream->put   = syslogstream_putc;
-#ifdef CONFIG_STDIO_LINEBUFFER
   stream->flush = lib_noflush;
-#endif
   stream->nput  = 0;
 }
-
-#endif /* CONFIG_SYSLOG */
diff --git a/drivers/syslog/vsyslog.c b/drivers/syslog/vsyslog.c
new file mode 100644
index 0000000000000000000000000000000000000000..27fab399ecbf98cd6e99b3cd5c81ed3d23ff5c2a
--- /dev/null
+++ b/drivers/syslog/vsyslog.c
@@ -0,0 +1,114 @@
+/****************************************************************************
+ * drivers/syslog/vsyslog.c
+ *
+ *   Copyright (C) 2007-2009, 2011-2014, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: _vsyslog
+ *
+ * Description:
+ *   _vsyslog() handles the system logging system calls. It is functionally
+ *   equivalent to vsyslog() except that (1) the per-process priority
+ *   filtering has already been performed and the va_list parameter is
+ *   passed by reference.  That is because the va_list is a structure in
+ *   some compilers and passing of structures in the NuttX sycalls does
+ *   not work.
+ *
+ ****************************************************************************/
+
+int _vsyslog(int priority, FAR const IPTR char *fmt, FAR va_list *ap)
+{
+  struct lib_outstream_s stream;
+#ifdef CONFIG_SYSLOG_TIMESTAMP
+  struct timespec ts;
+
+  /* Get the current time.  Since debug output may be generated very early
+   * in the start-up sequence, hardware timer support may not yet be
+   * available.
+   */
+
+  if (!OSINIT_HW_READY() || clock_systimespec(&ts) < 0)
+    {
+      /* Timer hardware is not available, or clock_systimespec failed */
+
+      ts.tv_sec  = 0;
+      ts.tv_nsec = 0;
+    }
+#endif
+
+  /* Wrap the low-level output in a stream object and let lib_vsprintf
+   * do the work.  NOTE that emergency priority output is handled
+   * differently.. it will use the SYSLOG emergency stream.
+   */
+
+  if (priority == LOG_EMERG)
+    {
+      /* Use the SYSLOG emergency stream */
+
+      emergstream((FAR struct lib_outstream_s *)&stream);
+    }
+  else
+    {
+      /* Use the normal SYSLOG stream */
+
+      syslogstream((FAR struct lib_outstream_s *)&stream);
+    }
+
+#if defined(CONFIG_SYSLOG_TIMESTAMP)
+  /* Pre-pend the message with the current time, if available */
+
+  (void)lib_sprintf((FAR struct lib_outstream_s *)&stream,
+                    "[%6d.%06d]", ts.tv_sec, ts.tv_nsec/1000);
+#endif
+
+  return lib_vsprintf((FAR struct lib_outstream_s *)&stream, fmt, *ap);
+}
diff --git a/drivers/timers/Kconfig b/drivers/timers/Kconfig
index ef5d6aed71535d8e4fce77d12ef78b367bfc4e0b..a7f204408d392a5f29f0df944e41a0bd61071352 100644
--- a/drivers/timers/Kconfig
+++ b/drivers/timers/Kconfig
@@ -5,7 +5,7 @@
 
 menu "Timer Driver Support"
 
-menuconfig TIMER
+config TIMER
 	bool "Timer Support"
 	default n
 	---help---
@@ -13,6 +13,14 @@ menuconfig TIMER
 		driver. See include/nuttx/timers/timer.h for further timer driver
 		information.
 
+config ONESHOT
+	bool "Oneshot timer driver"
+	default n
+	---help---
+		This selection enables building of the "upper-half" oneshot timer
+		driver. See include/nuttx/timers/oneshot.h for further oneshot timer
+		driver information.
+
 menuconfig RTC
 	bool "RTC Driver Support"
 	default n
@@ -237,11 +245,11 @@ if TIMERS_CS2100CP
 
 config CS2100CP_DEBUG
 	bool "Enable CS2100-CP Debug Features"
-	depends on DEBUG
+	depends on DEBUG_FEATURES
 
 config CS2100CP_REGDEBUG
 	bool "Enable CS2100-CP Register Debug"
-	depends on DEBUG
+	depends on DEBUG_FEATURES
 
 endif # TIMERS_CS2100CP
 endmenu  # Timer Driver Support
diff --git a/drivers/timers/Make.defs b/drivers/timers/Make.defs
index 61c7a9764fae2f04690dfadc9b80331f62fe2f62..64940c43bb2e4f09f3290b6e8cc5345074751b61 100644
--- a/drivers/timers/Make.defs
+++ b/drivers/timers/Make.defs
@@ -51,6 +51,12 @@ ifeq ($(CONFIG_TIMER),y)
   TMRVPATH = :timers
 endif
 
+ifeq ($(CONFIG_ONESHOT),y)
+  CSRCS += oneshot.c
+  TMRDEPPATH = --dep-path timers
+  TMRVPATH = :timers
+endif
+
 ifeq ($(CONFIG_RTC_DSXXXX),y)
   CSRCS += ds3231.c
   TMRDEPPATH = --dep-path timers
diff --git a/drivers/timers/cs2100-cp.c b/drivers/timers/cs2100-cp.c
index 11ed144cb4432c340a590e2879183dcd4ca17b97..82c80bf403ba8556911a661b2377ce1ebeeb2c6c 100644
--- a/drivers/timers/cs2100-cp.c
+++ b/drivers/timers/cs2100-cp.c
@@ -66,44 +66,36 @@
 
 /* Debug ********************************************************************/
 
-#undef csdbg
+#undef cserr
 #ifdef CONFIG_CS2100CP_DEBUG
 #  ifdef CONFIG_CPP_HAVE_VARARGS
-#    define csdbg(format, ...)  dbg(format, ##__VA_ARGS__)
+#    define cserr(format, ...)    _err(format, ##__VA_ARGS__)
 #  else
-#    define csdbg               dbg
+#    define cserr                 _err
 #  endif
 #else
 #  ifdef CONFIG_CPP_HAVE_VARARGS
-#    define csdbg(x...)
+#    define cserr(x...)
 #  else
-#    define csdbg               (void)
+#    define cserr                (void)
 #  endif
 #endif
 
-#undef regdbg
+#undef reginfo
 #ifdef CONFIG_CS2100CP_REGDEBUG
 #  ifdef CONFIG_CPP_HAVE_VARARGS
-#    define regdbg(format, ...) dbg(format, ##__VA_ARGS__)
+#    define reginfo(format, ...)  _err(format, ##__VA_ARGS__)
 #  else
-#    define regdbg              dbg
+#    define reginfo               _err
 #  endif
 #else
 #  ifdef CONFIG_CPP_HAVE_VARARGS
-#    define regdbg(x...)
+#    define reginfo(x...)
 #  else
-#    define regdbg              (void)
+#    define reginfo              (void)
 #  endif
 #endif
 
-/****************************************************************************
- * Public Types
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -129,7 +121,7 @@ static int cs2100_write_reg(FAR const struct cs2100_config_s *config,
 {
   struct i2c_msg_s msgs[2];
 
-  regdbg("%02x<-%02x\n", regaddr, regval);
+  reginfo("%02x<-%02x\n", regaddr, regval);
   DEBUGASSERT(config->i2c->ops && config->i2c->ops->transfer);
 
   /* Construct the I2C message (write N+1 bytes with no restart) */
@@ -200,7 +192,7 @@ static int cs2100_read_reg(FAR const struct cs2100_config_s *config,
       ret = I2C_TRANSFER(config->i2c, &msg, 1);
       if (ret == OK)
         {
-          regdbg("%02x->%02x\n", regaddr, *regval);
+          reginfo("%02x->%02x\n", regaddr, *regval);
         }
     }
 
@@ -229,7 +221,7 @@ static int cs2100_write_ratio(FAR const struct cs2100_config_s *config,
   struct i2c_msg_s msg;
   uint8_t buffer[5];
 
-  regdbg("%02x<-%04l\n", CS2100_RATIO0, (unsigned long)ratio);
+  reginfo("%02x<-%04l\n", CS2100_RATIO0, (unsigned long)ratio);
   DEBUGASSERT(config->i2c->ops && config->i2c->ops->transfer);
 
   /* Construct the I2C message (write N+1 bytes with no restart) */
@@ -310,7 +302,7 @@ static int cs2100_read_ratio(FAR const struct cs2100_config_s *config,
                     ((uint32_t)buffer[2] << 8) |
                      (uint32_t)buffer[0];
 
-           regdbg("%02x->%04l\n", CS2100_RATIO0, (unsigned long)*ratio);
+           reginfo("%02x->%04l\n", CS2100_RATIO0, (unsigned long)*ratio);
         }
     }
 
@@ -356,7 +348,7 @@ static int cs2100_refclk(FAR const struct cs2100_config_s *config)
     }
   else
     {
-      csdbg("ERROR: reflck too large: %ul\n", (unsigned long)config->refclk);
+      cserr("ERROR: reflck too large: %ul\n", (unsigned long)config->refclk);
       return -EINVAL;
     }
 
@@ -370,7 +362,7 @@ static int cs2100_refclk(FAR const struct cs2100_config_s *config)
   ret = cs2100_write_reg(config, CS2100_FNCCFG1, regval);
   if (ret < 0)
     {
-      csdbg("ERROR: Failed to set CS2100_FNCCFG1: %d\n", ret);
+      cserr("ERROR: Failed to set CS2100_FNCCFG1: %d\n", ret);
       return ret;
     }
 
@@ -414,7 +406,7 @@ static int cs2100_refclk(FAR const struct cs2100_config_s *config)
   ret = cs2100_write_reg(config, CS2100_FNCCFG3, regval);
   if (ret < 0)
     {
-      csdbg("ERROR: Failed to set CS2100_FNCCFG3: %d\n", ret);
+      cserr("ERROR: Failed to set CS2100_FNCCFG3: %d\n", ret);
       return ret;
     }
 
@@ -426,7 +418,7 @@ static int cs2100_refclk(FAR const struct cs2100_config_s *config)
   ret = cs2100_write_reg(config, CS2100_FNCCFG2, CS2100_FNCCFG2_CLKOUTUNL);
   if (ret < 0)
     {
-      csdbg("ERROR: Failed to set CS2100_FNCCFG2: %d\n", ret);
+      cserr("ERROR: Failed to set CS2100_FNCCFG2: %d\n", ret);
     }
 
   return ret;
@@ -554,7 +546,7 @@ static int cs2100_ratio(FAR const struct cs2100_config_s *config)
     }
   else
     {
-      csdbg("ERROR: Ratio too large: %08llx\n", rudb24);
+      cserr("ERROR: Ratio too large: %08llx\n", rudb24);
       return -E2BIG;
     }
 
@@ -563,7 +555,7 @@ static int cs2100_ratio(FAR const struct cs2100_config_s *config)
   ret = cs2100_write_ratio(config, rud);
   if (ret < 0)
     {
-      csdbg("ERROR: Failed to set ratio: %d\n", ret);
+      cserr("ERROR: Failed to set ratio: %d\n", ret);
       return ret;
     }
 
@@ -576,7 +568,7 @@ static int cs2100_ratio(FAR const struct cs2100_config_s *config)
   ret    = cs2100_write_reg(config, CS2100_DEVCFG1, regval);
   if (ret < 0)
     {
-      csdbg("ERROR: Failed to set CS2100_DEVCFG1: %d\n", ret);
+      cserr("ERROR: Failed to set CS2100_DEVCFG1: %d\n", ret);
       return ret;
     }
 
@@ -628,7 +620,7 @@ int cs2100_enable(FAR const struct cs2100_config_s *config)
   ret = cs2100_write_reg(config, CS2100_DEVCTL, regval);
   if (ret < 0)
     {
-      csdbg("ERROR: Failed to set CS2100_DEVCTL: %d\n", ret);
+      cserr("ERROR: Failed to set CS2100_DEVCTL: %d\n", ret);
       return ret;
     }
 
@@ -637,7 +629,7 @@ int cs2100_enable(FAR const struct cs2100_config_s *config)
   ret = cs2100_refclk(config);
   if (ret < 0)
     {
-      csdbg("ERROR: cs2100_refclk failed: %d\n", ret);
+      cserr("ERROR: cs2100_refclk failed: %d\n", ret);
       return ret;
     }
 
@@ -649,7 +641,7 @@ int cs2100_enable(FAR const struct cs2100_config_s *config)
   ret = cs2100_write_reg(config, CS2100_GBLCFG, CS2100_GBLCFG_FREEZE);
   if (ret < 0)
     {
-      csdbg("ERROR: Failed to set CS2100_GBLCFG: %d\n", ret);
+      cserr("ERROR: Failed to set CS2100_GBLCFG: %d\n", ret);
       return ret;
     }
 
@@ -658,7 +650,7 @@ int cs2100_enable(FAR const struct cs2100_config_s *config)
   ret = cs2100_ratio(config);
   if (ret < 0)
     {
-      csdbg("ERROR: cs2100_ratio failed: %d\n", ret);
+      cserr("ERROR: cs2100_ratio failed: %d\n", ret);
       return ret;
     }
 
@@ -667,7 +659,7 @@ int cs2100_enable(FAR const struct cs2100_config_s *config)
   ret = cs2100_write_reg(config, CS2100_GBLCFG, CS2100_GBLCFG_ENDEVCFG2);
   if (ret < 0)
     {
-      csdbg("ERROR: Failed to set CS2100_GBLCFG: %d\n", ret);
+      cserr("ERROR: Failed to set CS2100_GBLCFG: %d\n", ret);
       return ret;
     }
 
@@ -677,7 +669,7 @@ int cs2100_enable(FAR const struct cs2100_config_s *config)
   ret = cs2100_write_reg(config, CS2100_DEVCTL, regval);
   if (ret < 0)
     {
-      csdbg("ERROR: Failed to set CS2100_DEVCTL: %d\n", ret);
+      cserr("ERROR: Failed to set CS2100_DEVCTL: %d\n", ret);
     }
 
   return ret;
@@ -709,7 +701,7 @@ int cs2100_disable(FAR const struct cs2100_config_s *config)
   ret = cs2100_write_reg(config, CS2100_DEVCTL, regval);
   if (ret < 0)
     {
-      csdbg("ERROR: Failed to set CS2100_DEVCTL: %d\n", ret);
+      cserr("ERROR: Failed to set CS2100_DEVCTL: %d\n", ret);
       return ret;
     }
 
@@ -718,7 +710,7 @@ int cs2100_disable(FAR const struct cs2100_config_s *config)
   ret = cs2100_write_reg(config, CS2100_GBLCFG, 0);
   if (ret < 0)
     {
-      csdbg("ERROR: Failed to set CS2100_GBLCFG: %d\n", ret);
+      cserr("ERROR: Failed to set CS2100_GBLCFG: %d\n", ret);
       return ret;
     }
 
@@ -727,7 +719,7 @@ int cs2100_disable(FAR const struct cs2100_config_s *config)
   ret = cs2100_write_reg(config, CS2100_DEVCFG1, 0);
   if (ret < 0)
     {
-      csdbg("ERROR: Failed to set CS2100_DEVCFG1: %d\n", ret);
+      cserr("ERROR: Failed to set CS2100_DEVCFG1: %d\n", ret);
       return ret;
     }
 
@@ -737,7 +729,7 @@ int cs2100_disable(FAR const struct cs2100_config_s *config)
   ret = cs2100_write_reg(config, CS2100_DEVCTL, regval);
   if (ret < 0)
     {
-      csdbg("ERROR: Failed to set CS2100_DEVCTL: %d\n", ret);
+      cserr("ERROR: Failed to set CS2100_DEVCTL: %d\n", ret);
     }
 
   return ret;
@@ -764,79 +756,79 @@ int cs2100_dump(FAR const struct cs2100_config_s *config)
   uint8_t regval;
   int ret;
 
-  dbg("CS200-CP Registers:\n");
+  csinfo("CS200-CP Registers:\n");
 
   ret = cs2100_read_reg(config, CS2100_DEVID, ®val);
   if (ret < 0)
     {
-      csdbg("ERROR: Failed to read CS2100_DEVID: %d\n", ret);
+      cserr("ERROR: Failed to read CS2100_DEVID: %d\n", ret);
       return ret;
     }
 
-  dbg("     Devid: %02x\n", regval);
+  csinfo("     Devid: %02x\n", regval);
 
   ret = cs2100_read_reg(config, CS2100_DEVCTL, ®val);
   if (ret < 0)
     {
-      csdbg("ERROR: Failed to read CS2100_DEVCTL: %d\n", ret);
+      cserr("ERROR: Failed to read CS2100_DEVCTL: %d\n", ret);
       return ret;
     }
 
-  dbg("    DevCtl: %02x\n", regval);
+  csinfo("    DevCtl: %02x\n", regval);
 
   ret = cs2100_read_reg(config, CS2100_DEVCFG1, ®val);
   if (ret < 0)
     {
-      csdbg("ERROR: Failed to read CS2100_DEVCFG1: %d\n", ret);
+      cserr("ERROR: Failed to read CS2100_DEVCFG1: %d\n", ret);
       return ret;
     }
 
-  dbg("   DevCfg1: %02x\n", regval);
+  csinfo("   DevCfg1: %02x\n", regval);
 
   ret = cs2100_read_reg(config, CS2100_GBLCFG, ®val);
   if (ret < 0)
     {
-      csdbg("ERROR: Failed to read CS2100_GBLCFG: %d\n", ret);
+      cserr("ERROR: Failed to read CS2100_GBLCFG: %d\n", ret);
       return ret;
     }
 
-  dbg("    GblCfg: %02x\n", regval);
+  csinfo("    GblCfg: %02x\n", regval);
 
   ret = cs2100_read_ratio(config, &ratio);
   if (ret < 0)
     {
-      csdbg("ERROR: cs2100_read_ratio failed: %d\n", ret);
+      cserr("ERROR: cs2100_read_ratio failed: %d\n", ret);
       return ret;
     }
 
-  dbg("     Ratio: %04lx\n", (unsigned long)ratio);
+  csinfo("     Ratio: %04lx\n", (unsigned long)ratio);
 
   ret = cs2100_read_reg(config, CS2100_FNCCFG1, ®val);
   if (ret < 0)
     {
-      csdbg("ERROR: Failed to read CS2100_FNCCFG1: %d\n", ret);
+      cserr("ERROR: Failed to read CS2100_FNCCFG1: %d\n", ret);
       return ret;
     }
 
-  dbg("  FuncCfg1: %02x\n", regval);
+  csinfo("  FuncCfg1: %02x\n", regval);
 
   ret = cs2100_read_reg(config, CS2100_FNCCFG2, ®val);
   if (ret < 0)
     {
-      csdbg("ERROR: Failed to read CS2100_FNCCFG2: %d\n", ret);
+      cserr("ERROR: Failed to read CS2100_FNCCFG2: %d\n", ret);
       return ret;
     }
 
-  dbg("  FuncCfg2: %02x\n", regval);
+  csinfo("  FuncCfg2: %02x\n", regval);
 
   ret = cs2100_read_reg(config, CS2100_FNCCFG3, ®val);
   if (ret < 0)
     {
-      csdbg("ERROR: Failed to read CS2100_FNCCFG3: %d\n", ret);
+      cserr("ERROR: Failed to read CS2100_FNCCFG3: %d\n", ret);
       return ret;
     }
 
-  dbg("  FuncCfg3: %02x\n", regval);
+  csinfo("  FuncCfg3: %02x\n", regval);
   return OK;
 }
 
diff --git a/drivers/timers/ds3231.c b/drivers/timers/ds3231.c
index 7efaaecb0397fd5656f025ca49fc152bfaff39aa..4f1e2a1c9f5b0ede1c4d0948b9078a604421b450 100644
--- a/drivers/timers/ds3231.c
+++ b/drivers/timers/ds3231.c
@@ -77,24 +77,6 @@
 
 #define DS3231_I2C_ADDRESS 0x68
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_RTC
-#endif
-
-/* Debug ****************************************************************************/
-
-#ifdef CONFIG_DEBUG_RTC
-#  define rtcdbg    dbg
-#  define rtcvdbg   vdbg
-#  define rtclldbg  lldbg
-#  define rtcllvdbg llvdbg
-#else
-#  define rtcdbg(x...)
-#  define rtcvdbg(x...)
-#  define rtclldbg(x...)
-#  define rtcllvdbg(x...)
-#endif
-
 /************************************************************************************
  * Priviate Types
  ************************************************************************************/
@@ -140,20 +122,20 @@ static struct ds3231_dev_s g_ds3231;
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_RTC
+#ifdef CONFIG_DEBUG_RTC_INFO
 static void rtc_dumptime(FAR struct tm *tp, FAR const char *msg)
 {
-  rtclldbg("%s:\n", msg);
-  rtclldbg("   tm_sec: %08x\n", tp->tm_sec);
-  rtclldbg("   tm_min: %08x\n", tp->tm_min);
-  rtclldbg("  tm_hour: %08x\n", tp->tm_hour);
-  rtclldbg("  tm_mday: %08x\n", tp->tm_mday);
-  rtclldbg("   tm_mon: %08x\n", tp->tm_mon);
-  rtclldbg("  tm_year: %08x\n", tp->tm_year);
+  rtcinfo("%s:\n", msg);
+  rtcinfo("   tm_sec: %08x\n", tp->tm_sec);
+  rtcinfo("   tm_min: %08x\n", tp->tm_min);
+  rtcinfo("  tm_hour: %08x\n", tp->tm_hour);
+  rtcinfo("  tm_mday: %08x\n", tp->tm_mday);
+  rtcinfo("   tm_mon: %08x\n", tp->tm_mon);
+  rtcinfo("  tm_year: %08x\n", tp->tm_year);
 #if defined(CONFIG_LIBC_LOCALTIME) || defined(CONFIG_TIME_EXTENDED)
-  rtclldbg("  tm_wday: %08x\n", tp->tm_wday);
-  rtclldbg("  tm_yday: %08x\n", tp->tm_yday);
-  rtclldbg(" tm_isdst: %08x\n", tp->tm_isdst);
+  rtcinfo("  tm_wday: %08x\n", tp->tm_wday);
+  rtcinfo("  tm_yday: %08x\n", tp->tm_yday);
+  rtcinfo(" tm_isdst: %08x\n", tp->tm_isdst);
 #endif
 }
 #else
@@ -339,7 +321,7 @@ int up_rtc_getdatetime(FAR struct tm *tp)
       ret = I2C_TRANSFER(g_ds3231.i2c, msg, 4);
       if (ret < 0)
         {
-          rtcdbg("ERROR: I2C_TRANSFER failed: %d\n", ret)
+          rtcerr("ERROR: I2C_TRANSFER failed: %d\n", ret)
           return ret;
         }
     }
@@ -448,13 +430,13 @@ int up_rtc_settime(FAR const struct timespec *tp)
  #ifdef CONFIG_LIBC_LOCALTIME
    if (localtime_r(&newtime, &newtm) == NULL)
      {
-       rtcdbg("ERROR: localtime_r failed\n")
+       rtcerr("ERROR: localtime_r failed\n")
        return -EINVAL;
      }
 #else
    if (gmtime_r(&newtime, &newtm) == NULL)
      {
-       rtcdbg("ERROR: gmtime_r failed\n")
+       rtcerr("ERROR: gmtime_r failed\n")
        return -EINVAL;
      }
 #endif
@@ -554,7 +536,7 @@ int up_rtc_settime(FAR const struct timespec *tp)
       ret = I2C_TRANSFER(g_ds3231.i2c, msg, 3);
       if (ret < 0)
         {
-          rtcdbg("ERROR: I2C_TRANSFER failed: %d\n", ret)
+          rtcerr("ERROR: I2C_TRANSFER failed: %d\n", ret)
           return ret;
         }
     }
diff --git a/drivers/timers/oneshot.c b/drivers/timers/oneshot.c
new file mode 100644
index 0000000000000000000000000000000000000000..518071d19dbc5e9692c3e6683d8a3db25d6cccf0
--- /dev/null
+++ b/drivers/timers/oneshot.c
@@ -0,0 +1,383 @@
+/****************************************************************************
+ * drivers/timers/oneshot.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_ONESHOT
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_DISABLE_SIGNALS
+#  error "This driver needs SIGNAL support, remove CONFIG_DISABLE_SIGNALS"
+#endif
+
+/****************************************************************************
+ * Private Type Definitions
+ ****************************************************************************/
+
+/* This structure describes the state of the upper half driver */
+
+struct oneshot_dev_s
+{
+  FAR struct oneshot_lowerhalf_s *od_lower;    /* Lower-half driver state */
+  sem_t od_exclsem;                            /* Supports mutual exclusion */
+
+  /* Oneshot timer expiration notification information */
+
+  uint8_t od_signo;                            /* Signal number for notification */
+  pid_t od_pid;                                /* PID to be notified */
+  FAR void *od_arg;                            /* Signal value argument */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int     oneshot_open(FAR struct file *filep);
+static int     oneshot_close(FAR struct file *filep);
+static ssize_t oneshot_read(FAR struct file *filep, FAR char *buffer,
+                 size_t buflen);
+static ssize_t oneshot_write(FAR struct file *filep, FAR const char *buffer,
+                 size_t buflen);
+static int     oneshot_ioctl(FAR struct file *filep, int cmd,
+                 unsigned long arg);
+
+static void    oneshot_callback(FAR struct oneshot_lowerhalf_s *lower,
+                 FAR void *arg);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct file_operations g_oneshot_ops =
+{
+  oneshot_open,  /* open */
+  oneshot_close, /* close */
+  oneshot_read,  /* read */
+  oneshot_write, /* write */
+  0,             /* seek */
+  oneshot_ioctl  /* ioctl */
+#ifndef CONFIG_DISABLE_POLL
+  , 0            /* poll */
+#endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  , 0            /* unlink */
+#endif
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: oneshot_callback
+ ****************************************************************************/
+
+static void oneshot_callback(FAR struct oneshot_lowerhalf_s *lower,
+                             FAR void *arg)
+{
+  FAR struct oneshot_dev_s *priv = (FAR struct oneshot_dev_s *)arg;
+#ifdef CONFIG_CAN_PASS_STRUCTS
+  union sigval value;
+#endif
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Signal the waiter.. if there is one */
+
+#ifdef CONFIG_CAN_PASS_STRUCTS
+  value.sival_ptr = priv->od_arg;
+  (void)sigqueue(priv->od_pid, priv->od_signo, value);
+#else
+  (void)sigqueue(priv->od_pid, priv->od_signo, priv->od_arg);
+#endif
+}
+
+/************************************************************************************
+ * Name: oneshot_open
+ *
+ * Description:
+ *   This function is called whenever the PWM device is opened.
+ *
+ ************************************************************************************/
+
+static int oneshot_open(FAR struct file *filep)
+{
+  tmrinfo("Opening...\n");
+  DEBUGASSERT(filep != NULL && filep->f_inode != NULL);
+  return OK;
+}
+
+/************************************************************************************
+ * Name: oneshot_close
+ *
+ * Description:
+ *   This function is called when the PWM device is closed.
+ *
+ ************************************************************************************/
+
+static int oneshot_close(FAR struct file *filep)
+{
+  tmrinfo("Closing...\n");
+  DEBUGASSERT(filep != NULL && filep->f_inode != NULL);
+  return OK;
+}
+
+/************************************************************************************
+ * Name: oneshot_read
+ *
+ * Description:O
+ *   A dummy read method.  This is provided only to satsify the VFS layer.
+ *
+ ************************************************************************************/
+
+static ssize_t oneshot_read(FAR struct file *filep, FAR char *buffer, size_t buflen)
+{
+  /* Return zero -- usually meaning end-of-file */
+
+  tmrinfo("buflen=%ld\n", (unsigned long)buflen);
+  DEBUGASSERT(filep != NULL && filep->f_inode != NULL);
+  return 0;
+}
+
+/************************************************************************************
+ * Name: oneshot_write
+ *
+ * Description:
+ *   A dummy write method.  This is provided only to satsify the VFS layer.
+ *
+ ************************************************************************************/
+
+static ssize_t oneshot_write(FAR struct file *filep, FAR const char *buffer,
+                             size_t buflen)
+{
+  /* Return a failure */
+
+  tmrinfo("buflen=%ld\n", (unsigned long)buflen);
+  DEBUGASSERT(filep != NULL && filep->f_inode != NULL);
+  return -EPERM;
+}
+
+/************************************************************************************
+ * Name: oneshot_ioctl
+ *
+ * Description:
+ *   The standard ioctl method.  This is where ALL of the PWM work is done.
+ *
+ ************************************************************************************/
+
+static int oneshot_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
+{
+  FAR struct inode *inode;
+  FAR struct oneshot_dev_s *priv;
+  int ret;
+
+  tmrinfo("cmd=%d arg=%08lx\n", cmd, (unsigned long)arg);
+
+  DEBUGASSERT(filep != NULL && filep->f_inode != NULL);
+  inode = filep->f_inode;
+  priv  = (FAR struct oneshot_dev_s *)inode->i_private;
+  DEBUGASSERT(priv != NULL);
+
+  /* Get exclusive access to the device structures */
+
+  ret = sem_wait(&priv->od_exclsem);
+  if (ret < 0)
+    {
+      return ret;
+    }
+
+  /* Handle oneshot timer ioctl commands */
+
+  switch (cmd)
+    {
+      /* OSIOC_MAXDELAY - Return the maximum delay that can be supported
+       *                  by this timer.
+       *                  Argument: A referenct to a struct timespec in
+       *                  which the maximum time will be returned.
+       */
+
+      case OSIOC_MAXDELAY:
+        {
+          FAR struct timespec *ts = (FAR struct timespec *)((uintptr_t)arg);
+          DEBUGASSERT(ts != NULL);
+
+          ret = ONESHOT_MAX_DELAY(priv->od_lower, ts);
+        }
+        break;
+
+      /* OSIOC_START - Start the oneshot timer
+       *               Argument: A reference to struct oneshot_start_s
+       */
+
+      case OSIOC_START:
+        {
+          FAR struct oneshot_start_s *start;
+          pid_t pid;
+
+          start = (FAR struct oneshot_start_s *)((uintptr_t)arg);
+          DEBUGASSERT(start != NULL);
+
+          /* Save signalling information */
+
+          priv->od_signo = start->signo;
+          priv->od_arg   = start->arg;
+
+          pid = start->pid;
+          if (pid == 0)
+            {
+              pid = getpid();
+            }
+
+          priv->od_pid = pid;
+
+          /* Start the oneshot timer */
+
+          ret = ONESHOT_START(priv->od_lower, oneshot_callback, priv,
+                              &start->ts);
+        }
+        break;
+
+      /* OSIOC_CANCEL - Stop the timer
+       *                Argument: A reference to a struct timespec in
+       *                which the time remaining will be returned.
+       */
+
+      case OSIOC_CANCEL:
+        {
+          FAR struct timespec *ts = (FAR struct timespec *)((uintptr_t)arg);
+
+          /* Cancel the oneshot timer */
+
+          ret = ONESHOT_CANCEL(priv->od_lower, ts);
+        }
+        break;
+
+      default:
+        {
+          tmrerr("ERROR: Unrecognized cmd: %d arg: %ld\n", cmd, arg);
+          ret = -ENOTTY;
+        }
+        break;
+    }
+
+  sem_post(&priv->od_exclsem);
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: oneshot_register
+ *
+ * Description:
+ *   Register the oneshot device as 'devpath'
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/oneshot0"
+ *   lower - An instance of the lower half interface
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.  The following
+ *   possible error values may be returned (most are returned by
+ *   register_driver()):
+ *
+ *   EINVAL - 'path' is invalid for this operation
+ *   EEXIST - An inode already exists at 'path'
+ *   ENOMEM - Failed to allocate in-memory resources for the operation
+ *
+ ****************************************************************************/
+
+int oneshot_register(FAR const char *devname,
+                     FAR struct oneshot_lowerhalf_s *lower)
+{
+  FAR struct oneshot_dev_s *priv;
+  int ret;
+
+  sninfo("devname=%s lower=%p\n", devname, lower);
+  DEBUGASSERT(devname != NULL && lower != NULL);
+
+  /* Allocate a new oneshot timer driver instance */
+
+  priv = (FAR struct oneshot_dev_s *)
+    kmm_zalloc(sizeof(struct oneshot_dev_s));
+
+  if (!priv)
+    {
+      snerr("ERROR: Failed to allocate device structure\n");
+      return -ENOMEM;
+    }
+
+  /* Initialize the new oneshot timer driver instance */
+
+  priv->od_lower = lower;
+  sem_init(&priv->od_exclsem, 0, 1);
+
+  /* And register the oneshot timer driver */
+
+  ret = register_driver(devname, &g_oneshot_ops, 0666, priv);
+  if (ret < 0)
+    {
+      snerr("ERROR: register_driver failed: %d\n", ret);
+      sem_destroy(&priv->od_exclsem);
+      kmm_free(priv);
+    }
+
+  return ret;
+}
+
+#endif /* CONFIG_ONESHOT */
diff --git a/drivers/timers/pcf85263.c b/drivers/timers/pcf85263.c
index 0128e354f23d60251225f82cf5ace6346ef756fd..f162699f20ba156290ad371300bac2aea9814769 100644
--- a/drivers/timers/pcf85263.c
+++ b/drivers/timers/pcf85263.c
@@ -77,24 +77,6 @@
 
 #define PCF85263_I2C_ADDRESS 0x51
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_RTC
-#endif
-
-/* Debug ****************************************************************************/
-
-#ifdef CONFIG_DEBUG_RTC
-#  define rtcdbg    dbg
-#  define rtcvdbg   vdbg
-#  define rtclldbg  lldbg
-#  define rtcllvdbg llvdbg
-#else
-#  define rtcdbg(x...)
-#  define rtcvdbg(x...)
-#  define rtclldbg(x...)
-#  define rtcllvdbg(x...)
-#endif
-
 /************************************************************************************
  * Priviate Types
  ************************************************************************************/
@@ -140,20 +122,20 @@ static struct pcf85263_dev_s g_pcf85263;
  *
  ************************************************************************************/
 
-#ifdef CONFIG_DEBUG_RTC
+#ifdef CONFIG_DEBUG_RTC_INFO
 static void rtc_dumptime(FAR struct tm *tp, FAR const char *msg)
 {
-  rtclldbg("%s:\n", msg);
-  rtclldbg("   tm_sec: %08x\n", tp->tm_sec);
-  rtclldbg("   tm_min: %08x\n", tp->tm_min);
-  rtclldbg("  tm_hour: %08x\n", tp->tm_hour);
-  rtclldbg("  tm_mday: %08x\n", tp->tm_mday);
-  rtclldbg("   tm_mon: %08x\n", tp->tm_mon);
-  rtclldbg("  tm_year: %08x\n", tp->tm_year);
+  rtcinfo("%s:\n", msg);
+  rtcinfo("   tm_sec: %08x\n", tp->tm_sec);
+  rtcinfo("   tm_min: %08x\n", tp->tm_min);
+  rtcinfo("  tm_hour: %08x\n", tp->tm_hour);
+  rtcinfo("  tm_mday: %08x\n", tp->tm_mday);
+  rtcinfo("   tm_mon: %08x\n", tp->tm_mon);
+  rtcinfo("  tm_year: %08x\n", tp->tm_year);
 #if defined(CONFIG_LIBC_LOCALTIME) || defined(CONFIG_TIME_EXTENDED)
-  rtclldbg("  tm_wday: %08x\n", tp->tm_wday);
-  rtclldbg("  tm_yday: %08x\n", tp->tm_yday);
-  rtclldbg(" tm_isdst: %08x\n", tp->tm_isdst);
+  rtcinfo("  tm_wday: %08x\n", tp->tm_wday);
+  rtcinfo("  tm_yday: %08x\n", tp->tm_yday);
+  rtcinfo(" tm_isdst: %08x\n", tp->tm_isdst);
 #endif
 }
 #else
@@ -338,7 +320,7 @@ int up_rtc_getdatetime(FAR struct tm *tp)
       ret = I2C_TRANSFER(g_pcf85263.i2c, msg, 4);
       if (ret < 0)
         {
-          rtcdbg("ERROR: I2C_TRANSFER failed: %d\n", ret)
+          rtcerr("ERROR: I2C_TRANSFER failed: %d\n", ret)
           return ret;
         }
     }
@@ -431,13 +413,13 @@ int up_rtc_settime(FAR const struct timespec *tp)
  #ifdef CONFIG_LIBC_LOCALTIME
    if (localtime_r(&newtime, &newtm) == NULL)
      {
-       rtcdbg("ERROR: localtime_r failed\n")
+       rtcerr("ERROR: localtime_r failed\n")
        return -EINVAL;
      }
 #else
    if (gmtime_r(&newtime, &newtm) == NULL)
      {
-       rtcdbg("ERROR: gmtime_r failed\n")
+       rtcerr("ERROR: gmtime_r failed\n")
        return -EINVAL;
      }
 #endif
@@ -518,7 +500,7 @@ int up_rtc_settime(FAR const struct timespec *tp)
       ret = I2C_TRANSFER(g_pcf85263.i2c, msg, 3);
       if (ret < 0)
         {
-          rtcdbg("ERROR: I2C_TRANSFER failed: %d\n", ret)
+          rtcerr("ERROR: I2C_TRANSFER failed: %d\n", ret)
           return ret;
         }
     }
diff --git a/drivers/timers/timer.c b/drivers/timers/timer.c
index afdd39a39ea043e40a553a527e93c7f1fba5a895..667be5276da3e7f9923911ce7d9fba6f7969a6aa 100644
--- a/drivers/timers/timer.c
+++ b/drivers/timers/timer.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/timers/timer.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Authors: Gregory Nutt 
  *            Bob Doiron
  *
@@ -46,6 +46,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -57,24 +58,6 @@
 
 #ifdef CONFIG_TIMER
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing the timer driver */
-
-#ifdef CONFIG_DEBUG_TIMER
-#  define tmrdbg    dbg
-#  define tmrvdbg   vdbg
-#  define tmrlldbg  lldbg
-#  define tmrllvdbg llvdbg
-#else
-#  define tmrdbg(x...)
-#  define tmrvdbg(x...)
-#  define tmrlldbg(x...)
-#  define tmrllvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Type Definitions
  ****************************************************************************/
@@ -83,8 +66,11 @@
 
 struct timer_upperhalf_s
 {
-  uint8_t   crefs;    /* The number of times the device has been opened */
-  FAR char *path;     /* Registration path */
+  uint8_t   crefs;         /* The number of times the device has been opened */
+  uint8_t   signo;         /* The signal number to use in the notification */
+  pid_t     pid;           /* The ID of the task/thread to receive the signal */
+  FAR void *arg;           /* An argument to pass with the signal */
+  FAR char *path;          /* Registration path */
 
   /* The contained lower-half driver */
 
@@ -95,6 +81,7 @@ struct timer_upperhalf_s
  * Private Function Prototypes
  ****************************************************************************/
 
+static bool    timer_notifier(FAR uint32_t *next_interval_us, FAR void *arg);
 static int     timer_open(FAR struct file *filep);
 static int     timer_close(FAR struct file *filep);
 static ssize_t timer_read(FAR struct file *filep, FAR char *buffer,
@@ -128,6 +115,37 @@ static const struct file_operations g_timerops =
  * Private Functions
  ****************************************************************************/
 
+/************************************************************************************
+ * Name: timer_notifier
+ *
+ * Description:
+ *   Notify the application via a signal when the timer interrupt occurs
+ *
+ * REVISIT: This function prototype is insufficient to support signaling
+ *
+ ************************************************************************************/
+
+static bool timer_notifier(FAR uint32_t *next_interval_us, FAR void *arg)
+{
+  FAR struct timer_upperhalf_s *upper = (FAR struct timer_upperhalf_s *)arg;
+#ifdef CONFIG_CAN_PASS_STRUCTS
+  union sigval value;
+#endif
+
+  DEBUGASSERT(upper != NULL);
+
+  /* Signal the waiter.. if there is one */
+
+#ifdef CONFIG_CAN_PASS_STRUCTS
+  value.sival_ptr = upper->arg;
+  (void)sigqueue(upper->pid, upper->signo, value);
+#else
+  (void)sigqueue(upper->pid, upper->signo, upper->arg);
+#endif
+
+  return true;
+}
+
 /************************************************************************************
  * Name: timer_open
  *
@@ -138,12 +156,12 @@ static const struct file_operations g_timerops =
 
 static int timer_open(FAR struct file *filep)
 {
-  FAR struct inode                *inode = filep->f_inode;
+  FAR struct inode             *inode = filep->f_inode;
   FAR struct timer_upperhalf_s *upper = inode->i_private;
-  uint8_t                          tmp;
-  int                              ret;
+  uint8_t                       tmp;
+  int                           ret;
 
-  tmrvdbg("crefs: %d\n", upper->crefs);
+  tmrinfo("crefs: %d\n", upper->crefs);
 
   /* Increment the count of references to the device.  If this the first
    * time that the driver has been opened for this device, then initialize
@@ -181,7 +199,7 @@ static int timer_close(FAR struct file *filep)
   FAR struct inode *inode = filep->f_inode;
   FAR struct timer_upperhalf_s *upper = inode->i_private;
 
-  tmrvdbg("crefs: %d\n", upper->crefs);
+  tmrinfo("crefs: %d\n", upper->crefs);
 
   /* Decrement the references to the driver.  If the reference count will
    * decrement to 0, then uninitialize the driver.
@@ -240,7 +258,7 @@ static int timer_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   FAR struct timer_lowerhalf_s *lower = upper->lower;
   int                           ret;
 
-  tmrvdbg("cmd: %d arg: %ld\n", cmd, arg);
+  tmrinfo("cmd: %d arg: %ld\n", cmd, arg);
   DEBUGASSERT(upper && lower);
 
   /* Handle built-in ioctl commands */
@@ -276,7 +294,7 @@ static int timer_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
       {
         /* Stop the timer */
 
-        if (lower->ops->start)
+        if (lower->ops->stop)
           {
             ret = lower->ops->stop(lower);
           }
@@ -340,51 +358,39 @@ static int timer_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
       }
       break;
 
-    /* cmd:         TCIOC_SETHANDLER
-     * Description: Call this handler on timeout
-     * Argument:    A pointer to struct timer_sethandler_s.
+    /* cmd:         TCIOC_NOTIFICATION
+     * Description: Notify application via a signal when the timer expires.
+     * Argument:    signal number
      *
      * NOTE: This ioctl cannot be support in the kernel build mode. In that
      * case direct callbacks from kernel space into user space is forbidden.
      */
 
-#if !defined(CONFIG_BUILD_PROTECTED) && !defined(CONFIG_BUILD_KERNEL)
-    case TCIOC_SETHANDLER:
+    case TCIOC_NOTIFICATION:
       {
-        FAR struct timer_sethandler_s *sethandler;
-
-        /* Don't reset on timer timeout; instead, call this user
-         * provider timeout handler.  NOTE:  Providing handler==NULL will
-         * restore the reset behavior.
-         */
+        FAR struct timer_notify_s *notify =
+          (FAR struct timer_notify_s *)((uintptr_t)arg);
 
-        if (lower->ops->sethandler) /* Optional */
+        if (notify != NULL)
           {
-            sethandler = (FAR struct timer_sethandler_s *)((uintptr_t)arg);
-            if (sethandler)
-              {
-                sethandler->oldhandler =
-                  lower->ops->sethandler(lower, sethandler->newhandler);
-                ret = OK;
-              }
-            else
-              {
-                ret = -EINVAL;
-              }
+            upper->signo = notify->signo;
+            upper->pid   = notify->pid;
+            upper->arg   = notify->arg;
+
+            ret = timer_setcallback((FAR void *)upper, timer_notifier, upper);
           }
         else
           {
-            ret = -ENOSYS;
+            ret = -EINVAL;
           }
       }
       break;
-#endif
 
     /* Any unrecognized IOCTL commands might be platform-specific ioctl commands */
 
     default:
       {
-        tmrvdbg("Forwarding unrecognized cmd: %d arg: %ld\n", cmd, arg);
+        tmrinfo("Forwarding unrecognized cmd: %d arg: %ld\n", cmd, arg);
 
         /* An ioctl commands that are not recognized by the "upper-half"
          * driver are forwarded to the lower half driver through this
@@ -443,7 +449,7 @@ FAR void *timer_register(FAR const char *path,
   int ret;
 
   DEBUGASSERT(path && lower);
-  tmrvdbg("Entry: path=%s\n", path);
+  tmrinfo("Entry: path=%s\n", path);
 
   /* Allocate the upper-half data structure */
 
@@ -451,7 +457,7 @@ FAR void *timer_register(FAR const char *path,
     kmm_zalloc(sizeof(struct timer_upperhalf_s));
   if (!upper)
     {
-      tmrdbg("Upper half allocation failed\n");
+      tmrerr("ERROR: Upper half allocation failed\n");
       goto errout;
     }
 
@@ -466,7 +472,7 @@ FAR void *timer_register(FAR const char *path,
   upper->path = strdup(path);
   if (!upper->path)
     {
-      tmrdbg("Path allocation failed\n");
+      tmrerr("ERROR: Path allocation failed\n");
       goto errout_with_upper;
     }
 
@@ -475,7 +481,7 @@ FAR void *timer_register(FAR const char *path,
   ret = register_driver(path, &g_timerops, 0666, upper);
   if (ret < 0)
     {
-      tmrdbg("register_driver failed: %d\n", ret);
+      tmrerr("ERROR: register_driver failed: %d\n", ret);
       goto errout_with_path;
     }
 
@@ -514,10 +520,10 @@ void timer_unregister(FAR void *handle)
   /* Recover the pointer to the upper-half driver state */
 
   upper = (FAR struct timer_upperhalf_s *)handle;
+  DEBUGASSERT(upper != NULL && upper->lower != NULL);
   lower = upper->lower;
-  DEBUGASSERT(upper && lower);
 
-  tmrvdbg("Unregistering: %s\n", upper->path);
+  tmrinfo("Unregistering: %s\n", upper->path);
 
   /* Disable the timer */
 
@@ -534,4 +540,47 @@ void timer_unregister(FAR void *handle)
   kmm_free(upper);
 }
 
+/****************************************************************************
+ * Name: timer_setcallback
+ *
+ * Description:
+ *   This function can be called to add a callback into driver-related code
+ *   to handle timer expirations.  This is a strictly OS internal interface
+ *   and may NOT be used by appliction code.
+ *
+ * Input parameters:
+ *   handle   - This is the handle that was returned by timer_register()
+ *   callback - The new timer interrupt callback
+ *   arg      - Argument to be provided with the callback
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+int timer_setcallback(FAR void *handle, tccb_t callback, FAR void *arg)
+{
+  FAR struct timer_upperhalf_s *upper;
+  FAR struct timer_lowerhalf_s *lower;
+
+  /* Recover the pointer to the upper-half driver state */
+
+  upper = (FAR struct timer_upperhalf_s *)handle;
+  DEBUGASSERT(upper != NULL && upper->lower != NULL);
+  lower = upper->lower;
+  DEBUGASSERT(lower->ops != NULL);
+
+  /* Check if the lower half driver supports the setcallback method */
+
+  if (lower->ops->setcallback != NULL) /* Optional */
+    {
+      /* Yes.. Defer the hander attachment to the lower half driver */
+
+      lower->ops->setcallback(lower, callback, arg);
+      return OK;
+    }
+
+  return -ENOSYS;
+}
+
 #endif /* CONFIG_TIMER */
diff --git a/drivers/timers/watchdog.c b/drivers/timers/watchdog.c
index e6bef99ac1710c89bad08a695531bf7d962a7d67..e9320a961218c8028954d26c9e1f1f6b2fd7f801 100644
--- a/drivers/timers/watchdog.c
+++ b/drivers/timers/watchdog.c
@@ -56,24 +56,6 @@
 
 #ifdef CONFIG_WATCHDOG
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-/* Debug ********************************************************************/
-/* Non-standard debug that may be enabled just for testing the watchdog driver */
-
-#ifdef CONFIG_DEBUG_WATCHDOG
-#  define wddbg    dbg
-#  define wdvdbg   vdbg
-#  define wdlldbg  lldbg
-#  define wdllvdbg llvdbg
-#else
-#  define wddbg(x...)
-#  define wdvdbg(x...)
-#  define wdlldbg(x...)
-#  define wdllvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Type Definitions
  ****************************************************************************/
@@ -140,7 +122,7 @@ static int wdog_open(FAR struct file *filep)
   uint8_t                          tmp;
   int                              ret;
 
-  wdvdbg("crefs: %d\n", upper->crefs);
+  wdinfo("crefs: %d\n", upper->crefs);
 
   /* Get exclusive access to the device structures */
 
@@ -191,7 +173,7 @@ static int wdog_close(FAR struct file *filep)
   FAR struct watchdog_upperhalf_s *upper = inode->i_private;
   int                              ret;
 
-  wdvdbg("crefs: %d\n", upper->crefs);
+  wdinfo("crefs: %d\n", upper->crefs);
 
   /* Get exclusive access to the device structures */
 
@@ -262,7 +244,7 @@ static int wdog_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   FAR struct watchdog_lowerhalf_s *lower = upper->lower;
   int                              ret;
 
-  wdvdbg("cmd: %d arg: %ld\n", cmd, arg);
+  wdinfo("cmd: %d arg: %ld\n", cmd, arg);
   DEBUGASSERT(upper && lower);
 
   /* Get exclusive access to the device structures */
@@ -418,7 +400,7 @@ static int wdog_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
     default:
       {
-        wdvdbg("Forwarding unrecognized cmd: %d arg: %ld\n", cmd, arg);
+        wdinfo("Forwarding unrecognized cmd: %d arg: %ld\n", cmd, arg);
 
         /* An ioctl commands that are not recognized by the "upper-half"
          * driver are forwarded to the lower half driver through this
@@ -478,7 +460,7 @@ FAR void *watchdog_register(FAR const char *path,
   int ret;
 
   DEBUGASSERT(path && lower);
-  wdvdbg("Entry: path=%s\n", path);
+  wdinfo("Entry: path=%s\n", path);
 
   /* Allocate the upper-half data structure */
 
@@ -486,7 +468,7 @@ FAR void *watchdog_register(FAR const char *path,
     kmm_zalloc(sizeof(struct watchdog_upperhalf_s));
   if (!upper)
     {
-      wddbg("Upper half allocation failed\n");
+      wderr("Upper half allocation failed\n");
       goto errout;
     }
 
@@ -502,7 +484,7 @@ FAR void *watchdog_register(FAR const char *path,
   upper->path = strdup(path);
   if (!upper->path)
     {
-      wddbg("Path allocation failed\n");
+      wderr("Path allocation failed\n");
       goto errout_with_upper;
     }
 
@@ -511,7 +493,7 @@ FAR void *watchdog_register(FAR const char *path,
   ret = register_driver(path, &g_wdogops, 0666, upper);
   if (ret < 0)
     {
-      wddbg("register_driver failed: %d\n", ret);
+      wderr("register_driver failed: %d\n", ret);
       goto errout_with_path;
     }
 
@@ -554,7 +536,7 @@ void watchdog_unregister(FAR void *handle)
   lower = upper->lower;
   DEBUGASSERT(upper && lower);
 
-  wdvdbg("Unregistering: %s\n", upper->path);
+  wdinfo("Unregistering: %s\n", upper->path);
 
   /* Disable the watchdog timer */
 
diff --git a/drivers/usbdev/Kconfig b/drivers/usbdev/Kconfig
index efcf0def0bda113604ca4e156b8e4835d5660f26..f68b2be67f374bee0f244ec86605cc3ac6230699 100644
--- a/drivers/usbdev/Kconfig
+++ b/drivers/usbdev/Kconfig
@@ -91,6 +91,7 @@ config ARCH_USBDEV_STALLQUEUE
 menuconfig USBDEV_TRACE
 	bool "Enable USB tracing for debug"
 	default n
+	select HAVE_USBTRACE
 	---help---
 		Enables USB tracing for debug
 
diff --git a/drivers/usbdev/cdcacm.c b/drivers/usbdev/cdcacm.c
index 6767fd8e521490e7e9e5456158722db7dcb8c19c..15f92dd9aea2380bcfcc4feefe2e82e323cb43fc 100644
--- a/drivers/usbdev/cdcacm.c
+++ b/drivers/usbdev/cdcacm.c
@@ -242,6 +242,12 @@ static const struct uart_ops_s g_uartops =
   NULL,                  /* rxavailable */
 #ifdef CONFIG_SERIAL_IFLOWCONTROL
   cdcuart_rxflowcontrol, /* rxflowcontrol */
+#endif
+#ifdef CONFIG_SERIAL_DMA
+  NULL,                  /* dmasend */
+  NULL,                  /* dmareceive */
+  NULL,                  /* dmarxfree */
+  NULL,                  /* dmatxavail */
 #endif
   NULL,                  /* send */
   cdcuart_txint,         /* txinit */
@@ -339,7 +345,7 @@ static int cdcacm_sndpacket(FAR struct cdcacm_dev_s *priv)
   int len;
   int ret = OK;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (priv == NULL)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -358,7 +364,7 @@ static int cdcacm_sndpacket(FAR struct cdcacm_dev_s *priv)
    * to be sent).
    */
 
-  uvdbg("head=%d tail=%d nwrq=%d empty=%d\n",
+  uinfo("head=%d tail=%d nwrq=%d empty=%d\n",
         priv->serdev.xmit.head, priv->serdev.xmit.tail,
         priv->nwrq, sq_empty(&priv->reqlist));
 
@@ -427,7 +433,7 @@ static inline int cdcacm_recvpacket(FAR struct cdcacm_dev_s *priv,
   uint16_t nexthead;
   uint16_t nbytes = 0;
 
-  uvdbg("head=%d tail=%d nrdq=%d reqlen=%d\n",
+  uinfo("head=%d tail=%d nrdq=%d reqlen=%d\n",
         priv->serdev.recv.head, priv->serdev.recv.tail, priv->nrdq, reqlen);
 
   /* Get the next head index. During the time that RX interrupts are disabled, the
@@ -643,7 +649,7 @@ static int cdcacm_setconfig(FAR struct cdcacm_dev_s *priv, uint8_t config)
   int i;
   int ret = 0;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (priv == NULL)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -817,7 +823,7 @@ static void cdcacm_rdcomplete(FAR struct usbdev_ep_s *ep,
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !ep->priv || !req)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -880,7 +886,7 @@ static void cdcacm_wrcomplete(FAR struct usbdev_ep_s *ep,
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !ep->priv || !req || !req->priv)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -1120,7 +1126,7 @@ static void cdcacm_unbind(FAR struct usbdevclass_driver_s *driver,
 
   usbtrace(TRACE_CLASSUNBIND, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !dev)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -1132,7 +1138,7 @@ static void cdcacm_unbind(FAR struct usbdevclass_driver_s *driver,
 
   priv = ((FAR struct cdcacm_driver_s *)driver)->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_EP0NOTBOUND), 0);
@@ -1162,14 +1168,6 @@ static void cdcacm_unbind(FAR struct usbdevclass_driver_s *driver,
           priv->epintin = NULL;
         }
 
-      /* Free the bulk IN endpoint */
-
-      if (priv->epbulkin)
-        {
-          DEV_FREEEP(dev, priv->epbulkin);
-          priv->epbulkin = NULL;
-        }
-
       /* Free the pre-allocated control request */
 
       if (priv->ctrlreq != NULL)
@@ -1220,6 +1218,14 @@ static void cdcacm_unbind(FAR struct usbdevclass_driver_s *driver,
       DEBUGASSERT(priv->nwrq == 0);
       leave_critical_section(flags);
 
+      /* Free the bulk IN endpoint */
+
+      if (priv->epbulkin)
+        {
+          DEV_FREEEP(dev, priv->epbulkin);
+          priv->epbulkin = NULL;
+        }
+
       /* Clear out all data in the circular buffer */
 
       priv->serdev.xmit.head = 0;
@@ -1248,7 +1254,7 @@ static int cdcacm_setup(FAR struct usbdevclass_driver_s *driver,
   uint16_t len;
   int ret = -EOPNOTSUPP;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !dev || !ctrl)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -1261,7 +1267,7 @@ static int cdcacm_setup(FAR struct usbdevclass_driver_s *driver,
   usbtrace(TRACE_CLASSSETUP, ctrl->req);
   priv = ((FAR struct cdcacm_driver_s *)driver)->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv || !priv->ctrlreq)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_EP0NOTBOUND), 0);
@@ -1276,7 +1282,7 @@ static int cdcacm_setup(FAR struct usbdevclass_driver_s *driver,
   index = GETUINT16(ctrl->index);
   len   = GETUINT16(ctrl->len);
 
-  uvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+  uinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
         ctrl->type, ctrl->req, value, index, len);
 
   if ((ctrl->type & USB_REQ_TYPE_MASK) == USB_REQ_TYPE_STANDARD)
@@ -1621,7 +1627,7 @@ static void cdcacm_disconnect(FAR struct usbdevclass_driver_s *driver,
 
   usbtrace(TRACE_CLASSDISCONNECT, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !dev || !dev->ep0)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -1633,7 +1639,7 @@ static void cdcacm_disconnect(FAR struct usbdevclass_driver_s *driver,
 
   priv = ((FAR struct cdcacm_driver_s *)driver)->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_EP0NOTBOUND), 0);
@@ -1686,7 +1692,7 @@ static void cdcacm_suspend(FAR struct usbdevclass_driver_s *driver,
 
   usbtrace(TRACE_CLASSSUSPEND, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !dev)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -1720,7 +1726,7 @@ static void cdcacm_resume(FAR struct usbdevclass_driver_s *driver,
 
   usbtrace(TRACE_CLASSRESUME, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !dev)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -1763,7 +1769,7 @@ static int cdcuart_setup(FAR struct uart_dev_s *dev)
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev || !dev->priv)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -1804,7 +1810,7 @@ static void cdcuart_shutdown(FAR struct uart_dev_s *dev)
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev || !dev->priv)
     {
        usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -1982,12 +1988,16 @@ static int cdcuart_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
       break;
 #endif
 
+    /* Get the number of bytes that may be read from the RX buffer (without
+     * waiting)
+     */
+
     case FIONREAD:
       {
         int count;
         irqstate_t flags = enter_critical_section();
 
-        /* Determine the number of bytes available in the buffer. */
+        /* Determine the number of bytes available in the RX buffer. */
 
         if (serdev->recv.tail <= serdev->recv.head)
           {
@@ -2005,12 +2015,39 @@ static int cdcuart_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
       }
       break;
 
+    /* Get the number of bytes that have been written to the TX buffer. */
+
     case FIONWRITE:
       {
         int count;
         irqstate_t flags = enter_critical_section();
 
-        /* Determine the number of bytes free in the buffer. */
+        /* Determine the number of bytes waiting in the TX buffer. */
+
+        if (serdev->xmit.tail <= serdev->xmit.head)
+          {
+            count = serdev->xmit.head - serdev->xmit.tail;
+          }
+        else
+          {
+            count = serdev->xmit.size - (serdev->xmit.tail - serdev->xmit.head);
+          }
+
+        leave_critical_section(flags);
+
+        *(int *)arg = count;
+        ret = 0;
+      }
+      break;
+
+    /* Get the number of free bytes in the TX buffer */
+
+    case FIONSPACE:
+      {
+        int count;
+        irqstate_t flags = enter_critical_section();
+
+        /* Determine the number of bytes free in the TX buffer */
 
         if (serdev->xmit.head < serdev->xmit.tail)
           {
@@ -2063,7 +2100,7 @@ static void cdcuart_rxint(FAR struct uart_dev_s *dev, bool enable)
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev || !dev->priv)
     {
        usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -2192,7 +2229,7 @@ static void cdcuart_txint(FAR struct uart_dev_s *dev, bool enable)
 
   /* Sanity checks */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev || !dev->priv)
     {
        usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -2208,7 +2245,7 @@ static void cdcuart_txint(FAR struct uart_dev_s *dev, bool enable)
    * send the next packet now.
    */
 
-  uvdbg("enable=%d head=%d tail=%d\n",
+  uinfo("enable=%d head=%d tail=%d\n",
         enable, priv->serdev.xmit.head, priv->serdev.xmit.tail);
 
   if (enable && priv->serdev.xmit.head != priv->serdev.xmit.tail)
@@ -2235,7 +2272,7 @@ static bool cdcuart_txempty(FAR struct uart_dev_s *dev)
 
   usbtrace(CDCACM_CLASSAPI_TXEMPTY, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
diff --git a/drivers/usbdev/composite.c b/drivers/usbdev/composite.c
index b0f0c95c9c915dfae01065d660774252425c3ce4..54bc3c827e3f2b98ac3feee17ae9cb9bef6e1b68 100644
--- a/drivers/usbdev/composite.c
+++ b/drivers/usbdev/composite.c
@@ -339,7 +339,7 @@ static void composite_unbind(FAR struct usbdevclass_driver_s *driver,
 
   usbtrace(TRACE_CLASSUNBIND, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !dev || !dev->ep0)
     {
       usbtrace(TRACE_CLSERROR(USBCOMPOSITE_TRACEERR_INVALIDARG), 0);
@@ -351,7 +351,7 @@ static void composite_unbind(FAR struct usbdevclass_driver_s *driver,
 
   priv = ((FAR struct composite_driver_s *)driver)->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv)
     {
       usbtrace(TRACE_CLSERROR(USBCOMPOSITE_TRACEERR_EP0NOTBOUND), 0);
@@ -403,7 +403,7 @@ static int composite_setup(FAR struct usbdevclass_driver_s *driver,
   bool dispatched = false;
   int ret = -EOPNOTSUPP;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !dev || !dev->ep0 || !ctrl)
     {
       usbtrace(TRACE_CLSERROR(USBCOMPOSITE_TRACEERR_SETUPINVALIDARGS), 0);
@@ -416,7 +416,7 @@ static int composite_setup(FAR struct usbdevclass_driver_s *driver,
   usbtrace(TRACE_CLASSSETUP, ctrl->req);
   priv = ((FAR struct composite_driver_s *)driver)->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv)
     {
       usbtrace(TRACE_CLSERROR(USBCOMPOSITE_TRACEERR_EP0NOTBOUND2), 0);
@@ -431,7 +431,7 @@ static int composite_setup(FAR struct usbdevclass_driver_s *driver,
   index     = GETUINT16(ctrl->index);
   len       = GETUINT16(ctrl->len);
 
-  uvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+  uinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
         ctrl->type, ctrl->req, value, index, len);
   UNUSED(index);
 
@@ -638,7 +638,7 @@ static void composite_disconnect(FAR struct usbdevclass_driver_s *driver,
 
   usbtrace(TRACE_CLASSDISCONNECT, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !dev)
     {
       usbtrace(TRACE_CLSERROR(USBCOMPOSITE_TRACEERR_INVALIDARG), 0);
@@ -650,7 +650,7 @@ static void composite_disconnect(FAR struct usbdevclass_driver_s *driver,
 
   priv = ((FAR struct composite_driver_s *)driver)->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv)
     {
       usbtrace(TRACE_CLSERROR(USBCOMPOSITE_TRACEERR_EP0NOTBOUND), 0);
@@ -691,7 +691,7 @@ static void composite_suspend(FAR struct usbdevclass_driver_s *driver,
 
   usbtrace(TRACE_CLASSSUSPEND, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev)
     {
       usbtrace(TRACE_CLSERROR(USBCOMPOSITE_TRACEERR_INVALIDARG), 0);
@@ -703,7 +703,7 @@ static void composite_suspend(FAR struct usbdevclass_driver_s *driver,
 
   priv = ((FAR struct composite_driver_s *)driver)->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv)
     {
       usbtrace(TRACE_CLSERROR(USBCOMPOSITE_TRACEERR_EP0NOTBOUND), 0);
@@ -733,7 +733,7 @@ static void composite_resume(FAR struct usbdevclass_driver_s *driver,
   FAR struct composite_dev_s *priv = NULL;
   irqstate_t flags;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev)
     {
       usbtrace(TRACE_CLSERROR(USBCOMPOSITE_TRACEERR_INVALIDARG), 0);
@@ -745,7 +745,7 @@ static void composite_resume(FAR struct usbdevclass_driver_s *driver,
 
   priv = ((FAR struct composite_driver_s *)driver)->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv)
     {
       usbtrace(TRACE_CLSERROR(USBCOMPOSITE_TRACEERR_EP0NOTBOUND), 0);
diff --git a/drivers/usbdev/pl2303.c b/drivers/usbdev/pl2303.c
index 92285c01d155d94f677cd2df59259d79d2a1e095..16119057903e8d365e2361189691b30610177f43 100644
--- a/drivers/usbdev/pl2303.c
+++ b/drivers/usbdev/pl2303.c
@@ -598,7 +598,7 @@ static int usbclass_sndpacket(FAR struct pl2303_dev_s *priv)
   int len;
   int ret = OK;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (priv == NULL)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -617,7 +617,7 @@ static int usbclass_sndpacket(FAR struct pl2303_dev_s *priv)
    * to be sent).
    */
 
-  uvdbg("head=%d tail=%d nwrq=%d empty=%d\n",
+  uinfo("head=%d tail=%d nwrq=%d empty=%d\n",
         priv->serdev.xmit.head, priv->serdev.xmit.tail,
         priv->nwrq, sq_empty(&priv->reqlist));
 
@@ -1047,7 +1047,7 @@ static int usbclass_setconfig(FAR struct pl2303_dev_s *priv, uint8_t config)
   int i;
   int ret = 0;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (priv == NULL)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -1203,7 +1203,7 @@ static void usbclass_rdcomplete(FAR struct usbdev_ep_s *ep,
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !ep->priv || !req)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -1265,7 +1265,7 @@ static void usbclass_wrcomplete(FAR struct usbdev_ep_s *ep,
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !ep->priv || !req || !req->priv)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -1489,7 +1489,7 @@ static void usbclass_unbind(FAR struct usbdevclass_driver_s *driver,
 
   usbtrace(TRACE_CLASSUNBIND, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !dev || !dev->ep0)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -1501,7 +1501,7 @@ static void usbclass_unbind(FAR struct usbdevclass_driver_s *driver,
 
   priv = ((FAR struct pl2303_driver_s *)driver)->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_EP0NOTBOUND), 0);
@@ -1616,7 +1616,7 @@ static int usbclass_setup(FAR struct usbdevclass_driver_s *driver,
   uint16_t len;
   int ret = -EOPNOTSUPP;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !dev || !dev->ep0 || !ctrl)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -1629,7 +1629,7 @@ static int usbclass_setup(FAR struct usbdevclass_driver_s *driver,
   usbtrace(TRACE_CLASSSETUP, ctrl->req);
   priv = ((FAR struct pl2303_driver_s *)driver)->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv || !priv->ctrlreq)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_EP0NOTBOUND), 0);
@@ -1644,7 +1644,7 @@ static int usbclass_setup(FAR struct usbdevclass_driver_s *driver,
   index = GETUINT16(ctrl->index);
   len   = GETUINT16(ctrl->len);
 
-  uvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+  uinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
         ctrl->type, ctrl->req, value, index, len);
 
   switch (ctrl->type & USB_REQ_TYPE_MASK)
@@ -1877,7 +1877,7 @@ static void usbclass_disconnect(FAR struct usbdevclass_driver_s *driver,
 
   usbtrace(TRACE_CLASSDISCONNECT, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !dev || !dev->ep0)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -1889,7 +1889,7 @@ static void usbclass_disconnect(FAR struct usbdevclass_driver_s *driver,
 
   priv = ((FAR struct pl2303_driver_s *)driver)->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_EP0NOTBOUND), 0);
@@ -1940,7 +1940,7 @@ static void usbclass_suspend(FAR struct usbdevclass_driver_s *driver,
 
   usbtrace(TRACE_CLASSSUSPEND, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !dev)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -1974,7 +1974,7 @@ static void usbclass_resume(FAR struct usbdevclass_driver_s *driver,
 
   usbtrace(TRACE_CLASSRESUME, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !dev)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -2017,7 +2017,7 @@ static int usbser_setup(FAR struct uart_dev_s *dev)
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev || !dev->priv)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -2058,7 +2058,7 @@ static void usbser_shutdown(FAR struct uart_dev_s *dev)
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev || !dev->priv)
     {
        usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -2120,7 +2120,7 @@ static void usbser_rxint(FAR struct uart_dev_s *dev, bool enable)
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev || !dev->priv)
     {
        usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -2211,7 +2211,7 @@ static void usbser_txint(FAR struct uart_dev_s *dev, bool enable)
 
   /* Sanity checks */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev || !dev->priv)
     {
        usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
@@ -2227,7 +2227,7 @@ static void usbser_txint(FAR struct uart_dev_s *dev, bool enable)
    * send the next packet now.
    */
 
-  uvdbg("enable=%d head=%d tail=%d\n",
+  uinfo("enable=%d head=%d tail=%d\n",
         enable, priv->serdev.xmit.head, priv->serdev.xmit.tail);
 
   if (enable && priv->serdev.xmit.head != priv->serdev.xmit.tail)
@@ -2254,7 +2254,7 @@ static bool usbser_txempty(FAR struct uart_dev_s *dev)
 
   usbtrace(PL2303_CLASSAPI_TXEMPTY, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv)
     {
       usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
diff --git a/drivers/usbdev/usbdev_strings.c b/drivers/usbdev/usbdev_strings.c
index 9dc9afdc407fe99f1e53af5606532082e47ad687..d8c35189f0acafd372b3b3fb6998e0b78d6e56e9 100644
--- a/drivers/usbdev/usbdev_strings.c
+++ b/drivers/usbdev/usbdev_strings.c
@@ -177,7 +177,7 @@ const struct trace_msg_t g_usb_trace_strings_clserror[] =
   TRACE_STR(USBMSC_TRACEERR_CMDREADREADFAIL),
   TRACE_STR(USBMSC_TRACEERR_CMDREADSUBMIT),
   TRACE_STR(USBMSC_TRACEERR_CMDREADWRRQEMPTY),
-  TRACE_STR(USBMSC_TRACEERR_CMDSTATUSRDREQLISTEMPTY),
+  TRACE_STR(USBMSC_TRACEERR_CMDSTATUSWRREQLISTEMPTY),
   TRACE_STR(USBMSC_TRACEERR_CMDUNEVIOLATION),
   TRACE_STR(USBMSC_TRACEERR_CMDWRITERDSUBMIT),
   TRACE_STR(USBMSC_TRACEERR_CMDWRITERDRQEMPTY),
diff --git a/drivers/usbdev/usbdev_trace.c b/drivers/usbdev/usbdev_trace.c
index be19863b1ba80c98ac7d73ba16e65c006d3728a6..857cd3e02948d3bd266c70bb7345e48118b72bae 100644
--- a/drivers/usbdev/usbdev_trace.c
+++ b/drivers/usbdev/usbdev_trace.c
@@ -81,7 +81,7 @@ static uint16_t g_head = 0;
 static uint16_t g_tail = 0;
 #endif
 
-#if defined(CONFIG_USBDEV_TRACE) || (defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_USB))
+#if defined(CONFIG_USBDEV_TRACE) || (defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_USB))
 static usbtrace_idset_t g_maskedidset = CONFIG_USBDEV_TRACE_INITIALIDSET;
 #endif
 
@@ -94,16 +94,16 @@ static usbtrace_idset_t g_maskedidset = CONFIG_USBDEV_TRACE_INITIALIDSET;
  ****************************************************************************/
 
 #if !defined(CONFIG_USBDEV_TRACE) && \
-    (defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_USB))
+    (defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_USB))
 static int usbtrace_syslog(const char *fmt, ...)
 {
   va_list ap;
   int ret;
 
-  /* Let lowvsyslog do the real work */
+  /* Let vsyslog do the real work */
 
   va_start(ap, fmt);
-  ret = lowvsyslog(LOG_INFO, fmt, ap);
+  ret = vsyslog(LOG_INFO, fmt, ap);
   va_end(ap);
   return ret;
 }
@@ -132,7 +132,7 @@ static int usbtrace_syslog(const char *fmt, ...)
  ****************************************************************************/
 
 #if defined(CONFIG_USBDEV_TRACE) || \
-   (defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_USB))
+   (defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_USB))
 usbtrace_idset_t usbtrace_enable(usbtrace_idset_t idset)
 {
   irqstate_t flags;
@@ -146,7 +146,7 @@ usbtrace_idset_t usbtrace_enable(usbtrace_idset_t idset)
   leave_critical_section(flags);
   return ret;
 }
-#endif /* CONFIG_USBDEV_TRACE || CONFIG_DEBUG && CONFIG_DEBUG_USB */
+#endif /* CONFIG_USBDEV_TRACE || CONFIG_DEBUG_FEATURES && CONFIG_DEBUG_USB */
 
 /****************************************************************************
  * Name: usbtrace
@@ -159,7 +159,7 @@ usbtrace_idset_t usbtrace_enable(usbtrace_idset_t idset)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_USBDEV_TRACE) || (defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_USB))
+#if defined(CONFIG_USBDEV_TRACE) || (defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_USB))
 void usbtrace(uint16_t event, uint16_t value)
 {
   irqstate_t flags;
@@ -190,7 +190,7 @@ void usbtrace(uint16_t event, uint16_t value)
             }
         }
 #else
-      /* Just print the data using lowsyslog */
+      /* Just print the data using syslog */
 
       usbtrace_trprintf(usbtrace_syslog, event, value);
 #endif
@@ -198,7 +198,7 @@ void usbtrace(uint16_t event, uint16_t value)
 
   leave_critical_section(flags);
 }
-#endif /* CONFIG_USBDEV_TRACE || CONFIG_DEBUG && CONFIG_DEBUG_USB */
+#endif /* CONFIG_USBDEV_TRACE || CONFIG_DEBUG_FEATURES && CONFIG_DEBUG_USB */
 
 /****************************************************************************
  * Name: usbtrace_enumerate
diff --git a/drivers/usbdev/usbmsc.c b/drivers/usbdev/usbmsc.c
index 9e646c9509231a7fc797ef943329d9bbe89a1ba1..b3eb1d1c9a4c183da5d68b80578bfb63f6b46097 100644
--- a/drivers/usbdev/usbmsc.c
+++ b/drivers/usbdev/usbmsc.c
@@ -75,6 +75,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -404,7 +405,7 @@ static void usbmsc_unbind(FAR struct usbdevclass_driver_s *driver,
 
   usbtrace(TRACE_CLASSUNBIND, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !dev || !dev->ep0)
     {
       usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_UNBINDINVALIDARGS), 0);
@@ -416,7 +417,7 @@ static void usbmsc_unbind(FAR struct usbdevclass_driver_s *driver,
 
   priv = ((FAR struct usbmsc_driver_s *)driver)->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv)
     {
       usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_EP0NOTBOUND1), 0);
@@ -521,7 +522,7 @@ static int usbmsc_setup(FAR struct usbdevclass_driver_s *driver,
   uint16_t len;
   int ret = -EOPNOTSUPP;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !dev || !dev->ep0 || !ctrl)
     {
       usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_SETUPINVALIDARGS), 0);
@@ -534,7 +535,7 @@ static int usbmsc_setup(FAR struct usbdevclass_driver_s *driver,
   usbtrace(TRACE_CLASSSETUP, ctrl->req);
   priv = ((FAR struct usbmsc_driver_s *)driver)->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv || !priv->ctrlreq)
     {
       usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_EP0NOTBOUND2), 0);
@@ -549,7 +550,7 @@ static int usbmsc_setup(FAR struct usbdevclass_driver_s *driver,
   index = GETUINT16(ctrl->index);
   len   = GETUINT16(ctrl->len);
 
-  uvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+  uinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
         ctrl->type, ctrl->req, value, index, len);
 
   if ((ctrl->type & USB_REQ_TYPE_MASK) == USB_REQ_TYPE_STANDARD)
@@ -847,7 +848,7 @@ static void usbmsc_disconnect(FAR struct usbdevclass_driver_s *driver,
 
   usbtrace(TRACE_CLASSDISCONNECT, 0);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!driver || !dev || !dev->ep0)
     {
       usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_DISCONNECTINVALIDARGS), 0);
@@ -859,7 +860,7 @@ static void usbmsc_disconnect(FAR struct usbdevclass_driver_s *driver,
 
   priv = ((FAR struct usbmsc_driver_s *)driver)->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv)
     {
       usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_EP0NOTBOUND3), 0);
@@ -935,7 +936,7 @@ int usbmsc_setconfig(FAR struct usbmsc_dev_s *priv, uint8_t config)
   int i;
   int ret = 0;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (priv == NULL)
     {
       usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_SETCONFIGINVALIDARGS), 0);
@@ -1074,7 +1075,7 @@ void usbmsc_wrcomplete(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req)
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !ep->priv || !req || !req->priv)
     {
       usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_WRCOMPLETEINVALIDARGS), 0);
@@ -1135,7 +1136,7 @@ void usbmsc_rdcomplete(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req)
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ep || !ep->priv || !req || !req->priv)
     {
       usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_RDCOMPLETEINVALIDARGS), 0);
@@ -1227,7 +1228,7 @@ void usbmsc_deferredresponse(FAR struct usbmsc_dev_s *priv, bool failed)
   FAR struct usbdev_req_s *ctrlreq;
   int ret;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv || !priv->usbdev || !priv->ctrlreq)
     {
       usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_DEFERREDRESPINVALIDARGS), 0);
@@ -1317,7 +1318,7 @@ int usbmsc_configure(unsigned int nluns, void **handle)
   FAR struct usbmsc_driver_s *drvr;
   int ret;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (nluns > 15)
     {
       usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_TOOMANYLUNS), 0);
@@ -1339,11 +1340,20 @@ int usbmsc_configure(unsigned int nluns, void **handle)
   priv = &alloc->dev;
   memset(priv, 0, sizeof(struct usbmsc_dev_s));
 
+  /* Initialize semaphores */
+
   sem_init(&priv->thsynch, 0, 0);
   sem_init(&priv->thlock, 0, 1);
   sem_init(&priv->thwaitsem, 0, 0);
-  sq_init(&priv->wrreqlist);
 
+  /* The thsynch and thwaitsem semaphores are used for signaling and, hence,
+   * should not have priority inheritance enabled.
+   */
+
+  sem_setprotocol(&priv->thsynch, SEM_PRIO_NONE);
+  sem_setprotocol(&priv->thwaitsem, SEM_PRIO_NONE);
+
+  sq_init(&priv->wrreqlist);
   priv->nluns = nluns;
 
   /* Allocate the LUN table */
@@ -1411,7 +1421,7 @@ int usbmsc_bindlun(FAR void *handle, FAR const char *drvrpath,
   struct geometry geo;
   int ret;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!alloc || !drvrpath || startsector < 0)
     {
       usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_BINLUNINVALIDARGS1), 0);
@@ -1421,7 +1431,7 @@ int usbmsc_bindlun(FAR void *handle, FAR const char *drvrpath,
 
   priv = &alloc->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv->luntab)
     {
       usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_INTERNALCONFUSION1), 0);
@@ -1437,7 +1447,7 @@ int usbmsc_bindlun(FAR void *handle, FAR const char *drvrpath,
 
   lun = &priv->luntab[lunno];
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (lun->inode != NULL)
     {
       usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_LUNALREADYBOUND), 0);
@@ -1519,6 +1529,7 @@ int usbmsc_bindlun(FAR void *handle, FAR const char *drvrpath,
   lun->startsector = startsector;
   lun->nsectors    = nsectors;
   lun->sectorsize  = geo.geo_sectorsize;
+  lun->readonly    = readonly;
 
   /* If the driver does not support the write method, then this is read-only */
 
@@ -1552,7 +1563,7 @@ int usbmsc_unbindlun(FAR void *handle, unsigned int lunno)
   FAR struct usbmsc_lun_s *lun;
   int ret;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!alloc)
     {
       usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_UNBINDLUNINVALIDARGS1), 0);
@@ -1562,7 +1573,7 @@ int usbmsc_unbindlun(FAR void *handle, unsigned int lunno)
 
   priv = &alloc->dev;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!priv->luntab)
     {
       usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_INTERNALCONFUSION2), 0);
@@ -1579,7 +1590,7 @@ int usbmsc_unbindlun(FAR void *handle, unsigned int lunno)
   lun = &priv->luntab[lunno];
   usbmsc_scsi_lock(priv);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (lun->inode == NULL)
     {
       usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_LUNNOTBOUND), 0);
@@ -1626,7 +1637,7 @@ int usbmsc_exportluns(FAR void *handle)
   irqstate_t flags;
   int ret = OK;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!alloc)
     {
       usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_EXPORTLUNSINVALIDARGS), 0);
@@ -1652,7 +1663,7 @@ int usbmsc_exportluns(FAR void *handle)
 
   g_usbmsc_handoff = priv;
 
-  uvdbg("Starting SCSI worker thread\n");
+  uinfo("Starting SCSI worker thread\n");
   priv->thpid = kernel_thread("scsid", CONFIG_USBMSC_SCSI_PRIO,
                               CONFIG_USBMSC_SCSI_STACKSIZE,
                               usbmsc_scsi_main, NULL);
@@ -1664,7 +1675,7 @@ int usbmsc_exportluns(FAR void *handle)
 
   /* Wait for the worker thread to run and initialize */
 
-  uvdbg("Waiting for the SCSI worker thread\n");
+  uinfo("Waiting for the SCSI worker thread\n");
   usbmsc_sync_wait(priv);
   DEBUGASSERT(g_usbmsc_handoff == NULL);
 
@@ -1681,7 +1692,7 @@ int usbmsc_exportluns(FAR void *handle)
 
   /* Signal to start the thread */
 
-  uvdbg("Signalling for the SCSI worker thread\n");
+  uinfo("Signalling for the SCSI worker thread\n");
   flags = enter_critical_section();
   priv->theventset |= USBMSC_EVENT_READY;
   usbmsc_scsi_signal(priv);
@@ -1756,7 +1767,7 @@ void usbmsc_uninitialize(FAR void *handle)
 #endif
   int i;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!handle)
     {
       usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_UNINITIALIZEINVALIDARGS), 0);
diff --git a/drivers/usbdev/usbmsc_scsi.c b/drivers/usbdev/usbmsc_scsi.c
index a8b0f4004feb29aaeaa5cb5fbf09b2b02afa7253..30e06be071864a37a3a19b2043f9ea2db3de4b6c 100644
--- a/drivers/usbdev/usbmsc_scsi.c
+++ b/drivers/usbdev/usbmsc_scsi.c
@@ -115,7 +115,7 @@
 
 /* Debug ********************************************************************/
 
-#if defined(CONFIG_DEBUG_VERBOSE) && defined (CONFIG_DEBUG_USB)
+#if defined(CONFIG_DEBUG_INFO) && defined (CONFIG_DEBUG_USB)
 static void     usbmsc_dumpdata(const char *msg, const uint8_t *buf,
                   int buflen);
 #else
@@ -195,18 +195,18 @@ static int    usbmsc_cmdstatusstate(FAR struct usbmsc_dev_s *priv);
  * Name: usbmsc_dumpdata
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_VERBOSE) && defined (CONFIG_DEBUG_USB)
+#if defined(CONFIG_DEBUG_INFO) && defined (CONFIG_DEBUG_USB)
 static void usbmsc_dumpdata(const char *msg, const uint8_t *buf, int buflen)
 {
   int i;
 
-  lowsyslog(LOG_DEBUG, "%s:", msg);
+  syslog(LOG_DEBUG, "%s:", msg);
   for (i = 0; i < buflen; i++)
     {
-      lowsyslog(LOG_DEBUG, " %02x", buf[i]);
+      syslog(LOG_DEBUG, " %02x", buf[i]);
     }
 
-  lowsyslog(LOG_DEBUG, "\n");
+  syslog(LOG_DEBUG, "\n");
 }
 #endif
 
@@ -827,7 +827,7 @@ static int inline usbmsc_cmdmodesense6(FAR struct usbmsc_dev_s *priv,
             {
                /* Store the mode data length and return the total message size */
 
-               mph->mdlen      = mdlen - 1;
+               mph->mdlen      = mdlen + SCSIRESP_MODEPARAMETERHDR6_SIZEOF - 1;
                priv->nreqbytes = mdlen + SCSIRESP_MODEPARAMETERHDR6_SIZEOF;
             }
         }
@@ -2263,7 +2263,9 @@ static int usbmsc_cmdwritestate(FAR struct usbmsc_dev_s *priv)
        * data to be written.
        */
 
+      irqstate_t flags = enter_critical_section();
       privreq = (FAR struct usbmsc_req_s *)sq_remfirst(&priv->rdreqlist);
+      leave_critical_section(flags);
 
       /* If there no request data available, then just return an error.
        * This will cause us to remain in the CMDWRITE state.  When a filled request is
@@ -2537,7 +2539,7 @@ static int usbmsc_cmdstatusstate(FAR struct usbmsc_dev_s *priv)
 
   if (!privreq)
     {
-      usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_CMDSTATUSRDREQLISTEMPTY), 0);
+      usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_CMDSTATUSWRREQLISTEMPTY), 0);
       return -ENOMEM;
     }
 
@@ -2622,7 +2624,7 @@ int usbmsc_scsi_main(int argc, char *argv[])
   uint16_t eventset;
   int ret;
 
-  uvdbg("Started\n");
+  uinfo("Started\n");
 
   /* Get the SCSI state data handed off from the initialization logic */
 
@@ -2636,16 +2638,16 @@ int usbmsc_scsi_main(int argc, char *argv[])
    * wait here until we are told to begin.  Start in the NOTINITIALIZED state
    */
 
-  uvdbg("Waiting to be signalled\n");
+  uinfo("Waiting to be signalled\n");
   usbmsc_scsi_lock(priv);
   priv->thstate = USBMSC_STATE_STARTED;
-  while ((priv->theventset & USBMSC_EVENT_READY) != 0 &&
-         (priv->theventset & USBMSC_EVENT_TERMINATEREQUEST) != 0)
+  while ((priv->theventset & USBMSC_EVENT_READY) == 0 &&
+         (priv->theventset & USBMSC_EVENT_TERMINATEREQUEST) == 0)
     {
       usbmsc_scsi_wait(priv);
     }
 
-  uvdbg("Running\n");
+  uinfo("Running\n");
 
   /* Transition to the INITIALIZED/IDLE state */
 
diff --git a/drivers/usbhost/Kconfig b/drivers/usbhost/Kconfig
index 4e9c024c615368ccdb14ba0f9d963e6b8f3e2579..334e393f51c586d6c37710097090204fd1e439e8 100644
--- a/drivers/usbhost/Kconfig
+++ b/drivers/usbhost/Kconfig
@@ -77,6 +77,22 @@ config USBHOST_HUB_POLLMSEC
 
 endif # USBHOST_HUB
 
+config USBHOST_COMPOSITE
+	bool "Composite device support"
+	default n
+	---help---
+		Build in USB host support for connected composite devices
+
+config USBHOST_COMPOSITE_STRICT
+	bool "Strict composite membership"
+	default n
+	depends on USBHOST_COMPOSITE
+	---help---
+		If selected, then the composite device will not be enumerated unless
+		every member class in the composite is supported.  If not selected
+		then, for example, you could use the CDC/ACM interface of the device
+		with no support for the other interfaces.
+
 config USBHOST_MSC
 	bool "Mass Storage Class Support"
 	default n
@@ -508,6 +524,7 @@ endif # USBHOST_RTL8187
 config USBHOST_TRACE
 	bool "Enable USB HCD tracing for debug"
 	default n
+	select HAVE_USBTRACE
 	---help---
 		Enables USB tracing for debug.  Only supported for the HCD and,
 		further, no supported by all HCD implementations.
diff --git a/drivers/usbhost/Make.defs b/drivers/usbhost/Make.defs
index 0391dd33390fd42805b9792d5ca87add7bec7d21..fd28be8766fca6759fdd9fb0774e40c709b5dbd9 100644
--- a/drivers/usbhost/Make.defs
+++ b/drivers/usbhost/Make.defs
@@ -46,6 +46,10 @@ ifeq ($(CONFIG_USBHOST_HUB),y)
 CSRCS += usbhost_hub.c
 endif
 
+ifeq ($(CONFIG_USBHOST_COMPOSITE),y)
+CSRCS += usbhost_composite.c
+endif
+
 ifeq ($(CONFIG_USBHOST_MSC),y)
 CSRCS += usbhost_storage.c
 endif
diff --git a/drivers/usbhost/usbhost_cdcacm.c b/drivers/usbhost/usbhost_cdcacm.c
index 0c35d61bf49c71433186a1f7017573979ad303a0..4b0a9e5c4203baf91d0598c0cfe5506e09ba4455 100644
--- a/drivers/usbhost/usbhost_cdcacm.c
+++ b/drivers/usbhost/usbhost_cdcacm.c
@@ -392,13 +392,22 @@ static bool usbhost_txempty(FAR struct uart_dev_s *uartdev);
  * device.
  */
 
-static const const struct usbhost_id_s g_id =
+static const const struct usbhost_id_s g_id[2] =
 {
-  USB_CLASS_CDC,          /* base     */
-  CDC_SUBCLASS_NONE,      /* subclass */
-  CDC_PROTO_NONE,         /* proto    */
-  0,                      /* vid      */
-  0                       /* pid      */
+  {
+    USB_CLASS_CDC,          /* base     */
+    CDC_SUBCLASS_NONE,      /* subclass */
+    CDC_PROTO_NONE,         /* proto    */
+    0,                      /* vid      */
+    0                       /* pid      */
+  },
+  {
+    USB_CLASS_CDC,          /* base     */
+    CDC_SUBCLASS_ACM,       /* subclass */
+    CDC_PROTO_ATM,          /* proto    */
+    0,                      /* vid      */
+    0                       /* pid      */
+  }
 };
 
 /* This is the USB host CDC/ACM class's registry entry */
@@ -407,8 +416,8 @@ static struct usbhost_registry_s g_cdcacm =
 {
   NULL,                   /* flink    */
   usbhost_create,         /* create   */
-  1,                      /* nids     */
-  &g_id                   /* id[]     */
+  2,                      /* nids     */
+  &g_id[0]                /* id[]     */
 };
 
 /* Serial driver lower half interface */
@@ -512,7 +521,7 @@ static FAR struct usbhost_cdcacm_s *usbhost_allocclass(void)
     }
 
   leave_critical_section(flags);
-  uvdbg("Allocated: %p\n", entry);
+  uinfo("Allocated: %p\n", entry);
   return (FAR struct usbhost_cdcacm_s *)entry;
 }
 #else
@@ -526,7 +535,7 @@ static FAR struct usbhost_cdcacm_s *usbhost_allocclass(void)
 
   DEBUGASSERT(!up_interrupt_context());
   priv = (FAR struct usbhost_cdcacm_s *)kmm_malloc(sizeof(struct usbhost_cdcacm_s));
-  uvdbg("Allocated: %p\n", priv);
+  uinfo("Allocated: %p\n", priv);
   return priv;
 }
 #endif
@@ -552,7 +561,7 @@ static void usbhost_freeclass(FAR struct usbhost_cdcacm_s *usbclass)
   irqstate_t flags;
   DEBUGASSERT(entry != NULL);
 
-  uvdbg("Freeing: %p\n", entry);
+  uinfo("Freeing: %p\n", entry);
 
   /* Just put the pre-allocated class structure back on the freelist */
 
@@ -570,7 +579,7 @@ static void usbhost_freeclass(FAR struct usbhost_cdcacm_s *usbclass)
    * from an interrupt handler.
    */
 
-  uvdbg("Freeing: %p\n", usbclass);
+  uinfo("Freeing: %p\n", usbclass);
   sched_kfree(usbclass);
 }
 #endif
@@ -687,7 +696,7 @@ static int usbhost_linecoding_send(FAR struct usbhost_cdcacm_s *priv)
   ret = DRVR_CTRLOUT(hport->drvr, hport->ep0, ctrlreq, priv->linecode);
   if (ret < 0)
     {
-      udbg("ERROR: DRVR_CTRLOUT failed: %d\n", ret);
+      uerr("ERROR: DRVR_CTRLOUT failed: %d\n", ret);
     }
 
   return ret;
@@ -743,7 +752,7 @@ static void usbhost_notification_work(FAR void *arg)
           index = usbhost_getle16(inmsg->index);
           len   = usbhost_getle16(inmsg->len);
 
-          uvdbg("type: %02x notification: %02x value: %04x index: %04x len: %04x\n",
+          uinfo("type: %02x notification: %02x value: %04x index: %04x len: %04x\n",
                  inmsg->type, inmsg->notification, value, index, len);
 
           /* We care only about the SerialState notification */
@@ -764,7 +773,7 @@ static void usbhost_notification_work(FAR void *arg)
               priv->dcd = ((state & CDC_UART_RXCARRIER) != 0);
               priv->dsr = ((state & CDC_UART_TXCARRIER) != 0);
 
-              uvdbg("ACM_SERIAL_STATE: DCD=%d DSR=%d\n",
+              uinfo("ACM_SERIAL_STATE: DCD=%d DSR=%d\n",
                     priv->dcd, priv->dsr);
             }
         }
@@ -777,7 +786,7 @@ static void usbhost_notification_work(FAR void *arg)
                         priv);
       if (ret < 0)
         {
-          udbg("ERROR: DRVR_ASYNCH failed: %d\n", ret);
+          uerr("ERROR: DRVR_ASYNCH failed: %d\n", ret);
         }
     }
 }
@@ -833,11 +842,11 @@ static void usbhost_notification_callback(FAR void *arg, ssize_t nbytes)
            * FIX:  Don't output the message is the result is -EAGAIN.
            */
 
-#if defined(CONFIG_DEBUG_USB) && !defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_USB) && !defined(CONFIG_DEBUG_INFO)
           if (nbytes != -EAGAIN)
 #endif
             {
-              udbg("ERROR: Transfer failed: %d\n", nbytes);
+              uerr("ERROR: Transfer failed: %d\n", nbytes);
             }
 
           /* We don't know the nature of the failure, but we need to do all
@@ -932,7 +941,7 @@ static void usbhost_txdata_work(FAR void *arg)
           /* Increment counters and indices */
 
           txndx++;
-          if (++txtail > txbuf->size)
+          if (++txtail >= txbuf->size)
             {
              txtail = 0;
             }
@@ -961,7 +970,7 @@ static void usbhost_txdata_work(FAR void *arg)
            * the device is disconnected).
            */
 
-          udbg("ERROR: DRVR_TRANSFER for packet failed: %d\n", (int)nwritten);
+          uerr("ERROR: DRVR_TRANSFER for packet failed: %d\n", (int)nwritten);
           break;
         }
     }
@@ -986,7 +995,7 @@ static void usbhost_txdata_work(FAR void *arg)
            * NAK'ed our packet.
            */
 
-          udbg("ERROR: DRVR_TRANSFER for ZLP failed: %d\n", (int)nwritten);
+          uerr("ERROR: DRVR_TRANSFER for ZLP failed: %d\n", (int)nwritten);
         }
     }
 
@@ -1099,7 +1108,7 @@ static void usbhost_rxdata_work(FAR void *arg)
                * device was not disconnected.
                */
 
-              udbg("ERROR: DRVR_TRANSFER for packet failed: %d\n", (int)nread);
+              uerr("ERROR: DRVR_TRANSFER for packet failed: %d\n", (int)nread);
               break;
             }
 
@@ -1109,7 +1118,6 @@ static void usbhost_rxdata_work(FAR void *arg)
            * no interest to us.
            */
 
-          DEBUGASSERT(nread <= priv->pktsize);
           priv->nrxbytes = (uint16_t)nread;
           rxndx          = 0;
 
@@ -1224,7 +1232,7 @@ static void usbhost_destroy(FAR void *arg)
   DEBUGASSERT(priv != NULL && priv->usbclass.hport != NULL);
   hport = priv->usbclass.hport;
 
-  uvdbg("crefs: %d\n", priv->crefs);
+  uinfo("crefs: %d\n", priv->crefs);
 
   /* Unregister the serial lower half driver */
 
@@ -1365,7 +1373,7 @@ static int usbhost_cfgdesc(FAR struct usbhost_cdcacm_s *priv,
           {
             FAR struct usb_ifdesc_s *ifdesc = (FAR struct usb_ifdesc_s *)configdesc;
 
-            uvdbg("Interface descriptor: class: %d subclass: %d proto: %d\n",
+            uinfo("Interface descriptor: class: %d subclass: %d proto: %d\n",
                   ifdesc->classid, ifdesc->subclass, ifdesc->protocol);
             DEBUGASSERT(remaining >= USB_SIZEOF_IFDESC);
 
@@ -1411,7 +1419,7 @@ static int usbhost_cfgdesc(FAR struct usbhost_cdcacm_s *priv,
           {
             FAR struct usb_epdesc_s *epdesc = (FAR struct usb_epdesc_s *)configdesc;
 
-            uvdbg("Endpoint descriptor: currif: %02x attr: %02x\n",
+            uinfo("Endpoint descriptor: currif: %02x attr: %02x\n",
                   currif, epdesc->attr);
             DEBUGASSERT(remaining >= USB_SIZEOF_EPDESC);
 
@@ -1448,7 +1456,7 @@ static int usbhost_cfgdesc(FAR struct usbhost_cdcacm_s *priv,
                     boutdesc.interval     = epdesc->interval;
                     boutdesc.mxpacketsize = usbhost_getle16(epdesc->mxpacketsize);
 
-                    uvdbg("Bulk OUT EP addr:%d mxpacketsize:%d\n",
+                    uinfo("Bulk OUT EP addr:%d mxpacketsize:%d\n",
                           boutdesc.addr, boutdesc.mxpacketsize);
                   }
                 else
@@ -1476,7 +1484,7 @@ static int usbhost_cfgdesc(FAR struct usbhost_cdcacm_s *priv,
                     bindesc.xfrtype      = USB_EP_ATTR_XFER_BULK;
                     bindesc.interval     = epdesc->interval;
                     bindesc.mxpacketsize = usbhost_getle16(epdesc->mxpacketsize);
-                    uvdbg("Bulk IN EP addr:%d mxpacketsize:%d\n",
+                    uinfo("Bulk IN EP addr:%d mxpacketsize:%d\n",
                           bindesc.addr, bindesc.mxpacketsize);
                   }
               }
@@ -1520,7 +1528,7 @@ static int usbhost_cfgdesc(FAR struct usbhost_cdcacm_s *priv,
                     iindesc.interval     = epdesc->interval;
                     iindesc.mxpacketsize = usbhost_getle16(epdesc->mxpacketsize);
 
-                    uvdbg("Interrupt IN EP addr:%d mxpacketsize:%d\n",
+                    uinfo("Interrupt IN EP addr:%d mxpacketsize:%d\n",
                           boutdesc.addr, boutdesc.mxpacketsize);
 #else
                     found |= USBHOST_CTRLIF_FOUND;
@@ -1559,7 +1567,7 @@ static int usbhost_cfgdesc(FAR struct usbhost_cdcacm_s *priv,
 
   if ((found & USBHOST_MINFOUND) != USBHOST_MINFOUND)
     {
-      udbg("ERROR: Found DATA IF:%s BULK IN:%s BULK OUT:%s\n",
+      uerr("ERROR: Found DATA IF:%s BULK IN:%s BULK OUT:%s\n",
            (found & USBHOST_DATAIF_FOUND)  != 0  ? "YES" : "NO",
            (found & USBHOST_BULKIN_FOUND)  != 0 ? "YES" : "NO",
            (found & USBHOST_BULKOUT_FOUND) != 0 ? "YES" : "NO");
@@ -1571,14 +1579,14 @@ static int usbhost_cfgdesc(FAR struct usbhost_cdcacm_s *priv,
   ret = DRVR_EPALLOC(hport->drvr, &boutdesc, &priv->bulkout);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to allocate Bulk OUT endpoint\n");
+      uerr("ERROR: Failed to allocate Bulk OUT endpoint\n");
       return ret;
     }
 
   ret = DRVR_EPALLOC(hport->drvr, &bindesc, &priv->bulkin);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to allocate Bulk IN endpoint\n");
+      uerr("ERROR: Failed to allocate Bulk IN endpoint\n");
       (void)DRVR_EPFREE(hport->drvr, priv->bulkout);
       return ret;
     }
@@ -1591,13 +1599,13 @@ static int usbhost_cfgdesc(FAR struct usbhost_cdcacm_s *priv,
       ret = DRVR_EPALLOC(hport->drvr, &iindesc, &priv->intin);
       if (ret < 0)
         {
-          udbg("ERROR: Failed to allocate Interrupt IN endpoint\n");
+          uerr("ERROR: Failed to allocate Interrupt IN endpoint\n");
           priv->intin = NULL;
         }
     }
 #endif
 
-  uvdbg("Endpoints allocated\n");
+  uinfo("Endpoints allocated\n");
   return OK;
 }
 
@@ -1715,7 +1723,7 @@ static int usbhost_alloc_buffers(FAR struct usbhost_cdcacm_s *priv)
   ret = DRVR_ALLOC(hport->drvr, (FAR uint8_t **)&priv->ctrlreq, &maxlen);
   if (ret < 0)
     {
-      udbg("ERROR: DRVR_ALLOC of ctrlreq failed: %d\n", ret);
+      uerr("ERROR: DRVR_ALLOC of ctrlreq failed: %d\n", ret);
       goto errout;
     }
 
@@ -1727,7 +1735,7 @@ static int usbhost_alloc_buffers(FAR struct usbhost_cdcacm_s *priv)
                      sizeof(struct cdc_linecoding_s));
   if (ret < 0)
     {
-      udbg("ERROR: DRVR_IOALLOC of line coding failed: %d (%d bytes)\n",
+      uerr("ERROR: DRVR_IOALLOC of line coding failed: %d (%d bytes)\n",
            ret, sizeof(struct cdc_linecoding_s));
       goto errout;
     }
@@ -1740,7 +1748,7 @@ static int usbhost_alloc_buffers(FAR struct usbhost_cdcacm_s *priv)
       ret = DRVR_IOALLOC(hport->drvr, &priv->notification, MAX_NOTIFICATION);
       if (ret < 0)
         {
-          udbg("ERROR: DRVR_IOALLOC of line status failed: %d (%d bytes)\n",
+          uerr("ERROR: DRVR_IOALLOC of line status failed: %d (%d bytes)\n",
                ret, MAX_NOTIFICATION);
           goto errout;
         }
@@ -1756,7 +1764,7 @@ static int usbhost_alloc_buffers(FAR struct usbhost_cdcacm_s *priv)
   ret = DRVR_IOALLOC(hport->drvr, &priv->inbuf, priv->pktsize);
   if (ret < 0)
     {
-      udbg("ERROR: DRVR_IOALLOC of Bulk IN buffer failed: %d (%d bytes)\n",
+      uerr("ERROR: DRVR_IOALLOC of Bulk IN buffer failed: %d (%d bytes)\n",
            ret, priv->pktsize);
       goto errout;
     }
@@ -1766,7 +1774,7 @@ static int usbhost_alloc_buffers(FAR struct usbhost_cdcacm_s *priv)
   ret = DRVR_IOALLOC(hport->drvr, &priv->outbuf, priv->pktsize);
   if (ret < 0)
     {
-      udbg("ERROR: DRVR_IOALLOC of Bulk OUT buffer failed: %d (%d bytes)\n",
+      uerr("ERROR: DRVR_IOALLOC of Bulk OUT buffer failed: %d (%d bytes)\n",
            ret, priv->pktsize);
       goto errout;
     }
@@ -2002,7 +2010,7 @@ static int usbhost_connect(FAR struct usbhost_class_s *usbclass,
   ret = usbhost_cfgdesc(priv, configdesc, desclen);
   if (ret < 0)
     {
-      udbg("usbhost_cfgdesc() failed: %d\n", ret);
+      uerr("ERROR: usbhost_cfgdesc() failed: %d\n", ret);
       goto errout;
     }
 
@@ -2011,7 +2019,7 @@ static int usbhost_connect(FAR struct usbhost_class_s *usbclass,
   ret = usbhost_alloc_buffers(priv);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to allocate transfer buffer\n");
+      uerr("ERROR: Failed to allocate transfer buffer\n");
       goto errout;
     }
 
@@ -2021,7 +2029,7 @@ static int usbhost_connect(FAR struct usbhost_class_s *usbclass,
   ret = usbhost_linecoding_send(priv);
   if (ret < 0)
     {
-      udbg("usbhost_linecoding_send() failed: %d\n", ret);
+      uerr("ERROR: usbhost_linecoding_send() failed: %d\n", ret);
     }
 #endif
 
@@ -2029,12 +2037,12 @@ static int usbhost_connect(FAR struct usbhost_class_s *usbclass,
    * driver */
 
   usbhost_mkdevname(priv, devname);
-  uvdbg("Register device: %s\n", devname);
+  uinfo("Register device: %s\n", devname);
 
   ret = uart_register(devname, &priv->uartdev);
   if (ret < 0)
     {
-      udbg("uart_register() failed: %d\n", ret);
+      uerr("ERROR: uart_register() failed: %d\n", ret);
       goto errout;
     }
 
@@ -2045,14 +2053,14 @@ static int usbhost_connect(FAR struct usbhost_class_s *usbclass,
     {
       /* Begin monitoring of port status change events */
 
-      uvdbg("Start notification monitoring\n");
+      uinfo("Start notification monitoring\n");
       ret = DRVR_ASYNCH(hport->drvr, priv->intin,
                         (FAR uint8_t *)priv->notification,
                         MAX_NOTIFICATION, usbhost_notification_callback,
                         priv);
       if (ret < 0)
         {
-          udbg("ERROR: DRVR_ASYNCH failed: %d\n", ret);
+          uerr("ERROR: DRVR_ASYNCH failed: %d\n", ret);
         }
     }
 #endif
@@ -2128,13 +2136,13 @@ static int usbhost_disconnected(struct usbhost_class_s *usbclass)
   ret = DRVR_CANCEL(hport->drvr, priv->bulkin);
   if (ret < 0)
     {
-     udbg("ERROR: Bulk IN DRVR_CANCEL failed: %d\n", ret);
+     uerr("ERROR: Bulk IN DRVR_CANCEL failed: %d\n", ret);
     }
 
   ret = DRVR_CANCEL(hport->drvr, priv->bulkout);
   if (ret < 0)
     {
-     udbg("ERROR: Bulk OUT DRVR_CANCEL failed: %d\n", ret);
+     uerr("ERROR: Bulk OUT DRVR_CANCEL failed: %d\n", ret);
     }
 
 #ifdef HAVE_INTIN_ENDPOINT
@@ -2145,7 +2153,7 @@ static int usbhost_disconnected(struct usbhost_class_s *usbclass)
       int ret = DRVR_CANCEL(hport->drvr, priv->intin);
       if (ret < 0)
         {
-         udbg("ERROR: Interrupt IN DRVR_CANCEL failed: %d\n", ret);
+         uerr("ERROR: Interrupt IN DRVR_CANCEL failed: %d\n", ret);
         }
     }
 #endif
@@ -2156,7 +2164,7 @@ static int usbhost_disconnected(struct usbhost_class_s *usbclass)
    * serial driver.
    */
 
-  uvdbg("crefs: %d\n", priv->crefs);
+  uinfo("crefs: %d\n", priv->crefs);
   if (priv->crefs == 1)
     {
       /* Destroy the class instance.  If we are executing from an interrupt
@@ -2168,7 +2176,7 @@ static int usbhost_disconnected(struct usbhost_class_s *usbclass)
         {
           /* Destroy the instance on the worker thread. */
 
-          uvdbg("Queuing destruction: worker %p->%p\n",
+          uinfo("Queuing destruction: worker %p->%p\n",
                 priv->ntwork.worker, usbhost_destroy);
 
           DEBUGASSERT(work_available(&priv->ntwork));
@@ -2204,7 +2212,7 @@ static int usbhost_setup(FAR struct uart_dev_s *uartdev)
   irqstate_t flags;
   int ret;
 
-  uvdbg("Entry\n");
+  uinfo("Entry\n");
   DEBUGASSERT(uartdev && uartdev->priv);
   priv = (FAR struct usbhost_cdcacm_s *)uartdev->priv;
 
@@ -2255,7 +2263,7 @@ static void usbhost_shutdown(FAR struct uart_dev_s *uartdev)
   FAR struct usbhost_cdcacm_s *priv;
   irqstate_t flags;
 
-  uvdbg("Entry\n");
+  uinfo("Entry\n");
   DEBUGASSERT(uartdev && uartdev->priv);
   priv = (FAR struct usbhost_cdcacm_s *)uartdev->priv;
 
@@ -2343,7 +2351,7 @@ static int usbhost_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   struct usbhost_cdcacm_s *priv;
   int ret;
 
-  uvdbg("Entry\n");
+  uinfo("Entry\n");
   DEBUGASSERT(filep && filep->f_inode);
   inode = filep->f_inode;
 
diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c
new file mode 100644
index 0000000000000000000000000000000000000000..cc60adff94801f8a8baaf85308e811f30bb2d0fe
--- /dev/null
+++ b/drivers/usbhost/usbhost_composite.c
@@ -0,0 +1,856 @@
+/****************************************************************************
+ * drivers/usbhost/usbhost_composite.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "usbhost_composite.h"
+
+#ifdef CONFIG_USBHOST_COMPOSITE
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* This is the size of a large, allocated temporary buffer that we will use
+ * to constuct custom configuration descriptors for each member class.
+ */
+
+#define CUSTOM_CONFIG_BUFSIZE  \
+  (USB_SIZEOF_CFGDESC + 3 * USB_SIZEOF_IFDESC + 9 * USB_SIZEOF_EPDESC)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* This structure describes one component class of the composite */
+
+struct usbhost_member_s
+{
+  /* This the the classobject returned by each contained class */
+
+  FAR struct usbhost_class_s *usbclass;
+
+  /* This is the information that we need to do the registry lookup for this
+   * class member.
+   */
+
+  struct usbhost_id_s id;
+
+  /* This information will be needed to construct a meaningful configuration
+   * for CLASS_CONNSET()
+   */
+
+  uint8_t firstif;     /* First interface */
+  uint8_t nifs;        /* Number of interfaces */
+};
+
+/* This structure contains the internal, private state of the USB host
+ * CDC/ACM class.
+ */
+
+struct usbhost_composite_s
+{
+  /* This is the externally visible portion of the state.  The usbclass must
+   * the first element of the structure.  It is then cast compatible with
+   * struct usbhost_composite_s.
+   */
+
+  struct usbhost_class_s usbclass;
+
+  /* Class specific data follows */
+
+  uint16_t nclasses;   /* Number of component classes in the composite */
+
+  /* The following points to an allocated array of type struct
+   * usbhost_member_s.  Element element of the array corresponds to one
+   * component class in the composite.
+   */
+
+  FAR struct usbhost_member_s *members;
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* struct usbhost_class_s methods */
+
+static int  usbhost_connect(FAR struct usbhost_class_s *usbclass,
+              FAR const uint8_t *configdesc, int desclen);
+static int  usbhost_disconnected(FAR struct usbhost_class_s *usbclass);
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: usbhost_disconnect_all
+ *
+ * Description:
+ *   Disconnect all contained class instances.
+ *
+ * Input Parameters:
+ *   priv - Reference to private, composite container state stucture.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void usbhost_disconnect_all(FAR struct usbhost_composite_s *priv)
+{
+  FAR struct usbhost_member_s *member;
+  int i;
+
+  /* Loop, processing each class that has been included into the composite */
+
+  for (i = 0; i < priv->nclasses; i++)
+    {
+      member = &priv->members[i];
+
+      /* Has this member been included to the composite? */
+
+      if (member->usbclass != NULL)
+        {
+          /* Yes.. disconnect it, freeing all of the class resources */
+
+          CLASS_DISCONNECTED(member->usbclass);
+          member->usbclass = NULL;
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: usbhost_connect
+ *
+ * Description:
+ *   This function implements the connect() method of struct
+ *   usbhost_class_s.  This method is a callback into the class
+ *   implementation from the common enumeration logic.  It is normally used
+ *   to provide the device's configuration descriptor to the class so that
+ *   the class may initialize properly.  That calling sequence is:
+ *
+ *   1. usbhost_enumerate()
+ *   2. usbhost_classbind()
+ *   3. CLASS_CONNECT()
+ *
+ *   However, that applies only to the Non-composite device.
+ *   usbhost_classbind() is not called for the composite device and, hence,
+ *   this method is never called.  Rather, the composite logic calls
+ *   CLASS_CONNECT() for each member of the composite in a calling sequence
+ *   like:
+ *
+ *   1. usbhost_enumerate()
+ *   2. usbhost_composite()
+ *   3. Call CLASS_CONNECT() for each composite member
+ *
+ * Input Parameters:
+ *   usbclass - The USB host class entry previously obtained from a call to
+ *     create().
+ *   configdesc - A pointer to a uint8_t buffer container the configuration
+ *     descriptor.
+ *   desclen - The length in bytes of the configuration descriptor.
+ *
+ * Returned Value:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value is
+ *   returned indicating the nature of the failure
+ *
+ *   NOTE that the class instance remains valid upon return with a failure.  It is
+ *   the responsibility of the higher level enumeration logic to call
+ *   CLASS_DISCONNECTED to free up the class driver resources.
+ *
+ * Assumptions:
+ *   - This function will *not* be called from an interrupt handler.
+ *   - If this function returns an error, the USB host controller driver
+ *     must call to DISCONNECTED method to recover from the error
+ *
+ ****************************************************************************/
+
+static int usbhost_connect(FAR struct usbhost_class_s *usbclass,
+                           FAR const uint8_t *configdesc, int desclen)
+{
+  return -ENOSYS;
+}
+
+/****************************************************************************
+ * Name: usbhost_disconnected
+ *
+ * Description:
+ *   This function implements the disconnected() method of struct
+ *   usbhost_class_s.  This method is a callback into the class
+ *   implementation.  It is used to inform the class that the USB device has
+ *   been disconnected.
+ *
+ * Input Parameters:
+ *   usbclass - The USB host class entry previously obtained from a call to
+ *     create().
+ *
+ * Returned Value:
+ *   On success, zero (OK) is returned. On a failure, a negated errno value
+ *   is returned indicating the nature of the failure
+ *
+ * Assumptions:
+ *   This function may be called from an interrupt handler.
+ *
+ ****************************************************************************/
+
+static int usbhost_disconnected(struct usbhost_class_s *usbclass)
+{
+  FAR struct usbhost_composite_s *priv = (FAR struct usbhost_composite_s *)usbclass;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Forward the disconnect event to each contained class in the composite. */
+
+  usbhost_disconnect_all(priv);
+
+  /* Free the allocate array of composite members */
+
+  if (priv->members != NULL)
+    {
+      kmm_free(priv->members);
+    }
+
+  /* The destroy the composite container itself */
+
+  kmm_free(priv);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: usbhost_copyinterface
+ *
+ * Description:
+ *   Find an interface descriptor and copy it along with all of its
+ *   following encpoint descriptors.
+ *
+ * Input Parameters:
+ *   ifno        - The interface ID to find.
+ *   configdesc - The original configuration descriptor that contains the
+ *                the interface descriptor.
+ *   desclen    - the length of configdesc.
+ *   buffer     - The buffer in which to return the descriptors
+ *   buflen     - The length of buffer
+ *
+ * Returned Value:
+ *   On success, the number of bytes copied is returned. On a failure, a
+ *   negated errno value is returned indicating the nature of the failure:
+ *
+ *   -ENOENT: Did not find interface descriptor
+ *   -EINVAL: Did not find all endpoint descriptors
+ *
+ ****************************************************************************/
+
+static int usbhost_copyinterface(uint8_t ifno, FAR const uint8_t *configdesc,
+                                 int desclen, FAR uint8_t *buffer, int buflen)
+{
+  FAR struct usb_ifdesc_s *ifdesc;
+  FAR struct usb_epdesc_s *epdesc;
+  int retsize;
+  int offset;
+  int neps;
+  int len;
+
+  /* Make sure that the buffer will hold at least the interface descriptor */
+
+  if (buflen < USB_SIZEOF_IFDESC)
+    {
+      return -ENOSPC;
+    }
+
+  /* Search for the interface */
+
+  for (offset = 0, retsize = 0;
+       offset < desclen - sizeof(struct usb_ifdesc_s);
+       offset += len)
+    {
+      ifdesc = (FAR struct usb_ifdesc_s *)&configdesc[offset];
+      len    = ifdesc->len;
+
+      /* Is this an interface descriptor?  Is it the one we are looking for? */
+
+      if (ifdesc->type == USB_DESC_TYPE_INTERFACE && ifdesc->ifno == ifno)
+        {
+          /* Yes.. return the interface descriptor */
+
+          memcpy(buffer, ifdesc, len);
+          buffer  += len;
+          buflen  -= len;
+          retsize += len;
+
+          /* Make sure that the buffer will hold at least the endpoint
+           * descriptors.
+           */
+
+          neps = ifdesc->neps;
+          if (buflen < neps * USB_SIZEOF_EPDESC)
+            {
+              return -ENOSPC;
+            }
+
+          /* The endpoint descriptors should immediately follow the
+           * interface descriptor.
+           */
+
+          for (offset += len;
+               offset <= desclen - sizeof(struct usb_epdesc_s);
+               offset += len)
+            {
+              epdesc = (FAR struct usb_epdesc_s *)&configdesc[offset];
+              len    = epdesc->len;
+
+              /* Is this an endpoint descriptor?  */
+
+              if (epdesc->type == USB_DESC_TYPE_ENDPOINT)
+                {
+                  /* Yes.. return the endpoint descriptor */
+
+                  memcpy(buffer, epdesc, len);
+                  buffer  += len;
+                  buflen  -= len;
+                  retsize += len;
+
+                  /* And reduce the number of endpoints we are looking for */
+
+                  if (--neps <= 0)
+                    {
+                      /* That is all of them!.  Return the total size copied */
+
+                      return retsize;
+                    }
+                }
+
+              /* The endpoint descriptors following the interface descriptor
+               * should all be contiguous.  But we will complain only if another
+               * interface descriptor is encountered before all of the endpoint
+               * descriptors have been found.
+               */
+
+              else if (epdesc->type == USB_DESC_TYPE_INTERFACE)
+                {
+                  break;
+                }
+            }
+
+          /* Did not find all of the interface descriptors */
+
+          return -EINVAL;
+        }
+    }
+
+  /* Could not find the interface descriptor */
+
+  return -ENOENT;
+}
+
+/****************************************************************************
+ * Name: usbhost_createconfig
+ *
+ * Description:
+ *   Create a custom configuration for a member class.
+ *
+ * Input Parameters:
+ *   configdesc - The original configuration descriptor that contains the
+ *                the interface descriptor.
+ *   desclen    - the length of configdesc.
+ *   buffer     - The buffer in which to return the descriptors
+ *   buflen     - The length of buffer
+ *
+ * Returned Value:
+ *   On success, the size of the new configuration descriptor is returned.
+ *   On a failure, a negated errno value is returned indicating the nature
+ *   of the failure:
+ *
+ *   -ENOENT: Did not find interface descriptor
+ *   -EINVAL: Did not find all endpoint descriptors
+ *
+ ****************************************************************************/
+
+static int usbhost_createconfig(FAR struct usbhost_member_s *member,
+                                FAR const uint8_t *configdesc, int desclen,
+                                FAR uint8_t *buffer, int buflen)
+{
+  FAR struct usb_cfgdesc_s *cfgdesc;
+  int cfgsize;
+  int ifsize;
+  int ifno;
+  int nifs;
+
+  /* Copy and modify the original configuration descriptor */
+
+  if (buflen < USB_SIZEOF_CFGDESC)
+    {
+      return -ENOSPC;
+    }
+
+  memcpy(buffer, configdesc, USB_SIZEOF_CFGDESC);
+  cfgsize = USB_SIZEOF_CFGDESC;
+  buffer += USB_SIZEOF_CFGDESC;
+  buflen -= USB_SIZEOF_CFGDESC;
+
+  /* Modify the copied configuration descriptor */
+
+  cfgdesc              = (FAR struct usb_cfgdesc_s *)buffer;
+  cfgdesc->len         = USB_SIZEOF_CFGDESC;
+  cfgdesc->ninterfaces = member->nifs;
+
+  /* Then copy all of the interfaces to the configuration buffer */
+
+  for (nifs = 0, ifno = member->firstif; nifs < member->nifs; nifs++, ifno++)
+    {
+      ifsize = usbhost_copyinterface(ifno, configdesc, desclen,
+                                     buffer, buflen);
+      if (ifsize < 0)
+        {
+          uerr("ERROR: Failed to copy inteface: %d\n", ifsize);
+          return ifsize;
+        }
+
+      /* Update sizes and pointers */
+
+      cfgsize += ifsize;
+      buffer  += ifsize;
+      buflen  -= ifsize;
+    }
+
+  /* Set the totallen of the configuration descriptor and return success */
+
+  cfgdesc->totallen[0] = cfgsize & 0xff; /* Little endian always */
+  cfgdesc->totallen[1] = cfgsize >> 8;
+  return cfgsize;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: usbhost_composite
+ *
+ * Description:
+ *   As the final steps in the device enumeration sequence this function
+ *   will be called in order to determine (1) determine if the device is
+ *   a composite device, and if so, (2) create the composite class which
+ *   contains all of the individual class instances making up the composite.
+ *
+ * Input Parameters:
+ *   hport      - The downstream port to which the (potential) composite
+ *                device has been connected.
+ *   configdesc - The full configuration descriptor
+ *   desclen    - The length of the configuration descriptor
+ *   id         - Lookup information extracted from the device descriptor.
+ *                for the case of the composite devices, we need only the
+ *                vid and pid.
+ *   usbclass   - If the class driver for the device is successful located
+ *                and bound to the hub port, the allocated class instance
+ *                is returned into this caller-provided memory location.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned if (1) the device was determined to be a
+ *   composite device and (2) the composite class wrapper was sucessfully
+ *   created and bound to the HCD.  A negated errno value is returned on
+ *   any failure.  The value -ENOENT, in particular means that the attached
+ *   device is not a composite device.  Other values would indicate other
+ *   various, unexpected failures.
+ *
+ ****************************************************************************/
+
+int usbhost_composite(FAR struct usbhost_hubport_s *hport,
+                      FAR const uint8_t *configdesc, int desclen,
+                      FAR struct usbhost_id_s *id,
+                      FAR struct usbhost_class_s **usbclass)
+{
+  FAR struct usbhost_composite_s *priv;
+  FAR struct usbhost_member_s *member;
+  FAR const struct usbhost_registry_s *reg;
+  FAR struct usb_desc_s *desc;
+  FAR uint8_t *cfgbuffer;
+  uint32_t mergeset;
+  uint16_t nintfs;
+  uint16_t nmerged;
+  uint16_t nclasses;
+  int cfgsize;
+  int offset;
+  int ret;
+  int i;
+
+  /* Determine if this a composite device has been connected to the
+   * downstream port.
+   *
+   * First look at there device descriptor information.  A composite
+   * device is only possible if:
+   *
+   * 1. Manufacturers of composite devices typically assign a value of zero
+   *    to the device class (bDeviceClass), subclass (bDeviceSubClass), and
+   *    protocol (bDeviceProtocol) fields in the device descriptor, as
+   *    specified by the Universal Serial Bus Specification. This allows
+   *    the manufacturer to associate each individual interface with a
+   *    different device class and protocol.
+   *
+   * 2. The USB-IF core team has devised a special class and protocol code
+   *    set that notifies the operating system that one or more IADs are
+   *    present in device firmware. A device's device descriptor must have
+   *    the values that appear in the following table:
+   *
+   *   bDeviceClass    0xEF
+   *   bDeviceSubClass 0x02
+   *   bDeviceProtocol 0x01
+   */
+
+   if (id->base != USB_CLASS_PER_INTERFACE && id->base != USB_CLASS_MISC)
+     {
+       return -ENOENT;
+     }
+
+  /* First, count the number of interface descriptors (nintfs) and the
+   * number of interfaces that are assocated to one device via IAD
+   * descriptor (nmerged).
+   */
+
+  mergeset = 0;
+  nintfs   = 0;
+  nmerged  = 0;
+
+  for (offset = 0; offset < desclen - sizeof(struct usb_desc_s); )
+    {
+      desc = (FAR struct usb_desc_s *)&configdesc[offset];
+      int len = desc->len;
+
+      if (offset + len <= desclen)
+        {
+          /* Is this an interface descriptor? */
+
+          if (desc->type == USB_DESC_TYPE_INTERFACE)
+            {
+#ifdef CONFIG_DEBUG_ASSERTIONS
+              FAR struct usb_ifdesc_s *ifdesc =
+                (FAR struct usb_ifdesc_s *)desc;
+
+              DEBUGASSERT(ifdesc->ifno < 32);
+#endif
+              /* Increment the count of interfaces */
+
+              nintfs++;
+            }
+
+          /* Check for IAD descriptors that will be used when it is
+           * necessary to associate multiple interfaces with a single
+           * class driver.
+           */
+
+         else if (desc->type == USB_DESC_TYPE_INTERFACEASSOCIATION)
+           {
+              FAR struct usb_iaddesc_s *iad = (FAR struct usb_iaddesc_s *)desc;
+              uint32_t mask;
+
+              /* Keep count of the number of interfaces that will be merged */
+
+              nmerged += (iad->nifs - 1);
+
+              /* Keep track of which interfaces will be merged */
+
+              DEBUGASSERT(iad->firstif + iad->nifs < 32);
+              mask      = (1 << iad->nifs) - 1;
+              mergeset |= mask << iad->firstif;
+           }
+        }
+
+      offset += len;
+    }
+
+  if (nintfs < 2)
+    {
+      /* Only one interface descriptor.  Can't be a composite device */
+
+      return -ENOENT;
+    }
+
+#if 0 /* I think not needed, the device descriptor classid check should handle this */
+  /* Special case:  Some NON-composite device have more than on interface:  CDC/ACM
+   * and MSC both may have two interfaces.
+   */
+
+  if (nintfs < 3 && nmerged == 0)
+    {
+      /* Do the special case checks */
+#warning Missing logic
+    }
+#endif
+
+  /* The total number of classes is then the number of interfaces minus the
+   * number of interfaces merged via the IAD descriptor.
+   */
+
+  if (nintfs <= nmerged)
+    {
+      /* Should not happen.  Means a bug. */
+
+      return -EINVAL;
+    }
+
+  nclasses = nintfs - nmerged;
+
+  /* Allocate the composite class container */
+
+  priv = (FAR struct usbhost_composite_s *)
+    kmm_zalloc(sizeof(struct usbhost_composite_s));
+
+  if (priv == NULL)
+    {
+      uerr("ERROR: Failed to allocate class container\n");
+      return -ENOMEM;
+    }
+
+  priv->members = (FAR struct usbhost_member_s *)
+    kmm_zalloc(nclasses * sizeof(struct usbhost_member_s));
+
+  if (priv->members == NULL)
+    {
+      uerr("ERROR: Failed to allocate class members\n");
+      ret = -ENOMEM;
+      goto errout_with_container;
+    }
+
+  /* Initialize the non-zero elements of the class container */
+
+  priv->usbclass.hport        = hport;
+  priv->usbclass.connect      = usbhost_connect;
+  priv->usbclass.disconnected = usbhost_disconnected;
+  priv->nclasses              = nclasses;
+
+  /* Re-parse the configuration descriptor and save the CLASS ID information
+   * in the member structure:  If the interface is defined by an interface
+   * descriptor, then we have to use the info in the interface descriptor;
+   * If the interface has a IAD, we have to use info in the IAD.
+   */
+
+  for (i = 0, offset = 0; offset < desclen - sizeof(struct usb_desc_s); )
+    {
+      desc = (FAR struct usb_desc_s *)&configdesc[offset];
+      int len = desc->len;
+
+      if (offset + len <= desclen)
+        {
+          /* Is this an interface descriptor? */
+
+          if (desc->type == USB_DESC_TYPE_INTERFACE)
+            {
+              FAR struct usb_ifdesc_s *ifdesc =
+                (FAR struct usb_ifdesc_s *)desc;
+
+              /* Was the interface merged via an IAD descriptor? */
+
+              DEBUGASSERT(ifdesc->ifno < 32);
+              if ((mergeset & (1 << ifdesc->ifno)) == 0)
+                {
+                  /* No, this interface was not merged.  Save the registry
+                   * lookup information from the interface descriptor.
+                   */
+
+                  member              = (FAR struct usbhost_member_s *)&priv->members[i];
+                  member->id.base     = ifdesc->classid;
+                  member->id.subclass = ifdesc->subclass;
+                  member->id.proto    = ifdesc->protocol;
+                  member->id.vid      = id->vid;
+                  member->id.pid      = id->pid;
+
+                  member->firstif     = ifdesc->ifno;
+                  member->nifs        = 1;
+
+                  /* Increment the member index */
+
+                  i++;
+                }
+            }
+
+          /* Check for IAD descriptors that will be used when it is
+           * necessary to associate multiple interfaces with a single
+           * device.
+           */
+
+          else if (desc->type == USB_DESC_TYPE_INTERFACEASSOCIATION)
+            {
+              FAR struct usb_iaddesc_s *iad = (FAR struct usb_iaddesc_s *)desc;
+
+              /* Yes.. Save the registry lookup information from the IAD. */
+
+              member              = (FAR struct usbhost_member_s *)&priv->members[i];
+              member->id.base     = iad->classid;
+              member->id.subclass = iad->subclass;
+              member->id.proto    = iad->protocol;
+              member->id.vid      = id->vid;
+              member->id.pid      = id->pid;
+
+              member->firstif     = iad->firstif;
+              member->nifs        = iad->nifs;
+
+              /* Increment the member index */
+
+              i++;
+            }
+        }
+
+      offset += len;
+    }
+
+  /* If everything worked, the final index must be the same as the pre-
+   * calculated number of member classes.
+   */
+
+  DEBUGASSERT(i == nclasses);
+
+  /* Allocate a temporary buffer in which we can construct a custom
+   * configuration descriptor for each member class.
+   */
+
+  cfgbuffer = (FAR uint8_t *)malloc(CUSTOM_CONFIG_BUFSIZE);
+  if (cfgbuffer == NULL)
+    {
+      uerr("ERROR: Failed to allocate configuration buffer");
+      ret = -ENOMEM;
+      goto errout_with_members;
+    }
+
+  /* Now loop, performing the registry lookup and initialization of each
+   * member class in the composite.
+   */
+
+  for (i = 0; i < nclasses; i++)
+    {
+       member = &priv->members[i];
+
+      /* Is there is a class implementation registered to support this
+       * device.
+       */
+
+      reg = usbhost_findclass(&member->id);
+      if (reg == NULL)
+        {
+          uerr("ERROR: usbhost_findclass failed\n");
+#ifdef CONFIG_USBHOST_COMPOSITE_STRICT
+          ret = -EINVAL;
+          goto errout_with_cfgbuffer;
+#else
+          continue;
+#endif
+        }
+
+      /* Yes.. there is a class for this device.  Get an instance of its
+       * interface.
+       */
+
+      member->usbclass = CLASS_CREATE(reg, hport, id);
+      if (member->usbclass == NULL)
+        {
+          uerr("ERROR: CLASS_CREATE failed\n");
+          ret = -ENOMEM;
+          goto errout_with_cfgbuffer;
+        }
+
+      /* Construct a custom configuration descriptor for this member */
+
+      cfgsize = usbhost_createconfig(member, configdesc, desclen,
+                                     cfgbuffer, CUSTOM_CONFIG_BUFSIZE);
+      if (cfgsize < 0)
+        {
+          uerr("ERROR: Failed to create the custom configuration: %d\n",
+               cfgsize);
+          ret = cfgsize;
+          goto errout_with_cfgbuffer;
+        }
+
+      /* Call the newly instantiated classes connect() method provide it
+       * with the configuration information that it needs to initialize
+       * properly.
+       */
+
+      ret = CLASS_CONNECT(member->usbclass, cfgbuffer, cfgsize);
+      if (ret < 0)
+        {
+          /* On failure, call the class disconnect method of each contained
+           * class which should then free the allocated usbclass instance.
+           */
+
+          uerr("ERROR: CLASS_CONNECT failed: %d\n", ret);
+          goto errout_with_cfgbuffer;
+        }
+    }
+
+  /* Free the temporary buffer */
+
+  kmm_free(cfgbuffer);
+
+  /* Return our USB class structure */
+
+  *usbclass = &priv->usbclass;
+  return OK;
+
+errout_with_cfgbuffer:
+  kmm_free(cfgbuffer);
+
+errout_with_members:
+  /* On an failure, call the class disconnect method of each contained
+   * class which should then free the allocated usbclass instance.
+   */
+
+  usbhost_disconnect_all(priv);
+
+  /* Free the allocate array of composite members */
+
+  if (priv->members != NULL)
+    {
+      kmm_free(priv->members);
+    }
+
+errout_with_container:
+  /* Then free the composite container itself */
+
+  kmm_free(priv);
+  return ret;
+}
+
+#endif /* CONFIG_USBHOST_COMPOSITE */
diff --git a/drivers/usbhost/usbhost_composite.h b/drivers/usbhost/usbhost_composite.h
new file mode 100644
index 0000000000000000000000000000000000000000..765624da2a5ce43844389520ebf0ddeae7bd0ff7
--- /dev/null
+++ b/drivers/usbhost/usbhost_composite.h
@@ -0,0 +1,102 @@
+/****************************************************************************
+ * drivers/usbhost/usbdev_composite.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __DRIVERS_USBHOST_USBHOST_COMPOSITE_H
+#define __DRIVERS_USBHOST_USBHOST_COMPOSITE_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#ifdef CONFIG_USBHOST_COMPOSITE
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: usbhost_composite
+ *
+ * Description:
+ *   As the final steps in the device enumeration sequence this function
+ *   will be called in order to determine (1) determine if the device is
+ *   a composite device, and if so, (2) create the composite class which
+ *   contains all of the individual class instances making up the composite.
+ *
+ * Input Parameters:
+ *   hport      - The downstream port to which the (potential) composite
+ *                device has been connected.
+ *   configdesc - The full configuration descriptor
+ *   desclen    - The length of the configuration descriptor
+ *   usbclass   - If the class driver for the device is successful located
+ *                and bound to the hub port, the allocated class instance
+ *                is returned into this caller-provided memory location.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned if (1) the device was determined to be a
+ *   composite device and (2) the composite class wrapper was sucessfully
+ *   created and bound to the HCD.  A negated errno value is returned on
+ *   any failure.  The value -ENOENT, in particular means that the attached
+ *   device is not a composite device.  Other values would indicate other
+ *   various, unexpected failures.
+ *
+ ****************************************************************************/
+
+int usbhost_composite(FAR struct usbhost_hubport_s *hport,
+                      FAR const uint8_t *configdesc, int desclen,
+                      FAR struct usbhost_id_s *id,
+                      FAR struct usbhost_class_s **usbclass);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* CONFIG_USBHOST_COMPOSITE */
+#endif /* #define __DRIVERS_USBHOST_USBHOST_COMPOSITE_H */
diff --git a/drivers/usbhost/usbhost_devaddr.c b/drivers/usbhost/usbhost_devaddr.c
index e26513c540531baf4afe608a87fe8a8d0d7cfd8c..58fbe042977a1e63937c178613d28ab18afbd0a1 100644
--- a/drivers/usbhost/usbhost_devaddr.c
+++ b/drivers/usbhost/usbhost_devaddr.c
@@ -296,7 +296,7 @@ int usbhost_devaddr_create(FAR struct usbhost_hubport_s *hport)
 
   if (devaddr < 0)
     {
-      udbg("ERROR: Failed to allocate a device address\n");
+      uerr("ERROR: Failed to allocate a device address\n");
     }
 
   return devaddr;
diff --git a/drivers/usbhost/usbhost_enumerate.c b/drivers/usbhost/usbhost_enumerate.c
index 647d0ab7a99cb8c1dca2771c7115297e0ff0ac7a..01062d077be13f256aabcd50be2e9fcf77aa3fab 100644
--- a/drivers/usbhost/usbhost_enumerate.c
+++ b/drivers/usbhost/usbhost_enumerate.c
@@ -53,13 +53,7 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
+#include "usbhost_composite.h"
 
 /****************************************************************************
  * Private Function Prototypes
@@ -77,14 +71,6 @@ static inline int usbhost_classbind(FAR struct usbhost_hubport_s *hport,
               FAR struct usbhost_id_s *id,
               FAR struct usbhost_class_s **devclass);
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -143,7 +129,7 @@ static inline int usbhost_devdesc(FAR const struct usb_devdesc_s *devdesc,
   id->vid = usbhost_getle16(devdesc->vendor);
   id->pid = usbhost_getle16(devdesc->product);
 
-  uvdbg("class:%d subclass:%04x protocol:%04x vid:%d pid:%d\n",
+  uinfo("class:%d subclass:%04x protocol:%04x vid:%d pid:%d\n",
         id->base, id->subclass, id->proto, id->vid, id->pid);
   return OK;
 }
@@ -169,7 +155,7 @@ static inline int usbhost_configdesc(const uint8_t *configdesc, int cfglen,
   /* Verify that we were passed a configuration descriptor */
 
   cfgdesc = (struct usb_cfgdesc_s *)configdesc;
-  uvdbg("cfg len:%d total len:%d\n", cfgdesc->len, cfglen);
+  uinfo("cfg len:%d total len:%d\n", cfgdesc->len, cfglen);
 
   if (cfgdesc->type != USB_DESC_TYPE_CONFIG)
     {
@@ -200,7 +186,7 @@ static inline int usbhost_configdesc(const uint8_t *configdesc, int cfglen,
           id->base     = ifdesc->classid;
           id->subclass = ifdesc->subclass;
           id->proto    = ifdesc->protocol;
-          uvdbg("class:%d subclass:%d protocol:%d\n",
+          uinfo("class:%d subclass:%d protocol:%d\n",
                 id->base, id->subclass, id->proto);
           return OK;
         }
@@ -235,7 +221,7 @@ static inline int usbhost_classbind(FAR struct usbhost_hubport_s *hport,
   /* Is there is a class implementation registered to support this device. */
 
   reg = usbhost_findclass(id);
-  uvdbg("usbhost_findclass: %p\n", reg);
+  uinfo("usbhost_findclass: %p\n", reg);
   if (reg != NULL)
     {
       /* Yes.. there is a class for this device.  Get an instance of
@@ -244,7 +230,7 @@ static inline int usbhost_classbind(FAR struct usbhost_hubport_s *hport,
 
       ret = -ENOMEM;
       devclass = CLASS_CREATE(reg, hport, id);
-      uvdbg("CLASS_CREATE: %p\n", devclass);
+      uinfo("CLASS_CREATE: %p\n", devclass);
       if (devclass != NULL)
         {
           /* Then bind the newly instantiated class instance */
@@ -256,7 +242,7 @@ static inline int usbhost_classbind(FAR struct usbhost_hubport_s *hport,
                * should then free the allocated devclass instance.
                */
 
-              udbg("CLASS_CONNECT failed: %d\n", ret);
+              uerr("ERROR: CLASS_CONNECT failed: %d\n", ret);
               CLASS_DISCONNECTED(devclass);
             }
           else
@@ -266,7 +252,7 @@ static inline int usbhost_classbind(FAR struct usbhost_hubport_s *hport,
         }
     }
 
-  uvdbg("Returning: %d\n", ret);
+  uinfo("Returning: %d\n", ret);
   return ret;
 }
 
@@ -326,14 +312,14 @@ int usbhost_enumerate(FAR struct usbhost_hubport_s *hport,
   ret = DRVR_ALLOC(hport->drvr, (FAR uint8_t **)&ctrlreq, &maxlen);
   if (ret < 0)
     {
-      udbg("DRVR_ALLOC failed: %d\n", ret);
+      uerr("ERROR: DRVR_ALLOC failed: %d\n", ret);
       return ret;
     }
 
   ret = DRVR_ALLOC(hport->drvr, &buffer, &maxlen);
   if (ret < 0)
     {
-      udbg("DRVR_ALLOC failed: %d\n", ret);
+      uerr("ERROR: DRVR_ALLOC failed: %d\n", ret);
       goto errout;
     }
 
@@ -381,7 +367,7 @@ int usbhost_enumerate(FAR struct usbhost_hubport_s *hport,
   ret = DRVR_CTRLIN(hport->drvr, hport->ep0, ctrlreq, buffer);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to get device descriptor, length=%d: %d\n",
+      uerr("ERROR: Failed to get device descriptor, length=%d: %d\n",
            descsize, ret);
       goto errout;
     }
@@ -389,7 +375,7 @@ int usbhost_enumerate(FAR struct usbhost_hubport_s *hport,
   /* Extract the correct max packetsize from the device descriptor */
 
   maxpacketsize = ((struct usb_devdesc_s *)buffer)->mxpacketsize;
-  uvdbg("maxpacksetsize: %d\n", maxpacketsize);
+  uinfo("maxpacksetsize: %d\n", maxpacketsize);
 
   /* And reconfigure EP0 with the correct maximum packet size */
 
@@ -409,7 +395,7 @@ int usbhost_enumerate(FAR struct usbhost_hubport_s *hport,
       ret = DRVR_CTRLIN(hport->drvr, hport->ep0, ctrlreq, buffer);
       if (ret < 0)
         {
-          udbg("ERROR: Failed to get device descriptor, length=%d: %d\n",
+          uerr("ERROR: Failed to get device descriptor, length=%d: %d\n",
                USB_SIZEOF_DEVDESC, ret);
           goto errout;
         }
@@ -428,7 +414,7 @@ int usbhost_enumerate(FAR struct usbhost_hubport_s *hport,
   funcaddr = usbhost_devaddr_create(hport);
   if (funcaddr < 0)
     {
-      udbg("ERROR: usbhost_devaddr_create failed: %d\n", ret);
+      uerr("ERROR: usbhost_devaddr_create failed: %d\n", ret);
       goto errout;
     }
 
@@ -443,7 +429,7 @@ int usbhost_enumerate(FAR struct usbhost_hubport_s *hport,
   ret = DRVR_CTRLOUT(hport->drvr, hport->ep0, ctrlreq, NULL);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to set address: %d\n");
+      uerr("ERROR: Failed to set address: %d\n");
       goto errout;
     }
 
@@ -473,7 +459,7 @@ int usbhost_enumerate(FAR struct usbhost_hubport_s *hport,
   ret = DRVR_CTRLIN(hport->drvr, hport->ep0, ctrlreq, buffer);
   if (ret < 0)
    {
-      udbg("ERROR: Failed to get configuration descriptor, length=%d: %d\n",
+      uerr("ERROR: Failed to get configuration descriptor, length=%d: %d\n",
            USB_SIZEOF_CFGDESC, ret);
       goto errout;
     }
@@ -481,7 +467,15 @@ int usbhost_enumerate(FAR struct usbhost_hubport_s *hport,
   /* Extract the full size of the configuration data */
 
   cfglen = (unsigned int)usbhost_getle16(((struct usb_cfgdesc_s *)buffer)->totallen);
-  uvdbg("sizeof config data: %d\n", cfglen);
+  uinfo("sizeof config data: %d\n", cfglen);
+
+  if (cfglen > maxlen)
+    {
+      uerr("ERROR: Configuration doesn't fit in buffer, length=%d, maxlen=%d\n",
+           cfglen, maxlen);
+      ret = -E2BIG;
+      goto errout;
+    }
 
   /* Get all of the configuration descriptor data, index == 0 (Should not be
    * hard-coded!)
@@ -496,7 +490,7 @@ int usbhost_enumerate(FAR struct usbhost_hubport_s *hport,
   ret = DRVR_CTRLIN(hport->drvr, hport->ep0, ctrlreq, buffer);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to get configuration descriptor, length=%d: %d\n",
+      uerr("ERROR: Failed to get configuration descriptor, length=%d: %d\n",
            cfglen, ret);
       goto errout;
     }
@@ -512,7 +506,7 @@ int usbhost_enumerate(FAR struct usbhost_hubport_s *hport,
   ret = DRVR_CTRLOUT(hport->drvr, hport->ep0, ctrlreq, NULL);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to set configuration: %d\n", ret);
+      uerr("ERROR: Failed to set configuration: %d\n", ret);
       goto errout;
     }
 
@@ -530,7 +524,7 @@ int usbhost_enumerate(FAR struct usbhost_hubport_s *hport,
       ret = usbhost_configdesc(buffer, cfglen, &id);
       if (ret < 0)
         {
-          udbg("ERROR: usbhost_configdesc failed: %d\n", ret);
+          uerr("ERROR: usbhost_configdesc failed: %d\n", ret);
           goto errout;
         }
     }
@@ -539,15 +533,38 @@ int usbhost_enumerate(FAR struct usbhost_hubport_s *hport,
 
   usleep(100*1000);
 
-  /* Parse the configuration descriptor and bind to the class instance for the
-   * device.  This needs to be the last thing done because the class driver
-   * will begin configuring the device.
+#ifdef CONFIG_USBHOST_COMPOSITE
+  /* Check if the device attached to the downstream port if a USB composite
+   * device and, if so, create the composite device wrapper and bind it to
+   * the HCD.
+   *
+   * usbhost_composite() will return a negated errno value is on any
+   * failure.  The value -ENOENT, in particular means that the attached
+   * device is not a composite device.  Other values would indicate other
+   * various, unexpected failures.  We make no real distinction here.
    */
 
-  ret = usbhost_classbind(hport, buffer, cfglen, &id, devclass);
-  if (ret < 0)
+  ret = usbhost_composite(hport, buffer, cfglen, &id, devclass);
+  if (ret >= 0)
     {
-      udbg("ERROR: usbhost_classbind failed %d\n", ret);
+      uinfo("usbhost_composite has bound the composite device\n");
+    }
+
+  /* Apparently this is not a composite device */
+
+  else
+#endif
+    {
+      /* Parse the configuration descriptor and bind to the class instance
+       * for the device.  This needs to be the last thing done because the
+       * class driver will begin configuring the device.
+       */
+
+      ret = usbhost_classbind(hport, buffer, cfglen, &id, devclass);
+      if (ret < 0)
+        {
+          uerr("ERROR: usbhost_classbind failed %d\n", ret);
+        }
     }
 
 errout:
diff --git a/drivers/usbhost/usbhost_findclass.c b/drivers/usbhost/usbhost_findclass.c
index b544b60f484c1df2f67f02b40817b4e5aed681e5..7ae1cad4dc8d952c38232b4f61bfc220aa3fca5d 100644
--- a/drivers/usbhost/usbhost_findclass.c
+++ b/drivers/usbhost/usbhost_findclass.c
@@ -72,7 +72,7 @@
 static bool usbhost_idmatch(const struct usbhost_id_s *classid,
                             const struct usbhost_id_s *devid)
 {
-  uvdbg("Compare to class:%d subclass:%d protocol:%d vid:%04x pid:%04x\n",
+  uinfo("Compare to class:%d subclass:%d protocol:%d vid:%04x pid:%04x\n",
          classid->base, classid->subclass, classid->proto,
          classid->vid, classid->pid);
 
@@ -142,7 +142,7 @@ const struct usbhost_registry_s *usbhost_findclass(const struct usbhost_id_s *id
   int ndx;
 
   DEBUGASSERT(id);
-  uvdbg("Looking for class:%d subclass:%d protocol:%d vid:%04x pid:%04x\n",
+  uinfo("Looking for class:%d subclass:%d protocol:%d vid:%04x pid:%04x\n",
         id->base, id->subclass, id->proto, id->vid, id->pid);
 
   /* g_classregistry is a singly-linked list of class ID information added by
@@ -161,7 +161,7 @@ const struct usbhost_registry_s *usbhost_findclass(const struct usbhost_id_s *id
        * protocol, then try each.
        */
 
-     uvdbg("Checking class:%p nids:%d\n", usbclass, usbclass->nids);
+     uinfo("Checking class:%p nids:%d\n", usbclass, usbclass->nids);
      for (ndx = 0; ndx < usbclass->nids; ndx++)
         {
           /* Did we find a matching ID? */
diff --git a/drivers/usbhost/usbhost_hidkbd.c b/drivers/usbhost/usbhost_hidkbd.c
index b36434dd31916e14ed54d5c61806be1bc8e63b77..6a5be0e9ba25abf9ac7102c7f44c84bf3bbed419 100644
--- a/drivers/usbhost/usbhost_hidkbd.c
+++ b/drivers/usbhost/usbhost_hidkbd.c
@@ -60,6 +60,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -176,14 +177,10 @@
  */
 
 #ifndef CONFIG_DEBUG_INPUT
-#  undef  idbg
-#  define idbg    udbg
-#  undef  illdbg
-#  define illdbg  ulldbg
-#  undef  ivdbg
-#  define ivdbg   uvdbg
-#  undef  illvdbg
-#  define illvdbg ullvdbg
+#  undef  ierr
+#  define ierr    uerr
+#  undef  iinfo
+#  define iinfo   uinfo
 #endif
 
 /****************************************************************************
@@ -631,7 +628,7 @@ static void usbhost_pollnotify(FAR struct usbhost_state_s *priv)
           fds->revents |= (fds->events & POLLIN);
           if (fds->revents != 0)
             {
-              uvdbg("Report events: %02x\n", fds->revents);
+              uinfo("Report events: %02x\n", fds->revents);
               sem_post(fds->sem);
             }
         }
@@ -664,7 +661,7 @@ static inline FAR struct usbhost_state_s *usbhost_allocclass(void)
 
   DEBUGASSERT(!up_interrupt_context());
   priv = (FAR struct usbhost_state_s *)kmm_malloc(sizeof(struct usbhost_state_s));
-  uvdbg("Allocated: %p\n", priv);
+  uinfo("Allocated: %p\n", priv);
   return priv;
 }
 
@@ -688,7 +685,7 @@ static inline void usbhost_freeclass(FAR struct usbhost_state_s *usbclass)
 
   /* Free the class instance. */
 
-  uvdbg("Freeing: %p\n", usbclass);
+  uinfo("Freeing: %p\n", usbclass);
   sched_kfree(usbclass);
 }
 
@@ -764,11 +761,11 @@ static void usbhost_destroy(FAR void *arg)
   DEBUGASSERT(priv != NULL && priv->usbclass.hport != NULL);
   hport = priv->usbclass.hport;
 
-  uvdbg("crefs: %d\n", priv->crefs);
+  uinfo("crefs: %d\n", priv->crefs);
 
   /* Unregister the driver */
 
-  uvdbg("Unregister driver\n");
+  uinfo("Unregister driver\n");
   usbhost_mkdevname(priv, devname);
   (void)unregister_driver(devname);
 
@@ -965,7 +962,7 @@ static inline void usbhost_encodescancode(FAR struct usbhost_state_s *priv,
       /* Yes the value is within range */
 
       encoded = encoding[scancode - FIRST_ENCODING];
-      ivdbg("  scancode: %02x modifier: %02x encoded: %d\n",
+      iinfo("  scancode: %02x modifier: %02x encoded: %d\n",
             scancode, modifier, encoded);
 
       if (encoded)
@@ -1010,7 +1007,7 @@ static int usbhost_kbdpoll(int argc, char *argv[])
 #ifndef CONFIG_HIDKBD_NODEBOUNCE
   uint8_t lastkey[6] = {0, 0, 0, 0, 0, 0};
 #endif
-#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_INFO)
   unsigned int npolls = 0;
 #endif
   unsigned int nerrors = 0;
@@ -1019,7 +1016,7 @@ static int usbhost_kbdpoll(int argc, char *argv[])
   bool newstate;
   int ret;
 
-  uvdbg("Started\n");
+  uinfo("Started\n");
 
   /* Synchronize with the start-up logic.  Get the private instance, re-start
    * the start-up logic, and wait a bit to make sure that all of the class
@@ -1041,7 +1038,7 @@ static int usbhost_kbdpoll(int argc, char *argv[])
 
   /* Loop here until the device is disconnected */
 
-  uvdbg("Entering poll loop\n");
+  uinfo("Entering poll loop\n");
 
   while (!priv->disconnected)
     {
@@ -1082,12 +1079,12 @@ static int usbhost_kbdpoll(int argc, char *argv[])
       if (ret < 0)
         {
           nerrors++;
-          udbg("ERROR: GETREPORT/INPUT, DRVR_CTRLIN returned: %d/%d\n",
+          uerr("ERROR: GETREPORT/INPUT, DRVR_CTRLIN returned: %d/%d\n",
                ret, nerrors);
 
           if (nerrors > 200)
             {
-              udbg("Too many errors... aborting: %d\n", nerrors);
+              uerr("  Too many errors... aborting: %d\n", nerrors);
               break;
             }
         }
@@ -1143,7 +1140,7 @@ static int usbhost_kbdpoll(int argc, char *argv[])
                    */
 
                   keycode = usbhost_mapscancode(rpt->key[i], rpt->modifier);
-                  ivdbg("Key %d: %02x keycode:%c modifier: %02x\n",
+                  iinfo("Key %d: %02x keycode:%c modifier: %02x\n",
                          i, rpt->key[i], keycode ? keycode : ' ', rpt->modifier);
 
                   /* Zero at this point means that the key does not map to a
@@ -1223,11 +1220,11 @@ static int usbhost_kbdpoll(int argc, char *argv[])
        * polling is still happening.
        */
 
-#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_INFO)
       npolls++;
       if ((npolls & 31) == 0)
         {
-          udbg("Still polling: %d\n", npolls);
+          uinfo("Still polling: %d\n", npolls);
         }
 #endif
       /* Wait for the required amount (or until a signal is received).  We
@@ -1267,7 +1264,7 @@ static int usbhost_kbdpoll(int argc, char *argv[])
    * of the file descriptors are closed.
    */
 
-  udbg("Keyboard removed, polling halted\n");
+  uinfo("Keyboard removed, polling halted\n");
 
   flags = enter_critical_section();
   priv->polling = false;
@@ -1390,7 +1387,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
           {
             FAR struct usb_ifdesc_s *ifdesc = (FAR struct usb_ifdesc_s *)configdesc;
 
-            uvdbg("Interface descriptor\n");
+            uinfo("Interface descriptor\n");
             DEBUGASSERT(remaining >= USB_SIZEOF_IFDESC);
 
             /* Did we already find what we needed from a preceding interface? */
@@ -1418,7 +1415,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
         /* HID descriptor */
 
         case USBHID_DESCTYPE_HID:
-            uvdbg("HID descriptor\n");
+            uinfo("HID descriptor\n");
             break;
 
         /* Endpoint descriptor.  We expect one or two interrupt endpoints,
@@ -1429,7 +1426,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
           {
             FAR struct usb_epdesc_s *epdesc = (FAR struct usb_epdesc_s *)configdesc;
 
-            uvdbg("Endpoint descriptor\n");
+            uinfo("Endpoint descriptor\n");
             DEBUGASSERT(remaining >= USB_SIZEOF_EPDESC);
 
             /* Check for an interrupt endpoint. */
@@ -1463,7 +1460,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
                     epoutdesc.xfrtype      = USB_EP_ATTR_XFER_INT;
                     epoutdesc.interval     = epdesc->interval;
                     epoutdesc.mxpacketsize = usbhost_getle16(epdesc->mxpacketsize);
-                    uvdbg("Interrupt OUT EP addr:%d mxpacketsize:%d\n",
+                    uinfo("Interrupt OUT EP addr:%d mxpacketsize:%d\n",
                           epoutdesc.addr, epoutdesc.mxpacketsize);
                   }
                 else
@@ -1491,7 +1488,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
                     epindesc.xfrtype      = USB_EP_ATTR_XFER_INT;
                     epindesc.interval     = epdesc->interval;
                     epindesc.mxpacketsize = usbhost_getle16(epdesc->mxpacketsize);
-                    uvdbg("Interrupt IN EP addr:%d mxpacketsize:%d\n",
+                    uinfo("Interrupt IN EP addr:%d mxpacketsize:%d\n",
                           epindesc.addr, epindesc.mxpacketsize);
                   }
               }
@@ -1501,7 +1498,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
         /* Other descriptors are just ignored for now */
 
         default:
-          uvdbg("Other descriptor: %d\n", desc->type);
+          uinfo("Other descriptor: %d\n", desc->type);
           break;
         }
 
@@ -1524,9 +1521,9 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
 
   if ((found & USBHOST_RQDFOUND) != USBHOST_RQDFOUND)
     {
-      ulldbg("ERROR: Found IF:%s EPIN:%s\n",
-             (found & USBHOST_IFFOUND) != 0  ? "YES" : "NO",
-             (found & USBHOST_EPINFOUND) != 0 ? "YES" : "NO");
+      uerr("ERROR: Found IF:%s EPIN:%s\n",
+           (found & USBHOST_IFFOUND) != 0  ? "YES" : "NO",
+           (found & USBHOST_EPINFOUND) != 0 ? "YES" : "NO");
       return -EINVAL;
     }
 
@@ -1537,27 +1534,27 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
   ret = DRVR_EPALLOC(hport->drvr, &epindesc, &priv->epin);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to allocate interrupt IN endpoint\n");
+      uerr("ERROR: Failed to allocate interrupt IN endpoint\n");
       return ret;
     }
 
   /* Then the optional interrupt OUT endpoint */
 
-  ullvdbg("Found EPOOUT:%s\n",
-         (found & USBHOST_EPOUTFOUND) != 0 ? "YES" : "NO");
+  uinfo("Found EPOOUT:%s\n",
+       (found & USBHOST_EPOUTFOUND) != 0 ? "YES" : "NO");
 
   if ((found & USBHOST_EPOUTFOUND) != 0)
     {
       ret = DRVR_EPALLOC(hport->drvr, &epoutdesc, &priv->epout);
       if (ret < 0)
         {
-          udbg("ERROR: Failed to allocate interrupt OUT endpoint\n");
+          uerr("ERROR: Failed to allocate interrupt OUT endpoint\n");
           (void)DRVR_EPFREE(hport->drvr, priv->epin);
           return ret;
         }
     }
 
-  ullvdbg("Endpoints allocated\n");
+  uinfo("Endpoints allocated\n");
   return OK;
 }
 
@@ -1590,7 +1587,7 @@ static inline int usbhost_devinit(FAR struct usbhost_state_s *priv)
   ret = usbhost_tdalloc(priv);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to allocate transfer buffer\n");
+      uerr("ERROR: Failed to allocate transfer buffer\n");
       return ret;
     }
 
@@ -1608,7 +1605,7 @@ static inline int usbhost_devinit(FAR struct usbhost_state_s *priv)
    * memory resources, primarily for the dedicated stack (CONFIG_HIDKBD_STACKSIZE).
    */
 
-  uvdbg("Start poll task\n");
+  uinfo("Start poll task\n");
 
   /* The inputs to a task started by kernel_thread() are very awkard for this
    * purpose.  They are really designed for command line tasks (argc/argv). So
@@ -1641,7 +1638,7 @@ static inline int usbhost_devinit(FAR struct usbhost_state_s *priv)
 
   /* Register the driver */
 
-  uvdbg("Register driver\n");
+  uinfo("Register driver\n");
   usbhost_mkdevname(priv, devname);
   ret = register_driver(devname, &g_hidkbd_fops, 0666, priv);
 
@@ -1868,6 +1865,12 @@ static FAR struct usbhost_class_s *
           sem_init(&priv->exclsem, 0, 1);
           sem_init(&priv->waitsem, 0, 0);
 
+          /* The waitsem semaphore is used for signaling and, hence, should
+           * not have priority inheritance enabled.
+           */
+
+          sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
+
           /* Return the instance of the USB keyboard class driver */
 
           return &priv->usbclass;
@@ -1932,7 +1935,7 @@ static int usbhost_connect(FAR struct usbhost_class_s *usbclass,
   ret = usbhost_cfgdesc(priv, configdesc, desclen);
   if (ret < 0)
     {
-      udbg("usbhost_cfgdesc() failed: %d\n", ret);
+      uerr("ERROR: usbhost_cfgdesc() failed: %d\n", ret);
     }
   else
     {
@@ -1941,7 +1944,7 @@ static int usbhost_connect(FAR struct usbhost_class_s *usbclass,
       ret = usbhost_devinit(priv);
       if (ret < 0)
         {
-          udbg("usbhost_devinit() failed: %d\n", ret);
+          uerr("ERROR: usbhost_devinit() failed: %d\n", ret);
         }
     }
 
@@ -1991,7 +1994,7 @@ static int usbhost_disconnected(struct usbhost_class_s *usbclass)
    */
 
   priv->disconnected = true;
-  ullvdbg("Disconnected\n");
+  uinfo("Disconnected\n");
 
   /* Is there a thread waiting for keyboard data that will never come? */
 
@@ -2054,7 +2057,7 @@ static int usbhost_open(FAR struct file *filep)
   irqstate_t flags;
   int ret;
 
-  uvdbg("Entry\n");
+  uinfo("Entry\n");
   DEBUGASSERT(filep && filep->f_inode);
   inode = filep->f_inode;
   priv  = inode->i_private;
@@ -2107,7 +2110,7 @@ static int usbhost_close(FAR struct file *filep)
   FAR struct usbhost_state_s *priv;
   irqstate_t flags;
 
-  uvdbg("Entry\n");
+  uinfo("Entry\n");
   DEBUGASSERT(filep && filep->f_inode);
   inode = filep->f_inode;
   priv  = inode->i_private;
@@ -2201,7 +2204,7 @@ static ssize_t usbhost_read(FAR struct file *filep, FAR char *buffer, size_t len
   unsigned int                tail;
   int                         ret;
 
-  uvdbg("Entry\n");
+  uinfo("Entry\n");
   DEBUGASSERT(filep && filep->f_inode && buffer);
   inode = filep->f_inode;
   priv  = inode->i_private;
@@ -2242,7 +2245,7 @@ static ssize_t usbhost_read(FAR struct file *filep, FAR char *buffer, size_t len
 
           /* Wait for data to be available */
 
-          uvdbg("Waiting...\n");
+          uinfo("Waiting...\n");
 
           priv->waiting = true;
           usbhost_givesem(&priv->exclsem);
@@ -2321,7 +2324,7 @@ static int usbhost_poll(FAR struct file *filep, FAR struct pollfd *fds,
   int                         ret = OK;
   int                         i;
 
-  uvdbg("Entry\n");
+  uinfo("Entry\n");
   DEBUGASSERT(filep && filep->f_inode && fds);
   inode = filep->f_inode;
   priv  = inode->i_private;
@@ -2427,6 +2430,12 @@ int usbhost_kbdinit(void)
   sem_init(&g_exclsem, 0, 1);
   sem_init(&g_syncsem, 0, 0);
 
+  /* The g_syncsem semaphore is used for signaling and, hence, should not
+   * have priority inheritance enabled.
+   */
+
+  sem_setprotocol(&g_syncsem, SEM_PRIO_NONE);
+
   /* Advertise our availability to support (certain) devices */
 
   return usbhost_registerclass(&g_hidkbd);
diff --git a/drivers/usbhost/usbhost_hidmouse.c b/drivers/usbhost/usbhost_hidmouse.c
index c61541d9c2a479d838cd8a6a16a8693a36b78932..dbd003392012eceee17d90a2eb6384cf25f24607 100644
--- a/drivers/usbhost/usbhost_hidmouse.c
+++ b/drivers/usbhost/usbhost_hidmouse.c
@@ -57,6 +57,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -197,14 +198,10 @@
  */
 
 #ifndef CONFIG_DEBUG_INPUT
-#  undef  idbg
-#  define idbg    udbg
-#  undef  illdbg
-#  define illdbg  ulldbg
-#  undef  ivdbg
-#  define ivdbg   uvdbg
-#  undef  illvdbg
-#  define illvdbg ullvdbg
+#  undef  ierr
+#  define ierr    uerr
+#  undef  iinfo
+#  define iinfo   uinfo
 #endif
 
 /****************************************************************************
@@ -491,7 +488,7 @@ static void usbhost_pollnotify(FAR struct usbhost_state_s *priv)
           fds->revents |= (fds->events & POLLIN);
           if (fds->revents != 0)
             {
-              uvdbg("Report events: %02x\n", fds->revents);
+              uinfo("Report events: %02x\n", fds->revents);
               sem_post(fds->sem);
             }
         }
@@ -524,7 +521,7 @@ static inline FAR struct usbhost_state_s *usbhost_allocclass(void)
 
   DEBUGASSERT(!up_interrupt_context());
   priv = (FAR struct usbhost_state_s *)kmm_malloc(sizeof(struct usbhost_state_s));
-  uvdbg("Allocated: %p\n", priv);
+  uinfo("Allocated: %p\n", priv);
   return priv;
 }
 
@@ -548,7 +545,7 @@ static inline void usbhost_freeclass(FAR struct usbhost_state_s *usbclass)
 
   /* Free the class instance. */
 
-  uvdbg("Freeing: %p\n", usbclass);
+  uinfo("Freeing: %p\n", usbclass);
   sched_kfree(usbclass);
 }
 
@@ -623,13 +620,13 @@ static void usbhost_destroy(FAR void *arg)
   char devname[DEV_NAMELEN];
 
   DEBUGASSERT(priv != NULL && priv->usbclass.hport != NULL);
-  uvdbg("crefs: %d\n", priv->crefs);
+  uinfo("crefs: %d\n", priv->crefs);
 
   hport = priv->usbclass.hport;
 
   /* Unregister the driver */
 
-  uvdbg("Unregister driver\n");
+  uinfo("Unregister driver\n");
   usbhost_mkdevname(priv, devname);
   (void)unregister_driver(devname);
 
@@ -709,7 +706,7 @@ static void usbhost_notify(FAR struct usbhost_state_s *priv)
       if (fds)
         {
           fds->revents |= POLLIN;
-          ivdbg("Report events: %02x\n", fds->revents);
+          iinfo("Report events: %02x\n", fds->revents);
           sem_post(fds->sem);
         }
     }
@@ -1049,14 +1046,14 @@ static int usbhost_mouse_poll(int argc, char *argv[])
 #ifndef CONFIG_HIDMOUSE_TSCIF
   uint8_t buttons;
 #endif
-#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_INFO)
   unsigned int npolls = 0;
 #endif
   unsigned int nerrors = 0;
   ssize_t nbytes;
   int ret = OK;
 
-  uvdbg("Started\n");
+  uinfo("Started\n");
 
   /* Synchronize with the start-up logic.  Get the private instance, re-start
    * the start-up logic, and wait a bit to make sure that all of the class
@@ -1078,7 +1075,7 @@ static int usbhost_mouse_poll(int argc, char *argv[])
 
   /* Loop here until the device is disconnected */
 
-  uvdbg("Entering poll loop\n");
+  uinfo("Entering poll loop\n");
 
   while (!priv->disconnected)
     {
@@ -1101,14 +1098,14 @@ static int usbhost_mouse_poll(int argc, char *argv[])
            * long time).
            */
 
-          udbg("ERROR: DRVR_TRANSFER returned: %d/%u\n",
+          uerr("ERROR: DRVR_TRANSFER returned: %d/%u\n",
                (int)nbytes, nerrors);
 
           if (nbytes != -EAGAIN)
             {
               if (++nerrors > 200)
                 {
-                  udbg("Too many errors... aborting: %d\n", nerrors);
+                  uerr("  Too many errors... aborting: %d\n", nerrors);
                   ret = (int)nbytes;
                   break;
                 }
@@ -1208,11 +1205,11 @@ static int usbhost_mouse_poll(int argc, char *argv[])
        * polling is still happening.
        */
 
-#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_INFO)
       npolls++;
       if ((npolls & 31) == 0)
         {
-          udbg("Still polling: %d\n", npolls);
+          uinfo("Still polling: %d\n", npolls);
         }
 #endif
     }
@@ -1233,7 +1230,7 @@ static int usbhost_mouse_poll(int argc, char *argv[])
    * of the file descriptors are closed.
    */
 
-  udbg("Mouse removed, polling halted\n");
+  uinfo("Mouse removed, polling halted\n");
 
   flags = enter_critical_section();
   priv->polling = false;
@@ -1378,7 +1375,7 @@ static int usbhost_waitsample(FAR struct usbhost_state_s *priv,
     {
       /* Wait for a change in the HIDMOUSE state */
 
-      ivdbg("Waiting..\n");
+      iinfo("Waiting..\n");
       priv->nwaiters++;
       ret = sem_wait(&priv->waitsem);
       priv->nwaiters--;
@@ -1389,7 +1386,7 @@ static int usbhost_waitsample(FAR struct usbhost_state_s *priv,
            * the failure now.
            */
 
-          idbg("sem_wait: %d\n", errno);
+          ierr("ERROR: sem_wait: %d\n", errno);
           DEBUGASSERT(errno == EINTR);
           ret = -EINTR;
           goto errout;
@@ -1404,7 +1401,7 @@ static int usbhost_waitsample(FAR struct usbhost_state_s *priv,
         }
     }
 
-  ivdbg("Sampled\n");
+  iinfo("Sampled\n");
 
   /* Re-acquire the semaphore that manages mutually exclusive access to
    * the device structure.  We may have to wait here.  But we have our sample.
@@ -1509,7 +1506,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
 
         case USB_DESC_TYPE_INTERFACE:
           {
-            uvdbg("Interface descriptor\n");
+            uinfo("Interface descriptor\n");
             DEBUGASSERT(remaining >= USB_SIZEOF_IFDESC);
 
             /* Did we already find what we needed from a preceding interface? */
@@ -1534,7 +1531,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
         /* HID descriptor */
 
         case USBHID_DESCTYPE_HID:
-            uvdbg("HID descriptor\n");
+            uinfo("HID descriptor\n");
             break;
 
         /* Endpoint descriptor.  We expect one or two interrupt endpoints,
@@ -1545,7 +1542,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
           {
             FAR struct usb_epdesc_s *epdesc = (FAR struct usb_epdesc_s *)configdesc;
 
-            uvdbg("Endpoint descriptor\n");
+            uinfo("Endpoint descriptor\n");
             DEBUGASSERT(remaining >= USB_SIZEOF_EPDESC);
 
             /* Check for an interrupt endpoint. */
@@ -1580,7 +1577,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
                     epindesc.interval     = epdesc->interval;
                     epindesc.mxpacketsize = usbhost_getle16(epdesc->mxpacketsize);
 
-                    uvdbg("Interrupt IN EP addr:%d mxpacketsize:%d\n",
+                    uinfo("Interrupt IN EP addr:%d mxpacketsize:%d\n",
                           epindesc.addr, epindesc.mxpacketsize);
                   }
               }
@@ -1590,7 +1587,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
         /* Other descriptors are just ignored for now */
 
         default:
-          uvdbg("Other descriptor: %d\n", desc->type);
+          uinfo("Other descriptor: %d\n", desc->type);
           break;
         }
 
@@ -1613,9 +1610,9 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
 
   if ((found & USBHOST_ALLFOUND) != USBHOST_ALLFOUND)
     {
-      ulldbg("ERROR: Found IF:%s EPIN:%s\n",
-             (found & USBHOST_IFFOUND) != 0  ? "YES" : "NO",
-             (found & USBHOST_EPINFOUND) != 0 ? "YES" : "NO");
+      uerr("ERROR: Found IF:%s EPIN:%s\n",
+           (found & USBHOST_IFFOUND) != 0  ? "YES" : "NO",
+           (found & USBHOST_EPINFOUND) != 0 ? "YES" : "NO");
       return -EINVAL;
     }
 
@@ -1624,11 +1621,11 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
   ret = DRVR_EPALLOC(hport->drvr, &epindesc, &priv->epin);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to allocate interrupt IN endpoint\n");
+      uerr("ERROR: Failed to allocate interrupt IN endpoint\n");
       return ret;
     }
 
-  ullvdbg("Endpoint allocated\n");
+  uinfo("Endpoint allocated\n");
   return OK;
 }
 
@@ -1661,7 +1658,7 @@ static inline int usbhost_devinit(FAR struct usbhost_state_s *priv)
   ret = usbhost_tdalloc(priv);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to allocate transfer buffer\n");
+      uerr("ERROR: Failed to allocate transfer buffer\n");
       return ret;
     }
 
@@ -1679,7 +1676,7 @@ static inline int usbhost_devinit(FAR struct usbhost_state_s *priv)
    * memory resources, primarily for the dedicated stack (CONFIG_HIDMOUSE_STACKSIZE).
    */
 
-  uvdbg("Start poll task\n");
+  uinfo("Start poll task\n");
 
   /* The inputs to a task started by kernel_thread() are very awkward for this
    * purpose.  They are really designed for command line tasks (argc/argv). So
@@ -1712,7 +1709,7 @@ static inline int usbhost_devinit(FAR struct usbhost_state_s *priv)
 
   /* Register the driver */
 
-  uvdbg("Register driver\n");
+  uinfo("Register driver\n");
   usbhost_mkdevname(priv, devname);
   ret = register_driver(devname, &g_hidmouse_fops, 0666, priv);
 
@@ -1938,6 +1935,12 @@ static FAR struct usbhost_class_s *
           sem_init(&priv->exclsem, 0, 1);
           sem_init(&priv->waitsem, 0, 0);
 
+          /* The waitsem semaphore is used for signaling and, hence, should
+           * not have priority inheritance enabled.
+           */
+
+          sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
+
           /* Return the instance of the USB mouse class driver */
 
           return &priv->usbclass;
@@ -2002,7 +2005,7 @@ static int usbhost_connect(FAR struct usbhost_class_s *usbclass,
   ret = usbhost_cfgdesc(priv, configdesc, desclen);
   if (ret < 0)
     {
-      udbg("usbhost_cfgdesc() failed: %d\n", ret);
+      uerr("ERROR: usbhost_cfgdesc() failed: %d\n", ret);
     }
   else
     {
@@ -2011,7 +2014,7 @@ static int usbhost_connect(FAR struct usbhost_class_s *usbclass,
       ret = usbhost_devinit(priv);
       if (ret < 0)
         {
-          udbg("usbhost_devinit() failed: %d\n", ret);
+          uerr("ERROR: usbhost_devinit() failed: %d\n", ret);
         }
     }
 
@@ -2062,7 +2065,7 @@ static int usbhost_disconnected(struct usbhost_class_s *usbclass)
    */
 
   priv->disconnected = true;
-  ullvdbg("Disconnected\n");
+  uinfo("Disconnected\n");
 
   /* Are there a thread(s) waiting for mouse data that will never come? */
 
@@ -2124,7 +2127,7 @@ static int usbhost_open(FAR struct file *filep)
   irqstate_t flags;
   int ret;
 
-  uvdbg("Entry\n");
+  uinfo("Entry\n");
   DEBUGASSERT(filep && filep->f_inode);
   inode = filep->f_inode;
   priv  = inode->i_private;
@@ -2199,7 +2202,7 @@ static int usbhost_close(FAR struct file *filep)
   FAR struct usbhost_state_s *priv;
   irqstate_t flags;
 
-  uvdbg("Entry\n");
+  uinfo("Entry\n");
   DEBUGASSERT(filep && filep->f_inode);
   inode = filep->f_inode;
   priv  = inode->i_private;
@@ -2295,7 +2298,7 @@ static ssize_t usbhost_read(FAR struct file *filep, FAR char *buffer, size_t len
   struct mouse_sample_s       sample;
   int                         ret;
 
-  uvdbg("Entry\n");
+  uinfo("Entry\n");
   DEBUGASSERT(filep && filep->f_inode && buffer);
   inode = filep->f_inode;
   priv  = inode->i_private;
@@ -2345,7 +2348,7 @@ static ssize_t usbhost_read(FAR struct file *filep, FAR char *buffer, size_t len
         {
           /* We might have been awakened by a signal */
 
-          idbg("usbhost_waitsample: %d\n", ret);
+          ierr("ERROR: usbhost_waitsample: %d\n", ret);
           goto errout;
         }
     }
@@ -2392,10 +2395,10 @@ static ssize_t usbhost_read(FAR struct file *filep, FAR char *buffer, size_t len
       report->point[0].flags  = TOUCH_MOVE | TOUCH_ID_VALID | TOUCH_POS_VALID;
     }
 
-  ivdbg("  id:      %d\n", report->point[0].id);
-  ivdbg("  flags:   %02x\n", report->point[0].flags);
-  ivdbg("  x:       %d\n", report->point[0].x);
-  ivdbg("  y:       %d\n", report->point[0].y);
+  iinfo("  id:      %d\n", report->point[0].id);
+  iinfo("  flags:   %02x\n", report->point[0].flags);
+  iinfo("  x:       %d\n", report->point[0].x);
+  iinfo("  y:       %d\n", report->point[0].y);
 
   ret = SIZEOF_TOUCH_SAMPLE_S(1);
 #else
@@ -2414,7 +2417,7 @@ static ssize_t usbhost_read(FAR struct file *filep, FAR char *buffer, size_t len
 
 errout:
   usbhost_givesem(&priv->exclsem);
-  ivdbg("Returning: %d\n", ret);
+  iinfo("Returning: %d\n", ret);
   return (ssize_t)ret;
 }
 
@@ -2451,7 +2454,7 @@ static int usbhost_poll(FAR struct file *filep, FAR struct pollfd *fds,
   int                         ret = OK;
   int                         i;
 
-  uvdbg("Entry\n");
+  uinfo("Entry\n");
   DEBUGASSERT(filep && filep->f_inode && fds);
   inode = filep->f_inode;
   priv  = inode->i_private;
@@ -2557,6 +2560,12 @@ int usbhost_mouse_init(void)
   sem_init(&g_exclsem, 0, 1);
   sem_init(&g_syncsem, 0, 0);
 
+  /* The g_syncsem semaphore is used for signaling and, hence, should not
+   * have priority inheritance enabled.
+   */
+
+  sem_setprotocol(&g_syncsem, SEM_PRIO_NONE);
+
   /* Advertise our availability to support (certain) mouse devices */
 
   return usbhost_registerclass(&g_hidmouse);
diff --git a/drivers/usbhost/usbhost_hub.c b/drivers/usbhost/usbhost_hub.c
index 34b37f9b2997fc401ce2dc96cc851b29d8537fbc..add1455ca3bf06d14e3af1a60cfea6d275f02cf4 100644
--- a/drivers/usbhost/usbhost_hub.c
+++ b/drivers/usbhost/usbhost_hub.c
@@ -228,7 +228,7 @@ static struct usbhost_registry_s g_hub =
 
 static void usbhost_hport_deactivate(FAR struct usbhost_hubport_s *hport)
 {
-  uvdbg("Deactivating: %s port %d\n",
+  uinfo("Deactivating: %s port %d\n",
         ROOTHUB(hport) ? "Root" : "Hub", hport->port);
 
   /* Don't free the control pipe of root hub ports! */
@@ -274,7 +274,7 @@ static int usbhost_hport_activate(FAR struct usbhost_hubport_s *hport)
   struct usbhost_epdesc_s epdesc;
   int ret;
 
-  uvdbg("Activating port %d\n", hport->port);
+  uinfo("Activating port %d\n", hport->port);
 
   epdesc.hport        = hport;
   epdesc.addr         = 0;
@@ -286,7 +286,7 @@ static int usbhost_hport_activate(FAR struct usbhost_hubport_s *hport)
   ret = DRVR_EPALLOC(hport->drvr, &epdesc, &hport->ep0);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to allocate ep0: %d\n", ret);
+      uerr("ERROR: Failed to allocate ep0: %d\n", ret);
     }
 
   return ret;
@@ -384,7 +384,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_class_s *hubclass,
             FAR struct usb_ifdesc_s *ifdesc =
               (FAR struct usb_ifdesc_s *)configdesc;
 
-            uvdbg("Interface descriptor\n");
+            uinfo("Interface descriptor\n");
             DEBUGASSERT(remaining >= USB_SIZEOF_IFDESC);
 
             /* Save the interface number and mark ONLY the interface found */
@@ -401,7 +401,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_class_s *hubclass,
             FAR struct usb_epdesc_s *epdesc =
               (FAR struct usb_epdesc_s *)configdesc;
 
-            uvdbg("Endpoint descriptor\n");
+            uinfo("Endpoint descriptor\n");
             DEBUGASSERT(remaining >= USB_SIZEOF_EPDESC);
 
             /* Check for an interrupt endpoint. */
@@ -415,7 +415,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_class_s *hubclass,
                   {
                     /* It is an OUT interrupt endpoint. Ignore */
 
-                    uvdbg("Interrupt OUT EP addr:%d mxpacketsize:%d\n",
+                    uinfo("Interrupt OUT EP addr:%d mxpacketsize:%d\n",
                           (epdesc->addr & USB_EP_ADDR_NUMBER_MASK),
                           usbhost_getle16(epdesc->mxpacketsize));
                   }
@@ -431,7 +431,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_class_s *hubclass,
                     intindesc.interval     = epdesc->interval;
                     intindesc.mxpacketsize = usbhost_getle16(epdesc->mxpacketsize);
 
-                    uvdbg("Interrupt IN EP: addr=%d interval=%d mxpacketsize=%d\n",
+                    uinfo("Interrupt IN EP: addr=%d interval=%d mxpacketsize=%d\n",
                           intindesc.addr, intindesc.interval, intindesc.mxpacketsize);
                   }
               }
@@ -463,9 +463,9 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_class_s *hubclass,
 
   if (found != USBHOST_ALLFOUND)
     {
-      ulldbg("ERROR: Found IF=%s EPIN=%s\n",
-             (found & USBHOST_IFFOUND) != 0  ? "YES" : "NO",
-             (found & USBHOST_EPINFOUND) != 0 ? "YES" : "NO");
+      uerr("ERROR: Found IF=%s EPIN=%s\n",
+           (found & USBHOST_IFFOUND) != 0  ? "YES" : "NO",
+           (found & USBHOST_EPINFOUND) != 0 ? "YES" : "NO");
       return -EINVAL;
     }
 
@@ -474,12 +474,12 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_class_s *hubclass,
   ret = DRVR_EPALLOC(hport->drvr, &intindesc, &priv->intin);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to allocate Interrupt IN endpoint: %d\n", ret);
+      uerr("ERROR: Failed to allocate Interrupt IN endpoint: %d\n", ret);
       (void)DRVR_EPFREE(hport->drvr, priv->intin);
       return ret;
     }
 
-  ullvdbg("Endpoint allocated\n");
+  uinfo("Endpoint allocated\n");
   return OK;
 }
 
@@ -513,7 +513,7 @@ static inline int usbhost_hubdesc(FAR struct usbhost_class_s *hubclass)
   uint16_t hubchar;
   int ret;
 
-  uvdbg("Read hub descriptor\n");
+  uinfo("Read hub descriptor\n");
 
   DEBUGASSERT(hubclass != NULL);
   priv = &((FAR struct usbhost_hubclass_s *)hubclass)->hubpriv;
@@ -535,7 +535,7 @@ static inline int usbhost_hubdesc(FAR struct usbhost_class_s *hubclass)
   ret = DRVR_CTRLIN(hport->drvr, hport->ep0, ctrlreq, (FAR uint8_t *)&hubdesc);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to read hub descriptor: %d\n", ret);
+      uerr("ERROR: Failed to read hub descriptor: %d\n", ret);
       return ret;
     }
 
@@ -550,20 +550,20 @@ static inline int usbhost_hubdesc(FAR struct usbhost_class_s *hubclass)
   priv->pwrondelay  = (2 * hubdesc.pwrondelay);
   priv->ctrlcurrent = hubdesc.ctrlcurrent;
 
-  uvdbg("Hub Descriptor:\n");
-  uvdbg("  bDescLength:         %d\n", hubdesc.len);
-  uvdbg("  bDescriptorType:     0x%02x\n", hubdesc.type);
-  uvdbg("  bNbrPorts:           %d\n", hubdesc.nports);
-  uvdbg("  wHubCharacteristics: 0x%04x\n", usbhost_getle16(hubdesc.characteristics));
-  uvdbg("    lpsm:              %d\n", priv->lpsm);
-  uvdbg("    compounddev:       %s\n", priv->compounddev ? "TRUE" : "FALSE");
-  uvdbg("    ocmode:            %d\n", priv->ocmode);
-  uvdbg("    indicator:         %s\n", priv->indicator ? "TRUE" : "FALSE");
-  uvdbg("  bPwrOn2PwrGood:      %d\n", hubdesc.pwrondelay);
-  uvdbg("    pwrondelay:        %d\n", priv->pwrondelay);
-  uvdbg("  bHubContrCurrent:    %d\n", hubdesc.ctrlcurrent);
-  uvdbg("  DeviceRemovable:     %d\n", hubdesc.devattached);
-  uvdbg("  PortPwrCtrlMask:     %d\n", hubdesc.pwrctrlmask);
+  uinfo("Hub Descriptor:\n");
+  uinfo("  bDescLength:         %d\n", hubdesc.len);
+  uinfo("  bDescriptorType:     0x%02x\n", hubdesc.type);
+  uinfo("  bNbrPorts:           %d\n", hubdesc.nports);
+  uinfo("  wHubCharacteristics: 0x%04x\n", usbhost_getle16(hubdesc.characteristics));
+  uinfo("    lpsm:              %d\n", priv->lpsm);
+  uinfo("    compounddev:       %s\n", priv->compounddev ? "TRUE" : "FALSE");
+  uinfo("    ocmode:            %d\n", priv->ocmode);
+  uinfo("    indicator:         %s\n", priv->indicator ? "TRUE" : "FALSE");
+  uinfo("  bPwrOn2PwrGood:      %d\n", hubdesc.pwrondelay);
+  uinfo("    pwrondelay:        %d\n", priv->pwrondelay);
+  uinfo("  bHubContrCurrent:    %d\n", hubdesc.ctrlcurrent);
+  uinfo("  DeviceRemovable:     %d\n", hubdesc.devattached);
+  uinfo("  PortPwrCtrlMask:     %d\n", hubdesc.pwrctrlmask);
 
   return OK;
 }
@@ -642,7 +642,7 @@ static int usbhost_hubpwr(FAR struct usbhost_hubpriv_s *priv,
        ret = DRVR_CTRLOUT(hport->drvr, hport->ep0, ctrlreq, NULL);
        if (ret < 0)
          {
-           udbg("ERROR: Failed to power %s port %d: %d\n",
+           uerr("ERROR: Failed to power %s port %d: %d\n",
                 on ? "UP" : "DOWN", port, ret);
            return ret;
         }
@@ -694,7 +694,7 @@ static void usbhost_hub_event(FAR void *arg)
 
   if (priv->disconnected)
     {
-      uvdbg("Disconnected\n");
+      uinfo("Disconnected\n");
       return;
     }
 
@@ -707,7 +707,7 @@ static void usbhost_hub_event(FAR void *arg)
   hport = hubclass->hport;
 
   statuschange = priv->buffer[0];
-  uvdbg("StatusChange: %02x\n", statuschange);
+  uinfo("StatusChange: %02x\n", statuschange);
 
   /* Check for status change on any port */
 
@@ -720,7 +720,7 @@ static void usbhost_hub_event(FAR void *arg)
           continue;
         }
 
-      uvdbg("Port %d status change\n", port);
+      uinfo("Port %d status change\n", port);
 
       /* Port status changed, check what happened */
 
@@ -738,7 +738,7 @@ static void usbhost_hub_event(FAR void *arg)
                         (FAR uint8_t *)&portstatus);
       if (ret < 0)
         {
-          udbg("ERROR: Failed to read port %d status: %d\n", port, ret);
+          uerr("ERROR: Failed to read port %d status: %d\n", port, ret);
           continue;
         }
 
@@ -762,7 +762,7 @@ static void usbhost_hub_event(FAR void *arg)
               ret = DRVR_CTRLOUT(hport->drvr, hport->ep0, ctrlreq, NULL);
               if (ret < 0)
                 {
-                  udbg("ERROR: Failed to clear port %d change mask %04x: %d\n",
+                  uerr("ERROR: Failed to clear port %d change mask %04x: %d\n",
                        port, mask, ret);
                 }
 
@@ -783,7 +783,7 @@ static void usbhost_hub_event(FAR void *arg)
           uint16_t debouncestable = 0;
           uint16_t connection = 0xffff;
 
-          uvdbg("Port %d status %04x change %04x\n", port, status, change);
+          uinfo("Port %d status %04x change %04x\n", port, status, change);
 
           /* Debounce */
 
@@ -799,7 +799,7 @@ static void usbhost_hub_event(FAR void *arg)
                                 (FAR uint8_t *)&portstatus);
               if (ret < 0)
                 {
-                  udbg("ERROR: Failed to get port %d status: %d\n", port, ret);
+                  uerr("ERROR: Failed to get port %d status: %d\n", port, ret);
                   break;
                 }
 
@@ -812,7 +812,7 @@ static void usbhost_hub_event(FAR void *arg)
                   debouncestable += 25;
                   if (debouncestable >= 100)
                     {
-                      uvdbg("Port %d debouncestable=%d\n", port, debouncestable);
+                      uinfo("Port %d debouncestable=%d\n", port, debouncestable);
                       break;
                     }
                 }
@@ -839,7 +839,7 @@ static void usbhost_hub_event(FAR void *arg)
 
           if (ret < 0 || debouncetime >= 1500)
             {
-              udbg("ERROR: Failed to debounce port %d: %d\n", port, ret);
+              uerr("ERROR: Failed to debounce port %d: %d\n", port, ret);
               continue;
             }
 
@@ -847,7 +847,7 @@ static void usbhost_hub_event(FAR void *arg)
             {
               /* Device connected to a port on the hub */
 
-              uvdbg("Connection on port %d\n", port);
+              uinfo("Connection on port %d\n", port);
 
               ctrlreq->type = USBHUB_REQ_TYPE_PORT;
               ctrlreq->req  = USBHUB_REQ_SETFEATURE;
@@ -858,7 +858,7 @@ static void usbhost_hub_event(FAR void *arg)
               ret = DRVR_CTRLOUT(hport->drvr, hport->ep0, ctrlreq, NULL);
               if (ret < 0)
                 {
-                  udbg("ERROR: Failed to reset port %d: %d\n", port, ret);
+                  uerr("ERROR: Failed to reset port %d: %d\n", port, ret);
                   continue;
                 }
 
@@ -874,14 +874,14 @@ static void usbhost_hub_event(FAR void *arg)
                                 (FAR uint8_t *)&portstatus);
               if (ret < 0)
                 {
-                  udbg("ERROR: Failed to get port %d status: %d\n", port, ret);
+                  uerr("ERROR: Failed to get port %d status: %d\n", port, ret);
                   continue;
                 }
 
               status = usbhost_getle16(portstatus.status);
               change = usbhost_getle16(portstatus.change);
 
-              uvdbg("port %d status %04x change %04x after reset\n",
+              uinfo("port %d status %04x change %04x after reset\n",
                     port, status, change);
 
               if ((status & USBHUB_PORT_STAT_RESET)  == 0 &&
@@ -917,7 +917,7 @@ static void usbhost_hub_event(FAR void *arg)
                   ret = usbhost_hport_activate(connport);
                   if (ret < 0)
                     {
-                      udbg("ERROR: usbhost_hport_activate failed: %d\n", ret);
+                      uerr("ERROR: usbhost_hport_activate failed: %d\n", ret);
                     }
                   else
                     {
@@ -926,14 +926,14 @@ static void usbhost_hub_event(FAR void *arg)
                       ret = DRVR_CONNECT(connport->drvr, connport, true);
                       if (ret < 0)
                         {
-                          udbg("ERROR: DRVR_CONNECT failed: %d\n", ret);
+                          uerr("ERROR: DRVR_CONNECT failed: %d\n", ret);
                           usbhost_hport_deactivate(connport);
                         }
                     }
                 }
               else
                 {
-                  udbg("ERROR: Failed to enable port %d\n", port);
+                  uerr("ERROR: Failed to enable port %d\n", port);
                   continue;
                 }
             }
@@ -943,7 +943,7 @@ static void usbhost_hub_event(FAR void *arg)
                * resources.
                */
 
-              uvdbg("Disconnection on port %d\n", port);
+              uinfo("Disconnection on port %d\n", port);
 
               /* Free any devices classes connect on this hub port */
 
@@ -961,7 +961,7 @@ static void usbhost_hub_event(FAR void *arg)
         }
       else if (change)
         {
-          udbg("WARNING: status %04x change %04x not handled\n", status, change);
+          uwarn("WARNING: status %04x change %04x not handled\n", status, change);
         }
     }
 
@@ -971,7 +971,7 @@ static void usbhost_hub_event(FAR void *arg)
     {
       /* Hub status changed */
 
-      udbg("WARNING: Hub status changed, not handled\n");
+      uwarn("WARNING: Hub status changed, not handled\n");
     }
 
   /* The preceding sequence of events may take a significant amount of
@@ -990,7 +990,7 @@ static void usbhost_hub_event(FAR void *arg)
                         INTIN_BUFSIZE, usbhost_callback, hubclass);
       if (ret < 0)
         {
-          udbg("ERROR: Failed to queue interrupt endpoint: %d\n", ret);
+          uerr("ERROR: Failed to queue interrupt endpoint: %d\n", ret);
         }
     }
 
@@ -1027,13 +1027,13 @@ static void usbhost_disconnect_event(FAR void *arg)
   irqstate_t flags;
   int port;
 
-  uvdbg("Disconnecting\n");
+  uinfo("Disconnecting\n");
 
   DEBUGASSERT(hubclass != NULL && hubclass->hport != NULL);
   priv  = &((FAR struct usbhost_hubclass_s *)hubclass)->hubpriv;
   hport = hubclass->hport;
 
-  uvdbg("Destroying hub on port  %d\n", hport->port);
+  uinfo("Destroying hub on port  %d\n", hport->port);
 
   /* Set an indication to any users of the device that the device is no
    * longer available.
@@ -1186,11 +1186,11 @@ static void usbhost_callback(FAR void *arg, ssize_t nbytes)
        * FIX:  Don't output the message is the result is -EAGAIN.
        */
 
-#if defined(CONFIG_DEBUG_USB) && !defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_USB) && !defined(CONFIG_DEBUG_INFO)
       if (nbytes != -EAGAIN)
 #endif
         {
-          ulldbg("ERROR: Transfer failed: %d\n", (int)nbytes);
+          uerr("ERROR: Transfer failed: %d\n", (int)nbytes);
         }
 
       /* Indicate there there is nothing to do.  So when the work is
@@ -1287,7 +1287,7 @@ static FAR struct usbhost_class_s *
   ret = DRVR_ALLOC(hport->drvr, (FAR uint8_t **)&priv->ctrlreq, &maxlen);
   if (ret < 0)
     {
-      udbg("ERROR: DRVR_ALLOC failed: %d\n", ret);
+      uerr("ERROR: DRVR_ALLOC failed: %d\n", ret);
       goto errout_with_hub;
     }
 
@@ -1296,7 +1296,7 @@ static FAR struct usbhost_class_s *
   ret = DRVR_IOALLOC(hport->drvr, &priv->buffer, INTIN_BUFSIZE);
   if (ret < 0)
     {
-      udbg("ERROR: DRVR_IOALLOC failed: %d\n", ret);
+      uerr("ERROR: DRVR_IOALLOC failed: %d\n", ret);
       goto errout_with_ctrlreq;
     }
 
@@ -1385,7 +1385,7 @@ static int usbhost_connect(FAR struct usbhost_class_s *hubclass,
   ret = usbhost_cfgdesc(hubclass, configdesc, desclen);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to parse config descriptor: %d\n", ret);
+      uerr("ERROR: Failed to parse config descriptor: %d\n", ret);
       return ret;
     }
 
@@ -1399,7 +1399,7 @@ static int usbhost_connect(FAR struct usbhost_class_s *hubclass,
 
   if (priv->nports > USBHUB_MAX_PORTS)
     {
-      udbg("ERROR: too many downstream ports: %d\n", priv->nports);
+      uerr("ERROR: too many downstream ports: %d\n", priv->nports);
       return -ENOSYS;
     }
 
@@ -1408,7 +1408,7 @@ static int usbhost_connect(FAR struct usbhost_class_s *hubclass,
   ret = usbhost_hubpwr(priv, hport, true);
   if (ret < 0)
     {
-      udbg("ERROR: usbhost_hubpwr failed: %d\n", ret);
+      uerr("ERROR: usbhost_hubpwr failed: %d\n", ret);
       return ret;
     }
 
@@ -1418,7 +1418,7 @@ static int usbhost_connect(FAR struct usbhost_class_s *hubclass,
                     INTIN_BUFSIZE, usbhost_callback, hubclass);
   if (ret < 0)
     {
-      udbg("ERROR: DRVR_ASYNCH failed: %d\n", ret);
+      uerr("ERROR: DRVR_ASYNCH failed: %d\n", ret);
       (void)usbhost_hubpwr(priv, hport, false);
     }
 
@@ -1453,7 +1453,7 @@ static int usbhost_disconnected(struct usbhost_class_s *hubclass)
   irqstate_t flags;
   int ret;
 
-  uvdbg("Disconnected\n");
+  uinfo("Disconnected\n");
 
   /* Execute the disconnect action from the worker thread. */
 
diff --git a/drivers/usbhost/usbhost_registerclass.c b/drivers/usbhost/usbhost_registerclass.c
index aaf61d0428a4616c5f5bf55fab90b2abec7ec219..a795b88d02a0235b293cec95aed0532adb868737 100644
--- a/drivers/usbhost/usbhost_registerclass.c
+++ b/drivers/usbhost/usbhost_registerclass.c
@@ -96,7 +96,7 @@ int usbhost_registerclass(struct usbhost_registry_s *usbclass)
 {
   irqstate_t flags;
 
-  uvdbg("Registering class:%p nids:%d\n", usbclass, usbclass->nids);
+  uinfo("Registering class:%p nids:%d\n", usbclass, usbclass->nids);
 
   /* g_classregistry is a singly-linkedlist of class ID information added by
    * calls to usbhost_registerclass().  Since this list is accessed from USB
diff --git a/drivers/usbhost/usbhost_skeleton.c b/drivers/usbhost/usbhost_skeleton.c
index 9a7ed87de31833b946275daef35a46ea1f623886..a03d1101f7cb24d8072bd12728df6e55fc0aaf1f 100644
--- a/drivers/usbhost/usbhost_skeleton.c
+++ b/drivers/usbhost/usbhost_skeleton.c
@@ -251,7 +251,7 @@ static inline FAR struct usbhost_state_s *usbhost_allocclass(void)
 
   DEBUGASSERT(!up_interrupt_context());
   priv = (FAR struct usbhost_state_s *)kmm_malloc(sizeof(struct usbhost_state_s));
-  uvdbg("Allocated: %p\n", priv);
+  uinfo("Allocated: %p\n", priv);
   return priv;
 }
 
@@ -277,7 +277,7 @@ static inline void usbhost_freeclass(FAR struct usbhost_state_s *usbclass)
    * executing from an interrupt handler.
    */
 
-  uvdbg("Freeing: %p\n", usbclass);
+  uinfo("Freeing: %p\n", usbclass);
   kmm_free(usbclass);
 }
 
@@ -357,7 +357,7 @@ static void usbhost_destroy(FAR void *arg)
   DEBUGASSERT(hport->drvr);
   drvr = hport->drvr;
 
-  uvdbg("crefs: %d\n", priv->crefs);
+  uinfo("crefs: %d\n", priv->crefs);
 
   /* Unregister the driver */
 
@@ -465,7 +465,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
           {
             FAR struct usb_ifdesc_s *ifdesc = (FAR struct usb_ifdesc_s *)configdesc;
 
-            uvdbg("Interface descriptor\n");
+            uinfo("Interface descriptor\n");
             DEBUGASSERT(remaining >= USB_SIZEOF_IFDESC);
 
             /* Save the interface number and mark ONLY the interface found */
@@ -483,7 +483,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
           {
             FAR struct usb_epdesc_s *epdesc = (FAR struct usb_epdesc_s *)configdesc;
 
-            uvdbg("Endpoint descriptor\n");
+            uinfo("Endpoint descriptor\n");
             DEBUGASSERT(remaining >= USB_SIZEOF_EPDESC);
 
             /* Check for a bulk endpoint. */
@@ -516,7 +516,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
                     boutdesc.xfrtype      = USB_EP_ATTR_XFER_BULK;
                     boutdesc.interval     = epdesc->interval;
                     boutdesc.mxpacketsize = usbhost_getle16(epdesc->mxpacketsize);
-                    uvdbg("Bulk OUT EP addr:%d mxpacketsize:%d\n",
+                    uinfo("Bulk OUT EP addr:%d mxpacketsize:%d\n",
                           boutdesc.addr, boutdesc.mxpacketsize);
                   }
                 else
@@ -544,7 +544,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
                     bindesc.xfrtype      = USB_EP_ATTR_XFER_BULK;
                     bindesc.interval     = epdesc->interval;
                     bindesc.mxpacketsize = usbhost_getle16(epdesc->mxpacketsize);
-                    uvdbg("Bulk IN EP addr:%d mxpacketsize:%d\n",
+                    uinfo("Bulk IN EP addr:%d mxpacketsize:%d\n",
                           bindesc.addr, bindesc.mxpacketsize);
                   }
               }
@@ -576,10 +576,10 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
 
   if (found != USBHOST_ALLFOUND)
     {
-      ulldbg("ERROR: Found IF:%s BIN:%s BOUT:%s\n",
-             (found & USBHOST_IFFOUND) != 0  ? "YES" : "NO",
-             (found & USBHOST_BINFOUND) != 0 ? "YES" : "NO",
-             (found & USBHOST_BOUTFOUND) != 0 ? "YES" : "NO");
+      uerr("ERROR: Found IF:%s BIN:%s BOUT:%s\n",
+           (found & USBHOST_IFFOUND) != 0  ? "YES" : "NO",
+           (found & USBHOST_BINFOUND) != 0 ? "YES" : "NO",
+           (found & USBHOST_BOUTFOUND) != 0 ? "YES" : "NO");
       return -EINVAL;
     }
 
@@ -588,19 +588,19 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
   ret = DRVR_EPALLOC(hport->drvr, &boutdesc, &priv->epout);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to allocate Bulk OUT endpoint\n");
+      uerr("ERROR: Failed to allocate Bulk OUT endpoint\n");
       return ret;
     }
 
   ret = DRVR_EPALLOC(hport->drvr, &bindesc, &priv->epin);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to allocate Bulk IN endpoint\n");
+      uerr("ERROR: Failed to allocate Bulk IN endpoint\n");
       (void)DRVR_EPFREE(hport->drvr, priv->epout);
       return ret;
     }
 
-  ullvdbg("Endpoints allocated\n");
+  uinfo("Endpoints allocated\n");
   return OK;
 }
 
@@ -644,7 +644,7 @@ static inline int usbhost_devinit(FAR struct usbhost_state_s *priv)
     {
       char devname[DEV_NAMELEN];
 
-      uvdbg("Register block driver\n");
+      uinfo("Register block driver\n");
       usbhost_mkdevname(priv, devname);
       // ret = register_blockdriver(devname, &g_bops, 0, priv);
     }
@@ -677,7 +677,7 @@ static inline int usbhost_devinit(FAR struct usbhost_state_s *priv)
         {
           /* Ready for normal operation as a block device driver */
 
-          uvdbg("Successfully initialized\n");
+          uinfo("Successfully initialized\n");
           priv->crefs--;
           usbhost_givesem(&priv->exclsem);
         }
@@ -955,7 +955,7 @@ static int usbhost_connect(FAR struct usbhost_class_s *usbclass,
   ret = usbhost_cfgdesc(priv, configdesc, desclen);
   if (ret < 0)
     {
-      udbg("usbhost_cfgdesc() failed: %d\n", ret);
+      uerr("ERROR: usbhost_cfgdesc() failed: %d\n", ret);
     }
   else
     {
@@ -964,7 +964,7 @@ static int usbhost_connect(FAR struct usbhost_class_s *usbclass,
       ret = usbhost_devinit(priv);
       if (ret < 0)
         {
-          udbg("usbhost_devinit() failed: %d\n", ret);
+          uerr("ERROR: usbhost_devinit() failed: %d\n", ret);
         }
     }
 
@@ -1013,7 +1013,7 @@ static int usbhost_disconnected(struct usbhost_class_s *usbclass)
    * block driver.
    */
 
-  ullvdbg("crefs: %d\n", priv->crefs);
+  uinfo("crefs: %d\n", priv->crefs);
   if (priv->crefs == 1)
     {
       /* Destroy the class instance.  If we are executing from an interrupt
@@ -1025,7 +1025,7 @@ static int usbhost_disconnected(struct usbhost_class_s *usbclass)
         {
           /* Destroy the instance on the worker thread. */
 
-          uvdbg("Queuing destruction: worker %p->%p\n", priv->work.worker, usbhost_destroy);
+          uinfo("Queuing destruction: worker %p->%p\n", priv->work.worker, usbhost_destroy);
           DEBUGASSERT(priv->work.worker == NULL);
           (void)work_queue(HPWORK, &priv->work, usbhost_destroy, priv, 0);
        }
diff --git a/drivers/usbhost/usbhost_storage.c b/drivers/usbhost/usbhost_storage.c
index 5d01a22b062edb60e3a478fb56bdcc23ffb80642..c7df71a7f4371af76df20b8660b10b7a6414514d 100644
--- a/drivers/usbhost/usbhost_storage.c
+++ b/drivers/usbhost/usbhost_storage.c
@@ -168,7 +168,7 @@ static inline void usbhost_mkdevname(FAR struct usbhost_state_s *priv,
 
 /* CBW/CSW debug helpers */
 
-#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_INFO)
 static void usbhost_dumpcbw(FAR struct usbmsc_cbw_s *cbw);
 static void usbhost_dumpcsw(FAR struct usbmsc_csw_s *csw);
 #else
@@ -377,7 +377,7 @@ static inline FAR struct usbhost_state_s *usbhost_allocclass(void)
     }
 
   leave_critical_section(flags);
-  ullvdbg("Allocated: %p\n", entry);
+  uinfo("Allocated: %p\n", entry);
   return (FAR struct usbhost_state_s *)entry;
 }
 #else
@@ -391,7 +391,7 @@ static inline FAR struct usbhost_state_s *usbhost_allocclass(void)
 
   DEBUGASSERT(!up_interrupt_context());
   priv = (FAR struct usbhost_state_s *)kmm_malloc(sizeof(struct usbhost_state_s));
-  uvdbg("Allocated: %p\n", priv);
+  uinfo("Allocated: %p\n", priv);
   return priv;
 }
 #endif
@@ -417,7 +417,7 @@ static inline void usbhost_freeclass(FAR struct usbhost_state_s *usbclass)
   irqstate_t flags;
   DEBUGASSERT(entry != NULL);
 
-  ullvdbg("Freeing: %p\n", entry);
+  uinfo("Freeing: %p\n", entry);
 
   /* Just put the pre-allocated class structure back on the freelist */
 
@@ -435,7 +435,7 @@ static inline void usbhost_freeclass(FAR struct usbhost_state_s *usbclass)
    * from an interrupt handler.
    */
 
-  uvdbg("Freeing: %p\n", usbclass);
+  uinfo("Freeing: %p\n", usbclass);
   sched_kfree(usbclass);
 }
 #endif
@@ -501,23 +501,23 @@ static inline void usbhost_mkdevname(FAR struct usbhost_state_s *priv, char *dev
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_INFO)
 static void usbhost_dumpcbw(FAR struct usbmsc_cbw_s *cbw)
 {
   int i;
 
-  uvdbg("CBW:\n");
-  uvdbg("  signature: %08x\n", usbhost_getle32(cbw->signature));
-  uvdbg("  tag:       %08x\n", usbhost_getle32(cbw->tag));
-  uvdbg("  datlen:    %08x\n", usbhost_getle32(cbw->datlen));
-  uvdbg("  flags:     %02x\n", cbw->flags);
-  uvdbg("  lun:       %02x\n", cbw->lun);
-  uvdbg("  cdblen:    %02x\n", cbw->cdblen);
+  uinfo("CBW:\n");
+  uinfo("  signature: %08x\n", usbhost_getle32(cbw->signature));
+  uinfo("  tag:       %08x\n", usbhost_getle32(cbw->tag));
+  uinfo("  datlen:    %08x\n", usbhost_getle32(cbw->datlen));
+  uinfo("  flags:     %02x\n", cbw->flags);
+  uinfo("  lun:       %02x\n", cbw->lun);
+  uinfo("  cdblen:    %02x\n", cbw->cdblen);
 
-  uvdbg("CDB:\n");
+  uinfo("CDB:\n");
   for (i = 0; i < cbw->cdblen; i += 8)
     {
-      uvdbg("  %02x %02x %02x %02x %02x %02x %02x %02x\n",
+      uinfo("  %02x %02x %02x %02x %02x %02x %02x %02x\n",
             cbw->cdb[i],   cbw->cdb[i+1], cbw->cdb[i+2], cbw->cdb[i+3],
             cbw->cdb[i+4], cbw->cdb[i+5], cbw->cdb[i+6], cbw->cdb[i+7]);
     }
@@ -525,11 +525,11 @@ static void usbhost_dumpcbw(FAR struct usbmsc_cbw_s *cbw)
 
 static void usbhost_dumpcsw(FAR struct usbmsc_csw_s *csw)
 {
-  uvdbg("CSW:\n");
-  uvdbg("  signature: %08x\n", usbhost_getle32(csw->signature));
-  uvdbg("  tag:       %08x\n", usbhost_getle32(csw->tag));
-  uvdbg("  residue:   %08x\n", usbhost_getle32(csw->residue));
-  uvdbg("  status:    %02x\n", csw->status);
+  uinfo("CSW:\n");
+  uinfo("  signature: %08x\n", usbhost_getle32(csw->signature));
+  uinfo("  tag:       %08x\n", usbhost_getle32(csw->tag));
+  uinfo("  residue:   %08x\n", usbhost_getle32(csw->residue));
+  uinfo("  status:    %02x\n", csw->status);
 }
 #endif
 
@@ -685,7 +685,7 @@ static inline int usbhost_maxlunreq(FAR struct usbhost_state_s *priv)
    * allocated memory.
    */
 
-  uvdbg("Request maximum logical unit number\n");
+  uinfo("Request maximum logical unit number\n");
 
   memset(req, 0, sizeof(struct usb_ctrlreq_s));
   req->type    = USB_DIR_IN | USB_REQ_TYPE_CLASS | USB_REQ_RECIPIENT_INTERFACE;
@@ -722,7 +722,7 @@ static inline int usbhost_testunitready(FAR struct usbhost_state_s *priv)
   cbw = usbhost_cbwalloc(priv);
   if (!cbw)
     {
-      udbg("ERROR: Failed to create CBW\n");
+      uerr("ERROR: Failed to create CBW\n");
       return -ENOMEM;
     }
 
@@ -760,7 +760,7 @@ static inline int usbhost_requestsense(FAR struct usbhost_state_s *priv)
   cbw = usbhost_cbwalloc(priv);
   if (!cbw)
     {
-      udbg("ERROR: Failed to create CBW\n");
+      uerr("ERROR: Failed to create CBW\n");
       return -ENOMEM;
     }
 
@@ -806,7 +806,7 @@ static inline int usbhost_readcapacity(FAR struct usbhost_state_s *priv)
   cbw = usbhost_cbwalloc(priv);
   if (!cbw)
     {
-      udbg("ERROR: Failed to create CBW\n");
+      uerr("ERROR: Failed to create CBW\n");
       return -ENOMEM;
     }
 
@@ -857,7 +857,7 @@ static inline int usbhost_inquiry(FAR struct usbhost_state_s *priv)
   cbw = usbhost_cbwalloc(priv);
   if (!cbw)
     {
-      udbg("ERROR: Failed to create CBW\n");
+      uerr("ERROR: Failed to create CBW\n");
       return -ENOMEM;
     }
 
@@ -920,7 +920,7 @@ static void usbhost_destroy(FAR void *arg)
   DEBUGASSERT(priv != NULL && priv->usbclass.hport != NULL);
   hport = priv->usbclass.hport;
 
-  uvdbg("crefs: %d\n", priv->crefs);
+  uinfo("crefs: %d\n", priv->crefs);
 
   /* Unregister the block driver */
 
@@ -1046,7 +1046,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
           {
             FAR struct usb_ifdesc_s *ifdesc = (FAR struct usb_ifdesc_s *)configdesc;
 
-            uvdbg("Interface descriptor\n");
+            uinfo("Interface descriptor\n");
             DEBUGASSERT(remaining >= USB_SIZEOF_IFDESC);
 
             /* Save the interface number and mark ONLY the interface found */
@@ -1064,7 +1064,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
           {
             FAR struct usb_epdesc_s *epdesc = (FAR struct usb_epdesc_s *)configdesc;
 
-            uvdbg("Endpoint descriptor\n");
+            uinfo("Endpoint descriptor\n");
             DEBUGASSERT(remaining >= USB_SIZEOF_EPDESC);
 
             /* Check for a bulk endpoint.  We only support the bulk-only
@@ -1100,7 +1100,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
                     boutdesc.interval     = epdesc->interval;
                     boutdesc.mxpacketsize = usbhost_getle16(epdesc->mxpacketsize);
 
-                    uvdbg("Bulk OUT EP addr:%d mxpacketsize:%d\n",
+                    uinfo("Bulk OUT EP addr:%d mxpacketsize:%d\n",
                           boutdesc.addr, boutdesc.mxpacketsize);
                   }
                 else
@@ -1127,7 +1127,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
                     bindesc.xfrtype      = USB_EP_ATTR_XFER_BULK;
                     bindesc.interval     = epdesc->interval;
                     bindesc.mxpacketsize = usbhost_getle16(epdesc->mxpacketsize);
-                    uvdbg("Bulk IN EP addr:%d mxpacketsize:%d\n",
+                    uinfo("Bulk IN EP addr:%d mxpacketsize:%d\n",
                           bindesc.addr, bindesc.mxpacketsize);
                   }
               }
@@ -1161,10 +1161,10 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
 
   if (found != USBHOST_ALLFOUND)
     {
-      ulldbg("ERROR: Found IF:%s BIN:%s BOUT:%s\n",
-             (found & USBHOST_IFFOUND) != 0  ? "YES" : "NO",
-             (found & USBHOST_BINFOUND) != 0 ? "YES" : "NO",
-             (found & USBHOST_BOUTFOUND) != 0 ? "YES" : "NO");
+      uerr("ERROR: Found IF:%s BIN:%s BOUT:%s\n",
+           (found & USBHOST_IFFOUND) != 0  ? "YES" : "NO",
+           (found & USBHOST_BINFOUND) != 0 ? "YES" : "NO",
+           (found & USBHOST_BOUTFOUND) != 0 ? "YES" : "NO");
       return -EINVAL;
     }
 
@@ -1173,19 +1173,19 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
   ret = DRVR_EPALLOC(hport->drvr, &boutdesc, &priv->bulkout);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to allocate Bulk OUT endpoint\n");
+      uerr("ERROR: Failed to allocate Bulk OUT endpoint\n");
       return ret;
     }
 
   ret = DRVR_EPALLOC(hport->drvr, &bindesc, &priv->bulkin);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to allocate Bulk IN endpoint\n");
+      uerr("ERROR: Failed to allocate Bulk IN endpoint\n");
       (void)DRVR_EPFREE(hport->drvr, priv->bulkout);
       return ret;
     }
 
-  ullvdbg("Endpoints allocated\n");
+  uinfo("Endpoints allocated\n");
   return OK;
 }
 
@@ -1221,7 +1221,7 @@ static inline int usbhost_initvolume(FAR struct usbhost_state_s *priv)
   ret = usbhost_talloc(priv);
   if (ret < 0)
     {
-      udbg("ERROR: Failed to allocate transfer buffer\n");
+      uerr("ERROR: Failed to allocate transfer buffer\n");
       return ret;
     }
 
@@ -1234,12 +1234,12 @@ static inline int usbhost_initvolume(FAR struct usbhost_state_s *priv)
 
   /* Request the maximum logical unit number */
 
-  uvdbg("Get max LUN\n");
+  uinfo("Get max LUN\n");
   ret = usbhost_maxlunreq(priv);
 
   for (retries = 0; retries < USBHOST_MAX_RETRIES /* && ret >= 0 */; retries++)
     {
-      uvdbg("Test unit ready, retries=%d\n", retries);
+      uinfo("Test unit ready, retries=%d\n", retries);
 
       /* Wait just a bit */
 
@@ -1268,7 +1268,7 @@ static inline int usbhost_initvolume(FAR struct usbhost_state_s *priv)
            * The returned status is ignored here.
            */
 
-          uvdbg("Request sense\n");
+          uinfo("Request sense\n");
           ret = usbhost_requestsense(priv);
         }
 
@@ -1281,7 +1281,7 @@ static inline int usbhost_initvolume(FAR struct usbhost_state_s *priv)
 
       if (ret < 0 && ret != -EPERM)
         {
-          udbg("ERROR: DRVR_TRANSFER returned: %d\n", ret);
+          uerr("ERROR: DRVR_TRANSFER returned: %d\n", ret);
           break;
         }
     }
@@ -1290,7 +1290,7 @@ static inline int usbhost_initvolume(FAR struct usbhost_state_s *priv)
 
   if (retries >= USBHOST_MAX_RETRIES)
     {
-      udbg("ERROR: Timeout!\n");
+      uerr("ERROR: Timeout!\n");
       ret = -ETIMEDOUT;
     }
 
@@ -1298,7 +1298,7 @@ static inline int usbhost_initvolume(FAR struct usbhost_state_s *priv)
     {
       /* Get the capacity of the volume */
 
-      uvdbg("Read capacity\n");
+      uinfo("Read capacity\n");
       ret = usbhost_readcapacity(priv);
       if (ret >= 0)
         {
@@ -1307,7 +1307,7 @@ static inline int usbhost_initvolume(FAR struct usbhost_state_s *priv)
           csw = (FAR struct usbmsc_csw_s *)priv->tbuffer;
           if (csw->status != 0)
             {
-              udbg("ERROR: CSW status error: %d\n", csw->status);
+              uerr("ERROR: CSW status error: %d\n", csw->status);
               ret = -ENODEV;
             }
         }
@@ -1319,7 +1319,7 @@ static inline int usbhost_initvolume(FAR struct usbhost_state_s *priv)
     {
       /* Inquiry */
 
-      uvdbg("Inquiry\n");
+      uinfo("Inquiry\n");
       ret = usbhost_inquiry(priv);
       if (ret >= 0)
         {
@@ -1328,7 +1328,7 @@ static inline int usbhost_initvolume(FAR struct usbhost_state_s *priv)
           csw = (FAR struct usbmsc_csw_s *)priv->tbuffer;
           if (csw->status != 0)
             {
-              udbg("ERROR: CSW status error: %d\n", csw->status);
+              uerr("ERROR: CSW status error: %d\n", csw->status);
               ret = -ENODEV;
             }
         }
@@ -1340,7 +1340,7 @@ static inline int usbhost_initvolume(FAR struct usbhost_state_s *priv)
     {
       char devname[DEV_NAMELEN];
 
-      uvdbg("Register block driver\n");
+      uinfo("Register block driver\n");
       usbhost_mkdevname(priv, devname);
       ret = register_blockdriver(devname, &g_bops, 0, priv);
     }
@@ -1772,7 +1772,7 @@ static int usbhost_connect(FAR struct usbhost_class_s *usbclass,
   ret = usbhost_cfgdesc(priv, configdesc, desclen);
   if (ret < 0)
     {
-      udbg("usbhost_cfgdesc() failed: %d\n", ret);
+      uerr("ERROR: usbhost_cfgdesc() failed: %d\n", ret);
     }
   else
     {
@@ -1781,7 +1781,7 @@ static int usbhost_connect(FAR struct usbhost_class_s *usbclass,
       ret = usbhost_initvolume(priv);
       if (ret < 0)
         {
-          udbg("usbhost_initvolume() failed: %d\n", ret);
+          uerr("ERROR: usbhost_initvolume() failed: %d\n", ret);
         }
     }
 
@@ -1830,7 +1830,7 @@ static int usbhost_disconnected(struct usbhost_class_s *usbclass)
    * block driver.
    */
 
-  ullvdbg("crefs: %d\n", priv->crefs);
+  uinfo("crefs: %d\n", priv->crefs);
   if (priv->crefs == 1)
     {
       /* Destroy the class instance.  If we are executing from an interrupt
@@ -1842,7 +1842,7 @@ static int usbhost_disconnected(struct usbhost_class_s *usbclass)
         {
           /* Destroy the instance on the worker thread. */
 
-          uvdbg("Queuing destruction: worker %p->%p\n", priv->work.worker, usbhost_destroy);
+          uinfo("Queuing destruction: worker %p->%p\n", priv->work.worker, usbhost_destroy);
           DEBUGASSERT(priv->work.worker == NULL);
           (void)work_queue(HPWORK, &priv->work, usbhost_destroy, priv, 0);
        }
@@ -1874,7 +1874,7 @@ static int usbhost_open(FAR struct inode *inode)
   irqstate_t flags;
   int ret;
 
-  uvdbg("Entry\n");
+  uinfo("Entry\n");
   DEBUGASSERT(inode && inode->i_private);
   priv = (FAR struct usbhost_state_s *)inode->i_private;
 
@@ -1923,7 +1923,7 @@ static int usbhost_close(FAR struct inode *inode)
   FAR struct usbhost_state_s *priv;
   irqstate_t flags;
 
-  uvdbg("Entry\n");
+  uinfo("Entry\n");
   DEBUGASSERT(inode && inode->i_private);
   priv = (FAR struct usbhost_state_s *)inode->i_private;
 
@@ -1986,7 +1986,7 @@ static ssize_t usbhost_read(FAR struct inode *inode, unsigned char *buffer,
   DEBUGASSERT(priv->usbclass.hport);
   hport = priv->usbclass.hport;
 
-  uvdbg("startsector: %d nsectors: %d sectorsize: %d\n",
+  uinfo("startsector: %d nsectors: %d sectorsize: %d\n",
         startsector, nsectors, priv->blocksize);
 
   /* Check if the mass storage device is still connected */
@@ -2051,7 +2051,7 @@ static ssize_t usbhost_read(FAR struct inode *inode, unsigned char *buffer,
                           csw = (FAR struct usbmsc_csw_s *)priv->tbuffer;
                           if (csw->status != 0)
                             {
-                              udbg("ERROR: CSW status error: %d\n", csw->status);
+                              uerr("ERROR: CSW status error: %d\n", csw->status);
                               nbytes = -ENODEV;
                             }
                         }
@@ -2086,7 +2086,7 @@ static ssize_t usbhost_write(FAR struct inode *inode, const unsigned char *buffe
   FAR struct usbhost_hubport_s *hport;
   ssize_t nbytes;
 
-  uvdbg("sector: %d nsectors: %d sectorsize: %d\n");
+  uinfo("sector: %d nsectors: %d sectorsize: %d\n");
 
   DEBUGASSERT(inode && inode->i_private);
   priv = (FAR struct usbhost_state_s *)inode->i_private;
@@ -2150,7 +2150,7 @@ static ssize_t usbhost_write(FAR struct inode *inode, const unsigned char *buffe
                       csw = (FAR struct usbmsc_csw_s *)priv->tbuffer;
                       if (csw->status != 0)
                         {
-                          udbg("ERROR: CSW status error: %d\n", csw->status);
+                          uerr("ERROR: CSW status error: %d\n", csw->status);
                           nbytes = -ENODEV;
                         }
                     }
@@ -2179,7 +2179,7 @@ static int usbhost_geometry(FAR struct inode *inode, struct geometry *geometry)
   FAR struct usbhost_state_s *priv;
   int ret = -EINVAL;
 
-  uvdbg("Entry\n");
+  uinfo("Entry\n");
   DEBUGASSERT(inode && inode->i_private);
 
   /* Check if the mass storage device is still connected */
@@ -2211,7 +2211,7 @@ static int usbhost_geometry(FAR struct inode *inode, struct geometry *geometry)
       geometry->geo_sectorsize    = priv->blocksize;
       usbhost_givesem(&priv->exclsem);
 
-      uvdbg("nsectors: %ld sectorsize: %d\n",
+      uinfo("nsectors: %ld sectorsize: %d\n",
              (long)geometry->geo_nsectors, geometry->geo_sectorsize);
 
       ret = OK;
@@ -2232,7 +2232,7 @@ static int usbhost_ioctl(FAR struct inode *inode, int cmd, unsigned long arg)
   FAR struct usbhost_state_s *priv;
   int ret;
 
-  uvdbg("Entry\n");
+  uinfo("Entry\n");
   DEBUGASSERT(inode && inode->i_private);
   priv  = (FAR struct usbhost_state_s *)inode->i_private;
 
diff --git a/drivers/usbhost/usbhost_trace.c b/drivers/usbhost/usbhost_trace.c
index cd1ef92c4fc0f17d5bfeda324d15b09e03e6aad5..ba47097fa84ff3ca2f43f93cf7a3c4ee94b0cd30 100644
--- a/drivers/usbhost/usbhost_trace.c
+++ b/drivers/usbhost/usbhost_trace.c
@@ -190,7 +190,7 @@ void usbhost_trace_common(uint32_t event)
  ****************************************************************************/
 
 #if defined(CONFIG_USBHOST_TRACE) || \
-   (defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_USB))
+   (defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_USB))
 
 void usbhost_trace1(uint16_t id, uint32_t u23)
 {
@@ -228,7 +228,7 @@ void usbhost_trace2(uint16_t id, uint8_t u7, uint16_t u16)
 #endif
 }
 
-#endif /* CONFIG_USBHOST_TRACE || CONFIG_DEBUG && CONFIG_DEBUG_USB */
+#endif /* CONFIG_USBHOST_TRACE || CONFIG_DEBUG_FEATURES && CONFIG_DEBUG_USB */
 
 /****************************************************************************
  * Name: usbtrace_enumerate
diff --git a/drivers/usbmonitor/Kconfig b/drivers/usbmonitor/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..e35c47e49086969cd2f0f56f5bad1d9e8305231b
--- /dev/null
+++ b/drivers/usbmonitor/Kconfig
@@ -0,0 +1,58 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+
+config USBMONITOR_STACKSIZE
+	int "USB Monitor daemon stack size"
+	default 2048
+	---help---
+		The stack size to use the the USB monitor daemon.  Default: 2048
+
+config USBMONITOR_PRIORITY
+	int "USB Monitor daemon priority"
+	default 50
+	---help---
+		The priority to use the the USB monitor daemon.  Default: 50
+
+config USBMONITOR_INTERVAL
+	int "USB Monitor dump frequency"
+	default 2
+	---help---
+		The rate in seconds that the USB monitor will wait before dumping
+		the next set of buffered USB trace data.  Default:  2 seconds.
+
+if USBDEV && USBDEV_TRACE
+
+config USBMONITOR_TRACEINIT
+	bool "Show USB device initialization events"
+	default n
+	---help---
+		Show initialization events
+
+config USBMONITOR_TRACECLASS
+	bool "Show USB device class driver events"
+	default n
+	---help---
+		Show class driver events
+
+config USBMONITOR_TRACETRANSFERS
+	bool "Show USB device data transfer events"
+	default n
+	---help---
+		Show data transfer events
+
+config USBMONITOR_TRACECONTROLLER
+	bool "Show USB device controller events"
+	default n
+	---help---
+		Show controller events
+
+config USBMONITOR_TRACEINTERRUPTS
+	bool "Show USB device interrupt-related events"
+	default n
+	---help---
+		Show interrupt-related events
+
+endif # USBDEV && USBDEV_TRACE
diff --git a/drivers/usbmonitor/Make.defs b/drivers/usbmonitor/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..3c80ad6c4bb3220cc10807cfa1e40f3b5e5e6e85
--- /dev/null
+++ b/drivers/usbmonitor/Make.defs
@@ -0,0 +1,51 @@
+############################################################################
+# drivers/usbmonitor/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+# Don't build anything if there is no USB monitor support
+
+ifeq ($(CONFIG_USBMONITOR),y)
+
+# Include the USB monitor
+
+CSRCS += usbmonitor.c
+
+# Include USB monitor build support
+
+DEPPATH += --dep-path usbmonitor
+VPATH += :usbmonitor
+CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)usbmonitor}
+
+endif
+
diff --git a/drivers/usbmonitor/usbmonitor.c b/drivers/usbmonitor/usbmonitor.c
new file mode 100644
index 0000000000000000000000000000000000000000..22e34ed5e49bb1f737ff3acb139134d14eeb4f15
--- /dev/null
+++ b/drivers/usbmonitor/usbmonitor.c
@@ -0,0 +1,292 @@
+/****************************************************************************
+ * drivers/usbmonitor/usbmonitor.c
+ *
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_USBMONITOR
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+#ifndef CONFIG_USBMONITOR_STACKSIZE
+#  define CONFIG_USBMONITOR_STACKSIZE 2048
+#endif
+
+#ifndef CONFIG_USBMONITOR_PRIORITY
+#  define CONFIG_USBMONITOR_PRIORITY 50
+#endif
+
+#ifndef CONFIG_USBMONITOR_INTERVAL
+#  define CONFIG_USBMONITOR_INTERVAL 2
+#endif
+
+/* USB device trace selection */
+
+#ifdef CONFIG_USBDEV_TRACE
+#  ifdef CONFIG_USBMONITOR_TRACEINIT
+#    define TRACE_INIT_BITS       (TRACE_INIT_BIT)
+#  else
+#    define TRACE_INIT_BITS       (0)
+#  endif
+
+#  define TRACE_ERROR_BITS        (TRACE_DEVERROR_BIT|TRACE_CLSERROR_BIT)
+
+#  ifdef CONFIG_USBMONITOR_TRACECLASS
+#    define TRACE_CLASS_BITS      (TRACE_CLASS_BIT|TRACE_CLASSAPI_BIT|\
+                                   TRACE_CLASSSTATE_BIT)
+#  else
+#    define TRACE_CLASS_BITS      (0)
+#  endif
+
+#  ifdef CONFIG_USBMONITOR_TRACETRANSFERS
+#    define TRACE_TRANSFER_BITS   (TRACE_OUTREQQUEUED_BIT|TRACE_INREQQUEUED_BIT|\
+                                   TRACE_READ_BIT|TRACE_WRITE_BIT|\
+                                   TRACE_COMPLETE_BIT)
+#  else
+#    define TRACE_TRANSFER_BITS   (0)
+#  endif
+
+#  ifdef CONFIG_USBMONITOR_TRACECONTROLLER
+#    define TRACE_CONTROLLER_BITS (TRACE_EP_BIT|TRACE_DEV_BIT)
+#  else
+#    define TRACE_CONTROLLER_BITS (0)
+#  endif
+
+#  ifdef CONFIG_USBMONITOR_TRACEINTERRUPTS
+#    define TRACE_INTERRUPT_BITS  (TRACE_INTENTRY_BIT|TRACE_INTDECODE_BIT|\
+                                   TRACE_INTEXIT_BIT)
+#  else
+#    define TRACE_INTERRUPT_BITS  (0)
+#  endif
+
+#  define TRACE_BITSET            (TRACE_INIT_BITS|TRACE_ERROR_BITS|\
+                                   TRACE_CLASS_BITS|TRACE_TRANSFER_BITS|\
+                                   TRACE_CONTROLLER_BITS|TRACE_INTERRUPT_BITS)
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct usbmon_state_s
+{
+  volatile bool started;
+  volatile bool stop;
+  pid_t pid;
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static struct usbmon_state_s g_usbmonitor;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+#ifdef CONFIG_USBDEV_TRACE
+static int usbtrace_syslog(FAR const char *fmt, ...)
+{
+  va_list ap;
+  int ret;
+
+  /* Let vsyslog do the real work */
+
+  va_start(ap, fmt);
+  ret = vsyslog(LOG_INFO, fmt, ap);
+  va_end(ap);
+  return ret;
+}
+
+static int usbmonitor_tracecallback(struct usbtrace_s *trace, void *arg)
+{
+  usbtrace_trprintf(usbtrace_syslog, trace->event, trace->value);
+  return 0;
+}
+#endif
+
+static int usbmonitor_daemon(int argc, char **argv)
+{
+  uinfo("Running: %d\n", g_usbmonitor.pid);
+
+  /* Loop until we detect that there is a request to stop. */
+
+  while (!g_usbmonitor.stop)
+    {
+      sleep(CONFIG_USBMONITOR_INTERVAL);
+#ifdef CONFIG_USBDEV_TRACE
+      (void)usbtrace_enumerate(usbmonitor_tracecallback, NULL);
+#endif
+#ifdef CONFIG_USBHOST_TRACE
+      (void)usbhost_trdump();
+#endif
+    }
+
+  /* Stopped */
+
+  g_usbmonitor.stop    = false;
+  g_usbmonitor.started = false;
+  uinfo("Stopped: %d\n", g_usbmonitor.pid);
+
+  return 0;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: usbmonitor_start
+ *
+ *   Start the USB monitor kernal daemon.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned values:
+ *   Zero (OK) is returned on success; a negated errno value is return on
+ *   any failure.
+ *
+ ****************************************************************************/
+
+int usbmonitor_start(void)
+{
+  /* Has the monitor already started? */
+
+  sched_lock();
+  if (!g_usbmonitor.started)
+    {
+      int ret;
+
+      /* No.. start it now */
+
+#ifdef CONFIG_USBDEV_TRACE
+      /* First, initialize any USB tracing options that were requested */
+
+      usbtrace_enable(TRACE_BITSET);
+#endif
+
+      /* Then start the USB monitoring daemon */
+
+      g_usbmonitor.started = true;
+      g_usbmonitor.stop    = false;
+
+      ret = kernel_thread("USB Monitor", CONFIG_USBMONITOR_PRIORITY,
+                          CONFIG_USBMONITOR_STACKSIZE,
+                          (main_t)usbmonitor_daemon,
+                          (FAR char * const *)NULL);
+      if (ret < 0)
+        {
+          int errcode = errno;
+          uerr("ERROR: Failed to start the USB monitor: %d\n",
+               errcode);
+          UNUSED(errcode);
+        }
+      else
+        {
+          g_usbmonitor.pid = ret;
+          uinfo("Started: %d\n", g_usbmonitor.pid);
+        }
+
+      sched_unlock();
+      return 0;
+    }
+
+  sched_unlock();
+  uinfo("%s: %d\n",
+        g_usbmonitor.stop ? "Stopping" : "Running", g_usbmonitor.pid);
+  return 0;
+}
+
+/****************************************************************************
+ * Name: usbmonitor_stop
+ *
+ *   Stop the USB monitor kernel daemon.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned values:
+ *   Zero (OK) is returned on success; a negated errno value is return on
+ *   any failure.
+ *
+ ****************************************************************************/
+
+int usbmonitor_stop(void)
+{
+  /* Has the monitor already started? */
+
+  if (g_usbmonitor.started)
+    {
+      /* Stop the USB monitor.  The next time the monitor wakes up,
+       * it will see the the stop indication and will exist.
+       */
+
+      uinfo("Stopping: %d\n", g_usbmonitor.pid);
+      g_usbmonitor.stop = true;
+
+#ifdef CONFIG_USBDEV_TRACE
+      /* We may as well disable tracing since there is no listener */
+
+      usbtrace_enable(0);
+#endif
+    }
+
+  uinfo("Stopped: %d\n", g_usbmonitor.pid);
+  return 0;
+}
+
+#endif /* CONFIG_USBMONITOR */
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 523971c748e0f55e90706dd5d35ff57399055656..56c2fe89fdced4aaa5508468c89a3c3c0ca6a970 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -104,7 +104,7 @@ endchoice
 config OV2640_REGDEBUG
 	bool "Register level debug output"
 	default n
-	depends on DEBUG
+	depends on DEBUG_FEATURES
 	---help---
 		Enable details, register level debug output.
 
diff --git a/drivers/video/ov2640.c b/drivers/video/ov2640.c
index ebf37f002cb055b4704e230d88ccc31a320328b2..06f88d1bf4ad02e70daed9a4f3876ba21fe056b1 100644
--- a/drivers/video/ov2640.c
+++ b/drivers/video/ov2640.c
@@ -696,7 +696,7 @@ static int ov2640_putreg(FAR struct i2c_master_s *i2c, uint8_t regaddr,
   int ret;
 
 #ifdef CONFIG_OV2640_REGDEBUG
-   dbg("%02x <- %02x\n", regaddr, regval);
+   _err("%02x <- %02x\n", regaddr, regval);
 #endif
 
   /* Set up for the transfer */
@@ -715,7 +715,7 @@ static int ov2640_putreg(FAR struct i2c_master_s *i2c, uint8_t regaddr,
   ret = i2c_write(i2c, &config, buffer, 2);
   if (ret < 0)
     {
-      gdbg("ERROR: i2c_write failed: %d\n", ret);
+      gerr("ERROR: i2c_write failed: %d\n", ret);
       return ret;
     }
 
@@ -756,7 +756,7 @@ static uint8_t ov2640_getreg(FAR struct i2c_master_s *i2c, uint8_t regaddr)
   ret = i2c_write(i2c, &config, ®addr, 1);
   if (ret < 0)
     {
-      gdbg("ERROR: i2c_write failed: %d\n", ret);
+      gerr("ERROR: i2c_write failed: %d\n", ret);
       return 0;
     }
 
@@ -765,13 +765,13 @@ static uint8_t ov2640_getreg(FAR struct i2c_master_s *i2c, uint8_t regaddr)
   ret = i2c_read(i2c, &config, ®val, 1);
   if (ret < 0)
     {
-      gdbg("ERROR: i2c_read failed: %d\n", ret);
+      gerr("ERROR: i2c_read failed: %d\n", ret);
       return 0;
     }
 #ifdef CONFIG_OV2640_REGDEBUG
   else
     {
-      dbg("%02x -> %02x\n", regaddr, regval);
+      _err("%02x -> %02x\n", regaddr, regval);
     }
 #endif
 
@@ -807,7 +807,7 @@ static int ov2640_putreglist(FAR struct i2c_master_s *i2c,
       ret = ov2640_putreg(i2c, entry->regaddr, entry->regval);
       if (ret < 0)
         {
-          gdbg("ERROR: ov2640_putreg failed: %d\n", ret);
+          gerr("ERROR: ov2640_putreg failed: %d\n", ret);
           return ret;
         }
     }
@@ -845,7 +845,7 @@ static int ovr2640_chipid(FAR struct i2c_master_s *i2c)
   ret = ov2640_putreg(i2c, 0xff, 0x01); /* Select the sensor address bank */
   if (ret < 0)
     {
-      gdbg("ERROR: ov2640_putreg failed: %d\n", ret);
+      gerr("ERROR: ov2640_putreg failed: %d\n", ret);
       return ret;
     }
 
@@ -859,12 +859,12 @@ static int ovr2640_chipid(FAR struct i2c_master_s *i2c)
 
   if (pidl != OVR2640_PRODUCT_IDL || pidh != OVR2640_PRODUCT_IDH)
     {
-      gdbg("ERROR: Unsupported PID=%02x$02x MID=%02x%02x\n",
+      gerr("ERROR: Unsupported PID=%02x$02x MID=%02x%02x\n",
             pidh, pidl, midh, midl);
       return -ENOSYS;
     }
 
-  gvdbg("PID=%02x$02x MID=%02x%02x\n", pidh, pidl, midh, midl);
+  ginfo("PID=%02x$02x MID=%02x%02x\n", pidh, pidl, midh, midl);
   return OK;
 }
 
@@ -892,7 +892,7 @@ static int ov2640_reset(FAR struct i2c_master_s *i2c)
   ret = ov2640_putreglist(i2c, g_ov2640_reset, OV2640_RESET_NENTRIES);
   if (ret < 0)
     {
-      gdbg("ERROR: ov2640_putreglist failed: %d\n", ret);
+      gerr("ERROR: ov2640_putreglist failed: %d\n", ret);
       return ret;
     }
 
@@ -927,7 +927,7 @@ int ov2640_initialize(FAR struct i2c_master_s *i2c)
   ret = ov2640_reset(i2c);
   if (ret < 0)
     {
-      gdbg("ERROR: ov2640_reset failed: %d\n", ret);
+      gerr("ERROR: ov2640_reset failed: %d\n", ret);
       goto errout;
     }
 
@@ -936,7 +936,7 @@ int ov2640_initialize(FAR struct i2c_master_s *i2c)
   ret = ovr2640_chipid(i2c);
   if (ret < 0)
     {
-      gdbg("ERROR: ovr2640_chipid failed: %d\n", ret);
+      gerr("ERROR: ovr2640_chipid failed: %d\n", ret);
       goto errout;
     }
 
@@ -948,35 +948,35 @@ int ov2640_initialize(FAR struct i2c_master_s *i2c)
   ret = ov2640_putreglist(i2c, g_ov2640_jpeg_init, OV2640_JPEG_INIT_NENTRIES);
   if (ret < 0)
     {
-      gdbg("ERROR: ov2640_putreglist failed: %d\n", ret);
+      gerr("ERROR: ov2640_putreglist failed: %d\n", ret);
       goto errout;
     }
 
   ret = ov2640_putreglist(i2c, g_ov2640_yuv422, OV2640_YUV422_NENTRIES);
   if (ret < 0)
     {
-      gdbg("ERROR: ov2640_putreglist failed: %d\n", ret);
+      gerr("ERROR: ov2640_putreglist failed: %d\n", ret);
       goto errout;
     }
 
   ret = ov2640_putreglist(i2c, g_ov2640_jpeg, OV2640_JPEG_NENTRIES);
   if (ret < 0)
     {
-      gdbg("ERROR: ov2640_putreglist failed: %d\n", ret);
+      gerr("ERROR: ov2640_putreglist failed: %d\n", ret);
       goto errout;
     }
 
   ret = ov2640_putreg(i2c, 0xff, 0x01);
   if (ret < 0)
     {
-      gdbg("ERROR: ov2640_putreg failed: %d\n", ret);
+      gerr("ERROR: ov2640_putreg failed: %d\n", ret);
       goto errout;
     }
 
   ret = ov2640_putreg(i2c, 0x15, 0x00);
   if (ret < 0)
     {
-      gdbg("ERROR: ov2640_putreg failed: %d\n", ret);
+      gerr("ERROR: ov2640_putreg failed: %d\n", ret);
       goto errout;
     }
 
@@ -1018,7 +1018,7 @@ int ov2640_initialize(FAR struct i2c_master_s *i2c)
 
   if (ret < 0)
     {
-      gdbg("ERROR: ov2640_putreglist failed: %d\n", ret);
+      gerr("ERROR: ov2640_putreglist failed: %d\n", ret);
       goto errout;
     }
 
@@ -1030,7 +1030,7 @@ int ov2640_initialize(FAR struct i2c_master_s *i2c)
                           OV2640_INITIALREGS_NENTRIES);
   if (ret < 0)
     {
-      gdbg("ERROR: ov2640_putreglist failed: %d\n", ret);
+      gerr("ERROR: ov2640_putreglist failed: %d\n", ret);
       goto errout;
     }
 
@@ -1040,7 +1040,7 @@ int ov2640_initialize(FAR struct i2c_master_s *i2c)
                           OV2640_RESOLUTION_COMMON_NENTRIES);
   if (ret < 0)
     {
-      gdbg("ERROR: ov2640_putreglist failed: %d\n", ret);
+      gerr("ERROR: ov2640_putreglist failed: %d\n", ret);
       goto errout;
     }
 
@@ -1082,7 +1082,7 @@ int ov2640_initialize(FAR struct i2c_master_s *i2c)
 
   if (ret < 0)
     {
-      gdbg("ERROR: ov2640_putreglist failed: %d\n", ret);
+      gerr("ERROR: ov2640_putreglist failed: %d\n", ret);
       goto errout;
     }
 
@@ -1092,7 +1092,7 @@ int ov2640_initialize(FAR struct i2c_master_s *i2c)
                     OV2640_COLORFMT_COMMON_NENTRIES);
   if (ret < 0)
     {
-      gdbg("ERROR: ov2640_putreglist failed: %d\n", ret);
+      gerr("ERROR: ov2640_putreglist failed: %d\n", ret);
       goto errout;
     }
 
@@ -1110,7 +1110,7 @@ int ov2640_initialize(FAR struct i2c_master_s *i2c)
 
   if (ret < 0)
     {
-      gdbg("ERROR: ov2640_putreglist failed: %d\n", ret);
+      gerr("ERROR: ov2640_putreglist failed: %d\n", ret);
       goto errout;
     }
 
@@ -1119,7 +1119,7 @@ int ov2640_initialize(FAR struct i2c_master_s *i2c)
   return OK;
 
 errout:
-  gdbg("ERROR: Failed to initialize the OV2640: %d\n", ret);
+  gerr("ERROR: Failed to initialize the OV2640: %d\n", ret);
   (void)ov2640_reset(i2c);
   return ret;
 }
diff --git a/drivers/wireless/Kconfig b/drivers/wireless/Kconfig
index e978ef6e8213b07d3f4e2e0722722870447de384..a3537b85cf1b0e49476709062b8ee7d1733bfda9 100644
--- a/drivers/wireless/Kconfig
+++ b/drivers/wireless/Kconfig
@@ -72,35 +72,4 @@ config WL_NRF24L01_RXFIFO_LEN
 
 endif # WL_NRF24L01_RXSUPPORT
 endif # WL_NRF24L01
-
-config WL_PN532
-	bool "pn532 NFC-chip support"
-	default n
-	select SPI
-	---help---
-		This options adds driver support for the PN532 NFC chip.
-
-if WL_PN532
-
-config PN532_SPI_FREQ
-	int "SPI frequency for PN532"
-	default 1000000
-	depends on WL_PN532
-
-config WL_PN532_DEBUG
-	bool "Enable PN532 debug"
-	default n
-	depends on WL_PN532
-
-config WL_PN532_DEBUG_TX
-	bool "trace TX frames"
-	default n
-	depends on WL_PN532_DEBUG
-
-config WL_PN532_DEBUG_RX
-	bool "trace RX frames"
-	default n
-	depends on WL_PN532_DEBUG
-
-endif # WL_PN532
 endif # DRIVERS_WIRELESS
diff --git a/drivers/wireless/Make.defs b/drivers/wireless/Make.defs
index 6322a5c0b0379a7fb7d224dad6e304cc6296a576..14ffb31208393d2a38cf19f492555c0926246857 100644
--- a/drivers/wireless/Make.defs
+++ b/drivers/wireless/Make.defs
@@ -55,10 +55,6 @@ ifeq ($(CONFIG_WL_CC3000),y)
 include wireless$(DELIM)cc3000$(DELIM)Make.defs
 endif
 
-ifeq ($(CONFIG_WL_PN532),y)
-CSRCS += pn532.c
-endif
-
 # Include wireless devices build support
 
 DEPPATH += --dep-path wireless
diff --git a/drivers/wireless/cc1101.c b/drivers/wireless/cc1101.c
index 8d8958fc728a21ea42a436d6816979ceb213fe4d..e9ce3805c5d22a7dd62618f2426d7f3459a0f018 100644
--- a/drivers/wireless/cc1101.c
+++ b/drivers/wireless/cc1101.c
@@ -97,11 +97,13 @@
  ****************************************************************************/
 
 #include 
-#include 
+
 #include 
 #include 
-#include 
 #include 
+#include 
+#include 
+#include 
 
 #include 
 #include 
@@ -289,12 +291,12 @@ struct cc1101_dev_s
 {
   const struct c1101_rfsettings_s *rfsettings;
 
-  struct spi_dev_s *  spi;
-  uint8_t             isrpin; /* CC1101 pin used to trigger interrupts */
-  uint32_t            pinset; /* GPIO of the MCU */
-  uint8_t             flags;
-  uint8_t             channel;
-  uint8_t             power;
+  struct spi_dev_s *spi;
+  uint8_t           isrpin;     /* CC1101 pin used to trigger interrupts */
+  uint32_t          pinset;     /* GPIO of the MCU */
+  uint8_t           flags;
+  uint8_t           channel;
+  uint8_t           power;
 };
 
 /****************************************************************************
@@ -307,7 +309,7 @@ static volatile int cc1101_interrupt = 0;
  * Private Functions
  ****************************************************************************/
 
-void cc1101_access_begin(FAR struct cc1101_dev_s * dev)
+void cc1101_access_begin(FAR struct cc1101_dev_s *dev)
 {
   (void)SPI_LOCK(dev->spi, true);
   SPI_SELECT(dev->spi, SPIDEV_WIRELESS, true);
@@ -316,7 +318,7 @@ void cc1101_access_begin(FAR struct cc1101_dev_s * dev)
   (void)SPI_HWFEATURES(dev->spi, 0);
 }
 
-void cc1101_access_end(FAR struct cc1101_dev_s * dev)
+void cc1101_access_end(FAR struct cc1101_dev_s *dev)
 {
   SPI_SELECT(dev->spi, SPIDEV_WIRELESS, false);
   (void)SPI_LOCK(dev->spi, false);
@@ -336,7 +338,7 @@ void cc1101_access_end(FAR struct cc1101_dev_s * dev)
  *   OK on success or errno is set.
  */
 
-int cc1101_access(FAR struct cc1101_dev_s * dev, uint8_t addr,
+int cc1101_access(FAR struct cc1101_dev_s *dev, uint8_t addr,
                   FAR uint8_t *buf, int length)
 {
   int stabyte;
@@ -405,7 +407,7 @@ int cc1101_access(FAR struct cc1101_dev_s * dev, uint8_t addr,
  *  pending in RX FIFO.
  */
 
-inline uint8_t cc1101_strobe(struct cc1101_dev_s * dev, uint8_t command)
+inline uint8_t cc1101_strobe(struct cc1101_dev_s *dev, uint8_t command)
 {
   uint8_t status;
 
@@ -419,13 +421,13 @@ inline uint8_t cc1101_strobe(struct cc1101_dev_s * dev, uint8_t command)
   return status;
 }
 
-int cc1101_reset(struct cc1101_dev_s * dev)
+int cc1101_reset(struct cc1101_dev_s *dev)
 {
   cc1101_strobe(dev, CC1101_SRES);
   return OK;
 }
 
-int cc1101_checkpart(struct cc1101_dev_s * dev)
+int cc1101_checkpart(struct cc1101_dev_s *dev)
 {
   uint8_t partnum;
   uint8_t version;
@@ -444,12 +446,14 @@ int cc1101_checkpart(struct cc1101_dev_s * dev)
   return ERROR;
 }
 
-void cc1101_dumpregs(struct cc1101_dev_s * dev, uint8_t addr, uint8_t length)
+void cc1101_dumpregs(struct cc1101_dev_s *dev, uint8_t addr, uint8_t length)
 {
   uint8_t buf[0x30], i;
 
   cc1101_access(dev, addr, (FAR uint8_t *)buf, length);
 
+  /* REVISIT: printf() should not be used from within the OS */
+
   printf("CC1101[%2x]: ", addr);
   for (i = 0; i < length; i++)
     {
@@ -459,7 +463,7 @@ void cc1101_dumpregs(struct cc1101_dev_s * dev, uint8_t addr, uint8_t length)
   printf("\n");
 }
 
-void cc1101_setpacketctrl(struct cc1101_dev_s * dev)
+void cc1101_setpacketctrl(struct cc1101_dev_s *dev)
 {
   uint8_t values[3];
 
@@ -520,10 +524,10 @@ int cc1101_eventcb(int irq, FAR void *context)
  * Public Functions
  ****************************************************************************/
 
-struct cc1101_dev_s * cc1101_init(struct spi_dev_s * spi, uint8_t isrpin,
-    uint32_t pinset, const struct c1101_rfsettings_s * rfsettings)
+struct cc1101_dev_s *cc1101_init(struct spi_dev_s *spi, uint8_t isrpin,
+    uint32_t pinset, const struct c1101_rfsettings_s *rfsettings)
 {
-  struct cc1101_dev_s * dev;
+  struct cc1101_dev_s *dev;
 
   ASSERT(spi);
 
@@ -581,22 +585,24 @@ struct cc1101_dev_s * cc1101_init(struct spi_dev_s * spi, uint8_t isrpin,
 
   cc1101_setgdo(dev, dev->isrpin, CC1101_GDO_SYNC);
 
-  /* Bind to external interrupt line */
-
-  /* depends on STM32: TODO: Make that config within pinset and
-   * provide general gpio interface
-   * stm32_gpiosetevent(pinset, false, true, true, cc1101_eventcb);
+  /* Configure to receive interrupts on the external GPIO interrupt line.
+   *
+   * REVISIT:  There is no MCU-independent way to do this in this
+   * context.
    */
 
   return dev;
 }
 
-int cc1101_deinit(struct cc1101_dev_s * dev)
+int cc1101_deinit(struct cc1101_dev_s *dev)
 {
   ASSERT(dev);
 
-  /* Release interrupt */
-  /* stm32_gpiosetevent(pinset, false, false, false, NULL); */
+  /* Release the external GPIO interrupt
+   *
+   * REVISIT:  There is no MCU-independent way to do this in this
+   * context.
+   */
 
   /* Power down chip */
 
@@ -608,19 +614,19 @@ int cc1101_deinit(struct cc1101_dev_s * dev)
   return 0;
 }
 
-int cc1101_powerup(struct cc1101_dev_s * dev)
+int cc1101_powerup(struct cc1101_dev_s *dev)
 {
   ASSERT(dev);
   return 0;
 }
 
-int cc1101_powerdown(struct cc1101_dev_s * dev)
+int cc1101_powerdown(struct cc1101_dev_s *dev)
 {
   ASSERT(dev);
   return 0;
 }
 
-int cc1101_setgdo(struct cc1101_dev_s * dev, uint8_t pin, uint8_t function)
+int cc1101_setgdo(struct cc1101_dev_s *dev, uint8_t pin, uint8_t function)
 {
   ASSERT(dev);
   ASSERT(pin <= CC1101_IOCFG0);
@@ -654,7 +660,7 @@ int cc1101_setgdo(struct cc1101_dev_s * dev, uint8_t pin, uint8_t function)
   return cc1101_access(dev, pin, &function, -1);
 }
 
-int cc1101_setrf(struct cc1101_dev_s * dev, const struct c1101_rfsettings_s *settings)
+int cc1101_setrf(struct cc1101_dev_s *dev, const struct c1101_rfsettings_s *settings)
 {
   ASSERT(dev);
   ASSERT(settings);
@@ -692,7 +698,7 @@ int cc1101_setrf(struct cc1101_dev_s * dev, const struct c1101_rfsettings_s *set
   return OK;
 }
 
-int cc1101_setchannel(struct cc1101_dev_s * dev, uint8_t channel)
+int cc1101_setchannel(struct cc1101_dev_s *dev, uint8_t channel)
 {
   ASSERT(dev);
 
@@ -715,7 +721,7 @@ int cc1101_setchannel(struct cc1101_dev_s * dev, uint8_t channel)
   return dev->flags & FLAGS_RXONLY;
 }
 
-uint8_t cc1101_setpower(struct cc1101_dev_s * dev, uint8_t power)
+uint8_t cc1101_setpower(struct cc1101_dev_s *dev, uint8_t power)
 {
   ASSERT(dev);
 
@@ -761,7 +767,7 @@ int cc1101_calcRSSIdBm(int rssi)
   return (rssi >> 1) - 74;
 }
 
-int cc1101_receive(struct cc1101_dev_s * dev)
+int cc1101_receive(struct cc1101_dev_s *dev)
 {
   ASSERT(dev);
 
@@ -774,7 +780,7 @@ int cc1101_receive(struct cc1101_dev_s * dev)
   return 0;
 }
 
-int cc1101_read(struct cc1101_dev_s * dev, uint8_t * buf, size_t size)
+int cc1101_read(struct cc1101_dev_s *dev, uint8_t * buf, size_t size)
 {
   ASSERT(dev);
 
@@ -814,7 +820,7 @@ int cc1101_read(struct cc1101_dev_s * dev, uint8_t * buf, size_t size)
 
       if (nbytes > size || (nbytes <= size && !(buf[nbytes-1]&0x80)))
         {
-          printf("Flushing RX FIFO\n");
+          ninfo("Flushing RX FIFO\n");
           cc1101_strobe(dev, CC1101_SFRX);
         }
 
@@ -824,7 +830,7 @@ int cc1101_read(struct cc1101_dev_s * dev, uint8_t * buf, size_t size)
   return 0;
 }
 
-int cc1101_write(struct cc1101_dev_s * dev, const uint8_t * buf, size_t size)
+int cc1101_write(struct cc1101_dev_s *dev, const uint8_t *buf, size_t size)
 {
   uint8_t packetlen;
 
@@ -853,7 +859,7 @@ int cc1101_write(struct cc1101_dev_s * dev, const uint8_t * buf, size_t size)
   return 0;
 }
 
-int cc1101_send(struct cc1101_dev_s * dev)
+int cc1101_send(struct cc1101_dev_s *dev)
 {
   ASSERT(dev);
 
@@ -873,7 +879,7 @@ int cc1101_send(struct cc1101_dev_s * dev)
   return 0;
 }
 
-int cc1101_idle(struct cc1101_dev_s * dev)
+int cc1101_idle(struct cc1101_dev_s *dev)
 {
   ASSERT(dev);
   cc1101_strobe(dev, CC1101_SIDLE);
diff --git a/drivers/wireless/cc3000/cc3000.c b/drivers/wireless/cc3000/cc3000.c
index bc0e2a615cb818ad45c4e7f6670c4c0c18f6cb5a..1b13276ede624f88ae6aefb9875d45ece15aeac1 100644
--- a/drivers/wireless/cc3000/cc3000.c
+++ b/drivers/wireless/cc3000/cc3000.c
@@ -63,13 +63,15 @@
 #include 
 #include 
 
+#include 
+
 #include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
-#include 
 
 #include 
 #include 
@@ -113,7 +115,7 @@ CCASSERT(sizeof(cc3000_buffer_desc) <= CONFIG_MQ_MAXMSGSIZE);
 #define FREE_SLOT -1
 #define CLOSE_SLOT -2
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_CC3000_PROBES)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_CC3000_PROBES)
 #  define CC3000_GUARD (0xc35aa53c)
 #  define INIT_GUARD(p) p->guard = CC3000_GUARD
 #  define CHECK_GUARD(p) DEBUGASSERT(p->guard == CC3000_GUARD)
@@ -124,11 +126,8 @@ CCASSERT(sizeof(cc3000_buffer_desc) <= CONFIG_MQ_MAXMSGSIZE);
 #  define PROBE(pin,state)
 #endif
 
-#define waitlldbg(x,...)
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
+#define waiterr(x,...) //  _err
+#define waitinfo(x,...) // _info
 
 /****************************************************************************
  * Private Function Prototypes
@@ -143,7 +142,7 @@ static void cc3000_deselect_and_unlock(FAR struct spi_dev_s *spi);
 
 static void cc3000_notify(FAR struct cc3000_dev_s *priv);
 static void *cc3000_worker(FAR void *arg);
-static int cc3000_interrupt(int irq, FAR void *context);
+static int cc3000_interrupt(int irq, FAR void *context, FAR void *arg);
 
 /* Character driver methods */
 
@@ -251,7 +250,7 @@ static inline void cc3000_devgive(FAR struct cc3000_dev_s *priv)
 
 static inline void cc3000_configspi(FAR struct spi_dev_s *spi)
 {
-  ndbg("Mode: %d Bits: 8 Frequency: %d\n",
+  ninfo("Mode: %d Bits: 8 Frequency: %d\n",
        CONFIG_CC3000_SPI_MODE, CONFIG_CC3000_SPI_FREQUENCY);
 
   SPI_SETMODE(spi, CONFIG_CC3000_SPI_MODE);
@@ -422,7 +421,7 @@ static void cc3000_pollnotify(FAR struct cc3000_dev_s *priv, uint32_t type)
       if (fds)
         {
           fds->revents |= type;
-          nllvdbg("Report events: %02x\n", fds->revents);
+          ninfo("Report events: %02x\n", fds->revents);
           sem_post(fds->sem);
         }
     }
@@ -463,7 +462,7 @@ static void cc3000_notify(FAR struct cc3000_dev_s *priv)
  * Name: cc3000_worker
  ****************************************************************************/
 
-static void * select_thread_func(FAR void *arg)
+static void *select_thread_func(FAR void *arg)
 {
   FAR struct cc3000_dev_s *priv = (FAR struct cc3000_dev_s *)arg;
   struct timeval timeout;
@@ -500,7 +499,7 @@ static void * select_thread_func(FAR void *arg)
               if (priv->sockets[s].sd == CLOSE_SLOT)
                 {
                   priv->sockets[s].sd = FREE_SLOT;
-                  waitlldbg("Close\n");
+                  waitinfo("Close\n");
                   int count;
                   do
                     {
@@ -509,7 +508,7 @@ static void * select_thread_func(FAR void *arg)
                         {
                           /* Release the waiting threads */
 
-                          waitlldbg("Closed Signaled %d\n", count);
+                          waitinfo("Closed Signaled %d\n", count);
                           sem_post(&priv->sockets[s].semwait);
                         }
                     }
@@ -556,17 +555,17 @@ static void * select_thread_func(FAR void *arg)
             {
               if (ret > 0 && CC3000_FD_ISSET(priv->sockets[s].sd, &readsds)) /* and has pending data */
                 {
-                  waitlldbg("Signaled %d\n", priv->sockets[s].sd);
+                  waitinfo("Signaled %d\n", priv->sockets[s].sd);
                   sem_post(&priv->sockets[s].semwait);                       /* release the waiting thread */
                 }
               else if (ret > 0 && CC3000_FD_ISSET(priv->sockets[s].sd, &exceptsds)) /* or has pending exception */
                 {
-                  waitlldbg("Signaled %d (exception)\n", priv->sockets[s].sd);
+                  waitinfo("Signaled %d (exception)\n", priv->sockets[s].sd);
                   sem_post(&priv->sockets[s].semwait);                       /* release the waiting thread */
                 }
               else if (priv->sockets[s].received_closed_event)               /* or remote has closed connection and we have now read all of HW buffer. */
                 {
-                  waitlldbg("Signaled %d (closed & empty)\n", priv->sockets[s].sd);
+                  waitinfo("Signaled %d (closed & empty)\n", priv->sockets[s].sd);
                   priv->sockets[s].emptied_and_remotely_closed = true;
                   sem_post(&priv->sockets[s].semwait);                       /* release the waiting thread */
                 }
@@ -602,7 +601,7 @@ static void * select_thread_func(FAR void *arg)
  * Name: cc3000_worker
  ****************************************************************************/
 
-static void * cc3000_worker(FAR void *arg)
+static void *cc3000_worker(FAR void *arg)
 {
   FAR struct cc3000_dev_s *priv = (FAR struct cc3000_dev_s *)arg;
   int ret;
@@ -623,7 +622,7 @@ static void * cc3000_worker(FAR void *arg)
       if ((cc3000_wait_irq(priv) != -EINTR) && (priv->workertid != -1))
         {
           PROBE(0, 0);
-          nllvdbg("State%d\n", priv->state);
+          ninfo("State%d\n", priv->state);
           switch (priv->state)
             {
             case eSPI_STATE_POWERUP:
@@ -679,7 +678,7 @@ static void * cc3000_worker(FAR void *arg)
 
                     if (data_to_recv >= priv->rx_buffer_max_len)
                       {
-                        lowsyslog(LOG_INFO, "data_to_recv %d", data_to_recv);
+                        ninfo("data_to_recv %d", data_to_recv);
                       }
 
                     DEBUGASSERT(data_to_recv < priv->rx_buffer_max_len);
@@ -710,10 +709,10 @@ static void * cc3000_worker(FAR void *arg)
 
                     cc3000_devgive(priv);
 
-                    nllvdbg("Wait On Completion\n");
+                    ninfo("Wait On Completion\n");
                     sem_wait(priv->wrkwaitsem);
-                    nllvdbg("Completed S:%d irq :%d\n",
-                            priv->state, priv->config->irq_read(priv->config));
+                    ninfo("Completed S:%d irq :%d\n",
+                          priv->state, priv->config->irq_read(priv->config));
 
                     sem_getvalue(&priv->irqsem, &count);
                     if (priv->config->irq_read(priv->config) && count == 0)
@@ -732,7 +731,7 @@ static void * cc3000_worker(FAR void *arg)
               break;
 
             default:
-              nllvdbg("default: State%d\n", priv->state);
+              ninfo("default: State%d\n", priv->state);
               break;
             }
         }
@@ -747,21 +746,11 @@ static void * cc3000_worker(FAR void *arg)
  * Name: cc3000_interrupt
  ****************************************************************************/
 
-static int cc3000_interrupt(int irq, FAR void *context)
+static int cc3000_interrupt(int irq, FAR void *context, FAR void *arg)
 {
-  FAR struct cc3000_dev_s    *priv;
-
-  /* Which CC3000 device caused the interrupt? */
-
-#ifndef CONFIG_CC3000_MULTIPLE
-  priv = &g_cc3000;
-#else
-  for (priv = g_cc3000list;
-       priv && priv->configs->irq != irq;
-       priv = priv->flink);
+  FAR struct cc3000_dev_s *priv = (FAR struct cc3000_dev_s *)arg;
 
-  ASSERT(priv != NULL);
-#endif
+  DEBUGASSERT(priv != NULL);
 
   /* Run the worker thread */
 
@@ -802,7 +791,7 @@ static int cc3000_open(FAR struct file *filep)
 
   CHECK_GUARD(priv);
 
-  nllvdbg("crefs: %d\n", priv->crefs);
+  ninfo("crefs: %d\n", priv->crefs);
 
   /* Get exclusive access to the driver data structure */
 
@@ -825,19 +814,33 @@ static int cc3000_open(FAR struct file *filep)
 
   if (tmp == 1)
     {
+      /* Initialize semaphores */
+
       sem_init(&priv->waitsem, 0, 0);  /* Initialize event wait semaphore */
       sem_init(&priv->irqsem, 0, 0);   /* Initialize IRQ Ready semaphore */
       sem_init(&priv->readysem, 0, 0); /* Initialize Device Ready semaphore */
 
+      /* These semaphores are all used for signaling and, hence, should
+       * not have priority inheritance enabled.
+       */
+
+      sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
+      sem_setprotocol(&priv->irqsem, SEM_PRIO_NONE);
+      sem_setprotocol(&priv->readysem, SEM_PRIO_NONE);
+
 #ifdef CONFIG_CC3000_MT
       priv->accepting_socket.acc.sd = FREE_SLOT;
       sem_init(&priv->accepting_socket.acc.semwait, 0, 0);
+      sem_setprotocol(&priv->accepting_socket.acc.semwait, SEM_PRIO_NONE);
+
       for (s = 0; s < CONFIG_WL_MAX_SOCKETS; s++)
         {
           priv->sockets[s].sd = FREE_SLOT;
           priv->sockets[s].received_closed_event = false;
           priv->sockets[s].emptied_and_remotely_closed = false;
+
           sem_init(&priv->sockets[s].semwait, 0, 0);
+          sem_setprotocol(&priv->sockets[s].semwait, SEM_PRIO_NONE);
         }
 #endif
 
@@ -887,6 +890,8 @@ static int cc3000_open(FAR struct file *filep)
       pthread_attr_setschedparam(&tattr, ¶m);
 
       sem_init(&priv->selectsem, 0, 0);
+      sem_setprotocol(&priv->selectsem, SEM_PRIO_NONE);
+
       ret = pthread_create(&priv->selecttid, &tattr, select_thread_func,
                            (pthread_addr_t)priv);
       if (ret != 0)
@@ -982,7 +987,7 @@ static int cc3000_close(FAR struct file *filep)
 
   CHECK_GUARD(priv);
 
-  nllvdbg("crefs: %d\n", priv->crefs);
+  ninfo("crefs: %d\n", priv->crefs);
 
   /* Get exclusive access to the driver data structure */
 
@@ -1052,7 +1057,7 @@ static ssize_t cc3000_read(FAR struct file *filep, FAR char *buffer, size_t len)
   int ret;
   ssize_t nread;
 
-  nllvdbg("buffer:%p len:%d\n", buffer, len);
+  ninfo("buffer:%p len:%d\n", buffer, len);
   DEBUGASSERT(filep);
   inode = filep->f_inode;
 
@@ -1071,7 +1076,7 @@ static ssize_t cc3000_read(FAR struct file *filep, FAR char *buffer, size_t len)
 
   if (len < priv->rx_buffer_max_len)
     {
-      ndbg("Unsupported read size: %d\n", len);
+      nerr("ERROR: Unsupported read size: %d\n", len);
       nread = -ENOSYS;
       goto errout_with_sem;
     }
@@ -1091,7 +1096,7 @@ static ssize_t cc3000_read(FAR struct file *filep, FAR char *buffer, size_t len)
        * option, then just return an error.
        */
 
-      nllvdbg("CC3000 data is not available\n");
+      ninfo("CC3000 data is not available\n");
       if (filep->f_oflags & O_NONBLOCK)
         {
           nread = -EAGAIN;
@@ -1112,7 +1117,7 @@ static ssize_t cc3000_read(FAR struct file *filep, FAR char *buffer, size_t len)
        * but will be re-enabled while we are waiting.
        */
 
-      nllvdbg("Waiting..\n");
+      ninfo("Waiting..\n");
       ret = sem_wait(&priv->waitsem);
       priv->nwaiters--;
       sched_unlock();
@@ -1166,7 +1171,7 @@ errout_with_sem:
   cc3000_devgive(priv);
 
 errout_without_sem:
-  nllvdbg("Returning: %d\n", nread);
+  ninfo("Returning: %d\n", nread);
 #ifndef CONFIG_DISABLE_POLL
   if (nread > 0)
     {
@@ -1198,7 +1203,7 @@ static ssize_t cc3000_write(FAR struct file *filep, FAR const char *usrbuffer, s
 
   size_t tx_len = (len & 1) ? len : len +1;
 
-  nllvdbg("buffer:%p len:%d tx_len:%d\n", buffer, len, tx_len);
+  ninfo("buffer:%p len:%d tx_len:%d\n", buffer, len, tx_len);
 
   DEBUGASSERT(filep);
   inode = filep->f_inode;
@@ -1263,18 +1268,18 @@ static ssize_t cc3000_write(FAR struct file *filep, FAR const char *usrbuffer, s
     }
   else
     {
-      nllvdbg("Assert CS\n");
+      ninfo("Assert CS\n");
       priv->state  = eSPI_STATE_WRITE_WAIT_IRQ;
       cc3000_lock_and_select(priv->spi); /* Assert CS */
-      nllvdbg("Wait on IRQ Active\n");
+      ninfo("Wait on IRQ Active\n");
       ret = cc3000_wait_ready(priv);
-      nllvdbg("IRQ Signaled\n");
+      ninfo("IRQ Signaled\n");
       if (ret < 0)
         {
           /* This should only happen if the wait was canceled by an signal */
 
           cc3000_deselect_and_unlock(priv->spi);
-          nllvdbg("sem_wait: %d\n", errno);
+          ninfo("sem_wait: %d\n", errno);
           DEBUGASSERT(errno == EINTR);
           nwritten = ret;
           goto errout_without_sem;
@@ -1284,13 +1289,13 @@ static ssize_t cc3000_write(FAR struct file *filep, FAR const char *usrbuffer, s
     }
 
   priv->state  = eSPI_STATE_WRITE_DONE;
-  nllvdbg("Deassert CS S:eSPI_STATE_WRITE_DONE\n");
+  ninfo("Deassert CS S:eSPI_STATE_WRITE_DONE\n");
   cc3000_deselect_and_unlock(priv->spi);
   nwritten = tx_len;
   cc3000_devgive(priv);
 
 errout_without_sem:
-  nllvdbg("Returning: %d\n", ret);
+  ninfo("Returning: %d\n", ret);
   return nwritten;
 }
 
@@ -1304,7 +1309,7 @@ static int cc3000_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   FAR struct cc3000_dev_s *priv;
   int ret;
 
-  nllvdbg("cmd: %d arg: %ld\n", cmd, arg);
+  ninfo("cmd: %d arg: %ld\n", cmd, arg);
   DEBUGASSERT(filep);
   inode = filep->f_inode;
 
@@ -1409,7 +1414,7 @@ static int cc3000_poll(FAR struct file *filep, FAR struct pollfd *fds,
   int ret = OK;
   int i;
 
-  nllvdbg("setup: %d\n", (int)setup);
+  ninfo("setup: %d\n", (int)setup);
   DEBUGASSERT(filep && fds);
   inode = filep->f_inode;
 
@@ -1507,7 +1512,7 @@ errout:
  ****************************************************************************/
 
 int cc3000_register(FAR struct spi_dev_s *spi,
-                      FAR struct cc3000_config_s *config, int minor)
+                    FAR struct cc3000_config_s *config, int minor)
 {
   FAR struct cc3000_dev_s *priv;
   char drvname[DEV_NAMELEN];
@@ -1517,7 +1522,7 @@ int cc3000_register(FAR struct spi_dev_s *spi,
 #endif
   int ret;
 
-  nllvdbg("spi: %p minor: %d\n", spi, minor);
+  ninfo("spi: %p minor: %d\n", spi, minor);
 
   /* Debug-only sanity checks */
 
@@ -1531,7 +1536,7 @@ int cc3000_register(FAR struct spi_dev_s *spi,
   priv = (FAR struct cc3000_dev_s *)kmm_malloc(sizeof(struct cc3000_dev_s));
   if (!priv)
     {
-      ndbg("kmm_malloc(%d) failed\n", sizeof(struct cc3000_dev_s));
+      nerr("ERROR: kmm_malloc(%d) failed\n", sizeof(struct cc3000_dev_s));
       return -ENOMEM;
     }
 #endif
@@ -1562,22 +1567,22 @@ int cc3000_register(FAR struct spi_dev_s *spi,
 
   /* Attach the interrupt handler */
 
-  ret = config->irq_attach(config, cc3000_interrupt);
+  ret = config->irq_attach(config, cc3000_interrupt, priv);
   if (ret < 0)
     {
-      ndbg("Failed to attach interrupt\n");
+      nerr("ERROR: Failed to attach interrupt\n");
       goto errout_with_priv;
     }
 
   /* Register the device as an input device */
 
   (void)snprintf(drvname, DEV_NAMELEN, DEV_FORMAT, minor);
-  nllvdbg("Registering %s\n", drvname);
+  ninfo("Registering %s\n", drvname);
 
   ret = register_driver(drvname, &cc3000_fops, 0666, priv);
   if (ret < 0)
     {
-      ndbg("register_driver() failed: %d\n", ret);
+      nerr("ERROR: register_driver() failed: %d\n", ret);
       goto errout_with_priv;
     }
 
diff --git a/drivers/wireless/cc3000/cc3000.h b/drivers/wireless/cc3000/cc3000.h
index 0ebc118ebb8580112f5b20a9fd4495029c3be806..ddcd4f5163c2f5b46b38028b390fb69adf394aec 100644
--- a/drivers/wireless/cc3000/cc3000.h
+++ b/drivers/wireless/cc3000/cc3000.h
@@ -168,7 +168,7 @@ struct cc3000_dev_s
   struct pollfd *fds[CONFIG_CC3000_NPOLLWAITERS];
 #endif
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_CC3000_PROBES)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_CC3000_PROBES)
  long guard;
 #endif
 
diff --git a/drivers/wireless/cc3000/cc3000_common.c b/drivers/wireless/cc3000/cc3000_common.c
index cca794a079c5c516c6f40d5d4d47b299768df587..acbb1c4ea613279e7e84cab6885eb453321bfa3d 100644
--- a/drivers/wireless/cc3000/cc3000_common.c
+++ b/drivers/wireless/cc3000/cc3000_common.c
@@ -1,6 +1,7 @@
 /****************************************************************************
- *  cc3000_common.c.c  - CC3000 Host Driver Implementation.
- *  Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *  drivers/wireless/cc3000/cc3000_common.c.c  - CC3000 Host Driver Implementation.
+ *
+ *    Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  *
  *  Redistribution and use in source and binary forms, with or without
  *  modification, are permitted provided that the following conditions
diff --git a/drivers/wireless/cc3000/cc3000drv.c b/drivers/wireless/cc3000/cc3000drv.c
index e192dbf17563203409c9c7d94504e1154c97f998..ab114c0515a2bbe84a9da2dcced3f75235dbc192 100644
--- a/drivers/wireless/cc3000/cc3000drv.c
+++ b/drivers/wireless/cc3000/cc3000drv.c
@@ -57,26 +57,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-#undef SPI_DEBUG   /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-#  define spidbg  lldbg
-#  ifdef SPI_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  undef SPI_VERBOSE
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -118,7 +98,7 @@ void cc3000_resume(void)
 {
   DEBUGASSERT(spiconf.cc3000fd >= 0 && spiconf.done);
   sem_post(spiconf.done);
-  nllvdbg("Done\n");
+  ninfo("Done\n");
 }
 
 /****************************************************************************
@@ -223,7 +203,7 @@ static void *unsoliced_thread_func(void *parameter)
                           sizeof(spiconf.rx_buffer), 0);
       if (nbytes > 0)
         {
-          nlldbg("%d Processed\n", nbytes);
+          ninfo("%d Processed\n", nbytes);
           spiconf.pfRxHandler(spiconf.rx_buffer.pbuffer);
         }
     }
diff --git a/drivers/wireless/cc3000/evnt_handler.c b/drivers/wireless/cc3000/evnt_handler.c
index b890a9a9b7c591b709f845a3a79a5bf02383ac9c..b2ec2b016a17a6d622dc47d9c11c1aaef5b40d89 100644
--- a/drivers/wireless/cc3000/evnt_handler.c
+++ b/drivers/wireless/cc3000/evnt_handler.c
@@ -1,6 +1,7 @@
 /****************************************************************************
- *  evnt_handler.c  - CC3000 Host Driver Implementation.
- *  Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *  drivers/wireless/cc3000/evnt_handler.c  - CC3000 Host Driver Implementation.
+ *
+ *    Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  *
  *  Redistribution and use in source and binary forms, with or without
  *  modification, are permitted provided that the following conditions
@@ -924,12 +925,12 @@ void SimpleLinkWaitEvent(uint16_t opcode, void *pRetParams)
    */
 
   tSLInformation.usRxEventOpcode = opcode;
-  nllvdbg("Looking for opcode 0x%x\n", opcode);
+  ninfo("Looking for opcode 0x%x\n", opcode);
   uint16_t event_type;
 
   do
     {
-      nllvdbg("cc3000_wait\n");
+      ninfo("cc3000_wait\n");
       tSLInformation.pucReceivedData = cc3000_wait();
       tSLInformation.usEventOrDataReceived = 1;
       STREAM_TO_UINT16((FAR char *)tSLInformation.pucReceivedData,
@@ -937,25 +938,25 @@ void SimpleLinkWaitEvent(uint16_t opcode, void *pRetParams)
 
       if (*tSLInformation.pucReceivedData == HCI_TYPE_EVNT)
         {
-          nllvdbg("Evtn:0x%x\n", event_type);
+          ninfo("Evtn:0x%x\n", event_type);
         }
 
       if (event_type != opcode)
         {
           if (hci_unsolicited_event_handler() == 1)
             {
-              nllvdbg("Processed Event  0x%x want 0x%x\n", event_type, opcode);
+              ninfo("Processed Event  0x%x want 0x%x\n", event_type, opcode);
             }
         }
       else
         {
-          nllvdbg("Processing opcode 0x%x\n", opcode);
+          ninfo("Processing opcode 0x%x\n", opcode);
           hci_event_handler(pRetParams, 0, 0);
         }
     }
   while (tSLInformation.usRxEventOpcode != 0);
 
-  nllvdbg("Done for opcode 0x%x\n", opcode);
+  ninfo("Done for opcode 0x%x\n", opcode);
 }
 
 /****************************************************************************
@@ -981,7 +982,7 @@ void SimpleLinkWaitData(uint8_t *pBuf, uint8_t *from, uint8_t *fromlen)
    * after the end of current transaction, i.e. only after data will be received
    */
 
-  nllvdbg("Looking for Data\n");
+  ninfo("Looking for Data\n");
   uint16_t event_type;
   uint16_t opcode = tSLInformation.usRxEventOpcode;
 
@@ -999,15 +1000,15 @@ void SimpleLinkWaitData(uint8_t *pBuf, uint8_t *from, uint8_t *fromlen)
       else
         {
           STREAM_TO_UINT16((char *)tSLInformation.pucReceivedData, HCI_EVENT_OPCODE_OFFSET, event_type);
-          nllvdbg("Evtn:0x%x\n", event_type);
+          ninfo("Evtn:0x%x\n", event_type);
 
           if (hci_unsolicited_event_handler() == 1)
             {
-              nllvdbg("Processed Event  0x%x want Data! Opcode 0x%x\n", event_type, opcode);
+              ninfo("Processed Event  0x%x want Data! Opcode 0x%x\n", event_type, opcode);
             }
           else
             {
-              nllvdbg("!!!!!opcode 0x%x\n", opcode);
+              ninfo("!!!!!opcode 0x%x\n", opcode);
             }
 
           UNUSED(event_type);
@@ -1015,6 +1016,6 @@ void SimpleLinkWaitData(uint8_t *pBuf, uint8_t *from, uint8_t *fromlen)
     }
   while (*tSLInformation.pucReceivedData == HCI_TYPE_EVNT);
 
-  nllvdbg("Done for Data 0x%x\n", opcode);
+  ninfo("Done for Data 0x%x\n", opcode);
   UNUSED(opcode);
 }
diff --git a/drivers/wireless/cc3000/hci.c b/drivers/wireless/cc3000/hci.c
index 6caf64c60d490e6757b015ab2bee575e75225458..9d07450943e14618ae29d9cbd0d7d94e497ee4b6 100644
--- a/drivers/wireless/cc3000/hci.c
+++ b/drivers/wireless/cc3000/hci.c
@@ -1,6 +1,7 @@
 /****************************************************************************
- *  hci.c  - CC3000 Host Driver Implementation.
- *  Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *  drivers/wireless/cc3000/hci.c  - CC3000 Host Driver Implementation.
+ *
+ *    Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  *
  *  Redistribution and use in source and binary forms, with or without
  *  modification, are permitted provided that the following conditions
@@ -79,7 +80,7 @@ uint16_t hci_command_send(uint16_t usOpcode, uint8_t *pucBuff,
 
   stream = (pucBuff + SPI_HEADER_SIZE);
 
-  nllvdbg("Send 0x%x\n", usOpcode);
+  ninfo("Send 0x%x\n", usOpcode);
   UINT8_TO_STREAM(stream, HCI_TYPE_CMND);
   stream = UINT16_TO_STREAM(stream, usOpcode);
   UINT8_TO_STREAM(stream, ucArgsLength);
@@ -87,7 +88,7 @@ uint16_t hci_command_send(uint16_t usOpcode, uint8_t *pucBuff,
   /* Update the opcode of the event we will be waiting for */
 
   cc3000_write(pucBuff, ucArgsLength + SIMPLE_LINK_HCI_CMND_HEADER_SIZE);
-  nllvdbg("Send of 0x%x Completed\n", usOpcode);
+  ninfo("Send of 0x%x Completed\n", usOpcode);
 
   return 0;
 }
diff --git a/drivers/wireless/cc3000/netapp.c b/drivers/wireless/cc3000/netapp.c
index f6ac0aa0426ed98d7c140c8e04937ec7fc299720..648ecb1b891bebb3a3c806a99acf475a408e8c92 100644
--- a/drivers/wireless/cc3000/netapp.c
+++ b/drivers/wireless/cc3000/netapp.c
@@ -1,6 +1,7 @@
 /****************************************************************************
- *  netapp.c  - CC3000 Host Driver Implementation.
- *  Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *  drivers/wireless/cc3000/netapp.c  - CC3000 Host Driver Implementation.
+ *
+ *    Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  *
  *  Redistribution and use in source and binary forms, with or without
  *  modification, are permitted provided that the following conditions
diff --git a/drivers/wireless/cc3000/nvmem.c b/drivers/wireless/cc3000/nvmem.c
index 8009e4802044f4e7f0dbc4fbfafe83d2439e8525..01c4b5a897b4d0fc04997d92436aa9a9d0c49a42 100644
--- a/drivers/wireless/cc3000/nvmem.c
+++ b/drivers/wireless/cc3000/nvmem.c
@@ -1,6 +1,7 @@
 /****************************************************************************
- *  nvmem.c  - CC3000 Host Driver Implementation.
- *  Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *  drivers/wireless/cc3000/nvmem.c  - CC3000 Host Driver Implementation.
+ *
+ *    Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  *
  *  Redistribution and use in source and binary forms, with or without
  *  modification, are permitted provided that the following conditions
diff --git a/drivers/wireless/cc3000/socket.c b/drivers/wireless/cc3000/socket.c
index 9653d06ed7b7d1792732590b0d5f7cdc34836955..10699a70899075c41ea86b055a21146184a9a19c 100644
--- a/drivers/wireless/cc3000/socket.c
+++ b/drivers/wireless/cc3000/socket.c
@@ -1,6 +1,7 @@
 /****************************************************************************
- *  socket.c  - CC3000 Host Driver Implementation.
- *  Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *  drivers/wireless/cc3000/socket.c  - CC3000 Host Driver Implementation.
+ *
+ *    Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  *
  *  Redistribution and use in source and binary forms, with or without
  *  modification, are permitted provided that the following conditions
@@ -62,7 +63,8 @@
 #  define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
 #endif
 
-#define waitlldbg(x,...) // lldbg
+#define waiterr(x,...) //  _err
+#define waitinfo(x,...) // _info
 
 /****************************************************************************
  * Private Types
@@ -194,13 +196,13 @@ int cc3000_closesocket(int sockfd)
   int ret;
 
 #ifdef CONFIG_CC3000_MT
-  waitlldbg("remove\n");
+  waitinfo("remove\n");
   cc3000_remove_socket(sockfd);
 #endif
   cc3000_lib_lock();
-  waitlldbg("Call closesocketl\n");
+  waitinfo("Call closesocketl\n");
   ret = cc3000_closesocket_impl(sockfd);
-  waitlldbg("return closesocket\n");
+  waitinfo("return closesocket\n");
   cc3000_lib_unlock();
   return ret;
 }
@@ -267,7 +269,7 @@ int cc3000_accept(int sockfd, struct sockaddr *addr, socklen_t *addrlen)
   if (setsockopt(sockfd, CC3000_SOL_SOCKET, CC3000_SOCKOPT_ACCEPT_NONBLOCK,
                  &non_blocking, sizeof(non_blocking)) < 0)
    {
-     ndbg("setsockopt failure %d\n", errno);
+     nerr("ERROR: setsockopt failure %d\n", errno);
      return -errno;
    }
 
@@ -282,7 +284,7 @@ int cc3000_accept(int sockfd, struct sockaddr *addr, socklen_t *addrlen)
   if (setsockopt(sockfd, CC3000_SOL_SOCKET, CC3000_SOCKOPT_ACCEPT_NONBLOCK,
                  &nonBlocking, sizeof(nonBlocking)) < 0)
    {
-     ndbg("setsockopt failure %d\n", errno);
+     nerr("ERROR: setsockopt failure %d\n", errno);
      return -errno;
    }
 
@@ -596,9 +598,9 @@ ssize_t cc3000_recv(int sockfd, FAR void *buf, size_t len, int flags)
   ssize_t ret;
 
 #ifdef CONFIG_CC3000_MT
-  waitlldbg("wait\n");
+  waitinfo("wait\n");
   ret = cc3000_wait_data(sockfd);
-  waitlldbg("wait %d\n", ret);
+  waitinfo("wait %d\n", ret);
 
   if (ret == -ECONNABORTED)
     {
@@ -612,9 +614,9 @@ ssize_t cc3000_recv(int sockfd, FAR void *buf, size_t len, int flags)
 #endif
 
   cc3000_lib_lock();
-  waitlldbg("recv\n");
+  waitinfo("recv\n");
   ret = cc3000_recv_impl(sockfd, buf, len, flags);
-  waitlldbg("recv %d\n", ret);
+  waitinfo("recv %d\n", ret);
   cc3000_lib_unlock();
   return ret;
 }
diff --git a/drivers/wireless/cc3000/socket_imp.c b/drivers/wireless/cc3000/socket_imp.c
index 780a085eb8ce8d59649233997a1ab0b49bef6f38..38341b2939b0c1d6cb11bc62ca99d4e4cef9af20 100644
--- a/drivers/wireless/cc3000/socket_imp.c
+++ b/drivers/wireless/cc3000/socket_imp.c
@@ -1,6 +1,7 @@
 /****************************************************************************
- * drivers/wireless/socket_imp.c  - CC3000 Host Driver Implementation.
- *  Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ * drivers/wireless/cc3000/socket_imp.c  - CC3000 Host Driver Implementation.
+ *
+ *   Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  *
  *   Port to nuttx:
  *      David Sidrane 
diff --git a/drivers/wireless/cc3000/wlan.c b/drivers/wireless/cc3000/wlan.c
index 175d6334b4dc4429767ce93c782019edcf9c3d6e..c77488bcf43fba8c067bfca4442db90d4ebf0d74 100644
--- a/drivers/wireless/cc3000/wlan.c
+++ b/drivers/wireless/cc3000/wlan.c
@@ -1,6 +1,7 @@
 /****************************************************************************
- *  wlan.c  - CC3000 Host Driver Implementation.
- *  Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *  drivers/wireless/cc3000/wlan.c  - CC3000 Host Driver Implementation.
+ *
+ *    Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  *
  *  Redistribution and use in source and binary forms, with or without
  *  modification, are permitted provided that the following conditions
@@ -261,7 +262,7 @@ void SpiReceiveHandler(void *pvBuffer)
   STREAM_TO_UINT16((char *)tSLInformation.pucReceivedData,
                    HCI_EVENT_OPCODE_OFFSET, event_type);
 
-  nllvdbg("Evnt:0x%x\n", event_type);
+  ninfo("Evnt:0x%x\n", event_type);
   UNUSED(event_type);
 
   hci_unsolicited_event_handler();
diff --git a/drivers/wireless/ieee802154/mrf24j40.c b/drivers/wireless/ieee802154/mrf24j40.c
index cc831fd7830578da4451124cc50c78320222fe5c..3c8e9ec8d7e90140e19ebe4e224075ecca7943e8 100644
--- a/drivers/wireless/ieee802154/mrf24j40.c
+++ b/drivers/wireless/ieee802154/mrf24j40.c
@@ -51,6 +51,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -341,7 +342,7 @@ static uint8_t mrf24j40_getreg(FAR struct spi_dev_s *spi, uint32_t addr)
   SPI_SELECT     (spi, SPIDEV_IEEE802154, false);
   mrf24j40_unlock(spi);
 
-  /*dbg("r[%04X]=%02X\n",addr,rx[len-1]);*/
+  /*winfo("r[%04X]=%02X\n", addr, rx[len-1]);*/
   return rx[len-1];
 }
 
@@ -481,7 +482,7 @@ static int mrf24j40_setrxmode(FAR struct mrf24j40_radio_s *dev, int mode)
   mrf24j40_setreg(dev->spi, MRF24J40_RXMCR, reg);
 
   dev->rxmode = mode;
-  dbg("%u\n",(unsigned)mode);
+  winfo("%u\n", (unsigned)mode);
   return OK;
 }
 
@@ -505,10 +506,9 @@ static int mrf24j40_setchannel(FAR struct ieee802154_radio_s *ieee,
                                uint8_t chan)
 {
   FAR struct mrf24j40_radio_s *dev = (FAR struct mrf24j40_radio_s *)ieee;
-  
   if (chan<11 || chan>26)
     {
-      dbg("Invalid chan: %d\n",chan);
+      werr("ERROR: Invalid chan: %d\n",chan);
       return -EINVAL;
     }
 
@@ -523,7 +523,7 @@ static int mrf24j40_setchannel(FAR struct ieee802154_radio_s *ieee,
   mrf24j40_resetrfsm(dev);
 
   dev->channel = chan;
-  //dbg("%u\n",(unsigned)chan);
+  //winfo("%u\n", (unsigned)chan);
 
   return OK;
 }
@@ -563,7 +563,7 @@ static int mrf24j40_setpanid(FAR struct ieee802154_radio_s *ieee,
   mrf24j40_setreg(dev->spi, MRF24J40_PANIDL, (uint8_t)(panid&0xFF));
 
   dev->panid = panid;
-  dbg("%04X\n",(unsigned)panid);
+  winfo("%04X\n", (unsigned)panid);
 
   return OK;
 }
@@ -605,7 +605,7 @@ static int mrf24j40_setsaddr(FAR struct ieee802154_radio_s *ieee,
   mrf24j40_setreg(dev->spi, MRF24J40_SADRL, (uint8_t)(saddr&0xFF));
 
   dev->saddr = saddr;
-  dbg("%04X\n",(unsigned)saddr);  
+  winfo("%04X\n", (unsigned)saddr);
   return OK;
 }
 
@@ -817,7 +817,7 @@ static int mrf24j40_settxpower(FAR struct ieee802154_radio_s *ieee,
       return -EINVAL;
     }
 
-  lldbg("remaining attenuation: %d mBm\n",txpwr);
+  winfo("remaining attenuation: %d mBm\n",txpwr);
 
   switch(txpwr/100)
     {
@@ -935,7 +935,7 @@ static int mrf24j40_regdump(FAR struct mrf24j40_radio_s *dev)
   char buf[4+16*3+2+1];
   int len=0;
 
-  dbg("Short regs:\n");
+  winfo("Short regs:\n");
 
   for (i = 0; i < 0x40; i++)
     {
@@ -948,11 +948,11 @@ static int mrf24j40_regdump(FAR struct mrf24j40_radio_s *dev)
       if ((i & 15) == 15)
         {
           sprintf(buf+len, "\n");
-          dbg("%s",buf);
+          winfo("%s", buf);
         }
     }
 
-  dbg("Long regs:\n");
+  winfo("Long regs:\n");
   for (i=0x80000200;i<0x80000250;i++)
     {
       if ((i&15)==0)
@@ -964,7 +964,7 @@ static int mrf24j40_regdump(FAR struct mrf24j40_radio_s *dev)
       if ((i & 15) == 15)
         {
           sprintf(buf+len, "\n");
-          dbg("%s",buf);
+          winfo("%s", buf);
         }
     }
 
@@ -990,7 +990,7 @@ static int mrf24j40_ioctl(FAR struct ieee802154_radio_s *ieee, int cmd,
         return mrf24j40_regdump(dev);
 
       case 1001: dev->paenabled = (uint8_t)arg;
-        dbg("PA %sabled\n",arg?"en":"dis");
+        winfo("PA %sabled\n", arg ? "en" : "dis");
         return OK;
 
       default:
@@ -1075,13 +1075,13 @@ static int mrf24j40_transmit(FAR struct ieee802154_radio_s *ieee, FAR struct iee
   reg  = mrf24j40_getreg(dev->spi, MRF24J40_INTCON);
   reg &= ~MRF24J40_INTCON_TXNIE;
   mrf24j40_setreg(dev->spi, MRF24J40_INTCON, reg);
- 
+
   /* Analyze frame control to compute header length */
 
   fc1 = packet->data[0];
   fc2 = packet->data[1];
 
- // dbg("fc1 %02X fc2 %02X\n", fc1,fc2);
+ // winfo("fc1 %02X fc2 %02X\n", fc1,fc2);
 
   if ((fc2 & IEEE802154_FC2_DADDR) == IEEE802154_DADDR_SHORT)
     {
@@ -1111,7 +1111,7 @@ static int mrf24j40_transmit(FAR struct ieee802154_radio_s *ieee, FAR struct iee
       hlen += 8; /* Ext saddr */
     }
 
-//  dbg("hlen %d\n",hlen);
+//  winfo("hlen %d\n",hlen);
 
   /* Header len, 0, TODO for security modes */
 
@@ -1128,7 +1128,7 @@ static int mrf24j40_transmit(FAR struct ieee802154_radio_s *ieee, FAR struct iee
       mrf24j40_setreg(dev->spi, addr++, packet->data[ret]);
     }
 
-  /* If the frame control field contains 
+  /* If the frame control field contains
    * an acknowledgment request, set the TXNACKREQ bit.
    * See IEEE 802.15.4/2003 7.2.1.1 page 112 for info.
    */
@@ -1170,6 +1170,10 @@ static void mrf24j40_irqwork_tx(FAR struct mrf24j40_radio_s *dev)
   dev->ieee.txretries = (reg & MRF24J40_TXSTAT_X_MASK) >> MRF24J40_TXSTAT_X_SHIFT;
   dev->ieee.txbusy    = (reg & MRF24J40_TXSTAT_CCAFAIL) == MRF24J40_TXSTAT_CCAFAIL;
 
+  //winfo("TXSTAT%02X!\n", txstat);
+#warning TODO report errors
+  UNUSED(txstat);
+
   /* Disable tx int */
 
   reg  = mrf24j40_getreg(dev->spi, MRF24J40_INTCON);
@@ -1194,7 +1198,7 @@ static int mrf24j40_rxenable(FAR struct ieee802154_radio_s *ieee, bool state,
 {
   FAR struct mrf24j40_radio_s *dev = (FAR struct mrf24j40_radio_s *)ieee;
   uint8_t reg;
-  
+
   if (state)
     {
       mrf24j40_pacontrol(dev, MRF24J40_PA_AUTO);
@@ -1228,7 +1232,7 @@ static void mrf24j40_irqwork_rx(FAR struct mrf24j40_radio_s *dev)
   uint32_t index;
   uint8_t  reg;
 
-  /*dbg("!\n");*/
+  /*winfo("!\n");*/
 
   /* Disable rx int */
 
@@ -1244,7 +1248,7 @@ static void mrf24j40_irqwork_rx(FAR struct mrf24j40_radio_s *dev)
 
   addr = MRF24J40_RXBUF_BASE;
   dev->ieee.rxbuf->len = mrf24j40_getreg(dev->spi, addr++);
-  /*dbg("len %3d\n", dev->ieee.rxbuf->len);*/
+  /*winfo("len %3d\n", dev->ieee.rxbuf->len);*/
 
   for (index = 0; index < dev->ieee.rxbuf->len; index++)
     {
@@ -1299,7 +1303,7 @@ static void mrf24j40_irqworker(FAR void *arg)
   /* Read and store INTSTAT - this clears the register. */
 
   intstat = mrf24j40_getreg(dev->spi, MRF24J40_INTSTAT);
-//  dbg("INT%02X\n", intstat);
+//  winfo("INT%02X\n", intstat);
 
   /* Do work according to the pending interrupts */
 
@@ -1405,12 +1409,22 @@ FAR struct ieee802154_radio_s *mrf24j40_init(FAR struct spi_dev_s *spi,
     }
 
   dev->ieee.ops = &mrf24j40_devops;
+
+  /* Initialize semaphores */
+
   sem_init(&dev->ieee.rxsem, 0, 0);
   sem_init(&dev->ieee.txsem, 0, 0);
 
+  /* These semaphores are all used for signaling and, hence, should
+   * not have priority inheritance enabled.
+   */
+
+  sem_setprotocol(&dev->ieee.rxsem, SEM_PRIO_NONE);
+  sem_setprotocol(&dev->ieee.txsem, SEM_PRIO_NONE);
+
   dev->lower    = lower;
   dev->spi      = spi;
-  
+
   mrf24j40_initialize(dev);
 
   mrf24j40_setchannel(&dev->ieee, 11);
diff --git a/drivers/wireless/nrf24l01.c b/drivers/wireless/nrf24l01.c
index eb6c3f68c8b8bbeae5feef301d42931d0a7954e1..61378b192871f4c977f1f6a41240aa64d536b48e 100644
--- a/drivers/wireless/nrf24l01.c
+++ b/drivers/wireless/nrf24l01.c
@@ -163,42 +163,40 @@ static void nrf24l01_lock(FAR struct spi_dev_s *spi);
 static void nrf24l01_unlock(FAR struct spi_dev_s *spi);
 
 static uint8_t nrf24l01_access(FAR struct nrf24l01_dev_s *dev,
-    nrf24l01_access_mode_t mode, uint8_t cmd, uint8_t *buf, int length);
+             nrf24l01_access_mode_t mode, uint8_t cmd, uint8_t *buf,
+             int length);
 static uint8_t nrf24l01_flush_rx(FAR struct nrf24l01_dev_s *dev);
 static uint8_t nrf24l01_flush_tx(FAR struct nrf24l01_dev_s *dev);
 
 /* Read register from nrf24 */
 
 static uint8_t nrf24l01_readreg(FAR struct nrf24l01_dev_s *dev, uint8_t reg,
-    uint8_t *value, int len);
+             FAR uint8_t *value, int len);
 
 /* Read single byte value from a register of nrf24 */
 
 static uint8_t nrf24l01_readregbyte(FAR struct nrf24l01_dev_s *dev,
-    uint8_t reg);
-
-static void nrf24l01_writeregbyte(FAR struct nrf24l01_dev_s *dev, uint8_t reg,
-    uint8_t value);
-
-static uint8_t nrf24l01_setregbit(FAR struct nrf24l01_dev_s *dev, uint8_t reg,
-    uint8_t value, bool set);
-
-static void nrf24l01_tostate(FAR struct nrf24l01_dev_s *dev, nrf24l01_state_t state);
-
-static int nrf24l01_irqhandler(FAR int irq, FAR void *context);
-
-static inline int nrf24l01_attachirq(FAR struct nrf24l01_dev_s *dev, xcpt_t isr);
-
-static int dosend(FAR struct nrf24l01_dev_s *dev, FAR const uint8_t *data, size_t datalen);
-
+             uint8_t reg);
+static void nrf24l01_writeregbyte(FAR struct nrf24l01_dev_s *dev,
+             uint8_t reg, uint8_t value);
+static uint8_t nrf24l01_setregbit(FAR struct nrf24l01_dev_s *dev,
+             uint8_t reg, uint8_t value, bool set);
+static void nrf24l01_tostate(FAR struct nrf24l01_dev_s *dev,
+             nrf24l01_state_t state);
+static int nrf24l01_irqhandler(FAR int irq, FAR void *context,
+             FAR void *arg);
+static inline int nrf24l01_attachirq(FAR struct nrf24l01_dev_s *dev,
+             xcpt_t isr, FAR void *arg);
+static int dosend(FAR struct nrf24l01_dev_s *dev, FAR const uint8_t *data,
+             size_t datalen);
 static int nrf24l01_unregister(FAR struct nrf24l01_dev_s *dev);
 
 #ifdef CONFIG_WL_NRF24L01_RXSUPPORT
 
-void fifoput(struct nrf24l01_dev_s *dev, uint8_t pipeno, uint8_t *buffer, uint8_t buflen);
-
-uint8_t fifoget(struct nrf24l01_dev_s *dev, uint8_t *buffer, uint8_t buflen, uint8_t *pipeno);
-
+void fifoput(struct nrf24l01_dev_s *dev, uint8_t pipeno,
+             FAR uint8_t *buffer, uint8_t buflen);
+uint8_t fifoget(struct nrf24l01_dev_s *dev, FAR uint8_t *buffer,
+             uint8_t buflen, FAR uint8_t *pipeno);
 static void nrf24l01_worker(FAR void *arg);
 
 #endif
@@ -206,24 +204,20 @@ static void nrf24l01_worker(FAR void *arg);
 /* POSIX API */
 
 static int nrf24l01_open(FAR struct file *filep);
-
 static int nrf24l01_close(FAR struct file *filep);
-
-static ssize_t nrf24l01_read(FAR struct file *filep, FAR char *buffer, size_t buflen);
-
-static ssize_t nrf24l01_write(FAR struct file *filep, FAR const char *buffer, size_t buflen);
-
-static int nrf24l01_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
-
+static ssize_t nrf24l01_read(FAR struct file *filep, FAR char *buffer,
+             size_t buflen);
+static ssize_t nrf24l01_write(FAR struct file *filep,
+             FAR const char *buffer, size_t buflen);
+static int nrf24l01_ioctl(FAR struct file *filep, int cmd,
+             unsigned long arg);
 static int nrf24l01_poll(FAR struct file *filep, FAR struct pollfd *fds,
-                        bool setup);
+             bool setup);
 
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
-static FAR struct nrf24l01_dev_s *g_nrf24l01dev;
-
 static const struct file_operations nrf24l01_fops =
 {
   nrf24l01_open,    /* open */
@@ -491,17 +485,17 @@ uint8_t fifoget(struct nrf24l01_dev_s *dev, uint8_t *buffer, uint8_t buflen, uin
 
 #endif
 
-static int nrf24l01_irqhandler(int irq, FAR void *context)
+static int nrf24l01_irqhandler(int irq, FAR void *context, FAR void *arg)
 {
-  FAR struct nrf24l01_dev_s *dev = g_nrf24l01dev;
+  FAR struct nrf24l01_dev_s *dev = (FAR struct nrf24l01_dev_s *)arg;
 
-  wllvdbg("*IRQ*");
+  winfo("*IRQ*");
 
 #ifdef CONFIG_WL_NRF24L01_RXSUPPORT
 
   /* If RX is enabled we delegate the actual work to bottom-half handler */
 
-  work_queue(HPWORK, &g_nrf24l01dev->irq_work, nrf24l01_worker, dev, 0);
+  work_queue(HPWORK, &dev->irq_work, nrf24l01_worker, dev, 0);
 #else
 
   /* Otherwise we simply wake up the send function */
@@ -512,11 +506,12 @@ static int nrf24l01_irqhandler(int irq, FAR void *context)
   return OK;
 }
 
-/* Configure IRQ pin  (falling edge) */
+/* Configure IRQ pin (falling edge) */
 
-static inline int nrf24l01_attachirq(FAR struct nrf24l01_dev_s *dev, xcpt_t isr)
+static inline int nrf24l01_attachirq(FAR struct nrf24l01_dev_s *dev, xcpt_t isr,
+                                     FAR void *arg)
 {
-  return dev->config->irqattach(isr);
+  return dev->config->irqattach(isr, arg);
 }
 
 static inline bool nrf24l01_chipenable(FAR struct nrf24l01_dev_s *dev, bool enable)
@@ -551,7 +546,7 @@ static void nrf24l01_worker(FAR void *arg)
 
       bool ce = nrf24l01_chipenable(dev, false);
 
-      wdbg("RX_DR is set!\n");
+      winfo("RX_DR is set!\n");
 
       /* Read and store all received payloads */
 
@@ -586,8 +581,8 @@ static void nrf24l01_worker(FAR void *arg)
 
           status = nrf24l01_readreg(dev, NRF24L01_FIFO_STATUS, &fifo_status, 1);
 
-          wdbg("FIFO_STATUS=%02x\n", fifo_status);
-          wdbg("STATUS=%02x\n", status);
+          winfo("FIFO_STATUS=%02x\n", fifo_status);
+          winfo("STATUS=%02x\n", status);
         }
       while (!(fifo_status | NRF24L01_RX_EMPTY));
 
@@ -604,7 +599,7 @@ static void nrf24l01_worker(FAR void *arg)
         {
           dev->pfd->revents |= POLLIN;  /* Data available for input */
 
-          wvdbg("Wake up polled fd");
+          winfo("Wake up polled fd");
           sem_post(dev->pfd->sem);
         }
 #endif
@@ -720,11 +715,11 @@ static int dosend(FAR struct nrf24l01_dev_s *dev, FAR const uint8_t *data, size_
       dev->lastxmitcount = (obsvalue & NRF24L01_ARC_CNT_MASK)
           >> NRF24L01_ARC_CNT_SHIFT;
 
-      wvdbg("Transmission OK (lastxmitcount=%d)\n", dev->lastxmitcount);
+      winfo("Transmission OK (lastxmitcount=%d)\n", dev->lastxmitcount);
     }
   else if (status & NRF24L01_MAX_RT)
     {
-      wvdbg("MAX_RT!\n", dev->lastxmitcount);
+      winfo("MAX_RT!\n", dev->lastxmitcount);
       result = -ECOMM;
       dev->lastxmitcount = NRF24L01_XMIT_MAXRT;
 
@@ -736,7 +731,7 @@ static int dosend(FAR struct nrf24l01_dev_s *dev, FAR const uint8_t *data, size_
     {
       /* Unexpected... */
 
-      wdbg("No TX_DS nor MAX_RT bit set in STATUS reg!\n");
+      werr("ERROR: No TX_DS nor MAX_RT bit set in STATUS reg!\n");
       result = -EIO;
     }
 
@@ -758,7 +753,7 @@ static int nrf24l01_open(FAR struct file *filep)
   FAR struct nrf24l01_dev_s *dev;
   int result;
 
-  wvdbg("Opening nRF24L01 dev\n");
+  winfo("Opening nRF24L01 dev\n");
 
   DEBUGASSERT(filep);
   inode = filep->f_inode;
@@ -800,7 +795,7 @@ static int nrf24l01_close(FAR struct file *filep)
   FAR struct inode *inode;
   FAR struct nrf24l01_dev_s *dev;
 
-  wvdbg("Closing nRF24L01 dev\n");
+  winfo("Closing nRF24L01 dev\n");
   DEBUGASSERT(filep);
   inode = filep->f_inode;
 
@@ -885,7 +880,7 @@ static int nrf24l01_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   FAR struct nrf24l01_dev_s *dev;
   int result = OK;
 
-  wvdbg("cmd: %d arg: %ld\n", cmd, arg);
+  winfo("cmd: %d arg: %ld\n", cmd, arg);
   DEBUGASSERT(filep);
   inode = filep->f_inode;
 
@@ -1117,7 +1112,7 @@ static int nrf24l01_poll(FAR struct file *filep, FAR struct pollfd *fds,
   FAR struct nrf24l01_dev_s *dev;
   int result = OK;
 
-  wvdbg("setup: %d\n", (int)setup);
+  winfo("setup: %d\n", (int)setup);
   DEBUGASSERT(filep && fds);
   inode = filep->f_inode;
 
@@ -1177,11 +1172,10 @@ static int nrf24l01_unregister(FAR struct nrf24l01_dev_s *dev)
 
   /* Release IRQ */
 
-  nrf24l01_attachirq(dev, NULL);
-
-  g_nrf24l01dev = NULL;
+  nrf24l01_attachirq(dev, NULL, NULL);
 
   /* Free memory */
+
 #ifdef CONFIG_WL_NRF24L01_RXSUPPORT
   kmm_free(dev->rx_fifo);
 #endif
@@ -1224,7 +1218,8 @@ int nrf24l01_register(FAR struct spi_dev_s *spi, FAR struct nrf24l01_config_s *c
   dev->pfd = NULL;
 #endif
 
-  sem_init(&(dev->sem_tx), 0, 0);
+  sem_init(&dev->sem_tx, 0, 0);
+  sem_setprotocol(&dev->sem_tx, SEM_PRIO_NONE);
 
 #ifdef CONFIG_WL_NRF24L01_RXSUPPORT
   if ((rx_fifo = kmm_malloc(CONFIG_WL_NRF24L01_RXFIFO_LEN)) == NULL)
@@ -1240,35 +1235,27 @@ int nrf24l01_register(FAR struct spi_dev_s *spi, FAR struct nrf24l01_config_s *c
 
   sem_init(&(dev->sem_fifo), 0, 1);
   sem_init(&(dev->sem_rx), 0, 0);
+  sem_setprotocol(&dev->sem_rx, SEM_PRIO_NONE);
 #endif
 
-  /* Set the global reference */
-
-  g_nrf24l01dev = dev;
-
   /* Configure IRQ pin  (falling edge) */
 
-  nrf24l01_attachirq(dev, nrf24l01_irqhandler);
+  nrf24l01_attachirq(dev, nrf24l01_irqhandler, dev);
 
   /* Register the device as an input device */
 
-  ivdbg("Registering " DEV_NAME "\n");
+  winfo("Registering " DEV_NAME "\n");
 
   result = register_driver(DEV_NAME, &nrf24l01_fops, 0666, dev);
   if (result < 0)
     {
-      wdbg("register_driver() failed: %d\n", result);
+      werr("ERROR: register_driver() failed: %d\n", result);
       nrf24l01_unregister(dev);
     }
 
   return result;
 }
 
-FAR struct nrf24l01_dev_s * nrf24l01_getinstance(void)
-{
-  return g_nrf24l01dev;
-}
-
 /* (re)set the device in a default initial state */
 
 int nrf24l01_init(FAR struct nrf24l01_dev_s *dev)
@@ -1658,7 +1645,7 @@ int nrf24l01_sendto(FAR struct nrf24l01_dev_s *dev, FAR const uint8_t *data,
 
   if ((dev->en_aa & 1) && (memcmp(destaddr, dev->pipe0addr, dev->addrlen)))
     {
-      wdbg("Change pipe #0 addr to dest addr\n");
+      winfo("Change pipe #0 addr to dest addr\n");
       nrf24l01_writereg(dev, NRF24L01_RX_ADDR_P0, destaddr, NRF24L01_MAX_ADDR_LEN);
       pipeaddrchg = true;
     }
@@ -1670,7 +1657,7 @@ int nrf24l01_sendto(FAR struct nrf24l01_dev_s *dev, FAR const uint8_t *data,
       /* Restore pipe #0 addr */
 
       nrf24l01_writereg(dev, NRF24L01_RX_ADDR_P0, dev->pipe0addr, NRF24L01_MAX_ADDR_LEN);
-      wdbg("Pipe #0 default addr restored\n");
+      winfo("Pipe #0 default addr restored\n");
     }
 
   nrf24l01_unlock(dev->spi);
diff --git a/fs/Kconfig b/fs/Kconfig
index 150bbcdde99b7430173b233f859de51d5df52a4f..05ab5daea93ac2abc748c9920fccc109b8881642 100644
--- a/fs/Kconfig
+++ b/fs/Kconfig
@@ -21,7 +21,7 @@ config FS_AUTOMOUNTER
 config FS_AUTOMOUNTER_DEBUG
 	bool "Auto-mounter debug"
 	default n
-	depends on FS_AUTOMOUNTER && DEBUG
+	depends on FS_AUTOMOUNTER && DEBUG_FEATURES
 	---help---
 		Normally, the auto-mounter will generate debug output when sub-system
 		level file system debug is enabled.  This option will select debug
@@ -40,6 +40,18 @@ config DISABLE_PSEUDOFS_OPERATIONS
 		However, in practical embedded system, they are seldom needed and
 		you can save a little FLASH space by disabling the capability.
 
+config PSEUDOFS_SOFTLINKS
+	bool "Pseudo-filesystem soft links"
+	default n
+	depends on !DISABLE_PSEUDOFS_OPERATIONS
+	---help---
+		Enable support for soft links in the pseudeo file system.  Soft
+		links are not supported within mounted volumes by any NuttX file
+		system.  However, if this option is selected, then soft links
+		may be add in the pseudo file system.  This might be useful, for
+		to link a directory in the pseudo-file system, such as /bin, to
+		to a directory in a mounted volume, say /mnt/sdcard/bin.
+
 config FS_READABLE
 	bool
 	default n
@@ -74,45 +86,3 @@ source fs/binfs/Kconfig
 source fs/procfs/Kconfig
 source fs/unionfs/Kconfig
 source fs/hostfs/Kconfig
-
-comment "System Logging"
-
-config SYSLOG
-	bool "Advanced SYSLOG features"
-	default n
-	---help---
-		Enables generic system logging features.  NOTE: This setting is not
-		required to enable system logging.  If this feature is not enable
-		system logging will still be available and will log to the system
-		console (like printf()).  This setting is required to enable
-		customization of the basic system loggin capability.
-
-config SYSLOG_TIMESTAMP
-	bool "Prepend timestamp to syslog message"
-	default n
-	---help---
-		Prepend timestamp to syslog message.
-
-if SYSLOG
-
-config SYSLOG_CHAR
-	bool "System log character device support"
-	default y
-	---help---
-		Enable the generic character device for the SYSLOG. The full path to the
-		SYSLOG device is provided by SYSLOG_DEVPATH. A valid character device (or
-		file) must exist at this path.  It will by opened by syslog_initialize.
-
-		Do not enable more than one SYSLOG device.
-
-config SYSLOG_DEVPATH
-	string "System log device"
-	default "/dev/syslog"
-	depends on SYSLOG_CHAR
-	---help---
-		The full path to the system logging device.  For the RAMLOG SYSLOG device,
-		this is normally "/dev/ramlog".  For character SYSLOG devices, it should be
-		some other existing character device (or file) supported by the configuration
-		(such as "/dev/ttyS1")/
-
-endif
diff --git a/fs/Makefile b/fs/Makefile
index 5ef45f84ee28685a656fa6f5cd043b13550048ed..6ab682d28f227d857110bb73917f66ccb26b4054 100644
--- a/fs/Makefile
+++ b/fs/Makefile
@@ -1,7 +1,7 @@
 ############################################################################
 # fs/Makefile
 #
-#   Copyright (C) 2007, 2008, 2011-2014, 2016 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2007, 2008, 2011-2014, 2016-2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
diff --git a/fs/aio/aio.h b/fs/aio/aio.h
index f74269a19a171b926d6de3c9971ba7d695b103fb..73ff7faa79ff03384949410dd325c4c21f0e7837 100644
--- a/fs/aio/aio.h
+++ b/fs/aio/aio.h
@@ -277,5 +277,10 @@ int aio_queue(FAR struct aio_container_s *aioc, worker_t worker);
 
 int aio_signal(pid_t pid, FAR struct aiocb *aiocbp);
 
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
 #endif /* CONFIG_FS_AIO */
 #endif /* __FS_AIO_AIO_H */
diff --git a/fs/aio/aio_cancel.c b/fs/aio/aio_cancel.c
index bdd4ba463a0e306818f9cee8cb9be08b5e06a3b2..aa575fdb8b922f0330720176f5bd241352a2f985 100644
--- a/fs/aio/aio_cancel.c
+++ b/fs/aio/aio_cancel.c
@@ -61,30 +61,30 @@
  *   The aio_cancel() function attempts to cancel one or more asynchronous
  *   I/O requests currently outstanding against file descriptor 'fildes'.
  *   The aiocbp argument points to the asynchronous I/O control block for
- *   a particular request to be cancelled. If aiocbp is NULL, then all
+ *   a particular request to be canceled. If aiocbp is NULL, then all
  *   outstanding cancelable asynchronous I/O requests against fildes will
- *   be cancelled.
+ *   be canceled.
  *
  *   Normal asynchronous notification will occur for asynchronous I/O
- *   operations that are successfully cancelled. If there are requests that
- *   cannot be cancelled, then the normal asynchronous completion process
+ *   operations that are successfully canceled. If there are requests that
+ *   cannot be canceled, then the normal asynchronous completion process
  *   will take place for those requests when they are completed.
  *
- *   For requested operations that are successfully cancelled, the associated
+ *   For requested operations that are successfully canceled, the associated
  *   error status will be set to ECANCELED and the return status will be -1.
- *   For requested operations that are not successfully cancelled, the aiocbp
+ *   For requested operations that are not successfully canceled, the aiocbp
  *   will not be modified by aio_cancel().
  *
  * Input Parameters:
  *   fildes - Not used in this implementation
  *   aiocbp - Points to the asynchronous I/O control block for a particular
- *            request to be cancelled.
+ *            request to be canceled.
  *
  * Returned Value:
  *    The aio_cancel() function will return the value AIO_CANCELED if the
- *    requested operation(s) were cancelled. The value AIO_NOTCANCELED will
+ *    requested operation(s) were canceled. The value AIO_NOTCANCELED will
  *    be returned if at least one of the requested operation(s) cannot be
- *    cancelled because it is in progress. In this case, the state of the
+ *    canceled because it is in progress. In this case, the state of the
  *    other operations, if any, referenced in the call to aio_cancel() is
  *    not indicated by the return value of aio_cancel(). The application
  *    may determine the state of affairs for these operations by using
@@ -133,7 +133,7 @@ int aio_cancel(int fildes, FAR struct aiocb *aiocbp)
                * possibilities:* (1) the work has already been started and
                * is no longer queued, or (2) the work has not been started
                * and is still in the work queue.  Only the second case can
-               * be cancelled.  work_cancel() will return -ENOENT in the
+               * be canceled.  work_cancel() will return -ENOENT in the
                * first case.
                */
 
@@ -177,7 +177,7 @@ int aio_cancel(int fildes, FAR struct aiocb *aiocbp)
                * possibilities:* (1) the work has already been started and
                * is no longer queued, or (2) the work has not been started
                * and is still in the work queue.  Only the second case can
-               * be cancelled.  work_cancel() will return -ENOENT in the
+               * be canceled.  work_cancel() will return -ENOENT in the
                * first case.
                */
 
diff --git a/fs/aio/aio_fsync.c b/fs/aio/aio_fsync.c
index 8070817595b18f0b7d5e53bb576cc47b8fa1c244..fd08328db459d228083e1da2dc7a3de14f778f42 100644
--- a/fs/aio/aio_fsync.c
+++ b/fs/aio/aio_fsync.c
@@ -100,7 +100,7 @@ static void aio_fsync_worker(FAR void *arg)
   if (ret < 0)
     {
       int errcode = get_errno();
-      fdbg("ERROR: fsync failed: %d\n", errcode);
+      ferr("ERROR: fsync failed: %d\n", errcode);
       DEBUGASSERT(errcode > 0);
       aiocbp->aio_result = -errcode;
     }
diff --git a/fs/aio/aio_read.c b/fs/aio/aio_read.c
index b3e717b58bfbd99588010b0a31ece89e37eb2f3f..462c5ddd26eb676ee22415b62a7e71884ecb19d9 100644
--- a/fs/aio/aio_read.c
+++ b/fs/aio/aio_read.c
@@ -133,7 +133,7 @@ static void aio_read_worker(FAR void *arg)
   if (nread < 0)
     {
       int errcode = get_errno();
-      fdbg("ERROR: pread failed: %d\n", errcode);
+      ferr("ERROR: pread failed: %d\n", errcode);
       DEBUGASSERT(errcode > 0);
       aiocbp->aio_result = -errcode;
     }
@@ -226,7 +226,7 @@ static void aio_read_worker(FAR void *arg)
  *     aiocbp->aio_nbytes is an invalid value.
  *
  *   In the case that the aio_read() successfully queues the I/O operation
- *   but the operation is subsequently cancelled or encounters an error, the
+ *   but the operation is subsequently canceled or encounters an error, the
  *   return status of the asynchronous operation is one of the values
  *   normally returned by the read() function call. In addition, the error
  *   status of the asynchronous operation is set to one of the error
@@ -235,7 +235,7 @@ static void aio_read_worker(FAR void *arg)
  *
  *   EBADF - The aiocbp->aio_fildes argument is not a valid file descriptor
  *     open for reading.
- *   ECANCELED - The requested I/O was cancelled before the I/O completed
+ *   ECANCELED - The requested I/O was canceled before the I/O completed
  *     due to an explicit aio_cancel() request.
  *   EINVAL - The file offset value implied by aiocbp->aio_offset would be
  *     invalid.
diff --git a/fs/aio/aio_signal.c b/fs/aio/aio_signal.c
index 5a279044c87aeec51f5a290f1e67b8ba684bab12..702d7f5b84f05e6283fa40ed8e8427115a1ba903 100644
--- a/fs/aio/aio_signal.c
+++ b/fs/aio/aio_signal.c
@@ -102,7 +102,7 @@ int aio_signal(pid_t pid, FAR struct aiocb *aiocbp)
       if (status < 0)
         {
           errcode = get_errno();
-          fdbg("ERROR: sigqueue #1 failed: %d\n", errcode);
+          ferr("ERROR: sigqueue #1 failed: %d\n", errcode);
           ret = ERROR;
         }
     }
@@ -115,7 +115,7 @@ int aio_signal(pid_t pid, FAR struct aiocb *aiocbp)
       ret = sig_notification(pid, &aiocbp->aio_sigevent);
       if (ret < 0)
         {
-          fdbg("ERROR: sig_notification failed: %d\n", ret);
+          ferr("ERROR: sig_notification failed: %d\n", ret);
         }
     }
 #endif
@@ -133,7 +133,7 @@ int aio_signal(pid_t pid, FAR struct aiocb *aiocbp)
   if (status && ret == OK)
     {
       errcode = get_errno();
-      fdbg("ERROR: sigqueue #2 failed: %d\n", errcode);
+      ferr("ERROR: sigqueue #2 failed: %d\n", errcode);
       ret = ERROR;
     }
 
diff --git a/fs/aio/aio_write.c b/fs/aio/aio_write.c
index e9ed46d81555f6483ce19909bb5dcb0ff4cb1c38..0aab19e7cba107e9f4e9e9150523209cc90dc57e 100644
--- a/fs/aio/aio_write.c
+++ b/fs/aio/aio_write.c
@@ -125,7 +125,7 @@ static void aio_write_worker(FAR void *arg)
       if (oflags < 0)
         {
           int errcode = get_errno();
-          fdbg("ERROR: fcntl failed: %d\n", errcode);
+          ferr("ERROR: fcntl failed: %d\n", errcode);
           aiocbp->aio_result = -errcode;
           goto errout;
         }
@@ -180,7 +180,7 @@ static void aio_write_worker(FAR void *arg)
   if (nwritten < 0)
     {
       int errcode = get_errno();
-      fdbg("ERROR: write/pwrite failed: %d\n", errcode);
+      ferr("ERROR: write/pwrite failed: %d\n", errcode);
       DEBUGASSERT(errcode > 0);
       aiocbp->aio_result = -errcode;
     }
@@ -279,7 +279,7 @@ errout:
  *     aiocbp->aio_nbytes is an invalid value.
  *
  *   In the case that the aio_write() successfully queues the I/O operation
- *   but the operation is subsequently cancelled or encounters an error, the
+ *   but the operation is subsequently canceled or encounters an error, the
  *   return status of the asynchronous operation is one of the values
  *   normally returned by the write() function call. In addition, the error
  *   status of the asynchronous operation is set to one of the error
@@ -290,7 +290,7 @@ errout:
  *     open for writing.
  *   EINVAL - The file offset value implied by aiocbp->aio_offset would be
  *     invalid.
- *   ECANCELED - The requested I/O was cancelled before the I/O completed
+ *   ECANCELED - The requested I/O was canceled before the I/O completed
  *     due to an explicit aio_cancel() request.
  *
  * The following condition may be detected synchronously or asynchronously:
diff --git a/fs/aio/aioc_contain.c b/fs/aio/aioc_contain.c
index 05b03c776cbd9b51048676c1c479172c0fd93b8f..88d3deddb6879947bd74830138190ffc6fc388a9 100644
--- a/fs/aio/aioc_contain.c
+++ b/fs/aio/aioc_contain.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/aio/aioc_contain.c
+ * fs/aio/aioc_contain.c
  *
  *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/fs/binfs/fs_binfs.c b/fs/binfs/fs_binfs.c
index 959b3336dd2d12c1ba2daca454527f5332bf1af7..f084710792c9abff84fe9f35fe8705982b42d813 100644
--- a/fs/binfs/fs_binfs.c
+++ b/fs/binfs/fs_binfs.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/binfs/fs_binfs.c
  *
- *   Copyright (C) 2011-2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2013, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -70,6 +70,7 @@ static ssize_t binfs_read(FAR struct file *filep, char *buffer, size_t buflen);
 static int     binfs_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
 
 static int     binfs_dup(FAR const struct file *oldp, FAR struct file *newp);
+static int     binfs_fstat(FAR const struct file *filep, FAR struct stat *buf);
 
 static int     binfs_opendir(struct inode *mountpt, const char *relpath,
                              struct fs_dirent_s *dir);
@@ -108,6 +109,7 @@ const struct mountpt_operations binfs_operations =
 
   NULL,              /* sync */
   binfs_dup,         /* dup */
+  binfs_fstat,       /* fstat */
 
   binfs_opendir,     /* opendir */
   NULL,              /* closedir */
@@ -138,7 +140,7 @@ static int binfs_open(FAR struct file *filep, FAR const char *relpath,
 {
   int index;
 
-  fvdbg("Open '%s'\n", relpath);
+  finfo("Open '%s'\n", relpath);
 
   /* BINFS is read-only.  Any attempt to open with any kind of write
    * access is not permitted.
@@ -146,7 +148,7 @@ static int binfs_open(FAR struct file *filep, FAR const char *relpath,
 
   if ((oflags & O_WRONLY) != 0 || (oflags & O_RDONLY) == 0)
     {
-      fdbg("ERROR: Only O_RDONLY supported\n");
+      ferr("ERROR: Only O_RDONLY supported\n");
       return -EACCES;
     }
 
@@ -157,7 +159,7 @@ static int binfs_open(FAR struct file *filep, FAR const char *relpath,
   index = builtin_isavail(relpath);
   if (index < 0)
     {
-      fdbg("ERROR: Builting %s does not exist\n", relpath);
+      ferr("ERROR: Builting %s does not exist\n", relpath);
       return -ENOENT;
     }
 
@@ -173,7 +175,7 @@ static int binfs_open(FAR struct file *filep, FAR const char *relpath,
 
 static int binfs_close(FAR struct file *filep)
 {
-  fvdbg("Closing\n");
+  finfo("Closing\n");
   return OK;
 }
 
@@ -185,7 +187,7 @@ static ssize_t binfs_read(FAR struct file *filep, char *buffer, size_t buflen)
 {
   /* Reading is not supported.  Just return end-of-file */
 
-  fvdbg("Read %d bytes from offset %d\n", buflen, filep->f_pos);
+  finfo("Read %d bytes from offset %d\n", buflen, filep->f_pos);
   return 0;
 }
 
@@ -197,7 +199,7 @@ static int binfs_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 {
   int ret;
 
-  fvdbg("cmd: %d arg: %08lx\n", cmd, arg);
+  finfo("cmd: %d arg: %08lx\n", cmd, arg);
 
   /* Only one IOCTL command is supported */
 
@@ -237,7 +239,7 @@ static int binfs_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
 static int binfs_dup(FAR const struct file *oldp, FAR struct file *newp)
 {
-  fvdbg("Dup %p->%p\n", oldp, newp);
+  finfo("Dup %p->%p\n", oldp, newp);
 
   /* Copy the index from the old to the new file structure */
 
@@ -245,6 +247,28 @@ static int binfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   return OK;
 }
 
+/****************************************************************************
+ * Name: binfs_fstat
+ *
+ * Description:
+ *   Obtain information about an open file associated with the file
+ *   descriptor 'fd', and will write it to the area pointed to by 'buf'.
+ *
+ ****************************************************************************/
+
+static int binfs_fstat(FAR const struct file *filep, FAR struct stat *buf)
+{
+  DEBUGASSERT(filep != NULL && buf != NULL);
+
+  /* It's a execute-only file system */
+
+  buf->st_mode    = S_IFREG | S_IXOTH | S_IXGRP | S_IXUSR;
+  buf->st_size    = 0;
+  buf->st_blksize = 0;
+  buf->st_blocks  = 0;
+  return OK;
+}
+
 /****************************************************************************
  * Name: binfs_opendir
  *
@@ -256,7 +280,7 @@ static int binfs_dup(FAR const struct file *oldp, FAR struct file *newp)
 static int binfs_opendir(struct inode *mountpt, const char *relpath,
                          struct fs_dirent_s *dir)
 {
-  fvdbg("relpath: \"%s\"\n", relpath ? relpath : "NULL");
+  finfo("relpath: \"%s\"\n", relpath ? relpath : "NULL");
 
   /* The requested directory must be the volume-relative "root" directory */
 
@@ -294,14 +318,14 @@ static int binfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir)
        * special error -ENOENT
        */
 
-      fvdbg("Entry %d: End of directory\n", index);
+      finfo("Entry %d: End of directory\n", index);
       ret = -ENOENT;
     }
   else
     {
       /* Save the filename and file type */
 
-      fvdbg("Entry %d: \"%s\"\n", index, name);
+      finfo("Entry %d: \"%s\"\n", index, name);
       dir->fd_dir.d_type = DTYPE_FILE;
       strncpy(dir->fd_dir.d_name, name, NAME_MAX+1);
 
@@ -331,7 +355,7 @@ static int binfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir)
 
 static int binfs_rewinddir(struct inode *mountpt, struct fs_dirent_s *dir)
 {
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   dir->u.binfs.fb_index = 0;
   return OK;
@@ -351,7 +375,7 @@ static int binfs_rewinddir(struct inode *mountpt, struct fs_dirent_s *dir)
 static int binfs_bind(FAR struct inode *blkdriver, const void *data,
                       void **handle)
 {
-  fvdbg("Entry\n");
+  finfo("Entry\n");
   return OK;
 }
 
@@ -366,7 +390,7 @@ static int binfs_bind(FAR struct inode *blkdriver, const void *data,
 static int binfs_unbind(FAR void *handle, FAR struct inode **blkdriver,
                         unsigned int flags)
 {
-  fvdbg("Entry\n");
+  finfo("Entry\n");
   return OK;
 }
 
@@ -379,7 +403,7 @@ static int binfs_unbind(FAR void *handle, FAR struct inode **blkdriver,
 
 static int binfs_statfs(struct inode *mountpt, struct statfs *buf)
 {
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* Fill in the statfs info */
 
@@ -402,7 +426,7 @@ static int binfs_statfs(struct inode *mountpt, struct statfs *buf)
 
 static int binfs_stat(struct inode *mountpt, const char *relpath, struct stat *buf)
 {
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* The requested directory must be the volume-relative "root" directory */
 
diff --git a/fs/dirent/fs_opendir.c b/fs/dirent/fs_opendir.c
index 5731ba632b2d365bb69f673f626da6c45c443bd8..43b62b9c87910196437b71cdce4d556e4f019ad2 100644
--- a/fs/dirent/fs_opendir.c
+++ b/fs/dirent/fs_opendir.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/dirent/fs_opendir.c
  *
- *   Copyright (C) 2007-2009, 2011, 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011, 2013-2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,8 +40,8 @@
 #include 
 
 #include 
-#include 
 #include 
+#include 
 #include 
 #include 
 
@@ -226,7 +226,10 @@ FAR DIR *opendir(FAR const char *path)
 {
   FAR struct inode *inode = NULL;
   FAR struct fs_dirent_s *dir;
-  FAR const char *relpath;
+  struct inode_search_s desc;
+#ifndef CONFIG_DISABLE_MOUNTPOINT
+  FAR const char *relpath = NULL;
+#endif
   bool isroot = false;
   int ret;
 
@@ -234,12 +237,13 @@ FAR DIR *opendir(FAR const char *path)
    * request for the root inode.
    */
 
+  SETUP_SEARCH(&desc, path, false);
+
   inode_semtake();
   if (path == NULL || *path == '\0' || strcmp(path, "/") == 0)
     {
       inode   = g_root_inode;
       isroot  = true;
-      relpath = NULL;
     }
   else
     {
@@ -253,15 +257,22 @@ FAR DIR *opendir(FAR const char *path)
 
       /* Find the node matching the path. */
 
-      inode = inode_search(&path, (FAR struct inode**)NULL,
-                           (FAR struct inode**)NULL, &relpath);
+      ret = inode_search(&desc);
+      if (ret >= 0)
+        {
+          inode   = desc.node;
+          DEBUGASSERT(inode != NULL);
+#ifndef CONFIG_DISABLE_MOUNTPOINT
+          relpath = desc.relpath;
+#endif
+        }
     }
 
   /* Did we get an inode? */
 
-  if (!inode)
+  if (inode == NULL)
     {
-      /* 'path' is not a does not exist. */
+      /* Inode for 'path' does not exist. */
 
       ret = ENOTDIR;
       goto errout_with_semaphore;
@@ -305,9 +316,9 @@ FAR DIR *opendir(FAR const char *path)
    */
 
 #ifndef CONFIG_DISABLE_MOUNTPOINT
-   else if (INODE_IS_MOUNTPT(inode))
-     {
-       /* Yes, the node is a file system mountpoint */
+  else if (INODE_IS_MOUNTPT(inode))
+    {
+      /* Yes, the node is a file system mountpoint */
 
       dir->fd_root = inode;  /* Save the inode where we start */
 
@@ -328,7 +339,7 @@ FAR DIR *opendir(FAR const char *path)
        */
 
       FAR struct inode *child = inode->i_child;
-      if (child)
+      if (child != NULL)
         {
           /* It looks we have a valid pseudo-filesystem directory node. */
 
@@ -349,6 +360,7 @@ FAR DIR *opendir(FAR const char *path)
         }
     }
 
+  RELEASE_SEARCH(&desc);
   inode_semgive();
   return ((FAR DIR *)dir);
 
@@ -358,6 +370,7 @@ errout_with_direntry:
   kumm_free(dir);
 
 errout_with_semaphore:
+  RELEASE_SEARCH(&desc);
   inode_semgive();
   set_errno(ret);
   return NULL;
diff --git a/fs/dirent/fs_readdir.c b/fs/dirent/fs_readdir.c
index 61d946c3df407d80f396b6016a8299b698a5ca8a..93b2f654fdb5137de93d9dd3b406d80386854f96 100644
--- a/fs/dirent/fs_readdir.c
+++ b/fs/dirent/fs_readdir.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/dirent/fs_readdir.c
  *
- *   Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -88,11 +88,18 @@ static inline int readpseudodir(struct fs_dirent_s *idir)
         {
            idir->fd_dir.d_type |= DTYPE_BLK;
         }
-      if (INODE_IS_MOUNTPT(idir->u.pseudo.fd_next))
+      else if (INODE_IS_MOUNTPT(idir->u.pseudo.fd_next))
         {
            idir->fd_dir.d_type |= DTYPE_DIRECTORY;
         }
       else
+#endif
+#ifdef CONFIG_PSEUDOFS_SOFTLINKS
+      if (INODE_IS_SOFTLINK(idir->u.pseudo.fd_next))
+        {
+           idir->fd_dir.d_type |= DTYPE_LINK;
+        }
+      else
 #endif
         {
            idir->fd_dir.d_type |= DTYPE_CHR;
diff --git a/fs/driver/Make.defs b/fs/driver/Make.defs
index e280ea1580a68cfdd9ad15667b00fb6ad8dd5621..12bde01d439a9751616f81ede56e1dbea4ea94ee 100644
--- a/fs/driver/Make.defs
+++ b/fs/driver/Make.defs
@@ -48,15 +48,7 @@ CSRCS += fs_findblockdriver.c fs_openblockdriver.c fs_closeblockdriver.c
 ifneq ($(CONFIG_DISABLE_PSEUDOFS_OPERATIONS),y)
 CSRCS += fs_blockproxy.c
 endif
-endif
-
-# System logging to a character device (or file)
-
-ifeq ($(CONFIG_SYSLOG),y)
-ifeq ($(CONFIG_SYSLOG_CHAR),y)
-CSRCS += fs_devsyslog.c
-endif
-endif
+endif # CONFIG_DISABLE_MOUNTPOINT
 
 # Include driver build support
 
diff --git a/fs/driver/driver.h b/fs/driver/driver.h
index 9b7f59bdb792f70c44eb27966e3d15ef140662ae..bbe605602e17835212f5c55f3d70f42554d8e4d0 100644
--- a/fs/driver/driver.h
+++ b/fs/driver/driver.h
@@ -63,7 +63,6 @@ extern "C"
  * Public Function Prototypes
  ****************************************************************************/
 
-/* fs_findblockdriver.c *****************************************************/
 /****************************************************************************
  * Name: find_blockdriver
  *
@@ -92,7 +91,6 @@ int find_blockdriver(FAR const char *pathname, int mountflags,
                      FAR struct inode **ppinode);
 #endif
 
-/* fs/drivers/fs_blockproxy.c ***********************************************/
 /****************************************************************************
  * Name: block_proxy
  *
@@ -120,8 +118,7 @@ int find_blockdriver(FAR const char *pathname, int mountflags,
  *
  ****************************************************************************/
 
-#if !defined(CONFIG_DISABLE_PSEUDOFS_OPERATIONS) && \
-    !defined(CONFIG_DISABLE_MOUNTPOINT)
+#if !defined(CONFIG_DISABLE_MOUNTPOINT)
 int block_proxy(FAR const char *blkdev, int oflags);
 #endif
 
diff --git a/fs/driver/fs_blockproxy.c b/fs/driver/fs_blockproxy.c
index 197b5534a576d663c225650261f1e4c4a4d1167e..b03aa4f95eb9b930200efabcc9e059bca5f7e66f 100644
--- a/fs/driver/fs_blockproxy.c
+++ b/fs/driver/fs_blockproxy.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/driver/fs_blockproxy.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -53,10 +53,10 @@
 #include 
 
 #include 
-#include 
+#include 
 
-#if !defined(CONFIG_DISABLE_PSEUDOFS_OPERATIONS) && \
-    !defined(CONFIG_DISABLE_MOUNTPOINT)
+#if !defined(CONFIG_DISABLE_MOUNTPOINT) && \
+    !defined(CONFIG_DISABLE_PSEUDOFS_OPERATIONS)
 
 /****************************************************************************
  * Private Data
@@ -174,7 +174,7 @@ int block_proxy(FAR const char *blkdev, int oflags)
   chardev = unique_chardev();
   if (chardev == NULL)
     {
-      fdbg("ERROR: Failed to create temporary device name\n");
+      ferr("ERROR: Failed to create temporary device name\n");
       return -ENOMEM;
     }
 
@@ -187,7 +187,7 @@ int block_proxy(FAR const char *blkdev, int oflags)
   ret = bchdev_register(blkdev, chardev, readonly);
   if (ret < 0)
     {
-      fdbg("ERROR: bchdev_register(%s, %s) failed: %d\n",
+      ferr("ERROR: bchdev_register(%s, %s) failed: %d\n",
            blkdev, chardev, ret);
 
       goto errout_with_chardev;
@@ -200,7 +200,7 @@ int block_proxy(FAR const char *blkdev, int oflags)
   if (fd < 0)
     {
       ret = -errno;
-      fdbg("ERROR: Failed to open %s: %d\n", chardev, ret);
+      ferr("ERROR: Failed to open %s: %d\n", chardev, ret);
       goto errout_with_bchdev;
     }
 
@@ -213,7 +213,7 @@ int block_proxy(FAR const char *blkdev, int oflags)
   if (ret < 0)
     {
       ret = -errno;
-      fdbg("ERROR: Failed to unlink %s: %d\n", chardev, ret);
+      ferr("ERROR: Failed to unlink %s: %d\n", chardev, ret);
     }
 
   /* Free the allocate character driver name and return the open file
@@ -231,4 +231,4 @@ errout_with_chardev:
   return ret;
 }
 
-#endif /* !CONFIG_DISABLE_PSEUDOFS_OPERATIONS && !CONFIG_DISABLE_MOUNTPOINT */
+#endif /* !CONFIG_DISABLE_MOUNTPOINT && !CONFIG_DISABLE_PSEUDOFS_OPERATIONS */
diff --git a/fs/driver/fs_closeblockdriver.c b/fs/driver/fs_closeblockdriver.c
index 3280236af14fae96626768e7d8ddf910088b7214..7c9c60244d91bb04d416e87d6149136e22491e0f 100644
--- a/fs/driver/fs_closeblockdriver.c
+++ b/fs/driver/fs_closeblockdriver.c
@@ -72,7 +72,7 @@ int close_blockdriver(FAR struct inode *inode)
 
   /* Sanity checks */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!inode || !inode->u.i_bops)
     {
       ret = -EINVAL;
@@ -84,7 +84,7 @@ int close_blockdriver(FAR struct inode *inode)
 
   if (!INODE_IS_BLOCK(inode))
     {
-      fdbg("inode is not a block driver\n");
+      ferr("ERROR: inode is not a block driver\n");
       ret = -ENOTBLK;
       goto errout;
    }
diff --git a/fs/driver/fs_findblockdriver.c b/fs/driver/fs_findblockdriver.c
index 86b2c65a1582dceb38f20eb4e018da09a9e66105..0615a474b233af2d6106f21c649d743ce4575bed 100644
--- a/fs/driver/fs_findblockdriver.c
+++ b/fs/driver/fs_findblockdriver.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/driver/fs_openblockdriver.c
  *
- *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in pathname and binary forms, with or without
@@ -41,8 +41,10 @@
 
 #include 
 #include 
-#include 
+#include 
+#include 
 #include 
+#include 
 
 #include 
 
@@ -78,34 +80,41 @@
 
 int find_blockdriver(FAR const char *pathname, int mountflags, FAR struct inode **ppinode)
 {
+  struct inode_search_s desc;
   FAR struct inode *inode;
   int ret = 0; /* Assume success */
 
   /* Sanity checks */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!pathname || !ppinode)
     {
-      ret = -EINVAL;
-      goto errout;
+      return -EINVAL;
     }
 #endif
 
   /* Find the inode registered with this pathname */
 
-  inode = inode_find(pathname, NULL);
-  if (!inode)
+  SETUP_SEARCH(&desc, pathname, false);
+
+  ret = inode_find(&desc);
+  if (ret < 0)
     {
-      fdbg("Failed to find %s\n", pathname);
+      ferr("ERROR: Failed to find %s\n", pathname);
       ret = -ENOENT;
-      goto errout;
+      goto errout_with_search;
     }
 
+  /* Get the search results */
+
+  inode = desc.node;
+  DEBUGASSERT(inode != NULL);
+
   /* Verify that the inode is a block driver. */
 
   if (!INODE_IS_BLOCK(inode))
     {
-      fdbg("%s is not a block driver\n", pathname);
+      ferr("ERROR: %s is not a block driver\n", pathname);
       ret = -ENOTBLK;
       goto errout_with_inode;
     }
@@ -115,16 +124,18 @@ int find_blockdriver(FAR const char *pathname, int mountflags, FAR struct inode
   if (!inode->u.i_bops || !inode->u.i_bops->read ||
       (!inode->u.i_bops->write && (mountflags & MS_RDONLY) == 0))
     {
-      fdbg("%s does not support requested access\n", pathname);
+      ferr("ERROR: %s does not support requested access\n", pathname);
       ret = -EACCES;
       goto errout_with_inode;
     }
 
   *ppinode = inode;
+  RELEASE_SEARCH(&desc);
   return OK;
 
 errout_with_inode:
   inode_release(inode);
-errout:
+errout_with_search:
+  RELEASE_SEARCH(&desc);
   return ret;
 }
diff --git a/fs/driver/fs_openblockdriver.c b/fs/driver/fs_openblockdriver.c
index 28527515759d6fdbf767c8cbc0ad35aa547ccd4b..9a42020bf787bbcfd0ecf03140e7dd6c27f9efa1 100644
--- a/fs/driver/fs_openblockdriver.c
+++ b/fs/driver/fs_openblockdriver.c
@@ -81,7 +81,7 @@ int open_blockdriver(FAR const char *pathname, int mountflags,
 
   /* Minimal sanity checks */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!ppinode)
     {
       ret = -EINVAL;
@@ -96,7 +96,7 @@ int open_blockdriver(FAR const char *pathname, int mountflags,
   ret = find_blockdriver(pathname, mountflags, &inode);
   if (ret < 0)
     {
-      fdbg("Failed to file %s block driver\n", pathname);
+      ferr("ERROR: Failed to file %s block driver\n", pathname);
       goto errout;
     }
 
@@ -110,7 +110,7 @@ int open_blockdriver(FAR const char *pathname, int mountflags,
       ret = inode->u.i_bops->open(inode);
       if (ret < 0)
         {
-          fdbg("%s driver open failed\n", pathname);
+          ferr("ERROR: %s driver open failed\n", pathname);
           goto errout_with_inode;
         }
     }
diff --git a/fs/fat/fs_configfat.c b/fs/fat/fs_configfat.c
index 8fe7c576f2a85183e7eddb16a0e8df55e3fabfd4..11fc358e2ee5b5b5d1a1f2e0fee4d851361f15c2 100644
--- a/fs/fat/fs_configfat.c
+++ b/fs/fat/fs_configfat.c
@@ -464,7 +464,7 @@ mkfatfs_tryfat12(FAR struct fat_format_s *fmt, FAR struct fat_var_s *var,
           maxnclusters = FAT_MAXCLUST12;
         }
 
-      fvdbg("nfatsects=%u nclusters=%u (max=%u)\n",
+      finfo("nfatsects=%u nclusters=%u (max=%u)\n",
             config->fc_nfatsects, config->fc_nclusters, maxnclusters);
 
       /* Check if this number of clusters would overflow the maximum for
@@ -473,7 +473,7 @@ mkfatfs_tryfat12(FAR struct fat_format_s *fmt, FAR struct fat_var_s *var,
 
       if (config->fc_nclusters + 2 > maxnclusters)
         {
-          fdbg("Too many clusters for FAT12: %d > %d\n",
+          ferr("ERROR: Too many clusters for FAT12: %d > %d\n",
                config->fc_nclusters, maxnclusters - 2);
 
           return -ENFILE;
@@ -535,7 +535,7 @@ mkfatfs_tryfat16(FAR struct fat_format_s *fmt, FAR struct fat_var_s *var,
           maxnclusters = FAT_MAXCLUST16;
         }
 
-      fvdbg("nfatsects=%u nclusters=%u (min=%u max=%u)\n",
+      finfo("nfatsects=%u nclusters=%u (min=%u max=%u)\n",
             config->fc_nfatsects, config->fc_nclusters, FAT_MINCLUST16,
             maxnclusters);
 
@@ -550,7 +550,7 @@ mkfatfs_tryfat16(FAR struct fat_format_s *fmt, FAR struct fat_var_s *var,
       if ((config->fc_nclusters + 2 > maxnclusters) ||
           (config->fc_nclusters < FAT_MINCLUST16))
         {
-          fdbg("Too few or too many clusters for FAT16: %d < %d < %d\n",
+          ferr("ERROR: Too few or too many clusters for FAT16: %d < %d < %d\n",
                FAT_MINCLUST16, config->fc_nclusters, maxnclusters - 2);
 
           return -ENFILE;
@@ -612,7 +612,7 @@ mkfatfs_tryfat32(FAR struct fat_format_s *fmt, FAR struct fat_var_s *var,
           maxnclusters = FAT_MAXCLUST32;
         }
 
-      fvdbg("nfatsects=%u nclusters=%u (max=%u)\n",
+      finfo("nfatsects=%u nclusters=%u (max=%u)\n",
             config->fc_nfatsects, config->fc_nclusters, maxnclusters);
 
       /* Check if this number of clusters would overflow the maximum for
@@ -622,7 +622,7 @@ mkfatfs_tryfat32(FAR struct fat_format_s *fmt, FAR struct fat_var_s *var,
       if ((config->fc_nclusters + 3 > maxnclusters) ||
           (config->fc_nclusters < FAT_MINCLUST32))
         {
-          fdbg("Too few or too many clusters for FAT32: %d < %d < %d\n",
+          ferr("ERROR: Too few or too many clusters for FAT32: %d < %d < %d\n",
                FAT_MINCLUST32, config->fc_nclusters, maxnclusters - 3);
 
           return -ENFILE;
@@ -654,7 +654,7 @@ mkfatfs_selectfat(int fattype, FAR struct fat_format_s *fmt,
 {
   /* Return the appropriate information about the selected file system. */
 
-  fvdbg("Selected FAT%d\n", fattype);
+  finfo("Selected FAT%d\n", fattype);
 
   var->fv_fattype      = fattype;
   var->fv_nclusters    = config->fc_nclusters;
@@ -696,7 +696,7 @@ mkfatfs_clustersearch(FAR struct fat_format_s *fmt, FAR struct fat_var_s *var)
 
       if (fmt->ff_rsvdseccount < 2)
         {
-          fdbg("At least 2 reserved sectors needed by FAT32\n");
+          ferr("ERROR: At least 2 reserved sectors needed by FAT32\n");
           fatconfig32.fc_rsvdseccount = 2;
         }
       else
@@ -745,7 +745,7 @@ mkfatfs_clustersearch(FAR struct fat_format_s *fmt, FAR struct fat_var_s *var)
 
   do
     {
-      fvdbg("Configuring with %d sectors/cluster...\n",
+      finfo("Configuring with %d sectors/cluster...\n",
             1 << fmt->ff_clustshift);
 
       /* Check if FAT12 has not been excluded */
@@ -756,7 +756,7 @@ mkfatfs_clustersearch(FAR struct fat_format_s *fmt, FAR struct fat_var_s *var)
 
           if (mkfatfs_tryfat12(fmt, var, &fatconfig12) != 0)
             {
-              fdbg("Cannot format FAT12 at %u sectors/cluster\n",
+              ferr("ERROR: Cannot format FAT12 at %u sectors/cluster\n",
                    1 << fmt->ff_clustshift);
 
               fatconfig12.fc_nfatsects = 0;
@@ -772,7 +772,7 @@ mkfatfs_clustersearch(FAR struct fat_format_s *fmt, FAR struct fat_var_s *var)
 
           if (mkfatfs_tryfat16(fmt, var, &fatconfig16) != 0)
             {
-              fdbg("Cannot format FAT16 at %u sectors/cluster\n",
+              ferr("ERROR: Cannot format FAT16 at %u sectors/cluster\n",
                    1 << fmt->ff_clustshift);
 
               fatconfig16.fc_nfatsects = 0;
@@ -828,7 +828,7 @@ mkfatfs_clustersearch(FAR struct fat_format_s *fmt, FAR struct fat_var_s *var)
 
           if (mkfatfs_tryfat32(fmt, var, &fatconfig32) != 0)
             {
-              fdbg("Cannot format FAT32 at %u sectors/cluster\n",
+              ferr("ERROR: Cannot format FAT32 at %u sectors/cluster\n",
                    1 << fmt->ff_clustshift);
 
               fatconfig32.fc_nfatsects = 0;
@@ -897,7 +897,7 @@ int mkfatfs_configfatfs(FAR struct fat_format_s *fmt,
   ret = mkfatfs_clustersearch(fmt, var);
   if (ret < 0)
     {
-       fdbg("ERROR: Failed to set cluster size\n");
+       ferr("ERROR: Failed to set cluster size\n");
        return ret;
     }
 
@@ -940,7 +940,7 @@ int mkfatfs_configfatfs(FAR struct fat_format_s *fmt,
 
       if (fmt->ff_backupboot <= 1 || fmt->ff_backupboot >= fmt->ff_rsvdseccount)
         {
-          fdbg("Invalid backup boot sector: %d\n", fmt->ff_backupboot);
+          ferr("ERROR: Invalid backup boot sector: %d\n", fmt->ff_backupboot);
           fmt->ff_backupboot = 0;
         }
 
@@ -973,22 +973,22 @@ int mkfatfs_configfatfs(FAR struct fat_format_s *fmt,
 
   /* Describe the configured filesystem */
 
-#ifdef CONFIG_DEBUG
-  fdbg("Sector size:          %d bytes\n",    var->fv_sectorsize);
-  fdbg("Number of sectors:    %d sectors\n",  fmt->ff_nsectors);
-  fdbg("FAT size:             %d bits\n",     var->fv_fattype);
-  fdbg("Number FATs:          %d\n",          fmt->ff_nfats);
-  fdbg("Sectors per cluster:  %d sectors\n",  1 << fmt->ff_clustshift);
-  fdbg("FS size:              %d sectors\n",  var->fv_nfatsects);
-  fdbg("                      %d clusters\n", var->fv_nclusters);
+#ifdef CONFIG_DEBUG_FEATURES
+  finfo("Sector size:          %d bytes\n",    var->fv_sectorsize);
+  finfo("Number of sectors:    %d sectors\n",  fmt->ff_nsectors);
+  finfo("FAT size:             %d bits\n",     var->fv_fattype);
+  finfo("Number FATs:          %d\n",          fmt->ff_nfats);
+  finfo("Sectors per cluster:  %d sectors\n",  1 << fmt->ff_clustshift);
+  finfo("FS size:              %d sectors\n",  var->fv_nfatsects);
+  finfo("                      %d clusters\n", var->fv_nclusters);
 
   if (var->fv_fattype != 32)
     {
-       fdbg("Root directory slots: %d\n", fmt->ff_rootdirentries);
+       finfo("Root directory slots: %d\n", fmt->ff_rootdirentries);
     }
 
-  fdbg("Volume ID:            %08x\n", fmt->ff_volumeid);
-  fdbg("Volume Label:         \"%c%c%c%c%c%c%c%c%c%c%c\"\n",
+  finfo("Volume ID:            %08x\n", fmt->ff_volumeid);
+  finfo("Volume Label:         \"%c%c%c%c%c%c%c%c%c%c%c\"\n",
     fmt->ff_volumelabel[0], fmt->ff_volumelabel[1], fmt->ff_volumelabel[2],
     fmt->ff_volumelabel[3], fmt->ff_volumelabel[4], fmt->ff_volumelabel[5],
     fmt->ff_volumelabel[6], fmt->ff_volumelabel[7], fmt->ff_volumelabel[8],
diff --git a/fs/fat/fs_fat32.c b/fs/fat/fs_fat32.c
index c9cf80be6e992f06696da2963d6ff68e5ec49b45..78df1f1024dae35b5e00224eb735569aad8179c2 100644
--- a/fs/fat/fs_fat32.c
+++ b/fs/fat/fs_fat32.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/fat/fs_fat32.c
  *
- *   Copyright (C) 2007-2009, 2011-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * References:
@@ -84,6 +84,8 @@ static int     fat_ioctl(FAR struct file *filep, int cmd,
 
 static int     fat_sync(FAR struct file *filep);
 static int     fat_dup(FAR const struct file *oldp, FAR struct file *newp);
+static int     fat_fstat(FAR const struct file *filep,
+                 FAR struct stat *buf);
 
 static int     fat_opendir(FAR struct inode *mountpt,
                  FAR const char *relpath, FAR struct fs_dirent_s *dir);
@@ -106,6 +108,12 @@ static int     fat_mkdir(FAR struct inode *mountpt, FAR const char *relpath,
 static int     fat_rmdir(FAR struct inode *mountpt, FAR const char *relpath);
 static int     fat_rename(FAR struct inode *mountpt,
                  FAR const char *oldrelpath, FAR const char *newrelpath);
+static int     fat_stat_common(FAR struct fat_mountpt_s *fs,
+                 FAR uint8_t *direntry, FAR struct stat *buf);
+static int     fat_stat_file(FAR struct fat_mountpt_s *fs,
+                 FAR uint8_t *direntry, FAR struct stat *buf);
+static int     fat_stat_root(FAR struct fat_mountpt_s *fs,
+                 FAR uint8_t *direntry, FAR struct stat *buf);
 static int     fat_stat(struct inode *mountpt, const char *relpath,
                  FAR struct stat *buf);
 
@@ -129,6 +137,7 @@ const struct mountpt_operations fat_operations =
 
   fat_sync,          /* sync */
   fat_dup,           /* dup */
+  fat_fstat,         /* fstat */
 
   fat_opendir,       /* opendir */
   NULL,              /* closedir */
@@ -624,7 +633,7 @@ fat_read_restart:
 
               if (ret == -EFAULT && !force_indirect)
                 {
-                  fdbg("DMA: read alignment error, restarting indirect\n");
+                  ferr("ERROR: DMA read alignment error, restarting indirect\n");
                   force_indirect = true;
                   goto fat_read_restart;
                 }
@@ -884,7 +893,7 @@ fat_write_restart:
 
               if (ret == -EFAULT && !force_indirect)
                 {
-                  fdbg("DMA: write alignment error, restarting indirect\n");
+                  ferr("ERROR: DMA write alignment error, restarting indirect\n");
                   force_indirect = true;
                   goto fat_write_restart;
                 }
@@ -1054,6 +1063,18 @@ static off_t fat_seek(FAR struct file *filep, off_t offset, int whence)
           return -EINVAL;
     }
 
+  /* Special case:  We are seeking to the current position.  This would
+   * happen normally with ftell() which does lseek(fd, 0, SEEK_CUR) but can
+   * also happen in other situation such as when SEEK_SET is used to assure
+   * assure sequential access in a multi-threaded environment where there
+   * may be are multiple users to the file descriptor.
+   */
+
+  if (position == filep->f_pos)
+    {
+      return OK;
+    }
+
   /* Make sure that the mount is still healthy */
 
   fat_semtake(fs);
@@ -1397,7 +1418,7 @@ static int fat_dup(FAR const struct file *oldp, FAR struct file *newp)
   FAR struct fat_file_s *newff;
   int ret;
 
-  fvdbg("Dup %p->%p\n", oldp, newp);
+  finfo("Dup %p->%p\n", oldp, newp);
 
   /* Sanity checks */
 
@@ -1594,6 +1615,76 @@ errout_with_semaphore:
   return ret;
 }
 
+/****************************************************************************
+ * Name: fat_fstat
+ *
+ * Description:
+ *   Obtain information about an open file associated with the file
+ *   descriptor 'fd', and will write it to the area pointed to by 'buf'.
+ *
+ ****************************************************************************/
+
+static int fat_fstat(FAR const struct file *filep, FAR struct stat *buf)
+{
+  FAR struct inode *inode;
+  FAR struct fat_mountpt_s *fs;
+  FAR struct fat_file_s *ff;
+  uint8_t *direntry;
+  int ret;
+
+  /* Sanity checks */
+
+  DEBUGASSERT(filep->f_priv != NULL && filep->f_inode != NULL);
+
+  /* Get the mountpoint inode reference from the file structure and the
+   * mountpoint private data from the inode structure
+   */
+
+  inode = filep->f_inode;
+  fs    = inode->i_private;
+
+  DEBUGASSERT(fs != NULL);
+
+  /* Check if the mount is still healthy */
+
+  fat_semtake(fs);
+  ret = fat_checkmount(fs);
+  if (ret != OK)
+    {
+      goto errout_with_semaphore;
+    }
+
+  /* Recover our private data from the struct file instance */
+
+  ff = filep->f_priv;
+
+  /* Update the directory entry.  First read the directory
+   * entry into the fs_buffer (preserving the ff_buffer)
+   */
+
+  ret = fat_fscacheread(fs, ff->ff_dirsector);
+  if (ret < 0)
+    {
+      goto errout_with_semaphore;
+    }
+
+  /* Recover a pointer to the specific directory entry in the sector using
+   * the saved directory index.
+   */
+
+  direntry = &fs->fs_buffer[(ff->ff_dirindex & DIRSEC_NDXMASK(fs)) * DIR_SIZE];
+
+  /* Call fat_stat_file() to create the buf and to save information to
+   * it.
+   */
+
+  ret = fat_stat_file(fs, direntry, buf);
+
+errout_with_semaphore:
+  fat_semgive(fs);
+  return ret;
+}
+
 /****************************************************************************
  * Name: fat_readdir
  *
@@ -2407,7 +2498,10 @@ int fat_rename(FAR struct inode *mountpt, FAR const char *oldrelpath,
     {
       if (ret == OK)
         {
-          /* It is an error if the object at newrelpath already exists */
+          /* It is an error if the directory entry at newrelpath already
+           * exists.  The necessary steps to avoid this case should have
+           * been handled by higher level logic in the VFS.
+           */
 
           ret = -EEXIST;
         }
@@ -2473,71 +2567,73 @@ errout_with_semaphore:
 }
 
 /****************************************************************************
- * Name: fat_stat
+ * Name: fat_stat_common
  *
- * Description: Return information about a file or directory
+ * Description:
+ *   Common logic used by fat_stat_file() and fat_fstat_root().
  *
  ****************************************************************************/
 
-static int fat_stat(FAR struct inode *mountpt, FAR const char *relpath,
-                    FAR struct stat *buf)
+static int fat_stat_common(FAR struct fat_mountpt_s *fs,
+                           FAR uint8_t *direntry, FAR struct stat *buf)
 {
-  FAR struct fat_mountpt_s *fs;
-  struct fat_dirinfo_s dirinfo;
   uint16_t fatdate;
   uint16_t date2;
   uint16_t fattime;
-  FAR uint8_t *direntry;
-  uint8_t attribute;
-  int ret;
 
-  /* Sanity checks */
+  /* Times */
 
-  DEBUGASSERT(mountpt && mountpt->i_private);
+  fatdate           = DIR_GETWRTDATE(direntry);
+  fattime           = DIR_GETWRTTIME(direntry);
+  buf->st_mtime     = fat_fattime2systime(fattime, fatdate);
 
-  /* Get the mountpoint private data from the inode structure */
+  date2             = DIR_GETLASTACCDATE(direntry);
+  if (fatdate == date2)
+    {
+      buf->st_atime = buf->st_mtime;
+    }
+  else
+    {
+      buf->st_atime = fat_fattime2systime(0, date2);
+    }
 
-  fs = mountpt->i_private;
+  fatdate           = DIR_GETCRDATE(direntry);
+  fattime           = DIR_GETCRTIME(direntry);
+  buf->st_ctime     = fat_fattime2systime(fattime, fatdate);
 
-  /* Check if the mount is still healthy */
+  /* File/directory size, access block size */
 
-  fat_semtake(fs);
-  ret = fat_checkmount(fs);
-  if (ret != OK)
-    {
-      goto errout_with_semaphore;
-    }
+  buf->st_size      = DIR_GETFILESIZE(direntry);
+  buf->st_blksize   = fs->fs_fatsecperclus * fs->fs_hwsectorsize;
+  buf->st_blocks    = (buf->st_size + buf->st_blksize - 1) / buf->st_blksize;
 
-  /* Find the directory entry corresponding to relpath. */
+  return OK;
+}
 
-  ret = fat_finddirentry(fs, &dirinfo, relpath);
+/****************************************************************************
+ * Name: fat_stat_file
+ *
+ * Description:
+ *   Function to return the status associated with a file in the FAT file
+ *   system.  Used by fat_stat() and fat_fstat().
+ *
+ ****************************************************************************/
 
-  /* If nothing was found, then we fail with the reported error */
+static int fat_stat_file(FAR struct fat_mountpt_s *fs,
+                         FAR uint8_t *direntry, FAR struct stat *buf)
+{
+  uint8_t  attribute;
 
-  if (ret < 0)
-    {
-      goto errout_with_semaphore;
-    }
+  /* Initialize the "struct stat" */
 
   memset(buf, 0, sizeof(struct stat));
-  if (dirinfo.fd_root)
-    {
-      /* It's directory name of the mount point */
-
-      buf->st_mode = S_IFDIR | S_IROTH | S_IRGRP | S_IRUSR | S_IWOTH |
-                     S_IWGRP | S_IWUSR;
-      ret = OK;
-      goto errout_with_semaphore;
-    }
 
-  /* Get the FAT attribute and map it so some meaningful mode_t values */
+  /* Get attribute from direntry */
 
-  direntry  = &fs->fs_buffer[dirinfo.fd_seq.ds_offset];
   attribute = DIR_GETATTRIBUTES(direntry);
   if ((attribute & FATATTR_VOLUMEID) != 0)
     {
-      ret = -ENOENT;
-      goto errout_with_semaphore;
+      return -ENOENT;
     }
 
   /* Set the access permissions.  The file/directory is always readable
@@ -2561,33 +2657,93 @@ static int fat_stat(FAR struct inode *mountpt, FAR const char *relpath,
       buf->st_mode |= S_IFREG;
     }
 
-  /* File/directory size, access block size */
+  return fat_stat_common(fs, direntry, buf);
+}
 
-  buf->st_size      = DIR_GETFILESIZE(direntry);
-  buf->st_blksize   = fs->fs_fatsecperclus * fs->fs_hwsectorsize;
-  buf->st_blocks    = (buf->st_size + buf->st_blksize - 1) / buf->st_blksize;
+/****************************************************************************
+ * Name: fat_stat_root
+ *
+ * Description:
+ *   Logic to stat the root directory.  Used by fat_stat().
+ *
+ ****************************************************************************/
 
-  /* Times */
+static int fat_stat_root(FAR struct fat_mountpt_s *fs,
+                         FAR uint8_t *direntry, FAR struct stat *buf)
+{
+  /* Clear the "struct stat"  */
 
-  fatdate           = DIR_GETWRTDATE(direntry);
-  fattime           = DIR_GETWRTTIME(direntry);
-  buf->st_mtime     = fat_fattime2systime(fattime, fatdate);
+  memset(buf, 0, sizeof(struct stat));
 
-  date2             = DIR_GETLASTACCDATE(direntry);
-  if (fatdate == date2)
+  /* It's directory name of the mount point */
+
+  buf->st_mode = S_IFDIR | S_IROTH | S_IRGRP | S_IRUSR | S_IWOTH |
+                 S_IWGRP | S_IWUSR;
+
+  return fat_stat_common(fs, direntry, buf);
+}
+
+/****************************************************************************
+ * Name: fat_stat
+ *
+ * Description: Return information about a file or directory
+ *
+ ****************************************************************************/
+
+static int fat_stat(FAR struct inode *mountpt, FAR const char *relpath,
+                    FAR struct stat *buf)
+{
+  FAR struct fat_mountpt_s *fs;
+  struct fat_dirinfo_s dirinfo;
+  FAR uint8_t *direntry;
+  int ret;
+
+  /* Sanity checks */
+
+  DEBUGASSERT(mountpt && mountpt->i_private);
+
+  /* Get the mountpoint private data from the inode structure */
+
+  fs = mountpt->i_private;
+
+  /* Check if the mount is still healthy */
+
+  fat_semtake(fs);
+  ret = fat_checkmount(fs);
+  if (ret != OK)
     {
-      buf->st_atime = buf->st_mtime;
+      goto errout_with_semaphore;
     }
-  else
+
+  /* Find the directory entry corresponding to relpath. */
+
+  ret = fat_finddirentry(fs, &dirinfo, relpath);
+
+  /* If nothing was found, then we fail with the reported error */
+
+  if (ret < 0)
     {
-      buf->st_atime = fat_fattime2systime(0, date2);
+      goto errout_with_semaphore;
     }
 
-  fatdate           = DIR_GETCRDATE(direntry);
-  fattime           = DIR_GETCRTIME(direntry);
-  buf->st_ctime     = fat_fattime2systime(fattime, fatdate);
+  /* Get a pointer to the directory entry */
 
-  ret = OK;
+  direntry = &fs->fs_buffer[dirinfo.fd_seq.ds_offset];
+
+  /* Get the FAT attribute and map it so some meaningful mode_t values */
+
+  if (dirinfo.fd_root)
+    {
+      ret = fat_stat_root(fs, direntry, buf);
+    }
+  else
+    {
+      /* Call fat_stat_file() to create the buf and to save information to
+       * the stat buffer.
+       */
+
+      ret = fat_stat_file(fs, direntry, buf);
+    }
 
 errout_with_semaphore:
   fat_semgive(fs);
diff --git a/fs/fat/fs_fat32attrib.c b/fs/fat/fs_fat32attrib.c
index ef9b90b474584a7f133fa0cb4fa642bd9179aec4..0dd9b60a2edecdf8602ad896bab19fdfe809df13 100644
--- a/fs/fat/fs_fat32attrib.c
+++ b/fs/fat/fs_fat32attrib.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/fat/fs_fat32attrib.c
  *
- *   Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 #include 
 
 #include 
@@ -60,25 +61,33 @@ static int fat_attrib(const char *path, fat_attrib_t *retattrib,
                       fat_attrib_t setbits, fat_attrib_t clearbits)
 {
   struct fat_mountpt_s *fs;
-  struct fat_dirinfo_s  dirinfo;
-  FAR struct inode     *inode;
-  const char           *relpath = NULL;
-  uint8_t              *direntry;
-  uint8_t               oldattributes;
-  uint8_t               newattributes;
-  int                   ret;
-
-  /* Get an inode for this file */
-
-  inode = inode_find(path, &relpath);
-  if (!inode)
+  struct fat_dirinfo_s dirinfo;
+  struct inode_search_s desc;
+  FAR struct inode *inode;
+  uint8_t *direntry;
+  uint8_t oldattributes;
+  uint8_t newattributes;
+  int status;
+  int ret;
+
+  /* Find the inode for this file */
+
+  SETUP_SEARCH(&desc, path, false);
+
+  status = inode_find(&desc);
+  if (status < 0)
     {
       /* There is no mountpoint that includes in this path */
 
-      ret = ENOENT;
+      ret = -status;
       goto errout;
     }
 
+  /* Get the search results */
+
+  inode = desc.node;
+  DEBUGASSERT(inode != NULL);
+
   /* Verify that the inode is a valid mountpoint. */
 
   if (!INODE_IS_MOUNTPT(inode) || !inode->u.i_mops || !inode->i_private)
@@ -100,9 +109,9 @@ static int fat_attrib(const char *path, fat_attrib_t *retattrib,
       goto errout_with_semaphore;
     }
 
-  /* Find the file/directory entry for the oldrelpath */
+  /* Find the file/directory entry for the relpath */
 
-  ret = fat_finddirentry(fs, &dirinfo, relpath);
+  ret = fat_finddirentry(fs, &dirinfo, desc.relpath);
   if (ret != OK)
     {
       /* Some error occurred -- probably -ENOENT */
@@ -156,14 +165,18 @@ static int fat_attrib(const char *path, fat_attrib_t *retattrib,
 
   fat_semgive(fs);
   inode_release(inode);
+  RELEASE_SEARCH(&desc);
   return OK;
 
 errout_with_semaphore:
   fat_semgive(fs);
+
 errout_with_inode:
   inode_release(inode);
+
 errout:
-  *get_errno_ptr() = ret;
+  RELEASE_SEARCH(&desc);
+  set_errno(ret);
   return ERROR;
 }
 
diff --git a/fs/fat/fs_fat32util.c b/fs/fat/fs_fat32util.c
index 84f3b8eae7154cf9332d998cfcc8ec99b4cd2df0..a4ec2732cbc7810a995abc16762331ef416fc74a 100644
--- a/fs/fat/fs_fat32util.c
+++ b/fs/fat/fs_fat32util.c
@@ -121,7 +121,7 @@ static int fat_checkbootrecord(struct fat_mountpt_s *fs)
   if (MBR_GETSIGNATURE(fs->fs_buffer) != BOOT_SIGNATURE16 ||
       MBR_GETBYTESPERSEC(fs->fs_buffer) != fs->fs_hwsectorsize)
     {
-      fdbg("ERROR: Signature: %04x FS sectorsize: %d HW sectorsize: %d\n",
+      ferr("ERROR: Signature: %04x FS sectorsize: %d HW sectorsize: %d\n",
             MBR_GETSIGNATURE(fs->fs_buffer), MBR_GETBYTESPERSEC(fs->fs_buffer),
             fs->fs_hwsectorsize);
 
@@ -159,7 +159,7 @@ static int fat_checkbootrecord(struct fat_mountpt_s *fs)
 
   if (!fs->fs_nfatsects || fs->fs_nfatsects >= fs->fs_hwnsectors)
     {
-      fdbg("ERROR: fs_nfatsects %d fs_hwnsectors: %d\n",
+      ferr("ERROR: fs_nfatsects %d fs_hwnsectors: %d\n",
            fs->fs_nfatsects, fs->fs_hwnsectors);
 
       return -EINVAL;
@@ -179,7 +179,7 @@ static int fat_checkbootrecord(struct fat_mountpt_s *fs)
 
   if (!fs->fs_fattotsec || fs->fs_fattotsec > fs->fs_hwnsectors)
     {
-      fdbg("ERROR: fs_fattotsec %d fs_hwnsectors: %d\n",
+      ferr("ERROR: fs_fattotsec %d fs_hwnsectors: %d\n",
            fs->fs_fattotsec, fs->fs_hwnsectors);
 
       return -EINVAL;
@@ -190,7 +190,7 @@ static int fat_checkbootrecord(struct fat_mountpt_s *fs)
   fs->fs_fatresvdseccount = MBR_GETRESVDSECCOUNT(fs->fs_buffer);
   if (fs->fs_fatresvdseccount > fs->fs_hwnsectors)
     {
-      fdbg("ERROR: fs_fatresvdseccount %d fs_hwnsectors: %d\n",
+      ferr("ERROR: fs_fatresvdseccount %d fs_hwnsectors: %d\n",
            fs->fs_fatresvdseccount, fs->fs_hwnsectors);
 
       return -EINVAL;
@@ -206,7 +206,7 @@ static int fat_checkbootrecord(struct fat_mountpt_s *fs)
   ndatasectors = fs->fs_fattotsec - fs->fs_fatresvdseccount - ntotalfatsects - rootdirsectors;
   if (ndatasectors > fs->fs_hwnsectors)
     {
-      fdbg("ERROR: ndatasectors %d fs_hwnsectors: %d\n",
+      ferr("ERROR: ndatasectors %d fs_hwnsectors: %d\n",
            ndatasectors, fs->fs_hwnsectors);
 
       return -EINVAL;
@@ -239,7 +239,7 @@ static int fat_checkbootrecord(struct fat_mountpt_s *fs)
     }
   else
     {
-      fdbg("ERROR: notfat32: %d fs_nclusters: %d\n",
+      ferr("ERROR: notfat32: %d fs_nclusters: %d\n",
            notfat32, fs->fs_nclusters);
 
       return -EINVAL;
@@ -573,11 +573,11 @@ int fat_mount(struct fat_mountpt_s *fs, bool writeable)
            */
 
           uint8_t part = PART_GETTYPE(i, fs->fs_buffer);
-          fvdbg("Partition %d, offset %d, type %d\n", i, PART_ENTRY(i), part);
+          finfo("Partition %d, offset %d, type %d\n", i, PART_ENTRY(i), part);
 
           if (part == 0)
             {
-              fvdbg("No partition %d\n", i);
+              finfo("No partition %d\n", i);
               continue;
             }
 
@@ -594,7 +594,7 @@ int fat_mount(struct fat_mountpt_s *fs, bool writeable)
             {
               /* Failed to read the sector */
 
-              fdbg("ERROR: Failed to read sector %ld: %d\n",
+              ferr("ERROR: Failed to read sector %ld: %d\n",
                    (long)fs->fs_fatbase, ret);
               continue;
             }
@@ -606,24 +606,24 @@ int fat_mount(struct fat_mountpt_s *fs, bool writeable)
             {
               /* Break out of the loop if a valid boot record is found */
 
-              fvdbg("MBR found in partition %d\n", i);
+              finfo("MBR found in partition %d\n", i);
               break;
             }
 
           /* Re-read sector 0 so that we can check the next partition */
 
-          fvdbg("Partition %d is not an MBR\n", i);
+          finfo("Partition %d is not an MBR\n", i);
           ret = fat_hwread(fs, fs->fs_buffer, 0, 1);
           if (ret < 0)
             {
-              fdbg("ERROR: Failed to re-read sector 0: %d\n", ret);
+              ferr("ERROR: Failed to re-read sector 0: %d\n", ret);
               goto errout_with_buffer;
             }
         }
 
       if (i > 3)
         {
-          fdbg("No valid MBR\n");
+          ferr("ERROR: No valid MBR\n");
           ret = -EINVAL;
           goto errout_with_buffer;
         }
@@ -644,22 +644,22 @@ int fat_mount(struct fat_mountpt_s *fs, bool writeable)
 
   /* We did it! */
 
-  fdbg("FAT%d:\n", fs->fs_type == 0 ? 12 : fs->fs_type == 1  ? 16 : 32);
-  fdbg("\tHW  sector size:     %d\n", fs->fs_hwsectorsize);
-  fdbg("\t    sectors:         %d\n", fs->fs_hwnsectors);
-  fdbg("\tFAT reserved:        %d\n", fs->fs_fatresvdseccount);
-  fdbg("\t    sectors:         %d\n", fs->fs_fattotsec);
-  fdbg("\t    start sector:    %d\n", fs->fs_fatbase);
-  fdbg("\t    root sector:     %d\n", fs->fs_rootbase);
-  fdbg("\t    root entries:    %d\n", fs->fs_rootentcnt);
-  fdbg("\t    data sector:     %d\n", fs->fs_database);
-  fdbg("\t    FSINFO sector:   %d\n", fs->fs_fsinfo);
-  fdbg("\t    Num FATs:        %d\n", fs->fs_fatnumfats);
-  fdbg("\t    FAT sectors:     %d\n", fs->fs_nfatsects);
-  fdbg("\t    sectors/cluster: %d\n", fs->fs_fatsecperclus);
-  fdbg("\t    max clusters:    %d\n", fs->fs_nclusters);
-  fdbg("\tFSI free count       %d\n", fs->fs_fsifreecount);
-  fdbg("\t    next free        %d\n", fs->fs_fsinextfree);
+  finfo("FAT%d:\n", fs->fs_type == 0 ? 12 : fs->fs_type == 1  ? 16 : 32);
+  finfo("\tHW  sector size:     %d\n", fs->fs_hwsectorsize);
+  finfo("\t    sectors:         %d\n", fs->fs_hwnsectors);
+  finfo("\tFAT reserved:        %d\n", fs->fs_fatresvdseccount);
+  finfo("\t    sectors:         %d\n", fs->fs_fattotsec);
+  finfo("\t    start sector:    %d\n", fs->fs_fatbase);
+  finfo("\t    root sector:     %d\n", fs->fs_rootbase);
+  finfo("\t    root entries:    %d\n", fs->fs_rootentcnt);
+  finfo("\t    data sector:     %d\n", fs->fs_database);
+  finfo("\t    FSINFO sector:   %d\n", fs->fs_fsinfo);
+  finfo("\t    Num FATs:        %d\n", fs->fs_fatnumfats);
+  finfo("\t    FAT sectors:     %d\n", fs->fs_nfatsects);
+  finfo("\t    sectors/cluster: %d\n", fs->fs_fatsecperclus);
+  finfo("\t    max clusters:    %d\n", fs->fs_nclusters);
+  finfo("\tFSI free count       %d\n", fs->fs_fsifreecount);
+  finfo("\t    next free        %d\n", fs->fs_fsinextfree);
 
   return OK;
 
@@ -1875,7 +1875,7 @@ int fat_currentsector(struct fat_mountpt_s *fs, struct fat_file_s *ff,
 
       ff->ff_sectorsincluster = fs->fs_fatsecperclus - sectoroffset;
 
-      fvdbg("position=%d currentsector=%d sectorsincluster=%d\n",
+      finfo("position=%d currentsector=%d sectorsincluster=%d\n",
             position, ff->ff_currentsector, ff->ff_sectorsincluster);
 
       return OK;
diff --git a/fs/fat/fs_mkfatfs.c b/fs/fat/fs_mkfatfs.c
index a1f17d737455d87cfabdc39c70da2472f8c27e71..75269a602ba6b943ec265fda45afd6e4b5f904c6 100644
--- a/fs/fat/fs_mkfatfs.c
+++ b/fs/fat/fs_mkfatfs.c
@@ -86,13 +86,13 @@ static inline int mkfatfs_getgeometry(FAR struct fat_format_s *fmt,
   ret = DEV_GEOMETRY(geometry);
   if (ret < 0)
     {
-      fdbg("ERROR: geometry() returned %d\n", ret);
+      ferr("ERROR: geometry() returned %d\n", ret);
       return ret;
     }
 
   if (!geometry.geo_available || !geometry.geo_writeenabled)
     {
-      fdbg("ERROR: Media is not available\n", ret);
+      ferr("ERROR: Media is not available\n", ret);
       return -ENODEV;
     }
 
@@ -104,7 +104,7 @@ static inline int mkfatfs_getgeometry(FAR struct fat_format_s *fmt,
     {
       if (fmt->ff_nsectors > geometry.geo_nsectors)
         {
-          fdbg("ERROR: User maxblocks (%d) exceeds blocks on device (%d)\n",
+          ferr("ERROR: User maxblocks (%d) exceeds blocks on device (%d)\n",
                fmt->ff_nsectors, geometry.geo_nsectors);
 
           return -EINVAL;
@@ -139,7 +139,7 @@ static inline int mkfatfs_getgeometry(FAR struct fat_format_s *fmt,
         break;
 
       default:
-        fdbg("ERROR: Unsupported sector size: %d\n", var->fv_sectorsize);
+        ferr("ERROR: Unsupported sector size: %d\n", var->fv_sectorsize);
         return -EPERM;
     }
 
@@ -193,17 +193,17 @@ int mkfatfs(FAR const char *pathname, FAR struct fat_format_s *fmt)
 
   /* Verify format options (only when DEBUG enabled) */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!pathname)
     {
-      fdbg("ERROR: No block driver path\n");
+      ferr("ERROR: No block driver path\n");
       ret = -EINVAL;
       goto errout;
     }
 
   if (fmt->ff_nfats < 1 || fmt->ff_nfats > 4)
     {
-      fdbg("ERROR: Invalid number of fats: %d\n", fmt->ff_nfats);
+      ferr("ERROR: Invalid number of fats: %d\n", fmt->ff_nfats);
       ret = -EINVAL;
       goto errout;
     }
@@ -211,7 +211,7 @@ int mkfatfs(FAR const char *pathname, FAR struct fat_format_s *fmt)
   if (fmt->ff_fattype != 0  && fmt->ff_fattype != 12 &&
       fmt->ff_fattype != 16 && fmt->ff_fattype != 32)
     {
-      fdbg("ERROR: Invalid FAT size: %d\n", fmt->ff_fattype);
+      ferr("ERROR: Invalid FAT size: %d\n", fmt->ff_fattype);
       ret = -EINVAL;
       goto errout;
     }
@@ -228,10 +228,10 @@ int mkfatfs(FAR const char *pathname, FAR struct fat_format_s *fmt)
    * means that we should autoselect the cluster sizel.
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (fmt->ff_clustshift > 7 && fmt->ff_clustshift != 0xff)
     {
-      fdbg("ERROR: Invalid cluster shift value: %d\n", fmt->ff_clustshift);
+      ferr("ERROR: Invalid cluster shift value: %d\n", fmt->ff_clustshift);
 
       ret = -EINVAL;
       goto errout;
@@ -240,7 +240,7 @@ int mkfatfs(FAR const char *pathname, FAR struct fat_format_s *fmt)
    if (fmt->ff_rootdirentries != 0 &&
        (fmt->ff_rootdirentries < 16 || fmt->ff_rootdirentries > 32767))
     {
-      fdbg("ERROR: Invalid number of root dir entries: %d\n",
+      ferr("ERROR: Invalid number of root dir entries: %d\n",
            fmt->ff_rootdirentries);
 
       ret = -EINVAL;
@@ -250,7 +250,7 @@ int mkfatfs(FAR const char *pathname, FAR struct fat_format_s *fmt)
    if (fmt->ff_rsvdseccount != 0 && (fmt->ff_rsvdseccount < 1 ||
        fmt->ff_rsvdseccount > 32767))
     {
-      fdbg("ERROR: Invalid number of reserved sectors: %d\n",
+      ferr("ERROR: Invalid number of reserved sectors: %d\n",
            fmt->ff_rsvdseccount);
 
       ret = -EINVAL;
@@ -263,7 +263,7 @@ int mkfatfs(FAR const char *pathname, FAR struct fat_format_s *fmt)
   ret = open_blockdriver(pathname, 0, &var.fv_inode);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to open %s\n", pathname);
+      ferr("ERROR: Failed to open %s\n", pathname);
       goto errout;
     }
 
@@ -271,7 +271,7 @@ int mkfatfs(FAR const char *pathname, FAR struct fat_format_s *fmt)
 
   if (!var.fv_inode->u.i_bops->write || !var.fv_inode->u.i_bops->geometry)
     {
-      fdbg("ERROR: %s does not support write or geometry methods\n",
+      ferr("ERROR: %s does not support write or geometry methods\n",
             pathname);
 
       ret = -EACCES;
@@ -306,7 +306,7 @@ int mkfatfs(FAR const char *pathname, FAR struct fat_format_s *fmt)
 
   if (!var.fv_sect)
     {
-      fdbg("ERROR: Failed to allocate working buffers\n");
+      ferr("ERROR: Failed to allocate working buffers\n");
       goto errout_with_driver;
     }
 
diff --git a/fs/hostfs/hostfs.c b/fs/hostfs/hostfs.c
index ee57d8295f50ab25eba73fa2e389457b02709cd9..764f7f1edb15b3b4a8d70d4e07b52d45751cb1e4 100644
--- a/fs/hostfs/hostfs.c
+++ b/fs/hostfs/hostfs.c
@@ -80,6 +80,8 @@ static int     hostfs_ioctl(FAR struct file *filep, int cmd,
 static int     hostfs_sync(FAR struct file *filep);
 static int     hostfs_dup(FAR const struct file *oldp,
                         FAR struct file *newp);
+static int     hostfs_fstat(FAR const struct file *filep,
+                        FAR struct stat *buf);
 
 static int     hostfs_opendir(FAR struct inode *mountpt,
                         FAR const char *relpath,
@@ -136,6 +138,7 @@ const struct mountpt_operations hostfs_operations =
 
   hostfs_sync,          /* sync */
   hostfs_dup,           /* dup */
+  hostfs_fstat,         /* fstat */
 
   hostfs_opendir,       /* opendir */
   hostfs_closedir,      /* closedir */
@@ -161,7 +164,7 @@ const struct mountpt_operations hostfs_operations =
  * Name: hostfs_semtake
  ****************************************************************************/
 
-void hostfs_semtake(struct hostfs_mountpt_s *fs)
+void hostfs_semtake(FAR struct hostfs_mountpt_s *fs)
 {
   /* Take the semaphore (perhaps waiting) */
 
@@ -179,7 +182,7 @@ void hostfs_semtake(struct hostfs_mountpt_s *fs)
  * Name: hostfs_semgive
  ****************************************************************************/
 
-void hostfs_semgive(struct hostfs_mountpt_s *fs)
+void hostfs_semgive(FAR struct hostfs_mountpt_s *fs)
 {
   sem_post(fs->fs_sem);
 }
@@ -191,12 +194,13 @@ void hostfs_semgive(struct hostfs_mountpt_s *fs)
  *
  ****************************************************************************/
 
-static void hostfs_mkpath(struct hostfs_mountpt_s  *fs, const char *relpath,
-                          char *path, int pathlen)
+static void hostfs_mkpath(FAR struct hostfs_mountpt_s  *fs,
+                          FAR const char *relpath,
+                          FAR char *path, int pathlen)
 {
-  int   depth = 0;
-  int   first;
-  int   x;
+  int depth = 0;
+  int first;
+  int x;
 
   /* Copy base host path to output */
 
@@ -247,14 +251,14 @@ static void hostfs_mkpath(struct hostfs_mountpt_s  *fs, const char *relpath,
  * Name: hostfs_open
  ****************************************************************************/
 
-static int hostfs_open(FAR struct file *filep, const char *relpath,
+static int hostfs_open(FAR struct file *filep, FAR const char *relpath,
                        int oflags, mode_t mode)
 {
-  struct inode             *inode;
-  struct hostfs_mountpt_s  *fs;
-  int                       ret;
-  struct hostfs_ofile_s    *hf;
-  char                      path[HOSTFS_MAX_PATH];
+  FAR struct inode *inode;
+  FAR struct hostfs_mountpt_s *fs;
+  FAR struct hostfs_ofile_s  *hf;
+  char path[HOSTFS_MAX_PATH];
+  int ret;
 
   /* Sanity checks */
 
@@ -335,11 +339,11 @@ errout_with_semaphore:
 
 static int hostfs_close(FAR struct file *filep)
 {
-  struct inode             *inode;
-  struct hostfs_mountpt_s  *fs;
-  struct hostfs_ofile_s    *hf;
-  struct hostfs_ofile_s    *nextfile;
-  struct hostfs_ofile_s    *prevfile;
+  FAR struct inode            *inode;
+  FAR struct hostfs_mountpt_s *fs;
+  FAR struct hostfs_ofile_s   *hf;
+  FAR struct hostfs_ofile_s   *nextfile;
+  FAR struct hostfs_ofile_s   *prevfile;
 
   /* Sanity checks */
 
@@ -415,12 +419,13 @@ okout:
  * Name: hostfs_read
  ****************************************************************************/
 
-static ssize_t hostfs_read(FAR struct file *filep, char *buffer, size_t buflen)
+static ssize_t hostfs_read(FAR struct file *filep, FAR char *buffer,
+                           size_t buflen)
 {
-  struct inode             *inode;
-  struct hostfs_mountpt_s  *fs;
-  struct hostfs_ofile_s    *hf;
-  int                       ret = OK;
+  FAR struct inode *inode;
+  FAR struct hostfs_mountpt_s *fs;
+  FAR struct hostfs_ofile_s *hf;
+  int ret = OK;
 
   /* Sanity checks */
 
@@ -453,10 +458,10 @@ static ssize_t hostfs_read(FAR struct file *filep, char *buffer, size_t buflen)
 static ssize_t hostfs_write(FAR struct file *filep, const char *buffer,
                          size_t buflen)
 {
-  struct inode             *inode;
-  struct hostfs_mountpt_s  *fs;
-  struct hostfs_ofile_s    *hf;
-  int                       ret;
+  FAR struct inode *inode;
+  FAR struct hostfs_mountpt_s *fs;
+  FAR struct hostfs_ofile_s *hf;
+  int ret;
 
   /* Sanity checks.  I have seen the following assertion misfire if
    * CONFIG_DEBUG_MM is enabled while re-directing output to a
@@ -511,10 +516,10 @@ errout_with_semaphore:
 
 static off_t hostfs_seek(FAR struct file *filep, off_t offset, int whence)
 {
-  struct inode             *inode;
-  struct hostfs_mountpt_s  *fs;
-  struct hostfs_ofile_s    *hf;
-  int                       ret;
+  FAR struct inode *inode;
+  FAR struct hostfs_mountpt_s *fs;
+  FAR struct hostfs_ofile_s *hf;
+  int ret;
 
   /* Sanity checks */
 
@@ -546,10 +551,10 @@ static off_t hostfs_seek(FAR struct file *filep, off_t offset, int whence)
 
 static int hostfs_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 {
-  struct inode             *inode;
-  struct hostfs_mountpt_s  *fs;
-  struct hostfs_ofile_s    *hf;
-  int                       ret;
+  FAR struct inode *inode;
+  FAR struct hostfs_mountpt_s *fs;
+  FAR struct hostfs_ofile_s *hf;
+  int ret;
 
   /* Sanity checks */
 
@@ -585,9 +590,9 @@ static int hostfs_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
 static int hostfs_sync(FAR struct file *filep)
 {
-  struct inode             *inode;
-  struct hostfs_mountpt_s  *fs;
-  struct hostfs_ofile_s    *hf;
+  FAR struct inode            *inode;
+  FAR struct hostfs_mountpt_s *fs;
+  FAR struct hostfs_ofile_s   *hf;
 
   /* Sanity checks */
 
@@ -620,7 +625,7 @@ static int hostfs_sync(FAR struct file *filep)
 
 static int hostfs_dup(FAR const struct file *oldp, FAR struct file *newp)
 {
-  struct hostfs_ofile_s   *sf;
+  FAR struct hostfs_ofile_s *sf;
 
   /* Sanity checks */
 
@@ -642,6 +647,47 @@ static int hostfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   return OK;
 }
 
+/****************************************************************************
+ * Name: hostfs_fstat
+ *
+ * Description:
+ *   Obtain information about an open file associated with the file
+ *   descriptor 'fd', and will write it to the area pointed to by 'buf'.
+ *
+ ****************************************************************************/
+
+static int hostfs_fstat(FAR const struct file *filep, FAR struct stat *buf)
+{
+  FAR struct inode *inode;
+  FAR struct hostfs_mountpt_s *fs;
+  FAR struct hostfs_ofile_s *hf;
+  int ret = OK;
+
+  /* Sanity checks */
+
+  DEBUGASSERT(filep != NULL && buf != NULL);
+
+  /* Recover our private data from the struct file instance */
+
+  DEBUGASSERT(filep->f_priv != NULL && filep->f_inode != NULL);
+  hf    = filep->f_priv;
+  inode = filep->f_inode;
+
+  fs    = inode->i_private;
+  DEBUGASSERT(fs != NULL);
+
+  /* Take the semaphore */
+
+  hostfs_semtake(fs);
+
+  /* Call the host to perform the read */
+
+  ret = host_fstat(hf->fd, buf);
+
+  hostfs_semgive(fs);
+  return ret;
+}
+
 /****************************************************************************
  * Name: hostfs_opendir
  *
@@ -649,11 +695,12 @@ static int hostfs_dup(FAR const struct file *oldp, FAR struct file *newp)
  *
  ****************************************************************************/
 
-static int hostfs_opendir(struct inode *mountpt, const char *relpath, struct fs_dirent_s *dir)
+static int hostfs_opendir(FAR struct inode *mountpt, FAR const char *relpath,
+                          FAR struct fs_dirent_s *dir)
 {
-  struct hostfs_mountpt_s  *fs;
-  int                       ret;
-  char                      path[HOSTFS_MAX_PATH];
+  FAR struct hostfs_mountpt_s *fs;
+  char path[HOSTFS_MAX_PATH];
+  int ret;
 
   /* Sanity checks */
 
@@ -674,7 +721,6 @@ static int hostfs_opendir(struct inode *mountpt, const char *relpath, struct fs_
   /* Call the host's opendir function */
 
   dir->u.hostfs.fs_dir = host_opendir(path);
-
   if (dir->u.hostfs.fs_dir == NULL)
     {
       ret = -ENOENT;
@@ -696,7 +742,8 @@ errout_with_semaphore:
  *
  ****************************************************************************/
 
-static int hostfs_closedir(FAR struct inode *mountpt, FAR struct fs_dirent_s *dir)
+static int hostfs_closedir(FAR struct inode *mountpt,
+                           FAR struct fs_dirent_s *dir)
 {
   struct hostfs_mountpt_s  *fs;
 
@@ -727,11 +774,11 @@ static int hostfs_closedir(FAR struct inode *mountpt, FAR struct fs_dirent_s *di
  *
  ****************************************************************************/
 
-static int hostfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir)
+static int hostfs_readdir(FAR struct inode *mountpt,
+                          FAR struct fs_dirent_s *dir)
 {
-  struct hostfs_mountpt_s  *fs;
-  int                       ret;
-  struct host_dirent_s      entry;
+  FAR struct hostfs_mountpt_s *fs;
+  int ret;
 
   /* Sanity checks */
 
@@ -747,22 +794,7 @@ static int hostfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir)
 
   /* Call the host OS's readdir function */
 
-  ret = host_readdir(dir->u.hostfs.fs_dir, &entry);
-
-  /* Save the entry name when successful */
-
-  if (ret == OK)
-    {
-      /* Copy the entry name */
-      memset(dir->fd_dir.d_name, 0, sizeof(dir->fd_dir.d_name));
-      strncpy(dir->fd_dir.d_name, entry.d_name, sizeof(dir->fd_dir.d_name));
-
-      /* Copy the entry type */
-
-      /* TODO:  May need to do some type mapping */
-
-      dir->fd_dir.d_type = entry.d_type;
-    }
+  ret = host_readdir(dir->u.hostfs.fs_dir, &dir->fd_dir);
 
   hostfs_semgive(fs);
   return ret;
@@ -775,7 +807,8 @@ static int hostfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir)
  *
  ****************************************************************************/
 
-static int hostfs_rewinddir(struct inode *mountpt, struct fs_dirent_s *dir)
+static int hostfs_rewinddir(FAR struct inode *mountpt,
+                            FAR struct fs_dirent_s *dir)
 {
   /* Sanity checks */
 
@@ -799,13 +832,14 @@ static int hostfs_rewinddir(struct inode *mountpt, struct fs_dirent_s *dir)
  *
  ****************************************************************************/
 
-static int hostfs_bind(FAR struct inode *blkdriver, const void *data,
-                        void **handle)
+static int hostfs_bind(FAR struct inode *blkdriver, FAR const void *data,
+                       FAR void **handle)
 {
-  struct hostfs_mountpt_s  *fs;
-  struct host_stat_s        buf;
-  int                       ret, len;
-  const char *              options;
+  FAR struct hostfs_mountpt_s  *fs;
+  struct stat buf;
+  FAR const char *options;
+  int len;
+  int ret;
 
   /* Validate the block driver is NULL */
 
@@ -871,7 +905,7 @@ static int hostfs_bind(FAR struct inode *blkdriver, const void *data,
   /* Try to stat the file in the host FS */
 
   ret = host_stat(fs->fs_root, &buf);
-  if ((ret != 0) || ((buf.st_mode & HOST_ST_MODE_DIR) == 0))
+  if (ret != 0 || (buf.st_mode & S_IFDIR) == 0)
     {
       hostfs_semgive(fs);
       kmm_free(fs);
@@ -896,7 +930,7 @@ static int hostfs_bind(FAR struct inode *blkdriver, const void *data,
  ****************************************************************************/
 
 static int hostfs_unbind(FAR void *handle, FAR struct inode **blkdriver,
-                          unsigned int flags)
+                         unsigned int flags)
 {
   FAR struct hostfs_mountpt_s *fs = (FAR struct hostfs_mountpt_s *)handle;
   int ret;
@@ -935,10 +969,9 @@ static int hostfs_unbind(FAR void *handle, FAR struct inode **blkdriver,
  *
  ****************************************************************************/
 
-static int hostfs_statfs(struct inode *mountpt, struct statfs *buf)
+static int hostfs_statfs(FAR struct inode *mountpt, FAR struct statfs *buf)
 {
-  struct hostfs_mountpt_s *fs;
-  struct host_statfs_s      host_buf;
+  FAR struct hostfs_mountpt_s *fs;
   int ret;
 
   /* Sanity checks */
@@ -958,15 +991,7 @@ static int hostfs_statfs(struct inode *mountpt, struct statfs *buf)
 
   /* Call the host fs to perform the statfs */
 
-  ret = host_statfs(fs->fs_root, &host_buf);
-
-  buf->f_namelen = host_buf.f_namelen;
-  buf->f_bsize = host_buf.f_bsize;
-  buf->f_blocks = host_buf.f_blocks;
-  buf->f_bfree = host_buf.f_bfree;
-  buf->f_bavail = host_buf.f_bavail;
-  buf->f_files = host_buf.f_files;
-  buf->f_ffree = host_buf.f_ffree;
+  ret = host_statfs(fs->fs_root, buf);
 
   hostfs_semgive(fs);
   return ret;
@@ -979,11 +1004,11 @@ static int hostfs_statfs(struct inode *mountpt, struct statfs *buf)
  *
  ****************************************************************************/
 
-static int hostfs_unlink(struct inode *mountpt, const char *relpath)
+static int hostfs_unlink(FAR struct inode *mountpt, FAR const char *relpath)
 {
-  struct hostfs_mountpt_s  *fs;
-  int                       ret;
-  char                      path[HOSTFS_MAX_PATH];
+  FAR struct hostfs_mountpt_s *fs;
+  char path[HOSTFS_MAX_PATH];
+  int ret;
 
   /* Sanity checks */
 
@@ -1014,11 +1039,12 @@ static int hostfs_unlink(struct inode *mountpt, const char *relpath)
  *
  ****************************************************************************/
 
-static int hostfs_mkdir(struct inode *mountpt, const char *relpath, mode_t mode)
+static int hostfs_mkdir(FAR struct inode *mountpt, FAR const char *relpath,
+                        mode_t mode)
 {
-  struct hostfs_mountpt_s  *fs;
-  int                       ret;
-  char                      path[HOSTFS_MAX_PATH];
+  FAR struct hostfs_mountpt_s *fs;
+  char path[HOSTFS_MAX_PATH];
+  int ret;
 
   /* Sanity checks */
 
@@ -1049,11 +1075,11 @@ static int hostfs_mkdir(struct inode *mountpt, const char *relpath, mode_t mode)
  *
  ****************************************************************************/
 
-int hostfs_rmdir(struct inode *mountpt, const char *relpath)
+int hostfs_rmdir(FAR struct inode *mountpt, FAR const char *relpath)
 {
-  struct hostfs_mountpt_s  *fs;
-  int                       ret;
-  char                      path[HOSTFS_MAX_PATH];
+  FAR struct hostfs_mountpt_s *fs;
+  char path[HOSTFS_MAX_PATH];
+  int ret;
 
   /* Sanity checks */
 
@@ -1086,13 +1112,13 @@ int hostfs_rmdir(struct inode *mountpt, const char *relpath)
  *
  ****************************************************************************/
 
-int hostfs_rename(struct inode *mountpt, const char *oldrelpath,
-               const char *newrelpath)
+int hostfs_rename(FAR struct inode *mountpt, FAR const char *oldrelpath,
+                  FAR const char *newrelpath)
 {
-  struct hostfs_mountpt_s  *fs;
-  int                       ret;
-  char                      oldpath[HOSTFS_MAX_PATH];
-  char                      newpath[HOSTFS_MAX_PATH];
+  FAR struct hostfs_mountpt_s *fs;
+  char oldpath[HOSTFS_MAX_PATH];
+  char newpath[HOSTFS_MAX_PATH];
+  int ret;
 
   /* Sanity checks */
 
@@ -1126,12 +1152,12 @@ int hostfs_rename(struct inode *mountpt, const char *oldrelpath,
  *
  ****************************************************************************/
 
-static int hostfs_stat(struct inode *mountpt, const char *relpath, struct stat *buf)
+static int hostfs_stat(FAR struct inode *mountpt, FAR const char *relpath,
+                       FAR struct stat *buf)
 {
-  struct hostfs_mountpt_s  *fs;
-  int                       ret;
-  struct host_stat_s        host_buf;
-  char                      path[HOSTFS_MAX_PATH];
+  FAR struct hostfs_mountpt_s *fs;
+  char path[HOSTFS_MAX_PATH];
+  int ret;
 
   /* Sanity checks */
 
@@ -1147,60 +1173,10 @@ static int hostfs_stat(struct inode *mountpt, const char *relpath, struct stat *
 
   hostfs_mkpath(fs, relpath, path, sizeof(path));
 
-  /* Call the host FS to do the mkdir */
-
-  ret = host_stat(path, &host_buf);
-
-  if (ret != 0)
-    {
-      goto errout_with_semaphore;
-    }
-
-  /* Initialize the stat structure */
-
-  memset(buf, 0, sizeof(struct stat));
-
-  buf->st_mode = host_buf.st_mode & 0xFFF;
-
-  if (host_buf.st_mode & HOST_ST_MODE_DIR)
-    {
-      buf->st_mode |= S_IFDIR;
-    }
-
-  if (host_buf.st_mode & HOST_ST_MODE_REG)
-    {
-      buf->st_mode |= S_IFREG;
-    }
-
-  if (host_buf.st_mode & HOST_ST_MODE_CHR)
-    {
-      buf->st_mode |= S_IFCHR;
-    }
-
-  if (host_buf.st_mode & HOST_ST_MODE_BLK)
-    {
-      buf->st_mode |= S_IFBLK;
-    }
-
-  if (host_buf.st_mode & HOST_ST_MODE_LINK)
-    {
-      buf->st_mode |= S_IFLNK;
-    }
-
-  if (host_buf.st_mode & HOST_ST_MODE_PIPE)
-    {
-      buf->st_mode |= S_IFIFO;
-    }
-
-  buf->st_size      = host_buf.st_size;
-  buf->st_blksize   = host_buf.st_blksize;
-  buf->st_blocks    = host_buf.st_blocks;
-  buf->st_atime     = host_buf.st_atim;
-  buf->st_ctime     = host_buf.st_ctim;
+  /* Call the host FS to do the stat operation */
 
-  ret = OK;
+  ret = host_stat(path, buf);
 
-errout_with_semaphore:
   hostfs_semgive(fs);
   return ret;
 }
diff --git a/fs/inode/Make.defs b/fs/inode/Make.defs
index 753a0706eee51cdc0400a1ded14cfe79f29d3d32..bafe86e81488179f1b3e7641cd028ffeccd83cc3 100644
--- a/fs/inode/Make.defs
+++ b/fs/inode/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # fs/inode/Make.defs
 #
-#   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2014, 2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -38,8 +38,9 @@
 ifneq ($(CONFIG_NFILE_DESCRIPTORS),0)
 
 CSRCS += fs_files.c fs_foreachinode.c fs_inode.c fs_inodeaddref.c
-CSRCS += fs_inodebasename.c fs_inodefind.c fs_inoderelease.c
-CSRCS += fs_inoderemove.c fs_inodereserve.c fs_filedetach.c
+CSRCS += fs_inodebasename.c fs_inodefind.c fs_inodefree.c fs_inoderelease.c
+CSRCS += fs_inoderemove.c fs_inodereserve.c fs_inodesearch.c
+CSRCS += fs_filedetach.c
 
 # Include inode/utils build support
 
diff --git a/fs/inode/fs_filedetach.c b/fs/inode/fs_filedetach.c
index 8b13250cbc110e251ea8d02dadd89d12d20b4791..b865e03b4a1411ba9de498cf48b677c11c509281 100644
--- a/fs/inode/fs_filedetach.c
+++ b/fs/inode/fs_filedetach.c
@@ -84,7 +84,7 @@ static inline void _files_semtake(FAR struct filelist *list)
  * Name: file_detach
  *
  * Description:
- *   This function is used to device drivers to create a task-independent
+ *   This function is used in device drivers to create a task-independent
  *   handle to an entity in the file system.  file_detach() duplicates the
  *   'struct file' that underlies the file descriptor, then closes the file
  *   descriptor.
diff --git a/fs/inode/fs_files.c b/fs/inode/fs_files.c
index 7c4665640e54465e3bd375c3beed91378bb232b2..1667130c932d5d429565d337f9f68045641b5c35 100644
--- a/fs/inode/fs_files.c
+++ b/fs/inode/fs_files.c
@@ -196,12 +196,12 @@ int file_dup2(FAR struct file *filep1, FAR struct file *filep2)
 {
   FAR struct filelist *list;
   FAR struct inode *inode;
-  int err;
+  int errcode;
   int ret;
 
   if (!filep1 || !filep1->f_inode || !filep2)
     {
-      err = EBADF;
+      errcode = EBADF;
       goto errout;
     }
 
@@ -287,7 +287,7 @@ errout_with_inode:
   filep2->f_inode  = NULL;
 
 errout_with_ret:
-  err              = -ret;
+  errcode              = -ret;
 
   if (list != NULL)
     {
@@ -295,7 +295,7 @@ errout_with_ret:
     }
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 }
 
diff --git a/fs/inode/fs_inode.c b/fs/inode/fs_inode.c
index e2e86eaa0031444e83674e79d59f75b2db99cb41..8bbeb3f4ec50b2ade6529e7050073134c95c26f0 100644
--- a/fs/inode/fs_inode.c
+++ b/fs/inode/fs_inode.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/inode/fs_inode.c
  *
- *   Copyright (C) 2007-2009, 2011-2012, 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011-2012, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,11 +39,11 @@
 
 #include 
 
-#include 
+#include 
 #include 
+#include 
 #include 
 
-#include 
 #include 
 
 #include "inode/inode.h"
@@ -52,7 +52,7 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-#define NO_HOLDER (pid_t)-1;
+#define NO_HOLDER ((pid_t)-1)
 
 /****************************************************************************
  * Private Types
@@ -79,93 +79,6 @@ struct inode_sem_s
 
 static struct inode_sem_s g_inode_sem;
 
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-FAR struct inode *g_root_inode = NULL;
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: _inode_compare
- *
- * Description:
- *   Compare two inode names
- *
- ****************************************************************************/
-
-static int _inode_compare(FAR const char *fname,
-                          FAR struct inode *node)
-{
-  char *nname = node->i_name;
-
-  if (!nname)
-    {
-      return 1;
-    }
-
-  if (!fname)
-    {
-      return -1;
-    }
-
-  for (; ; )
-    {
-      /* At end of node name? */
-
-      if (!*nname)
-        {
-          /* Yes.. also end of find name? */
-
-          if (!*fname || *fname == '/')
-            {
-              /* Yes.. return match */
-
-              return 0;
-            }
-          else
-            {
-              /* No... return find name > node name */
-
-              return 1;
-            }
-        }
-
-      /* At end of find name? */
-
-      else if (!*fname || *fname == '/')
-        {
-          /* Yes... return find name < node name */
-
-          return -1;
-        }
-
-      /* Check for non-matching characters */
-
-      else if (*fname > *nname)
-        {
-          return 1;
-        }
-      else if (*fname < *nname)
-        {
-          return -1;
-        }
-
-      /* Not at the end of either string and all of the
-       * characters still match.  keep looking.
-       */
-
-      else
-        {
-          fname++;
-          nname++;
-        }
-    }
-}
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -272,169 +185,3 @@ void inode_semgive(void)
       sem_post(&g_inode_sem.sem);
     }
 }
-
-/****************************************************************************
- * Name: inode_search
- *
- * Description:
- *   Find the inode associated with 'path' returning the inode references
- *   and references to its companion nodes.
- *
- * Assumptions:
- *   The caller holds the g_inode_sem semaphore
- *
- ****************************************************************************/
-
-FAR struct inode *inode_search(FAR const char **path,
-                               FAR struct inode **peer,
-                               FAR struct inode **parent,
-                               FAR const char **relpath)
-{
-  FAR const char   *name  = *path + 1; /* Skip over leading '/' */
-  FAR struct inode *node  = g_root_inode;
-  FAR struct inode *left  = NULL;
-  FAR struct inode *above = NULL;
-
-  while (node)
-    {
-      int result = _inode_compare(name, node);
-
-      /* Case 1:  The name is less than the name of the node.
-       * Since the names are ordered, these means that there
-       * is no peer node with this name and that there can be
-       * no match in the fileystem.
-       */
-
-      if (result < 0)
-        {
-          node = NULL;
-          break;
-        }
-
-      /* Case 2: the name is greater than the name of the node.
-       * In this case, the name may still be in the list to the
-       * "right"
-       */
-
-      else if (result > 0)
-        {
-          left = node;
-          node = node->i_peer;
-        }
-
-      /* The names match */
-
-      else
-        {
-          /* Now there are three more possibilities:
-           *   (1) This is the node that we are looking for or,
-           *   (2) The node we are looking for is "below" this one.
-           *   (3) This node is a mountpoint and will absorb all request
-           *       below this one
-           */
-
-          name = inode_nextname(name);
-          if (!*name || INODE_IS_MOUNTPT(node))
-            {
-              /* Either (1) we are at the end of the path, so this must be the
-               * node we are looking for or else (2) this node is a mountpoint
-               * and will handle the remaining part of the pathname
-               */
-
-              if (relpath)
-                {
-                  *relpath = name;
-                }
-              break;
-            }
-          else
-            {
-              /* More to go, keep looking at the next level "down" */
-
-              above = node;
-              left  = NULL;
-              node = node->i_child;
-            }
-        }
-    }
-
-  /* node is null.  This can happen in one of four cases:
-   * With node = NULL
-   *   (1) We went left past the final peer:  The new node
-   *       name is larger than any existing node name at
-   *       that level.
-   *   (2) We broke out in the middle of the list of peers
-   *       because the name was not found in the ordered
-   *       list.
-   *   (3) We went down past the final parent:  The new node
-   *       name is "deeper" than anything that we currently
-   *       have in the tree.
-   * with node != NULL
-   *   (4) When the node matching the full path is found
-   */
-
-  if (peer)
-    {
-      *peer = left;
-    }
-
-  if (parent)
-    {
-      *parent = above;
-    }
-
-  *path = name;
-  return node;
-}
-
-/****************************************************************************
- * Name: inode_free
- *
- * Description:
- *   Free resources used by an inode
- *
- ****************************************************************************/
-
-void inode_free(FAR struct inode *node)
-{
-  /* Verify that we were passed valid pointer to an inode */
-
-  if (node != NULL)
-    {
-      inode_free(node->i_peer);
-      inode_free(node->i_child);
-      kmm_free(node);
-    }
-}
-
-/****************************************************************************
- * Name: inode_nextname
- *
- * Description:
- *   Given a path with node names separated by '/', return the next path
- *   segment name.
- *
- ****************************************************************************/
-
-FAR const char *inode_nextname(FAR const char *name)
-{
-  /* Search for the '/' delimiter or the NUL terminator at the end of the
-   * path segment.
-   */
-
-  while (*name && *name != '/')
-    {
-      name++;
-    }
-
-  /* If we found the '/' delimiter, then the path segment we want begins at
-   * the next character (which might also be the NUL terminator).
-   */
-
-  if (*name)
-    {
-      name++;
-    }
-
-  return name;
-}
diff --git a/fs/inode/fs_inodefind.c b/fs/inode/fs_inodefind.c
index 3ff249d348d758c5c7fb0d6f0319d980299dda72..30a0b1d5fd670219cf1f7ad1083bb707438ad447 100644
--- a/fs/inode/fs_inodefind.c
+++ b/fs/inode/fs_inodefind.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/inode/fs_inodefind.c
  *
- *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,7 +39,9 @@
 
 #include 
 
+#include 
 #include 
+
 #include 
 
 #include "inode/inode.h"
@@ -53,31 +55,35 @@
  *
  * Description:
  *   This is called from the open() logic to get a reference to the inode
- *   associated with a path.
+ *   associated with a path.  This is accomplished by calling inode_search().
+ *   inode_find() is a simple wrapper around inode_search().  The primary
+ *   difference between inode_find() and inode_search is that inode_find()
+ *   will lock the inode tree and increment the reference count on the inode.
  *
  ****************************************************************************/
 
-FAR struct inode *inode_find(FAR const char *path, FAR const char **relpath)
+int inode_find(FAR struct inode_search_s *desc)
 {
-  FAR struct inode *node;
-
-  if (path == NULL || path[0] == '\0' || path[0] != '/')
-    {
-      return NULL;
-    }
+  int ret;
 
   /* Find the node matching the path.  If found, increment the count of
    * references on the node.
    */
 
   inode_semtake();
-  node = inode_search(&path, (FAR struct inode**)NULL, (FAR struct inode**)NULL, relpath);
-  if (node)
+  ret = inode_search(desc);
+  if (ret >= 0)
     {
+      /* Found it */
+
+      FAR struct inode *node = desc->node;
+      DEBUGASSERT(node != NULL);
+
+      /* Increment the reference count on the inode */
+
       node->i_crefs++;
     }
 
   inode_semgive();
-  return node;
+  return ret;
 }
-
diff --git a/fs/inode/fs_inodefree.c b/fs/inode/fs_inodefree.c
new file mode 100644
index 0000000000000000000000000000000000000000..2a4567c49c8828275c2c20139a98b10051149998
--- /dev/null
+++ b/fs/inode/fs_inodefree.c
@@ -0,0 +1,93 @@
+/****************************************************************************
+ * fs/inode/fs_inodefree.c
+ *
+ *   Copyright (C) 2007-2009, 2011-2012, 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "inode/inode.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: inode_free
+ *
+ * Description:
+ *   Free resources used by an inode
+ *
+ ****************************************************************************/
+
+void inode_free(FAR struct inode *node)
+{
+  /* Verify that we were passed valid pointer to an inode */
+
+  if (node != NULL)
+    {
+#ifdef CONFIG_PSEUDOFS_SOFTLINKS
+      /* Symbol links should never have peers or children */
+
+      DEBUGASSERT(!INODE_IS_SOFTLINK(node) ||
+                  (node->i_peer == NULL && node->i_child == NULL));
+#endif
+
+      /* Free all peers and children of this i_node */
+
+      inode_free(node->i_peer);
+      inode_free(node->i_child);
+
+#ifdef CONFIG_PSEUDOFS_SOFTLINKS
+      /* If the inode is a symbolic link, the free the path to the linked
+       * entity.
+       */
+
+      if (INODE_IS_SOFTLINK(node) && node->u.i_link != NULL)
+        {
+          kmm_free(node->u.i_link);
+        }
+#endif
+
+      kmm_free(node);
+    }
+}
diff --git a/fs/inode/fs_inoderemove.c b/fs/inode/fs_inoderemove.c
index 8f454f1d584aea1878f1a2e756e964f8d9d747af..968a0cfdd0ffe3a3bfb24ee29873fbb5803f90b9 100644
--- a/fs/inode/fs_inoderemove.c
+++ b/fs/inode/fs_inoderemove.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/inode/fs_inoderemove.c
  *
- *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -58,6 +58,11 @@
  *   path refers to.  This is normally done in preparation to removing or
  *   moving an inode.
  *
+ *   In symbolic links in the pseduo file system are enabled, then this
+ *   logic will follow the symbolic links up until the terminal node.  Then
+ *   that link in removed. So if this the terminal node is a symbolic link,
+ *   the symbolic link node will be removed, not the target of the link.
+ *
  * Assumptions/Limitations:
  *   The caller must hold the inode semaphore
  *
@@ -65,10 +70,9 @@
 
 FAR struct inode *inode_unlink(FAR const char *path)
 {
-  const char       *name = path;
-  FAR struct inode *node;
-  FAR struct inode *peer;
-  FAR struct inode *parent;
+  struct inode_search_s desc;
+  FAR struct inode *node = NULL;
+  int ret;
 
   /* Verify parameters.  Ignore null paths and relative paths */
 
@@ -79,25 +83,30 @@ FAR struct inode *inode_unlink(FAR const char *path)
 
   /* Find the node to unlink */
 
-  node = inode_search(&name, &peer, &parent, (const char **)NULL);
-  if (node)
+  SETUP_SEARCH(&desc, path, true);
+
+  ret = inode_search(&desc);
+  if (ret >= 0)
     {
+      node = desc.node;
+      DEBUGASSERT(node != NULL);
+
       /* If peer is non-null, then remove the node from the right of
        * of that peer node.
        */
 
-      if (peer)
+      if (desc.peer != NULL)
         {
-          peer->i_peer = node->i_peer;
+          desc.peer->i_peer = node->i_peer;
         }
 
       /* If parent is non-null, then remove the node from head of
        * of the list of children.
        */
 
-      else if (parent)
+      else if (desc.parent)
         {
-          parent->i_child = node->i_peer;
+          desc.parent->i_child = node->i_peer;
         }
 
       /* Otherwise, we must be removing the root inode. */
@@ -110,6 +119,7 @@ FAR struct inode *inode_unlink(FAR const char *path)
       node->i_peer = NULL;
     }
 
+  RELEASE_SEARCH(&desc);
   return node;
 }
 
diff --git a/fs/inode/fs_inodereserve.c b/fs/inode/fs_inodereserve.c
index d790689de979aae4da7e961ad6f97db566b9f950..1c08b0556769e1fa7e259b7aeac5039a300fc0be 100644
--- a/fs/inode/fs_inodereserve.c
+++ b/fs/inode/fs_inodereserve.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/inode/fs_registerreserve.c
  *
- *   Copyright (C) 2007-2009, 2011-2012, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011-2012, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -163,33 +163,45 @@ static void inode_insert(FAR struct inode *node,
 
 int inode_reserve(FAR const char *path, FAR struct inode **inode)
 {
-  FAR const char   *name = path;
+  struct inode_search_s desc;
   FAR struct inode *left;
   FAR struct inode *parent;
+  FAR const char *name;
+  int ret;
 
   /* Assume failure */
 
-  DEBUGASSERT(path && inode);
+  DEBUGASSERT(path != NULL && inode != NULL);
   *inode = NULL;
 
   /* Handle paths that are interpreted as the root directory */
 
-  if (path[0] == '\0' || path[0] != '/' || path[1] == '\0')
+  if (path[0] == '\0' || path[0] != '/')
     {
       return -EINVAL;
     }
 
   /* Find the location to insert the new subtree */
 
-  if (inode_search(&name, &left, &parent, (FAR const char **)NULL) != NULL)
+  SETUP_SEARCH(&desc, path, false);
+
+  ret = inode_search(&desc);
+  if (ret >= 0)
     {
-      /* It is an error if the node already exists in the tree */
+      /* It is an error if the node already exists in the tree (or if it
+       * lies within a mountpoint, we don't distinguish here).
+       */
 
-      return -EEXIST;
+      ret = -EEXIST;
+      goto errout_with_search;
     }
 
   /* Now we now where to insert the subtree */
 
+  name   = desc.path;
+  left   = desc.peer;
+  parent = desc.parent;
+
   for (; ; )
     {
       FAR struct inode *node;
@@ -199,19 +211,19 @@ int inode_reserve(FAR const char *path, FAR struct inode **inode)
        * by looking at the next name.
        */
 
-      FAR const char *next_name = inode_nextname(name);
-      if (*next_name)
+      FAR const char *nextname = inode_nextname(name);
+      if (*nextname != '\0')
         {
           /* Insert an operationless node */
 
           node = inode_alloc(name);
-          if (node)
+          if (node != NULL)
             {
               inode_insert(node, left, parent);
 
               /* Set up for the next time through the loop */
 
-              name   = next_name;
+              name   = nextname;
               left   = NULL;
               parent = node;
               continue;
@@ -220,16 +232,22 @@ int inode_reserve(FAR const char *path, FAR struct inode **inode)
       else
         {
           node = inode_alloc(name);
-          if (node)
+          if (node != NULL)
             {
               inode_insert(node, left, parent);
               *inode = node;
-              return OK;
+              ret = OK;
+              break;
             }
         }
 
       /* We get here on failures to allocate node memory */
 
-      return -ENOMEM;
+      ret = -ENOMEM;
+      break;
     }
+
+errout_with_search:
+  RELEASE_SEARCH(&desc);
+  return ret;
 }
diff --git a/fs/inode/fs_inodesearch.c b/fs/inode/fs_inodesearch.c
new file mode 100644
index 0000000000000000000000000000000000000000..c4d6cc079229f251ac11aba1354e449aa3c224bc
--- /dev/null
+++ b/fs/inode/fs_inodesearch.c
@@ -0,0 +1,614 @@
+/****************************************************************************
+ * fs/inode/fs_inodesearch.c
+ *
+ *   Copyright (C) 2007-2009, 2011-2012, 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "inode/inode.h"
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int _inode_compare(FAR const char *fname, FAR struct inode *node);
+#ifdef CONFIG_PSEUDOFS_SOFTLINKS
+static int _inode_linktarget(FAR struct inode *node,
+                             FAR struct inode_search_s *desc);
+#endif
+static int _inode_search(FAR struct inode_search_s *desc);
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+FAR struct inode *g_root_inode = NULL;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: _inode_compare
+ *
+ * Description:
+ *   Compare two inode names
+ *
+ ****************************************************************************/
+
+static int _inode_compare(FAR const char *fname, FAR struct inode *node)
+{
+  char *nname = node->i_name;
+
+  if (!nname)
+    {
+      return 1;
+    }
+
+  if (!fname)
+    {
+      return -1;
+    }
+
+  for (; ; )
+    {
+      /* At end of node name? */
+
+      if (!*nname)
+        {
+          /* Yes.. also end of find name? */
+
+          if (!*fname || *fname == '/')
+            {
+              /* Yes.. return match */
+
+              return 0;
+            }
+          else
+            {
+              /* No... return find name > node name */
+
+              return 1;
+            }
+        }
+
+      /* At end of find name? */
+
+      else if (!*fname || *fname == '/')
+        {
+          /* Yes... return find name < node name */
+
+          return -1;
+        }
+
+      /* Check for non-matching characters */
+
+      else if (*fname > *nname)
+        {
+          return 1;
+        }
+      else if (*fname < *nname)
+        {
+          return -1;
+        }
+
+      /* Not at the end of either string and all of the
+       * characters still match.  keep looking.
+       */
+
+      else
+        {
+          fname++;
+          nname++;
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: _inode_linktarget
+ *
+ * Description:
+ *   If the inode is a soft link, then (1) get the name of the full path of
+ *   the soft link, (2) recursively look-up the inode referenced by the soft
+ *   link, and (3) return the inode referenced by the soft link.
+ *
+ * Assumptions:
+ *   The caller holds the g_inode_sem semaphore
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_PSEUDOFS_SOFTLINKS
+static int _inode_linktarget(FAR struct inode *node,
+                             FAR struct inode_search_s *desc)
+{
+  unsigned int count = 0;
+  bool save;
+  int ret = -ENOENT;
+
+  DEBUGASSERT(desc != NULL && node != NULL);
+
+  /* An infinite loop is avoided only by the loop count.
+   *
+   * REVISIT:  The ELOOP error should be reported to the application in that
+   * case but there is no simple mechanism to do that.
+   */
+
+  save = desc->nofollow;
+  while (INODE_IS_SOFTLINK(node))
+    {
+      FAR const char *link = (FAR const char *)node->u.i_link;
+
+      /* Reset and reinitialize the search descriptor.  */
+
+      RELEASE_SEARCH(desc);
+      SETUP_SEARCH(desc, link, true);
+
+      /* Look up inode associated with the target of the symbolic link */
+
+      ret = _inode_search(desc);
+      if (ret < 0)
+        {
+          break;
+        }
+
+      /* Limit the number of symbolic links that we pass through */
+
+      if (++count > SYMLOOP_MAX)
+        {
+          ret = -ELOOP;
+          break;
+        }
+
+      /* Set up for the next time through the loop */
+
+      node = desc->node;
+      DEBUGASSERT(node != NULL);
+      desc->linktgt = link;
+    }
+
+  desc->nofollow = save;
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Name: _inode_search
+ *
+ * Description:
+ *   Find the inode associated with 'path' returning the inode references
+ *   and references to its companion nodes.  This is the internal, common
+ *   implementation of inode_search().
+ *
+ *   If a mountpoint is encountered in the search prior to encountering the
+ *   terminal node, the search will terminate at the mountpoint inode.  That
+ *   inode and the relative path from the mountpoint, 'relpath' will be
+ *   returned.
+ *
+ *   If a soft link is encountered that is not the terminal node in the path,
+ *   that link WILL be deferenced unconditionally.
+ *
+ * Assumptions:
+ *   The caller holds the g_inode_sem semaphore
+ *
+ ****************************************************************************/
+
+static int _inode_search(FAR struct inode_search_s *desc)
+{
+  FAR const char   *name;
+  FAR struct inode *node    = g_root_inode;
+  FAR struct inode *left    = NULL;
+  FAR struct inode *above   = NULL;
+  FAR const char   *relpath = NULL;
+  int ret = -ENOENT;
+
+  /* Get the search path, skipping over the leading '/'.  The leading '/' is
+   * mandatory because only absolte paths are expected in this context.
+   */
+
+  DEBUGASSERT(desc != NULL && desc->path != NULL);
+  name  = desc->path;
+
+  if (*name != '/')
+    {
+      return -EINVAL;
+    }
+
+  /* Skip over the leading '/' */
+
+  while (*name == '/')
+    {
+      name++;
+    }
+
+  /* Special case the root directory.  There is no root inode and there is
+   * no name for the root.
+   */
+
+  if (*name == '\0')
+    {
+      /* This is a bug.  I don't know how to handle this case yet. */
+
+      return -ENOSYS;
+    }
+
+  /* Traverse the pseudo file system node tree until either (1) all nodes
+   * have been examined without finding the matching node, or (2) the
+   * matching node is found.
+   */
+
+  while (node != NULL)
+    {
+      int result = _inode_compare(name, node);
+
+      /* Case 1:  The name is less than the name of the node.
+       * Since the names are ordered, these means that there
+       * is no peer node with this name and that there can be
+       * no match in the fileystem.
+       */
+
+      if (result < 0)
+        {
+          node = NULL;
+          break;
+        }
+
+      /* Case 2: the name is greater than the name of the node.
+       * In this case, the name may still be in the list to the
+       * "right"
+       */
+
+      else if (result > 0)
+        {
+          /* Continue looking to the "right" of this inode. */
+
+          left = node;
+          node = node->i_peer;
+        }
+
+      /* The names match */
+
+      else
+        {
+          /* Now there are three remaining possibilities:
+           *   (1) This is the node that we are looking for.
+           *   (2) The node we are looking for is "below" this one.
+           *   (3) This node is a mountpoint and will absorb all request
+           *       below this one
+           */
+
+          name = inode_nextname(name);
+          if (*name == '\0' || INODE_IS_MOUNTPT(node))
+            {
+              /* Either (1) we are at the end of the path, so this must be the
+               * node we are looking for or else (2) this node is a mountpoint
+               * and will handle the remaining part of the pathname
+               */
+
+              relpath = name;
+              ret = OK;
+              break;
+            }
+          else
+            {
+              /* More nodes to be examined in the path "below" this one. */
+
+#ifdef CONFIG_PSEUDOFS_SOFTLINKS
+              /* Was the node a soft link?  If so, then we need need to
+               * continue below the target of the link, not the link itself.
+               */
+
+              if (INODE_IS_SOFTLINK(node))
+                {
+                  int status;
+
+                  /* If this intermediate inode in the is a soft link, then
+                   * (1) get the name of the full path of the soft link, (2)
+                   * recursively look-up the inode referenced by the soft
+                   * link, and (3) continue searching with that inode instead.
+                   */
+
+                  status = _inode_linktarget(node, desc);
+                  if (status < 0)
+                    {
+                      /* Probably means that the the target of the symbolic
+                       * link does not exist.
+                       */
+
+                      ret = status;
+                      break;
+                    }
+                  else
+                    {
+                      FAR struct inode *newnode = desc->node;
+
+                      if (newnode != node)
+                        {
+                          /* The node was a valid symbolic link and we have
+                           * jumped to a different, spot in the the pseudo
+                           * file system tree.
+                           */
+
+                          /* Check if this took us to a mountpoint. */
+
+                          if (INODE_IS_MOUNTPT(newnode))
+                            {
+                              /* Return the mountpoint information.
+                               * NOTE that the last path to the link target
+                               * was already set by _inode_linktarget().
+                               */
+
+                              node    = newnode;
+                              above   = NULL;
+                              left    = NULL;
+                              relpath = name;
+
+                              ret     = OK;
+                              break;
+                            }
+
+                          /* Continue from this new inode. */
+
+                          node = newnode;
+                        }
+                    }
+                }
+#endif
+              /* Keep looking at the next level "down" */
+
+              above = node;
+              left  = NULL;
+              node  = node->i_child;
+            }
+        }
+    }
+
+  /* The node may or may not be null as per one of the following four cases
+   * cases:
+   *
+   * With node = NULL
+   *
+   *   (1) We went left past the final peer:  The new node name is larger
+   *       than any existing node name at that level.
+   *   (2) We broke out in the middle of the list of peers because the name
+   *       was not found in the ordered list.
+   *   (3) We went down past the final parent:  The new node name is
+   *       "deeper" than anything that we currently have in the tree.
+   *
+   * With node != NULL
+   *
+   *   (4) When the node matching the full path is found
+   */
+
+  desc->path    = name;
+  desc->node    = node;
+  desc->peer    = left;
+  desc->parent  = above;
+  desc->relpath = relpath;
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: inode_search
+ *
+ * Description:
+ *   Find the inode associated with 'path' returning the inode references
+ *   and references to its companion nodes.
+ *
+ *   If a mountpoint is encountered in the search prior to encountering the
+ *   terminal node, the search will terminate at the mountpoint inode.  That
+ *   inode and the relative path from the mountpoint, 'relpath' will be
+ *   returned.
+ *
+ *   inode_search will follow soft links in path leading up to the terminal
+ *   node.  Whether or no inode_search() will deference that terminal node
+ *   depends on the 'nofollow' input.
+ *
+ *   If a soft link is encountered that is not the terminal node in the path,
+ *   that link WILL be deferenced unconditionally.
+ *
+ * Assumptions:
+ *   The caller holds the g_inode_sem semaphore
+ *
+ ****************************************************************************/
+
+int inode_search(FAR struct inode_search_s *desc)
+{
+  int ret;
+
+  /* Perform the common _inode_search() logic.  This does everything except
+   * operations special operations that must be performed on the terminal
+   * node if node is a symbolic link.
+   */
+
+  DEBUGASSERT(desc != NULL);
+#ifdef CONFIG_PSEUDOFS_SOFTLINKS
+  desc->linktgt = NULL;
+#endif
+
+  ret = _inode_search(desc);
+
+#ifdef CONFIG_PSEUDOFS_SOFTLINKS
+  if (ret >= 0)
+    {
+      FAR struct inode *node;
+
+      /* Search completed successfully */
+
+      node    = desc->node;
+      DEBUGASSERT(node != NULL);
+
+      /* Is the terminal node a softlink? Should we follow it? */
+
+      if (!desc->nofollow && INODE_IS_SOFTLINK(node))
+        {
+          /* Save some things we need that will be clobbered by the call to
+           * _inode_linktgt().
+           */
+
+          FAR const char *relpath = desc->relpath; /* Will always be "" here */
+
+          /* The terminating inode is a valid soft link:  Return the inode,
+           * corresponding to link target.  _inode_linktarget() will follow
+           * a link (or a series of links to links) and will return the
+           * link target of the final symbolic link in the series.
+           */
+
+          ret = _inode_linktarget(node, desc);
+          if (ret < 0)
+            {
+              /* The most likely cause for failure is that the target of the
+               * symbolic link does not exist.
+               */
+
+              return ret;
+            }
+
+          /* The dereferenced node might be a mountpoint */
+
+          node = desc->node;
+          DEBUGASSERT(node != NULL && desc->linktgt != NULL);
+
+          if (INODE_IS_MOUNTPT(node))
+            {
+               /* Yes... set up for the MOUNTPOINT logic below. */
+
+              desc->relpath = relpath;
+            }
+        }
+
+      /* Handle a special case.  This special occurs with either (1)
+       * inode_search() terminates early because it encountered a MOUNTPOINT
+       * at an intermediate node in the path, or (2) inode_search()
+       * terminates because it reached the terminal node and 'nofollow' is
+       * false and the above logic converted the symbolic link to a
+       * MOUNTPOINT.
+       *
+       * We can detect the special cases because desc->linktgt will be
+       * non-NULL.
+       */
+
+      if (desc->linktgt != NULL && INODE_IS_MOUNTPT(node))
+        {
+          FAR char *buffer;
+
+          /* There would be no problem in this case if the link was to
+           * either to the root directory of the MOUNTPOINT or to a
+           * regular file within the the mounted volume.  However,
+           * there is a problem if the symbolic link is to a directory
+           * within the mounted volume.  In that case, the 'relpath'
+           * will be relative to the symbolic link and not to the
+           * MOUNTPOINT.
+           *
+           * We will handle the worst case by creating the full path
+           * excluding the symbolic link and performing the look-up
+           * again.
+           */
+
+          if (desc->relpath != NULL && *desc->relpath != '\0')
+            {
+              (void)asprintf(&buffer, "%s/%s",
+                             desc->linktgt, desc->relpath);
+            }
+          else
+            {
+              buffer = strdup(desc->linktgt);
+            }
+
+          if (buffer == NULL)
+            {
+              ret = -ENOMEM;
+            }
+          else
+            {
+              /* Reset the search description and perform the search again. */
+
+              RELEASE_SEARCH(desc);
+              SETUP_SEARCH(desc, buffer, false);
+              desc->buffer = buffer;
+
+              ret = _inode_search(desc);
+            }
+        }
+    }
+#endif
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: inode_nextname
+ *
+ * Description:
+ *   Given a path with node names separated by '/', return the next path
+ *   segment name.
+ *
+ ****************************************************************************/
+
+FAR const char *inode_nextname(FAR const char *name)
+{
+  /* Search for the '/' delimiter or the NUL terminator at the end of the
+   * path segment.
+   */
+
+  while (*name != '\0' && *name != '/')
+    {
+      name++;
+    }
+
+  /* If we found the '/' delimiter, then the path segment we want begins at
+   * the next character (which might also be the NUL terminator).
+   */
+
+  while (*name == '/')
+    {
+      name++;
+    }
+
+  return name;
+}
diff --git a/fs/inode/inode.h b/fs/inode/inode.h
index 089bf67234429b22d8f4251ade6af8a103521ad2..71b1af8e92792bf6d8070079e349dfb7e0c006ea 100644
--- a/fs/inode/inode.h
+++ b/fs/inode/inode.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/inode/inode.h
  *
- *   Copyright (C) 2007, 2009, 2012, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2009, 2012, 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -41,67 +41,107 @@
  ****************************************************************************/
 
 #include 
+#include 
 
 #include 
 #include 
+#include 
 #include 
 
+#include 
 #include 
-#include 
 
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
-/* Inode i_flag values */
-
-#define FSNODEFLAG_TYPE_MASK       0x00000007 /* Isolates type field        */
-#define   FSNODEFLAG_TYPE_DRIVER   0x00000000 /*   Character driver         */
-#define   FSNODEFLAG_TYPE_BLOCK    0x00000001 /*   Block driver             */
-#define   FSNODEFLAG_TYPE_MOUNTPT  0x00000002 /*   Mount point              */
-#define FSNODEFLAG_TYPE_SPECIAL    0x00000004 /* Special OS type            */
-#define   FSNODEFLAG_TYPE_NAMEDSEM 0x00000004 /*   Named semaphore          */
-#define   FSNODEFLAG_TYPE_MQUEUE   0x00000005 /*   Message Queue            */
-#define   FSNODEFLAG_TYPE_SHM      0x00000006 /*   Shared memory region     */
-#define FSNODEFLAG_DELETED         0x00000008 /* Unlinked                   */
-
-#define INODE_IS_TYPE(i,t) \
-  (((i)->i_flags & FSNODEFLAG_TYPE_MASK) == (t))
-#define INODE_IS_SPECIAL(i) \
-  (((i)->i_flags & FSNODEFLAG_TYPE_SPECIAL) != 0)
-
-#define INODE_IS_DRIVER(i)    INODE_IS_TYPE(i,FSNODEFLAG_TYPE_DRIVER)
-#define INODE_IS_BLOCK(i)     INODE_IS_TYPE(i,FSNODEFLAG_TYPE_BLOCK)
-#define INODE_IS_MOUNTPT(i)   INODE_IS_TYPE(i,FSNODEFLAG_TYPE_MOUNTPT)
-#define INODE_IS_NAMEDSEM(i)  INODE_IS_TYPE(i,FSNODEFLAG_TYPE_NAMEDSEM)
-#define INODE_IS_MQUEUE(i)    INODE_IS_TYPE(i,FSNODEFLAG_TYPE_MQUEUE)
-#define INODE_IS_SHM(i)       INODE_IS_TYPE(i,FSNODEFLAG_TYPE_SHM)
-
-#define INODE_GET_TYPE(i)     ((i)->i_flags & FSNODEFLAG_TYPE_MASK)
-#define INODE_SET_TYPE(i,t) \
-  do \
-    { \
-      (i)->i_flags = ((i)->i_flags & ~FSNODEFLAG_TYPE_MASK) | (t); \
-    } \
-  while (0)
-
-#define INODE_SET_DRIVER(i)   INODE_SET_TYPE(i,FSNODEFLAG_TYPE_DRIVER)
-#define INODE_SET_BLOCK(i)    INODE_SET_TYPE(i,FSNODEFLAG_TYPE_BLOCK)
-#define INODE_SET_MOUNTPT(i)  INODE_SET_TYPE(i,FSNODEFLAG_TYPE_MOUNTPT)
-#define INODE_SET_NAMEDSEM(i) INODE_SET_TYPE(i,FSNODEFLAG_TYPE_NAMEDSEM)
-#define INODE_SET_MQUEUE(i)   INODE_SET_TYPE(i,FSNODEFLAG_TYPE_MQUEUE)
-#define INODE_SET_SHM(i)      INODE_SET_TYPE(i,FSNODEFLAG_TYPE_SHM)
-
-/* Mountpoint fd_flags values */
-
-#define DIRENTFLAGS_PSEUDONODE 1
-
-#define DIRENT_SETPSEUDONODE(f) do (f) |= DIRENTFLAGS_PSEUDONODE; while (0)
-#define DIRENT_ISPSEUDONODE(f) (((f) & DIRENTFLAGS_PSEUDONODE) != 0)
+
+#ifdef CONFIG_PSEUDOFS_SOFTLINKS
+
+#  define SETUP_SEARCH(d,p,n) \
+    do \
+      { \
+        (d)->path     = (p); \
+        (d)->node     = NULL; \
+        (d)->peer     = NULL; \
+        (d)->parent   = NULL; \
+        (d)->relpath  = NULL; \
+        (d)->linktgt  = NULL; \
+        (d)->buffer   = NULL; \
+        (d)->nofollow = (n); \
+      } \
+    while (0)
+
+#  define RELEASE_SEARCH(d) \
+     if ((d)->buffer != NULL) \
+       { \
+         kmm_free((d)->buffer); \
+         (d)->buffer  = NULL; \
+       }
+
+#else
+
+#  define SETUP_SEARCH(d,p,n) \
+    do \
+      { \
+        (d)->path     = (p); \
+        (d)->node     = NULL; \
+        (d)->peer     = NULL; \
+        (d)->parent   = NULL; \
+        (d)->relpath  = NULL; \
+      } \
+    while (0)
+
+#  define RELEASE_SEARCH(d)
+
+#endif
 
 /****************************************************************************
  * Public Types
  ****************************************************************************/
 
+/* This is the type of the argument to inode_search().
+ *
+ *  path     - INPUT:  Path of inode to find
+ *             OUTPUT: Residual part of path not traversed
+ *  node     - INPUT:  (not used)
+ *             OUTPUT: On success, holds the pointer to the inode found.
+ *  peer     - INPUT:  (not used)
+ *             OUTPUT: The inode to the "left" of the inode found.
+ *  parent   - INPUT:  (not used)
+ *             OUTPUT: The inode to the "above" of the inode found.
+ *  relpath  - INPUT:  (not used)
+ *             OUTPUT: If the returned inode is a mountpoint, this is the
+ *                     relative path from the mountpoint.
+ *  linktgt  - INPUT:  (not used)
+ *             OUTPUT: If a symobolic link into a mounted file system is
+ *                     detected while traversing the path, then the link
+ *                     will be converted to a mountpoint inode if the
+ *                     mountpoint link is in an intermediate node of the
+ *                     path or at the final node of the path with nofollow=true.
+ *  nofollow - INPUT:  true: terminal node is returned; false: if the
+ *                     terminal is a soft link, then return the inode of
+ *                     the link target.
+ *           - OUTPUT: (not used)
+ *  buffer   - INPUT:  Not used
+ *           - OUTPUT: May hold an allocated intermediate path which is
+ *                     probably of no interest to the caller unless it holds
+ *                     the relpath.
+ */
+
+struct inode_search_s
+{
+  FAR const char *path;      /* Path of inode to find */
+  FAR struct inode *node;    /* Pointer to the inode found */
+  FAR struct inode *peer;    /* Node to the "left" for the found inode */
+  FAR struct inode *parent;  /* Node "above" the found inode */
+  FAR const char *relpath;   /* Relative path into the mountpoint */
+#ifdef CONFIG_PSEUDOFS_SOFTLINKS
+  FAR const char *linktgt;   /* Target of symbolic link if linked to a directory */
+  FAR char *buffer;          /* Path expansion buffer */
+  bool nofollow;             /* true: Don't follow terminal soft link */
+#endif
+};
+
 /* Callback used by foreach_inode to traverse all inodes in the pseudo-
  * file system.
  */
@@ -129,7 +169,6 @@ EXTERN FAR struct inode *g_root_inode;
  * Public Function Prototypes
  ****************************************************************************/
 
-/* fs_inode.c ***************************************************************/
 /****************************************************************************
  * Name: inode_initialize
  *
@@ -168,15 +207,62 @@ void inode_semgive(void);
  *   Find the inode associated with 'path' returning the inode references
  *   and references to its companion nodes.
  *
+ *   If a mountpoint is encountered in the search prior to encountering the
+ *   terminal node, the search will terminate at the mountpoint inode.  That
+ *   inode and the relative path from the mountpoint, 'relpath' will be
+ *   returned.
+ *
+ *   inode_search will follow soft links in path leading up to the terminal
+ *   node.  Whether or no inode_search() will deference that terminal node
+ *   depends on the 'nofollow' input.
+ *
+ *   If a soft link is encountered that is not the terminal node in the path,
+ *   that link WILL be deferenced unconditionally.
+ *
  * Assumptions:
- *   The caller holds the tree_sem
+ *   The caller holds the g_inode_sem semaphore
+ *
+ ****************************************************************************/
+
+int inode_search(FAR struct inode_search_s *desc);
+
+/****************************************************************************
+ * Name: inode_find
+ *
+ * Description:
+ *   This is called from the open() logic to get a reference to the inode
+ *   associated with a path.  This is accomplished by calling inode_search().
+ *   inode_find() is a simple wrapper around inode_search().  The primary
+ *   difference between inode_find() and inode_search is that inode_find()
+ *   will lock the inode tree and increment the reference count on the inode.
  *
  ****************************************************************************/
 
-FAR struct inode *inode_search(FAR const char **path,
-                               FAR struct inode **peer,
-                               FAR struct inode **parent,
-                               FAR const char **relpath);
+int inode_find(FAR struct inode_search_s *desc);
+
+/****************************************************************************
+ * Name: inode_stat
+ *
+ * Description:
+ *   The inode_stat() function will obtain information about an 'inode' in
+ *   the pseudo file system and will write it to the area pointed to by 'buf'.
+ *
+ *   The 'buf' argument is a pointer to a stat structure, as defined in
+ *   , into which information is placed concerning the file.
+ *
+ * Input Parameters:
+ *   inode - The indoe of interest
+ *   buf   - The caller provide location in which to return information about
+ *           the inode.
+ *
+ * Returned Value:
+ *   Zero (OK) returned on success.  Otherwise, a negated errno value is
+ *   returned to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+struct stat;  /* Forward reference */
+int inode_stat(FAR struct inode *inode, FAR struct stat *buf);
 
 /****************************************************************************
  * Name: inode_free
@@ -199,7 +285,6 @@ void inode_free(FAR struct inode *node);
 
 const char *inode_nextname(FAR const char *name);
 
-/* fs_inodereserver.c *******************************************************/
 /****************************************************************************
  * Name: inode_reserve
  *
@@ -224,7 +309,6 @@ const char *inode_nextname(FAR const char *name);
 
 int inode_reserve(FAR const char *path, FAR struct inode **inode);
 
-/* fs_inoderemove.c *********************************************************/
 /****************************************************************************
  * Name: inode_unlink
  *
@@ -256,27 +340,27 @@ FAR struct inode *inode_unlink(FAR const char *path);
 
 int inode_remove(FAR const char *path);
 
-/* fs_inodefind.c ***********************************************************/
 /****************************************************************************
- * Name: inode_find
+ * Name: inode_addref
  *
  * Description:
- *   This is called from the open() logic to get a reference to the inode
- *   associated with a path.
+ *   Increment the reference count on an inode (as when a file descriptor
+ *   is dup'ed).
  *
  ****************************************************************************/
 
-FAR struct inode *inode_find(FAR const char *path, const char **relpath);
-
-/* fs_inodeaddref.c *********************************************************/
-
 void inode_addref(FAR struct inode *inode);
 
-/* fs_inoderelease.c ********************************************************/
+/****************************************************************************
+ * Name: inode_release
+ *
+ * Description:
+ *   This is called from close() logic when it no longer refers to the inode.
+ *
+ ****************************************************************************/
 
 void inode_release(FAR struct inode *inode);
 
-/* fs_foreachinode.c ********************************************************/
 /****************************************************************************
  * Name: foreach_inode
  *
@@ -295,7 +379,6 @@ void inode_release(FAR struct inode *inode);
 
 int foreach_inode(foreach_inode_t handler, FAR void *arg);
 
-/* fs_files.c ***************************************************************/
 /****************************************************************************
  * Name: files_initialize
  *
diff --git a/fs/mmap/fs_mmap.c b/fs/mmap/fs_mmap.c
index 501db4028233a76b0d6b481ed8487c3585e0f1a6..1d8f88e7050148801bc4b25735f9736a3cbc8de7 100644
--- a/fs/mmap/fs_mmap.c
+++ b/fs/mmap/fs_mmap.c
@@ -131,18 +131,18 @@ FAR void *mmap(FAR void *start, size_t length, int prot, int flags,
    * things.
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (prot == PROT_NONE ||
       (flags & (MAP_PRIVATE | MAP_FIXED | MAP_ANONYMOUS | MAP_DENYWRITE)) != 0)
     {
-      fdbg("Unsupported options, prot=%x flags=%04x\n", prot, flags);
+      ferr("ERROR: Unsupported options, prot=%x flags=%04x\n", prot, flags);
       set_errno(ENOSYS);
       return MAP_FAILED;
     }
 
   if (length == 0 || (flags & MAP_SHARED) == 0)
     {
-      fdbg("Invalid options, lengt=%d flags=%04x\n", length, flags);
+      ferr("ERROR: Invalid options, lengt=%d flags=%04x\n", length, flags);
       set_errno(EINVAL);
       return MAP_FAILED;
     }
@@ -163,7 +163,7 @@ FAR void *mmap(FAR void *start, size_t length, int prot, int flags,
 #ifdef CONFIG_FS_RAMMAP
       return rammap(fd, length, offset);
 #else
-      fdbg("ioctl(FIOC_MMAP) failed: %d\n", get_errno());
+      ferr("ERROR: ioctl(FIOC_MMAP) failed: %d\n", get_errno());
       return MAP_FAILED;
 #endif
     }
diff --git a/fs/mmap/fs_munmap.c b/fs/mmap/fs_munmap.c
index 12b084d85b7d443585b4041c28ea9c4c61d5bf8a..56737971362d223f1c8ef63c2a4037c268782ab6 100644
--- a/fs/mmap/fs_munmap.c
+++ b/fs/mmap/fs_munmap.c
@@ -115,7 +115,7 @@ int munmap(FAR void *start, size_t length)
   FAR void *newaddr;
   unsigned int offset;
   int ret;
-  int err;
+  int errcode;
 
   /* Find a region containing this start and length in the list of regions */
 
@@ -143,8 +143,8 @@ int munmap(FAR void *start, size_t length)
 
   if (!curr)
     {
-      fdbg("Region not found\n");
-      err = EINVAL;
+      ferr("ERROR: Region not found\n");
+      errcode = EINVAL;
       goto errout_with_semaphore;
     }
 
@@ -158,8 +158,8 @@ int munmap(FAR void *start, size_t length)
   offset = start - curr->addr;
   if (offset + length < curr->length)
     {
-      fdbg("Cannot umap without unmapping to the end\n");
-      err = ENOSYS;
+      ferr("ERROR: Cannot umap without unmapping to the end\n");
+      errcode = ENOSYS;
       goto errout_with_semaphore;
     }
 
@@ -205,7 +205,7 @@ int munmap(FAR void *start, size_t length)
 
 errout_with_semaphore:
   sem_post(&g_rammaps.exclsem);
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 }
 
diff --git a/fs/mmap/fs_rammap.c b/fs/mmap/fs_rammap.c
index 5f00032553bc95c27aafd64cfb1958cd48644116..5fe71478f5cc0e730f99fab975a5ff158fde607a 100644
--- a/fs/mmap/fs_rammap.c
+++ b/fs/mmap/fs_rammap.c
@@ -121,7 +121,7 @@ FAR void *rammap(int fd, size_t length, off_t offset)
   FAR uint8_t *rdbuffer;
   ssize_t nread;
   off_t fpos;
-  int err;
+  int errcode;
   int ret;
 
   /* There is a major design flaw that I have not yet thought of fix for:
@@ -142,8 +142,8 @@ FAR void *rammap(int fd, size_t length, off_t offset)
   alloc = (FAR uint8_t *)kumm_malloc(sizeof(struct fs_rammap_s) + length);
   if (!alloc)
     {
-      fdbg("Region allocation failed, length: %d\n", (int)length);
-      err = ENOMEM;
+      ferr("ERROR: Region allocation failed, length: %d\n", (int)length);
+      errcode = ENOMEM;
       goto errout;
     }
 
@@ -164,8 +164,8 @@ FAR void *rammap(int fd, size_t length, off_t offset)
        * the correct response.
        */
 
-      fdbg("Seek to position %d failed\n", (int)offset);
-      err = EINVAL;
+      ferr("ERROR: Seek to position %d failed\n", (int)offset);
+      errcode = EINVAL;
       goto errout_with_region;
     }
 
@@ -181,16 +181,17 @@ FAR void *rammap(int fd, size_t length, off_t offset)
            * signal.
            */
 
-          err = get_errno();
-          if (err != EINTR)
+          errcode = get_errno();
+          if (errcode != EINTR)
             {
               /* All other read errors are bad.  errno is already set.
                * (but maybe should be forced to EINVAL?).  NOTE that if
-               * FS DEBUG is enabled, then the following fdbg() macro will
+               * FS DEBUG is enabled, then the following ferr() macro will
                * destroy the errno value.
                */
 
-              fdbg("Read failed: offset=%d errno=%d\n", (int)offset, err);
+              ferr("ERROR: Read failed: offset=%d errno=%d\n",
+                   (int)offset, errcode);
 #ifdef CONFIG_DEBUG_FS
               goto errout_with_region;
 #else
@@ -234,7 +235,7 @@ FAR void *rammap(int fd, size_t length, off_t offset)
 errout_with_region:
   kumm_free(alloc);
 errout:
-  set_errno(err);
+  set_errno(errcode);
   return MAP_FAILED;
 
 errout_with_errno:
diff --git a/fs/mount/fs_automount.c b/fs/mount/fs_automount.c
index e0fea07881257c81b4184baa1630de3bdcfd6d18..e73ce50e2449cc893ad72281e37903a6da95f45e 100644
--- a/fs/mount/fs_automount.c
+++ b/fs/mount/fs_automount.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/mount/fs_automount.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -124,9 +124,7 @@ static int  automount_interrupt(FAR const struct automount_lower_s *lower,
 
 static int automount_findinode(FAR const char *path)
 {
-  FAR struct inode *node;
-  FAR const char *srchpath;
-  FAR const char *relpath;
+  struct inode_search_s desc;
   int ret;
 
   /* Make sure that we were given an absolute path */
@@ -139,12 +137,13 @@ static int automount_findinode(FAR const char *path)
 
   /* Find the inode */
 
-  srchpath = path;
-  node = inode_search(&srchpath, (FAR struct inode**)NULL,
-                      (FAR struct inode**)NULL, &relpath);
+  SETUP_SEARCH(&desc, path, false);
+
+  ret = inode_search(&desc);
+
   /* Did we find it? */
 
-  if (!node)
+  if (ret < 0)
     {
       /* No.. Not found */
 
@@ -153,7 +152,7 @@ static int automount_findinode(FAR const char *path)
 
   /* Yes.. is it a mount point? */
 
-  else if (INODE_IS_MOUNTPT(node))
+  else if (INODE_IS_MOUNTPT(desc.node))
     {
       /* Yes.. we found a mountpoint at this path */
 
@@ -161,7 +160,7 @@ static int automount_findinode(FAR const char *path)
     }
   else
     {
-      /* No.. then somethin is in the way */
+      /* No.. then something is in the way */
 
       ret = -ENOTDIR;
     }
@@ -169,6 +168,7 @@ static int automount_findinode(FAR const char *path)
   /* Relinquish our exclusive access to the inode try and return the result */
 
   inode_semgive();
+  RELEASE_SEARCH(&desc);
   return ret;
 }
 
@@ -191,7 +191,7 @@ static void automount_mount(FAR struct automounter_state_s *priv)
   FAR const struct automount_lower_s *lower = priv->lower;
   int ret;
 
-  fvdbg("Mounting %s\n", lower->mountpoint);
+  finfo("Mounting %s\n", lower->mountpoint);
 
   /* Check if the something is already mounted at the mountpoint. */
 
@@ -204,13 +204,13 @@ static void automount_mount(FAR struct automounter_state_s *priv)
        * try to unmount again because the mount might be stale.
        */
 
-      fdbg("WARNING: Mountpoint %s already exists\n", lower->mountpoint);
+      fwarn("WARNING: Mountpoint %s already exists\n", lower->mountpoint);
       ret = automount_unmount(priv);
       if (ret < 0)
         {
           /* We failed to unmount (again?).  Complain and abort. */
 
-          fdbg("ERROR: automount_unmount failed: %d\n", ret);
+          ferr("ERROR: automount_unmount failed: %d\n", ret);
           return;
         }
 
@@ -232,7 +232,7 @@ static void automount_mount(FAR struct automounter_state_s *priv)
           int errcode = get_errno();
           DEBUGASSERT(errcode > 0);
 
-          fdbg("ERROR: Mount failed: %d\n", errcode);
+          ferr("ERROR: Mount failed: %d\n", errcode);
           UNUSED(errcode);
           return;
         }
@@ -243,7 +243,7 @@ static void automount_mount(FAR struct automounter_state_s *priv)
       break;
 
     default:
-      fdbg("ERROR: automount_findinode failed: %d\n", ret);
+      ferr("ERROR: automount_findinode failed: %d\n", ret);
       break;
     }
 }
@@ -268,7 +268,7 @@ static int automount_unmount(FAR struct automounter_state_s *priv)
   FAR const struct automount_lower_s *lower = priv->lower;
   int ret;
 
-  fvdbg("Unmounting %s\n", lower->mountpoint);
+  finfo("Unmounting %s\n", lower->mountpoint);
 
   /* Check if the something is already mounted at the mountpoint. */
 
@@ -295,7 +295,7 @@ static int automount_unmount(FAR struct automounter_state_s *priv)
 
           if (errcode == EBUSY)
             {
-              fvdbg("WARNING: Volume is busy, try again later\n");
+              finfo("WARNING: Volume is busy, try again later\n");
 
               /* Start a timer to retry the umount2 after a delay */
 
@@ -306,7 +306,7 @@ static int automount_unmount(FAR struct automounter_state_s *priv)
                   errcode = get_errno();
                   DEBUGASSERT(errcode > 0);
 
-                  fdbg("ERROR: wd_start failed: %d\n", errcode);
+                  ferr("ERROR: wd_start failed: %d\n", errcode);
                   return -ret;
                 }
             }
@@ -315,7 +315,7 @@ static int automount_unmount(FAR struct automounter_state_s *priv)
 
           else
             {
-              fvdbg("ERROR: umount2 failed: %d\n", errcode);
+              ferr("ERROR: umount2 failed: %d\n", errcode);
               return -errcode;
             }
         }
@@ -332,7 +332,7 @@ static int automount_unmount(FAR struct automounter_state_s *priv)
       return OK;
 
     default:
-      fdbg("ERROR: automount_findinode failed: %d\n", ret);
+      ferr("ERROR: automount_findinode failed: %d\n", ret);
       return ret;
     }
 }
@@ -363,7 +363,7 @@ static void automount_timeout(int argc, uint32_t arg1, ...)
     (FAR struct automounter_state_s *)((uintptr_t)arg1);
   int ret;
 
-  fllvdbg("Timeout!\n");
+  finfo("Timeout!\n");
   DEBUGASSERT(argc == 1 && priv);
 
   /* Check the state of things.  This timeout at the interrupt level and
@@ -372,7 +372,7 @@ static void automount_timeout(int argc, uint32_t arg1, ...)
    * there should be no pending work.
    */
 
-  fllvdbg("inserted=%d\n", priv->inserted);
+  finfo("inserted=%d\n", priv->inserted);
   DEBUGASSERT(!priv->inserted && work_available(&priv->work));
 
   /* Queue work to occur immediately. */
@@ -382,7 +382,7 @@ static void automount_timeout(int argc, uint32_t arg1, ...)
     {
       /* NOTE: Currently, work_queue only returns success */
 
-      fdbg("ERROR: Failed to schedule work: %d\n", ret);
+      ferr("ERROR: Failed to schedule work: %d\n", ret);
     }
 }
 
@@ -463,7 +463,7 @@ static int automount_interrupt(FAR const struct automount_lower_s *lower,
 
   DEBUGASSERT(lower && priv && priv->lower == lower);
 
-  fllvdbg("inserted=%d\n", inserted);
+  finfo("inserted=%d\n", inserted);
 
   /* Cancel any pending work.  We could get called multiple times if, for
    * example there is bounce in the detection mechanism.  Work is performed
@@ -475,7 +475,7 @@ static int automount_interrupt(FAR const struct automount_lower_s *lower,
     {
       /* NOTE: Currently, work_cancel only returns success */
 
-      fdbg("ERROR: Failed to cancel work: %d\n", ret);
+      ferr("ERROR: Failed to cancel work: %d\n", ret);
     }
 
   /* Set the media insertion/removal state */
@@ -485,7 +485,7 @@ static int automount_interrupt(FAR const struct automount_lower_s *lower,
   /* Queue work to occur after a delay.  The delays performs debouncing:
    * If the insertion/removal detection logic has "chatter", then we may
    * receive this interrupt numerous times.  Each time, the previous work
-   * will be cancelled (above) and the new work will scheduled with the
+   * will be canceled (above) and the new work will scheduled with the
    * delay.  So the final mount operation will not be performed until the
    * insertion state is stable for that delay.
    */
@@ -496,7 +496,7 @@ static int automount_interrupt(FAR const struct automount_lower_s *lower,
     {
       /* NOTE: Currently, work_queue only returns success */
 
-      fdbg("ERROR: Failed to schedule work: %d\n", ret);
+      ferr("ERROR: Failed to schedule work: %d\n", ret);
     }
   else
     {
@@ -532,7 +532,7 @@ FAR void *automount_initialize(FAR const struct automount_lower_s *lower)
   FAR struct automounter_state_s *priv;
   int ret;
 
-  fvdbg("lower=%p\n", lower);
+  finfo("lower=%p\n", lower);
   DEBUGASSERT(lower);
 
   /* Allocate an auto-mounter state structure */
@@ -542,7 +542,7 @@ FAR void *automount_initialize(FAR const struct automount_lower_s *lower)
 
   if (!priv)
     {
-      fdbg("ERROR: Failed to allocate state structure\n");
+      ferr("ERROR: Failed to allocate state structure\n");
       return NULL;
     }
 
@@ -555,7 +555,7 @@ FAR void *automount_initialize(FAR const struct automount_lower_s *lower)
   priv->wdog  = wd_create();
   if (!priv->wdog)
     {
-      fdbg("ERROR: Failed to create a timer\n");
+      ferr("ERROR: Failed to create a timer\n");
       automount_uninitialize(priv);
       return NULL;
     }
@@ -574,7 +574,7 @@ FAR void *automount_initialize(FAR const struct automount_lower_s *lower)
     {
       /* NOTE: Currently, work_queue only returns success */
 
-      fdbg("ERROR: Failed to schedule work: %d\n", ret);
+      ferr("ERROR: Failed to schedule work: %d\n", ret);
     }
 
   /* Attach and enable automounter interrupts */
@@ -582,7 +582,7 @@ FAR void *automount_initialize(FAR const struct automount_lower_s *lower)
   ret = AUTOMOUNT_ATTACH(lower, automount_interrupt, priv);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to attach automount interrupt: %d\n", ret);
+      ferr("ERROR: Failed to attach automount interrupt: %d\n", ret);
       automount_uninitialize(priv);
       return NULL;
     }
diff --git a/fs/mount/fs_mount.c b/fs/mount/fs_mount.c
index f3ab72bc9335b69594300f6fc8214a4e771109e3..2fc9d7376fde13bbc8260978819b639e9bafeec1 100644
--- a/fs/mount/fs_mount.c
+++ b/fs/mount/fs_mount.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/mount/fs_mount.c
  *
- *   Copyright (C) 2007-2009, 2011-2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011-2013, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -234,6 +235,9 @@ int mount(FAR const char *source, FAR const char *target,
 #endif
   FAR struct inode *mountpt_inode;
   FAR const struct mountpt_operations *mops;
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  struct inode_search_s desc;
+#endif
   void *fshandle;
   int errcode;
   int ret;
@@ -256,7 +260,7 @@ int mount(FAR const char *source, FAR const char *target,
       ret = find_blockdriver(source, mountflags, &blkdrvr_inode);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to find block driver %s\n", source);
+          ferr("ERROR: Failed to find block driver %s\n", source);
           errcode = -ret;
           goto errout;
         }
@@ -270,7 +274,7 @@ int mount(FAR const char *source, FAR const char *target,
   else
 #endif /* NONBDFS_SUPPORT */
     {
-      fdbg("ERROR: Failed to find file system %s\n", filesystemtype);
+      ferr("ERROR: Failed to find file system %s\n", filesystemtype);
       errcode = ENODEV;
       goto errout;
     }
@@ -280,25 +284,29 @@ int mount(FAR const char *source, FAR const char *target,
 #ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
   /* Check if the inode already exists */
 
-  mountpt_inode = inode_find(target, NULL);
-  if (mountpt_inode != NULL)
+  SETUP_SEARCH(&desc, target, false);
+
+  ret = inode_find(&desc);
+  if (ret >= 0)
     {
-      /* Yes... Is is a directory node (i.e., not a driver or other special
-       * node.
+      /* Successfully found.  The reference count on the inode has been
+       * incremented.
+       */
+
+      mountpt_inode = desc.node;
+      DEBUGASSERT(mountpt_inode != NULL);
+
+      /* But is it a directory node (i.e., not a driver or other special
+       * node)?
        */
 
       if (INODE_IS_SPECIAL(mountpt_inode))
         {
-          fdbg("ERROR: target %s exists and is a special nodes\n", target);
+          ferr("ERROR: target %s exists and is a special node\n", target);
           errcode = -ENOTDIR;
+          inode_release(mountpt_inode);
           goto errout_with_semaphore;
         }
-
-      /* Successfully found.  The reference count on the inode has been
-       * incremented.
-       */
-
-      DEBUGASSERT(mountpt_inode->u.i_mops != NULL);
     }
   else
 #endif
@@ -321,7 +329,7 @@ int mount(FAR const char *source, FAR const char *target,
            *  -ENOMEM - Failed to allocate in-memory resources for the operation
            */
 
-          fdbg("ERROR: Failed to reserve inode for target %s\n", target);
+          ferr("ERROR: Failed to reserve inode for target %s\n", target);
           errcode = -ret;
           goto errout_with_semaphore;
         }
@@ -336,7 +344,7 @@ int mount(FAR const char *source, FAR const char *target,
     {
       /* The filesystem does not support the bind operation ??? */
 
-      fdbg("ERROR: Filesystem does not support bind\n");
+      ferr("ERROR: Filesystem does not support bind\n");
       errcode = EINVAL;
       goto errout_with_mountpt;
     }
@@ -366,7 +374,7 @@ int mount(FAR const char *source, FAR const char *target,
        * error.
        */
 
-      fdbg("ERROR: Bind method failed: %d\n", ret);
+      ferr("ERROR: Bind method failed: %d\n", ret);
 #ifdef BDFS_SUPPORT
 #ifdef NONBDFS_SUPPORT
       if (blkdrvr_inode)
@@ -405,6 +413,9 @@ int mount(FAR const char *source, FAR const char *target,
     }
 #endif
 
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  RELEASE_SEARCH(&desc);
+#endif
   return OK;
 
   /* A lot of goto's!  But they make the error handling much simpler */
@@ -423,10 +434,14 @@ errout_with_mountpt:
 #endif
 
   inode_release(mountpt_inode);
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  RELEASE_SEARCH(&desc);
+#endif
   goto errout;
 
 errout_with_semaphore:
   inode_semgive();
+
 #ifdef BDFS_SUPPORT
 #ifdef NONBDFS_SUPPORT
   if (blkdrvr_inode)
@@ -436,12 +451,16 @@ errout_with_semaphore:
     }
 #endif
 
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  RELEASE_SEARCH(&desc);
+#endif
+
 errout:
   set_errno(errcode);
   return ERROR;
 
 #else
-  fdbg("ERROR: No filesystems enabled\n");
+  ferr("ERROR: No filesystems enabled\n");
   set_errno(ENOSYS);
   return ERROR;
 #endif /* BDFS_SUPPORT || NONBDFS_SUPPORT */
diff --git a/fs/mount/fs_umount2.c b/fs/mount/fs_umount2.c
index e9154a499601465c61a3863ba1fda179f18724a9..e342ae2e16dfd06745113375caf577eb48ad9bf5 100644
--- a/fs/mount/fs_umount2.c
+++ b/fs/mount/fs_umount2.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/mount/fs_umount2.c
  *
- *   Copyright (C) 2007-2009, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 
@@ -73,6 +74,7 @@ int umount2(FAR const char *target, unsigned int flags)
 {
   FAR struct inode *mountpt_inode;
   FAR struct inode *blkdrvr_inode = NULL;
+  struct inode_search_s desc;
   int errcode = OK;
   int ret;
 
@@ -86,13 +88,20 @@ int umount2(FAR const char *target, unsigned int flags)
 
   /* Find the mountpt */
 
-  mountpt_inode = inode_find(target, NULL);
-  if (!mountpt_inode)
+  SETUP_SEARCH(&desc, target, false);
+
+  ret = inode_find(&desc);
+  if (ret < 0)
     {
       errcode = ENOENT;
-      goto errout;
+      goto errout_with_search;
     }
 
+  /* Get the search results */
+
+  mountpt_inode = desc.node;
+  DEBUGASSERT(mountpt_inode != NULL);
+
   /* Verify that the inode is a mountpoint */
 
   if (!INODE_IS_MOUNTPT(mountpt_inode))
@@ -189,18 +198,24 @@ int umount2(FAR const char *target, unsigned int flags)
       inode_release(blkdrvr_inode);
     }
 
+  RELEASE_SEARCH(&desc);
   return OK;
 
   /* A lot of goto's!  But they make the error handling much simpler */
 
 errout_with_semaphore:
   inode_semgive();
+
 errout_with_mountpt:
   inode_release(mountpt_inode);
   if (blkdrvr_inode)
     {
       inode_release(blkdrvr_inode);
     }
+
+errout_with_search:
+  RELEASE_SEARCH(&desc);
+
 errout:
   set_errno(errcode);
   return ERROR;
diff --git a/fs/mqueue/mq_open.c b/fs/mqueue/mq_open.c
index 23258f9338f83fb9b0a78cdb58cfd4462979bb4c..85474e0f3fe6fb9a45d2faf9c1bb6b2b7c1d9df7 100644
--- a/fs/mqueue/mq_open.c
+++ b/fs/mqueue/mq_open.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  *  fs/mqueue/mq_open.c
  *
- *   Copyright (C) 2007-2009, 2011, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011, 2014-2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,6 +39,7 @@
 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -88,8 +89,8 @@
 mqd_t mq_open(FAR const char *mq_name, int oflags, ...)
 {
   FAR struct inode *inode;
-  FAR const char *relpath = NULL;
   FAR struct mqueue_inode_s *msgq;
+  struct inode_search_s desc;
   char fullpath[MAX_MQUEUE_PATH];
   va_list ap;
   struct mq_attr *attr;
@@ -100,12 +101,21 @@ mqd_t mq_open(FAR const char *mq_name, int oflags, ...)
 
   /* Make sure that a non-NULL name is supplied */
 
-  if (!mq_name)
+  if (mq_name == NULL || *mq_name == '\0')
     {
       errcode = EINVAL;
       goto errout;
     }
 
+  /* Skip over any leading '/'.  All message queue paths are relative to
+   * CONFIG_FS_MQUEUE_MPATH.
+   */
+
+  while (*mq_name == '/')
+    {
+      mq_name++;
+    }
+
   /* Get the full path to the message queue */
 
   snprintf(fullpath, MAX_MQUEUE_PATH, CONFIG_FS_MQUEUE_MPATH "/%s", mq_name);
@@ -119,14 +129,21 @@ mqd_t mq_open(FAR const char *mq_name, int oflags, ...)
   sched_lock();
 
   /* Get the inode for this mqueue.  This should succeed if the message
-   * queue has already been created.  In this case, inode_finde() will
+   * queue has already been created.  In this case, inode_find() will
    * have incremented the reference count on the inode.
    */
 
-  inode = inode_find(fullpath, &relpath);
-  if (inode)
+  SETUP_SEARCH(&desc, fullpath, false);
+
+  ret = inode_find(&desc);
+  if (ret >= 0)
     {
-      /* It exists.  Verify that the inode is a message queue */
+      /* Something exists at this path.  Get the search results */
+
+      inode = desc.node;
+      DEBUGASSERT(inode != NULL);
+
+      /* Verify that the inode is a message queue */
 
       if (!INODE_IS_MQUEUE(inode))
         {
@@ -218,16 +235,21 @@ mqd_t mq_open(FAR const char *mq_name, int oflags, ...)
       inode->i_crefs    = 1;
     }
 
+  RELEASE_SEARCH(&desc);
   sched_unlock();
   return mqdes;
 
 errout_with_msgq:
   mq_msgqfree(msgq);
   inode->u.i_mqueue = NULL;
+
 errout_with_inode:
   inode_release(inode);
+
 errout_with_lock:
+  RELEASE_SEARCH(&desc);
   sched_unlock();
+
 errout:
   set_errno(errcode);
   return (mqd_t)ERROR;
diff --git a/fs/mqueue/mq_unlink.c b/fs/mqueue/mq_unlink.c
index 85360f797d7ac6634a0ee642195edcc5c5ff46d9..9705a0ef8bad8998890e0772e6a4fc22bae6fc4a 100644
--- a/fs/mqueue/mq_unlink.c
+++ b/fs/mqueue/mq_unlink.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/mqueue/mq_unlink.c
  *
- *   Copyright (C) 2007, 2009, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2009, 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,6 +39,7 @@
 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -75,7 +76,7 @@
 int mq_unlink(FAR const char *mq_name)
 {
   FAR struct inode *inode;
-  FAR const char *relpath = NULL;
+  struct inode_search_s desc;
   char fullpath[MAX_MQUEUE_PATH];
   int errcode;
   int ret;
@@ -86,16 +87,23 @@ int mq_unlink(FAR const char *mq_name)
 
   /* Get the inode for this message queue. */
 
+  SETUP_SEARCH(&desc, fullpath, false);
+
   sched_lock();
-  inode = inode_find(fullpath, &relpath);
-  if (!inode)
+  ret = inode_find(&desc);
+  if (ret < 0)
     {
       /* There is no inode that includes in this path */
 
-      errcode = ENOENT;
-      goto errout;
+      errcode = -ret;
+      goto errout_with_search;
     }
 
+  /* Get the search results */
+
+  inode = desc.node;
+  DEBUGASSERT(inode != NULL);
+
   /* Verify that what we found is, indeed, a message queue */
 
   if (!INODE_IS_MQUEUE(inode))
@@ -140,14 +148,18 @@ int mq_unlink(FAR const char *mq_name)
 
   inode_semgive();
   mq_inode_release(inode);
+  RELEASE_SEARCH(&desc);
   sched_unlock();
   return OK;
 
 errout_with_semaphore:
   inode_semgive();
+
 errout_with_inode:
   inode_release(inode);
-errout:
+
+errout_with_search:
+  RELEASE_SEARCH(&desc);
   set_errno(errcode);
   sched_unlock();
   return ERROR;
diff --git a/fs/nfs/nfs.h b/fs/nfs/nfs.h
index f0db29389cfce2b52630087118ffa80caa8584aa..2001e2b6b51245b8a2c5aeb1e9feffe19d93c752 100644
--- a/fs/nfs/nfs.h
+++ b/fs/nfs/nfs.h
@@ -54,7 +54,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-#define NFS_TICKINTVL      MSEC_PER_TICK  /* Smallest that we can get */
 #define NFS_TICKS          1              /* Number of system ticks */
 #define NFS_HZ             CLOCKS_PER_SEC /* Ticks/sec */
 #define NFS_TIMEO          (1 * NFS_HZ)   /* Default timeout = 1 second */
diff --git a/fs/nfs/nfs_node.h b/fs/nfs/nfs_node.h
index 408bd1993e951b6d564fc28ef60815f91678bfa0..cb5925f3b7e0f7d434ffc61dd208ff591deb109c 100644
--- a/fs/nfs/nfs_node.h
+++ b/fs/nfs/nfs_node.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/nfs/nfs_node.h
  *
- *   Copyright (C) 2012-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012-2013, 2017 Gregory Nutt. All rights reserved.
  *   Copyright (C) 2012 Jose Pablo Rojas Vargas. All rights reserved.
  *   Author: Jose Pablo Rojas Vargas 
  *           Gregory Nutt 
@@ -74,10 +74,11 @@ struct nfsnode
   uint8_t            n_type;        /* File type */
   uint8_t            n_fhsize;      /* Size in bytes of the file handle */
   uint8_t            n_flags;       /* Node flags */
-  struct timespec    n_mtime;       /* File modification time (see NOTE) */
-  time_t             n_ctime;       /* File creation time (see NOTE) */
+  uint16_t           n_mode;        /* File mode for fstat() */
+  time_t             n_mtime;       /* File modification time */
+  time_t             n_ctime;       /* File creation time */
   nfsfh_t            n_fhandle;     /* NFS File Handle */
-  uint64_t           n_size;        /* Current size of file (see NOTE) */
+  uint64_t           n_size;        /* Current size of file */
 };
 
 #endif /* __FS_NFS_NFS_NODE_H */
diff --git a/fs/nfs/nfs_util.c b/fs/nfs/nfs_util.c
index 6e5d8e45263d21f01dbcd8be91985486b2b39b13..228e077b282f7976a13849e516a3e7540da99f9d 100644
--- a/fs/nfs/nfs_util.c
+++ b/fs/nfs/nfs_util.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/nfs/nfs_util.c
  *
- *   Copyright (C) 2012-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012-2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -45,6 +45,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -103,7 +104,7 @@ static inline int nfs_pathsegment(FAR const char **path, FAR char *buffer,
         }
       else if (nbytes >= NAME_MAX)
         {
-          fdbg("File name segment is too long: %d\n", *path);
+          ferr("ERROR: File name segment is too long: %d\n", *path);
           return EFBIG;
         }
       else
@@ -205,7 +206,7 @@ tryagain:
                           request, reqlen, response, resplen);
   if (error != 0)
     {
-      fdbg("ERROR: rpcclnt_request failed: %d\n", error);
+      ferr("ERROR: rpcclnt_request failed: %d\n", error);
       return error;
     }
 
@@ -237,11 +238,11 @@ tryagain:
           goto tryagain;
         }
 
-      fdbg("ERROR: NFS error %d from server\n", error);
+      ferr("ERROR: NFS error %d from server\n", error);
       return error;
     }
 
-  fvdbg("NFS_SUCCESS\n");
+  finfo("NFS_SUCCESS\n");
   return OK;
 }
 
@@ -277,7 +278,7 @@ int nfs_lookup(struct nfsmount *nmp, FAR const char *filename,
   namelen = strlen(filename);
   if (namelen > NAME_MAX)
     {
-      fdbg("Length of the string is too big: %d\n", namelen);
+      ferr("ERROR: Length of the string is too long: %d\n", namelen);
       return E2BIG;
     }
 
@@ -312,7 +313,7 @@ int nfs_lookup(struct nfsmount *nmp, FAR const char *filename,
 
   if (error)
     {
-      fdbg("ERROR: nfs_request failed: %d\n", error);
+      ferr("ERROR: nfs_request failed: %d\n", error);
       return error;
     }
 
@@ -329,7 +330,7 @@ int nfs_lookup(struct nfsmount *nmp, FAR const char *filename,
   value = fxdr_unsigned(uint32_t, value);
   if (value > NFSX_V3FHMAX)
     {
-      fdbg("ERROR: Bad file handle length: %d\n", value);
+      ferr("ERROR: Bad file handle length: %d\n", value);
       return EIO;
     }
 
@@ -427,7 +428,7 @@ int nfs_findnode(struct nfsmount *nmp, FAR const char *relpath,
         {
           /* The filename segment contains is too long. */
 
-          fdbg("nfs_pathsegment of \"%s\" failed after \"%s\": %d\n",
+          ferr("ERROR: nfs_pathsegment of \"%s\" failed after \"%s\": %d\n",
                relpath, buffer, error);
           return error;
         }
@@ -437,7 +438,7 @@ int nfs_findnode(struct nfsmount *nmp, FAR const char *relpath,
       error = nfs_lookup(nmp, buffer, fhandle, obj_attributes, dir_attributes);
       if (error != OK)
         {
-          fdbg("nfs_lookup of \"%s\" failed at \"%s\": %d\n",
+          ferr("ERROR: nfs_lookup of \"%s\" failed at \"%s\": %d\n",
                 relpath, buffer, error);
           return error;
         }
@@ -466,7 +467,7 @@ int nfs_findnode(struct nfsmount *nmp, FAR const char *relpath,
         {
           /* Ooops.. we found something else */
 
-          fdbg("ERROR: Intermediate segment \"%s\" of \'%s\" is not a directory\n",
+          ferr("ERROR: Intermediate segment \"%s\" of \'%s\" is not a directory\n",
                buffer, path);
           return ENOTDIR;
         }
@@ -521,7 +522,7 @@ int nfs_finddir(struct nfsmount *nmp, FAR const char *relpath,
         {
           /* The filename segment contains is too long. */
 
-          fdbg("nfs_pathsegment of \"%s\" failed after \"%s\": %d\n",
+          ferr("ERROR: nfs_pathsegment of \"%s\" failed after \"%s\": %d\n",
                relpath, filename, error);
           return error;
         }
@@ -545,7 +546,7 @@ int nfs_finddir(struct nfsmount *nmp, FAR const char *relpath,
       error = nfs_lookup(nmp, filename, fhandle, attributes, NULL);
       if (error != OK)
         {
-          fdbg("nfs_lookup of \"%s\" failed at \"%s\": %d\n",
+          ferr("ERROR: fs_lookup of \"%s\" failed at \"%s\": %d\n",
                 relpath, filename, error);
           return error;
         }
@@ -557,7 +558,7 @@ int nfs_finddir(struct nfsmount *nmp, FAR const char *relpath,
         {
           /* Ooops.. we found something else */
 
-          fdbg("ERROR: Intermediate segment \"%s\" of \'%s\" is not a directory\n",
+          ferr("ERROR: Intermediate segment \"%s\" of \'%s\" is not a directory\n",
                filename, path);
           return ENOTDIR;
         }
@@ -577,10 +578,17 @@ int nfs_finddir(struct nfsmount *nmp, FAR const char *relpath,
 
 void nfs_attrupdate(FAR struct nfsnode *np, FAR struct nfs_fattr *attributes)
 {
-  /* Save a few of the files attribute values in file structur (host order) */
+  struct timespec ts;
 
-  np->n_type   = fxdr_unsigned(uint32_t, attributes->fa_type);
+  /* Save a few of the files attribute values in file structure (host order) */
+
+  np->n_type   = fxdr_unsigned(uint8_t, attributes->fa_type);
+  np->n_mode   = fxdr_unsigned(uint16_t, attributes->fa_mode);
   np->n_size   = fxdr_hyper(&attributes->fa_size);
-  fxdr_nfsv3time(&attributes->fa_mtime, &np->n_mtime)
-  np->n_ctime  = fxdr_hyper(&attributes->fa_ctime);
+
+  fxdr_nfsv3time(&attributes->fa_mtime, &ts);
+  np->n_mtime  = ts.tv_sec;
+
+  fxdr_nfsv3time(&attributes->fa_ctime, &ts);
+  np->n_ctime  = ts.tv_sec;
 }
diff --git a/fs/nfs/nfs_vfsops.c b/fs/nfs/nfs_vfsops.c
index 6d71a044572a47d11112124c8518d0b0c100d8aa..2051f97c58efe6144acbf218127fa7390b1f81f8 100644
--- a/fs/nfs/nfs_vfsops.c
+++ b/fs/nfs/nfs_vfsops.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/nfs/nfs_vfsops.c
  *
- *   Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012-2013, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Copyright (C) 2012 Jose Pablo Rojas Vargas. All rights reserved.
  *   Author: Jose Pablo Rojas Vargas 
  *           Gregory Nutt 
@@ -47,10 +47,10 @@
 
 #include 
 
+#include 
 #include 
 #include 
 #include 
-#include 
 
 #include 
 #include 
@@ -103,6 +103,22 @@
 #  error "Length of cookie verify in fs_dirent_s is incorrect"
 #endif
 
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* Use to pass file information to nfs_stat_common() */
+
+struct nfs_statinfo_s
+{
+  uint16_t ns_mode;    /* File access mode */
+  uint8_t  ns_type;    /* File type */
+  uint64_t ns_size;    /* File size */
+  time_t   ns_atime;   /* Time of last access */
+  time_t   ns_mtime;   /* Time of last modification */
+  time_t   ns_ctime;   /* Time of last status change */
+};
+
 /****************************************************************************
  * Public Data
  ****************************************************************************/
@@ -131,6 +147,7 @@ static ssize_t nfs_read(FAR struct file *filep, char *buffer, size_t buflen);
 static ssize_t nfs_write(FAR struct file *filep, const char *buffer,
                    size_t buflen);
 static int     nfs_dup(FAR const struct file *oldp, FAR struct file *newp);
+static int     nfs_fstat(FAR const struct file *filep, FAR struct stat *buf);
 static int     nfs_opendir(struct inode *mountpt, const char *relpath,
                    struct fs_dirent_s *dir);
 static int     nfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir);
@@ -142,15 +159,20 @@ static int     nfs_bind(FAR struct inode *blkdriver, const void *data,
                    void **handle);
 static int     nfs_unbind(FAR void *handle, FAR struct inode **blkdriver,
                    unsigned int flags);
-static int     nfs_statfs(struct inode *mountpt, struct statfs *buf);
-static int     nfs_remove(struct inode *mountpt, const char *relpath);
-static int     nfs_mkdir(struct inode *mountpt, const char *relpath,
-                   mode_t mode);
-static int     nfs_rmdir(struct inode *mountpt, const char *relpath);
-static int     nfs_rename(struct inode *mountpt, const char *oldrelpath,
-                   const char *newrelpath);
-static int     nfs_stat(struct inode *mountpt, const char *relpath,
-                   struct stat *buf);
+static int     nfs_statfs(FAR struct inode *mountpt,
+                   FAR struct statfs *buf);
+static int     nfs_remove(FAR struct inode *mountpt,
+                   FAR const char *relpath);
+static int     nfs_mkdir(FAR struct inode *mountpt,
+                   FAR const char *relpath, mode_t mode);
+static int     nfs_rmdir(FAR struct inode *mountpt,
+                   FAR const char *relpath);
+static int     nfs_rename(FAR struct inode *mountpt,
+                   FAR const char *oldrelpath, FAR const char *newrelpath);
+static void    nfs_stat_common(FAR struct nfs_statinfo_s *info,
+                   FAR struct stat *buf);
+static int     nfs_stat(struct inode *mountpt, FAR const char *relpath,
+                   FAR struct stat *buf);
 
 /****************************************************************************
  * Public Data
@@ -168,6 +190,7 @@ const struct mountpt_operations nfs_operations =
 
   NULL,                         /* sync */
   nfs_dup,                      /* dup */
+  nfs_fstat,                    /* fstat */
 
   nfs_opendir,                  /* opendir */
   NULL,                         /* closedir */
@@ -218,7 +241,7 @@ static int nfs_filecreate(FAR struct nfsmount *nmp, struct nfsnode *np,
   error = nfs_finddir(nmp, relpath, &fhandle, &fattr, filename);
   if (error != OK)
     {
-      fdbg("ERROR: nfs_finddir returned: %d\n", error);
+      ferr("ERROR: nfs_finddir returned: %d\n", error);
       return error;
     }
 
@@ -340,7 +363,7 @@ static int nfs_filecreate(FAR struct nfsmount *nmp, struct nfsnode *np,
       tmp = *ptr++;  /* handle_follows */
       if (!tmp)
         {
-          fdbg("ERROR: no file handle follows\n");
+          ferr("ERROR: no file handle follows\n");
           return EINVAL;
         }
 
@@ -357,7 +380,7 @@ static int nfs_filecreate(FAR struct nfsmount *nmp, struct nfsnode *np,
       tmp = *ptr;  /* handle_follows */
       if (!tmp)
         {
-          fdbg("WARNING: no file attributes\n");
+          fwarn("WARNING: no file attributes\n");
         }
       else
         {
@@ -390,7 +413,7 @@ static int nfs_filetruncate(FAR struct nfsmount *nmp, struct nfsnode *np)
   int           reqlen;
   int           error;
 
-  fvdbg("Truncating file\n");
+  finfo("Truncating file\n");
 
   /* Create the SETATTR RPC call arguments */
 
@@ -427,7 +450,7 @@ static int nfs_filetruncate(FAR struct nfsmount *nmp, struct nfsnode *np)
                       (FAR void *)nmp->nm_iobuffer, nmp->nm_buflen);
   if (error != OK)
     {
-      fdbg("ERROR: nfs_request failed: %d\n", error);
+      ferr("ERROR: nfs_request failed: %d\n", error);
       return error;
     }
 
@@ -462,7 +485,7 @@ static int nfs_fileopen(FAR struct nfsmount *nmp, struct nfsnode *np,
   error = nfs_findnode(nmp, relpath, &fhandle, &fattr, NULL);
   if (error != OK)
     {
-      fdbg("ERROR: nfs_findnode returned: %d\n", error);
+      ferr("ERROR: nfs_findnode returned: %d\n", error);
       return error;
     }
 
@@ -473,7 +496,7 @@ static int nfs_fileopen(FAR struct nfsmount *nmp, struct nfsnode *np,
     {
       /* Exit with EISDIR if we attempt to open a directory */
 
-      fdbg("ERROR: Path is a directory\n");
+      ferr("ERROR: Path is a directory\n");
       return EISDIR;
     }
 
@@ -489,7 +512,7 @@ static int nfs_fileopen(FAR struct nfsmount *nmp, struct nfsnode *np,
       tmp = fxdr_unsigned(uint32_t, fattr.fa_mode);
       if ((tmp & (NFSMODE_IWOTH | NFSMODE_IWGRP | NFSMODE_IWUSR)) == 0)
         {
-          fdbg("ERROR: File is read-only: %08x\n", tmp);
+          ferr("ERROR: File is read-only: %08x\n", tmp);
           return EACCES;
         }
     }
@@ -500,7 +523,7 @@ static int nfs_fileopen(FAR struct nfsmount *nmp, struct nfsnode *np,
     {
       /* Already exists -- can't create it exclusively */
 
-      fdbg("ERROR: File exists\n");
+      ferr("ERROR: File exists\n");
       return EEXIST;
     }
 
@@ -567,7 +590,7 @@ static int nfs_open(FAR struct file *filep, FAR const char *relpath,
   np = (struct nfsnode *)kmm_zalloc(sizeof(struct nfsnode));
   if (!np)
     {
-      fdbg("ERROR: Failed to allocate private data\n");
+      ferr("ERROR: Failed to allocate private data\n");
       return -ENOMEM;
     }
 
@@ -577,7 +600,7 @@ static int nfs_open(FAR struct file *filep, FAR const char *relpath,
   error = nfs_checkmount(nmp);
   if (error != OK)
     {
-      fdbg("ERROR: nfs_checkmount failed: %d\n", error);
+      ferr("ERROR: nfs_checkmount failed: %d\n", error);
       goto errout_with_semaphore;
     }
 
@@ -594,7 +617,7 @@ static int nfs_open(FAR struct file *filep, FAR const char *relpath,
 
       if (error != ENOENT)
         {
-          fdbg("ERROR: nfs_findnode failed: %d\n", error);
+          ferr("ERROR: nfs_findnode failed: %d\n", error);
           goto errout_with_semaphore;
         }
 
@@ -609,7 +632,7 @@ static int nfs_open(FAR struct file *filep, FAR const char *relpath,
            * to create it.
            */
 
-          fdbg("ERROR: File does not exist\n");
+          ferr("ERROR: File does not exist\n");
            error = ENOENT;
           goto errout_with_semaphore;
         }
@@ -619,7 +642,7 @@ static int nfs_open(FAR struct file *filep, FAR const char *relpath,
       error = nfs_filecreate(nmp, np, relpath, mode);
       if (error != OK)
         {
-          fdbg("ERROR: nfs_filecreate failed: %d\n", error);
+          ferr("ERROR: nfs_filecreate failed: %d\n", error);
           goto errout_with_semaphore;
         }
     }
@@ -771,7 +794,7 @@ static ssize_t nfs_read(FAR struct file *filep, char *buffer, size_t buflen)
   FAR uint32_t              *ptr;
   int                        error = 0;
 
-  fvdbg("Read %d bytes from offset %d\n", buflen, filep->f_pos);
+  finfo("Read %d bytes from offset %d\n", buflen, filep->f_pos);
 
   /* Sanity checks */
 
@@ -790,7 +813,7 @@ static ssize_t nfs_read(FAR struct file *filep, char *buffer, size_t buflen)
   error = nfs_checkmount(nmp);
   if (error != OK)
     {
-      fdbg("nfs_checkmount failed: %d\n", error);
+      ferr("ERROR: nfs_checkmount failed: %d\n", error);
       goto errout_with_semaphore;
     }
 
@@ -802,7 +825,7 @@ static ssize_t nfs_read(FAR struct file *filep, char *buffer, size_t buflen)
   if (buflen > tmp)
     {
       buflen = tmp;
-      fvdbg("Read size truncated to %d\n", buflen);
+      finfo("Read size truncated to %d\n", buflen);
     }
 
   /* Now loop until we fill the user buffer (or hit the end of the file) */
@@ -852,14 +875,14 @@ static ssize_t nfs_read(FAR struct file *filep, char *buffer, size_t buflen)
 
       /* Perform the read */
 
-      fvdbg("Reading %d bytes\n", readsize);
+      finfo("Reading %d bytes\n", readsize);
       nfs_statistics(NFSPROC_READ);
       error = nfs_request(nmp, NFSPROC_READ,
                           (FAR void *)&nmp->nm_msgbuffer.read, reqlen,
                           (FAR void *)nmp->nm_iobuffer, nmp->nm_buflen);
       if (error)
         {
-          fdbg("ERROR: nfs_request failed: %d\n", error);
+          ferr("ERROR: nfs_request failed: %d\n", error);
           goto errout_with_semaphore;
         }
 
@@ -914,7 +937,7 @@ static ssize_t nfs_read(FAR struct file *filep, char *buffer, size_t buflen)
         }
     }
 
-  fvdbg("Read %d bytes\n", bytesread);
+  finfo("Read %d bytes\n", bytesread);
   nfs_semgive(nmp);
   return bytesread;
 
@@ -947,7 +970,7 @@ static ssize_t nfs_write(FAR struct file *filep, const char *buffer,
   int                    committed = NFSV3WRITE_FILESYNC;
   int                    error;
 
-  fvdbg("Write %d bytes to offset %d\n", buflen, filep->f_pos);
+  finfo("Write %d bytes to offset %d\n", buflen, filep->f_pos);
 
   /* Sanity checks */
 
@@ -966,7 +989,7 @@ static ssize_t nfs_write(FAR struct file *filep, const char *buffer,
   error = nfs_checkmount(nmp);
   if (error != OK)
     {
-      fdbg("nfs_checkmount failed: %d\n", error);
+      ferr("ERROR: nfs_checkmount failed: %d\n", error);
       goto errout_with_semaphore;
     }
 
@@ -1043,7 +1066,7 @@ static ssize_t nfs_write(FAR struct file *filep, const char *buffer,
                           (FAR void *)&nmp->nm_msgbuffer.write, sizeof(struct rpc_reply_write));
       if (error)
         {
-          fdbg("ERROR: nfs_request failed: %d\n", error);
+          ferr("ERROR: nfs_request failed: %d\n", error);
           goto errout_with_semaphore;
         }
 
@@ -1114,7 +1137,7 @@ errout_with_semaphore:
 }
 
 /****************************************************************************
- * Name: binfs_dup
+ * Name: nfs_dup
  *
  * Description:
  *   Duplicate open file data in the new file structure.
@@ -1127,7 +1150,7 @@ static int nfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   FAR struct nfsnode *np;
   int error;
 
-  fvdbg("Dup %p->%p\n", oldp, newp);
+  finfo("Dup %p->%p\n", oldp, newp);
 
   /* Sanity checks */
 
@@ -1146,7 +1169,7 @@ static int nfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   error = nfs_checkmount(nmp);
   if (error != OK)
     {
-      fdbg("ERROR: nfs_checkmount failed: %d\n", error);
+      ferr("ERROR: nfs_checkmount failed: %d\n", error);
       nfs_semgive(nmp);
       return -error;
     }
@@ -1173,6 +1196,80 @@ static int nfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   return OK;
 }
 
+/****************************************************************************
+ * Name: nfs_fstat
+ *
+ * Description:
+ *   Obtain information about an open file associated with the file
+ *   descriptor 'fd', and will write it to the area pointed to by 'buf'.
+ *
+ ****************************************************************************/
+
+static int nfs_fstat(FAR const struct file *filep, FAR struct stat *buf)
+{
+  FAR struct nfsmount *nmp;
+  FAR struct nfsnode *np;
+  struct nfs_statinfo_s info;
+  struct timespec ts;
+  int error;
+  int ret;
+
+  finfo("Buf %p\n", buf);
+  DEBUGASSERT(filep != NULL && buf != NULL);
+
+  /* Recover our private data from the struct file instance */
+
+  DEBUGASSERT(filep->f_priv != NULL && filep->f_inode != NULL);
+  np  = (FAR struct nfsnode *)filep->f_priv;
+
+  nmp = (FAR struct nfsmount *)filep->f_inode->i_private;
+  DEBUGASSERT(nmp != NULL);
+
+  /* Make sure that the mount is still healthy */
+
+  nfs_semtake(nmp);
+  error = nfs_checkmount(nmp);
+  if (error != OK)
+    {
+      ferr("ERROR: nfs_checkmount failed: %d\n", error);
+      goto errout_with_semaphore;
+    }
+
+  /* Extract the file mode, file type, and file size from the nfsnode
+   * structure.
+   */
+
+  info.ns_mode  = np->n_mode;
+  info.ns_type  = np->n_type;
+  info.ns_size  = (off_t)np->n_size;
+
+  /* Extract time values as type time_t in units of seconds. */
+
+  info.ns_mtime = np->n_mtime;
+  info.ns_ctime = np->n_ctime;
+
+  /* Use the current time for the time of last access. */
+
+  ret = clock_gettime(CLOCK_REALTIME, &ts);
+  if (ret < 0)
+    {
+      error = -get_errno();
+      ferr("ERROR: clock_gettime failed: %d\n", error);
+      goto errout_with_semaphore;
+    }
+
+  info.ns_atime = ts.tv_sec;
+
+  /* Then update the stat buffer with this information */
+
+  nfs_stat_common(&info, buf);
+  ret = OK;
+
+errout_with_semaphore:
+  nfs_semgive(nmp);
+  return -error;
+}
+
 /****************************************************************************
  * Name: nfs_opendir
  *
@@ -1193,7 +1290,7 @@ static int nfs_opendir(struct inode *mountpt, const char *relpath,
   uint32_t objtype;
   int error;
 
-  fvdbg("relpath: \"%s\"\n", relpath ? relpath : "NULL");
+  finfo("relpath: \"%s\"\n", relpath ? relpath : "NULL");
 
   /* Sanity checks */
 
@@ -1213,7 +1310,7 @@ static int nfs_opendir(struct inode *mountpt, const char *relpath,
   error = nfs_checkmount(nmp);
   if (error != OK)
     {
-      fdbg("ERROR: nfs_checkmount failed: %d\n", error);
+      ferr("ERROR: nfs_checkmount failed: %d\n", error);
       goto errout_with_semaphore;
     }
 
@@ -1222,7 +1319,7 @@ static int nfs_opendir(struct inode *mountpt, const char *relpath,
   error = nfs_findnode(nmp, relpath, &fhandle, &obj_attributes, NULL);
   if (error != OK)
     {
-      fdbg("ERROR: nfs_findnode failed: %d\n", error);
+      ferr("ERROR: nfs_findnode failed: %d\n", error);
       goto errout_with_semaphore;
     }
 
@@ -1231,7 +1328,7 @@ static int nfs_opendir(struct inode *mountpt, const char *relpath,
   objtype = fxdr_unsigned(uint32_t, obj_attributes.fa_type);
   if (objtype != NFDIR)
     {
-      fdbg("ERROR:  Not a directory, type=%d\n", objtype);
+      ferr("ERROR:  Not a directory, type=%d\n", objtype);
       error = ENOTDIR;
       goto errout_with_semaphore;
     }
@@ -1273,7 +1370,7 @@ static int nfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir)
   int reqlen;
   int error = 0;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* Sanity checks */
 
@@ -1289,7 +1386,7 @@ static int nfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir)
   error = nfs_checkmount(nmp);
   if (error != OK)
     {
-      fdbg("ERROR: nfs_checkmount failed: %d\n", error);
+      ferr("ERROR: nfs_checkmount failed: %d\n", error);
       goto errout_with_semaphore;
     }
 
@@ -1333,7 +1430,7 @@ static int nfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir)
                       (FAR void *)nmp->nm_iobuffer, nmp->nm_buflen);
   if (error != OK)
     {
-      fdbg("ERROR: nfs_request failed: %d\n", error);
+      ferr("ERROR: nfs_request failed: %d\n", error);
       goto errout_with_semaphore;
     }
 
@@ -1378,7 +1475,7 @@ static int nfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir)
       tmp = *ptr++;
       if (tmp != 0)
         {
-          fvdbg("End of directory\n");
+          finfo("End of directory\n");
           error = ENOENT;
         }
 
@@ -1388,7 +1485,7 @@ static int nfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir)
 
        else
          {
-           fvdbg("No data but not end of directory???\n");
+           finfo("No data but not end of directory???\n");
            error = EAGAIN;
         }
 
@@ -1437,7 +1534,7 @@ static int nfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir)
 
   memcpy(dir->fd_dir.d_name, name, length);
   dir->fd_dir.d_name[length] = '\0';
-  fvdbg("name: \"%s\"\n", dir->fd_dir.d_name);
+  finfo("name: \"%s\"\n", dir->fd_dir.d_name);
 
   /* Get the file attributes associated with this name and return
    * the file type.
@@ -1449,7 +1546,7 @@ static int nfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir)
   error = nfs_lookup(nmp, dir->fd_dir.d_name, &fhandle, &obj_attributes, NULL);
   if (error != OK)
     {
-      fdbg("nfs_lookup failed: %d\n", error);
+      ferr("ERROR: nfs_lookup failed: %d\n", error);
       goto errout_with_semaphore;
     }
 
@@ -1481,7 +1578,7 @@ static int nfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir)
       dir->fd_dir.d_type = DTYPE_CHR;
       break;
     }
-  fvdbg("type: %d->%d\n", (int)tmp, dir->fd_dir.d_type);
+  finfo("type: %d->%d\n", (int)tmp, dir->fd_dir.d_type);
 
 errout_with_semaphore:
   nfs_semgive(nmp);
@@ -1502,7 +1599,7 @@ errout_with_semaphore:
 
 static int nfs_rewinddir(FAR struct inode *mountpt, FAR struct fs_dirent_s *dir)
 {
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* Sanity checks */
 
@@ -1574,7 +1671,7 @@ static void nfs_decode_args(FAR struct nfs_mount_parameters *nprmt,
     }
   else
     {
-      fdbg("ERROR: Only SOCK_DRAM is supported\n");
+      ferr("ERROR: Only SOCK_DRAM is supported\n");
       maxio = NFS_MAXDATA;
     }
 
@@ -1726,7 +1823,7 @@ static int nfs_bind(FAR struct inode *blkdriver, FAR const void *data,
   nmp = (FAR struct nfsmount *)kmm_zalloc(SIZEOF_nfsmount(buflen));
   if (!nmp)
     {
-      fdbg("ERROR: Failed to allocate mountpoint structure\n");
+      ferr("ERROR: Failed to allocate mountpoint structure\n");
       return ENOMEM;
     }
 
@@ -1776,11 +1873,11 @@ static int nfs_bind(FAR struct inode *blkdriver, FAR const void *data,
       rpc = (struct rpcclnt *)kmm_zalloc(sizeof(struct rpcclnt));
       if (!rpc)
         {
-          fdbg("ERROR: Failed to allocate rpc structure\n");
+          ferr("ERROR: Failed to allocate rpc structure\n");
           return ENOMEM;
         }
 
-      fvdbg("Connecting\n");
+      finfo("Connecting\n");
 
       /* Translate nfsmnt flags -> rpcclnt flags */
 
@@ -1794,7 +1891,7 @@ static int nfs_bind(FAR struct inode *blkdriver, FAR const void *data,
       error = rpcclnt_connect(nmp->nm_rpcclnt);
       if (error != OK)
         {
-          fdbg("ERROR: nfs_connect failed: %d\n", error);
+          ferr("ERROR: nfs_connect failed: %d\n", error);
           goto bad;
         }
     }
@@ -1813,7 +1910,7 @@ static int nfs_bind(FAR struct inode *blkdriver, FAR const void *data,
                       (FAR void *)&resok, sizeof(struct rpc_reply_getattr));
   if (error)
     {
-      fdbg("ERROR: nfs_request failed: %d\n", error);
+      ferr("ERROR: nfs_request failed: %d\n", error);
       goto bad;
     }
 
@@ -1826,7 +1923,7 @@ static int nfs_bind(FAR struct inode *blkdriver, FAR const void *data,
   *handle = (FAR void *)nmp;
   nfs_semgive(nmp);
 
-  fvdbg("Successfully mounted\n");
+  finfo("Successfully mounted\n");
   return OK;
 
 bad:
@@ -1872,7 +1969,7 @@ static int nfs_unbind(FAR void *handle, FAR struct inode **blkdriver,
   FAR struct nfsmount *nmp = (FAR struct nfsmount *)handle;
   int error;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
   DEBUGASSERT(nmp);
 
   /* Get exclusive access to the mount structure */
@@ -1887,7 +1984,7 @@ static int nfs_unbind(FAR void *handle, FAR struct inode **blkdriver,
 
   if (nmp->nm_head != NULL)
     {
-      fdbg("ERROR;  There are open files: %p\n", nmp->nm_head);
+      ferr("ERROR;  There are open files: %p\n", nmp->nm_head);
 
       /* This implementation currently only supports unmounting if there are
        * no open file references.
@@ -1902,7 +1999,7 @@ static int nfs_unbind(FAR void *handle, FAR struct inode **blkdriver,
   error = rpcclnt_umount(nmp->nm_rpcclnt);
   if (error)
     {
-      fdbg("ERROR: rpcclnt_umount failed: %d\n", error);
+      ferr("ERROR: rpcclnt_umount failed: %d\n", error);
     }
 
   /* Disconnect from the server */
@@ -2046,7 +2143,7 @@ static int nfs_statfs(FAR struct inode *mountpt, FAR struct statfs *sbp)
   error = nfs_checkmount(nmp);
   if (error != OK)
     {
-      fdbg("ERROR: nfs_checkmount failed: %d\n", error);
+      ferr("ERROR: nfs_checkmount failed: %d\n", error);
       goto errout_with_semaphore;
     }
 
@@ -2124,7 +2221,7 @@ static int nfs_remove(struct inode *mountpt, const char *relpath)
   error = nfs_checkmount(nmp);
   if (error != OK)
     {
-      fdbg("ERROR: nfs_checkmount failed: %d\n", error);
+      ferr("ERROR: nfs_checkmount failed: %d\n", error);
       goto errout_with_semaphore;
     }
 
@@ -2133,7 +2230,7 @@ static int nfs_remove(struct inode *mountpt, const char *relpath)
   error = nfs_finddir(nmp, relpath, &fhandle, &fattr, filename);
   if (error != OK)
     {
-      fdbg("ERROR: nfs_finddir returned: %d\n", error);
+      ferr("ERROR: nfs_finddir returned: %d\n", error);
       goto errout_with_semaphore;
     }
 
@@ -2210,7 +2307,7 @@ static int nfs_mkdir(struct inode *mountpt, const char *relpath, mode_t mode)
   error = nfs_checkmount(nmp);
   if (error != OK)
     {
-      fdbg("ERROR: nfs_checkmount: %d\n", error);
+      ferr("ERROR: nfs_checkmount: %d\n", error);
       goto errout_with_semaphore;
     }
 
@@ -2219,7 +2316,7 @@ static int nfs_mkdir(struct inode *mountpt, const char *relpath, mode_t mode)
   error = nfs_finddir(nmp, relpath, &fhandle, &fattr, dirname);
   if (error != OK)
     {
-      fdbg("ERROR: nfs_finddir returned: %d\n", error);
+      ferr("ERROR: nfs_finddir returned: %d\n", error);
       return error;
     }
 
@@ -2292,7 +2389,7 @@ static int nfs_mkdir(struct inode *mountpt, const char *relpath, mode_t mode)
                       (FAR void *)&nmp->nm_iobuffer, nmp->nm_buflen);
   if (error)
     {
-      fdbg("ERROR: nfs_request failed: %d\n", error);
+      ferr("ERROR: nfs_request failed: %d\n", error);
     }
 
 errout_with_semaphore:
@@ -2336,7 +2433,7 @@ static int nfs_rmdir(struct inode *mountpt, const char *relpath)
   error = nfs_checkmount(nmp);
   if (error != OK)
     {
-      fdbg("ERROR: nfs_checkmount failed: %d\n", error);
+      ferr("ERROR: nfs_checkmount failed: %d\n", error);
       goto errout_with_semaphore;
     }
 
@@ -2345,7 +2442,7 @@ static int nfs_rmdir(struct inode *mountpt, const char *relpath)
   error = nfs_finddir(nmp, relpath, &fhandle, &fattr, dirname);
   if (error != OK)
     {
-      fdbg("ERROR: nfs_finddir returned: %d\n", error);
+      ferr("ERROR: nfs_finddir returned: %d\n", error);
       return error;
     }
 
@@ -2424,7 +2521,7 @@ static int nfs_rename(struct inode *mountpt, const char *oldrelpath,
   error = nfs_checkmount(nmp);
   if (error != OK)
     {
-      fdbg("ERROR: nfs_checkmount returned: %d\n", error);
+      ferr("ERROR: nfs_checkmount returned: %d\n", error);
       goto errout_with_semaphore;
     }
 
@@ -2433,7 +2530,7 @@ static int nfs_rename(struct inode *mountpt, const char *oldrelpath,
   error = nfs_finddir(nmp, oldrelpath, &from_handle, &fattr, from_name);
   if (error != OK)
     {
-      fdbg("ERROR: nfs_finddir returned: %d\n", error);
+      ferr("ERROR: nfs_finddir returned: %d\n", error);
       return error;
     }
 
@@ -2442,7 +2539,7 @@ static int nfs_rename(struct inode *mountpt, const char *oldrelpath,
   error = nfs_finddir(nmp, newrelpath, &to_handle, &fattr, to_name);
   if (error != OK)
     {
-      fdbg("ERROR: nfs_finddir returned: %d\n", error);
+      ferr("ERROR: nfs_finddir returned: %d\n", error);
       return error;
     }
 
@@ -2503,84 +2600,45 @@ errout_with_semaphore:
 }
 
 /****************************************************************************
- * Name: nfs_stat
+ * Name: nfs_stat_common
  *
  * Description:
- *   Return information about the file system object at 'relpath'
+ *   Return information about the file system object described by 'info'
  *
  * Returned Value:
- *   0 on success; a negated errno value on failure.
+ *   None
  *
  ****************************************************************************/
 
-static int nfs_stat(struct inode *mountpt, const char *relpath,
-                    struct stat *buf)
+static void nfs_stat_common(FAR struct nfs_statinfo_s *info,
+                            FAR struct stat *buf)
 {
-  struct nfsmount   *nmp;
-  struct file_handle fhandle;
-  struct nfs_fattr   obj_attributes;
-  uint32_t           tmp;
-  uint32_t           mode;
-  int                error;
-
-  /* Sanity checks */
-
-  DEBUGASSERT(mountpt && mountpt->i_private);
-
-  /* Get the mountpoint private data from the inode structure */
-
-  nmp = (FAR struct nfsmount *)mountpt->i_private;
-  DEBUGASSERT(nmp && buf);
-
-  /* Check if the mount is still healthy */
-
-  nfs_semtake(nmp);
-  error = nfs_checkmount(nmp);
-  if (error != OK)
-    {
-      fdbg("ERROR: nfs_checkmount failed: %d\n", error);
-      goto errout_with_semaphore;
-    }
-
-  /* Get the file handle attributes of the requested node */
-
-  error = nfs_findnode(nmp, relpath, &fhandle, &obj_attributes, NULL);
-  if (error != OK)
-    {
-      fdbg("ERROR: nfs_findnode failed: %d\n", error);
-      goto errout_with_semaphore;
-    }
-
-  /* Construct the file mode.  This is a 32-bit, encoded value containing
-   * both the access mode and the file type.
-   */
-
-  tmp = fxdr_unsigned(uint32_t, obj_attributes.fa_mode);
+  mode_t mode;
 
   /* Here we exploit the fact that most mode bits are the same in NuttX
    * as in the NFSv3 spec.
    */
 
-  mode = tmp & (NFSMODE_IXOTH | NFSMODE_IWOTH | NFSMODE_IROTH |
-                NFSMODE_IXGRP | NFSMODE_IWGRP | NFSMODE_IRGRP |
-                NFSMODE_IXUSR | NFSMODE_IWUSR | NFSMODE_IRUSR);
+  mode = info->ns_mode &
+           (NFSMODE_IXOTH | NFSMODE_IWOTH | NFSMODE_IROTH |
+            NFSMODE_IXGRP | NFSMODE_IWGRP | NFSMODE_IRGRP |
+            NFSMODE_IXUSR | NFSMODE_IWUSR | NFSMODE_IRUSR);
 
   /* Handle the cases that are not the same */
 
-  if ((mode & NFSMODE_ISGID) != 0)
+  if ((info->ns_mode & NFSMODE_ISGID) != 0)
     {
       mode |= S_ISGID;
     }
 
-  if ((mode & NFSMODE_ISUID) != 0)
+  if ((info->ns_mode & NFSMODE_ISUID) != 0)
     {
       mode |= S_ISUID;
     }
 
   /* Now OR in the file type */
 
-  tmp = fxdr_unsigned(uint32_t, obj_attributes.fa_type);
-  switch (tmp)
+  switch (info->ns_mode)
     {
     default:
     case NFNON:   /* Unknown type */
@@ -2616,12 +2674,83 @@ static int nfs_stat(struct inode *mountpt, const char *relpath,
     }
 
   buf->st_mode    = mode;
-  buf->st_size    = fxdr_hyper(&obj_attributes.fa_size);
+  buf->st_size    = (off_t)info->ns_size;
   buf->st_blksize = 0;
   buf->st_blocks  = 0;
-  buf->st_mtime   = fxdr_hyper(&obj_attributes.fa_mtime);
-  buf->st_atime   = fxdr_hyper(&obj_attributes.fa_atime);
-  buf->st_ctime   = fxdr_hyper(&obj_attributes.fa_ctime);
+  buf->st_mtime   = info->ns_mtime;
+  buf->st_atime   = info->ns_atime;
+  buf->st_ctime   = info->ns_ctime;
+}
+
+/****************************************************************************
+ * Name: nfs_stat
+ *
+ * Description:
+ *   Return information about the file system object at 'relpath'
+ *
+ * Returned Value:
+ *   0 on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+static int nfs_stat(struct inode *mountpt, const char *relpath,
+                    struct stat *buf)
+{
+  struct nfsmount *nmp;
+  struct file_handle fhandle;
+  struct nfs_fattr obj_attributes;
+  struct nfs_statinfo_s info;
+  struct timespec ts;
+  int error;
+
+  /* Sanity checks */
+
+  DEBUGASSERT(mountpt && mountpt->i_private);
+
+  /* Get the mountpoint private data from the inode structure */
+
+  nmp = (FAR struct nfsmount *)mountpt->i_private;
+  DEBUGASSERT(nmp && buf);
+
+  /* Check if the mount is still healthy */
+
+  nfs_semtake(nmp);
+  error = nfs_checkmount(nmp);
+  if (error != OK)
+    {
+      ferr("ERROR: nfs_checkmount failed: %d\n", error);
+      goto errout_with_semaphore;
+    }
+
+  /* Get the file handle attributes of the requested node */
+
+  error = nfs_findnode(nmp, relpath, &fhandle, &obj_attributes, NULL);
+  if (error != OK)
+    {
+      ferr("ERROR: nfs_findnode failed: %d\n", error);
+      goto errout_with_semaphore;
+    }
+
+  /* Extract the file mode, file type, and file size. */
+
+  info.ns_mode  = fxdr_unsigned(uint16_t, obj_attributes.fa_mode);
+  info.ns_type  = fxdr_unsigned(uint8_t, obj_attributes.fa_type);
+  info.ns_size  = fxdr_hyper(&obj_attributes.fa_size);
+
+  /* Extract time values as type time_t in units of seconds */
+
+  fxdr_nfsv3time(&obj_attributes.fa_mtime, &ts);
+  info.ns_mtime = ts.tv_sec;
+
+  fxdr_nfsv3time(&obj_attributes.fa_atime, &ts);
+  info.ns_atime = ts.tv_sec;
+
+  fxdr_nfsv3time(&obj_attributes.fa_ctime, &ts);
+  info.ns_ctime = ts.tv_sec;
+
+  /* Then update the stat buffer with this information */
+
+  nfs_stat_common(&info, buf);
 
 errout_with_semaphore:
   nfs_semgive(nmp);
diff --git a/fs/nfs/rpc_clnt.c b/fs/nfs/rpc_clnt.c
index 0af2b470c735502ebc33d46819a6e424ec9df8d4..2432a94c03dd19abde9cff48c4fb985bbaad37f4 100644
--- a/fs/nfs/rpc_clnt.c
+++ b/fs/nfs/rpc_clnt.c
@@ -177,7 +177,7 @@ static int rpcclnt_send(FAR struct rpcclnt *rpc, int procid, int prog,
       /* psock_sendto failed */
 
       error = get_errno();
-      fdbg("ERROR: psock_sendto failed: %d\n", error);
+      ferr("ERROR: psock_sendto failed: %d\n", error);
     }
 
   return error;
@@ -204,7 +204,7 @@ static int rpcclnt_receive(FAR struct rpcclnt *rpc, FAR struct sockaddr *aname,
   if (nbytes < 0)
     {
       error = get_errno();
-      fdbg("ERROR: psock_recvfrom failed: %d\n", error);
+      ferr("ERROR: psock_recvfrom failed: %d\n", error);
     }
 
   return error;
@@ -228,7 +228,7 @@ static int rpcclnt_reply(FAR struct rpcclnt *rpc, int procid, int prog,
   error = rpcclnt_receive(rpc, rpc->rc_name, procid, prog, reply, resplen);
   if (error != 0)
     {
-      fdbg("ERROR: rpcclnt_receive returned: %d\n", error);
+      ferr("ERROR: rpcclnt_receive returned: %d\n", error);
 
       /* If we failed because of a timeout, then try sending the CALL
        * message again.
@@ -249,7 +249,7 @@ static int rpcclnt_reply(FAR struct rpcclnt *rpc, int procid, int prog,
 
       if (replyheader->rp_direction != rpc_reply)
         {
-          fdbg("ERROR: Different RPC REPLY returned\n");
+          ferr("ERROR: Different RPC REPLY returned\n");
           rpc_statistics(rpcinvalid);
           error = EPROTO;
         }
@@ -349,7 +349,7 @@ void rpcclnt_init(void)
   rpc_auth_unix = txdr_unsigned(RPCAUTH_UNIX);
   rpc_auth_null = txdr_unsigned(RPCAUTH_NULL);
 
-  fvdbg("RPC initialized\n");
+  finfo("RPC initialized\n");
 }
 
 /****************************************************************************
@@ -385,7 +385,7 @@ int rpcclnt_connect(struct rpcclnt *rpc)
   uint16_t tport;
   int errval;
 
-  fvdbg("Connecting\n");
+  finfo("Connecting\n");
 
   /* Create the socket */
 
@@ -396,7 +396,7 @@ int rpcclnt_connect(struct rpcclnt *rpc)
   so = (struct socket *)kmm_zalloc(sizeof(struct socket));
   if (!so)
     {
-      fdbg("ERROR: Failed to allocate socket structure\n");
+      ferr("ERROR: Failed to allocate socket structure\n");
       return ENOMEM;
     }
 
@@ -404,7 +404,7 @@ int rpcclnt_connect(struct rpcclnt *rpc)
   if (error < 0)
     {
       errval = get_errno();
-      fdbg("ERROR: psock_socket failed: %d", errval);
+      ferr("ERROR: psock_socket failed: %d", errval);
       return error;
     }
 
@@ -423,7 +423,7 @@ int rpcclnt_connect(struct rpcclnt *rpc)
   if (error < 0)
     {
       errval = get_errno();
-      fdbg("ERROR: psock_setsockopt failed: %d\n", errval);
+      ferr("ERROR: psock_setsockopt failed: %d\n", errval);
       goto bad;
     }
 
@@ -445,14 +445,14 @@ int rpcclnt_connect(struct rpcclnt *rpc)
       if (error < 0)
         {
           errval = get_errno();
-          fdbg("ERROR: psock_bind failed: %d\n", errval);
+          ferr("ERROR: psock_bind failed: %d\n", errval);
         }
     }
   while (errval == EADDRINUSE && tport > 1024 / 2);
 
   if (error)
     {
-      fdbg("ERROR: psock_bind failed: %d\n", errval);
+      ferr("ERROR: psock_bind failed: %d\n", errval);
       goto bad;
     }
 
@@ -465,7 +465,7 @@ int rpcclnt_connect(struct rpcclnt *rpc)
   if (error < 0)
     {
       errval = get_errno();
-      fdbg("ERROR: psock_connect to PMAP port failed: %d", errval);
+      ferr("ERROR: psock_connect to PMAP port failed: %d", errval);
       goto bad;
     }
 
@@ -483,7 +483,7 @@ int rpcclnt_connect(struct rpcclnt *rpc)
                           (FAR void *)&response.rdata, sizeof(struct rpc_reply_pmap));
   if (error != 0)
     {
-      fdbg("ERROR: rpcclnt_request failed: %d\n", error);
+      ferr("ERROR: rpcclnt_request failed: %d\n", error);
       goto bad;
     }
 
@@ -494,7 +494,7 @@ int rpcclnt_connect(struct rpcclnt *rpc)
   if (error < 0)
     {
       errval = get_errno();
-      fdbg("ERROR: psock_connect MOUNTD port failed: %d\n", errval);
+      ferr("ERROR: psock_connect MOUNTD port failed: %d\n", errval);
       goto bad;
     }
 
@@ -508,14 +508,14 @@ int rpcclnt_connect(struct rpcclnt *rpc)
                           (FAR void *)&response.mdata, sizeof(struct rpc_reply_mount));
   if (error != 0)
     {
-      fdbg("ERROR: rpcclnt_request failed: %d\n", error);
+      ferr("ERROR: rpcclnt_request failed: %d\n", error);
       goto bad;
     }
 
   error = fxdr_unsigned(uint32_t, response.mdata.mount.status);
   if (error != 0)
     {
-      fdbg("ERROR: Bad mount status: %d\n", error);
+      ferr("ERROR: Bad mount status: %d\n", error);
       goto bad;
     }
 
@@ -531,7 +531,7 @@ int rpcclnt_connect(struct rpcclnt *rpc)
   if (error < 0)
     {
       errval = get_errno();
-      fdbg("ERROR: psock_connect PMAP port failed: %d\n", errval);
+      ferr("ERROR: psock_connect PMAP port failed: %d\n", errval);
       goto bad;
     }
 
@@ -545,7 +545,7 @@ int rpcclnt_connect(struct rpcclnt *rpc)
                           (FAR void *)&response.rdata, sizeof(struct rpc_reply_pmap));
   if (error != 0)
     {
-      fdbg("ERROR: rpcclnt_request failed: %d\n", error);
+      ferr("ERROR: rpcclnt_request failed: %d\n", error);
       goto bad;
     }
 
@@ -554,7 +554,7 @@ int rpcclnt_connect(struct rpcclnt *rpc)
   error = psock_connect(rpc->rc_so, saddr, sizeof(*saddr));
   if (error)
     {
-      fdbg("psock_connect NFS port returns %d\n", error);
+      ferr("ERROR: psock_connect NFS port returns %d\n", error);
       goto bad;
     }
 
@@ -622,7 +622,7 @@ int rpcclnt_umount(struct rpcclnt *rpc)
   if (ret < 0)
     {
       error = get_errno();
-      fdbg("ERROR: psock_connect failed [port=%d]: %d\n",
+      ferr("ERROR: psock_connect failed [port=%d]: %d\n",
             ntohs(sa->sin_port), error);
       goto bad;
     }
@@ -637,7 +637,7 @@ int rpcclnt_umount(struct rpcclnt *rpc)
                           (FAR void *)&response.rdata, sizeof(struct rpc_reply_pmap));
   if (error != 0)
     {
-      fdbg("ERROR: rpcclnt_request failed: %d\n", error);
+      ferr("ERROR: rpcclnt_request failed: %d\n", error);
       goto bad;
     }
 
@@ -647,7 +647,7 @@ int rpcclnt_umount(struct rpcclnt *rpc)
   if (ret < 0)
     {
       error = get_errno();
-      fdbg("ERROR: psock_connect failed [port=%d]: %d\n",
+      ferr("ERROR: psock_connect failed [port=%d]: %d\n",
             ntohs(sa->sin_port), error);
       goto bad;
     }
@@ -662,7 +662,7 @@ int rpcclnt_umount(struct rpcclnt *rpc)
                           (FAR void *)&response.mdata, sizeof(struct rpc_reply_umount));
   if (error != 0)
     {
-      fdbg("ERROR: rpcclnt_request failed: %d\n", error);
+      ferr("ERROR: rpcclnt_request failed: %d\n", error);
       goto bad;
     }
 
@@ -731,7 +731,7 @@ int rpcclnt_request(FAR struct rpcclnt *rpc, int procnum, int prog,
       error = rpcclnt_send(rpc, procnum, prog, request, reqlen);
       if (error != OK)
         {
-          fvdbg("ERROR rpcclnt_send failed: %d\n", error);
+          finfo("ERROR rpcclnt_send failed: %d\n", error);
         }
 
       /* Wait for the reply from our send */
@@ -741,7 +741,7 @@ int rpcclnt_request(FAR struct rpcclnt *rpc, int procnum, int prog,
           error = rpcclnt_reply(rpc, procnum, prog, response, resplen);
           if (error != OK)
             {
-              fvdbg("ERROR rpcclnt_reply failed: %d\n", error);
+              finfo("ERROR rpcclnt_reply failed: %d\n", error);
             }
         }
 
@@ -751,7 +751,7 @@ int rpcclnt_request(FAR struct rpcclnt *rpc, int procnum, int prog,
 
   if (error != OK)
     {
-      fdbg("ERROR: RPC failed: %d\n", error);
+      ferr("ERROR: RPC failed: %d\n", error);
       return error;
     }
 
@@ -766,11 +766,11 @@ int rpcclnt_request(FAR struct rpcclnt *rpc, int procnum, int prog,
       switch (tmp)
         {
         case RPC_MISMATCH:
-          fdbg("RPC_MSGDENIED: RPC_MISMATCH error\n");
+          ferr("ERROR: RPC_MSGDENIED: RPC_MISMATCH error\n");
           return EOPNOTSUPP;
 
         case RPC_AUTHERR:
-          fdbg("RPC_MSGDENIED: RPC_AUTHERR error\n");
+          ferr("ERROR: RPC_MSGDENIED: RPC_AUTHERR error\n");
           return EACCES;
 
         default:
@@ -785,16 +785,16 @@ int rpcclnt_request(FAR struct rpcclnt *rpc, int procnum, int prog,
   tmp = fxdr_unsigned(uint32_t, replymsg->status);
   if (tmp == RPC_SUCCESS)
     {
-      fvdbg("RPC_SUCCESS\n");
+      finfo("RPC_SUCCESS\n");
     }
   else if (tmp == RPC_PROGMISMATCH)
     {
-      fdbg("RPC_MSGACCEPTED: RPC_PROGMISMATCH error\n");
+      ferr("ERROR: RPC_MSGACCEPTED: RPC_PROGMISMATCH error\n");
       return EOPNOTSUPP;
     }
   else if (tmp > 5)
     {
-      fdbg("ERROR:  Other RPC type: %d\n", tmp);
+      ferr("ERROR: Unsupported RPC type: %d\n", tmp);
       return EOPNOTSUPP;
     }
 
diff --git a/fs/nxffs/Kconfig b/fs/nxffs/Kconfig
index 3618b2cf642a18cf43a9a476753f445f2dc3eb13..f3dd6e1166370e6336b396157bb28871fbb3e10a 100644
--- a/fs/nxffs/Kconfig
+++ b/fs/nxffs/Kconfig
@@ -31,8 +31,8 @@ config NXFFS_SCAN_VOLUME
 
 		The down side is that scanning the volume can adversely affect
 		your start-up time.  An option is to just erase the FLASH and
-		reboot in these cases.  That can be done with
-		apps/system/flash_eraseall.
+		reboot in these cases.  That can be done with MDIOC_BULKERASE
+		IOCTL command.
 
 config NXFFS_NAND
 	bool "Enable NAND support"
diff --git a/fs/nxffs/nxffs.h b/fs/nxffs/nxffs.h
index 04dba9f3afab27f924d3ccd7449dbc08544d6d44..30f84b1f328edfbc7004beabcfc243f555ee7b83 100644
--- a/fs/nxffs/nxffs.h
+++ b/fs/nxffs/nxffs.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/nxffs/nxffs.h
  *
- *   Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2013, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * References: Linux/Documentation/filesystems/romfs.txt
@@ -1092,6 +1092,7 @@ ssize_t nxffs_write(FAR struct file *filep, FAR const char *buffer,
                     size_t buflen);
 int nxffs_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
 int nxffs_dup(FAR const struct file *oldp, FAR struct file *newp);
+int nxffs_fstat(FAR const struct file *filep, FAR struct stat *buf);
 int nxffs_opendir(FAR struct inode *mountpt, FAR const char *relpath,
                   FAR struct fs_dirent_s *dir);
 int nxffs_readdir(FAR struct inode *mountpt, FAR struct fs_dirent_s *dir);
diff --git a/fs/nxffs/nxffs_block.c b/fs/nxffs/nxffs_block.c
index 490f3025378a112a014f5b897de77aa302f50be6..c1cad2afe4a3aeed7ff89f1589925d533e972fe7 100644
--- a/fs/nxffs/nxffs_block.c
+++ b/fs/nxffs/nxffs_block.c
@@ -89,7 +89,7 @@ int nxffs_verifyblock(FAR struct nxffs_volume_s *volume, off_t block)
     {
       /* Perhaps we are at the end of the media */
 
-      fdbg("ERROR: Failed to read data into cache: %d\n", ret);
+      ferr("ERROR: Failed to read data into cache: %d\n", ret);
       return -EIO;
     }
 
@@ -169,6 +169,6 @@ int nxffs_validblock(struct nxffs_volume_s *volume, off_t *block)
    * valid blocks left in the volume.
    */
 
-  fdbg("ERROR: No valid block found\n");
+  ferr("ERROR: No valid block found\n");
   return -ENOSPC;
 }
diff --git a/fs/nxffs/nxffs_blockstats.c b/fs/nxffs/nxffs_blockstats.c
index 797cae2d4cdb657754291e953f132ae478a012b5..d1c3b8fb8de950542be628ee46667a93bfe860b2 100644
--- a/fs/nxffs/nxffs_blockstats.c
+++ b/fs/nxffs/nxffs_blockstats.c
@@ -94,7 +94,7 @@ int nxffs_blockstats(FAR struct nxffs_volume_s *volume,
       ret = MTD_BREAD(volume->mtd, ioblock, volume->blkper, volume->pack);
       if (ret < volume->blkper)
         {
-          fdbg("ERROR: Failed to read erase block %d: %d\n",
+          ferr("ERROR: Failed to read erase block %d: %d\n",
                ioblock / volume->blkper, ret);
           return ret;
         }
@@ -147,11 +147,11 @@ int nxffs_blockstats(FAR struct nxffs_volume_s *volume,
         }
     }
 
-  fdbg("Number blocks:        %d\n", stats->nblocks);
-  fdbg("  Good blocks:        %d\n", stats->ngood);
-  fdbg("  Bad blocks:         %d\n", stats->nbad);
-  fdbg("  Unformatted blocks: %d\n", stats->nunformat);
-  fdbg("  Corrupt blocks:     %d\n", stats->ncorrupt);
+  finfo("Number blocks:        %d\n", stats->nblocks);
+  finfo("  Good blocks:        %d\n", stats->ngood);
+  finfo("  Bad blocks:         %d\n", stats->nbad);
+  finfo("  Unformatted blocks: %d\n", stats->nunformat);
+  finfo("  Corrupt blocks:     %d\n", stats->ncorrupt);
 
 #else
   for (ioblock = 0; ioblock < volume->nblocks; ioblock++)
@@ -175,7 +175,7 @@ int nxffs_blockstats(FAR struct nxffs_volume_s *volume,
            * of unreadable blocks.
            */
 
-          fdbg("ERROR: Failed to read block %d: %d\n", ioblock, ret);
+          ferr("ERROR: Failed to read block %d: %d\n", ioblock, ret);
 
           /* Increment the count of un-readable blocks */
 
@@ -221,12 +221,12 @@ int nxffs_blockstats(FAR struct nxffs_volume_s *volume,
         }
     }
 
-  fdbg("Number blocks:        %d\n", stats->nblocks);
-  fdbg("  Good blocks:        %d\n", stats->ngood);
-  fdbg("  Bad blocks:         %d\n", stats->nbad);
-  fdbg("  Unformatted blocks: %d\n", stats->nunformat);
-  fdbg("  Corrupt blocks:     %d\n", stats->ncorrupt);
-  fdbg("  Unreadable blocks:  %d\n", stats->nbadread);
+  finfo("Number blocks:        %d\n", stats->nblocks);
+  finfo("  Good blocks:        %d\n", stats->ngood);
+  finfo("  Bad blocks:         %d\n", stats->nbad);
+  finfo("  Unformatted blocks: %d\n", stats->nunformat);
+  finfo("  Corrupt blocks:     %d\n", stats->ncorrupt);
+  finfo("  Unreadable blocks:  %d\n", stats->nbadread);
 
 #endif
   return OK;
diff --git a/fs/nxffs/nxffs_cache.c b/fs/nxffs/nxffs_cache.c
index 2a04d6b0a9f93c0554010511cba743012d8c6cbf..6a5c4c028fcef580973a6f44adb330e73837c3d1 100644
--- a/fs/nxffs/nxffs_cache.c
+++ b/fs/nxffs/nxffs_cache.c
@@ -98,7 +98,7 @@ int nxffs_rdcache(FAR struct nxffs_volume_s *volume, off_t block)
       nxfrd = MTD_BREAD(volume->mtd, block, 1, volume->cache);
       if (nxfrd != 1)
         {
-          fdbg("ERROR: Read block %d failed: %d\n", block, nxfrd);
+          ferr("ERROR: Read block %d failed: %d\n", block, nxfrd);
           return -EIO;
         }
 
@@ -133,7 +133,7 @@ int nxffs_wrcache(FAR struct nxffs_volume_s *volume)
   nxfrd = MTD_BWRITE(volume->mtd, volume->cblock, 1, volume->cache);
   if (nxfrd != 1)
     {
-      fdbg("ERROR: Write block %d failed: %d\n", volume->cblock, nxfrd);
+      ferr("ERROR: Write block %d failed: %d\n", volume->cblock, nxfrd);
       return -EIO;
     }
 
@@ -225,7 +225,7 @@ int nxffs_getc(FAR struct nxffs_volume_s *volume, uint16_t reserve)
           off_t nextblock = volume->ioblock + 1;
           if (nextblock >= volume->nblocks)
             {
-              fvdbg("End of FLASH encountered\n");
+              finfo("End of FLASH encountered\n");
               return -ENOSPC;
             }
 
@@ -249,7 +249,7 @@ int nxffs_getc(FAR struct nxffs_volume_s *volume, uint16_t reserve)
 #ifndef CONFIG_NXFFS_NAND
           /* Read errors are fatal */
 
-          fdbg("ERROR: Failed to read valid data into cache: %d\n", ret);
+          ferr("ERROR: Failed to read valid data into cache: %d\n", ret);
           return ret;
 #else
           /* A read error occurred.  This probably means that we are
@@ -258,7 +258,7 @@ int nxffs_getc(FAR struct nxffs_volume_s *volume, uint16_t reserve)
            * block.
            */
 
-          fdbg("ERROR: Failed to read valid data into cache: %d\n", ret);
+          ferr("ERROR: Failed to read valid data into cache: %d\n", ret);
 #endif
         }
     }
diff --git a/fs/nxffs/nxffs_dirent.c b/fs/nxffs/nxffs_dirent.c
index 39150b9369d299b106368a7a613a20573cc35601..d51e2cabb6103408e7ef6b73e0e3541bc42681f7 100644
--- a/fs/nxffs/nxffs_dirent.c
+++ b/fs/nxffs/nxffs_dirent.c
@@ -71,7 +71,7 @@ int nxffs_opendir(FAR struct inode *mountpt, FAR const char *relpath,
   struct nxffs_volume_s *volume;
   int ret;
 
-  fvdbg("relpath: \"%s\"\n", relpath ? relpath : "NULL");
+  finfo("relpath: \"%s\"\n", relpath ? relpath : "NULL");
 
   /* Sanity checks */
 
@@ -146,7 +146,7 @@ int nxffs_readdir(FAR struct inode *mountpt, FAR struct fs_dirent_s *dir)
     {
       /* Return the filename and file type */
 
-      fvdbg("Offset %d: \"%s\"\n", entry.hoffset, entry.name);
+      finfo("Offset %d: \"%s\"\n", entry.hoffset, entry.name);
       dir->fd_dir.d_type = DTYPE_FILE;
       strncpy(dir->fd_dir.d_name, entry.name, NAME_MAX+1);
 
@@ -175,7 +175,7 @@ int nxffs_rewinddir(FAR struct inode *mountpt, FAR struct fs_dirent_s *dir)
   FAR struct nxffs_volume_s *volume;
   int ret;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* Sanity checks */
 
diff --git a/fs/nxffs/nxffs_dump.c b/fs/nxffs/nxffs_dump.c
index 1be0e294ac610fe4a4c01930e81c0a510402c016..a76c503e27a8e447e11bbcb5207f7aedb715db82 100644
--- a/fs/nxffs/nxffs_dump.c
+++ b/fs/nxffs/nxffs_dump.c
@@ -67,7 +67,7 @@ struct nxffs_blkinfo_s
   off_t nblocks;
   off_t block;
   off_t offset;
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_FS)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_FS)
   bool verbose;
 #endif
 };
@@ -91,7 +91,7 @@ static const char g_format[]    = "  %5d:%-5d %s %s %5d\n";
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_FS)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_FS)
 static inline ssize_t nxffs_analyzeinode(FAR struct nxffs_blkinfo_s *blkinfo,
                                          int offset)
 {
@@ -239,7 +239,7 @@ static inline ssize_t nxffs_analyzeinode(FAR struct nxffs_blkinfo_s *blkinfo,
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_FS)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_FS)
 static inline ssize_t nxffs_analyzedata(FAR struct nxffs_blkinfo_s *blkinfo,
                                         int offset)
 {
@@ -297,7 +297,7 @@ static inline ssize_t nxffs_analyzedata(FAR struct nxffs_blkinfo_s *blkinfo,
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_FS)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_FS)
 static inline void nxffs_analyze(FAR struct nxffs_blkinfo_s *blkinfo)
 {
   FAR struct nxffs_block_s *blkhdr;
@@ -403,7 +403,7 @@ static inline void nxffs_analyze(FAR struct nxffs_blkinfo_s *blkinfo)
  * Name: nxffs_dump
  *
  * Description:
- *   Dump a summary of the contents of an NXFFS file system.  CONFIG_DEBUG
+ *   Dump a summary of the contents of an NXFFS file system.  CONFIG_DEBUG_FEATURES
  *   and CONFIG_DEBUG_FS must be enabled for this function to do anything.
  *
  * Input Parameters:
@@ -419,7 +419,7 @@ static inline void nxffs_analyze(FAR struct nxffs_blkinfo_s *blkinfo)
 
 int nxffs_dump(FAR struct mtd_dev_s *mtd, bool verbose)
 {
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_FS)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_FS)
   struct nxffs_blkinfo_s blkinfo;
   int ret;
 
@@ -432,7 +432,7 @@ int nxffs_dump(FAR struct mtd_dev_s *mtd, bool verbose)
   ret = MTD_IOCTL(mtd, MTDIOC_GEOMETRY, (unsigned long)((uintptr_t)&blkinfo.geo));
   if (ret < 0)
     {
-      fdbg("ERROR: MTD ioctl(MTDIOC_GEOMETRY) failed: %d\n", -ret);
+      ferr("ERROR: MTD ioctl(MTDIOC_GEOMETRY) failed: %d\n", -ret);
       return ret;
     }
 
@@ -445,7 +445,7 @@ int nxffs_dump(FAR struct mtd_dev_s *mtd, bool verbose)
   blkinfo.buffer = (FAR uint8_t *)kmm_malloc(blkinfo.geo.blocksize);
   if (!blkinfo.buffer)
     {
-      fdbg("ERROR: Failed to allocate block cache\n");
+      ferr("ERROR: Failed to allocate block cache\n");
       return -ENOMEM;
     }
 
@@ -467,7 +467,7 @@ int nxffs_dump(FAR struct mtd_dev_s *mtd, bool verbose)
 #ifndef CONFIG_NXFFS_NAND
           /* Read errors are fatal */
 
-          fdbg("ERROR: Failed to read block %d\n", blkinfo.block);
+          ferr("ERROR: Failed to read block %d\n", blkinfo.block);
           kmm_free(blkinfo.buffer);
           return ret;
 #else
diff --git a/fs/nxffs/nxffs_initialize.c b/fs/nxffs/nxffs_initialize.c
index 5701d3163791f677447c9b3822124f767ffc18d4..bf511c81869b0218c43c4ce874e8029548e0e9c0 100644
--- a/fs/nxffs/nxffs_initialize.c
+++ b/fs/nxffs/nxffs_initialize.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/nxffs/nxffs_initialize.c
  *
- *   Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2013, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * References: Linux/Documentation/filesystems/romfs.txt
@@ -73,6 +73,7 @@ const struct mountpt_operations nxffs_operations =
 
   NULL,              /* sync -- No buffered data */
   nxffs_dup,         /* dup */
+  nxffs_fstat,       /* fstat */
 
   nxffs_opendir,     /* opendir */
   NULL,              /* closedir */
@@ -190,7 +191,7 @@ int nxffs_initialize(FAR struct mtd_dev_s *mtd)
   ret = MTD_IOCTL(mtd, MTDIOC_GEOMETRY, (unsigned long)((uintptr_t)&volume->geo));
   if (ret < 0)
     {
-      fdbg("ERROR: MTD ioctl(MTDIOC_GEOMETRY) failed: %d\n", -ret);
+      ferr("ERROR: MTD ioctl(MTDIOC_GEOMETRY) failed: %d\n", -ret);
       goto errout_with_volume;
     }
 
@@ -199,7 +200,7 @@ int nxffs_initialize(FAR struct mtd_dev_s *mtd)
   volume->cache = (FAR uint8_t *)kmm_malloc(volume->geo.blocksize);
   if (!volume->cache)
     {
-      fdbg("ERROR: Failed to allocate an erase block buffer\n");
+      ferr("ERROR: Failed to allocate an erase block buffer\n");
       ret = -ENOMEM;
       goto errout_with_volume;
     }
@@ -212,7 +213,7 @@ int nxffs_initialize(FAR struct mtd_dev_s *mtd)
   volume->pack = (FAR uint8_t *)kmm_malloc(volume->geo.erasesize);
   if (!volume->pack)
     {
-      fdbg("ERROR: Failed to allocate an I/O block buffer\n");
+      ferr("ERROR: Failed to allocate an I/O block buffer\n");
       ret = -ENOMEM;
       goto errout_with_cache;
     }
@@ -231,7 +232,7 @@ int nxffs_initialize(FAR struct mtd_dev_s *mtd)
   ret = nxffs_blockstats(volume, &stats);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to collect block statistics: %d\n", -ret);
+      ferr("ERROR: Failed to collect block statistics: %d\n", -ret);
       goto errout_with_buffer;
     }
 
@@ -247,17 +248,17 @@ int nxffs_initialize(FAR struct mtd_dev_s *mtd)
       ret = nxffs_reformat(volume);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to reformat the volume: %d\n", -ret);
+          ferr("ERROR: Failed to reformat the volume: %d\n", -ret);
           goto errout_with_buffer;
         }
 
       /* Get statistics on the re-formatted volume */
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_FS)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_FS)
       ret = nxffs_blockstats(volume, &stats);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to collect block statistics: %d\n", -ret);
+          ferr("ERROR: Failed to collect block statistics: %d\n", -ret);
           goto errout_with_buffer;
         }
 #endif
@@ -274,21 +275,21 @@ int nxffs_initialize(FAR struct mtd_dev_s *mtd)
 
   /* We may need to format the volume.  Try that before giving up. */
 
-  fdbg("WARNING: Failed to calculate file system limits: %d\n", -ret);
+  fwarn("WARNING: Failed to calculate file system limits: %d\n", -ret);
   ret = nxffs_reformat(volume);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to reformat the volume: %d\n", -ret);
+      ferr("ERROR: Failed to reformat the volume: %d\n", -ret);
       goto errout_with_buffer;
     }
 
   /* Get statistics on the re-formatted volume */
 
-#if defined(CONFIG_NXFFS_SCAN_VOLUME) && defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_FS)
+#if defined(CONFIG_NXFFS_SCAN_VOLUME) && defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_FS)
   ret = nxffs_blockstats(volume, &stats);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to collect block statistics: %d\n", -ret);
+      ferr("ERROR: Failed to collect block statistics: %d\n", -ret);
       goto errout_with_buffer;
     }
 #endif
@@ -303,7 +304,7 @@ int nxffs_initialize(FAR struct mtd_dev_s *mtd)
 
   /* Now give up */
 
-  fdbg("ERROR: Failed to calculate file system limits: %d\n", -ret);
+  ferr("ERROR: Failed to calculate file system limits: %d\n", -ret);
 
 errout_with_buffer:
   kmm_free(volume->pack);
@@ -356,7 +357,7 @@ int nxffs_limits(FAR struct nxffs_volume_s *volume)
   ret = nxffs_validblock(volume, &block);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to find a valid block: %d\n", -ret);
+      ferr("ERROR: Failed to find a valid block: %d\n", -ret);
       return ret;
     }
 
@@ -374,7 +375,7 @@ int nxffs_limits(FAR struct nxffs_volume_s *volume)
 
       if (ret != -ENOENT)
         {
-          fdbg("ERROR: nxffs_nextentry failed: %d\n", -ret);
+          ferr("ERROR: nxffs_nextentry failed: %d\n", -ret);
           return ret;
         }
 
@@ -383,7 +384,7 @@ int nxffs_limits(FAR struct nxffs_volume_s *volume)
        * the location of the free FLASH region.
        */
 
-      fvdbg("No inodes found\n");
+      finfo("No inodes found\n");
       noinodes = true;
     }
   else
@@ -391,7 +392,7 @@ int nxffs_limits(FAR struct nxffs_volume_s *volume)
       /* Save the offset to the first inode */
 
       volume->inoffset = entry.hoffset;
-      fvdbg("First inode at offset %d\n", volume->inoffset);
+      finfo("First inode at offset %d\n", volume->inoffset);
 
       /* Discard this entry and set the next offset. */
 
@@ -411,7 +412,7 @@ int nxffs_limits(FAR struct nxffs_volume_s *volume)
           nxffs_freeentry(&entry);
         }
 
-      fvdbg("Last inode before offset %d\n", offset);
+      finfo("Last inode before offset %d\n", offset);
     }
 
   /* No inodes were found after this offset.  Now search for a block of
@@ -435,11 +436,11 @@ int nxffs_limits(FAR struct nxffs_volume_s *volume)
               /* Yes.. the FLASH is full.  Force the offsets to the end of FLASH */
 
               volume->froffset = volume->nblocks * volume->geo.blocksize;
-              fvdbg("Assume no free FLASH, froffset: %d\n", volume->froffset);
+              finfo("Assume no free FLASH, froffset: %d\n", volume->froffset);
               if (noinodes)
                 {
                   volume->inoffset = volume->froffset;
-                  fvdbg("No inodes, inoffset: %d\n", volume->inoffset);
+                  finfo("No inodes, inoffset: %d\n", volume->inoffset);
                 }
 
               return OK;
@@ -447,7 +448,7 @@ int nxffs_limits(FAR struct nxffs_volume_s *volume)
 
           /* No?  Then it is some other failure that we do not know how to handle */
 
-          fdbg("ERROR: nxffs_getc failed: %d\n", -ch);
+          ferr("ERROR: nxffs_getc failed: %d\n", -ch);
           return ch;
         }
 
@@ -468,11 +469,11 @@ int nxffs_limits(FAR struct nxffs_volume_s *volume)
                */
 
               volume->froffset = offset;
-              fvdbg("Free FLASH region begins at offset: %d\n", volume->froffset);
+              finfo("Free FLASH region begins at offset: %d\n", volume->froffset);
               if (noinodes)
                 {
                   volume->inoffset = offset;
-                  fvdbg("First inode at offset %d\n", volume->inoffset);
+                  finfo("First inode at offset %d\n", volume->inoffset);
                 }
 
               return OK;
diff --git a/fs/nxffs/nxffs_inode.c b/fs/nxffs/nxffs_inode.c
index bf4c7f5957024cb7db8675202232127f15a70491..2240c18313f2618283bf0d734a719e472dc4a337 100644
--- a/fs/nxffs/nxffs_inode.c
+++ b/fs/nxffs/nxffs_inode.c
@@ -125,7 +125,7 @@ static int nxffs_rdentry(FAR struct nxffs_volume_s *volume, off_t offset,
   entry->name = (FAR char *)kmm_malloc(namlen + 1);
   if (!entry->name)
     {
-      fdbg("ERROR: Failed to allocate name, namlen: %d\n", namlen);
+      ferr("ERROR: Failed to allocate name, namlen: %d\n", namlen);
       ret = -ENOMEM;
       goto errout_no_offset;
     }
@@ -141,7 +141,7 @@ static int nxffs_rdentry(FAR struct nxffs_volume_s *volume, off_t offset,
   ret = nxffs_rdcache(volume, volume->ioblock);
   if (ret < 0)
     {
-      fdbg("ERROR: nxffsx_rdcache failed: %d\n", -ret);
+      ferr("ERROR: nxffsx_rdcache failed: %d\n", -ret);
       goto errout_with_name;
     }
 
@@ -155,7 +155,7 @@ static int nxffs_rdentry(FAR struct nxffs_volume_s *volume, off_t offset,
   crc = crc32part((FAR const uint8_t *)entry->name, namlen, crc);
   if (crc != ecrc)
     {
-      fdbg("ERROR: CRC entry: %08x CRC calculated: %08x\n", ecrc, crc);
+      ferr("ERROR: CRC entry: %08x CRC calculated: %08x\n", ecrc, crc);
       ret = -EIO;
       goto errout_with_name;
     }
@@ -271,7 +271,7 @@ int nxffs_nextentry(FAR struct nxffs_volume_s *volume, off_t offset,
       ch = nxffs_getc(volume, SIZEOF_NXFFS_INODE_HDR - nmagic);
       if (ch < 0)
         {
-          fdbg("ERROR: nxffs_getc failed: %d\n", -ch);
+          ferr("ERROR: nxffs_getc failed: %d\n", -ch);
           return ch;
         }
 
@@ -286,7 +286,7 @@ int nxffs_nextentry(FAR struct nxffs_volume_s *volume, off_t offset,
 
           if (++nerased >= NXFFS_NERASED)
             {
-              fvdbg("No entry found\n");
+              finfo("No entry found\n");
               return -ENOENT;
             }
         }
@@ -337,7 +337,7 @@ int nxffs_nextentry(FAR struct nxffs_volume_s *volume, off_t offset,
               ret = nxffs_rdentry(volume, offset, entry);
               if (ret == OK)
                 {
-                  fvdbg("Found a valid fileheader, offset: %d\n", offset);
+                  finfo("Found a valid fileheader, offset: %d\n", offset);
                   return OK;
                 }
 
@@ -396,7 +396,7 @@ int nxffs_findinode(FAR struct nxffs_volume_s *volume, FAR const char *name,
       ret = nxffs_nextentry(volume, offset, entry);
       if (ret < 0)
         {
-          fvdbg("No inode found: %d\n", -ret);
+          finfo("No inode found: %d\n", -ret);
           return ret;
         }
 
diff --git a/fs/nxffs/nxffs_ioctl.c b/fs/nxffs/nxffs_ioctl.c
index da0752320a3e3d7ac97c56bd6a26b80bf58386ee..bbe6bbd745e5a561b851dd4dd14183c7a0d9f9b2 100644
--- a/fs/nxffs/nxffs_ioctl.c
+++ b/fs/nxffs/nxffs_ioctl.c
@@ -69,7 +69,7 @@ int nxffs_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   FAR struct nxffs_volume_s *volume;
   int ret;
 
-  fvdbg("cmd: %d arg: %08lx\n", cmd, arg);
+  finfo("cmd: %d arg: %08lx\n", cmd, arg);
 
   /* Sanity checks */
 
@@ -88,7 +88,7 @@ int nxffs_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   if (ret != OK)
     {
       ret = -get_errno();
-      fdbg("ERROR: sem_wait failed: %d\n", ret);
+      ferr("ERROR: sem_wait failed: %d\n", ret);
       goto errout;
     }
 
@@ -96,13 +96,13 @@ int nxffs_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
   if (cmd == FIOC_REFORMAT)
     {
-      fvdbg("Reformat command\n");
+      finfo("Reformat command\n");
 
       /* We cannot reformat the volume if there are any open inodes */
 
       if (volume->ofiles)
         {
-          fdbg("ERROR: Open files\n");
+          ferr("ERROR: Open files\n");
           ret = -EBUSY;
           goto errout_with_semaphore;
         }
@@ -114,7 +114,7 @@ int nxffs_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
   else if (cmd == FIOC_OPTIMIZE)
     {
-      fvdbg("Optimize command\n");
+      finfo("Optimize command\n");
 
       /* Pack the volume */
 
diff --git a/fs/nxffs/nxffs_open.c b/fs/nxffs/nxffs_open.c
index 2ac1249e06a364b723e1b415f4ac271ab7181f3a..6a03207e91292b5f9ecaa177fdad10a2765b0ae4 100644
--- a/fs/nxffs/nxffs_open.c
+++ b/fs/nxffs/nxffs_open.c
@@ -345,7 +345,7 @@ static inline int nxffs_wrname(FAR struct nxffs_volume_s *volume,
   ret = nxffs_rdcache(volume, volume->ioblock);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to read inode name block %d: %d\n",
+      ferr("ERROR: Failed to read inode name block %d: %d\n",
            volume->ioblock, -ret);
       return ret;
     }
@@ -356,7 +356,7 @@ static inline int nxffs_wrname(FAR struct nxffs_volume_s *volume,
   ret = nxffs_wrcache(volume);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to write inode header block %d: %d\n",
+      ferr("ERROR: Failed to write inode header block %d: %d\n",
            volume->ioblock, -ret);
     }
 
@@ -391,7 +391,7 @@ static inline int nxffs_wropen(FAR struct nxffs_volume_s *volume,
   ret = sem_wait(&volume->wrsem);
   if (ret != OK)
     {
-      fdbg("ERROR: sem_wait failed: %d\n", ret);
+      ferr("ERROR: sem_wait failed: %d\n", ret);
       ret = -get_errno();
       goto errout;
     }
@@ -404,7 +404,7 @@ static inline int nxffs_wropen(FAR struct nxffs_volume_s *volume,
   ret = sem_wait(&volume->exclsem);
   if (ret != OK)
     {
-      fdbg("ERROR: sem_wait failed: %d\n", ret);
+      ferr("ERROR: sem_wait failed: %d\n", ret);
       ret = -get_errno();
       goto errout_with_wrsem;
     }
@@ -429,7 +429,7 @@ static inline int nxffs_wropen(FAR struct nxffs_volume_s *volume,
            * Limitation:  Files cannot be open both for reading and writing.
            */
 
-          fdbg("ERROR: File is open for reading\n");
+          ferr("ERROR: File is open for reading\n");
           ret = -ENOSYS;
           goto errout_with_exclsem;
         }
@@ -440,7 +440,7 @@ static inline int nxffs_wropen(FAR struct nxffs_volume_s *volume,
 
       else if ((oflags & (O_CREAT | O_EXCL)) == (O_CREAT | O_EXCL))
         {
-          fdbg("ERROR: File exists, can't create O_EXCL\n");
+          ferr("ERROR: File exists, can't create O_EXCL\n");
           ret = -EEXIST;
           goto errout_with_exclsem;
         }
@@ -466,7 +466,7 @@ static inline int nxffs_wropen(FAR struct nxffs_volume_s *volume,
 
       else
         {
-          fdbg("ERROR: File %s exists and we were not asked to truncate it\n");
+          ferr("ERROR: File %s exists and we were not asked to truncate it\n");
           ret = -ENOSYS;
           goto errout_with_exclsem;
         }
@@ -478,7 +478,7 @@ static inline int nxffs_wropen(FAR struct nxffs_volume_s *volume,
 
   if ((oflags & O_CREAT) == 0)
     {
-      fdbg("ERROR: Not asked to create the file\n");
+      ferr("ERROR: Not asked to create the file\n");
       ret = -ENOENT;
       goto errout_with_exclsem;
     }
@@ -488,7 +488,7 @@ static inline int nxffs_wropen(FAR struct nxffs_volume_s *volume,
   namlen = strlen(name);
   if (namlen > CONFIG_NXFFS_MAXNAMLEN)
     {
-      fdbg("ERROR: Name is too long: %d\n", namlen);
+      ferr("ERROR: Name is too long: %d\n", namlen);
       ret = -EINVAL;
       goto errout_with_exclsem;
     }
@@ -562,7 +562,7 @@ static inline int nxffs_wropen(FAR struct nxffs_volume_s *volume,
 
       if (ret != -ENOSPC || packed)
         {
-          fdbg("ERROR: Failed to find inode header memory: %d\n", -ret);
+          ferr("ERROR: Failed to find inode header memory: %d\n", -ret);
           goto errout_with_name;
         }
 
@@ -573,7 +573,7 @@ static inline int nxffs_wropen(FAR struct nxffs_volume_s *volume,
       ret = nxffs_pack(volume);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to pack the volume: %d\n", -ret);
+          ferr("ERROR: Failed to pack the volume: %d\n", -ret);
           goto errout_with_name;
         }
 
@@ -609,7 +609,7 @@ static inline int nxffs_wropen(FAR struct nxffs_volume_s *volume,
               ret = nxffs_wrname(volume, &wrfile->ofile.entry, namlen);
               if (ret < 0)
                 {
-                  fdbg("ERROR: Failed to write the inode name: %d\n", -ret);
+                  ferr("ERROR: Failed to write the inode name: %d\n", -ret);
                   goto errout_with_name;
                 }
 
@@ -628,7 +628,7 @@ static inline int nxffs_wropen(FAR struct nxffs_volume_s *volume,
 
       if (ret != -ENOSPC || packed)
         {
-          fdbg("ERROR: Failed to find inode name memory: %d\n", -ret);
+          ferr("ERROR: Failed to find inode name memory: %d\n", -ret);
           goto errout_with_name;
         }
 
@@ -639,7 +639,7 @@ static inline int nxffs_wropen(FAR struct nxffs_volume_s *volume,
       ret = nxffs_pack(volume);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to pack the volume: %d\n", -ret);
+          ferr("ERROR: Failed to pack the volume: %d\n", -ret);
           goto errout_with_name;
         }
 
@@ -702,7 +702,7 @@ static inline int nxffs_rdopen(FAR struct nxffs_volume_s *volume,
   ret = sem_wait(&volume->exclsem);
   if (ret != OK)
     {
-      fdbg("ERROR: sem_wait failed: %d\n", ret);
+      ferr("ERROR: sem_wait failed: %d\n", ret);
       ret = -get_errno();
       goto errout;
     }
@@ -718,7 +718,7 @@ static inline int nxffs_rdopen(FAR struct nxffs_volume_s *volume,
 
       if ((ofile->oflags & O_WROK) != 0)
         {
-          fdbg("ERROR: File is open for writing\n");
+          ferr("ERROR: File is open for writing\n");
           ret = -ENOSYS;
           goto errout_with_exclsem;
         }
@@ -726,7 +726,7 @@ static inline int nxffs_rdopen(FAR struct nxffs_volume_s *volume,
       /* Just increment the reference count on the ofile */
 
       ofile->crefs++;
-      fvdbg("crefs: %d\n", ofile->crefs);
+      finfo("crefs: %d\n", ofile->crefs);
     }
 
   /* The file has not yet been opened.
@@ -741,7 +741,7 @@ static inline int nxffs_rdopen(FAR struct nxffs_volume_s *volume,
       ofile = (FAR struct nxffs_ofile_s *)kmm_zalloc(sizeof(struct nxffs_ofile_s));
       if (!ofile)
         {
-          fdbg("ERROR: ofile allocation failed\n");
+          ferr("ERROR: ofile allocation failed\n");
           ret = -ENOMEM;
           goto errout_with_exclsem;
         }
@@ -756,7 +756,7 @@ static inline int nxffs_rdopen(FAR struct nxffs_volume_s *volume,
       ret = nxffs_findinode(volume, name, &ofile->entry);
       if (ret != OK)
         {
-          fvdbg("Inode '%s' not found: %d\n", name, -ret);
+          finfo("Inode '%s' not found: %d\n", name, -ret);
           goto errout_with_ofile;
         }
 
@@ -817,7 +817,7 @@ static inline void nxffs_remofile(FAR struct nxffs_volume_s *volume,
     }
   else
     {
-      fdbg("ERROR: Open inode %p not found\n", ofile);
+      ferr("ERROR: Open inode %p not found\n", ofile);
     }
 }
 
@@ -878,7 +878,7 @@ static inline int nxffs_wrclose(FAR struct nxffs_volume_s *volume,
       ret = nxffs_wrblkhdr(volume, wrfile);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to write the final block of the file: %d\n", -ret);
+          ferr("ERROR: Failed to write the final block of the file: %d\n", -ret);
           goto errout;
         }
     }
@@ -892,12 +892,12 @@ static inline int nxffs_wrclose(FAR struct nxffs_volume_s *volume,
 
   if (wrfile->truncate && wrfile->ofile.entry.name)
     {
-      fvdbg("Removing old file: %s\n", wrfile->ofile.entry.name);
+      finfo("Removing old file: %s\n", wrfile->ofile.entry.name);
 
       ret = nxffs_rminode(volume, wrfile->ofile.entry.name);
       if (ret < 0)
         {
-          fdbg("ERROR: nxffs_rminode failed: %d\n", -ret);
+          ferr("ERROR: nxffs_rminode failed: %d\n", -ret);
           goto errout;
         }
     }
@@ -1000,7 +1000,7 @@ int nxffs_open(FAR struct file *filep, FAR const char *relpath,
   FAR struct nxffs_ofile_s *ofile = NULL;
   int ret;
 
-  fvdbg("Open '%s'\n", relpath);
+  finfo("Open '%s'\n", relpath);
 
   /* Sanity checks */
 
@@ -1028,7 +1028,7 @@ int nxffs_open(FAR struct file *filep, FAR const char *relpath,
      {
        case 0:
        default:
-         fdbg("ERROR: One of O_WRONLY/O_RDONLY must be provided\n");
+         ferr("ERROR: One of O_WRONLY/O_RDONLY must be provided\n");
          return -EINVAL;
 
        case O_WROK:
@@ -1040,7 +1040,7 @@ int nxffs_open(FAR struct file *filep, FAR const char *relpath,
          break;
 
        case O_WROK | O_RDOK:
-         fdbg("ERROR: O_RDWR is not supported\n");
+         ferr("ERROR: O_RDWR is not supported\n");
          return -ENOSYS;
      }
 
@@ -1064,16 +1064,16 @@ int nxffs_open(FAR struct file *filep, FAR const char *relpath,
 
 int nxffs_dup(FAR const struct file *oldp, FAR struct file *newp)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ASSERTIONS
   FAR struct nxffs_volume_s *volume;
 #endif
   FAR struct nxffs_ofile_s *ofile;
 
-  fvdbg("Dup %p->%p\n", oldp, newp);
+  finfo("Dup %p->%p\n", oldp, newp);
 
   /* Sanity checks */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ASSERTIONS
   DEBUGASSERT(oldp->f_priv == NULL && oldp->f_inode != NULL);
 
   /* Get the mountpoint private data from the NuttX inode reference in the
@@ -1126,7 +1126,7 @@ int nxffs_close(FAR struct file *filep)
   FAR struct nxffs_ofile_s *ofile;
   int ret;
 
-  fvdbg("Closing\n");
+  finfo("Closing\n");
 
   /* Sanity checks */
 
@@ -1149,7 +1149,7 @@ int nxffs_close(FAR struct file *filep)
   if (ret != OK)
     {
       ret = -get_errno();
-      fdbg("ERROR: sem_wait failed: %d\n", ret);
+      ferr("ERROR: sem_wait failed: %d\n", ret);
       goto errout;
     }
 
@@ -1230,7 +1230,7 @@ int nxffs_wrinode(FAR struct nxffs_volume_s *volume,
   ret = nxffs_rdcache(volume, volume->ioblock);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to read inode header block %d: %d\n",
+      ferr("ERROR: Failed to read inode header block %d: %d\n",
            volume->ioblock, -ret);
       goto errout;
     }
@@ -1269,7 +1269,7 @@ int nxffs_wrinode(FAR struct nxffs_volume_s *volume,
   ret = nxffs_wrcache(volume);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to write inode header block %d: %d\n",
+      ferr("ERROR: Failed to write inode header block %d: %d\n",
            volume->ioblock, -ret);
     }
 
diff --git a/fs/nxffs/nxffs_pack.c b/fs/nxffs/nxffs_pack.c
index 0e816b359d27921de0a698505234d13005af886d..134ee430a63da248c604b823b55ecd9e39796a3a 100644
--- a/fs/nxffs/nxffs_pack.c
+++ b/fs/nxffs/nxffs_pack.c
@@ -331,7 +331,7 @@ static inline int nxffs_startpos(FAR struct nxffs_volume_s *volume,
           ret = nxffs_nextblock(volume, offset, &blkentry);
           if (ret < 0)
             {
-              fdbg("ERROR: Failed to find next data block: %d\n", -ret);
+              ferr("ERROR: Failed to find next data block: %d\n", -ret);
               return ret;
             }
 
@@ -421,7 +421,7 @@ static int nxffs_srcsetup(FAR struct nxffs_volume_s *volume,
       int ret = nxffs_rdblkhdr(volume, offset, &pack->src.blklen);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to verify the data block header: %d\n", -ret);
+          ferr("ERROR: Failed to verify the data block header: %d\n", -ret);
         }
 
       return ret;
@@ -706,7 +706,7 @@ static int nxffs_wrinodehdr(FAR struct nxffs_volume_s *volume,
       ret = nxffs_updateinode(volume, &pack->dest.entry);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to update inode info: %s\n", -ret);
+          ferr("ERROR: Failed to update inode info: %s\n", -ret);
         }
     }
 
@@ -849,7 +849,7 @@ static int nxffs_endsrcblock(FAR struct nxffs_volume_s *volume,
   ret    = nxffs_nextblock(volume, offset, &blkentry);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to find next data block: %d\n", -ret);
+      ferr("ERROR: Failed to find next data block: %d\n", -ret);
       return ret;
     }
 
@@ -893,7 +893,7 @@ static inline int nxffs_packblock(FAR struct nxffs_volume_s *volume,
       ret = nxffs_srcsetup(volume, pack, pack->src.entry.doffset);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to configure the src stream: %d\n", -ret);
+          ferr("ERROR: Failed to configure the src stream: %d\n", -ret);
           return ret;
         }
     }
@@ -919,7 +919,7 @@ static inline int nxffs_packblock(FAR struct nxffs_volume_s *volume,
         }
       else
         {
-          fdbg("ERROR: Failed to configure the dest stream: %d\n", -ret);
+          ferr("ERROR: Failed to configure the dest stream: %d\n", -ret);
           return ret;
         }
     }
@@ -1011,7 +1011,7 @@ static inline int nxffs_packblock(FAR struct nxffs_volume_s *volume,
                 }
               else
                 {
-                  fdbg("ERROR: Failed to configure the dest stream: %d\n", -ret);
+                  ferr("ERROR: Failed to configure the dest stream: %d\n", -ret);
                   return ret;
                 }
             }
@@ -1146,7 +1146,7 @@ static inline int nxffs_packwriter(FAR struct nxffs_volume_s *volume,
       ret = nxffs_srcsetup(volume, pack, pack->src.entry.doffset);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to configure the src stream: %d\n", -ret);
+          ferr("ERROR: Failed to configure the src stream: %d\n", -ret);
           return ret;
         }
     }
@@ -1172,7 +1172,7 @@ static inline int nxffs_packwriter(FAR struct nxffs_volume_s *volume,
         }
       else
         {
-          fdbg("ERROR: Failed to configure the dest stream: %d\n", -ret);
+          ferr("ERROR: Failed to configure the dest stream: %d\n", -ret);
           return ret;
         }
     }
@@ -1380,7 +1380,7 @@ int nxffs_pack(FAR struct nxffs_volume_s *volume)
         }
       else
         {
-          fdbg("ERROR: Failed to find a packing position: %d\n", -ret);
+          ferr("ERROR: Failed to find a packing position: %d\n", -ret);
           return ret;
         }
     }
@@ -1418,7 +1418,7 @@ start_pack:
       ret = MTD_BREAD(volume->mtd, pack.block0, volume->blkper, volume->pack);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to read erase block %d: %d\n", eblock, -ret);
+          ferr("ERROR: Failed to read erase block %d: %d\n", eblock, -ret);
           goto errout_with_pack;
         }
 
@@ -1446,7 +1446,7 @@ start_pack:
             {
               /* Force a the block to be an NXFFS bad block */
 
-              fdbg("ERROR: Failed to read block %d: %d\n", block, ret);
+              ferr("ERROR: Failed to read block %d: %d\n", block, ret);
               nxffs_blkinit(volume, pack.iobuffer, BLOCK_STATE_BAD);
             }
         }
@@ -1514,7 +1514,7 @@ start_pack:
                             {
                               /* Otherwise, something really bad happened */
 
-                              fdbg("ERROR: Failed to pack into block %d: %d\n",
+                              ferr("ERROR: Failed to pack into block %d: %d\n",
                                    block, ret);
                               goto errout_with_pack;
                             }
@@ -1546,7 +1546,7 @@ start_pack:
                             {
                               /* Otherwise, something really bad happened */
 
-                              fdbg("ERROR: Failed to pack into block %d: %d\n",
+                              ferr("ERROR: Failed to pack into block %d: %d\n",
                                    block, ret);
                               goto errout_with_pack;
                             }
@@ -1580,7 +1580,7 @@ start_pack:
       ret = MTD_ERASE(volume->mtd, eblock, 1);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to erase block %d [%d]: %d\n",
+          ferr("ERROR: Failed to erase block %d [%d]: %d\n",
                eblock, pack.block0, -ret);
           goto errout_with_pack;
         }
@@ -1590,7 +1590,7 @@ start_pack:
       ret = MTD_BWRITE(volume->mtd, pack.block0, volume->blkper, volume->pack);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to write erase block %d [%d]: %d\n",
+          ferr("ERROR: Failed to write erase block %d [%d]: %d\n",
                eblock, pack.block0, -ret);
           goto errout_with_pack;
         }
diff --git a/fs/nxffs/nxffs_read.c b/fs/nxffs/nxffs_read.c
index c327013d8291b3f2ae2f6130e2593f5a4b4690f6..4a08a7998bab7564f5e5fbc5cdbe89e9f1199c84 100644
--- a/fs/nxffs/nxffs_read.c
+++ b/fs/nxffs/nxffs_read.c
@@ -106,7 +106,7 @@ static ssize_t nxffs_rdseek(FAR struct nxffs_volume_s *volume,
       ret = nxffs_nextblock(volume, offset, blkentry);
       if (ret < 0)
         {
-          fdbg("ERROR: nxffs_nextblock failed: %d\n", -ret);
+          ferr("ERROR: nxffs_nextblock failed: %d\n", -ret);
           return ret;
         }
 
@@ -150,7 +150,7 @@ ssize_t nxffs_read(FAR struct file *filep, FAR char *buffer, size_t buflen)
   size_t readsize;
   int ret;
 
-  fvdbg("Read %d bytes from offset %d\n", buflen, filep->f_pos);
+  finfo("Read %d bytes from offset %d\n", buflen, filep->f_pos);
 
   /* Sanity checks */
 
@@ -173,7 +173,7 @@ ssize_t nxffs_read(FAR struct file *filep, FAR char *buffer, size_t buflen)
   if (ret != OK)
     {
       ret = -get_errno();
-      fdbg("ERROR: sem_wait failed: %d\n", ret);
+      ferr("ERROR: sem_wait failed: %d\n", ret);
       goto errout;
     }
 
@@ -181,7 +181,7 @@ ssize_t nxffs_read(FAR struct file *filep, FAR char *buffer, size_t buflen)
 
   if ((ofile->oflags & O_RDOK) == 0)
     {
-      fdbg("ERROR: File not open for read access\n");
+      ferr("ERROR: File not open for read access\n");
       ret = -EACCES;
       goto errout_with_semaphore;
     }
@@ -205,7 +205,7 @@ ssize_t nxffs_read(FAR struct file *filep, FAR char *buffer, size_t buflen)
       ret = nxffs_rdseek(volume, &ofile->entry, filep->f_pos, &blkentry);
       if (ret < 0)
         {
-          fdbg("ERROR: nxffs_rdseek failed: %d\n", -ret);
+          ferr("ERROR: nxffs_rdseek failed: %d\n", -ret);
           ret = -EACCES;
           goto errout_with_semaphore;
         }
@@ -289,7 +289,7 @@ int nxffs_nextblock(FAR struct nxffs_volume_s *volume, off_t offset,
       ch = nxffs_getc(volume, SIZEOF_NXFFS_DATA_HDR - nmagic);
       if (ch < 0)
         {
-          fdbg("ERROR: nxffs_getc failed: %d\n", -ch);
+          ferr("ERROR: nxffs_getc failed: %d\n", -ch);
           return ch;
         }
 
@@ -304,7 +304,7 @@ int nxffs_nextblock(FAR struct nxffs_volume_s *volume, off_t offset,
 
           if (++nerased >= NXFFS_NERASED)
             {
-              fvdbg("No entry found\n");
+              finfo("No entry found\n");
               return -ENOENT;
             }
         }
@@ -358,7 +358,7 @@ int nxffs_nextblock(FAR struct nxffs_volume_s *volume, off_t offset,
               ret = nxffs_rdblkhdr(volume, blkentry->hoffset, &blkentry->datlen);
               if (ret == OK)
                 {
-                  fvdbg("Found a valid data block, offset: %d datlen: %d\n",
+                  finfo("Found a valid data block, offset: %d datlen: %d\n",
                         blkentry->hoffset, blkentry->datlen);
                   return OK;
                 }
@@ -412,7 +412,7 @@ int nxffs_rdblkhdr(FAR struct nxffs_volume_s *volume, off_t offset,
   ret = nxffs_rdcache(volume, volume->ioblock);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to read data into cache: %d\n", ret);
+      ferr("ERROR: Failed to read data into cache: %d\n", ret);
       return ret;
     }
 
@@ -433,7 +433,7 @@ int nxffs_rdblkhdr(FAR struct nxffs_volume_s *volume, off_t offset,
 
   if ((uint32_t)doffset + (uint32_t)dlen > (uint32_t)volume->geo.blocksize)
     {
-      fdbg("ERROR: Data length=%d is unreasonable at offset=%d\n", dlen, doffset);
+      ferr("ERROR: Data length=%d is unreasonable at offset=%d\n", dlen, doffset);
       return -EIO;
     }
 
@@ -447,7 +447,7 @@ int nxffs_rdblkhdr(FAR struct nxffs_volume_s *volume, off_t offset,
 
   if (crc != ecrc)
     {
-      fdbg("ERROR: CRC failure\n");
+      ferr("ERROR: CRC failure\n");
       return -EIO;
     }
 
diff --git a/fs/nxffs/nxffs_reformat.c b/fs/nxffs/nxffs_reformat.c
index cf2639a04786fb6a5fb53ecceee0e9941435843b..8c3f73222c392ad81b3f98a78674f1e778f52bea 100644
--- a/fs/nxffs/nxffs_reformat.c
+++ b/fs/nxffs/nxffs_reformat.c
@@ -96,7 +96,7 @@ static int nxffs_format(FAR struct nxffs_volume_s *volume)
       ret = MTD_ERASE(volume->mtd, eblock, 1);
       if (ret < 0)
         {
-          fdbg("ERROR: Erase block %d failed: %d\n", eblock, ret);
+          ferr("ERROR: Erase block %d failed: %d\n", eblock, ret);
           return ret;
         }
 
@@ -106,7 +106,7 @@ static int nxffs_format(FAR struct nxffs_volume_s *volume)
       nxfrd = MTD_BWRITE(volume->mtd, lblock, volume->blkper, volume->pack);
       if (nxfrd != volume->blkper)
         {
-          fdbg("ERROR: Write erase block %d failed: %d\n", lblock, nxfrd);
+          ferr("ERROR: Write erase block %d failed: %d\n", lblock, nxfrd);
           return -EIO;
         }
     }
@@ -157,7 +157,7 @@ static int nxffs_badblocks(FAR struct nxffs_volume_s *volume)
       nxfrd  = MTD_BREAD(volume->mtd, lblock, volume->blkper, volume->pack);
       if (nxfrd != volume->blkper)
         {
-          fdbg("ERROR: Read erase block %d failed: %d\n", lblock, nxfrd);
+          ferr("ERROR: Read erase block %d failed: %d\n", lblock, nxfrd);
           return -EIO;
         }
 #endif
@@ -195,7 +195,7 @@ static int nxffs_badblocks(FAR struct nxffs_volume_s *volume)
                * read a block with uncorrectable bit errors.
                */
 
-              fdbg("ERROR: Failed to read block %d: %d\n",
+              ferr("ERROR: Failed to read block %d: %d\n",
                    block, (int)nxfrd);
 
               good = false;
@@ -244,7 +244,7 @@ static int nxffs_badblocks(FAR struct nxffs_volume_s *volume)
           nxfrd = MTD_BWRITE(volume->mtd, lblock, volume->blkper, volume->pack);
           if (nxfrd != volume->blkper)
             {
-              fdbg("ERROR: Write erase block %d failed: %d\n", lblock, nxfrd);
+              ferr("ERROR: Write erase block %d failed: %d\n", lblock, nxfrd);
               return -EIO;
             }
         }
@@ -283,7 +283,7 @@ int nxffs_reformat(FAR struct nxffs_volume_s *volume)
   ret = nxffs_format(volume);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to reformat the volume: %d\n", -ret);
+      ferr("ERROR: Failed to reformat the volume: %d\n", -ret);
       return ret;
     }
 
@@ -292,7 +292,7 @@ int nxffs_reformat(FAR struct nxffs_volume_s *volume)
   ret = nxffs_badblocks(volume);
   if (ret < 0)
     {
-      fdbg("ERROR: Bad block check failed: %d\n", -ret);
+      ferr("ERROR: Bad block check failed: %d\n", -ret);
     }
 
   return ret;
diff --git a/fs/nxffs/nxffs_stat.c b/fs/nxffs/nxffs_stat.c
index b1dbdcbaf9b97c9f9d5eb375c0343ede9af3df20..7a0f3a2b04c60f6c20f6e389504a9dce19f5a301 100644
--- a/fs/nxffs/nxffs_stat.c
+++ b/fs/nxffs/nxffs_stat.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/nxffs/nxffs_stat.c
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * References: Linux/Documentation/filesystems/romfs.txt
@@ -47,6 +47,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -70,7 +71,7 @@ int nxffs_statfs(FAR struct inode *mountpt, FAR struct statfs *buf)
   FAR struct nxffs_volume_s *volume;
   int ret;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* Sanity checks */
 
@@ -116,7 +117,7 @@ int nxffs_stat(FAR struct inode *mountpt, FAR const char *relpath,
   struct nxffs_entry_s entry;
   int ret;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* Sanity checks */
 
@@ -145,10 +146,12 @@ int nxffs_stat(FAR struct inode *mountpt, FAR const char *relpath,
       ret = nxffs_findinode(volume, relpath, &entry);
       if (ret < 0)
         {
-          fdbg("ERROR: Inode '%s' not found: %d\n", -ret);
+          ferr("ERROR: Inode '%s' not found: %d\n", -ret);
           goto errout_with_semaphore;
         }
 
+      /* Return status information based on the directory entry */
+
       buf->st_blocks  = entry.datlen / (volume->geo.blocksize - SIZEOF_NXFFS_BLOCK_HDR);
       buf->st_mode    = S_IFREG | S_IXOTH | S_IXGRP | S_IXUSR;
       buf->st_size    = entry.datlen;
@@ -175,3 +178,58 @@ errout_with_semaphore:
 errout:
   return ret;
 }
+
+/****************************************************************************
+ * Name: nxffs_fstat
+ *
+ * Description:
+ *   Obtain information about an open file associated with the file
+ *   descriptor 'fd', and will write it to the area pointed to by 'buf'.
+ *
+ ****************************************************************************/
+
+int nxffs_fstat(FAR const struct file *filep, FAR struct stat *buf)
+{
+
+  FAR struct nxffs_volume_s *volume;
+  FAR struct nxffs_ofile_s *ofile;
+  int ret;
+
+  finfo("Buf %s\n", buf);
+  DEBUGASSERT(filep != NULL && buf != NULL);
+
+  /* Recover the open file state from the struct file instance */
+
+  DEBUGASSERT(filep->f_priv != NULL && filep->f_inode != NULL);
+  ofile = (FAR struct nxffs_ofile_s *)filep->f_priv;
+
+  /* Recover the volume state from the open file */
+
+  volume = (FAR struct nxffs_volume_s *)filep->f_inode->i_private;
+  DEBUGASSERT(volume != NULL);
+
+  /* Get exclusive access to the volume.  Note that the volume exclsem
+   * protects the open file list.
+   */
+
+  ret = sem_wait(&volume->exclsem);
+  if (ret != OK)
+    {
+      int errcode = get_errno();
+      ferr("ERROR: sem_wait failed: %d\n", errcode);
+      return -errcode;
+    }
+
+  /* Return status information based on the directory entry */
+
+  buf->st_blocks = ofile->entry.datlen /
+                   (volume->geo.blocksize - SIZEOF_NXFFS_BLOCK_HDR);
+  buf->st_mode   = S_IFREG | S_IXOTH | S_IXGRP | S_IXUSR;
+  buf->st_size   = ofile->entry.datlen;
+  buf->st_atime  = ofile->entry.utc;
+  buf->st_mtime  = ofile->entry.utc;
+  buf->st_ctime  = ofile->entry.utc;
+
+  sem_post(&volume->exclsem);
+  return OK;
+}
diff --git a/fs/nxffs/nxffs_unlink.c b/fs/nxffs/nxffs_unlink.c
index bc42b5a317451a423278e095cd2114d57760ec89..2ca09dc970d8d1f1f1bd9893aa24c0010bbf0e37 100644
--- a/fs/nxffs/nxffs_unlink.c
+++ b/fs/nxffs/nxffs_unlink.c
@@ -86,7 +86,7 @@ int nxffs_rminode(FAR struct nxffs_volume_s *volume, FAR const char *name)
     {
       /* We can't remove the inode if it is open */
 
-      fdbg("ERROR: Inode '%s' is open\n", name);
+      ferr("ERROR: Inode '%s' is open\n", name);
       ret = -EBUSY;
       goto errout;
     }
@@ -96,7 +96,7 @@ int nxffs_rminode(FAR struct nxffs_volume_s *volume, FAR const char *name)
   ret = nxffs_findinode(volume, name, &entry);
   if (ret < 0)
     {
-      fdbg("ERROR: Inode '%s' not found\n", name);
+      ferr("ERROR: Inode '%s' not found\n", name);
       goto errout;
     }
 
@@ -111,7 +111,7 @@ int nxffs_rminode(FAR struct nxffs_volume_s *volume, FAR const char *name)
   ret = nxffs_rdcache(volume, volume->ioblock);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to read block %d into cache: %d\n",
+      ferr("ERROR: Failed to read block %d into cache: %d\n",
            volume->ioblock, ret);
       goto errout_with_entry;
     }
@@ -126,7 +126,7 @@ int nxffs_rminode(FAR struct nxffs_volume_s *volume, FAR const char *name)
   ret = nxffs_wrcache(volume);
   if (ret < 0)
     {
-      fdbg("ERROR: Failed to write block %d: %d\n",
+      ferr("ERROR: Failed to write block %d: %d\n",
            volume->ioblock, ret);
     }
 
@@ -148,7 +148,7 @@ int nxffs_unlink(FAR struct inode *mountpt, FAR const char *relpath)
   FAR struct nxffs_volume_s *volume;
   int ret;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* Sanity checks */
 
diff --git a/fs/nxffs/nxffs_write.c b/fs/nxffs/nxffs_write.c
index 423c61c9f6ea670532e85d34180ac38b89e2a078..1ce11f42866403cf83a013c46da8bad1737ac6c5 100644
--- a/fs/nxffs/nxffs_write.c
+++ b/fs/nxffs/nxffs_write.c
@@ -239,7 +239,7 @@ static inline int nxffs_wralloc(FAR struct nxffs_volume_s *volume,
 
       if (ret != -ENOSPC || packed)
         {
-          fdbg("ERROR: Failed to find inode header memory: %d\n", -ret);
+          ferr("ERROR: Failed to find inode header memory: %d\n", -ret);
           return -ENOSPC;
         }
 
@@ -250,7 +250,7 @@ static inline int nxffs_wralloc(FAR struct nxffs_volume_s *volume,
       ret = nxffs_pack(volume);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to pack the volume: %d\n", -ret);
+          ferr("ERROR: Failed to pack the volume: %d\n", -ret);
           return ret;
         }
 
@@ -309,7 +309,7 @@ static inline int nxffs_reverify(FAR struct nxffs_volume_s *volume,
 
       if (crc != wrfile->crc)
         {
-          fdbg("ERROR: CRC failure\n");
+          ferr("ERROR: CRC failure\n");
           return -EIO;
         }
     }
@@ -389,7 +389,7 @@ static inline ssize_t nxffs_wrappend(FAR struct nxffs_volume_s *volume,
           ret = nxffs_wrcache(volume);
           if (ret < 0)
             {
-              fdbg("ERROR: nxffs_wrcache failed: %d\n", -ret);
+              ferr("ERROR: nxffs_wrcache failed: %d\n", -ret);
               return ret;
             }
         }
@@ -404,7 +404,7 @@ static inline ssize_t nxffs_wrappend(FAR struct nxffs_volume_s *volume,
       ret = nxffs_wrblkhdr(volume, wrfile);
       if (ret < 0)
         {
-          fdbg("ERROR: nxffs_wrblkdhr failed: %d\n", -ret);
+          ferr("ERROR: nxffs_wrblkdhr failed: %d\n", -ret);
           return ret;
         }
     }
@@ -436,7 +436,7 @@ ssize_t nxffs_write(FAR struct file *filep, FAR const char *buffer, size_t bufle
   ssize_t total;
   int ret;
 
-  fvdbg("Write %d bytes to offset %d\n", buflen, filep->f_pos);
+  finfo("Write %d bytes to offset %d\n", buflen, filep->f_pos);
 
   /* Sanity checks */
 
@@ -459,7 +459,7 @@ ssize_t nxffs_write(FAR struct file *filep, FAR const char *buffer, size_t bufle
   if (ret != OK)
     {
       ret = -get_errno();
-      fdbg("ERROR: sem_wait failed: %d\n", ret);
+      ferr("ERROR: sem_wait failed: %d\n", ret);
       goto errout;
     }
 
@@ -467,7 +467,7 @@ ssize_t nxffs_write(FAR struct file *filep, FAR const char *buffer, size_t bufle
 
   if ((wrfile->ofile.oflags & O_WROK) == 0)
     {
-      fdbg("ERROR: File not open for write access\n");
+      ferr("ERROR: File not open for write access\n");
       ret = -EACCES;
       goto errout_with_semaphore;
     }
@@ -490,7 +490,7 @@ ssize_t nxffs_write(FAR struct file *filep, FAR const char *buffer, size_t bufle
           ret = nxffs_wralloc(volume, wrfile, remaining);
           if (ret < 0)
             {
-              fdbg("ERROR: Failed to allocate a data block: %d\n", -ret);
+              ferr("ERROR: Failed to allocate a data block: %d\n", -ret);
               goto errout_with_semaphore;
             }
         }
@@ -504,7 +504,7 @@ ssize_t nxffs_write(FAR struct file *filep, FAR const char *buffer, size_t bufle
       ret = nxffs_reverify(volume, wrfile);
       if (ret < 0)
         {
-          fdbg("ERROR: Failed to verify FLASH data block: %d\n", -ret);
+          ferr("ERROR: Failed to verify FLASH data block: %d\n", -ret);
           goto errout_with_semaphore;
         }
 
@@ -515,7 +515,7 @@ ssize_t nxffs_write(FAR struct file *filep, FAR const char *buffer, size_t bufle
       nwritten = nxffs_wrappend(volume, wrfile, &buffer[total], remaining);
       if (nwritten < 0)
         {
-          fdbg("ERROR: Failed to append to FLASH to a data block: %d\n", -ret);
+          ferr("ERROR: Failed to append to FLASH to a data block: %d\n", -ret);
           goto errout_with_semaphore;
         }
 
@@ -607,7 +607,7 @@ int nxffs_wrreserve(FAR struct nxffs_volume_s *volume, size_t size)
         {
           /* Return -ENOSPC to indicate that the volume is full */
 
-          fdbg("ERROR: No space in last block\n");
+          ferr("ERROR: No space in last block\n");
           return -ENOSPC;
         }
 
@@ -619,7 +619,7 @@ int nxffs_wrreserve(FAR struct nxffs_volume_s *volume, size_t size)
       ret = nxffs_validblock(volume, &volume->ioblock);
       if (ret < 0)
         {
-          fdbg("ERROR: No more valid blocks\n");
+          ferr("ERROR: No more valid blocks\n");
           return ret;
         }
 
@@ -695,7 +695,7 @@ int nxffs_wrverify(FAR struct nxffs_volume_s *volume, size_t size)
            * the block has uncorrectable bit errors.
            */
 
-          fdbg("ERROR: Failed to read block %d: %d\n",
+          ferr("ERROR: Failed to read block %d: %d\n",
                volume->ioblock, -ret);
         }
 
@@ -754,7 +754,7 @@ int nxffs_wrverify(FAR struct nxffs_volume_s *volume, size_t size)
       ret = nxffs_validblock(volume, &volume->ioblock);
       if (ret < 0)
         {
-          fdbg("ERROR: No more valid blocks\n");
+          ferr("ERROR: No more valid blocks\n");
           return ret;
         }
 
@@ -766,7 +766,7 @@ int nxffs_wrverify(FAR struct nxffs_volume_s *volume, size_t size)
    * the object.
    */
 
-  fdbg("ERROR: Not enough memory left to hold the file header\n");
+  ferr("ERROR: Not enough memory left to hold the file header\n");
   return -ENOSPC;
 }
 
@@ -812,7 +812,7 @@ int nxffs_wrblkhdr(FAR struct nxffs_volume_s *volume,
   ret = nxffs_wrcache(volume);
   if (ret < 0)
     {
-      fdbg("ERROR: nxffs_wrcache failed: %d\n", -ret);
+      ferr("ERROR: nxffs_wrcache failed: %d\n", -ret);
       goto errout;
     }
 
diff --git a/fs/procfs/fs_procfs.c b/fs/procfs/fs_procfs.c
index 506ab9fcb5412da70a2f8ab95323eee0e576eba8..0be299c3954c0f785e3edcf725da543dd7fafe65 100644
--- a/fs/procfs/fs_procfs.c
+++ b/fs/procfs/fs_procfs.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/procfs/fs_procfs.c
  *
- *   Copyright (C) 2013-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -60,7 +60,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 #if !defined(CONFIG_DISABLE_MOUNTPOINT) && defined(CONFIG_FS_PROCFS)
 
@@ -183,6 +183,8 @@ static int     procfs_ioctl(FAR struct file *filep, int cmd,
 
 static int     procfs_dup(FAR const struct file *oldp,
                  FAR struct file *newp);
+static int     procfs_fstat(FAR const struct file *filep,
+                 FAR struct stat *buf);
 
 static int     procfs_opendir(FAR struct inode *mountpt, const char *relpath,
                  FAR struct fs_dirent_s *dir);
@@ -235,6 +237,7 @@ const struct mountpt_operations procfs_operations =
 
   NULL,              /* sync */
   procfs_dup,        /* dup */
+  procfs_fstat,      /* fstat */
 
   procfs_opendir,    /* opendir */
   procfs_closedir,   /* closedir */
@@ -322,7 +325,7 @@ static int procfs_open(FAR struct file *filep, FAR const char *relpath,
 {
   int x, ret = -ENOENT;
 
-  fvdbg("Open '%s'\n", relpath);
+  finfo("Open '%s'\n", relpath);
 
   /* Perform the stat based on the procfs_entry operations */
 
@@ -382,7 +385,7 @@ static ssize_t procfs_read(FAR struct file *filep, FAR char *buffer,
   FAR struct procfs_file_s *handler;
   ssize_t ret = 0;
 
-  fvdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+  finfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
 
   /* Recover our private data from the struct file instance */
 
@@ -406,7 +409,7 @@ static ssize_t procfs_write(FAR struct file *filep, FAR const char *buffer,
   FAR struct procfs_file_s *handler;
   ssize_t ret = 0;
 
-  fvdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+  finfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
 
   /* Recover our private data from the struct file instance */
 
@@ -429,7 +432,7 @@ static ssize_t procfs_write(FAR struct file *filep, FAR const char *buffer,
 
 static int procfs_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 {
-  fvdbg("cmd: %d arg: %08lx\n", cmd, arg);
+  finfo("cmd: %d arg: %08lx\n", cmd, arg);
 
   /* No IOCTL commands supported */
 
@@ -448,7 +451,7 @@ static int procfs_dup(FAR const struct file *oldp, FAR struct file *newp)
 {
   FAR struct procfs_file_s *oldattr;
 
-  fvdbg("Dup %p->%p\n", oldp, newp);
+  finfo("Dup %p->%p\n", oldp, newp);
 
   /* Recover our private data from the old struct file instance */
 
@@ -460,6 +463,46 @@ static int procfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   return oldattr->procfsentry->ops->dup(oldp, newp);
 }
 
+/****************************************************************************
+ * Name: procfs_fstat
+ *
+ * Description:
+ *   Obtain information about an open file associated with the file
+ *   descriptor 'fd', and will write it to the area pointed to by 'buf'.
+ *
+ ****************************************************************************/
+
+static int procfs_fstat(FAR const struct file *filep, FAR struct stat *buf)
+{
+  FAR struct procfs_file_s *handler;
+
+  finfo("buf=%p\n", buf);
+
+  /* Recover our private data from the struct file instance */
+
+  handler = (FAR struct procfs_file_s *)filep->f_priv;
+  DEBUGASSERT(handler);
+
+  /* The procfs file system contains only directory and data file entries.
+   * Since the file has been opened, we know that this is a data file and,
+   * at a minimum, readable.
+   */
+
+  memset(buf, 0, sizeof(struct stat));
+  buf->st_mode = S_IFREG | S_IROTH | S_IRGRP | S_IRUSR;
+
+  /* If the write method is provided, then let's also claim that the file is
+   * writable.
+   */
+
+  if (handler->procfsentry->ops->write != NULL)
+    {
+      buf->st_mode |= S_IWOTH | S_IWGRP | S_IWUSR;
+    }
+
+  return OK;
+}
+
 /****************************************************************************
  * Name: procfs_opendir
  *
@@ -476,7 +519,7 @@ static int procfs_opendir(FAR struct inode *mountpt, FAR const char *relpath,
   FAR void *priv = NULL;
   irqstate_t flags;
 
-  fvdbg("relpath: \"%s\"\n", relpath ? relpath : "NULL");
+  finfo("relpath: \"%s\"\n", relpath ? relpath : "NULL");
   DEBUGASSERT(mountpt && relpath && dir && !dir->u.procfs);
 
   /* The relative must be either:
@@ -496,7 +539,7 @@ static int procfs_opendir(FAR struct inode *mountpt, FAR const char *relpath,
 
       if (!level0)
         {
-          fdbg("ERROR: Failed to allocate the level0 directory structure\n");
+          ferr("ERROR: Failed to allocate the level0 directory structure\n");
           return -ENOMEM;
         }
 
@@ -575,7 +618,7 @@ static int procfs_opendir(FAR struct inode *mountpt, FAR const char *relpath,
 
               if (!level1)
                 {
-                  fdbg("ERROR: Failed to allocate the level0 directory structure\n");
+                  ferr("ERROR: Failed to allocate the level0 directory structure\n");
                   return -ENOMEM;
                 }
 
@@ -717,7 +760,7 @@ static int procfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir)
                * error -ENOENT
                */
 
-              fvdbg("Entry %d: End of directory\n", index);
+              finfo("Entry %d: End of directory\n", index);
               ret = -ENOENT;
             }
           else
@@ -757,7 +800,7 @@ static int procfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir)
 
           if (!tcb)
             {
-              fdbg("ERROR: PID %d is no longer valid\n", (int)pid);
+              ferr("ERROR: PID %d is no longer valid\n", (int)pid);
               return -ENOENT;
             }
 
@@ -946,6 +989,7 @@ static int procfs_stat(struct inode *mountpt, const char *relpath,
    *   is a file.
    */
 
+  memset(buf, 0, sizeof(struct stat));
   if (!relpath || relpath[0] == '\0')
     {
       /* The path refers to the top level directory */
@@ -988,11 +1032,6 @@ static int procfs_stat(struct inode *mountpt, const char *relpath,
         }
     }
 
-  /* File/directory size, access block size */
-
-  buf->st_size    = 0;
-  buf->st_blksize = 0;
-  buf->st_blocks  = 0;
   return ret;
 }
 
diff --git a/fs/procfs/fs_procfscpuload.c b/fs/procfs/fs_procfscpuload.c
index 2f54ab841fecd15ba1aa863961be73463484a1f3..11af96c34bdd2939486859e40e4393bc4bc04b8d 100644
--- a/fs/procfs/fs_procfscpuload.c
+++ b/fs/procfs/fs_procfscpuload.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/procfs/fs_procfscpuload.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -138,7 +138,7 @@ static int cpuload_open(FAR struct file *filep, FAR const char *relpath,
 {
   FAR struct cpuload_file_s *attr;
 
-  fvdbg("Open '%s'\n", relpath);
+  finfo("Open '%s'\n", relpath);
 
   /* PROCFS is read-only.  Any attempt to open with any kind of write
    * access is not permitted.
@@ -148,7 +148,7 @@ static int cpuload_open(FAR struct file *filep, FAR const char *relpath,
 
   if ((oflags & O_WRONLY) != 0 || (oflags & O_RDONLY) == 0)
     {
-      fdbg("ERROR: Only O_RDONLY supported\n");
+      ferr("ERROR: Only O_RDONLY supported\n");
       return -EACCES;
     }
 
@@ -156,7 +156,7 @@ static int cpuload_open(FAR struct file *filep, FAR const char *relpath,
 
   if (strcmp(relpath, "cpuload") != 0)
     {
-      fdbg("ERROR: relpath is '%s'\n", relpath);
+      ferr("ERROR: relpath is '%s'\n", relpath);
       return -ENOENT;
     }
 
@@ -165,7 +165,7 @@ static int cpuload_open(FAR struct file *filep, FAR const char *relpath,
   attr = (FAR struct cpuload_file_s *)kmm_zalloc(sizeof(struct cpuload_file_s));
   if (!attr)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
@@ -207,7 +207,7 @@ static ssize_t cpuload_read(FAR struct file *filep, FAR char *buffer,
   off_t offset;
   ssize_t ret;
 
-  fvdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+  finfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
 
   /* Recover our private data from the struct file instance */
 
@@ -288,7 +288,7 @@ static int cpuload_dup(FAR const struct file *oldp, FAR struct file *newp)
   FAR struct cpuload_file_s *oldattr;
   FAR struct cpuload_file_s *newattr;
 
-  fvdbg("Dup %p->%p\n", oldp, newp);
+  finfo("Dup %p->%p\n", oldp, newp);
 
   /* Recover our private data from the old struct file instance */
 
@@ -300,7 +300,7 @@ static int cpuload_dup(FAR const struct file *oldp, FAR struct file *newp)
   newattr = (FAR struct cpuload_file_s *)kmm_malloc(sizeof(struct cpuload_file_s));
   if (!newattr)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
@@ -327,16 +327,14 @@ static int cpuload_stat(const char *relpath, struct stat *buf)
 
   if (strcmp(relpath, "cpuload") != 0)
     {
-      fdbg("ERROR: relpath is '%s'\n", relpath);
+      ferr("ERROR: relpath is '%s'\n", relpath);
       return -ENOENT;
     }
 
   /* "cpuload" is the name for a read-only file */
 
-  buf->st_mode    = S_IFREG | S_IROTH | S_IRGRP | S_IRUSR;
-  buf->st_size    = 0;
-  buf->st_blksize = 0;
-  buf->st_blocks  = 0;
+  memset(buf, 0, sizeof(struct stat));
+  buf->st_mode = S_IFREG | S_IROTH | S_IRGRP | S_IRUSR;
   return OK;
 }
 
diff --git a/fs/procfs/fs_procfskmm.c b/fs/procfs/fs_procfskmm.c
index 3424338dc04893213f7cac08a77849179eb50829..d3c8699d19f706613b487e59c91063c742c32118 100644
--- a/fs/procfs/fs_procfskmm.c
+++ b/fs/procfs/fs_procfskmm.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/procfs/fs_procfskmm.c
  *
- *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -137,7 +137,7 @@ static int kmm_open(FAR struct file *filep, FAR const char *relpath,
 {
   FAR struct kmm_file_s *procfile;
 
-  fvdbg("Open '%s'\n", relpath);
+  finfo("Open '%s'\n", relpath);
 
   /* PROCFS is read-only.  Any attempt to open with any kind of write
    * access is not permitted.
@@ -147,7 +147,7 @@ static int kmm_open(FAR struct file *filep, FAR const char *relpath,
 
   if ((oflags & O_WRONLY) != 0 || (oflags & O_RDONLY) == 0)
     {
-      fdbg("ERROR: Only O_RDONLY supported\n");
+      ferr("ERROR: Only O_RDONLY supported\n");
       return -EACCES;
     }
 
@@ -155,7 +155,7 @@ static int kmm_open(FAR struct file *filep, FAR const char *relpath,
 
   if (strcmp(relpath, "kmm") != 0)
     {
-      fdbg("ERROR: relpath is '%s'\n", relpath);
+      ferr("ERROR: relpath is '%s'\n", relpath);
       return -ENOENT;
     }
 
@@ -164,7 +164,7 @@ static int kmm_open(FAR struct file *filep, FAR const char *relpath,
   procfile = (FAR struct kmm_file_s *)kmm_zalloc(sizeof(struct kmm_file_s));
   if (!procfile)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
@@ -208,7 +208,7 @@ static ssize_t kmm_read(FAR struct file *filep, FAR char *buffer,
   size_t totalsize;
   off_t offset;
 
-  fvdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+  finfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
 
   DEBUGASSERT(filep != NULL && buffer != NULL && buflen > 0);
   offset = filep->f_pos;
@@ -267,7 +267,7 @@ static int kmm_dup(FAR const struct file *oldp, FAR struct file *newp)
   FAR struct kmm_file_s *oldattr;
   FAR struct kmm_file_s *newattr;
 
-  fvdbg("Dup %p->%p\n", oldp, newp);
+  finfo("Dup %p->%p\n", oldp, newp);
 
   /* Recover our private data from the old struct file instance */
 
@@ -279,7 +279,7 @@ static int kmm_dup(FAR const struct file *oldp, FAR struct file *newp)
   newattr = (FAR struct kmm_file_s *)kmm_malloc(sizeof(struct kmm_file_s));
   if (!newattr)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
@@ -306,16 +306,14 @@ static int kmm_stat(FAR const char *relpath, FAR struct stat *buf)
 
   if (strcmp(relpath, "kmm") != 0)
     {
-      fdbg("ERROR: relpath is '%s'\n", relpath);
+      ferr("ERROR: relpath is '%s'\n", relpath);
       return -ENOENT;
     }
 
   /* "kmm" is the name for a read-only file */
 
-  buf->st_mode    = S_IFREG | S_IROTH | S_IRGRP | S_IRUSR;
-  buf->st_size    = 0;
-  buf->st_blksize = 0;
-  buf->st_blocks  = 0;
+  memset(buf, 0, sizeof(struct stat));
+  buf->st_mode = S_IFREG | S_IROTH | S_IRGRP | S_IRUSR;
   return OK;
 }
 
diff --git a/fs/procfs/fs_procfsproc.c b/fs/procfs/fs_procfsproc.c
index f5f6c0397f1a024a6d9f0adab1f93cb08e8b6105..c8824b9ca0f2efed11d19349b4a01fa4f5ab37c6 100644
--- a/fs/procfs/fs_procfsproc.c
+++ b/fs/procfs/fs_procfsproc.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/procfs/fs_procfsproc.c
  *
- *   Copyright (C) 2013-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -316,6 +316,9 @@ static FAR const char *g_statenames[] =
   "Invalid",
   "Waiting,Unlock",
   "Ready",
+#ifdef CONFIG_SMP
+  "Assigned",
+#endif
   "Running",
   "Inactive",
   "Waiting,Semaphore",
@@ -389,7 +392,7 @@ static ssize_t proc_status(FAR struct proc_file_s *procfile,
                            FAR struct tcb_s *tcb, FAR char *buffer,
                            size_t buflen, off_t offset)
 {
-#ifdef HAVE_GROUPID
+#ifdef CONFIG_SCHED_HAVE_PARENT
   FAR struct task_group_s *group;
 #endif
   FAR const char *policy;
@@ -439,15 +442,15 @@ static ssize_t proc_status(FAR struct proc_file_s *procfile,
     }
 
 #ifdef CONFIG_SCHED_HAVE_PARENT
-#ifdef HAVE_GROUPID
   group = tcb->group;
   DEBUGASSERT(group);
 
+#ifdef HAVE_GROUPID
   linesize   = snprintf(procfile->line, STATUS_LINELEN, "%-12s%d\n", "Group:",
                         group->tg_pgid);
 #else
   linesize   = snprintf(procfile->line, STATUS_LINELEN, "%-12s%d\n", "PPID:",
-                        tcb->ppid);
+                        group->tg_ppid);
 #endif
 
   copysize   = procfs_memcpy(procfile->line, linesize, buffer, remaining, &offset);
@@ -957,7 +960,7 @@ static ssize_t proc_groupfd(FAR struct proc_file_s *procfile,
 #endif
 
 #if CONFIG_NSOCKET_DESCRIPTORS > 0
-  linesize   = snprintf(procfile->line, STATUS_LINELEN, "\n%3-s %-2s %-3s %s\n",
+  linesize   = snprintf(procfile->line, STATUS_LINELEN, "\n%-3s %-2s %-3s %s\n",
                         "SD", "RF", "TYP", "FLAGS");
   copysize   = procfs_memcpy(procfile->line, linesize, buffer, remaining, &offset);
 
@@ -980,7 +983,7 @@ static ssize_t proc_groupfd(FAR struct proc_file_s *procfile,
         {
           linesize   = snprintf(procfile->line, STATUS_LINELEN, "%3d %2d %3d %02x",
                                 i + CONFIG_NFILE_DESCRIPTORS,
-                                (long)socket->s_crefs, socket->s_type, socket->s_flags);
+                                socket->s_crefs, socket->s_type, socket->s_flags);
           copysize   = procfs_memcpy(procfile->line, linesize, buffer, remaining, &offset);
 
           totalsize += copysize;
@@ -1013,7 +1016,7 @@ static int proc_open(FAR struct file *filep, FAR const char *relpath,
   unsigned long tmp;
   pid_t pid;
 
-  fvdbg("Open '%s'\n", relpath);
+  finfo("Open '%s'\n", relpath);
 
   /* PROCFS is read-only.  Any attempt to open with any kind of write
    * access is not permitted.
@@ -1023,7 +1026,7 @@ static int proc_open(FAR struct file *filep, FAR const char *relpath,
 
   if ((oflags & O_WRONLY) != 0 || (oflags & O_RDONLY) == 0)
     {
-      fdbg("ERROR: Only O_RDONLY supported\n");
+      ferr("ERROR: Only O_RDONLY supported\n");
       return -EACCES;
     }
 
@@ -1034,7 +1037,7 @@ static int proc_open(FAR struct file *filep, FAR const char *relpath,
 
   if (!ptr || *ptr != '/')
     {
-      fdbg("ERROR: Invalid path \"%s\"\n", relpath);
+      ferr("ERROR: Invalid path \"%s\"\n", relpath);
       return -ENOENT;
     }
 
@@ -1048,7 +1051,7 @@ static int proc_open(FAR struct file *filep, FAR const char *relpath,
 
   if (tmp >= 32768)
     {
-      fdbg("ERROR: Invalid PID %ld\n", tmp);
+      ferr("ERROR: Invalid PID %ld\n", tmp);
       return -ENOENT;
     }
 
@@ -1062,7 +1065,7 @@ static int proc_open(FAR struct file *filep, FAR const char *relpath,
 
   if (!tcb)
     {
-      fdbg("ERROR: PID %d is no longer valid\n", (int)pid);
+      ferr("ERROR: PID %d is no longer valid\n", (int)pid);
       return -ENOENT;
     }
 
@@ -1073,7 +1076,7 @@ static int proc_open(FAR struct file *filep, FAR const char *relpath,
   node = proc_findnode(ptr);
   if (!node)
     {
-      fdbg("ERROR: Invalid path \"%s\"\n", relpath);
+      ferr("ERROR: Invalid path \"%s\"\n", relpath);
       return -ENOENT;
     }
 
@@ -1081,7 +1084,7 @@ static int proc_open(FAR struct file *filep, FAR const char *relpath,
 
   if (!DIRENT_ISFILE(node->dtype))
     {
-      fdbg("ERROR: Path \"%s\" is not a regular file\n", relpath);
+      ferr("ERROR: Path \"%s\" is not a regular file\n", relpath);
       return -EISDIR;
     }
 
@@ -1090,7 +1093,7 @@ static int proc_open(FAR struct file *filep, FAR const char *relpath,
   procfile = (FAR struct proc_file_s *)kmm_zalloc(sizeof(struct proc_file_s));
   if (!procfile)
     {
-      fdbg("ERROR: Failed to allocate file container\n");
+      ferr("ERROR: Failed to allocate file container\n");
       return -ENOMEM;
     }
 
@@ -1137,7 +1140,7 @@ static ssize_t proc_read(FAR struct file *filep, FAR char *buffer,
   irqstate_t flags;
   ssize_t ret;
 
-  fvdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+  finfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
 
   /* Recover our private data from the struct file instance */
 
@@ -1151,7 +1154,7 @@ static ssize_t proc_read(FAR struct file *filep, FAR char *buffer,
 
   if (!tcb)
     {
-      fdbg("ERROR: PID %d is not valid\n", (int)procfile->pid);
+      ferr("ERROR: PID %d is not valid\n", (int)procfile->pid);
       leave_critical_section(flags);
       return -ENODEV;
     }
@@ -1215,7 +1218,7 @@ static int proc_dup(FAR const struct file *oldp, FAR struct file *newp)
   FAR struct proc_file_s *oldfile;
   FAR struct proc_file_s *newfile;
 
-  fvdbg("Dup %p->%p\n", oldp, newp);
+  finfo("Dup %p->%p\n", oldp, newp);
 
   /* Recover our private data from the old struct file instance */
 
@@ -1227,7 +1230,7 @@ static int proc_dup(FAR const struct file *oldp, FAR struct file *newp)
   newfile = (FAR struct proc_file_s *)kmm_malloc(sizeof(struct proc_file_s));
   if (!newfile)
     {
-      fdbg("ERROR: Failed to allocate file container\n");
+      ferr("ERROR: Failed to allocate file container\n");
       return -ENOMEM;
     }
 
@@ -1259,7 +1262,7 @@ static int proc_opendir(FAR const char *relpath, FAR struct fs_dirent_s *dir)
   FAR char *ptr;
   pid_t pid;
 
-  fvdbg("relpath: \"%s\"\n", relpath ? relpath : "NULL");
+  finfo("relpath: \"%s\"\n", relpath ? relpath : "NULL");
   DEBUGASSERT(relpath && dir && !dir->u.procfs);
 
   /* The relative must be either:
@@ -1277,7 +1280,7 @@ static int proc_opendir(FAR const char *relpath, FAR struct fs_dirent_s *dir)
     {
       /* strtoul failed or there is something in the path after the pid */
 
-      fdbg("ERROR: Invalid path \"%s\"\n", relpath);
+      ferr("ERROR: Invalid path \"%s\"\n", relpath);
       return -ENOENT;
    }
 
@@ -1287,7 +1290,7 @@ static int proc_opendir(FAR const char *relpath, FAR struct fs_dirent_s *dir)
 
   if (tmp >= 32768)
     {
-      fdbg("ERROR: Invalid PID %ld\n", tmp);
+      ferr("ERROR: Invalid PID %ld\n", tmp);
       return -ENOENT;
     }
 
@@ -1301,7 +1304,7 @@ static int proc_opendir(FAR const char *relpath, FAR struct fs_dirent_s *dir)
 
   if (!tcb)
     {
-      fdbg("ERROR: PID %d is not valid\n", (int)pid);
+      ferr("ERROR: PID %d is not valid\n", (int)pid);
       return -ENOENT;
     }
 
@@ -1313,7 +1316,7 @@ static int proc_opendir(FAR const char *relpath, FAR struct fs_dirent_s *dir)
   procdir = (FAR struct proc_dir_s *)kmm_zalloc(sizeof(struct proc_dir_s));
   if (!procdir)
     {
-      fdbg("ERROR: Failed to allocate the directory structure\n");
+      ferr("ERROR: Failed to allocate the directory structure\n");
       return -ENOMEM;
     }
 
@@ -1329,7 +1332,7 @@ static int proc_opendir(FAR const char *relpath, FAR struct fs_dirent_s *dir)
       node = proc_findnode(ptr);
       if (!node)
         {
-          fdbg("ERROR: Invalid path \"%s\"\n", relpath);
+          ferr("ERROR: Invalid path \"%s\"\n", relpath);
           kmm_free(procdir);
           return -ENOENT;
         }
@@ -1338,7 +1341,7 @@ static int proc_opendir(FAR const char *relpath, FAR struct fs_dirent_s *dir)
 
       if (!DIRENT_ISDIRECTORY(node->dtype))
         {
-          fdbg("ERROR: Path \"%s\" is not a directory\n", relpath);
+          ferr("ERROR: Path \"%s\" is not a directory\n", relpath);
           kmm_free(procdir);
           return -ENOTDIR;
         }
@@ -1415,7 +1418,7 @@ static int proc_readdir(struct fs_dirent_s *dir)
        * error -ENOENT
        */
 
-      fvdbg("Entry %d: End of directory\n", index);
+      finfo("Entry %d: End of directory\n", index);
       ret = -ENOENT;
     }
 
@@ -1433,7 +1436,7 @@ static int proc_readdir(struct fs_dirent_s *dir)
 
       if (!tcb)
         {
-          fdbg("ERROR: PID %d is no longer valid\n", (int)pid);
+          ferr("ERROR: PID %d is no longer valid\n", (int)pid);
           return -ENOENT;
         }
 
@@ -1519,7 +1522,7 @@ static int proc_stat(const char *relpath, struct stat *buf)
 
   if (!ptr)
     {
-      fdbg("ERROR: Invalid path \"%s\"\n", relpath);
+      ferr("ERROR: Invalid path \"%s\"\n", relpath);
       return -ENOENT;
    }
 
@@ -1529,7 +1532,7 @@ static int proc_stat(const char *relpath, struct stat *buf)
 
   if (tmp >= 32768)
     {
-      fdbg("ERROR: Invalid PID %ld\n", tmp);
+      ferr("ERROR: Invalid PID %ld\n", tmp);
       return -ENOENT;
     }
 
@@ -1543,12 +1546,13 @@ static int proc_stat(const char *relpath, struct stat *buf)
 
   if (!tcb)
     {
-      fdbg("ERROR: PID %d is no longer valid\n", (int)pid);
+      ferr("ERROR: PID %d is no longer valid\n", (int)pid);
       return -ENOENT;
     }
 
   /* Was the  the final element of the path? */
 
+  memset(buf, 0, sizeof(struct stat));
   if (*ptr == '\0' || strcmp(ptr, "/") == 0)
     {
       /* Yes ... It's a read-only directory */
@@ -1562,7 +1566,7 @@ static int proc_stat(const char *relpath, struct stat *buf)
     {
       /* We are required to return -ENOENT all all invalid paths */
 
-      fdbg("ERROR: Bad delimiter '%c' in relpath '%s'\n", *ptr, relpath);
+      ferr("ERROR: Bad delimiter '%c' in relpath '%s'\n", *ptr, relpath);
       return -ENOENT;
     }
   else
@@ -1580,7 +1584,7 @@ static int proc_stat(const char *relpath, struct stat *buf)
       node = proc_findnode(ptr);
       if (!node)
         {
-          fdbg("ERROR: Invalid path \"%s\"\n", relpath);
+          ferr("ERROR: Invalid path \"%s\"\n", relpath);
           return -ENOENT;
         }
 
@@ -1598,11 +1602,6 @@ static int proc_stat(const char *relpath, struct stat *buf)
         }
     }
 
-  /* File/directory size, access block size */
-
-  buf->st_size    = 0;
-  buf->st_blksize = 0;
-  buf->st_blocks  = 0;
   return OK;
 }
 
diff --git a/fs/procfs/fs_procfsuptime.c b/fs/procfs/fs_procfsuptime.c
index a1b9b070da7d5e6db81b72c5ee42ac4dc93959cd..f9e76cb8973cdd388f95f8e0041f20553cbfa325 100644
--- a/fs/procfs/fs_procfsuptime.c
+++ b/fs/procfs/fs_procfsuptime.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/procfs/fs_procfsuptime.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -140,7 +140,7 @@ static int uptime_open(FAR struct file *filep, FAR const char *relpath,
 {
   FAR struct uptime_file_s *attr;
 
-  fvdbg("Open '%s'\n", relpath);
+  finfo("Open '%s'\n", relpath);
 
   /* PROCFS is read-only.  Any attempt to open with any kind of write
    * access is not permitted.
@@ -150,7 +150,7 @@ static int uptime_open(FAR struct file *filep, FAR const char *relpath,
 
   if ((oflags & O_WRONLY) != 0 || (oflags & O_RDONLY) == 0)
     {
-      fdbg("ERROR: Only O_RDONLY supported\n");
+      ferr("ERROR: Only O_RDONLY supported\n");
       return -EACCES;
     }
 
@@ -158,7 +158,7 @@ static int uptime_open(FAR struct file *filep, FAR const char *relpath,
 
   if (strcmp(relpath, "uptime") != 0)
     {
-      fdbg("ERROR: relpath is '%s'\n", relpath);
+      ferr("ERROR: relpath is '%s'\n", relpath);
       return -ENOENT;
     }
 
@@ -167,7 +167,7 @@ static int uptime_open(FAR struct file *filep, FAR const char *relpath,
   attr = (FAR struct uptime_file_s *)kmm_zalloc(sizeof(struct uptime_file_s));
   if (!attr)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
@@ -222,7 +222,7 @@ static ssize_t uptime_read(FAR struct file *filep, FAR char *buffer,
   unsigned int csec;
 #endif
 
-  fvdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+  finfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
 
   /* Recover our private data from the struct file instance */
 
@@ -301,7 +301,7 @@ static int uptime_dup(FAR const struct file *oldp, FAR struct file *newp)
   FAR struct uptime_file_s *oldattr;
   FAR struct uptime_file_s *newattr;
 
-  fvdbg("Dup %p->%p\n", oldp, newp);
+  finfo("Dup %p->%p\n", oldp, newp);
 
   /* Recover our private data from the old struct file instance */
 
@@ -313,7 +313,7 @@ static int uptime_dup(FAR const struct file *oldp, FAR struct file *newp)
   newattr = (FAR struct uptime_file_s *)kmm_malloc(sizeof(struct uptime_file_s));
   if (!newattr)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
@@ -340,16 +340,14 @@ static int uptime_stat(FAR const char *relpath, FAR struct stat *buf)
 
   if (strcmp(relpath, "uptime") != 0)
     {
-      fdbg("ERROR: relpath is '%s'\n", relpath);
+      ferr("ERROR: relpath is '%s'\n", relpath);
       return -ENOENT;
     }
 
   /* "uptime" is the name for a read-only file */
 
-  buf->st_mode    = S_IFREG | S_IROTH | S_IRGRP | S_IRUSR;
-  buf->st_size    = 0;
-  buf->st_blksize = 0;
-  buf->st_blocks  = 0;
+  memset(buf, 0, sizeof(struct stat));
+  buf->st_mode = S_IFREG | S_IROTH | S_IRGRP | S_IRUSR;
   return OK;
 }
 
diff --git a/fs/procfs/fs_skeleton.c b/fs/procfs/fs_skeleton.c
index 052eb1f0f75fd54b26edc313b04eace7476b983a..51c6f785e11db42f700d420a784db5b658eaa914 100644
--- a/fs/procfs/fs_skeleton.c
+++ b/fs/procfs/fs_skeleton.c
@@ -1,6 +1,7 @@
 /****************************************************************************
  * fs/procfs/fs_skeleton.c
  *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
  *   Copyright (C) 2015 Ken Pettit. All rights reserved.
  *   Author: Ken Pettit 
  *
@@ -71,6 +72,7 @@
 /****************************************************************************
  * Private Types
  ****************************************************************************/
+
 /* This enumeration identifies all of the thread attributes that can be
  * accessed via the procfs file system.
  */
@@ -106,7 +108,9 @@ static int     skel_open(FAR struct file *filep, FAR const char *relpath,
 static int     skel_close(FAR struct file *filep);
 static ssize_t skel_read(FAR struct file *filep, FAR char *buffer,
                  size_t buflen);
-
+/* TODO:  Should not support skel_write if read-only */
+static ssize_t skel_write(FAR struct file *filep, FAR const char *buffer,
+                 size_t buflen);
 static int     skel_dup(FAR const struct file *oldp,
                  FAR struct file *newp);
 
@@ -136,9 +140,12 @@ const struct procfs_operations skel_procfsoperations =
   skel_open,       /* open */
   skel_close,      /* close */
   skel_read,       /* read */
-
-  /* TODO:  Decide if this driver supports write */
+  /* TODO:  Decide if this procfs entry supports write access */
+#if 0 /* NULL if the procfs entry does not support write access. */
   NULL,            /* write */
+#else
+  skel_write,      /* write */
+#endif
 
   skel_dup,        /* dup */
 
@@ -163,18 +170,17 @@ static int skel_open(FAR struct file *filep, FAR const char *relpath,
 {
   FAR struct skel_file_s *priv;
 
-  fvdbg("Open '%s'\n", relpath);
+  finfo("Open '%s'\n", relpath);
 
-  /* PROCFS is read-only.  Any attempt to open with any kind of write
-   * access is not permitted.
-   *
-   * REVISIT:  Write-able proc files could be quite useful.
+  /* If PROCFS is read-only, then the (1) the skel_write() method must not
+   * be provided and (2) any attempt to open with any kind of write access
+   * can not be permitted.
    */
 
   if (((oflags & O_WRONLY) != 0 || (oflags & O_RDONLY) == 0) &&
       (skel_procfsoperations.write == NULL))
     {
-      fdbg("ERROR: Only O_RDONLY supported\n");
+      ferr("ERROR: Only O_RDONLY supported\n");
       return -EACCES;
     }
 
@@ -183,12 +189,11 @@ static int skel_open(FAR struct file *filep, FAR const char *relpath,
   priv = (FAR struct skel_file_s *)kmm_zalloc(sizeof(struct skel_file_s));
   if (!priv)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
-  /* TODO: Initialize the context specific data here */
-
+  /* TODO:  Initialize the context specific data here */
 
   /* Save the open file structure as the open-specific state in
    * filep->f_priv.
@@ -220,6 +225,10 @@ static int skel_close(FAR struct file *filep)
 
 /****************************************************************************
  * Name: skel_read
+ *
+ * Description:
+ *   Handle read from procfs file.
+ *
  ****************************************************************************/
 
 static ssize_t skel_read(FAR struct file *filep, FAR char *buffer,
@@ -228,14 +237,58 @@ static ssize_t skel_read(FAR struct file *filep, FAR char *buffer,
   FAR struct skel_file_s *priv;
   ssize_t ret;
 
-  fvdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+  finfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
 
   /* Recover our private data from the struct file instance */
 
   priv = (FAR struct skel_file_s *)filep->f_priv;
   DEBUGASSERT(priv);
 
-  /* TODO: Provide the requested data */
+  /* TODO:  Provide the requested data.
+   *        Take into account current filep->f_pos and 'buflen'.  The read
+   *        could require several calls to skel_read().
+   */
+
+  ret = 0;
+
+  /* Update the file offset */
+
+  if (ret > 0)
+    {
+      filep->f_pos += ret;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: skel_write
+ *
+ * Description:
+ *   Handle write3 to procfs file.
+ *
+ ****************************************************************************/
+
+/* TODO: Should not support skel_write if read-only */
+static ssize_t skel_write(FAR struct file *filep, FAR const char *buffer,
+                          size_t buflen)
+{
+  FAR struct skel_file_s *priv;
+  ssize_t ret;
+
+  finfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
+
+  /* Recover our private data from the struct file instance */
+
+  priv = (FAR struct skel_file_s *)filep->f_priv;
+  DEBUGASSERT(priv);
+
+  /* TODO:  Verify that the write is within range */
+
+  /* TODO:  Handle the write data as appropriate to function of file.
+   *        Take into account current filep->f_pos and 'buflen' since the
+   *        write may require several calls to skel_write().
+   */
 
   ret = 0;
 
@@ -262,7 +315,7 @@ static int skel_dup(FAR const struct file *oldp, FAR struct file *newp)
   FAR struct skel_file_s *oldpriv;
   FAR struct skel_file_s *newpriv;
 
-  fvdbg("Dup %p->%p\n", oldp, newp);
+  finfo("Dup %p->%p\n", oldp, newp);
 
   /* Recover our private data from the old struct file instance */
 
@@ -274,7 +327,7 @@ static int skel_dup(FAR const struct file *oldp, FAR struct file *newp)
   newpriv = (FAR struct skel_file_s *)kmm_zalloc(sizeof(struct skel_file_s));
   if (!newpriv)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
@@ -300,7 +353,7 @@ static int skel_opendir(FAR const char *relpath, FAR struct fs_dirent_s *dir)
 {
   FAR struct skel_level1_s *level1;
 
-  fvdbg("relpath: \"%s\"\n", relpath ? relpath : "NULL");
+  finfo("relpath: \"%s\"\n", relpath ? relpath : "NULL");
   DEBUGASSERT(relpath && dir && !dir->u.procfs);
 
   /* The path refers to the 1st level sbdirectory.  Allocate the level1
@@ -312,12 +365,11 @@ static int skel_opendir(FAR const char *relpath, FAR struct fs_dirent_s *dir)
 
   if (!level1)
     {
-      fdbg("ERROR: Failed to allocate the level1 directory structure\n");
+      ferr("ERROR: Failed to allocate the level1 directory structure\n");
       return -ENOMEM;
     }
 
-  /* TODO:  Initialze context specific data */
-
+  /* TODO:  Initialize context specific data */
 
   /* Initialze base structure components */
 
@@ -369,9 +421,9 @@ static int skel_readdir(FAR struct fs_dirent_s *dir)
   DEBUGASSERT(dir && dir->u.procfs);
   level1 = dir->u.procfs;
 
-  /* TODO: Perform device specific readdir function here.  This may
-   *       or may not involve validating the nentries variable
-   *       in the base depending on the implementation.
+  /* TODO:  Perform device specific readdir function here.  This may
+   *        or may not involve validating the nentries variable
+   *        in the base depending on the implementation.
    */
 
   /* Have we reached the end of the directory */
@@ -383,7 +435,7 @@ static int skel_readdir(FAR struct fs_dirent_s *dir)
        * error -ENOENT
        */
 
-      fvdbg("Entry %d: End of directory\n", index);
+      finfo("Entry %d: End of directory\n", index);
       ret = -ENOENT;
     }
 
@@ -393,7 +445,7 @@ static int skel_readdir(FAR struct fs_dirent_s *dir)
     {
       DEBUGASSERT(level1->base.level == 1);
 
-      /* TODO: Add device specific entries */
+      /* TODO:  Add device specific entries */
 
       strcpy(filename, "dummy");
 
@@ -438,7 +490,7 @@ static int skel_rewinddir(FAR struct fs_dirent_s *dir)
  *
  ****************************************************************************/
 
-static int skel_stat(FAR const char *relpath, FAR truct stat *buf)
+static int skel_stat(FAR const char *relpath, FAR struct stat *buf)
 {
   int ret = -ENOENT;
 
@@ -446,14 +498,16 @@ static int skel_stat(FAR const char *relpath, FAR truct stat *buf)
    *        or a directory and set it's permissions.
    */
 
+  memset(buf, 0, sizeof(struct stat));
   buf->st_mode = S_IFDIR | S_IROTH | S_IRGRP | S_IRUSR;
-  ret = OK;
 
-  /* File/directory size, access block size */
+  /* TODO:  Set S_IFREG if the relpath refers to a file.
+  /* TODO:  If the skel_write() method is supported, then stat must also
+   *        report S_IWOTH | S_IWGRP | S_IWUSR for files (but not for
+   *        directories) as well.
+  /* TODO:  Other 'struct buf' settings may be appropriate (optional) */
 
-  buf->st_size    = 0;
-  buf->st_blksize = 0;
-  buf->st_blocks  = 0;
+  ret = OK;
 
   return ret;
 }
diff --git a/fs/romfs/fs_romfs.c b/fs/romfs/fs_romfs.c
index 804fbb7ed46e36d5d6c5199d549a4c54e7947ad6..083f5760d066ccdb8a220e155a0b0a7a3946d9c8 100644
--- a/fs/romfs/fs_romfs.c
+++ b/fs/romfs/fs_romfs.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * rm/romfs/fs_romfs.h
  *
- *   Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2011, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * References: Linux/Documentation/filesystems/romfs.txt
@@ -76,7 +76,10 @@ static off_t   romfs_seek(FAR struct file *filep, off_t offset, int whence);
 static int     romfs_ioctl(FAR struct file *filep, int cmd,
                            unsigned long arg);
 
-static  int    romfs_dup(FAR const struct file *oldp, FAR struct file *newp);
+static int     romfs_dup(FAR const struct file *oldp,
+                         FAR struct file *newp);
+static int     romfs_fstat(FAR const struct file *filep,
+                           FAR struct stat *buf);
 
 static int     romfs_opendir(FAR struct inode *mountpt,
                              FAR const char *relpath,
@@ -93,6 +96,8 @@ static int     romfs_unbind(FAR void *handle, FAR struct inode **blkdriver,
 static int     romfs_statfs(FAR struct inode *mountpt,
                             FAR struct statfs *buf);
 
+static int     romfs_stat_common(uint8_t type, uint32_t size,
+                                 uint16_t sectorsize, FAR struct stat *buf);
 static int     romfs_stat(FAR struct inode *mountpt, FAR const char *relpath,
                           FAR struct stat *buf);
 
@@ -116,6 +121,7 @@ const struct mountpt_operations romfs_operations =
 
   NULL,            /* sync */
   romfs_dup,       /* dup */
+  romfs_fstat,     /* fstat */
 
   romfs_opendir,   /* opendir */
   NULL,            /* closedir */
@@ -149,7 +155,7 @@ static int romfs_open(FAR struct file *filep, FAR const char *relpath,
   FAR struct romfs_file_s    *rf;
   int                         ret;
 
-  fvdbg("Open '%s'\n", relpath);
+  finfo("Open '%s'\n", relpath);
 
   /* Sanity checks */
 
@@ -169,7 +175,7 @@ static int romfs_open(FAR struct file *filep, FAR const char *relpath,
   ret = romfs_checkmount(rm);
   if (ret != OK)
     {
-      fdbg("romfs_checkmount failed: %d\n", ret);
+      ferr("ERROR: romfs_checkmount failed: %d\n", ret);
       goto errout_with_semaphore;
     }
 
@@ -179,7 +185,7 @@ static int romfs_open(FAR struct file *filep, FAR const char *relpath,
 
   if ((oflags & O_WRONLY) != 0 || (oflags & O_RDONLY) == 0)
     {
-      fdbg("Only O_RDONLY supported\n");
+      ferr("ERROR: Only O_RDONLY supported\n");
       ret = -EACCES;
       goto errout_with_semaphore;
     }
@@ -193,13 +199,17 @@ static int romfs_open(FAR struct file *filep, FAR const char *relpath,
   ret = romfs_finddirentry(rm, &dirinfo, relpath);
   if (ret < 0)
     {
-      fdbg("Failed to find directory directory entry for '%s': %d\n",
+      ferr("ERROR: Failed to find directory directory entry for '%s': %d\n",
            relpath, ret);
       goto errout_with_semaphore;
     }
 
   /* The full path exists -- but is the final component a file
-   * or a directory?
+   * or a directory?  Or some other Unix file type that is not
+   * appropriate in this contex.
+   *
+   * REVISIT: This logic should follow hard/soft link file
+   * types.  At present, it returns the ENXIO.
    */
 
   if (IS_DIRECTORY(dirinfo.rd_next))
@@ -207,7 +217,21 @@ static int romfs_open(FAR struct file *filep, FAR const char *relpath,
       /* It is a directory */
 
       ret = -EISDIR;
-      fdbg("'%s' is a directory\n", relpath);
+      ferr("ERROR: '%s' is a directory\n", relpath);
+      goto errout_with_semaphore;
+    }
+  else if (!IS_FILE(dirinfo.rd_next))
+    {
+      /* ENXIO indicates "The named file is a character special or
+       * block special file, and the device associated with this
+       * special file does not exist."
+       *
+       * Here we also return ENXIO if the file is not a directory
+       * or a regular file.
+       */
+
+      ret = -ENXIO;
+      ferr("ERROR: '%s' is a special file\n", relpath);
       goto errout_with_semaphore;
     }
 
@@ -222,7 +246,7 @@ static int romfs_open(FAR struct file *filep, FAR const char *relpath,
   rf = (FAR struct romfs_file_s *)kmm_zalloc(sizeof(struct romfs_file_s));
   if (!rf)
     {
-      fdbg("Failed to allocate private data\n", ret);
+      ferr("ERROR: Failed to allocate private data\n", ret);
       ret = -ENOMEM;
       goto errout_with_semaphore;
     }
@@ -232,6 +256,7 @@ static int romfs_open(FAR struct file *filep, FAR const char *relpath,
    */
 
   rf->rf_size = dirinfo.rd_size;
+  rf->rf_type = (uint8_t)(dirinfo.rd_next & RFNEXT_ALLMODEMASK);
 
   /* Get the start of the file data */
 
@@ -239,7 +264,7 @@ static int romfs_open(FAR struct file *filep, FAR const char *relpath,
                         &rf->rf_startoffset);
   if (ret < 0)
     {
-      fdbg("Failed to locate start of file data: %d\n", ret);
+      ferr("ERROR: Failed to locate start of file data: %d\n", ret);
       goto errout_with_semaphore;
     }
 
@@ -248,7 +273,7 @@ static int romfs_open(FAR struct file *filep, FAR const char *relpath,
   ret = romfs_fileconfigure(rm, rf);
   if (ret < 0)
     {
-      fdbg("Failed configure buffering: %d\n", ret);
+      ferr("ERROR: Failed configure buffering: %d\n", ret);
       goto errout_with_semaphore;
     }
 
@@ -285,7 +310,7 @@ static int romfs_close(FAR struct file *filep)
   FAR struct romfs_file_s    *rf;
   int                         ret = OK;
 
-  fvdbg("Closing\n");
+  finfo("Closing\n");
 
   /* Sanity checks */
 
@@ -340,7 +365,7 @@ static ssize_t romfs_read(FAR struct file *filep, FAR char *buffer,
   int                         sectorndx;
   int                         ret;
 
-  fvdbg("Read %d bytes from offset %d\n", buflen, filep->f_pos);
+  finfo("Read %d bytes from offset %d\n", buflen, filep->f_pos);
 
   /* Sanity checks */
 
@@ -359,7 +384,7 @@ static ssize_t romfs_read(FAR struct file *filep, FAR char *buffer,
   ret = romfs_checkmount(rm);
   if (ret != OK)
     {
-      fdbg("romfs_checkmount failed: %d\n", ret);
+      ferr("ERROR: romfs_checkmount failed: %d\n", ret);
       goto errout_with_semaphore;
     }
 
@@ -404,11 +429,11 @@ static ssize_t romfs_read(FAR struct file *filep, FAR char *buffer,
 
           /* Read all of the sectors directly into user memory */
 
-          fvdbg("Read %d sectors starting with %d\n", nsectors, sector);
+          finfo("Read %d sectors starting with %d\n", nsectors, sector);
           ret = romfs_hwread(rm, userbuffer, sector, nsectors);
           if (ret < 0)
             {
-              fdbg("romfs_hwread failed: %d\n", ret);
+              ferr("ERROR: romfs_hwread failed: %d\n", ret);
               goto errout_with_semaphore;
             }
 
@@ -422,11 +447,11 @@ static ssize_t romfs_read(FAR struct file *filep, FAR char *buffer,
            * it is already there then all is well.
            */
 
-          fvdbg("Read sector %d\n", sector);
+          finfo("Read sector %d\n", sector);
           ret = romfs_filecacheread(rm, rf, sector);
           if (ret < 0)
             {
-              fdbg("romfs_filecacheread failed: %d\n", ret);
+              ferr("ERROR: romfs_filecacheread failed: %d\n", ret);
               goto errout_with_semaphore;
             }
 
@@ -446,7 +471,7 @@ static ssize_t romfs_read(FAR struct file *filep, FAR char *buffer,
              sector++;
             }
 
-          fvdbg("Return %d bytes from sector offset %d\n", bytesread, sectorndx);
+          finfo("Return %d bytes from sector offset %d\n", bytesread, sectorndx);
           memcpy(userbuffer, &rf->rf_buffer[sectorndx], bytesread);
         }
 
@@ -477,7 +502,7 @@ static off_t romfs_seek(FAR struct file *filep, off_t offset, int whence)
   off_t                       position;
   int                         ret;
 
-  fvdbg("Seek to offset: %d whence: %d\n", offset, whence);
+  finfo("Seek to offset: %d whence: %d\n", offset, whence);
 
   /* Sanity checks */
 
@@ -511,7 +536,7 @@ static off_t romfs_seek(FAR struct file *filep, off_t offset, int whence)
         break;
 
     default:
-        fdbg("Whence is invalid: %d\n", whence);
+        ferr("ERROR: Whence is invalid: %d\n", whence);
         return -EINVAL;
     }
 
@@ -521,7 +546,7 @@ static off_t romfs_seek(FAR struct file *filep, off_t offset, int whence)
   ret = romfs_checkmount(rm);
   if (ret != OK)
     {
-       fdbg("romfs_checkmount failed: %d\n", ret);
+       ferr("ERROR: romfs_checkmount failed: %d\n", ret);
        goto errout_with_semaphore;
     }
 
@@ -537,7 +562,7 @@ static off_t romfs_seek(FAR struct file *filep, off_t offset, int whence)
   /* Set file position and return success */
 
   filep->f_pos = position;
-  fvdbg("New file position: %d\n", filep->f_pos);
+  finfo("New file position: %d\n", filep->f_pos);
 
   romfs_semgive(rm);
   return OK;
@@ -557,7 +582,7 @@ static int romfs_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   FAR struct romfs_file_s    *rf;
   FAR void                  **ppv = (FAR void**)arg;
 
-  fvdbg("cmd: %d arg: %08lx\n", cmd, arg);
+  finfo("cmd: %d arg: %08lx\n", cmd, arg);
 
   /* Sanity checks */
 
@@ -582,7 +607,7 @@ static int romfs_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
       return OK;
     }
 
-  fdbg("Invalid cmd: %d \n", cmd);
+  ferr("ERROR: Invalid cmd: %d \n", cmd);
   return -ENOTTY;
 }
 
@@ -597,7 +622,7 @@ static int romfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   FAR struct romfs_file_s *newrf;
   int ret;
 
-  fvdbg("Dup %p->%p\n", oldp, newp);
+  finfo("Dup %p->%p\n", oldp, newp);
 
   /* Sanity checks */
 
@@ -618,7 +643,7 @@ static int romfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   ret = romfs_checkmount(rm);
   if (ret != OK)
     {
-      fdbg("romfs_checkmount failed: %d\n", ret);
+      ferr("ERROR: romfs_checkmount failed: %d\n", ret);
       goto errout_with_semaphore;
     }
 
@@ -633,7 +658,7 @@ static int romfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   newrf = (FAR struct romfs_file_s *)kmm_malloc(sizeof(struct romfs_file_s));
   if (!newrf)
     {
-      fdbg("Failed to allocate private data\n", ret);
+      ferr("ERROR: Failed to allocate private data\n", ret);
       ret = -ENOMEM;
       goto errout_with_semaphore;
     }
@@ -649,7 +674,7 @@ static int romfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   if (ret < 0)
     {
       kmm_free(newrf);
-      fdbg("Failed configure buffering: %d\n", ret);
+      ferr("ERROR: Failed configure buffering: %d\n", ret);
       goto errout_with_semaphore;
     }
 
@@ -676,6 +701,51 @@ errout_with_semaphore:
   return ret;
 }
 
+/****************************************************************************
+ * Name: romfs_fstat
+ *
+ * Description:
+ *   Obtain information about an open file associated with the file
+ *   descriptor 'fd', and will write it to the area pointed to by 'buf'.
+ *
+ ****************************************************************************/
+
+static int romfs_fstat(FAR const struct file *filep, FAR struct stat *buf)
+{
+  FAR struct romfs_mountpt_s *rm;
+  FAR struct romfs_file_s *rf;
+  int ret;
+
+  finfo("fstat\n");
+
+  /* Sanity checks */
+
+  DEBUGASSERT(filep->f_priv != NULL && filep->f_inode != NULL);
+
+  /* Get mountpoint private data from the inode reference from the file
+   * structure
+   */
+
+  rf = filep->f_priv;
+  rm = (FAR struct romfs_mountpt_s *)filep->f_inode->i_private;
+  DEBUGASSERT(rm != NULL);
+
+  /* Check if the mount is still healthy */
+
+  romfs_semtake(rm);
+  ret = romfs_checkmount(rm);
+  if (ret >= 0)
+    {
+      /* Return information about the directory entry */
+
+      ret = romfs_stat_common(rf->rf_type, rf->rf_size,
+                              rm->rm_hwsectorsize, buf);
+    }
+
+  romfs_semgive(rm);
+  return ret;
+}
+
 /****************************************************************************
  * Name: romfs_opendir
  *
@@ -691,7 +761,7 @@ static int romfs_opendir(FAR struct inode *mountpt, FAR const char *relpath,
   FAR struct romfs_dirinfo_s  dirinfo;
   int                         ret;
 
-  fvdbg("relpath: '%s'\n", relpath);
+  finfo("relpath: '%s'\n", relpath);
 
   /* Sanity checks */
 
@@ -707,7 +777,7 @@ static int romfs_opendir(FAR struct inode *mountpt, FAR const char *relpath,
   ret = romfs_checkmount(rm);
   if (ret != OK)
     {
-      fdbg("romfs_checkmount failed: %d\n", ret);
+      ferr("ERROR: romfs_checkmount failed: %d\n", ret);
       goto errout_with_semaphore;
     }
 
@@ -716,7 +786,7 @@ static int romfs_opendir(FAR struct inode *mountpt, FAR const char *relpath,
   ret = romfs_finddirentry(rm, &dirinfo, relpath);
   if (ret < 0)
     {
-      fdbg("Failed to find directory '%s': %d\n", relpath, ret);
+      ferr("ERROR: Failed to find directory '%s': %d\n", relpath, ret);
       goto errout_with_semaphore;
     }
 
@@ -726,7 +796,7 @@ static int romfs_opendir(FAR struct inode *mountpt, FAR const char *relpath,
     {
       /* The entry is not a directory */
 
-      fdbg("'%s' is not a directory: %d\n", relpath);
+      ferr("ERROR: '%s' is not a directory: %d\n", relpath);
       ret = -ENOTDIR;
       goto errout_with_semaphore;
     }
@@ -759,7 +829,7 @@ static int romfs_readdir(FAR struct inode *mountpt,
   uint32_t                    size;
   int                         ret;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* Sanity checks */
 
@@ -775,7 +845,7 @@ static int romfs_readdir(FAR struct inode *mountpt,
   ret = romfs_checkmount(rm);
   if (ret != OK)
     {
-      fdbg("romfs_checkmount failed: %d\n", ret);
+      ferr("ERROR: omfs_checkmount failed: %d\n", ret);
       goto errout_with_semaphore;
     }
 
@@ -791,7 +861,7 @@ static int romfs_readdir(FAR struct inode *mountpt,
            * special error -ENOENT
            */
 
-          fdbg("End of directory\n");
+          finfo("End of directory\n");
           ret = -ENOENT;
           goto errout_with_semaphore;
         }
@@ -802,7 +872,7 @@ static int romfs_readdir(FAR struct inode *mountpt,
                                 &next, &info, &size);
       if (ret < 0)
         {
-          fdbg("romfs_parsedirentry failed: %d\n", ret);
+          ferr("ERROR: romfs_parsedirentry failed: %d\n", ret);
           goto errout_with_semaphore;
         }
 
@@ -811,7 +881,7 @@ static int romfs_readdir(FAR struct inode *mountpt,
       ret = romfs_parsefilename(rm, dir->u.romfs.fr_curroffset, dir->fd_dir.d_name);
       if (ret < 0)
         {
-          fdbg("romfs_parsefilename failed: %d\n", ret);
+          ferr("ERROR: romfs_parsefilename failed: %d\n", ret);
           goto errout_with_semaphore;
         }
 
@@ -851,7 +921,7 @@ static int romfs_rewinddir(FAR struct inode *mountpt,
   FAR struct romfs_mountpt_s *rm;
   int ret;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* Sanity checks */
 
@@ -891,20 +961,20 @@ static int romfs_bind(FAR struct inode *blkdriver, FAR const void *data,
   struct romfs_mountpt_s *rm;
   int ret;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* Open the block driver */
 
   if (!blkdriver || !blkdriver->u.i_bops)
     {
-      fdbg("No block driver/ops\n");
+      ferr("ERROR: No block driver/ops\n");
       return -ENODEV;
     }
 
   if (blkdriver->u.i_bops->open &&
       blkdriver->u.i_bops->open(blkdriver) != OK)
     {
-      fdbg("No open method\n");
+      ferr("ERROR: No open method\n");
       return -ENODEV;
     }
 
@@ -913,7 +983,7 @@ static int romfs_bind(FAR struct inode *blkdriver, FAR const void *data,
   rm = (FAR struct romfs_mountpt_s *)kmm_zalloc(sizeof(struct romfs_mountpt_s));
   if (!rm)
     {
-      fdbg("Failed to allocate mountpoint structure\n");
+      ferr("ERROR: Failed to allocate mountpoint structure\n");
       return -ENOMEM;
     }
 
@@ -930,7 +1000,7 @@ static int romfs_bind(FAR struct inode *blkdriver, FAR const void *data,
   ret = romfs_hwconfigure(rm);
   if (ret < 0)
     {
-      fdbg("romfs_hwconfigure failed: %d\n", ret);
+      ferr("ERROR: romfs_hwconfigure failed: %d\n", ret);
       goto errout_with_sem;
     }
 
@@ -941,7 +1011,7 @@ static int romfs_bind(FAR struct inode *blkdriver, FAR const void *data,
   ret = romfs_fsconfigure(rm);
   if (ret < 0)
     {
-      fdbg("romfs_fsconfigure failed: %d\n", ret);
+      ferr("ERROR: romfs_fsconfigure failed: %d\n", ret);
       goto errout_with_buffer;
     }
 
@@ -977,9 +1047,9 @@ static int romfs_unbind(FAR void *handle, FAR struct inode **blkdriver,
   FAR struct romfs_mountpt_s *rm = (FAR struct romfs_mountpt_s *)handle;
   int ret;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!rm)
     {
       return -EINVAL;
@@ -993,7 +1063,7 @@ static int romfs_unbind(FAR void *handle, FAR struct inode **blkdriver,
     {
       /* We cannot unmount now.. there are open files */
 
-      fdbg("There are open files\n");
+      fwarn("WARNING: There are open files\n");
 
       /* This implementation currently only supports unmounting if there are
        * no open file references.
@@ -1056,7 +1126,7 @@ static int romfs_statfs(FAR struct inode *mountpt, FAR struct statfs *buf)
   FAR struct romfs_mountpt_s *rm;
   int ret;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* Sanity checks */
 
@@ -1072,7 +1142,7 @@ static int romfs_statfs(FAR struct inode *mountpt, FAR struct statfs *buf)
   ret = romfs_checkmount(rm);
   if (ret < 0)
     {
-      fdbg("romfs_checkmount failed: %d\n", ret);
+      ferr("ERROR: romfs_checkmount failed: %d\n", ret);
       goto errout_with_semaphore;
     }
 
@@ -1100,6 +1170,53 @@ errout_with_semaphore:
   return ret;
 }
 
+/****************************************************************************
+ * Name: romfs_stat_common
+ *
+ * Description:
+ *   Return information about a file or directory
+ *
+ ****************************************************************************/
+
+static int romfs_stat_common(uint8_t type, uint32_t size,
+                             uint16_t sectorsize, FAR struct stat *buf)
+{
+  memset(buf, 0, sizeof(struct stat));
+  if (IS_DIRECTORY(type))
+    {
+      /* It's a read-execute directory name */
+
+      buf->st_mode = S_IFDIR | S_IROTH | S_IXOTH | S_IRGRP | S_IXGRP |
+                     S_IRUSR | S_IXUSR;
+    }
+  else if (IS_FILE(type))
+    {
+      /* It's a read-only file name */
+
+      buf->st_mode = S_IFREG | S_IROTH | S_IRGRP | S_IRUSR;
+      if (IS_EXECUTABLE(type))
+        {
+          /* It's a read-execute file name */
+
+          buf->st_mode |= S_IXOTH | S_IXGRP | S_IXUSR;
+        }
+    }
+  else
+    {
+      /* Otherwise, pretend like the unsupported type does not exist */
+
+      finfo("Unsupported type: %d\n", type);
+      return -ENOENT;
+    }
+
+  /* File/directory size, access block size */
+
+  buf->st_size    = size;
+  buf->st_blksize = sectorsize;
+  buf->st_blocks  = (buf->st_size + sectorsize - 1) / sectorsize;
+  return OK;
+}
+
 /****************************************************************************
  * Name: romfs_stat
  *
@@ -1112,9 +1229,10 @@ static int romfs_stat(FAR struct inode *mountpt, FAR const char *relpath,
 {
   FAR struct romfs_mountpt_s *rm;
   FAR struct romfs_dirinfo_s dirinfo;
+  uint8_t type;
   int ret;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* Sanity checks */
 
@@ -1130,7 +1248,7 @@ static int romfs_stat(FAR struct inode *mountpt, FAR const char *relpath,
   ret = romfs_checkmount(rm);
   if (ret != OK)
     {
-      fdbg("romfs_checkmount failed: %d\n", ret);
+      ferr("ERROR: romfs_checkmount failed: %d\n", ret);
       goto errout_with_semaphore;
     }
 
@@ -1142,47 +1260,14 @@ static int romfs_stat(FAR struct inode *mountpt, FAR const char *relpath,
 
   if (ret < 0)
     {
-      fvdbg("Failed to find directory: %d\n", ret);
+      finfo("Failed to find directory: %d\n", ret);
       goto errout_with_semaphore;
     }
 
-  memset(buf, 0, sizeof(struct stat));
-  if (IS_DIRECTORY(dirinfo.rd_next))
-    {
-      /* It's a read-only directory name */
-
-      buf->st_mode = S_IFDIR | S_IROTH | S_IRGRP | S_IRUSR;
-      if (IS_EXECUTABLE(dirinfo.rd_next))
-        {
-          buf->st_mode |= S_IXOTH | S_IXGRP | S_IXUSR;
-        }
-    }
-  else if (IS_FILE(dirinfo.rd_next))
-    {
-      /* It's a read-only file name */
-
-      buf->st_mode = S_IFREG | S_IROTH | S_IRGRP | S_IRUSR;
-      if (IS_EXECUTABLE(dirinfo.rd_next))
-        {
-          buf->st_mode |= S_IXOTH | S_IXGRP | S_IXUSR;
-        }
-    }
-  else
-    {
-      /* Otherwise, pretend like the unsupported node does not exist */
-
-      fvdbg("Unsupported inode: %d\n", dirinfo.rd_next);
-      ret = -ENOENT;
-      goto errout_with_semaphore;
-    }
-
-  /* File/directory size, access block size */
-
-  buf->st_size      = dirinfo.rd_size;
-  buf->st_blksize   = rm->rm_hwsectorsize;
-  buf->st_blocks    = (buf->st_size + buf->st_blksize - 1) / buf->st_blksize;
+  /* Return information about the directory entry */
 
-  ret = OK;
+  type = (uint8_t)(dirinfo.rd_next & RFNEXT_ALLMODEMASK);
+  ret  = romfs_stat_common(type, dirinfo.rd_size, rm->rm_hwsectorsize, buf);
 
 errout_with_semaphore:
   romfs_semgive(rm);
diff --git a/fs/romfs/fs_romfs.h b/fs/romfs/fs_romfs.h
index 12ab8d88239e8f18d58a545ea45e68ce3965e71c..336e0efaf65ac19cb95e4eade2727e42f59f6ad2 100644
--- a/fs/romfs/fs_romfs.h
+++ b/fs/romfs/fs_romfs.h
@@ -158,11 +158,12 @@ struct romfs_mountpt_s
 
 struct romfs_file_s
 {
-  struct romfs_file_s *rf_next;     /* Retained in a singly linked list */
+  FAR struct romfs_file_s *rf_next; /* Retained in a singly linked list */
   uint32_t rf_startoffset;          /* Offset to the start of the file data */
   uint32_t rf_size;                 /* Size of the file in bytes */
   uint32_t rf_cachesector;          /* Current sector in the rf_buffer */
   uint8_t *rf_buffer;               /* File sector buffer, allocated if rm_xipbase==0 */
+  uint8_t rf_type;                  /* File type (for fstat()) */
 };
 
 /* This structure is used internally for describing the result of
diff --git a/fs/romfs/fs_romfsutil.c b/fs/romfs/fs_romfsutil.c
index ade749ffcb52194a80931cd16112d60d0ed43d45..50bf56ddc285a8a2df9620e4b6631727a84a84dc 100644
--- a/fs/romfs/fs_romfsutil.c
+++ b/fs/romfs/fs_romfsutil.c
@@ -437,7 +437,7 @@ int romfs_filecacheread(struct romfs_mountpt_s *rm, struct romfs_file_s *rf,
 {
   int ret;
 
-  fvdbg("sector: %d cached: %d sectorsize: %d XIP base: %p buffer: %p\n",
+  finfo("sector: %d cached: %d sectorsize: %d XIP base: %p buffer: %p\n",
         sector, rf->rf_cachesector, rm->rm_hwsectorsize,
         rm->rm_xipbase, rf->rf_buffer);
 
@@ -457,17 +457,17 @@ int romfs_filecacheread(struct romfs_mountpt_s *rm, struct romfs_file_s *rf,
            */
 
           rf->rf_buffer = rm->rm_xipbase + sector * rm->rm_hwsectorsize;
-          fvdbg("XIP buffer: %p\n", rf->rf_buffer);
+          finfo("XIP buffer: %p\n", rf->rf_buffer);
         }
       else
         {
           /* In non-XIP mode, we will have to read the new sector. */
 
-          fvdbg("Calling romfs_hwread\n");
+          finfo("Calling romfs_hwread\n");
           ret = romfs_hwread(rm, rf->rf_buffer, sector, 1);
           if (ret < 0)
             {
-              fdbg("romfs_hwread failed: %d\n", ret);
+              ferr("ERROR: romfs_hwread failed: %d\n", ret);
               return ret;
             }
         }
@@ -499,7 +499,7 @@ int romfs_hwconfigure(struct romfs_mountpt_s *rm)
 
   /* Get the underlying device geometry */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!inode || !inode->u.i_bops || !inode->u.i_bops->geometry)
     {
       return -ENODEV;
diff --git a/fs/semaphore/sem_open.c b/fs/semaphore/sem_open.c
index 8e42cb471756fcede7ef6536cd40b200c7f31e5f..aad94091b1d52eb2d9d50b167b9f843e3b75e310 100644
--- a/fs/semaphore/sem_open.c
+++ b/fs/semaphore/sem_open.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/semaphore/sem_open.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -102,151 +103,158 @@
 FAR sem_t *sem_open (FAR const char *name, int oflags, ...)
 {
   FAR struct inode *inode;
-  FAR const char *relpath = NULL;
-  mode_t mode;
   FAR struct nsem_inode_s *nsem;
   FAR sem_t *sem = (FAR sem_t *)ERROR;
+  struct inode_search_s desc;
   char fullpath[MAX_SEMPATH];
+  mode_t mode;
   unsigned value;
   int errcode;
   int ret;
 
   /* Make sure that a non-NULL name is supplied */
 
-  if (name)
-    {
-      /* The POSIX specification requires that the "check for the existence
-       * of a semaphore and the creation of the semaphore if it does not 
-       * exist shall be atomic with respect to other processes executing
-       * sem_open()..."  A simple sched_lock() should be sufficient to meet
-       * this requirement.
-       */
-
-      sched_lock();
+  DEBUGASSERT(name != NULL);
 
-      /* Get the full path to the semaphore */
+  /* The POSIX specification requires that the "check for the existence
+   * of a semaphore and the creation of the semaphore if it does not
+   * exist shall be atomic with respect to other processes executing
+   * sem_open()..."  A simple sched_lock() should be sufficient to meet
+   * this requirement.
+   */
 
-      snprintf(fullpath, MAX_SEMPATH, CONFIG_FS_NAMED_SEMPATH "/%s", name);
+  sched_lock();
 
-      /* Get the inode for this semaphore.  This should succeed if the
-       * semaphore has already been created.  In this case, inode_finde()
-       * will have incremented the reference count on the inode.
-       */
+  /* Get the full path to the semaphore */
 
-      inode = inode_find(fullpath, &relpath);
-      if (inode)
-        {
-          /* It exists.  Verify that the inode is a semaphore */
+  snprintf(fullpath, MAX_SEMPATH, CONFIG_FS_NAMED_SEMPATH "/%s", name);
 
-          if (!INODE_IS_NAMEDSEM(inode))
-            {
-              errcode = ENXIO;
-              goto errout_with_inode;
-            }
+  /* Get the inode for this semaphore.  This should succeed if the
+   * semaphore has already been created.  In this case, inode_find()
+   * will have incremented the reference count on the inode.
+   */
 
-          /* It exists and is a semaphore.  Check if the caller wanted to
-           * create a new semaphore with this name.
-           */
+  SETUP_SEARCH(&desc, fullpath, false);
 
-          if ((oflags & (O_CREAT | O_EXCL)) == (O_CREAT | O_EXCL))
-            {
-              errcode = EEXIST;
-              goto errout_with_inode;
-            }
+  ret = inode_find(&desc);
+  if (ret >= 0)
+    {
+      /* Something exists at this path.  Get the search results */
 
-          /* Return a reference to the semaphore, retaining the reference
-           * count on the inode.
-           */
+      inode = desc.node;
+      DEBUGASSERT(inode != NULL);
 
-          sem = &inode->u.i_nsem->ns_sem;
+      /* Verify that the inode is a semaphore */
 
+      if (!INODE_IS_NAMEDSEM(inode))
+        {
+          errcode = ENXIO;
+          goto errout_with_inode;
         }
-      else
+
+      /* It exists and is a semaphore.  Check if the caller wanted to
+       * create a new semaphore with this name.
+       */
+
+      if ((oflags & (O_CREAT | O_EXCL)) == (O_CREAT | O_EXCL))
         {
-          va_list ap;
+          errcode = EEXIST;
+          goto errout_with_inode;
+        }
 
-          /* The semaphore does not exists.  Were we asked to create it? */
+      /* Return a reference to the semaphore, retaining the reference
+       * count on the inode.
+       */
 
-          if ((oflags & O_CREAT) == 0)
-            {
-              /* The semaphore does not exist and O_CREAT is not set */
+      sem = &inode->u.i_nsem->ns_sem;
+    }
+  else
+    {
+      va_list ap;
 
-              errcode = ENOENT;
-              goto errout_with_lock;
-            }
+      /* The semaphore does not exists.  Were we asked to create it? */
 
-          /* Create the semaphore.  First we have to extract the additional
-           * parameters from the variable argument list.
-           * REVISIT:  Mode parameter is not currently used.
-           */
+      if ((oflags & O_CREAT) == 0)
+        {
+          /* The semaphore does not exist and O_CREAT is not set */
 
-          va_start(ap, oflags);
-          mode  = va_arg(ap, mode_t);
-          value = va_arg(ap, unsigned);
-          va_end(ap);
+          errcode = ENOENT;
+          goto errout_with_lock;
+        }
 
-          UNUSED(mode);
+      /* Create the semaphore.  First we have to extract the additional
+       * parameters from the variable argument list.
+       * REVISIT:  Mode parameter is not currently used.
+       */
 
-          /* Check the semaphore value */
+      va_start(ap, oflags);
+      mode  = va_arg(ap, mode_t);
+      value = va_arg(ap, unsigned);
+      va_end(ap);
 
-          if (value > SEM_VALUE_MAX)
-            {
-              errcode = EINVAL;
-              goto errout_with_lock;
-            }
+      UNUSED(mode);
 
-          /* Create an inode in the pseudo-filesystem at this path.  The new
-           * inode will be created with a reference count of zero.
-           */
+      /* Check the semaphore value */
 
-          inode_semtake();
-          ret = inode_reserve(fullpath, &inode);
-          inode_semgive();
+      if (value > SEM_VALUE_MAX)
+        {
+          errcode = EINVAL;
+          goto errout_with_lock;
+        }
 
-          if (ret < 0)
-            {
-              errcode = -ret;
-              goto errout_with_lock;
-            }
+      /* Create an inode in the pseudo-filesystem at this path.  The new
+       * inode will be created with a reference count of zero.
+       */
 
-          /* Allocate the semaphore structure (using the appropriate allocator
-           * for the group)
-           */
+      inode_semtake();
+      ret = inode_reserve(fullpath, &inode);
+      inode_semgive();
 
-          nsem = group_malloc(NULL, sizeof(struct nsem_inode_s));
-          if (!nsem)
-            {
-              errcode = ENOMEM;
-              goto errout_with_inode;
-            }
+      if (ret < 0)
+        {
+          errcode = -ret;
+          goto errout_with_lock;
+        }
 
-          /* Link to the inode */
+      /* Allocate the semaphore structure (using the appropriate allocator
+       * for the group)
+       */
 
-          inode->u.i_nsem = nsem;
-          nsem->ns_inode  = inode;
+      nsem = group_malloc(NULL, sizeof(struct nsem_inode_s));
+      if (!nsem)
+        {
+          errcode = ENOMEM;
+          goto errout_with_inode;
+        }
 
-          /* Initialize the inode */
+      /* Link to the inode */
 
-          INODE_SET_NAMEDSEM(inode);
-          inode->i_crefs = 1;
+      inode->u.i_nsem = nsem;
+      nsem->ns_inode  = inode;
 
-          /* Initialize the semaphore */
+      /* Initialize the inode */
 
-          sem_init(&nsem->ns_sem, 0, value);
+      INODE_SET_NAMEDSEM(inode);
+      inode->i_crefs = 1;
 
-          /* Return a reference to the semaphore */
+      /* Initialize the semaphore */
 
-          sem = &nsem->ns_sem;
-        }
+      sem_init(&nsem->ns_sem, 0, value);
 
-      sched_unlock();
+      /* Return a reference to the semaphore */
+
+      sem = &nsem->ns_sem;
     }
 
+  RELEASE_SEARCH(&desc);
+  sched_unlock();
   return sem;
 
 errout_with_inode:
   inode_release(inode);
+
 errout_with_lock:
+  RELEASE_SEARCH(&desc);
   set_errno(errcode);
   sched_unlock();
   return (FAR sem_t *)ERROR;
diff --git a/fs/semaphore/sem_unlink.c b/fs/semaphore/sem_unlink.c
index 19f758f09358b996d11167870917760d2a28906d..ca73a800418ad55aa1733d7bcf3ccd7016b3198f 100644
--- a/fs/semaphore/sem_unlink.c
+++ b/fs/semaphore/sem_unlink.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/semaphore/sem_unlink.c
  *
- *   Copyright (C) 2007-2009, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,6 +39,7 @@
 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -79,7 +80,7 @@
 int sem_unlink(FAR const char *name)
 {
   FAR struct inode *inode;
-  FAR const char *relpath = NULL;
+  struct inode_search_s desc;
   char fullpath[MAX_SEMPATH];
   int errcode;
   int ret;
@@ -90,16 +91,23 @@ int sem_unlink(FAR const char *name)
 
   /* Get the inode for this semaphore. */
 
+  SETUP_SEARCH(&desc, fullpath, false);
+
   sched_lock();
-  inode = inode_find(fullpath, &relpath);
-  if (!inode)
+  ret = inode_find(&desc);
+  if (ret < 0)
     {
       /* There is no inode that includes in this path */
 
-      errcode = ENOENT;
-      goto errout;
+      errcode = -ret;
+      goto errout_with_search;
     }
 
+  /* Get the search results */
+
+  inode = desc.node;
+  DEBUGASSERT(inode != NULL);
+
   /* Verify that what we found is, indeed, a semaphore */
 
   if (!INODE_IS_NAMEDSEM(inode))
@@ -143,14 +151,18 @@ int sem_unlink(FAR const char *name)
 
   inode_semgive();
   ret = sem_close((FAR sem_t *)inode->u.i_nsem);
+  RELEASE_SEARCH(&desc);
   sched_unlock();
   return ret;
 
 errout_with_semaphore:
   inode_semgive();
+
 errout_with_inode:
   inode_release(inode);
-errout:
+
+errout_with_search:
+  RELEASE_SEARCH(&desc);
   set_errno(errcode);
   sched_unlock();
   return ERROR;
diff --git a/fs/smartfs/smartfs_procfs.c b/fs/smartfs/smartfs_procfs.c
index 474d85009fa5cbf63b5a94678c1043f9ebc797c1..915ebfd559c0f65b5a1e0e2733ba5f4d9e5381e8 100644
--- a/fs/smartfs/smartfs_procfs.c
+++ b/fs/smartfs/smartfs_procfs.c
@@ -348,7 +348,7 @@ static int smartfs_open(FAR struct file *filep, FAR const char *relpath,
   FAR struct smartfs_file_s *priv;
   int   ret;
 
-  fvdbg("Open '%s'\n", relpath);
+  finfo("Open '%s'\n", relpath);
 
   /* PROCFS is read-only.  Any attempt to open with any kind of write
    * access is not permitted.
@@ -359,7 +359,7 @@ static int smartfs_open(FAR struct file *filep, FAR const char *relpath,
   if (((oflags & O_WRONLY) != 0 || (oflags & O_RDONLY) == 0) &&
       (smartfs_procfsoperations.write == NULL))
     {
-      fdbg("ERROR: Only O_RDONLY supported\n");
+      ferr("ERROR: Only O_RDONLY supported\n");
       return -EACCES;
     }
 
@@ -368,7 +368,7 @@ static int smartfs_open(FAR struct file *filep, FAR const char *relpath,
   priv = (FAR struct smartfs_file_s *)kmm_malloc(sizeof(struct smartfs_file_s));
   if (!priv)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
@@ -421,7 +421,7 @@ static ssize_t smartfs_read(FAR struct file *filep, FAR char *buffer,
   FAR struct smartfs_file_s *priv;
   ssize_t ret;
 
-  fvdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+  finfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
 
   /* Recover our private data from the struct file instance */
 
@@ -506,7 +506,7 @@ static int smartfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   FAR struct smartfs_file_s *oldpriv;
   FAR struct smartfs_file_s *newpriv;
 
-  fvdbg("Dup %p->%p\n", oldp, newp);
+  finfo("Dup %p->%p\n", oldp, newp);
 
   /* Recover our private data from the old struct file instance */
 
@@ -518,7 +518,7 @@ static int smartfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   newpriv = (FAR struct smartfs_file_s *)kmm_malloc(sizeof(struct smartfs_file_s));
   if (!newpriv)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
@@ -545,7 +545,7 @@ static int smartfs_opendir(FAR const char *relpath, FAR struct fs_dirent_s *dir)
   FAR struct smartfs_level1_s *level1;
   int        ret;
 
-  fvdbg("relpath: \"%s\"\n", relpath ? relpath : "NULL");
+  finfo("relpath: \"%s\"\n", relpath ? relpath : "NULL");
   DEBUGASSERT(relpath && dir && !dir->u.procfs);
 
   /* The path refers to the 1st level subdirectory.  Allocate the level1
@@ -557,7 +557,7 @@ static int smartfs_opendir(FAR const char *relpath, FAR struct fs_dirent_s *dir)
 
   if (!level1)
     {
-      fdbg("ERROR: Failed to allocate the level1 directory structure\n");
+      ferr("ERROR: Failed to allocate the level1 directory structure\n");
       return -ENOMEM;
     }
 
@@ -624,7 +624,7 @@ static int smartfs_readdir(struct fs_dirent_s *dir)
        * error -ENOENT
        */
 
-      fvdbg("Entry %d: End of directory\n", index);
+      finfo("Entry %d: End of directory\n", index);
       ret = -ENOENT;
     }
 
diff --git a/fs/smartfs/smartfs_smart.c b/fs/smartfs/smartfs_smart.c
index df65d2bdd0478cab852c441a463e8b569bae04c6..23f36860fe813dcc0627e5dc48d75bc1c36c5496 100644
--- a/fs/smartfs/smartfs_smart.c
+++ b/fs/smartfs/smartfs_smart.c
@@ -69,33 +69,53 @@
 static int     smartfs_open(FAR struct file *filep, const char *relpath,
                         int oflags, mode_t mode);
 static int     smartfs_close(FAR struct file *filep);
-static ssize_t smartfs_read(FAR struct file *filep, char *buffer, size_t buflen);
+static ssize_t smartfs_read(FAR struct file *filep, char *buffer,
+                        size_t buflen);
 static ssize_t smartfs_write(FAR struct file *filep, const char *buffer,
                         size_t buflen);
-static off_t   smartfs_seek(FAR struct file *filep, off_t offset, int whence);
-static int     smartfs_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
+static off_t   smartfs_seek(FAR struct file *filep, off_t offset,
+                        int whence);
+static int     smartfs_ioctl(FAR struct file *filep, int cmd,
+                        unsigned long arg);
 
 static int     smartfs_sync(FAR struct file *filep);
-static int     smartfs_dup(FAR const struct file *oldp, FAR struct file *newp);
-
-static int     smartfs_opendir(struct inode *mountpt, const char *relpath,
-                        struct fs_dirent_s *dir);
-static int     smartfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir);
-static int     smartfs_rewinddir(struct inode *mountpt, struct fs_dirent_s *dir);
-
-static int     smartfs_bind(FAR struct inode *blkdriver, const void *data,
-                        void **handle);
+static int     smartfs_dup(FAR const struct file *oldp,
+                        FAR struct file *newp);
+static int     smartfs_fstat(FAR const struct file *filep,
+                        FAR struct stat *buf);
+
+static int     smartfs_opendir(FAR struct inode *mountpt,
+                        FAR const char *relpath,
+                        FAR struct fs_dirent_s *dir);
+static int     smartfs_readdir(FAR struct inode *mountpt,
+                        FAR struct fs_dirent_s *dir);
+static int     smartfs_rewinddir(FAR struct inode *mountpt,
+                       FAR struct fs_dirent_s *dir);
+
+static int     smartfs_bind(FAR struct inode *blkdriver,
+                        FAR const void *data,
+                        FAR void **handle);
 static int     smartfs_unbind(void *handle, FAR struct inode **blkdriver,
                         unsigned int flags);
-static int     smartfs_statfs(struct inode *mountpt, struct statfs *buf);
+static int     smartfs_statfs(FAR struct inode *mountpt,
+                        FAR struct statfs *buf);
 
-static int     smartfs_unlink(struct inode *mountpt, const char *relpath);
-static int     smartfs_mkdir(struct inode *mountpt, const char *relpath,
+static int     smartfs_unlink(FAR struct inode *mountpt,
+                        FAR const char *relpath);
+static int     smartfs_mkdir(FAR struct inode *mountpt,
+                        FAR const char *relpath,
                         mode_t mode);
-static int     smartfs_rmdir(struct inode *mountpt, const char *relpath);
-static int     smartfs_rename(struct inode *mountpt, const char *oldrelpath,
+static int     smartfs_rmdir(FAR struct inode *mountpt,
+                        FAR const char *relpath);
+static int     smartfs_rename(FAR struct inode *mountpt,
+                        FAR const char *oldrelpath,
                         const char *newrelpath);
-static int     smartfs_stat(struct inode *mountpt, const char *relpath, struct stat *buf);
+static void    smartfs_stat_common(FAR struct smartfs_mountpt_s *fs,
+                        FAR struct smartfs_entry_s *entry,
+                        FAR struct stat *buf);
+static int     smartfs_stat(FAR struct inode *mountpt,
+                        FAR const char *relpath,
+                        FAR struct stat *buf);
 
 static off_t smartfs_seek_internal(struct smartfs_mountpt_s *fs,
                         struct smartfs_ofile_s *sf,
@@ -128,6 +148,7 @@ const struct mountpt_operations smartfs_operations =
 
   smartfs_sync,          /* sync */
   smartfs_dup,           /* dup */
+  smartfs_fstat,         /* fstat */
 
   smartfs_opendir,       /* opendir */
   NULL,                  /* closedir */
@@ -182,7 +203,7 @@ static int smartfs_open(FAR struct file *filep, const char *relpath,
 
   /* Locate the directory entry for this path */
 
-  sf = (struct smartfs_ofile_s *) kmm_malloc(sizeof *sf);
+  sf = (struct smartfs_ofile_s *)kmm_malloc(sizeof *sf);
   if (sf == NULL)
     {
       ret = -ENOMEM;
@@ -192,7 +213,7 @@ static int smartfs_open(FAR struct file *filep, const char *relpath,
   /* Allocate a sector buffer if CRC enabled in the MTD layer */
 
 #ifdef CONFIG_SMARTFS_USE_SECTOR_BUFFER
-  sf->buffer = (uint8_t *) kmm_malloc(fs->fs_llformat.availbytes);
+  sf->buffer = (uint8_t *)kmm_malloc(fs->fs_llformat.availbytes);
   if (sf->buffer == NULL)
     {
       /* Error ... no memory */
@@ -505,7 +526,8 @@ static ssize_t smartfs_read(FAR struct file *filep, char *buffer, size_t buflen)
       ret = FS_IOCTL(fs, BIOC_READSECT, (unsigned long) &readwrite);
       if (ret < 0)
         {
-          fdbg("Error %d reading sector %d data\n", ret, sf->currsector);
+          ferr("ERROR: Error %d reading sector %d data\n",
+               ret, sf->currsector);
           goto errout_with_semaphore;
         }
 
@@ -614,7 +636,8 @@ static int smartfs_sync_internal(struct smartfs_mountpt_s *fs,
       ret = FS_IOCTL(fs, BIOC_WRITESECT, (unsigned long) &readwrite);
       if (ret < 0)
         {
-          fdbg("Error %d writing used bytes for sector %d\n", ret, sf->currsector);
+          ferr("ERROR: Error %d writing used bytes for sector %d\n",
+               ret, sf->currsector);
           goto errout;
         }
 
@@ -628,7 +651,7 @@ static int smartfs_sync_internal(struct smartfs_mountpt_s *fs,
 
   if (sf->byteswritten > 0)
     {
-      fvdbg("Syncing sector %d\n", sf->currsector);
+      finfo("Syncing sector %d\n", sf->currsector);
 
       /* Read the existing sector used bytes value */
 
@@ -639,7 +662,8 @@ static int smartfs_sync_internal(struct smartfs_mountpt_s *fs,
       ret = FS_IOCTL(fs, BIOC_READSECT, (unsigned long) &readwrite);
       if (ret < 0)
         {
-          fdbg("Error %d reading sector %d data\n", ret, sf->currsector);
+          ferr("ERROR: Error %d reading sector %d data\n",
+               ret, sf->currsector);
           goto errout;
         }
 
@@ -661,7 +685,8 @@ static int smartfs_sync_internal(struct smartfs_mountpt_s *fs,
       ret = FS_IOCTL(fs, BIOC_WRITESECT, (unsigned long) &readwrite);
       if (ret < 0)
         {
-          fdbg("Error %d writing used bytes for sector %d\n", ret, sf->currsector);
+          ferr("ERROR: Error %d writing used bytes for sector %d\n",
+               ret, sf->currsector);
           goto errout;
         }
 
@@ -766,7 +791,8 @@ static ssize_t smartfs_write(FAR struct file *filep, const char *buffer,
           ret = FS_IOCTL(fs, BIOC_WRITESECT, (unsigned long) &readwrite);
           if (ret < 0)
             {
-              fdbg("Error %d writing sector %d data\n", ret, sf->currsector);
+              ferr("ERROR: Error %d writing sector %d data\n", 
+                   ret, sf->currsector);
               goto errout_with_semaphore;
             }
 
@@ -793,7 +819,8 @@ static ssize_t smartfs_write(FAR struct file *filep, const char *buffer,
           ret = FS_IOCTL(fs, BIOC_READSECT, (unsigned long) &readwrite);
           if (ret < 0)
             {
-              fdbg("Error %d reading sector %d header\n", ret, sf->currsector);
+              ferr("ERROR: Error %d reading sector %d header\n",
+                   ret, sf->currsector);
               goto errout_with_semaphore;
             }
 
@@ -841,7 +868,8 @@ static ssize_t smartfs_write(FAR struct file *filep, const char *buffer,
           ret = FS_IOCTL(fs, BIOC_WRITESECT, (unsigned long) &readwrite);
           if (ret < 0)
             {
-              fdbg("Error %d writing sector %d data\n", ret, sf->currsector);
+              ferr("ERROR: Error %d writing sector %d data\n",
+                   ret, sf->currsector);
               goto errout_with_semaphore;
             }
         }
@@ -867,7 +895,7 @@ static ssize_t smartfs_write(FAR struct file *filep, const char *buffer,
           ret = FS_IOCTL(fs, BIOC_ALLOCSECT, 0xFFFF);
           if (ret < 0)
             {
-              fdbg("Error %d allocating new sector\n", ret);
+              ferr("ERROR: Error %d allocating new sector\n", ret);
               goto errout_with_semaphore;
             }
 
@@ -892,7 +920,7 @@ static ssize_t smartfs_write(FAR struct file *filep, const char *buffer,
             {
               /* Error allocating logical sector! */
 
-              fdbg("Error - duplicate logical sector %d\n", sf->currsector);
+              ferr("ERROR: Duplicate logical sector %d\n", sf->currsector);
             }
 
           sf->bflags = SMARTFS_BFLAG_DIRTY;
@@ -922,7 +950,7 @@ static ssize_t smartfs_write(FAR struct file *filep, const char *buffer,
               ret = FS_IOCTL(fs, BIOC_ALLOCSECT, 0xFFFF);
               if (ret < 0)
                 {
-                  fdbg("Error %d allocating new sector\n", ret);
+                  ferr("ERROR: Error %d allocating new sector\n", ret);
                   goto errout_with_semaphore;
                 }
 
@@ -937,7 +965,7 @@ static ssize_t smartfs_write(FAR struct file *filep, const char *buffer,
               ret = FS_IOCTL(fs, BIOC_WRITESECT, (unsigned long) &readwrite);
               if (ret < 0)
                 {
-                  fdbg("Error %d writing next sector\n", ret);
+                  ferr("ERROR: Error %d writing next sector\n", ret);
                   goto errout_with_semaphore;
                 }
 
@@ -949,7 +977,7 @@ static ssize_t smartfs_write(FAR struct file *filep, const char *buffer,
                 {
                   /* Error allocating logical sector! */
 
-                  fdbg("Error - duplicate logical sector %d\n", sf->currsector);
+                  ferr("ERROR: Duplicate logical sector %d\n", sf->currsector);
                 }
 
               sf->currsector = SMARTFS_NEXTSECTOR(header);
@@ -1078,7 +1106,8 @@ static off_t smartfs_seek_internal(struct smartfs_mountpt_s *fs,
       ret = FS_IOCTL(fs, BIOC_READSECT, (unsigned long) &readwrite);
       if (ret < 0)
         {
-          fdbg("Error %d reading sector %d header\n", ret, sf->currsector);
+          ferr("ERROR: Error %d reading sector %d header\n",
+               ret, sf->currsector);
           goto errout;
         }
 
@@ -1103,7 +1132,8 @@ static off_t smartfs_seek_internal(struct smartfs_mountpt_s *fs,
       ret = FS_IOCTL(fs, BIOC_READSECT, (unsigned long) &readwrite);
       if (ret < 0)
         {
-          fdbg("Error %d reading sector %d header\n", ret, sf->currsector);
+          ferr("ERROR: Error %d reading sector %d header\n",
+               ret, sf->currsector);
           goto errout;
         }
     }
@@ -1218,7 +1248,7 @@ static int smartfs_dup(FAR const struct file *oldp, FAR struct file *newp)
 {
   struct smartfs_ofile_s   *sf;
 
-  fvdbg("Dup %p->%p\n", oldp, newp);
+  finfo("Dup %p->%p\n", oldp, newp);
 
   /* Sanity checks */
 
@@ -1240,6 +1270,43 @@ static int smartfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   return OK;
 }
 
+/****************************************************************************
+ * Name: smartfs_fstat
+ *
+ * Description:
+ *   Obtain information about an open file associated with the file
+ *   descriptor 'fd', and will write it to the area pointed to by 'buf'.
+ *
+ ****************************************************************************/
+
+static int smartfs_fstat(FAR const struct file *filep, FAR struct stat *buf)
+{
+  FAR struct inode *inode;
+  FAR struct smartfs_mountpt_s *fs;
+  FAR struct smartfs_ofile_s *sf;
+
+  DEBUGASSERT(filep != NULL && buf != NULL);
+
+  /* Recover our private data from the struct file instance */
+
+  DEBUGASSERT(filep->f_priv != NULL && filep->f_inode != NULL);
+  sf    = filep->f_priv;
+  inode = filep->f_inode;
+
+  fs    = inode->i_private;
+  DEBUGASSERT(fs != NULL);
+
+  /* Take the semaphore */
+
+  smartfs_semtake(fs);
+
+  /* Return information about the directory entry in the stat structure */
+
+  smartfs_stat_common(fs, &sf->entry, buf);
+  smartfs_semgive(fs);
+  return OK;
+}
+
 /****************************************************************************
  * Name: smartfs_opendir
  *
@@ -1247,7 +1314,8 @@ static int smartfs_dup(FAR const struct file *oldp, FAR struct file *newp)
  *
  ****************************************************************************/
 
-static int smartfs_opendir(struct inode *mountpt, const char *relpath, struct fs_dirent_s *dir)
+static int smartfs_opendir(FAR struct inode *mountpt, FAR const char *relpath,
+                           FAR struct fs_dirent_s *dir)
 {
   struct smartfs_mountpt_s *fs;
   int                       ret;
@@ -1682,6 +1750,11 @@ static int smartfs_unlink(struct inode *mountpt, const char *relpath)
   ret = OK;
 
 errout_with_semaphore:
+  if (entry.name != NULL)
+    {
+      kmm_free(entry.name);
+    }
+
   smartfs_semgive(fs);
   return ret;
 }
@@ -1847,6 +1920,11 @@ int smartfs_rmdir(struct inode *mountpt, const char *relpath)
   ret = OK;
 
 errout_with_semaphore:
+  if (entry.name != NULL)
+    {
+      kmm_free(entry.name);
+    }
+
   smartfs_semgive(fs);
   return ret;
 }
@@ -1871,9 +1949,6 @@ int smartfs_rename(struct inode *mountpt, const char *oldrelpath,
   const char               *newfilename;
   mode_t                    mode;
   uint16_t                  type;
-  uint16_t                  sector;
-  uint16_t                  offset;
-  uint16_t                  entrysize;
   struct smartfs_entry_header_s *direntry;
   struct smart_read_write_s readwrite;
 
@@ -1892,93 +1967,25 @@ int smartfs_rename(struct inode *mountpt, const char *oldrelpath,
   oldentry.name = NULL;
   newentry.name = NULL;
   ret = smartfs_finddirentry(fs, &oldentry, oldrelpath, &oldparentdirsector,
-          &oldfilename);
+                             &oldfilename);
   if (ret < 0)
     {
       goto errout_with_semaphore;
     }
 
-  /* Search for the new entry and validate it DOESN'T exist, unless we
-   * are copying to a directory and keeping the same filename, such as:
-   *
-   *    mv /mntpoint/somefile.txt /mntpoint/somedir
-   *
-   * in which case, we need to validate the /mntpoint/somedir/somefile.txt
-   * doens't exsit.
-   */
+  /* Search for the new entry and validate it DOESN'T exist. */
 
   ret = smartfs_finddirentry(fs, &newentry, newrelpath, &newparentdirsector,
-          &newfilename);
+                             &newfilename);
   if (ret == OK)
     {
-      /* Test if it's a file.  If it is, then it's an error */
-
-      if ((newentry.flags & SMARTFS_DIRENT_TYPE) == SMARTFS_DIRENT_TYPE_FILE)
-        {
-          ret = -EEXIST;
-          goto errout_with_semaphore;
-        }
-
-      /* Nope, it's a directory.  Now search the directory for oldfilename */
-
-      sector = newentry.firstsector;
-      while (sector != SMARTFS_ERASEDSTATE_16BIT)
-        {
-          /* Read the next sector of diretory entries */
-
-          readwrite.logsector = sector;
-          readwrite.offset = 0;
-          readwrite.count = fs->fs_llformat.availbytes;
-          readwrite.buffer = (uint8_t *) fs->fs_rwbuffer;
-          ret = FS_IOCTL(fs, BIOC_READSECT, (unsigned long) &readwrite);
-          if (ret < 0)
-            {
-              fdbg("Error %d reading sector %d data\n", ret, oldentry.dsector);
-              goto errout_with_semaphore;
-            }
-
-          /* Search for newfilename in this sector */
-
-          offset = sizeof(struct smartfs_chain_header_s);
-          entrysize = sizeof(struct smartfs_entry_header_s) + fs->fs_llformat.namesize;
-          while (offset + entrysize < fs->fs_llformat.availbytes)
-            {
-              /* Test the next entry */
-
-              direntry = (struct smartfs_entry_header_s *) &fs->fs_rwbuffer[offset];
-              if (((direntry->flags & SMARTFS_DIRENT_EMPTY) ==
-                  (SMARTFS_ERASEDSTATE_16BIT & SMARTFS_DIRENT_EMPTY)) ||
-                  ((direntry->flags & SMARTFS_DIRENT_ACTIVE) !=
-                  (SMARTFS_ERASEDSTATE_16BIT & SMARTFS_DIRENT_ACTIVE)))
-                {
-                  /* This entry isn't valid, skip it */
-
-                  offset += entrysize;
-                  continue;
-                }
-
-              /* Test if this entry matches newfilename */
-
-              if (strcmp(newfilename, direntry->name) == 0)
-                {
-                  /* Uh-oh, looks like the entry already exists */
-
-                  ret = -EEXIST;
-                  goto errout_with_semaphore;
-                }
-
-              offset += entrysize;
-            }
-
-          /* Chain to next sector */
-
-          sector = SMARTFS_NEXTSECTOR(((struct smartfs_chain_header_s *)fs->fs_rwbuffer));
-        }
-
-      /* Okay, we will create newfilename in the newentry directory */
+      /* It is an error if the directory entry at newrelpath already
+       * exists.  The necessary steps to avoid this case should have been
+       * handled by higher level logic in the VFS.
+       */
 
-      newparentdirsector = newentry.firstsector;
-      newfilename = oldfilename;
+      ret = -EEXIST;
+      goto errout_with_semaphore;
     }
 
   /* Test if the new parent directory is valid */
@@ -2005,7 +2012,8 @@ int smartfs_rename(struct inode *mountpt, const char *oldrelpath,
       ret = FS_IOCTL(fs, BIOC_READSECT, (unsigned long) &readwrite);
       if (ret < 0)
         {
-          fdbg("Error %d reading sector %d data\n", ret, oldentry.dsector);
+          ferr("ERROR: Error %d reading sector %d data\n",
+               ret, oldentry.dsector);
           goto errout_with_semaphore;
         }
 
@@ -2024,7 +2032,8 @@ int smartfs_rename(struct inode *mountpt, const char *oldrelpath,
       ret = FS_IOCTL(fs, BIOC_WRITESECT, (unsigned long) &readwrite);
       if (ret < 0)
         {
-          fdbg("Error %d writing flag bytes for sector %d\n", ret, readwrite.logsector);
+          ferr("ERROR: Error %d writing flag bytes for sector %d\n",
+               ret, readwrite.logsector);
           goto errout_with_semaphore;
         }
     }
@@ -2055,20 +2064,62 @@ errout_with_semaphore:
   return ret;
 }
 
+/****************************************************************************
+ * Name: smartfs_stat_common
+ *
+ * Description:
+ *   Return information about a directory entry
+ *
+ ****************************************************************************/
+
+static void smartfs_stat_common(FAR struct smartfs_mountpt_s *fs,
+                                FAR struct smartfs_entry_s *entry,
+                                FAR struct stat *buf)
+{
+  /* Initialize the stat structure */
+
+  memset(buf, 0, sizeof(struct stat));
+  if (entry->firstsector == fs->fs_rootsector)
+    {
+      /* It's directory name of the mount point */
+
+      buf->st_mode = S_IFDIR | S_IROTH | S_IRGRP | S_IRUSR | S_IWOTH |
+                     S_IWGRP | S_IWUSR;
+    }
+  else
+    {
+      buf->st_mode = entry->flags & 0xFFF;
+      if ((entry->flags & SMARTFS_DIRENT_TYPE) == SMARTFS_DIRENT_TYPE_DIR)
+        {
+          buf->st_mode |= S_IFDIR;
+        }
+      else
+        {
+          buf->st_mode |= S_IFREG;
+        }
+
+      buf->st_size    = entry->datlen;
+      buf->st_blksize = fs->fs_llformat.availbytes;
+      buf->st_blocks  = (buf->st_size + buf->st_blksize - 1) / buf->st_blksize;
+    }
+}
+
 /****************************************************************************
  * Name: smartfs_stat
  *
- * Description: Return information about a file or directory
+ * Description:
+ *   Return information about a file or directory
  *
  ****************************************************************************/
 
-static int smartfs_stat(struct inode *mountpt, const char *relpath, struct stat *buf)
+static int smartfs_stat(FAR struct inode *mountpt, FAR const char *relpath,
+                        FAR struct stat *buf)
 {
-  struct smartfs_mountpt_s *fs;
-  struct smartfs_entry_s    entry;
-  int                       ret;
-  uint16_t                  parentdirsector;
-  const char               *filename;
+  FAR struct smartfs_mountpt_s *fs;
+  FAR struct smartfs_entry_s entry;
+  FAR const char *filename;
+  uint16_t parentdirsector;
+  int ret;
 
   /* Sanity checks */
 
@@ -2090,35 +2141,9 @@ static int smartfs_stat(struct inode *mountpt, const char *relpath, struct stat
       goto errout_with_semaphore;
     }
 
-  /* Initialize the stat structure */
-
-  memset(buf, 0, sizeof(struct stat));
-  if (entry.firstsector == fs->fs_rootsector)
-    {
-      /* It's directory name of the mount point */
-
-      buf->st_mode = S_IFDIR | S_IROTH | S_IRGRP | S_IRUSR | S_IWOTH |
-                     S_IWGRP | S_IWUSR;
-      ret = OK;
-      goto errout_with_semaphore;
-    }
-
-  buf->st_mode = entry.flags & 0xFFF;
-  if ((entry.flags & SMARTFS_DIRENT_TYPE) == SMARTFS_DIRENT_TYPE_DIR)
-    {
-      buf->st_mode |= S_IFDIR;
-    }
-  else
-    {
-      buf->st_mode |= S_IFREG;
-    }
-
-  buf->st_size      = entry.datlen;
-  buf->st_blksize   = fs->fs_llformat.availbytes;
-  buf->st_blocks    = (buf->st_size + buf->st_blksize - 1) / buf->st_blksize;
-  buf->st_atime     = 0;
-  buf->st_ctime     = 0;
+  /* Return information about the directory entry in the stat structure */
 
+  smartfs_stat_common(fs, &entry, buf);
   ret = OK;
 
 errout_with_semaphore:
diff --git a/fs/smartfs/smartfs_utils.c b/fs/smartfs/smartfs_utils.c
index 4970c51d8fbbfb1dca14600a570f1d286a3bc9d9..44efc60c26eb40cc2b135070c5a2bdba53e07b5e 100644
--- a/fs/smartfs/smartfs_utils.c
+++ b/fs/smartfs/smartfs_utils.c
@@ -231,7 +231,7 @@ int smartfs_mount(struct smartfs_mountpt_s *fs, bool writeable)
   ret = FS_IOCTL(fs, BIOC_GETFORMAT, (unsigned long) &fs->fs_llformat);
   if (ret != OK)
     {
-      fdbg("Error getting device low level format: %d\n", ret);
+      ferr("ERROR: Error getting device low level format: %d\n", ret);
       goto errout;
     }
 
@@ -239,7 +239,7 @@ int smartfs_mount(struct smartfs_mountpt_s *fs, bool writeable)
 
   if (!(fs->fs_llformat.flags & SMART_FMT_ISFORMATTED))
     {
-      fdbg("No low-level format found\n");
+      ferr("ERROR: No low-level format found\n");
       ret = -ENODEV;
       goto errout;
     }
@@ -311,16 +311,16 @@ int smartfs_mount(struct smartfs_mountpt_s *fs, bool writeable)
 
   fs->fs_mounted = TRUE;
 
-  fdbg("SMARTFS:\n");
-  fdbg("\t    Sector size:     %d\n", fs->fs_llformat.sectorsize);
-  fdbg("\t    Bytes/sector     %d\n", fs->fs_llformat.availbytes);
-  fdbg("\t    Num sectors:     %d\n", fs->fs_llformat.nsectors);
-  fdbg("\t    Free sectors:    %d\n", fs->fs_llformat.nfreesectors);
-  fdbg("\t    Max filename:    %d\n", CONFIG_SMARTFS_MAXNAMLEN);
+  finfo("SMARTFS:\n");
+  finfo("\t    Sector size:     %d\n", fs->fs_llformat.sectorsize);
+  finfo("\t    Bytes/sector     %d\n", fs->fs_llformat.availbytes);
+  finfo("\t    Num sectors:     %d\n", fs->fs_llformat.nsectors);
+  finfo("\t    Free sectors:    %d\n", fs->fs_llformat.nfreesectors);
+  finfo("\t    Max filename:    %d\n", CONFIG_SMARTFS_MAXNAMLEN);
 #ifdef CONFIG_SMARTFS_MULTI_ROOT_DIRS
-  fdbg("\t    RootDirEntries:  %d\n", fs->fs_llformat.nrootdirentries);
+  finfo("\t    RootDirEntries:  %d\n", fs->fs_llformat.nrootdirentries);
 #endif
-  fdbg("\t    RootDirSector:   %d\n", fs->fs_rootsector);
+  finfo("\t    RootDirSector:   %d\n", fs->fs_rootsector);
 
 errout:
   return ret;
@@ -695,10 +695,12 @@ int smartfs_finddirentry(struct smartfs_mountpt_s *fs,
                                   /* Read the next sector of the file */
 
                                   readwrite.logsector = dirsector;
-                                  ret = FS_IOCTL(fs, BIOC_READSECT, (unsigned long) &readwrite);
+                                  ret = FS_IOCTL(fs, BIOC_READSECT,
+                                                 (unsigned long) &readwrite);
                                   if (ret < 0)
                                     {
-                                      fdbg("Error in sector chain at %d!\n", dirsector);
+                                      ferr("ERROR: Error in sector chain at %d!\n",
+                                           dirsector);
                                       break;
                                     }
 
@@ -937,7 +939,7 @@ int smartfs_createentry(FAR struct smartfs_mountpt_s *fs,
           ret = FS_IOCTL(fs, BIOC_WRITESECT, (unsigned long) &readwrite);
           if (ret < 0)
             {
-              fdbg("Error chaining sector %d\n", nextsector);
+              ferr("ERROR: Error chaining sector %d\n", nextsector);
               goto errout;
             }
         }
@@ -1014,7 +1016,7 @@ int smartfs_createentry(FAR struct smartfs_mountpt_s *fs,
           ret = FS_IOCTL(fs, BIOC_WRITESECT, (unsigned long) &readwrite);
           if (ret < 0)
             {
-              fdbg("Error %d setting new sector type for sector %d\n",
+              ferr("ERROR: Error %d setting new sector type for sector %d\n",
                    ret, nextsector);
               goto errout;
             }
@@ -1129,7 +1131,7 @@ int smartfs_deleteentry(struct smartfs_mountpt_s *fs,
       ret = FS_IOCTL(fs, BIOC_READSECT, (unsigned long) &readwrite);
       if (ret < 0)
         {
-          fdbg("Error reading sector %d\n", nextsector);
+          ferr("ERROR: Error reading sector %d\n", nextsector);
           break;
         }
 
@@ -1148,7 +1150,8 @@ int smartfs_deleteentry(struct smartfs_mountpt_s *fs,
   ret = FS_IOCTL(fs, BIOC_READSECT, (unsigned long) &readwrite);
   if (ret < 0)
     {
-      fdbg("Error reading directory info at sector %d\n", entry->dsector);
+      ferr("ERROR: Error reading directory info at sector %d\n",
+           entry->dsector);
       goto errout;
     }
 
@@ -1177,7 +1180,8 @@ int smartfs_deleteentry(struct smartfs_mountpt_s *fs,
   ret = FS_IOCTL(fs, BIOC_WRITESECT, (unsigned long) &readwrite);
   if (ret < 0)
     {
-      fdbg("Error marking entry inactive at sector %d\n", entry->dsector);
+      ferr("ERROR: Error marking entry inactive at sector %d\n",
+           entry->dsector);
       goto errout;
     }
 
@@ -1242,7 +1246,7 @@ int smartfs_deleteentry(struct smartfs_mountpt_s *fs,
               ret = FS_IOCTL(fs, BIOC_READSECT, (unsigned long) &readwrite);
               if (ret < 0)
                 {
-                  fdbg("Error reading sector %d\n", nextsector);
+                  ferr("ERROR: Error reading sector %d\n", nextsector);
                   break;
                 }
 
@@ -1259,7 +1263,7 @@ int smartfs_deleteentry(struct smartfs_mountpt_s *fs,
                   ret = FS_IOCTL(fs, BIOC_WRITESECT, (unsigned long) &readwrite);
                   if (ret < 0)
                     {
-                      fdbg("Error unchaining sector (%d)\n", nextsector);
+                      ferr("ERROR: Error unchaining sector (%d)\n", nextsector);
                       goto errout;
                     }
 
@@ -1268,7 +1272,7 @@ int smartfs_deleteentry(struct smartfs_mountpt_s *fs,
                   ret = FS_IOCTL(fs, BIOC_FREESECT, (unsigned long) entry->dsector);
                   if (ret < 0)
                     {
-                      fdbg("Error freeing sector %d\n", entry->dsector);
+                      ferr("ERROR: Error freeing sector %d\n", entry->dsector);
                       goto errout;
                     }
 
@@ -1327,7 +1331,7 @@ int smartfs_countdirentries(struct smartfs_mountpt_s *fs,
       ret = FS_IOCTL(fs, BIOC_READSECT, (unsigned long) &readwrite);
       if (ret < 0)
         {
-          fdbg("Error reading sector %d\n", nextsector);
+          ferr("ERROR: Error reading sector %d\n", nextsector);
           break;
         }
 
@@ -1336,7 +1340,7 @@ int smartfs_countdirentries(struct smartfs_mountpt_s *fs,
       header = (struct smartfs_chain_header_s *) fs->fs_rwbuffer;
       if (header->type != SMARTFS_SECTOR_TYPE_DIR)
         {
-          fdbg("Sector %d is not a DIR sector!\n", nextsector);
+          ferr("ERROR: Sector %d is not a DIR sector!\n", nextsector);
           goto errout;
         }
 
@@ -1411,7 +1415,7 @@ int smartfs_truncatefile(struct smartfs_mountpt_s *fs,
       ret = FS_IOCTL(fs, BIOC_READSECT, (unsigned long) &readwrite);
       if (ret < 0)
         {
-          fdbg("Error reading sector %d header\n", nextsector);
+          ferr("ERROR: Error reading sector %d header\n", nextsector);
           goto errout;
         }
 
@@ -1447,7 +1451,7 @@ int smartfs_truncatefile(struct smartfs_mountpt_s *fs,
           ret = FS_IOCTL(fs, BIOC_WRITESECT, (unsigned long) &readwrite);
           if (ret < 0)
             {
-              fdbg("Error blanking 1st sector (%d) of file\n", nextsector);
+              ferr("ERROR: Error blanking 1st sector (%d) of file\n", nextsector);
               goto errout;
             }
 
@@ -1463,7 +1467,7 @@ int smartfs_truncatefile(struct smartfs_mountpt_s *fs,
           ret = FS_IOCTL(fs, BIOC_FREESECT, (unsigned long) nextsector);
           if (ret < 0)
             {
-              fdbg("Error freeing sector %d\n", nextsector);
+              ferr("ERROR: Error freeing sector %d\n", nextsector);
               goto errout;
             }
         }
diff --git a/fs/tmpfs/fs_tmpfs.c b/fs/tmpfs/fs_tmpfs.c
index 09aa6bec7040e0bed90ec6ae362d13bb1f83978b..44268ea4ab421c23087aaab3379a74c5ef49156e 100644
--- a/fs/tmpfs/fs_tmpfs.c
+++ b/fs/tmpfs/fs_tmpfs.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/tmpfs/fs_tmpfs.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -91,75 +91,79 @@ static void tmpfs_unlock_reentrant(FAR struct tmpfs_sem_s *sem);
 static void tmpfs_unlock(FAR struct tmpfs_s *fs);
 static void tmpfs_lock_object(FAR struct tmpfs_object_s *to);
 static void tmpfs_unlock_object(FAR struct tmpfs_object_s *to);
-static int tmpfs_realloc_directory(FAR struct tmpfs_directory_s **tdo,
-            unsigned int nentries);
-static int tmpfs_realloc_file(FAR struct tmpfs_file_s **tfo,
-            size_t newsize);
+static int  tmpfs_realloc_directory(FAR struct tmpfs_directory_s **tdo,
+              unsigned int nentries);
+static int  tmpfs_realloc_file(FAR struct tmpfs_file_s **tfo,
+              size_t newsize);
 static void tmpfs_release_lockedobject(FAR struct tmpfs_object_s *to);
 static void tmpfs_release_lockedfile(FAR struct tmpfs_file_s *tfo);
-static int tmpfs_find_dirent(FAR struct tmpfs_directory_s *tdo,
-            FAR const char *name);
-static int tmpfs_remove_dirent(FAR struct tmpfs_directory_s *tdo,
-            FAR const char *name);
-static int tmpfs_add_dirent(FAR struct tmpfs_directory_s **tdo,
-            FAR struct tmpfs_object_s *to, FAR const char *name);
+static int  tmpfs_find_dirent(FAR struct tmpfs_directory_s *tdo,
+              FAR const char *name);
+static int  tmpfs_remove_dirent(FAR struct tmpfs_directory_s *tdo,
+              FAR const char *name);
+static int  tmpfs_add_dirent(FAR struct tmpfs_directory_s **tdo,
+              FAR struct tmpfs_object_s *to, FAR const char *name);
 static FAR struct tmpfs_file_s *tmpfs_alloc_file(void);
-static int tmpfs_create_file(FAR struct tmpfs_s *fs,
-            FAR const char *relpath, FAR struct tmpfs_file_s **tfo);
+static int  tmpfs_create_file(FAR struct tmpfs_s *fs,
+              FAR const char *relpath, FAR struct tmpfs_file_s **tfo);
 static FAR struct tmpfs_directory_s *tmpfs_alloc_directory(void);
-static int tmpfs_create_directory(FAR struct tmpfs_s *fs,
-            FAR const char *relpath, FAR struct tmpfs_directory_s **tdo);
-static int tmpfs_find_object(FAR struct tmpfs_s *fs,
-            FAR const char *relpath, FAR struct tmpfs_object_s **object,
-            FAR struct tmpfs_directory_s **parent);
-static int tmpfs_find_file(FAR struct tmpfs_s *fs,
-            FAR const char *relpath,
-            FAR struct tmpfs_file_s **tfo,
-            FAR struct tmpfs_directory_s **parent);
-static int tmpfs_find_directory(FAR struct tmpfs_s *fs,
-            FAR const char *relpath,
-            FAR struct tmpfs_directory_s **tdo,
-            FAR struct tmpfs_directory_s **parent);
-static int tmpfs_statfs_callout(FAR struct tmpfs_directory_s *tdo,
-            unsigned int index, FAR void *arg);
-static int tmpfs_free_callout(FAR struct tmpfs_directory_s *tdo,
-            unsigned int index, FAR void *arg);
-static int tmpfs_foreach(FAR struct tmpfs_directory_s *tdo,
-            tmpfs_foreach_t callout, FAR void *arg);
+static int  tmpfs_create_directory(FAR struct tmpfs_s *fs,
+              FAR const char *relpath, FAR struct tmpfs_directory_s **tdo);
+static int  tmpfs_find_object(FAR struct tmpfs_s *fs,
+              FAR const char *relpath, FAR struct tmpfs_object_s **object,
+              FAR struct tmpfs_directory_s **parent);
+static int  tmpfs_find_file(FAR struct tmpfs_s *fs,
+              FAR const char *relpath,
+              FAR struct tmpfs_file_s **tfo,
+              FAR struct tmpfs_directory_s **parent);
+static int  tmpfs_find_directory(FAR struct tmpfs_s *fs,
+              FAR const char *relpath,
+              FAR struct tmpfs_directory_s **tdo,
+              FAR struct tmpfs_directory_s **parent);
+static int  tmpfs_statfs_callout(FAR struct tmpfs_directory_s *tdo,
+              unsigned int index, FAR void *arg);
+static int  tmpfs_free_callout(FAR struct tmpfs_directory_s *tdo,
+              unsigned int index, FAR void *arg);
+static int  tmpfs_foreach(FAR struct tmpfs_directory_s *tdo,
+              tmpfs_foreach_t callout, FAR void *arg);
 
 /* File system operations */
 
-static int tmpfs_open(FAR struct file *filep, FAR const char *relpath,
-            int oflags, mode_t mode);
-static int tmpfs_close(FAR struct file *filep);
+static int  tmpfs_open(FAR struct file *filep, FAR const char *relpath,
+              int oflags, mode_t mode);
+static int  tmpfs_close(FAR struct file *filep);
 static ssize_t tmpfs_read(FAR struct file *filep, FAR char *buffer,
-            size_t buflen);
+              size_t buflen);
 static ssize_t tmpfs_write(FAR struct file *filep, FAR const char *buffer,
-            size_t buflen);
+              size_t buflen);
 static off_t tmpfs_seek(FAR struct file *filep, off_t offset, int whence);
-static int tmpfs_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
-static int tmpfs_dup(FAR const struct file *oldp, FAR struct file *newp);
-static int tmpfs_opendir(FAR struct inode *mountpt, FAR const char *relpath,
-            FAR struct fs_dirent_s *dir);
-static int tmpfs_closedir(FAR struct inode *mountpt,
-            FAR struct fs_dirent_s *dir);
-static int tmpfs_readdir(FAR struct inode *mountpt,
-            FAR struct fs_dirent_s *dir);
-static int tmpfs_rewinddir(FAR struct inode *mountpt,
-            FAR struct fs_dirent_s *dir);
-static int tmpfs_bind(FAR struct inode *blkdriver, FAR const void *data,
-            FAR void **handle);
-static int tmpfs_unbind(FAR void *handle, FAR struct inode **blkdriver,
-            unsigned int flags);
-static int tmpfs_statfs(FAR struct inode *mountpt, FAR struct statfs *buf);
-static int tmpfs_unlink(FAR struct inode *mountpt, FAR const char *relpath);
-static int tmpfs_mkdir(FAR struct inode *mountpt, FAR const char *relpath,
-            mode_t mode);
-static int tmpfs_rmdir(FAR struct inode *mountpt, FAR const char *relpath);
-static int tmpfs_rename(FAR struct inode *mountpt, FAR const char *oldrelpath,
-            FAR const char *newrelpath);
-static int tmpfs_stat(FAR struct inode *mountpt, FAR const char *relpath,
-            FAR struct stat *buf);
+static int  tmpfs_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
+static int  tmpfs_dup(FAR const struct file *oldp, FAR struct file *newp);
+static int  tmpfs_fstat(FAR const struct file *filep, FAR struct stat *buf);
+
+static int  tmpfs_opendir(FAR struct inode *mountpt, FAR const char *relpath,
+              FAR struct fs_dirent_s *dir);
+static int  tmpfs_closedir(FAR struct inode *mountpt,
+              FAR struct fs_dirent_s *dir);
+static int  tmpfs_readdir(FAR struct inode *mountpt,
+              FAR struct fs_dirent_s *dir);
+static int  tmpfs_rewinddir(FAR struct inode *mountpt,
+              FAR struct fs_dirent_s *dir);
+static int  tmpfs_bind(FAR struct inode *blkdriver, FAR const void *data,
+              FAR void **handle);
+static int  tmpfs_unbind(FAR void *handle, FAR struct inode **blkdriver,
+              unsigned int flags);
+static int  tmpfs_statfs(FAR struct inode *mountpt, FAR struct statfs *buf);
+static int  tmpfs_unlink(FAR struct inode *mountpt, FAR const char *relpath);
+static int  tmpfs_mkdir(FAR struct inode *mountpt, FAR const char *relpath,
+              mode_t mode);
+static int  tmpfs_rmdir(FAR struct inode *mountpt, FAR const char *relpath);
+static int  tmpfs_rename(FAR struct inode *mountpt, FAR const char *oldrelpath,
+              FAR const char *newrelpath);
+static void tmpfs_stat_common(FAR struct tmpfs_object_s *to,
+                              FAR struct stat *buf);
+static int  tmpfs_stat(FAR struct inode *mountpt, FAR const char *relpath,
+              FAR struct stat *buf);
 
 /****************************************************************************
  * Public Data
@@ -175,6 +179,7 @@ const struct mountpt_operations tmpfs_operations =
   tmpfs_ioctl,      /* ioctl */
   NULL,             /* sync */
   tmpfs_dup,        /* dup */
+  tmpfs_fstat,      /* fstat */
   tmpfs_opendir,    /* opendir */
   tmpfs_closedir,   /* closedir */
   tmpfs_readdir,    /* readdir */
@@ -924,8 +929,8 @@ static int tmpfs_find_object(FAR struct tmpfs_s *fs,
                              FAR struct tmpfs_object_s **object,
                              FAR struct tmpfs_directory_s **parent)
 {
-  FAR struct tmpfs_object_s *to;
-  FAR struct tmpfs_directory_s *tdo;
+  FAR struct tmpfs_object_s *to = NULL;
+  FAR struct tmpfs_directory_s *tdo = NULL;
   FAR struct tmpfs_directory_s *next_tdo;
   FAR char *segment;
   FAR char *next_segment;
@@ -1019,24 +1024,30 @@ static int tmpfs_find_object(FAR struct tmpfs_s *fs,
 
   if (parent)
     {
-      /* Get exclusive access to the parent and increment the reference
-       * count on the object.
-       */
+      if (tdo != NULL)
+        {
+          /* Get exclusive access to the parent and increment the reference
+           * count on the object.
+           */
 
-      tmpfs_lock_directory(tdo);
-      tdo->tdo_refs++;
+          tmpfs_lock_directory(tdo);
+          tdo->tdo_refs++;
+        }
 
       *parent = tdo;
     }
 
   if (object)
     {
-      /* Get exclusive access to the object and increment the reference
-       * count on the object.
-       */
+      if (to != NULL)
+        {
+          /* Get exclusive access to the object and increment the reference
+           * count on the object.
+           */
 
-      tmpfs_lock_object(to);
-      to->to_refs++;
+          tmpfs_lock_object(to);
+          to->to_refs++;
+        }
 
       *object = to;
     }
@@ -1345,7 +1356,7 @@ static int tmpfs_open(FAR struct file *filep, FAR const char *relpath,
   off_t offset;
   int ret;
 
-  fvdbg("filep: %p\n", filep);
+  finfo("filep: %p\n", filep);
   DEBUGASSERT(filep->f_priv == NULL && filep->f_inode != NULL);
 
   /* Get the mountpoint inode reference from the file structure and the
@@ -1489,7 +1500,7 @@ static int tmpfs_close(FAR struct file *filep)
 {
   FAR struct tmpfs_file_s *tfo;
 
-  fvdbg("filep: %p\n", filep);
+  finfo("filep: %p\n", filep);
   DEBUGASSERT(filep->f_priv != NULL && filep->f_inode != NULL);
 
   /* Recover our private data from the struct file instance */
@@ -1543,7 +1554,7 @@ static ssize_t tmpfs_read(FAR struct file *filep, FAR char *buffer,
   off_t startpos;
   off_t endpos;
 
-  fvdbg("filep: %p buffer: %p buflen: %lu\n",
+  finfo("filep: %p buffer: %p buflen: %lu\n",
         filep, buffer, (unsigned long)buflen);
   DEBUGASSERT(filep->f_priv != NULL && filep->f_inode != NULL);
 
@@ -1591,7 +1602,7 @@ static ssize_t tmpfs_write(FAR struct file *filep, FAR const char *buffer,
   off_t endpos;
   int ret;
 
-  fvdbg("filep: %p buffer: %p buflen: %lu\n",
+  finfo("filep: %p buffer: %p buflen: %lu\n",
         filep, buffer, (unsigned long)buflen);
   DEBUGASSERT(filep->f_priv != NULL && filep->f_inode != NULL);
 
@@ -1646,7 +1657,7 @@ static off_t tmpfs_seek(FAR struct file *filep, off_t offset, int whence)
   FAR struct tmpfs_file_s *tfo;
   off_t position;
 
-  fvdbg("filep: %p\n", filep);
+  finfo("filep: %p\n", filep);
   DEBUGASSERT(filep->f_priv != NULL && filep->f_inode != NULL);
 
   /* Recover our private data from the struct file instance */
@@ -1706,7 +1717,7 @@ static int tmpfs_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   FAR struct tmpfs_file_s *tfo;
   FAR void **ppv = (FAR void**)arg;
 
-  fvdbg("filep: %p cmd: %d arg: %08lx\n", filep, cmd, arg);
+  finfo("filep: %p cmd: %d arg: %08lx\n", filep, cmd, arg);
   DEBUGASSERT(filep->f_priv != NULL && filep->f_inode != NULL);
 
   /* Recover our private data from the struct file instance */
@@ -1727,7 +1738,7 @@ static int tmpfs_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
       return OK;
     }
 
-  fdbg("Invalid cmd: %d\n", cmd);
+  ferr("ERROR: Invalid cmd: %d\n", cmd);
   return -ENOTTY;
 }
 
@@ -1739,7 +1750,7 @@ static int tmpfs_dup(FAR const struct file *oldp, FAR struct file *newp)
 {
   FAR struct tmpfs_file_s *tfo;
 
-  fvdbg("Dup %p->%p\n", oldp, newp);
+  finfo("Dup %p->%p\n", oldp, newp);
   DEBUGASSERT(oldp->f_priv != NULL && oldp->f_inode != NULL &&
               newp->f_priv == NULL && newp->f_inode != NULL);
 
@@ -1763,6 +1774,41 @@ static int tmpfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   return OK;
 }
 
+/****************************************************************************
+ * Name: tmpfs_fstat
+ *
+ * Description:
+ *   Obtain information about an open file associated with the file
+ *   descriptor 'fd', and will write it to the area pointed to by 'buf'.
+ *
+ ****************************************************************************/
+
+static int tmpfs_fstat(FAR const struct file *filep, FAR struct stat *buf)
+{
+  FAR struct tmpfs_file_s *tfo;
+
+  finfo("Fstat %p\n", buf);
+  DEBUGASSERT(filep != NULL && buf != NULL);
+
+  /* Recover our private data from the struct file instance */
+
+  DEBUGASSERT(filep->f_priv != NULL && filep->f_inode != NULL);
+  tfo = filep->f_priv;
+
+  /* Get exclusive access to the file */
+
+  tmpfs_lock_file(tfo);
+
+  /* Return information about the file in the stat buffer.*/
+
+  tmpfs_stat_common((FAR struct tmpfs_object_s *)tfo, buf);
+
+  /* Release the lock on the file and return success. */
+
+  tmpfs_unlock_file(tfo);
+  return OK;
+}
+
 /****************************************************************************
  * Name: tmpfs_opendir
  ****************************************************************************/
@@ -1774,7 +1820,7 @@ static int tmpfs_opendir(FAR struct inode *mountpt, FAR const char *relpath,
   FAR struct tmpfs_directory_s *tdo;
   int ret;
 
-  fvdbg("mountpt: %p relpath: %s dir: %p\n",
+  finfo("mountpt: %p relpath: %s dir: %p\n",
         mountpt, relpath, dir);
   DEBUGASSERT(mountpt != NULL && relpath != NULL && dir != NULL);
 
@@ -1820,7 +1866,7 @@ static int tmpfs_closedir(FAR struct inode *mountpt,
 {
   FAR struct tmpfs_directory_s *tdo;
 
-  fvdbg("mountpt: %p dir: %p\n",  mountpt, dir);
+  finfo("mountpt: %p dir: %p\n",  mountpt, dir);
   DEBUGASSERT(mountpt != NULL && dir != NULL);
 
   /* Get the directory structure from the dir argument */
@@ -1847,7 +1893,7 @@ static int tmpfs_readdir(FAR struct inode *mountpt,
   unsigned int index;
   int ret;
 
-  fvdbg("mountpt: %p dir: %p\n",  mountpt, dir);
+  finfo("mountpt: %p dir: %p\n",  mountpt, dir);
   DEBUGASSERT(mountpt != NULL && dir != NULL);
 
   /* Get the directory structure from the dir argument and lock it */
@@ -1866,7 +1912,7 @@ static int tmpfs_readdir(FAR struct inode *mountpt,
        * -ENOENT
        */
 
-      fvdbg("End of directory\n");
+      finfo("End of directory\n");
       ret = -ENOENT;
     }
   else
@@ -1914,7 +1960,7 @@ static int tmpfs_readdir(FAR struct inode *mountpt,
 static int tmpfs_rewinddir(FAR struct inode *mountpt,
                            FAR struct fs_dirent_s *dir)
 {
-  fvdbg("mountpt: %p dir: %p\n",  mountpt, dir);
+  finfo("mountpt: %p dir: %p\n",  mountpt, dir);
   DEBUGASSERT(mountpt != NULL && dir != NULL);
 
   /* Set the readdir index to zero */
@@ -1933,7 +1979,7 @@ static int tmpfs_bind(FAR struct inode *blkdriver, FAR const void *data,
   FAR struct tmpfs_directory_s *tdo;
   FAR struct tmpfs_s *fs;
 
-  fvdbg("blkdriver: %p data: %p handle: %p\n", blkdriver, data, handle);
+  finfo("blkdriver: %p data: %p handle: %p\n", blkdriver, data, handle);
   DEBUGASSERT(blkdriver == NULL && handle != NULL);
 
   /* Create an instance of the tmpfs file system */
@@ -1985,7 +2031,7 @@ static int tmpfs_unbind(FAR void *handle, FAR struct inode **blkdriver,
   FAR struct tmpfs_directory_s *tdo;
   int ret;
 
-  fvdbg("handle: %p blkdriver: %p flags: %02x\n",
+  finfo("handle: %p blkdriver: %p flags: %02x\n",
         handle, blkdriver, flags);
   DEBUGASSERT(fs != NULL && fs->tfs_root.tde_object != NULL);
 
@@ -2023,7 +2069,7 @@ static int tmpfs_statfs(FAR struct inode *mountpt, FAR struct statfs *buf)
   off_t blkused;
   int ret;
 
-  fvdbg("mountpt: %p buf: %p\n", mountpt, buf);
+  finfo("mountpt: %p buf: %p\n", mountpt, buf);
   DEBUGASSERT(mountpt != NULL && buf != NULL);
 
   /* Get the file system structure from the inode reference. */
@@ -2086,11 +2132,11 @@ static int tmpfs_unlink(FAR struct inode *mountpt, FAR const char *relpath)
 {
   FAR struct tmpfs_s *fs;
   FAR struct tmpfs_directory_s *tdo;
-  FAR struct tmpfs_file_s *tfo;
+  FAR struct tmpfs_file_s *tfo = NULL;
   FAR const char *name;
   int ret;
 
-  fvdbg("mountpt: %p relpath: %s\n", mountpt, relpath);
+  finfo("mountpt: %p relpath: %s\n", mountpt, relpath);
   DEBUGASSERT(mountpt != NULL && relpath != NULL);
 
   /* Get the file system structure from the inode reference. */
@@ -2113,6 +2159,8 @@ static int tmpfs_unlink(FAR struct inode *mountpt, FAR const char *relpath)
       goto errout_with_lock;
     }
 
+  DEBUGASSERT(tfo != NULL);
+
   /* Get the file name from the relative path */
 
   name = strrchr(relpath, '/');
@@ -2190,7 +2238,7 @@ static int tmpfs_mkdir(FAR struct inode *mountpt, FAR const char *relpath,
   FAR struct tmpfs_s *fs;
   int ret;
 
-  fvdbg("mountpt: %p relpath: %s mode: %04x\n", mountpt, relpath, mode);
+  finfo("mountpt: %p relpath: %s mode: %04x\n", mountpt, relpath, mode);
   DEBUGASSERT(mountpt != NULL && relpath != NULL);
 
   /* Get the file system structure from the inode reference. */
@@ -2221,7 +2269,7 @@ static int tmpfs_rmdir(FAR struct inode *mountpt, FAR const char *relpath)
   FAR const char *name;
   int ret;
 
-  fvdbg("mountpt: %p relpath: %s\n", mountpt, relpath);
+  finfo("mountpt: %p relpath: %s\n", mountpt, relpath);
   DEBUGASSERT(mountpt != NULL && relpath != NULL);
 
   /* Get the file system structure from the inode reference. */
@@ -2322,7 +2370,7 @@ static int tmpfs_rename(FAR struct inode *mountpt, FAR const char *oldrelpath,
   FAR char *copy;
   int ret;
 
-  fvdbg("mountpt: %p oldrelpath: %s newrelpath: %s\n",
+  finfo("mountpt: %p oldrelpath: %s newrelpath: %s\n",
         mountpt, oldrelpath, newrelpath);
   DEBUGASSERT(mountpt != NULL && oldrelpath != NULL && newrelpath != NULL);
 
@@ -2451,41 +2499,15 @@ errout_with_lock:
 }
 
 /****************************************************************************
- * Name: tmpfs_stat
+ * Name: tmpfs_stat_common
  ****************************************************************************/
 
-static int tmpfs_stat(FAR struct inode *mountpt, FAR const char *relpath,
-                      FAR struct stat *buf)
+static void tmpfs_stat_common(FAR struct tmpfs_object_s *to,
+                              FAR struct stat *buf)
 {
-  FAR struct tmpfs_s *fs;
-  FAR struct tmpfs_object_s *to;
   size_t objsize;
-  int ret;
-
-  fvdbg("mountpt=%p relpath=%s buf=%p\n", mountpt, relpath, buf);
-  DEBUGASSERT(mountpt != NULL && relpath != NULL && buf != NULL);
-
-  /* Get the file system structure from the inode reference. */
-
-  fs = mountpt->i_private;
-  DEBUGASSERT(fs != NULL && fs->tfs_root.tde_object != NULL);
-
-  /* Get exclusive access to the file system */
-
-  tmpfs_lock(fs);
-
-  /* Find the tmpfs object at the relpath.  If successful,
-   * tmpfs_find_object() will lock the object and increment the
-   * reference count on the object.
-   */
-
-  ret = tmpfs_find_object(fs, relpath, &to, NULL);
-  if (ret < 0)
-    {
-      goto errout_with_fslock;
-    }
 
-  /* We found it... Is the object a regular file? */
+  /* Is the tmpfs object a regular file? */
 
   memset(buf, 0, sizeof(struct stat));
 
@@ -2522,8 +2544,50 @@ static int tmpfs_stat(FAR struct inode *mountpt, FAR const char *relpath,
   buf->st_blksize = CONFIG_FS_TMPFS_BLOCKSIZE;
   buf->st_blocks  = (objsize + CONFIG_FS_TMPFS_BLOCKSIZE - 1) /
                     CONFIG_FS_TMPFS_BLOCKSIZE;
+}
+
+/****************************************************************************
+ * Name: tmpfs_stat
+ ****************************************************************************/
+
+static int tmpfs_stat(FAR struct inode *mountpt, FAR const char *relpath,
+                      FAR struct stat *buf)
+{
+  FAR struct tmpfs_s *fs;
+  FAR struct tmpfs_object_s *to;
+  int ret;
+
+  finfo("mountpt=%p relpath=%s buf=%p\n", mountpt, relpath, buf);
+  DEBUGASSERT(mountpt != NULL && relpath != NULL && buf != NULL);
+
+  /* Get the file system structure from the inode reference. */
+
+  fs = mountpt->i_private;
+  DEBUGASSERT(fs != NULL && fs->tfs_root.tde_object != NULL);
+
+  /* Get exclusive access to the file system */
+
+  tmpfs_lock(fs);
+
+  /* Find the tmpfs object at the relpath.  If successful,
+   * tmpfs_find_object() will lock the object and increment the
+   * reference count on the object.
+   */
+
+  ret = tmpfs_find_object(fs, relpath, &to, NULL);
+  if (ret < 0)
+    {
+      goto errout_with_fslock;
+    }
+
+  /* We found it... Return information about the file object in the stat
+   * buffer.
+   */
+
+  DEBUGASSERT(to != NULL);
+  tmpfs_stat_common(to, buf);
 
-  /* No... unlock the object and return success */
+  /* Unlock the object and return success */
 
   tmpfs_release_lockedobject(to);
   ret = OK;
diff --git a/fs/unionfs/fs_unionfs.c b/fs/unionfs/fs_unionfs.c
index b0a0920e8371d4fa2fdab20cacc120d9054ecaa0..bb3b6abcfb502efe506ff1475e39b5e44963fe0e 100644
--- a/fs/unionfs/fs_unionfs.c
+++ b/fs/unionfs/fs_unionfs.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/unionfs/fs_unionfs.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -160,6 +160,8 @@ static int     unionfs_ioctl(FAR struct file *filep, int cmd,
 static int     unionfs_sync(FAR struct file *filep);
 static int     unionfs_dup(FAR const struct file *oldp,
                  FAR struct file *newp);
+static int     unionfs_fstat(FAR const struct file *filep,
+                 FAR struct stat *buf);
 
 /* Operations on directories */
 
@@ -215,6 +217,7 @@ static const struct mountpt_operations g_unionfs_mops =
 
   unionfs_sync,        /* sync */
   unionfs_dup,         /* dup */
+  unionfs_fstat,       /* fstat */
 
   unionfs_opendir,     /* opendir */
   unionfs_closedir,    /* closedir */
@@ -489,7 +492,7 @@ static int unionfs_trymkdir(FAR struct inode *inode, FAR const char *relpath,
 }
 
 /****************************************************************************
- * Name: unionfs_trystat
+ * Name: unionfs_tryrename
  ****************************************************************************/
 
 static int unionfs_tryrename(FAR struct inode *mountpt,
@@ -843,7 +846,7 @@ static int unionfs_open(FAR struct file *filep, FAR const char *relpath,
   DEBUGASSERT(filep != NULL && filep->f_inode != NULL);
   ui = (FAR struct unionfs_inode_s *)filep->f_inode->i_private;
 
-  fvdbg("Opening: ui_nopen=%d\n", ui->ui_nopen);
+  finfo("Opening: ui_nopen=%d\n", ui->ui_nopen);
 
   /* Get exclusive access to the file system data structures */
 
@@ -946,7 +949,7 @@ static int unionfs_close(FAR struct file *filep)
   DEBUGASSERT(um != NULL && um->um_node != NULL && um->um_node->u.i_mops != NULL);
   ops = um->um_node->u.i_mops;
 
-  fvdbg("Closing: ui_nopen=%d\n", ui->ui_nopen);
+  finfo("Closing: ui_nopen=%d\n", ui->ui_nopen);
 
   /* Perform the lower level close operation */
 
@@ -986,7 +989,7 @@ static ssize_t unionfs_read(FAR struct file *filep, FAR char *buffer,
   FAR const struct mountpt_operations *ops;
   int ret = -EPERM;
 
-  fvdbg("buflen: %lu\n", (unsigned long)buflen);
+  finfo("buflen: %lu\n", (unsigned long)buflen);
 
   /* Recover the open file data from the struct file instance */
 
@@ -1034,7 +1037,7 @@ static ssize_t unionfs_write(FAR struct file *filep, FAR const char *buffer,
   FAR const struct mountpt_operations *ops;
   int ret = -EPERM;
 
-  fvdbg("buflen: %lu\n", (unsigned long)buflen);
+  finfo("buflen: %lu\n", (unsigned long)buflen);
 
   /* Recover the open file data from the struct file instance */
 
@@ -1081,7 +1084,7 @@ static off_t unionfs_seek(FAR struct file *filep, off_t offset, int whence)
   FAR const struct mountpt_operations *ops;
   int ret;
 
-  fvdbg("offset: %lu whence: %d\n", (unsigned long)offset, whence);
+  finfo("offset: %lu whence: %d\n", (unsigned long)offset, whence);
 
   /* Recover the open file data from the struct file instance */
 
@@ -1157,7 +1160,7 @@ static int unionfs_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
   FAR const struct mountpt_operations *ops;
   int ret = -ENOTTY;
 
-  fvdbg("cmd: %d arg: %lu\n", cmd, arg);
+  finfo("cmd: %d arg: %lu\n", cmd, arg);
 
   /* Recover the open file data from the struct file instance */
 
@@ -1204,7 +1207,7 @@ static int unionfs_sync(FAR struct file *filep)
   FAR const struct mountpt_operations *ops;
   int ret = -EINVAL;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* Recover the open file data from the struct file instance */
 
@@ -1252,7 +1255,7 @@ static int unionfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   FAR const struct mountpt_operations *ops;
   int ret = -ENOMEM;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* Recover the open file data from the struct file instance */
 
@@ -1309,6 +1312,58 @@ static int unionfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   return ret;
 }
 
+/****************************************************************************
+ * Name: unionfs_fstat
+ *
+ * Description:
+ *   Obtain information about an open file associated with the file
+ *   descriptor 'fd', and will write it to the area pointed to by 'buf'.
+ *
+ ****************************************************************************/
+
+static int unionfs_fstat(FAR const struct file *filep, FAR struct stat *buf)
+{
+  FAR struct unionfs_inode_s *ui;
+  FAR struct unionfs_file_s *uf;
+  FAR struct unionfs_mountpt_s *um;
+  FAR const struct mountpt_operations *ops;
+  int ret = -EPERM;
+
+  finfo("Entry\n");
+
+  /* Recover the open file data from the struct file instance */
+
+  DEBUGASSERT(filep != NULL && filep->f_inode != NULL);
+  ui = (FAR struct unionfs_inode_s *)filep->f_inode->i_private;
+
+  /* Get exclusive access to the file system data structures */
+
+  ret = unionfs_semtake(ui, false);
+  if (ret < 0)
+    {
+      return ret;
+    }
+
+  DEBUGASSERT(ui != NULL && filep->f_priv != NULL);
+  uf = (FAR struct unionfs_file_s *)filep->f_priv;
+
+  DEBUGASSERT(uf->uf_ndx == 0 || uf->uf_ndx == 1);
+  um = &ui->ui_fs[uf->uf_ndx];
+
+  DEBUGASSERT(um != NULL && um->um_node != NULL && um->um_node->u.i_mops != NULL);
+  ops = um->um_node->u.i_mops;
+
+  /* Perform the lower level write operation */
+
+  if (ops->fstat)
+    {
+      ret = ops->fstat(&uf->uf_file, buf);
+    }
+
+  unionfs_semgive(ui);
+  return ret;
+}
+
 /****************************************************************************
  * Name: unionfs_opendir
  ****************************************************************************/
@@ -1323,7 +1378,7 @@ static int unionfs_opendir(FAR struct inode *mountpt, FAR const char *relpath,
   FAR struct fs_dirent_s *lowerdir;
   int ret;
 
-  fvdbg("relpath: \"%s\"\n", relpath ? relpath : "NULL");
+  finfo("relpath: \"%s\"\n", relpath ? relpath : "NULL");
 
   /* Recover the filesystem data from the struct inode instance */
 
@@ -1486,7 +1541,7 @@ static int unionfs_closedir(FAR struct inode *mountpt,
   int ret = OK;
   int i;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* Recover the union file system data from the struct inode instance */
 
@@ -1638,7 +1693,7 @@ static int unionfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir)
   DEBUGASSERT(um->um_node != NULL && um->um_node->u.i_mops != NULL);
   ops = um->um_node->u.i_mops;
 
-  fvdbg("fu_ndx: %d\n", fu->fu_ndx);
+  finfo("fu_ndx: %d\n", fu->fu_ndx);
 
   /* Perform the lower level readdir operation */
 
@@ -1819,7 +1874,7 @@ static int unionfs_rewinddir(struct inode *mountpt, struct fs_dirent_s *dir)
   FAR struct fs_unionfsdir_s *fu;
   int ret;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* Recover the union file system data from the struct inode instance */
 
@@ -1883,7 +1938,7 @@ static int unionfs_unbind(FAR void *handle, FAR struct inode **blkdriver,
 {
   FAR struct unionfs_inode_s *ui;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* Recover the union file system data from the struct inode instance */
 
@@ -1929,7 +1984,7 @@ static int unionfs_statfs(FAR struct inode *mountpt, FAR struct statfs *buf)
   uint32_t ratiob16;
   int ret;
 
-  fvdbg("Entry\n");
+  finfo("Entry\n");
 
   /* Recover the union file system data from the struct inode instance */
 
@@ -2065,7 +2120,7 @@ static int unionfs_unlink(FAR struct inode *mountpt,
   struct stat buf;
   int ret;
 
-  fvdbg("relpath: %s\n", relpath);
+  finfo("relpath: %s\n", relpath);
 
   /* Recover the union file system data from the struct inode instance */
 
@@ -2137,7 +2192,7 @@ static int unionfs_mkdir(FAR struct inode *mountpt, FAR const char *relpath,
   int ret2;
   int ret;
 
-  fvdbg("relpath: %s\n", relpath);
+  finfo("relpath: %s\n", relpath);
 
   /* Recover the union file system data from the struct inode instance */
 
@@ -2210,7 +2265,7 @@ static int unionfs_rmdir(FAR struct inode *mountpt, FAR const char *relpath)
   int tmp;
   int ret;
 
-  fvdbg("relpath: %s\n", relpath);
+  finfo("relpath: %s\n", relpath);
 
   /* Recover the union file system data from the struct inode instance */
 
@@ -2285,7 +2340,7 @@ static int unionfs_rename(FAR struct inode *mountpt,
   int tmp;
   int ret = -ENOENT;
 
-  fvdbg("oldrelpath: %s newrelpath\n", oldrelpath, newrelpath);
+  finfo("oldrelpath: %s newrelpath\n", oldrelpath, newrelpath);
 
   /* Recover the union file system data from the struct inode instance */
 
@@ -2359,7 +2414,7 @@ static int unionfs_stat(FAR struct inode *mountpt, FAR const char *relpath,
   FAR struct unionfs_mountpt_s *um;
   int ret;
 
-  fvdbg("relpath: %s\n", relpath);
+  finfo("relpath: %s\n", relpath);
 
   /* Recover the union file system data from the struct inode instance */
 
@@ -2442,31 +2497,53 @@ static int unionfs_stat(FAR struct inode *mountpt, FAR const char *relpath,
 static int unionfs_getmount(FAR const char *path, FAR struct inode **inode)
 {
   FAR struct inode *minode;
+  struct inode_search_s desc;
+  int ret;
 
   /* Find the mountpt */
 
-  minode = inode_find(path, NULL);
-  if (!minode)
+  SETUP_SEARCH(&desc, path, false);
+
+  ret = inode_find(&desc);
+  if (ret < 0)
     {
       /* Mountpoint inode not found */
 
-      return -ENOENT;
+      goto errout_with_search;
     }
 
-  /* Verify that the inode is a mountpoint */
+  /* Get the search results */
+
+  minode = desc.node;
+  DEBUGASSERT(minode != NULL);
+
+  /* Verify that the inode is a mountpoint.
+   *
+   * REVISIT: If desc.relpath points to a non-empty string, then the path
+   * does not really refer to a mountpoint but, rather, to a some entity
+   * within the mounted volume.
+   */
 
   if (!INODE_IS_MOUNTPT(minode))
     {
-      /* Inode was found, but is it is a mounpoint */
+      /* Inode was found, but is it is not a mounpoint */
 
-      inode_release(minode);
-      return -EINVAL;
+      ret = -EINVAL;
+      goto errout_with_inode;
     }
 
   /* Success! */
 
   *inode = minode;
+  RELEASE_SEARCH(&desc);
   return OK;
+
+errout_with_inode:
+  inode_release(minode);
+
+errout_with_search:
+  RELEASE_SEARCH(&desc);
+  return ret;
 }
 
 /****************************************************************************
@@ -2512,7 +2589,7 @@ int unionfs_mount(FAR const char *fspath1, FAR const char *prefix1,
   ui = (FAR struct unionfs_inode_s *)kmm_zalloc(sizeof(struct unionfs_inode_s));
   if (!ui)
     {
-      fdbg("ERROR: Failed to allocated union FS state structure\n");
+      ferr("ERROR: Failed to allocated union FS state structure\n");
       return -ENOMEM;
     }
 
@@ -2523,14 +2600,14 @@ int unionfs_mount(FAR const char *fspath1, FAR const char *prefix1,
   ret = unionfs_getmount(fspath1, &ui->ui_fs[0].um_node);
   if (ret < 0)
     {
-      fdbg("ERROR: unionfs_getmount(fspath1) failed: %d\n", ret);
+      ferr("ERROR: unionfs_getmount(fspath1) failed: %d\n", ret);
       goto errout_with_uinode;
     }
 
   ret = unionfs_getmount(fspath2, &ui->ui_fs[1].um_node);
   if (ret < 0)
     {
-      fdbg("ERROR: unionfs_getmount(fspath2) failed: %d\n", ret);
+      ferr("ERROR: unionfs_getmount(fspath2) failed: %d\n", ret);
       goto errout_with_fs1;
     }
 
@@ -2541,7 +2618,7 @@ int unionfs_mount(FAR const char *fspath1, FAR const char *prefix1,
       ui->ui_fs[0].um_prefix = strdup(prefix1);
       if (ui->ui_fs[0].um_prefix == NULL)
         {
-          fdbg("ERROR: strdup(prefix1) failed\n");
+          ferr("ERROR: strdup(prefix1) failed\n");
           ret = -ENOMEM;
           goto errout_with_fs2;
         }
@@ -2552,7 +2629,7 @@ int unionfs_mount(FAR const char *fspath1, FAR const char *prefix1,
       ui->ui_fs[1].um_prefix = strdup(prefix2);
       if (ui->ui_fs[1].um_prefix == NULL)
         {
-          fdbg("ERROR: strdup(prefix2) failed\n");
+          ferr("ERROR: strdup(prefix2) failed\n");
           ret = -ENOMEM;
           goto errout_with_prefix1;
         }
@@ -2580,7 +2657,7 @@ int unionfs_mount(FAR const char *fspath1, FAR const char *prefix1,
        *  -ENOMEM - Failed to allocate in-memory resources for the operation
        */
 
-      fdbg("ERROR: Failed to reserve inode\n");
+      ferr("ERROR: Failed to reserve inode\n");
       goto errout_with_semaphore;
     }
 
diff --git a/fs/vfs/Make.defs b/fs/vfs/Make.defs
index 645e23f97e4c33632decaec96777ff6d6beeba92..d80dca771d2f49047376c4cdbca438b5d6e3c162 100644
--- a/fs/vfs/Make.defs
+++ b/fs/vfs/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # fs/vfs/Make.defs
 #
-#   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2014-2015, 2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -72,9 +72,9 @@ else
 # Common file/socket descriptor support
 
 CSRCS += fs_close.c fs_dup.c fs_dup2.c fs_fcntl.c fs_dupfd.c fs_dupfd2.c
-CSRCS += fs_epoll.c fs_getfilep.c fs_ioctl.c fs_lseek.c fs_mkdir.c fs_open.c
-CSRCS += fs_poll.c  fs_read.c fs_rename.c fs_rmdir.c fs_stat.c fs_statfs.c
-CSRCS += fs_select.c fs_unlink.c fs_write.c
+CSRCS += fs_epoll.c fs_fstat.c fs_fstatfs.c fs_getfilep.c fs_ioctl.c
+CSRCS += fs_lseek.c fs_mkdir.c fs_open.c fs_poll.c  fs_read.c fs_rename.c
+CSRCS += fs_rmdir.c fs_statfs.c fs_stat.c fs_select.c fs_unlink.c fs_write.c
 
 # Certain interfaces are not available if there is no mountpoint support
 
@@ -86,6 +86,10 @@ endif
 
 CSRCS += fs_pread.c fs_pwrite.c
 
+ifneq ($(CONFIG_PSEUDOFS_SOFTLINKS),0)
+CSRCS += fs_link.c fs_readlink.c
+endif
+
 # Stream support
 
 ifneq ($(CONFIG_NFILE_STREAMS),0)
diff --git a/fs/vfs/fs_close.c b/fs/vfs/fs_close.c
index 3a52d0c086fa3f65877ec82d0a166e8b8a7f0ac4..6020af573178a8a8a7a50057e146aea4958a0a64 100644
--- a/fs/vfs/fs_close.c
+++ b/fs/vfs/fs_close.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/vfs/fs_close.c
  *
- *   Copyright (C) 2007-2009, 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,6 +42,8 @@
 #include 
 #include 
 #include 
+
+#include 
 #include 
 
 #if defined(CONFIG_NET) && CONFIG_NSOCKET_DESCRIPTORS > 0
@@ -79,10 +81,16 @@
 
 int close(int fd)
 {
-  int err;
+  int errcode;
 #if CONFIG_NFILE_DESCRIPTORS > 0
   int ret;
+#endif
+
+  /* close() is a cancellation point */
 
+  (void)enter_cancellation_point();
+
+#if CONFIG_NFILE_DESCRIPTORS > 0
   /* Did we get a valid file descriptor? */
 
   if ((unsigned int)fd >= CONFIG_NFILE_DESCRIPTORS)
@@ -93,12 +101,14 @@ int close(int fd)
 #if defined(CONFIG_NET) && CONFIG_NSOCKET_DESCRIPTORS > 0
       if ((unsigned int)fd < (CONFIG_NFILE_DESCRIPTORS+CONFIG_NSOCKET_DESCRIPTORS))
         {
-          return net_close(fd);
+          ret = net_close(fd);
+          leave_cancellation_point();
+          return ret;
         }
       else
 #endif
         {
-          err = EBADF;
+          errcode = EBADF;
           goto errout;
         }
     }
@@ -119,16 +129,17 @@ int close(int fd)
     {
       /* An error occurred while closing the driver */
 
-      err = -ret;
+      errcode = -ret;
       goto errout;
     }
 
+  leave_cancellation_point();
   return OK;
 
 #endif
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
+  leave_cancellation_point();
   return ERROR;
 }
-
diff --git a/fs/vfs/fs_epoll.c b/fs/vfs/fs_epoll.c
index 8cd6e227ac2443a56e95fe7388d185a7ae26de2b..6678ae10f216f6cc6d884192ab7e87029b56bfdd 100644
--- a/fs/vfs/fs_epoll.c
+++ b/fs/vfs/fs_epoll.c
@@ -44,10 +44,11 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 
+#include 
+
 #ifndef CONFIG_DISABLE_POLL
 
 /****************************************************************************
@@ -68,13 +69,17 @@
 int epoll_create(int size)
 {
   FAR struct epoll_head *eph =
-    (FAR struct epoll_head *)malloc(sizeof(struct epoll_head));
+    (FAR struct epoll_head *)kmm_malloc(sizeof(struct epoll_head));
 
   eph->size = size;
   eph->occupied = 0;
-  eph->evs = malloc(sizeof(struct epoll_event) * eph->size);
+  eph->evs = kmm_malloc(sizeof(struct epoll_event) * eph->size);
+
+  /* REVISIT: This will not work on machines where:
+   * sizeof(struct epoll_head *) > sizeof(int)
+   */
 
-  return (int)eph;
+  return (int)((intptr_t)eph);
 }
 
 /****************************************************************************
@@ -90,10 +95,14 @@ int epoll_create(int size)
 
 void epoll_close(int epfd)
 {
-  struct epoll_head *eph = (struct epoll_head *)epfd;
+  /* REVISIT: This will not work on machines where:
+   * sizeof(struct epoll_head *) > sizeof(int)
+   */
 
-  free(eph->evs);
-  free(eph);
+  FAR struct epoll_head *eph = (FAR struct epoll_head *)((intptr_t)epfd);
+
+  kmm_free(eph->evs);
+  kmm_free(eph);
 }
 
 /****************************************************************************
@@ -109,12 +118,16 @@ void epoll_close(int epfd)
 
 int epoll_ctl(int epfd, int op, int fd, struct epoll_event *ev)
 {
-  FAR struct epoll_head *eph = (FAR struct epoll_head *)epfd;
+  /* REVISIT: This will not work on machines where:
+   * sizeof(struct epoll_head *) > sizeof(int)
+   */
+
+  FAR struct epoll_head *eph = (FAR struct epoll_head *)((intptr_t)epfd);
 
   switch (op)
     {
       case EPOLL_CTL_ADD:
-        fvdbg("%08x CTL ADD(%d): fd=%d ev=%08x\n",
+        finfo("%08x CTL ADD(%d): fd=%d ev=%08x\n",
               epfd, eph->occupied, fd, ev->events);
 
         eph->evs[eph->occupied].events = ev->events | POLLERR | POLLHUP;
@@ -147,7 +160,7 @@ int epoll_ctl(int epfd, int op, int fd, struct epoll_event *ev)
         {
           int i;
 
-          fvdbg("%08x CTL MOD(%d): fd=%d ev=%08x\n",
+          finfo("%08x CTL MOD(%d): fd=%d ev=%08x\n",
                 epfd, eph->occupied, fd, ev->events);
 
           for (i = 0; i < eph->occupied; i++)
@@ -180,9 +193,13 @@ int epoll_ctl(int epfd, int op, int fd, struct epoll_event *ev)
 int epoll_wait(int epfd, FAR struct epoll_event *evs, int maxevents,
                int timeout)
 {
-  int i;
+  /* REVISIT: This will not work on machines where:
+   * sizeof(struct epoll_head *) > sizeof(int)
+   */
+
+  FAR struct epoll_head *eph = (FAR struct epoll_head *)((intptr_t)epfd);
   int rc;
-  FAR struct epoll_head *eph = (FAR struct epoll_head *)epfd;
+  int i;
 
   rc = poll((FAR struct pollfd *)eph->evs, eph->occupied, timeout);
 
@@ -190,12 +207,12 @@ int epoll_wait(int epfd, FAR struct epoll_event *evs, int maxevents,
     {
       if (rc < 0)
         {
-          fdbg("%08x poll fail: %d for %d, %d msecs\n",
+          ferr("ERROR: %08x poll fail: %d for %d, %d msecs\n",
                epfd, rc, eph->occupied, timeout);
 
           for (i = 0; i < eph->occupied; i++)
             {
-              fdbg("%02d: fd=%d\n", i, eph->evs[i].data.fd);
+              ferr("  %02d: fd=%d\n", i, eph->evs[i].data.fd);
             }
         }
 
diff --git a/fs/vfs/fs_fcntl.c b/fs/vfs/fs_fcntl.c
index f4d67ae457f1fa0817dcdda74ffc9d7928d66c9a..4d8e74b497ea6b7a18e114c16798350eec56a511 100644
--- a/fs/vfs/fs_fcntl.c
+++ b/fs/vfs/fs_fcntl.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/vfs/fs_fcntl.c
  *
- *   Copyright (C) 2009, 2012-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2012-2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -44,20 +44,13 @@
 #include 
 #include 
 
+#include 
+#include 
 #include 
 #include 
-#include 
 
 #include "inode/inode.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -75,14 +68,14 @@
 #if CONFIG_NFILE_DESCRIPTORS > 0
 int file_vfcntl(FAR struct file *filep, int cmd, va_list ap)
 {
-  int err = 0;
+  int errcode = 0;
   int ret = OK;
 
   /* Was this file opened ? */
 
   if (!filep->f_inode)
     {
-      err = EBADF;
+      errcode = EBADF;
       goto errout;
     }
 
@@ -119,7 +112,7 @@ int file_vfcntl(FAR struct file *filep, int cmd, va_list ap)
          * successful execution of one  of  the  exec  functions.
          */
 
-        err = ENOSYS;
+        errcode = ENOSYS;
         break;
 
       case F_GETFL:
@@ -169,7 +162,7 @@ int file_vfcntl(FAR struct file *filep, int cmd, va_list ap)
          * fd does not refer to a socket, the results are unspecified.
          */
 
-        err = EBADF; /* Only valid on socket descriptors */
+        errcode = EBADF; /* Only valid on socket descriptors */
         break;
 
       case F_GETLK:
@@ -199,18 +192,18 @@ int file_vfcntl(FAR struct file *filep, int cmd, va_list ap)
          * not be done.
          */
 
-        err = ENOSYS; /* Not implemented */
+        errcode = ENOSYS; /* Not implemented */
         break;
 
       default:
-        err = EINVAL;
+        errcode = EINVAL;
         break;
     }
 
 errout:
-  if (err != 0)
+  if (errcode != 0)
     {
-      set_errno(err);
+      set_errno(errcode);
       return ERROR;
     }
 
@@ -228,6 +221,10 @@ int fcntl(int fd, int cmd, ...)
   va_list ap;
   int ret;
 
+  /* fcntl() is a cancellation point */
+
+  (void)enter_cancellation_point();
+
   /* Setup to access the variable argument list */
 
   va_start(ap, cmd);
@@ -244,6 +241,8 @@ int fcntl(int fd, int cmd, ...)
         {
           /* The errno value has already been set */
 
+          va_end(ap);
+          leave_cancellation_point();
           return ERROR;
         }
 
@@ -273,5 +272,6 @@ int fcntl(int fd, int cmd, ...)
     }
 
   va_end(ap);
+  leave_cancellation_point();
   return ret;
 }
diff --git a/fs/vfs/fs_fdopen.c b/fs/vfs/fs_fdopen.c
index 882337da11dfb877730ef56b80cb8c2bd7cd4f5e..43e00f184af86d01cf70037922d2c0df8dcb25d7 100644
--- a/fs/vfs/fs_fdopen.c
+++ b/fs/vfs/fs_fdopen.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/vfs/fs_fdopen.c
  *
- *   Copyright (C) 2007-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -129,7 +129,7 @@ FAR struct file_struct *fs_fdopen(int fd, int oflags, FAR struct tcb_s *tcb)
 {
   FAR struct streamlist *slist;
   FAR FILE              *stream;
-  int                    err = OK;
+  int                    errcode = OK;
   int                    ret;
   int                    i;
 
@@ -137,7 +137,7 @@ FAR struct file_struct *fs_fdopen(int fd, int oflags, FAR struct tcb_s *tcb)
 
   if (fd < 0)
     {
-      err = EBADF;
+      errcode = EBADF;
       goto errout;
     }
 
@@ -173,7 +173,7 @@ FAR struct file_struct *fs_fdopen(int fd, int oflags, FAR struct tcb_s *tcb)
 #else
       /* No networking... it is just a bad descriptor */
 
-      err = EBADF;
+      errcode = EBADF;
       goto errout;
 #endif
     }
@@ -193,7 +193,7 @@ FAR struct file_struct *fs_fdopen(int fd, int oflags, FAR struct tcb_s *tcb)
     {
       /* No... return the reported error */
 
-      err = -ret;
+      errcode = -ret;
       goto errout;
     }
 
@@ -221,17 +221,18 @@ FAR struct file_struct *fs_fdopen(int fd, int oflags, FAR struct tcb_s *tcb)
         {
           /* Zero the structure */
 
-#if CONFIG_STDIO_BUFFER_SIZE > 0
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
           memset(stream, 0, sizeof(FILE));
 #elif CONFIG_NUNGET_CHARS > 0
           stream->fs_nungotten = 0;
 #endif
 
-#if CONFIG_STDIO_BUFFER_SIZE > 0
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
           /* Initialize the semaphore the manages access to the buffer */
 
           (void)sem_init(&stream->fs_sem, 0, 1);
 
+#if CONFIG_STDIO_BUFFER_SIZE > 0
           /* Allocate the IO buffer at the appropriate privilege level for
            * the group.
            */
@@ -241,7 +242,7 @@ FAR struct file_struct *fs_fdopen(int fd, int oflags, FAR struct tcb_s *tcb)
 
           if (!stream->fs_bufstart)
             {
-              err = ENOMEM;
+              errcode = ENOMEM;
               goto errout_with_sem;
             }
 
@@ -249,9 +250,17 @@ FAR struct file_struct *fs_fdopen(int fd, int oflags, FAR struct tcb_s *tcb)
 
           stream->fs_bufend  = &stream->fs_bufstart[CONFIG_STDIO_BUFFER_SIZE];
           stream->fs_bufpos  = stream->fs_bufstart;
-          stream->fs_bufpos  = stream->fs_bufstart;
           stream->fs_bufread = stream->fs_bufstart;
-#endif
+
+#ifdef CONFIG_STDIO_LINEBUFFER
+          /* Setup buffer flags */
+
+          stream->fs_flags  |= __FS_FLAG_LBF; /* Line buffering */
+
+#endif /* CONFIG_STDIO_LINEBUFFER */
+#endif /* CONFIG_STDIO_BUFFER_SIZE > 0 */
+#endif /* !CONFIG_STDIO_DISABLE_BUFFERING */
+
           /* Save the file description and open flags.  Setting the
            * file descriptor locks this stream.
            */
@@ -266,15 +275,15 @@ FAR struct file_struct *fs_fdopen(int fd, int oflags, FAR struct tcb_s *tcb)
 
   /* No free stream available.. report ENFILE */
 
-  err = ENFILE;
+  errcode = ENFILE;
 
-#if CONFIG_STDIO_BUFFER_SIZE > 0
+#if !defined(CONFIG_STDIO_DISABLE_BUFFERING) && CONFIG_STDIO_BUFFER_SIZE > 0
 errout_with_sem:
 #endif
   sem_post(&slist->sl_sem);
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
 errout_with_errno:
   return NULL;
 }
diff --git a/fs/vfs/fs_fstat.c b/fs/vfs/fs_fstat.c
new file mode 100644
index 0000000000000000000000000000000000000000..1cf97f4ebb811a6c1e4b39937ecc53bf20d69507
--- /dev/null
+++ b/fs/vfs/fs_fstat.c
@@ -0,0 +1,147 @@
+/****************************************************************************
+ * fs/vfs/fs_fstat.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include "inode/inode.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: fstat
+ *
+ * Description:
+ *   The fstat() function will obtain information about an open file
+ *   associated with the file descriptor 'fd', and will write it to the area
+ *   pointed to by 'buf'.
+ *
+ *   The 'buf' argument is a pointer to a stat structure, as defined in
+ *   , into which information is placed concerning the file.
+ *
+ * Input Parameters:
+ *   fd  - The file descriptor associated with the open file of interest
+ *   buf - The caller provide location in which to return information about
+ *         the open file.
+ *
+ * Returned Value:
+ *   Upon successful completion, 0 shall be returned. Otherwise, -1 shall be
+ *   returned and errno set to indicate the error.
+ *
+ ****************************************************************************/
+
+int fstat(int fd, FAR struct stat *buf)
+{
+  FAR struct file *filep;
+  FAR struct inode *inode;
+  int ret;
+
+  /* Did we get a valid file descriptor? */
+
+  if ((unsigned int)fd >= CONFIG_NFILE_DESCRIPTORS)
+    {
+      /* No networking... it is a bad descriptor in any event */
+
+      set_errno(EBADF);
+      return ERROR;
+    }
+
+  /* The descriptor is in a valid range to file descriptor... do the
+   * read.  First, get the file structure.  Note that on failure,
+   * fs_getfilep() will set the errno variable.
+   */
+
+  filep = fs_getfilep(fd);
+  if (filep == NULL)
+    {
+      /* The errno value has already been set */
+
+      return ERROR;
+    }
+
+  /* Get the inode from the file structure */
+
+  inode = filep->f_inode;
+  DEBUGASSERT(inode != NULL);
+
+  /* The way we handle the stat depends on the type of inode that we
+   * are dealing with.
+   */
+
+#ifndef CONFIG_DISABLE_MOUNTPOINT
+  if (INODE_IS_MOUNTPT(inode))
+    {
+      /* The inode is a file system mointpoint. Verify that the mountpoint
+       * supports the fstat() method
+       */
+
+      ret = -ENOSYS;
+      if (inode->u.i_mops && inode->u.i_mops->fstat)
+        {
+          /* Perform the fstat() operation */
+
+          ret = inode->u.i_mops->fstat(filep, buf);
+        }
+    }
+  else
+#endif
+    {
+      /* The inode is part of the root pseudo file system. */
+
+      ret = inode_stat(inode, buf);
+    }
+
+  /* Check if the fstat operation was successful */
+
+  if (ret < 0)
+    {
+      set_errno(-ret);
+      return ERROR;
+    }
+
+  /* Successfully fstat'ed the file */
+
+  return OK;
+}
diff --git a/fs/vfs/fs_fstatfs.c b/fs/vfs/fs_fstatfs.c
new file mode 100644
index 0000000000000000000000000000000000000000..207311ea470443f32ca5b4f324e2311c5942de43
--- /dev/null
+++ b/fs/vfs/fs_fstatfs.c
@@ -0,0 +1,156 @@
+/****************************************************************************
+ * fs/vfs/fs_fstatfs.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "inode/inode.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: fstatfs
+ *
+ * Return: Zero on success; -1 on failure with errno set:
+ *
+ *   EACCES  Search permission is denied for one of the directories in the
+ *           path prefix of path.
+ *   EFAULT  Bad address.
+ *   ENOENT  A component of the path path does not exist, or the path is an
+ *           empty string.
+ *   ENOMEM  Out of memory
+ *   ENOTDIR A component of the path is not a directory.
+ *   ENOSYS  The file system does not support this call.
+ *
+ ****************************************************************************/
+
+int fstatfs(int fd, FAR struct statfs *buf)
+{
+  FAR struct file *filep;
+  FAR struct inode *inode;
+  int ret;
+
+  DEBUGASSERT(buf != NULL);
+
+  /* Did we get a valid file descriptor? */
+
+  if ((unsigned int)fd >= CONFIG_NFILE_DESCRIPTORS)
+    {
+      /* It is a bad, out-of-range descriptor */
+
+      set_errno(EBADF);
+      return ERROR;
+    }
+
+  /* The descriptor is in a valid range to file descriptor... do the
+   * read.  First, get the file structure.  Note that on failure,
+   * fs_getfilep() will set the errno variable.
+   */
+
+  filep = fs_getfilep(fd);
+  if (filep == NULL)
+    {
+      /* The errno value has already been set */
+
+      return ERROR;
+    }
+
+  /* Get the inode from the file structure */
+
+  inode = filep->f_inode;
+  DEBUGASSERT(inode != NULL);
+
+  /* Check if the file is open */
+
+  if (inode == NULL)
+    {
+      /* The descriptor does not refer to an open file. */
+
+      ret = -EBADF;
+    }
+  else
+#ifndef CONFIG_DISABLE_MOUNTPOINT
+  /* The way we handle the stat depends on the type of inode that we
+   * are dealing with.
+   */
+
+  if (INODE_IS_MOUNTPT(inode))
+    {
+      /* The node is a file system mointpoint. Verify that the mountpoint
+       * supports the statfs() method
+       */
+
+      ret = -ENOSYS;
+      if (inode->u.i_mops && inode->u.i_mops->statfs)
+        {
+          /* Perform the statfs() operation */
+
+          ret = inode->u.i_mops->statfs(inode, buf);
+        }
+    }
+  else
+#endif
+    {
+      /* The node is part of the root pseudo file system */
+
+      memset(buf, 0, sizeof(struct statfs));
+      buf->f_type    = PROC_SUPER_MAGIC;
+      buf->f_namelen = NAME_MAX;
+      ret            = OK;
+    }
+
+  /* Check if the fstat operation was successful */
+
+  if (ret < 0)
+    {
+      set_errno(-ret);
+      return ERROR;
+    }
+
+  /* Successfully statfs'ed the file */
+
+  return OK;
+}
diff --git a/fs/vfs/fs_fsync.c b/fs/vfs/fs_fsync.c
index a2d58825eb4abefb8244c8e56069d0fb2008d44f..60c5563497180ee2fd39bd1bbc07bc4d2db4872e 100644
--- a/fs/vfs/fs_fsync.c
+++ b/fs/vfs/fs_fsync.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/vfs/fs_fsync.c
  *
- *   Copyright (C) 2007-2009, 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2013-2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -44,8 +44,9 @@
 #include 
 #include 
 
-#include 
 #include 
+#include 
+#include 
 
 #include "inode/inode.h"
 
@@ -117,6 +118,11 @@ errout:
 int fsync(int fd)
 {
   FAR struct file *filep;
+  int ret;
+
+  /* fsync() is a cancellation point */
+
+  (void)enter_cancellation_point();
 
   /* Get the file structure corresponding to the file descriptor. */
 
@@ -125,12 +131,15 @@ int fsync(int fd)
     {
       /* The errno value has already been set */
 
+      leave_cancellation_point();
       return ERROR;
     }
 
   /* Perform the fsync operation */
 
-  return file_fsync(filep);
+  ret = file_fsync(filep);
+  leave_cancellation_point();
+  return ret;
 }
 
 #endif /* !CONFIG_DISABLE_MOUNTPOINT */
diff --git a/fs/vfs/fs_ioctl.c b/fs/vfs/fs_ioctl.c
index 593eae963a33cd6e8894a356a95f0ad06f666d46..487643fb1623b7af476a6ca2ca0731d7f7c8bef6 100644
--- a/fs/vfs/fs_ioctl.c
+++ b/fs/vfs/fs_ioctl.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/vfs/fs_ioctl.c
  *
- *   Copyright (C) 2007-2010, 2012-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2010, 2012-2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -56,6 +56,65 @@
  * Public Functions
  ****************************************************************************/
 
+/****************************************************************************
+ * Name: file_ioctl
+ *
+ * Description:
+ *   Perform device specific operations.
+ *
+ * Parameters:
+ *   file     File structure instance
+ *   req      The ioctl command
+ *   arg      The argument of the ioctl cmd
+ *
+ * Return:
+ *   See ioctl() below.
+ *
+ ****************************************************************************/
+
+#if CONFIG_NFILE_DESCRIPTORS > 0
+int file_ioctl(FAR struct file *filep, int req, unsigned long arg)
+{
+  FAR struct inode *inode;
+  int errcode;
+  int ret;
+
+  DEBUGASSERT(filep != NULL);
+
+  /* Is a driver opened? */
+
+  inode = filep->f_inode;
+  if (!inode)
+    {
+      errcode = EBADF;
+      goto errout;
+    }
+
+  /* Does the driver support the ioctl method? */
+
+  if (inode->u.i_ops == NULL || inode->u.i_ops->ioctl == NULL)
+    {
+      errcode = ENOTTY;
+      goto errout;
+    }
+
+  /* Yes on both accounts.  Let the driver perform the ioctl command */
+
+  ret = (int)inode->u.i_ops->ioctl(filep, req, arg);
+  if (ret < 0)
+    {
+      errcode = -ret;
+      goto errout;
+    }
+
+  return ret;
+
+errout:
+  set_errno(errcode);
+  return ERROR;
+}
+#endif /* CONFIG_NFILE_DESCRIPTORS > 0 */
+
 /****************************************************************************
  * Name: ioctl/fs_ioctl
  *
@@ -91,11 +150,9 @@ int fs_ioctl(int fd, int req, unsigned long arg)
 int ioctl(int fd, int req, unsigned long arg)
 #endif
 {
-  int err;
+  int errcode;
 #if CONFIG_NFILE_DESCRIPTORS > 0
-  FAR struct file     *filep;
-  FAR struct inode    *inode;
-  int                  ret = OK;
+  FAR struct file *filep;
 
   /* Did we get a valid file descriptor? */
 
@@ -112,7 +169,7 @@ int ioctl(int fd, int req, unsigned long arg)
       else
 #endif
         {
-          err = EBADF;
+          errcode = EBADF;
           goto errout;
         }
     }
@@ -123,31 +180,24 @@ int ioctl(int fd, int req, unsigned long arg)
   filep = fs_getfilep(fd);
   if (!filep)
     {
-      /* The errno value has already been set */
+      /* Apparently, the fd does not correspond to any open file.  In the
+       * case of errors, the errno value has already been set by
+       * fs_getfilep().
+       */
 
       return ERROR;
     }
 
-  /* Is a driver registered? Does it support the ioctl method? */
+  /* Perform the file ioctl.  If file_ioctl() fails, it will set the errno
+   * value appropriately.
+   */
 
-  inode = filep->f_inode;
-  if (inode && inode->u.i_ops && inode->u.i_ops->ioctl)
-    {
-      /* Yes, then let it perform the ioctl */
-
-      ret = (int)inode->u.i_ops->ioctl(filep, req, arg);
-      if (ret < 0)
-        {
-          err = -ret;
-          goto errout;
-        }
-    }
-
-  return ret;
+  return file_ioctl(filep, req, arg);
+#else
+  errcode = ENOTTY;
 #endif
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 }
-
diff --git a/fs/vfs/fs_link.c b/fs/vfs/fs_link.c
new file mode 100644
index 0000000000000000000000000000000000000000..556343ecdd6484266d5a042a95fa4f10720b08df
--- /dev/null
+++ b/fs/vfs/fs_link.c
@@ -0,0 +1,193 @@
+/****************************************************************************
+ * fs/vfs/fs_link.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "inode/inode.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_PSEUDOFS_SOFTLINKS
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: link
+ *
+ * Description:
+ *   The link() function will create a new link (directory entry) for the
+ *   existing file, path2.  This implementation is simplied for use with
+ *   NuttX in these ways:
+ *
+ *   - Links may be created only within the NuttX top-level, pseudo file
+ *     system.  No file system currently supported by NuttX provides
+ *     symbolic links.
+ *   - For the same reason, only soft links are implemented.
+ *   - File privileges are ignored.
+ *   - c_time is not updated.
+ *
+ * Input Parameters:
+ *   path1 - Points to a pathname naming an existing file.
+ *   path2 - Points to a pathname naming the new directory entry to be created.
+ *
+ * Returned Value:
+ *   On success, zero (OK) is returned.  Otherwise, -1 (ERROR) is returned
+ *   the the errno variable is set appropriately.
+ *
+ ****************************************************************************/
+
+int link(FAR const char *path1, FAR const char *path2)
+{
+  struct inode_search_s desc;
+  FAR struct inode *inode;
+  int errcode;
+  int ret;
+
+  /* Both paths must be absolute.  We need only check path1 here. path2 will
+   * be checked by inode find.
+   */
+
+  if (path1 == NULL || *path1 != '/')
+    {
+      errcode = EINVAL;
+      goto errout;
+    }
+
+  /* Check that no inode exists at the 'path1' and that the path up to 'path1'
+   * does not lie on a mounted volume.
+   */
+
+  SETUP_SEARCH(&desc, path2, false);
+
+  ret = inode_find(&desc);
+  if (ret >= 0)
+    {
+      /* Something exists at the path2 where we are trying to create the
+       * link.
+       */
+
+#ifndef CONFIG_DISABLE_MOUNTPOINT
+      /* Check if the inode is a mountpoint. */
+
+      DEBUGASSERT(desc.node != NULL);
+      if (INODE_IS_MOUNTPT(desc.node))
+        {
+          /* Symbolic links within the mounted volume are not supported */
+
+          errcode = ENOSYS;
+        }
+      else
+#endif
+        {
+          /* A node already exists in the pseudofs at 'path1' */
+
+          errcode = EEXIST;
+        }
+
+      goto errout_with_inode;
+    }
+
+  /* No inode exists that contains this path.  Create a new inode in the
+   * pseudo-filesystem at this location.
+   */
+
+  else
+    {
+      /* Copy path1 */
+
+      FAR char *newpath2 = strdup(path1);
+      if (newpath2 == NULL)
+        {
+          errcode = ENOMEM;
+          goto errout_with_search;
+        }
+
+      /* Create an inode in the pseudo-filesystem at this path.
+       * NOTE that the new inode will be created with a reference
+       * count of zero.
+       */
+
+      inode_semtake();
+      ret = inode_reserve(path2, &inode);
+      inode_semgive();
+
+      if (ret < 0)
+        {
+          kmm_free(newpath2);
+          errcode = -ret;
+          goto errout_with_search;
+        }
+
+      /* Initialize the inode */
+
+      INODE_SET_SOFTLINK(inode);
+      inode->u.i_link = newpath2;
+    }
+
+  /* Symbolic link successfully created */
+
+  RELEASE_SEARCH(&desc);
+  return OK;
+
+errout_with_inode:
+  inode_release(inode);
+
+errout_with_search:
+  RELEASE_SEARCH(&desc);
+
+errout:
+  set_errno(errcode);
+  return ERROR;
+}
+
+#endif /* CONFIG_PSEUDOFS_SOFTLINKS */
diff --git a/fs/vfs/fs_lseek.c b/fs/vfs/fs_lseek.c
index 7136d2ce11866c20a6aed7f4b43503f94f14e419..be74239ecae0b714f290604453191c060c7db907 100644
--- a/fs/vfs/fs_lseek.c
+++ b/fs/vfs/fs_lseek.c
@@ -75,7 +75,7 @@ off_t file_seek(FAR struct file *filep, off_t offset, int whence)
 {
   FAR struct inode *inode;
   int ret;
-  int err = OK;
+  int errcode = OK;
 
   DEBUGASSERT(filep);
   inode =  filep->f_inode;
@@ -87,7 +87,7 @@ off_t file_seek(FAR struct file *filep, off_t offset, int whence)
       ret = (int)inode->u.i_ops->seek(filep, offset, whence);
       if (ret < 0)
         {
-          err = -ret;
+          errcode = -ret;
           goto errout;
         }
     }
@@ -108,17 +108,17 @@ off_t file_seek(FAR struct file *filep, off_t offset, int whence)
               }
             else
               {
-                err = EINVAL;
+                errcode = EINVAL;
                 goto errout;
               }
             break;
 
           case SEEK_END:
-            err = ENOSYS;
+            errcode = ENOSYS;
             goto errout;
 
           default:
-            err = EINVAL;
+            errcode = EINVAL;
             goto errout;
         }
     }
@@ -126,7 +126,7 @@ off_t file_seek(FAR struct file *filep, off_t offset, int whence)
   return filep->f_pos;
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
   return (off_t)ERROR;
 }
 
diff --git a/fs/vfs/fs_mkdir.c b/fs/vfs/fs_mkdir.c
index 57b0d1be088cff4613762344ab3d69c38caf2762..e310b358595acedd76b3fa3e3af5d59869007e1d 100644
--- a/fs/vfs/fs_mkdir.c
+++ b/fs/vfs/fs_mkdir.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/vfs/fs_mkdir.c
  *
- *   Copyright (C) 2007, 2008, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2008, 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -38,9 +38,13 @@
  ****************************************************************************/
 
 #include 
+
 #include 
 #include 
+#include 
+#include 
 #include 
+
 #include 
 
 #include "inode/inode.h"
@@ -80,20 +84,25 @@
 
 int mkdir(const char *pathname, mode_t mode)
 {
+  struct inode_search_s desc;
   FAR struct inode *inode;
-  const char       *relpath = NULL;
-  int               errcode;
-  int               ret;
+  int errcode;
+  int ret;
 
   /* Find the inode that includes this path */
 
-  inode = inode_find(pathname, &relpath);
-  if (inode)
+  SETUP_SEARCH(&desc, pathname, false);
+
+  ret = inode_find(&desc);
+  if (ret >= 0)
     {
       /* An inode was found that includes this path and possibly refers to a
        * mountpoint.
        */
 
+      inode = desc.node;
+      DEBUGASSERT(inode != NULL);
+
 #ifndef CONFIG_DISABLE_MOUNTPOINT
       /* Check if the inode is a valid mountpoint. */
 
@@ -111,7 +120,7 @@ int mkdir(const char *pathname, mode_t mode)
 
       if (inode->u.i_mops->mkdir)
         {
-          ret = inode->u.i_mops->mkdir(inode, relpath, mode);
+          ret = inode->u.i_mops->mkdir(inode, desc.relpath, mode);
           if (ret < 0)
             {
               errcode = -ret;
@@ -154,24 +163,27 @@ int mkdir(const char *pathname, mode_t mode)
       if (ret < 0)
         {
           errcode = -ret;
-          goto errout;
+          goto errout_with_search;
         }
     }
 #else
   else
     {
       errcode = ENXIO;
-      goto errout;
+      goto errout_with_search;
     }
 #endif
 
   /* Directory successfully created */
 
+  RELEASE_SEARCH(&desc);
   return OK;
 
 errout_with_inode:
   inode_release(inode);
-errout:
+
+errout_with_search:
+  RELEASE_SEARCH(&desc);
   set_errno(errcode);
   return ERROR;
 }
diff --git a/fs/vfs/fs_open.c b/fs/vfs/fs_open.c
index 81a2ef7f7cc62693ef896f88665ea8b8a9fec248..f034782865603e1970f1491be27941f79abb88fa 100644
--- a/fs/vfs/fs_open.c
+++ b/fs/vfs/fs_open.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/vfs/fs_open.c
  *
- *   Copyright (C) 2007-2009, 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011-2012, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -48,15 +49,12 @@
 #include 
 #endif
 
+#include 
 #include 
 
 #include "inode/inode.h"
 #include "driver/driver.h"
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -92,9 +90,9 @@ int inode_checkflags(FAR struct inode *inode, int oflags)
 
 int open(const char *path, int oflags, ...)
 {
+  struct inode_search_s desc;
   FAR struct file *filep;
   FAR struct inode *inode;
-  FAR const char *relpath = NULL;
 #if defined(CONFIG_FILE_MODE) || !defined(CONFIG_DISABLE_MOUNTPOINT)
   mode_t mode = 0666;
 #endif
@@ -106,6 +104,10 @@ int open(const char *path, int oflags, ...)
 #    warning "File creation not implemented"
 #  endif
 
+  /* open() is a cancellation point */
+
+  (void)enter_cancellation_point();
+
   /* If the file is opened for creation, then get the mode bits */
 
   if ((oflags & (O_WRONLY | O_CREAT)) != 0)
@@ -119,20 +121,27 @@ int open(const char *path, int oflags, ...)
 
   /* Get an inode for this file */
 
-  inode = inode_find(path, &relpath);
-  if (!inode)
+  SETUP_SEARCH(&desc, path, false);
+
+  ret = inode_find(&desc);
+  if (ret < 0)
     {
       /* "O_CREAT is not set and the named file does not exist.  Or, a
        * directory component in pathname does not exist or is a dangling
        * symbolic link."
        */
 
-      ret = ENOENT;
-      goto errout;
+      ret = -ret;
+      goto errout_with_search;
     }
 
-#if !defined(CONFIG_DISABLE_PSEUDOFS_OPERATIONS) && \
-    !defined(CONFIG_DISABLE_MOUNTPOINT)
+  /* Get the search results */
+
+  inode = desc.node;
+  DEBUGASSERT(inode != NULL);
+
+#if !defined(CONFIG_DISABLE_MOUNTPOINT) && \
+    !defined(CONFIG_DISABLE_PSEUDOFS_OPERATIONS)
    /* If the inode is block driver, then we may return a character driver
     * proxy for the block driver.  block_proxy() will instantiate a BCH
     * character driver wrapper around the block driver, open(), then
@@ -154,11 +163,13 @@ int open(const char *path, int oflags, ...)
        if (fd < 0)
          {
            ret = fd;
-           goto errout;
+           goto errout_with_search;
          }
 
        /* Return the file descriptor */
 
+       RELEASE_SEARCH(&desc);
+       leave_cancellation_point();
        return fd;
      }
    else
@@ -204,7 +215,7 @@ int open(const char *path, int oflags, ...)
     {
       /* The errno value has already been set */
 
-      return ERROR;
+      goto errout;
     }
 
   /* Perform the driver open operation.  NOTE that the open method may be
@@ -218,7 +229,7 @@ int open(const char *path, int oflags, ...)
 #ifndef CONFIG_DISABLE_MOUNTPOINT
       if (INODE_IS_MOUNTPT(inode))
         {
-          ret = inode->u.i_mops->open(filep, relpath, oflags, mode);
+          ret = inode->u.i_mops->open(filep, desc.relpath, oflags, mode);
         }
       else
 #endif
@@ -233,13 +244,52 @@ int open(const char *path, int oflags, ...)
       goto errout_with_fd;
     }
 
+#ifdef CONFIG_PSEUDOTERM_SUSV1
+  /* If the return value from the open method is > 0, then it may actually
+   * be an encoded file descriptor.  This kind of logic is currently only
+   * needed for /dev/ptmx:  When dev ptmx is opened, it does not return a
+   * file descriptor associated with the /dev/ptmx inode, but rather with
+   * the inode of master device created by the /dev/ptmx open method.
+   *
+   * The encoding supports (a) returning file descriptor 0 (which really
+   * should not happen), and (b) avoiding confusion if some other open
+   * method returns a positive, non-zero value which is not a file
+   * descriptor.
+   */
+
+  if (OPEN_ISFD(ret))
+    {
+      /* Release file descriptor and inode that we allocated.  We don't
+       * need those.
+       */
+
+      files_release(fd);
+      inode_release(inode);
+
+      /* Instead, decode and return the descriptor associated with the
+       * master side device.
+       */
+
+      fd = (int)OPEN_GETFD(ret);
+      DEBUGASSERT((unsigned)fd < (CONFIG_NFILE_DESCRIPTORS + CONFIG_NSOCKET_DESCRIPTORS));
+    }
+#endif
+
+  RELEASE_SEARCH(&desc);
+  leave_cancellation_point();
   return fd;
 
 errout_with_fd:
   files_release(fd);
+
 errout_with_inode:
   inode_release(inode);
-errout:
+
+errout_with_search:
+  RELEASE_SEARCH(&desc);
   set_errno(ret);
+
+errout:
+  leave_cancellation_point();
   return ERROR;
 }
diff --git a/fs/vfs/fs_poll.c b/fs/vfs/fs_poll.c
index 2910b30551f7f8c1105b0b18b1b9dc882415db88..f0cc6ce2a9feed104b501f3e4ec7aae3dc5af0dc 100644
--- a/fs/vfs/fs_poll.c
+++ b/fs/vfs/fs_poll.c
@@ -47,9 +47,10 @@
 #include 
 
 #include 
+#include 
+#include 
 #include 
 #include 
-#include 
 
 #include 
 
@@ -77,14 +78,14 @@ static int poll_semtake(FAR sem_t *sem)
 
   if (sem_wait(sem) < 0)
     {
-      int err = get_errno();
+      int errcode = get_errno();
 
       /* The only case that an error should occur here is if the wait were
        * awakened by a signal.
        */
 
-      DEBUGASSERT(err == EINTR);
-      return -err;
+      DEBUGASSERT(errcode == EINTR);
+      return -errcode;
     }
 
   return OK;
@@ -121,7 +122,7 @@ static int poll_fdsetup(int fd, FAR struct pollfd *fds, bool setup)
         }
     }
 
-  return file_poll(fd, fds, setup);
+  return fdesc_poll(fd, fds, setup);
 }
 #endif
 
@@ -247,6 +248,49 @@ static inline int poll_teardown(FAR struct pollfd *fds, nfds_t nfds, int *count,
  * Function: file_poll
  *
  * Description:
+ *   Low-level poll operation based on struc file.  This is used both to (1)
+ *   support detached file, and also (2) by fdesc_poll() to perform all
+ *   normal operations on file descriptors descriptors.
+ *
+ * Input Parameters:
+ *   file     File structure instance
+ *   fds   - The structure describing the events to be monitored, OR NULL if
+ *           this is a request to stop monitoring events.
+ *   setup - true: Setup up the poll; false: Teardown the poll
+ *
+ * Returned Value:
+ *  0: Success; Negated errno on failure
+ *
+ ****************************************************************************/
+
+#if CONFIG_NFILE_DESCRIPTORS > 0
+int file_poll(FAR struct file *filep, FAR struct pollfd *fds, bool setup)
+{
+  FAR struct inode *inode;
+  int ret = -ENOSYS;
+
+  DEBUGASSERT(filep != NULL && filep->f_inode != NULL);
+  inode = filep->f_inode;
+
+  /* Is a driver registered? Does it support the poll method?
+   * If not, return -ENOSYS
+   */
+
+  if (inode != NULL && inode->u.i_ops != NULL && inode->u.i_ops->poll != NULL)
+    {
+      /* Yes, it does... Setup the poll */
+
+      ret = (int)inode->u.i_ops->poll(filep, fds, setup);
+    }
+
+  return ret;
+}
+#endif
+
+/****************************************************************************
+ * Function: fdesc_poll
+ *
+ * Description:
  *   The standard poll() operation redirects operations on file descriptors
  *   to this function.
  *
@@ -262,11 +306,9 @@ static inline int poll_teardown(FAR struct pollfd *fds, nfds_t nfds, int *count,
  ****************************************************************************/
 
 #if CONFIG_NFILE_DESCRIPTORS > 0
-int file_poll(int fd, FAR struct pollfd *fds, bool setup)
+int fdesc_poll(int fd, FAR struct pollfd *fds, bool setup)
 {
   FAR struct file *filep;
-  FAR struct inode *inode;
-  int ret = -ENOSYS;
 
   /* Get the file pointer corresponding to this file descriptor */
 
@@ -275,22 +317,14 @@ int file_poll(int fd, FAR struct pollfd *fds, bool setup)
     {
       /* The errno value has already been set */
 
-      return -get_errno();
+      int errorcode = get_errno();
+      DEBUGASSERT(errorcode > 0);
+      return -errorcode;
     }
 
-  /* Is a driver registered? Does it support the poll method?
-   * If not, return -ENOSYS
-   */
-
-  inode = filep->f_inode;
-  if (inode && inode->u.i_ops && inode->u.i_ops->poll)
-    {
-      /* Yes, then setup the poll */
-
-      ret = (int)inode->u.i_ops->poll(filep, fds, setup);
-    }
+  /* Let file_poll() do the rest */
 
-  return ret;
+  return file_poll(filep, fds, setup);
 }
 #endif
 
@@ -329,10 +363,20 @@ int poll(FAR struct pollfd *fds, nfds_t nfds, int timeout)
 {
   sem_t sem;
   int count = 0;
-  int err;
+  int errcode;
   int ret;
 
+  /* poll() is a cancellation point */
+
+  (void)enter_cancellation_point();
+
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   sem_init(&sem, 0, 0);
+  sem_setprotocol(&sem, SEM_PRIO_NONE);
+
   ret = poll_setup(fds, nfds, &sem);
   if (ret >= 0)
     {
@@ -378,14 +422,15 @@ int poll(FAR struct pollfd *fds, nfds_t nfds, int timeout)
        * Preserve ret, if negative, since it holds the result of the wait.
        */
 
-      err = poll_teardown(fds, nfds, &count, ret);
-      if (err < 0 && ret >= 0)
+      errcode = poll_teardown(fds, nfds, &count, ret);
+      if (errcode < 0 && ret >= 0)
         {
-          ret = err;
+          ret = errcode;
         }
     }
 
   sem_destroy(&sem);
+  leave_cancellation_point();
 
   /* Check for errors */
 
diff --git a/fs/vfs/fs_pread.c b/fs/vfs/fs_pread.c
index e80efe66a08e58f8261388685d463a0a50ff69b2..2385ea00a0cb0ed42ae131c53cbf0da1e0c29762 100644
--- a/fs/vfs/fs_pread.c
+++ b/fs/vfs/fs_pread.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/vfs/fs_pread.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -43,12 +43,9 @@
 #include 
 #include 
 
+#include 
 #include 
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -144,6 +141,11 @@ ssize_t file_pread(FAR struct file *filep, FAR void *buf, size_t nbytes,
 ssize_t pread(int fd, FAR void *buf, size_t nbytes, off_t offset)
 {
   FAR struct file *filep;
+  ssize_t ret;
+
+  /* pread() is a cancellation point */
+
+  (void)enter_cancellation_point();
 
   /* Get the file structure corresponding to the file descriptor. */
 
@@ -152,10 +154,15 @@ ssize_t pread(int fd, FAR void *buf, size_t nbytes, off_t offset)
     {
       /* The errno value has already been set */
 
-      return (ssize_t)ERROR;
+      ret = (ssize_t)ERROR;
     }
+  else
+    {
+      /* Let file_pread do the real work */
 
-  /* Let file_pread do the real work */
+      ret = file_pread(filep, buf, nbytes, offset);
+    }
 
-  return file_pread(filep, buf, nbytes, offset);
+  leave_cancellation_point();
+  return ret;
 }
diff --git a/fs/vfs/fs_pwrite.c b/fs/vfs/fs_pwrite.c
index 43630c455a4682b006e0114fe091c9b8390f5a24..8e841247ca8e834f6d533d52c3d6a599df70d4f1 100644
--- a/fs/vfs/fs_pwrite.c
+++ b/fs/vfs/fs_pwrite.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/vfs/fs_pwrite.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -43,12 +43,9 @@
 #include 
 #include 
 
+#include 
 #include 
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -142,6 +139,11 @@ ssize_t file_pwrite(FAR struct file *filep, FAR const void *buf,
 ssize_t pwrite(int fd, FAR const void *buf, size_t nbytes, off_t offset)
 {
   FAR struct file *filep;
+  ssize_t ret;
+
+  /* pread() is a cancellation point */
+
+  (void)enter_cancellation_point();
 
   /* Get the file structure corresponding to the file descriptor. */
 
@@ -150,10 +152,15 @@ ssize_t pwrite(int fd, FAR const void *buf, size_t nbytes, off_t offset)
     {
       /* The errno value has already been set */
 
-      return (ssize_t)ERROR;
+      ret = (ssize_t)ERROR;
     }
+  else
+    {
+      /* Let file_pread do the real work */
 
-  /* Let file_pread do the real work */
+      ret = file_pwrite(filep, buf, nbytes, offset);
+    }
 
-  return file_pwrite(filep, buf, nbytes, offset);
+  (void)enter_cancellation_point();
+  return ret;
 }
diff --git a/fs/vfs/fs_read.c b/fs/vfs/fs_read.c
index f1d6097236c3186bf45fbaad4b8448c55cba5ccf..b00616682a034143dd1c612cbb2129ba2e6e4aa0 100644
--- a/fs/vfs/fs_read.c
+++ b/fs/vfs/fs_read.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/vfs/fs_read.c
  *
- *   Copyright (C) 2007-2009, 2012-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2012-2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -38,19 +38,17 @@
  ****************************************************************************/
 
 #include 
+
 #include 
 #include 
-
 #include 
 #include 
 #include 
 #include 
 
-#include "inode/inode.h"
+#include 
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
+#include "inode/inode.h"
 
 /****************************************************************************
  * Public Functions
@@ -94,7 +92,7 @@ ssize_t file_read(FAR struct file *filep, FAR void *buf, size_t nbytes)
    * method?
    */
 
-  else if (inode && inode->u.i_ops && inode->u.i_ops->read)
+  else if (inode != NULL && inode->u.i_ops && inode->u.i_ops->read)
     {
       /* Yes.. then let it perform the read.  NOTE that for the case of the
        * mountpoint, we depend on the read methods being identical in
@@ -136,23 +134,30 @@ ssize_t file_read(FAR struct file *filep, FAR void *buf, size_t nbytes)
 
 ssize_t read(int fd, FAR void *buf, size_t nbytes)
 {
+  ssize_t ret;
+
+  /* read() is a cancellation point */
+
+  (void)enter_cancellation_point();
+
   /* Did we get a valid file descriptor? */
 
 #if CONFIG_NFILE_DESCRIPTORS > 0
   if ((unsigned int)fd >= CONFIG_NFILE_DESCRIPTORS)
 #endif
     {
+#if defined(CONFIG_NET) && CONFIG_NSOCKET_DESCRIPTORS > 0
       /* No.. If networking is enabled, read() is the same as recv() with
-       * the flags parameter set to zero.
+       * the flags parameter set to zero.  Note that recv() sets
+       * the errno variable.
        */
 
-#if defined(CONFIG_NET) && CONFIG_NSOCKET_DESCRIPTORS > 0
-      return recv(fd, buf, nbytes, 0);
+      ret = recv(fd, buf, nbytes, 0);
 #else
       /* No networking... it is a bad descriptor in any event */
 
       set_errno(EBADF);
-      return ERROR;
+      ret = ERROR;
 #endif
     }
 
@@ -162,20 +167,28 @@ ssize_t read(int fd, FAR void *buf, size_t nbytes)
       FAR struct file *filep;
 
       /* The descriptor is in a valid range to file descriptor... do the
-       * read.  First, get the file structure.
+       * read.  First, get the file structure.  Note that on failure,
+       * fs_getfilep() will set the errno variable.
        */
 
       filep = fs_getfilep(fd);
-      if (!filep)
+      if (filep == NULL)
         {
           /* The errno value has already been set */
 
-          return ERROR;
+          ret = ERROR;
         }
+      else
+        {
+          /* Then let file_read do all of the work.  Note that file_read()
+           * sets the errno variable.
+           */
 
-      /* Then let file_read do all of the work */
-
-      return file_read(filep, buf, nbytes);
+          ret = file_read(filep, buf, nbytes);
+        }
     }
 #endif
+
+  leave_cancellation_point();
+  return ret;
 }
diff --git a/fs/vfs/fs_readlink.c b/fs/vfs/fs_readlink.c
new file mode 100644
index 0000000000000000000000000000000000000000..77b4afa9a1afc96c26053eee292db008f94ed637
--- /dev/null
+++ b/fs/vfs/fs_readlink.c
@@ -0,0 +1,142 @@
+/****************************************************************************
+ * fs/vfs/fs_readlink.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT will THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "inode/inode.h"
+
+#ifdef CONFIG_PSEUDOFS_SOFTLINKS
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: mkdir
+ *
+ * Description:
+ *   The readlink() function will place the contents of the symbolic link
+ *   referred to by 'path' in the buffer 'buf' which has size 'bufsize'. If
+ *   the number of bytes in the symbolic link is less than bufsize, the
+ *   contents of the remainder of 'buf' are unspecified. If the buf argument
+ *   is not large enough to contain the link content, the first bufsize bytes
+ *   will be placed in buf.  If the value of bufsize is greater than
+ *   {SSIZE_MAX}, the result is implementation-defined. *
+ *
+ * Input Parameters:
+ *   path   - The full path to the symbolic link
+ *   buf    - The user-provided buffer in which to return the path to the
+ *            link target.
+ *   bufixe - The size of 'buf'
+ *
+ * Returned Value:
+ *   Upon successful completion, readlink() will return the count of bytes
+ *   placed in the buffer. Otherwise, it will return a value of -1, leave the
+ *   buffer unchanged, and set errno to indicate the error.
+ *
+ ****************************************************************************/
+
+ssize_t readlink(FAR const char *path, FAR char *buf, size_t bufsize)
+{
+  struct inode_search_s desc;
+  FAR struct inode *node;
+  int errcode;
+  int ret;
+
+  DEBUGASSERT(path != NULL && buf != NULL && bufsize > 0);
+
+  /* Find the inode that includes this path (without derefencing the final)
+   * symbolic link node.
+   */
+
+  SETUP_SEARCH(&desc, path, true);
+
+  ret = inode_find(&desc);
+  if (ret < 0)
+    {
+      errcode = -ret;
+      goto errout_with_search;
+    }
+
+  /* Get the search results */
+
+  node = desc.node;
+  DEBUGASSERT(node != NULL);
+
+  /* An inode was found that includes this path and possibly refers to a
+   * symbolic link.
+   *
+   * Check if the inode is a valid symbolic link.
+   */
+
+  if (!INODE_IS_SOFTLINK(node))
+    {
+      errcode = EINVAL;
+      goto errout_with_inode;
+    }
+
+  /* Copy the link target pathto the user-provided buffer. */
+
+  *buf = '\0';
+  (void)strncpy(buf, node->u.i_link, bufsize);
+
+  /* Release our reference on the inode and return the length */
+
+  inode_release(node);
+  RELEASE_SEARCH(&desc);
+  return strlen(buf);
+
+errout_with_inode:
+  inode_release(node);
+
+errout_with_search:
+  RELEASE_SEARCH(&desc);
+  set_errno(errcode);
+  return ERROR;
+}
+
+#endif /* CONFIG_PSEUDOFS_SOFTLINKS */
diff --git a/fs/vfs/fs_rename.c b/fs/vfs/fs_rename.c
index a23d7769d4bc1dfa0fd9edce821ec6c0eadb7b57..d0c074ae45974e7022b861ce9c4805c32590dcfd 100644
--- a/fs/vfs/fs_rename.c
+++ b/fs/vfs/fs_rename.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/vfs/fs_rename.c
  *
- *   Copyright (C) 2007-2009, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,8 +39,13 @@
 
 #include 
 
+#include 
+#include 
 #include 
+#include 
+#include 
 #include 
+
 #include 
 
 #include "inode/inode.h"
@@ -68,179 +73,495 @@
 #ifdef FS_HAVE_RENAME
 
 /****************************************************************************
- * Public Functions
+ * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: rename
+ * Name: pseudorename
  *
- * Description:  Remove a file managed a mountpoint
+ * Description:
+ *   Rename an inode in the pseudo file system
  *
  ****************************************************************************/
 
-int rename(FAR const char *oldpath, FAR const char *newpath)
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+static int pseudorename(FAR const char *oldpath, FAR struct inode *oldinode,
+                        FAR const char *newpath)
 {
-  FAR struct inode *oldinode;
+  struct inode_search_s newdesc;
   FAR struct inode *newinode;
-  const char       *oldrelpath = NULL;
-#ifndef CONFIG_DISABLE_MOUNTPOINT
-  const char       *newrelpath = NULL;
-#endif
-  int               errcode;
-  int               ret;
+  FAR char *subdir = NULL;
+  FAR const char *name;
+  int ret;
 
-  /* Ignore paths that are interpreted as the root directory which has no name
-   * and cannot be moved
+  /* Special case the root directory.  There is no root inode and there is
+   * no name for the root.  inode_find() will fail to the find the root
+   * inode -- because there isn't one.
    */
 
-  if (!oldpath || *oldpath == '\0' || oldpath[0] != '/' ||
-      !newpath || *newpath == '\0' || newpath[0] != '/')
+  name = newpath;
+  while (*name == '/')
     {
-      return -EINVAL;
+      name++;
     }
 
-  /* Get an inode that includes the oldpath */
-
-  oldinode = inode_find(oldpath, &oldrelpath);
-  if (!oldinode)
+  if (*name == '\0')
     {
-      /* There is no inode that includes in this path */
+      FAR char *subdirname;
 
-      errcode = ENOENT;
-      goto errout;
+      /* In the newpath is the root directory, the target of the rename must
+       * be a directory entry under the root.
+       */
+
+      subdirname = basename((FAR char *)oldpath);
+
+      (void)asprintf(&subdir, "/%s", subdirname);
+      if (subdir == NULL)
+        {
+          ret = -ENOMEM;
+          goto errout;
+        }
+
+      newpath = subdir;
     }
 
-#ifndef CONFIG_DISABLE_MOUNTPOINT
-  /* Verify that the old inode is a valid mountpoint. */
+  /* According to POSIX, any old inode at this path should be removed
+   * first, provided that it is not a directory.
+   */
+
+next_subdir:
 
-  if (INODE_IS_MOUNTPT(oldinode) && oldinode->u.i_mops)
+  SETUP_SEARCH(&newdesc, newpath, true);
+  ret = inode_find(&newdesc);
+  if (ret >= 0)
     {
-      /* Get an inode for the new relpath -- it should like on the same
-       * mountpoint
+      /* We found it.  Get the search results */
+
+      newinode = newdesc.node;
+      DEBUGASSERT(newinode != NULL);
+
+      /* If the old and new inodes are the same, then this is an attempt to
+       * move the directory entry onto itself.  Let's not but say we did.
        */
 
-      newinode = inode_find(newpath, &newrelpath);
-      if (!newinode)
+      if (oldinode == newinode)
         {
-          /* There is no mountpoint that includes in this path */
-
-          errcode = ENOENT;
-          goto errout_with_oldinode;
+          ret = OK;
+          goto errout; /* Bad naming, this is not an error case. */
         }
 
-      /* Verify that the two paths lie on the same mountpoint inode */
+#ifndef CONFIG_DISABLE_MOUNTPOINT
+      /* Make sure that the old path does not lie on a mounted volume. */
 
-      if (oldinode != newinode)
+      if (INODE_IS_MOUNTPT(newinode))
         {
-          errcode = EXDEV;
-          goto errout_with_newinode;
+          inode_release(newinode);
+          ret = -EXDEV;
+          goto errout;
         }
-
-      /* Perform the rename operation using the relative paths
-       * at the common mountpoint.
+#endif
+      /* We found it and it appears to be a "normal" inode.  Is it a
+       * directory (i.e, an operation-less inode or an inode with children)?
        */
 
-      if (oldinode->u.i_mops->rename)
+      if (newinode->u.i_ops == NULL || newinode->i_child != NULL)
         {
-          ret = oldinode->u.i_mops->rename(oldinode, oldrelpath, newrelpath);
-          if (ret < 0)
+          FAR char *subdirname;
+          FAR char *tmp;
+
+          /* Yes.. In this case, the target of the rename must be a
+           * subdirectory of newinode, not the newinode itself.  For
+           * example: mv b a/ must move b to a/b.
+           */
+
+          subdirname = basename((FAR char *)oldpath);
+          tmp        = subdir;
+          subdir     = NULL;
+
+          (void)asprintf(&subdir, "%s/%s", newpath, subdirname);
+
+          if (tmp != NULL)
+            {
+              kmm_free(tmp);
+            }
+
+          if (subdir == NULL)
             {
-              errcode = -ret;
-              goto errout_with_newinode;
+              ret = -ENOMEM;
+              goto errout;
             }
+
+          newpath = subdir;
+
+          /* This can be a recursive case, another inode may already exist
+           * at oldpth/subdirname.  In that case, we need to do this all
+           * over again.  A nasty goto is used because I am lazy.
+           */
+
+          goto next_subdir;
         }
       else
         {
-          errcode = ENOSYS;
-          goto errout_with_newinode;
-        }
+          /* Not a directory... remove it.  It may still be something
+           * important (like a driver), but we will just have to suffer
+           * the consequences.
+           *
+           * NOTE (1) that we not bother to check the error.  If we
+           * failed to remove the inode for some reason, then
+           * inode_reserve() will complain below, and (2) the inode
+           * won't really be removed until we call inode_release();
+           */
 
-      /* Successfully renamed */
+          (void)inode_remove(newpath);
+        }
 
       inode_release(newinode);
     }
-  else
-#endif
-#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+
+  /* Create a new, empty inode at the destination location.
+   * NOTE that the new inode will be created with a reference count
+   * of  zero.
+   */
+
+  inode_semtake();
+
+  ret = inode_reserve(newpath, &newinode);
+  if (ret < 0)
     {
-      /* Create a new, empty inode at the destination location.
-       * NOTE that the new inode will be created with a reference count
-       * of  zero.
+      /* It is an error if a node at newpath already exists in the tree
+       * OR if we fail to allocate memory for the new inode (and possibly
+       * any new intermediate path segments).
        */
 
-      inode_semtake();
-      ret = inode_reserve(newpath, &newinode);
-      if (ret < 0)
-        {
-          /* It is an error if a node at newpath already exists in the tree
-           * OR if we fail to allocate memory for the new inode (and possibly
-           * any new intermediate path segments).
-           */
-
-          inode_semgive();
-          errcode = EEXIST;
-          goto errout_with_oldinode;
-        }
+      ret = -EEXIST;
+      goto errout_with_sem;
+    }
 
-      /* Copy the inode state from the old inode to the newly allocated inode */
+  /* Copy the inode state from the old inode to the newly allocated inode */
 
-      newinode->i_child   = oldinode->i_child;   /* Link to lower level inode */
-      newinode->i_flags   = oldinode->i_flags;   /* Flags for inode */
-      newinode->u.i_ops   = oldinode->u.i_ops;   /* Inode operations */
+  newinode->i_child   = oldinode->i_child;   /* Link to lower level inode */
+  newinode->i_flags   = oldinode->i_flags;   /* Flags for inode */
+  newinode->u.i_ops   = oldinode->u.i_ops;   /* Inode operations */
 #ifdef CONFIG_FILE_MODE
-      newinode->i_mode    = oldinode->i_mode;    /* Access mode flags */
+  newinode->i_mode    = oldinode->i_mode;    /* Access mode flags */
+#endif
+  newinode->i_private = oldinode->i_private; /* Per inode driver private data */
+
+#ifdef CONFIG_PSEUDOFS_SOFTLINKS
+  /* Prevent the link target string from being deallocated.  The pointer to
+   * the allocated link target path was copied above (under the guise of
+   * u.i_ops).  Now we must nullify the u.i_link pointer so that it is not
+   * deallocated when inode_free() is (eventually called.
+   */
+
+  oldinode->u.i_link  = NULL;
 #endif
-      newinode->i_private = oldinode->i_private; /* Per inode driver private data */
-
-      /* We now have two copies of the inode.  One with a reference count of
-       * zero (the new one), and one that may have multiple references
-       * including one by this logic (the old one)
-       *
-       * Remove the old inode.  Because we hold a reference count on the
-       * inode, it will not be deleted now.  It will be deleted when all of
-       * the references to to the inode have been released (perhaps when
-       * inode_release() is called below).  inode_remove() should return
-       * -EBUSY to indicate that the inode was not deleted now.
+
+  /* We now have two copies of the inode.  One with a reference count of
+   * zero (the new one), and one that may have multiple references
+   * including one by this logic (the old one)
+   *
+   * Remove the old inode.  Because we hold a reference count on the
+   * inode, it will not be deleted now.  It will be deleted when all of
+   * the references to to the inode have been released (perhaps when
+   * inode_release() is called in remove()).  inode_remove() should return
+   * -EBUSY to indicate that the inode was not deleted now.
+   */
+
+  ret = inode_remove(oldpath);
+  if (ret < 0 && ret != -EBUSY)
+    {
+      /* Remove the new node we just recreated */
+
+      (void)inode_remove(newpath);
+      goto errout_with_sem;
+    }
+
+  /* Remove all of the children from the unlinked inode */
+
+  oldinode->i_child = NULL;
+  ret = OK;
+
+errout_with_sem:
+  inode_semgive();
+
+errout:
+  if (subdir != NULL)
+    {
+      kmm_free(subdir);
+    }
+
+  return ret;
+}
+
+#endif /* CONFIG_DISABLE_PSEUDOFS_OPERATIONS */
+
+/****************************************************************************
+ * Name: mountptrename
+ *
+ * Description:
+ *   Rename a file residing on a mounted volume.
+ *
+ ****************************************************************************/
+
+#ifndef CONFIG_DISABLE_MOUNTPOINT
+static int mountptrename(FAR const char *oldpath, FAR struct inode *oldinode,
+                         FAR const char *oldrelpath, FAR const char *newpath)
+{
+  struct inode_search_s newdesc;
+  FAR struct inode *newinode;
+  FAR const char *newrelpath;
+  FAR char *subdir = NULL;
+  int ret;
+
+  DEBUGASSERT(oldinode->u.i_mops);
+
+  /* If the file system does not support the rename() method, then bail now.
+   * As of this writing, only NXFFS does not support the rename method.  A
+   * good fallback might be to copy the oldrelpath to the correct location,
+   * then unlink it.
+   */
+
+  if (oldinode->u.i_mops->rename == NULL)
+    {
+      return -ENOSYS;
+    }
+
+  /* Get an inode for the new relpath -- it should lie on the same
+   * mountpoint
+   */
+
+  SETUP_SEARCH(&newdesc, newpath, true);
+
+  ret = inode_find(&newdesc);
+  if (ret < 0)
+    {
+      /* There is no mountpoint that includes in this path */
+
+      goto errout_with_newsearch;
+    }
+
+  /* Get the search results */
+
+  newinode   = newdesc.node;
+  newrelpath = newdesc.relpath;
+  DEBUGASSERT(newinode != NULL && newrelpath != NULL);
+
+  /* Verify that the two paths lie on the same mountpoint inode */
+
+  if (oldinode != newinode)
+    {
+      ret = -EXDEV;
+      goto errout_with_newinode;
+    }
+
+  /* Does a directory entry already exist at the 'rewrelpath'?  And is it
+   * not the same directory entry that we are moving?
+   *
+   * If the directory entry at the newrelpath is a regular file, then that
+   * file should be removed first.
+   *
+   * If the directory entry at the target is a directory, then the source
+   * file should be moved "under" the directory, i.e., if newrelpath is a
+   * directory, then rename(b,a) should use move the olrelpath should be
+   * moved as if rename(b,a/basename(b)) had been called.
+   */
+
+  if (oldinode->u.i_mops->stat != NULL &&
+      strcmp(oldrelpath, newrelpath) != 0)
+    {
+      struct stat buf;
+
+next_subdir:
+
+      /* Something exists for this directory entry.  Do nothing in the
+       * degenerate case where a directory or file is being moved to
+       * itself.
        */
 
-      ret = inode_remove(oldpath);
-      if (ret < 0 && ret != -EBUSY)
+      if (strcmp(oldrelpath, newrelpath) != 0)
         {
-          /* Remove the new node we just recreated */
+          ret = oldinode->u.i_mops->stat(oldinode, newrelpath, &buf);
+          if (ret >= 0)
+            {
+              /* Is the directory entry a directory? */
+
+              if (S_ISDIR(buf.st_mode))
+                {
+                  FAR char *subdirname;
+
+                 /* Yes.. In this case, the target of the rename must be a
+                   * subdirectory of newinode, not the newinode itself.  For
+                   * example: mv b a/ must move b to a/b.
+                   */
+
+                  subdirname = basename((FAR char *)oldrelpath);
+
+                  /* Special case the root directory */
+
+                  if (*newrelpath == '\0')
+                    {
+                      if (subdir != NULL)
+                        {
+                           kmm_free(subdir);
+                           subdir = NULL;
+                        }
+
+                      newrelpath = subdirname;
+                    }
+                  else
+                    {
+                      FAR char *tmp = subdir;
+
+                      subdir = NULL;
+                      (void)asprintf(&subdir, "%s/%s", newrelpath, subdirname);
+
+                      if (tmp != NULL)
+                        {
+                          kmm_free(tmp);
+                        }
+
+                      if (subdir == NULL)
+                        {
+                          ret = -ENOMEM;
+                          goto errout_with_newinode;
+                        }
+
+                      newrelpath = subdir;
+                    }
+
+                  /* This can be a recursive, another directory may already
+                   * exist at the newrelpath.  In that case, we need to
+                   * do this all over again.  A nasty goto is used because
+                   * I am lazy.
+                   */
+
+                  goto next_subdir;
+                }
+              else if (oldinode->u.i_mops->unlink)
+                {
+                  /* No.. newrelpath must refer to a regular file.  Attempt
+                   * to remove the file before doing the rename.
+                   *
+                   * NOTE that errors are not handled here.  If we failed to
+                   * remove the file, then the file system 'rename' method
+                   * should check that.
+                   */
+
+                   (void)oldinode->u.i_mops->unlink(oldinode, newrelpath);
+                }
+            }
+        }
+    }
 
-          (void)inode_remove(newpath);
-          inode_semgive();
+  /* Just declare success of the oldrepath and the newrelpath point to
+   * the same directory entry.  That directory entry should have been
+   * stat'ed above to assure that it exists.
+   */
 
-          errcode = -ret;
-          goto errout_with_oldinode;
-        }
+  ret = OK;
+  if (strcmp(oldrelpath, newrelpath) != 0)
+    {
+      /* Perform the rename operation using the relative paths at the common
+       * mountpoint.
+       */
+
+      ret = oldinode->u.i_mops->rename(oldinode, oldrelpath, newrelpath);
+    }
 
-      /* Remove all of the children from the unlinked inode */
+errout_with_newinode:
+  inode_release(newinode);
 
-      oldinode->i_child = NULL;
-      inode_semgive();
+errout_with_newsearch:
+  RELEASE_SEARCH(&newdesc);
+
+  if (subdir != NULL)
+    {
+      kmm_free(subdir);
     }
-#else
+
+  return ret;
+}
+#endif /* CONFIG_DISABLE_MOUNTPOINT */
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: rename
+ *
+ * Description:
+ *   Rename a file or directory.
+ *
+ ****************************************************************************/
+
+int rename(FAR const char *oldpath, FAR const char *newpath)
+{
+  struct inode_search_s olddesc;
+  FAR struct inode *oldinode;
+  int ret;
+
+  /* Ignore paths that are interpreted as the root directory which has no name
+   * and cannot be moved
+   */
+
+  if (!oldpath || *oldpath == '\0' || oldpath[0] != '/' ||
+      !newpath || *newpath == '\0' || newpath[0] != '/')
     {
-      errcode = ENXIO;
+      ret = -EINVAL;
       goto errout;
     }
-#endif
 
-  /* Successfully renamed */
+  /* Get an inode that includes the oldpath */
 
-  inode_release(oldinode);
-  return OK;
+  SETUP_SEARCH(&olddesc, oldpath, true);
+
+  ret = inode_find(&olddesc);
+  if (ret < 0)
+    {
+      /* There is no inode that includes in this path */
+
+      goto errout_with_oldsearch;
+    }
+
+  /* Get the search results */
+
+  oldinode = olddesc.node;
+  DEBUGASSERT(oldinode != NULL);
 
 #ifndef CONFIG_DISABLE_MOUNTPOINT
-errout_with_newinode:
-  inode_release(newinode);
+  /* Verify that the old inode is a valid mountpoint. */
+
+  if (INODE_IS_MOUNTPT(oldinode))
+    {
+      ret = mountptrename(oldpath, oldinode, olddesc.relpath, newpath);
+    }
+  else
+#endif /* CONFIG_DISABLE_MOUNTPOINT */
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+    {
+      ret = pseudorename(oldpath, oldinode, newpath);
+    }
+#else
+    {
+      ret = -ENXIO;
+    }
 #endif
-errout_with_oldinode:
+
   inode_release(oldinode);
+
+errout_with_oldsearch:
+  RELEASE_SEARCH(&olddesc);
+
 errout:
-  set_errno(errcode);
-  return ERROR;
+  if (ret < 0)
+    {
+      set_errno(-ret);
+      return ERROR;
+    }
+
+  return OK;
 }
 
 #endif /* FS_HAVE_RENAME */
diff --git a/fs/vfs/fs_rmdir.c b/fs/vfs/fs_rmdir.c
index ecef33558e31e60d280c7f17b49ee57dd22b8f1a..d75c83a7e195ffa95b215784df737cee4ad47e53 100644
--- a/fs/vfs/fs_rmdir.c
+++ b/fs/vfs/fs_rmdir.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/vfs/fs_rmdir.c
  *
- *   Copyright (C) 2007-2009, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,8 +39,11 @@
 
 #include 
 
+#include 
 #include 
+#include 
 #include 
+
 #include 
 
 #include "inode/inode.h"
@@ -80,23 +83,32 @@
 
 int rmdir(FAR const char *pathname)
 {
+  struct inode_search_s desc;
   FAR struct inode *inode;
-  const char       *relpath = NULL;
-  int               errcode;
+  int errcode;
+  int ret;
 
-  /* Get an inode for this file.  inode_find() automatically increments the
-   * reference count on the inode if one is found.
+  /* Get an inode for the directory (or for the mountpoint containing the
+   * directory).  inode_find() automatically increments the reference count
+   * on the inode if one is found.
    */
 
-  inode = inode_find(pathname, &relpath);
-  if (!inode)
+  SETUP_SEARCH(&desc, pathname, true);
+
+  ret = inode_find(&desc);
+  if (ret < 0)
     {
       /* There is no inode that includes in this path */
 
-      errcode = ENOENT;
-      goto errout;
+      errcode = -ret;
+      goto errout_with_search;
     }
 
+  /* Get the search results */
+
+  inode = desc.node;
+  DEBUGASSERT(inode != NULL);
+
 #ifndef CONFIG_DISABLE_MOUNTPOINT
   /* Check if the inode is a valid mountpoint. */
 
@@ -108,7 +120,7 @@ int rmdir(FAR const char *pathname)
 
       if (inode->u.i_mops->rmdir)
         {
-          int ret = inode->u.i_mops->rmdir(inode, relpath);
+          ret = inode->u.i_mops->rmdir(inode, desc.relpath);
           if (ret < 0)
             {
               errcode = -ret;
@@ -131,8 +143,6 @@ int rmdir(FAR const char *pathname)
 
   if (!inode->u.i_ops)
     {
-      int ret;
-
       /* If the directory inode has children, however, then it cannot be
        * removed.
        */
@@ -174,11 +184,13 @@ int rmdir(FAR const char *pathname)
   /* Successfully removed the directory */
 
   inode_release(inode);
+  RELEASE_SEARCH(&desc);
   return OK;
 
 errout_with_inode:
   inode_release(inode);
-errout:
+errout_with_search:
+  RELEASE_SEARCH(&desc);
   set_errno(errcode);
   return ERROR;
 }
diff --git a/fs/vfs/fs_select.c b/fs/vfs/fs_select.c
index d71d8e28a1c2921593dc5956afe106c21f41afcd..acb42b35aed7b4c8b640e4f60dd7b4b64b9de6fb 100644
--- a/fs/vfs/fs_select.c
+++ b/fs/vfs/fs_select.c
@@ -49,6 +49,7 @@
 #include 
 
 #include 
+#include 
 #include 
 
 #include "inode/inode.h"
@@ -110,6 +111,10 @@ int select(int nfds, FAR fd_set *readfds, FAR fd_set *writefds,
   int ndx;
   int ret;
 
+  /* select() is cancellation point */
+
+  (void)enter_cancellation_point();
+
   /* How many pollfd structures do we need to allocate? */
 
   /* Initialize the descriptor list for poll() */
@@ -134,6 +139,7 @@ int select(int nfds, FAR fd_set *readfds, FAR fd_set *writefds,
   if (!pollset)
     {
       set_errno(ENOMEM);
+      leave_cancellation_point();
       return ERROR;
     }
 
@@ -280,6 +286,7 @@ int select(int nfds, FAR fd_set *readfds, FAR fd_set *writefds,
       set_errno(errcode);
     }
 
+  leave_cancellation_point();
   return ret;
 }
 
diff --git a/fs/vfs/fs_sendfile.c b/fs/vfs/fs_sendfile.c
index c1a4703601b5aca495b53846f3e3abf5b95c65bc..c91435e11fb17507ffb765f6d6346a7a254bd7c7 100644
--- a/fs/vfs/fs_sendfile.c
+++ b/fs/vfs/fs_sendfile.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/vfs/fs_sendfile.c
  *
- *   Copyright (C) 2007, 2009, 2011, 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2009, 2011, 2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -103,7 +103,6 @@
 ssize_t sendfile(int outfd, int infd, off_t *offset, size_t count)
 {
 #if defined(CONFIG_NET_TCP) && CONFIG_NSOCKET_DESCRIPTORS > 0
-
   /* Check the destination file descriptor:  Is it a (probable) file
    * descriptor?  Check the source file:  Is it a normal file?
    */
@@ -117,7 +116,7 @@ ssize_t sendfile(int outfd, int infd, off_t *offset, size_t count)
        * structure.
        */
 
-      filep = fs_getfilep(fd);
+      filep = fs_getfilep(infd);
       if (!filep)
         {
           /* The errno value has already been set */
diff --git a/fs/vfs/fs_stat.c b/fs/vfs/fs_stat.c
index a96cf3be71921556d560b7cca88acd6c70b23eb7..a1c9786cd8a11b656afc25dcfb2ea63b591f55a0 100644
--- a/fs/vfs/fs_stat.c
+++ b/fs/vfs/fs_stat.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/vfs/fs_stat.c
  *
- *   Copyright (C) 2007-2009, 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,106 +40,149 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
 
 #include "inode/inode.h"
 
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_PSEUDOFS_SOFTLINKS
+/* Reset, preserving the number of symbolic links encountered so far */
+
+#  define RESET_BUF(b) \
+  { \
+    uint16_t save = (b)->st_count; \
+    memset((b), 0, sizeof(struct stat)); \
+    (b)->st_count = save; \
+  }
+#else
+/* Reset everything */
+
+#  define RESET_BUF(b) memset((b), 0, sizeof(struct stat));
+#endif
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static inline int statroot(FAR struct stat *buf);
+int stat_recursive(FAR const char *path, FAR struct stat *buf);
+
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: statpseudo
+ * Name: statroot
  ****************************************************************************/
 
-static inline int statpseudo(FAR struct inode *inode, FAR struct stat *buf)
+static inline int statroot(FAR struct stat *buf)
 {
-  /* Most of the stat entries just do not apply */
+  /* There is no inode associated with the fake root directory */
 
-  memset(buf, 0, sizeof(struct stat));
+  RESET_BUF(buf);
+  buf->st_mode = S_IFDIR | S_IROTH | S_IRGRP | S_IRUSR;
+  return OK;
+}
 
-  if (INODE_IS_SPECIAL(inode))
+/****************************************************************************
+ * Name: stat_recursive
+ *
+ * Returned Value:
+ *   Zero on success; -1 on failure with errno set:
+ *
+ *   EACCES  Search permission is denied for one of the directories in the
+ *           path prefix of path.
+ *   EFAULT  Bad address.
+ *   ENOENT  A component of the path path does not exist, or the path is an
+ *           empty string.
+ *   ENOMEM  Out of memory
+ *   ENOTDIR A component of the path is not a directory.
+ *
+ ****************************************************************************/
+
+int stat_recursive(FAR const char *path, FAR struct stat *buf)
+{
+  struct inode_search_s desc;
+  FAR struct inode *inode;
+  int ret;
+
+  /* Get an inode for this path */
+
+  SETUP_SEARCH(&desc, path, true);
+
+  ret = inode_find(&desc);
+  if (ret < 0)
     {
-#if defined(CONFIG_FS_NAMED_SEMAPHORES)
-      if (INODE_IS_NAMEDSEM(inode))
-        {
-          buf->st_mode = S_IFSEM;
-        }
-      else
-#endif
-#if !defined(CONFIG_DISABLE_MQUEUE)
-      if (INODE_IS_MQUEUE(inode))
-        {
-          buf->st_mode = S_IFMQ;
-        }
-      else
-#endif
-#if defined(CONFIG_FS_SHM)
-       if (INODE_IS_SHM(inode)) */
-        {
-          buf->st_mode | S_IFSHM;
-        }
-      else
-#endif
-       {
-       }
+      /* This name does not refer to an inode in the pseudo file system and
+       * there is no mountpoint that includes in this path.
+       */
+
+      ret = -ret;
+      goto errout_with_search;
     }
-  else if (inode->u.i_ops)
-    {
-      if (inode->u.i_ops->read)
-        {
-          buf->st_mode = S_IROTH | S_IRGRP | S_IRUSR;
-        }
 
-      if (inode->u.i_ops->write)
-        {
-          buf->st_mode |= S_IWOTH | S_IWGRP | S_IWUSR;
-        }
+  /* Get the search results */
 
-      if (INODE_IS_MOUNTPT(inode))
-        {
-          buf->st_mode |= S_IFDIR;
-        }
-      else if (INODE_IS_BLOCK(inode))
-        {
-          /* What is it also has child inodes? */
+  inode = desc.node;
+  DEBUGASSERT(inode != NULL);
 
-          buf->st_mode |= S_IFBLK;
-        }
-      else /* if (INODE_IS_DRIVER(inode)) */
+  /* The way we handle the stat depends on the type of inode that we
+   * are dealing with.
+   */
+
+#ifndef CONFIG_DISABLE_MOUNTPOINT
+  if (INODE_IS_MOUNTPT(inode))
+    {
+      /* The node is a file system mointpoint. Verify that the mountpoint
+       * supports the stat() method
+       */
+
+      if (inode->u.i_mops && inode->u.i_mops->stat)
         {
-          /* What is it if it also has child inodes? */
+          /* Perform the stat() operation */
 
-          buf->st_mode |= S_IFCHR;
+          ret = inode->u.i_mops->stat(inode, desc.relpath, buf);
         }
     }
   else
+#endif
     {
-      /* If it has no operations, then it must just be a intermediate
-       * node in the inode tree.  It is something like a directory.
-       * We'll say that all pseudo-directories are read-able but not
-       * write-able.
+      /* The node is part of the root pseudo file system.  This path may
+       * recurse if soft links are supported in the pseudo file system.
        */
 
-      buf->st_mode |= S_IFDIR | S_IROTH | S_IRGRP | S_IRUSR;
+      ret = inode_stat(inode, buf);
     }
 
-  return OK;
-}
+  /* Check if the stat operation was successful */
 
-/****************************************************************************
- * Name: statroot
- ****************************************************************************/
+  if (ret < 0)
+    {
+      ret = -ret;
+      goto errout_with_inode;
+    }
 
-static inline int statroot(FAR struct stat *buf)
-{
-  /* There is no inode associated with the fake root directory */
+  /* Successfully stat'ed the file */
 
-  memset(buf, 0, sizeof(struct stat));
-  buf->st_mode = S_IFDIR | S_IROTH | S_IRGRP | S_IRUSR;
+  inode_release(inode);
+  RELEASE_SEARCH(&desc);
   return OK;
+
+/* Failure conditions always set the errno appropriately */
+
+errout_with_inode:
+  inode_release(inode);
+
+errout_with_search:
+  RELEASE_SEARCH(&desc);
+  set_errno(ret);
+  return ERROR;
 }
 
 /****************************************************************************
@@ -164,19 +207,17 @@ static inline int statroot(FAR struct stat *buf)
 
 int stat(FAR const char *path, FAR struct stat *buf)
 {
-  FAR struct inode *inode;
-  const char       *relpath = NULL;
-  int               ret     = OK;
+  int ret;
 
   /* Sanity checks */
 
-  if (!path || !buf)
+  if (path == NULL  || buf == NULL)
     {
       ret = EFAULT;
       goto errout;
     }
 
-  if (!path[0])
+  if (*path == '\0')
     {
       ret = ENOENT;
       goto errout;
@@ -189,63 +230,168 @@ int stat(FAR const char *path, FAR struct stat *buf)
       return statroot(buf);
     }
 
-  /* Get an inode for this file */
+  /* The perform the stat() operation on the path.  This is potentially
+   * recursive if soft link support is enabled.
+   */
 
-  inode = inode_find(path, &relpath);
-  if (!inode)
-    {
-      /* This name does not refer to a psudeo-inode and there is no
-       * mountpoint that includes in this path.
-       */
+#ifdef CONFIG_PSEUDOFS_SOFTLINKS
+  buf->st_count = 0;
+#endif
+  return stat_recursive(path, buf);
 
-      ret = ENOENT;
-      goto errout;
-    }
+errout:
+  set_errno(ret);
+  return ERROR;
+}
 
-  /* The way we handle the stat depends on the type of inode that we
-   * are dealing with.
-   */
+/****************************************************************************
+ * Name: inode_stat
+ *
+ * Description:
+ *   The inode_stat() function will obtain information about an 'inode' in
+ *   the pseudo file system and will write it to the area pointed to by 'buf'.
+ *
+ *   The 'buf' argument is a pointer to a stat structure, as defined in
+ *   , into which information is placed concerning the file.
+ *
+ * Input Parameters:
+ *   inode - The indoe of interest
+ *   buf   - The caller provide location in which to return information about
+ *           the inode.
+ *
+ * Returned Value:
+ *   Zero (OK) returned on success.  Otherwise, a negated errno value is
+ *   returned to indicate the nature of the failure.
+ *
+ ****************************************************************************/
 
-#ifndef CONFIG_DISABLE_MOUNTPOINT
-  if (INODE_IS_MOUNTPT(inode))
+int inode_stat(FAR struct inode *inode, FAR struct stat *buf)
+{
+  DEBUGASSERT(inode != NULL && buf != NULL);
+
+  /* Most of the stat entries just do not apply */
+
+  RESET_BUF(buf);
+
+  if (INODE_IS_SPECIAL(inode))
     {
-      /* The node is a file system mointpoint. Verify that the mountpoint
-       * supports the stat() method
+#if defined(CONFIG_FS_NAMED_SEMAPHORES)
+      if (INODE_IS_NAMEDSEM(inode))
+        {
+          buf->st_mode = S_IFSEM;
+        }
+      else
+#endif
+#if !defined(CONFIG_DISABLE_MQUEUE)
+      if (INODE_IS_MQUEUE(inode))
+        {
+          buf->st_mode = S_IFMQ;
+        }
+      else
+#endif
+#if defined(CONFIG_FS_SHM)
+       if (INODE_IS_SHM(inode)) */
+        {
+          buf->st_mode = S_IFSHM;
+        }
+      else
+#endif
+#ifdef CONFIG_PSEUDOFS_SOFTLINKS
+      /* Handle softlinks differently.  Just call stat() recursively on the
+       * target of the softlink.
+       *
+       * REVISIT: This has the possibility of an infinite loop!
        */
 
-      if (inode->u.i_mops && inode->u.i_mops->stat)
+      if (INODE_IS_SOFTLINK(inode))
         {
-          /* Perform the stat() operation */
+          int ret;
+
+          /* Increment the link counter.  This is necesssary to avoid
+           * infinite recursion if loops are encountered in the traversal.
+           * If we encounter more SYMLOOP_MAX symbolic links at any time
+           * during the travrsal, error out.
+           *
+           * NOTE: That inode_search() will automatically skip over
+           * consecutive, intermediate symbolic links.  Those numbers will
+           * not be included in the total.
+           */
+
+          if (++buf->st_count > SYMLOOP_MAX)
+            {
+              return -ELOOP;
+            }
 
-          ret = inode->u.i_mops->stat(inode, relpath, buf);
+          DEBUGASSERT(buf->st_count > 0);  /* Check for unsigned integer overflow */
+
+          /* stat() the target of the soft link. */
+
+          ret = stat_recursive((FAR const char *)inode->u.i_link, buf);
+
+          /* If stat() fails, then there is a problem with the target of the
+           * symbolic link, but not with the symbolic link itself.  We should
+           * still report success, just with less information.
+           */
+
+          if (ret < 0)
+            {
+              RESET_BUF(buf);
+            }
+
+          /* Make sure that the caller knows that this really a symbolic link. */
+
+          buf->st_mode |= S_IFLNK;
         }
-    }
-  else
+      else
 #endif
+       {
+       }
+    }
+  else if (inode->u.i_ops != NULL)
     {
-      /* The node is part of the root pseudo file system */
+      /* Determine read/write privileges based on the existence of read
+       * and write methods.
+       */
 
-      ret = statpseudo(inode, buf);
-    }
+      if (inode->u.i_ops->read)
+        {
+          buf->st_mode = S_IROTH | S_IRGRP | S_IRUSR;
+        }
 
-  /* Check if the stat operation was successful */
+      if (inode->u.i_ops->write)
+        {
+          buf->st_mode |= S_IWOTH | S_IWGRP | S_IWUSR;
+        }
 
-  if (ret < 0)
-    {
-      ret = -ret;
-      goto errout_with_inode;
-    }
+      /* Determine the type of the inode */
 
-  /* Successfully stat'ed the file */
+      if (INODE_IS_MOUNTPT(inode))
+        {
+          buf->st_mode |= S_IFDIR;
+        }
+      else if (INODE_IS_BLOCK(inode))
+        {
+          /* What is if also has child inodes? */
 
-  inode_release(inode);
-  return OK;
+          buf->st_mode |= S_IFBLK;
+        }
+      else /* if (INODE_IS_DRIVER(inode)) */
+        {
+          /* What is it if it also has child inodes? */
 
-/* Failure conditions always set the errno appropriately */
+          buf->st_mode |= S_IFCHR;
+        }
+    }
+  else
+    {
+      /* If it has no operations, then it must just be a intermediate
+       * node in the inode tree.  It is something like a directory.
+       * We'll say that all pseudo-directories are read-able but not
+       * write-able.
+       */
 
-errout_with_inode:
-  inode_release(inode);
-errout:
-  set_errno(ret);
-  return ERROR;
+      buf->st_mode |= S_IFDIR | S_IROTH | S_IRGRP | S_IRUSR;
+    }
+
+  return OK;
 }
diff --git a/fs/vfs/fs_statfs.c b/fs/vfs/fs_statfs.c
index a70e970dc2c15cff030aa99b6894dee66a1e0292..0f33c10aba34aec39e42356cf625ee6806d1cee1 100644
--- a/fs/vfs/fs_statfs.c
+++ b/fs/vfs/fs_statfs.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/vfs/fs_statfs.c
  *
- *   Copyright (C) 2007-2009, 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -55,7 +55,7 @@
  * Name: statpseudo
  ****************************************************************************/
 
-static inline int statpseudofs(FAR struct inode *inode, FAR struct statfs *buf)
+static int statpseudofs(FAR struct inode *inode, FAR struct statfs *buf)
 {
   memset(buf, 0, sizeof(struct statfs));
   buf->f_type    = PROC_SUPER_MAGIC;
@@ -68,7 +68,7 @@ static inline int statpseudofs(FAR struct inode *inode, FAR struct statfs *buf)
  ****************************************************************************/
 
 /****************************************************************************
- * Name: stat
+ * Name: statfs
  *
  * Return: Zero on success; -1 on failure with errno set:
  *
@@ -85,37 +85,51 @@ static inline int statpseudofs(FAR struct inode *inode, FAR struct statfs *buf)
 
 int statfs(FAR const char *path, FAR struct statfs *buf)
 {
+  struct inode_search_s desc;
   FAR struct inode *inode;
-  FAR const char   *relpath = NULL;
-  int               ret     = OK;
+  int ret = OK;
 
   /* Sanity checks */
 
-  if (!path || !buf)
+  if (path == NULL  || buf == NULL)
     {
       ret = EFAULT;
       goto errout;
     }
 
-  if (!path[0])
+  if (*path == '\0')
     {
       ret = ENOENT;
       goto errout;
     }
 
+  /* Check for the fake root directory (which has no inode) */
+
+  if (strcmp(path, "/") == 0)
+    {
+      return statpseudofs(NULL, buf);
+    }
+
   /* Get an inode for this file */
 
-  inode = inode_find(path, &relpath);
-  if (!inode)
+  SETUP_SEARCH(&desc, path, false);
+
+  ret = inode_find(&desc);
+  if (ret < 0)
     {
       /* This name does not refer to a psudeo-inode and there is no
        * mountpoint that includes in this path.
        */
 
-      ret = ENOENT;
-      goto errout;
+      ret = -ret;
+      goto errout_with_search;
     }
 
+  /* Get the search results */
+
+  inode = desc.node;
+  DEBUGASSERT(inode != NULL);
+
   /* The way we handle the statfs depends on the type of inode that we
    * are dealing with.
    */
@@ -153,12 +167,17 @@ int statfs(FAR const char *path, FAR struct statfs *buf)
   /* Successfully statfs'ed the file */
 
   inode_release(inode);
+  RELEASE_SEARCH(&desc);
   return OK;
 
 /* Failure conditions always set the errno appropriately */
 
 errout_with_inode:
   inode_release(inode);
+
+errout_with_search:
+  RELEASE_SEARCH(&desc);
+
 errout:
   set_errno(ret);
   return ERROR;
diff --git a/fs/vfs/fs_unlink.c b/fs/vfs/fs_unlink.c
index 9de8ea2f2f78bd24ec96ee6850a10ada21ccd025..c5f958de57c2000404c417a8dbe4afa02a5e9daf 100644
--- a/fs/vfs/fs_unlink.c
+++ b/fs/vfs/fs_unlink.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/vfs/fs_unlink.c
  *
- *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,8 +39,11 @@
 
 #include 
 
+#include 
 #include 
+#include 
 #include 
+
 #include 
 
 #include "inode/inode.h"
@@ -80,22 +83,31 @@
 
 int unlink(FAR const char *pathname)
 {
+  struct inode_search_s desc;
   FAR struct inode *inode;
-  const char       *relpath = NULL;
-  int               errcode;
-  int               ret;
+  int errcode;
+  int ret;
+
+  /* Get an inode for this file (without deference the final node in the path
+   * which may be a symbolic link)
+   */
 
-  /* Get an inode for this file */
+  SETUP_SEARCH(&desc, pathname, true);
 
-  inode = inode_find(pathname, &relpath);
-  if (!inode)
+  ret = inode_find(&desc);
+  if (ret < 0)
     {
       /* There is no inode that includes in this path */
 
-      errcode = ENOENT;
-      goto errout;
+      errcode = -ret;
+      goto errout_with_search;
     }
 
+  /* Get the search results */
+
+  inode = desc.node;
+  DEBUGASSERT(inode != NULL);
+
 #ifndef CONFIG_DISABLE_MOUNTPOINT
   /* Check if the inode is a valid mountpoint. */
 
@@ -107,7 +119,7 @@ int unlink(FAR const char *pathname)
 
       if (inode->u.i_mops->unlink)
         {
-          ret = inode->u.i_mops->unlink(inode, relpath);
+          ret = inode->u.i_mops->unlink(inode, desc.relpath);
           if (ret < 0)
             {
               errcode = -ret;
@@ -124,17 +136,23 @@ int unlink(FAR const char *pathname)
 #endif
 
 #ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
-  /* If this is a "dangling" pseudo-file node (i.e., it has operations) then rm
-   * should remove the node.
+  /* If this is a "dangling" pseudo-file node (i.e., it has no operations)
+   * or a soft link, then rm should remove the node.
    */
 
-  if (!INODE_IS_SPECIAL(inode) && inode->u.i_ops)
+#ifdef CONFIG_PSEUDOFS_SOFTLINKS
+  /* A soft link is the only "specal" file that we can remove via unlink(). */
+
+  if (!INODE_IS_SPECIAL(inode) || INODE_IS_SOFTLINK(inode))
+#else
+  if (!INODE_IS_SPECIAL(inode))
+#endif
     {
       /* If this is a pseudo-file node (i.e., it has no operations)
-       * then rmdir should remove the node.
+       * then unlink should remove the node.
        */
 
-      if (inode->u.i_ops)
+      if (inode->u.i_ops != NULL)
         {
           inode_semtake();
 
@@ -211,11 +229,14 @@ int unlink(FAR const char *pathname)
   /* Successfully unlinked */
 
   inode_release(inode);
+  RELEASE_SEARCH(&desc);
   return OK;
 
 errout_with_inode:
   inode_release(inode);
-errout:
+
+errout_with_search:
+  RELEASE_SEARCH(&desc);
   set_errno(errcode);
   return ERROR;
 }
diff --git a/fs/vfs/fs_write.c b/fs/vfs/fs_write.c
index b7f71a226567f862e408ea85ed9a31655cb2fabb..4731f26bb102ea45f28031491e10392515aebb09 100644
--- a/fs/vfs/fs_write.c
+++ b/fs/vfs/fs_write.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * fs/vfs/fs_write.c
  *
- *   Copyright (C) 2007-2009, 2012-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2012-2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -38,6 +38,7 @@
  ****************************************************************************/
 
 #include 
+
 #include 
 #include 
 #include 
@@ -49,11 +50,9 @@
 # include 
 #endif
 
-#include "inode/inode.h"
+#include 
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
+#include "inode/inode.h"
 
 /****************************************************************************
  * Public Functions
@@ -72,14 +71,14 @@
 ssize_t file_write(FAR struct file *filep, FAR const void *buf, size_t nbytes)
 {
   FAR struct inode *inode;
-  int ret;
-  int err;
+  ssize_t ret;
+  int errcode;
 
   /* Was this file opened for write access? */
 
   if ((filep->f_oflags & O_WROK) == 0)
     {
-      err = EBADF;
+      errcode = EBADF;
       goto errout;
     }
 
@@ -88,7 +87,7 @@ ssize_t file_write(FAR struct file *filep, FAR const void *buf, size_t nbytes)
   inode = filep->f_inode;
   if (!inode || !inode->u.i_ops || !inode->u.i_ops->write)
     {
-      err = EBADF;
+      errcode = EBADF;
       goto errout;
     }
 
@@ -97,14 +96,14 @@ ssize_t file_write(FAR struct file *filep, FAR const void *buf, size_t nbytes)
   ret = inode->u.i_ops->write(filep, buf, nbytes);
   if (ret < 0)
     {
-      err = -ret;
+      errcode = -ret;
       goto errout;
     }
 
   return ret;
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 }
 
@@ -163,6 +162,11 @@ ssize_t write(int fd, FAR const void *buf, size_t nbytes)
 #if CONFIG_NFILE_DESCRIPTORS > 0
   FAR struct file *filep;
 #endif
+  ssize_t ret;
+
+  /* write() is a cancellation point */
+
+  (void)enter_cancellation_point();
 
   /* Did we get a valid file descriptor? */
 
@@ -170,31 +174,44 @@ ssize_t write(int fd, FAR const void *buf, size_t nbytes)
   if ((unsigned int)fd >= CONFIG_NFILE_DESCRIPTORS)
 #endif
     {
-      /* Write to a socket descriptor is equivalent to send with flags == 0 */
-
 #if defined(CONFIG_NET_TCP) && CONFIG_NSOCKET_DESCRIPTORS > 0
-      return send(fd, buf, nbytes, 0);
+      /* Write to a socket descriptor is equivalent to send with flags == 0.
+       * Note that send() will set the errno on failure.
+       */
+
+      ret = send(fd, buf, nbytes, 0);
 #else
       set_errno(EBADF);
-      return ERROR;
+      ret = ERROR ERROR;
 #endif
     }
 
 #if CONFIG_NFILE_DESCRIPTORS > 0
-  /* The descriptor is in the right range to be a file descriptor... write
-   * to the file.
-   */
-
-  filep = fs_getfilep(fd);
-  if (!filep)
+  else
     {
-      /* The errno value has already been set */
-
-      return ERROR;
+      /* The descriptor is in the right range to be a file descriptor..
+       * write to the file.  Note that fs_getfilep() will set the errno on
+       * failure.
+       */
+
+      filep = fs_getfilep(fd);
+      if (filep == NULL)
+        {
+          /* The errno value has already been set */
+
+          ret = ERROR;
+        }
+      else
+        {
+          /* Perform the write operation using the file descriptor as an
+           * index.  Note that file_write() will set the errno on failure.
+           */
+
+          ret = file_write(filep, buf, nbytes);
+        }
     }
-
-  /* Perform the write operation using the file descriptor as an index */
-
-  return file_write(filep, buf, nbytes);
 #endif
+
+  leave_cancellation_point();
+  return ret;
 }
diff --git a/graphics/Kconfig b/graphics/Kconfig
index 02e020522993630cc63de2b1ea98cedf8695e410..4347326f84613c904b469f8bc2b023f6bfb564e3 100644
--- a/graphics/Kconfig
+++ b/graphics/Kconfig
@@ -555,6 +555,13 @@ config NXFONT_X11_MISC_FIXED_10X20
 		This option enables support for a "x11-misc-fixed-10x20".
 		(font ID FONTID_X11_MISC_FIXED_10X20 == 42).
 
+config NXFONT_TOM_THUMB_4X6
+	bool "Tom Thumb Monospace 4x6"
+	default n
+	---help---
+		This option enables support for a small, 3x5 font (with blank space
+		padding to 4x6) (font ID FONTID_TOM_THUMB_4X6 == 43).
+
 endmenu
 
 menuconfig NXTERM
@@ -691,16 +698,6 @@ config NX_MXCLIENTMSGS
 		flooding of the client or server with too many messages (PREALLOC_MQ_MSGS
 		controls how many messages are pre-allocated).
 
-config NX_NXSTART
-	bool "nx_start()"
-	default n
-	---help---
-		If this option is selected, then the nx_start() interface will be
-		built.  The nx_start() interface provides a single call to initialize
-		and start the NX server.
-
-if NX_NXSTART
-
 config NXSTART_EXTERNINIT
 	bool "External display Initialization"
 	default n
@@ -736,6 +733,14 @@ config NXSTART_DEVNO
 		LCD device number (in case there are more than one LCDs connected).
 		Default: 0
 
+config NXSTART_DISPLAYNO
+	int "Display Number"
+	default 0
+	depends on !NX_LCDDRIVER && !NXSTART_EXTERNINIT
+	---help---
+		Framebuffer display number (in case there are more than one framebuffers).
+		Default: 0
+
 config NXSTART_VPLANE
 	int "Plane Number"
 	default 0
@@ -743,7 +748,6 @@ config NXSTART_VPLANE
 	---help---
 		Only a single video plane is supported. Default: 0
 
-endif # NX_NXSTART
 endif # NX_MULTIUSER
 
 source "graphics/vnc/Kconfig"
diff --git a/graphics/nxbe/nxbe_bitmap.c b/graphics/nxbe/nxbe_bitmap.c
index c4d29681a24e7b23c1b836144c10516a700c22d8..61a380ca1046336899448a138b0305e6435c2acc 100644
--- a/graphics/nxbe/nxbe_bitmap.c
+++ b/graphics/nxbe/nxbe_bitmap.c
@@ -125,7 +125,7 @@ void nxbe_bitmap(FAR struct nxbe_window_s *wnd, FAR const struct nxgl_rect_s *de
   unsigned int deststride;
   int i;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd || !dest || !src || !origin)
     {
       return;
@@ -138,7 +138,7 @@ void nxbe_bitmap(FAR struct nxbe_window_s *wnd, FAR const struct nxgl_rect_s *de
 
   if (dest->pt1.x < origin->x || dest->pt1.y < origin->y)
     {
-      gdbg("Bad dest start position\n");
+      gerr("ERROR: Bad dest start position\n");
       return;
     }
 
@@ -149,7 +149,7 @@ void nxbe_bitmap(FAR struct nxbe_window_s *wnd, FAR const struct nxgl_rect_s *de
   deststride = (((dest->pt2.x - origin->x + 1) * wnd->be->plane[0].pinfo.bpp + 7) >> 3);
   if (deststride > stride)
     {
-      gdbg("Bad dest width\n");
+      gerr("ERROR: Bad dest width\n");
       return;
     }
 
diff --git a/graphics/nxbe/nxbe_clipper.c b/graphics/nxbe/nxbe_clipper.c
index 0ded5b5c70bdaa370450006afab3c8e3817b6665..e73ba6c8530c9ba6140f191915b4665b92e00908 100644
--- a/graphics/nxbe/nxbe_clipper.c
+++ b/graphics/nxbe/nxbe_clipper.c
@@ -115,7 +115,7 @@ static inline void nxbe_pushrectangle(FAR struct nxbe_clipstack_s *stack,
                              sizeof(struct nxbe_cliprect_s) * mxrects);
       if (!newstack)
         {
-          gdbg("Failed to reallocate stack\n");
+          gerr("ERROR: Failed to reallocate stack\n");
           return;
         }
 
diff --git a/graphics/nxbe/nxbe_closewindow.c b/graphics/nxbe/nxbe_closewindow.c
index 04f5b9b23d42b1ed9d6ded920d8baccf6c8b3972..44520da22c182b4fc43985057b5ee6ca4fa316d5 100644
--- a/graphics/nxbe/nxbe_closewindow.c
+++ b/graphics/nxbe/nxbe_closewindow.c
@@ -70,7 +70,7 @@ void nxbe_closewindow(struct nxbe_window_s *wnd)
 {
   FAR struct nxbe_state_s *be;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd)
     {
       return;
diff --git a/graphics/nxbe/nxbe_configure.c b/graphics/nxbe/nxbe_configure.c
index 5dc9b49c19c5751eac993ad1e9d987d53fdff60f..891d2e15c5c2d9946f33bc61299f9ac3e2ad6fcb 100644
--- a/graphics/nxbe/nxbe_configure.c
+++ b/graphics/nxbe/nxbe_configure.c
@@ -89,7 +89,7 @@ int nxbe_configure(FAR NX_DRIVERTYPE *dev, FAR struct nxbe_state_s *be)
   ret = dev->getvideoinfo(dev, &be->vinfo);
   if (ret < 0)
     {
-      gdbg("Failed to get vinfo\n");
+      gerr("ERROR: Failed to get vinfo\n");
       return ret;
     }
 
@@ -99,16 +99,16 @@ int nxbe_configure(FAR NX_DRIVERTYPE *dev, FAR struct nxbe_state_s *be)
 
   /* Check the number of color planes */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (be->vinfo.nplanes > CONFIG_NX_NPLANES)
     {
-      gdbg("NX configured for only %d planes, controller wants %d\n",
+      gerr("ERROR: NX configured for only %d planes, controller wants %d\n",
            CONFIG_NX_NPLANES, be->vinfo.nplanes);
       return -E2BIG;
     }
   else if (be->vinfo.nplanes < CONFIG_NX_NPLANES)
     {
-      gdbg("NX configured for %d planes, controller only needs %d\n",
+      gwarn("WARNING: NX configured for %d planes, controller only needs %d\n",
            CONFIG_NX_NPLANES, be->vinfo.nplanes);
     }
 #endif
@@ -120,7 +120,7 @@ int nxbe_configure(FAR NX_DRIVERTYPE *dev, FAR struct nxbe_state_s *be)
       ret = dev->getplaneinfo(dev, i, &be->plane[i].pinfo);
       if (ret < 0)
         {
-          gdbg("Failed to get pinfo[%d]\n", i);
+          gerr("ERROR: Failed to get pinfo[%d]\n", i);
           return ret;
         }
 
@@ -216,7 +216,7 @@ int nxbe_configure(FAR NX_DRIVERTYPE *dev, FAR struct nxbe_state_s *be)
       else
 #endif
         {
-          gdbg("Unsupported pinfo[%d] BPP: %d\n", i, be->plane[i].pinfo.bpp);
+          gerr("ERROR: Unsupported pinfo[%d] BPP: %d\n", i, be->plane[i].pinfo.bpp);
           return -ENOSYS;
         }
     }
diff --git a/graphics/nxbe/nxbe_fill.c b/graphics/nxbe/nxbe_fill.c
index c87992052e182773cc2b4b9279ab46e79cd61682..671a3e7ab9617e3941df6f9e5d1bdef534891c8b 100644
--- a/graphics/nxbe/nxbe_fill.c
+++ b/graphics/nxbe/nxbe_fill.c
@@ -112,7 +112,7 @@ void nxbe_fill(FAR struct nxbe_window_s *wnd,
   struct nxgl_rect_s remaining;
   int i;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd || !rect)
     {
       return;
diff --git a/graphics/nxbe/nxbe_filltrapezoid.c b/graphics/nxbe/nxbe_filltrapezoid.c
index cf3b3096a3c4912168403753f781a27f01aafdb1..1936a6c4d6297d943f35b50dfb9a895f4a07927d 100644
--- a/graphics/nxbe/nxbe_filltrapezoid.c
+++ b/graphics/nxbe/nxbe_filltrapezoid.c
@@ -137,7 +137,7 @@ void nxbe_filltrapezoid(FAR struct nxbe_window_s *wnd,
   struct nxgl_rect_s remaining;
   int i;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd || !trap)
     {
       return;
diff --git a/graphics/nxbe/nxbe_getrectangle.c b/graphics/nxbe/nxbe_getrectangle.c
index b4d871bc80c10bb0b6e9dac53bedbe225c5e9af8..2e707a816cd16cffc3d50e0d68265952065eb209 100644
--- a/graphics/nxbe/nxbe_getrectangle.c
+++ b/graphics/nxbe/nxbe_getrectangle.c
@@ -87,10 +87,10 @@ void nxbe_getrectangle(FAR struct nxbe_window_s *wnd,
 {
   struct nxgl_rect_s remaining;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd || !rect || !dest || plane >= wnd->be->vinfo.nplanes)
     {
-      gvdbg("Invalid parameters\n");
+      ginfo("Invalid parameters\n");
       return;
     }
 #endif
diff --git a/graphics/nxbe/nxbe_move.c b/graphics/nxbe/nxbe_move.c
index 9bf56fd1e9c8b9b447effc815f627b81da18058b..e2eee9f01bbf3ffcb2d779a724cfddf01a1fb1cd 100644
--- a/graphics/nxbe/nxbe_move.c
+++ b/graphics/nxbe/nxbe_move.c
@@ -208,7 +208,7 @@ void nxbe_move(FAR struct nxbe_window_s *wnd, FAR const struct nxgl_rect_s *rect
   struct nxbe_move_s info;
   int i;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd || !rect)
     {
       return;
diff --git a/graphics/nxbe/nxbe_setpixel.c b/graphics/nxbe/nxbe_setpixel.c
index 81627f0608d2807fb522306b35641d34e70b091e..0b61897381a0376d05faba6e445f75da1e483a5e 100644
--- a/graphics/nxbe/nxbe_setpixel.c
+++ b/graphics/nxbe/nxbe_setpixel.c
@@ -112,7 +112,7 @@ void nxbe_setpixel(FAR struct nxbe_window_s *wnd,
   struct nxgl_rect_s rect;
   int i;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd || !pos)
     {
       return;
diff --git a/graphics/nxbe/nxbe_setposition.c b/graphics/nxbe/nxbe_setposition.c
index 5647270e548fc3d4e6a676391078e5dae88c384d..a40a01ebe7936b1cd19981be745c9a28be36188a 100644
--- a/graphics/nxbe/nxbe_setposition.c
+++ b/graphics/nxbe/nxbe_setposition.c
@@ -63,7 +63,7 @@ void nxbe_setposition(FAR struct nxbe_window_s *wnd,
   struct nxgl_rect_s before;
   struct nxgl_rect_s rect;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd)
     {
       return;
diff --git a/graphics/nxbe/nxbe_setsize.c b/graphics/nxbe/nxbe_setsize.c
index b542c0a8e87488d3b5cf20f3f76b120003c934ff..3b522d38a4019ad54d5c8435b803f6717feb9f9b 100644
--- a/graphics/nxbe/nxbe_setsize.c
+++ b/graphics/nxbe/nxbe_setsize.c
@@ -62,7 +62,7 @@ void nxbe_setsize(FAR struct nxbe_window_s *wnd,
 {
   struct nxgl_rect_s bounds;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd)
     {
       return;
diff --git a/graphics/nxglib/fb/nxglib_copyrectangle.c b/graphics/nxglib/fb/nxglib_copyrectangle.c
index ea0d1ad2e7e43458e983efb369a07abdce0ae144..e2d61aedfa9ff67cdc48baa9435df972c681de53 100644
--- a/graphics/nxglib/fb/nxglib_copyrectangle.c
+++ b/graphics/nxglib/fb/nxglib_copyrectangle.c
@@ -46,26 +46,6 @@
 
 #include "nxglib_bitblit.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/graphics/nxglib/fb/nxglib_fillrectangle.c b/graphics/nxglib/fb/nxglib_fillrectangle.c
index baaad84697ba5696360d3490ee14d216a5faa15c..4fec88b60b41d3755a5c22de074ec667dda49f09 100644
--- a/graphics/nxglib/fb/nxglib_fillrectangle.c
+++ b/graphics/nxglib/fb/nxglib_fillrectangle.c
@@ -54,22 +54,6 @@
 #  error "NXGLIB_SUFFIX must be defined before including this header file"
 #endif
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/graphics/nxglib/fb/nxglib_getrectangle.c b/graphics/nxglib/fb/nxglib_getrectangle.c
index 39386b4cbd74946244f5cd8ebddfed6cb92c9594..280affae1a26b0f9a393f224f846e52cb2853b54 100644
--- a/graphics/nxglib/fb/nxglib_getrectangle.c
+++ b/graphics/nxglib/fb/nxglib_getrectangle.c
@@ -46,22 +46,6 @@
 
 #include "nxglib_bitblit.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
diff --git a/graphics/nxglib/fb/nxglib_moverectangle.c b/graphics/nxglib/fb/nxglib_moverectangle.c
index e94f32c15be9b282657322213c263a2603c788e1..a24fc9f6f3291c52a706d46b9a39bd49bf021f29 100644
--- a/graphics/nxglib/fb/nxglib_moverectangle.c
+++ b/graphics/nxglib/fb/nxglib_moverectangle.c
@@ -46,22 +46,6 @@
 
 #include "nxglib_bitblit.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
diff --git a/graphics/nxglib/fb/nxglib_setpixel.c b/graphics/nxglib/fb/nxglib_setpixel.c
index c1c764f716f6e04e90f46634a1b342e01ab1d5b3..0cde90ff1ab9d41e1bdf8919f5ef9f3c5684d24c 100644
--- a/graphics/nxglib/fb/nxglib_setpixel.c
+++ b/graphics/nxglib/fb/nxglib_setpixel.c
@@ -54,22 +54,6 @@
 #  error "NXGLIB_SUFFIX must be defined before including this header file"
 #endif
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/graphics/nxglib/lcd/nxglib_copyrectangle.c b/graphics/nxglib/lcd/nxglib_copyrectangle.c
index 0c5e266c6202b64541244eb0f707f35c9e5cd66f..a1fc20e8706b44134bcac5c5b25c776d70bfda18 100644
--- a/graphics/nxglib/lcd/nxglib_copyrectangle.c
+++ b/graphics/nxglib/lcd/nxglib_copyrectangle.c
@@ -48,26 +48,6 @@
 #include "nxglib_bitblit.h"
 #include "nxglib_copyrun.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/graphics/nxglib/lcd/nxglib_fillrectangle.c b/graphics/nxglib/lcd/nxglib_fillrectangle.c
index 6bc9a04fcb177cb8817840e7d708d2500082c276..e3c263bff2609386a348178e434914cefdda76fc 100644
--- a/graphics/nxglib/lcd/nxglib_fillrectangle.c
+++ b/graphics/nxglib/lcd/nxglib_fillrectangle.c
@@ -56,22 +56,6 @@
 #  error "NXGLIB_SUFFIX must be defined before including this header file"
 #endif
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/graphics/nxglib/lcd/nxglib_filltrapezoid.c b/graphics/nxglib/lcd/nxglib_filltrapezoid.c
index c88cae9542d87fab7822177b7c3a87b002897748..5960384ab104a21f2f65523889d55412e04a77b7 100644
--- a/graphics/nxglib/lcd/nxglib_filltrapezoid.c
+++ b/graphics/nxglib/lcd/nxglib_filltrapezoid.c
@@ -56,22 +56,6 @@
 #  error "NXGLIB_SUFFIX must be defined before including this header file"
 #endif
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/graphics/nxglib/lcd/nxglib_getrectangle.c b/graphics/nxglib/lcd/nxglib_getrectangle.c
index 1d6ecb5e60b6b72abc3ec4b5ea9cb9d7ae73c735..adf6a90047c993e028f1982f7c12716293e1196a 100644
--- a/graphics/nxglib/lcd/nxglib_getrectangle.c
+++ b/graphics/nxglib/lcd/nxglib_getrectangle.c
@@ -46,26 +46,6 @@
 
 #include "nxglib_bitblit.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/graphics/nxglib/lcd/nxglib_moverectangle.c b/graphics/nxglib/lcd/nxglib_moverectangle.c
index 02a84df098e43499b92b3d77eb55d04ba352590e..85b388963aea78e3d95cdb5ab088e5ce5549f7d2 100644
--- a/graphics/nxglib/lcd/nxglib_moverectangle.c
+++ b/graphics/nxglib/lcd/nxglib_moverectangle.c
@@ -46,26 +46,6 @@
 
 #include "nxglib_bitblit.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/graphics/nxglib/lcd/nxglib_setpixel.c b/graphics/nxglib/lcd/nxglib_setpixel.c
index 2af2c77a14ce7d58bd8769e465af0725b6189d0b..cb57d048ab4badf97948483608390c642457c95a 100644
--- a/graphics/nxglib/lcd/nxglib_setpixel.c
+++ b/graphics/nxglib/lcd/nxglib_setpixel.c
@@ -55,22 +55,6 @@
 #  error "NXGLIB_SUFFIX must be defined before including this header file"
 #endif
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/graphics/nxmu/Make.defs b/graphics/nxmu/Make.defs
index 61016426c4d330fe3c25fa58822fa45e3139e251..9c486dd87ed6b9f8077f80a4081cb285a0185701 100644
--- a/graphics/nxmu/Make.defs
+++ b/graphics/nxmu/Make.defs
@@ -38,10 +38,7 @@ ifeq ($(CONFIG_NX_MULTIUSER),y)
 CSRCS += nxmu_kbdin.c nxmu_mouse.c nxmu_openwindow.c nxmu_redrawreq.c
 CSRCS += nxmu_releasebkgd.c nxmu_requestbkgd.c nxmu_reportposition.c
 CSRCS += nxmu_sendclient.c nxmu_sendclientwindow.c nxmu_server.c
-
-ifeq ($(CONFIG_NX_NXSTART),y)
 CSRCS += nx_start.c
-endif
 
 DEPPATH += --dep-path nxmu
 CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)/graphics/nxmu}
diff --git a/graphics/nxmu/nx_start.c b/graphics/nxmu/nx_start.c
index 814dc5a70cfaf44231607398fdbca5da5b3a1639..a262b28a91a3868eeb4349363b829f57d99478c7 100644
--- a/graphics/nxmu/nx_start.c
+++ b/graphics/nxmu/nx_start.c
@@ -39,6 +39,7 @@
 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -51,7 +52,11 @@
 
 #include "nxfe.h"
 
-#ifdef CONFIG_NX_NXSTART
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static bool g_nxserver_started;
 
 /****************************************************************************
  * Private Functions
@@ -84,7 +89,7 @@ int nx_server(int argc, char *argv[])
   dev = board_graphics_setup(CONFIG_NXSTART_DEVNO);
   if (!dev)
     {
-      gdbg("ERROR: board_graphics_setup failed, devno=%d\n", CONFIG_NXSTART_DEVNO);
+      gerr("ERROR: board_graphics_setup failed, devno=%d\n", CONFIG_NXSTART_DEVNO);
       return EXIT_FAILURE;
     }
 
@@ -94,7 +99,7 @@ int nx_server(int argc, char *argv[])
   ret = board_lcd_initialize();
   if (ret < 0)
     {
-      gdbg("ERROR: board_lcd_initialize failed: %d\n", ret);
+      gerr("ERROR: board_lcd_initialize failed: %d\n", ret);
       return EXIT_FAILURE;
     }
 
@@ -103,7 +108,7 @@ int nx_server(int argc, char *argv[])
   dev = board_lcd_getdev(CONFIG_NXSTART_DEVNO);
   if (!dev)
     {
-      gdbg("ERROR: board_lcd_getdev failed, devno=%d\n", CONFIG_NXSTART_DEVNO);
+      gerr("ERROR: board_lcd_getdev failed, devno=%d\n", CONFIG_NXSTART_DEVNO);
       return EXIT_FAILURE;
     }
 
@@ -116,17 +121,17 @@ int nx_server(int argc, char *argv[])
    * REVISIT: display == 0 is assumed.
    */
 
-  ret = up_fbinitialize(0);
+  ret = up_fbinitialize(CONFIG_NXSTART_DISPLAYNO);
   if (ret < 0)
     {
-      gdbg("ERROR: up_fbinitialize failed: %d\n", ret);
+      gerr("ERROR: up_fbinitialize failed: %d\n", ret);
       return EXIT_FAILURE;
     }
 
-  dev = up_fbgetvplane(0, CONFIG_NXSTART_VPLANE);
+  dev = up_fbgetvplane(CONFIG_NXSTART_DISPLAYNO, CONFIG_NXSTART_VPLANE);
   if (!dev)
     {
-      gdbg("ERROR: up_fbgetvplane failed, vplane=%d\n", CONFIG_NXSTART_VPLANE);
+      gerr("ERROR: up_fbgetvplane failed, vplane=%d\n", CONFIG_NXSTART_VPLANE);
       return EXIT_FAILURE;
     }
 
@@ -135,7 +140,7 @@ int nx_server(int argc, char *argv[])
   /* Then start the server (nx_run does not normally return) */
 
   ret = nx_run(dev);
-  gvdbg("nx_run returned: %d\n", ret);
+  ginfo("nx_run returned: %d\n", ret);
   return EXIT_FAILURE;
 }
 
@@ -155,6 +160,9 @@ int nx_server(int argc, char *argv[])
  *   work in the NuttX kernel build because the resources required by the
  *   NX server are private to the kernel mode logic.
  *
+ *   nx_start() can be called (indirectly) from applications via the
+ *   boardctl() interface with the BOARDIOC_NX_START command.
+ *
  * Input Parameters:
  *   None
  *
@@ -170,28 +178,34 @@ int nx_server(int argc, char *argv[])
 
 int nx_start(void)
 {
-  pid_t server;
+  /* Do nothing is the server has already been started */
 
-  /* Start the server kernel thread */
-
-  gvdbg("Starting server task\n");
-  server = kernel_thread("NX Server", CONFIG_NXSTART_SERVERPRIO,
-                         CONFIG_NXSTART_SERVERSTACK, nx_server, NULL);
-  if (server < 0)
+  if (!g_nxserver_started)
     {
-      int errcode = errno;
-      DEBUGASSERT(errcode > 0);
+      pid_t server;
 
-      gdbg("ERROR: Failed to create nx_server kernel thread: %d\n", errcode);
-      return -errcode;
-    }
+      /* Start the server kernel thread */
 
-  /* Wait a bit to make sure that the server get started.  NOTE that this
-   * operation cannot be done from the IDLE thread!
-   */
+      ginfo("Starting server task\n");
+      server = kernel_thread("NX Server", CONFIG_NXSTART_SERVERPRIO,
+                             CONFIG_NXSTART_SERVERSTACK, nx_server, NULL);
+      if (server < 0)
+        {
+          int errcode = errno;
+          DEBUGASSERT(errcode > 0);
+
+          gerr("ERROR: Failed to create nx_server kernel thread: %d\n", errcode);
+          return -errcode;
+        }
+
+      g_nxserver_started = true;
+
+      /* Wait a bit to make sure that the server get started.  NOTE that
+       * this operation cannot be done from the IDLE thread!
+       */
+
+      usleep(50*1000);
+    }
 
-  usleep(50*1000);
   return OK;
 }
-
-#endif /* CONFIG_NX_NXSTART */
diff --git a/graphics/nxmu/nxmu_releasebkgd.c b/graphics/nxmu/nxmu_releasebkgd.c
index 4762e69f8a9df5b9fbfb31c7903a58ef15bb061b..7f8d2935076f368b2a862b8495c5a0ad4b320e2a 100644
--- a/graphics/nxmu/nxmu_releasebkgd.c
+++ b/graphics/nxmu/nxmu_releasebkgd.c
@@ -88,7 +88,7 @@ void nxmu_releasebkgd(FAR struct nxfe_state_s *fe)
 {
   FAR struct nxbe_state_s *be = &fe->be;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!fe)
     {
       return;
diff --git a/graphics/nxmu/nxmu_reportposition.c b/graphics/nxmu/nxmu_reportposition.c
index cbc5651f9fb7025ee6757a4f2b94194975a3db83..757873ac1eee3e81d34aff8f199b0664f7da6cb3 100644
--- a/graphics/nxmu/nxmu_reportposition.c
+++ b/graphics/nxmu/nxmu_reportposition.c
@@ -103,6 +103,6 @@ void nxfe_reportposition(FAR struct nxbe_window_s *wnd)
   ret = nxmu_sendclientwindow(wnd, &outmsg, sizeof(struct nxclimsg_newposition_s));
   if (ret < 0)
     {
-      gdbg("nxmu_sendclient failed: %d\n", errno);
+      gerr("ERROR: nxmu_sendclient failed: %d\n", errno);
     }
 }
diff --git a/graphics/nxmu/nxmu_requestbkgd.c b/graphics/nxmu/nxmu_requestbkgd.c
index d25516008ddbbd6ac914d642b5d99769bc3a8766..23f7748fc30321218d8e92ffdfc950cf2017e84d 100644
--- a/graphics/nxmu/nxmu_requestbkgd.c
+++ b/graphics/nxmu/nxmu_requestbkgd.c
@@ -92,7 +92,7 @@ void nxmu_requestbkgd(FAR struct nxfe_conn_s *conn,
                       FAR const struct nx_callback_s *cb,
                       FAR void *arg)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!conn || !be || !cb)
     {
       errno = EINVAL;
diff --git a/graphics/nxmu/nxmu_sendclient.c b/graphics/nxmu/nxmu_sendclient.c
index 95b60581f0a54f3371b011235b4ca01e6646949a..7a0ab2be7be45889dc4c4af8f266b44dd17ee354 100644
--- a/graphics/nxmu/nxmu_sendclient.c
+++ b/graphics/nxmu/nxmu_sendclient.c
@@ -92,7 +92,7 @@ int nxmu_sendclient(FAR struct nxfe_conn_s *conn, FAR const void *msg,
 
   /* Sanity checking */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!conn || !conn->swrmq)
     {
       set_errno(EINVAL);
@@ -105,7 +105,7 @@ int nxmu_sendclient(FAR struct nxfe_conn_s *conn, FAR const void *msg,
   ret = mq_send(conn->swrmq, msg, msglen, NX_CLIMSG_PRIO);
   if (ret < 0)
     {
-      gdbg("mq_send failed: %d\n", errno);
+      gerr("ERROR: mq_send failed: %d\n", errno);
     }
 
   return ret;
diff --git a/graphics/nxmu/nxmu_sendclientwindow.c b/graphics/nxmu/nxmu_sendclientwindow.c
index c06c9f225e1240f8c75fcb1bc2d9ad03b9f010b9..e8ce5276a17f5ee9fa08c0f5577cb69cc5b49d48 100644
--- a/graphics/nxmu/nxmu_sendclientwindow.c
+++ b/graphics/nxmu/nxmu_sendclientwindow.c
@@ -92,7 +92,7 @@ int nxmu_sendclientwindow(FAR struct nxbe_window_s *wnd, FAR const void *msg,
 
   /* Sanity checking */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd || !wnd->conn)
     {
       set_errno(EINVAL);
diff --git a/graphics/nxmu/nxmu_server.c b/graphics/nxmu/nxmu_server.c
index a5dad6ec40bef4a909b85d7d986ef386ae4ebc9a..5ceb92d532a983d970870c76d76bfb48138ff439 100644
--- a/graphics/nxmu/nxmu_server.c
+++ b/graphics/nxmu/nxmu_server.c
@@ -87,7 +87,7 @@ static inline void nxmu_disconnect(FAR struct nxfe_conn_s *conn)
   ret = nxmu_sendclient(conn, &outmsg, sizeof(struct nxclimsg_disconnected_s));
   if (ret < 0)
     {
-      gdbg("nxmu_sendclient failed: %d\n", errno);
+      gerr("ERROR: nxmu_sendclient failed: %d\n", errno);
     }
 
   /* Close the outgoing client message queue */
@@ -114,7 +114,7 @@ static inline void nxmu_connect(FAR struct nxfe_conn_s *conn)
   conn->swrmq  = mq_open(mqname, O_WRONLY);
   if (conn->swrmq == (mqd_t)-1)
     {
-      gdbg("mq_open(%s) failed: %d\n", mqname, errno);
+      gerr("ERROR: mq_open(%s) failed: %d\n", mqname, errno);
       outmsg.msgid = NX_CLIMSG_DISCONNECTED;
     }
 
@@ -124,7 +124,7 @@ static inline void nxmu_connect(FAR struct nxfe_conn_s *conn)
   ret = nxmu_sendclient(conn, &outmsg, sizeof(struct nxclimsg_connected_s));
   if (ret < 0)
     {
-      gdbg("nxmu_sendclient failed: %d\n", errno);
+      gerr("ERROR: nxmu_sendclient failed: %d\n", errno);
     }
 }
 
@@ -166,7 +166,7 @@ static inline void nxmu_blocked(FAR struct nxbe_window_s *wnd, FAR void *arg)
   ret = nxmu_sendclient(wnd->conn, &outmsg, sizeof(struct nxclimsg_blocked_s));
   if (ret < 0)
     {
-      gdbg("nxmu_sendclient failed: %d\n", errno);
+      gerr("ERROR: nxmu_sendclient failed: %d\n", errno);
     }
 }
 
@@ -187,7 +187,7 @@ static inline int nxmu_setup(FAR const char *mqname, FAR NX_DRIVERTYPE *dev,
   ret = nxbe_configure(dev, &fe->be);
   if (ret < 0)
     {
-      gdbg("nxbe_configure failed: %d\n", -ret);
+      gerr("ERROR: nxbe_configure failed: %d\n", -ret);
       errno = -ret;
       return ERROR;
     }
@@ -196,7 +196,7 @@ static inline int nxmu_setup(FAR const char *mqname, FAR NX_DRIVERTYPE *dev,
   ret = nxbe_colormap(dev);
   if (ret < 0)
     {
-      gdbg("nxbe_colormap failed: %d\n", -ret);
+      gerr("ERROR: nxbe_colormap failed: %d\n", -ret);
       errno = -ret;
       return ERROR;
     }
@@ -217,7 +217,7 @@ static inline int nxmu_setup(FAR const char *mqname, FAR NX_DRIVERTYPE *dev,
   fe->conn.crdmq = mq_open(mqname, O_RDONLY | O_CREAT, 0666, &attr);
   if (fe->conn.crdmq == (mqd_t)-1)
     {
-      gdbg("mq_open(%s) failed: %d\n", mqname, errno);
+      gerr("ERROR: mq_open(%s) failed: %d\n", mqname, errno);
       return ERROR; /* mq_open sets errno */
     }
 
@@ -233,7 +233,7 @@ static inline int nxmu_setup(FAR const char *mqname, FAR NX_DRIVERTYPE *dev,
   fe->conn.swrmq = mq_open(mqname, O_WRONLY);
   if (fe->conn.swrmq == (mqd_t)-1)
     {
-      gdbg("mq_open(%s) failed: %d\n", mqname, errno);
+      gerr("ERROR: mq_open(%s) failed: %d\n", mqname, errno);
       mq_close(fe->conn.crdmq);
       return ERROR; /* mq_open sets errno */
     }
@@ -301,7 +301,7 @@ int nx_runinstance(FAR const char *mqname, FAR NX_DRIVERTYPE *dev)
 
   /* Sanity checking */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!mqname || !dev)
     {
       errno = EINVAL;
@@ -334,7 +334,7 @@ int nx_runinstance(FAR const char *mqname, FAR NX_DRIVERTYPE *dev)
          {
            if (errno != EINTR)
              {
-               gdbg("mq_receive failed: %d\n", errno);
+               gerr("ERROR: mq_receive failed: %d\n", errno);
                goto errout; /* mq_receive sets errno */
              }
            continue;
@@ -345,7 +345,7 @@ int nx_runinstance(FAR const char *mqname, FAR NX_DRIVERTYPE *dev)
        DEBUGASSERT(nbytes >= sizeof(struct nxsvrmsg_s));
        msg = (FAR struct nxsvrmsg_s *)buffer;
 
-       gvdbg("Received opcode=%d nbytes=%d\n", msg->msgid, nbytes);
+       ginfo("Received opcode=%d nbytes=%d\n", msg->msgid, nbytes);
        switch (msg->msgid)
          {
          /* Messages sent from clients to the NX server *********************/
@@ -531,7 +531,7 @@ int nx_runinstance(FAR const char *mqname, FAR NX_DRIVERTYPE *dev)
             {
               FAR struct nxclimsg_redraw_s *redraw = (FAR struct nxclimsg_redraw_s *)buffer;
               DEBUGASSERT(redraw->wnd == &fe.be.bkgd);
-              gvdbg("Re-draw background rect={(%d,%d),(%d,%d)}\n",
+              ginfo("Re-draw background rect={(%d,%d),(%d,%d)}\n",
                     redraw->rect.pt1.x, redraw->rect.pt1.y,
                     redraw->rect.pt2.x, redraw->rect.pt2.y);
               nxbe_fill(&fe.be.bkgd, &redraw->rect, fe.be.bgcolor);
@@ -545,7 +545,7 @@ int nx_runinstance(FAR const char *mqname, FAR NX_DRIVERTYPE *dev)
          case NX_CLIMSG_CONNECTED:    /* Shouldn't happen */
          case NX_CLIMSG_DISCONNECTED:
          default:
-           gdbg("Unrecognized command: %d\n", msg->msgid);
+           gerr("ERROR: Unrecognized command: %d\n", msg->msgid);
            break;
          }
     }
diff --git a/graphics/nxsu/nx_bitmap.c b/graphics/nxsu/nx_bitmap.c
index b9d732bee61b3629679a46732d9ed1576ac847e8..59f3199c2d3d4986c00bb7a2320d541a8cd97636 100644
--- a/graphics/nxsu/nx_bitmap.c
+++ b/graphics/nxsu/nx_bitmap.c
@@ -97,7 +97,7 @@ int nx_bitmap(NXWINDOW hwnd, FAR const struct nxgl_rect_s *dest,
               FAR const void *src[CONFIG_NX_NPLANES],
               FAR const struct nxgl_point_s *origin, unsigned int stride)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hwnd || !dest || !src || !origin)
     {
       errno = EINVAL;
diff --git a/graphics/nxsu/nx_closewindow.c b/graphics/nxsu/nx_closewindow.c
index 07fedac83df64b15b8f7d5748a52682d91df8b16..bd3c0e44f04fb4e76b8291395ba1c08f370a3231 100644
--- a/graphics/nxsu/nx_closewindow.c
+++ b/graphics/nxsu/nx_closewindow.c
@@ -86,7 +86,7 @@
 
 int nx_closewindow(NXWINDOW hwnd)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hwnd)
     {
       errno = EINVAL;
diff --git a/graphics/nxsu/nx_constructwindow.c b/graphics/nxsu/nx_constructwindow.c
index 62bf138e9f937cd26145b14173073e1509a245bf..ca468809d862ae1539e68c1e67db0e7a83e85f28 100644
--- a/graphics/nxsu/nx_constructwindow.c
+++ b/graphics/nxsu/nx_constructwindow.c
@@ -107,7 +107,7 @@ int nx_constructwindow(NXHANDLE handle, NXWINDOW hwnd,
   FAR struct nxbe_window_s *wnd = (FAR struct nxbe_window_s *)hwnd;
   FAR struct nxbe_state_s *be = &fe->be;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd)
     {
       set_errno(EINVAL);
diff --git a/graphics/nxsu/nx_fill.c b/graphics/nxsu/nx_fill.c
index 1659df1869c18d99926db482a753d85fd4c757a1..adf3d16236e61f2889cc970c49716381cc114c6d 100644
--- a/graphics/nxsu/nx_fill.c
+++ b/graphics/nxsu/nx_fill.c
@@ -90,7 +90,7 @@
 int nx_fill(NXWINDOW hwnd, FAR const struct nxgl_rect_s *rect,
             nxgl_mxpixel_t color[CONFIG_NX_NPLANES])
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hwnd || !rect || !color)
     {
       errno = EINVAL;
diff --git a/graphics/nxsu/nx_filltrapezoid.c b/graphics/nxsu/nx_filltrapezoid.c
index dbe99b943af2324012a0fa6f440b89db7f5a0069..dcbace13eb0662bd82b722c43682104c6b2f830a 100644
--- a/graphics/nxsu/nx_filltrapezoid.c
+++ b/graphics/nxsu/nx_filltrapezoid.c
@@ -92,7 +92,7 @@ int nx_filltrapezoid(NXWINDOW hwnd, FAR const struct nxgl_rect_s *clip,
                      FAR const struct nxgl_trapezoid_s *trap,
                      nxgl_mxpixel_t color[CONFIG_NX_NPLANES])
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hwnd || !trap || !color)
     {
       errno = EINVAL;
diff --git a/graphics/nxsu/nx_getposition.c b/graphics/nxsu/nx_getposition.c
index c41048862df4f5ba5f75cf0bdab4dd016bc73785..86326db1887010a1d1f6fd37541d5fa555198eca 100644
--- a/graphics/nxsu/nx_getposition.c
+++ b/graphics/nxsu/nx_getposition.c
@@ -87,7 +87,7 @@
 
 int nx_getposition(NXWINDOW hwnd)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hwnd)
     {
       errno = EINVAL;
diff --git a/graphics/nxsu/nx_getrectangle.c b/graphics/nxsu/nx_getrectangle.c
index ed3ebf426853370fd6e655f004532c641b12bb6a..37e5b8b2148d5039f2771d24b163009a27ca62eb 100644
--- a/graphics/nxsu/nx_getrectangle.c
+++ b/graphics/nxsu/nx_getrectangle.c
@@ -96,7 +96,7 @@ int nx_getrectangle(NXWINDOW hwnd, FAR const struct nxgl_rect_s *rect,
                     unsigned int plane, FAR uint8_t *dest,
                     unsigned int deststride)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hwnd || !rect || !dest)
     {
       set_errno(EINVAL);
diff --git a/graphics/nxsu/nx_lower.c b/graphics/nxsu/nx_lower.c
index 877c89ce6b539d3445d15bd8ddeede05c753ed42..b6693cb0a55b34bb2fd3b34e55f6067c2b5823eb 100644
--- a/graphics/nxsu/nx_lower.c
+++ b/graphics/nxsu/nx_lower.c
@@ -85,7 +85,7 @@
 
 int nx_lower(NXWINDOW hwnd)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hwnd)
     {
       errno = EINVAL;
diff --git a/graphics/nxsu/nx_move.c b/graphics/nxsu/nx_move.c
index 6404bf48ac2ff8471d45e7208588a9b6fb67ff26..54f17b696f726fb552cf3ca5c1963e94231de9a5 100644
--- a/graphics/nxsu/nx_move.c
+++ b/graphics/nxsu/nx_move.c
@@ -88,7 +88,7 @@
 int nx_move(NXWINDOW hwnd, FAR const struct nxgl_rect_s *rect,
             FAR const struct nxgl_point_s *offset)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hwnd)
     {
       errno = EINVAL;
diff --git a/graphics/nxsu/nx_open.c b/graphics/nxsu/nx_open.c
index 2c646c8b3e4a0d742ae697f9d03f28d238c3f713..5162c020045466e60a2e37b772307b11b1db30ca 100644
--- a/graphics/nxsu/nx_open.c
+++ b/graphics/nxsu/nx_open.c
@@ -101,7 +101,7 @@ static void nxsu_bkgdredraw(NXWINDOW hwnd,
   FAR struct nxbe_window_s *wnd = (FAR struct nxbe_window_s *)hwnd;
   FAR struct nxbe_state_s  *be  = wnd->be;
 
-  gvdbg("BG redraw rect={(%d,%d),(%d,%d)}\n",
+  ginfo("BG redraw rect={(%d,%d),(%d,%d)}\n",
         rect->pt1.x, rect->pt1.y, rect->pt2.x, rect->pt2.y);
   nxbe_fill(wnd, &wnd->bounds, be->bgcolor);
 }
@@ -120,7 +120,7 @@ static inline int nxsu_setup(FAR NX_DRIVERTYPE *dev,
   ret = nxbe_configure(dev, &fe->be);
   if (ret < 0)
     {
-      gdbg("nxbe_configure failed: %d\n", -ret);
+      gerr("ERROR: nxbe_configure failed: %d\n", -ret);
       errno = -ret;
       return ERROR;
     }
@@ -129,7 +129,7 @@ static inline int nxsu_setup(FAR NX_DRIVERTYPE *dev,
   ret = nxbe_colormap(dev);
   if (ret < 0)
     {
-      gdbg("nxbe_colormap failed: %d\n", -ret);
+      gerr("ERROR: nxbe_colormap failed: %d\n", -ret);
       errno = -ret;
       return ERROR;
     }
@@ -187,7 +187,7 @@ NXHANDLE nx_open(FAR NX_DRIVERTYPE *dev)
 
   /* Sanity checking */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!dev)
     {
       errno = EINVAL;
diff --git a/graphics/nxsu/nx_openwindow.c b/graphics/nxsu/nx_openwindow.c
index 3be9d5393afbb5ef9be9cc4365cbeb7acce955ad..3ff6b5a5f133a6340d59ee626ec5a24d768cd4d3 100644
--- a/graphics/nxsu/nx_openwindow.c
+++ b/graphics/nxsu/nx_openwindow.c
@@ -95,7 +95,7 @@ NXWINDOW nx_openwindow(NXHANDLE handle, FAR const struct nx_callback_s *cb,
   FAR struct nxbe_window_s *wnd;
   int ret;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!handle || !cb)
     {
       errno = EINVAL;
diff --git a/graphics/nxsu/nx_raise.c b/graphics/nxsu/nx_raise.c
index 7e963577a31770597a6eab996893dbac4fb17957..ae7f72480ce16b711e32f5c6ea896fa840d28de5 100644
--- a/graphics/nxsu/nx_raise.c
+++ b/graphics/nxsu/nx_raise.c
@@ -85,7 +85,7 @@
 
 int nx_raise(NXWINDOW hwnd)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hwnd)
     {
       errno = EINVAL;
diff --git a/graphics/nxsu/nx_releasebkgd.c b/graphics/nxsu/nx_releasebkgd.c
index 8c2181f2d041d7736dc633ba1b57054d2802f0d4..6a0e5f42085595516ef1073660d7655a9294be93 100644
--- a/graphics/nxsu/nx_releasebkgd.c
+++ b/graphics/nxsu/nx_releasebkgd.c
@@ -88,7 +88,7 @@ int nx_releasebkgd(NXWINDOW hwnd)
 {
   FAR struct nxbe_window_s *bkgd = (FAR struct nxbe_window_s *)hwnd;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!bkgd)
     {
       errno = EINVAL;
diff --git a/graphics/nxsu/nx_requestbkgd.c b/graphics/nxsu/nx_requestbkgd.c
index e5aaad311e9e5da29fd55de07881590e843f74f3..5441adaaae5691edb3c89d6de554de9e3fd1d5cd 100644
--- a/graphics/nxsu/nx_requestbkgd.c
+++ b/graphics/nxsu/nx_requestbkgd.c
@@ -115,7 +115,7 @@ int nx_requestbkgd(NXHANDLE handle, FAR const struct nx_callback_s *cb,
   FAR struct nxfe_state_s *fe = (FAR struct nxfe_state_s *)handle;
   FAR struct nxbe_state_s *be = &fe->be;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!fe || !cb)
     {
       errno = EINVAL;
diff --git a/graphics/nxsu/nx_setbgcolor.c b/graphics/nxsu/nx_setbgcolor.c
index 3b6af8062667e92a78e1781f32ed2d15cc8587da..ab1e974bbbad574d84f13435297e5245a8455876 100644
--- a/graphics/nxsu/nx_setbgcolor.c
+++ b/graphics/nxsu/nx_setbgcolor.c
@@ -89,7 +89,7 @@ int nx_setbgcolor(NXHANDLE handle,
 {
   FAR struct nxfe_state_s *fe = (FAR struct nxfe_state_s *)handle;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!fe)
     {
       errno = EINVAL;
diff --git a/graphics/nxsu/nx_setpixel.c b/graphics/nxsu/nx_setpixel.c
index 37ce41af392a8f3ea2380655c47a07fc92784fc8..35e10832afd669285654effe098639098997a76c 100644
--- a/graphics/nxsu/nx_setpixel.c
+++ b/graphics/nxsu/nx_setpixel.c
@@ -91,7 +91,7 @@
 int nx_setpixel(NXWINDOW hwnd,  FAR const struct nxgl_point_s *pos,
                 nxgl_mxpixel_t color[CONFIG_NX_NPLANES])
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hwnd || !pos || !color)
     {
       errno = EINVAL;
diff --git a/graphics/nxsu/nx_setposition.c b/graphics/nxsu/nx_setposition.c
index e138ea97330b25bc6605dea38cc94f0b78f0b9fa..e2799f6261c8d6ac29fa2ad827d5eabf98c32195 100644
--- a/graphics/nxsu/nx_setposition.c
+++ b/graphics/nxsu/nx_setposition.c
@@ -86,7 +86,7 @@
 
 int nx_setposition(NXWINDOW hwnd, FAR const struct nxgl_point_s *pos)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hwnd || !pos)
     {
       errno = EINVAL;
diff --git a/graphics/nxsu/nx_setsize.c b/graphics/nxsu/nx_setsize.c
index 7be045b90e932b06811927200319b91536aebd9c..bec2f7642a1ca7de907f93f26186227b9d7e8329 100644
--- a/graphics/nxsu/nx_setsize.c
+++ b/graphics/nxsu/nx_setsize.c
@@ -86,7 +86,7 @@
 
 int nx_setsize(NXWINDOW hwnd, FAR const struct nxgl_size_s *size)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hwnd || !size)
     {
       errno = EINVAL;
diff --git a/graphics/nxsu/nxsu_redrawreq.c b/graphics/nxsu/nxsu_redrawreq.c
index 9871e879c5074d362bf71a2e5c8270e93e5e9929..f903639f6646466b126b8cc99023cb0cf60df85d 100644
--- a/graphics/nxsu/nxsu_redrawreq.c
+++ b/graphics/nxsu/nxsu_redrawreq.c
@@ -82,7 +82,7 @@ void nxfe_redrawreq(FAR struct nxbe_window_s *wnd, FAR const struct nxgl_rect_s
 {
   struct nxgl_rect_s relrect;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd)
     {
       return;
diff --git a/graphics/nxsu/nxsu_reportposition.c b/graphics/nxsu/nxsu_reportposition.c
index 043caee8a6f9bb6997b1c82de069952ef1cca17f..9a3be6a61f49f1c737971f4234e82cde040a45be 100644
--- a/graphics/nxsu/nxsu_reportposition.c
+++ b/graphics/nxsu/nxsu_reportposition.c
@@ -82,7 +82,7 @@ void nxfe_reportposition(FAR struct nxbe_window_s *wnd)
   FAR struct nxbe_state_s  *be;
   struct nxgl_size_s        size;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd)
     {
       return;
diff --git a/graphics/nxterm/Make.defs b/graphics/nxterm/Make.defs
index 5a02507313f861af57bba899afb7a209024e19ba..469d4bfde273091244fcfdae98c0fce391812a1c 100644
--- a/graphics/nxterm/Make.defs
+++ b/graphics/nxterm/Make.defs
@@ -44,7 +44,7 @@ ifeq ($(CONFIG_NXTERM_NXKBDIN),y)
 CSRCS += nxterm_kbdin.c
 endif
 
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
 CSRCS += nxterm_sem.c
 endif
 
diff --git a/graphics/nxterm/nx_register.c b/graphics/nxterm/nx_register.c
index 52f7c31168802be989e3affebba7cb637bb2f8bb..3da6fd8a658fa8a1a5f20e630557d5dcbc4c4fa7 100644
--- a/graphics/nxterm/nx_register.c
+++ b/graphics/nxterm/nx_register.c
@@ -44,10 +44,6 @@
 
 #include "nxterm.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Private Function Prototypes
  ****************************************************************************/
diff --git a/graphics/nxterm/nxterm.h b/graphics/nxterm/nxterm.h
index 1a082e52837507a3ff44769bdad912a3b95a02e5..49eded0c884312f45b0a9c7b6f2e7127a77a0025 100644
--- a/graphics/nxterm/nxterm.h
+++ b/graphics/nxterm/nxterm.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * nuttx/graphics/nxterm/nxterm.h
  *
- *   Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __GRAPHICS_NXTERM_NXTERM_INTERNAL_H
-#define __GRAPHICS_NXTERM_NXTERM_INTERNAL_H
+#ifndef __GRAPHICS_NXTERM_NXTERM_H
+#define __GRAPHICS_NXTERM_NXTERM_H
 
 /****************************************************************************
  * Included Files
@@ -61,10 +61,6 @@
 #define BMFLAGS_NOGLYPH    (1 << 0) /* No glyph available, use space */
 #define BM_ISSPACE(bm)     (((bm)->flags & BMFLAGS_NOGLYPH) != 0)
 
-/* Sizes and maximums */
-
-#define MAX_USECNT         255  /* Limit to range of a uint8_t */
-
 /* Device path formats */
 
 #define NX_DEVNAME_FORMAT  "/dev/nxterm%d"
@@ -81,6 +77,7 @@
 /****************************************************************************
  * Public Types
  ****************************************************************************/
+
 /* Identifies the state of the VT100 escape sequence processing */
 
 enum nxterm_vt100state_e
@@ -111,18 +108,6 @@ struct nxterm_operations_s
                 unsigned int stride);
 };
 
-/* Describes one cached glyph bitmap */
-
-struct nxterm_glyph_s
-{
-  uint8_t code;                        /* Character code */
-  uint8_t height;                      /* Height of this glyph (in rows) */
-  uint8_t width;                       /* Width of this glyph (in pixels) */
-  uint8_t stride;                      /* Width of the glyph row (in bytes) */
-  uint8_t usecnt;                      /* Use count */
-  FAR uint8_t *bitmap;                 /* Allocated bitmap memory */
-};
-
 /* Describes on character on the display */
 
 struct nxterm_bitmap_s
@@ -138,10 +123,9 @@ struct nxterm_state_s
 {
   FAR const struct nxterm_operations_s *ops; /* Window operations */
   FAR void *handle;                         /* The window handle */
-  FAR struct nxterm_window_s wndo;           /* Describes the window and font */
-  NXHANDLE font;                            /* The current font handle */
+  FAR struct nxterm_window_s wndo;          /* Describes the window and font */
   sem_t exclsem;                            /* Forces mutually exclusive access */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   pid_t holder;                             /* Deadlock avoidance */
 #endif
   uint8_t minor;                            /* Device minor number */
@@ -151,7 +135,6 @@ struct nxterm_state_s
   uint8_t fheight;                          /* Max height of a font in pixels */
   uint8_t fwidth;                           /* Max width of a font in pixels */
   uint8_t spwidth;                          /* The width of a space */
-  uint8_t maxglyphs;                        /* Size of the glyph[] array */
 
   uint16_t maxchars;                        /* Size of the bm[] array */
   uint16_t nchars;                          /* Number of chars in the bm[] array */
@@ -165,13 +148,10 @@ struct nxterm_state_s
 
   /* Font cache data storage */
 
+  FCACHE fcache;                            /* Font cache handle */
   struct nxterm_bitmap_s cursor;
   struct nxterm_bitmap_s bm[CONFIG_NXTERM_MXCHARS];
 
-  /* Glyph cache data storage */
-
-  struct nxterm_glyph_s  glyph[CONFIG_NXTERM_CACHESIZE];
-
   /* Keyboard input support */
 
 #ifdef CONFIG_NXTERM_NXKBDIN
@@ -206,7 +186,7 @@ extern const struct file_operations g_nxterm_drvrops;
  ****************************************************************************/
 /* Semaphore helpers */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 int nxterm_semwait(FAR struct nxterm_state_s *priv);
 int nxterm_sempost(FAR struct nxterm_state_s *priv);
 #else
@@ -235,8 +215,8 @@ enum nxterm_vt100state_e nxterm_vt100(FAR struct nxterm_state_s *priv, char ch);
 
 void nxterm_home(FAR struct nxterm_state_s *priv);
 void nxterm_newline(FAR struct nxterm_state_s *priv);
-FAR const struct nxterm_bitmap_s *nxterm_addchar(NXHANDLE hfont,
-    FAR struct nxterm_state_s *priv, uint8_t ch);
+FAR const struct nxterm_bitmap_s *nxterm_addchar(FAR struct nxterm_state_s *priv,
+    uint8_t ch);
 int nxterm_hidechar(FAR struct nxterm_state_s *priv,
     FAR const struct nxterm_bitmap_s *bm);
 int nxterm_backspace(FAR struct nxterm_state_s *priv);
@@ -251,4 +231,4 @@ void nxterm_hidecursor(FAR struct nxterm_state_s *priv);
 
 void nxterm_scroll(FAR struct nxterm_state_s *priv, int scrollheight);
 
-#endif /* __GRAPHICS_NXTERM_NXTERM_INTERNAL_H */
+#endif /* __GRAPHICS_NXTERM_NXTERM_H */
diff --git a/graphics/nxterm/nxterm_driver.c b/graphics/nxterm/nxterm_driver.c
index 77cb7b0377be49ff70286f91cc1068d252af7a71..824f674cfd2ca5054bd67cfcc615d259a047597e 100644
--- a/graphics/nxterm/nxterm_driver.c
+++ b/graphics/nxterm/nxterm_driver.c
@@ -62,6 +62,7 @@ static ssize_t nxterm_write(FAR struct file *filep, FAR const char *buffer,
 /****************************************************************************
  * Public Data
  ****************************************************************************/
+
 /* This is the common NX driver file operations */
 
 #ifdef CONFIG_NXTERM_NXKBDIN
@@ -98,10 +99,6 @@ const struct file_operations g_nxterm_drvrops =
 
 #endif /* CONFIG_NXTERM_NXKBDIN */
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -128,7 +125,7 @@ static int nxterm_open(FAR struct file *filep)
 #ifndef CONFIG_NXTERM_NXKBDIN
   if ((filep->f_oflags & O_RDOK) != 0)
     {
-      gdbg("ERROR: Attempted open with read access\n");
+      gerr("ERROR: Attempted open with read access\n");
       return -EACCES;
     }
 #endif
diff --git a/graphics/nxterm/nxterm_font.c b/graphics/nxterm/nxterm_font.c
index fec6d5a443b28c30162f1f53e526100002c97f5d..50028459898261ddec2264bc38656531325848b4 100644
--- a/graphics/nxterm/nxterm_font.c
+++ b/graphics/nxterm/nxterm_font.c
@@ -48,294 +48,26 @@
 
 #include "nxterm.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* Select renderer -- Some additional logic would be required to support
- * pixel depths that are not directly addressable (1,2,4, and 24).
- */
-
-#if CONFIG_NXTERM_BPP == 1
-#  define RENDERER nxf_convert_1bpp
-#elif CONFIG_NXTERM_BPP == 2
-#  define RENDERER nxf_convert_2bpp
-#elif CONFIG_NXTERM_BPP == 4
-#  define RENDERER nxf_convert_4bpp
-#elif CONFIG_NXTERM_BPP == 8
-#  define RENDERER nxf_convert_8bpp
-#elif CONFIG_NXTERM_BPP == 16
-#  define RENDERER nxf_convert_16bpp
-#elif CONFIG_NXTERM_BPP == 24
-#  define RENDERER nxf_convert_24bpp
-#elif  CONFIG_NXTERM_BPP == 32
-#  define RENDERER nxf_convert_32bpp
-#else
-#  error "Unsupported CONFIG_NXTERM_BPP"
-#endif
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
 
-/****************************************************************************
- * Name: nxterm_freeglyph
- ****************************************************************************/
-
-static void nxterm_freeglyph(FAR struct nxterm_glyph_s *glyph)
-{
-  if (glyph->bitmap)
-    {
-      kmm_free(glyph->bitmap);
-    }
-  memset(glyph, 0, sizeof(struct nxterm_glyph_s));
-}
-
-/****************************************************************************
- * Name: nxterm_allocglyph
- ****************************************************************************/
-
-static inline FAR struct nxterm_glyph_s *
-nxterm_allocglyph(FAR struct nxterm_state_s *priv)
-{
-  FAR struct nxterm_glyph_s *glyph = NULL;
-  FAR struct nxterm_glyph_s *luglyph = NULL;
-  uint8_t luusecnt;
-  int i;
-
-  /* Search through the glyph cache looking for an unused glyph.  Also, keep
-   * track of the least used glyph as well.  We need that if we have to replace
-   * a glyph in the cache.
-   */
-
-   for (i = 0; i < priv->maxglyphs; i++)
-    {
-      /* Is this glyph in use? */
-
-      glyph = &priv->glyph[i];
-      if (!glyph->usecnt)
-        {
-          /* No.. return this glyph with a use count of one */
-
-          glyph->usecnt = 1;
-          return glyph;
-        }
-
-      /* Yes.. check for the least recently used */
-
-      if (!luglyph || glyph->usecnt < luglyph->usecnt)
-        {
-          luglyph = glyph;
-        }
-    }
-
-  /* If we get here, the glyph cache is full.  We replace the least used
-   * glyph with the one we need now. (luglyph can't be NULL).
-   */
-
-  luusecnt = luglyph->usecnt;
-  nxterm_freeglyph(luglyph);
-
-  /* But lets decrement all of the usecnts so that the new one one be so
-   * far behind in the counts as the older ones.
-   */
-
-  if (luusecnt > 1)
-    {
-       uint8_t decr = luusecnt - 1;
-
-       for (i = 0; i < priv->maxglyphs; i++)
-        {
-          /* Is this glyph in use? */
-
-          glyph = &priv->glyph[i];
-          if (glyph->usecnt > decr)
-            {
-              glyph->usecnt -= decr;
-            }
-        }
-    }
-
-  /* Then return the least used glyph */
-
-  luglyph->usecnt = 1;
-  return luglyph;
-}
-
-/****************************************************************************
- * Name: nxterm_findglyph
- ****************************************************************************/
-
-static FAR struct nxterm_glyph_s *
-nxterm_findglyph(FAR struct nxterm_state_s *priv, uint8_t ch)
-{
-  int i;
-
-  /* First, try to find the glyph in the cache of pre-rendered glyphs */
-
-   for (i = 0; i < priv->maxglyphs; i++)
-    {
-      FAR struct nxterm_glyph_s *glyph = &priv->glyph[i];
-      if (glyph->usecnt > 0 && glyph->code == ch)
-        {
-          /* Increment the use count (unless it is already at the max) */
-
-          if (glyph->usecnt < MAX_USECNT)
-            {
-               glyph->usecnt++;
-            }
-
-          /* And return the glyph that we found */
-
-          return glyph;
-        }
-    }
-  return NULL;
-}
-
-/****************************************************************************
- * Name: nxterm_renderglyph
- ****************************************************************************/
-
-static inline FAR struct nxterm_glyph_s *
-nxterm_renderglyph(FAR struct nxterm_state_s *priv,
-                   FAR const struct nx_fontbitmap_s *fbm, uint8_t ch)
-{
-  FAR struct nxterm_glyph_s *glyph = NULL;
-  FAR nxgl_mxpixel_t *ptr;
-#if CONFIG_NXTERM_BPP < 8
-  nxgl_mxpixel_t pixel;
-#endif
-  int bmsize;
-  int row;
-  int col;
-  int ret;
-
-  /* Allocate the glyph (always succeeds) */
-
-  glyph         = nxterm_allocglyph(priv);
-  glyph->code   = ch;
-
-  /* Get the dimensions of the glyph */
-
-  glyph->width  = fbm->metric.width + fbm->metric.xoffset;
-  glyph->height = fbm->metric.height + fbm->metric.yoffset;
-
-  /* Get the physical width of the glyph in bytes */
-
-  glyph->stride = (glyph->width * CONFIG_NXTERM_BPP + 7) / 8;
-
-  /* Allocate memory to hold the glyph with its offsets */
-
-  bmsize        =  glyph->stride * glyph->height;
-  glyph->bitmap = (FAR uint8_t *)kmm_malloc(bmsize);
-
-  if (glyph->bitmap)
-    {
-      /* Initialize the glyph memory to the background color using the
-       * hard-coded bits-per-pixel (BPP).
-       *
-       * TODO:  The rest of NX is configured to support multiple devices
-       * with differing BPP.  They logic should be extended to support
-       * differing BPP's as well.
-       */
-
-#if CONFIG_NXTERM_BPP < 8
-      pixel  = priv->wndo.wcolor[0];
-
-#  if CONFIG_NXTERM_BPP == 1
-
-      /* Pack 1-bit pixels into a 2-bits */
-
-      pixel &= 0x01;
-      pixel  = (pixel) << 1 | pixel;
-
-#  endif
-#  if CONFIG_NXTERM_BPP < 4
-
-      /* Pack 2-bit pixels into a nibble */
-
-      pixel &= 0x03;
-      pixel  = (pixel) << 2 | pixel;
-
-#  endif
-
-      /* Pack 4-bit nibbles into a byte */
-
-      pixel &= 0x0f;
-      pixel  = (pixel) << 4 | pixel;
-
-      ptr    = (FAR nxgl_mxpixel_t *)glyph->bitmap;
-      for (row = 0; row < glyph->height; row++)
-        {
-          for (col = 0; col < glyph->stride; col++)
-            {
-              /* Transfer the packed bytes into the buffer */
-
-              *ptr++ = pixel;
-            }
-        }
-
-#elif CONFIG_NXTERM_BPP == 24
-# error "Additional logic is needed here for 24bpp support"
-
-#else /* CONFIG_NXTERM_BPP = {8,16,32} */
-
-      ptr = (FAR nxgl_mxpixel_t *)glyph->bitmap;
-      for (row = 0; row < glyph->height; row++)
-        {
-          /* Just copy the color value into the glyph memory */
-
-          for (col = 0; col < glyph->width; col++)
-            {
-              *ptr++ = priv->wndo.wcolor[0];
-            }
-        }
-#endif
-
-      /* Then render the glyph into the allocated memory */
-
-      ret = RENDERER((FAR nxgl_mxpixel_t *)glyph->bitmap,
-                      glyph->height, glyph->width, glyph->stride,
-                      fbm, priv->wndo.fcolor[0]);
-      if (ret < 0)
-        {
-          /* Actually, the RENDERER never returns a failure */
-
-          gdbg("nxterm_renderglyph: RENDERER failed\n");
-          nxterm_freeglyph(glyph);
-          glyph = NULL;
-        }
-    }
-
-  return glyph;
-}
-
 /****************************************************************************
  * Name: nxterm_fontsize
  ****************************************************************************/
 
-static int nxterm_fontsize(NXHANDLE hfont, uint8_t ch, FAR struct nxgl_size_s *size)
+static int nxterm_fontsize(FAR struct nxterm_state_s *priv, uint8_t ch,
+                           FAR struct nxgl_size_s *size)
 {
   FAR const struct nx_fontbitmap_s *fbm;
+  NXHANDLE hfont;
+
+  /* Get the handle of the font managed by the font cache */
 
-  /* No, it is not cached... Does the code map to a font? */
+  hfont = nxf_cache_getfonthandle(priv->fcache);
+  DEBUGASSERT(hfont != NULL);
+
+  /* Does the character code map to a font? */
 
   fbm = nxf_getbitmap(hfont, ch);
   if (fbm)
@@ -347,40 +79,7 @@ static int nxterm_fontsize(NXHANDLE hfont, uint8_t ch, FAR struct nxgl_size_s *s
       return OK;
     }
 
-  return ERROR;
-}
-
-/****************************************************************************
- * Name: nxterm_getglyph
- ****************************************************************************/
-
-static FAR struct nxterm_glyph_s *
-nxterm_getglyph(NXHANDLE hfont, FAR struct nxterm_state_s *priv, uint8_t ch)
-{
-  FAR struct nxterm_glyph_s *glyph;
-  FAR const struct nx_fontbitmap_s *fbm;
-
-  /* First, try to find the glyph in the cache of pre-rendered glyphs */
-
-  glyph = nxterm_findglyph(priv, ch);
-  if (glyph)
-    {
-      /* We found it in the cache .. return the cached glyph */
-
-      return glyph;
-    }
-
-  /* No, it is not cached... Does the code map to a font? */
-
-  fbm = nxf_getbitmap(hfont, ch);
-  if (fbm)
-    {
-      /* Yes.. render the glyph */
-
-      glyph = nxterm_renderglyph(priv, fbm, ch);
-    }
-
-  return glyph;
+  return -ENOENT;
 }
 
 /****************************************************************************
@@ -397,10 +96,10 @@ nxterm_getglyph(NXHANDLE hfont, FAR struct nxterm_state_s *priv, uint8_t ch)
  ****************************************************************************/
 
 FAR const struct nxterm_bitmap_s *
-nxterm_addchar(NXHANDLE hfont, FAR struct nxterm_state_s *priv, uint8_t ch)
+nxterm_addchar(FAR struct nxterm_state_s *priv, uint8_t ch)
 {
   FAR struct nxterm_bitmap_s *bm = NULL;
-  FAR struct nxterm_glyph_s *glyph;
+  FAR const struct nxfonts_glyph_s *glyph;
 
   /* Is there space for another character on the display? */
 
@@ -416,7 +115,7 @@ nxterm_addchar(NXHANDLE hfont, FAR struct nxterm_state_s *priv, uint8_t ch)
 
       /* Find (or create) the matching glyph */
 
-      glyph = nxterm_getglyph(hfont, priv, ch);
+      glyph = nxf_cache_getglyph(priv->fcache, ch);
       if (!glyph)
         {
           /* No, there is no font for this code.  Just mark this as a space. */
@@ -449,6 +148,7 @@ nxterm_addchar(NXHANDLE hfont, FAR struct nxterm_state_s *priv, uint8_t ch)
  *   Erase a character from the window.
  *
  ****************************************************************************/
+
 int nxterm_hidechar(FAR struct nxterm_state_s *priv,
                    FAR const struct nxterm_bitmap_s *bm)
 {
@@ -461,7 +161,7 @@ int nxterm_hidechar(FAR struct nxterm_state_s *priv,
    * modification is required (not an error).
    */
 
-  ret = nxterm_fontsize(priv->font, bm->code, &fsize);
+  ret = nxterm_fontsize(priv, bm->code, &fsize);
   if (ret < 0)
     {
       /* It was rendered as a space. */
@@ -572,10 +272,10 @@ void nxterm_newline(FAR struct nxterm_state_s *priv)
  ****************************************************************************/
 
 void nxterm_fillchar(FAR struct nxterm_state_s *priv,
-                    FAR const struct nxgl_rect_s *rect,
-                    FAR const struct nxterm_bitmap_s *bm)
+                     FAR const struct nxgl_rect_s *rect,
+                     FAR const struct nxterm_bitmap_s *bm)
 {
-  FAR struct nxterm_glyph_s *glyph;
+  FAR const struct nxfonts_glyph_s *glyph;
   struct nxgl_rect_s bounds;
   struct nxgl_rect_s intersection;
   struct nxgl_size_s fsize;
@@ -590,7 +290,7 @@ void nxterm_fillchar(FAR struct nxterm_state_s *priv,
 
   /* Get the size of the font glyph (which may not have been created yet) */
 
-  ret = nxterm_fontsize(priv->font, bm->code, &fsize);
+  ret = nxterm_fontsize(priv, bm->code, &fsize);
   if (ret < 0)
     {
       /* This would mean that there is no bitmap for the character code and
@@ -632,7 +332,7 @@ void nxterm_fillchar(FAR struct nxterm_state_s *priv,
 
       /* Find (or create) the glyph that goes with this font */
 
-      glyph = nxterm_getglyph(priv->font, priv, bm->code);
+      glyph = nxf_cache_getglyph(priv->fcache, bm->code);
       if (!glyph)
         {
           /* Shouldn't happen */
@@ -648,4 +348,3 @@ void nxterm_fillchar(FAR struct nxterm_state_s *priv,
       DEBUGASSERT(ret >= 0);
     }
 }
-
diff --git a/graphics/nxterm/nxterm_kbdin.c b/graphics/nxterm/nxterm_kbdin.c
index 395f6f759fbef57dc864deedab1ae069a5176b40..b81763e6abdffdede57f4657916933aa3f8dbc39 100644
--- a/graphics/nxterm/nxterm_kbdin.c
+++ b/graphics/nxterm/nxterm_kbdin.c
@@ -118,7 +118,7 @@ ssize_t nxterm_read(FAR struct file *filep, FAR char *buffer, size_t len)
   ret = nxterm_semwait(priv);
   if (ret < 0)
     {
-      gdbg("ERROR: nxterm_semwait failed\n");
+      gerr("ERROR: nxterm_semwait failed\n");
       return ret;
     }
 
@@ -191,7 +191,7 @@ ssize_t nxterm_read(FAR struct file *filep, FAR char *buffer, size_t len)
 
               int errval = errno;
 
-              gdbg("ERROR: nxterm_semwait failed\n");
+              gerr("ERROR: nxterm_semwait failed\n");
 
               /* Were we awakened by a signal?  Did we read anything before
                * we received the signal?
@@ -277,7 +277,7 @@ int nxterm_poll(FAR struct file *filep, FAR struct pollfd *fds, bool setup)
   ret = nxterm_semwait(priv);
   if (ret < 0)
     {
-      gdbg("ERROR: nxterm_semwait failed\n");
+      gerr("ERROR: nxterm_semwait failed\n");
       return ret;
     }
 
@@ -305,7 +305,7 @@ int nxterm_poll(FAR struct file *filep, FAR struct pollfd *fds, bool setup)
 
       if (i >= CONFIG_NXTERM_NPOLLWAITERS)
         {
-          gdbg("ERROR: Too many poll waiters\n");
+          gerr("ERROR: Too many poll waiters\n");
 
           fds->priv    = NULL;
           ret          = -EBUSY;
@@ -337,10 +337,10 @@ int nxterm_poll(FAR struct file *filep, FAR struct pollfd *fds, bool setup)
 
       struct pollfd **slot = (struct pollfd **)fds->priv;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       if (!slot)
         {
-          gdbg("ERROR: No slot\n");
+          gerr("ERROR: No slot\n");
 
           ret = -EIO;
           goto errout;
@@ -393,7 +393,7 @@ void nxterm_kbdin(NXTERM handle, FAR const uint8_t *buffer, uint8_t buflen)
   char ch;
   int ret;
 
-  gvdbg("buflen=%d\n");
+  ginfo("buflen=%d\n");
   DEBUGASSERT(handle);
 
   /* Get the reference to the driver structure from the handle */
@@ -405,7 +405,7 @@ void nxterm_kbdin(NXTERM handle, FAR const uint8_t *buffer, uint8_t buflen)
   ret = nxterm_semwait(priv);
   if (ret < 0)
     {
-      gdbg("ERROR: nxterm_semwait failed\n");
+      gerr("ERROR: nxterm_semwait failed\n");
       return;
     }
 
@@ -440,7 +440,7 @@ void nxterm_kbdin(NXTERM handle, FAR const uint8_t *buffer, uint8_t buflen)
         {
           /* Yes... Return an indication that nothing was saved in the buffer. */
 
-          gdbg("ERROR: Keyboard data overrun\n");
+          gerr("ERROR: Keyboard data overrun\n");
           break;
         }
 
diff --git a/graphics/nxterm/nxterm_putc.c b/graphics/nxterm/nxterm_putc.c
index b0479404caf599c11af66df3c313a8431ad79758..449f1ad366e8ce130bcee450ecae02f8523726d2 100644
--- a/graphics/nxterm/nxterm_putc.c
+++ b/graphics/nxterm/nxterm_putc.c
@@ -43,26 +43,6 @@
 
 #include "nxterm.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -142,7 +122,7 @@ void nxterm_putc(FAR struct nxterm_state_s *priv, uint8_t ch)
    * display.
    */
 
-  bm = nxterm_addchar(priv->font, priv, ch);
+  bm = nxterm_addchar(priv, ch);
   if (bm)
     {
       nxterm_fillchar(priv, NULL, bm);
diff --git a/graphics/nxterm/nxterm_redraw.c b/graphics/nxterm/nxterm_redraw.c
index e2cbc053c9ac5ce3b330bc77417f4789b49e3f53..5e1b2b97491abb4c132a56de5f7f899039f09319 100644
--- a/graphics/nxterm/nxterm_redraw.c
+++ b/graphics/nxterm/nxterm_redraw.c
@@ -51,30 +51,6 @@
 
 #include "nxterm.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -105,7 +81,7 @@ void nxterm_redraw(NXTERM handle, FAR const struct nxgl_rect_s *rect, bool more)
   int i;
 
   DEBUGASSERT(handle && rect);
-  gvdbg("rect={(%d,%d),(%d,%d)} more=%s\n",
+  ginfo("rect={(%d,%d),(%d,%d)} more=%s\n",
         rect->pt1.x, rect->pt1.y, rect->pt2.x, rect->pt2.y,
         more ? "true" : "false");
 
@@ -137,7 +113,7 @@ void nxterm_redraw(NXTERM handle, FAR const struct nxgl_rect_s *rect, bool more)
   ret = priv->ops->fill(priv, rect, priv->wndo.wcolor);
   if (ret < 0)
     {
-      gdbg("fill failed: %d\n", errno);
+      gerr("ERROR: fill failed: %d\n", errno);
     }
 
   /* Then redraw each character on the display (Only the characters within
diff --git a/graphics/nxterm/nxterm_register.c b/graphics/nxterm/nxterm_register.c
index a0751773d7a77e1fe65b3263289b523e66f78ec1..a83e84cffc937fcc8980a22f77f6bcbd70b85b94 100644
--- a/graphics/nxterm/nxterm_register.c
+++ b/graphics/nxterm/nxterm_register.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * nuttx/graphics/nxterm/nxterm_register.c
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -48,22 +48,11 @@
 #include 
 
 #include 
+#include 
 #include 
 
 #include "nxterm.h"
 
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -77,7 +66,9 @@ FAR struct nxterm_state_s *
                  FAR const struct nxterm_operations_s *ops, int minor)
 {
   FAR struct nxterm_state_s *priv;
+  FAR const struct nx_font_s *fontset;
   char devname[NX_DEVNAME_SIZE];
+  NXHANDLE hfont;
   int ret;
 
   DEBUGASSERT(handle && wndo && ops && (unsigned)minor < 256);
@@ -87,7 +78,7 @@ FAR struct nxterm_state_s *
   priv = (FAR struct nxterm_state_s *)kmm_zalloc(sizeof(struct nxterm_state_s));
   if (!priv)
     {
-      gdbg("Failed to allocate the NX driver structure\n");
+      gerr("ERROR: Failed to allocate the NX driver structure\n");
       return NULL;
     }
 
@@ -99,30 +90,46 @@ FAR struct nxterm_state_s *
   memcpy(&priv->wndo, wndo, sizeof(struct nxterm_window_s));
 
   sem_init(&priv->exclsem, 0, 1);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   priv->holder  = NO_HOLDER;
 #endif
 
 #ifdef CONFIG_NXTERM_NXKBDIN
+  /* The waitsem semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   sem_init(&priv->waitsem, 0, 0);
+  sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
 #endif
 
-  /* Select the font */
+  /* Connect to the font cache for the configured font characteristics */
 
-  priv->font = nxf_getfonthandle(wndo->fontid);
-  if (!priv->font)
+  priv->fcache = nxf_cache_connect(wndo->fontid, wndo->fcolor[0],
+                                   wndo->wcolor[0], CONFIG_NXTERM_BPP,
+                                   CONFIG_NXTERM_CACHESIZE);
+  if (priv->fcache == NULL)
     {
-      gdbg("Failed to get font ID %d: %d\n", wndo->fontid, errno);
+      gerr("ERROR: Failed to connect to font cache for font ID %d: %d\n",
+           wndo->fontid, errno);
       goto errout;
     }
 
-  FAR const struct nx_font_s *fontset;
+  /* Get the handle of the font managed by the font cache */
+
+  hfont = nxf_cache_getfonthandle(priv->fcache);
+  if (hfont == NULL)
+    {
+      gerr("ERROR: Failed to get handlr for font ID %d: %d\n",
+           wndo->fontid, errno);
+      goto errout;
+    }
 
   /* Get information about the font set being used and save this in the
    * state structure
    */
 
-  fontset         = nxf_getfontset(priv->font);
+  fontset         = nxf_getfontset(hfont);
   priv->fheight   = fontset->mxheight;
   priv->fwidth    = fontset->mxwidth;
   priv->spwidth   = fontset->spwidth;
@@ -131,10 +138,6 @@ FAR struct nxterm_state_s *
 
   priv->maxchars  = CONFIG_NXTERM_MXCHARS;
 
-  /* Set up the font glyph bitmap cache */
-
-  priv->maxglyphs = CONFIG_NXTERM_CACHESIZE;
-
   /* Set the initial display position */
 
   nxterm_home(priv);
@@ -150,8 +153,9 @@ FAR struct nxterm_state_s *
   ret = register_driver(devname, &g_nxterm_drvrops, 0666, priv);
   if (ret < 0)
     {
-      gdbg("Failed to register %s\n", devname);
+      gerr("ERROR: Failed to register %s\n", devname);
     }
+
   return (NXTERM)priv;
 
 errout:
diff --git a/graphics/nxterm/nxterm_scroll.c b/graphics/nxterm/nxterm_scroll.c
index 38e9f5cb6bfe7cb8619b213f0f740f96a0b2aa98..98d4e95e6494bef6988ae64df3d209bd3fda4de5 100644
--- a/graphics/nxterm/nxterm_scroll.c
+++ b/graphics/nxterm/nxterm_scroll.c
@@ -53,26 +53,6 @@
 
 #include "nxterm.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -85,6 +65,7 @@
  *   we can read the displays framebuffer memory, then the job is pretty
  *   easy.  However, many displays (such as SPI-based LCDs) are often read-
  *   only.
+ *
  ****************************************************************************/
 
 #ifdef CONFIG_NX_WRITEONLY
@@ -118,7 +99,7 @@ static inline void nxterm_movedisplay(FAR struct nxterm_state_s *priv,
       ret = priv->ops->fill(priv, &rect, priv->wndo.wcolor);
       if (ret < 0)
         {
-          gdbg("Fill failed: %d\n", errno);
+          gerr("ERROR: Fill failed: %d\n", errno);
         }
 
       /* Fill each character that might lie within in the bounding box */
@@ -141,7 +122,7 @@ static inline void nxterm_movedisplay(FAR struct nxterm_state_s *priv,
   ret = priv->ops->fill(priv, &rect, priv->wndo.wcolor);
   if (ret < 0)
     {
-      gdbg("Fill failed: %d\n", errno);
+      gerr("ERROR: Fill failed: %d\n", errno);
     }
 }
 #else
@@ -177,7 +158,7 @@ static inline void nxterm_movedisplay(FAR struct nxterm_state_s *priv,
   ret = priv->ops->move(priv, &rect, &offset);
   if (ret < 0)
     {
-      gdbg("Move failed: %d\n", errno);
+      gerr("ERROR: Move failed: %d\n", errno);
     }
 
   /* Finally, clear the vacated bottom part of the display */
@@ -187,7 +168,7 @@ static inline void nxterm_movedisplay(FAR struct nxterm_state_s *priv,
   ret = priv->ops->fill(priv, &rect, priv->wndo.wcolor);
   if (ret < 0)
     {
-      gdbg("Fill failed: %d\n", errno);
+      gerr("ERROR: Fill failed: %d\n", errno);
     }
 }
 #endif
@@ -219,7 +200,8 @@ void nxterm_scroll(FAR struct nxterm_state_s *priv, int scrollheight)
 
           for (j = i; j < priv->nchars-1; j++)
             {
-              memcpy(&priv->bm[j], &priv->bm[j+1], sizeof(struct nxterm_bitmap_s));
+              memcpy(&priv->bm[j], &priv->bm[j+1],
+                     sizeof(struct nxterm_bitmap_s));
             }
 
           /* Decrement the number of cached characters ('i' is not incremented
diff --git a/graphics/nxterm/nxterm_sem.c b/graphics/nxterm/nxterm_sem.c
index 3bdbf854104d67e357629f369e6c743fcfa2bbf0..cde892465374c28064020554bcf4bab9badac8d3 100644
--- a/graphics/nxterm/nxterm_sem.c
+++ b/graphics/nxterm/nxterm_sem.c
@@ -46,23 +46,7 @@
 
 #include "nxterm.h"
 
-#ifdef CONFIG_DEBUG
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
+#ifdef CONFIG_DEBUG_FEATURES
 
 /****************************************************************************
  * Public Functions
@@ -126,4 +110,4 @@ int nxterm_sempost(FAR struct nxterm_state_s *priv)
   return sem_post(&priv->exclsem);
 }
 
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_FEATURES */
diff --git a/graphics/nxterm/nxterm_unregister.c b/graphics/nxterm/nxterm_unregister.c
index e51e44c1739a2759f4639425665732b832427a79..06ad464881760ba41e02b856fcad692add8938b2 100644
--- a/graphics/nxterm/nxterm_unregister.c
+++ b/graphics/nxterm/nxterm_unregister.c
@@ -50,22 +50,6 @@
 
 #include "nxterm.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -89,7 +73,6 @@ void nxterm_unregister(NXTERM handle)
 {
   FAR struct nxterm_state_s *priv;
   char devname[NX_DEVNAME_SIZE];
-  int i;
 
   DEBUGASSERT(handle);
 
@@ -101,16 +84,9 @@ void nxterm_unregister(NXTERM handle)
   sem_destroy(&priv->waitsem);
 #endif
 
-  /* Free all allocated glyph bitmap */
+  /* Free the font cache */
 
-  for (i = 0; i < CONFIG_NXTERM_CACHESIZE; i++)
-    {
-      FAR struct nxterm_glyph_s *glyph = &priv->glyph[i];
-      if (glyph->bitmap)
-        {
-          kmm_free(glyph->bitmap);
-        }
-    }
+  nxf_cache_disconnect(priv->fcache);
 
   /* Unregister the driver */
 
diff --git a/graphics/nxterm/nxterm_vt100.c b/graphics/nxterm/nxterm_vt100.c
index 17e3356ca37416817bac7194aa2f5fb57671a7ec..1ee70e9ca17b3768d2ef9f8d71227cfff0f4eaa2 100644
--- a/graphics/nxterm/nxterm_vt100.c
+++ b/graphics/nxterm/nxterm_vt100.c
@@ -46,10 +46,6 @@
 
 #include "nxterm.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
diff --git a/graphics/nxterm/nxtk_register.c b/graphics/nxterm/nxtk_register.c
index c66b56a067758ec8d8aafb4f5a129c4840734f15..ae4e861246441091a71e77abafefc031544fed63 100644
--- a/graphics/nxterm/nxtk_register.c
+++ b/graphics/nxterm/nxtk_register.c
@@ -44,10 +44,6 @@
 
 #include "nxterm.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Private Function Prototypes
  ****************************************************************************/
diff --git a/graphics/nxterm/nxtool_register.c b/graphics/nxterm/nxtool_register.c
index f1618bd5b0cb36dc86bff564240b31e4e1b120f4..2a9de5d5596f9ef10dfc26215221cceb9b6fc3db 100644
--- a/graphics/nxterm/nxtool_register.c
+++ b/graphics/nxterm/nxtool_register.c
@@ -44,10 +44,6 @@
 
 #include "nxterm.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
 /****************************************************************************
  * Private Function Prototypes
  ****************************************************************************/
diff --git a/graphics/vnc/server/Kconfig b/graphics/vnc/server/Kconfig
index 157b62dfc9172ff8c5d3aa5c06b88a0358a236b2..bab68706d18758214e13c9d049e76b237a94bb9b 100644
--- a/graphics/vnc/server/Kconfig
+++ b/graphics/vnc/server/Kconfig
@@ -130,7 +130,7 @@ config VNCSERVER_INBUFFER_SIZE
 config VNCSERVER_DEBUG
 	bool "VNC Server debug"
 	default n
-	depends on DEBUG && !DEBUG_GRAPHICS
+	depends on DEBUG_FEATURES && !DEBUG_GRAPHICS
 	---help---
 		Normally VNC debug output is selected with DEBUG_GRAPHICS.  The VNC
 		server server suupport this special option to enable GRAPHICS debug
diff --git a/graphics/vnc/server/vnc_fbdev.c b/graphics/vnc/server/vnc_fbdev.c
index fb3b71a425740d248d48ebd170002a5fd6698226..54abc1dc5c3364711a3aa4163843fb5bacae1f46 100644
--- a/graphics/vnc/server/vnc_fbdev.c
+++ b/graphics/vnc/server/vnc_fbdev.c
@@ -45,10 +45,14 @@
 #include 
 
 #if defined(CONFIG_VNCSERVER_DEBUG) && !defined(CONFIG_DEBUG_GRAPHICS)
-#  undef  CONFIG_DEBUG
-#  undef  CONFIG_DEBUG_VERBOSE
-#  define CONFIG_DEBUG          1
-#  define CONFIG_DEBUG_VERBOSE  1
+#  undef  CONFIG_DEBUG_FEATURES
+#  undef  CONFIG_DEBUG_ERROR
+#  undef  CONFIG_DEBUG_WARN
+#  undef  CONFIG_DEBUG_INFO
+#  define CONFIG_DEBUG_FEATURES 1
+#  define CONFIG_DEBUG_ERROR    1
+#  define CONFIG_DEBUG_WARN     1
+#  define CONFIG_DEBUG_INFO     1
 #  define CONFIG_DEBUG_GRAPHICS 1
 #endif
 #include 
@@ -162,7 +166,7 @@ static int up_getvideoinfo(FAR struct fb_vtable_s *vtable,
   FAR struct vnc_fbinfo_s *fbinfo = (FAR struct vnc_fbinfo_s *)vtable;
   FAR struct vnc_session_s *session;
 
-  gvdbg("vtable=%p vinfo=%p\n", vtable, vinfo);
+  ginfo("vtable=%p vinfo=%p\n", vtable, vinfo);
 
   DEBUGASSERT(fbinfo != NULL && vinfo != NULL);
   if (fbinfo != NULL && vinfo != NULL)
@@ -172,7 +176,7 @@ static int up_getvideoinfo(FAR struct fb_vtable_s *vtable,
 
       if (session == NULL || session->state != VNCSERVER_RUNNING)
         {
-          gdbg("ERROR: session is not connected\n");
+          gerr("ERROR: session is not connected\n");
           return -ENOTCONN;
         }
 
@@ -189,7 +193,7 @@ static int up_getvideoinfo(FAR struct fb_vtable_s *vtable,
       return OK;
     }
 
-  gdbg("ERROR: Invalid arguments\n");
+  gerr("ERROR: Invalid arguments\n");
   return -EINVAL;
 }
 
@@ -203,7 +207,7 @@ static int up_getplaneinfo(FAR struct fb_vtable_s *vtable, int planeno,
   FAR struct vnc_fbinfo_s *fbinfo = (FAR struct vnc_fbinfo_s *)vtable;
   FAR struct vnc_session_s *session;
 
-  gvdbg("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
+  ginfo("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
 
   DEBUGASSERT(fbinfo != NULL && pinfo != NULL && planeno == 0);
   if (fbinfo != NULL && pinfo != NULL && planeno == 0)
@@ -213,7 +217,7 @@ static int up_getplaneinfo(FAR struct fb_vtable_s *vtable, int planeno,
 
       if (session == NULL || session->state != VNCSERVER_RUNNING)
         {
-          gdbg("ERROR: session is not connected\n");
+          gerr("ERROR: session is not connected\n");
           return -ENOTCONN;
         }
 
@@ -233,7 +237,7 @@ static int up_getplaneinfo(FAR struct fb_vtable_s *vtable, int planeno,
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  gerr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 
@@ -249,7 +253,7 @@ static int up_getcmap(FAR struct fb_vtable_s *vtable,
   FAR struct vnc_session_s *session;
   int i;
 
-  gvdbg("vtable=%p cmap=%p\n", vtable, cmap);
+  ginfo("vtable=%p cmap=%p\n", vtable, cmap);
 
   DEBUGASSERT(fbinfo != NULL && cmap != NULL);
 
@@ -260,17 +264,17 @@ static int up_getcmap(FAR struct fb_vtable_s *vtable,
 
       if (session == NULL || session->state != VNCSERVER_RUNNING)
         {
-          gdbg("ERROR: session is not connected\n");
+          gerr("ERROR: session is not connected\n");
           return -ENOTCONN;
         }
 
-      gvdbg("first=%d len=%d\n", vcmap->first, cmap->len);
+      ginfo("first=%d len=%d\n", vcmap->first, cmap->len);
 #warning Missing logic
 
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  gerr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 #endif
@@ -286,7 +290,7 @@ static int up_putcmap(FAR struct fb_vtable_s *vtable, FAR const struct fb_cmap_s
   FAR struct vnc_session_s *session;
   int i;
 
-  gvdbg("vtable=%p cmap=%p\n", vtable, cmap);
+  ginfo("vtable=%p cmap=%p\n", vtable, cmap);
 
   DEBUGASSERT(fbinfo != NULL && cmap != NULL);
 
@@ -297,17 +301,17 @@ static int up_putcmap(FAR struct fb_vtable_s *vtable, FAR const struct fb_cmap_s
 
       if (session == NULL || session->state != VNCSERVER_RUNNING)
         {
-          gdbg("ERROR: session is not connected\n");
+          gerr("ERROR: session is not connected\n");
           return -ENOTCONN;
         }
 
-      gvdbg("first=%d len=%d\n", vcmap->first, cmap->len);
+      ginfo("first=%d len=%d\n", vcmap->first, cmap->len);
 #warning Missing logic
 
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  gerr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 #endif
@@ -324,7 +328,7 @@ static int up_getcursor(FAR struct fb_vtable_s *vtable,
   FAR struct vnc_session_s *session;
   int i;
 
-  gvdbg("vtable=%p attrib=%p\n", vtable, attrib);
+  ginfo("vtable=%p attrib=%p\n", vtable, attrib);
 
   DEBUGASSERT(fbinfo != NULL && attrib != NULL);
 
@@ -335,7 +339,7 @@ static int up_getcursor(FAR struct fb_vtable_s *vtable,
 
       if (session == NULL || session->state != VNCSERVER_RUNNING)
         {
-          gdbg("ERROR: session is not connected\n");
+          gerr("ERROR: session is not connected\n");
           return -ENOTCONN;
         }
 
@@ -343,7 +347,8 @@ static int up_getcursor(FAR struct fb_vtable_s *vtable,
 
       return OK;
     }
-  gdbg("Returning EINVAL\n");
+
+  gerr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 #endif
@@ -360,7 +365,7 @@ static int up_setcursor(FAR struct fb_vtable_s *vtable,
   FAR struct vnc_session_s *session;
   int i;
 
-  gvdbg("vtable=%p settings=%p\n", vtable, settings);
+  ginfo("vtable=%p settings=%p\n", vtable, settings);
 
   DEBUGASSERT(fbinfo != NULL && settings != NULL);
 
@@ -371,11 +376,11 @@ static int up_setcursor(FAR struct fb_vtable_s *vtable,
 
       if (session == NULL || session->state != VNCSERVER_RUNNING)
         {
-          gdbg("ERROR: session is not connected\n");
+          gerr("ERROR: session is not connected\n");
           return -ENOTCONN;
         }
 
-      gvdbg("flags:   %02x\n", settings->flags);
+      ginfo("flags:   %02x\n", settings->flags);
       if ((settings->flags & FB_CUR_SETPOSITION) != 0)
         {
 #warning Missing logic
@@ -396,7 +401,7 @@ static int up_setcursor(FAR struct fb_vtable_s *vtable,
       return OK;
     }
 
-  gdbg("Returning EINVAL\n");
+  gerr("ERROR: Returning EINVAL\n");
   return -EINVAL;
 }
 #endif
@@ -435,7 +440,7 @@ static int vnc_start_server(int display)
 
   /* Start the VNC server kernel thread. */
 
-  gvdbg("Starting the VNC server for display %d\n", display);
+  ginfo("Starting the VNC server for display %d\n", display);
 
   g_fbstartup[display].result = -EBUSY;
   sem_reset(&g_fbstartup[display].fbinit, 0);
@@ -452,7 +457,7 @@ static int vnc_start_server(int display)
                        (main_t)vnc_server, argv);
   if (pid < 0)
     {
-      gdbg("ERROR: Failed to start the VNC server: %d\n", (int)pid);
+      gerr("ERROR: Failed to start the VNC server: %d\n", (int)pid);
       return (int)pid;
     }
 
@@ -580,11 +585,11 @@ static inline int vnc_wait_connect(int display)
       result = g_fbstartup[display].result;
       if (result != -EBUSY)
         {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
           if (result < 0)
             {
               DEBUGASSERT(g_vnc_sessions[display] == NULL);
-              gdbg("ERROR: VNC server startup failed: %d\n", result);
+              gerr("ERROR: VNC server startup failed: %d\n", result);
             }
           else
             {
@@ -630,7 +635,7 @@ int up_fbinitialize(int display)
   ret = vnc_start_server(display);
   if (ret < 0)
     {
-      gvdbg("ERROR: vnc_start_server() failed: %d\n", ret);
+      gerr("ERROR: vnc_start_server() failed: %d\n", ret);
       return ret;
     }
 
@@ -639,7 +644,7 @@ int up_fbinitialize(int display)
   ret = vnc_wait_connect(display);
   if (ret < 0)
     {
-      gvdbg("ERROR: vnc_wait_connect() failed: %d\n", ret);
+      gerr("ERROR: vnc_wait_connect() failed: %d\n", ret);
     }
 
   return ret;
@@ -711,7 +716,7 @@ int vnc_fbinitialize(int display, vnc_kbdout_t kbdout,
   ret = vnc_start_server(display);
   if (ret < 0)
     {
-      gvdbg("ERROR: vnc_start_server() failed: %d\n", ret);
+      gerr("ERROR: vnc_start_server() failed: %d\n", ret);
       return ret;
     }
 
@@ -720,7 +725,7 @@ int vnc_fbinitialize(int display, vnc_kbdout_t kbdout,
   ret = vnc_wait_start(display);
   if (ret < 0)
     {
-      gvdbg("ERROR: vnc_wait_start() failed: %d\n", ret);
+      gerr("ERROR: vnc_wait_start() failed: %d\n", ret);
       return ret;
     }
 
@@ -880,7 +885,7 @@ void nx_notify_rectangle(FAR NX_PLANEINFOTYPE *pinfo,
       ret = vnc_update_rectangle(session, rect, true);
       if (ret < 0)
         {
-          gdbg("ERROR: vnc_update_rectangle failed: %d\n", ret);
+          gerr("ERROR: vnc_update_rectangle failed: %d\n", ret);
         }
     }
 }
diff --git a/graphics/vnc/server/vnc_negotiate.c b/graphics/vnc/server/vnc_negotiate.c
index 1d7e28d814866caf4e601c5f1a6d5e81c3071472..910d0b6f265c76fbc6b9259f435e5ddd8535a7bf 100644
--- a/graphics/vnc/server/vnc_negotiate.c
+++ b/graphics/vnc/server/vnc_negotiate.c
@@ -45,10 +45,14 @@
 #include 
 
 #if defined(CONFIG_VNCSERVER_DEBUG) && !defined(CONFIG_DEBUG_GRAPHICS)
-#  undef  CONFIG_DEBUG
-#  undef  CONFIG_DEBUG_VERBOSE
-#  define CONFIG_DEBUG          1
-#  define CONFIG_DEBUG_VERBOSE  1
+#  undef  CONFIG_DEBUG_FEATURES
+#  undef  CONFIG_DEBUG_ERROR
+#  undef  CONFIG_DEBUG_WARN
+#  undef  CONFIG_DEBUG_INFO
+#  define CONFIG_DEBUG_FEATURES 1
+#  define CONFIG_DEBUG_ERROR    1
+#  define CONFIG_DEBUG_WARN     1
+#  define CONFIG_DEBUG_INFO     1
 #  define CONFIG_DEBUG_GRAPHICS 1
 #endif
 #include 
@@ -128,7 +132,7 @@ int vnc_negotiate(FAR struct vnc_session_s *session)
   if (ret < 0)
     {
       errcode = get_errno();
-      gdbg("ERROR: Failed to set receive timeout: %d\n", errcode);
+      gerr("ERROR: Failed to set receive timeout: %d\n", errcode);
       DEBUGASSERT(errcode > 0);
       return -errcode;
     }
@@ -136,14 +140,14 @@ int vnc_negotiate(FAR struct vnc_session_s *session)
 
   /* Inform the client of the VNC protocol version */
 
-  gvdbg("Send protocol version: %s\n", g_vncproto);
+  ginfo("Send protocol version: %s\n", g_vncproto);
 
   len = strlen(g_vncproto);
   nsent = psock_send(&session->connect, g_vncproto, len, 0);
   if (nsent < 0)
     {
       errcode = get_errno();
-      gdbg("ERROR: Send ProtocolVersion failed: %d\n", errcode);
+      gerr("ERROR: Send ProtocolVersion failed: %d\n", errcode);
       DEBUGASSERT(errcode > 0);
       return -errcode;
     }
@@ -152,19 +156,19 @@ int vnc_negotiate(FAR struct vnc_session_s *session)
 
   /* Receive the echo of the protocol string */
 
-  gvdbg("Receive echo from VNC client\n");
+  ginfo("Receive echo from VNC client\n");
 
   nrecvd = psock_recv(&session->connect, session->inbuf, len, 0);
   if (nrecvd < 0)
     {
       errcode = get_errno();
-      gdbg("ERROR: Receive protocol confirmation failed: %d\n", errcode);
+      gerr("ERROR: Receive protocol confirmation failed: %d\n", errcode);
       DEBUGASSERT(errcode > 0);
       return -errcode;
     }
   else if (nrecvd == 0)
     {
-      gdbg("Connection closed\n");
+      gwarn("WARNING: Connection closed\n");
       return -ECONNABORTED;
     }
 
@@ -176,7 +180,7 @@ int vnc_negotiate(FAR struct vnc_session_s *session)
    * any stinkin' security.
    */
 
-  gvdbg("Send SecurityType\n");
+  ginfo("Send SecurityType\n");
 
   sectype = (FAR struct rfb_sectype_s *)session->outbuf;
   rfb_putbe32(sectype->type, RFB_SECTYPE_NONE);
@@ -186,7 +190,7 @@ int vnc_negotiate(FAR struct vnc_session_s *session)
   if (nsent < 0)
     {
       errcode = get_errno();
-      gdbg("ERROR: Send Security failed: %d\n", errcode);
+      gerr("ERROR: Send Security failed: %d\n", errcode);
       DEBUGASSERT(errcode > 0);
       return -errcode;
     }
@@ -198,7 +202,7 @@ int vnc_negotiate(FAR struct vnc_session_s *session)
    * only option offered.
    */
 
-  gvdbg("Send SupportedSecurityTypes\n");
+  ginfo("Send SupportedSecurityTypes\n");
 
   sectypes         = (FAR struct rfb_supported_sectypes_s *)session->outbuf;
   sectypes->ntypes = 1;
@@ -209,7 +213,7 @@ int vnc_negotiate(FAR struct vnc_session_s *session)
   if (nsent < 0)
     {
       errcode = get_errno();
-      gdbg("ERROR: Send SupportedSecurityTypes failed: %d\n", errcode);
+      gerr("ERROR: Send SupportedSecurityTypes failed: %d\n", errcode);
       DEBUGASSERT(errcode > 0);
       return -errcode;
     }
@@ -221,7 +225,7 @@ int vnc_negotiate(FAR struct vnc_session_s *session)
    * type is to be used on the connection.
    */
 
-  gvdbg("Receive SecurityType\n");
+  ginfo("Receive SecurityType\n");
 
   sectype = (FAR struct rfb_selected_sectype_s *)session->inbuf;
 
@@ -230,25 +234,25 @@ int vnc_negotiate(FAR struct vnc_session_s *session)
   if (nrecvd < 0)
     {
       errcode = get_errno();
-      gdbg("ERROR: Receive SecurityType failed: %d\n", errcode);
+      gerr("ERROR: Receive SecurityType failed: %d\n", errcode);
       DEBUGASSERT(errcode > 0);
       return -errcode;
     }
   else if (nrecvd == 0)
     {
-      gdbg("Connection closed\n");
+      gwarn("WARNING: Connection closed\n");
       return -ECONNABORTED;
     }
 
   DEBUGASSERT(nrecvd == sizeof(struct rfb_selected_sectype_s));
 
-  gvdbg("Send SecurityResult\n");
+  ginfo("Send SecurityResult\n");
 
   secresult = (FAR struct rfb_sectype_result_s *)session->outbuf;
 
   if (sectype->type != RFB_SECTYPE_NONE)
     {
-      gdbg("ERROR: Received unsupported SecurityType: %d\n", sectype->type);
+      gerr("ERROR: Received unsupported SecurityType: %d\n", sectype->type);
 
       /* REVISIT: Should send the reason string here */
 
@@ -259,14 +263,14 @@ int vnc_negotiate(FAR struct vnc_session_s *session)
       if (nsent < 0)
         {
           errcode = get_errno();
-          gdbg("ERROR: Send SecurityResult failed: %d\n", errcode);
+          gerr("ERROR: Send SecurityResult failed: %d\n", errcode);
           DEBUGASSERT(errcode > 0);
           return -errcode;
         }
 
       DEBUGASSERT(nsent == sizeof(struct rfb_sectype_result_s));
 
-      gvdbg("Send failure reason\n");
+      ginfo("Send failure reason\n");
 
       secfail = (FAR struct rfb_sectype_fail_s *)session->outbuf;
       len     = strlen(g_nosecurity);
@@ -278,7 +282,7 @@ int vnc_negotiate(FAR struct vnc_session_s *session)
       if (nsent < 0)
         {
           errcode = get_errno();
-          gdbg("ERROR: Send failure reason failed: %d\n", errcode);
+          gerr("ERROR: Send failure reason failed: %d\n", errcode);
           DEBUGASSERT(errcode > 0);
           return -errcode;
         }
@@ -294,7 +298,7 @@ int vnc_negotiate(FAR struct vnc_session_s *session)
   if (nsent < 0)
     {
       errcode = get_errno();
-      gdbg("ERROR: Send SecurityResult failed: %d\n", errcode);
+      gerr("ERROR: Send SecurityResult failed: %d\n", errcode);
       DEBUGASSERT(errcode > 0);
       return -errcode;
     }
@@ -312,20 +316,20 @@ int vnc_negotiate(FAR struct vnc_session_s *session)
    * In this implementation, the sharing flag is ignored.
    */
 
-  gvdbg("Receive ClientInit\n");
+  ginfo("Receive ClientInit\n");
 
   nrecvd = psock_recv(&session->connect, session->inbuf,
                       sizeof(struct rfb_clientinit_s), 0);
   if (nrecvd < 0)
     {
       errcode = get_errno();
-      gdbg("ERROR: Receive ClientInit failed: %d\n", errcode);
+      gerr("ERROR: Receive ClientInit failed: %d\n", errcode);
       DEBUGASSERT(errcode > 0);
       return -errcode;
     }
   else if (nrecvd == 0)
     {
-      gdbg("Connection closed\n");
+      gwarn("WARNING: Connection closed\n");
       return -ECONNABORTED;
     }
 
@@ -344,7 +348,7 @@ int vnc_negotiate(FAR struct vnc_session_s *session)
    *   Very Low (8 colors) - RGB3 1:1:1 (TrueColor)
    */
 
-  gvdbg("Send ServerInit\n");
+  ginfo("Send ServerInit\n");
 
   serverinit          = (FAR struct rfb_serverinit_s *)session->outbuf;
 
@@ -375,7 +379,7 @@ int vnc_negotiate(FAR struct vnc_session_s *session)
   if (nsent < 0)
     {
       errcode = get_errno();
-      gdbg("ERROR: Send ServerInit failed: %d\n", errcode);
+      gerr("ERROR: Send ServerInit failed: %d\n", errcode);
       return -errcode;
     }
 
@@ -385,7 +389,7 @@ int vnc_negotiate(FAR struct vnc_session_s *session)
    * This may override some of our framebuffer settings.
    */
 
-  gvdbg("Receive SetPixelFormat\n");
+  ginfo("Receive SetPixelFormat\n");
 
   setformat = (FAR struct rfb_setpixelformat_s *)session->inbuf;
 
@@ -394,25 +398,25 @@ int vnc_negotiate(FAR struct vnc_session_s *session)
   if (nrecvd < 0)
     {
       errcode = get_errno();
-      gdbg("ERROR: Receive SetPixelFormat failed: %d\n", errcode);
+      gerr("ERROR: Receive SetPixelFormat failed: %d\n", errcode);
       DEBUGASSERT(errcode > 0);
       return -errcode;
     }
   else if (nrecvd == 0)
     {
-      gdbg("Connection closed\n");
+      gwarn("WARNING: Connection closed\n");
       return -ECONNABORTED;
     }
   else if (nrecvd != sizeof(struct rfb_setpixelformat_s))
     {
       /* Must not be a SetPixelFormat message? */
 
-      gdbg("ERROR: SetFormat wrong size: %d\n", (int)nrecvd);
+      gerr("ERROR: SetFormat wrong size: %d\n", (int)nrecvd);
       return -EPROTO;
     }
   else if (setformat->msgtype != RFB_SETPIXELFMT_MSG)
     {
-      gdbg("ERROR: Not a SetPixelFormat message: %d\n",
+      gerr("ERROR: Not a SetPixelFormat message: %d\n",
            (int)setformat->msgtype);
       return -EPROTO;
     }
@@ -426,13 +430,13 @@ int vnc_negotiate(FAR struct vnc_session_s *session)
     {
       /* We do not support this pixel format */
 
-      gdbg("ERROR: PixelFormat not supported\n");
+      gerr("ERROR: PixelFormat not supported\n");
       return ret;
     }
 
   /* Receive supported encoding types from client. */
 
-  gvdbg("Receive encoding types\n");
+  ginfo("Receive encoding types\n");
 
   encodings = (FAR struct rfb_setencodings_s *)session->inbuf;
 
@@ -441,13 +445,13 @@ int vnc_negotiate(FAR struct vnc_session_s *session)
   if (nrecvd < 0)
     {
       errcode = get_errno();
-      gdbg("ERROR: Receive SetEncodings failed: %d\n", errcode);
+      gerr("ERROR: Receive SetEncodings failed: %d\n", errcode);
       DEBUGASSERT(errcode > 0);
       return -errcode;
     }
   else if (nrecvd == 0)
     {
-      gdbg("Connection closed\n");
+      gwarn("WARNING: Connection closed\n");
       return -ECONNABORTED;
     }
 
@@ -460,7 +464,7 @@ int vnc_negotiate(FAR struct vnc_session_s *session)
       ret = vnc_client_encodings(session, encodings);
       if (ret < 0)
         {
-          gdbg("ERROR: vnc_set_encodings failed: %d\n", ret);
+          gerr("ERROR: vnc_set_encodings failed: %d\n", ret);
           return ret;
         }
     }
@@ -492,41 +496,41 @@ int vnc_client_pixelformat(FAR struct vnc_session_s *session,
     {
       /* At present, we support only TrueColor formats */
 
-      gdbg("ERROR: No support for palette colors\n");
+      gerr("ERROR: No support for palette colors\n");
       return -ENOSYS;
     }
 
   if (pixelfmt->bpp == 8 && pixelfmt->depth == 6)
     {
-      gvdbg("Client pixel format: RGB8 2:2:2\n");
+      ginfo("Client pixel format: RGB8 2:2:2\n");
       session->colorfmt  = FB_FMT_RGB8_222;
       session->bpp       = 8;
       session->bigendian = false;
     }
   else if (pixelfmt->bpp == 8 && pixelfmt->depth == 8)
     {
-      gvdbg("Client pixel format: RGB8 3:3:2\n");
+      ginfo("Client pixel format: RGB8 3:3:2\n");
       session->colorfmt  = FB_FMT_RGB8_332;
       session->bpp       = 8;
       session->bigendian = false;
     }
   else if (pixelfmt->bpp == 16 && pixelfmt->depth == 15)
     {
-      gvdbg("Client pixel format: RGB16 5:5:5\n");
+      ginfo("Client pixel format: RGB16 5:5:5\n");
       session->colorfmt  = FB_FMT_RGB16_555;
       session->bpp       = 16;
       session->bigendian = (pixelfmt->bigendian != 0) ? true : false;
     }
   else if (pixelfmt->bpp == 16 && pixelfmt->depth == 16)
     {
-      gvdbg("Client pixel format: RGB16 5:6:5\n");
+      ginfo("Client pixel format: RGB16 5:6:5\n");
       session->colorfmt  = FB_FMT_RGB16_565;
       session->bpp       = 16;
       session->bigendian = (pixelfmt->bigendian != 0) ? true : false;
     }
   else if (pixelfmt->bpp == 32 && pixelfmt->depth == 24)
     {
-      gvdbg("Client pixel format: RGB32 8:8:8\n");
+      ginfo("Client pixel format: RGB32 8:8:8\n");
       session->colorfmt  = FB_FMT_RGB32;
       session->bpp       = 32;
       session->bigendian = (pixelfmt->bigendian != 0) ? true : false;
@@ -541,7 +545,7 @@ int vnc_client_pixelformat(FAR struct vnc_session_s *session,
     {
       /* We do not support any other conversions */
 
-      gdbg("ERROR: No support for this BPP=%d and depth=%d\n",
+      gerr("ERROR: No support for this BPP=%d and depth=%d\n",
             pixelfmt->bpp, pixelfmt->depth);
       return -ENOSYS;
     }
diff --git a/graphics/vnc/server/vnc_raw.c b/graphics/vnc/server/vnc_raw.c
index 947cbfe9055f8a5acc9ab58d3dbd600f5bfdd0d6..8e58cfc1d37dd068051773a8d96b8ecf8b6748ab 100644
--- a/graphics/vnc/server/vnc_raw.c
+++ b/graphics/vnc/server/vnc_raw.c
@@ -44,10 +44,14 @@
 #include 
 
 #if defined(CONFIG_VNCSERVER_DEBUG) && !defined(CONFIG_DEBUG_GRAPHICS)
-#  undef  CONFIG_DEBUG
-#  undef  CONFIG_DEBUG_VERBOSE
-#  define CONFIG_DEBUG          1
-#  define CONFIG_DEBUG_VERBOSE  1
+#  undef  CONFIG_DEBUG_FEATURES
+#  undef  CONFIG_DEBUG_ERROR
+#  undef  CONFIG_DEBUG_WARN
+#  undef  CONFIG_DEBUG_INFO
+#  define CONFIG_DEBUG_FEATURES 1
+#  define CONFIG_DEBUG_ERROR    1
+#  define CONFIG_DEBUG_WARN     1
+#  define CONFIG_DEBUG_INFO     1
 #  define CONFIG_DEBUG_GRAPHICS 1
 #endif
 #include 
@@ -341,7 +345,7 @@ int vnc_raw(FAR struct vnc_session_s *session, FAR struct nxgl_rect_s *rect)
         break;
 
       default:
-        gdbg("ERROR: Unrecognized color format: %d\n", session->colorfmt);
+        gerr("ERROR: Unrecognized color format: %d\n", session->colorfmt);
         return -EINVAL;
     }
 
@@ -479,7 +483,7 @@ int vnc_raw(FAR struct vnc_session_s *session, FAR struct nxgl_rect_s *rect)
                   if (nsent < 0)
                     {
                       int errcode = get_errno();
-                      gdbg("ERROR: Send FrameBufferUpdate failed: %d\n",
+                      gerr("ERROR: Send FrameBufferUpdate failed: %d\n",
                            errcode);
                       DEBUGASSERT(errcode > 0);
                       return -errcode;
@@ -491,7 +495,7 @@ int vnc_raw(FAR struct vnc_session_s *session, FAR struct nxgl_rect_s *rect)
                 }
               while (size > 0);
 
-              updvdbg("Sent {(%d, %d),(%d, %d)}\n",
+              updinfo("Sent {(%d, %d),(%d, %d)}\n",
                       x, y, x + updwidth -1, y + updheight - 1);
             }
         }
diff --git a/graphics/vnc/server/vnc_receiver.c b/graphics/vnc/server/vnc_receiver.c
index 4f25d4931eb3a4016b5e9ee7f6f23d291ec1a682..8f4e0988af88c4db1b38a56feae799a41abf305c 100644
--- a/graphics/vnc/server/vnc_receiver.c
+++ b/graphics/vnc/server/vnc_receiver.c
@@ -43,10 +43,14 @@
 #include 
 
 #if defined(CONFIG_VNCSERVER_DEBUG) && !defined(CONFIG_DEBUG_GRAPHICS)
-#  undef  CONFIG_DEBUG
-#  undef  CONFIG_DEBUG_VERBOSE
-#  define CONFIG_DEBUG          1
-#  define CONFIG_DEBUG_VERBOSE  1
+#  undef  CONFIG_DEBUG_FEATURES
+#  undef  CONFIG_DEBUG_ERROR
+#  undef  CONFIG_DEBUG_WARN
+#  undef  CONFIG_DEBUG_INFO
+#  define CONFIG_DEBUG_FEATURES 1
+#  define CONFIG_DEBUG_ERROR    1
+#  define CONFIG_DEBUG_WARN     1
+#  define CONFIG_DEBUG_INFO     1
 #  define CONFIG_DEBUG_GRAPHICS 1
 #endif
 #include 
@@ -101,7 +105,7 @@ int vnc_read_remainder(FAR struct vnc_session_s *session, size_t msglen,
       if (nrecvd < 0)
         {
           errcode = get_errno();
-          gdbg("ERROR: Receive message failed: %d\n", errcode);
+          gerr("ERROR: Receive message failed: %d\n", errcode);
           DEBUGASSERT(errcode > 0);
           return -errcode;
         }
@@ -138,7 +142,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
   int ret;
 
   DEBUGASSERT(session);
-  gvdbg("Receiver running for Display %d\n", session->display);
+  ginfo("Receiver running for Display %d\n", session->display);
 
 #ifdef CONFIG_NET_SOCKOPTS
   /* Disable the receive timeout so that we will wait indefinitely for the
@@ -152,7 +156,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
   if (ret < 0)
     {
       errcode = get_errno();
-      gdbg("ERROR: Failed to disable receive timeout: %d\n", errcode);
+      gerr("ERROR: Failed to disable receive timeout: %d\n", errcode);
       DEBUGASSERT(errcode > 0);
       return -errcode;
     }
@@ -171,7 +175,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
       if (nrecvd < 0)
         {
           errcode = get_errno();
-          gdbg("ERROR: Receive byte failed: %d\n", errcode);
+          gerr("ERROR: Receive byte failed: %d\n", errcode);
           DEBUGASSERT(errcode > 0);
           return -errcode;
         }
@@ -182,7 +186,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
 
       else if (nrecvd == 0)
         {
-          gdbg("Connection closed\n", errcode);
+          gwarn("WARNING: Connection closed\n", errcode);
           return OK;
         }
 
@@ -196,7 +200,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
         {
           case RFB_SETPIXELFMT_MSG:    /* SetPixelFormat */
             {
-              gvdbg("Received SetPixelFormat\n");
+              ginfo("Received SetPixelFormat\n");
 
               /* Read the rest of the SetPixelFormat message */
 
@@ -205,7 +209,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
                                        1);
               if (ret < 0)
                 {
-                  gdbg("ERROR: Failed to read SetPixelFormat message: %d\n",
+                  gerr("ERROR: Failed to read SetPixelFormat message: %d\n",
                        ret);
                 }
               else
@@ -219,7 +223,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
                       /* We do not support this pixel format */
                       /* REVISIT:  We are going to be putting garbage on the RFB */
 
-                      gdbg("ERROR: PixelFormat not supported\n");
+                      gerr("ERROR: PixelFormat not supported\n");
                     }
                 }
             }
@@ -230,7 +234,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
               FAR struct rfb_setencodings_s *encodings;
               unsigned int nencodings;
 
-              gvdbg("Received SetEncodings\n");
+              ginfo("Received SetEncodings\n");
 
               /* Read the SetEncodings message without the following
                * encodings.
@@ -241,7 +245,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
                                        1);
               if (ret < 0)
                 {
-                  gdbg("ERROR: Failed to read SetEncodings message: %d\n",
+                  gerr("ERROR: Failed to read SetEncodings message: %d\n",
                        ret);
                 }
               else
@@ -256,7 +260,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
                                            SIZEOF_RFB_SERVERINIT_S(0));
                   if (ret < 0)
                     {
-                      gdbg("ERROR: Failed to read encodings: %d\n",
+                      gerr("ERROR: Failed to read encodings: %d\n",
                            ret);
                     }
                   else
@@ -266,7 +270,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
                       ret = vnc_client_encodings(session, encodings);
                       if (ret < 0)
                         {
-                          gdbg("ERROR: vnc_set_encodings failed: %d\n", ret);
+                          gerr("ERROR: vnc_set_encodings failed: %d\n", ret);
                         }
                     }
                 }
@@ -278,7 +282,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
               FAR struct rfb_fbupdatereq_s *update;
               struct nxgl_rect_s rect;
 
-              gvdbg("Received FramebufferUpdateRequest\n");
+              ginfo("Received FramebufferUpdateRequest\n");
 
               /* Read the rest of the SetPixelFormat message */
 
@@ -287,7 +291,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
                                        1);
               if (ret < 0)
                 {
-                  gdbg("ERROR: Failed to read FramebufferUpdateRequest message: %d\n",
+                  gerr("ERROR: Failed to read FramebufferUpdateRequest message: %d\n",
                        ret);
                 }
               else
@@ -304,7 +308,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
                   ret = vnc_update_rectangle(session, &rect, false);
                   if (ret < 0)
                     {
-                      gdbg("ERROR: Failed to queue update: %d\n", ret);
+                      gerr("ERROR: Failed to queue update: %d\n", ret);
                     }
                 }
             }
@@ -314,7 +318,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
             {
               FAR struct rfb_keyevent_s *keyevent;
 
-              gvdbg("Received KeyEvent\n");
+              ginfo("Received KeyEvent\n");
 
               /* Read the rest of the KeyEvent message */
 
@@ -323,7 +327,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
                                        1);
               if (ret < 0)
                 {
-                  gdbg("ERROR: Failed to read KeyEvent message: %d\n",
+                  gerr("ERROR: Failed to read KeyEvent message: %d\n",
                        ret);
                 }
               else
@@ -343,7 +347,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
               FAR struct rfb_pointerevent_s *event;
               uint8_t buttons;
 #endif
-              gvdbg("Received PointerEvent\n");
+              ginfo("Received PointerEvent\n");
 
               /* Read the rest of the PointerEvent message */
 
@@ -352,7 +356,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
                                        1);
               if (ret < 0)
                 {
-                  gdbg("ERROR: Failed to read PointerEvent message: %d\n",
+                  gerr("ERROR: Failed to read PointerEvent message: %d\n",
                        ret);
                 }
 #ifdef CONFIG_NX_XYINPUT
@@ -397,7 +401,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
               FAR struct rfb_clientcuttext_s *cuttext;
               uint32_t length;
 
-              gvdbg("Received ClientCutText\n");
+              ginfo("Received ClientCutText\n");
 
               /* Read the ClientCutText message without the following
                * text.
@@ -408,7 +412,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
                                        1);
               if (ret < 0)
                 {
-                  gdbg("ERROR: Failed to read ClientCutText message: %d\n",
+                  gerr("ERROR: Failed to read ClientCutText message: %d\n",
                        ret);
                 }
               else
@@ -422,7 +426,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
                                            SIZEOF_RFB_CLIENTCUTTEXT_S(0));
                   if (ret < 0)
                     {
-                      gdbg("ERROR: Failed to read text: %d\n",
+                      gerr("ERROR: Failed to read text: %d\n",
                            ret);
                     }
                   else
@@ -434,7 +438,7 @@ int vnc_receiver(FAR struct vnc_session_s *session)
             break;
 
           default:
-            gdbg("ERROR: Unsynchronized, msgtype=%d\n", session->inbuf[0]);
+            gerr("ERROR: Unsynchronized, msgtype=%d\n", session->inbuf[0]);
             return -EPROTO;
         }
     }
diff --git a/graphics/vnc/server/vnc_rre.c b/graphics/vnc/server/vnc_rre.c
index a216a4952491e498d9056c79830448b7c9c218f3..cc0d3c931798afc8b21c728e4747ae2937425f2f 100644
--- a/graphics/vnc/server/vnc_rre.c
+++ b/graphics/vnc/server/vnc_rre.c
@@ -44,10 +44,14 @@
 #include 
 
 #if defined(CONFIG_VNCSERVER_DEBUG) && !defined(CONFIG_DEBUG_GRAPHICS)
-#  undef  CONFIG_DEBUG
-#  undef  CONFIG_DEBUG_VERBOSE
-#  define CONFIG_DEBUG          1
-#  define CONFIG_DEBUG_VERBOSE  1
+#  undef  CONFIG_DEBUG_FEATURES
+#  undef  CONFIG_DEBUG_ERROR
+#  undef  CONFIG_DEBUG_WARN
+#  undef  CONFIG_DEBUG_INFO
+#  define CONFIG_DEBUG_FEATURES 1
+#  define CONFIG_DEBUG_ERROR    1
+#  define CONFIG_DEBUG_WARN     1
+#  define CONFIG_DEBUG_INFO     1
 #  define CONFIG_DEBUG_GRAPHICS 1
 #endif
 #include 
@@ -272,7 +276,7 @@ int vnc_rre(FAR struct vnc_session_s *session, FAR struct nxgl_rect_s *rect)
                 break;
 
               default:
-                gdbg("ERROR: Unrecognized color format: %d\n",
+                gerr("ERROR: Unrecognized color format: %d\n",
                      session->colorfmt);
                 return -EINVAL;
             }
@@ -292,14 +296,14 @@ int vnc_rre(FAR struct vnc_session_s *session, FAR struct nxgl_rect_s *rect)
               if (nsent < 0)
                 {
                   int errcode = get_errno();
-                  gdbg("ERROR: Send RRE FrameBufferUpdate failed: %d\n",
+                  gerr("ERROR: Send RRE FrameBufferUpdate failed: %d\n",
                        errcode);
                   DEBUGASSERT(errcode > 0);
                   return -errcode;
                 }
 
               DEBUGASSERT(nsent == nbytes);
-              updvdbg("Sent {(%d, %d),(%d, %d)}\n",
+              updinfo("Sent {(%d, %d),(%d, %d)}\n",
                       rect->pt1.x, rect->pt1.y, rect->pt2.x, rect->pt2.y);
               return nbytes;
             }
diff --git a/graphics/vnc/server/vnc_server.c b/graphics/vnc/server/vnc_server.c
index cad2f5ca3f4c394ee60f59b5d80da2a159a91d17..513d10c7367f4f6f20e0a4c59405dd17da717586 100644
--- a/graphics/vnc/server/vnc_server.c
+++ b/graphics/vnc/server/vnc_server.c
@@ -48,10 +48,14 @@
 #include 
 
 #if defined(CONFIG_VNCSERVER_DEBUG) && !defined(CONFIG_DEBUG_GRAPHICS)
-#  undef  CONFIG_DEBUG
-#  undef  CONFIG_DEBUG_VERBOSE
-#  define CONFIG_DEBUG          1
-#  define CONFIG_DEBUG_VERBOSE  1
+#  undef  CONFIG_DEBUG_FEATURES
+#  undef  CONFIG_DEBUG_ERROR
+#  undef  CONFIG_DEBUG_WARN
+#  undef  CONFIG_DEBUG_INFO
+#  define CONFIG_DEBUG_FEATURES 1
+#  define CONFIG_DEBUG_ERROR    1
+#  define CONFIG_DEBUG_WARN     1
+#  define CONFIG_DEBUG_INFO     1
 #  define CONFIG_DEBUG_GRAPHICS 1
 #endif
 #include 
@@ -161,7 +165,7 @@ static int vnc_connect(FAR struct vnc_session_s *session, int port)
   struct sockaddr_in addr;
   int ret;
 
-  gvdbg("Connecting display %d\n", session->display);
+  ginfo("Connecting display %d\n", session->display);
 
   /* Create a listening socket */
 
@@ -197,7 +201,7 @@ static int vnc_connect(FAR struct vnc_session_s *session, int port)
 
   /* Connect to the client */
 
-  gvdbg("Accepting connection for Display %d\n", session->display);
+  ginfo("Accepting connection for Display %d\n", session->display);
 
   ret = psock_accept(&session->listen, NULL, NULL, &session->connect);
   if (ret < 0)
@@ -206,7 +210,7 @@ static int vnc_connect(FAR struct vnc_session_s *session, int port)
       goto errout_with_listener;
     }
 
-  gvdbg("Display %d connected\n", session->display);
+  ginfo("Display %d connected\n", session->display);
   session->state = VNCSERVER_CONNECTED;
   return OK;
 
@@ -244,20 +248,28 @@ int vnc_server(int argc, FAR char *argv[])
 
   if (argc != 2)
     {
-      gdbg("ERROR: Unexpected number of arguments: %d\n", argc);
+      /* In this case the start-up logic will probably hang, waiting for the
+       * display-related semaphore to be set.
+       */
+
+      gerr("ERROR: Unexpected number of arguments: %d\n", argc);
       ret = -EINVAL;
-      goto errout_with_post;
+      goto errout_with_hang;
     }
 
   display = atoi(argv[1]);
   if (display < 0 || display >= RFB_MAX_DISPLAYS)
     {
-      gdbg("ERROR: Invalid display number: %d\n", display);
+      /* In this case the start-up logic will probably hang, waiting for the
+       * display-related semaphore to be set.
+       */
+
+      gerr("ERROR: Invalid display number: %d\n", display);
       ret = -EINVAL;
-      goto errout_with_post;
+      goto errout_with_hang;
     }
 
-  gvdbg("Server started for Display %d\n", display);
+  ginfo("Server started for Display %d\n", display);
 
   /* Allocate the framebuffer memory.  We rely on the fact that
    * the KMM allocator will align memory to 32-bits or better.
@@ -266,7 +278,7 @@ int vnc_server(int argc, FAR char *argv[])
   fb = (FAR uint8_t *)kmm_zalloc(RFB_SIZE);
   if (fb == NULL)
     {
-      gdbg("ERROR: Failed to allocate framebuffer memory: %lu KB\n",
+      gerr("ERROR: Failed to allocate framebuffer memory: %lu KB\n",
            (unsigned long)(RFB_SIZE / 1024));
       ret = -ENOMEM;
       goto errout_with_post;
@@ -277,7 +289,7 @@ int vnc_server(int argc, FAR char *argv[])
   session = kmm_zalloc(sizeof(struct vnc_session_s));
   if (session == NULL)
     {
-      gdbg("ERROR: Failed to allocate session\n");
+      gerr("ERROR: Failed to allocate session\n");
       ret = -ENOMEM;
       goto errout_with_fb;
     }
@@ -310,7 +322,7 @@ int vnc_server(int argc, FAR char *argv[])
       ret = vnc_connect(session, RFB_DISPLAY_PORT(display));
       if (ret >= 0)
         {
-          gvdbg("New VNC connection\n");
+          ginfo("New VNC connection\n");
 
           /* Perform the VNC initialization sequence after the client has
            * sucessfully connected to the server.  Negotiate security,
@@ -320,7 +332,7 @@ int vnc_server(int argc, FAR char *argv[])
           ret = vnc_negotiate(session);
           if (ret < 0)
             {
-              gdbg("ERROR: Failed to negotiate security/framebuffer: %d\n",
+              gerr("ERROR: Failed to negotiate security/framebuffer: %d\n",
                    ret);
               continue;
             }
@@ -332,7 +344,7 @@ int vnc_server(int argc, FAR char *argv[])
           ret = vnc_start_updater(session);
           if (ret < 0)
             {
-              gdbg("ERROR: Failed to start updater thread: %d\n", ret);
+              gerr("ERROR: Failed to start updater thread: %d\n", ret);
               continue;
             }
 
@@ -350,7 +362,7 @@ int vnc_server(int argc, FAR char *argv[])
            */
 
           ret = vnc_receiver(session);
-          gvdbg("Session terminated with %d\n", ret);
+          ginfo("Session terminated with %d\n", ret);
           UNUSED(ret);
 
           /* Stop the VNC updater thread. */
@@ -358,7 +370,7 @@ int vnc_server(int argc, FAR char *argv[])
           ret = vnc_stop_updater(session);
           if (ret < 0)
             {
-              gdbg("ERROR: Failed to stop updater thread: %d\n", ret);
+              gerr("ERROR: Failed to stop updater thread: %d\n", ret);
             }
         }
     }
@@ -369,5 +381,7 @@ errout_with_fb:
 errout_with_post:
   g_fbstartup[display].result = ret;
   sem_post(&g_fbstartup[display].fbconnect);
+
+errout_with_hang:
   return EXIT_FAILURE;
 }
diff --git a/graphics/vnc/server/vnc_server.h b/graphics/vnc/server/vnc_server.h
index 45d34b52600d7f16cf7b08b38e8e3ed51e9371e1..b513861fe85b3b412bc2ca843b3af37e1ada6d3e 100644
--- a/graphics/vnc/server/vnc_server.h
+++ b/graphics/vnc/server/vnc_server.h
@@ -186,27 +186,23 @@
 
 #ifdef CONFIG_VNCSERVER_UPDATE_DEBUG
 #  ifdef CONFIG_CPP_HAVE_VARARGS
-#    define upddbg(format, ...)    dbg(format, ##__VA_ARGS__)
-#    define updlldbg(format, ...)  lldbg(format, ##__VA_ARGS__)
-#    define updvdbg(format, ...)   vdbg(format, ##__VA_ARGS__)
-#    define updllvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
+#    define upderr(format, ...)    _err(format, ##__VA_ARGS__)
+#    define updinfo(format, ...)   _info(format, ##__VA_ARGS__)
+#    define updinfo(format, ...)   _info(format, ##__VA_ARGS__)
 #  else
-#   define upddbg                  dbg
-#   define updlldbg                lldbg
-#   define updvdbg                 vdbg
-#   define updllvdbg               llvdbg
+#   define upderr                  _err
+#   define updwarn                 _warn
+#   define updinfo                 _info
 #  endif
 #else
 #  ifdef CONFIG_CPP_HAVE_VARARGS
-#    define upddbg(x...)
-#    define updlldbg(x...)
-#    define updvdbg(x...)
-#    define updllvdbg(x...)
+#    define upderr(x...)
+#    define updwarn(x...)
+#    define updinfo(x...)
 #  else
-#    define upddbg                 (void)
-#    define updlldbg               (void)
-#    define updvdbg                (void)
-#    define updllvdbg              (void)
+#    define upderr                 (void)
+#    define updwarn                (void)
+#    define updinfo                (void)
 #  endif
 #endif
 
diff --git a/graphics/vnc/server/vnc_updater.c b/graphics/vnc/server/vnc_updater.c
index e1db02f040468691fb6d1531da3b2d988fefc615..a0c23a0c020f0eb8a1272c462f0621ec5666bd66 100644
--- a/graphics/vnc/server/vnc_updater.c
+++ b/graphics/vnc/server/vnc_updater.c
@@ -48,10 +48,14 @@
 #include 
 
 #if defined(CONFIG_VNCSERVER_DEBUG) && !defined(CONFIG_DEBUG_GRAPHICS)
-#  undef  CONFIG_DEBUG
-#  undef  CONFIG_DEBUG_VERBOSE
-#  define CONFIG_DEBUG          1
-#  define CONFIG_DEBUG_VERBOSE  1
+#  undef  CONFIG_DEBUG_FEATURES
+#  undef  CONFIG_DEBUG_ERROR
+#  undef  CONFIG_DEBUG_WARN
+#  undef  CONFIG_DEBUG_INFO
+#  define CONFIG_DEBUG_FEATURES 1
+#  define CONFIG_DEBUG_ERROR    1
+#  define CONFIG_DEBUG_WARN     1
+#  define CONFIG_DEBUG_INFO     1
 #  define CONFIG_DEBUG_GRAPHICS 1
 #endif
 #include 
@@ -72,7 +76,7 @@
  ****************************************************************************/
 
 #ifdef VNCSERVER_SEM_DEBUG
-static sem_t g_dbgsem = SEM_INITIALIZER(1);
+static sem_t g_errsem = SEM_INITIALIZER(1);
 #endif
 
 /* A rectangle represent the entire local framebuffer */
@@ -122,7 +126,7 @@ static void vnc_sem_debug(FAR struct vnc_session_s *session,
   int freewaiting;
   int queuewaiting;
 
-  while (sem_wait(&g_dbgsem) < 0)
+  while (sem_wait(&g_errsem) < 0)
     {
       DEBUGASSERT(get_errno() == EINTR);
     }
@@ -164,7 +168,7 @@ static void vnc_sem_debug(FAR struct vnc_session_s *session,
       syslog(LOG_INFO, "  Unqueued:       %u\n", unattached);
     }
 
-  sem_post(&g_dbgsem);
+  sem_post(&g_errsem);
 }
 #else
 #  define vnc_sem_debug(s,m,u)
@@ -299,7 +303,7 @@ vnc_remove_queue(FAR struct vnc_session_s *session)
   if (session->nwhupd > 0 && rect->whupd)
     {
       session->nwhupd--;
-      updvdbg("Whole screen update: nwhupd=%d\n", session->nwhupd);
+      updinfo("Whole screen update: nwhupd=%d\n", session->nwhupd);
     }
 
   sched_unlock();
@@ -369,7 +373,7 @@ static FAR void *vnc_updater(FAR void *arg)
   int ret;
 
   DEBUGASSERT(session != NULL);
-  gvdbg("Updater running for Display %d\n", session->display);
+  ginfo("Updater running for Display %d\n", session->display);
 
   /* Loop, processing updates until we are asked to stop.
    * REVISIT: Probably need some kind of signal mechanism to wake up
@@ -386,7 +390,7 @@ static FAR void *vnc_updater(FAR void *arg)
       srcrect = vnc_remove_queue(session);
       DEBUGASSERT(srcrect != NULL);
 
-      updvdbg("Dequeued {(%d, %d),(%d, %d)}\n",
+      updinfo("Dequeued {(%d, %d),(%d, %d)}\n",
               srcrect->rect.pt1.x, srcrect->rect.pt1.y,
               srcrect->rect.pt2.x, srcrect->rect.pt2.y);
 
@@ -408,7 +412,7 @@ static FAR void *vnc_updater(FAR void *arg)
 
       if (ret < 0)
         {
-          gdbg("ERROR: Encoding failed: %d\n", ret);
+          gerr("ERROR: Encoding failed: %d\n", ret);
           break;
         }
     }
@@ -442,7 +446,7 @@ int vnc_start_updater(FAR struct vnc_session_s *session)
   struct sched_param param;
   int status;
 
-  gvdbg("Starting updater for Display %d\n", session->display);
+  ginfo("Starting updater for Display %d\n", session->display);
 
   /* Create thread that is gonna send rectangles to the client */
 
@@ -577,7 +581,7 @@ int vnc_update_rectangle(FAR struct vnc_session_s *session,
               FAR struct vnc_fbupdate_s *curr;
               FAR struct vnc_fbupdate_s *next;
 
-              updvdbg("New whole screen update...\n");
+              updinfo("New whole screen update...\n");
 
               curr = (FAR struct vnc_fbupdate_s *)session->updqueue.head;
               sq_init(&session->updqueue);
@@ -619,7 +623,7 @@ int vnc_update_rectangle(FAR struct vnc_session_s *session,
 
           vnc_add_queue(session, update);
 
-          updvdbg("Queued {(%d, %d),(%d, %d)}\n",
+          updinfo("Queued {(%d, %d),(%d, %d)}\n",
                   intersection.pt1.x, intersection.pt1.y,
                   intersection.pt2.x, intersection.pt2.y);
         }
diff --git a/include/assert.h b/include/assert.h
index bb6948ab53c256d0c0dda21383f2062234a24996..88254f649454f733fc09462249874d9789ad45bd 100644
--- a/include/assert.h
+++ b/include/assert.h
@@ -1,9 +1,12 @@
 /****************************************************************************
  * include/assert.h
  *
- *   Copyright (C) 2007-2009, 2011-2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011-2013, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
@@ -47,95 +50,51 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* Macro Name: ASSERT, VERIFY, et al. */
+/* Macro Name: PANIC, ASSERT, VERIFY, et al. */
 
+#undef PANIC        /* Unconditional abort */
 #undef ASSERT       /* Assert if the condition is not true */
 #undef VERIFY       /* Assert if a function returns a negative value */
-#undef DEBUGASSERT  /* Like ASSERT, but only if CONFIG_DEBUG is defined */
-#undef DEBUGVERIFY  /* Like VERIFY, but only if CONFIG_DEBUG is defined */
-#undef PANIC        /* Unconditional abort */
+#undef DEBUGPANIC   /* Like PANIC, but only if CONFIG_DEBUG_ASSERTIONS is defined */
+#undef DEBUGASSERT  /* Like ASSERT, but only if CONFIG_DEBUG_ASSERTIONS is defined */
+#undef DEBUGVERIFY  /* Like VERIFY, but only if CONFIG_DEBUG_ASSERTIONS is defined */
 
 #ifdef CONFIG_HAVE_FILENAME
-
-#  define ASSERT(f) \
-     do \
-       { \
-         if (!(f)) \
-           { \
-             up_assert((const uint8_t *)__FILE__, (int)__LINE__); \
-           } \
-       } \
-     while (0)
-
-#  define VERIFY(f) \
-     do \
-       { \
-         if ((f) < 0) \
-           { \
-             up_assert((const uint8_t *)__FILE__, (int)__LINE__); \
-           } \
-       } \
-     while (0)
-
-#  define PANIC() \
-     up_assert((const uint8_t *)__FILE__, (int)__LINE__)
-
-#  ifdef CONFIG_DEBUG
-
-#    define DEBUGASSERT(f) \
-       do \
-         { \
-           if (!(f)) \
-             { \
-               up_assert((const uint8_t *)__FILE__, (int)__LINE__); \
-             } \
-         } \
-       while (0)
-
-#    define DEBUGVERIFY(f) \
-       do \
-         { \
-           if ((f) < 0) \
-             { \
-               up_assert((const uint8_t *)__FILE__, (int)__LINE__); \
-             } \
-         } \
-       while (0)
-
-#    define DEBUGPANIC() \
-       up_assert((const uint8_t *)__FILE__, (int)__LINE__)
-
-#  else
-
-#    define DEBUGASSERT(f)
-#    define DEBUGVERIFY(f) ((void)(f))
-#    define DEBUGPANIC()
-
-#  endif /* CONFIG_DEBUG */
-
+#  define PANIC()        up_assert((const uint8_t *)__FILE__, (int)__LINE__)
 #else
+#  define PANIC()        up_assert()
+#endif
 
-#  define ASSERT(f)        { if (!(f)) up_assert(); }
-#  define VERIFY(f)        { if ((f) < 0) up_assert(); }
-#  define PANIC()          up_assert()
-
-#  ifdef CONFIG_DEBUG
-
-#    define DEBUGASSERT(f) { if (!(f)) up_assert(); }
-#    define DEBUGVERIFY(f) { if ((f) < 0) up_assert(); }
-#    define DEBUGPANIC()   up_assert()
+#define ASSERT(f)        do { if (!(f)) PANIC(); } while (0)
+#define VERIFY(f)        do { if ((f) < 0) PANIC(); } while (0)
 
-#  else
+#ifdef CONFIG_DEBUG_ASSERTIONS
+#  define DEBUGPANIC()   PANIC()
+#  define DEBUGASSERT(f) ASSERT(f)
+#  define DEBUGVERIFY(f) VERIFY(f)
+#else
+#  define DEBUGPANIC()
+#  define DEBUGASSERT(f)
+#  define DEBUGVERIFY(f) ((void)(f))
+#endif
 
-#    define DEBUGASSERT(f)
-#    define DEBUGVERIFY(f) ((void)(f))
-#    define DEBUGPANIC()
+/* The C standard states that if NDEBUG is defined, assert will do nothing.
+ * Users can define and undefine NDEBUG as they see fit to choose when assert
+ * does something or does not do anything.
+ */
 
-#  endif /* CONFIG_DEBUG */
+#ifdef NDEBUG
+#  define assert(f)
+#else
+#  define assert(f) ASSERT(f)
 #endif
 
-#ifndef assert
-#  define assert ASSERT
+/* Definition required for C11 compile-time assertion checking.  The
+ * static_assert macro simply expands to the _Static_assert keyword.
+ */
+
+#ifndef __cplusplus
+#  define static_assert _Static_assert
 #endif
 
 /****************************************************************************
diff --git a/include/crc64.h b/include/crc64.h
new file mode 100644
index 0000000000000000000000000000000000000000..e08183327a959d26ad453009668e2a796b70c022
--- /dev/null
+++ b/include/crc64.h
@@ -0,0 +1,105 @@
+/****************************************************************************
+ * include/crc64.h
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_CRC64_H
+#define __INCLUDE_CRC64_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/*
+ * CRC64_CHECK is the CRC64 of the string "123456789" without the null byte.
+ *
+ *   const uint8_t checkbuf[] =
+ *   {
+ *     '1', '2', '3', '4', '5', '6', '7', '8', '9'
+ *   };
+ *
+ *   assert(crc64(checkbuf, sizeof(checkbuf)) == CRC64_CHECK);
+ */
+
+/* CRC-64/WE */
+
+#define CRC64_POLY   ((uint64_t)0x42f0e1eba9ea3693)
+#define CRC64_INIT   ((uint64_t)0xffffffffffffffff)
+#define CRC64_XOROUT ((uint64_t)0xffffffffffffffff)
+#define CRC64_CHECK  ((uint64_t)0x62ec59e3f1a4f00a)
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: crc64part
+ *
+ * Description:
+ *   Continue CRC calculation on a part of the buffer.
+ *
+ ****************************************************************************/
+
+uint64_t crc64part(FAR const uint8_t *src, size_t len, uint64_t crc64val);
+
+/****************************************************************************
+ * Name: crc64
+ *
+ * Description:
+ *   Return a 64-bit CRC of the contents of the 'src' buffer, length 'len'.
+ *
+ ****************************************************************************/
+
+uint64_t crc64(FAR const uint8_t *src, size_t len);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __INCLUDE_CRC64_H */
diff --git a/include/ctype.h b/include/ctype.h
index 67dc99e6e1af68c9e53262febb0d4f200641b49e..dcf918b630e7ee6f33777b7ecf2afbb77f870833 100644
--- a/include/ctype.h
+++ b/include/ctype.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * include/ctype.h
  *
- *   Copyright (C) 2007-2009, 2011, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011, 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -45,6 +45,8 @@
  * Included Files
  ****************************************************************************/
 
+#include 
+
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
@@ -59,9 +61,17 @@
  *
  ****************************************************************************/
 
-#define isspace(c) \
-  ((c) == ' '  || (c) == '\t' || (c) == '\n' || \
-   (c) == '\r' || (c) == '\f' || c== '\v')
+#if defined(CONFIG_HAVE_INLINE) || defined(__cplusplus)
+static inline int isspace(int c)
+{
+  return c == ' ' || c == '\t' || c == '\n' || c == '\r' ||
+         c == '\f' || c == '\v';
+}
+#else
+#  define isspace(c) \
+    ((c) == ' '  || (c) == '\t' || (c) == '\n' || (c) == '\r' || \
+     (c) == '\f' || (c) == '\v')
+#endif
 
 /****************************************************************************
  * Name: isascii
@@ -72,7 +82,14 @@
  *
  ****************************************************************************/
 
-#define isascii(c)   ((c) >= 0 && (c) <= 0x7f)
+#if defined(CONFIG_HAVE_INLINE) || defined(__cplusplus)
+static inline int isascii(int c)
+{
+  return c >= 0 && c <= 0x7f;
+}
+#else
+#  define isascii(c)   ((c) >= 0 && (c) <= 0x7f)
+#endif
 
 /****************************************************************************
  * Name: isprint
@@ -82,7 +99,14 @@
  *
  ****************************************************************************/
 
-#define isprint(c)   ((c) >= 0x20 && (c) < 0x7f)
+#if defined(CONFIG_HAVE_INLINE) || defined(__cplusplus)
+static inline int isprint(int c)
+{
+  return c >= 0x20 && c < 0x7f;
+}
+#else
+#  define isprint(c)   ((c) >= 0x20 && (c) < 0x7f)
+#endif
 
 /****************************************************************************
  * Name: isgraph
@@ -92,7 +116,14 @@
  *
  ****************************************************************************/
 
-#define isgraph(c)   ((c) > 0x20 && (c) < 0x7f)
+#if defined(CONFIG_HAVE_INLINE) || defined(__cplusplus)
+static inline int isgraph(int c)
+{
+  return c > 0x20 && c < 0x7f;
+}
+#else
+#  define isgraph(c)   ((c) > 0x20 && (c) < 0x7f)
+#endif
 
 /****************************************************************************
  * Name: iscntrl
@@ -102,7 +133,14 @@
  *
  ****************************************************************************/
 
-#define iscntrl(c) (!isprint(c))
+#if defined(CONFIG_HAVE_INLINE) || defined(__cplusplus)
+static inline int iscntrl(int c)
+{
+  return !isprint(c);
+}
+#else
+#  define iscntrl(c) (!isprint(c))
+#endif
 
 /****************************************************************************
  * Name: islower
@@ -112,7 +150,14 @@
  *
  ****************************************************************************/
 
-#define islower(c)   ((c) >= 'a' && (c) <= 'z')
+#if defined(CONFIG_HAVE_INLINE) || defined(__cplusplus)
+static inline int islower(int c)
+{
+  return c >= 'a' && c <= 'z';
+}
+#else
+#  define islower(c)   ((c) >= 'a' && (c) <= 'z')
+#endif
 
 /****************************************************************************
  * Name: isupper
@@ -122,7 +167,14 @@
  *
  ****************************************************************************/
 
-#define isupper(c)   ((c) >= 'A' && (c) <= 'Z')
+#if defined(CONFIG_HAVE_INLINE) || defined(__cplusplus)
+static inline int isupper(int c)
+{
+  return c >= 'A' && c <= 'Z';
+}
+#else
+#  define isupper(c)   ((c) >= 'A' && (c) <= 'Z')
+#endif
 
 /****************************************************************************
  * Name: isalpha
@@ -132,7 +184,31 @@
  *
  ****************************************************************************/
 
-#define isalpha(c)   (islower(c) || isupper(c))
+#if defined(CONFIG_HAVE_INLINE) || defined(__cplusplus)
+static inline int isalpha(int c)
+{
+  return islower(c) || isupper(c);
+}
+#else
+#  define isalpha(c)   (islower(c) || isupper(c))
+#endif
+
+/****************************************************************************
+ * Name: isblank
+ *
+ * Description:
+ *   Checks for blank characters (space or tab). C++11
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_HAVE_INLINE) || defined(__cplusplus)
+static inline int isblank(int c)
+{
+  return c == ' ' || c == '\t';
+}
+#else
+#  define isblank(c)   ((c) == ' ' || (c) == '\t')
+#endif
 
 /****************************************************************************
  * Name: isdigit
@@ -142,7 +218,14 @@
  *
  ****************************************************************************/
 
-#define isdigit(c)   ((c) >= '0' && (c) <= '9')
+#if defined(CONFIG_HAVE_INLINE) || defined(__cplusplus)
+static inline int isdigit(int c)
+{
+  return c >= '0' && c <= '9';
+}
+#else
+#  define isdigit(c)   ((c) >= '0' && (c) <= '9')
+#endif
 
 /****************************************************************************
  * Name: isalnum
@@ -152,7 +235,14 @@
  *
  ****************************************************************************/
 
-#define isalnum(c)   (isalpha(c) || isdigit(c))
+#if defined(CONFIG_HAVE_INLINE) || defined(__cplusplus)
+static inline int isalnum(int c)
+{
+  return isalpha(c) || isdigit(c);
+}
+#else
+#  define isalnum(c)   (isalpha(c) || isdigit(c))
+#endif
 
 /****************************************************************************
  * Name: ispunct
@@ -163,7 +253,14 @@
  *
  ****************************************************************************/
 
-#define ispunct(c)   (isgraph(c) && !isalnum(c))
+#if defined(CONFIG_HAVE_INLINE) || defined(__cplusplus)
+static inline int ispunct(int c)
+{
+  return isgraph(c) && !isalnum(c);
+}
+#else
+#  define ispunct(c)   (isgraph(c) && !isalnum(c))
+#endif
 
 /****************************************************************************
  * Name: isxdigit
@@ -173,10 +270,19 @@
  *
  ****************************************************************************/
 
-#define isxdigit(c) \
-  (((c) >= '0' && (c) <= '9') || \
-   ((c) >= 'a' && (c) <= 'f') || \
-   ((c) >= 'A' && (c) <= 'F'))
+#if defined(CONFIG_HAVE_INLINE) || defined(__cplusplus)
+static inline int isxdigit(int c)
+{
+  return (c >= '0' && c <= '9') ||
+         (c >= 'a' && c <= 'f') ||
+         (c >= 'A' && c <= 'F');
+}
+#else
+#  define isxdigit(c) \
+    (((c) >= '0' && (c) <= '9') || \
+     ((c) >= 'a' && (c) <= 'f') || \
+     ((c) >= 'A' && (c) <= 'F'))
+#endif
 
 /****************************************************************************
  * Name: toupper
@@ -186,8 +292,15 @@
  *
  ****************************************************************************/
 
-#define toupper(c) \
-  (((c) >= 'a' && (c) <= 'z') ? ((c) - 'a' + 'A') : (c))
+#if defined(CONFIG_HAVE_INLINE) || defined(__cplusplus)
+static inline int toupper(int c)
+{
+  return (c >= 'a' && c <= 'z') ? c - 'a' + 'A' : c;
+}
+#else
+#  define toupper(c) \
+    (((c) >= 'a' && (c) <= 'z') ? ((c) - 'a' + 'A') : (c))
+#endif
 
 /****************************************************************************
  * Name: tolower
@@ -197,8 +310,15 @@
  *
  ****************************************************************************/
 
-#define tolower(c) \
-  (((c) >= 'A' && (c) <= 'Z') ? ((c) - 'A' + 'a') : (c))
+#if defined(CONFIG_HAVE_INLINE) || defined(__cplusplus)
+static inline int tolower(int c)
+{
+  return (c >= 'A' && c <= 'Z') ? (c - 'A' + 'a') : c;
+}
+#else
+#  define tolower(c) \
+    (((c) >= 'A' && (c) <= 'Z') ? ((c) - 'A' + 'a') : (c))
+#endif
 
 /****************************************************************************
  * Public Type Definitions
diff --git a/include/cxx/cctype b/include/cxx/cctype
index 604bc2c23d141fbead3b2b7d9e9615d368746fde..52c4c86ba7b7d7890723c65bf07666a46d91a772 100644
--- a/include/cxx/cctype
+++ b/include/cxx/cctype
@@ -1,7 +1,7 @@
 //***************************************************************************
 // include/cxx/cctype
 //
-//   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+//   Copyright (C) 2009, 2016 Gregory Nutt. All rights reserved.
 //   Author: Gregory Nutt 
 //
 // Redistribution and use in source and binary forms, with or without
@@ -42,28 +42,27 @@
 
 #include 
 
-// Remove macros in favor of builtin implementations
-
-#if !defined(CONFIG_UCLIBCXX)
-
-#undef isalnum
-#undef isalpha
-#undef iscntrl
-#undef isdigit
-#undef isgraph
-#undef islower
-#undef isprint
-#undef ispunct
-#undef isspace
-#undef isupper
-#undef isxdigit
-#undef tolower
-#undef toupper
-
-#endif
-
 //***************************************************************************
 // Namespace
 //***************************************************************************
 
+namespace std
+{
+  using ::isspace;
+  using ::isascii;
+  using ::isprint;
+  using ::isgraph;
+  using ::iscntrl;
+  using ::islower;
+  using ::isupper;
+  using ::isalpha;
+  using ::isblank;
+  using ::isdigit;
+  using ::isalnum;
+  using ::ispunct;
+  using ::isxdigit;
+  using ::toupper;
+  using ::tolower;
+}
+
 #endif // __INCLUDE_CXX_CCTYPE
diff --git a/include/cxx/clocale b/include/cxx/clocale
new file mode 100644
index 0000000000000000000000000000000000000000..154bf8040a803476ce348eabcf7159ca3317eb4d
--- /dev/null
+++ b/include/cxx/clocale
@@ -0,0 +1,55 @@
+//***************************************************************************
+// include/cxx/clocale
+//
+//   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+//   Author: Gregory Nutt 
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions
+// are met:
+//
+// 1. Redistributions of source code must retain the above copyright
+//    notice, this list of conditions and the following disclaimer.
+// 2. Redistributions in binary form must reproduce the above copyright
+//    notice, this list of conditions and the following disclaimer in
+//    the documentation and/or other materials provided with the
+//    distribution.
+// 3. Neither the name NuttX nor the names of its contributors may be
+//    used to endorse or promote products derived from this software
+//    without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+// FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+// COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+// BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+// OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+// AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+// LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+// ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+// POSSIBILITY OF SUCH DAMAGE.
+//
+//***************************************************************************
+
+#ifndef __INCLUDE_CXX_CLOCALE
+#define __INCLUDE_CXX_CLOCALE
+
+//***************************************************************************
+// Included Files
+//***************************************************************************
+
+#include 
+
+//***************************************************************************
+// Namespace
+//***************************************************************************
+
+namespace std
+{
+  using ::setlocale;
+  using ::localeconv;
+}
+
+#endif // __INCLUDE_CXX_CLOCALE
diff --git a/include/cxx/csignal b/include/cxx/csignal
index 2303a864dd10e879acf74a85f3679234dfc707be..b5ccdbf8ddcee8438ea36836c784fa9e84f001cd 100644
--- a/include/cxx/csignal
+++ b/include/cxx/csignal
@@ -1,7 +1,7 @@
 //***************************************************************************
 // include/cxx/csignal
 //
-//   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+//   Copyright (C) 2009, 2016 Gregory Nutt. All rights reserved.
 //   Author: Gregory Nutt 
 //
 // Redistribution and use in source and binary forms, with or without
@@ -49,24 +49,32 @@
 namespace std
 {
   using ::sigset_t;
+  using ::sig_atomic_t;
   using ::sigval;
   using ::sigevent;
   using ::siginfo;
   using ::siginfo_t;
   using ::sigaction;
   using ::kill;
-  using ::sigemptyset;
-  using ::sigfillset;
+  using ::raise;
+  using ::sigaction;
   using ::sigaddset;
   using ::sigdelset;
+  using ::sigemptyset;
+  using ::sigfillset;
+  using ::sighold;
   using ::sigismember;
-  using ::sigaction;
-  using ::sigprocmask;
+  using ::sigignore;
+  using ::signal;
+  using ::sigpause;
   using ::sigpending;
+  using ::sigprocmask;
+  using ::sigqueue;
+  using ::sigrelse;
+  using ::sigset;
+  using ::sigtimedwait;
   using ::sigsuspend;
   using ::sigwaitinfo;
-  using ::sigtimedwait;
-  using ::sigqueue;
 }
 
 #endif // CSIGNAL_HEADER
diff --git a/include/cxx/cstdio b/include/cxx/cstdio
index 0074091a2f7a057fb33146a689161c353801028b..783227f5b3bc8d37127826ccd4bbdc1ef4e0cf49 100644
--- a/include/cxx/cstdio
+++ b/include/cxx/cstdio
@@ -1,7 +1,7 @@
 //***************************************************************************
 // include/cxx/cstdio
 //
-//   Copyright (C) 2009, 2014 Gregory Nutt. All rights reserved.
+//   Copyright (C) 2009, 2014, 2017 Gregory Nutt. All rights reserved.
 //   Author: Gregory Nutt 
 //
 // Redistribution and use in source and binary forms, with or without
@@ -69,12 +69,15 @@ namespace std
   using ::fputc;
   using ::fputs;
   using ::fread;
+  using ::freopen;
   using ::fseek;
   using ::fsetpos;
   using ::ftell;
   using ::fwrite;
   using ::gets;
   using ::gets_s;
+  using ::setbuf;
+  using ::setvbuf;
   using ::ungetc;
 
   // Operations on the stdout stream, buffers, paths, and the whole printf-family
@@ -105,6 +108,7 @@ namespace std
 
   using ::tmpnam;
   using ::tempnam;
+  using ::remove;
 }
 
 #endif // __INCLUDE_CXX_CSTDIO
diff --git a/include/cxx/cstdlib b/include/cxx/cstdlib
index 419291c789b2135fbc18f0cc579945471a785435..ec632ed054a158d432d3f46ce1d259e01a7a7953 100644
--- a/include/cxx/cstdlib
+++ b/include/cxx/cstdlib
@@ -1,7 +1,7 @@
 //***************************************************************************
 // include/cxx/cstdlib
 //
-//   Copyright (C) 2009, 2012, 2015 Gregory Nutt. All rights reserved.
+//   Copyright (C) 2009, 2012, 2015-2017 Gregory Nutt. All rights reserved.
 //   Author: Gregory Nutt 
 //
 // Redistribution and use in source and binary forms, with or without
@@ -54,9 +54,9 @@ namespace std
   using ::srand;
   using ::rand;
 
+#ifndef CONFIG_DISABLE_ENVIRON
   // Environment variable support
 
-#ifndef CONFIG_DISABLE_ENVIRON
   using ::get_environ_ptr;
   using ::getenv;
   using ::putenv;
@@ -76,6 +76,12 @@ namespace std
   using ::on_exit;
 #endif
 
+#ifndef __KERNEL__
+  // System command
+
+  using ::system;
+#endif
+
   // String to binary conversions
 
   using ::strtol;
@@ -84,12 +90,25 @@ namespace std
   using ::strtoll;
   using ::strtoull;
 #endif
+  using ::strtof;
+#ifdef CONFIG_HAVE_DOUBLE
   using ::strtod;
+#endif
+#ifdef CONFIG_HAVE_LONG_DOUBLE
+  using ::strtold;
+#endif
 
   // Binary to string conversions
 
   using ::itoa;
 
+  // Wide character operations
+
+#ifdef CONFIG_LIBC_WCHAR
+  using ::mbtowc;
+  using ::wctomb;
+#endif
+
   // Memory Management
 
   using ::malloc;
@@ -100,6 +119,16 @@ namespace std
   using ::calloc;
   using ::mallinfo;
 
+#ifdef CONFIG_PSEUDOTERM
+  // Pseudo-Terminals
+
+#ifdef CONFIG_PSEUDOTERM_SUSV1
+  using ::ptsname;
+  using ::ptsname_r;
+#endif
+  using ::unlockpt;
+#endif
+
   // Arithmetic
 
   using ::abs;
@@ -124,6 +153,10 @@ namespace std
   // Sorting
 
   using ::qsort;
+
+  // Binary search
+
+  using ::bsearch;
 }
 
 #endif // __INCLUDE_CXX_CSTDLIB
diff --git a/include/cxx/cstring b/include/cxx/cstring
index 84d98277d21da308b228a97f6acab94d88d51cc6..68309195f07184decf5c5d69f0cf2b821421ca81 100644
--- a/include/cxx/cstring
+++ b/include/cxx/cstring
@@ -1,7 +1,7 @@
 //***************************************************************************
 // include/cxx/cstring
 //
-//   Copyright (C) 2009-2012 Gregory Nutt. All rights reserved.
+//   Copyright (C) 2009-2012, 2017 Gregory Nutt. All rights reserved.
 //   Author: Gregory Nutt 
 //
 // Redistribution and use in source and binary forms, with or without
@@ -42,6 +42,7 @@
 
 #include 
 #include 
+#include 
 
 //***************************************************************************
 // Namespace
@@ -51,17 +52,20 @@ namespace std
 {
   using ::size_t;
 
+  // Declared in string.h
+
   using ::strdup;
   using ::strndup;
   using ::strerror;
+  using ::strerror_r;
   using ::strlen;
   using ::strnlen;
   using ::strcat;
   using ::strncat;
   using ::strcmp;
   using ::strncmp;
-  using ::strcasecmp;
-  using ::strncasecmp;
+  using ::strcoll;
+  using ::stpcpy;
   using ::strcpy;
   using ::strncpy;
   using ::strpbrk;
@@ -73,6 +77,7 @@ namespace std
   using ::strcasestr;
   using ::strtok;
   using ::strtok_r;
+  using ::strxfrm;
 
   using ::memchr;
   using ::memccpy;
@@ -80,6 +85,17 @@ namespace std
   using ::memcpy;
   using ::memmove;
   using ::memset;
+
+  // Declared in legacy strings.h
+
+  using ::bcmp;
+  using ::bcopy;
+  using ::bzero;
+  using ::index;
+  using ::rindex;
+  using ::ffs;
+  using ::strcasecmp;
+  using ::strncasecmp;
 }
 
 #endif // __INCLUDE_CXX_CSTRING
diff --git a/include/cxx/cunistd b/include/cxx/cunistd
index be1d2d5cfe068b9359eee9dba15e3b5f76faaa03..95118c1732c9fdc8a27cf402b753098bcb84f396 100644
--- a/include/cxx/cunistd
+++ b/include/cxx/cunistd
@@ -1,7 +1,7 @@
 //***************************************************************************
 // include/cxx/cunistd
 //
-//   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+//   Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
 //   Author: Gregory Nutt 
 //
 // Redistribution and use in source and binary forms, with or without
@@ -48,10 +48,17 @@
 
 namespace std
 {
+  // Task control interfaces
+
+  using ::vfork;
   using ::getpid;
   using ::_exit;
   using ::sleep;
   using ::usleep;
+  using ::pause;
+
+  // File descriptor opertions
+
   using ::close;
   using ::dup;
   using ::dup2;
@@ -61,15 +68,64 @@ namespace std
   using ::write;
   using ::pread;
   using ::pwrite;
+
+  // Terminal I/O
+
+  using ::isatty;
+
+  // Memory management
+
+#if defined(CONFIG_ARCH_ADDRENV) && defined(CONFIG_MM_PGALLOC) && \
+    defined(CONFIG_ARCH_USE_MMU)
+  using sbrk;
+#endif
+
+  // Special devices
+
   using ::pipe;
+
+  // Operations on working directories
+
   using ::chdir;
   using ::getcwd;
-  using ::unlink;
+
+  // Operations on file paths
+
+  using ::access;
   using ::rmdir;
+  using ::unlink;
+#ifdef CONFIG_PSEUDOFS_SOFTLINKS
+  using ::link;
+  using ::readlink;
+#endif
+
+  // Execution of program files
+
+#ifdef CONFIG_LIBC_EXECFUNCS
+  using ::execl;
+  using ::execv;
+#endif
+
+  // Byte operations
+
+  using ::swab;
+
+  // getopt and friends
+
   using ::getopt;
+
+  // Non-standard accessor functions
+
   using ::getoptargp;
   using ::getoptindp;
   using ::getoptoptp;
+
+  // Networking
+
+#ifdef CONFIG_NET
+  using ::gethostname;
+  using ::sethostname;
+#endif
 }
 
 #endif // __INCLUDE_CXX_CUNISTD
diff --git a/include/cxx/cwchar b/include/cxx/cwchar
index 67716abbe03ee66585e478cd68dab27f7ffa16f4..3ca4c6c1d87633b3546a2da0a48a10fde67d5a09 100755
--- a/include/cxx/cwchar
+++ b/include/cxx/cwchar
@@ -1,7 +1,7 @@
 //***************************************************************************
 // include/cxx/cwchar
 //
-//   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+//   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
 //   Author: Gregory Nutt 
 //
 // Redistribution and use in source and binary forms, with or without
@@ -41,6 +41,7 @@
 //***************************************************************************
 
 #include 
+#include 
 
 //***************************************************************************
 // Namespace
@@ -48,11 +49,88 @@
 
 namespace std
 {
-#if 0 /* Not defined */
   using ::mbstate_t;
-#endif
   using ::wint_t;
+  using ::wctype_t;
   using ::size_t;
+
+  using ::btowc;
+  using ::fwprintf;
+  using ::fwscanf;
+  using ::iswalnum;
+  using ::iswalpha;
+  using ::iswcntrl;
+  using ::iswdigit;
+  using ::iswgraph;
+  using ::iswlower;
+  using ::iswprint;
+  using ::iswpunct;
+  using ::iswspace;
+  using ::iswupper;
+  using ::iswxdigit;
+  using ::iswctype;
+  using ::fgetwc;
+  using ::fgetws;
+  using ::fputwc;
+  using ::fputws;
+  using ::fwide;
+  using ::getwc;
+  using ::getwchar;
+  using ::mbsinit;
+  using ::mbrlen;
+  using ::mbrtowc;
+  using ::mbsrtowcs;
+  using ::mbtowc;
+  using ::putwc;
+  using ::putwchar;
+  using ::swprintf;
+  using ::swscanf;
+  using ::towlower;
+  using ::towupper;
+  using ::ungetwc;
+  using ::vfwprintf;
+  using ::vwprintf;
+  using ::vswprintf;
+  using ::wcrtomb;
+  using ::wcscat;
+  using ::wcschr;
+  using ::wcscmp;
+  using ::wcscoll;
+  using ::wcscpy;
+  using ::wcscspn;
+  using ::wcsftime;
+  using ::wcslen;
+  using ::wcslcpy;
+  using ::wcslcat;
+  using ::wcsncat;
+  using ::wcsncmp;
+  using ::wcsncpy;
+  using ::wcspbrk;
+  using ::wcsrchr;
+  using ::wcsrtombs;
+  using ::wcsspn;
+  using ::wcsstr;
+  using ::wcstod;
+  using ::wcstof;
+  using ::wcstok;
+  using ::wcstol;
+  using ::wcstoll;
+  using ::wcstoul;
+  using ::wcstoull;
+  using ::wcswcs;
+  using ::wcswidth;
+  using ::wcsxfrm;
+  using ::wctob;
+  using ::wctomb;
+  using ::wctype;
+  using ::wcwidth;
+  using ::wmemchr;
+  using ::wmemcmp;
+  using ::wmemcpy;
+  using ::wmemmove;
+  using ::wmemset;
+  using ::wprintf;
+  using ::wscanf;
 };
 
 #endif // __INCLUDE_CXX_CWCHAR
diff --git a/include/cxx/cwctype b/include/cxx/cwctype
new file mode 100644
index 0000000000000000000000000000000000000000..7c0424c539c6307ae9d18ece52407690845637ea
--- /dev/null
+++ b/include/cxx/cwctype
@@ -0,0 +1,76 @@
+//***************************************************************************
+// include/cxx/cwctype
+//
+//   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+//   Author: Gregory Nutt 
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions
+// are met:
+//
+// 1. Redistributions of source code must retain the above copyright
+//    notice, this list of conditions and the following disclaimer.
+// 2. Redistributions in binary form must reproduce the above copyright
+//    notice, this list of conditions and the following disclaimer in
+//    the documentation and/or other materials provided with the
+//    distribution.
+// 3. Neither the name NuttX nor the names of its contributors may be
+//    used to endorse or promote products derived from this software
+//    without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+// FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+// COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+// BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+// OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+// AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+// LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+// ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+// POSSIBILITY OF SUCH DAMAGE.
+//
+//***************************************************************************
+
+#ifndef __INCLUDE_CXX_CWCTYPE
+#define __INCLUDE_CXX_CWCTYPE
+
+//***************************************************************************
+// Included Files
+//***************************************************************************
+
+#include 
+
+//***************************************************************************
+// Namespace
+//***************************************************************************
+
+namespace std
+{
+  using ::wint_t;
+  using ::wctrans_t;
+  using ::wctype_t;
+
+  using ::iswalnum;
+  using ::iswalpha;
+  using ::iswblank;
+  using ::iswcntrl;
+  using ::iswctype;
+  using ::iswdigit;
+  using ::iswgraph;
+  using ::iswlower;
+  using ::iswprint;
+  using ::iswpunct;
+  using ::iswspace;
+  using ::iswupper;
+  using ::iswxdigit;
+  using ::towctrans;
+  using ::towlower;
+  using ::towupper;
+  using ::wctrans;
+  using ::iswctype;
+  using ::wctype;
+};
+
+#endif // __INCLUDE_CXX_CWCTYPE
diff --git a/include/debug.h b/include/debug.h
index 066ba5a2d6bf9fef285348dbb1818292704629ea..0bde25605befb64364b56f9b74b1f5938cf9d779 100644
--- a/include/debug.h
+++ b/include/debug.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * include/debug.h
  *
- *   Copyright (C) 2007-2011, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2011, 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -56,600 +56,1399 @@
 /* Debug macros to runtime filter the debug messages sent to the console.  In
  * general, there are four forms of the debug macros:
  *
- * [a-z]dbg() -- Outputs messages to the console similar to printf() except
- *    that the output is not buffered.  The first character indicates the
- *    system system (e.g., n=network, f=filesystm, etc.).  If the first
- *    character is missing (i.e., dbg()), then it is common.  The common
- *    dbg() macro is enabled by CONFIG_DEBUG.  Subsystem debug requires an
+ * [a-z]info() -- Outputs messages to the console similar to printf() except
+ *    that the output is not buffered.  Output is only generated if
+ *    CONFIG_DEBUG_INFO is defined.  The info macros are intended for
+ *    verbose "informational" debug output.  If you enable CONFIG_DEBUG_INFO,
+ *    then very chatty (and often annoying) output will be generated.
+ *
+ *    The first character of the macro name indicates the system system
+ *    (e.g., n=network, f=filesystm, etc.).  If the first character is
+ *    missing (i.e., _info()), then it is common.  The common _info() macro
+ *    is enabled simply with CONFIG_DEBUG_INFO.  Subsystem debug requires an
  *    additional configuration setting to enable it (e.g., CONFIG_DEBUG_NET
  *    for the network, CONFIG_DEBUG_FS for the file system, etc).
  *
- *    In general, error messages and output of importance use [a-z]dbg().
- *    [a-z]dbg() is implementation dependent but usually uses file descriptors.
+ *    In general, error messages and output of importance use [a-z]err().
+ *    [a-z]err() is implementation dependent but usually uses file descriptors.
  *    (that is a problem only because the interrupt task may have re-
- *    directed stdout).  Therefore [a-z]dbg() should not be used in interrupt
+ *    directed stdout).  Therefore [a-z]err() should not be used in interrupt
  *    handlers.
  *
- * [a-z]vdbg() -- Identical to [a-z]dbg() except that it also requires that
- *    CONFIG_DEBUG_VERBOSE be defined.  This is intended for general debug
- *    output that you would normally want to suppress.
- *
- * [a-z]lldbg() -- Identical to [a-z]dbg() except this is uses special
- *    interfaces provided by architecture-specific logic to talk directly
- *    to the underlying console hardware.  If the architecture provides such
- *    logic, it should define CONFIG_ARCH_LOWPUTC.
+ * [a-z]warn() -- Identical to [a-z]info() except that it also requires that
+ *    CONFIG_DEBUG_WARN be defined.  This is intended for important exception
+ *    conditions that are potential errors (or perhaps real errors with non-
+ *    fatal consequences).
  *
- *    [a-z]lldbg() should not be used in normal code because the implementation
- *    probably disables interrupts and does things that are not consistent with
- *    good real-time performance.  However, [a-z]lldbg() is particularly useful
- *    in low-level code where it is inappropriate to use file descriptors.  For
- *    example, only [a-z]lldbg() should be used in interrupt handlers.
+ * [a-z]err() -- Identical to [a-z]info() except that it also requires that
+ *    CONFIG_DEBUG_ERROR be defined.  This is intended for important error-related
+ *    information that you probably not want to suppress during normal debug
+ *    general debugging.
  *
- * [a-z]llvdbg() -- Identical to [a-z]lldbg() except that it also requires that
- *    CONFIG_DEBUG_VERBOSE be defined.  This is intended for general debug
- *    output that you would normally want to suppress.
+ * _alert() - is a special, high-priority, unconditional version that is really
+ *    intended only for crash error reporting.
+ */
+
+#ifdef CONFIG_HAVE_FUNCTIONNAME
+#  define EXTRA_FMT "%s: "
+#  define EXTRA_ARG ,__FUNCTION__
+#else
+#  define EXTRA_FMT
+#  define EXTRA_ARG
+#endif
+
+/* Debug macros will differ depending upon if the toolchain supports
+ * macros with a variable number of arguments or not.
  */
 
-#ifdef CONFIG_HAVE_FUNCTIONNAME
-# define EXTRA_FMT "%s: "
-# define EXTRA_ARG ,__FUNCTION__
+#ifdef CONFIG_CPP_HAVE_VARARGS
+
+/* C-99 style variadic macros are supported */
+
+/* The actual logger function may be overridden in arch/debug.h if needed.
+ * (Currently only if the pre-processor supports variadic macros)
+ */
+
+#ifndef __arch_syslog
+#  define __arch_syslog syslog
+#endif
+
+#ifdef CONFIG_DEBUG_ALERT
+#  define _alert(format, ...) \
+   __arch_syslog(LOG_EMERG, EXTRA_FMT format EXTRA_ARG, ##__VA_ARGS__)
+#else /* CONFIG_DEBUG_ERROR */
+#  define  _alert(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_ERROR
+#  define  _err(format, ...) \
+   __arch_syslog(LOG_ERR, EXTRA_FMT format EXTRA_ARG, ##__VA_ARGS__)
+#else
+#  define  _err(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_WARN
+#  define _warn(format, ...) \
+   __arch_syslog(LOG_WARNING, EXTRA_FMT format EXTRA_ARG, ##__VA_ARGS__)
+#else
+#  define _warn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_INFO
+#  define _info(format, ...) \
+   __arch_syslog(LOG_INFO, EXTRA_FMT format EXTRA_ARG, ##__VA_ARGS__)
+#else
+#  define _info(x...)
+#endif
+
+/* Subsystem specific debug */
+
+#ifdef CONFIG_DEBUG_MM_ERROR
+#  define merr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define merr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_MM_WARN
+#  define mwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define mwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_MM_INFO
+#  define minfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define minfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_SCHED_ERROR
+#  define serr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define serr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_SCHED_WARN
+#  define swarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define swarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_SCHED_INFO
+#  define sinfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define sinfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_SYSCALL_ERROR
+#  define svcerr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define svcerr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_SYSCALL_WARN
+#  define svcwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define svcwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_SYSCALL_INFO
+#  define svcinfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define svcinfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_PAGING_ERROR
+#  define pgerr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define pgerr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_PAGING_WARN
+#  define pgwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define pgwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_PAGING_INFO
+#  define pginfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define pginfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_NET_ERROR
+#  define nerr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define nerr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_NET_WARN
+#  define nwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define nwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_NET_INFO
+#  define ninfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define ninfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_FS_ERROR
+#  define ferr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define ferr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_FS_WARN
+#  define fwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define fwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_FS_INFO
+#  define finfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define finfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_CRYPTO_ERROR
+#  define crypterr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define crypterr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_CRYPTO_WARN
+#  define cryptwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define cryptwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_CRYPTO_INFO
+#  define cryptinfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define cryptinfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_INPUT_ERROR
+#  define ierr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define ierr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_INPUT_WARN
+#  define iwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define iwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_INPUT_INFO
+#  define iinfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define iinfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_ANALOG_ERROR
+#  define aerr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define aerr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_ANALOG_WARN
+#  define awarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define awarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_ANALOG_INFO
+#  define ainfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define ainfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_CAN_ERROR
+#  define canerr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define canerr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_CAN_WARN
+#  define canwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define canwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_CAN_INFO
+#  define caninfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define caninfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_GRAPHICS_ERROR
+#  define gerr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define gerr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_GRAPHICS_WARN
+#  define gwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define gwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_GRAPHICS_INFO
+#  define ginfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define ginfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_BINFMT_ERROR
+#  define berr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define berr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_BINFMT_WARN
+#  define bwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define bwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_BINFMT_INFO
+#  define binfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define binfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_LIB_ERROR
+#  define lerr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define lerr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_LIB_WARN
+#  define lwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define lwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_LIB_INFO
+#  define linfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define linfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_AUDIO_ERROR
+#  define auderr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define auderr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_AUDIO_WARN
+#  define audwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define audwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_AUDIO_INFO
+#  define audinfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define audinfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_DMA_ERROR
+#  define dmaerr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define dmaerr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_DMA_WARN
+#  define dmawarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define dmawarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_DMA_INFO
+#  define dmainfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define dmainfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_IRQ_ERROR
+#  define irqerr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define irqerr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_IRQ_WARN
+#  define irqwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define irqwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_IRQ_INFO
+#  define irqinfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define irqinfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_LCD_ERROR
+#  define lcderr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define lcderr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_LCD_WARN
+#  define lcdwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define lcdwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_LCD_INFO
+#  define lcdinfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define lcdinfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_LEDS_ERROR
+#  define lederr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define lederr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_LEDS_WARN
+#  define ledwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define ledwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_LEDS_INFO
+#  define ledinfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define ledinfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_GPIO_ERROR
+#  define gpioerr(format, ...)    _err(format, ##__VA_ARGS__)
+#else
+#  define gpioerr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_GPIO_WARN
+#  define gpiowarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define gpiowarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_GPIO_INFO
+#  define gpioinfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define gpioinfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_I2C_ERROR
+#  define i2cerr(format, ...)    _err(format, ##__VA_ARGS__)
+#else
+#  define i2cerr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_I2C_WARN
+#  define i2cwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define i2cwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_I2C_INFO
+#  define i2cinfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define i2cinfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_I2S_ERROR
+#  define i2serr(format, ...)    _err(format, ##__VA_ARGS__)
+#else
+#  define i2serr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_I2S_WARN
+#  define i2swarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define i2swarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_I2S_INFO
+#  define i2sinfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define i2sinfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_PWM_ERROR
+#  define pwmerr(format, ...)    _err(format, ##__VA_ARGS__)
+#else
+#  define pwmerr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_PWM_WARN
+#  define pwmwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define pwmwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_PWM_INFO
+#  define pwminfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define pwminfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_RTC_ERROR
+#  define rtcerr(format, ...)    _err(format, ##__VA_ARGS__)
+#else
+#  define rtcerr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_RTC_WARN
+#  define rtcwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define rtcwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_RTC_INFO
+#  define rtcinfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define rtcinfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_MEMCARD_ERROR
+#  define mcerr(format, ...)    _err(format, ##__VA_ARGS__)
+#else
+#  define mcerr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_MEMCARD_WARN
+#  define mcwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define mcwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_MEMCARD_INFO
+#  define mcinfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define mcinfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_SENSORS_ERROR
+#  define snerr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define snerr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_SENSORS_WARN
+#  define snwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define snwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_SENSORS_INFO
+#  define sninfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define sninfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_SPI_ERROR
+#  define spierr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define spierr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_SPI_WARN
+#  define spiwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define spiwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_SPI_INFO
+#  define spiinfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define spiinfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_TIMER_ERROR
+#  define tmrerr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define tmrerr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_TIMER_WARN
+#  define tmrwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define tmrwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_TIMER_INFO
+#  define tmrinfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define tmrinfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_USB_ERROR
+#  define uerr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define uerr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_USB_WARN
+#  define uwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define uwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_USB_INFO
+#  define uinfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define uinfo(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_WATCHDOG_ERROR
+#  define wderr(format, ...)     _err(format, ##__VA_ARGS__)
+#else
+#  define wderr(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_WATCHDOG_WARN
+#  define wdwarn(format, ...)   _warn(format, ##__VA_ARGS__)
+#else
+#  define wdwarn(x...)
+#endif
+
+#ifdef CONFIG_DEBUG_WATCHDOG_INFO
+#  define wdinfo(format, ...)   _info(format, ##__VA_ARGS__)
+#else
+#  define wdinfo(x...)
+#endif
+
+#else /* CONFIG_CPP_HAVE_VARARGS */
+
+/* Variadic macros NOT supported */
+
+#ifndef CONFIG_DEBUG_ALERT
+#  define _alert      (void)
+# endif
+
+#ifndef CONFIG_DEBUG_ERROR
+#  define _err        (void)
+#endif
+
+#ifndef CONFIG_DEBUG_WARN
+#  define _warn       (void)
+#endif
+
+#ifndef CONFIG_DEBUG_INFO
+#  define _info       (void)
+#endif
+
+/* Subsystem specific debug */
+
+#ifdef CONFIG_DEBUG_MM_ERROR
+#  define merr         _err
 #else
-# define EXTRA_FMT
-# define EXTRA_ARG
+#  define merr        (void)
 #endif
 
-/* The actual logger function may be overridden in arch/debug.h if needed. */
+#ifdef CONFIG_DEBUG_MM_WARN
+#  define mwarn       _warn
+#else
+#  define mwarn       (void)
+#endif
 
-#ifndef __arch_syslog
-# define __arch_syslog syslog
+#ifdef CONFIG_DEBUG_MM_INFO
+#  define minfo       _info
+#else
+#  define minfo       (void)
 #endif
-#ifndef __arch_lowsyslog
-# define __arch_lowsyslog lowsyslog
+
+#ifdef CONFIG_DEBUG_SCHED_ERROR
+#  define serr         _err
+#else
+#  define serr        (void)
 #endif
 
-/* Debug macros will differ depending upon if the toolchain supports
- * macros with a variable number of arguments or not.
- */
+#ifdef CONFIG_DEBUG_SCHED_WARN
+#  define swarn       _warn
+#else
+#  define swarn       (void)
+#endif
 
-#ifdef CONFIG_CPP_HAVE_VARARGS
+#ifdef CONFIG_DEBUG_SCHED_INFO
+#  define sinfo       _info
+#else
+#  define sinfo       (void)
+#endif
 
-/* C-99 style variadic macros are supported */
+#ifdef CONFIG_DEBUG_SYSCALL_ERROR
+#  define svcerr       _err
+#else
+#  define svcerr      (void)
+#endif
 
-#ifdef CONFIG_DEBUG
-# define dbg(format, ...) \
-  __arch_syslog(LOG_ERR, EXTRA_FMT format EXTRA_ARG, ##__VA_ARGS__)
+#ifdef CONFIG_DEBUG_SYSCALL_WARN
+#  define svcwarn     _warn
+#else
+#  define svcwarn     (void)
+#endif
 
-# ifdef CONFIG_ARCH_LOWPUTC
-#  define lldbg(format, ...) \
-   __arch_lowsyslog(LOG_ERR, EXTRA_FMT format EXTRA_ARG, ##__VA_ARGS__)
-# else
-#  define lldbg(x...)
-# endif
+#ifdef CONFIG_DEBUG_SYSCALL_INFO
+#  define svcinfo     _info
+#else
+#  define svcinfo     (void)
+#endif
 
-# ifdef CONFIG_DEBUG_VERBOSE
-#  define vdbg(format, ...) \
-   __arch_syslog(LOG_DEBUG, EXTRA_FMT format EXTRA_ARG, ##__VA_ARGS__)
+#ifdef CONFIG_DEBUG_PAGING_ERROR
+#  define pgerr        _err
+#else
+#  define pgerr       (void)
+#endif
 
-#  ifdef CONFIG_ARCH_LOWPUTC
-#    define llvdbg(format, ...) \
-     __arch_lowsyslog(LOG_DEBUG, EXTRA_FMT format EXTRA_ARG, ##__VA_ARGS__)
-#  else
-#    define llvdbg(x...)
-#  endif
+#ifdef CONFIG_DEBUG_PAGING_WARN
+#  define pgwarn      _warn
+#else
+#  define pgwarn      (void)
+#endif
 
-# else /* CONFIG_DEBUG_VERBOSE */
-#  define vdbg(x...)
-#  define llvdbg(x...)
-# endif /* CONFIG_DEBUG_VERBOSE */
+#ifdef CONFIG_DEBUG_PAGING_INFO
+#  define pginfo      _info
+#else
+#  define pginfo      (void)
+#endif
 
-#else /* CONFIG_DEBUG */
+#ifdef CONFIG_DEBUG_NET_ERROR
+#  define nerr         _err
+#else
+#  define nerr        (void)
+#endif
 
-# define dbg(x...)
-# define lldbg(x...)
-# define vdbg(x...)
-# define llvdbg(x...)
+#ifdef CONFIG_DEBUG_NET_WARN
+#  define nwarn       _warn
+#else
+#  define nwarn       (void)
+#endif
 
-#endif /* CONFIG_DEBUG */
+#ifdef CONFIG_DEBUG_NET_INFO
+#  define ninfo       _info
+#else
+#  define ninfo       (void)
+#endif
 
-/* Subsystem specific debug */
+#ifdef CONFIG_DEBUG_FS_ERROR
+#  define ferr         _err
+#else
+#  define ferr        (void)
+#endif
 
-#ifdef CONFIG_DEBUG_MM
-# define mdbg(format, ...)    dbg(format, ##__VA_ARGS__)
-# define mlldbg(format, ...)  lldbg(format, ##__VA_ARGS__)
-# define mvdbg(format, ...)   vdbg(format, ##__VA_ARGS__)
-# define mllvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
+#ifdef CONFIG_DEBUG_FS_WARN
+#  define fwarn       _warn
 #else
-# define mdbg(x...)
-# define mlldbg(x...)
-# define mvdbg(x...)
-# define mllvdbg(x...)
+#  define fwarn       (void)
 #endif
 
-#ifdef CONFIG_DEBUG_SCHED
-# define sdbg(format, ...)    dbg(format, ##__VA_ARGS__)
-# define slldbg(format, ...)  lldbg(format, ##__VA_ARGS__)
-# define svdbg(format, ...)   vdbg(format, ##__VA_ARGS__)
-# define sllvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
+#ifdef CONFIG_DEBUG_FS_INFO
+#  define finfo       _info
 #else
-# define sdbg(x...)
-# define slldbg(x...)
-# define svdbg(x...)
-# define sllvdbg(x...)
+#  define finfo       (void)
 #endif
 
-#ifdef CONFIG_DEBUG_PAGING
-# define pgdbg(format, ...)    dbg(format, ##__VA_ARGS__)
-# define pglldbg(format, ...)  lldbg(format, ##__VA_ARGS__)
-# define pgvdbg(format, ...)   vdbg(format, ##__VA_ARGS__)
-# define pgllvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
+#ifdef CONFIG_DEBUG_CRYPTO_ERROR
+#  define crypterr     _err
 #else
-# define pgdbg(x...)
-# define pglldbg(x...)
-# define pgvdbg(x...)
-# define pgllvdbg(x...)
+#  define crypterr    (void)
 #endif
 
-#ifdef CONFIG_DEBUG_DMA
-# define dmadbg(format, ...)    dbg(format, ##__VA_ARGS__)
-# define dmalldbg(format, ...)  lldbg(format, ##__VA_ARGS__)
-# define dmavdbg(format, ...)   vdbg(format, ##__VA_ARGS__)
-# define dmallvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
+#ifdef CONFIG_DEBUG_CRYPTO_WARN
+#  define cryptwarn   _warn
 #else
-# define dmadbg(x...)
-# define dmalldbg(x...)
-# define dmavdbg(x...)
-# define dmallvdbg(x...)
+#  define cryptwarn   (void)
 #endif
 
-#ifdef CONFIG_DEBUG_NET
-# define ndbg(format, ...)    dbg(format, ##__VA_ARGS__)
-# define nlldbg(format, ...)  lldbg(format, ##__VA_ARGS__)
-# define nvdbg(format, ...)   vdbg(format, ##__VA_ARGS__)
-# define nllvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
+#ifdef CONFIG_DEBUG_CRYPTO_INFO
+#  define cryptinfo   _info
 #else
-# define ndbg(x...)
-# define nlldbg(x...)
-# define nvdbg(x...)
-# define nllvdbg(x...)
+#  define cryptinfo   (void)
 #endif
 
-#ifdef CONFIG_DEBUG_USB
-# define udbg(format, ...)    dbg(format, ##__VA_ARGS__)
-# define ulldbg(format, ...)  lldbg(format, ##__VA_ARGS__)
-# define uvdbg(format, ...)   vdbg(format, ##__VA_ARGS__)
-# define ullvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
+#ifdef CONFIG_DEBUG_INPUT_ERROR
+#  define ierr         _err
 #else
-# define udbg(x...)
-# define ulldbg(x...)
-# define uvdbg(x...)
-# define ullvdbg(x...)
+#  define ierr        (void)
 #endif
 
-#ifdef CONFIG_DEBUG_FS
-# define fdbg(format, ...)    dbg(format, ##__VA_ARGS__)
-# define flldbg(format, ...)  lldbg(format, ##__VA_ARGS__)
-# define fvdbg(format, ...)   vdbg(format, ##__VA_ARGS__)
-# define fllvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
+#ifdef CONFIG_DEBUG_INPUT_WARN
+#  define iwarn       _warn
 #else
-# define fdbg(x...)
-# define flldbg(x...)
-# define fvdbg(x...)
-# define fllvdbg(x...)
+#  define iwarn       (void)
 #endif
 
-#ifdef CONFIG_DEBUG_CRYPTO
-# define cryptdbg(format, ...)    dbg(format, ##__VA_ARGS__)
-# define cryptlldbg(format, ...)  lldbg(format, ##__VA_ARGS__)
-# define cryptvdbg(format, ...)   vdbg(format, ##__VA_ARGS__)
-# define cryptllvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
+#ifdef CONFIG_DEBUG_INPUT_INFO
+#  define iinfo       _info
 #else
-# define cryptdbg(x...)
-# define cryptlldbg(x...)
-# define cryptvdbg(x...)
-# define cryptllvdbg(x...)
+#  define iinfo       (void)
 #endif
 
-#ifdef CONFIG_DEBUG_INPUT
-# define idbg(format, ...)    dbg(format, ##__VA_ARGS__)
-# define illdbg(format, ...)  lldbg(format, ##__VA_ARGS__)
-# define ivdbg(format, ...)   vdbg(format, ##__VA_ARGS__)
-# define illvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
+#ifdef CONFIG_DEBUG_ANALOG_ERROR
+#  define aerr         _err
 #else
-# define idbg(x...)
-# define illdbg(x...)
-# define ivdbg(x...)
-# define illvdbg(x...)
+#  define aerr        (void)
 #endif
 
-#ifdef CONFIG_DEBUG_SENSORS
-# define sndbg(format, ...)    dbg(format, ##__VA_ARGS__)
-# define snlldbg(format, ...)  lldbg(format, ##__VA_ARGS__)
-# define snvdbg(format, ...)   vdbg(format, ##__VA_ARGS__)
-# define snllvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
+#ifdef CONFIG_DEBUG_ANALOG_WARN
+#  define awarn       _warn
 #else
-# define sndbg(x...)
-# define snlldbg(x...)
-# define snvdbg(x...)
-# define snllvdbg(x...)
+#  define awarn       (void)
 #endif
 
-#ifdef CONFIG_DEBUG_ANALOG
-# define adbg(format, ...)    dbg(format, ##__VA_ARGS__)
-# define alldbg(format, ...)  lldbg(format, ##__VA_ARGS__)
-# define avdbg(format, ...)   vdbg(format, ##__VA_ARGS__)
-# define allvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
+#ifdef CONFIG_DEBUG_ANALOG_INFO
+#  define ainfo       _info
 #else
-# define adbg(x...)
-# define alldbg(x...)
-# define avdbg(x...)
-# define allvdbg(x...)
+#  define ainfo       (void)
 #endif
 
-#ifdef CONFIG_DEBUG_GRAPHICS
-# define gdbg(format, ...)    dbg(format, ##__VA_ARGS__)
-# define glldbg(format, ...)  lldbg(format, ##__VA_ARGS__)
-# define gvdbg(format, ...)   vdbg(format, ##__VA_ARGS__)
-# define gllvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
+#ifdef CONFIG_DEBUG_CAN_ERROR
+#  define canerr       _err
 #else
-# define gdbg(x...)
-# define glldbg(x...)
-# define gvdbg(x...)
-# define gllvdbg(x...)
+#  define canerr      (void)
 #endif
 
-#ifdef CONFIG_DEBUG_BINFMT
-# define bdbg(format, ...)    dbg(format, ##__VA_ARGS__)
-# define blldbg(format, ...)  lldbg(format, ##__VA_ARGS__)
-# define bvdbg(format, ...)   vdbg(format, ##__VA_ARGS__)
-# define bllvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
+#ifdef CONFIG_DEBUG_CAN_WARN
+#  define canwarn     _warn
 #else
-# define bdbg(x...)
-# define blldbg(x...)
-# define bvdbg(x...)
-# define bllvdbg(x...)
+#  define canwarn     (void)
 #endif
 
-#ifdef CONFIG_DEBUG_LIB
-# define ldbg(format, ...)    dbg(format, ##__VA_ARGS__)
-# define llldbg(format, ...)  lldbg(format, ##__VA_ARGS__)
-# define lvdbg(format, ...)   vdbg(format, ##__VA_ARGS__)
-# define lllvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
+#ifdef CONFIG_DEBUG_CAN_INFO
+#  define caninfo     _info
 #else
-# define ldbg(x...)
-# define llldbg(x...)
-# define lvdbg(x...)
-# define lllvdbg(x...)
+#  define caninfo     (void)
 #endif
 
-#ifdef CONFIG_DEBUG_AUDIO
-# define auddbg(format, ...)    dbg(format, ##__VA_ARGS__)
-# define audlldbg(format, ...)  lldbg(format, ##__VA_ARGS__)
-# define audvdbg(format, ...)   vdbg(format, ##__VA_ARGS__)
-# define audllvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
+#ifdef CONFIG_DEBUG_GRAPHICS_ERROR
+#  define gerr         _err
 #else
-# define auddbg(x...)
-# define audlldbg(x...)
-# define audvdbg(x...)
-# define audllvdbg(x...)
+#  define gerr        (void)
 #endif
 
-#else /* CONFIG_CPP_HAVE_VARARGS */
+#ifdef CONFIG_DEBUG_GRAPHICS_WARN
+#  define gwarn       _warn
+#else
+#  define gwarn       (void)
+#endif
 
-/* Variadic macros NOT supported */
+#ifdef CONFIG_DEBUG_GRAPHICS_INFO
+#  define ginfo       _info
+#else
+#  define ginfo       (void)
+#endif
 
-#ifdef CONFIG_DEBUG
-# ifndef CONFIG_ARCH_LOWPUTC
-#  define lldbg      (void)
-# endif
-# ifndef CONFIG_DEBUG_VERBOSE
-#  define vdbg       (void)
-#  define llvdbg     (void)
-# else
-#  ifndef CONFIG_ARCH_LOWPUTC
-#    define llvdbg   (void)
-#  endif
-# endif
+#ifdef CONFIG_DEBUG_BINFMT_ERROR
+#  define berr         _err
 #else
-# define dbg         (void)
-# define lldbg       (void)
-# define vdbg        (void)
-# define llvdbg      (void)
+#  define berr        (void)
 #endif
 
-/* Subsystem specific debug */
+#ifdef CONFIG_DEBUG_BINFMT_WARN
+#  define bwarn       _warn
+#else
+#  define bwarn       (void)
+#endif
 
-#ifdef CONFIG_DEBUG_MM
-# define mdbg        dbg
-# define mlldbg      lldbg
-# define mvdbg       vdbg
-# define mllvdbg     llvdbg
+#ifdef CONFIG_DEBUG_BINFMT_INFO
+#  define binfo       _info
 #else
-# define mdbg        (void)
-# define mlldbg      (void)
-# define mvdbg       (void)
-# define mllvdbg     (void)
+#  define binfo       (void)
 #endif
 
-#ifdef CONFIG_DEBUG_SCHED
-# define sdbg        dbg
-# define slldbg      lldbg
-# define svdbg       vdbg
-# define sllvdbg     llvdbg
+#ifdef CONFIG_DEBUG_LIB_ERROR
+#  define lerr         _err
 #else
-# define sdbg        (void)
-# define slldbg      (void)
-# define svdbg       (void)
-# define sllvdbg     (void)
+#  define lerr        (void)
 #endif
 
-#ifdef CONFIG_DEBUG_PAGING
-# define pgdbg       dbg
-# define pglldbg     lldbg
-# define pgvdbg      vdbg
-# define pgllvdbg    llvdbg
+#ifdef CONFIG_DEBUG_LIB_WARN
+#  define lwarn       _warn
 #else
-# define pgdbg       (void)
-# define pglldbg     (void)
-# define pgvdbg      (void)
-# define pgllvdbg    (void)
+#  define lwarn       (void)
 #endif
 
-#ifdef CONFIG_DEBUG_DMA
-# define dmadbg      dbg
-# define dmalldbg    lldbg
-# define dmavdbg     vdbg
-# define dmallvdbg   llvdbg
+#ifdef CONFIG_DEBUG_LIB_INFO
+#  define linfo       _info
 #else
-# define dmadbg      (void)
-# define dmalldbg    (void)
-# define dmavdbg     (void)
-# define dmallvdbg   (void)
+#  define linfo       (void)
 #endif
 
-#ifdef CONFIG_DEBUG_NET
-# define ndbg        dbg
-# define nlldbg      lldbg
-# define nvdbg       vdbg
-# define nllvdbg     llvdbg
+#ifdef CONFIG_DEBUG_AUDIO_ERROR
+#  define auderr       _err
 #else
-# define ndbg        (void)
-# define nlldbg      (void)
-# define nvdbg       (void)
-# define nllvdbg     (void)
+#  define auderr      (void)
 #endif
 
-#ifdef CONFIG_DEBUG_USB
-# define udbg        dbg
-# define ulldbg      lldbg
-# define uvdbg       vdbg
-# define ullvdbg     llvdbg
+#ifdef CONFIG_DEBUG_AUDIO_WARN
+#  define audwarn     _warn
 #else
-# define udbg        (void)
-# define ulldbg      (void)
-# define uvdbg       (void)
-# define ullvdbg     (void)
+#  define audwarn     (void)
 #endif
 
-#ifdef CONFIG_DEBUG_FS
-# define fdbg        dbg
-# define flldbg      lldbg
-# define fvdbg       vdbg
-# define fllvdbg     llvdbg
+#ifdef CONFIG_DEBUG_AUDIO_INFO
+#  define audinfo     _info
 #else
-# define fdbg        (void)
-# define flldbg      (void)
-# define fvdbg       (void)
-# define fllvdbg     (void)
+#  define audinfo     (void)
 #endif
 
-#ifdef CONFIG_DEBUG_CRYPTO
-# define cryptdbg    dbg
-# define cryptlldbg  lldbg
-# define cryptvdbg   vdbg
-# define cryptllvdbg llvdbg
+#ifdef CONFIG_DEBUG_DMA_ERROR
+#  define dmaerr       _err
 #else
-# define cryptdbg    (void)
-# define cryptlldbg  (void)
-# define cryptvdbg   (void)
-# define cryptllvdbg (void)
+#  define dmaerr      (void)
 #endif
 
-#ifdef CONFIG_DEBUG_INPUT
-# define idbg        dbg
-# define illdbg      lldbg
-# define ivdbg       vdbg
-# define illvdbg     llvdbg
+#ifdef CONFIG_DEBUG_DMA_WARN
+#  define dmawarn     _warn
 #else
-# define idbg        (void)
-# define illdbg      (void)
-# define ivdbg       (void)
-# define illvdbg     (void)
+#  define dmawarn     (void)
 #endif
 
-#ifdef CONFIG_DEBUG_SENSORS
-# define sndbg        dbg
-# define snlldbg      lldbg
-# define snvdbg       vdbg
-# define snllvdbg     llvdbg
+#ifdef CONFIG_DEBUG_DMA_INFO
+#  define dmainfo     _info
 #else
-# define sndbg        (void)
-# define snlldbg      (void)
-# define snvdbg       (void)
-# define snllvdbg     (void)
+#  define dmainfo     (void)
 #endif
 
-#ifdef CONFIG_DEBUG_ANALOG
-# define adbg        dbg
-# define alldbg      lldbg
-# define avdbg       vdbg
-# define allvdbg     llvdbg
+#ifdef CONFIG_DEBUG_IRQ_ERROR
+#  define irqerr       _err
 #else
-# define adbg        (void)
-# define alldbg      (void)
-# define avdbg       (void)
-# define allvdbg     (void)
+#  define irqerr      (void)
 #endif
 
-#ifdef CONFIG_DEBUG_GRAPHICS
-# define gdbg        dbg
-# define glldbg      lldbg
-# define gvdbg       vdbg
-# define gllvdbg     llvdbg
+#ifdef CONFIG_DEBUG_IRQ_WARN
+#  define irqwarn     _warn
 #else
-# define gdbg        (void)
-# define glldbg      (void)
-# define gvdbg       (void)
-# define gllvdbg     (void)
+#  define irqwarn     (void)
 #endif
 
-#ifdef CONFIG_DEBUG_BINFMT
-# define bdbg        dbg
-# define blldbg      lldbg
-# define bvdbg       vdbg
-# define bllvdbg     llvdbg
+#ifdef CONFIG_DEBUG_IRQ_INFO
+#  define irqinfo     _info
 #else
-# define bdbg        (void)
-# define blldbg      (void)
-# define bvdbg       (void)
-# define bllvdbg     (void)
+#  define irqinfo     (void)
 #endif
 
-#ifdef CONFIG_DEBUG_LIB
-# define ldbg        dbg
-# define llldbg      lldbg
-# define lvdbg       vdbg
-# define lllvdbg     llvdbg
+#ifdef CONFIG_DEBUG_LCD_ERROR
+#  define lcderr       _err
 #else
-# define ldbg        (void)
-# define llldbg      (void)
-# define lvdbg       (void)
-# define lllvdbg     (void)
+#  define lcderr      (void)
 #endif
 
-#ifdef CONFIG_DEBUG_AUDIO
-# define auddbg      dbg
-# define audlldbg    lldbg
-# define audvdbg     vdbg
-# define audllvdbg   llvdbg
+#ifdef CONFIG_DEBUG_LCD_WARN
+#  define lcdwarn     _warn
+#else
+#  define lcdwarn     (void)
+#endif
+
+#ifdef CONFIG_DEBUG_LCD_INFO
+#  define lcdinfo     _info
+#else
+#  define lcdinfo     (void)
+#endif
+
+#ifdef CONFIG_DEBUG_LEDS_ERROR
+#  define lederr       _err
+#else
+#  define lederr      (void)
+#endif
+
+#ifdef CONFIG_DEBUG_LEDS_WARN
+#  define ledwarn     _warn
+#else
+#  define ledwarn     (void)
+#endif
+
+#ifdef CONFIG_DEBUG_LEDS_INFO
+#  define ledinfo     _info
+#else
+#  define ledinfo     (void)
+#endif
+
+#ifdef CONFIG_DEBUG_GPIO_ERROR
+#  define gpioerr      _err
+#else
+#  define gpioerr     (void)
+#endif
+
+#ifdef CONFIG_DEBUG_GPIO_WARN
+#  define gpiowarn    _warn
+#else
+#  define gpiowarn    (void)
+#endif
+
+#ifdef CONFIG_DEBUG_GPIO_INFO
+#  define gpioinfo    _info
+#else
+#  define gpioinfo    (void)
+#endif
+
+#ifdef CONFIG_DEBUG_I2C_ERROR
+#  define i2cerr       _err
+#else
+#  define i2cerr      (void)
+#endif
+
+#ifdef CONFIG_DEBUG_I2C_WARN
+#  define i2cwarn     _warn
+#else
+#  define i2cwarn     (void)
+#endif
+
+#ifdef CONFIG_DEBUG_I2C_INFO
+#  define i2cinfo     _info
+#else
+#  define i2cinfo     (void)
+#endif
+
+#ifdef CONFIG_DEBUG_I2S_ERROR
+#  define i2serr       _err
+#else
+#  define i2serr      (void)
+#endif
+
+#ifdef CONFIG_DEBUG_I2S_WARN
+#  define i2swarn     _warn
+#else
+#  define i2swarn     (void)
+#endif
+
+#ifdef CONFIG_DEBUG_I2S_INFO
+#  define i2sinfo     _info
+#else
+#  define i2sinfo     (void)
+#endif
+
+#ifdef CONFIG_DEBUG_PWM_ERROR
+#  define pwmerr       _err
+#else
+#  define pwmerr      (void)
+#endif
+
+#ifdef CONFIG_DEBUG_PWM_WARN
+#  define pwmwarn     _warn
+#else
+#  define pwmwarn     (void)
+#endif
+
+#ifdef CONFIG_DEBUG_PWM_INFO
+#  define pwminfo     _info
 #else
-# define auddbg      (void)
-# define audlldbg    (void)
-# define audvdbg     (void)
-# define audllvdbg   (void)
+#  define pwminfo     (void)
+#endif
+
+#ifdef CONFIG_DEBUG_RTC_ERROR
+#  define rtcerr       _err
+#else
+#  define rtcerr      (void)
+#endif
+
+#ifdef CONFIG_DEBUG_RTC_WARN
+#  define rtcwarn     _warn
+#else
+#  define rtcwarn     (void)
+#endif
+
+#ifdef CONFIG_DEBUG_RTC_INFO
+#  define rtcinfo     _info
+#else
+#  define rtcinfo     (void)
+#endif
+
+#ifdef CONFIG_DEBUG_MEMCARD_ERROR
+#  define mcerr        _err
+#else
+#  define mcerr       (void)
+#endif
+
+#ifdef CONFIG_DEBUG_MEMCARD_WARN
+#  define mcwarn      _warn
+#else
+#  define mcwarn      (void)
+#endif
+
+#ifdef CONFIG_DEBUG_MEMCARD_INFO
+#  define mcinfo      _info
+#else
+#  define mcinfo      (void)
+#endif
+
+#ifdef CONFIG_DEBUG_SENSORS_ERROR
+#  define snerr        _err
+#else
+#  define snerr       (void)
+#endif
+
+#ifdef CONFIG_DEBUG_SENSORS_WARN
+#  define snwarn      _warn
+#else
+#  define snwarn      (void)
+#endif
+
+#ifdef CONFIG_DEBUG_SENSORS_INFO
+#  define sninfo      _info
+#else
+#  define sninfo      (void)
+#endif
+
+#ifdef CONFIG_DEBUG_SPI_ERROR
+#  define spierr       _err
+#else
+#  define spierr      (void)
+#endif
+
+#ifdef CONFIG_DEBUG_SPI_WARN
+#  define spiwarn     _warn
+#else
+#  define spiwarn     (void)
+#endif
+
+#ifdef CONFIG_DEBUG_SPI_INFO
+#  define spiinfo     _info
+#else
+#  define spiinfo     (void)
+#endif
+
+#ifdef CONFIG_DEBUG_TIMER_ERROR
+#  define tmrerr       _err
+#else
+#  define tmrerr      (void)
+#endif
+
+#ifdef CONFIG_DEBUG_TIMER_WARN
+#  define tmrwarn     _warn
+#else
+#  define tmrwarn     (void)
+#endif
+
+#ifdef CONFIG_DEBUG_TIMER_INFO
+#  define tmrinfo     _info
+#else
+#  define tmrinfo     (void)
+#endif
+
+#ifdef CONFIG_DEBUG_USB_ERROR
+#  define uerr         _err
+#else
+#  define uerr        (void)
+#endif
+
+#ifdef CONFIG_DEBUG_USB_WARN
+#  define uwarn       _warn
+#else
+#  define uwarn       (void)
+#endif
+
+#ifdef CONFIG_DEBUG_USB_INFO
+#  define uinfo       _info
+#else
+#  define uinfo       (void)
+#endif
+
+#ifdef CONFIG_DEBUG_WATCHDOG_ERROR
+#  define wderr        _err
+#else
+#  define wderr       (void)
+#endif
+
+#ifdef CONFIG_DEBUG_WATCHDOG_WARN
+#  define wdwarn      _warn
+#else
+#  define wdwarn      (void)
+#endif
+
+#ifdef CONFIG_DEBUG_WATCHDOG_INFO
+#  define wdinfo      _info
+#else
+#  define wdinfo      (void)
 #endif
 
 #endif /* CONFIG_CPP_HAVE_VARARGS */
 
 /* Buffer dumping macros do not depend on varargs */
 
-#ifdef CONFIG_DEBUG
-#  define dbgdumpbuffer(m,b,n) lib_dumpbuffer(m,b,n)
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define vdbgdumpbuffer(m,b,n) lib_dumpbuffer(m,b,n)
+#ifdef CONFIG_DEBUG_ERROR
+#  define errdumpbuffer(m,b,n) lib_dumpbuffer(m,b,n)
+#  ifdef CONFIG_DEBUG_INFO
+#    define infodumpbuffer(m,b,n) lib_dumpbuffer(m,b,n)
 #  else
-#   define vdbgdumpbuffer(m,b,n)
+#   define infodumpbuffer(m,b,n)
 #  endif
 #else
-#  define dbgdumpbuffer(m,b,n)
-#  define vdbgdumpbuffer(m,b,n)
+#  define errdumpbuffer(m,b,n)
+#  define infodumpbuffer(m,b,n)
 # endif
 
 /* Subsystem specific debug */
 
 #ifdef CONFIG_DEBUG_MM
-#  define mdbgdumpbuffer(m,b,n)  dbgdumpbuffer(m,b,n)
-#  define mvdbgdumpbuffer(m,b,n) vdbgdumpbuffer(m,b,n)
+#  define merrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define minfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
 #else
-#  define mdbgdumpbuffer(m,b,n)
-#  define mvdbgdumpbuffer(m,b,n)
+#  define merrdumpbuffer(m,b,n)
+#  define minfodumpbuffer(m,b,n)
 #endif
 
 #ifdef CONFIG_DEBUG_SCHED
-#  define sdbgdumpbuffer(m,b,n)  dbgdumpbuffer(m,b,n)
-#  define svdbgdumpbuffer(m,b,n) vdbgdumpbuffer(m,b,n)
+#  define serrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define sinfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
 #else
-#  define sdbgdumpbuffer(m,b,n)
-#  define svdbgdumpbuffer(m,b,n)
+#  define serrdumpbuffer(m,b,n)
+#  define sinfodumpbuffer(m,b,n)
 #endif
 
-#ifdef CONFIG_DEBUG_PAGING
-#  define pgdbgdumpbuffer(m,b,n)  dbgdumpbuffer(m,b,n)
-#  define pgvdbgdumpbuffer(m,b,n) vdbgdumpbuffer(m,b,n)
+#ifdef CONFIG_DEBUG_SYSCALL
+#  define svcerrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define svcinfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
 #else
-#  define pgdbgdumpbuffer(m,b,n)
-#  define pgvdbgdumpbuffer(m,b,n)
+#  define svcerrdumpbuffer(m,b,n)
+#  define svcinfodumpbuffer(m,b,n)
 #endif
 
-#ifdef CONFIG_DEBUG_DMA
-#  define dmadbgdumpbuffer(m,b,n)  dbgdumpbuffer(m,b,n)
-#  define dmavdbgdumpbuffer(m,b,n) vdbgdumpbuffer(m,b,n)
+#ifdef CONFIG_DEBUG_PAGING
+#  define pgerrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define pginfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
 #else
-#  define dmadbgdumpbuffer(m,b,n)
-#  define dmavdbgdumpbuffer(m,b,n)
+#  define pgerrdumpbuffer(m,b,n)
+#  define pginfodumpbuffer(m,b,n)
 #endif
 
 #ifdef CONFIG_DEBUG_NET
-#  define ndbgdumpbuffer(m,b,n)  dbgdumpbuffer(m,b,n)
-#  define nvdbgdumpbuffer(m,b,n) vdbgdumpbuffer(m,b,n)
+#  define nerrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define ninfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
 #else
-#  define ndbgdumpbuffer(m,b,n)
-#  define nvdbgdumpbuffer(m,b,n)
+#  define nerrdumpbuffer(m,b,n)
+#  define ninfodumpbuffer(m,b,n)
 #endif
 
-#ifdef CONFIG_DEBUG_USB
-#  define udbgdumpbuffer(m,b,n)  dbgdumpbuffer(m,b,n)
-#  define uvdbgdumpbuffer(m,b,n) vdbgdumpbuffer(m,b,n)
+#ifdef CONFIG_DEBUG_FS
+#  define ferrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define finfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
 #else
-#  define udbgdumpbuffer(m,b,n)
-#  define uvdbgdumpbuffer(m,b,n)
+#  define ferrdumpbuffer(m,b,n)
+#  define finfodumpbuffer(m,b,n)
 #endif
 
-#ifdef CONFIG_DEBUG_FS
-#  define fdbgdumpbuffer(m,b,n)  dbgdumpbuffer(m,b,n)
-#  define fvdbgdumpbuffer(m,b,n) vdbgdumpbuffer(m,b,n)
+#ifdef CONFIG_DEBUG_INPUT
+#  define ierrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define iinfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
 #else
-#  define fdbgdumpbuffer(m,b,n)
-#  define fvdbgdumpbuffer(m,b,n)
+#  define ierrdumpbuffer(m,b,n)
+#  define iinfodumpbuffer(m,b,n)
 #endif
 
-#ifdef CONFIG_DEBUG_INPUT
-#  define idbgdumpbuffer(m,b,n)  dbgdumpbuffer(m,b,n)
-#  define ivdbgdumpbuffer(m,b,n) vdbgdumpbuffer(m,b,n)
+#ifdef CONFIG_DEBUG_ANALOG
+#  define aerrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define ainfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
 #else
-#  define idbgdumpbuffer(m,b,n)
-#  define ivdbgdumpbuffer(m,b,n)
+#  define aerrdumpbuffer(m,b,n)
+#  define ainfodumpbuffer(m,b,n)
+#endif
+
+#ifdef CONFIG_DEBUG_CAN
+#  define canerrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define caninfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
+#else
+#  define canerrdumpbuffer(m,b,n)
+#  define caninfodumpbuffer(m,b,n)
 #endif
 
 #ifdef CONFIG_DEBUG_GRAPHICS
-#  define gdbgdumpbuffer(m,b,n)  dbgdumpbuffer(m,b,n)
-#  define gvdbgdumpbuffer(m,b,n) vdbgdumpbuffer(m,b,n)
+#  define gerrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define ginfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
 #else
-#  define gdbgdumpbuffer(m,b,n)
-#  define gvdbgdumpbuffer(m,b,n)
+#  define gerrdumpbuffer(m,b,n)
+#  define ginfodumpbuffer(m,b,n)
 #endif
 
 #ifdef CONFIG_DEBUG_BINFMT
-#  define bdbgdumpbuffer(m,b,n)  dbgdumpbuffer(m,b,n)
-#  define bvdbgdumpbuffer(m,b,n) vdbgdumpbuffer(m,b,n)
+#  define berrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define binfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
 #else
-#  define bdbgdumpbuffer(m,b,n)
-#  define bvdbgdumpbuffer(m,b,n)
+#  define berrdumpbuffer(m,b,n)
+#  define binfodumpbuffer(m,b,n)
 #endif
 
 #ifdef CONFIG_DEBUG_LIB
-#  define ldbgdumpbuffer(m,b,n)  dbgdumpbuffer(m,b,n)
-#  define lvdbgdumpbuffer(m,b,n) vdbgdumpbuffer(m,b,n)
+#  define lerrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define linfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
 #else
-#  define ldbgdumpbuffer(m,b,n)
-#  define lvdbgdumpbuffer(m,b,n)
+#  define lerrdumpbuffer(m,b,n)
+#  define linfodumpbuffer(m,b,n)
 #endif
 
 #ifdef CONFIG_DEBUG_AUDIO
-#  define auddbgdumpbuffer(m,b,n)  dbgdumpbuffer(m,b,n)
-#  define audvdbgdumpbuffer(m,b,n) vdbgdumpbuffer(m,b,n)
+#  define auderrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define audinfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
+#else
+#  define auderrdumpbuffer(m,b,n)
+#  define audinfodumpbuffer(m,b,n)
+#endif
+
+#ifdef CONFIG_DEBUG_DMA
+#  define dmaerrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define dmainfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
+#else
+#  define dmaerrdumpbuffer(m,b,n)
+#  define dmainfodumpbuffer(m,b,n)
+#endif
+
+#ifdef CONFIG_DEBUG_IRQ
+#  define irqerrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define irqinfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
+#else
+#  define irqerrdumpbuffer(m,b,n)
+#  define irqinfodumpbuffer(m,b,n)
+#endif
+
+#ifdef CONFIG_DEBUG_LCD
+#  define lcderrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define lcdinfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
+#else
+#  define lcderrdumpbuffer(m,b,n)
+#  define lcdinfodumpbuffer(m,b,n)
+#endif
+
+#ifdef CONFIG_DEBUG_LEDS
+#  define lederrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define ledinfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
+#else
+#  define lederrdumpbuffer(m,b,n)
+#  define ledinfodumpbuffer(m,b,n)
+#endif
+
+#ifdef CONFIG_DEBUG_GPIO
+#  define gpioerrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define gpioinfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
+#else
+#  define gpioerrdumpbuffer(m,b,n)
+#  define gpioinfodumpbuffer(m,b,n)
+#endif
+
+#ifdef CONFIG_DEBUG_I2C
+#  define i2cerrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define i2cinfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
+#else
+#  define i2cerrdumpbuffer(m,b,n)
+#  define i2cinfodumpbuffer(m,b,n)
+#endif
+
+#ifdef CONFIG_DEBUG_I2S
+#  define i2serrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define i2sinfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
+#else
+#  define i2serrdumpbuffer(m,b,n)
+#  define i2sinfodumpbuffer(m,b,n)
+#endif
+
+#ifdef CONFIG_DEBUG_PWM
+#  define pwmerrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define pwminfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
+#else
+#  define pwmerrdumpbuffer(m,b,n)
+#  define pwminfodumpbuffer(m,b,n)
+#endif
+
+#ifdef CONFIG_DEBUG_RTC
+#  define rtcerrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define rtcinfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
+#else
+#  define rtcerrdumpbuffer(m,b,n)
+#  define rtcinfodumpbuffer(m,b,n)
+#endif
+
+#ifdef CONFIG_DEBUG_MEMCARD
+#  define mcerrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define mcinfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
+#else
+#  define mcerrdumpbuffer(m,b,n)
+#  define mcinfodumpbuffer(m,b,n)
+#endif
+
+#ifdef CONFIG_DEBUG_SENSORS
+#  define snerrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define sninfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
+#else
+#  define snerrdumpbuffer(m,b,n)
+#  define sninfodumpbuffer(m,b,n)
+#endif
+
+#ifdef CONFIG_DEBUG_SPI
+#  define spierrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define spiinfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
+#else
+#  define spierrdumpbuffer(m,b,n)
+#  define spiinfodumpbuffer(m,b,n)
+#endif
+
+#ifdef CONFIG_DEBUG_TIMER
+#  define tmrerrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define tmrinfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
+#else
+#  define tmrerrdumpbuffer(m,b,n)
+#  define tmrinfodumpbuffer(m,b,n)
+#endif
+
+#ifdef CONFIG_DEBUG_USB
+#  define uerrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define uinfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
 #else
-#  define auddbgdumpbuffer(m,b,n)
-#  define audvdbgdumpbuffer(m,b,n)
+#  define uerrdumpbuffer(m,b,n)
+#  define uinfodumpbuffer(m,b,n)
+#endif
+
+#ifdef CONFIG_DEBUG_WATCHDOG
+#  define wderrdumpbuffer(m,b,n)  errdumpbuffer(m,b,n)
+#  define wdinfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
+#else
+#  define wderrdumpbuffer(m,b,n)
+#  define wdinfodumpbuffer(m,b,n)
 #endif
 
 /****************************************************************************
@@ -684,21 +1483,21 @@ void lib_dumpbuffer(FAR const char *msg, FAR const uint8_t *buffer,
  */
 
 #ifndef CONFIG_CPP_HAVE_VARARGS
-#ifdef CONFIG_DEBUG
-int dbg(const char *format, ...);
+#ifdef CONFIG_DEBUG_ALERT
+int _alert(const char *format, ...);
+#endif
 
-# ifdef CONFIG_ARCH_LOWPUTC
-int lldbg(const char *format, ...);
-# endif
+#ifdef CONFIG_DEBUG_ERROR
+int  _err(const char *format, ...);
+#endif
 
-# ifdef CONFIG_DEBUG_VERBOSE
-int vdbg(const char *format, ...);
+#ifdef CONFIG_DEBUG_WARN
+int _warn(const char *format, ...);
+#endif
 
-# ifdef CONFIG_ARCH_LOWPUTC
-int llvdbg(const char *format, ...);
-# endif
+#ifdef CONFIG_DEBUG_INFO
+int _info(const char *format, ...);
 #endif
-#endif /* CONFIG_DEBUG */
 #endif /* CONFIG_CPP_HAVE_VARARGS */
 
 #if defined(__cplusplus)
diff --git a/include/dirent.h b/include/dirent.h
index ea6b18a142acc6197e3fd695ac276b418485403e..064dc8f952689d08e73a03e661198cf023a93b3f 100644
--- a/include/dirent.h
+++ b/include/dirent.h
@@ -55,15 +55,18 @@
  * of NuttX, an inode can be BOTH a file and a directory
  */
 
-#define DTYPE_FILE      0x01
-#define DTYPE_CHR       0x02
-#define DTYPE_BLK       0x04
-#define DTYPE_DIRECTORY 0x08
-
-#define DIRENT_ISFILE(dtype)      (((dtype) & DTYPE_FILE) != 0 )
-#define DIRENT_ISCHR(dtype)       (((dtype) & DTYPE_CHR) != 0 )
-#define DIRENT_ISBLK(dtype)       (((dtype) & DTYPE_BLK) != 0 )
-#define DIRENT_ISDIRECTORY(dtype) (((dtype) & DTYPE_DIRECTORY) != 0 )
+#define DTYPE_UNKNOWN   0         /* The file type could not be determined */
+#define DTYPE_FILE      (1 << 0)  /* Bit 0: Regular file */
+#define DTYPE_CHR       (1 << 1)  /* Bit 1: Character device */
+#define DTYPE_BLK       (1 << 2)  /* Bit 2: Block device */
+#define DTYPE_DIRECTORY (1 << 3)  /* Bit 3: Directory */
+#define DTYPE_LINK      (1 << 4)  /* Bit 4: Symbolic link */
+
+#define DIRENT_ISFILE(dtype)      (((dtype) & DTYPE_FILE) != 0)
+#define DIRENT_ISCHR(dtype)       (((dtype) & DTYPE_CHR) != 0)
+#define DIRENT_ISBLK(dtype)       (((dtype) & DTYPE_BLK) != 0)
+#define DIRENT_ISDIRECTORY(dtype) (((dtype) & DTYPE_DIRECTORY) != 0)
+#define DIRENT_ISLINK(dtype)      (((dtype) & DTYPE_LINK) != 0)
 
 /****************************************************************************
  * Public Type Definitions
diff --git a/include/dllfcn.h b/include/dllfcn.h
new file mode 100644
index 0000000000000000000000000000000000000000..cbf1d445ed0c1218982517dee808f4bb9806fcb1
--- /dev/null
+++ b/include/dllfcn.h
@@ -0,0 +1,332 @@
+/****************************************************************************
+ * include/dllfcn.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_DLLFCN_H
+#define __INCLUDE_DLLFCN_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitons
+ ****************************************************************************/
+
+/* The dlfcn.h header defines at least the following macros for use in the
+ * construction of a dlopen() mode argument:
+ *
+ *   RTLD_LAZY   - Relocations are performed at an implementation-dependent
+ *                 time, ranging from the time of the dlopen() call until
+ *                 the first reference to a given symbol occurs. Specifying
+ *                 RTLD_LAZY should improve performance on implementations
+ *                 supporting dynamic symbol binding as a process may not
+ *                 reference all of the functions in any given object. And,
+ *                 for systems supporting dynamic symbol resolution for
+ *                 normal process execution, this behaviour mimics the
+ *                 normal handling of process execution.
+ *   RTLD_NOW    - All necessary relocations are performed when the object
+ *                 is first loaded. This may waste some processing if
+ *                 relocations are performed for functions that are never
+ *                 referenced. This behaviour may be useful for
+ *                 applications that need to know as soon as an object is
+ *                 loaded that all symbols referenced during execution will
+ *                 be available.
+ *
+ * Any object loaded by dlopen() that requires relocations against global
+ * symbols can reference the symbols in the original process image file,
+ * any objects loaded at program startup, from the object itself as well as
+ * any other object included in the same dlopen() invocation, and any
+ * objects that were loaded in any dlopen() invocation and which specified
+ * the RTLD_GLOBAL flag. To determine the scope of visibility for the
+ * symbols loaded with a dlopen() invocation, the mode parameter should be
+ * bitwise or'ed with one of the following values:
+ *
+ *   RTLD_GLOBAL - The object's symbols are made available for the
+ *                 relocation processing of any other object. In addition,
+ *                 symbol lookup using dlopen(0, mode) and an associated
+ *                 dlsym() allows objects loaded with this mode to be
+ *                 searched.
+ *   RTLD_LOCAL  - All symbols are not made available for relocation
+ *                 processing by other modules.
+ *
+ * Reference: OpenGroup.org
+ */
+
+#define RTLD_LAZY   (0 << 0)
+#define RTLD_NOW    (1 << 0)
+#define RTLD_GLOBAL (1 << 1)
+#define RTLD_LOCAL  (1 << 2)
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: dlsymtab
+ *
+ * Description:
+ *   dlsymtab() is a non-standard shared library interface.  It selects the
+ *   symbol table to use when binding a shared libary to the base firmware
+ *   which may be in FLASH memory.
+ *
+ * Input Parameters:
+ *   symtab   - The new symbol table.
+ *   nsymbols - The number of symbols in the symbol table.
+ *
+ * Returned Value:
+ *   Always returns OK.
+ *
+ ****************************************************************************/
+
+struct symtab_s;
+int dlsymtab(FAR const struct symtab_s *symtab, int nsymbols);
+
+/****************************************************************************
+ * Name: dlopen
+ *
+ * Description:
+ *   dlopen() makes an executable object file specified by file available to
+ *   the calling program.  The class of files eligible for this operation and
+ *   the manner of their construction are specified by the implementation,
+ *   though typically such files are executable objects such as shared
+ *   libraries, relocatable files or programs. Note that some implementations
+ *   permit the construction of dependencies between such objects that are
+ *   embedded within files. In such cases, a dlopen() operation will load
+ *   such dependencies in addition to the object referenced by file.
+ *   Implementations may also impose specific constraints on the construction
+ *   of programs that can employ dlopen() and its related services.
+ *
+ *   If a file is specified in multiple dlopen() invocations, mode is
+ *   interpreted at each invocation. Note, however, that once RTLD_NOW has
+ *   been specified all relocations will have been completed rendering
+ *   further RTLD_NOW operations redundant and any further RTLD_LAZY
+ *   operations irrelevant.  Similarly note that once RTLD_GLOBAL has been
+ *   specified the object will maintain the RTLD_GLOBAL status regardless
+ *   of any previous or future specification of RTLD_LOCAL, so long as the
+ *   object remains in the address space (see dlclose()).
+ *
+ *   Symbols introduced into a program through calls to dlopen() may be
+ *   used in relocation activities. Symbols so introduced may duplicate
+ *   symbols already defined by the program or previous dlopen()
+ *   operations. To resolve the ambiguities such a situation might
+ *   present, the resolution of a symbol reference to symbol definition is
+ *   based on a symbol resolution order. Two such resolution orders are
+ *   defined: load or dependency ordering. Load order establishes an
+ *   ordering among symbol definitions, such that the definition first
+ *   loaded (including definitions from the image file and any dependent
+ *   objects loaded with it) has priority over objects added later (via
+ *   dlopen()). Load ordering is used in relocation processing. Dependency
+ *   ordering uses a breadth-first order starting with a given object,
+ *   then all of its dependencies, then any dependents of those, iterating
+ *   until all dependencies are satisfied. With the exception of the global
+ *   symbol object obtained via a dlopen() operation on a file of 0,
+ *   dependency ordering is used by the dlsym() function. Load ordering is
+ *   used in dlsym() operations upon the global symbol object.
+ *
+ *   When an object is first made accessible via dlopen() it and its
+ *   dependent objects are added in dependency order. Once all the objects
+ *   are added, relocations are performed using load order. Note that if an
+ *   object or its dependencies had been previously loaded, the load and
+ *   dependency orders may yield different resolutions.
+ *
+ *   The symbols introduced by dlopen() operations, and available through
+ *   dlsym() are at a minimum those which are exported as symbols of global
+ *   scope by the object. Typically such symbols will be those that were
+ *   specified in (for example) C source code as having extern linkage. The
+ *   precise manner in which an implementation constructs the set of
+ *   exported symbols for a dlopen() object is specified by that
+ *   implementation.
+ *
+ * Input Parameters:
+ *   file - Used to construct a pathname to the object file. If file
+ *          contains a slash character, the file argument is used as the
+ *          pathname for the file. Otherwise, file is used in an
+ *          implementation-dependent manner to yield a pathname.
+ *
+ *          If the value of file is 0, dlopen() provides a handle on a
+ *          global symbol object. This object provides access to the symbols
+ *          from an ordered set of objects consisting of the original
+ *          program image file, together with any objects loaded at program
+ *          startup as specified by that process image file (for example,
+ *          shared libraries), and the set of objects loaded using a
+ *          dlopen() operation together with the RTLD_GLOBAL flag. As the
+ *          latter set of objects can change during execution, the set
+ *          identified by handle can also change dynamically.
+ *
+ *          Only a single copy of an object file is brought into the address
+ *          space, even if dlopen() is invoked multiple times in reference
+ *          to the file, and even if different pathnames are used to
+ *          reference the file.
+ *  mode  - Describes how dlopen() will operate upon file with respect to
+ *          the processing of relocations and the scope of visibility of the
+ *          symbols provided within file. When an object is brought into the
+ *          address space of a process, it may contain references to symbols
+ *          whose addresses are not known until the object is loaded. These
+ *          references must be relocated before the symbols can be accessed.
+ *          The mode parameter governs when these relocations take place.
+ *          See definitions above for values of the mode parameter:.
+ *
+ * Returned Value:
+ *   A successful dlopen() returns a handle which the caller may use on
+ *   subsequent calls to dlsym() and dlclose(). The value of this handle
+ *   should not be interpreted in any way by the caller.
+ *
+ *   If file cannot be found, cannot be opened for reading, is not of an
+ *   appropriate object format for processing by dlopen(), or if an error
+ *   occurs during the process of loading file or relocating its symbolic
+ *   references, dlopen() will return NULL. More detailed diagnostic
+ *   information will be available through dlerror().
+ *
+ * Reference: OpenGroup.org
+ *
+ * ****************************************************************************/
+
+FAR void *dlopen(FAR const char *file, int mode);
+
+/****************************************************************************
+ * Name: dlsym
+ *
+ * Description:
+ *   dlsym() allows a process to obtain the address of a symbol defined
+ *   within an object made accessible through a dlopen() call. handle is the
+ *   value returned from a call to dlopen() (and which has not since been
+ *   released via a call to dlclose()), name is the symbol's name as a
+ *   character string.
+ *
+ *   dlsym() will search for the named symbol in all objects loaded
+ *   automatically as a result of loading the object referenced by handle
+ *   (see dlopen()). Load ordering is used in dlsym() operations upon the
+ *   global symbol object. The symbol resolution algorithm used will be
+ *   dependency order as described in dlopen().
+ *
+ * Input Parameters:
+ *   handle - The opaque, non-NULL value returned by a previous successful
+ *            call to dlopen().
+ *   name   - A pointer to the symbol name string.
+ *
+ * Returned Value:
+ *   If handle does not refer to a valid object opened by dlopen(), or if
+ *   the named symbol cannot be found within any of the objects associated
+ *   with handle, dlsym() will return NULL. More detailed diagnostic
+ *   information will be available through dlerror().
+ *
+ * Reference: OpenGroup.org
+ *
+ ****************************************************************************/
+
+FAR void *dlsym(FAR void *handle, FAR const char *name);
+
+/****************************************************************************
+ * Name: dlclose
+ *
+ * Description:
+ *   dlclose() is used to inform the system that the object referenced by a
+ *   handle returned from a previous dlopen() invocation is no longer needed
+ *   by the application.
+ *
+ *   The use of dlclose() reflects a statement of intent on the part of the
+ *   process, but does not create any requirement upon the implementation,
+ *   such as removal of the code or symbols referenced by handle. Once an
+ *   object has been closed using dlclose() an application should assume
+ *   that its symbols are no longer available to dlsym(). All objects loaded
+ *   automatically as a result of invoking dlopen() on the referenced object
+ *   are also closed.
+ *
+ *   Although a dlclose() operation is not required to remove structures
+ *   from an address space, neither is an implementation prohibited from
+ *   doing so. The only restriction on such a removal is that no object will
+ *   be removed to which references have been relocated, until or unless all
+ *   such references are removed. For instance, an object that had been
+ *   loaded with a dlopen() operation specifying the RTLD_GLOBAL flag might
+ *   provide a target for dynamic relocations performed in the processing of
+ *   other objects - in such environments, an application may assume that no
+ *   relocation, once made, will be undone or remade unless the object
+ *   requiring the relocation has itself been removed.
+ *
+ * Input Parameters:
+ *   handle - The opaque, non-NULL value returned by a previous successful
+ *            call to dlopen().
+ *
+ * Returned Value:
+ *   If the referenced object was successfully closed, dlclose() returns 0.
+ *   If the object could not be closed, or if handle does not refer to an
+ *   open object, dlclose() returns a non-zero value. More detailed
+ *   diagnostic information will be available through dlerror().
+ *
+ * Reference: OpenGroup.org
+ *  ****************************************************************************/
+
+int dlclose(FAR void *handle);
+
+/****************************************************************************
+ * Name: dlerror
+ *
+ * Description:
+ *   dlerror() returns a null-terminated character string (with no trailing
+ *   newline) that describes the last error that occurred during dynamic
+ *   linking processing. If no dynamic linking errors have occurred since
+ *   the last invocation of dlerror(), dlerror() returns NULL. Thus,
+ *   invoking dlerror() a second time, immediately following a prior
+ *   invocation, will result in NULL being returned.
+ *
+ * Input Parameters:
+ *   If successful, dlerror() returns a null-terminated character string.
+ *   Otherwise, NULL is returned.
+ *
+ * Returned Value:
+ *
+ * Reference: OpenGroup.org
+ *
+ ****************************************************************************/
+
+FAR char *dlerror(void);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __INCLUDE_DLLFCN_H */
diff --git a/include/hex2bin.h b/include/hex2bin.h
new file mode 100644
index 0000000000000000000000000000000000000000..3217c54560eeda31e858f6286188dbc7ed885cb2
--- /dev/null
+++ b/include/hex2bin.h
@@ -0,0 +1,244 @@
+/****************************************************************************
+ * include/hex2bin.h
+ *
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_HEX2BIN_H
+#define __INCLUDE_HEX2BIN_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#ifdef CONFIG_LIB_HEX2BIN
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Some environments may return CR as end-of-line, others LF, and others
+ * both.  If not specified, the logic here assumes either (but not both) as
+ * the default.
+ */
+
+#if defined(CONFIG_EOL_IS_CR)
+#  undef  CONFIG_EOL_IS_LF
+#  undef  CONFIG_EOL_IS_BOTH_CRLF
+#  undef  CONFIG_EOL_IS_EITHER_CRLF
+#elif defined(CONFIG_EOL_IS_LF)
+#  undef  CONFIG_EOL_IS_CR
+#  undef  CONFIG_EOL_IS_BOTH_CRLF
+#  undef  CONFIG_EOL_IS_EITHER_CRLF
+#elif defined(CONFIG_EOL_IS_BOTH_CRLF)
+#  undef  CONFIG_EOL_IS_CR
+#  undef  CONFIG_EOL_IS_LF
+#  undef  CONFIG_EOL_IS_EITHER_CRLF
+#elif defined(CONFIG_EOL_IS_EITHER_CRLF)
+#  undef  CONFIG_EOL_IS_CR
+#  undef  CONFIG_EOL_IS_LF
+#  undef  CONFIG_EOL_IS_BOTH_CRLF
+#else
+#  undef  CONFIG_EOL_IS_CR
+#  undef  CONFIG_EOL_IS_LF
+#  undef  CONFIG_EOL_IS_BOTH_CRLF
+#  define CONFIG_EOL_IS_EITHER_CRLF 1
+#endif
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* Intel HEX data steams are normally in big endian order.  The following
+ * enumeration selects other ordering.
+ */
+
+enum hex2bin_swap_e
+{
+  HEX2BIN_NOSWAP = 0, /* No swap, stream is in the correct byte order */
+  HEX2BIN_SWAP16 = 1, /* Swap bytes in 16-bit values */
+  HEX2BIN_SWAP32 = 2  /* Swap bytes in 32-bit values */
+};
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: hex2bin
+ *
+ * Description:
+ *   Read the Intel HEX ASCII data provided on the serial IN stream and write
+ *   the binary to the seek-able serial OUT stream.
+ *
+ *   These streams may be files or, in another usage example, the IN stream
+ *   could be a serial port and the OUT stream could be a memory stream.  This
+ *   would decode and write the serial input to memory.
+ *
+ * Input Parameters:
+ *   instream  - The incoming stream from which Intel HEX data will be
+ *               received.
+ *   outstream - The outgoing stream in which binary data will be written.
+ *   baseaddr  - The base address of the outgoing stream.  Seeking in the
+ *               output stream will be relative to this address.
+ *   endpaddr  - The end address (plus 1) of the outgoing stream.  This
+ *               value is used only for range checking.  endpaddr must
+ *               be larger than baseaddr.  A zero value for endpaddr
+ *               disables range checking.
+ *   swap      - Controls byte ordering.  See enum hex2bin_swap_e for
+ *               description of the values.
+ *
+ * Returned Value
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   failure.
+ *
+ ****************************************************************************/
+
+struct lib_instream_s;
+struct lib_sostream_s;
+int hex2bin(FAR struct lib_instream_s *instream,
+            FAR struct lib_sostream_s *outstream, uint32_t baseaddr,
+            uint32_t endpaddr, enum hex2bin_swap_e swap);
+
+/****************************************************************************
+ * Name hex2mem
+ *
+ * Description:
+ *   Read the Intel HEX ASCII data provided on the file descriptor 'fd' and
+ *   write the binary to memory.
+ *
+ *   If, for example, fd is zero (corresponding to stdin), then the HEX
+ *   ASCII data would be taken from the console and written to memory.
+ *
+ * Input Parameters:
+ *   fd        - The file descriptor from which Intel HEX data will be
+ *               received.
+ *   baseaddr  - The base address of the memory region stream.
+ *   endpaddr  - The end address (plus 1) of the memory region.
+ *   swap      - Controls byte ordering.  See enum hex2bin_swap_e for
+ *               description of the values.
+ *
+ * Returned Value
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   failure.
+ *
+ ****************************************************************************/
+
+int hex2mem(int fd, uint32_t baseaddr, uint32_t endpaddr,
+            enum hex2bin_swap_e swap);
+
+/****************************************************************************
+ * Name fhex2mem
+ *
+ * Description:
+ *   Read the Intel HEX ASCII data provided on the standard stream
+ *   'instream' and write the binary to memory.
+ *
+ *   If, for example, instream is stdin, then the HEX ASCII data would be
+ *   taken from the console and written to memory.
+ *
+ * Input Parameters:
+ *   instream  - The incoming standard stream from which Intel HEX data
+ *               will be received.
+ *   baseaddr  - The base address of the memory region stream.
+ *   endpaddr  - The end address (plus 1) of the memory region.
+ *   swap      - Controls byte ordering.  See enum hex2bin_swap_e for
+ *               description of the values.
+ *
+ * Returned Value
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   failure.
+ *
+ ****************************************************************************/
+
+int fhex2mem(FAR FILE *instream, uint32_t baseaddr, uint32_t endpaddr,
+             enum hex2bin_swap_e swap);
+
+/****************************************************************************
+ * Name: hex2bin_main
+ *
+ * Description:
+ *   Main entry point when hex2bin is built as an NSH built-in task.
+ *
+ * Input Parameters:
+ *   Standard task inputs
+ *
+ * Returned Value
+ *   EXIT_SUCESS on success; EXIT_FAILURE on failure
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SYSTEM_HEX2BIN_BUILTIN
+int hex2bin_main(int argc, char **argv);
+#endif /* CONFIG_SYSTEM_HEX2BIN_BUILTIN */
+
+/****************************************************************************
+ * Name: hex2mem_main
+ *
+ * Description:
+ *   Main entry point when hex2mem is built as an NSH built-in task.
+ *
+ * Input Parameters:
+ *   Standard task inputs
+ *
+ * Returned Value
+ *   EXIT_SUCESS on success; EXIT_FAILURE on failure
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SYSTEM_HEX2MEM_BUILTIN
+int hex2mem_main(int argc, char **argv);
+#endif /* CONFIG_SYSTEM_HEX2MEM_BUILTIN */
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CONFIG_SYSTEM_HEX2BIN */
+#endif /* __INCLUDE_HEX2BIN_H */
diff --git a/include/inttypes.h b/include/inttypes.h
index 9aa1c04973785c5b5c522fe3ff054a1b7061d663..f8fe4337230704d06956c3774b05041cef94d21b 100644
--- a/include/inttypes.h
+++ b/include/inttypes.h
@@ -49,6 +49,8 @@
 
 #include 
 
+#include 
+
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
@@ -175,13 +177,13 @@ extern "C"
  *  macros. Function prototypes shall be provided."
  */
 
-intmax_t  imaxabs(intmax_t);
-imaxdiv_t imaxdiv(intmax_t, intmax_t);
-intmax_t  strtoimax(const char *, char **, int);
-uintmax_t strtoumax(const char *, char **, int);
+intmax_t  imaxabs(intmax_t j);
+imaxdiv_t imaxdiv(intmax_t numer, intmax_t denom);
+intmax_t  strtoimax(FAR const char *nptr, FAR char **endptr, int base);
+uintmax_t strtoumax(FAR const char *nptr, FAR char **endptr, int base);
 
-intmax_t  wcstoimax(const wchar_t *, wchar_t **, int);
-uintmax_t wcstoumax(const wchar_t *, wchar_t **, int);
+intmax_t  wcstoimax(FAR const wchar_t *nptr, FAR wchar_t **endptr, int base);
+uintmax_t wcstoumax(FAR const wchar_t *nptr, FAR wchar_t **endptr, int base);
 
 #undef EXTERN
 #ifdef __cplusplus
diff --git a/include/libgen.h b/include/libgen.h
index 295cd9b936f4b688c68c861daea623fe6b97be8a..e7e28808528a8dce7f87d8d16eceed6747e0f27c 100644
--- a/include/libgen.h
+++ b/include/libgen.h
@@ -40,9 +40,7 @@
  * Included Files
  ****************************************************************************/
 
-/****************************************************************************
- * Type Definitions
- ****************************************************************************/
+#include 
 
 /****************************************************************************
  * Public Function Prototypes
diff --git a/include/limits.h b/include/limits.h
index 3479e595953386e794e5355617d2be2f06c4a39a..0fdbd057181fa7acdce4d6b7ebc32f6ac253a385 100644
--- a/include/limits.h
+++ b/include/limits.h
@@ -111,6 +111,12 @@
  *
  *   _POSIX_SEM_NSEMS_MAX  Max number of open semaphores per task
  *   _POSIX_SEM_VALUE_MAX  Max value a semaphore may have
+ *
+ * Required for symbolic links
+ *   _POSIX_SYMLOOP_MAX   Maximum number of symbolic links that can be
+ *                        reliably traversed in the resolution of a pathname
+ *                        in the absence of a loop.
+ *
  */
 
 #define _POSIX_ARG_MAX        4096
@@ -143,6 +149,10 @@
 #define _POSIX_RTSIG_MAX      31
 #define _POSIX_SIGQUEUE_MAX   32
 
+/* Required for symbolic links */
+
+#define _POSIX_SYMLOOP_MAX    8
+
 /* Required for POSIX timers.
  *
  * _POSIX_DELAYTIMER_MAX is the number of timer expiration overruns.
@@ -205,6 +215,8 @@
 #define RTSIG_MAX      _POSIX_RTSIG_MAX
 #define SIGQUEUE_MAX   _POSIX_SIGQUEUE_MAX
 
+#define SYMLOOP_MAX    _POSIX_SYMLOOP_MAX
+
 #define DELAYTIMER_MAX _POSIX_DELAYTIMER_MAX
 #define TIMER_MAX      _POSIX_TIMER_MAX
 #define CLOCKRES_MIN   _POSIX_CLOCKRES_MIN
diff --git a/include/locale.h b/include/locale.h
new file mode 100644
index 0000000000000000000000000000000000000000..16923e4a3d980c963009c84775e5910da61cdef2
--- /dev/null
+++ b/include/locale.h
@@ -0,0 +1,110 @@
+/****************************************************************************
+ * include/locale.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_LOCALE_H
+#define __INCLUDE_LOCALE_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define LC_ALL      0
+#define LC_COLLATE  1
+#define LC_CTYPE    2
+#define LC_MONETARY 3
+#define LC_NUMERIC  4
+#define LC_TIME     5
+#define LC_MESSAGES 6
+
+/****************************************************************************
+ * Public Type Definitions
+ ****************************************************************************/
+
+struct lconv
+{
+  FAR char *decimal_point;
+  FAR char *thousands_sep;
+  FAR char *grouping;
+  FAR char *int_curr_symbol;
+  FAR char *currency_symbol;
+  FAR char *mon_decimal_point;
+  FAR char *mon_thousands_sep;
+  FAR char *mon_grouping;
+  FAR char *positive_sign;
+  FAR char *negative_sign;
+  FAR char int_frac_digits;
+  FAR char frac_digits;
+  FAR char p_cs_precedes;
+  FAR char p_sep_by_space;
+  FAR char n_cs_precedes;
+  FAR char n_sep_by_space;
+  FAR char p_sign_posn;
+  FAR char n_sign_posn;
+  FAR char int_n_cs_precedes;
+  FAR char int_n_sep_by_space;
+  FAR char int_n_sign_posn;
+  FAR char int_p_cs_precedes;
+  FAR char int_p_sep_by_space;
+  FAR char int_p_sign_posn;
+};
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+FAR char *setlocale(int category, FAR const char *locale);
+FAR struct lconv *localeconv(void);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __INCLUDE_LOCALE_H */
diff --git a/include/netinet/in.h b/include/netinet/in.h
index 219f15119455dccab65295e254cfc845f2ea0128..53e0706b5b87a745163ffc13fb2d857f7ed55f65 100644
--- a/include/netinet/in.h
+++ b/include/netinet/in.h
@@ -80,6 +80,7 @@
 #define IPPROTO_COMP          108  /* Compression Header protocol */
 #define IPPROTO_SCTP          132  /* Stream Control Transport Protocol */
 #define IPPROTO_UDPLITE       136  /* UDP-Lite (RFC 3828) */
+#define IPPROTO_MPLS          137  /* MPLS in IP (RFC 4023) */
 #define IPPROTO_RAW           255  /* Raw IP packets */
 
 /* Values used with SIOCSIFMCFILTER and SIOCGIFMCFILTER ioctl's */
diff --git a/include/nuttx/analog/adc.h b/include/nuttx/analog/adc.h
index 0044c03364da4d81dbfd566f102c5d1eb37b8852..214143357a64f2ed37068bd4f8976b191bd27f77 100644
--- a/include/nuttx/analog/adc.h
+++ b/include/nuttx/analog/adc.h
@@ -1,12 +1,12 @@
 /************************************************************************************
  * include/nuttx/analog/adc.h
  *
- *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
  *   Copyright (C) 2011 Li Zhuoyi. All rights reserved.
  *   Author: Li Zhuoyi 
  *           Gregory Nutt 
  *
- * Derived from include/nuttx/can.h
+ * Derived from include/nuttx/drivers/can.h
  *
  *   Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -72,6 +72,12 @@
 #  define CONFIG_ADC_FIFOSIZE 255
 #endif
 
+#define ADC_RESET(dev)         ((dev)->ad_ops->ao_reset((dev)))
+#define ADC_SETUP(dev)         ((dev)->ad_ops->ao_setup((dev)))
+#define ADC_SHUTDOWN(dev)      ((dev)->ad_ops->ao_shutdown((dev)))
+#define ADC_RXINT(dev)         ((dev)->ad_ops->ao_rxint((dev)))
+#define ADC_IOCTL(dev,cmd,arg) ((dev)->ad_ops->ao_ioctl((dev),(cmd),(arg)))
+
 /************************************************************************************
  * Public Types
  ************************************************************************************/
@@ -97,11 +103,11 @@ struct adc_callback_s
 
 /* This describes on ADC message */
 
-struct adc_msg_s
+begin_packed_struct struct adc_msg_s
 {
   uint8_t      am_channel;               /* The 8-bit ADC Channel */
   int32_t      am_data;                  /* ADC convert result (4 bytes) */
-} packed_struct;
+} end_packed_struct;
 
 /* This describes a FIFO of ADC messages */
 
diff --git a/include/nuttx/analog/ads1242.h b/include/nuttx/analog/ads1242.h
index b74b2a28b264e581e6c9fe48f09342575d9b6fb5..aeeb48da6cf2e20b84115e159d9d10250418f1b6 100644
--- a/include/nuttx/analog/ads1242.h
+++ b/include/nuttx/analog/ads1242.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * include/nuttx/sensors/ads1242.h
+ * include/nuttx/analog/ads1242.h
  *
  *   Copyright (C) 2016, DS-Automotion GmbH. All rights reserved.
  *   Author: Alexander Entinger 
@@ -33,15 +33,15 @@
  *
  ****************************************************************************/
 
-#ifndef NUTTX_INCLUDE_NUTTX_ANALOG_ADS1242_H_
-#define NUTTX_INCLUDE_NUTTX_ANALOG_ADS1242_H_
+#ifndef __INCLUDE_NUTTX_ANALOG_ADS1242_H
+#define __INCLUDE_NUTTX_ANALOG_ADS1242_H
 
 /****************************************************************************
  * Included Files
  ****************************************************************************/
 
 #include 
-#include 
+#include 
 #include 
 
 #if defined(CONFIG_SPI) && defined(CONFIG_ADC_ADS1242)
@@ -51,13 +51,20 @@
  ****************************************************************************/
 
 /* IOCTL Commands ***********************************************************/
+/* Cmd: ANIOC_ADS2142_READ                    Arg: uint32_t *value
+ * Cmd: ANIOC_ADS2142_SET_GAIN                Arg: uint8_t value
+ * Cmd: ANIOC_ADS2142_SET_POSITIVE_INPUT      Arg: uint8_t value
+ * Cmd: ANIOC_ADS2142_SET_NEGATIVE_INPUT      Arg: uint8_t value
+ * Cmd: ANIOC_ADS2142_IS_DATA_READY           Arg: bool *value
+ * Cmd: ANIOC_ADS2142_DO_SYSTEM_OFFSET_CALIB  Arg: None
+ */
 
-#define ANIOC_ADS2142_READ                    _ANIOC(0x0001)  /* Arg: uint32_t *value */
-#define ANIOC_ADS2142_SET_GAIN                _ANIOC(0x0002)  /* Arg: uint8_t value */
-#define ANIOC_ADS2142_SET_POSITIVE_INPUT      _ANIOC(0x0003)  /* Arg: uint8_t value */
-#define ANIOC_ADS2142_SET_NEGATIVE_INPUT      _ANIOC(0x0004)  /* Arg: uint8_t value */
-#define ANIOC_ADS2142_IS_DATA_READY           _ANIOC(0x0005)  /* Arg: bool *value */
-#define ANIOC_ADS2142_DO_SYSTEM_OFFSET_CALIB  _ANIOC(0x0006)  /* Arg: None */
+#define ANIOC_ADS2142_READ                    _ANIOC(AN_ADS2142_FIRST + 0)
+#define ANIOC_ADS2142_SET_GAIN                _ANIOC(AN_ADS2142_FIRST + 1)
+#define ANIOC_ADS2142_SET_POSITIVE_INPUT      _ANIOC(AN_ADS2142_FIRST + 2)
+#define ANIOC_ADS2142_SET_NEGATIVE_INPUT      _ANIOC(AN_ADS2142_FIRST + 3)
+#define ANIOC_ADS2142_IS_DATA_READY           _ANIOC(AN_ADS2142_FIRST + 4)
+#define ANIOC_ADS2142_DO_SYSTEM_OFFSET_CALIB  _ANIOC(AN_ADS2142_FIRST + 5)
 
 /* ADS1242 REGISTER *********************************************************/
 
@@ -199,4 +206,4 @@ int ads1242_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
 #endif
 
 #endif /* CONFIG_SPI && CONFIG_ADC_ADS1242 */
-#endif /* NUTTX_INCLUDE_NUTTX_ANALOG_ADS1242_H_ */
+#endif /* __INCLUDE_NUTTX_ANALOG_ADS1242_H */
diff --git a/include/nuttx/analog/dac.h b/include/nuttx/analog/dac.h
index 5648b51a9a885f9f6f1bcfc18f623b670743fb2d..249100d89b4759d2a64b7a349a56206ca7fb5976 100644
--- a/include/nuttx/analog/dac.h
+++ b/include/nuttx/analog/dac.h
@@ -1,11 +1,12 @@
 /************************************************************************************
  * include/nuttx/analog/dac.h
  *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
  *   Copyright (C) 2011 Li Zhuoyi. All rights reserved.
  *   Author: Li Zhuoyi 
  *   History: 0.1 2011-08-04 initial version
  *
- * Derived from include/nuttx/can.h
+ * Derived from include/nuttx/drivers/can.h
  *
  *   Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -47,6 +48,7 @@
  ************************************************************************************/
 
 #include 
+#include 
 
 #include 
 #include 
@@ -73,11 +75,11 @@
  * Public Types
  ************************************************************************************/
 
-struct dac_msg_s
+begin_packed_struct struct dac_msg_s
 {
   uint8_t      am_channel;               /* The 8-bit DAC Channel */
   int32_t      am_data;                  /* DAC convert result (4 bytes) */
-};
+} end_packed_struct;
 
 struct dac_fifo_s
 {
diff --git a/include/nuttx/analog/ioctl.h b/include/nuttx/analog/ioctl.h
new file mode 100644
index 0000000000000000000000000000000000000000..97e48360187c11002fafdc345ed1e72068e08d21
--- /dev/null
+++ b/include/nuttx/analog/ioctl.h
@@ -0,0 +1,94 @@
+/****************************************************************************
+ * include/nuttx/analog/ioctl.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_ANALOG_IOCTL_H
+#define __INCLUDE_NUTTX_ANALOG_IOCTL_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* The analog driver sub-system uses the standard character driver framework.
+ * However, since the driver is a devices control interface rather than a
+ * data transfer interface, the majority of the functionality is implemented
+ * in driver ioctl calls.  Standard ioctl commands are listed below:
+ */
+
+/* DAC/ADC */
+
+#define ANIOC_TRIGGER     _ANIOC(0x0001)  /* Trigger one conversion
+                                           * IN: None
+                                           * OUT: None */
+
+#define AN_FIRST           0x0001         /* First common command */
+#define AN_NCMDS           1              /* Two common commands */
+
+/* User defined ioctl commands are also supported. These will be forwarded
+ * by the upper-half QE driver to the lower-half QE driver via the ioctl()
+ * method fo the QE lower-half interface.  However, the lower-half driver
+ * must reserve a block of commands as follows in order prevent IOCTL
+ * command numbers from overlapping.
+ */
+
+/* See include/nuttx/sensors/ads1242.h */
+
+#define AN_ADS2142_FIRST   (AN_FIRST + AN_NCMDS)
+#define AN_ADS2142_NCMDS   6
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __INCLUDE_NUTTX_ANALOG_IOCTL_H */
diff --git a/include/nuttx/analog/pga11x.h b/include/nuttx/analog/pga11x.h
index 7b6cf7881c3457a020b6f7fb4271315401b87541..e4e2ebbc92286b4e8322efbb206e83e3ffabc8c3 100644
--- a/include/nuttx/analog/pga11x.h
+++ b/include/nuttx/analog/pga11x.h
@@ -73,8 +73,8 @@
  *   When SPI_SELECT is called with devid=SPIDEV_MUX.
  *
  * Other settings that effect the driver:
- *   CONFIG_DEBUG_SPI -- With CONFIG_DEBUG and CONFIG_DEBUG_VERBOSE,
- *     this will enable debug output from the PGA117 driver.
+ *   CONFIG_DEBUG_SPI_ERR/WARN/INFO -- This will enable debug output from
+ *   the PGA117 driver.
  */
 
 #ifndef CONFIG_PGA11X_SPIFREQUENCY
diff --git a/include/nuttx/arch.h b/include/nuttx/arch.h
index 24925c05ec64c1656ef39e92cf40118f1b7827ec..05597f6d59f2fec8140d53a718d3917965f8fd6e 100644
--- a/include/nuttx/arch.h
+++ b/include/nuttx/arch.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * include/nuttx/arch.h
  *
- *   Copyright (C) 2007-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -163,6 +163,15 @@ EXTERN uint32_t g_oneshot_maxticks;
 EXTERN volatile bool g_rtc_enabled;
 #endif
 
+#ifdef CONFIG_ARCH_MINIMAL_VECTORTABLE
+/* This is the interrupt vector mapping table.  This must be provided by
+ * architecture specific logic if CONFIG_ARCH_MINIMAL_VECTORTABLE is define
+ * in the configuration.  See declaration in include/nuttx/irq.h
+ */
+
+/* EXTERN const irq_mapped_t g_irqmap[NR_IRQS]; */
+#endif
+
 /****************************************************************************
  * Public Function Prototypes
  ****************************************************************************/
@@ -1402,8 +1411,9 @@ int up_prioritize_irq(int irq, int priority);
  * is suppressed and the platform specific code is expected to provide the
  * following custom functions.
  *
- *   void up_timer_initialize(void): Initializes the timer facilities.  Called
- *     early in the intialization sequence (by up_intialize()).
+ *   Architecture specific timer initialiation logic initializes the timer
+ *     facilities.  This happens early in the intialization sequence (via
+ *     up_intialize()).
  *   int up_timer_gettime(FAR struct timespec *ts):  Returns the current
  *     time from the platform specific time source.
  *
@@ -1434,42 +1444,13 @@ int up_prioritize_irq(int irq, int priority);
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Name: up_timer_initialize
- *
- * Description:
- *   Initializes all platform-specific timer facilities.  This function is
- *   called early in the initialization sequence by up_intialize().
- *   On return, the current up-time should be available from
- *   up_timer_gettime() and the interval timer is ready for use (but not
- *   actively timing).
- *
- *   Provided by platform-specific code and called from the architecture-
- *   specific logic.
- *
- * Input Parameters:
- *   None
- *
- * Returned Value:
- *   None
- *
- * Assumptions:
- *   Called early in the initialization sequence before any special
- *   concurrency protections are required.
- *
- ****************************************************************************/
-
-#if 0 /* Prototyped in up_internal.h in all cases. */
-void up_timer_initialize(void);
-#endif
-
 /****************************************************************************
  * Name: up_timer_gettime
  *
  * Description:
  *   Return the elapsed time since power-up (or, more correctly, since
- *   up_timer_initialize() was called).  This function is functionally
- *   equivalent to:
+ *   the archtecture-specific timer was initialized).  This function is
+ *   functionally equivalent to:
  *
  *      int clock_gettime(clockid_t clockid, FAR struct timespec *ts);
  *
@@ -1496,10 +1477,15 @@ void up_timer_initialize(void);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_SCHED_TICKLESS
+#if defined(CONFIG_SCHED_TICKLESS) && !defined(CONFIG_CLOCK_TIMEKEEPING)
 int up_timer_gettime(FAR struct timespec *ts);
 #endif
 
+#ifdef CONFIG_CLOCK_TIMEKEEPING
+int up_timer_getcounter(FAR uint64_t *cycles);
+void up_timer_getmask(FAR uint64_t *mask);
+#endif
+
 /****************************************************************************
  * Name: up_alarm_cancel
  *
@@ -1684,7 +1670,7 @@ int up_timer_start(FAR const struct timespec *ts);
  * Name: up_testset
  *
  * Description:
- *   Perform and atomic test and set operation on the provided spinlock.
+ *   Perform an atomic test and set operation on the provided spinlock.
  *
  * Input Parameters:
  *   lock - The address of spinlock object.
@@ -1816,12 +1802,66 @@ int up_cpu_start(int cpu);
  * Returned Value:
  *   Zero on success; a negated errno value on failure.
  *
+ * Assumptions:
+ *   Called from within a critical section; up_cpu_resume() must be called
+ *   later while still within the same critical section.
+ *
  ****************************************************************************/
 
 #ifdef CONFIG_SMP
 int up_cpu_pause(int cpu);
 #endif
 
+/****************************************************************************
+ * Name: up_cpu_pausereq
+ *
+ * Description:
+ *   Return true if a pause request is pending for this CPU.
+ *
+ * Input Parameters:
+ *   cpu - The index of the CPU to be queried
+ *
+ * Returned Value:
+ *   true   = a pause request is pending.
+ *   false = no pasue request is pending.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SMP
+bool up_cpu_pausereq(int cpu);
+#endif
+
+/****************************************************************************
+ * Name: up_cpu_paused
+ *
+ * Description:
+ *   Handle a pause request from another CPU.  Normally, this logic is
+ *   executed from interrupt handling logic within the architecture-specific
+ *   However, it is sometimes necessary necessary to perform the pending
+ *   pause operation in other contexts where the interrupt cannot be taken
+ *   in order to avoid deadlocks.
+ *
+ *   This function performs the following operations:
+ *
+ *   1. It saves the current task state at the head of the current assigned
+ *      task list.
+ *   2. It waits on a spinlock, then
+ *   3. Returns from interrupt, restoring the state of the new task at the
+ *      head of the ready to run list.
+ *
+ * Input Parameters:
+ *   cpu - The index of the CPU to be paused
+ *
+ * Returned Value:
+ *   On success, OK is returned.  Otherwise, a negated errno value indicating
+ *   the nature of the failure is returned.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SMP
+int up_cpu_paused(int cpu);
+#endif
+
 /****************************************************************************
  * Name: up_cpu_resume
  *
@@ -1839,6 +1879,10 @@ int up_cpu_pause(int cpu);
  * Returned Value:
  *   Zero on success; a negated errno value on failure.
  *
+ * Assumptions:
+ *   Called from within a critical section; up_cpu_pause() must have
+ *   previously been called within the same critical section.
+ *
  ****************************************************************************/
 
 #ifdef CONFIG_SMP
@@ -1929,7 +1973,7 @@ void up_cxxinitialize(void);
  *   CONFIG_SCHED_TICKLESS is *not* defined).  The timer interrupt logic
  *   itself is implemented in the architecture specific code, but must call
  *   the following OS function periodically -- the calling interval must
- *   be MSEC_PER_TICK.
+ *   be CONFIG_USEC_PER_TICK.
  *
  ****************************************************************************/
 
@@ -2047,10 +2091,6 @@ size_t  up_check_intstack_remain(void);
 #endif
 #endif
 
-/****************************************************************************
- * Board-specific button interfaces exported by the board-specific logic
- ****************************************************************************/
-
 /****************************************************************************
  * Name: up_rtc_initialize
  *
@@ -2216,19 +2256,19 @@ int up_rtc_settime(FAR const struct timespec *tp);
  *             asserts an interrupt.  Must reside in OS space, but can
  *             signal tasks in user space.  A value of NULL can be passed
  *             in order to detach and disable the PHY interrupt.
+ *   arg     - The argument that will accompany the interrupt
  *   enable  - A function pointer that be unsed to enable or disable the
  *             PHY interrupt.
  *
  * Returned Value:
- *   The previous PHY interrupt handler address is returned.  This allows you
- *   to temporarily replace an interrupt handler, then restore the original
- *   interrupt handler.  NULL is returned if there is was not handler in
- *   place when the call was made.
+ *   Zero (OK) returned on success; a negated errno value is returned on
+ *   failure.
  *
  ****************************************************************************/
 
 #ifdef CONFIG_ARCH_PHY_INTERRUPT
-xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable);
+int arch_phy_irq(FAR const char *intf, xcpt_t handler, void *arg,
+                 phy_enable_t *enable);
 #endif
 
 /****************************************************************************
@@ -2245,16 +2285,6 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable);
 
 int up_putc(int ch);
 
-/****************************************************************************
- * Name: up_getc
- *
- * Description:
- *   Get one character on the console
- *
- ****************************************************************************/
-
-int up_getc(void);
-
 /****************************************************************************
  * Name: up_puts
  *
@@ -2289,9 +2319,8 @@ void arch_sporadic_resume(FAR struct tcb_s *tcb);
 #endif
 
 #undef EXTERN
-#ifdef __cplusplus
+#if defined(__cplusplus)
 }
 #endif
 
 #endif /* __INCLUDE_NUTTX_ARCH_H */
-
diff --git a/include/nuttx/audio/audio.h b/include/nuttx/audio/audio.h
index 323c4dd696f2742464f7674c5073ae70302aa4ba..1bdb9fe7ef4964cb5f98e1561620f2d08fbe4e5e 100644
--- a/include/nuttx/audio/audio.h
+++ b/include/nuttx/audio/audio.h
@@ -1,6 +1,7 @@
 /****************************************************************************
  * include/nuttx/audio/audio.h
  *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
  *   Copyright (C) 2013 Ken Pettit. All rights reserved.
  *   Author: Ken Pettit 
  *
@@ -67,8 +68,8 @@
  ****************************************************************************/
 /* Configuration ************************************************************/
 /* CONFIG_AUDIO - Enables Audio driver support
- * CONFIG_DEBUG_AUDIO - If enabled (with CONFIG_DEBUG and, optionally,
- *   CONFIG_DEBUG_VERBOSE), this will generate output that can be used to
+ * CONFIG_DEBUG_AUDIO - If enabled (with CONFIG_DEBUG_FEATURES and, optionally,
+ *   CONFIG_DEBUG_INFO), this will generate output that can be used to
  *   debug Audio drivers.
  */
 
@@ -363,7 +364,7 @@ struct ap_buffer_info_s
 
 /* This structure describes an Audio Pipeline Buffer */
 
-struct ap_buffer_s
+begin_packed_struct struct ap_buffer_s
 {
   struct dq_entry_s     dq_entry;   /* Double linked queue entry */
   struct audio_info_s   i;          /* The info for samples in this buffer */
@@ -377,7 +378,7 @@ struct ap_buffer_s
   uint16_t              flags;      /* Buffer flags */
   uint16_t              crefs;      /* Number of reference counts */
   uint8_t               samp[0];    /* Offset of the first sample */
-} packed_struct;
+} end_packed_struct;
 
 /* Structure defining the messages passed to a listening audio thread
  * for dequeuing buffers and other operations.  Also used to allocate
@@ -388,12 +389,12 @@ struct ap_buffer_s
 struct audio_msg_s
 {
 #ifdef CONFIG_AUDIO_MULTI_SESSION
-  FAR void            *session;     /* Associated channel */
+  FAR void           *session;      /* Associated channel */
 #endif
   uint16_t            msgId;        /* Message ID */
   union
   {
-    FAR void *        pPtr;         /* Buffer being dequeued */
+    FAR void         *pPtr;         /* Buffer being dequeued */
     uint32_t          data;         /* Message data */
   } u;
 };
diff --git a/include/nuttx/audio/tone.h b/include/nuttx/audio/tone.h
new file mode 100644
index 0000000000000000000000000000000000000000..e9a9c0059ac7d43db69074815306609911862d54
--- /dev/null
+++ b/include/nuttx/audio/tone.h
@@ -0,0 +1,103 @@
+/****************************************************************************
+ * include/nuttx/audio/tone.h
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Alan Carvalho de Assis 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_AUDIO_TONE_H
+#define __INCLUDE_NUTTX_AUDIO_TONE_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+
+#ifdef CONFIG_AUDIO_TONE
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: tone_register
+ *
+ * Description:
+ *   This function binds an instance of a "lower half" PWM driver with
+ *   the "upper half" Audio Tone device and registers that device so that can
+ *   be used by application code.
+ *
+ *
+ * Input parameters:
+ *   path - The full path to the driver to be registers in the NuttX pseudo-
+ *     filesystem.  The recommended convention is to name all PWM drivers
+ *     as "/dev/tone0", "/dev/tone1", etc.  where the driver path
+ *     differs only in the "minor" number at the end of the device name.
+ *   channel - The the PWM peripheral supports multiple output channels, then
+ *     this value must be provided to indicate the output channel that drives
+ *     the tone.
+ *   tone - A pointer to an instance of lower half PWM driver tone. This
+ *     instance will be bound to the Audio Tone driver and must persists as
+ *     long as that driver persists.
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int tone_register(FAR const char *path, FAR struct pwm_lowerhalf_s *tone,
+#ifdef CONFIG_PWM_MULTICHAN
+                  int channel,
+#endif
+                  FAR struct oneshot_lowerhalf_s *oneshot);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CONFIG_AUDIO_TONE */
+#endif /* __INCLUDE_NUTTX_AUDIO_TONE_H */
diff --git a/include/nuttx/audio/vs1053.h b/include/nuttx/audio/vs1053.h
index aa08b7c04c1f5b7951cc21b7fe9cf6fb8cb75f51..75cc291674a0557c44270c1b610036a3369b3c97 100644
--- a/include/nuttx/audio/vs1053.h
+++ b/include/nuttx/audio/vs1053.h
@@ -66,7 +66,8 @@
 
 struct vs1053_lower_s
 {
-  int  (*attach)(FAR const struct vs1053_lower_s *lower, xcpt_t handler);
+  int  (*attach)(FAR const struct vs1053_lower_s *lower, xcpt_t handler,
+                 FAR void *arg);
   void (*enable)(FAR const struct vs1053_lower_s *lower);
   void (*disable)(FAR const struct vs1053_lower_s *lower);
   void (*reset)(FAR const struct vs1053_lower_s *lower, bool state);
diff --git a/include/nuttx/binfmt/symtab.h b/include/nuttx/binfmt/symtab.h
index 9e51ca35398cf0a1f07442442d46236163dfc3a1..affb7cda17bb244d2f35ae8b4f6f4b068975a562 100644
--- a/include/nuttx/binfmt/symtab.h
+++ b/include/nuttx/binfmt/symtab.h
@@ -90,4 +90,9 @@ void exec_getsymtab(FAR const struct symtab_s **symtab, FAR int *nsymbols);
 
 void exec_setsymtab(FAR const struct symtab_s *symtab, int nsymbols);
 
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
 #endif /* __INCLUDE_NUTTX_BINFMT_SYMTAB_H */
diff --git a/include/nuttx/board.h b/include/nuttx/board.h
index e143c4862bb646aa773389e2f0b685cdaa036b01..cd08aceddd0cb600e168502e58c64edd164458b4 100644
--- a/include/nuttx/board.h
+++ b/include/nuttx/board.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * include/nuttx/board.h
  *
- *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -315,40 +315,6 @@ int board_tsc_setup(int minor);
 
 void board_tsc_teardown(void);
 
-/****************************************************************************
- * Name: board_adc_setup
- *
- * Description:
- *   All architectures must provide the following interface in order to
- *   work with examples/adc.
- *
- *   This is an internal OS interface but may be invoked indirectly from
- *   application-level graphics logic.  If CONFIG_LIB_BOARDCTL=y and
- *   CONFIG_BOARDCTL_ADCTEST=y, then this functions will be invoked via the
- *   (non-standard) boardctl() interface using the BOARDIOC_ADCTEST_SETUP
- *   command.
- *
- ****************************************************************************/
-
-int board_adc_setup(void);
-
-/****************************************************************************
- * Name: board_pwm_setup
- *
- * Description:
- *   All architectures must provide the following interface in order to
- *   work with examples/pwm.
- *
- *   This is an internal OS interface but may be invoked indirectly from
- *   application-level graphics logic.  If CONFIG_LIB_BOARDCTL=y and
- *   CONFIG_BOARDCTL_PWMTEST=y, then this functions will be invoked via the
- *   (non-standard) boardctl() interface using the commands
- *   BOARDIOC_PWMTEST_SETUP command.
- *
- ****************************************************************************/
-
-int board_pwm_setup(void);
-
 /****************************************************************************
  * Name: board_graphics_setup
  *
@@ -372,25 +338,6 @@ struct fb_vtable_s;
 FAR struct fb_vtable_s *board_graphics_setup(unsigned int devno);
 #endif
 
-/****************************************************************************
- * Name: board_can_initialize
- *
- * Description:
- *   Perform one-time CAN initialization.  This is currently only needed for
- *   apps/examples/can.
- *
- *   This is an internal OS interface but may be invoked indirectly from
- *   application-level graphics logic.  If CONFIG_LIB_BOARDCTL=y and
- *   CONFIG_BOARDCTL_CANINIT=y, then this functions will be invoked via the
- *   (non-standard) boardctl() interface using the BOARDIOC_CAN_INITIALIZE
- *   command.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_BOARDCTL_CANINIT
-int board_can_initialize(void);
-#endif
-
 /****************************************************************************
  * Name: board_ioctl
  *
@@ -656,8 +603,6 @@ uint8_t board_buttons(void);
  *   This function may be called to register an interrupt handler that will
  *   be called when a button is depressed or released.  The ID value is a
  *   button enumeration value that uniquely identifies a button resource.
- *   The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
  *
  *   NOTE: This interface may or may not be supported by board-specific
  *   logic.  If the board supports any button interfaces, then
@@ -667,7 +612,7 @@ uint8_t board_buttons(void);
  ****************************************************************************/
 
 #ifdef CONFIG_ARCH_IRQBUTTONS
-xcpt_t board_button_irq(int id, xcpt_t irqhandler);
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg);
 #endif
 
 /****************************************************************************
diff --git a/include/nuttx/cancelpt.h b/include/nuttx/cancelpt.h
new file mode 100644
index 0000000000000000000000000000000000000000..8adfc8c217e286b57e9cb32b174b392f2ed058d3
--- /dev/null
+++ b/include/nuttx/cancelpt.h
@@ -0,0 +1,152 @@
+/****************************************************************************
+ * include/nuttx/cancelpt.h
+ * Definitions related to cancellation points
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_CANCELPT_H
+#define __INCLUDE_NUTTX_CANCELPT_H
+
+/****************************************************************************
+ * Cancellation Points.
+ *
+ * Cancellation points shall occur when a thread is executing the following
+ * functions:
+ *
+ * accept()          mq_timedsend()           putpmsg()       sigtimedwait()
+ * aio_suspend()     msgrcv()                 pwrite()        sigwait()
+ * clock_nanosleep() msgsnd()                 read()          sigwaitinfo()
+ * close()           msync()                  readv()         sleep()
+ * connect()         nanosleep()              recv()          system()
+ * creat()           open()                   recvfrom()      tcdrain()
+ * fcntl()           pause()                  recvmsg()       usleep()
+ * fdatasync()       poll()                   select()        wait()
+ * fsync()           pread()                  sem_timedwait() waitid()
+ * getmsg()          pselect()                sem_wait()      waitpid()
+ * getpmsg()         pthread_cond_timedwait() send()          write()
+ * lockf()           pthread_cond_wait()      sendmsg()       writev()
+ * mq_receive()      pthread_join()           sendto()
+ * mq_send()         pthread_testcancel()     sigpause()
+ * mq_timedreceive() putmsg()                 sigsuspend()
+ *
+ * Each of the above function must call enter_cancellation_point() on entry
+ * in order to establish the cancellation point and leave_cancellation_point()
+ * on exit.  These functions are described below.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: enter_cancellation_point
+ *
+ * Description:
+ *   Called at the beginning of the cancellation point to establish the
+ *   cancellation point.  This function does the following:
+ *
+ *   1. If deferred cancellation does not apply to this thread, nothing is
+ *      done, otherwise, it
+ *   2. Sets state information in the caller's TCB and increments a nesting
+ *      count.
+ *   3. If this is the outermost nesting level, it checks if there is a
+ *      pending cancellation and, if so, calls either exit() or
+ *      pthread_exit(), depending upon the type of the thread.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value
+ *   true is returned if a cancellation is pending but cannot be performed
+ *   now due to the nesting level.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CANCELLATION_POINTS
+bool enter_cancellation_point(void);
+#else
+#  define enter_cancellation_point() false
+#endif
+
+/****************************************************************************
+ * Name: leave_cancellation_point
+ *
+ * Description:
+ *   Called at the end of the cancellation point.  This function does the
+ *   following:
+ *
+ *   1. If deferred cancellation does not apply to this thread, nothing is
+ *      done, otherwise, it
+ *   2. Clears state information in the caller's TCB and decrements a
+ *      nesting count.
+ *   3. If this is the outermost nesting level, it checks if there is a
+ *      pending cancellation and, if so, calls either exit() or
+ *      pthread_exit(), depending upon the type of the thread.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CANCELLATION_POINTS
+void leave_cancellation_point(void);
+#else
+#  define leave_cancellation_point()
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __INCLUDE_NUTTX_CANCELPT_H */
diff --git a/include/nuttx/clock.h b/include/nuttx/clock.h
index a844396b30c62f2a422b740cd34229237215924c..5684fef938c3f2ed7b35f6f94aedf24ab4ec9e20 100644
--- a/include/nuttx/clock.h
+++ b/include/nuttx/clock.h
@@ -34,8 +34,8 @@
  *
  ****************************************************************************/
 
-#ifndef _INCLUDE_NUTTX_CLOCK_H
-#define _INCLUDE_NUTTX_CLOCK_H
+#ifndef __INCLUDE_NUTTX_CLOCK_H
+#define __INCLUDE_NUTTX_CLOCK_H
 
 /****************************************************************************
  * Included Files
@@ -329,9 +329,31 @@ int clock_systimespec(FAR struct timespec *ts);
 int clock_cpuload(int pid, FAR struct cpuload_s *cpuload);
 #endif
 
+/****************************************************************************
+ * Name:  sched_oneshot_extclk
+ *
+ * Description:
+ *   Configure to use a oneshot timer as described in
+ *   include/nuttx/timers/oneshot.h to provid external clocking to assess
+ *   the CPU load.
+ *
+ * Input Parameters:
+ *   lower - An instance of the oneshot timer interface as defined in
+ *           include/nuttx/timers/oneshot.h
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CPULOAD_ONESHOT
+struct oneshot_lowerhalf_s;
+void sched_oneshot_extclk(FAR struct oneshot_lowerhalf_s *lower);
+#endif
+
 #undef EXTERN
 #ifdef __cplusplus
 }
 #endif
 
-#endif /* _INCLUDE_NUTTX_CLOCK_H */
+#endif /* __INCLUDE_NUTTX_CLOCK_H */
diff --git a/include/nuttx/compiler.h b/include/nuttx/compiler.h
index d15bf0253e50440a6f2d1fc6dc3da322f858a907..5c5c25be295b1711122a62c5c3ede721efea186e 100644
--- a/include/nuttx/compiler.h
+++ b/include/nuttx/compiler.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * include/nuttx/compiler.h
  *
- *   Copyright (C) 2007-2009, 2012-2013, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2012-2013, 2015-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -81,7 +81,7 @@
 #  define weak_alias(name, aliasname)
 #  define weak_function
 #  define weak_const_function
-#endif
+# endif
 
 /* The noreturn attribute informs GCC that the function will not return. */
 
@@ -97,7 +97,8 @@
  * ignoring other alignment rules.
  */
 
-# define packed_struct __attribute__ ((packed))
+# define begin_packed_struct
+# define end_packed_struct __attribute__ ((packed))
 
 /* GCC does not support the reentrant attribute */
 
@@ -279,7 +280,8 @@
 /* SDCC does not support the noreturn or packed attributes */
 
 # define noreturn_function
-# define packed_struct
+# define begin_packed_struct
+# define end_packed_struct
 
 /* REVISIT: */
 
@@ -397,7 +399,8 @@
 /* The Zilog compiler does not support the noreturn, packed, naked attributes */
 
 # define noreturn_function
-# define packed_struct
+# define begin_packed_struct
+# define end_packed_struct
 # define naked_function
 # define inline_function
 # define noinline_function
@@ -489,7 +492,8 @@
 # define weak_const_function
 # define noreturn_function
 # define farcall_function
-# define packed_struct
+# define begin_packed_struct  __packed
+# define end_packed_struct
 # define reentrant_function
 # define naked_function
 # define inline_function
@@ -526,7 +530,8 @@
 # define restrict
 # define noreturn_function
 # define farcall_function
-# define packed_struct
+# define begin_packed_struct
+# define end_packed_struct
 # define reentrant_function
 # define naked_function
 # define inline_function
diff --git a/include/nuttx/contactless/ioctl.h b/include/nuttx/contactless/ioctl.h
new file mode 100644
index 0000000000000000000000000000000000000000..7c7916c1c79ac094850ef49ef3d03b1da8f453b8
--- /dev/null
+++ b/include/nuttx/contactless/ioctl.h
@@ -0,0 +1,89 @@
+/****************************************************************************
+ * include/contactless/ioctl.h
+ *
+ *   Copyright(C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_CONTACTLESS_IOCTL_H
+#define __INCLUDE_NUTTX_CONTACTLESS_IOCTL_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-Processor Definitions
+ ****************************************************************************/
+
+/* MFRC522 IOCTL Commands ***************************************************/
+
+#define MFRC522IOC_GET_PICC_UID         _CLIOC(0x0001)
+#define MFRC522IOC_GET_STATE            _CLIOC(0x0002)
+
+/* PN532 IOCTL Commands *****************************************************/
+
+#define PN532IOC_SET_SAM_CONF           _CLIOC(0x0003)
+#define PN532IOC_READ_PASSIVE           _CLIOC(0x0004)
+#define PN532IOC_SET_RF_CONF            _CLIOC(0x0005)
+#define PN532IOC_SEND_CMD_READ_PASSIVE  _CLIOC(0x0006)
+#define PN532IOC_GET_DATA_READY         _CLIOC(0x0007)
+#define PN532IOC_GET_TAG_ID             _CLIOC(0x0008)
+#define PN532IOC_GET_STATE              _CLIOC(0x0009)
+#define PN532IOC_READ_TAG_DATA          _CLIOC(0x000a)
+#define PN532IOC_WRITE_TAG_DATA         _CLIOC(0x000b)
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __INCLUDE_NUTTX_CONTACTLESS_IOCTL_H */
diff --git a/include/nuttx/contactless/mfrc522.h b/include/nuttx/contactless/mfrc522.h
new file mode 100644
index 0000000000000000000000000000000000000000..982ed17c8ca2db682d6c9e1fb71158c68a9edc57
--- /dev/null
+++ b/include/nuttx/contactless/mfrc522.h
@@ -0,0 +1,112 @@
+/****************************************************************************
+ * include/contactless/mfrc522.h
+ *
+ *   Copyright(C) 2016 Uniquix Ltda. All rights reserved.
+ *   Author: Alan Carvalho de Assis 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_CONTACTLESS_MFRC522_H
+#define __INCLUDE_NUTTX_CONTACTLESS_MFRC522_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-Processor Definitions
+ ****************************************************************************/
+
+#define MFRC522_MIFARE_ISO14443A          (0x00)
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+enum mfrc522_state_e
+{
+  MFRC522_STATE_NOT_INIT,
+  MFRC522_STATE_IDLE,
+  MFRC522_STATE_CMD_SENT,
+  MFRC522_STATE_DATA_READY,
+};
+
+struct mfrc522_dev_s;
+
+struct picc_uid_s
+{
+  uint8_t  size;         /* Number of bytes in the UID. 4, 7 or 10 */
+  uint8_t  uid_data[10];
+  uint8_t  sak;          /* The SAK (Select Acknowledge) return by the PICC */
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: mfrc522_register
+ *
+ * Description:
+ *   Register the MFRC522 character device as 'devpath'
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/rfid0"
+ *   spi     - An instance of the SPI interface to use to communicate with MFRC522
+ *   config  - Device persistent board data
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int mfrc522_register(FAR const char *devpath, FAR struct spi_dev_s *spi);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __INCLUDE_NUTTX_CONTACTLESS_MFRC522_H */
diff --git a/include/nuttx/wireless/pn532.h b/include/nuttx/contactless/pn532.h
similarity index 85%
rename from include/nuttx/wireless/pn532.h
rename to include/nuttx/contactless/pn532.h
index 450b7c7ba3edc250ba8b1f07b0324e73ed3fa4c2..c4bf82d8b24b0fda61b984563e0e8b0e56489326 100644
--- a/include/nuttx/wireless/pn532.h
+++ b/include/nuttx/contactless/pn532.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * include/wireless/pn532.h
+ * include/contactless/pn532.h
  *
  *   Copyright(C) 2012, 2013, 2016 Offcode Ltd. All rights reserved.
  *   Authors: Janne Rosberg 
@@ -35,8 +35,8 @@
  *
  ****************************************************************************/
 
-#ifndef __NUTTX_WIRELESS_PN532_H
-#define __NUTTX_WIRELESS_PN532_H
+#ifndef __INCLUDE_NUTTX_CONTACTLESS_PN532_H
+#define __INCLUDE_NUTTX_CONTACTLESS_PN532_H
 
 /****************************************************************************
  * Included Files
@@ -46,7 +46,8 @@
 #include 
 #include 
 #include 
-#include 
+
+#include 
 
 /****************************************************************************
  * Pre-Processor Definitions
@@ -54,23 +55,11 @@
 
 #define PN532_MIFARE_ISO14443A          (0x00)
 
-/* IOCTL Commands ***********************************************************/
-
-#define PN532IOC_SET_SAM_CONF           _WLIOC_USER(0x0001)
-#define PN532IOC_READ_PASSIVE           _WLIOC_USER(0x0002)
-#define PN532IOC_SET_RF_CONF            _WLIOC_USER(0x0003)
-#define PN532IOC_SEND_CMD_READ_PASSIVE  _WLIOC_USER(0x0004)
-#define PN532IOC_GET_DATA_READY         _WLIOC_USER(0x0005)
-#define PN532IOC_GET_TAG_ID             _WLIOC_USER(0x0006)
-#define PN532IOC_GET_STATE              _WLIOC_USER(0x0007)
-#define PN532IOC_READ_TAG_DATA          _WLIOC_USER(0x0008)
-#define PN532IOC_WRITE_TAG_DATA         _WLIOC_USER(0x0009)
-
 /****************************************************************************
  * Public Types
  ****************************************************************************/
 
-enum pn532_state_E
+enum pn532_state_e
 {
   PN532_STATE_NOT_INIT,
   PN532_STATE_IDLE,
@@ -162,4 +151,4 @@ int pn532_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
 }
 #endif
 
-#endif /* __NUTTX_WIRELESS_PN532_H */
+#endif /* __INCLUDE_NUTTX_CONTACTLESS_PN532_H */
diff --git a/include/nuttx/1wire.h b/include/nuttx/drivers/1wire.h
similarity index 95%
rename from include/nuttx/1wire.h
rename to include/nuttx/drivers/1wire.h
index 2879d03089faed266b7f02d593e01d5a7f07224e..5f2974e89e66503391fbb331f582f04335b40069 100644
--- a/include/nuttx/1wire.h
+++ b/include/nuttx/drivers/1wire.h
@@ -1,166 +1,166 @@
-/****************************************************************************
- * include/nuttx/1wire.h
- *
- *   Copyright (C) 2016 Aleksandr Vyhovanec. All rights reserved.
- *   Author: Aleksandr Vyhovanec 
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#ifndef __INCLUDE_NUTTX_1WIRE_H
-#define __INCLUDE_NUTTX_1WIRE_H
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include 
-
-#include 
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: ONEWIRE_RESET
- *
- * Description:
- *   Reset pulse and presence detect. Each write operational will be an 'atomic'
- *   operation in the sense that any other 1-Wire actions will be serialized
- *   and pend until this write completes.
- *
- * Input Parameters:
- *   dev    - Device-specific state data
- *
- * Returned Value:
- *   0: success, <0: A negated errno
- *
- ****************************************************************************/
-
-#define ONEWIRE_RESET(d) ((d)->ops->reset(d))
-
-/****************************************************************************
- * Name: ONEWIRE_WRITE
- *
- * Description:
- *   Send a block of data on 1-Wire. Each write operational will be an 'atomic'
- *   operation in the sense that any other 1-Wire actions will be serialized
- *   and pend until this write completes.
- *
- * Input Parameters:
- *   dev    - Device-specific state data
- *   buffer - A pointer to the read-only buffer of data to be written to device
- *   buflen - The number of bytes to send from the buffer
- *
- * Returned Value:
- *   0: success, <0: A negated errno
- *
- ****************************************************************************/
-
-#define ONEWIRE_WRITE(d,b,l) ((d)->ops->write(d,b,l))
-
-/****************************************************************************
- * Name: ONEWIRE_READ
- *
- * Description:
- *   Receive a block of data from 1-Wire. Each read operational will be an 'atomic'
- *   operation in the sense that any other 1-Wire actions will be serialized
- *   and pend until this read completes.
- *
- * Input Parameters:
- *   dev    - Device-specific state data
- *   buffer - A pointer to a buffer of data to receive the data from the device
- *   buflen - The requested number of bytes to be read
- *
- * Returned Value:
- *   0: success, <0: A negated errno
- *
- ****************************************************************************/
-
-#define ONEWIRE_READ(d,b,l) ((d)->ops->read(d,b,l))
-
-/****************************************************************************
- * Name: ONEWIRE_EXCHANGE
- *
- * Description:
- *   Reset pulse and presence detect, send a block of data and receive a block
- *   of data from 1-Wir. Each write operational will be an 'atomic'
- *   operation in the sense that any other 1-Wire actions will be serialized
- *   and pend until this write completes.
- *
- * Input Parameters:
- *   dev      - Device-specific state data
- *   reset    - Reset pulse and presence detect
- *   txbuffer - A pointer to the read-only buffer of data to be written to device
- *   txbuflen - The number of bytes to send from the buffer
- *   rxbuffer - A pointer to a buffer of data to receive the data from the device
- *   rxbuflen - The requested number of bytes to be read
- *
- * Returned Value:
- *   0: success, <0: A negated errno
- *
- ****************************************************************************/
-
-#define ONEWIRE_EXCHANGE(d,r,tx,tl,rx,rl) ((d)->ops->exchange(d,r,tx,tl,rx,rl))
-
-/****************************************************************************
- * Public Types
- ****************************************************************************/
-
-/* The 1-Wire vtable */
-
-struct onewire_dev_s;
-struct onewire_ops_s
-{
-  int    (*reset)(FAR struct onewire_dev_s *dev);
-  int    (*write)(FAR struct onewire_dev_s *dev, FAR const uint8_t *buffer,
-           int buflen);
-  int    (*read)(FAR struct onewire_dev_s *dev, FAR uint8_t *buffer,
-           int buflen);
-  int    (*exchange)(FAR struct onewire_dev_s *dev, bool reset,
-                     FAR const uint8_t *txbuffer, int txbuflen,
-                     FAR uint8_t *rxbuffer, int rxbuflen);
-};
-
-/* 1-Wire private data. This structure only defines the initial fields of the
- * structure visible to the 1-Wire client. The specific implementation may
- * add additional, device specific fields after the vtable.
- */
-
-struct onewire_dev_s
-{
-  const struct onewire_ops_s *ops; /* 1-Wire vtable */
-};
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-#endif /* __INCLUDE_NUTTX_1WIRE_H */
+/****************************************************************************
+ * include/nuttx/drivers/1wire.h
+ *
+ *   Copyright (C) 2016 Aleksandr Vyhovanec. All rights reserved.
+ *   Author: Aleksandr Vyhovanec 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_DRIVERS_1WIRE_H
+#define __INCLUDE_NUTTX_DRIVERS_1WIRE_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: ONEWIRE_RESET
+ *
+ * Description:
+ *   Reset pulse and presence detect. Each write operational will be an 'atomic'
+ *   operation in the sense that any other 1-Wire actions will be serialized
+ *   and pend until this write completes.
+ *
+ * Input Parameters:
+ *   dev    - Device-specific state data
+ *
+ * Returned Value:
+ *   0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+#define ONEWIRE_RESET(d) ((d)->ops->reset(d))
+
+/****************************************************************************
+ * Name: ONEWIRE_WRITE
+ *
+ * Description:
+ *   Send a block of data on 1-Wire. Each write operational will be an 'atomic'
+ *   operation in the sense that any other 1-Wire actions will be serialized
+ *   and pend until this write completes.
+ *
+ * Input Parameters:
+ *   dev    - Device-specific state data
+ *   buffer - A pointer to the read-only buffer of data to be written to device
+ *   buflen - The number of bytes to send from the buffer
+ *
+ * Returned Value:
+ *   0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+#define ONEWIRE_WRITE(d,b,l) ((d)->ops->write(d,b,l))
+
+/****************************************************************************
+ * Name: ONEWIRE_READ
+ *
+ * Description:
+ *   Receive a block of data from 1-Wire. Each read operational will be an 'atomic'
+ *   operation in the sense that any other 1-Wire actions will be serialized
+ *   and pend until this read completes.
+ *
+ * Input Parameters:
+ *   dev    - Device-specific state data
+ *   buffer - A pointer to a buffer of data to receive the data from the device
+ *   buflen - The requested number of bytes to be read
+ *
+ * Returned Value:
+ *   0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+#define ONEWIRE_READ(d,b,l) ((d)->ops->read(d,b,l))
+
+/****************************************************************************
+ * Name: ONEWIRE_EXCHANGE
+ *
+ * Description:
+ *   Reset pulse and presence detect, send a block of data and receive a block
+ *   of data from 1-Wir. Each write operational will be an 'atomic'
+ *   operation in the sense that any other 1-Wire actions will be serialized
+ *   and pend until this write completes.
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   reset    - Reset pulse and presence detect
+ *   txbuffer - A pointer to the read-only buffer of data to be written to device
+ *   txbuflen - The number of bytes to send from the buffer
+ *   rxbuffer - A pointer to a buffer of data to receive the data from the device
+ *   rxbuflen - The requested number of bytes to be read
+ *
+ * Returned Value:
+ *   0: success, <0: A negated errno
+ *
+ ****************************************************************************/
+
+#define ONEWIRE_EXCHANGE(d,r,tx,tl,rx,rl) ((d)->ops->exchange(d,r,tx,tl,rx,rl))
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* The 1-Wire vtable */
+
+struct onewire_dev_s;
+struct onewire_ops_s
+{
+  int    (*reset)(FAR struct onewire_dev_s *dev);
+  int    (*write)(FAR struct onewire_dev_s *dev, FAR const uint8_t *buffer,
+           int buflen);
+  int    (*read)(FAR struct onewire_dev_s *dev, FAR uint8_t *buffer,
+           int buflen);
+  int    (*exchange)(FAR struct onewire_dev_s *dev, bool reset,
+                     FAR const uint8_t *txbuffer, int txbuflen,
+                     FAR uint8_t *rxbuffer, int rxbuflen);
+};
+
+/* 1-Wire private data. This structure only defines the initial fields of the
+ * structure visible to the 1-Wire client. The specific implementation may
+ * add additional, device specific fields after the vtable.
+ */
+
+struct onewire_dev_s
+{
+  const struct onewire_ops_s *ops; /* 1-Wire vtable */
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#endif /* __INCLUDE_NUTTX_DRIVERS_1WIRE_H */
diff --git a/include/nuttx/can.h b/include/nuttx/drivers/can.h
similarity index 89%
rename from include/nuttx/can.h
rename to include/nuttx/drivers/can.h
index 573edd16b2bd59cd6691b41014b26aa35674b0ac..68df58dd7913136f82522add432fde0e081d3153 100644
--- a/include/nuttx/can.h
+++ b/include/nuttx/drivers/can.h
@@ -1,7 +1,7 @@
 /************************************************************************************
- * include/nuttx/can.h
+ * include/nuttx/drivers/can.h
  *
- *   Copyright (C) 2008, 2009, 2011-2012, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008, 2009, 2011-2012, 2015-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef _INCLUDE_NUTTX_CAN_H
-#define _INCLUDE_NUTTX_CAN_H
+#ifndef __INCLUDE_NUTTX_DRVERS_CAN_H
+#define __INCLUDE_NUTTX_DRVERS_CAN_H
 
 /************************************************************************************
  * Included Files
@@ -60,9 +60,11 @@
 /************************************************************************************
  * Pre-processor Definitions
  ************************************************************************************/
+
 /* Configuration ********************************************************************/
-/* CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
- *   CONFIG_STM32_CAN2 must also be defined)
+/* CONFIG_CAN - Enables CAN support (MCU-specific selections are also required.  For
+ *   STM32, as an example, one or both of CONFIG_STM32_CAN1 or CONFIG_STM32_CAN2
+ *   must also be defined)
  * CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID.  Default
  *   Standard 11-bit IDs.
  * CONFIG_CAN_FD - Enable support for CAN FD mode.  For the upper half driver, this
@@ -74,6 +76,8 @@
  * CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
  *   mode for testing. If the driver does support loopback mode, the setting
  *   will enable it. (If the driver does not, this setting will have no effect).
+ *   The loopback mode may be changed later by ioctl() if the driver supports the
+ *   CANIOC_SET_CONNMODES ioctl command.
  * CONFIG_CAN_TXREADY - Add support for the can_txready() callback.  This is needed
  *   only for CAN hardware the supports an separate H/W TX message FIFO.  The call
  *   back is needed to keep the S/W FIFO and the H/W FIFO in sync.  Work queue
@@ -163,6 +167,24 @@
  *                   is returned with the errno variable set to indicate the
  *                   nature of the error.
  *   Dependencies:   None
+ *
+ * CANIOC_GET_CONNMODES:
+ *   Description:    Get the current bus connection modes
+ *   Argument:       A pointer to a write-able instance of struct
+ *                   canioc_connmodes_s in which the new bus modes will be returned.
+ *   Returned Value: Zero (OK) is returned on success.  Otherwise -1 (ERROR)
+ *                   is returned with the errno variable set to indicate the
+ *                   nature of the error.
+ *   Dependencies:   None
+ *
+ * CANIOC_SET_CONNMODES:
+ *   Description:    Set new bus connection modes values
+ *   Argument:       A pointer to a read-able instance of struct
+ *                   canioc_connmodes_s in which the new bus modes are provided.
+ *   Returned Value: Zero (OK) is returned on success.  Otherwise -1 (ERROR)
+ *                   is returned with the errno variable set to indicate the
+ *                   nature of the error.
+ *   Dependencies:   None
  */
 
 #define CANIOC_RTR                _CANIOC(1)
@@ -172,12 +194,37 @@
 #define CANIOC_ADD_EXTFILTER      _CANIOC(5)
 #define CANIOC_DEL_STDFILTER      _CANIOC(6)
 #define CANIOC_DEL_EXTFILTER      _CANIOC(7)
+#define CANIOC_GET_CONNMODES      _CANIOC(8)
+#define CANIOC_SET_CONNMODES      _CANIOC(9)
 
-/* CANIOC_USER: Device specific ioctl calls can be supported with cmds greater
- * than this value
- */
+#define CAN_FIRST                 0x0001         /* First common command */
+#define CAN_NCMDS                 9              /* Nine common commands */
 
-#define CANIOC_USER               _CANIOC(8)
+/* User defined ioctl commands are also supported. These will be forwarded
+ * by the upper-half CAN driver to the lower-half CAN driver via the co_ioctl()
+ * method fo the CAN lower-half interface.  However, the lower-half driver
+ * must reserve a block of commands as follows in order prevent IOCTL
+ * command numbers from overlapping.
+ *
+ * This is generally done as follows.  The first reservation for CAN driver A would
+ * look like:
+ *
+ *   CAN_A_FIRST                 (CAN_FIRST + CAN_NCMDS)     <- First command
+ *   CAN_A_NCMDS                 42                          <- Number of commands
+ *
+ * IOCTL commands for CAN driver A would then be defined in a CAN A header file like:
+ *
+ *   CANIOC_A_CMD1               _CANIOC(CAN_A_FIRST+0)
+ *   CANIOC_A_CMD2               _CANIOC(CAN_A_FIRST+1)
+ *   CANIOC_A_CMD3               _CANIOC(CAN_A_FIRST+2)
+ *   ...
+ *   CANIOC_A_CMD42              _CANIOC(CAN_A_FIRST+41)
+ *
+ * The next reservation would look like:
+ *
+ *   CAN_B_FIRST                 (CAN_A_FIRST + CAN_A_NCMDS) <- Next command
+ *   CAN_B_NCMDS                 77                          <- Number of commands
+ */
 
 /* Convenience macros ***************************************************************/
 
@@ -364,7 +411,7 @@
  */
 
 #ifdef CONFIG_CAN_EXTID
-struct can_hdr_s
+begin_packed_struct struct can_hdr_s
 {
   uint32_t     ch_id;         /* 11- or 29-bit ID (20- or 3-bits unused) */
   uint8_t      ch_dlc    : 4; /* 4-bit DLC */
@@ -374,9 +421,9 @@ struct can_hdr_s
 #endif
   uint8_t      ch_extid  : 1; /* Extended ID indication */
   uint8_t      ch_unused : 1; /* Unused */
-} packed_struct;
+} end_packed_struct;
 #else
-struct can_hdr_s
+begin_packed_struct struct can_hdr_s
 {
   uint16_t     ch_id;         /* 11-bit standard ID (5-bits unused) */
   uint8_t      ch_dlc    : 4; /* 4-bit DLC.  May be encoded in CAN_FD mode. */
@@ -385,14 +432,14 @@ struct can_hdr_s
   uint8_t      ch_error  : 1; /* 1=ch_id is an error report */
 #endif
   uint8_t      ch_unused : 2; /* Unused */
-} packed_struct;
+} end_packed_struct;
 #endif
 
-struct can_msg_s
+begin_packed_struct struct can_msg_s
 {
   struct can_hdr_s cm_hdr;                  /* The CAN header */
   uint8_t          cm_data[CAN_MAXDATALEN]; /* CAN message data (0-8 byte) */
-} packed_struct;
+} end_packed_struct;
 
 /* This structure defines a CAN message FIFO. */
 
@@ -504,6 +551,9 @@ struct can_dev_s
   uint8_t              cd_error;         /* Flags to indicate internal device errors */
 #endif
   sem_t                cd_closesem;      /* Locks out new opens while close is in progress */
+#ifndef CONFIG_DISABLE_POLL
+  sem_t                cd_pollsem;       /* Manages exclusive access to cd_fds[] */
+#endif
   struct can_txfifo_s  cd_xmit;          /* Describes transmit FIFO */
   struct can_rxfifo_s  cd_recv;          /* Describes receive FIFO */
 #ifdef CONFIG_CAN_TXREADY
@@ -513,6 +563,10 @@ struct can_dev_s
   struct can_rtrwait_s cd_rtr[CONFIG_CAN_NPENDINGRTR];
   FAR const struct can_ops_s *cd_ops;    /* Arch-specific operations */
   FAR void            *cd_priv;          /* Used by the arch-specific logic */
+
+#ifndef CONFIG_DISABLE_POLL
+  FAR struct pollfd   *cd_fds[CONFIG_CAN_NPOLLWAITERS];
+#endif
 };
 
 /* Structures used with ioctl calls */
@@ -540,6 +594,19 @@ struct canioc_bittiming_s
   uint8_t               bt_sjw;          /* Synchronization Jump Width in time quanta */
 };
 
+/* CANIOC_GET_CONNMODES/CANIOC_SET_CONNMODES: */
+/* A CAN device may support loopback and silent mode. Both modes may not be
+ * settable independently.
+ */
+
+struct canioc_connmodes_s
+{
+  uint8_t               bm_loopback : 1; /* Enable reception of messages sent
+                                          * by this node.*/
+  uint8_t               bm_silent   : 1; /* Disable transmission of messages.
+                                          * The node still receives messages. */
+};
+
 #ifdef CONFIG_CAN_EXTID
 /* CANIOC_ADD_EXTFILTER: */
 
@@ -752,4 +819,4 @@ int can_txready(FAR struct can_dev_s *dev);
 #endif
 
 #endif /* CONFIG_CAN */
-#endif /* _INCLUDE_NUTTX_CAN_H */
+#endif /* __INCLUDE_NUTTX_DRVERS_CAN_H */
diff --git a/include/nuttx/drivers/drivers.h b/include/nuttx/drivers/drivers.h
new file mode 100644
index 0000000000000000000000000000000000000000..612434d15b7a1948c96a5c2aabd873dd084c6047
--- /dev/null
+++ b/include/nuttx/drivers/drivers.h
@@ -0,0 +1,288 @@
+/****************************************************************************
+ * include/nuttx/fs/drivers.h
+ *
+ *   Copyright (C) 2007-2009, 2011-2013, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_FS_DRIVERS_H
+#define __INCLUDE_NUTTX_FS_DRIVERS_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: devnull_register
+ *
+ * Description:
+ *   Register /dev/null
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void devnull_register(void);
+
+/****************************************************************************
+ * Name: devrandom_register
+ *
+ * Description:
+ *   Initialize the RNG hardware and register the /dev/random driver.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEV_RANDOM
+void devrandom_register(void);
+#endif
+
+/****************************************************************************
+ * Name: devurandom_register
+ *
+ * Description:
+ *   Register /dev/urandom
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEV_URANDOM
+void devurandom_register(void);
+#endif
+
+/****************************************************************************
+ * Name: devcrypto_register
+ *
+ * Description:
+ *   Register /dev/crypto
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void devcrypto_register(void);
+
+/****************************************************************************
+ * Name: devzero_register
+ *
+ * Description:
+ *   Register /dev/zero
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void devzero_register(void);
+
+/****************************************************************************
+ * Name: bchdev_register
+ *
+ * Description:
+ *   Setup so that it exports the block driver referenced by 'blkdev' as a
+ *   character device 'chardev'
+ *
+ ****************************************************************************/
+
+int bchdev_register(FAR const char *blkdev, FAR const char *chardev,
+                    bool readonly);
+
+/****************************************************************************
+ * Name: bchdev_unregister
+ *
+ * Description:
+ *   Unregister character driver access to a block device that was created
+ *   by a previous call to bchdev_register().
+ *
+ ****************************************************************************/
+
+int bchdev_unregister(FAR const char *chardev);
+
+/* Low level, direct access.  NOTE:  low-level access and character driver access
+ * are incompatible.  One and only one access method should be implemented.
+ */
+
+/****************************************************************************
+ * Name: bchlib_setup
+ *
+ * Description:
+ *   Setup so that the block driver referenced by 'blkdev' can be accessed
+ *   similar to a character device.
+ *
+ ****************************************************************************/
+
+int bchlib_setup(FAR const char *blkdev, bool readonly, FAR void **handle);
+
+/****************************************************************************
+ * Name: bchlib_teardown
+ *
+ * Description:
+ *   Setup so that the block driver referenced by 'blkdev' can be accessed
+ *   similar to a character device.
+ *
+ ****************************************************************************/
+
+int bchlib_teardown(FAR void *handle);
+
+/****************************************************************************
+ * Name: bchlib_read
+ *
+ * Description:
+ *   Read from the block device set-up by bchlib_setup as if it were a
+ *   character device.
+ *
+ ****************************************************************************/
+
+ssize_t bchlib_read(FAR void *handle, FAR char *buffer, size_t offset,
+                    size_t len);
+
+/****************************************************************************
+ * Name: bchlib_write
+ *
+ * Description:
+ *   Write to the block device set-up by bchlib_setup as if it were a
+ *   character device.
+ *
+ ****************************************************************************/
+
+ssize_t bchlib_write(FAR void *handle, FAR const char *buffer, size_t offset,
+                     size_t len);
+
+/****************************************************************************
+ * Name: pipe2
+ *
+ * Description:
+ *   pipe() creates a pair of file descriptors, pointing to a pipe inode,
+ *   and  places them in the array pointed to by 'fd'. fd[0] is for reading,
+ *   fd[1] is for writing.
+ *
+ *   NOTE: mkfifo2 is a special, non-standard, NuttX-only interface.  Since
+ *   the NuttX FIFOs are based in in-memory, circular buffers, the ability
+ *   to control the size of those buffers is critical for system tuning.
+ *
+ * Inputs:
+ *   fd[2] - The user provided array in which to catch the pipe file
+ *   descriptors
+ *   bufsize - The size of the in-memory, circular buffer in bytes.
+ *
+ * Return:
+ *   0 is returned on success; otherwise, -1 is returned with errno set
+ *   appropriately.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_PIPES) && CONFIG_DEV_PIPE_SIZE > 0
+int pipe2(int fd[2], size_t bufsize);
+#endif
+
+/****************************************************************************
+ * Name: mkfifo2
+ *
+ * Description:
+ *   mkfifo() makes a FIFO device driver file with name 'pathname.'  Unlike
+ *   Linux, a NuttX FIFO is not a special file type but simply a device
+ *   driver instance.  'mode' specifies the FIFO's permissions.
+ *
+ *   Once the FIFO has been created by mkfifo(), any thread can open it for
+ *   reading or writing, in the same way as an ordinary file. However, it
+ *   must have been opened from both reading and writing before input or
+ *   output can be performed.  This FIFO implementation will block all
+ *   attempts to open a FIFO read-only until at least one thread has opened
+ *   the FIFO for  writing.
+ *
+ *   If all threads that write to the FIFO have closed, subsequent calls to
+ *   read() on the FIFO will return 0 (end-of-file).
+ *
+ *   NOTE: mkfifo2 is a special, non-standard, NuttX-only interface.  Since
+ *   the NuttX FIFOs are based in in-memory, circular buffers, the ability
+ *   to control the size of those buffers is critical for system tuning.
+ *
+ * Inputs:
+ *   pathname - The full path to the FIFO instance to attach to or to create
+ *     (if not already created).
+ *   mode - Ignored for now
+ *   bufsize - The size of the in-memory, circular buffer in bytes.
+ *
+ * Return:
+ *   0 is returned on success; otherwise, -1 is returned with errno set
+ *   appropriately.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_PIPES) && CONFIG_DEV_FIFO_SIZE > 0
+int mkfifo2(FAR const char *pathname, mode_t mode, size_t bufsize);
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __INCLUDE_NUTTX_FS_DRIVERS_H */
diff --git a/include/nuttx/pwm.h b/include/nuttx/drivers/pwm.h
similarity index 94%
rename from include/nuttx/pwm.h
rename to include/nuttx/drivers/pwm.h
index f77cbee23ae2f1a816306ebba64a78fd8843ee08..eddea5804e28d78fb25706e14ec30a46d12ba639 100644
--- a/include/nuttx/pwm.h
+++ b/include/nuttx/drivers/pwm.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * include/nuttx/pwm.h
+ * include/nuttx/drivers/pwm.h
  *
  *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __INCLUDE_NUTTX_PWM_H
-#define __INCLUDE_NUTTX_PWM_H
+#ifndef __INCLUDE_NUTTX_DRIVERS_PWM_H
+#define __INCLUDE_NUTTX_DRIVERS_PWM_H
 
 /* For the purposes of this driver, a PWM device is any device that generates
  * periodic output pulses s of controlled frequency and pulse width.  Such a
@@ -66,14 +66,17 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
 /* Configuration ************************************************************/
 /* CONFIG_PWM - Enables because PWM driver support
  * CONFIG_PWM_PULSECOUNT - Some hardware will support generation of a fixed
  *   number of pulses.  This might be used, for example to support a stepper
  *   motor.  If the hardware will support a fixed pulse count, then this
  *   configuration should be set to enable the capability.
- * CONFIG_DEBUG_PWM - If enabled (with CONFIG_DEBUG and, optionally,
- *   CONFIG_DEBUG_VERBOSE), this will generate output that can be use dto
+ * CONFIG_PWM_MULTICHAN - Enables support for multiple output channels per
+ *   timer.  If selected, then CONFIG_PWM_NCHANNELS must be provided to
+ *   indicated the maximum number of supported PWM output channels.
+ * CONFIG_DEBUG_PWM_INFO - This will generate output that can be use to
  *   debug the PWM driver.
  */
 
@@ -123,6 +126,10 @@
  * Public Types
  ****************************************************************************/
 
+/* If the PWM peripheral supports multiple output channels, then this
+ * structure describes the output state on one channel.
+ */
+
 #ifdef CONFIG_PWM_MULTICHAN
 struct pwm_chan_s
 {
@@ -136,8 +143,11 @@ struct pwm_chan_s
 struct pwm_info_s
 {
   uint32_t           frequency; /* Frequency of the pulse train */
+
 #ifdef CONFIG_PWM_MULTICHAN
+                                /* Per-channel output state */
   struct pwm_chan_s  channels[CONFIG_PWM_NCHANNELS];
+
 #else
   ub16_t             duty;      /* Duty of the pulse train, "1"-to-"0" duration.
                                  * Maximum: 65535/65536 (0x0000ffff)
@@ -146,7 +156,7 @@ struct pwm_info_s
   uint32_t           count;     /* The number of pulse to generate.  0 means to
                                  * generate an indefinite number of pulses */
 #  endif
-#endif
+#endif /* CONFIG_PWM_MULTICHAN */
 };
 
 /* This structure is a set a callback functions used to call from the upper-
@@ -185,7 +195,7 @@ struct pwm_ops_s
                     FAR const struct pwm_info_s *info);
 #endif
 
-  /* Stop the pulsed output and reset the timer resources*/
+  /* Stop the pulsed output and reset the timer resources */
 
   CODE int (*stop)(FAR struct pwm_lowerhalf_s *dev);
 
@@ -317,4 +327,4 @@ void pwm_expired(FAR void *handle);
 #endif
 
 #endif /* CONFIG_PWM */
-#endif /* __INCLUDE_NUTTX_PWM_H */
+#endif /* __INCLUDE_NUTTX_DRIVERS_PWM_H */
diff --git a/include/nuttx/fs/ramdisk.h b/include/nuttx/drivers/ramdisk.h
similarity index 94%
rename from include/nuttx/fs/ramdisk.h
rename to include/nuttx/drivers/ramdisk.h
index 0f425c46aaf00ae852189d0ba7fd6b61ecd94239..27cfb4e992a43855a09682012bf47c6c0b91ba77 100644
--- a/include/nuttx/fs/ramdisk.h
+++ b/include/nuttx/drivers/ramdisk.h
@@ -1,7 +1,7 @@
 /****************************************************************************
- * include/nuttx/fs/ramdisk.h
+ * include/nuttx/drivers/ramdisk.h
  *
- *   Copyright (C) 2008-2009, 2012-2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2012-2013, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __INCLUDE_NUTTX_FS_RAMDISK_H
-#define __INCLUDE_NUTTX_FS_RAMDISK_H
+#ifndef __INCLUDE_NUTTX_DRIVERS_RAMDISK_H
+#define __INCLUDE_NUTTX_DRIVERS_RAMDISK_H
 
 /****************************************************************************
  * Included Files
@@ -105,4 +105,4 @@ int romdisk_register(int minor, FAR const uint8_t *buffer, uint32_t nsectors,
 }
 #endif
 
-#endif /* __INCLUDE_NUTTX_FS_RAMDISK_H */
+#endif /* __INCLUDE_NUTTX_DRIVERS_RAMDISK_H */
diff --git a/include/nuttx/rwbuffer.h b/include/nuttx/drivers/rwbuffer.h
similarity index 97%
rename from include/nuttx/rwbuffer.h
rename to include/nuttx/drivers/rwbuffer.h
index c658117b68683b5192abf6d0c0b1029a0866c39b..ebb45ab8a42ac52f6eed3eb8ef2b8c02c2703d3e 100644
--- a/include/nuttx/rwbuffer.h
+++ b/include/nuttx/drivers/rwbuffer.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * include/nuttx/rwbuffer.h
+ * include/nuttx/drivers/rwbuffer.h
  *
  *   Copyright (C) 2009, 2014 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __INCLUDE_NUTTX_RWBUFFER_H
-#define __INCLUDE_NUTTX_RWBUFFER_H
+#ifndef __INCLUDE_NUTTX_DRIVERS_RWBUFFER_H
+#define __INCLUDE_NUTTX_DRIVERS_RWBUFFER_H
 
 /****************************************************************************
  * Included Files
@@ -208,4 +208,4 @@ int rwb_invalidate(FAR struct rwbuffer_s *rwb,
 #endif
 
 #endif /* CONFIG_DRVR_WRITEBUFFER || CONFIG_DRVR_READAHEAD */
-#endif /* __INCLUDE_NUTTX_RWBUFFER_H */
+#endif /* __INCLUDE_NUTTX_DRIVERS_RWBUFFER_H */
diff --git a/include/nuttx/fs/dirent.h b/include/nuttx/fs/dirent.h
index efd270fbeecc325bd31857df7bcd3b40855d668c..f616f7347373fa0dda458576d12434104b5ad5e7 100644
--- a/include/nuttx/fs/dirent.h
+++ b/include/nuttx/fs/dirent.h
@@ -184,7 +184,7 @@ struct fs_unionfsdir_s
 
 struct fs_hostfsdir_s
 {
-  FAR void *  fs_dir;                         /* Opaque pointer to host DIR * */
+  FAR void *fs_dir;                           /* Opaque pointer to host DIR * */
 };
 #endif
 
diff --git a/include/nuttx/fs/fs.h b/include/nuttx/fs/fs.h
index b415725ee8f4f8c9773cf3101867ab7409cded0d..809325389c7705e22acfd29af0de31c3acea8a74 100644
--- a/include/nuttx/fs/fs.h
+++ b/include/nuttx/fs/fs.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * include/nuttx/fs/fs.h
  *
- *   Copyright (C) 2007-2009, 2011-2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011-2013, 2015-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -60,10 +60,95 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
 /* Stream flags for the fs_flags field of in struct file_struct */
 
 #define __FS_FLAG_EOF   (1 << 0) /* EOF detected by a read operation */
 #define __FS_FLAG_ERROR (1 << 1) /* Error detected by any operation */
+#define __FS_FLAG_LBF   (1 << 2) /* Line buffered */
+#define __FS_FLAG_UBF   (1 << 3) /* Buffer allocated by caller of setvbuf */
+
+/* Inode i_flag values:
+ *
+ *   Bit 0-3: Inode type (Bit 4 indicates internal OS types)
+ *   Bit 4:   Set if inode has been unlinked and is pending removal.
+ */
+
+#define FSNODEFLAG_TYPE_MASK       0x00000007 /* Isolates type field        */
+#define   FSNODEFLAG_TYPE_DRIVER   0x00000000 /*   Character driver         */
+#define   FSNODEFLAG_TYPE_BLOCK    0x00000001 /*   Block driver             */
+#define   FSNODEFLAG_TYPE_MOUNTPT  0x00000002 /*   Mount point              */
+#define FSNODEFLAG_TYPE_SPECIAL    0x00000004 /* Special OS type            */
+#define   FSNODEFLAG_TYPE_NAMEDSEM 0x00000004 /*   Named semaphore          */
+#define   FSNODEFLAG_TYPE_MQUEUE   0x00000005 /*   Message Queue            */
+#define   FSNODEFLAG_TYPE_SHM      0x00000006 /*   Shared memory region     */
+#define   FSNODEFLAG_TYPE_SOFTLINK 0x00000007 /*   Soft link                */
+#define FSNODEFLAG_DELETED         0x00000008 /* Unlinked                   */
+
+#define INODE_IS_TYPE(i,t) \
+  (((i)->i_flags & FSNODEFLAG_TYPE_MASK) == (t))
+#define INODE_IS_SPECIAL(i) \
+  (((i)->i_flags & FSNODEFLAG_TYPE_SPECIAL) != 0)
+
+#define INODE_IS_DRIVER(i)    INODE_IS_TYPE(i,FSNODEFLAG_TYPE_DRIVER)
+#define INODE_IS_BLOCK(i)     INODE_IS_TYPE(i,FSNODEFLAG_TYPE_BLOCK)
+#define INODE_IS_MOUNTPT(i)   INODE_IS_TYPE(i,FSNODEFLAG_TYPE_MOUNTPT)
+#define INODE_IS_NAMEDSEM(i)  INODE_IS_TYPE(i,FSNODEFLAG_TYPE_NAMEDSEM)
+#define INODE_IS_MQUEUE(i)    INODE_IS_TYPE(i,FSNODEFLAG_TYPE_MQUEUE)
+#define INODE_IS_SHM(i)       INODE_IS_TYPE(i,FSNODEFLAG_TYPE_SHM)
+#define INODE_IS_SOFTLINK(i)  INODE_IS_TYPE(i,FSNODEFLAG_TYPE_SOFTLINK)
+
+#define INODE_GET_TYPE(i)     ((i)->i_flags & FSNODEFLAG_TYPE_MASK)
+#define INODE_SET_TYPE(i,t) \
+  do \
+    { \
+      (i)->i_flags = ((i)->i_flags & ~FSNODEFLAG_TYPE_MASK) | (t); \
+    } \
+  while (0)
+
+#define INODE_SET_DRIVER(i)   INODE_SET_TYPE(i,FSNODEFLAG_TYPE_DRIVER)
+#define INODE_SET_BLOCK(i)    INODE_SET_TYPE(i,FSNODEFLAG_TYPE_BLOCK)
+#define INODE_SET_MOUNTPT(i)  INODE_SET_TYPE(i,FSNODEFLAG_TYPE_MOUNTPT)
+#define INODE_SET_NAMEDSEM(i) INODE_SET_TYPE(i,FSNODEFLAG_TYPE_NAMEDSEM)
+#define INODE_SET_MQUEUE(i)   INODE_SET_TYPE(i,FSNODEFLAG_TYPE_MQUEUE)
+#define INODE_SET_SHM(i)      INODE_SET_TYPE(i,FSNODEFLAG_TYPE_SHM)
+#define INODE_SET_SOFTLINK(i) INODE_SET_TYPE(i,FSNODEFLAG_TYPE_SOFTLINK)
+
+/* Mountpoint fd_flags values */
+
+#define DIRENTFLAGS_PSEUDONODE 1
+
+#define DIRENT_SETPSEUDONODE(f) do (f) |= DIRENTFLAGS_PSEUDONODE; while (0)
+#define DIRENT_ISPSEUDONODE(f) (((f) & DIRENTFLAGS_PSEUDONODE) != 0)
+
+/* The struct file_operations open(0) normally returns zero on success and
+ * a negated errno value on failure.  There is one case, however, where
+ * the open method will redirect to another driver and return a file
+ * descriptor instead.
+ *
+ * This case is when SUSv1 pseudo-terminals are used (CONFIG_PSEUDOTERM_SUSV1=y).
+ * In this case, the output is encoded and decoded using these macros in
+ * order to support (a) returning file descriptor 0 (which really should
+ * not happen), and (b) avoiding confusion if some other open method returns
+ * a positive, non-zero value which is not a file descriptor.
+ *
+ *   OPEN_ISFD(r) tests if the return value from the open method is
+ *     really a file descriptor.
+ *   OPEN_SETFD(f) is used by an implementation of the open() method
+ *     in order to encode a file descriptor in the return value.
+ *   OPEN_GETFD(r) is use by the upper level open() logic to decode
+ *     the file descriptor encoded in the return value.
+ *
+ * REVISIT: This only works for file descriptors in the in range 0-255.
+ */
+
+#define OPEN_MAGIC      0x4200
+#define OPEN_MASK       0x00ff
+#define OPEN_MAXFD      0x00ff
+
+#define OPEN_ISFD(r)    (((r) & ~OPEN_MASK) == OPEN_MAGIC)
+#define OPEN_SETFD(f)   ((f) | OPEN_MAGIC)
+#define OPEN_GETFD(r)   ((r) & OPEN_MASK)
 
 /****************************************************************************
  * Public Type Definitions
@@ -180,6 +265,7 @@ struct mountpt_operations
 
   int     (*sync)(FAR struct file *filep);
   int     (*dup)(FAR const struct file *oldp, FAR struct file *newp);
+  int     (*fstat)(FAR const struct file *filep, FAR struct stat *buf);
 
   /* Directory operations */
 
@@ -233,16 +319,19 @@ struct mountpt_operations
 
 union inode_ops_u
 {
-  FAR const struct file_operations      *i_ops;    /* Driver operations for inode */
+  FAR const struct file_operations     *i_ops;    /* Driver operations for inode */
 #ifndef CONFIG_DISABLE_MOUNTPOINT
-  FAR const struct block_operations     *i_bops;   /* Block driver operations */
-  FAR const struct mountpt_operations   *i_mops;   /* Operations on a mountpoint */
+  FAR const struct block_operations    *i_bops;   /* Block driver operations */
+  FAR const struct mountpt_operations  *i_mops;   /* Operations on a mountpoint */
 #endif
 #ifdef CONFIG_FS_NAMED_SEMAPHORES
-  FAR struct nsem_inode_s               *i_nsem;   /* Named semaphore */
+  FAR struct nsem_inode_s              *i_nsem;   /* Named semaphore */
 #endif
 #ifndef CONFIG_DISABLE_MQUEUE
-  FAR struct mqueue_inode_s             *i_mqueue; /* POSIX message queue */
+  FAR struct mqueue_inode_s            *i_mqueue; /* POSIX message queue */
+#endif
+#ifdef CONFIG_PSEUDOFS_SOFTLINKS
+  FAR char                             *i_link;   /* Full path to link target */
 #endif
 };
 
@@ -261,6 +350,7 @@ struct inode
   FAR void         *i_private;  /* Per inode driver private data */
   char              i_name[1];  /* Name of inode (variable) */
 };
+
 #define FSNODE_SIZE(n) (sizeof(struct inode) + (n))
 
 /* This is the underlying representation of an open file.  A file
@@ -272,7 +362,7 @@ struct file
 {
   int               f_oflags;   /* Open mode flags */
   off_t             f_pos;      /* File position */
-  FAR struct inode *f_inode;    /* Driver interface */
+  FAR struct inode *f_inode;    /* Driver or file system interface */
   void             *f_priv;     /* Per file driver private data */
 };
 
@@ -316,7 +406,7 @@ struct filelist
 struct file_struct
 {
   int                fs_fd;        /* File descriptor associated with stream */
-#if CONFIG_STDIO_BUFFER_SIZE > 0
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
   sem_t              fs_sem;       /* For thread safety */
   pid_t              fs_holder;    /* Holder of sem */
   int                fs_counts;    /* Number of times sem is held */
@@ -422,8 +512,9 @@ int foreach_mountpoint(foreach_mountpoint_t handler, FAR void *arg);
  *
  ****************************************************************************/
 
-int register_driver(FAR const char *path, FAR const struct file_operations *fops,
-                    mode_t mode, FAR void *priv);
+int register_driver(FAR const char *path,
+                    FAR const struct file_operations *fops, mode_t mode,
+                    FAR void *priv);
 
 /****************************************************************************
  * Name: register_blockdriver
@@ -450,8 +541,8 @@ int register_driver(FAR const char *path, FAR const struct file_operations *fops
 
 #ifndef CONFIG_DISABLE_MOUNTPOINT
 int register_blockdriver(FAR const char *path,
-                         FAR const struct block_operations *bops, mode_t mode,
-                         FAR void *priv);
+                         FAR const struct block_operations *bops,
+                         mode_t mode, FAR void *priv);
 #endif
 
 /****************************************************************************
@@ -462,7 +553,7 @@ int register_blockdriver(FAR const char *path,
  *
  ****************************************************************************/
 
-int unregister_driver(const char *path);
+int unregister_driver(FAR const char *path);
 
 /****************************************************************************
  * Name: unregister_blockdriver
@@ -472,7 +563,7 @@ int unregister_driver(const char *path);
  *
  ****************************************************************************/
 
-int unregister_blockdriver(const char *path);
+int unregister_blockdriver(FAR const char *path);
 
 /****************************************************************************
  * Name: inode_checkflags
@@ -849,6 +940,26 @@ off_t file_seek(FAR struct file *filep, off_t offset, int whence);
 int file_fsync(FAR struct file *filep);
 #endif
 
+/****************************************************************************
+ * Name: file_ioctl
+ *
+ * Description:
+ *   Perform device specific operations.
+ *
+ * Parameters:
+ *   file     File structure instance
+ *   req      The ioctl command
+ *   arg      The argument of the ioctl cmd
+ *
+ * Return:
+ *   See ioctl() below.
+ *
+ ****************************************************************************/
+
+#if CONFIG_NFILE_DESCRIPTORS > 0
+int file_ioctl(FAR struct file *filep, int req, unsigned long arg);
+#endif
+
 /****************************************************************************
  * Name: file_vfcntl
  *
@@ -867,11 +978,12 @@ int file_vfcntl(FAR struct file *filep, int cmd, va_list ap);
  * Function: file_poll
  *
  * Description:
- *   The standard poll() operation redirects operations on file descriptors
- *   to this function.
+ *   Low-level poll operation based on struc file.  This is used both to (1)
+ *   support detached file, and also (2) by fdesc_poll() to perform all
+ *   normal operations on file descriptors descriptors.
  *
  * Input Parameters:
- *   fd    - The file descriptor of interest
+ *   file     File structure instance
  *   fds   - The structure describing the events to be monitored, OR NULL if
  *           this is a request to stop monitoring events.
  *   setup - true: Setup up the poll; false: Teardown the poll
@@ -882,111 +994,30 @@ int file_vfcntl(FAR struct file *filep, int cmd, va_list ap);
  ****************************************************************************/
 
 #if CONFIG_NFILE_DESCRIPTORS > 0
-int file_poll(int fd, FAR struct pollfd *fds, bool setup);
+int file_poll(FAR struct file *filep, FAR struct pollfd *fds, bool setup);
 #endif
 
 /****************************************************************************
- * Name: devnull_register
- *
- * Description:
- *   Register /dev/null
- *
- ****************************************************************************/
-
-void devnull_register(void);
-
-/****************************************************************************
- * Name: devcrypto_register
- *
- * Description:
- *   Register /dev/crypto
- *
- ****************************************************************************/
-
-void devcrypto_register(void);
-
-/****************************************************************************
- * Name: devzero_register
- *
- * Description:
- *   Register /dev/zero
- *
- ****************************************************************************/
-
-void devzero_register(void);
-
-/****************************************************************************
- * Name: bchdev_register
- *
- * Description:
- *   Setup so that it exports the block driver referenced by 'blkdev' as a
- *   character device 'chardev'
- *
- ****************************************************************************/
-
-int bchdev_register(FAR const char *blkdev, FAR const char *chardev,
-                    bool readonly);
-
-/****************************************************************************
- * Name: bchdev_unregister
- *
- * Description:
- *   Unregister character driver access to a block device that was created
- *   by a previous call to bchdev_register().
- *
- ****************************************************************************/
-
-int bchdev_unregister(FAR const char *chardev);
-
-/* Low level, direct access.  NOTE:  low-level access and character driver access
- * are incompatible.  One and only one access method should be implemented.
- */
-
-/****************************************************************************
- * Name: bchlib_setup
- *
- * Description:
- *   Setup so that the block driver referenced by 'blkdev' can be accessed
- *   similar to a character device.
- *
- ****************************************************************************/
-
-int bchlib_setup(FAR const char *blkdev, bool readonly, FAR void **handle);
-
-/****************************************************************************
- * Name: bchlib_teardown
- *
- * Description:
- *   Setup so that the block driver referenced by 'blkdev' can be accessed
- *   similar to a character device.
- *
- ****************************************************************************/
-
-int bchlib_teardown(FAR void *handle);
-
-/****************************************************************************
- * Name: bchlib_read
+ * Function: fdesc_poll
  *
  * Description:
- *   Read from the block device set-up by bchlib_setup as if it were a
- *   character device.
+ *   The standard poll() operation redirects operations on file descriptors
+ *   to this function.
  *
- ****************************************************************************/
-
-ssize_t bchlib_read(FAR void *handle, FAR char *buffer, size_t offset,
-                    size_t len);
-
-/****************************************************************************
- * Name: bchlib_write
+ * Input Parameters:
+ *   fd    - The file descriptor of interest
+ *   fds   - The structure describing the events to be monitored, OR NULL if
+ *           this is a request to stop monitoring events.
+ *   setup - true: Setup up the poll; false: Teardown the poll
  *
- * Description:
- *   Write to the block device set-up by bchlib_setup as if it were a
- *   character device.
+ * Returned Value:
+ *  0: Success; Negated errno on failure
  *
  ****************************************************************************/
 
-ssize_t bchlib_write(FAR void *handle, FAR const char *buffer, size_t offset,
-                     size_t len);
+#if CONFIG_NFILE_DESCRIPTORS > 0
+int fdesc_poll(int fd, FAR struct pollfd *fds, bool setup);
+#endif
 
 #undef EXTERN
 #if defined(__cplusplus)
diff --git a/include/nuttx/fs/hostfs.h b/include/nuttx/fs/hostfs.h
index 0a57797e57b97b4e8b002a27055c5a2facb54d14..e530d10bb6a253b4d0ff18b7abcd6f54fad543c3 100644
--- a/include/nuttx/fs/hostfs.h
+++ b/include/nuttx/fs/hostfs.h
@@ -40,94 +40,158 @@
  * Included Files
  ****************************************************************************/
 
+#ifndef __SIM__
+#  include 
+#  include 
+#  include 
+#  include 
+#  include 
+#else
+#  include 
+#endif
+
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
 
-#define HOST_ST_MODE_REG        0x01000
-#define HOST_ST_MODE_DIR        0x02000
-#define HOST_ST_MODE_CHR        0x04000
-#define HOST_ST_MODE_BLK        0x08000
-#define HOST_ST_MODE_PIPE       0x10000
-#define HOST_ST_MODE_LINK       0x20000
-
-#define HOSTFS_FLAG_RDOK        0x0001
-#define HOSTFS_FLAG_WROK        0x0002
-#define HOSTFS_FLAG_CREAT       0x0004
-#define HOSTFS_FLAG_EXCL        0x0008
-#define HOSTFS_FLAG_APPEND      0x0010
-#define HOSTFS_FLAG_TRUNC       0x0020
-
-#define HOSTFS_DTYPE_FILE       0x0001
-#define HOSTFS_DTYPE_CHR        0x0002
-#define HOSTFS_DTYPE_BLK        0x0004
-#define HOSTFS_DTYPE_DIRECTORY  0x0008
+#ifdef __SIM__
+
+/* These must exactly match the definitions from include/dirent.h: */
+
+#define NUTTX_DTYPE_FILE        0x01
+#define NUTTX_DTYPE_CHR         0x02
+#define NUTTX_DTYPE_BLK         0x04
+#define NUTTX_DTYPE_DIRECTORY   0x08
+
+/* These must exactly match the definitions from include/sys/stat.h: */
+
+#define NUTTX_S_IFIFO           0010000 
+#define NUTTX_S_IFCHR           0020000
+#define NUTTX_S_IFDIR           0040000
+#define NUTTX_S_IFBLK           0060000
+#define NUTTX_S_IFREG           0100000
+#define NUTTX_S_IFLNK           0120000
+
+/* These must exactly match the definitions from include/fctnl.h: */
+
+#define NUTTX_O_RDONLY   (1 << 0)  /* Open for read access (only) */
+#define NUTTX_O_WRONLY   (1 << 1)  /* Open for write access (only) */
+#define NUTTX_O_CREAT    (1 << 2)  /* Create file/sem/mq object */
+#define NUTTX_O_EXCL     (1 << 3)  /* Name must not exist when opened  */
+#define NUTTX_O_APPEND   (1 << 4)  /* Keep contents, append to end */
+#define NUTTX_O_TRUNC    (1 << 5)  /* Delete contents */
+#define NUTTX_O_NONBLOCK (1 << 6)  /* Don't wait for data */
+#define NUTTX_O_SYNC     (1 << 7)  /* Synchronize output on write */
+#define NUTTX_O_BINARY   (1 << 8)  /* Open the file in binary mode. */
+
+#define NUTTX_O_RDWR     (NUTTX_O_RDONLY | NUTTX_O_WRONLY)
+
+/* Should match definition in include/limits.h */
+
+#define NUTTX_NAME_MAX   32
+
+#endif /* __SIM__ */
 
 /****************************************************************************
  * Public Type Definitions
  ****************************************************************************/
 
-struct host_dirent_s
+#ifdef __SIM__
+
+/* These must match the definitions in include/sys/types.h */
+
+typedef uintptr_t    nuttx_size_t;
+typedef int32_t      nuttx_off_t;
+typedef unsigned int nuttx_mode_t;
+typedef int16_t      nuttx_blksize_t;
+typedef uint32_t     nuttx_blkcnt_t;
+
+/* These must match the definition in include/time.h */
+
+typedef uint32_t     nuttx_time_t;
+
+/* These must exactly match the definition from include/dirent.h: */
+
+struct nuttx_dirent_s
 {
-  size_t            d_ino;
-  size_t            d_off;
-  unsigned short    d_reclen;
-  unsigned char     d_type;
-  char              d_name[256];
+  uint8_t      d_type;             /* type of file */
+  char         d_name[NUTTX_NAME_MAX+1]; /* filename */
 };
 
-struct host_statfs_s 
+/* These must exactly match the definition from include/sys/statfs.h: */
+
+struct nuttx_statfs_s
 {
-  size_t            f_type;       /* Type of file system */
-  size_t            f_bsize;      /* Optimal transfer block size */
-  size_t            f_blocks;     /* Total data blocks in the file system */
-  size_t            f_bfree;      /* Free blocks */
-  size_t            f_bavail;     /* Free blocks available */
-  size_t            f_files;      /* Total file nodes in file system */
-  size_t            f_ffree;      /* Free file nodes in fs */
-  size_t            f_fsid;       /* File Systme ID */
-  size_t            f_namelen;    /* Max length of filenames */
-  size_t            f_frsize;     /* Fragment size */
+  uint32_t     f_type;     /* Type of filesystem */
+  nuttx_size_t f_namelen;  /* Maximum length of filenames */
+  nuttx_size_t f_bsize;    /* Optimal block size for transfers */
+  nuttx_off_t  f_blocks;   /* Total data blocks in the file system of this size */
+  nuttx_off_t  f_bfree;    /* Free blocks in the file system */
+  nuttx_off_t  f_bavail;   /* Free blocks avail to non-superuser */
+  nuttx_off_t  f_files;    /* Total file nodes in the file system */
+  nuttx_off_t  f_ffree;    /* Free file nodes in the file system */
 };
 
-struct host_stat_s 
+/* These must exactly match the definition from include/sys/stat.h: */
+
+struct nuttx_stat_s
 {
-  int               st_dev;       /* ID of the device containing file */
-  size_t            st_ino;       /* inode number */
-  size_t            st_mode;      /* protection */
-  size_t            st_nlink;     /* number of hard links */
-  size_t            st_uid;       /* user ID of owner */
-  size_t            st_gid;       /* group ID of owner */
-  size_t            st_rdev;      /* device ID */
-  size_t            st_size;      /* total size, in bytes */
-  size_t            st_blksize;   /* blocksize for file system I/O */
-  size_t            st_blocks;    /* number of 512B blocks allocated */
-  size_t            st_atim;      /* time of last access */
-  size_t            st_mtim;      /* time of last modification */
-  size_t            st_ctim;      /* time of last status change */
+  nuttx_mode_t    st_mode;    /* File type, atributes, and access mode bits */
+  nuttx_off_t     st_size;    /* Size of file/directory, in bytes */
+  nuttx_blksize_t st_blksize; /* Blocksize used for filesystem I/O */
+  nuttx_blkcnt_t  st_blocks;  /* Number of blocks allocated */
+  nuttx_time_t    st_atim;    /* Time of last access */
+  nuttx_time_t    st_mtim;    /* Time of last modification */
+  nuttx_time_t    st_ctim;    /* Time of last status change */
 };
 
+#endif /* __SIM__ */
+
 /****************************************************************************
  * Public Function Prototypes
  ****************************************************************************/
 
+#ifdef __SIM__
 int           host_open(const char *pathname, int flags, int mode);
 int           host_close(int fd);
-ssize_t       host_read(int fd, void* buf, size_t count);
+ssize_t       host_read(int fd, void *buf, nuttx_size_t count);
+ssize_t       host_write(int fd, const void *buf, nuttx_size_t count);
+off_t         host_lseek(int fd, off_t offset, int whence);
+int           host_ioctl(int fd, int request, unsigned long arg);
+void          host_sync(int fd);
+int           host_dup(int fd);
+int           host_fstat(int fd, struct nuttx_stat_s *buf);
+void         *host_opendir(const char *name);
+int           host_readdir(void* dirp, struct nuttx_dirent_s* entry);
+void          host_rewinddir(void* dirp);
+int           host_closedir(void* dirp);
+int           host_statfs(const char *path, struct nuttx_statfs_s *buf);
+int           host_unlink(const char *pathname);
+int           host_mkdir(const char *pathname, mode_t mode);
+int           host_rmdir(const char *pathname);
+int           host_rename(const char *oldpath, const char *newpath);
+int           host_stat(const char *path, struct nuttx_stat_s *buf);
+#else
+int           host_open(const char *pathname, int flags, int mode);
+int           host_close(int fd);
+ssize_t       host_read(int fd, void *buf, size_t count);
 ssize_t       host_write(int fd, const void *buf, size_t count);
 off_t         host_lseek(int fd, off_t offset, int whence);
 int           host_ioctl(int fd, int request, unsigned long arg);
 void          host_sync(int fd);
 int           host_dup(int fd);
+int           host_fstat(int fd, struct stat *buf);
 void         *host_opendir(const char *name);
-int           host_readdir(void* dirp, struct host_dirent_s* entry);
+int           host_readdir(void* dirp, struct dirent *entry);
 void          host_rewinddir(void* dirp);
 int           host_closedir(void* dirp);
-int           host_statfs(const char *path, struct host_statfs_s *buf);
+int           host_statfs(const char *path, struct statfs *buf);
 int           host_unlink(const char *pathname);
 int           host_mkdir(const char *pathname, mode_t mode);
 int           host_rmdir(const char *pathname);
 int           host_rename(const char *oldpath, const char *newpath);
-int           host_stat(const char *path, struct host_stat_s *buf);
+int           host_stat(const char *path, struct stat *buf);
+
+#endif /* __SIM__ */
 
 #endif /* __INCLUDE_NUTTX_FS_HOSTFS_H */
diff --git a/include/nuttx/fs/ioctl.h b/include/nuttx/fs/ioctl.h
index 1b0e4f9a009cd651ebaed6ea149427d36ad72a60..18f20b3d435b84045d3f88dd1eb705c0803ff869 100644
--- a/include/nuttx/fs/ioctl.h
+++ b/include/nuttx/fs/ioctl.h
@@ -83,9 +83,12 @@
 #define _LOOPBASE       (0x1e00) /* Loop device commands */
 #define _MODEMBASE      (0x1f00) /* Modem ioctl commands */
 #define _I2CBASE        (0x2000) /* I2C driver commands */
-#define _MAC854BASE     (0x2100) /* 802.15.4 device ioctl commands */
+#define _SPIBASE        (0x2100) /* SPI driver commands */
+#define _GPIOBASE       (0x2200) /* GPIO driver commands */
+#define _CLIOCBASE      (0x1200) /* Contactless modules ioctl commands */
+#define _MAC854BASE     (0x2300) /* 802.15.4 device ioctl commands */
 
-/* boardctl commands share the same number space */
+/* boardctl() commands share the same number space */
 
 #define _BOARDBASE      (0xff00) /* boardctl commands */
 
@@ -137,7 +140,10 @@
                                            * OUT: Bytes readable from this fd
                                            */
 #define FIONWRITE       _FIOC(0x0006)     /* IN:  Location to return value (int *)
-                                           * OUT: Bytes writable to this fd
+                                           * OUT: Number bytes in send queue
+                                           */
+#define FIONSPACE       _FIOC(0x0007)     /* IN:  Location to return value (int *)
+                                           * OUT: Free space in send queue.
                                            */
 
 /* NuttX file system ioctl definitions **************************************/
@@ -237,21 +243,17 @@
 #define _TSIOCVALID(c)    (_IOC_TYPE(c)==_TSIOCBASE)
 #define _TSIOC(nr)        _IOC(_TSIOCBASE,nr)
 
-/* NuttX sensor ioctl definitions (see nuttx/sensor/xxx.h) ******************/
+/* NuttX sensor ioctl definitions (see nuttx/sensor/ioctl.h) ****************/
 
 #define _SNIOCVALID(c)    (_IOC_TYPE(c)==_SNIOCBASE)
 #define _SNIOC(nr)        _IOC(_SNIOCBASE,nr)
 
-/* Nuttx Analog (DAC/ADC_ ioctl commands ************************************/
+/* Nuttx Analog (DAC/ADC) ioctl commands (see nuttx/analog/ioctl.h **********/
 
 #define _ANIOCVALID(c)    (_IOC_TYPE(c)==_ANIOCBASE)
 #define _ANIOC(nr)        _IOC(_ANIOCBASE,nr)
 
-#define ANIOC_TRIGGER     _ANIOC(0x0001)  /* Trigger one conversion
-                                           * IN: None
-                                           * OUT: None */
-
-/* NuttX PWM ioctl definitions (see nuttx/pwm.h) ****************************/
+/* NuttX PWM ioctl definitions (see nuttx/drivers/pwm.h) ********************/
 
 #define _PWMIOCVALID(c)   (_IOC_TYPE(c)==_PWMIOCBASE)
 #define _PWMIOC(nr)       _IOC(_PWMIOCBASE,nr)
@@ -341,7 +343,7 @@
 #define _RELAYIOC(nr)     _IOC(_RELAYBASE,nr)
 
 /* CAN driver ioctl definitions *********************************************/
-/* (see nuttx/can.h */
+/* (see nuttx/drivers/can.h */
 
 #define _CANIOCVALID(c)   (_IOC_TYPE(c)==_CANBASE)
 #define _CANIOC(nr)       _IOC(_CANBASE,nr)
@@ -355,8 +357,8 @@
 /* User LED driver ioctl definitions ****************************************/
 /* (see nuttx/leds/usersled.h */
 
-#define _ULEDIOCVALID(c)   (_IOC_TYPE(c)==_ULEDBASE)
-#define _ULEDIOC(nr)       _IOC(_ULEDBASE,nr)
+#define _ULEDIOCVALID(c)  (_IOC_TYPE(c)==_ULEDBASE)
+#define _ULEDIOC(nr)      _IOC(_ULEDBASE,nr)
 
 /* Zero Cross driver ioctl definitions **************************************/
 /* (see nuttx/include/sensor/zerocross.h */
@@ -371,16 +373,34 @@
 #define _LOOPIOC(nr)      _IOC(_LOOPBASE,nr)
 
 /* Modem driver ioctl definitions ********************************************/
-/* see nuttx/include/modem/*.h */
+/* see nuttx/include/modem/ioctl.h */
 
-#define _MODEMIOCVALID(c)  (_IOC_TYPE(c)==_MODEMBASE)
-#define _MODEMIOC(nr)      _IOC(_MODEMBASE,nr)
+#define _MODEMIOCVALID(c) (_IOC_TYPE(c)==_MODEMBASE)
+#define _MODEMIOC(nr)     _IOC(_MODEMBASE,nr)
 
 /* I2C driver ioctl definitions **********************************************/
 /* see nuttx/include/i2c/i2c_master.h */
 
-#define _I2CIOCVALID(c)    (_IOC_TYPE(c)==_I2CBASE)
-#define _I2CIOC(nr)        _IOC(_I2CBASE,nr)
+#define _I2CIOCVALID(c)   (_IOC_TYPE(c)==_I2CBASE)
+#define _I2CIOC(nr)       _IOC(_I2CBASE,nr)
+
+/* SPI driver ioctl definitions **********************************************/
+/* see nuttx/include/spi/spi_transfer.h */
+
+#define _SPIIOCVALID(c)   (_IOC_TYPE(c)==_SPIBASE)
+#define _SPIIOC(nr)       _IOC(_SPIBASE,nr)
+
+/* GPIO driver command definitions ******************************************/
+/* see nuttx/include/ioexpander/gpio.h */
+
+#define _GPIOCVALID(c)    (_IOC_TYPE(c)==_GPIOBASE)
+#define _GPIOC(nr)        _IOC(_GPIOBASE,nr)
+
+/* Contactless driver ioctl definitions ****************************************/
+/* (see nuttx/include/contactless/ioctl.h */
+
+#define _CLIOCVALID(c)    (_IOC_TYPE(c)==_CLIOCBASE)
+#define _CLIOC(nr)        _IOC(_CLIOCBASE,nr)
 
 /* 802.15.4 MAC driver ioctl definitions *******************************************/
 /* (see nuttx/ieee802154/ieee802154_dev.h */
diff --git a/include/nuttx/fs/nfs.h b/include/nuttx/fs/nfs.h
index f2980d2407664658762d420abb2a7ec088ed1189..f5bb1e730fd0cc85c8f7ced694e5c31594381c55 100644
--- a/include/nuttx/fs/nfs.h
+++ b/include/nuttx/fs/nfs.h
@@ -106,4 +106,4 @@ extern "C"
 }
 #endif
 
-#endif /* _NFS_NFS_H */
+#endif /* __INCLUDE_NUTTX_FS_NFS_H */
diff --git a/include/nuttx/fs/nxffs.h b/include/nuttx/fs/nxffs.h
index a93a69705688d13dad54891703593a0dc0b94817..53bec45cf5fb813133c9c7f089e78e5c4056e54d 100644
--- a/include/nuttx/fs/nxffs.h
+++ b/include/nuttx/fs/nxffs.h
@@ -41,6 +41,9 @@
  ****************************************************************************/
 
 #include 
+
+#include 
+
 #include 
 
 /****************************************************************************
@@ -134,13 +137,14 @@ extern "C"
  *
  ****************************************************************************/
 
+struct mtd_dev_s;
 int nxffs_initialize(FAR struct mtd_dev_s *mtd);
 
 /****************************************************************************
  * Name: nxffs_dump
  *
  * Description:
- *   Dump a summary of the contents of an NXFFS file system.  CONFIG_DEBUG
+ *   Dump a summary of the contents of an NXFFS file system.  CONFIG_DEBUG_FEATURES
  *   and CONFIG_DEBUG_FS must be enabled for this function to do anything.
  *
  * Input Parameters:
@@ -154,6 +158,7 @@ int nxffs_initialize(FAR struct mtd_dev_s *mtd);
  *
  ****************************************************************************/
 
+struct mtd_dev_s;
 int nxffs_dump(FAR struct mtd_dev_s *mtd, bool verbose);
 
 #undef EXTERN
diff --git a/include/nuttx/i2c/i2c_master.h b/include/nuttx/i2c/i2c_master.h
index c3684398ee6f83b85319c06dfafb6425e6c44680..da759de19ae3ac31ff5dac06922667cc9a142d83 100644
--- a/include/nuttx/i2c/i2c_master.h
+++ b/include/nuttx/i2c/i2c_master.h
@@ -205,7 +205,7 @@ struct i2c_master_s
 struct i2c_transfer_s
 {
   FAR struct i2c_msg_s *msgv; /* Array of I2C messages for the transfer */
-  size_t msgc;                /* Number of messges in the array. */
+  size_t msgc;                /* Number of messages in the array. */
 };
 
 /****************************************************************************
diff --git a/include/nuttx/input/ajoystick.h b/include/nuttx/input/ajoystick.h
index b672ed57edc7a50ab001798eb4a7ffdcdc433660..b50d98d56e30dc462fa761eef4862f0fc01ed6fa 100644
--- a/include/nuttx/input/ajoystick.h
+++ b/include/nuttx/input/ajoystick.h
@@ -61,6 +61,7 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
 /* Configuration ************************************************************/
 
 #ifndef CONFIG_AJOYSTICK_NPOLLWAITERS
@@ -159,6 +160,7 @@
 /****************************************************************************
  * Public Types
  ****************************************************************************/
+
 /* This type is a bit set that contains the state of all analog joystick
  * buttons.
  */
diff --git a/include/nuttx/input/buttons.h b/include/nuttx/input/buttons.h
index f31a197a1e287a1bc570dcb4f78852c32dcc5346..3012ba98577290782eff81df47796ed998e7dd21 100644
--- a/include/nuttx/input/buttons.h
+++ b/include/nuttx/input/buttons.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * include/nuttx/input/buttons.h
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -46,6 +46,7 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
 /* Configuration ************************************************************/
 
 #ifndef CONFIG_BUTTONS_NPOLLWAITERS
@@ -64,6 +65,17 @@
 
 #define BTNIOC_SUPPORTED  _BTNIOC(0x0001)
 
+/* Command:     BTNIOC_POLLEVENTS
+ * Description: Specify the set of button events that can cause a poll()
+ *              to awaken.  The default is all button depressions and all
+ *              button releases (all supported buttons);
+ * Argument:    A read-only pointer to an instance of struct btn_pollevents_s
+ * Return:      Zero (OK) on success.  Minus one will be returned on failure
+ *              with the errno value set appropriately.
+ */
+
+#define BTNIOC_POLLEVENTS _BTNIOC(0x0002)
+
 /* Command:     BTNIOC_REGISTER
  * Description: Register to receive a signal whenever there is a change in
  *              the state of button inputs.  This feature, of course, depends
@@ -73,11 +85,12 @@
  *              with the errno value set appropriately.
  */
 
-#define BTNIOC_REGISTER   _BTNIOC(0x0002)
+#define BTNIOC_REGISTER   _BTNIOC(0x0003)
 
 /****************************************************************************
  * Public Types
  ****************************************************************************/
+
 /* This type is a bit set that contains the state of all buttons as defined
  * in arch/board/board.h.  This is the value that is returned when reading
  * from the button driver.
@@ -85,6 +98,17 @@
 
 typedef uint8_t btn_buttonset_t;
 
+/* A reference to this structure is provided with the BTNIOC_POLLEVENTS IOCTL
+ * command and describes the conditions under which the client would like
+ * to receive notification.
+ */
+
+struct btn_pollevents_s
+{
+  btn_buttonset_t bp_press;   /* Set of button depressions to wake up the poll */
+  btn_buttonset_t bp_release; /* Set of button releases to wake up the poll */
+};
+
 /* A reference to this structure is provided with the BTNIOC_REGISTER IOCTL
  * command and describes the conditions under which the client would like
  * to receive notification.
@@ -176,6 +200,19 @@ extern "C"
 int btn_register(FAR const char *devname,
                  FAR const struct btn_lowerhalf_s *lower);
 
+/****************************************************************************
+ * Name: btn_lower_initialize
+ *
+ * Description:
+ *   Initialize the generic button lower half driver, bind it and register
+ *   it with the upper half button driver as devname.
+ *
+ ****************************************************************************/
+
+#if CONFIG_BUTTONS_LOWER
+int btn_lower_initialize(FAR const char *devname);
+#endif
+
 #undef EXTERN
 #ifdef __cplusplus
 }
diff --git a/include/nuttx/input/stmpe811.h b/include/nuttx/input/stmpe811.h
index 0ace9ea3131cb06cecbe1d872fd5ba2d7d3fd7ab..861377e81e4cd1ca215c46e87d89afbb470e9cc3 100644
--- a/include/nuttx/input/stmpe811.h
+++ b/include/nuttx/input/stmpe811.h
@@ -1,7 +1,7 @@
 /********************************************************************************************
  * include/nuttx/input/stmpe811.h
  *
- *   Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * References:
@@ -85,7 +85,7 @@
  * CONFIG_STMPE811_TEMP_DISABLE
  *   Disable driver temperature sensor functionality.
  * CONFIG_STMPE811_REGDEBUG
- *   Enable very low register-level debug output.  Requires CONFIG_DEBUG.
+ *   Enable very low register-level debug output.  Requires CONFIG_DEBUG_FEATURES.
  * CONFIG_STMPE811_THRESHX and CONFIG_STMPE811_THRESHY
  *   STMPE811 touchscreen data comes in a a very high rate.  New touch positions
  *   will only be reported when the X or Y data changes by these thresholds.
@@ -143,7 +143,7 @@
 
 /* Debug output */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
 #  undef CONFIG_STMPE811_REGDEBUG
 #endif
 
@@ -500,7 +500,7 @@ struct stmpe811_config_s
    * clear   - Acknowledge/clear any pending GPIO interrupt
    */
 
-  int  (*attach)(FAR struct stmpe811_config_s *state, xcpt_t isr);
+  int  (*attach)(FAR struct stmpe811_config_s *state, xcpt_t isr, FAR void *arg);
   void (*enable)(FAR struct stmpe811_config_s *state, bool enable);
   void (*clear)(FAR struct stmpe811_config_s *state);
 };
diff --git a/include/nuttx/input/touchscreen.h b/include/nuttx/input/touchscreen.h
index c81c9c36b7d94ebe5c1bd136d1c58231ffa43e79..96041946cbafd0c5231e82dc19f2f4eb2adbab8d 100644
--- a/include/nuttx/input/touchscreen.h
+++ b/include/nuttx/input/touchscreen.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * include/nuttx/input/touchscreen.h
  *
- *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -57,18 +57,41 @@
 /************************************************************************************
  * Pre-processor Definitions
  ************************************************************************************/
+
 /* IOCTL Commands *******************************************************************/
+/* Common TSC IOCTL commands */
 
 #define TSIOC_SETCALIB       _TSIOC(0x0001)  /* arg: Pointer to int calibration value */
 #define TSIOC_GETCALIB       _TSIOC(0x0002)  /* arg: Pointer to int calibration value */
 #define TSIOC_SETFREQUENCY   _TSIOC(0x0003)  /* arg: Pointer to uint32_t frequency value */
 #define TSIOC_GETFREQUENCY   _TSIOC(0x0004)  /* arg: Pointer to uint32_t frequency value */
 
-/* Specific touchscreen drivers may support additional, device specific ioctl
- * commands, beginning with this value:
- */
+#define TSC_FIRST            0x0001          /* First common command */
+#define TSC_NCMDS            4               /* Four common commands */
 
-#define TSIOC_USER           0x0005         /* Lowest, unused TSC ioctl command */
+/* User defined ioctl commands are also supported.  However, the TSC driver must
+ * reserve a block of commands as follows in order prevent IOCTL command numbers
+ * from overlapping.
+ *
+ * This is generally done as follows.  The first reservation for TSC driver A would
+ * look like:
+ *
+ *   TSC_A_FIRST                 (TSC_FIRST + TSC_NCMDS)     <- First command
+ *   TSC_A_NCMDS                 42                          <- Number of commands
+ *
+ * IOCTL commands for TSC driver A would then be defined in a TSC A header file like:
+ *
+ *   TSCIOC_A_CMD1               _TSIOC(TSC_A_FIRST+0)
+ *   TSCIOC_A_CMD2               _TSIOC(TSC_A_FIRST+1)
+ *   TSCIOC_A_CMD3               _TSIOC(TSC_A_FIRST+2)
+ *   ...
+ *   TSCIOC_A_CMD42              _TSIOC(TSC_A_FIRST+41)
+ *
+ * The next reservation would look like:
+ *
+ *   TSC_B_FIRST                 (TSC_A_FIRST + TSC_A_NCMDS) <- Next command
+ *   TSC_B_NCMDS                 77                          <- Number of commands
+ */
 
 /* These definitions provide the meaning of all of the bits that may be
  * reported in the struct touch_point_s flags.
diff --git a/include/nuttx/ioexpander/gpio.h b/include/nuttx/ioexpander/gpio.h
new file mode 100644
index 0000000000000000000000000000000000000000..c0d091753c1a4e17e9c1f14e7b087337d75ac0bf
--- /dev/null
+++ b/include/nuttx/ioexpander/gpio.h
@@ -0,0 +1,209 @@
+/********************************************************************************************
+ * include/nuttx/ioexpander/gpio.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_IOEXPANDER_GPIO_H
+#define __INCLUDE_NUTTX_IOEXPANDER_GPIO_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Command:     GPIOC_WRITE
+ * Description: Set the value of an output GPIO
+ * Argument:    T0=output a low value; 1=outut a high value
+ *
+ * Command:     GPIOC_READ
+ * Description: Read the value of an input or output GPIO
+ * Argument:    A pointer to an bool value to receive the result:
+ *              false=low value; true=high value.
+ *
+ * Command:     GPIOC_PINTYPE
+ * Description: Return the GPIO pin type.
+ * Argument:    A pointer to an instance of type enum gpio_pintype_e
+ *
+ * Command:     GPIOC_REGISTER
+ * Description: Register to receive a signal whenever there an interrupt
+ *              is received on an input gpio pin.  This feature, of course,
+ *              depends upon interrupt GPIO support from the platform.
+ * Argument:    The number of signal to be generated when the interrupt
+ *              occurs.
+ *
+ * Command:     GPIOC_UNREGISTER
+ * Description: Stop receiving signals for pin interrupts.
+ * Argument:    None.
+ */
+
+#define GPIOC_WRITE      _GPIOC(1)
+#define GPIOC_READ       _GPIOC(2)
+#define GPIOC_PINTYPE    _GPIOC(3)
+#define GPIOC_REGISTER   _GPIOC(4)
+#define GPIOC_UNREGISTER _GPIOC(5)
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* Identifies the type of the GPIO pin */
+
+enum gpio_pintype_e
+{
+  GPIO_INPUT_PIN = 0,
+  GPIO_OUTPUT_PIN,
+  GPIO_INTERRUPT_PIN,
+  GPIO_NPINTYPES
+};
+
+/* Interrupt callback */
+
+struct gpio_dev_s;
+typedef CODE int (*pin_interrupt_t)(FAR struct gpio_dev_s *dev);
+
+/* Pin interface vtable definition.  Instances of this vtable are read-only
+ * and may reside in FLASH.
+ *
+ *   - go_read.  Required for all all pin types.
+ *   - go_write.  Required only for the GPIO_OUTPUT_PIN pin type.  Unused
+ *     for other pin types may be NULL.
+ *   - go_attach and gp_eanble.  Required only the GPIO_INTERRUPT_PIN pin
+ *     type.  Unused for other pin types may be NULL.
+ */
+
+struct gpio_dev_s;
+struct gpio_operations_s
+{
+  /* Interface methods */
+
+  CODE int (*go_read)(FAR struct gpio_dev_s *dev, FAR bool *value);
+  CODE int (*go_write)(FAR struct gpio_dev_s *dev, bool value);
+  CODE int (*go_attach)(FAR struct gpio_dev_s *dev,
+                        pin_interrupt_t callback);
+  CODE int (*go_enable)(FAR struct gpio_dev_s *dev, bool enable);
+};
+
+/* Pin interface definition.  Must lie in writable memory. */
+
+struct gpio_dev_s
+{
+  /* Information provided from the lower half driver to the upper half
+   * driver when gpio_pin_register() is called.
+   */
+
+  uint8_t gp_pintype;  /* See enum gpio_pintype_e */;
+
+  /* Writable storage used by the upper half driver */
+
+  uint8_t gp_signo;    /* signo to use when signaling a GPIO interrupt */
+  pid_t gp_pid;        /* The task to be signalled */
+
+  /* Read-only pointer to GPIO device operations (also provided by the
+   * lower half driver).
+   */
+
+  FAR const struct gpio_operations_s *gp_ops;
+
+  /* Device specific, lower-half information may follow. */
+};
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: gpio_pin_register
+ *
+ * Description:
+ *   Register GPIO pin device driver.
+ *
+ *   - Input pin types will be registered at /dev/gpinN
+ *   - Output pin types will be registered at /dev/gpoutN
+ *   - Interrupt pin types will be registered at /dev/gpintN
+ *
+ *   Where N is the provided minor number in the range of 0-99.
+ *
+ *
+ ****************************************************************************/
+
+int gpio_pin_register(FAR struct gpio_dev_s *dev, int minor);
+
+/****************************************************************************
+ * Name: gpio_lower_half
+ *
+ * Description:
+ *   Create a GPIO pin device driver instance for an I/O expander pin.
+ *   The I/O expander pin must have already been configured by the caller
+ *   for the particular pintype.
+ *
+ * Input Parameters:
+ *   ioe     - An instance of the I/O expander interface
+ *   pin     - The I/O expander pin number for the driver
+ *   pintype - See enum gpio_pintype_e
+ *   minor   - The minor device number to use when registering the device
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_GPIO_LOWER_HALF
+struct ioexpander_dev_s;
+int gpio_lower_half(FAR struct ioexpander_dev_s *ioe, unsigned int pin,
+                    enum gpio_pintype_e pintype, int minor);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __INCLUDE_NUTTX_IOEXPANDER_GPIO_H */
diff --git a/include/nuttx/ioexpander/ioexpander.h b/include/nuttx/ioexpander/ioexpander.h
index ce95d6d4914c1706ea04cc43bddf650c8b0d6a50..f149b7dfa79ff2e6ee68db77721ea1b04ab79589 100644
--- a/include/nuttx/ioexpander/ioexpander.h
+++ b/include/nuttx/ioexpander/ioexpander.h
@@ -41,26 +41,47 @@
  ****************************************************************************/
 
 #include 
-#include 
+#include 
 
-#if defined(CONFIG_IOEXPANDER)
-
-#ifndef CONFIG_PCA9555_INT_DISABLE
-#ifndef CONFIG_SCHED_WORKQUEUE
-#  error "Work queue support required.  CONFIG_SCHED_WORKQUEUE must be selected."
-#endif
-#endif
+#ifdef CONFIG_IOEXPANDER
 
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
 
-#define IOEXPANDER_DIRECTION_IN  0
-#define IOEXPANDER_DIRECTION_OUT 1
+/* Configuration ************************************************************/
+
+#ifndef CONFIG_IOEXPANDER_NPINS
+#  define CONFIG_IOEXPANDER_NPINS 16
+#endif
+
+#if CONFIG_IOEXPANDER_NPINS > 64
+#  error No support for devices with more than 64 pins
+#endif
+
+/* Pin definitions **********************************************************/
+
+#define IOEXPANDER_DIRECTION_IN    0
+#define IOEXPANDER_DIRECTION_OUT   1
+
+#define IOEXPANDER_PINMASK         (((ioe_pinset_t)1 << CONFIG_IOEXPANDER_NPINS) - 1)
+#define PINSET_ALL                 (~((ioe_pinset_t)0))
 
 /* Pin options */
 
-#define IOEXPANDER_OPTION_INVERT 1 /* set the "active" level for the line */
+#define IOEXPANDER_OPTION_INVERT   1  /* Set the "active" level for a pin */
+#  define IOEXPANDER_VAL_NORMAL    0  /* Normal, no inversion */
+#  define IOEXPANDER_VAL_INVERT    1  /* Inverted */
+
+#define IOEXPANDER_OPTION_INTCFG   2  /* Configure interrupt for a pin */
+#  define IOEXPANDER_VAL_DISABLE   0  /* 0000 Disable pin  interrupts */
+#  define IOEXPANDER_VAL_LEVEL     1  /* xx01 Interrupt on level (vs. edge) */
+#    define IOEXPANDER_VAL_HIGH    5  /* 0101 Interrupt on high level */
+#    define IOEXPANDER_VAL_LOW     9  /* 1001 Interrupt on low level */
+#  define IOEXPANDER_VAL_EDGE      2  /* xx10 Interrupt on edge (vs. level) */
+#    define IOEXPANDER_VAL_RISING  6  /* 0110 Interrupt on rising edge */
+#    define IOEXPANDER_VAL_FALLING 10 /* 1010 Interrupt on falling edge */
+#    define IOEXPANDER_VAL_BOTH    14 /* 1110 Interrupt on both edges */
 
 /* Access macros ************************************************************/
 
@@ -221,46 +242,121 @@
  ****************************************************************************/
 
 #define IOEXP_MULTIREADBUF(dev,pins,vals,count) \
-                          ((dev)->ops->ioe_multireadbuf(dev,pin,vals,count))
+                          ((dev)->ops->ioe_multireadbuf(dev,pins,vals,count))
 
 #endif /* CONFIG_IOEXPANDER_MULTIPIN */
 
+/****************************************************************************
+ * Name: IOEP_ATTACH
+ *
+ * Description:
+ *   Attach and enable a pin interrupt callback function.
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   pinset   - The set of pin events that will generate the callback
+ *   callback - The pointer to callback function.  NULL will detach the
+ *              callback.
+ *   arg      - User-provided callback argument
+ *
+ * Returned Value:
+ *   A non-NULL handle value is returned on success.  This handle may be
+ *   used later to detach and disable the pin interrupt.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+#define IOEP_ATTACH(dev,pinset,callback,arg) \
+                   ((dev)->ops->ioe_attach(dev,pinset,callback,arg))
+#endif
+
+/****************************************************************************
+ * Name: IOEP_DETACH
+ *
+ * Description:
+ *   Detach and disable a pin interrupt callback function.
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *   handle   - The non-NULL opaque value return by IOEP_ATTACH
+ *
+ * Returned Value:
+ *   0 on success, else a negative error code
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+#define IOEP_DETACH(dev,handle) ((dev)->ops->ioe_detach(dev,handle))
+#endif
+
 /****************************************************************************
  * Public Types
  ****************************************************************************/
 
+/* This type represents a bitmap of pins */
+
+#if CONFIG_IOEXPANDER_NPINS <= 8
+typedef uint8_t ioe_pinset_t;
+#elif CONFIG_IOEXPANDER_NPINS <= 16
+typedef uint16_t ioe_pinset_t;
+#elif CONFIG_IOEXPANDER_NPINS <= 32
+typedef uint32_t ioe_pinset_t;
+#else /* if CONFIG_IOEXPANDER_NPINS <= 64 */
+typedef uint64_t ioe_pinset_t;
+#endif
+
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+/* This type represents a pin interrupt callback function */
+
 struct ioexpander_dev_s;
+typedef int (*ioe_callback_t)(FAR struct ioexpander_dev_s *dev,
+                              ioe_pinset_t pinset, FAR void *arg);
+#endif /* CONFIG_IOEXPANDER_INT_ENABLE */
+
+/* I/O expander interface methods */
 
+struct ioexpander_dev_s;
 struct ioexpander_ops_s
 {
   CODE int (*ioe_direction)(FAR struct ioexpander_dev_s *dev, uint8_t pin,
                             int direction);
   CODE int (*ioe_option)(FAR struct ioexpander_dev_s *dev, uint8_t pin,
-                         int opt, void *val);
+                         int opt, FAR void *val);
   CODE int (*ioe_writepin)(FAR struct ioexpander_dev_s *dev, uint8_t pin,
                            bool value);
   CODE int (*ioe_readpin)(FAR struct ioexpander_dev_s *dev, uint8_t pin,
-                          bool *value);
+                          FAR bool *value);
   CODE int (*ioe_readbuf)(FAR struct ioexpander_dev_s *dev, uint8_t pin,
-                          bool *value);
+                          FAR bool *value);
 #ifdef CONFIG_IOEXPANDER_MULTIPIN
   CODE int (*ioe_multiwritepin)(FAR struct ioexpander_dev_s *dev,
-                                uint8_t *pins, bool *values, int count);
+                                FAR uint8_t *pins, FAR bool *values,
+                                int count);
   CODE int (*ioe_multireadpin)(FAR struct ioexpander_dev_s *dev,
-                               uint8_t *pins, bool *values, int count);
+                               FAR uint8_t *pins, FAR bool *values,
+                               int count);
   CODE int (*ioe_multireadbuf)(FAR struct ioexpander_dev_s *dev,
-                               uint8_t *pins, bool *values, int count);
+                               FAR uint8_t *pins, FAR bool *values,
+                               int count);
+#endif
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
+  CODE FAR void *(*ioe_attach)(FAR struct ioexpander_dev_s *dev,
+                               ioe_pinset_t pinset,
+                               ioe_callback_t callback, FAR void *arg);
+  CODE int (*ioe_detach)(FAR struct ioexpander_dev_s *dev,
+                         FAR void *handle);
 #endif
 };
 
 struct ioexpander_dev_s
 {
+  /* "Lower half" operations provided by the I/O expander lower half */
+
   FAR const struct ioexpander_ops_s *ops;
-#ifdef CONFIG_IOEXPANDER_INT_ENABLE
-  struct work_s work;   /* Supports the interrupt handling "bottom half" */
-  int sigpid;           /* PID to be signaled in case of interrupt */
-  int sigval;           /* Signal to be sent in case of interrupt */
-#endif
+
+  /* Internal storage used by the I/O expander may (internal to the I/O
+   * expander implementation).
+   */
 };
 
 #endif /* CONFIG_IOEXPANDER */
diff --git a/include/nuttx/ioexpander/pca9555.h b/include/nuttx/ioexpander/pca9555.h
index aa0b3c286351242ea2aba1067727a579931fe066..151b9fed36a3e7639d7162023fbc5a146a5fc221 100644
--- a/include/nuttx/ioexpander/pca9555.h
+++ b/include/nuttx/ioexpander/pca9555.h
@@ -1,4 +1,4 @@
-/********************************************************************************************
+/****************************************************************************
  * include/nuttx/ioexpander/pca9555.h
  *
  *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
@@ -35,20 +35,31 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************************************/
+ ****************************************************************************/
 
 #ifndef __INCLUDE_NUTTX_IOEXPANDER_PCA9555_H
 #define __INCLUDE_NUTTX_IOEXPANDER_PCA9555_H
 
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
 #include 
 
-/* A reference to a structure of this type must be passed to the PCA9555 driver when the
- * driver is instantiated. This structure provides information about the configuration of
- * the PCA9555 and provides some board-specific hooks.
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* A reference to a structure of this type must be passed to the PCA9555
+ * driver when the driver is instantiated. This structure provides
+ * information about the configuration of the PCA9555 and provides some
+ * board-specific hooks.
  *
- * Memory for this structure is provided by the caller.  It is not copied by the driver
- * and is presumed to persist while the driver is active. The memory must be writeable
- * because, under certain circumstances, the driver may modify the frequency.
+ * Memory for this structure is provided by the caller.  It is not copied by
+ * the driver and is presumed to persist while the driver is active. The
+ * memory must be writeable because, under certain circumstances, the driver
+ * may modify the frequency.
  */
 
 struct pca9555_config_s
@@ -58,12 +69,11 @@ struct pca9555_config_s
   uint8_t address;     /* 7-bit I2C address (only bits 0-6 used) */
   uint32_t frequency;  /* I2C or SPI frequency */
 
+#ifdef CONFIG_IOEXPANDER_INT_ENABLE
   /* If multiple PCA9555 devices are supported, then an IRQ number must
    * be provided for each so that their interrupts can be distinguished.
    */
 
-#ifndef CONFIG_PCA9555_INT_DISABLE
-
 #ifdef CONFIG_PCA9555_MULTIPLE
   int irq;             /* IRQ number received by interrupt handler. */
 #endif
@@ -81,9 +91,9 @@ struct pca9555_config_s
 #endif
 };
 
-/********************************************************************************************
+/****************************************************************************
  * Public Function Prototypes
- ********************************************************************************************/
+ ****************************************************************************/
 
 #ifdef __cplusplus
 #define EXTERN extern "C"
@@ -93,11 +103,12 @@ extern "C"
 #define EXTERN extern
 #endif
 
-/********************************************************************************************
+/****************************************************************************
  * Name: pca9555_initialize
  *
  * Description:
- *   Instantiate and configure the PCA9555 device driver to use the provided I2C device 
+ *   Instantiate and configure the PCA9555 device driver to use the provided
+ *   I2C device
  *   instance.
  *
  * Input Parameters:
@@ -108,9 +119,9 @@ extern "C"
  * Returned Value:
  *   an ioexpander_dev_s instance on success, NULL on failure.
  *
- ********************************************************************************************/
+ ****************************************************************************/
 
-FAR struct ioexpander_dev_s* pca9555_initialize(FAR struct i2c_master_s *dev,
+FAR struct ioexpander_dev_s *pca9555_initialize(FAR struct i2c_master_s *dev,
                                                 FAR struct pca9555_config_s *config);
 
 #ifdef __cplusplus
diff --git a/include/nuttx/ioexpander/pcf8574.h b/include/nuttx/ioexpander/pcf8574.h
new file mode 100644
index 0000000000000000000000000000000000000000..f8d9bf506589b7e0bff2869954059fb0d3bc75a3
--- /dev/null
+++ b/include/nuttx/ioexpander/pcf8574.h
@@ -0,0 +1,114 @@
+/****************************************************************************
+ * include/nuttx/ioexpander/pcf8574.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_IOEXPANDER_PCF8574_H
+#define __INCLUDE_NUTTX_IOEXPANDER_PCF8574_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifdef CONFIG_PCF8574_INT_ENABLE
+/* This is the type of the PCF8574xx interrupt handler */
+
+typedef CODE void (*pcf8574_handler_t)(FAR void *arg);
+#endif
+
+/* A reference to a structure of this type must be passed to the PCF8574xx
+ * driver when the driver is instantiated. This structure provides
+ * information about the configuration of the PCF8574xx and provides some
+ * board-specific hooks.
+ *
+ * Memory for this structure is provided by the caller.  It is not copied by
+ * the driver and is presumed to persist while the driver is active. The
+ * memory must be writeable because, under certain circumstances, the driver
+ * may modify the frequency.
+ */
+
+struct pcf8574_config_s
+{
+  /* Device characterization */
+
+  uint8_t address;     /* 7-bit I2C address (only bits 0-6 used) */
+  uint32_t frequency;  /* I2C frequency */
+
+#ifdef CONFIG_PCF8574_INT_ENABLE
+  /* IRQ/GPIO access callbacks.  These operations all hidden behind
+   * callbacks to isolate the PCF8574xx driver from differences in GPIO
+   * interrupt handling by varying boards and MCUs.
+   *
+   * attach  - Attach the PCF8574xx interrupt handler to the GPIO interrupt
+   * enable  - Enable or disable the GPIO interrupt
+   */
+
+  CODE int  (*attach)(FAR struct pcf8574_config_s *state,
+                      pcf8574_handler_t handler, FAR void *arg);
+  CODE void (*enable)(FAR struct pcf8574_config_s *state, bool enable);
+#endif
+};
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: pcf8574_initialize
+ *
+ * Description:
+ *   Instantiate and configure the PCF8574xx device driver to use the provided
+ *   I2C device instance.
+ *
+ * Input Parameters:
+ *   i2c     - An I2C driver instance
+ *   minor   - The device i2c address
+ *   config  - Persistent board configuration data
+ *
+ * Returned Value:
+ *   an ioexpander_dev_s instance on success, NULL on failure.
+ *
+ ****************************************************************************/
+
+struct i2c_master_s;
+FAR struct ioexpander_dev_s *pcf8574_initialize(FAR struct i2c_master_s *i2c,
+                                                FAR struct pcf8574_config_s *config);
+
+#endif /* __INCLUDE_NUTTX_IOEXPANDER_PCF8574_H */
diff --git a/include/nuttx/ioexpander/tca64xx.h b/include/nuttx/ioexpander/tca64xx.h
new file mode 100644
index 0000000000000000000000000000000000000000..077d12d6994db0963e84281c97bea1ae93725b17
--- /dev/null
+++ b/include/nuttx/ioexpander/tca64xx.h
@@ -0,0 +1,130 @@
+/****************************************************************************
+ * include/nuttx/ioexpander/tca64xx.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * This header file derives, in part, from the Project Ara TCA64xx driver
+ * which has this copyright:
+ *
+ *   Copyright (c) 2014-2015 Google Inc.
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_IOEXPANDER_TCA64XX_H
+#define __INCLUDE_NUTTX_IOEXPANDER_TCA64XX_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* Identifies supported TCA64xx parts (as well as the number of supported
+ * parts).
+ */
+
+enum tca64xx_part_e
+{
+  TCA6408_PART = 0,
+  TCA6416_PART,
+  TCA6424_PART,
+  TCA64_NPARTS
+};
+
+#ifdef CONFIG_TCA64XX_INT_ENABLE
+/* This is the type of the TCA64xx interrupt handler */
+
+typedef CODE void (*tca64_handler_t)(FAR void *arg);
+#endif
+
+/* A reference to a structure of this type must be passed to the TCA64xx
+ * driver when the driver is instantiated. This structure provides
+ * information about the configuration of the TCA64xx and provides some
+ * board-specific hooks.
+ *
+ * Memory for this structure is provided by the caller.  It is not copied by
+ * the driver and is presumed to persist while the driver is active. The
+ * memory must be writeable because, under certain circumstances, the driver
+ * may modify the frequency.
+ */
+
+struct tca64_config_s
+{
+  /* Device characterization */
+
+  uint8_t address;     /* 7-bit I2C address (only bits 0-6 used) */
+  uint8_t part;        /* See enum tca64xx_part_e */
+  uint32_t frequency;  /* I2C or SPI frequency */
+
+#ifdef CONFIG_TCA64XX_INT_ENABLE
+  /* IRQ/GPIO access callbacks.  These operations all hidden behind
+   * callbacks to isolate the TCA64xx driver from differences in GPIO
+   * interrupt handling by varying boards and MCUs.
+   *
+   * attach  - Attach the TCA64xx interrupt handler to the GPIO interrupt
+   * enable  - Enable or disable the GPIO interrupt
+   */
+
+  CODE int  (*attach)(FAR struct tca64_config_s *state,
+                      tca64_handler_t handler, FAR void *arg);
+  CODE void (*enable)(FAR struct tca64_config_s *state, bool enable);
+#endif
+};
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: tca64_initialize
+ *
+ * Description:
+ *   Instantiate and configure the TCA64xx device driver to use the provided
+ *   I2C device instance.
+ *
+ * Input Parameters:
+ *   i2c     - An I2C driver instance
+ *   minor   - The device i2c address
+ *   config  - Persistent board configuration data
+ *
+ * Returned Value:
+ *   an ioexpander_dev_s instance on success, NULL on failure.
+ *
+ ****************************************************************************/
+
+struct i2c_master_s;
+FAR struct ioexpander_dev_s *tca64_initialize(FAR struct i2c_master_s *i2c,
+                                              FAR struct tca64_config_s *config);
+
+#endif /* __INCLUDE_NUTTX_IOEXPANDER_TCA64XX_H */
diff --git a/include/nuttx/irq.h b/include/nuttx/irq.h
index f7bfd75b3ba5d5e0867579e831689e063c095248..a4bb107a2389f11c789af4a516480d32afc2472e 100644
--- a/include/nuttx/irq.h
+++ b/include/nuttx/irq.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * include/nuttx/irq.h
  *
- *   Copyright (C) 2007-2011, 2013, 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2011, 2013, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -43,6 +43,7 @@
 #include 
 
 #ifndef __ASSEMBLY__
+# include 
 # include 
 # include 
 #endif
@@ -50,22 +51,70 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
+#ifndef __ASSEMBLY__
 /* IRQ detach is a convenience definition.  Detaching an interrupt handler
  * is equivalent to setting a NULL interrupt handler.
  */
 
-#ifndef __ASSEMBLY__
-# define irq_detach(isr) irq_attach(isr, NULL)
-#endif
+#  define irq_detach(isr) irq_attach(isr, NULL, NULL)
+
+/* Maximum/minimum values of IRQ integer types */
+
+#  if NR_IRQS <= 256
+#    define IRQT_MAX UINT8_MAX
+#  elif NR_IRQS <= 65536
+#    define IRQT_MAX UINT16_MAX
+#  else
+#    define IRQT_MAX UINT32_MAX
+#  endif
+
+#  ifdef CONFIG_ARCH_MINIMAL_VECTORTABLE
+#    if CONFIG_ARCH_NUSER_INTERRUPTS <= 256
+#      define IRQMAPPED_MAX UINT8_MAX
+#    elif CONFIG_ARCH_NUSER_INTERRUPTS <= 65536
+#      define IRQMAPPED_MAX UINT16_MAX
+#    else
+#      define IRQMAPPED_MAX UINT32_MAX
+#   endif
+#  endif
+
+#endif /* __ASSEMBLY__ */
 
 /****************************************************************************
  * Public Types
  ****************************************************************************/
 
-/* This struct defines the way the registers are stored */
-
 #ifndef __ASSEMBLY__
-typedef int (*xcpt_t)(int irq, FAR void *context);
+/* This type is an unsigned integer type large enough to hold the largest
+ * IRQ number.
+ */
+
+#if NR_IRQS <= 256
+typedef uint8_t irq_t;
+#elif NR_IRQS <= 65536
+typedef uint16_t irq_t;
+#else
+typedef uint32_t irq_t;
+#endif
+
+/* This type is an unsigned integer type large enough to hold the largest
+ * mapped vector table index.
+ */
+
+#ifdef CONFIG_ARCH_MINIMAL_VECTORTABLE
+#if CONFIG_ARCH_NUSER_INTERRUPTS <= 256
+typedef uint8_t irq_mapped_t;
+#elif CONFIG_ARCH_NUSER_INTERRUPTS <= 65536
+typedef uint16_t irq_mapped_t;
+#else
+typedef uint32_t irq_mapped_t;
+#endif
+#endif /* CONFIG_ARCH_MINIMAL_VECTORTABLE */
+
+/* This struct defines the form of an interrupt service routine */
+
+typedef int (*xcpt_t)(int irq, FAR void *context, FAR void *arg);
 #endif
 
 /* Now include architecture-specific types */
@@ -85,6 +134,20 @@ extern "C"
 #define EXTERN extern
 #endif
 
+#ifdef CONFIG_ARCH_MINIMAL_VECTORTABLE
+/* This is the interrupt vector mapping table.  This must be provided by
+ * architecture specific logic if CONFIG_ARCH_MINIMAL_VECTORTABLE is define
+ * in the configuration.
+ *
+ * REVISIT: Currently declared in sched/irq/irq.h.  This declaration here
+ * introduces a circular dependency since it depends on NR_IRQS which is
+ * defined in arch/irq.h but arch/irq.h includes nuttx/irq.h and we get
+ * here with NR_IRQS undefined.
+ */
+
+/* EXTERN const irq_mapped_t g_irqmap[NR_IRQS]; */
+#endif
+
 /****************************************************************************
  * Public Function Prototypes
  ****************************************************************************/
@@ -94,11 +157,11 @@ extern "C"
  *
  * Description:
  *   Configure the IRQ subsystem so that IRQ number 'irq' is dispatched to
- *   'isr'
+ *   'isr' with argument 'arg'
  *
  ****************************************************************************/
 
-int irq_attach(int irq, xcpt_t isr);
+int irq_attach(int irq, xcpt_t isr, FAR void *arg);
 
 /****************************************************************************
  * Name: enter_critical_section
@@ -108,9 +171,22 @@ int irq_attach(int irq, xcpt_t isr);
  *     Take the CPU IRQ lock and disable interrupts on all CPUs.  A thread-
  *     specific counter is increment to indicate that the thread has IRQs
  *     disabled and to support nested calls to enter_critical_section().
+ *
+ *     NOTE: Most architectures do not support disabling all CPUs from one
+ *     CPU.  ARM is an example.  In such cases, logic in
+ *     enter_critical_section() will still manage entrance into the
+ *     protected logic using spinlocks.
+ *
  *   If SMP is not enabled:
  *     This function is equivalent to up_irq_save().
  *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   An opaque, architecture-specific value that represents the state of
+ *   the interrupts prior to the call to enter_critical_section();
+ *
  ****************************************************************************/
 
 #if defined(CONFIG_SMP) || defined(CONFIG_SCHED_INSTRUMENTATION_CSECTION)
@@ -125,10 +201,19 @@ irqstate_t enter_critical_section(void);
  * Description:
  *   If SMP is enabled:
  *     Decrement the IRQ lock count and if it decrements to zero then release
- *     the spinlock.
+ *     the spinlock and restore the interrupt state as it was prior to the
+ *     previous call to enter_critical_section().
+ *
  *   If SMP is not enabled:
  *     This function is equivalent to up_irq_restore().
  *
+ * Input Parameters:
+ *   flags - The architecture-specific value that represents the state of
+ *           the interrupts prior to the call to enter_critical_section();
+ *
+ * Returned Value:
+ *   None
+ *
  ****************************************************************************/
 
 #if defined(CONFIG_SMP) || defined(CONFIG_SCHED_INSTRUMENTATION_CSECTION)
@@ -141,6 +226,6 @@ void leave_critical_section(irqstate_t flags);
 #ifdef __cplusplus
 }
 #endif
-#endif
 
+#endif /* __ASSEMBLY__ */
 #endif /* __INCLUDE_NUTTX_IRQ_H */
diff --git a/include/nuttx/lcd/memlcd.h b/include/nuttx/lcd/memlcd.h
index afdc7bf3bdb3b463e7261eb72e33008d0b40f173..8d892bdf59ea2a274909b44081b7a636192d293a 100644
--- a/include/nuttx/lcd/memlcd.h
+++ b/include/nuttx/lcd/memlcd.h
@@ -81,7 +81,7 @@ struct memlcd_priv_s
    * setvcomfreq - Set timer frequency for EXTCOMIN.
    */
 
-  int (*attachirq) (xcpt_t isr);
+  int (*attachirq) (xcpt_t isr, void *arg);
   void (*dispcontrol) (bool on);
 #ifndef CONFIG_MEMLCD_EXTCOMIN_MODE_HW
   void (*setpolarity) (bool pol);
diff --git a/include/nuttx/leds/ncp5623c.h b/include/nuttx/leds/ncp5623c.h
new file mode 100644
index 0000000000000000000000000000000000000000..e78a83ee68f76f44c5bdef401afd4f8507fb2c96
--- /dev/null
+++ b/include/nuttx/leds/ncp5623c.h
@@ -0,0 +1,155 @@
+/****************************************************************************
+ * include/nuttx/leds/ncp5623c.h
+ * based on include/nuttx/leds/pca9635pw.c
+ *
+ *   Author: Konstantin Berzenko 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_LEDS_NCP5623C_H
+#define __INCLUDE_NUTTX_LEDS_NCP5623C_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/* Configuration
+ * CONFIG_I2C - Enables support for I2C drivers
+ * CONFIG_NCP5623C - Enables support for the NCP5623C driver
+ */
+
+#if defined(CONFIG_I2C) && defined(CONFIG_NCP5623C)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* I2C definitions */
+
+#define I2C_BUS_FREQ_HZ        (400000)
+
+/* NCP5623C register addresses */
+
+#define NCP5623C_SHUTDOWN      (0x00)     /* System Shut Down */
+#define NCP5623C_ILED          (0x1)      /* ILED current */
+#define NCP5623C_PWM1          (0x2)      /* LED 1 brightness control */
+#define NCP5623C_PWM2          (0x3)      /* LED 2 brightness control */
+#define NCP5623C_PWM3          (0x4)      /* LED 3 brightness control */
+#define NCP5623C_UPWARD        (0x5)      /* Set Up the IEND Upward */
+#define NCP5623C_DWNWRD        (0x6)      /* Set Up the IEND Downward */
+#define NCP5623C_GRAD          (0x7)      /* Set Up the Gradual Dimming */
+#define NCP5623C_MAX_REG       (0x7)      /* Highest register */
+
+#define NCP5623C_ADDRESS_MASK  (0xe0)     /* Address part of reg */
+#define NCP5623C_VALUE_MASK    (0x1f)     /* Value part of reg */
+#define NCP5623C_SHIFT_ADDRESS (5)
+#define NCP5623C_MAX_VALUE     (0x1f)     /* Max value of all registers */
+
+#define NCP5623C_SET_REG(addr, val) \
+  (((addr << NCP5623C_SHIFT_ADDRESS) & NCP5623C_ADDRESS_MASK) | \
+   (val & NCP5623C_VALUE_MASK))           /* combine addr and val */
+
+/* IOCTL commands */
+
+#define LEDIOC_SET_REG _ULEDIOC(1)        /* Arg: ncp5623c_set_reg_s * pointer */
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+enum led_select_e
+{
+  LED_1 = NCP5623C_PWM1,
+  LED_2 = NCP5623C_PWM2,
+  LED_3 = NCP5623C_PWM3
+};
+
+/* This structure is used in an IOCTL command for setting the PWM of an individual
+ * LED. The desired LED is selected by setting the 'led' parameter accordingly
+ * whereas the 'led_pwm' field governs the brightness of the selected LED. A value
+ * of 0 (0x00) leads to a duty cycle of 0 % = LED off while a value of 255 (0xFF)
+ * leads to a duty cycle of 99.6 % = Maximum brightness.
+ */
+
+struct ncp5623c_set_reg_s
+{
+  uint8_t reg;
+  uint8_t val;
+};
+
+/****************************************************************************
+ * Forward declarations
+ ****************************************************************************/
+
+struct i2c_master_s;
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: ncp5623c_register
+ *
+ * Description:
+ *   Register the NCP5623C device as 'devpath'
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/leddrv0".
+ *   i2c     - An instance of the I2C interface to use to communicate
+ *             with the LM92.
+ *   ncp5623c_i2c_addr
+ *           - The I2C address of the NCP5623C.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int ncp5623c_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
+                      uint8_t const ncp5623c_i2c_addr);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CONFIG_I2C && CONFIG_I2C_NCP5623C */
+#endif /* __INCLUDE_NUTTX_LEDS_NCP5623C_H */
diff --git a/include/nuttx/leds/rgbled.h b/include/nuttx/leds/rgbled.h
index 07560d6a6eb044d09647bc5f51e804872ab33c47..554f0719ffdc1e52e073aabd2d4af02712d0ab0a 100644
--- a/include/nuttx/leds/rgbled.h
+++ b/include/nuttx/leds/rgbled.h
@@ -45,7 +45,7 @@
 
 #include 
 
-#include 
+#include 
 #include 
 
 #ifdef CONFIG_RGBLED
diff --git a/include/nuttx/float.h b/include/nuttx/lib/float.h
similarity index 96%
rename from include/nuttx/float.h
rename to include/nuttx/lib/float.h
index a4d8945ee5773b5d045720bee9fdeb7bf0098bb1..2ff2b4252c640afc23e84ccf2868f5f512d31d6e 100644
--- a/include/nuttx/float.h
+++ b/include/nuttx/lib/float.h
@@ -1,7 +1,7 @@
 /****************************************************************************
- * include/nuttx/float.h
+ * include/nuttx/lib/float.h
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Reference: http://pubs.opengroup.org/onlinepubs/009695399/basedefs/float.h.html
@@ -35,8 +35,8 @@
  *
  ****************************************************************************/
 
-#ifndef __INCLUDE_NUTTX_FLOAT_H
-#define __INCLUDE_NUTTX_FLOAT_H
+#ifndef __INCLUDE_NUTTX_LIB_FLOAT_H
+#define __INCLUDE_NUTTX_LIB_FLOAT_H
 
 /* TODO:  These values could vary with architectures toolchains.  This
  * logic should be move at least to the include/arch directory.
@@ -222,4 +222,4 @@
 #  define LDBL_MIN DBL_MIN
 #endif
 
-#endif /* __INCLUDE_NUTTX_FLOAT_H */
+#endif /* __INCLUDE_NUTTX_LIB_FLOAT_H */
diff --git a/include/nuttx/lib.h b/include/nuttx/lib/lib.h
similarity index 90%
rename from include/nuttx/lib.h
rename to include/nuttx/lib/lib.h
index 609f4f86f7e97a706d164c85ab91f8f6c4556367..5a55af8046ae25d53f0360d41e16fa4b53f82148 100644
--- a/include/nuttx/lib.h
+++ b/include/nuttx/lib/lib.h
@@ -1,8 +1,8 @@
 /****************************************************************************
- * include/nuttx/lib.h
+ * include/nuttx/lib/lib.h
  * Non-standard, internal APIs available in lib/.
  *
- *   Copyright (C) 2007-2009, 2012-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2012-2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -34,8 +34,8 @@
  *
  ****************************************************************************/
 
-#ifndef __INCLUDE_NUTTX_LIB_H
-#define __INCLUDE_NUTTX_LIB_H
+#ifndef __INCLUDE_NUTTX_LIB_LIB_H
+#define __INCLUDE_NUTTX_LIB_LIB_H
 
 /****************************************************************************
  * Included Files
@@ -77,10 +77,14 @@ void lib_stream_initialize(FAR struct task_group_s *group);
 void lib_stream_release(FAR struct task_group_s *group);
 #endif
 
+/* Functions defined in lib_srand.c *****************************************/
+
+unsigned long nrand(unsigned long limit);
+
 #undef EXTERN
 #ifdef __cplusplus
 }
 #endif
 
 #endif /* __ASSEMBLY__ */
-#endif /* __INCLUDE_NUTTX_LIB_H */
+#endif /* __INCLUDE_NUTTX_LIB_LIB_H */
diff --git a/include/nuttx/math.h b/include/nuttx/lib/math.h
similarity index 96%
rename from include/nuttx/math.h
rename to include/nuttx/lib/math.h
index 6ee91eab7e66d052539532a1a6ba0cec818503e8..64db8d7e067ff06420f334aed9f0d14c8ac9922e 100644
--- a/include/nuttx/math.h
+++ b/include/nuttx/lib/math.h
@@ -1,7 +1,7 @@
 /****************************************************************************
- * include/nuttx/math.h
+ * include/nuttx/lib/math.h
  *
- *   Copyright (C) 2009, 2012, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2012, 2014-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __INCLUDE_NUTTX_MATH_H
-#define __INCLUDE_NUTTX_MATH_H
+#ifndef __INCLUDE_NUTTX_LIB_MATH_H
+#define __INCLUDE_NUTTX_LIB_MATH_H
 
 /****************************************************************************
  * Included Files
@@ -93,9 +93,14 @@
 #define NAN         (0.0/0.0)
 #define HUGE_VAL    INFINITY
 
+#define INFINITY_F  (1.0F/0.0F)
+#define NAN_F       (0.0F/0.0F)
+
 #define isnan(x)    ((x) != (x))
 #define isinf(x)    (((x) == INFINITY) || ((x) == -INFINITY))
-#define isfinite(x) (!(isinf(x)) && (x != NAN))
+#define isfinite(x) (!(isinf(x) || isnan(x)))
+
+#define isinf_f(x)  (((x) == INFINITY_F) || ((x) == -INFINITY_F))
 
 /* Exponential and Logarithmic constants ************************************/
 
@@ -116,6 +121,9 @@
 #define M_2_PI     0.6366197723675813430755350534900574
 #define M_2_SQRTPI 1.1283791670955125738961589031215452
 
+#define M_PI_F     ((float)M_PI)
+#define M_PI_2_F   ((float)M_PI_2)
+
 /****************************************************************************
  * Public Function Prototypes
  ****************************************************************************/
@@ -398,4 +406,4 @@ long double truncl (long double x);
 #endif
 
 #endif /* CONFIG_LIBM */
-#endif /* __INCLUDE_NUTTX_MATH_H */
+#endif /* __INCLUDE_NUTTX_LIB_MATH_H */
diff --git a/include/nuttx/math32.h b/include/nuttx/lib/math32.h
similarity index 98%
rename from include/nuttx/math32.h
rename to include/nuttx/lib/math32.h
index 64e993d7905bacd029ffc9807c0601b81187651c..ba70f3184d1176ca2564ec3f936c8697ad90f1e6 100644
--- a/include/nuttx/math32.h
+++ b/include/nuttx/lib/math32.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * include/nuttx/math32.h
+ * include/nuttx/lib/math32.h
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __INCLUDE_NUTTX_MATH32_H
-#define __INCLUDE_NUTTX_MATH32_H
+#ifndef __INCLUDE_NUTTX_LIB_MATH32_H
+#define __INCLUDE_NUTTX_LIB_MATH32_H
 
 /****************************************************************************
  * Included Files
@@ -238,4 +238,4 @@ void umul64(FAR const struct uint64_s *factor1,
 }
 #endif
 
-#endif /* __INCLUDE_NUTTX_MATH32_H */
+#endif /* __INCLUDE_NUTTX_LIB_MATH32_H */
diff --git a/sched/module/module.h b/include/nuttx/lib/modlib.h
similarity index 57%
rename from sched/module/module.h
rename to include/nuttx/lib/modlib.h
index 9bccc0c6e1df65d5a43c866e95cfca56a81112c3..7df5e34462c0ead4b1c8bad5851c0674303fd263 100644
--- a/sched/module/module.h
+++ b/include/nuttx/lib/modlib.h
@@ -1,7 +1,7 @@
 /****************************************************************************
- * sched/module/module.h
+ * include/nuttx/lib/modlib.h
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __SCHED_MODULE_MODULE_H
-#define __SCHED_MODULE_MODULE_H
+#ifndef __INCLUDE_NUTTX_LIB_MODLIB_H
+#define __INCLUDE_NUTTX_LIB_MODLIB_H
 
 /****************************************************************************
  * Included Files
@@ -48,27 +48,141 @@
 #include 
 #include 
 
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* Configuration ************************************************************/
+
+#ifndef CONFIG_MODLIB_ALIGN_LOG2
+#  define CONFIG_MODLIB_ALIGN_LOG2 2
+#endif
+
+#ifndef CONFIG_MODLIB_BUFFERSIZE
+#  define CONFIG_MODLIB_BUFFERSIZE 128
+#endif
+
+#ifndef CONFIG_MODLIB_BUFFERINCR
+#  define CONFIG_MODLIB_BUFFERINCR 32
+#endif
+
+/* CONFIG_DEBUG_INFO, and CONFIG_DEBUG_BINFMT have to be defined or
+ * CONFIG_MODLIB_DUMPBUFFER does nothing.
+ */
+
+#if !defined(CONFIG_DEBUG_INFO) || !defined (CONFIG_DEBUG_BINFMT)
+#  undef CONFIG_MODLIB_DUMPBUFFER
+#endif
+
+#ifdef CONFIG_MODLIB_DUMPBUFFER
+# define modlib_dumpbuffer(m,b,n) sinfodumpbuffer(m,b,n)
+#else
+# define modlib_dumpbuffer(m,b,n)
+#endif
+
+/* Module names.  These are only used by the kernel module and will be
+ * disabled in all other configurations.
+ *
+ * FLAT build:  There are only kernel modules and kernel modules
+ *   masquerading as shared libraries.  Names are required.
+ * PROTECTED and KERNEL builds:  Names are only needed in the kernel
+ *   portion of the build
+ */
+
+#if defined(CONFIG_BUILD_FLAT) || defined(__KERNEL__)
+#  define HAVE_MODLIB_NAMES
+#  define MODLIB_NAMEMAX 16
+#endif
+
 /****************************************************************************
  * Public Types
  ****************************************************************************/
 
+/* This is the type of the function that is called to uninitialize the
+ * the loaded module.  This may mean, for example, un-registering a device
+ * driver. If the module is successfully initialized, its memory will be
+ * deallocated.
+ *
+ * Input Parameters:
+ *   arg - An opaque argument that was previously returned by the initializer
+ *         function.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on any failure to
+ *   initialize the module.  If zero is returned, then the module memory
+ *   will be deallocated.  If the module is still in use (for example with
+ *   open driver instances), the uninitialization function should fail with
+ *   -EBUSY
+ */
+
+typedef CODE int (*mod_uninitializer_t)(FAR void *arg);
+
+/* The contect of this structure is returned by module_initialize().
+ *
+ *   uninitializer - The pointer to the uninitialization function.  NULL may
+ *                   be returned if no uninitialization is needed (i.e, the
+ *                   the module memory can be deallocated at any time).
+ *   arg           - An argument that will be passed to the uninitialization
+                     function.
+ *   exports       - A symbol table exported by the module
+ *   nexports      - The number of symbols in the exported symbol table.
+ */
+
+struct mod_info_s
+{
+  mod_uninitializer_t uninitializer;   /* Module uninitializer */
+  FAR void *arg;                       /* Uninitializer argument */
+  FAR const struct symtab_s *exports;  /* Symbols exported by module */
+  unsigned int nexports;               /* Number of symobols in exports list */
+};
+
+/* A NuttX module is expected to export a function called module_initialize()
+ * that has the following function prototype.  This function should appear as
+ * the entry point in the ELF module file and will be called by the binfmt
+ * logic after the module has been loaded into kernel memory.
+ *
+ * Input Parameters:
+ *   modinfo - Module information returned by modlib_initialize().
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on any failure to
+ *   initialize the module.
+ */
+
+typedef CODE int (*mod_initializer_t)(FAR struct mod_info_s *modinfo);
+
+/* This is the type of the callback function used by modlib_registry_foreach() */
+
+struct module_s;
+typedef CODE int (*mod_callback_t)(FAR struct module_s *modp, FAR void *arg);
+
 /* This describes the file to be loaded. */
 
 struct symtab_s;
 struct module_s
 {
   FAR struct module_s *flink;          /* Supports a singly linked list */
-  FAR char modulename[MODULENAME_MAX]; /* Module name */
+#ifdef HAVE_MODLIB_NAMES
+  FAR char modname[MODLIB_NAMEMAX];    /* Module name */
+#endif
 #if defined(CONFIG_FS_PROCFS) && !defined(CONFIG_FS_PROCFS_EXCLUDE_MODULE)
   mod_initializer_t initializer;       /* Module initializer function */
 #endif
-  mod_uninitializer_t uninitializer;   /* Module uninitializer function */
-  FAR void *arg;                       /* Uninitializer argument */
+  struct mod_info_s modinfo;           /* Module information */
   FAR void *alloc;                     /* Allocated kernel memory */
 #if defined(CONFIG_FS_PROCFS) && !defined(CONFIG_FS_PROCFS_EXCLUDE_MODULE)
   size_t textsize;                     /* Size of the kernel .text memory allocation */
   size_t datasize;                     /* Size of the kernel .bss/.data memory allocation */
 #endif
+
+#if CONFIG_MODLIB_MAXDEPEND > 0
+  uint8_t dependents;                  /* Number of modules that depend on this module */
+
+  /* This is an upacked array of pointers to other modules that this module
+   * depends upon.
+   */
+
+  FAR struct module_s *dependencies[CONFIG_MODLIB_MAXDEPEND];
+#endif
 };
 
 /* This struct provides a description of the currently loaded instantiation
@@ -103,15 +217,16 @@ struct mod_loadinfo_s
  * Public Data
  ****************************************************************************/
 
-FAR const struct symtab_s *g_mod_symtab;
-FAR int g_mod_nsymbols;
+struct symtab_s;
+FAR const struct symtab_s *g_modlib_symtab;
+FAR int g_modlib_nsymbols;
 
 /****************************************************************************
  * Public Function Prototypes
  ****************************************************************************/
 
 /****************************************************************************
- * Name: mod_initialize
+ * Name: modlib_initialize
  *
  * Description:
  *   This function is called to configure the library to process an kernel
@@ -123,15 +238,15 @@ FAR int g_mod_nsymbols;
  *
  ****************************************************************************/
 
-int mod_initialize(FAR const char *filename,
-                   FAR struct mod_loadinfo_s *loadinfo);
+int modlib_initialize(FAR const char *filename,
+                      FAR struct mod_loadinfo_s *loadinfo);
 
 /****************************************************************************
- * Name: mod_uninitialize
+ * Name: modlib_uninitialize
  *
  * Description:
- *   Releases any resources committed by mod_init().  This essentially
- *   undoes the actions of mod_initialize.
+ *   Releases any resources committed by modlib_initialize().  This essentially
+ *   undoes the actions of modlib_initialize.
  *
  * Returned Value:
  *   0 (OK) is returned on success and a negated errno is returned on
@@ -139,75 +254,48 @@ int mod_initialize(FAR const char *filename,
  *
  ****************************************************************************/
 
-int mod_uninitialize(FAR struct mod_loadinfo_s *loadinfo);
+int modlib_uninitialize(FAR struct mod_loadinfo_s *loadinfo);
 
 /****************************************************************************
- * Name: mod_load
+ * Name: modlib_getsymtab
  *
  * Description:
- *   Loads the binary into memory, allocating memory, performing relocations
- *   and initializing the data and bss segments.
- *
- * Returned Value:
- *   0 (OK) is returned on success and a negated errno is returned on
- *   failure.
- *
- ****************************************************************************/
-
-int mod_load(FAR struct mod_loadinfo_s *loadinfo);
-
-/****************************************************************************
- * Name: mod_bind
+ *   Get the current symbol table selection as an atomic operation.
  *
- * Description:
- *   Bind the imported symbol names in the loaded module described by
- *   'loadinfo' using the exported symbol values provided by mod_setsymtab().
+ * Input Parameters:
+ *   symtab - The location to store the symbol table.
+ *   nsymbols - The location to store the number of symbols in the symbol table.
  *
  * Returned Value:
- *   0 (OK) is returned on success and a negated errno is returned on
- *   failure.
+ *   None
  *
  ****************************************************************************/
 
-int mod_bind(FAR struct mod_loadinfo_s *loadinfo);
+void modlib_getsymtab(FAR const struct symtab_s **symtab, FAR int *nsymbols);
 
 /****************************************************************************
- * Name: mod_unload
+ * Name: modlib_setsymtab
  *
  * Description:
- *   This function unloads the object from memory. This essentially undoes
- *   the actions of mod_load.  It is called only under certain error
- *   conditions after the module has been loaded but not yet started.
+ *   Select a new symbol table selection as an atomic operation.
  *
- * Returned Value:
- *   0 (OK) is returned on success and a negated errno is returned on
- *   failure.
- *
- ****************************************************************************/
-
-int mod_unload(struct mod_loadinfo_s *loadinfo);
-
-/****************************************************************************
- * Name: mod_verifyheader
- *
- * Description:
- *   Given the header from a possible ELF executable, verify that it is
- *   an ELF executable.
+ * Input Parameters:
+ *   symtab - The new symbol table.
+ *   nsymbols - The number of symbols in the symbol table.
  *
  * Returned Value:
- *   0 (OK) is returned on success and a negated errno is returned on
- *   failure.
+ *   None
  *
  ****************************************************************************/
 
-int mod_verifyheader(FAR const Elf32_Ehdr *header);
+void modlib_setsymtab(FAR const struct symtab_s *symtab, int nsymbols);
 
 /****************************************************************************
- * Name: mod_read
+ * Name: modlib_load
  *
  * Description:
- *   Read 'readsize' bytes from the object file at 'offset'.  The data is
- *   read into 'buffer.'
+ *   Loads the binary into memory, allocating memory, performing relocations
+ *   and initializing the data and bss segments.
  *
  * Returned Value:
  *   0 (OK) is returned on success and a negated errno is returned on
@@ -215,14 +303,14 @@ int mod_verifyheader(FAR const Elf32_Ehdr *header);
  *
  ****************************************************************************/
 
-int mod_read(FAR struct mod_loadinfo_s *loadinfo, FAR uint8_t *buffer,
-             size_t readsize, off_t offset);
+int modlib_load(FAR struct mod_loadinfo_s *loadinfo);
 
 /****************************************************************************
- * Name: mod_loadshdrs
+ * Name: modlib_bind
  *
  * Description:
- *   Loads section headers into memory.
+ *   Bind the imported symbol names in the loaded module described by
+ *   'loadinfo' using the exported symbol values provided by modlib_setsymtab().
  *
  * Returned Value:
  *   0 (OK) is returned on success and a negated errno is returned on
@@ -230,32 +318,19 @@ int mod_read(FAR struct mod_loadinfo_s *loadinfo, FAR uint8_t *buffer,
  *
  ****************************************************************************/
 
-int mod_loadshdrs(FAR struct mod_loadinfo_s *loadinfo);
+int modlib_bind(FAR struct module_s *modp, FAR struct mod_loadinfo_s *loadinfo);
 
 /****************************************************************************
- * Name: mod_findsection
+ * Name: modlib_unload
  *
  * Description:
- *   A section by its name.
+ *   This function unloads the object from memory. This essentially undoes
+ *   the actions of modlib_load.  It is called only under certain error
+ *   conditions after the module has been loaded but not yet started.
  *
  * Input Parameters:
+ *   modp     - Module state information
  *   loadinfo - Load state information
- *   sectname - Name of the section to find
- *
- * Returned Value:
- *   On success, the index to the section is returned; A negated errno value
- *   is returned on failure.
- *
- ****************************************************************************/
-
-int mod_findsection(FAR struct mod_loadinfo_s *loadinfo,
-                    FAR const char *sectname);
-
-/****************************************************************************
- * Name: mod_findsymtab
- *
- * Description:
- *   Find the symbol table section.
  *
  * Returned Value:
  *   0 (OK) is returned on success and a negated errno is returned on
@@ -263,58 +338,56 @@ int mod_findsection(FAR struct mod_loadinfo_s *loadinfo,
  *
  ****************************************************************************/
 
-int mod_findsymtab(FAR struct mod_loadinfo_s *loadinfo);
+int modlib_unload(struct mod_loadinfo_s *loadinfo);
 
 /****************************************************************************
- * Name: mod_readsym
+ * Name: modlib_depend
  *
  * Description:
- *   Read the ELFT symbol structure at the specfied index into memory.
- *
- * Input Parameters:
- *   loadinfo - Load state information
- *   index    - Symbol table index
- *   sym      - Location to return the table entry
+ *   Set up module dependencies between the exporter and the importer of a
+ *   symbol.  The happens when the module is installed via insmod and a
+ *   symbol is imported from another module.
  *
  * Returned Value:
  *   0 (OK) is returned on success and a negated errno is returned on
  *   failure.
  *
+ * Assumptions:
+ *   Caller holds the registry lock.
+ *
  ****************************************************************************/
 
-int mod_readsym(FAR struct mod_loadinfo_s *loadinfo, int index,
-                FAR Elf32_Sym *sym);
+#if CONFIG_MODLIB_MAXDEPEND > 0
+int modlib_depend(FAR struct module_s *importer, FAR struct module_s *exporter);
+#endif
 
 /****************************************************************************
- * Name: mod_symvalue
+ * Name: modlib_undepend
  *
  * Description:
- *   Get the value of a symbol.  The updated value of the symbol is returned
- *   in the st_value field of the symbol table entry.
- *
- * Input Parameters:
- *   loadinfo - Load state information
- *   sym      - Symbol table entry (value might be undefined)
+ *   Tear down module dependencies between the exporters and the importer of
+ *   symbols.  This happens when the module is removed via rmmod (and on
+ *   error handling cases in insmod).
  *
  * Returned Value:
  *   0 (OK) is returned on success and a negated errno is returned on
  *   failure.
  *
- *   EINVAL - There is something inconsistent in the symbol table (should only
- *            happen if the file is corrupted)
- *   ENOSYS - Symbol lies in common
- *   ESRCH  - Symbol has no name
- *   ENOENT - Symbol undefined and not provided via a symbol table
+ * Assumptions:
+ *   Caller holds the registry lock.
  *
  ****************************************************************************/
 
-int mod_symvalue(FAR struct mod_loadinfo_s *loadinfo, FAR Elf32_Sym *sym);
+#if CONFIG_MODLIB_MAXDEPEND > 0
+int modlib_undepend(FAR struct module_s *importer);
+#endif
 
 /****************************************************************************
- * Name: mod_freebuffers
+ * Name: modlib_read
  *
  * Description:
- *  Release all working buffers.
+ *   Read 'readsize' bytes from the object file at 'offset'.  The data is
+ *   read into 'buffer.'
  *
  * Returned Value:
  *   0 (OK) is returned on success and a negated errno is returned on
@@ -322,126 +395,145 @@ int mod_symvalue(FAR struct mod_loadinfo_s *loadinfo, FAR Elf32_Sym *sym);
  *
  ****************************************************************************/
 
-int mod_freebuffers(FAR struct mod_loadinfo_s *loadinfo);
+int modlib_read(FAR struct mod_loadinfo_s *loadinfo, FAR uint8_t *buffer,
+                size_t readsize, off_t offset);
 
 /****************************************************************************
- * Name: mod_allocbuffer
+ * Name: modlib_registry_lock
  *
  * Description:
- *   Perform the initial allocation of the I/O buffer, if it has not already
- *   been allocated.
+ *   Get exclusive access to the module registry.
+ *
+ * Input Parameters:
+ *   None
  *
  * Returned Value:
- *   0 (OK) is returned on success and a negated errno is returned on
- *   failure.
+ *   None
  *
  ****************************************************************************/
 
-int mod_allocbuffer(FAR struct mod_loadinfo_s *loadinfo);
+void modlib_registry_lock(void);
 
 /****************************************************************************
- * Name: mod_reallocbuffer
+ * Name: modlib_registry_unlock
  *
  * Description:
- *   Increase the size of I/O buffer by the specified buffer increment.
+ *   Relinquish the lock on the module registry
+ *
+ * Input Parameters:
+ *   None
  *
  * Returned Value:
- *   0 (OK) is returned on success and a negated errno is returned on
- *   failure.
+ *   None
  *
  ****************************************************************************/
 
-int mod_reallocbuffer(FAR struct mod_loadinfo_s *loadinfo, size_t increment);
+void modlib_registry_unlock(void);
 
 /****************************************************************************
- * Name: mod_registry_lock
+ * Name: modlib_registry_add
  *
  * Description:
- *   Get exclusive access to the module registry.
+ *   Add a new entry to the module registry.
  *
  * Input Parameters:
- *   None
+ *   modp - The module data structure to be registered.
  *
  * Returned Value:
  *   None
  *
+ * Assumptions:
+ *   The caller holds the lock on the module registry.
+ *
  ****************************************************************************/
 
-void mod_registry_lock(void);
+void modlib_registry_add(FAR struct module_s *modp);
 
 /****************************************************************************
- * Name: mod_registry_unlock
+ * Name: modlib_registry_del
  *
  * Description:
- *   Relinquish the lock on the module registry
+ *   Remove a module entry from the registry
  *
  * Input Parameters:
- *   None
+ *   modp - The registry entry to be removed.
  *
  * Returned Value:
- *   None
+ *   Zero (OK) is returned if the registry entry was deleted.  Otherwise,
+ *   a negated errno value is returned.
+ *
+ * Assumptions:
+ *   The caller holds the lock on the module registry.
  *
  ****************************************************************************/
 
-void mod_registry_unlock(void);
+int modlib_registry_del(FAR struct module_s *modp);
 
 /****************************************************************************
- * Name: mod_registry_add
+ * Name: modlib_registry_find
  *
  * Description:
- *   Add a new entry to the module registry.
+ *   Find an entry in the module registry using the name of the module.
  *
  * Input Parameters:
- *   modp - The module data structure to be registered.
+ *   modname - The name of the module to be found
  *
  * Returned Value:
- *   None
+ *   If the registry entry is found, a pointer to the module entry is
+ *   returned.  NULL is returned if the they entry is not found.
  *
  * Assumptions:
  *   The caller holds the lock on the module registry.
  *
  ****************************************************************************/
 
-void mod_registry_add(FAR struct module_s *modp);
+#ifdef HAVE_MODLIB_NAMES
+FAR struct module_s *modlib_registry_find(FAR const char *modname);
+#endif
 
 /****************************************************************************
- * Name: mod_registry_del
+ * Name: modlib_registry_verify
  *
  * Description:
- *   Remove a module entry from the registry
+ *   Verify that a module handle is valid by traversing the module list and
+ *   assuring that the module still resides in the list.  If it does not,
+ *   the handle is probably a stale pointer.
  *
  * Input Parameters:
- *   modp - The registry entry to be removed.
+ *   modp - The registry entry to be verified.
  *
  * Returned Value:
- *   Zero (OK) is returned if the registry entry was deleted.  Otherwise,
- *   a negated errno value is returned.
+ *   Returns OK is the module is valid; -ENOENT otherwise.
  *
  * Assumptions:
  *   The caller holds the lock on the module registry.
  *
  ****************************************************************************/
 
-int mod_registry_del(FAR struct module_s *modp);
+int modlib_registry_verify(FAR struct module_s *modp);
 
 /****************************************************************************
- * Name: mod_registry_find
+ * Name: modlib_registry_foreach
  *
  * Description:
- *   Find an entry in the module registry using the name of the module.
+ *   Visit each module in the registry.  This is an internal OS interface and
+ *   not available for use by applications.
  *
  * Input Parameters:
- *   modulename - The name of the module to be found
+ *   callback - This callback function was be called for each entry in the
+ *     registry.
+ *   arg - This opaque argument will be passed to the callback function.
  *
  * Returned Value:
- *   If the registry entry is found, a pointer to the module entry is
- *   returned.  NULL is returned if the they entry is not found.
+ *   This function normally returns zero (OK).  If, however, any callback
+ *   function returns a non-zero value, the traversal will be terminated and
+ *   that non-zero value will be returned.
  *
  * Assumptions:
- *   The caller holds the lock on the module registry.
+ *   The caller does NOT hold the lock on the module registry.
  *
  ****************************************************************************/
 
-FAR struct module_s *mod_registry_find(FAR const char *modulename);
+int modlib_registry_foreach(mod_callback_t callback, FAR void *arg);
 
-#endif /* __SCHED_MODULE_MODULE_H */
+#endif /* __INCLUDE_NUTTX_LIB_MODLIB_H */
diff --git a/include/nuttx/regex.h b/include/nuttx/lib/regex.h
similarity index 93%
rename from include/nuttx/regex.h
rename to include/nuttx/lib/regex.h
index e26eed914096f25fe93ec583283f862c894fe67b..660058c6cc825e71f030ce98e3e904b470f25157 100644
--- a/include/nuttx/regex.h
+++ b/include/nuttx/lib/regex.h
@@ -1,8 +1,8 @@
 /****************************************************************************
- * include/nuttx/regex.h
+ * include/nuttx/lib/regex.h
  * Non-standard, pattern-matching APIs available in lib/.
  *
- *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -34,8 +34,8 @@
  *
  ****************************************************************************/
 
-#ifndef __INCLUDE_NUTTX_REGEX_H
-#define __INCLUDE_NUTTX_REGEX_H
+#ifndef __INCLUDE_NUTTX_LIB_REGEX_H
+#define __INCLUDE_NUTTX_LIB_REGEX_H
 
 /****************************************************************************
  * Included Files
@@ -80,4 +80,4 @@ int match(const char *pattern, const char *string);
 }
 #endif
 
-#endif /* __INCLUDE_NUTTX_REGEX_H */
+#endif /* __INCLUDE_NUTTX_LIB_REGEX_H */
diff --git a/include/nuttx/stdarg.h b/include/nuttx/lib/stdarg.h
similarity index 92%
rename from include/nuttx/stdarg.h
rename to include/nuttx/lib/stdarg.h
index 2bda8cbd61774089f7e9071e60a6264d4df63c17..6d0ef173daffe13858604735cbfa17b8d512ff4f 100644
--- a/include/nuttx/stdarg.h
+++ b/include/nuttx/lib/stdarg.h
@@ -1,7 +1,7 @@
 /****************************************************************************
- * include/nuttx/stdarg.h
+ * include/nuttx/lib/stdarg.h
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __INCLUDE_NUTTX_STDARG_H
-#define __INCLUDE_NUTTX_STDARG_H
+#ifndef __INCLUDE_NUTTX_LIB_STDARG_H
+#define __INCLUDE_NUTTX_LIB_STDARG_H
 
 /****************************************************************************
  * Included Files
@@ -61,4 +61,4 @@
  * Public Function Prototypes
  ****************************************************************************/
 
-#endif /* __INCLUDE_NUTTX_STDARG_H */
+#endif /* __INCLUDE_NUTTX_LIB_STDARG_H */
diff --git a/include/nuttx/lib/xorshift128.h b/include/nuttx/lib/xorshift128.h
new file mode 100644
index 0000000000000000000000000000000000000000..b2eec4fc2b8e821c2190c96554f049ed9a4c8ee1
--- /dev/null
+++ b/include/nuttx/lib/xorshift128.h
@@ -0,0 +1,110 @@
+/****************************************************************************
+ * include/nuttx/lib/xorshift128.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: David S. Alessio
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This random number generator is simple, fast and portable.
+ *      Ref:  https://en.wikipedia.org/wiki/Xorshift
+ */
+
+#ifndef __INCLUDE_NUTTX_LIB_XORSHIFT128_H
+#define __INCLUDE_NUTTX_LIB_XORSHIFT128_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Default XorShift128 state initializer */
+
+#define XORSHIFT128_INITIALIZER { 97, 101, 97 << 17, 101 << 25 }
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* Provides the state of the XorShift128 PRNG */
+
+struct xorshift128_state_s
+{
+  uint32_t x;
+  uint32_t y;
+  uint32_t z;
+  uint32_t w;
+};
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: xorshift128
+ *
+ * Description:
+ *   Generate one 32-bit pseudo-random number.
+ *
+ *   NOTE: Because the PRNG state is passed as a parameter, this function is
+ *   fully re-entrant and may be called from an interrupt handler.
+ *
+ *   The downside to this is that users of the PRNG might not get as much
+ *   entropy as if it were a common state structure.
+ *
+ * Input Parameters:
+ *   state - The current XorShift128 state.
+ *
+ * Returned Value:
+ *   The generated pseudo-random number
+ *
+ ****************************************************************************/
+
+uint32_t xorshift128(FAR struct xorshift128_state_s *state);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __INCLUDE_NUTTX_LIB_XORSHIFT128_H */
diff --git a/include/nuttx/mm/mm.h b/include/nuttx/mm/mm.h
index 7d2e102f318bd1fb8500cde56716ce26880c29b2..485e73fbeb4f88f6dac0ef8426c77c287e471bcc 100644
--- a/include/nuttx/mm/mm.h
+++ b/include/nuttx/mm/mm.h
@@ -427,7 +427,7 @@ FAR void *kmm_memalign(size_t alignment, size_t size);
 
 /* Functions contained in kmm_heapmember.c **********************************/
 
-#if defined(CONFIG_MM_KERNEL_HEAP) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_MM_KERNEL_HEAP) && defined(CONFIG_DEBUG_FEATURES)
 bool kmm_heapmember(FAR void *mem);
 #endif
 
diff --git a/include/nuttx/mm/shm.h b/include/nuttx/mm/shm.h
index 1a568e81c422dd0ea45d70ac9fa538d5c5da35f2..35f19c50d222fcf4b798947a598e1c60b2839191 100644
--- a/include/nuttx/mm/shm.h
+++ b/include/nuttx/mm/shm.h
@@ -77,19 +77,19 @@
 
 #ifdef CONFIG_CPP_HAVE_VARARGS
 #  ifdef CONFIG_DEBUG_SHM
-#    define shmdbg(format, ...)       dbg(format, ##__VA_ARGS__)
-#    define shmvdbg(format, ...)      vdbg(format, ##__VA_ARGS__)
+#    define shmerr(format, ...)       _err(format, ##__VA_ARGS__)
+#    define shminfo(format, ...)      _info(format, ##__VA_ARGS__)
 #  else
-#    define shmdbg(format, ...)       mdbg(format, ##__VA_ARGS__)
-#    define shmvdbg(format, ...)      mvdbg(format, ##__VA_ARGS__)
+#    define shmerr(format, ...)       merr(format, ##__VA_ARGS__)
+#    define shminfo(format, ...)      minfo(format, ##__VA_ARGS__)
 #  endif
 #else
 #  ifdef CONFIG_DEBUG_SHM
-#    define shmdbg                    dbg
-#    define shmvdbg                   vdbg
+#    define shmerr                    _err
+#    define shminfo                   _info
 #  else
-#    define shmdbg                    (void)
-#    define shmvdbg                   (void)
+#    define shmerr                    (void)
+#    define shminfo                   (void)
 #  endif
 #endif
 
diff --git a/include/nuttx/mmcsd.h b/include/nuttx/mmcsd.h
index 8d9c54b47191b782245743d7e73efa57fac82f2d..15c0574d5a9897592f92d4cf07ee01f90e7c8469 100644
--- a/include/nuttx/mmcsd.h
+++ b/include/nuttx/mmcsd.h
@@ -42,14 +42,6 @@
 
 #include 
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Public Types
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/include/nuttx/modem/ioctl.h b/include/nuttx/modem/ioctl.h
new file mode 100644
index 0000000000000000000000000000000000000000..2cde4c4a752f431668c435911767c5b8a844d85a
--- /dev/null
+++ b/include/nuttx/modem/ioctl.h
@@ -0,0 +1,71 @@
+/****************************************************************************
+ * include/nuttx/modem/ioctl.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_MODEM_IOCTL_H
+#define __INCLUDE_NUTTX_MODEM_IOCTL_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* All modem-related IOCTL commands are defined here to assure that they are
+ * globally unique.
+ */
+
+/* U-Blox Modem IOCTL commands */
+
+#define MODEM_IOC_POWERON    _MODEMIOC(1)
+#define MODEM_IOC_POWEROFF   _MODEMIOC(2)
+#define MODEM_IOC_RESET      _MODEMIOC(3)
+#define MODEM_IOC_GETSTATUS  _MODEMIOC(4)
+
+/* Unrecognized IOCTL commands are forwarded to the lower half driver.  These
+ * may include the modem commands from include/nuttx/serial/ioctl.h such as
+ * the following:
+ *
+ *   TIOCMGET: Get modem status bits: FAR int
+ *   TIOCMSET: Set modem status bits: FAR const int
+ *   TIOCMBIC: Clear modem bits: FAR const int
+ *   TIOCMBIS: Set modem bits: FAR const int
+ */
+
+#endif /* __INCLUDE_NUTTX_MODEM_IOCTL_H */
diff --git a/include/nuttx/modem/u-blox.h b/include/nuttx/modem/u-blox.h
index 3b08ac422d781cf30b18803793882fa4c03d46e6..e81aeb1768c2f0be6d0246d8ea586e206029a308 100644
--- a/include/nuttx/modem/u-blox.h
+++ b/include/nuttx/modem/u-blox.h
@@ -42,16 +42,16 @@
 
 #include 
 #include 
+
 #include 
 
+#include 
+
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
 
-#define MODEM_IOC_POWERON    _MODEMIOC(1)
-#define MODEM_IOC_POWEROFF   _MODEMIOC(2)
-#define MODEM_IOC_RESET      _MODEMIOC(3)
-#define MODEM_IOC_GETSTATUS  _MODEMIOC(4)
+/* See IOCTL definitions in include/nuttx/modem/ioctl.h */
 
 /****************************************************************************
  * Public Types
diff --git a/include/nuttx/module.h b/include/nuttx/module.h
index 7ce8b80447292358a2df43b4dbd4490539befa38..25964d70d0fd0b372b6a613afe9fb8479b8c41f1 100644
--- a/include/nuttx/module.h
+++ b/include/nuttx/module.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * include/nuttx/module.h
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -44,82 +44,6 @@
 
 #include 
 
-#include 
-#include 
-#include 
-
-#include 
-#include 
-#include 
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-/* Configuration ************************************************************/
-
-#ifndef CONFIG_MODULE_ALIGN_LOG2
-#  define CONFIG_MODULE_ALIGN_LOG2 2
-#endif
-
-#ifndef CONFIG_MODULE_BUFFERSIZE
-#  define CONFIG_MODULE_BUFFERSIZE 128
-#endif
-
-#ifndef CONFIG_MODULE_BUFFERINCR
-#  define CONFIG_MODULE_BUFFERINCR 32
-#endif
-
-#define MODULENAME_MAX 16
-
-/****************************************************************************
- * Public Types
- ****************************************************************************/
-
-/* This is the type of the function that is called to uninitialize the
- * the loaded module.  This may mean, for example, un-registering a device
- * driver. If the module is successfully initialized, its memory will be
- * deallocated.
- *
- * Input Parameters:
- *   arg - An opaque argument that was previously returned by the initializer
- *         function.
- *
- * Returned Value:
- *   Zero (OK) on success; a negated errno value on any failure to
- *   initialize the module.  If zero is returned, then the module memory
- *   will be deallocated.  If the module is still in use (for example with
- *   open driver instances), the uninitialization function should fail with
- *   -EBUSY
- */
-
-typedef CODE int (*mod_uninitializer_t)(FAR void *arg);
-
-/* A NuttX module is expected to export a function called module_initialize()
- * that has the following function prototype.  This function should appear as
- * the entry point in the ELF module file and will be called bythe binfmt
- * logic after the module has been loaded into kernel memory.
- *
- * Input Parameters:
- *   uninitializer - The pointer to the uninitialization function.  NULL may
- *     be returned if no uninitialization is needed (i.e, the the module
- *     memory can be deallocated at any time).
- *   arg - An argument that will be passed to the uninitialization function.
- *
- * Returned Value:
- *   Zero (OK) on success; a negated errno value on any failure to
- *   initialize the module.
- */
-
-typedef CODE int (*mod_initializer_t)(mod_uninitializer_t *uninitializer,
-                                      FAR void **arg);
-
-#ifdef __KERNEL__
-/* This is the type of the callback function used by mod_registry_foreach() */
-
-struct module_s;
-typedef CODE int (*mod_callback_t)(FAR struct module_s *modp, FAR void *arg);
-#endif
-
 /****************************************************************************
  * Public Function Prototypes
  ****************************************************************************/
@@ -133,44 +57,6 @@ extern "C"
 #define EXTERN extern
 #endif
 
-/****************************************************************************
- * Name: mod_getsymtab
- *
- * Description:
- *   Get the current kernel symbol table selection as an atomic operation.
- *
- * Input Parameters:
- *   symtab - The location to store the symbol table.
- *   nsymbols - The location to store the number of symbols in the symbol table.
- *
- * Returned Value:
- *   None
- *
- ****************************************************************************/
-
-#ifdef __KERNEL__
-void mod_getsymtab(FAR const struct symtab_s **symtab, FAR int *nsymbols);
-#endif
-
-/****************************************************************************
- * Name: mod_setsymtab
- *
- * Description:
- *   Select a new kernel symbol table selection as an atomic operation.
- *
- * Input Parameters:
- *   symtab - The new symbol table.
- *   nsymbols - The number of symbols in the symbol table.
- *
- * Returned Value:
- *   None
- *
- ****************************************************************************/
-
-#ifdef __KERNEL__
-void mod_setsymtab(FAR const struct symtab_s *symtab, int nsymbols);
-#endif
-
 /****************************************************************************
  * Name: insmod
  *
@@ -178,24 +64,26 @@ void mod_setsymtab(FAR const struct symtab_s *symtab, int nsymbols);
  *   Verify that the file is an ELF module binary and, if so, load the
  *   module into kernel memory and initialize it for use.
  *
- *   NOTE: mod_setsymtab had to have been called in board-specific OS logic
+ *   NOTE: modlib_setsymtab had to have been called in board-specific OS logic
  *   prior to calling this function from application logic (perhaps via
  *   boardctl(BOARDIOC_OS_SYMTAB).  Otherwise, insmod will be unable to
  *   resolve symbols in the OS module.
  *
  * Input Parameters:
  *
- *   filename   - Full path to the module binary to be loaded
- *   modulename - The name that can be used to refer to the module after
+ *   filename - Full path to the module binary to be loaded
+ *   modname  - The name that can be used to refer to the module after
  *     it has been loaded.
  *
  * Returned Value:
- *   Zero (OK) on success.  On any failure, -1 (ERROR) is returned the
- *   errno value is set appropriately.
+ *   A non-NULL module handle that can be used on subsequent calls to other
+ *   module interfaces is returned on success.  If insmod() was unable to
+ *   load the module insmod() will return a NULL handle and the errno
+ *   variable will be set appropriately.
  *
  ****************************************************************************/
 
-int insmod(FAR const char *filename, FAR const char *modulename);
+FAR void *insmod(FAR const char *filename, FAR const char *modname);
 
 /****************************************************************************
  * Name: rmmod
@@ -204,9 +92,7 @@ int insmod(FAR const char *filename, FAR const char *modulename);
  *   Remove a previously installed module from memory.
  *
  * Input Parameters:
- *
- *   modulename - The module name.  This is the name module name that was
- *     provided to insmod when the module was loaded.
+ *   handle - The module handler previously returned by insmod().
  *
  * Returned Value:
  *   Zero (OK) on success.  On any failure, -1 (ERROR) is returned the
@@ -214,33 +100,55 @@ int insmod(FAR const char *filename, FAR const char *modulename);
  *
  ****************************************************************************/
 
-int rmmod(FAR const char *modulename);
+int rmmod(FAR void *handle);
 
 /****************************************************************************
- * Name: mod_registry_foreach
+ * Name: modsym
  *
  * Description:
- *   Visit each module in the registry.  This is an internal OS interface and
- *   not available for use by applications.
+ *   modsym() returns the address of a symbol defined within the object that
+ *   was previously made accessible through a insmod() call.  handle is the
+ *   value returned from a call to insmod() (and which has not since been
+ *   released via a call to rmmod()), name is the symbol's name as a
+ *   character string.
+ *
+ *   The returned symbol address will remain valid until rmmod() is called.
  *
  * Input Parameters:
- *   callback - This callback function was be called for each entry in the
- *     registry.
- *   arg - This opaque argument will be passed to the callback function.
+ *   handle - The opaque, non-NULL value returned by a previous successful
+ *            call to insmod().
+ *   name   - A pointer to the symbol name string.
  *
  * Returned Value:
- *   This function normally returns zero (OK).  If, however, any callback
- *   function returns a non-zero value, the traversal will be terminated and
- *   that non-zero value will be returned.
+ *   The address associated with the symbol is returned on success.
+ *   If handle does not refer to a valid module opened by insmod(), or if
+ *   the named symbol cannot be found within any of the objects associated
+ *   with handle, modsym() will return NULL and the errno variable will be
+ *   set appropriately.
  *
- * Assumptions:
- *   The caller does NOT hold the lock on the module registry.
+ ****************************************************************************/
+
+FAR const void *modsym(FAR void *handle, FAR const char *name);
+
+/****************************************************************************
+ * Name: modhandle
+ *
+ * Description:
+ *   modhandle() returns the module handle for the installed module with the
+ *   provided name.  A secondary use of this function is to determin if a
+ *   module has been loaded or not.
+ *
+ * Input Parameters:
+ *   name   - A pointer to the module name string.
+ *
+ * Returned Value:
+ *   The non-NULL module handle previously returned by insmod() is returned
+ *   on success.  If no module with that name is installed, modhandle() will
+ *   return a NULL handle and the errno variable will be set appropriately.
  *
  ****************************************************************************/
 
-#ifdef __KERNEL__
-int mod_registry_foreach(mod_callback_t callback, FAR void *arg);
-#endif
+FAR void *modhandle(FAR const char *name);
 
 #undef EXTERN
 #if defined(__cplusplus)
diff --git a/include/nuttx/configdata.h b/include/nuttx/mtd/configdata.h
similarity index 96%
rename from include/nuttx/configdata.h
rename to include/nuttx/mtd/configdata.h
index 60539993aaea92f264556026e4f6d50f9a698197..65965c61959516ffc7434268ed302aa289b72277 100644
--- a/include/nuttx/configdata.h
+++ b/include/nuttx/mtd/configdata.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * include/nuttx/configdata.h
+ * include/nuttx/mtd/configdata.h
  *
  *   Copyright (C) 2013 Ken Pettit. All rights reserved.
  *   Author: Ken Pettit 
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __INCLUDE_NUTTX_CONFIGDATA_H
-#define __INCLUDE_NUTTX_CONFIGDATA_H
+#ifndef __INCLUDE_NUTTX_MTD_CONFIGDATA_H
+#define __INCLUDE_NUTTX_MTD_CONFIGDATA_H
 
 /* The configdata device details kernel level services for providing
  * application config data from kernel control objects, such as partitions
@@ -133,4 +133,4 @@ int mtdconfig_register(FAR struct mtd_dev_s *mtd);
 }
 #endif
 
-#endif /* __INCLUDE_NUTTX_CONFIGDATA_H */
+#endif /* __INCLUDE_NUTTX_MTD_CONFIGDATA_H */
diff --git a/include/nuttx/mtd/mtd.h b/include/nuttx/mtd/mtd.h
index 8d1ee6db7056f1f52baf957a26021cc349784212..d0b8ab3ed73ec1ec91455ac2c2a391d4bfca712f 100644
--- a/include/nuttx/mtd/mtd.h
+++ b/include/nuttx/mtd/mtd.h
@@ -298,17 +298,6 @@ FAR struct mtd_dev_s *mtd_rwb_initialize(FAR struct mtd_dev_s *mtd);
 
 int ftl_initialize(int minor, FAR struct mtd_dev_s *mtd);
 
-/****************************************************************************
- * Name: flash_eraseall
- *
- * Description:
- *   Call a block driver with the MTDIOC_BULKERASE ioctl command.  This will
- *   cause the MTD driver to erase all of the flash.
- *
- ****************************************************************************/
-
-int flash_eraseall(FAR const char *driver);
-
 /****************************************************************************
  * Name: smart_initialize
  *
@@ -412,6 +401,16 @@ void at24c_uninitialize(FAR struct mtd_dev_s *mtd);
 
 FAR struct mtd_dev_s *at25_initialize(FAR struct spi_dev_s *dev);
 
+/****************************************************************************
+ * Name: is25xp
+ *
+ * Description:
+ *   Initializes the driver for SPI-based IS25xP FLASH
+ *
+ ****************************************************************************/
+
+FAR struct mtd_dev_s *is25xp_initialize(FAR struct spi_dev_s *dev);
+
 /****************************************************************************
  * Name: m25p_initialize
  *
@@ -516,7 +515,7 @@ FAR struct mtd_dev_s *w25_initialize(FAR struct spi_dev_s *dev);
  * Name: s25fl1_initialize
  *
  * Description:
- *   Create an initialize MTD device instance for the QuadSPI-based ST24FL1
+ *   Create an initialized MTD device instance for the QuadSPI-based ST24FL1
  *   FLASH part.
  *
  ****************************************************************************/
@@ -525,11 +524,22 @@ struct qspi_dev_s; /* Forward reference */
 FAR struct mtd_dev_s *s25fl1_initialize(FAR struct qspi_dev_s *qspi,
                                         bool unprotect);
 
+/****************************************************************************
+ * Name: mx25l_initialize_spi
+ *
+ * Description:
+ *   Create an initialized MTD device instance for the SPI-based MX25Lx
+ *   FLASH part.
+ *
+ ****************************************************************************/
+
+FAR struct mtd_dev_s *mx25l_initialize_spi(FAR struct spi_dev_s *dev);
+
 /****************************************************************************
  * Name: n25qxxx_initialize
  *
  * Description:
- *   Create an initialize MTD device instance for the QuadSPI-based N25Qxxx
+ *   Create an initialized MTD device instance for the QuadSPI-based N25Qxxx
  *   FLASH part from Micron.
  *
  ****************************************************************************/
diff --git a/include/nuttx/net/arp.h b/include/nuttx/net/arp.h
index cf04895f7678200b0da6729c1ebc4378fb701451..4a33994a1b77a59661250edb4a34f3c57db6c719 100644
--- a/include/nuttx/net/arp.h
+++ b/include/nuttx/net/arp.h
@@ -137,7 +137,7 @@ extern "C"
  ****************************************************************************/
 
 #ifdef CONFIG_NET_ARP_IPIN
-void arp_ipin(struct net_driver_s *dev);
+void arp_ipin(FAR struct net_driver_s *dev);
 #else
 # define arp_ipin(dev)
 #endif
@@ -152,20 +152,20 @@ void arp_ipin(struct net_driver_s *dev);
  *   that we previously sent out, the ARP cache will be filled in with
  *   the values from the ARP reply.  If the incoming ARP packet is an ARP
  *   request for our IP address, an ARP reply packet is created and put
- *   into the d_buf[] buffer.
+ *   into the d_buf buffer.
  *
  *   On entry, this function expects that an ARP packet with a prepended
- *   Ethernet header is present in the d_buf[] buffer and that the length of
+ *   Ethernet header is present in the d_buf buffer and that the length of
  *   the packet is set in the d_len field.
  *
  *   When the function returns, the value of the field d_len indicates whether
  *   the device driver should send out the ARP reply packet or not. If d_len
  *   is zero, no packet should be sent; If d_len is non-zero, it contains the
- *   length of the outbound packet that is present in the d_buf[] buffer.
+ *   length of the outbound packet that is present in the d_buf buffer.
  *
  ****************************************************************************/
 
-void arp_arpin(struct net_driver_s *dev);
+void arp_arpin(FAR struct net_driver_s *dev);
 
 /****************************************************************************
  * Name: arp_out
@@ -183,13 +183,13 @@ void arp_arpin(struct net_driver_s *dev);
  *   beginning of the packet and the function returns.
  *
  *   If no ARP cache entry is found for the destination IIPv4P address, the
- *   packet in the d_buf[] is replaced by an ARP request packet for the
+ *   packet in the d_buf is replaced by an ARP request packet for the
  *   IPv4 address. The IPv4 packet is dropped and it is assumed that the
  *   higher level protocols (e.g., TCP) eventually will retransmit the
  *   dropped packet.
  *
  *   Upon return in either the case, a packet to be sent is present in the
- *   d_buf[] buffer and the d_len field holds the length of the Ethernet
+ *   d_buf buffer and the d_len field holds the length of the Ethernet
  *   frame that should be transmitted.
  *
  ****************************************************************************/
diff --git a/include/nuttx/net/iob.h b/include/nuttx/net/iob.h
index b9ff53d78c9d5d83bb4f89ff0283b2555e602cba..2ac74dceb851c4a74a36ae4638d8465385408c42 100644
--- a/include/nuttx/net/iob.h
+++ b/include/nuttx/net/iob.h
@@ -410,7 +410,7 @@ int iob_contig(FAR struct iob_s *iob, unsigned int len);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 void iob_dump(FAR const char *msg, FAR struct iob_s *iob, unsigned int len,
               unsigned int offset);
 #else
diff --git a/include/nuttx/net/mii.h b/include/nuttx/net/mii.h
index 9d10beb32f246d889de7e76652d2d2b57322be62..d595202738b9d6a38ddbd170474d44d1fb824c38 100644
--- a/include/nuttx/net/mii.h
+++ b/include/nuttx/net/mii.h
@@ -547,7 +547,7 @@
 #define MII_KSZ80x1_INT_LU           (1 << 0)  /* Link up interrupt */
 
 /* KSZ8041 Register 0x1e: PHY Control 1 -- To be provided */
-/* KSZ8041 Register 0x1e: PHY Control 2 */
+/* KSZ8041 Register 0x1f: PHY Control 2 */
 
 #define MII_PHYCTRL2_MDIX            (1 << 15) /* Bit 15: Micrel/HP MDI/MDI-X state */
 #define MII_PHYCTRL2_MDIX_SEL        (1 << 14) /* Bit 14: MDI/MDI-X select */
diff --git a/include/nuttx/net/net.h b/include/nuttx/net/net.h
index 4fadfd2c8fea2d2c0469b73e19a244c607292f5f..54f5c83273c224704beb8a8da8cac9dfc817d88c 100644
--- a/include/nuttx/net/net.h
+++ b/include/nuttx/net/net.h
@@ -49,10 +49,6 @@
 #include 
 #include 
 
-#ifndef CONFIG_NET_NOINTS
-#  include 
-#endif
-
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
@@ -142,24 +138,6 @@ struct socketlist
 struct net_driver_s; /* Forward reference. Defined in nuttx/net/netdev.h */
 typedef int (*netdev_callback_t)(FAR struct net_driver_s *dev, FAR void *arg);
 
-#ifdef CONFIG_NET_NOINTS
-/* Semaphore based locking for non-interrupt based logic.
- *
- * net_lock_t -- Not used.  Only for compatibility
- */
-
-typedef uint8_t net_lock_t; /* Not really used */
-
-#else
-
-/* Enable/disable locking for interrupt based logic:
- *
- * net_lock_t -- The processor specific representation of interrupt state.
- */
-
-#  define net_lock_t        irqstate_t
-#endif
-
 /****************************************************************************
  * Public Data
  ****************************************************************************/
@@ -221,27 +199,15 @@ void net_setup(void);
 void net_initialize(void);
 
 /****************************************************************************
- * Critical section management.  The NuttX configuration setting
- * CONFIG_NET_NOINTS indicates that the network stack not called from the
- * interrupt level.  If CONFIG_NET_NOINTS is defined, then these will map
- * to semaphore controls.  Otherwise, it assumed that the stack will be
- * called from interrupt level handling and these will map to interrupt
- * enable/disable controls.
- *
+ * Critical section management.
  *
- * If CONFIG_NET_NOINTS is defined, then semaphore based locking is used:
+ * Semaphore based locking is used:
  *
  *   net_lock()          - Takes the semaphore().  Implements a re-entrant mutex.
  *   net_unlock()        - Gives the semaphore().
  *   net_lockedwait()    - Like pthread_cond_wait(); releases the semaphore
  *                         momentarily to wait on another semaphore()
  *
- * Otherwise, interrupt based locking is used:
- *
- *   net_lock()          - Disables interrupts.
- *   net_unlock()        - Conditionally restores interrupts.
- *   net_lockedwait()    - Just wait for the semaphore.
- *
  ****************************************************************************/
 
 /****************************************************************************
@@ -252,11 +218,7 @@ void net_initialize(void);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_NET_NOINTS
-net_lock_t net_lock(void);
-#else
-#  define net_lock() enter_critical_section()
-#endif
+void net_lock(void);
 
 /****************************************************************************
  * Function: net_unlock
@@ -266,11 +228,7 @@ net_lock_t net_lock(void);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_NET_NOINTS
-void net_unlock(net_lock_t flags);
-#else
-#  define net_unlock(f) leave_critical_section(f)
-#endif
+void net_unlock(void);
 
 /****************************************************************************
  * Function: net_timedwait
@@ -290,12 +248,8 @@ void net_unlock(net_lock_t flags);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_NET_NOINTS
 struct timespec;
 int net_timedwait(sem_t *sem, FAR const struct timespec *abstime);
-#else
-#  define net_timedwait(s,t) sem_timedwait(s,t)
-#endif
 
 /****************************************************************************
  * Function: net_lockedwait
@@ -313,11 +267,7 @@ int net_timedwait(sem_t *sem, FAR const struct timespec *abstime);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_NET_NOINTS
 int net_lockedwait(sem_t *sem);
-#else
-#  define net_lockedwait(s) sem_wait(s)
-#endif
 
 /****************************************************************************
  * Function: net_setipid
@@ -968,6 +918,39 @@ int psock_getsockopt(FAR struct socket *psock, int level, int option,
 int psock_setsockopt(FAR struct socket *psock, int level, int option,
                      FAR const void *value, socklen_t value_len);
 
+/****************************************************************************
+ * Name: psock_ioctl
+ *
+ * Description:
+ *   Perform network device specific operations.
+ *
+ * Parameters:
+ *   psock    A pointer to a NuttX-specific, internal socket structure
+ *   cmd      The ioctl command
+ *   arg      The argument of the ioctl cmd
+ *
+ * Return:
+ *   >=0 on success (positive non-zero values are cmd-specific)
+ *   On a failure, -1 is returned with errno set appropriately
+ *
+ *   EBADF
+ *     'psock' is not a valid, connected socket structure.
+ *   EFAULT
+ *     'arg' references an inaccessible memory area.
+ *   ENOTTY
+ *     'cmd' not valid.
+ *   EINVAL
+ *     'arg' is not valid.
+ *   ENOTTY
+ *     'sockfd' is not associated with a network device.
+ *   ENOTTY
+ *      The specified request does not apply to the kind of object that the
+ *      descriptor 'sockfd' references.
+ *
+ ****************************************************************************/
+
+int psock_ioctl(FAR struct socket *psock, int cmd, unsigned long arg);
+
 /****************************************************************************
  * Name: netdev_ioctl
  *
@@ -984,7 +967,7 @@ int psock_setsockopt(FAR struct socket *psock, int level, int option,
  *   On a failure, -1 is returned with errno set appropriately
  *
  *   EBADF
- *     'sockfd' is not a valid descriptor.
+ *     'sockfd' is not a valid socket descriptor.
  *   EFAULT
  *     'arg' references an inaccessible memory area.
  *   ENOTTY
diff --git a/include/nuttx/net/netdev.h b/include/nuttx/net/netdev.h
index 7ef7cc62d75b1a256dc879bf9c602cd86bccd7f5..aceab4d083d52b032b28a2d0f242f348a18b85e5 100644
--- a/include/nuttx/net/netdev.h
+++ b/include/nuttx/net/netdev.h
@@ -227,23 +227,19 @@ struct net_driver_s
   net_ipv6addr_t d_ipv6netmask; /* Network IPv6 subnet mask */
 #endif
 
-  /* The d_buf array is used to hold incoming and outgoing packets. The device
-   * driver should place incoming data into this buffer. When sending data,
-   * the device driver should read the link level headers and the TCP/IP
-   * headers from this buffer. The size of the link level headers is
+  /* The d_buf array is used to hold incoming and outgoing packets. The
+   * device driver should place incoming data into this buffer. When sending
+   * data, the device driver should read the link level headers and the
+   * TCP/IP headers from this buffer. The size of the link level headers is
    * configured by the NET_LL_HDRLEN(dev) define.
    *
    * The network will handle only a single buffer for both incoming and
-   * outgoing packets.  However, the driver design may be concurrently send
-   * and filling separate, break-off buffers if CONFIG_NET_MULTIBUFFER is
-   * defined.  That buffer management must be controlled by the driver.
+   * outgoing packets.  However, the driver design may be concurrently
+   * sending and filling separate, break-off buffers.  That buffer
+   * management must be controlled by the driver.
    */
 
-#ifdef CONFIG_NET_MULTIBUFFER
-  uint8_t *d_buf;
-#else
-  uint8_t d_buf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
-#endif
+  FAR uint8_t *d_buf;
 
   /* d_appdata points to the location where application data can be read from
    * or written to in the the packet buffer.
diff --git a/include/nuttx/net/slip.h b/include/nuttx/net/slip.h
index 1fb2e46514c50aa0d69aa5545c7c3f8cbf6c2e08..546781f85fdc21bd8fc1f0e0720a3fc15047f3f1 100644
--- a/include/nuttx/net/slip.h
+++ b/include/nuttx/net/slip.h
@@ -51,12 +51,7 @@
  * Pre-processor Definitions
  ****************************************************************************/
 /* Configuration ***********************************************************/
-/* Dependencies:
- *
- *   CONFIG_NET_NOINTS - Required.
- *   CONFIG_NET_MULTIBUFFER - Required.
- *
- * SLIP Configuration:
+/* SLIP Configuration:
  *
  *   CONFIG_NET_SLIP - Enables building of the SLIP driver
  *   CONFIG_NET_SLIP_STACKSIZE - Provides the stack size for SLIP RX and TX
diff --git a/include/nuttx/nx/nx.h b/include/nuttx/nx/nx.h
index 5f6c02a4811cf7386997f4ea2b0d47520216ab38..0650128bcce99976420459b7e5eac4753a62d604 100644
--- a/include/nuttx/nx/nx.h
+++ b/include/nuttx/nx/nx.h
@@ -64,7 +64,7 @@
 
 /* Default server MQ name used by nx_run() macro */
 
-#define NX_DEFAULT_SERVER_MQNAME "/dev/nxs"
+#define NX_DEFAULT_SERVER_MQNAME "nxs"
 
 /* Mouse button bits */
 
@@ -287,6 +287,9 @@ int nx_runinstance(FAR const char *mqname, FAR NX_DRIVERTYPE *dev);
  *   work in the NuttX kernel build because the resources required by the
  *   NX server are private to the kernel mode logic.
  *
+ *   nx_start() can be called (indirectly) from applications via the
+ *   boardctl() interface with the BOARDIOC_NX_START command.
+ *
  * Input Parameters:
  *   None
  *
@@ -300,7 +303,7 @@ int nx_runinstance(FAR const char *mqname, FAR NX_DRIVERTYPE *dev);
  *
  ****************************************************************************/
 
-#if defined(CONFIG_NX_MULTIUSER) && defined(CONFIG_NX_NXSTART)
+#ifdef CONFIG_NX_MULTIUSER
 int nx_start(void);
 #endif
 
diff --git a/include/nuttx/nx/nxfonts.h b/include/nuttx/nx/nxfonts.h
index 5a5d81e04bca4bf5159995c27a0cad4a91c180b4..525a5f56a243a3ea25af63db1e31b5abda669196 100644
--- a/include/nuttx/nx/nxfonts.h
+++ b/include/nuttx/nx/nxfonts.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * include/nuttx/nx/nxfonts.h
  *
- *   Copyright (C) 2008, 2009, 2011, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008, 2009, 2011, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -50,6 +50,8 @@
 /****************************************************************************
  * Pre-processor definitions
  ****************************************************************************/
+
+/* Font Definitions *********************************************************/
 /* Select the default font.  If no fonts are selected, then a compilation
  * error is likely down the road.
  */
@@ -124,82 +126,88 @@
 /* X11 misc fixed fonts */
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_4X6)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_4X6
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_4X6
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_5X7)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_5X7
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_5X7
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_5X8)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_5X8
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_5X8
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_6X9)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_6X9
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_6X9
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_6X10)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_6X10
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_6X10
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_6X12)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_6X12
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_6X12
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_6X13)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_6X13
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_6X13
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_6X13B)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_6X13B
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_6X13B
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_6X13O)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_6X13O
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_6X13O
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_7X13)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_7X13
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_7X13
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_7X13B)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_7X13B
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_7X13B
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_7X13O)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_7X13O
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_7X13O
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_7X14)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_7X14
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_7X14
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_7X14B)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_7X14B
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_7X14B
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_8X13)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_8X13
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_8X13
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_8X13B)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_8X13B
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_8X13B
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_8X13O)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_8X13O
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_8X13O
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_9X15)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_9X15
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_9X15
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_9X15B)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_9X15B
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_9X15B
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_9X18)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_9X18
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_9X18
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_9X18B)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_9X18B
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_9X18B
 
 #elif defined(CONFIG_NXFONT_X11_MISC_FIXED_10X20)
-# define NXFONT_DEFAULT CONFIG_NXFONT_X11_MISC_FIXED_10X20
+# define NXFONT_DEFAULT FONTID_X11_MISC_FIXED_10X20
 
 /* Mono-space fonts */
 
 #elif defined(CONFIG_NXFONT_MONO5X8)
 # define NXFONT_DEFAULT FONTID_MONO5X8
 
+/* Tom Thumb mono-space 4x6 font */
+
+#elif defined(CONFIG_NXFONT_TOM_THUMB_4X6)
+# define NXFONT_DEFAULT FONTID_TOM_THUMB_4X6
+
 #endif
 
 /****************************************************************************
  * Public Types
  ****************************************************************************/
 
+/* Font Types ***************************************************************/
 /* Font IDs */
 
 enum nx_fontid_e
@@ -387,6 +395,10 @@ enum nx_fontid_e
 #ifdef CONFIG_NXFONT_X11_MISC_FIXED_10X20
   , FONTID_X11_MISC_FIXED_10X20 = 42    /* X11 misc fixed 10x20 */
 #endif
+
+#ifdef CONFIG_NXFONT_TOM_THUMB_4X6
+  , FONTID_TOM_THUMB_4X6 = 43           /* Tom Thumb monospace 4x6 */
+#endif
 };
 
 /* This structures provides the metrics for one glyph */
@@ -443,6 +455,25 @@ struct nx_fontpackage_s
 #endif
 };
 
+/* Font Cache ***************************************************************/
+/* Opaque handle used to reference a font cache */
+
+typedef FAR void *FCACHE;
+
+/* Describes one cached font glyph */
+
+struct nxfonts_glyph_s
+{
+  FAR struct nxfonts_glyph_s *flink;   /* Implements a singly linked list */
+  uint8_t code;                        /* Character code */
+  uint8_t height;                      /* Height of this glyph (in rows) */
+  uint8_t width;                       /* Width of this glyph (in pixels) */
+  uint8_t stride;                      /* Width of the glyph row (in bytes) */
+  FAR uint8_t bitmap[1];               /* Bitmap memory, actual size varies */
+};
+
+#define SIZEOF_NXFONTS_GLYPH_S(b) (sizeof(struct nxfonts_glyph_s) + (b) - 1)
+
 /****************************************************************************
  * Public Data
  ****************************************************************************/
@@ -470,6 +501,9 @@ extern "C"
  * Input Parameters:
  *   fontid:  Identifies the font set to get
  *
+ * Returned Value:
+ *   One success, a non-NULL font handle is returned.
+ *
  ****************************************************************************/
 
 NXHANDLE nxf_getfonthandle(enum nx_fontid_e fontid);
@@ -554,6 +588,87 @@ int nxf_convert_32bpp(FAR uint32_t *dest, uint16_t height,
                       FAR const struct nx_fontbitmap_s *bm,
                       nxgl_mxpixel_t color);
 
+/****************************************************************************
+ * Name: nxf_cache_connect
+ *
+ * Description:
+ *   Create a new font cache for the provided 'fontid'.  If the cache
+ *   already, then just increment a reference count return the handle for
+ *   the existing font cache.
+ *
+ * Input Parameters:
+ *   fontid    - Identifies the font supported by this cache
+ *   fgcolor   - Foreground color
+ *   bgcolor   - Background color
+ *   bpp       - Bits per pixel
+ *   maxglyphs - Maximum number of glyphs permitted in the cache
+ *
+ * Returned value:
+ *   On success a non-NULL handle is returned that then may sequently be
+ *   used with nxf_getglyph() to extract fonts from the font cache.  NULL
+ *   returned on any failure with the errno value set to indicate the nature
+ *   of the error.
+ *
+ ****************************************************************************/
+
+FCACHE nxf_cache_connect(enum nx_fontid_e fontid,
+                         nxgl_mxpixel_t fgcolor, nxgl_mxpixel_t bgcolor,
+                         int bpp, int maxglyph);
+
+/****************************************************************************
+ * Name: nxf_cache_disconnect
+ *
+ * Description:
+ *   Decrement the reference count on the font cache and, if the reference
+ *   count goes to zero, free all resources used by the font cache.  The
+ *   font handler is invalid upon return in either case.
+ *
+ * Input Parameters:
+ *   fhandle - A font cache handler previously returned by nxf_cache_connect();
+ *
+ * Returned value:
+ *   None
+ *
+ ****************************************************************************/
+
+void nxf_cache_disconnect(FCACHE fhandle);
+
+/****************************************************************************
+ * Name: nxf_cache_getfonthandle
+ *
+ * Description:
+ *   Return the handle to the font set used by this instance of the font
+ *   cache.
+ *
+ * Input Parameters:
+ *   fhandle - A font cache handle previously returned by nxf_cache_connect();
+ *
+ * Returned value:
+ *   Zero (OK) is returned if the metrics were
+ *
+ * Returned Value:
+ *   One success, a non-NULL font handle is returned.
+ *
+ ****************************************************************************/
+
+NXHANDLE nxf_cache_getfonthandle(FCACHE fhandle);
+
+/****************************************************************************
+ * Name: nxf_cache_getglyph
+ *
+ * Description:
+ *   Get the font glyph for the character code 'ch' from the font cache.  If
+ *   the glyph for that character code does not exist in the font cache, it
+ *   be rendered.
+ *
+ * Returned Value:
+ *   On success, a non-NULL pointer to the rendered glyph in the font cache
+ *   is returned.  NULL is returned on any failure.
+ *
+ ****************************************************************************/
+
+FAR const struct nxfonts_glyph_s *nxf_cache_getglyph(FCACHE fhandle, uint8_t ch);
+
 #undef EXTERN
 #if defined(__cplusplus)
 }
diff --git a/include/nuttx/nx/nxmu.h b/include/nuttx/nx/nxmu.h
index 49940aafd91a6358369dcf94c732af0f1f1398e0..ca8481ebafba4d852f566abaf3ad293f38e3d87b 100644
--- a/include/nuttx/nx/nxmu.h
+++ b/include/nuttx/nx/nxmu.h
@@ -71,8 +71,8 @@
 
 /* Used to create unique client MQ name */
 
-#define NX_CLIENT_MQNAMEFMT  "/dev/nxc%d"
-#define NX_CLIENT_MXNAMELEN  (16)
+#define NX_CLIENT_MQNAMEFMT  "nxc%d"
+#define NX_CLIENT_MXNAMELEN  (12)
 
 #define NX_MXSVRMSGLEN       (64) /* Maximum size of a client->server command */
 #define NX_MXEVENTLEN        (64) /* Maximum size of an event */
diff --git a/include/nuttx/poff.h b/include/nuttx/poff.h
index cda48805e4d41f19879593c34f65bb6d4d28c8e1..8b689df7fd2e9092b75061a09b7600c061f6c6b9 100644
--- a/include/nuttx/poff.h
+++ b/include/nuttx/poff.h
@@ -34,8 +34,8 @@
  *
  ****************************************************************************/
 
-#ifndef __INCLUDE_NUXX_POFF_H
-#define __INCLUDE_NUXX_POFF_H
+#ifndef __INCLUDE_NUTTX_POFF_H
+#define __INCLUDE_NUTTX_POFF_H
 
 /****************************************************************************
  * Included Files
@@ -432,4 +432,4 @@ struct poff_debugarginfo_s
 
 typedef struct poff_debugarginfo_s poff_debugarginfo_t;
 
-#endif /* __INCLUDE_NUXX_POFF_H */
+#endif /* __INCLUDE_NUTTX_POFF_H */
diff --git a/include/nuttx/power/relay.h b/include/nuttx/power/relay.h
index b1c32028b6ce5a200e7a9610a0efd2973b5b0442..8b450ea012447b94b99be2fe87bd5c5819b4c562 100644
--- a/include/nuttx/power/relay.h
+++ b/include/nuttx/power/relay.h
@@ -34,8 +34,8 @@
  *
  ****************************************************************************/
 
-#ifndef __CONFIGS_NUTTX_INCLUDE_RELAY_H
-#define __CONFIGS_NUTTX_INCLUDE_RELAY_H
+#ifndef __INCLUDE_NUTTX_POWER_RELAY_H
+#define __INCLUDE_NUTTX_POWER_RELAY_H
 
 /****************************************************************************
  * Included Files
@@ -62,4 +62,4 @@
  * Public Types
  ****************************************************************************/
 
-#endif  /* __CONFIGS_NUTTX_INCLUDE_RELAY_H */
+#endif  /* __INCLUDE_NUTTX_POWER_RELAY_H */
diff --git a/include/nuttx/pthread.h b/include/nuttx/pthread.h
index 54d5dc659bddf656d1912d9534e4b96fe79ace63..27fb5dd99c859dc2bb5d454833608cae5b2df52f 100644
--- a/include/nuttx/pthread.h
+++ b/include/nuttx/pthread.h
@@ -2,7 +2,7 @@
  * include/nuttx/pthread.h
  * Non-standard, NuttX-specific pthread-related declarations.
  *
- *   Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,6 +42,7 @@
  ****************************************************************************/
 
 #include 
+
 #include 
 #include 
 
diff --git a/include/nuttx/sched.h b/include/nuttx/sched.h
index 724be425cad13d26132babeebf741c0428924335..687d19dcf9b10b0871ee54ed4b39588ec9132c8b 100644
--- a/include/nuttx/sched.h
+++ b/include/nuttx/sched.h
@@ -141,16 +141,17 @@
 #  define TCB_FLAG_TTYPE_PTHREAD   (1 << TCB_FLAG_TTYPE_SHIFT)  /* User pthread */
 #  define TCB_FLAG_TTYPE_KERNEL    (2 << TCB_FLAG_TTYPE_SHIFT)  /* Kernel thread */
 #define TCB_FLAG_NONCANCELABLE     (1 << 2) /* Bit 2: Pthread is non-cancelable */
-#define TCB_FLAG_CANCEL_PENDING    (1 << 3) /* Bit 3: Pthread cancel is pending */
-#define TCB_FLAG_POLICY_SHIFT      (4) /* Bit 4-5: Scheduling policy */
+#define TCB_FLAG_CANCEL_DEFERRED   (1 << 3) /* Bit 3: Deferred (vs asynch) cancellation type */
+#define TCB_FLAG_CANCEL_PENDING    (1 << 4) /* Bit 4: Pthread cancel is pending */
+#define TCB_FLAG_POLICY_SHIFT      (5) /* Bit 5-6: Scheduling policy */
 #define TCB_FLAG_POLICY_MASK       (3 << TCB_FLAG_POLICY_SHIFT)
 #  define TCB_FLAG_SCHED_FIFO      (0 << TCB_FLAG_POLICY_SHIFT) /* FIFO scheding policy */
 #  define TCB_FLAG_SCHED_RR        (1 << TCB_FLAG_POLICY_SHIFT) /* Round robin scheding policy */
 #  define TCB_FLAG_SCHED_SPORADIC  (2 << TCB_FLAG_POLICY_SHIFT) /* Sporadic scheding policy */
 #  define TCB_FLAG_SCHED_OTHER     (3 << TCB_FLAG_POLICY_SHIFT) /* Other scheding policy */
-#define TCB_FLAG_CPU_LOCKED        (1 << 6) /* Bit 6: Locked to this CPU */
-#define TCB_FLAG_EXIT_PROCESSING   (1 << 7) /* Bit 7: Exitting */
-                                            /* Bits 8-15: Available */
+#define TCB_FLAG_CPU_LOCKED        (1 << 7) /* Bit 7: Locked to this CPU */
+#define TCB_FLAG_EXIT_PROCESSING   (1 << 8) /* Bit 8: Exitting */
+                                            /* Bits 9-15: Available */
 
 /* Values for struct task_group tg_flags */
 
@@ -322,6 +323,17 @@ struct child_status_s
 };
 #endif
 
+/* struct pthread_cleanup_s ******************************************************/
+/* This structure describes one element of the pthread cleanup stack */
+
+#ifdef CONFIG_PTHREAD_CLEANUP
+struct pthread_cleanup_s
+{
+   pthread_cleanup_t pc_cleaner;    /* Cleanup callback address */
+   FAR void *pc_arg;                /* Argument that accompanies the callback */
+};
+#endif
+
 /* struct dspace_s ***************************************************************/
 /* This structure describes a reference counted D-Space region.  This must be a
  * separately allocated "break-away" structure that can be owned by a task and
@@ -422,12 +434,23 @@ struct task_group_s
 # endif
 #endif
 
-#if defined(CONFIG_SCHED_HAVE_PARENT) && defined(CONFIG_SCHED_CHILD_STATUS)
+#ifdef CONFIG_SCHED_HAVE_PARENT
   /* Child exit status **********************************************************/
 
+#ifdef CONFIG_SCHED_CHILD_STATUS
   FAR struct child_status_s *tg_children; /* Head of a list of child status     */
 #endif
 
+#ifndef HAVE_GROUP_MEMBERS
+  /* REVISIT: What if parent thread exits?  Should use tg_pgid. */
+
+  pid_t    tg_ppid;                 /* This is the ID of the parent thread      */
+#ifndef CONFIG_SCHED_CHILD_STATUS
+  uint16_t tg_nchildren;            /* This is the number active children       */
+#endif
+#endif /* HAVE_GROUP_MEMBERS */
+#endif /* CONFIG_SCHED_HAVE_PARENT */
+
 #if defined(CONFIG_SCHED_WAITPID) && !defined(CONFIG_SCHED_HAVE_PARENT)
   /* waitpid support ************************************************************/
   /* Simple mechanism used only when there is no support for SIGCHLD            */
@@ -537,19 +560,10 @@ struct tcb_s
   /* Task Management Fields *****************************************************/
 
   pid_t    pid;                          /* This is the ID of the thread        */
-
-#ifdef CONFIG_SCHED_HAVE_PARENT          /* Support parent-child relationship   */
-#ifndef HAVE_GROUP_MEMBERS               /* Don't know pids of group members    */
-  pid_t    ppid;                         /* This is the ID of the parent thread */
-#ifndef CONFIG_SCHED_CHILD_STATUS        /* Retain child thread status          */
-  uint16_t nchildren;                    /* This is the number active children  */
-#endif
-#endif
-#endif /* CONFIG_SCHED_HAVE_PARENT */
-
   start_t  start;                        /* Thread start function               */
   entry_t  entry;                        /* Entry Point into the thread         */
   uint8_t  sched_priority;               /* Current priority of the thread      */
+  uint8_t  init_priority;                /* Initial priority of the thread      */
 
 #ifdef CONFIG_PRIORITY_INHERITANCE
 #if CONFIG_SEM_NNESTPRIO > 0
@@ -569,6 +583,9 @@ struct tcb_s
 #ifdef CONFIG_SMP
   int16_t  irqcount;                     /* 0=interrupts enabled                */
 #endif
+#ifdef CONFIG_CANCELLATION_POINTS
+  int16_t  cpcount;                      /* Nested cancellation point count     */
+#endif
 
 #if CONFIG_RR_INTERVAL > 0 || defined(CONFIG_SCHED_SPORADIC)
   int32_t  timeslice;                    /* RR timeslice OR Sporadic budget     */
@@ -653,9 +670,8 @@ struct task_tcb_s
   FAR void *starthookarg;                /* The argument passed to the function */
 #endif
 
-  /* Values needed to restart a task ********************************************/
+  /* [Re-]start name + start-up parameters **************************************/
 
-  uint8_t  init_priority;                /* Initial priority of the task        */
   FAR char **argv;                       /* Name+start-up parameters            */
 };
 
@@ -681,6 +697,17 @@ struct pthread_tcb_s
   pthread_addr_t arg;                    /* Startup argument                    */
   FAR void *joininfo;                    /* Detach-able info to support join    */
 
+  /* Clean-up stack *************************************************************/
+
+#ifdef CONFIG_PTHREAD_CLEANUP
+  /* tos   - The index to the next avaiable entry at the top of the stack.
+   * stack - The pre-allocated clean-up stack memory.
+   */
+
+  uint8_t tos;
+  struct pthread_cleanup_s stack[CONFIG_PTHREAD_CLEANUP_STACKSIZE];
+#endif
+
   /* POSIX Thread Specific Data *************************************************/
 
 #if CONFIG_NPTHREAD_KEYS > 0
diff --git a/include/nuttx/sched_note.h b/include/nuttx/sched_note.h
index c21f0400660c01e768dc4ab390f5bff3e5c44891..5d935ce01668f130f8d02adb1d990332c6000c93 100644
--- a/include/nuttx/sched_note.h
+++ b/include/nuttx/sched_note.h
@@ -50,6 +50,22 @@
 
 #ifdef CONFIG_SCHED_INSTRUMENTATION
 
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Provide defaults for some configuration settings (could be undefined with
+ * old configuration files)
+ */
+
+#ifndef CONFIG_SCHED_INSTRUMENTATION_CPUSET
+#  define CONFIG_SCHED_INSTRUMENTATION_CPUSET 0xffff
+#endif
+
+#ifndef CONFIG_SCHED_NOTE_BUFSIZE
+#  define CONFIG_SCHED_NOTE_BUFSIZE 2048
+#endif
+
 /****************************************************************************
  * Public Types
  ****************************************************************************/
@@ -60,19 +76,35 @@
 
 enum note_type_e
 {
-  NOTE_START = 0,
-  NOTE_STOP,
-  NOTE_SUSPEND,
-  NOTE_RESUME
+  NOTE_START           = 0,
+  NOTE_STOP            = 1,
+  NOTE_SUSPEND         = 2,
+  NOTE_RESUME          = 3
+#ifdef CONFIG_SMP
+  ,
+  NOTE_CPU_START       = 4,
+  NOTE_CPU_STARTED     = 5,
+  NOTE_CPU_PAUSE       = 6,
+  NOTE_CPU_PAUSED      = 7,
+  NOTE_CPU_RESUME      = 8,
+  NOTE_CPU_RESUMED     = 9
+#endif
 #ifdef CONFIG_SCHED_INSTRUMENTATION_PREEMPTION
   ,
-  NOTE_PREEMPT_LOCK,
-  NOTE_PREEMPT_UNLOCK
+  NOTE_PREEMPT_LOCK    = 10,
+  NOTE_PREEMPT_UNLOCK  = 11
 #endif
 #ifdef CONFIG_SCHED_INSTRUMENTATION_CSECTION
   ,
-  NOTE_CSECTION_ENTER,
-  NOTE_CSECTION_LEAVE
+  NOTE_CSECTION_ENTER  = 12,
+  NOTE_CSECTION_LEAVE  = 13
+#endif
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+  ,
+  NOTE_SPINLOCK_LOCK   = 14,
+  NOTE_SPINLOCK_LOCKED = 15,
+  NOTE_SPINLOCK_UNLOCK = 16,
+  NOTE_SPINLOCK_ABORT  = 17
 #endif
 };
 
@@ -87,7 +119,7 @@ struct note_common_s
   uint8_t nc_cpu;              /* CPU thread/task running on */
 #endif
   uint8_t nc_pid[2];           /* ID of the thread/task */
-  uint8_t nc_systime[4];       /* Time when note buffered */
+  uint8_t nc_systime[4];       /* Time when note was buffered */
 };
 
 /* This is the specific form of the NOTE_START note */
@@ -122,6 +154,54 @@ struct note_resume_s
   struct note_common_s nre_cmn; /* Common note parameters */
 };
 
+#ifdef CONFIG_SMP
+
+/* This is the specific form of the NOTE_CPU_START note */
+
+struct note_cpu_start_s
+{
+  struct note_common_s ncs_cmn; /* Common note parameters */
+  uint8_t ncs_target;           /* CPU being started */
+};
+
+/* This is the specific form of the NOTE_CPU_STARTED note */
+
+struct note_cpu_started_s
+{
+  struct note_common_s ncs_cmn; /* Common note parameters */
+};
+
+/* This is the specific form of the NOTE_CPU_PAUSE note */
+
+struct note_cpu_pause_s
+{
+  struct note_common_s ncp_cmn; /* Common note parameters */
+  uint8_t ncp_target;           /* CPU being paused */
+};
+
+/* This is the specific form of the NOTE_CPU_PAUSED note */
+
+struct note_cpu_paused_s
+{
+  struct note_common_s ncp_cmn; /* Common note parameters */
+};
+
+/* This is the specific form of the NOTE_CPU_RESUME note */
+
+struct note_cpu_resume_s
+{
+  struct note_common_s ncr_cmn; /* Common note parameters */
+  uint8_t ncr_target;           /* CPU being resumed */
+};
+
+/* This is the specific form of the NOTE_CPU_RESUMED note */
+
+struct note_cpu_resumed_s
+{
+  struct note_common_s ncr_cmn; /* Common note parameters */
+};
+#endif
+
 #ifdef CONFIG_SCHED_INSTRUMENTATION_PREEMPTION
 /* This is the specific form of the NOTE_PREEMPT_LOCK/UNLOCK note */
 
@@ -143,6 +223,17 @@ struct note_csection_s
 #endif
 };
 #endif /* CONFIG_SCHED_INSTRUMENTATION_CSECTION */
+
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+/* This is the specific form of the NOTE_SPINLOCK_LOCK/LOCKED/UNLOCK/ABORT note */
+
+struct note_spinlock_s
+{
+  struct note_common_s nsp_cmn; /* Common note parameters */
+  FAR void *nsp_spinlock;       /* Address of spinlock */
+  uint8_t nsp_value;            /* Value of spinlock */
+};
+#endif /* CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS */
 #endif /* CONFIG_SCHED_INSTRUMENTATION_BUFFER */
 
 /****************************************************************************
@@ -174,12 +265,44 @@ void sched_note_stop(FAR struct tcb_s *tcb);
 void sched_note_suspend(FAR struct tcb_s *tcb);
 void sched_note_resume(FAR struct tcb_s *tcb);
 
+#ifdef CONFIG_SMP
+void sched_note_cpu_start(FAR struct tcb_s *tcb, int cpu);
+void sched_note_cpu_started(FAR struct tcb_s *tcb);
+void sched_note_cpu_pause(FAR struct tcb_s *tcb, int cpu);
+void sched_note_cpu_paused(FAR struct tcb_s *tcb);
+void sched_note_cpu_resume(FAR struct tcb_s *tcb, int cpu);
+void sched_note_cpu_resumed(FAR struct tcb_s *tcb);
+#else
+#  define sched_note_cpu_start(t,c)
+#  define sched_note_cpu_started(t)
+#  define sched_note_cpu_pause(t,c)
+#  define sched_note_cpu_paused(t)
+#  define sched_note_cpu_resume(t,c)
+#  define sched_note_cpu_resumed(t)
+#endif
+
 #ifdef CONFIG_SCHED_INSTRUMENTATION_PREEMPTION
 void sched_note_premption(FAR struct tcb_s *tcb, bool locked);
+#else
+#  define sched_note_premption(t,l)
 #endif
 
 #ifdef CONFIG_SCHED_INSTRUMENTATION_CSECTION
 void sched_note_csection(FAR struct tcb_s *tcb, bool enter);
+#else
+#  define sched_note_csection(t,e)
+#endif
+
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+void sched_note_spinlock(FAR struct tcb_s *tcb, FAR volatile void *spinlock);
+void sched_note_spinlocked(FAR struct tcb_s *tcb, FAR volatile void *spinlock);
+void sched_note_spinunlock(FAR struct tcb_s *tcb, FAR volatile void *spinlock);
+void sched_note_spinabort(FAR struct tcb_s *tcb, FAR volatile void *spinlock);
+#else
+#  define sched_note_spinlock(t,s)
+#  define sched_note_spinlocked(t,s)
+#  define sched_note_spinunlock(t,s)
+#  define sched_note_spinabort(t,s)
 #endif
 
 /****************************************************************************
@@ -200,7 +323,8 @@ void sched_note_csection(FAR struct tcb_s *tcb, bool enter);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_SCHED_INSTRUMENTATION_BUFFER
+#if defined(CONFIG_SCHED_INSTRUMENTATION_BUFFER) && \
+    defined(CONFIG_SCHED_NOTE_GET)
 ssize_t sched_note_get(FAR uint8_t *buffer, size_t buflen);
 #endif
 
@@ -219,7 +343,8 @@ ssize_t sched_note_get(FAR uint8_t *buffer, size_t buflen);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_SCHED_INSTRUMENTATION_BUFFER
+#if defined(CONFIG_SCHED_INSTRUMENTATION_BUFFER) && \
+    defined(CONFIG_SCHED_NOTE_GET)
 ssize_t sched_note_size(void);
 #endif
 
@@ -250,8 +375,18 @@ int note_register(void);
 #  define sched_note_stop(t)
 #  define sched_note_suspend(t)
 #  define sched_note_resume(t)
+#  define sched_note_cpu_start(t,c)
+#  define sched_note_cpu_started(t)
+#  define sched_note_cpu_pause(t,c)
+#  define sched_note_cpu_paused(t)
+#  define sched_note_cpu_resume(t,c)
+#  define sched_note_cpu_resumed(t)
 #  define sched_note_premption(t,l)
 #  define sched_note_csection(t,e)
+#  define sched_note_spinlock(t,s)
+#  define sched_note_spinlocked(t,s)
+#  define sched_note_spinunlock(t,s)
+#  define sched_note_spinabort(t,s)
 
 #endif /* CONFIG_SCHED_INSTRUMENTATION */
 #endif /* __INCLUDE_NUTTX_SCHED_NOTE_H */
diff --git a/include/nuttx/sdio.h b/include/nuttx/sdio.h
index 0a818e75d7330693b94a1cb9d3a1ddad3f60debe..388c72fd196bceb2c8c9df7913e8fc271a6cc4b9 100644
--- a/include/nuttx/sdio.h
+++ b/include/nuttx/sdio.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * include/nuttx/sdio.h
  *
- *   Copyright (C) 2009, 2011-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2011-2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -362,6 +362,28 @@
 
 #define SDIO_RESET(dev) ((dev)->reset(dev))
 
+/****************************************************************************
+ * Name: SDIO_CAPABILITIES
+ *
+ * Description:
+ *   Get capabilities (and limitations) of the SDIO driver (optional)
+ *
+ * Input Parameters:
+ *   dev   - Device-specific state data
+ *
+ * Returned Value:
+ *   Returns a bitset of status values (see SDIO_CAPS_* defines)
+ *
+ ****************************************************************************/
+
+#define SDIO_CAPABILITIES(dev) ((dev)->capabilities(dev))
+
+/* SDIO capability bits */
+
+#define SDIO_CAPS_1BIT_ONLY       0x01 /* Bit 0=1: Supports only 1-bit operation */
+#define SDIO_CAPS_DMASUPPORTED    0x02 /* Bit 1=1: Supports DMA data transfers */
+#define SDIO_CAPS_DMABEFOREWRITE  0x04 /* Bit 2=1: Executes DMA before write command */
+
 /****************************************************************************
  * Name: SDIO_STATUS
  *
@@ -705,26 +727,6 @@
 #  define SDIO_REGISTERCALLBACK(d,c,a) ((d)->registercallback(d,c,a))
 #endif
 
-/****************************************************************************
- * Name: SDIO_DMASUPPORTED
- *
- * Description:
- *   Return true if the hardware can support DMA
- *
- * Input Parameters:
- *   dev - An instance of the SDIO device interface
- *
- * Returned Value:
- *   true if DMA is supported.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_SDIO_DMA
-#  define SDIO_DMASUPPORTED(dev) ((dev)->dmasupported(dev))
-#else
-#  define SDIO_DMASUPPORTED(dev) (false)
-#endif
-
 /****************************************************************************
  * Name: SDIO_DMAPREFLIGHT
  *
@@ -820,6 +822,19 @@ enum sdio_clock_e
 
 typedef uint8_t sdio_eventset_t;
 
+/* Capabilities set.  A uint8_t is big enough to hold a set of
+ * 8-capabilities/limitations.  If more are needed, change this to a
+ * uint16_t.
+ */
+
+typedef uint8_t sdio_capset_t;
+
+/* Status set.  A uint8_t is big enough to hold a set of 8 status bits.
+ * If more are needed, change this to a uint16_t.
+ */
+
+typedef uint8_t sdio_statset_t;
+
 /* This structure defines the interface between the NuttX SDIO driver and
  * the chip- or board-specific SDIO interface.  This interface is only used
  * in architectures that support SDIO 1- or 4-bit data buses.  For SDIO
@@ -842,7 +857,8 @@ struct sdio_dev_s
   /* Initialization/setup */
 
   void  (*reset)(FAR struct sdio_dev_s *dev);
-  uint8_t (*status)(FAR struct sdio_dev_s *dev);
+  sdio_capset_t (*capabilities)(FAR struct sdio_dev_s *dev);
+  sdio_statset_t (*status)(FAR struct sdio_dev_s *dev);
   void  (*widebus)(FAR struct sdio_dev_s *dev, bool enable);
   void  (*clock)(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate);
   int   (*attach)(FAR struct sdio_dev_s *dev);
@@ -887,7 +903,6 @@ struct sdio_dev_s
    */
 
 #ifdef CONFIG_SDIO_DMA
-  bool  (*dmasupported)(FAR struct sdio_dev_s *dev);
 #ifdef CONFIG_SDIO_PREFLIGHT
   int   (*dmapreflight)(FAR struct sdio_dev_s *dev,
           FAR const uint8_t *buffer, size_t buflen);
diff --git a/include/nuttx/semaphore.h b/include/nuttx/semaphore.h
index 4a5bb32d32b6009ffcfef662ad1ca96b029875e8..579a0c4a10898c7d73e3d040a4a0a28aba66cf37 100644
--- a/include/nuttx/semaphore.h
+++ b/include/nuttx/semaphore.h
@@ -51,6 +51,12 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
+/* Values for protocol attribute */
+
+#define SEM_PRIO_NONE             0
+#define SEM_PRIO_INHERIT          1
+#define SEM_PRIO_PROTECT          2
+
 /****************************************************************************
  * Public Type Definitions
  ****************************************************************************/
@@ -61,12 +67,15 @@
 struct inode;
 struct nsem_inode_s
 {
-  /* Inode payload unique to named semaphores.  ns_inode must appear first
-   * in this structure in order to support casting between type sem_t and
-   * types of struct nsem_inode_s. */
+  /* This must be the first element of the structure.  In sem_close() this
+   * structure must be cast compatible with sem_t.
+   */
+
+  sem_t ns_sem;                     /* The contained semaphore */
+
+  /* Inode payload unique to named semaphores. */
 
   FAR struct inode *ns_inode;       /* Containing inode */
-  sem_t ns_sem;                     /* The semaphore */
 };
 #endif
 
@@ -133,6 +142,64 @@ int sem_tickwait(FAR sem_t *sem, systime_t start, uint32_t delay);
 
 int sem_reset(FAR sem_t *sem, int16_t count);
 
+/****************************************************************************
+ * Function: sem_getprotocol
+ *
+ * Description:
+ *    Return the value of the semaphore protocol attribute.
+ *
+ * Parameters:
+ *    sem      - A pointer to the semaphore whose attributes are to be
+ *               queried.
+ *    protocol - The user provided location in which to store the protocol
+ *               value.
+ *
+ * Return Value:
+ *   0 if successful.  Otherwise, -1 is returned and the errno value is set
+ *   appropriately.
+ *
+ ****************************************************************************/
+
+int sem_getprotocol(FAR sem_t *sem, FAR int *protocol);
+
+/****************************************************************************
+ * Function: sem_setprotocol
+ *
+ * Description:
+ *    Set semaphore protocol attribute.
+ *
+ *    One particularly important use of this function is when a semaphore
+ *    is used for inter-task communication like:
+ *
+ *      TASK A                 TASK B
+ *      sem_init(sem, 0, 0);
+ *      sem_wait(sem);
+ *                             sem_post(sem);
+ *      Awakens as holder
+ *
+ *    In this case priority inheritance can interfere with the operation of
+ *    the semaphore.  The problem is that when TASK A is restarted it is a
+ *    holder of the semaphore.  However, it never calls sem_post(sem) so it
+ *    becomes *permanently* a holder of the semaphore and may have its
+ *    priority boosted when any other task tries to acquire the semaphore.
+ *
+ *    The fix is to call sem_setprotocol(SEM_PRIO_NONE) immediately after
+ *    the sem_init() call so that there will be no priority inheritance
+ *    operations on this semaphore.
+ *
+ * Parameters:
+ *    sem      - A pointer to the semaphore whose attributes are to be
+ *               modified
+ *    protocol - The new protocol to use
+ *
+ * Return Value:
+ *   0 if successful.  Otherwise, -1 is returned and the errno value is set
+ *   appropriately.
+ *
+ ****************************************************************************/
+
+int sem_setprotocol(FAR sem_t *sem, int protocol);
+
 #undef EXTERN
 #ifdef __cplusplus
 }
diff --git a/include/nuttx/sensors/adxl345.h b/include/nuttx/sensors/adxl345.h
index da563c8ac6022c5e8fe0c91eb1f09547fb3db4b8..59df6c9dad93d1aebf8525aa320b3b8c4df65630 100644
--- a/include/nuttx/sensors/adxl345.h
+++ b/include/nuttx/sensors/adxl345.h
@@ -66,7 +66,7 @@
  *    going high, it will start high and will go low when an interrupt
  *    is fired. Default:  Active high/rising edge.
  * CONFIG_ADXL345_REGDEBUG
- *   Enable very low register-level debug output.  Requires CONFIG_DEBUG.
+ *   Enable very low register-level debug output.  Requires CONFIG_DEBUG_FEATURES.
  */
 
 #ifdef CONFIG_DISABLE_SIGNALS
diff --git a/include/nuttx/sensors/as5048b.h b/include/nuttx/sensors/as5048b.h
index 9a274d90ae571f6ffc65953e4fae84131c6ffeef..f348b88d9b9ddf27c3c714a6a8855e4a93e81292 100644
--- a/include/nuttx/sensors/as5048b.h
+++ b/include/nuttx/sensors/as5048b.h
@@ -59,10 +59,10 @@
 
 /* IOCTL Commands ***********************************************************/
 
-#define QEIOC_ZEROPOSITION    _QEIOC(QEIOC_USER+0) /* Arg: int32_t* pointer */
-#define QEIOC_AUTOGAINCTL     _QEIOC(QEIOC_USER+1) /* Arg: uint8_t* pointer */
-#define QEIOC_DIAGNOSTICS     _QEIOC(QEIOC_USER+2) /* Arg: uint8_t* pointer */
-#define QEIOC_MAGNITUDE       _QEIOC(QEIOC_USER+3) /* Arg: int32_t* pointer */
+#define QEIOC_ZEROPOSITION    _QEIOC(QE_AS5048B_FIRST+0) /* Arg: int32_t* pointer */
+#define QEIOC_AUTOGAINCTL     _QEIOC(QE_AS5048B_FIRST+1) /* Arg: uint8_t* pointer */
+#define QEIOC_DIAGNOSTICS     _QEIOC(QE_AS5048B_FIRST+2) /* Arg: uint8_t* pointer */
+#define QEIOC_MAGNITUDE       _QEIOC(QE_AS5048B_FIRST+3) /* Arg: int32_t* pointer */
 
 /* Resolution ***************************************************************/
 
@@ -130,7 +130,7 @@ extern "C"
  ****************************************************************************/
 
 FAR struct qe_lowerhalf_s *as5048b_initialize(FAR struct i2c_master_s *i2c,
-                                              uint8_t addr);
+                                              uint8_t addr, uint32_t frequency);
 
 #undef EXTERN
 #ifdef __cplusplus
diff --git a/include/nuttx/sensors/bh1750fvi.h b/include/nuttx/sensors/bh1750fvi.h
index 4d5ae017c937e6e482e02f9f90ee5b8c75e464db..d7722ea209a9bc7adf9385bfdc5c41cc2a83f6fb 100644
--- a/include/nuttx/sensors/bh1750fvi.h
+++ b/include/nuttx/sensors/bh1750fvi.h
@@ -43,6 +43,7 @@
 
 #include 
 #include 
+#include 
 
 #if defined(CONFIG_BH1750FVI)
 
@@ -50,17 +51,7 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* IOCTL Commands ***********************************************************/
-
-#define SNIOC_CHRM          _SNIOC(0x0001) /* Contin. H-Res Mode Arg: None   */
-#define SNIOC_CHRM2         _SNIOC(0x0002) /* Contin. H-Res Mode2 Arg: None  */
-#define SNIOC_CLRM          _SNIOC(0x0003) /* Contin. L-Res Mode Arg: None   */
-#define SNIOC_OTHRM         _SNIOC(0x0004) /* One Time H-Res Mode Arg: None  */
-#define SNIOC_OTHRM2        _SNIOC(0x0005) /* One Time H-Res Mode2 Arg: None */
-#define SNIOC_OTLRM         _SNIOC(0x0006) /* One Time L-Res Mode Arg: None  */
-#define SNIOC_CHMEATIME     _SNIOC(0x0007) /* Change Meas. Time Arg: uint8_t */
-
-/* Device I2C Address*/
+/* Device I2C Address */
 
 #define BH1750FVI_I2C_ADDR        0x23
 
diff --git a/include/nuttx/sensors/bmg160.h b/include/nuttx/sensors/bmg160.h
new file mode 100644
index 0000000000000000000000000000000000000000..a34c9e3ba0ffee9aac89e38840760f579de3b005
--- /dev/null
+++ b/include/nuttx/sensors/bmg160.h
@@ -0,0 +1,440 @@
+/********************************************************************************************
+ * include/nuttx/sensors/bmg160.h
+ *
+ *   Copyright (C) 2016 DS-Automotion GmbH. All rights reserved.
+ *   Author: Alexander Entinger 
+ *           Thomas Ilk
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_SENSORS_BMG160_H
+#define __INCLUDE_NUTTX_SENSORS_BMG160_H
+
+/********************************************************************************************
+ * Included Files
+ ********************************************************************************************/
+
+#include 
+#include 
+#include 
+#include 
+
+#if defined(CONFIG_SPI) && defined(CONFIG_BMG160)
+
+/********************************************************************************************
+ * Pre-processor Definitions
+ ********************************************************************************************/
+
+/* BMG160 Register Definitions **************************************************************/
+
+/* Chip ID */
+
+#define BMG160_CHIP_ID_REG             (0x00)  /* Contains the chip identification code */
+
+/* Data Register */
+
+#define BMG160_RATE_X_LSB_REG          (0x02)
+#define BMG160_RATE_X_MSB_REG          (0x03)
+#define BMG160_RATE_Y_LSB_REG          (0x04)
+#define BMG160_RATE_Y_MSB_REG          (0x05)
+#define BMG160_RATE_Z_LSB_REG          (0x06)
+#define BMG160_RATE_Z_MSB_REG          (0x07)
+#define BMG160_TEMP_REG                (0x08)
+
+/* Status Register */
+
+#define BMG160_INT_STATUS_0_REG        (0x09)  /* Contains interrupt status bits */
+#define BMG160_INT_STATUS_1_REG        (0x0A)  /* Contains interrupt status bits */
+#define BMG160_INT_STATUS_2_REG        (0x0B)  /* Contains any motion interrupt status bits */
+#define BMG160_INT_STATUS_3_REG        (0x0C)  /* Contains high rate interrupt status bits */
+#define BMG160_FIFO_STATUS_REG         (0x0E)  /* Contains FIFO status flags */
+
+/* Control Register */
+
+#define BMG160_RANGE_REG               (0x0F)  /* enables to select FSR */
+#define BMG160_BW_REG                  (0x10)  /* enables to select ODR */
+#define BMG160_LPM1_REG                (0x11)  /* Selection of the main power modes */
+#define BMG160_LPM2_REG                (0x12)  /* Configuration settings for fast power-up and external trigger */
+#define BMG160_RATE_HBW_REG            (0x13)  /* Angular rate data acquisition and data output format */
+#define BMG160_BGW_SOFTRESET_REG       (0x14)  /* Controls user triggered reset of the sensor */
+
+/* Interrupt Status Register */
+
+#define BMG160_INT_EN_0_REG            (0x15)  /* Controls which interrupts are enabled */
+#define BMG160_INT_EN_1_REG            (0x16)  /* Contains interrupt pin configuration */
+#define BMG160_INT_MAP_0_REG           (0x17)  /* Controls which interrupt signals are mapped to the INT1 pin */
+#define BMG160_INT_MAP_1_REG           (0x18)  /* Controls which interrupt signals are mapped to the INT1 pin and INT2 pin */
+#define BMG160_INT_MAP_2_REG           (0x19)  /* Controls which interrupt signals are mapped to the INT2 pin */
+#define BMG160_INT_ZERO_REG            (0x1A)  /* Contains the data source definition of those interrupts with selectable data source */
+#define BMG160_INT_ONE_REG             (0x1B)  /* Contains the data source definition of fast offset compensation and the any motion threshold */
+#define BMG160_INT_TWO_REG             (0x1C)  /* Contains the any motion configuration for x-, y- and z-axis */
+#define BMG160_INT_FOUR_REG            (0x1E)
+#define BMG160_INT_RST_LATCH_REG       (0x21)  /* Contains the interrupt reset bit and the interrupt mode selection */
+
+/* Interrupt High Rate Configuration Register */
+
+#define BMG160_HIGH_TH_X_REG           (0x22)  /* Contains the high rate threshold and high rate hysteresis setting for the x-axis */
+#define BMG160_HIGH_DUR_X_REG          (0x23)  /* Contains high rate duration setting for the x-axis */
+#define BMG160_HIGH_TH_Y_REG           (0x24)  /* Contains the high rate threshold and high rate hysteresis setting for the y-axis */
+#define BMG160_HIGH_DUR_Y_REG          (0x25)  /* Contains high rate duration setting for the y-axis */
+#define BMG160_HIGH_TH_Z_REG           (0x26)  /* Contains the high rate threshold and high rate hysteresis setting for the z-axis */
+#define BMG160_HIGH_DUR_Z_REG          (0x27)  /* Contains high rate duration setting for the z-axis */
+
+/* Offset Register */
+
+#define BMG160_SOC_REG                 (0x31)  /* Contains the slow offset cancellation setting */
+#define BMG160_FOC_REG                 (0x32)  /* Contains the fast offset cancellation setting */
+
+/* NVM Control Register */
+
+#define BMG160_TRIM_NVM_CTRL_REG       (0x33)  /* Contains the control settings for the few-time programmable non-volatile memory (NVM) */
+
+/* Digital Interface Register */
+
+#define BMG160_BGW_SPI3_WDT_REG        (0x34)  /* Contains settings for the digital interfaces */
+
+/* Offset Configuration Register */
+
+#define BMG160_OFC1_REG                (0x36)  /* Contains offset compensation values */
+#define BMG160_OFC2_REG                (0x37)  /* Contains offset compensation values for X-channel */
+#define BMG160_OFC3_REG                (0x38)  /* Contains offset compensation values for Y-channel */
+#define BMG160_OFC4_REG                (0x39)  /* Contains offset compensation values for Z-channel */
+#define BMG160_TRIM_GP0_REG            (0x3A)  /* Contains general purpose data register with NVM back-up */
+#define BMG160_TRIM_GP1_REG            (0x3B)  /* Contains general purpose data register with NVM back-up */
+
+/* Self-test Register */
+
+#define BMG160_BIST_REG                (0x3C)  /* Contains Built in Self-Test possibilities */
+
+/* FIFO Register */
+
+#define BMG160_FIFO_CONFIG_0_REG       (0x3D)  /* Contains the FIFO watermark level */
+#define BMG160_FIFO_CONFIG_1_REG       (0x3E)  /* Contains FIFO configuration settings. The FIFO buffer memory is cleared and
+                                                * the FIFO-full flag cleared when writing to FIFO_CONFIG_1 register */
+#define BMG160_FIFO_DATA_REG           (0x3F)  /* FIFO data readout register */
+
+/* Control Register Definitions *************************************************************/
+
+/* BMG160 RANGE_REG Definitions */
+
+#define BMG160_RANGE_REG_FSR_0_bm      (1 << 0)  /* Full scale selection bit 0 */
+#define BMG160_RANGE_REG_FSR_1_bm      (1 << 1)  /* Full scale selection bit 1 */
+#define BMG160_RANGE_REG_FSR_2_bm      (1 << 2)  /* Full scale selection bit 2 */
+#define BMG160_RANGE_REG_FIX_VAL_bm    (1 << 7)  /* write 1 to 7th bit of Range Register */
+
+/* BMG160 BW_REG Definitions */
+
+#define BMG160_BW_REG_ODR_0_bm         (1 << 0)  /* Output data rate selection bit 0 */
+#define BMG160_BW_REG_ODR_1_bm         (1 << 1)  /* Output data rate selection bit 1 */
+#define BMG160_BW_REG_ODR_2_bm         (1 << 2)  /* Output data rate selection bit 2 */
+
+/* BMG160 LPM1_REG Definitions */
+
+#define BMG160_LPM1_REG_SP_bm          (1 << 7)  /* active suspend mode */
+#define BMG160_LPM1_REG_D_SP_bm        (1 << 5)  /* active deep suspend mode */
+#define BMG160_LPM1_REG_S_DUR_0_bm     (1 << 1)  /* Sleep duration selection bit 0 */
+#define BMG160_LPM1_REG_S_DUR_1_bm     (1 << 2)  /* Sleep duration selection bit 1 */
+#define BMG160_LPM1_REG_S_DUR_2_bm     (1 << 3)  /* Sleep duration selection bit 2 */
+
+/* BMG160 LPM1_REG Definitions */
+
+#define BMG160_LPM1_REG_AS_DUR_0_bm    (1 << 0)  /* Auto sleep duration selection bit 0 */
+#define BMG160_LPM1_REG_AS_DUR_1_bm    (1 << 1)  /* Auto sleep duration selection bit 1 */
+#define BMG160_LPM1_REG_AS_DUR_2_bm    (1 << 2)  /* Auto sleep duration selection bit 2 */
+#define BMG160_LPM1_REG_E_T_S_0_bm     (1 << 4)  /* External trigger selection bit 0 */
+#define BMG160_LPM1_REG_E_T_S_1_bm     (1 << 5)  /* External trigger selection bit 1 */
+#define BMG160_LPM1_REG_P_S_M_bm       (1 << 6)  /* Power save mode */
+#define BMG160_LPM1_REG_FAST_PU_bm     (1 << 7)  /* Fast power-up mode */
+
+/* BMG160 RATE_HBW_REG Definitions */
+
+#define BMG160_HBW_REG_DATA_HIGH_BW_bm (1 << 7)  /* Enable unfiltered data reading */
+#define BMG160_HBW_REG_SHW_DIS_bm      (1 << 6)  /* Disable shadow mechanism for the rate data output register */
+
+
+/* Interrupt Status Register Definitions ****************************************************/
+
+/* BMG160 INT_EN_0_REG Definitions */
+
+#define BMG160_INT_EN_0_REG_DATA_EN_bm        (1 << 7)   /* Enable new data interrupt */
+#define BMG160_INT_EN_0_REG_FIFO_EN_bm        (1 << 6)   /* Enable FIFO interrupt */
+#define BMG160_INT_EN_0_REG_AUTO_OFF_EN_bm    (1 << 1)   /* Enable auto-offset compensation */
+
+/* BMG160 INT_EN_1_REG Definitions */
+
+#define BMG160_INT_EN_1_REG_INT2_OD_bm        (1 << 3)   /* Select open drive for INT2 */
+#define BMG160_INT_EN_1_REG_INT2_LVL_bm       (1 << 2)   /* Select active level '1' for INT2 */
+#define BMG160_INT_EN_1_REG_INT1_OD_bm        (1 << 1)   /* Select open drive for INT1 */
+#define BMG160_INT_EN_1_REG_INT1_LVL_bm       (1 << 0)   /* Select active level '1' for INT1 */
+
+/* BMG160 INT_MAP_0_REG Definitions */
+
+#define BMG160_INT_MAP_0_REG_INT1_HIGH_bm     (1 << 3)   /* Map high rate interrupt to INT1 pin */
+#define BMG160_INT_MAP_0_REG_INT1_ANY_bm      (1 << 1)   /* Map Any-Motion to INT1 pin */
+
+/* BMG160 INT_MAP_1_REG Definitions */
+
+#define BMG160_INT_MAP_1_REG_INT2_DATA_bm     (1 << 7)   /* Map new data interrupt to INT2 pin */
+#define BMG160_INT_MAP_1_REG_INT2_Fast_OFF_bm (1 << 6)   /* Map Fast Offset interrupt to INT2 pin */
+#define BMG160_INT_MAP_1_REG_INT2_FIFO_bm     (1 << 5)   /* Map FIFO interrupt to INT2 pin */
+#define BMG160_INT_MAP_1_REG_INT2_AUTO_OFF_bm (1 << 4)   /* Map Auto Offset tap interrupt to INT2 pin */
+#define BMG160_INT_MAP_1_REG_INT1_AUTO_OFF_bm (1 << 3)   /* Map Auto Offset tap interrupt to INT1 pin */
+#define BMG160_INT_MAP_1_REG_INT1_FIFO_bm     (1 << 2)   /* Map FIFO interrupt to INT1 pin */
+#define BMG160_INT_MAP_1_REG_INT1_Fast_OFF_bm (1 << 1)   /* Map Fast Offset interrupt to INT1 pin */
+#define BMG160_INT_MAP_1_REG_INT1_DATA_bm     (1 << 0)   /* Map new data interrupt to INT1 pin */
+
+/* BMG160 INT_MAP_2_REG Definitions */
+
+#define BMG160_INT_MAP_0_REG_INT2_HIGH_bm     (1 << 3)   /* Map high rate interrupt to INT2 pin */
+#define BMG160_INT_MAP_0_REG_INT2_ANY_bm      (1 << 1)   /* Map Any-Motion to INT2 pin */
+
+/* BMG160 INT_ZERO_REG Definitions */
+
+#define BMG160_INT_ZERO_REG_SLOW_OFF_UN_bm    (1 << 5)   /* Selects unfiltered data for slow offset compensation */
+#define BMG160_INT_ZERO_REG_HIGH_UN_D_bm      (1 << 3)   /* Selects unfiltered data for high rate interrupt */
+#define BMG160_INT_ZERO_REG_ANY_UN_D_bm       (1 << 1)   /* Selects unfiltered data for any motion interrupt
+
+/* BMG160 INT_ONE_REG Definitions */
+
+#define BMG160_INT_ONE_REG_FAST_OFF_UN_bm     (1 << 7)   /* Selects unfiltered data for fast offset compensation */
+
+/* BMG160 INT_TWO_REG Definitions */
+
+#define BMG160_INT_TWO_REG_ANY_EN_Z_bm        (1 << 2)   /* Enables any motion interrupt for z-axis */
+#define BMG160_INT_TWO_REG_ANY_EN_Y_bm        (1 << 1)   /* Enables any motion interrupt for y-axis */
+#define BMG160_INT_TWO_REG_ANY_EN_X_bm        (1 << 0)   /* Enables any motion interrupt for x-axis */
+
+/* BMG160 INT_FOUR_REG Definitions */
+
+#define BMG160_INT_FOUR_REG_FIFO_WM_EN_bm     (1 << 2)   /* Enables fifo water mark level interrupt
+
+/* BMG160 INT_RST_LATCH_REG Definitions */
+
+#define BMG160_INT_RST_LATCH_REG_RST_INT_bm     (1 << 7) /* Clears any latched interrupts */
+#define BMG160_INT_RST_LATCH_REG_OFF_RST_bm     (1 << 6) /* Resets the Offset value calculated with Fast-, Slow- and AutoOffset */
+#define BMG160_INT_RST_LATCH_REG_LATCH_STAT_bm  (1 << 4)
+#define BMG160_INT_RST_LATCH_REG_LATCH_INT_3_bm (1 << 3) /* Latch mode selection bit 3 */
+#define BMG160_INT_RST_LATCH_REG_LATCH_INT_2_bm (1 << 2) /* Latch mode selection bit 2 */
+#define BMG160_INT_RST_LATCH_REG_LATCH_INT_1_bm (1 << 1) /* Latch mode selection bit 1 */
+#define BMG160_INT_RST_LATCH_REG_LATCH_INT_0_bm (1 << 0) /* Latch mode selection bit 0 */
+
+/* Interupt High Rate Configuration Register Definitions ************************************/
+
+/* BMG160 HIGH_TH_X_REG Definitions */
+
+#define BMG160_HIGH_TH_X_REG_HY_X_1_bm   (1 << 7)
+#define BMG160_HIGH_TH_X_REG_HY_X_0_bm   (1 << 6)
+#define BMG160_HIGH_TH_X_REG_TH_X_4_bm   (1 << 5)
+#define BMG160_HIGH_TH_X_REG_TH_X_3_bm   (1 << 4)
+#define BMG160_HIGH_TH_X_REG_TH_X_2_bm   (1 << 3)
+#define BMG160_HIGH_TH_X_REG_TH_X_1_bm   (1 << 2)
+#define BMG160_HIGH_TH_X_REG_TH_X_0_bm   (1 << 1)
+#define BMG160_HIGH_TH_X_REG_EN_X_1_bm   (1 << 0)  /* Enables high rate interrupt for x-axis */
+
+/* BMG160 HIGH_DUR_X_REG Definitions */
+
+#define BMG160_HIGH_DUR_X_REG_7_bm       (1 << 7)
+#define BMG160_HIGH_DUR_X_REG_6_bm       (1 << 6)
+#define BMG160_HIGH_DUR_X_REG_5_bm       (1 << 5)
+#define BMG160_HIGH_DUR_X_REG_4_bm       (1 << 4)
+#define BMG160_HIGH_DUR_X_REG_3_bm       (1 << 3)
+#define BMG160_HIGH_DUR_X_REG_2_bm       (1 << 2)
+#define BMG160_HIGH_DUR_X_REG_1_bm       (1 << 1)
+#define BMG160_HIGH_DUR_X_REG_0_bm       (1 << 0)
+
+/* BMG160 HIGH_TH_Y_REG Definitions */
+
+#define BMG160_HIGH_TH_Y_REG_HY_Y_1_bm   (1 << 7)
+#define BMG160_HIGH_TH_Y_REG_HY_Y_0_bm   (1 << 6)
+#define BMG160_HIGH_TH_Y_REG_TH_Y_4_bm   (1 << 5)
+#define BMG160_HIGH_TH_Y_REG_TH_Y_3_bm   (1 << 4)
+#define BMG160_HIGH_TH_Y_REG_TH_Y_2_bm   (1 << 3)
+#define BMG160_HIGH_TH_Y_REG_TH_Y_1_bm   (1 << 2)
+#define BMG160_HIGH_TH_Y_REG_TH_Y_0_bm   (1 << 1)
+#define BMG160_HIGH_TH_Y_REG_EN_Y_1_bm   (1 << 0)  /* Enables high rate interrupt for Y-axis */
+
+/* BMG160 HIGH_DUR_Y_REG Definitions */
+
+#define BMG160_HIGH_DUR_Y_REG_7_bm       (1 << 7)
+#define BMG160_HIGH_DUR_Y_REG_6_bm       (1 << 6)
+#define BMG160_HIGH_DUR_Y_REG_5_bm       (1 << 5)
+#define BMG160_HIGH_DUR_Y_REG_4_bm       (1 << 4)
+#define BMG160_HIGH_DUR_Y_REG_3_bm       (1 << 3)
+#define BMG160_HIGH_DUR_Y_REG_2_bm       (1 << 2)
+#define BMG160_HIGH_DUR_Y_REG_1_bm       (1 << 1)
+#define BMG160_HIGH_DUR_Y_REG_0_bm       (1 << 0)
+
+/* BMG160 HIGH_TH_Z_REG Definitions */
+
+#define BMG160_HIGH_TH_Z_REG_HY_Z_1_bm   (1 << 7)
+#define BMG160_HIGH_TH_Z_REG_HY_Z_0_bm   (1 << 6)
+#define BMG160_HIGH_TH_Z_REG_TH_Z_4_bm   (1 << 5)
+#define BMG160_HIGH_TH_Z_REG_TH_Z_3_bm   (1 << 4)
+#define BMG160_HIGH_TH_Z_REG_TH_Z_2_bm   (1 << 3)
+#define BMG160_HIGH_TH_Z_REG_TH_Z_1_bm   (1 << 2)
+#define BMG160_HIGH_TH_Z_REG_TH_Z_0_bm   (1 << 1)
+#define BMG160_HIGH_TH_Z_REG_EN_Z_1_bm   (1 << 0)  /* Enables high rate interrupt for Z-axis */
+
+/* BMG160 HIGH_DUR_Z_REG Definitions */
+
+#define BMG160_HIGH_DUR_Z_REG_7_bm       (1 << 7)
+#define BMG160_HIGH_DUR_Z_REG_6_bm       (1 << 6)
+#define BMG160_HIGH_DUR_Z_REG_5_bm       (1 << 5)
+#define BMG160_HIGH_DUR_Z_REG_4_bm       (1 << 4)
+#define BMG160_HIGH_DUR_Z_REG_3_bm       (1 << 3)
+#define BMG160_HIGH_DUR_Z_REG_2_bm       (1 << 2)
+#define BMG160_HIGH_DUR_Z_REG_1_bm       (1 << 1)
+#define BMG160_HIGH_DUR_Z_REG_0_bm       (1 << 0)
+
+/* Offset Register Definitions **************************************************************/
+
+/* BMG160 SOC_REG */
+
+#define BMG160_SOC_REG_SLOW_OFF_EN_Z_bm  (1 << 2)  /* Enables slow offset compensation for z-axis */
+#define BMG160_SOC_REG_SLOW_OFF_EN_Y_bm  (1 << 1)  /* Enables slow offset compensation for y-axis */
+#define BMG160_SOC_REG_SLOW_OFF_EN_X_bm  (1 << 0)  /* Enables slow offset compensation for x-axis */
+
+/* BMG160 FOC_REG */
+
+#define BMG160_FOC_REG_FAST_OFF_EN_bm    (1 << 2)  /* Triggers the fast offset compensation for the enabled axes */
+#define BMG160_FOC_REG_FAST_OFF_EN_Z_bm  (1 << 2)  /* Enables fast offset compensation for z-axis */
+#define BMG160_FOC_REG_FAST_OFF_EN_Y_bm  (1 << 1)  /* Enables fast offset compensation for y-axis */
+#define BMG160_FOC_REG_FAST_OFF_EN_X_bm  (1 << 0)  /* Enables fast offset compensation for x-axis */
+
+/* NVM Control Register Definitions *********************************************************/
+
+/* BMG160 TRIM_NVM_CTRL_REG */
+
+#define BMG160_TRIM_NVM_CTRL_REG_NVM_LOAD_bm      (1 << 3) /* Triggers an update of all config registers form NVM,
+                                                            * the NVM_RDY flag must be '1' prior to triggering the update */
+#define BMG160_TRIM_NVM_CTRL_REG_NVM_PROG_TRIG_bm (1 << 1) /* Triggers an NVM write operation; (see page 59, data sheet)
+                                                            * the NVM_RDY flag must be '1' prior to triggering the update */
+#define BMG160_TRIM_NVM_CTRL_REG_NVM_PROG_MODE_bm (1 << 0) /* unlock NVM write operation */
+
+/* Digital Interface Register Definitions ***************************************************/
+
+/* BMG160 BGW_SPI3_WDT_REG */
+
+#define BMG160_BGW_SPI3_WDT_REG_I2C_WDT_EN_bm  (1 << 2)  /* Enables watchdog at the SDA pin if I2C mode is selected */
+#define BMG160_BGW_SPI3_WDT_REG_I2C_WDT_SEL_bm (1 << 1)  /* Select an I2C watchdog timer period of 50ms */
+#define BMG160_BGW_SPI3_WDT_REG_SPI3_bm        (1 << 0)  /* Enable 3-wire SPI mode */
+
+/* Offset Configuration Register Definitions ************************************************/
+
+/* FIFO Register Definitions ****************************************************************/
+
+/* BMG160 FIFO_CONFIG_0_REG */
+
+#define BMG160_FIFO_CONFIG_0_REG_TAG_bm        (1 << 7)  /* Enables FIFO tag (interrupt) */
+
+/* BMG160 FIFO_CONFIG_1_REG */
+
+#define BMG160_FIFO_CONFIG_1_REG_MODE_1_bm     (1 << 7)  /* FIFO mode selection bit 1 */
+#define BMG160_FIFO_CONFIG_1_REG_MODE_0_bm     (1 << 6)  /* FIFO mode selection bit 0 */
+#define BMG160_FIFO_CONFIG_1_REG_DATA_SEL_1_bm (1 << 1)  /* FIFO data selection bit 1 */
+#define BMG160_FIFO_CONFIG_1_REG_DATA_SEL_0_bm (1 << 0)  /* FIFO data selection bit 0 */
+
+/* SPI BUS PARAMETERS ***********************************************************************/
+
+#define BMG160_SPI_FREQUENCY  (4000000)        /* 4 MHz */
+#define BMG160_SPI_MODE       (SPIDEV_MODE3)   /* Device uses SPI Mode 3: CPOL=1, CPHA=1 */
+
+/********************************************************************************************
+ * Public Types
+ ********************************************************************************************/
+
+/* A reference to a structure of this type must be passed to the BMG160
+ * driver. This structure provides information about the configuration
+ * of the sensor and provides some board-specific hooks.
+ *
+ * Memory for this structure is provided by the caller.  It is not copied
+ * by the driver and is presumed to persist while the driver is active.
+ */
+
+struct bmg160_config_s
+{
+  /* Since multiple BMG160 can be connected to the same SPI bus we need
+   * to use multiple spi device ids which are employed by NuttX to select/
+   * deselect the desired BMG160 chip via their chip select inputs.
+   */
+
+  int spi_devid;
+
+  /* The IRQ number must be provided for each BMG160 device so that
+   * their interrupts can be distinguished.
+   */
+
+  int irq;
+
+  /* Attach the BMG160 interrupt handler to the GPIO interrupt of the
+   * concrete BMG160 instance.
+   */
+
+  int (*attach)(FAR struct bmg160_config_s *, xcpt_t);
+};
+
+/********************************************************************************************
+ * Public Function Prototypes
+ ********************************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/********************************************************************************************
+ * Name: bmg160_register
+ *
+ * Description:
+ *   Register the BMG160 character device as 'devpath'
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/gyr0"
+ *   spi - An instance of the SPI interface to use to communicate with BMG160
+ *   config - configuration for the BMG160 driver. For details see description above.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ********************************************************************************************/
+
+int bmg160_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
+                    FAR struct bmg160_config_s *config);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CONFIG_SPI && CONFIG_BMG160 */
+#endif /* __INCLUDE_NUTTX_SENSORS_BMG160_H */
diff --git a/include/nuttx/sensors/bmp180.h b/include/nuttx/sensors/bmp180.h
index 0c12e242265a49dd5e69e5ca4f99726610916467..5bdb86fe21233981f59b6ee14f667c7b606665f5 100644
--- a/include/nuttx/sensors/bmp180.h
+++ b/include/nuttx/sensors/bmp180.h
@@ -33,8 +33,8 @@
  *
  ********************************************************************************************/
 
-#ifndef __DRIVERS_SENSORS_BMP180_H
-#define __DRIVERS_SENSORS_BMP180_H
+#ifndef __INCLUDE_NUTTX_SENSORS_BMP180_H
+#define __INCLUDE_NUTTX_SENSORS_BMP180_H
 
 #include 
 
@@ -52,7 +52,7 @@
  * CONFIG_BMP180
  *   Enables support for the BMP180 driver
  * CONFIG_BMP180_REGDEBUG
- *   Enable very low register-level debug output.  Requires CONFIG_DEBUG.
+ *   Enable very low register-level debug output.  Requires CONFIG_DEBUG_FEATURES.
  */
 
 /****************************************************************************
@@ -97,4 +97,4 @@ int bmp180_register(FAR const char *devpath, FAR struct i2c_master_s *i2c);
 #endif
 
 #endif /* CONFIG_I2C && CONFIG_BMP180 */
-#endif /* __DRIVERS_BMP180_H */
+#endif /* __INCLUDE_NUTTX_SENSORS_BMP180_H */
diff --git a/include/nuttx/sensors/ioctl.h b/include/nuttx/sensors/ioctl.h
new file mode 100644
index 0000000000000000000000000000000000000000..acbf31d810063a344b2903c84c3aa5ff8b4f59ee
--- /dev/null
+++ b/include/nuttx/sensors/ioctl.h
@@ -0,0 +1,118 @@
+/****************************************************************************
+ * include/nuttx/input/ioctl.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Alan Carvalho de Assis 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_SENSORS_IOCTL_H
+#define __INCLUDE_NUTTX_SENSORS_IOCTL_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* IOCTL commands unique to the BH1750FVI */
+
+#define SNIOC_CHRM          _SNIOC(0x0001) /* Contin. H-Res Mode Arg: None   */
+#define SNIOC_CHRM2         _SNIOC(0x0002) /* Contin. H-Res Mode2 Arg: None  */
+#define SNIOC_CLRM          _SNIOC(0x0003) /* Contin. L-Res Mode Arg: None   */
+#define SNIOC_OTHRM         _SNIOC(0x0004) /* One Time H-Res Mode Arg: None  */
+#define SNIOC_OTHRM2        _SNIOC(0x0005) /* One Time H-Res Mode2 Arg: None */
+#define SNIOC_OTLRM         _SNIOC(0x0006) /* One Time L-Res Mode Arg: None  */
+#define SNIOC_CHMEATIME     _SNIOC(0x0007) /* Change Meas. Time Arg: uint8_t */
+
+/* IOCTL commands unique to the KXTJ9 */
+
+#define SNIOC_ENABLE        _SNIOC(0x0008) /* Arg: None */
+#define SNIOC_DISABLE       _SNIOC(0x0009) /* Arg: None */
+#define SNIOC_CONFIGURE     _SNIOC(0x000a) /* Arg: enum kxtj9_odr_e value */
+
+/* IOCTL commands common to the LM75, LM92 (and compatible parts) */
+
+#define SNIOC_READCONF      _SNIOC(0x000b) /* Arg: uint8_t* pointer */
+#define SNIOC_WRITECONF     _SNIOC(0x000c) /* Arg: uint8_t value */
+#define SNIOC_SHUTDOWN      _SNIOC(0x000d) /* Arg: None */
+#define SNIOC_POWERUP       _SNIOC(0x000e) /* Arg: None */
+#define SNIOC_FAHRENHEIT    _SNIOC(0x000f) /* Arg: None */
+#define SNIOC_CENTIGRADE    _SNIOC(0x0010) /* Arg: None */
+#define SNIOC_READTHYS      _SNIOC(0x0011) /* Arg: b16_t* pointer */
+#define SNIOC_WRITETHYS     _SNIOC(0x0012) /* Arg: b16_t value */
+
+/* IOCTL commands unique to the LM75 */
+
+#define SNIOC_READTOS       _SNIOC(0x0013) /* Arg: b16_t* pointer */
+#define SNIOC_WRITETOS      _SNIOC(0x0014) /* Arg: b16_t value */
+
+/* IOCTL commands unique to the LM92 */
+
+#define SNIOC_READTCRIT     _SNIOC(0x0015) /* Arg: b16_t* pointer */
+#define SNIOC_WRITETCRIT    _SNIOC(0x0016) /* Arg: b16_t value */
+#define SNIOC_READTLOW      _SNIOC(0x0017) /* Arg: b16_t* pointer */
+#define SNIOC_WRITETLOW     _SNIOC(0x0018) /* Arg: b16_t value */
+#define SNIOC_READTHIGH     _SNIOC(0x0019) /* Arg: b16_t* pointer */
+#define SNIOC_WRITETHIGH    _SNIOC(0x001a) /* Arg: b16_t value */
+#define SNIOC_READID        _SNIOC(0x001b) /* Arg: uint16_t* pointer */
+
+/* IOCTL commands unique to the LSM9DS1 */
+
+#define SNIOC_START         _SNIOC(0x001c) /* Arg: None */
+#define SNIOC_STOP          _SNIOC(0x001d) /* Arg: None */
+#define SNIOC_SETSAMPLERATE _SNIOC(0x001e) /* Arg: uint32_t value */
+#define SNIOC_SETFULLSCALE  _SNIOC(0x001f) /* Arg: uint32_t value */
+
+/* IOCTL commands unique to the MB7040 */
+
+#define SNIOC_MEASURE       _SNIOC(0x0020) /* Arg: None */
+#define SNIOC_RANGE         _SNIOC(0x0021) /* Arg: int32_t* pointer */
+#define SNIOC_CHANGEADDR    _SNIOC(0x0022) /* Arg: uint8_t value */
+
+/* IOCTL commands unique to the MCP9844 */
+
+#define SNIOC_READTEMP      _SNIOC(0x0023)  /* Arg: mcp9844_temp_arg_s* pointer */
+#define SNIOC_SETRESOLUTION _SNIOC(0x0024)  /* Arg: uint16_t value */
+
+/* IOCTL commands unique to the MS58XX */
+
+#define SNIOC_MEASURE       _SNIOC(0x0025) /* Arg: None */
+#define SNIOC_TEMPERATURE   _SNIOC(0x0026) /* Arg: int32_t* pointer */
+#define SNIOC_PRESSURE      _SNIOC(0x0027) /* Arg: int32_t* pointer */
+#define SNIOC_RESET         _SNIOC(0x0028) /* Arg: None */
+#define SNIOC_OVERSAMPLING  _SNIOC(0x0029) /* Arg: uint16_t value */
+
+#endif /* __INCLUDE_NUTTX_SENSORS_IOCTL_H */
diff --git a/include/nuttx/sensors/kxtj9.h b/include/nuttx/sensors/kxtj9.h
new file mode 100644
index 0000000000000000000000000000000000000000..4c3facaf733b8440ffdddee9c4d06775023c0972
--- /dev/null
+++ b/include/nuttx/sensors/kxtj9.h
@@ -0,0 +1,119 @@
+/****************************************************************************
+ * include/nuttx/sensors/kxtj9.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * This driver derives from the Motorola Moto Z MDK:
+ *
+ *   Copyright (c) 2016 Motorola Mobility, LLC.
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_SENSORS_KXTJ9_H
+#define __INCLUDE_NUTTX_SENSORS_KXTJ9_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+#if defined(CONFIG_I2C) && defined(CONFIG_SENSOR_KXTJ9)
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* Data control register bits */
+
+enum kxtj9_odr_e
+{
+  ODR0_781F  = 8,
+  ODR1_563F  = 9,
+  ODR3_125F  = 10,
+  ODR6_25F   = 11,
+  ODR12_5F   = 0,
+  ODR25F     = 1,
+  ODR50F     = 2,
+  ODR100F    = 3,
+  ODR200F    = 4,
+  ODR400F    = 5,
+  ODR800F    = 6
+};
+
+/* Data returned by reading from the KXTJ9 is returned in this format.
+ * In order for the read to be successful, a buffer of size >= sizeof(struct
+ * kxtj9_sensor_data) must be provided with the read.
+ */
+
+struct kxtj9_sensor_data
+{
+  uint16_t x;
+  uint16_t y;
+  uint16_t z;
+};
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/****************************************************************************
+ * Name: kxtj9_register
+ *
+ * Description:
+ *   Register the KXTJ9 accelerometer device as 'devpath'.
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register, e.g., "/dev/accel0".
+ *   i2c     - An I2C driver instance.
+ *   addr    - The I2C address of the KXTJ9 accelerometer, gyroscope or
+ *             magnetometer.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+struct i2c_master_s;
+int kxtj9_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
+                   uint8_t address);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CONFIG_I2C && CONFIG_SENSOR_KXTJ9 */
+#endif /* __INCLUDE_NUTTX_SENSORS_KXTJ9_H */
diff --git a/include/nuttx/sensors/l3gd20.h b/include/nuttx/sensors/l3gd20.h
new file mode 100644
index 0000000000000000000000000000000000000000..95a3cedbdd8ca4d581da1a2d2f32cdaf98bc16b3
--- /dev/null
+++ b/include/nuttx/sensors/l3gd20.h
@@ -0,0 +1,294 @@
+/****************************************************************************
+ * include/nuttx/sensors/l3gd20.h
+ *
+ *   Copyright (C) Gregory Nutt. All rights reserved.
+ *   Author: Mateusz Szafoni 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_SENSORS_L3GD20_H
+#define __INCLUDE_NUTTX_SENSORS_L3GD20_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+#include 
+
+#if defined(CONFIG_SPI) && defined(CONFIG_SENSORS_L3GD20)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* SPI BUS PARAMETERS ********************************************************/
+
+#define L3GD20_SPI_FREQUENCY  (4000000)        /* 4 MHz */
+#define L3GD20_SPI_MODE       (SPIDEV_MODE3)   /* Device uses SPI Mode 3: CPOL=1, CPHA=1 *
+
+/* Register Addresses *******************************************************/
+/* Gyroscope registers */
+
+#define L3GD20_WHO_AM_I                0x0F /* Accelerometer and gyroscope device identification */
+#define L3GD20_CTRL_REG_1              0x20 /* Gyroscope control register 1 */
+#define L3GD20_CTRL_REG_2              0x21 /* Gyroscope control register 2 */
+#define L3GD20_CTRL_REG_3              0x22 /* Gyroscope control register 3 */
+#define L3GD20_CTRL_REG_4              0x23 /* Gyroscope control register 4 */
+#define L3GD20_CTRL_REG_5              0x24 /* Gyroscope control register 5 */
+#define L3GD20_REF_REG                 0x25 /* Gyroscope reference value for interrupt generation */
+#define L3GD20_OUT_TEMP_REG            0x26 /* Temperature data */
+#define L3GD20_STATUS_REG              0x27 /* Status register */
+#define L3GD20_OUT_X_L_REG             0x28 /* Gyroscope pitch (X) low byte */
+#define L3GD20_OUT_X_H_REG             0x29 /* Gyroscope pitch (X) high byte */
+#define L3GD20_OUT_Y_L_REG             0x2A /* Gyroscope roll (Y) low byte */
+#define L3GD20_OUT_Y_H_REG             0x2B /* Gyroscope roll (Y) high byte */
+#define L3GD20_OUT_Z_L_REG             0x2C /* Gyroscope yaw (Z) low byte */
+#define L3GD20_OUT_Z_H_REG             0x2D /* Gyroscope yaw (Z) high byte */
+#define L3GD20_FIFO_CTRL_REG           0x2E /* FIFO control register */
+#define L3GD20_FIFO_SRC_REG            0x2f /* FIFO status control register */
+#define L3GD20_INT_GEN_CFG_REG         0x30 /* Gyroscope interrupt configuration */
+#define L3GD20_INT_GEN_SRC_REG         0x31 /* Gyroscope interrupt source */
+#define L3GD20_INT_GEN_THS_X_H_REG     0x32 /* Gyroscope pitch (X) interrupt threshold high byte */
+#define L3GD20_INT_GEN_THS_X_L_REG     0x33 /* Gyroscope pitch (X) interrupt threshold low byte */
+#define L3GD20_INT_GEN_THS_Y_H_REG     0x34 /* Gyroscope roll (Y) interrupt threshold high byte */
+#define L3GD20_INT_GEN_THS_Y_L_REG     0x35 /* Gyroscope roll (Y) interrupt threshold low byte */
+#define L3GD20_INT_GEN_THS_Z_H_REG     0x36 /* Gyroscope yaw (Z) interrupt threshold high byte */
+#define L3GD20_INT_GEN_THS_Z_L_REG     0x37 /* Gyroscope yaw (Z) interrupt threshold low byte */
+#define L3GD20_INT_GEN_DUR_REG         0x38 /* Gyroscope interrupt duration */
+
+/* Register Bit Definitions *************************************************/
+
+/* Device identification register */
+
+#define L3GD20_WHO_AM_I_VALUE          0xD4
+
+/* Gyroscope control register 1 */
+
+#define L3GD20_CTRL_REG_1_X_EN_bm          (1 << 0)
+#define L3GD20_CTRL_REG_1_Y_EN_bm          (1 << 1)
+#define L3GD20_CTRL_REG_1_Z_EN_bm          (1 << 2)
+#define L3GD20_CTRL_REG_1_POWERDOWN_bm     (1 << 3)
+#define L3GD20_CTRL_REG_1_BW_0_bm          (1 << 4)
+#define L3GD20_CTRL_REG_1_BW_1_bm          (1 << 5)
+#define L3GD20_CTRL_REG_1_DR_0_bm          (1 << 6)
+#define L3GD20_CTRL_REG_1_DR_1_bm          (1 << 7)
+
+/* Gyroscope control register 2 */
+
+#define L3GD20_CTRL_REG_2_HPCF_0_bm        (1 << 0)
+#define L3GD20_CTRL_REG_2_HPCF_1_bm        (1 << 1)
+#define L3GD20_CTRL_REG_2_HPCF_2_bm        (1 << 2)
+#define L3GD20_CTRL_REG_2_HPCF_3_bm        (1 << 3)
+#define L3GD20_CTRL_REG_2_HPM_0_bm         (1 << 4)
+#define L3GD20_CTRL_REG_2_HPM_1_bm         (1 << 5)
+#define L3GD20_CTRL_REG_2_RES6_            (1 << 6)
+#define L3GD20_CTRL_REG_2_RES7_            (1 << 7)
+
+/* Gyroscope control register 3 */
+
+#define L3GD20_CTRL_REG_3_I2_EMPTY_bm      (1 << 0)
+#define L3GD20_CTRL_REG_3_I2_ORUN_bm       (1 << 1)
+#define L3GD20_CTRL_REG_3_I2_WTM_bm        (1 << 2)
+#define L3GD20_CTRL_REG_3_I2_DRDY_bm       (1 << 3)
+#define L3GD20_CTRL_REG_3_PP_OD_bm         (1 << 4)
+#define L3GD20_CTRL_REG_3_H_LACTIVE_bm     (1 << 5)
+#define L3GD20_CTRL_REG_3_I1_BOOT_bm       (1 << 6)
+#define L3GD20_CTRL_REG_3_I1_INT1_bm       (1 << 7)
+
+
+/* Gyroscope control register 4 */
+
+#define L3GD20_CTRL_REG_4_SIM_bm           (1 << 0)
+#define L3GD20_CTRL_REG_4_RES1_            (1 << 1)
+#define L3GD20_CTRL_REG_4_RES2_            (1 << 2)
+#define L3GD20_CTRL_REG_4_RES3_            (1 << 3)
+#define L3GD20_CTRL_REG_4_FS_0_bm          (1 << 4)
+#define L3GD20_CTRL_REG_4_FS_1_bm          (1 << 5)
+#define L3GD20_CTRL_REG_4_BLE_bm           (1 << 6)
+#define L3GD20_CTRL_REG_4_BDU_bm           (1 << 7)
+
+/* Gyroscope control register 5 */
+
+#define L3GD20_CTRL_REG_5_OUT_SEL_0_bm     (1 << 0)
+#define L3GD20_CTRL_REG_5_OUT_SEL_1_bm     (1 << 1)
+#define L3GD20_CTRL_REG_5_INT1_SEL_0_bm    (1 << 2)
+#define L3GD20_CTRL_REG_5_INT1_SEL_1_bm    (1 << 3)
+#define L3GD20_CTRL_REG_5_HP_EN_bm         (1 << 4)
+#define L3GD20_CTRL_REG_5_RES5_            (1 << 5)
+#define L3GD20_CTRL_REG_5_FIFO_EN_bm       (1 << 6)
+#define L3GD20_CTRL_REG_5_BOOT_bm          (1 << 7)
+
+/* Status register */
+
+#define L3GD20_STATUS_REG_X_DA_bm          (1 << 0)
+#define L3GD20_STATUS_REG_Y_DA_bm          (1 << 1)
+#define L3GD20_STATUS_REG_Z_DA_bm          (1 << 2)
+#define L3GD20_STATUS_REG_ZYX_DA_bm        (1 << 3)
+#define L3GD20_STATUS_REG_X_OR_bm          (1 << 4)
+#define L3GD20_STATUS_REG_Y_OR_bm          (1 << 5)
+#define L3GD20_STATUS_REG_Z_OR_bm          (1 << 6)
+#define L3GD20_STATUS_REG_ZYX_OR_bm        (1 << 7)
+
+/* FIFO control register */
+
+#define L3GD20_FIFO_CTRL_WTM_0_bm          (1 << 0)
+#define L3GD20_FIFO_CTRL_WTM_1_bm          (1 << 1)
+#define L3GD20_FIFO_CTRL_WTM_2_bm          (1 << 2)
+#define L3GD20_FIFO_CTRL_WTM_3_bm          (1 << 3)
+#define L3GD20_FIFO_CTRL_WTM_4_bm          (1 << 4)
+#define L3GD20_FIFO_CTRL_FM_0_bm           (1 << 5)
+#define L3GD20_FIFO_CTRL_FM_1_bm           (1 << 6)
+#define L3GD20_FIFO_CTRL_FM_2_bm           (1 << 7)
+#define L3GD20_FIFO_CTRL_FMODE_BYPASS      (0)
+#define L3GD20_FIFO_CTRL_FMODE_FIFO        (L3GD20_FIFO_CTRL_FM0)
+#define L3GD20_FIFO_CTRL_FMODE_CONT        (L3GD20_FIFO_CTRL_FM1)
+#define L3GD20_FIFO_CTRL_FMODE_CONT_FIFO   (L3GD20_FIFO_CTRL_FM1 | L3GD20_FIFO_CTRL_FM0)
+#define L3GD20_FIFO_CTRL_FMODE_BYPASS_CONT (L3GD20_FIFO_CTRL_FM2 | L3GD20_FIFO_CTRL_FM1)
+
+/* FIFO status control register */
+
+#define L3GD20_FIFO_SRC_FSS_0_bm           (1 << 0)
+#define L3GD20_FIFO_SRC_FSS_1_bm           (1 << 1)
+#define L3GD20_FIFO_SRC_FSS_2_bm           (1 << 2)
+#define L3GD20_FIFO_SRC_FSS_3_bm           (1 << 3)
+#define L3GD20_FIFO_SRC_FSS_4_bm           (1 << 4)
+#define L3GD20_FIFO_SRC_EMPTY_bm           (1 << 5)
+#define L3GD20_FIFO_SRC_OVRUN_bm           (1 << 6)
+#define L3GD20_FIFO_SRC_WTM_bm             (1 << 7)
+
+/* Gyroscope interrupt configuration */
+
+#define L3GD20_INT_GEN_CFG_X_L_IE_bm       (1 << 0)
+#define L3GD20_INT_GEN_CFG_X_H_IE_bm       (1 << 1)
+#define L3GD20_INT_GEN_CFG_Y_L_IE_bm       (1 << 2)
+#define L3GD20_INT_GEN_CFG_Y_H_IE_bm       (1 << 3)
+#define L3GD20_INT_GEN_CFG_Z_L_IE_bm       (1 << 4)
+#define L3GD20_INT_GEN_CFG_Z_H_IE_bm       (1 << 5)
+#define L3GD20_INT_GEN_CFG_LIR_bm          (1 << 6)
+#define L3GD20_INT_GEN_CFG_AOI_bm          (1 << 7)
+
+
+/* Gyroscope interrupt source */
+
+#define L3GD20_INT_GEN_SRC_X_L_bm          (1 << 0)
+#define L3GD20_INT_GEN_SRC_X_H_bm          (1 << 1)
+#define L3GD20_INT_GEN_SRC_Y_L_bm          (1 << 2)
+#define L3GD20_INT_GEN_SRC_Y_H_bm          (1 << 3)
+#define L3GD20_INT_GEN_SRC_Z_L_bm          (1 << 4)
+#define L3GD20_INT_GEN_SRC_Z_H_bm          (1 << 5)
+#define L3GD20_INT_GEN_SRC_I_A_bm          (1 << 6)
+#define L3GD20_INT_GEN_SRC_RES7_           (1 << 7)
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* A reference to a structure of this type must be passed to the L3GD20
+ * driver. This structure provides information about the configuration
+ * of the sensor and provides some board-specific hooks.
+ *
+ * Memory for this structure is provided by the caller.  It is not copied
+ * by the driver and is presumed to persist while the driver is active.
+ */
+
+struct l3gd20_config_s
+{
+  /* Since multiple L3GD20 can be connected to the same SPI bus we need
+   * to use multiple spi device ids which are employed by NuttX to select/
+   * deselect the desired L3GD20 chip via their chip select inputs.
+   */
+
+  int spi_devid;
+
+  /* The IRQ number must be provided for each L3GD20 device so that
+   * their interrupts can be distinguished.
+   */
+
+  int irq;
+
+  /* Attach the L3GD20 interrupt handler to the GPIO interrupt of the
+   * concrete L3GD20 instance.
+   */
+
+  int (*attach)(FAR struct l3gd20_config_s *, xcpt_t);
+};
+
+/* Data returned by reading from the L3GD20 is returned in this format. */
+
+struct l3gd20_sensor_data_s
+{
+  int16_t x_gyr;              /* Measurement result for x axis */
+  int16_t y_gyr;              /* Measurement result for y axis */
+  int16_t z_gyr;              /* Measurement result for z axis */
+  int8_t temperature;         /* Measurement result for temperature sensor */
+};
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: l3gd20_register
+ *
+ * Description:
+ *   Register the L3DF20 character device as 'devpath'.
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register, e.g., "/dev/gyr0".
+ *   i2c     - An SPI driver instance.
+ *   config  - configuration for the L3GD20 driver. For details see
+ *             description above.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int l3gd20_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
+                    FAR struct l3gd20_config_s *config);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CONFIG_SPI && CONFIG_SENSORS_L3GD20 */
+#endif /* __INCLUDE_NUTTX_SENSORS_L3GD20_H */
diff --git a/include/nuttx/sensors/lis331dl.h b/include/nuttx/sensors/lis331dl.h
index 8d69b5d7c35ab391f309468acef2e7e72202b463..ab86728aa2bb2fcafa97d4e4a44f65e0237d4ef9 100644
--- a/include/nuttx/sensors/lis331dl.h
+++ b/include/nuttx/sensors/lis331dl.h
@@ -100,7 +100,7 @@ struct i2c_master_s;
  *
  ************************************************************************************/
 
-FAR struct lis331dl_dev_s *lis331dl_init(FAR struct i2c_master_s * i2c,
+FAR struct lis331dl_dev_s *lis331dl_init(FAR struct i2c_master_s *i2c,
                                          uint16_t address);
 
 /************************************************************************************
@@ -117,7 +117,7 @@ FAR struct lis331dl_dev_s *lis331dl_init(FAR struct i2c_master_s * i2c,
  *
  ************************************************************************************/
 
-int lis331dl_deinit(FAR struct lis331dl_dev_s * dev);
+int lis331dl_deinit(FAR struct lis331dl_dev_s *dev);
 
 /************************************************************************************
  * Name: lis331dl_powerup
@@ -127,7 +127,7 @@ int lis331dl_deinit(FAR struct lis331dl_dev_s * dev);
  *
  ************************************************************************************/
 
-int lis331dl_powerup(FAR struct lis331dl_dev_s * dev);
+int lis331dl_powerup(FAR struct lis331dl_dev_s *dev);
 
 /************************************************************************************
  * Name: lis331dl_powerdown
@@ -137,7 +137,7 @@ int lis331dl_powerup(FAR struct lis331dl_dev_s * dev);
  *
  ************************************************************************************/
 
-int lis331dl_powerdown(FAR struct lis331dl_dev_s * dev);
+int lis331dl_powerdown(FAR struct lis331dl_dev_s *dev);
 
 /************************************************************************************
  * Name: lis331dl_setconversion
@@ -155,7 +155,7 @@ int lis331dl_powerdown(FAR struct lis331dl_dev_s * dev);
  *
  ************************************************************************************/
 
-int lis331dl_setconversion(FAR struct lis331dl_dev_s * dev, bool full, bool fast);
+int lis331dl_setconversion(FAR struct lis331dl_dev_s *dev, bool full, bool fast);
 
 /************************************************************************************
  * Name: lis331dl_getprecision
@@ -168,7 +168,7 @@ int lis331dl_setconversion(FAR struct lis331dl_dev_s * dev, bool full, bool fast
  *
  ************************************************************************************/
 
-int lis331dl_getprecision(FAR struct lis331dl_dev_s * dev);
+int lis331dl_getprecision(FAR struct lis331dl_dev_s *dev);
 
 /************************************************************************************
  * Name: lis331dl_getsamplerate
@@ -181,7 +181,7 @@ int lis331dl_getprecision(FAR struct lis331dl_dev_s * dev);
  *
  ************************************************************************************/
 
-int lis331dl_getsamplerate(FAR struct lis331dl_dev_s * dev);
+int lis331dl_getsamplerate(FAR struct lis331dl_dev_s *dev);
 
 /************************************************************************************
  * Name: lis331dl_getreadings
@@ -200,7 +200,7 @@ int lis331dl_getsamplerate(FAR struct lis331dl_dev_s * dev);
  ************************************************************************************/
 
 FAR const struct lis331dl_vector_s *
-  lis331dl_getreadings(FAR struct lis331dl_dev_s * dev);
+  lis331dl_getreadings(FAR struct lis331dl_dev_s *dev);
 
 #undef EXTERN
 #if defined(__cplusplus)
diff --git a/include/nuttx/sensors/lis3dsh.h b/include/nuttx/sensors/lis3dsh.h
new file mode 100644
index 0000000000000000000000000000000000000000..c059bb94332fc37eb44616057ea2d99059ced6c8
--- /dev/null
+++ b/include/nuttx/sensors/lis3dsh.h
@@ -0,0 +1,277 @@
+/****************************************************************************
+ * include/nuttx/sensors/lis3dsh.h
+ *
+ *   Copyright (C) 2016 DS-Automotion GmbH. All rights reserved.
+ *   Author:  Alexander Entinger 
+ *            Thomas Ilk
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_SENSORS_LIS3DSH_H
+#define __INCLUDE_NUTTX_SENSORS_LIS3DSH_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+#include 
+
+#if defined(CONFIG_SPI) && defined(CONFIG_LIS3DSH)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* LIS3DSH Register Definitions **********************************************/
+
+#define LIS3DSH_INFO_REG_1    (0x0D)
+#define LIS3DSH_INFO_REG_2    (0x0E)
+#define LIS3DSH_WHO_AM_I_REG  (0x0F)
+#define LIS3DSH_CTRL_REG_1    (0x21)
+#define LIS3DSH_CTRL_REG_2    (0x22)
+#define LIS3DSH_CTRL_REG_3    (0x23)
+#define LIS3DSH_CTRL_REG_4    (0x20)
+#define LIS3DSH_CTRL_REG_5    (0x24)
+#define LIS3DSH_CTRL_REG_6    (0x25)
+#define LIS3DSH_STATUS_REG    (0x27)
+#define LIS3DSH_OUT_T_REG     (0x0C)
+#define LIS3DSH_OFF_X_REG     (0x10)
+#define LIS3DSH_OFF_Y_REG     (0x11)
+#define LIS3DSH_OFF_Z_REG     (0x12)
+#define LIS3DSH_CS_X_REG      (0x13)
+#define LIS3DSH_CS_Y_REG      (0x14)
+#define LIS3DSH_CS_Z_REG      (0x15)
+#define LIS3DSH_LC_L_REG      (0x16)
+#define LIS3DSH_LC_H_REG      (0x17)
+#define LIS3DSH_STAT_REG      (0x18)
+#define LIS3DSH_PEAK1_REG     (0x19)
+#define LIS3DSH_PEAK2_REG     (0x1A)
+#define LIS3DSH_VFC_REG_1     (0x1B)
+#define LIS3DSH_VFC_REG_2     (0x1C)
+#define LIS3DSH_VFC_REG_3     (0x1D)
+#define LIS3DSH_VFC_REG_4     (0x1E)
+#define LIS3DSH_THRS3_REG     (0x1F)
+#define LIS3DSH_OUT_X_L_REG   (0x28)
+#define LIS3DSH_OUT_X_H_REG   (0x29)
+#define LIS3DSH_OUT_Y_L_REG   (0x2A)
+#define LIS3DSH_OUT_Y_H_REG   (0x2B)
+#define LIS3DSH_OUT_Z_L_REG   (0x2C)
+#define LIS3DSH_OUT_Z_H_REG   (0x2D)
+#define LIS3DSH_FIFO_CTRL_REG (0x2E)
+#define LIS3DSH_FIFO_SRC_REG  (0x2F)
+#define LIS3DSH_FIFO_CTRL_REG (0x2E)
+#define LIS3DSH_ST1_REG_1     (0x40)
+#define LIS3DSH_ST1_REG_2     (0x41)
+#define LIS3DSH_ST1_REG_3     (0x42)
+#define LIS3DSH_ST1_REG_4     (0x43)
+#define LIS3DSH_ST1_REG_5     (0x44)
+#define LIS3DSH_ST1_REG_6     (0x45)
+#define LIS3DSH_ST1_REG_7     (0x46)
+#define LIS3DSH_ST1_REG_8     (0x47)
+#define LIS3DSH_ST1_REG_9     (0x48)
+#define LIS3DSH_ST1_REG_10    (0x49)
+#define LIS3DSH_ST1_REG_11    (0x4A)
+#define LIS3DSH_ST1_REG_12    (0x4B)
+#define LIS3DSH_ST1_REG_13    (0x4C)
+#define LIS3DSH_ST1_REG_14    (0x4D)
+#define LIS3DSH_ST1_REG_15    (0x4E)
+#define LIS3DSH_ST1_REG_16    (0x4F)
+#define LIS3DSH_TIM4_1_REG    (0x50)
+#define LIS3DSH_TIM3_1_REG    (0x51)
+#define LIS3DSH_TIM2_1_REG_1  (0x52)
+#define LIS3DSH_TIM2_1_REG_2  (0x53)
+#define LIS3DSH_TIM1_1_REG_1  (0x54)
+#define LIS3DSH_TIM1_1_REG_5  (0x55)
+#define LIS3DSH_THRS2_1_REG   (0x56)
+#define LIS3DSH_THRS1_1_REG   (0x57)
+#define LIS3DSH_MASK1_B_REG   (0x59)
+#define LIS3DSH_MASK1_A_REG   (0x5A)
+#define LIS3DSH_SETT1_REG     (0x5B)
+#define LIS3DSH_PR1_REG       (0x5C)
+#define LIS3DSH_TC1_REG_1     (0x5D)
+#define LIS3DSH_TC1_REG_2     (0x5E)
+#define LIS3DSH_OUTS1_REG     (0x5F)
+#define LIS3DSH_ST2_REG_1     (0x60)
+#define LIS3DSH_ST2_REG_2     (0x61)
+#define LIS3DSH_ST2_REG_3     (0x62)
+#define LIS3DSH_ST2_REG_4     (0x63)
+#define LIS3DSH_ST2_REG_5     (0x64)
+#define LIS3DSH_ST2_REG_6     (0x65)
+#define LIS3DSH_ST2_REG_7     (0x66)
+#define LIS3DSH_ST2_REG_8     (0x67)
+#define LIS3DSH_ST2_REG_9     (0x68)
+#define LIS3DSH_ST2_REG_10    (0x69)
+#define LIS3DSH_ST2_REG_11    (0x6A)
+#define LIS3DSH_ST2_REG_12    (0x6B)
+#define LIS3DSH_ST2_REG_13    (0x6C)
+#define LIS3DSH_ST2_REG_14    (0x6D)
+#define LIS3DSH_ST2_REG_15    (0x6E)
+#define LIS3DSH_ST2_REG_16    (0x6F)
+#define LIS3DSH_TIM4_2_REG    (0x70)
+#define LIS3DSH_TIM3_2_REG    (0x71)
+#define LIS3DSH_TIM2_2_REG_1  (0x72)
+#define LIS3DSH_TIM2_2_REG_2  (0x73)
+#define LIS3DSH_TIM1_2_REG_1  (0x74)
+#define LIS3DSH_TIM1_2_REG_5  (0x75)
+#define LIS3DSH_THRS2_2_REG   (0x76)
+#define LIS3DSH_THRS1_2_REG   (0x77)
+#define LIS3DSH_DES2_REG      (0x78)
+#define LIS3DSH_MASK2_B_REG   (0x79)
+#define LIS3DSH_MASK2_A_REG   (0x7A)
+#define LIS3DSH_SETT2_REG     (0x7B)
+#define LIS3DSH_PR2_REG       (0x7C)
+#define LIS3DSH_TC2_REG_1     (0x7D)
+#define LIS3DSH_TC2_REG_2     (0x7E)
+
+/* LIS3DSH CTRL_REG_3 Definitions **********************************************/
+
+#define LIS3DSH_CTRL_REG_3_DR_EN_bm       (1<<7)  /* DRDY signal enable to INT 1 */
+#define LIS3DSH_CTRL_REG_3_IEA_bm         (1<<6)  /* Interrupt signal polarity */
+#define LIS3DSH_CTRL_REG_3_IEL_bm         (1<<5)  /* Interrupt signal latching */
+#define LIS3DSH_CTRL_REG_3_INT2_EN_bm     (1<<4)  /* Interrupt 2 enable / disable */
+#define LIS3DSH_CTRL_REG_3_INT1_EN_bm     (1<<3)  /* Interrupt 1 enable / disable */
+#define LIS3DSH_CTRL_REG_3_VFILT_bm       (1<<2)  /* Vector filter enable / disable */
+#define LIS3DSH_CTRL_REG_3_STRT_bm        (1<<0)  /* Enable soft reset */
+
+/* LIS3DSH CTRL_REG_4 Definitions **********************************************/
+
+#define LIS3DSH_CTRL_REG_4_ODR_3_bm       (1<<7)  /* Output data rate and power mode selection bit 3 */
+#define LIS3DSH_CTRL_REG_4_ODR_2_bm       (1<<6)  /* Output data rate and power mode selection bit 2 */
+#define LIS3DSH_CTRL_REG_4_ODR_1_bm       (1<<5)  /* Output data rate and power mode selection bit 1 */
+#define LIS3DSH_CTRL_REG_4_ODR_0_bm       (1<<4)  /* Output data rate and power mode selection bit 0 */
+#define LIS3DSH_CTRL_REG_4_BDU_bm         (1<<3)  /* Enable block data update for accelerating data */
+#define LIS3DSH_CTRL_REG_4_ZEN_bm         (1<<2)  /* Enable Z-axis */
+#define LIS3DSH_CTRL_REG_4_YEN_bm         (1<<1)  /* Enable Y-axis */
+#define LIS3DSH_CTRL_REG_4_XEN_bm         (1<<0)  /* Enable X-axis */
+
+/* LIS3DSH CTRL_REG_5 Definitions **********************************************/
+
+#define LIS3DSH_CTRL_REG_5_BW_2_bm        (1<<7)  /* Anti-aliasing filter bandwidth bit 2 */
+#define LIS3DSH_CTRL_REG_5_BW_1_bm        (1<<6)  /* Anti-aliasing filter bandwidth bit 1 */
+#define LIS3DSH_CTRL_REG_5_FSCALE_2_bm    (1<<5)  /* Full-scale selection bit 2 */
+#define LIS3DSH_CTRL_REG_5_FSCALE_1_bm    (1<<4)  /* Full-scale selection bit 1 */
+#define LIS3DSH_CTRL_REG_5_FSCALE_0_bm    (1<<3)  /* Full-scale selection bit 0 */
+#define LIS3DSH_CTRL_REG_5_ST_2_bm        (1<<2)  /* Enable self-test bit 2 */
+#define LIS3DSH_CTRL_REG_5_ST_1_bm        (1<<1)  /* Enable self-test bit 1 */
+#define LIS3DSH_CTRL_REG_5_SIM_bm         (1<<0)  /* Enable SPI 4-wire interface */
+
+/* LIS3DSH CTRL_REG_6 Definitions **********************************************/
+
+#define LIS3DSH_CTRL_REG_6_BOOT_bm        (1<<7)  /* Force reboot, cleared as soon as the reboot is finished. Active high */
+#define LIS3DSH_CTRL_REG_6_FIFO_EN_bm     (1<<6)  /* Enable FIFO */
+#define LIS3DSH_CTRL_REG_6_WTM_EN_bm      (1<<5)  /* Enable FIFO watermark level use */
+#define LIS3DSH_CTRL_REG_6_ADD_INC_bm     (1<<4)  /* Register address automatically incremented during a multiple byte access with a serial interface */
+#define LIS3DSH_CTRL_REG_6_P1_EMPTY_bm    (1<<3)  /* Enable FIFO empty indication on Int1 */
+#define LIS3DSH_CTRL_REG_6_P1_WTM_bm      (1<<2)  /* FIFO watermark interrupt Int1 */
+#define LIS3DSH_CTRL_REG_6_P1_OVERRUN_bm  (1<<1)  /* FIFO overrrun interrupt on Int1 */
+#define LIS3DSH_CTRL_REG_6_P2_BOOT_bm     (1<<0)  /* BOOT interrupt on Int2 */
+
+/* SPI BUS PARAMETERS *******************************************************/
+
+#define LIS3DSH_SPI_FREQUENCY    (5000000)        /* 5 MHz */
+#define LIS3DSH_SPI_MODE         (SPIDEV_MODE3)   /* Device uses SPI Mode 3: CPOL=1, CPHA=1 */
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* A reference to a structure of this type must be passed to the LIS3DSH
+ * driver. This structure provides information about the configuration
+ * of the sensor and provides some board-specific hooks.
+ *
+ * Memory for this structure is provided by the caller.  It is not copied
+ * by the driver and is presumed to persist while the driver is active.
+ */
+
+struct lis3dsh_config_s
+{
+  /* Since multiple sensors can be connected to the same SPI bus we need
+   * to use multiple spi device ids which are employed by NuttX to select/
+   * deselect the desired LIS3DSH chip via their chip select inputs.
+   */
+
+  int spi_devid;
+
+  /* The IRQ number must be provided for each LIS3DSH device so that
+   * their interrupts can be distinguished.
+   */
+
+  int irq;
+
+  /* Attach the LIS3DSH interrupt handler to the GPIO interrupt of the
+   * concrete LIS3DSH instance.
+   */
+
+  int (*attach)(FAR struct lis3dsh_config_s *, xcpt_t);
+};
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: lis3dsh_register
+ *
+ * Description:
+ *   Register the LIS3DSH character device as 'devpath'
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/acc0"
+ *   spi     - An instance of the SPI interface to use to communicate with
+ *             LIS3DSH
+ *   config  - configuration for the LIS3DSH driver. For details see
+ *             description above.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int lis3dsh_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
+                     FAR struct lis3dsh_config_s *config);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CONFIG_SPI && CONFIG_LIS3DSH */
+#endif /* __INCLUDE_NUTTX_SENSORS_LIS3DSH_H */
diff --git a/include/nuttx/sensors/lis3mdl.h b/include/nuttx/sensors/lis3mdl.h
new file mode 100644
index 0000000000000000000000000000000000000000..e5acba39404121491cffcf62703e42e4ec3c62e0
--- /dev/null
+++ b/include/nuttx/sensors/lis3mdl.h
@@ -0,0 +1,180 @@
+/****************************************************************************
+ * include/nuttx/sensors/lis3mdl.h
+ *
+ *   Copyright (C) 2016 DS-Automotion GmbH. All rights reserved.
+ *   Author: Alexander Entinger 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_SENSORS_LIS3MDL_H
+#define __INCLUDE_NUTTX_SENSORS_LIS3MDL_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+#include 
+
+#if defined(CONFIG_SPI) && defined(CONFIG_LIS3MDL)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* LIS3MDL Register Definitions *********************************************/
+
+#define LIS3MDL_WHO_AM_I_REG    (0x0F)
+#define LIS3MDL_CTRL_REG_1      (0x20)
+#define LIS3MDL_CTRL_REG_2      (0x21)
+#define LIS3MDL_CTRL_REG_3      (0x22)
+#define LIS3MDL_CTRL_REG_4      (0x23)
+#define LIS3MDL_CTRL_REG_5      (0x24)
+#define LIS3MDL_STATUS_REG      (0x27)
+#define LIS3MDL_OUT_X_L_REG     (0x28)
+#define LIS3MDL_OUT_X_H_REG     (0x29)
+#define LIS3MDL_OUT_Y_L_REG     (0x2A)
+#define LIS3MDL_OUT_Y_H_REG     (0x2B)
+#define LIS3MDL_OUT_Z_L_REG     (0x2C)
+#define LIS3MDL_OUT_Z_H_REG     (0x2D)
+#define LIS3MDL_TEMP_OUT_L_REG  (0x2E)
+#define LIS3MDL_TEMP_OUT_H_REG  (0x2F)
+#define LIS3MDL_INT_CFG_REG     (0x30)
+#define LIS3MDL_INT_SRC_REG     (0x31)
+#define LIS3MDL_INT_THS_L_REG   (0x32)
+#define LIS3MDL_INT_THS_H_REG   (0x33)
+
+/* LIS3MDL CTRL_REG_1 Bit Definitions ***************************************/
+
+#define LIS3MDL_CTRL_REG_1_TEMP_EN_bm      (1<<7)   /* Enable the temperature sensor */
+#define LIS3MDL_CTRL_REG_1_OM_1_bm         (1<<6)   /* Select the operating mode of X and Y axis bit 1 */
+#define LIS3MDL_CTRL_REG_1_OM_0_bm         (1<<5)   /* Select the operating mode of X and Y axis bit 0 */
+#define LIS3MDL_CTRL_REG_1_DO2_bm          (1<<4)   /* Output data rate selection bit 2 */
+#define LIS3MDL_CTRL_REG_1_DO1_bm          (1<<3)   /* Output data rate selection bit 1 */
+#define LIS3MDL_CTRL_REG_1_DO0_bm          (1<<2)   /* Output data rate selection bit 2 */
+#define LIS3MDL_CTRL_REG_1_FAST_ODR_bm     (1<<1)   /* Enable higher output data rates */
+
+/* LIS3MDL CTRL_REG_2 Bit Definitions ***************************************/
+
+#define LIS3MDL_CTRL_REG_2_FS_1_bm         (1<<6)   /* Full scale selection bit 1 */
+#define LIS3MDL_CTRL_REG_2_FS_0_bm         (1<<5)   /* Full scale selection bit 0 */
+#define LIS3MDL_CTRL_REG_2_REBOOT_bm       (1<<3)   /* Reboot Memory Content */
+#define LIS3MDL_CTRL_REG_2_SOFT_RST_bm     (1<<2)   /* Soft Reset */
+
+/* LIS3MDL CTRL_REG_4 Bit Definitions ***************************************/
+
+#define LIS3MDL_CTRL_REG_4_OMZ_1_bm        (1<<3)   /* Select the operating mode of Z axis bit 1 */
+#define LIS3MDL_CTRL_REG_4_OMZ_0_bm        (1<<2)   /* Select the operating mode of Z axis bit 0 */
+
+/* LIS3MDL CTRL_REG_5 Bit Definitions ***************************************/
+
+#define LIS3MDL_CTRL_REG_5_BDU_bm          (1<<6)   /* Enable block data update for magnetic data (prevent race conditions while reading) */
+
+/* SPI BUS PARAMETERS *******************************************************/
+
+#define LIS3MDL_SPI_FREQUENCY    (1000000)        /* 1 MHz */
+#define LIS3MDL_SPI_MODE         (SPIDEV_MODE3)   /* Device uses SPI Mode 3: CPOL=1, CPHA=1 */
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* A reference to a structure of this type must be passed to the LIS3MDL
+ * driver. This structure provides information about the configuration
+ * of the sensor and provides some board-specific hooks.
+ *
+ * Memory for this structure is provided by the caller.  It is not copied
+ * by the driver and is presumed to persist while the driver is active.
+ */
+
+struct lis3mdl_config_s
+{
+  /* Since multiple LIS3MDL can be connected to the same SPI bus we need
+   * to use multiple spi device ids which are employed by NuttX to select/
+   * deselect the desired LIS3MDL chip via their chip select inputs.
+   */
+
+  int spi_devid;
+
+  /* The IRQ number must be provided for each so LIS3MDL device so that
+   * their interrupts can be distinguished.
+   */
+
+  int irq;
+
+  /* Attach the LIS3MDL interrupt handler to the GPIO interrupt of the
+   * concrete LIS3MDL instance.
+   */
+
+  int (*attach)(FAR struct lis3mdl_config_s *, xcpt_t);
+};
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: lis3mdl_register
+ *
+ * Description:
+ *   Register the LIS3MDL character device as 'devpath'
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/mag0"
+ *   spi     - An instance of the SPI interface to use to communicate with
+ *             LIS3MDL
+ *   config  - configuration for the LIS3MDL driver. For details see
+ *             description above.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int lis3mdl_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
+                     FAR struct lis3mdl_config_s const *config);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CONFIG_SPI && CONFIG_LIS3MDL */
+#endif /* __INCLUDE_NUTTX_SENSORS_LIS3MDL_H */
diff --git a/include/nuttx/sensors/lm75.h b/include/nuttx/sensors/lm75.h
index 827620adab91089975dd3686c6b40f6de1d91557..f12e2120a17ecca1c4ae76d9c598e626a9cd209d 100644
--- a/include/nuttx/sensors/lm75.h
+++ b/include/nuttx/sensors/lm75.h
@@ -41,7 +41,7 @@
  ****************************************************************************/
 
 #include 
-#include 
+#include 
 
 #if defined(CONFIG_I2C) && defined(CONFIG_I2C_LM75)
 
@@ -63,19 +63,6 @@
 #define CONFIG_LM75_ADDR6 (CONFIG_LM75_BASEADDR + 6)
 #define CONFIG_LM75_ADDR7 (CONFIG_LM75_BASEADDR + 7)
 
-/* IOCTL Commands ***********************************************************/
-
-#define SNIOC_READCONF     _SNIOC(0x0001) /* Arg: uint8_t* pointer */
-#define SNIOC_WRITECONF    _SNIOC(0x0002) /* Arg: uint8_t value */
-#define SNIOC_SHUTDOWN     _SNIOC(0x0003) /* Arg: None */
-#define SNIOC_POWERUP      _SNIOC(0x0004) /* Arg: None */
-#define SNIOC_FAHRENHEIT   _SNIOC(0x0005) /* Arg: None */
-#define SNIOC_CENTIGRADE   _SNIOC(0x0006) /* Arg: None */
-#define SNIOC_READTHYS     _SNIOC(0x0007) /* Arg: b16_t* pointer */
-#define SNIOC_WRITETHYS    _SNIOC(0x0008) /* Arg: b16_t value */
-#define SNIOC_READTOS      _SNIOC(0x0009) /* Arg: b16_t* pointer */
-#define SNIOC_WRITETOS     _SNIOC(0x000a) /* Arg: b16_t value */
-
 /* LM-75 Register Definitions ***********************************************/
 /* LM-75 Registers addresses */
 
diff --git a/include/nuttx/sensors/lm92.h b/include/nuttx/sensors/lm92.h
index 8b49a0da93603603a883dd1aea309110bcabb2d1..4bfa3423f0ff1c2594e478b128a202b82e9e57d5 100644
--- a/include/nuttx/sensors/lm92.h
+++ b/include/nuttx/sensors/lm92.h
@@ -43,7 +43,7 @@
  ****************************************************************************/
 
 #include 
-#include 
+#include 
 
 #if defined(CONFIG_I2C) && defined(CONFIG_LM92)
 
@@ -61,24 +61,6 @@
 #define CONFIG_LM92_ADDR2 (CONFIG_LM92_BASEADDR + 2)
 #define CONFIG_LM92_ADDR3 (CONFIG_LM92_BASEADDR + 3)
 
-/* IOCTL Commands ***********************************************************/
-
-#define SNIOC_READCONF     _SNIOC(0x0001) /* Arg: uint8_t* pointer */
-#define SNIOC_WRITECONF    _SNIOC(0x0002) /* Arg: uint8_t value */
-#define SNIOC_SHUTDOWN     _SNIOC(0x0003) /* Arg: None */
-#define SNIOC_POWERUP      _SNIOC(0x0004) /* Arg: None */
-#define SNIOC_FAHRENHEIT   _SNIOC(0x0005) /* Arg: None */
-#define SNIOC_CENTIGRADE   _SNIOC(0x0006) /* Arg: None */
-#define SNIOC_READTHYS     _SNIOC(0x0007) /* Arg: b16_t* pointer */
-#define SNIOC_WRITETHYS    _SNIOC(0x0008) /* Arg: b16_t value */
-#define SNIOC_READTCRIT    _SNIOC(0x0009) /* Arg: b16_t* pointer */
-#define SNIOC_WRITETCRIT   _SNIOC(0x000a) /* Arg: b16_t value */
-#define SNIOC_READTLOW     _SNIOC(0x000b) /* Arg: b16_t* pointer */
-#define SNIOC_WRITETLOW    _SNIOC(0x000c) /* Arg: b16_t value */
-#define SNIOC_READTHIGH    _SNIOC(0x000d) /* Arg: b16_t* pointer */
-#define SNIOC_WRITETHIGH   _SNIOC(0x000e) /* Arg: b16_t value */
-#define SNIOC_READID       _SNIOC(0x000f) /* Arg: uint16_t* pointer */
-
 /* LM92 Register Definitions ***********************************************/
 /* LM92 Register Addresses */
 
diff --git a/include/nuttx/sensors/lsm9ds1.h b/include/nuttx/sensors/lsm9ds1.h
index cf3ef1b3c7682d335585c926d373793e2857c384..dc7b103ef62e8f4601513ca0afb3a9d8efe2d644 100644
--- a/include/nuttx/sensors/lsm9ds1.h
+++ b/include/nuttx/sensors/lsm9ds1.h
@@ -41,19 +41,13 @@
  ****************************************************************************/
 
 #include 
-#include 
+#include 
 
 #if defined(CONFIG_I2C) && defined(CONFIG_SN_LSM9DS1)
 
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
-/* IOCTL Commands ***********************************************************/
-
-#define SNIOC_START         _SNIOC(0x0001) /* Arg: None */
-#define SNIOC_STOP          _SNIOC(0x0002) /* Arg: None */
-#define SNIOC_SETSAMPLERATE _SNIOC(0x0003) /* Arg: uint32_t value */
-#define SNIOC_SETFULLSCALE  _SNIOC(0x0004) /* Arg: uint32_t value */
 
 /* I2C Addresses ************************************************************/
 /* Accelerometer addresses */
diff --git a/include/nuttx/sensors/mb7040.h b/include/nuttx/sensors/mb7040.h
index 0280ecadb6fc01a0458d89f103fb8d336f642700..1c7ed9c51b8cff6f96663a594f82b16c272f39eb 100644
--- a/include/nuttx/sensors/mb7040.h
+++ b/include/nuttx/sensors/mb7040.h
@@ -41,7 +41,7 @@
  ****************************************************************************/
 
 #include 
-#include 
+#include 
 
 #if defined(CONFIG_I2C) && defined(CONFIG_MB7040)
 
@@ -57,12 +57,6 @@
  *   Enables support for the MB7040 driver
  */
 
-/* IOCTL Commands ***********************************************************/
-
-#define SNIOC_MEASURE          _SNIOC(0x0001) /* Arg: None */
-#define SNIOC_RANGE            _SNIOC(0x0002) /* Arg: int32_t* pointer */
-#define SNIOC_CHANGEADDR       _SNIOC(0x0003) /* Arg: uint8_t value */
-
 /* I2C Addresses ************************************************************/
 
 #define MB7040_DEFAULTADDR     0x70 /* Default I2C Address */
diff --git a/include/nuttx/sensors/mcp9844.h b/include/nuttx/sensors/mcp9844.h
index 97a8f2bda32e68d24cc83f19e7c0854cb6c881eb..2ef65702fd4f1810ca57e7973f40ececfec83712 100644
--- a/include/nuttx/sensors/mcp9844.h
+++ b/include/nuttx/sensors/mcp9844.h
@@ -33,15 +33,15 @@
  *
  ****************************************************************************/
 
-#ifndef __NUTTX_INCLUDE_NUTTX_SENSORS_MCP9844_H
-#define __NUTTX_INCLUDE_NUTTX_SENSORS_MCP9844_H
+#ifndef __INCLUDE_NUTTX_SENSORS_MCP9844_H
+#define __INCLUDE_NUTTX_SENSORS_MCP9844_H
 
 /****************************************************************************
  * Included Files
  ****************************************************************************/
 
 #include 
-#include 
+#include 
 
 #if defined(CONFIG_I2C) && defined(CONFIG_MCP9844)
 
@@ -49,11 +49,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* IOCTL Commands ***********************************************************/
-
-#define SNIOC_READTEMP      _SNIOC(0x0001)  /* Arg: mcp9844_temp_arg_s* pointer */
-#define SNIOC_SETRESOLUTION _SNIOC(0x0002)  /* Arg: uint16_t value */
-
 /* MCP9844 Register Definitions *********************************************/
 
 /* MCP9844 Registers addresses */
@@ -125,4 +120,4 @@ int mcp9844_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
 #endif
 
 #endif /* CONFIG_I2C && CONFIG_MCP9844 */
-#endif /* __NUTTX_INCLUDE_NUTTX_SENSORS_MCP9844_H */
+#endif /* __INCLUDE_NUTTX_SENSORS_MCP9844_H */
diff --git a/include/nuttx/sensors/mlx90393.h b/include/nuttx/sensors/mlx90393.h
new file mode 100644
index 0000000000000000000000000000000000000000..16ea5a73c68436f3b51781eac48b7cd3861fea8e
--- /dev/null
+++ b/include/nuttx/sensors/mlx90393.h
@@ -0,0 +1,153 @@
+/****************************************************************************
+ * include/nuttx/sensors/mlx90393.h
+ *
+ *   Copyright (C) 2016 DS-Automotion GmbH. All rights reserved.
+ *   Author: Alexander Entinger 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_SENSORS_MLX90393_H
+#define __INCLUDE_NUTTX_SENSORS_MLX90393_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+#include 
+
+#if defined(CONFIG_SPI) && defined(CONFIG_MLX90393)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* MLX90393 Command Definitions *********************************************/
+
+#define MLX90393_SB               (0x10)          /* SB = Start Burst Mode */
+#define MLX90393_SW               (0x20)          /* SW = Start Wake-up on Change Mode */
+#define MLX90393_SM               (0x30)          /* SB = Start Single Measurement Mode */
+#define MLX90393_RM               (0x40)          /* RM = Read Measurement */
+#define MLX90393_RR               (0x50)          /* RR = Read Register */
+#define MLX90393_WR               (0x60)          /* WR = Write Register */
+#define MLX90393_EX               (0x80)          /* EX = Exit Mode */
+#define MLX90393_HR               (0xD0)          /* HR = Memory Recall */
+#define MLX90393_HS               (0xE0)          /* HS = Memory Store */
+#define MLX90393_RT               (0xF0)          /* RT = Reset */
+
+/* MLX90393 Sensor Selection Bit Definitions ********************************/
+
+#define MLX90393_T_bm             (1<<0)          /* Temperature Sensor Bitmask  */
+#define MLX90393_X_bm             (1<<1)          /* Magnetometer X-Axis Bitmask */
+#define MLX90393_Y_bm             (1<<2)          /* Magnetometer Y-Axis Bitmask */
+#define MLX90393_Z_bm             (1<<3)          /* Magnetometer Z-Axis Bitmask */
+#define MLX90393_ZYXT_bm          (MLX90393_Z_bm | MLX90393_Y_bm | MLX90393_X_bm | MLX90393_T_bm)
+
+/* SPI BUS PARAMETERS *******************************************************/
+
+#define MLX90393_SPI_FREQUENCY    (1000000)        /* 1 MHz */
+#define MLX90393_SPI_MODE         (SPIDEV_MODE3)   /* Device uses SPI Mode 3: CPOL=1, CPHA=1 */
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* A reference to a structure of this type must be passed to the MLX90393
+ * driver. This structure provides information about the configuration
+ * of the sensor and provides some board-specific hooks.
+ *
+ * Memory for this structure is provided by the caller.  It is not copied
+ * by the driver and is presumed to persist while the driver is active.
+ */
+
+struct mlx90393_config_s
+{
+  /* Since multiple MLX90393 can be connected to the same SPI bus we need
+   * to use multiple spi device ids which are employed by NuttX to select/
+   * deselect the desired MLX90393 chip via their chip select inputs.
+   */
+
+  int spi_devid;
+
+  /* The IRQ number must be provided for each so MLX90393 device so that
+   * their interrupts can be distinguished.
+   */
+
+  int irq;
+
+  /* Attach the MLX90393 interrupt handler to the GPIO interrupt of the
+   * concrete MLX90393 instance.
+   */
+
+  int (*attach)(FAR struct mlx90393_config_s *, xcpt_t);
+};
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: mlx90393_register
+ *
+ * Description:
+ *   Register the MLX90393 character device as 'devpath'
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/mag0"
+ *   spi     - An instance of the SPI interface to use to communicate with
+ *             MLX90393
+ *   config  - Describes the configuration of the MLX90393 part.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int mlx90393_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
+                      FAR struct mlx90393_config_s *config);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CONFIG_SPI && CONFIG_MLX90393 */
+
+#endif /* __INCLUDE_NUTTX_SENSORS_MLX90393_H */
diff --git a/include/nuttx/sensors/mpl115a.h b/include/nuttx/sensors/mpl115a.h
index c958c8025df9487c2208769fe68edb159f01010a..4df7de55d13993916b76086006ac052618b45fa4 100644
--- a/include/nuttx/sensors/mpl115a.h
+++ b/include/nuttx/sensors/mpl115a.h
@@ -33,8 +33,8 @@
  *
  ********************************************************************************************/
 
-#ifndef __DRIVERS_SENSORS_MPL115A_H
-#define __DRIVERS_SENSORS_MPL115A_H
+#ifndef __INCLUDE_NUTTX_SENSORS_MPL115A_H
+#define __INCLUDE_NUTTX_SENSORS_MPL115A_H
 
 #include 
 
@@ -49,7 +49,7 @@
  * CONFIG_SENSORS_MPL115A
  *   Enables support for the MPL115A driver
  * CONFIG_MPL115A_REGDEBUG
- *   Enable very low register-level debug output.  Requires CONFIG_DEBUG.
+ *   Enable very low register-level debug output.  Requires CONFIG_DEBUG_FEATURES.
  */
 
 /* There are two types of MPL115A chips. The MPL115A1 communicates with the target CPU
@@ -127,4 +127,4 @@ int mpl115a_register(FAR const char *devpath, FAR struct spi_dev_s *spi);
 #endif
 
 #endif /* CONFIG_SPI && CONFIG_MPL115A */
-#endif /* __DRIVERS_SENSORS_MPL115A_H */
+#endif /* __INCLUDE_NUTTX_SENSORS_MPL115A_H */
diff --git a/include/nuttx/sensors/ms58xx.h b/include/nuttx/sensors/ms58xx.h
index 62525d31a6353a227fa7a0dc178b647c2c26b137..fc2bf1c2c3024b9fa3a3c678fcb677751f767298 100644
--- a/include/nuttx/sensors/ms58xx.h
+++ b/include/nuttx/sensors/ms58xx.h
@@ -41,7 +41,7 @@
  ****************************************************************************/
 
 #include 
-#include 
+#include 
 
 #if defined(CONFIG_I2C) && defined(CONFIG_MS58XX)
 
@@ -58,14 +58,6 @@
  * CONFIG_MS58XX_VDD
  */
 
-/* IOCTL Commands ***********************************************************/
-
-#define SNIOC_MEASURE      _SNIOC(0x0001) /* Arg: None */
-#define SNIOC_TEMPERATURE  _SNIOC(0x0002) /* Arg: int32_t* pointer */
-#define SNIOC_PRESSURE     _SNIOC(0x0003) /* Arg: int32_t* pointer */
-#define SNIOC_RESET        _SNIOC(0x0004) /* Arg: None */
-#define SNIOC_OVERSAMPLING _SNIOC(0x0005) /* Arg: uint16_t value */
-
 /* I2C Address **************************************************************/
 
 #define MS58XX_ADDR0       0x76
diff --git a/include/nuttx/sensors/qencoder.h b/include/nuttx/sensors/qencoder.h
index f765ee1956f1a66d2a19ce34c9f1ffeecbcb8ea6..33041f254e9e2e15bd79056862b850e55f35e32f 100644
--- a/include/nuttx/sensors/qencoder.h
+++ b/include/nuttx/sensors/qencoder.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * include/nuttx/qencoder.h
  *
- *   Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __NUTTX_SENSORS_QENCODER_H
-#define __NUTTX_SENSORS_QENCODER_H
+#ifndef __INCLUDE_NUTTX_SENSORS_QENCODER_H
+#define __INCLUDE_NUTTX_SENSORS_QENCODER_H
 
 /****************************************************************************
  * Included Files
@@ -54,9 +54,9 @@
 
 /* IOCTL Commands ***********************************************************/
 /* The Quadrature Encode module uses a standard character driver framework.
- * However, since the driver is a devices control interface and not a data
- * transfer interface, the majority of the functionality is implemented in
- * driver ioctl calls.  The PWM ioctl commands are listed below:
+ * However, since the driver is a device control interface rather than a
+ * data transfer interface, the majority of the functionality is implemented
+ * in driver ioctl calls.  The PWM ioctl commands are listed below:
  *
  * QEIOC_POSITION - Get the current position from the encoder.
  *   Argument: int32_t pointer to the location to return the position.
@@ -67,14 +67,25 @@
 #define QEIOC_POSITION     _QEIOC(0x0001) /* Arg: int32_t* pointer */
 #define QEIOC_RESET        _QEIOC(0x0002) /* Arg: None */
 
-/* User defined ioctl cms should use QEIOC_USER like this:
- *
- * #define QEIOC_MYCMD1    _QEIOC(QEIOC_USER)
- * #define QEIOC_MYCMD2    _QEIOC(QEIOC_USER+1)
- * ...
+#define QE_FIRST           0x0001         /* First required command */
+#define QE_NCMDS           2              /* Two required commands */
+
+/* User defined ioctl commands are also supported. These will be forwarded
+ * by the upper-half QE driver to the lower-half QE driver via the ioctl()
+ * method fo the QE lower-half interface.  However, the lower-half driver
+ * must reserve a block of commands as follows in order prevent IOCTL
+ * command numbers from overlapping.
  */
 
-#define QEIOC_USER         0x0003
+/* See arch/arm/src/tiva/tiva_qencoder.h (Not usable at that location) */
+
+#define QE_TIVA_FIRST      (QE_FIRST + QE_NCMDS)
+#define QE_TIVA_NCMDS      3
+
+/* See include/nuttx/sensors/as5048b.h */
+
+#define QE_AS5048B_FIRST   (QE_TIVA_FIRST + QEIOC_TIVA_NCMDS)
+#define QE_AS5048B_NCMDS   4
 
 /****************************************************************************
  * Public Types
@@ -177,4 +188,4 @@ int qe_register(FAR const char *devpath, FAR struct qe_lowerhalf_s *lower);
 #endif
 
 #endif /* CONFIG_QENCODER */
-#endif /* __NUTTX_SENSORS_QENCODER_H */
+#endif /* __INCLUDE_NUTTX_SENSORS_QENCODER_H */
diff --git a/include/nuttx/sensors/veml6070.h b/include/nuttx/sensors/veml6070.h
new file mode 100644
index 0000000000000000000000000000000000000000..487eb539599df5c1438606346542f85cf1bb105d
--- /dev/null
+++ b/include/nuttx/sensors/veml6070.h
@@ -0,0 +1,122 @@
+/****************************************************************************
+ * include/nuttx/input/veml6070.h
+ *
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Alan Carvalho de Assis. All rights reserved.
+ *   Author: Alan Carvalho de Assis 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_SENSORS_VEML6070_H
+#define __INCLUDE_NUTTX_SENSORS_VEML6070_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+#if defined(CONFIG_VEML6070)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Device I2C Address */
+
+#define VEML6070_I2C_DATA_LSB_CMD_ADDR  0x38
+#define VEML6070_I2C_DATA_MSB_ADDR      0x39
+
+/* Command Register Format
+ * Bits:
+ *  7  |  6  |  5  |    4    |  3  |  2  |  1  |  0 |
+ * RSV | RSV | ACK | ACK_THD | IT1 | IT0 | RSV | SD |
+ *
+ * NOTE: The RSV Bit 1 needs to be always 1
+ */
+
+
+#define VEML6070_CMD_SD           0x01 /* Shutdown command */
+#define VEML6070_CMD_RSV          0x02
+#define VEML6070_CMD_IT_0_5T      0x00 /* IT1=0 : IT0=0 */
+#define VEML6070_CMD_IT_1T        0x04 /* IT1=0 : IT0=1 */
+#define VEML6070_CMD_IT_2T        0x08 /* IT1=1 : IT0=0 */
+#define VEML6070_CMD_IT_4T        0x0c /* IT1=1 : IT0=1 */
+#define VEML6070_CMD_ACK_THD      0x10 /* Acknowledge thresold:
+                                          0 = 102 steps
+                                          1 = 145 steps */
+#define VEML6070_CMD_ACK          0x20 /* Acknowledge activity */
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: veml6070_register
+ *
+ * Description:
+ *   Register the VEML6070 character device as 'devpath'
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/uvlight0"
+ *   i2c     - An instance of the I2C interface to use to communicate with
+ *              VEML6070
+ *   addr    - The I2C address of the VEML6070.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+struct i2c_master_s;
+int veml6070_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
+                       uint8_t addr);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CONFIG_VEML6070 */
+#endif /* __INCLUDE_NUTTX_SENSORS_VEML6070_H */
diff --git a/include/nuttx/sensors/xen1210.h b/include/nuttx/sensors/xen1210.h
new file mode 100644
index 0000000000000000000000000000000000000000..d76b504833179a6fe344b9fc3a8d21b46d021a1d
--- /dev/null
+++ b/include/nuttx/sensors/xen1210.h
@@ -0,0 +1,211 @@
+/********************************************************************************************
+ * include/nuttx/input/xen1210.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Alan Carvalho de Assis 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_SENSORS_XEN1210_H
+#define __INCLUDE_NUTTX_SENSORS_XEN1210_H
+
+/********************************************************************************************
+ * Included Files
+ ********************************************************************************************/
+
+#include 
+#include 
+
+#if defined(CONFIG_XEN1210)
+
+/********************************************************************************************
+ * Pre-processor Definitions
+ ********************************************************************************************/
+
+/* Configuration ****************************************************************************/
+/* Prerequisites:
+ *
+ * CONFIG_SCHED_WORKQUEUE - Work queue support is required
+ *
+ * Settings that effect the driver: CONFIG_DISABLE_POLL
+ *
+ * CONFIG_XEN1210
+ *   Enables support for the XEN1210 driver
+ */
+
+#ifdef CONFIG_DISABLE_SIGNALS
+#  error "Signals are required.  CONFIG_DISABLE_SIGNALS must not be selected."
+#endif
+
+#ifndef CONFIG_SCHED_WORKQUEUE
+#  error "Work queue support required.  CONFIG_SCHED_WORKQUEUE must be selected."
+#endif
+
+/* The XEN1210 interfaces with the target CPU via a SPI interface. */
+
+/* SPI **************************************************************************************/
+/* The device always operates in mode 1 */
+
+#define XEN1210_SPI_MODE            SPIDEV_MODE1 /* Mode 1 */
+
+/* SPI frequency */
+
+#define XEN1210_SPI_MAXFREQUENCY    100000       /* 100KHz */
+
+/* XEN1210 Commands  ************************************************************************/
+/* Operation Commands */
+
+#define XEN1210_RESET               0x10  /* System-Reset command */
+#define XEN1210_POWERON             0x20  /* Power-ON command */
+#define XEN1210_POWEROFF            0x40  /* Power-OFF command */
+#define XEN1210_SINGLESHOT          0x60  /* Single-Shot command */
+
+/* Settings Commands */
+
+#define XEN1210_TIMING              0x01  /* Timing and biasing settings */
+#define XEN1210_TEST                0x02  /* Testing */
+
+/* Timming Cycles */
+
+#define XEN1210_1K_CYCLES           0x1113 /* 1024 cycles used be internale ADC */
+#define XEN1210_2K_CYCLES           0x2113 /* 2048 cycles used be internale ADC */
+#define XEN1210_4K_CYCLES           0x3113 /* 4096 cycles used be internale ADC */
+#define XEN1210_8K_CYCLES           0x4113 /* 8192 cycles used be internale ADC */
+#define XEN1210_16K_CYCLES          0x5113 /* 16384 cycles used be internale ADC */
+#define XEN1210_32K_CYCLES          0x6113 /* 32768 cycles used be internale ADC */
+#define XEN1210_64K_CYCLES          0x7113 /* 64536 cycles used be internale ADC */
+
+/* Test setting */
+
+#define XEN1210_TESTVALUE           0x3A00 /* Default value to be used with Test command */
+
+/********************************************************************************************
+ * Public Types
+ ********************************************************************************************/
+
+/* Form of the GPIO "interrupt handler" callback. Callbacks do not occur from an interrupt
+ * handler but rather from the context of the worker thread with interrupts enabled.
+ */
+
+struct xen1210_config_s;
+typedef void (*xen1210_handler_t)(FAR struct xen1210_config_s *config, FAR void *arg);
+
+/* A reference to a structure of this type must be passed to the XEN1210 driver when the
+ * driver is instantiated. This structure provides information about the configuration of
+ * the XEN1210 and provides some board-specific hooks.
+ *
+ * Memory for this structure is provided by the caller.  It is not copied by the driver
+ * and is presumed to persist while the driver is active. The memory must be writeable
+ * because, under certain circumstances, the driver may modify the frequency.
+ */
+
+struct xen1210_config_s
+{
+  /* Device characterization */
+
+  uint32_t frequency;  /* SPI frequency */
+
+  /* IRQ/GPIO access callbacks.  These operations all hidden behind
+   * callbacks to isolate the XEN1210 driver from differences in GPIO
+   * interrupt handling by varying boards and MCUs.
+   *
+   * attach  - Attach the XEN1210 interrupt handler to the GPIO interrupt
+   * enable  - Enable or disable the GPIO interrupt
+   * clear   - Acknowledge/clear any pending GPIO interrupt
+   */
+
+  int  (*attach)(FAR struct xen1210_config_s *state, xen1210_handler_t handler,
+                 FAR void *arg);
+  void (*enable)(FAR struct xen1210_config_s *state, bool enable);
+  void (*clear)(FAR struct xen1210_config_s *state);
+};
+
+typedef FAR void *XEN1210_HANDLE;
+
+struct spi_dev_s;
+
+/********************************************************************************************
+ * Public Function Prototypes
+ ********************************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/********************************************************************************************
+ * Name: xen1210_instantiate
+ *
+ * Description:
+ *   Instantiate and configure the XEN1210 device driver to use the provided I2C or SPI
+ *   device instance.
+ *
+ * Input Parameters:
+ *   dev     - A SPI driver instance
+ *   config  - Persistent board configuration data
+ *
+ * Returned Value:
+ *   A non-zero handle is returned on success.  This handle may then be used to configure
+ *   the XEN1210 driver as necessary.  A NULL handle value is returned on failure.
+ *
+ ********************************************************************************************/
+
+XEN1210_HANDLE xen1210_instantiate(FAR struct spi_dev_s *dev,
+                                   FAR struct xen1210_config_s *config);
+
+/********************************************************************************************
+ * Name: xen1210_register
+ *
+ * Description:
+ *  This function will register the magnetometer driver as /dev/magN
+ *  where N is the minor device number
+ *
+ * Input Parameters:
+ *   handle    - The handle previously returned by xen1210_instantiate
+ *   minor     - The input device minor number
+ *
+ * Returned Value:
+ *   Zero is returned on success.  Otherwise, a negated errno value is returned to indicate
+ *   the nature of the failure.
+ *
+ ********************************************************************************************/
+
+int xen1210_register(XEN1210_HANDLE handle, int minor);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CONFIG_SENSORS_XEN1210 */
+#endif /* __INCLUDE_NUTTX_SENSORS_XEN1210_H */
diff --git a/include/nuttx/sensors/zerocross.h b/include/nuttx/sensors/zerocross.h
index 9b93c7c215274fc44bdd6b1ea8999b0815aa302d..6d7ce40b87e4c13abd42f9ffc5d2fc080bd620c7 100644
--- a/include/nuttx/sensors/zerocross.h
+++ b/include/nuttx/sensors/zerocross.h
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __NUTTX_SENSORS_ZEROCROSS_H
-#define __NUTTX_SENSORS_ZEROCROSS_H
+#ifndef __INCLUDE_NUTTX_SENSORS_ZEROCROSS_H
+#define __INCLUDE_NUTTX_SENSORS_ZEROCROSS_H
 
 /****************************************************************************
  * Included Files
@@ -148,4 +148,4 @@ int zc_register(FAR const char *devpath, FAR struct zc_lowerhalf_s *lower);
 #endif
 
 #endif /* CONFIG_ZEROCROSS */
-#endif /* __NUTTX_SENSORS_ZEROCROSS_H */
+#endif /* __INCLUDE_NUTTX_SENSORS_ZEROCROSS_H */
diff --git a/include/nuttx/sercomm/msgb.h b/include/nuttx/sercomm/msgb.h
deleted file mode 100644
index 39067c3ba39ccc0a4ff6bc05de8ea9b3f28289d7..0000000000000000000000000000000000000000
--- a/include/nuttx/sercomm/msgb.h
+++ /dev/null
@@ -1,218 +0,0 @@
-/****************************************************************************
- * (C) 2008-2010 by Harald Welte 
- *
- * This source code is derivated from Osmocom-BB project and was
- * relicensed as BSD with permission from original authors.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#ifndef __INCLUDE_NUTTX_SERCOM_MSGB_H
-#define __INCLUDE_NUTTX_SERCOM_MSGB_H
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include 
-#include 
-
-/****************************************************************************
- * Public Types
- ****************************************************************************/
-
-struct msgb
-{
-  struct llist_head list;
-
-  /* the layer 1 header, if any */
-
-  unsigned char *l1h;
-
-  /* the A-bis layer 2 header: OML, RSL(RLL), NS */
-
-  unsigned char *l2h;
-
-  /* the layer 3 header. For OML: FOM; RSL: 04.08; GPRS: BSSGP */
-
-  unsigned char *l3h;
-
-  uint16_t data_len;
-  uint16_t len;
-
-  unsigned char *head;  /* start of buffer */
-  unsigned char *tail;  /* end of message */
-  unsigned char *data;  /* start of message */
-  unsigned char _data[0];
-};
-
-/****************************************************************************
- * Public Function Prototypes
- ****************************************************************************/
-
-struct msgb *msgb_alloc(uint16_t size, const char *name);
-void msgb_free(struct msgb *m);
-void msgb_enqueue(struct llist_head *queue, struct msgb *msg);
-struct msgb *msgb_dequeue(struct llist_head *queue);
-void msgb_reset(struct msgb *m);
-
-/****************************************************************************
- * Inline Functions
- ****************************************************************************/
-
-#define msgb_l1(m)  ((void *)(m->l1h))
-#define msgb_l2(m)  ((void *)(m->l2h))
-#define msgb_l3(m)  ((void *)(m->l3h))
-
-static inline unsigned int msgb_l1len(const struct msgb *msgb)
-{
-  return msgb->tail - (uint8_t *)msgb_l1(msgb);
-}
-
-static inline unsigned int msgb_l2len(const struct msgb *msgb)
-{
-  return msgb->tail - (uint8_t *)msgb_l2(msgb);
-}
-
-static inline unsigned int msgb_l3len(const struct msgb *msgb)
-{
-  return msgb->tail - (uint8_t *)msgb_l3(msgb);
-}
-
-static inline unsigned int msgb_headlen(const struct msgb *msgb)
-{
-  return msgb->len - msgb->data_len;
-}
-
-static inline int msgb_tailroom(const struct msgb *msgb)
-{
-  return (msgb->head + msgb->data_len) - msgb->tail;
-}
-
-static inline unsigned char *msgb_put(struct msgb *msgb, unsigned int len)
-{
-  unsigned char *tmp = msgb->tail;
-
-  /* we intentionally call cons_puts() here to display an allocation
-   * failure on the _other_ serial port (i.e. the one that doesn't
-   * have the HDLC layer on it
-   */
-
-  if (msgb_tailroom(msgb) < len)
-    {
-      cons_puts("msgb_tailroom insufficient!\n");
-    }
-
-  msgb->tail += len;
-  msgb->len += len;
-  return tmp;
-}
-
-static inline void msgb_put_u8(struct msgb *msgb, uint8_t word)
-{
-  uint8_t *space = msgb_put(msgb, 1);
-  space[0] = word & 0xFF;
-}
-
-static inline void msgb_put_u16(struct msgb *msgb, uint16_t word)
-{
-  uint8_t *space = msgb_put(msgb, 2);
-  space[0] = word >> 8 & 0xFF;
-  space[1] = word & 0xFF;
-}
-
-static inline void msgb_put_u32(struct msgb *msgb, uint32_t word)
-{
-  uint8_t *space = msgb_put(msgb, 4);
-  space[0] = word >> 24 & 0xFF;
-  space[1] = word >> 16 & 0xFF;
-  space[2] = word >> 8 & 0xFF;
-  space[3] = word & 0xFF;
-}
-
-static inline unsigned char *msgb_get(struct msgb *msgb, unsigned int len)
-{
-  unsigned char *tmp = msgb->data;
-  msgb->data += len;
-  msgb->len -= len;
-  return tmp;
-}
-
-static inline uint8_t msgb_get_u8(struct msgb *msgb)
-{
-  uint8_t *space = msgb_get(msgb, 1);
-  return space[0];
-}
-
-static inline uint16_t msgb_get_u16(struct msgb *msgb)
-{
-  uint8_t *space = msgb_get(msgb, 2);
-  return space[0] << 8 | space[1];
-}
-
-static inline uint32_t msgb_get_u32(struct msgb *msgb)
-{
-  uint8_t *space = msgb_get(msgb, 4);
-  return space[0] << 24 | space[1] << 16 | space[2] << 8 | space[3];
-}
-
-static inline unsigned char *msgb_push(struct msgb *msgb, unsigned int len)
-{
-  msgb->data -= len;
-  msgb->len += len;
-  return msgb->data;
-}
-
-static inline unsigned char *msgb_pull(struct msgb *msgb, unsigned int len)
-{
-  msgb->len -= len;
-  return msgb->data += len;
-}
-
-/* increase the headroom of an empty msgb, reducing the tailroom */
-
-static inline void msgb_reserve(struct msgb *msg, int len)
-{
-  msg->data += len;
-  msg->tail += len;
-}
-
-static inline struct msgb *msgb_alloc_headroom(int size, int headroom,
-            const char *name)
-{
-  struct msgb *msg = msgb_alloc(size, name);
-  if (msg)
-    {
-      msgb_reserve(msg, headroom);
-    }
-
-  return msg;
-}
-
-#endif /* __INCLUDE_NUTTX_SERCOM_MSGB_H */
diff --git a/include/nuttx/sercomm/sercomm.h b/include/nuttx/sercomm/sercomm.h
deleted file mode 100644
index 54256b5a7dc0abda146be135a52fe824fbeb3f5b..0000000000000000000000000000000000000000
--- a/include/nuttx/sercomm/sercomm.h
+++ /dev/null
@@ -1,57 +0,0 @@
-#ifndef _SERCOMM_H
-#define _SERCOMM_H
-
-/* SERCOMM layer on UART1 (modem UART) */
-
-#include 
-
-#define SERCOMM_UART_NR	1
-
-#define HDLC_FLAG	0x7E
-#define HDLC_ESCAPE	0x7D
-
-#define HDLC_C_UI	0x03
-#define HDLC_C_P_BIT	(1 << 4)
-#define HDLC_C_F_BIT	(1 << 4)
-
-/* a low sercomm_dlci means high priority.  A high DLCI means low priority */
-enum sercomm_dlci {
-	SC_DLCI_HIGHEST = 0,
-	SC_DLCI_DEBUG   = 4,
-	SC_DLCI_L1A_L23 = 5,
-	SC_DLCI_LOADER  = 9,
-	SC_DLCI_CONSOLE = 10,
-	SC_DLCI_ECHO    = 128,
-	_SC_DLCI_MAX
-};
-
-void sercomm_init(void);
-int sercomm_initialized(void);
-
-/* User Interface: Tx */
-
-/* user interface for transmitting messages for a given DLCI */
-void sercomm_sendmsg(uint8_t dlci, struct msgb *msg);
-/* how deep is the Tx queue for a given DLCI */
-unsigned int sercomm_tx_queue_depth(uint8_t dlci);
-
-/* User Interface: Rx */
-
-/* receiving messages for a given DLCI */
-typedef void (*dlci_cb_t)(uint8_t dlci, struct msgb *msg);
-int sercomm_register_rx_cb(uint8_t dlci, dlci_cb_t cb);
-
-/* Driver Interface */
-
-/* fetch one octet of to-be-transmitted serial data. returns 0 if no more data */
-int sercomm_drv_pull(uint8_t *ch);
-/* the driver has received one byte, pass it into sercomm layer.
-   returns 1 in case of success, 0 in case of unrecognized char */
-int sercomm_drv_rx_char(uint8_t ch);
-
-static inline struct msgb *sercomm_alloc_msgb(unsigned int len)
-{
-	return msgb_alloc_headroom(len+4, 4, "sercomm_tx");
-}
-
-#endif /* _SERCOMM_H */
diff --git a/include/nuttx/sercomm/sercomm_cons.h b/include/nuttx/sercomm/sercomm_cons.h
deleted file mode 100644
index 11f66545c21b086e10354585ec25a0b343e0bf2d..0000000000000000000000000000000000000000
--- a/include/nuttx/sercomm/sercomm_cons.h
+++ /dev/null
@@ -1,10 +0,0 @@
-#ifndef _SERCOMM_CONS_H
-#define _SERCOMM_CONS_H
-
-/* how large buffers do we allocate? */
-#define SERCOMM_CONS_ALLOC	256
-
-int sercomm_puts(const char *s);
-int sercomm_putchar(int c);
-
-#endif /* _SERCOMM_CONS_H */
diff --git a/include/nuttx/serial/pty.h b/include/nuttx/serial/pty.h
new file mode 100644
index 0000000000000000000000000000000000000000..8b8768909a12d8954758be1ebf054895933f07d0
--- /dev/null
+++ b/include/nuttx/serial/pty.h
@@ -0,0 +1,105 @@
+/****************************************************************************
+ * include/nuttx/serial/pty.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_SERIAL_PTY_H
+#define __INCLUDE_NUTTX_SERIAL_PTY_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: ptmx_register
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Description:
+ *   Register the master pseudo-terminal multiplexor device at /dev/ptmx
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_PSEUDOTERM_SUSV1
+int ptmx_register(void);
+#endif
+
+/****************************************************************************
+ * Name: pty_register
+ *
+ * Description:
+ *   Create and register PTY master and slave devices.  The master device
+ *   will be registered at /dev/ptyN and slave at /dev/ttypN where N is
+ *   the provided minor number.
+ *
+ *   The slave side of the interface is always locked initially.  The
+ *   master must call unlockpt() before the slave device can be opened.
+ *
+ * Input Parameters:
+ *   minor - The number that qualifies the naming of the created devices.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_PSEUDOTERM_BSD
+int pty_register(int minor);
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __INCLUDE_NUTTX_SERIAL_PTY_H */
diff --git a/include/nuttx/serial/serial.h b/include/nuttx/serial/serial.h
index 493c0d53bad86cd2abed0a6912406caad184d481..a5a29f256908ac7e0af621c534d688a700377cfb 100644
--- a/include/nuttx/serial/serial.h
+++ b/include/nuttx/serial/serial.h
@@ -280,9 +280,9 @@ struct uart_dev_s
 #endif
   bool                 isconsole;    /* true: This is the serial console */
 
+#ifdef CONFIG_SERIAL_TERMIOS
   /* Terminal control flags */
 
-#ifdef CONFIG_SERIAL_TERMIOS
   tcflag_t             tc_iflag;     /* Input modes */
   tcflag_t             tc_oflag;     /* Output modes */
   tcflag_t             tc_lflag;     /* Local modes */
diff --git a/include/nuttx/serial/tioctl.h b/include/nuttx/serial/tioctl.h
index 2044195e5021cc79714ae719f5cde90283ad9901..e4c01690edb436e49430e30d432ec0ec8e27f17f 100644
--- a/include/nuttx/serial/tioctl.h
+++ b/include/nuttx/serial/tioctl.h
@@ -146,7 +146,7 @@
 
 /* Marking a line as local */
 
-#define TIOCGSOFTCAR    _TIOC(0x0023)  /* Get software carrier flag: FAR int */
+#define TIOCGSOFTCAR    _TIOC(0x0023)  /* Get software carrier flag: FAR int* */
 #define TIOCSSOFTCAR    _TIOC(0x0024)  /* Set software carrier flag: FAR const int */
 
 /* Get/set serial line info */
@@ -160,10 +160,16 @@
 #define TIOCMIWAIT      _TIOC(0x0028)  /* Wait for a change on serial input line(s): void */
 #define TIOCGICOUNT     _TIOC(0x0029)  /* Read serial port interrupt count: FAR  struct serial_icounter_struct */
 
+/* Pseudo-terminals */
+
+#define TIOCGPTN        _TIOC(0x002a)  /* Get Pty Number (of pty-mux device): FAR int* */
+#define TIOCSPTLCK      _TIOC(0x002b)  /* Lock/unlock Pty: int */
+#define TIOCGPTLCK      _TIOC(0x002c)  /* Get Pty lock state: FAR int* */
+
 /* RS-485 Support */
 
-#define TIOCSRS485      _TIOC(0x002a)  /* Set RS485 mode, arg: pointer to struct serial_rs485 */
-#define TIOCGRS485      _TIOC(0x002b)  /* Get RS485 mode, arg: pointer to struct serial_rs485 */
+#define TIOCSRS485      _TIOC(0x002d)  /* Set RS485 mode, arg: pointer to struct serial_rs485 */
+#define TIOCGRS485      _TIOC(0x002e)  /* Get RS485 mode, arg: pointer to struct serial_rs485 */
 
 /* Definitions for flags used in struct serial_rs485 (Linux compatible) */
 
@@ -174,14 +180,14 @@
 
 /* Single-wire UART support */
 
-#define TIOCSSINGLEWIRE _TIOC(0x002c)  /* Set single-wire mode */
-#define TIOCGSINGLEWIRE _TIOC(0x002d)  /* Get single-wire mode */
+#define TIOCSSINGLEWIRE _TIOC(0x002f)  /* Set single-wire mode */
+#define TIOCGSINGLEWIRE _TIOC(0x0030)  /* Get single-wire mode */
 
 #  define SER_SINGLEWIRE_ENABLED   (1 << 0) /* Enable/disable single-wire support */
 
 /* Debugging */
 
-#define TIOCSERGSTRUCT  _TIOC(0x002e) /* Get device TTY structure */
+#define TIOCSERGSTRUCT  _TIOC(0x0031) /* Get device TTY structure */
 
 /********************************************************************************************
  * Public Type Definitions
diff --git a/include/nuttx/spi/spi.h b/include/nuttx/spi/spi.h
index 5daacd30059ace89312ec6a2082f7f8442431d4c..2a48bc92e390d8a9b4f3571efdb60076d3183cd5 100644
--- a/include/nuttx/spi/spi.h
+++ b/include/nuttx/spi/spi.h
@@ -127,6 +127,28 @@
 
 #define SPI_SETFREQUENCY(d,f) ((d)->ops->setfrequency(d,f))
 
+/****************************************************************************
+ * Name: SPI_SETDELAY
+ *
+ * Description:
+ *   Set the SPI Delays in nanoseconds. Optional.
+ *
+ * Input Parameters:
+ *   dev        - Device-specific state data
+ *   startdelay - The delay between CS active and first CLK
+ *   stopdelay  - The delay between last CLK and CS inactive
+ *   csdelay    - The delay between CS inactive and CS active again
+ *
+ * Returned Value:
+ *   Returns zero (OK) on success; a negated errno value is return on any
+ *   failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI_CS_DELAY_CONTROL
+#  define SPI_SETDELAY(d,a,b,c) ((d)->ops->setdelay(d,a,b,c))
+#endif
+
 /****************************************************************************
  * Name: SPI_SETMODE
  *
@@ -153,9 +175,7 @@
  *
  * Input Parameters:
  *   dev -  Device-specific state data
- *   nbits - The number of bits requests.
- *           If value is greater > 0 then it implies MSB first
- *           If value is below < 0, then it implies LSB first with -nbits
+ *   nbits - The number of bits in an SPI word.
  *
  * Returned Value:
  *   none
@@ -172,8 +192,8 @@
  *   Set hardware-specific feature flags.
  *
  * Input Parameters:
- *   dev   - Device-specific state data
- *   flags - H/W feature flags
+ *   dev      - Device-specific state data
+ *   features - H/W feature flags
  *
  * Returned Value:
  *   Zero (OK) if the selected H/W features are enabled; A negated errno
@@ -189,15 +209,43 @@
 #  define SPI_HWFEATURES(d,f) \
   (((d)->ops->hwfeatures) ? (d)->ops->hwfeatures(d,f) : ((f) == 0 ? OK : -ENOSYS))
 
-  /* These are currently defined feature flags */
+  /* These are currently defined feature flags:
+   *
+   *   Bit 0: HWFEAT_CRCGENERATION
+   *          Hardware CRC generation
+   *   Bit 1: HWFEAT_FORCE_CS_INACTIVE_AFTER_TRANSFER
+   *          CS rises after every Transmission, also if we provide new data
+   *          immediately
+   *   Bit 2: HWFEAT_FORCE_CS_ACTIVE_AFTER_TRANSFER
+   *          CS does not rise automatically after a transmission, also if
+   *          the spi runs out of data (for a long time)
+   *   Bit 3: HWFEAT_ESCAPE_LASTXFER
+   *          Do not set the LASTXFER-Bit at the last word of the next
+   *          exchange, Flag is auto-resetting after the next LASTXFER
+   *          condition. (see spi_exchange)
+   *   Bit 4: HWFEAT_LSBFIRST
+   *          Data transferred LSB first (default is MSB first)
+   */
 
 #  ifdef CONFIG_SPI_CRCGENERATION
-#    HWFEAT_CRCGENERATION (1 << 0) /* Bit 0: Hardward CRC generation */
+#    define HWFEAT_CRCGENERATION                     (1 << 0)
+#  endif
+
+#  ifdef CONFIG_SPI_CS_CONTROL
+#    define HWFEAT_FORCE_CS_CONTROL_MASK             (7 << 1)
+#    define HWFEAT_FORCE_CS_INACTIVE_AFTER_TRANSFER  (1 << 1)
+#    define HWFEAT_FORCE_CS_ACTIVE_AFTER_TRANSFER    (1 << 2)
+#    define HWFEAT_ESCAPE_LASTXFER                   (1 << 3)
+#  endif
+
+#  ifdef CONFIG_SPI_BITORDER
+#    define HWFEAT_MSBFIRST                          (0 << 4)
+#    define HWFEAT_LSBFIRST                          (1 << 4)
 #  endif
 
 #else
   /* Any attempt to select hardware features with CONFIG_SPI_HWFEATURES
-   * deselected will cause an assertion.
+   * deselected will return an -ENOSYS error.
    */
 
 #  define SPI_HWFEATURES(d,f) (((f) == 0) ? OK : -ENOSYS)
@@ -403,6 +451,7 @@ enum spi_dev_e
   SPIDEV_BAROMETER,     /* Select SPI Pressure/Barometer device */
   SPIDEV_TEMPERATURE,   /* Select SPI Temperature sensor device */
   SPIDEV_IEEE802154,    /* Select SPI IEEE 802.15.4 wireless device */
+  SPIDEV_CONTACTLESS,   /* Select SPI Contactless device */
   SPIDEV_USER           /* Board-specific values start here */
 };
 
@@ -431,6 +480,10 @@ struct spi_ops_s
   CODE void     (*select)(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
                   bool selected);
   CODE uint32_t (*setfrequency)(FAR struct spi_dev_s *dev, uint32_t frequency);
+#ifdef CONFIG_SPI_CS_DELAY_CONTROL
+  CODE int      (*setdelay)(FAR struct spi_dev_s *dev, uint32_t a, uint32_t b,
+                  uint32_t c);
+#endif
   CODE void     (*setmode)(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
   CODE void     (*setbits)(FAR struct spi_dev_s *dev, int nbits);
 #ifdef CONFIG_SPI_HWFEATURES
diff --git a/include/nuttx/spi/spi_bitbang.c b/include/nuttx/spi/spi_bitbang.c
index d0281a249267d0f96acbc7546997503eb6af9f1b..86b340bcdc71cb900dfe12e02b9782098511c4a9 100644
--- a/include/nuttx/spi/spi_bitbang.c
+++ b/include/nuttx/spi/spi_bitbang.c
@@ -64,32 +64,6 @@
  *   in the bit bang interface and calls spi_create_bitbang().
  */
 
-/* Debug ********************************************************************/
-/* Check if SPI debut is enabled (non-standard.. no support in
- * include/debug.h
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_SPI
-#endif
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
 /****************************************************************************
  * Private Function Prototypes
  ****************************************************************************/
@@ -273,7 +247,7 @@ static uint32_t spi_setfrequency(FAR struct spi_bitbang_s *priv, uint32_t freque
 static void spi_setmode(FAR struct spi_bitbang_s *priv,
                         enum spi_mode_e mode)
 {
-  spivdbg("mode=%d\n", mode);
+  spiinfo("mode=%d\n", mode);
 
   switch (mode)
     {
diff --git a/include/nuttx/spi/spi_bitbang.h b/include/nuttx/spi/spi_bitbang.h
index fee6a9f1fca19e9a0121627c4b7232b069cc2ba3..f5058be9d30e52c8a4ffaa1ef77b5b38555ef93a 100644
--- a/include/nuttx/spi/spi_bitbang.h
+++ b/include/nuttx/spi/spi_bitbang.h
@@ -48,34 +48,10 @@
 
 #ifdef CONFIG_SPI_BITBANG
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-/* Debug ********************************************************************/
-/* Check if SPI debut is enabled (non-standard.. no support in
- * include/debug.h
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_SPI
-#endif
-
-#ifdef CONFIG_DEBUG_SPI
-#  define spidbg lldbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define spivdbg lldbg
-#  else
-#    define spivdbg(x...)
-#  endif
-#else
-#  define spidbg(x...)
-#  define spivdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
+
 #ifndef __ASSEMBLY__
 
 /* These are the lower-half handlers that perform the level-level, platform-
diff --git a/include/nuttx/spi/spi_transfer.h b/include/nuttx/spi/spi_transfer.h
new file mode 100644
index 0000000000000000000000000000000000000000..ef31e842650003dd4793d37fa9383f9db7d81a59
--- /dev/null
+++ b/include/nuttx/spi/spi_transfer.h
@@ -0,0 +1,192 @@
+/****************************************************************************
+ * include/nuttx/spi/spi_transfer.h
+ *
+ *   Copyright(C) 2015-2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_SPI_TRANSFER_H
+#define __INCLUDE_NUTTX_SPI_TRANSFER_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#ifdef CONFIG_SPI_EXCHANGE
+
+/* SPI Character Driver IOCTL Commands **************************************/
+/* The SPI driver is intended to support application testing of the SPI bus.
+ * The SPI driver simply provides a user-accessible wrapper around the
+ * OS internal spi_transfer() function.  The following IOCTL commands to
+ * supported by the SPI driver to perform SPI transfers
+ */
+
+/* Command:      SPIIOC_TRANSFER
+ * Description:  Perform a sequence of SPI transfers
+ * Argument:     A reference to an instance of struct spi_sequence_s.
+ * Dependencies: CONFIG_SPI_DRIVER
+ */
+
+#define SPIIOC_TRANSFER _SPIIOC(0x0001)
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* This describes one SPI transaction as handled by spi_transfer() */
+
+struct spi_trans_s
+{
+  /* SPI attributes for unique to this transaction */
+
+  bool deselect;            /* De-select after transfer */
+#ifdef CONFIG_SPI_CMDDATA
+  bool cmd;                 /* true=command; false=data */
+#endif
+#ifdef CONFIG_SPI_HWFEATURES
+  spi_hwfeatures_t hwfeat;  /* H/W features to enable on this transfer */
+#endif
+  useconds_t delay;         /* Microsecond delay after transfer */
+
+  /* These describe the single data transfer */
+
+  size_t nwords;            /* Number of words in transfer */
+  FAR const void *txbuffer; /* Source buffer for TX transfer */
+  FAR void *rxbuffer;       /* Sink buffer for RX transfer */
+};
+
+/* This describes a sequence of SPI transactions as handled by spi_transfer.
+ *
+ * Example usage:
+ *   struct spi_trans_s mytrans[5];
+ *   struct spi_sequence_s myseq;
+ *   ...
+ *   myseq.ntrans = 5;
+ *   myseq.trans  = mytrans;
+ *   ...
+ *   int ret = spi_transfer(spi, myseq);
+ *   ...
+ */
+
+struct spi_sequence_s
+{
+  /* Properties that are fixed throughout the transfer */
+
+  uint8_t dev;                 /* See enum spi_dev_e */
+  uint8_t mode;                /* See enum spi_mode_e */
+  uint8_t nbits;               /* Number of bits */
+  uint8_t ntrans;              /* Number of transactions */
+  uint32_t frequency;          /* SPI frequency (Hz) */
+#ifdef CONFIG_SPI_CS_DELAY_CONTROL
+  uint32_t a;                  /* Arguments to setdelay() */
+  uint32_t b;
+  uint32_t c;
+#endif
+
+  /* A pointer to the list of transfers to be be performed. */
+
+  FAR struct spi_trans_s *trans;
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: spi_transfer
+ *
+ * Description:
+ *   This is a helper function that can be used to encapsulate and manage
+ *   a sequence of SPI transfers.  The SPI bus will be locked and the
+ *   SPI device selected for the duration of the transfers.
+ *
+ * Input Parameters:
+ *   spi - An instance of the SPI device to use for the transfer
+ *   seq - Describes the sequence of transfers.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int spi_transfer(FAR struct spi_dev_s *spi, FAR struct spi_sequence_s *seq);
+
+/****************************************************************************
+ * Name: spi_register
+ *
+ * Description:
+ *   Create and register the SPI character driver.
+ *
+ *   The SPI character driver is a simple character driver that supports SPI
+ *   transfers.  The intent of this driver is to support SPI testing.  It is
+ *   not suitable for use in any real driver application.
+ *
+ * Input Parameters:
+ *   spi - An instance of the lower half SPI driver
+ *   bus - The SPI bus number.  This will be used as the SPI device minor
+ *     number.  The SPI character device will be registered as /dev/spiN
+ *     where N is the minor number
+ *
+ * Returned Value:
+ *   OK if the driver was successfully register; A negated errno value is
+ *   returned on any failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI_DRIVER
+int spi_register(FAR struct spi_dev_s *spi, int bus);
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* CONFIG_SPI_EXCHANGE */
+#endif /* __INCLUDE_NUTTX_SPI_TRANSFER_H */
diff --git a/include/nuttx/spinlock.h b/include/nuttx/spinlock.h
index 544facfef91ec38f281e13729c2aee0373875ce3..3798e177ff5755ea7ba4878531391d9a3b420295 100644
--- a/include/nuttx/spinlock.h
+++ b/include/nuttx/spinlock.h
@@ -59,6 +59,43 @@
 
 #include 
 
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Memory barriers may be provided in arch/spinlock.h
+ *
+ *   DMB - Data memory barrier.  Assures writes are completed to memory.
+ *   DSB - Data syncrhonization barrier.
+ */
+
+#undef __SP_UNLOCK_FUNCTION
+#if !defined(SP_DMB)
+#  define SP_DMB()
+#else
+#  define __SP_UNLOCK_FUNCTION 1
+#endif
+
+#if !defined(SP_DSB)
+#  define SP_DSB()
+#endif
+
+#if defined(CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS) && !defined(__SP_UNLOCK_FUNCTION)
+#  define __SP_UNLOCK_FUNCTION 1
+#endif
+
+/* If the target CPU supports a data cache then it may be necessary to
+ * manage spinlocks in a special way, perhaps linking them all into a
+ * special non-cacheable memory region.
+ *
+ *   SP_SECTION - Special storage attributes may be required to force
+ *      spinlocks into a special, non-cacheable section.
+ */
+
+#if !defined(SP_SECTION)
+#  define SP_SECTION
+#endif
+
 /****************************************************************************
  * Public Types
  ****************************************************************************/
@@ -83,7 +120,7 @@ struct spinlock_s
  * Name: up_testset
  *
  * Description:
- *   Perform and atomic test and set operation on the provided spinlock.
+ *   Perform an atomic test and set operation on the provided spinlock.
  *
  *   This function must be provided via the architecture-specific logoic.
  *
@@ -108,15 +145,16 @@ spinlock_t up_testset(volatile FAR spinlock_t *lock);
  *   Initialize a non-reentrant spinlock object to its initial, unlocked state.
  *
  * Input Parameters:
- *   lock - A reference to the spinlock object to be initialized.
+ *   lock  - A reference to the spinlock object to be initialized.
+ *   state - Initial state of the spinlock {SP_LOCKED or SP_UNLOCKED)
  *
  * Returned Value:
  *   None.
  *
  ****************************************************************************/
 
-/* void spin_initialize(FAR spinlock_t *lock); */
-#define spin_initialize(i) do { (l) = SPI_UNLOCKED; } while (0)
+/* void spin_initialize(FAR spinlock_t *lock, spinlock_t state); */
+#define spin_initialize(l,s) do { *(l) = (s); } while (0)
 
 /****************************************************************************
  * Name: spin_initializer
@@ -159,6 +197,27 @@ void spin_initializer(FAR struct spinlock_s *lock);
 
 void spin_lock(FAR volatile spinlock_t *lock);
 
+/****************************************************************************
+ * Name: spin_trylock
+ *
+ * Description:
+ *   Try once to lock the spinlock.  Do not wait if the spinlock is already
+ *   locked.
+ *
+ * Input Parameters:
+ *   lock - A reference to the spinlock object to lock.
+ *
+ * Returned Value:
+ *   SP_LOCKED   - Failure, the spinlock was already locked
+ *   SP_UNLOCKED - Success, the spinlock was successfully locked
+ *
+ * Assumptions:
+ *   Not running at the interrupt level.
+ *
+ ****************************************************************************/
+
+#define spin_trylock(l) up_testset(l)
+
 /****************************************************************************
  * Name: spin_lockr
  *
@@ -203,8 +262,11 @@ void spin_lockr(FAR struct spinlock_s *lock);
  *
  ****************************************************************************/
 
-/* void spin_unlock(FAR spinlock_t *lock); */
-#define spin_unlock(l)  do { *(l) = SP_UNLOCKED; } while (0)
+#ifdef __SP_UNLOCK_FUNCTION
+void spin_unlock(FAR volatile spinlock_t *lock);
+#else
+#  define spin_unlock(l)  do { *(l) = SP_UNLOCKED; } while (0)
+#endif
 
 /****************************************************************************
  * Name: spin_unlockr
@@ -268,7 +330,7 @@ void spin_unlockr(FAR struct spinlock_s *lock);
  * Input Parameters:
  *   set     - A reference to the bitset to set the CPU bit in
  *   cpu     - The bit number to be set
- *   setlock - A reference to the lock lock protecting the set
+ *   setlock - A reference to the lock protecting the set
  *   orlock  - Will be set to SP_LOCKED while holding setlock
  *
  * Returned Value:
@@ -289,7 +351,7 @@ void spin_setbit(FAR volatile cpu_set_t *set, unsigned int cpu,
  * Input Parameters:
  *   set     - A reference to the bitset to set the CPU bit in
  *   cpu     - The bit number to be set
- *   setlock - A reference to the lock lock protecting the set
+ *   setlock - A reference to the lock protecting the set
  *   orlock  - Will be set to SP_UNLOCKED if all bits become cleared in set
  *
  * Returned Value:
diff --git a/include/nuttx/streams.h b/include/nuttx/streams.h
index ab57b33b35d1bc145272984db41e1f6423c7d864..9d48c6d3931e46ac27eb62a26b38802d53e3c5fe 100644
--- a/include/nuttx/streams.h
+++ b/include/nuttx/streams.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * include/nuttx/streams.h
  *
- *   Copyright (C) 2009, 2011-2012, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2011-2012, 2014-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef _INCLUDE_NUTTX_STREAMS_H
-#define _INCLUDE_NUTTX_STREAMS_H
+#ifndef __INCLUDE_NUTTX_STREAMS_H
+#define __INCLUDE_NUTTX_STREAMS_H
 
 /****************************************************************************
  * Included Files
@@ -70,9 +70,7 @@ struct lib_instream_s
 struct lib_outstream_s
 {
   lib_putc_t             put;     /* Put one character to the outstream */
-#ifdef CONFIG_STDIO_LINEBUFFER
   lib_flush_t            flush;   /* Flush any buffered characters in the outstream */
-#endif
   int                    nput;    /* Total number of characters put.  Written
                                    * by put method, readable by user */
 };
@@ -101,9 +99,7 @@ struct lib_sistream_s
 struct lib_sostream_s
 {
   lib_soputc_t           put;     /* Put one character to the outstream */
-#ifdef CONFIG_STDIO_LINEBUFFER
   lib_soflush_t          flush;   /* Flush any buffered characters in the outstream */
-#endif
   lib_soseek_t           seek;    /* Seek a position in the output stream */
   int                    nput;    /* Total number of characters put.  Written
                                    * by put method, readable by user */
@@ -299,15 +295,13 @@ void lib_rawsistream(FAR struct lib_rawsistream_s *instream, int fd);
 void lib_rawsostream(FAR struct lib_rawsostream_s *outstream, int fd);
 
 /****************************************************************************
- * Name: lib_lowinstream, lib_lowoutstream
+ * Name: lib_lowoutstream
  *
  * Description:
- *   Initializes a stream for use with low-level, architecture-specific I/O.
- *   Defined in lib/stdio/lib_lowinstream.c and lib/stdio/lib_lowoutstream.c
+ *   Initializes a stream for use with low-level, architecture-specific output.
+ *   Defined in ib/stdio/lib_lowoutstream.c
  *
  * Input parameters:
- *   lowinstream  - User allocated, uninitialized instance of struct
- *                  lib_lowinstream_s to be initialized.
  *   lowoutstream - User allocated, uninitialized instance of struct
  *                  lib_lowoutstream_s to be initialized.
  *
@@ -316,9 +310,6 @@ void lib_rawsostream(FAR struct lib_rawsostream_s *outstream, int fd);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_ARCH_LOWGETC
-void lib_lowinstream(FAR struct lib_instream_s *lowinstream);
-#endif
 #ifdef CONFIG_ARCH_LOWPUTC
 void lib_lowoutstream(FAR struct lib_outstream_s *lowoutstream);
 #endif
@@ -354,46 +345,61 @@ void lib_nullinstream(FAR struct lib_instream_s *nullinstream);
 void lib_nulloutstream(FAR struct lib_outstream_s *nulloutstream);
 
 /****************************************************************************
- * Name: lib_sylogstream
+ * Name: syslogstream
  *
  * Description:
  *   Initializes a stream for use with the configured syslog interface.
+ *   Only accessible from with the OS SYSLOG logic.
  *
  * Input parameters:
- *   lowoutstream - User allocated, uninitialized instance of struct
- *                  lib_lowoutstream_s to be initialized.
+ *   stream - User allocated, uninitialized instance of struct
+ *            lib_lowoutstream_s to be initialized.
  *
  * Returned Value:
  *   None (User allocated instance initialized).
  *
  ****************************************************************************/
 
-#ifdef CONFIG_SYSLOG
-void lib_syslogstream(FAR struct lib_outstream_s *stream);
-#endif
+void syslogstream(FAR struct lib_outstream_s *stream);
+
+/****************************************************************************
+ * Name: emergstream
+ *
+ * Description:
+ *   Initializes a stream for use with the configured emergency syslog
+ *   interface.  Only accessible from with the OS SYSLOG logic.
+ *
+ * Input parameters:
+ *   stream - User allocated, uninitialized instance of struct
+ *            lib_lowoutstream_s to be initialized.
+ *
+ * Returned Value:
+ *   None (User allocated instance initialized).
+ *
+ ****************************************************************************/
+
+void emergstream(FAR struct lib_outstream_s *stream);
 
 /****************************************************************************
  * Name: lib_noflush
  *
  * Description:
  *  lib_noflush() provides a common, dummy flush method for output streams
- *  that are not flushable.  Only used if CONFIG_STDIO_LINEBUFFER is selected.
+ *  that are not flushable.
  *
  * Return:
  *  Always returns OK
  *
  ****************************************************************************/
 
-#ifdef CONFIG_STDIO_LINEBUFFER
 int lib_noflush(FAR struct lib_outstream_s *stream);
-#endif
 
 /****************************************************************************
  * Name: lib_snoflush
  *
  * Description:
  *  lib_snoflush() provides a common, dummy flush method for seekable output
- *  streams that are not flushable.  Only used if CONFIG_STDIO_LINEBUFFER
+ *  streams that are not flushable.
  *  is selected.
  *
  * Return:
@@ -401,9 +407,7 @@ int lib_noflush(FAR struct lib_outstream_s *stream);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_STDIO_LINEBUFFER
 int lib_snoflush(FAR struct lib_sostream_s *this);
-#endif
 
 /****************************************************************************
  * Name: lib_sprintf and lib_vsprintf
@@ -423,4 +427,4 @@ int lib_vsprintf(FAR struct lib_outstream_s *obj,
 }
 #endif
 
-#endif /* _INCLUDE_NUTTX_STREAMS_H */
+#endif /* __INCLUDE_NUTTX_STREAMS_H */
diff --git a/include/nuttx/syslog/ramlog.h b/include/nuttx/syslog/ramlog.h
index 75c767819cbd6f53f97330c63e7b1b3bf19793db..70ec26f316e968b9917f8d7673f5c134b8383c7e 100644
--- a/include/nuttx/syslog/ramlog.h
+++ b/include/nuttx/syslog/ramlog.h
@@ -70,12 +70,11 @@
  *   in that case, console output from non-Telnet threads will go to the
  *   circular buffer and can be viewed using the NSH 'dmesg' command.
  * CONFIG_RAMLOG_SYSLOG - Use the RAM logging device for the syslogging
- *   interface.  If this feature is enabled (along with CONFIG_SYSLOG),
- *   then all debug output (only) will be re-directed to the circular
- *   buffer in RAM.  This RAM log can be view from NSH using the 'dmesg'
- *   command.  NOTE:  Unlike the limited, generic character driver SYSLOG
- *   device, the RAMLOG *can* be used to generate debug output from interrupt
- *   level handlers.
+ *   interface.  If this feature is enabled then all debug output (only)
+ *   will be re-directed to the circular buffer in RAM.  This RAM log can
+ *   be viewied from NSH using the 'dmesg' command.  NOTE:  Unlike the
+ *   limited, generic character driver SYSLOG device, the RAMLOG *can* be
+ *   used to generate debug output from interrupt level handlers.
  * CONFIG_RAMLOG_NPOLLWAITERS - The number of threads than can be waiting
  *   for this driver on poll().  Default: 4
  *
@@ -89,10 +88,6 @@
 #  undef CONFIG_RAMLOG_CONSOLE
 #endif
 
-#ifndef CONFIG_SYSLOG
-#  undef CONFIG_RAMLOG_SYSLOG
-#endif
-
 #if defined(CONFIG_RAMLOG_SYSLOG) && !defined(CONFIG_SYSLOG_DEVPATH)
 #  define CONFIG_SYSLOG_DEVPATH "/dev/ramlog"
 #endif
@@ -101,25 +96,10 @@
 #  define CONFIG_RAMLOG_NPOLLWAITERS 4
 #endif
 
-#ifndef CONFIG_SYSLOG
-#  undef CONFIG_RAMLOG_SYSLOG
-#endif
-
 #ifndef CONFIG_RAMLOG_BUFSIZE
 #  define CONFIG_RAMLOG_BUFSIZE 1024
 #endif
 
-/* The normal behavior of the RAM log when used as a SYSLOG is to return
- * end-of-file if there is no data in the RAM log (rather than blocking until
- * data is available).  That allows you to 'cat' the SYSLOG with no ill
- * consequences.
- */
-
-#ifdef CONFIG_SYSLOG
-#  undef CONFIG_RAMLOG_NONBLOCKING
-#  define CONFIG_RAMLOG_NONBLOCKING 1
-#endif
-
 /* When used as a console or syslogging device, the RAM log will pre-pend
  * line-feeds with carriage returns.
  */
@@ -183,7 +163,7 @@ int ramlog_consoleinit(void);
 #endif
 
 /****************************************************************************
- * Name: ramlog_sysloginit
+ * Name: ramlog_syslog_channel
  *
  * Description:
  *   Create the RAM logging device and register it at the specified path.
@@ -195,7 +175,19 @@ int ramlog_consoleinit(void);
  ****************************************************************************/
 
 #ifdef CONFIG_RAMLOG_SYSLOG
-int ramlog_sysloginit(void);
+int ramlog_syslog_channel(void);
+#endif
+
+/****************************************************************************
+ * Name: ramlog_putc
+ *
+ * Description:
+ *   This is the low-level system logging interface.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_RAMLOG_CONSOLE) || defined(CONFIG_RAMLOG_SYSLOG)
+int ramlog_putc(int ch);
 #endif
 
 #undef EXTERN
diff --git a/include/nuttx/syslog/syslog.h b/include/nuttx/syslog/syslog.h
index 836440da8164b98b29c9f24d7dc08c7a3a8aaee0..01de19736d2f496242d9ef5b8ed7e32ff6340bf3 100644
--- a/include/nuttx/syslog/syslog.h
+++ b/include/nuttx/syslog/syslog.h
@@ -2,7 +2,7 @@
  * include/nuttx/syslog/syslog.h
  * The NuttX SYSLOGing interface
  *
- *   Copyright (C) 2012, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2014-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,16 +42,20 @@
  ****************************************************************************/
 
 #include 
+#include 
+#include 
 
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
 /* Configuration ************************************************************/
-/* CONFIG_SYSLOG - Enables generic system logging features.
+/* CONFIG_SYSLOG_INTBUFFER - Enables an interrupt buffer that will be used
+ *   to serialize debug output from interrupt handlers.
+ * CONFIG_SYSLOG_INTBUFSIZE - The size of the interrupt buffer in bytes.
  * CONFIG_SYSLOG_DEVPATH - The full path to the system logging device
  *
  * In addition, some SYSLOG device must also be enabled that will provide
- * the syslog_putc() function.  As of this writing, there are two SYSLOG
+ * the syslog output "channel.  As of this writing, there are two SYSLOG
  * devices avaiable:
  *
  *   1. A RAM SYSLOGing device that will log data into a circular buffer
@@ -66,19 +70,54 @@
  * CONFIG_SYSLOG_CHAR - Enable the generic character device for the SYSLOG.
  *   The full path to the SYSLOG device is provided by CONFIG_SYSLOG_DEVPATH.
  *   A valid character device must exist at this path.  It will by opened
- *   by syslog_initialize.
+ *   by logic in syslog_initialize() based on the current configuration.
  *
  *   NOTE:  No more than one SYSLOG device should be configured.
  */
 
-#ifndef CONFIG_SYSLOG
-#  undef CONFIG_SYSLOG_CHAR
-#endif
-
 #if defined(CONFIG_SYSLOG_CHAR) && !defined(CONFIG_SYSLOG_DEVPATH)
 #  define CONFIG_SYSLOG_DEVPATH "/dev/ttyS1"
 #endif
 
+#ifdef CONFIG_SYSLOG_INTBUFFER
+#  ifndef CONFIG_SYSLOG_INTBUFSIZE
+#    define CONFIG_SYSLOG_INTBUFSIZE 512
+#  endif
+#  if CONFIG_SYSLOG_INTBUFSIZE > 65535
+#    undef  CONFIG_SYSLOG_INTBUFSIZE
+#    define CONFIG_SYSLOG_INTBUFSIZE 65535
+#  endif
+#endif
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* Initialization phases */
+
+enum syslog_init_e
+{
+  SYSLOG_INIT_RESET = 0, /* Power on SYSLOG initializaton phase */
+  SYSLOG_INIT_EARLY,     /* Early initialization in up_initialize() */
+  SYSLOG_INIT_LATE       /* Late initialization in os_start(). */
+};
+
+/* This structure provides the interface to a SYSLOG device */
+
+typedef CODE int (*syslog_putc_t)(int ch);
+typedef CODE int (*syslog_flush_t)(void);
+
+struct syslog_channel_s
+{
+  /* I/O redirection methods */
+
+  syslog_putc_t sc_putc;    /* Normal buffered output */
+  syslog_putc_t sc_force;   /* Low-level output for interrupt handlers */
+  syslog_flush_t sc_flush;  /* Flush buffered output (on crash) */
+
+  /* Implementation specific logic may follow */
+};
+
 /****************************************************************************
  * Public Data
  ****************************************************************************/
@@ -96,36 +135,158 @@ extern "C"
 /****************************************************************************
  * Public Function Prototypes
  ****************************************************************************/
+
+/****************************************************************************
+ * Name: syslog_channel
+ *
+ * Description:
+ *   Configure the SYSLOGging function to use the provided channel to
+ *   generate SYSLOG output.
+ *
+ * Input buffer:
+ *   channel - Provides the interface to the channel to be used.
+ *
+ * Returned Value:
+ *   Zero (OK)is returned on  success.  A negated errno value is returned
+ *   on any failure.
+ *
+ ****************************************************************************/
+
+int syslog_channel(FAR const struct syslog_channel_s *channel);
+
 /****************************************************************************
  * Name: syslog_initialize
  *
  * Description:
- *   Initialize to use the character device (or file) at
- *   CONFIG_SYSLOG_DEVPATH as the SYSLOG sink.
+ *   One power up, the SYSLOG facility is non-existent or limited to very
+ *   low-level output.  This function is called later in the initialization
+ *   sequence after full driver support has been initialized.  It installs
+ *   the configured SYSLOG drivers and enables full SYSLOGing capability.
+ *
+ *   This function performs these basic operations:
+ *
+ *   - Initialize the SYSLOG device
+ *   - Call syslog_channel() to begin using that device.
+ *
+ *   If CONFIG_ARCH_SYSLOG is selected, then the architecture-specifica
+ *   logic will provide its own SYSLOG device initialize which must include
+ *   as a minimum a call to syslog_channel() to use the device.
+ *
+ * Input Parameters:
+ *   phase - One of {SYSLOG_INIT_EARLY, SYSLOG_INIT_LATE}
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure.
+ *
+ ****************************************************************************/
+
+#ifndef CONFIG_ARCH_SYSLOG
+int syslog_initialize(enum syslog_init_e phase);
+#else
+#  define syslog_initialize(phase)
+#endif
+
+/****************************************************************************
+ * Name: syslog_file_channel
+ *
+ * Description:
+ *   Configure to use a file in a mounted file system at 'devpath' as the
+ *   SYSLOG channel.
+ *
+ *   This tiny function is simply a wrapper around syslog_dev_initialize()
+ *   and syslog_channel().  It calls syslog_dev_initialize() to configure
+ *   the character file at 'devpath then calls syslog_channel() to use that
+ *   device as the SYSLOG output channel.
+ *
+ *   File SYSLOG channels differ from other SYSLOG channels in that they
+ *   cannot be established until after fully booting and mounting the target
+ *   file system.  This function would need to be called from board-specific
+ *   bring-up logic AFTER mounting the file system containing 'devpath'.
  *
- *   NOTE that this implementation excludes using a network connection as
- *   SYSLOG device.  That would be a good extension.
+ *   SYSLOG data generated prior to calling syslog_file_channel will, of
+ *   course, not be included in the file.
+ *
+ *   NOTE interrupt level SYSLOG output will be lost in this case unless
+ *   the interrupt buffer is used.
+ *
+ * Input Parameters:
+ *   devpath - The full path to the file to be used for SYSLOG output.
+ *     This may be an existing file or not.  If the file exists,
+ *     syslog_file_channel() will append new SYSLOG data to the end of the
+ *     file.  If it does not, then syslog_file_channel() will create the
+ *     file.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure.
  *
  ****************************************************************************/
 
-#ifdef CONFIG_SYSLOG_CHAR
-int syslog_initialize(void);
+#ifdef CONFIG_SYSLOG_FILE
+int syslog_file_channel(FAR const char *devpath);
 #endif
 
 /****************************************************************************
- * Name: syslog_putc
+ * Name: syslog_flush
  *
  * Description:
- *   This is the low-level system logging interface.  The debugging/syslogging
- *   interfaces are syslog() and lowsyslog().  The difference is that
- *   the syslog() internface writes to fd=1 (stdout) whereas lowsyslog() uses
- *   a lower level interface that works from interrupt handlers.  This
- *   function is the low-level interface used to implement lowsyslog().
+ *   This is called by system crash-handling logic.  It must flush any
+ *   buffered data to the SYSLOG device.
+ *
+ *   Interrupts are disabled at the time of the crash and this logic must
+ *   perform the flush using low-level, non-interrupt driven logic.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero (OK)is returned on  success.  A negated errno value is returned
+ *   on any failure.
+ *
+ ****************************************************************************/
+
+#if 0
+/* REVISIT: (1) Not yet integrated into assertion handlers and (2) there is
+ * an implementation problem in that if a character driver is the underlying
+ * device, then there is no mechanism to flush the data buffered in the
+ * driver with interrupts disabled.
+ */
+
+int syslog_flush(void);
+#endif
+
+/****************************************************************************
+ * Name: _vsyslog
+ *
+ * Description:
+ *   _vsyslog() handles the system logging system calls. It is functionally
+ *   equivalent to vsyslog() except that (1) the per-process priority
+ *   filtering has already been performed and the va_list parameter is
+ *   passed by reference.  That is because the va_list is a structure in
+ *   some compilers and passing of structures in the NuttX sycalls does
+ *   not work.
+ *
+ ****************************************************************************/
+
+int _vsyslog(int priority, FAR const IPTR char *src, FAR va_list *ap);
+
+/****************************************************************************
+ * Name: syslog_register
+ *
+ * Description:
+ *   Register a simple character driver at /dev/syslog whose write() method
+ *   will transfer data to the SYSLOG device.  This can be useful if, for
+ *   example, you want to redirect the output of a program to the SYSLOG.
+ *
+ *   NOTE that unlike other syslog output, this data is unformatted raw
+ *   byte output with no time-stamping or any other SYSLOG features
+ *   supported.
  *
  ****************************************************************************/
 
-#ifdef CONFIG_SYSLOG
-int syslog_putc(int ch);
+#ifdef CONFIG_SYSLOG_CHARDEV
+void syslog_register(void);
 #endif
 
 #undef EXTERN
diff --git a/include/nuttx/syslog/syslog_console.h b/include/nuttx/syslog/syslog_console.h
index a14d75d963308619bdf28554bd14016696306dd1..18283d9f3938022f7fbe9a0e8d20363069ad4089 100644
--- a/include/nuttx/syslog/syslog_console.h
+++ b/include/nuttx/syslog/syslog_console.h
@@ -43,22 +43,22 @@
 #include 
 #include 
 
-#ifdef CONFIG_SYSLOG_CONSOLE
+#ifdef CONFIG_CONSOLE_SYSLOG
 
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
 /* Configuration ************************************************************/
-/* CONFIG_SYSLOG_CONSOLE - Use the syslog logging output as a system console.
+/* CONFIG_CONSOLE_SYSLOG - Use the syslog logging output as a system console.
  *   If this feature is enabled (along with CONFIG_DEV_CONSOLE), then all
- *   console output will be re-directed to a syslog_putc function.  This
+ *   console output will be re-directed to the SYSLOG output channel.  This
  *   is useful, for example, if the only console is a Telnet console.  Then
  *   in that case, console output from non-Telnet threads will go to the
- *   syslog_putc output.
+ *   SYSLOG output channel.
  */
 
 #ifndef CONFIG_DEV_CONSOLE
-#  undef CONFIG_SYSLOG_CONSOLE
+#  undef CONFIG_CONSOLE_SYSLOG
 #endif
 
 /****************************************************************************
@@ -88,7 +88,7 @@ extern "C"
  *
  ****************************************************************************/
 
-#ifdef CONFIG_SYSLOG_CONSOLE
+#ifdef CONFIG_CONSOLE_SYSLOG
 int syslog_console_init(void);
 #endif
 
@@ -98,5 +98,5 @@ int syslog_console_init(void);
 #endif
 
 #endif /* __ASSEMBLY__ */
-#endif /* CONFIG_SYSLOG_CONSOLE */
+#endif /* CONFIG_CONSOLE_SYSLOG */
 #endif /* __INCLUDE_NUTTX_SYSLOG_SYSLOG_CONSOLE_H */
diff --git a/include/nuttx/timers/cs2100-cp.h b/include/nuttx/timers/cs2100-cp.h
index fe72836770b97675d5580cd7d3ee4d77d83f9c1b..51fe48974da091cc2a0f0e01e1bc7b361f11332d 100644
--- a/include/nuttx/timers/cs2100-cp.h
+++ b/include/nuttx/timers/cs2100-cp.h
@@ -60,7 +60,7 @@
 # define CONFIG_TIMERS_CS2100CP_CLKINBW 16
 #endif
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
 #  undef CONFIG_CS2100CP_DEBUG
 #  undef CONFIG_CS2100CP_REGDEBUG
 #endif
diff --git a/include/nuttx/timers/oneshot.h b/include/nuttx/timers/oneshot.h
new file mode 100644
index 0000000000000000000000000000000000000000..2fd001758e73cd4658a2f11e2bf62d444bf721fa
--- /dev/null
+++ b/include/nuttx/timers/oneshot.h
@@ -0,0 +1,275 @@
+/****************************************************************************
+ * include/nuttx/timers/oneshot.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_TIMERS_ONESHOT_H
+#define __INCLUDE_NUTTX_TIMERS_ONESHOT_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* IOCTL commands ***********************************************************/
+/* These commands are used by applications to access the oneshot lower-half
+ * logic via the oneshot character driver IOCTL command.  Since the oneshot
+ * driver is a device control interface and not a data transfer interface,
+ * the majority of the functionality is implemented in driver IOCTL calls.
+ * The oneshot IOCTL commands are listed below:
+ *
+ * These are detected and handled by the "upper half" timer driver.
+ *
+ * OSIOC_MAXDELAY   - Return the maximum delay that can be supported by
+ *                    this timer.
+ *                    Argument: A referenct to a struct timespec in which
+ *                    the maximum time will be returned.
+ * OSIOC_START      - Start the oneshot timer
+ *                    Argument: A reference to struct oneshot_start_s
+ * OSIOC_CANCEL     - Stop the timer
+ *                    Argument: A reference to a struct timespec in which
+ *                    the time remaining will be returned.
+ *
+ * NOTE: _TCIOC(0x0020) througn _TCIOC(0x003f) are reserved for use by the
+ * oneshot driver to assure that the values are unique.  Other timer drivers
+ * must not use IOCTL commands in this numeric range.
+ */
+
+#define OSIOC_MAXDELAY   _TCIOC(0x0020)
+#define OSIOC_START      _TCIOC(0x0021)
+#define OSIOC_CANCEL     _TCIOC(0x0022)
+
+/* Method access helper macros **********************************************/
+
+/****************************************************************************
+ * Name: ONESHOT_MAX_DELAY
+ *
+ * Description:
+ *   Determine the maximum delay of the one-shot timer (in microseconds)
+ *
+ * Input Parameters:
+ *   lower   An instance of the lower-half oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           oneshot_initialize();
+ *   ts      The location in which to return the maxumum delay.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+#define ONESHOT_MAX_DELAY(l,t) ((l)->ops->max_delay(l,t))
+
+/****************************************************************************
+ * Name: ONESHOT_START
+ *
+ * Description:
+ *   Start the oneshot timer
+ *
+ * Input Parameters:
+ *   lower   An instance of the lower-half oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           oneshot_initialize();
+ *   handler The function to call when when the oneshot timer expires.
+ *   arg     An opaque argument that will accompany the callback.
+ *   ts      Provides the duration of the one shot timer.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+#define ONESHOT_START(l,h,a,t) ((l)->ops->start(l,h,a,t))
+
+/****************************************************************************
+ * Name: ONESHOT_CANCEL
+ *
+ * Description:
+ *   Cancel the oneshot timer and return the time remaining on the timer.
+ *
+ *   NOTE: This function may execute at a high rate with no timer running (as
+ *   when pre-emption is enabled and disabled).
+ *
+ * Input Parameters:
+ *   lower   Caller allocated instance of the oneshot state structure.  This
+ *           structure must have been previously initialized via a call to
+ *           oneshot_initialize();
+ *   ts      The location in which to return the time remaining on the
+ *           oneshot timer.  A time of zero is returned if the timer is
+ *           not running.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success.  A call to up_timer_cancel() when
+ *   the timer is not active should also return success; a negated errno
+ *   value is returned on any failure.
+ *
+ ****************************************************************************/
+
+#define ONESHOT_CANCEL(l,t) ((l)->ops->cancel(l,t))
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* This describes the callback function that will be invoked when the oneshot
+ * timer expires.  The oneshot fires, the client will receive:
+ *
+ *   lower - An instance of the lower half driver
+ *   arg   - The opaque argument provided when the interrupt was registered
+ */
+
+struct oneshot_lowerhalf_s;
+typedef void (*oneshot_callback_t)(FAR struct oneshot_lowerhalf_s *lower,
+                                   FAR void *arg);
+
+/* The one short operations supported by the lower half driver */
+
+struct timespec;
+struct oneshot_operations_s
+{
+  CODE int (*max_delay)(FAR struct oneshot_lowerhalf_s *lower,
+                        FAR struct timespec *ts);
+  CODE int (*start)(FAR struct oneshot_lowerhalf_s *lower,
+                    oneshot_callback_t callback, FAR void *arg,
+                    FAR const struct timespec *ts);
+  CODE int (*cancel)(struct oneshot_lowerhalf_s *lower,
+                     FAR struct timespec *ts);
+};
+
+/* This structure describes the state of the oneshot timer lower-half driver */
+
+struct oneshot_lowerhalf_s
+{
+  /* This is the part of the lower half driver that is visible to the upper-
+   * half client of the driver.
+   */
+
+  FAR const struct oneshot_operations_s *ops;
+
+  /* Private lower half data may follow */
+};
+
+#ifdef CONFIG_ONESHOT
+/* Argument to OSIOC_START IOCTL command */
+
+struct oneshot_start_s
+{
+  pid_t pid;          /* PID of task to be signalled (0 means calling task) */
+  int signo;          /* Signal number to use */
+  FAR void *arg;      /* Signal value argument */
+  struct timespec ts; /* Delay until time expiration */
+};
+#endif
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: oneshot_initialize
+ *
+ * Description:
+ *   Initialize the oneshot timer and return a oneshot lower half driver
+ *   instance.
+ *
+ * Input Parameters:
+ *   chan       Timer counter channel to be used.
+ *   resolution The required resolution of the timer in units of
+ *              microseconds.  NOTE that the range is restricted to the
+ *              range of uint16_t (excluding zero).
+ *
+ * Returned Value:
+ *   On success, a non-NULL instance of the oneshot lower-half driver is
+ *   returned.  NULL is return on any failure.
+ *
+ ****************************************************************************/
+
+FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan,
+                                                   uint16_t resolution);
+
+/****************************************************************************
+ * Name: oneshot_register
+ *
+ * Description:
+ *   Register the oneshot device as 'devpath'
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/oneshot0"
+ *   lower - An instance of the lower half interface
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.  The following
+ *   possible error values may be returned (most are returned by
+ *   register_driver()):
+ *
+ *   EINVAL - 'path' is invalid for this operation
+ *   EEXIST - An inode already exists at 'path'
+ *   ENOMEM - Failed to allocate in-memory resources for the operation
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ONESHOT
+int oneshot_register(FAR const char *devname,
+                     FAR struct oneshot_lowerhalf_s *lower);
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __INCLUDE_NUTTX_TIMERS_ONESHOT_H */
diff --git a/include/nuttx/timers/timer.h b/include/nuttx/timers/timer.h
index 5d11498e71e844f1d4b584a359f08e22ff0f7841..ab78f5ea977516a4de6b508bb61b689e8a6a89cb 100644
--- a/include/nuttx/timers/timer.h
+++ b/include/nuttx/timers/timer.h
@@ -46,12 +46,14 @@
 #include 
 #include 
 #include 
+#include 
 
 #ifdef CONFIG_TIMER
 
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
 /* IOCTL Commands ***********************************************************/
 /* The timer driver uses a standard character driver framework.  However,
  * since the timer driver is a device control interface and not a data
@@ -60,16 +62,18 @@
  *
  * These are detected and handled by the "upper half" timer driver.
  *
- * TCIOC_START      - Start the timer
- *                    Argument: Ignored
- * TCIOC_STOP       - Stop the timer
- *                    Argument: Ignored
- * TCIOC_GETSTATUS  - Get the status of the timer.
- *                    Argument:  A writeable pointer to struct timer_status_s.
- * TCIOC_SETTIMEOUT - Reset the timer timeout to this value
- *                    Argument: A 32-bit timeout value in microseconds.
- * TCIOC_SETHANDLER - Call this handler on timer expiration
- *                    Argument: A pointer to struct timer_sethandler_s.
+ * TCIOC_START        - Start the timer
+ *                      Argument: Ignored
+ * TCIOC_STOP         - Stop the timer
+ *                      Argument: Ignored
+ * TCIOC_GETSTATUS    - Get the status of the timer.
+ *                      Argument:  A writeable pointer to struct timer_status_s.
+ * TCIOC_SETTIMEOUT   - Reset the timer timeout to this value
+ *                      Argument: A 32-bit timeout value in microseconds.
+ * TCIOC_NOTIFICATION - Set up to notify an application via a signal when
+ *                      the timer expires.
+ *                      Argument: A read-only pointer to an instance of
+ *                      stuct timer_notify_s.
  *
  * WARNING: May change TCIOC_SETTIMEOUT to pass pointer to 64bit nanoseconds
  * or timespec structure.
@@ -77,38 +81,35 @@
  * NOTE: The TCIOC_SETHANDLER ioctl cannot be supported in the kernel build
  * mode. In that case direct callbacks from kernel space into user space is
  * forbidden.
+ *
+ * NOTE: _TCIOC(0x0001) througn _TCIOC(0x001f) are reserved for use by the
+ * timer driver to assure that the values are unique.  Other timer drivers,
+ * such as the oneshot timer, must not use IOCTL commands in this numeric
+ * range.
  */
 
-#define TCIOC_START      _TCIOC(0x001)
-#define TCIOC_STOP       _TCIOC(0x002)
-#define TCIOC_GETSTATUS  _TCIOC(0x003)
-#define TCIOC_SETTIMEOUT _TCIOC(0x004)
-#define TCIOC_SETHANDLER _TCIOC(0x005)
+#define TCIOC_START        _TCIOC(0x0001)
+#define TCIOC_STOP         _TCIOC(0x0002)
+#define TCIOC_GETSTATUS    _TCIOC(0x0003)
+#define TCIOC_SETTIMEOUT   _TCIOC(0x0004)
+#define TCIOC_NOTIFICATION _TCIOC(0x0005)
 
 /* Bit Settings *************************************************************/
 /* Bit settings for the struct timer_status_s flags field */
 
-#define TCFLAGS_ACTIVE   (1 << 0) /* 1=The timer is running */
-#define TCFLAGS_HANDLER  (1 << 1) /* 1=Call the user function when the
-                                   *   timer expires */
+#define TCFLAGS_ACTIVE     (1 << 0) /* 1=The timer is running */
+#define TCFLAGS_HANDLER    (1 << 1) /* 1=Call the user function when the
+                                     *   timer expires */
 
 /****************************************************************************
  * Public Types
  ****************************************************************************/
 
-/* User function prototype. Returns true to reload the timer, and the
+/* Upper half callback prototype. Returns true to reload the timer, and the
  * function can modify the next interval if desired.
  */
 
-typedef bool (*tccb_t)(FAR uint32_t *next_interval_us);
-
-/* This is the type of the argument passed to the TCIOC_SETHANDLER ioctl */
-
-struct timer_sethandler_s
-{
-  CODE tccb_t newhandler;   /* The new timer interrupt handler */
-  CODE tccb_t oldhandler;   /* The previous timer interrupt handler (if any) */
-};
+typedef CODE bool (*tccb_t)(FAR uint32_t *next_interval_us, FAR void *arg);
 
 /* This is the type of the argument passed to the TCIOC_GETSTATUS ioctl and
  * and returned by the "lower half" getstatus() method.
@@ -122,6 +123,15 @@ struct timer_status_s
                              * (in microseconds) */
 };
 
+/* This is the type of the argument passed to the TCIOC_NOTIFICATION ioctl */
+
+struct timer_notify_s
+{
+  FAR void *arg;            /* An argument to pass with the signal */
+  pid_t     pid;            /* The ID of the task/thread to receive the signal */
+  uint8_t   signo;          /* The signal number to use in the notification */
+};
+
 /* This structure provides the "lower-half" driver operations available to
  * the "upper-half" driver.
  */
@@ -148,12 +158,13 @@ struct timer_ops_s
   CODE int (*settimeout)(FAR struct timer_lowerhalf_s *lower,
                          uint32_t timeout);
 
-  /* Call this user provider timeout handler on timeout.
-   * NOTE:  Providing handler==NULL disable.
+  /* Call the NuttX INTERNAL timeout callback on timeout.
+   * NOTE:  Providing callback==NULL disable.
+   * NOT to call back into applications.
    */
 
-  CODE tccb_t (*sethandler)(FAR struct timer_lowerhalf_s *lower,
-                            CODE tccb_t handler);
+  CODE void (*setcallback)(FAR struct timer_lowerhalf_s *lower,
+                           CODE tccb_t callback, FAR void *arg);
 
   /* Any ioctl commands that are not recognized by the "upper-half" driver
    * are forwarded to the lower half driver through this method.
@@ -249,6 +260,32 @@ FAR void *timer_register(FAR const char *path,
 
 void timer_unregister(FAR void *handle);
 
+/****************************************************************************
+ * Kernal internal interfaces.  Thse may not be used by application logic
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: timer_setcallback
+ *
+ * Description:
+ *   This function can be called to add a callback into driver-related code
+ *   to handle timer expirations.  This is a strictly OS internal interface
+ *   and may NOT be used by appliction code.
+ *
+ * Input parameters:
+ *   handle   - This is the handle that was returned by timer_register()
+ *   callback - The new timer interrupt callback
+ *   arg      - Argument provided when the callback is called.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef __KERNEL__
+int timer_setcallback(FAR void *handle, tccb_t callback, FAR void *arg);
+#endif
+
 /****************************************************************************
  * Platform-Independent "Lower-Half" Timer Driver Interfaces
  ****************************************************************************/
diff --git a/include/nuttx/usb/audio.h b/include/nuttx/usb/audio.h
index 8bec321225127e591f331440ca65abbfe979adea..ab1bb6528209661d4a091d6edac5a87d14992c88 100644
--- a/include/nuttx/usb/audio.h
+++ b/include/nuttx/usb/audio.h
@@ -2,7 +2,7 @@
  * include/nuttx/usb/audio.h
  * Audio Device Class (ADC) definitions
  *
- *   Copyright (C) 2012-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012-2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * References:  This header file is based on information provided by the
@@ -1321,18 +1321,18 @@ struct adc_l1_curparm_s
 
 /* Layout 1, Control RANGE Parameter Block */
 
-struct adc_l1_subrange_s
+begin_packed_struct struct adc_l1_subrange_s
 {
    uint8_t l1_min;              /* 0: MIN attribute */
    uint8_t l1_max;              /* 1: MAX attribute */
    uint8_t l1_res;              /* 2: RES attribute */
-} packed_struct;
+} end_packed_struct;
 
-struct adc_l1_rangeparm_s
+begin_packed_struct struct adc_l1_rangeparm_s
 {
    uint8_t l1_nranges;          /* 0: Number of sub-ranges */
    struct adc_l1_subrange_s l1_subrange[1];
-} packed_struct;
+} end_packed_struct;
 
 #define USB_SIZEOF_ADC_LI_RANGEPARM(nranges) (1+3*(nranges))
 
@@ -1422,18 +1422,18 @@ struct adc_equalizer_curparm_s
 
 /* Graphic Equalizer Control RANGE Parameter Block */
 
-struct adc_eq_subrange_s
+begin_packed_struct struct adc_eq_subrange_s
 {
    uint8_t eq_min;              /* 0: MIN attribute */
    uint8_t eq_max;              /* 1: MAX attribute */
    uint8_t eq_res;              /* 2: RES attribute */
-} packed_struct;
+} end_packed_struct;
 
-struct adc_equalizer_rangeparm_s
+begin_packed_struct struct adc_equalizer_rangeparm_s
 {
    uint8_t eq_nranges;          /* 0: Number of sub-ranges */
    struct adc_eq_subrange_s eq_subrange[1];
-} packed_struct;
+} end_packed_struct;
 
 #define USB_SIZEOF_ADC_EQUALIZER_RANGEPARM(nranges) (1+3*(nranges))
 
@@ -1457,18 +1457,18 @@ struct adc_hilo_curparm_s
 
 /* High/Low Scaling Control RANGE Parameter Block */
 
-struct adc_hl_subrange_s
+begin_packed_struct struct adc_hl_subrange_s
 {
    uint8_t hl_min;              /* 0: MIN attribute */
    uint8_t hl_max;              /* 1: MAX attribute */
    uint8_t hl_res;              /* 2: RES attribute */
-} packed_struct;
+} end_packed_struct;
 
-struct adc_hilo_rangeparm_s
+begin_packed_struct struct adc_hilo_rangeparm_s
 {
    uint8_t hl_nranges[2];       /* 0: Number of sub-ranges */
    struct adc_hl_subrange_s hl_subrange[1];
-} packed_struct;
+} end_packed_struct;
 
 #define USB_SIZEOF_ADC_HILO_RANGEPARM(nranges) (2+3*(nranges))
 
diff --git a/include/nuttx/usb/pl2303.h b/include/nuttx/usb/pl2303.h
index 925010db0273ce8d351e11316ea61cb3ff6fcc31..2f4ef137163148836d92a4d7953a62494684f09c 100644
--- a/include/nuttx/usb/pl2303.h
+++ b/include/nuttx/usb/pl2303.h
@@ -39,8 +39,8 @@
  *
  ************************************************************************************/
 
-#ifndef _INCLUDE_NUTTX_USB_PL2303_H
-#define _INCLUDE_NUTTX_USB_PL2303_H
+#ifndef __INCLUDE_NUTTX_USB_PL2303_H
+#define __INCLUDE_NUTTX_USB_PL2303_H
 
 /************************************************************************************
  * Included Files
@@ -88,4 +88,4 @@ int usbdev_serialinitialize(int minor);
 }
 #endif
 
-#endif /* _INCLUDE_NUTTX_USB_PL2303_H */
+#endif /* __INCLUDE_NUTTX_USB_PL2303_H */
diff --git a/include/nuttx/usb/usb.h b/include/nuttx/usb/usb.h
index d3c537bbcd6a1a0e211da9663c393d25d287e839..5195c114b4d584b9b30c6440e8404020d1ee2cd1 100644
--- a/include/nuttx/usb/usb.h
+++ b/include/nuttx/usb/usb.h
@@ -425,4 +425,5 @@ struct usb_iaddesc_s
  * Public Functions
  ************************************************************************************/
 
-#endif // __INCLUDE_NUTTX_USB_USB_H
+#endif /* __INCLUDE_NUTTX_USB_USB_H */
+
diff --git a/include/nuttx/usb/usbdev.h b/include/nuttx/usb/usbdev.h
index 1e36963f75f2fe821501aea2ab294419bf8dc60b..ed7fe433ee51170bc0646745fe694f45e8cb327d 100644
--- a/include/nuttx/usb/usbdev.h
+++ b/include/nuttx/usb/usbdev.h
@@ -39,8 +39,8 @@
  *
  ************************************************************************************/
 
-#ifndef _INCLUDE_NUTTX_USB_USBDEV_H
-#define _INCLUDE_NUTTX_USB_USBDEV_H
+#ifndef __INCLUDE_NUTTX_USB_USBDEV_H
+#define __INCLUDE_NUTTX_USB_USBDEV_H
 
 /************************************************************************************
  * Included Files
@@ -386,4 +386,4 @@ void usbdev_dma_free(FAR void *memory);
 }
 #endif
 
-#endif /* _INCLUDE_NUTTX_USB_USBDEV_H */
+#endif /* __INCLUDE_NUTTX_USB_USBDEV_H */
diff --git a/include/nuttx/usb/usbdev_trace.h b/include/nuttx/usb/usbdev_trace.h
index 445ef5f560a3933c8b8edc224588a20291e66fc3..55915caee8331a6ba5d9023f406974a2bffd2b76 100644
--- a/include/nuttx/usb/usbdev_trace.h
+++ b/include/nuttx/usb/usbdev_trace.h
@@ -295,7 +295,7 @@
 #define USBMSC_TRACEERR_CMDREADREADFAIL              0x0094
 #define USBMSC_TRACEERR_CMDREADSUBMIT                0x0095
 #define USBMSC_TRACEERR_CMDREADWRRQEMPTY             0x0096
-#define USBMSC_TRACEERR_CMDSTATUSRDREQLISTEMPTY      0x0097
+#define USBMSC_TRACEERR_CMDSTATUSWRREQLISTEMPTY      0x0097
 #define USBMSC_TRACEERR_CMDUNEVIOLATION              0x0098
 #define USBMSC_TRACEERR_CMDWRITERDSUBMIT             0x0099
 #define USBMSC_TRACEERR_CMDWRITERDRQEMPTY            0x009a
@@ -480,7 +480,7 @@ EXTERN const struct trace_msg_t g_usb_trace_strings_intdecode[];
  *
  ****************************************************************************/
 
-#if defined(CONFIG_USBDEV_TRACE) || (defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_USB))
+#if defined(CONFIG_USBDEV_TRACE) || (defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_USB))
 usbtrace_idset_t usbtrace_enable(usbtrace_idset_t idset);
 #else
 #  define usbtrace_enable(idset)
@@ -497,7 +497,7 @@ usbtrace_idset_t usbtrace_enable(usbtrace_idset_t idset);
  *
  ****************************************************************************/
 
-#if defined(CONFIG_USBDEV_TRACE) || (defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_USB))
+#if defined(CONFIG_USBDEV_TRACE) || (defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_USB))
 void usbtrace(uint16_t event, uint16_t value);
 #else
 #  define usbtrace(event, value)
diff --git a/include/nuttx/usb/usbhost_devaddr.h b/include/nuttx/usb/usbhost_devaddr.h
index df4514f3954196778a65b5af46689aba2be07ebf..378196b7d3a340e1a986786499d3c977ec31612a 100644
--- a/include/nuttx/usb/usbhost_devaddr.h
+++ b/include/nuttx/usb/usbhost_devaddr.h
@@ -40,8 +40,8 @@
  *
  ****************************************************************************/
 
-#ifndef _INCLUDE_NUTTX_USB_USBHOST_DEVADDR_H
-#define _INCLUDE_NUTTX_USB_USBHOST_DEVADDR_H
+#ifndef __INCLUDE_NUTTX_USB_USBHOST_DEVADDR_H
+#define __INCLUDE_NUTTX_USB_USBHOST_DEVADDR_H
 
 /****************************************************************************
  * Included Files
@@ -151,4 +151,4 @@ void usbhost_devaddr_destroy(FAR struct usbhost_hubport_s *hport,
 }
 #endif
 
-#endif /* _INCLUDE_NUTTX_USB_USBHOST_DEVADDR_H */
+#endif /* __INCLUDE_NUTTX_USB_USBHOST_DEVADDR_H */
diff --git a/include/nuttx/usb/usbhost_trace.h b/include/nuttx/usb/usbhost_trace.h
index f8e8d1b4956ef1d5421ae98a99b2d39565319d1e..f71b7c90b80c15bd6b8f32d8f3330e838cabad3e 100644
--- a/include/nuttx/usb/usbhost_trace.h
+++ b/include/nuttx/usb/usbhost_trace.h
@@ -48,9 +48,9 @@
 /* Configuration ************************************************************/
 /* Debug/Trace-related definitions */
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
 #  undef CONFIG_DEBUG_USB
-#  undef CONFIG_DEBUG_VERBOSE
+#  undef CONFIG_DEBUG_INFO
 #endif
 
 #ifndef CONFIG_USBHOST_TRACE
@@ -61,7 +61,7 @@
 
 #if defined(CONFIG_USBHOST_TRACE) || defined(CONFIG_DEBUG_USB)
 #  define HAVE_USBHOST_TRACE 1
-#  if defined(CONFIG_USBHOST_TRACE_VERBOSE) || defined(CONFIG_DEBUG_VERBOSE)
+#  if defined(CONFIG_USBHOST_TRACE_VERBOSE) || defined(CONFIG_DEBUG_INFO)
 #    define HAVE_USBHOST_TRACE_VERBOSE 1
 #  endif
 #endif
@@ -115,8 +115,8 @@ extern "C"
  *
  ****************************************************************************/
 
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_FEATURES
+#  undef CONFIG_DEBUG_INFO
 #  undef CONFIG_DEBUG_USB
 #endif
 
diff --git a/include/nuttx/usb/usbmonitor.h b/include/nuttx/usb/usbmonitor.h
new file mode 100644
index 0000000000000000000000000000000000000000..d5be243e0546592ab653206ec753c48dbbce74af
--- /dev/null
+++ b/include/nuttx/usb/usbmonitor.h
@@ -0,0 +1,90 @@
+/****************************************************************************
+ * include/nuttx/usb/usbmonitor.h
+ *
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_USB_USBMONITOR_H
+#define __INCLUDE_NUTTX_USB_USBMONITOR_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#ifdef CONFIG_USBMONITOR
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: usbmonitor_start and usbmonitor_stop
+ *
+ *   Start and stop the USB monitor kernel deamon.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned values:
+ *   Zero (OK) is returned on success; a negated errno value is return on
+ *   any failure.
+ *
+ ****************************************************************************/
+
+int usbmonitor_start(void);
+int usbmonitor_stop(void);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CONFIG_USBMONITOR */
+#endif /* __INCLUDE_NUTTX_USB_USBMONITOR_H */
diff --git a/include/nuttx/usb/usbmsc.h b/include/nuttx/usb/usbmsc.h
index 140d2907ff8fe3d9b836a1f50b07aadd73ed60c9..270fac0da3e512d5749e9c5d39660d6b106569b9 100644
--- a/include/nuttx/usb/usbmsc.h
+++ b/include/nuttx/usb/usbmsc.h
@@ -39,8 +39,8 @@
  *
  ************************************************************************************/
 
-#ifndef _INCLUDE_NUTTX_USB_USBMSC_H
-#define _INCLUDE_NUTTX_USB_USBMSC_H
+#ifndef __INCLUDE_NUTTX_USB_USBMSC_H
+#define __INCLUDE_NUTTX_USB_USBMSC_H
 
 /************************************************************************************
  * Included Files
@@ -255,4 +255,4 @@ void usbmsc_uninitialize(FAR void *handle);
 }
 #endif
 
-#endif /* _INCLUDE_NUTTX_USB_USBMSC_H */
+#endif /* __INCLUDE_NUTTX_USB_USBMSC_H */
diff --git a/include/nuttx/video/fb.h b/include/nuttx/video/fb.h
index 1264515adeede1e67cdb9bd2144b1efcba2b7bb0..fec81822ca90f5b012a1ccfdc8179e5e39963b59 100644
--- a/include/nuttx/video/fb.h
+++ b/include/nuttx/video/fb.h
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef _INCLUDE_NUTTX_VIDEO_FB_H
-#define _INCLUDE_NUTTX_VIDEO_FB_H
+#ifndef __INCLUDE_NUTTX_VIDIO_FB_H
+#define __INCLUDE_NUTTX_VIDIO_FB_H
 
 /****************************************************************************
  * Included Files
@@ -426,4 +426,4 @@ void up_fbuninitialize(int display);
 }
 #endif
 
-#endif /* _INCLUDE_NUTTX_VIDEO_FB_H */
+#endif /* __INCLUDE_NUTTX_VIDIO_FB_H */
diff --git a/include/nuttx/wdog.h b/include/nuttx/wdog.h
index beb138809338f19f98baac3452f71c7199ec0f59..7aacca711c71a38c45c669ad935fee741bc49698 100644
--- a/include/nuttx/wdog.h
+++ b/include/nuttx/wdog.h
@@ -165,11 +165,117 @@ extern "C"
 #define EXTERN extern
 #endif
 
+/****************************************************************************
+ * Name: wd_create
+ *
+ * Description:
+ *   The wd_create function will create a watchdog timer by allocating one
+ *   from the list of free watchdog timers.
+ *
+ * Parameters:
+ *   None
+ *
+ * Return Value:
+ *   Pointer to watchdog (i.e., the watchdog ID), or NULL if insufficient
+ *   watchdogs are available.
+ *
+ ****************************************************************************/
+
 WDOG_ID wd_create(void);
-int     wd_delete(WDOG_ID wdog);
-int     wd_start(WDOG_ID wdog, int32_t delay, wdentry_t wdentry, int argc, ...);
-int     wd_cancel(WDOG_ID wdog);
-int     wd_gettime(WDOG_ID wdog);
+
+/****************************************************************************
+ * Name: wd_delete
+ *
+ * Description:
+ *   The wd_delete() function will deallocate a watchdog timer by returning
+ *   it to the free pool of watchdog timers.  The watchdog timer will be
+ *   removed from the active timer queue if had been started.
+ *
+ * Parameters:
+ *   wdog - The watchdog ID to delete.  This is actually a pointer to a
+ *          watchdog structure.
+ *
+ * Return Value:
+ *   Returns OK or ERROR
+ *
+ * Assumptions:
+ *   The caller has assured that the watchdog is no longer in use.
+ *
+ ****************************************************************************/
+
+int wd_delete(WDOG_ID wdog);
+
+/****************************************************************************
+ * Name: wd_start
+ *
+ * Description:
+ *   This function adds a watchdog timer to the actuve timer queue.  The
+ *   specified watchdog function at 'wdentry' will be called from the
+ *   interrupt level after the specified number of ticks has elapsed.
+ *   Watchdog timers may be started from the interrupt level.
+ *
+ *   Watchdog timers execute in the address environment that was in effect
+ *   when wd_start() is called.
+ *
+ *   Watchdog timers execute only once.
+ *
+ *   To replace either the timeout delay or the function to be executed,
+ *   call wd_start again with the same wdog; only the most recent wdStart()
+ *   on a given watchdog ID has any effect.
+ *
+ * Parameters:
+ *   wdog     - watchdog ID
+ *   delay    - Delay count in clock ticks
+ *   wdentry  - function to call on timeout
+ *   parm1..4 - parameters to pass to wdentry
+ *
+ * Return Value:
+ *   OK or ERROR
+ *
+ * Assumptions:
+ *   The watchdog routine runs in the context of the timer interrupt handler
+ *   and is subject to all ISR restrictions.
+ *
+ ****************************************************************************/
+
+int wd_start(WDOG_ID wdog, int32_t delay, wdentry_t wdentry, int argc, ...);
+
+/****************************************************************************
+ * Name: wd_cancel
+ *
+ * Description:
+ *   This function cancels a currently running watchdog timer. Watchdog
+ *   timers may be cancelled from the interrupt level.
+ *
+ * Parameters:
+ *   wdog - ID of the watchdog to cancel.
+ *
+ * Return Value:
+ *   Zero (OK) is returned on success;  A negated errno value is returned to
+ *   indicate the nature of any failure.
+ *
+ ****************************************************************************/
+
+int wd_cancel(WDOG_ID wdog);
+
+/****************************************************************************
+ * Name: wd_gettime
+ *
+ * Description:
+ *   This function returns the time remaining before the specified watchdog
+ *   timer expires.
+ *
+ * Parameters:
+ *   wdog - watchdog ID
+ *
+ * Return Value:
+ *   The time in system ticks remaining until the watchdog time expires.
+ *   Zero means either that wdog is not valid or that the wdog has already
+ *   expired.
+ *
+ ****************************************************************************/
+
+int wd_gettime(WDOG_ID wdog);
 
 #undef EXTERN
 #ifdef __cplusplus
diff --git a/include/nuttx/wireless/cc1101.h b/include/nuttx/wireless/cc1101.h
index 8d8c499296740340c3a52663879381b1e6c2726d..0f695744fb6d7529418097159798bb0b6df341fb 100644
--- a/include/nuttx/wireless/cc1101.h
+++ b/include/nuttx/wireless/cc1101.h
@@ -395,8 +395,8 @@ EXTERN const struct c1101_rfsettings_s cc1101_rfsettings_ISM2_905MHzGFSK250kbps;
  *
  ****************************************************************************/
 
-struct cc1101_dev_s * cc1101_init(struct spi_dev_s * spi, uint8_t isrpin,
-    uint32_t pinset, const struct c1101_rfsettings_s * rfsettings);
+struct cc1101_dev_s *cc1101_init(struct spi_dev_s *spi, uint8_t isrpin,
+    uint32_t pinset, const struct c1101_rfsettings_s *rfsettings);
 
 /****************************************************************************
  ** Deinitialize Chipcon CC1101 Chip
@@ -409,31 +409,31 @@ struct cc1101_dev_s * cc1101_init(struct spi_dev_s * spi, uint8_t isrpin,
  *
  ****************************************************************************/
 
-int cc1101_deinit(struct cc1101_dev_s * dev);
+int cc1101_deinit(struct cc1101_dev_s *dev);
 
 /****************************************************************************
  * Power up device, start conversion. Returns zero on success.
  ****************************************************************************/
 
-int cc1101_powerup(struct cc1101_dev_s * dev);
+int cc1101_powerup(struct cc1101_dev_s *dev);
 
 /****************************************************************************
  * Power down device, stop conversion. Returns zero on success.
  ****************************************************************************/
 
-int cc1101_powerdown(struct cc1101_dev_s * dev);
+int cc1101_powerdown(struct cc1101_dev_s *dev);
 
 /****************************************************************************
  * Set Multi Purpose Output Function. Returns zero on success.
  ****************************************************************************/
 
-int cc1101_setgdo(struct cc1101_dev_s * dev, uint8_t pin, uint8_t function);
+int cc1101_setgdo(struct cc1101_dev_s *dev, uint8_t pin, uint8_t function);
 
 /****************************************************************************
  * Set RF settings. Use one from the database above.
  ****************************************************************************/
 
-int cc1101_setrf(struct cc1101_dev_s * dev,
+int cc1101_setrf(struct cc1101_dev_s *dev,
                  const struct c1101_rfsettings_s *settings);
 
 /****************************************************************************
@@ -447,7 +447,7 @@ int cc1101_setrf(struct cc1101_dev_s * dev,
  *
  ****************************************************************************/
 
-int cc1101_setchannel(struct cc1101_dev_s * dev, uint8_t channel);
+int cc1101_setchannel(struct cc1101_dev_s *dev, uint8_t channel);
 
 /****************************************************************************
  * Set Output Power
@@ -465,7 +465,7 @@ int cc1101_setchannel(struct cc1101_dev_s * dev, uint8_t channel);
  *
  ****************************************************************************/
 
-uint8_t cc1101_setpower(struct cc1101_dev_s * dev, uint8_t power);
+uint8_t cc1101_setpower(struct cc1101_dev_s *dev, uint8_t power);
 
 /****************************************************************************
  * Convert RSSI as obtained from CC1101 to [dBm] */
@@ -486,7 +486,7 @@ int cc1101_calcRSSIdBm(int rssi);
  *
  ****************************************************************************/
 
-int cc1101_receive(struct cc1101_dev_s * dev);
+int cc1101_receive(struct cc1101_dev_s *dev);
 
 /****************************************************************************
  * Read received packet
@@ -508,7 +508,7 @@ int cc1101_receive(struct cc1101_dev_s * dev);
  *
  ****************************************************************************/
 
-int cc1101_read(struct cc1101_dev_s * dev, uint8_t * buf, size_t size);
+int cc1101_read(struct cc1101_dev_s *dev, uint8_t *buf, size_t size);
 
 /****************************************************************************
  * Write data to be send, using the cc1101_send()
@@ -522,7 +522,7 @@ int cc1101_read(struct cc1101_dev_s * dev, uint8_t * buf, size_t size);
  *
  ****************************************************************************/
 
-int cc1101_write(struct cc1101_dev_s * dev, const uint8_t * buf, size_t size);
+int cc1101_write(struct cc1101_dev_s *dev, const uint8_t *buf, size_t size);
 
 /****************************************************************************
  * Send data previously written using cc1101_write()
@@ -535,7 +535,7 @@ int cc1101_write(struct cc1101_dev_s * dev, const uint8_t * buf, size_t size);
  *
  ****************************************************************************/
 
-int cc1101_send(struct cc1101_dev_s * dev);
+int cc1101_send(struct cc1101_dev_s *dev);
 
 /****************************************************************************
  * Enter idle state (after reception and transmission completes).
@@ -545,7 +545,7 @@ int cc1101_send(struct cc1101_dev_s * dev);
  *
  ****************************************************************************/
 
-int cc1101_idle(struct cc1101_dev_s * dev);
+int cc1101_idle(struct cc1101_dev_s *dev);
 
 #undef EXTERN
 #if defined(__cplusplus)
diff --git a/include/nuttx/wireless/cc3000.h b/include/nuttx/wireless/cc3000.h
index f369dc07943103663fc3299dcd7e66fa238bcc63..6aa234ed5607f66a52c3c66d0c3867630b2c9b3a 100644
--- a/include/nuttx/wireless/cc3000.h
+++ b/include/nuttx/wireless/cc3000.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * include/nuttx/wireless/cc3000.h
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2017 Gregory Nutt. All rights reserved.
  *   Authors: Gregory Nutt 
  *            David Sidrane 
  *
@@ -56,24 +56,24 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-#define DEV_FORMAT   "/dev/wireless%d" /* The device Name*/
-#define DEV_NAMELEN  17                /* The buffer size to hold formatted string*/
+#define DEV_FORMAT    "/dev/wireless%d" /* The device Name*/
+#define DEV_NAMELEN   17                /* The buffer size to hold formatted string*/
 
-#define QUEUE_FORMAT   "wlq%d"         /* The Queue name */
-#define QUEUE_NAMELEN  8               /* The buffer size to hold formatted string*/
+#define QUEUE_FORMAT  "wlq%d"           /* The Queue name */
+#define QUEUE_NAMELEN 8                 /* The buffer size to hold formatted string*/
 
-#define SEM_FORMAT   "wls%d"           /* The Spi Resume Senaphore name*/
-#define SEM_NAMELEN   8                /* The buffer size to hold formatted string*/
+#define SEM_FORMAT    "wls%d"           /* The Spi Resume Senaphore name*/
+#define SEM_NAMELEN   8                 /* The buffer size to hold formatted string*/
 
 /* IOCTL commands */
 
-#define CC3000IOC_GETQUESEMID  _WLIOC_USER(0x0001) /* arg: Address of int for number*/
-#define CC3000IOC_ADDSOCKET    _WLIOC_USER(0x0002) /* arg: Address of int for result*/
-#define CC3000IOC_REMOVESOCKET _WLIOC_USER(0x0003) /* arg: Address of int for result*/
-#define CC3000IOC_SELECTDATA   _WLIOC_USER(0x0004) /* arg: Address of int for result*/
-#define CC3000IOC_SELECTACCEPT _WLIOC_USER(0x0005) /* arg: Address of struct cc3000_acceptcfg_s */
-#define CC3000IOC_SETRX_SIZE   _WLIOC_USER(0x0006) /* arg: Address of int for new size */
-#define CC3000IOC_REMOTECLOSEDSOCKET _WLIOC_USER(0x0007) /* arg: Address of int for result*/
+#define CC3000IOC_GETQUESEMID  _WLIOC(CC3000_FIRST+0) /* arg: Address of int for number*/
+#define CC3000IOC_ADDSOCKET    _WLIOC(CC3000_FIRST+1) /* arg: Address of int for result*/
+#define CC3000IOC_REMOVESOCKET _WLIOC(CC3000_FIRST+2) /* arg: Address of int for result*/
+#define CC3000IOC_SELECTDATA   _WLIOC(CC3000_FIRST+3) /* arg: Address of int for result*/
+#define CC3000IOC_SELECTACCEPT _WLIOC(CC3000_FIRST+4) /* arg: Address of struct cc3000_acceptcfg_s */
+#define CC3000IOC_SETRX_SIZE   _WLIOC(CC3000_FIRST+5) /* arg: Address of int for new size */
+#define CC3000IOC_REMOTECLOSEDSOCKET _WLIOC(CC3000_FIRST+6) /* arg: Address of int for result*/
 
 /****************************************************************************
  * Public Types
diff --git a/include/nuttx/wireless/cc3000/cc3000_common.h b/include/nuttx/wireless/cc3000/cc3000_common.h
index 4a11f74591b4545c6957e8a65c4d2f5c2b891d77..857c6560b33583a967fd65dcfd142297379e692c 100644
--- a/include/nuttx/wireless/cc3000/cc3000_common.h
+++ b/include/nuttx/wireless/cc3000/cc3000_common.h
@@ -32,8 +32,8 @@
  *
  ****************************************************************************/
 
-#ifndef _INCLUDE_NUTTX_WIRELESS_CC3000_CC3000_COMMON_H
-#define _INCLUDE_NUTTX_WIRELESS_CC3000_CC3000_COMMON_H
+#ifndef __INCLUDE_NUTTX_WIRELESS_CC3000_CC3300_COMMON_H
+#define __INCLUDE_NUTTX_WIRELESS_CC3000_CC3300_COMMON_H
 
 /****************************************************************************
  * Included files
@@ -391,4 +391,4 @@ unsigned long STREAM_TO_UINT32_f(char* p, uint16_t offset);
 }
 #endif // __cplusplus
 
-#endif // _INCLUDE_NUTTX_WIRELESS_CC3000_CC3000_COMMON_H
+#endif // __INCLUDE_NUTTX_WIRELESS_CC3000_CC3300_COMMON_H
diff --git a/include/nuttx/wireless/cc3000/hci.h b/include/nuttx/wireless/cc3000/hci.h
index 409fd9d1e94dbaaa0254b1f949d5febd3a4608ec..8b4c3e67ab53dd8e9ad88eec25f4d25bf3cc1343 100644
--- a/include/nuttx/wireless/cc3000/hci.h
+++ b/include/nuttx/wireless/cc3000/hci.h
@@ -32,8 +32,8 @@
  *
  ****************************************************************************/
 
-#ifndef _INCLUDE_NUTTX_WIRELESS_CC3000_HCI_H
-#define _INCLUDE_NUTTX_WIRELESS_CC3000_HCI_H
+#ifndef __INCLUDE_NUTTX_WIRELESS_CC3000_HCI_H
+#define __INCLUDE_NUTTX_WIRELESS_CC3000_HCI_H
 
 /****************************************************************************
  * Included Files
@@ -296,4 +296,4 @@ void hci_patch_send(uint8_t ucOpcode, uint8_t *pucBuff, char *patch,
 }
 #endif // __cplusplus
 
-#endif // _INCLUDE_NUTTX_WIRELESS_CC3000_HCI_H
+#endif // __INCLUDE_NUTTX_WIRELESS_CC3000_HCI_H
diff --git a/include/nuttx/wireless/cc3000/include/cc3000_upif.h b/include/nuttx/wireless/cc3000/include/cc3000_upif.h
index 26c2e1097212fcb5b0b742a3a3fbd914d9085046..e24d572b009d29c70602ed65ab632d4896c72557 100644
--- a/include/nuttx/wireless/cc3000/include/cc3000_upif.h
+++ b/include/nuttx/wireless/cc3000/include/cc3000_upif.h
@@ -138,7 +138,7 @@ struct cc3000_config_s
    *   probe            - Debug support
    */
 
-  int  (*irq_attach)(FAR struct cc3000_config_s *state, xcpt_t isr);
+  int  (*irq_attach)(FAR struct cc3000_config_s *state, xcpt_t isr, FAR void *arg);
   void (*irq_enable)(FAR struct cc3000_config_s *state, bool enable);
   void (*irq_clear)(FAR struct cc3000_config_s *state);
   void (*power_enable)(FAR struct cc3000_config_s *state,bool enable);
diff --git a/include/nuttx/wireless/cc3000/netapp.h b/include/nuttx/wireless/cc3000/netapp.h
index e42b5876a4039b4f15b62dbcb0ebcfd3a08cebf4..8a0bcf4acb50d3ea19e0b5fb4835fb4f9e979cea 100644
--- a/include/nuttx/wireless/cc3000/netapp.h
+++ b/include/nuttx/wireless/cc3000/netapp.h
@@ -32,8 +32,8 @@
  *
  ****************************************************************************/
 
-#ifndef _INCLUDE_NUTTX_WIRELESS_CC3000_NETAPP_H
-#define  _INCLUDE_NUTTX_WIRELESS_CC3000_NETAPP_H
+#ifndef __INCLUDE_NUTTX_WIRELESS_CC3000_NETAPP_H
+#define __INCLUDE_NUTTX_WIRELESS_CC3000_NETAPP_H
 
 /****************************************************************************
  * Included Files
@@ -354,4 +354,4 @@ long netapp_set_debug_level(unsigned long ulLevel);
 }
 #endif // __cplusplus
 
-#endif  // _INCLUDE_NUTTX_WIRELESS_CC3000_NETAPP_H
+#endif  // __INCLUDE_NUTTX_WIRELESS_CC3000_NETAPP_H
diff --git a/include/nuttx/wireless/cc3000/nvmem.h b/include/nuttx/wireless/cc3000/nvmem.h
index f9b3b48695c353d69841a9da78bfbe82dccd9028..afc6aec8905391b2616e5b5537686c309561f8d2 100644
--- a/include/nuttx/wireless/cc3000/nvmem.h
+++ b/include/nuttx/wireless/cc3000/nvmem.h
@@ -32,8 +32,8 @@
  *
  ****************************************************************************/
 
-#ifndef _INCLUDE_NUTTX_WIRELESS_CC3000_NVMEM_H
-#define _INCLUDE_NUTTX_WIRELESS_CC3000_NVMEM_H
+#ifndef __INCLUDE_NUTTX_WIRELESS_CC3000_NVMEM_H
+#define __INCLUDE_NUTTX_WIRELESS_CC3000_NVMEM_H
 
 /****************************************************************************
  * Included Files
@@ -241,4 +241,4 @@ signed long nvmem_create_entry(unsigned long ulFileId, unsigned long ulNewLen);
 }
 #endif // __cplusplus
 
-#endif // _INCLUDE_NUTTX_WIRELESS_CC3000_NVMEM_H
+#endif // __INCLUDE_NUTTX_WIRELESS_CC3000_NVMEM_H
diff --git a/include/nuttx/wireless/nrf24l01.h b/include/nuttx/wireless/nrf24l01.h
index 6d2128606b6e498f8be2e50950e5b54dc0e9494a..af17428d23721ab1b4160243caca60c26d4db8f5 100644
--- a/include/nuttx/wireless/nrf24l01.h
+++ b/include/nuttx/wireless/nrf24l01.h
@@ -52,36 +52,36 @@
  * Pre-Processor Declarations
  ****************************************************************************/
 
-#define NRF24L01_MIN_ADDR_LEN 3      /* Minimal length (in bytes) of a pipe address */
-#define NRF24L01_MAX_ADDR_LEN 5      /* Maximum length (in bytes) of a pipe address */
-#define NRF24L01_MAX_PAYLOAD_LEN 32  /* Maximum length (in bytes) of a payload */
-#define NRF24L01_MAX_XMIT_RETR 15    /* Maximum auto retransmit count (for AA transmissions) */
-#define NRF24L01_PIPE_COUNT 6        /* Number of available pipes */
+#define NRF24L01_MIN_ADDR_LEN    3      /* Minimal length (in bytes) of a pipe address */
+#define NRF24L01_MAX_ADDR_LEN    5      /* Maximum length (in bytes) of a pipe address */
+#define NRF24L01_MAX_PAYLOAD_LEN 32     /* Maximum length (in bytes) of a payload */
+#define NRF24L01_MAX_XMIT_RETR   15     /* Maximum auto retransmit count (for AA transmissions) */
+#define NRF24L01_PIPE_COUNT      6      /* Number of available pipes */
 
-#define NRF24L01_MIN_FREQ       2400   /* Lower bound for RF frequency */
-#define NRF24L01_MAX_FREQ       2525   /* Upper bound for RF frequency */
+#define NRF24L01_MIN_FREQ        2400   /* Lower bound for RF frequency */
+#define NRF24L01_MAX_FREQ        2525   /* Upper bound for RF frequency */
 
-#define NRF24L01_DYN_LENGTH     33     /* Specific length value to use to enable dynamic packet length */
-#define NRF24L01_XMIT_MAXRT     255    /* Specific value returned by Number of available pipes */
+#define NRF24L01_DYN_LENGTH      33     /* Specific length value to use to enable dynamic packet length */
+#define NRF24L01_XMIT_MAXRT      255    /* Specific value returned by Number of available pipes */
 
-/* #define NRF24L01_DEBUG       1 */
+/* #define NRF24L01_DEBUG        1 */
 
 /* IOCTL commands */
 
-#define NRF24L01IOC_SETRETRCFG       _WLIOC_USER(0x0001)   /* arg: Pointer to nrf24l01_retrcfg_t structure */
-#define NRF24L01IOC_GETRETRCFG       _WLIOC_USER(0x0002)   /* arg: Pointer to nrf24l01_retrcfg_t structure */
-#define NRF24L01IOC_SETPIPESCFG      _WLIOC_USER(0x0003)   /* arg: Pointer to an array of nrf24l01_pipecfg_t pointers */
-#define NRF24L01IOC_GETPIPESCFG      _WLIOC_USER(0x0004)   /* arg: Pointer to an array of nrf24l01_pipecfg_t pointers */
-#define NRF24L01IOC_SETPIPESENABLED  _WLIOC_USER(0x0005)   /* arg: Pointer to a uint8_t value,  bit field of enabled / disabled pipes */
-#define NRF24L01IOC_GETPIPESENABLED  _WLIOC_USER(0x0006)   /* arg: Pointer to a uint8_t value,  bit field of enabled / disabled pipes */
-#define NRF24L01IOC_SETDATARATE      _WLIOC_USER(0x0007)   /* arg: Pointer to a nrf24l01_datarate_t value */
-#define NRF24L01IOC_GETDATARATE      _WLIOC_USER(0x0008)   /* arg: Pointer to a nrf24l01_datarate_t value */
-#define NRF24L01IOC_SETADDRWIDTH     _WLIOC_USER(0x0009)   /* arg: Pointer to an uint32_t value,  width of the address */
-#define NRF24L01IOC_GETADDRWIDTH     _WLIOC_USER(0x000A)   /* arg: Pointer to an uint32_t value,  width of the address */
-#define NRF24L01IOC_SETSTATE         _WLIOC_USER(0x000B)   /* arg: Pointer to a nrf24l01_state_t value */
-#define NRF24L01IOC_GETSTATE         _WLIOC_USER(0x000C)   /* arg: Pointer to a nrf24l01_state_t value */
-#define NRF24L01IOC_GETLASTXMITCOUNT _WLIOC_USER(0x000D)   /* arg: Pointer to an uint32_t value,  retransmission count of the last send operation (NRF24L01_XMIT_MAXRT if no ACK received)*/
-#define NRF24L01IOC_GETLASTPIPENO    _WLIOC_USER(0x000E)   /* arg: Pointer to an uint32_t value,  pipe # of the last received packet */
+#define NRF24L01IOC_SETRETRCFG       _WLIOC(NRF24L01_FIRST+0)   /* arg: Pointer to nrf24l01_retrcfg_t structure */
+#define NRF24L01IOC_GETRETRCFG       _WLIOC(NRF24L01_FIRST+1)   /* arg: Pointer to nrf24l01_retrcfg_t structure */
+#define NRF24L01IOC_SETPIPESCFG      _WLIOC(NRF24L01_FIRST+2)   /* arg: Pointer to an array of nrf24l01_pipecfg_t pointers */
+#define NRF24L01IOC_GETPIPESCFG      _WLIOC(NRF24L01_FIRST+3)   /* arg: Pointer to an array of nrf24l01_pipecfg_t pointers */
+#define NRF24L01IOC_SETPIPESENABLED  _WLIOC(NRF24L01_FIRST+4)   /* arg: Pointer to a uint8_t value, bit field of enabled / disabled pipes */
+#define NRF24L01IOC_GETPIPESENABLED  _WLIOC(NRF24L01_FIRST+5)   /* arg: Pointer to a uint8_t value, bit field of enabled / disabled pipes */
+#define NRF24L01IOC_SETDATARATE      _WLIOC(NRF24L01_FIRST+6)   /* arg: Pointer to a nrf24l01_datarate_t value */
+#define NRF24L01IOC_GETDATARATE      _WLIOC(NRF24L01_FIRST+7)   /* arg: Pointer to a nrf24l01_datarate_t value */
+#define NRF24L01IOC_SETADDRWIDTH     _WLIOC(NRF24L01_FIRST+8)   /* arg: Pointer to an uint32_t value, width of the address */
+#define NRF24L01IOC_GETADDRWIDTH     _WLIOC(NRF24L01_FIRST+9)   /* arg: Pointer to an uint32_t value, width of the address */
+#define NRF24L01IOC_SETSTATE         _WLIOC(NRF24L01_FIRST+10)  /* arg: Pointer to a nrf24l01_state_t value */
+#define NRF24L01IOC_GETSTATE         _WLIOC(NRF24L01_FIRST+11)  /* arg: Pointer to a nrf24l01_state_t value */
+#define NRF24L01IOC_GETLASTXMITCOUNT _WLIOC(NRF24L01_FIRST+12)  /* arg: Pointer to an uint32_t value, retransmission count of the last send operation (NRF24L01_XMIT_MAXRT if no ACK received)*/
+#define NRF24L01IOC_GETLASTPIPENO    _WLIOC(NRF24L01_FIRST+13)  /* arg: Pointer to an uint32_t value, pipe # of the last received packet */
 
 /* Aliased name for these commands */
 
@@ -91,15 +91,13 @@
 /* NRF24L01 debug */
 
 #ifdef NRF24L01_DEBUG
-# define wdbg(format, ...)           dbg(format, ##__VA_ARGS__)
-# define wlldbg(format, ...)         lldbg(format, ##__VA_ARGS__)
-# define wvdbg(format, ...)          vdbg(format, ##__VA_ARGS__)
-# define wllvdbg(format, ...)        llvdbg(format, ##__VA_ARGS__)
+# define werr(format, ...)           _err(format, ##__VA_ARGS__)
+# define werr(format, ...)           _err(format, ##__VA_ARGS__)
+# define winfo(format, ...)          _info(format, ##__VA_ARGS__)
 #else
-# define wdbg(x...)
-# define wlldbg(x...)
-# define wvdbg(x...)
-# define wllvdbg(x...)
+# define werr(x...)
+# define werr(x...)
+# define winfo(x...)
 #endif
 
 /****************************************************************************
@@ -201,7 +199,7 @@ struct nrf24l01_config_s
    * chipenable - Enable or disable the chip  (CE line)
    */
 
-  int  (*irqattach)(xcpt_t isr);
+  int  (*irqattach)(xcpt_t isr, FAR void *arg);
   void (*chipenable)(bool enable);
 };
 
@@ -237,12 +235,6 @@ int nrf24l01_register(FAR struct spi_dev_s *spi, FAR struct nrf24l01_config_s *c
 
 int nrf24l01_init(FAR struct nrf24l01_dev_s *dev);
 
-/************************************************************************************
- * Get a pointer to the registered device
- ************************************************************************************/
-
-FAR struct nrf24l01_dev_s * nrf24l01_getinstance(void);
-
 /************************************************************************************
  * Set the default TX address.
  *
diff --git a/include/nuttx/wireless/wireless.h b/include/nuttx/wireless/wireless.h
index fd87265228dad81dc4085de1754c2b701c30aca0..f1726691140e319ff88803d3bfe05f7b85979e80 100644
--- a/include/nuttx/wireless/wireless.h
+++ b/include/nuttx/wireless/wireless.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * include/nuttx/wireless/wireless.h
  *
- *   Copyright (C) 2011-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Laurent Latil 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -52,7 +52,9 @@
 /************************************************************************************
  * Pre-processor Definitions
  ************************************************************************************/
+
 /* IOCTL Commands *******************************************************************/
+/* Common wireless IOCTL commands */
 
 #define WLIOC_SETRADIOFREQ     _WLIOC(0x0001)  /* arg: Pointer to uint32_t, frequency value (in Mhz) */
 #define WLIOC_GETRADIOFREQ     _WLIOC(0x0002)  /* arg: Pointer to uint32_t, frequency value (in Mhz) */
@@ -61,14 +63,25 @@
 #define WLIOC_SETTXPOWER       _WLIOC(0x0005)  /* arg: Pointer to int32_t, output power (in dBm) */
 #define WLIOC_GETTXPOWER       _WLIOC(0x0006)  /* arg: Pointer to int32_t, output power (in dBm) */
 
-/* Wireless drivers can provide additional, device specific ioctl
- * commands, beginning with this value:
+#define WL_FIRST               0x0001          /* First common command */
+#define WL_NCMDS               6               /* Six common commands */
+
+/* User defined ioctl commands are also supported. These will be forwarded
+ * by the upper-half QE driver to the lower-half QE driver via the ioctl()
+ * method fo the QE lower-half interface.  However, the lower-half driver
+ * must reserve a block of commands as follows in order prevent IOCTL
+ * command numbers from overlapping.
  */
 
-#define WLIOC_USER              0x0007         /* Lowest, unused WL ioctl command */
+/* See include/nuttx/wireless/cc3000.h */
+
+#define CC3000_FIRST           (WL_FIRST + WL_NCMDS)
+#define CC3000_NCMDS           7
 
-#define _WLIOC_USER(nr)         _WLIOC(nr + WLIOC_USER)
+/* See include/nuttx/wireless/nrf24l01.h */
 
-#endif
+#define NRF24L01_FIRST         (CC3000_FIRST + CC3000_NCMDS)
+#define NRF24L01_NCMDS         14
 
-#endif  /* __INCLUDE_NUTTX_WIRELESS_H */
+#endif /* CONFIG_DRIVERS_WIRELESS */
+#endif /* __INCLUDE_NUTTX_WIRELESS_H */
diff --git a/include/nuttx/zoneinfo.h b/include/nuttx/zoneinfo.h
new file mode 100644
index 0000000000000000000000000000000000000000..67f4214e0b3f5d28842a9354a11c71c4863946de
--- /dev/null
+++ b/include/nuttx/zoneinfo.h
@@ -0,0 +1,83 @@
+/****************************************************************************
+ * include/nuttx/zoneinfo.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_NUTTX_ZONEINFO_H
+#define __INCLUDE_NUTTX_ZONEINFO_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#ifdef CONFIG_LIB_ZONEINFO_ROMFS
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/* If the TZ database is built as a ROMFS file system, then these variables
+ * provide (1) the address of the array in FLASH/ROM that contains the 
+ * ROMFS file system image, and (2) the size of the ROMFS file system image
+ * in bytes.  This is sufficient information to permit external logic to
+ * mount the ROMF file system.
+ */
+
+EXTERN unsigned char romfs_zoneinfo_img[];
+EXTERN unsigned int  romfs_zoneinfo_img_len;
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CONFIG_LIB_ZONEINFO_ROMFS */
+#endif /* __INCLUDE_NUTTX_ZONEINFO_H */
diff --git a/include/pthread.h b/include/pthread.h
index b2ebffda45bec72cb786da09507437f309a8e40c..d943a843e2f1391729513b11ab5fb03072943586 100644
--- a/include/pthread.h
+++ b/include/pthread.h
@@ -40,18 +40,19 @@
  * Included Files
  ********************************************************************************/
 
-#include    /* Default settings */
-#include  /* Compiler settings, noreturn_function */
+#include     /* Default settings */
+#include   /* Compiler settings, noreturn_function */
 
-#include       /* Needed for general types */
-#include       /* Needed by pthread_[set|get]name_np */
+#include        /* Needed for general types */
+#include        /* Needed by pthread_[set|get]name_np */
 
-#include          /* C99 fixed width integer types */
-#include         /* C99 boolean types */
-#include          /* For getpid */
-#include       /* Needed for sem_t */
-#include          /* Needed for sigset_t, includes this file */
-#include            /* Needed for struct timespec */
+#include           /* C99 fixed width integer types */
+#include          /* C99 boolean types */
+#include           /* For getpid */
+#include           /* Needed for sigset_t, includes this file */
+#include             /* Needed for struct timespec */
+
+#include  /* For sem_t and SEM_PRIO_* defines */
 
 /********************************************************************************
  * Pre-processor Definitions
@@ -95,12 +96,10 @@
  *  An implementation is allowed to map this mutex to one of the other mutex types.
  */
 
-#ifdef CONFIG_MUTEX_TYPES
-#  define PTHREAD_MUTEX_NORMAL        0
-#  define PTHREAD_MUTEX_ERRORCHECK    1
-#  define PTHREAD_MUTEX_RECURSIVE     2
-#  define PTHREAD_MUTEX_DEFAULT       PTHREAD_MUTEX_NORMAL
-#endif
+#define PTHREAD_MUTEX_NORMAL          0
+#define PTHREAD_MUTEX_ERRORCHECK      1
+#define PTHREAD_MUTEX_RECURSIVE       2
+#define PTHREAD_MUTEX_DEFAULT         PTHREAD_MUTEX_NORMAL
 
 /* Valid ranges for the pthread stacksize attribute */
 
@@ -112,17 +111,20 @@
 #define PTHREAD_INHERIT_SCHED         0
 #define PTHREAD_EXPLICIT_SCHED        1
 
-#define PTHREAD_PRIO_NONE             0
-#define PTHREAD_PRIO_INHERIT          1
-#define PTHREAD_PRIO_PROTECT          2
+/* Default priority */
 
 #define PTHREAD_DEFAULT_PRIORITY      100
 
-/* Cancellation states returned by pthread_cancelstate() */
+/* Cancellation states used by pthread_setcancelstate() */
 
 #define PTHREAD_CANCEL_ENABLE         (0)
 #define PTHREAD_CANCEL_DISABLE        (1)
 
+/* Cancellation types used by pthread_setcanceltype() */
+
+#define PTHREAD_CANCEL_DEFERRED       (0)
+#define PTHREAD_CANCEL_ASYNCHRONOUS   (1)
+
 /* Thread return value when a pthread is canceled */
 
 #define PTHREAD_CANCELED              ((FAR void*)ERROR)
@@ -135,10 +137,16 @@
 
 #define PTHREAD_BARRIER_SERIAL_THREAD 0x1000
 
+/* Values for protocol mutex attribute */
+
+#define PTHREAD_PRIO_NONE             SEM_PRIO_NONE
+#define PTHREAD_PRIO_INHERIT          SEM_PRIO_INHERIT
+#define PTHREAD_PRIO_PROTECT          SEM_PRIO_PROTECT
+
 /* Definitions to map some non-standard, BSD thread management interfaces to
  * the non-standard Linux-like prctl() interface.  Since these are simple
  * mappings to prctl, they will return 0 on success and -1 on failure with the
- * err number in errno.  This is an inconsistency with the pthread interfaces.
+ * error number in errno.  This is an inconsistency with the pthread interfaces.
  */
 
 #define pthread_setname_np(thread, name) \
@@ -212,6 +220,9 @@ typedef struct pthread_cond_s pthread_cond_t;
 struct pthread_mutexattr_s
 {
   uint8_t pshared;  /* PTHREAD_PROCESS_PRIVATE or PTHREAD_PROCESS_SHARED */
+#ifdef CONFIG_PRIORITY_INHERITANCE
+  uint8_t proto;    /* See PTHREAD_PRIO_* definitions */
+#endif
 #ifdef CONFIG_MUTEX_TYPES
   uint8_t type;     /* Type of the mutex.  See PTHREAD_MUTEX_* definitions */
 #endif
@@ -222,11 +233,11 @@ typedef struct pthread_mutexattr_s pthread_mutexattr_t;
 
 struct pthread_mutex_s
 {
-  int   pid;      /* ID of the holder of the mutex */
-  sem_t sem;      /* Semaphore underlying the implementation of the mutex */
+  int pid;          /* ID of the holder of the mutex */
+  sem_t sem;        /* Semaphore underlying the implementation of the mutex */
 #ifdef CONFIG_MUTEX_TYPES
-  uint8_t type;   /* Type of the mutex.  See PTHREAD_MUTEX_* definitions */
-  int   nlocks;   /* The number of recursive locks held */
+  uint8_t type;     /* Type of the mutex.  See PTHREAD_MUTEX_* definitions */
+  int nlocks;       /* The number of recursive locks held */
 #endif
 };
 
@@ -259,6 +270,12 @@ typedef struct pthread_barrier_s pthread_barrier_t;
 typedef bool pthread_once_t;
 #define __PTHREAD_ONCE_T_DEFINED 1
 
+#ifdef CONFIG_PTHREAD_CLEANUP
+/* This type describes the pthread cleanup callback (non-standard) */
+
+typedef CODE void (*pthread_cleanup_t)(FAR void *arg);
+#endif
+
 /* Forward references */
 
 struct sched_param; /* Defined in sched.h */
@@ -328,8 +345,18 @@ int pthread_detach(pthread_t thread);
 void pthread_exit(pthread_addr_t value) noreturn_function;
 int  pthread_cancel(pthread_t thread);
 int  pthread_setcancelstate(int state, FAR int *oldstate);
+int  pthread_setcanceltype(int type, FAR int *oldtype);
 void pthread_testcancel(void);
 
+/* A thread may set up cleanup functions to execut when the thread exits or
+ * is canceled.
+ */
+
+#ifdef CONFIG_PTHREAD_CLEANUP
+void pthread_cleanup_pop(int execute);
+void pthread_cleanup_push(pthread_cleanup_t routine, FAR void *arg);
+#endif
+
 /* A thread can await termination of another thread and retrieve the return
  * value of the thread.
  */
@@ -381,10 +408,12 @@ int pthread_mutexattr_getpshared(FAR const pthread_mutexattr_t *attr,
                                  FAR int *pshared);
 int pthread_mutexattr_setpshared(FAR pthread_mutexattr_t *attr,
                                  int pshared);
-#ifdef CONFIG_MUTEX_TYPES
 int pthread_mutexattr_gettype(const pthread_mutexattr_t *attr, int *type);
 int pthread_mutexattr_settype(pthread_mutexattr_t *attr, int type);
-#endif
+int pthread_mutexattr_getprotocol(FAR const pthread_mutexattr_t *attr,
+                                  FAR int *protocol);
+int pthread_mutexattr_setprotocol(FAR pthread_mutexattr_t *attr,
+                                  int protocol);
 
 /* The following routines create, delete, lock and unlock mutexes. */
 
diff --git a/include/sched.h b/include/sched.h
index b9a21f0f6f07d0a7a244c1d276b28a1456394907..f63c42201ae292054f8598a984d7961996573142 100644
--- a/include/sched.h
+++ b/include/sched.h
@@ -1,7 +1,7 @@
 /********************************************************************************
  * include/sched.h
  *
- *   Copyright (C) 2007-2009, 2011, 2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011, 2013, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -44,6 +44,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 /********************************************************************************
@@ -53,18 +54,30 @@
 
 /* POSIX-like scheduling policies */
 
-#define SCHED_FIFO       1  /* FIFO priority scheduling policy */
-#define SCHED_RR         2  /* Round robin scheduling policy */
-#define SCHED_SPORADIC   3  /* Sporadic scheduling policy */
-#define SCHED_OTHER      4  /* Not supported */
+#define SCHED_FIFO                1  /* FIFO priority scheduling policy */
+#define SCHED_RR                  2  /* Round robin scheduling policy */
+#define SCHED_SPORADIC            3  /* Sporadic scheduling policy */
+#define SCHED_OTHER               4  /* Not supported */
 
 /* Maximum number of SCHED_SPORADIC replenishments */
 
-#define SS_REPL_MAX      CONFIG_SCHED_SPORADIC_MAXREPL
+#define SS_REPL_MAX               CONFIG_SCHED_SPORADIC_MAXREPL
+
+/* Cancellation definitions *****************************************************/
+
+/* Cancellation states used by task_setcancelstate() */
+
+#define TASK_CANCEL_ENABLE        (0)
+#define TASK_CANCEL_DISABLE       (1)
+
+/* Cancellation types used by task_setcanceltype() */
+
+#define TASK_CANCEL_DEFERRED      (0)
+#define TASK_CANCEL_ASYNCHRONOUS  (1)
 
 /* Pthread definitions **********************************************************/
 
-#define PTHREAD_KEYS_MAX CONFIG_NPTHREAD_KEYS
+#define PTHREAD_KEYS_MAX          CONFIG_NPTHREAD_KEYS
 
 /* CPU affinity mask helpers ***************************************************/
 /* These are not standard but are defined for Linux compatibility */
@@ -228,6 +241,10 @@ int    task_create(FAR const char *name, int priority, int stack_size,
 int    task_delete(pid_t pid);
 int    task_restart(pid_t pid);
 
+int    task_setcancelstate(int state, FAR int *oldstate);
+int    task_setcanceltype(int type, FAR int *oldtype);
+void   task_testcancel(void);
+
 /* Task Scheduling Interfaces (based on POSIX APIs) */
 
 int    sched_setparam(pid_t pid, const struct sched_param *param);
@@ -255,6 +272,10 @@ int    sched_lock(void);
 int    sched_unlock(void);
 int    sched_lockcount(void);
 
+/* Queries */
+
+bool   sched_idletask(void);
+
 #undef EXTERN
 #if defined(__cplusplus)
 }
diff --git a/include/semaphore.h b/include/semaphore.h
index 142ef51ada64adb675fb31cdee778468d56552f4..8821b129d097e48c9bbccbbbd1dd22eb511fe0fc 100644
--- a/include/semaphore.h
+++ b/include/semaphore.h
@@ -45,18 +45,15 @@
 #include 
 #include 
 
-#ifdef __cplusplus
-#define EXTERN extern "C"
-extern "C"
-{
-#else
-#define EXTERN extern
-#endif
-
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
 
+/* Bit definitions for the struct sem_s flags field */
+
+#define PRIOINHERIT_FLAGS_DISABLE (1 << 0)  /* Bit 0: Priority inheritance
+                                             * is disabled for this semaphore. */
+
 /****************************************************************************
  * Public Type Declarations
  ****************************************************************************/
@@ -92,6 +89,7 @@ struct sem_s
    */
 
 #ifdef CONFIG_PRIORITY_INHERITANCE
+  uint8_t flags;                 /* See PRIOINHERIT_FLAGS_* definitions */
 # if CONFIG_SEM_PREALLOCHOLDERS > 0
   FAR struct semholder_s *hhead; /* List of holders of semaphore counts */
 # else
@@ -106,9 +104,9 @@ typedef struct sem_s sem_t;
 
 #ifdef CONFIG_PRIORITY_INHERITANCE
 # if CONFIG_SEM_PREALLOCHOLDERS > 0
-#  define SEM_INITIALIZER(c) {(c), NULL}  /* semcount, hhead */
+#  define SEM_INITIALIZER(c) {(c), 0, NULL}  /* semcount, flags, hhead */
 # else
-#  define SEM_INITIALIZER(c) {(c), SEMHOLDER_INITIALIZER} /* semcount, holder */
+#  define SEM_INITIALIZER(c) {(c), 0, SEMHOLDER_INITIALIZER} /* semcount, flags, holder */
 # endif
 #else
 #  define SEM_INITIALIZER(c) {(c)} /* semcount */
@@ -118,6 +116,14 @@ typedef struct sem_s sem_t;
  * Public Data
  ****************************************************************************/
 
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
 /****************************************************************************
  * Public Function Prototypes
  ****************************************************************************/
diff --git a/include/signal.h b/include/signal.h
index 12585c91e31fe33159486e949fafd9b2517c5e48..a4060fe33163f21040b998a600c40c34ba0fdaf6 100644
--- a/include/signal.h
+++ b/include/signal.h
@@ -175,26 +175,31 @@
 /* Special values of of sa_handler used by sigaction and sigset.  They are all
  * treated like NULL for now.  This is okay for SIG_DFL and SIG_IGN because
  * in NuttX, the default action for all signals is to ignore them.
- *
- * REVISIT:  Need to distinguish the value of SIG_HOLD.  It is needed in the
- * implementation of sigset() but would need to be recognized in all signal
- * functions that deal with signal disposition.
  */
 
-#define SIG_ERR         ((CODE void *)-1)  /* And error occurred */
-#define SIG_DFL         ((CODE void *)0)   /* Default is SIG_IGN for all signals */
-#define SIG_IGN         ((CODE void *)0)   /* Ignore the signal */
-#define SIG_HOLD        ((CODE void *)1)   /* Used only with sigset() */
+#define SIG_ERR         ((_sa_handler_t)-1)  /* And error occurred */
+#define SIG_DFL         ((_sa_handler_t)0)   /* Default is SIG_IGN for all signals */
+#define SIG_IGN         ((_sa_handler_t)0)   /* Ignore the signal */
+#define SIG_HOLD        ((_sa_handler_t)1)   /* Used only with sigset() */
 
 /********************************************************************************
  * Public Type Definitions
  ********************************************************************************/
 
-/* This defines a set of 32 signals (numbered 0 through 31). */
+/* This defines a set of 32 signals (numbered 0 through 31).
+ * REVISIT: Signal 0 is, however, not generally usable since that value has
+ * special meaning in some circumstances (e.g., kill()).
+ */
 
 typedef uint32_t sigset_t;   /* Bit set of 32 signals */
 #define __SIGSET_T_DEFINED 1
 
+/* Possibly volatile-qualified integer type of an object that can be accessed
+ * as an atomic entity, even in the presence of asynchronous interrupts.
+ */
+
+typedef volatile int sig_atomic_t;
+
 /* This defines the type of the siginfo si_value field */
 
 union sigval
@@ -281,8 +286,9 @@ extern "C"
 #define EXTERN extern
 #endif
 
-int kill(pid_t, int);
-int sigaction(int sig, FAR const struct sigaction *act,
+int kill(pid_t pid, int signo);
+int raise(int signo);
+int sigaction(int signo, FAR const struct sigaction *act,
               FAR struct sigaction *oact);
 int sigaddset(FAR sigset_t *set, int signo);
 int sigdelset(FAR sigset_t *set, int signo);
@@ -291,17 +297,17 @@ int sigfillset(FAR sigset_t *set);
 int sighold(int signo);
 int sigismember(FAR const sigset_t *set, int signo);
 int sigignore(int signo);
-CODE void (*signal(int sig, CODE void (*func)(int signo)))(int signo);
-int sigprocmask(int how, FAR const sigset_t *set, FAR sigset_t *oset);
+CODE void (*signal(int signo, CODE void (*func)(int signo)))(int signo);
 int sigpause(int signo);
 int sigpending(FAR sigset_t *set);
+int sigprocmask(int how, FAR const sigset_t *set, FAR sigset_t *oset);
 #ifdef CONFIG_CAN_PASS_STRUCTS
 int sigqueue(int pid, int signo, union sigval value);
 #else
 int sigqueue(int pid, int signo, FAR void *sival_ptr);
 #endif
 int sigrelse(int signo);
-CODE void (*sigset(int sig, CODE void (*func)(int signo)))(int signo);
+CODE void (*sigset(int signo, CODE void (*func)(int signo)))(int signo);
 int sigtimedwait(FAR const sigset_t *set, FAR struct siginfo *value,
                  FAR const struct timespec *timeout);
 int sigsuspend(FAR const sigset_t *sigmask);
diff --git a/include/spawn.h b/include/spawn.h
index 19b0c24501626b73bff76859d4850928a9dea0d4..f2d49f041079617ce5b88222d4778e8aaf818ab8 100644
--- a/include/spawn.h
+++ b/include/spawn.h
@@ -186,7 +186,7 @@ int posix_spawn_file_actions_addopen(FAR posix_spawn_file_actions_t *file_action
 int posix_spawnattr_init(FAR posix_spawnattr_t *attr);
 
 /* int posix_spawnattr_destroy(FAR posix_spawnattr_t *); */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 #  define posix_spawnattr_destroy(attr) (attr ? 0 : EINVAL)
 #else
 #  define posix_spawnattr_destroy(attr) (0)
@@ -234,7 +234,7 @@ int task_spawnattr_setstacksize(FAR posix_spawnattr_t *attr,
 
 /* Non standard debug functions */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 void posix_spawn_file_actions_dump(FAR posix_spawn_file_actions_t *file_actions);
 void posix_spawnattr_dump(FAR posix_spawnattr_t *attr);
 #else
diff --git a/include/stddef.h b/include/stddef.h
index 2b59c58a3d2a64faf2f9ebf072ae30ff53df8e09..63e815daf8bff3f23ef12e5bd3f069e182c4b9d7 100644
--- a/include/stddef.h
+++ b/include/stddef.h
@@ -80,7 +80,7 @@
  *   codes for all members of the largest character set specified among the
  *   locales supported by the compilation environment: the null character has
  *   the code value 0 and each member of the portable character set has a
- *   code value equal to its value when used as the lone character in an\
+ *   code value equal to its value when used as the lone character in an
  *   integer character constant.
  *
  * size_t
diff --git a/include/stdio.h b/include/stdio.h
index 20994e22ffdcc9ccae542d7f0c2921ce80c0d36f..5fc7a7c7504faec72b95a7b500bef99ba57dc370 100644
--- a/include/stdio.h
+++ b/include/stdio.h
@@ -58,21 +58,29 @@
 
 #define FILENAME_MAX _POSIX_NAME_MAX
 
-/* The size of the I/O buffers */
+/* The (default) size of the I/O buffers */
 
-#if CONFIG_STDIO_BUFFER_SIZE > 0
-#  define BUFSIZ CONFIG_STDIO_BUFFER_SIZE
+#if defined(CONFIG_STDIO_BUFFER_SIZE) && CONFIG_STDIO_BUFFER_SIZE > 0
+#  define BUFSIZ   CONFIG_STDIO_BUFFER_SIZE
+#else
+#  define BUFSIZ   64
 #endif
 
+/* The following three definitions are for ANSI C, used by setvbuf */
+
+#define _IOFBF     0               /* Fully buffered */
+#define _IOLBF     1               /* Line buffered */
+#define _IONBF     2               /* Unbuffered */
+
 /* File system error values */
 
 #define EOF        (-1)
 
 /* The first three _iob entries are reserved for standard I/O */
 
-#define stdin  (&sched_getstreams()->sl_streams[0])
-#define stdout (&sched_getstreams()->sl_streams[1])
-#define stderr (&sched_getstreams()->sl_streams[2])
+#define stdin      (&sched_getstreams()->sl_streams[0])
+#define stdout     (&sched_getstreams()->sl_streams[1])
+#define stderr     (&sched_getstreams()->sl_streams[2])
 
 /* These APIs are not implemented and/or can be synthesized from
  * supported APIs.
@@ -90,7 +98,7 @@
 #  define CONFIG_LIBC_TMPDIR "/tmp"
 #endif
 
-#define P_tmpdir CONFIG_LIBC_TMPDIR
+#define P_tmpdir   CONFIG_LIBC_TMPDIR
 
 /* Maximum size of character array to hold tmpnam() output. */
 
@@ -98,7 +106,7 @@
 #  define CONFIG_LIBC_MAX_TMPFILE 32
 #endif
 
-#define L_tmpnam CONFIG_LIBC_MAX_TMPFILE
+#define L_tmpnam   CONFIG_LIBC_MAX_TMPFILE
 
 /* The maximum number of unique temporary file names that can be generated */
 
@@ -156,6 +164,8 @@ size_t fwrite(FAR const void *ptr, size_t size, size_t n_items,
          FAR FILE *stream);
 FAR char *gets(FAR char *s);
 FAR char *gets_s(FAR char *s, rsize_t n);
+void   setbuf(FAR FILE *stream, FAR char *buf);
+int    setvbuf(FAR FILE *stream, FAR char *buffer, int mode, size_t size);
 int    ungetc(int c, FAR FILE *stream);
 
 /* Operations on the stdout stream, buffers, paths, and the whole printf-family */
@@ -194,6 +204,7 @@ int    vdprintf(int fd, FAR const IPTR char *fmt, va_list ap);
 
 FAR char *tmpnam(FAR char *s);
 FAR char *tempnam(FAR const char *dir, FAR const char *pfx);
+int       remove(FAR const char *path);
 
 #undef EXTERN
 #if defined(__cplusplus)
diff --git a/include/stdlib.h b/include/stdlib.h
index aa259c9d50c16739669caaf8d0cb3b4e78bf3bcd..0229bed72f17f9a1396eb6765583e18fabcc6276 100644
--- a/include/stdlib.h
+++ b/include/stdlib.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * include/stdlib.h
  *
- *   Copyright (C) 2007-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,6 +42,7 @@
 
 #include 
 #include 
+
 #include 
 #include 
 
@@ -143,9 +144,9 @@ extern "C"
 void      srand(unsigned int seed);
 int       rand(void);
 
+#ifndef CONFIG_DISABLE_ENVIRON
 /* Environment variable support */
 
-#ifndef CONFIG_DISABLE_ENVIRON
 FAR char **get_environ_ptr(void);
 FAR char *getenv(FAR const char *name);
 int       putenv(FAR const char *string);
@@ -170,6 +171,16 @@ int       on_exit(CODE void (*func)(int, FAR void *), FAR void *arg);
 void      _exit(int status); /* See unistd.h */
 #define   _Exit(s) _exit(s)
 
+/* System() command is not implemented in the NuttX libc because it is so
+ * entangled with shell logic.  There is an experimental version at
+ * apps/system/system.  system() is prototyped here, however, for
+ * standards compatibility.
+ */
+
+#ifndef __KERNEL__
+int       system(FAR char *cmd);
+#endif
+
 /* String to binary conversions */
 
 long      strtol(FAR const char *nptr, FAR char **endptr, int base);
@@ -179,19 +190,34 @@ long long strtoll(FAR const char *nptr, FAR char **endptr, int base);
 unsigned long long strtoull(FAR const char *nptr, FAR char **endptr,
                             int base);
 #endif
-double_t  strtod(FAR const char *str, FAR char **endptr);
+float     strtof(FAR const char *str, FAR char **endptr);
+#ifdef CONFIG_HAVE_DOUBLE
+double    strtod(FAR const char *str, FAR char **endptr);
+#endif
+#ifdef CONFIG_HAVE_LONG_DOUBLE
+long double strtold(FAR const char *str, FAR char **endptr);
+#endif
 
 #define atoi(nptr)  ((int)strtol((nptr), NULL, 10))
 #define atol(nptr)  strtol((nptr), NULL, 10)
 #ifdef CONFIG_HAVE_LONG_LONG
 #define atoll(nptr) strtoll((nptr), NULL, 10)
 #endif
+#ifdef CONFIG_HAVE_DOUBLE
 #define atof(nptr)  strtod((nptr), NULL)
+#endif
 
 /* Binary to string conversions */
 
 FAR char *itoa(int val, FAR char *str, int base);
 
+/* Wide character operations */
+
+#ifdef CONFIG_LIBC_WCHAR
+int       mbtowc(FAR wchar_t *pwc, FAR const char *s, size_t n);
+int       wctomb(FAR char *s, wchar_t wchar);
+#endif
+
 /* Memory Management */
 
 FAR void *malloc(size_t);
@@ -207,6 +233,21 @@ struct mallinfo mallinfo(void);
 int      mallinfo(FAR struct mallinfo *info);
 #endif
 
+/* Pseudo-Terminals */
+
+#ifdef CONFIG_PSEUDOTERM_SUSV1
+FAR char *ptsname(int fd);
+int ptsname_r(int fd, FAR char *buf, size_t buflen);
+#endif
+
+#ifdef CONFIG_PSEUDOTERM
+int unlockpt(int fd);
+
+/* int grantpt(int fd); Not implemented */
+
+#define grantpt(fd) (0)
+#endif
+
 /* Arithmetic */
 
 int      abs(int j);
diff --git a/include/string.h b/include/string.h
index 396f440872ccf8bb1d705cc1b88bc7b92777bf9e..92df7f85b5f6e128c9f348ba3e395e29d92da243 100644
--- a/include/string.h
+++ b/include/string.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * include/string.h
  *
- *   Copyright (C) 2007-2012, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2012, 2014, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -47,13 +47,6 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
-/* Compatibility definitions */
-
-#ifndef CONFIG_ARCH_BZERO
-# define bzero(s,n) (void)memset(s,0,n)
-#endif
-
-#define bcopy(b1,b2,len) (void)memmove(b2,b1,len)
 
 /****************************************************************************
  * Public Function Prototypes
@@ -71,17 +64,17 @@ extern "C"
 FAR char  *strdup(FAR const char *s);
 FAR char  *strndup(FAR const char *s, size_t size);
 FAR const char *strerror(int);
+int        strerror_r(int, FAR char *, size_t);
 size_t     strlen(FAR const char *);
 size_t     strnlen(FAR const char *, size_t);
 FAR char  *strcat(FAR char *, FAR const char *);
 FAR char  *strncat(FAR char *, FAR const char *, size_t);
 int        strcmp(FAR const char *, FAR const char *);
 int        strncmp(FAR const char *, FAR const char *, size_t);
-int        strcasecmp(FAR const char *, FAR const char *);
-int        strncasecmp(FAR const char *, FAR const char *, size_t);
-FAR char  *strcpy(char *dest, FAR const char *src);
-FAR char  *stpcpy(char *dest, FAR const char *src);
-FAR char  *strncpy(char *, FAR const char *, size_t);
+int        strcoll(FAR const char *, FAR const char *s2);
+FAR char  *strcpy(FAR char *dest, FAR const char *src);
+FAR char  *stpcpy(FAR char *dest, FAR const char *src);
+FAR char  *strncpy(FAR char *, FAR const char *, size_t);
 FAR char  *strpbrk(FAR const char *, FAR const char *);
 FAR char  *strchr(FAR const char *s, int c);
 FAR char  *strrchr(FAR const char *s, int c);
@@ -91,6 +84,7 @@ FAR char  *strstr(FAR const char *, FAR const char *);
 FAR char  *strcasestr(FAR const char *, FAR const char *);
 FAR char  *strtok(FAR char *, FAR const char *);
 FAR char  *strtok_r(FAR char *, FAR const char *, FAR char **);
+size_t     strxfrm(FAR char *, FAR const char *, size_t n);
 
 FAR void  *memchr(FAR const void *s, int c, size_t n);
 FAR void  *memccpy(FAR void *s1, FAR const void *s2, int c, size_t n);
diff --git a/include/strings.h b/include/strings.h
new file mode 100644
index 0000000000000000000000000000000000000000..4b7fc439da41b2ab77fd10a67ab17a6873702343
--- /dev/null
+++ b/include/strings.h
@@ -0,0 +1,124 @@
+/****************************************************************************
+ * include/strings.h
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_STRINGS_H
+#define __INCLUDE_STRINGS_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if !defined(CONFIG_HAVE_INLINE) && !defined(__cplusplus)
+/* Compatibility definitions
+ *
+ * Marked LEGACY in Open Group Base Specifications Issue 6/IEEE Std 1003.1-2004
+ * Removed from Open Group Base Specifications Issue 7/IEEE Std 1003.1-2008
+ */
+
+#  define bcmp(b1,b2,len)  memcmp(b1,b2,(size_t)len)
+#  define bcopy(b1,b2,len) (void)memmove(b2,b1,len)
+#  define bzero(s,n)       (void)memset(s,0,n)
+#  define index(s,c)       strchr(s,c)
+#  define rindex(s,c)      strrchr(s,c)
+
+#endif /* !CONFIG_HAVE_INLINE && !__cplusplus */
+
+/****************************************************************************
+ * Inline Functions
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+#if defined(CONFIG_HAVE_INLINE) || defined(__cplusplus)
+/* Compatibility inline functions.
+ *
+ * Marked LEGACY in Open Group Base Specifications Issue 6/IEEE Std 1003.1-2004
+ * Removed from Open Group Base Specifications Issue 7/IEEE Std 1003.1-2008
+ */
+
+static inline int bcmp(FAR const void *b1, FAR const void *b2, size_t len)
+{
+  return memcmp(b1, b2, len);
+}
+
+static inline void bcopy(FAR const void *b1, FAR void *b2, size_t len)
+{
+  (void)memmove(b2, b1, len);
+}
+
+static inline void bzero(FAR void *s, size_t len)
+{
+  (void)memset(s, 0, len);
+}
+
+static inline FAR char *index(FAR const char *s, int c)
+{
+  return strchr(s, c);
+}
+
+static inline FAR char *rindex(FAR const char *s, int c)
+{
+  return strrchr(s, c);
+}
+#endif /* CONFIG_HAVE_INLINE || __cplusplus */
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+int ffs(int j);
+int strcasecmp(FAR const char *, FAR const char *);
+int strncasecmp(FAR const char *, FAR const char *, size_t);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+#endif /* __INCLUDE_STRINGS_H */
diff --git a/include/sys/boardctl.h b/include/sys/boardctl.h
index 5177dd8074fade0e7f3a105ce93cb71ff74f902c..c96215ec93f0dba78db1e4c51f2793dc2fef848c 100644
--- a/include/sys/boardctl.h
+++ b/include/sys/boardctl.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * include/sys/boardctl.h
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -109,6 +109,12 @@
  * CONFIGURATION: CONFIG_LIB_BOARDCTL && CONFIG_BOARDCTL_USBDEVCTRL
  * DEPENDENCIES:  Board logic must provide board__initialize()
  *
+ * CMD:           BOARDIOC_NX_START
+ * DESCRIPTION:   Start the NX servier
+ * ARG:           None
+ * CONFIGURATION: CONFIG_NX_MULTIUSER
+ * DEPENDENCIES:  Base graphics logic provides nx_start()
+ *
  * CMD:           BOARDIOC_TSCTEST_SETUP
  * DESCRIPTION:   Touchscreen controller test configuration
  * ARG:           Touch controller device minor number
@@ -121,30 +127,12 @@
  * CONFIGURATION: CONFIG_LIB_BOARDCTL && CONFIG_BOARDCTL_TSCTEST
  * DEPENDENCIES:  Board logic must provide board_tsc_teardown()
  *
- * CMD:           BOARDIOC_ADCTEST_SETUP
- * DESCRIPTION:   ADC controller test configuration
- * ARG:           None
- * CONFIGURATION: CONFIG_LIB_BOARDCTL && CONFIG_BOARDCTL_ADCTEST
- * DEPENDENCIES:  Board logic must provide board_adc_setup()
- *
- * CMD:           BOARDIOC_PWMTEST_SETUP
- * DESCRIPTION:   PWM controller test configuration
- * ARG:           None
- * CONFIGURATION: CONFIG_LIB_BOARDCTL && CONFIG_BOARDCTL_PWMTEST
- * DEPENDENCIES:  Board logic must provide board_pwm_setup()
- *
- * CMD:           BOARDIOC_CAN_INITIALIZE
- * DESCRIPTION:   CAN device initialization
- * ARG:           None
- * CONFIGURATION: CONFIG_LIB_BOARDCTL && CONFIG_BOARDCTL_CANINIT
- * DEPENDENCIES:  Board logic must provide board_can_initialize()
- *
  * CMD:           BOARDIOC_GRAPHICS_SETUP
  * DESCRIPTION:   Configure graphics that require special initialization
  *                procedures
  * ARG:           A pointer to an instance of struct boardioc_graphics_s
  * CONFIGURATION: CONFIG_LIB_BOARDCTL && CONFIG_BOARDCTL_GRAPHICS
- * DEPENDENCIES:  Board logic must provide board_adc_setup()
+ * DEPENDENCIES:  Board logic must provide board_graphics_setup()
  */
 
 #define BOARDIOC_INIT              _BOARDIOC(0x0001)
@@ -154,12 +142,10 @@
 #define BOARDIOC_APP_SYMTAB        _BOARDIOC(0x0005)
 #define BOARDIOC_OS_SYMTAB         _BOARDIOC(0x0006)
 #define BOARDIOC_USBDEV_CONTROL    _BOARDIOC(0x0007)
-#define BOARDIOC_TSCTEST_SETUP     _BOARDIOC(0x0008)
-#define BOARDIOC_TSCTEST_TEARDOWN  _BOARDIOC(0x0009)
-#define BOARDIOC_ADCTEST_SETUP     _BOARDIOC(0x000a)
-#define BOARDIOC_PWMTEST_SETUP     _BOARDIOC(0x000b)
-#define BOARDIOC_CAN_INITIALIZE    _BOARDIOC(0x000c)
-#define BOARDIOC_GRAPHICS_SETUP    _BOARDIOC(0x000d)
+#define BOARDIOC_NX_START          _BOARDIOC(0x0008)
+#define BOARDIOC_TSCTEST_SETUP     _BOARDIOC(0x0009)
+#define BOARDIOC_TSCTEST_TEARDOWN  _BOARDIOC(0x000a)
+#define BOARDIOC_GRAPHICS_SETUP    _BOARDIOC(0x000b)
 
 /* If CONFIG_BOARDCTL_IOCTL=y, then boad-specific commands will be support.
  * In this case, all commands not recognized by boardctl() will be forwarded
@@ -265,6 +251,19 @@ struct boardioc_usbdev_ctrl_s
 };
 #endif /* CONFIG_BOARDCTL_USBDEVCTRL */
 
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
 /****************************************************************************
  * Public Function Prototypes
  ****************************************************************************/
@@ -299,5 +298,10 @@ struct boardioc_usbdev_ctrl_s
 
 int boardctl(unsigned int cmd, uintptr_t arg);
 
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
 #endif /* CONFIG_LIB_BOARDCTL */
 #endif /* __INCLUDE_SYS_BOARDCTL_H */
diff --git a/include/sys/epoll.h b/include/sys/epoll.h
index 01aecdd69efd3e53b2bd266212b23884b2861ae0..672dc1901a2e534cce2351d7f0269e9134dca906 100644
--- a/include/sys/epoll.h
+++ b/include/sys/epoll.h
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __INCLUDE_NUTTX_SYS_EPOLL_H
-#define __INCLUDE_NUTTX_SYS_EPOLL_H
+#ifndef __INCLUDE_SYS_EPOLL_H
+#define __INCLUDE_SYS_EPOLL_H
 
 /****************************************************************************
  * Included Files
@@ -107,4 +107,4 @@ int epoll_wait(int epfd, struct epoll_event *evs, int maxevents, int timeout);
 
 void epoll_close(int epfd);
 
-#endif /* __INCLUDE_NUTTX_SYS_EPOLL_H */
+#endif /* __INCLUDE_SYS_EPOLL_H */
diff --git a/include/sys/stat.h b/include/sys/stat.h
index 3f2658b5f184b4e6ed77690c1e199819398acb9f..4d82f62d5e2c63e12a83cdd078c04c3bfa341a7d 100644
--- a/include/sys/stat.h
+++ b/include/sys/stat.h
@@ -40,6 +40,8 @@
  * Included Files
  ****************************************************************************/
 
+#include 
+
 #include 
 #include 
 
@@ -50,51 +52,62 @@
 /* mode_t bit settings (most of these do not apply to Nuttx). This assumes
  * that the full size of a mode_t is 16-bits. (However, mode_t must be size
  * 'int' because it is promoted to size int when passed in varargs).
+ *
+ *   LTTT ...U UUGG GOOO
+ *
+ *   Bits 0-2:   Permissions for others
+ *   Bits 3-5:   Group permissions
+ *   Bits 6-8:   Owner permissions
+ *   Bits 9-11:  Not used
+ *   Bits 12-14: File type bits
+ *   Bit 15:     Symbolic link
  */
 
-#define S_IXOTH     0000001 /* Permissions for others: RWX */
-#define S_IWOTH     0000002
-#define S_IROTH     0000004
-#define S_IRWXO     0000007
-
-#define S_IXGRP     0000010 /* Group permissions: RWX */
-#define S_IWGRP     0000020
-#define S_IRGRP     0000040
-#define S_IRWXG     0000070
-
-#define S_IXUSR     0000100 /* Owner permissions: RWX */
-#define S_IWUSR     0000200
-#define S_IRUSR     0000400
-#define S_IRWXU     0000700
-
-#define S_ISVTX     0001000 /* "sticky" bit */
-#define S_ISGID     0002000 /* Set group ID bit */
-#define S_ISUID     0004000 /* Set UID bit */
-
-#define S_IFIFO     0010000 /* File type bytes */
-#define S_IFCHR     0020000
-#define S_IFDIR     0040000
-#define S_IFBLK     0060000
-#define S_IFREG     0100000
-#define S_IFLNK     0120000
-#define S_IFSOCK    0140000
-#define S_IFMQ      0150000
-#define S_IFSEM     0160000
-#define S_IFSHM     0170000
-#define S_IFMT      0170000
+#define S_IXOTH     (1 << 0)   /* Bits 0-2: Permissions for others: RWX */
+#define S_IWOTH     (1 << 1)
+#define S_IROTH     (1 << 2)
+#define S_IRWXO     (7 << 0)
+
+#define S_IXGRP     (1 << 3)   /* Bits 3-5: Group permissions: RWX */
+#define S_IWGRP     (1 << 4)
+#define S_IRGRP     (1 << 5)
+#define S_IRWXG     (7 << 3)
+
+#define S_IXUSR     (1 << 6)   /* Bits 6-8: Owner permissions: RWX */
+#define S_IWUSR     (1 << 7)
+#define S_IRUSR     (1 << 8)
+#define S_IRWXU     (7 << 6)
+
+#define S_ISVTX     0          /* "Sticky" bit (not used) */
+#define S_ISGID     0          /* Set group ID bit (not used)*/
+#define S_ISUID     0          /* Set UID bit (not used) */
+
+#define S_IFIFO     0          /* Bits 12-14: File type bits (not all used) */
+#define S_IFCHR     (1 << 12)
+#define S_IFDIR     (2 << 12)
+#define S_IFBLK     (3 << 12)
+#define S_IFREG     (4 << 12)
+#define S_IFSOCK    0
+#define S_IFMQ      (5 << 12)
+#define S_IFSEM     (6 << 12)
+#define S_IFSHM     (7 << 12)
+#define s_IFTGT     (7 << 12)  /* May be the target of a symbolic link */
+
+#define S_IFLNK     (1 << 15)  /* Bit 15: Symbolic link */
+#define S_IFMT      (15 << 15) /* Bits 12-15: Full file type */
 
 /* File type macros that operate on an instance of mode_t */
 
-#define S_ISLNK(m)  (((m) & S_IFMT) == S_IFLNK)
-#define S_ISREG(m)  (((m) & S_IFMT) == S_IFREG)
-#define S_ISDIR(m)  (((m) & S_IFMT) == S_IFDIR)
-#define S_ISCHR(m)  (((m) & S_IFMT) == S_IFCHR)
-#define S_ISBLK(m)  (((m) & S_IFMT) == S_IFBLK)
-#define S_ISFIFO(m) (((m) & S_IFMT) == S_IFIFO)
-#define S_ISSOCK(m) (((m) & S_IFMT) == S_IFSOCK)
-#define S_ISMQ(m)   (((m) & S_IFMT) == S_IFMQ)
-#define S_ISSSEM(m) (((m) & S_IFMT) == S_IFSEM)
-#define S_ISSHM(m)  (((m) & S_IFMT) == S_IFSHM)
+#define S_ISLNK(m)  (((m) & S_IFLNK)   != 0)
+#define S_ISFIFO(m) (0)
+#define S_ISCHR(m)  (((m) & s_IFTGT) == S_IFCHR)
+#define S_ISDIR(m)  (((m) & s_IFTGT) == S_IFDIR)
+#define S_ISBLK(m)  (((m) & s_IFTGT) == S_IFBLK)
+#define S_ISREG(m)  (((m) & s_IFTGT) == S_IFREG)
+#define S_ISSOCK(m) (0)
+#define S_ISMQ(m)   (((m) & s_IFTGT) == S_IFMQ)
+#define S_ISSEM(m)  (((m) & s_IFTGT) == S_IFSEM)
+#define S_ISSHM(m)  (((m) & s_IFTGT) == S_IFSHM)
 
 /****************************************************************************
  * Type Definitions
@@ -107,6 +120,8 @@
 
 struct stat
 {
+  /* Required, standard fields */
+
   mode_t    st_mode;    /* File type, atributes, and access mode bits */
   off_t     st_size;    /* Size of file/directory, in bytes */
   blksize_t st_blksize; /* Blocksize used for filesystem I/O */
@@ -114,6 +129,14 @@ struct stat
   time_t    st_atime;   /* Time of last access */
   time_t    st_mtime;   /* Time of last modification */
   time_t    st_ctime;   /* Time of last status change */
+
+  /* Internal fields.  These are part this specific implementation and
+   * should not referenced by application code for portability reasons.
+   */
+
+#ifdef CONFIG_PSEUDOFS_SOFTLINKS
+  uint8_t   st_count;   /* Used internally to limit traversal of links */
+#endif
 };
 
 /****************************************************************************
@@ -132,9 +155,7 @@ extern "C"
 int mkdir(FAR const char *pathname, mode_t mode);
 int mkfifo(FAR const char *pathname, mode_t mode);
 int stat(const char *path, FAR struct stat *buf);
-#if 0 /* Not yet supported */
 int fstat(int fd, FAR struct stat *buf);
-#endif
 
 #undef EXTERN
 #if defined(__cplusplus)
diff --git a/include/sys/syscall.h b/include/sys/syscall.h
index 198b27c95332027e814ddb119ff3c1546995774e..101816d7ff054a7fc623e45041997521472b8f0d 100644
--- a/include/sys/syscall.h
+++ b/include/sys/syscall.h
@@ -2,7 +2,7 @@
  * include/sys/syscall.h
  * This file contains the system call numbers.
  *
- *   Copyright (C) 2011-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -91,15 +91,22 @@
 #define SYS_sem_trywait                (CONFIG_SYS_RESERVED+18)
 #define SYS_sem_wait                   (CONFIG_SYS_RESERVED+19)
 
+#ifdef CONFIG_PRIORITY_INHERITANCE
+#  define SYS_sem_setprotocol          (CONFIG_SYS_RESERVED+20)
+#  define __SYS_named_sem              (CONFIG_SYS_RESERVED+21)
+#else
+#  define __SYS_named_sem              (CONFIG_SYS_RESERVED+20)
+#endif
+
 /* Named semaphores */
 
 #ifdef CONFIG_FS_NAMED_SEMAPHORES
-#  define SYS_sem_open                 (CONFIG_SYS_RESERVED+20)
-#  define SYS_sem_close                (CONFIG_SYS_RESERVED+21)
-#  define SYS_sem_unlink               (CONFIG_SYS_RESERVED+22)
-#  define __SYS_task_create            (CONFIG_SYS_RESERVED+23)
+#  define SYS_sem_open                 __SYS_named_sem
+#  define SYS_sem_close                (__SYS_named_sem+1)
+#  define SYS_sem_unlink               (__SYS_named_sem+2)
+#  define __SYS_task_create            (__SYS_named_sem+3)
 #else
-#  define __SYS_task_create            (CONFIG_SYS_RESERVED+20)
+#  define __SYS_task_create            __SYS_named_sem
 #endif
 
 /* Task creation APIs based on global entry points cannot be use with
@@ -121,8 +128,16 @@
 
 #  define SYS_task_delete              __SYS_task_delete
 #  define SYS_task_restart             (__SYS_task_delete+1)
-#  define SYS_up_assert                (__SYS_task_delete+2)
-#  define __SYS_vfork                  (__SYS_task_delete+3)
+#  define SYS_task_setcancelstate      (__SYS_task_delete+2)
+#  define SYS_up_assert                (__SYS_task_delete+3)
+
+#  ifdef CONFIG_CANCELLATION_POINTS
+#    define SYS_task_setcanceltype     (__SYS_task_delete+4)
+#    define SYS_task_testcancel        (__SYS_task_delete+5)
+#    define __SYS_vfork                (__SYS_task_delete+6)
+#  else
+#    define __SYS_vfork                (__SYS_task_delete+4)
+#  endif
 
 /* The following can be individually enabled */
 
@@ -167,7 +182,8 @@
 #ifdef CONFIG_MODULE
 #  define SYS_insmod                   __SYS_insmod
 #  define SYS_rmmod                   (__SYS_insmod+1)
-#  define __SYS_posix_spawn           (__SYS_insmod+2)
+#  define SYS_modhandle               (__SYS_insmod+2)
+#  define __SYS_posix_spawn           (__SYS_insmod+3)
 #else
 #  define __SYS_posix_spawn            __SYS_insmod
 #endif
@@ -215,7 +231,12 @@
 #define SYS_clock_getres               (__SYS_clock+1)
 #define SYS_clock_gettime              (__SYS_clock+2)
 #define SYS_clock_settime              (__SYS_clock+3)
-#define __SYS_timers                   (__SYS_clock+4)
+#ifdef CONFIG_CLOCK_TIMEKEEPING
+#  define SYS_adjtime                  (__SYS_clock+4)
+#  define __SYS_timers                 (__SYS_clock+5)
+#else
+#  define __SYS_timers                 (__SYS_clock+4)
+#endif
 
 /* The following are defined only if POSIX timers are supported */
 
@@ -225,11 +246,16 @@
 #  define SYS_timer_getoverrun         (__SYS_timers+2)
 #  define SYS_timer_gettime            (__SYS_timers+3)
 #  define SYS_timer_settime            (__SYS_timers+4)
-#  define __SYS_descriptors            (__SYS_timers+5)
+#  define __SYS_syslog                 (__SYS_timers+5)
 #else
-#  define __SYS_descriptors             __SYS_timers
+#  define __SYS_syslog                 __SYS_timers
 #endif
 
+/* Unconditional system logging */
+
+#define SYS__vsyslog                   (__SYS_syslog+0)
+#define __SYS_descriptors              (__SYS_syslog+1)
+
 /* The following are defined if either file or socket descriptor are
  * enabled.
  */
@@ -287,24 +313,46 @@
 #  define SYS_dup2                     (__SYS_filedesc+2)
 #  define SYS_fcntl                    (__SYS_filedesc+3)
 #  define SYS_lseek                    (__SYS_filedesc+4)
-#  define SYS_mkfifo                   (__SYS_filedesc+5)
-#  define SYS_mmap                     (__SYS_filedesc+6)
-#  define SYS_open                     (__SYS_filedesc+7)
-#  define SYS_opendir                  (__SYS_filedesc+8)
-#  define SYS_pipe                     (__SYS_filedesc+9)
-#  define SYS_readdir                  (__SYS_filedesc+10)
-#  define SYS_rewinddir                (__SYS_filedesc+11)
-#  define SYS_seekdir                  (__SYS_filedesc+12)
-#  define SYS_stat                     (__SYS_filedesc+13)
-#  define SYS_statfs                   (__SYS_filedesc+14)
+#  define SYS_mmap                     (__SYS_filedesc+5)
+#  define SYS_open                     (__SYS_filedesc+6)
+#  define SYS_opendir                  (__SYS_filedesc+7)
+#  define SYS_readdir                  (__SYS_filedesc+8)
+#  define SYS_rewinddir                (__SYS_filedesc+9)
+#  define SYS_seekdir                  (__SYS_filedesc+10)
+#  define SYS_stat                     (__SYS_filedesc+11)
+#  define SYS_fstat                    (__SYS_filedesc+12)
+#  define SYS_statfs                   (__SYS_filedesc+13)
+#  define SYS_fstatfs                  (__SYS_filedesc+14)
 #  define SYS_telldir                  (__SYS_filedesc+15)
 
+#  if defined(CONFIG_PSEUDOFS_SOFTLINKS)
+#    define SYS_link                   (__SYS_filedesc+16)
+#    define SYS_readlink               (__SYS_filedesc+17)
+#    define __SYS_pipes                (__SYS_filedesc+18)
+#  else
+#    define __SYS_pipes                (__SYS_filedesc+16)
+#  endif
+
+#  if defined(CONFIG_PIPES) && CONFIG_DEV_PIPE_SIZE > 0
+#    define SYS_pipe2                  (__SYS_pipes+0)
+#    define __SYS_mkfifo2              (__SYS_pipes+1)
+#  else
+#    define __SYS_mkfifo2              (__SYS_pipes+0)
+#  endif
+
+#  if defined(CONFIG_PIPES) && CONFIG_DEV_FIFO_SIZE > 0
+#    define SYS_mkfifo2                (__SYS_mkfifo2+0)
+#    define __SYS_fs_fdopen            (__SYS_mkfifo2+1)
+#  else
+#    define __SYS_fs_fdopen            (__SYS_mkfifo2+0)
+#  endif
+
 #  if CONFIG_NFILE_STREAMS > 0
-#    define SYS_fs_fdopen              (__SYS_filedesc+16)
-#    define SYS_sched_getstreams       (__SYS_filedesc+17)
-#    define __SYS_sendfile             (__SYS_filedesc+18)
+#    define SYS_fs_fdopen              (__SYS_fs_fdopen+0)
+#    define SYS_sched_getstreams       (__SYS_fs_fdopen+1)
+#    define __SYS_sendfile             (__SYS_fs_fdopen+2)
 #  else
-#    define __SYS_sendfile             (__SYS_filedesc+16)
+#    define __SYS_sendfile             (__SYS_fs_fdopen+0)
 #  endif
 
 #  if defined(CONFIG_NET_SENDFILE)
@@ -371,27 +419,35 @@
 #  define SYS_pthread_mutex_trylock    (__SYS_pthread+20)
 #  define SYS_pthread_mutex_unlock     (__SYS_pthread+21)
 #  define SYS_pthread_once             (__SYS_pthread+22)
-#  define SYS_pthread_setcancelstate   (__SYS_pthread+23)
-#  define SYS_pthread_setschedparam    (__SYS_pthread+24)
-#  define SYS_pthread_setschedprio     (__SYS_pthread+25)
-#  define SYS_pthread_setspecific      (__SYS_pthread+26)
-#  define SYS_pthread_yield            (__SYS_pthread+27)
-
-#  ifndef CONFIG_SMP
-#    define SYS_pthread_setaffinity_np (__SYS_pthread+28)
-#    define SYS_pthread_getaffinity_np (__SYS_pthread+29)
-#    define __SYS_pthread_signals      (__SYS_pthread+30)
+#  define SYS_pthread_setschedparam    (__SYS_pthread+23)
+#  define SYS_pthread_setschedprio     (__SYS_pthread+24)
+#  define SYS_pthread_setspecific      (__SYS_pthread+25)
+#  define SYS_pthread_yield            (__SYS_pthread+26)
+#  define __SYS_pthread_smp            (__SYS_pthread+27)
+
+#  ifdef CONFIG_SMP
+#    define SYS_pthread_setaffinity_np (__SYS_pthread_smp+0)
+#    define SYS_pthread_getaffinity_np (__SYS_pthread_smp+1)
+#    define __SYS_pthread_signals      (__SYS_pthread_smp+2)
 #  else
-#    define __SYS_pthread_signals      (__SYS_pthread+28)
+#    define __SYS_pthread_signals      __SYS_pthread_smp
 #  endif
 
 #  ifndef CONFIG_DISABLE_SIGNALS
 #    define SYS_pthread_cond_timedwait (__SYS_pthread_signals+0)
 #    define SYS_pthread_kill           (__SYS_pthread_signals+1)
 #    define SYS_pthread_sigmask        (__SYS_pthread_signals+2)
-#    define __SYS_mqueue               (__SYS_pthread_signals+3)
+#    define __SYS_pthread_cleanup      (__SYS_pthread_signals+3)
+#  else
+#    define __SYS_pthread_cleanup      __SYS_pthread_signals
+#  endif
+
+#  ifdef CONFIG_PTHREAD_CLEANUP
+#    define __SYS_pthread_cleanup_push (__SYS_pthread_cleanup+0)
+#    define __SYS_pthread_cleanup_pop  (__SYS_pthread_cleanup+1)
+#    define __SYS_mqueue               (__SYS_pthread_cleanup+2)
 #  else
-#    define __SYS_mqueue               __SYS_pthread_signals
+#    define __SYS_mqueue               __SYS_pthread_cleanup
 #  endif
 
 #else
diff --git a/include/sys/time.h b/include/sys/time.h
index b36e30fca9a46e4c65775feb8b6200f6e5d10159..3d7139e7547bfff4f96e5e5c2882a5b3878ab5eb 100644
--- a/include/sys/time.h
+++ b/include/sys/time.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * include/sys/time.h
  *
- *   Copyright (C) 2009, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -77,13 +77,13 @@
 #define timersub(tvp, uvp, vvp) \
   do \
     { \
-      (vvp)->tv_sec = (tvp)->tv_sec - (uvp)->tv_sec; \
-      if ((uvp)->tv_usec > (tvp)->tv_usec) \
+      (vvp)->tv_sec = (tvp)->tv_sec - (uvp)->tv_sec; \
+      (vvp)->tv_usec = (tvp)->tv_usec - (uvp)->tv_usec; \
+      if ((vvp)->tv_usec < 0) \
         { \
-          (vvp)->tv_sec--; \
-          (tvp)->tv_usec += 1000000; \
-        } \
-      (vvp)->tv_usec = (tvp)->tv_usec - (uvp)->tv_usec; \
+          (vvp)->tv_sec--; \
+          (vvp)->tv_usec += 1000000; \
+        } \
     } \
   while (0)
 
@@ -92,8 +92,8 @@
 #define timerclear(tvp) \
   do \
     { \
-      tvp)->tv_sec = 0; \
-      tvp)->tv_usec = 0; \
+      (tvp)->tv_sec = 0; \
+      (tvp)->tv_usec = 0; \
     } \
   while (0)
 
@@ -112,6 +112,7 @@
 /****************************************************************************
  * Public Type Definitions
  ****************************************************************************/
+
 /* struct timeval represents time as seconds plus microseconds */
 
 struct timeval
@@ -190,6 +191,46 @@ int gettimeofday(FAR struct timeval *tv, FAR struct timezone *tz);
 
 int settimeofday(FAR const struct timeval *tv, FAR struct timezone *tz);
 
+/****************************************************************************
+ * Name: adjtime
+ *
+ * Description:
+ *   The adjtime() function gradually adjusts the system clock (as returned
+ *   by gettimeofday(2)).  The amount of time by which the clock is to be
+ *   adjusted is specified in the structure pointed to by delta.
+ *
+ *   This structure has the following form:
+ *
+ *     struct timeval
+ *       {
+ *         time_t      tv_sec;     (seconds)
+ *         suseconds_t tv_usec;    (microseconds)
+ *       };
+ *
+ *   If the adjustment in delta is positive, then the system clock is
+ *   speeded up by some small percentage (i.e., by adding a small amount of
+ *   time to the clock value in each second) until the adjustment has been
+ *   completed.  If the adjustment in delta is negative, then the clock is
+ *   slowed down in a similar fashion.
+ *
+ *   If a clock adjustment from an earlier adjtime() call is already in
+ *   progress at the time of a later adjtime() call, and delta is not NULL
+ *   for the later call, then the earlier adjustment is stopped, but any
+ *   already completed part of that adjustment is not undone.
+ *
+ *   If olddelta is not NULL, then the buffer that it points to is used to
+ *   return the amount of time remaining from any previous adjustment that
+ *   has not yet been completed.
+ *
+ *   NOTE: This is not a POSIX interface but derives from 4.3BSD, System V.
+ *   It is also supported for Linux compatibility.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CLOCK_TIMEKEEPING
+int adjtime(FAR const struct timeval *delta, FAR struct timeval *olddelta);
+#endif
+
 #undef EXTERN
 #if defined(__cplusplus)
 }
diff --git a/include/sys/types.h b/include/sys/types.h
index a818cc2a80ac6f73731a01a68863852426b90091..ed82645e7d03850124cb60eeee94e10f2766833b 100644
--- a/include/sys/types.h
+++ b/include/sys/types.h
@@ -191,6 +191,7 @@ typedef int16_t      key_t;
 
 typedef intptr_t     ptrdiff_t;
 
+#ifndef CONFIG_WCHAR_BUILTIN
 /* Wide, 16-bit character types.  wchar_t is a built-in type in C++ and
  * its declaration here may cause compilation errors on some compilers
  * if -DCONFIG_WCHAR_BUILTIN is not included in the CXXFLAGS.
@@ -198,7 +199,6 @@ typedef intptr_t     ptrdiff_t;
  * REVISIT: wchar_t belongs in stddef.h
  */
 
-#ifndef CONFIG_WCHAR_BUILTIN
 typedef uint16_t     wchar_t;
 #endif
 
@@ -215,9 +215,9 @@ typedef uint32_t     blkcnt_t;
 typedef int32_t      off_t;
 typedef off_t        fpos_t;
 
+#ifdef CONFIG_HAVE_LONG_LONG
 /* Large file versions */
 
-#ifdef CONFIG_HAVE_LONG_LONG
 typedef int64_t      off64_t;
 typedef int64_t      fpos64_t;
 #endif
diff --git a/include/sys/wait.h b/include/sys/wait.h
index b46e302879a04dbab71d767b4043ad76baae4673..500c8b51f97bf282cfa6ca1afc47b148e4048f84 100644
--- a/include/sys/wait.h
+++ b/include/sys/wait.h
@@ -50,7 +50,7 @@
  ****************************************************************************/
 
 /* The following are provided for analysis of returned status values.
- * Encoded is as follows as 2 bytes of info(MS) then two bytes of code (LS).
+ * Encoded is as follows as 2 bytes of _info(MS) then two bytes of code (LS).
  * Code:
  *   0 - Child has exited, info is the exit code.
  *   Other values - Not implemented
diff --git a/include/syslog.h b/include/syslog.h
index 6c1316a7e61477eea4f0a754e326bb388a5112a2..4c1112cf76d02a1f84793e6c8d3c185b4a77bf01 100644
--- a/include/syslog.h
+++ b/include/syslog.h
@@ -128,14 +128,6 @@
 #define LOG_UPTO(p)   ((1 << (p)) - 1)
 #define LOG_ALL       0xff
 
-/****************************************************************************
- * Public Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Function Prototypes
  ****************************************************************************/
@@ -145,8 +137,60 @@ extern "C"
 {
 #endif
 
+/****************************************************************************
+ * Name: openlog
+ *
+ * Description:
+ *   The openlog() function sets process attributes that affect subsequent
+ *   calls to syslog(). The ident argument is a string that is prepended to
+ *   every message. The logopt argument indicates logging options. Values
+ *   for logopt are constructed by a bitwise-inclusive OR of zero or more of
+ *   the following:
+ *
+ *     LOG_PID - Log the process ID with each message. This is useful for
+ *       identifying specific processes.
+ *
+ *     LOG_CONS - Write messages to the system console if they cannot be
+ *       sent to the logging facility. The syslog() function ensures that
+ *       the process does not acquire the console as a controlling terminal
+ *       in the process of writing the message.
+ *
+ *     LOG_NDELAY - Open the connection to the logging facility immediately.
+ *       Normally the open is delayed until the first message is logged.
+ *       This is useful for programs that need to manage the order in which
+ *       file descriptors are allocated.
+ *
+ *     LOG_ODELAY - Delay open until syslog() is called.
+ *
+ *     LOG_NOWAIT - Do not wait for child processes that may have been
+ *       created during the course of logging the message. This option
+ *       should be used by processes that enable notification of child
+ *       termination using SIGCHLD, since syslog() may otherwise block
+ *       waiting for a child whose exit status has already been collected.
+ *
+ *   The facility argument encodes a default facility to be assigned to all
+ *   messages that do not have an explicit facility already encoded. The
+ *   initial default facility is LOG_USER.
+ *
+ *   It is not necessary to call openlog() prior to calling syslog().
+ *
+ ****************************************************************************/
+
 #if 0 /* Not supported */
 void openlog(FAR const char *ident, int option, int facility);
+#endif
+
+/****************************************************************************
+ * Name: closelog
+ *
+ * Description:
+ *   The openlog() and syslog() functions may allocate a file descriptor.
+ *   The closelog() function will close any open file descriptors allocated
+ *   by previous calls to openlog() or syslog().
+ *
+ ****************************************************************************/
+
+#if 0 /* Not supported */
 void closelog(void);
 #endif
 
@@ -171,48 +215,6 @@ void closelog(void);
 int syslog(int priority, FAR const IPTR char *format, ...);
 int vsyslog(int priority, FAR const IPTR char *src, va_list ap);
 
-/****************************************************************************
- * Name: lowsyslog and lowvsyslog
- *
- * Description:
- *   syslog() generates a log message. The priority argument is formed by
- *   ORing the facility and the level values (see include/syslog.h). The
- *   remaining arguments are a format, as in printf and any arguments to the
- *   format.
- *
- *   This is a non-standard, low-level system logging interface.  The
- *   difference between syslog() and lowsyslog() is that the syslog()
- *   interface writes to the syslog device (usually fd=1, stdout) whereas
- *   lowsyslog() uses a lower level interface that works even from interrupt
- *   handlers.
- *
- *   If the platform cannot support lowsyslog, then we will substitute the
- *   standard syslogging functions.  These will, however, probably cause
- *   problems if called from interrupt handlers, depending upon the nature of
- *   the underlying syslog device.
- *
- *   The function lowvsyslog() performs the same task as lowsyslog() with
- *   the difference that it takes a set of arguments which have been
- *   obtained using the stdarg variable argument list macros.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_ARCH_LOWPUTC
-
-int lowsyslog(int priority, FAR const IPTR char *format, ...);
-int lowvsyslog(int priority, FAR const IPTR char *format, va_list ap);
-
-#else
-
-#  ifdef CONFIG_CPP_HAVE_VARARGS
-#    define lowsyslog(p,f,...) syslog(p,f,##__VA_ARGS__)
-#  else
-#    define lowsyslog (void)
-#  endif
-#  define lowvsyslog(p,f,a) vsyslog(p,f,a)
-
-#endif
-
 /****************************************************************************
  * Name: setlogmask
  *
@@ -225,8 +227,12 @@ int lowvsyslog(int priority, FAR const IPTR char *format, va_list ap);
  *   to a priority p is LOG_MASK(p); LOG_UPTO(p) provides the mask of all
  *   priorities in the above list up to and including p.
  *
+ *   Per OpenGroup.org "If the maskpri argument is 0, the current log mask
+ *   is not modified."  In this implementation, the value zero is permitted
+ *   in order to disable all syslog levels.
+ *
  *   REVISIT: Per POSIX the syslog mask should be a per-process value but in
- *   NuttX, the scope of the mask is dependent on the nature of the build.
+ *   NuttX, the scope of the mask is dependent on the nature of the build:
  *
  *   Flat Build:  There is one, global SYSLOG mask that controls all output.
  *   Protected Build:  There are two SYSLOG masks.  One within the kernel
diff --git a/include/termios.h b/include/termios.h
index 14cb8f656d8e2eb58cd243eab39e237d49becf2d..8427cbf5991cf1462845ef15a5e7809d54b9ac8a 100644
--- a/include/termios.h
+++ b/include/termios.h
@@ -110,8 +110,8 @@
 #define HUPCL     (1 << 6)  /* Bit 6: Hang up on last close */
 #define CLOCAL    (1 << 7)  /* Bit 7: Ignore modem status lines */
 #define CCTS_OFLOW (1 << 8) /* Bit 8: CTS flow control of output */
-#define CRTSCTS   CCTS_OFLOW
 #define CRTS_IFLOW (1 << 9) /* Bit 9: RTS flow control of input */
+#define CRTSCTS   (CRTS_IFLOW | CCTS_OFLOW)
 
 /* Local Modes (c_lflag in the termios structure) */
 
@@ -298,9 +298,6 @@ int tcsendbreak(int fd, int duration);
 
 int tcsetattr(int fd, int options, FAR const struct termios *termiosp);
 
-/* Check if a file descriptor corresponds to a terminal I/O file */
-
-int isatty(int fd);
 
 #undef EXTERN
 #ifdef __cplusplus
diff --git a/include/time.h b/include/time.h
index 0fd4b7611bc8ca43f46d060c4d570e2dca34dbe0..f52435701374aa8700a2a12cda2dac637058b3a4 100644
--- a/include/time.h
+++ b/include/time.h
@@ -41,6 +41,7 @@
  ********************************************************************************/
 
 #include 
+#include 
 
 #include 
 #include 
@@ -103,6 +104,7 @@
 /********************************************************************************
  * Public Types
  ********************************************************************************/
+
 /* Scalar types */
 
 typedef uint32_t  time_t;         /* Holds time in seconds */
@@ -214,6 +216,12 @@ FAR char *ctime_r(FAR const time_t *timep, FAR char *buf);
 
 time_t time(FAR time_t *timep);
 
+#ifdef CONFIG_HAVE_DOUBLE
+double difftime(time_t time1, time_t time0);
+#else
+float difftime(time_t time1, time_t time0);
+#endif
+
 int timer_create(clockid_t clockid, FAR struct sigevent *evp,
                  FAR timer_t *timerid);
 int timer_delete(timer_t timerid);
diff --git a/include/unistd.h b/include/unistd.h
index e482109f5c1380080aa72775988a345757145937..a812533aadabe305607d2fdc3f08dc4417eb4688 100644
--- a/include/unistd.h
+++ b/include/unistd.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * include/unistd.h
  *
- *   Copyright (C) 2007-2009, 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2013-2014, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -165,6 +165,10 @@ ssize_t write(int fd, FAR const void *buf, size_t nbytes);
 ssize_t pread(int fd, FAR void *buf, size_t nbytes, off_t offset);
 ssize_t pwrite(int fd, FAR const void *buf, size_t nbytes, off_t offset);
 
+/* Check if a file descriptor corresponds to a terminal I/O file */
+
+int     isatty(int fd);
+
 /* Memory management */
 
 #if defined(CONFIG_ARCH_ADDRENV) && defined(CONFIG_MM_PGALLOC) && \
@@ -187,6 +191,11 @@ int     access(FAR const char *path, int amode);
 int     rmdir(FAR const char *pathname);
 int     unlink(FAR const char *pathname);
 
+#ifdef CONFIG_PSEUDOFS_SOFTLINKS
+int     link(FAR const char *path1, FAR const char *path2);
+ssize_t readlink(FAR const char *path, FAR char *buf, size_t bufsize);
+#endif
+
 /* Execution of programs from files */
 
 #ifdef CONFIG_LIBC_EXECFUNCS
@@ -194,7 +203,11 @@ int     execl(FAR const char *path, ...);
 int     execv(FAR const char *path, FAR char *const argv[]);
 #endif
 
-/* Other */
+/* Byte operations */
+
+void    swab(FAR const void *src, FAR void *dest, ssize_t nbytes);
+
+/* getopt and friends */
 
 int     getopt(int argc, FAR char *const argv[], FAR const char *optstring);
 
diff --git a/include/wchar.h b/include/wchar.h
index 90e3d4f12ca918f816774adb7cf97e14e8b2ccbf..66d24ae9d776a4edbe455868ebef801e5eebe562 100644
--- a/include/wchar.h
+++ b/include/wchar.h
@@ -96,8 +96,11 @@ typedef int wint_t;
 /* wctype_t
  *   A scalar type of a data object that can hold values which represent
  *   locale-specific character classification.
- *
- * mbstate_t
+ */
+
+typedef int wctype_t;
+
+/* mbstate_t
  *   An object type other than an array type that can hold the conversion
  *   state information necessary to convert between sequences of (possibly
  *   multibyte) characters and wide-characters. If a codeset is being used
@@ -105,29 +108,12 @@ typedef int wint_t;
  *   state, the results are unspecified.
  */
 
-#if 0 /* Not used */
-/* Commented out because this is dangerous.  This defines a type that would
- * be internal to some wchar implementation.  NuttX does not implement the
- * wchar functions.  Having this definition is a time bomb:  If this header
- * file is inadvertently included in code that interacts with an external
- * library and if the definition of mbstate_t does not EXACTLY match the
- * usage in that external library, then a potentially fatal error could
- * occur.
- *
- * It is better to let the build error out due to the lack of the mbstate_t
- * definition.  At least that way, the problem can be avoided and the user
- * can come up with some alternative way of dealing with the interfacing
- * issue that does not require NuttX to be in lock-step with some external
- * implementation.
- */
-
 struct mbstate_s
 {
   int __fill[6];
 };
 
 typedef struct mbstate_s mbstate_t;
-#endif
 
 /* FILE
  *   As described in .
@@ -168,10 +154,9 @@ extern "C"
  * Reference: Opengroup.org
  */
 
-#if 0 /* Not yet implemented */
 wint_t            btowc(int);
-int               fwprintf(FILE *, const wchar_t *, ...);
-int               fwscanf(FILE *, const wchar_t *, ...);
+int               fwprintf(FILE *, FAR const wchar_t *, ...);
+int               fwscanf(FILE *, FAR const wchar_t *, ...);
 int               iswalnum(wint_t);
 int               iswalpha(wint_t);
 int               iswcntrl(wint_t);
@@ -185,66 +170,75 @@ int               iswupper(wint_t);
 int               iswxdigit(wint_t);
 int               iswctype(wint_t, wctype_t);
 wint_t            fgetwc(FILE *);
-wchar_t          *fgetws(wchar_t *, int, FILE *);
+FAR wchar_t      *fgetws(wchar_t *, int, FILE *);
 wint_t            fputwc(wchar_t, FILE *);
-int               fputws(const wchar_t *, FILE *);
+int               fputws(FAR const wchar_t *, FILE *);
 int               fwide(FILE *, int);
 wint_t            getwc(FILE *);
 wint_t            getwchar(void);
-int               mbsinit(const mbstate_t *);
-size_t            mbrlen(const char *, size_t, mbstate_t *);
-size_t            mbrtowc(wchar_t *, const char *, size_t,
-                      mbstate_t *);
-size_t            mbsrtowcs(wchar_t *, const char **, size_t,
+int               mbsinit(FAR const mbstate_t *);
+size_t            mbrlen(FAR const char *, size_t, FAR mbstate_t *);
+size_t            mbrtowc(wchar_t *, FAR const char *, size_t,
                       mbstate_t *);
+size_t            mbsnrtowcs(FAR wchar_t *, FAR const char **, size_t,
+                      size_t, FAR mbstate_t *);
+size_t            mbsrtowcs(wchar_t *, FAR const char **, size_t,
+                      FAR mbstate_t *);
 wint_t            putwc(wchar_t, FILE *);
 wint_t            putwchar(wchar_t);
-int               swprintf(wchar_t *, size_t, const wchar_t *, ...);
-int               swscanf(const wchar_t *, const wchar_t *, ...);
+int               swprintf(FAR wchar_t *, size_t, FAR const wchar_t *, ...);
+int               swscanf(FAR const wchar_t *, FAR const wchar_t *, ...);
 wint_t            towlower(wint_t);
 wint_t            towupper(wint_t);
 wint_t            ungetwc(wint_t, FILE *);
-int               vfwprintf(FILE *, const wchar_t *, va_list);
-int               vwprintf(const wchar_t *, va_list);
-int               vswprintf(wchar_t *, size_t, const wchar_t *,
+int               vfwprintf(FILE *, FAR const wchar_t *, va_list);
+int               vwprintf(FAR const wchar_t *, va_list);
+int               vswprintf(wchar_t *, size_t, FAR const wchar_t *,
                       va_list);
-size_t            wcrtomb(char *, wchar_t, mbstate_t *);
-wchar_t          *wcscat(wchar_t *, const wchar_t *);
-wchar_t          *wcschr(const wchar_t *, wchar_t);
-int               wcscmp(const wchar_t *, const wchar_t *);
-int               wcscoll(const wchar_t *, const wchar_t *);
-wchar_t          *wcscpy(wchar_t *, const wchar_t *);
-size_t            wcscspn(const wchar_t *, const wchar_t *);
-size_t            wcsftime(wchar_t *, size_t, const wchar_t *,
-                      const struct tm *);
-size_t            wcslen(const wchar_t *);
-wchar_t          *wcsncat(wchar_t *, const wchar_t *, size_t);
-int               wcsncmp(const wchar_t *, const wchar_t *, size_t);
-wchar_t          *wcsncpy(wchar_t *, const wchar_t *, size_t);
-wchar_t          *wcspbrk(const wchar_t *, const wchar_t *);
-wchar_t          *wcsrchr(const wchar_t *, wchar_t);
-size_t            wcsrtombs(char *, const wchar_t **, size_t,
-                      mbstate_t *);
-size_t            wcsspn(const wchar_t *, const wchar_t *);
-wchar_t          *wcsstr(const wchar_t *, const wchar_t *);
-double            wcstod(const wchar_t *, wchar_t **);
-wchar_t          *wcstok(wchar_t *, const wchar_t *, wchar_t **);
-long int          wcstol(const wchar_t *, wchar_t **, int);
-unsigned long int wcstoul(const wchar_t *, wchar_t **, int);
-wchar_t          *wcswcs(const wchar_t *, const wchar_t *);
-int               wcswidth(const wchar_t *, size_t);
-size_t            wcsxfrm(wchar_t *, const wchar_t *, size_t);
+size_t            wcrtomb(FAR char *, wchar_t, FAR mbstate_t *);
+FAR wchar_t      *wcscat(FAR wchar_t *, FAR const wchar_t *);
+FAR wchar_t      *wcschr(FAR const wchar_t *, wchar_t);
+int               wcscmp(FAR const wchar_t *, FAR const wchar_t *);
+int               wcscoll(FAR const wchar_t *, FAR const wchar_t *);
+FAR wchar_t      *wcscpy(FAR wchar_t *, FAR const wchar_t *);
+size_t            wcscspn(FAR const wchar_t *, FAR const wchar_t *);
+size_t            wcsftime(FAR wchar_t *, size_t, FAR const wchar_t *,
+                      FAR const struct tm *);
+size_t            wcslen(FAR const wchar_t *);
+size_t            wcslcpy(FAR wchar_t *, FAR const wchar_t *, size_t);
+size_t            wcslcat(FAR wchar_t *, FAR const wchar_t *, size_t);
+FAR wchar_t      *wcsncat(FAR wchar_t *, FAR const wchar_t *, size_t);
+int               wcsncmp(FAR const wchar_t *, FAR const wchar_t *, size_t);
+FAR wchar_t      *wcsncpy(FAR wchar_t *, FAR const wchar_t *, size_t);
+size_t            wcsnrtombs(FAR char *, FAR const wchar_t **, size_t,
+                      size_t, FAR mbstate_t *);
+FAR wchar_t      *wcspbrk(FAR const wchar_t *, FAR const wchar_t *);
+FAR wchar_t      *wcsrchr(FAR const wchar_t *, wchar_t);
+size_t            wcsrtombs(FAR char *, FAR const wchar_t **, size_t,
+                      FAR mbstate_t *);
+size_t            wcsspn(FAR const wchar_t *, FAR const wchar_t *);
+FAR wchar_t      *wcsstr(FAR const wchar_t *, FAR const wchar_t *);
+double            wcstod(FAR const wchar_t *, FAR wchar_t **);
+float             wcstof(FAR const wchar_t *, FAR wchar_t **);
+FAR wchar_t      *wcstok(FAR wchar_t *, FAR const wchar_t *, FAR wchar_t **);
+long int          wcstol(FAR const wchar_t *, FAR wchar_t **, int);
+long double       wcstold(FAR const wchar_t *, FAR wchar_t **);
+long long int     wcstoll(FAR const wchar_t *, FAR wchar_t **, int);
+unsigned long int wcstoul(FAR const wchar_t *, FAR wchar_t **, int);
+unsigned long long int wcstoull(FAR const wchar_t *, FAR wchar_t **, int);
+FAR wchar_t      *wcswcs(FAR const wchar_t *, FAR const wchar_t *);
+int               wcswidth(FAR const wchar_t *, size_t);
+size_t            wcsxfrm(wchar_t *, FAR const wchar_t *, size_t);
 int               wctob(wint_t);
-wctype_t          wctype(const char *);
+wctype_t          wctype(FAR const char *);
 int               wcwidth(wchar_t);
-wchar_t          *wmemchr(const wchar_t *, wchar_t, size_t);
-int               wmemcmp(const wchar_t *, const wchar_t *, size_t);
-wchar_t          *wmemcpy(wchar_t *, const wchar_t *, size_t);
-wchar_t          *wmemmove(wchar_t *, const wchar_t *, size_t);
-wchar_t          *wmemset(wchar_t *, wchar_t, size_t);
-int               wprintf(const wchar_t *, ...);
-int               wscanf(const wchar_t *, ...);
-#endif
+FAR wchar_t      *wmemchr(FAR const wchar_t *, wchar_t, size_t);
+int               wmemcmp(FAR const wchar_t *, FAR const wchar_t *, size_t);
+FAR wchar_t      *wmemcpy(FAR wchar_t *, FAR const wchar_t *, size_t);
+FAR wchar_t      *wmemmove(FAR wchar_t *, FAR const wchar_t *, size_t);
+FAR wchar_t      *wmemset(FAR wchar_t *, wchar_t, size_t);
+int               wprintf(FAR const wchar_t *, ...);
+int               wscanf(FAR const wchar_t *, ...);
 
 #undef EXTERN
 #ifdef __cplusplus
diff --git a/include/wctype.h b/include/wctype.h
new file mode 100644
index 0000000000000000000000000000000000000000..39f338940ed91b68bb89f66244c20b29977d3476
--- /dev/null
+++ b/include/wctype.h
@@ -0,0 +1,124 @@
+/****************************************************************************
+ * include/wctype.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __INCLUDE_WTYPE_H
+#define __INCLUDE_WTYPE_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef WEOF
+#  define WEOF ((wint_t)-1)
+#endif
+
+/* valid values for wctype_t */
+
+#define WC_ALNUM        1
+#define WC_ALPHA        2
+#define WC_BLANK        3
+#define WC_CNTRL        4
+#define WC_DIGIT        5
+#define WC_GRAPH        6
+#define WC_LOWER        7
+#define WC_PRINT        8
+#define WC_PUNCT        9
+#define WC_SPACE        10
+#define WC_UPPER        11
+#define WC_XDIGIT       12
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* A scalar type that can hold values which represent locale-specific
+ * character mappings.
+ */
+
+typedef int wctrans_t;
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/* "The  header declares the following as functions and may also
+ *  define them as macros. Function prototypes must be provided for use with
+ *  an ISO C compiler."
+ *
+ * Reference: Opengroup.org
+ */
+
+int               iswalnum(wint_t);
+int               iswalpha(wint_t);
+int               iswblank(wint_t);
+int               iswcntrl(wint_t);
+int               iswctype(wint_t, wctype_t);
+int               iswdigit(wint_t);
+int               iswgraph(wint_t);
+int               iswlower(wint_t);
+int               iswprint(wint_t);
+int               iswpunct(wint_t);
+int               iswspace(wint_t);
+int               iswupper(wint_t);
+int               iswxdigit(wint_t);
+int               towctrans(wint_t, wctrans_t);
+wint_t            towlower(wint_t);
+wint_t            towupper(wint_t);
+wctrans_t         wctrans(FAR const char *);
+int               iswctype(wint_t, wctype_t);
+wctype_t          wctype(FAR const char *);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_WTYPE_H */
diff --git a/libc/Kconfig b/libc/Kconfig
index 276cc502e5d228070e2040aeac9952dd72c114cc..407e9dead786a5132d0101a1a56207ed52080916 100644
--- a/libc/Kconfig
+++ b/libc/Kconfig
@@ -5,869 +5,20 @@
 
 comment "Standard C Library Options"
 
-config STDIO_BUFFER_SIZE
-	int "C STDIO buffer size"
-	default 64
-	---help---
-		Size of buffers using within the C buffered I/O interfaces.
-		(printf, putchar, fwrite, etc.).
-
-config STDIO_LINEBUFFER
-	bool "STDIO line buffering"
-	default y
-	---help---
-		Flush buffer I/O whenever a newline character is found in
-		the output data stream.
-
-config NUNGET_CHARS
-	int "Number unget() characters"
-	default 2
-	---help---
-		Number of characters that can be buffered by ungetc() (Only if NFILE_STREAMS > 0)
-
-config LIB_HOMEDIR
-	string "Home directory"
-	default "/"
-	depends on !DISABLE_ENVIRON
-	---help---
-		The home directory to use with operations like such as 'cd ~'
-
+source libc/stdio/Kconfig
 source libc/math/Kconfig
-
-config NOPRINTF_FIELDWIDTH
-	bool "Disable sprintf support fieldwidth"
-	default n
-	---help---
-		sprintf-related logic is a little smaller if we do not support field
-		widths.
-
-config LIBC_FLOATINGPOINT
-	bool "Enable floating point in printf"
-	default n
-	---help---
-		By default, floating point
-		support in printf, sscanf, etc. is disabled.
-
-config LIBC_LONG_LONG
-	bool "Enable long long support in printf"
-	default y if !DEFAULT_SMALL
-	default n if DEFAULT_SMALL
-	---help---
-		Enables support for long long formats in printf, sscanf, etc. is
-		enabled.  This is enabled by default but if you are trying to
-		reduce the FLASH footprint, then disabling this feature is one
-		option.  The FLASH saves comes not from disabling the long long
-		formats, but rather from omitting the large long long arithmetic
-		libraries that will be drawn into the build if long long support
-		is enabled.
-
-config LIBC_IOCTL_VARIADIC
-	bool "Enable variadic ioctl()"
-	default n
-	---help---
-		By default, NuttX implements the "old style," three-parameter,
-		ioctl() interface with this function prototype:
-
-			int ioctl(int fd, int req, unsigned long arg);
-
-		That function is implemented as part of the VFS.  If
-		LIBC_IOCTL_VARIADIC is selected, then an additional compatibility
-		layer will be provided in the C library.  The enabled, then function
-		prototype will become:
-
-			int ioctl(int fd, int req, ...);
-
-		The ioctl() is not controlled by any standard so it is really
-		arbitrary which format you used.  You may select the variadic
-		function prototype with this option.  That will slightly increase
-		code size and ioctl() processing time.  It will not support a
-		variable number of arguments and it still always expects to see a
-		third argument of type 'unsigned long'.  The only benefit of this
-		alternative function signature is that it may provide greater
-		compatibility if you are porting code from other platforms that use
-		the variadic ioctl() function.
-
-		WARNING:  Use of this option could cause subtle system errors is
-		the third argument is omitted or if the sizeof the thread argument
-		is anything other than sizeof (unsigned long).  Most small integers
-		will be promoted to 'int'.  The following assertion appears in ioctl():
-
-			DEBUGASSERT(sizeof(int)        == sizeof(unsigned long) &&
-			            sizeof(FAR void *) == sizeof(unsigned long));
-
-		Do not enable this option if the above is not true.  32-bit ARM
-		should pass this test with all three types having sizeof(type) == 4
-		bytes.  'float' should also be tested.  But 'long long' and 'double'
-		are out of the question!  Don't event try to pass them.
-
-		And what will happen if no third argument is passed?  In most cases,
-		this should just result in a garbage value for arg.  But you may
-		discover cases where something worse happens!
-
-config LIB_RAND_ORDER
-	int "Order of the random number generate"
-	default 1
-	range 1 3
-	---help---
-		The order of the random number generator. 1=fast but very bad random
-		numbers, 3=slow but very good random numbers.
-
-choice
-	prompt "Newline Options"
-	default EOL_IS_EITHER_CRLF
-	---help---
-		This selection determines the line terminating character that is used.
-		Some environments may return CR as end-of-line, others LF, and others
-		both.  If not specified, the default is either CR or LF (but not both)
-		as the line terminating charactor.
-
-config EOL_IS_CR
-	bool "EOL is CR"
-
-config EOL_IS_LF
-	bool "EOL is LF"
-
-config EOL_IS_BOTH_CRLF
-	bool "EOL is CR and LF"
-
-config EOL_IS_EITHER_CRLF
-	bool "EOL is CR or LF"
-
-endchoice
-
-config LIBC_EXECFUNCS
-	bool "Enable exec[l|v] / posix_spawn() Support"
-	default n
-	depends on !BINFMT_DISABLE
-	---help---
-		Enable support for the exec[l|v] family of functions that can be
-		used to start other programs, terminating the current program and
-		the posix_spawn() familty of functions that can be used start other
-		programs without terminating the current program.  The typical
-		usage of the exec[l|v] functions is (1) first call vfork() to create
-		a new thread, then (2) call exec[l|v] to replace the new thread with
-		a program from the file system.
-
-		NOTE 1: This two step process start is completely unnecessary in
-		NuttX and is provided only for compatibily with Unix systems.  These
-		functions are essentially just wrapper functions that (1) call the
-		non-standard binfmt function 'exec', and then (2) exit(0).  Since
-		the new thread will be terminated by the exec[l|v] call, it really
-		served no purpose other than to suport Unix compatility.
-
-		The posix_spawn() functions do not have this inefficiency.
-
-		NOTE 2: Support for exec[l|v] and posix_spawn() is conditional
-		because they require additional support for symbol tables that
-		will not be available in the typical system.
-
-if LIBC_EXECFUNCS
-
-config EXECFUNCS_HAVE_SYMTAB
-	bool "Have symbol table"
-	default n if BUILD_KERNEL
-	default y if !BUILD_KERNEL
-	---help---
-		If you have a system symbol table, then you must select this
-		option in order to use it.  Symbol tables are required in most
-		cases in order to like executable programs to the base code.
-
-if EXECFUNCS_HAVE_SYMTAB
-config EXECFUNCS_SYMTAB
-	string "Symbol table used by exec[l|v]"
-	default "g_symtab"
-	---help---
-		The exec[l|v] and posix_spawn() functions are wrapper functions that
-		call the non-standard binfmt function 'exec').  The binfmt
-		function 'exec' needs to have (1) a symbol table that provides the
-		list of symbols exported by the base code, and (2) the number of
-		symbols in that table.  This selection provides the name of that
-		symbol table.
-
-config EXECFUNCS_NSYMBOLS
-	int "Number of Symbols in the Table"
-	default 0
-	---help---
-		The exec[l|v] and posix_spawn() functions are wrapper functions that
-		call the non-standard binfmt function 'exec').  The binfmt
-		function 'exec' needs to have (1) a symbol table that provides the
-		list of symbols exported by the base code, and (2) the number of
-		symbols in that table.  This selection provides the number of
-		symbols in the symbol table.
-
-endif # EXECFUNCS_HAVE_SYMTAB
-endif # LIBC_EXECFUNCS
-
-config POSIX_SPAWN_PROXY_STACKSIZE
-	int "Spawn Stack Size"
-	default 1024
-	---help---
-		If posix_spawn[p]() and task_spawn() use I/O redirection options,
-		they will require an intermediary/proxy task to muck with the file
-		descriptors.  This configuration item specifies the stack size
-		used for the proxy. Default: 1024 bytes.
-
-config TASK_SPAWN_DEFAULT_STACKSIZE
-	int "Default task_spawn Stack Size"
-	default 2048
-	depends on !ARCH_ADDRENV
-	---help---
-		The actual size to use for the child task's stack can be set with
-		task_spawnattr_setstacksize().  This value specifies the default
-		stack size to use if task_spawnattr_setstacksize() is not used.
-		Default: 2048.
-
-config LIBC_STRERROR
-	bool "Enable strerror"
-	default n
-	---help---
-		strerror() is useful because it decodes 'errno' values into a human readable
-		strings.  But it can also require a lot of memory.  If this option is selected,
-		strerror() will still exist in the build but it will not decode error values.
-		This option should be used by other logic to decide if it should use strerror()
-		or not.  For example, the NSH application will not use strerror() if this
-		option is not selected; perror() will not use strerror() is this option is not
-		selected (see also NSH_STRERROR).
-
-config LIBC_STRERROR_SHORT
-	bool "Use short error descriptions in strerror()"
-	default n
-	depends on LIBC_STRERROR
-	---help---
-		If this option is selected, then strerror() will use a shortened string when
-		it decodes the error.  Specifically, strerror() is simply use the string that
-		is the common name for the error.  For example, the 'errno' value of 2 will
-		produce the string "No such file or directory" is LIBC_STRERROR_SHORT
-		is not defined but the string "ENOENT" is LIBC_STRERROR_SHORT is defined.
-
-config LIBC_PERROR_STDOUT
-	bool "perror() to stdout"
-	default n
-	---help---
-		POSIX requires that perror() provide its output on stderr.  This option may
-		be defined, however, to provide perror() output that is serialized with
-		other stdout messages.
-
-config LIBC_TMPDIR
-	string "Temporary file directory"
-	default "/tmp"
-	depends on FS_WRITABLE
-		---help---
-		If a write-able file system is selected, this string will be
-		provided to specify the full path to a directory where temporary
-		files can be created.  This would be a good application of RAM disk:
-		To provide temporary storage for application data.
-
-config LIBC_MAX_TMPFILE
-	int "Maximum size of a temporary file path"
-	default 32
-	depends on FS_WRITABLE
-		---help---
-		If a write-able file system is selected, then temporary file may be
-		supported at the path provided by LIBC_TMPDIR.  The tmpnam() interface
-		keeps a static copy of this last filename produced; this value is the
-		maximum size of that last filename.  This size is the size of the full
-		file path.
-
-config ARCH_LOWPUTC
-	bool "Low-level console output"
-	default "y"
-	---help---
-		architecture supports low-level, boot time console output
-
-config LIBC_LOCALTIME
-	bool "localtime API call support"
-	default "n"
-	depends on !DISABLE_ENVIRON
-	---help---
-		localtime API call support
-
-		Logic currently depends on file system support with, at a minimum, these
-		files in the zoneinfo directory:  GMT and posixrules.  An additional
-		timezone file is required for any additional, local time zone(s) and the
-		environment variable TZ must be set to the name of that timezone file
-		when tzset() is called.
-
-		See https://www.iana.org/time-zones .  See also apps/system/zoneinfo
-		which provides a framework for incorporating the TZ database into a
-		NuttX build.
-
-if LIBC_LOCALTIME
-
-config LIBC_TZ_MAX_TIMES
-	int "Maximum number of times in timezone"
-	default 370
-	---help---
-		Timezone files with more than this number of times will not be usedi
-		(tmecnt).
-
-		Warning: Some files in IANA TZ database include many times.  The current
-		posixrules file, for example, has timecnt = 236.  The value of
-		TX_MAX_ITMES in the tzfile.h header file on my Linux system is 370, the
-		default used here.  You may want to reduce this value for a smaller
-		footprint.
-
-config LIBC_TZ_MAX_TYPES
-	int "Maximum number of TZ types"
-	default 20
-	---help---
-		Maximum number of local time types.  You may want to reduce this value
-		for a smaller footprint.
-
-config LIBC_TZDIR
-	string "zoneinfo directory path"
-	default "/etc/zoneinfo"
-	---help---
-		This is the full path to the location where the TZ database is expected
-		to be found.
-
-endif
-
-config TIME_EXTENDED
-	bool "Add day of week, year support"
-	default "n"
-	depends on !LIBC_LOCALTIME
-	---help---
-		Selecting TIME_EXTENDED adds tm_wday, tm_yday and tm_isdst
-		to the tm struct. This allows integration with 3rd party libraries
-		that expect the tm struct to contain these members.
-
-		Note: tm_isdst is always 0
-
-config LIB_SENDFILE_BUFSIZE
-	int "sendfile() buffer size"
-	default 512
-	---help---
-		Size of the I/O buffer to allocate in sendfile().  Default: 512b
-
-config ARCH_ROMGETC
-	bool "Support for ROM string access"
-	default n
-	---help---
-		In Harvard architectures, data accesses and instruction accesses
-		occur on different buses, perhaps concurrently.  All data accesses
-		are performed on the data bus unless special machine instructions
-		are used to read data from the instruction address space.  Also, in
-		the typical MCU, the available SRAM data memory is much smaller that
-		the non-volatile FLASH instruction memory.  So if the application
-		requires many constant strings, the only practical solution may be
-		to store those constant strings in FLASH memory where they can only
-		be accessed using architecture-specific machine instructions.
-
-		If ARCH_ROMGETC is defined, then the architecture logic must export
-		the function up_romgetc().  up_romgetc() will simply read one byte
-		of data from the instruction space.
-
-		If ARCH_ROMGETC is selected, certain C stdio functions are effected: (1)
-		All format strings in printf, fprintf, sprintf, etc. are assumed to lie
-		in FLASH (string arguments for %s are still assumed to reside in SRAM).
-		And (2), the string argument to puts and fputs is assumed to reside
-		in FLASH.  Clearly, these assumptions may have to modified for the
-		particular needs of your environment.  There is no "one-size-fits-all"
-		solution for this problem.
-
-config ARCH_OPTIMIZED_FUNCTIONS
-	bool "Enable arch optimized functions"
-	default n
-	---help---
-		Allow for architecture optimized implementations of certain library
-		functions.  Architecture-specific implementations can improve overall
-		system performance.
-
-if ARCH_OPTIMIZED_FUNCTIONS
-
-config ARCH_MEMCPY
-	bool "memcpy()"
-	default n
-	---help---
-		Select this option if the architecture provides an optimized version
-		of memcpy().
-
-config MEMCPY_VIK
-	bool "Vik memcpy()"
-	default n
-	depends on !ARCH_MEMCPY
-	---help---
-		Select this option to use the optimized memcpy() function by Daniel Vik.
-		Select this option for improved performance at the expense of increased
-		size. See licensing information in the top-level COPYING file.
-
-if MEMCPY_VIK
-
-config MEMCPY_PRE_INC_PTRS
-	bool "Pre-increment pointers"
-	default n
-	---help---
-		Use pre-increment of pointers. Default is post increment of pointers.
-
-config MEMCPY_INDEXED_COPY
-	bool "Array indexing"
-	default y
-	---help---
-		Copying data using array indexing. Using this option, disables the
-		MEMCPY_PRE_INC_PTRS option.
-
-config MEMCPY_64BIT
-	bool "64-bit memcpy()"
-	default n
-	---help---
-		Compiles memcpy() for architectures that suppport 64-bit operations
-		efficiently.
-
-endif # MEMCPY_VIK
-
-config ARCH_MEMCMP
-	bool "memcmp()"
-	default n
-	---help---
-		Select this option if the architecture provides an optimized version
-		of memcmp().
-
-config ARCH_MEMMOVE
-	bool "memmove()"
-	default n
-	---help---
-		Select this option if the architecture provides an optimized version
-		of memmove().
-
-config ARCH_MEMSET
-	bool "memset()"
-	default n
-	---help---
-		Select this option if the architecture provides an optimized version
-		of memset().
-
-config MEMSET_OPTSPEED
-	bool "Optimize memset() for speed"
-	default n
-	depends on !ARCH_MEMSET
-	---help---
-		Select this option to use a version of memcpy() optimized for speed.
-		Default: memcpy() is optimized for size.
-
-config MEMSET_64BIT
-	bool "64-bit memset()"
-	default n
-	depends on MEMSET_OPTSPEED
-	---help---
-		Compiles memset() for architectures that suppport 64-bit operations
-		efficiently.
-
-config ARCH_STRCHR
-	bool "strchr()"
-	default n
-	---help---
-		Select this option if the architecture provides an optimized version
-		of strchr().
-
-config ARCH_STRCMP
-	bool "strcmp()"
-	default n
-	---help---
-		Select this option if the architecture provides an optimized version
-		of strcmp().
-
-config ARCH_STRCPY
-	bool "strcpy()"
-	default n
-	---help---
-		Select this option if the architecture provides an optimized version
-		of strcpy().
-
-config ARCH_STRNCPY
-	bool "strncpy()"
-	default n
-	---help---
-		Select this option if the architecture provides an optimized version
-		of strncpy().
-
-config ARCH_STRLEN
-	bool "strlen"
-	default n
-	---help---
-		Select this option if the architecture provides an optimized version
-		of strlen().
-
-config ARCH_STRNLEN
-	bool "strlen()"
-	default n
-	---help---
-		Select this option if the architecture provides an optimized version
-		of strnlen().
-
-config ARCH_BZERO
-	bool "bzero()"
-	default n
-	---help---
-		Select this option if the architecture provides an optimized version
-		of bzero().
-
-endif # ARCH_OPTIMIZED_FUNCTIONS
-
-config ARCH_HAVE_TLS
-	bool
-	default n
-	---help---
-		Selected by the configuration system if the current architecture
-		supports TLS.
-
-menuconfig TLS
-	bool "Thread Local Storage (TLS)"
-	default n
-	depends on ARCH_HAVE_TLS
-	---help---
-		Build in support for stack based thread local storage (TLS).
-
-if TLS
-
-config TLS_LOG2_MAXSTACK
-	int "Maximum stack size (log2)"
-	default 13
-	range 11 24
-	---help---
-		Stack based TLS works by fetch thread information from the beginning
-		of the stack memory allocation.  In order to do this, the memory
-		must be aligned in such a way that the executing logic can simply
-		masking the current stack pointer to get the beginning of the stack
-		allocation.
-
-		This setting specifies the alignment of the stack as a power of 2:
-		11=2KB, 12=4KB, 13=8KB, etc.  The exact alignment is not so critical
-		except that (1) a very large value can cause you to run out of
-		alignable memory (and fail memory allocations), and (2) smaller
-		values will limit the maximum size of the stack (hence the naming
-		of this configuration value).
-
-config TLS_NELEM
-	int "Number of TLS elements"
-	default 1
-	---help---
-		The number of unique TLS elements.  These can be accessed with
-		the user library functions tls_get_element() and tls_set_element().
-
-endif # TLS
-
-config LIBC_NETDB
-	bool
-	default n
-
-menuconfig NETDB_HOSTFILE
-	bool "Network host file support"
-	default n
-	depends on FS_READABLE
-	select LIBC_NETDB
-	---help---
-		Enable network host table look ups via gethostbyname() and
-		gethostbyaddr().
-
-if NETDB_HOSTFILE
-
-config NETDB_HOSTCONF_PATH
-	string "Path to host configuration file"
-	default "/etc/hosts"
-
-config NETDB_MAX_ALTNAMES
-	int "Max number of alternate host names"
-	default 4
-
-config NETDB_BUFSIZE
-	int "gethostname() buffer size"
-	default 128
-
-endif # NETDB_HOSTFILE
-
-menuconfig NETDB_DNSCLIENT
-	bool "DNS Name resolution"
-	default n
-	depends on NET && NET_UDP
-	select LIBC_NETDB
-	---help---
-		Enable support for the name resolution; Enable network host
-		resolution via gethostbyname().
-
-if NETDB_DNSCLIENT
-
-config NETDB_DNSCLIENT_ENTRIES
-	int "Number of DNS resolver entries"
-	default 0 if DEFAULT_SMALL
-	default 8 if !DEFAULT_SMALL
-	range 0 255
-	---help---
-		Number of cached DNS resolver entries.  Default: 8.  Zero disables
-		all cached name resolutions.
-
-		Disabling the DNS cache means that each access call to
-		gethostbyname() will result in a new DNS network query.  If
-		CONFIG_NETDB_DNSCLIENT_ENTRIES is non-zero, then entries will be
-		cached and if the name mapping can be found in that cache, the
-		network query can be avoid.  Of course, this is only useful if you
-		query the same name often and if the IP address of the name is
-		stable.  If the IP address can change, then cachin DNS address
-		might have undesirable side-effects (see help for
-		CONFIG_NETDB_DNSCLIENT_LIFESEC).
-
-config NETDB_DNSCLIENT_NAMESIZE
-	int "Max size of a cached hostname"
-	default 32
-	---help---
-		The size of a hostname string in the DNS resolver cache is fixed.
-		This setting provides the maximum size of a hostname.  Names longer
-		than this will be aliased!  Default: 32
-
-config NETDB_DNSCLIENT_LIFESEC
-	int "Life of a DNS cache entry (seconds)"
-	default 3600
-	---help---
-		Cached entries in the name resolution cache older than this will not
-		be used.  Default: 1 hour.  Zero means that entries will not expire.
-
-		Small values of CONFIG_NETDB_DNSCLIENT_LIFESEC may result in more
-		network DNS queries; larger values can make a host unreachable for
-		the entire duration of the timeout value.  This might happen, for
-		example, if the remote host was assigned a different IP address by
-		a DHCP server.
-
-config NETDB_DNSCLIENT_MAXRESPONSE
-	int "Max response size"
-	default 96
-	---help---
-		This setting determines the maximum size of response message that
-		can be received by the DNS resolver.  The default is 96 but may
-		need to be larger on enterprise networks (perhaps 176).
-
-
-config NETDB_RESOLVCONF
-	bool "DNS resolver file support"
-	default n
-	depends on FS_READABLE
-	---help---
-		Enable DNS server look ups in resolver file like /etc/resolv.conf.
-
-if NETDB_RESOLVCONF
-
-config NETDB_RESOLVCONF_PATH
-	string "Path to host configuration file"
-	default "/etc/resolv.conf"
-
-config NETDB_RESOLVCONF_NONSTDPORT
-	bool "Non-standard port support"
-	default n
-	---help---
-		By default, the resolv.conf file will hold only records like:
-
-			nameserver xx.xx.xx.xx
-			nameserver xxxx:::::::xxxx
-
-		The default port of 53 is always assumed.
-
-		If this option is selected, then OpenBSD style resolv.conf files
-		will be supported.  This adds logic for a bracket port notation
-		like:
-
-			nameserver [xx.xx.xx.xx]:ppppp
-			nameserver [xxxx:::::::xxxx]:ppppp
-
-endif # NETDB_RESOLVCONF
-
-choice
-	prompt "DNS server address type"
-	default NETDB_DNSSERVER_IPv4 if NET_IPv4
-	default NETDB_DNSSERVER_IPv6 if !NET_IPv4 && NET_IPv6
-	default NETDB_DNSSERVER_NOADDR if !NET_IPv4 && !NET_IPv6
-	depends on !NETDB_RESOLVCONF
-
-config NETDB_DNSSERVER_NOADDR
-	bool "No default DNS server address"
-	---help---
-		There is not default DNS nameserver address.  Application must call
-		dns_add_server() at runtime to add the DNS server address.
-
-config NETDB_DNSSERVER_IPv4
-	bool "IPv4 DNS server address"
-	depends on NET_IPv4
-	---help---
-		An IPv4 default DNS nameserver address will be provided.  Application
-		may overwrite this start default server address by calling
-		dns_add_server() at runtime.
-
-config NETDB_DNSSERVER_IPv6
-	bool "IPv6 DNS server address"
-	depends on NET_IPv6
-	---help---
-		An IPv6 default DNS nameserver address will be provided.  Application
-		may overwrite this start default server address by calling
-		dns_add_server() at runtime.
-
-endchoice # DNS server address type
-
-config NETDB_DNSSERVER_IPv4ADDR
-	hex "Target IPv4 address"
-	default 0x0a000001
-	depends on NETDB_DNSSERVER_IPv4
-	---help---
-		Default DNS server IPv4 address in host byte order.  Default value
-		10.0.0.0.1.  This may be changed via dns_add_nameserver().
-
-if NETDB_DNSSERVER_IPv6
-
-config NETDB_DNSSERVER_IPv6ADDR_1
-	hex "[0]"
-	default 0xfc00
-	range 0x0 0xffff
-	---help---
-		This is the default IP address of the DNS server.  This is a 16-bit
-		integer value in host order.  Each of the eight values forming the
-		full IPv6 address must be specified individually.  This is the first
-		of the 8-values.  The default for all eight values is fc00::1.
-
-config NETDB_DNSSERVER_IPv6ADDR_2
-	hex "[1]"
-	default 0x0000
-	range 0x0 0xffff
-	---help---
-		This is the default IP address of the DNS server.  This is a 16-bit
-		integer value in host order.  Each of the eight values forming the
-		full IPv6 address must be specified individually.  This is the second
-		of the 8-values.  The default for all eight values is fc00::1.
-
-config NETDB_DNSSERVER_IPv6ADDR_3
-	hex "[2]"
-	default 0x0000
-	range 0x0 0xffff
-	---help---
-		This is the default IP address of the DNS server.  This is a 16-bit
-		integer value in host order.  Each of the eight values forming the
-		full IPv6 address must be specified individually.  This is the third
-		of the 8-values.  The default for all eight values is fc00::1.
-
-config NETDB_DNSSERVER_IPv6ADDR_4
-	hex "[3]"
-	default 0x0000
-	range 0x0 0xffff
-	---help---
-		This is the default IP address of the DNS server.  This is a 16-bit
-		integer value in host order.  Each of the eight values forming the
-		full IPv6 address must be specified individually.  This is the fourth
-		of the 8-values.  The default for all eight values is fc00::1.
-
-config NETDB_DNSSERVER_IPv6ADDR_5
-	hex "[4]"
-	default 0x0000
-	range 0x0 0xffff
-	---help---
-		This is the default IP address of the DNS server.  This is a 16-bit
-		integer value in host order.  Each of the eight values forming the
-		full IPv6 address must be specified individually.  This is the fifth
-		of the 8-values.  The default for all eight values is fc00::1.
-
-config NETDB_DNSSERVER_IPv6ADDR_6
-	hex "[5]"
-	default 0x0000
-	range 0x0 0xffff
-	---help---
-		This is the default IP address of the DNS server.  This is a 16-bit
-		integer value in host order.  Each of the eight values forming the
-		full IPv6 address must be specified individually.  This is the sixth
-		of the 8-values.  The default for all eight values is fc00::1.
-
-config NETDB_DNSSERVER_IPv6ADDR_7
-	hex "[6]"
-	default 0x0000
-	range 0x0 0xffff
-	---help---
-		This is the default IP address of the DNS server.  This is a 16-bit
-		integer value in host order.  Each of the eight values forming the
-		full IPv6 address must be specified individually.  This is the seventh
-		of the 8-values.  The default for all eight values is fc00::1.
-
-config NETDB_DNSSERVER_IPv6ADDR_8
-	hex "[7]"
-	default 0x0001
-	range 0x0 0xffff
-	---help---
-		This is the default IP address of the DNS server.  This is a 16-bit
-		integer value in host order.  Each of the eight values forming the
-		full IPv6 address must be specified individually.  This is the last
-		of the 8-values.  The default for all eight values is fc00::1.
-
-endif # NETDB_DNSSERVER_IPv6
-endif # NETDB_DNSCLIENT
-
-comment "Non-standard Library Support"
-
-if BUILD_PROTECTED || BUILD_KERNEL
-
-config LIB_USRWORK
-	bool "User mode worker thread"
-	default n
-	depends on !DISABLE_SIGNALS
-	---help---
-		User space work queues can also be made available for deferred
-		processing in the NuttX kernel build.
-
-if LIB_USRWORK
-
-config LIB_USRWORKPRIORITY
-	int "User mode priority worker thread priority"
-	default 100
-	---help---
-		The execution priority of the user-mode priority worker thread.  Default: 100
-
-config LIB_USRWORKPERIOD
-	int "User mode worker thread period"
-	default 100000
-	---help---
-		How often the lower priority worker thread checks for work in units
-		of microseconds. Default: 100*1000 (100 MS).
-
-config LIB_USRWORKSTACKSIZE
-	int "User mode worker thread stack size"
-	default 2048
-	---help---
-		The stack size allocated for the lower priority worker thread.  Default: 2K.
-
-endif # LIB_USRWORK
-endif # BUILD_PROTECTED || BUILD_KERNEL
-
-config LIB_KBDCODEC
-	bool "Keyboard CODEC"
-	default n
-	---help---
-		In NuttX, a keyboard/keypad driver is simply a character driver that
-		may have an (optional) encoding/decoding layer on the data returned
-		by the character driver. A keyboard may return simple text data
-		(alphabetic, numeric, and punctuaction) or control characters
-		(enter, control-C, etc.).  However, in addition, most keyboards
-		support actions that cannot be represented as text data. Such
-		actions include things like cursor controls (home, up arrow,
-		page down, etc.), editing functions (insert, delete, etc.), volume
-		controls, (mute, volume up, etc.) and other special functions.
-		Some special encoding may be required to multiplex these two classes
-		of data.
-
-		This option enables the functions that implement the encoding and
-		decoding of keyboard data.  These are the interfaces prototyped in
-		include/nuttx/input/kbd_codec.h.  While not correctly a part of
-		the C library, it is included here because the decoding side of this
-		interface must be accessible by end user programs.
-
-config LIB_SLCDCODEC
-	bool "Segment LCD CODEC"
-	default n
-	---help---
-		In NuttX, a character-oriented, segment LCD (SLCD) driver is simply
-		a character device that may have an (optional) encoding/decoding
-		layer on the data provided to the SLCD driver.  The application may
-		provide simple text data (alphabetic, numeric, and punctuaction) or
-		control characters (enter, control-C, etc.).  However, in addition,
-		most SLCDs support actions that cannot be represented as text data.
-		Such actions include things like cursor controls (home, up arrow,
-		page down, etc.) and other special functions (e.g., blinking).  Some
-		special encoding may be required to multiplex these two classes of
-		data.
-
-		This option enables the functions that implement the encoding and
-		decoding of SLCD data.  These are the interfaces prototyped in
-		include/nuttx/lcd/slcd_codec.h.  While not correctly a part of the C
-		library, it is included here because the encoding side of this
-		interface must be accessible by end user programs.
+source libc/machine/Kconfig
+source libc/stdlib/Kconfig
+source libc/unistd/Kconfig
+source libc/string/Kconfig
+source libc/dllfcn/Kconfig
+source libc/modlib/Kconfig
+source libc/wchar/Kconfig
+source libc/locale/Kconfig
+source libc/time/Kconfig
+source libc/tls/Kconfig
+source libc/net/Kconfig
+source libc/netdb/Kconfig
+source libc/misc/Kconfig
+source libc/wqueue/Kconfig
+source libc/hex2bin/Kconfig
diff --git a/libc/Makefile b/libc/Makefile
index f07366f07687fc4f519839f2ee8316323cd7a75c..4b23e458c1b5f2774fefa50f80e185e0ed551711 100644
--- a/libc/Makefile
+++ b/libc/Makefile
@@ -1,7 +1,7 @@
 ############################################################################
 # libc/Makefile
 #
-#   Copyright (C) 2007-2014 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2007-2014, 2016-2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -64,10 +64,16 @@ VPATH := .
 include aio/Make.defs
 include audio/Make.defs
 include dirent/Make.defs
+include dllfcn/Make.defs
 include fixedmath/Make.defs
+include hex2bin/Make.defs
+include inttypes/Make.defs
 include libgen/Make.defs
+include locale/Make.defs
+include machine/Make.defs
 include math/Make.defs
 include misc/Make.defs
+include modlib/Make.defs
 include net/Make.defs
 include netdb/Make.defs
 include pthread/Make.defs
@@ -85,6 +91,8 @@ include termios/Make.defs
 include time/Make.defs
 include tls/Make.defs
 include unistd/Make.defs
+include wchar/Make.defs
+include wctype/Make.defs
 include wqueue/Make.defs
 
 # REVISIT: Backslash causes problems in $(COBJS) target
@@ -116,6 +124,9 @@ $(COBJS): $(BINDIR)$(DELIM)%$(OBJEXT): %.c
 
 $(BIN): $(OBJS)
 	$(call ARCHIVE, $@, $(OBJS))
+ifeq ($(CONFIG_LIB_ZONEINFO_ROMFS),y)
+	$(Q) $(MAKE) -C zoneinfo all TOPDIR=$(TOPDIR) BIN=$(BIN)
+endif
 
 # C library for the user phase of the two-pass kernel build
 
@@ -131,6 +142,13 @@ $(KBIN):
 	$(Q) $(MAKE) $(KBIN) BIN=$(KBIN) BINDIR=kbin TOPDIR=$(TOPDIR) EXTRADEFINES=$(EXTRADEFINES)
 endif
 
+# Context
+
+context:
+ifeq ($(CONFIG_LIB_ZONEINFO_ROMFS),y)
+	$(Q) $(MAKE) -C zoneinfo context TOPDIR=$(TOPDIR) BIN=$(BIN)
+endif
+
 # Dependencies
 
 .depend: Makefile $(SRCS)
@@ -139,6 +157,9 @@ ifeq ($(CONFIG_BUILD_PROTECTED),y)
 	$(Q) $(MKDEP) --obj-path kbin --obj-suffix $(OBJEXT) $(DEPPATH) "$(CC)" -- $(CFLAGS) $(KDEFINE) -- $(SRCS) >Make_kbin.dep
 else
 	$(Q) $(MKDEP) --obj-path bin --obj-suffix $(OBJEXT) $(DEPPATH) "$(CC)" -- $(CFLAGS) -- $(SRCS) >Make_bin.dep
+endif
+ifeq ($(CONFIG_LIB_ZONEINFO_ROMFS),y)
+	$(Q) $(MAKE) -C zoneinfo depend TOPDIR=$(TOPDIR) BIN=$(BIN)
 endif
 	$(Q) touch $@
 
@@ -150,6 +171,7 @@ clean:
 	$(Q) $(MAKE) -C bin  clean TOPDIR=$(TOPDIR)
 	$(Q) $(MAKE) -C ubin clean TOPDIR=$(TOPDIR)
 	$(Q) $(MAKE) -C kbin clean TOPDIR=$(TOPDIR)
+	$(Q) $(MAKE) -C zoneinfo clean TOPDIR=$(TOPDIR) BIN=$(BIN)
 	$(call DELFILE, $(BIN))
 	$(call DELFILE, $(UBIN))
 	$(call DELFILE, $(KBIN))
@@ -161,6 +183,7 @@ distclean: clean
 	$(Q) $(MAKE) -C bin  distclean TOPDIR=$(TOPDIR)
 	$(Q) $(MAKE) -C ubin distclean TOPDIR=$(TOPDIR)
 	$(Q) $(MAKE) -C kbin distclean TOPDIR=$(TOPDIR)
+	$(Q) $(MAKE) -C zoneinfo distclean TOPDIR=$(TOPDIR) BIN=$(BIN)
 	$(call DELFILE, Make_bin.dep)
 	$(call DELFILE, Make_ubin.dep)
 	$(call DELFILE, Make_kbin.dep)
diff --git a/libc/README.txt b/libc/README.txt
index 6ccc1dd53bc3685b0baa02789c35f331e04b86e6..4184aa71a812744497f26e8aa8502c9240a37941 100644
--- a/libc/README.txt
+++ b/libc/README.txt
@@ -29,9 +29,15 @@ in the include/ directory provides the prototype for library functions.  So
 we have:
 
   audio     - This part of the audio system: nuttx/audio/audio.h
+  dllfcn    - dllfcn.h
+  hex2bin   - hex2bin.h
   libgen    - libgen.h
+  locale    - locale.h
   fixedmath - fixedmath.h
+  inttypes  - inttypes.h
+  machine   - Various architecture-specifica implementations.
   math      - math.h
+  modlib    - Part of module and shared libary logic: nuttx/lib/modlib.h
   net       - Various network-related header files: netinet/ether.h, arpa/inet.h
   pthread   - pthread.h
   queue     - queue.h
@@ -39,9 +45,14 @@ we have:
   semaphore - semaphore.h
   stdio     - stdio.h
   stdlib    - stdlib.h
-  string    - string.h
+  string    - string.h (and legacy strings.h)
   time      - time.h
   unistd    - unistd.h
+  wchar     - wchar.h
+  wctype    - wctype.h
+
+Most of these are "standard" header files; some are not: hex2bin.h and
+fixemath.h are non-standard.
 
 There is also a misc/ subdirectory that contains various internal functions
 and interfaces from header files that are too few to warrant their own sub-
diff --git a/libc/aio/aio.h b/libc/aio/aio.h
index f28340f3c2f9d3f04aa2d1df6a7a6a1e43891605..f61e6908f5972ba2465e1d9f9d6b556a9770471a 100644
--- a/libc/aio/aio.h
+++ b/libc/aio/aio.h
@@ -69,5 +69,10 @@ extern "C"
  * Public Function Prototypes
  ****************************************************************************/
 
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
 #endif /* CONFIG_FS_AIO */
 #endif /* __LIBC_AIO_AIO_H */
diff --git a/libc/aio/aio_suspend.c b/libc/aio/aio_suspend.c
index 948462cd909b5e314db1245fc20dec075291b442..34b7e4a72bd3828ea4d55d05d7d024b64484bdd5 100644
--- a/libc/aio/aio_suspend.c
+++ b/libc/aio/aio_suspend.c
@@ -47,27 +47,6 @@
 
 #ifdef CONFIG_FS_AIO
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-/* Configuration ************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libc/aio/lio_listio.c b/libc/aio/lio_listio.c
index b123a4e7357d3f984ee8cc4259279afe11a10c9e..fa03c38f62b2e65ab593a3d1d7757efa889c71e3 100644
--- a/libc/aio/lio_listio.c
+++ b/libc/aio/lio_listio.c
@@ -255,7 +255,7 @@ static int lio_sigsetup(FAR struct aiocb * const *list, int nent,
   sighand = (FAR struct lio_sighand_s *)lib_zalloc(sizeof(struct lio_sighand_s));
   if (!sighand)
     {
-      fdbg("ERROR: lib_zalloc failed\n");
+      ferr("ERROR: lib_zalloc failed\n");
       return -ENOMEM;
     }
 
@@ -296,7 +296,7 @@ static int lio_sigsetup(FAR struct aiocb * const *list, int nent,
   if (status != OK)
     {
       int errcode = get_errno();
-      fdbg("ERROR sigprocmask failed: %d\n", errcode);
+      ferr("ERROR sigprocmask failed: %d\n", errcode);
       DEBUGASSERT(errcode > 0);
       return -errcode;
     }
@@ -314,7 +314,7 @@ static int lio_sigsetup(FAR struct aiocb * const *list, int nent,
   if (status != OK)
     {
       int errcode = get_errno();
-      fdbg("ERROR sigaction failed: %d\n", errcode);
+      ferr("ERROR sigaction failed: %d\n", errcode);
       DEBUGASSERT(errcode > 0);
       return -errcode;
     }
@@ -379,7 +379,7 @@ static int lio_waitall(FAR struct aiocb * const *list, int nent)
            */
 
           int errcode = get_errno();
-          fdbg("ERROR: sigwaitinfo failed: %d\n", errcode);
+          ferr("ERROR: sigwaitinfo failed: %d\n", errcode);
           DEBUGASSERT(errcode > 0);
           return -errcode;
         }
@@ -600,7 +600,7 @@ int lio_listio(int mode, FAR struct aiocb *const list[], int nent,
                     /* Failed to queue the I/O.  Set up the error return. */
 
                     errcode = get_errno();
-                    fdbg("ERROR: aio_read/write failed: %d\n", errcode);
+                    ferr("ERROR: aio_read/write failed: %d\n", errcode);
                     DEBUGASSERT(errcode > 0);
                     aiocbp->aio_result = -errcode;
                     ret = ERROR;
@@ -618,7 +618,7 @@ int lio_listio(int mode, FAR struct aiocb *const list[], int nent,
               {
                 /* Make the invalid operation complete with an error */
 
-                fdbg("ERROR: Unrecognized opcode: %d\n", aiocbp->aio_lio_opcode);
+                ferr("ERROR: Unrecognized opcode: %d\n", aiocbp->aio_lio_opcode);
                 aiocbp->aio_result = -EINVAL;
                 ret = ERROR;
               }
diff --git a/libc/audio/lib_buffer.c b/libc/audio/lib_buffer.c
index af4e719879e649246856b2d7105a7b0b3113aa36..6ad506aa6e58b1b03c72f6349d6d06da3587e83c 100644
--- a/libc/audio/lib_buffer.c
+++ b/libc/audio/lib_buffer.c
@@ -174,7 +174,7 @@ void apb_free(FAR struct ap_buffer_s *apb)
 
   if (refcount <= 1)
     {
-      audvdbg("Freeing %p\n", apb);
+      audinfo("Freeing %p\n", apb);
       lib_ufree(apb);
     }
 }
diff --git a/libc/dllfcn/Kconfig b/libc/dllfcn/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..33e017246adaf69e8ac9cb10c7c2fb884b7fd821
--- /dev/null
+++ b/libc/dllfcn/Kconfig
@@ -0,0 +1,20 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+# menu "Shared Library Support"
+
+config LIBC_DLLFCN
+	bool "Shared library support"
+	default n
+	select LIBC_ARCH_ELF
+	select LIBC_MODLIB if !BUILD_KERNEL
+	select MODULE if BUILD_FLAT
+	depends on EXPERIMENTAL || !BUILD_KERNEL
+	---help---
+		Enabled support for user-space shared libraries.
+
+		A work in progress, hence, marked EXPERIMENTAL
+
+# endmenu # Shared Library Support
diff --git a/libc/dllfcn/Make.defs b/libc/dllfcn/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..aa92ba52290ce6cb5c102116ad7cc590c76fe39a
--- /dev/null
+++ b/libc/dllfcn/Make.defs
@@ -0,0 +1,47 @@
+############################################################################
+# libc/dllfcn/Make.defs
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+ifeq ($(CONFIG_LIBC_DLLFCN),y)
+
+# Add the dllfcn.h files to the build
+
+CSRCS += lib_dlopen.c lib_dlclose.c lib_dlsym.c lib_dlerror.c lib_dlsymtab.c
+
+# Add the dllfcn.h directory to the build
+
+DEPPATH += --dep-path dllfcn
+VPATH += :dllfcn
+
+endif
diff --git a/libc/dllfcn/lib_dlclose.c b/libc/dllfcn/lib_dlclose.c
new file mode 100644
index 0000000000000000000000000000000000000000..4a84457823dc79e478007ad9ca55100001afdc84
--- /dev/null
+++ b/libc/dllfcn/lib_dlclose.c
@@ -0,0 +1,251 @@
+/****************************************************************************
+ * libc/dllfcn/lib_dlclose.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "libc.h"
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: dlremove
+ *
+ * Description:
+ *   Remove a previously installed shared library from memory.
+ *
+ * Input Parameters:
+ *   handle - The shared library handle previously returned by dlopen().
+ *
+ * Returned Value:
+ *   Zero (OK) on success.  On any failure, -1 (ERROR) is returned the
+ *   errno value is set appropriately.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BUILD_PROTECTED
+static inline int dlremove(FAR void *handle)
+{
+  FAR struct module_s *modp = (FAR struct module_s *)handle;
+  int ret;
+
+  DEBUGASSERT(modp != NULL);
+
+  /* Get exclusive access to the module registry */
+
+  modlib_registry_lock();
+
+  /* Verify that the module is in the registry */
+
+  ret = modlib_registry_verify(modp);
+  if (ret < 0)
+    {
+      serr("ERROR: Failed to verify module: %d\n", ret);
+      goto errout_with_lock;
+    }
+
+#if CONFIG_MODLIB_MAXDEPEND > 0
+  /* Refuse to remove any module that other modules may depend upon. */
+
+  if (modp->dependents > 0)
+    {
+      serr("ERROR: Module has dependents: %d\n", modp->dependents);
+      ret = -EBUSY;
+      goto errout_with_lock;
+    }
+#endif
+
+  /* Is there an uninitializer? */
+
+  if (modp->modinfo.uninitializer != NULL)
+    {
+      /* Try to uninitialize the module */
+
+      ret = modp->modinfo.uninitializer(modp->modinfo.arg);
+
+      /* Did the module sucessfully uninitialize? */
+
+      if (ret < 0)
+        {
+          serr("ERROR: Failed to uninitialize the module: %d\n", ret);
+          goto errout_with_lock;
+        }
+
+      /* Nullify so that the uninitializer cannot be called again */
+
+      modp->modinfo.uninitializer = NULL;
+#if defined(CONFIG_FS_PROCFS) && !defined(CONFIG_FS_PROCFS_EXCLUDE_MODULE)
+      modp->initializer           = NULL;
+      modp->modinfo.arg           = NULL;
+      modp->modinfo.exports       = NULL;
+      modp->modinfo.nexports      = 0;
+#endif
+    }
+
+  /* Release resources held by the module */
+
+  if (modp->alloc != NULL)
+    {
+      /* Free the module memory */
+
+      lib_free((FAR void *)modp->alloc);
+
+      /* Nullify so that the memory cannot be freed again */
+
+      modp->alloc = NULL;
+#if defined(CONFIG_FS_PROCFS) && !defined(CONFIG_FS_PROCFS_EXCLUDE_MODULE)
+      modp->textsize  = 0;
+      modp->datasize  = 0;
+#endif
+    }
+
+  /* Remove the module from the registry */
+
+  ret = modlib_registry_del(modp);
+  if (ret < 0)
+    {
+      serr("ERROR: Failed to remove the module from the registry: %d\n", ret);
+      goto errout_with_lock;
+    }
+
+#if CONFIG_MODLIB_MAXDEPEND > 0
+  /* Eliminate any dependencies that this module has on other modules */
+
+  (void)modlib_undepend(modp);
+#endif
+  modlib_registry_unlock();
+
+  /* And free the registry entry */
+
+  lib_free(modp);
+  return OK;
+
+errout_with_lock:
+  modlib_registry_unlock();
+  set_errno(-ret);
+  return ERROR;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: dlclose
+ *
+ * Description:
+ *   dlclose() is used to inform the system that the object referenced by a
+ *   handle returned from a previous dlopen() invocation is no longer needed
+ *   by the application.
+ *
+ *   The use of dlclose() reflects a statement of intent on the part of the
+ *   process, but does not create any requirement upon the implementation,
+ *   such as removal of the code or symbols referenced by handle. Once an
+ *   object has been closed using dlclose() an application should assume
+ *   that its symbols are no longer available to dlsym(). All objects loaded
+ *   automatically as a result of invoking dlopen() on the referenced object
+ *   are also closed.
+ *
+ *   Although a dlclose() operation is not required to remove structures
+ *   from an address space, neither is an implementation prohibited from
+ *   doing so. The only restriction on such a removal is that no object will
+ *   be removed to which references have been relocated, until or unless all
+ *   such references are removed. For instance, an object that had been
+ *   loaded with a dlopen() operation specifying the RTLD_GLOBAL flag might
+ *   provide a target for dynamic relocations performed in the processing of
+ *   other objects - in such environments, an application may assume that no
+ *   relocation, once made, will be undone or remade unless the object
+ *   requiring the relocation has itself been removed.
+ *
+ * Input Parameters:
+ *   handle - The opaque, non-NULL value returned by a previous successful
+ *            call to dlopen().
+ *
+ * Returned Value:
+ *   If the referenced object was successfully closed, dlclose() returns 0.
+ *   If the object could not be closed, or if handle does not refer to an
+ *   open object, dlclose() returns a non-zero value. More detailed
+ *   diagnostic information will be available through dlerror().
+ *
+ * Reference: OpenGroup.org
+ *
+ ****************************************************************************/
+
+int dlclose(FAR void *handle)
+{
+#if defined(CONFIG_BUILD_FLAT)
+  /* In the FLAT build, a shared library is essentially the same as a kernel
+   * module.
+   */
+
+  return rmmod(handle);
+
+#elif defined(CONFIG_BUILD_PROTECTED)
+  /* The PROTECTED build is equivalent to the FLAT build EXCEPT that there
+   * must be two copies of the module logic:  One residing in kernel
+   * space and using the kernel symbol table and one residing in user space
+   * using the user space symbol table.
+   *
+   * dlremove() is essentially a clone of rmmod().
+   */
+
+  return dlremove(handle);
+
+#else /* if defined(CONFIG_BUILD_KERNEL) */
+  /* The KERNEL build is considerably more complex:  In order to be shared,
+   * the .text portion of the module must be (1) build for PIC/PID operation
+   * and (2) must like in a shared memory region accessible from all
+   * processes.  The .data/.bss portion of the module must be allocated in
+   * the user space of each process, but must lie at the same virtual address
+   * so that it can be referenced from the one copy of the text in the shared
+   * memory region.
+   */
+
+#warning Missing logic
+  return -ENOSYS;
+#endif
+}
diff --git a/libc/dllfcn/lib_dlerror.c b/libc/dllfcn/lib_dlerror.c
new file mode 100644
index 0000000000000000000000000000000000000000..21b61367d658b24c0e4dd0821c6625508e0b51ca
--- /dev/null
+++ b/libc/dllfcn/lib_dlerror.c
@@ -0,0 +1,73 @@
+/****************************************************************************
+ * libc/dllfcn/lib_dlerror.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: dlerror
+ *
+ * Description:
+ *   dlerror() returns a null-terminated character string (with no trailing
+ *   newline) that describes the last error that occurred during dynamic
+ *   linking processing. If no dynamic linking errors have occurred since
+ *   the last invocation of dlerror(), dlerror() returns NULL. Thus,
+ *   invoking dlerror() a second time, immediately following a prior
+ *   invocation, will result in NULL being returned.
+ *
+ * Input Parameters:
+ *   If successful, dlerror() returns a null-terminated character string.
+ *   Otherwise, NULL is returned.
+ *
+ * Returned Value:
+ *
+ * Reference: OpenGroup.org
+ *
+ ****************************************************************************/
+
+FAR char *dlerror(void)
+{
+#warning Missing logic
+  return NULL;
+}
\ No newline at end of file
diff --git a/libc/dllfcn/lib_dlopen.c b/libc/dllfcn/lib_dlopen.c
new file mode 100644
index 0000000000000000000000000000000000000000..7c5c7fd6454de136af9988299a96e31394e29b2e
--- /dev/null
+++ b/libc/dllfcn/lib_dlopen.c
@@ -0,0 +1,425 @@
+/****************************************************************************
+ * libc/dllfcn/lib_dlopen.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "libc.h"
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: dldump_loadinfo
+ ****************************************************************************/
+
+#ifdef CONFIG_BUILD_PROTECTED
+#if defined(CONFIG_DEBUG_INFO) && defined(CONFIG_DEBUG_BINFMT)
+static void dldump_loadinfo(FAR struct mod_loadinfo_s *loadinfo)
+{
+  int i;
+
+  binfo("LOAD_INFO:\n");
+  binfo("  textalloc:    %08lx\n", (long)loadinfo->textalloc);
+  binfo("  datastart:    %08lx\n", (long)loadinfo->datastart);
+  binfo("  textsize:     %ld\n",   (long)loadinfo->textsize);
+  binfo("  datasize:     %ld\n",   (long)loadinfo->datasize);
+  binfo("  filelen:      %ld\n",   (long)loadinfo->filelen);
+  binfo("  filfd:        %d\n",    loadinfo->filfd);
+  binfo("  symtabidx:    %d\n",    loadinfo->symtabidx);
+  binfo("  strtabidx:    %d\n",    loadinfo->strtabidx);
+
+  binfo("ELF Header:\n");
+  binfo("  e_ident:      %02x %02x %02x %02x\n",
+    loadinfo->ehdr.e_ident[0], loadinfo->ehdr.e_ident[1],
+    loadinfo->ehdr.e_ident[2], loadinfo->ehdr.e_ident[3]);
+  binfo("  e_type:       %04x\n",  loadinfo->ehdr.e_type);
+  binfo("  e_machine:    %04x\n",  loadinfo->ehdr.e_machine);
+  binfo("  e_version:    %08x\n",  loadinfo->ehdr.e_version);
+  binfo("  e_entry:      %08lx\n", (long)loadinfo->ehdr.e_entry);
+  binfo("  e_phoff:      %d\n",    loadinfo->ehdr.e_phoff);
+  binfo("  e_shoff:      %d\n",    loadinfo->ehdr.e_shoff);
+  binfo("  e_flags:      %08x\n" , loadinfo->ehdr.e_flags);
+  binfo("  e_ehsize:     %d\n",    loadinfo->ehdr.e_ehsize);
+  binfo("  e_phentsize:  %d\n",    loadinfo->ehdr.e_phentsize);
+  binfo("  e_phnum:      %d\n",    loadinfo->ehdr.e_phnum);
+  binfo("  e_shentsize:  %d\n",    loadinfo->ehdr.e_shentsize);
+  binfo("  e_shnum:      %d\n",    loadinfo->ehdr.e_shnum);
+  binfo("  e_shstrndx:   %d\n",    loadinfo->ehdr.e_shstrndx);
+
+  if (loadinfo->shdr && loadinfo->ehdr.e_shnum > 0)
+    {
+      for (i = 0; i < loadinfo->ehdr.e_shnum; i++)
+        {
+          FAR Elf32_Shdr *shdr = &loadinfo->shdr[i];
+          binfo("Sections %d:\n", i);
+          binfo("  sh_name:      %08x\n", shdr->sh_name);
+          binfo("  sh_type:      %08x\n", shdr->sh_type);
+          binfo("  sh_flags:     %08x\n", shdr->sh_flags);
+          binfo("  sh_addr:      %08x\n", shdr->sh_addr);
+          binfo("  sh_offset:    %d\n",   shdr->sh_offset);
+          binfo("  sh_size:      %d\n",   shdr->sh_size);
+          binfo("  sh_link:      %d\n",   shdr->sh_link);
+          binfo("  sh_info:      %d\n",   shdr->sh_info);
+          binfo("  sh_addralign: %d\n",   shdr->sh_addralign);
+          binfo("  sh_entsize:   %d\n",   shdr->sh_entsize);
+        }
+    }
+}
+#else
+# define dldump_loadinfo(i)
+#endif
+#endif
+
+/****************************************************************************
+ * Name: dldump_initializer
+ ****************************************************************************/
+
+#ifdef CONFIG_BUILD_PROTECTED
+#ifdef CONFIG_MODLIB_DUMPBUFFER
+static void dldump_initializer(mod_initializer_t initializer,
+                               FAR struct mod_loadinfo_s *loadinfo)
+{
+  modlib_dumpbuffer("Initializer code", (FAR const uint8_t *)initializer,
+                    MIN(loadinfo->textsize - loadinfo->ehdr.e_entry, 512));
+}
+#else
+# define dldump_initializer(b,l)
+#endif
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: dlinsert
+ *
+ * Description:
+ *   Verify that the file is an ELF module binary and, if so, load the
+ *   shared library into user memory and initialize it for use.
+ *
+ *   NOTE: modlib_setsymtab() had to have been called by application logic
+ *   logic prior to calling this.  Otherwise, dlinsert will be unable to
+ *   resolve symbols in the OS module.
+ *
+ * Input Parameters:
+ *   filename - Full path to the shared library file to be loaded
+ *
+ * Returned Value:
+ *   A non-NULL module handle that can be used on subsequent calls to other
+ *   shared library interfaces is returned on success.  If insmod() was
+ *   unable to load the module insmod() will return a NULL handle and the
+ *   errno variable will be set appropriately.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BUILD_PROTECTED
+static inline FAR void *dlinsert(FAR const char *filename)
+{
+  struct mod_loadinfo_s loadinfo;
+  FAR struct module_s *modp;
+  mod_initializer_t initializer;
+  int ret;
+
+  binfo("Loading file: %s\n", filename);
+
+  /* Get exclusive access to the module registry */
+
+  modlib_registry_lock();
+
+  /* Initialize the ELF library to load the program binary. */
+
+  ret = modlib_initialize(filename, &loadinfo);
+  dldump_loadinfo(&loadinfo);
+  if (ret != 0)
+    {
+      serr("ERROR: Failed to initialize to load module: %d\n", ret);
+      goto errout_with_lock;
+    }
+
+  /* Allocate a module registry entry to hold the module data */
+
+  modp = (FAR struct module_s *)lib_zalloc(sizeof(struct module_s));
+  if (ret != 0)
+    {
+      binfo("Failed to initialize for load of ELF program: %d\n", ret);
+      goto errout_with_loadinfo;
+    }
+
+  /* Load the program binary */
+
+  ret = modlib_load(&loadinfo);
+  dldump_loadinfo(&loadinfo);
+  if (ret != 0)
+    {
+      binfo("Failed to load ELF program binary: %d\n", ret);
+      goto errout_with_registry_entry;
+    }
+
+  /* Bind the program to the kernel symbol table */
+
+  ret = modlib_bind(modp, &loadinfo);
+  if (ret != 0)
+    {
+      binfo("Failed to bind symbols program binary: %d\n", ret);
+      goto errout_with_load;
+    }
+
+  /* Save the load information */
+
+  modp->alloc       = (FAR void *)loadinfo.textalloc;
+#if defined(CONFIG_FS_PROCFS) && !defined(CONFIG_FS_PROCFS_EXCLUDE_MODULE)
+  modp->textsize    = loadinfo.textsize;
+  modp->datasize    = loadinfo.datasize;
+#endif
+
+  /* Get the module initializer entry point */
+
+  initializer = (mod_initializer_t)(loadinfo.textalloc + loadinfo.ehdr.e_entry);
+#if defined(CONFIG_FS_PROCFS) && !defined(CONFIG_FS_PROCFS_EXCLUDE_MODULE)
+  modp->initializer = initializer;
+#endif
+  dldump_initializer(initializer, &loadinfo);
+
+  /* Call the module initializer */
+
+  ret = initializer(&modp->modinfo);
+  if (ret < 0)
+    {
+      binfo("Failed to initialize the module: %d\n", ret);
+      goto errout_with_load;
+    }
+
+  /* Add the new module entry to the registry */
+
+  modlib_registry_add(modp);
+
+  modlib_uninitialize(&loadinfo);
+  modlib_registry_unlock();
+  return (FAR void *)modp;
+
+errout_with_load:
+  modlib_unload(&loadinfo);
+  (void)modlib_undepend(modp);
+errout_with_registry_entry:
+  lib_free(modp);
+errout_with_loadinfo:
+  modlib_uninitialize(&loadinfo);
+errout_with_lock:
+  modlib_registry_unlock();
+  set_errno(-ret);
+  return NULL;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: dlopen
+ *
+ * Description:
+ *   dlopen() makes an executable object file specified by file available to
+ *   the calling program.  The class of files eligible for this operation and
+ *   the manner of their construction are specified by the implementation,
+ *   though typically such files are executable objects such as shared
+ *   libraries, relocatable files or programs. Note that some implementations
+ *   permit the construction of dependencies between such objects that are
+ *   embedded within files. In such cases, a dlopen() operation will load
+ *   such dependencies in addition to the object referenced by file.
+ *   Implementations may also impose specific constraints on the construction
+ *   of programs that can employ dlopen() and its related services.
+ *
+ *   If a file is specified in multiple dlopen() invocations, mode is
+ *   interpreted at each invocation. Note, however, that once RTLD_NOW has
+ *   been specified all relocations will have been completed rendering
+ *   further RTLD_NOW operations redundant and any further RTLD_LAZY
+ *   operations irrelevant.  Similarly note that once RTLD_GLOBAL has been
+ *   specified the object will maintain the RTLD_GLOBAL status regardless
+ *   of any previous or future specification of RTLD_LOCAL, so long as the
+ *   object remains in the address space (see dlclose()).
+ *
+ *   Symbols introduced into a program through calls to dlopen() may be
+ *   used in relocation activities. Symbols so introduced may duplicate
+ *   symbols already defined by the program or previous dlopen()
+ *   operations. To resolve the ambiguities such a situation might
+ *   present, the resolution of a symbol reference to symbol definition is
+ *   based on a symbol resolution order. Two such resolution orders are
+ *   defined: load or dependency ordering. Load order establishes an
+ *   ordering among symbol definitions, such that the definition first
+ *   loaded (including definitions from the image file and any dependent
+ *   objects loaded with it) has priority over objects added later (via
+ *   dlopen()). Load ordering is used in relocation processing. Dependency
+ *   ordering uses a breadth-first order starting with a given object,
+ *   then all of its dependencies, then any dependents of those, iterating
+ *   until all dependencies are satisfied. With the exception of the global
+ *   symbol object obtained via a dlopen() operation on a file of 0,
+ *   dependency ordering is used by the dlsym() function. Load ordering is
+ *   used in dlsym() operations upon the global symbol object.
+ *
+ *   When an object is first made accessible via dlopen() it and its
+ *   dependent objects are added in dependency order. Once all the objects
+ *   are added, relocations are performed using load order. Note that if an
+ *   object or its dependencies had been previously loaded, the load and
+ *   dependency orders may yield different resolutions.
+ *
+ *   The symbols introduced by dlopen() operations, and available through
+ *   dlsym() are at a minimum those which are exported as symbols of global
+ *   scope by the object. Typically such symbols will be those that were
+ *   specified in (for example) C source code as having extern linkage. The
+ *   precise manner in which an implementation constructs the set of
+ *   exported symbols for a dlopen() object is specified by that
+ *   implementation.
+ *
+ * Input Parameters:
+ *   file - Used to construct a pathname to the object file. If file
+ *          contains a slash character, the file argument is used as the
+ *          pathname for the file. Otherwise, file is used in an
+ *          implementation-dependent manner to yield a pathname.
+ *
+ *          If the value of file is 0, dlopen() provides a handle on a
+ *          global symbol object. This object provides access to the symbols
+ *          from an ordered set of objects consisting of the original
+ *          program image file, together with any objects loaded at program
+ *          startup as specified by that process image file (for example,
+ *          shared libraries), and the set of objects loaded using a
+ *          dlopen() operation together with the RTLD_GLOBAL flag. As the
+ *          latter set of objects can change during execution, the set
+ *          identified by handle can also change dynamically.
+ *
+ *          Only a single copy of an object file is brought into the address
+ *          space, even if dlopen() is invoked multiple times in reference
+ *          to the file, and even if different pathnames are used to
+ *          reference the file.
+ *  mode  - Describes how dlopen() will operate upon file with respect to
+ *          the processing of relocations and the scope of visibility of the
+ *          symbols provided within file. When an object is brought into the
+ *          address space of a process, it may contain references to symbols
+ *          whose addresses are not known until the object is loaded. These
+ *          references must be relocated before the symbols can be accessed.
+ *          The mode parameter governs when these relocations take place.
+ *          See definitions above for values of the mode parameter:.
+ *
+ * Returned Value:
+ *   A successful dlopen() returns a handle which the caller may use on
+ *   subsequent calls to dlsym() and dlclose(). The value of this handle
+ *   should not be interpreted in any way by the caller.
+ *
+ *   If file cannot be found, cannot be opened for reading, is not of an
+ *   appropriate object format for processing by dlopen(), or if an error
+ *   occurs during the process of loading file or relocating its symbolic
+ *   references, dlopen() will return NULL. More detailed diagnostic
+ *   information will be available through dlerror().
+ *
+ * Reference: OpenGroup.org
+ *
+ ****************************************************************************/
+
+FAR void *dlopen(FAR const char *file, int mode)
+{
+#if defined(CONFIG_BUILD_FLAT)
+  FAR void *handle;
+  FAR char *name;
+
+  DEBUGASSERT(file != NULL);
+
+  /* In the FLAT build, a shared library is essentially the same as a kernel
+   * module.
+   *
+   * REVIST:  Missing functionality:
+   * - No automatic binding of symbols
+   * - No dependencies
+   * - mode is ignored.
+   */
+
+  /* Use the basename of the file as the module name.
+   * REVISIT: This places an non-standard restriction.  We cannot install
+   * two modules of the same name event though they lie in different
+   * directories.
+   */
+
+  name = strdup(file);
+  if (name == NULL)
+    {
+      return NULL;
+    }
+
+  /* Then install the file using the basename of the file as the module name. */
+
+  handle = insmod(file, basename(name));
+  free(name);
+  return handle;
+
+#elif defined(CONFIG_BUILD_PROTECTED)
+  /* The PROTECTED build is equivalent to the FLAT build EXCEPT that there
+   * must be two copies of the module logic:  One residing in kernel
+   * space and using the kernel symbol table and one residing in user space
+   * using the user space symbol table.
+   *
+   * dlinsert() is essentially a clone of insmod().
+   */
+
+  return dlinsert(file);
+
+#else /* if defined(CONFIG_BUILD_KERNEL) */
+  /* The KERNEL build is considerably more complex:  In order to be shared,
+   * the .text portion of the module must be (1) build for PIC/PID operation
+   * and (2) must like in a shared memory region accessible from all
+   * processes.  The .data/.bss portion of the module must be allocated in
+   * the user space of each process, but must lie at the same virtual address
+   * so that it can be referenced from the one copy of the text in the shared
+   * memory region.
+   */
+
+#warning Missing logic
+  return NULL;
+#endif
+}
diff --git a/libc/dllfcn/lib_dlsym.c b/libc/dllfcn/lib_dlsym.c
new file mode 100644
index 0000000000000000000000000000000000000000..6d0bbf13672d8d5a4d02ac7fefe04a56c0d68590
--- /dev/null
+++ b/libc/dllfcn/lib_dlsym.c
@@ -0,0 +1,190 @@
+/****************************************************************************
+ * libc/dllfcn/lib_dlsym.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: dlgetsym
+ *
+ * Description:
+ *   dlgetsym() implements dlsym() for the PROTECTED build.
+ *
+ * Input Parameters:
+ *   handle - The opaque, non-NULL value returned by a previous successful
+ *            call to insmod().
+ *   name   - A pointer to the symbol name string.
+ *
+ * Returned Value:
+ *   See dlsym().
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BUILD_PROTECTED
+static inline FAR const void *dlgetsym(FAR void *handle,
+                                       FAR const char *name)
+{
+  FAR struct module_s *modp = (FAR struct module_s *)handle;
+  FAR const struct symtab_s *symbol;
+  int err;
+  int ret;
+
+  /* Verify that the module is in the registry */
+
+  modlib_registry_lock();
+  ret = modlib_registry_verify(modp);
+  if (ret < 0)
+    {
+      serr("ERROR: Failed to verify module: %d\n", ret);
+      err = -ret;
+      goto errout_with_lock;
+    }
+
+  /* Does the module have a symbol table? */
+
+  if (modp->modinfo.exports == NULL || modp->modinfo.nexports == 0)
+    {
+      serr("ERROR: Module has no symbol table\n");
+      err = ENOENT;
+      goto errout_with_lock;
+    }
+
+  /* Search the symbol table for the matching symbol */
+
+  symbol = symtab_findbyname(modp->modinfo.exports, name,
+                             modp->modinfo.nexports);
+  if (symbol == NULL)
+    {
+      serr("ERROR: Failed to find symbol in symbol \"$s\" in table\n", name);
+      err = ENOENT;
+      goto errout_with_lock;
+    }
+
+  /* Return the address within the module assoicated with the symbol */
+
+  modlib_registry_unlock();
+  DEBUGASSERT(symbol->sym_value != NULL);
+  return symbol->sym_value;
+
+errout_with_lock:
+  modlib_registry_unlock();
+  set_errno(err);
+  return NULL;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: dlsym
+ *
+ * Description:
+ *   dlsym() allows a process to obtain the address of a symbol defined
+ *   within an object made accessible through a dlopen() call. handle is the
+ *   value returned from a call to dlopen() (and which has not since been
+ *   released via a call to dlclose()), name is the symbol's name as a
+ *   character string.
+ *
+ *   dlsym() will search for the named symbol in all objects loaded
+ *   automatically as a result of loading the object referenced by handle
+ *   (see dlopen()). Load ordering is used in dlsym() operations upon the
+ *   global symbol object. The symbol resolution algorithm used will be
+ *   dependency order as described in dlopen().
+ *
+ * Input Parameters:
+ *   handle - The opaque, non-NULL value returned by a previous successful
+ *            call to dlopen().
+ *   name   - A pointer to the symbol name string.
+ *
+ * Returned Value:
+ *   If handle does not refer to a valid object opened by dlopen(), or if
+ *   the named symbol cannot be found within any of the objects associated
+ *   with handle, dlsym() will return NULL. More detailed diagnostic
+ *   information will be available through dlerror().
+ *
+ * Reference: OpenGroup.org
+ *
+ ****************************************************************************/
+
+FAR void *dlsym(FAR void *handle, FAR const char *name)
+{
+#if defined(CONFIG_BUILD_FLAT)
+  /* In the FLAT build, a shared library is essentially the same as a kernel
+   * module.
+   */
+
+  return (FAR void *)modsym(handle, name);
+
+#elif defined(CONFIG_BUILD_PROTECTED)
+  /* The PROTECTED build is equivalent to the FLAT build EXCEPT that there
+   * must be two copies of the module logic:  One residing in kernel
+   * space and using the kernel symbol table and one residing in user space
+   * using the user space symbol table.
+   *
+   * dlgetsem() is essentially a clone of modsym().
+   */
+
+  return (FAR void *)dlgetsym(handle, name);
+
+#else /* if defined(CONFIG_BUILD_KERNEL) */
+  /* The KERNEL build is considerably more complex:  In order to be shared,
+   * the .text portion of the module must be (1) build for PIC/PID operation
+   * and (2) must like in a shared memory region accessible from all
+   * processes.  The .data/.bss portion of the module must be allocated in
+   * the user space of each process, but must lie at the same virtual address
+   * so that it can be referenced from the one copy of the text in the shared
+   * memory region.
+   */
+
+#warning Missing logic
+  return NULL;
+#endif
+}
diff --git a/libc/dllfcn/lib_dlsymtab.c b/libc/dllfcn/lib_dlsymtab.c
new file mode 100644
index 0000000000000000000000000000000000000000..a4f827bb5dfcc6fbbce38acdd9ef06869f5fadb3
--- /dev/null
+++ b/libc/dllfcn/lib_dlsymtab.c
@@ -0,0 +1,92 @@
+/****************************************************************************
+ * libc/dllfcn/lib_symtab.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: dlsymtab
+ *
+ * Description:
+ *   dlsymtab() is a non-standard shared library interface.  It selects the
+ *   symbol table to use when binding a shared libary to the base firmware
+ *   which may be in FLASH memory.
+ *
+ * Input Parameters:
+ *   symtab   - The new symbol table.
+ *   nsymbols - The number of symbols in the symbol table.
+ *
+ * Returned Value:
+ *   Always returns OK.
+ *
+ ****************************************************************************/
+
+int dlsymtab(FAR const struct symtab_s *symtab, int nsymbols)
+{
+#if defined(CONFIG_BUILD_FLAT) || defined(CONFIG_BUILD_PROTECTED)
+  /* Set the symbol take information that will be used by this instance of
+   * the module library.
+   */
+
+  modlib_setsymtab(symtab, nsymbols);
+  return OK;
+
+#else /* if defined(CONFIG_BUILD_KERNEL) */
+  /* The KERNEL build is considerably more complex:  In order to be shared,
+   * the .text portion of the module must be (1) build for PIC/PID operation
+   * and (2) must like in a shared memory region accessible from all
+   * processes.  The .data/.bss portion of the module must be allocated in
+   * the user space of each process, but must lie at the same virtual address
+   * so that it can be referenced from the one copy of the text in the shared
+   * memory region.
+   */
+
+#warning Missing logic
+  return -ENOSYS;
+#endif
+}
diff --git a/libc/hex2bin/Kconfig b/libc/hex2bin/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..82bb419727c6f020a4803ed29282810c8d1f4a74
--- /dev/null
+++ b/libc/hex2bin/Kconfig
@@ -0,0 +1,11 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+config LIB_HEX2BIN
+	bool "Intel HEX to binary conversion library"
+	default n
+	---help---
+		Build in support for conversions from Intel Hex format to binary.
+		This selection enables the interfaces of include/hex2bin.h.
diff --git a/configs/compal_e86/src/Makefile b/libc/hex2bin/Make.defs
similarity index 84%
rename from configs/compal_e86/src/Makefile
rename to libc/hex2bin/Make.defs
index b8f7e5dc8a3dac898e5f93e241abb36c6d60bf76..e1ce1f5d46d3bd5ab9d8f23a5673cc7d8bd247c9 100644
--- a/configs/compal_e86/src/Makefile
+++ b/libc/hex2bin/Make.defs
@@ -1,12 +1,9 @@
 ############################################################################
-# configs/compal_e86/src/Makefile
+# libc/hex2bin/Make.defs
 #
-#   Copyright (C) 2007, 2008, 2013, 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
-#   Copyright (C) 2011 Stefan Richter. All rights reserved.
-#   Author: Stefan Richter 
-#
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions
 # are met:
@@ -36,9 +33,15 @@
 #
 ############################################################################
 
--include $(TOPDIR)/Make.defs
+ifeq ($(CONFIG_LIB_HEX2BIN),y)
+
+# Add the hex2bin sources to the build
+
+CSRCS += lib_fhex2mem.c  lib_hex2bin.c  lib_hex2mem.c
+
+# Add the hex2bin directory to the build
 
-ASRCS =
-CSRCS = boot.c
+DEPPATH += --dep-path hex2bin
+VPATH += :hex2bin
 
-include $(TOPDIR)/configs/Board.mk
+endif
diff --git a/libc/hex2bin/lib_fhex2mem.c b/libc/hex2bin/lib_fhex2mem.c
new file mode 100644
index 0000000000000000000000000000000000000000..1967dd1adeb6faf90245ebb87853ca6497f9d203
--- /dev/null
+++ b/libc/hex2bin/lib_fhex2mem.c
@@ -0,0 +1,103 @@
+/****************************************************************************
+ * libc/hex2bin/fhex2mem.c
+ *
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+#ifdef CONFIG_LIB_HEX2BIN
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name fhex2mem
+ *
+ * Description:
+ *   Read the Intel HEX ASCII data provided on the standard stream
+ *   'instream' and write the binary to memory.
+ *
+ *   If, for example, instream is stdin, then the HEX ASCII data would be
+ *   taken from the console and written to memory.
+ *
+ * Input Parameters:
+ *   instream  - The incoming standard stream from which Intel HEX data
+ *               will be received.
+ *   baseaddr  - The base address of the memory region stream.
+ *   endpaddr  - The end address (plus 1) of the memory region.
+ *   swap      - Controls byte ordering.  See enum hex2bin_swap_e for
+ *               description of the values.
+ *
+ * Returned Value
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   failure.
+ *
+ ****************************************************************************/
+
+int fhex2mem(FAR FILE *instream, uint32_t baseaddr, uint32_t endpaddr,
+             enum hex2bin_swap_e swap)
+{
+  struct lib_stdinstream_s stdinstream;
+  struct lib_memsostream_s memoutstream;
+
+  /* Check memory addresses */
+
+  DEBUGASSERT(instream != NULL && endpaddr > baseaddr);
+
+  /* Wrap the file descriptor as raw stream; wrap the memory as a memory
+   * stream.
+   */
+
+  lib_stdinstream(&stdinstream, instream);
+  lib_memsostream(&memoutstream, (FAR char *)baseaddr,
+                  (int)(endpaddr - baseaddr));
+
+  /* And do the deed */
+
+  return hex2bin(&stdinstream.public, &memoutstream.public,
+                 (uint32_t)baseaddr, (uint32_t)endpaddr,
+                 (enum hex2bin_swap_e)swap);
+}
+
+#endif /* CONFIG_LIB_HEX2BIN */
diff --git a/libc/hex2bin/lib_hex2bin.c b/libc/hex2bin/lib_hex2bin.c
new file mode 100644
index 0000000000000000000000000000000000000000..2dc5d32d97b7175e62ba511911e296f357354b66
--- /dev/null
+++ b/libc/hex2bin/lib_hex2bin.c
@@ -0,0 +1,705 @@
+/****************************************************************************
+ * libc/hex2bin/hex2bin.c
+ *
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * References:
+ *   - http://en.wikipedia.org/wiki/Intel_HEX
+ *   - Hexadecimal Object File Format Specification, Revision A January 6,
+ *     1988, Intel
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#ifdef CONFIG_LIB_HEX2BIN
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* ASCII record sizes */
+
+#define BYTECOUNT_ASCSIZE      2
+#define ADDRESS_ASCSIZE        4
+#define RECTYPE_ASCSIZE        2
+
+#define BYTECOUNT_LINENDX      (0)
+#define ADDRESS_LINENDX        (BYTECOUNT_LINENDX + BYTECOUNT_ASCSIZE)
+#define RECTYPE_LINENDX        (ADDRESS_LINENDX + ADDRESS_ASCSIZE)
+#define DATA_LINENDX           (RECTYPE_LINENDX + RECTYPE_ASCSIZE)
+#define HEADER_ASCSIZE          DATA_LINENDX
+
+#define CHECKSUM_ASCSIZE       2
+#define TRAILER_SIZE           (CHECKSUM_ASCSIZE)
+
+#define MAXDATA_BINSIZE        255
+#define RECORD_ASCSIZE(n)      (HEADER_ASCSIZE + TRAILER_SIZE + 2*(n))
+#define MAXRECORD_ASCSIZE      RECORD_ASCSIZE(MAXDATA_BINSIZE)
+#define MINRECORD_ASCSIZE      RECORD_ASCSIZE(0)
+#define LINE_ALLOC             MAXRECORD_ASCSIZE
+
+/* Binary record sizes */
+
+#define BYTECOUNT_BINSIZE      1
+#define ADDRESS_BINSIZE        2
+#define RECTYPE_BINSIZE        1
+
+#define BYTECOUNT_BINNDX       (0)
+#define ADDRESS_BINNDX         (BYTECOUNT_BINNDX + BYTECOUNT_BINSIZE)
+#define RECTYPE_BINNDX         (ADDRESS_BINNDX + ADDRESS_BINSIZE)
+#define DATA_BINNDX            (RECTYPE_BINNDX + RECTYPE_BINSIZE)
+#define HEADER_BINSIZE         DATA_BINNDX
+
+#define CHECKSUM_BINSIZE       1
+#define TRAILER_BINSIZE        CHECKSUM_BINSIZE
+
+#define RECORD_BINSIZE(n)      (HEADER_BINSIZE + TRAILER_BINSIZE + (n))
+#define MAXRECORD_BINSIZE      RECORD_BINSIZE(MAXDATA_BINSIZE)
+#define MINRECORD_BKINSIZE     RECORD_BINSIZE(0)
+#define BIN_ALLOC              MAXRECORD_BINSIZE
+
+/* Record start code */
+
+#define RECORD_STARTCODE       ':'
+
+/* Record Types */
+
+#define RECORD_DATA            0  /* Data */
+#define RECORD_EOF             1  /* End of file */
+#define RECORD_EXT_SEGADDR     2  /* Extended segment address record */
+#define RECORD_START_SEGADDR   3  /* Start segment address record */
+#define RECORD_EXT_LINADDR     4  /* Extended linear address record */
+#define RECORD_START_LINADDR   5  /* Start linear address record */
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: nibble2bin
+ ****************************************************************************/
+
+static int nibble2bin(uint8_t ascii)
+{
+  if (ascii >= '0' && ascii <= '9')
+    {
+      return (ascii - 0x30);
+    }
+  else if (ascii >= 'a' && ascii <= 'f')
+    {
+      return (ascii - 'a' + 10);
+    }
+  else if (ascii >= 'A' && ascii <= 'F')
+    {
+      return (ascii - 'A' + 10);
+    }
+
+  return -EINVAL;
+}
+
+/****************************************************************************
+ * Name: byte2bin
+ ****************************************************************************/
+
+static int byte2bin(FAR const uint8_t *ascii)
+{
+  int nibble;
+  int byte;
+
+  /* Get the MS nibble (big endian order) */
+
+  nibble = nibble2bin(*ascii++);
+  if (nibble < 0)
+    {
+      return nibble;
+    }
+
+  byte = (nibble << 4);
+
+  /* Get the MS nibble */
+
+  nibble = nibble2bin(*ascii);
+  if (nibble < 0)
+    {
+      return nibble;
+    }
+
+  byte |= nibble;
+  return byte;
+}
+
+/****************************************************************************
+ * Name: word2bin
+ ****************************************************************************/
+
+#if 0 /* Not used */
+static int word2bin(FAR const char *ascii)
+{
+  int byte;
+  int word;
+
+  /* Get the MS byte (big endian order) */
+
+  byte = word2bin(ascii);
+  if (byte < 0)
+    {
+      return byte;
+    }
+
+  word = (byte << 8);
+
+  /* Get the MS byte */
+
+  byte = word2bin(ascii + 2);
+  if (byte < 0)
+    {
+      return byte;
+    }
+
+  word |= byte;
+  return word;
+}
+#endif
+
+/****************************************************************************
+ * Name: data2bin
+ ****************************************************************************/
+
+int data2bin(FAR uint8_t* dest, FAR const uint8_t *src, int nsrcbytes)
+{
+  int byte;
+
+  /* An even number of source bytes is expected */
+
+  if ((nsrcbytes & 1) != 0)
+    {
+      return -EINVAL;
+    }
+
+  /* Convert src bytes in groups of 2, writing one byte to the output on each
+   * pass through the loop. */
+
+  while (nsrcbytes > 0)
+    {
+      /* Get the MS nibble (big endian order) */
+
+      byte = byte2bin(src);
+      if (byte < 0)
+        {
+          return byte;
+        }
+
+      src += 2;
+
+      /* And write the byte to the destination */
+
+      *dest++ = byte;
+      nsrcbytes -= 2;
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: readstream
+ ****************************************************************************/
+
+static int readstream(FAR struct lib_instream_s *instream,
+                      FAR uint8_t *line, unsigned int lineno)
+{
+  int nbytes = 0;
+  int ch;
+
+  /* Skip until the beginning of line start code is encountered */
+
+  ch = instream->get(instream);
+  while (ch != RECORD_STARTCODE && ch != EOF)
+    {
+      ch = instream->get(instream);
+    }
+
+  /* Skip over the startcode */
+
+  if (ch != EOF)
+    {
+      ch = instream->get(instream);
+    }
+
+  /* Then read, verify, and buffer until the end of line is encountered */
+
+  while (ch != EOF && nbytes < (MAXRECORD_ASCSIZE-1))
+    {
+#if defined(CONFIG_EOL_IS_LF)
+      if (ch == '\n')
+        {
+          *line = '\0';
+          return nbytes;
+        }
+
+#elif defined(CONFIG_EOL_IS_BOTH_CRLF)
+      if (ch == '\r')
+        {
+          continue;
+        }
+      else if (ch == '\n')
+        {
+          *line = '\0';
+          return nbytes;
+        }
+#elif defined(CONFIG_EOL_IS_CR)
+      if (ch == '\r')
+        {
+          *line = '\0';
+          return nbytes;
+        }
+#elif defined(CONFIG_EOL_IS_EITHER_CRLF)
+      if (ch == '\n' || ch == '\r')
+        {
+          *line = '\0';
+          return nbytes;
+        }
+#endif
+      /* Only hex data goes into the line buffer */
+
+      else if (isxdigit(ch))
+        {
+          *line++ = ch;
+          nbytes++;
+        }
+      else if (!isspace(ch)) /* Not expected */
+        {
+          lerr("Line %u ERROR: Unexpected character %c[%02x] in stream\n",
+               lineno, isprint(ch) ? ch : '.', ch);
+          break;
+        }
+
+      /* Read the next character from the input stream */
+
+      ch = instream->get(instream);
+    }
+
+  /* Some error occurred: Unexpected EOF, line too long, or bad character in
+   * stream
+   */
+
+  lerr("Line %u ERROR: Failed to read line. %d characters read\n",
+       lineno, nbytes);
+  return EOF;
+}
+
+/****************************************************************************
+ * Name: hex2bin_swap16 and hex2bin_swap32
+ ****************************************************************************/
+
+static inline void hex2bin_swap16(FAR uint8_t *data, int bytecount)
+{
+  for (; bytecount > 0; bytecount -= 2)
+    {
+      uint8_t b0 = data[0];
+      uint8_t b1 = data[1];
+
+      *data++ = b1;
+      *data++ = b0;
+    }
+}
+
+static inline void hex2bin_swap32(FAR uint8_t *data, int bytecount)
+{
+  for (; bytecount > 0; bytecount -= 4)
+    {
+      uint8_t b0 = data[0];
+      uint8_t b1 = data[1];
+      uint8_t b2 = data[2];
+      uint8_t b3 = data[3];
+
+      *data++ = b3;
+      *data++ = b2;
+      *data++ = b1;
+      *data++ = b0;
+    }
+}
+
+/****************************************************************************
+ * Name: writedata
+ ****************************************************************************/
+
+static inline void writedata(FAR struct lib_sostream_s *outstream,
+                             FAR uint8_t *data, int bytecount)
+{
+  for (; bytecount > 0; bytecount--)
+    {
+      outstream->put(outstream, *data++);
+    }
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: hex2bin
+ *
+ * Description:
+ *   Read the Intel HEX ASCII data provided on the serial IN stream and write
+ *   the binary to the seek-able serial OUT stream.
+ *
+ *   These streams may be files or, in another usage example, the IN stream
+ *   could be a serial port and the OUT stream could be a memory stream.  This
+ *   would decode and write the serial input to memory.
+ *
+ * Input Parameters:
+ *   instream  - The incoming stream from which Intel HEX data will be
+ *               received.
+ *   outstream - The outgoing stream in which binary data will be written.
+ *   baseaddr  - The base address of the outgoing stream.  Seeking in the
+ *               output stream will be relative to this address.
+ *   endpaddr  - The end address (plus 1) of the outgoing stream.  This
+ *               value is used only for range checking.  endpaddr must
+ *               be larger than baseaddr.  A zero value for endpaddr
+ *               disables range checking.
+ *   swap      - Controls byte ordering.  See enum hex2bin_swap_e for
+ *               description of the values.
+ *
+ * Returned Value
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   failure.
+ *
+ ****************************************************************************/
+
+int hex2bin(FAR struct lib_instream_s *instream,
+            FAR struct lib_sostream_s *outstream, uint32_t baseaddr,
+            uint32_t endpaddr, enum hex2bin_swap_e swap)
+{
+  FAR uint8_t *alloc;
+  FAR uint8_t *line;
+  FAR uint8_t *bin;
+  int nbytes;
+  int bytecount;
+  uint32_t address;
+  uint32_t endaddr;
+  uint32_t expected;
+  uint16_t extension;
+  uint16_t address16;
+  uint8_t checksum;
+  unsigned int lineno;
+  int i;
+  int ret = OK;
+
+  /* Allocate buffer memory */
+
+  alloc = (FAR uint8_t *)malloc(LINE_ALLOC + BIN_ALLOC);
+  if (alloc == NULL)
+    {
+      lerr("ERROR: Failed to allocate memory\n");
+      return -ENOMEM;
+    }
+
+  line = alloc;
+  bin  = &alloc[LINE_ALLOC];
+
+  extension = 0;
+  expected = 0;
+  lineno = 0;
+
+  while ((nbytes = readstream(instream, line, lineno)) != EOF)
+    {
+      /* Increment the line number */
+
+      lineno++;
+
+      /* Did we read enough data to do anything? */
+
+      if (nbytes < MINRECORD_ASCSIZE)
+        {
+          lerr("Line %u ERROR: Record too short: %d\n", lineno, nbytes);
+          goto errout_with_einval;
+        }
+
+      /* We should always read an even number of bytes */
+
+      if ((nbytes & 1) != 0)
+        {
+          lerr("Line %u ERROR: Record length is odd: %d\n", lineno, nbytes);
+          goto errout_with_einval;
+        }
+
+      /* Get the data byte count */
+
+      bytecount = byte2bin(&line[BYTECOUNT_LINENDX]);
+      if (bytecount < 0)
+        {
+          lerr("Line %u ERROR: Failed to read bytecount: %d\n",
+               lineno, bytecount);
+          ret = bytecount;
+          goto errout_with_buffers;
+        }
+
+      /* Verify that the bytecount matches the length of the record */
+
+      if (RECORD_ASCSIZE(bytecount) != nbytes)
+        {
+          lerr("Line %u ERROR: Expected %d bytes, read %d\n",
+               lineno, RECORD_ASCSIZE(bytecount), nbytes);
+          goto errout_with_einval;
+        }
+
+      /* Convert the entire line to binary.  We need to do this for
+       * checksum calculation which includes the entire line (minus
+       * the start code and the checksum at the end of the line itself)
+       */
+
+      ret = data2bin(bin, line, nbytes);
+      if (ret < 0)
+        {
+          lerr("Line %u ERROR: Failed to convert line to binary: %d\n",
+               lineno, ret);
+          goto errout_with_buffers;
+        }
+
+      /* Calculate and verify the checksum over all of the data */
+
+      nbytes >>= 1;  /* Number of bytes in bin[] */
+      checksum = 0;
+
+      for (i = 0; i < nbytes; i++)
+        {
+          checksum += bin[i];
+        }
+
+      if (checksum != 0)
+        {
+          lerr("Line %u ERROR: Bad checksum %02x\n", lineno, checksum);
+          goto errout_with_einval;
+        }
+
+      /* Get the 16-bit (unextended) address from the record */
+
+      address16 = (uint16_t)bin[ADDRESS_BINNDX] << 8 |
+                  (uint16_t)bin[ADDRESS_BINNDX+1];
+
+      /* Handle the record by its record type */
+
+      switch (bin[RECTYPE_BINNDX])
+        {
+        case RECORD_DATA: /* Data */
+          {
+            /* Swap data in place in the binary buffer as required */
+
+            switch (swap)
+              {
+              case HEX2BIN_NOSWAP: /* No swap, stream is the correct byte order */
+                break;
+
+              case HEX2BIN_SWAP16: /* Swap bytes in 16-bit values */
+                {
+                  if ((bytecount & 1) != 0)
+                    {
+                      lerr("Line %d ERROR: Byte count %d is not a multiple of 2\n",
+                           lineno, bytecount);
+                       goto errout_with_einval;
+                    }
+
+                  /* Do the byte swap */
+
+                  hex2bin_swap16(&bin[DATA_BINNDX], bytecount);
+                }
+                break;
+
+              case HEX2BIN_SWAP32: /* Swap bytes in 32-bit values */
+                {
+                  if ((bytecount & 3) != 0)
+                    {
+                      lerr("Line %d ERROR: Byte count %d is not a multiple of 4\n",
+                           lineno, bytecount);
+                       goto errout_with_einval;
+                    }
+
+                  /* Do the byte swap */
+
+                  hex2bin_swap32(&bin[DATA_BINNDX], bytecount);
+                }
+                break;
+
+              default:
+                {
+                  lerr("ERROR: Invalid swap argument: %d\n", swap);
+                  goto errout_with_einval;
+                }
+              }
+
+            /* Get and verify the full 32-bit address */
+
+            address = ((uint32_t)extension << 16) | (uint32_t)address16;
+            endaddr = address + bytecount;
+
+            if (address < baseaddr || (endpaddr != 0 && endaddr >= endpaddr))
+              {
+                lerr("Line %d ERROR: Extended address %08lx is out of range\n",
+                     lineno, (unsigned long)address);
+                goto errout_with_einval;
+              }
+
+            /* Seek to the correct position in the OUT stream if we have
+             * made an unexpected jump in the data address.
+             */
+
+            if (address != expected)
+              {
+                off_t pos = outstream->seek(outstream, address - baseaddr, SEEK_SET);
+                if (pos == (off_t)-1)
+                  {
+                    lerr("Line %u ERROR: Seek to address %08lu failed\n",
+                         lineno, (unsigned long)address);
+                    ret = -ESPIPE;
+                    goto errout_with_buffers;
+                  }
+              }
+
+            /* Transfer data to the OUT stream */
+
+            writedata(outstream, &bin[DATA_BINNDX], bytecount);
+
+            /* This is the next data address that we expect to see */
+
+            expected = address + bytecount;
+          }
+          break;
+
+        case RECORD_EOF: /* End of file */
+          /*  End Of File record.  Must occur exactly once per file in the
+           * last line of the file. The byte count is 00 and the data field
+           * is empty. Usually the address field is also 0000.
+           */
+
+          if (bytecount == 0)
+            {
+              ret = OK;
+              goto exit_with_buffers;
+            }
+
+          lerr("Line %u ERROR: Nonzero bytecount %d in EOF\n",
+               lineno, bytecount);
+          goto errout_with_einval;
+
+        case RECORD_EXT_SEGADDR: /* Extended segment address record */
+          /* The address specified by the data field is multiplied by 16
+           * (shifted 4 bits left) and added to the subsequent data record
+           * addresses. This allows addressing of up to a megabyte of
+           * address space. The address field of this record has to be
+           * 0000, the byte count is 02 (the segment is 16-bit). The
+           * least significant hex digit of the segment address is always
+           * 0.
+           */
+
+          if (bytecount != 2 || address16 != 0 || bin[DATA_BINNDX+1] != 0)
+            {
+              lerr("Line %u ERROR: Invalid segment address\n", lineno);
+              lerr("  bytecount=%d address=%04x segment=%02x%02x\n",
+                   bytecount, address16, bin[DATA_BINNDX],
+                   bin[DATA_BINNDX+1]);
+              goto errout_with_einval;
+            }
+
+          extension = (uint16_t)bin[DATA_BINNDX];
+          break;
+
+        case RECORD_START_SEGADDR: /* Start segment address record */
+          /* For 80x86 processors, it specifies the initial content of
+           * the CS:IP registers. The address field is 0000, the byte
+           * count is 04, the first two bytes are the CS value, the
+           * latter two are the IP value.
+           */
+
+          break;
+
+        case RECORD_EXT_LINADDR: /* Extended linear address record */
+          /* The address field is 0000, the byte count is 02. The two
+           * data bytes (two hex digit pairs in big endian order)
+           * represent the upper 16 bits of the 32 bit address for
+           * all subsequent 00 type records until the next 04 type
+           * record comes. If there is not a 04 type record, the
+           * upper 16 bits default to 0000. To get the absolute
+           * address for subsequent 00 type records, the address
+           * specified by the data field of the most recent 04 record
+           * is added to the 00 record addresses.
+           */
+
+          if (bytecount != 2 || address16 != 0)
+            {
+              lerr("Line %u ERROR: Invalid linear address\n", lineno);
+              lerr("  bytecount=%d address=%04x\n", bytecount, address16);
+              goto errout_with_einval;
+            }
+
+          extension = (uint16_t)bin[DATA_BINNDX] << 8 |
+                      (uint16_t)bin[DATA_BINNDX+1];
+          break;
+
+        case RECORD_START_LINADDR: /* Start linear address record */
+          /* The address field is 0000, the byte count is 04. The 4
+           * data bytes represent the 32-bit value loaded into the EIP
+           * register of the 80386 and higher CPU.
+           */
+
+          break;
+
+        default:
+          break;
+        }
+    }
+
+  lerr("ERROR: No EOF record found\n");
+
+errout_with_einval:
+  ret = -EINVAL;
+
+errout_with_buffers:
+exit_with_buffers:
+  free(alloc);
+  return ret;
+}
+
+#endif /* CONFIG_LIB_HEX2BIN */
diff --git a/libc/hex2bin/lib_hex2mem.c b/libc/hex2bin/lib_hex2mem.c
new file mode 100644
index 0000000000000000000000000000000000000000..12c284cf5403019affd8a71af7b577293389434e
--- /dev/null
+++ b/libc/hex2bin/lib_hex2mem.c
@@ -0,0 +1,103 @@
+/****************************************************************************
+ * libc/hex2bin/hex2mem.c
+ *
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+#ifdef CONFIG_LIB_HEX2BIN
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name hex2mem
+ *
+ * Description:
+ *   Read the Intel HEX ASCII data provided on the file descriptor 'fd' and
+ *   write the binary to memory.
+ *
+ *   If, for example, fd is zero (stdin), then the HEX ASCII data would be
+ *   taken from the console and written to memory.
+ *
+ * Input Parameters:
+ *   fd        - The file descriptor from which Intel HEX data will be
+ *               received.
+ *   baseaddr  - The base address of the memory region stream.
+ *   endpaddr  - The end address (plus 1) of the memory region.
+ *   swap      - Controls byte ordering.  See enum hex2bin_swap_e for
+ *               description of the values.
+ *
+ * Returned Value
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   failure.
+ *
+ ****************************************************************************/
+
+int hex2mem(int fd, uint32_t baseaddr, uint32_t endpaddr,
+            enum hex2bin_swap_e swap)
+{
+  struct lib_rawinstream_s rawinstream;
+  struct lib_memsostream_s memoutstream;
+
+  /* Check memory addresses */
+
+  DEBUGASSERT(fd >= 0 && endpaddr > baseaddr);
+
+  /* Wrap the file descriptor as raw stream; wrap the memory as a memory
+   * stream.
+   */
+
+  lib_rawinstream(&rawinstream, fd);
+  lib_memsostream(&memoutstream, (FAR char *)baseaddr,
+                  (int)(endpaddr - baseaddr));
+
+  /* And do the deed */
+
+  return hex2bin(&rawinstream.public, &memoutstream.public,
+                 (uint32_t)baseaddr, (uint32_t)endpaddr,
+                 (enum hex2bin_swap_e)swap);
+}
+
+#endif /* CONFIG_LIB_HEX2BIN */
diff --git a/configs/pirelli_dpl10/src/Makefile b/libc/inttypes/Make.defs
similarity index 84%
rename from configs/pirelli_dpl10/src/Makefile
rename to libc/inttypes/Make.defs
index 4026b5fb1c9091d35816679c3561379697ff2f3f..c10d4382f702cf8f7b8ceef4173bc95901460ea3 100644
--- a/configs/pirelli_dpl10/src/Makefile
+++ b/libc/inttypes/Make.defs
@@ -1,12 +1,9 @@
 ############################################################################
-# configs/pirelli_dpl10/src/Makefile
+# libc/inttypes/Make.defs
 #
-#   Copyright (C) 2007, 2008, 2013 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
-#   Copyright (C) 2011 Stefan Richter. All rights reserved.
-#   Author: Stefan Richter 
-#
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions
 # are met:
@@ -36,9 +33,11 @@
 #
 ############################################################################
 
--include $(TOPDIR)/Make.defs
+# Add the inttypes C files to the build
+
+CSRCS += lib_imaxabs.c lib_strtoimax.c lib_strtoumax.c
 
-ASRCS =
-CSRCS = boot.c
+# Add the inttypes directory to the build
 
-include $(TOPDIR)/configs/Board.mk
+DEPPATH += --dep-path inttypes
+VPATH += :inttypes
diff --git a/libc/stdlib/lib_imaxabs.c b/libc/inttypes/lib_imaxabs.c
similarity index 98%
rename from libc/stdlib/lib_imaxabs.c
rename to libc/inttypes/lib_imaxabs.c
index 12c5dc15a715e3502f4ea97ee5ca3fa15c9772fb..315af34114dae243452d7ad6d5c7ab7df225a9ef 100644
--- a/libc/stdlib/lib_imaxabs.c
+++ b/libc/inttypes/lib_imaxabs.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/stdlib//lib_abs.c
+ * libc/inttypes/lib_imaxabs.c
  *
  *   Copyright (C) 2010-2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -50,5 +50,6 @@ intmax_t imaxabs(intmax_t j)
     {
       j = -j;
     }
+
   return j;
 }
diff --git a/libc/inttypes/lib_strtoimax.c b/libc/inttypes/lib_strtoimax.c
new file mode 100644
index 0000000000000000000000000000000000000000..2862e7f8eb6596bf62cc85613399ed5313b51f7d
--- /dev/null
+++ b/libc/inttypes/lib_strtoimax.c
@@ -0,0 +1,120 @@
+/****************************************************************************
+ * libc/inttypes/lib_strtoimax.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include "libc.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: strtoimax
+ *
+ * Description:
+ *   The strtoimax() function  converts  the initial part of the string in
+ *   nptr to a intmax_t integer value according to the given base, which
+ *   must be between 2 and 36 inclusive, or be the special value 0.
+ *
+ * Returns:
+ *   - The converted value, if the base and number are valid
+ *   - 0 if an error occurs, and set errno to:
+ *     * EINVAL if base < 2 or base > 36
+ *   - INTMAX_MIN or INTMAX_MAX, of correct sign, if an overflow occurs,
+ *     and set errno to:
+ *     * ERANGE if the number cannot be represented using intmax_t
+ *
+ ****************************************************************************/
+
+intmax_t strtoimax(FAR const char *nptr, FAR char **endptr, int base)
+{
+  uintmax_t accum = 0;
+  bool negate = false;
+
+  if (nptr)
+    {
+      /* Skip leading spaces */
+
+      lib_skipspace(&nptr);
+
+      /* Check for leading + or - */
+
+      if (*nptr == '-')
+        {
+          negate = true;
+          nptr++;
+        }
+      else if (*nptr == '+')
+        {
+          nptr++;
+        }
+
+      /* Get the unsigned value */
+
+      accum = strtoull(nptr, endptr, base);
+
+      /* Correct the sign of the result and check for overflow */
+
+      if (negate)
+        {
+          const uintmax_t limit = ((uintmax_t)-(INTMAX_MIN + 1)) + 1;
+
+          if (accum > limit)
+            {
+              set_errno(ERANGE);
+              return INTMAX_MIN;
+            }
+
+          return (accum == limit) ? INTMAX_MIN : -(intmax_t)accum;
+        }
+
+      if (accum > INTMAX_MAX)
+        {
+          set_errno(ERANGE);
+          return INTMAX_MAX;
+        }
+    }
+
+  return (intmax_t)accum;
+}
diff --git a/libc/inttypes/lib_strtoumax.c b/libc/inttypes/lib_strtoumax.c
new file mode 100644
index 0000000000000000000000000000000000000000..9440908c93c31358aacee9b9626919fa186396b7
--- /dev/null
+++ b/libc/inttypes/lib_strtoumax.c
@@ -0,0 +1,118 @@
+/****************************************************************************
+ * /libc/inttypes/lib_strtoumax.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "libc.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: strtoumax
+ *
+ * Description:
+ *   The strtoumax() function  converts  the initial part of the string in
+ *   nptr to a long unsigned integer value according to the given base, which
+ *   must be between 2 and 36 inclusive, or be the special value 0.
+ *
+ * Returns:
+ *   - The converted value, if the base and number are valid
+ *   - 0 if an error occurs, and set errno to:
+ *     * EINVAL if base < 2 or base > 36
+ *   - UINTMAX_MAX if an overflow occurs, and set errno to:
+ *     * ERANGE if the number cannot be represented using uintmax_t
+ *
+ ****************************************************************************/
+
+uintmax_t strtoumax(FAR const char *nptr, FAR char **endptr, int base)
+{
+  uintmax_t accum = 0;
+  uintmax_t prev;
+  int value;
+
+  if (nptr)
+    {
+      /* Skip leading spaces */
+
+      lib_skipspace(&nptr);
+
+      /* Check for unspecified base */
+
+      base = lib_checkbase(base, &nptr);
+
+      if (base < 0)
+        {
+          set_errno(EINVAL);
+          return 0;
+        }
+
+      /* Accumulate each "digit" */
+
+      while (lib_isbasedigit(*nptr, base, &value))
+        {
+          prev  = accum;
+          accum = accum*base + value;
+          nptr++;
+
+          /* Check for overflow */
+
+          if (accum < prev)
+            {
+              set_errno(ERANGE);
+              accum = UINTMAX_MAX;
+              break;
+            }
+        }
+
+      /* Return the final pointer to the unused value */
+
+      if (endptr)
+        {
+          *endptr = (char *)nptr;
+        }
+    }
+
+  return accum;
+}
diff --git a/libc/libc.csv b/libc/libc.csv
index d93fe22a27d2e33c7ca0525999efa04b7cdb92c6..d38cc8b161c8d77d89770a08152698670c3efaa4 100644
--- a/libc/libc.csv
+++ b/libc/libc.csv
@@ -4,8 +4,8 @@
 "aio_error","aio.h","defined(CONFIG_FS_AIO)","int","FAR struct aiocb *"
 "aio_return","aio.h","defined(CONFIG_FS_AIO)","ssize_t","FAR struct aiocb *"
 "aio_suspend","aio.h","defined(CONFIG_FS_AIO)","int","FAR struct aiocb *const []|FAR struct aiocb *const *","int","FAR const struct timespec *"
-"asprintf","stdio.h","","int","FAR char **","const char *","..."
-"vasprintf","stdio.h","","int","FAR char **","const char *","va_list"
+"asprintf","stdio.h","","int","FAR char **","FAR const char *","..."
+"vasprintf","stdio.h","","int","FAR char **","FAR const char *","va_list"
 "b16atan2","fixedmath.h","!defined(CONFIG_HAVE_LONG_LONG)","b16_t","b16_t","b16_t"
 "b16cos","fixedmath.h","","b16_t","b16_t"
 "b16divb16","fixedmath.h","!defined(CONFIG_HAVE_LONG_LONG)","b16_t","b16_t","b16_t"
@@ -18,7 +18,6 @@
 "chdir","unistd.h","CONFIG_NFILE_DESCRIPTORS > 0 && !defined(CONFIG_DISABLE_ENVIRON)","int","FAR const char *"
 "crc32","crc32.h","","uint32_t","FAR const uint8_t *","size_t"
 "crc32part","crc32.h","","uint32_t","FAR const uint8_t *","size_t","uint32_t"
-"dbg","debug.h","!defined(CONFIG_CPP_HAVE_VARARGS) && defined(CONFIG_DEBUG)","int","const char *","..."
 "dirname","libgen.h","","FAR char","FAR char *"
 "dq_addafter","queue.h","","void","FAR dq_entry_t *","FAR dq_entry_t *","FAR dq_queue_t *"
 "dq_addbefore","queue.h","","void","FAR dq_entry_t *","FAR dq_entry_t *","FAR dq_queue_t *"
@@ -27,10 +26,12 @@
 "dq_rem","queue.h","","void","FAR dq_entry_t *","dq_queue_t *"
 "dq_remfirst","queue.h","","FAR dq_entry_t","dq_queue_t *"
 "dq_remlast","queue.h","","FAR dq_entry_t","dq_queue_t *"
+"_err","debug.h","!defined(CONFIG_CPP_HAVE_VARARGS) && defined(CONFIG_DEBUG_ERROR)","int","FAR const char *","..."
 "ether_ntoa","netinet/ether.h","","FAR char","FAR const struct ether_addr *"
 "fclose","stdio.h","CONFIG_NFILE_DESCRIPTORS > 0 && CONFIG_NFILE_STREAMS > 0","int","FAR FILE *"
 "fdopen","stdio.h","CONFIG_NFILE_DESCRIPTORS > 0 && CONFIG_NFILE_STREAMS > 0","FAR FILE","int","FAR const char *"
 "fflush","stdio.h","CONFIG_NFILE_DESCRIPTORS > 0 && CONFIG_NFILE_STREAMS > 0","int","FAR FILE *"
+"ffs","strings.h","","int","int"
 "fgetc","stdio.h","CONFIG_NFILE_DESCRIPTORS > 0 && CONFIG_NFILE_STREAMS > 0","int","FAR FILE *"
 "fgetpos","stdio.h","CONFIG_NFILE_DESCRIPTORS > 0 && CONFIG_NFILE_STREAMS > 0","int","FAR FILE *","FAR fpos_t *"
 "fgets","stdio.h","CONFIG_NFILE_DESCRIPTORS > 0 && CONFIG_NFILE_STREAMS > 0","FAR char","FAR char *","int","FAR FILE *"
@@ -51,7 +52,7 @@
 "getoptindp","unistd.h","","int"
 "getoptoptp","unistd.h","","int"
 "gets","stdio.h","CONFIG_NFILE_DESCRIPTORS > 0 && CONFIG_NFILE_STREAMS > 0","FAR char","FAR char *"
-"gmtime","time.h","","struct tm","const time_t *"
+"gmtime","time.h","","struct tm","FAR const time_t *"
 "gmtime_r","time.h","","FAR struct tm","FAR const time_t *","FAR struct tm *"
 "htonl","arpa/inet.h","","uint32_t","uint32_t"
 "htons","arpa/inet.h","","uint16_t","uint16_t"
@@ -60,26 +61,40 @@
 "inet_ntoa","arpa/inet.h","defined(CONFIG_NET_IPv4) && defined(CONFIG_CAN_PASS_STRUCTS)","FAR char","struct in_addr"
 "inet_ntop","arpa/inet.h","","FAR const char","int","FAR const void *","FAR char *","socklen_t"
 "inet_pton","arpa/inet.h","","int","int","FAR const char *","FAR void *"
+"iswalnum","wctype.h","defined(CONFIG_LIBC_WCHAR)","int","wint_t"
+"iswalpha","wctype.h","defined(CONFIG_LIBC_WCHAR)","int","wint_t"
+"iswblank","wctype.h","defined(CONFIG_LIBC_WCHAR)","int","wint_t"
+"iswcntrl","wctype.h","defined(CONFIG_LIBC_WCHAR)","int","wint_t"
+"iswctype","wctype.h","defined(CONFIG_LIBC_WCHAR)","int","wint_t","wctype_t"
+"iswdigit","wctype.h","defined(CONFIG_LIBC_WCHAR)","int","wint_t"
+"iswgraph","wctype.h","defined(CONFIG_LIBC_WCHAR)","int","wint_t"
+"iswlower","wctype.h","defined(CONFIG_LIBC_WCHAR)","int","wint_t"
+"iswprint","wctype.h","defined(CONFIG_LIBC_WCHAR)","int","wint_t"
+"iswpunct","wctype.h","defined(CONFIG_LIBC_WCHAR)","int","wint_t"
+"iswspace","wctype.h","defined(CONFIG_LIBC_WCHAR)","int","wint_t"
+"iswupper","wctype.h","defined(CONFIG_LIBC_WCHAR)","int","wint_t"
+"iswxdigit","wctype.h","defined(CONFIG_LIBC_WCHAR)","int","wint_t"
 "labs","stdlib.h","","long int","long int"
 "lib_dumpbuffer","debug.h","","void","FAR const char *","FAR const uint8_t *","unsigned int"
 "lio_listio","aio.h","defined(CONFIG_FS_AIO)","int","int","FAR struct aiocb *const []|FAR struct aiocb *const *","int","FAR struct sigevent *"
 "llabs","stdlib.h","defined(CONFIG_HAVE_LONG_LONG)","long long int","long long int"
-"lldbg","debug.h","!defined(CONFIG_CPP_HAVE_VARARGS) && defined(CONFIG_DEBUG) && defined(CONFIG_ARCH_LOWPUTC)","int","const char *","..."
-"llvdbg","debug.h","!defined(CONFIG_CPP_HAVE_VARARGS) && defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_ARCH_LOWPUTC)","int","const char *","..."
-"lowsyslog","syslog.h","","int","int","FAR const char *","..."
-"lowvsyslog","syslog.h","","int","int","FAR const char *","va_list"
-"match","nuttx/regex.h","","int","const char *","const char *"
+"match","nuttx/lib/regex.h","","int","FAR const char *","FAR const char *"
+"mbrtowc","wchar.h",""defined(CONFIG_LIBC_WCHAR)","size_t","wchar_t *","FAR const char *","size_t","mbstate_t *"
+"mbsnrtowcs,"wchar.h","","size_t","FAR wchar_t *","FAR const char **","size_t","size_t","mbstate_t *"
+"mbtowc","wchar.h",""defined(CONFIG_LIBC_WCHAR)","int","wchar_t *","FAR const wchar_t *","size_t"
 "memccpy","string.h","","FAR void","FAR void *","FAR const void *","int c","size_t"
 "memchr","string.h","","FAR void","FAR const void *","int c","size_t"
 "memcmp","string.h","","int","FAR const void *","FAR const void *","size_t"
 "memcpy","string.h","","FAR void","FAR void *","FAR const void *","size_t"
 "memmove","string.h","","FAR void","FAR void *","FAR const void *","size_t"
 "memset","string.h","","FAR void","FAR void *","int c","size_t"
-"mktime","time.h","","time_t","const struct tm *"
+"mkfifo","sys/stat.h","CONFIG_NFILE_DESCRIPTORS > 0","int","FAR const char*","mode_t"
+"mktime","time.h","","time_t","FAR const struct tm *"
 "ntohl","arpa/inet.h","","uint32_t","uint32_t"
 "ntohs","arpa/inet.h","","uint16_t","uint16_t"
 "perror","stdio.h","CONFIG_NFILE_DESCRIPTORS > 0 && CONFIG_NFILE_STREAMS > 0","void","FAR const char *"
-"printf","stdio.h","","int","const char *","..."
+"pipe","unistd.h","CONFIG_NFILE_DESCRIPTORS > 0","int","int [2]|int*"
+"printf","stdio.h","","int","FAR const char *","..."
 "pthread_attr_destroy","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","FAR pthread_attr_t *"
 "pthread_attr_getinheritsched","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","FAR const pthread_attr_t *","FAR int *"
 "pthread_attr_getschedparam","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","FAR pthread_attr_t *","FAR struct sched_param *"
@@ -98,12 +113,12 @@
 "pthread_condattr_init","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","FAR pthread_condattr_t *"
 "pthread_mutexattr_destroy","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","FAR pthread_mutexattr_t *"
 "pthread_mutexattr_getpshared","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","FAR pthread_mutexattr_t *","FAR int *"
-"pthread_mutexattr_gettype","pthread.h","!defined(CONFIG_DISABLE_PTHREAD) && defined(CONFIG_MUTEX_TYPES)","int","const pthread_mutexattr_t *","int *"
+"pthread_mutexattr_gettype","pthread.h","!defined(CONFIG_DISABLE_PTHREAD) && defined(CONFIG_MUTEX_TYPES)","int","FAR const pthread_mutexattr_t *","int *"
 "pthread_mutexattr_init","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","FAR pthread_mutexattr_t *"
 "pthread_mutexattr_setpshared","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","FAR pthread_mutexattr_t *","int "
 "pthread_mutexattr_settype","pthread.h","!defined(CONFIG_DISABLE_PTHREAD) && defined(CONFIG_MUTEX_TYPES)","int","pthread_mutexattr_t *","int"
 "puts","stdio.h","CONFIG_NFILE_DESCRIPTORS > 0 && CONFIG_NFILE_STREAMS > 0","int","FAR const char *"
-"qsort","stdlib.h","","void","void *","size_t","size_t","int(*)(const void *","const void *)"
+"qsort","stdlib.h","","void","void *","size_t","size_t","int(*)(const void *","FAR const void *)"
 "rand","stdlib.h","","int"
 "readdir_r","dirent.h","CONFIG_NFILE_DESCRIPTORS > 0","int","FAR DIR *","FAR struct dirent *","FAR struct dirent **"
 "sched_get_priority_max","sched.h","","int","int"
@@ -111,6 +126,7 @@
 "sem_getvalue","semaphore.h","","int","FAR sem_t *","FAR int *"
 "sem_init","semaphore.h","","int","FAR sem_t *","int","unsigned int"
 "sendfile","sys/sendfile.h","CONFIG_NSOCKET_DESCRIPTORS > 0 || CONFIG_NFILE_DESCRIPTORS > 0","ssize_t","int","int","off_t","size_t"
+"setlocale","local.h","","FAR char *s","int","FAR const char *s"
 "setlogmask","syslog.h","","int","int"
 "sigaddset","signal.h","!defined(CONFIG_DISABLE_SIGNALS)","int","FAR sigset_t *","int"
 "sigdelset","signal.h","!defined(CONFIG_DISABLE_SIGNALS)","int","FAR sigset_t *","int"
@@ -118,8 +134,8 @@
 "sigfillset","signal.h","!defined(CONFIG_DISABLE_SIGNALS)","int","FAR sigset_t *"
 "sigismember","signal.h","!defined(CONFIG_DISABLE_SIGNALS)","int","FAR const sigset_t *","int"
 "sleep","unistd.h","!defined(CONFIG_DISABLE_SIGNALS)","unsigned int","unsigned int"
-"snprintf","stdio.h","","int","FAR char *","size_t","const char *","..."
-"sprintf","stdio.h","","int","FAR char *","const char *","..."
+"snprintf","stdio.h","","int","FAR char *","size_t","FAR const char *","..."
+"sprintf","stdio.h","","int","FAR char *","FAR const char *","..."
 "sq_addafter","queue.h","","void","FAR sq_entry_t *","FAR sq_entry_t *","FAR sq_queue_t *"
 "sq_addfirst","queue.h","","void","FAR sq_entry_t *","sq_queue_t *"
 "sq_addlast","queue.h","","void","FAR sq_entry_t *","sq_queue_t *"
@@ -128,50 +144,80 @@
 "sq_remfirst","queue.h","","FAR sq_entry_t","sq_queue_t *"
 "sq_remlast","queue.h","","FAR sq_entry_t","sq_queue_t *"
 "srand","stdlib.h","","void","unsigned int"
-"sscanf","stdio.h","","int","const char *","const char *","..."
-"strcasecmp","string.h","","int","FAR const char *","FAR const char *"
+"sscanf","stdio.h","","int","FAR const char *","FAR const char *","..."
+"strcasecmp","strings.h","","int","FAR const char *","FAR const char *"
 "strcasestr","string.h","","FAR char","FAR const char *","FAR const char *"
 "strcat","string.h","","FAR char","FAR char *","FAR const char *"
 "strchr","string.h","","FAR char","FAR const char *","int"
 "strcmp","string.h","","int","FAR const char *","FAR const char *"
-"strcpy","string.h","","FAR char","char *","FAR const char *"
+"strcoll","string.h","CONFIG_LIBC_LOCALE","int","FAR const char *","FAR const char *"
+"strcpy","string.h","","FAR char *","FAR char *","FAR const char *"
 "strcspn","string.h","","size_t","FAR const char *","FAR const char *"
 "strdup","string.h","","FAR char","FAR const char *"
 "strerror","string.h","","FAR const char","int"
-"strftime","time.h","","size_t","char *","size_t","const char *","const struct tm *"
+"strerror_r","string.h","","int","int","FAR char *","size_t"
+"strftime","time.h","","size_t","FAR char *","size_t","FAR const char *","FAR const struct tm *"
 "strlen","string.h","","size_t","FAR const char *"
-"strncasecmp","string.h","","int","FAR const char *","FAR const char *","size_t"
+"strncasecmp","strings.h","","int","FAR const char *","FAR const char *","size_t"
 "strncat","string.h","","FAR char","FAR char *","FAR const char *","size_t"
 "strncmp","string.h","","int","FAR const char *","FAR const char *","size_t"
-"strncpy","string.h","","FAR char","char *","FAR const char *","size_t"
+"strncpy","string.h","","FAR char","FAR char *","FAR const char *","size_t"
 "strndup","string.h","","FAR char","FAR const char *","size_t"
 "strnlen","string.h","","size_t","FAR const char *","size_t"
 "strpbrk","string.h","","FAR char","FAR const char *","FAR const char *"
 "strrchr","string.h","","FAR char","FAR const char *","int"
 "strspn","string.h","","size_t","FAR const char *","FAR const char *"
 "strstr","string.h","","FAR char","FAR const char *","FAR const char *"
-"strtod","stdlib.h","","double_t","const char *str","char **endptr"
+"strtod","stdlib.h","","double_t","FAR const char *str","FAR char **endptr"
 "strtok","string.h","","FAR char","FAR char *","FAR const char *"
 "strtok_r","string.h","","FAR char","FAR char *","FAR const char *","FAR char **"
-"strtol","string.h","","long","const char *","char **","int"
-"strtoll","stdlib.h","defined(CONFIG_HAVE_LONG_LONG)","long long","const char *nptr","char **endptr","int base"
-"strtoul","stdlib.h","","unsigned long","const char *","char **","int"
-"strtoull","stdlib.h","defined(CONFIG_HAVE_LONG_LONG)","unsigned long long","const char *","char **","int"
+"strtol","string.h","","long","FAR const char *","FAR char **","int"
+"strtoll","stdlib.h","defined(CONFIG_HAVE_LONG_LONG)","long long","FAR const char *nptr","FAR char **endptr","int base"
+"strtoul","stdlib.h","","unsigned long","FAR const char *","FAR char **","int"
+"strtoull","stdlib.h","defined(CONFIG_HAVE_LONG_LONG)","unsigned long long","FAR const char *","FAR char **","int"
+"strxfrm","string.h","defined(CONFIG_LIBC_LOCALE)","size_t","FAR char *","FAR const char *","size_t"
+"swab","unistd.h","","void","int","FAR const void *","FAR void *","ssize_t"
+"swprintf","wchar.h","defined(CONFIG_LIBC_WCHAR)","int","FAR wchar_t *","size_t","FAR const wchar_t *","..."
 "syslog","syslog.h","","int","int","FAR const char *","..."
 "tcflush","termios.h","CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_SERIAL_TERMIOS)","int","int","int"
 "tcgetattr","termios.h","CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_SERIAL_TERMIOS)","int","int","FAR struct termios *"
 "tcsetattr","termios.h","CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_SERIAL_TERMIOS)","int","int","int","FAR const struct termios *"
 "telldir","dirent.h","CONFIG_NFILE_DESCRIPTORS > 0","off_t","FAR DIR *"
 "time","time.h","","time_t","time_t *"
+"towlower","wchar.h","defined(CONFIG_LIBC_WCHAR)","wint_t","wint_t"
+"towupper","wchar.h","defined(CONFIG_LIBC_WCHAR)","wint_t","wint_t"
 "ub16divub16","fixedmath.h","!defined(CONFIG_HAVE_LONG_LONG)","ub16_t","ub16_t","ub16_t"
 "ub16mulub16","fixedmath.h","!defined(CONFIG_HAVE_LONG_LONG)","ub16_t","ub16_t","ub16_t"
 "ub16sqr","fixedmath.h","!defined(CONFIG_HAVE_LONG_LONG)","ub16_t","ub16_t"
 "ungetc","stdio.h","CONFIG_NFILE_DESCRIPTORS > 0 && CONFIG_NFILE_STREAMS > 0","int","int","FAR FILE *"
 "usleep","unistd.h","!defined(CONFIG_DISABLE_SIGNALS)","int","int","FAR FILE *"
-"vdbg","debug.h","!defined(CONFIG_CPP_HAVE_VARARGS) && defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_VERBOSE)","int","const char *","..."
-"vfprintf","stdio.h","CONFIG_NFILE_DESCRIPTORS > 0 && CONFIG_NFILE_STREAMS > 0","int","FAR FILE *","const char *","va_list"
+"_info","debug.h","!defined(CONFIG_CPP_HAVE_VARARGS) && defined(CONFIG_DEBUG_INFO)","int","FAR const char *","..."
+"vfprintf","stdio.h","CONFIG_NFILE_DESCRIPTORS > 0 && CONFIG_NFILE_STREAMS > 0","int","FAR FILE *","FAR const char *","va_list"
 "vprintf","stdio.h","CONFIG_NFILE_DESCRIPTORS > 0 && CONFIG_NFILE_STREAMS > 0","int","FAR const char *","va_list"
-"vsnprintf","stdio.h","","int","FAR char *","size_t","const char *","va_list"
-"vsprintf","stdio.h","","int","FAR char *","const char *","va_list"
-"vsscanf","stdio.h","","int","char *","const char *","va_list"
+"vsnprintf","stdio.h","","int","FAR char *","size_t","FAR const char *","va_list"
+"vsprintf","stdio.h","","int","FAR char *","FAR const char *","va_list"
+"vsscanf","stdio.h","","int","FAR char *","FAR const char *","va_list"
 "vsyslog","syslog.h","","int","int","FAR const char *","va_list"
+"wcrtomb","wchar.h","defined(CONFIG_LIBC_WCHAR)","size_t","FAR char *","wchar_t","mbstate_t *"
+"wcscmp","wchar.h","defined(CONFIG_LIBC_WCHAR)","int","FAR const wchar_t *","FAR const wchar_t *"
+"wcscoll","wchar.h","defined(CONFIG_LIBC_WCHAR)","int","FAR const wchar_t *","FAR const wchar_t *"
+"wcsftime","wchar.h","defined(CONFIG_LIBC_WCHAR)","size_t","FAR wchar_t *","size_t","FAR const wchar_t *","FAR const struct tm *"
+"wcslcpy","wchar.h","defined(CONFIG_LIBC_WCHAR)","size_t","FAR const wchar_t *","FAR const wchar_t *","size_t"
+"wcslen","wchar.h","defined(CONFIG_LIBC_WCHAR)","size_t","FAR const wchar_t *"
+"wcsnrtombs","wchar.h","","size_t","FAR char *","FAR const wchar_t **","size_t","size_t","mbstate_t *"
+"wcstod","wchar.h","defined(CONFIG_LIBC_WCHAR)","","FAR const wchar_t *","FAR wchar_t **"
+"wcstof","wchar.h","defined(CONFIG_LIBC_WCHAR)","float","FAR const wchar_t *","FAR wchar_t **"
+"wcstol","wchar.h","defined(CONFIG_LIBC_WCHAR)","long int","FAR const wchar_t *","FAR wchar_t **","int"
+"wcstold","wchar.h","defined(CONFIG_LIBC_WCHAR)","long double","FAR const wchar_t *","FAR wchar_t **"
+"wcstoll","wchar.h","defined(CONFIG_LIBC_WCHAR)","long long int","FAR const wchar_t *","FAR wchar_t **","int"
+"wcstoul","wchar.h","defined(CONFIG_LIBC_WCHAR)","unsigned long int","FAR const wchar_t *","FAR wchar_t **","int"
+"wcsxfrm","wchar.h","defined(CONFIG_LIBC_WCHAR)","size_t","wchar_t *","FAR const wchar_t *","size_t"
+"wctob","wchar.h","defined(CONFIG_LIBC_WCHAR)","int","wchar_t"
+"wctomb","wchar.h","defined(CONFIG_LIBC_WCHAR)","int","FAR char *","wchar_t"
+"wctype","wctype.h","defined(CONFIG_LIBC_WCHAR)","wctype_t","FAR const char *"
+"wmemchr","wchar.h","defined(CONFIG_LIBC_WCHAR)","wchar_t *","wchar_t *","wchar_t","size_t"
+"wmemcmp","wchar.h","defined(CONFIG_LIBC_WCHAR)","int","wchar_t *","wchar_t *","size_t"
+"wmemcpy","wchar.h","defined(CONFIG_LIBC_WCHAR)","wchat_t *","wchar_t *","wchar_t *","size_t"
+"wmemmove","wchar.h","defined(CONFIG_LIBC_WCHAR)","wchat_t *","wchar_t *","wchar_t *","size_t"
+"wmemset","wchar.h","defined(CONFIG_LIBC_WCHAR)","wchat_t *","wchar_t *","wchar_t","size_t"
+"_warn","debug.h","!defined(CONFIG_CPP_HAVE_VARARGS) && defined(CONFIG_DEBUG_WARN)","int","FAR const char *","..."
diff --git a/libc/libc.h b/libc/libc.h
index 9cb1974fa93e8d759e56ca438069507002780da9..023049531b67bac71d0794481c468c5db4559c04 100644
--- a/libc/libc.h
+++ b/libc/libc.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/libc.h
  *
- *   Copyright (C) 2007-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2014, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -53,6 +53,7 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
 /* This configuration directory is used in environment variable processing
  * when we need to reference the user's home directory.  There are no user
  * directories in NuttX so, by default, this always refers to the root
@@ -67,7 +68,7 @@
  * protection.
  */
 
-#if CONFIG_STDIO_BUFFER_SIZE <= 0
+#ifdef CONFIG_STDIO_DISABLE_BUFFERING
 #  define lib_sem_initialize(s)
 #  define lib_take_semaphore(s)
 #  define lib_give_semaphore(s)
@@ -186,7 +187,7 @@ int lib_wrflush(FAR FILE *stream);
 
 /* Defined in lib_sem.c */
 
-#if CONFIG_STDIO_BUFFER_SIZE > 0
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
 void lib_sem_initialize(FAR struct file_struct *stream);
 void lib_take_semaphore(FAR struct file_struct *stream);
 void lib_give_semaphore(FAR struct file_struct *stream);
@@ -211,6 +212,7 @@ int lib_checkbase(int base, const char **pptr);
 /* Defined in lib_expi.c */
 
 #ifdef CONFIG_LIBM
+float  lib_expif(size_t n);
 double lib_expi(size_t n);
 #endif
 
diff --git a/libc/locale/Kconfig b/libc/locale/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..4e4f193120ecd3d241aab4a43f755da9d59ecea0
--- /dev/null
+++ b/libc/locale/Kconfig
@@ -0,0 +1,14 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+#menu "Locale Support"
+
+config LIBC_LOCALE
+	bool "Enable I18N (LOCALE) support"
+	default n
+	---help---
+		By default, i18n (locale) support is disabled.
+
+#endmenu # Locale Support
diff --git a/configs/compal_e99/src/Makefile b/libc/locale/Make.defs
similarity index 84%
rename from configs/compal_e99/src/Makefile
rename to libc/locale/Make.defs
index c2ad1cc7769a060f256f740dc2f64982393d96b9..b59b798145557672812f113230b00e2dee6163ba 100644
--- a/configs/compal_e99/src/Makefile
+++ b/libc/locale/Make.defs
@@ -1,12 +1,9 @@
 ############################################################################
-# configs/compal_e99/src/Makefile
+# libc/locale/Make.defs
 #
-#   Copyright (C) 2007, 2008, 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
-#   Copyright (C) 2011 Stefan Richter. All rights reserved.
-#   Author: Stefan Richter 
-#
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions
 # are met:
@@ -36,9 +33,15 @@
 #
 ############################################################################
 
--include $(TOPDIR)/Make.defs
+ifeq ($(CONFIG_LIBC_LOCALE),y)
+
+# Add the locale files to the build
+
+CSRCS += lib_setlocale.c lib_localeconv.c
+
+# Add the locale directory to the build
 
-ASRCS =
-CSRCS = boot.c ssd1783.c
+DEPPATH += --dep-path locale
+VPATH += :locale
 
-include $(TOPDIR)/configs/Board.mk
+endif
diff --git a/libc/locale/lib_localeconv.c b/libc/locale/lib_localeconv.c
new file mode 100644
index 0000000000000000000000000000000000000000..697f369cf454df66c0a4a791273d385371034026
--- /dev/null
+++ b/libc/locale/lib_localeconv.c
@@ -0,0 +1,69 @@
+/****************************************************************************
+ * libc/locale/lib_localeconv.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_LOCALE
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: localeconv
+ *
+ * Description:
+ *   locales are not supported by NuttX
+ *
+ * Input Parameters:
+ *   category and locale - Select the appropriate piece of the program's
+ *     locale.
+ *
+ ****************************************************************************/
+
+FAR struct lconv *localeconv(void)
+{
+  /* NULL indicates the the locale was not changed */
+
+  return NULL;
+}
+#endif
diff --git a/libc/locale/lib_setlocale.c b/libc/locale/lib_setlocale.c
new file mode 100644
index 0000000000000000000000000000000000000000..e5b576508d2424240e57654c4dbf5d466b9cfe4e
--- /dev/null
+++ b/libc/locale/lib_setlocale.c
@@ -0,0 +1,69 @@
+/****************************************************************************
+ * libc/locale/lib_setlocale.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_LOCALE
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: setlocale
+ *
+ * Description:
+ *   locales are not supported by NuttX
+ *
+ * Input Parameters:
+ *   category and locale - Select the appropriate piece of the program's
+ *     locale.
+ *
+ ****************************************************************************/
+
+FAR char *setlocale(int category, FAR const char *locale)
+{
+  return ((strcmp(locale, "POSIX") == 0 || strcmp(locale, "C") == 0 ||
+           strcmp(locale, "") == 0) ? "C" :  NULL);
+}
+#endif
diff --git a/libc/machine/Kconfig b/libc/machine/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..cd5c2905d2f628038d60b9d9c049503634631129
--- /dev/null
+++ b/libc/machine/Kconfig
@@ -0,0 +1,163 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+# These are library functions that may be overriden by architecture-
+# specific implementations.  Not all architectures support implementations
+# for every library function.
+
+menu "Architecture-Specific Support"
+
+config ARCH_LOWPUTC
+	bool "Low-level console output"
+	default "y"
+	---help---
+		architecture supports low-level, boot time console output
+
+config ARCH_ROMGETC
+	bool "Support for ROM string access"
+	default n
+	---help---
+		In Harvard architectures, data accesses and instruction accesses
+		occur on different buses, perhaps concurrently.  All data accesses
+		are performed on the data bus unless special machine instructions
+		are used to read data from the instruction address space.  Also, in
+		the typical MCU, the available SRAM data memory is much smaller that
+		the non-volatile FLASH instruction memory.  So if the application
+		requires many constant strings, the only practical solution may be
+		to store those constant strings in FLASH memory where they can only
+		be accessed using architecture-specific machine instructions.
+
+		If ARCH_ROMGETC is defined, then the architecture logic must export
+		the function up_romgetc().  up_romgetc() will simply read one byte
+		of data from the instruction space.
+
+		If ARCH_ROMGETC is selected, certain C stdio functions are effected: (1)
+		All format strings in printf, fprintf, sprintf, etc. are assumed to lie
+		in FLASH (string arguments for %s are still assumed to reside in SRAM).
+		And (2), the string argument to puts and fputs is assumed to reside
+		in FLASH.  Clearly, these assumptions may have to modified for the
+		particular needs of your environment.  There is no "one-size-fits-all"
+		solution for this problem.
+
+# Default settings for C library functions that may be replaced with
+# architecture-specific versions.
+
+config LIBC_ARCH_MEMCPY
+	bool
+	default n
+
+config LIBC_ARCH_MEMCMP
+	bool
+	default n
+
+config LIBC_ARCH_MEMMOVE
+	bool
+	default n
+
+config LIBC_ARCH_MEMSET
+	bool
+	default n
+
+config LIBC_ARCH_STRCHR
+	bool
+	default n
+
+config LIBC_ARCH_STRCMP
+	bool
+	default n
+
+config LIBC_ARCH_STRCPY
+	bool
+	default n
+
+config LIBC_ARCH_STRNCPY
+	bool
+	default n
+
+config LIBC_ARCH_STRLEN
+	bool
+	default n
+
+config LIBC_ARCH_STRNLEN
+	bool
+	default n
+
+config LIBC_ARCH_ELF
+	bool
+	default n
+
+config LIBM_ARCH_CEIL
+	bool
+	default n
+	depends on LIBM && ARCH_CORTEXM33
+
+config LIBM_ARCH_FLOOR
+	bool
+	default n
+	depends on LIBM && ARCH_CORTEXM33
+
+config LIBM_ARCH_NEARBYINT
+	bool
+	default n
+	depends on LIBM && ARCH_CORTEXM33
+
+config LIBM_ARCH_RINT
+	bool
+	default n
+	depends on LIBM && ARCH_CORTEXM33
+
+config LIBM_ARCH_ROUND
+	bool
+	default n
+	depends on LIBM && ARCH_CORTEXM33
+
+config LIBM_ARCH_TRUNC
+	bool
+	default n
+	depends on LIBM && ARCH_CORTEXM33
+
+config LIBM_ARCH_CEILF
+	bool
+	default n
+	depends on LIBM && ARCH_CORTEXM33
+
+config LIBM_ARCH_FLOORF
+	bool
+	default n
+	depends on LIBM && ARCH_CORTEXM33
+
+config LIBM_ARCH_NEARBYINTF
+	bool
+	default n
+	depends on LIBM && ARCH_CORTEXM33
+
+config LIBM_ARCH_RINTF
+	bool
+	default n
+	depends on LIBM && ARCH_CORTEXM33
+
+config LIBM_ARCH_ROUNDF
+	bool
+	default n
+	depends on LIBM && ARCH_CORTEXM33
+
+config LIBM_ARCH_TRUNCF
+	bool
+	default n
+	depends on LIBM && ARCH_CORTEXM33
+
+# One or more the of above may be selected by architecture specific logic
+
+if ARCH_ARM
+source libc/machine/arm/Kconfig
+endif
+if ARCH_SIM
+source libc/machine/sim/Kconfig
+endif
+if ARCH_X86
+source libc/machine/x86/Kconfig
+endif
+
+endmenu # Architecture-Specific Spport
diff --git a/libc/machine/Make.defs b/libc/machine/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..dee7518e5b41b1121f7558964e01090cb7055d76
--- /dev/null
+++ b/libc/machine/Make.defs
@@ -0,0 +1,44 @@
+############################################################################
+# libc/machine/Make.defs
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+ifeq ($(CONFIG_ARCH_ARM),y)
+include ${TOPDIR}/libc/machine/arm/Make.defs
+endif
+ifeq ($(CONFIG_ARCH_SIM),y)
+include ${TOPDIR}/libc/machine/sim/Make.defs
+endif
+ifeq ($(CONFIG_ARCH_X86),y)
+include ${TOPDIR}/libc/machine/x86/Make.defs
+endif
diff --git a/libc/machine/arm/Kconfig b/libc/machine/arm/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..a4314ed8d648c9adf74140786065f270de5f539e
--- /dev/null
+++ b/libc/machine/arm/Kconfig
@@ -0,0 +1,28 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_ARM7TDMI || ARCH_ARM920T || ARCH_ARM926EJS
+source libc/machine/arm/arm/Kconfig
+endif
+
+if ARCH_CORTEXA5 || ARCH_CORTEXA8 || ARCH_CORTEXA9
+source libc/machine/arm/armv7-a/Kconfig
+endif
+
+if ARCH_CORTEXR4 || ARCH_CORTEXR4F || ARCH_CORTEXR5 || ARCH_CORTEXR5F || ARCH_CORTEXR7 || ARCH_CORTEXR7F
+source libc/machine/arm/armv7-r/Kconfig
+endif
+
+if ARCH_CORTEXM0
+source libc/machine/arm/armv6-m/Kconfig
+endif
+
+if ARCH_CORTEXM3 || ARCH_CORTEXM4 || ARCH_CORTEXM7
+source libc/machine/arm/armv7-m/Kconfig
+endif
+
+if ARCH_CORTEXM33
+source libc/machine/arm/armv8/Kconfig
+endif
diff --git a/libc/machine/arm/Make.defs b/libc/machine/arm/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..9bcd5b06ea7b2a04f00dac6a71afe61ccab316ea
--- /dev/null
+++ b/libc/machine/arm/Make.defs
@@ -0,0 +1,70 @@
+############################################################################
+# libc/machine/arm/Make.defs
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+ifeq ($(CONFIG_ARCH_ARM7TDMI),y)        # ARM7TDMI is ARMv4T
+include ${TOPDIR}/libc/machine/arm/arm/Make.defs
+else ifeq ($(CONFIG_ARCH_ARM920T),y)    # ARM920T is ARMv4T
+include ${TOPDIR}/libc/machine/arm/arm/Make.defs
+else ifeq ($(CONFIG_ARCH_ARM926EJS),y)  # ARM926EJS is ARMv5TE
+include ${TOPDIR}/libc/machine/arm/arm/Make.defs
+else ifeq ($(CONFIG_ARCH_CORTEXA5),y)   # Cortex-A5 is ARMv7-A
+include ${TOPDIR}/libc/machine/arm/armv7-a/Make.defs
+else ifeq ($(CONFIG_ARCH_CORTEXA8),y)   # Cortex-A8 is ARMv7-A
+include ${TOPDIR}/libc/machine/arm/armv7-a/Make.defs
+else ifeq ($(CONFIG_ARCH_CORTEXA9),y)   # Cortex-A9 is ARMv7-A
+include ${TOPDIR}/libc/machine/arm/armv7-a/Make.defs
+else ifeq ($(CONFIG_ARCH_CORTEXR4),y)   # Cortex-R4 is ARMv7-R
+include ${TOPDIR}/libc/machine/arm/armv7-r/Make.defs
+else ifeq ($(CONFIG_ARCH_CORTEXR4F),y)  # Cortex-R4F is ARMv7-R
+include ${TOPDIR}/libc/machine/arm/armv7-r/Make.defs
+else ifeq ($(CONFIG_ARCH_CORTEXR5),y)   # Cortex-R5 is ARMv7-R
+include ${TOPDIR}/libc/machine/arm/armv7-r/Make.defs
+else ifeq ($(CONFIG_ARCH_CORTEXR5F),y)  # Cortex-R5F is ARMv7-R
+include ${TOPDIR}/libc/machine/arm/armv7-r/Make.defs
+else ifeq ($(CONFIG_ARCH_CORTEXR7),y)   # Cortex-R7 is ARMv7-R
+include ${TOPDIR}/libc/machine/arm/armv7-r/Make.defs
+else ifeq ($(CONFIG_ARCH_CORTEXR7F),y)  # Cortex-R7F is ARMv7-R
+include ${TOPDIR}/libc/machine/arm/armv7-r/Make.defs
+else ifeq ($(CONFIG_ARCH_CORTEXM0),y)   # Cortex-M0 is ARMv6-M
+include ${TOPDIR}/libc/machine/arm/armv6-m/Make.defs
+else ifeq ($(CONFIG_ARCH_CORTEXM3),y)   # Cortex-M3 is ARMv7-M
+include ${TOPDIR}/libc/machine/arm/armv7-m/Make.defs
+else ifeq ($(CONFIG_ARCH_CORTEXM33),y)  # Cortex-M33 is ARMv8-M
+include ${TOPDIR}/libc/machine/arm/armv8/Make.defs
+else ifeq ($(CONFIG_ARCH_CORTEXM4),y)   # Cortex-M4 is ARMv7E-M
+include ${TOPDIR}/libc/machine/arm/armv7-m/Make.defs
+else ifeq ($(CONFIG_ARCH_CORTEXM7),y)   # Cortex-M4 is ARMv7E-M
+include ${TOPDIR}/libc/machine/arm/armv7-m/Make.defs
+endif
diff --git a/configs/compal_e88/Kconfig b/libc/machine/arm/arm/Kconfig
similarity index 100%
rename from configs/compal_e88/Kconfig
rename to libc/machine/arm/arm/Kconfig
diff --git a/libc/machine/arm/arm/Make.defs b/libc/machine/arm/arm/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..d5632227c7ab8373c79defad7affe8a250f32769
--- /dev/null
+++ b/libc/machine/arm/arm/Make.defs
@@ -0,0 +1,43 @@
+############################################################################
+# libc/machine/arm/arm/Make.defs
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+ifeq ($(CONFIG_LIBC_ARCH_ELF),y)
+
+CSRCS += arch_elf.c
+
+DEPPATH += --dep-path machine/arm/arm
+VPATH += :machine/arm/arm
+
+endif
diff --git a/arch/arm/src/arm/up_elf.c b/libc/machine/arm/arm/arch_elf.c
similarity index 88%
rename from arch/arm/src/arm/up_elf.c
rename to libc/machine/arm/arm/arch_elf.c
index 07eba7341d9a85a59703fbc936ad87510eb586c4..6e1e3cfcb6bd0cb13891d70cccee809dc20027a1 100644
--- a/arch/arm/src/arm/up_elf.c
+++ b/libc/machine/arm/arm/arch_elf.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/arm/src/arm/up_elf.c
+ * libc/machine/arm/arm/arch_elf.c
  *
- *   Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -86,7 +86,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
 
   if (ehdr->e_machine != EM_ARM)
     {
-      bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
+      berr("ERROR: Not for ARM: e_machine=%04x\n", ehdr->e_machine);
       return -ENOEXEC;
     }
 
@@ -94,7 +94,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
 
   if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
     {
-      bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
+      berr("ERROR: Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
       return -ENOEXEC;
     }
 
@@ -106,7 +106,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
   if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
 #endif
     {
-      bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
+      berr("ERROR: Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
       return -ENOEXEC;
     }
 
@@ -114,8 +114,8 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
 
   if ((ehdr->e_entry & 3) != 0)
     {
-      bdbg("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
-      return -ENOEXEC
+      berr("ERROR: Entry point is not properly aligned: %08x\n", ehdr->e_entry);
+      return -ENOEXEC;
     }
 
   /* TODO:  Check ABI here. */
@@ -172,7 +172,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
     case R_ARM_CALL:
     case R_ARM_JUMP24:
       {
-        bvdbg("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
+        binfo("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
               ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
               sym, (long)sym->st_value);
 
@@ -185,7 +185,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
         offset += sym->st_value - addr;
         if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
           {
-            bdbg("  ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
+            berr("ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
                  ELF32_R_TYPE(rel->r_info), offset);
 
             return -EINVAL;
@@ -201,7 +201,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
     case R_ARM_ABS32:
     case R_ARM_TARGET1:  /* New ABI:  TARGET1 always treated as ABS32 */
       {
-        bvdbg("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+        binfo("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
               (long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
 
         *(uint32_t *)addr += sym->st_value;
@@ -210,7 +210,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 
     case R_ARM_V4BX:
       {
-        bvdbg("Performing V4BX link at addr=%08lx [%08lx]\n",
+        binfo("Performing V4BX link at addr=%08lx [%08lx]\n",
               (long)addr, (long)(*(uint32_t *)addr));
 
          /* Preserve only Rm and the condition code */
@@ -225,7 +225,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 
     case R_ARM_PREL31:
       {
-        bvdbg("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+        binfo("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
               (long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
 
         offset            = *(uint32_t *)addr + sym->st_value - addr;
@@ -236,7 +236,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
     case R_ARM_MOVW_ABS_NC:
     case R_ARM_MOVT_ABS:
       {
-        bvdbg("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+        binfo("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
               ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
               sym, (long)sym->st_value);
 
@@ -256,7 +256,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
       break;
 
     default:
-      bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
+      berr("ERROR: Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
       return -EINVAL;
     }
 
@@ -266,6 +266,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
                    uintptr_t addr)
 {
-  bdbg("RELA relocation not supported\n");
+  berr("ERROR: RELA relocation not supported\n");
   return -ENOSYS;
 }
diff --git a/configs/pirelli_dpl10/Kconfig b/libc/machine/arm/armv6-m/Kconfig
similarity index 100%
rename from configs/pirelli_dpl10/Kconfig
rename to libc/machine/arm/armv6-m/Kconfig
diff --git a/libc/machine/arm/armv6-m/Make.defs b/libc/machine/arm/armv6-m/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..36addcd441a9c8c733d86d2926b47f9936b5f935
--- /dev/null
+++ b/libc/machine/arm/armv6-m/Make.defs
@@ -0,0 +1,43 @@
+############################################################################
+# libc/machine/arm/armv6-m/Make.defs
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+ifeq ($(CONFIG_LIBC_ARCH_ELF),y)
+
+CSRCS += arch_elf.c
+
+DEPPATH += --dep-path machine/arm/armv6-m
+VPATH += :machine/arm/armv6-m
+
+endif
diff --git a/arch/arm/src/armv6-m/up_elf.c b/libc/machine/arm/armv6-m/arch_elf.c
similarity index 91%
rename from arch/arm/src/armv6-m/up_elf.c
rename to libc/machine/arm/armv6-m/arch_elf.c
index dbe002cbb1a97419821aa7b3d2821a12e029ae97..3f957b6fdfbd0c55609ca39cc8be7c1f69be8811 100644
--- a/arch/arm/src/armv6-m/up_elf.c
+++ b/libc/machine/arm/armv6-m/arch_elf.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/arm/src/armv6-m/up_elf.c
+ * libc/machine/arm/armv6-m/arch_elf.c
  *
- *   Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013-2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -86,7 +86,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
 
   if (ehdr->e_machine != EM_ARM)
     {
-      bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
+      berr("ERROR: Not for ARM: e_machine=%04x\n", ehdr->e_machine);
       return -ENOEXEC;
     }
 
@@ -94,7 +94,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
 
   if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
     {
-      bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
+      berr("ERROR: Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
       return -ENOEXEC;
     }
 
@@ -106,7 +106,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
   if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
 #endif
     {
-      bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
+      berr("ERROR: Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
       return -ENOEXEC;
     }
 
@@ -168,7 +168,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
     case R_ARM_CALL:
     case R_ARM_JUMP24:
       {
-        bvdbg("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
+        binfo("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
               ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
               sym, (long)sym->st_value);
 
@@ -181,7 +181,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
         offset += sym->st_value - addr;
         if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
           {
-            bdbg("  ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
+            berr("ERROR:   ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
                  ELF32_R_TYPE(rel->r_info), offset);
 
             return -EINVAL;
@@ -197,7 +197,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
     case R_ARM_ABS32:
     case R_ARM_TARGET1:  /* New ABI:  TARGET1 always treated as ABS32 */
       {
-        bvdbg("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+        binfo("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
               (long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
 
         *(uint32_t *)addr += sym->st_value;
@@ -245,7 +245,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
         upper_insn = (uint32_t)(*(uint16_t *)addr);
         lower_insn = (uint32_t)(*(uint16_t *)(addr + 2));
 
-        bvdbg("Performing THM_JUMP24 [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
+        binfo("Performing THM_JUMP24 [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
               ELF32_R_TYPE(rel->r_info), (long)addr, (int)upper_insn, (int)lower_insn,
               sym, (long)sym->st_value);
 
@@ -279,7 +279,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 
         /* And perform the relocation */
 
-        bvdbg("  S=%d J1=%d J2=%d offset=%08lx branch target=%08lx\n",
+        binfo("  S=%d J1=%d J2=%d offset=%08lx branch target=%08lx\n",
               S, J1, J2, (long)offset, offset + sym->st_value - addr);
 
         offset += sym->st_value - addr;
@@ -290,7 +290,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 
         if (ELF32_ST_TYPE(sym->st_info) == STT_FUNC && (offset & 1) == 0)
           {
-            bdbg("  ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
+            berr("ERROR:   ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
                  ELF32_R_TYPE(rel->r_info), offset);
 
             return -EINVAL;
@@ -300,7 +300,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 
         if (offset <= (int32_t)0xff000000 || offset >= (int32_t)0x01000000)
           {
-            bdbg("  ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
+            berr("ERROR:   ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
                  ELF32_R_TYPE(rel->r_info), offset);
 
             return -EINVAL;
@@ -320,14 +320,14 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
         lower_insn = ((lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | ((offset >> 1) & 0x07ff));
         *(uint16_t *)(addr + 2) = (uint16_t)lower_insn;
 
-        bvdbg("  S=%d J1=%d J2=%d insn [%04x %04x]\n",
+        binfo("  S=%d J1=%d J2=%d insn [%04x %04x]\n",
               S, J1, J2, (int)upper_insn, (int)lower_insn);
       }
       break;
 
     case R_ARM_V4BX:
       {
-        bvdbg("Performing V4BX link at addr=%08lx [%08lx]\n",
+        binfo("Performing V4BX link at addr=%08lx [%08lx]\n",
               (long)addr, (long)(*(uint32_t *)addr));
 
          /* Preserve only Rm and the condition code */
@@ -342,7 +342,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 
     case R_ARM_PREL31:
       {
-        bvdbg("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+        binfo("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
               (long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
 
         offset            = *(uint32_t *)addr + sym->st_value - addr;
@@ -353,7 +353,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
     case R_ARM_MOVW_ABS_NC:
     case R_ARM_MOVT_ABS:
       {
-        bvdbg("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+        binfo("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
               ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
               sym, (long)sym->st_value);
 
@@ -408,7 +408,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
         upper_insn = (uint32_t)(*(uint16_t *)addr);
         lower_insn = (uint32_t)(*(uint16_t *)(addr + 2));
 
-        bvdbg("Performing THM_MOVx [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
+        binfo("Performing THM_MOVx [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
               ELF32_R_TYPE(rel->r_info), (long)addr, (int)upper_insn, (int)lower_insn,
               sym, (long)sym->st_value);
 
@@ -425,7 +425,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 
         /* And perform the relocation */
 
-        bvdbg("  offset=%08lx branch target=%08lx\n",
+        binfo("  offset=%08lx branch target=%08lx\n",
               (long)offset, offset + sym->st_value);
 
         offset += sym->st_value;
@@ -445,13 +445,13 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
         lower_insn = ((lower_insn & 0x8f00) | ((offset & 0x0700) << 4) | (offset & 0x00ff));
         *(uint16_t *)(addr + 2) = (uint16_t)lower_insn;
 
-        bvdbg("  insn [%04x %04x]\n",
+        binfo("  insn [%04x %04x]\n",
              (int)upper_insn, (int)lower_insn);
       }
       break;
 
     default:
-      bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
+      berr("ERROR: Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
       return -EINVAL;
     }
 
@@ -461,6 +461,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
                    uintptr_t addr)
 {
-  bdbg("RELA relocation not supported\n");
+  berr("ERROR: RELA relocation not supported\n");
   return -ENOSYS;
 }
diff --git a/libc/machine/arm/armv7-a/Kconfig b/libc/machine/arm/armv7-a/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..7a216e711cb904ae9850dd617efc8c7d56afe8ba
--- /dev/null
+++ b/libc/machine/arm/armv7-a/Kconfig
@@ -0,0 +1,11 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+config ARMV7A_MEMCPY
+	bool "Enable optimized memcpy() for ARMv7-A"
+	select LIBC_ARCH_MEMCPY
+	depends on ARM_TOOLCHAIN_GNU
+	---help---
+		Enable optimized ARMv7-A specific memcpy() library function
diff --git a/libc/machine/arm/armv7-a/Make.defs b/libc/machine/arm/armv7-a/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..14bd255a990d70ae45f27ffe3b5b283482a1deb2
--- /dev/null
+++ b/libc/machine/arm/armv7-a/Make.defs
@@ -0,0 +1,52 @@
+############################################################################
+# libc/machine/arm/armv7-a/Make.defs
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+ifeq ($(CONFIG_ARMV7A_MEMCPY),y)
+
+ASRCS += arch_memcpy.S
+
+DEPPATH += --dep-path machine/arm/armv7-a/gnu
+VPATH += :machine/arm/armv7-a/gnu
+
+endif
+
+ifeq ($(CONFIG_LIBC_ARCH_ELF),y)
+
+CSRCS += arch_elf.c
+
+DEPPATH += --dep-path machine/arm/armv7-a
+VPATH += :machine/arm/armv7-a
+
+endif
diff --git a/arch/arm/src/armv7-a/arm_elf.c b/libc/machine/arm/armv7-a/arch_elf.c
similarity index 88%
rename from arch/arm/src/armv7-a/arm_elf.c
rename to libc/machine/arm/armv7-a/arch_elf.c
index 57898e136af7a37afb95de9dcfe2af5b29056677..be4801af89129b3563cd0d4ecdab3271f2b332b7 100644
--- a/arch/arm/src/armv7-a/arm_elf.c
+++ b/libc/machine/arm/armv7-a/arch_elf.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/arm/src/armv-7a/arm_elf.c
+ * libc/machine/arm/armv-7a/arm_elf.c
  *
- *   Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013-2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -74,7 +74,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
 
   if (ehdr->e_machine != EM_ARM)
     {
-      bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
+      berr("ERROR: Not for ARM: e_machine=%04x\n", ehdr->e_machine);
       return -ENOEXEC;
     }
 
@@ -82,7 +82,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
 
   if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
     {
-      bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
+      berr("ERROR: Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
       return -ENOEXEC;
     }
 
@@ -94,7 +94,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
   if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
 #endif
     {
-      bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
+      berr("ERROR: Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
       return -ENOEXEC;
     }
 
@@ -102,7 +102,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
 
   if ((ehdr->e_entry & 3) != 0)
     {
-      bdbg("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
+      berr("ERROR: Entry point is not properly aligned: %08x\n", ehdr->e_entry);
       return -ENOEXEC;
     }
 
@@ -162,7 +162,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
     case R_ARM_CALL:
     case R_ARM_JUMP24:
       {
-        bvdbg("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
+        binfo("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
               ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
               sym, (long)sym->st_value);
 
@@ -175,7 +175,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
         offset += sym->st_value - addr;
         if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
           {
-            bdbg("  ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
+            berr("ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
                  ELF32_R_TYPE(rel->r_info), offset);
 
             return -EINVAL;
@@ -191,7 +191,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
     case R_ARM_ABS32:
     case R_ARM_TARGET1:  /* New ABI:  TARGET1 always treated as ABS32 */
       {
-        bvdbg("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+        binfo("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
               (long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
 
         *(uint32_t *)addr += sym->st_value;
@@ -200,7 +200,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 
     case R_ARM_V4BX:
       {
-        bvdbg("Performing V4BX link at addr=%08lx [%08lx]\n",
+        binfo("Performing V4BX link at addr=%08lx [%08lx]\n",
               (long)addr, (long)(*(uint32_t *)addr));
 
          /* Preserve only Rm and the condition code */
@@ -215,7 +215,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 
     case R_ARM_PREL31:
       {
-        bvdbg("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+        binfo("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
               (long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
 
         offset            = *(uint32_t *)addr + sym->st_value - addr;
@@ -226,7 +226,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
     case R_ARM_MOVW_ABS_NC:
     case R_ARM_MOVT_ABS:
       {
-        bvdbg("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+        binfo("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
               ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
               sym, (long)sym->st_value);
 
@@ -246,7 +246,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
       break;
 
     default:
-      bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
+      berr("ERROR: Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
       return -EINVAL;
     }
 
@@ -256,6 +256,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
                    uintptr_t addr)
 {
-  bdbg("RELA relocation not supported\n");
+  berr("ERROR: RELA relocation not supported\n");
   return -ENOSYS;
 }
diff --git a/arch/arm/src/armv7-r/arm_memcpy.S b/libc/machine/arm/armv7-a/gnu/arch_memcpy.S
similarity index 71%
rename from arch/arm/src/armv7-r/arm_memcpy.S
rename to libc/machine/arm/armv7-a/gnu/arch_memcpy.S
index b88a0e086912fe08316aa0ac641e20c8ecc0f797..a2082d648f2ccca089c936b80be67eb42bd5ee2a 100644
--- a/arch/arm/src/armv7-r/arm_memcpy.S
+++ b/libc/machine/arm/armv7-a/gnu/arch_memcpy.S
@@ -1,9 +1,14 @@
 /************************************************************************************
- * nuttx/arch/arm/src/armv7-r/arm_memcpy.S
+ * libc/machine/arm/armv7-a/arm_memcpy.S
+ * ARMv7-A optimized memcpy.
  *
- * ARMv7-R optimised memcpy, based on the ARMv7-M version contributed by Mike Smith.
- * Apparently in the public domain and is re-released here under the modified BSD
- * license:
+ * Adapted for use with ARMv7-A and NuttX by:
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Based on the ARMv7-M version contributed by Mike Smith.  Apparently in the public
+ * domain and is re-released here under the modified BSD license:
  *
  * Obtained via a posting on the Stellaris forum:
  *  http://e2e.ti.com/support/microcontrollers/\
@@ -58,14 +63,8 @@
  ************************************************************************************/
 
 	.global	memcpy
-
-#ifdef CONFIG_ARCH_FPU
-	.cpu	cortex-r4
-#else
-	.cpu	cortex-r4f
-#endif
 	.syntax	unified
-	.file	"arm_memcpy.S"
+	.file	"arch_memcpy.S"
 
 /************************************************************************************
  * .text
@@ -101,38 +100,36 @@
  */
 
 MEM_DataCopyTable:
-	.byte	(MEM_DataCopy0 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy1 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy2 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy3 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy4 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy5 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy6 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy7 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy8 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy9 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy10 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy11 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy12 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy13 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy14 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy15 - MEM_DataCopyJump) >> 1
+	.byte	(MEM_DataCopy0  - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy1  - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy2  - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy3  - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy4  - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy5  - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy6  - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy7  - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy8  - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy9  - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy10 - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy11 - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy12 - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy13 - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy14 - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy15 - MEM_DataCopyJump) >> 2
 
 	.align 2
 
 MEM_LongCopyTable:
-	.byte	(MEM_LongCopyEnd - MEM_LongCopyJump) >> 1	/* 0 bytes left */
-	.byte	0					/* 4 bytes left */
-	.byte	(1 * 10) >> 1		/* 8 bytes left */
-	.byte	(2 * 10) >> 1		/* 12 bytes left */
-	.byte	(3 * 10) >> 1		/* 16 bytes left */
-	.byte	(4 * 10) >> 1		/* 20 bytes left */
-	.byte	(5 * 10) >> 1		/* 24 bytes left */
-	.byte	(6 * 10) >> 1		/* 28 bytes left */
-	.byte	(7 * 10) >> 1		/* 32 bytes left */
-	.byte	(8 * 10) >> 1		/* 36 bytes left */
-
-	.align 2
+	.byte	(MEM_LongCopyEnd   - MEM_LongCopyJump) >> 2	/* 0 bytes left */
+	.byte	(MEM_LongCopyJump0 - MEM_LongCopyJump) >> 2	/* 4 bytes left */
+	.byte	(MEM_LongCopyJump1 - MEM_LongCopyJump) >> 2	/* 8 bytes left */
+	.byte	(MEM_LongCopyJump2 - MEM_LongCopyJump) >> 2	/* 12 bytes left */
+	.byte	(MEM_LongCopyJump3 - MEM_LongCopyJump) >> 2	/* 16 bytes left */
+	.byte	(MEM_LongCopyJump4 - MEM_LongCopyJump) >> 2	/* 20 bytes left */
+	.byte	(MEM_LongCopyJump5 - MEM_LongCopyJump) >> 2	/* 24 bytes left */
+	.byte	(MEM_LongCopyJump6 - MEM_LongCopyJump) >> 2	/* 28 bytes left */
+	.byte	(MEM_LongCopyJump7 - MEM_LongCopyJump) >> 2	/* 32 bytes left */
+	.byte	(MEM_LongCopyJump8 - MEM_LongCopyJump) >> 2	/* 36 bytes left */
 
 /************************************************************************************
  * Public Functions
@@ -141,7 +138,7 @@ MEM_LongCopyTable:
  * Name: memcpy
  *
  * Description:
- *   Optimised "general" copy routine
+ *   Optimized "general" copy routine
  *
  * Input Parameters:
  *   r0 = destination, r1 = source, r2 = length
@@ -164,20 +161,27 @@ memcpy:
 
 _do_memcpy:
 	push    {r14}
+	push    {r4}
 
 	/* This allows the inner workings to "assume" a minimum amount of bytes */
 	/* Quickly check for very short copies */
 
 	cmp		r2, #4
-	blt.n	MEM_DataCopyBytes
+	blt		MEM_DataCopyBytes
 
 	and		r14, r0, #3		 		/* Get destination alignment bits */
 	bfi		r14, r1, #2, #2	 		/* Get source alignment bits */
-	ldr		r3, =MEM_DataCopyTable	/* Jump table base */
-	tbb		[r3, r14]		   		/* Perform jump on src/dst alignment bits */
-MEM_DataCopyJump:
+
+	ldr		r3, =MEM_DataCopyTable	/* Jump table base address */
+	ldrb	r4, [r3, r14]			/* DWord offset for this alignment combination */
+	ldr		r3, =MEM_DataCopyJump	/* Base of branch table anchor */
+	add		r3, r3, r4, lsl #2		/* Absolute address of logic */
+	bx		r3
+
+	/* data copy branch table anchor */
 
 	.align 4
+MEM_DataCopyJump:
 
 /* Bits:  Src=01, Dst=01 - Byte before half word to byte before half word - Same alignment
  * 3 bytes to read for long word aligning
@@ -211,12 +215,12 @@ MEM_DataCopy15:
 MEM_DataCopy0:
 	/* Save regs that may be used by memcpy */
 
-	push	{r4-r12}
+	push	{r5-r12}
 
 	/* Check for short word-aligned copy */
 
 	cmp		r2, #0x28
-	blt.n	MEM_DataCopy0_2
+	blt		MEM_DataCopy0_2
 
 	/* Bulk copy loop */
 
@@ -225,49 +229,69 @@ MEM_DataCopy0_1:
 	stmia	r0!, {r3-r12}
 	sub		r2, r2, #0x28
 	cmp		r2, #0x28
-	bge.n	MEM_DataCopy0_1
+	bge		MEM_DataCopy0_1
 
 	/* Copy remaining long words */
 
 MEM_DataCopy0_2:
-	/* Copy remaining long words */
-
-	ldr		r14, =MEM_LongCopyTable
-	lsr		r11, r2, #0x02
-	tbb		[r14, r11]
+	ldr		r14, =MEM_LongCopyTable	/* Jump table base address */
+	lsr		r11, r2, 2				/* Convert byte count to word count */
+	add		r14, r14, r11			/* Jump table offset address */
+	ldrb	r3, [r14]				/* DWord offset from branch table anchor */
+	ldr		r11, =MEM_LongCopyJump	/* Address of branch table anchor */
+	add		r11, r11, r3, lsl #2	/* Absolute address into branch table */
+	bx		r11						/* Go there */
 
 	/* longword copy branch table anchor */
 
 MEM_LongCopyJump:
-	ldr.w	r3, [r1], #0x04		/* 4 bytes remain */
-	str.w	r3, [r0], #0x04
-	b.n		MEM_LongCopyEnd
-	ldmia.w	r1!, {r3-r4}		/* 8 bytes remain */
-	stmia.w	r0!, {r3-r4}
-	b.n		MEM_LongCopyEnd
-	ldmia.w	r1!, {r3-r5}		/* 12 bytes remain */
-	stmia.w	r0!, {r3-r5}
-	b.n		MEM_LongCopyEnd
-	ldmia.w	r1!, {r3-r6}		/* 16 bytes remain */
-	stmia.w	r0!, {r3-r6}
-	b.n		MEM_LongCopyEnd
-	ldmia.w	r1!, {r3-r7}		/* 20 bytes remain */
-	stmia.w	r0!, {r3-r7}
-	b.n		MEM_LongCopyEnd
-	ldmia.w	r1!, {r3-r8}		/* 24 bytes remain */
-	stmia.w	r0!, {r3-r8}
-	b.n		MEM_LongCopyEnd
-	ldmia.w	r1!, {r3-r9}		/* 28 bytes remain */
-	stmia.w	r0!, {r3-r9}
-	b.n		MEM_LongCopyEnd
-	ldmia.w	r1!, {r3-r10}		/* 32 bytes remain */
-	stmia.w	r0!, {r3-r10}
-	b.n		MEM_LongCopyEnd
-	ldmia.w	r1!, {r3-r11}		/* 36 bytes remain */
-	stmia.w	r0!, {r3-r11}
+
+MEM_LongCopyJump0:
+	ldr		r3, [r1], #0x04		/* 4 bytes remain */
+	str		r3, [r0], #0x04
+	b		MEM_LongCopyEnd
+
+MEM_LongCopyJump1:
+	ldmia	r1!, {r3-r4}		/* 8 bytes remain */
+	stmia	r0!, {r3-r4}
+	b		MEM_LongCopyEnd
+
+MEM_LongCopyJump2:
+	ldmia	r1!, {r3-r5}		/* 12 bytes remain */
+	stmia	r0!, {r3-r5}
+	b		MEM_LongCopyEnd
+
+MEM_LongCopyJump3:
+	ldmia	r1!, {r3-r6}		/* 16 bytes remain */
+	stmia	r0!, {r3-r6}
+	b		MEM_LongCopyEnd
+
+MEM_LongCopyJump4:
+	ldmia	r1!, {r3-r7}		/* 20 bytes remain */
+	stmia	r0!, {r3-r7}
+	b		MEM_LongCopyEnd
+
+MEM_LongCopyJump5:
+	ldmia	r1!, {r3-r8}		/* 24 bytes remain */
+	stmia	r0!, {r3-r8}
+	b		MEM_LongCopyEnd
+
+MEM_LongCopyJump6:
+	ldmia	r1!, {r3-r9}		/* 28 bytes remain */
+	stmia	r0!, {r3-r9}
+	b		MEM_LongCopyEnd
+
+MEM_LongCopyJump7:
+	ldmia	r1!, {r3-r10}		/* 32 bytes remain */
+	stmia	r0!, {r3-r10}
+	b		MEM_LongCopyEnd
+
+MEM_LongCopyJump8:
+	ldmia	r1!, {r3-r11}		/* 36 bytes remain */
+	stmia	r0!, {r3-r11}
 
 MEM_LongCopyEnd:
-	pop		{r4-r12}
+	pop		{r5-r12}
 	and		r2, r2, #0x03		/* All the longs have been copied */
 
 	/* Deal with up to 3 remaining bytes */
@@ -275,19 +299,23 @@ MEM_LongCopyEnd:
 MEM_DataCopyBytes:
 	/* Deal with up to 3 remaining bytes */
 
+	pop		{r4}
 	cmp		r2, #0x00
 	it		eq
 	popeq	{pc}
+
 	ldrb	r3, [r1], #0x01
 	strb	r3, [r0], #0x01
 	subs	r2, r2, #0x01
 	it		eq
 	popeq	{pc}
+
 	ldrb	r3, [r1], #0x01
 	strb	r3, [r0], #0x01
 	subs	r2, r2, #0x01
 	it		eq
 	popeq	{pc}
+
 	ldrb	r3, [r1], #0x01
 	strb	r3, [r0], #0x01
 	pop		{pc}
@@ -325,11 +353,11 @@ MEM_DataCopy13:
 
 MEM_DataCopy2:
 	cmp		r2, #0x28
-	blt.n	MEM_DataCopy2_1
+	blt		MEM_DataCopy2_1
 
 	/* Save regs */
 
-	push	{r4-r12}
+	push	{r5-r12}
 
 	/* Bulk copy loop */
 
@@ -362,18 +390,18 @@ MEM_DataCopy2_2:
 
 	sub		r2, r2, #0x28
 	cmp		r2, #0x28
-	bge.n	MEM_DataCopy2_2
-	pop		{r4-r12}
+	bge		MEM_DataCopy2_2
+	pop		{r5-r12}
 
 MEM_DataCopy2_1: /* Read longs and write 2 x half words */
 	cmp		r2, #4
-	blt.n	MEM_DataCopyBytes
+	blt		MEM_DataCopyBytes
 	ldr		r3, [r1], #0x04
 	strh	r3, [r0], #0x02
 	lsr		r3, r3, #0x10
 	strh	r3, [r0], #0x02
 	sub		r2, r2, #0x04
-	b.n		MEM_DataCopy2
+	b		MEM_DataCopy2
 
 /* Bits:  Src=01, Dst=00 - Byte before half word to long
  * Bits:  Src=01, Dst=10 - Byte before half word to half word
@@ -427,7 +455,7 @@ MEM_DataCopy3:
 	lsr		r3, r3, #0x10
 	strb	r3, [r0], #0x01
 	sub		r2, r2, #0x04
-	b.n		MEM_DataCopy3
+	b		MEM_DataCopy3
 
 	.size	memcpy, .-memcpy
 	.end
diff --git a/libc/machine/arm/armv7-m/Kconfig b/libc/machine/arm/armv7-m/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..7148c25c4b78a59be5a4519a8bcb6ea3a9d48e2a
--- /dev/null
+++ b/libc/machine/arm/armv7-m/Kconfig
@@ -0,0 +1,11 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+config ARMV7M_MEMCPY
+	bool "Enable optimized memcpy() for ARMv7-M"
+	select LIBC_ARCH_MEMCPY
+	depends on ARM_TOOLCHAIN_GNU
+	---help---
+		Enable optimized ARMv7-M specific memcpy() library function
diff --git a/libc/machine/arm/armv7-m/Make.defs b/libc/machine/arm/armv7-m/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..a9985a70b895c1c9a21f10974dc367dff64c0477
--- /dev/null
+++ b/libc/machine/arm/armv7-m/Make.defs
@@ -0,0 +1,53 @@
+############################################################################
+# libc/machine/arm/armv7-m/Make.defs
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+ifeq ($(CONFIG_ARMV7M_MEMCPY),y)
+
+ASRCS += arch_memcpy.S
+
+DEPPATH += --dep-path machine/arm/armv7-m/gnu
+VPATH += :machine/arm/armv7-m/gnu
+
+endif
+
+ifeq ($(CONFIG_LIBC_ARCH_ELF),y)
+
+CSRCS += arch_elf.c
+
+DEPPATH += --dep-path machine/arm/armv7-m
+VPATH += :machine/arm/armv7-m
+
+endif
+
diff --git a/arch/arm/src/armv7-m/up_elf.c b/libc/machine/arm/armv7-m/arch_elf.c
similarity index 91%
rename from arch/arm/src/armv7-m/up_elf.c
rename to libc/machine/arm/armv7-m/arch_elf.c
index bf492f1acaa5ac25ac8a7c1a0aec6fd73f49866f..7e4238e0c9f3777d75c043e64b8f427bae0777d6 100644
--- a/arch/arm/src/armv7-m/up_elf.c
+++ b/libc/machine/arm/armv7-m/arch_elf.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/arm/src/armv7-m/up_elf.c
+ * libc/machine/arm/armv7-m/arch_elf.c
  *
- *   Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -82,7 +82,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
 
   if (ehdr->e_machine != EM_ARM)
     {
-      bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
+      berr("ERROR: Not for ARM: e_machine=%04x\n", ehdr->e_machine);
       return -ENOEXEC;
     }
 
@@ -90,7 +90,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
 
   if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
     {
-      bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
+      berr("ERROR: Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
       return -ENOEXEC;
     }
 
@@ -102,7 +102,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
   if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
 #endif
     {
-      bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
+      berr("ERROR: Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
       return -ENOEXEC;
     }
 
@@ -164,7 +164,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
     case R_ARM_CALL:
     case R_ARM_JUMP24:
       {
-        bvdbg("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
+        binfo("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
               ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
               sym, (long)sym->st_value);
 
@@ -177,7 +177,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
         offset += sym->st_value - addr;
         if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
           {
-            bdbg("  ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
+            berr("ERROR:   ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
                  ELF32_R_TYPE(rel->r_info), offset);
 
             return -EINVAL;
@@ -193,7 +193,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
     case R_ARM_ABS32:
     case R_ARM_TARGET1:  /* New ABI:  TARGET1 always treated as ABS32 */
       {
-        bvdbg("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+        binfo("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
               (long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
 
         *(uint32_t *)addr += sym->st_value;
@@ -204,7 +204,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
     case R_ARM_TARGET2:  /* TARGET2 is a platform-specific relocation: gcc-arm-none-eabi
                           * performs a self relocation */
       {
-        bvdbg("Performing TARGET2 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+        binfo("Performing TARGET2 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
               (long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
 
         *(uint32_t *)addr += sym->st_value - addr;
@@ -253,7 +253,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
         upper_insn = (uint32_t)(*(uint16_t *)addr);
         lower_insn = (uint32_t)(*(uint16_t *)(addr + 2));
 
-        bvdbg("Performing THM_JUMP24 [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
+        binfo("Performing THM_JUMP24 [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
               ELF32_R_TYPE(rel->r_info), (long)addr, (int)upper_insn, (int)lower_insn,
               sym, (long)sym->st_value);
 
@@ -287,7 +287,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 
         /* And perform the relocation */
 
-        bvdbg("  S=%d J1=%d J2=%d offset=%08lx branch target=%08lx\n",
+        binfo("  S=%d J1=%d J2=%d offset=%08lx branch target=%08lx\n",
               S, J1, J2, (long)offset, offset + sym->st_value - addr);
 
         offset += sym->st_value - addr;
@@ -298,7 +298,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 
         if (ELF32_ST_TYPE(sym->st_info) == STT_FUNC && (offset & 1) == 0)
           {
-            bdbg("  ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
+            berr("ERROR:   ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
                  ELF32_R_TYPE(rel->r_info), offset);
 
             return -EINVAL;
@@ -308,7 +308,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 
         if (offset <= (int32_t)0xff000000 || offset >= (int32_t)0x01000000)
           {
-            bdbg("  ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
+            berr("ERROR:   ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
                  ELF32_R_TYPE(rel->r_info), offset);
 
             return -EINVAL;
@@ -328,14 +328,14 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
         lower_insn = ((lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | ((offset >> 1) & 0x07ff));
         *(uint16_t *)(addr + 2) = (uint16_t)lower_insn;
 
-        bvdbg("  S=%d J1=%d J2=%d insn [%04x %04x]\n",
+        binfo("  S=%d J1=%d J2=%d insn [%04x %04x]\n",
               S, J1, J2, (int)upper_insn, (int)lower_insn);
       }
       break;
 
     case R_ARM_V4BX:
       {
-        bvdbg("Performing V4BX link at addr=%08lx [%08lx]\n",
+        binfo("Performing V4BX link at addr=%08lx [%08lx]\n",
               (long)addr, (long)(*(uint32_t *)addr));
 
          /* Preserve only Rm and the condition code */
@@ -350,7 +350,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 
     case R_ARM_PREL31:
       {
-        bvdbg("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+        binfo("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
               (long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
 
         offset            = *(uint32_t *)addr + sym->st_value - addr;
@@ -361,7 +361,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
     case R_ARM_MOVW_ABS_NC:
     case R_ARM_MOVT_ABS:
       {
-        bvdbg("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+        binfo("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
               ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
               sym, (long)sym->st_value);
 
@@ -416,7 +416,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
         upper_insn = (uint32_t)(*(uint16_t *)addr);
         lower_insn = (uint32_t)(*(uint16_t *)(addr + 2));
 
-        bvdbg("Performing THM_MOVx [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
+        binfo("Performing THM_MOVx [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
               ELF32_R_TYPE(rel->r_info), (long)addr, (int)upper_insn, (int)lower_insn,
               sym, (long)sym->st_value);
 
@@ -433,7 +433,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 
         /* And perform the relocation */
 
-        bvdbg("  offset=%08lx branch target=%08lx\n",
+        binfo("  offset=%08lx branch target=%08lx\n",
               (long)offset, offset + sym->st_value);
 
         offset += sym->st_value;
@@ -455,13 +455,13 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
                       (offset & 0x00ff));
         *(uint16_t *)(addr + 2) = (uint16_t)lower_insn;
 
-        bvdbg("  insn [%04x %04x]\n",
+        binfo("  insn [%04x %04x]\n",
              (int)upper_insn, (int)lower_insn);
       }
       break;
 
     default:
-      bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
+      berr("ERROR: Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
       return -EINVAL;
     }
 
@@ -471,7 +471,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
                    uintptr_t addr)
 {
-  bdbg("RELA relocation not supported\n");
+  berr("ERROR: RELA relocation not supported\n");
   return -ENOSYS;
 }
 
diff --git a/arch/arm/src/armv7-m/gnu/up_memcpy.S b/libc/machine/arm/armv7-m/gnu/arch_memcpy.S
similarity index 98%
rename from arch/arm/src/armv7-m/gnu/up_memcpy.S
rename to libc/machine/arm/armv7-m/gnu/arch_memcpy.S
index cf34648d0125500e48a93a89b4583f6eb6a22934..584aaaf9c1e4bdee1649d43538c427ea64792107 100644
--- a/arch/arm/src/armv7-m/gnu/up_memcpy.S
+++ b/libc/machine/arm/armv7-m/gnu/arch_memcpy.S
@@ -1,7 +1,7 @@
 /************************************************************************************
- * nuttx/arch/arm/src/armv7-m/gnu/up_memcpy.S
+ * libc/machine/arm/armv7-m/gnu/up_memcpy.S
  *
- * armv7m-optimised memcpy, contributed by Mike Smith.  Apparently in the public
+ * armv7m-optimized memcpy, contributed by Mike Smith.  Apparently in the public
  * domain and is re-released here under the modified BSD license:
  *
  * Obtained via a posting on the Stellaris forum:
@@ -57,11 +57,9 @@
  ************************************************************************************/
 
 	.global		memcpy
-
 	.syntax		unified
 	.thumb
-	.cpu		cortex-m3
-	.file		"up_memcpy.S"
+	.file		"arch_memcpy.S"
 
 /************************************************************************************
  * .text
@@ -137,7 +135,7 @@ MEM_LongCopyTable:
  * Name: memcpy
  *
  * Description:
- *   Optimised "general" copy routine
+ *   Optimized "general" copy routine
  *
  * Input Parameters:
  *   r0 = destination, r1 = source, r2 = length
diff --git a/libc/machine/arm/armv7-r/Kconfig b/libc/machine/arm/armv7-r/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..e772a2942d58f56a56bd77254d43b7d92d819a0f
--- /dev/null
+++ b/libc/machine/arm/armv7-r/Kconfig
@@ -0,0 +1,11 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+config ARMV7R_MEMCPY
+	bool "Enable optimized memcpy() for ARMv7-R"
+	select LIBC_ARCH_MEMCPY
+	depends on ARM_TOOLCHAIN_GNU
+	---help---
+		Enable optimized ARMv7-R specific memcpy() library function
diff --git a/libc/machine/arm/armv7-r/Make.defs b/libc/machine/arm/armv7-r/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..3f21e0a7e7c74e26b8224b7bac40474c4c5ad12a
--- /dev/null
+++ b/libc/machine/arm/armv7-r/Make.defs
@@ -0,0 +1,52 @@
+############################################################################
+# libc/machine/arm/armv7-r/Make.defs
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+ifeq ($(CONFIG_ARMV7R_MEMCPY),y)
+
+ASRCS += arch_memcpy.S
+
+DEPPATH += --dep-path machine/arm/armv7-r/gnu
+VPATH += :machine/arm/armv7-r/gnu
+
+endif
+
+ifeq ($(CONFIG_LIBC_ARCH_ELF),y)
+
+CSRCS += arch_elf.c
+
+DEPPATH += --dep-path machine/arm/armv7-r
+VPATH += :machine/arm/armv7-r
+
+endif
diff --git a/arch/arm/src/armv7-r/arm_elf.c b/libc/machine/arm/armv7-r/arch_elf.c
similarity index 88%
rename from arch/arm/src/armv7-r/arm_elf.c
rename to libc/machine/arm/armv7-r/arch_elf.c
index 698ecd0084fc3c80ebf5ab99b927d3a810ee4762..36f65fae1f9acfc16b0ff9d8502d6a650f333188 100644
--- a/arch/arm/src/armv7-r/arm_elf.c
+++ b/libc/machine/arm/armv7-r/arch_elf.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/arm/src/armv7-r/arm_elf.c
+ * libc/machine/arm/armv7-r/arm_elf.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -86,7 +86,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
 
   if (ehdr->e_machine != EM_ARM)
     {
-      bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
+      berr("ERROR: Not for ARM: e_machine=%04x\n", ehdr->e_machine);
       return -ENOEXEC;
     }
 
@@ -94,7 +94,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
 
   if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
     {
-      bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
+      berr("ERROR: Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
       return -ENOEXEC;
     }
 
@@ -106,7 +106,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
   if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
 #endif
     {
-      bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
+      berr("ERROR: Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
       return -ENOEXEC;
     }
 
@@ -114,7 +114,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
 
   if ((ehdr->e_entry & 3) != 0)
     {
-      bdbg("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
+      berr("ERROR: Entry point is not properly aligned: %08x\n", ehdr->e_entry);
       return -ENOEXEC;
     }
 
@@ -174,7 +174,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
     case R_ARM_CALL:
     case R_ARM_JUMP24:
       {
-        bvdbg("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
+        binfo("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
               ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
               sym, (long)sym->st_value);
 
@@ -187,8 +187,8 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
         offset += sym->st_value - addr;
         if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
           {
-            bdbg("  ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
-                 ELF32_R_TYPE(rel->r_info), offset);
+            berr("ERROR:   ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
+                  ELF32_R_TYPE(rel->r_info), offset);
 
             return -EINVAL;
           }
@@ -203,7 +203,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
     case R_ARM_ABS32:
     case R_ARM_TARGET1:  /* New ABI:  TARGET1 always treated as ABS32 */
       {
-        bvdbg("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+        binfo("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
               (long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
 
         *(uint32_t *)addr += sym->st_value;
@@ -212,7 +212,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 
     case R_ARM_V4BX:
       {
-        bvdbg("Performing V4BX link at addr=%08lx [%08lx]\n",
+        binfo("Performing V4BX link at addr=%08lx [%08lx]\n",
               (long)addr, (long)(*(uint32_t *)addr));
 
          /* Preserve only Rm and the condition code */
@@ -227,7 +227,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 
     case R_ARM_PREL31:
       {
-        bvdbg("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+        binfo("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
               (long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
 
         offset            = *(uint32_t *)addr + sym->st_value - addr;
@@ -238,7 +238,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
     case R_ARM_MOVW_ABS_NC:
     case R_ARM_MOVT_ABS:
       {
-        bvdbg("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+        binfo("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
               ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
               sym, (long)sym->st_value);
 
@@ -258,7 +258,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
       break;
 
     default:
-      bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
+      berr("ERROR: Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
       return -EINVAL;
     }
 
@@ -268,6 +268,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
                    uintptr_t addr)
 {
-  bdbg("RELA relocation not supported\n");
+  berr("ERROR: RELA relocation not supported\n");
   return -ENOSYS;
 }
diff --git a/arch/arm/src/armv7-a/arm_memcpy.S b/libc/machine/arm/armv7-r/gnu/arch_memcpy.S
similarity index 70%
rename from arch/arm/src/armv7-a/arm_memcpy.S
rename to libc/machine/arm/armv7-r/gnu/arch_memcpy.S
index 48e1294986b1a92468b36270949839cfaa0204ab..d8d3d2202efca39bf11c71a227426a4ac71d9cab 100644
--- a/arch/arm/src/armv7-a/arm_memcpy.S
+++ b/libc/machine/arm/armv7-r/gnu/arch_memcpy.S
@@ -1,9 +1,14 @@
 /************************************************************************************
- * nuttx/arch/arm/src/armv7-a/arm_memcpy.S
+ * libc/marchine/arm/armv7-r/arm_memcpy.S
+ * ARMv7-R optimized memcpy.
  *
- * ARMv7-A optimised memcpy, based on the ARMv7-M version contributed by Mike Smith.
- * Apparently in the public domain and is re-released here under the modified BSD
- * license:
+ * Adapted for use with ARMv7-R and NuttX by:
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Based on the ARMv7-M version contributed by Mike Smith.  Apparently in the public
+ * domain and is re-released here under the modified BSD license:
  *
  * Obtained via a posting on the Stellaris forum:
  *  http://e2e.ti.com/support/microcontrollers/\
@@ -57,11 +62,9 @@
  * Public Symbols
  ************************************************************************************/
 
-	.global		memcpy
-
-	.syntax		unified
-
-	.file		"arm_memcpy.S"
+	.global	memcpy
+	.syntax	unified
+	.file	"arch_memcpy.S"
 
 /************************************************************************************
  * .text
@@ -97,38 +100,36 @@
  */
 
 MEM_DataCopyTable:
-	.byte	(MEM_DataCopy0 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy1 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy2 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy3 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy4 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy5 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy6 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy7 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy8 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy9 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy10 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy11 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy12 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy13 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy14 - MEM_DataCopyJump) >> 1
-	.byte	(MEM_DataCopy15 - MEM_DataCopyJump) >> 1
+	.byte	(MEM_DataCopy0  - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy1  - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy2  - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy3  - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy4  - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy5  - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy6  - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy7  - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy8  - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy9  - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy10 - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy11 - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy12 - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy13 - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy14 - MEM_DataCopyJump) >> 2
+	.byte	(MEM_DataCopy15 - MEM_DataCopyJump) >> 2
 
 	.align 2
 
 MEM_LongCopyTable:
-	.byte	(MEM_LongCopyEnd - MEM_LongCopyJump) >> 1	/* 0 bytes left */
-	.byte	0					/* 4 bytes left */
-	.byte	(1 * 10) >> 1		/* 8 bytes left */
-	.byte	(2 * 10) >> 1		/* 12 bytes left */
-	.byte	(3 * 10) >> 1		/* 16 bytes left */
-	.byte	(4 * 10) >> 1		/* 20 bytes left */
-	.byte	(5 * 10) >> 1		/* 24 bytes left */
-	.byte	(6 * 10) >> 1		/* 28 bytes left */
-	.byte	(7 * 10) >> 1		/* 32 bytes left */
-	.byte	(8 * 10) >> 1		/* 36 bytes left */
-
-	.align 2
+	.byte	(MEM_LongCopyEnd   - MEM_LongCopyJump) >> 2	/* 0 bytes left */
+	.byte	(MEM_LongCopyJump0 - MEM_LongCopyJump) >> 2	/* 4 bytes left */
+	.byte	(MEM_LongCopyJump1 - MEM_LongCopyJump) >> 2	/* 8 bytes left */
+	.byte	(MEM_LongCopyJump2 - MEM_LongCopyJump) >> 2	/* 12 bytes left */
+	.byte	(MEM_LongCopyJump3 - MEM_LongCopyJump) >> 2	/* 16 bytes left */
+	.byte	(MEM_LongCopyJump4 - MEM_LongCopyJump) >> 2	/* 20 bytes left */
+	.byte	(MEM_LongCopyJump5 - MEM_LongCopyJump) >> 2	/* 24 bytes left */
+	.byte	(MEM_LongCopyJump6 - MEM_LongCopyJump) >> 2	/* 28 bytes left */
+	.byte	(MEM_LongCopyJump7 - MEM_LongCopyJump) >> 2	/* 32 bytes left */
+	.byte	(MEM_LongCopyJump8 - MEM_LongCopyJump) >> 2	/* 36 bytes left */
 
 /************************************************************************************
  * Public Functions
@@ -137,7 +138,7 @@ MEM_LongCopyTable:
  * Name: memcpy
  *
  * Description:
- *   Optimised "general" copy routine
+ *   Optimized "general" copy routine
  *
  * Input Parameters:
  *   r0 = destination, r1 = source, r2 = length
@@ -160,20 +161,27 @@ memcpy:
 
 _do_memcpy:
 	push    {r14}
+	push    {r4}
 
 	/* This allows the inner workings to "assume" a minimum amount of bytes */
 	/* Quickly check for very short copies */
 
 	cmp		r2, #4
-	blt.n	MEM_DataCopyBytes
+	blt		MEM_DataCopyBytes
 
 	and		r14, r0, #3		 		/* Get destination alignment bits */
 	bfi		r14, r1, #2, #2	 		/* Get source alignment bits */
-	ldr		r3, =MEM_DataCopyTable	/* Jump table base */
-	tbb		[r3, r14]		   		/* Perform jump on src/dst alignment bits */
-MEM_DataCopyJump:
+
+	ldr		r3, =MEM_DataCopyTable	/* Jump table base address */
+	ldrb	r4, [r3, r14]			/* DWord offset for this alignment combination */
+	ldr		r3, =MEM_DataCopyJump	/* Base of branch table anchor */
+	add		r3, r3, r4, lsl #2		/* Absolute address of logic */
+	bx		r3
+
+	/* data copy branch table anchor */
 
 	.align 4
+MEM_DataCopyJump:
 
 /* Bits:  Src=01, Dst=01 - Byte before half word to byte before half word - Same alignment
  * 3 bytes to read for long word aligning
@@ -207,12 +215,12 @@ MEM_DataCopy15:
 MEM_DataCopy0:
 	/* Save regs that may be used by memcpy */
 
-	push	{r4-r12}
+	push	{r5-r12}
 
 	/* Check for short word-aligned copy */
 
 	cmp		r2, #0x28
-	blt.n	MEM_DataCopy0_2
+	blt		MEM_DataCopy0_2
 
 	/* Bulk copy loop */
 
@@ -221,49 +229,69 @@ MEM_DataCopy0_1:
 	stmia	r0!, {r3-r12}
 	sub		r2, r2, #0x28
 	cmp		r2, #0x28
-	bge.n	MEM_DataCopy0_1
+	bge		MEM_DataCopy0_1
 
 	/* Copy remaining long words */
 
 MEM_DataCopy0_2:
-	/* Copy remaining long words */
-
-	ldr		r14, =MEM_LongCopyTable
-	lsr		r11, r2, #0x02
-	tbb		[r14, r11]
+	ldr		r14, =MEM_LongCopyTable	/* Jump table base address */
+	lsr		r11, r2, 2				/* Convert byte count to word count */
+	add		r14, r14, r11			/* Jump table offset address */
+	ldrb	r3, [r14]				/* DWord offset from branch table anchor */
+	ldr		r11, =MEM_LongCopyJump	/* Address of branch table anchor */
+	add		r11, r11, r3, lsl #2	/* Absolute address into branch table */
+	bx		r11						/* Go there */
 
 	/* longword copy branch table anchor */
 
 MEM_LongCopyJump:
-	ldr.w	r3, [r1], #0x04		/* 4 bytes remain */
-	str.w	r3, [r0], #0x04
-	b.n		MEM_LongCopyEnd
-	ldmia.w	r1!, {r3-r4}		/* 8 bytes remain */
-	stmia.w	r0!, {r3-r4}
-	b.n		MEM_LongCopyEnd
-	ldmia.w	r1!, {r3-r5}		/* 12 bytes remain */
-	stmia.w	r0!, {r3-r5}
-	b.n		MEM_LongCopyEnd
-	ldmia.w	r1!, {r3-r6}		/* 16 bytes remain */
-	stmia.w	r0!, {r3-r6}
-	b.n		MEM_LongCopyEnd
-	ldmia.w	r1!, {r3-r7}		/* 20 bytes remain */
-	stmia.w	r0!, {r3-r7}
-	b.n		MEM_LongCopyEnd
-	ldmia.w	r1!, {r3-r8}		/* 24 bytes remain */
-	stmia.w	r0!, {r3-r8}
-	b.n		MEM_LongCopyEnd
-	ldmia.w	r1!, {r3-r9}		/* 28 bytes remain */
-	stmia.w	r0!, {r3-r9}
-	b.n		MEM_LongCopyEnd
-	ldmia.w	r1!, {r3-r10}		/* 32 bytes remain */
-	stmia.w	r0!, {r3-r10}
-	b.n		MEM_LongCopyEnd
-	ldmia.w	r1!, {r3-r11}		/* 36 bytes remain */
-	stmia.w	r0!, {r3-r11}
+
+MEM_LongCopyJump0:
+	ldr		r3, [r1], #0x04		/* 4 bytes remain */
+	str		r3, [r0], #0x04
+	b		MEM_LongCopyEnd
+
+MEM_LongCopyJump1:
+	ldmia	r1!, {r3-r4}		/* 8 bytes remain */
+	stmia	r0!, {r3-r4}
+	b		MEM_LongCopyEnd
+
+MEM_LongCopyJump2:
+	ldmia	r1!, {r3-r5}		/* 12 bytes remain */
+	stmia	r0!, {r3-r5}
+	b		MEM_LongCopyEnd
+
+MEM_LongCopyJump3:
+	ldmia	r1!, {r3-r6}		/* 16 bytes remain */
+	stmia	r0!, {r3-r6}
+	b		MEM_LongCopyEnd
+
+MEM_LongCopyJump4:
+	ldmia	r1!, {r3-r7}		/* 20 bytes remain */
+	stmia	r0!, {r3-r7}
+	b		MEM_LongCopyEnd
+
+MEM_LongCopyJump5:
+	ldmia	r1!, {r3-r8}		/* 24 bytes remain */
+	stmia	r0!, {r3-r8}
+	b		MEM_LongCopyEnd
+
+MEM_LongCopyJump6:
+	ldmia	r1!, {r3-r9}		/* 28 bytes remain */
+	stmia	r0!, {r3-r9}
+	b		MEM_LongCopyEnd
+
+MEM_LongCopyJump7:
+	ldmia	r1!, {r3-r10}		/* 32 bytes remain */
+	stmia	r0!, {r3-r10}
+	b		MEM_LongCopyEnd
+
+MEM_LongCopyJump8:
+	ldmia	r1!, {r3-r11}		/* 36 bytes remain */
+	stmia	r0!, {r3-r11}
 
 MEM_LongCopyEnd:
-	pop		{r4-r12}
+	pop		{r5-r12}
 	and		r2, r2, #0x03		/* All the longs have been copied */
 
 	/* Deal with up to 3 remaining bytes */
@@ -271,19 +299,23 @@ MEM_LongCopyEnd:
 MEM_DataCopyBytes:
 	/* Deal with up to 3 remaining bytes */
 
+	pop		{r4}
 	cmp		r2, #0x00
 	it		eq
 	popeq	{pc}
+
 	ldrb	r3, [r1], #0x01
 	strb	r3, [r0], #0x01
 	subs	r2, r2, #0x01
 	it		eq
 	popeq	{pc}
+
 	ldrb	r3, [r1], #0x01
 	strb	r3, [r0], #0x01
 	subs	r2, r2, #0x01
 	it		eq
 	popeq	{pc}
+
 	ldrb	r3, [r1], #0x01
 	strb	r3, [r0], #0x01
 	pop		{pc}
@@ -321,11 +353,11 @@ MEM_DataCopy13:
 
 MEM_DataCopy2:
 	cmp		r2, #0x28
-	blt.n	MEM_DataCopy2_1
+	blt		MEM_DataCopy2_1
 
 	/* Save regs */
 
-	push	{r4-r12}
+	push	{r5-r12}
 
 	/* Bulk copy loop */
 
@@ -358,18 +390,18 @@ MEM_DataCopy2_2:
 
 	sub		r2, r2, #0x28
 	cmp		r2, #0x28
-	bge.n	MEM_DataCopy2_2
-	pop		{r4-r12}
+	bge		MEM_DataCopy2_2
+	pop		{r5-r12}
 
 MEM_DataCopy2_1: /* Read longs and write 2 x half words */
 	cmp		r2, #4
-	blt.n	MEM_DataCopyBytes
+	blt		MEM_DataCopyBytes
 	ldr		r3, [r1], #0x04
 	strh	r3, [r0], #0x02
 	lsr		r3, r3, #0x10
 	strh	r3, [r0], #0x02
 	sub		r2, r2, #0x04
-	b.n		MEM_DataCopy2
+	b		MEM_DataCopy2
 
 /* Bits:  Src=01, Dst=00 - Byte before half word to long
  * Bits:  Src=01, Dst=10 - Byte before half word to half word
@@ -423,7 +455,7 @@ MEM_DataCopy3:
 	lsr		r3, r3, #0x10
 	strb	r3, [r0], #0x01
 	sub		r2, r2, #0x04
-	b.n		MEM_DataCopy3
+	b		MEM_DataCopy3
 
 	.size	memcpy, .-memcpy
 	.end
diff --git a/libc/machine/arm/armv8/Kconfig b/libc/machine/arm/armv8/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..002c44d1f9f29fa9c721ec49564c991ed4d44b5f
--- /dev/null
+++ b/libc/machine/arm/armv8/Kconfig
@@ -0,0 +1,27 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_CORTEXM33
+
+config ARMV8_LIBM
+	bool "Architecture specific optimizations"
+	default n
+	select LIBM_ARCH_CEIL if CONFIG_ARCH_DPFPU
+	select LIBM_ARCH_FLOOR if CONFIG_ARCH_DPFPU
+	select LIBM_ARCH_NEARBYINT if CONFIG_ARCH_DPFPU
+	select LIBM_ARCH_RINT if CONFIG_ARCH_DPFPU
+	select LIBM_ARCH_ROUND if CONFIG_ARCH_DPFPU
+	select LIBM_ARCH_TRUNC if CONFIG_ARCH_DPFPU
+	select LIBM_ARCH_CEILF if CONFIG_ARCH_FPU
+	select LIBM_ARCH_FLOORF if CONFIG_ARCH_FPU
+	select LIBM_ARCH_NEARBYINTF if CONFIG_ARCH_FPU
+	select LIBM_ARCH_RINTF if CONFIG_ARCH_FPU
+	select LIBM_ARCH_ROUNDF if CONFIG_ARCH_FPU
+	select LIBM_ARCH_TRUNCF if CONFIG_ARCH_FPU
+	depends on LIBM
+	---help---
+		Enable ARMv8 specific floating point optimizations.
+
+endif
diff --git a/libc/machine/arm/armv8/Make.defs b/libc/machine/arm/armv8/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..4339d241bcd0181ea6356573e8a3877e864c2559
--- /dev/null
+++ b/libc/machine/arm/armv8/Make.defs
@@ -0,0 +1,89 @@
+############################################################################
+# libc/machine/arm/armv8/Make.defs
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+ifeq ($(CONFIG_ARMV8_LIBM),y)
+
+ifeq ($(LIBM_ARCH_CEIL),y)
+CSRCS += arch_ceil.c
+endif
+
+ifeq ($(LIBM_ARCH_CEILF),y)
+CSRCS += arch_ceilf.c
+endif
+
+ifeq ($(LIBM_ARCH_FLOOR),y)
+CSRCS += arch_floor.c
+endif
+
+ifeq ($(LIBM_ARCH_FLOORF),y)
+CSRCS += arch_floorf.c
+endif
+
+ifeq ($(LIBM_ARCH_NEARBYINT),y)
+CSRCS += arch_nearbyint.c
+endif
+
+ifeq ($(LIBM_ARCH_NEARBYINTF),y)
+CSRCS += arch_nearbyintf.c
+endif
+
+ifeq ($(LIBM_ARCH_RINTF),y)
+CSRCS += arch_rintf.c
+endif
+
+ifeq ($(LIBM_ARCH_ROUNDF),y)
+CSRCS += arch_roundf.c
+endif
+
+ifeq ($(LIBM_ARCH_TRUNCF),y)
+CSRCS += arch_truncf.c
+endif
+
+ifeq ($(LIBM_ARCH_RINT),y)
+CSRCS += arch_rint.c
+endif
+
+ifeq ($(LIBM_ARCH_ROUND),y)
+CSRCS += arch_round.c
+endif
+
+ifeq ($(LIBM_ARCH_TRUNC),y)
+CSRCS += arch_trunc.c
+endif
+
+DEPPATH += --dep-path machine/arm/armv8
+VPATH += :machine/arm/armv8
+
+endif # CONFIG_ARMV8_LIBM
diff --git a/libc/machine/arm/armv8/arch_ceil.c b/libc/machine/arm/armv8/arch_ceil.c
new file mode 100644
index 0000000000000000000000000000000000000000..ab951545b909381fa74597bf224d78ae94efa95a
--- /dev/null
+++ b/libc/machine/arm/armv8/arch_ceil.c
@@ -0,0 +1,57 @@
+/****************************************************************************
+ * libc/machine/arm/armv8/arch_ceil.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *
+ * Adapted for NuttX from BSD licensed code provided by ARM:
+ *
+ *   Copyright (c) 2011, 2012 ARM Ltd.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ *    products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#if __ARM_ARCH >= 8 && (__ARM_FP & 0x8) && !defined (__SOFTFP__)
+
+double ceil(double x)
+{
+  double result;
+  asm volatile ( "vrintp.f64\t%P0, %P1" : "=w" (result) : "w" (x) );
+  return result;
+}
+
+#else
+#  warning ceil() not built
+#endif
diff --git a/libc/machine/arm/armv8/arch_ceilf.c b/libc/machine/arm/armv8/arch_ceilf.c
new file mode 100644
index 0000000000000000000000000000000000000000..8763e7104b60cf4a9a675f39ab4fa4454e5b79cc
--- /dev/null
+++ b/libc/machine/arm/armv8/arch_ceilf.c
@@ -0,0 +1,57 @@
+/****************************************************************************
+ * libc/machine/arm/armv8/arch_ceilf.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *
+ * Adapted for NuttX from BSD licensed code provided by ARM:
+ *
+ *   Copyright (c) 2011, 2012 ARM Ltd.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ *    products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#if __ARM_ARCH >= 8 && !defined (__SOFTFP__)
+
+float ceilf(float x)
+{
+  float result;
+  asm volatile ( "vrintp.f32\t%0, %1" : "=t" (result) : "t" (x) );
+  return result;
+}
+
+#else
+#  warning ceilf() not built
+#endif
diff --git a/libc/machine/arm/armv8/arch_floor.c b/libc/machine/arm/armv8/arch_floor.c
new file mode 100644
index 0000000000000000000000000000000000000000..ac3afdd4941d2c0369df9b1adfc30b70db2530f3
--- /dev/null
+++ b/libc/machine/arm/armv8/arch_floor.c
@@ -0,0 +1,57 @@
+/****************************************************************************
+ * libc/machine/arm/armv8/arch_floor.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *
+ * Adapted for NuttX from BSD licensed code provided by ARM:
+ *
+ *   Copyright (c) 2011, 2012 ARM Ltd.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ *    products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#if __ARM_ARCH >= 8 && (__ARM_FP & 0x8) && !defined (__SOFTFP__)
+
+double floor(double x)
+{
+  double result;
+  asm volatile ("vrintm.f64\t%P0, %P1" : "=w" (result) : "w" (x));
+  return result;
+}
+
+#else
+#  warning floor() not built
+#endif
diff --git a/libc/machine/arm/armv8/arch_floorf.c b/libc/machine/arm/armv8/arch_floorf.c
new file mode 100644
index 0000000000000000000000000000000000000000..0172bffee8eddb9b8f99fe7f11304f210ec190dc
--- /dev/null
+++ b/libc/machine/arm/armv8/arch_floorf.c
@@ -0,0 +1,57 @@
+/****************************************************************************
+ * libc/machine/arm/armv8/arch_floorf.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *
+ * Adapted for NuttX from BSD licensed code provided by ARM:
+ *
+ *   Copyright (c) 2011, 2012 ARM Ltd.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ *    products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#if __ARM_ARCH >= 8 && !defined (__SOFTFP__)
+
+float floorf(float x)
+{
+  float result;
+  asm volatile ( "vrintm.f32\t%0, %1" : "=t" (result) : "t" (x) );
+  return result;
+}
+
+#else
+#  warning floorf() not built
+#endif
diff --git a/libc/machine/arm/armv8/arch_nearbyint.c b/libc/machine/arm/armv8/arch_nearbyint.c
new file mode 100644
index 0000000000000000000000000000000000000000..8345d7de1e8f61093b4af8b953b35e3fd19ac54d
--- /dev/null
+++ b/libc/machine/arm/armv8/arch_nearbyint.c
@@ -0,0 +1,57 @@
+/****************************************************************************
+ * libc/machine/arm/armv8/arch_nearbyint.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *
+ * Adapted for NuttX from BSD licensed code provided by ARM:
+ *
+ *   Copyright (c) 2011, 2012 ARM Ltd.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ *    products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#if __ARM_ARCH >= 8 && (__ARM_FP & 0x8) && !defined (__SOFTFP__)
+
+double nearbyint(double x)
+{
+  double result;
+  asm volatile ("vrintr.f64\t%P0, %P1" : "=w" (result) : "w" (x));
+  return result;
+}
+
+#else
+#  warning nearbyint() not built
+#endif
diff --git a/libc/machine/arm/armv8/arch_nearbyintf.c b/libc/machine/arm/armv8/arch_nearbyintf.c
new file mode 100644
index 0000000000000000000000000000000000000000..a2a1d2d77f36f665fc98f3f0da2a00fdf36bf43b
--- /dev/null
+++ b/libc/machine/arm/armv8/arch_nearbyintf.c
@@ -0,0 +1,57 @@
+/****************************************************************************
+ * libc/machine/arm/armv8/arch_nearbyintf.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *
+ * Adapted for NuttX from BSD licensed code provided by ARM:
+ *
+ *   Copyright (c) 2011, 2012 ARM Ltd.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ *    products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#if __ARM_ARCH >= 8 && !defined (__SOFTFP__)
+
+float nearbyintf(float x)
+{
+  float result;
+  asm volatile ("vrintr.f32\t%0, %1" : "=t" (result) : "t" (x));
+  return result;
+}
+
+#else
+#  warning nearbyintf() not built
+#endif
diff --git a/libc/machine/arm/armv8/arch_rint.c b/libc/machine/arm/armv8/arch_rint.c
new file mode 100644
index 0000000000000000000000000000000000000000..6b1223e6c085e2ab30402131fe9148723c3464be
--- /dev/null
+++ b/libc/machine/arm/armv8/arch_rint.c
@@ -0,0 +1,57 @@
+/****************************************************************************
+ * libc/machine/arm/armv8/arch_rint.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *
+ * Adapted for NuttX from BSD licensed code provided by ARM:
+ *
+ *   Copyright (c) 2011, 2012 ARM Ltd.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ *    products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#if __ARM_ARCH >= 8 && (__ARM_FP & 0x8) && !defined (__SOFTFP__)
+
+double rint(double x)
+{
+  double result;
+  asm volatile ("vrintx.f64\t%P0, %P1" : "=w" (result) : "w" (x));
+  return result;
+}
+
+#else
+#  warning rint() not built
+#endif
diff --git a/libc/machine/arm/armv8/arch_rintf.c b/libc/machine/arm/armv8/arch_rintf.c
new file mode 100644
index 0000000000000000000000000000000000000000..e6d73a2185cea0c59bb61cb4432b0ac33666e4cb
--- /dev/null
+++ b/libc/machine/arm/armv8/arch_rintf.c
@@ -0,0 +1,57 @@
+/****************************************************************************
+ * libc/machine/arm/armv8/arch_rintf.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *
+ * Adapted for NuttX from BSD licensed code provided by ARM:
+ *
+ *   Copyright (c) 2011, 2012 ARM Ltd.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ *    products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#if __ARM_ARCH >= 8 && !defined (__SOFTFP__)
+
+float rintf(float x)
+{
+  float result;
+  asm volatile ("vrintx.f32\t%0, %1" : "=t" (result) : "t" (x));
+  return result;
+}
+
+#else
+#  warning rintf() not built
+#endif
diff --git a/libc/machine/arm/armv8/arch_round.c b/libc/machine/arm/armv8/arch_round.c
new file mode 100644
index 0000000000000000000000000000000000000000..e4efa0a27bcbc9194b2800af9bd1d7139114d512
--- /dev/null
+++ b/libc/machine/arm/armv8/arch_round.c
@@ -0,0 +1,57 @@
+/****************************************************************************
+ * libc/machine/arm/armv8/arch_round.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *
+ * Adapted for NuttX from BSD licensed code provided by ARM:
+ *
+ *   Copyright (c) 2011, 2012 ARM Ltd.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ *    products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#if __ARM_ARCH >= 8 && (__ARM_FP & 0x8) && !defined (__SOFTFP__)
+
+double round(double x)
+{
+  double result;
+  asm volatile ("vrinta.f64\t%P0, %P1" : "=w" (result) : "w" (x));
+  return result;
+}
+
+#else
+#  warning round() not built
+#endif
diff --git a/libc/machine/arm/armv8/arch_roundf.c b/libc/machine/arm/armv8/arch_roundf.c
new file mode 100644
index 0000000000000000000000000000000000000000..53b7571c581097e3f2c1b90655185c264618a484
--- /dev/null
+++ b/libc/machine/arm/armv8/arch_roundf.c
@@ -0,0 +1,57 @@
+/****************************************************************************
+ * libc/machine/arm/armv8/arch_roundf.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *
+ * Adapted for NuttX from BSD licensed code provided by ARM:
+ *
+ *   Copyright (c) 2011, 2012 ARM Ltd.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ *    products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#if __ARM_ARCH >= 8 && !defined (__SOFTFP__)
+
+float roundf(float x)
+{
+  float result;
+  asm volatile ("vrinta.f32\t%0, %1" : "=t" (result) : "t" (x));
+  return result;
+}
+
+#else
+#  warning roundf() not built
+#endif
diff --git a/libc/machine/arm/armv8/arch_trunc.c b/libc/machine/arm/armv8/arch_trunc.c
new file mode 100644
index 0000000000000000000000000000000000000000..e8a16d4c6f545e345a7e5f62ec27a494f71f27d5
--- /dev/null
+++ b/libc/machine/arm/armv8/arch_trunc.c
@@ -0,0 +1,57 @@
+/****************************************************************************
+ * libc/machine/arm/armv8/arch_trunc.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *
+ * Adapted for NuttX from BSD licensed code provided by ARM:
+ *
+ *   Copyright (c) 2011, 2012 ARM Ltd.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ *    products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#if __ARM_ARCH >= 8 && (__ARM_FP & 0x8) && !defined (__SOFTFP__)
+
+double trunc(double x)
+{
+  double result;
+  asm volatile ("vrintz.f64\t%P0, %P1" : "=w" (result) : "w" (x));
+  return result;
+}
+
+#else
+#  warning trunc() not built
+#endif
diff --git a/libc/machine/arm/armv8/arch_truncf.c b/libc/machine/arm/armv8/arch_truncf.c
new file mode 100644
index 0000000000000000000000000000000000000000..02f3d581d2b966a87cf5de9f19775e4648e55b17
--- /dev/null
+++ b/libc/machine/arm/armv8/arch_truncf.c
@@ -0,0 +1,57 @@
+/****************************************************************************
+ * libc/machine/arm/armv8/arch_truncf.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *
+ * Adapted for NuttX from BSD licensed code provided by ARM:
+ *
+ *   Copyright (c) 2011, 2012 ARM Ltd.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ *    products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#if __ARM_ARCH >= 8 && !defined (__SOFTFP__)
+
+float truncf(float x)
+{
+  float result;
+  asm volatile ("vrintz.f32\t%0, %1" : "=t" (result) : "t" (x));
+  return result;
+}
+
+#else
+#  warning truncf() not built
+#endif
diff --git a/drivers/sercomm/Kconfig b/libc/machine/sim/Kconfig
similarity index 100%
rename from drivers/sercomm/Kconfig
rename to libc/machine/sim/Kconfig
diff --git a/libc/machine/sim/Make.defs b/libc/machine/sim/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..85a9ccda3151f9bde13e64c947ba5ca344a4f49b
--- /dev/null
+++ b/libc/machine/sim/Make.defs
@@ -0,0 +1,43 @@
+############################################################################
+# libc/machine/sim/Make.defs
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+ifeq ($(CONFIG_LIBC_ARCH_ELF),y)
+
+CSRCS += arch_elf.c
+
+DEPPATH += --dep-path machine/sim
+VPATH += :machine/sim
+
+endif
diff --git a/arch/sim/src/up_elf.c b/libc/machine/sim/arch_elf.c
similarity index 96%
rename from arch/sim/src/up_elf.c
rename to libc/machine/sim/arch_elf.c
index ecc4f2d2fee18f22d11de17e5ad2c308ee4a5466..30bcd53788c7a13351c256fc0200b371ec6249a9 100644
--- a/arch/sim/src/up_elf.c
+++ b/libc/machine/sim/arch_elf.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/sim/src/up_elf.c
+ * machine/sim/arm_elf.c
  *
- *   Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -125,7 +125,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
        break;
 
      case R_386_PC32:
-       *ptr += sym->st_value - (uint32_t)ptr;
+       *ptr += sym->st_value - (uint32_t)((uintptr_t)ptr);
        break;
 
      default:
@@ -138,7 +138,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
                    uintptr_t addr)
 {
-  bdbg("Not supported\n");
+  berr("ERROR: Not supported\n");
   return -ENOSYS;
 }
 
diff --git a/libc/machine/x86/Kconfig b/libc/machine/x86/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..f72f3c094ce4c8f031445c514c343376e4e79e75
--- /dev/null
+++ b/libc/machine/x86/Kconfig
@@ -0,0 +1,4 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
diff --git a/libc/machine/x86/Make.defs b/libc/machine/x86/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..282d7d450b45fa9664b24c2fc1e88ed8b6103731
--- /dev/null
+++ b/libc/machine/x86/Make.defs
@@ -0,0 +1,43 @@
+############################################################################
+# libc/machine/x86/Make.defs
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+ifeq ($(CONFIG_LIBC_ARCH_ELF),y)
+
+CSRCS += arch_elf.c
+
+DEPPATH += --dep-path machine/x86
+VPATH += :machine/x86
+
+endif
diff --git a/arch/x86/src/common/up_elf.c b/libc/machine/x86/arch_elf.c
similarity index 97%
rename from arch/x86/src/common/up_elf.c
rename to libc/machine/x86/arch_elf.c
index 894f8657864a6f03033bda7bff7d2ddb46307227..ca815451fd41133542b014f188075dff361206e3 100644
--- a/arch/x86/src/common/up_elf.c
+++ b/libc/machine/x86/arch_elf.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/x86/src/up_elf.c
+ * machine/x86/src/up_elf.c
  *
- *   Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2014, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -146,7 +146,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
 int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
                    uintptr_t addr)
 {
-  bdbg("Not supported\n");
+  bwarn("WARNING: Not supported\n");
   return -ENOSYS;
 }
-
diff --git a/libc/math/Kconfig b/libc/math/Kconfig
index 6fb14ec27243a611de8ec75b5b0f145df15a53af..c7e5feb991c47fe69b99b7da966146153836592e 100644
--- a/libc/math/Kconfig
+++ b/libc/math/Kconfig
@@ -3,6 +3,8 @@
 # see the file kconfig-language.txt in the NuttX tools repository.
 #
 
+#menu "Math Library Support"
+
 config LIBM
 	bool "Standard Math library"
 	default n
@@ -17,10 +19,13 @@ config LIBM
 
 		Another possibility is that you have a custom, architecture-specific math
 		libary and that the corresponding math.h file resides at arch//include/math.h.
-		The option is selected via ARCH_MATH_H.  If ARCH_MATH_H is selected,then the include/nuttx/math.h
-		header file will be copied to include/math.h where it can be used by your applications.
+		The option is selected via ARCH_MATH_H.  If ARCH_MATH_H is selected,then the
+		include/nuttx/libmath.h header file will be copied to include/math.h where it can
+		be used by your applications.
 
 		If ARCH_MATH_H is not defined, then this option can be selected to build a generic,
 		math library built into NuttX.  This math library comes from the Rhombus OS and
 		was written by Nick Johnson.  The Rhombus OS math library port was contributed by
 		Darcy Gong.
+
+#endmenu # Math Library Support
diff --git a/libc/math/Make.defs b/libc/math/Make.defs
index cf25a1ec76da20267477c94f25928e109637acc2..7ead14882a3617cdb693705f20196cd5b167998a 100644
--- a/libc/math/Make.defs
+++ b/libc/math/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # libc/math/Make.defs
 #
-#   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -37,28 +37,73 @@ ifeq ($(CONFIG_LIBM),y)
 
 # Add the floating point math C files to the build
 
-CSRCS += lib_acosf.c lib_asinf.c lib_atan2f.c lib_atanf.c lib_ceilf.c lib_cosf.c
-CSRCS += lib_coshf.c  lib_expf.c lib_fabsf.c lib_floorf.c lib_fmodf.c lib_frexpf.c
-CSRCS += lib_ldexpf.c lib_logf.c lib_log10f.c lib_log2f.c lib_modff.c lib_powf.c
-CSRCS += lib_rintf.c lib_roundf.c lib_sinf.c lib_sinhf.c lib_sqrtf.c lib_tanf.c
-CSRCS += lib_tanhf.c lib_asinhf.c lib_acoshf.c lib_atanhf.c lib_erff.c lib_copysignf.c
-CSRCS += lib_truncf.c
+CSRCS += lib_acosf.c lib_asinf.c lib_atan2f.c lib_atanf.c lib_cosf.c
+CSRCS += lib_coshf.c  lib_expf.c lib_fabsf.c lib_fmodf.c lib_frexpf.c
+CSRCS += lib_ldexpf.c lib_logf.c lib_log10f.c lib_log2f.c lib_modff.c
+CSRCS += lib_powf.c lib_sinf.c lib_sinhf.c lib_sqrtf.c lib_tanf.c
+CSRCS += lib_tanhf.c lib_asinhf.c lib_acoshf.c lib_atanhf.c lib_erff.c
+CSRCS += lib_copysignf.c
 
-CSRCS += lib_acos.c lib_asin.c lib_atan.c lib_atan2.c lib_ceil.c lib_cos.c
-CSRCS += lib_cosh.c lib_exp.c lib_fabs.c lib_floor.c lib_fmod.c lib_frexp.c
-CSRCS += lib_ldexp.c lib_log.c lib_log10.c lib_log2.c lib_modf.c lib_pow.c
-CSRCS += lib_rint.c lib_round.c lib_sin.c lib_sinh.c lib_sqrt.c lib_tan.c
-CSRCS += lib_tanh.c lib_asinh.c lib_acosh.c lib_atanh.c lib_erf.c lib_copysign.c
-CSRCS += lib_trunc.c
+CSRCS += lib_acos.c lib_asin.c lib_atan.c lib_atan2.c lib_cos.c
+CSRCS += lib_cosh.c lib_exp.c lib_fabs.c lib_fmod.c lib_frexp.c
+CSRCS += lib_ldexp.c lib_log.c lib_log10.c lib_log2.c lib_modf.c
+CSRCS += lib_pow.c lib_sin.c lib_sinh.c lib_sqrt.c lib_tan.c
+CSRCS += lib_tanh.c lib_asinh.c lib_acosh.c lib_atanh.c lib_erf.c
+CSRCS += lib_copysign.c
 
-CSRCS += lib_acosl.c lib_asinl.c lib_atan2l.c lib_atanl.c lib_ceill.c lib_cosl.c
-CSRCS += lib_coshl.c lib_expl.c lib_fabsl.c lib_floorl.c lib_fmodl.c lib_frexpl.c
-CSRCS += lib_ldexpl.c lib_logl.c lib_log10l.c lib_log2l.c lib_modfl.c lib_powl.c
-CSRCS += lib_rintl.c lib_roundl.c lib_sinl.c lib_sinhl.c lib_sqrtl.c lib_tanl.c
-CSRCS += lib_tanhl.c lib_asinhl.c lib_acoshl.c lib_atanhl.c lib_erfl.c lib_copysignl.c
+CSRCS += lib_acosl.c lib_asinl.c lib_atan2l.c lib_atanl.c lib_ceill.c
+CSRCS += lib_cosl.c lib_coshl.c lib_expl.c lib_fabsl.c lib_floorl.c
+CSRCS += lib_fmodl.c lib_frexpl.c lib_ldexpl.c lib_logl.c lib_log10l.c
+CSRCS += lib_log2l.c lib_modfl.c lib_powl.c lib_rintl.c lib_roundl.c
+CSRCS += lib_sinl.c lib_sinhl.c lib_sqrtl.c lib_tanl.c lib_tanhl.c
+CSRCS += lib_asinhl.c lib_acoshl.c lib_atanhl.c lib_erfl.c lib_copysignl.c
 CSRCS += lib_truncl.c
 
 CSRCS += lib_libexpi.c lib_libsqrtapprox.c
+CSRCS += lib_libexpif.c
+
+# Use the C versions of some functions only if architecture specific
+# optimized versions are not provided.
+
+ifneq ($(LIBM_ARCH_CEIL),y)
+CSRCS += lib_ceil.c
+endif
+
+ifneq ($(LIBM_ARCH_FLOOR),y)
+CSRCS += lib_floor.c
+endif
+
+ifneq ($(LIBM_ARCH_RINT),y)
+CSRCS += lib_rint.c
+endif
+
+ifneq ($(LIBM_ARCH_ROUND),y)
+CSRCS += lib_round.c
+endif
+
+ifneq ($(LIBM_ARCH_TRUNC),y)
+CSRCS += lib_trunc.c
+endif
+
+ifneq ($(LIBM_ARCH_CEILF),y)
+CSRCS += lib_ceilf.c
+endif
+
+ifneq ($(LIBM_ARCH_FLOORF),y)
+CSRCS += lib_floorf.c
+endif
+
+ifneq ($(LIBM_ARCH_RINTF),y)
+CSRCS += lib_rintf.c
+endif
+
+ifneq ($(LIBM_ARCH_ROUNDF),y)
+CSRCS += lib_roundf.c
+endif
+
+ifneq ($(LIBM_ARCH_TRUNCF),y)
+CSRCS += lib_truncf.c
+endif
 
 # Add the floating point math directory to the build
 
diff --git a/libc/math/lib_acos.c b/libc/math/lib_acos.c
index 4903af43bc6ff2893e37e6d65c90036e72c08ca5..aedc155e3d9f2171186613d645f6e7e95f1521b4 100644
--- a/libc/math/lib_acos.c
+++ b/libc/math/lib_acos.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_acosf.c b/libc/math/lib_acosf.c
index 6719e54a67df2f3309a3a1b8d708500e0d763859..58b90f37145e164974fb173bc02f7488c0cccade 100644
--- a/libc/math/lib_acosf.c
+++ b/libc/math/lib_acosf.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
@@ -37,5 +37,5 @@
 
 float acosf(float x)
 {
-  return (M_PI_2 - asinf(x));
+  return (M_PI_2_F - asinf(x));
 }
diff --git a/libc/math/lib_acoshf.c b/libc/math/lib_acoshf.c
index a676d6a40e4b28c4efcf5d6e13fdcbd56083c0a7..4b42e968d7c11baf381713a013677b1d825ace03 100644
--- a/libc/math/lib_acoshf.c
+++ b/libc/math/lib_acoshf.c
@@ -48,5 +48,5 @@
 
 float acoshf(float x)
 {
-  return logf(x + sqrtf(x * x - 1));
+  return logf(x + sqrtf(x * x - 1.0F));
 }
diff --git a/libc/math/lib_acosl.c b/libc/math/lib_acosl.c
index f13cb00a04fc46af0a27127f94c5b8b31828c832..c2ae58c3a42737d5d33883a8eb0e61937350913e 100644
--- a/libc/math/lib_acosl.c
+++ b/libc/math/lib_acosl.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_asin.c b/libc/math/lib_asin.c
index 2f45a24a1d9ecf142176e2d1806cf0cf82dcde55..688b108c891a249e8f0e42366cb51ccf736706f1 100644
--- a/libc/math/lib_asin.c
+++ b/libc/math/lib_asin.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
@@ -35,6 +35,8 @@
 #include 
 #include 
 
+#ifdef CONFIG_HAVE_DOUBLE
+
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
@@ -42,16 +44,40 @@
 #undef  DBL_EPSILON
 #define DBL_EPSILON 1e-12
 
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/* This lib uses Newton's method to approximate asin(x).  Newton's Method
+ * converges very slowly for x close to 1.  We can accelerate convergence
+ * with the following identy:  asin(x)=Sign(x)*(Pi/2-asin(sqrt(1-x^2)))
+ */
+
+static double asin_aux(double x)
+{
+  long double y;
+  double y_cos, y_sin;
+
+  y = 0.0;
+  y_sin = 0.0;
+
+  while (fabs(y_sin - x) > DBL_EPSILON)
+    {
+      y_cos = cos(y);
+      y -= ((long double)y_sin - (long double)x) / (long double)y_cos;
+      y_sin = sin(y);
+    }
+
+  return y;
+}
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
-#ifdef CONFIG_HAVE_DOUBLE
 double asin(double x)
 {
-  long double y;
-  long double y_sin;
-  long double y_cos;
+  double y;
 
   /* Verify that the input value is in the domain of the function */
 
@@ -60,26 +86,19 @@ double asin(double x)
       return NAN;
     }
 
-  y = 0;
+  /* if x is > sqrt(2), use identity for faster convergence */
 
-  while (1)
+  if (fabs(x) > 0.71)
     {
-      y_sin = sin(y);
-      y_cos = cos(y);
-
-      if (y > M_PI_2 || y < -M_PI_2)
-        {
-          y = fmod(y, M_PI);
-        }
-
-      if (y_sin + DBL_EPSILON >= x && y_sin - DBL_EPSILON <= x)
-        {
-          break;
-        }
-
-      y = y - (y_sin - x) / y_cos;
+      y = M_PI_2 - asin_aux(sqrt(1.0 - x * x));
+      y = copysign(y, x);
+    }
+  else
+    {
+      y = asin_aux(x);
     }
 
   return y;
 }
-#endif
+
+#endif /* CONFIG_HAVE_DOUBLE */
diff --git a/libc/math/lib_asinf.c b/libc/math/lib_asinf.c
index e22d32fe7921c9c409ea51cc1efb92e0d1f8c193..5d223fe55123f3471f0e6217fcaabed015853192 100644
--- a/libc/math/lib_asinf.c
+++ b/libc/math/lib_asinf.c
@@ -3,10 +3,10 @@
  *
  * This file is a part of NuttX:
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
@@ -33,33 +33,58 @@
 #include 
 
 /****************************************************************************
- * Public Functions
+ * Private Functions
  ****************************************************************************/
 
-float asinf(float x)
+/* This lib uses Newton's method to approximate asin(x).  Newton's Method
+ * converges very slowly for x close to 1.  We can accelerate convergence
+ * with the following identy:  asin(x)=Sign(x)*(Pi/2-asin(sqrt(1-x^2)))
+ */
+
+static float asinf_aux(float x)
 {
-  long double y, y_sin, y_cos;
+  double y;
+  float  y_sin, y_cos;
 
-  y = 0;
+  y = 0.0;
+  y_sin = 0.0F;
 
-  while (1)
+  while (fabsf(y_sin - x) > FLT_EPSILON)
     {
-      y_sin = sinf(y);
       y_cos = cosf(y);
+      y -= ((double)y_sin - (double)x) / (double)y_cos;
+      y_sin = sinf(y);
+    }
 
-      if (y > M_PI_2 || y < -M_PI_2)
-        {
-          y = fmodf(y, M_PI);
-        }
+  return y;
+}
 
-      if (y_sin + FLT_EPSILON >= x && y_sin - FLT_EPSILON <= x)
-        {
-          break;
-        }
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
 
-      y = y - (y_sin - x) / y_cos;
+float asinf(float x)
+{
+  float y;
+
+  /* Verify that the input value is in the domain of the function */
+
+  if (x < -1.0F || x > 1.0F || isnan(x))
+    {
+      return NAN_F;
+    }
+
+  /* if x is > sqrt(2), use identity for faster convergence */
+
+  if (fabsf(x) > 0.71F)
+    {
+      y = M_PI_2_F - asinf_aux(sqrtf(1.0F - x * x));
+      y = copysignf(y, x);
+    }
+  else
+    {
+      y = asinf_aux(x);
     }
 
   return y;
 }
-
diff --git a/libc/math/lib_asinhf.c b/libc/math/lib_asinhf.c
index ba749a6569f56b1e51e3733bfb62f4a76a7d3e4e..4c26d038ea1293ea92f30d9e8d16cdb5fb89f611 100644
--- a/libc/math/lib_asinhf.c
+++ b/libc/math/lib_asinhf.c
@@ -48,5 +48,5 @@
 
 float asinhf(float x)
 {
-  return logf(x + sqrtf(x * x + 1));
+  return logf(x + sqrtf(x * x + 1.0F));
 }
diff --git a/libc/math/lib_asinl.c b/libc/math/lib_asinl.c
index 466910daf31318879f53e5c2ad334d005dce50da..5fc3896a7ebd390ffd025b13bf400d42e7574e56 100644
--- a/libc/math/lib_asinl.c
+++ b/libc/math/lib_asinl.c
@@ -3,10 +3,10 @@
  *
  * This file is a part of NuttX:
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
@@ -35,35 +35,57 @@
 #include 
 #include 
 
+#ifdef CONFIG_HAVE_LONG_DOUBLE
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
-#ifdef CONFIG_HAVE_LONG_DOUBLE
-long double asinl(long double x)
+static long double asinl_aux(long double x)
 {
-  long double y, y_sin, y_cos;
+  long double y, y_cos, y_sin;
 
-  y = 0;
+  y = 0.0;
+  y_sin = 0.0;
 
-  while (1)
+  while (fabsl(y_sin - x) > DBL_EPSILON)
     {
-      y_sin = sinl(y);
       y_cos = cosl(y);
+      y -= (y_sin - x) / y_cos;
+      y_sin = sinl(y);
+    }
+
+  return y;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+long double asinl(long double x)
+{
+  long double y;
+
+  /* Verify that the input value is in the domain of the function */
 
-      if (y > M_PI_2 || y < -M_PI_2)
-        {
-          y = fmodl(y, M_PI);
-        }
+  if (x < -1.0 || x > 1.0 || isnan(x))
+    {
+      return NAN;
+    }
 
-      if (y_sin + LDBL_EPSILON >= x && y_sin - LDBL_EPSILON <= x)
-        {
-          break;
-        }
+  /* if x is > sqrt(2), use identity for faster convergence */
 
-      y = y - (y_sin - x) / y_cos;
+  if (fabsl(x) > 0.71)
+    {
+      y = M_PI_2 - asinl_aux(sqrtl(1.0 - x * x));
+      y = copysignl(y, x);
+    }
+  else
+    {
+      y = asinl_aux(x);
     }
 
   return y;
 }
-#endif
+
+#endif /* CONFIG_HAVE_LONG_DOUBLE */
diff --git a/libc/math/lib_atan.c b/libc/math/lib_atan.c
index 91930bf03e2cff670bb461643b9047dd58d46989..3384348040e95d0733a18d8f60ae73156600ed8b 100644
--- a/libc/math/lib_atan.c
+++ b/libc/math/lib_atan.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_atan2.c b/libc/math/lib_atan2.c
index 5b0f7e2989d134db4287d7360f2d9f88abf43a0b..bbc953e5caeac09550f10c5be5df5067c7a58f92 100644
--- a/libc/math/lib_atan2.c
+++ b/libc/math/lib_atan2.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_atan2f.c b/libc/math/lib_atan2f.c
index 5d766df99dbead8bdea17c5f803f4b59799f6d20..5dafe974ebfb98f92e57ed1f18d90693e773ad27 100644
--- a/libc/math/lib_atan2f.c
+++ b/libc/math/lib_atan2f.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
@@ -43,22 +43,22 @@ float atan2f(float y, float x)
     }
   else if (y >= 0 && x < 0)
     {
-      return atanf(y / x) + M_PI;
+      return atanf(y / x) + M_PI_F;
     }
   else if (y < 0)
     {
       if (x == 0)
         {
-          return -M_PI_2;
+          return -M_PI_2_F;
         }
       else /* Can only be x < 0 */
         {
-          return atanf(y / x) - M_PI;
+          return atanf(y / x) - M_PI_F;
         }
     }
   else if (y > 0 && x == 0)
     {
-      return M_PI_2;
+      return M_PI_2_F;
     }
   else /* if (y == 0 && x == 0) Undefined but returns normally 0 */
     {
diff --git a/libc/math/lib_atan2l.c b/libc/math/lib_atan2l.c
index 4c384e808929a0e565079dace1433654c95f2ebf..7ee8a251c800552c56cf45bd13d44623b02da08a 100644
--- a/libc/math/lib_atan2l.c
+++ b/libc/math/lib_atan2l.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_atanf.c b/libc/math/lib_atanf.c
index c9835c6f24da72593d61b98e471459bb67b78421..702819d6d8c692e66ba8079d1d696ed2d56d4e0a 100644
--- a/libc/math/lib_atanf.c
+++ b/libc/math/lib_atanf.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
@@ -39,5 +39,5 @@
 
 float atanf(float x)
 {
-  return asinf(x / sqrtf(x * x + 1));
+  return asinf(x / sqrtf(x * x + 1.0F));
 }
diff --git a/libc/math/lib_atanhf.c b/libc/math/lib_atanhf.c
index 60a6696f73eccd4d2efa83522e220e2f1ef982ef..a54090f51709287530018effa1d7af71372fc63e 100644
--- a/libc/math/lib_atanhf.c
+++ b/libc/math/lib_atanhf.c
@@ -48,5 +48,5 @@
 
 float atanhf(float x)
 {
-  return 0.5 * logf((1 + x) / (1 - x));
+  return 0.5F * logf((1.0F + x) / (1.0F - x));
 }
diff --git a/libc/math/lib_atanl.c b/libc/math/lib_atanl.c
index 50376c26a0031a583753c4512ec9bf171c130070..53f4b9700c03f3c717ac7c75c489d9e8556e19a4 100644
--- a/libc/math/lib_atanl.c
+++ b/libc/math/lib_atanl.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_ceil.c b/libc/math/lib_ceil.c
index 6d367a51c76ba2c2839049b9cea4ba364059077c..329e20b24ffe8853554541bfd088dd5677417001 100644
--- a/libc/math/lib_ceil.c
+++ b/libc/math/lib_ceil.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_ceilf.c b/libc/math/lib_ceilf.c
index 8378141abdc77e037fcf3ec99024f1d63b784a15..d9394bd8a176c3fba5d36734ddf22bbb08d77f01 100644
--- a/libc/math/lib_ceilf.c
+++ b/libc/math/lib_ceilf.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
@@ -38,9 +38,9 @@
 float ceilf(float x)
 {
   modff(x, &x);
-  if (x > 0.0)
+  if (x > 0.0F)
     {
-      x += 1.0;
+      x += 1.0F;
     }
 
   return x;
diff --git a/libc/math/lib_ceill.c b/libc/math/lib_ceill.c
index ac54c2c3db359d8a9c9954cd6d07a3d8923118e3..2e16ab73add265c15be9cfb008928b9b5cca7671 100644
--- a/libc/math/lib_ceill.c
+++ b/libc/math/lib_ceill.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_copysignf.c b/libc/math/lib_copysignf.c
index 9684f68a746131509aaea2385ad88cae79823284..c438e7d43ae2779350b837923943b6182b44afad 100644
--- a/libc/math/lib_copysignf.c
+++ b/libc/math/lib_copysignf.c
@@ -1,10 +1,20 @@
 /****************************************************************************
  * libc/math/lib_copysignf.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2016 Gregory Nutt. All rights reserved.
  *   Authors: Gregory Nutt 
  *            Dave Marples 
  *
+ * Replaced on 2016-07-30 by David Alession with a faster version of
+ * copysignf() from NetBSD with the following Copyright:
+ *
+ *   Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ *   Developed at SunPro, a Sun Microsystems, Inc. business.
+ *   Permission to use, copy, modify, and distribute this
+ *   software is freely granted, provided that this notice
+ *   is preserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
@@ -42,6 +52,44 @@
 #include 
 
 #include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Get a 32 bit int from a float.  */
+
+#define GET_FLOAT_WORD(i,d) \
+  do \
+    { \
+      ieee_float_shape_type gf_u; \
+      gf_u.value = (d); \
+      (i) = gf_u.word; \
+    } while (0)
+
+/* Set a float from a 32 bit int.  */
+
+#define SET_FLOAT_WORD(d,i) \
+  do \
+    { \
+      ieee_float_shape_type sf_u; \
+      sf_u.word = (i); \
+      (d) = sf_u.value; \
+    } while (0)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* union which permits us to convert between a float and a 32 bit int.  */
+
+typedef union
+{
+  float   value;
+  uint32_t word;
+}
+ieee_float_shape_type;
 
 /****************************************************************************
  * Public Functions
@@ -49,10 +97,12 @@
 
 float copysignf(float x, float y)
 {
-  if (y < 0)
-    {
-      return -fabsf(x);
-    }
+  uint32_t ix;
+  uint32_t iy;
+
+  GET_FLOAT_WORD(ix, x);
+  GET_FLOAT_WORD(iy, y);
+  SET_FLOAT_WORD(x, (ix & 0x7fffffff) | (iy & 0x80000000));
 
-  return fabsf(x);
+  return x;
 }
diff --git a/libc/math/lib_cos.c b/libc/math/lib_cos.c
index 34d90716af2d188ef8a1d6a006e3853cabb2b3e8..689882c581bfe7f8a51392140a63a891ac77733d 100644
--- a/libc/math/lib_cos.c
+++ b/libc/math/lib_cos.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_cosf.c b/libc/math/lib_cosf.c
index 55ba93c1c8558eca6d84e9e92b574d1cb0b76ee7..ba45d7e32bd71d8805848b7151aeb4ef1f3bc4e3 100644
--- a/libc/math/lib_cosf.c
+++ b/libc/math/lib_cosf.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
@@ -37,5 +37,5 @@
 
 float cosf(float x)
 {
-  return sinf(x + M_PI_2);
+  return sinf(x + M_PI_2_F);
 }
diff --git a/libc/math/lib_cosh.c b/libc/math/lib_cosh.c
index 73283589b5dead02e0f1dc78e56e5aa3af7aeb1a..0d1f71fc76275202849b257cf0d5b50567e045ce 100644
--- a/libc/math/lib_cosh.c
+++ b/libc/math/lib_cosh.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_coshf.c b/libc/math/lib_coshf.c
index 7cb575822f24a2c3cc24934383e227f22910edc3..bf234377bfced5e483c2f830e4f0ceb203c2fd97 100644
--- a/libc/math/lib_coshf.c
+++ b/libc/math/lib_coshf.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
@@ -38,5 +38,5 @@
 float coshf(float x)
 {
   x = expf(x);
-  return ((x + (1.0 / x)) / 2.0);
+  return ((x + (1.0F / x)) / 2.0F);
 }
diff --git a/libc/math/lib_coshl.c b/libc/math/lib_coshl.c
index 445629c24ec53a7680e8e9641e117749458ef19e..3bce6ac7c0ca0e03d6fb9331ffbf6d640092fd8c 100644
--- a/libc/math/lib_coshl.c
+++ b/libc/math/lib_coshl.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_cosl.c b/libc/math/lib_cosl.c
index 89109db77d9c17fb72c2085b94d63b8225eb1582..8fbf5a9df92f495df354a487786238f8f05ece1c 100644
--- a/libc/math/lib_cosl.c
+++ b/libc/math/lib_cosl.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_erf.c b/libc/math/lib_erf.c
index 1923638dbad1a4311afe95a66e303c72e2637c36..28f266196f09c3c989cf7171c0afce977ebb1502 100644
--- a/libc/math/lib_erf.c
+++ b/libc/math/lib_erf.c
@@ -1,6 +1,7 @@
 /****************************************************************************
  * libc/math/lib_erf.c
  *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Copyright (C) 2015 Brennan Ashton. All rights reserved.
  *   Author: Brennan Ashton 
  *
@@ -42,31 +43,42 @@
 
 #include 
 
+#ifdef CONFIG_HAVE_DOUBLE
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define  A1     0.254829592
+#define  A2   (-0.284496736)
+#define  A3     1.421413741
+#define  A4   (-1.453152027)
+#define  A5     1.061405429
+#define  P      0.3275911
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
-#ifdef CONFIG_HAVE_DOUBLE
+/****************************************************************************
+ * Name: erf
+ *
+ * Description:
+ *   This implementation comes from the Handbook of Mathmatical Functions
+ *   The implementations in this book are not protected by copyright.
+ *   erf comes from formula 7.1.26
+ *
+ ****************************************************************************/
+
 double erf(double x)
 {
-  /* This implementation comes from the Handbook of Mathmatical Functions
-   * The implementations in this book are not protected by copyright.
-   * erf comes from formula 7.1.26
-   */
-
-  char sign;
   double t;
-  double a1, a2, a3, a4, a5, p;
-
-  a1 =  0.254829592;
-  a2 = -0.284496736;
-  a3 =  1.421413741;
-  a4 = -1.453152027;
-  a5 =  1.061405429;
-  p  =  0.3275911;
+  double z;
 
-  sign = (x >= 0 ? 1 : -1);
-  t = 1.0/(1.0 + p*x);
-  return sign * (1.0 - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * expf(-x * x));
+  z = fabs(x);
+  t = 1.0 / (1.0 + P * z);
+  t = 1.0 - (((((A5 * t + A4) * t) + A3) * t + A2) * t + A1) * t * exp(-z * z);
+  return copysign(t, x);
 }
-#endif
+
+#endif /* CONFIG_HAVE_DOUBLE */
diff --git a/libc/math/lib_erff.c b/libc/math/lib_erff.c
index 75199c828c2e9649d17e27de4c8e03dca29203d2..8ca0fefb0fef47e64dd7aafa2c70db977c617e0e 100644
--- a/libc/math/lib_erff.c
+++ b/libc/math/lib_erff.c
@@ -1,6 +1,7 @@
 /****************************************************************************
  * libc/math/lib_erff.c
  *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Copyright (C) 2015 Brennan Ashton. All rights reserved.
  *   Author: Brennan Ashton 
  *
@@ -42,29 +43,38 @@
 
 #include 
 
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define  A1     0.254829592F
+#define  A2   (-0.284496736F)
+#define  A3     1.421413741F
+#define  A4   (-1.453152027F)
+#define  A5     1.061405429F
+#define  P      0.3275911F
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
+/****************************************************************************
+ * Name: erff
+ *
+ * Description:
+ *   This implementation comes from the Handbook of Mathmatical Functions
+ *   The implementations in this book are not protected by copyright.
+ *   erf comes from formula 7.1.26
+ *
+ ****************************************************************************/
+
 float erff(float x)
 {
-  /* This implementation comes from the Handbook of Mathmatical Functions
-   * The implementations in this book are not protected by copyright.
-   * erf comes from formula 7.1.26
-   */
-
-  char sign;
   float t;
-  float a1, a2, a3, a4, a5, p;
-
-  a1 =  0.254829592;
-  a2 = -0.284496736;
-  a3 =  1.421413741;
-  a4 = -1.453152027;
-  a5 =  1.061405429;
-  p  =  0.3275911;
+  float z;
 
-  sign = (x >= 0 ? 1 : -1);
-  t = 1.0/(1.0 + p*x);
-  return sign * (1.0 - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * expf(-x * x));
+  z = fabsf(x);
+  t = 1.0F / (1.0F + P * z);
+  t = 1.0F - (((((A5 * t + A4) * t) + A3) * t + A2) * t + A1) * t * expf(-z * z);
+  return copysignf(t, x);
 }
diff --git a/libc/math/lib_erfl.c b/libc/math/lib_erfl.c
index 44d62389808f4b86d7ef57dd3d8924a104ec86bf..2e674bb14973f993a8ef80cf6aa8ed9570bbb7d4 100644
--- a/libc/math/lib_erfl.c
+++ b/libc/math/lib_erfl.c
@@ -46,6 +46,13 @@
  * Public Functions
  ****************************************************************************/
 
+#define  A1     0.254829592
+#define  A2   (-0.284496736)
+#define  A3     1.421413741
+#define  A4   (-1.453152027)
+#define  A5     1.061405429
+#define  P      0.3275911
+
 #ifdef CONFIG_HAVE_LONG_DOUBLE
 long double erfl(long double x)
 {
@@ -54,19 +61,11 @@ long double erfl(long double x)
    * erf comes from formula 7.1.26
    */
 
-  char sign;
-  long double t;
-  long double a1, a2, a3, a4, a5, p;
-
-  a1 =  0.254829592;
-  a2 = -0.284496736;
-  a3 =  1.421413741;
-  a4 = -1.453152027;
-  a5 =  1.061405429;
-  p  =  0.3275911;
+  long double t, z;
 
-  sign = (x >= 0 ? 1 : -1);
-  t = 1.0/(1.0 + p*x);
-  return sign * (1.0 - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * expf(-x * x));
+  z = fabsl(x);
+  t = 1.0 / (1.0 + P * z);
+  t = 1.0 - (((((A5 * t + A4) * t) + A3) * t + A2) * t + A1) * t * expl(-z * z);
+  return copysignl(t, x);
 }
 #endif
diff --git a/libc/math/lib_exp.c b/libc/math/lib_exp.c
index 211b23bf95231094d49ffbd2e738479f0464d4b7..414f0c29f1055ee6c914c3c4c2ac45924868caea 100644
--- a/libc/math/lib_exp.c
+++ b/libc/math/lib_exp.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_expf.c b/libc/math/lib_expf.c
index 4ce5208607bd8d5a772aef5523af558bb684d4fe..4426fc9847b9f5b16f0bc7b2b8a305c53b5689b2 100644
--- a/libc/math/lib_expf.c
+++ b/libc/math/lib_expf.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
@@ -89,8 +89,8 @@ float expf(float x)
 
   /* Perform Taylor series approximation with eleven terms */
 
-  value = 0.0;
-  x0 = 1.0;
+  value = 0.0F;
+  x0 = 1.0F;
   for (i = 0; i < 10; i++)
     {
       value += x0 * _flt_inv_fact[i];
@@ -99,11 +99,11 @@ float expf(float x)
 
   /* Multiply by exp of the integer component */
 
-  value *= lib_expi(int_part);
+  value *= lib_expif(int_part);
 
   if (invert)
     {
-      return (1.0 / value);
+      return (1.0F / value);
     }
   else
     {
diff --git a/libc/math/lib_expl.c b/libc/math/lib_expl.c
index 1021017ca3265a19bdba7858cf36727c2fcaf3a4..7c69e2d086d64f1e8402a9062ceb5551096e93a3 100644
--- a/libc/math/lib_expl.c
+++ b/libc/math/lib_expl.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_fabs.c b/libc/math/lib_fabs.c
index 35f98e6818f4852bc04a08083db90a79f2c5e0f2..fbf4286e0c3eab2e99a7a86a15ec3c201bce57cd 100644
--- a/libc/math/lib_fabs.c
+++ b/libc/math/lib_fabs.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_fabsf.c b/libc/math/lib_fabsf.c
index 2bee12097df69f2d5cf1462fb393e78dcb189cd3..e2b5639638b55a380d44350d1665a0dab75a80e1 100644
--- a/libc/math/lib_fabsf.c
+++ b/libc/math/lib_fabsf.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_fabsl.c b/libc/math/lib_fabsl.c
index 1762f9141685f480ace4eb34a26c49f1a24d3a37..72be15a9fd8b9a3472c35bbbb4870f2aae5cab1d 100644
--- a/libc/math/lib_fabsl.c
+++ b/libc/math/lib_fabsl.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_floor.c b/libc/math/lib_floor.c
index f583dfa6b72f8f1478a59297957cc7337b117ba5..a31c2f521a29430179eb6079b78b5eddd33fc3c5 100644
--- a/libc/math/lib_floor.c
+++ b/libc/math/lib_floor.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
@@ -41,12 +41,26 @@
 #ifdef CONFIG_HAVE_DOUBLE
 double floor(double x)
 {
-  modf(x, &x);
-  if (x < 0.0)
+  double modx;
+
+  /* modf() will return the integer part of X.  The return value of floor
+   * differs for non-integer, negative values.
+   *
+   *  x   modf  floor
+   * ---- ----- -----
+   *  2.0  2.0   2.0
+   *  2.4  2.0   2.0
+   *  2.9  2.0   2.0
+   * -2.7 -2.0  -3.0
+   * -2.0 -2.0  -2.0
+   */
+
+  (void)modf(x, &modx);
+  if (x < 0.0 && x < modx)
     {
-      x -= 1.0;
+      modx -= 1.0;
     }
 
-  return x;
+  return modx;
 }
 #endif
diff --git a/libc/math/lib_floorf.c b/libc/math/lib_floorf.c
index 4a4ef1a4f7a28527964492e619bc0a20ae9baeba..4e5ed950fdde8bc113fa36457d4ac1a2e734976c 100644
--- a/libc/math/lib_floorf.c
+++ b/libc/math/lib_floorf.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
@@ -37,11 +37,25 @@
 
 float floorf(float x)
 {
-  modff(x, &x);
-  if (x < 0.0)
+  float modx;
+
+  /* modf() will return the integer part of X.  The return value of floor
+   * differs for non-integer, negative values.
+   *
+   *  x   modff floor
+   * ---- ----- -----
+   *  2.0  2.0   2.0
+   *  2.4  2.0   2.0
+   *  2.9  2.0   2.0
+   * -2.7 -2.0  -3.0
+   * -2.0 -2.0  -2.0
+   */
+
+  (void)modff(x, &modx);
+  if (x < 0.0F && x < modx)
     {
-      x -= 1.0;
+      modx -= 1.0F;
     }
 
-  return x;
+  return modx;
 }
diff --git a/libc/math/lib_floorl.c b/libc/math/lib_floorl.c
index 214ade8ee28ea0b658b4c3e8b5c97e29d604ffee..9ffc7fd0e96b41aba85d446e0aac33dc53e36bcb 100644
--- a/libc/math/lib_floorl.c
+++ b/libc/math/lib_floorl.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
@@ -41,12 +41,27 @@
 #ifdef CONFIG_HAVE_LONG_DOUBLE
 long double floorl(long double x)
 {
-  modfl(x, &x);
-  if (x < 0.0)
+  long double modx;
+
+  /* modf() will return the integer part of X.  The return value of floor
+   * differs for non-integer, negative values.
+   *
+   *  x   modfl floor
+   * ---- ----- -----
+   *  2.0  2.0   2.0
+   *  2.4  2.0   2.0
+   *  2.9  2.0   2.0
+   * -2.7 -2.0  -3.0
+   * -2.0 -2.0  -2.0
+   */
+
+  (void)modfl(x, &modx);
+  if (x < 0.0 && x < modx)
     {
-      x -= 1.0;
+      modx -= 1.0;
     }
 
-  return x;
+  return modx;
+
 }
 #endif
diff --git a/libc/math/lib_fmod.c b/libc/math/lib_fmod.c
index e096d62988899aa4a9dd00a7bf3965b7e9d75f48..010cacefff68e6e68d2e4c96964c881d1121f59a 100644
--- a/libc/math/lib_fmod.c
+++ b/libc/math/lib_fmod.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_fmodf.c b/libc/math/lib_fmodf.c
index ba2d375b8e6dbeca44257be7c39d068adc6f10b3..0e02f857376950a111c2b1f267f1d90af25b57b0 100644
--- a/libc/math/lib_fmodf.c
+++ b/libc/math/lib_fmodf.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_fmodl.c b/libc/math/lib_fmodl.c
index f72f2de4d74b2f071db82ef089ae519649b36995..c04715ceebd16146221b88a6745e1d5e9b03c2af 100644
--- a/libc/math/lib_fmodl.c
+++ b/libc/math/lib_fmodl.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_frexp.c b/libc/math/lib_frexp.c
index 12eccadbe74e8bcd254e7eedbf1c0498d009fa7c..dd632e469000368a5913e34cf066309093da7fcc 100644
--- a/libc/math/lib_frexp.c
+++ b/libc/math/lib_frexp.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_frexpf.c b/libc/math/lib_frexpf.c
index 6ec5aa74425c9dd2adc2252f8513f923db0b579c..e63f42587a6aa47e18c5418c77fb462d3c67ab0c 100644
--- a/libc/math/lib_frexpf.c
+++ b/libc/math/lib_frexpf.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
@@ -38,5 +38,5 @@
 float frexpf(float x, int *exponent)
 {
   *exponent = (int)ceilf(log2f(x));
-  return x / ldexpf(1.0, *exponent);
+  return x / ldexpf(1.0F, *exponent);
 }
diff --git a/libc/math/lib_frexpl.c b/libc/math/lib_frexpl.c
index ae2ec4eb73db346f8ab7cdc5fbeab6ef6e3d90e1..dcdc54e3246fc7df987999a4b51974c54d51d6ed 100644
--- a/libc/math/lib_frexpl.c
+++ b/libc/math/lib_frexpl.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_ldexp.c b/libc/math/lib_ldexp.c
index ac4d23dccbcec563e07b7964d13479b03e6c0576..5a154ef1d28fa2e76db6fca9e09be4fbc0697699 100644
--- a/libc/math/lib_ldexp.c
+++ b/libc/math/lib_ldexp.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_ldexpf.c b/libc/math/lib_ldexpf.c
index 12503438b8a4485491d357c47a050d8cbdf7ffb6..fe8c994459bddba4b1c24c750a84d09f138571b5 100644
--- a/libc/math/lib_ldexpf.c
+++ b/libc/math/lib_ldexpf.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
@@ -37,5 +37,5 @@
 
 float ldexpf(float x, int n)
 {
-  return (x * powf(2.0, (float)n));
+  return (x * powf(2.0F, (float)n));
 }
diff --git a/libc/math/lib_ldexpl.c b/libc/math/lib_ldexpl.c
index da02bf7e606a5d6a920752c1d9de7e5725a88b80..b707f342b05f344ac461bab69b26ab1e0035a0c2 100644
--- a/libc/math/lib_ldexpl.c
+++ b/libc/math/lib_ldexpl.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_libexpi.c b/libc/math/lib_libexpi.c
index c8f5793d390286cab704041f450b022780fcdeab..33b31d271703dc2a03cfda8923aad2e3f2c8a8cf 100644
--- a/libc/math/lib_libexpi.c
+++ b/libc/math/lib_libexpi.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
@@ -43,34 +43,32 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-#define M_E2    (M_E * M_E)
-#define M_E4    (M_E2 * M_E2)
-#define M_E8    (M_E4 * M_E4)
-#define M_E16   (M_E8 * M_E8)
-#define M_E32   (M_E16 * M_E16)
-#define M_E64   (M_E32 * M_E32)
-#define M_E128  (M_E64 * M_E64)
+#define M_E2    (M_E    * M_E)
+#define M_E4    (M_E2   * M_E2)
+#define M_E8    (M_E4   * M_E4)
+#define M_E16   (M_E8   * M_E8)
+#define M_E32   (M_E16  * M_E16)
+#define M_E64   (M_E32  * M_E32)
+#define M_E128  (M_E64  * M_E64)
 #define M_E256  (M_E128 * M_E128)
 #define M_E512  (M_E256 * M_E256)
-#define M_E1024 (M_E512 * M_E512)
 
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
-static double _expi_square_tbl[11] =
+static const double g_expi_square_tbl[] =
 {
-  M_E,                          /* e^1 */
-  M_E2,                         /* e^2 */
-  M_E4,                         /* e^4 */
-  M_E8,                         /* e^8 */
-  M_E16,                        /* e^16 */
-  M_E32,                        /* e^32 */
-  M_E64,                        /* e^64 */
-  M_E128,                       /* e^128 */
-  M_E256,                       /* e^256 */
-  M_E512,                       /* e^512 */
-  M_E1024,                      /* e^1024 */
+  M_E,          /* e^1 */
+  M_E2,         /* e^2 */
+  M_E4,         /* e^4 */
+  M_E8,         /* e^8 */
+  M_E16,        /* e^16 */
+  M_E32,        /* e^32 */
+  M_E64,        /* e^64 */
+  M_E128,       /* e^128 */
+  M_E256,       /* e^256 */
+  M_E512        /* e^512 */
 };
 
 /****************************************************************************
@@ -82,22 +80,23 @@ double lib_expi(size_t n)
   size_t i;
   double val;
 
-  if (n > 1024)
+  /* The largest calculable value for n is floor(ln(DBL_MAX)) */
+
+  if (n > 709)
     {
       return INFINITY;
     }
 
   val = 1.0;
 
-  for (i = 0; n; i++)
+  for (i = 0; n != 0; i++)
     {
-      if (n & (1 << i))
+      if ((n & (1 << i)) != 0)
         {
           n   &= ~(1 << i);
-          val *= _expi_square_tbl[i];
+          val *= g_expi_square_tbl[i];
         }
     }
 
   return val;
 }
-
diff --git a/libc/math/lib_libexpif.c b/libc/math/lib_libexpif.c
new file mode 100644
index 0000000000000000000000000000000000000000..d2b8a980666dc73c3363a1194c895969e4cdc0f3
--- /dev/null
+++ b/libc/math/lib_libexpif.c
@@ -0,0 +1,100 @@
+/****************************************************************************
+ * libc/math/lib_libexpif.c
+ *
+ * This file is a part of NuttX:
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Ported by: Darcy Gong/Gregory Nutt
+ *
+ * It derives from the Rhombus OS math library by Nick Johnson which has
+ * a compatibile, MIT-style license:
+ *
+ * Copyright (C) 2009-2011 Nick Johnson 
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#include 
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define M_E2     (M_E   * M_E)
+#define M_E4     (M_E2  * M_E2)
+#define M_E8     (M_E4  * M_E4)
+#define M_E16    (M_E8  * M_E8)
+#define M_E32    (M_E16 * M_E16)
+#define M_E64    (M_E32 * M_E32)
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Values above M_E64 will never be used since it’s larger than FLT_MAX
+ *(3.402823e+38).
+ */
+
+static const float g_expif_square_tbl[] =
+{
+  (float)M_E,    /* e^1 */
+  (float)M_E2,   /* e^2 */
+  (float)M_E4,   /* e^4 */
+  (float)M_E8,   /* e^8 */
+  (float)M_E16,  /* e^16 */
+  (float)M_E32,  /* e^32 */
+  (float)M_E64   /* e^64 */
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+float lib_expif(size_t n)
+{
+  size_t i;
+  float val;
+
+  /* The largest calculable value for n is floor(ln(FLT_MAX)) */
+
+  if (n > 88)
+    {
+      return INFINITY_F;
+    }
+
+  val = 1.0F;
+
+  for (i = 0; n != 0; i++)
+    {
+      if ((n & (1 << i)) != 0)
+        {
+          n   &= ~(1 << i);
+          val *= g_expif_square_tbl[i];
+        }
+    }
+
+  return val;
+}
diff --git a/libc/math/lib_libsqrtapprox.c b/libc/math/lib_libsqrtapprox.c
index 60db0770ad532c0202cff5c6cffe1b449795b309..dc78a70e274deea6da46d757af7de244c03753a5 100644
--- a/libc/math/lib_libsqrtapprox.c
+++ b/libc/math/lib_libsqrtapprox.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_log.c b/libc/math/lib_log.c
index 8bcfe75bff63a0cedfe8cc19732f6d4a5370f2e9..21c776e6a9aeb438fb70693828e4e630972b7d44 100644
--- a/libc/math/lib_log.c
+++ b/libc/math/lib_log.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_log10.c b/libc/math/lib_log10.c
index 0830bd7e66821b1effdadb7ad2ef03fe4c65911b..86e8cfb186e50086081f7c5ecc0a329f76f3272e 100644
--- a/libc/math/lib_log10.c
+++ b/libc/math/lib_log10.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_log10f.c b/libc/math/lib_log10f.c
index f0ec9b0589ae92120935124405051f11f9000ada..956516eab36346c03624a4e7c7220f7fadb44625 100644
--- a/libc/math/lib_log10f.c
+++ b/libc/math/lib_log10f.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
@@ -37,5 +37,5 @@
 
 float log10f(float x)
 {
-  return (logf(x) / M_LN10);
+  return (logf(x) / (float)M_LN10);
 }
diff --git a/libc/math/lib_log10l.c b/libc/math/lib_log10l.c
index 69e3e7e9784024e7fef22b467fcf2634be140e94..f6d81b424d8827f043a7a311d5e3ec642794b8f7 100644
--- a/libc/math/lib_log10l.c
+++ b/libc/math/lib_log10l.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_log2.c b/libc/math/lib_log2.c
index 2e2007796b30729aa7096f2e8db0ca816baa0d70..76a114a2f958092778b5a61e8998c6f3c0f2218c 100644
--- a/libc/math/lib_log2.c
+++ b/libc/math/lib_log2.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_log2f.c b/libc/math/lib_log2f.c
index a2d351bb1203ae7c36170cd019b83e8857c2b5d8..12c2ec9289a3549424c65f29e459a8181571a683 100644
--- a/libc/math/lib_log2f.c
+++ b/libc/math/lib_log2f.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
@@ -37,5 +37,5 @@
 
 float log2f(float x)
 {
-  return (logf(x) / M_LN2);
+  return (logf(x) / (float)M_LN2);
 }
diff --git a/libc/math/lib_log2l.c b/libc/math/lib_log2l.c
index 0b4450a8090a0064f8d20938dca9c62bd2e25e12..d23619136cfa18cbe241fdc5fe8848f68c05c694 100644
--- a/libc/math/lib_log2l.c
+++ b/libc/math/lib_log2l.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_logf.c b/libc/math/lib_logf.c
index 80eff85c3c7454f3e81bdfb2d22c67e84b8fb2b4..c2e1fe2fc4f9c3bd18469fa4705e4a1514d0b0ae 100644
--- a/libc/math/lib_logf.c
+++ b/libc/math/lib_logf.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
@@ -32,6 +32,8 @@
 #include 
 #include 
 
+#define FLT_MAX_EXP_X   88.0F
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -40,8 +42,8 @@ float logf(float x)
 {
   float y, y_old, ey, epsilon;
 
-  y = 0.0;
-  y_old = 1.0;
+  y = 0.0F;
+  y_old = 1.0F;
   epsilon = FLT_EPSILON;
 
   while (y > y_old + epsilon || y < y_old - epsilon)
@@ -50,25 +52,25 @@ float logf(float x)
       ey = exp(y);
       y -= (ey - x) / ey;
 
-      if (y > 700.0)
+      if (y > FLT_MAX_EXP_X)
         {
-          y = 700.0;
+          y = FLT_MAX_EXP_X;
         }
 
-      if (y < -700.0)
+      if (y < -FLT_MAX_EXP_X)
         {
-          y = -700.0;
+          y = -FLT_MAX_EXP_X;
         }
 
-      epsilon = (fabs(y) > 1.0) ? fabs(y) * FLT_EPSILON : FLT_EPSILON;
+      epsilon = (fabsf(y) > 1.0F) ? fabsf(y) * FLT_EPSILON : FLT_EPSILON;
     }
 
-  if (y == 700.0)
+  if (y == FLT_MAX_EXP_X)
     {
       return INFINITY;
     }
 
-  if (y == -700.0)
+  if (y == -FLT_MAX_EXP_X)
     {
       return INFINITY;
     }
diff --git a/libc/math/lib_logl.c b/libc/math/lib_logl.c
index c8babc17a8641ac256457b1eeaec0ac5ec8814b1..32657c477fdc2c9621962c338fa4adf97101e219 100644
--- a/libc/math/lib_logl.c
+++ b/libc/math/lib_logl.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_modf.c b/libc/math/lib_modf.c
index 5c0921997cfb3aa6ba4c4e3239fa28b4c33732d9..5782ebf010bce2cd333e279590ce6e381ee5e184 100644
--- a/libc/math/lib_modf.c
+++ b/libc/math/lib_modf.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_modff.c b/libc/math/lib_modff.c
index ad07a4f70c93c24f25af43261a8de7a27e8fabe0..5c88ff83f2821c74a86c06ee644ab98bc50256e7 100644
--- a/libc/math/lib_modff.c
+++ b/libc/math/lib_modff.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
@@ -37,14 +37,14 @@
 
 float modff(float x, float *iptr)
 {
-  if (fabsf(x) >= 8388608.0)
+  if (fabsf(x) >= 8388608.0F)
     {
       *iptr = x;
-      return 0.0;
+      return 0.0F;
     }
-  else if (fabs(x) < 1.0)
+  else if (fabsf(x) < 1.0F)
     {
-      *iptr = 0.0;
+      *iptr = 0.0F;
       return x;
     }
   else
diff --git a/libc/math/lib_modfl.c b/libc/math/lib_modfl.c
index 45f5f4f8fed936ffd1fbae282cdf22201fd63eb7..6739984527935fc6cfe7a2eca025a1a7c2a08bc4 100644
--- a/libc/math/lib_modfl.c
+++ b/libc/math/lib_modfl.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_pow.c b/libc/math/lib_pow.c
index 47eb8d1248960da15b88849c416405934b9498ad..90c8d9348d8e6c5e68cce7eef99446a0cc7a8d34 100644
--- a/libc/math/lib_pow.c
+++ b/libc/math/lib_pow.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_powf.c b/libc/math/lib_powf.c
index b1614a250098ec50b83c6e394a241bab042efdcf..b8024c21416d55c732434f4923da6096034d9c61 100644
--- a/libc/math/lib_powf.c
+++ b/libc/math/lib_powf.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_powl.c b/libc/math/lib_powl.c
index 2efb84801535f392850a07f82f58951ba803ffc2..3b7e9070c724f134293c5eb4b3b5cce3d045fa00 100644
--- a/libc/math/lib_powl.c
+++ b/libc/math/lib_powl.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_rint.c b/libc/math/lib_rint.c
index 2e6af43a8776b3124b0a1933d5b53c94e3507050..3ff1cd02f9921ac5c7348eb95ae8043032dbd336 100644
--- a/libc/math/lib_rint.c
+++ b/libc/math/lib_rint.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/libc/math/lib_rintf.c b/libc/math/lib_rintf.c
index ca733e3d7926faf5546c48ff4260607d530a1c32..17148b3d29d51fbb06c256f4e4e3b2f4c217aa12 100644
--- a/libc/math/lib_rintf.c
+++ b/libc/math/lib_rintf.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -105,15 +101,15 @@ float rintf(float x)
   linteger  = (long)x;
   fremainder = x - (float)linteger;
 
-  if (x < 0.0)
+  if (x < 0.0F)
     {
       /* fremainder should be in range 0 .. -1 */
 
-      if (fremainder == -0.5)
+      if (fremainder == -0.5F)
         {
           linteger = ((linteger + 1) & ~1);
         }
-      else if (fremainder < -0.5)
+      else if (fremainder < -0.5F)
         {
           linteger--;
         }
@@ -122,11 +118,11 @@ float rintf(float x)
     {
       /* fremainder should be in range 0 .. 1 */
 
-      if (fremainder == 0.5)
+      if (fremainder == 0.5F)
         {
           linteger = ((linteger + 1) & ~1);
         }
-      else if (fremainder > 0.5)
+      else if (fremainder > 0.5F)
         {
           linteger++;
         }
diff --git a/libc/math/lib_rintl.c b/libc/math/lib_rintl.c
index 03d5de044262a305141d0e8a35b516e121542488..d5f24dc8c66eabdda8dbb7fc425243389731e05b 100644
--- a/libc/math/lib_rintl.c
+++ b/libc/math/lib_rintl.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/libc/math/lib_sin.c b/libc/math/lib_sin.c
index 7ff716b059ce4cb18d0121e50219a95f1bf0a3d1..6089c76bac3ecf6d4e43da7c32ea1f2a6db8b336 100644
--- a/libc/math/lib_sin.c
+++ b/libc/math/lib_sin.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_sinf.c b/libc/math/lib_sinf.c
index 5f17eb212b2a624c5ba040bbbdc89871a08ed808..e5e7230cdec013375474187afabc389383bfb1a3 100644
--- a/libc/math/lib_sinf.c
+++ b/libc/math/lib_sinf.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
@@ -58,31 +58,31 @@ float sinf(float x)
 
   /* Move x to [-pi, pi) */
 
-  x = fmodf(x, 2 * M_PI);
-  if (x >= M_PI)
+  x = fmodf(x, 2 * M_PI_F);
+  if (x >= M_PI_F)
     {
-      x -= 2 * M_PI;
+      x -= 2 * M_PI_F;
     }
 
-  if (x < -M_PI)
+  if (x < -M_PI_F)
     {
-      x += 2 * M_PI;
+      x += 2 * M_PI_F;
     }
 
   /* Move x to [-pi/2, pi/2) */
 
-  if (x >= M_PI_2)
+  if (x >= M_PI_2_F)
     {
-      x = M_PI - x;
+      x = M_PI_F - x;
     }
 
-  if (x < -M_PI_2)
+  if (x < -M_PI_2_F)
     {
-      x = -M_PI - x;
+      x = -M_PI_F - x;
     }
 
   x_squared = x * x;
-  sin_x = 0.0;
+  sin_x = 0.0F;
 
   /* Perform Taylor series approximation for sin(x) with six terms */
 
diff --git a/libc/math/lib_sinh.c b/libc/math/lib_sinh.c
index 81e84807b9ba05726593cc251a5742d3920fd294..20d6d88f00fb82d77da00d0d392ea3fdddef012f 100644
--- a/libc/math/lib_sinh.c
+++ b/libc/math/lib_sinh.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_sinhf.c b/libc/math/lib_sinhf.c
index 6b27f59508e958f1da0db38c5b04f283b5210d09..c41b77ee222d0a487568630a24a52dd65ea9f87b 100644
--- a/libc/math/lib_sinhf.c
+++ b/libc/math/lib_sinhf.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
@@ -38,5 +38,5 @@
 float sinhf(float x)
 {
   x = expf(x);
-  return ((x - (1.0 / x)) / 2.0);
+  return ((x - (1.0F / x)) / 2.0F);
 }
diff --git a/libc/math/lib_sinhl.c b/libc/math/lib_sinhl.c
index ff3aaedb7dead69aaf0dcf5314d3dc07252ee9ef..79668350fd96d46738d60d8b29dc0ad993c346f1 100644
--- a/libc/math/lib_sinhl.c
+++ b/libc/math/lib_sinhl.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_sinl.c b/libc/math/lib_sinl.c
index dc3df8a4bac2d57bf8870e8cbd921bd9a1269e12..d41ccea16411e6b2309b634afe202d509b42a394 100644
--- a/libc/math/lib_sinl.c
+++ b/libc/math/lib_sinl.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_sqrt.c b/libc/math/lib_sqrt.c
index 8540744d21d60a83280d4dfdf01e34a683490029..b42b0a1f5df05cbcf623f5c8e9319a0aeb05d633 100644
--- a/libc/math/lib_sqrt.c
+++ b/libc/math/lib_sqrt.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_sqrtf.c b/libc/math/lib_sqrtf.c
index e1a107eb8b918dea41a8eb5bd2c66844a5012afe..4b30a1dcc50de0e53d36771605e3fd83ab0acfe6 100644
--- a/libc/math/lib_sqrtf.c
+++ b/libc/math/lib_sqrtf.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
@@ -47,25 +47,25 @@ float sqrtf(float x)
 
   /* Filter out invalid/trivial inputs */
 
-  if (x < 0.0)
+  if (x < 0.0F)
     {
       set_errno(EDOM);
-      return NAN;
+      return NAN_F;
     }
 
   if (isnan(x))
     {
-      return NAN;
+      return NAN_F;
     }
 
-  if (isinf(x))
+  if (isinf_f(x))
     {
-      return INFINITY;
+      return INFINITY_F;
     }
 
-  if (x == 0.0)
+  if (x == 0.0F)
     {
-      return 0.0;
+      return 0.0F;
     }
 
   /* Guess square root (using bit manipulation) */
@@ -76,9 +76,9 @@ float sqrtf(float x)
    * definitely optimal
    */
 
-  y = 0.5 * (y + x / y);
-  y = 0.5 * (y + x / y);
-  y = 0.5 * (y + x / y);
+  y = 0.5F * (y + x / y);
+  y = 0.5F * (y + x / y);
+  y = 0.5F * (y + x / y);
 
   return y;
 }
diff --git a/libc/math/lib_sqrtl.c b/libc/math/lib_sqrtl.c
index 03a564f72d928b7da44ae6ab53d5c72ea103271b..d87f06938a34eedc260b626756538a638d25c9af 100644
--- a/libc/math/lib_sqrtl.c
+++ b/libc/math/lib_sqrtl.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009-2011 Nick Johnson 
diff --git a/libc/math/lib_tan.c b/libc/math/lib_tan.c
index 31cde4cddef512df9132f773bbe83b4e09178417..b48f02714e50fca0ea81ba862d4246cfb12de614 100644
--- a/libc/math/lib_tan.c
+++ b/libc/math/lib_tan.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_tanf.c b/libc/math/lib_tanf.c
index 97ffae017d3e0109d91b379a007be2349fd07b07..1ca3591b45cd64fbdc36024cd0b20048300087dd 100644
--- a/libc/math/lib_tanf.c
+++ b/libc/math/lib_tanf.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_tanh.c b/libc/math/lib_tanh.c
index e68fcd528c941b5e64f3b083ccb2a9b02e875d87..3242590ca6ddba901ba1ac1fd3c174619f85622b 100644
--- a/libc/math/lib_tanh.c
+++ b/libc/math/lib_tanh.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_tanhf.c b/libc/math/lib_tanhf.c
index 70edb57ec4e176c1c521091701a64ac8ec458c25..02ebd55c10da15e5bb4208a173609693de515d3a 100644
--- a/libc/math/lib_tanhf.c
+++ b/libc/math/lib_tanhf.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
@@ -38,7 +38,7 @@
 float tanhf(float x)
 {
   float x0 = expf(x);
-  float x1 = 1.0 / x0;
+  float x1 = 1.0F / x0;
 
   return ((x0 + x1) / (x0 - x1));
 }
diff --git a/libc/math/lib_tanhl.c b/libc/math/lib_tanhl.c
index ef2250941c1f40c096bd1663a4a36e1ec7ba317c..8a1e75e6181ce56c57ff3bb743dd866a19017c88 100644
--- a/libc/math/lib_tanhl.c
+++ b/libc/math/lib_tanhl.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/math/lib_tanl.c b/libc/math/lib_tanl.c
index 16ebce8a7a9c5095d3c1dfb90827cb9f1b1a706d..e4866fa11cd1ceb2ac8ecd079bd124fd00b8bb99 100644
--- a/libc/math/lib_tanl.c
+++ b/libc/math/lib_tanl.c
@@ -6,7 +6,7 @@
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Ported by: Darcy Gong
  *
- * It derives from the Rhombs OS math library by Nick Johnson which has
+ * It derives from the Rhombus OS math library by Nick Johnson which has
  * a compatibile, MIT-style license:
  *
  * Copyright (C) 2009, 2010 Nick Johnson 
diff --git a/libc/misc/Kconfig b/libc/misc/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..8c917f0348f57ba2fee92376a68cab3b16032628
--- /dev/null
+++ b/libc/misc/Kconfig
@@ -0,0 +1,104 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+config LIBC_IOCTL_VARIADIC
+	bool "Enable variadic ioctl()"
+	default n
+	---help---
+		By default, NuttX implements the "old style," three-parameter,
+		ioctl() interface with this function prototype:
+
+			int ioctl(int fd, int req, unsigned long arg);
+
+		That function is implemented as part of the VFS.  If
+		LIBC_IOCTL_VARIADIC is selected, then an additional compatibility
+		layer will be provided in the C library.  The enabled, then function
+		prototype will become:
+
+			int ioctl(int fd, int req, ...);
+
+		The ioctl() is not controlled by any standard so it is really
+		arbitrary which format you used.  You may select the variadic
+		function prototype with this option.  That will slightly increase
+		code size and ioctl() processing time.  It will not support a
+		variable number of arguments and it still always expects to see a
+		third argument of type 'unsigned long'.  The only benefit of this
+		alternative function signature is that it may provide greater
+		compatibility if you are porting code from other platforms that use
+		the variadic ioctl() function.
+
+		WARNING:  Use of this option could cause subtle system errors is
+		the third argument is omitted or if the sizeof the thread argument
+		is anything other than sizeof (unsigned long).  Most small integers
+		will be promoted to 'int'.  The following assertion appears in ioctl():
+
+			DEBUGASSERT(sizeof(int)        == sizeof(unsigned long) &&
+			            sizeof(FAR void *) == sizeof(unsigned long));
+
+		Do not enable this option if the above is not true.  32-bit ARM
+		should pass this test with all three types having sizeof(type) == 4
+		bytes.  'float' should also be tested.  But 'long long' and 'double'
+		are out of the question!  Don't event try to pass them.
+
+		And what will happen if no third argument is passed?  In most cases,
+		this should just result in a garbage value for arg.  But you may
+		discover cases where something worse happens!
+
+config LIB_SENDFILE_BUFSIZE
+	int "sendfile() buffer size"
+	default 512
+	---help---
+		Size of the I/O buffer to allocate in sendfile().  Default: 512b
+
+comment "Non-standard Library Support"
+
+config LIB_CRC64_FAST
+	bool "Fast CRC64"
+	default n
+	---help---
+		Enable the CRC64 lookup table to compute the CRC64 faster.
+
+config LIB_KBDCODEC
+	bool "Keyboard CODEC"
+	default n
+	---help---
+		In NuttX, a keyboard/keypad driver is simply a character driver that
+		may have an (optional) encoding/decoding layer on the data returned
+		by the character driver. A keyboard may return simple text data
+		(alphabetic, numeric, and punctuaction) or control characters
+		(enter, control-C, etc.).  However, in addition, most keyboards
+		support actions that cannot be represented as text data. Such
+		actions include things like cursor controls (home, up arrow,
+		page down, etc.), editing functions (insert, delete, etc.), volume
+		controls, (mute, volume up, etc.) and other special functions.
+		Some special encoding may be required to multiplex these two classes
+		of data.
+
+		This option enables the functions that implement the encoding and
+		decoding of keyboard data.  These are the interfaces prototyped in
+		include/nuttx/input/kbd_codec.h.  While not correctly a part of
+		the C library, it is included here because the decoding side of this
+		interface must be accessible by end user programs.
+
+config LIB_SLCDCODEC
+	bool "Segment LCD CODEC"
+	default n
+	---help---
+		In NuttX, a character-oriented, segment LCD (SLCD) driver is simply
+		a character device that may have an (optional) encoding/decoding
+		layer on the data provided to the SLCD driver.  The application may
+		provide simple text data (alphabetic, numeric, and punctuaction) or
+		control characters (enter, control-C, etc.).  However, in addition,
+		most SLCDs support actions that cannot be represented as text data.
+		Such actions include things like cursor controls (home, up arrow,
+		page down, etc.) and other special functions (e.g., blinking).  Some
+		special encoding may be required to multiplex these two classes of
+		data.
+
+		This option enables the functions that implement the encoding and
+		decoding of SLCD data.  These are the interfaces prototyped in
+		include/nuttx/lcd/slcd_codec.h.  While not correctly a part of the C
+		library, it is included here because the encoding side of this
+		interface must be accessible by end user programs.
diff --git a/libc/misc/Make.defs b/libc/misc/Make.defs
index 1a9f7911c18a53b62a79100897bd33b50bfee628..673591ea6afbf6e927b0ba284898af185bc48e01 100644
--- a/libc/misc/Make.defs
+++ b/libc/misc/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # libc/misc/Make.defs
 #
-#   Copyright (C) 2011-2012, 2014 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2011-2012, 2014, 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -35,8 +35,12 @@
 
 # Add the internal C files to the build
 
-CSRCS += lib_stream.c lib_filesem.c lib_utsname.c
-CSRCS += lib_tea_encrypt.c lib_tea_decrypt.c
+CSRCS += lib_stream.c lib_utsname.c
+CSRCS += lib_xorshift128.c lib_tea_encrypt.c lib_tea_decrypt.c
+
+ifneq ($(CONFIG_STDIO_DISABLE_BUFFERING),y)
+CSRCS += lib_filesem.c
+endif
 
 # Support for platforms that do not have long long types
 
@@ -57,7 +61,11 @@ ifeq ($(CONFIG_LIBC_IOCTL_VARIADIC),y)
 CSRCS += lib_ioctl.c
 endif
 
-else
+ifeq ($(CONFIG_PIPES),y)
+CSRCS += lib_mkfifo.c
+endif
+
+else # CONFIG_NFILE_DESCRIPTORS > 0
 ifneq ($(CONFIG_NSOCKET_DESCRIPTORS),0)
 
 CSRCS += lib_sendfile.c
@@ -70,15 +78,16 @@ ifeq ($(CONFIG_LIBC_IOCTL_VARIADIC),y)
 CSRCS += lib_ioctl.c
 endif
 
-endif
-endif
+endif # CONFIG_NSOCKET_DESCRIPTORS > 0
+endif # CONFIG_NFILE_DESCRIPTORS > 0
 
 # Add the miscellaneous C files to the build
 
-CSRCS += lib_match.c lib_crc32.c lib_crc16.c lib_crc8.c lib_dumpbuffer.c
+CSRCS += lib_crc64.c lib_crc32.c lib_crc16.c lib_crc8.c
+CSRCS += lib_dumpbuffer.c lib_match.c
 
-ifeq ($(CONFIG_DEBUG),y)
-CSRCS += lib_dbg.c
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
+CSRCS += lib_debug.c
 endif
 
 # Keyboard driver encoder/decoder
diff --git a/libc/misc/lib_crc16.c b/libc/misc/lib_crc16.c
index 76e8dac8a5a80f591d9ddb9dc613503d75378a48..0240e41ab275bc8bd67cfb2a18999f70598722cd 100644
--- a/libc/misc/lib_crc16.c
+++ b/libc/misc/lib_crc16.c
@@ -114,9 +114,9 @@ uint16_t crc16part(FAR const uint8_t *src, size_t len, uint16_t crc16val)
 {
   size_t i;
 
-  for (i = 0;  i < len;  i++)
+  for (i = 0; i < len; i++)
     {
-      crc16val = crc16_tab[((crc16val >> 8) & 255)] ^ (crc16val << 8) ^ src[i];
+      crc16val = crc16_tab[((crc16val >> 8) & 0xff) ^ src[i]] ^ (crc16val << 8);
     }
 
   return crc16val;
diff --git a/libc/misc/lib_crc32.c b/libc/misc/lib_crc32.c
index 40e7c014a03b600dfe501423bb58caf7e79de925..cd6ac0758ad11caac9934c5119e0dafbfa3d2560 100644
--- a/libc/misc/lib_crc32.c
+++ b/libc/misc/lib_crc32.c
@@ -102,9 +102,9 @@ uint32_t crc32part(FAR const uint8_t *src, size_t len, uint32_t crc32val)
 {
   size_t i;
 
-  for (i = 0;  i < len;  i++)
+  for (i = 0; i < len; i++)
     {
-      crc32val = crc32_tab[(crc32val ^ src[i]) & 0xff] ^ (crc32val >> 8);
+      crc32val = crc32_tab[(crc32val & 0xff) ^ src[i]] ^ (crc32val >> 8);
     }
   return crc32val;
 }
diff --git a/libc/misc/lib_crc64.c b/libc/misc/lib_crc64.c
new file mode 100644
index 0000000000000000000000000000000000000000..8faf0193d1f28c8f1d5bea2cd53904ed2cca3c0e
--- /dev/null
+++ b/libc/misc/lib_crc64.c
@@ -0,0 +1,301 @@
+/****************************************************************************
+ * libc/misc/lib_crc64.c
+ *
+ *   Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
+ *   Author: Paul Alexander Patience 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * CRC64 table generated with:
+ *
+ *   #include 
+ *   #include 
+ *   #include 
+ *
+ *   #define CRC64_POLY   ((uint64_t)0x42f0e1eba9ea3693)
+ *   #define CRC64_TABLEN ((size_t)256)
+ *
+ *   int main(void)
+ *   {
+ *     uint64_t crc64val;
+ *     size_t i;
+ *     size_t j;
+ *
+ *     printf("static const uint64_t crc64_tab[%zu] =\n", CRC64_TABLEN);
+ *     printf("{\n  ");
+ *
+ *     for (i = 0; i < CRC64_TABLEN; i++)
+ *       {
+ *         crc64val = (uint64_t)i << 56;
+ *         for (j = 0; j < 8; j++)
+ *           {
+ *             if ((crc64val & ((uint64_t)1 << 63)) != 0)
+ *               {
+ *                 crc64val = (crc64val << 1) ^ CRC64_POLY;
+ *               }
+ *             else
+ *               {
+ *                 crc64val = crc64val << 1;
+ *               }
+ *           }
+ *
+ *         printf("0x%016"PRIx64, crc64val);
+ *         if (i + 1 >= CRC64_TABLEN)
+ *           {
+ *             printf("\n");
+ *           }
+ *         else if (i % 2 == 1)
+ *           {
+ *             printf(",\n  ");
+ *           }
+ *         else
+ *           {
+ *             printf(", ");
+ *           }
+ *       }
+ *
+ *     printf("};\n");
+ *     return 0;
+ *   }
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_LIB_CRC64_FAST
+static const uint64_t crc64_tab[256] =
+{
+  0x0000000000000000, 0x42f0e1eba9ea3693,
+  0x85e1c3d753d46d26, 0xc711223cfa3e5bb5,
+  0x493366450e42ecdf, 0x0bc387aea7a8da4c,
+  0xccd2a5925d9681f9, 0x8e224479f47cb76a,
+  0x9266cc8a1c85d9be, 0xd0962d61b56fef2d,
+  0x17870f5d4f51b498, 0x5577eeb6e6bb820b,
+  0xdb55aacf12c73561, 0x99a54b24bb2d03f2,
+  0x5eb4691841135847, 0x1c4488f3e8f96ed4,
+  0x663d78ff90e185ef, 0x24cd9914390bb37c,
+  0xe3dcbb28c335e8c9, 0xa12c5ac36adfde5a,
+  0x2f0e1eba9ea36930, 0x6dfeff5137495fa3,
+  0xaaefdd6dcd770416, 0xe81f3c86649d3285,
+  0xf45bb4758c645c51, 0xb6ab559e258e6ac2,
+  0x71ba77a2dfb03177, 0x334a9649765a07e4,
+  0xbd68d2308226b08e, 0xff9833db2bcc861d,
+  0x388911e7d1f2dda8, 0x7a79f00c7818eb3b,
+  0xcc7af1ff21c30bde, 0x8e8a101488293d4d,
+  0x499b3228721766f8, 0x0b6bd3c3dbfd506b,
+  0x854997ba2f81e701, 0xc7b97651866bd192,
+  0x00a8546d7c558a27, 0x4258b586d5bfbcb4,
+  0x5e1c3d753d46d260, 0x1cecdc9e94ace4f3,
+  0xdbfdfea26e92bf46, 0x990d1f49c77889d5,
+  0x172f5b3033043ebf, 0x55dfbadb9aee082c,
+  0x92ce98e760d05399, 0xd03e790cc93a650a,
+  0xaa478900b1228e31, 0xe8b768eb18c8b8a2,
+  0x2fa64ad7e2f6e317, 0x6d56ab3c4b1cd584,
+  0xe374ef45bf6062ee, 0xa1840eae168a547d,
+  0x66952c92ecb40fc8, 0x2465cd79455e395b,
+  0x3821458aada7578f, 0x7ad1a461044d611c,
+  0xbdc0865dfe733aa9, 0xff3067b657990c3a,
+  0x711223cfa3e5bb50, 0x33e2c2240a0f8dc3,
+  0xf4f3e018f031d676, 0xb60301f359dbe0e5,
+  0xda050215ea6c212f, 0x98f5e3fe438617bc,
+  0x5fe4c1c2b9b84c09, 0x1d14202910527a9a,
+  0x93366450e42ecdf0, 0xd1c685bb4dc4fb63,
+  0x16d7a787b7faa0d6, 0x5427466c1e109645,
+  0x4863ce9ff6e9f891, 0x0a932f745f03ce02,
+  0xcd820d48a53d95b7, 0x8f72eca30cd7a324,
+  0x0150a8daf8ab144e, 0x43a04931514122dd,
+  0x84b16b0dab7f7968, 0xc6418ae602954ffb,
+  0xbc387aea7a8da4c0, 0xfec89b01d3679253,
+  0x39d9b93d2959c9e6, 0x7b2958d680b3ff75,
+  0xf50b1caf74cf481f, 0xb7fbfd44dd257e8c,
+  0x70eadf78271b2539, 0x321a3e938ef113aa,
+  0x2e5eb66066087d7e, 0x6cae578bcfe24bed,
+  0xabbf75b735dc1058, 0xe94f945c9c3626cb,
+  0x676dd025684a91a1, 0x259d31cec1a0a732,
+  0xe28c13f23b9efc87, 0xa07cf2199274ca14,
+  0x167ff3eacbaf2af1, 0x548f120162451c62,
+  0x939e303d987b47d7, 0xd16ed1d631917144,
+  0x5f4c95afc5edc62e, 0x1dbc74446c07f0bd,
+  0xdaad56789639ab08, 0x985db7933fd39d9b,
+  0x84193f60d72af34f, 0xc6e9de8b7ec0c5dc,
+  0x01f8fcb784fe9e69, 0x43081d5c2d14a8fa,
+  0xcd2a5925d9681f90, 0x8fdab8ce70822903,
+  0x48cb9af28abc72b6, 0x0a3b7b1923564425,
+  0x70428b155b4eaf1e, 0x32b26afef2a4998d,
+  0xf5a348c2089ac238, 0xb753a929a170f4ab,
+  0x3971ed50550c43c1, 0x7b810cbbfce67552,
+  0xbc902e8706d82ee7, 0xfe60cf6caf321874,
+  0xe224479f47cb76a0, 0xa0d4a674ee214033,
+  0x67c58448141f1b86, 0x253565a3bdf52d15,
+  0xab1721da49899a7f, 0xe9e7c031e063acec,
+  0x2ef6e20d1a5df759, 0x6c0603e6b3b7c1ca,
+  0xf6fae5c07d3274cd, 0xb40a042bd4d8425e,
+  0x731b26172ee619eb, 0x31ebc7fc870c2f78,
+  0xbfc9838573709812, 0xfd39626eda9aae81,
+  0x3a28405220a4f534, 0x78d8a1b9894ec3a7,
+  0x649c294a61b7ad73, 0x266cc8a1c85d9be0,
+  0xe17dea9d3263c055, 0xa38d0b769b89f6c6,
+  0x2daf4f0f6ff541ac, 0x6f5faee4c61f773f,
+  0xa84e8cd83c212c8a, 0xeabe6d3395cb1a19,
+  0x90c79d3fedd3f122, 0xd2377cd44439c7b1,
+  0x15265ee8be079c04, 0x57d6bf0317edaa97,
+  0xd9f4fb7ae3911dfd, 0x9b041a914a7b2b6e,
+  0x5c1538adb04570db, 0x1ee5d94619af4648,
+  0x02a151b5f156289c, 0x4051b05e58bc1e0f,
+  0x87409262a28245ba, 0xc5b073890b687329,
+  0x4b9237f0ff14c443, 0x0962d61b56fef2d0,
+  0xce73f427acc0a965, 0x8c8315cc052a9ff6,
+  0x3a80143f5cf17f13, 0x7870f5d4f51b4980,
+  0xbf61d7e80f251235, 0xfd913603a6cf24a6,
+  0x73b3727a52b393cc, 0x31439391fb59a55f,
+  0xf652b1ad0167feea, 0xb4a25046a88dc879,
+  0xa8e6d8b54074a6ad, 0xea16395ee99e903e,
+  0x2d071b6213a0cb8b, 0x6ff7fa89ba4afd18,
+  0xe1d5bef04e364a72, 0xa3255f1be7dc7ce1,
+  0x64347d271de22754, 0x26c49cccb40811c7,
+  0x5cbd6cc0cc10fafc, 0x1e4d8d2b65facc6f,
+  0xd95caf179fc497da, 0x9bac4efc362ea149,
+  0x158e0a85c2521623, 0x577eeb6e6bb820b0,
+  0x906fc95291867b05, 0xd29f28b9386c4d96,
+  0xcedba04ad0952342, 0x8c2b41a1797f15d1,
+  0x4b3a639d83414e64, 0x09ca82762aab78f7,
+  0x87e8c60fded7cf9d, 0xc51827e4773df90e,
+  0x020905d88d03a2bb, 0x40f9e43324e99428,
+  0x2cffe7d5975e55e2, 0x6e0f063e3eb46371,
+  0xa91e2402c48a38c4, 0xebeec5e96d600e57,
+  0x65cc8190991cb93d, 0x273c607b30f68fae,
+  0xe02d4247cac8d41b, 0xa2dda3ac6322e288,
+  0xbe992b5f8bdb8c5c, 0xfc69cab42231bacf,
+  0x3b78e888d80fe17a, 0x7988096371e5d7e9,
+  0xf7aa4d1a85996083, 0xb55aacf12c735610,
+  0x724b8ecdd64d0da5, 0x30bb6f267fa73b36,
+  0x4ac29f2a07bfd00d, 0x08327ec1ae55e69e,
+  0xcf235cfd546bbd2b, 0x8dd3bd16fd818bb8,
+  0x03f1f96f09fd3cd2, 0x41011884a0170a41,
+  0x86103ab85a2951f4, 0xc4e0db53f3c36767,
+  0xd8a453a01b3a09b3, 0x9a54b24bb2d03f20,
+  0x5d45907748ee6495, 0x1fb5719ce1045206,
+  0x919735e51578e56c, 0xd367d40ebc92d3ff,
+  0x1476f63246ac884a, 0x568617d9ef46bed9,
+  0xe085162ab69d5e3c, 0xa275f7c11f7768af,
+  0x6564d5fde549331a, 0x279434164ca30589,
+  0xa9b6706fb8dfb2e3, 0xeb46918411358470,
+  0x2c57b3b8eb0bdfc5, 0x6ea7525342e1e956,
+  0x72e3daa0aa188782, 0x30133b4b03f2b111,
+  0xf7021977f9cceaa4, 0xb5f2f89c5026dc37,
+  0x3bd0bce5a45a6b5d, 0x79205d0e0db05dce,
+  0xbe317f32f78e067b, 0xfcc19ed95e6430e8,
+  0x86b86ed5267cdbd3, 0xc4488f3e8f96ed40,
+  0x0359ad0275a8b6f5, 0x41a94ce9dc428066,
+  0xcf8b0890283e370c, 0x8d7be97b81d4019f,
+  0x4a6acb477bea5a2a, 0x089a2aacd2006cb9,
+  0x14dea25f3af9026d, 0x562e43b4931334fe,
+  0x913f6188692d6f4b, 0xd3cf8063c0c759d8,
+  0x5dedc41a34bbeeb2, 0x1f1d25f19d51d821,
+  0xd80c07cd676f8394, 0x9afce626ce85b507
+};
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: crc64part
+ *
+ * Description:
+ *   Continue CRC calculation on a part of the buffer.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_LIB_CRC64_FAST
+uint64_t crc64part(FAR const uint8_t *src, size_t len, uint64_t crc64val)
+{
+  size_t i;
+
+  for (i = 0; i < len; i++)
+    {
+      crc64val = crc64_tab[((crc64val >> 56) & 0xff) ^ src[i]] ^
+                 (crc64val << 8);
+    }
+
+  return crc64val;
+}
+#else
+uint64_t crc64part(FAR const uint8_t *src, size_t len, uint64_t crc64val)
+{
+  size_t i;
+  size_t j;
+
+  for (i = 0; i < len; i++)
+    {
+      crc64val ^= (uint64_t)src[i] << 56;
+      for (j = 0; j < 8; j++)
+        {
+          if ((crc64val & ((uint64_t)1 << 63)) != 0)
+            {
+              crc64val = (crc64val << 1) ^ CRC64_POLY;
+            }
+          else
+            {
+              crc64val = crc64val << 1;
+            }
+        }
+    }
+
+  return crc64val;
+}
+#endif
+
+/****************************************************************************
+ * Name: crc64
+ *
+ * Description:
+ *   Return a 64-bit CRC of the contents of the 'src' buffer, length 'len'.
+ *
+ ****************************************************************************/
+
+uint64_t crc64(FAR const uint8_t *src, size_t len)
+{
+  return crc64part(src, len, CRC64_INIT) ^ CRC64_XOROUT;
+}
diff --git a/libc/misc/lib_crc8.c b/libc/misc/lib_crc8.c
index ae3e01d5d75954b18f2c71e9cee35fd172d601d9..4da049c60a7a23cddd4884922b81d9a0824d9993 100644
--- a/libc/misc/lib_crc8.c
+++ b/libc/misc/lib_crc8.c
@@ -124,13 +124,13 @@ uint8_t crc8part(FAR const uint8_t *src, size_t len, uint8_t crc8val)
 {
   size_t i;
 
-  crc8val ^= 0xFF;
-  for (i = 0;  i < len;  i++)
+  crc8val ^= 0xff;
+  for (i = 0; i < len; i++)
     {
       crc8val = crc8_tab[crc8val ^ src[i]];
     }
 
-  return crc8val ^ 0xFF;
+  return crc8val ^ 0xff;
 }
 
 /************************************************************************************************
diff --git a/libc/misc/lib_dbg.c b/libc/misc/lib_debug.c
similarity index 76%
rename from libc/misc/lib_dbg.c
rename to libc/misc/lib_debug.c
index 14044175b79c494de7441bf7fc4e56daa9856d68..098f3cc2dd7ff02cffd1927b95d9ddb0d440eea7 100644
--- a/libc/misc/lib_dbg.c
+++ b/libc/misc/lib_debug.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * libc/misc/lib_dbg.c
+ * libc/misc/lib_err.c
  *
- *   Copyright (C) 2007-2009, 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011-2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -46,76 +46,73 @@
 
 #ifndef CONFIG_CPP_HAVE_VARARGS
 
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: dbg, lldbg, vdbg
+ * Name: alert, err, warn, and info
  *
  * Description:
  *  If the cross-compiler's pre-processor does not support variable
- * length arguments, then these additional APIs will be built.
+ *  length arguments, then these additional APIs will be built.
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
-int dbg(const char *format, ...)
+#ifdef CONFIG_DEBUG_ALERT
+int _alert(const char *format, ...)
 {
   va_list ap;
   int     ret;
 
   va_start(ap, format);
-  ret = vsyslog(LOG_DEBUG, format, ap);
+  ret = vsyslog(LOG_EMERG, format, ap);
   va_end(ap);
 
   return ret;
 }
+#endif /* CONFIG_DEBUG_ALERT */
 
-#ifdef CONFIG_ARCH_LOWPUTC
-int lldbg(const char *format, ...)
+#ifdef CONFIG_DEBUG_ERROR
+int  _err(const char *format, ...)
 {
   va_list ap;
   int     ret;
 
   va_start(ap, format);
-  ret = lowvsyslog(LOG_DEBUG, format, ap);
+  ret = vsyslog(LOG_ERR, format, ap);
   va_end(ap);
 
   return ret;
 }
-#endif
+#endif /* CONFIG_DEBUG_ERROR */
 
-#ifdef CONFIG_DEBUG_VERBOSE
-int vdbg(const char *format, ...)
+#ifdef CONFIG_DEBUG_WARN
+int _warn(const char *format, ...)
 {
   va_list ap;
   int     ret;
 
   va_start(ap, format);
-  ret = vsyslog(LOG_DEBUG, format, ap);
+  ret = vsyslog(LOG_WARNING, format, ap);
   va_end(ap);
 
   return ret;
 }
+#endif /* CONFIG_DEBUG_WARN */
 
-#ifdef CONFIG_ARCH_LOWPUTC
-int llvdbg(const char *format, ...)
+#ifdef CONFIG_DEBUG_INFO
+int _info(const char *format, ...)
 {
   va_list ap;
   int     ret;
 
   va_start(ap, format);
-  ret = lowvsyslog(LOG_DEBUG, format, ap);
+  ret = vsyslog(LOG_INFO, format, ap);
   va_end(ap);
 
   return ret;
 }
-#endif /* CONFIG_ARCH_LOWPUTC */
-#endif /* CONFIG_DEBUG_VERBOSE */
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_INFO */
+
 #endif /* CONFIG_CPP_HAVE_VARARGS */
diff --git a/libc/misc/lib_dumpbuffer.c b/libc/misc/lib_dumpbuffer.c
index 23e7e617b8f2cc36348be5cf4634b67b9f108e7d..f535a23b857f7203d06dc085d2788b7016f3f108 100644
--- a/libc/misc/lib_dumpbuffer.c
+++ b/libc/misc/lib_dumpbuffer.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/misc/lib_dumpbuffer.c
  *
- *   Copyright (C) 2009, 2011, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2011, 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -47,6 +47,33 @@
  * Pre-processor definitions
  ****************************************************************************/
 
+#define _NITEMS   32                 /* 32 bytes displayed per line */
+#define _LINESIZE (3 * _NITEMS + 4)  /* 2 hex chars, ASCII char, 3 spaces, NUL */
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lib_nibble
+ *
+ * Description:
+ *  Convert a binary nibble to a hexadecimal character.
+ *
+ ****************************************************************************/
+
+static char lib_nibble(unsigned char nibble)
+{
+  if (nibble < 10)
+    {
+      return '0' + nibble;
+    }
+  else
+    {
+      return 'a' + nibble - 10;
+    }
+}
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -55,63 +82,76 @@
  * Name: lib_dumpbuffer
  *
  * Description:
- *  Do a pretty buffer dump
+ *  Do a pretty buffer dump.
+ *
+ *  A fairly large on-stack buffer is used for the case where timestamps are
+ *  applied to each line.
  *
  ****************************************************************************/
 
 void lib_dumpbuffer(FAR const char *msg, FAR const uint8_t *buffer,
                     unsigned int buflen)
 {
+  char buf[_LINESIZE];
   unsigned int i;
   unsigned int j;
   unsigned int k;
 
-  lowsyslog(LOG_INFO, "%s (%p):\n", msg, buffer);
-  for (i = 0; i < buflen; i += 32)
+  syslog(LOG_INFO, "%s (%p):\n", msg, buffer);
+  for (i = 0; i < buflen; i += _NITEMS)
     {
-      lowsyslog(LOG_INFO, "%04x: ", i);
-      for (j = 0; j < 32; j++)
+      FAR char *ptr = buf;
+
+      /* Generate hex values:  2 * _NITEMS + 1 bytes */
+
+      for (j = 0; j < _NITEMS; j++)
         {
           k = i + j;
 
-          if (j == 16)
+          if (j == (_NITEMS / 2))
             {
-              lowsyslog(LOG_INFO, " ");
+              *ptr++ = ' ';
             }
 
           if (k < buflen)
             {
-              lowsyslog(LOG_INFO, "%02x", buffer[k]);
+              *ptr++ = lib_nibble((buffer[k] >> 4) & 0xf);
+              *ptr++ = lib_nibble(buffer[k] & 0xf);
             }
           else
             {
-              lowsyslog(LOG_INFO, "  ");
+              *ptr++ = ' ';
+              *ptr++ = ' ';
             }
         }
 
-      lowsyslog(LOG_INFO, " ");
-      for (j = 0; j < 32; j++)
+      *ptr++ = ' ';  /* Plus 1 byte */
+
+      /* Generate printable characters:  Plus 1 * _NITEMS + 1 bytes */
+
+      for (j = 0; j < _NITEMS; j++)
         {
          k = i + j;
 
-          if (j == 16)
+          if (j == (_NITEMS / 2))
             {
-              lowsyslog(LOG_INFO, " ");
+              *ptr++ = ' ';
             }
 
           if (k < buflen)
             {
               if (buffer[k] >= 0x20 && buffer[k] < 0x7f)
                 {
-                  lowsyslog(LOG_INFO, "%c", buffer[k]);
+                  *ptr++ = buffer[k];
                 }
               else
                 {
-                  lowsyslog(LOG_INFO, ".");
+                  *ptr++ = '.';
                 }
             }
         }
 
-      lowsyslog(LOG_INFO, "\n");
+      *ptr = '\0';  /* Plus 1 byte */
+      syslog(LOG_INFO, "%04x: %s\n", i, buf);
    }
 }
diff --git a/libc/misc/lib_filesem.c b/libc/misc/lib_filesem.c
index 2fd5d1c9ebfa55ab0aaa197d9fa82e5ac243ca10..1ea8717146e531dd75b1d2bc3d391901756c2b3b 100644
--- a/libc/misc/lib_filesem.c
+++ b/libc/misc/lib_filesem.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/misc/lib_filesem.c
  *
- *   Copyright (C) 2007, 2009, 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2009, 2011, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -45,17 +45,11 @@
 #include 
 #include 
 
-#include "libc.h"
-
-#if CONFIG_STDIO_BUFFER_SIZE > 0
+#include 
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
+#include "libc.h"
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
 
 /****************************************************************************
  * Public Functions
@@ -142,4 +136,5 @@ void lib_give_semaphore(FAR struct file_struct *stream)
       ASSERT(sem_post(&stream->fs_sem) == 0);
     }
 }
-#endif /* CONFIG_STDIO_BUFFER_SIZE */
+
+#endif /* CONFIG_STDIO_DISABLE_BUFFERING */
diff --git a/libc/misc/lib_match.c b/libc/misc/lib_match.c
index 690d111a5c7ab6b9be5f6e574fbb82949dfd9a1e..2b3085d6635a85ec1c5d76c99614838e4e4642c9 100644
--- a/libc/misc/lib_match.c
+++ b/libc/misc/lib_match.c
@@ -39,7 +39,7 @@
  ****************************************************************************/
 
 #include 
-#include 
+#include 
 
 /****************************************************************************
  * Private Functions
diff --git a/libc/misc/lib_mkfifo.c b/libc/misc/lib_mkfifo.c
new file mode 100644
index 0000000000000000000000000000000000000000..deb919aad1c82498380c169165ac5984a4537021
--- /dev/null
+++ b/libc/misc/lib_mkfifo.c
@@ -0,0 +1,88 @@
+/****************************************************************************
+ * libc/misc/lib_mkfifo.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+
+#if defined(CONFIG_PIPES) && CONFIG_DEV_FIFO_SIZE > 0
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: mkfifo
+ *
+ * Description:
+ *   mkfifo() makes a FIFO device driver file with name 'pathname.'  Unlike
+ *   Linux, a NuttX FIFO is not a special file type but simply a device
+ *   driver instance.  'mode' specifies the FIFO's permissions.
+ *
+ *   Once the FIFO has been created by mkfifo(), any thread can open it for
+ *   reading or writing, in the same way as an ordinary file. However, it
+ *   must have been opened from both reading and writing before input or
+ *   output can be performed.  This FIFO implementation will block all
+ *   attempts to open a FIFO read-only until at least one thread has opened
+ *   the FIFO for  writing.
+ *
+ *   If all threads that write to the FIFO have closed, subsequent calls to
+ *   read() on the FIFO will return 0 (end-of-file).
+ *
+ * Inputs:
+ *   pathname - The full path to the FIFO instance to attach to or to create
+ *     (if not already created).
+ *   mode - Ignored for now
+ *
+ * Return:
+ *   0 is returned on success; otherwise, -1 is returned with errno set
+ *   appropriately.
+ *
+ ****************************************************************************/
+
+int mkfifo(FAR const char *pathname, mode_t mode)
+{
+  return mkfifo2(pathname, mode, CONFIG_DEV_FIFO_SIZE);
+}
+
+#endif /* CONFIG_PIPES && CONFIG_DEV_FIFO_SIZE > 0 */
+
diff --git a/libc/misc/lib_slcddecode.c b/libc/misc/lib_slcddecode.c
index 00055de3607cede34fdad4517e1886c20f24c95a..14d4e5253cbde1d2b1af40b3cc332d5bbd3eb627 100644
--- a/libc/misc/lib_slcddecode.c
+++ b/libc/misc/lib_slcddecode.c
@@ -52,19 +52,6 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
-/* Configuration ************************************************************/
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose
- * debug must also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
 
 /* Indices, counts, helper macros ******************************************/
 
@@ -89,16 +76,6 @@
 #define IS_CODE(a)     (((a) >= CODE_MIN) && ((a) <= CODE_MAX))
 #define CODE_RETURN(a) (enum slcdcode_e)((a) - 'A')
 
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_DEBUG_LCD
-#  define lcddbg         dbg
-#  define lcdvdbg        vdbg
-#else
-#  define lcddbg(x...)
-#  define lcdvdbg(x...)
-#endif
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -264,7 +241,7 @@ enum slcdret_e slcd_decode(FAR struct lib_instream_s *stream,
        * return the following characters later.
        */
 
-      lcddbg("Parsing failed: ESC followed by %02x\n", ch);
+      lcderr("ERROR: Parsing failed: ESC followed by %02x\n", ch);
       return slcd_reget(state, pch, parg);
     }
 
@@ -295,7 +272,7 @@ enum slcdret_e slcd_decode(FAR struct lib_instream_s *stream,
 
       if (code < (int)FIRST_SLCDCODE || code > (int)LAST_SLCDCODE)
         {
-          lcddbg("Parsing failed: ESC-L followed by %02x\n", ch);
+          lcderr("ERROR: Parsing failed: ESC-L followed by %02x\n", ch);
 
           /* Not a special command code.. put the character in the reget
            * buffer.
@@ -338,7 +315,7 @@ enum slcdret_e slcd_decode(FAR struct lib_instream_s *stream,
            * following characters later.
            */
 
-          lcddbg("Parsing failed: ESC-L-%c followed by %02x\n",
+          lcderr("ERROR: Parsing failed: ESC-L-%c followed by %02x\n",
                  state->buf[NDX_COUNTH], ch);
 
           return slcd_reget(state, pch, parg);
@@ -384,7 +361,7 @@ enum slcdret_e slcd_decode(FAR struct lib_instream_s *stream,
            * of the characters later.
            */
 
-          lcddbg("Parsing failed: ESC-L-%c-%c followed by %02x\n",
+          lcderr("ERROR: Parsing failed: ESC-L-%c-%c followed by %02x\n",
                  state->buf[NDX_COUNTH], state->buf[NDX_COUNTL], ch);
 
           return slcd_reget(state, pch, parg);
diff --git a/libc/misc/lib_stream.c b/libc/misc/lib_stream.c
index bcf78389b092d7c012ee06208dbb0757fe387927..4ed03433455f88d22de2203dda3007b4f1da9f80 100644
--- a/libc/misc/lib_stream.c
+++ b/libc/misc/lib_stream.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/misc/lib_stream.c
  *
- *   Copyright (C) 2007, 2011, 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2011, 2013-2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -46,25 +46,13 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 #include "libc.h"
 
 #if (!defined(CONFIG_BUILD_PROTECTED) && !defined(CONFIG_BUILD_KERNEL)) || \
       defined(__KERNEL__)
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -101,13 +89,15 @@ void lib_stream_initialize(FAR struct task_group_s *group)
 
   for (i = 0; i < CONFIG_NFILE_STREAMS; i++)
    {
-     /* Clear the IOB */
+      FAR struct file_struct *stream = &list->sl_streams[i];
+
+      /* Clear the IOB */
 
-      memset(&list->sl_streams[i], 0, sizeof(FILE));
+      memset(stream, 0, sizeof(FILE));
 
       /* Indicate not opened */
 
-      list->sl_streams[i].fs_fd = -1;
+      stream->fs_fd = -1;
 
       /* Initialize the stream semaphore to one to support one-at-
        * a-time access to private data sets.
@@ -119,7 +109,7 @@ void lib_stream_initialize(FAR struct task_group_s *group)
 #endif /* CONFIG_NFILE_STREAMS > 0 */
 
 /****************************************************************************
- * Name: lib_stream_init
+ * Name: lib_stream_release
  *
  * Description:
  *   This function is called when a TCB is destroyed.  Note that it does not
@@ -132,7 +122,7 @@ void lib_stream_initialize(FAR struct task_group_s *group)
 void lib_stream_release(FAR struct task_group_s *group)
 {
   FAR struct streamlist *list;
-#if CONFIG_STDIO_BUFFER_SIZE > 0
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
   int i;
 #endif
 
@@ -149,23 +139,26 @@ void lib_stream_release(FAR struct task_group_s *group)
 
   (void)sem_destroy(&list->sl_sem);
 
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
   /* Release each stream in the list */
 
-#if CONFIG_STDIO_BUFFER_SIZE > 0
   for (i = 0; i < CONFIG_NFILE_STREAMS; i++)
     {
+      FAR struct file_struct *stream = &list->sl_streams[i];
+
       /* Destroy the semaphore that protects the IO buffer */
 
-      (void)sem_destroy(&list->sl_streams[i].fs_sem);
+      (void)sem_destroy(&stream->fs_sem);
 
       /* Release the IO buffer */
 
-      if (list->sl_streams[i].fs_bufstart)
+      if (stream->fs_bufstart != NULL &&
+          (stream->fs_flags & __FS_FLAG_UBF) == 0)
         {
 #ifndef CONFIG_BUILD_KERNEL
           /* Release memory from the user heap */
 
-          sched_ufree(list->sl_streams[i].fs_bufstart);
+          sched_ufree(stream->fs_bufstart);
 #else
           /* If the exiting group is unprivileged, then it has an address
            * environment.  Don't bother to release the memory in this case...
@@ -177,13 +170,13 @@ void lib_stream_release(FAR struct task_group_s *group)
 
           if ((group->tg_flags & GROUP_FLAG_PRIVILEGED) != 0)
             {
-              sched_kfree(list->sl_streams[i].fs_bufstart);
+              sched_kfree(stream->fs_bufstart);
             }
 #endif
         }
     }
 #endif
 }
-#endif /* CONFIG_NFILE_STREAMS > 0 */
 
+#endif /* CONFIG_NFILE_STREAMS > 0 */
 #endif /* (!CONFIG_BUILD_PROTECTED &&7 !CONFIG_BUILD_KERNEL) || __KERNEL__ */
diff --git a/libc/misc/lib_uadd32x64.c b/libc/misc/lib_uadd32x64.c
index 68800e55295ada34f6cdc042347d83a61a710ac9..ea9b851da6be66f9e6ea9470fd9dccb6ebd9a80b 100644
--- a/libc/misc/lib_uadd32x64.c
+++ b/libc/misc/lib_uadd32x64.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/fixedmath/lib_uadd32x64.c
+ * libc/misc/lib_uadd32x64.c
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -37,7 +37,7 @@
  * Included Files
  ****************************************************************************/
 
-#include 
+#include 
 
 /****************************************************************************
  * Public Functions
diff --git a/libc/misc/lib_uadd64.c b/libc/misc/lib_uadd64.c
index c9e634d1eefe778c73b6b8b9a0a93dd95dd83b0c..60baf6867c79969f4b818d88b863fc7ad1deb371 100644
--- a/libc/misc/lib_uadd64.c
+++ b/libc/misc/lib_uadd64.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/fixedmath/lib_uadd64.c
+ * libc/misc/lib_uadd64.c
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -37,7 +37,7 @@
  * Included Files
  ****************************************************************************/
 
-#include 
+#include 
 
 /****************************************************************************
  * Public Functions
diff --git a/libc/misc/lib_umul32.c b/libc/misc/lib_umul32.c
index b245e10ee05ebbe9efed9b8db39b509da94d983e..f3906737344c68b83e147dbb82c418ddc96dac94 100644
--- a/libc/misc/lib_umul32.c
+++ b/libc/misc/lib_umul32.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/fixedmath/lib_umul32.c
+ * libc/misc/lib_umul32.c
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -37,7 +37,7 @@
  * Included Files
  ****************************************************************************/
 
-#include 
+#include 
 
 /****************************************************************************
  * Public Functions
diff --git a/libc/misc/lib_umul32x64.c b/libc/misc/lib_umul32x64.c
index ca37fa2ea8d0612e29c786fe2026ea016c02aaca..326b3d4d7dbf7c2d2dc2aeedf81dc1f915e63369 100644
--- a/libc/misc/lib_umul32x64.c
+++ b/libc/misc/lib_umul32x64.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/fixedmath/lib_umul32x64.c
+ * libc/misc/lib_umul32x64.c
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -37,7 +37,7 @@
  * Included Files
  ****************************************************************************/
 
-#include 
+#include 
 
 /****************************************************************************
  * Public Functions
diff --git a/libc/misc/lib_umul64.c b/libc/misc/lib_umul64.c
index d20612638ef737b9bef027757075512318bf501e..4a5b3f415178ef1c786528933fabd74dee726421 100644
--- a/libc/misc/lib_umul64.c
+++ b/libc/misc/lib_umul64.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/fixedmath/lib_umul64.c
+ * libc/misc/lib_umul64.c
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -37,7 +37,7 @@
  * Included Files
  ****************************************************************************/
 
-#include 
+#include 
 
 /****************************************************************************
  * Public Functions
diff --git a/libc/misc/lib_usub64.c b/libc/misc/lib_usub64.c
index 2a327245ece2f047763ebca14e55cee95f5ba3e7..5b1deaa77b2e4633450d4c65738cf07f0ceed8a3 100644
--- a/libc/misc/lib_usub64.c
+++ b/libc/misc/lib_usub64.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/fixedmath/lib_usub64.c
+ * libc/misc/lib_usub64.c
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -37,7 +37,7 @@
  * Included Files
  ****************************************************************************/
 
-#include 
+#include 
 
 /****************************************************************************
  * Public Functions
diff --git a/libc/misc/lib_usub64x32.c b/libc/misc/lib_usub64x32.c
index b691e5105fbdea1096753797887f97ffd4981e24..5996c35b3057a0b6b28df45a51c66f88e78d1ace 100644
--- a/libc/misc/lib_usub64x32.c
+++ b/libc/misc/lib_usub64x32.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/fixedmath/lib_usub64x32.c
+ * libc/misc/lib_usub64x32.c
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -37,7 +37,7 @@
  * Included Files
  ****************************************************************************/
 
-#include 
+#include 
 
 /****************************************************************************
  * Public Functions
diff --git a/libc/misc/lib_xorshift128.c b/libc/misc/lib_xorshift128.c
new file mode 100644
index 0000000000000000000000000000000000000000..b74c04f4ef5e979bfe868dd85b7a117623c524c4
--- /dev/null
+++ b/libc/misc/lib_xorshift128.c
@@ -0,0 +1,94 @@
+/****************************************************************************
+ * libc/misc/lib_xorshift.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: David S. Alessio
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This random number generator is simple, fast and portable.
+ *      Ref:  https://en.wikipedia.org/wiki/Xorshift
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: xorshift128
+ *
+ * Description:
+ *   Generate one 32-bit pseudo-random number.
+ *
+ *   NOTE: Because the PRNG state is passed as a parameter, this function is
+ *   fully re-entrant and may be called from an interrupt handler.
+ *
+ *   The downside to this is that users of the PRNG might not get as much
+ *   entropy as if it were a common state structure.
+ *
+ * Input Parameters:
+ *   state - The current XorShift128 state.
+ *
+ * Returned Value:
+ *   The generated pseudo-random number
+ *
+ ****************************************************************************/
+
+uint32_t xorshift128(FAR struct xorshift128_state_s *state)
+{
+  uint32_t t;
+
+  DEBUGASSERT(state != NULL);
+
+  t        = state->x;
+  t       ^= t << 11;
+  t       ^= t >> 8;
+
+  state->x = state->y;
+  state->y = state->z;
+  state->z = state->w;
+
+  state->w ^= state->w >> 19;
+  state->w ^= t;
+
+  return state->w;
+}
diff --git a/libc/modlib/Kconfig b/libc/modlib/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..eeb5d05dcc9683acb5440eb21f4718c462a73408
--- /dev/null
+++ b/libc/modlib/Kconfig
@@ -0,0 +1,59 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+config LIBC_MODLIB
+	bool
+	default n
+
+menu "Module library configuration"
+	depends on LIBC_MODLIB
+
+config MODLIB_MAXDEPEND
+	int "Max dependencies"
+	default 2
+	---help---
+		This setting controls the number of other modules that a new module
+		may depend on.  That is, when a new module in inserted via 'insmod'
+		it may depend on symbols exported by other, already installed
+		modules.  This is the maximum number of modules that export symbols
+		to the new module.  This maximum is artificial; it is used in the
+		current design because it uses some very simple, pre-allocated data
+		structures.
+
+		All dependencies logic my be eliminated by sett CONFIG_MODLIB_MAXDEPEND
+		to zero.
+
+config MODLIB_ALIGN_LOG2
+	int "Log2 Section Alignment"
+	default 2
+	---help---
+		Align all sections to this Log2 value:  0->1, 1->2, 2->4, etc.
+
+config MODLIB_BUFFERSIZE
+	int "Module I/O Buffer Size"
+	default 128
+	---help---
+		This is an I/O buffer that is used to access the module file.
+		Variable length items will need to be read (such as symbol names).
+		This is really just this initial size of the buffer; it will be
+		reallocated as necessary to hold large symbol names).  Default: 128
+
+config MODLIB_BUFFERINCR
+	int "Module I/O Buffer Realloc Increment"
+	default 32
+	---help---
+		This is an I/O buffer that is used to access the module file.
+		Variable length items will need to be read (such as symbol names).
+		This value specifies the size increment to use each time the
+		buffer is reallocated.  Default: 32
+
+config MODLIB_DUMPBUFFER
+	bool "Dump module buffers"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Dump various module buffers for debug purposes
+
+endmenu # Module library configuration
diff --git a/libc/modlib/Make.defs b/libc/modlib/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..c1876be75b0911e64bae7f0f9bd486572fd43a38
--- /dev/null
+++ b/libc/modlib/Make.defs
@@ -0,0 +1,50 @@
+############################################################################
+# libc/modlib/Make.defs
+#
+#   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+ifeq ($(CONFIG_LIBC_MODLIB),y)
+
+# Add the nuttx/lib/modlib.h files to the build
+
+CSRCS += modlib_bind.c modlib_depend.c modlib_init.c modlib_iobuffer.c
+CSRCS += modlib_load.c modlib_read.c modlib_registry.c modlib_sections.c
+CSRCS += modlib_symbols.c modlib_symtab.c modlib_uninit.c modlib_unload.c
+CSRCS += modlib_verify.c
+
+# Add the modlib directory to the build
+
+DEPPATH += --dep-path modlib
+VPATH += :modlib
+
+endif
diff --git a/sched/module/gnu-elf.ld b/libc/modlib/gnu-elf.ld
similarity index 99%
rename from sched/module/gnu-elf.ld
rename to libc/modlib/gnu-elf.ld
index 0bf39b9649227d0aef3bf3f693995a548ddf220e..135ca1afea3f6bc37683c179a5673b1770dc667a 100644
--- a/sched/module/gnu-elf.ld
+++ b/libc/modlib/gnu-elf.ld
@@ -1,5 +1,5 @@
 /****************************************************************************
- * sched/module/gnu-elf.ld
+ * libc/modlib/gnu-elf.ld
  *
  *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/libc/modlib/modlib.h b/libc/modlib/modlib.h
new file mode 100644
index 0000000000000000000000000000000000000000..a3152a643656a7d5031309be9613b0010a0f4973
--- /dev/null
+++ b/libc/modlib/modlib.h
@@ -0,0 +1,209 @@
+/****************************************************************************
+ * libc/modlib/modlib.h
+ *
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __LIBC_MODLIB_MODLIB_H
+#define __LIBC_MODLIB_MODLIB_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: modlib_verifyheader
+ *
+ * Description:
+ *   Given the header from a possible ELF executable, verify that it is
+ *   an ELF executable.
+ *
+ * Returned Value:
+ *   0 (OK) is returned on success and a negated errno is returned on
+ *   failure.
+ *
+ ****************************************************************************/
+
+int modlib_verifyheader(FAR const Elf32_Ehdr *header);
+
+/****************************************************************************
+ * Name: modlib_findsymtab
+ *
+ * Description:
+ *   Find the symbol table section.
+ *
+ * Returned Value:
+ *   0 (OK) is returned on success and a negated errno is returned on
+ *   failure.
+ *
+ ****************************************************************************/
+
+int modlib_findsymtab(FAR struct mod_loadinfo_s *loadinfo);
+
+/****************************************************************************
+ * Name: modlib_readsym
+ *
+ * Description:
+ *   Read the ELFT symbol structure at the specfied index into memory.
+ *
+ * Input Parameters:
+ *   loadinfo - Load state information
+ *   index    - Symbol table index
+ *   sym      - Location to return the table entry
+ *
+ * Returned Value:
+ *   0 (OK) is returned on success and a negated errno is returned on
+ *   failure.
+ *
+ ****************************************************************************/
+
+int modlib_readsym(FAR struct mod_loadinfo_s *loadinfo, int index,
+                   FAR Elf32_Sym *sym);
+
+/****************************************************************************
+ * Name: modlib_symvalue
+ *
+ * Description:
+ *   Get the value of a symbol.  The updated value of the symbol is returned
+ *   in the st_value field of the symbol table entry.
+ *
+ * Input Parameters:
+ *   modp     - Module state information
+ *   loadinfo - Load state information
+ *   sym      - Symbol table entry (value might be undefined)
+ *
+ * Returned Value:
+ *   0 (OK) is returned on success and a negated errno is returned on
+ *   failure.
+ *
+ *   EINVAL - There is something inconsistent in the symbol table (should only
+ *            happen if the file is corrupted)
+ *   ENOSYS - Symbol lies in common
+ *   ESRCH  - Symbol has no name
+ *   ENOENT - Symbol undefined and not provided via a symbol table
+ *
+ ****************************************************************************/
+
+int modlib_symvalue(FAR struct module_s *modp,
+                    FAR struct mod_loadinfo_s *loadinfo, FAR Elf32_Sym *sym);
+
+/****************************************************************************
+ * Name: modlib_loadshdrs
+ *
+ * Description:
+ *   Loads section headers into memory.
+ *
+ * Returned Value:
+ *   0 (OK) is returned on success and a negated errno is returned on
+ *   failure.
+ *
+ ****************************************************************************/
+
+int modlib_loadshdrs(FAR struct mod_loadinfo_s *loadinfo);
+
+/****************************************************************************
+ * Name: modlib_findsection
+ *
+ * Description:
+ *   A section by its name.
+ *
+ * Input Parameters:
+ *   loadinfo - Load state information
+ *   sectname - Name of the section to find
+ *
+ * Returned Value:
+ *   On success, the index to the section is returned; A negated errno value
+ *   is returned on failure.
+ *
+ ****************************************************************************/
+
+#if 0 /* Not used */
+int modlib_findsection(FAR struct mod_loadinfo_s *loadinfo,
+                       FAR const char *sectname);
+#endif
+
+/****************************************************************************
+ * Name: modlib_allocbuffer
+ *
+ * Description:
+ *   Perform the initial allocation of the I/O buffer, if it has not already
+ *   been allocated.
+ *
+ * Returned Value:
+ *   0 (OK) is returned on success and a negated errno is returned on
+ *   failure.
+ *
+ ****************************************************************************/
+
+int modlib_allocbuffer(FAR struct mod_loadinfo_s *loadinfo);
+
+/****************************************************************************
+ * Name: modlib_reallocbuffer
+ *
+ * Description:
+ *   Increase the size of I/O buffer by the specified buffer increment.
+ *
+ * Returned Value:
+ *   0 (OK) is returned on success and a negated errno is returned on
+ *   failure.
+ *
+ ****************************************************************************/
+
+int modlib_reallocbuffer(FAR struct mod_loadinfo_s *loadinfo, size_t increment);
+
+/****************************************************************************
+ * Name: modlib_freebuffers
+ *
+ * Description:
+ *  Release all working buffers.
+ *
+ * Returned Value:
+ *   0 (OK) is returned on success and a negated errno is returned on
+ *   failure.
+ *
+ ****************************************************************************/
+
+int modlib_freebuffers(FAR struct mod_loadinfo_s *loadinfo);
+
+#endif /* __LIBC_MODLIB_MODLIB_H */
diff --git a/sched/module/mod_bind.c b/libc/modlib/modlib_bind.c
similarity index 79%
rename from sched/module/mod_bind.c
rename to libc/modlib/modlib_bind.c
index 75d8e1b56a4a7f26e7debf72dd9720e8bc45a950..62a66ba3c8c868eedd6a2ceee1ad210b150b1deb 100644
--- a/sched/module/mod_bind.c
+++ b/libc/modlib/modlib_bind.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * sched/module/mod_bind.c
+ * libc/modlib/modlib_bind.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -47,25 +47,26 @@
 #include 
 
 #include 
+#include 
 #include 
 
-#include "module.h"
+#include "modlib/modlib.h"
 
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: mod_readrel
+ * Name: modlib_readrel
  *
  * Description:
  *   Read the ELF32_Rel structure into memory.
  *
  ****************************************************************************/
 
-static inline int mod_readrel(FAR struct mod_loadinfo_s *loadinfo,
-                              FAR const Elf32_Shdr *relsec,
-                              int index, FAR Elf32_Rel *rel)
+static inline int modlib_readrel(FAR struct mod_loadinfo_s *loadinfo,
+                                 FAR const Elf32_Shdr *relsec,
+                                 int index, FAR Elf32_Rel *rel)
 {
   off_t offset;
 
@@ -73,7 +74,7 @@ static inline int mod_readrel(FAR struct mod_loadinfo_s *loadinfo,
 
   if (index < 0 || index > (relsec->sh_size / sizeof(Elf32_Rel)))
     {
-      sdbg("Bad relocation symbol index: %d\n", index);
+      serr("ERROR: Bad relocation symbol index: %d\n", index);
       return -EINVAL;
     }
 
@@ -83,11 +84,11 @@ static inline int mod_readrel(FAR struct mod_loadinfo_s *loadinfo,
 
   /* And, finally, read the symbol table entry into memory */
 
-  return mod_read(loadinfo, (FAR uint8_t *)rel, sizeof(Elf32_Rel), offset);
+  return modlib_read(loadinfo, (FAR uint8_t *)rel, sizeof(Elf32_Rel), offset);
 }
 
 /****************************************************************************
- * Name: mod_relocate and mod_relocateadd
+ * Name: modlib_relocate and modlib_relocateadd
  *
  * Description:
  *   Perform all relocations associated with a section.
@@ -98,7 +99,8 @@ static inline int mod_readrel(FAR struct mod_loadinfo_s *loadinfo,
  *
  ****************************************************************************/
 
-static int mod_relocate(FAR struct mod_loadinfo_s *loadinfo, int relidx)
+static int modlib_relocate(FAR struct module_s *modp,
+                           FAR struct mod_loadinfo_s *loadinfo, int relidx)
 
 {
   FAR Elf32_Shdr *relsec = &loadinfo->shdr[relidx];
@@ -122,10 +124,10 @@ static int mod_relocate(FAR struct mod_loadinfo_s *loadinfo, int relidx)
 
       /* Read the relocation entry into memory */
 
-      ret = mod_readrel(loadinfo, relsec, i, &rel);
+      ret = modlib_readrel(loadinfo, relsec, i, &rel);
       if (ret < 0)
         {
-          sdbg("Section %d reloc %d: Failed to read relocation entry: %d\n",
+          serr("ERROR: Section %d reloc %d: Failed to read relocation entry: %d\n",
                relidx, i, ret);
           return ret;
         }
@@ -138,17 +140,17 @@ static int mod_relocate(FAR struct mod_loadinfo_s *loadinfo, int relidx)
 
       /* Read the symbol table entry into memory */
 
-      ret = mod_readsym(loadinfo, symidx, &sym);
+      ret = modlib_readsym(loadinfo, symidx, &sym);
       if (ret < 0)
         {
-          sdbg("Section %d reloc %d: Failed to read symbol[%d]: %d\n",
+          serr("ERROR: Section %d reloc %d: Failed to read symbol[%d]: %d\n",
                relidx, i, symidx, ret);
           return ret;
         }
 
       /* Get the value of the symbol (in sym.st_value) */
 
-      ret = mod_symvalue(loadinfo, &sym);
+      ret = modlib_symvalue(modp, loadinfo, &sym);
       if (ret < 0)
         {
           /* The special error -ESRCH is returned only in one condition:  The
@@ -163,13 +165,13 @@ static int mod_relocate(FAR struct mod_loadinfo_s *loadinfo, int relidx)
 
           if (ret == -ESRCH)
             {
-              sdbg("Section %d reloc %d: Undefined symbol[%d] has no name: %d\n",
+              serr("ERROR: Section %d reloc %d: Undefined symbol[%d] has no name: %d\n",
                   relidx, i, symidx, ret);
               psym = NULL;
             }
           else
             {
-              sdbg("Section %d reloc %d: Failed to get value of symbol[%d]: %d\n",
+              serr("ERROR: Section %d reloc %d: Failed to get value of symbol[%d]: %d\n",
                   relidx, i, symidx, ret);
               return ret;
             }
@@ -179,7 +181,7 @@ static int mod_relocate(FAR struct mod_loadinfo_s *loadinfo, int relidx)
 
       if (rel.r_offset < 0 || rel.r_offset > dstsec->sh_size - sizeof(uint32_t))
         {
-          sdbg("Section %d reloc %d: Relocation address out of range, offset %d size %d\n",
+          serr("ERROR: Section %d reloc %d: Relocation address out of range, offset %d size %d\n",
                relidx, i, rel.r_offset, dstsec->sh_size);
           return -EINVAL;
         }
@@ -191,7 +193,7 @@ static int mod_relocate(FAR struct mod_loadinfo_s *loadinfo, int relidx)
       ret = up_relocate(&rel, psym, addr);
       if (ret < 0)
         {
-          sdbg("ERROR: Section %d reloc %d: Relocation failed: %d\n", relidx, i, ret);
+          serr("ERROR: Section %d reloc %d: Relocation failed: %d\n", relidx, i, ret);
           return ret;
         }
     }
@@ -199,9 +201,10 @@ static int mod_relocate(FAR struct mod_loadinfo_s *loadinfo, int relidx)
   return OK;
 }
 
-static int mod_relocateadd(FAR struct mod_loadinfo_s *loadinfo, int relidx)
+static int modlib_relocateadd(FAR struct module_s *modp,
+                           FAR struct mod_loadinfo_s *loadinfo, int relidx)
 {
-  sdbg("Not implemented\n");
+  serr("ERROR: Not implemented\n");
   return -ENOSYS;
 }
 
@@ -210,11 +213,15 @@ static int mod_relocateadd(FAR struct mod_loadinfo_s *loadinfo, int relidx)
  ****************************************************************************/
 
 /****************************************************************************
- * Name: mod_bind
+ * Name: modlib_bind
  *
  * Description:
  *   Bind the imported symbol names in the loaded module described by
- *   'loadinfo' using the exported symbol values provided by mod_setsymtab().
+ *   'loadinfo' using the exported symbol values provided by modlib_setsymtab().
+ *
+ * Input Parameters:
+ *   modp     - Module state information
+ *   loadinfo - Load state information
  *
  * Returned Value:
  *   0 (OK) is returned on success and a negated errno is returned on
@@ -222,14 +229,14 @@ static int mod_relocateadd(FAR struct mod_loadinfo_s *loadinfo, int relidx)
  *
  ****************************************************************************/
 
-int mod_bind(FAR struct mod_loadinfo_s *loadinfo)
+int modlib_bind(FAR struct module_s *modp, FAR struct mod_loadinfo_s *loadinfo)
 {
   int ret;
   int i;
 
   /* Find the symbol and string tables */
 
-  ret = mod_findsymtab(loadinfo);
+  ret = modlib_findsymtab(loadinfo);
   if (ret < 0)
     {
       return ret;
@@ -239,10 +246,10 @@ int mod_bind(FAR struct mod_loadinfo_s *loadinfo)
    * accumulate the variable length symbol name.
    */
 
-  ret = mod_allocbuffer(loadinfo);
+  ret = modlib_allocbuffer(loadinfo);
   if (ret < 0)
     {
-      sdbg("mod_allocbuffer failed: %d\n", ret);
+      serr("ERROR: modlib_allocbuffer failed: %d\n", ret);
       return -ENOMEM;
     }
 
@@ -258,7 +265,7 @@ int mod_bind(FAR struct mod_loadinfo_s *loadinfo)
           continue;
         }
 
-      /* Make sure that the section is allocated.  We can't relocated
+      /* Make sure that the section is allocated.  We can't relocate
        * sections that were not loaded into memory.
        */
 
@@ -271,11 +278,11 @@ int mod_bind(FAR struct mod_loadinfo_s *loadinfo)
 
       if (loadinfo->shdr[i].sh_type == SHT_REL)
         {
-          ret = mod_relocate(loadinfo, i);
+          ret = modlib_relocate(modp, loadinfo, i);
         }
       else if (loadinfo->shdr[i].sh_type == SHT_RELA)
         {
-          ret = mod_relocateadd(loadinfo, i);
+          ret = modlib_relocateadd(modp, loadinfo, i);
         }
 
       if (ret < 0)
diff --git a/libc/modlib/modlib_depend.c b/libc/modlib/modlib_depend.c
new file mode 100644
index 0000000000000000000000000000000000000000..31ba2e56d8bc63c6a6c69af649a5690890a350d2
--- /dev/null
+++ b/libc/modlib/modlib_depend.c
@@ -0,0 +1,198 @@
+/****************************************************************************
+ * libc/modlib/modlib_depend.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: modlib_depend
+ *
+ * Description:
+ *   Set up module dependencies between the exporter and the importer of a
+ *   symbol.  The happens when the module is installed via insmod and a
+ *   symbol is imported from another module.
+ *
+ * Returned Value:
+ *   0 (OK) is returned on success and a negated errno is returned on
+ *   failure.
+ *
+ * Assumptions:
+ *   Caller holds the registry lock.
+ *
+ ****************************************************************************/
+
+int modlib_depend(FAR struct module_s *importer, FAR struct module_s *exporter)
+{
+#if CONFIG_MODLIB_MAXDEPEND > 0
+  int freendx;
+  int i;
+
+  DEBUGASSERT(importer != NULL && exporter != NULL);
+
+  /* First checker if the exported is already in our list if dependencies.
+   * This would happen if we are importing multiple symbols from the same
+   * exporting module.  In that case, the module would already be in the
+   * list of dependencies.
+   *
+   * The list dependency list is a a dumb, upacked array of pointers.  This
+   * should not be too inefficient if the number of CONFIG_MODLIB_MAXDEPEND
+   * is small.  Otherwise, a more dynamic data structure would be in order.
+   */
+
+  for (i = 0, freendx = -1; i < CONFIG_MODLIB_MAXDEPEND; i++)
+    {
+      FAR const struct module_s *modp;
+
+      /* Check if this dependency slot is available. */
+
+      modp = importer->dependencies[i];
+      if (modp == NULL)
+        {
+          /* Remember this slot for use the module is NOT already in the
+           * list of dependencies.
+           */
+
+          freendx = i;
+        }
+      else if (modp == exporter)
+        {
+          /* Yes, we are already importing symbols from this module.  Nothing
+           * more needs to be done.
+           */
+
+          return OK;
+        }
+    }
+
+  /* If we get here, then (1) this is a new exporting module that does not
+   * already appear in the list of dependencies, and (2) freendx is the
+   * index to the last free slot in the dependency list.  If freendx is
+   * negative, then the dependency list is full.
+   */
+
+  if (freendx >= 0)
+    {
+      /* Increment the count of dependencies on the exporter module */
+
+      DEBUGASSERT(exporter->dependents < UINT8_MAX);
+      if (exporter->dependents >= UINT8_MAX)
+        {
+          return -ENOSPC;
+        }
+
+      exporter->dependents++;
+
+      /* And remember the exporter so that we can decrement the count of
+       * dependents if the importer is removed.
+       */
+
+       DEBUGASSERT(importer->dependencies[freendx] == NULL);
+       importer->dependencies[freendx] = exporter;
+       return OK;
+    }
+
+  /* If we get there then the list of dependencies is full. */
+
+  DEBUGPANIC();
+  return -ENFILE;
+
+#else
+  return OK;
+#endif
+}
+
+/****************************************************************************
+ * Name: modlib_undepend
+ *
+ * Description:
+ *   Tear down module dependencies between the exporters and the importer of
+ *   symbols.  This happens when the module is removed via rmmod (and on
+ *   error handling cases in insmod).
+ *
+ * Returned Value:
+ *   0 (OK) is returned on success and a negated errno is returned on
+ *   failure.
+ *
+ * Assumptions:
+ *   Caller holds the registry lock.
+ *
+ ****************************************************************************/
+
+int modlib_undepend(FAR struct module_s *importer)
+{
+#if CONFIG_MODLIB_MAXDEPEND > 0
+  FAR struct module_s *exporter;
+  int i;
+
+  DEBUGASSERT(importer != NULL && importer->dependents == 0);
+
+  /* Decrement the dependency count on each of exporters of symbols used by
+   * this importer module.  This is an upacked array of pointers.  This
+   * should not be too inefficient if the number of CONFIG_MODLIB_MAXDEPEND
+   * is small.  Otherwise, a more dynamic data structure would be in order.
+   */
+
+  for (i = 0; i < CONFIG_MODLIB_MAXDEPEND; i++)
+    {
+      exporter = importer->dependencies[i];
+      if (exporter != NULL)
+        {
+          DEBUGASSERT(exporter->dependents > 0);
+          if (exporter->dependents > 0)
+            {
+              exporter->dependents--;
+            }
+
+          importer->dependencies[i] = NULL;
+        }
+    }
+#endif
+
+  return OK;
+}
diff --git a/sched/module/mod_init.c b/libc/modlib/modlib_init.c
similarity index 73%
rename from sched/module/mod_init.c
rename to libc/modlib/modlib_init.c
index c16069caf52f10a8b5b7a50888674c6fe86c01a1..964272ca0a0f13f52162fa2951076203ad34f51a 100644
--- a/sched/module/mod_init.c
+++ b/libc/modlib/modlib_init.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * sched/module/mod_init.c
+ * libc/modlib/modlib_init.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -49,37 +49,34 @@
 #include 
 
 #include 
+#include 
 
-#include "module.h"
+#include "modlib/modlib.h"
 
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, and CONFIG_MODULE_DUMPBUFFER have to
- * be defined or CONFIG_MODULE_DUMPBUFFER does nothing.
+/* CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO, and CONFIG_MODLIB_DUMPBUFFER
+ * have to be defined or CONFIG_MODLIB_DUMPBUFFER does nothing.
  */
 
-#if !defined(CONFIG_DEBUG_VERBOSE) || !defined (CONFIG_MODULE_DUMPBUFFER)
-#  undef CONFIG_MODULE_DUMPBUFFER
+#if !defined(CONFIG_DEBUG_INFO) || !defined (CONFIG_MODLIB_DUMPBUFFER)
+#  undef CONFIG_MODLIB_DUMPBUFFER
 #endif
 
-#ifdef CONFIG_MODULE_DUMPBUFFER
-# define mod_dumpbuffer(m,b,n) svdbgdumpbuffer(m,b,n)
+#ifdef CONFIG_MODLIB_DUMPBUFFER
+# define modlib_dumpbuffer(m,b,n) sinfodumpbuffer(m,b,n)
 #else
-# define mod_dumpbuffer(m,b,n)
+# define modlib_dumpbuffer(m,b,n)
 #endif
 
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: mod_filelen
+ * Name: modlib_filelen
  *
  * Description:
  *  Get the size of the ELF file
@@ -90,8 +87,8 @@
  *
  ****************************************************************************/
 
-static inline int mod_filelen(FAR struct mod_loadinfo_s *loadinfo,
-                              FAR const char *filename)
+static inline int modlib_filelen(FAR struct mod_loadinfo_s *loadinfo,
+                                 FAR const char *filename)
 {
   struct stat buf;
   int ret;
@@ -102,7 +99,7 @@ static inline int mod_filelen(FAR struct mod_loadinfo_s *loadinfo,
   if (ret < 0)
     {
       int errval = errno;
-      sdbg("Failed to stat file: %d\n", errval);
+      serr("ERROR: Failed to stat file: %d\n", errval);
       return -errval;
     }
 
@@ -110,7 +107,7 @@ static inline int mod_filelen(FAR struct mod_loadinfo_s *loadinfo,
 
   if (!S_ISREG(buf.st_mode))
     {
-      sdbg("Not a regular file.  mode: %d\n", buf.st_mode);
+      serr("ERROR: Not a regular file.  mode: %d\n", buf.st_mode);
       return -ENOENT;
     }
 
@@ -129,7 +126,7 @@ static inline int mod_filelen(FAR struct mod_loadinfo_s *loadinfo,
  ****************************************************************************/
 
 /****************************************************************************
- * Name: mod_initialize
+ * Name: modlib_initialize
  *
  * Description:
  *   This function is called to configure the library to process an ELF
@@ -141,12 +138,12 @@ static inline int mod_filelen(FAR struct mod_loadinfo_s *loadinfo,
  *
  ****************************************************************************/
 
-int mod_initialize(FAR const char *filename,
-                   FAR struct mod_loadinfo_s *loadinfo)
+int modlib_initialize(FAR const char *filename,
+                      FAR struct mod_loadinfo_s *loadinfo)
 {
   int ret;
 
-  svdbg("filename: %s loadinfo: %p\n", filename, loadinfo);
+  sinfo("filename: %s loadinfo: %p\n", filename, loadinfo);
 
   /* Clear the load info structure */
 
@@ -154,10 +151,10 @@ int mod_initialize(FAR const char *filename,
 
   /* Get the length of the file. */
 
-  ret = mod_filelen(loadinfo, filename);
+  ret = modlib_filelen(loadinfo, filename);
   if (ret < 0)
     {
-      sdbg("mod_filelen failed: %d\n", ret);
+      serr("ERROR: modlib_filelen failed: %d\n", ret);
       return ret;
     }
 
@@ -167,36 +164,36 @@ int mod_initialize(FAR const char *filename,
   if (loadinfo->filfd < 0)
     {
       int errval = errno;
-      sdbg("Failed to open ELF binary %s: %d\n", filename, errval);
+      serr("ERROR: Failed to open ELF binary %s: %d\n", filename, errval);
       return -errval;
     }
 
   /* Read the ELF ehdr from offset 0 */
 
-  ret = mod_read(loadinfo, (FAR uint8_t *)&loadinfo->ehdr,
+  ret = modlib_read(loadinfo, (FAR uint8_t *)&loadinfo->ehdr,
                     sizeof(Elf32_Ehdr), 0);
   if (ret < 0)
     {
-      sdbg("Failed to read ELF header: %d\n", ret);
+      serr("ERROR: Failed to read ELF header: %d\n", ret);
       return ret;
     }
 
-  mod_dumpbuffer("ELF header", (FAR const uint8_t *)&loadinfo->ehdr,
+  modlib_dumpbuffer("ELF header", (FAR const uint8_t *)&loadinfo->ehdr,
                     sizeof(Elf32_Ehdr));
 
   /* Verify the ELF header */
 
-  ret = mod_verifyheader(&loadinfo->ehdr);
+  ret = modlib_verifyheader(&loadinfo->ehdr);
   if (ret < 0)
     {
       /* This may not be an error because we will be called to attempt loading
-       * EVERY binary.  If mod_verifyheader() does not recognize the ELF header,
+       * EVERY binary.  If modlib_verifyheader() does not recognize the ELF header,
        * it will -ENOEXEC whcih simply informs the system that the file is not an
-       * ELF file.  mod_verifyheader() will return other errors if the ELF header
+       * ELF file.  modlib_verifyheader() will return other errors if the ELF header
        * is not correctly formed.
        */
 
-      sdbg("Bad ELF header: %d\n", ret);
+      serr("ERROR: Bad ELF header: %d\n", ret);
       return ret;
     }
 
diff --git a/sched/module/mod_iobuffer.c b/libc/modlib/modlib_iobuffer.c
similarity index 83%
rename from sched/module/mod_iobuffer.c
rename to libc/modlib/modlib_iobuffer.c
index 0a8c4bc4ef5d0d5cf3c153c8263cb68b1ad1398e..8c3aee01a1f4011a906044535f06458c4a9f5df6 100644
--- a/sched/module/mod_iobuffer.c
+++ b/libc/modlib/modlib_iobuffer.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * sched/module/mod_iobuffer.c
+ * libc/modlib/modlib_iobuffer.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,17 +42,18 @@
 #include 
 #include 
 
-#include 
 #include 
+#include 
 
-#include "module.h"
+#include "libc.h"
+#include "modlib/modlib.h"
 
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: mod_allocbuffer
+ * Name: modlib_allocbuffer
  *
  * Description:
  *   Perform the initial allocation of the I/O buffer, if it has not already
@@ -64,7 +65,7 @@
  *
  ****************************************************************************/
 
-int mod_allocbuffer(FAR struct mod_loadinfo_s *loadinfo)
+int modlib_allocbuffer(FAR struct mod_loadinfo_s *loadinfo)
 {
   /* Has a buffer been allocated> */
 
@@ -72,21 +73,21 @@ int mod_allocbuffer(FAR struct mod_loadinfo_s *loadinfo)
     {
       /* No.. allocate one now */
 
-      loadinfo->iobuffer = (FAR uint8_t *)kmm_malloc(CONFIG_MODULE_BUFFERSIZE);
+      loadinfo->iobuffer = (FAR uint8_t *)lib_malloc(CONFIG_MODLIB_BUFFERSIZE);
       if (!loadinfo->iobuffer)
         {
-          sdbg("Failed to allocate an I/O buffer\n");
+          serr("ERROR: Failed to allocate an I/O buffer\n");
           return -ENOMEM;
         }
 
-      loadinfo->buflen = CONFIG_MODULE_BUFFERSIZE;
+      loadinfo->buflen = CONFIG_MODLIB_BUFFERSIZE;
     }
 
   return OK;
 }
 
 /****************************************************************************
- * Name: mod_reallocbuffer
+ * Name: modlib_reallocbuffer
  *
  * Description:
  *   Increase the size of I/O buffer by the specified buffer increment.
@@ -97,7 +98,7 @@ int mod_allocbuffer(FAR struct mod_loadinfo_s *loadinfo)
  *
  ****************************************************************************/
 
-int mod_reallocbuffer(FAR struct mod_loadinfo_s *loadinfo, size_t increment)
+int modlib_reallocbuffer(FAR struct mod_loadinfo_s *loadinfo, size_t increment)
 {
   FAR void *buffer;
   size_t newsize;
@@ -108,10 +109,10 @@ int mod_reallocbuffer(FAR struct mod_loadinfo_s *loadinfo, size_t increment)
 
   /* And perform the reallocation */
 
-   buffer = kmm_realloc((FAR void *)loadinfo->iobuffer, newsize);
+   buffer = lib_realloc((FAR void *)loadinfo->iobuffer, newsize);
    if (!buffer)
     {
-      sdbg("Failed to reallocate the I/O buffer\n");
+      serr("ERROR: Failed to reallocate the I/O buffer\n");
       return -ENOMEM;
     }
 
@@ -121,4 +122,3 @@ int mod_reallocbuffer(FAR struct mod_loadinfo_s *loadinfo, size_t increment)
   loadinfo->buflen   = newsize;
   return OK;
 }
-
diff --git a/sched/module/mod_load.c b/libc/modlib/modlib_load.c
similarity index 86%
rename from sched/module/mod_load.c
rename to libc/modlib/modlib_load.c
index cce6ac0cb20cd4b905d10e8568f561162d2107f9..5fa1e320c8f3fddefffef8f835b3528ad2a286eb 100644
--- a/sched/module/mod_load.c
+++ b/libc/modlib/modlib_load.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * sched/module/mod_load.c
+ * libc/modlib/modlib_load.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -50,16 +50,17 @@
 #include 
 #include 
 
-#include 
 #include 
+#include 
 
-#include "module.h"
+#include "libc.h"
+#include "modlib/modlib.h"
 
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
 
-#define ELF_ALIGN_MASK   ((1 << CONFIG_MODULE_ALIGN_LOG2) - 1)
+#define ELF_ALIGN_MASK   ((1 << CONFIG_MODLIB_ALIGN_LOG2) - 1)
 #define ELF_ALIGNUP(a)   (((unsigned long)(a) + ELF_ALIGN_MASK) & ~ELF_ALIGN_MASK)
 #define ELF_ALIGNDOWN(a) ((unsigned long)(a) & ~ELF_ALIGN_MASK)
 
@@ -76,7 +77,7 @@
  ****************************************************************************/
 
 /****************************************************************************
- * Name: mod_elfsize
+ * Name: modlib_elfsize
  *
  * Description:
  *   Calculate total memory allocation for the ELF file.
@@ -87,7 +88,7 @@
  *
  ****************************************************************************/
 
-static void mod_elfsize(struct mod_loadinfo_s *loadinfo)
+static void modlib_elfsize(struct mod_loadinfo_s *loadinfo)
 {
   size_t textsize;
   size_t datasize;
@@ -130,7 +131,7 @@ static void mod_elfsize(struct mod_loadinfo_s *loadinfo)
 }
 
 /****************************************************************************
- * Name: mod_loadfile
+ * Name: modlib_loadfile
  *
  * Description:
  *   Read the section data into memory. Section addresses in the shdr[] are
@@ -142,7 +143,7 @@ static void mod_elfsize(struct mod_loadinfo_s *loadinfo)
  *
  ****************************************************************************/
 
-static inline int mod_loadfile(FAR struct mod_loadinfo_s *loadinfo)
+static inline int modlib_loadfile(FAR struct mod_loadinfo_s *loadinfo)
 {
   FAR uint8_t *text;
   FAR uint8_t *data;
@@ -152,7 +153,7 @@ static inline int mod_loadfile(FAR struct mod_loadinfo_s *loadinfo)
 
   /* Read each section into memory that is marked SHF_ALLOC + SHT_NOBITS */
 
-  svdbg("Loaded sections:\n");
+  sinfo("Loaded sections:\n");
   text = (FAR uint8_t *)loadinfo->textalloc;
   data = (FAR uint8_t *)loadinfo->datastart;
 
@@ -189,10 +190,10 @@ static inline int mod_loadfile(FAR struct mod_loadinfo_s *loadinfo)
         {
           /* Read the section data from sh_offset to the memory region */
 
-          ret = mod_read(loadinfo, *pptr, shdr->sh_size, shdr->sh_offset);
+          ret = modlib_read(loadinfo, *pptr, shdr->sh_size, shdr->sh_offset);
           if (ret < 0)
             {
-              sdbg("ERROR: Failed to read section %d: %d\n", i, ret);
+              serr("ERROR: Failed to read section %d: %d\n", i, ret);
               return ret;
             }
         }
@@ -208,7 +209,7 @@ static inline int mod_loadfile(FAR struct mod_loadinfo_s *loadinfo)
 
       /* Update sh_addr to point to copy in memory */
 
-      svdbg("%d. %08lx->%08lx\n", i,
+      sinfo("%d. %08lx->%08lx\n", i,
             (unsigned long)shdr->sh_addr, (unsigned long)*pptr);
 
       shdr->sh_addr = (uintptr_t)*pptr;
@@ -226,7 +227,7 @@ static inline int mod_loadfile(FAR struct mod_loadinfo_s *loadinfo)
  ****************************************************************************/
 
 /****************************************************************************
- * Name: mod_load
+ * Name: modlib_load
  *
  * Description:
  *   Loads the binary into memory, allocating memory, performing relocations
@@ -238,34 +239,34 @@ static inline int mod_loadfile(FAR struct mod_loadinfo_s *loadinfo)
  *
  ****************************************************************************/
 
-int mod_load(FAR struct mod_loadinfo_s *loadinfo)
+int modlib_load(FAR struct mod_loadinfo_s *loadinfo)
 {
   int ret;
 
-  svdbg("loadinfo: %p\n", loadinfo);
+  sinfo("loadinfo: %p\n", loadinfo);
   DEBUGASSERT(loadinfo && loadinfo->filfd >= 0);
 
   /* Load section headers into memory */
 
-  ret = mod_loadshdrs(loadinfo);
+  ret = modlib_loadshdrs(loadinfo);
   if (ret < 0)
     {
-      sdbg("ERROR: mod_loadshdrs failed: %d\n", ret);
+      serr("ERROR: modlib_loadshdrs failed: %d\n", ret);
       goto errout_with_buffers;
     }
 
   /* Determine total size to allocate */
 
-  mod_elfsize(loadinfo);
+  modlib_elfsize(loadinfo);
 
   /* Allocate (and zero) memory for the ELF file. */
 
   /* Allocate memory to hold the ELF image */
 
-  loadinfo->textalloc = (uintptr_t)kmm_zalloc(loadinfo->textsize + loadinfo->datasize);
+  loadinfo->textalloc = (uintptr_t)lib_zalloc(loadinfo->textsize + loadinfo->datasize);
   if (!loadinfo->textalloc)
     {
-      sdbg("ERROR: Failed to allocate memory for the module\n");
+      serr("ERROR: Failed to allocate memory for the module\n");
       ret = -ENOMEM;
       goto errout_with_buffers;
     }
@@ -274,10 +275,10 @@ int mod_load(FAR struct mod_loadinfo_s *loadinfo)
 
   /* Load ELF section data into memory */
 
-  ret = mod_loadfile(loadinfo);
+  ret = modlib_loadfile(loadinfo);
   if (ret < 0)
     {
-      sdbg("ERROR: mod_loadfile failed: %d\n", ret);
+      serr("ERROR: modlib_loadfile failed: %d\n", ret);
       goto errout_with_buffers;
     }
 
@@ -286,6 +287,6 @@ int mod_load(FAR struct mod_loadinfo_s *loadinfo)
   /* Error exits */
 
 errout_with_buffers:
-  mod_unload(loadinfo);
+  modlib_unload(loadinfo);
   return ret;
 }
diff --git a/sched/module/mod_read.c b/libc/modlib/modlib_read.c
similarity index 85%
rename from sched/module/mod_read.c
rename to libc/modlib/modlib_read.c
index 8cad4adb8913cf30dce901a69e855ec2dc52be32..84ae5fb3b607181f5b2b68b8cb099699547ab0a5 100644
--- a/sched/module/mod_read.c
+++ b/libc/modlib/modlib_read.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * sched/module/mod_read.c
+ * libc/modlib/modlib_read.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -48,8 +48,7 @@
 #include 
 
 #include 
-
-#include "module.h"
+#include 
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -57,20 +56,16 @@
 
 #undef ELF_DUMP_READDATA       /* Define to dump all file data read */
 
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: mod_dumpreaddata
+ * Name: modlib_dumpreaddata
  ****************************************************************************/
 
 #if defined(ELF_DUMP_READDATA)
-static inline void mod_dumpreaddata(FAR char *buffer, int buflen)
+static inline void modlib_dumpreaddata(FAR char *buffer, int buflen)
 {
   FAR uint32_t *buf32 = (FAR uint32_t *)buffer;
   int i;
@@ -88,7 +83,7 @@ static inline void mod_dumpreaddata(FAR char *buffer, int buflen)
     }
 }
 #else
-#  define mod_dumpreaddata(b,n)
+#  define modlib_dumpreaddata(b,n)
 #endif
 
 /****************************************************************************
@@ -96,7 +91,7 @@ static inline void mod_dumpreaddata(FAR char *buffer, int buflen)
  ****************************************************************************/
 
 /****************************************************************************
- * Name: mod_read
+ * Name: modlib_read
  *
  * Description:
  *   Read 'readsize' bytes from the object file at 'offset'.  The data is
@@ -108,13 +103,13 @@ static inline void mod_dumpreaddata(FAR char *buffer, int buflen)
  *
  ****************************************************************************/
 
-int mod_read(FAR struct mod_loadinfo_s *loadinfo, FAR uint8_t *buffer,
-             size_t readsize, off_t offset)
+int modlib_read(FAR struct mod_loadinfo_s *loadinfo, FAR uint8_t *buffer,
+                size_t readsize, off_t offset)
 {
   ssize_t nbytes;      /* Number of bytes read */
   off_t   rpos;        /* Position returned by lseek */
 
-  svdbg("Read %ld bytes from offset %ld\n", (long)readsize, (long)offset);
+  sinfo("Read %ld bytes from offset %ld\n", (long)readsize, (long)offset);
 
   /* Loop until all of the requested data has been read. */
 
@@ -126,7 +121,7 @@ int mod_read(FAR struct mod_loadinfo_s *loadinfo, FAR uint8_t *buffer,
       if (rpos != offset)
         {
           int errval = errno;
-          sdbg("Failed to seek to position %lu: %d\n",
+          serr("ERROR: Failed to seek to position %lu: %d\n",
                (unsigned long)offset, errval);
           return -errval;
         }
@@ -142,14 +137,14 @@ int mod_read(FAR struct mod_loadinfo_s *loadinfo, FAR uint8_t *buffer,
 
            if (errval != EINTR)
              {
-               sdbg("Read from offset %lu failed: %d\n",
+               serr("ERROR: Read from offset %lu failed: %d\n",
                     (unsigned long)offset, errval);
                return -errval;
              }
          }
        else if (nbytes == 0)
          {
-           sdbg("Unexpected end of file\n");
+           serr("ERROR: Unexpected end of file\n");
            return -ENODATA;
          }
        else
@@ -160,6 +155,6 @@ int mod_read(FAR struct mod_loadinfo_s *loadinfo, FAR uint8_t *buffer,
          }
     }
 
-  mod_dumpreaddata(buffer, readsize);
+  modlib_dumpreaddata(buffer, readsize);
   return OK;
 }
diff --git a/sched/module/mod_registry.c b/libc/modlib/modlib_registry.c
similarity index 62%
rename from sched/module/mod_registry.c
rename to libc/modlib/modlib_registry.c
index 7df1168b350a07932e779a42cd0dd4d22d23ac0f..2cab2012301e239cad5064ff0c4b65f0e2cb8e76 100644
--- a/sched/module/mod_registry.c
+++ b/libc/modlib/modlib_registry.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * sched/module/mod_registry.c
+ * libc/modlib/modlib_registry.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -45,14 +45,36 @@
 #include 
 
 #include 
+#include 
 
-#include "module.h"
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define NO_HOLDER ((pid_t)-1)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct mod_registrylock_s
+{
+  sem_t lock;         /* The actual registry lock */
+  pid_t holder;       /* The PID of the current holder of the lock */
+  int16_t count;      /* The number of nested calls to modlib_registry_lock */
+};
 
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
-static sem_t g_mod_lock = SEM_INITIALIZER(1);
+static struct mod_registrylock_s g_modlock =
+{
+  SEM_INITIALIZER(1), /* lock */
+  0,                  /* pid */
+  0                   /* count */
+};
+
 static FAR struct module_s *g_mod_registry;
 
 /****************************************************************************
@@ -60,7 +82,7 @@ static FAR struct module_s *g_mod_registry;
  ****************************************************************************/
 
 /****************************************************************************
- * Name: mod_registry_lock
+ * Name: modlib_registry_lock
  *
  * Description:
  *   Get exclusive access to the module registry.
@@ -73,16 +95,43 @@ static FAR struct module_s *g_mod_registry;
  *
  ****************************************************************************/
 
-void mod_registry_lock(void)
+void modlib_registry_lock(void)
 {
-  while (sem_post(&g_mod_lock) < 0)
+  pid_t me;
+
+  /* Do we already hold the semaphore? */
+
+  me = getpid();
+  if (me == g_modlock.holder)
     {
-      DEBUGASSERT(errno == EINTR);
+      /* Yes... just increment the count */
+
+      g_modlock.count++;
+      DEBUGASSERT(g_modlock.count > 0);
+    }
+
+  /* Take the semaphore (perhaps waiting) */
+
+  else
+    {
+      while (sem_wait(&g_modlock.lock) != 0)
+        {
+          /* The only case that an error should occr here is if
+           * the wait was awakened by a signal.
+           */
+
+          ASSERT(get_errno() == EINTR);
+        }
+
+      /* No we hold the semaphore */
+
+      g_modlock.holder = me;
+      g_modlock.count  = 1;
     }
 }
 
 /****************************************************************************
- * Name: mod_registry_unlock
+ * Name: modlib_registry_unlock
  *
  * Description:
  *   Relinquish the lock on the module registry
@@ -95,13 +144,31 @@ void mod_registry_lock(void)
  *
  ****************************************************************************/
 
-void mod_registry_unlock(void)
+void modlib_registry_unlock(void)
 {
-  sem_post(&g_mod_lock);
+  DEBUGASSERT(g_modlock.holder == getpid());
+
+  /* Is this our last count on the semaphore? */
+
+  if (g_modlock.count > 1)
+    {
+      /* No.. just decrement the count */
+
+      g_modlock.count--;
+    }
+
+  /* Yes.. then we can really release the semaphore */
+
+  else
+    {
+      g_modlock.holder = NO_HOLDER;
+      g_modlock.count  = 0;
+      sem_post(&g_modlock.lock);
+    }
 }
 
 /****************************************************************************
- * Name: mod_registry_add
+ * Name: modlib_registry_add
  *
  * Description:
  *   Add a new entry to the module registry.
@@ -117,7 +184,7 @@ void mod_registry_unlock(void)
  *
  ****************************************************************************/
 
-void mod_registry_add(FAR struct module_s *modp)
+void modlib_registry_add(FAR struct module_s *modp)
 {
   DEBUGASSERT(modp);
   modp->flink = g_mod_registry;
@@ -125,7 +192,7 @@ void mod_registry_add(FAR struct module_s *modp)
 }
 
 /****************************************************************************
- * Name: mod_registry_del
+ * Name: modlib_registry_del
  *
  * Description:
  *   Remove a module entry from the registry
@@ -142,7 +209,7 @@ void mod_registry_add(FAR struct module_s *modp)
  *
  ****************************************************************************/
 
-int mod_registry_del(FAR struct module_s *modp)
+int modlib_registry_del(FAR struct module_s *modp)
 {
   FAR struct module_s *prev;
   FAR struct module_s *curr;
@@ -153,7 +220,7 @@ int mod_registry_del(FAR struct module_s *modp)
 
   if (curr == NULL)
     {
-      sdbg("ERROR: Could not find module entry\n");
+      serr("ERROR: Could not find module entry\n");
       return -ENOENT;
     }
 
@@ -171,13 +238,13 @@ int mod_registry_del(FAR struct module_s *modp)
 }
 
 /****************************************************************************
- * Name: mod_registry_find
+ * Name: modlib_registry_find
  *
  * Description:
  *   Find an entry in the module registry using the name of the module.
  *
  * Input Parameters:
- *   modulename - The name of the module to be found
+ *   modname - The name of the module to be found
  *
  * Returned Value:
  *   If the registry entry is found, a pointer to the module entry is
@@ -188,19 +255,55 @@ int mod_registry_del(FAR struct module_s *modp)
  *
  ****************************************************************************/
 
-FAR struct module_s *mod_registry_find(FAR const char *modulename)
+#ifdef HAVE_MODLIB_NAMES
+FAR struct module_s *modlib_registry_find(FAR const char *modname)
 {
   FAR struct module_s *modp;
 
   for (modp = g_mod_registry;
-       modp != NULL && strncmp(modp->modulename, modulename, MODULENAME_MAX) != 0;
+       modp != NULL && strncmp(modp->modname, modname, MODLIB_NAMEMAX) != 0;
        modp = modp->flink);
 
   return modp;
 }
+#endif
 
 /****************************************************************************
- * Name: mod_registry_foreach
+ * Name: modlib_registry_verify
+ *
+ * Description:
+ *   Verify that a module handle is valid by traversing the module list and
+ *   assuring that the module still resides in the list.  If it does not,
+ *   the handle is probably a stale pointer.
+ *
+ * Input Parameters:
+ *   modp - The registry entry to be verified.
+ *
+ * Returned Value:
+ *   Returns OK is the module is valid; -ENOENT otherwise.
+ *
+ * Assumptions:
+ *   The caller holds the lock on the module registry.
+ *
+ ****************************************************************************/
+
+int modlib_registry_verify(FAR struct module_s *modp)
+{
+  FAR struct module_s *node;
+
+  for (node = g_mod_registry; node != NULL; node = node->flink)
+    {
+      if (node == modp)
+        {
+          return OK;
+        }
+    }
+
+  return -ENOENT;
+}
+
+/****************************************************************************
+ * Name: modlib_registry_foreach
  *
  * Description:
  *   Visit each module in the registry
@@ -215,19 +318,16 @@ FAR struct module_s *mod_registry_find(FAR const char *modulename)
  *   function returns a non-zero value, the traversal will be terminated and
  *   that non-zero value will be returned.
  *
- * Assumptions:
- *   The caller does *NOT* hold the lock on the module registry.
- *
  ****************************************************************************/
 
-int mod_registry_foreach(mod_callback_t callback, FAR void *arg)
+int modlib_registry_foreach(mod_callback_t callback, FAR void *arg)
 {
   FAR struct module_s *modp;
-  int ret;
+  int ret = OK;
 
   /* Get exclusive access to the module registry */
 
-  mod_registry_lock();
+  modlib_registry_lock();
 
   /* Visit each installed module */
 
@@ -238,10 +338,10 @@ int mod_registry_foreach(mod_callback_t callback, FAR void *arg)
       ret = callback(modp, arg);
       if (ret != 0)
         {
-          return ret;
+          break;
         }
     }
 
-  mod_registry_unlock();
-  return OK;
+  modlib_registry_unlock();
+  return ret;
 }
\ No newline at end of file
diff --git a/sched/module/mod_sections.c b/libc/modlib/modlib_sections.c
similarity index 81%
rename from sched/module/mod_sections.c
rename to libc/modlib/modlib_sections.c
index dcdb4de9918bf1f28d761717396e868a7e0cfa77..58a11076ef57165f8e210ff7ca5c3aee58271937 100644
--- a/sched/module/mod_sections.c
+++ b/libc/modlib/modlib_sections.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * sched/module/mod_sections.c
+ * libc/modlib/modlib_sections.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -45,17 +45,18 @@
 #include 
 #include 
 
-#include 
 #include 
+#include 
 
-#include "module.h"
+#include "libc.h"
+#include "modlib/modlib.h"
 
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: mod_sectname
+ * Name: modlib_sectname
  *
  * Description:
  *   Get the symbol name in loadinfo->iobuffer[].
@@ -66,8 +67,8 @@
  *
  ****************************************************************************/
 
-static inline int mod_sectname(FAR struct mod_loadinfo_s *loadinfo,
-                               FAR const Elf32_Shdr *shdr)
+static inline int modlib_sectname(FAR struct mod_loadinfo_s *loadinfo,
+                                  FAR const Elf32_Shdr *shdr)
 {
   FAR Elf32_Shdr *shstr;
   FAR uint8_t *buffer;
@@ -85,7 +86,7 @@ static inline int mod_sectname(FAR struct mod_loadinfo_s *loadinfo,
   shstrndx = loadinfo->ehdr.e_shstrndx;
   if (shstrndx == SHN_UNDEF)
     {
-      sdbg("No section header string table\n");
+      serr("ERROR: No section header string table\n");
       return -EINVAL;
     }
 
@@ -118,7 +119,7 @@ static inline int mod_sectname(FAR struct mod_loadinfo_s *loadinfo,
         {
           if (loadinfo->filelen <= offset)
             {
-              sdbg("At end of file\n");
+              serr("ERROR: At end of file\n");
               return -EINVAL;
             }
 
@@ -128,10 +129,10 @@ static inline int mod_sectname(FAR struct mod_loadinfo_s *loadinfo,
       /* Read that number of bytes into the array */
 
       buffer = &loadinfo->iobuffer[bytesread];
-      ret = mod_read(loadinfo, buffer, readlen, offset);
+      ret = modlib_read(loadinfo, buffer, readlen, offset);
       if (ret < 0)
         {
-          sdbg("Failed to read section name\n");
+          serr("ERROR: Failed to read section name: %d\n", ret);
           return ret;
         }
 
@@ -148,10 +149,10 @@ static inline int mod_sectname(FAR struct mod_loadinfo_s *loadinfo,
 
       /* No.. then we have to read more */
 
-      ret = mod_reallocbuffer(loadinfo, CONFIG_MODULE_BUFFERINCR);
+      ret = modlib_reallocbuffer(loadinfo, CONFIG_MODLIB_BUFFERINCR);
       if (ret < 0)
         {
-          sdbg("mod_reallocbuffer failed: %d\n", ret);
+          serr("ERROR: mod_reallocbuffer failed: %d\n", ret);
           return ret;
         }
     }
@@ -166,7 +167,7 @@ static inline int mod_sectname(FAR struct mod_loadinfo_s *loadinfo,
  ****************************************************************************/
 
 /****************************************************************************
- * Name: mod_loadshdrs
+ * Name: modlib_loadshdrs
  *
  * Description:
  *   Loads section headers into memory.
@@ -177,7 +178,7 @@ static inline int mod_sectname(FAR struct mod_loadinfo_s *loadinfo,
  *
  ****************************************************************************/
 
-int mod_loadshdrs(FAR struct mod_loadinfo_s *loadinfo)
+int modlib_loadshdrs(FAR struct mod_loadinfo_s *loadinfo)
 {
   size_t shdrsize;
   int ret;
@@ -188,7 +189,7 @@ int mod_loadshdrs(FAR struct mod_loadinfo_s *loadinfo)
 
   if (loadinfo->ehdr.e_shnum < 1)
     {
-      sdbg("No sections(?)\n");
+      serr("ERROR: No sections(?)\n");
       return -EINVAL;
     }
 
@@ -197,34 +198,34 @@ int mod_loadshdrs(FAR struct mod_loadinfo_s *loadinfo)
   shdrsize = (size_t)loadinfo->ehdr.e_shentsize * (size_t)loadinfo->ehdr.e_shnum;
   if (loadinfo->ehdr.e_shoff + shdrsize > loadinfo->filelen)
     {
-      sdbg("Insufficent space in file for section header table\n");
+      serr("ERROR: Insufficent space in file for section header table\n");
       return -ESPIPE;
     }
 
   /* Allocate memory to hold a working copy of the sector header table */
 
-  loadinfo->shdr = (FAR FAR Elf32_Shdr *)kmm_malloc(shdrsize);
+  loadinfo->shdr = (FAR FAR Elf32_Shdr *)lib_malloc(shdrsize);
   if (!loadinfo->shdr)
     {
-      sdbg("Failed to allocate the section header table. Size: %ld\n",
+      serr("ERROR: Failed to allocate the section header table. Size: %ld\n",
            (long)shdrsize);
       return -ENOMEM;
     }
 
   /* Read the section header table into memory */
 
-  ret = mod_read(loadinfo, (FAR uint8_t *)loadinfo->shdr, shdrsize,
+  ret = modlib_read(loadinfo, (FAR uint8_t *)loadinfo->shdr, shdrsize,
                     loadinfo->ehdr.e_shoff);
   if (ret < 0)
     {
-      sdbg("Failed to read section header table: %d\n", ret);
+      serr("ERROR: Failed to read section header table: %d\n", ret);
     }
 
   return ret;
 }
 
 /****************************************************************************
- * Name: mod_findsection
+ * Name: modlib_findsection
  *
  * Description:
  *   A section by its name.
@@ -239,8 +240,9 @@ int mod_loadshdrs(FAR struct mod_loadinfo_s *loadinfo)
  *
  ****************************************************************************/
 
-int mod_findsection(FAR struct mod_loadinfo_s *loadinfo,
-                    FAR const char *sectname)
+#if 0 /* Not used */
+int modlib_findsection(FAR struct mod_loadinfo_s *loadinfo,
+                       FAR const char *sectname)
 {
   FAR const Elf32_Shdr *shdr;
   int ret;
@@ -253,16 +255,16 @@ int mod_findsection(FAR struct mod_loadinfo_s *loadinfo,
       /* Get the name of this section */
 
       shdr = &loadinfo->shdr[i];
-      ret  = mod_sectname(loadinfo, shdr);
+      ret  = modlib_sectname(loadinfo, shdr);
       if (ret < 0)
         {
-          sdbg("mod_sectname failed: %d\n", ret);
+          serr("ERROR: modlib_sectname failed: %d\n", ret);
           return ret;
         }
 
       /* Check if the name of this section is 'sectname' */
 
-      svdbg("%d. Comparing \"%s\" and .\"%s\"\n",
+      sinfo("%d. Comparing \"%s\" and .\"%s\"\n",
             i, loadinfo->iobuffer, sectname);
 
       if (strcmp((FAR const char *)loadinfo->iobuffer, sectname) == 0)
@@ -277,3 +279,4 @@ int mod_findsection(FAR struct mod_loadinfo_s *loadinfo,
 
   return -ENOENT;
 }
+#endif
diff --git a/sched/module/mod_symbols.c b/libc/modlib/modlib_symbols.c
similarity index 61%
rename from sched/module/mod_symbols.c
rename to libc/modlib/modlib_symbols.c
index bc91a426e3e45d3471c056d9b83cd12a4a0d4da1..556da2fee4f0196d4e7c4b31531d7dd3309b7d01 100644
--- a/sched/module/mod_symbols.c
+++ b/libc/modlib/modlib_symbols.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * sched/module/mod_symbols.c
+ * libc/modlib/modlib_symbols.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -46,24 +46,43 @@
 #include 
 
 #include 
+#include 
 #include 
 
-#include "module.h"
+#include "modlib/modlib.h"
 
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
 
-#ifndef CONFIG_MODULE_BUFFERINCR
-#  define CONFIG_MODULE_BUFFERINCR 32
+/* Amount to reallocate buffer when buffer is full */
+
+#ifndef CONFIG_MODLIB_BUFFERINCR
+#  define CONFIG_MODLIB_BUFFERINCR 32
 #endif
 
+/* Return values search for exported modules */
+
+#define SYM_NOT_FOUND 0
+#define SYM_FOUND     1
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct mod_exportinfo_s
+{
+  FAR const char *name;              /* Symbol name to find */
+  FAR struct module_s *modp;         /* The module that needs the symbol */
+  FAR const struct symtab_s *symbol; /* Symbol info returned (if found) */
+};
+
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: mod_symname
+ * Name: modlib_symname
  *
  * Description:
  *   Get the symbol name in loadinfo->iobuffer[].
@@ -78,8 +97,8 @@
  *
  ****************************************************************************/
 
-static int mod_symname(FAR struct mod_loadinfo_s *loadinfo,
-                       FAR const Elf32_Sym *sym)
+static int modlib_symname(FAR struct mod_loadinfo_s *loadinfo,
+                          FAR const Elf32_Sym *sym)
 {
   FAR uint8_t *buffer;
   off_t  offset;
@@ -93,7 +112,7 @@ static int mod_symname(FAR struct mod_loadinfo_s *loadinfo,
 
   if (sym->st_name == 0)
     {
-      sdbg("Symbol has no name\n");
+      serr("ERROR: Symbol has no name\n");
       return -ESRCH;
     }
 
@@ -112,7 +131,7 @@ static int mod_symname(FAR struct mod_loadinfo_s *loadinfo,
         {
           if (loadinfo->filelen <= offset)
             {
-              sdbg("At end of file\n");
+              serr("ERROR: At end of file\n");
               return -EINVAL;
             }
 
@@ -122,10 +141,10 @@ static int mod_symname(FAR struct mod_loadinfo_s *loadinfo,
       /* Read that number of bytes into the array */
 
       buffer = &loadinfo->iobuffer[bytesread];
-      ret = mod_read(loadinfo, buffer, readlen, offset);
+      ret = modlib_read(loadinfo, buffer, readlen, offset);
       if (ret < 0)
         {
-          sdbg("mod_read failed: %d\n", ret);
+          serr("ERROR: modlib_read failed: %d\n", ret);
           return ret;
         }
 
@@ -142,10 +161,10 @@ static int mod_symname(FAR struct mod_loadinfo_s *loadinfo,
 
       /* No.. then we have to read more */
 
-      ret = mod_reallocbuffer(loadinfo, CONFIG_MODULE_BUFFERINCR);
+      ret = modlib_reallocbuffer(loadinfo, CONFIG_MODLIB_BUFFERINCR);
       if (ret < 0)
         {
-          sdbg("mod_reallocbuffer failed: %d\n", ret);
+          serr("ERROR: mod_reallocbuffer failed: %d\n", ret);
           return ret;
         }
     }
@@ -155,12 +174,62 @@ static int mod_symname(FAR struct mod_loadinfo_s *loadinfo,
   return OK;
 }
 
+/****************************************************************************
+ * Name: modlib_symcallback
+ *
+ * Description:
+ *   modlib_registry_foreach() callback function.  Test if the provided module,
+ *   modp, exports the symbol of interest.  If so, return that symbol value
+ *   and setup the module dependency relationship.
+ *
+ * Returned Value:
+ *   0 (OK) is returned on success and a negated errno is returned on
+ *   failure.
+ *
+ ****************************************************************************/
+
+static int modlib_symcallback(FAR struct module_s *modp, FAR void *arg)
+{
+  FAR struct mod_exportinfo_s *exportinfo = (FAR struct mod_exportinfo_s *)arg;
+  int ret;
+
+  /* Check if this module exports a symbol of that name */
+
+#ifdef CONFIG_SYMTAB_ORDEREDBYNAME
+  exportinfo->symbol = symtab_findorderedbyname(modp->modinfo.exports,
+                                                exportinfo->name,
+                                                modp->modinfo.nexports);
+#else
+  exportinfo->symbol = symtab_findbyname(modp->modinfo.exports,
+                                         exportinfo->name,
+                                         modp->modinfo.nexports);
+#endif
+
+   if (exportinfo->symbol != NULL)
+     {
+       /* Yes.. save the dependency relationship and return SYM_FOUND to
+        * stop the traversal.
+        */
+
+       ret = modlib_depend(exportinfo->modp, modp);
+       if (ret < 0)
+         {
+           serr("ERROR: modlib_depend failed: %d\n", ret);
+           return ret;
+         }
+
+       return SYM_FOUND;
+     }
+
+   return SYM_NOT_FOUND;
+}
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: mod_findsymtab
+ * Name: modlib_findsymtab
  *
  * Description:
  *   Find the symbol table section.
@@ -171,7 +240,7 @@ static int mod_symname(FAR struct mod_loadinfo_s *loadinfo,
  *
  ****************************************************************************/
 
-int mod_findsymtab(FAR struct mod_loadinfo_s *loadinfo)
+int modlib_findsymtab(FAR struct mod_loadinfo_s *loadinfo)
 {
   int i;
 
@@ -191,7 +260,7 @@ int mod_findsymtab(FAR struct mod_loadinfo_s *loadinfo)
 
   if (loadinfo->symtabidx == 0)
     {
-      sdbg("No symbols in ELF file\n");
+      serr("ERROR: No symbols in ELF file\n");
       return -EINVAL;
     }
 
@@ -199,7 +268,7 @@ int mod_findsymtab(FAR struct mod_loadinfo_s *loadinfo)
 }
 
 /****************************************************************************
- * Name: mod_readsym
+ * Name: modlib_readsym
  *
  * Description:
  *   Read the ELFT symbol structure at the specfied index into memory.
@@ -215,8 +284,8 @@ int mod_findsymtab(FAR struct mod_loadinfo_s *loadinfo)
  *
  ****************************************************************************/
 
-int mod_readsym(FAR struct mod_loadinfo_s *loadinfo, int index,
-                FAR Elf32_Sym *sym)
+int modlib_readsym(FAR struct mod_loadinfo_s *loadinfo, int index,
+                   FAR Elf32_Sym *sym)
 {
   FAR Elf32_Shdr *symtab = &loadinfo->shdr[loadinfo->symtabidx];
   off_t offset;
@@ -225,7 +294,7 @@ int mod_readsym(FAR struct mod_loadinfo_s *loadinfo, int index,
 
   if (index < 0 || index > (symtab->sh_size / sizeof(Elf32_Sym)))
     {
-      sdbg("Bad relocation symbol index: %d\n", index);
+      serr("ERROR: Bad relocation symbol index: %d\n", index);
       return -EINVAL;
     }
 
@@ -235,17 +304,18 @@ int mod_readsym(FAR struct mod_loadinfo_s *loadinfo, int index,
 
   /* And, finally, read the symbol table entry into memory */
 
-  return mod_read(loadinfo, (FAR uint8_t *)sym, sizeof(Elf32_Sym), offset);
+  return modlib_read(loadinfo, (FAR uint8_t *)sym, sizeof(Elf32_Sym), offset);
 }
 
 /****************************************************************************
- * Name: mod_symvalue
+ * Name: modlib_symvalue
  *
  * Description:
  *   Get the value of a symbol.  The updated value of the symbol is returned
  *   in the st_value field of the symbol table entry.
  *
  * Input Parameters:
+ *   modp     - Module state information
  *   loadinfo - Load state information
  *   sym      - Symbol table entry (value might be undefined)
  *
@@ -261,9 +331,11 @@ int mod_readsym(FAR struct mod_loadinfo_s *loadinfo, int index,
  *
  ****************************************************************************/
 
-int mod_symvalue(FAR struct mod_loadinfo_s *loadinfo, FAR Elf32_Sym *sym)
+int modlib_symvalue(FAR struct module_s *modp,
+                    FAR struct mod_loadinfo_s *loadinfo, FAR Elf32_Sym *sym)
 {
   FAR const struct symtab_s *symbol;
+  struct mod_exportinfo_s exportinfo;
   uintptr_t secbase;
   int ret;
 
@@ -273,7 +345,7 @@ int mod_symvalue(FAR struct mod_loadinfo_s *loadinfo, FAR Elf32_Sym *sym)
       {
         /* NuttX ELF modules should be compiled with -fno-common. */
 
-        sdbg("SHN_COMMON: Re-compile with -fno-common\n");
+        serr("ERROR: SHN_COMMON: Re-compile with -fno-common\n");
         return -ENOSYS;
       }
 
@@ -281,7 +353,7 @@ int mod_symvalue(FAR struct mod_loadinfo_s *loadinfo, FAR Elf32_Sym *sym)
       {
         /* st_value already holds the correct value */
 
-        svdbg("SHN_ABS: st_value=%08lx\n", (long)sym->st_value);
+        sinfo("SHN_ABS: st_value=%08lx\n", (long)sym->st_value);
         return OK;
       }
 
@@ -289,7 +361,7 @@ int mod_symvalue(FAR struct mod_loadinfo_s *loadinfo, FAR Elf32_Sym *sym)
       {
         /* Get the name of the undefined symbol */
 
-        ret = mod_symname(loadinfo, sym);
+        ret = modlib_symname(loadinfo, sym);
         if (ret < 0)
           {
             /* There are a few relocations for a few architectures that do
@@ -298,30 +370,56 @@ int mod_symvalue(FAR struct mod_loadinfo_s *loadinfo, FAR Elf32_Sym *sym)
              * indicate the nameless symbol.
              */
 
-            sdbg("SHN_UNDEF: Failed to get symbol name: %d\n", ret);
+            serr("ERROR: SHN_UNDEF: Failed to get symbol name: %d\n", ret);
             return ret;
           }
 
-        /* Check if the base code exports a symbol of this name */
+        /* First check if the symbol is exported by an installed module.
+         * Newest modules are installed at the head of the list.  Therefore,
+         * if the symbol is exported by numerous modules, then the most
+         * recently installed will take precedence.
+         */
 
+        exportinfo.name   = (FAR const char *)loadinfo->iobuffer;
+        exportinfo.modp   = modp;
+        exportinfo.symbol = NULL;
+
+        ret = modlib_registry_foreach(modlib_symcallback, (FAR void *)&exportinfo);
+        if (ret < 0)
+          {
+            serr("ERROR: modlib_symcallback failed: \n", ret);
+            return ret;
+          }
+
+        symbol = exportinfo.symbol;
+
+        /* If the symbol is not exported by any module, then check if the
+         * base code exports a symbol of this name.
+         */
+
+        if (symbol == NULL)
+          {
 #ifdef CONFIG_SYMTAB_ORDEREDBYNAME
-        symbol = symtab_findorderedbyname(g_mod_symtab,
-                                          (FAR char *)loadinfo->iobuffer,
-                                          g_mod_nsymbols);
+            symbol = symtab_findorderedbyname(g_modlib_symtab, exportinfo.name,
+                                              g_modlib_nsymbols);
 #else
-        symbol = symtab_findbyname(g_mod_symtab,
-                                   (FAR char *)loadinfo->iobuffer,
-                                   g_mod_nsymbols);
+            symbol = symtab_findbyname(g_modlib_symtab, exportinfo.name,
+                                       g_modlib_nsymbols);
 #endif
-        if (!symbol)
+          }
+
+        /* Was the symbol found from any exporter? */
+
+        if (symbol == NULL)
           {
-            sdbg("SHN_UNDEF: Exported symbol \"%s\" not found\n", loadinfo->iobuffer);
+            serr("ERROR: SHN_UNDEF: Exported symbol \"%s\" not found\n",
+                 loadinfo->iobuffer);
             return -ENOENT;
           }
 
         /* Yes... add the exported symbol value to the ELF symbol table entry */
 
-        svdbg("SHN_ABS: name=%s %08x+%08x=%08x\n",
+        sinfo("SHN_ABS: name=%s %08x+%08x=%08x\n",
               loadinfo->iobuffer, sym->st_value, symbol->sym_value,
               sym->st_value + symbol->sym_value);
 
@@ -333,7 +431,7 @@ int mod_symvalue(FAR struct mod_loadinfo_s *loadinfo, FAR Elf32_Sym *sym)
       {
         secbase = loadinfo->shdr[sym->st_shndx].sh_addr;
 
-        svdbg("Other: %08x+%08x=%08x\n",
+        sinfo("Other: %08x+%08x=%08x\n",
               sym->st_value, secbase, sym->st_value + secbase);
 
         sym->st_value += secbase;
diff --git a/sched/module/mod_symtab.c b/libc/modlib/modlib_symtab.c
similarity index 84%
rename from sched/module/mod_symtab.c
rename to libc/modlib/modlib_symtab.c
index 0c0648f2944bce02012ca05b11949ad220dd3232..048fc249cafd9fc9fd6557dc922c445411a75050 100644
--- a/sched/module/mod_symtab.c
+++ b/libc/modlib/modlib_symtab.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * sched/module/mod_symtab.c
+ * libc/modlib/modlib_symtab.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -43,22 +43,21 @@
 
 #include 
 #include 
-
-#include "module.h"
+#include 
 
 /****************************************************************************
  * Public Data
  ****************************************************************************/
 
-FAR const struct symtab_s *g_mod_symtab;
-FAR int g_mod_nsymbols;
+FAR const struct symtab_s *g_modlib_symtab;
+FAR int g_modlib_nsymbols;
 
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: mod_getsymtab
+ * Name: modlib_getsymtab
  *
  * Description:
  *   Get the current kernel symbol table selection as an atomic operation.
@@ -72,20 +71,20 @@ FAR int g_mod_nsymbols;
  *
  ****************************************************************************/
 
-void mod_getsymtab(FAR const struct symtab_s **symtab, FAR int *nsymbols)
+void modlib_getsymtab(FAR const struct symtab_s **symtab, FAR int *nsymbols)
 {
   DEBUGASSERT(symtab != NULL && nsymbols != NULL);
 
   /* Borrow the registry lock to assure atomic access */
 
-  mod_registry_lock();
-  *symtab   = g_mod_symtab;
-  *nsymbols = g_mod_nsymbols;
-  mod_registry_lock();
+  modlib_registry_lock();
+  *symtab   = g_modlib_symtab;
+  *nsymbols = g_modlib_nsymbols;
+  modlib_registry_unlock();
 }
 
 /****************************************************************************
- * Name: mod_setsymtab
+ * Name: modlib_setsymtab
  *
  * Description:
  *   Select a new kernel symbol table selection as an atomic operation.
@@ -99,12 +98,12 @@ void mod_getsymtab(FAR const struct symtab_s **symtab, FAR int *nsymbols)
  *
  ****************************************************************************/
 
-void mod_setsymtab(FAR const struct symtab_s *symtab, int nsymbols)
+void modlib_setsymtab(FAR const struct symtab_s *symtab, int nsymbols)
 {
   /* Borrow the registry lock to assure atomic access */
 
-  mod_registry_lock();
-  g_mod_symtab   = symtab;
-  g_mod_nsymbols = nsymbols;
-  mod_registry_lock();
+  modlib_registry_lock();
+  g_modlib_symtab   = symtab;
+  g_modlib_nsymbols = nsymbols;
+  modlib_registry_unlock();
 }
diff --git a/sched/module/mod_uninit.c b/libc/modlib/modlib_uninit.c
similarity index 82%
rename from sched/module/mod_uninit.c
rename to libc/modlib/modlib_uninit.c
index dcb4bfa658cef78e37712c34c91ba2e8d3c8850d..9ea8fcb49addeb6cbd590b3ba97ed667f247376e 100644
--- a/sched/module/mod_uninit.c
+++ b/libc/modlib/modlib_uninit.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * sched/module/mod_uninit.c
+ * libc/modlib/modlib_uninit.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015. 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -45,19 +45,21 @@
 
 #include 
 #include 
+#include 
 
-#include "module.h"
+#include "libc.h"
+#include "modlib/modlib.h"
 
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: mod_uninitialize
+ * Name: modlib_uninitialize
  *
  * Description:
- *   Releases any resources committed by mod_initialize().  This essentially
- *   undoes the actions of mod_initialize.
+ *   Releases any resources committed by modlib_initialize().  This
+ *   essentially undoes the actions of modlib_initialize.
  *
  * Returned Value:
  *   0 (OK) is returned on success and a negated errno is returned on
@@ -65,11 +67,11 @@
  *
  ****************************************************************************/
 
-int mod_uninitialize(struct mod_loadinfo_s *loadinfo)
+int modlib_uninitialize(struct mod_loadinfo_s *loadinfo)
 {
   /* Free all working buffers */
 
-  mod_freebuffers(loadinfo);
+  modlib_freebuffers(loadinfo);
 
   /* Close the ELF file */
 
@@ -82,7 +84,7 @@ int mod_uninitialize(struct mod_loadinfo_s *loadinfo)
 }
 
 /****************************************************************************
- * Name: mod_freebuffers
+ * Name: modlib_freebuffers
  *
  * Description:
  *  Release all working buffers.
@@ -93,19 +95,19 @@ int mod_uninitialize(struct mod_loadinfo_s *loadinfo)
  *
  ****************************************************************************/
 
-int mod_freebuffers(struct mod_loadinfo_s *loadinfo)
+int modlib_freebuffers(struct mod_loadinfo_s *loadinfo)
 {
   /* Release all working allocations  */
 
-  if (loadinfo->shdr)
+  if (loadinfo->shdr != NULL)
     {
-      kmm_free((FAR void *)loadinfo->shdr);
+      lib_free((FAR void *)loadinfo->shdr);
       loadinfo->shdr      = NULL;
     }
 
-  if (loadinfo->iobuffer)
+  if (loadinfo->iobuffer != NULL)
     {
-      kmm_free((FAR void *)loadinfo->iobuffer);
+      lib_free((FAR void *)loadinfo->iobuffer);
       loadinfo->iobuffer  = NULL;
       loadinfo->buflen    = 0;
     }
diff --git a/sched/module/mod_unload.c b/libc/modlib/modlib_unload.c
similarity index 87%
rename from sched/module/mod_unload.c
rename to libc/modlib/modlib_unload.c
index f44e3f4da19778ca726e4b9d355d7f8fff5b65ef..8cb4f9840618c52c28aaf4331ac92ea88fcc4db9 100644
--- a/sched/module/mod_unload.c
+++ b/libc/modlib/modlib_unload.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * sched/module/mod_unload.c
+ * libc/modlib/modlib_unload.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,21 +42,22 @@
 #include 
 #include 
 
-#include 
 #include 
+#include 
 
-#include "module.h"
+#include "libc.h"
+#include "modlib/modlib.h"
 
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: mod_unload
+ * Name: modlib_unload
  *
  * Description:
  *   This function unloads the object from memory. This essentially undoes
- *   the actions of mod_load.  It is called only under certain error
+ *   the actions of modlib_load().  It is called only under certain error
  *   conditions after the module has been loaded but not yet started.
  *
  * Returned Value:
@@ -65,17 +66,17 @@
  *
  ****************************************************************************/
 
-int mod_unload(struct mod_loadinfo_s *loadinfo)
+int modlib_unload(struct mod_loadinfo_s *loadinfo)
 {
   /* Free all working buffers */
 
-  mod_freebuffers(loadinfo);
+  modlib_freebuffers(loadinfo);
 
   /* Release memory holding the relocated ELF image */
 
   if (loadinfo->textalloc != 0)
     {
-      kmm_free((FAR void *)loadinfo->textalloc);
+      lib_free((FAR void *)loadinfo->textalloc);
     }
 
   /* Clear out all indications of the allocated address environment */
diff --git a/sched/module/mod_verify.c b/libc/modlib/modlib_verify.c
similarity index 88%
rename from sched/module/mod_verify.c
rename to libc/modlib/modlib_verify.c
index a46d96f73d885d545ba50c890f0d73e587107ab6..e7b6b09cbf0bed27239b13892655c2945a974263 100644
--- a/sched/module/mod_verify.c
+++ b/libc/modlib/modlib_verify.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * sched/module/mod_verify.c
+ * libc/modlib/modlib_verify.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,10 +40,12 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 
-#include 
+#include 
+#include 
 
 /****************************************************************************
  * Private Constant Data
@@ -59,7 +61,7 @@ static const char g_modmagic[EI_MAGIC_SIZE] =
  ****************************************************************************/
 
 /****************************************************************************
- * Name: mod_verifyheader
+ * Name: modlib_verifyheader
  *
  * Description:
  *   Given the header from a possible ELF executable, verify that it
@@ -75,11 +77,11 @@ static const char g_modmagic[EI_MAGIC_SIZE] =
  *
  ****************************************************************************/
 
-int mod_verifyheader(FAR const Elf32_Ehdr *ehdr)
+int modlib_verifyheader(FAR const Elf32_Ehdr *ehdr)
 {
   if (!ehdr)
     {
-      sdbg("NULL ELF header!");
+      serr("ERROR: NULL ELF header!");
       return -ENOEXEC;
     }
 
@@ -87,7 +89,7 @@ int mod_verifyheader(FAR const Elf32_Ehdr *ehdr)
 
   if (memcmp(ehdr->e_ident, g_modmagic, EI_MAGIC_SIZE) != 0)
     {
-      svdbg("Not ELF magic {%02x, %02x, %02x, %02x}\n",
+      sinfo("Not ELF magic {%02x, %02x, %02x, %02x}\n",
             ehdr->e_ident[0], ehdr->e_ident[1], ehdr->e_ident[2], ehdr->e_ident[3]);
       return -ENOEXEC;
     }
@@ -96,7 +98,7 @@ int mod_verifyheader(FAR const Elf32_Ehdr *ehdr)
 
   if (ehdr->e_type != ET_REL)
     {
-      sdbg("Not a relocatable file: e_type=%d\n", ehdr->e_type);
+      serr("ERROR: Not a relocatable file: e_type=%d\n", ehdr->e_type);
       return -EINVAL;
     }
 
@@ -104,7 +106,7 @@ int mod_verifyheader(FAR const Elf32_Ehdr *ehdr)
 
   if (up_checkarch(ehdr))
     {
-      sdbg("Not a supported architecture\n");
+      serr("ERROR: Not a supported architecture\n");
       return -ENOEXEC;
     }
 
diff --git a/libc/net/Kconfig b/libc/net/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..2e8bacc0734b7004cee37203d380f7942bb288ca
--- /dev/null
+++ b/libc/net/Kconfig
@@ -0,0 +1,18 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+menu "Network-Related Options"
+
+config LIBC_IPv4_ADDRCONV
+	bool "IPv4 address conversions"
+	default n
+	depends on !NET_IPv4
+
+config LIBC_IPv6_ADDRCONV
+	bool "IPv6 address conversions"
+	default n
+	depends on !NET_IPv6
+
+endmenu # Network-Related Options
diff --git a/libc/net/lib_addroute.c b/libc/net/lib_addroute.c
index 33a8dd0aadfad7cfaee05ca6fd7546771dd7968e..8c7012abe8cfeecca7f25160efbebaf39c6326f1 100644
--- a/libc/net/lib_addroute.c
+++ b/libc/net/lib_addroute.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/libc/net/lib_delroute.c b/libc/net/lib_delroute.c
index 862e8ebcbf7f25efa3ca99e6dc7972b5d2eb9a90..5110659c48cba24e924d958b11bcab26aad40a73 100644
--- a/libc/net/lib_delroute.c
+++ b/libc/net/lib_delroute.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/libc/net/lib_htons.c b/libc/net/lib_htons.c
index ce33b879ea3fbff5c6f309deac7ef4d1b45f5603..d68d000b58956d50b56983ffb2d7f709d4aa496d 100644
--- a/libc/net/lib_htons.c
+++ b/libc/net/lib_htons.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/libc/net/lib_inetntoa.c b/libc/net/lib_inetntoa.c
index a25364ce2d23d7227b6a6f4c9d535659cf4a846c..7914accdc24e0397c66eaf9a44647df13ec6c16e 100644
--- a/libc/net/lib_inetntoa.c
+++ b/libc/net/lib_inetntoa.c
@@ -44,7 +44,7 @@
 #include 
 #include 
 
-#ifdef CONFIG_NET_IPv4
+#if defined(CONFIG_NET_IPv4) || defined(CONFIG_LIBC_IPv4_ADDRCONV)
 
 /****************************************************************************
  * Public Functions
@@ -78,4 +78,4 @@ FAR char *_inet_ntoa(in_addr_t in)
   return buffer;
 }
 #endif
-#endif /* CONFIG_NET_IPv4 */
+#endif /* CONFIG_NET_IPv4 || CONFIG_LIBC_IPv4_ADDRCONV */
diff --git a/libc/net/lib_inetntop.c b/libc/net/lib_inetntop.c
index 2a6037f97c421d800145fb0de27fb92e8b9950f1..196dfa62e378d06984b342711d29fa19867a1456 100644
--- a/libc/net/lib_inetntop.c
+++ b/libc/net/lib_inetntop.c
@@ -62,10 +62,10 @@
  */
 
 #ifdef CONFIG_NETDB_HOSTFILE
-#  undef  CONFIG_NET_IPv4
-#  undef  CONFIG_NET_IPv6
-#  define CONFIG_NET_IPv4 1
-#  define CONFIG_NET_IPv6 1
+#  undef  CONFIG_LIBC_IPv4_ADDRCONV
+#  undef  CONFIG_LIBC_IPv6_ADDRCONV
+#  define CONFIG_LIBC_IPv4_ADDRCONV 1
+#  define CONFIG_LIBC_IPv6_ADDRCONV 1
 #endif
 
 /****************************************************************************
@@ -97,7 +97,7 @@
  *
  ****************************************************************************/
 
-#ifdef CONFIG_NET_IPv4
+#if defined(CONFIG_NET_IPv4) || defined(CONFIG_LIBC_IPv4_ADDRCONV)
 static int inet_ipv4_ntop(FAR const void *src, FAR char *dest, socklen_t size)
 {
   FAR char *ptr;
@@ -141,7 +141,7 @@ static int inet_ipv4_ntop(FAR const void *src, FAR char *dest, socklen_t size)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_NET_IPv6
+#if defined(CONFIG_NET_IPv6) || defined(CONFIG_LIBC_IPv6_ADDRCONV)
 static int inet_ipv6_ntop(FAR const void *src, FAR char *dest, socklen_t size)
 {
   FAR const struct in6_addr *in6_addr;
@@ -265,13 +265,13 @@ FAR const char *inet_ntop(int af, FAR const void *src, FAR char *dest,
 
   switch (af)
     {
-#ifdef CONFIG_NET_IPv4
+#if defined(CONFIG_NET_IPv4) || defined(CONFIG_LIBC_IPv4_ADDRCONV)
     case AF_INET:
       ret = inet_ipv4_ntop(src, dest, size);
       break;
 #endif
 
-#ifdef CONFIG_NET_IPv6
+#if defined(CONFIG_NET_IPv6) || defined(CONFIG_LIBC_IPv6_ADDRCONV)
     case AF_INET6:
       ret = inet_ipv6_ntop(src, dest, size);
       break;
diff --git a/libc/net/lib_inetpton.c b/libc/net/lib_inetpton.c
index 8b5eb77dd1fbbec789b87fc3d0eddcb57c47f7e0..93a8804b72db427fa354a8579f9b6bd5f7f8293b 100644
--- a/libc/net/lib_inetpton.c
+++ b/libc/net/lib_inetpton.c
@@ -64,10 +64,10 @@
  */
 
 #ifdef CONFIG_NETDB_HOSTFILE
-#  undef  CONFIG_NET_IPv4
-#  undef  CONFIG_NET_IPv6
-#  define CONFIG_NET_IPv4 1
-#  define CONFIG_NET_IPv6 1
+#  undef  CONFIG_LIBC_IPv4_ADDRCONV
+#  undef  CONFIG_LIBC_IPv6_ADDRCONV
+#  define CONFIG_LIBC_IPv4_ADDRCONV 1
+#  define CONFIG_LIBC_IPv6_ADDRCONV 1
 #endif
 
 /****************************************************************************
@@ -93,7 +93,7 @@
  *
  ****************************************************************************/
 
-#ifdef CONFIG_NET_IPv4
+#if defined(CONFIG_NET_IPv4) || defined(CONFIG_LIBC_IPv4_ADDRCONV)
 static int inet_ipv4_pton(FAR const char *src, FAR void *dest)
 {
   size_t srcoffset;
@@ -203,7 +203,7 @@ static int inet_ipv4_pton(FAR const char *src, FAR void *dest)
  *
  ****************************************************************************/
 
-#ifdef CONFIG_NET_IPv6
+#if defined(CONFIG_NET_IPv6) || defined(CONFIG_LIBC_IPv6_ADDRCONV)
 static int inet_ipv6_pton(FAR const char *src, FAR void *dest)
 {
   size_t srcoffset;
@@ -393,12 +393,12 @@ int inet_pton(int af, FAR const char *src, FAR void *dest)
 
   switch (af)
     {
-#ifdef CONFIG_NET_IPv4
+#if defined(CONFIG_NET_IPv4) || defined(CONFIG_LIBC_IPv4_ADDRCONV)
     case AF_INET:
       return inet_ipv4_pton(src, dest);
 #endif
 
-#ifdef CONFIG_NET_IPv6
+#if defined(CONFIG_NET_IPv6) || defined(CONFIG_LIBC_IPv6_ADDRCONV)
     case AF_INET6:
       return inet_ipv6_pton(src, dest);
 #endif
diff --git a/libc/netdb/Kconfig b/libc/netdb/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..a841ce14b75e5c72d9a0227ded30cf78e61c8c90
--- /dev/null
+++ b/libc/netdb/Kconfig
@@ -0,0 +1,253 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+config LIBC_NETDB
+	bool
+	default n
+
+menu "NETDB Support"
+
+menuconfig NETDB_HOSTFILE
+	bool "Network host file support"
+	default n
+	depends on FS_READABLE
+	select LIBC_NETDB
+	---help---
+		Enable network host table look ups via gethostbyname() and
+		gethostbyaddr().
+
+if NETDB_HOSTFILE
+
+config NETDB_HOSTCONF_PATH
+	string "Path to host configuration file"
+	default "/etc/hosts"
+
+config NETDB_MAX_ALTNAMES
+	int "Max number of alternate host names"
+	default 4
+
+config NETDB_BUFSIZE
+	int "gethostname() buffer size"
+	default 128
+
+endif # NETDB_HOSTFILE
+
+menuconfig NETDB_DNSCLIENT
+	bool "DNS Name resolution"
+	default n
+	depends on NET && NET_UDP
+	select LIBC_NETDB
+	---help---
+		Enable support for the name resolution; Enable network host
+		resolution via gethostbyname().
+
+if NETDB_DNSCLIENT
+
+config NETDB_DNSCLIENT_ENTRIES
+	int "Number of DNS resolver entries"
+	default 0 if DEFAULT_SMALL
+	default 8 if !DEFAULT_SMALL
+	range 0 255
+	---help---
+		Number of cached DNS resolver entries.  Default: 8.  Zero disables
+		all cached name resolutions.
+
+		Disabling the DNS cache means that each access call to
+		gethostbyname() will result in a new DNS network query.  If
+		CONFIG_NETDB_DNSCLIENT_ENTRIES is non-zero, then entries will be
+		cached and if the name mapping can be found in that cache, the
+		network query can be avoid.  Of course, this is only useful if you
+		query the same name often and if the IP address of the name is
+		stable.  If the IP address can change, then cachin DNS address
+		might have undesirable side-effects (see help for
+		CONFIG_NETDB_DNSCLIENT_LIFESEC).
+
+config NETDB_DNSCLIENT_NAMESIZE
+	int "Max size of a cached hostname"
+	default 32
+	---help---
+		The size of a hostname string in the DNS resolver cache is fixed.
+		This setting provides the maximum size of a hostname.  Names longer
+		than this will be aliased!  Default: 32
+
+config NETDB_DNSCLIENT_LIFESEC
+	int "Life of a DNS cache entry (seconds)"
+	default 3600
+	---help---
+		Cached entries in the name resolution cache older than this will not
+		be used.  Default: 1 hour.  Zero means that entries will not expire.
+
+		Small values of CONFIG_NETDB_DNSCLIENT_LIFESEC may result in more
+		network DNS queries; larger values can make a host unreachable for
+		the entire duration of the timeout value.  This might happen, for
+		example, if the remote host was assigned a different IP address by
+		a DHCP server.
+
+config NETDB_DNSCLIENT_MAXRESPONSE
+	int "Max response size"
+	default 96
+	---help---
+		This setting determines the maximum size of response message that
+		can be received by the DNS resolver.  The default is 96 but may
+		need to be larger on enterprise networks (perhaps 176).
+
+
+config NETDB_RESOLVCONF
+	bool "DNS resolver file support"
+	default n
+	depends on FS_READABLE
+	---help---
+		Enable DNS server look ups in resolver file like /etc/resolv.conf.
+
+if NETDB_RESOLVCONF
+
+config NETDB_RESOLVCONF_PATH
+	string "Path to host configuration file"
+	default "/etc/resolv.conf"
+
+config NETDB_RESOLVCONF_NONSTDPORT
+	bool "Non-standard port support"
+	default n
+	---help---
+		By default, the resolv.conf file will hold only records like:
+
+			nameserver xx.xx.xx.xx
+			nameserver xxxx:::::::xxxx
+
+		The default port of 53 is always assumed.
+
+		If this option is selected, then OpenBSD style resolv.conf files
+		will be supported.  This adds logic for a bracket port notation
+		like:
+
+			nameserver [xx.xx.xx.xx]:ppppp
+			nameserver [xxxx:::::::xxxx]:ppppp
+
+endif # NETDB_RESOLVCONF
+
+choice
+	prompt "DNS server address type"
+	default NETDB_DNSSERVER_IPv4 if NET_IPv4
+	default NETDB_DNSSERVER_IPv6 if !NET_IPv4 && NET_IPv6
+	default NETDB_DNSSERVER_NOADDR if !NET_IPv4 && !NET_IPv6
+	depends on !NETDB_RESOLVCONF
+
+config NETDB_DNSSERVER_NOADDR
+	bool "No default DNS server address"
+	---help---
+		There is not default DNS nameserver address.  Application must call
+		dns_add_server() at runtime to add the DNS server address.
+
+config NETDB_DNSSERVER_IPv4
+	bool "IPv4 DNS server address"
+	depends on NET_IPv4
+	---help---
+		An IPv4 default DNS nameserver address will be provided.  Application
+		may overwrite this start default server address by calling
+		dns_add_server() at runtime.
+
+config NETDB_DNSSERVER_IPv6
+	bool "IPv6 DNS server address"
+	depends on NET_IPv6
+	---help---
+		An IPv6 default DNS nameserver address will be provided.  Application
+		may overwrite this start default server address by calling
+		dns_add_server() at runtime.
+
+endchoice # DNS server address type
+
+config NETDB_DNSSERVER_IPv4ADDR
+	hex "Target IPv4 address"
+	default 0x0a000001
+	depends on NETDB_DNSSERVER_IPv4
+	---help---
+		Default DNS server IPv4 address in host byte order.  Default value
+		10.0.0.0.1.  This may be changed via dns_add_nameserver().
+
+if NETDB_DNSSERVER_IPv6
+
+config NETDB_DNSSERVER_IPv6ADDR_1
+	hex "[0]"
+	default 0xfc00
+	range 0x0 0xffff
+	---help---
+		This is the default IP address of the DNS server.  This is a 16-bit
+		integer value in host order.  Each of the eight values forming the
+		full IPv6 address must be specified individually.  This is the first
+		of the 8-values.  The default for all eight values is fc00::1.
+
+config NETDB_DNSSERVER_IPv6ADDR_2
+	hex "[1]"
+	default 0x0000
+	range 0x0 0xffff
+	---help---
+		This is the default IP address of the DNS server.  This is a 16-bit
+		integer value in host order.  Each of the eight values forming the
+		full IPv6 address must be specified individually.  This is the second
+		of the 8-values.  The default for all eight values is fc00::1.
+
+config NETDB_DNSSERVER_IPv6ADDR_3
+	hex "[2]"
+	default 0x0000
+	range 0x0 0xffff
+	---help---
+		This is the default IP address of the DNS server.  This is a 16-bit
+		integer value in host order.  Each of the eight values forming the
+		full IPv6 address must be specified individually.  This is the third
+		of the 8-values.  The default for all eight values is fc00::1.
+
+config NETDB_DNSSERVER_IPv6ADDR_4
+	hex "[3]"
+	default 0x0000
+	range 0x0 0xffff
+	---help---
+		This is the default IP address of the DNS server.  This is a 16-bit
+		integer value in host order.  Each of the eight values forming the
+		full IPv6 address must be specified individually.  This is the fourth
+		of the 8-values.  The default for all eight values is fc00::1.
+
+config NETDB_DNSSERVER_IPv6ADDR_5
+	hex "[4]"
+	default 0x0000
+	range 0x0 0xffff
+	---help---
+		This is the default IP address of the DNS server.  This is a 16-bit
+		integer value in host order.  Each of the eight values forming the
+		full IPv6 address must be specified individually.  This is the fifth
+		of the 8-values.  The default for all eight values is fc00::1.
+
+config NETDB_DNSSERVER_IPv6ADDR_6
+	hex "[5]"
+	default 0x0000
+	range 0x0 0xffff
+	---help---
+		This is the default IP address of the DNS server.  This is a 16-bit
+		integer value in host order.  Each of the eight values forming the
+		full IPv6 address must be specified individually.  This is the sixth
+		of the 8-values.  The default for all eight values is fc00::1.
+
+config NETDB_DNSSERVER_IPv6ADDR_7
+	hex "[6]"
+	default 0x0000
+	range 0x0 0xffff
+	---help---
+		This is the default IP address of the DNS server.  This is a 16-bit
+		integer value in host order.  Each of the eight values forming the
+		full IPv6 address must be specified individually.  This is the seventh
+		of the 8-values.  The default for all eight values is fc00::1.
+
+config NETDB_DNSSERVER_IPv6ADDR_8
+	hex "[7]"
+	default 0x0001
+	range 0x0 0xffff
+	---help---
+		This is the default IP address of the DNS server.  This is a 16-bit
+		integer value in host order.  Each of the eight values forming the
+		full IPv6 address must be specified individually.  This is the last
+		of the 8-values.  The default for all eight values is fc00::1.
+
+endif # NETDB_DNSSERVER_IPv6
+endif # NETDB_DNSCLIENT
+endmenu # NETDB Support
diff --git a/libc/netdb/lib_dnsaddserver.c b/libc/netdb/lib_dnsaddserver.c
index ff2436985a886c5211d46e1ff98b0d30b3e8db45..3efbeb9ca0add813c72263b53a73cd94da4ec83d 100644
--- a/libc/netdb/lib_dnsaddserver.c
+++ b/libc/netdb/lib_dnsaddserver.c
@@ -91,7 +91,7 @@ int dns_add_nameserver(FAR const struct sockaddr *addr, socklen_t addrlen)
   if (stream == NULL)
     {
       int errcode = errno;
-      ndbg("ERROR: Failed to open %s: %d\n",
+      nerr("ERROR: Failed to open %s: %d\n",
            CONFIG_NETDB_RESOLVCONF_PATH, errcode);
       DEBUGASSERT(errcode > 0);
       return -errcode;
@@ -114,7 +114,7 @@ int dns_add_nameserver(FAR const struct sockaddr *addr, socklen_t addrlen)
           if (inet_ntop(AF_INET, &in4->sin_addr, addrstr, DNS_MAX_ADDRSTR) == NULL)
             {
               ret = -errno;
-              ndbg("ERROR: inet_ntop failed: %d\n", errcode);
+              nerr("ERROR: inet_ntop failed: %d\n", errcode);
               DEBUGASSERT(errcode < 0);
               goto errout;
             }
@@ -146,7 +146,7 @@ int dns_add_nameserver(FAR const struct sockaddr *addr, socklen_t addrlen)
           if (inet_ntop(AF_INET6, &in6->sin6_addr, addrstr, DNS_MAX_ADDRSTR) == NULL)
             {
               ret = -errno;
-              ndbg("ERROR: inet_ntop failed: %d\n", errcode);
+              nerr("ERROR: inet_ntop failed: %d\n", errcode);
               DEBUGASSERT(errcode < 0);
               goto errout;
             }
@@ -161,7 +161,7 @@ int dns_add_nameserver(FAR const struct sockaddr *addr, socklen_t addrlen)
   else
 #endif
     {
-      nvdbg("ERROR: Unsupported family: %d\n",
+      nerr("ERROR: Unsupported family: %d\n",
             g_dns_server.addr.sa_family);
       ret = -ENOSYS;
       goto errout;
@@ -193,7 +193,7 @@ int dns_add_nameserver(FAR const struct sockaddr *addr, socklen_t addrlen)
   if (status < 0)
     {
       ret = -errno;
-      ndbg("ERROR: fprintf failed: %d\n", errcode);
+      nerr("ERROR: fprintf failed: %d\n", errcode);
       DEBUGASSERT(errcode < 0);
       goto errout;
     }
@@ -242,7 +242,7 @@ int dns_add_nameserver(FAR const struct sockaddr *addr, socklen_t addrlen)
   else
 #endif
     {
-      nvdbg("ERROR: Unsupported family: %d\n", addr->sa_family);
+      nerr("ERROR: Unsupported family: %d\n", addr->sa_family);
       return -ENOSYS;
     }
 
@@ -250,7 +250,7 @@ int dns_add_nameserver(FAR const struct sockaddr *addr, socklen_t addrlen)
 
   if (addrlen < copylen)
     {
-      nvdbg("ERROR: Invalid addrlen %ld for family %d\n",
+      nerr("ERROR: Invalid addrlen %ld for family %d\n",
             (long)addrlen, addr->sa_family);
       return -EINVAL;
     }
diff --git a/libc/netdb/lib_dnsbind.c b/libc/netdb/lib_dnsbind.c
index c7eae42953ade19336821dc9426287c48b602894..3feec95912711d453bee15e57955affb869c6096 100644
--- a/libc/netdb/lib_dnsbind.c
+++ b/libc/netdb/lib_dnsbind.c
@@ -91,7 +91,7 @@ int dns_bind(void)
 
   if (!dns_initialize())
     {
-      ndbg("ERROR: DNS client has not been initialized\n");
+      nerr("ERROR: DNS client has not been initialized\n");
       return -EDESTADDRREQ;
     }
 
@@ -101,7 +101,7 @@ int dns_bind(void)
   if (sd < 0)
     {
       errcode = get_errno();
-      ndbg("ERROR: socket() failed: %d\n", errcode);
+      nerr("ERROR: socket() failed: %d\n", errcode);
       return -errcode;
     }
 
@@ -114,7 +114,7 @@ int dns_bind(void)
   if (ret < 0)
     {
       errcode = get_errno();
-      ndbg("ERROR: setsockopt() failed: %d\n", errcode);
+      nerr("ERROR: setsockopt() failed: %d\n", errcode);
       close(sd);
       return -errcode;
     }
diff --git a/libc/netdb/lib_dnscache.c b/libc/netdb/lib_dnscache.c
index 72979e4066f4a42d3b3ba603169a2dc13ee93549..5a95dc9b1b58fdda582e36daa318544a0e7683f9 100644
--- a/libc/netdb/lib_dnscache.c
+++ b/libc/netdb/lib_dnscache.c
@@ -207,7 +207,7 @@ int dns_find_answer(FAR const char *hostname, FAR struct sockaddr *addr,
 
   if (!dns_initialize())
     {
-      ndbg("ERROR: DNS failed to initialize\n");
+      nerr("ERROR: DNS failed to initialize\n");
       return -EAGAIN;
     }
 
diff --git a/libc/netdb/lib_dnsforeach.c b/libc/netdb/lib_dnsforeach.c
index 761cc441f38fbe5f8cfe1303a7a5a8d065ee7b23..cc34b1658f299c18313b374e8d8aeb61e55efc41 100644
--- a/libc/netdb/lib_dnsforeach.c
+++ b/libc/netdb/lib_dnsforeach.c
@@ -105,7 +105,7 @@ int dns_foreach_nameserver(dns_callback_t callback, FAR void *arg)
   if (stream == NULL)
     {
       int errcode = errno;
-      ndbg("ERROR: Failed to open %s: %d\n",
+      nerr("ERROR: Failed to open %s: %d\n",
         CONFIG_NETDB_RESOLVCONF_PATH, errcode);
       DEBUGASSERT(errcode > 0);
       return -errcode;
@@ -123,7 +123,7 @@ int dns_foreach_nameserver(dns_callback_t callback, FAR void *arg)
           addrstr = skip_spaces(ptr);
           if (*addrstr == '\0')
             {
-              ndbg("ERROR: Missing address in %s record\n",
+              nerr("ERROR: Missing address in %s record\n",
                    CONFIG_NETDB_RESOLVCONF_PATH);
               continue;
             }
@@ -155,7 +155,7 @@ int dns_foreach_nameserver(dns_callback_t callback, FAR void *arg)
               ptr = strchr(addrstr, ']');
               if (ptr == NULL)
                 {
-                  ndbg("ERROR: Missing right bracket after %s\n", line);
+                  nerr("ERROR: Missing right bracket after %s\n", line);
                   continue;
                 }
 
@@ -224,7 +224,7 @@ int dns_foreach_nameserver(dns_callback_t callback, FAR void *arg)
               else
 #endif
                 {
-                  ndbg("ERROR: Unrecognized address: %s\n", addrstr)
+                  nerr("ERROR: Unrecognized address: %s\n", addrstr)
                   ret = OK;
                 }
 #ifdef CONFIG_NET_IPv6
@@ -276,7 +276,7 @@ int dns_foreach_nameserver(dns_callback_t callback, FAR void *arg)
       else
 #endif
         {
-          nvdbg("ERROR: Unsupported family: %d\n",
+          nerr("ERROR: Unsupported family: %d\n",
                 g_dns_server.addr.sa_family);
           ret = -ENOSYS;
         }
diff --git a/libc/netdb/lib_dnsquery.c b/libc/netdb/lib_dnsquery.c
index c29437c7b2d7b1a5afdc076c48d83a98782b43eb..21ed201ba80fb8a0ff7d13a9be38f4b771d6133f 100644
--- a/libc/netdb/lib_dnsquery.c
+++ b/libc/netdb/lib_dnsquery.c
@@ -213,7 +213,7 @@ static int dns_send_query(int sd, FAR const char *name,
   if (ret < 0)
     {
       errcode = get_errno();
-      ndbg("ERROR: sendto failed: %d\n", errcode);
+      nerr("ERROR: sendto failed: %d\n", errcode);
       return -errcode;
     }
 
@@ -248,16 +248,16 @@ static int dns_recv_response(int sd, FAR struct sockaddr *addr,
   if (ret < 0)
     {
       errcode = get_errno();
-      ndbg("ERROR: recv failed: %d\n", errcode);
+      nerr("ERROR: recv failed: %d\n", errcode);
       return -errcode;
     }
 
   hdr = (FAR struct dns_header_s *)buffer;
 
-  nvdbg("ID %d\n", htons(hdr->id));
-  nvdbg("Query %d\n", hdr->flags1 & DNS_FLAG1_RESPONSE);
-  nvdbg("Error %d\n", hdr->flags2 & DNS_FLAG2_ERR_MASK);
-  nvdbg("Num questions %d, answers %d, authrr %d, extrarr %d\n",
+  ninfo("ID %d\n", htons(hdr->id));
+  ninfo("Query %d\n", hdr->flags1 & DNS_FLAG1_RESPONSE);
+  ninfo("Error %d\n", hdr->flags2 & DNS_FLAG2_ERR_MASK);
+  ninfo("Num questions %d, answers %d, authrr %d, extrarr %d\n",
         htons(hdr->numquestions), htons(hdr->numanswers),
         htons(hdr->numauthrr), htons(hdr->numextrarr));
 
@@ -265,7 +265,7 @@ static int dns_recv_response(int sd, FAR struct sockaddr *addr,
 
   if ((hdr->flags2 & DNS_FLAG2_ERR_MASK) != 0)
     {
-      ndbg("ERROR: DNS reported error: flags2=%02x\n", hdr->flags2);
+      nerr("ERROR: DNS reported error: flags2=%02x\n", hdr->flags2);
       return -EPROTO;
     }
 
@@ -283,16 +283,16 @@ static int dns_recv_response(int sd, FAR struct sockaddr *addr,
    * match.
    */
 
-#ifdef CONFIG_DEBUG_NET
+#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_INFO)
   {
     int d = 64;
     nameptr = dns_parse_name((uint8_t *)buffer + 12) + 4;
 
     for (; ; )
       {
-        ndbg("%02X %02X %02X %02X %02X %02X %02X %02X \n",
-             nameptr[0], nameptr[1], nameptr[2], nameptr[3],
-             nameptr[4], nameptr[5], nameptr[6], nameptr[7]);
+        ninfo("%02X %02X %02X %02X %02X %02X %02X %02X \n",
+              nameptr[0], nameptr[1], nameptr[2], nameptr[3],
+              nameptr[4], nameptr[5], nameptr[6], nameptr[7]);
 
         nameptr += 8;
         d -= 8;
@@ -317,7 +317,7 @@ static int dns_recv_response(int sd, FAR struct sockaddr *addr,
           /* Compressed name. */
 
           nameptr += 2;
-          nvdbg("Compressed answer\n");
+          ninfo("Compressed answer\n");
         }
       else
         {
@@ -328,7 +328,7 @@ static int dns_recv_response(int sd, FAR struct sockaddr *addr,
 
       ans = (FAR struct dns_answer_s *)nameptr;
 
-      nvdbg("Answer: type=%04x, class=%04x, ttl=%06x, length=%04x \n",
+      ninfo("Answer: type=%04x, class=%04x, ttl=%06x, length=%04x \n",
             htons(ans->type), htons(ans->class),
             (htons(ans->ttl[0]) << 16) | htons(ans->ttl[1]),
             htons(ans->len));
@@ -342,7 +342,7 @@ static int dns_recv_response(int sd, FAR struct sockaddr *addr,
         {
           ans->u.ipv4.s_addr = *(FAR uint32_t *)(nameptr + 10);
 
-          nvdbg("IPv4 address: %d.%d.%d.%d\n",
+          ninfo("IPv4 address: %d.%d.%d.%d\n",
                 (ans->u.ipv4.s_addr      ) & 0xff,
                 (ans->u.ipv4.s_addr >> 8 ) & 0xff,
                 (ans->u.ipv4.s_addr >> 16) & 0xff,
@@ -374,7 +374,7 @@ static int dns_recv_response(int sd, FAR struct sockaddr *addr,
         {
           memcpy(&ans->u.ipv6.s6_addr, nameptr + 10, 16);
 
-          nvdbg("IPv6 address: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+          ninfo("IPv6 address: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
                 htons(ans->u.ipv6.s6_addr[7]),  htons(ans->u.ipv6.s6_addr[6]),
                 htons(ans->u.ipv6.s6_addr[5]),  htons(ans->u.ipv6.s6_addr[4]),
                 htons(ans->u.ipv6.s6_addr[3]),  htons(ans->u.ipv6.s6_addr[2]),
@@ -450,7 +450,7 @@ static int dns_query_callback(FAR void *arg, FAR struct sockaddr *addr,
                * namserver address in resolv.conf.
                */
 
-              ndbg("ERROR: Invalid IPv4 address size: %d\n", addrlen);
+              nerr("ERROR: Invalid IPv4 address size: %d\n", addrlen);
               query->result = -EINVAL;
               return 0;
             }
@@ -466,7 +466,7 @@ static int dns_query_callback(FAR void *arg, FAR struct sockaddr *addr,
                * namserver address in resolv.conf.
                */
 
-              ndbg("ERROR: IPv4 dns_send_query failed: %d\n", ret);
+              nerr("ERROR: IPv4 dns_send_query failed: %d\n", ret);
               query->result = ret;
               return 0;
             }
@@ -492,7 +492,7 @@ static int dns_query_callback(FAR void *arg, FAR struct sockaddr *addr,
 
           /* Handle errors */
 
-          ndbg("ERROR: IPv4 dns_recv_response failed: %d\n", ret);
+          nerr("ERROR: IPv4 dns_recv_response failed: %d\n", ret);
 
           if (ret != -EADDRNOTAVAIL)
             {
@@ -531,7 +531,7 @@ static int dns_query_callback(FAR void *arg, FAR struct sockaddr *addr,
                * namserver address in resolv.conf.
                */
 
-              ndbg("ERROR: Invalid IPv6 address size: %d\n", addrlen);
+              nerr("ERROR: Invalid IPv6 address size: %d\n", addrlen);
               query->result = -EINVAL;
               return 0;
             }
@@ -547,7 +547,7 @@ static int dns_query_callback(FAR void *arg, FAR struct sockaddr *addr,
                * namserver address in resolv.conf.
                */
 
-              ndbg("ERROR: IPv6 dns_send_query failed: %d\n", ret);
+              nerr("ERROR: IPv6 dns_send_query failed: %d\n", ret);
               query->result = ret;
               return 0;
             }
@@ -573,7 +573,7 @@ static int dns_query_callback(FAR void *arg, FAR struct sockaddr *addr,
 
           /* Handle errors */
 
-          ndbg("ERROR: IPv6 dns_recv_response failed: %d\n", ret);
+          nerr("ERROR: IPv6 dns_recv_response failed: %d\n", ret);
 
           if (ret != -EADDRNOTAVAIL)
             {
diff --git a/libc/netdb/lib_gethostbyaddrr.c b/libc/netdb/lib_gethostbyaddrr.c
index 6dcb8e8ab1d22e8d4a5b3ba5bf22d705249e8f22..53e91fda34785720e3b3729c65ed2e242a1912f2 100644
--- a/libc/netdb/lib_gethostbyaddrr.c
+++ b/libc/netdb/lib_gethostbyaddrr.c
@@ -265,7 +265,7 @@ int lib_hostfile_lookup(FAR const void *addr, socklen_t len, int type,
     {
       int errcode = errno;
 
-      ndbg("ERROR:  Failed to open the hosts file %s: %d\n",
+      nerr("ERROR:  Failed to open the hosts file %s: %d\n",
            CONFIG_NETDB_HOSTCONF_PATH, errcode);
       UNUSED(errcode);
 
@@ -309,7 +309,7 @@ int lib_hostfile_lookup(FAR const void *addr, socklen_t len, int type,
           FAR char *hostaddr = host->h_addr;
           if (hostaddr != NULL)
             {
-              nvdbg("Comparing addresses...\n");
+              ninfo("Comparing addresses...\n");
               if (memcmp(addr, hostaddr, len) == 0)
                 {
                    /* We have a match */
diff --git a/libc/netdb/lib_gethostbynamer.c b/libc/netdb/lib_gethostbynamer.c
index 86d46d2054e7cda186943463da94de38f70e1e05..b655211651654d3dc4ff38f287a6bb3689dae675 100644
--- a/libc/netdb/lib_gethostbynamer.c
+++ b/libc/netdb/lib_gethostbynamer.c
@@ -583,7 +583,7 @@ static int lib_hostfile_lookup(FAR const char *name, FAR struct hostent *host,
     {
       int errcode = errno;
 
-      ndbg("ERROR:  Failed to open the hosts file %s: %d\n",
+      nerr("ERROR:  Failed to open the hosts file %s: %d\n",
            CONFIG_NETDB_HOSTCONF_PATH, errcode);
       UNUSED(errcode);
 
@@ -622,7 +622,7 @@ static int lib_hostfile_lookup(FAR const char *name, FAR struct hostent *host,
         {
           /* We successfully read the entry */
 
-          nvdbg("Comparing %s to %s\n", name, host->h_name);
+          ninfo("Comparing %s to %s\n", name, host->h_name);
 
           /* Check for a host name match */
 
diff --git a/libc/pthread/Make.defs b/libc/pthread/Make.defs
index 44a2d8b2d6342582d94ced94ebfa4a66eb198238..089845d8f7e4ccd061fb9ae72ad0ffd7d7666bcf 100644
--- a/libc/pthread/Make.defs
+++ b/libc/pthread/Make.defs
@@ -33,25 +33,27 @@
 #
 ############################################################################
 
+ifneq ($(CONFIG_DISABLE_PTHREAD),y)
+
 # Add the pthread C files to the build
 
-CSRCS += pthread_attrinit.c pthread_attrdestroy.c \
-		  pthread_attrsetschedpolicy.c pthread_attrgetschedpolicy.c \
-		  pthread_attrsetinheritsched.c pthread_attrgetinheritsched.c \
-		  pthread_attrsetstacksize.c pthread_attrgetstacksize.c \
-		  pthread_attrsetschedparam.c pthread_attrgetschedparam.c \
-		  pthread_barrierattrinit.c pthread_barrierattrdestroy.c \
-		  pthread_barrierattrgetpshared.c pthread_barrierattrsetpshared.c \
-		  pthread_condattrinit.c pthread_condattrdestroy.c \
-		  pthread_mutexattrinit.c pthread_mutexattrdestroy.c \
-		  pthread_mutexattrgetpshared.c pthread_mutexattrsetpshared.c
+CSRCS += pthread_attr_init.c pthread_attr_destroy.c
+CSRCS += pthread_attr_setschedpolicy.c pthread_attr_getschedpolicy.c
+CSRCS += pthread_attr_setinheritsched.c pthread_attr_getinheritsched.c
+CSRCS += pthread_attr_setstacksize.c pthread_attr_getstacksize.c
+CSRCS += pthread_attr_setschedparam.c pthread_attr_getschedparam.c
+CSRCS += pthread_barrierattr_init.c pthread_barrierattr_destroy.c
+CSRCS += pthread_barrierattr_getpshared.c pthread_barrierattr_setpshared.c
+CSRCS += pthread_condattr_init.c pthread_condattr_destroy.c
+CSRCS += pthread_mutexattr_init.c pthread_mutexattr_destroy.c
+CSRCS += pthread_mutexattr_getpshared.c pthread_mutexattr_setpshared.c
+CSRCS += pthread_mutexattr_setprotocol.c pthread_mutexattr_getprotocol.c
+CSRCS += pthread_mutexattr_settype.c pthread_mutexattr_gettype.c
+CSRCS += pthread_setcancelstate.c pthread_setcanceltype.c
+CSRCS += pthread_testcancel.c
 
 ifeq ($(CONFIG_SMP),y)
-CSRCS += pthread_attrgetaffinity.c pthread_attrsetaffinity.c
-endif
-
-ifeq ($(CONFIG_MUTEX_TYPES),y)
-CSRCS += pthread_mutexattrsettype.c pthread_mutexattrgettype.c
+CSRCS += pthread_attr_getaffinity.c pthread_attr_setaffinity.c
 endif
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
@@ -62,3 +64,5 @@ endif
 
 DEPPATH += --dep-path pthread
 VPATH += :pthread
+
+endif # CONFIG_DISABLE_PTHREAD
diff --git a/libc/pthread/pthread_attrdestroy.c b/libc/pthread/pthread_attr_destroy.c
similarity index 94%
rename from libc/pthread/pthread_attrdestroy.c
rename to libc/pthread/pthread_attr_destroy.c
index 04223f0e047d93b5b3b20f5bb15545519326e8f3..7d39a192788a1a5cd7884df9c5674dfb747cf2cd 100644
--- a/libc/pthread/pthread_attrdestroy.c
+++ b/libc/pthread/pthread_attr_destroy.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/pthread/pthread_attrdestroy.c
+ * libc/pthread/pthread_attr_destroy.c
  *
  *   Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -52,8 +52,7 @@
  * Function:  pthread_attr_destroy
  *
  * Description:
- *    An attributes object can be deleted when it is no longer
- *     needed.
+ *    An attributes object can be deleted when it is no longer needed.
  *
  * Parameters:
  *   attr
@@ -69,7 +68,7 @@ int pthread_attr_destroy(FAR pthread_attr_t *attr)
 {
   int ret;
 
-  sdbg("attr=0x%p\n", attr);
+  linfo("attr=0x%p\n", attr);
 
   if (!attr)
     {
@@ -81,7 +80,7 @@ int pthread_attr_destroy(FAR pthread_attr_t *attr)
       ret = OK;
     }
 
-  sdbg("Returning %d\n", ret);
+  linfo("Returning %d\n", ret);
   return ret;
 }
 
diff --git a/libc/pthread/pthread_attrgetaffinity.c b/libc/pthread/pthread_attr_getaffinity.c
similarity index 95%
rename from libc/pthread/pthread_attrgetaffinity.c
rename to libc/pthread/pthread_attr_getaffinity.c
index c13ee71d0b5d7bee64bcdfd38c5a64864a413afc..706f059ec53052f4d26870f113bce713808a896b 100644
--- a/libc/pthread/pthread_attrgetaffinity.c
+++ b/libc/pthread/pthread_attr_getaffinity.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/pthread/pthread_attrgetaffinity.c
+ * libc/pthread/pthread_attr_getaffinity.c
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -66,7 +66,7 @@
 int pthread_attr_getaffinity_np(FAR const pthread_attr_t *attr,
                                 size_t cpusetsize, cpu_set_t *cpuset)
 {
-  sdbg("attr=0x%p cpusetsize=%d cpuset=0x%p\n", attr, (int)cpusetsize, cpuset);
+  linfo("attr=0x%p cpusetsize=%d cpuset=0x%p\n", attr, (int)cpusetsize, cpuset);
 
   DEBUGASSERT(attr != NULL && cpusetsize == sizeof(cpu_set_t) && cpuset != NULL);
 
diff --git a/libc/pthread/pthread_attrgetinheritsched.c b/libc/pthread/pthread_attr_getinheritsched.c
similarity index 95%
rename from libc/pthread/pthread_attrgetinheritsched.c
rename to libc/pthread/pthread_attr_getinheritsched.c
index c4c2838dae495544c3a2de062b8947167241e999..0760c5e265961df7d4c922736449eeb7bb23ef1b 100644
--- a/libc/pthread/pthread_attrgetinheritsched.c
+++ b/libc/pthread/pthread_attr_getinheritsched.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/pthread/pthread_attrgetinheritsched.c
+ * libc/pthread/pthread_attr_getinheritsched.c
  *
  *   Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -72,7 +72,7 @@ int pthread_attr_getinheritsched(FAR const pthread_attr_t *attr,
 {
   int ret;
 
-  sdbg("attr=0x%p inheritsched=0x%p\n", attr, inheritsched);
+  linfo("attr=0x%p inheritsched=0x%p\n", attr, inheritsched);
 
   if (!attr || !inheritsched)
     {
@@ -84,8 +84,6 @@ int pthread_attr_getinheritsched(FAR const pthread_attr_t *attr,
       ret = OK;
     }
 
-  sdbg("Returning %d\n", ret);
+  linfo("Returning %d\n", ret);
   return ret;
 }
-
-
diff --git a/libc/pthread/pthread_attrgetschedparam.c b/libc/pthread/pthread_attr_getschedparam.c
similarity index 96%
rename from libc/pthread/pthread_attrgetschedparam.c
rename to libc/pthread/pthread_attr_getschedparam.c
index ddf67a1d661444445936dc4c28de46e0a7e15e93..d3280ffde3ed9b8a1ae70efa5136b692d72d8927 100644
--- a/libc/pthread/pthread_attrgetschedparam.c
+++ b/libc/pthread/pthread_attr_getschedparam.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/pthread/pthread_attrgetschedparam.c
+ * libc/pthread/pthread_attr_getschedparam.c
  *
  *   Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -70,7 +70,7 @@ int pthread_attr_getschedparam(FAR const pthread_attr_t *attr,
 {
   int ret;
 
-  sdbg("attr=0x%p param=0x%p\n", attr, param);
+  linfo("attr=0x%p param=0x%p\n", attr, param);
 
   if (!attr || !param)
     {
@@ -90,6 +90,6 @@ int pthread_attr_getschedparam(FAR const pthread_attr_t *attr,
       ret = OK;
     }
 
-  sdbg("Returning %d\n", ret);
+  linfo("Returning %d\n", ret);
   return ret;
 }
diff --git a/libc/pthread/pthread_attrgetschedpolicy.c b/libc/pthread/pthread_attr_getschedpolicy.c
similarity index 95%
rename from libc/pthread/pthread_attrgetschedpolicy.c
rename to libc/pthread/pthread_attr_getschedpolicy.c
index 52a48a9504aadd34532f0c9cb8f3ce9dc13ca315..f4f624f4f0bbf5f3d0534d44b27d1dcf9e64b4af 100644
--- a/libc/pthread/pthread_attrgetschedpolicy.c
+++ b/libc/pthread/pthread_attr_getschedpolicy.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/pthread/pthread_attrgetschedpolicy.c
+ * libc/pthread/pthread_attr_getschedpolicy.c
  *
  *   Copyright (C) 2007, 2008, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -68,7 +68,7 @@ int pthread_attr_getschedpolicy(FAR const pthread_attr_t *attr, int *policy)
 {
   int ret;
 
-  sdbg("attr=0x%p policy=0x%p\n", attr, policy);
+  linfo("attr=0x%p policy=0x%p\n", attr, policy);
 
   if (!attr || !policy)
     {
@@ -80,6 +80,6 @@ int pthread_attr_getschedpolicy(FAR const pthread_attr_t *attr, int *policy)
       ret = OK;
     }
 
-  sdbg("Returning %d\n", ret);
+  linfo("Returning %d\n", ret);
   return ret;
 }
diff --git a/libc/pthread/pthread_attrgetstacksize.c b/libc/pthread/pthread_attr_getstacksize.c
similarity index 95%
rename from libc/pthread/pthread_attrgetstacksize.c
rename to libc/pthread/pthread_attr_getstacksize.c
index ea95ec7328ab30e4b26560019a39120a4f99ce85..15de1b38f9edf3f72cd0fb243a36b575a406a8fc 100644
--- a/libc/pthread/pthread_attrgetstacksize.c
+++ b/libc/pthread/pthread_attr_getstacksize.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/pthread/pthread_attrgetstacksize.c
+ * libc/pthread/pthread_attr_getstacksize.c
  *
  *   Copyright (C) 2007, 2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -67,7 +67,7 @@ int pthread_attr_getstacksize(FAR const pthread_attr_t *attr, FAR long *stacksiz
 {
   int ret;
 
-  sdbg("attr=0x%p stacksize=0x%p\n", attr, stacksize);
+  linfo("attr=0x%p stacksize=0x%p\n", attr, stacksize);
 
   if (!stacksize)
     {
@@ -79,7 +79,7 @@ int pthread_attr_getstacksize(FAR const pthread_attr_t *attr, FAR long *stacksiz
       ret = OK;
     }
 
-  sdbg("Returning %d\n", ret);
+  linfo("Returning %d\n", ret);
   return ret;
 }
 
diff --git a/libc/pthread/pthread_attrinit.c b/libc/pthread/pthread_attr_init.c
similarity index 97%
rename from libc/pthread/pthread_attrinit.c
rename to libc/pthread/pthread_attr_init.c
index e073fcd89fb925511b6cfba33f098109b49a456d..b6c7c39ed605b47760a214346ec4c0b672aab931 100644
--- a/libc/pthread/pthread_attrinit.c
+++ b/libc/pthread/pthread_attr_init.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/pthread/pthread_attrinit.c
+ * libc/pthread/pthread_attr_init.c
  *
  *   Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -87,7 +87,7 @@ int pthread_attr_init(FAR pthread_attr_t *attr)
 {
   int ret = OK;
 
-  sdbg("attr=0x%p\n", attr);
+  linfo("attr=0x%p\n", attr);
   if (!attr)
     {
       ret = ENOMEM;
@@ -102,7 +102,7 @@ int pthread_attr_init(FAR pthread_attr_t *attr)
       memcpy(attr, &g_default_pthread_attr, sizeof(pthread_attr_t));
     }
 
-  sdbg("Returning %d\n", ret);
+  linfo("Returning %d\n", ret);
   return ret;
 }
 
diff --git a/libc/pthread/pthread_attrsetaffinity.c b/libc/pthread/pthread_attr_setaffinity.c
similarity index 95%
rename from libc/pthread/pthread_attrsetaffinity.c
rename to libc/pthread/pthread_attr_setaffinity.c
index 0222dfdd7db0d538091773621ff26d61d13c56a1..6705e87aa0fd76f76cea6fd1adc521717c480034 100644
--- a/libc/pthread/pthread_attrsetaffinity.c
+++ b/libc/pthread/pthread_attr_setaffinity.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/pthread/pthread_attrsetaffinity.c
+ * libc/pthread/pthread_attr_setaffinity.c
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -68,7 +68,7 @@ int pthread_attr_setaffinity_np(FAR pthread_attr_t *attr,
                                 size_t cpusetsize,
                                 FAR const cpu_set_t *cpuset)
 {
-  sdbg("attr=0x%p cpusetsize=%d cpuset=0x%p\n", attr, (int)cpusetsize, cpuset);
+  linfo("attr=0x%p cpusetsize=%d cpuset=0x%p\n", attr, (int)cpusetsize, cpuset);
 
   DEBUGASSERT(attr != NULL && cpusetsize == sizeof(cpu_set_t) &&
               cpuset != NULL && *cpuset != 0);
diff --git a/libc/pthread/pthread_attrsetinheritsched.c b/libc/pthread/pthread_attr_setinheritsched.c
similarity index 96%
rename from libc/pthread/pthread_attrsetinheritsched.c
rename to libc/pthread/pthread_attr_setinheritsched.c
index 07506773ad02e6005172ea64a67f4204df54a897..c61be6f4f629bc421fecdfaea75ec3017f7a5879 100644
--- a/libc/pthread/pthread_attrsetinheritsched.c
+++ b/libc/pthread/pthread_attr_setinheritsched.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/pthread/pthread_attrsetinheritsched.c
+ * libc/pthread/pthread_attr_setinheritsched.c
  *
  *   Copyright (C) 2007, 2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -73,7 +73,7 @@ int pthread_attr_setinheritsched(FAR pthread_attr_t *attr,
 {
   int ret;
 
-  sdbg("inheritsched=%d\n", inheritsched);
+  linfo("inheritsched=%d\n", inheritsched);
 
   if (!attr ||
       (inheritsched != PTHREAD_INHERIT_SCHED &&
@@ -87,7 +87,7 @@ int pthread_attr_setinheritsched(FAR pthread_attr_t *attr,
       ret = OK;
     }
 
-  sdbg("Returning %d\n", ret);
+  linfo("Returning %d\n", ret);
   return ret;
 }
 
diff --git a/libc/pthread/pthread_attrsetschedparam.c b/libc/pthread/pthread_attr_setschedparam.c
similarity index 96%
rename from libc/pthread/pthread_attrsetschedparam.c
rename to libc/pthread/pthread_attr_setschedparam.c
index 70fcd11272b116afbc356e91b48bbe71a356aade..b37d3aad27758c47ac6f630262dd9aead0589f61 100644
--- a/libc/pthread/pthread_attrsetschedparam.c
+++ b/libc/pthread/pthread_attr_setschedparam.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/pthread/pthread_attrsetschedparam.c
+ * libc/pthread/pthread_attr_setschedparam.c
  *
  *   Copyright (C) 2007-2009, 2011, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -70,7 +70,7 @@ int pthread_attr_setschedparam(FAR pthread_attr_t *attr,
 {
   int ret;
 
-  sdbg("attr=0x%p param=0x%p\n", attr, param);
+  linfo("attr=0x%p param=0x%p\n", attr, param);
 
   if (!attr || !param)
     {
@@ -90,6 +90,6 @@ int pthread_attr_setschedparam(FAR pthread_attr_t *attr,
       ret = OK;
     }
 
-  sdbg("Returning %d\n", ret);
+  linfo("Returning %d\n", ret);
   return ret;
 }
diff --git a/libc/pthread/pthread_attrsetschedpolicy.c b/libc/pthread/pthread_attr_setschedpolicy.c
similarity index 96%
rename from libc/pthread/pthread_attrsetschedpolicy.c
rename to libc/pthread/pthread_attr_setschedpolicy.c
index 76e774e2506575ad38507a7bcb23104c5c7f5ead..75a58e105b9ff5df8c9151427f0f2cec4d671d90 100644
--- a/libc/pthread/pthread_attrsetschedpolicy.c
+++ b/libc/pthread/pthread_attr_setschedpolicy.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/pthread/pthread_attrsetschedpolicy.c
+ * libc/pthread/pthread_attr_setschedpolicy.c
  *
  *   Copyright (C) 2007-2009, 2011, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -70,7 +70,7 @@ int pthread_attr_setschedpolicy(FAR pthread_attr_t *attr, int policy)
 {
   int ret;
 
-  sdbg("attr=0x%p policy=%d\n", attr, policy);
+  linfo("attr=0x%p policy=%d\n", attr, policy);
 
   if (!attr ||
       (policy != SCHED_FIFO
@@ -90,6 +90,6 @@ int pthread_attr_setschedpolicy(FAR pthread_attr_t *attr, int policy)
       ret = OK;
     }
 
-  sdbg("Returning %d\n", ret);
+  linfo("Returning %d\n", ret);
   return ret;
 }
diff --git a/libc/pthread/pthread_attrsetstacksize.c b/libc/pthread/pthread_attr_setstacksize.c
similarity index 95%
rename from libc/pthread/pthread_attrsetstacksize.c
rename to libc/pthread/pthread_attr_setstacksize.c
index 97769acd259bbc8d2fcecd6d24cbf94e002bb369..0501f76aa6257e22c6da3e967064afa1be61f6a2 100644
--- a/libc/pthread/pthread_attrsetstacksize.c
+++ b/libc/pthread/pthread_attr_setstacksize.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/pthread/pthread_attrsetstacksize.c
+ * libc/pthread/pthread_attr_setstacksize.c
  *
  *   Copyright (C) 2007, 2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -68,7 +68,7 @@ int pthread_attr_setstacksize(FAR pthread_attr_t *attr, long stacksize)
 {
   int ret;
 
-  sdbg("attr=0x%p stacksize=%ld\n", attr, stacksize);
+  linfo("attr=0x%p stacksize=%ld\n", attr, stacksize);
 
   if (!attr || stacksize < PTHREAD_STACK_MIN)
     {
@@ -80,7 +80,7 @@ int pthread_attr_setstacksize(FAR pthread_attr_t *attr, long stacksize)
       ret = OK;
     }
 
-  sdbg("Returning %d\n", ret);
+  linfo("Returning %d\n", ret);
   return ret;
 }
 
diff --git a/libc/pthread/pthread_barrierattrdestroy.c b/libc/pthread/pthread_barrierattr_destroy.c
similarity index 98%
rename from libc/pthread/pthread_barrierattrdestroy.c
rename to libc/pthread/pthread_barrierattr_destroy.c
index 98342e28c151fc7c25622752dd7e28e37c97e085..7ab23b7b84eaf5c0cf7b36962d1b2e2b8bbd5fb0 100644
--- a/libc/pthread/pthread_barrierattrdestroy.c
+++ b/libc/pthread/pthread_barrierattr_destroy.c
@@ -1,5 +1,5 @@
 /********************************************************************************
- * libc/pthread/pthread_barrierattrdestroy.c
+ * libc/pthread/pthread_barrierattr_destroy.c
  *
  *   Copyright (C) 2007, 2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/libc/pthread/pthread_barrierattrgetpshared.c b/libc/pthread/pthread_barrierattr_getpshared.c
similarity index 98%
rename from libc/pthread/pthread_barrierattrgetpshared.c
rename to libc/pthread/pthread_barrierattr_getpshared.c
index ce186f230ab403a86e99feb2513cfb1d154a5dee..d74d54dcbf3ef65113a480131fc6671e19475133 100644
--- a/libc/pthread/pthread_barrierattrgetpshared.c
+++ b/libc/pthread/pthread_barrierattr_getpshared.c
@@ -1,5 +1,5 @@
 /********************************************************************************
- * libc/pthread/pthread_barrierattrgetpshared.c
+ * libc/pthread/pthread_barrierattr_getpshared.c
  *
  *   Copyright (C) 2007, 2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/libc/pthread/pthread_barrierattrinit.c b/libc/pthread/pthread_barrierattr_init.c
similarity index 98%
rename from libc/pthread/pthread_barrierattrinit.c
rename to libc/pthread/pthread_barrierattr_init.c
index 16c31922d79c61f3095c2db325cb528d6594feb8..9b3f57755233d964f0d277711e0c8a7370805dd3 100644
--- a/libc/pthread/pthread_barrierattrinit.c
+++ b/libc/pthread/pthread_barrierattr_init.c
@@ -1,5 +1,5 @@
 /********************************************************************************
- * libc/pthread/pthread_barrierattrinit.c
+ * libc/pthread/pthread_barrierattr_init.c
  *
  *   Copyright (C) 2007, 2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/libc/pthread/pthread_barrierattrsetpshared.c b/libc/pthread/pthread_barrierattr_setpshared.c
similarity index 98%
rename from libc/pthread/pthread_barrierattrsetpshared.c
rename to libc/pthread/pthread_barrierattr_setpshared.c
index 6839511df56d4a7461593565c127038b44104170..1736a4e4309175f92511309c061e218e2e8dd427 100644
--- a/libc/pthread/pthread_barrierattrsetpshared.c
+++ b/libc/pthread/pthread_barrierattr_setpshared.c
@@ -1,5 +1,5 @@
 /********************************************************************************
- * libc/pthread/pthread_barrierattrsetpshared.c
+ * libc/pthread/pthread_barrierattr_setpshared.c
  *
  *   Copyright (C) 2007, 2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/libc/pthread/pthread_condattrdestroy.c b/libc/pthread/pthread_condattr_destroy.c
similarity index 96%
rename from libc/pthread/pthread_condattrdestroy.c
rename to libc/pthread/pthread_condattr_destroy.c
index 5e25a7d421f79bbfabd5fb20a48bbc646d249cea..5833de44cf35554dd6d5c75c091969f7413c3940 100644
--- a/libc/pthread/pthread_condattrdestroy.c
+++ b/libc/pthread/pthread_condattr_destroy.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/pthread/pthread_condattrdestroy.c
+ * libc/pthread/pthread_condattr_destroy.c
  *
  *   Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -67,14 +67,14 @@ int pthread_condattr_destroy(FAR pthread_condattr_t *attr)
 {
   int ret = OK;
 
-  sdbg("attr=0x%p\n", attr);
+  linfo("attr=0x%p\n", attr);
 
   if (!attr)
     {
       ret = EINVAL;
     }
 
-  sdbg("Returning %d\n", ret);
+  linfo("Returning %d\n", ret);
   return ret;
 }
 
diff --git a/libc/pthread/pthread_condattrinit.c b/libc/pthread/pthread_condattr_init.c
similarity index 96%
rename from libc/pthread/pthread_condattrinit.c
rename to libc/pthread/pthread_condattr_init.c
index 220d972e1001c26fb48fb157236555f69ea21614..7f5602ce761cd351c87e99b4293756400643e661 100644
--- a/libc/pthread/pthread_condattrinit.c
+++ b/libc/pthread/pthread_condattr_init.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/pthread/pthread_condattrinit.c
+ * libc/pthread/pthread_condattr_init.c
  *
  *   Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -67,7 +67,7 @@ int pthread_condattr_init(FAR pthread_condattr_t *attr)
 {
   int ret = OK;
 
-  sdbg("attr=0x%p\n", attr);
+  linfo("attr=0x%p\n", attr);
 
   if (!attr)
     {
@@ -78,7 +78,7 @@ int pthread_condattr_init(FAR pthread_condattr_t *attr)
       *attr = 0;
     }
 
-  sdbg("Returning %d\n", ret);
+  linfo("Returning %d\n", ret);
   return ret;
 }
 
diff --git a/libc/pthread/pthread_mutexattrdestroy.c b/libc/pthread/pthread_mutexattr_destroy.c
similarity index 95%
rename from libc/pthread/pthread_mutexattrdestroy.c
rename to libc/pthread/pthread_mutexattr_destroy.c
index 60b50718c1538f000d882113fbfaf4505bd203fd..62d5de4a9222ff108fe2ed2becabc14b3534afbc 100644
--- a/libc/pthread/pthread_mutexattrdestroy.c
+++ b/libc/pthread/pthread_mutexattr_destroy.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/pthread/pthread_mutexattrdestroy.c
+ * libc/pthread/pthread_mutexattr_destroy.c
  *
  *   Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -55,7 +55,6 @@
  *
  * Parameters:
  *    attr
- *    pshared
  *
  * Return Value:
  *   0 if successful.  Otherwise, an error code.
@@ -68,7 +67,7 @@ int pthread_mutexattr_destroy(FAR pthread_mutexattr_t *attr)
 {
   int ret = OK;
 
-  sdbg("attr=0x%p\n", attr);
+  linfo("attr=0x%p\n", attr);
 
   if (!attr)
     {
@@ -79,6 +78,6 @@ int pthread_mutexattr_destroy(FAR pthread_mutexattr_t *attr)
       attr->pshared = 0;
     }
 
-  sdbg("Returning %d\n", ret);
+  linfo("Returning %d\n", ret);
   return ret;
 }
diff --git a/libc/pthread/pthread_mutexattr_getprotocol.c b/libc/pthread/pthread_mutexattr_getprotocol.c
new file mode 100644
index 0000000000000000000000000000000000000000..f803006bb26d097cf88501bf998def82bdb827ab
--- /dev/null
+++ b/libc/pthread/pthread_mutexattr_getprotocol.c
@@ -0,0 +1,78 @@
+/****************************************************************************
+ * libc/pthread/pthread_mutexattr_getprotocol.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function: pthread_mutexattr_getprotocol
+ *
+ * Description:
+ *    Return the value of the mutex protocol attribute.
+ *
+ * Parameters:
+ *    attr     - A pointer to the mutex attributes to be queried.
+ *    protocol - The user provided location in which to store the protocol
+ *               value.
+ *
+ * Return Value:
+ *   0 if successful.  Otherwise, an error code.
+ *
+ ****************************************************************************/
+
+int pthread_mutexattr_getprotocol(FAR const pthread_mutexattr_t *attr,
+                                  FAR int *protocol)
+{
+  DEBUGASSERT(attr != NULL && protocol != NULL);
+
+#ifdef CONFIG_PRIORITY_INHERITANCE
+  linfo("Returning %d\n", attr->proto);
+  return attr->proto;
+#else
+  linfo("Returning %d\n", PTHREAD_PRIO_NONE);
+  return PTHREAD_PRIO_NONE;
+#endif
+}
diff --git a/libc/pthread/pthread_mutexattrgetpshared.c b/libc/pthread/pthread_mutexattr_getpshared.c
similarity index 95%
rename from libc/pthread/pthread_mutexattrgetpshared.c
rename to libc/pthread/pthread_mutexattr_getpshared.c
index 586a1b203ea121d6abef703a14fba15afc3e90bb..51e515cbbb667fd2d796a28dd5f3c4509402a005 100644
--- a/libc/pthread/pthread_mutexattrgetpshared.c
+++ b/libc/pthread/pthread_mutexattr_getpshared.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/pthread/pthread_mutexattrgetpshared.c
+ * libc/pthread/pthread_mutexattr_getpshared.c
  *
  *   Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -68,7 +68,7 @@ int pthread_mutexattr_getpshared(FAR const pthread_mutexattr_t *attr, FAR int *p
 {
   int ret = OK;
 
-  sdbg("attr=0x%p pshared=0x%p\n", attr, pshared);
+  linfo("attr=0x%p pshared=0x%p\n", attr, pshared);
 
   if (!attr || !pshared)
     {
@@ -79,6 +79,6 @@ int pthread_mutexattr_getpshared(FAR const pthread_mutexattr_t *attr, FAR int *p
       *pshared = attr->pshared;
     }
 
-  sdbg("Returning %d\n", ret);
+  linfo("Returning %d\n", ret);
   return ret;
 }
diff --git a/libc/pthread/pthread_mutexattrgettype.c b/libc/pthread/pthread_mutexattr_gettype.c
similarity index 95%
rename from libc/pthread/pthread_mutexattrgettype.c
rename to libc/pthread/pthread_mutexattr_gettype.c
index cc553c83509d10a90bf4c939a10af98f5867ddad..9f057ae11d0d226964841a747bebadf220300e3b 100644
--- a/libc/pthread/pthread_mutexattrgettype.c
+++ b/libc/pthread/pthread_mutexattr_gettype.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/pthread/pthread_mutexattrgettype.c
+ * libc/pthread/pthread_mutexattr_gettype.c
  *
  *   Copyright (C) 2008, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -41,8 +41,6 @@
 #include 
 #include 
 
-#ifdef CONFIG_MUTEX_TYPES
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -67,12 +65,15 @@
 
 int pthread_mutexattr_gettype(const pthread_mutexattr_t *attr, int *type)
 {
-  if (attr && type)
+  if (attr != NULL && type != NULL)
     {
+#ifdef CONFIG_MUTEX_TYPES
       *type = attr->type;
+#else
+      *type = PTHREAD_MUTEX_NORMAL;
+#endif
       return 0;
     }
+
   return EINVAL;
 }
-
-#endif /* CONFIG_MUTEX_TYPES */
diff --git a/libc/pthread/pthread_mutexattrinit.c b/libc/pthread/pthread_mutexattr_init.c
similarity index 96%
rename from libc/pthread/pthread_mutexattrinit.c
rename to libc/pthread/pthread_mutexattr_init.c
index b12b8a29940515c8c49ba48f3cc452f036326caa..01c3bb867d19080db86df806122eb907498194a8 100644
--- a/libc/pthread/pthread_mutexattrinit.c
+++ b/libc/pthread/pthread_mutexattr_init.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/pthread/pthread_mutexattrinit.c
+ * libc/pthread/pthread_mutexattr_init.c
  *
  *   Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -67,7 +67,7 @@ int pthread_mutexattr_init(FAR pthread_mutexattr_t *attr)
 {
   int ret = OK;
 
-  sdbg("attr=0x%p\n", attr);
+  linfo("attr=0x%p\n", attr);
 
   if (!attr)
     {
@@ -81,6 +81,6 @@ int pthread_mutexattr_init(FAR pthread_mutexattr_t *attr)
 #endif
     }
 
-  sdbg("Returning %d\n", ret);
+  linfo("Returning %d\n", ret);
   return ret;
 }
diff --git a/libc/pthread/pthread_mutexattr_setprotocol.c b/libc/pthread/pthread_mutexattr_setprotocol.c
new file mode 100644
index 0000000000000000000000000000000000000000..44d8be78494d47b992c40cdcbda4270e3268ff52
--- /dev/null
+++ b/libc/pthread/pthread_mutexattr_setprotocol.c
@@ -0,0 +1,89 @@
+/****************************************************************************
+ * libc/pthread/pthread_mutexattr_setprotocol.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function: pthread_mutexattr_setprotocol
+ *
+ * Description:
+ *    Set mutex protocol attribute.
+ *
+ * Parameters:
+ *    attr     - A pointer to the mutex attributes to be modified
+ *    protocol - The new protocol to use
+ *
+ * Return Value:
+ *   0 if successful.  Otherwise, an error code.
+ *
+ ****************************************************************************/
+
+int pthread_mutexattr_setprotocol(FAR pthread_mutexattr_t *attr,
+                                  int protocol)
+{
+  linfo("attr=0x%p protocol=%d\n", attr, protocol);
+  DEBUGASSERT(attr != NULL);
+
+#ifdef CONFIG_PRIORITY_INHERITANCE
+  if (protocol >= PTHREAD_PRIO_NONE && protocol <= PTHREAD_PRIO_PROTECT)
+    {
+      attr->proto = protocol;
+      return OK;
+    }
+
+  return EINVAL;
+
+#else
+  if (protocol == PTHREAD_PRIO_NONE)
+    {
+      return OK;
+    }
+
+  return ENOSYS;
+#endif
+}
diff --git a/libc/pthread/pthread_mutexattrsetpshared.c b/libc/pthread/pthread_mutexattr_setpshared.c
similarity index 95%
rename from libc/pthread/pthread_mutexattrsetpshared.c
rename to libc/pthread/pthread_mutexattr_setpshared.c
index 82f20092bd34251f561045c1e8624203ef75ff9b..22b915c4f0eab153271f19fb5ccba3d4ea4a18d2 100644
--- a/libc/pthread/pthread_mutexattrsetpshared.c
+++ b/libc/pthread/pthread_mutexattr_setpshared.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/pthread/pthread_mutexattrsetpshared.c
+ * libc/pthread/pthread_mutexattr_setpshared.c
  *
  *   Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -68,7 +68,7 @@ int pthread_mutexattr_setpshared(FAR pthread_mutexattr_t *attr, int pshared)
 {
   int ret = OK;
 
-  sdbg("attr=0x%p pshared=%d\n", attr, pshared);
+  linfo("attr=0x%p pshared=%d\n", attr, pshared);
 
   if (!attr || (pshared != 0 && pshared != 1))
     {
@@ -79,6 +79,6 @@ int pthread_mutexattr_setpshared(FAR pthread_mutexattr_t *attr, int pshared)
       attr->pshared = pshared;
     }
 
-  sdbg("Returning %d\n", ret);
+  linfo("Returning %d\n", ret);
   return ret;
 }
diff --git a/libc/pthread/pthread_mutexattrsettype.c b/libc/pthread/pthread_mutexattr_settype.c
similarity index 95%
rename from libc/pthread/pthread_mutexattrsettype.c
rename to libc/pthread/pthread_mutexattr_settype.c
index ef8b2636865300c2db2a173d7b2972a243391911..b43e86fc124cf6686cce3535a8f3ab173044becd 100644
--- a/libc/pthread/pthread_mutexattrsettype.c
+++ b/libc/pthread/pthread_mutexattr_settype.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/pthread/pthread_mutexattrsettype.c
+ * libc/pthread/pthread_mutexattr_settype.c
  *
  *   Copyright (C) 2008, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -41,8 +41,6 @@
 #include 
 #include 
 
-#ifdef CONFIG_MUTEX_TYPES
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -69,10 +67,17 @@ int pthread_mutexattr_settype(pthread_mutexattr_t *attr, int type)
 {
   if (attr && type >= PTHREAD_MUTEX_NORMAL && type <= PTHREAD_MUTEX_RECURSIVE)
     {
+#ifdef CONFIG_MUTEX_TYPES
       attr->type = type;
+#else
+      if (type != PTHREAD_MUTEX_NORMAL)
+        {
+          return ENOSYS;
+        }
+#endif
+
       return OK;
     }
+
   return EINVAL;
 }
-
-#endif /* CONFIG_MUTEX_TYPES */
diff --git a/libc/pthread/pthread_setcancelstate.c b/libc/pthread/pthread_setcancelstate.c
new file mode 100644
index 0000000000000000000000000000000000000000..e81a4440f7a46536c0a29bbff42648e0d9e38bed
--- /dev/null
+++ b/libc/pthread/pthread_setcancelstate.c
@@ -0,0 +1,92 @@
+/****************************************************************************
+ * libc/pthread/pthread_setcancelstate.c
+ *
+ *   Copyright (C) 2007, 2008, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+/* These are defined in different header files but must have the same values. */
+
+#if PTHREAD_CANCEL_ENABLE != TASK_CANCEL_ENABLE
+#  error We must have  PTHREAD_CANCEL_ENABLE == TASK_CANCEL_ENABLE
+#endif
+
+#if PTHREAD_CANCEL_DISABLE != TASK_CANCEL_DISABLE
+#  error We must have  PTHREAD_CANCEL_DISABLE == TASK_CANCEL_DISABLE
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: pthread_setcancelstate
+ *
+ * Description:
+ *   The pthread_setcancelstate() function atomically both sets the calling
+ *   thread's cancelability state to the indicated state and returns the
+ *   previous cancelability state at the location referenced by oldstate.
+ *   Legal values for state are PTHREAD_CANCEL_ENABLE and
+ *   PTHREAD_CANCEL_DISABLE.
+ *
+ *   The cancelability state and type of any newly created threads,
+ *   including the thread in which main() was first invoked, are
+ *   PTHREAD_CANCEL_ENABLE and PTHREAD_CANCEL_DEFERRED respectively.
+ *
+ ****************************************************************************/
+
+int pthread_setcancelstate(int state, FAR int *oldstate)
+{
+  int ret;
+
+  /* task_setcancelstate() can do this */
+
+  ret = task_setcancelstate(state, oldstate);
+  if (ret < 0)
+    {
+      ret = errno;
+    }
+
+  return ret;
+}
diff --git a/libc/pthread/pthread_setcanceltype.c b/libc/pthread/pthread_setcanceltype.c
new file mode 100644
index 0000000000000000000000000000000000000000..583376dfcc53e3401ab5ebd4290fc4c68c6f1610
--- /dev/null
+++ b/libc/pthread/pthread_setcanceltype.c
@@ -0,0 +1,92 @@
+/****************************************************************************
+ * libc/pthread/pthread_setcanceltype.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* The following are defined in different header files but must have the
+ * same values.
+ */
+
+#if PTHREAD_CANCEL_DEFERRED != TASK_CANCEL_DEFERRED
+#  error We must have  PTHREAD_CANCEL_DEFERRED == TASK_CANCEL_DEFERRED
+#endif
+
+#if PTHREAD_CANCEL_ASYNCHRONOUS != TASK_CANCEL_ASYNCHRONOUS
+#  error We must have  PTHREAD_CANCEL_ASYNCHRONOUS == TASK_CANCEL_ASYNCHRONOUS
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: pthread_setcancelstate
+ *
+ * Description:
+ *   The pthread_setcanceltype() function atomically both sets the calling
+ *   thread's cancelability type to the indicated type and returns the
+ *   previous cancelability type at the location referenced by oldtype
+ *   Legal values for type are PTHREAD_CANCEL_DEFERRED and
+ *   PTHREAD_CANCEL_ASYNCHRONOUS.
+ *
+ *   The cancelability state and type of any newly created threads,
+ *   including the thread in which main() was first invoked, are
+ *   PTHREAD_CANCEL_ENABLE and PTHREAD_CANCEL_DEFERRED respectively.
+ *
+ ****************************************************************************/
+
+int pthread_setcanceltype(int type, FAR int *oldtype)
+{
+  int ret;
+
+  /* task_setcanceltype() can do this */
+
+  ret = task_setcanceltype(type, oldtype);
+  if (ret < 0)
+    {
+      ret = errno;
+    }
+
+  return ret;
+}
diff --git a/libc/pthread/pthread_testcancel.c b/libc/pthread/pthread_testcancel.c
new file mode 100644
index 0000000000000000000000000000000000000000..c5bf14aec426f63810bd48d83c462a029b54f634
--- /dev/null
+++ b/libc/pthread/pthread_testcancel.c
@@ -0,0 +1,62 @@
+/****************************************************************************
+ * libc/pthread/pthread_testcancel.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: pthread_testcancel
+ *
+ * Description:
+ *   The pthread_testcancel() function creates a cancellation point in the
+ *   calling thread. The pthread_testcancel() function has no effect if
+ *   cancelability is disabled
+ *
+ ****************************************************************************/
+
+void pthread_testcancel(void)
+{
+  /* task_testcancel() does the real work */
+
+  task_testcancel();
+}
diff --git a/libc/queue/dq_addafter.c b/libc/queue/dq_addafter.c
index e4965c802c14af633b104ca9c2cb1ba3339b40da..85d76edeb6e452062ba548ca97ac5c2bbe590854 100644
--- a/libc/queue/dq_addafter.c
+++ b/libc/queue/dq_addafter.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/libc/queue/sq_addfirst.c b/libc/queue/sq_addfirst.c
index a00841cfaad5429c55ee52c744f3436b6ae9db08..bbc9f26a9c19baedfb6f36ac927f09ff34f648b6 100644
--- a/libc/queue/sq_addfirst.c
+++ b/libc/queue/sq_addfirst.c
@@ -58,5 +58,6 @@ void sq_addfirst(FAR sq_entry_t *node, sq_queue_t *queue)
     {
       queue->tail = node;
     }
+
   queue->head = node;
 }
diff --git a/libc/queue/sq_remafter.c b/libc/queue/sq_remafter.c
index a3527b7908aa1967ca7b90b1533f08e3ccc68524..34685ae96159936b7f4793378a1c05f9829c866d 100644
--- a/libc/queue/sq_remafter.c
+++ b/libc/queue/sq_remafter.c
@@ -44,10 +44,10 @@
  ****************************************************************************/
 
 /****************************************************************************
- * Name:
+ * Name: sq_remafter
  *
  * Description:
- *   sq_remafter removes the entry following 'node; from the'queue'  Returns
+ *   sq_remafter removes the entry following 'node' from the'queue'  Returns
  *   a reference to the removed entry.
  *
  ****************************************************************************/
@@ -55,6 +55,7 @@
 FAR sq_entry_t *sq_remafter(FAR sq_entry_t *node, sq_queue_t *queue)
 {
   FAR sq_entry_t *ret = node->flink;
+
   if (queue->head && ret)
     {
       if (queue->tail == ret)
diff --git a/libc/sched/Make.defs b/libc/sched/Make.defs
index eeb4be1c1bb834acea697f32782d02546cf2644b..5d875d3eac69ae7996150994dce4080c0d8cdf87 100644
--- a/libc/sched/Make.defs
+++ b/libc/sched/Make.defs
@@ -37,6 +37,10 @@
 
 CSRCS += sched_getprioritymax.c sched_getprioritymin.c
 
+ifneq ($(CONFIG_CANCELLATION_POINTS),y)
+CSRCS += task_setcanceltype.c task_testcancel.c
+endif
+
 ifeq ($(CONFIG_SMP),y)
 CSRCS += sched_cpucount.c
 endif
diff --git a/libc/sched/task_setcanceltype.c b/libc/sched/task_setcanceltype.c
new file mode 100644
index 0000000000000000000000000000000000000000..d43f5d9d30c83d930f439c577de6bf629f69b7ad
--- /dev/null
+++ b/libc/sched/task_setcanceltype.c
@@ -0,0 +1,74 @@
+/****************************************************************************
+ * libc/sched/task_setcanceltype.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: task_setcancelstate
+ *
+ * Description:
+ *   The task_setcanceltype() function atomically both sets the calling
+ *   task's cancelability type to the indicated type and returns the
+ *   previous cancelability type at the location referenced by oldtype
+ *   Legal values for type are TASK_CANCEL_DEFERRED and
+ *   TASK_CANCEL_ASYNCHRONOUS.
+ *
+ *   The cancelability state and type of any newly created tasks are
+ *   TASK_CANCEL_ENABLE and TASK_CANCEL_DEFERRED respectively.
+ *
+ ****************************************************************************/
+
+int task_setcanceltype(int type, FAR int *oldtype)
+{
+  /* Return the current type if so requrested */
+
+  if (oldtype != NULL)
+    {
+      *oldtype = TASK_CANCEL_ASYNCHRONOUS;
+    }
+
+  /* Check the requested cancellation type */
+
+  return (type == TASK_CANCEL_ASYNCHRONOUS) ? OK : ENOSYS;
+}
diff --git a/libc/sched/task_startup.c b/libc/sched/task_startup.c
index 6012e626750cd57c178262814213caed58220e50..c0895a16b81d49fca62089c7cfd33d30b498139d 100644
--- a/libc/sched/task_startup.c
+++ b/libc/sched/task_startup.c
@@ -46,30 +46,6 @@
 
 #if defined(CONFIG_BUILD_PROTECTED) && !defined(__KERNEL__)
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libc/sched/task_testcancel.c b/libc/sched/task_testcancel.c
new file mode 100644
index 0000000000000000000000000000000000000000..0d99dbebbc2f3b1cc26ca238aa5278c123f7302c
--- /dev/null
+++ b/libc/sched/task_testcancel.c
@@ -0,0 +1,58 @@
+/****************************************************************************
+ * libc/sched/task_testcancel.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: task_testcancel
+ *
+ * Description:
+ *   The task_testcancel() function creates a cancellation point in the
+ *   calling thread. The task_testcancel() function has no effect if
+ *   cancelability is disabled
+ *
+ ****************************************************************************/
+
+void task_testcancel(void)
+{
+}
diff --git a/libc/semaphore/Make.defs b/libc/semaphore/Make.defs
index b6551ff96a02781ec71dc17a28050195998310e2..6c91f068cd41ea1a3b29274019929f9ad1073700 100644
--- a/libc/semaphore/Make.defs
+++ b/libc/semaphore/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # libc/semaphore/Make.defs
 #
-#   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -35,7 +35,11 @@
 
 # Add the semaphore C files to the build
 
-CSRCS += sem_init.c sem_getvalue.c
+CSRCS += sem_init.c sem_getprotocol.c sem_getvalue.c
+
+ifneq ($(CONFIG_PRIORITY_INHERITANCE),y)
+CSRCS += sem_setprotocol.c
+endif
 
 # Add the semaphore directory to the build
 
diff --git a/libc/semaphore/sem_getprotocol.c b/libc/semaphore/sem_getprotocol.c
new file mode 100644
index 0000000000000000000000000000000000000000..614d5da72a88b0124a6992746644b26023f110cc
--- /dev/null
+++ b/libc/semaphore/sem_getprotocol.c
@@ -0,0 +1,87 @@
+/****************************************************************************
+ * libc/semaphore/sem_getprotocol.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function: sem_getprotocol
+ *
+ * Description:
+ *    Return the value of the semaphore protocol attribute.
+ *
+ * Parameters:
+ *    sem      - A pointer to the semaphore whose attributes are to be
+ *               queried.
+ *    protocol - The user provided location in which to store the protocol
+ *               value.
+ *
+ * Return Value:
+ *   0 if successful.  Otherwise, -1 is returned and the errno value is set
+ *   appropriately.
+ *
+ ****************************************************************************/
+
+int sem_getprotocol(FAR sem_t *sem, FAR int *protocol)
+{
+  DEBUGASSERT(sem != NULL && protocol != NULL);
+
+#ifdef CONFIG_PRIORITY_INHERITANCE
+  if ((sem->flags & PRIOINHERIT_FLAGS_DISABLE) != 0)
+    {
+      *protocol = SEM_PRIO_NONE;
+    }
+  else
+    {
+      *protocol = SEM_PRIO_INHERIT;
+    }
+
+#else
+  *protocol = SEM_PRIO_NONE;
+#endif
+
+  return OK;
+}
diff --git a/libc/semaphore/sem_init.c b/libc/semaphore/sem_init.c
index 861acb6cde5ba153d8eeba99bfb1903b65611ebb..f4037d342cec7ed8ca8657c5d9ea67678f381a7e 100644
--- a/libc/semaphore/sem_init.c
+++ b/libc/semaphore/sem_init.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/sem/sem_init.c
  *
- *   Copyright (C) 2007-2009, 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011-2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -44,26 +44,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -108,6 +88,7 @@ int sem_init(FAR sem_t *sem, int pshared, unsigned int value)
       /* Initialize to support priority inheritance */
 
 #ifdef CONFIG_PRIORITY_INHERITANCE
+      sem->flags         = 0;
 #  if CONFIG_SEM_PREALLOCHOLDERS > 0
       sem->hhead         = NULL;
 #  else
diff --git a/libc/semaphore/sem_setprotocol.c b/libc/semaphore/sem_setprotocol.c
new file mode 100644
index 0000000000000000000000000000000000000000..38336a31a03ca1e288cd5775e37386bd381bbf68
--- /dev/null
+++ b/libc/semaphore/sem_setprotocol.c
@@ -0,0 +1,114 @@
+/****************************************************************************
+ * libc/semaphore/sem_setprotocol.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+
+#ifndef CONFIG_PRIORITY_INHERITANCE
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function: sem_setprotocol
+ *
+ * Description:
+ *    Set semaphore protocol attribute.
+ *
+ *    One particularly important use of this furnction is when a semaphore
+ *    is used for inter-task communication like:
+ *
+ *      TASK A                 TASK B
+ *      sem_init(sem, 0, 0);
+ *      sem_wait(sem);
+ *                             sem_post(sem);
+ *      Awakens as holder
+ *
+ *    In this case priority inheritance can interfere with the operation of
+ *    the semaphore.  The problem is that when TASK A is restarted it is a
+ *    holder of the semaphore.  However, it never calls sem_post(sem) so it
+ *    becomes *permanently* a holder of the semaphore and may have its
+ *    priority boosted when any other task tries to acquire the semaphore.
+ *
+ *    The fix is to call sem_setprotocol(SEM_PRIO_NONE) immediately after
+ *    the sem_init() call so that there will be no priority inheritance
+ *    operations on this semaphore.
+ *
+ * Parameters:
+ *    sem      - A pointer to the semaphore whose attributes are to be
+ *               modified
+ *    protocol - The new protocol to use
+ *
+ * Return Value:
+ *   0 if successful.  Otherwise, -1 is returned and the errno value is set
+ *   appropriately.
+ *
+ ****************************************************************************/
+
+int sem_setprotocol(FAR sem_t *sem, int protocol)
+{
+  int errcode;
+
+  DEBUGASSERT(sem != NULL);
+
+  switch (protocol)
+    {
+      case SEM_PRIO_NONE:
+        return OK;
+
+      case SEM_PRIO_INHERIT:
+      case SEM_PRIO_PROTECT:
+        errcode = ENOSYS;
+        break;
+
+      default:
+        errcode = EINVAL;
+        break;
+    }
+
+  set_errno(errcode);
+  return ERROR;
+}
+
+#endif /* !CONFIG_PRIORITY_INHERITANCE */
diff --git a/libc/signal/Make.defs b/libc/signal/Make.defs
index 0c642ff8c75458fa6343fddef8f62d8770e56ef3..bedee1895e8be3d5701a87c1452cbb3fcdd30781 100644
--- a/libc/signal/Make.defs
+++ b/libc/signal/Make.defs
@@ -37,9 +37,9 @@ ifneq ($(CONFIG_DISABLE_SIGNALS),y)
 
 # Add the signal C files to the build
 
-CSRCS += sig_emptyset.c sig_fillset.c sig_addset.c sig_delset.c
-CSRCS += sig_ismember.c sig_hold.c sig_relse.c sig_ignore.c sig_pause.c
-CSRCS += sig_set.c signal.c
+CSRCS += sig_addset.c sig_delset.c sig_emptyset.c sig_fillset.c
+CSRCS += sig_hold.c sig_ignore.c sig_ismember.c sig_pause.c sig_raise.c
+CSRCS += sig_relse.c sig_set.c signal.c
 
 # Add the signal directory to the build
 
diff --git a/libc/signal/sig_raise.c b/libc/signal/sig_raise.c
new file mode 100644
index 0000000000000000000000000000000000000000..e2e1b326541ab67ec9e8e2842bf9be021996c91c
--- /dev/null
+++ b/libc/signal/sig_raise.c
@@ -0,0 +1,88 @@
+/****************************************************************************
+ * libc/signal/sig_raise.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sig_raise
+ *
+ * Description:
+ *   The raise() function sends the signal signo to the executing thread or
+ *   process. If a signal handler is called, the raise() function does not
+ *   return until after the signal handler does.
+ *
+ *   If the implementation supports the Threads option, the effect of the
+ *   raise() function is equivalent to calling:
+ *
+ *     pthread_kill(pthread_self(), signo);
+ *
+ *   except that on failures, -1 (ERROR) is returned and the errno() variable
+ *   is set accordingly.  Otherwise, the effect of the raise() function is
+ *   equivalent to calling:
+ *
+ *     kill(getpid(), signo)
+ *
+ ****************************************************************************/
+
+int raise(int signo)
+{
+#ifndef CONFIG_DISABLE_PTHREAD
+  int errcode = pthread_kill(pthread_self(), signo);
+  if (errcode != OK)
+    {
+      DEBUGASSERT(errcode > 0);
+      set_errno(errcode);
+      return ERROR;
+    }
+
+  return OK;
+
+#else
+  return kill(getpid(), signo);
+#endif
+}
diff --git a/libc/spawn/Make.defs b/libc/spawn/Make.defs
index 7b4fdba4ce6c1febcc63bdffe2a3002890ed4246..3581193f6773535de0ae7c6ea634efc77f6f5b68 100644
--- a/libc/spawn/Make.defs
+++ b/libc/spawn/Make.defs
@@ -38,7 +38,7 @@
 CSRCS += lib_psfa_addaction.c lib_psfa_addclose.c lib_psfa_adddup2.c
 CSRCS += lib_psfa_addopen.c lib_psfa_destroy.c lib_psfa_init.c
 
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
 CSRCS += lib_psfa_dump.c
 endif
 
@@ -54,7 +54,7 @@ ifneq ($(CONFIG_BUILD_KERNEL),y)
 CSRCS += lib_psa_getstacksize.c lib_psa_setstacksize.c
 endif
 
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
 CSRCS += lib_psa_dump.c
 endif
 
diff --git a/libc/spawn/lib_psa_dump.c b/libc/spawn/lib_psa_dump.c
index 935de174ed2c06691c8daad7cc9de40da9bccff3..9a66501556f94f538848c703599fbf3b14e2f007 100644
--- a/libc/spawn/lib_psa_dump.c
+++ b/libc/spawn/lib_psa_dump.c
@@ -39,10 +39,19 @@
 
 #include 
 
+/* Output debug info even if debug output is not selected. */
+
+#undef  CONFIG_DEBUG_ERROR
+#undef  CONFIG_DEBUG_WARN
+#undef  CONFIG_DEBUG_INFO
+#define CONFIG_DEBUG_ERROR 1
+#define CONFIG_DEBUG_WARN 1
+#define CONFIG_DEBUG_INFO 1
+
 #include 
 #include 
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 
 /****************************************************************************
  * Public Functions
@@ -64,64 +73,66 @@
 
 void posix_spawnattr_dump(posix_spawnattr_t *attr)
 {
-  dbg("attr[%p]:\n", attr);
-  dbg("  flags:    %04x\n", attr->flags);
+#ifdef CONFIG_DEBUG_ERROR
+  _err("attr[%p]:\n", attr);
+  _err("  flags:    %04x\n", attr->flags);
   if (attr->flags == 0)
     {
-      dbg("            None\n");
+      _err("            None\n");
     }
   else
     {
       if ((attr->flags & POSIX_SPAWN_RESETIDS) != 0)
         {
-          dbg("            POSIX_SPAWN_RESETIDS\n");
+          _err("            POSIX_SPAWN_RESETIDS\n");
         }
 
       if ((attr->flags & POSIX_SPAWN_SETPGROUP) != 0)
         {
-          dbg("            POSIX_SPAWN_SETPGROUP\n");
+          _err("            POSIX_SPAWN_SETPGROUP\n");
         }
 
       if ((attr->flags & POSIX_SPAWN_SETSCHEDPARAM) != 0)
         {
-          dbg("            POSIX_SPAWN_SETSCHEDPARAM\n");
+          _err("            POSIX_SPAWN_SETSCHEDPARAM\n");
         }
 
       if ((attr->flags & POSIX_SPAWN_SETSCHEDULER) != 0)
         {
-          dbg("            POSIX_SPAWN_SETSCHEDULER\n");
+          _err("            POSIX_SPAWN_SETSCHEDULER\n");
         }
 
       if ((attr->flags & POSIX_SPAWN_SETSIGDEF) != 0)
         {
-          dbg("            POSIX_SPAWN_SETSIGDEF\n");
+          _err("            POSIX_SPAWN_SETSIGDEF\n");
         }
 
       if ((attr->flags & POSIX_SPAWN_SETSIGMASK) != 0)
         {
-          dbg("            POSIX_SPAWN_SETSIGMASK\n");
+          _err("            POSIX_SPAWN_SETSIGMASK\n");
         }
     }
 
-  dbg("  priority: %d\n", attr->priority);
+  _err("  priority: %d\n", attr->priority);
 
-  dbg("  policy:   %d\n", attr->policy);
+  _err("  policy:   %d\n", attr->policy);
   if (attr->policy == SCHED_FIFO)
     {
-      dbg("            SCHED_FIFO\n");
+      _err("            SCHED_FIFO\n");
     }
   else if (attr->policy == SCHED_RR)
     {
-      dbg("            SCHED_RR\n");
+      _err("            SCHED_RR\n");
     }
   else
     {
-      dbg("            Unrecognized\n");
+      _err("            Unrecognized\n");
     }
 
 #ifndef CONFIG_DISABLE_SIGNALS
-  dbg("  sigmask:  %08x\n", attr->sigmask);
+  _err("  sigmask:  %08x\n", attr->sigmask);
 #endif
+#endif /* CONFIG_DEBUG_ERROR */
 }
 
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_FEATURES */
diff --git a/libc/spawn/lib_psfa_dump.c b/libc/spawn/lib_psfa_dump.c
index 45ca67107a03867c807d68d7fe7dafb20b951084..e9371fec31969a7c200a4411b8ffc7f732634fdc 100644
--- a/libc/spawn/lib_psfa_dump.c
+++ b/libc/spawn/lib_psfa_dump.c
@@ -39,17 +39,22 @@
 
 #include 
 
+/* Output debug info even if debug output is not selected. */
+
+#undef  CONFIG_DEBUG_ERROR
+#undef  CONFIG_DEBUG_WARN
+#undef  CONFIG_DEBUG_INFO
+#define CONFIG_DEBUG_ERROR 1
+#define CONFIG_DEBUG_WARN 1
+#define CONFIG_DEBUG_INFO 1
+
 #include 
 #include 
 #include 
 
 #include 
 
-#ifdef CONFIG_DEBUG
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
+#ifdef CONFIG_DEBUG_FEATURES
 
 /****************************************************************************
  * Public Functions
@@ -75,10 +80,10 @@ void posix_spawn_file_actions_dump(FAR posix_spawn_file_actions_t *file_actions)
 
   DEBUGASSERT(file_actions);
 
-  dbg("File Actions[%p->%p]:\n", file_actions, *file_actions);
+  _err("File Actions[%p->%p]:\n", file_actions, *file_actions);
   if (!*file_actions)
     {
-      dbg("  NONE\n");
+      _err("  NONE\n");
       return;
     }
 
@@ -95,7 +100,7 @@ void posix_spawn_file_actions_dump(FAR posix_spawn_file_actions_t *file_actions)
             FAR struct spawn_close_file_action_s *action =
               (FAR struct spawn_close_file_action_s *)entry;
 
-            dbg("  CLOSE: fd=%d\n", action->fd);
+            _err("  CLOSE: fd=%d\n", action->fd);
           }
           break;
 
@@ -104,7 +109,7 @@ void posix_spawn_file_actions_dump(FAR posix_spawn_file_actions_t *file_actions)
             FAR struct spawn_dup2_file_action_s *action =
               (FAR struct spawn_dup2_file_action_s *)entry;
 
-            dbg("  DUP2: %d->%d\n", action->fd1, action->fd2);
+            _err("  DUP2: %d->%d\n", action->fd1, action->fd2);
           }
           break;
 
@@ -113,18 +118,18 @@ void posix_spawn_file_actions_dump(FAR posix_spawn_file_actions_t *file_actions)
             FAR struct spawn_open_file_action_s *action =
               (FAR struct spawn_open_file_action_s *)entry;
 
-            dbg("  OPEN: path=%s oflags=%04x mode=%04x fd=%d\n",
+            _err("  OPEN: path=%s oflags=%04x mode=%04x fd=%d\n",
                 action->path, action->oflags, action->mode, action->fd);
           }
           break;
 
         case SPAWN_FILE_ACTION_NONE:
         default:
-          dbg("  ERROR: Unknown action: %d\n", entry->action);
+          _err("  ERROR: Unknown action: %d\n", entry->action);
           break;
         }
     }
 }
 
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_FEATURES */
 
diff --git a/libc/stdio/Kconfig b/libc/stdio/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..93303c680d3f8fb9f1aff615d5f5bdb8bf8471aa
--- /dev/null
+++ b/libc/stdio/Kconfig
@@ -0,0 +1,118 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+menu "Standard C I/O"
+
+config STDIO_DISABLE_BUFFERING
+	bool "Disable STDIO Buffering"
+	default n
+	---help---
+		Tiny systems may need to disable all support for I/O buffering in
+		order to minimize the memory footprint.
+
+		NOTE that even if STDIO buffering is enabled, you can still disable
+		buffering by setting CONFIG_STDIO_BUFFER_SIZE=0 or dynamically
+		through the setvbuf() interface.  In this case, however,  memory
+		used for buffering will be eliminated, of course, but there will be
+		no reduction in static code size.  Only setting
+		CONFIG_STDIO_DISABLE_BUFFERING will reduce static code size.
+
+		The setvbuf() interface is not available if
+		CONFIG_STDIO_DISABLE_BUFFERING is selected.
+
+if !STDIO_DISABLE_BUFFERING
+
+config STDIO_BUFFER_SIZE
+	int "STDIO buffer size"
+	default 64
+	---help---
+		Size of buffers using within the C buffered I/O interfaces (printf,
+		putchar, fwrite, etc.).  This function sets the initial I/O buffer
+		size.  Zero disables I/O buffering initially.  Any buffer size may
+		be subsequently modified using setvbuf().
+
+config STDIO_LINEBUFFER
+	bool "STDIO line buffering"
+	default y
+	---help---
+		Sets the default behavior to flush buffered I/O whenever a newline
+		character is found in the output data stream.  This setting just
+		sets the initial default behavior of all streams.  The behavior of
+		an individual stream can be changed via setvbuf().
+
+endif # !STDIO_DISABLE_BUFFERING
+
+config NUNGET_CHARS
+	int "Number unget() characters"
+	default 2
+	---help---
+		Number of characters that can be buffered by ungetc() (Only if NFILE_STREAMS > 0)
+
+config NOPRINTF_FIELDWIDTH
+	bool "Disable sprintf support fieldwidth"
+	default n
+	---help---
+		sprintf-related logic is a little smaller if we do not support field
+		widths.
+
+config LIBC_FLOATINGPOINT
+	bool "Enable floating point in printf"
+	default n
+	---help---
+		By default, floating point
+		support in printf, sscanf, etc. is disabled.
+
+config LIBC_LONG_LONG
+	bool "Enable long long support in printf"
+	default y if !DEFAULT_SMALL
+	default n if DEFAULT_SMALL
+	---help---
+		Enables support for long long formats in printf, sscanf, etc. is
+		enabled.  This is enabled by default but if you are trying to
+		reduce the FLASH footprint, then disabling this feature is one
+		option.  The FLASH saves comes not from disabling the long long
+		formats, but rather from omitting the large long long arithmetic
+		libraries that will be drawn into the build if long long support
+		is enabled.
+
+config LIBC_SCANSET
+	bool "Scanset support"
+	default n
+	---help---
+		Add scanset support to sscanf().
+
+choice
+	prompt "Newline Options"
+	default EOL_IS_EITHER_CRLF
+	---help---
+		This selection determines the line terminating character that is used.
+		Some environments may return CR as end-of-line, others LF, and others
+		both.  If not specified, the default is either CR or LF (but not both)
+		as the line terminating charactor.
+
+config EOL_IS_CR
+	bool "EOL is CR"
+
+config EOL_IS_LF
+	bool "EOL is LF"
+
+config EOL_IS_BOTH_CRLF
+	bool "EOL is CR and LF"
+
+config EOL_IS_EITHER_CRLF
+	bool "EOL is CR or LF"
+
+endchoice
+
+config MEMCPY_VIK
+	bool "Vik memcpy()"
+	default n
+	depends on !LIBC_ARCH_MEMCPY
+	---help---
+		Select this option to use the optimized memcpy() function by Daniel Vik.
+		Select this option for improved performance at the expense of increased
+		size. See licensing information in the top-level COPYING file.
+
+endmenu #Standard C I/O
diff --git a/libc/stdio/Make.defs b/libc/stdio/Make.defs
index 595a222b27741886f0b24b0cfb90ca183877235e..38a62d69c10233489fabacf632c2c948da7e7d8e 100644
--- a/libc/stdio/Make.defs
+++ b/libc/stdio/Make.defs
@@ -41,7 +41,7 @@ CSRCS += lib_fileno.c lib_printf.c lib_sprintf.c lib_asprintf.c
 CSRCS += lib_snprintf.c lib_libsprintf.c lib_vsprintf.c lib_vasprintf.c
 CSRCS += lib_vsnprintf.c lib_libvsprintf.c lib_dprintf.c lib_vdprintf.c
 CSRCS += lib_meminstream.c lib_memoutstream.c lib_memsistream.c
-CSRCS += lib_memsostream.c lib_lowinstream.c lib_lowoutstream.c
+CSRCS += lib_memsostream.c lib_lowoutstream.c
 CSRCS += lib_zeroinstream.c lib_nullinstream.c lib_nulloutstream.c
 CSRCS += lib_sscanf.c
 
@@ -50,7 +50,8 @@ CSRCS += lib_sscanf.c
 ifneq ($(CONFIG_NFILE_DESCRIPTORS),0)
 
 CSRCS += lib_rawinstream.c lib_rawoutstream.c lib_rawsistream.c
-CSRCS += lib_rawsostream.c
+CSRCS += lib_rawsostream.c lib_libnoflush.c lib_libsnoflush.c
+CSRCS += lib_remove.c
 
 # And these depend upon both file descriptors and C streams
 
@@ -71,6 +72,10 @@ endif
 ifeq ($(CONFIG_FS_WRITABLE),y)
 CSRCS += lib_tempnam.c lib_tmpnam.c
 endif
+
+ifneq ($(CONFIG_STDIO_DISABLE_BUFFERING),y)
+CSRCS += lib_setbuf.c lib_setvbuf.c
+endif
 endif
 
 # Other support that depends on specific, configured features.
@@ -79,10 +84,6 @@ ifeq ($(CONFIG_LIBC_FLOATINGPOINT),y)
 CSRCS += lib_dtoa.c
 endif
 
-ifeq ($(CONFIG_STDIO_LINEBUFFER),y)
-CSRCS += lib_libnoflush.c lib_libsnoflush.c
-endif
-
 # Add the stdio directory to the build
 
 DEPPATH += --dep-path stdio
diff --git a/libc/stdio/lib_asprintf.c b/libc/stdio/lib_asprintf.c
index b10a779dce420c452985148d2d5bde8581ec2064..80507761b88ee9e7285c137d779add1a09dbbe15 100644
--- a/libc/stdio/lib_asprintf.c
+++ b/libc/stdio/lib_asprintf.c
@@ -42,34 +42,6 @@
 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libc/stdio/lib_dtoa.c b/libc/stdio/lib_dtoa.c
index e3452126d86db3cf7f06613c6fcf9e29b7db2d4c..ab03d9b4a4a5ba1128850214401a930e8802efe4 100644
--- a/libc/stdio/lib_dtoa.c
+++ b/libc/stdio/lib_dtoa.c
@@ -556,15 +556,16 @@ static int cmp(Bigint * a, Bigint * b)
 
   i = a->wds;
   j = b->wds;
+
 #ifdef CONFIG_DEBUG_LIB
   if (i > 1 && !a->x[i - 1])
    {
-    ldbg("cmp called with a->x[a->wds-1] == 0\n");
+    lerr("ERROR: cmp called with a->x[a->wds-1] == 0\n");
    }
 
   if (j > 1 && !b->x[j - 1])
    {
-    ldbg("cmp called with b->x[b->wds-1] == 0\n");
+    lerr("ERROR: cmp called with b->x[b->wds-1] == 0\n");
    }
 #endif
 
@@ -590,6 +591,7 @@ static int cmp(Bigint * a, Bigint * b)
           break;
         }
     }
+
   return 0;
 }
 
@@ -722,7 +724,7 @@ static Bigint *d2b(double d, int *e, int *bits)
 #ifdef CONFIG_DEBUG_LIB
       if (!z)
         {
-          ldbg("Zero passed to d2b\n");
+          lerr("ERROR: Zero passed to d2b\n");
         }
 #endif
       k = lo0bits(&z);
@@ -763,7 +765,7 @@ static Bigint *d2b(double d, int *e, int *bits)
 #ifdef CONFIG_DEBUG_LIB
       if (!z)
         {
-          ldbg("Zero passed to d2b\n");
+          lerr("ERROR: Zero passed to d2b\n");
         }
 #endif
       k = lo0bits(&z);
@@ -783,6 +785,7 @@ static Bigint *d2b(double d, int *e, int *bits)
     }
   while (!x[i])
     --i;
+
   b->wds = i + 1;
 #endif
   if (de)
@@ -816,11 +819,6 @@ static const double bigtens[] =
   1e16, 1e32, 1e64, 1e128, 1e256
 };
 
-static const double tinytens[] =
-{
-  1e-16, 1e-32, 1e-64, 1e-128, 1e-256
-};
-
 #  define n_bigtens 5
 #else
 static const double bigtens[] =
@@ -828,11 +826,6 @@ static const double bigtens[] =
   1e16, 1e32
 };
 
-static const double tinytens[] =
-{
-  1e-16, 1e-32
-};
-
 #  define n_bigtens 2
 #endif
 
@@ -848,12 +841,14 @@ static int quorem(Bigint * b, Bigint * S)
 #endif
 
   n = S->wds;
+
 #ifdef CONFIG_DEBUG_LIB
   if (b->wds > n)
     {
-      ldbg("oversize b in quorem\n");
+      lerr("ERROR: oversize b in quorem\n");
     }
 #endif
+
   if (b->wds < n)
     {
       return 0;
@@ -864,17 +859,19 @@ static int quorem(Bigint * b, Bigint * S)
   bx = b->x;
   bxe = bx + n;
   q = *bxe / (*sxe + 1);        /* ensure q <= true quotient */
+
 #ifdef CONFIG_DEBUG_LIB
   if (q > 9)
-   {
-     ldbg("oversized quotient in quorem\n");
-   }
+    {
+      lerr("ERROR: oversized quotient in quorem\n");
+    }
 #endif
 
   if (q)
     {
       borrow = 0;
       carry = 0;
+
       do
         {
 #ifdef Pack_32
@@ -911,6 +908,7 @@ static int quorem(Bigint * b, Bigint * S)
           b->wds = n;
         }
     }
+
   if (cmp(b, S) >= 0)
     {
       q++;
@@ -918,6 +916,7 @@ static int quorem(Bigint * b, Bigint * S)
       carry = 0;
       bx = b->x;
       sx = S->x;
+
       do
         {
 #ifdef Pack_32
@@ -942,12 +941,14 @@ static int quorem(Bigint * b, Bigint * S)
 #endif
         }
       while (sx <= sxe);
+
       bx = b->x;
       bxe = bx + n;
       if (!*bxe)
         {
           while (--bxe > bx && !*bxe)
             --n;
+
           b->wds = n;
         }
     }
@@ -1040,7 +1041,8 @@ char *__dtoa(double d, int mode, int ndigits, int *decpt, int *sign, char **rve)
 
   if (word0(d) & Sign_bit)
     {
-      /* set sign for everything, including 0's and NaNs */
+      /* Set sign for everything, including 0's and NaNs */
+
       *sign = 1;
       word0(d) &= ~Sign_bit;    /* clear sign bit */
     }
@@ -1057,6 +1059,7 @@ char *__dtoa(double d, int mode, int ndigits, int *decpt, int *sign, char **rve)
 #endif
     {
       /* Infinity or NaN */
+
       *decpt = 9999;
       s =
 #ifdef IEEE_Arith
@@ -1075,6 +1078,7 @@ char *__dtoa(double d, int mode, int ndigits, int *decpt, int *sign, char **rve)
       return s;
     }
 #endif
+
   if (!d)
     {
       *decpt = 1;
@@ -1202,6 +1206,7 @@ char *__dtoa(double d, int mode, int ndigits, int *decpt, int *sign, char **rve)
     case 3:
       leftright = 0;
       /* no break */
+
     case 5:
       i = ndigits + k + 1;
       ilim = i;
@@ -1240,7 +1245,8 @@ char *__dtoa(double d, int mode, int ndigits, int *decpt, int *sign, char **rve)
 
           if (j & Bletch)
             {
-              /* prevent overflows */
+              /* Prevent overflows */
+
               j &= Bletch - 1;
               d /= bigtens[n_bigtens - 1];
               ieps++;
@@ -1291,8 +1297,10 @@ char *__dtoa(double d, int mode, int ndigits, int *decpt, int *sign, char **rve)
           d -= 5.;
           if (d > eps)
             goto one_digit;
+
           if (d < -eps)
             goto no_digits;
+
           goto fast_failed;
         }
 
@@ -1356,6 +1364,7 @@ char *__dtoa(double d, int mode, int ndigits, int *decpt, int *sign, char **rve)
 #ifndef No_leftright
         }
 #endif
+
     fast_failed:
       s = s0;
       d = d2;
@@ -1385,8 +1394,10 @@ char *__dtoa(double d, int mode, int ndigits, int *decpt, int *sign, char **rve)
         {
           L = (int)(d / ds);
           d -= L * ds;
+
 #ifdef Check_FLT_ROUNDS
           /* If FLT_ROUNDS == 2, L will usually be high by 1 */
+
           if (d < 0)
             {
               L--;
@@ -1410,6 +1421,7 @@ char *__dtoa(double d, int mode, int ndigits, int *decpt, int *sign, char **rve)
 
                   ++*s++;
                 }
+
               break;
             }
 
@@ -1499,6 +1511,7 @@ char *__dtoa(double d, int mode, int ndigits, int *decpt, int *sign, char **rve)
       if (!word1(d) && !(word0(d) & Bndry_mask) && word0(d) & Exp_mask)
         {
           /* The special case */
+
           b2 += Log2P;
           s2 += Log2P;
           spec_case = 1;
diff --git a/libc/stdio/lib_fclose.c b/libc/stdio/lib_fclose.c
index 35301fc6bb45c02c59afd7fddb904b3f094d6bd4..022d7bde8eba14c6ce2138c4dc6e8d6a6a9b3daa 100644
--- a/libc/stdio/lib_fclose.c
+++ b/libc/stdio/lib_fclose.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdio/lib_fclose.c
  *
- *   Copyright (C) 2007-2009, 2011, 3013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011, 2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -69,7 +69,7 @@
 
 int fclose(FAR FILE *stream)
 {
-  int err = EINVAL;
+  int errcode = EINVAL;
   int ret = ERROR;
   int status;
 
@@ -89,7 +89,7 @@ int fclose(FAR FILE *stream)
           if ((stream->fs_oflags & O_WROK) != 0)
             {
               ret = lib_fflush(stream, true);
-              err = errno;
+              errcode = errno;
             }
 
           /* Close the underlying file descriptor and save the return status */
@@ -103,18 +103,19 @@ int fclose(FAR FILE *stream)
           if (ret == OK)
             {
               ret = status;
-              err = errno;
+              errcode = errno;
             }
         }
 
-#if CONFIG_STDIO_BUFFER_SIZE > 0
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
       /* Destroy the semaphore */
 
       sem_destroy(&stream->fs_sem);
 
       /* Release the buffer */
 
-      if (stream->fs_bufstart)
+      if (stream->fs_bufstart != NULL &&
+          (stream->fs_flags & __FS_FLAG_UBF) == 0)
         {
           lib_free(stream->fs_bufstart);
         }
@@ -122,6 +123,7 @@ int fclose(FAR FILE *stream)
       /* Clear the whole structure */
 
       memset(stream, 0, sizeof(FILE));
+
 #else
 #if CONFIG_NUNGET_CHARS > 0
       /* Reset the number of ungetc characters */
@@ -132,6 +134,7 @@ int fclose(FAR FILE *stream)
 
       stream->fs_oflags = 0;
 #endif
+
       /* Setting the file descriptor to -1 makes the stream available for reuse */
 
       stream->fs_fd = -1;
@@ -143,7 +146,7 @@ int fclose(FAR FILE *stream)
 
   if (ret != OK)
     {
-      set_errno(err);
+      set_errno(errcode);
       return EOF;
     }
 
diff --git a/libc/stdio/lib_fflush.c b/libc/stdio/lib_fflush.c
index ae88e0ced2f48f94ad480120972fe801123581e6..dd3e17831691f39195e0a0367910f2ba641c13aa 100644
--- a/libc/stdio/lib_fflush.c
+++ b/libc/stdio/lib_fflush.c
@@ -48,34 +48,6 @@
 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libc/stdio/lib_fgetc.c b/libc/stdio/lib_fgetc.c
index c4b32d69b9989f84cde31776ca5206bdf1e7e377..67ac76db3a19e51e59ec6372c13c2ed9b58adb0e 100644
--- a/libc/stdio/lib_fgetc.c
+++ b/libc/stdio/lib_fgetc.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -44,38 +40,6 @@
 #include 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libc/stdio/lib_fgetpos.c b/libc/stdio/lib_fgetpos.c
index ba4fa478b27e7527c07fe4fe3e60ef7bdbe25aa3..dd92187530e01302a68702c37575e0e4019ed17b 100644
--- a/libc/stdio/lib_fgetpos.c
+++ b/libc/stdio/lib_fgetpos.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -49,38 +45,6 @@
 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -104,7 +68,7 @@ int fgetpos(FAR FILE *stream, FAR fpos_t *pos)
 {
   long position;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!stream || !pos)
     {
       set_errno(EINVAL);
diff --git a/libc/stdio/lib_fprintf.c b/libc/stdio/lib_fprintf.c
index 191dc2e34a41602f13ee5d3c70ccf786d3bcc31c..bb744c4698bf91acd9a8e7f57ac16b6625b256f6 100644
--- a/libc/stdio/lib_fprintf.c
+++ b/libc/stdio/lib_fprintf.c
@@ -33,44 +33,12 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
 
 #include 
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libc/stdio/lib_fputc.c b/libc/stdio/lib_fputc.c
index 57e784759a31554d220b1de5c1e9b60344f80add..e93231bc356e511a06bc203ecf5acb721c1add19 100644
--- a/libc/stdio/lib_fputc.c
+++ b/libc/stdio/lib_fputc.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdio/lib_fputc.c
  *
- *   Copyright (C) 2007, 2008, 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2008, 2011-2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -44,38 +40,6 @@
 #include 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -94,8 +58,7 @@ int fputc(int c, FAR FILE *stream)
     {
       /* Flush the buffer if a newline is output */
 
-#ifdef CONFIG_STDIO_LINEBUFFER
-      if (c == '\n')
+      if (c == '\n' && (stream->fs_flags & __FS_FLAG_LBF) != 0)
         {
           ret = lib_fflush(stream, true);
           if (ret < 0)
@@ -103,7 +66,7 @@ int fputc(int c, FAR FILE *stream)
               return EOF;
             }
         }
-#endif
+
       return c;
     }
   else
diff --git a/libc/stdio/lib_fputs.c b/libc/stdio/lib_fputs.c
index 4b47a0462881483b199f56acddee5278ff28adec..701076ff055c627dda9d214e7ed2310aeab3094a 100644
--- a/libc/stdio/lib_fputs.c
+++ b/libc/stdio/lib_fputs.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdio/lib_fputs.c
  *
- *   Copyright (C) 2007, 2008, 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2008, 2011-2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -51,38 +47,6 @@
 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -104,7 +68,7 @@ int fputs(FAR const char *s, FAR FILE *stream)
 
   /* Make sure that a string was provided. */
 
-#ifdef CONFIG_DEBUG /* Most parameter checking is disabled if DEBUG is off */
+#ifdef CONFIG_DEBUG_FEATURES /* Most parameter checking is disabled if DEBUG is off */
   if (!s)
     {
       set_errno(EINVAL);
@@ -126,8 +90,7 @@ int fputs(FAR const char *s, FAR FILE *stream)
 
       /* Flush the buffer if a newline was written to the buffer */
 
-#ifdef CONFIG_STDIO_LINEBUFFER
-      if (ch == '\n')
+      if (ch == '\n' && (stream->fs_flags & __FS_FLAG_LBF) != 0)
         {
           ret = lib_fflush(stream, true);
           if (ret < 0)
@@ -135,86 +98,83 @@ int fputs(FAR const char *s, FAR FILE *stream)
               return EOF;
             }
         }
-#endif
     }
 
   return nput;
 }
 
-#elif defined(CONFIG_STDIO_LINEBUFFER)
+#else
 int fputs(FAR const char *s, FAR FILE *stream)
 {
   int nput;
-  int ret;
 
   /* Make sure that a string was provided. */
 
-#ifdef CONFIG_DEBUG /* Most parameter checking is disabled if DEBUG is off */
-  if (!s)
+#ifdef CONFIG_DEBUG_FEATURES /* Most parameter checking is disabled if DEBUG is off */
+  if (s == NULL || stream == NULL)
     {
       set_errno(EINVAL);
       return EOF;
     }
 #endif
 
-  /* Write the string.  Loop until the null terminator is encountered */
+  /* If line buffering is enabled, then we will have to output one character
+   * at a time, checking for a newline character each time.
+   */
 
-  for (nput = 0; *s; nput++, s++)
+  if ((stream->fs_flags & __FS_FLAG_LBF) != 0)
     {
-      /* Write the next character to the stream buffer */
+      int ret;
 
-      ret = lib_fwrite(s, 1, stream);
-      if (ret <= 0)
-        {
-          return EOF;
-        }
-
-      /* Flush the buffer if a newline was written to the buffer */
+      /* Write the string.  Loop until the null terminator is encountered */
 
-      if (*s == '\n')
+      for (nput = 0; *s; nput++, s++)
         {
-          ret = lib_fflush(stream, true);
-          if (ret < 0)
+          /* Write the next character to the stream buffer */
+
+          ret = lib_fwrite(s, 1, stream);
+          if (ret <= 0)
             {
               return EOF;
             }
+
+          /* Flush the buffer if a newline was written to the buffer */
+
+          if (*s == '\n')
+            {
+              ret = lib_fflush(stream, true);
+              if (ret < 0)
+                {
+                  return EOF;
+                }
+            }
         }
     }
 
-  return nput;
-}
+  /* Without line buffering, we can write the whole string in one operation. */
 
-#else
-int fputs(FAR const char *s, FAR FILE *stream)
-{
-  int ntowrite;
-  int nput;
-
-  /* Make sure that a string was provided. */
-
-#ifdef CONFIG_DEBUG /* Most parameter checking is disabled if DEBUG is off */
-  if (!s)
+  else
     {
-      set_errno(EINVAL);
-      return EOF;
-    }
-#endif
+      int ntowrite;
 
-  /* Get the length of the string. */
+      /* Get the length of the string. */
 
-  ntowrite = strlen(s);
-  if (ntowrite == 0)
-    {
-      return 0;
-    }
+      ntowrite = strlen(s);
+      if (ntowrite == 0)
+        {
+          return 0;
+        }
 
-  /* Write the string */
+      /* Write the string */
+
+      nput = lib_fwrite(s, ntowrite, stream);
+      if (nput < 0)
+        {
+          return EOF;
+        }
 
-  nput = lib_fwrite(s, ntowrite, stream);
-  if (nput < 0)
-    {
-      return EOF;
     }
+
   return nput;
 }
 #endif
diff --git a/libc/stdio/lib_fread.c b/libc/stdio/lib_fread.c
index 8132b3275affd83ef2ba08879aaa39147e007c35..87488512dbd9a9a65b60807664e18f820e914ee8 100644
--- a/libc/stdio/lib_fread.c
+++ b/libc/stdio/lib_fread.c
@@ -44,34 +44,6 @@
 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libc/stdio/lib_fseek.c b/libc/stdio/lib_fseek.c
index bafe4488e4357e5befb5d201e343a341f367e58c..4dbe04417020a0345f2a0e8a2d2fd6cf2790a9d3 100644
--- a/libc/stdio/lib_fseek.c
+++ b/libc/stdio/lib_fseek.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdio/lib_fseek.c
  *
- *   Copyright (C) 2007, 2008, 2011, 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2008, 2011, 2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -51,38 +47,6 @@
 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -107,19 +71,21 @@
 
 int fseek(FAR FILE *stream, long int offset, int whence)
 {
-#if CONFIG_STDIO_BUFFER_SIZE > 0
-  /* Flush any valid read/write data in the buffer (also verifies stream) */
+#ifdef CONFIG_DEBUG_FEATURES
+  /* Verify that we were provided with a stream */
 
-  if (lib_rdflush(stream) < 0 || lib_wrflush(stream) < 0)
+  if (!stream)
     {
+      set_errno(EBADF);
       return ERROR;
     }
-#else
-  /* Verify that we were provided with a stream */
+#endif
 
-  if (!stream)
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
+  /* Flush any valid read/write data in the buffer (also verifies stream) */
+
+  if (lib_rdflush(stream) < 0 || lib_wrflush(stream) < 0)
     {
-      set_errno(EBADF);
       return ERROR;
     }
 #endif
diff --git a/libc/stdio/lib_fsetpos.c b/libc/stdio/lib_fsetpos.c
index 18843cb6f7eb23a99ced3e91e5c34721e44a3e56..eee7a50ec6b4c3e6c138c37283f9782b532489e5 100644
--- a/libc/stdio/lib_fsetpos.c
+++ b/libc/stdio/lib_fsetpos.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -51,38 +47,6 @@
 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -104,7 +68,7 @@
 
 int fsetpos(FAR FILE *stream, FAR fpos_t *pos)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!stream || !pos)
     {
       set_errno(EINVAL);
diff --git a/libc/stdio/lib_ftell.c b/libc/stdio/lib_ftell.c
index 8707c9b2645304c4f47b59fc61993ea87e5400d9..ece1a245a600659c66cd71734e47446d07bd77e4 100644
--- a/libc/stdio/lib_ftell.c
+++ b/libc/stdio/lib_ftell.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdio/lib_ftell.c
  *
- *   Copyright (C) 2008, 2011, 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008, 2011, 2013, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -51,34 +47,6 @@
 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -96,13 +64,13 @@
  *
  ****************************************************************************/
 
-#if CONFIG_STDIO_BUFFER_SIZE > 0
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
 static off_t lib_getrdoffset(FAR FILE *stream)
 {
   off_t rdoffset = 0;
   lib_take_semaphore(stream);
 
-  if (stream->fs_bufread != stream->fs_bufstart)
+  if (stream->fs_bufstart != NULL && stream->fs_bufread != stream->fs_bufstart)
     {
 #if CONFIG_NUNGET_CHARS > 0
       rdoffset = stream->fs_bufread - stream->fs_bufpos + stream->fs_nungotten;
diff --git a/libc/stdio/lib_fwrite.c b/libc/stdio/lib_fwrite.c
index ffb76765ae82106738e9eedf4523b56a7f8c9304..354cd38098fb50e5e5a40a667151de949d6109fe 100644
--- a/libc/stdio/lib_fwrite.c
+++ b/libc/stdio/lib_fwrite.c
@@ -44,34 +44,6 @@
 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -95,5 +67,6 @@ size_t fwrite(FAR const void *ptr, size_t size, size_t n_items, FAR FILE *stream
 
       items_written = bytes_written / size;
     }
+
   return items_written;
 }
diff --git a/libc/stdio/lib_libdtoa.c b/libc/stdio/lib_libdtoa.c
index a3ef37d2209e2ec5c934994cd00e673543402060..6dff3bc0e992f1f8b524fa1438e91dc3999c2c93 100644
--- a/libc/stdio/lib_libdtoa.c
+++ b/libc/stdio/lib_libdtoa.c
@@ -44,7 +44,12 @@
  * Included Files
  ****************************************************************************/
 
+#include 
+
 #include 
+#include 
+
+#include 
 
 #include "libc.h"
 
@@ -62,30 +67,6 @@
 #  define MAX(a,b) (a > b ? a : b)
 #endif
 
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -157,6 +138,15 @@ static void lib_dtoa(FAR struct lib_outstream_s *obj, int fmt, int prec,
   int  dsgn;            /* Unused sign indicator */
   int  i;
 
+  /* This function may *NOT* be called within interrupt level logic.  That is
+   * because the logic in __dtoa may attempt to allocate memory.  That will
+   * lead to cryptic failures down the road within the memory manager.
+   * Better to explicitly assert upstream here.  Rule:  Don't use floating
+   * point formats on any output from interrupt handling logic.
+   */
+
+  DEBUGASSERT(up_interrupt_context() == false);
+
   /* Special handling for NaN and Infinity */
 
   if (isnan(value))
diff --git a/libc/stdio/lib_libfflush.c b/libc/stdio/lib_libfflush.c
index ef20834b21922475bfc00e1aebae216365963e56..22172a66c76cd2f0b4f489bb5e290ff5f1568a77 100644
--- a/libc/stdio/lib_libfflush.c
+++ b/libc/stdio/lib_libfflush.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdio/lib_libfflush.c
  *
- *   Copyright (C) 2007-2008, 2011-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2008, 2011-2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -49,34 +49,6 @@
 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -101,10 +73,11 @@
 
 ssize_t lib_fflush(FAR FILE *stream, bool bforce)
 {
-#if CONFIG_STDIO_BUFFER_SIZE > 0
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
   FAR const unsigned char *src;
   ssize_t bytes_written;
   ssize_t nbuffer;
+  int ret;
 
   /* Return EBADF if the file is not opened for writing */
 
@@ -117,9 +90,19 @@ ssize_t lib_fflush(FAR FILE *stream, bool bforce)
 
   lib_take_semaphore(stream);
 
+  /* Check if there is an allocated I/O buffer */
+
+  if (stream->fs_bufstart == NULL)
+    {
+      /* No, then there can be nothing remaining in the buffer. */
+
+      ret = 0;
+      goto errout_with_sem;
+   }
+
   /* Make sure that the buffer holds valid data */
 
-  if (stream->fs_bufpos  != stream->fs_bufstart)
+  if (stream->fs_bufpos != stream->fs_bufstart)
     {
       /* Make sure that the buffer holds buffered write data.  We do not
        * support concurrent read/write buffer usage.
@@ -131,8 +114,8 @@ ssize_t lib_fflush(FAR FILE *stream, bool bforce)
            * remaining in the buffer."
            */
 
-          lib_give_semaphore(stream);
-          return 0;
+          ret = 0;
+          goto errout_with_sem;
         }
 
       /* How many bytes of write data are used in the buffer now */
@@ -154,8 +137,8 @@ ssize_t lib_fflush(FAR FILE *stream, bool bforce)
                */
 
               stream->fs_flags |= __FS_FLAG_ERROR;
-              lib_give_semaphore(stream);
-              return -get_errno();
+              ret = -get_errno();;
+              goto errout_with_sem;
             }
 
           /* Handle partial writes.  fflush() must either return with
@@ -190,6 +173,11 @@ ssize_t lib_fflush(FAR FILE *stream, bool bforce)
 
   lib_give_semaphore(stream);
   return stream->fs_bufpos - stream->fs_bufstart;
+
+errout_with_sem:
+  lib_give_semaphore(stream);
+  return ret;
+
 #else
   /* Return no bytes remaining in the buffer */
 
diff --git a/libc/stdio/lib_libflushall.c b/libc/stdio/lib_libflushall.c
index 342c96a5bd7c81aa87ac2e7478a427d86ab0d2d4..e32b49626723bcf0dcaa1d36e2f30a0a0335fc80 100644
--- a/libc/stdio/lib_libflushall.c
+++ b/libc/stdio/lib_libflushall.c
@@ -47,34 +47,6 @@
 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libc/stdio/lib_libfread.c b/libc/stdio/lib_libfread.c
index 8597209cd3cd2420ce36b03fca6edf739465cea3..d41639d80027ff23276a9188b4f7b119aaf6eedc 100644
--- a/libc/stdio/lib_libfread.c
+++ b/libc/stdio/lib_libfread.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdio/lib_libfread.c
  *
- *   Copyright (C) 2007-2009, 2011-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011-2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -48,34 +48,6 @@
 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -88,7 +60,7 @@ ssize_t lib_fread(FAR void *ptr, size_t count, FAR FILE *stream)
 {
   FAR unsigned char *dest  = (FAR unsigned char*)ptr;
   ssize_t bytes_read;
-#if CONFIG_STDIO_BUFFER_SIZE > 0
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
   int ret;
 #endif
 
@@ -124,170 +96,180 @@ ssize_t lib_fread(FAR void *ptr, size_t count, FAR FILE *stream)
         }
 #endif
 
-#if CONFIG_STDIO_BUFFER_SIZE > 0
-      /* If the buffer is currently being used for write access, then
-       * flush all of the buffered write data.  We do not support concurrent
-       * buffered read/write access.
-       */
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
+      /* Is there an I/O buffer? */
 
-      ret = lib_wrflush(stream);
-      if (ret < 0)
+      if (stream->fs_bufstart != NULL)
         {
-          lib_give_semaphore(stream);
-          return ret;
-        }
-
-      /* Now get any other needed chars from the buffer or the file. */
-
-      while (count > 0)
-        {
-          /* Is there readable data in the buffer? */
+          /* If the buffer is currently being used for write access, then
+           * flush all of the buffered write data.  We do not support concurrent
+           * buffered read/write access.
+           */
 
-          while ((count > 0) && (stream->fs_bufpos < stream->fs_bufread))
+          ret = lib_wrflush(stream);
+          if (ret < 0)
             {
-              /* Yes, copy a byte into the user buffer */
-
-              *dest++ = *stream->fs_bufpos++;
-              count--;
+              lib_give_semaphore(stream);
+              return ret;
             }
 
-          /* The buffer is empty OR we have already supplied the number of
-           * bytes requested in the read.  Check if we need to read
-           * more from the file.
-           */
+          /* Now get any other needed chars from the buffer or the file. */
 
-          if (count > 0)
+          while (count > 0)
             {
-              size_t buffer_available;
+              /* Is there readable data in the buffer? */
 
-              /* We need to read more data into the buffer from the file */
+              while ((count > 0) && (stream->fs_bufpos < stream->fs_bufread))
+                {
+                  /* Yes, copy a byte into the user buffer */
 
-              /* Mark the buffer empty */
+                  *dest++ = *stream->fs_bufpos++;
+                  count--;
+                }
 
-              stream->fs_bufpos = stream->fs_bufread = stream->fs_bufstart;
+              /* The buffer is empty OR we have already supplied the number of
+               * bytes requested in the read.  Check if we need to read
+               * more from the file.
+               */
 
-              /* How much space is available in the buffer? */
+              if (count > 0)
+                {
+                  size_t buffer_available;
 
-              buffer_available = stream->fs_bufend - stream->fs_bufread;
+                  /* We need to read more data into the buffer from the file */
 
-              /* Will the number of bytes that we need to read fit into
-               * the buffer space that is available? If the read size is
-               * larger than the buffer, then read some of the data
-               * directly into the user's buffer.
-               */
+                  /* Mark the buffer empty */
 
-              if (count > buffer_available)
-                {
-                  bytes_read = read(stream->fs_fd, dest, count);
-                  if (bytes_read < 0)
-                    {
-                      /* An error occurred on the read.  The error code is
-                       * in the 'errno' variable.
-                       */
+                  stream->fs_bufpos = stream->fs_bufread = stream->fs_bufstart;
 
-                      goto errout_with_errno;
-                    }
-                  else if (bytes_read == 0)
-                    {
-                      /* We are at the end of the file.  But we may already
-                       * have buffered data.  In that case, we will report
-                       * the EOF indication later.
-                       */
+                  /* How much space is available in the buffer? */
 
-                      goto shortread;
-                    }
-                  else
-                    {
-                      /* Some bytes were read. Adjust the dest pointer */
+                  buffer_available = stream->fs_bufend - stream->fs_bufread;
 
-                      dest  += bytes_read;
+                  /* Will the number of bytes that we need to read fit into
+                   * the buffer space that is available? If the read size is
+                   * larger than the buffer, then read some of the data
+                   * directly into the user's buffer.
+                   */
 
-                      /* Were all of the requested bytes read? */
+                  if (count > buffer_available)
+                    {
+                      bytes_read = read(stream->fs_fd, dest, count);
+                      if (bytes_read < 0)
+                        {
+                          /* An error occurred on the read.  The error code is
+                           * in the 'errno' variable.
+                           */
 
-                      if ((size_t)bytes_read < count)
+                          goto errout_with_errno;
+                        }
+                      else if (bytes_read == 0)
                         {
-                          /* No.  We must be at the end of file. */
+                          /* We are at the end of the file.  But we may already
+                           * have buffered data.  In that case, we will report
+                           * the EOF indication later.
+                           */
 
                           goto shortread;
                         }
                       else
                         {
-                          /* Yes.  We are done. */
+                          /* Some bytes were read. Adjust the dest pointer */
 
-                          count = 0;
-                        }
-                    }
-                }
-              else
-                {
-                  /* The number of bytes required to satisfy the read
-                   * is less than or equal to the size of the buffer
-                   * space that we have left. Read as much as we can
-                   * into the buffer.
-                   */
+                          dest  += bytes_read;
 
-                  bytes_read = read(stream->fs_fd, stream->fs_bufread, buffer_available);
-                  if (bytes_read < 0)
-                    {
-                      /* An error occurred on the read.  The error code is
-                       * in the 'errno' variable.
-                       */
+                          /* Were all of the requested bytes read? */
 
-                      goto errout_with_errno;
-                    }
-                  else if (bytes_read == 0)
-                    {
-                      /* We are at the end of the file.  But we may already
-                       * have buffered data.  In that case, we will report
-                       * the EOF indication later.
-                       */
+                          if ((size_t)bytes_read < count)
+                            {
+                              /* No.  We must be at the end of file. */
+
+                              goto shortread;
+                            }
+                          else
+                            {
+                              /* Yes.  We are done. */
 
-                      goto shortread;
+                              count = 0;
+                            }
+                        }
                     }
                   else
                     {
-                      /* Some bytes were read */
+                      /* The number of bytes required to satisfy the read
+                       * is less than or equal to the size of the buffer
+                       * space that we have left. Read as much as we can
+                       * into the buffer.
+                       */
+
+                      bytes_read = read(stream->fs_fd, stream->fs_bufread,
+                                        buffer_available);
+                      if (bytes_read < 0)
+                        {
+                          /* An error occurred on the read.  The error code is
+                           * in the 'errno' variable.
+                           */
+
+                          goto errout_with_errno;
+                        }
+                      else if (bytes_read == 0)
+                        {
+                          /* We are at the end of the file.  But we may already
+                           * have buffered data.  In that case, we will report
+                           * the EOF indication later.
+                           */
+
+                          goto shortread;
+                        }
+                      else
+                        {
+                          /* Some bytes were read */
 
-                      stream->fs_bufread += bytes_read;
+                          stream->fs_bufread += bytes_read;
+                        }
                     }
                 }
             }
         }
-#else
-      /* Now get any other needed chars from the file. */
-
-      while (count > 0)
+      else
+#endif
         {
-          bytes_read = read(stream->fs_fd, dest, count);
-          if (bytes_read < 0)
-            {
-              /* An error occurred on the read.  The error code is
-               * in the 'errno' variable.
-               */
+          /* Now get any other needed chars from the file. */
 
-              goto errout_with_errno;
-            }
-          else if (bytes_read == 0)
+          while (count > 0)
             {
-              /* We are at the end of the file.  But we may already
-               * have buffered data.  In that case, we will report
-               * the EOF indication later.
-               */
+              bytes_read = read(stream->fs_fd, dest, count);
+              if (bytes_read < 0)
+                {
+                  /* An error occurred on the read.  The error code is
+                   * in the 'errno' variable.
+                   */
 
-              break;
-            }
-          else
-            {
-              dest  += bytes_read;
-              count -= bytes_read;
+                  goto errout_with_errno;
+                }
+              else if (bytes_read == 0)
+                {
+                  /* We are at the end of the file.  But we may already
+                   * have buffered data.  In that case, we will report
+                   * the EOF indication later.
+                   */
+
+                  break;
+                }
+              else
+                {
+                  dest  += bytes_read;
+                  count -= bytes_read;
+                }
             }
         }
-#endif
+
       /* Here after a successful (but perhaps short) read */
 
-#if CONFIG_STDIO_BUFFER_SIZE > 0
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
     shortread:
 #endif
+
       bytes_read = dest - (FAR unsigned char *)ptr;
 
       /* Set or clear the EOF indicator.  If we get here because of a
diff --git a/libc/stdio/lib_libfwrite.c b/libc/stdio/lib_libfwrite.c
index 12138e62ba04379e5310dc6f773a5686080a98c5..b8c90277e6eeceb008348fa2d42486827425c93e 100644
--- a/libc/stdio/lib_libfwrite.c
+++ b/libc/stdio/lib_libfwrite.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdio/lib_libfwrite.c
  *
- *   Copyright (C) 2007-2009, 2011, 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011, 2013-2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -48,34 +48,6 @@
 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -85,7 +57,7 @@
  ****************************************************************************/
 
 ssize_t lib_fwrite(FAR const void *ptr, size_t count, FAR FILE *stream)
-#if CONFIG_STDIO_BUFFER_SIZE > 0
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
 {
   FAR const unsigned char *start = ptr;
   FAR const unsigned char *src   = ptr;
@@ -100,12 +72,22 @@ ssize_t lib_fwrite(FAR const void *ptr, size_t count, FAR FILE *stream)
       return ret;
     }
 
+  /* Check if write access is permitted */
+
   if ((stream->fs_oflags & O_WROK) == 0)
     {
       set_errno(EBADF);
       goto errout;
     }
 
+  /* If there is no I/O buffer, then output data immediately */
+
+  if (stream->fs_bufstart == NULL)
+   {
+     ret = write(stream->fs_fd, ptr, count);
+     goto errout;
+   }
+
   /* Get exclusive access to the stream */
 
   lib_take_semaphore(stream);
@@ -170,7 +152,7 @@ ssize_t lib_fwrite(FAR const void *ptr, size_t count, FAR FILE *stream)
 
   /* Return the number of bytes written */
 
-  ret = src - start;
+  ret = (uintptr_t)src - (uintptr_t)start;
 
 errout_with_semaphore:
   lib_give_semaphore(stream);
@@ -193,4 +175,4 @@ errout:
 
   return ret;
 }
-#endif /* CONFIG_STDIO_BUFFER_SIZE */
+#endif /* CONFIG_STDIO_DISABLE_BUFFERING */
diff --git a/libc/stdio/lib_libnoflush.c b/libc/stdio/lib_libnoflush.c
index be4ea8ae5406d8a6af7c6f5ed03585eeb82d1425..f862cd68748c99532d9cf35b07b69cf73caeb55c 100644
--- a/libc/stdio/lib_libnoflush.c
+++ b/libc/stdio/lib_libnoflush.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdio/lib_libnoflush.c
  *
- *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -49,36 +49,6 @@
 
 #include "libc.h"
 
-#ifdef CONFIG_STDIO_LINEBUFFER
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -88,7 +58,7 @@
  *
  * Description:
  *  lib_noflush() provides a common, dummy flush method for output streams
- *  that are not flushable.  Only used if CONFIG_STDIO_LINEBUFFER is selected.
+ *  that are not flushable.
  *
  * Return:
  *  Always returns OK
@@ -99,6 +69,3 @@ int lib_noflush(FAR struct lib_outstream_s *this)
 {
   return OK;
 }
-
-#endif /* CONFIG_STDIO_LINEBUFFER */
-
diff --git a/libc/stdio/lib_libsnoflush.c b/libc/stdio/lib_libsnoflush.c
index 6deef38e039a96da705c4fa01e5589aa18517a4c..652b977cf69a0ab5a4a8e5ce9ee5e3c2dc86f210 100644
--- a/libc/stdio/lib_libsnoflush.c
+++ b/libc/stdio/lib_libsnoflush.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdio/lib_libsnoflush.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -48,36 +48,6 @@
 
 #include "libc.h"
 
-#ifdef CONFIG_STDIO_LINEBUFFER
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -87,8 +57,7 @@
  *
  * Description:
  *  lib_snoflush() provides a common, dummy flush method for seekable output
- *  streams that are not flushable.  Only used if CONFIG_STDIO_LINEBUFFER
- *  is selected.
+ *  streams that are not flushable.
  *
  * Return:
  *  Always returns OK
@@ -99,6 +68,3 @@ int lib_snoflush(FAR struct lib_sostream_s *this)
 {
   return OK;
 }
-
-#endif /* CONFIG_STDIO_LINEBUFFER */
-
diff --git a/libc/stdio/lib_libsprintf.c b/libc/stdio/lib_libsprintf.c
index edb49f883251cc9efec12b6a5308c2895fea247f..1762fd99e8929ab886674bb1a4a0fa78b148abd2 100644
--- a/libc/stdio/lib_libsprintf.c
+++ b/libc/stdio/lib_libsprintf.c
@@ -40,34 +40,6 @@
 #include 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libc/stdio/lib_libvsprintf.c b/libc/stdio/lib_libvsprintf.c
index a103b0c4eeaf765cde2308ed5d8d8909d9e51049..894f04045385c939beaaf6cc50212ce7b7a87f98 100644
--- a/libc/stdio/lib_libvsprintf.c
+++ b/libc/stdio/lib_libvsprintf.c
@@ -39,6 +39,7 @@
 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -207,24 +208,12 @@ static void postjustify(FAR struct lib_outstream_s *obj, uint8_t fmt,
                         uint8_t flags, int fieldwidth, int valwidth);
 #endif
 
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Constant Data
  ****************************************************************************/
 
 static const char g_nullstring[] = "(null)";
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -1204,14 +1193,13 @@ int lib_vsprintf(FAR struct lib_outstream_s *obj, FAR const IPTR char *src,
 
            /* Flush the buffer if a newline is encountered */
 
-#ifdef CONFIG_STDIO_LINEBUFFER
            if (FMT_CHAR == '\n')
              {
                /* Should return an error on a failure to flush */
 
                (void)obj->flush(obj);
              }
-#endif
+
            /* Process the next character in the format */
 
            continue;
diff --git a/libc/stdio/lib_lowoutstream.c b/libc/stdio/lib_lowoutstream.c
index 788f3f18146922f871eeefb551fca10100533daf..8447051d39da32f6d7245ec9e9c01ac50b7a71e2 100644
--- a/libc/stdio/lib_lowoutstream.c
+++ b/libc/stdio/lib_lowoutstream.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdio/lib_lowoutstream.c
  *
- *   Copyright (C) 2007-2009, 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011-2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -88,9 +88,7 @@ static void lowoutstream_putc(FAR struct lib_outstream_s *this, int ch)
 void lib_lowoutstream(FAR struct lib_outstream_s *stream)
 {
   stream->put   = lowoutstream_putc;
-#ifdef CONFIG_STDIO_LINEBUFFER
   stream->flush = lib_noflush;
-#endif
   stream->nput  = 0;
 }
 
diff --git a/libc/stdio/lib_memoutstream.c b/libc/stdio/lib_memoutstream.c
index 1c658512ea971a2e64994ebe0379c31f12f3d17a..28137d07ed72ce7965f5005273a7c4221648c170 100644
--- a/libc/stdio/lib_memoutstream.c
+++ b/libc/stdio/lib_memoutstream.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdio/lib_memoutstream.c
  *
- *   Copyright (C) 2007-2009, 2011-2012, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011-2012, 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -93,9 +93,7 @@ void lib_memoutstream(FAR struct lib_memoutstream_s *outstream,
                       FAR char *bufstart, int buflen)
 {
   outstream->public.put   = memoutstream_putc;
-#ifdef CONFIG_STDIO_LINEBUFFER
   outstream->public.flush = lib_noflush;
-#endif
   outstream->public.nput  = 0;          /* Will be buffer index */
   outstream->buffer       = bufstart;   /* Start of buffer */
   outstream->buflen       = buflen - 1; /* Save space for null terminator */
diff --git a/libc/stdio/lib_memsostream.c b/libc/stdio/lib_memsostream.c
index 6570ef8942bdb7113178baaa7716a3ba654e9993..93c19facad180ace15a98e7ba2add4527952da0f 100644
--- a/libc/stdio/lib_memsostream.c
+++ b/libc/stdio/lib_memsostream.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdio/lib_memsostream.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -137,9 +137,7 @@ void lib_memsostream(FAR struct lib_memsostream_s *outstream,
                      FAR char *bufstart, int buflen)
 {
   outstream->public.put   = memsostream_putc;
-#ifdef CONFIG_STDIO_LINEBUFFER
   outstream->public.flush = lib_snoflush;
-#endif
   outstream->public.seek  = memsostream_seek;
   outstream->public.nput  = 0;          /* Total number of characters written */
   outstream->buffer       = bufstart;   /* Start of buffer */
diff --git a/libc/stdio/lib_nulloutstream.c b/libc/stdio/lib_nulloutstream.c
index 89a5a2524dfebc86682c694299a5523e2a161a36..47f2acd58a401c3b1826835c7afd4e197ad05745 100644
--- a/libc/stdio/lib_nulloutstream.c
+++ b/libc/stdio/lib_nulloutstream.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdio/lib_nulloutstream.c
  *
- *   Copyright (C) 2007-2009, 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011-2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -76,9 +76,7 @@ static void nulloutstream_putc(FAR struct lib_outstream_s *this, int ch)
 void lib_nulloutstream(FAR struct lib_outstream_s *nulloutstream)
 {
   nulloutstream->put   = nulloutstream_putc;
-#ifdef CONFIG_STDIO_LINEBUFFER
   nulloutstream->flush = lib_noflush;
-#endif
   nulloutstream->nput  = 0;
 }
 
diff --git a/libc/stdio/lib_perror.c b/libc/stdio/lib_perror.c
index e551db0c3e6c20548008c2222356a5cea8bfa048..3c85402ad5c192266cb5f98bba94a2d28914e163 100644
--- a/libc/stdio/lib_perror.c
+++ b/libc/stdio/lib_perror.c
@@ -58,26 +58,6 @@
 #  define PERROR_STREAM stderr
 #endif
 
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libc/stdio/lib_printf.c b/libc/stdio/lib_printf.c
index 5f1096a3a2f7df75b432eeaf144d402d3937ed9d..7c3e460b9756cca07841108832997de11a4d6031 100644
--- a/libc/stdio/lib_printf.c
+++ b/libc/stdio/lib_printf.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdio/lib_printf.c
  *
- *   Copyright (C) 2007-2008, 2011-2012, 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2008, 2011-2012, 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -58,15 +58,8 @@ int printf(FAR const IPTR char *fmt, ...)
   va_start(ap, fmt);
 #if CONFIG_NFILE_STREAMS > 0
   ret = vfprintf(stdout, fmt, ap);
-#elif CONFIG_NFILE_DESCRIPTORS > 0
-  ret = vsyslog(LOG_INFO, fmt, ap);
-#elif defined(CONFIG_ARCH_LOWPUTC)
-  ret = lowvsyslog(LOG_INFO, fmt, ap);
 #else
-# ifdef CONFIG_CPP_HAVE_WARNING
-#   warning "printf has no data sink"
-# endif
-  ret = 0;
+  ret = vsyslog(LOG_INFO, fmt, ap);
 #endif
   va_end(ap);
 
diff --git a/libc/stdio/lib_puts.c b/libc/stdio/lib_puts.c
index 957e7426b98d07e3dd4f3c4efd08201a9979f2f6..e301f4af736588b5d75bc11d66a1c754901e87fc 100644
--- a/libc/stdio/lib_puts.c
+++ b/libc/stdio/lib_puts.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -44,38 +40,6 @@
 #include 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -112,15 +76,18 @@ int puts(FAR const char *s)
         {
           nput = nwritten + 1;
 
-          /* Flush the buffer after the newline is output. */
+          /* Flush the buffer after the newline is output if line buffering
+           * is enabled.
+           */
 
-#ifdef CONFIG_STDIO_LINEBUFFER
-          ret = lib_fflush(stream, true);
-          if (ret < 0)
+          if ((stream->fs_flags & __FS_FLAG_LBF) != 0)
             {
-              nput = EOF;
+              ret = lib_fflush(stream, true);
+              if (ret < 0)
+                {
+                  nput = EOF;
+                }
             }
-#endif
         }
     }
 
diff --git a/libc/stdio/lib_rawoutstream.c b/libc/stdio/lib_rawoutstream.c
index aed1fc5272e8abd6974aef71b205215c4188d44a..ab333147ba020ab95180e5e71d5145e3a81fc758 100644
--- a/libc/stdio/lib_rawoutstream.c
+++ b/libc/stdio/lib_rawoutstream.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdio/lib_rawsostream.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -119,9 +119,7 @@ static off_t rawsostream_seek(FAR struct lib_sostream_s *this, off_t offset,
 void lib_rawsostream(FAR struct lib_rawsostream_s *outstream, int fd)
 {
   outstream->public.put   = rawsostream_putc;
-#ifdef CONFIG_STDIO_LINEBUFFER
   outstream->public.flush = lib_snoflush;
-#endif
   outstream->public.seek  = rawsostream_seek;
   outstream->public.nput  = 0;
   outstream->fd           = fd;
diff --git a/libc/stdio/lib_rawsostream.c b/libc/stdio/lib_rawsostream.c
index 3c0b96dfa8dcf5bc0c75e92e7bd0119ba55a44b6..30c71cce42dba471feb2200fe7dc6942a66aa5cf 100644
--- a/libc/stdio/lib_rawsostream.c
+++ b/libc/stdio/lib_rawsostream.c
@@ -108,9 +108,7 @@ static void rawoutstream_putc(FAR struct lib_outstream_s *this, int ch)
 void lib_rawoutstream(FAR struct lib_rawoutstream_s *outstream, int fd)
 {
   outstream->public.put   = rawoutstream_putc;
-#ifdef CONFIG_STDIO_LINEBUFFER
   outstream->public.flush = lib_noflush;
-#endif
   outstream->public.nput  = 0;
   outstream->fd           = fd;
 }
diff --git a/libc/stdio/lib_rdflush.c b/libc/stdio/lib_rdflush.c
index cb928fb820cbe2469faafba9e2839779c6b06f6a..f6269833a1357ac8f30a65506ec2c0b9dad140ae 100644
--- a/libc/stdio/lib_rdflush.c
+++ b/libc/stdio/lib_rdflush.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdio/lib_rdflush.c
  *
- *   Copyright (C) 2008, 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008, 2011, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -50,33 +46,7 @@
 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
 
 /****************************************************************************
  * Public Functions
@@ -91,15 +61,23 @@
  *
  ****************************************************************************/
 
-#if CONFIG_STDIO_BUFFER_SIZE > 0
 int lib_rdflush(FAR FILE *stream)
 {
-  if (!stream)
+  /* Sanity checking */
+
+  if (stream == NULL)
     {
       set_errno(EBADF);
       return ERROR;
     }
 
+  /* Do nothing if there is no I/O buffer */
+
+  if (stream->fs_bufstart == NULL)
+    {
+      return OK;
+    }
+
   /* Get exclusive access to the stream */
 
   lib_take_semaphore(stream);
@@ -140,5 +118,5 @@ int lib_rdflush(FAR FILE *stream)
   lib_give_semaphore(stream);
   return OK;
 }
-#endif /* CONFIG_STDIO_BUFFER_SIZE */
 
+#endif /* CONFIG_STDIO_DISABLE_BUFFERING */
diff --git a/libc/stdio/lib_remove.c b/libc/stdio/lib_remove.c
new file mode 100644
index 0000000000000000000000000000000000000000..3c2c8e6d3f0b34703145590a4055c3a9975dbe51
--- /dev/null
+++ b/libc/stdio/lib_remove.c
@@ -0,0 +1,89 @@
+/****************************************************************************
+ * libc/stdio/lib_remove.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Sebastien Lorquet 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: remove
+ *
+ * Description:
+ *   The remove() function causes the object denoted by path to be removed.
+ *   The function is equivalent to unlink() or rmdir().
+ *
+ * Input Parmeters:
+ *   path - A pointer to a file or directory to be removed.
+ *
+ * Returned Value:
+ *   0(OK) on success; -1(ERROR) on failure with errno set appropriately:
+ *
+ *   For returned errno values, see unlink or rmdir.
+ *
+ ****************************************************************************/
+
+int remove(FAR const char *path)
+{
+  struct stat buf;
+  int ret;
+
+  /* Check the kind of object pointed by path */
+
+  ret = stat(path, &buf);
+  if (ret != 0)
+    {
+      return ret;
+    }
+
+  /* Act according to the kind of object */
+
+  if (S_ISDIR(buf.st_mode))
+    {
+      return rmdir(path);
+    }
+  else
+    {
+      return unlink(path);
+    }
+}
diff --git a/libc/stdio/lib_setbuf.c b/libc/stdio/lib_setbuf.c
new file mode 100644
index 0000000000000000000000000000000000000000..1655747c3c863a8bda54b3145128acdc5e99e448
--- /dev/null
+++ b/libc/stdio/lib_setbuf.c
@@ -0,0 +1,87 @@
+/****************************************************************************
+ * libc/stdio/lib_setbuf.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT will THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: setbuf
+ *
+ * Description:
+ *   Except that it returns no value, the function call setbuf(stream, buf)
+ *   is equivalent to:
+ *
+ *     setvbuf(stream, buf, _IOFBF, BUFSIZ)
+ *
+ *   if buf is not a null pointer, or to:
+ *
+ *     setvbuf(stream, buf, _IONBF, BUFSIZ)
+ *
+ *   if buf is a null pointer.
+ *
+ * Input Parameters:
+ *   stream - The stream whose buffer will be modified
+ *   buffer - If non-NULL, this is user allocated buffer of size BUFSIZ. If
+ *            NULL, setvbuf will disable buffering
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void setbuf(FAR FILE *stream, FAR char *buf)
+{
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
+  int mode;
+
+  DEBUGASSERT(stream != NULL);
+
+  mode = (buf != NULL) ? _IOFBF : _IONBF;
+  (void)setvbuf(stream, buf, mode, BUFSIZ);
+
+#else
+  DEBUGASSERT(stream != NULL);
+#endif
+}
diff --git a/libc/stdio/lib_setvbuf.c b/libc/stdio/lib_setvbuf.c
new file mode 100644
index 0000000000000000000000000000000000000000..102ffd1a63af8813011032db3a5d5205ebe3cdcc
--- /dev/null
+++ b/libc/stdio/lib_setvbuf.c
@@ -0,0 +1,278 @@
+/****************************************************************************
+ * libc/stdio/lib_setvbuf.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Alan Carvalho de Assis 
+ *           Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT will THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "libc.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: setvbuf
+ *
+ * Description:
+ *   The setvbuf() function may be used after the stream pointed to by
+ *   stream is associated with an open file but before any other operation
+ *   (other than an unsuccessful call to setvbuf()) is performed on the
+ *   stream. The argument type determines how stream will be buffered, as
+ *   follows:
+ *
+ *   _IOFBF - Will cause input/output to be fully buffered.
+ *   _IOLBF - Will cause input/output to be line buffered.
+ *   _IONBF - Will cause input/output to be unbuffered.
+ *
+ * If buf is not a null pointer, the array it points to may be used instead
+ * of a buffer allocated by setvbuf() and the argument size specifies the size
+ * of the array; otherwise, size may determine the size of a buffer allocated
+ * by the setvbuf() function. The contents of the array at any time are
+ * unspecified.
+ *
+ * Input Parameters:
+ *   stream - the stream to flush
+ *   buffer - the user allocate buffer. If NULL, will allocates a buffer of
+ *            specified size
+ *   mode   - specifies a mode for file buffering
+ *   size   - size of buffer
+ *
+ * Returned Value:
+ *   Upon successful completion, setvbuf() will return 0. Otherwise, it will
+ *   return a non-zero value if an invalid value is given for type or if the
+ *   request cannot be honored, [CX] and may set errno to indicate the error
+ *
+ ****************************************************************************/
+
+int setvbuf(FAR FILE *stream, FAR char *buffer, int mode, size_t size)
+{
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
+  FAR unsigned char *newbuf;
+  uint8_t flags;
+  int errcode;
+
+  /* Verify arguments */
+  /* Make sure that a valid mode was provided */
+
+  if (mode != _IOFBF && mode != _IOLBF && mode != _IONBF)
+    {
+      errcode = EINVAL;
+      goto errout;
+    }
+
+  /* If a buffer pointer is provided, then it must have a non-zero size */
+
+  if (buffer != NULL && size == 0)
+    {
+      errcode = EINVAL;
+      goto errout;
+    }
+
+  /* My assumption is that if size is zero for modes {_IOFBF, _IOLBF} the
+   * caller is only attempting to change the buffering mode.  In this case,
+   * the existing buffer should be re-used (if there is one).  If there is no
+   * existing buffer, then I suppose we should allocate one of the default
+   * size?
+   */
+
+  if ((mode == _IOFBF || mode == _IOLBF) && size == 0 &&
+      stream->fs_bufstart == NULL)
+    {
+      size = BUFSIZ;
+    }
+
+  /* A non-zero size (or a non-NULL buffer) with mode = _IONBF makes no
+   * sense but is, apparently, permissible. We simply force the buffer to
+   * NULL and size to zero in this case without complaining.
+   */
+
+  else if (mode == _IONBF)
+    {
+      buffer = NULL;
+      size   = 0;
+    }
+
+  /* Make sure that we have exclusive access to the stream */
+
+  lib_take_semaphore(stream);
+
+  /* setvbuf() may only be called AFTER the file has been opened and BEFORE
+   * any operations have been performed on the string.
+   */
+
+  /* Return EBADF if the file is not open */
+
+  if (stream->fs_fd < 0)
+    {
+      errcode = EBADF;
+      goto errout_with_semaphore;
+    }
+
+  /* Return EBUSY if operations have already been performed on the buffer.
+   * Here we really only verify that there is no valid data in the existing
+   * buffer.
+   *
+   * REVIST:  There could be race conditions here, could there not?
+   */
+
+  if (stream->fs_bufpos != stream->fs_bufstart)
+    {
+      errcode = EBUSY;
+      goto errout_with_semaphore;
+    }
+
+  /* Initialize by clearing related flags.  We try to avoid any permanent
+   * changes to the stream structure until we know that we will be
+   * successful.
+   */
+
+  flags = stream->fs_flags & ~(__FS_FLAG_LBF | __FS_FLAG_UBF);
+
+  /* Allocate a new buffer if one is needed or reuse the existing buffer it
+   * is appropriate to do so.
+   */
+
+  switch (mode)
+    {
+      case _IOLBF:
+        flags |= __FS_FLAG_LBF;
+
+        /* Fall through */
+
+      case _IOFBF:
+        /* Use the existing buffer if size == 0 */
+
+        if (size > 0)
+          {
+            /* A new buffer is needed.  Did the caller provide the buffer
+             * memory?
+             */
+
+            if (buffer != NULL)
+              {
+                newbuf = (FAR unsigned char *)buffer;
+
+                /* Indicate that we have an I/O buffer managed by the caller of
+                 * setvbuf.
+                 */
+
+                flags |= __FS_FLAG_UBF;
+              }
+            else
+              {
+                newbuf = (FAR unsigned char *)lib_malloc(size);
+                if (newbuf == NULL)
+                  {
+                    errcode = ENOMEM;
+                    goto errout_with_semaphore;
+                  }
+              }
+          }
+        else
+          {
+            /* Re-use the existing buffer and retain some existing flags.
+             * This supports changing the buffering mode without changing
+             * the buffer.
+             */
+
+            DEBUGASSERT(stream->fs_bufstart != NULL);
+            flags |= stream->fs_flags & __FS_FLAG_UBF;
+            goto reuse_buffer;
+          }
+
+        break;
+
+      case _IONBF:
+        /* No buffer needed... We must be performing unbuffered I/O */
+
+        newbuf = NULL;
+        break;
+
+      default:
+        PANIC();
+    }
+
+   /* Do not release the previous buffer if it was allocated by the user
+    * on a previous call to setvbuf().
+    */
+
+   if (stream->fs_bufstart != NULL &&
+       (stream->fs_flags & __FS_FLAG_UBF) == 0)
+    {
+      lib_free(stream->fs_bufstart);
+    }
+
+  /* Set the new buffer information */
+
+  stream->fs_bufstart = newbuf;
+  stream->fs_bufpos   = newbuf;
+  stream->fs_bufread  = newbuf;
+  stream->fs_bufend   = newbuf + size;
+
+  /* Update the stream flags and return success */
+
+reuse_buffer:
+
+  stream->fs_flags    = flags;
+  lib_give_semaphore(stream);
+  return OK;
+
+errout_with_semaphore:
+  lib_give_semaphore(stream);
+
+errout:
+  set_errno(errcode);
+  return ERROR;
+
+#else
+  /* Return that setvbuf() is not supported */
+
+  set_errno(ENOSYS);
+  return ERROR;
+#endif
+}
diff --git a/libc/stdio/lib_snprintf.c b/libc/stdio/lib_snprintf.c
index a7bf89cebeb6b0d87f198726931ad41cf5e29951..7c0a1ab9563b4f18208501a97043aa102925e2cf 100644
--- a/libc/stdio/lib_snprintf.c
+++ b/libc/stdio/lib_snprintf.c
@@ -44,34 +44,6 @@
 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libc/stdio/lib_sprintf.c b/libc/stdio/lib_sprintf.c
index 8f75192896ccf61fa1030e71a5765b76b35a261d..392e2a02dd7a50df7c5b4566059e4497158de012 100644
--- a/libc/stdio/lib_sprintf.c
+++ b/libc/stdio/lib_sprintf.c
@@ -40,34 +40,6 @@
 #include 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libc/stdio/lib_sscanf.c b/libc/stdio/lib_sscanf.c
index c54fb3f1458a4ffb0868a5f8fed17742c3c9b21c..b5fd60f4de8458f839a4be5b41e08fe4af8940c1 100644
--- a/libc/stdio/lib_sscanf.c
+++ b/libc/stdio/lib_sscanf.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdio/lib_sscanf.c
  *
- *   Copyright (C) 2007, 2008, 2011-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2008, 2011-2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -64,14 +64,6 @@
 #  define MAX(a,b) (((a) > (b)) ? (a) : (b))
 #endif
 
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
 /****************************************************************************
  * Public Function Prototypes
  ****************************************************************************/
@@ -79,15 +71,7 @@
 int vsscanf(FAR const char *buf, FAR const char *fmt, va_list ap);
 
 /****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
+ * Private Data
  ****************************************************************************/
 
 static const char spaces[] = " \t\n\r\f\v";
@@ -106,6 +90,7 @@ static const char spaces[] = " \t\n\r\f\v";
 
 static int findwidth(FAR const char *buf, FAR const char *fmt)
 {
+#if 0 /* Behavior no longer supported */
   FAR const char *next = fmt + 1;
 
   /* No... is there a space after the format? Or does the format string end
@@ -130,7 +115,7 @@ static int findwidth(FAR const char *buf, FAR const char *fmt)
        */
 
       FAR const char *ptr = strchr(buf, *next);
-      if (ptr)
+      if (ptr != NULL)
         {
           return (int)(ptr - buf);
         }
@@ -146,12 +131,167 @@ static int findwidth(FAR const char *buf, FAR const char *fmt)
    * determining the width of the data if there is no fieldwidth, no space
    * separating the input, and no usable delimiter character.
    */
+#endif
+
+  /* Use the input up until the first white space is encountered. */
 
   return strcspn(buf, spaces);
 }
 
 /****************************************************************************
- * Private Data
+ * Function:  findscanset
+ *
+ * Description:
+ *    Fill in the given table from the scanset at the given format.
+ *    Return a pointer to the character the closing ']'.
+ *    The table has a 1 wherever characters should be considered part of the
+ *    scanset.
+ *
+ *    Function findscanset based on source function __sccl of FreeBSD
+ *   (https://github.com/lattera/freebsd/blob/master/sys/kern/subr_scanf.c)
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_LIBC_SCANSET
+static FAR const char *findscanset(FAR const char *fmt,
+                                   FAR unsigned char set[32])
+{
+  int c;
+  int n;
+  int v;
+  int i;
+
+  fmt++;           /* Skip '[' */
+
+  /* First `clear' the whole table */
+
+  c = *fmt++;      /* First char hat => negated scanset */
+  if (c == '^')
+    {
+      v = 1;       /* Default => accept */
+      c = *fmt++;  /* Get new first char */
+    }
+  else
+    {
+      v = 0;       /* Default => reject */
+    }
+
+  memset(set, 0, 32);
+  if (c == 0)
+    {
+      goto doexit;
+    }
+
+  /* Now set the entries corresponding to the actual scanset
+   * to the opposite of the above.
+   *
+   * The first character may be ']' (or '-') without being special;
+   * the last character may be '-'.
+   */
+
+  for (;;)
+    {
+      set[c / 8] |= (1 << (c % 8));  /* Take character c */
+
+doswitch:
+      n = *fmt++;    /* Examine the next */
+      switch (n)
+        {
+        case 0:      /* Format ended too soon */
+        case ']':    /* End of scanset */
+          goto doexit;
+
+        case '-':
+          /* A scanset of the form
+           *
+           *  [01+-]
+           *
+           * is defined as "the digit 0, the digit 1, the character +, the
+           * character -", but the effect of a scanset such as
+           *
+           *  [a-zA-Z0-9]
+           *
+           * is implementation defined.  The V7 Unix scanf treats "a-z" as
+           * "the letters a through z", but treats "a-a" as "the letter a,
+           * the character -, and the letter a".
+           *
+           * For compatibility, the `-' is not considerd to define a range
+           * if the character following it is either a close bracket
+           * (required by ANSI) or is not numerically greater than the
+           * character* we just stored in the table (c).
+           */
+
+          n = *fmt;
+          if (n == ']' || n < c)
+            {
+              c = '-';
+              break;  /* Resume the for(;;) */
+            }
+
+          fmt++;
+          do
+            {
+              /* Fill in the range */
+
+              c++;
+              set[c / 8] |= (1 << (c % 8));  /* Take character c */
+            }
+          while (c < n);
+
+          /* Alas, the V7 Unix scanf also treats formats such as [a-c-e] as
+           * "the letters a through e".  This too is permitted by the
+           * standard.
+           */
+
+          goto doswitch;
+
+        default:    /* Just another character */
+          c = n;
+          break;
+        }
+    }
+
+doexit:
+  if (v) /* Default => accept */
+    {
+      for (i = 0; i < 32; i++) /* Invert all */
+        {
+          set[i] ^= 0xFF;
+        }
+    }
+
+  return (fmt - 1);
+}
+#endif
+
+/****************************************************************************
+ * Function:  scansetwidth
+ ****************************************************************************/
+
+#ifdef CONFIG_LIBC_SCANSET
+static int scansetwidth(FAR const char *buf,
+                        FAR const unsigned char set[32])
+{
+  FAR const char *next = buf;
+  int c;
+
+  while (*next)
+    {
+      c = *next;
+      if ((set[c / 8] & (1 << (c % 8))) == 0)
+        {
+          break;
+        }
+
+      next++;
+    }
+
+  return (next - buf);
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
  ****************************************************************************/
 
 /****************************************************************************
@@ -190,10 +330,14 @@ int vsscanf(FAR const char *buf, FAR const char *fmt, va_list ap)
   bool            noassign;
   int             count;
   int             width;
+  int             fwidth;
   int             base = 10;
   char            tmp[MAXLN];
+#ifdef CONFIG_LIBC_SCANSET
+  unsigned char   set[32]; /* Bit field (256 / 8) */
+#endif
 
-  lvdbg("vsscanf: buf=\"%s\" fmt=\"%s\"\n", buf, fmt);
+  linfo("vsscanf: buf=\"%s\" fmt=\"%s\"\n", buf, fmt);
 
   /* Remember the start of the input buffer.  We will need this for %n
    * calculations.
@@ -226,16 +370,20 @@ int vsscanf(FAR const char *buf, FAR const char *fmt, va_list ap)
 
       if (*fmt == '%')
         {
-          lvdbg("vsscanf: Specifier found\n");
+          linfo("vsscanf: Specifier found\n");
 
           /* Check for qualifiers on the conversion specifier */
 
           fmt++;
           for (; *fmt; fmt++)
             {
-              lvdbg("vsscanf: Processing %c\n", *fmt);
+              linfo("vsscanf: Processing %c\n", *fmt);
 
+#ifdef CONFIG_LIBC_SCANSET
+              if (strchr("dibouxcsefgn[%", *fmt))
+#else
               if (strchr("dibouxcsefgn%", *fmt))
+#endif
                 {
                   break;
                 }
@@ -264,7 +412,7 @@ int vsscanf(FAR const char *buf, FAR const char *fmt, va_list ap)
 
           if (*fmt == 's')
             {
-              lvdbg("vsscanf: Performing string conversion\n");
+              linfo("vsscanf: Performing string conversion\n");
 
               /* Get a pointer to the char * value.  We need to do this even
                * if we have reached the end of the input data in order to
@@ -291,16 +439,87 @@ int vsscanf(FAR const char *buf, FAR const char *fmt, va_list ap)
                       buf++;
                     }
 
-                  /* Was a fieldwidth specified? */
+                  /* Guess a field width using some heuristics */
 
-                  if (!width)
+                  fwidth = findwidth(buf, fmt);
+
+                  /* Use the actual field's width if 1) no fieldwidth
+                   * specified or 2) the actual field's width is smaller
+                   * than fieldwidth specified
+                   */
+
+                  if (!width || fwidth < width)
                     {
-                      /* No... Guess a field width using some heuristics */
+                      width  = fwidth;
+                    }
 
-                      int tmpwidth = findwidth(buf, fmt);
-                      width = MIN(sizeof(tmp) - 1, tmpwidth);
+                  width = MIN(sizeof(tmp) - 1, width);
+
+                  /* Copy the string (if we are making an assignment) */
+
+                  if (!noassign)
+                    {
+                      strncpy(tv, buf, width);
+                      tv[width] = '\0';
+                      count++;
+                    }
+
+                  /* Update the buffer pointer past the string in the input */
+
+                  buf += width;
+                }
+            }
+
+#ifdef CONFIG_LIBC_SCANSET
+          /* Process %[:  Scanset conversion */
+
+          if (*fmt == '[')
+            {
+              linfo("vsscanf: Performing scanset conversion\n");
+
+              fmt = findscanset(fmt, set); /* find scanset */
+
+              /* Get a pointer to the char * value.  We need to do this even
+               * if we have reached the end of the input data in order to
+               * update the 'ap' variable.
+               */
+
+              tv = NULL;      /* To avoid warnings about begin uninitialized */
+              if (!noassign)
+                {
+                  tv    = va_arg(ap, FAR char *);
+                  tv[0] = '\0';
+                }
+
+              /* But we only perform the data conversion is we still have
+               * bytes remaining in the input data stream.
+               */
+
+              if (*buf)
+                {
+                  /* Skip over white space */
+
+                  while (isspace(*buf))
+                    {
+                      buf++;
+                    }
+
+                  /* Guess a field width using some heuristics */
+
+                  fwidth = scansetwidth(buf, set);
+
+                  /* Use the actual field's width if 1) no fieldwidth
+                   * specified or 2) the actual field's width is smaller
+                   * than fieldwidth specified
+                   */
+
+                  if (!width || fwidth < width)
+                    {
+                      width  = fwidth;
                     }
 
+                  width = MIN(sizeof(tmp) - 1, width);
+
                   /* Copy the string (if we are making an assignment) */
 
                   if (!noassign)
@@ -315,12 +534,13 @@ int vsscanf(FAR const char *buf, FAR const char *fmt, va_list ap)
                   buf += width;
                 }
             }
+#endif
 
           /* Process %c:  Character conversion */
 
           else if (*fmt == 'c')
             {
-              lvdbg("vsscanf: Performing character conversion\n");
+              linfo("vsscanf: Performing character conversion\n");
 
               /* Get a pointer to the char * value.  We need to do this even
                * if we have reached the end of the input data in order to
@@ -374,7 +594,7 @@ int vsscanf(FAR const char *buf, FAR const char *fmt, va_list ap)
               FAR int  *pint  = NULL;
               bool sign;
 
-              lvdbg("vsscanf: Performing integer conversion\n");
+              linfo("vsscanf: Performing integer conversion\n");
 
               /* Get a pointer to the integer value.  We need to do this even
                * if we have reached the end of the input data in order to
@@ -461,7 +681,7 @@ int vsscanf(FAR const char *buf, FAR const char *fmt, va_list ap)
                   strncpy(tmp, buf, width);
                   tmp[width] = '\0';
 
-                  lvdbg("vsscanf: tmp[]=\"%s\"\n", tmp);
+                  linfo("vsscanf: tmp[]=\"%s\"\n", tmp);
 
                   /* Perform the integer conversion */
                   /* Preserve the errno value */
@@ -497,13 +717,13 @@ int vsscanf(FAR const char *buf, FAR const char *fmt, va_list ap)
 
                       if (lflag)
                         {
-                          lvdbg("vsscanf: Return %ld to 0x%p\n",
+                          linfo("vsscanf: Return %ld to 0x%p\n",
                                 tmplong, plong);
                           *plong = tmplong;
                         }
                       else
                         {
-                          lvdbg("vsscanf: Return %ld to 0x%p\n",
+                          linfo("vsscanf: Return %ld to 0x%p\n",
                                 tmplong, pint);
                           *pint = (int)tmplong;
                         }
@@ -520,11 +740,11 @@ int vsscanf(FAR const char *buf, FAR const char *fmt, va_list ap)
           else if (strchr("aAfFeEgG", *fmt) != NULL)
             {
 #ifdef CONFIG_HAVE_DOUBLE
-              FAR double_t *pd = NULL;
+              FAR double *pd = NULL;
 #endif
-              FAR float    *pf = NULL;
+              FAR float  *pf = NULL;
 
-              lvdbg("vsscanf: Performing floating point conversion\n");
+              linfo("vsscanf: Performing floating point conversion\n");
 
               /* Get a pointer to the double value.  We need to do this even
                * if we have reached the end of the input data in order to
@@ -540,7 +760,7 @@ int vsscanf(FAR const char *buf, FAR const char *fmt, va_list ap)
 #ifdef CONFIG_HAVE_DOUBLE
                   if (lflag)
                     {
-                      pd  = va_arg(ap, FAR double_t *);
+                      pd  = va_arg(ap, FAR double *);
                       *pd = 0.0;
                     }
                   else
@@ -580,7 +800,7 @@ int vsscanf(FAR const char *buf, FAR const char *fmt, va_list ap)
                   tmp[width] = '\0';
                   buf += width;
 
-                  lvdbg("vsscanf: tmp[]=\"%s\"\n", tmp);
+                  linfo("vsscanf: tmp[]=\"%s\"\n", tmp);
 
                   /* Perform the floating point conversion */
 
@@ -590,22 +810,11 @@ int vsscanf(FAR const char *buf, FAR const char *fmt, va_list ap)
 
                       FAR char *endptr;
                       int       errsave;
-                      double_t  dvalue;
 
                       /* Preserve the errno value */
 
                       errsave = get_errno();
                       set_errno(0);
-                      dvalue  = strtod(tmp, &endptr);
-
-                      /* Check if the number was successfully converted */
-
-                      if (tmp == endptr || get_errno() == ERANGE)
-                        {
-                          return count;
-                        }
-
-                      set_errno(errsave);
 
                       /* We have to check whether we need to return a float
                        * or a double.
@@ -614,14 +823,44 @@ int vsscanf(FAR const char *buf, FAR const char *fmt, va_list ap)
 #ifdef CONFIG_HAVE_DOUBLE
                       if (lflag)
                         {
-                          lvdbg("vsscanf: Return %f to %p\n", dvalue, pd);
+                          /* Get the converted double value */
+
+                          double dvalue = strtod(tmp, &endptr);
+
+                          /* Check if the number was successfully converted */
+
+                          if (tmp == endptr || get_errno() == ERANGE)
+                            {
+                              return count;
+                            }
+
+                          set_errno(errsave);
+
+                          /* Return the double value */
+
+                          linfo("vsscanf: Return %f to %p\n", dvalue, pd);
                           *pd = dvalue;
                         }
                       else
 #endif
                         {
-                          lvdbg("vsscanf: Return %f to %p\n", dvalue, pf);
-                          *pf = (float)dvalue;
+                          /* Get the converted float value */
+
+                          float fvalue = strtof(tmp, &endptr);
+
+                          /* Check if the number was successfully converted */
+
+                          if (tmp == endptr || get_errno() == ERANGE)
+                            {
+                              return count;
+                            }
+
+                          set_errno(errsave);
+
+                          /* Return the float value */
+
+                          linfo("vsscanf: Return %f to %p\n", (double)fvalue, pf);
+                          *pf = fvalue;
                         }
 
                       count++;
@@ -634,7 +873,7 @@ int vsscanf(FAR const char *buf, FAR const char *fmt, va_list ap)
 
           else if (*fmt == 'n')
             {
-              lvdbg("vsscanf: Performing character count\n");
+              linfo("vsscanf: Performing character count\n");
 
               if (!noassign)
                 {
diff --git a/libc/stdio/lib_stdoutstream.c b/libc/stdio/lib_stdoutstream.c
index b30e8151608b225b10a61614e96eae474e62b9ee..4c77c745fcc81883e7ef47b585818436604f558e 100644
--- a/libc/stdio/lib_stdoutstream.c
+++ b/libc/stdio/lib_stdoutstream.c
@@ -82,10 +82,12 @@ static void stdoutstream_putc(FAR struct lib_outstream_s *this, int ch)
  * Name: stdoutstream_flush
  ****************************************************************************/
 
-#if defined(CONFIG_STDIO_LINEBUFFER) && CONFIG_STDIO_BUFFER_SIZE > 0
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
 static int stdoutstream_flush(FAR struct lib_outstream_s *this)
 {
   FAR struct lib_stdoutstream_s *sthis = (FAR struct lib_stdoutstream_s *)this;
+
+  DEBUGASSERT(sthis != NULL && sthis->stream != NULL);
   return lib_fflush(sthis->stream, true);
 }
 #endif
@@ -125,9 +127,8 @@ void lib_stdoutstream(FAR struct lib_stdoutstream_s *outstream,
    * meaning.
    */
 
-#ifdef CONFIG_STDIO_LINEBUFFER
-#if CONFIG_STDIO_BUFFER_SIZE > 0
-  if ((stream->fs_oflags & O_BINARY) == 0)
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
+  if (stream->fs_bufstart != NULL && (stream->fs_oflags & O_BINARY) == 0)
     {
       outstream->public.flush = stdoutstream_flush;
     }
@@ -136,7 +137,6 @@ void lib_stdoutstream(FAR struct lib_stdoutstream_s *outstream,
     {
       outstream->public.flush = lib_noflush;
     }
-#endif
 
   /* Set the number of bytes put to zero and remember the stream */
 
diff --git a/libc/stdio/lib_stdsostream.c b/libc/stdio/lib_stdsostream.c
index 4e196b1a22bb0638f2265c4b2431377969a28342..8654b635620b7d133ac58b33b5bb48621d3a8e50 100644
--- a/libc/stdio/lib_stdsostream.c
+++ b/libc/stdio/lib_stdsostream.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdio/lib_stdsostream.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -82,10 +82,12 @@ static void stdsostream_putc(FAR struct lib_sostream_s *this, int ch)
  * Name: stdsostream_flush
  ****************************************************************************/
 
-#if defined(CONFIG_STDIO_LINEBUFFER) && CONFIG_STDIO_BUFFER_SIZE > 0
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
 static int stdsostream_flush(FAR struct lib_sostream_s *this)
 {
   FAR struct lib_stdsostream_s *sthis = (FAR struct lib_stdsostream_s *)this;
+
+  DEBUGASSERT(sthis != NULL && sthis->stream != NULL);
   return lib_fflush(sthis->stream, true);
 }
 #endif
@@ -97,10 +99,10 @@ static int stdsostream_flush(FAR struct lib_sostream_s *this)
 static off_t stdsostream_seek(FAR struct lib_sostream_s *this, off_t offset,
                               int whence)
 {
-  FAR struct lib_stdsostream_s *mthis = (FAR struct lib_stdsostream_s *)this;
+  FAR struct lib_stdsostream_s *sthis = (FAR struct lib_stdsostream_s *)this;
 
-  DEBUGASSERT(this);
-  return fseek(mthis->stream, offset, whence);
+  DEBUGASSERT(sthis != NULL && sthis->stream != NULL);
+  return fseek(sthis->stream, offset, whence);
 }
 
 /****************************************************************************
@@ -138,9 +140,8 @@ void lib_stdsostream(FAR struct lib_stdsostream_s *outstream,
    * meaning.
    */
 
-#ifdef CONFIG_STDIO_LINEBUFFER
-#if CONFIG_STDIO_BUFFER_SIZE > 0
-  if ((stream->fs_oflags & O_BINARY) == 0)
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
+  if (stream->fs_bufstart != NULL && (stream->fs_oflags & O_BINARY) == 0)
     {
       outstream->public.flush = stdsostream_flush;
     }
@@ -149,7 +150,6 @@ void lib_stdsostream(FAR struct lib_stdsostream_s *outstream,
     {
       outstream->public.flush = lib_snoflush;
     }
-#endif
 
   /* Select the seek operation */
 
diff --git a/libc/stdio/lib_ungetc.c b/libc/stdio/lib_ungetc.c
index 89220751b39d39036e398b8528a9b1cc13b84f12..f88a60f118c3ac1b9950ab381f52912cfcb8efb5 100644
--- a/libc/stdio/lib_ungetc.c
+++ b/libc/stdio/lib_ungetc.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -48,38 +44,6 @@
 #include 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libc/stdio/lib_vasprintf.c b/libc/stdio/lib_vasprintf.c
index 7338d03f594838e3770da62507e4f3a57db60b33..7541128a7f836076fcc4fbed89ff38a55eb026b8 100644
--- a/libc/stdio/lib_vasprintf.c
+++ b/libc/stdio/lib_vasprintf.c
@@ -66,30 +66,6 @@
 #  undef ap2
 #endif
 
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libc/stdio/lib_vfprintf.c b/libc/stdio/lib_vfprintf.c
index b77b1cb6af16db64c51e5a219a95a0d343836d91..32b4d3ebf7f3922b9a23b1f86c10a0a3df3d11b4 100644
--- a/libc/stdio/lib_vfprintf.c
+++ b/libc/stdio/lib_vfprintf.c
@@ -44,34 +44,6 @@
 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libc/stdio/lib_vprintf.c b/libc/stdio/lib_vprintf.c
index 5f7a0844539102140e4a36ea587534160cad4d5a..3015ac405e3bc7706f4a961d690baadb2c54b819 100644
--- a/libc/stdio/lib_vprintf.c
+++ b/libc/stdio/lib_vprintf.c
@@ -33,48 +33,12 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
 
 #include 
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libc/stdio/lib_vsnprintf.c b/libc/stdio/lib_vsnprintf.c
index ddbb1ef9ef92c73361cf565968d0a3f7c147e3e3..d25fc0d2d534479a312ed8a1baa9863e86f3b18c 100644
--- a/libc/stdio/lib_vsnprintf.c
+++ b/libc/stdio/lib_vsnprintf.c
@@ -44,34 +44,6 @@
 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libc/stdio/lib_vsprintf.c b/libc/stdio/lib_vsprintf.c
index a64fef6e7363f5b57c53308fd45e8ce25b6ff15b..0fdcf8621e69d4f67b42325e157e66f3d4baea8e 100644
--- a/libc/stdio/lib_vsprintf.c
+++ b/libc/stdio/lib_vsprintf.c
@@ -43,34 +43,6 @@
 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libc/stdio/lib_wrflush.c b/libc/stdio/lib_wrflush.c
index b07c48b2904e43e3acbd37d2970c265295060054..f9e02ddc33027bd885bfb9763498ca625f1e8098 100644
--- a/libc/stdio/lib_wrflush.c
+++ b/libc/stdio/lib_wrflush.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdio/lib_wrflush.c
  *
- *   Copyright (C) 2008-2009, 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2011-2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -45,34 +45,6 @@
 
 #include "libc.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -88,16 +60,23 @@
 
 int lib_wrflush(FAR FILE *stream)
 {
-#if CONFIG_STDIO_BUFFER_SIZE > 0
+#ifndef CONFIG_STDIO_DISABLE_BUFFERING
   /* Verify that we were passed a valid (i.e., non-NULL) stream */
 
-#ifdef CONFIG_DEBUG
-  if (!stream)
+#ifdef CONFIG_DEBUG_FEATURES
+  if (stream == NULL)
     {
       return -EINVAL;
     }
 #endif
 
+  /* Do nothing if there is no I/O buffer */
+
+  if (stream->fs_bufstart == NULL)
+    {
+      return OK;
+    }
+
   /* Verify that the stream is opened for writing... lib_fflush will
    * return an error if it is called for a stream that is not opened for
    * writing.  Check that first so that this function will not fail in
@@ -119,10 +98,11 @@ int lib_wrflush(FAR FILE *stream)
    */
 
   return lib_fflush(stream, true);
+
 #else
   /* Verify that we were passed a valid (i.e., non-NULL) stream */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!stream)
     {
       return -EINVAL;
diff --git a/libc/stdlib/Kconfig b/libc/stdlib/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..2df878e44e75993709d3ea493644a7384a54d980
--- /dev/null
+++ b/libc/stdlib/Kconfig
@@ -0,0 +1,44 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+menu "stdlib Options"
+
+config LIB_RAND_ORDER
+	int "Order of the random number generate"
+	default 1
+	range 1 3
+	---help---
+		The order of the random number generator. 1=fast but very bad random
+		numbers, 3=slow but very good random numbers.
+
+config LIB_HOMEDIR
+	string "Home directory"
+	default "/"
+	depends on !DISABLE_ENVIRON
+	---help---
+		The home directory to use with operations like such as 'cd ~'
+
+config LIBC_TMPDIR
+	string "Temporary file directory"
+	default "/tmp"
+	depends on FS_WRITABLE
+		---help---
+		If a write-able file system is selected, this string will be
+		provided to specify the full path to a directory where temporary
+		files can be created.  This would be a good application of RAM disk:
+		To provide temporary storage for application data.
+
+config LIBC_MAX_TMPFILE
+	int "Maximum size of a temporary file path"
+	default 32
+	depends on FS_WRITABLE
+		---help---
+		If a write-able file system is selected, then temporary file may be
+		supported at the path provided by LIBC_TMPDIR.  The tmpnam() interface
+		keeps a static copy of this last filename produced; this value is the
+		maximum size of that last filename.  This size is the size of the full
+		file path.
+
+endmenu # stdlib Options
diff --git a/libc/stdlib/Make.defs b/libc/stdlib/Make.defs
index 68eb75e68b4e83726706255c4889a2c738fbd1a6..3b66369fd76adf4682ef2017a27055d951720841 100644
--- a/libc/stdlib/Make.defs
+++ b/libc/stdlib/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # libc/stdlib/Make.defs
 #
-#   Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -36,15 +36,27 @@
 # Add the stdlib C files to the build
 
 CSRCS += lib_abs.c lib_abort.c lib_div.c lib_ldiv.c lib_lldiv.c
-CSRCS += lib_imaxabs.c lib_itoa.c lib_labs.c lib_llabs.c
-CSRCS += lib_bsearch.c lib_rand.c lib_qsort.c
+CSRCS += lib_itoa.c lib_labs.c lib_llabs.c
+CSRCS += lib_bsearch.c lib_rand.c lib_qsort.c lib_srand.c
 CSRCS += lib_strtol.c lib_strtoll.c lib_strtoul.c lib_strtoull.c
-CSRCS += lib_strtod.c lib_checkbase.c
+CSRCS += lib_strtod.c lib_strtof.c lib_strtold.c lib_checkbase.c
 
 ifeq ($(CONFIG_FS_WRITABLE),y)
 CSRCS += lib_mktemp.c lib_mkstemp.c
 endif
 
+ifeq ($(CONFIG_LIBC_WCHAR),y)
+CSRCS += lib_mbtowc.c lib_wctomb.c
+endif
+
+ifeq ($(CONFIG_PSEUDOTERM_SUSV1),y)
+CSRCS += lib_ptsname.c lib_ptsnamer.c
+endif
+
+ifeq ($(CONFIG_PSEUDOTERM),y)
+CSRCS += lib_unlockpt.c
+endif
+
 # Add the stdlib directory to the build
 
 DEPPATH += --dep-path stdlib
diff --git a/libc/stdlib/lib_checkbase.c b/libc/stdlib/lib_checkbase.c
index 05abe7b8968bbb6fdfd46dc1786bf73005ee8378..a94140e81ec02dbc762694f63eae9dd94e6abb7a 100644
--- a/libc/stdlib/lib_checkbase.c
+++ b/libc/stdlib/lib_checkbase.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdlib/lib_checkbase.c
  *
- *   Copyright (C) 2007, 2009, 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2009, 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -44,10 +44,6 @@
 
 #include "libc.h"
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -63,11 +59,16 @@
  * Assumptions:
  *   *ptr points to the first, non-whitespace character in the string.
  *
+ * Returns:
+ *   - if base is valid, the actual base to use, and pptr is updated to point
+ *     at the first digit.
+ *   - if base is invalid (<2 or >36), return -1.
+ *
  ****************************************************************************/
 
 int lib_checkbase(int base, FAR const char **pptr)
 {
-   const char *ptr = *pptr;
+  FAR const char *ptr = *pptr;
 
   /* Check for unspecified base */
 
@@ -107,9 +108,15 @@ int lib_checkbase(int base, FAR const char **pptr)
         }
     }
 
+  /* Check for incorrect bases. */
+
+  else if (base < 2 || base > 26)
+    {
+      return -1; /* Means incorrect base */
+    }
+
   /* Return the updated pointer and base */
 
   *pptr = ptr;
   return base;
 }
-
diff --git a/libc/stdlib/lib_mbtowc.c b/libc/stdlib/lib_mbtowc.c
new file mode 100644
index 0000000000000000000000000000000000000000..03b2b93d4eb1ceebe67849bc825b454b11801103
--- /dev/null
+++ b/libc/stdlib/lib_mbtowc.c
@@ -0,0 +1,72 @@
+/****************************************************************************
+ * libc/stdlib/lib_mbtowc.c
+ *
+ *   Copyright (c)1999 Citrus Project,
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: mbtowc.c
+ *
+ * Description:
+ *   Minimal multibyte to wide char converter
+ *
+ ****************************************************************************/
+
+int mbtowc(FAR wchar_t * pwc, FAR const char *s, size_t n)
+{
+  if (s == NULL)
+    {
+      return 0;
+    }
+
+  if (n == 0)
+    {
+      return -1;
+    }
+
+  if (pwc)
+    {
+      *pwc = (wchar_t) * s;
+    }
+
+  return (*s != '\0');
+}
+#endif
diff --git a/libc/stdlib/lib_ptsname.c b/libc/stdlib/lib_ptsname.c
new file mode 100644
index 0000000000000000000000000000000000000000..54cdabd69ef7313a9d6aed949f0fbe6b01784dd7
--- /dev/null
+++ b/libc/stdlib/lib_ptsname.c
@@ -0,0 +1,73 @@
+/****************************************************************************
+ * libc/stdlib/lib_ptsname.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#ifdef CONFIG_PSEUDOTERM_SUSV1
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: ptsname
+ *
+ * Description:
+ *   The ptsname() function returns the name of the slave pseudoterminal
+ *   device corresponding to the master referred to by fd.
+ *
+ * Returned Values:
+ *   On success, ptsname() returns a pointer to a string in static storage
+ *   which will be overwritten by subsequent calls.  This pointer must not
+ *   be freed.  On failure, NULL is returned.
+ *
+ *     ENOTTY fd does not refer to a pseudoterminal master device.
+ *
+ ****************************************************************************/
+
+FAR char *ptsname(int fd)
+{
+  static char devname[16];
+  int ret = ptsname_r(fd, devname, 16);
+  return ret < 0 ? NULL : devname;
+}
+
+#endif /* CONFIG_PSEUDOTERM_SUSV1 */
diff --git a/libc/stdlib/lib_ptsnamer.c b/libc/stdlib/lib_ptsnamer.c
new file mode 100644
index 0000000000000000000000000000000000000000..e5df9c0ec7eb1b35808de0f5273107529d4914da
--- /dev/null
+++ b/libc/stdlib/lib_ptsnamer.c
@@ -0,0 +1,95 @@
+/****************************************************************************
+ * libc/stdlib/lib_ptsnamer.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_PSEUDOTERM_SUSV1
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: ptsname_r
+ *
+ * Description:
+ *   The ptsname_r() function is the reentrant equivalent of ptsname().
+ *   It returns the name of the slave pseudoterminal device as a null-
+ *   terminated string in the buffer pointed to by buf.  The buflen
+ *   argument specifies the number of bytes available in buf.
+ *
+ * Returned Values:
+ *   On success, ptsname_r() returns 0.  On failure, a nonzero value is
+ *   returned and errno is set to indicate the error.
+ *
+ *     EINVAL (ptsname_r() only) buf is NULL.
+ *     ENOTTY fd does not refer to a pseudoterminal master device.
+ *     ERANGE (ptsname_r() only) buf is too small.
+ *
+ ****************************************************************************/
+
+int ptsname_r(int fd, FAR char *buf, size_t buflen)
+{
+  int ptyno;
+  int ret;
+
+  DEBUGASSERT(buf != NULL);
+
+  /* Get the slave PTY number */
+
+  ret = ioctl(fd, TIOCGPTN, (unsigned long)((uintptr_t)&ptyno));
+  if (ret < 0)
+    {
+      return ret;
+    }
+
+  /* Create the device name.  This current does not handler EINVAL or ERANGE
+   * error detection.
+   */
+
+  snprintf(buf, buflen, "/dev/pts/%d", ptyno);
+  return OK;
+}
+
+#endif /* CONFIG_PSEUDOTERM_SUSV1 */
diff --git a/libc/stdlib/lib_rand.c b/libc/stdlib/lib_rand.c
index 453a4537a0fe95ec37022e23adf642176a5dd3ba..8de8c763d04ddfd0c2a8d38e4d881747e0e63a03 100644
--- a/libc/stdlib/lib_rand.c
+++ b/libc/stdlib/lib_rand.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libc/stdlib/lib_rand.c
  *
- *   Copyright (C) 2007, 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -37,241 +37,27 @@
  * Included Files
  ****************************************************************************/
 
+#include 
+
 #include 
 #include 
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-/* First, second, and thired order congruential generators are supported */
-
-#ifndef CONFIG_LIB_RAND_ORDER
-#  define CONFIG_LIB_RAND_ORDER 1
-#endif
-
-#if CONFIG_LIB_RAND_ORDER > 3
-#  undef CONFIG_LIB_RAND_ORDER
-#  define CONFIG_LIB_RAND_ORDER 3
-#endif
-
-/* Values needed by the random number generator */
-
-#define RND1_CONSTK  470001
-#define RND1_CONSTP  999563
-#define RND2_CONSTK1 366528
-#define RND2_CONSTK2 508531
-#define RND2_CONSTP  998917
-#define RND3_CONSTK1 360137
-#define RND3_CONSTK2 519815
-#define RND3_CONSTK3 616087
-#define RND3_CONSTP  997783
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-static unsigned int nrand(unsigned int nLimit);
-
-/* First order congruential generators */
-
-static inline unsigned long fgenerate1(void);
-#if (CONFIG_LIB_RAND_ORDER == 1)
-static double_t frand1(void);
-#endif
-
-/* Second order congruential generators */
-
-#if (CONFIG_LIB_RAND_ORDER > 1)
-static inline unsigned long fgenerate2(void);
-#if (CONFIG_LIB_RAND_ORDER == 2)
-static double_t frand2(void);
-#endif
-
-/* Third order congruential generators */
-
-#if (CONFIG_LIB_RAND_ORDER > 2)
-static inline unsigned long fgenerate3(void);
-static double_t frand3(void);
-#endif
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-static unsigned long g_randint1;
-#if (CONFIG_LIB_RAND_ORDER > 1)
-static unsigned long g_randint2;
-#if (CONFIG_LIB_RAND_ORDER > 2)
-static unsigned long g_randint3;
-#endif
-#endif
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
-static unsigned int nrand(unsigned int nLimit)
-{
-  unsigned long result;
-  double_t ratio;
-
-  /* Loop to be sure a legal random number is generated */
-
-  do
-    {
-      /* Get a random integer in the requested range */
-
-#if (CONFIG_LIB_RAND_ORDER == 1)
-      ratio = frand1();
-#elif (CONFIG_LIB_RAND_ORDER == 2)
-      ratio = frand2();
-#else /* if (CONFIG_LIB_RAND_ORDER > 2) */
-      ratio = frand3();
-#endif
-
-      /* Then, produce the return-able value */
-
-      result = (unsigned long)(((double_t)nLimit) * ratio);
-    }
-  while (result >= (unsigned long)nLimit);
-
-  return (unsigned int)result;
-}
-
-/* First order congruential generators */
-
-static inline unsigned long fgenerate1(void)
-{
-  unsigned long randint;
-
-  /* First order congruential generator.  One may be added to the result of the
-   * generated value to avoid the value zero.  This would be fatal for the
-   * first order random number generator.
-   */
-
-  randint    = (RND1_CONSTK * g_randint1) % RND1_CONSTP;
-  g_randint1 = (randint == 0 ? 1 : randint);
-  return randint;
-}
-
-#if (CONFIG_LIB_RAND_ORDER == 1)
-static double_t frand1(void)
-{
-  /* First order congruential generator. */
-
-  unsigned long randint = fgenerate1();
-
-  /* Construct an floating point value in the range from 0.0 up to 1.0 */
-
-  return ((double_t)randint) / ((double_t)RND1_CONSTP);
-}
-#endif
-
-/* Second order congruential generators */
-
-#if (CONFIG_LIB_RAND_ORDER > 1)
-static inline unsigned long fgenerate2(void)
-{
-  unsigned long randint;
-
-  /* Second order congruential generator. */
-
-  randint    = (RND2_CONSTK1 * g_randint1 +
-                RND2_CONSTK2 * g_randint2) % RND2_CONSTP;
-
-  g_randint2 = g_randint1;
-  g_randint1 = randint;
-
-  /* We cannot permit both values to become zero.  That would be fatal for the
-   * second order random number generator.
-   */
-
-  if (g_randint2 == 0 && g_randint1 == 0)
-    {
-      g_randint2 = 1;
-    }
-
-  return randint;
-}
-
-#if (CONFIG_LIB_RAND_ORDER == 2)
-static double_t frand2(void)
-{
-  /* Second order congruential generator */
-
-  unsigned long randint = fgenerate2();
-
-  /* Construct an floating point value in the range from 0.0 up to 1.0 */
-
-  return ((double_t)randint) / ((double_t)RND2_CONSTP);
-}
-#endif
-
-/* Third order congruential generators */
-
-#if (CONFIG_LIB_RAND_ORDER > 2)
-static inline unsigned long fgenerate3(void)
-{
-  unsigned long randint;
-
-  /* Third order congruential generator. */
-
-  randint    = (RND3_CONSTK1 * g_randint1 +
-                RND3_CONSTK2 * g_randint2 +
-                RND3_CONSTK2 * g_randint3) % RND3_CONSTP;
-
-  g_randint3 = g_randint2;
-  g_randint2 = g_randint1;
-  g_randint1 = randint;
-
-  /* We cannot permit all three values to become zero.  That would be fatal for the
-   * third order random number generator.
-   */
-
-  if (g_randint3 == 0 && g_randint2 == 0 && g_randint1 == 0)
-    {
-      g_randint3 = 1;
-    }
-
-  return randint;
-}
-
-static double_t frand3(void)
-{
-  /* Third order congruential generator */
-
-  unsigned long randint = fgenerate3();
-
-  /* Construct an floating point value in the range from 0.0 up to 1.0 */
-
-  return ((double_t)randint) / ((double_t)RND3_CONSTP);
-}
-#endif
-#endif
+#include 
 
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Function:  srand, rand
+ * Name:  rand
+ *
+ * Description:
+ *   Generate a non-negative, integer random number in the range of 0 through
+ *   (RAND_MAX - 1)
+ *
  ****************************************************************************/
 
-void srand(unsigned int seed)
-{
-  g_randint1 = seed;
-#if (CONFIG_LIB_RAND_ORDER > 1)
-  g_randint2 = seed;
-  (void)fgenerate1();
-#if (CONFIG_LIB_RAND_ORDER > 2)
-  g_randint3 = seed;
-  (void)fgenerate2();
-#endif
-#endif
-}
-
 int rand(void)
 {
-  return (int)nrand(32768);
+  return (int)nrand(32768L);
 }
diff --git a/libc/stdlib/lib_srand.c b/libc/stdlib/lib_srand.c
new file mode 100644
index 0000000000000000000000000000000000000000..a1c87f0d43654a0da66ecd48d5916051af4d36d5
--- /dev/null
+++ b/libc/stdlib/lib_srand.c
@@ -0,0 +1,291 @@
+/****************************************************************************
+ * libc/stdlib/lib_srand.c
+ *
+ *   Copyright (C) 2007, 2011, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* First, second, and thired order congruential generators are supported */
+
+#ifndef CONFIG_LIB_RAND_ORDER
+#  define CONFIG_LIB_RAND_ORDER 1
+#endif
+
+#if CONFIG_LIB_RAND_ORDER > 3
+#  undef CONFIG_LIB_RAND_ORDER
+#  define CONFIG_LIB_RAND_ORDER 3
+#endif
+
+/* Values needed by the random number generator */
+
+#define RND1_CONSTK  470001
+#define RND1_CONSTP  999563
+#define RND2_CONSTK1 366528
+#define RND2_CONSTK2 508531
+#define RND2_CONSTP  998917
+#define RND3_CONSTK1 360137
+#define RND3_CONSTK2 519815
+#define RND3_CONSTK3 616087
+#define RND3_CONSTP  997783
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* First order congruential generators */
+
+static inline unsigned long fgenerate1(void);
+#if (CONFIG_LIB_RAND_ORDER == 1)
+static double_t frand1(void);
+#endif
+
+/* Second order congruential generators */
+
+#if (CONFIG_LIB_RAND_ORDER > 1)
+static inline unsigned long fgenerate2(void);
+#if (CONFIG_LIB_RAND_ORDER == 2)
+static double_t frand2(void);
+#endif
+
+/* Third order congruential generators */
+
+#if (CONFIG_LIB_RAND_ORDER > 2)
+static inline unsigned long fgenerate3(void);
+static double_t frand3(void);
+#endif
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static unsigned long g_randint1;
+#if (CONFIG_LIB_RAND_ORDER > 1)
+static unsigned long g_randint2;
+#if (CONFIG_LIB_RAND_ORDER > 2)
+static unsigned long g_randint3;
+#endif
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/* First order congruential generators */
+
+static inline unsigned long fgenerate1(void)
+{
+  unsigned long randint;
+
+  /* First order congruential generator.  One may be added to the result of the
+   * generated value to avoid the value zero.  This would be fatal for the
+   * first order random number generator.
+   */
+
+  randint    = (RND1_CONSTK * g_randint1) % RND1_CONSTP;
+  g_randint1 = (randint == 0 ? 1 : randint);
+  return randint;
+}
+
+#if (CONFIG_LIB_RAND_ORDER == 1)
+static double_t frand1(void)
+{
+  /* First order congruential generator. */
+
+  unsigned long randint = fgenerate1();
+
+  /* Construct an floating point value in the range from 0.0 up to 1.0 */
+
+  return ((double_t)randint) / ((double_t)RND1_CONSTP);
+}
+#endif
+
+/* Second order congruential generators */
+
+#if (CONFIG_LIB_RAND_ORDER > 1)
+static inline unsigned long fgenerate2(void)
+{
+  unsigned long randint;
+
+  /* Second order congruential generator. */
+
+  randint    = (RND2_CONSTK1 * g_randint1 +
+                RND2_CONSTK2 * g_randint2) % RND2_CONSTP;
+
+  g_randint2 = g_randint1;
+  g_randint1 = randint;
+
+  /* We cannot permit both values to become zero.  That would be fatal for the
+   * second order random number generator.
+   */
+
+  if (g_randint2 == 0 && g_randint1 == 0)
+    {
+      g_randint2 = 1;
+    }
+
+  return randint;
+}
+
+#if (CONFIG_LIB_RAND_ORDER == 2)
+static double_t frand2(void)
+{
+  /* Second order congruential generator */
+
+  unsigned long randint = fgenerate2();
+
+  /* Construct an floating point value in the range from 0.0 up to 1.0 */
+
+  return ((double_t)randint) / ((double_t)RND2_CONSTP);
+}
+#endif
+
+/* Third order congruential generators */
+
+#if (CONFIG_LIB_RAND_ORDER > 2)
+static inline unsigned long fgenerate3(void)
+{
+  unsigned long randint;
+
+  /* Third order congruential generator. */
+
+  randint    = (RND3_CONSTK1 * g_randint1 +
+                RND3_CONSTK2 * g_randint2 +
+                RND3_CONSTK2 * g_randint3) % RND3_CONSTP;
+
+  g_randint3 = g_randint2;
+  g_randint2 = g_randint1;
+  g_randint1 = randint;
+
+  /* We cannot permit all three values to become zero.  That would be fatal for the
+   * third order random number generator.
+   */
+
+  if (g_randint3 == 0 && g_randint2 == 0 && g_randint1 == 0)
+    {
+      g_randint3 = 1;
+    }
+
+  return randint;
+}
+
+static double_t frand3(void)
+{
+  /* Third order congruential generator */
+
+  unsigned long randint = fgenerate3();
+
+  /* Construct an floating point value in the range from 0.0 up to 1.0 */
+
+  return ((double_t)randint) / ((double_t)RND3_CONSTP);
+}
+#endif
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: srand
+ *
+ * Description:
+ *   Seed the congruential random number generator.
+ *
+ ****************************************************************************/
+
+void srand(unsigned int seed)
+{
+  g_randint1 = seed;
+#if (CONFIG_LIB_RAND_ORDER > 1)
+  g_randint2 = seed;
+  (void)fgenerate1();
+#if (CONFIG_LIB_RAND_ORDER > 2)
+  g_randint3 = seed;
+  (void)fgenerate2();
+#endif
+#endif
+}
+
+/****************************************************************************
+ * Name: nrand
+ *
+ * Description:
+ *   Return a random, unsigned long value in the range of 0 to (limit - 1)
+ *
+ ****************************************************************************/
+
+unsigned long nrand(unsigned long limit)
+{
+  unsigned long result;
+  double_t ratio;
+
+  /* Loop to be sure a legal random number is generated */
+
+  do
+    {
+      /* Get a random integer in the range 0.0 - 1.0 */
+
+#if (CONFIG_LIB_RAND_ORDER == 1)
+      ratio = frand1();
+#elif (CONFIG_LIB_RAND_ORDER == 2)
+      ratio = frand2();
+#else /* if (CONFIG_LIB_RAND_ORDER > 2) */
+      ratio = frand3();
+#endif
+
+      /* Then, produce the return-able value in the requested range */
+
+      result = (unsigned long)(((double_t)limit) * ratio);
+
+      /* Loop because there is a (unlikely) possibility that round could but
+       * the result at the limit value.
+       */
+    }
+  while (result >= limit);
+
+  return result;
+}
diff --git a/libc/stdlib/lib_strtod.c b/libc/stdlib/lib_strtod.c
index 9b7462368bff7b09f5c0d81de814537da3452a85..62da9e0f6e2358966132e5fc545b2e38be6d66dc 100644
--- a/libc/stdlib/lib_strtod.c
+++ b/libc/stdlib/lib_strtod.c
@@ -71,7 +71,7 @@
 
 static inline int is_real(double x)
 {
-  const double_t infinite = 1.0/0.0;
+  const double infinite = 1.0/0.0;
   return (x < infinite) && (x >= -infinite);
 }
 
@@ -87,17 +87,17 @@ static inline int is_real(double x)
  *
  ****************************************************************************/
 
-double_t strtod(FAR const char *str, FAR char **endptr)
+double strtod(FAR const char *str, FAR char **endptr)
 {
-  double_t number;
+  double number;
   int exponent;
   int negative;
-  char *p = (char *) str;
+  FAR char *p = (FAR char *) str;
   double p10;
   int n;
   int num_digits;
   int num_decimals;
-  const double_t infinite = 1.0/0.0;
+  const double infinite = 1.0/0.0;
 
   /* Skip leading whitespace */
 
@@ -115,6 +115,8 @@ double_t strtod(FAR const char *str, FAR char **endptr)
       negative = 1; /* Fall through to increment position */
     case '+':
       p++;
+    default:
+      break;
     }
 
   number       = 0.;
@@ -138,12 +140,12 @@ double_t strtod(FAR const char *str, FAR char **endptr)
       p++;
 
       while (isdigit(*p))
-      {
-        number = number * 10. + (*p - '0');
-        p++;
-        num_digits++;
-        num_decimals++;
-      }
+        {
+          number = number * 10. + (*p - '0');
+          p++;
+          num_digits++;
+          num_decimals++;
+        }
 
       exponent -= num_decimals;
     }
@@ -151,7 +153,8 @@ double_t strtod(FAR const char *str, FAR char **endptr)
   if (num_digits == 0)
     {
       set_errno(ERANGE);
-      return 0.0;
+      number = 0.0;
+      goto errout;
     }
 
   /* Correct for sign */
@@ -174,6 +177,8 @@ double_t strtod(FAR const char *str, FAR char **endptr)
           negative = 1;   /* Fall through to increment pos */
         case '+':
           p++;
+        default:
+          break;
         }
 
       /* Process string of digits */
@@ -199,14 +204,19 @@ double_t strtod(FAR const char *str, FAR char **endptr)
       exponent > __DBL_MAX_EXP__)
     {
       set_errno(ERANGE);
-      return infinite;
+      number = infinite;
+      goto errout;
     }
 
   /* Scale the result */
 
   p10 = 10.;
   n = exponent;
-  if (n < 0) n = -n;
+  if (n < 0)
+    {
+      n = -n;
+    }
+
   while (n)
     {
       if (n & 1)
@@ -220,6 +230,7 @@ double_t strtod(FAR const char *str, FAR char **endptr)
               number *= p10;
             }
         }
+
       n >>= 1;
       p10 *= p10;
     }
@@ -229,6 +240,7 @@ double_t strtod(FAR const char *str, FAR char **endptr)
       set_errno(ERANGE);
     }
 
+errout:
   if (endptr)
     {
       *endptr = p;
diff --git a/libc/stdlib/lib_strtof.c b/libc/stdlib/lib_strtof.c
new file mode 100644
index 0000000000000000000000000000000000000000..467842f4e608d8e59a448170eb9b28a89f42cc29
--- /dev/null
+++ b/libc/stdlib/lib_strtof.c
@@ -0,0 +1,252 @@
+/****************************************************************************
+ * libc/stdlib/lib_strtof.c
+ * Convert string to float
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *
+ * A pretty straight forward conversion fo strtod():
+ *
+ *   Copyright (C) 2002 Michael Ringgaard. All rights reserved.
+ *   Copyright (C) 2006-2007 H. Peter Anvin.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor definitions
+ ****************************************************************************/
+
+/* These are predefined with GCC, but could be issues for other compilers. If
+ * not defined, an arbitrary big number is put in for now.  These should be
+ * added to nuttx/compiler for your compiler.
+ */
+
+#if !defined(__FLT_MIN_EXP__) || !defined(__FLT_MAX_EXP__)
+#  ifdef CONFIG_CPP_HAVE_WARNING
+#    warning "Size of exponent is unknown"
+#  endif
+#  undef  __FLT_MIN_EXP__
+#  define __FLT_MIN_EXP__ (-125)
+#  undef  __FLT_MAX_EXP__
+#  define __FLT_MAX_EXP__ (128)
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+static inline int is_real(float x)
+{
+  const float infinite = 1.0F/0.0F;
+  return (x < infinite) && (x >= -infinite);
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/***************************************************(************************
+ * Name: strtof
+ *
+ * Description:
+ *   Convert a string to a float value
+ *
+ ****************************************************************************/
+
+float strtof(FAR const char *str, FAR char **endptr)
+{
+  float number;
+  int exponent;
+  int negative;
+  FAR char *p = (FAR char *) str;
+  float p10;
+  int n;
+  int num_digits;
+  int num_decimals;
+  const float infinite = 1.0F/0.0F;
+
+  /* Skip leading whitespace */
+
+  while (isspace(*p))
+    {
+      p++;
+    }
+
+  /* Handle optional sign */
+
+  negative = 0;
+  switch (*p)
+    {
+    case '-':
+      negative = 1; /* Fall through to increment position */
+    case '+':
+      p++;
+    default:
+      break;
+    }
+
+  number       = 0.0F;
+  exponent     = 0;
+  num_digits   = 0;
+  num_decimals = 0;
+
+  /* Process string of digits */
+
+  while (isdigit(*p))
+    {
+      number = number * 10.0F + (float)(*p - '0');
+      p++;
+      num_digits++;
+    }
+
+  /* Process decimal part */
+
+  if (*p == '.')
+    {
+      p++;
+
+      while (isdigit(*p))
+        {
+          number = number * 10.0F + (float)(*p - '0');
+          p++;
+          num_digits++;
+          num_decimals++;
+        }
+
+      exponent -= num_decimals;
+    }
+
+  if (num_digits == 0)
+    {
+      set_errno(ERANGE);
+      number = 0.0F;
+      goto errout;
+    }
+
+  /* Correct for sign */
+
+  if (negative)
+    {
+      number = -number;
+    }
+
+  /* Process an exponent string */
+
+  if (*p == 'e' || *p == 'E')
+    {
+      /* Handle optional sign */
+
+      negative = 0;
+      switch (*++p)
+        {
+        case '-':
+          negative = 1;   /* Fall through to increment pos */
+        case '+':
+          p++;
+        default:
+          break;
+        }
+
+      /* Process string of digits */
+
+      n = 0;
+      while (isdigit(*p))
+        {
+          n = n * 10 + (*p - '0');
+          p++;
+        }
+
+      if (negative)
+        {
+          exponent -= n;
+        }
+      else
+        {
+          exponent += n;
+        }
+    }
+
+  if (exponent < __FLT_MIN_EXP__ ||
+      exponent > __FLT_MAX_EXP__)
+    {
+      set_errno(ERANGE);
+      number = infinite;
+      goto errout;
+    }
+
+  /* Scale the result */
+
+  p10 = 10.0F;
+  n = exponent;
+  if (n < 0)
+    {
+      n = -n;
+    }
+
+  while (n)
+    {
+      if (n & 1)
+        {
+          if (exponent < 0)
+            {
+              number /= p10;
+            }
+          else
+            {
+              number *= p10;
+            }
+        }
+
+      n >>= 1;
+      p10 *= p10;
+    }
+
+  if (!is_real(number))
+    {
+      set_errno(ERANGE);
+    }
+
+errout:
+  if (endptr)
+    {
+      *endptr = p;
+    }
+
+  return number;
+}
diff --git a/libc/stdlib/lib_strtol.c b/libc/stdlib/lib_strtol.c
index 8c7f639901c47eb0c460c28f2ac6286174cb022f..2c6c6a24dec02c1a46ce3aadbccf2960efffd86a 100644
--- a/libc/stdlib/lib_strtol.c
+++ b/libc/stdlib/lib_strtol.c
@@ -41,6 +41,7 @@
 
 #include 
 #include 
+#include 
 
 #include "libc.h"
 
@@ -60,7 +61,13 @@
  *   nptr to a long integer value according to the given base, which must be
  *   between 2 and 36 inclusive, or be the special value 0.
  *
- * Warning: does not check for integer overflow!
+ * Returns:
+ *   - The converted value, if the base and number are valid
+ *   - 0 if an error occurs, and set errno to:
+ *     * EINVAL if base < 2 or base > 36
+ *   - LONG_MIN or LONG_MAX, of correct sign, if an overflow occurs,
+ *     and set errno to:
+ *     * ERANGE if the number cannot be represented using long
  *
  ****************************************************************************/
 
@@ -91,11 +98,25 @@ long strtol(FAR const char *nptr, FAR char **endptr, int base)
 
       accum = strtoul(nptr, endptr, base);
 
-      /* Correct the sign of the result */
+      /* Correct the sign of the result and check for overflow */
 
       if (negate)
         {
-          return -(long)accum;
+          const unsigned long limit = ((unsigned long)-(LONG_MIN + 1)) + 1;
+
+          if (accum > limit)
+            {
+              set_errno(ERANGE);
+              return LONG_MIN;
+            }
+
+          return (accum == limit) ? LONG_MIN : -(long)accum;
+        }
+
+      if (accum > LONG_MAX)
+        {
+          set_errno(ERANGE);
+          return LONG_MAX;
         }
     }
 
diff --git a/libc/stdlib/lib_strtold.c b/libc/stdlib/lib_strtold.c
new file mode 100644
index 0000000000000000000000000000000000000000..c306392cec943942e58a6559c2f0fa6eacea3102
--- /dev/null
+++ b/libc/stdlib/lib_strtold.c
@@ -0,0 +1,252 @@
+/****************************************************************************
+ * libc/stdlib/lib_strtod.c
+ * Convert string to long double
+ *
+ *   Copyright (C) 2002 Michael Ringgaard. All rights reserved.
+ *   Copyright (C) 2006-2007 H. Peter Anvin.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_HAVE_LONG_DOUBLE
+
+/****************************************************************************
+ * Pre-processor definitions
+ ****************************************************************************/
+
+/* These are predefined with GCC, but could be issues for other compilers. If
+ * not defined, an arbitrary big number is put in for now.  These should be
+ * added to nuttx/compiler for your compiler.
+ */
+
+#if !defined(__LDBL_MIN_EXP__) || !defined(__LDBL_MAX_EXP__)
+#  ifdef CONFIG_CPP_HAVE_WARNING
+#    warning "Size of exponent is unknown"
+#  endif
+#  undef  __LDBL_MIN_EXP__
+#  define __LDBL_MIN_EXP__ (-1021)
+#  undef  __LDBL_MAX_EXP__
+#  define __LDBL_MAX_EXP__ (1024)
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+static inline int is_real(long double x)
+{
+  const long double infinite = 1.0L/0.0L;
+  return (x < infinite) && (x >= -infinite);
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/***************************************************(************************
+ * Name: strtold
+ *
+ * Description:
+ *   Convert a string to a long double value
+ *
+ ****************************************************************************/
+
+long double strtold(FAR const char *str, FAR char **endptr)
+{
+  long double number;
+  int exponent;
+  int negative;
+  FAR char *p = (FAR char *) str;
+  long double p10;
+  int n;
+  int num_digits;
+  int num_decimals;
+  const long double infinite = 1.0L/0.0L;
+
+  /* Skip leading whitespace */
+
+  while (isspace(*p))
+    {
+      p++;
+    }
+
+  /* Handle optional sign */
+
+  negative = 0;
+  switch (*p)
+    {
+    case '-':
+      negative = 1; /* Fall through to increment position */
+    case '+':
+      p++;
+    default:
+      break;
+    }
+
+  number       = 0.0L;
+  exponent     = 0;
+  num_digits   = 0;
+  num_decimals = 0;
+
+  /* Process string of digits */
+
+  while (isdigit(*p))
+    {
+      number = number * 10.0L + (long double)(*p - '0');
+      p++;
+      num_digits++;
+    }
+
+  /* Process decimal part */
+
+  if (*p == '.')
+    {
+      p++;
+
+      while (isdigit(*p))
+        {
+          number = number * 10.0L + (long double)(*p - '0');
+          p++;
+          num_digits++;
+          num_decimals++;
+        }
+
+      exponent -= num_decimals;
+    }
+
+  if (num_digits == 0)
+    {
+      set_errno(ERANGE);
+      number = 0.0L;
+      goto errout;
+    }
+
+  /* Correct for sign */
+
+  if (negative)
+    {
+      number = -number;
+    }
+
+  /* Process an exponent string */
+
+  if (*p == 'e' || *p == 'E')
+    {
+      /* Handle optional sign */
+
+      negative = 0;
+      switch (*++p)
+        {
+        case '-':
+          negative = 1;   /* Fall through to increment pos */
+        case '+':
+          p++;
+        default:
+          break;
+        }
+
+      /* Process string of digits */
+
+      n = 0;
+      while (isdigit(*p))
+        {
+          n = n * 10 + (*p - '0');
+          p++;
+        }
+
+      if (negative)
+        {
+          exponent -= n;
+        }
+      else
+        {
+          exponent += n;
+        }
+    }
+
+  if (exponent < __LDBL_MIN_EXP__ ||
+      exponent > __LDBL_MAX_EXP__)
+    {
+      set_errno(ERANGE);
+      number = infinite;
+      goto errout;
+    }
+
+  /* Scale the result */
+
+  p10 = 10.0L;
+  n = exponent;
+  if (n < 0)
+    {
+      n = -n;
+    }
+
+  while (n)
+    {
+      if (n & 1)
+        {
+          if (exponent < 0)
+            {
+              number /= p10;
+            }
+          else
+            {
+              number *= p10;
+            }
+        }
+
+      n >>= 1;
+      p10 *= p10;
+    }
+
+  if (!is_real(number))
+    {
+      set_errno(ERANGE);
+    }
+
+errout:
+  if (endptr)
+    {
+      *endptr = p;
+    }
+
+  return number;
+}
+
+#endif /* CONFIG_HAVE_LONG_DOUBLE */
diff --git a/libc/stdlib/lib_strtoll.c b/libc/stdlib/lib_strtoll.c
index bc8cc2eb6f484652a8e445639521ae26373bee55..a5f8b2cdc3bee01b1182bb711b70a55c20ea42d5 100644
--- a/libc/stdlib/lib_strtoll.c
+++ b/libc/stdlib/lib_strtoll.c
@@ -41,6 +41,7 @@
 
 #include 
 #include 
+#include 
 
 #include "libc.h"
 
@@ -58,11 +59,17 @@
  * Name: strtoll
  *
  * Description:
- *   The  strtol() function  converts  the initial part of the string in
+ *   The strtoll() function  converts  the initial part of the string in
  *   nptr to a long long integer value according to the given base, which
  *   must be between 2 and 36 inclusive, or be the special value 0.
  *
- * Warning: does not check for integer overflow!
+ * Returns:
+ *   - The converted value, if the base and number are valid
+ *   - 0 if an error occurs, and set errno to:
+ *     * EINVAL if base < 2 or base > 36
+ *   - LLONG_MIN or LLONG_MAX, of correct sign, if an overflow occurs,
+ *     and set errno to:
+ *     * ERANGE if the number cannot be represented using long long
  *
  ****************************************************************************/
 
@@ -93,11 +100,25 @@ long long strtoll(FAR const char *nptr, FAR char **endptr, int base)
 
       accum = strtoull(nptr, endptr, base);
 
-      /* Correct the sign of the result */
+      /* Correct the sign of the result and check for overflow */
 
       if (negate)
         {
-          return -(long long)accum;
+          const unsigned long long limit = ((unsigned long long)-(LLONG_MIN + 1)) + 1;
+
+          if (accum > limit)
+            {
+              set_errno(ERANGE);
+              return LLONG_MIN;
+            }
+
+          return (accum == limit) ? LLONG_MIN : -(long long)accum;
+        }
+
+      if (accum > LLONG_MAX)
+        {
+          set_errno(ERANGE);
+          return LLONG_MAX;
         }
     }
 
diff --git a/libc/stdlib/lib_strtoul.c b/libc/stdlib/lib_strtoul.c
index 3dfe5a5e60b0acb20ee41ea476a82937003caaa2..1dec49e1462a05ec4e2dce977148d668ccc6af6d 100644
--- a/libc/stdlib/lib_strtoul.c
+++ b/libc/stdlib/lib_strtoul.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * /libc/stdlib/lib_strtoul.c
  *
- *   Copyright (C) 2007, 2009, 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2009, 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,13 +40,10 @@
 #include 
 
 #include 
+#include 
 
 #include "libc.h"
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -55,17 +52,23 @@
  * Name: strtoul
  *
  * Description:
- *   The  strtol() function  converts  the initial part of the string in
+ *   The strtoul() function  converts  the initial part of the string in
  *   nptr to a long unsigned integer value according to the given base, which
  *   must be between 2 and 36 inclusive, or be the special value 0.
  *
- * Warning: does not check for integer overflow!
+ * Returns:
+ *   - The converted value, if the base and number are valid
+ *   - 0 if an error occurs, and set errno to:
+ *     * EINVAL if base < 2 or base > 36
+ *   - ULONG_MAX if an overflow occurs, and set errno to:
+ *     * ERANGE if the number cannot be represented using unsigned long
  *
  ****************************************************************************/
 
 unsigned long strtoul(FAR const char *nptr, FAR char **endptr, int base)
 {
   unsigned long accum = 0;
+  unsigned long prev;
   int value;
 
   if (nptr)
@@ -74,16 +77,32 @@ unsigned long strtoul(FAR const char *nptr, FAR char **endptr, int base)
 
       lib_skipspace(&nptr);
 
-      /* Check for unspecified base */
+      /* Check for unspecified or incorrect base */
 
       base = lib_checkbase(base, &nptr);
 
+      if (base < 0)
+        {
+          set_errno(EINVAL);
+          return 0;
+        }
+
       /* Accumulate each "digit" */
 
       while (lib_isbasedigit(*nptr, base, &value))
         {
-            accum = accum*base + value;
-            nptr++;
+          prev  = accum;
+          accum = accum*base + value;
+          nptr++;
+
+          /* Check for overflow */
+
+          if (accum < prev)
+            {
+              set_errno(ERANGE);
+              accum = ULONG_MAX;
+              break;
+            }
         }
 
       /* Return the final pointer to the unused value */
diff --git a/libc/stdlib/lib_strtoull.c b/libc/stdlib/lib_strtoull.c
index 82adc0450ac2ad7fb0d0f3f508aeb65dbb9752df..fe13b63249b84d340393d833e6114e55ba4817a2 100644
--- a/libc/stdlib/lib_strtoull.c
+++ b/libc/stdlib/lib_strtoull.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * /libc/stdlib/lib_strtoull.c
  *
- *   Copyright (C) 2009, 2010 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2010, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -41,15 +41,12 @@
 #include 
 
 #include 
+#include 
 
 #include "libc.h"
 
 #ifdef CONFIG_HAVE_LONG_LONG
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -58,15 +55,23 @@
  * Name: strtoull
  *
  * Description:
- *   The  strtol() function  converts  the initial part of the string in
+ *   The strtoull() function  converts  the initial part of the string in
  *   nptr to a long unsigned integer value according to the given base, which
  *   must be between 2 and 36 inclusive, or be the special value 0.
  *
+ * Returns:
+ *   - The converted value, if the base and number are valid
+ *   - 0 if an error occurs, and set errno to:
+ *     * EINVAL if base < 2 or base > 36
+ *   - ULLONG_MAX if an overflow occurs, and set errno to:
+ *     * ERANGE if the number cannot be represented using unsigned long long
+ *
  ****************************************************************************/
 
 unsigned long long strtoull(FAR const char *nptr, FAR char **endptr, int base)
 {
   unsigned long long accum = 0;
+  unsigned long long prev;
   int value;
 
   if (nptr)
@@ -79,12 +84,28 @@ unsigned long long strtoull(FAR const char *nptr, FAR char **endptr, int base)
 
       base = lib_checkbase(base, &nptr);
 
+      if (base < 0)
+        {
+          set_errno(EINVAL);
+          return 0;
+        }
+
       /* Accumulate each "digit" */
 
       while (lib_isbasedigit(*nptr, base, &value))
         {
-            accum = accum*base + value;
-            nptr++;
+          prev  = accum;
+          accum = accum*base + value;
+          nptr++;
+
+          /* Check for overflow */
+
+          if (accum < prev)
+            {
+              set_errno(ERANGE);
+              accum = ULLONG_MAX;
+              break;
+            }
         }
 
       /* Return the final pointer to the unused value */
@@ -94,7 +115,8 @@ unsigned long long strtoull(FAR const char *nptr, FAR char **endptr, int base)
           *endptr = (char *)nptr;
         }
     }
-   return accum;
+
+  return accum;
 }
 
 #endif
diff --git a/libc/stdlib/lib_unlockpt.c b/libc/stdlib/lib_unlockpt.c
new file mode 100644
index 0000000000000000000000000000000000000000..72e148b1bea9317bbd4667eef4dd882e6a17bbd8
--- /dev/null
+++ b/libc/stdlib/lib_unlockpt.c
@@ -0,0 +1,75 @@
+/****************************************************************************
+ * libc/stdlib/lib_unlockpt.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#ifdef CONFIG_PSEUDOTERM
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: unlockpt
+ *
+ * Description:
+ *   The unlockpt() function unlocks the slave pseudoterminal device
+ *   corresponding to the master pseudoterminal referred to by fd. 
+ *   unlockpt() must be called before opening the slave side of a
+ *   pseudoterminal. 
+ *
+ * Returned Values:
+ *   When successful, unlockpt() returns 0. Otherwise, it returns -1 and
+ *   sets errno appropriately.
+ *
+ *     EBADF - The fd argument is not a file descriptor open for writing. 
+ *     EINVAL - The fd argument is not associated with a master
+ *       pseudoterminal
+ *
+ ****************************************************************************/
+
+int unlockpt(int fd)
+{
+  return ioctl(fd, TIOCSPTLCK, 0);
+}
+
+#endif /* CONFIG_PSEUDOTERM */
diff --git a/libc/stdlib/lib_wctomb.c b/libc/stdlib/lib_wctomb.c
new file mode 100644
index 0000000000000000000000000000000000000000..cef60ad1495f96847651b2965b2d519d4fe21596
--- /dev/null
+++ b/libc/stdlib/lib_wctomb.c
@@ -0,0 +1,76 @@
+/****************************************************************************
+ * libc/stdlib/lib_wctomb.c
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: wctomb
+ *
+ * Description:
+ *   Try to represent a wide character as a multi byte
+ *
+ ****************************************************************************/
+
+int wctomb(FAR char *s, wchar_t wc)
+{
+  if (s == NULL)
+    {
+      return 0;
+    }
+
+  /* Verify that wchar is a valid single-byte character.  */
+
+  if ((size_t) wc >= 0x100)
+    {
+      errno = EILSEQ;
+      return -1;
+    }
+
+  *s = (char)wc;
+  return 1;
+}
+#endif
diff --git a/libc/string/Kconfig b/libc/string/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..2ab3f3e557087dfc03e2dbfe7148bdc1cef6faea
--- /dev/null
+++ b/libc/string/Kconfig
@@ -0,0 +1,92 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+menu "errno Decode Support"
+
+config LIBC_STRERROR
+	bool "Enable strerror"
+	default n
+	---help---
+		strerror() is useful because it decodes 'errno' values into a human readable
+		strings.  But it can also require a lot of memory.  If this option is selected,
+		strerror() will still exist in the build but it will not decode error values.
+		This option should be used by other logic to decide if it should use strerror()
+		or not.  For example, the NSH application will not use strerror() if this
+		option is not selected; perror() will not use strerror() is this option is not
+		selected (see also NSH_STRERROR).
+
+config LIBC_STRERROR_SHORT
+	bool "Use short error descriptions in strerror()"
+	default n
+	depends on LIBC_STRERROR
+	---help---
+		If this option is selected, then strerror() will use a shortened string when
+		it decodes the error.  Specifically, strerror() is simply use the string that
+		is the common name for the error.  For example, the 'errno' value of 2 will
+		produce the string "No such file or directory" is LIBC_STRERROR_SHORT
+		is not defined but the string "ENOENT" is LIBC_STRERROR_SHORT is defined.
+
+config LIBC_PERROR_STDOUT
+	bool "perror() to stdout"
+	default n
+	---help---
+		POSIX requires that perror() provide its output on stderr.  This option may
+		be defined, however, to provide perror() output that is serialized with
+		other stdout messages.
+
+endmenu # errno Decode Support
+
+menu "memcpy/memset Options"
+
+config MEMCPY_VIK
+	bool "Vik memcpy()"
+	default n
+	depends on !LIBC_ARCH_MEMCPY
+	---help---
+		Select this option to use the optimized memcpy() function by Daniel Vik.
+		Select this option for improved performance at the expense of increased
+		size. See licensing information in the top-level COPYING file.
+
+if MEMCPY_VIK
+
+config MEMCPY_PRE_INC_PTRS
+	bool "Pre-increment pointers"
+	default n
+	---help---
+		Use pre-increment of pointers. Default is post increment of pointers.
+
+config MEMCPY_INDEXED_COPY
+	bool "Array indexing"
+	default y
+	---help---
+		Copying data using array indexing. Using this option, disables the
+		MEMCPY_PRE_INC_PTRS option.
+
+config MEMCPY_64BIT
+	bool "64-bit memcpy()"
+	default n
+	---help---
+		Compiles memcpy() for architectures that suppport 64-bit operations
+		efficiently.
+
+endif # MEMCPY_VIK
+
+config MEMSET_OPTSPEED
+	bool "Optimize memset() for speed"
+	default n
+	depends on !LIBC_ARCH_MEMSET
+	---help---
+		Select this option to use a version of memcpy() optimized for speed.
+		Default: memcpy() is optimized for size.
+
+config MEMSET_64BIT
+	bool "64-bit memset()"
+	default n
+	depends on MEMSET_OPTSPEED
+	---help---
+		Compiles memset() for architectures that suppport 64-bit operations
+		efficiently.
+
+endmenu # memcpy/memset Options
diff --git a/libc/string/Make.defs b/libc/string/Make.defs
index ff0ca1f6bffa9621eb348d6a68f4e30b798c4c8c..defedcfb60a7733dc4fb45dbbef094ab2fe4f02c 100644
--- a/libc/string/Make.defs
+++ b/libc/string/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # libc/string/Make.defs
 #
-#   Copyright (C) 2011-2012, 2014 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2011-2012, 2014, 2016-2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -35,15 +35,16 @@
 
 # Add the string C files to the build
 
-CSRCS += lib_isbasedigit.c lib_memset.c lib_memchr.c lib_memccpy.c
-CSRCS += lib_memcmp.c lib_memmove.c lib_skipspace.c lib_stpcpy.c
-CSRCS += lib_strcasecmp.c lib_strcat.c lib_strchr.c lib_strcpy.c
-CSRCS += lib_strcmp.c lib_strcspn.c lib_strdup.c lib_strerror.c lib_strlen.c
-CSRCS += lib_strnlen.c lib_strncasecmp.c lib_strncat.c lib_strncmp.c
-CSRCS += lib_strncpy.c lib_strndup.c lib_strcasestr.c lib_strpbrk.c
-CSRCS += lib_strrchr.c lib_strspn.c lib_strstr.c lib_strtok.c lib_strtokr.c
+CSRCS += lib_ffs.c lib_isbasedigit.c lib_memset.c lib_memchr.c
+CSRCS += lib_memccpy.c lib_memcmp.c lib_memmove.c lib_skipspace.c
+CSRCS += lib_stpcpy.c lib_strcasecmp.c lib_strcat.c lib_strchr.c
+CSRCS += lib_strcpy.c lib_strcmp.c lib_strcspn.c lib_strdup.c
+CSRCS += lib_strerror.c lib_strlen.c lib_strnlen.c lib_strncasecmp.c
+CSRCS += lib_strncat.c lib_strncmp.c lib_strncpy.c lib_strndup.c
+CSRCS += lib_strcasestr.c lib_strpbrk.c lib_strrchr.c lib_strspn.c
+CSRCS += lib_strstr.c lib_strtok.c lib_strtokr.c lib_strerrorr.c
 
-ifneq ($(CONFIG_ARCH_MEMCPY),y)
+ifneq ($(CONFIG_LIBC_ARCH_MEMCPY),y)
 ifeq ($(CONFIG_MEMCPY_VIK),y)
 CSRCS += lib_vikmemcpy.c
 else
@@ -51,6 +52,10 @@ CSRCS += lib_memcpy.c
 endif
 endif
 
+ifeq ($(CONFIG_LIBC_LOCALE),y)
+CSRCS += lib_strcoll.c lib_strxfrm.c
+endif
+
 # Add the string directory to the build
 
 DEPPATH += --dep-path string
diff --git a/libc/string/lib_ffs.c b/libc/string/lib_ffs.c
new file mode 100644
index 0000000000000000000000000000000000000000..c52a9c43b2368f3412cf8c1468002915ebe24ec7
--- /dev/null
+++ b/libc/string/lib_ffs.c
@@ -0,0 +1,87 @@
+/****************************************************************************
+ * libc/string/lib_ffs.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define NBITS (8 * sizeof(unsigned int))
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: ffs
+ *
+ * Description:
+ *   The ffs() function will find the first bit set (beginning with the least
+ *   significant bit) in i, and return the index of that bit. Bits are
+ *   numbered starting at one (the least significant bit).
+ *
+ * Returned Value:
+ *   The ffs() function will return the index of the first bit set. If i is
+ *   0, then ffs() will return 0.
+ *
+ ****************************************************************************/
+
+int ffs(int j)
+{
+  int ret = 0;
+
+  if (j != 0)
+    {
+      unsigned int value = (unsigned int)j;
+      int bitno;
+
+      for (bitno = 1; bitno <= NBITS; bitno++, value >>= 1)
+        {
+          if ((value & 1) != 0)
+            {
+              ret = bitno;
+              break;
+            }
+        }
+    }
+
+  return ret;
+}
diff --git a/libc/string/lib_memccpy.c b/libc/string/lib_memccpy.c
index 2201870911e29e0f5abba2db410a794288b99c2a..95fe7dacbd3880bd6866b545cafbbd867ff942d1 100644
--- a/libc/string/lib_memccpy.c
+++ b/libc/string/lib_memccpy.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/libc/string/lib_memcmp.c b/libc/string/lib_memcmp.c
index a4f5004bfd6dbf054f1d69f2cf3c9638fcd8f5b7..9ae4ad1e734a0ce2c5128ca7ad082c473725cd47 100644
--- a/libc/string/lib_memcmp.c
+++ b/libc/string/lib_memcmp.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -49,7 +45,7 @@
  * Public Functions
  ****************************************************************************/
 
-#ifndef CONFIG_ARCH_MEMCMP
+#ifndef CONFIG_LIBC_ARCH_MEMCMP
 int memcmp(FAR const void *s1, FAR const void *s2, size_t n)
 {
   unsigned char *p1 = (unsigned char *)s1;
diff --git a/libc/string/lib_memcpy.c b/libc/string/lib_memcpy.c
index 6a4b2bbe34c4f47e7d4ea9447cf45dd7ecf956f3..4132b815e504f35eba639f2d5d647d4747b42865 100644
--- a/libc/string/lib_memcpy.c
+++ b/libc/string/lib_memcpy.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -53,7 +49,7 @@
  * Name: memcpy
  ****************************************************************************/
 
-#ifndef CONFIG_ARCH_MEMCPY
+#ifndef CONFIG_LIBC_ARCH_MEMCPY
 FAR void *memcpy(FAR void *dest, FAR const void *src, size_t n)
 {
   FAR unsigned char *pout = (FAR unsigned char *)dest;
diff --git a/libc/string/lib_memmove.c b/libc/string/lib_memmove.c
index fb672f54eb751fe8d9df0a432056a129a40f51b9..dcef645a60091519f260448d3744ce136f07fc82 100644
--- a/libc/string/lib_memmove.c
+++ b/libc/string/lib_memmove.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -49,7 +45,7 @@
  * Public Functions
  ****************************************************************************/
 
-#ifndef CONFIG_ARCH_MEMMOVE
+#ifndef CONFIG_LIBC_ARCH_MEMMOVE
 FAR void *memmove(FAR void *dest, FAR const void *src, size_t count)
 {
   FAR char *tmp;
diff --git a/libc/string/lib_memset.c b/libc/string/lib_memset.c
index fc2f83b30bcc273bf5a65e839d659d3dbd4e63b4..d9771f8103534524d15301c13f38242dc35b715a 100644
--- a/libc/string/lib_memset.c
+++ b/libc/string/lib_memset.c
@@ -1,4 +1,3 @@
-
 /****************************************************************************
  * libc/string/lib_memset.c
  *
@@ -63,7 +62,7 @@
  * Public Functions
  ****************************************************************************/
 
-#ifndef CONFIG_ARCH_MEMSET
+#ifndef CONFIG_LIBC_ARCH_MEMSET
 FAR void *memset(FAR void *s, int c, size_t n)
 {
 #ifdef CONFIG_MEMSET_OPTSPEED
diff --git a/libc/string/lib_strcasecmp.c b/libc/string/lib_strcasecmp.c
index 5fa3e28914973085ff78598b61b51b9eae2c20ac..1971d2839ee759ba65ee6b7d099d473cd8062b4c 100644
--- a/libc/string/lib_strcasecmp.c
+++ b/libc/string/lib_strcasecmp.c
@@ -39,7 +39,7 @@
 
 #include 
 
-#include 
+#include 
 #include 
 
 /****************************************************************************
diff --git a/libc/string/lib_strcasestr.c b/libc/string/lib_strcasestr.c
index ab8df1eede2dadadfcacbb4281422ef243ae2c8d..e7ab021ffad4ec7cf8f02bd5bbba9585bb4dfe4a 100644
--- a/libc/string/lib_strcasestr.c
+++ b/libc/string/lib_strcasestr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * libc/string/lib_strstr.c
+ * libc/string/lib_strcasestr.c
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use str source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 #include 
 
 /****************************************************************************
diff --git a/libc/string/lib_strchr.c b/libc/string/lib_strchr.c
index 371c8492b03e304295b94d77178b93b38ac0072a..2f21f237cac1dd07910308a21a73873779db189d 100644
--- a/libc/string/lib_strchr.c
+++ b/libc/string/lib_strchr.c
@@ -59,7 +59,7 @@
  *
  ****************************************************************************/
 
-#ifndef CONFIG_ARCH_STRCHR
+#ifndef CONFIG_LIBC_ARCH_STRCHR
 FAR char *strchr(FAR const char *s, int c)
 {
   if (s)
diff --git a/libc/string/lib_strcmp.c b/libc/string/lib_strcmp.c
index 9839c4ee99d108e37da36b2859dcb4150e5672a4..79bfecceaef0f4bfefb5a58e692ace9bec11779b 100644
--- a/libc/string/lib_strcmp.c
+++ b/libc/string/lib_strcmp.c
@@ -45,7 +45,7 @@
  * Public Functions
  ****************************************************************************/
 
-#ifndef CONFIG_ARCH_STRCMP
+#ifndef CONFIG_LIBC_ARCH_STRCMP
 int strcmp(FAR const char *cs, FAR const char *ct)
 {
   register signed char result;
diff --git a/libc/string/lib_strcoll.c b/libc/string/lib_strcoll.c
new file mode 100644
index 0000000000000000000000000000000000000000..25d274dc8e003e0a1d657bccca93b2f5514b0d39
--- /dev/null
+++ b/libc/string/lib_strcoll.c
@@ -0,0 +1,59 @@
+/****************************************************************************
+ * libc/string/lib_strcoll.c
+ *
+ *   Copyright (c)1999 Citrus Project,
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_LOCALE
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: strcoll
+ *
+ * Description:
+ *   The strcoll() compares the string pointed to by a to the string pointed
+ *   to by b, using an interpretation appropriate to the current
+ *   LC_COLLATE state. Current implementation doesn't care about locale.
+ *
+ ****************************************************************************/
+
+int strcoll(const char *a, const char *b)
+{
+  return strcmp(a, b);
+}
+#endif
diff --git a/libc/string/lib_strcpy.c b/libc/string/lib_strcpy.c
index f5413688f5245afe2b2c05ae272ba4b3d327e4e0..a329dc2925f82a0fa985e30a603ede8001699486 100644
--- a/libc/string/lib_strcpy.c
+++ b/libc/string/lib_strcpy.c
@@ -57,7 +57,7 @@
  *
  ****************************************************************************/
 
-#ifndef CONFIG_ARCH_STRCPY
+#ifndef CONFIG_LIBC_ARCH_STRCPY
 FAR char *strcpy(FAR char *dest, FAR const char *src)
 {
   char *tmp = dest;
diff --git a/libc/string/lib_strcspn.c b/libc/string/lib_strcspn.c
index dd4a6928750aa70454d13e12cbaa3ecf3efdc953..9291d96d6c247b3965fd4eb1d04c10d424338f14 100644
--- a/libc/string/lib_strcspn.c
+++ b/libc/string/lib_strcspn.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/libc/string/lib_strerrorr.c b/libc/string/lib_strerrorr.c
new file mode 100644
index 0000000000000000000000000000000000000000..124788d1f63f2bfb5b832e5e60a245da922c7c71
--- /dev/null
+++ b/libc/string/lib_strerrorr.c
@@ -0,0 +1,74 @@
+/****************************************************************************
+ * libc/string/lib_strerrorr.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: strerror_r
+ *
+ * Description:
+ *   The strerror_r() function is similar to strerror(), but is thread safe.
+ *   It returns the error string in the user-supplied buffer 'buf' of length
+ *  'buflen'.
+ *
+ * Returned Value:
+ *  strerror_r() returns 0 on success. On error, a (positive) error number is
+ *  returned.
+ *
+ * Portability:
+ *   Specified in POSIX.1-2001
+ *
+ ****************************************************************************/
+
+int strerror_r(int errnum, FAR char *buf, size_t buflen)
+{
+  FAR const char *errstr = strerror(errnum);
+
+  DEBUGASSERT(buf != NULL);
+  (void)strncpy(buf, errstr, buflen);
+  return OK;
+}
diff --git a/libc/string/lib_strlen.c b/libc/string/lib_strlen.c
index e897354e54a07c1d0222d743127e097c9ec3acf9..583cbbc70f38b7cade11383fe092125c8781b8e1 100644
--- a/libc/string/lib_strlen.c
+++ b/libc/string/lib_strlen.c
@@ -45,7 +45,7 @@
  * Public Functions
  ****************************************************************************/
 
-#ifndef CONFIG_ARCH_STRLEN
+#ifndef CONFIG_LIBC_ARCH_STRLEN
 size_t strlen(const char *s)
 {
   const char *sc;
diff --git a/libc/string/lib_strncasecmp.c b/libc/string/lib_strncasecmp.c
index 05d795b0a2c2fda04eb476b0b8248ccaca54f57f..47b024e909f39767717d934a707abcfcf409dd7e 100644
--- a/libc/string/lib_strncasecmp.c
+++ b/libc/string/lib_strncasecmp.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -44,7 +40,7 @@
 #include 
 
 #include 
-#include 
+#include 
 #include 
 
 /****************************************************************************
diff --git a/libc/string/lib_strncmp.c b/libc/string/lib_strncmp.c
index 92df02a20bcaf691b729960032e424782c910c28..544c5efe2d4803731f9fa2d1370ea86b9800912c 100644
--- a/libc/string/lib_strncmp.c
+++ b/libc/string/lib_strncmp.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/libc/string/lib_strncpy.c b/libc/string/lib_strncpy.c
index dbafc1c3a171489ffa5252cae37ae73d1645f0cf..ddcb1ad8a52b7c624125cf72b9f48fb1db617dfe 100644
--- a/libc/string/lib_strncpy.c
+++ b/libc/string/lib_strncpy.c
@@ -49,7 +49,7 @@
  * Name: strncpy
  ****************************************************************************/
 
-#ifndef CONFIG_ARCH_STRNCPY
+#ifndef CONFIG_LIBC_ARCH_STRNCPY
 char *strncpy(FAR char *dest, FAR const char *src, size_t n)
 {
   char *ret = dest;     /* Value to be returned */
diff --git a/libc/string/lib_strnlen.c b/libc/string/lib_strnlen.c
index 863a310caad60f13dcdce61829468979810c01d1..20ab152597e97b8d762d80480639c3bc1d77b0a7 100644
--- a/libc/string/lib_strnlen.c
+++ b/libc/string/lib_strnlen.c
@@ -52,7 +52,7 @@
  * Public Functions
  ****************************************************************************/
 
-#ifndef CONFIG_ARCH_STRNLEN
+#ifndef CONFIG_LIBC_ARCH_STRNLEN
 size_t strnlen(const char *s, size_t maxlen)
 {
   const char *sc;
diff --git a/libc/string/lib_strpbrk.c b/libc/string/lib_strpbrk.c
index 4170926bb6843c723d98814b924e370b3f39c523..f01b5a148b3a0b68a02b3200242d93bf0860f9d8 100644
--- a/libc/string/lib_strpbrk.c
+++ b/libc/string/lib_strpbrk.c
@@ -49,7 +49,7 @@ FAR char *strpbrk(FAR const char *str, FAR const char *charset)
 {
   /* Sanity checking */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!str || !charset)
     {
       return NULL;
diff --git a/libc/string/lib_strspn.c b/libc/string/lib_strspn.c
index 47ab34d8b203eaa23589d9dd0afc82c2788cf011..dfd68f1214d5a580f4701ba8a7d8c4117f4ad0c8 100644
--- a/libc/string/lib_strspn.c
+++ b/libc/string/lib_strspn.c
@@ -33,10 +33,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/libc/string/lib_strxfrm.c b/libc/string/lib_strxfrm.c
new file mode 100644
index 0000000000000000000000000000000000000000..61b6bba7e718de53653b0efd3b715894258ca618
--- /dev/null
+++ b/libc/string/lib_strxfrm.c
@@ -0,0 +1,80 @@
+/****************************************************************************
+ * libc/string/lib_strxfrm.c
+ *
+ *   Copyright (c)1999 Citrus Project,
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_LOCALE
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: strxfrm
+ *
+ * Description:
+ *   This function transforms the string pointed to by s2 and places the
+ *   resulting string into the array pointed to by s1. The transformation is
+ *   such that if the strcmp() function is applied to the two transformed
+ *   strings, it returns a value greater than, equal to, or less than zero,
+ *   correspoinding to the result of a <> function applied to the
+ *   same two original strings.
+ *   With a C locale, this function just copies.
+ *
+ ****************************************************************************/
+
+size_t strxfrm(FAR char *s1, FAR const char *s2, size_t n)
+{
+  size_t res;
+  res = 0;
+  while (n-- > 0)
+    {
+      if ((*s1++ = *s2++) != '\0')
+        {
+          ++res;
+        }
+      else
+        {
+          return res;
+        }
+    }
+  while (*s2)
+    {
+      ++s2;
+      ++res;
+    }
+
+  return res;
+}
+#endif
diff --git a/libc/syslog/Make.defs b/libc/syslog/Make.defs
index 7ebdc907cf5b50a4e66a4e4c30f6014ecb65340d..b1d6b093043626aa843850315a825e2a66aaa63c 100644
--- a/libc/syslog/Make.defs
+++ b/libc/syslog/Make.defs
@@ -35,11 +35,7 @@
 
 # Add the internal C files to the build
 
-CSRCS += lib_syslog.c lib_lowsyslog.c lib_setlogmask.c
-
-ifeq ($(CONFIG_SYSLOG),y)
-CSRCS += lib_syslogstream.c
-endif
+CSRCS += lib_syslog.c lib_setlogmask.c
 
 # Add the syslog directory to the build
 
diff --git a/libc/syslog/lib_setlogmask.c b/libc/syslog/lib_setlogmask.c
index 84352411bd97bb8811601cb2c8f2e0bfe63ef6d4..1d91d405558c8eab33cedbbd6c92e64069984722 100644
--- a/libc/syslog/lib_setlogmask.c
+++ b/libc/syslog/lib_setlogmask.c
@@ -70,8 +70,12 @@ uint8_t g_syslog_mask = LOG_ALL;
  *   to a priority p is LOG_MASK(p); LOG_UPTO(p) provides the mask of all
  *   priorities in the above list up to and including p.
  *
+ *   Per OpenGroup.org "If the maskpri argument is 0, the current log mask
+ *   is not modified."  In this implementation, the value zero is permitted
+ *   in order to disable all syslog levels.
+ *
  *   REVISIT: Per POSIX the syslog mask should be a per-process value but in
- *   NuttX, the scope of the mask is dependent on the nature of the build.
+ *   NuttX, the scope of the mask is dependent on the nature of the build:
  *
  *   Flat Build:  There is one, global SYSLOG mask that controls all output.
  *   Protected Build:  There are two SYSLOG masks.  One within the kernel
diff --git a/libc/syslog/lib_syslog.c b/libc/syslog/lib_syslog.c
index f6e35b35b563309565c49af0fdab22766bb872a9..408ffc100156c3fddee50a8b6811a0c0fa8eae48 100644
--- a/libc/syslog/lib_syslog.c
+++ b/libc/syslog/lib_syslog.c
@@ -39,111 +39,12 @@
 
 #include 
 
-#include 
 #include 
 
-#include 
-#include 
-#include 
+#include 
 
 #include "syslog/syslog.h"
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: vsyslog_internal
- *
- * Description:
- *   This is the internal implementation of vsyslog (see the description of
- *   syslog and vsyslog below)
- *
- ****************************************************************************/
-
-static inline int vsyslog_internal(FAR const IPTR char *fmt, va_list ap)
-{
-#if defined(CONFIG_SYSLOG)
-  struct lib_outstream_s stream;
-#elif CONFIG_NFILE_DESCRIPTORS > 0
-  struct lib_rawoutstream_s stream;
-#elif defined(CONFIG_ARCH_LOWPUTC)
-  struct lib_outstream_s stream;
-#endif
-
-#if defined(CONFIG_SYSLOG_TIMESTAMP)
-  struct timespec ts;
-
-  /* Get the current time.  Since debug output may be generated very early
-   * in the start-up sequence, hardware timer support may not yet be
-   * available.
-   */
-
-  if (!OSINIT_HW_READY() || clock_systimespec(&ts) < 0)
-    {
-      /* Timer hardware is not available, or clock_systimespec failed */
-
-      ts.tv_sec  = 0;
-      ts.tv_nsec = 0;
-    }
-#endif
-
-#if defined(CONFIG_SYSLOG)
-  /* Wrap the low-level output in a stream object and let lib_vsprintf
-   * do the work.
-   */
-
-  lib_syslogstream((FAR struct lib_outstream_s *)&stream);
-
-#if defined(CONFIG_SYSLOG_TIMESTAMP)
-  /* Pre-pend the message with the current time, if available */
-
-  (void)lib_sprintf((FAR struct lib_outstream_s *)&stream,
-                    "[%6d.%06d]", ts.tv_sec, ts.tv_nsec/1000);
-
-#endif
-
-  return lib_vsprintf((FAR struct lib_outstream_s *)&stream, fmt, ap);
-
-#elif CONFIG_NFILE_DESCRIPTORS > 0
-  /* Wrap the stdout in a stream object and let lib_vsprintf
-   * do the work.
-   */
-
-  lib_rawoutstream(&stream, 1);
-
-#if defined(CONFIG_SYSLOG_TIMESTAMP)
-  /* Pre-pend the message with the current time, if available */
-
-  (void)lib_sprintf((FAR struct lib_outstream_s *)&stream,
-                    "[%6d.%06d]",  ts.tv_sec, ts.tv_nsec/1000);
-#endif
-
-  return lib_vsprintf(&stream.public, fmt, ap);
-
-#elif defined(CONFIG_ARCH_LOWPUTC)
-  /* Wrap the low-level output in a stream object and let lib_vsprintf
-   * do the work.
-   */
-
-  lib_lowoutstream((FAR struct lib_outstream_s *)&stream);
-
-#if defined(CONFIG_SYSLOG_TIMESTAMP)
-  /* Pre-pend the message with the current time, if available */
-
-  (void)lib_sprintf((FAR struct lib_outstream_s *)&stream,
-                    "[%6d.%06d]", ts.tv_sec, ts.tv_nsec/1000);
-#endif
-
-  return lib_vsprintf((FAR struct lib_outstream_s *)&stream, fmt, ap);
-
-#else /* CONFIG_SYSLOG */
-
-  return 0;
-
-#endif /* CONFIG_SYSLOG */
-}
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -166,9 +67,14 @@ int vsyslog(int priority, FAR const IPTR char *fmt, va_list ap)
 
   if ((g_syslog_mask & LOG_MASK(priority)) != 0)
     {
-      /* Yes.. let vsylog_internal do the deed */
-
-      ret = vsyslog_internal(fmt, ap);
+      /* Yes.. Perform the _vsyslog system call.
+       *
+       * NOTE:  The va_list parameter is passed by reference.  That is
+       * because the va_list is a structure in some compilers and passing
+       * of structures in the NuttX sycalls does not work.
+       */
+
+      ret = _vsyslog(priority, fmt, &ap);
     }
 
   return ret;
diff --git a/libc/syslog/syslog.h b/libc/syslog/syslog.h
index 3188d3f2d63d14e3349aad12cfb53fba71ec044a..31ad268770e28ba862615085aca6722fde56bbae 100644
--- a/libc/syslog/syslog.h
+++ b/libc/syslog/syslog.h
@@ -41,7 +41,6 @@
  ****************************************************************************/
 
 #include 
-#include 
 
 /****************************************************************************
  * Public Data
diff --git a/libc/time/Kconfig b/libc/time/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..a9acbb8766394e9dc27e3ce421d7ad0e00b85288
--- /dev/null
+++ b/libc/time/Kconfig
@@ -0,0 +1,83 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+menu "Time/Time Zone Support"
+
+config LIBC_LOCALTIME
+	bool "localtime API call support"
+	default "n"
+	depends on !DISABLE_ENVIRON
+	---help---
+		localtime API call support
+
+		Logic currently depends on file system support with, at a minimum, these
+		files in the zoneinfo directory:  GMT and posixrules.  An additional
+		timezone file is required for any additional, local time zone(s) and the
+		environment variable TZ must be set to the name of that timezone file
+		when tzset() is called.
+
+		See https://www.iana.org/time-zones .  See also nuttx/zoneinfo
+		which provides a framework for incorporating the TZ database into a
+		NuttX build.
+
+if LIBC_LOCALTIME
+
+config LIBC_TZ_MAX_TIMES
+	int "Maximum number of times in timezone"
+	default 370
+	---help---
+		Timezone files with more than this number of times will not be usedi
+		(tmecnt).
+
+		Warning: Some files in IANA TZ database include many times.  The current
+		posixrules file, for example, has timecnt = 236.  The value of
+		TX_MAX_ITMES in the tzfile.h header file on my Linux system is 370, the
+		default used here.  You may want to reduce this value for a smaller
+		footprint.
+
+config LIBC_TZ_MAX_TYPES
+	int "Maximum number of TZ types"
+	default 20
+	---help---
+		Maximum number of local time types.  You may want to reduce this value
+		for a smaller footprint.
+
+config LIBC_TZDIR
+	string "zoneinfo directory path"
+	default "/etc/zoneinfo"
+	---help---
+		This is the full path to the location where the TZ database is expected
+		to be found.
+
+config LIB_ZONEINFO
+	bool "TZ database"
+	default n
+	---help---
+		Download and build the TZ/Olson database.
+
+if LIB_ZONEINFO
+
+config LIB_ZONEINFO_ROMFS
+	bool "Build ROMFS filesystem"
+	default n
+	depends on FS_ROMFS
+	---help---
+		Build a mountable ROMFS filesystem containing the TZ/Olson database
+
+endif # LIB_ZONEINFO
+endif # LIBC_LOCALTIME
+
+config TIME_EXTENDED
+	bool "Add day of week, year support"
+	default "n"
+	depends on !LIBC_LOCALTIME
+	---help---
+		Selecting TIME_EXTENDED adds tm_wday, tm_yday and tm_isdst
+		to the tm struct. This allows integration with 3rd party libraries
+		that expect the tm struct to contain these members.
+
+		Note: tm_isdst is always 0
+
+endmenu # Time/Time Zone Support
diff --git a/libc/time/Make.defs b/libc/time/Make.defs
index f5799c7dd21cda506b5facb893fe05bed8b63bd9..68e62436871cc2106c9b65a1f312e3f9e55c0a65 100644
--- a/libc/time/Make.defs
+++ b/libc/time/Make.defs
@@ -37,6 +37,7 @@
 
 CSRCS += lib_strftime.c lib_calendar2utc.c lib_daysbeforemonth.c
 CSRCS += lib_gettimeofday.c lib_isleapyear.c lib_settimeofday.c lib_time.c
+CSRCS += lib_difftime.c
 
 ifdef CONFIG_LIBC_LOCALTIME
 CSRCS += lib_localtime.c lib_asctime.c lib_asctimer.c lib_ctime.c
diff --git a/libc/time/lib_calendar2utc.c b/libc/time/lib_calendar2utc.c
index 2c2d507d9dcacce1fdeda3b0e363bea298c26240..51a8581af44f45e0af3bcf503c80695653922e5b 100644
--- a/libc/time/lib_calendar2utc.c
+++ b/libc/time/lib_calendar2utc.c
@@ -45,30 +45,6 @@
 
 #include 
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
diff --git a/libc/time/lib_daysbeforemonth.c b/libc/time/lib_daysbeforemonth.c
index 8c09c2203e8479645222b7353b62e653efba674b..d17d05b57e89b23d76646c5c4f35b4140744f076 100644
--- a/libc/time/lib_daysbeforemonth.c
+++ b/libc/time/lib_daysbeforemonth.c
@@ -44,26 +44,6 @@
 
 #include 
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Constant Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
@@ -73,10 +53,6 @@ static const uint16_t g_daysbeforemonth[13] =
   0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334, 365
 };
 
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -85,7 +61,16 @@ static const uint16_t g_daysbeforemonth[13] =
  * Function:  clock_daysbeforemonth
  *
  * Description:
- *    Get the number of days that occurred before the beginning of the month.
+ *    Get the number of days that occurred before the beginning of the
+ *    month.
+ *
+ * Input Parameters:
+ *    month    - The month in the form of tm_mon, that is a range of 0-11.
+ *    leapyear - True if leap year and there are 29 days in February.
+ *               NOTE the month=1 is February.
+ *
+ * Returned Value:
+ *    The number of days that occurred before the month
  *
  ****************************************************************************/
 
@@ -96,6 +81,7 @@ int clock_daysbeforemonth(int month, bool leapyear)
     {
       retval++;
     }
+
   return retval;
 }
 
diff --git a/libc/time/lib_difftime.c b/libc/time/lib_difftime.c
new file mode 100644
index 0000000000000000000000000000000000000000..ee9a62ebb206fcf28962aaaf42afc68b25fe81b2
--- /dev/null
+++ b/libc/time/lib_difftime.c
@@ -0,0 +1,86 @@
+/****************************************************************************
+ * libc/time/lib_difftime.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Sebastien Lorquet 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#include 
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  difftime
+ *
+ * Description:
+ *   The difftime() function returns the number of seconds elapsed
+ *   between time time1 and time time0, represented as a double or a float.
+ *   Float is used if the platform does not support double. However, when
+ *   using a float, some precision may be lost for big differences.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_HAVE_DOUBLE
+double difftime(time_t time1, time_t time0)
+{
+  return (double)time1 - (double)time0;
+}
+#else
+float difftime(time_t time1, time_t time0)
+{
+  if (time1 >= time2)
+    {
+      /* Result will be positive (even though bit 31 may be set on very large
+       * differences!)
+       */
+
+      return (float)((uint32_t)(time1 - time0))
+    }
+  else
+    {
+      /* Result will be negative.  REVISIT: Am I missing any case where bit 31
+       * might not be set?
+       */
+
+      return (float)((int32_t)(time1 - time0))
+    }
+}
+#endif
diff --git a/libc/time/lib_gettimeofday.c b/libc/time/lib_gettimeofday.c
index d1315b1288860c39a11c4447408a41b1bc589eec..6a1f01d16edcf0543e39492e79209012df11e9c7 100644
--- a/libc/time/lib_gettimeofday.c
+++ b/libc/time/lib_gettimeofday.c
@@ -75,7 +75,7 @@ int gettimeofday(FAR struct timeval *tv, FAR struct timezone *tz)
   struct timespec ts;
   int ret;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!tv)
     {
       set_errno(EINVAL);
diff --git a/libc/time/lib_gmtimer.c b/libc/time/lib_gmtimer.c
index d6b224cfcc04cd323a95ad19964a307217d91fb3..10173d8c974217eb1fe69d3a83e446d7cc766876 100644
--- a/libc/time/lib_gmtimer.c
+++ b/libc/time/lib_gmtimer.c
@@ -54,10 +54,6 @@
 #define SEC_PER_HOUR ((time_t)60 * SEC_PER_MIN)
 #define SEC_PER_DAY  ((time_t)24 * SEC_PER_HOUR)
 
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
 /****************************************************************************
  * Private Function Prototypes
  ****************************************************************************/
@@ -90,8 +86,7 @@ static void   clock_utc2julian(time_t jdn, int *year, int *month, int *day);
  ****************************************************************************/
 
 /****************************************************************************
- * Function:  clock_calendar2utc, clock_gregorian2utc,
- *            and clock_julian2utc
+ * Function:  clock_utc2calendar, clock_utc2gregorian, and clock_utc2julian
  *
  * Description:
  *    Calendar to UTC conversion routines.  These conversions
@@ -317,7 +312,7 @@ FAR struct tm *gmtime_r(FAR const time_t *timer, FAR struct tm *result)
   /* Get the seconds since the EPOCH */
 
   epoch = *timer;
-  sdbg("timer=%d\n", (int)epoch);
+  linfo("timer=%d\n", (int)epoch);
 
   /* Convert to days, hours, minutes, and seconds since the EPOCH */
 
@@ -332,15 +327,15 @@ FAR struct tm *gmtime_r(FAR const time_t *timer, FAR struct tm *result)
 
   sec    = epoch;
 
-  sdbg("hour=%d min=%d sec=%d\n",
-       (int)hour, (int)min, (int)sec);
+  linfo("hour=%d min=%d sec=%d\n",
+        (int)hour, (int)min, (int)sec);
 
   /* Convert the days since the EPOCH to calendar day */
 
   clock_utc2calendar(jdn, &year, &month, &day);
 
-  sdbg("jdn=%d year=%d month=%d day=%d\n",
-       (int)jdn, (int)year, (int)month, (int)day);
+  linfo("jdn=%d year=%d month=%d day=%d\n",
+        (int)jdn, (int)year, (int)month, (int)day);
 
   /* Then return the struct tm contents */
 
diff --git a/libc/time/lib_mktime.c b/libc/time/lib_mktime.c
index 5798ce530992216d89d45d002a910f3dee901905..160e10fcf10b65be510a9b29e1e3433cc513b5ac 100644
--- a/libc/time/lib_mktime.c
+++ b/libc/time/lib_mktime.c
@@ -94,14 +94,14 @@ time_t mktime(FAR struct tm *tp)
    */
 
   jdn = clock_calendar2utc(tp->tm_year + 1900, tp->tm_mon, tp->tm_mday);
-  sdbg("jdn=%d tm_year=%d tm_mon=%d tm_mday=%d\n",
-       (int)jdn, tp->tm_year, tp->tm_mon, tp->tm_mday);
+  linfo("jdn=%d tm_year=%d tm_mon=%d tm_mday=%d\n",
+        (int)jdn, tp->tm_year, tp->tm_mon, tp->tm_mday);
 
   /* Return the seconds into the julian day. */
 
   ret = ((jdn * 24 + tp->tm_hour) * 60 + tp->tm_min) * 60 + tp->tm_sec;
-  sdbg("ret=%d tm_hour=%d tm_min=%d tm_sec=%d\n",
-       (int)ret, tp->tm_hour, tp->tm_min, tp->tm_sec);
+  linfo("ret=%d tm_hour=%d tm_min=%d tm_sec=%d\n",
+        (int)ret, tp->tm_hour, tp->tm_min, tp->tm_sec);
 
   return ret;
 }
diff --git a/libc/time/lib_settimeofday.c b/libc/time/lib_settimeofday.c
index ea404b7e0397b96da280274ced858c914287bd68..a36f32911bdf97266c4bafa699841556e58d79b5 100644
--- a/libc/time/lib_settimeofday.c
+++ b/libc/time/lib_settimeofday.c
@@ -73,7 +73,7 @@ int settimeofday(FAR const struct timeval *tv, FAR struct timezone *tz)
 {
   struct timespec ts;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!tv || tv->tv_usec >= USEC_PER_SEC)
     {
       set_errno(EINVAL);
diff --git a/libc/tls/Kconfig b/libc/tls/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..8cc17fc9a069fc191e7c60325a60de82c90dd398
--- /dev/null
+++ b/libc/tls/Kconfig
@@ -0,0 +1,50 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+config ARCH_HAVE_TLS
+	bool
+	default n
+	---help---
+		Selected by the configuration system if the current architecture
+		supports TLS.
+
+menu "Thread Local Storage (TLS)"
+	depends on ARCH_HAVE_TLS
+
+config TLS
+	bool "Thread Local Storage (TLS)"
+	default n
+	---help---
+		Build in support for stack based thread local storage (TLS).
+
+if TLS
+
+config TLS_LOG2_MAXSTACK
+	int "Maximum stack size (log2)"
+	default 13
+	range 11 24
+	---help---
+		Stack based TLS works by fetch thread information from the beginning
+		of the stack memory allocation.  In order to do this, the memory
+		must be aligned in such a way that the executing logic can simply
+		masking the current stack pointer to get the beginning of the stack
+		allocation.
+
+		This setting specifies the alignment of the stack as a power of 2:
+		11=2KB, 12=4KB, 13=8KB, etc.  The exact alignment is not so critical
+		except that (1) a very large value can cause you to run out of
+		alignable memory (and fail memory allocations), and (2) smaller
+		values will limit the maximum size of the stack (hence the naming
+		of this configuration value).
+
+config TLS_NELEM
+	int "Number of TLS elements"
+	default 1
+	---help---
+		The number of unique TLS elements.  These can be accessed with
+		the user library functions tls_get_element() and tls_set_element().
+
+endif # TLS
+endmenu # Thread Local Storage (TLS)
diff --git a/libc/tls/tls.h b/libc/tls/tls.h
index c7d361a3f795d08aa5964b33f27ad71ae32cd5f1..6ec4d7447400c71ad09a200cdbd34451512bf872 100644
--- a/libc/tls/tls.h
+++ b/libc/tls/tls.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * sched/tls/tls.h
+ * libc/tls/tls.h
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/libc/unistd/Kconfig b/libc/unistd/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..966a338b36f55cdbc9d351bd832f95c20c9929a0
--- /dev/null
+++ b/libc/unistd/Kconfig
@@ -0,0 +1,90 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+menu "Program Execution Options"
+
+config LIBC_EXECFUNCS
+	bool "Enable exec[l|v] / posix_spawn() Support"
+	default n
+	depends on !BINFMT_DISABLE
+	---help---
+		Enable support for the exec[l|v] family of functions that can be
+		used to start other programs, terminating the current program and
+		the posix_spawn() familty of functions that can be used start other
+		programs without terminating the current program.  The typical
+		usage of the exec[l|v] functions is (1) first call vfork() to create
+		a new thread, then (2) call exec[l|v] to replace the new thread with
+		a program from the file system.
+
+		NOTE 1: This two step process start is completely unnecessary in
+		NuttX and is provided only for compatibily with Unix systems.  These
+		functions are essentially just wrapper functions that (1) call the
+		non-standard binfmt function 'exec', and then (2) exit(0).  Since
+		the new thread will be terminated by the exec[l|v] call, it really
+		served no purpose other than to suport Unix compatility.
+
+		The posix_spawn() functions do not have this inefficiency.
+
+		NOTE 2: Support for exec[l|v] and posix_spawn() is conditional
+		because they require additional support for symbol tables that
+		will not be available in the typical system.
+
+if LIBC_EXECFUNCS
+
+config EXECFUNCS_HAVE_SYMTAB
+	bool "Have symbol table"
+	default n if BUILD_KERNEL
+	default y if !BUILD_KERNEL
+	---help---
+		If you have a system symbol table, then you must select this
+		option in order to use it.  Symbol tables are required in most
+		cases in order to like executable programs to the base code.
+
+if EXECFUNCS_HAVE_SYMTAB
+config EXECFUNCS_SYMTAB
+	string "Symbol table used by exec[l|v]"
+	default "g_symtab"
+	---help---
+		The exec[l|v] and posix_spawn() functions are wrapper functions that
+		call the non-standard binfmt function 'exec').  The binfmt
+		function 'exec' needs to have (1) a symbol table that provides the
+		list of symbols exported by the base code, and (2) the number of
+		symbols in that table.  This selection provides the name of that
+		symbol table.
+
+config EXECFUNCS_NSYMBOLS
+	int "Number of Symbols in the Table"
+	default 0
+	---help---
+		The exec[l|v] and posix_spawn() functions are wrapper functions that
+		call the non-standard binfmt function 'exec').  The binfmt
+		function 'exec' needs to have (1) a symbol table that provides the
+		list of symbols exported by the base code, and (2) the number of
+		symbols in that table.  This selection provides the number of
+		symbols in the symbol table.
+
+endif # EXECFUNCS_HAVE_SYMTAB
+endif # LIBC_EXECFUNCS
+
+config POSIX_SPAWN_PROXY_STACKSIZE
+	int "Spawn Stack Size"
+	default 1024
+	---help---
+		If posix_spawn[p]() and task_spawn() use I/O redirection options,
+		they will require an intermediary/proxy task to muck with the file
+		descriptors.  This configuration item specifies the stack size
+		used for the proxy. Default: 1024 bytes.
+
+config TASK_SPAWN_DEFAULT_STACKSIZE
+	int "Default task_spawn Stack Size"
+	default 2048
+	depends on !ARCH_ADDRENV
+	---help---
+		The actual size to use for the child task's stack can be set with
+		task_spawnattr_setstacksize().  This value specifies the default
+		stack size to use if task_spawnattr_setstacksize() is not used.
+		Default: 2048.
+
+endmenu # Program Execution Options
diff --git a/libc/unistd/Make.defs b/libc/unistd/Make.defs
index ddb463c3db7076a406530ad68de75b10451dc470..3234a9f7fc5c40e22ebdb86d5aab198122255491 100644
--- a/libc/unistd/Make.defs
+++ b/libc/unistd/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # libc/unistd/Make.defs
 #
-#   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2011-2012, 2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -35,8 +35,8 @@
 
 # Add the unistd C files to the build
 
-CSRCS += lib_access.c lib_getopt.c lib_getoptargp.c lib_getoptindp.c
-CSRCS += lib_getoptoptp.c
+CSRCS += lib_access.c lib_swab.c
+CSRCS += lib_getopt.c lib_getoptargp.c lib_getoptindp.c lib_getoptoptp.c
 
 ifneq ($(CONFIG_NFILE_DESCRIPTORS),0)
 ifneq ($(CONFIG_DISABLE_ENVIRON),y)
@@ -46,6 +46,10 @@ endif
 ifeq ($(CONFIG_LIBC_EXECFUNCS),y)
 CSRCS += lib_execl.c
 endif
+
+ifeq ($(CONFIG_PIPES),y)
+CSRCS += lib_pipe.c
+endif
 endif
 
 ifneq ($(CONFIG_DISABLE_SIGNALS),y)
diff --git a/libc/unistd/lib_chdir.c b/libc/unistd/lib_chdir.c
index 4780a6b72e927d41b2eb80a4b6d48353ca6d3803..16786a0f317817a74eb957ef89866a30fc7f0396 100644
--- a/libc/unistd/lib_chdir.c
+++ b/libc/unistd/lib_chdir.c
@@ -119,14 +119,14 @@ int chdir(FAR const char *path)
   struct stat buf;
   char *oldpwd;
   char *alloc;
-  int err;
+  int errcode;
   int ret;
 
   /* Verify the input parameters */
 
   if (!path)
     {
-      err = ENOENT;
+      errcode = ENOENT;
       goto errout;
     }
 
@@ -135,7 +135,7 @@ int chdir(FAR const char *path)
   ret = stat(path, &buf);
   if (ret != 0)
     {
-      err = ENOENT;
+      errcode = ENOENT;
       goto errout;
     }
 
@@ -143,7 +143,7 @@ int chdir(FAR const char *path)
 
   if (!S_ISDIR(buf.st_mode))
     {
-      err = ENOTDIR;
+      errcode = ENOTDIR;
       goto errout;
     }
 
@@ -173,7 +173,7 @@ int chdir(FAR const char *path)
   return OK;
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 }
 #endif /* CONFIG_NFILE_DESCRIPTORS && !CONFIG_DISABLE_ENVIRON */
diff --git a/libc/unistd/lib_getcwd.c b/libc/unistd/lib_getcwd.c
index 851d380fb6c864401df7f47fe140c38b9137b4eb..55587a599e2356cadfdf7c1dac0799f76b422305 100644
--- a/libc/unistd/lib_getcwd.c
+++ b/libc/unistd/lib_getcwd.c
@@ -99,7 +99,7 @@ FAR char *getcwd(FAR char *buf, size_t size)
 
   /* Verify input parameters */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!buf || !size)
     {
       set_errno(EINVAL);
diff --git a/libc/unistd/lib_pipe.c b/libc/unistd/lib_pipe.c
new file mode 100644
index 0000000000000000000000000000000000000000..469dd5a1d508a1ba4d74aa498913dd20ba1db150
--- /dev/null
+++ b/libc/unistd/lib_pipe.c
@@ -0,0 +1,76 @@
+/****************************************************************************
+ * libc/unistd/lib_pipe.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+
+#include 
+
+#if defined(CONFIG_PIPES) && CONFIG_DEV_PIPE_SIZE > 0
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: pipe
+ *
+ * Description:
+ *   pipe() creates a pair of file descriptors, pointing to a pipe inode,
+ *   and  places them in the array pointed to by 'fd'. fd[0] is for reading,
+ *   fd[1] is for writing.
+ *
+ * Inputs:
+ *   fd[2] - The user provided array in which to catch the pipe file
+ *   descriptors
+ *
+ * Return:
+ *   0 is returned on success; otherwise, -1 is returned with errno set
+ *   appropriately.
+ *
+ ****************************************************************************/
+
+int pipe(int fd[2])
+{
+  return pipe2(fd, CONFIG_DEV_PIPE_SIZE);
+}
+
+#endif /* CONFIG_PIPES && CONFIG_DEV_PIPE_SIZE > 0 */
+
diff --git a/libc/unistd/lib_sleep.c b/libc/unistd/lib_sleep.c
index 785d76b63b52842dcf6e712fb4bbce7043cf5578..70f763f0ce54006e8d1787bd0586146eb775c26a 100644
--- a/libc/unistd/lib_sleep.c
+++ b/libc/unistd/lib_sleep.c
@@ -45,26 +45,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -150,7 +130,7 @@ unsigned int sleep(unsigned int seconds)
 
       if (ret < 0)
         {
-          remaining = rmtp.tv_nsec;
+          remaining = rmtp.tv_sec;
           if (remaining < seconds && rmtp.tv_nsec >= 500000000)
             {
               /* Round up */
diff --git a/libc/unistd/lib_swab.c b/libc/unistd/lib_swab.c
new file mode 100644
index 0000000000000000000000000000000000000000..269b228100a7c955efded864106f9344652bab9f
--- /dev/null
+++ b/libc/unistd/lib_swab.c
@@ -0,0 +1,99 @@
+/****************************************************************************
+ * libc/unistd/lib_swab.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: strncpy
+ *
+ * Description:
+ *   The swab() function will copy nbytes bytes, which are pointed to by
+ *   'src', to the object pointed to by 'dest', exchanging adjacent bytes.
+ *   The 'nbytes' argument should be even. If 'nbytes' is odd, swab() copies
+ *   and exchanges 'nbytes'-1 bytes and the disposition of the last byte is
+ *   unspecified. If copying takes place between objects that overlap, the
+ *   behavior is undefined. If nbytes is negative, swab() does nothing.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void swab(FAR const void *src, FAR void *dest, ssize_t nbytes)
+{
+  FAR const uint8_t *src8 = (FAR const uint8_t *)src;
+  FAR uint8_t *dest8 = (FAR uint8_t *)dest;
+  FAR uint8_t *end8;
+
+  DEBUGASSERT(src != NULL && dest != NULL);
+
+  /* Do nother if nbytes is negative or it there are few then 2 bytes to be
+   * transferred.
+   */
+
+  if (nbytes > 1)
+  {
+    /* The end of dest buffer + 1 byte (skipping any odd numbered byte at
+     * the end of the buffer.
+     */
+
+    end8 = dest8 + (nbytes & ~1);
+
+    /* Loop until the destination is equal to the end + 1 address */
+
+    while (dest8 != end8)
+      {
+        register uint8_t tmp;
+
+        /* Transfer the bytes, swapping the order */
+
+        tmp      = *src8++;
+        *dest8++ = *src8++;
+        *dest8++ = tmp;
+      }
+  }
+}
diff --git a/libc/unistd/lib_usleep.c b/libc/unistd/lib_usleep.c
index 5b72bbdcdf7df6ec0dc5f7aeef824710695a23fd..4e3d4cdb0c4b44b9e97e7b1574585d0bb80738a5 100644
--- a/libc/unistd/lib_usleep.c
+++ b/libc/unistd/lib_usleep.c
@@ -43,26 +43,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libc/wchar/Kconfig b/libc/wchar/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..853d80507bd129f05991496d9dc780fa43becbc6
--- /dev/null
+++ b/libc/wchar/Kconfig
@@ -0,0 +1,14 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+#menu "Wide character suppoort"
+
+config LIBC_WCHAR
+	bool "Enable wide-characters (Unicode) support"
+	default n
+	---help---
+		By default, wide-characters support is disabled.
+
+#endmenu # Wide character suppoort
diff --git a/libc/wchar/Make.defs b/libc/wchar/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..12c559a5cefaf851257a42d9e5e0c51825726aec
--- /dev/null
+++ b/libc/wchar/Make.defs
@@ -0,0 +1,53 @@
+############################################################################
+# libc/wchar/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+ifeq ($(CONFIG_LIBC_WCHAR),y)
+
+# Add the internal C files to the build
+
+CSRCS += lib_wcscmp.c lib_wcslen.c lib_wmemchr.c lib_wmemcmp.c lib_wmemcpy.c
+CSRCS += lib_wmemmove.c lib_wmemset.c lib_btowc.c lib_mbrtowc.c lib_wctob.c
+CSRCS += lib_wcslcpy.c lib_wcsxfrm.c lib_wcrtomb.c lib_wcsftime.c
+CSRCS += lib_wcscoll.c lib_wcstol.c lib_wcstoll.c lib_wcstoul.c
+CSRCS += lib_wcstoull.c lib_wcstold.c lib_wcstof.c lib_wcstod.c
+CSRCS += lib_swprintf.c lib_mbsnrtowcs.c lib_wcsnrtombs.c
+
+# Add the wchar directory to the build
+
+DEPPATH += --dep-path wchar
+VPATH += :wchar
+
+endif
+
diff --git a/libc/wchar/lib_btowc.c b/libc/wchar/lib_btowc.c
new file mode 100644
index 0000000000000000000000000000000000000000..069a4dc9c4d3866a35132729654b7c74669b49be
--- /dev/null
+++ b/libc/wchar/lib_btowc.c
@@ -0,0 +1,78 @@
+/****************************************************************************
+ * libc/wchar/lib_btowc.c
+ *
+ *   Copyright (c)1999 Citrus Project,
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: btowc
+ *
+ * Description:
+ *   Minimal byte to wide char converter
+ *
+ ****************************************************************************/
+
+wint_t btowc(int c)
+{
+  wchar_t pwc;
+  char b;
+  int retval = 0;
+
+  if (c == EOF)
+    {
+      return WEOF;
+    }
+
+  b = (char)c;
+
+  retval = mbtowc(&pwc, (FAR const char *)&b, 1);
+
+  if (retval != 0 && retval != 1)
+    {
+      return WEOF;
+    }
+
+  return (wint_t)pwc;
+}
+#endif
diff --git a/libc/wchar/lib_mbrtowc.c b/libc/wchar/lib_mbrtowc.c
new file mode 100644
index 0000000000000000000000000000000000000000..f82ff1808a1fe89a82619a355776f997feca1972
--- /dev/null
+++ b/libc/wchar/lib_mbrtowc.c
@@ -0,0 +1,79 @@
+/****************************************************************************
+ * libc/wchar/lib_mbrtowc.c
+ *
+ *   Copyright (c)1999 Citrus Project,
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: mbrtowc
+ *
+ * Description:
+ *   Convert a multibyte sequence to a wide character
+ *
+ ****************************************************************************/
+
+size_t mbrtowc(FAR wchar_t *pwc, FAR const char *s, size_t n, mbstate_t *ps)
+{
+  int retval = 0;
+
+  if (s == NULL)
+    {
+      retval = mbtowc(NULL, "", 1);
+    }
+  else
+    {
+      retval = mbtowc(pwc, s, n);
+    }
+
+  if (retval == -1)
+    {
+      return (size_t)(-1);
+    }
+  else
+    {
+      return (size_t)retval;
+    }
+}
+#endif
diff --git a/libc/wchar/lib_mbsnrtowcs.c b/libc/wchar/lib_mbsnrtowcs.c
new file mode 100644
index 0000000000000000000000000000000000000000..cc60ebb6c9c6d606f8c1e34e40dbb78c807aaa62
--- /dev/null
+++ b/libc/wchar/lib_mbsnrtowcs.c
@@ -0,0 +1,91 @@
+/****************************************************************************
+ * libc/wchar/lib_mbsnrtowcs.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Alan Carvalho de Assis 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: mbsnrtowcs
+ *
+ * Description:
+ *   The 'mbsrtowcs' function converts a sequence of multibyte characters
+ *   pointed to indirectly by 'src' into a sequence of corresponding wide
+ *   characters and stores at most 'len' of them in the wchar_t array pointed
+ *   to by 'dst', until it encounters a terminating null character ('\0').
+ *
+ *   If 'dst' is NULL, no characters are stored.
+ *
+ *   If 'dst' is not NULL, the pointer pointed to by 'src' is updated to
+ *   point to the character after the one that conversion stopped at.  If
+ *   conversion stops because a null character is encountered, *'src' is set
+ *   to NULL.
+ *
+ *   The mbstate_t argument, 'ps', is used to keep track of the shift state.
+ *   If it is NULL, 'mbsrtowcs' uses an internal, static mbstate_t object,
+ *   which is initialized to the initial conversion state at program startup.
+ *
+ *   The 'mbsnrtowcs' function behaves identically to 'mbsrtowcs', except
+ *   that conversion stops after reading at most 'nms' bytes from the buffer
+ *   pointed to by 'src'.
+ *
+ * Returned Value:
+ *   The 'mbsrtowcs' and 'mbsnrtowcs' functions return the number of wide
+ *   characters stored in the array pointed to by 'dst' if successful,
+ *   otherwise it returns (size_t)-1.
+ *
+ * Portability:
+ *   'mbsrtowcs' is defined by the C99 standard.
+ *   'mbsnrtowcs' is defined by the POSIX.1-2008 standard.
+ *
+ ****************************************************************************/
+
+size_t mbsnrtowcs(FAR wchar_t *dst, FAR const char **src, size_t nms,
+                  size_t len, FAR mbstate_t *ps)
+{
+  return len;
+}
+
+#endif /* CONFIG_LIBC_WCHAR */
+
diff --git a/libc/wchar/lib_swprintf.c b/libc/wchar/lib_swprintf.c
new file mode 100644
index 0000000000000000000000000000000000000000..610c816af575967261631f6c3917752e760279e7
--- /dev/null
+++ b/libc/wchar/lib_swprintf.c
@@ -0,0 +1,81 @@
+/****************************************************************************
+ * libc/wchar/lib_swprintf.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include "libc.h"
+
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * swprintf
+ ****************************************************************************/
+
+int swprintf(FAR wchar_t *buf, size_t maxlen, FAR const wchar_t *fmt, ...)
+{
+  struct lib_memoutstream_s memoutstream;
+  va_list ap;
+  int n;
+
+  /* Initialize a memory stream to write to the buffer */
+
+  lib_memoutstream((FAR struct lib_memoutstream_s *)&memoutstream,
+                   (FAR char *) buf, LIB_BUFLEN_UNKNOWN);
+
+  /* Then let lib_vsprintf do the real work */
+
+  va_start(ap, fmt);
+  n = lib_vsprintf((FAR struct lib_outstream_s *)&memoutstream.public,
+                   (FAR const char *)fmt, ap);
+  va_end(ap);
+
+  return n;
+}
+
+#endif /* CONFIG_LIBC_WCHAR */
diff --git a/libc/wchar/lib_wcrtomb.c b/libc/wchar/lib_wcrtomb.c
new file mode 100644
index 0000000000000000000000000000000000000000..3e130da6fe101f0ca4559cd7ad62854ded09264a
--- /dev/null
+++ b/libc/wchar/lib_wcrtomb.c
@@ -0,0 +1,81 @@
+/****************************************************************************
+ * libc/wchar/lib_wcrtomb.c
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: wcrtomb
+ *
+ * Description:
+ *   Convert a wide character to a multibyte sequence
+ *
+ ****************************************************************************/
+
+size_t wcrtomb(FAR char *s, wchar_t wc, FAR mbstate_t * ps)
+{
+  int retval = 0;
+  char buf[10];
+
+  if (s == NULL)
+    {
+      retval = wctomb((char *)buf, L'\0');
+    }
+  else
+    {
+      retval = wctomb(s, wc);
+    }
+
+  if (retval == -1)
+    {
+      return (size_t) (-1);
+    }
+  else
+    {
+      return (size_t) retval;
+    }
+}
+#endif
diff --git a/libc/wchar/lib_wcscmp.c b/libc/wchar/lib_wcscmp.c
new file mode 100644
index 0000000000000000000000000000000000000000..c16aa4362cf7108fb9359ac2fd4571a9d4b06e37
--- /dev/null
+++ b/libc/wchar/lib_wcscmp.c
@@ -0,0 +1,71 @@
+/****************************************************************************
+ * libc/wchar/lib_wcscmp.c
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: wcscmp
+ *
+ * Description:
+ *   The wcscmp() function returns zero if the wide-character strings at s1
+ *   and s2 are equal. It returns an integer greater than zero if at the first
+ *   differing position i, the corresponding wide-character s1[i] is greater
+ *   than s2[i].  It returns an integer less than zero if at the first differ-
+ *   ing position i, the corresponding wide-character s1[i] is less than s2[i]
+ *
+ ****************************************************************************/
+
+int wcscmp(FAR const wchar_t *s1, FAR const wchar_t *s2)
+{
+  while (*s1 == *s2++)
+    {
+      if (*s1++ == 0)
+        {
+          return (0);
+        }
+    }
+
+  return (*s1 - *--s2);
+}
+#endif
diff --git a/libc/wchar/lib_wcscoll.c b/libc/wchar/lib_wcscoll.c
new file mode 100644
index 0000000000000000000000000000000000000000..f0b543ff142f3b83616a2bd057773f6811fcdd8c
--- /dev/null
+++ b/libc/wchar/lib_wcscoll.c
@@ -0,0 +1,65 @@
+/****************************************************************************
+ * libc/wchar/lib_wcscoll.c
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: wcscoll
+ *
+ * Description:
+ *   The wcscoll() compares the wide-character string pointed to by a to the
+ *   wide-character string pointed to by b using an interpretation appropriate
+ *   to the current LC_COLLATE state.
+ *
+ *   The current implementation of wcscoll() simply uses wcscmp() and does
+ *   not support any language-specific sorting.
+ *
+ ****************************************************************************/
+
+int wcscoll(FAR const wchar_t *a, FAR const wchar_t *b)
+{
+  return wcscmp(a, b);
+}
+
+#endif /* CONFIG_LIBC_WCHAR */
diff --git a/libc/wchar/lib_wcsftime.c b/libc/wchar/lib_wcsftime.c
new file mode 100644
index 0000000000000000000000000000000000000000..70d3b55237b8f929b46eab80771c050ff0509452
--- /dev/null
+++ b/libc/wchar/lib_wcsftime.c
@@ -0,0 +1,57 @@
+/****************************************************************************
+ * libc/wchar/lib_wcsftime.c
+ *
+ *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Author: Alan Carvalho de Assis 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#ifdef CONFIG_LIBC_WCHAR
+size_t wcsftime(FAR wchar_t *s, size_t maxsize, FAR const wchar_t *format,
+                FAR const struct tm *tim_p)
+{
+  /* REVISIT: We can't just use the wide character string... We need to
+   * convert it to a normal C string first.
+   */
+
+  return strftime((FAR char *)s, maxsize, (FAR char *)format, tim_p);
+}
+#endif
diff --git a/libc/wchar/lib_wcslcpy.c b/libc/wchar/lib_wcslcpy.c
new file mode 100644
index 0000000000000000000000000000000000000000..3f0522f5048fa3f23e33b5b061fd40dc5bc91385
--- /dev/null
+++ b/libc/wchar/lib_wcslcpy.c
@@ -0,0 +1,93 @@
+/****************************************************************************
+ * libc/wchar/lib_wcslcpy.c
+ *
+ *   Copyright (c) 1998 Todd C. Miller 
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: wcslen
+ *
+ * Description:
+ *   Copy src to string dst of size siz.  At most siz-1 characters
+ *   will be copied.  Always NUL terminates (unless siz == 0).
+ *   Returns wcslen(src); if retval >= siz, truncation occurred.
+ *
+ ****************************************************************************/
+
+size_t wcslcpy(FAR wchar_t *dst, FAR const wchar_t *src, size_t siz)
+{
+  FAR wchar_t *d = dst;
+  FAR const wchar_t *s = src;
+  size_t n = siz;
+
+  /* Copy as many bytes as will fit */
+
+  if (n != 0 && --n != 0)
+    {
+      do
+        {
+          if ((*d++ = *s++) == 0)
+            {
+              break;
+            }
+        }
+      while (--n != 0);
+    }
+
+  /* Not enough room in dst, add NUL and traverse rest of src */
+
+  if (n == 0)
+    {
+      if (siz != 0)
+        {
+          *d = '\0';            /* NUL-terminate dst */
+        }
+      while (*s++);
+    }
+
+  return (s - src - 1);         /* count does not include NUL */
+}
+#endif
diff --git a/libc/wchar/lib_wcslen.c b/libc/wchar/lib_wcslen.c
new file mode 100644
index 0000000000000000000000000000000000000000..2a9a8adca78cc57a361c978bd3ea28e0d481865b
--- /dev/null
+++ b/libc/wchar/lib_wcslen.c
@@ -0,0 +1,69 @@
+/****************************************************************************
+ * libc/wchar/lib_wcslen.c
+ *
+ *   Copyright (c)1999 Citrus Project,
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	citrus Id: wcslen.c,v 1.1 1999/12/29 21:47:45 tshiozak Exp
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: wcslen
+ *
+ * Description:
+ *   The wcslen() function is the wide-character equivalent of the strlen()
+ *   function. It determines the length of the wide-character string pointed
+ *   to by s, excluding the terminating null wide character (L'\0').
+ *
+ ****************************************************************************/
+
+size_t wcslen(FAR const wchar_t *s)
+{
+  FAR const wchar_t *p;
+
+  p = s;
+  while (*p)
+    {
+      p++;
+    }
+
+  return p - s;
+}
+#endif
diff --git a/libc/wchar/lib_wcsnrtombs.c b/libc/wchar/lib_wcsnrtombs.c
new file mode 100644
index 0000000000000000000000000000000000000000..a77cdc685f385a529369c5bfb5e54b96f1aeab96
--- /dev/null
+++ b/libc/wchar/lib_wcsnrtombs.c
@@ -0,0 +1,93 @@
+/****************************************************************************
+ * libc/stdio/lib_asprintf.c
+ *
+ *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name:
+ *
+ * Description:
+ *   The 'wcsrtombs' function converts a string of wide characters
+ *   indirectly pointed to by 'src' to a corresponding multibyte character
+ *   string stored in the array pointed to by 'dst'.  No more than 'len'
+ *   bytes are written to'dst'.
+ *
+ *   If 'dst' is NULL, no characters are stored.
+ *
+ *   If 'dst' is not NULL, the pointer pointed to by 'src' is updated to
+ *   point to the character after the one that conversion stopped at.  If
+ *   conversion stops because a null character is encountered, *'src' is set
+ *   to NULL.
+ *
+ *   The mbstate_t argument, 'ps', is used to keep track of the shift state.
+ *   If it is NULL, 'wcsrtombs' uses an internal, static mbstate_t object,
+ *   which is initialized to the initial conversion state at program startup.
+ *
+ *   The 'wcsnrtombs' function behaves identically to 'wcsrtombs', except
+ *   that conversion stops after reading at most 'nwc' characters from the
+ *   buffer pointed to by 'src'.
+ *
+ * Returned Value:
+ *   The 'wcsrtombs' and 'wcsnrtombs' functions return the number of bytes
+ *   stored in the array pointed to by 'dst' (not including any terminating
+ *   null), if successful, otherwise it returns (size_t)-1.
+ *
+ * Portability:
+ *   'wcsrtombs' is defined by C99 standard.
+ *   'wcsnrtombs' is defined by the POSIX.1-2008 standard.
+ ****************************************************************************/
+
+size_t wcsnrtombs(FAR char *dst, FAR const wchar_t **src, size_t nwc,
+                  size_t len, mbstate_t *ps)
+{
+  return len;
+}
+
+#endif /* CONFIG_LIBC_WCHAR */
diff --git a/libc/wchar/lib_wcstod.c b/libc/wchar/lib_wcstod.c
new file mode 100644
index 0000000000000000000000000000000000000000..18982a9ccf696d9d1769be5f1367cabc7536fae6
--- /dev/null
+++ b/libc/wchar/lib_wcstod.c
@@ -0,0 +1,60 @@
+/****************************************************************************
+ * libc/wchar/lib_wcstod.c
+ *
+ *   Copyright (c)1999 Citrus Project,
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: wcstod
+ *
+ * Description:
+ *   The wcstod() function is the wide-character equivalent of the strtod()
+ *   function. It converts a wchar string to long long value.
+ *
+ ****************************************************************************/
+
+double wcstod(FAR const wchar_t *nptr, FAR wchar_t **endptr)
+{
+  return strtod((FAR const char *)nptr, (FAR char **)endptr);
+}
+
+#endif /* CONFIG_LIBC_WCHAR */
diff --git a/libc/wchar/lib_wcstof.c b/libc/wchar/lib_wcstof.c
new file mode 100644
index 0000000000000000000000000000000000000000..c380f21a8a53c7b32d46e4f6add2804f4d735e64
--- /dev/null
+++ b/libc/wchar/lib_wcstof.c
@@ -0,0 +1,60 @@
+/****************************************************************************
+ * libc/wchar/lib_wcstof.c
+ *
+ *   Copyright (c)1999 Citrus Project,
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: wcslen
+ *
+ * Description:
+ *   The wcstof() function is the wide-character equivalent of the strtof()
+ *   function. It converts a wchar string to long long value.
+ *
+ ****************************************************************************/
+
+float wcstof(FAR const wchar_t *nptr, FAR wchar_t **endptr)
+{
+  return strtof((FAR const char *)nptr, (FAR char **)endptr);
+}
+
+#endif /* CONFIG_LIBC_WCHAR */
diff --git a/libc/wchar/lib_wcstol.c b/libc/wchar/lib_wcstol.c
new file mode 100644
index 0000000000000000000000000000000000000000..06307707e8119188a9e11a7c4b801c0f536a8462
--- /dev/null
+++ b/libc/wchar/lib_wcstol.c
@@ -0,0 +1,60 @@
+/****************************************************************************
+ * libc/wchar/lib_wcstol.c
+ *
+ *   Copyright (c)1999 Citrus Project,
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: wcslen
+ *
+ * Description:
+ *   The wcstol() function is the wide-character equivalent of the strtol()
+ *   function. It converts a wchar string to long value.
+ *
+ ****************************************************************************/
+
+long int wcstol(FAR const wchar_t *nptr, FAR wchar_t **endptr, int base)
+{
+  return strtol((FAR const char *)nptr, (FAR char **)endptr, base);
+}
+
+#endif /* CONFIG_LIBC_WCHAR */
diff --git a/libc/wchar/lib_wcstold.c b/libc/wchar/lib_wcstold.c
new file mode 100644
index 0000000000000000000000000000000000000000..53eef077ab15dd517f15b8c99fb645643d8a471a
--- /dev/null
+++ b/libc/wchar/lib_wcstold.c
@@ -0,0 +1,60 @@
+/****************************************************************************
+ * libc/wchar/lib_wcstold.c
+ *
+ *   Copyright (c)1999 Citrus Project,
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: wcstold
+ *
+ * Description:
+ *   The wcstold() function is the wide-character equivalent of the strtold()
+ *   function. It converts a wchar string to long long value.
+ *
+ ****************************************************************************/
+
+long double wcstold(FAR const wchar_t *nptr, FAR wchar_t **endptr)
+{
+  return strtold((FAR const char *)nptr, (FAR char **)endptr);
+}
+
+#endif /* CONFIG_LIBC_WCHAR */
diff --git a/libc/wchar/lib_wcstoll.c b/libc/wchar/lib_wcstoll.c
new file mode 100644
index 0000000000000000000000000000000000000000..150f02aaa951c31f2dd314832335228672cba29e
--- /dev/null
+++ b/libc/wchar/lib_wcstoll.c
@@ -0,0 +1,60 @@
+/****************************************************************************
+ * libc/wchar/lib_wcstoll.c
+ *
+ *   Copyright (c)1999 Citrus Project,
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: wcstoll
+ *
+ * Description:
+ *   The wcstoll() function is the wide-character equivalent of the strtoll()
+ *   function.  It converts a wchar string to long long value.
+ *
+ ****************************************************************************/
+
+long long int wcstoll(FAR const wchar_t *nptr, FAR wchar_t **endptr, int base)
+{
+  return strtoll((FAR const char *)nptr, (FAR char **)endptr, base);
+}
+
+#endif /* CONFIG_LIBC_WCHAR */
diff --git a/libc/wchar/lib_wcstoul.c b/libc/wchar/lib_wcstoul.c
new file mode 100644
index 0000000000000000000000000000000000000000..1efe47941285a4db846d4eaefe1033ada8396655
--- /dev/null
+++ b/libc/wchar/lib_wcstoul.c
@@ -0,0 +1,60 @@
+/****************************************************************************
+ * libc/wchar/lib_wcstoul.c
+ *
+ *   Copyright (c)1999 Citrus Project,
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: wcstoul
+ *
+ * Description:
+ *   The wcstol() function is the wide-character equivalent of the strtol()
+ *   function. It converts a wchar string to long value.
+ *
+ ****************************************************************************/
+
+unsigned long int wcstoul(FAR const wchar_t *nptr, FAR wchar_t **endptr, int base)
+{
+  return strtoul((const char *)nptr, (char **)endptr, base);
+}
+
+#endif /* CONFIG_LIBC_WCHAR */
diff --git a/libc/wchar/lib_wcstoull.c b/libc/wchar/lib_wcstoull.c
new file mode 100644
index 0000000000000000000000000000000000000000..6803e5977dfc89d55dadced7ea47471dde8846d8
--- /dev/null
+++ b/libc/wchar/lib_wcstoull.c
@@ -0,0 +1,61 @@
+/****************************************************************************
+ * libc/wchar/lib_wcstoull.c
+ *
+ *   Copyright (c)1999 Citrus Project,
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: wcstoull
+ *
+ * Description:
+ *   The wcstoull() function is the wide-character equivalent of the strtoull()
+ *   function. It converts a wchar string to unsigned long long value.
+ *
+ ****************************************************************************/
+
+unsigned long long int wcstoull(FAR const wchar_t *nptr,
+                                FAR wchar_t **endptr, int base)
+{
+  return strtoull((FAR const char *)nptr, (FAR char **)endptr, base);
+}
+
+#endif /* CONFIG_LIBC_WCHAR */
diff --git a/libc/wchar/lib_wcsxfrm.c b/libc/wchar/lib_wcsxfrm.c
new file mode 100644
index 0000000000000000000000000000000000000000..e35ea8ff60fe4cc06fc9458dc998a3a11214b18f
--- /dev/null
+++ b/libc/wchar/lib_wcsxfrm.c
@@ -0,0 +1,65 @@
+/****************************************************************************
+ * libc/wchar/lib_wcsxfrm.c
+ *
+ *   Copyright (c)1999 Citrus Project,
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: wcsxfrm
+ *
+ * Description:
+ *   The wcsxfrm() transforms the wide-character string pointed to by b to the
+ *   wide-character string pointed to by a, comparing two transformed wide
+ *   strings with wcscmp() should return the same result as comparing the
+ *   original strings with wcscoll().
+ *   No more than n wide characters are transformed, including the trailing
+ *   null character. The current implementation of wcsxfrm() simply uses
+ *   wcslcpy() and does not support any language-specific transformations.
+ *
+ ****************************************************************************/
+
+size_t wcsxfrm(FAR wchar_t *a, FAR const wchar_t *b, size_t n)
+{
+  return wcslcpy(a, b, n);
+}
+#endif
diff --git a/libc/wchar/lib_wctob.c b/libc/wchar/lib_wctob.c
new file mode 100644
index 0000000000000000000000000000000000000000..1808bf9e0da899aa3952e7e5836b4382f57e7aa5
--- /dev/null
+++ b/libc/wchar/lib_wctob.c
@@ -0,0 +1,70 @@
+/****************************************************************************
+ * libc/wchar/lib_wctob.c
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef MB_LEN_MAX
+#  define MB_LEN_MAX 8
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+int wctob(wint_t wc)
+{
+  unsigned char pmb[MB_LEN_MAX];
+
+  if (wc == WEOF)
+    {
+      return EOF;
+    }
+
+  return wctomb((char *)pmb, wc) == 1 ? (int)pmb[0] : EOF;
+}
+#endif
diff --git a/libc/wchar/lib_wmemchr.c b/libc/wchar/lib_wmemchr.c
new file mode 100644
index 0000000000000000000000000000000000000000..d648146a6af632331424987f484347bbff9ff770
--- /dev/null
+++ b/libc/wchar/lib_wmemchr.c
@@ -0,0 +1,73 @@
+/****************************************************************************
+ * libc/wchar/lib_wmemchr.c
+ *
+ *   Copyright (c)1999 Citrus Project,
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: wmemchr
+ *
+ * Description:
+ *   The wmemchr() function is the wide-character equivalent of the memchr()
+ *   function. It searches the n wide characters starting at s for the first
+ *   occurrence of the wide character c.
+ *
+ ****************************************************************************/
+
+FAR wchar_t *wmemchr(FAR const wchar_t *s, wchar_t c, size_t n)
+{
+  size_t i;
+
+  for (i = 0; i < n; i++)
+    {
+      if (*s == c)
+        {
+          /* LINTED const castaway */
+
+          return (FAR wchar_t *) s;
+        }
+      s++;
+    }
+
+  return NULL;
+}
+#endif
diff --git a/libc/wchar/lib_wmemcmp.c b/libc/wchar/lib_wmemcmp.c
new file mode 100644
index 0000000000000000000000000000000000000000..05b473a09c72ab758c60d324593e66a3ab88edb2
--- /dev/null
+++ b/libc/wchar/lib_wmemcmp.c
@@ -0,0 +1,74 @@
+/****************************************************************************
+ * libc/wchar/lib_wmemcmp.c
+ *
+ *   Copyright (c)1999 Citrus Project,
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: wmemcmp
+ *
+ * Description:
+ *   The wmemcmp() function is the wide-character equivalent of the memcmp()
+ *   function. It compares the n wide-characters starting at s1 and the n
+ *   wide-characters starting at s2.
+ *
+ ****************************************************************************/
+
+int wmemcmp(FAR const wchar_t *s1, FAR const wchar_t *s2, size_t n)
+{
+  size_t i;
+
+  for (i = 0; i < n; i++)
+    {
+      if (*s1 != *s2)
+        {
+          /* wchar might be unsigned */
+
+          return *s1 > *s2 ? 1 : -1;
+        }
+
+      s1++;
+      s2++;
+    }
+
+  return 0;
+}
+#endif
diff --git a/libc/wchar/lib_wmemcpy.c b/libc/wchar/lib_wmemcpy.c
new file mode 100644
index 0000000000000000000000000000000000000000..96f12c62c0789a8e287a10245eec6d99c0bb6e74
--- /dev/null
+++ b/libc/wchar/lib_wmemcpy.c
@@ -0,0 +1,60 @@
+/****************************************************************************
+ * libc/wchar/lib_wmemcpy.c
+ *
+ *   Copyright (c)1999 Citrus Project,
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: wmemcpy
+ *
+ * Description:
+ *   This function is the wide-character equivalent of the memcpy function.
+ *   It copies n wide characters from the array starting at src to the array
+ *   starting at dest. The arrays may not overlap.
+ *
+ ****************************************************************************/
+
+FAR wchar_t *wmemcpy(FAR wchar_t *d, FAR const wchar_t *s, size_t n)
+{
+  return (FAR wchar_t *) memcpy(d, s, n * sizeof(wchar_t));
+}
+#endif
diff --git a/libc/wchar/lib_wmemmove.c b/libc/wchar/lib_wmemmove.c
new file mode 100644
index 0000000000000000000000000000000000000000..cbe986ab07ab19c355e7cdc1892fa7a268af4be8
--- /dev/null
+++ b/libc/wchar/lib_wmemmove.c
@@ -0,0 +1,59 @@
+/****************************************************************************
+ * libc/wchar/lib_wmemmove.c
+ *
+ *   Copyright (c)1999 Citrus Project,
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: wmemmove
+ *
+ * Description:
+ *   The wmemmove() function is the wide-character equivalent of the memmove()
+ *   function. It copies n wide characters from the array starting at src to
+ *   the array starting at dest.  The arrays may overlap.
+ *
+ ****************************************************************************/
+
+FAR wchar_t *wmemmove(FAR wchar_t *d, FAR const wchar_t *s, size_t n)
+{
+  return (FAR wchar_t *) memmove(d, s, n * sizeof(wchar_t));
+}
+#endif
diff --git a/libc/wchar/lib_wmemset.c b/libc/wchar/lib_wmemset.c
new file mode 100644
index 0000000000000000000000000000000000000000..55da0895012eeda00f7cabd87e4581554148aa39
--- /dev/null
+++ b/libc/wchar/lib_wmemset.c
@@ -0,0 +1,69 @@
+/****************************************************************************
+ * libc/wchar/lib_wmemset.c
+ *
+ *   Copyright (c)1999 Citrus Project,
+ *   All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: wmemset
+ *
+ * Description:
+ *   The  wmemset() function is the wide-character equivalent of the memset()
+ *   function. It fills the array of n wide-characters starting at s with n
+ *   copies of the wide character c.
+ *
+ ****************************************************************************/
+
+FAR wchar_t *wmemset(FAR wchar_t *s, wchar_t c, size_t n)
+{
+  FAR wchar_t *p;
+  size_t i;
+
+  p = (FAR wchar_t *) s;
+  for (i = 0; i < n; i++)
+    {
+      *p = c;
+      p++;
+    }
+
+  return s;
+}
+#endif
diff --git a/libc/wctype/Make.defs b/libc/wctype/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..aa94e9716b2aa51125d5930dab9bc8e34b46b927
--- /dev/null
+++ b/libc/wctype/Make.defs
@@ -0,0 +1,47 @@
+############################################################################
+# libc/wctype/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+ifeq ($(CONFIG_LIBC_WCHAR),y)
+
+# Add the internal C files to the build
+
+CSRCS += lib_wctype.c lib_iswctype.c lib_towlower.c lib_towupper.c
+
+# Add the wctype directory to the build
+
+DEPPATH += --dep-path wctype
+VPATH += :wctype
+
+endif
diff --git a/libc/wctype/lib_iswctype.c b/libc/wctype/lib_iswctype.c
new file mode 100644
index 0000000000000000000000000000000000000000..8c3185250d5f20eab5be93eaca8ff75fe72a9cae
--- /dev/null
+++ b/libc/wctype/lib_iswctype.c
@@ -0,0 +1,161 @@
+/****************************************************************************
+ * libc/wctype/lib_iswctype.c
+ *
+ *    Copyright (c) 2002 Red Hat Incorporated.
+ *    All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *   Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ *
+ *   Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ *
+ *   The name of Red Hat Incorporated may not be used to endorse
+ *   or promote products derived from this software without specific
+ *   prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL RED HAT INCORPORATED BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+int iswalnum(wint_t c)
+{
+  return (iswalpha(c) || iswdigit(c));
+}
+
+int iswalpha(wint_t c)
+{
+  return (c < (wint_t)0x100 ? isalpha(c) : 0);
+}
+
+int iswblank(wint_t c)
+{
+  return (c < (wint_t)0x100 ? isblank(c) : 0);
+}
+
+int iswcntrl(wint_t c)
+{
+  return (c < (wint_t)0x100 ? iscntrl(c) : 0);
+}
+
+int iswdigit(wint_t c)
+{
+  return (c >= (wint_t)'0' && c <= (wint_t)'9');
+}
+
+int iswgraph(wint_t c)
+{
+  return (iswprint(c) && !iswspace(c));
+}
+
+int iswlower(wint_t c)
+{
+  return (towupper(c) != c);
+}
+
+int iswprint(wint_t c)
+{
+  return (c < (wint_t) 0x100 ? isprint(c) : 0);
+}
+
+int iswpunct(wint_t c)
+{
+  return (!iswalnum(c) && iswgraph(c));
+}
+
+int iswspace(wint_t c)
+{
+  return (c < 0x100 ? isspace(c) : 0);
+}
+
+int iswupper(wint_t c)
+{
+  return (towlower(c) != c);
+}
+
+int iswxdigit(wint_t c)
+{
+  return ((c >= (wint_t)'0' && c <= (wint_t)'9') ||
+          (c >= (wint_t)'a' && c <= (wint_t)'f') ||
+          (c >= (wint_t)'A' && c <= (wint_t)'F'));
+}
+
+int iswctype(wint_t c, wctype_t desc)
+{
+  switch (desc)
+    {
+    case WC_ALNUM:
+      return iswalnum(c);
+
+    case WC_ALPHA:
+      return iswalpha(c);
+
+    case WC_BLANK:
+      return iswblank(c);
+
+    case WC_CNTRL:
+      return iswcntrl(c);
+
+    case WC_DIGIT:
+      return iswdigit(c);
+
+    case WC_GRAPH:
+      return iswgraph(c);
+
+    case WC_LOWER:
+      return iswlower(c);
+
+    case WC_PRINT:
+      return iswprint(c);
+
+    case WC_PUNCT:
+      return iswpunct(c);
+
+    case WC_SPACE:
+      return iswspace(c);
+
+    case WC_UPPER:
+      return iswupper(c);
+
+    case WC_XDIGIT:
+      return iswxdigit(c);
+
+    default:
+      return 0;                 /* eliminate warning */
+    }
+
+  /* Otherwise unknown */
+
+  return 0;
+}
+#endif
diff --git a/libc/wctype/lib_towlower.c b/libc/wctype/lib_towlower.c
new file mode 100644
index 0000000000000000000000000000000000000000..0da9c37748924b5b1634734aa0225fc948039654
--- /dev/null
+++ b/libc/wctype/lib_towlower.c
@@ -0,0 +1,66 @@
+/****************************************************************************
+ * libc/wchar/lib_towlower.c
+ *
+ *    Copyright (c) 2002 Red Hat Incorporated.
+ *    All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *   Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ *
+ *   Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ *
+ *   The name of Red Hat Incorporated may not be used to endorse
+ *   or promote products derived from this software without specific
+ *   prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL RED HAT INCORPORATED BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: towlower
+ *
+ * Description:
+ *   The  towlower() function is the wide-character equivalent of the
+ *   tolower() function.  If c is an uppercase wide character, and there
+ *   exists a lowercase equivalent in the current locale, it returns the
+ *   lowercase  equivalent  of c. This current code don't use locale.
+ *
+ ****************************************************************************/
+
+wint_t towlower(wint_t c)
+{
+  return (c < (wint_t)0x00ff ? (wint_t)tolower((int)c) : c);
+}
+#endif
diff --git a/libc/wctype/lib_towupper.c b/libc/wctype/lib_towupper.c
new file mode 100644
index 0000000000000000000000000000000000000000..ee86a56dad374d52afaf34fa6c2de86ff0bf6417
--- /dev/null
+++ b/libc/wctype/lib_towupper.c
@@ -0,0 +1,66 @@
+/****************************************************************************
+ * libc/wchar/lib_towupper.c
+ *
+ *    Copyright (c) 2002 Red Hat Incorporated.
+ *    All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *   Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ *
+ *   Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ *
+ *   The name of Red Hat Incorporated may not be used to endorse
+ *   or promote products derived from this software without specific
+ *   prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL RED HAT INCORPORATED BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: towupper
+ *
+ * Description:
+ *   The  towupper() function is the wide-character equivalent of the
+ *   toupper() function.  If c is an lowercase wide character, and there
+ *   exists a uppercase equivalent in the current locale, it returns the
+ *   uppercase  equivalent  of c. This current code don't use locale.
+ *
+ ****************************************************************************/
+
+wint_t towupper(wint_t c)
+{
+  return (c < (wint_t)0x00ff ? (wint_t)toupper((int)c) : c);
+}
+#endif
diff --git a/libc/wctype/lib_wctype.c b/libc/wctype/lib_wctype.c
new file mode 100644
index 0000000000000000000000000000000000000000..99df9453ad60f5b1adbf56033195ad2ed87c3c78
--- /dev/null
+++ b/libc/wctype/lib_wctype.c
@@ -0,0 +1,145 @@
+/****************************************************************************
+ * libc/wctype/wctype.c
+ *
+ *    Copyright (c) 2002 Red Hat Incorporated.
+ *    All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *   Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ *
+ *   Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ *
+ *   The name of Red Hat Incorporated may not be used to endorse
+ *   or promote products derived from this software without specific
+ *   prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL RED HAT INCORPORATED BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS   
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_LIBC_WCHAR
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+wctype_t wctype(FAR const char *c)
+{
+  switch (*c)
+    {
+    case 'a':
+      if (!strcmp(c, "alnum"))
+        {
+          return WC_ALNUM;
+        }
+      else if (!strcmp(c, "alpha"))
+        {
+          return WC_ALPHA;
+        }
+
+      break;
+
+    case 'b':
+      if (!strcmp(c, "blank"))
+        {
+          return WC_BLANK;
+        }
+
+      break;
+
+    case 'c':
+      if (!strcmp(c, "cntrl"))
+        {
+          return WC_CNTRL;
+        }
+
+      break;
+
+    case 'd':
+      if (!strcmp(c, "digit"))
+        {
+          return WC_DIGIT;
+        }
+
+      break;
+
+    case 'g':
+      if (!strcmp(c, "graph"))
+        {
+          return WC_GRAPH;
+        }
+
+      break;
+
+    case 'l':
+      if (!strcmp(c, "lower"))
+        {
+          return WC_LOWER;
+        }
+
+      break;
+
+    case 'p':
+      if (!strcmp(c, "print"))
+        {
+          return WC_PRINT;
+        }
+      else if (!strcmp(c, "punct"))
+        {
+          return WC_PUNCT;
+        }
+
+      break;
+
+    case 's':
+      if (!strcmp(c, "space"))
+        {
+          return WC_SPACE;
+        }
+
+      break;
+
+    case 'u':
+      if (!strcmp(c, "upper"))
+        {
+          return WC_UPPER;
+        }
+
+      break;
+
+    case 'x':
+      if (!strcmp(c, "xdigit"))
+        {
+          return WC_XDIGIT;
+        }
+
+      break;
+    }
+
+  return 0;
+}
+#endif
diff --git a/libc/wqueue/Kconfig b/libc/wqueue/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..e6c8a0a5e6f24e0258a587e730b4d6953ec1a822
--- /dev/null
+++ b/libc/wqueue/Kconfig
@@ -0,0 +1,38 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+menu "User Work Queue Support"
+	depends on (BUILD_PROTECTED || BUILD_KERNEL) && !DISABLE_SIGNALS
+
+config LIB_USRWORK
+	bool "User mode worker thread"
+	default n
+	---help---
+		User space work queues can also be made available for deferred
+		processing in the NuttX kernel build.
+
+if LIB_USRWORK
+
+config LIB_USRWORKPRIORITY
+	int "User mode priority worker thread priority"
+	default 100
+	---help---
+		The execution priority of the user-mode priority worker thread.  Default: 100
+
+config LIB_USRWORKPERIOD
+	int "User mode worker thread period"
+	default 100000
+	---help---
+		How often the lower priority worker thread checks for work in units
+		of microseconds. Default: 100*1000 (100 MS).
+
+config LIB_USRWORKSTACKSIZE
+	int "User mode worker thread stack size"
+	default 2048
+	---help---
+		The stack size allocated for the lower priority worker thread.  Default: 2K.
+
+endif # LIB_USRWORK
+endmenu # User Work Queue Support
diff --git a/libc/zoneinfo/.gitignore b/libc/zoneinfo/.gitignore
new file mode 100644
index 0000000000000000000000000000000000000000..91d1ddb7d02d65c013b294e51d78ae1648e94a8e
--- /dev/null
+++ b/libc/zoneinfo/.gitignore
@@ -0,0 +1,10 @@
+/.built
+/.tzbuilt
+/.tzunpack
+/romfs_zoneinfo.img
+/romfs_zoneinfo.h
+/tzbin
+/tzcode-latest.tar.gz
+/tzcode
+/tzdata-latest.tar.gz
+
diff --git a/libc/zoneinfo/Makefile b/libc/zoneinfo/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..2be9c649a1056179008c11d9f768d3e0623b20bd
--- /dev/null
+++ b/libc/zoneinfo/Makefile
@@ -0,0 +1,157 @@
+############################################################################
+# libc/zoneinfo/Makefile
+#
+#   Copyright (C) 2015-2016, Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/.config
+-include $(TOPDIR)/Make.defs
+
+ifeq ($(WINTOOL),y)
+INCDIROPT = -w
+endif
+
+# Zoneinfo database
+
+ASRCS =
+CSRCS =
+
+ifeq ($(CONFIG_LIB_ZONEINFO_ROMFS),y)
+CSRCS += tzromfs.c
+endif
+
+AOBJS = $(ASRCS:.S=$(OBJEXT))
+COBJS = $(CSRCS:.c=$(OBJEXT))
+
+SRCS = $(ASRCS) $(CSRCS)
+OBJS = $(AOBJS) $(COBJS)
+
+ZONEINFO_PATH = $(TOPDIR)/libc/zoneinfo
+TZBIN_PATH = $(ZONEINFO_PATH)/tzbin
+TZCODE_PATH = $(ZONEINFO_PATH)/tzcode
+
+ROOTDEPPATH = --dep-path .
+
+# Common build
+
+VPATH =
+
+all: .built
+.PHONY: romfs register context depend clean distclean
+
+$(AOBJS): %$(OBJEXT): %.S
+	$(call ASSEMBLE, $<, $@)
+
+$(COBJS): %$(OBJEXT): %.c
+	$(call COMPILE, $<, $@)
+
+.built: .tzbuilt romfs $(OBJS)
+	$(call ARCHIVE, ..$(DELIM)$(BIN), $(OBJS))
+	$(Q) touch .built
+
+# ROMFS file system containing the TZ database
+
+ifeq ($(CONFIG_LIB_ZONEINFO_ROMFS),y)
+
+checkgenromfs:
+	@genromfs -h 1>/dev/null 2>&1 || { \
+ echo "Host executable genromfs not available in PATH"; \
+ echo "You may need to download in from http://romfs.sourceforge.net/"; \
+ exit 1; \
+	}
+
+romfs_zoneinfo.img : checkgenromfs .tzbuilt
+	@genromfs -f $@ -d $(TZBIN_PATH)/etc/zoneinfo -V "TZDatbase" || { echo "genromfs failed" ; exit 1 ; }
+
+romfs_zoneinfo.h : romfs_zoneinfo.img
+	@xxd -i $< >$@ || { echo "xxd of $< failed" ; exit 1 ; }
+
+romfs: romfs_zoneinfo.h
+
+else
+
+romfs:
+
+endif # CONFIG_LIB_ZONEINFO_ROMFS
+
+# Build TZ database
+
+tzcode:
+	mkdir tzcode
+
+tzbin:
+	mkdir tzbin
+
+tzcode-latest.tar.gz:
+	$(Q) wget --retr-symlinks ftp://ftp.iana.org/tz/tzcode-latest.tar.gz
+
+tzdata-latest.tar.gz:
+	$(Q) wget --retr-symlinks ftp://ftp.iana.org/tz/tzdata-latest.tar.gz
+
+.tzunpack: tzcode tzcode-latest.tar.gz tzdata-latest.tar.gz
+	$(Q) tar zx -C tzcode -f tzcode-latest.tar.gz
+	$(Q) tar zx -C tzcode -f tzdata-latest.tar.gz
+	$(Q) touch .tzunpack
+
+.tzbuilt: tzcode tzbin .tzunpack
+	$(Q) $(MAKE) -C tzcode TOPDIR=$(TZBIN_PATH) install
+	$(Q) touch .tzbuilt
+
+# Create initial context
+
+context: .tzbuilt romfs
+
+# Create dependencies
+
+.depend: Makefile $(SRCS)
+	$(Q) $(MKDEP) $(ROOTDEPPATH) "$(CC)" -- $(CFLAGS) -- $(SRCS) >Make.dep
+	$(Q) touch $@
+
+depend: .depend
+
+clean:
+	$(call DELFILE, .built)
+	$(call CLEAN)
+
+distclean: clean
+	$(call DELFILE, Make.dep)
+	$(call DELFILE, .depend)
+	$(call DELFILE, .tzunpack)
+	$(call DELFILE, .tzbuilt)
+	$(call DELFILE, romfs_zoneinfo.img)
+	$(call DELFILE, romfs_zoneinfo.h)
+	$(call DELFILE, tzdata-latest.tar.gz)
+	$(call DELFILE, tzcode-latest.tar.gz)
+	$(call DELDIR, tzbin)
+	$(call DELDIR, tzcode)
+
+-include Make.dep
diff --git a/libc/zoneinfo/README.txt b/libc/zoneinfo/README.txt
new file mode 100644
index 0000000000000000000000000000000000000000..9ceb5de809353fb44056004d2a856d053785f063
--- /dev/null
+++ b/libc/zoneinfo/README.txt
@@ -0,0 +1,180 @@
+apps/system/zoninfo/README.txt
+Author: Gregory Nutt 
+
+Directory Contents
+==================
+
+This directory contains logic to create a version of the TZ/Olson database.
+This database is required if localtime() support is selected via
+CONFIG_LIBC_LOCALTIME.  This logic in this directory does the following:
+
+  - It downloads the current TZ database from the IANA website
+  - It downloads the current timezone tools from the same location
+  - It builds the tools and constructs the binary TZ database
+  - It will then, optionally, build a ROMFS filesystem image containing
+    the data base.
+
+Creating and Mounting a ROMFS TZ Database
+=========================================
+
+The ROMFS filesystem image can that be mounted during the boot-up sequence
+so that it is available for the localtime() logic.  There are two steps to
+doing this:
+
+  - First, a ROM disk device must be created.  This is done by calling
+    the function romdisk_register() as described in
+    nuttx/include/nuttx/drivers/ramdisk.h.  This is an OS level operation
+    and must be done in the board-level logic before your application
+    starts.
+
+    romdisk_register() will create a block driver at /dev/ramN where N
+    is the device minor number that was provided to romdisk_regsiter.
+
+  - The second step is to mount the file system.  This step can be
+    performed either in your board configuration logic or by your
+    application using the mount() interface described in
+    nuttx/include/sys/mount.h.
+
+    These steps, however, must be done very early in initialization,
+    before there is any need for time-related services.
+
+Both of these steps are shown together in the following code sample at the
+end of this README file.
+
+Example Configuration
+=====================
+
+I have tested this using the sim/nsh configuration.  Here are the
+modifications to the configuration that I used for testing:
+
+  CONFIG_BOARD_INITIALIZE=y
+
+  CONFIG_LIBC_LOCALTIME=y
+  CONFIG_LIBC_TZDIR="/share/zoneinfo"
+  CONFIG_LIBC_TZ_MAX_TIMES=370
+  CONFIG_LIBC_TZ_MAX_TYPES=20
+
+  CONFIG_LIB_ZONEINFO=y
+  CONFIG_LIB_ZONEINFO_ROMFS=y
+
+NOTE:  The full TZ database is quite large.  To create a reasonable sized
+ROMFS image, I had to trim some of the files like this:
+
+  cd nuttx
+  cd tools
+  ./configure.sh sim/nsh
+  cd ..
+  make menuconfig
+
+Select the above localtime() and nuttx/zoneinfo configuration settings.
+Then:
+
+  make context
+  cd ../nuttx/zoneinfo/tzbin/etc/zoneinfo
+
+Remove as many timezone files as you can.  Do not remove the GMT, localtime,
+or posixrules files.  Those might be needed in any event.  Then you can
+force rebuilding of the ROMFS filesystem be removing some files:
+
+  cd ../../..
+  rm romfs_zoneinfo.*
+  rm *.o
+  cd ../../nuttx
+  make
+
+If you have problems building the simulator on your platform, check out
+nuttx/configs/sim/README.txt.  You might find some help there.
+
+Here is a sample run.  I have not seen any errors in single stepping through
+the logic but neither am I certain that everything is working properly:
+
+  NuttShell (NSH)
+  nsh> date
+  Jul 01 00:00:02 2008
+  nsh> set TZ US/Mountain
+  nsh> date -s "Apr 11 11:53:00 2015"
+  nsh> date
+  Apr 11 17:53:00 2015
+
+NOTE: Because of daylight savings time, US/Mountain is GMT-6 on Apr 11.  The
+above suggests that perhaps the NSH data command may be setting local time,
+but printing GMT time?
+
+Sample Code to Mount the ROMFS Filesystem
+=========================================
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef CONFIG_LIBC_TZDIR
+#  errror CONFIG_LIBC_TZDIR is not defined
+#endif
+
+#ifdef CONFIG_DISABLE_MOUNTPOINT
+#  error "Mountpoint support is disabled"
+#endif
+
+#if CONFIG_NFILE_DESCRIPTORS < 4
+#  error "Not enough file descriptors"
+#endif
+
+#ifndef CONFIG_FS_ROMFS
+#  error "ROMFS support not enabled"
+#endif
+
+#define SECTORSIZE  64
+#define NSECTORS(b) (((b)+SECTORSIZE-1)/SECTORSIZE)
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+int mount_zoneinfo(int minor)
+{
+   char devname[32];
+   int  ret;
+
+  /* Create a RAM disk for the test */
+
+  ret = romdisk_register(minor, romfs_zoneinfo_img,
+                         NSECTORS(romfs_zoneinfo_img_len), SECTORSIZE);
+  if (ret < 0)
+    {
+      printf("ERROR: Failed to create RAM disk\n");
+      return ret;
+    }
+
+  /* Use the minor number to create a name for the ROM disk block device */
+
+  snprintf(devname, 32, "/dev/ram%d", minor);
+
+  /* Mount the ROMFS file system */
+
+  printf("Mounting ROMFS filesystem at target=%s with source=%s\n",
+         CONFIG_LIBC_TZDIR, devname);
+
+  ret = mount(devname, CONFIG_LIBC_TZDIR, "romfs", MS_RDONLY, NULL);
+  if (ret < 0)
+    {
+      printf("ERROR: Mount failed: %d\n", errno);
+      return ret;
+    }
+
+  printf("TZ database mounted at %s\n", CONFIG_LIBC_TZDIR);
+  return OK;
+}
diff --git a/libc/zoneinfo/tzromfs.c b/libc/zoneinfo/tzromfs.c
new file mode 100644
index 0000000000000000000000000000000000000000..64d71ebe51b18377305d53bdf5e3b558defa5cd6
--- /dev/null
+++ b/libc/zoneinfo/tzromfs.c
@@ -0,0 +1,51 @@
+/****************************************************************************
+ * libc/zoneinfo/tzromfs.c
+ *
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#include "romfs_zoneinfo.h"
diff --git a/libnx/Makefile b/libnx/Makefile
index 295d64e85d55cf4c50d998100a09cc91c3bdfc5c..af0da579f4271509d685f5fef996574384c1ed22 100644
--- a/libnx/Makefile
+++ b/libnx/Makefile
@@ -225,6 +225,10 @@ ifeq ($(CONFIG_NXFONT_X11_MISC_FIXED_10X20),y)
 	$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=42 EXTRADEFINES=$(EXTRADEFINES)
 endif
 
+ifeq ($(CONFIG_NXFONT_TOM_THUMB_4X6),y)
+	$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=43 EXTRADEFINES=$(EXTRADEFINES)
+endif
+
 gensources: gen1bppsources gen2bppsource gen4bppsource gen8bppsource gen16bppsource gen24bppsource gen32bppsources genfontsources
 
 $(AOBJS): $(BINDIR)$(DELIM)%$(OBJEXT): %.S
diff --git a/libnx/nx/nx_drawline.c b/libnx/nx/nx_drawline.c
index 49046be94b0287fdd33edfa2a44f2398cb98f71b..6ca0ade436ee71ca49c1ebc6a1b0be2e28af1f4a 100644
--- a/libnx/nx/nx_drawline.c
+++ b/libnx/nx/nx_drawline.c
@@ -99,7 +99,7 @@ int nx_drawline(NXWINDOW hwnd, FAR struct nxgl_vector_s *vector,
   struct nxgl_rect_s rect;
   int ret;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hwnd || !vector || width < 1 || !color)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxfonts/Make.defs b/libnx/nxfonts/Make.defs
index cc3bb80f811791305b1177087a84f89a135b1132..fee5f77baa554a2f1dc751cc5ddb08cb77a90832 100644
--- a/libnx/nxfonts/Make.defs
+++ b/libnx/nxfonts/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # libnx/nxfonts/Make.defs
 #
-#   Copyright (C) 2008, 2013 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2008, 2013, 2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -37,7 +37,7 @@
 
 ifeq ($(CONFIG_NX),y)
 
-CSRCS += nxfonts_getfont.c
+CSRCS += nxfonts_getfont.c nxfonts_cache.c
 CSRCS += nxfonts_convert_1bpp.c nxfonts_convert_2bpp.c
 CSRCS += nxfonts_convert_4bpp.c nxfonts_convert_8bpp.c
 CSRCS += nxfonts_convert_16bpp.c nxfonts_convert_24bpp.c
@@ -225,7 +225,11 @@ ifeq ($(CONFIG_NXFONT_X11_MISC_FIXED_10X20),y)
 CSRCS += nxfonts_bitmaps_x11-misc-fixed-10x20.c
 endif
 
+# Tom Thumb mono-space 4x6 font
 
+ifeq ($(CONFIG_NXFONT_TOM_THUMB_4X6),y)
+CSRCS += nxfonts_tom-thumb-4x6.c
+endif
 
 # Add the nxfont/ directory to the build
 
diff --git a/libnx/nxfonts/Makefile.sources b/libnx/nxfonts/Makefile.sources
index 7df446bda05b369a680dacefa243f739a50f020c..5c079cddcc1346b9f28d3e5ade469b62f430b46d 100644
--- a/libnx/nxfonts/Makefile.sources
+++ b/libnx/nxfonts/Makefile.sources
@@ -1,7 +1,7 @@
 ############################################################################
 # libnx/nxfonts/Makefile.sources
 #
-#   Copyright (C) 2008, 2013 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2008, 2013, 2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -296,6 +296,12 @@ NXFONTS_PREFIX := g_x11_misc_fixed_10x20_
 GEN_CSRC = nxfonts_bitmaps_x11-misc-fixed-10x20.c
 endif
 
+# Tom Thumb mono-space 4x6 font
+
+ifeq ($(NXFONTS_FONTID),43)
+NXFONTS_PREFIX := g_tom_thumb_4x6_
+GEN_CSRC = nxfonts_tom-thumb-4x6.c
+endif
 
 DEPENDENCY := nxfonts_bitmaps.c
 CPPFLAGS += -DNXFONTS_FONTID=$(NXFONTS_FONTID)
diff --git a/libnx/nxfonts/nxfonts.h b/libnx/nxfonts/nxfonts.h
index 1e3fa18bb3f89e36036ebf498dc33c4b49fda47f..1d8a348903eeaf08c5ea71f88dff6dbe7c8ac216 100644
--- a/libnx/nxfonts/nxfonts.h
+++ b/libnx/nxfonts/nxfonts.h
@@ -54,10 +54,6 @@
 #  define CONFIG_NXFONTS_CHARBITS 7
 #endif
 
-/****************************************************************************
- * Public Types
- ****************************************************************************/
-
 /****************************************************************************
  * Public Data
  ****************************************************************************/
@@ -65,7 +61,8 @@
 #undef EXTERN
 #if defined(__cplusplus)
 # define EXTERN extern "C"
-extern "C" {
+extern "C"
+{
 #else
 # define EXTERN extern
 #endif
diff --git a/libnx/nxfonts/nxfonts_bitmaps.c b/libnx/nxfonts/nxfonts_bitmaps.c
index 28e6aa18dcc3395c04da52118a1d9bf8b0e91e09..b9a6fc1ca42e045bd24aca08978557a79d5b2fa3 100644
--- a/libnx/nxfonts/nxfonts_bitmaps.c
+++ b/libnx/nxfonts/nxfonts_bitmaps.c
@@ -130,6 +130,8 @@
 #  include "nxfonts_x11-misc-fixed-9x18B.h"
 #elif NXFONTS_FONTID == 42
 #  include "nxfonts_x11-misc-fixed-10x20.h"
+#elif NXFONTS_FONTID == 43
+#  include "nxfonts_tom-thumb-4x6.h"
 #else
 #  error "No font ID specified"
 #endif
diff --git a/libnx/nxfonts/nxfonts_cache.c b/libnx/nxfonts/nxfonts_cache.c
new file mode 100644
index 0000000000000000000000000000000000000000..9d45827826a16d0164d77446dd14fe5aed651a91
--- /dev/null
+++ b/libnx/nxfonts/nxfonts_cache.c
@@ -0,0 +1,935 @@
+/****************************************************************************
+ * libnx/nxfonts/nxfonts_cache.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "nxcontext.h"
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* This describes a rendering function */
+
+typedef CODE int (*nxf_renderer_t)(FAR nxgl_mxpixel_t *dest, uint16_t height,
+                                   uint16_t width, uint16_t stride,
+                                   FAR const struct nx_fontbitmap_s *bm,
+                                   nxgl_mxpixel_t color);
+
+/* This structure defines one font cache */
+
+struct nxfonts_fcache_s
+{
+  FAR struct nxfonts_fcache_s *flink;  /* Supports a singly linked list */
+  NXHANDLE font;                       /* Font handle associated with fontid */
+  sem_t fsem;                          /* Serializes access to the font cache */
+  uint16_t fontid;                     /* ID of font in this cache */
+  int16_t fclients;                    /* Number of connected clients */
+  uint8_t maxglyphs;                   /* Maximum size of glyph[] array */
+  uint8_t nglyphs;                     /* Current size of glyph[] array */
+  uint8_t bpp;                         /* Bits per pixel */
+  nxgl_mxpixel_t fgcolor;              /* Foreground color */
+  nxgl_mxpixel_t bgcolor;              /* Background color */
+  nxf_renderer_t renderer;             /* Font renderer */
+
+  /* Glyph cache data storage */
+
+  FAR struct nxfonts_glyph_s *head;    /* Head of the list of glyphs */
+  FAR struct nxfonts_glyph_s *tail;    /* Tail of the list of glyphs */
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Head of a list of font caches */
+
+static FAR struct nxfonts_fcache_s *g_fcaches;
+static sem_t g_cachesem = SEM_INITIALIZER(1);
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: nxf_list_lock and nxf_list_unlock
+ *
+ * Description:
+ *   Get/relinquish exclusive access to the font cache list
+ *
+ ****************************************************************************/
+
+static void nxf_list_lock(void)
+{
+  int ret;
+
+  /* Get exclusive access to the font cache */
+
+  while ((ret = sem_wait(&g_cachesem)) < 0)
+    {
+      int errorcode = errno;
+      DEBUGASSERT(errorcode == EINTR || errorcode == ECANCELED);
+      UNUSED(errorcode);
+    }
+}
+
+#define nxf_list_unlock() (sem_post(&g_cachesem))
+
+/****************************************************************************
+ * Name: nxf_removecache
+ *
+ * Description:
+ *   Removes the entry 'glyph' from the font cache.
+ *
+ * Assumptions:
+ *   The caller holds the font cache list semaphore.
+ *
+ ****************************************************************************/
+
+static inline void nxf_removecache(FAR struct nxfonts_fcache_s *fcache,
+                                   FAR struct nxfonts_fcache_s *prev)
+{
+  /* Remove the cache for the list.  First check for removal from the head */
+
+  if (prev == NULL)
+    {
+      /* Replace the head with the node following glyph */
+
+      g_fcaches = fcache->flink;
+    }
+
+  /* No.. Remove from the head or from mid-list */
+
+  else
+    {
+      prev->flink = fcache->flink;
+    }
+
+  fcache->flink = NULL;
+}
+
+/****************************************************************************
+ * Name: nxf_cache_lock and nxf_cache_unlock
+ *
+ * Description:
+ *   Get/relinquish exclusive access to the font cache
+ *
+ ****************************************************************************/
+
+static void nxf_cache_lock(FAR struct nxfonts_fcache_s *priv)
+{
+  int ret;
+
+  /* Get exclusive access to the font cache */
+
+  while ((ret = sem_wait(&priv->fsem)) < 0)
+    {
+      int errorcode = errno;
+      DEBUGASSERT(errorcode == EINTR || errorcode == ECANCELED);
+      UNUSED(errorcode);
+    }
+}
+
+#define nxf_cache_unlock(p) (sem_post(&priv->fsem))
+
+/****************************************************************************
+ * Name: nxf_removeglyph
+ *
+ * Description:
+ *   Removes the entry 'glyph' from the font cache.
+ *
+ ****************************************************************************/
+
+static inline void nxf_removeglyph(FAR struct nxfonts_fcache_s *priv,
+                                   FAR struct nxfonts_glyph_s *glyph,
+                                   FAR struct nxfonts_glyph_s *prev)
+{
+  ginfo("fcache=%p glyph=%p\n", priv, glyph);
+
+  /* Remove the glyph for the list.  First check for removal from the head
+   * (which, I think, never actually happens).
+   */
+
+  if (prev == NULL)
+    {
+      /* Replace the head with the node following glyph */
+
+      priv->head = glyph->flink;
+
+      /* If there is no node following glyph, then the list is empty */
+
+      if (priv->head == NULL)
+        {
+          priv->tail = NULL;
+        }
+    }
+
+  /* Check for removal from the tail (we know that the list cannot become
+   * empty in either of the next two cases).
+   */
+
+  else if (glyph->flink == NULL)
+    {
+      priv->tail = prev;
+      prev->flink = NULL;
+    }
+
+  /* No.. Remove from mid-list */
+
+  else
+    {
+      prev->flink = glyph->flink;
+    }
+
+  glyph->flink = NULL;
+
+  /* Decrement the count of glyphs in the font cache */
+
+  DEBUGASSERT(priv->nglyphs > 0);
+  priv->nglyphs--;
+}
+
+/****************************************************************************
+ * Name: nxf_addglyph
+ *
+ * Description:
+ *   Add the entry 'glyph' to the head font cache list.
+ *
+ ****************************************************************************/
+
+static inline void nxf_addglyph(FAR struct nxfonts_fcache_s *priv,
+                                FAR struct nxfonts_glyph_s *glyph)
+{
+  ginfo("fcache=%p glyph=%p\n", priv, glyph);
+
+  /* Add the glyph to the head of the list */
+
+  glyph->flink = priv->head;
+
+  if (priv->head == NULL)
+    {
+      priv->tail = glyph;
+    }
+
+  priv->head = glyph;
+
+  /* Increment the count of glyphs in the font cache. */
+
+  DEBUGASSERT(priv->nglyphs < priv->maxglyphs);
+  priv->nglyphs++;
+}
+
+/****************************************************************************
+ * Name: nxf_findglyph
+ *
+ * Description:
+ *   Find the glyph for the specific character 'ch' in the list of pre-
+ *   rendered fonts in the font cache.
+ *
+ *   This is logically a part of nxf_cache_getglyph().  nxf_cache_getglyph()
+ *   will attempt to find the cached glyph before rendering a new one.  So
+ *   this function has two unexpected side-effects:  (1) If the font cache
+ *   is full and the font is not found, then the least-recently-used glyph
+ *   is deleted to make space for the new glyph that will be allocated.
+ *
+ *   (2) If the glyph is found, then it is moved to the head of the list of
+ *   glyphs since it is now the most recently used (leaving the least
+ *   recently used glyph at the tail of the list).
+ *
+ * Assumptions:
+ *   The caller has exclusive access to the font cache.
+ *
+ ****************************************************************************/
+
+static FAR struct nxfonts_glyph_s *
+nxf_findglyph(FAR struct nxfonts_fcache_s *priv, uint8_t ch)
+{
+  FAR struct nxfonts_glyph_s *glyph;
+  FAR struct nxfonts_glyph_s *prev;
+
+  ginfo("fcache=%p ch=%c (%02x)\n",
+        priv, (ch >= 32 && ch < 128) ? ch : '.', ch);
+
+  /* Try to find the glyph in the list of pre-rendered glyphs */
+
+   for (prev = NULL, glyph = priv->head;
+        glyph != NULL;
+        prev = glyph, glyph = glyph->flink)
+    {
+      /* Check if we found the the glyph for this character */
+
+      if (glyph->code == ch)
+        {
+          /* This is now the most recently used glyph.  Move it to the head
+           * of the list (if it is not already at the head of the list).
+           */
+
+          if (prev != NULL)
+            {
+              nxf_removeglyph(priv, glyph, prev);
+              nxf_addglyph(priv, glyph);
+            }
+
+          /* And return the glyph that we found */
+
+          return glyph;
+        }
+
+      /* Is this the last glyph in the list?  Has the cache reached its
+       * limit for the number of cached fonts?
+       */
+
+      if (glyph->flink == NULL && priv->nglyphs >= priv->maxglyphs)
+        {
+          /* Yes.. then remove it from the list and free the glyph memory.
+           * We do this because we have all of the information in hand now
+           * and we will surely need to have this space later.
+           */
+
+          nxf_removeglyph(priv, glyph, prev);
+          return NULL;
+        }
+    }
+
+  return NULL;
+}
+
+/****************************************************************************
+ * Name: nxf_fillglyph
+ *
+ * Description:
+ *   Fill the glyph memory with the background color
+ *
+ ****************************************************************************/
+
+static inline void nxf_fillglyph(FAR struct nxfonts_fcache_s *priv,
+                                 FAR struct nxfonts_glyph_s *glyph)
+{
+  int row;
+  int col;
+
+  /* Initialize the glyph memory to the background color. */
+
+#if !defined(CONFIG_NX_DISABLE_1BPP) || !defined(CONFIG_NX_DISABLE_2BPP) || \
+    !defined(CONFIG_NX_DISABLE_4BPP) || !defined(CONFIG_NX_DISABLE_8BPP)
+
+  /* For pixel depths of 1, 2, 4, and 8, build up an 8-bit value containing
+   * multiple background colored pixels.
+   */
+
+  if (priv->bpp <= 8)
+    {
+      uint8_t pixel = (uint8_t)priv->bgcolor;
+      FAR uint8_t *ptr;
+
+#ifndef CONFIG_NX_DISABLE_1BPP
+      /* Pack a 1-bit pixel to 2 pixels */
+
+      if (priv->bpp < 2)
+        {
+          /* Pack 1-bit pixels into a 2-bits */
+
+          pixel &= 0x01;
+          pixel  = (pixel) << 1 | pixel;
+        }
+#endif
+
+#if !defined(CONFIG_NX_DISABLE_1BPP) || !defined(CONFIG_NX_DISABLE_2BPP)
+      /* Pack a 2-bit pixel to a 4-bit nibble */
+
+      if (priv->bpp < 4)
+        {
+          /* Pack 2-bit pixels into a nibble */
+
+          pixel &= 0x03;
+          pixel  = (pixel) << 2 | pixel;
+        }
+#endif
+
+#if !defined(CONFIG_NX_DISABLE_1BPP) || !defined(CONFIG_NX_DISABLE_2BPP) || \
+    !defined(CONFIG_NX_DISABLE_4BPP)
+      /* Pack the 4-bit nibble into a byte */
+
+      if (priv->bpp < 8)
+        {
+          pixel &= 0x0f;
+          pixel  = (pixel) << 4 | pixel;
+        }
+#endif
+
+      /* Then fill the glyph with the packed background color */
+
+      ptr = (FAR uint8_t *)glyph->bitmap;
+      for (row = 0; row < glyph->height; row++)
+        {
+          for (col = 0; col < glyph->stride; col++)
+            {
+              /* Transfer the packed bytes into the buffer */
+
+              *ptr++ = pixel;
+            }
+        }
+    }
+  else
+#endif
+
+#if !defined(CONFIG_NX_DISABLE_16BPP)
+  if (priv->bpp == 16)
+    {
+      FAR uint16_t *ptr = (FAR uint16_t *)glyph->bitmap;
+
+      for (row = 0; row < glyph->height; row++)
+        {
+          /* Just copy the color value into the glyph memory */
+
+          for (col = 0; col < glyph->width; col++)
+            {
+              *ptr++ = priv->bgcolor;
+            }
+        }
+    }
+  else
+#endif
+
+#ifndef CONFIG_NX_DISABLE_24BPP
+  if (priv->bpp == 24)
+    {
+      FAR uint32_t *ptr = (FAR uint32_t *)glyph->bitmap;
+      FAR uint32_t pixel[3];
+
+      /* Get two 32-bit values for alternating 32 representations */
+
+      pixel[0] = (uint32_t)priv->bgcolor <<  8 | (uint32_t)priv->bgcolor >> 16;
+      pixel[1] = (uint32_t)priv->bgcolor << 16 | (uint32_t)priv->bgcolor >> 8;
+      pixel[1] = (uint32_t)priv->bgcolor << 24 | (uint32_t)priv->bgcolor;
+
+      for (row = 0; row < glyph->height; row++)
+        {
+          /* Copy the color value into the glyph memory */
+
+          col = 0;
+          for (; ; )
+            {
+              *ptr++ = pixel[0];
+              if (++col >= glyph->width)
+                {
+                  break;
+                }
+
+              *ptr++ = pixel[1];
+              if (++col >= glyph->width)
+                {
+                  break;
+                }
+
+              *ptr++ = pixel[2];
+              if (++col >= glyph->width)
+                {
+                  break;
+                }
+            }
+        }
+    }
+  else
+#endif
+
+#if !defined(CONFIG_NX_DISABLE_32BPP)
+  if (priv->bpp == 32)
+    {
+      FAR uint32_t *ptr = (FAR uint32_t *)glyph->bitmap;
+
+      for (row = 0; row < glyph->height; row++)
+        {
+          /* Just copy the color value into the glyph memory */
+
+          for (col = 0; col < glyph->width; col++)
+            {
+              *ptr++ = priv->bgcolor;
+            }
+        }
+    }
+  else
+#endif
+    {
+      PANIC();
+    }
+}
+
+/****************************************************************************
+ * Name: nxf_renderglyph
+ *
+ * Description:
+ *   Allocate memory for a new glyph and render the bitmap font into the
+ *   allocated glyph memory.
+ *
+ * Assumptions:
+ *   The caller holds the font cache semaphore.
+ *
+ ****************************************************************************/
+
+static inline FAR struct nxfonts_glyph_s *
+nxf_renderglyph(FAR struct nxfonts_fcache_s *priv,
+                FAR const struct nx_fontbitmap_s *fbm, uint8_t ch)
+{
+  FAR struct nxfonts_glyph_s *glyph = NULL;
+  size_t bmsize;
+  unsigned int height;
+  unsigned int width;
+  unsigned int stride;
+  int ret;
+
+  ginfo("fcache=%p fbm=%p ch=%c (%02x)\n",
+        priv, fbm, (ch >= 32 && ch < 128) ? ch : '.', ch);
+
+  /* Get the size of the glyph */
+
+  width  = fbm->metric.width + fbm->metric.xoffset;
+  height = fbm->metric.height + fbm->metric.yoffset;
+
+  /* Get the physical width of the glyph in bytes */
+
+  stride = (width * priv->bpp + 7) >> 3;
+
+  /* Allocate the glyph (always succeeds) */
+
+  bmsize = stride * height;
+  glyph  = (FAR struct nxfonts_glyph_s *)lib_malloc(SIZEOF_NXFONTS_GLYPH_S(bmsize));
+
+  if (glyph != NULL)
+    {
+      /* Save the character code, dimensions, and physcial width of the glyph */
+
+      glyph->code   = ch;
+      glyph->width  = width;
+      glyph->height = height;
+      glyph->stride = stride;
+
+      /* Initialize the glyph memory to the background color. */
+
+      nxf_fillglyph(priv, glyph);
+
+      /* Then render the glyph into the allocated, initialized memory */
+
+      ret = priv->renderer((FAR nxgl_mxpixel_t *)glyph->bitmap,
+                           glyph->height, glyph->width, glyph->stride,
+                           fbm, priv->fgcolor);
+      if (ret < 0)
+        {
+          /* Actually, the renderer never returns a failure */
+
+          gerr("ERROR: nxf_renderglyph: Renderer failed\n");
+          lib_free(glyph);
+          return NULL;
+        }
+
+      /* Add the new glyph to the font cache */
+
+      nxf_addglyph(priv, glyph);
+    }
+
+  return glyph;
+}
+
+/****************************************************************************
+ * Name: nxf_findcache
+ *
+ * Description:
+ *   Find a font cache tht matches the font charcteristics.
+ *
+ * Assumptions:
+ *   The caller holds the font cache list semaphore.
+ *
+ ****************************************************************************/
+
+static FAR struct nxfonts_fcache_s *
+nxf_findcache(enum nx_fontid_e fontid, nxgl_mxpixel_t fgcolor,
+              nxgl_mxpixel_t bgcolor, int bpp)
+{
+  FAR struct nxfonts_fcache_s *fcache;
+
+  ginfo("fontid=%p fgcolor=%u bgcolor=%u bpp=%d\n",
+        fontid, fgcolor, bgcolor, bpp);
+
+  /* Search for a cache for this font characteristics */
+
+  for (fcache = g_fcaches; fcache != NULL; fcache = fcache->flink)
+    {
+      /* Does this font have the same characteristics? */
+
+      if (fcache->fontid  == fontid &&
+          fcache->fgcolor == fgcolor &&
+          fcache->bgcolor == bgcolor &&
+          fcache->bpp     == bpp)
+        {
+          /* Yes... return it */
+
+          ginfo("Returning fcache=%p\n", fcache);
+          return fcache;
+        }
+    }
+
+  ginfo("Not found\n");
+  return NULL;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: nxf_cache_connect
+ *
+ * Description:
+ *   Create a new font cache for the provided 'fontid'.  If the cache
+ *   already, then just increment a reference count return the handle for
+ *   the existing font cache.
+ *
+ * Input Parameters:
+ *   fontid    - Identifies the font supported by this cache
+ *   fgcolor   - Foreground color
+ *   bgcolor   - Background color
+ *   bpp       - Bits per pixel
+ *   maxglyphs - Maximum number of glyphs permitted in the cache
+ *
+ * Returned value:
+ *   On success a non-NULL handle is returned that then may sequently be
+ *   used with nxf_getglyph() to extract fonts from the font cache.  NULL
+ *   returned on any failure with the errno value set to indicate the nature
+ *   of the error.
+ *
+ ****************************************************************************/
+
+FCACHE nxf_cache_connect(enum nx_fontid_e fontid,
+                         nxgl_mxpixel_t fgcolor, nxgl_mxpixel_t bgcolor,
+                         int bpp, int maxglyphs)
+{
+  FAR struct nxfonts_fcache_s *priv;
+  int errcode;
+
+  ginfo("fontid=%p fgcolor=%u bgcolor=%u bpp=%d maxglyphs=%d\n",
+        fontid, fgcolor, bgcolor, bpp, maxglyphs);
+
+  /* Get exclusive access to the font cache list */
+
+  nxf_list_lock();
+
+  /* Find a font cache with the matching font characteristics */
+
+  priv = nxf_findcache(fontid, fgcolor, bgcolor, bpp);
+  if (priv == NULL)
+    {
+      /* There isn't one... we will have to create a new font cache for this
+       * client.
+       */
+
+      /* Allocate memory for the (empty) font cache */
+
+      priv = (FAR struct nxfonts_fcache_s *)
+        lib_zalloc(sizeof( struct nxfonts_fcache_s));
+
+      if (priv == NULL)
+        {
+          errcode = ENOMEM;
+          goto errout_with_lock;
+        }
+
+      /* Initialize the font cache */
+
+      priv->fontid    = fontid;
+      priv->fclients  = 1;
+      priv->maxglyphs = maxglyphs;
+      priv->bpp       = bpp;
+      priv->fgcolor   = fgcolor;
+      priv->bgcolor   = bgcolor;
+
+      /* Select the rendering function */
+
+      /* Select renderer -- Some additional logic would be required to
+       * support pixel depths that are not directly addressable (1,2,4, and
+       * 24).
+       */
+
+      switch (bpp)
+        {
+#ifndef CONFIG_NX_DISABLE_1BPP
+        case 1:
+          priv->renderer = (nxf_renderer_t)nxf_convert_1bpp;
+          break;
+#endif
+#ifndef CONFIG_NX_DISABLE_2BPP
+        case 2:
+          priv->renderer = (nxf_renderer_t)nxf_convert_2bpp;
+          break;
+#endif
+#ifndef CONFIG_NX_DISABLE_4BPP
+        case 4:
+          priv->renderer = (nxf_renderer_t)nxf_convert_4bpp;
+          break;
+#endif
+#ifndef CONFIG_NX_DISABLE_8BPP
+        case 8:
+          priv->renderer = (nxf_renderer_t)nxf_convert_8bpp;
+          break;
+#endif
+#ifndef CONFIG_NX_DISABLE_16BPP
+        case 16:
+          priv->renderer = (nxf_renderer_t)nxf_convert_16bpp;
+          break;
+#endif
+#ifndef CONFIG_NX_DISABLE_24BPP
+        case 24:
+          priv->renderer = (nxf_renderer_t)nxf_convert_24bpp;
+          break;
+#endif
+#ifndef CONFIG_NX_DISABLE_32BPP
+        case 32:
+          priv->renderer = (nxf_renderer_t)nxf_convert_32bpp;
+          break;
+#endif
+        default:
+          gerr("ERROR: Unsupported pixel depth: %d\n", bpp);
+          errcode = ENOSYS;
+          goto errout_with_fcache;
+        }
+
+      /* Select the font */
+
+      priv->font = nxf_getfonthandle(fontid);
+      if (priv->font == NULL)
+        {
+          errcode = get_errno();
+          gerr("ERROR: Failed to get font ID %d: %d\n",  fontid, errcode);
+          goto errout_with_fcache;
+        }
+
+      /* Initialize the mutual exclusion semaphore */
+
+      sem_init(&priv->fsem, 0, 1);
+
+      /* Add the new font cache to the list of font caches */
+
+      priv->flink = g_fcaches;
+      g_fcaches = priv;
+    }
+  else
+    {
+      /* A font cache with these characteristics already exists.  Just make
+       * sure that it is as least a big as the size requested.
+       */
+
+      if (priv->maxglyphs < maxglyphs)
+        {
+          priv->maxglyphs = maxglyphs;
+        }
+
+      /* Increment the number of clients of the font cache */
+
+      priv->fclients++;
+    }
+
+  nxf_list_unlock();
+  ginfo("fhandle=%p\n", priv);
+  return (FCACHE)priv;
+
+errout_with_fcache:
+  lib_free(priv);
+errout_with_lock:
+  nxf_list_unlock();
+  set_errno(errcode);
+  return NULL;
+}
+
+/****************************************************************************
+ * Name: nxf_cache_disconnect
+ *
+ * Description:
+ *   Decrement the reference count on the font cache and, if the reference
+ *   count goes to zero, free all resources used by the font cache.  The
+ *   font handle is invalid upon return in either case.
+ *
+ * Input Parameters:
+ *   fhandle - A font cache handle previously returned by nxf_cache_connect();
+ *
+ * Returned value:
+ *   None
+ *
+ ****************************************************************************/
+
+void nxf_cache_disconnect(FCACHE fhandle)
+{
+  FAR struct nxfonts_fcache_s *priv = (FAR struct nxfonts_fcache_s *)fhandle;
+  FAR struct nxfonts_fcache_s *fcache;
+  FAR struct nxfonts_fcache_s *prev;
+  FAR struct nxfonts_glyph_s *glyph;
+  FAR struct nxfonts_glyph_s *next;
+
+  ginfo("fhandle=%p\n", fhandle);
+
+  DEBUGASSERT(priv != NULL && priv->fclients > 0);
+
+  /* Get exclusive access to the font cache */
+
+  nxf_cache_lock(priv);
+
+  /* Is this the last client of the font cache? */
+
+  if (priv->fclients <= 1)
+    {
+      /* Get exclusive access to the font cache list */
+
+      nxf_list_lock();
+
+      /* Remove the font cache from the list of caches.  This is a singly
+       * linked list, so we must do this the hard way.
+       */
+
+      for (prev = NULL, fcache = g_fcaches;
+           fcache != priv && fcache != NULL;
+           fcache = fcache->flink);
+
+      ASSERT(fcache == priv);
+      nxf_removecache(fcache, prev);
+      nxf_list_unlock();
+
+      /* Free all allocated glyph memory */
+
+      for (glyph = priv->head; glyph != NULL; glyph = next)
+        {
+          next = glyph->flink;
+          lib_free(glyph);
+        }
+
+      /* Destroy the serializing semaphore... while we are holding it? */
+
+      sem_destroy(&priv->fsem);
+
+      /* Finally, free the font cache stucture itself */
+
+      lib_free(priv);
+    }
+  else
+    {
+      /* No.. just decrement the number of clients connected to the font
+       * cache.
+       */
+
+      priv->fclients--;
+      nxf_cache_unlock(priv);
+    }
+}
+
+/****************************************************************************
+ * Name: nxf_cache_getfonthandle
+ *
+ * Description:
+ *   Return the handle to the font set used by this instance of the font
+ *   cache.
+ *
+ * Input Parameters:
+ *   fhandle - A font cache handle previously returned by nxf_cache_connect();
+ *
+ * Returned value:
+ *   Zero (OK) is returned if the metrics were
+ *
+ * Returned Value:
+ *   One success, a non-NULL font handle is returned.
+ *
+ ****************************************************************************/
+
+NXHANDLE nxf_cache_getfonthandle(FCACHE fhandle)
+{
+  FAR struct nxfonts_fcache_s *priv = (FAR struct nxfonts_fcache_s *)fhandle;
+
+  DEBUGASSERT(priv != NULL && priv->font != NULL);
+  return priv->font;
+}
+
+/****************************************************************************
+ * Name: nxf_cache_getglyph
+ *
+ * Description:
+ *   Get the font glyph for the character code 'ch' from the font cache.  If
+ *   the glyph for that character code does not exist in the font cache, it
+ *   be rendered.
+ *
+ * Returned Value:
+ *   On success, a non-NULL pointer to the rendered glyph in the font cache
+ *   is returned.  NULL is returned on any failure.
+ *
+ ****************************************************************************/
+
+FAR const struct nxfonts_glyph_s *nxf_cache_getglyph(FCACHE fhandle, uint8_t ch)
+{
+  FAR struct nxfonts_fcache_s *priv = (FAR struct nxfonts_fcache_s *)fhandle;
+  FAR struct nxfonts_glyph_s *glyph;
+  FAR const struct nx_fontbitmap_s *fbm;
+
+  ginfo("ch=%c (%02x)\n", (ch >= 32 && ch < 128) ? ch : '.', ch);
+
+  /* Get exclusive access to the font cache */
+
+  nxf_cache_lock(priv);
+
+  /* First, try to find the glyph in the cache of pre-rendered glyphs */
+
+  glyph = nxf_findglyph(priv, ch);
+  if (glyph == NULL)
+    {
+      /* No, it is not cached... Does the code map to a font? */
+
+      fbm = nxf_getbitmap(priv->font, ch);
+      if (fbm)
+        {
+          /* Yes.. render the glyph for the font */
+
+          glyph = nxf_renderglyph(priv, fbm, ch);
+        }
+    }
+
+  nxf_cache_unlock(priv);
+  return glyph;
+}
diff --git a/libnx/nxfonts/nxfonts_getfont.c b/libnx/nxfonts/nxfonts_getfont.c
index c52c082281c2c07c090a6d80b33b1092d6f610ec..afe0f7bc68aff03f489f8cb22c31f0ac43d655d2 100644
--- a/libnx/nxfonts/nxfonts_getfont.c
+++ b/libnx/nxfonts/nxfonts_getfont.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libnx/nxfonts/nxfonts_getfont.c
  *
- *   Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2011, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -48,14 +48,6 @@
 
 #include "nxfonts.h"
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
@@ -246,9 +238,12 @@ extern const struct nx_fontpackage_s g_x11_misc_fixed_9x18B_package;
 extern const struct nx_fontpackage_s g_x11_misc_fixed_10x20_package;
 #endif
 
+#ifdef CONFIG_NXFONT_TOM_THUMB_4X6
+extern const struct nx_fontpackage_s g_tom_thumb_4x6_package;
+#endif
+
 static FAR const struct nx_fontpackage_s *g_fontpackages[] =
 {
-
 /* MONO */
 
 #ifdef CONFIG_NXFONT_MONO5X8
@@ -431,13 +426,15 @@ static FAR const struct nx_fontpackage_s *g_fontpackages[] =
   &g_x11_misc_fixed_10x20_package,
 #endif
 
+/* Tom Thumb mono-space 4x6 font */
+
+#ifdef CONFIG_NXFONT_TOM_THUMB_4X6
+  &g_tom_thumb_4x6_package,
+#endif
+
   NULL
 };
 
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -475,7 +472,7 @@ static inline FAR const struct nx_fontset_s *
 
       fontset = &package->font8;
 #else
-      gdbg("8-bit font support disabled: %d\n", ch);
+      gwarn("WARNING: 8-bit font support disabled: %d\n", ch);
       return NULL;
 #endif
     }
@@ -483,7 +480,7 @@ static inline FAR const struct nx_fontset_s *
     {
       /* Someday, perhaps 16-bit fonts will go here */
 
-      gdbg("16-bit font not currently supported\n");
+      gerr("ERROR: 16-bit font not currently supported\n");
       return NULL;
     }
 
@@ -494,7 +491,7 @@ static inline FAR const struct nx_fontset_s *
       return fontset;
     }
 
-  gdbg("No bitmap for code %02x\n", ch);
+  gerr("ERROR: No bitmap for code %02x\n", ch);
   return NULL;
 }
 
diff --git a/libnx/nxfonts/nxfonts_tom-thumb-4x6.h b/libnx/nxfonts/nxfonts_tom-thumb-4x6.h
new file mode 100644
index 0000000000000000000000000000000000000000..dcd34efe97c9eb808df6ab95288ae91121081bd8
--- /dev/null
+++ b/libnx/nxfonts/nxfonts_tom-thumb-4x6.h
@@ -0,0 +1,827 @@
+/****************************************************************************
+ * libnx/nxfonts/nxfonts_tom-thumb-4x6.h
+ *
+ *   Copyright (C) 2017 Alan Carvalho de Assis. All rights reserved.
+ *   Author: Alan Carvalho de Assis 
+ *
+ * Based on Tom Thumb font:
+ * https://robey.lag.net/2010/01/23/tiny-monospace-font.html
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT}
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING}
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __LIBNX_NXFONTS_NXFONTS_TOM_THUMB_4X6_H
+#define __LIBNX_NXFONTS_NXFONTS_TOM_THUMB_4X6_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-Processor Definitions
+ ****************************************************************************/
+
+/* Font ID */
+
+#define NXFONT_ID         FONTID_TOM_THUMB_4X6
+
+/* Ranges of 7-bit and 8-bit fonts */
+
+#define NXFONT_MIN7BIT    33
+#define NXFONT_MAX7BIT    126
+
+#define NXFONT_MIN8BIT    161
+#define NXFONT_MAX8BIT    255
+
+/* Maximum height and width of any glyph in the set */
+
+#define NXFONT_MAXHEIGHT  6
+#define NXFONT_MAXWIDTH   4
+
+/* The width of a space */
+
+#define NXFONT_SPACEWIDTH 4
+
+/* exclam (33) */
+#define NXFONT_METRICS_33 {1, 2, 5, 1, 0, 0}
+#define NXFONT_BITMAP_33 {0x80, 0x80, 0x80, 0x0, 0x80}
+
+/* quotedbl (34) */
+#define NXFONT_METRICS_34 {1, 4, 2, 0, 0, 0}
+#define NXFONT_BITMAP_34 {0xa0, 0xa0}
+
+/* numbersign (35) */
+#define NXFONT_METRICS_35 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_35 {0xa0, 0xe0, 0xa0, 0xe0, 0xa0}
+
+/* dollar (36) */
+#define NXFONT_METRICS_36 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_36 {0x60, 0xc0, 0x60, 0xc0, 0x40}
+
+/* percent (37) */
+#define NXFONT_METRICS_37 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_37 {0x80, 0x20, 0x40, 0x80, 0x20}
+
+/* ampersand (38) */
+#define NXFONT_METRICS_38 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_38 {0xc0, 0xc0, 0xe0, 0xa0, 0x60}
+
+/* quotesingle (39) */
+#define NXFONT_METRICS_39 {1, 2, 2, 1, 0, 0}
+#define NXFONT_BITMAP_39 {0x80, 0x80}
+
+/* parenleft (40) */
+#define NXFONT_METRICS_40 {1, 3, 5, 1, 0, 0}
+#define NXFONT_BITMAP_40 {0x40, 0x80, 0x80, 0x80, 0x40}
+
+/* parenright (41) */
+#define NXFONT_METRICS_41 {1, 3, 5, 0, 0, 0}
+#define NXFONT_BITMAP_41 {0x80, 0x40, 0x40, 0x40, 0x80}
+
+/* asterisk (42) */
+#define NXFONT_METRICS_42 {1, 4, 3, 0, 0, 0}
+#define NXFONT_BITMAP_42 {0xa0, 0x40, 0xa0}
+
+/* plus (43) */
+#define NXFONT_METRICS_43 {1, 4, 3, 0, 1, 0}
+#define NXFONT_BITMAP_43 {0x40, 0xe0, 0x40}
+
+/* comma (44) */
+#define NXFONT_METRICS_44 {1, 3, 2, 0, 3, 0}
+#define NXFONT_BITMAP_44 {0x40, 0x80}
+
+/* hyphen (45) */
+#define NXFONT_METRICS_45 {1, 4, 1, 0, 2, 0}
+#define NXFONT_BITMAP_45 {0xe0}
+
+/* period (46) */
+#define NXFONT_METRICS_46 {1, 2, 1, 1, 4, 0}
+#define NXFONT_BITMAP_46 {0x80}
+
+/* slash (47) */
+#define NXFONT_METRICS_47 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_47 {0x20, 0x20, 0x40, 0x80, 0x80}
+
+/* zero (48) */
+#define NXFONT_METRICS_48 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_48 {0x60, 0xa0, 0xa0, 0xa0, 0xc0}
+
+/* one (49) */
+#define NXFONT_METRICS_49 {1, 3, 5, 0, 0, 0}
+#define NXFONT_BITMAP_49 {0x40, 0xc0, 0x40, 0x40, 0x40}
+
+/* two (50) */
+#define NXFONT_METRICS_50 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_50 {0xc0, 0x20, 0x40, 0x80, 0xe0}
+
+/* three (51) */
+#define NXFONT_METRICS_51 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_51 {0xc0, 0x20, 0x40, 0x20, 0xc0}
+
+/* four (52) */
+#define NXFONT_METRICS_52 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_52 {0xa0, 0xa0, 0xe0, 0x20, 0x20}
+
+/* five (53) */
+#define NXFONT_METRICS_53 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_53 {0xe0, 0x80, 0xc0, 0x20, 0xc0}
+
+/* six (54) */
+#define NXFONT_METRICS_54 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_54 {0x60, 0x80, 0xe0, 0xa0, 0xe0}
+
+/* seven (55) */
+#define NXFONT_METRICS_55 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_55 {0xe0, 0x20, 0x40, 0x80, 0x80}
+
+/* eight (56) */
+#define NXFONT_METRICS_56 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_56 {0xe0, 0xa0, 0xe0, 0xa0, 0xe0}
+
+/* nine (57) */
+#define NXFONT_METRICS_57 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_57 {0xe0, 0xa0, 0xe0, 0x20, 0xc0}
+
+/* colon (58) */
+#define NXFONT_METRICS_58 {1, 2, 3, 1, 1, 0}
+#define NXFONT_BITMAP_58 {0x80, 0x0, 0x80}
+
+/* semicolon (59) */
+#define NXFONT_METRICS_59 {1, 3, 4, 0, 1, 0}
+#define NXFONT_BITMAP_59 {0x40, 0x0, 0x40, 0x80}
+
+/* less (60) */
+#define NXFONT_METRICS_60 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_60 {0x20, 0x40, 0x80, 0x40, 0x20}
+
+/* equal (61) */
+#define NXFONT_METRICS_61 {1, 4, 3, 0, 1, 0}
+#define NXFONT_BITMAP_61 {0xe0, 0x0, 0xe0}
+
+/* greater (62) */
+#define NXFONT_METRICS_62 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_62 {0x80, 0x40, 0x20, 0x40, 0x80}
+
+/* question (63) */
+#define NXFONT_METRICS_63 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_63 {0xe0, 0x20, 0x40, 0x0, 0x40}
+
+/* at (64) */
+#define NXFONT_METRICS_64 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_64 {0x40, 0xa0, 0xe0, 0x80, 0x60}
+
+/* A (65) */
+#define NXFONT_METRICS_65 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_65 {0x40, 0xa0, 0xe0, 0xa0, 0xa0}
+
+/* B (66) */
+#define NXFONT_METRICS_66 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_66 {0xc0, 0xa0, 0xc0, 0xa0, 0xc0}
+
+/* C (67) */
+#define NXFONT_METRICS_67 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_67 {0x60, 0x80, 0x80, 0x80, 0x60}
+
+/* D (68) */
+#define NXFONT_METRICS_68 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_68 {0xc0, 0xa0, 0xa0, 0xa0, 0xc0}
+
+/* E (69) */
+#define NXFONT_METRICS_69 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_69 {0xe0, 0x80, 0xe0, 0x80, 0xe0}
+
+/* F (70) */
+#define NXFONT_METRICS_70 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_70 {0xe0, 0x80, 0xe0, 0x80, 0x80}
+
+/* G (71) */
+#define NXFONT_METRICS_71 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_71 {0x60, 0x80, 0xe0, 0xa0, 0x60}
+
+/* H (72) */
+#define NXFONT_METRICS_72 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_72 {0xa0, 0xa0, 0xe0, 0xa0, 0xa0}
+
+/* I (73) */
+#define NXFONT_METRICS_73 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_73 {0xe0, 0x40, 0x40, 0x40, 0xe0}
+
+/* J (74) */
+#define NXFONT_METRICS_74 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_74 {0x20, 0x20, 0x20, 0xa0, 0x40}
+
+/* K (75) */
+#define NXFONT_METRICS_75 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_75 {0xa0, 0xa0, 0xc0, 0xa0, 0xa0}
+
+/* L (76) */
+#define NXFONT_METRICS_76 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_76 {0x80, 0x80, 0x80, 0x80, 0xe0}
+
+/* M (77) */
+#define NXFONT_METRICS_77 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_77 {0xa0, 0xe0, 0xe0, 0xa0, 0xa0}
+
+/* N (78) */
+#define NXFONT_METRICS_78 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_78 {0xa0, 0xe0, 0xe0, 0xe0, 0xa0}
+
+/* O (79) */
+#define NXFONT_METRICS_79 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_79 {0x40, 0xa0, 0xa0, 0xa0, 0x40}
+
+/* P (80) */
+#define NXFONT_METRICS_80 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_80 {0xc0, 0xa0, 0xc0, 0x80, 0x80}
+
+/* Q (81) */
+#define NXFONT_METRICS_81 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_81 {0x40, 0xa0, 0xa0, 0xe0, 0x60}
+
+/* R (82) */
+#define NXFONT_METRICS_82 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_82 {0xc0, 0xa0, 0xe0, 0xc0, 0xa0}
+
+/* S (83) */
+#define NXFONT_METRICS_83 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_83 {0x60, 0x80, 0x40, 0x20, 0xc0}
+
+/* T (84) */
+#define NXFONT_METRICS_84 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_84 {0xe0, 0x40, 0x40, 0x40, 0x40}
+
+/* U (85) */
+#define NXFONT_METRICS_85 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_85 {0xa0, 0xa0, 0xa0, 0xa0, 0x60}
+
+/* V (86) */
+#define NXFONT_METRICS_86 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_86 {0xa0, 0xa0, 0xa0, 0x40, 0x40}
+
+/* W (87) */
+#define NXFONT_METRICS_87 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_87 {0xa0, 0xa0, 0xe0, 0xe0, 0xa0}
+
+/* X (88) */
+#define NXFONT_METRICS_88 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_88 {0xa0, 0xa0, 0x40, 0xa0, 0xa0}
+
+/* Y (89) */
+#define NXFONT_METRICS_89 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_89 {0xa0, 0xa0, 0x40, 0x40, 0x40}
+
+/* Z (90) */
+#define NXFONT_METRICS_90 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_90 {0xe0, 0x20, 0x40, 0x80, 0xe0}
+
+/* bracketleft (91) */
+#define NXFONT_METRICS_91 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_91 {0xe0, 0x80, 0x80, 0x80, 0xe0}
+
+/* backslash (92) */
+#define NXFONT_METRICS_92 {1, 4, 3, 0, 1, 0}
+#define NXFONT_BITMAP_92 {0x80, 0x40, 0x20}
+
+/* bracketright (93) */
+#define NXFONT_METRICS_93 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_93 {0xe0, 0x20, 0x20, 0x20, 0xe0}
+
+/* asciicircum (94) */
+#define NXFONT_METRICS_94 {1, 4, 2, 0, 0, 0}
+#define NXFONT_BITMAP_94 {0x40, 0xa0}
+
+/* underscore (95) */
+#define NXFONT_METRICS_95 {1, 4, 1, 0, 4, 0}
+#define NXFONT_BITMAP_95 {0xe0}
+
+/* grave (96) */
+#define NXFONT_METRICS_96 {1, 3, 2, 0, 0, 0}
+#define NXFONT_BITMAP_96 {0x80, 0x40}
+
+/* a (97) */
+#define NXFONT_METRICS_97 {1, 4, 4, 0, 1, 0}
+#define NXFONT_BITMAP_97 {0xc0, 0x60, 0xa0, 0xe0}
+
+/* b (98) */
+#define NXFONT_METRICS_98 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_98 {0x80, 0xc0, 0xa0, 0xa0, 0xc0}
+
+/* c (99) */
+#define NXFONT_METRICS_99 {1, 4, 4, 0, 1, 0}
+#define NXFONT_BITMAP_99 {0x60, 0x80, 0x80, 0x60}
+
+/* d (100) */
+#define NXFONT_METRICS_100 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_100 {0x20, 0x60, 0xa0, 0xa0, 0x60}
+
+/* e (101) */
+#define NXFONT_METRICS_101 {1, 4, 4, 0, 1, 0}
+#define NXFONT_BITMAP_101 {0x60, 0xa0, 0xc0, 0x60}
+
+/* f (102) */
+#define NXFONT_METRICS_102 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_102 {0x20, 0x40, 0xe0, 0x40, 0x40}
+
+/* g (103) */
+#define NXFONT_METRICS_103 {1, 4, 5, 0, 1, 0}
+#define NXFONT_BITMAP_103 {0x60, 0xa0, 0xe0, 0x20, 0x40}
+
+/* h (104) */
+#define NXFONT_METRICS_104 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_104 {0x80, 0xc0, 0xa0, 0xa0, 0xa0}
+
+/* i (105) */
+#define NXFONT_METRICS_105 {1, 2, 5, 1, 0, 0}
+#define NXFONT_BITMAP_105 {0x80, 0x0, 0x80, 0x80, 0x80}
+
+/* j (106) */
+#define NXFONT_METRICS_106 {1, 4, 6, 0, 0, 0}
+#define NXFONT_BITMAP_106 {0x20, 0x0, 0x20, 0x20, 0xa0, 0x40}
+
+/* k (107) */
+#define NXFONT_METRICS_107 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_107 {0x80, 0xa0, 0xc0, 0xc0, 0xa0}
+
+/* l (108) */
+#define NXFONT_METRICS_108 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_108 {0xc0, 0x40, 0x40, 0x40, 0xe0}
+
+/* m (109) */
+#define NXFONT_METRICS_109 {1, 4, 4, 0, 1, 0}
+#define NXFONT_BITMAP_109 {0xe0, 0xe0, 0xe0, 0xa0}
+
+/* n (110) */
+#define NXFONT_METRICS_110 {1, 4, 4, 0, 1, 0}
+#define NXFONT_BITMAP_110 {0xc0, 0xa0, 0xa0, 0xa0}
+
+/* o (111) */
+#define NXFONT_METRICS_111 {1, 4, 4, 0, 1, 0}
+#define NXFONT_BITMAP_111 {0x40, 0xa0, 0xa0, 0x40}
+
+/* p (112) */
+#define NXFONT_METRICS_112 {1, 4, 5, 0, 1, 0}
+#define NXFONT_BITMAP_112 {0xc0, 0xa0, 0xa0, 0xc0, 0x80}
+
+/* q (113) */
+#define NXFONT_METRICS_113 {1, 4, 5, 0, 1, 0}
+#define NXFONT_BITMAP_113 {0x60, 0xa0, 0xa0, 0x60, 0x20}
+
+/* r (114) */
+#define NXFONT_METRICS_114 {1, 4, 4, 0, 1, 0}
+#define NXFONT_BITMAP_114 {0x60, 0x80, 0x80, 0x80}
+
+/* s (115) */
+#define NXFONT_METRICS_115 {1, 4, 4, 0, 1, 0}
+#define NXFONT_BITMAP_115 {0x60, 0xc0, 0x60, 0xc0}
+
+/* t (116) */
+#define NXFONT_METRICS_116 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_116 {0x40, 0xe0, 0x40, 0x40, 0x60}
+
+/* u (117) */
+#define NXFONT_METRICS_117 {1, 4, 4, 0, 1, 0}
+#define NXFONT_BITMAP_117 {0xa0, 0xa0, 0xa0, 0x60}
+
+/* v (118) */
+#define NXFONT_METRICS_118 {1, 4, 4, 0, 1, 0}
+#define NXFONT_BITMAP_118 {0xa0, 0xa0, 0xe0, 0x40}
+
+/* w (119) */
+#define NXFONT_METRICS_119 {1, 4, 4, 0, 1, 0}
+#define NXFONT_BITMAP_119 {0xa0, 0xe0, 0xe0, 0xe0}
+
+/* x (120) */
+#define NXFONT_METRICS_120 {1, 4, 4, 0, 1, 0}
+#define NXFONT_BITMAP_120 {0xa0, 0x40, 0x40, 0xa0}
+
+/* y (121) */
+#define NXFONT_METRICS_121 {1, 4, 5, 0, 1, 0}
+#define NXFONT_BITMAP_121 {0xa0, 0xa0, 0x60, 0x20, 0x40}
+
+/* z (122) */
+#define NXFONT_METRICS_122 {1, 4, 4, 0, 1, 0}
+#define NXFONT_BITMAP_122 {0xe0, 0x60, 0xc0, 0xe0}
+
+/* braceleft (123) */
+#define NXFONT_METRICS_123 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_123 {0x60, 0x40, 0x80, 0x40, 0x60}
+
+/* bar (124) */
+#define NXFONT_METRICS_124 {1, 2, 5, 1, 0, 0}
+#define NXFONT_BITMAP_124 {0x80, 0x80, 0x0, 0x80, 0x80}
+
+/* braceright (125) */
+#define NXFONT_METRICS_125 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_125 {0xc0, 0x40, 0x20, 0x40, 0xc0}
+
+/* asciitilde (126) */
+#define NXFONT_METRICS_126 {1, 4, 2, 0, 0, 0}
+#define NXFONT_BITMAP_126 {0x60, 0xc0}
+
+/* exclamdown (161) */
+#define NXFONT_METRICS_161 {1, 2, 5, 1, 0, 0}
+#define NXFONT_BITMAP_161 {0x80, 0x0, 0x80, 0x80, 0x80}
+
+/* cent (162) */
+#define NXFONT_METRICS_162 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_162 {0x40, 0xe0, 0x80, 0xe0, 0x40}
+
+/* sterling (163) */
+#define NXFONT_METRICS_163 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_163 {0x60, 0x40, 0xe0, 0x40, 0xe0}
+
+/* currency (164) */
+#define NXFONT_METRICS_164 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_164 {0xa0, 0x40, 0xe0, 0x40, 0xa0}
+
+/* yen (165) */
+#define NXFONT_METRICS_165 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_165 {0xa0, 0xa0, 0x40, 0xe0, 0x40}
+
+/* brokenbar (166) */
+#define NXFONT_METRICS_166 {1, 2, 5, 1, 0, 0}
+#define NXFONT_BITMAP_166 {0x80, 0x80, 0x0, 0x80, 0x80}
+
+/* section (167) */
+#define NXFONT_METRICS_167 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_167 {0x60, 0x40, 0xa0, 0x40, 0xc0}
+
+/* dieresis (168) */
+#define NXFONT_METRICS_168 {1, 4, 1, 0, 0, 0}
+#define NXFONT_BITMAP_168 {0xa0}
+
+/* copyright (169) */
+#define NXFONT_METRICS_169 {1, 4, 3, 0, 0, 0}
+#define NXFONT_BITMAP_169 {0x60, 0x80, 0x60}
+
+/* ordfeminine (170) */
+#define NXFONT_METRICS_170 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_170 {0x60, 0xa0, 0xe0, 0x0, 0xe0}
+
+/* guillemotleft (171) */
+#define NXFONT_METRICS_171 {1, 3, 3, 0, 0, 0}
+#define NXFONT_BITMAP_171 {0x40, 0x80, 0x40}
+
+/* logicalnot (172) */
+#define NXFONT_METRICS_172 {1, 4, 2, 0, 1, 0}
+#define NXFONT_BITMAP_172 {0xe0, 0x20}
+
+/* softhyphen (173) */
+#define NXFONT_METRICS_173 {1, 3, 1, 0, 2, 0}
+#define NXFONT_BITMAP_173 {0xc0}
+
+/* registered (174) */
+#define NXFONT_METRICS_174 {1, 4, 3, 0, 0, 0}
+#define NXFONT_BITMAP_174 {0xc0, 0xc0, 0xa0}
+
+/* macron (175) */
+#define NXFONT_METRICS_175 {1, 4, 1, 0, 0, 0}
+#define NXFONT_BITMAP_175 {0xe0}
+
+/* degree (176) */
+#define NXFONT_METRICS_176 {1, 4, 3, 0, 0, 0}
+#define NXFONT_BITMAP_176 {0x40, 0xa0, 0x40}
+
+/* plusminus (177) */
+#define NXFONT_METRICS_177 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_177 {0x40, 0xe0, 0x40, 0x0, 0xe0}
+
+/* twosuperior (178) */
+#define NXFONT_METRICS_178 {1, 4, 3, 0, 0, 0}
+#define NXFONT_BITMAP_178 {0xc0, 0x40, 0x60}
+
+/* threesuperior (179) */
+#define NXFONT_METRICS_179 {1, 4, 3, 0, 0, 0}
+#define NXFONT_BITMAP_179 {0xe0, 0x60, 0xe0}
+
+/* acute (180) */
+#define NXFONT_METRICS_180 {1, 3, 2, 1, 0, 0}
+#define NXFONT_BITMAP_180 {0x40, 0x80}
+
+/* mu (181) */
+#define NXFONT_METRICS_181 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_181 {0xa0, 0xa0, 0xa0, 0xc0, 0x80}
+
+/* paragraph (182) */
+#define NXFONT_METRICS_182 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_182 {0x60, 0xa0, 0x60, 0x60, 0x60}
+
+/* periodcentered (183) */
+#define NXFONT_METRICS_183 {1, 4, 3, 0, 1, 0}
+#define NXFONT_BITMAP_183 {0xe0, 0xe0, 0xe0}
+
+/* cedilla (184) */
+#define NXFONT_METRICS_184 {1, 4, 3, 0, 2, 0}
+#define NXFONT_BITMAP_184 {0x40, 0x20, 0xc0}
+
+/* onesuperior (185) */
+#define NXFONT_METRICS_185 {1, 2, 3, 1, 0, 0}
+#define NXFONT_BITMAP_185 {0x80, 0x80, 0x80}
+
+/* ordmasculine (186) */
+#define NXFONT_METRICS_186 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_186 {0x40, 0xa0, 0x40, 0x0, 0xe0}
+
+/* guillemotright (187) */
+#define NXFONT_METRICS_187 {1, 3, 3, 1, 0, 0}
+#define NXFONT_BITMAP_187 {0x80, 0x40, 0x80}
+
+/* onequarter (188) */
+#define NXFONT_METRICS_188 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_188 {0x80, 0x80, 0x0, 0x60, 0x20}
+
+/* onehalf (189) */
+#define NXFONT_METRICS_189 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_189 {0x80, 0x80, 0x0, 0xc0, 0x60}
+
+/* threequarters (190) */
+#define NXFONT_METRICS_190 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_190 {0xc0, 0xc0, 0x0, 0x60, 0x20}
+
+/* questiondown (191) */
+#define NXFONT_METRICS_191 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_191 {0x40, 0x0, 0x40, 0x80, 0xe0}
+
+/* Agrave (192) */
+#define NXFONT_METRICS_192 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_192 {0x40, 0x20, 0x40, 0xe0, 0xa0}
+
+/* Aacute (193) */
+#define NXFONT_METRICS_193 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_193 {0x40, 0x80, 0x40, 0xe0, 0xa0}
+
+/* Acircumflex (194) */
+#define NXFONT_METRICS_194 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_194 {0xe0, 0x0, 0x40, 0xe0, 0xa0}
+
+/* Atilde (195) */
+#define NXFONT_METRICS_195 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_195 {0x60, 0xc0, 0x40, 0xe0, 0xa0}
+
+/* Adieresis (196) */
+#define NXFONT_METRICS_196 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_196 {0xa0, 0x40, 0xa0, 0xe0, 0xa0}
+
+/* Aring (197) */
+#define NXFONT_METRICS_197 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_197 {0xc0, 0xc0, 0xa0, 0xe0, 0xa0}
+
+/* AE (198) */
+#define NXFONT_METRICS_198 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_198 {0x60, 0xc0, 0xe0, 0xc0, 0xe0}
+
+/* Ccedilla (199) */
+#define NXFONT_METRICS_199 {1, 4, 6, 0, 0, 0}
+#define NXFONT_BITMAP_199 {0x60, 0x80, 0x80, 0x60, 0x20, 0x40}
+
+/* Egrave (200) */
+#define NXFONT_METRICS_200 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_200 {0x40, 0x20, 0xe0, 0xc0, 0xe0}
+
+/* Eacute (201) */
+#define NXFONT_METRICS_201 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_201 {0x40, 0x80, 0xe0, 0xc0, 0xe0}
+
+/* Ecircumflex (202) */
+#define NXFONT_METRICS_202 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_202 {0xe0, 0x0, 0xe0, 0xc0, 0xe0}
+
+/* Edieresis (203) */
+#define NXFONT_METRICS_203 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_203 {0xa0, 0x0, 0xe0, 0xc0, 0xe0}
+
+/* Igrave (204) */
+#define NXFONT_METRICS_204 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_204 {0x40, 0x20, 0xe0, 0x40, 0xe0}
+
+/* Iacute (205) */
+#define NXFONT_METRICS_205 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_205 {0x40, 0x80, 0xe0, 0x40, 0xe0}
+
+/* Icircumflex (206) */
+#define NXFONT_METRICS_206 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_206 {0xe0, 0x0, 0xe0, 0x40, 0xe0}
+
+/* Idieresis (207) */
+#define NXFONT_METRICS_207 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_207 {0xa0, 0x0, 0xe0, 0x40, 0xe0}
+
+/* Eth (208) */
+#define NXFONT_METRICS_208 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_208 {0xc0, 0xa0, 0xe0, 0xa0, 0xc0}
+
+/* Ntilde (209) */
+#define NXFONT_METRICS_209 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_209 {0xc0, 0x60, 0xa0, 0xe0, 0xa0}
+
+/* Ograve (210) */
+#define NXFONT_METRICS_210 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_210 {0x40, 0x20, 0xe0, 0xa0, 0xe0}
+
+/* Oacute (211) */
+#define NXFONT_METRICS_211 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_211 {0x40, 0x80, 0xe0, 0xa0, 0xe0}
+
+/* Ocircumflex (212) */
+#define NXFONT_METRICS_212 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_212 {0xe0, 0x0, 0xe0, 0xa0, 0xe0}
+
+/* Otilde (213) */
+#define NXFONT_METRICS_213 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_213 {0xc0, 0x60, 0xe0, 0xa0, 0xe0}
+
+/* Odieresis (214) */
+#define NXFONT_METRICS_214 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_214 {0xa0, 0x0, 0xe0, 0xa0, 0xe0}
+
+/* multiply (215) */
+#define NXFONT_METRICS_215 {1, 4, 3, 0, 1, 0}
+#define NXFONT_BITMAP_215 {0xa0, 0x40, 0xa0}
+
+/* Oslash (216) */
+#define NXFONT_METRICS_216 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_216 {0x60, 0xa0, 0xe0, 0xa0, 0xc0}
+
+/* Ugrave (217) */
+#define NXFONT_METRICS_217 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_217 {0x80, 0x40, 0xa0, 0xa0, 0xe0}
+
+/* Uacute (218) */
+#define NXFONT_METRICS_218 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_218 {0x20, 0x40, 0xa0, 0xa0, 0xe0}
+
+/* Ucircumflex (219) */
+#define NXFONT_METRICS_219 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_219 {0xe0, 0x0, 0xa0, 0xa0, 0xe0}
+
+/* Udieresis (220) */
+#define NXFONT_METRICS_220 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_220 {0xa0, 0x0, 0xa0, 0xa0, 0xe0}
+
+/* Yacute (221) */
+#define NXFONT_METRICS_221 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_221 {0x20, 0x40, 0xa0, 0xe0, 0x40}
+
+/* Thorn (222) */
+#define NXFONT_METRICS_222 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_222 {0x80, 0xe0, 0xa0, 0xe0, 0x80}
+
+/* germandbls (223) */
+#define NXFONT_METRICS_223 {1, 4, 6, 0, 0, 0}
+#define NXFONT_BITMAP_223 {0x60, 0xa0, 0xc0, 0xa0, 0xc0, 0x80}
+
+/* agrave (224) */
+#define NXFONT_METRICS_224 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_224 {0x40, 0x20, 0x60, 0xa0, 0xe0}
+
+/* aacute (225) */
+#define NXFONT_METRICS_225 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_225 {0x40, 0x80, 0x60, 0xa0, 0xe0}
+
+/* acircumflex (226) */
+#define NXFONT_METRICS_226 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_226 {0xe0, 0x0, 0x60, 0xa0, 0xe0}
+
+/* atilde (227) */
+#define NXFONT_METRICS_227 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_227 {0x60, 0xc0, 0x60, 0xa0, 0xe0}
+
+/* adieresis (228) */
+#define NXFONT_METRICS_228 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_228 {0xa0, 0x0, 0x60, 0xa0, 0xe0}
+
+/* aring (229) */
+#define NXFONT_METRICS_229 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_229 {0x60, 0x60, 0x60, 0xa0, 0xe0}
+
+/* ae (230) */
+#define NXFONT_METRICS_230 {1, 4, 4, 0, 1, 0}
+#define NXFONT_BITMAP_230 {0x60, 0xe0, 0xe0, 0xc0}
+
+/* ccedilla (231) */
+#define NXFONT_METRICS_231 {1, 4, 5, 0, 1, 0}
+#define NXFONT_BITMAP_231 {0x60, 0x80, 0x60, 0x20, 0x40}
+
+/* egrave (232) */
+#define NXFONT_METRICS_232 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_232 {0x40, 0x20, 0x60, 0xe0, 0x60}
+
+/* eacute (233) */
+#define NXFONT_METRICS_233 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_233 {0x40, 0x80, 0x60, 0xe0, 0x60}
+
+/* ecircumflex (234) */
+#define NXFONT_METRICS_234 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_234 {0xe0, 0x0, 0x60, 0xe0, 0x60}
+
+/* edieresis (235) */
+#define NXFONT_METRICS_235 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_235 {0xa0, 0x0, 0x60, 0xe0, 0x60}
+
+/* igrave (236) */
+#define NXFONT_METRICS_236 {1, 3, 5, 1, 0, 0}
+#define NXFONT_BITMAP_236 {0x80, 0x40, 0x80, 0x80, 0x80}
+
+/* iacute (237) */
+#define NXFONT_METRICS_237 {1, 3, 5, 0, 0, 0}
+#define NXFONT_BITMAP_237 {0x40, 0x80, 0x40, 0x40, 0x40}
+
+/* icircumflex (238) */
+#define NXFONT_METRICS_238 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_238 {0xe0, 0x0, 0x40, 0x40, 0x40}
+
+/* idieresis (239) */
+#define NXFONT_METRICS_239 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_239 {0xa0, 0x0, 0x40, 0x40, 0x40}
+
+/* eth (240) */
+#define NXFONT_METRICS_240 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_240 {0x60, 0xc0, 0x60, 0xa0, 0x60}
+
+/* ntilde (241) */
+#define NXFONT_METRICS_241 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_241 {0xc0, 0x60, 0xc0, 0xa0, 0xa0}
+
+/* ograve (242) */
+#define NXFONT_METRICS_242 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_242 {0x40, 0x20, 0x40, 0xa0, 0x40}
+
+/* oacute (243) */
+#define NXFONT_METRICS_243 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_243 {0x40, 0x80, 0x40, 0xa0, 0x40}
+
+/* ocircumflex (244) */
+#define NXFONT_METRICS_244 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_244 {0xe0, 0x0, 0x40, 0xa0, 0x40}
+
+/* otilde (245) */
+#define NXFONT_METRICS_245 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_245 {0xc0, 0x60, 0x40, 0xa0, 0x40}
+
+/* odieresis (246) */
+#define NXFONT_METRICS_246 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_246 {0xa0, 0x0, 0x40, 0xa0, 0x40}
+
+/* divide (247) */
+#define NXFONT_METRICS_247 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_247 {0x40, 0x0, 0xe0, 0x0, 0x40}
+
+/* oslash (248) */
+#define NXFONT_METRICS_248 {1, 4, 4, 0, 1, 0}
+#define NXFONT_BITMAP_248 {0x60, 0xe0, 0xa0, 0xc0}
+
+/* ugrave (249) */
+#define NXFONT_METRICS_249 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_249 {0x80, 0x40, 0xa0, 0xa0, 0x60}
+
+/* uacute (250) */
+#define NXFONT_METRICS_250 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_250 {0x20, 0x40, 0xa0, 0xa0, 0x60}
+
+/* ucircumflex (251) */
+#define NXFONT_METRICS_251 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_251 {0xe0, 0x0, 0xa0, 0xa0, 0x60}
+
+/* udieresis (252) */
+#define NXFONT_METRICS_252 {1, 4, 5, 0, 0, 0}
+#define NXFONT_BITMAP_252 {0xa0, 0x0, 0xa0, 0xa0, 0x60}
+
+/* yacute (253) */
+#define NXFONT_METRICS_253 {1, 4, 6, 0, 0, 0}
+#define NXFONT_BITMAP_253 {0x20, 0x40, 0xa0, 0x60, 0x20, 0x40}
+
+/* thorn (254) */
+#define NXFONT_METRICS_254 {1, 4, 5, 0, 1, 0}
+#define NXFONT_BITMAP_254 {0x80, 0xc0, 0xa0, 0xc0, 0x80}
+
+/* ydieresis (255) */
+#define NXFONT_METRICS_255 {1, 4, 6, 0, 0, 0}
+#define NXFONT_BITMAP_255 {0xa0, 0x0, 0xa0, 0x60, 0x20, 0x40}
+
+#endif
diff --git a/libnx/nxglib/nxglib_splitline.c b/libnx/nxglib/nxglib_splitline.c
index fa2ccc1a0dac2f7dab10d67f1741bf21c26d5b06..31b5d914bdd38c9c00f73c635052735022ba591a 100644
--- a/libnx/nxglib/nxglib_splitline.c
+++ b/libnx/nxglib/nxglib_splitline.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * graphics/nxglib/nxglib_splitline.c
  *
- *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -139,7 +139,7 @@ int nxgl_splitline(FAR struct nxgl_vector_s *vector,
   b16_t b16x;
   b16_t b16y;
 
-  gvdbg("vector: (%d,%d)->(%d,%d) linewidth: %d\n",
+  ginfo("vector: (%d,%d)->(%d,%d) linewidth: %d\n",
         vector->pt1.x, vector->pt1.y, vector->pt2.x, vector->pt2.y, linewidth);
 
   /* First, check the linewidth */
@@ -190,7 +190,7 @@ int nxgl_splitline(FAR struct nxgl_vector_s *vector,
       rect->pt1.y = vector->pt1.y - (linewidth >> 1);
       rect->pt2.y = rect->pt1.y + linewidth - 1;
 
-      gvdbg("Horizontal rect: (%d,%d),(%d,%d)\n",
+      ginfo("Horizontal rect: (%d,%d),(%d,%d)\n",
             rect->pt1.x, rect->pt1.y, rect->pt2.x, rect->pt2.y);
 
       return 2;
@@ -208,7 +208,7 @@ int nxgl_splitline(FAR struct nxgl_vector_s *vector,
       rect->pt1.x = line.pt1.x - (linewidth >> 1);
       rect->pt2.x = rect->pt1.x + linewidth - 1;
 
-      gvdbg("Vertical rect: (%d,%d),(%d,%d)\n",
+      ginfo("Vertical rect: (%d,%d),(%d,%d)\n",
             rect->pt1.x, rect->pt1.y, rect->pt2.x, rect->pt2.y);
 
       return 2;
@@ -231,7 +231,43 @@ int nxgl_splitline(FAR struct nxgl_vector_s *vector,
       traps[1].bot.x2 = traps[1].bot.x1;
       traps[1].bot.y  = line.pt2.y;
 
-      gvdbg("Vertical traps[1]: (%08x,%08x,%d),(%08x,%08x, %d)\n",
+      ginfo("Vertical traps[1]: (%08x,%08x,%d),(%08x,%08x, %d)\n",
+            traps[1].top.x1, traps[1].top.x2, traps[1].top.y,
+            traps[1].bot.x1, traps[1].bot.x2, traps[1].bot.y);
+
+      return 1;
+    }
+  else if (linewidth == 1)
+    {
+      b16_t pixels_per_row;
+
+      /* Close to horizontal line of width 1 */
+
+      pixels_per_row  = itob16(line.pt2.x - line.pt1.x) /
+                        (line.pt2.y - line.pt1.y);
+
+      traps[1].top.x1 = itob16(line.pt1.x);
+      traps[1].top.x2 = traps[1].top.x1 + pixels_per_row;
+      traps[1].top.y  = line.pt1.y;
+
+      traps[1].bot.x2 = itob16(line.pt2.x);
+      traps[1].bot.x1 = traps[1].bot.x2 - pixels_per_row;
+      traps[1].bot.y  = line.pt2.y;
+
+      if (pixels_per_row < 0)
+        {
+          b16_t tmp;
+
+          tmp             = traps[1].top.x2;
+          traps[1].top.x2 = traps[1].top.x1;
+          traps[1].top.x1 = tmp;
+
+          tmp             = traps[1].bot.x2;
+          traps[1].bot.x2 = traps[1].bot.x1;
+          traps[1].bot.x1 = tmp;
+        }
+
+      ginfo("Horizontal traps[1]: (%08x,%08x,%d),(%08x,%08x, %d)\n",
             traps[1].top.x1, traps[1].top.x2, traps[1].top.y,
             traps[1].bot.x1, traps[1].bot.x2, traps[1].bot.y);
 
@@ -277,7 +313,7 @@ int nxgl_splitline(FAR struct nxgl_vector_s *vector,
   sinangle   =  b16sin(angle);
   b16xoffset = (linewidth * sinangle + 1) >> 1;
 
-  gvdbg("height: %d width: %d angle: %08x b16yoffset: %08x b16xoffset: %08x\n",
+  ginfo("height: %d width: %d angle: %08x b16yoffset: %08x b16xoffset: %08x\n",
         iheight, iwidth, angle, b16yoffset, b16xoffset);
 
   /* Now we know all four points of the rotated rectangle */
@@ -307,7 +343,7 @@ int nxgl_splitline(FAR struct nxgl_vector_s *vector,
           quad[2].x = b16x + b16xoffset;
           quad[3].x = b16x - b16xoffset;
 
-          gvdbg("Southeast: quad (%08x,%08x),(%08x,%08x),(%08x,%08x),(%08x,%08x)\n",
+          ginfo("Southeast: quad (%08x,%08x),(%08x,%08x),(%08x,%08x),(%08x,%08x)\n",
                 quad[0].x, quad[0].y, quad[1].x, quad[1].y,
                 quad[2].x, quad[2].y, quad[3].x, quad[3].y);
 
@@ -408,7 +444,7 @@ int nxgl_splitline(FAR struct nxgl_vector_s *vector,
           quad[2].x = b16x - b16xoffset;
           quad[3].x = b16x + b16xoffset;
 
-          gvdbg("Southwest: quad (%08x,%08x),(%08x,%08x),(%08x,%08x),(%08x,%08x)\n",
+          ginfo("Southwest: quad (%08x,%08x),(%08x,%08x),(%08x,%08x),(%08x,%08x)\n",
                 quad[0].x, quad[0].y, quad[1].x, quad[1].y,
                 quad[2].x, quad[2].y, quad[3].x, quad[3].y);
 
@@ -498,13 +534,13 @@ int nxgl_splitline(FAR struct nxgl_vector_s *vector,
           traps[2].bot.y  = b16toi(quad[3].y + b16HALF);
         }
 
-      gvdbg("traps[0]: (%08x,%08x,%d),(%08x,%08x,%d)\n",
+      ginfo("traps[0]: (%08x,%08x,%d),(%08x,%08x,%d)\n",
             traps[0].top.x1, traps[0].top.x2, traps[0].top.y,
             traps[0].bot.x1, traps[0].bot.x2, traps[0].bot.y);
-      gvdbg("traps[1]: (%08x,%08x,%d),(%08x,%08x,%d)\n",
+      ginfo("traps[1]: (%08x,%08x,%d),(%08x,%08x,%d)\n",
             traps[1].top.x1, traps[1].top.x2, traps[1].top.y,
             traps[1].bot.x1, traps[1].bot.x2, traps[1].bot.y);
-      gvdbg("traps[2]: (%08x,%08x,%d),(%08x,%08x,%d)\n",
+      ginfo("traps[2]: (%08x,%08x,%d),(%08x,%08x,%d)\n",
             traps[2].top.x1, traps[2].top.x2, traps[2].top.y,
             traps[2].bot.x1, traps[2].bot.x2, traps[2].bot.y);
 
@@ -523,7 +559,7 @@ int nxgl_splitline(FAR struct nxgl_vector_s *vector,
   traps[1].bot.x2 = traps[1].bot.x1 + itob16(linewidth - 1);
   traps[1].bot.y  = line.pt2.y;
 
-  gvdbg("Horizontal traps[1]: (%08x,%08x,%d),(%08x,%08x, %d)\n",
+  ginfo("Horizontal traps[1]: (%08x,%08x,%d),(%08x,%08x, %d)\n",
         traps[1].top.x1, traps[1].top.x2, traps[1].top.y,
         traps[1].bot.x1, traps[1].bot.x2, traps[1].bot.y);
 
diff --git a/libnx/nxmu/nx_bitmap.c b/libnx/nxmu/nx_bitmap.c
index 6ed0096b7b6d475e3cdfc4b4f0f8d706adb4fe4f..9c6929157249729a9b52b77c9359a40f97b586ad 100644
--- a/libnx/nxmu/nx_bitmap.c
+++ b/libnx/nxmu/nx_bitmap.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libnx/nxmu/nx_bitmap.c
  *
- *   Copyright (C) 2008-2009, 2011-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009, 2011-2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -46,25 +46,7 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
+#include 
 
 /****************************************************************************
  * Public Functions
@@ -102,7 +84,7 @@ int nx_bitmap(NXWINDOW hwnd, FAR const struct nxgl_rect_s *dest,
   int ret;
   sem_t sem_done;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd || !dest || !src || !origin)
     {
       set_errno(EINVAL);
@@ -133,10 +115,16 @@ int nx_bitmap(NXWINDOW hwnd, FAR const struct nxgl_rect_s *dest,
 
   if (ret != OK)
     {
-      gdbg("sem_init failed: %d\n", errno);
+      gerr("ERROR: sem_init failed: %d\n", errno);
       return ret;
     }
 
+  /* The sem_done semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  (void)sem_setprotocol(&sem_done, SEM_PRIO_NONE);
+
   /* Forward the fill command to the server */
 
   ret = nxmu_sendwindow(wnd, &outmsg, sizeof(struct nxsvrmsg_bitmap_s));
diff --git a/libnx/nxmu/nx_block.c b/libnx/nxmu/nx_block.c
index 56b66f23a9f23ec0a45e818b111ecf2aee2a4016..4cab852e3604535433239f2a398014110e0389af 100644
--- a/libnx/nxmu/nx_block.c
+++ b/libnx/nxmu/nx_block.c
@@ -46,26 +46,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -107,7 +87,7 @@ int nx_block(NXWINDOW hwnd, FAR void *arg)
   struct nxsvrmsg_blocked_s outmsg;
   int ret = OK;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hwnd)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxmu/nx_closewindow.c b/libnx/nxmu/nx_closewindow.c
index 0ac1909583705e6528a76aa7f7f5ed1ca656049b..6e5661f6b449d2c6a59d9bad0c7c452b44dc35d3 100644
--- a/libnx/nxmu/nx_closewindow.c
+++ b/libnx/nxmu/nx_closewindow.c
@@ -47,26 +47,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libnx/nxmu/nx_connect.c b/libnx/nxmu/nx_connect.c
index 07cf7a7514770c13a1368a5a3d1222a42893fb57..9e035c86dd3cdea6b68ceae40b6f92e866ef4ef5 100644
--- a/libnx/nxmu/nx_connect.c
+++ b/libnx/nxmu/nx_connect.c
@@ -52,14 +52,6 @@
 
 #include "nxcontext.h"
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
@@ -76,14 +68,6 @@
 static sem_t    g_nxlibsem = { 1 };
 static uint32_t g_nxcid    = 1;
 
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -122,7 +106,7 @@ NXHANDLE nx_connectinstance(FAR const char *svrmqname)
 
   /* Sanity checking */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!svrmqname)
     {
       set_errno(EINVAL);
@@ -160,7 +144,7 @@ NXHANDLE nx_connectinstance(FAR const char *svrmqname)
 #endif
   if (conn->crdmq == (mqd_t)-1)
     {
-      gdbg("mq_open(%s) failed: %d\n", climqname, errno);
+      gerr("ERROR: mq_open(%s) failed: %d\n", climqname, errno);
       goto errout_with_conn;
     }
 
@@ -173,7 +157,7 @@ NXHANDLE nx_connectinstance(FAR const char *svrmqname)
   conn->cwrmq = mq_open(svrmqname, O_WRONLY|O_CREAT, 0666, &attr);
   if (conn->cwrmq == (mqd_t)-1)
     {
-      gdbg("mq_open(%s) failed: %d\n", svrmqname, errno);
+      gerr("ERROR: mq_open(%s) failed: %d\n", svrmqname, errno);
       goto errout_with_rmq;
     }
 
@@ -185,7 +169,7 @@ NXHANDLE nx_connectinstance(FAR const char *svrmqname)
   ret = nxmu_sendserver(conn, &outmsg, sizeof(struct nxsvrmsg_s));
   if (ret < 0)
     {
-      gdbg("nxmu_sendserver failed: %d\n", errno);
+      gerr("ERROR: nxmu_sendserver failed: %d\n", errno);
       goto errout_with_wmq;
     }
 
@@ -201,7 +185,7 @@ NXHANDLE nx_connectinstance(FAR const char *svrmqname)
       ret = nx_eventhandler((NXHANDLE)conn);
       if (ret < 0)
         {
-          gdbg("nx_message failed: %d\n", errno);
+          gerr("ERROR: nx_message failed: %d\n", errno);
           goto errout_with_wmq;
         }
       usleep(300000);
diff --git a/libnx/nxmu/nx_constructwindow.c b/libnx/nxmu/nx_constructwindow.c
index 677706e1856160cc8bf52afdce10e8ac3a8f281f..8b15f35029fa3dce9506a5501b624957df9b4a81 100644
--- a/libnx/nxmu/nx_constructwindow.c
+++ b/libnx/nxmu/nx_constructwindow.c
@@ -49,26 +49,6 @@
 
 #include "nxcontext.h"
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -108,7 +88,7 @@ int nx_constructwindow(NXHANDLE handle, NXWINDOW hwnd,
   FAR struct nxbe_window_s *wnd = (FAR struct nxbe_window_s *)hwnd;
   struct nxsvrmsg_openwindow_s outmsg;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxmu/nx_disconnect.c b/libnx/nxmu/nx_disconnect.c
index 323e414af70583c8bc3bb924fb4bcd42feb5b50b..d8cd4517e266579264f87465815708e48d17022d 100644
--- a/libnx/nxmu/nx_disconnect.c
+++ b/libnx/nxmu/nx_disconnect.c
@@ -46,26 +46,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -102,6 +82,6 @@ void nx_disconnect(NXHANDLE handle)
   ret = nxmu_sendserver(conn, &outmsg, sizeof(struct nxsvrmsg_s));
   if (ret < 0)
     {
-      gdbg("ERROR: nxmu_sendserver() returned %d\n", ret);
+      gerr("ERROR: nxmu_sendserver() returned %d\n", ret);
     }
 }
diff --git a/libnx/nxmu/nx_eventhandler.c b/libnx/nxmu/nx_eventhandler.c
index 71172fe6f97fa927c12e6bcb6de7e6f344720906..b6c6ca7094b1d4c211ea16b4701a68da0166c617 100644
--- a/libnx/nxmu/nx_eventhandler.c
+++ b/libnx/nxmu/nx_eventhandler.c
@@ -52,22 +52,6 @@
 
 #include "nxcontext.h"
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -164,7 +148,7 @@ int nx_eventhandler(NXHANDLE handle)
                 }
               else
                 {
-                  gdbg("mq_receive failed: %d\n", errno);
+                  gerr("ERROR: mq_receive failed: %d\n", errno);
                   return ERROR;
                 }
             }
@@ -177,7 +161,7 @@ int nx_eventhandler(NXHANDLE handle)
   /* Dispatch the message appropriately */
 
   msg = (struct nxsvrmsg_s *)buffer;
-  gvdbg("Received msgid=%d\n", msg->msgid);
+  ginfo("Received msgid=%d\n", msg->msgid);
   switch (msg->msgid)
     {
     case NX_CLIMSG_CONNECTED:
@@ -254,7 +238,8 @@ int nx_eventhandler(NXHANDLE handle)
       break;
 
     default:
-      gdbg("Unrecognized message opcode: %d\n", ((FAR struct nxsvrmsg_s *)buffer)->msgid);
+      gerr("ERROR: Unrecognized message opcode: %d\n",
+           ((FAR struct nxsvrmsg_s *)buffer)->msgid);
       break;
     }
 
diff --git a/libnx/nxmu/nx_eventnotify.c b/libnx/nxmu/nx_eventnotify.c
index 37f2b1591e3b9714ce5f60c3c60534add8683143..70653f62e2e2d1d9c90067c6f1d2280c60d195ba 100644
--- a/libnx/nxmu/nx_eventnotify.c
+++ b/libnx/nxmu/nx_eventnotify.c
@@ -50,26 +50,6 @@
 
 #ifndef CONFIG_DISABLE_SIGNALS
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libnx/nxmu/nx_fill.c b/libnx/nxmu/nx_fill.c
index 263431b064a07c67f670a450fdcde400e5939cca..bb59f6b28119c73530b3935aebadefc20a657732 100644
--- a/libnx/nxmu/nx_fill.c
+++ b/libnx/nxmu/nx_fill.c
@@ -48,26 +48,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -94,7 +74,7 @@ int nx_fill(NXWINDOW hwnd, FAR const struct nxgl_rect_s *rect,
   FAR struct nxbe_window_s *wnd = (FAR struct nxbe_window_s *)hwnd;
   struct nxsvrmsg_fill_s  outmsg;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd || !rect || !color)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxmu/nx_filltrapezoid.c b/libnx/nxmu/nx_filltrapezoid.c
index 374d86614ed0c8eda9022988ce279b14c118c1fd..6dbdf27ab3b22c4d56d9f17bd771210ad8fd7a4b 100644
--- a/libnx/nxmu/nx_filltrapezoid.c
+++ b/libnx/nxmu/nx_filltrapezoid.c
@@ -48,26 +48,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -99,7 +79,7 @@ int nx_filltrapezoid(NXWINDOW hwnd, FAR const struct nxgl_rect_s *clip,
 
   /* Some debug-only sanity checks */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd || !trap || !color)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxmu/nx_getposition.c b/libnx/nxmu/nx_getposition.c
index 19fee248ff9664456980ec337dac47f954c7374b..d18d1d3a593f8a4a0c3128b1071a6e2206f8534a 100644
--- a/libnx/nxmu/nx_getposition.c
+++ b/libnx/nxmu/nx_getposition.c
@@ -46,26 +46,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -91,7 +71,7 @@ int nx_getposition(NXWINDOW hwnd)
   FAR struct nxbe_window_s     *wnd = (FAR struct nxbe_window_s *)hwnd;
   struct nxsvrmsg_getposition_s outmsg;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxmu/nx_getrectangle.c b/libnx/nxmu/nx_getrectangle.c
index a3b9a3a2416100669597c46f7aa4848c6b8ed60d..9420d02df55fe9f220c55339c91e7f0812c07693 100644
--- a/libnx/nxmu/nx_getrectangle.c
+++ b/libnx/nxmu/nx_getrectangle.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * libnx/nxmu/nx_getrectangle.c
  *
- *   Copyright (C) 2011-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -47,25 +47,7 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
+#include 
 
 /****************************************************************************
  * Public Functions
@@ -101,10 +83,10 @@ int nx_getrectangle(NXWINDOW hwnd, FAR const struct nxgl_rect_s *rect,
   int ret;
   sem_t sem_done;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hwnd || !rect || !dest)
     {
-      gvdbg("Invalid parameters\n");
+      ginfo("Invalid parameters\n");
       set_errno(EINVAL);
       return ERROR;
     }
@@ -127,10 +109,16 @@ int nx_getrectangle(NXWINDOW hwnd, FAR const struct nxgl_rect_s *rect,
 
   if (ret != OK)
     {
-      gdbg("sem_init failed: %d\n", errno);
+      gerr("ERROR: sem_init failed: %d\n", errno);
       return ret;
     }
 
+  /* The sem_done semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  (void)sem_setprotocol(&sem_done, SEM_PRIO_NONE);
+
   /* Forward the fill command to the server */
 
   ret = nxmu_sendwindow(wnd, &outmsg, sizeof(struct nxsvrmsg_getrectangle_s));
diff --git a/libnx/nxmu/nx_kbdchin.c b/libnx/nxmu/nx_kbdchin.c
index c94f6fd973ae6bb601d22532f6f040902b487b84..6c634ff894f42d2df95cf64bad12011ab9a6b538 100644
--- a/libnx/nxmu/nx_kbdchin.c
+++ b/libnx/nxmu/nx_kbdchin.c
@@ -48,26 +48,6 @@
 
 #ifdef CONFIG_NX_KBD
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libnx/nxmu/nx_kbdin.c b/libnx/nxmu/nx_kbdin.c
index 610792c5851a5ed31ee7d93773b32f13e80ecadc..1fcaea0dd6cd03a7dbd5b049bd28b242ee766b63 100644
--- a/libnx/nxmu/nx_kbdin.c
+++ b/libnx/nxmu/nx_kbdin.c
@@ -49,26 +49,6 @@
 
 #ifdef CONFIG_NX_KBD
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libnx/nxmu/nx_lower.c b/libnx/nxmu/nx_lower.c
index 347089cb0748be9786dd5197dd5d7a695f8ec6e5..06952d17f7931212fac87936433d9ecf9348827f 100644
--- a/libnx/nxmu/nx_lower.c
+++ b/libnx/nxmu/nx_lower.c
@@ -46,26 +46,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libnx/nxmu/nx_mousein.c b/libnx/nxmu/nx_mousein.c
index ea10ca005fdd8656802c5ace8707714fccf8c0bf..6a6378e460eaa2c0fb3ca94186502efeaae2ba84 100644
--- a/libnx/nxmu/nx_mousein.c
+++ b/libnx/nxmu/nx_mousein.c
@@ -48,26 +48,6 @@
 
 #ifdef CONFIG_NX_XYINPUT
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libnx/nxmu/nx_move.c b/libnx/nxmu/nx_move.c
index 19d36703ecdf33e0c4c2bad346934ea0b2cda616..144e9e588b589bc07b0990ad19df330ed2526c7b 100644
--- a/libnx/nxmu/nx_move.c
+++ b/libnx/nxmu/nx_move.c
@@ -46,26 +46,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -92,7 +72,7 @@ int nx_move(NXWINDOW hwnd, FAR const struct nxgl_rect_s *rect,
   FAR struct nxbe_window_s *wnd = (FAR struct nxbe_window_s *)hwnd;
   struct nxsvrmsg_move_s    outmsg;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxmu/nx_openwindow.c b/libnx/nxmu/nx_openwindow.c
index 5100a3b9a50684729b742ef8b5cf7543f5234311..3280ee4225d1ff04f2de5c47dbe3b1c9c17ddab7 100644
--- a/libnx/nxmu/nx_openwindow.c
+++ b/libnx/nxmu/nx_openwindow.c
@@ -48,26 +48,6 @@
 
 #include "nxcontext.h"
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -95,7 +75,7 @@ NXWINDOW nx_openwindow(NXHANDLE handle, FAR const struct nx_callback_s *cb,
   FAR struct nxbe_window_s *wnd;
   int ret;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!handle || !cb)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxmu/nx_raise.c b/libnx/nxmu/nx_raise.c
index 9917d2748a0592992af13e5672e34317c990349c..a149acdb280f4738870590f521dc4ca104c9b0a5 100644
--- a/libnx/nxmu/nx_raise.c
+++ b/libnx/nxmu/nx_raise.c
@@ -46,26 +46,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libnx/nxmu/nx_redrawreq.c b/libnx/nxmu/nx_redrawreq.c
index ed0e6390967ca8328add81ca9a415f7800092a2d..520305bf80ddb1edc9e46709d9a33e01b2762a03 100644
--- a/libnx/nxmu/nx_redrawreq.c
+++ b/libnx/nxmu/nx_redrawreq.c
@@ -47,26 +47,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -106,6 +86,6 @@ void nx_redrawreq(NXWINDOW hwnd, FAR const struct nxgl_rect_s *rect)
   ret = nxmu_sendwindow(wnd, &outmsg, sizeof(struct nxsvrmsg_redrawreq_s));
   if (ret < 0)
     {
-      gdbg("ERROR: nxmu_sendwindow failed: %d\n", errno);
+      gerr("ERROR: nxmu_sendwindow failed: %d\n", errno);
     }
 }
diff --git a/libnx/nxmu/nx_releasebkgd.c b/libnx/nxmu/nx_releasebkgd.c
index 3bad1b265da18ae95dfef03b56d34556d2d413e4..9fe9a44c719591ce06e54198115795cd801ec28d 100644
--- a/libnx/nxmu/nx_releasebkgd.c
+++ b/libnx/nxmu/nx_releasebkgd.c
@@ -46,26 +46,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -90,7 +70,7 @@ int nx_releasebkgd(NXWINDOW hwnd)
   FAR struct nxbe_window_s *wnd = (FAR struct nxbe_window_s *)hwnd;
   struct nxsvrmsg_releasebkgd_s outmsg;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxmu/nx_requestbkgd.c b/libnx/nxmu/nx_requestbkgd.c
index 20f217d084957fb9e6277e2b665a125f6220beaa..154b8e19bf212209553a781d28c2406572f24dc0 100644
--- a/libnx/nxmu/nx_requestbkgd.c
+++ b/libnx/nxmu/nx_requestbkgd.c
@@ -45,26 +45,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -116,7 +96,7 @@ int nx_requestbkgd(NXHANDLE handle, FAR const struct nx_callback_s *cb,
   FAR struct nxfe_conn_s *conn = (FAR struct nxfe_conn_s *)handle;
   struct nxsvrmsg_requestbkgd_s outmsg;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!conn || !cb)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxmu/nx_setbgcolor.c b/libnx/nxmu/nx_setbgcolor.c
index ac3afe48a29af316f4ed88a03375ceee7d36f218..74c683acf34c0a9ab02c9b1a0280f8897438054d 100644
--- a/libnx/nxmu/nx_setbgcolor.c
+++ b/libnx/nxmu/nx_setbgcolor.c
@@ -45,26 +45,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -90,7 +70,7 @@ int nx_setbgcolor(NXHANDLE handle,
   FAR struct nxfe_conn_s *conn = (FAR struct nxfe_conn_s *)handle;
   struct nxsvrmsg_setbgcolor_s outmsg;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!conn)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxmu/nx_setpixel.c b/libnx/nxmu/nx_setpixel.c
index fef16c05357642391c28f361f7ca21765aff4b9a..376f85b04c4bee6fef21770773c8765ccf665ce0 100644
--- a/libnx/nxmu/nx_setpixel.c
+++ b/libnx/nxmu/nx_setpixel.c
@@ -48,26 +48,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -95,7 +75,7 @@ int nx_setpixel(NXWINDOW hwnd, FAR const struct nxgl_point_s *pos,
   FAR struct nxbe_window_s  *wnd = (FAR struct nxbe_window_s *)hwnd;
   struct nxsvrmsg_setpixel_s outmsg;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd || !pos || !color)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxmu/nx_setposition.c b/libnx/nxmu/nx_setposition.c
index 10568595a6cdd0d42ed0b38fc00c2addfd3f68b4..a537d1b79a706e09665a624a48b03cb7e81d335f 100644
--- a/libnx/nxmu/nx_setposition.c
+++ b/libnx/nxmu/nx_setposition.c
@@ -46,26 +46,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -90,7 +70,7 @@ int nx_setposition(NXWINDOW hwnd, FAR const struct nxgl_point_s *pos)
   FAR struct nxbe_window_s     *wnd = (FAR struct nxbe_window_s *)hwnd;
   struct nxsvrmsg_setposition_s outmsg;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd || !pos)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxmu/nx_setsize.c b/libnx/nxmu/nx_setsize.c
index 948ace430770b27f4dcf0c58deda789755a44f63..dd2ee119ff1dd9dc4bc8009b6b78a0d8710c856a 100644
--- a/libnx/nxmu/nx_setsize.c
+++ b/libnx/nxmu/nx_setsize.c
@@ -46,26 +46,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -90,7 +70,7 @@ int nx_setsize(NXWINDOW hwnd, FAR const struct nxgl_size_s *size)
   FAR struct nxbe_window_s *wnd = (FAR struct nxbe_window_s *)hwnd;
   struct nxsvrmsg_setsize_s outmsg;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd || !size)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxmu/nxmu_semtake.c b/libnx/nxmu/nxmu_semtake.c
index 9753e6e3b2ed89887735aa1fad01ed3d41371802..ce532f0fe6dc8399b9535fda2f9da72a0c965270 100644
--- a/libnx/nxmu/nxmu_semtake.c
+++ b/libnx/nxmu/nxmu_semtake.c
@@ -46,26 +46,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/libnx/nxmu/nxmu_sendserver.c b/libnx/nxmu/nxmu_sendserver.c
index 0281903980dcac298af2284fa256a9215cda3882..e239382b2f62d6df075f24aa80306e9d21cedac9 100644
--- a/libnx/nxmu/nxmu_sendserver.c
+++ b/libnx/nxmu/nxmu_sendserver.c
@@ -45,26 +45,6 @@
 
 #include 
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -92,7 +72,7 @@ int nxmu_sendserver(FAR struct nxfe_conn_s *conn, FAR const void *msg,
 
   /* Sanity checking */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!conn || !conn->cwrmq)
     {
       set_errno(EINVAL);
@@ -105,7 +85,7 @@ int nxmu_sendserver(FAR struct nxfe_conn_s *conn, FAR const void *msg,
   ret = mq_send(conn->cwrmq, msg, msglen, NX_SVRMSG_PRIO);
   if (ret < 0)
     {
-      gdbg("mq_send failed: %d\n", errno);
+      gerr("ERROR: mq_send failed: %d\n", errno);
     }
 
   return ret;
diff --git a/libnx/nxmu/nxmu_sendwindow.c b/libnx/nxmu/nxmu_sendwindow.c
index f240c5614f6f0f50c267fc89071e66bb5bbef213..350fecd41dcb74af3bbe6c06c8f36c58f3508aea 100644
--- a/libnx/nxmu/nxmu_sendwindow.c
+++ b/libnx/nxmu/nxmu_sendwindow.c
@@ -46,26 +46,6 @@
 #include 
 #include 
 
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -94,7 +74,7 @@ int nxmu_sendwindow(FAR struct nxbe_window_s *wnd, FAR const void *msg,
 
   /* Sanity checking */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!wnd || !wnd->conn)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxtk/nxtk_bitmaptoolbar.c b/libnx/nxtk/nxtk_bitmaptoolbar.c
index abc1815b8f70d0de1ebb47589aa1d40c8a93f72c..6f31d9300992ae7366323a75a3074684448c5ace 100644
--- a/libnx/nxtk/nxtk_bitmaptoolbar.c
+++ b/libnx/nxtk/nxtk_bitmaptoolbar.c
@@ -102,7 +102,7 @@ int nxtk_bitmaptoolbar(NXTKWINDOW hfwnd, FAR const struct nxgl_rect_s *dest,
   struct nxgl_point_s wndorigin;
   struct nxgl_rect_s clipdest;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hfwnd || !dest || !src || !origin)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxtk/nxtk_bitmapwindow.c b/libnx/nxtk/nxtk_bitmapwindow.c
index 59a8776b626e7ee07b3f67a52054e304296dbcd5..0371715ba7c400fdf6c2f9ab506559d1e9995b86 100644
--- a/libnx/nxtk/nxtk_bitmapwindow.c
+++ b/libnx/nxtk/nxtk_bitmapwindow.c
@@ -102,7 +102,7 @@ int nxtk_bitmapwindow(NXTKWINDOW hfwnd, FAR const struct nxgl_rect_s *dest,
   struct nxgl_point_s wndorigin;
   struct nxgl_rect_s clipdest;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hfwnd || !dest || !src || !origin)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxtk/nxtk_drawlinetoolbar.c b/libnx/nxtk/nxtk_drawlinetoolbar.c
index bd7744725e0431df54bdc3f0d8d0400d941dac10..84d25ad83caf307c6b7049f9a40b0a973c393569 100644
--- a/libnx/nxtk/nxtk_drawlinetoolbar.c
+++ b/libnx/nxtk/nxtk_drawlinetoolbar.c
@@ -102,7 +102,7 @@ int nxtk_drawlinetoolbar(NXTKWINDOW hfwnd,  FAR struct nxgl_vector_s *vector,
   struct nxgl_rect_s rect;
   int ret;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hfwnd || !vector || width < 1 || !color)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxtk/nxtk_drawlinewindow.c b/libnx/nxtk/nxtk_drawlinewindow.c
index a616ce13205741b0118c5332802443f18652ed4a..231842b8828a83cfe48ca8c457da0d4b4629ff60 100644
--- a/libnx/nxtk/nxtk_drawlinewindow.c
+++ b/libnx/nxtk/nxtk_drawlinewindow.c
@@ -101,7 +101,7 @@ int nxtk_drawlinewindow(NXTKWINDOW hfwnd, FAR struct nxgl_vector_s *vector,
   struct nxgl_rect_s rect;
   int ret;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hfwnd || !vector || width < 1 || !color)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxtk/nxtk_events.c b/libnx/nxtk/nxtk_events.c
index d7f33e6ebedd0259410da459feae54e9f8586684..6644366e2531f6d36f1cebe44f2735ad75c5d567 100644
--- a/libnx/nxtk/nxtk_events.c
+++ b/libnx/nxtk/nxtk_events.c
@@ -119,7 +119,7 @@ static void nxtk_redraw(NXWINDOW hwnd, FAR const struct nxgl_rect_s *rect,
 
   DEBUGASSERT(hwnd && rect && fwnd->fwcb);
 
-  gvdbg("hwnd=%p rect={(%d,%d),(%d,%d)} more=%d\n",
+  ginfo("hwnd=%p rect={(%d,%d),(%d,%d)} more=%d\n",
         hwnd, rect->pt1.x, rect->pt1.y, rect->pt2.x, rect->pt2.y, more);
 
   /* The incoming rectangle (rect) is relative to the containing window
@@ -137,7 +137,7 @@ static void nxtk_redraw(NXWINDOW hwnd, FAR const struct nxgl_rect_s *rect,
 
       nxtk_containerclip(fwnd, &intersection, rect, &fwnd->fwrect);
 
-      gvdbg("fwrect intersection={(%d,%d),(%d,%d)}\n",
+      ginfo("fwrect intersection={(%d,%d),(%d,%d)}\n",
            intersection.pt1.x, intersection.pt1.y,
            intersection.pt2.x, intersection.pt2.y);
 
@@ -160,7 +160,7 @@ static void nxtk_redraw(NXWINDOW hwnd, FAR const struct nxgl_rect_s *rect,
 
       nxtk_containerclip(fwnd, &intersection, rect, &fwnd->tbrect);
 
-      gvdbg("tbrect intersection={(%d,%d),(%d,%d)}\n",
+      ginfo("tbrect intersection={(%d,%d),(%d,%d)}\n",
            intersection.pt1.x, intersection.pt1.y,
            intersection.pt2.x, intersection.pt2.y);
 
@@ -187,7 +187,7 @@ static void nxtk_position(NXWINDOW hwnd, FAR const struct nxgl_size_s *size,
   FAR struct nxtk_framedwindow_s *fwnd = (FAR struct nxtk_framedwindow_s *)hwnd;
   struct nxgl_size_s subwindowsize;
 
-  gvdbg("hwnd=%p size=(%d,%d) pos=(%d,%d) bounds={(%d,%d),(%d,%d)}\n",
+  ginfo("hwnd=%p size=(%d,%d) pos=(%d,%d) bounds={(%d,%d),(%d,%d)}\n",
         hwnd, size->w, size->h, pos->x, pos->y,
         bounds->pt1.x, bounds->pt1.y, bounds->pt2.x, bounds->pt2.y);
 
diff --git a/libnx/nxtk/nxtk_filltoolbar.c b/libnx/nxtk/nxtk_filltoolbar.c
index 0d62eaaf84e2f52bc7af2cdaa06fd50cfef2bbee..25eb6a8e8e833a733ba7a10139db1034bb268de8 100644
--- a/libnx/nxtk/nxtk_filltoolbar.c
+++ b/libnx/nxtk/nxtk_filltoolbar.c
@@ -94,7 +94,7 @@ int nxtk_filltoolbar(NXTKWINDOW hfwnd, FAR const struct nxgl_rect_s *rect,
   FAR struct nxtk_framedwindow_s *fwnd = (FAR struct nxtk_framedwindow_s *)hfwnd;
   struct nxgl_rect_s fillrect;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hfwnd || !rect || !color)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxtk/nxtk_filltraptoolbar.c b/libnx/nxtk/nxtk_filltraptoolbar.c
index 1b7ae272770a6de462c3140bd198644baf983431..3ca0b38ad2361eb159c445f83d6079adeaa98530 100644
--- a/libnx/nxtk/nxtk_filltraptoolbar.c
+++ b/libnx/nxtk/nxtk_filltraptoolbar.c
@@ -95,7 +95,7 @@ int nxtk_filltraptoolbar(NXTKWINDOW hfwnd,
   FAR struct nxtk_framedwindow_s *fwnd = (FAR struct nxtk_framedwindow_s *)hfwnd;
   struct nxgl_rect_s relclip;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hfwnd || !trap || !color)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxtk/nxtk_filltrapwindow.c b/libnx/nxtk/nxtk_filltrapwindow.c
index bbfba26599e69acd5c56c663bd078dc9a0987366..88c3077223f2ea20ba85374f2c1c196e96e00b09 100644
--- a/libnx/nxtk/nxtk_filltrapwindow.c
+++ b/libnx/nxtk/nxtk_filltrapwindow.c
@@ -96,7 +96,7 @@ int nxtk_filltrapwindow(NXTKWINDOW hfwnd,
   struct nxgl_rect_s relclip;
   struct nxgl_trapezoid_s reltrap;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hfwnd || !trap || !color)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxtk/nxtk_fillwindow.c b/libnx/nxtk/nxtk_fillwindow.c
index fa0fd8d8f2408c533ab022c08e1c7d2ef36e277b..9ff1caca57eb4bba494eccd8ae5ef22c606a1ed4 100644
--- a/libnx/nxtk/nxtk_fillwindow.c
+++ b/libnx/nxtk/nxtk_fillwindow.c
@@ -94,7 +94,7 @@ int nxtk_fillwindow(NXTKWINDOW hfwnd, FAR const struct nxgl_rect_s *rect,
   FAR struct nxtk_framedwindow_s *fwnd = (FAR struct nxtk_framedwindow_s *)hfwnd;
   struct nxgl_rect_s fillrect;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hfwnd || !rect || !color)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxtk/nxtk_gettoolbar.c b/libnx/nxtk/nxtk_gettoolbar.c
index 593fcb09a639525f803d5d399edcaf48da82e1e2..bc05cbce94261939029d686f700c33033161a10f 100644
--- a/libnx/nxtk/nxtk_gettoolbar.c
+++ b/libnx/nxtk/nxtk_gettoolbar.c
@@ -100,10 +100,10 @@ int nxtk_gettoolbar(NXTKWINDOW hfwnd, FAR const struct nxgl_rect_s *rect,
   FAR struct nxtk_framedwindow_s *fwnd = (FAR struct nxtk_framedwindow_s *)hfwnd;
   struct nxgl_rect_s getrect;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hfwnd || !rect || !dest)
     {
-      gvdbg("Invalid parameters\n");
+      ginfo("Invalid parameters\n");
       set_errno(EINVAL);
       return ERROR;
     }
diff --git a/libnx/nxtk/nxtk_getwindow.c b/libnx/nxtk/nxtk_getwindow.c
index b22945997378144b7825fee5b592deb7c61945e1..4106267fb0cb311ba93d3a0119b3eeb9ecb5ab91 100644
--- a/libnx/nxtk/nxtk_getwindow.c
+++ b/libnx/nxtk/nxtk_getwindow.c
@@ -100,10 +100,10 @@ int nxtk_getwindow(NXTKWINDOW hfwnd, FAR const struct nxgl_rect_s *rect,
   FAR struct nxtk_framedwindow_s *fwnd = (FAR struct nxtk_framedwindow_s *)hfwnd;
   struct nxgl_rect_s getrect;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hfwnd || !rect || !dest)
     {
-      gvdbg("Invalid parameters\n");
+      ginfo("Invalid parameters\n");
       set_errno(EINVAL);
       return ERROR;
     }
diff --git a/libnx/nxtk/nxtk_movetoolbar.c b/libnx/nxtk/nxtk_movetoolbar.c
index 62d14e7bf85fa8ab02c41cfcee411b10f36862b5..913142a0d4ae37dc5d1f4c9859db01f5143a3e88 100644
--- a/libnx/nxtk/nxtk_movetoolbar.c
+++ b/libnx/nxtk/nxtk_movetoolbar.c
@@ -99,7 +99,7 @@ int nxtk_movetoolbar(NXTKWINDOW hfwnd, FAR const struct nxgl_rect_s *rect,
   struct nxgl_rect_s srcrect;
   struct nxgl_point_s clipoffset;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hfwnd || !rect || !offset)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxtk/nxtk_movewindow.c b/libnx/nxtk/nxtk_movewindow.c
index 2b34f44a8b655bf9040a167dca201d45e96e92f2..302cff98d1d0bc23328c16f5c1f008b1bf8efd7b 100644
--- a/libnx/nxtk/nxtk_movewindow.c
+++ b/libnx/nxtk/nxtk_movewindow.c
@@ -98,7 +98,7 @@ int nxtk_movewindow(NXTKWINDOW hfwnd, FAR const struct nxgl_rect_s *rect,
   struct nxgl_rect_s srcrect;
   struct nxgl_point_s clipoffset;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hfwnd || !rect || !offset)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxtk/nxtk_opentoolbar.c b/libnx/nxtk/nxtk_opentoolbar.c
index 26aa4c504f745781b041c6b7a2385a3807923fa5..f5d58979eaaaede926b9217b769208fccc7687fa 100644
--- a/libnx/nxtk/nxtk_opentoolbar.c
+++ b/libnx/nxtk/nxtk_opentoolbar.c
@@ -96,7 +96,7 @@ int nxtk_opentoolbar(NXTKWINDOW hfwnd, nxgl_coord_t height,
 {
   FAR struct nxtk_framedwindow_s *fwnd = (FAR struct nxtk_framedwindow_s *)hfwnd;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hfwnd || !cb)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxtk/nxtk_openwindow.c b/libnx/nxtk/nxtk_openwindow.c
index 796a57d3b7048e3a0a4ecddca6eebe4dba5e7232..ebefaec892060f1eb069f92fc2a4cc9a77f3f42a 100644
--- a/libnx/nxtk/nxtk_openwindow.c
+++ b/libnx/nxtk/nxtk_openwindow.c
@@ -120,7 +120,7 @@ NXTKWINDOW nxtk_openwindow(NXHANDLE handle,
   FAR struct nxtk_framedwindow_s *fwnd;
   int ret;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!handle || !cb)
     {
       set_errno(EINVAL);
diff --git a/libnx/nxtk/nxtk_setsize.c b/libnx/nxtk/nxtk_setsize.c
index 8848c717200c60c1e3cc99bbfdd1444785c2e6ce..7e9079696647c847f2551fc6a00ef0cdc0a476ae 100644
--- a/libnx/nxtk/nxtk_setsize.c
+++ b/libnx/nxtk/nxtk_setsize.c
@@ -94,7 +94,7 @@ int nxtk_setsize(NXTKWINDOW hfwnd, FAR const struct nxgl_size_s *size)
   FAR struct nxtk_framedwindow_s *fwnd = (FAR struct nxtk_framedwindow_s *)hfwnd;
   struct nxgl_size_s newsize;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!hfwnd || !size)
     {
       set_errno(EINVAL);
diff --git a/libxx/Kconfig b/libxx/Kconfig
index 4707bb87150a0c2706ed97384ffaa905380eeff0..b55bcd799a6f28e905fd64017937aa915cfd708b 100644
--- a/libxx/Kconfig
+++ b/libxx/Kconfig
@@ -38,6 +38,36 @@ config CXX_NEWLONG
 		C++ library routines because the NuttX size_t might not have
 		the same underlying type as your toolchain's size_t.
 
+
+comment "LLVM C++ Library (libcxx)"
+
+config LIBCXX
+	bool "Build LLVM libcxx (must be installed)"
+	default n
+	---help---
+		If you have installed libcxx into the NuttX source try, then it can
+		be built by selecting this option.  See the README.txt file in the
+		libcxx packet for information on installing libcxx.
+
+if LIBCXX
+
+config LIBCXX_EXCEPTION
+	bool "Enable Exception Suppport"
+	default y
+
+config LIBCXX_IOSTREAM_BUFSIZE
+	int "IO Stream Buffer Size"
+	default 32
+
+config LIBCXX_HAVE_LIBSUPCXX
+	bool "Have libsupc++ (required)"
+	default y
+	---help---
+		Select if your toolchain provides libsupc++.  This option is required
+		at present because the built-in libsupc++ support is incomplete.
+
+endif
+
 comment "uClibc++ Standard C++ Library"
 
 config UCLIBCXX
diff --git a/libxx/Makefile b/libxx/Makefile
index 02402dbf7db381aee4319ab998ad4934ffd2e3b8..766bd5d62d36dc13b1603ba0ddb1a6b0d644d575 100644
--- a/libxx/Makefile
+++ b/libxx/Makefile
@@ -41,18 +41,18 @@ ASRCS =
 CSRCS =
 
 CXXSRCS  = libxx_cxapurevirtual.cxx libxx_eabi_atexit.cxx  libxx_cxa_atexit.cxx
-ifeq ($(CONFIG_UCLIBCXX_EXCEPTION),y)
+ifneq (,$(findstring y,$(CONFIG_UCLIBCXX_EXCEPTION) $(CONFIG_LIBCXX_EXCEPTION)))
 CXXSRCS += libxx__gnu_unwind_find_exidx.cxx
 endif
 
-# Some of the libxx/ files are not need if uClibc++ is installed because
-# uClibx++ replaces them
+# Some of the libxx/ files are not need if uClibc++ or libcxx is installed
+# because uClibx++ or libcxx will replaces them
 
-ifneq ($(CONFIG_UCLIBCXX),y)
+ifeq (,$(findstring y,$(CONFIG_UCLIBCXX) $(CONFIG_LIBCXX)))
 CXXSRCS += libxx_delete.cxx libxx_deletea.cxx libxx_new.cxx libxx_newa.cxx
 CXXSRCS += libxx_stdthrow.cxx libxx_cxa_guard.cxx
 else
-ifneq ($(UCLIBCXX_EXCEPTION),y)
+ifeq (,$(findstring y,$(CONFIG_UCLIBCXX_EXCEPTION) $(CONFIG_LIBCXX_EXCEPTION)))
 CXXSRCS += libxx_stdthrow.cxx
 endif
 endif
@@ -76,6 +76,10 @@ ifeq ($(CONFIG_UCLIBCXX),y)
 include uClibc++/Make.defs
 endif
 
+ifeq ($(CONFIG_LIBCXX),y)
+include libcxx/Make.defs
+endif
+
 # Object Files
 
 AOBJS = $(ASRCS:.S=$(OBJEXT))
diff --git a/libxx/libxx_new.cxx b/libxx/libxx_new.cxx
index a4575519ab414111c8f113f0095a3715fa1d64bf..863321e6738986522ed2babe319d6da0d087bf32 100644
--- a/libxx/libxx_new.cxx
+++ b/libxx/libxx_new.cxx
@@ -87,13 +87,13 @@ void *operator new(unsigned int nbytes)
 
   void *alloc = lib_malloc(nbytes);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ERROR
   if (alloc == 0)
     {
       // Oh my.. we are required to return a valid pointer and
       // we cannot throw an exception!  We are bad.
 
-      dbg("Failed to allocate\n");
+      _err("ERROR: Failed to allocate\n");
     }
 #endif
 
diff --git a/libxx/libxx_newa.cxx b/libxx/libxx_newa.cxx
index c1e4dfa95d9a2fff445544eeee189fdc739a9e7a..826017ad9eaa1c044cbe067bd7bfa614107744a2 100644
--- a/libxx/libxx_newa.cxx
+++ b/libxx/libxx_newa.cxx
@@ -87,13 +87,13 @@ void *operator new[](unsigned int nbytes)
 
   void *alloc = lib_malloc(nbytes);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ERROR
   if (alloc == 0)
     {
       // Oh my.. we are required to return a valid pointer and
       // we cannot throw an exception!  We are bad.
 
-      dbg("Failed to allocate\n");
+      _err("ERROR: Failed to allocate\n");
     }
 #endif
 
diff --git a/libxx/libxx_stdthrow.cxx b/libxx/libxx_stdthrow.cxx
index 79f20093a4871cbfc1fb99de21313542480618cc..20957e236b496bb22146cbeb71c1b7286bb610ba 100644
--- a/libxx/libxx_stdthrow.cxx
+++ b/libxx/libxx_stdthrow.cxx
@@ -56,25 +56,25 @@ namespace std
 {
   void __throw_out_of_range(const char*)
   {
-    dbg("C++: Vector .at() with argument out of range\n");
+    _err("ERROR: C++: Vector .at() with argument out of range\n");
     abort();
    }
 
   void __throw_length_error(const char*)
   {
-    dbg("C++: Vector resize to excessive length\n");
+    _err("ERROR: C++: Vector resize to excessive length\n");
     abort();
   }
 
   void __throw_bad_alloc()
   {
-    dbg("C++: Bad allocation\n");
+    _err("ERROR: C++: Bad allocation\n");
     abort();
   }
 
   void __throw_bad_function_call()
   {
-    dbg("C++: Bad function call\n");
+    _err("ERROR: C++: Bad function call\n");
     abort();
   }
 }
diff --git a/mm/Kconfig b/mm/Kconfig
index 1f0a79f0de78a6337b54af76931ebdbe14b0fb2a..8cba9265ea99880a5f38abe280c0fc53029844a3 100644
--- a/mm/Kconfig
+++ b/mm/Kconfig
@@ -116,7 +116,7 @@ config GRAN_INTR
 config DEBUG_GRAN
 	bool "Granule Allocator Debug"
 	default n
-	depends on GRAN && DEBUG
+	depends on GRAN && DEBUG_FEATURES
 	---help---
 		Just like DEBUG_MM, but only generates output from the gran
 		allocation logic.
@@ -143,7 +143,7 @@ config MM_PGSIZE
 config DEBUG_PGALLOC
 	bool "Page Allocator Debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_FEATURES
 	---help---
 		Just like DEBUG_MM, but only generates output from the page
 		allocation logic.
diff --git a/mm/kmm_heap/Make.defs b/mm/kmm_heap/Make.defs
index cf7053e54b55199958090afd1a51d89d61d50fa4..9f7ac447a3e8a0a6f0bbb81d17e1725689052ee3 100644
--- a/mm/kmm_heap/Make.defs
+++ b/mm/kmm_heap/Make.defs
@@ -44,7 +44,7 @@ ifeq ($(CONFIG_BUILD_KERNEL),y)
 CSRCS += kmm_sbrk.c
 endif
 
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
 CSRCS += kmm_heapmember.c
 endif
 
diff --git a/mm/kmm_heap/kmm_heapmember.c b/mm/kmm_heap/kmm_heapmember.c
index b96a6f7ada7691fe8c93de40a0f5268527f93a98..53fa7027b7d00dbe16eb84064664f0d81741e819 100644
--- a/mm/kmm_heap/kmm_heapmember.c
+++ b/mm/kmm_heap/kmm_heapmember.c
@@ -43,7 +43,7 @@
 
 #include 
 
-#if defined(CONFIG_MM_KERNEL_HEAP) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_MM_KERNEL_HEAP) && defined(CONFIG_DEBUG_FEATURES)
 
 /****************************************************************************
  * Public Functions
@@ -105,4 +105,4 @@ bool kmm_heapmember(FAR void *mem)
 #endif
 }
 
-#endif /* CONFIG_MM_KERNEL_HEAP && CONFIG_DEBUG */
+#endif /* CONFIG_MM_KERNEL_HEAP && CONFIG_DEBUG_FEATURES */
diff --git a/mm/kmm_heap/kmm_kernel.c b/mm/kmm_heap/kmm_kernel.c
index 4a2231dd01fda3a1f8cf355f1c94421c405c9258..e2fc9232b818b0e30438568bac6a2d722c9376c5 100644
--- a/mm/kmm_heap/kmm_kernel.c
+++ b/mm/kmm_heap/kmm_kernel.c
@@ -66,7 +66,7 @@
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 bool kmm_heapmember(FAR void *mem)
 {
 #if CONFIG_MM_REGIONS > 1
diff --git a/mm/mm_gran/mm_gran.h b/mm/mm_gran/mm_gran.h
index 20229216b7c175cc3702e433dd7e32ea654cb104..dcc04c72178bb124e285e271ae7a47823288b76c 100644
--- a/mm/mm_gran/mm_gran.h
+++ b/mm/mm_gran/mm_gran.h
@@ -63,19 +63,23 @@
 
 #ifdef CONFIG_CPP_HAVE_VARARGS
 #  ifdef CONFIG_DEBUG_GRAM
-#    define grandbg(format, ...)       dbg(format, ##__VA_ARGS__)
-#    define granvdbg(format, ...)      vdbg(format, ##__VA_ARGS__)
+#    define granerr(format, ...)       _err(format, ##__VA_ARGS__)
+#    define granwarn(format, ...)      _warn(format, ##__VA_ARGS__)
+#    define graninfo(format, ...)      _info(format, ##__VA_ARGS__)
 #  else
-#    define grandbg(format, ...)       mdbg(format, ##__VA_ARGS__)
-#    define granvdbg(format, ...)      mvdbg(format, ##__VA_ARGS__)
+#    define granerr(format, ...)       merr(format, ##__VA_ARGS__)
+#    define granwarn(format, ...)      mwarn(format, ##__VA_ARGS__)
+#    define graninfo(format, ...)      minfo(format, ##__VA_ARGS__)
 #  endif
 #else
 #  ifdef CONFIG_DEBUG_GRAM
-#    define grandbg                    dbg
-#    define granvdbg                   vdbg
+#    define granerr                    _err
+#    define granwarn                   _warn
+#    define graninfo                   _info
 #  else
-#    define grandbg                    (void)
-#    define granvdbg                   (void)
+#    define granerr                    merr
+#    define granwarn                   mwarn
+#    define graninfo                   minfo
 #  endif
 #endif
 
diff --git a/mm/mm_gran/mm_pgalloc.c b/mm/mm_gran/mm_pgalloc.c
index 474d9e0f4ea8972a6a0b97d7b4d295e8179d0e81..2574e20912bbdf71de764e451defb254b5e5d53a 100644
--- a/mm/mm_gran/mm_pgalloc.c
+++ b/mm/mm_gran/mm_pgalloc.c
@@ -66,19 +66,23 @@
 
 #ifdef CONFIG_CPP_HAVE_VARARGS
 #  ifdef CONFIG_DEBUG_PGALLOC
-#    define pgadbg(format, ...)       dbg(format, ##__VA_ARGS__)
-#    define pgavdbg(format, ...)      vdbg(format, ##__VA_ARGS__)
+#    define pgaerr(format, ...)       _err(format, ##__VA_ARGS__)
+#    define pgawarn(format, ...)      _warn(format, ##__VA_ARGS__)
+#    define pgainfo(format, ...)      _info(format, ##__VA_ARGS__)
 #  else
-#    define pgadbg(format, ...)       mdbg(format, ##__VA_ARGS__)
-#    define pgavdbg(format, ...)      mvdbg(format, ##__VA_ARGS__)
+#    define pgaerr(format, ...)       merr(format, ##__VA_ARGS__)
+#    define pgawarn(format, ...)      mwarn(format, ##__VA_ARGS__)
+#    define pgainfo(format, ...)      minfo(format, ##__VA_ARGS__)
 #  endif
 #else
 #  ifdef CONFIG_DEBUG_PGALLOC
-#    define pgadbg                    dbg
-#    define pgavdbg                   vdbg
+#    define pgaerr                    _err
+#    define pgawarn                   _warn
+#    define pgainfo                   _info
 #  else
-#    define pgadbg                    (void)
-#    define pgavdbg                   (void)
+#    define pgaerr                    merr
+#    define pgawarn                   mwarn
+#    define pgainfo                   minfo
 #  endif
 #endif
 
diff --git a/mm/mm_heap/mm_free.c b/mm/mm_heap/mm_free.c
index 57cb867f8dec58a569f29f2307cfbb3d0c66fb00..4dad12e3666df1f830cb6b66234ff8edb47369b9 100644
--- a/mm/mm_heap/mm_free.c
+++ b/mm/mm_heap/mm_free.c
@@ -63,7 +63,7 @@ void mm_free(FAR struct mm_heap_s *heap, FAR void *mem)
   FAR struct mm_freenode_s *prev;
   FAR struct mm_freenode_s *next;
 
-  mvdbg("Freeing %p\n", mem);
+  minfo("Freeing %p\n", mem);
 
   /* Protect against attempts to free a NULL reference */
 
diff --git a/mm/mm_heap/mm_initialize.c b/mm/mm_heap/mm_initialize.c
index bd9d4f524a4cb15c817a4cb288d91db193540999..7696676fde3ba26556df17df80443b27f0788b07 100644
--- a/mm/mm_heap/mm_initialize.c
+++ b/mm/mm_heap/mm_initialize.c
@@ -79,12 +79,12 @@ void mm_addregion(FAR struct mm_heap_s *heap, FAR void *heapstart,
 # define IDX 0
 #endif
 
+#if defined(CONFIG_MM_SMALL) && !defined(CONFIG_SMALL_MEMORY)
   /* If the MCU handles wide addresses but the memory manager is configured
    * for a small heap, then verify that the caller is  not doing something
    * crazy.
    */
 
-#if defined(CONFIG_MM_SMALL) && !defined(CONFIG_SMALL_MEMORY)
   DEBUGASSERT(heapsize <= MMSIZE_MAX+1);
 #endif
 
@@ -96,7 +96,7 @@ void mm_addregion(FAR struct mm_heap_s *heap, FAR void *heapstart,
   heapend  = MM_ALIGN_DOWN((uintptr_t)heapstart + (uintptr_t)heapsize);
   heapsize = heapend - heapbase;
 
-  mlldbg("Region %d: base=%p size=%u\n", IDX+1, heapstart, heapsize);
+  minfo("Region %d: base=%p size=%u\n", IDX+1, heapstart, heapsize);
 
   /* Add the size of this region to the total size of the heap */
 
@@ -157,7 +157,7 @@ void mm_initialize(FAR struct mm_heap_s *heap, FAR void *heapstart,
 {
   int i;
 
-  mlldbg("Heap: start=%p size=%u\n", heapstart, heapsize);
+  minfo("Heap: start=%p size=%u\n", heapstart, heapsize);
 
   /* The following two lines have cause problems for some older ZiLog
    * compilers in the past (but not the more recent).  Life is easier if we
diff --git a/mm/mm_heap/mm_mallinfo.c b/mm/mm_heap/mm_mallinfo.c
index f3c8775ba6323ec0abba371c3a580aa71968172d..3ee276c917b70f4e7cb05a604472bf25d452f950 100644
--- a/mm/mm_heap/mm_mallinfo.c
+++ b/mm/mm_heap/mm_mallinfo.c
@@ -88,7 +88,7 @@ int mm_mallinfo(FAR struct mm_heap_s *heap, FAR struct mallinfo *info)
            node < heap->mm_heapend[region];
            node = (FAR struct mm_allocnode_s *)((FAR char *)node + node->size))
         {
-          mvdbg("region=%d node=%p size=%p preceding=%p (%c)\n",
+          minfo("region=%d node=%p size=%p preceding=%p (%c)\n",
                 region, node, node->size, (node->preceding & ~MM_ALLOC_BIT),
                 (node->preceding & MM_ALLOC_BIT) ? 'A' : 'F');
 
@@ -111,7 +111,7 @@ int mm_mallinfo(FAR struct mm_heap_s *heap, FAR struct mallinfo *info)
 
       mm_givesemaphore(heap);
 
-      mvdbg("region=%d node=%p heapend=%p\n", region, node, heap->mm_heapend[region]);
+      minfo("region=%d node=%p heapend=%p\n", region, node, heap->mm_heapend[region]);
       DEBUGASSERT(node == heap->mm_heapend[region]);
       uordblks += SIZEOF_MM_ALLOCNODE; /* account for the tail node */
     }
diff --git a/mm/mm_heap/mm_malloc.c b/mm/mm_heap/mm_malloc.c
index 3f9db86a336463b514bf6fa66045dbb0d79699e6..3efa15259f7a006bed7336165b7db923fc2aa233 100644
--- a/mm/mm_heap/mm_malloc.c
+++ b/mm/mm_heap/mm_malloc.c
@@ -186,11 +186,11 @@ FAR void *mm_malloc(FAR struct mm_heap_s *heap, size_t size)
 #ifdef CONFIG_DEBUG_MM
   if (!ret)
     {
-      mdbg("Allocation failed, size %d\n", size);
+      mwarn("WARNING: Allocation failed, size %d\n", size);
     }
   else
     {
-      mvdbg("Allocated %p, size %d\n", ret, size);
+      minfo("Allocated %p, size %d\n", ret, size);
     }
 #endif
 
diff --git a/mm/mm_heap/mm_sbrk.c b/mm/mm_heap/mm_sbrk.c
index 774d5d3f1118b239c5d3e082e438145354e395cc..ddbf288d068cd4378bdb01c395ed04035ac297ba 100644
--- a/mm/mm_heap/mm_sbrk.c
+++ b/mm/mm_heap/mm_sbrk.c
@@ -94,12 +94,12 @@ FAR void *mm_sbrk(FAR struct mm_heap_s *heap, intptr_t incr,
   uintptr_t allocbase;
   unsigned int pgincr;
   size_t bytesize;
-  int err;
+  int errcode;
 
   DEBUGASSERT(incr >= 0);
   if (incr < 0)
     {
-      err = ENOSYS;
+      errcode = ENOSYS;
       goto errout;
     }
 
@@ -119,7 +119,7 @@ FAR void *mm_sbrk(FAR struct mm_heap_s *heap, intptr_t incr,
 
       if ((brkaddr > 0) && ((maxbreak - brkaddr) < (pgincr << MM_PGSHIFT)))
         {
-          err = ENOMEM;
+          errcode = ENOMEM;
           goto errout;
         }
 
@@ -132,7 +132,7 @@ FAR void *mm_sbrk(FAR struct mm_heap_s *heap, intptr_t incr,
       allocbase = pgalloc(brkaddr, pgincr);
       if (allocbase == 0)
         {
-          err = EAGAIN;
+          errcode = EAGAIN;
           goto errout;
         }
 
@@ -158,7 +158,7 @@ FAR void *mm_sbrk(FAR struct mm_heap_s *heap, intptr_t incr,
   return (FAR void *)brkaddr;
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
   return (FAR void *)-1;
 }
 #endif /* CONFIG_BUILD_KERNEL */
diff --git a/mm/mm_heap/mm_sem.c b/mm/mm_heap/mm_sem.c
index ae00b0b80fe68e4cc995f04e83c66a5a7d45f391..49083da2130dbe416eaa9a84ad74ca7070ab131d 100644
--- a/mm/mm_heap/mm_sem.c
+++ b/mm/mm_heap/mm_sem.c
@@ -53,17 +53,19 @@
 //#define MONITOR_MM_SEMAPHORE 1
 
 #ifdef MONITOR_MM_SEMAPHORE
-#  ifdef CONFIG_DEBUG
-#    include 
-#    define msemdbg dbg
-#  else
-#    define msemdbg printf
-#  endif
+#  include 
+#  define msemerr  _err
+#  define msemwarn _warn
+#  define mseminfo _info
 #else
 #  ifdef CONFIG_CPP_HAVE_VARARGS
-#    define msemdbg(x...)
+#    define msemerr(x...)
+#    define msemwarn(x...)
+#    define mseminfo(x...)
 #  else
-#    define msemdbg (void)
+#    define msemerr  (void)
+#    define msemwarn (void)
+#    define mseminfo (void)
 #  endif
 #endif
 
@@ -157,7 +159,7 @@ void mm_takesemaphore(FAR struct mm_heap_s *heap)
     {
       /* Take the semaphore (perhaps waiting) */
 
-      msemdbg("PID=%d taking\n", my_pid);
+      mseminfo("PID=%d taking\n", my_pid);
       while (sem_wait(&heap->mm_semaphore) != 0)
         {
           /* The only case that an error should occur here is if
@@ -173,7 +175,7 @@ void mm_takesemaphore(FAR struct mm_heap_s *heap)
       heap->mm_counts_held = 1;
     }
 
-  msemdbg("Holder=%d count=%d\n", heap->mm_holder, heap->mm_counts_held);
+  mseminfo("Holder=%d count=%d\n", heap->mm_holder, heap->mm_counts_held);
 }
 
 /****************************************************************************
@@ -186,7 +188,8 @@ void mm_takesemaphore(FAR struct mm_heap_s *heap)
 
 void mm_givesemaphore(FAR struct mm_heap_s *heap)
 {
-#ifdef CONFIG_DEBUG
+#if defined(CONFIG_DEBUG_ASSERTIONS) || \
+   (defined(MONITOR_MM_SEMAPHORE) && defined(CONFIG_DEBUG_INFO))
   pid_t my_pid = getpid();
 #endif
 
@@ -201,15 +204,14 @@ void mm_givesemaphore(FAR struct mm_heap_s *heap)
       /* Yes, just release one count and return */
 
       heap->mm_counts_held--;
-      msemdbg("Holder=%d count=%d\n", heap->mm_holder, heap->mm_counts_held);
+      mseminfo("Holder=%d count=%d\n", heap->mm_holder,
+               heap->mm_counts_held);
     }
   else
     {
       /* Nope, this is the last reference I have */
 
-#ifdef CONFIG_DEBUG
-      msemdbg("PID=%d giving\n", my_pid);
-#endif
+      mseminfo("PID=%d giving\n", my_pid);
 
       heap->mm_holder      = -1;
       heap->mm_counts_held = 0;
diff --git a/mm/shm/shm_initialize.c b/mm/shm/shm_initialize.c
index a25bc8fd1997dabbc69d71dc0d6dd627598f69d5..f20e7b0873ffcd9a214bdac01d788b14f8b8f673 100644
--- a/mm/shm/shm_initialize.c
+++ b/mm/shm/shm_initialize.c
@@ -127,7 +127,7 @@ int shm_group_initialize(FAR struct task_group_s *group)
 
   if (!group->tg_shm.gs_handle)
     {
-      shmdbg("gran_initialize() failed\n");
+      shmerr("ERROR: gran_initialize() failed\n");
       return -ENOMEM;
     }
 
diff --git a/mm/shm/shmat.c b/mm/shm/shmat.c
index b3658a38fad95f1dce62e57bbe51f961d3742a44..6b677e5ddd0f75cc1e371c76c9af0b6f48ccc835 100644
--- a/mm/shm/shmat.c
+++ b/mm/shm/shmat.c
@@ -136,7 +136,7 @@ FAR void *shmat(int shmid, FAR const void *shmaddr, int shmflg)
   ret = sem_wait(®ion->sr_sem);
   if (ret < 0)
     {
-      shmdbg("sem_wait failed: %d\n", ret);
+      shmerr("ERROR: sem_wait failed: %d\n", ret);
       goto errout;
     }
 
@@ -146,7 +146,7 @@ FAR void *shmat(int shmid, FAR const void *shmaddr, int shmflg)
                                 region->sr_ds.shm_segsz);
   if (vaddr == 0)
     {
-      shmdbg("gran_alloc() failed\n");
+      shmerr("ERROR: gran_alloc() failed\n");
       ret = -ENOMEM;
       goto errout_with_semaphore;
     }
@@ -160,7 +160,7 @@ FAR void *shmat(int shmid, FAR const void *shmaddr, int shmflg)
   ret = up_shmat(region->sr_pages, npages, vaddr);
   if (ret < 0)
     {
-      shmdbg("up_shmat() failed\n");
+      shmerr("ERROR: up_shmat() failed\n");
       goto errout_with_vaddr;
     }
 
diff --git a/mm/shm/shmctl.c b/mm/shm/shmctl.c
index 6ba3a33f1af4466031681c69859a1e96d88a4aaf..4e5ac13c5f65a134c2c72256b12d86b3abfe4a96 100644
--- a/mm/shm/shmctl.c
+++ b/mm/shm/shmctl.c
@@ -134,7 +134,7 @@ int shmctl(int shmid, int cmd, struct shmid_ds *buf)
   ret = sem_wait(®ion->sr_sem);
   if (ret < 0)
     {
-      shmdbg("sem_wait failed: %d\n", ret);
+      shmerr("ERROR: sem_wait failed: %d\n", ret);
       return ret;
     }
 
@@ -190,7 +190,7 @@ int shmctl(int shmid, int cmd, struct shmid_ds *buf)
         break;
 
       default:
-        shmdbg("Unrecognized command: %d\n", cmd);
+        shmerr("ERROR: Unrecognized command: %d\n", cmd);
         ret = -EINVAL;
         goto errout_with_semaphore;
     }
diff --git a/mm/shm/shmdt.c b/mm/shm/shmdt.c
index 201e944b6561a9073f79174c52df38c4d399a2a9..55c2fd055445eb69374e67bbb3c62c5ea9ee37b6 100644
--- a/mm/shm/shmdt.c
+++ b/mm/shm/shmdt.c
@@ -106,7 +106,7 @@ int shmdt(FAR const void *shmaddr)
 
   if (shmid >= CONFIG_ARCH_SHM_MAXREGIONS)
     {
-      shmdbg("No region matching this virtual address: %p\n", shmaddr);
+      shmerr("ERROR: No region matching this virtual address: %p\n", shmaddr);
       ret = -EINVAL;
       goto errout_with_errno;
     }
@@ -121,7 +121,7 @@ int shmdt(FAR const void *shmaddr)
   ret = sem_wait(®ion->sr_sem);
   if (ret < 0)
     {
-      shmdbg("sem_wait failed: %d\n", ret);
+      shmerr("ERROR: sem_wait failed: %d\n", ret);
       goto errout;
     }
 
@@ -141,7 +141,7 @@ int shmdt(FAR const void *shmaddr)
   ret = up_shmdt((uintptr_t)shmaddr, npages);
   if (ret < 0)
     {
-      shmdbg("up_shmdt() failed\n");
+      shmerr("ERROR: up_shmdt() failed\n");
     }
 
   /* Indicate that there is no longer any mapping for this region. */
diff --git a/mm/shm/shmget.c b/mm/shm/shmget.c
index e3f020846099caf7f7f7e98c7e5dddf6c66dbb9a..460850605aa3b128bd9eb6d101e397f920a9ec94 100644
--- a/mm/shm/shmget.c
+++ b/mm/shm/shmget.c
@@ -188,7 +188,7 @@ static int shm_extend(int shmid, size_t size)
       region->sr_pages[pgalloc] = mm_pgalloc(1);
       if (region->sr_pages[pgalloc] == 0)
         {
-          shmdbg("mm_pgalloc(1) failed\n");
+          shmerr("ERROR: mm_pgalloc(1) failed\n");
           break;
         }
 
@@ -249,7 +249,7 @@ static int shm_create(key_t key, size_t size, int shmflg)
   ret = shm_reserve(key, shmflg);
   if (ret < 0)
     {
-      shmdbg("shm_reserve failed: %d\n", ret);
+      shmerr("ERROR: shm_reserve failed: %d\n", ret);
       return ret;
     }
 
@@ -400,7 +400,7 @@ int shmget(key_t key, size_t size, int shmflg)
               ret = shm_create(key, size, shmflg);
               if (ret < 0)
                 {
-                  shmdbg("shm_create failed: %d\n", ret);
+                  shmerr("ERROR: shm_create failed: %d\n", ret);
                   goto errout_with_semaphore;
                 }
 
@@ -443,7 +443,7 @@ int shmget(key_t key, size_t size, int shmflg)
                   ret = shm_extend(shmid, size);
                   if (ret < 0)
                     {
-                      shmdbg("shm_create failed: %d\n", ret);
+                      shmerr("ERROR: shm_create failed: %d\n", ret);
                       goto errout_with_semaphore;
                     }
                 }
diff --git a/net/Kconfig b/net/Kconfig
index 3f454f4288dd47d851ac3018a8607eabc6a0abcc..2fea54f86fa240d18c459a231d2d6885fc2c2276 100644
--- a/net/Kconfig
+++ b/net/Kconfig
@@ -20,17 +20,6 @@ config NET
 
 if NET
 
-config NET_NOINTS
-	bool "Not interrupt driven"
-	default n
-	---help---
-		NET_NOINT indicates that network layer is not called from the
-		interrupt level.  If NET_NOINTS is defined, critical sections
-		will be managed with semaphores; Otherwise, it assumed that
-		network layer will be called from interrupt level handling
-		and critical sections will be managed by enabling and disabling
-		interrupts.
-
 config NET_PROMISCUOUS
 	bool "Promiscuous mode"
 	default n
@@ -40,17 +29,6 @@ config NET_PROMISCUOUS
 
 menu "Driver buffer configuration"
 
-config NET_MULTIBUFFER
-	bool "Use multiple device-side I/O buffers"
-	default n
-	---help---
-		Traditionally, the uIP-based stack has used a single buffer for all
-		incoming and outgoing traffic.  If this configuration is selected,
-		then the driver can manage multiple I/O buffers and can, for
-		example, be filling one input buffer while sending another output
-		buffer.  Or, as another example, the driver may support queuing of
-		concurrent input/ouput and output transfers for better performance.
-
 config NET_ETH_MTU
 	int "Ethernet packet buffer size (MTU)"
 	default 1294 if NET_IPv6
@@ -117,17 +95,6 @@ config NET_SLIP_TCP_RECVWNDO
 		incoming data, or high (32768 bytes) if the application processes
 		data quickly.
 
-config NET_TUN_MTU
-	int "TUN packet buffer size (MTU)"
-	default 296
-	depends on NET_TUN
-	range 296 1518
-
-config NET_TUN_TCP_RECVWNDO
-	int "TUN TCP receive window size"
-	default 256
-	depends on NET_TUN && NET_TCP
-
 config NET_GUARDSIZE
 	int "Driver I/O guard size"
 	default 2
@@ -171,9 +138,7 @@ config NET_LOOPBACK
 	select NETDEV_MULTINIC if NET_ETHERNET || NET_SLIP || NET_TUN
 	select NET_MULTILINK if NET_ETHERNET || NET_SLIP || NET_TUN
 	---help---
-		Add support for the local network loopback device, lo.  Any additional
-		networking devices that are enabled must be compatible with
-		CONFIG_NET_NOINTS.
+		Add support for the local network loopback device, lo.
 
 config NET_SLIP
 	bool "SLIP support"
@@ -182,8 +147,7 @@ config NET_SLIP
 	select NET_MULTILINK if NET_ETHERNET || NET_LOOPBACK || NET_TUN
 	---help---
 		Enables building of the SLIP driver. SLIP requires
-		at least one IP protocol selected and the following additional
-		network settings: NET_NOINTS and NET_MULTIBUFFER.
+		at least one IP protocol selected.
 
 		SLIP supports point-to-point IP communications over a serial port.
 		The default data link layer for network layer is Ethernet. If
@@ -241,6 +205,35 @@ config TUN_NINTERFACES
 		interfaces to support.
 		Default: 1
 
+config NET_TUN_MTU
+	int "TUN packet buffer size (MTU)"
+	default 296
+	range 296 1518
+
+config NET_TUN_TCP_RECVWNDO
+	int "TUN TCP receive window size"
+	default 256
+	depends on NET_TCP
+
+choice
+	prompt "Work queue"
+	default LOOPBACK_LPWORK if SCHED_LPWORK
+	default TUN_HPWORK if !SCHED_LPWORK && SCHED_HPWORK
+	depends on SCHED_WORKQUEUE
+	---help---
+		Work queue support is required to use the TUN driver.  If the
+		low priority work queue is available, then it should be used by the
+		TUN driver.
+
+config TUN_HPWORK
+	bool "High priority"
+	depends on SCHED_HPWORK
+
+config TUN_LPWORK
+	bool "Low priority"
+	depends on SCHED_LPWORK
+
+endchoice # Work queue
 endif # NET_TUN
 
 endmenu # Data link support
diff --git a/net/arp/Kconfig b/net/arp/Kconfig
index df228db6b7166822c5e1b585cd3972adecabd984..b4935e4c55cd5afeb2ec0e0e0b68325bb6168e2e 100644
--- a/net/arp/Kconfig
+++ b/net/arp/Kconfig
@@ -65,7 +65,7 @@ endif # NET_ARP_SEND
 config NET_ARP_DUMP
 	bool "Dump ARP packet header"
 	default n
-	depends on DEBUG
+	depends on DEBUG_NET_INFO
 	---help---
 		Dump ARP packets to the SYSLOG device.
 
diff --git a/net/arp/arp.h b/net/arp/arp.h
index ba62f7893b1fd533643ac68c9fe5b4355b232ec6..0b95c4abd3e53da30b714b253a1b185d5f8d5a1e 100644
--- a/net/arp/arp.h
+++ b/net/arp/arp.h
@@ -64,7 +64,7 @@
  ****************************************************************************/
 /* Configuration ************************************************************/
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
 #  undef CONFIG_NET_ARP_DUMP
 #endif
 
diff --git a/net/arp/arp_arpin.c b/net/arp/arp_arpin.c
index 6945ff666abd4536ff81b285a0054ba79bfc265f..fe8d47a63ef5931bfacd1146ee27620dde107d29 100644
--- a/net/arp/arp_arpin.c
+++ b/net/arp/arp_arpin.c
@@ -76,16 +76,16 @@
  *   that we previously sent out, the ARP cache will be filled in with
  *   the values from the ARP reply.  If the incoming ARP packet is an ARP
  *   request for our IP address, an ARP reply packet is created and put
- *   into the d_buf[] buffer.
+ *   into the d_buf buffer.
  *
  *   On entry, this function expects that an ARP packet with a prepended
- *   Ethernet header is present in the d_buf[] buffer and that the length of
+ *   Ethernet header is present in the d_buf buffer and that the length of
  *   the packet is set in the d_len field.
  *
  *   When the function returns, the value of the field d_len indicates whether
  *   the device driver should send out the ARP reply packet or not. If d_len
  *   is zero, no packet should be sent; If d_len is non-zero, it contains the
- *   length of the outbound packet that is present in the d_buf[] buffer.
+ *   length of the outbound packet that is present in the d_buf buffer.
  *
  ****************************************************************************/
 
@@ -96,7 +96,7 @@ void arp_arpin(FAR struct net_driver_s *dev)
 
   if (dev->d_len < (sizeof(struct arp_hdr_s) + ETH_HDRLEN))
     {
-      nlldbg("Too small\n");
+      nerr("ERROR: Packet Too small\n");
       dev->d_len = 0;
       return;
     }
@@ -107,7 +107,7 @@ void arp_arpin(FAR struct net_driver_s *dev)
   switch (arp->ah_opcode)
     {
       case HTONS(ARP_REQUEST):
-        nllvdbg("ARP request for IP %04lx\n", (long)ipaddr);
+        ninfo("ARP request for IP %04lx\n", (long)ipaddr);
 
         /* ARP request. If it asked for our address, we send out a reply. */
 
@@ -139,7 +139,7 @@ void arp_arpin(FAR struct net_driver_s *dev)
         break;
 
       case HTONS(ARP_REPLY):
-        nllvdbg("ARP reply for IP %04lx\n", (long)ipaddr);
+        ninfo("ARP reply for IP %04lx\n", (long)ipaddr);
 
         /* ARP reply. We insert or update the ARP table if it was meant
          * for us.
diff --git a/net/arp/arp_dump.c b/net/arp/arp_dump.c
index 50ea5a27e5a236fba6371f63d323a4e06985d3b1..8466763d859fded1b518b475c8302e643d030446 100644
--- a/net/arp/arp_dump.c
+++ b/net/arp/arp_dump.c
@@ -69,20 +69,20 @@
 
 void arp_dump(FAR struct arp_hdr_s *arp)
 {
-  nlldbg("  HW type: %04x Protocol: %04x\n",
-         arp->ah_hwtype, arp->ah_protocol);
-  nlldbg("  HW len: %02x Proto len: %02x Operation: %04x\n",
-         arp->ah_hwlen, arp->ah_protolen, arp->ah_opcode);
-  nlldbg("  Sender MAC: %02x:%02x:%02x:%02x:%02x:%02x IP: %d.%d.%d.%d\n",
-         arp->ah_shwaddr[0], arp->ah_shwaddr[1], arp->ah_shwaddr[2],
-         arp->ah_shwaddr[3], arp->ah_shwaddr[4], arp->ah_shwaddr[5],
-         arp->ah_sipaddr[0] & 0xff, arp->ah_sipaddr[0] >> 8,
-         arp->ah_sipaddr[1] & 0xff, arp->ah_sipaddr[1] >> 8);
-  nlldbg("  Dest MAC:   %02x:%02x:%02x:%02x:%02x:%02x IP: %d.%d.%d.%d\n",
-         arp->ah_dhwaddr[0], arp->ah_dhwaddr[1], arp->ah_dhwaddr[2],
-         arp->ah_dhwaddr[3], arp->ah_dhwaddr[4], arp->ah_dhwaddr[5],
-         arp->ah_dipaddr[0] & 0xff, arp->ah_dipaddr[0] >> 8,
-         arp->ah_dipaddr[1] & 0xff, arp->ah_dipaddr[1] >> 8);
+  ninfo("  HW type: %04x Protocol: %04x\n",
+        arp->ah_hwtype, arp->ah_protocol);
+  ninfo("  HW len: %02x Proto len: %02x Operation: %04x\n",
+        arp->ah_hwlen, arp->ah_protolen, arp->ah_opcode);
+  ninfo("  Sender MAC: %02x:%02x:%02x:%02x:%02x:%02x IP: %d.%d.%d.%d\n",
+        arp->ah_shwaddr[0], arp->ah_shwaddr[1], arp->ah_shwaddr[2],
+        arp->ah_shwaddr[3], arp->ah_shwaddr[4], arp->ah_shwaddr[5],
+        arp->ah_sipaddr[0] & 0xff, arp->ah_sipaddr[0] >> 8,
+        arp->ah_sipaddr[1] & 0xff, arp->ah_sipaddr[1] >> 8);
+  ninfo("  Dest MAC:   %02x:%02x:%02x:%02x:%02x:%02x IP: %d.%d.%d.%d\n",
+        arp->ah_dhwaddr[0], arp->ah_dhwaddr[1], arp->ah_dhwaddr[2],
+        arp->ah_dhwaddr[3], arp->ah_dhwaddr[4], arp->ah_dhwaddr[5],
+        arp->ah_dipaddr[0] & 0xff, arp->ah_dipaddr[0] >> 8,
+        arp->ah_dipaddr[1] & 0xff, arp->ah_dipaddr[1] >> 8);
 }
 
 #endif /* CONFIG_NET_ARP_DUMP */
diff --git a/net/arp/arp_notify.c b/net/arp/arp_notify.c
index 727d765651ca425b4f201f884a4ccc1c7d063c89..7b92bfc25aa1844741e7562dc621d4a580ea0aa6 100644
--- a/net/arp/arp_notify.c
+++ b/net/arp/arp_notify.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * net/arp/arp_notify.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -47,8 +47,9 @@
 
 #include 
 
-#include 
 #include 
+#include 
+#include 
 
 #include "arp/arp.h"
 
@@ -88,7 +89,13 @@ void arp_wait_setup(in_addr_t ipaddr, FAR struct arp_notify_s *notify)
 
   notify->nt_ipaddr = ipaddr;
   notify->nt_result = -ETIMEDOUT;
+
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   (void)sem_init(¬ify->nt_sem, 0, 0);
+  sem_setprotocol(¬ify->nt_sem, SEM_PRIO_NONE);
 
   /* Add the wait structure to the list with interrupts disabled */
 
diff --git a/net/arp/arp_out.c b/net/arp/arp_out.c
index 563d601337d5e67eb193964c5f61b4c6ae900ae7..b8161976718ce36c4e33672d84ab75c4bf7f7c79 100644
--- a/net/arp/arp_out.c
+++ b/net/arp/arp_out.c
@@ -123,13 +123,13 @@ static const uint8_t g_multicast_ethaddr[3] =
  *   beginning of the packet and the function returns.
  *
  *   If no ARP cache entry is found for the destination IP address, the
- *   packet in the d_buf[] is replaced by an ARP request packet for the
+ *   packet in the d_buf is replaced by an ARP request packet for the
  *   IP address. The IP packet is dropped and it is assumed that the
  *   higher level protocols (e.g., TCP) eventually will retransmit the
  *   dropped packet.
  *
  *   Upon return in either the case, a packet to be sent is present in the
- *   d_buf[] buffer and the d_len field holds the length of the Ethernet
+ *   d_buf buffer and the d_len field holds the length of the Ethernet
  *   frame that should be transmitted.
  *
  ****************************************************************************/
@@ -231,7 +231,7 @@ void arp_out(FAR struct net_driver_s *dev)
       tabptr = arp_find(ipaddr);
       if (!tabptr)
         {
-           nllvdbg("ARP request for IP %08lx\n", (unsigned long)ipaddr);
+           ninfo("ARP request for IP %08lx\n", (unsigned long)ipaddr);
 
           /* The destination address was not in our ARP table, so we
            * overwrite the IP packet with an ARP request.
diff --git a/net/arp/arp_send.c b/net/arp/arp_send.c
index 0fff9041c3210008df0de0f16a82459677e2447a..e5a1e48221ad4d0819f3e5dea7a562913a152907 100644
--- a/net/arp/arp_send.c
+++ b/net/arp/arp_send.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * net/arp/arp_send.c
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -48,6 +48,7 @@
 #include 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -102,7 +103,7 @@ static uint16_t arp_send_interrupt(FAR struct net_driver_s *dev,
 {
   FAR struct arp_send_s *state = (FAR struct arp_send_s *)priv;
 
-  nllvdbg("flags: %04x sent: %d\n", flags, state->snd_sent);
+  ninfo("flags: %04x sent: %d\n", flags, state->snd_sent);
 
   if (state)
     {
@@ -110,7 +111,7 @@ static uint16_t arp_send_interrupt(FAR struct net_driver_s *dev,
 
       if ((flags & NETDEV_DOWN) != 0)
         {
-          nlldbg("ERROR: Interface is down\n");
+          nerr("ERROR: Interface is down\n");
           arp_send_terminate(state, -ENETUNREACH);
           return flags;
         }
@@ -191,7 +192,6 @@ int arp_send(in_addr_t ipaddr)
   struct arp_notify_s notify;
   struct timespec delay;
   struct arp_send_s state;
-  net_lock_t save;
   int ret;
 
   /* First check if destination is a local broadcast. */
@@ -230,7 +230,7 @@ int arp_send(in_addr_t ipaddr)
 #endif
   if (!dev)
     {
-      ndbg("ERROR: Unreachable: %08lx\n", (unsigned long)ipaddr);
+      nerr("ERROR: Unreachable: %08lx\n", (unsigned long)ipaddr);
       ret = -EHOSTUNREACH;
       goto errout;
     }
@@ -281,11 +281,11 @@ int arp_send(in_addr_t ipaddr)
    * want anything to happen until we are ready.
    */
 
-  save = net_lock();
+  net_lock();
   state.snd_cb = arp_callback_alloc(dev);
   if (!state.snd_cb)
     {
-      ndbg("ERROR: Failed to allocate a callback\n");
+      nerr("ERROR: Failed to allocate a callback\n");
       ret = -ENOMEM;
       goto errout_with_lock;
     }
@@ -294,7 +294,13 @@ int arp_send(in_addr_t ipaddr)
    * disabled
    */
 
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   (void)sem_init(&state.snd_sem, 0, 0); /* Doesn't really fail */
+  sem_setprotocol(&state.snd_sem, SEM_PRIO_NONE);
+
   state.snd_retries   = 0;              /* No retries yet */
   state.snd_ipaddr    = ipaddr;         /* IP address to query */
 
@@ -368,7 +374,7 @@ int arp_send(in_addr_t ipaddr)
         {
           /* Break out on a send failure */
 
-          ndbg("ERROR: Send failed: %d\n", ret);
+          nerr("ERROR: Send failed: %d\n", ret);
           break;
         }
 
@@ -396,13 +402,13 @@ int arp_send(in_addr_t ipaddr)
       /* Increment the retry count */
 
       state.snd_retries++;
-      ndbg("ERROR: arp_wait failed: %d\n", ret);
+      nerr("ERROR: arp_wait failed: %d\n", ret);
     }
 
   sem_destroy(&state.snd_sem);
   arp_callback_free(dev, state.snd_cb);
 errout_with_lock:
-  net_unlock(save);
+  net_unlock();
 errout:
   return ret;
 }
diff --git a/net/devif/devif_callback.c b/net/devif/devif_callback.c
index fc89eaf7d593adb159ed83c8cf325d6ba4377922..067b7663d97a8e59d9c85a49711903d30af3ccb1 100644
--- a/net/devif/devif_callback.c
+++ b/net/devif/devif_callback.c
@@ -80,13 +80,12 @@ static void devif_callback_free(FAR struct net_driver_s *dev,
 {
   FAR struct devif_callback_s *prev;
   FAR struct devif_callback_s *curr;
-  net_lock_t save;
 
   if (cb)
     {
-      save = net_lock();
+      net_lock();
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
       /* Check for double freed callbacks */
 
       curr = g_cbfreelist;
@@ -159,7 +158,7 @@ static void devif_callback_free(FAR struct net_driver_s *dev,
       cb->nxtconn  = g_cbfreelist;
       cb->nxtdev   = NULL;
       g_cbfreelist = cb;
-      net_unlock(save);
+      net_unlock();
     }
 }
 
@@ -210,11 +209,10 @@ FAR struct devif_callback_s *
                        FAR struct devif_callback_s **list)
 {
   FAR struct devif_callback_s *ret;
-  net_lock_t save;
 
   /* Check  the head of the free list */
 
-  save = net_lock();
+  net_lock();
   ret  = g_cbfreelist;
   if (ret)
     {
@@ -241,7 +239,7 @@ FAR struct devif_callback_s *
               /* No.. release the callback structure and fail */
 
               devif_callback_free(NULL, NULL, list);
-              net_unlock(save);
+              net_unlock();
               return NULL;
             }
 
@@ -257,14 +255,14 @@ FAR struct devif_callback_s *
            *list = ret;
         }
     }
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   else
     {
-      nlldbg("Failed to allocate callback\n");
+      nerr("ERROR: Failed to allocate callback\n");
     }
 #endif
 
-  net_unlock(save);
+  net_unlock();
   return ret;
 }
 
@@ -385,13 +383,12 @@ uint16_t devif_conn_event(FAR struct net_driver_s *dev, void *pvconn,
                           uint16_t flags, FAR struct devif_callback_s *list)
 {
   FAR struct devif_callback_s *next;
-  net_lock_t save;
 
   /* Loop for each callback in the list and while there are still events
    * set in the flags set.
    */
 
-  save = net_lock();
+  net_lock();
   while (list && flags)
     {
       /* Save the pointer to the next callback in the lists.  This is done
@@ -410,7 +407,7 @@ uint16_t devif_conn_event(FAR struct net_driver_s *dev, void *pvconn,
            * beginning of the list (which will be ignored on this pass)
            */
 
-          nllvdbg("Call event=%p with flags=%04x\n", list->event, flags);
+          ninfo("Call event=%p with flags=%04x\n", list->event, flags);
           flags = list->event(dev, pvconn, list->priv, flags);
         }
 
@@ -419,7 +416,7 @@ uint16_t devif_conn_event(FAR struct net_driver_s *dev, void *pvconn,
       list = next;
     }
 
-  net_unlock(save);
+  net_unlock();
   return flags;
 }
 
@@ -450,13 +447,12 @@ uint16_t devif_dev_event(FAR struct net_driver_s *dev, void *pvconn,
 {
   FAR struct devif_callback_s *cb;
   FAR struct devif_callback_s *next;
-  net_lock_t save;
 
   /* Loop for each callback in the list and while there are still events
    * set in the flags set.
    */
 
-  save = net_lock();
+  net_lock();
   for (cb = dev->d_devcb; cb != NULL && flags != 0; cb = next)
     {
       /* Save the pointer to the next callback in the lists.  This is done
@@ -475,7 +471,7 @@ uint16_t devif_dev_event(FAR struct net_driver_s *dev, void *pvconn,
            * beginning of the list (which will be ignored on this pass)
            */
 
-          nllvdbg("Call event=%p with flags=%04x\n", cb->event, flags);
+          ninfo("Call event=%p with flags=%04x\n", cb->event, flags);
           flags = cb->event(dev, pvconn, cb->priv, flags);
         }
 
@@ -484,7 +480,7 @@ uint16_t devif_dev_event(FAR struct net_driver_s *dev, void *pvconn,
       cb = next;
     }
 
-  net_unlock(save);
+  net_unlock();
   return flags;
 }
 
diff --git a/net/devif/ipv4_input.c b/net/devif/ipv4_input.c
index 1b3caf5087fbaf336492876f6ca3b632e635bc4b..5a773b1ef8d0329fd4ca3ac1a016f59e4d3752e6 100644
--- a/net/devif/ipv4_input.c
+++ b/net/devif/ipv4_input.c
@@ -116,10 +116,6 @@
 #define TCP_REASS_BUFSIZE    (NET_DEV_MTU(dev) - NET_LL_HDRLEN(dev))
 #define TCP_REASS_LASTFRAG   0x01
 
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/
@@ -316,13 +312,12 @@ nullreturn:
  *         yet.  Currently useful for UDP when a packet arrives before a recv
  *         call is in place.
  *
- * Assumptions:
- *
  ****************************************************************************/
 
 int ipv4_input(FAR struct net_driver_s *dev)
 {
   FAR struct ipv4_hdr_s *pbuf = BUF;
+  uint16_t hdrlen;
   uint16_t iplen;
 
   /* This is where the input processing starts. */
@@ -342,10 +337,22 @@ int ipv4_input(FAR struct net_driver_s *dev)
       g_netstats.ipv4.drop++;
       g_netstats.ipv4.vhlerr++;
 #endif
-      nlldbg("Invalid IP version or header length: %02x\n", pbuf->vhl);
+      nwarn("WARNING: Invalid IP version or header length: %02x\n",
+            pbuf->vhl);
       goto drop;
     }
 
+  /* Get the size of the packet minus the size of link layer header */
+
+  hdrlen = NET_LL_HDRLEN(dev);
+  if ((hdrlen + IPv4_HDRLEN) > dev->d_len)
+    {
+      nwarn("WARNING: Packet shorter than IPv4 header\n");
+      goto drop;
+    }
+
+  dev->d_len -= hdrlen;
+
   /* Check the size of the packet. If the size reported to us in d_len is
    * smaller the size reported in the IP header, we assume that the packet
    * has been corrupted in transit. If the size of d_len is larger than the
@@ -360,7 +367,7 @@ int ipv4_input(FAR struct net_driver_s *dev)
     }
   else
     {
-      nlldbg("IP packet shorter than length in IP header\n");
+      nwarn("WARNING: IP packet shorter than length in IP header\n");
       goto drop;
     }
 
@@ -379,7 +386,7 @@ int ipv4_input(FAR struct net_driver_s *dev)
       g_netstats.ipv4.drop++;
       g_netstats.ipv4.fragerr++;
 #endif
-      nlldbg("IP fragment dropped\n");
+      nwarn("WARNING: IP fragment dropped\n");
       goto drop;
 #endif /* CONFIG_NET_TCP_REASSEMBLY */
     }
@@ -405,7 +412,7 @@ int ipv4_input(FAR struct net_driver_s *dev)
 #ifdef CONFIG_NET_ICMP
   if (net_ipv4addr_cmp(dev->d_ipaddr, INADDR_ANY))
     {
-      nlldbg("No IP address assigned\n");
+      nwarn("WARNING: No IP address assigned\n");
       goto drop;
     }
 
@@ -438,7 +445,7 @@ int ipv4_input(FAR struct net_driver_s *dev)
       g_netstats.ipv4.drop++;
       g_netstats.ipv4.chkerr++;
 #endif
-      nlldbg("Bad IP checksum\n");
+      nwarn("WARNING: Bad IP checksum\n");
       goto drop;
     }
 
@@ -486,7 +493,7 @@ int ipv4_input(FAR struct net_driver_s *dev)
         g_netstats.ipv4.protoerr++;
 #endif
 
-        nlldbg("Unrecognized IP protocol\n");
+        nwarn("WARNING: Unrecognized IP protocol\n");
         goto drop;
     }
 
diff --git a/net/devif/ipv6_input.c b/net/devif/ipv6_input.c
index f5be1751f0840ab4359414ce9c31d3b9e6954a92..08166306798ff8829349f00da6fbcec0af7c55ec 100644
--- a/net/devif/ipv6_input.c
+++ b/net/devif/ipv6_input.c
@@ -2,7 +2,7 @@
  * net/devif/ipv6_input.c
  * Device driver IPv6 packet receipt interface
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Adapted for NuttX from logic in uIP which also has a BSD-like license:
@@ -108,18 +108,6 @@
 
 #define IPv6BUF  ((FAR struct ipv6_hdr_s *)&dev->d_buf[NET_LL_HDRLEN(dev)])
 
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -142,6 +130,7 @@
 int ipv6_input(FAR struct net_driver_s *dev)
 {
   FAR struct ipv6_hdr_s *ipv6 = IPv6BUF;
+  uint16_t hdrlen;
   uint16_t pktlen;
 
   /* This is where the input processing starts. */
@@ -162,10 +151,21 @@ int ipv6_input(FAR struct net_driver_s *dev)
       g_netstats.ipv6.vhlerr++;
 #endif
 
-      nlldbg("ERROR: Invalid IPv6 version: %d\n", ipv6->vtc >> 4);
+      nwarn("WARNING: Invalid IPv6 version: %d\n", ipv6->vtc >> 4);
       goto drop;
     }
 
+  /* Get the size of the packet minus the size of link layer header */
+
+  hdrlen = NET_LL_HDRLEN(dev);
+  if ((hdrlen + IPv6_HDRLEN) > dev->d_len)
+    {
+      nwarn("WARNING: Packet shorter than IPv6 header\n");
+      goto drop;
+    }
+
+  dev->d_len -= hdrlen;
+
   /* Check the size of the packet. If the size reported to us in d_len is
    * smaller the size reported in the IP header, we assume that the packet
    * has been corrupted in transit. If the size of d_len is larger than the
@@ -173,13 +173,13 @@ int ipv6_input(FAR struct net_driver_s *dev)
    * we set d_len to the correct value.
    *
    * The length reported in the IPv6 header is the length of the payload
-   * that follows the header. The device interface uses the d_len variable for
-   * holding the size of the entire packet, including the IP header and link
-   * layer header.
+   * that follows the header.  The device interface uses the d_len variable
+   * for holding the size of the entire packet, including the IP header but
+   * without the link layer header.
    */
 
   pktlen = ((uint16_t)ipv6->len[0] << 8) + (uint16_t)ipv6->len[1] +
-           IPv6_HDRLEN + netdev_ipv6_hdrlen(dev);
+           IPv6_HDRLEN;
 
   if (pktlen <= dev->d_len)
     {
@@ -187,7 +187,7 @@ int ipv6_input(FAR struct net_driver_s *dev)
     }
   else
     {
-      nlldbg("ERROR: IP packet shorter than length in IP header\n");
+      nwarn("WARNING: IP packet shorter than length in IP header\n");
       goto drop;
     }
 
@@ -216,7 +216,7 @@ int ipv6_input(FAR struct net_driver_s *dev)
        * packets.
        */
 
-      nlldbg("ERROR: No IP address assigned\n");
+      nwarn("WARNING: No IP address assigned\n");
       goto drop;
     }
 
@@ -279,7 +279,7 @@ int ipv6_input(FAR struct net_driver_s *dev)
         g_netstats.ipv6.protoerr++;
 #endif
 
-        nlldbg("ERROR: Unrecognized IP protocol: %04x\n", ipv6->proto);
+        nwarn("WARNING: Unrecognized IP protocol: %04x\n", ipv6->proto);
         goto drop;
     }
 
diff --git a/net/icmp/icmp_input.c b/net/icmp/icmp_input.c
index 2d919b8f7634038a5a74a919a74b6a0df1fe0c76..ff822e493a23e5c07e3023dcbb152e352659a31a 100644
--- a/net/icmp/icmp_input.c
+++ b/net/icmp/icmp_input.c
@@ -140,7 +140,7 @@ void icmp_input(FAR struct net_driver_s *dev)
         }
 #endif
 
-      nllvdbg("Outgoing ICMP packet length: %d (%d)\n",
+      ninfo("Outgoing ICMP packet length: %d (%d)\n",
               dev->d_len, (picmp->len[0] << 8) | picmp->len[1]);
 
 #ifdef CONFIG_NET_STATISTICS
@@ -164,7 +164,7 @@ void icmp_input(FAR struct net_driver_s *dev)
 
   else
     {
-      nlldbg("Unknown ICMP cmd: %d\n", picmp->type);
+      nwarn("WARNING: Unknown ICMP cmd: %d\n", picmp->type);
       goto typeerr;
     }
 
diff --git a/net/icmp/icmp_ping.c b/net/icmp/icmp_ping.c
index 337968bf8435d4ba1ea587c2fafa41b7d39cab76..e6f8961b4806593125b5295f1129dd5b370d8926 100644
--- a/net/icmp/icmp_ping.c
+++ b/net/icmp/icmp_ping.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * net/icmp/icmp_ping.c
  *
- *   Copyright (C) 2008-2012, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2012, 2014-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -51,6 +51,7 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -154,7 +155,7 @@ static uint16_t ping_interrupt(FAR struct net_driver_s *dev, FAR void *conn,
   FAR uint8_t *ptr;
   int i;
 
-  nllvdbg("flags: %04x\n", flags);
+  ninfo("flags: %04x\n", flags);
 
   if (pstate)
     {
@@ -162,7 +163,7 @@ static uint16_t ping_interrupt(FAR struct net_driver_s *dev, FAR void *conn,
 
       if ((flags & NETDEV_DOWN) != 0)
         {
-          nlldbg("ERROR: Interface is down\n");
+          nerr("ERROR: Interface is down\n");
           pstate->png_result = -ENETUNREACH;
           goto end_wait;
         }
@@ -177,8 +178,8 @@ static uint16_t ping_interrupt(FAR struct net_driver_s *dev, FAR void *conn,
         {
           FAR struct icmp_iphdr_s *icmp = (FAR struct icmp_iphdr_s *)conn;
 
-          nllvdbg("ECHO reply: id=%d seqno=%d\n",
-                  ntohs(icmp->id), ntohs(icmp->seqno));
+          ninfo("ECHO reply: id=%d seqno=%d\n",
+                ntohs(icmp->id), ntohs(icmp->seqno));
 
           if (ntohs(icmp->id) == pstate->png_id)
             {
@@ -236,7 +237,7 @@ static uint16_t ping_interrupt(FAR struct net_driver_s *dev, FAR void *conn,
            * of the ICMP header.
            */
 
-          nllvdbg("Send ECHO request: seqno=%d\n", pstate->png_seqno);
+          ninfo("Send ECHO request: seqno=%d\n", pstate->png_seqno);
 
           dev->d_sndlen = pstate->png_datlen + 4;
           icmp_send(dev, &pstate->png_addr);
@@ -262,12 +263,12 @@ static uint16_t ping_interrupt(FAR struct net_driver_s *dev, FAR void *conn,
                * that the destination address is not reachable.
                */
 
-              nlldbg("Not reachable\n");
+              nerr("ERROR:Not reachable\n");
               failcode = -ENETUNREACH;
             }
           else
             {
-              nlldbg("Ping timeout\n");
+              nerr("ERROR:Ping timeout\n");
               failcode = -ETIMEDOUT;
             }
 
@@ -283,7 +284,7 @@ static uint16_t ping_interrupt(FAR struct net_driver_s *dev, FAR void *conn,
   return flags;
 
 end_wait:
-  nllvdbg("Resuming\n");
+  ninfo("Resuming\n");
 
   /* Do not allow any further callbacks */
 
@@ -333,7 +334,6 @@ int icmp_ping(in_addr_t addr, uint16_t id, uint16_t seqno, uint16_t datalen,
 {
   FAR struct net_driver_s *dev;
   struct icmp_ping_s state;
-  net_lock_t save;
 #ifdef CONFIG_NET_ARP_SEND
   int ret;
 #endif
@@ -347,7 +347,7 @@ int icmp_ping(in_addr_t addr, uint16_t id, uint16_t seqno, uint16_t datalen,
 #endif
   if (dev == 0)
     {
-      ndbg("ERROR: Not reachable\n");
+      nerr("ERROR: Not reachable\n");
       return -ENETUNREACH;
     }
 
@@ -357,14 +357,20 @@ int icmp_ping(in_addr_t addr, uint16_t id, uint16_t seqno, uint16_t datalen,
   ret = arp_send(addr);
   if (ret < 0)
     {
-      ndbg("ERROR: Not reachable\n");
+      nerr("ERROR: Not reachable\n");
       return -ENETUNREACH;
     }
 #endif
 
   /* Initialize the state structure */
 
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   sem_init(&state.png_sem, 0, 0);
+  sem_setprotocol(&state.png_sem, SEM_PRIO_NONE);
+
   state.png_ticks  = DSEC2TICK(dsecs); /* System ticks to wait */
   state.png_result = -ENOMEM;          /* Assume allocation failure */
   state.png_addr   = addr;             /* Address of the peer to be ping'ed */
@@ -373,7 +379,7 @@ int icmp_ping(in_addr_t addr, uint16_t id, uint16_t seqno, uint16_t datalen,
   state.png_datlen = datalen;          /* The length of data to send in the ECHO request */
   state.png_sent   = false;            /* ECHO request not yet sent */
 
-  save             = net_lock();
+  net_lock();
   state.png_time   = clock_systimer();
 
   /* Set up the callback */
@@ -397,13 +403,13 @@ int icmp_ping(in_addr_t addr, uint16_t id, uint16_t seqno, uint16_t datalen,
        * re-enabled when the task restarts.
        */
 
-      nllvdbg("Start time: 0x%08x seqno: %d\n", state.png_time, seqno);
+      ninfo("Start time: 0x%08x seqno: %d\n", state.png_time, seqno);
       net_lockedwait(&state.png_sem);
 
       icmp_callback_free(dev, state.png_cb);
     }
 
-  net_unlock(save);
+  net_unlock();
 
   /* Return the negated error number in the event of a failure, or the
    * sequence number of the ECHO reply on success.
@@ -411,12 +417,12 @@ int icmp_ping(in_addr_t addr, uint16_t id, uint16_t seqno, uint16_t datalen,
 
   if (!state.png_result)
     {
-      nllvdbg("Return seqno=%d\n", state.png_seqno);
+      ninfo("Return seqno=%d\n", state.png_seqno);
       return (int)state.png_seqno;
     }
   else
     {
-      nlldbg("Return error=%d\n", -state.png_result);
+      nerr("ERROR: Return error=%d\n", -state.png_result);
       return state.png_result;
     }
 }
diff --git a/net/icmp/icmp_send.c b/net/icmp/icmp_send.c
index b92e992704dfa025e7ac66224e9326e2e2254cd9..768451c9d71e4330d58966716facabbe9f3e1ce3 100644
--- a/net/icmp/icmp_send.c
+++ b/net/icmp/icmp_send.c
@@ -131,7 +131,7 @@ void icmp_send(FAR struct net_driver_s *dev, FAR in_addr_t *destaddr)
           picmp->icmpchksum = 0xffff;
         }
 
-      nllvdbg("Outgoing ICMP packet length: %d (%d)\n",
+      ninfo("Outgoing ICMP packet length: %d (%d)\n",
               dev->d_len, (picmp->len[0] << 8) | picmp->len[1]);
 
 #ifdef CONFIG_NET_STATISTICS
diff --git a/net/icmpv6/icmpv6_advertise.c b/net/icmpv6/icmpv6_advertise.c
index c30456d85591285e8d66f9b7740b31ecca08ec2b..68d417873af0fc91f696f51292c156fd551ca538 100644
--- a/net/icmpv6/icmpv6_advertise.c
+++ b/net/icmpv6/icmpv6_advertise.c
@@ -180,7 +180,7 @@ void icmpv6_advertise(FAR struct net_driver_s *dev,
 
   IFF_SET_NOARP(dev->d_flags);
 
-  nllvdbg("Outgoing ICMPv6 Neighbor Advertise length: %d (%d)\n",
+  ninfo("Outgoing ICMPv6 Neighbor Advertise length: %d (%d)\n",
           dev->d_len, (icmp->len[0] << 8) | icmp->len[1]);
 
 #ifdef CONFIG_NET_STATISTICS
diff --git a/net/icmpv6/icmpv6_autoconfig.c b/net/icmpv6/icmpv6_autoconfig.c
index 7899f07451abd1e1df9582eafddc0dfa5f09d06a..05a9c449265468b280b8d566db1e0ed6dff5f161 100644
--- a/net/icmpv6/icmpv6_autoconfig.c
+++ b/net/icmpv6/icmpv6_autoconfig.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * net/icmpv6/icmpv6_autoconfig.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -47,6 +47,7 @@
 
 #include 
 
+#include 
 #include 
 #include 
 
@@ -119,7 +120,7 @@ static uint16_t icmpv6_router_interrupt(FAR struct net_driver_s *dev,
 {
   FAR struct icmpv6_router_s *state = (FAR struct icmpv6_router_s *)priv;
 
-  nllvdbg("flags: %04x sent: %d\n", flags, state->snd_sent);
+  ninfo("flags: %04x sent: %d\n", flags, state->snd_sent);
 
   if (state)
     {
@@ -127,7 +128,7 @@ static uint16_t icmpv6_router_interrupt(FAR struct net_driver_s *dev,
 
       if ((flags & NETDEV_DOWN) != 0)
         {
-          nlldbg("ERROR: Interface is down\n");
+          nerr("ERROR: Interface is down\n");
           icmpv6_router_terminate(state, -ENETUNREACH);
           return flags;
         }
@@ -208,7 +209,12 @@ static int icmpv6_send_message(FAR struct net_driver_s *dev, bool advertise)
    * disabled
    */
 
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   (void)sem_init(&state.snd_sem, 0, 0); /* Doesn't really fail */
+  sem_setprotocol(&state.snd_sem, SEM_PRIO_NONE);
 
 #ifdef CONFIG_NETDEV_MULTINIC
   /* Remember the routing device name */
@@ -225,7 +231,7 @@ static int icmpv6_send_message(FAR struct net_driver_s *dev, bool advertise)
   state.snd_cb = icmpv6_callback_alloc(dev);
   if (!state.snd_cb)
     {
-      ndbg("ERROR: Failed to allocate a cllback\n");
+      nerr("ERROR: Failed to allocate a cllback\n");
       ret = -ENOMEM;
       goto errout_with_semaphore;
     }
@@ -273,7 +279,6 @@ errout_with_semaphore:
  * Parameters:
  *   dev    - The device to use to send the solicitation
  *   notify - The pre-initialized notification structure
- *   save   - We will need this to temporarily release the net lock
  *
  * Returned Value:
  *   Zero (OK) is returned on success; On error a negated errno value is
@@ -285,8 +290,7 @@ errout_with_semaphore:
  ****************************************************************************/
 
 static int icmpv6_wait_radvertise(FAR struct net_driver_s *dev,
-                                  FAR struct icmpv6_rnotify_s *notify,
-                                  net_lock_t *save)
+                                  FAR struct icmpv6_rnotify_s *notify)
 {
   struct timespec delay;
   int ret;
@@ -341,36 +345,35 @@ int icmpv6_autoconfig(FAR struct net_driver_s *dev)
 #ifndef CONFIG_NET_ETHERNET
   /* Only Ethernet supported for now */
 
-  ndbg("ERROR: Only Ethernet is supported\n");
+  nerr("ERROR: Only Ethernet is supported\n");
   return -ENOSYS;
 
 #else /* CONFIG_NET_ETHERNET */
   struct icmpv6_rnotify_s notify;
   net_ipv6addr_t lladdr;
-  net_lock_t save;
   int retries;
   int ret;
 
   /* Sanity checks */
 
   DEBUGASSERT(dev);
-  nvdbg("Auto-configuring %s\n", dev->d_ifname);
+  ninfo("Auto-configuring %s\n", dev->d_ifname);
 
 #ifdef CONFIG_NET_MULTILINK
   /* Only Ethernet devices are supported for now */
 
   if (dev->d_lltype != NET_LL_ETHERNET)
     {
-      ndbg("ERROR: Only Ethernet is supported\n");
+      nerr("ERROR: Only Ethernet is supported\n");
       return -ENOSYS;
     }
 #endif
 
   /* The interface should be in the down state */
 
-  save = net_lock();
+  net_lock();
   netdev_ifdown(dev);
-  net_unlock(save);
+  net_unlock();
 
   /* IPv6 Stateless Autoconfiguration
    * Reference: http://www.tcpipguide.com/free/t_IPv6AutoconfigurationandRenumbering.htm
@@ -402,16 +405,16 @@ int icmpv6_autoconfig(FAR struct net_driver_s *dev)
   memcpy(&lladdr[5], dev->d_mac.ether_addr_octet,
         sizeof(struct ether_addr));                 /* 48-bit Ethernet address */
 
-  nvdbg("lladdr=%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+  ninfo("lladdr=%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
         lladdr[0], lladdr[1], lladdr[2], lladdr[3],
         lladdr[4], lladdr[6], lladdr[6], lladdr[7]);
 
 #ifdef CONFIG_NET_ICMPv6_NEIGHBOR
   /* Bring the interface up with no IP address */
 
-  save = net_lock();
+  net_lock();
   netdev_ifup(dev);
-  net_unlock(save);
+  net_unlock();
 
   /* 2. Link-Local Address Uniqueness Test: The node tests to ensure that
    *    the address it generated isn't for some reason already in use on the
@@ -429,9 +432,9 @@ int icmpv6_autoconfig(FAR struct net_driver_s *dev)
 
   /* Take the interface back down */
 
-  save = net_lock();
+  net_lock();
   netdev_ifdown(dev);
-  net_unlock(save);
+  net_unlock();
 
   if (ret == OK)
     {
@@ -439,7 +442,7 @@ int icmpv6_autoconfig(FAR struct net_driver_s *dev)
        * have not back-up plan in place.  Just bail.
        */
 
-      ndbg("ERROR: IP conflict\n");
+      nerr("ERROR: IP conflict\n");
       return -EEXIST;
     }
 #endif
@@ -450,7 +453,7 @@ int icmpv6_autoconfig(FAR struct net_driver_s *dev)
    *    on the wider Internet (since link-local addresses are not routed).
    */
 
-  save = net_lock();
+  net_lock();
   net_ipv6addr_copy(dev->d_ipv6addr, lladdr);
 
   /* Bring the interface up with the new, temporary IP address */
@@ -477,13 +480,13 @@ int icmpv6_autoconfig(FAR struct net_driver_s *dev)
       ret = icmpv6_send_message(dev, false);
       if (ret < 0)
         {
-          ndbg("ERROR: Failed send router solicitation: %d\n", ret);
+          nerr("ERROR: Failed send router solicitation: %d\n", ret);
           break;
         }
 
       /* Wait to receive the Router Advertisement message */
 
-      ret = icmpv6_wait_radvertise(dev, ¬ify, &save);
+      ret = icmpv6_wait_radvertise(dev, ¬ify);
       if (ret != -ETIMEDOUT)
         {
           /* ETIMEDOUT is the only expected failure.  We will retry on that
@@ -493,7 +496,7 @@ int icmpv6_autoconfig(FAR struct net_driver_s *dev)
           break;
         }
 
-      nvdbg("Timed out... retrying %d\n", retries + 1);
+      ninfo("Timed out... retrying %d\n", retries + 1);
     }
 
   /* Check for failures.  Note:  On successful return, the network will be 
@@ -502,7 +505,7 @@ int icmpv6_autoconfig(FAR struct net_driver_s *dev)
 
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to get the router advertisement: %d (retries=%d)\n",
+      nerr("ERROR: Failed to get the router advertisement: %d (retries=%d)\n",
            ret, retries);
 
       /* Claim the link local address as ours by sending the ICMPv6 Neighbor
@@ -512,7 +515,7 @@ int icmpv6_autoconfig(FAR struct net_driver_s *dev)
       ret = icmpv6_send_message(dev, true);
       if (ret < 0)
         {
-          ndbg("ERROR: Failed send neighbor advertisement: %d\n", ret);
+          nerr("ERROR: Failed send neighbor advertisement: %d\n", ret);
           netdev_ifdown(dev);
         }
 
@@ -528,7 +531,7 @@ int icmpv6_autoconfig(FAR struct net_driver_s *dev)
        * work out quite the way we wanted).
        */
 
-      net_unlock(save);
+      net_unlock();
       return ret;
     }
 
@@ -551,7 +554,7 @@ int icmpv6_autoconfig(FAR struct net_driver_s *dev)
    */
 
   netdev_ifup(dev);
-  net_unlock(save);
+  net_unlock();
   return OK;
 #endif /* CONFIG_NET_ETHERNET */
 }
diff --git a/net/icmpv6/icmpv6_input.c b/net/icmpv6/icmpv6_input.c
index 3ffc30662ee89624a9e00c7ef2fe3153170c766a..21f171fbf84ceb6276b355ebd78bdaea5dcfc0e4 100644
--- a/net/icmpv6/icmpv6_input.c
+++ b/net/icmpv6/icmpv6_input.c
@@ -307,12 +307,12 @@ void icmpv6_input(FAR struct net_driver_s *dev)
 
     default:
       {
-        nlldbg("Unknown ICMPv6 type: %d\n", icmp->type);
+        nwarn("WARNING: Unknown ICMPv6 type: %d\n", icmp->type);
         goto icmpv6_type_error;
       }
     }
 
-  nllvdbg("Outgoing ICMPv6 packet length: %d (%d)\n",
+  ninfo("Outgoing ICMPv6 packet length: %d (%d)\n",
           dev->d_len, (icmp->len[0] << 8) | icmp->len[1]);
 
 #ifdef CONFIG_NET_STATISTICS
diff --git a/net/icmpv6/icmpv6_neighbor.c b/net/icmpv6/icmpv6_neighbor.c
index d2de41650435cf79632cdc0d03227e879b181f49..de7ba28046a9f58899951c60a9912c00c1f0b639 100644
--- a/net/icmpv6/icmpv6_neighbor.c
+++ b/net/icmpv6/icmpv6_neighbor.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * net/icmpv6/icmpv6_neighbor.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -48,6 +48,7 @@
 #include 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -103,7 +104,7 @@ static uint16_t icmpv6_neighbor_interrupt(FAR struct net_driver_s *dev,
 {
   FAR struct icmpv6_neighbor_s *state = (FAR struct icmpv6_neighbor_s *)priv;
 
-  nllvdbg("flags: %04x sent: %d\n", flags, state->snd_sent);
+  ninfo("flags: %04x sent: %d\n", flags, state->snd_sent);
 
   if (state)
     {
@@ -206,7 +207,6 @@ int icmpv6_neighbor(const net_ipv6addr_t ipaddr)
   struct timespec delay;
   struct icmpv6_neighbor_s state;
   FAR const uint16_t *lookup;
-  net_lock_t save;
   int ret;
 
   /* First check if destination is a local broadcast or a multicast address.
@@ -232,7 +232,7 @@ int icmpv6_neighbor(const net_ipv6addr_t ipaddr)
 #endif
   if (!dev)
     {
-      ndbg("ERROR: Unreachable: %08lx\n", (unsigned long)ipaddr);
+      nerr("ERROR: Unreachable: %08lx\n", (unsigned long)ipaddr);
       ret = -EHOSTUNREACH;
       goto errout;
     }
@@ -294,11 +294,11 @@ int icmpv6_neighbor(const net_ipv6addr_t ipaddr)
    * want anything to happen until we are ready.
    */
 
-  save = net_lock();
+  net_lock();
   state.snd_cb = icmpv6_callback_alloc(dev);
   if (!state.snd_cb)
     {
-      ndbg("ERROR: Failed to allocate a cllback\n");
+      nerr("ERROR: Failed to allocate a callback\n");
       ret = -ENOMEM;
       goto errout_with_lock;
     }
@@ -307,8 +307,14 @@ int icmpv6_neighbor(const net_ipv6addr_t ipaddr)
    * disabled
    */
 
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   (void)sem_init(&state.snd_sem, 0, 0);        /* Doesn't really fail */
-  state.snd_retries = 0;                       /* No retries yet */
+  sem_setprotocol(&state.snd_sem, SEM_PRIO_NONE);
+
+ state.snd_retries = 0;                       /* No retries yet */
   net_ipv6addr_copy(state.snd_ipaddr, lookup); /* IP address to query */
 
 #ifdef CONFIG_NETDEV_MULTINIC
@@ -397,7 +403,7 @@ int icmpv6_neighbor(const net_ipv6addr_t ipaddr)
   sem_destroy(&state.snd_sem);
   icmpv6_callback_free(dev, state.snd_cb);
 errout_with_lock:
-  net_unlock(save);
+  net_unlock();
 errout:
   return ret;
 }
diff --git a/net/icmpv6/icmpv6_notify.c b/net/icmpv6/icmpv6_notify.c
index 4185b5a352575529ef51ea066ace1e21ccc34339..ad0ddbd8c185fd1ca114ef973b38ff09af3c60ea 100644
--- a/net/icmpv6/icmpv6_notify.c
+++ b/net/icmpv6/icmpv6_notify.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * net/icmpv6/icmpv6_notify.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -47,8 +47,9 @@
 
 #include 
 
-#include 
 #include 
+#include 
+#include 
 
 #include "icmpv6/icmpv6.h"
 
@@ -101,7 +102,13 @@ void icmpv6_wait_setup(const net_ipv6addr_t ipaddr,
 
   net_ipv6addr_copy(notify->nt_ipaddr, ipaddr);
   notify->nt_result = -ETIMEDOUT;
+
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   (void)sem_init(¬ify->nt_sem, 0, 0);
+  sem_setprotocol(¬ify->nt_sem, SEM_PRIO_NONE);
 
   /* Add the wait structure to the list with interrupts disabled */
 
diff --git a/net/icmpv6/icmpv6_ping.c b/net/icmpv6/icmpv6_ping.c
index 0e9ac3b691394d6903294e258f24054396bacc25..2d37890464e8f96a83505cdb445880a56585e3f3 100644
--- a/net/icmpv6/icmpv6_ping.c
+++ b/net/icmpv6/icmpv6_ping.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * net/icmpv6/icmpv6_ping.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -50,6 +50,7 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -164,7 +165,7 @@ static void icmpv6_echo_request(FAR struct net_driver_s *dev,
   uint16_t reqlen;
   int i;
 
-  nllvdbg("Send ECHO request: seqno=%d\n", pstate->png_seqno);
+  ninfo("Send ECHO request: seqno=%d\n", pstate->png_seqno);
 
   /* Set up the IPv6 header (most is probably already in place) */
 
@@ -217,8 +218,8 @@ static void icmpv6_echo_request(FAR struct net_driver_s *dev,
   dev->d_sndlen = reqlen;
   dev->d_len    = reqlen + IPv6_HDRLEN;
 
-  nllvdbg("Outgoing ICMPv6 Echo Request length: %d (%d)\n",
-          dev->d_len, (icmp->len[0] << 8) | icmp->len[1]);
+  ninfo("Outgoing ICMPv6 Echo Request length: %d (%d)\n",
+        dev->d_len, (icmp->len[0] << 8) | icmp->len[1]);
 
 #ifdef CONFIG_NET_STATISTICS
   g_netstats.icmpv6.sent++;
@@ -253,7 +254,7 @@ static uint16_t ping_interrupt(FAR struct net_driver_s *dev, FAR void *conn,
 {
   FAR struct icmpv6_ping_s *pstate = (struct icmpv6_ping_s *)pvpriv;
 
-  nllvdbg("flags: %04x\n", flags);
+  ninfo("flags: %04x\n", flags);
 
   if (pstate)
     {
@@ -261,7 +262,7 @@ static uint16_t ping_interrupt(FAR struct net_driver_s *dev, FAR void *conn,
 
       if ((flags & NETDEV_DOWN) != 0)
         {
-          nlldbg("ERROR: Interface is down\n");
+          nerr("ERROR: Interface is down\n");
           pstate->png_result = -ENETUNREACH;
           goto end_wait;
         }
@@ -276,8 +277,8 @@ static uint16_t ping_interrupt(FAR struct net_driver_s *dev, FAR void *conn,
         {
           FAR struct icmpv6_echo_reply_s *reply = ICMPv6ECHOREPLY;
 
-          nllvdbg("ECHO reply: id=%d seqno=%d\n",
-                  ntohs(reply->id), ntohs(reply->seqno));
+          ninfo("ECHO reply: id=%d seqno=%d\n",
+                ntohs(reply->id), ntohs(reply->seqno));
 
           if (ntohs(reply->id) == pstate->png_id)
             {
@@ -336,12 +337,12 @@ static uint16_t ping_interrupt(FAR struct net_driver_s *dev, FAR void *conn,
                * reason is that the destination address is not reachable.
                */
 
-              nlldbg("Not reachable\n");
+              nerr("ERROR: Not reachable\n");
               failcode = -ENETUNREACH;
             }
           else
             {
-              nlldbg("Ping timeout\n");
+              nerr("ERROR: Ping timeout\n");
               failcode = -ETIMEDOUT;
             }
 
@@ -357,7 +358,7 @@ static uint16_t ping_interrupt(FAR struct net_driver_s *dev, FAR void *conn,
   return flags;
 
 end_wait:
-  nllvdbg("Resuming\n");
+  ninfo("Resuming\n");
 
   /* Do not allow any further callbacks */
 
@@ -407,7 +408,6 @@ int icmpv6_ping(net_ipv6addr_t addr, uint16_t id, uint16_t seqno,
 {
   FAR struct net_driver_s *dev;
   struct icmpv6_ping_s state;
-  net_lock_t save;
 
 #ifdef CONFIG_NET_ICMPv6_NEIGHBOR
   int ret;
@@ -417,7 +417,7 @@ int icmpv6_ping(net_ipv6addr_t addr, uint16_t id, uint16_t seqno,
   ret = icmpv6_neighbor(addr);
   if (ret < 0)
     {
-      ndbg("ERROR: Not reachable\n");
+      nerr("ERROR: Not reachable\n");
       return -ENETUNREACH;
     }
 #endif /* CONFIG_NET_ICMPv6_NEIGHBOR */
@@ -431,13 +431,19 @@ int icmpv6_ping(net_ipv6addr_t addr, uint16_t id, uint16_t seqno,
 #endif
   if (dev == 0)
     {
-      ndbg("ERROR: Not reachable\n");
+      nerr("ERROR: Not reachable\n");
       return -ENETUNREACH;
     }
 
   /* Initialize the state structure */
 
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   sem_init(&state.png_sem, 0, 0);
+  sem_setprotocol(&state.png_sem, SEM_PRIO_NONE);
+
   state.png_ticks  = DSEC2TICK(dsecs);     /* System ticks to wait */
   state.png_result = -ENOMEM;              /* Assume allocation failure */
   state.png_id     = id;                   /* The ID to use in the ECHO request */
@@ -447,7 +453,7 @@ int icmpv6_ping(net_ipv6addr_t addr, uint16_t id, uint16_t seqno,
 
   net_ipv6addr_copy(state.png_addr, addr); /* Address of the peer to be ping'ed */
 
-  save             = net_lock();
+  net_lock();
   state.png_time   = clock_systimer();
 
   /* Set up the callback */
@@ -471,13 +477,13 @@ int icmpv6_ping(net_ipv6addr_t addr, uint16_t id, uint16_t seqno,
        * re-enabled when the task restarts.
        */
 
-      nllvdbg("Start time: 0x%08x seqno: %d\n", state.png_time, seqno);
+      ninfo("Start time: 0x%08x seqno: %d\n", state.png_time, seqno);
       net_lockedwait(&state.png_sem);
 
       icmpv6_callback_free(dev, state.png_cb);
     }
 
-  net_unlock(save);
+  net_unlock();
 
   /* Return the negated error number in the event of a failure, or the
    * sequence number of the ECHO reply on success.
@@ -485,12 +491,12 @@ int icmpv6_ping(net_ipv6addr_t addr, uint16_t id, uint16_t seqno,
 
   if (!state.png_result)
     {
-      nllvdbg("Return seqno=%d\n", state.png_seqno);
+      ninfo("Return seqno=%d\n", state.png_seqno);
       return (int)state.png_seqno;
     }
   else
     {
-      nlldbg("Return error=%d\n", -state.png_result);
+      nerr("ERROR: Return error=%d\n", -state.png_result);
       return state.png_result;
     }
 }
diff --git a/net/icmpv6/icmpv6_radvertise.c b/net/icmpv6/icmpv6_radvertise.c
index 09bd4c48579234474a9181afe14286eab83b2948..040d1e39f7adb5781f73d6352ad46e19c6ea1b8a 100644
--- a/net/icmpv6/icmpv6_radvertise.c
+++ b/net/icmpv6/icmpv6_radvertise.c
@@ -242,7 +242,7 @@ void icmpv6_radvertise(FAR struct net_driver_s *dev)
 
   IFF_SET_NOARP(dev->d_flags);
 
-  nllvdbg("Outgoing ICMPv6 Router Advertise length: %d (%d)\n",
+  ninfo("Outgoing ICMPv6 Router Advertise length: %d (%d)\n",
           dev->d_len, (icmp->len[0] << 8) | icmp->len[1]);
 
 #ifdef CONFIG_NET_STATISTICS
diff --git a/net/icmpv6/icmpv6_rnotify.c b/net/icmpv6/icmpv6_rnotify.c
index c8e38e3d633ace937592451789ba698b1f15bb42..b43d8257026718f6b45d707c35db3944dde16e53 100644
--- a/net/icmpv6/icmpv6_rnotify.c
+++ b/net/icmpv6/icmpv6_rnotify.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * net/icmpv6/icmpv6_rnotify.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -47,9 +47,10 @@
 
 #include 
 
+#include 
+#include 
 #include 
 #include 
-#include 
 
 #include "netdev/netdev.h"
 #include "utils/utils.h"
@@ -106,7 +107,7 @@ static void icmpv6_setaddresses(FAR struct net_driver_s *dev,
 
   net_ipv6_pref2mask(preflen, dev->d_ipv6netmask);
 
-  nvdbg("preflen=%d netmask=%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+  ninfo("preflen=%d netmask=%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
         preflen, dev->d_ipv6netmask[0], dev->d_ipv6netmask[1],
         dev->d_ipv6netmask[2], dev->d_ipv6netmask[3], dev->d_ipv6netmask[4],
         dev->d_ipv6netmask[5], dev->d_ipv6netmask[6], dev->d_ipv6netmask[7]);
@@ -119,10 +120,10 @@ static void icmpv6_setaddresses(FAR struct net_driver_s *dev,
                            (prefix[i] & dev->d_ipv6netmask[i]);
     }
 
-  nvdbg("prefix=%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+  ninfo("prefix=%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
         prefix[0], prefix[1], prefix[2], prefix[3],
         prefix[4], prefix[6], prefix[6], prefix[7]);
-  nvdbg("IP address=%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+  ninfo("IP address=%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
         dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
         dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[6],
         dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
@@ -131,7 +132,7 @@ static void icmpv6_setaddresses(FAR struct net_driver_s *dev,
 
   net_ipv6addr_copy(dev->d_ipv6draddr, draddr);
 
-  nvdbg("DR address=%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+  ninfo("DR address=%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
         dev->d_ipv6draddr[0], dev->d_ipv6draddr[1], dev->d_ipv6draddr[2],
         dev->d_ipv6draddr[3], dev->d_ipv6draddr[4], dev->d_ipv6draddr[6],
         dev->d_ipv6draddr[6], dev->d_ipv6draddr[7]);
@@ -166,7 +167,13 @@ void icmpv6_rwait_setup(FAR struct net_driver_s *dev,
 
   memcpy(notify->rn_ifname, dev->d_ifname, IFNAMSIZ);
   notify->rn_result = -ETIMEDOUT;
+
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   (void)sem_init(¬ify->rn_sem, 0, 0);
+  sem_setprotocol(¬ify->rn_sem, SEM_PRIO_NONE);
 
   /* Add the wait structure to the list with interrupts disabled */
 
@@ -183,7 +190,13 @@ void icmpv6_rwait_setup(FAR struct net_driver_s *dev,
   /* Initialize and remember wait structure */
 
   notify->rn_result = -ETIMEDOUT;
+
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   (void)sem_init(¬ify->rn_sem, 0, 0);
+  sem_setprotocol(¬ify->rn_sem, SEM_PRIO_NONE);
 
   DEBUGASSERT(g_icmpv6_rwaiters == NULL);
   g_icmpv6_rwaiters = notify;
@@ -212,7 +225,7 @@ int icmpv6_rwait_cancel(FAR struct icmpv6_rnotify_s *notify)
   irqstate_t flags;
   int ret = -ENOENT;
 
-  nvdbg("Cancelling...\n");
+  ninfo("Cancelling...\n");
 
   /* Remove our wait structure from the list (we may no longer be at the
    * head of the list).
@@ -243,7 +256,7 @@ int icmpv6_rwait_cancel(FAR struct icmpv6_rnotify_s *notify)
   return ret;
 
 #else
-  nvdbg("Cancelling...\n");
+  ninfo("Cancelling...\n");
 
   /* If there is only one network device, then there can be only one entry
    * in the list of waiters.
@@ -276,7 +289,7 @@ int icmpv6_rwait(FAR struct icmpv6_rnotify_s *notify,
   irqstate_t flags;
   int ret;
 
-  nvdbg("Waiting...\n");
+  ninfo("Waiting...\n");
 
   /* And wait for the Neighbor Advertisement (or a timeout).  Interrupts will
    * be re-enabled while we wait.
@@ -335,7 +348,7 @@ void icmpv6_rnotify(FAR struct net_driver_s *dev, const net_ipv6addr_t draddr,
 #ifdef CONFIG_NETDEV_MULTINIC
   FAR struct icmpv6_rnotify_s *curr;
 
-  nvdbg("Notified\n");
+  ninfo("Notified\n");
 
   /* Find an entry with the matching device name in the list of waiters */
 
@@ -364,7 +377,7 @@ void icmpv6_rnotify(FAR struct net_driver_s *dev, const net_ipv6addr_t draddr,
 #else
   FAR struct icmpv6_rnotify_s *waiter = g_icmpv6_rwaiters;
 
-  nvdbg("Notified\n");
+  ninfo("Notified\n");
 
   if (waiter)
     {
diff --git a/net/icmpv6/icmpv6_rsolicit.c b/net/icmpv6/icmpv6_rsolicit.c
index 58e60fdd3d8f292d71ab32fff2cae0ea867ee2d5..db21f7f0a72db98a9610130b34dae868441c8c3b 100644
--- a/net/icmpv6/icmpv6_rsolicit.c
+++ b/net/icmpv6/icmpv6_rsolicit.c
@@ -183,7 +183,7 @@ void icmpv6_rsolicit(FAR struct net_driver_s *dev)
    * outgoing packet.
    */
   dev->d_len += netdev_ipv6_hdrlen(dev);
-  nllvdbg("Outgoing ICMPv6 Router Solicitation length: %d (%d)\n",
+  ninfo("Outgoing ICMPv6 Router Solicitation length: %d (%d)\n",
           dev->d_len, (icmp->len[0] << 8) | icmp->len[1]);
 
 #ifdef CONFIG_NET_STATISTICS
diff --git a/net/icmpv6/icmpv6_solicit.c b/net/icmpv6/icmpv6_solicit.c
index 7e84ccf7d50160d6b0e65ec10e1a431f4896882a..5a9c6e868a7a08cc273b83402c3f268f6eb021ef 100644
--- a/net/icmpv6/icmpv6_solicit.c
+++ b/net/icmpv6/icmpv6_solicit.c
@@ -211,7 +211,7 @@ void icmpv6_solicit(FAR struct net_driver_s *dev,
    * outgoing packet.
    */
   dev->d_len += netdev_ipv6_hdrlen(dev);
-  nllvdbg("Outgoing ICMPv6 Neighbor Solicitation length: %d (%d)\n",
+  ninfo("Outgoing ICMPv6 Neighbor Solicitation length: %d (%d)\n",
           dev->d_len, (icmp->len[0] << 8) | icmp->len[1]);
 
 #ifdef CONFIG_NET_STATISTICS
diff --git a/net/igmp/igmp_group.c b/net/igmp/igmp_group.c
index 92b34427b40636263d9a9d7b729f233c502f188f..a1fe865eb5b77413e00b2eceea1948821a545dd0 100644
--- a/net/igmp/igmp_group.c
+++ b/net/igmp/igmp_group.c
@@ -2,7 +2,7 @@
  * net/igmp/igmp_group.c
  * IGMP group data structure management logic
  *
- *   Copyright (C) 2010, 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010, 2013-2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * The NuttX implementation of IGMP was inspired by the IGMP add-on for the
@@ -55,6 +55,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -88,27 +89,19 @@
 
 #ifdef CONFIG_CPP_HAVE_VARARGS
 #  ifdef IGMP_GRPDEBUG
-#    define grpdbg(format, ...)    ndbg(format, ##__VA_ARGS__)
-#    define grplldbg(format, ...)  nlldbg(format, ##__VA_ARGS__)
-#    define grpvdbg(format, ...)   nvdbg(format, ##__VA_ARGS__)
-#    define grpllvdbg(format, ...) nllvdbg(format, ##__VA_ARGS__)
+#    define grperr(format, ...)    nerr(format, ##__VA_ARGS__)
+#    define grpinfo(format, ...)   ninfo(format, ##__VA_ARGS__)
 #  else
-#    define grpdbg(x...)
-#    define grplldbg(x...)
-#    define grpvdbg(x...)
-#    define grpllvdbg(x...)
+#    define grperr(x...)
+#    define grpinfo(x...)
 #  endif
 #else
 #  ifdef IGMP_GRPDEBUG
-#    define grpdbg    ndbg
-#    define grplldbg  nlldbg
-#    define grpvdbg   nvdbg
-#    define grpllvdbg nllvdbg
+#    define grperr    nerr
+#    define grpinfo   ninfo
 #  else
-#    define grpdbg    (void)
-#    define grplldbg  (void)
-#    define grpvdbg   (void)
-#    define grpllvdbg (void)
+#    define grperr    (void)
+#    define grpinfo   (void)
 #  endif
 #endif
 
@@ -194,7 +187,7 @@ void igmp_grpinit(void)
   FAR struct igmp_group_s *group;
   int i;
 
-  grplldbg("Initializing\n");
+  grpinfo("Initializing\n");
 
 #if CONFIG_PREALLOC_IGMPGROUPS > 0
   for (i = 0; i < CONFIG_PREALLOC_IGMPGROUPS; i++)
@@ -220,26 +213,25 @@ FAR struct igmp_group_s *igmp_grpalloc(FAR struct net_driver_s *dev,
                                        FAR const in_addr_t *addr)
 {
   FAR struct igmp_group_s *group;
-  net_lock_t flags;
 
-  nllvdbg("addr: %08x dev: %p\n", *addr, dev);
+  ninfo("addr: %08x dev: %p\n", *addr, dev);
   if (up_interrupt_context())
     {
 #if CONFIG_PREALLOC_IGMPGROUPS > 0
-      grplldbg("Use a pre-allocated group entry\n");
+      grpinfo("Use a pre-allocated group entry\n");
       group = igmp_grpprealloc();
 #else
-      grplldbg("Cannot allocate from interrupt handler\n");
+      grperr("ERROR: Cannot allocate from interrupt handler\n");
       group = NULL;
 #endif
     }
   else
     {
-      grplldbg("Allocate from the heap\n");
+      grpinfo("Allocate from the heap\n");
       group = igmp_grpheapalloc();
     }
 
-  grplldbg("group: %p\n", group);
+  grpinfo("group: %p\n", group);
 
   /* Check if we successfully allocated a group structure */
 
@@ -248,7 +240,13 @@ FAR struct igmp_group_s *igmp_grpalloc(FAR struct net_driver_s *dev,
       /* Initialize the non-zero elements of the group structure */
 
       net_ipv4addr_copy(group->grpaddr, *addr);
+
+      /* This semaphore is used for signaling and, hence, should not have
+       * priority inheritance enabled.
+       */
+
       sem_init(&group->sem, 0, 0);
+      sem_setprotocol(&group->sem, SEM_PRIO_NONE);
 
       /* Initialize the group timer (but don't start it yet) */
 
@@ -257,12 +255,12 @@ FAR struct igmp_group_s *igmp_grpalloc(FAR struct net_driver_s *dev,
 
       /* Interrupts must be disabled in order to modify the group list */
 
-      flags = net_lock();
+      net_lock();
 
       /* Add the group structure to the list in the device structure */
 
       sq_addfirst((FAR sq_entry_t *)group, &dev->grplist);
-      net_unlock(flags);
+      net_unlock();
     }
 
   return group;
@@ -283,28 +281,27 @@ FAR struct igmp_group_s *igmp_grpfind(FAR struct net_driver_s *dev,
                                       FAR const in_addr_t *addr)
 {
   FAR struct igmp_group_s *group;
-  net_lock_t flags;
 
-  grplldbg("Searching for addr %08x\n", (int)*addr);
+  grpinfo("Searching for addr %08x\n", (int)*addr);
 
   /* We must disable interrupts because we don't which context we were
    * called from.
    */
 
-  flags = net_lock();
+  net_lock();
   for (group = (FAR struct igmp_group_s *)dev->grplist.head;
        group;
        group = group->next)
     {
-      grplldbg("Compare: %08x vs. %08x\n", group->grpaddr, *addr);
+      grpinfo("Compare: %08x vs. %08x\n", group->grpaddr, *addr);
       if (net_ipv4addr_cmp(group->grpaddr, *addr))
         {
-          grplldbg("Match!\n");
+          grpinfo("Match!\n");
           break;
         }
     }
 
-  net_unlock(flags);
+  net_unlock();
   return group;
 }
 
@@ -325,13 +322,13 @@ FAR struct igmp_group_s *igmp_grpallocfind(FAR struct net_driver_s *dev,
 {
   FAR struct igmp_group_s *group = igmp_grpfind(dev, addr);
 
-  grplldbg("group: %p addr: %08x\n", group, (int)*addr);
+  grpinfo("group: %p addr: %08x\n", group, (int)*addr);
   if (!group)
     {
       group = igmp_grpalloc(dev, addr);
     }
 
-  grplldbg("group: %p\n", group);
+  grpinfo("group: %p\n", group);
   return group;
 }
 
@@ -348,13 +345,11 @@ FAR struct igmp_group_s *igmp_grpallocfind(FAR struct net_driver_s *dev,
 
 void igmp_grpfree(FAR struct net_driver_s *dev, FAR struct igmp_group_s *group)
 {
-  net_lock_t flags;
-
-  grplldbg("Free: %p flags: %02x\n", group, group->flags);
+  grpinfo("Free: %p flags: %02x\n", group, group->flags);
 
   /* Cancel the wdog */
 
-  flags = net_lock();
+  net_lock();
   wd_cancel(group->wdog);
 
   /* Remove the group structure from the group list in the device structure */
@@ -376,9 +371,9 @@ void igmp_grpfree(FAR struct net_driver_s *dev, FAR struct igmp_group_s *group)
 #if CONFIG_PREALLOC_IGMPGROUPS > 0
   if (IS_PREALLOCATED(group->flags))
     {
-      grplldbg("Put back on free list\n");
+      grpinfo("Put back on free list\n");
       sq_addlast((FAR sq_entry_t *)group, &g_freelist);
-      net_unlock(flags);
+      net_unlock();
     }
   else
 #endif
@@ -387,8 +382,8 @@ void igmp_grpfree(FAR struct net_driver_s *dev, FAR struct igmp_group_s *group)
        * this function is executing within an interrupt handler.
        */
 
-      net_unlock(flags);
-      grplldbg("Call sched_kfree()\n");
+      net_unlock();
+      grpinfo("Call sched_kfree()\n");
       sched_kfree(group);
     }
 }
diff --git a/net/igmp/igmp_initialize.c b/net/igmp/igmp_initialize.c
index 1a92cb3ecf22bc78341653d73fd55eaf9907ebd0..84dd6f34c15beec55e11619abdb5033b83ada033 100644
--- a/net/igmp/igmp_initialize.c
+++ b/net/igmp/igmp_initialize.c
@@ -84,7 +84,7 @@ in_addr_t g_ipv4_allrouters;
 
 void igmp_initialize(void)
 {
-  nvdbg("IGMP initializing\n");
+  ninfo("IGMP initializing\n");
 
   net_ipaddr(g_ipv4_allrouters, 224, 0, 0, 2);
   net_ipaddr(g_ipv4_allsystems, 224, 0, 0, 1);
@@ -105,7 +105,7 @@ void igmp_initialize(void)
 
 void igmp_devinit(struct net_driver_s *dev)
 {
-  nvdbg("IGMP initializing dev %p\n", dev);
+  ninfo("IGMP initializing dev %p\n", dev);
   DEBUGASSERT(dev->grplist.head == NULL);
 
   /* Add the all systems address to the group */
diff --git a/net/igmp/igmp_input.c b/net/igmp/igmp_input.c
index c2b3c870a38d04bc520f2f105e0ee285dd4af7f7..d89569b5098b36f246d69fb2acb2725d597b3aa4 100644
--- a/net/igmp/igmp_input.c
+++ b/net/igmp/igmp_input.c
@@ -117,14 +117,14 @@ void igmp_input(struct net_driver_s *dev)
   in_addr_t grpaddr;
   unsigned int ticks;
 
-  nllvdbg("IGMP message: %04x%04x\n", IGMPBUF->destipaddr[1], IGMPBUF->destipaddr[0]);
+  ninfo("IGMP message: %04x%04x\n", IGMPBUF->destipaddr[1], IGMPBUF->destipaddr[0]);
 
   /* Verify the message length */
 
   if (dev->d_len < NET_LL_HDRLEN(dev) + IPIGMP_HDRLEN)
     {
       IGMP_STATINCR(g_netstats.igmp.length_errors);
-      nlldbg("Length error\n");
+      nwarn("WARNING: Length error\n");
       return;
     }
 
@@ -133,7 +133,7 @@ void igmp_input(struct net_driver_s *dev)
   if (net_chksum((FAR uint16_t *)&IGMPBUF->type, IGMP_HDRLEN) != 0)
     {
       IGMP_STATINCR(g_netstats.igmp.chksum_errors);
-      nlldbg("Checksum error\n");
+      nwarn("WARNING: Checksum error\n");
       return;
     }
 
@@ -143,7 +143,7 @@ void igmp_input(struct net_driver_s *dev)
   group = igmp_grpallocfind(dev, &destipaddr);
   if (!group)
     {
-      nlldbg("Failed to allocate/find group: %08x\n", destipaddr);
+      nerr("ERROR: Failed to allocate/find group: %08x\n", destipaddr);
       return;
     }
 
@@ -186,13 +186,13 @@ void igmp_input(struct net_driver_s *dev)
 
                 /* This is the general query */
 
-                nllvdbg("General multicast query\n");
+                ninfo("General multicast query\n");
                 if (IGMPBUF->maxresp == 0)
                   {
                     IGMP_STATINCR(g_netstats.igmp.v1_received);
                     IGMPBUF->maxresp = 10;
 
-                    nlldbg("V1 not implemented\n");
+                    nwarn("WARNING: V1 not implemented\n");
                   }
 
                 IGMP_STATINCR(g_netstats.igmp.query_received);
@@ -216,7 +216,7 @@ void igmp_input(struct net_driver_s *dev)
               }
             else /* if (IGMPBUF->grpaddr != 0) */
               {
-                nllvdbg("Group-specific multicast queury\n");
+                ninfo("Group-specific multicast queury\n");
 
                 /* We first need to re-lookup the group since we used dest last time.
                  * Use the incoming IPaddress!
@@ -238,10 +238,10 @@ void igmp_input(struct net_driver_s *dev)
 
         else if (group->grpaddr != 0)
           {
-            nllvdbg("Unicast query\n");
+            ninfo("Unicast query\n");
             IGMP_STATINCR(g_netstats.igmp.ucast_query);
 
-            nlldbg("Query to a specific group with the group address as destination\n");
+            ninfo("Query to a specific group with the group address as destination\n");
 
             ticks = net_dsec2tick((int)IGMPBUF->maxresp);
             if (IS_IDLEMEMBER(group->flags) || igmp_cmptimer(group, ticks))
@@ -254,7 +254,7 @@ void igmp_input(struct net_driver_s *dev)
 
       case IGMPv2_MEMBERSHIP_REPORT:
         {
-          nllvdbg("Membership report\n");
+          ninfo("Membership report\n");
 
           IGMP_STATINCR(g_netstats.igmp.report_received);
           if (!IS_IDLEMEMBER(group->flags))
@@ -270,7 +270,7 @@ void igmp_input(struct net_driver_s *dev)
 
       default:
         {
-          nlldbg("Unexpected msg %02x\n", IGMPBUF->type);
+          nwarn("WARNING: Unexpected msg %02x\n", IGMPBUF->type);
         }
       break;
     }
diff --git a/net/igmp/igmp_join.c b/net/igmp/igmp_join.c
index 83ef65a0f88eea2a6be6317a1aa0c25ead652934..c72ebe3f0ae7d9e5c5de8fa7de1520fa59305fcd 100644
--- a/net/igmp/igmp_join.c
+++ b/net/igmp/igmp_join.c
@@ -129,7 +129,7 @@ int igmp_joingroup(struct net_driver_s *dev, FAR const struct in_addr *grpaddr)
     {
        /* No... allocate a new entry */
 
-       nvdbg("Join to new group: %08x\n", grpaddr->s_addr);
+       ninfo("Join to new group: %08x\n", grpaddr->s_addr);
        group = igmp_grpalloc(dev, &grpaddr->s_addr);
        IGMP_STATINCR(g_netstats.igmp.joins);
 
diff --git a/net/igmp/igmp_leave.c b/net/igmp/igmp_leave.c
index 4035358e8f6e767ab544482f6c32f4a5d91d937f..2b7ee654b3f9cd875dc1173479c1653b01e4c0c7 100644
--- a/net/igmp/igmp_leave.c
+++ b/net/igmp/igmp_leave.c
@@ -127,14 +127,13 @@
 int igmp_leavegroup(struct net_driver_s *dev, FAR const struct in_addr *grpaddr)
 {
   struct igmp_group_s *group;
-  net_lock_t flags;
 
   DEBUGASSERT(dev && grpaddr);
 
   /* Find the entry corresponding to the address leaving the group */
 
   group = igmp_grpfind(dev, &grpaddr->s_addr);
-  ndbg("Leaving group: %p\n", group);
+  ninfo("Leaving group: %p\n", group);
   if (group)
     {
       /* Cancel the timer and discard any queued Membership Reports.  Canceling
@@ -143,11 +142,11 @@ int igmp_leavegroup(struct net_driver_s *dev, FAR const struct in_addr *grpaddr)
        * could interfere with the Leave Group.
        */
 
-      flags = net_lock();
+      net_lock();
       wd_cancel(group->wdog);
       CLR_SCHEDMSG(group->flags);
       CLR_WAITMSG(group->flags);
-      net_unlock(flags);
+      net_unlock();
 
       IGMP_STATINCR(g_netstats.igmp.leaves);
 
@@ -155,7 +154,7 @@ int igmp_leavegroup(struct net_driver_s *dev, FAR const struct in_addr *grpaddr)
 
       if (IS_LASTREPORT(group->flags))
         {
-          ndbg("Schedule Leave Group message\n");
+          ninfo("Schedule Leave Group message\n");
           IGMP_STATINCR(g_netstats.igmp.leave_sched);
           igmp_waitmsg(group, IGMP_LEAVE_GROUP);
         }
@@ -172,7 +171,7 @@ int igmp_leavegroup(struct net_driver_s *dev, FAR const struct in_addr *grpaddr)
 
   /* Return ENOENT if the address is not a member of the group */
 
-  nvdbg("Return -ENOENT\n");
+  ninfo("Return -ENOENT\n");
   return -ENOENT;
 }
 
diff --git a/net/igmp/igmp_mcastmac.c b/net/igmp/igmp_mcastmac.c
index 2172a281ec9b89ac6b47b91a9bbc5fb56d83107d..88c12a8cb7de69e023aa6ce58443db72d7fa8af6 100644
--- a/net/igmp/igmp_mcastmac.c
+++ b/net/igmp/igmp_mcastmac.c
@@ -79,7 +79,7 @@ static void igmp_mcastmac(in_addr_t *ip, FAR uint8_t *mac)
   mac[4] = ip4_addr3(*ip);
   mac[5] = ip4_addr4(*ip);
 
-  nvdbg("IP: %08x -> MAC: %02x%02x%02x%02x%02x%02x\n",
+  ninfo("IP: %08x -> MAC: %02x%02x%02x%02x%02x%02x\n",
         *ip, mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 }
 
@@ -99,7 +99,7 @@ void igmp_addmcastmac(FAR struct net_driver_s *dev, FAR in_addr_t *ip)
 {
   uint8_t mcastmac[6];
 
-  nvdbg("Adding: IP %08x\n", *ip);
+  ninfo("Adding: IP %08x\n", *ip);
   if (dev->d_addmac)
     {
       igmp_mcastmac(ip, mcastmac);
@@ -119,7 +119,7 @@ void igmp_removemcastmac(FAR struct net_driver_s *dev, FAR in_addr_t *ip)
 {
   uint8_t mcastmac[6];
 
-  nvdbg("Removing: IP %08x\n", *ip);
+  ninfo("Removing: IP %08x\n", *ip);
   if (dev->d_rmmac)
     {
       igmp_mcastmac(ip, mcastmac);
diff --git a/net/igmp/igmp_msg.c b/net/igmp/igmp_msg.c
index 3fd56fc3814ddb19d870191df5f742437a7e9c9b..0b5065f3ec857e43bc2ebe3539db7ad4a700f7eb 100644
--- a/net/igmp/igmp_msg.c
+++ b/net/igmp/igmp_msg.c
@@ -72,15 +72,13 @@
 
 void igmp_schedmsg(FAR struct igmp_group_s *group, uint8_t msgid)
 {
-  net_lock_t flags;
-
   /* The following should be atomic */
 
-  flags = net_lock();
+  net_lock();
   DEBUGASSERT(!IS_SCHEDMSG(group->flags));
   group->msgid = msgid;
   SET_SCHEDMSG(group->flags);
-  net_unlock(flags);
+  net_unlock();
 }
 
 /****************************************************************************
@@ -98,11 +96,9 @@ void igmp_schedmsg(FAR struct igmp_group_s *group, uint8_t msgid)
 
 void igmp_waitmsg(FAR struct igmp_group_s *group, uint8_t msgid)
 {
-  net_lock_t flags;
-
   /* Schedule to send the message */
 
-  flags = net_lock();
+  net_lock();
   DEBUGASSERT(!IS_WAITMSG(group->flags));
   SET_WAITMSG(group->flags);
   igmp_schedmsg(group, msgid);
@@ -126,7 +122,7 @@ void igmp_waitmsg(FAR struct igmp_group_s *group, uint8_t msgid)
   /* The message has been sent and we are no longer waiting */
 
   CLR_WAITMSG(group->flags);
-  net_unlock(flags);
+  net_unlock();
 }
 
 #endif /* CONFIG_NET_IGMP */
diff --git a/net/igmp/igmp_poll.c b/net/igmp/igmp_poll.c
index e7dfd1068399b0dcfcb95c2ef596e48c110db9b5..0fe705868fa3abde0689c3e87c80d70ad911826d 100644
--- a/net/igmp/igmp_poll.c
+++ b/net/igmp/igmp_poll.c
@@ -87,8 +87,8 @@ static inline void igmp_sched_send(FAR struct net_driver_s *dev,
   if (group->msgid == IGMPv2_MEMBERSHIP_REPORT)
     {
       dest = &group->grpaddr;
-      nllvdbg("Send IGMPv2_MEMBERSHIP_REPORT, dest=%08x flags=%02x\n",
-               *dest, group->flags);
+      ninfo("Send IGMPv2_MEMBERSHIP_REPORT, dest=%08x flags=%02x\n",
+             *dest, group->flags);
       IGMP_STATINCR(g_netstats.igmp.report_sched);
       SET_LASTREPORT(group->flags); /* Remember we were the last to report */
     }
@@ -96,8 +96,8 @@ static inline void igmp_sched_send(FAR struct net_driver_s *dev,
     {
       DEBUGASSERT(group->msgid == IGMP_LEAVE_GROUP);
       dest = &g_ipv4_allrouters;
-      nllvdbg("Send IGMP_LEAVE_GROUP, dest=%08x flags=%02x\n",
-               *dest, group->flags);
+      ninfo("Send IGMP_LEAVE_GROUP, dest=%08x flags=%02x\n",
+             *dest, group->flags);
       IGMP_STATINCR(g_netstats.igmp.leave_sched);
     }
 
@@ -114,7 +114,7 @@ static inline void igmp_sched_send(FAR struct net_driver_s *dev,
 
   if (IS_WAITMSG(group->flags))
     {
-      nllvdbg("Awakening waiter\n");
+      ninfo("Awakening waiter\n");
       sem_post(&group->sem);
     }
 }
@@ -143,7 +143,7 @@ void igmp_poll(FAR struct net_driver_s *dev)
 {
   FAR struct igmp_group_s *group;
 
-  nllvdbg("Entry\n");
+  ninfo("Entry\n");
 
   /* Setup the poll operation */
 
diff --git a/net/igmp/igmp_send.c b/net/igmp/igmp_send.c
index d40301495a0b73e91bc8a42220aca43c4f006142..7e51068ab252ddfeb33e1ad42ffcc71907a0358e 100644
--- a/net/igmp/igmp_send.c
+++ b/net/igmp/igmp_send.c
@@ -116,7 +116,7 @@ static uint16_t igmp_chksum(FAR uint8_t *buffer, int buflen)
 void igmp_send(FAR struct net_driver_s *dev, FAR struct igmp_group_s *group,
                FAR in_addr_t *destipaddr)
 {
-  nllvdbg("msgid: %02x destipaddr: %08x\n", group->msgid, (int)*destipaddr);
+  ninfo("msgid: %02x destipaddr: %08x\n", group->msgid, (int)*destipaddr);
 
   /* The total length to send is the size of the IP and IGMP headers and 4
    * bytes for the ROUTER ALERT (and, eventually, the Ethernet header)
@@ -169,7 +169,7 @@ void igmp_send(FAR struct net_driver_s *dev, FAR struct igmp_group_s *group,
   IGMP_STATINCR(g_netstats.igmp.poll_send);
   IGMP_STATINCR(g_netstats.ipv4.sent);
 
-  nllvdbg("Outgoing IGMP packet length: %d (%d)\n",
+  ninfo("Outgoing IGMP packet length: %d (%d)\n",
           dev->d_len, (IGMPBUF->len[0] << 8) | IGMPBUF->len[1]);
   igmp_dumppkt(RA, IPIGMP_HDRLEN + RASIZE);
 }
diff --git a/net/igmp/igmp_timer.c b/net/igmp/igmp_timer.c
index 5465a68f72ccb5176e8389d27c0807c0434522d3..9019376a4e561c53478791d4ce03633f3f0b4184 100644
--- a/net/igmp/igmp_timer.c
+++ b/net/igmp/igmp_timer.c
@@ -73,27 +73,19 @@
 
 #ifdef CONFIG_CPP_HAVE_VARARGS
 #  ifdef IGMP_GTMRDEBUG
-#    define gtmrdbg(format, ...)    ndbg(format, ##__VA_ARGS__)
-#    define gtmrlldbg(format, ...)  nlldbg(format, ##__VA_ARGS__)
-#    define gtmrvdbg(format, ...)   nvdbg(format, ##__VA_ARGS__)
-#    define gtmrllvdbg(format, ...) nllvdbg(format, ##__VA_ARGS__)
+#    define gtmrerr(format, ...)    nerr(format, ##__VA_ARGS__)
+#    define gtmrinfo(format, ...)   ninfo(format, ##__VA_ARGS__)
 #  else
-#    define gtmrdbg(x...)
-#    define gtmrlldbg(x...)
-#    define gtmrvdbg(x...)
-#    define gtmrllvdbg(x...)
+#    define gtmrerr(x...)
+#    define gtmrinfo(x...)
 #  endif
 #else
 #  ifdef IGMP_GTMRDEBUG
-#    define gtmrdbg    ndbg
-#    define gtmrlldbg  nlldbg
-#    define gtmrvdbg   nvdbg
-#    define gtmrllvdbg nllvdbg
+#    define gtmrerr    nerr
+#    define gtmrinfo   ninfo
 #  else
-#    define gtmrdbg    (void)
-#    define gtmrlldbg  (void)
-#    define gtmrvdbg   (void)
-#    define gtmrllvdbg (void)
+#    define gtmrerr    (void)
+#    define gtmrinfo   (void)
 #  endif
 #endif
 
@@ -119,7 +111,7 @@ static void igmp_timeout(int argc, uint32_t arg, ...)
 
   /* If the state is DELAYING_MEMBER then we send a report for this group */
 
-  nllvdbg("Timeout!\n");
+  ninfo("Timeout!\n");
   group = (FAR struct igmp_group_s *)arg;
   DEBUGASSERT(argc == 1 && group);
 
@@ -170,7 +162,7 @@ void igmp_startticks(FAR struct igmp_group_s *group, unsigned int ticks)
 
   /* Start the timer */
 
-  gtmrlldbg("ticks: %d\n", ticks);
+  gtmrinfo("ticks: %d\n", ticks);
 
   ret = wd_start(group->wdog, ticks, igmp_timeout, 1, (uint32_t)group);
 
@@ -184,7 +176,7 @@ void igmp_starttimer(FAR struct igmp_group_s *group, uint8_t decisecs)
    * Important!! this should be a random timer from 0 to decisecs
    */
 
-  gtmrdbg("decisecs: %d\n", decisecs);
+  gtmrinfo("decisecs: %d\n", decisecs);
   igmp_startticks(group, net_dsec2tick(decisecs));
 }
 
@@ -204,14 +196,13 @@ void igmp_starttimer(FAR struct igmp_group_s *group, uint8_t decisecs)
 
 bool igmp_cmptimer(FAR struct igmp_group_s *group, int maxticks)
 {
-  net_lock_t flags;
   int remaining;
 
   /* Disable interrupts so that there is no race condition with the actual
    * timer expiration.
    */
 
-  flags = net_lock();
+  net_lock();
 
   /* Get the timer remaining on the watchdog.  A time of <= zero means that
    * the watchdog was never started.
@@ -224,17 +215,17 @@ bool igmp_cmptimer(FAR struct igmp_group_s *group, int maxticks)
    * test as well.
    */
 
-  gtmrdbg("maxticks: %d remaining: %d\n", maxticks, remaining);
+  gtmrinfo("maxticks: %d remaining: %d\n", maxticks, remaining);
   if (maxticks > remaining)
     {
       /* Cancel the watchdog timer and return true */
 
       wd_cancel(group->wdog);
-      net_unlock(flags);
+      net_unlock();
       return true;
     }
 
-  net_unlock(flags);
+  net_unlock();
   return false;
 }
 
diff --git a/net/iob/Kconfig b/net/iob/Kconfig
index e6018d64263929cb039b102c01f90724d1f3ee22..a5cec7e1178986efac13f30dabfc83d3da29010b 100644
--- a/net/iob/Kconfig
+++ b/net/iob/Kconfig
@@ -63,7 +63,7 @@ config IOB_THROTTLE
 config IOB_DEBUG
 	bool "Force I/O buffer debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_FEATURES
 	---help---
 		This option will force debug output from I/O buffer logic,
 		even without network debug output.  This is not normally something
diff --git a/net/iob/Make.defs b/net/iob/Make.defs
index 27827cff49876eb463ae004cbb14e6f7c6d3a44a..7f5f1d665b32cf0e5e1ede9dd31178bb9e24bd84 100644
--- a/net/iob/Make.defs
+++ b/net/iob/Make.defs
@@ -43,7 +43,7 @@ NET_CSRCS += iob_free_chain.c iob_free_qentry.c iob_free_queue.c
 NET_CSRCS += iob_initialize.c iob_pack.c iob_peek_queue.c iob_remove_queue.c
 NET_CSRCS += iob_trimhead.c iob_trimhead_queue.c iob_trimtail.c
 
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
 NET_CSRCS += iob_dump.c
 endif
 
diff --git a/net/iob/iob_add_queue.c b/net/iob/iob_add_queue.c
index bc7e0adb8e48442d9dcdb199d9fbd349bd41bf47..b59646ef8d4996194df4a761d9f200a506a4e075 100644
--- a/net/iob/iob_add_queue.c
+++ b/net/iob/iob_add_queue.c
@@ -39,7 +39,7 @@
 
 #include 
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_IOB_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_IOB_DEBUG)
 /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
@@ -125,7 +125,7 @@ int iob_add_queue(FAR struct iob_s *iob, FAR struct iob_queue_s *iobq)
   qentry = iob_alloc_qentry();
   if (!qentry)
     {
-      ndbg("ERROR: Failed to allocate a container\n");
+      nerr("ERROR: Failed to allocate a container\n");
       return -ENOMEM;
     }
 
@@ -150,7 +150,7 @@ int iob_tryadd_queue(FAR struct iob_s *iob, FAR struct iob_queue_s *iobq)
   qentry = iob_tryalloc_qentry();
   if (!qentry)
     {
-      nlldbg("ERROR: Failed to allocate a container\n");
+      nerr("ERROR: Failed to allocate a container\n");
       return -ENOMEM;
     }
 
diff --git a/net/iob/iob_alloc.c b/net/iob/iob_alloc.c
index e5483a2c3e68365caf75ba1a58f954e9316faaee..4b43320fcd79d9bff220374bff5695da83283f7b 100644
--- a/net/iob/iob_alloc.c
+++ b/net/iob/iob_alloc.c
@@ -39,7 +39,7 @@
 
 #include 
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_IOB_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_IOB_DEBUG)
 /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
diff --git a/net/iob/iob_alloc_qentry.c b/net/iob/iob_alloc_qentry.c
index c1a9f54a97364ee13a59d32490472c88746904c9..5ba2e6205a0e9ff075af4ba600f19e6d8b12f424 100644
--- a/net/iob/iob_alloc_qentry.c
+++ b/net/iob/iob_alloc_qentry.c
@@ -39,7 +39,7 @@
 
 #include 
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_IOB_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_IOB_DEBUG)
 /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
diff --git a/net/iob/iob_clone.c b/net/iob/iob_clone.c
index db29abde2421070e35d869a3d9c312b23c6ebe01..44acbb5f602a008d70d656139b2b1841aac91cdd 100644
--- a/net/iob/iob_clone.c
+++ b/net/iob/iob_clone.c
@@ -39,7 +39,7 @@
 
 #include 
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_IOB_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_IOB_DEBUG)
 /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
@@ -146,7 +146,7 @@ int iob_clone(FAR struct iob_s *iob1, FAR struct iob_s *iob2, bool throttled)
 
               iob1 = iob1->io_flink;
             }
-          while (iob1->io_len <= 0);
+          while (iob1 && iob1->io_len <= 0);
 
           /* Reset the offset to the beginning of the I/O buffer */
 
@@ -168,7 +168,7 @@ int iob_clone(FAR struct iob_s *iob1, FAR struct iob_s *iob2, bool throttled)
           next = iob_alloc(throttled);
           if (!next)
             {
-              ndbg("Failed to allocate an I/O buffer/n");
+              nerr("ERROR: Failed to allocate an I/O buffer/n");
               return -ENOMEM;
             }
 
diff --git a/net/iob/iob_concat.c b/net/iob/iob_concat.c
index b543d63e6cc55915d882e54b5171a2eb8d86e896..99fff8e75a88a48fc61285323b20a192623c8e4f 100644
--- a/net/iob/iob_concat.c
+++ b/net/iob/iob_concat.c
@@ -39,7 +39,7 @@
 
 #include 
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_IOB_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_IOB_DEBUG)
 /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
diff --git a/net/iob/iob_contig.c b/net/iob/iob_contig.c
index 749e72a0c76399def0fd298bb9803ec905524ec0..c7b948f25e177ed76def7b5713e685c0105adddf 100644
--- a/net/iob/iob_contig.c
+++ b/net/iob/iob_contig.c
@@ -39,7 +39,7 @@
 
 #include 
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_IOB_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_IOB_DEBUG)
 /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
@@ -161,7 +161,7 @@ int iob_contig(FAR struct iob_s *iob, unsigned int len)
 
   else
     {
-      ndbg("ERROR: pktlen=%u < requested len=%u\n", iob->io_pktlen, len);
+      nerr("ERROR: pktlen=%u < requested len=%u\n", iob->io_pktlen, len);
       return -ENOSPC;
     }
 }
diff --git a/net/iob/iob_copyin.c b/net/iob/iob_copyin.c
index c5030c91c56dc28762dea1348dbbbde9196de1ae..3507bc50048751d7830ab417742794059a1e2054 100644
--- a/net/iob/iob_copyin.c
+++ b/net/iob/iob_copyin.c
@@ -39,7 +39,7 @@
 
 #include 
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_IOB_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_IOB_DEBUG)
 /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
@@ -97,14 +97,14 @@ static int iob_copyin_internal(FAR struct iob_s *iob, FAR const uint8_t *src,
   unsigned int avail;
   unsigned int total = len;
 
-  nllvdbg("iob=%p len=%u offset=%u\n", iob, len, offset);
+  ninfo("iob=%p len=%u offset=%u\n", iob, len, offset);
   DEBUGASSERT(iob && src);
 
   /* The offset must applied to data that is already in the I/O buffer chain */
 
   if (offset > iob->io_pktlen)
     {
-      ndbg("ERROR: offset is past the end of data: %u > %u\n",
+      nerr("ERROR: offset is past the end of data: %u > %u\n",
            offset, iob->io_pktlen);
       return -ESPIPE;
     }
@@ -130,7 +130,7 @@ static int iob_copyin_internal(FAR struct iob_s *iob, FAR const uint8_t *src,
       dest  = &iob->io_data[iob->io_offset + offset];
       avail = iob->io_len - offset;
 
-      nllvdbg("iob=%p avail=%u len=%u next=%p\n", iob, avail, len, next);
+      ninfo("iob=%p avail=%u len=%u next=%p\n", iob, avail, len, next);
 
       /* Will the rest of the copy fit into this buffer, overwriting
        * existing data.
@@ -187,8 +187,8 @@ static int iob_copyin_internal(FAR struct iob_s *iob, FAR const uint8_t *src,
       /* Copy from the user buffer to the I/O buffer.  */
 
       memcpy(dest, src, ncopy);
-      nllvdbg("iob=%p Copy %u bytes new len=%u\n",
-              iob, ncopy, iob->io_len);
+      ninfo("iob=%p Copy %u bytes new len=%u\n",
+            iob, ncopy, iob->io_len);
 
       /* Adjust the total length of the copy and the destination address in
        * the user buffer.
@@ -220,14 +220,14 @@ static int iob_copyin_internal(FAR struct iob_s *iob, FAR const uint8_t *src,
 
           if (next == NULL)
             {
-              ndbg("ERROR: Failed to allocate I/O buffer\n");
+              nerr("ERROR: Failed to allocate I/O buffer\n");
               return len;
             }
 
           /* Add the new, empty I/O buffer to the end of the buffer chain. */
 
           iob->io_flink = next;
-          nllvdbg("iob=%p added to the chain\n", iob);
+          ninfo("iob=%p added to the chain\n", iob);
         }
 
       iob = next;
diff --git a/net/iob/iob_copyout.c b/net/iob/iob_copyout.c
index 2cb0a10be6248f0176cc0f52d17c1fdc07c1ca98..b250cc5601d4bf6a0e6b91612945b498733e7d55 100644
--- a/net/iob/iob_copyout.c
+++ b/net/iob/iob_copyout.c
@@ -39,7 +39,7 @@
 
 #include 
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_IOB_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_IOB_DEBUG)
 /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
diff --git a/net/iob/iob_dump.c b/net/iob/iob_dump.c
index a34dc1ca2aea3510598eb983c90560501dc6319a..2be0198a5bdc4963dc3fdf4196c5272840f2d9b2 100644
--- a/net/iob/iob_dump.c
+++ b/net/iob/iob_dump.c
@@ -44,7 +44,7 @@
 
 #include 
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 
 /****************************************************************************
  * Pre-processor definitions
@@ -77,13 +77,13 @@ void iob_dump(FAR const char *msg, FAR struct iob_s *iob, unsigned int len,
   unsigned int cndx;
 
   head = iob;
-  lowsyslog(LOG_DEBUG, "%s: iob=%p pktlen=%d\n", msg, head, head->io_pktlen);
+  syslog(LOG_DEBUG, "%s: iob=%p pktlen=%d\n", msg, head, head->io_pktlen);
 
   /* Check if the offset is beyond the data in the I/O buffer chain */
 
   if (offset > head->io_pktlen)
     {
-      ndbg("ERROR: offset is past the end of data: %u > %u\n",
+      nerr("ERROR: offset is past the end of data: %u > %u\n",
            offset, head->io_pktlen);
       return;
     }
@@ -92,8 +92,8 @@ void iob_dump(FAR const char *msg, FAR struct iob_s *iob, unsigned int len,
 
   for (; iob; iob = iob->io_flink)
     {
-      lowsyslog(LOG_DEBUG, "  iob=%p len=%d offset=%d\n",
-                iob, iob->io_len, iob->io_offset);
+      syslog(LOG_DEBUG, "  iob=%p len=%d offset=%d\n",
+             iob, iob->io_len, iob->io_offset);
     }
 
   /* Get the amount of data to be displayed, limited by the amount that we
@@ -117,49 +117,49 @@ void iob_dump(FAR const char *msg, FAR struct iob_s *iob, unsigned int len,
 
       if (nbytes > 0)
         {
-          lowsyslog(LOG_DEBUG, "  %04x: ", offset);
+          syslog(LOG_DEBUG, "  %04x: ", offset);
 
           for (cndx = 0; cndx < 32; cndx++)
             {
               if (cndx == 16)
                 {
-                  lowsyslog(LOG_DEBUG, " ");
+                  syslog(LOG_DEBUG, " ");
                 }
 
               if ((lndx + cndx) < len)
                 {
-                  lowsyslog(LOG_DEBUG, "%02x", data[cndx]);
+                  syslog(LOG_DEBUG, "%02x", data[cndx]);
                 }
               else
                 {
-                  lowsyslog(LOG_DEBUG, "  ");
+                  syslog(LOG_DEBUG, "  ");
                 }
             }
 
-          lowsyslog(LOG_DEBUG, " ");
+          syslog(LOG_DEBUG, " ");
           for (cndx = 0; cndx < 32; cndx++)
             {
               if (cndx == 16)
                 {
-                  lowsyslog(LOG_DEBUG, " ");
+                  syslog(LOG_DEBUG, " ");
                 }
 
               if ((lndx + cndx) < len)
                 {
                   if (data[cndx] >= 0x20 && data[cndx] < 0x7f)
                     {
-                      lowsyslog(LOG_DEBUG, "%c", data[cndx]);
+                      syslog(LOG_DEBUG, "%c", data[cndx]);
                     }
                   else
                     {
-                      lowsyslog(LOG_DEBUG, ".");
+                      syslog(LOG_DEBUG, ".");
                     }
                 }
             }
 
-          lowsyslog(LOG_DEBUG, "\n");
+          syslog(LOG_DEBUG, "\n");
         }
     }
 }
 
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_FEATURES */
diff --git a/net/iob/iob_free.c b/net/iob/iob_free.c
index 53d8f6fb1de636d35f45031bb852da29adf2a3ba..38eb5fb3458d469d0fc04e0756e69a617bf75188 100644
--- a/net/iob/iob_free.c
+++ b/net/iob/iob_free.c
@@ -39,7 +39,7 @@
 
 #include 
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_IOB_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_IOB_DEBUG)
 /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
@@ -74,8 +74,8 @@ FAR struct iob_s *iob_free(FAR struct iob_s *iob)
   FAR struct iob_s *next = iob->io_flink;
   irqstate_t flags;
 
-  nllvdbg("iob=%p io_pktlen=%u io_len=%u next=%p\n",
-          iob, iob->io_pktlen, iob->io_len, next);
+  ninfo("iob=%p io_pktlen=%u io_len=%u next=%p\n",
+        iob, iob->io_pktlen, iob->io_len, next);
 
   /* Copy the data that only exists in the head of a I/O buffer chain into
    * the next entry.
@@ -104,8 +104,8 @@ FAR struct iob_s *iob_free(FAR struct iob_s *iob)
           DEBUGASSERT(next->io_len == 0 && next->io_flink == NULL);
         }
 
-      nllvdbg("next=%p io_pktlen=%u io_len=%u\n",
-               next, next->io_pktlen, next->io_len);
+      ninfo("next=%p io_pktlen=%u io_len=%u\n",
+            next, next->io_pktlen, next->io_len);
     }
 
   /* Free the I/O buffer by adding it to the head of the free list. We don't
diff --git a/net/iob/iob_free_chain.c b/net/iob/iob_free_chain.c
index 810622e8288ff9c9c098325a2a734dcb402de729..6f5d4d4ba128a023437084f43b1458715d45b8e3 100644
--- a/net/iob/iob_free_chain.c
+++ b/net/iob/iob_free_chain.c
@@ -39,7 +39,7 @@
 
 #include 
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_IOB_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_IOB_DEBUG)
 /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
diff --git a/net/iob/iob_free_qentry.c b/net/iob/iob_free_qentry.c
index e663d8a2ea2baf75e6c675463a8b18f1c0e9f56c..66cccb99471dce0dddbe1419bc600a712e0452df 100644
--- a/net/iob/iob_free_qentry.c
+++ b/net/iob/iob_free_qentry.c
@@ -39,7 +39,7 @@
 
 #include 
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_IOB_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_IOB_DEBUG)
 /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
diff --git a/net/iob/iob_free_queue.c b/net/iob/iob_free_queue.c
index 91ded4f42c4b23ee2e9dfaf25a82f52ecd0f3a7d..5a4a52513dfeaa4de0652c24553489da47a2fa77 100644
--- a/net/iob/iob_free_queue.c
+++ b/net/iob/iob_free_queue.c
@@ -39,7 +39,7 @@
 
 #include 
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_IOB_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_IOB_DEBUG)
 /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
diff --git a/net/iob/iob_initialize.c b/net/iob/iob_initialize.c
index d63d957219fcd4c90fe99c4208d796784d9557bc..9bae90b0e437c9edebeedb2435d2e5eae2b7d628 100644
--- a/net/iob/iob_initialize.c
+++ b/net/iob/iob_initialize.c
@@ -39,7 +39,7 @@
 
 #include 
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_IOB_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_IOB_DEBUG)
 /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
diff --git a/net/iob/iob_pack.c b/net/iob/iob_pack.c
index 660b31d4a85e33449966cb437ff2f27233eca609..2df9300ece15193e37f7d8af00a07bf71dc625f9 100644
--- a/net/iob/iob_pack.c
+++ b/net/iob/iob_pack.c
@@ -39,7 +39,7 @@
 
 #include 
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_IOB_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_IOB_DEBUG)
 /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
diff --git a/net/iob/iob_peek_queue.c b/net/iob/iob_peek_queue.c
index c49fb1ecbf93f2b8b45663daca7654165ff020dc..3422d65d60c0da91723a0781ed3a494fea08f178 100644
--- a/net/iob/iob_peek_queue.c
+++ b/net/iob/iob_peek_queue.c
@@ -39,7 +39,7 @@
 
 #include 
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_IOB_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_IOB_DEBUG)
 /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
diff --git a/net/iob/iob_remove_queue.c b/net/iob/iob_remove_queue.c
index e134bcd0160625c42d2aa98381733a9681191330..4d8a45a38149a7bbf58f51a9f53ecad5b311f517 100644
--- a/net/iob/iob_remove_queue.c
+++ b/net/iob/iob_remove_queue.c
@@ -39,7 +39,7 @@
 
 #include 
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_IOB_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_IOB_DEBUG)
 /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
diff --git a/net/iob/iob_trimhead.c b/net/iob/iob_trimhead.c
index 70a5359603f09aceaae1fc8e6a0867ded4e306ae..c11cfa43b99998b3f206c025c750eadaa76b01bc 100644
--- a/net/iob/iob_trimhead.c
+++ b/net/iob/iob_trimhead.c
@@ -39,7 +39,7 @@
 
 #include 
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_IOB_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_IOB_DEBUG)
 /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
@@ -78,7 +78,7 @@ FAR struct iob_s *iob_trimhead(FAR struct iob_s *iob, unsigned int trimlen)
 {
   uint16_t pktlen;
 
-  nllvdbg("iob=%p trimlen=%d\n", iob, trimlen);
+  ninfo("iob=%p trimlen=%d\n", iob, trimlen);
 
   if (iob && trimlen > 0)
     {
@@ -89,8 +89,8 @@ FAR struct iob_s *iob_trimhead(FAR struct iob_s *iob, unsigned int trimlen)
         {
           /* Do we trim this entire I/O buffer away? */
 
-          nllvdbg("iob=%p io_len=%d pktlen=%d trimlen=%d\n",
-                  iob, iob->io_len, pktlen, trimlen);
+          ninfo("iob=%p io_len=%d pktlen=%d trimlen=%d\n",
+                iob, iob->io_len, pktlen, trimlen);
 
           if (iob->io_len <= trimlen)
             {
@@ -120,7 +120,7 @@ FAR struct iob_s *iob_trimhead(FAR struct iob_s *iob, unsigned int trimlen)
 
               /* Free this entry and set the next I/O buffer as the head */
 
-              nllvdbg("iob=%p: Freeing\n", iob);
+              ninfo("iob=%p: Freeing\n", iob);
               (void)iob_free(iob);
               iob = next;
             }
diff --git a/net/iob/iob_trimhead_queue.c b/net/iob/iob_trimhead_queue.c
index 24b98783215e6292f54bc606591f642282b48163..791892d7380fa22c6107a88b5e0f0f7c18576a3e 100644
--- a/net/iob/iob_trimhead_queue.c
+++ b/net/iob/iob_trimhead_queue.c
@@ -39,7 +39,7 @@
 
 #include 
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_IOB_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_IOB_DEBUG)
 /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
diff --git a/net/iob/iob_trimtail.c b/net/iob/iob_trimtail.c
index 6965fe3da5f1c7bc05513fb5dd35440f26b2420e..039e3c6db7c31106ed427a1f0f9a139ac54014a5 100644
--- a/net/iob/iob_trimtail.c
+++ b/net/iob/iob_trimtail.c
@@ -39,7 +39,7 @@
 
 #include 
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_IOB_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_IOB_DEBUG)
 /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
@@ -72,7 +72,7 @@ FAR struct iob_s *iob_trimtail(FAR struct iob_s *iob, unsigned int trimlen)
   FAR struct iob_s *last;
   int len;
 
-  nlldbg("iob=%p pktlen=%d trimlen=%d\n", iob, iob->io_pktlen, trimlen);
+  ninfo("iob=%p pktlen=%d trimlen=%d\n", iob, iob->io_pktlen, trimlen);
 
   if (iob && trimlen > 0)
     {
@@ -101,7 +101,7 @@ FAR struct iob_s *iob_trimtail(FAR struct iob_s *iob, unsigned int trimlen)
            * I/O buffer away?
            */
 
-          nllvdbg("iob=%p len=%d vs %d\n", last, last->io_len, len);
+          ninfo("iob=%p len=%d vs %d\n", last, last->io_len, len);
           if (last->io_len <= len)
             {
               /* Yes.. Consume the entire buffer */
diff --git a/net/local/Kconfig b/net/local/Kconfig
index 144844a63755a13b1c3e17417d02781e53b1c6dc..3125ab34a51cd2dbae0c8f697cdd58ff49b4d785 100644
--- a/net/local/Kconfig
+++ b/net/local/Kconfig
@@ -9,6 +9,7 @@ menu "Unix Domain Socket Support"
 config NET_LOCAL
 	bool "Unix domain (local) sockets"
 	default n
+	select PIPES
 	---help---
 		Enable or disable Unix domain (aka Local) sockets.
 
diff --git a/net/local/local_accept.c b/net/local/local_accept.c
index d26fc74813d920caed5cbd35f5f313527ea02437..e148e3e60fc839c4cf522f1213ba204860c537ef 100644
--- a/net/local/local_accept.c
+++ b/net/local/local_accept.c
@@ -156,7 +156,7 @@ int psock_local_accept(FAR struct socket *psock, FAR struct sockaddr *addr,
           conn = local_alloc();
           if (!conn)
             {
-              ndbg("ERROR:  Failed to allocate new connection structure\n");
+              nerr("ERROR:  Failed to allocate new connection structure\n");
               ret = -ENOMEM;
             }
           else
@@ -180,7 +180,7 @@ int psock_local_accept(FAR struct socket *psock, FAR struct sockaddr *addr,
                                          _SS_ISNONBLOCK(psock->s_flags));
               if (ret < 0)
                 {
-                   ndbg("ERROR: Failed to open write-only FIFOs for %s: %d\n",
+                   nerr("ERROR: Failed to open write-only FIFOs for %s: %d\n",
                         conn->lc_path, ret);
                 }
             }
@@ -200,7 +200,7 @@ int psock_local_accept(FAR struct socket *psock, FAR struct sockaddr *addr,
                                          _SS_ISNONBLOCK(psock->s_flags));
               if (ret < 0)
                 {
-                   ndbg("ERROR: Failed to open read-only FIFOs for %s: %d\n",
+                   nerr("ERROR: Failed to open read-only FIFOs for %s: %d\n",
                         conn->lc_path, ret);
                 }
             }
diff --git a/net/local/local_conn.c b/net/local/local_conn.c
index a369f04b7cb08d0cc7d5c19a0c6b589b4d4b3d71..e70f8df7aba201daac48dbe82668596e142f7ae3 100644
--- a/net/local/local_conn.c
+++ b/net/local/local_conn.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * net/local/local_conn.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -48,6 +48,7 @@
 #include 
 
 #include 
+#include 
 
 #include "local/local.h"
 
@@ -92,8 +93,15 @@ FAR struct local_conn_s *local_alloc(void)
 
       conn->lc_infd  = -1;
       conn->lc_outfd = -1;
+
 #ifdef CONFIG_NET_LOCAL_STREAM
+      /* This semaphore is used for signaling and, hence, should not have
+       * priority inheritance enabled.
+       */
+
       sem_init(&conn->lc_waitsem, 0, 0);
+      sem_setprotocol(&conn->lc_waitsem, SEM_PRIO_NONE);
+
 #ifdef HAVE_LOCAL_POLL
       memset(conn->lc_accept_fds, 0, sizeof(conn->lc_accept_fds));
 #endif
diff --git a/net/local/local_connect.c b/net/local/local_connect.c
index 1eab7220835e9c4a35b9b1306876d8b430227665..53dd3219055629c6c1286a09dcb71172d7b4a2e0 100644
--- a/net/local/local_connect.c
+++ b/net/local/local_connect.c
@@ -123,7 +123,7 @@ static inline void _local_semtake(sem_t *sem)
 
 int inline local_stream_connect(FAR struct local_conn_s *client,
                                 FAR struct local_conn_s *server,
-                                bool nonblock, net_lock_t state)
+                                bool nonblock)
 {
   int ret;
 
@@ -135,10 +135,10 @@ int inline local_stream_connect(FAR struct local_conn_s *client,
   if (server->lc_state != LOCAL_STATE_LISTENING ||
       server->u.server.lc_pending >= server->u.server.lc_backlog)
     {
-      net_unlock(state);
-      ndbg("ERROR: Server is not listening: lc_state=%d\n",
+      net_unlock();
+      nerr("ERROR: Server is not listening: lc_state=%d\n",
            server->lc_state);
-      ndbg("   OR: The backlog limit was reached: %d or %d\n",
+      nerr("   OR: The backlog limit was reached: %d or %d\n",
            server->u.server.lc_pending, server->u.server.lc_backlog);
       return -ECONNREFUSED;
     }
@@ -153,10 +153,10 @@ int inline local_stream_connect(FAR struct local_conn_s *client,
   ret = local_create_fifos(client);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to create FIFOs for %s: %d\n",
+      nerr("ERROR: Failed to create FIFOs for %s: %d\n",
            client->lc_path, ret);
 
-      net_unlock(state);
+      net_unlock();
       return ret;
     }
 
@@ -167,10 +167,10 @@ int inline local_stream_connect(FAR struct local_conn_s *client,
   ret = local_open_client_tx(client, nonblock);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to open write-only FIFOs for %s: %d\n",
+      nerr("ERROR: Failed to open write-only FIFOs for %s: %d\n",
            client->lc_path, ret);
 
-      net_unlock(state);
+      net_unlock();
       goto errout_with_fifos;
     }
 
@@ -182,7 +182,7 @@ int inline local_stream_connect(FAR struct local_conn_s *client,
   client->lc_state = LOCAL_STATE_ACCEPT;
   local_accept_pollnotify(server, POLLIN);
   _local_semgive(&server->lc_waitsem);
-  net_unlock(state);
+  net_unlock();
 
   /* Wait for the server to accept the connections */
 
@@ -198,7 +198,7 @@ int inline local_stream_connect(FAR struct local_conn_s *client,
 
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to connect: %d\n", ret);
+      nerr("ERROR: Failed to connect: %d\n", ret);
       goto errout_with_outfd;
     }
 
@@ -207,7 +207,7 @@ int inline local_stream_connect(FAR struct local_conn_s *client,
   ret = local_open_client_rx(client, nonblock);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to open write-only FIFOs for %s: %d\n",
+      nerr("ERROR: Failed to open write-only FIFOs for %s: %d\n",
            client->lc_path, ret);
       goto errout_with_outfd;
     }
@@ -257,7 +257,6 @@ int psock_local_connect(FAR struct socket *psock,
   FAR struct local_conn_s *client;
   FAR struct sockaddr_un *unaddr = (FAR struct sockaddr_un *)addr;
   FAR struct local_conn_s *conn;
-  net_lock_t state;
 
   DEBUGASSERT(psock && psock->s_conn);
   client = (FAR struct local_conn_s *)psock->s_conn;
@@ -270,7 +269,7 @@ int psock_local_connect(FAR struct socket *psock,
 
   /* Find the matching server connection */
 
-  state = net_lock();
+  net_lock();
   for (conn = (FAR struct local_conn_s *)g_local_listeners.head;
       conn;
       conn = (FAR struct local_conn_s *)dq_next(&conn->lc_node))
@@ -290,7 +289,7 @@ int psock_local_connect(FAR struct socket *psock,
         case LOCAL_TYPE_ABSTRACT:  /* lc_path is length zero */
           {
 #warning Missing logic
-            net_unlock(state);
+            net_unlock();
             return OK;
           }
           break;
@@ -317,12 +316,11 @@ int psock_local_connect(FAR struct socket *psock,
                 if (conn->lc_proto == SOCK_STREAM)
                   {
                     ret = local_stream_connect(client, conn,
-                                               _SS_ISNONBLOCK(psock->s_flags),
-                                               state);
+                                               _SS_ISNONBLOCK(psock->s_flags));
                   }
                 else
                   {
-                    net_unlock(state);
+                    net_unlock();
                   }
 
                 return ret;
@@ -335,13 +333,13 @@ int psock_local_connect(FAR struct socket *psock,
 
         case LOCAL_TYPE_UNTYPED: /* Type is not determined until the socket is bound */
           {
-            net_unlock(state);
+            net_unlock();
             return -EINVAL;
           }
         }
     }
 
-  net_unlock(state);
+  net_unlock();
   return -EADDRNOTAVAIL;
 }
 
diff --git a/net/local/local_fifo.c b/net/local/local_fifo.c
index 569aa92a01244cd130d3c721a1b5ac808efc15a7..ff53d400246be672c759705e1c9dd703cdb9123c 100644
--- a/net/local/local_fifo.c
+++ b/net/local/local_fifo.c
@@ -189,7 +189,7 @@ static int local_create_fifo(FAR const char *path)
           int errcode = get_errno();
           DEBUGASSERT(errcode > 0);
 
-          ndbg("ERROR: Failed to create FIFO %s: %d\n", path, errcode);
+          nerr("ERROR: Failed to create FIFO %s: %d\n", path, errcode);
           return -errcode;
         }
     }
@@ -230,7 +230,7 @@ static int local_release_fifo(FAR const char *path)
           int errcode = get_errno();
           DEBUGASSERT(errcode > 0);
 
-          ndbg("ERROR: Failed to unlink FIFO %s: %d\n", path, errcode);
+          nerr("ERROR: Failed to unlink FIFO %s: %d\n", path, errcode);
           return -errcode;
         }
     }
@@ -260,7 +260,7 @@ static int local_rx_open(FAR struct local_conn_s *conn, FAR const char *path,
       int errcode = get_errno();
       DEBUGASSERT(errcode > 0);
 
-      ndbg("ERROR: Failed on open %s for reading: %d\n",
+      nerr("ERROR: Failed on open %s for reading: %d\n",
            path, errcode);
 
       /* Map the errcode to something consistent with the return
@@ -296,7 +296,7 @@ static int local_tx_open(FAR struct local_conn_s *conn, FAR const char *path,
       int errcode = get_errno();
       DEBUGASSERT(errcode > 0);
 
-      ndbg("ERROR: Failed on open %s for writing: %d\n",
+      nerr("ERROR: Failed on open %s for writing: %d\n",
            path, errcode);
 
       /* Map the errcode to something consistent with the return
@@ -336,7 +336,7 @@ static int local_set_policy(int fd, unsigned long policy)
       int errcode = get_errno();
       DEBUGASSERT(errcode > 0);
 
-      ndbg("ERROR: Failed to set FIFO buffer policty: %d\n", errcode);
+      nerr("ERROR: Failed to set FIFO buffer policty: %d\n", errcode);
       return -errcode;
     }
 
diff --git a/net/local/local_listen.c b/net/local/local_listen.c
index 712055c9cefa659e0f9b747f1bfa297a0e5d1f4e..a1020570e7731cd24acb4f9d55d198b9e6255f10 100644
--- a/net/local/local_listen.c
+++ b/net/local/local_listen.c
@@ -84,7 +84,6 @@ dq_queue_t g_local_listeners;
 
 int local_listen(FAR struct local_conn_s *server, int backlog)
 {
-  net_lock_t state;
 
   /* Some sanity checks */
 
@@ -118,9 +117,9 @@ int local_listen(FAR struct local_conn_s *server, int backlog)
 
       /* Add the connection structure to the list of listeners */
 
-      state = net_lock();
+      net_lock();
       dq_addlast(&server->lc_node, &g_local_listeners);
-      net_unlock(state);
+      net_unlock();
 
       /* And change the server state to listing */
 
diff --git a/net/local/local_netpoll.c b/net/local/local_netpoll.c
index 01ebe0884a72561e480c8664d6778b95d94a8289..f9e087b36d98b4714d6dcb43c499aa11031d13a4 100644
--- a/net/local/local_netpoll.c
+++ b/net/local/local_netpoll.c
@@ -62,12 +62,11 @@ static int local_accept_pollsetup(FAR struct local_conn_s *conn,
                                   FAR struct pollfd *fds,
                                   bool setup)
 {
-  net_lock_t state;
   pollevent_t eventset;
   int ret = OK;
   int i;
 
-  state = net_lock();
+  net_lock();
   if (setup)
     {
       /* This is a request to set up the poll.  Find an available
@@ -125,7 +124,7 @@ static int local_accept_pollsetup(FAR struct local_conn_s *conn,
     }
 
 errout:
-  net_unlock(state);
+  net_unlock();
   return ret;
 }
 #endif
@@ -152,7 +151,7 @@ void local_accept_pollnotify(FAR struct local_conn_s *conn,
           fds->revents |= (fds->events & eventset);
           if (fds->revents != 0)
             {
-              ndbg("Report events: %02x\n", fds->revents);
+              ninfo("Report events: %02x\n", fds->revents);
               sem_post(fds->sem);
             }
         }
@@ -233,13 +232,13 @@ int local_pollsetup(FAR struct socket *psock, FAR struct pollfd *fds)
 
           /* Setup poll for both shadow pollfds. */
 
-          ret = file_poll(conn->lc_infd, &shadowfds[0], true);
+          ret = fdesc_poll(conn->lc_infd, &shadowfds[0], true);
           if (ret >= 0)
             {
-              ret = file_poll(conn->lc_outfd, &shadowfds[1], true);
+              ret = fdesc_poll(conn->lc_outfd, &shadowfds[1], true);
               if (ret < 0)
                 {
-                  (void)file_poll(conn->lc_infd, &shadowfds[0], false);
+                  (void)fdesc_poll(conn->lc_infd, &shadowfds[0], false);
                 }
             }
 
@@ -267,7 +266,7 @@ int local_pollsetup(FAR struct socket *psock, FAR struct pollfd *fds)
               goto pollerr;
             }
 
-          ret = file_poll(conn->lc_infd, fds, true);
+          ret = fdesc_poll(conn->lc_infd, fds, true);
         }
         break;
 
@@ -281,7 +280,7 @@ int local_pollsetup(FAR struct socket *psock, FAR struct pollfd *fds)
               goto pollerr;
             }
 
-          ret = file_poll(conn->lc_outfd, fds, true);
+          ret = fdesc_poll(conn->lc_outfd, fds, true);
         }
         break;
 
@@ -356,13 +355,13 @@ int local_pollteardown(FAR struct socket *psock, FAR struct pollfd *fds)
 
           /* Teardown for both shadow pollfds. */
 
-          ret = file_poll(conn->lc_infd, &shadowfds[0], false);
+          ret = fdesc_poll(conn->lc_infd, &shadowfds[0], false);
           if (ret < 0)
             {
               status = ret;
             }
 
-          ret = file_poll(conn->lc_outfd, &shadowfds[1], false);
+          ret = fdesc_poll(conn->lc_outfd, &shadowfds[1], false);
           if (ret < 0)
             {
               status = ret;
@@ -381,7 +380,7 @@ int local_pollteardown(FAR struct socket *psock, FAR struct pollfd *fds)
               return OK;
             }
 
-          status = file_poll(conn->lc_infd, fds, false);
+          status = fdesc_poll(conn->lc_infd, fds, false);
         }
         break;
 
@@ -392,7 +391,7 @@ int local_pollteardown(FAR struct socket *psock, FAR struct pollfd *fds)
               return OK;
             }
 
-          status = file_poll(conn->lc_outfd, fds, false);
+          status = fdesc_poll(conn->lc_outfd, fds, false);
         }
         break;
 
diff --git a/net/local/local_recvfrom.c b/net/local/local_recvfrom.c
index bf5dc45c16fb296b6e3870d2a134b710e95483f0..8585468f616e95f4f28321fb3462e5bedb06d695 100644
--- a/net/local/local_recvfrom.c
+++ b/net/local/local_recvfrom.c
@@ -88,7 +88,7 @@ static int psock_fifo_read(FAR struct socket *psock, FAR void *buf,
 
       if (ret == -ECONNRESET)
         {
-          ndbg("ERROR: Lost connection: %d\n", ret);
+          nerr("ERROR: Lost connection: %d\n", ret);
 
           /* Report an ungraceful loss of connection.  This should
            * eventually be reported as ENOTCONN.
@@ -111,7 +111,7 @@ static int psock_fifo_read(FAR struct socket *psock, FAR void *buf,
         }
       else
         {
-          ndbg("ERROR: Failed to read packet: %d\n", ret);
+          nerr("ERROR: Failed to read packet: %d\n", ret);
           return ret;
         }
     }
@@ -155,7 +155,7 @@ psock_stream_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len,
 
   if (conn->lc_state != LOCAL_STATE_CONNECTED)
     {
-      ndbg("ERROR: not connected\n");
+      nerr("ERROR: not connected\n");
       return -ENOTCONN;
     }
 
@@ -174,12 +174,12 @@ psock_stream_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len,
       ret = local_sync(conn->lc_infd);
       if (ret < 0)
         {
-          ndbg("ERROR: Failed to get packet length: %d\n", ret);
+          nerr("ERROR: Failed to get packet length: %d\n", ret);
           return ret;
         }
       else if (ret > UINT16_MAX)
         {
-          ndbg("ERROR: Packet is too big: %d\n", ret);
+          nerr("ERROR: Packet is too big: %d\n", ret);
           return -E2BIG;
         }
 
@@ -259,7 +259,7 @@ psock_dgram_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len,
     {
       /* Either not bound to address or it is connected */
 
-      ndbg("ERROR: Connected or not bound\n");
+      nerr("ERROR: Connected or not bound\n");
       return -EISCONN;
     }
 
@@ -272,7 +272,7 @@ psock_dgram_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len,
   ret = local_create_halfduplex(conn, conn->lc_path);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to create FIFO for %s: %d\n",
+      nerr("ERROR: Failed to create FIFO for %s: %d\n",
            conn->lc_path, ret);
       return ret;
     }
@@ -282,7 +282,7 @@ psock_dgram_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len,
   ret = local_open_receiver(conn, _SS_ISNONBLOCK(psock->s_flags));
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to open FIFO for %s: %d\n",
+      nerr("ERROR: Failed to open FIFO for %s: %d\n",
            conn->lc_path, ret);
       goto errout_with_halfduplex;
       return ret;
@@ -295,12 +295,12 @@ psock_dgram_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len,
   ret = local_sync(conn->lc_infd);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to get packet length: %d\n", ret);
+      nerr("ERROR: Failed to get packet length: %d\n", ret);
       goto errout_with_infd;
     }
   else if (ret > UINT16_MAX)
     {
-      ndbg("ERROR: Packet is too big: %d\n", ret);
+      nerr("ERROR: Packet is too big: %d\n", ret);
       goto errout_with_infd;
     }
 
@@ -439,7 +439,7 @@ ssize_t psock_local_recvfrom(FAR struct socket *psock, FAR void *buf,
 #endif
     {
       DEBUGPANIC();
-      ndbg("ERROR: Unrecognized socket type: %s\n", psock->s_type);
+      nerr("ERROR: Unrecognized socket type: %s\n", psock->s_type);
       return -EINVAL;
     }
 }
diff --git a/net/local/local_recvutils.c b/net/local/local_recvutils.c
index 27272a59dbaa528b417b897f5a2c5523521cb536..ea19aa65a6ca72ba609fc332966a2e65a3d8e4c4 100644
--- a/net/local/local_recvutils.c
+++ b/net/local/local_recvutils.c
@@ -93,12 +93,12 @@ int local_fifo_read(int fd, FAR uint8_t *buf, size_t *len)
 
           if (errcode != EINTR)
             {
-              ndbg("ERROR: Read failed: %d\n", errcode);
+              nerr("ERROR: Read failed: %d\n", errcode);
               ret = -errcode;
               goto errout;
             }
 
-          nvdbg("Ignoring signal\n");
+          ninfo("Ignoring signal\n");
         }
       else if (nread == 0)
         {
@@ -160,7 +160,7 @@ int local_sync(int fd)
           ret     = local_fifo_read(fd, &sync, &readlen);
           if (ret < 0)
             {
-              ndbg("ERROR: Failed to read sync bytes: %d\n", ret);
+              nerr("ERROR: Failed to read sync bytes: %d\n", ret);
               return ret;
             }
         }
@@ -174,7 +174,7 @@ int local_sync(int fd)
           ret     = local_fifo_read(fd, &sync, &readlen);
           if (ret < 0)
             {
-              ndbg("ERROR: Failed to read sync bytes: %d\n", ret);
+              nerr("ERROR: Failed to read sync bytes: %d\n", ret);
               return ret;
             }
         }
diff --git a/net/local/local_release.c b/net/local/local_release.c
index 29ea65f2f3b0dacacbb6d344ec9014cf1c3683c3..0d2bf42f8038f4969b17dbff6964e0be2f6f6355 100644
--- a/net/local/local_release.c
+++ b/net/local/local_release.c
@@ -69,12 +69,11 @@
 
 int local_release(FAR struct local_conn_s *conn)
 {
-  net_lock_t state;
 
   /* There should be no references on this structure */
 
   DEBUGASSERT(conn->lc_crefs == 0);
-  state = net_lock();
+  net_lock();
 
 #ifdef CONFIG_NET_LOCAL_STREAM
   /* We should not bet here with state LOCAL_STATE_ACCEPT.  That is an
@@ -126,7 +125,7 @@ int local_release(FAR struct local_conn_s *conn)
   /* Free the connection structure */
 
   local_free(conn);
-  net_unlock(state);
+  net_unlock();
   return OK;
 }
 
diff --git a/net/local/local_send.c b/net/local/local_send.c
index 272120138d3bb730e8919e71335c22e7d90b6b99..c8f1cd92a0eb52c65426e71877c9f2933e04956e 100644
--- a/net/local/local_send.c
+++ b/net/local/local_send.c
@@ -88,7 +88,7 @@ ssize_t psock_local_send(FAR struct socket *psock, FAR const void *buf,
   if (peer->lc_state != LOCAL_STATE_CONNECTED ||
       peer->lc_outfd < 0)
     {
-      ndbg("ERROR: not connected\n");
+      nerr("ERROR: not connected\n");
       return -ENOTCONN;
     }
 
diff --git a/net/local/local_sendpacket.c b/net/local/local_sendpacket.c
index c55aa7efbfcf656619808461e1cc5e5e82ba7114..fce8b4fe68c362acf621110047d3bffc4e29a055 100644
--- a/net/local/local_sendpacket.c
+++ b/net/local/local_sendpacket.c
@@ -100,11 +100,11 @@ static int local_fifo_write(int fd, FAR const uint8_t *buf, size_t len)
 
           if (errcode != EINTR)
             {
-              ndbg("ERROR: Write failed: %d\n", errcode);
+              nerr("ERROR: Write failed: %d\n", errcode);
               return -errcode;
             }
 
-          nvdbg("Ignoring signal\n");
+          ninfo("Ignoring signal\n");
         }
       else
         {
diff --git a/net/local/local_sendto.c b/net/local/local_sendto.c
index 8142110c0837588d0bb926691117efb7a8671e17..1351c67a288cd0813a6823a3995a1be86ea0b05b 100644
--- a/net/local/local_sendto.c
+++ b/net/local/local_sendto.c
@@ -106,7 +106,7 @@ ssize_t psock_local_sendto(FAR struct socket *psock, FAR const void *buf,
     {
       /* Either not bound to address or it is connected */
 
-      ndbg("ERROR: Connected state\n");
+      nerr("ERROR: Connected state\n");
       return -EISCONN;
     }
 
@@ -130,7 +130,7 @@ ssize_t psock_local_sendto(FAR struct socket *psock, FAR const void *buf,
   ret = local_create_halfduplex(conn, unaddr->sun_path);
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to create FIFO for %s: %d\n",
+      nerr("ERROR: Failed to create FIFO for %s: %d\n",
            conn->lc_path, ret);
       return ret;
     }
@@ -141,7 +141,7 @@ ssize_t psock_local_sendto(FAR struct socket *psock, FAR const void *buf,
                           _SS_ISNONBLOCK(psock->s_flags));
   if (ret < 0)
     {
-      ndbg("ERROR: Failed to open FIFO for %s: %d\n",
+      nerr("ERROR: Failed to open FIFO for %s: %d\n",
            unaddr->sun_path, ret);
 
       nsent = ret;
@@ -153,7 +153,7 @@ ssize_t psock_local_sendto(FAR struct socket *psock, FAR const void *buf,
   nsent = local_send_packet(conn->lc_outfd, buf, len);
   if (nsent < 0)
     {
-      ndbg("ERROR: Failed to send the packet: %d\n", ret);
+      nerr("ERROR: Failed to send the packet: %d\n", ret);
     }
   else
     {
diff --git a/net/loopback/loopback.h b/net/loopback/loopback.h
index 8529fdbd1cef367f7ad8ea6fac3d810581cd3ff8..a881f46fdb9615c9da8996241c806b74b4d79e97 100644
--- a/net/loopback/loopback.h
+++ b/net/loopback/loopback.h
@@ -68,5 +68,10 @@ extern "C"
  * Public Function Prototypes
  ****************************************************************************/
 
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* CONFIG_NET_LOOPBACK */
 #endif /* __NET_LOOPBACK_LOOBACK_H */
diff --git a/net/neighbor/neighbor_add.c b/net/neighbor/neighbor_add.c
index 4205f60db2a44323c1b18c327ee6de232bc18e44..fed15353ae064c947473633fc577e1e8fcdebe1e 100644
--- a/net/neighbor/neighbor_add.c
+++ b/net/neighbor/neighbor_add.c
@@ -76,17 +76,17 @@ void neighbor_add(FAR net_ipv6addr_t ipaddr, FAR struct neighbor_addr_s *addr)
   int     oldest_ndx;
   int     i;
 
-  nllvdbg("Add neighbor: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
-          ntohs(ipaddr[0]), ntohs(ipaddr[1]), ntohs(ipaddr[2]),
-          ntohs(ipaddr[3]), ntohs(ipaddr[4]), ntohs(ipaddr[5]),
-          ntohs(ipaddr[6]), ntohs(ipaddr[7]));
-  nllvdbg("  at: %02x:%02x:%02x:%02x:%02x:%02x\n",
-          addr->na_addr.ether_addr_octet[0],
-          addr->na_addr.ether_addr_octet[1],
-          addr->na_addr.ether_addr_octet[2],
-          addr->na_addr.ether_addr_octet[3],
-          addr->na_addr.ether_addr_octet[4],
-          addr->na_addr.ether_addr_octet[5]);
+  ninfo("Add neighbor: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+        ntohs(ipaddr[0]), ntohs(ipaddr[1]), ntohs(ipaddr[2]),
+        ntohs(ipaddr[3]), ntohs(ipaddr[4]), ntohs(ipaddr[5]),
+        ntohs(ipaddr[6]), ntohs(ipaddr[7]));
+  ninfo("  at: %02x:%02x:%02x:%02x:%02x:%02x\n",
+        addr->na_addr.ether_addr_octet[0],
+        addr->na_addr.ether_addr_octet[1],
+        addr->na_addr.ether_addr_octet[2],
+        addr->na_addr.ether_addr_octet[3],
+        addr->na_addr.ether_addr_octet[4],
+        addr->na_addr.ether_addr_octet[5]);
 
   /* Find the first unused entry or the oldest used entry. */
 
diff --git a/net/neighbor/neighbor_findentry.c b/net/neighbor/neighbor_findentry.c
index 88b7abf94ef9918dd3063b95cfb17c3d20651af9..fe6a7b7b319205982bf78cdcd8f0bf7df9ce9c5d 100644
--- a/net/neighbor/neighbor_findentry.c
+++ b/net/neighbor/neighbor_findentry.c
@@ -72,10 +72,10 @@ FAR struct neighbor_entry *neighbor_findentry(const net_ipv6addr_t ipaddr)
 {
   int i;
 
-  nllvdbg("Find neighbor: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
-          ntohs(ipaddr[0]), ntohs(ipaddr[1]), ntohs(ipaddr[2]),
-          ntohs(ipaddr[3]), ntohs(ipaddr[4]), ntohs(ipaddr[5]),
-          ntohs(ipaddr[6]), ntohs(ipaddr[7]));
+  ninfo("Find neighbor: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+        ntohs(ipaddr[0]), ntohs(ipaddr[1]), ntohs(ipaddr[2]),
+        ntohs(ipaddr[3]), ntohs(ipaddr[4]), ntohs(ipaddr[5]),
+        ntohs(ipaddr[6]), ntohs(ipaddr[7]));
 
   for (i = 0; i < CONFIG_NET_IPv6_NCONF_ENTRIES; ++i)
     {
@@ -83,18 +83,18 @@ FAR struct neighbor_entry *neighbor_findentry(const net_ipv6addr_t ipaddr)
 
       if (net_ipv6addr_cmp(neighbor->ne_ipaddr, ipaddr))
         {
-          nllvdbg("  at: %02x:%02x:%02x:%02x:%02x:%02x\n",
-                  neighbor->ne_addr.na_addr.ether_addr_octet[0],
-                  neighbor->ne_addr.na_addr.ether_addr_octet[1],
-                  neighbor->ne_addr.na_addr.ether_addr_octet[2],
-                  neighbor->ne_addr.na_addr.ether_addr_octet[3],
-                  neighbor->ne_addr.na_addr.ether_addr_octet[4],
-                  neighbor->ne_addr.na_addr.ether_addr_octet[5]);
+          ninfo("  at: %02x:%02x:%02x:%02x:%02x:%02x\n",
+                neighbor->ne_addr.na_addr.ether_addr_octet[0],
+                neighbor->ne_addr.na_addr.ether_addr_octet[1],
+                neighbor->ne_addr.na_addr.ether_addr_octet[2],
+                neighbor->ne_addr.na_addr.ether_addr_octet[3],
+                neighbor->ne_addr.na_addr.ether_addr_octet[4],
+                neighbor->ne_addr.na_addr.ether_addr_octet[5]);
 
           return &g_neighbors[i];
         }
     }
 
-  nllvdbg("  Not found\n");
+  ninfo("  Not found\n");
   return NULL;
 }
diff --git a/net/neighbor/neighbor_lookup.c b/net/neighbor/neighbor_lookup.c
index 39b9f941bbd40c5e9033e3adf43cbc1963c12ec9..01f029b69fa6d90a33bbc7a3d31f25f2a8cf8d7d 100644
--- a/net/neighbor/neighbor_lookup.c
+++ b/net/neighbor/neighbor_lookup.c
@@ -76,13 +76,13 @@ FAR const struct neighbor_addr_s *neighbor_lookup(const net_ipv6addr_t ipaddr)
   neighbor = neighbor_findentry(ipaddr);
   if (neighbor != NULL)
     {
-      nllvdbg("Lookup neighbor: %02x:%02x:%02x:%02x:%02x:%02x\n",
-              neighbor->ne_addr.na_addr.ether_addr_octet[0],
-              neighbor->ne_addr.na_addr.ether_addr_octet[1],
-              neighbor->ne_addr.na_addr.ether_addr_octet[2],
-              neighbor->ne_addr.na_addr.ether_addr_octet[3],
-              neighbor->ne_addr.na_addr.ether_addr_octet[4],
-              neighbor->ne_addr.na_addr.ether_addr_octet[5]);
+      ninfo("Lookup neighbor: %02x:%02x:%02x:%02x:%02x:%02x\n",
+            neighbor->ne_addr.na_addr.ether_addr_octet[0],
+            neighbor->ne_addr.na_addr.ether_addr_octet[1],
+            neighbor->ne_addr.na_addr.ether_addr_octet[2],
+            neighbor->ne_addr.na_addr.ether_addr_octet[3],
+            neighbor->ne_addr.na_addr.ether_addr_octet[4],
+            neighbor->ne_addr.na_addr.ether_addr_octet[5]);
 
       return &neighbor->ne_addr;
     }
diff --git a/net/neighbor/neighbor_out.c b/net/neighbor/neighbor_out.c
index 061a45518dc5e08b3267c90d3c985fd9c56dd19d..4725a90ea274aa2fc1f273f3e05a6773665c84cb 100644
--- a/net/neighbor/neighbor_out.c
+++ b/net/neighbor/neighbor_out.c
@@ -120,13 +120,13 @@ static const uint8_t g_multicast_ethaddr[3] =
  *   beginning of the packet and the function returns.
  *
  *   If no Neighbor Table entry is found for the destination IPv6 address,
- *   the packet in the d_buf[] is replaced by an ICMPv6 Neighbor Solicit
+ *   the packet in the d_buf is replaced by an ICMPv6 Neighbor Solicit
  *   request packet for the IPv6 address. The IPv6 packet is dropped and 
  *   it is assumed that the higher level protocols (e.g., TCP) eventually
  *   will retransmit the dropped packet.
  *
  *   Upon return in either the case, a packet to be sent is present in the
- *   d_buf[] buffer and the d_len field holds the length of the Ethernet
+ *   d_buf buffer and the d_len field holds the length of the Ethernet
  *   frame that should be transmitted.
  *
  ****************************************************************************/
@@ -227,7 +227,7 @@ void neighbor_out(FAR struct net_driver_s *dev)
       naddr = neighbor_lookup(ipaddr);
       if (!naddr)
         {
-           nllvdbg("IPv6 Neighbor solicitation for IPv6\n");
+           ninfo("IPv6 Neighbor solicitation for IPv6\n");
 
           /* The destination address was not in our Neighbor Table, so we
            * overwrite the IPv6 packet with an ICMDv6 Neighbor Solicitation
@@ -253,6 +253,6 @@ void neighbor_out(FAR struct net_driver_s *dev)
    */
 
   dev->d_len += netdev_ipv6_hdrlen(dev);
-  nllvdbg("Outgoing IPv6 Packet length: %d (%d)\n",
+  ninfo("Outgoing IPv6 Packet length: %d (%d)\n",
           dev->d_len, (ip->len[0] << 8) | ip->len[1]);
 }
diff --git a/net/netdev/netdev_count.c b/net/netdev/netdev_count.c
index 73ff960f3d84740689cd1188341db27014802073..171039caf6d5c16ba68df1642521d4a1aba9647f 100644
--- a/net/netdev/netdev_count.c
+++ b/net/netdev/netdev_count.c
@@ -72,12 +72,11 @@
 int netdev_count(void)
 {
   struct net_driver_s *dev;
-  net_lock_t save;
   int ndev;
 
-  save = net_lock();
+  net_lock();
   for (dev = g_netdevices, ndev = 0; dev; dev = dev->flink, ndev++);
-  net_unlock(save);
+  net_unlock();
   return ndev;
 }
 
diff --git a/net/netdev/netdev_default.c b/net/netdev/netdev_default.c
index 24884259a7da42bfbcc58e51d40073a23a7f79ea..331f50343d18d049d1d7cab784fb2795f1a0bb86 100644
--- a/net/netdev/netdev_default.c
+++ b/net/netdev/netdev_default.c
@@ -76,11 +76,10 @@
 FAR struct net_driver_s *netdev_default(void)
 {
   FAR struct net_driver_s *dev;
-  net_lock_t save;
 
   /* Examine each registered network device */
 
-  save = net_lock();
+  net_lock();
   for (dev = g_netdevices; dev; dev = dev->flink)
     {
       /* Is the interface in the "up" state? */
@@ -91,12 +90,12 @@ FAR struct net_driver_s *netdev_default(void)
            * state.
            */
 
-          net_unlock(save);
+          net_unlock();
           return dev;
         }
     }
 
-  net_unlock(save);
+  net_unlock();
   return NULL;
 }
 
diff --git a/net/netdev/netdev_findbyaddr.c b/net/netdev/netdev_findbyaddr.c
index 54cf1cee35ad13bfe4dcf681b7e81e84ddc8777c..25fbc02b8d1f9c9c6f94869179a18185c05cc18f 100644
--- a/net/netdev/netdev_findbyaddr.c
+++ b/net/netdev/netdev_findbyaddr.c
@@ -82,11 +82,10 @@
 static FAR struct net_driver_s *netdev_finddevice_ipv4addr(in_addr_t ripaddr)
 {
   FAR struct net_driver_s *dev;
-  net_lock_t save;
 
   /* Examine each registered network device */
 
-  save = net_lock();
+  net_lock();
   for (dev = g_netdevices; dev; dev = dev->flink)
     {
       /* Is the interface in the "up" state? */
@@ -100,7 +99,7 @@ static FAR struct net_driver_s *netdev_finddevice_ipv4addr(in_addr_t ripaddr)
             {
               /* Its a match */
 
-              net_unlock(save);
+              net_unlock();
               return dev;
             }
         }
@@ -108,7 +107,7 @@ static FAR struct net_driver_s *netdev_finddevice_ipv4addr(in_addr_t ripaddr)
 
   /* No device with the matching address found */
 
-  net_unlock(save);
+  net_unlock();
   return NULL;
 }
 #endif /* CONFIG_NET_IPv4 */
@@ -137,11 +136,10 @@ static FAR struct net_driver_s *
 netdev_finddevice_ipv6addr(const net_ipv6addr_t ripaddr)
 {
   FAR struct net_driver_s *dev;
-  net_lock_t save;
 
   /* Examine each registered network device */
 
-  save = net_lock();
+  net_lock();
   for (dev = g_netdevices; dev; dev = dev->flink)
     {
       /* Is the interface in the "up" state? */
@@ -155,7 +153,7 @@ netdev_finddevice_ipv6addr(const net_ipv6addr_t ripaddr)
             {
               /* Its a match */
 
-              net_unlock(save);
+              net_unlock();
               return dev;
             }
         }
@@ -163,7 +161,7 @@ netdev_finddevice_ipv6addr(const net_ipv6addr_t ripaddr)
 
   /* No device with the matching address found */
 
-  net_unlock(save);
+  net_unlock();
   return NULL;
 }
 #endif /* CONFIG_NET_IPv6 */
diff --git a/net/netdev/netdev_findbyindex.c b/net/netdev/netdev_findbyindex.c
index 74ccba04c843322c50086f37400ea2cbb8485949..f17bba0b7c60c58b5fa64e712796b81f76d40781 100644
--- a/net/netdev/netdev_findbyindex.c
+++ b/net/netdev/netdev_findbyindex.c
@@ -78,20 +78,19 @@ FAR struct net_driver_s *netdev_findbyindex(int index)
 {
 #ifdef CONFIG_NETDEV_MULTINIC
   FAR struct net_driver_s *dev;
-  net_lock_t save;
   int i;
 
-  save = net_lock();
+  net_lock();
   for (i = 0, dev = g_netdevices; dev; i++, dev = dev->flink)
     {
       if (i == index)
         {
-          net_unlock(save);
+          net_unlock();
           return dev;
         }
     }
 
-  net_unlock(save);
+  net_unlock();
   return NULL;
 #else
   return (index == 0) ? g_netdevices : NULL;
diff --git a/net/netdev/netdev_findbyname.c b/net/netdev/netdev_findbyname.c
index 04c20b27c8e844b40cfb8be33e9a076b93af1080..944489a2d023fdc7726ebd4a18a3ffabd338e53d 100644
--- a/net/netdev/netdev_findbyname.c
+++ b/net/netdev/netdev_findbyname.c
@@ -73,21 +73,20 @@
 FAR struct net_driver_s *netdev_findbyname(FAR const char *ifname)
 {
   FAR struct net_driver_s *dev;
-  net_lock_t save;
 
   if (ifname)
     {
-      save = net_lock();
+      net_lock();
       for (dev = g_netdevices; dev; dev = dev->flink)
         {
           if (strcmp(ifname, dev->d_ifname) == 0)
             {
-              net_unlock(save);
+              net_unlock();
               return dev;
             }
         }
 
-      net_unlock(save);
+      net_unlock();
     }
 
   return NULL;
diff --git a/net/netdev/netdev_foreach.c b/net/netdev/netdev_foreach.c
index 99d6a8c061f487f9ab41c362d2f4a83a602066b4..11df953902ed47da09f070e4a63721596cbe6e9d 100644
--- a/net/netdev/netdev_foreach.c
+++ b/net/netdev/netdev_foreach.c
@@ -73,12 +73,11 @@
 int netdev_foreach(netdev_callback_t callback, FAR void *arg)
 {
   FAR struct net_driver_s *dev;
-  net_lock_t save;
   int ret = 0;
 
   if (callback)
     {
-      save = net_lock();
+      net_lock();
       for (dev = g_netdevices; dev; dev = dev->flink)
         {
           if (callback(dev, arg) != 0)
@@ -88,7 +87,7 @@ int netdev_foreach(netdev_callback_t callback, FAR void *arg)
             }
         }
 
-      net_unlock(save);
+      net_unlock();
     }
 
   return ret;
diff --git a/net/netdev/netdev_ioctl.c b/net/netdev/netdev_ioctl.c
index c4a1a650d03418fde71d65e483ddd5bef871a18c..10d9bf2df694fd723927810b64036c28bea53bf2 100644
--- a/net/netdev/netdev_ioctl.c
+++ b/net/netdev/netdev_ioctl.c
@@ -363,7 +363,7 @@ static int netdev_ifrioctl(FAR struct socket *psock, int cmd,
   FAR struct net_driver_s *dev;
   int ret = -EINVAL;
 
-  nvdbg("cmd: %d\n", cmd);
+  ninfo("cmd: %d\n", cmd);
 
   /* Execute the command */
 
@@ -769,7 +769,7 @@ static int netdev_imsfioctl(FAR struct socket *psock, int cmd,
   FAR struct net_driver_s *dev;
   int ret = -EINVAL;
 
-  nvdbg("cmd: %d\n", cmd);
+  ninfo("cmd: %d\n", cmd);
 
   /* Execute the command */
 
@@ -1026,13 +1026,13 @@ static int netdev_rtioctl(FAR struct socket *psock, int cmd,
  ****************************************************************************/
 
 /****************************************************************************
- * Name: netdev_ioctl
+ * Name: psock_ioctl
  *
  * Description:
  *   Perform network device specific operations.
  *
  * Parameters:
- *   sockfd   Socket descriptor of device
+ *   psock    A pointer to a NuttX-specific, internal socket structure
  *   cmd      The ioctl command
  *   arg      The argument of the ioctl cmd
  *
@@ -1041,7 +1041,7 @@ static int netdev_rtioctl(FAR struct socket *psock, int cmd,
  *   On a failure, -1 is returned with errno set appropriately
  *
  *   EBADF
- *     'sockfd' is not a valid descriptor.
+ *     'psock' is not a valid, connected socket structure.
  *   EFAULT
  *     'arg' references an inaccessible memory area.
  *   ENOTTY
@@ -1056,9 +1056,8 @@ static int netdev_rtioctl(FAR struct socket *psock, int cmd,
  *
  ****************************************************************************/
 
-int netdev_ioctl(int sockfd, int cmd, unsigned long arg)
+int psock_ioctl(FAR struct socket *psock, int cmd, unsigned long arg)
 {
-  FAR struct socket *psock = sockfd_socket(sockfd);
   int ret;
 
   /* Check if this is a valid command.  In all cases, arg is a pointer that has
@@ -1072,9 +1071,9 @@ int netdev_ioctl(int sockfd, int cmd, unsigned long arg)
       goto errout;
     }
 
-  /* Verify that the sockfd corresponds to valid, allocated socket */
+  /* Verify that the psock corresponds to valid, allocated socket */
 
-  if (!psock || psock->s_crefs <= 0)
+  if (psock == NULL || psock->s_crefs <= 0)
     {
       ret = -EBADF;
       goto errout;
@@ -1125,6 +1124,44 @@ errout:
   return ERROR;
 }
 
+/****************************************************************************
+ * Name: netdev_ioctl
+ *
+ * Description:
+ *   Perform network device specific operations.
+ *
+ * Parameters:
+ *   sockfd   Socket descriptor of device
+ *   cmd      The ioctl command
+ *   arg      The argument of the ioctl cmd
+ *
+ * Return:
+ *   >=0 on success (positive non-zero values are cmd-specific)
+ *   On a failure, -1 is returned with errno set appropriately
+ *
+ *   EBADF
+ *     'sockfd' is not a valid socket descriptor.
+ *   EFAULT
+ *     'arg' references an inaccessible memory area.
+ *   ENOTTY
+ *     'cmd' not valid.
+ *   EINVAL
+ *     'arg' is not valid.
+ *   ENOTTY
+ *     'sockfd' is not associated with a network device.
+ *   ENOTTY
+ *      The specified request does not apply to the kind of object that the
+ *      descriptor 'sockfd' references.
+ *
+ ****************************************************************************/
+
+int netdev_ioctl(int sockfd, int cmd, unsigned long arg)
+{
+  FAR struct socket *psock = sockfd_socket(sockfd);
+
+  return psock_ioctl(psock, cmd, arg);
+}
+
 /****************************************************************************
  * Name: netdev_ifup / netdev_ifdown
  *
diff --git a/net/netdev/netdev_register.c b/net/netdev/netdev_register.c
index 11982d9eeb14b129d365b9829717367e46ab0bb7..a2144d2288bbfd4f9e20ef053417251b71c27ee7 100644
--- a/net/netdev/netdev_register.c
+++ b/net/netdev/netdev_register.c
@@ -178,7 +178,6 @@ int netdev_register(FAR struct net_driver_s *dev, enum net_lltype_e lltype)
 #ifdef CONFIG_NET_USER_DEVFMT
   FAR const char devfmt_str[IFNAMSIZ];
 #endif
-  net_lock_t save;
   int devnum;
 
   if (dev)
@@ -248,7 +247,7 @@ int netdev_register(FAR struct net_driver_s *dev, enum net_lltype_e lltype)
 #endif
 
           default:
-            nlldbg("ERROR: Unrecognized link type: %d\n", lltype);
+            nerr("ERROR: Unrecognized link type: %d\n", lltype);
             return -EINVAL;
         }
 
@@ -271,7 +270,7 @@ int netdev_register(FAR struct net_driver_s *dev, enum net_lltype_e lltype)
        * the interface
        */
 
-      save = net_lock();
+      net_lock();
 
 #ifdef CONFIG_NET_MULTILINK
 #  ifdef CONFIG_NET_LOOPBACK
@@ -316,16 +315,16 @@ int netdev_register(FAR struct net_driver_s *dev, enum net_lltype_e lltype)
 #ifdef CONFIG_NET_IGMP
       igmp_devinit(dev);
 #endif
-      net_unlock(save);
+      net_unlock();
 
 #ifdef CONFIG_NET_ETHERNET
-      nlldbg("Registered MAC: %02x:%02x:%02x:%02x:%02x:%02x as dev: %s\n",
-             dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
-             dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
-             dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5],
-             dev->d_ifname);
+      ninfo("Registered MAC: %02x:%02x:%02x:%02x:%02x:%02x as dev: %s\n",
+            dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
+            dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
+            dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5],
+            dev->d_ifname);
 #else
-      nlldbg("Registered dev: %s\n", dev->d_ifname);
+      ninfo("Registered dev: %s\n", dev->d_ifname);
 #endif
       return OK;
     }
diff --git a/net/netdev/netdev_unregister.c b/net/netdev/netdev_unregister.c
index fc326dcf318d90fed4fda69f21499faa8f4f0d73..6d56ad70f4351709766cda5b0c85bfdb76cf0226 100644
--- a/net/netdev/netdev_unregister.c
+++ b/net/netdev/netdev_unregister.c
@@ -91,11 +91,10 @@ int netdev_unregister(FAR struct net_driver_s *dev)
 {
   struct net_driver_s *prev;
   struct net_driver_s *curr;
-  net_lock_t save;
 
   if (dev)
     {
-      save = net_lock();
+      net_lock();
 
       /* Find the device in the list of known network devices */
 
@@ -125,16 +124,16 @@ int netdev_unregister(FAR struct net_driver_s *dev)
           curr->flink = NULL;
         }
 
-      net_unlock(save);
+      net_unlock();
 
 #ifdef CONFIG_NET_ETHERNET
-      nlldbg("Unregistered MAC: %02x:%02x:%02x:%02x:%02x:%02x as dev: %s\n",
-             dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
-             dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
-             dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5],
-             dev->d_ifname);
+      ninfo("Unregistered MAC: %02x:%02x:%02x:%02x:%02x:%02x as dev: %s\n",
+            dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
+            dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
+            dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5],
+            dev->d_ifname);
 #else
-      nlldbg("Registered dev: %s\n", dev->d_ifname);
+      ninfo("Registered dev: %s\n", dev->d_ifname);
 #endif
       return OK;
     }
diff --git a/net/netdev/netdev_verify.c b/net/netdev/netdev_verify.c
index 8fdd42b53a529527e600a665af04a1d31f6f47e5..ee3031ea783b4bb72ef0b1a38b6dd7b1438c59e1 100644
--- a/net/netdev/netdev_verify.c
+++ b/net/netdev/netdev_verify.c
@@ -64,12 +64,11 @@
 bool netdev_verify(FAR struct net_driver_s *dev)
 {
   FAR struct net_driver_s *chkdev;
-  net_lock_t save;
   bool valid = false;
 
   /* Search the list of registered devices */
 
-  save = net_lock();
+  net_lock();
   for (chkdev = g_netdevices; chkdev != NULL; chkdev = chkdev->flink)
     {
       /* Is the the network device that we are looking for? */
@@ -83,6 +82,6 @@ bool netdev_verify(FAR struct net_driver_s *dev)
         }
     }
 
-  net_unlock(save);
+  net_unlock();
   return valid;
 }
diff --git a/net/pkt/pkt_callback.c b/net/pkt/pkt_callback.c
index 5376b4ce224ecf7c228f28084bd1fb6059f8708c..53df4c4afdf4ad0077cb90d8476e43497f06a3e7 100644
--- a/net/pkt/pkt_callback.c
+++ b/net/pkt/pkt_callback.c
@@ -70,7 +70,7 @@
 uint16_t pkt_callback(FAR struct net_driver_s *dev,
                       FAR struct pkt_conn_s *conn, uint16_t flags)
 {
-  nllvdbg("flags: %04x\n", flags);
+  ninfo("flags: %04x\n", flags);
 
   /* Some sanity checking */
 
diff --git a/net/pkt/pkt_input.c b/net/pkt/pkt_input.c
index 27b3af4d257a887454f915c686ef9bbf34fb979f..b585dd5432fa6c087344b04725edd835bd154554 100644
--- a/net/pkt/pkt_input.c
+++ b/net/pkt/pkt_input.c
@@ -118,7 +118,7 @@ int pkt_input(struct net_driver_s *dev)
     }
   else
     {
-      nlldbg("No listener\n");
+      nerr("ERROR: No listener\n");
     }
 
   return ret;
diff --git a/net/pkt/pkt_poll.c b/net/pkt/pkt_poll.c
index dc4f5a92d040e555712fa138d961a47297a7e732..c289b146d8389eecb7df2a653ab3651ee2ff3780 100644
--- a/net/pkt/pkt_poll.c
+++ b/net/pkt/pkt_poll.c
@@ -78,7 +78,7 @@
 
 void pkt_poll(FAR struct net_driver_s *dev, FAR struct pkt_conn_s *conn)
 {
-  nlldbg("IN\n");
+  ninfo("IN\n");
 
   /* Verify that the packet connection is valid */
 
diff --git a/net/pkt/pkt_send.c b/net/pkt/pkt_send.c
index 1310cb92086ef932dc191917a6a74b7a7d8faa9e..fa5bda318b18a5e48c8d8c8a88efd55ca81708cf 100644
--- a/net/pkt/pkt_send.c
+++ b/net/pkt/pkt_send.c
@@ -1,7 +1,8 @@
 /****************************************************************************
  * net/pkt/pkt_send.c
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -52,6 +53,7 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -93,7 +95,7 @@ static uint16_t psock_send_interrupt(FAR struct net_driver_s *dev,
 {
   FAR struct send_s *pstate = (FAR struct send_s *)pvpriv;
 
-  nllvdbg("flags: %04x sent: %d\n", flags, pstate->snd_sent);
+  ninfo("flags: %04x sent: %d\n", flags, pstate->snd_sent);
 
   if (pstate)
     {
@@ -211,15 +213,14 @@ ssize_t psock_pkt_send(FAR struct socket *psock, FAR const void *buf,
 {
   FAR struct net_driver_s *dev;
   struct send_s state;
-  net_lock_t save;
-  int err;
+  int errcode;
   int ret = OK;
 
   /* Verify that the sockfd corresponds to valid, allocated socket */
 
   if (!psock || psock->s_crefs <= 0)
     {
-      err = EBADF;
+      errcode = EBADF;
       goto errout;
     }
 
@@ -228,7 +229,7 @@ ssize_t psock_pkt_send(FAR struct socket *psock, FAR const void *buf,
   dev = pkt_find_device((FAR struct pkt_conn_s *)psock->s_conn);
   if (dev == NULL)
     {
-      err = ENODEV;
+      errcode = ENODEV;
       goto errout;
     }
 
@@ -243,9 +244,16 @@ ssize_t psock_pkt_send(FAR struct socket *psock, FAR const void *buf,
    * are ready.
    */
 
-  save                = net_lock();
+  net_lock();
   memset(&state, 0, sizeof(struct send_s));
+
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   (void)sem_init(&state.snd_sem, 0, 0); /* Doesn't really fail */
+  (void)sem_setprotocol(&state.snd_sem, SEM_PRIO_NONE);
+
   state.snd_sock      = psock;          /* Socket descriptor to use */
   state.snd_buflen    = len;            /* Number of bytes to send */
   state.snd_buffer    = buf;            /* Buffer to send from */
@@ -284,7 +292,7 @@ ssize_t psock_pkt_send(FAR struct socket *psock, FAR const void *buf,
     }
 
   sem_destroy(&state.snd_sem);
-  net_unlock(save);
+  net_unlock();
 
   /* Set the socket state to idle */
 
@@ -296,7 +304,7 @@ ssize_t psock_pkt_send(FAR struct socket *psock, FAR const void *buf,
 
   if (state.snd_sent < 0)
     {
-      err = state.snd_sent;
+      errcode = state.snd_sent;
       goto errout;
     }
 
@@ -306,7 +314,7 @@ ssize_t psock_pkt_send(FAR struct socket *psock, FAR const void *buf,
 
   if (ret < 0)
     {
-      err = -ret;
+      errcode = -ret;
       goto errout;
     }
 
@@ -315,7 +323,7 @@ ssize_t psock_pkt_send(FAR struct socket *psock, FAR const void *buf,
   return state.snd_sent;
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 }
 
diff --git a/net/procfs/net_procfs.c b/net/procfs/net_procfs.c
index f65cf040df97d30ffa0026e1ee7c05705e099edb..80e30a9a0d76cf19b98e4b61cf974cb93770e996 100644
--- a/net/procfs/net_procfs.c
+++ b/net/procfs/net_procfs.c
@@ -126,7 +126,7 @@ static int netprocfs_open(FAR struct file *filep, FAR const char *relpath,
   FAR struct netprocfs_file_s *priv;
   FAR struct net_driver_s *dev;
 
-  fvdbg("Open '%s'\n", relpath);
+  finfo("Open '%s'\n", relpath);
 
   /* PROCFS is read-only.  Any attempt to open with any kind of write
    * access is not permitted.
@@ -137,7 +137,7 @@ static int netprocfs_open(FAR struct file *filep, FAR const char *relpath,
   if (((oflags & O_WRONLY) != 0 || (oflags & O_RDONLY) == 0) &&
       (net_procfsoperations.write == NULL))
     {
-      fdbg("ERROR: Only O_RDONLY supported\n");
+      ferr("ERROR: Only O_RDONLY supported\n");
       return -EACCES;
     }
 
@@ -167,7 +167,7 @@ static int netprocfs_open(FAR struct file *filep, FAR const char *relpath,
       copy = strdup(relpath);
       if (copy == NULL)
         {
-          fdbg("ERROR: strdup failed\n");
+          ferr("ERROR: strdup failed\n");
           return -ENOMEM;
         }
 
@@ -177,7 +177,7 @@ static int netprocfs_open(FAR struct file *filep, FAR const char *relpath,
 
       if (dev == NULL)
         {
-          fdbg("ERROR: relpath is '%s'\n", relpath);
+          ferr("ERROR: relpath is '%s'\n", relpath);
           return -ENOENT;
         }
     }
@@ -187,7 +187,7 @@ static int netprocfs_open(FAR struct file *filep, FAR const char *relpath,
   priv = (FAR struct netprocfs_file_s *)kmm_zalloc(sizeof(struct netprocfs_file_s));
   if (!priv)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
@@ -233,7 +233,7 @@ static ssize_t netprocfs_read(FAR struct file *filep, FAR char *buffer,
   FAR struct netprocfs_file_s *priv;
   ssize_t nreturned;
 
-  fvdbg("buffer=%p buflen=%lu\n", buffer, (unsigned long)buflen);
+  finfo("buffer=%p buflen=%lu\n", buffer, (unsigned long)buflen);
 
   /* Recover our private data from the struct file instance */
 
@@ -282,7 +282,7 @@ static int netprocfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   FAR struct netprocfs_file_s *oldpriv;
   FAR struct netprocfs_file_s *newpriv;
 
-  fvdbg("Dup %p->%p\n", oldp, newp);
+  finfo("Dup %p->%p\n", oldp, newp);
 
   /* Recover our private data from the old struct file instance */
 
@@ -294,7 +294,7 @@ static int netprocfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   newpriv = (FAR struct netprocfs_file_s *)kmm_zalloc(sizeof(struct netprocfs_file_s));
   if (!newpriv)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
@@ -322,7 +322,7 @@ static int netprocfs_opendir(FAR const char *relpath,
   FAR struct netprocfs_level1_s *level1;
   int ndevs;
 
-  fvdbg("relpath: \"%s\"\n", relpath ? relpath : "NULL");
+  finfo("relpath: \"%s\"\n", relpath ? relpath : "NULL");
   DEBUGASSERT(relpath && dir && !dir->u.procfs);
 
   /* "net" is the only value of relpath that is a directory */
@@ -334,7 +334,7 @@ static int netprocfs_opendir(FAR const char *relpath,
        * should return -ENOENT.
        */
 
-      fdbg("ERROR: Bad relpath: %s\n", relpath);
+      ferr("ERROR: Bad relpath: %s\n", relpath);
       return -ENOTDIR;
     }
 
@@ -347,7 +347,7 @@ static int netprocfs_opendir(FAR const char *relpath,
 
   if (!level1)
     {
-      fdbg("ERROR: Failed to allocate the level1 directory structure\n");
+      ferr("ERROR: Failed to allocate the level1 directory structure\n");
       return -ENOMEM;
     }
 
@@ -420,7 +420,7 @@ static int netprocfs_readdir(FAR struct fs_dirent_s *dir)
        * error -ENOENT.
        */
 
-      fvdbg("Entry %d: End of directory\n", index);
+      finfo("Entry %d: End of directory\n", index);
       return -ENOENT;
     }
 
@@ -518,7 +518,7 @@ static int netprocfs_stat(FAR const char *relpath, FAR struct stat *buf)
       copy = strdup(relpath);
       if (copy == NULL)
         {
-          fdbg("ERROR: strdup failed\n");
+          ferr("ERROR: strdup failed\n");
           return -ENOMEM;
         }
 
@@ -528,7 +528,7 @@ static int netprocfs_stat(FAR const char *relpath, FAR struct stat *buf)
 
       if (dev == NULL)
         {
-          fdbg("ERROR: relpath is '%s'\n", relpath);
+          ferr("ERROR: relpath is '%s'\n", relpath);
           return -ENOENT;
         }
 
@@ -575,7 +575,7 @@ ssize_t netprocfs_read_linegen(FAR struct netprocfs_file_s *priv,
   size_t xfrsize;
   ssize_t nreturned;
 
-  fvdbg("buffer=%p buflen=%lu\n", buffer, (unsigned long)buflen);
+  finfo("buffer=%p buflen=%lu\n", buffer, (unsigned long)buflen);
 
   /* Is there line data already buffered? */
 
diff --git a/net/route/net_addroute.c b/net/route/net_addroute.c
index bf9ea3f3df9e4ef691aca51037d05286a6ce18a9..1f75944ec502464721667c4b8277eaae2f43d591 100644
--- a/net/route/net_addroute.c
+++ b/net/route/net_addroute.c
@@ -74,14 +74,13 @@
 int net_addroute(in_addr_t target, in_addr_t netmask, in_addr_t router)
 {
   FAR struct net_route_s *route;
-  net_lock_t save;
 
   /* Allocate a route entry */
 
   route = net_allocroute();
   if (!route)
     {
-      ndbg("ERROR:  Failed to allocate a route\n");
+      nerr("ERROR:  Failed to allocate a route\n");
       return -ENOMEM;
     }
 
@@ -93,12 +92,12 @@ int net_addroute(in_addr_t target, in_addr_t netmask, in_addr_t router)
 
   /* Get exclusive address to the networking data structures */
 
-  save = net_lock();
+  net_lock();
 
   /* Then add the new entry to the table */
 
   sq_addlast((FAR sq_entry_t *)route, (FAR sq_queue_t *)&g_routes);
-  net_unlock(save);
+  net_unlock();
   return OK;
 }
 #endif
@@ -107,14 +106,13 @@ int net_addroute(in_addr_t target, in_addr_t netmask, in_addr_t router)
 int net_addroute_ipv6(net_ipv6addr_t target, net_ipv6addr_t netmask, net_ipv6addr_t router)
 {
   FAR struct net_route_ipv6_s *route;
-  net_lock_t save;
 
   /* Allocate a route entry */
 
   route = net_allocroute_ipv6();
   if (!route)
     {
-      ndbg("ERROR:  Failed to allocate a route\n");
+      nerr("ERROR:  Failed to allocate a route\n");
       return -ENOMEM;
     }
 
@@ -126,12 +124,12 @@ int net_addroute_ipv6(net_ipv6addr_t target, net_ipv6addr_t netmask, net_ipv6add
 
   /* Get exclusive address to the networking data structures */
 
-  save = net_lock();
+  net_lock();
 
   /* Then add the new entry to the table */
 
   sq_addlast((FAR sq_entry_t *)route, (FAR sq_queue_t *)&g_routes_ipv6);
-  net_unlock(save);
+  net_unlock();
   return OK;
 }
 #endif
diff --git a/net/route/net_allocroute.c b/net/route/net_allocroute.c
index 5c278a9a039189905df0874451da0105d01b852b..8c0cfdd02f3101f661a37c5fd454e0c6e52a03c0 100644
--- a/net/route/net_allocroute.c
+++ b/net/route/net_allocroute.c
@@ -161,18 +161,17 @@ void net_initroute(void)
 FAR struct net_route_s *net_allocroute(void)
 {
   FAR struct net_route_s *route;
-  net_lock_t save;
 
   /* Get exclusive address to the networking data structures */
 
-  save = net_lock();
+  net_lock();
 
   /* Then add the new entry to the table */
 
   route = (FAR struct net_route_s *)
     sq_remfirst((FAR sq_queue_t *)&g_freeroutes);
 
-  net_unlock(save);
+  net_unlock();
   return route;
 }
 #endif
@@ -181,24 +180,23 @@ FAR struct net_route_s *net_allocroute(void)
 FAR struct net_route_ipv6_s *net_allocroute_ipv6(void)
 {
   FAR struct net_route_ipv6_s *route;
-  net_lock_t save;
 
   /* Get exclusive address to the networking data structures */
 
-  save = net_lock();
+  net_lock();
 
   /* Then add the new entry to the table */
 
   route = (FAR struct net_route_ipv6_s *)
     sq_remfirst((FAR sq_queue_t *)&g_freeroutes_ipv6);
 
-  net_unlock(save);
+  net_unlock();
   return route;
 }
 #endif
 
 /****************************************************************************
- * Function: net_allocroute
+ * Function: net_freeroute
  *
  * Description:
  *   Free one route by adding it from the free list
@@ -214,36 +212,32 @@ FAR struct net_route_ipv6_s *net_allocroute_ipv6(void)
 #ifdef CONFIG_NET_IPv4
 void net_freeroute(FAR struct net_route_s *route)
 {
-  net_lock_t save;
-
   DEBUGASSERT(route);
 
   /* Get exclusive address to the networking data structures */
 
-  save = net_lock();
+  net_lock();
 
   /* Then add the new entry to the table */
 
   sq_addlast((FAR sq_entry_t *)route, (FAR sq_queue_t *)&g_freeroutes);
-  net_unlock(save);
+  net_unlock();
 }
 #endif
 
 #ifdef CONFIG_NET_IPv6
 void net_freeroute_ipv6(FAR struct net_route_ipv6_s *route)
 {
-  net_lock_t save;
-
   DEBUGASSERT(route);
 
   /* Get exclusive address to the networking data structures */
 
-  save = net_lock();
+  net_lock();
 
   /* Then add the new entry to the table */
 
   sq_addlast((FAR sq_entry_t *)route, (FAR sq_queue_t *)&g_freeroutes_ipv6);
-  net_unlock(save);
+  net_unlock();
 }
 #endif
 
diff --git a/net/route/net_foreachroute.c b/net/route/net_foreachroute.c
index 1c5789dd64910885b92dad800021260d541019c8..b9e52051afb53ab95745e047a50307e396507ce6 100644
--- a/net/route/net_foreachroute.c
+++ b/net/route/net_foreachroute.c
@@ -72,12 +72,11 @@ int net_foreachroute(route_handler_t handler, FAR void *arg)
 {
   FAR struct net_route_s *route;
   FAR struct net_route_s *next;
-  net_lock_t save;
   int ret = 0;
 
   /* Prevent concurrent access to the routing table */
 
-  save = net_lock();
+  net_lock();
 
   /* Visit each entry in the routing table */
 
@@ -93,7 +92,7 @@ int net_foreachroute(route_handler_t handler, FAR void *arg)
 
   /* Unlock the network */
 
-  net_unlock(save);
+  net_unlock();
   return ret;
 }
 #endif
@@ -103,12 +102,11 @@ int net_foreachroute_ipv6(route_handler_ipv6_t handler, FAR void *arg)
 {
   FAR struct net_route_ipv6_s *route;
   FAR struct net_route_ipv6_s *next;
-  net_lock_t save;
   int ret = 0;
 
   /* Prevent concurrent access to the routing table */
 
-  save = net_lock();
+  net_lock();
 
   /* Visit each entry in the routing table */
 
@@ -124,7 +122,7 @@ int net_foreachroute_ipv6(route_handler_ipv6_t handler, FAR void *arg)
 
   /* Unlock the network */
 
-  net_unlock(save);
+  net_unlock();
   return ret;
 }
 #endif
diff --git a/net/socket/accept.c b/net/socket/accept.c
index 11c2301ba8b648fe5babba20128c99e789e0d4d4..4bf35dc7f21a61b981c18f48909acb9f467d65fd 100644
--- a/net/socket/accept.c
+++ b/net/socket/accept.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * net/socket/accept.c
  *
- *   Copyright (C) 2007-2012, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2012, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -48,6 +48,7 @@
 #include 
 #include 
 
+#include 
 #include 
 
 #include "tcp/tcp.h"
@@ -127,16 +128,20 @@
 int psock_accept(FAR struct socket *psock, FAR struct sockaddr *addr,
                  FAR socklen_t *addrlen, FAR struct socket *newsock)
 {
-  int err;
+  int errcode;
   int ret;
 
   DEBUGASSERT(psock != NULL);
 
+  /* Treat as a cancellation point */
+
+  (void)enter_cancellation_point();
+
   /* Is the socket a stream? */
 
   if (psock->s_type != SOCK_STREAM)
     {
-      err = EOPNOTSUPP;
+      errcode = EOPNOTSUPP;
       goto errout;
     }
 
@@ -144,7 +149,7 @@ int psock_accept(FAR struct socket *psock, FAR struct sockaddr *addr,
 
   if (!_SS_ISLISTENING(psock->s_flags))
     {
-      err = EINVAL;
+      errcode = EINVAL;
       goto errout;
     }
 
@@ -167,7 +172,7 @@ int psock_accept(FAR struct socket *psock, FAR struct sockaddr *addr,
           {
             if (*addrlen < sizeof(struct sockaddr_in))
               {
-                err = EBADF;
+                errcode = EBADF;
                 goto errout;
               }
           }
@@ -179,7 +184,7 @@ int psock_accept(FAR struct socket *psock, FAR struct sockaddr *addr,
           {
             if (*addrlen < sizeof(struct sockaddr_in6))
               {
-                err = EBADF;
+                errcode = EBADF;
                 goto errout;
               }
           }
@@ -191,7 +196,7 @@ int psock_accept(FAR struct socket *psock, FAR struct sockaddr *addr,
           {
             if (*addrlen < sizeof(sa_family_t))
               {
-                err = EBADF;
+                errcode = EBADF;
                 goto errout;
               }
           }
@@ -200,7 +205,7 @@ int psock_accept(FAR struct socket *psock, FAR struct sockaddr *addr,
 
         default:
           DEBUGPANIC();
-          err = EINVAL;
+          errcode = EINVAL;
           goto errout;
         }
     }
@@ -222,7 +227,7 @@ int psock_accept(FAR struct socket *psock, FAR struct sockaddr *addr,
       ret = psock_local_accept(psock, addr, addrlen, &newsock->s_conn);
       if (ret < 0)
         {
-          err = -ret;
+          errcode = -ret;
           goto errout;
         }
     }
@@ -233,16 +238,14 @@ int psock_accept(FAR struct socket *psock, FAR struct sockaddr *addr,
   else
 #endif
     {
-      net_lock_t state;
-
       /* Perform the local accept operation (with the network locked) */
 
-      state = net_lock();
+      net_lock();
       ret = psock_tcp_accept(psock, addr, addrlen, &newsock->s_conn);
       if (ret < 0)
         {
-          net_unlock(state);
-          err = -ret;
+          net_unlock();
+          errcode = -ret;
           goto errout;
         }
 
@@ -258,12 +261,12 @@ int psock_accept(FAR struct socket *psock, FAR struct sockaddr *addr,
            * called.  Undo everything we have done and return a failure.
            */
 
-          net_unlock(state);
-          err = -ret;
+          net_unlock();
+          errcode = -ret;
           goto errout_after_accept;
         }
 
-      net_unlock(state);
+      net_unlock();
     }
 #endif /* CONFIG_NET_TCP */
 
@@ -271,13 +274,16 @@ int psock_accept(FAR struct socket *psock, FAR struct sockaddr *addr,
 
   newsock->s_flags |= _SF_CONNECTED;
   newsock->s_flags &= ~_SF_CLOSED;
+
+  leave_cancellation_point();
   return OK;
 
 errout_after_accept:
   psock_close(newsock);
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
+  leave_cancellation_point();
   return ERROR;
 }
 
@@ -354,9 +360,13 @@ int accept(int sockfd, FAR struct sockaddr *addr, FAR socklen_t *addrlen)
   FAR struct socket *psock = sockfd_socket(sockfd);
   FAR struct socket *newsock;
   int newfd;
-  int err;
+  int errcode;
   int ret;
 
+  /* accept() is a cancellation point */
+
+  (void)enter_cancellation_point();
+
   /* Verify that the sockfd corresponds to valid, allocated socket */
 
   if (psock == NULL || psock->s_crefs <= 0)
@@ -369,12 +379,12 @@ int accept(int sockfd, FAR struct sockaddr *addr, FAR socklen_t *addrlen)
 #if CONFIG_NFILE_DESCRIPTORS > 0
       if ((unsigned int)sockfd < CONFIG_NFILE_DESCRIPTORS)
         {
-          err = ENOTSOCK;
+          errcode = ENOTSOCK;
         }
       else
 #endif
         {
-          err = EBADF;
+          errcode = EBADF;
         }
 
       goto errout;
@@ -387,14 +397,14 @@ int accept(int sockfd, FAR struct sockaddr *addr, FAR socklen_t *addrlen)
   newfd = sockfd_allocate(0);
   if (newfd < 0)
     {
-      err = ENFILE;
+      errcode = ENFILE;
       goto errout;
     }
 
   newsock = sockfd_socket(newfd);
   if (newsock == NULL)
     {
-      err = ENFILE;
+      errcode = ENFILE;
       goto errout_with_socket;
     }
 
@@ -404,16 +414,19 @@ int accept(int sockfd, FAR struct sockaddr *addr, FAR socklen_t *addrlen)
       /* The errno value has already been set */
 
       sockfd_release(newfd);
+      leave_cancellation_point();
       return ERROR;
     }
 
+  leave_cancellation_point();
   return newfd;
 
 errout_with_socket:
   sockfd_release(newfd);
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
+  leave_cancellation_point();
   return ERROR;
 }
 
diff --git a/net/socket/bind.c b/net/socket/bind.c
index 8095c7180777a846c848693c2bbe038303eff280..1197460ce796634499328c3a088c03d547be1836 100644
--- a/net/socket/bind.c
+++ b/net/socket/bind.c
@@ -156,14 +156,14 @@ int psock_bind(FAR struct socket *psock, const struct sockaddr *addr,
   FAR const struct sockaddr_ll *lladdr = (const struct sockaddr_ll *)addr;
 #endif
   socklen_t minlen;
-  int err;
+  int errcode;
   int ret = OK;
 
   /* Verify that the psock corresponds to valid, allocated socket */
 
   if (!psock || psock->s_crefs <= 0)
     {
-      err = ENOTSOCK;
+      errcode = ENOTSOCK;
       goto errout;
     }
 
@@ -196,15 +196,15 @@ int psock_bind(FAR struct socket *psock, const struct sockaddr *addr,
 #endif
 
     default:
-      ndbg("ERROR: Unrecognized address family: %d\n", addr->sa_family);
-      err = EAFNOSUPPORT;
+      nerr("ERROR: Unrecognized address family: %d\n", addr->sa_family);
+      errcode = EAFNOSUPPORT;
       goto errout;
     }
 
   if (addrlen < minlen)
     {
-      ndbg("ERROR: Invalid address length: %d < %d\n", addrlen, minlen);
-      err = EBADF;
+      nerr("ERROR: Invalid address length: %d < %d\n", addrlen, minlen);
+      errcode = EBADF;
       goto errout;
     }
 
@@ -301,7 +301,7 @@ int psock_bind(FAR struct socket *psock, const struct sockaddr *addr,
 #endif /* CONFIG_NET_UDP || CONFIG_NET_LOCAL_DGRAM */
 
       default:
-        err = EBADF;
+        errcode = EBADF;
         goto errout;
     }
 
@@ -309,14 +309,14 @@ int psock_bind(FAR struct socket *psock, const struct sockaddr *addr,
 
   if (ret < 0)
     {
-      err = -ret;
+      errcode = -ret;
       goto errout;
     }
 
   return OK;
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 }
 
diff --git a/net/socket/connect.c b/net/socket/connect.c
index cbd19e177450523f0f9f69895122592c69748fd1..6a0140ea55a7992ee1e046aae7e41df912467858 100644
--- a/net/socket/connect.c
+++ b/net/socket/connect.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * net/socket/connect.c
  *
- *   Copyright (C) 2007-2012, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2012, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -49,6 +49,9 @@
 #include 
 
 #include 
+
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -107,7 +110,13 @@ static inline int psock_setup_callbacks(FAR struct socket *psock,
 
   /* Initialize the TCP state structure */
 
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   (void)sem_init(&pstate->tc_sem, 0, 0); /* Doesn't really fail */
+  (void)sem_setprotocol(&pstate->tc_sem, SEM_PRIO_NONE);
+
   pstate->tc_conn   = conn;
   pstate->tc_psock  = psock;
   pstate->tc_result = -EAGAIN;
@@ -185,7 +194,7 @@ static uint16_t psock_connect_interrupt(FAR struct net_driver_s *dev,
 {
   struct tcp_connect_s *pstate = (struct tcp_connect_s *)pvpriv;
 
-  nllvdbg("flags: %04x\n", flags);
+  ninfo("flags: %04x\n", flags);
 
   /* 'priv' might be null in some race conditions (?) */
 
@@ -261,7 +270,7 @@ static uint16_t psock_connect_interrupt(FAR struct net_driver_s *dev,
           return flags & ~TCP_NEWDATA;
         }
 
-      nllvdbg("Resuming: %d\n", pstate->tc_result);
+      ninfo("Resuming: %d\n", pstate->tc_result);
 
       /* Stop further callbacks */
 
@@ -338,7 +347,6 @@ static inline int psock_tcp_connect(FAR struct socket *psock,
                                     FAR const struct sockaddr *addr)
 {
   struct tcp_connect_s state;
-  net_lock_t           flags;
   int                  ret = OK;
 
   /* Interrupts must be disabled through all of the following because
@@ -346,7 +354,7 @@ static inline int psock_tcp_connect(FAR struct socket *psock,
    * setup.
    */
 
-  flags = net_lock();
+  net_lock();
 
   /* Get the connection reference from the socket */
 
@@ -423,7 +431,7 @@ static inline int psock_tcp_connect(FAR struct socket *psock,
         }
     }
 
-  net_unlock(flags);
+  net_unlock();
   return ret;
 }
 #endif /* CONFIG_NET_TCP */
@@ -507,13 +515,17 @@ int psock_connect(FAR struct socket *psock, FAR const struct sockaddr *addr,
 #if defined(CONFIG_NET_TCP) || defined(CONFIG_NET_UDP) || defined(CONFIG_NET_LOCAL)
   int ret;
 #endif
-  int err;
+  int errcode;
+
+  /* Treat as a cancellation point */
+
+  (void)enter_cancellation_point();
 
   /* Verify that the psock corresponds to valid, allocated socket */
 
   if (!psock || psock->s_crefs <= 0)
     {
-      err = EBADF;
+      errcode = EBADF;
       goto errout;
     }
 
@@ -526,7 +538,7 @@ int psock_connect(FAR struct socket *psock, FAR const struct sockaddr *addr,
       {
         if (addrlen < sizeof(struct sockaddr_in))
           {
-            err = EBADF;
+            errcode = EBADF;
             goto errout;
           }
       }
@@ -538,7 +550,7 @@ int psock_connect(FAR struct socket *psock, FAR const struct sockaddr *addr,
       {
         if (addrlen < sizeof(struct sockaddr_in6))
           {
-            err = EBADF;
+            errcode = EBADF;
             goto errout;
           }
       }
@@ -550,7 +562,7 @@ int psock_connect(FAR struct socket *psock, FAR const struct sockaddr *addr,
       {
         if (addrlen < sizeof(sa_family_t))
           {
-            err = EBADF;
+            errcode = EBADF;
             goto errout;
           }
       }
@@ -559,7 +571,7 @@ int psock_connect(FAR struct socket *psock, FAR const struct sockaddr *addr,
 
     default:
       DEBUGPANIC();
-      err = EAFNOSUPPORT;
+      errcode = EAFNOSUPPORT;
       goto errout;
     }
 
@@ -574,7 +586,7 @@ int psock_connect(FAR struct socket *psock, FAR const struct sockaddr *addr,
 
           if (_SS_ISCONNECTED(psock->s_flags))
             {
-              err = EISCONN;
+              errcode = EISCONN;
               goto errout;
             }
 
@@ -604,7 +616,7 @@ int psock_connect(FAR struct socket *psock, FAR const struct sockaddr *addr,
 
           if (ret < 0)
             {
-              err = -ret;
+              errcode = -ret;
               goto errout;
             }
         }
@@ -644,7 +656,7 @@ int psock_connect(FAR struct socket *psock, FAR const struct sockaddr *addr,
 
           if (ret < 0)
             {
-              err = -ret;
+              errcode = -ret;
               goto errout;
             }
         }
@@ -652,14 +664,16 @@ int psock_connect(FAR struct socket *psock, FAR const struct sockaddr *addr,
 #endif /* CONFIG_NET_UDP || CONFIG_NET_LOCAL_DGRAM */
 
       default:
-        err = EBADF;
+        errcode = EBADF;
         goto errout;
     }
 
+  leave_cancellation_point();
   return OK;
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
+  leave_cancellation_point();
   return ERROR;
 }
 
@@ -734,13 +748,21 @@ errout:
 
 int connect(int sockfd, FAR const struct sockaddr *addr, socklen_t addrlen)
 {
+  int ret;
+
+  /* accept() is a cancellation point */
+
+  (void)enter_cancellation_point();
+
   /* Get the underlying socket structure */
 
   FAR struct socket *psock = sockfd_socket(sockfd);
 
   /* Then let psock_connect() do all of the work */
 
-  return psock_connect(psock, addr, addrlen);
+  ret = psock_connect(psock, addr, addrlen);
+  leave_cancellation_point();
+  return ret;
 }
 
 #endif /* CONFIG_NET */
diff --git a/net/socket/getsockname.c b/net/socket/getsockname.c
index b6b8eebcee8e6fb92aa9eeb906704acd64e44601..7bf87c29d120e651684c438d08c807487edee99c 100644
--- a/net/socket/getsockname.c
+++ b/net/socket/getsockname.c
@@ -99,7 +99,6 @@ int ipv4_getsockname(FAR struct socket *psock, FAR struct sockaddr *addr,
   in_addr_t lipaddr;
   in_addr_t ripaddr;
 #endif
-  net_lock_t save;
 
   /* Check if enough space has been provided for the full address */
 
@@ -152,7 +151,7 @@ int ipv4_getsockname(FAR struct socket *psock, FAR struct sockaddr *addr,
    * a single network device and only the network device knows the IP address.
    */
 
-  save = net_lock();
+  net_lock();
 
 #ifdef CONFIG_NETDEV_MULTINIC
   /* Find the device matching the IPv4 address in the connection structure */
@@ -166,7 +165,7 @@ int ipv4_getsockname(FAR struct socket *psock, FAR struct sockaddr *addr,
 
   if (!dev)
     {
-      net_unlock(save);
+      net_unlock();
       return -EINVAL;
     }
 
@@ -177,7 +176,7 @@ int ipv4_getsockname(FAR struct socket *psock, FAR struct sockaddr *addr,
   outaddr->sin_addr.s_addr = dev->d_ipaddr;
   *addrlen = sizeof(struct sockaddr_in);
 #endif
-  net_unlock(save);
+  net_unlock();
 
   /* Return success */
 
@@ -223,7 +222,6 @@ int ipv6_getsockname(FAR struct socket *psock, FAR struct sockaddr *addr,
   net_ipv6addr_t *lipaddr;
   net_ipv6addr_t *ripaddr;
 #endif
-  net_lock_t save;
 
   /* Check if enough space has been provided for the full address */
 
@@ -276,7 +274,7 @@ int ipv6_getsockname(FAR struct socket *psock, FAR struct sockaddr *addr,
    * a single network device and only the network device knows the IP address.
    */
 
-  save = net_lock();
+  net_lock();
 
 #ifdef CONFIG_NETDEV_MULTINIC
   /* Find the device matching the IPv6 address in the connection structure */
@@ -290,7 +288,7 @@ int ipv6_getsockname(FAR struct socket *psock, FAR struct sockaddr *addr,
 
   if (!dev)
     {
-      net_unlock(save);
+      net_unlock();
       return -EINVAL;
     }
 
@@ -301,7 +299,7 @@ int ipv6_getsockname(FAR struct socket *psock, FAR struct sockaddr *addr,
   memcpy(outaddr->sin6_addr.in6_u.u6_addr8, dev->d_ipv6addr, 16);
   *addrlen = sizeof(struct sockaddr_in6);
 #endif
-  net_unlock(save);
+  net_unlock();
 
   /* Return success */
 
@@ -351,13 +349,13 @@ int getsockname(int sockfd, FAR struct sockaddr *addr, FAR socklen_t *addrlen)
 {
   FAR struct socket *psock = sockfd_socket(sockfd);
   int ret;
-  int err;
+  int errcode;
 
   /* Verify that the sockfd corresponds to valid, allocated socket */
 
   if (!psock || psock->s_crefs <= 0)
     {
-      err = EBADF;
+      errcode = EBADF;
       goto errout;
     }
 
@@ -365,10 +363,10 @@ int getsockname(int sockfd, FAR struct sockaddr *addr, FAR socklen_t *addrlen)
    * system (?)
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!addr || !addrlen)
     {
-      err = EINVAL;
+      errcode = EINVAL;
       goto errout;
     }
 #endif
@@ -391,7 +389,7 @@ int getsockname(int sockfd, FAR struct sockaddr *addr, FAR socklen_t *addrlen)
 
     case PF_PACKET:
     default:
-      err = EAFNOSUPPORT;
+      errcode = EAFNOSUPPORT;
       goto errout;
     }
 
@@ -399,14 +397,14 @@ int getsockname(int sockfd, FAR struct sockaddr *addr, FAR socklen_t *addrlen)
 
   if (ret < 0)
     {
-      err = -ret;
+      errcode = -ret;
       goto errout;
     }
 
   return OK;
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 }
 
diff --git a/net/socket/getsockopt.c b/net/socket/getsockopt.c
index c2236e7591052fe909cb627b5243a17ce1ebe6be..5072f02067cfc13f6cea28132d9559fa9afc3016 100644
--- a/net/socket/getsockopt.c
+++ b/net/socket/getsockopt.c
@@ -96,13 +96,13 @@
 int psock_getsockopt(FAR struct socket *psock, int level, int option,
                      FAR void *value, FAR socklen_t *value_len)
 {
-  int err;
+  int errcode;
 
   /* Verify that the socket option if valid (but might not be supported ) */
 
   if (!_SO_GETVALID(option) || !value || !value_len)
     {
-      err = EINVAL;
+      errcode = EINVAL;
       goto errout;
     }
 
@@ -131,7 +131,7 @@ int psock_getsockopt(FAR struct socket *psock, int level, int option,
 
           if (*value_len < sizeof(int))
             {
-              err = EINVAL;
+              errcode = EINVAL;
               goto errout;
            }
 
@@ -155,7 +155,7 @@ int psock_getsockopt(FAR struct socket *psock, int level, int option,
 
           if (*value_len < sizeof(int))
             {
-              err = EINVAL;
+              errcode = EINVAL;
               goto errout;
             }
 
@@ -179,7 +179,7 @@ int psock_getsockopt(FAR struct socket *psock, int level, int option,
 
           if (*value_len < sizeof(struct timeval))
             {
-              err = EINVAL;
+              errcode = EINVAL;
               goto errout;
             }
 
@@ -214,14 +214,14 @@ int psock_getsockopt(FAR struct socket *psock, int level, int option,
       case SO_SNDLOWAT:   /* Sets the minimum number of bytes to output */
 
       default:
-        err = ENOPROTOOPT;
+        errcode = ENOPROTOOPT;
         goto errout;
     }
 
   return OK;
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 }
 
diff --git a/net/socket/listen.c b/net/socket/listen.c
index c552d79402345100a8691c949717a9435cc3a200..0d91ccb5867b44ab2edadb1538073f60c84cebcf 100644
--- a/net/socket/listen.c
+++ b/net/socket/listen.c
@@ -84,7 +84,7 @@
 
 int psock_listen(FAR struct socket *psock, int backlog)
 {
-  int err;
+  int errcode;
 
   DEBUGASSERT(psock != NULL);
 
@@ -92,7 +92,7 @@ int psock_listen(FAR struct socket *psock, int backlog)
 
   if (psock->s_type != SOCK_STREAM || !psock->s_conn)
     {
-      err = EOPNOTSUPP;
+      errcode = EOPNOTSUPP;
       goto errout;
     }
 
@@ -104,10 +104,10 @@ int psock_listen(FAR struct socket *psock, int backlog)
       FAR struct local_conn_s *conn =
         (FAR struct local_conn_s *)psock->s_conn;
 
-      err = local_listen(conn, backlog);
-      if (err < 0)
+      errcode = local_listen(conn, backlog);
+      if (errcode < 0)
         {
-          err = -err;
+          errcode = -errcode;
           goto errout;
         }
     }
@@ -123,17 +123,17 @@ int psock_listen(FAR struct socket *psock, int backlog)
 
       if (conn->lport <= 0)
         {
-          err = EOPNOTSUPP;
+          errcode = EOPNOTSUPP;
           goto errout;
         }
 
       /* Set up the backlog for this connection */
 
 #ifdef CONFIG_NET_TCPBACKLOG
-      err = tcp_backlogcreate(conn, backlog);
-      if (err < 0)
+      errcode = tcp_backlogcreate(conn, backlog);
+      if (errcode < 0)
         {
-          err = -err;
+          errcode = -errcode;
           goto errout;
         }
 #endif
@@ -150,7 +150,7 @@ int psock_listen(FAR struct socket *psock, int backlog)
   return OK;
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 }
 
@@ -190,7 +190,7 @@ errout:
 int listen(int sockfd, int backlog)
 {
   FAR struct socket *psock = sockfd_socket(sockfd);
-  int err;
+  int errcode;
 
   /* Verify that the sockfd corresponds to valid, allocated socket */
 
@@ -204,15 +204,15 @@ int listen(int sockfd, int backlog)
 #if CONFIG_NFILE_DESCRIPTORS > 0
       if ((unsigned int)sockfd < CONFIG_NFILE_DESCRIPTORS)
         {
-          err = ENOTSOCK;
+          errcode = ENOTSOCK;
         }
       else
 #endif
         {
-          err = EBADF;
+          errcode = EBADF;
         }
 
-      set_errno(err);
+      set_errno(errcode);
       return ERROR;
     }
 
diff --git a/net/socket/net_checksd.c b/net/socket/net_checksd.c
index 3269b531a9fb842f4a9f4f32f8b13d13d9aa1756..64a2f4df8ead496f55d75feb3f0d0dc4d5e5bd70 100644
--- a/net/socket/net_checksd.c
+++ b/net/socket/net_checksd.c
@@ -72,7 +72,7 @@ int net_checksd(int sd, int oflags)
 
   if (!psock || psock->s_crefs <= 0)
     {
-      nvdbg("No valid socket for sd: %d\n", sd);
+      ninfo("No valid socket for sd: %d\n", sd);
       return -EBADF;
     }
 
diff --git a/net/socket/net_clone.c b/net/socket/net_clone.c
index 5d46f45ead31f34266e647d615dc40922ac7360d..5398c614fdf6dc9abdc4b2b307797949b83bd72e 100644
--- a/net/socket/net_clone.c
+++ b/net/socket/net_clone.c
@@ -66,12 +66,11 @@
 
 int net_clone(FAR struct socket *psock1, FAR struct socket *psock2)
 {
-  net_lock_t flags;
   int ret = OK;
 
   /* Parts of this operation need to be atomic */
 
-  flags = net_lock();
+  net_lock();
 
   /* Duplicate the socket state */
 
@@ -116,11 +115,11 @@ int net_clone(FAR struct socket *psock1, FAR struct socket *psock2)
   else
 #endif
     {
-      ndbg("Unsupported type: %d\n", psock2->s_type);
+      nerr("ERROR: Unsupported type: %d\n", psock2->s_type);
       ret = -EBADF;
     }
 
-  net_unlock(flags);
+  net_unlock();
   return ret;
 }
 
diff --git a/net/socket/net_close.c b/net/socket/net_close.c
index f03a9caeea45736fb65e845def1b4495c82cbdd9..ba0fb85dc1d2e8a0e83ba0ebcc6bbe2245de1d47 100644
--- a/net/socket/net_close.c
+++ b/net/socket/net_close.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * net/socket/net_close.c
  *
- *   Copyright (C) 2007-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -49,6 +49,8 @@
 #include 
 
 #include 
+
+#include 
 #include 
 #include 
 #include 
@@ -161,7 +163,7 @@ static uint16_t netclose_interrupt(FAR struct net_driver_s *dev,
 
   DEBUGASSERT(conn != NULL);
 
-  nllvdbg("conn: %p flags: %04x\n", conn, flags);
+  ninfo("conn: %p flags: %04x\n", conn, flags);
 
   /* TCP_DISCONN_EVENTS:
    *   TCP_CLOSE:    The remote host has closed the connection
@@ -209,7 +211,7 @@ static uint16_t netclose_interrupt(FAR struct net_driver_s *dev,
     {
       /* Yes.. Wake up the waiting thread and report the timeout */
 
-      nlldbg("CLOSE timeout\n");
+      nerr("ERROR: CLOSE timeout\n");
       pstate->cl_result = -ETIMEDOUT;
       goto end_wait;
     }
@@ -250,7 +252,7 @@ end_wait:
   pstate->cl_cb->event = NULL;
   sem_post(&pstate->cl_sem);
 
-  nllvdbg("Resuming\n");
+  ninfo("Resuming\n");
   return 0;
 #endif
 }
@@ -335,7 +337,6 @@ static inline int netclose_disconnect(FAR struct socket *psock)
 {
   struct tcp_close_s state;
   FAR struct tcp_conn_s *conn;
-  net_lock_t flags;
 #ifdef CONFIG_NET_SOLINGER
   bool linger;
 #endif
@@ -343,7 +344,7 @@ static inline int netclose_disconnect(FAR struct socket *psock)
 
   /* Interrupts are disabled here to avoid race conditions */
 
-  flags = net_lock();
+  net_lock();
   conn = (FAR struct tcp_conn_s *)psock->s_conn;
 
   /* If we have a semi-permanent write buffer callback in place, then
@@ -388,7 +389,13 @@ static inline int netclose_disconnect(FAR struct socket *psock)
 
           state.cl_psock     = psock;
           state.cl_result    = -EBUSY;
+
+          /* This semaphore is used for signaling and, hence, should not have
+           * priority inheritance enabled.
+           */
+
           sem_init(&state.cl_sem, 0, 0);
+          sem_setprotocol(&state.cl_sem, SEM_PRIO_NONE);
 
           /* Record the time that we started the wait (in ticks) */
 
@@ -441,7 +448,7 @@ static inline int netclose_disconnect(FAR struct socket *psock)
       tcp_free(conn);
     }
 
-  net_unlock(flags);
+  net_unlock();
   return ret;
 }
 #endif /* CONFIG_NET_TCP */
@@ -507,13 +514,13 @@ static void local_close(FAR struct socket *psock)
 
 int psock_close(FAR struct socket *psock)
 {
-  int err;
+  int errcode;
 
   /* Verify that the sockfd corresponds to valid, allocated socket */
 
   if (!psock || psock->s_crefs <= 0)
     {
-      err = EBADF;
+      errcode = EBADF;
       goto errout;
     }
 
@@ -565,8 +572,8 @@ int psock_close(FAR struct socket *psock)
 
                       /* Break any current connections */
 
-                      err = netclose_disconnect(psock);
-                      if (err < 0)
+                      errcode = netclose_disconnect(psock);
+                      if (errcode < 0)
                         {
                           /* This would normally occur only if there is a
                            * timeout from a lingering close.
@@ -662,7 +669,7 @@ int psock_close(FAR struct socket *psock)
 #endif
 
           default:
-            err = EBADF;
+            errcode = EBADF;
             goto errout;
         }
     }
@@ -678,7 +685,7 @@ errout_with_psock:
 #endif
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 }
 
diff --git a/net/socket/net_dupsd.c b/net/socket/net_dupsd.c
index 85d9b6f9356fcf80b95abfd257e5d8013327bae3..b5696871d21b09872985a66103939dd38207521d 100644
--- a/net/socket/net_dupsd.c
+++ b/net/socket/net_dupsd.c
@@ -68,7 +68,7 @@ int net_dupsd(int sockfd, int minsd)
   FAR struct socket *psock1;
   FAR struct socket *psock2;
   int sockfd2;
-  int err;
+  int errcode;
   int ret;
 
   /* Make sure that the minimum socket descriptor is within the legal range.
@@ -99,7 +99,7 @@ int net_dupsd(int sockfd, int minsd)
 
   if (!psock1 || psock1->s_crefs <= 0)
     {
-      err = EBADF;
+      errcode = EBADF;
       goto errout;
     }
 
@@ -108,7 +108,7 @@ int net_dupsd(int sockfd, int minsd)
   sockfd2 = sockfd_allocate(minsd);
   if (sockfd2 < 0)
     {
-      err = ENFILE;
+      errcode = ENFILE;
       goto errout;
     }
 
@@ -117,7 +117,7 @@ int net_dupsd(int sockfd, int minsd)
   psock2 = sockfd_socket(sockfd2);
   if (!psock2)
     {
-      err = ENOSYS; /* should not happen */
+      errcode = ENOSYS; /* should not happen */
       goto errout;
     }
 
@@ -126,7 +126,7 @@ int net_dupsd(int sockfd, int minsd)
   ret = net_clone(psock1, psock2);
   if (ret < 0)
     {
-      err = -ret;
+      errcode = -ret;
       goto errout;
 
     }
@@ -136,10 +136,8 @@ int net_dupsd(int sockfd, int minsd)
 
 errout:
   sched_unlock();
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 }
 
 #endif /* defined(CONFIG_NET) && CONFIG_NSOCKET_DESCRIPTORS > 0 */
-
-
diff --git a/net/socket/net_dupsd2.c b/net/socket/net_dupsd2.c
index 96c3d1831569d87668e436e623f6b3ca958d8ff3..7aa2634e21e4eb9bd1a1b83a7cf71aade0f0d1eb 100644
--- a/net/socket/net_dupsd2.c
+++ b/net/socket/net_dupsd2.c
@@ -71,7 +71,7 @@ int dup2(int sockfd1, int sockfd2)
 {
   FAR struct socket *psock1;
   FAR struct socket *psock2;
-  int err;
+  int errcode;
   int ret;
 
   /* Lock the scheduler throughout the following */
@@ -89,7 +89,7 @@ int dup2(int sockfd1, int sockfd2)
 
   if (!psock1 || !psock2 || psock1->s_crefs <= 0)
     {
-      err = EBADF;
+      errcode = EBADF;
       goto errout;
     }
 
@@ -107,7 +107,7 @@ int dup2(int sockfd1, int sockfd2)
   ret = net_clone(psock1, psock2);
   if (ret < 0)
     {
-      err = -ret;
+      errcode = -ret;
       goto errout;
     }
 
@@ -116,10 +116,8 @@ int dup2(int sockfd1, int sockfd2)
 
 errout:
   sched_unlock();
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 }
 
 #endif /* CONFIG_NET && CONFIG_NSOCKET_DESCRIPTORS > 0 */
-
-
diff --git a/net/socket/net_monitor.c b/net/socket/net_monitor.c
index 3e6cf0c2ae318fe1d69095fb33cc2b423c82ee6e..cee6a13cd941bd84609339df7161657f49dab2be 100644
--- a/net/socket/net_monitor.c
+++ b/net/socket/net_monitor.c
@@ -145,7 +145,7 @@ static uint16_t connection_event(FAR struct net_driver_s *dev,
 
   if (psock)
     {
-      nllvdbg("flags: %04x s_flags: %02x\n", flags, psock->s_flags);
+      ninfo("flags: %04x s_flags: %02x\n", flags, psock->s_flags);
 
       /* TCP_DISCONN_EVENTS: TCP_CLOSE, TCP_ABORT, TCP_TIMEDOUT, or
        * NETDEV_DOWN.  All loss-of-connection events.
@@ -216,7 +216,6 @@ int net_startmonitor(FAR struct socket *psock)
 {
   FAR struct tcp_conn_s *conn;
   FAR struct devif_callback_s *cb;
-  net_lock_t save;
 
   DEBUGASSERT(psock != NULL && psock->s_conn != NULL);
   conn = (FAR struct tcp_conn_s *)psock->s_conn;
@@ -226,7 +225,7 @@ int net_startmonitor(FAR struct socket *psock)
    * registered the monitoring callback.)
    */
 
-  save = net_lock();
+  net_lock();
   if (!(conn->tcpstateflags == TCP_ESTABLISHED ||
         conn->tcpstateflags == TCP_SYN_RCVD))
     {
@@ -244,7 +243,7 @@ int net_startmonitor(FAR struct socket *psock)
        * because the socket was already disconnected.
        */
 
-      net_unlock(save);
+      net_unlock();
       return -ENOTCONN;
     }
 
@@ -270,7 +269,7 @@ int net_startmonitor(FAR struct socket *psock)
   conn->connection_private = (FAR void *)psock;
   conn->connection_event   = connection_event;
 
-  net_unlock(save);
+  net_unlock();
   return OK;
 }
 
@@ -294,13 +293,11 @@ int net_startmonitor(FAR struct socket *psock)
 
 void net_stopmonitor(FAR struct tcp_conn_s *conn)
 {
-  net_lock_t save;
-
   DEBUGASSERT(conn);
 
   /* Free any allocated device event callback structure */
 
-  save = net_lock();
+  net_lock();
   if (conn->connection_devcb)
     {
       tcp_monitor_callback_free(conn, conn->connection_devcb);
@@ -311,7 +308,7 @@ void net_stopmonitor(FAR struct tcp_conn_s *conn)
   conn->connection_private = NULL;
   conn->connection_devcb   = NULL;
   conn->connection_event   = NULL;
-  net_unlock(save);
+  net_unlock();
 }
 
 /****************************************************************************
@@ -335,19 +332,17 @@ void net_stopmonitor(FAR struct tcp_conn_s *conn)
 
 void net_lostconnection(FAR struct socket *psock, uint16_t flags)
 {
-  net_lock_t save;
-
   DEBUGASSERT(psock != NULL && psock->s_conn != NULL);
 
   /* Close the connection */
 
-  save = net_lock();
+  net_lock();
   connection_closed(psock, flags);
 
   /* Stop the network monitor */
 
   net_stopmonitor((FAR struct tcp_conn_s *)psock->s_conn);
-  net_unlock(save);
+  net_unlock();
 }
 
 #endif /* CONFIG_NET && CONFIG_NET_TCP */
diff --git a/net/socket/net_sendfile.c b/net/socket/net_sendfile.c
index d5fde260231662da62acf4469db2d34561df9528..617bce53972d8dd17599d903b58af31ac6ac1dc9 100644
--- a/net/socket/net_sendfile.c
+++ b/net/socket/net_sendfile.c
@@ -57,6 +57,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -156,7 +157,7 @@ static uint16_t ack_interrupt(FAR struct net_driver_s *dev, FAR void *pvconn,
 {
   FAR struct sendfile_s *pstate = (FAR struct sendfile_s *)pvpriv;
 
-  nllvdbg("flags: %04x\n", flags);
+  ninfo("flags: %04x\n", flags);
 
   if ((flags & TCP_ACKDATA) != 0)
     {
@@ -197,8 +198,8 @@ static uint16_t ack_interrupt(FAR struct net_driver_s *dev, FAR void *pvconn,
        */
 
       pstate->snd_acked = tcp_getsequence(tcp->ackno) - pstate->snd_isn;
-      nllvdbg("ACK: acked=%d sent=%d flen=%d\n",
-             pstate->snd_acked, pstate->snd_sent, pstate->snd_flen);
+      ninfo("ACK: acked=%d sent=%d flen=%d\n",
+            pstate->snd_acked, pstate->snd_sent, pstate->snd_flen);
 
       dev->d_sndlen = 0;
 
@@ -206,7 +207,7 @@ static uint16_t ack_interrupt(FAR struct net_driver_s *dev, FAR void *pvconn,
     }
   else if ((flags & TCP_REXMIT) != 0)
     {
-      nlldbg("REXMIT\n");
+      nwarn("WARNING: TCP_REXMIT\n");
 
       /* Yes.. in this case, reset the number of bytes that have been sent
        * to the number of bytes that have been ACKed.
@@ -221,7 +222,7 @@ static uint16_t ack_interrupt(FAR struct net_driver_s *dev, FAR void *pvconn,
     {
       /* Report not connected */
 
-      nlldbg("Lost connection\n");
+      nwarn("WARNING: Lost connection\n");
 
       net_lostconnection(pstate->snd_sock, flags);
       pstate->snd_sent = -ENOTCONN;
@@ -336,8 +337,8 @@ static uint16_t sendfile_interrupt(FAR struct net_driver_s *dev, FAR void *pvcon
     }
 #endif
 
-  nllvdbg("flags: %04x acked: %d sent: %d\n",
-          flags, pstate->snd_acked, pstate->snd_sent);
+  ninfo("flags: %04x acked: %d sent: %d\n",
+        flags, pstate->snd_acked, pstate->snd_sent);
 
   /* Check for a loss of connection */
 
@@ -345,7 +346,7 @@ static uint16_t sendfile_interrupt(FAR struct net_driver_s *dev, FAR void *pvcon
     {
       /* Report not connected */
 
-      nlldbg("Lost connection\n");
+      nwarn("WARNING: Lost connection\n");
 
       net_lostconnection(pstate->snd_sock, flags);
       pstate->snd_sent = -ENOTCONN;
@@ -386,7 +387,7 @@ static uint16_t sendfile_interrupt(FAR struct net_driver_s *dev, FAR void *pvcon
           if (ret < 0)
             {
               int errcode = get_errno();
-              nlldbg("failed to lseek: %d\n", errcode);
+              nerr("ERROR: Failed to lseek: %d\n", errcode);
               pstate->snd_sent = -errcode;
               goto end_wait;
             }
@@ -395,7 +396,7 @@ static uint16_t sendfile_interrupt(FAR struct net_driver_s *dev, FAR void *pvcon
           if (ret < 0)
             {
               int errcode = get_errno();
-              nlldbg("failed to read from input file: %d\n", errcode);
+              nerr("ERROR: Failed to read from input file: %d\n", errcode);
               pstate->snd_sent = -errcode;
               goto end_wait;
             }
@@ -410,7 +411,7 @@ static uint16_t sendfile_interrupt(FAR struct net_driver_s *dev, FAR void *pvcon
            */
 
           seqno = pstate->snd_sent + pstate->snd_isn;
-          nllvdbg("SEND: sndseq %08x->%08x len: %d\n", conn->sndseq, seqno, ret);
+          ninfo("SEND: sndseq %08x->%08x len: %d\n", conn->sndseq, seqno, ret);
 
           tcp_setsequence(conn->sndseq, seqno);
 
@@ -424,13 +425,13 @@ static uint16_t sendfile_interrupt(FAR struct net_driver_s *dev, FAR void *pvcon
               /* Update the amount of data sent (but not necessarily ACKed) */
 
               pstate->snd_sent += sndlen;
-              nllvdbg("pid: %d SEND: acked=%d sent=%d flen=%d\n", getpid(),
-                     pstate->snd_acked, pstate->snd_sent, pstate->snd_flen);
+              ninfo("pid: %d SEND: acked=%d sent=%d flen=%d\n", getpid(),
+                    pstate->snd_acked, pstate->snd_sent, pstate->snd_flen);
             }
         }
       else
         {
-          nlldbg("Window full, wait for ack\n");
+          nwarn("WARNING: Window full, wait for ack\n");
           goto wait;
         }
     }
@@ -444,7 +445,7 @@ static uint16_t sendfile_interrupt(FAR struct net_driver_s *dev, FAR void *pvcon
     {
       /* Yes.. report the timeout */
 
-      nlldbg("SEND timeout\n");
+      nwarn("WARNING: SEND timeout\n");
       pstate->snd_sent = -ETIMEDOUT;
       goto end_wait;
     }
@@ -603,15 +604,14 @@ ssize_t net_sendfile(int outfd, struct file *infile, off_t *offset,
   FAR struct socket *psock = sockfd_socket(outfd);
   FAR struct tcp_conn_s *conn;
   struct sendfile_s state;
-  net_lock_t save;
-  int err;
+  int errcode;
 
   /* Verify that the sockfd corresponds to valid, allocated socket */
 
   if (!psock || psock->s_crefs <= 0)
     {
-      ndbg("ERROR: Invalid socket\n");
-      err = EBADF;
+      nerr("ERROR: Invalid socket\n");
+      errcode = EBADF;
       goto errout;
     }
 
@@ -619,8 +619,8 @@ ssize_t net_sendfile(int outfd, struct file *infile, off_t *offset,
 
   if (psock->s_type != SOCK_STREAM || !_SS_ISCONNECTED(psock->s_flags))
     {
-      ndbg("ERROR: Not connected\n");
-      err = ENOTCONN;
+      nerr("ERROR: Not connected\n");
+      errcode = ENOTCONN;
       goto errout;
     }
 
@@ -657,8 +657,8 @@ ssize_t net_sendfile(int outfd, struct file *infile, off_t *offset,
 
   if (ret < 0)
     {
-      ndbg("ERROR: Not reachable\n");
-      err = ENETUNREACH;
+      nerr("ERROR: Not reachable\n");
+      errcode = ENETUNREACH;
       goto errout;
     }
 #endif /* CONFIG_NET_ARP_SEND || CONFIG_NET_ICMPv6_NEIGHBOR */
@@ -672,10 +672,16 @@ ssize_t net_sendfile(int outfd, struct file *infile, off_t *offset,
    * are ready.
    */
 
-  save  = net_lock();
-
+  net_lock();
   memset(&state, 0, sizeof(struct sendfile_s));
-  sem_init(&state. snd_sem, 0, 0);          /* Doesn't really fail */
+
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  sem_init(&state.snd_sem, 0, 0);           /* Doesn't really fail */
+  sem_setprotocol(&state.snd_sem, SEM_PRIO_NONE);
+
   state.snd_sock    = psock;                /* Socket descriptor to use */
   state.snd_foffset = offset ? *offset : 0; /* Input file offset */
   state.snd_flen    = count;                /* Number of bytes to send */
@@ -687,8 +693,8 @@ ssize_t net_sendfile(int outfd, struct file *infile, off_t *offset,
 
   if (state.snd_datacb == NULL)
     {
-      nlldbg("Failed to allocate data callback\n");
-      err = ENOMEM;
+      nerr("ERROR: Failed to allocate data callback\n");
+      errcode = ENOMEM;
       goto errout_locked;
     }
 
@@ -696,8 +702,8 @@ ssize_t net_sendfile(int outfd, struct file *infile, off_t *offset,
 
   if (state.snd_ackcb == NULL)
     {
-      nlldbg("Failed to allocate ack callback\n");
-      err = ENOMEM;
+      nerr("ERROR: Failed to allocate ack callback\n");
+      errcode = ENOMEM;
       goto errout_datacb;
     }
 
@@ -750,13 +756,13 @@ errout_datacb:
 errout_locked:
 
   sem_destroy(&state. snd_sem);
-  net_unlock(save);
+  net_unlock();
 
 errout:
 
-  if (err)
+  if (errcode)
     {
-      set_errno(err);
+      set_errno(errcode);
       return ERROR;
     }
   else if (state.snd_sent < 0)
diff --git a/net/socket/net_sockets.c b/net/socket/net_sockets.c
index 31274117c7307eb1935df46e7477b6fdf40ad85c..ceac793ee8b0ed5ac105e951d427a925af2d402c 100644
--- a/net/socket/net_sockets.c
+++ b/net/socket/net_sockets.c
@@ -201,7 +201,7 @@ int sockfd_allocate(int minsd)
 
 void sock_release(FAR struct socket *psock)
 {
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (psock)
 #endif
     {
diff --git a/net/socket/net_vfcntl.c b/net/socket/net_vfcntl.c
index d6fd76f20b51ba5a269469206bada1e57b55369f..b260edb5b0a27b8a0ff4232e682aa45b38981117 100644
--- a/net/socket/net_vfcntl.c
+++ b/net/socket/net_vfcntl.c
@@ -76,23 +76,22 @@
 int net_vfcntl(int sockfd, int cmd, va_list ap)
 {
   FAR struct socket *psock = sockfd_socket(sockfd);
-  net_lock_t flags;
-  int err = 0;
+  int errcode = 0;
   int ret = 0;
 
-  nvdbg("sockfd=%d cmd=%d\n", sockfd, cmd);
+  ninfo("sockfd=%d cmd=%d\n", sockfd, cmd);
 
   /* Verify that the sockfd corresponds to valid, allocated socket */
 
   if (!psock || psock->s_crefs <= 0)
     {
-      err = EBADF;
+      errcode = EBADF;
       goto errout;
     }
 
   /* Interrupts must be disabled in order to perform operations on socket structures */
 
-  flags = net_lock();
+  net_lock();
   switch (cmd)
     {
       case F_DUPFD:
@@ -126,7 +125,7 @@ int net_vfcntl(int sockfd, int cmd, va_list ap)
          * successful execution of one  of  the  exec  functions.
          */
 
-         err = ENOSYS; /* F_GETFD and F_SETFD not implemented */
+         errcode = ENOSYS; /* F_GETFD and F_SETFD not implemented */
          break;
 
       case F_GETFL:
@@ -216,7 +215,7 @@ int net_vfcntl(int sockfd, int cmd, va_list ap)
 #endif
 #endif /* CONFIG_NET_LOCAL || CONFIG_NET_TCP_READAHEAD || CONFIG_NET_UDP_READAHEAD */
             {
-              ndbg("ERROR: Non-blocking not supported for this socket\n");
+              nerr("ERROR: Non-blocking not supported for this socket\n");
             }
         }
         break;
@@ -263,20 +262,20 @@ int net_vfcntl(int sockfd, int cmd, va_list ap)
          * not be done.
          */
 
-         err = ENOSYS; /* F_GETOWN, F_SETOWN, F_GETLK, F_SETLK, F_SETLKW */
+         errcode = ENOSYS; /* F_GETOWN, F_SETOWN, F_GETLK, F_SETLK, F_SETLKW */
          break;
 
       default:
-         err = EINVAL;
+         errcode = EINVAL;
          break;
   }
 
-  net_unlock(flags);
+  net_unlock();
 
 errout:
-  if (err != 0)
+  if (errcode != 0)
     {
-      set_errno(err);
+      set_errno(errcode);
       return ERROR;
     }
 
diff --git a/net/socket/recv.c b/net/socket/recv.c
index 412ed6e0d0b5cc8cfce3dc2f99570fd32c3e483d..2e590c0b7154ab5612bc0fb633c24bfbc55808fb 100644
--- a/net/socket/recv.c
+++ b/net/socket/recv.c
@@ -71,6 +71,8 @@
 
 ssize_t recv(int sockfd, FAR void *buf, size_t len, int flags)
 {
+  /* recv is a cancellation point, but that can all be handled by recvfrom */
+
   return recvfrom(sockfd, buf, len, flags, NULL, 0);
 }
 
diff --git a/net/socket/recvfrom.c b/net/socket/recvfrom.c
index 9bc234f54183a280317f8fe3169dcc6cabec90d4..64789b067202971ebfcd8531824801da3dcc5756 100644
--- a/net/socket/recvfrom.c
+++ b/net/socket/recvfrom.c
@@ -56,6 +56,8 @@
 #include 
 
 #include 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -181,7 +183,7 @@ static size_t recvfrom_newdata(FAR struct net_driver_s *dev,
   /* Copy the new appdata into the user buffer */
 
   memcpy(pstate->rf_buffer, dev->d_appdata, recvlen);
-  nllvdbg("Received %d bytes (of %d)\n", (int)recvlen, (int)dev->d_len);
+  ninfo("Received %d bytes (of %d)\n", (int)recvlen, (int)dev->d_len);
 
   /* Update the accumulated size of the data read */
 
@@ -227,7 +229,7 @@ static void recvfrom_newpktdata(FAR struct net_driver_s *dev,
   /* Copy the new packet data into the user buffer */
 
   memcpy(pstate->rf_buffer, dev->d_buf, recvlen);
-  nllvdbg("Received %d bytes (of %d)\n", (int)recvlen, (int)dev->d_len);
+  ninfo("Received %d bytes (of %d)\n", (int)recvlen, (int)dev->d_len);
 
   /* Update the accumulated size of the data read */
 
@@ -293,11 +295,11 @@ static inline void recvfrom_newtcpdata(FAR struct net_driver_s *dev,
 #ifdef CONFIG_DEBUG_NET
       if (nsaved < buflen)
         {
-          ndbg("ERROR: packet data not saved (%d bytes)\n", buflen - nsaved);
+          nerr("ERROR: packet data not saved (%d bytes)\n", buflen - nsaved);
         }
 #endif
 #else
-      ndbg("ERROR: packet data lost (%d bytes)\n", dev->d_len - recvlen);
+      nerr("ERROR: packet data lost (%d bytes)\n", dev->d_len - recvlen);
 #endif
    }
 
@@ -378,7 +380,7 @@ static inline void recvfrom_tcpreadahead(struct recvfrom_s *pstate)
        */
 
       recvlen = iob_copyout(pstate->rf_buffer, iob, pstate->rf_buflen, 0);
-      nllvdbg("Received %d bytes (of %d)\n", recvlen, iob->io_pktlen);
+      ninfo("Received %d bytes (of %d)\n", recvlen, iob->io_pktlen);
 
       /* Update the accumulated size of the data read */
 
@@ -478,7 +480,7 @@ static inline void recvfrom_udpreadahead(struct recvfrom_s *pstate)
           recvlen = iob_copyout(pstate->rf_buffer, iob, pstate->rf_buflen,
                                 src_addr_size + sizeof(uint8_t));
 
-          nllvdbg("Received %d bytes (of %d)\n", recvlen, iob->io_pktlen);
+          ninfo("Received %d bytes (of %d)\n", recvlen, iob->io_pktlen);
 
           /* Update the accumulated size of the data read */
 
@@ -621,7 +623,7 @@ static uint16_t recvfrom_pktinterrupt(FAR struct net_driver_s *dev,
 {
   struct recvfrom_s *pstate = (struct recvfrom_s *)pvpriv;
 
-  nllvdbg("flags: %04x\n", flags);
+  ninfo("flags: %04x\n", flags);
 
   /* 'priv' might be null in some race conditions (?) */
 
@@ -636,7 +638,7 @@ static uint16_t recvfrom_pktinterrupt(FAR struct net_driver_s *dev,
 
           /* We are finished. */
 
-          nllvdbg("PKT done\n");
+          ninfo("PKT done\n");
 
           /* Don't allow any further call backs. */
 
@@ -778,7 +780,7 @@ static uint16_t recvfrom_tcpinterrupt(FAR struct net_driver_s *dev,
 #endif
 #endif
 
-  nllvdbg("flags: %04x\n", flags);
+  ninfo("flags: %04x\n", flags);
 
   /* 'priv' might be null in some race conditions (?) */
 
@@ -827,10 +829,10 @@ static uint16_t recvfrom_tcpinterrupt(FAR struct net_driver_s *dev,
           if (pstate->rf_recvlen > 0)
 #endif
             {
-              nllvdbg("TCP resume\n");
+              ninfo("TCP resume\n");
 
-              /* The TCP receive buffer is full.  Return now and don't allow
-               * any further TCP call backs.
+              /* The TCP receive buffer is non-empty.  Return now and don't
+               * allow any further TCP call backs.
                */
 
               pstate->rf_cb->flags   = 0;
@@ -864,7 +866,7 @@ static uint16_t recvfrom_tcpinterrupt(FAR struct net_driver_s *dev,
 
       else if ((flags & TCP_DISCONN_EVENTS) != 0)
         {
-          nllvdbg("Lost connection\n");
+          ninfo("Lost connection\n");
 
           /* Stop further callbacks */
 
@@ -924,7 +926,7 @@ static uint16_t recvfrom_tcpinterrupt(FAR struct net_driver_s *dev,
            * callbacks
            */
 
-          nllvdbg("TCP timeout\n");
+          ninfo("TCP timeout\n");
 
           pstate->rf_cb->flags   = 0;
           pstate->rf_cb->priv    = NULL;
@@ -1122,7 +1124,7 @@ static uint16_t recvfrom_udp_interrupt(FAR struct net_driver_s *dev,
 {
   FAR struct recvfrom_s *pstate = (FAR struct recvfrom_s *)pvpriv;
 
-  nllvdbg("flags: %04x\n", flags);
+  ninfo("flags: %04x\n", flags);
 
   /* 'priv' might be null in some race conditions (?) */
 
@@ -1136,7 +1138,7 @@ static uint16_t recvfrom_udp_interrupt(FAR struct net_driver_s *dev,
         {
           /* Terminate the transfer with an error. */
 
-          nlldbg("ERROR: Network is down\n");
+          nerr("ERROR: Network is down\n");
           recvfrom_udp_terminate(pstate, -ENETUNREACH);
         }
 
@@ -1150,7 +1152,7 @@ static uint16_t recvfrom_udp_interrupt(FAR struct net_driver_s *dev,
 
           /* We are finished. */
 
-          nllvdbg("UDP done\n");
+          ninfo("UDP done\n");
 
           /* Save the sender's address in the caller's 'from' location */
 
@@ -1176,7 +1178,7 @@ static uint16_t recvfrom_udp_interrupt(FAR struct net_driver_s *dev,
            * callbacks
            */
 
-          nllvdbg("ERROR: UDP timeout\n");
+          nerr("ERROR: UDP timeout\n");
 
           /* Terminate the transfer with an -EAGAIN error */
 
@@ -1217,7 +1219,14 @@ static void recvfrom_init(FAR struct socket *psock, FAR void *buf,
   /* Initialize the state structure. */
 
   memset(pstate, 0, sizeof(struct recvfrom_s));
+
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   (void)sem_init(&pstate->rf_sem, 0, 0); /* Doesn't really fail */
+  (void)sem_setprotocol(&pstate->rf_sem, SEM_PRIO_NONE);
+
   pstate->rf_buflen    = len;
   pstate->rf_buffer    = buf;
   pstate->rf_from      = infrom;
@@ -1387,7 +1396,6 @@ static ssize_t pkt_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len,
   FAR struct pkt_conn_s *conn = (FAR struct pkt_conn_s *)psock->s_conn;
   FAR struct net_driver_s *dev;
   struct recvfrom_s state;
-  net_lock_t save;
   int ret;
 
   /* Perform the packet recvfrom() operation */
@@ -1397,7 +1405,7 @@ static ssize_t pkt_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len,
    * are ready.
    */
 
-  save = net_lock();
+  net_lock();
   recvfrom_init(psock, buf, len, from, fromlen, &state);
 
   /* Get the device driver that will service this transfer */
@@ -1455,7 +1463,7 @@ static ssize_t pkt_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len,
     }
 
 errout_with_state:
-  net_unlock(save);
+  net_unlock();
   recvfrom_uninit(&state);
   return ret;
 }
@@ -1488,7 +1496,6 @@ static ssize_t udp_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len,
   FAR struct udp_conn_s *conn = (FAR struct udp_conn_s *)psock->s_conn;
   FAR struct net_driver_s *dev;
   struct recvfrom_s state;
-  net_lock_t save;
   int ret;
 
   /* Perform the UDP recvfrom() operation */
@@ -1498,7 +1505,7 @@ static ssize_t udp_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len,
    * are ready.
    */
 
-  save = net_lock();
+  net_lock();
   recvfrom_init(psock, buf, len, from, fromlen, &state);
 
   /* Setup the UDP remote connection */
@@ -1596,7 +1603,7 @@ static ssize_t udp_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len,
     }
 
 errout_with_state:
-  net_unlock(save);
+  net_unlock();
   recvfrom_uninit(&state);
   return ret;
 }
@@ -1626,16 +1633,15 @@ errout_with_state:
 static ssize_t tcp_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len,
                             FAR struct sockaddr *from, FAR socklen_t *fromlen)
 {
-  struct recvfrom_s       state;
-  net_lock_t              save;
-  int                     ret;
+  struct recvfrom_s state;
+  int               ret;
 
   /* Initialize the state structure.  This is done with interrupts
    * disabled because we don't want anything to happen until we
    * are ready.
    */
 
-  save = net_lock();
+  net_lock();
   recvfrom_init(psock, buf, len, from, fromlen, &state);
 
   /* Handle any any TCP data already buffered in a read-ahead buffer.  NOTE
@@ -1775,7 +1781,7 @@ static ssize_t tcp_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len,
         }
     }
 
-  net_unlock(save);
+  net_unlock();
   recvfrom_uninit(&state);
   return (ssize_t)ret;
 }
@@ -1844,21 +1850,25 @@ ssize_t psock_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len,
                        FAR socklen_t *fromlen)
 {
   ssize_t ret;
-  int err;
+  int errcode;
+
+  /* Treat as a cancellation point */
+
+  (void)enter_cancellation_point();
 
   /* Verify that non-NULL pointers were passed */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!buf)
     {
-      err = EINVAL;
+      errcode = EINVAL;
       goto errout;
     }
 #endif
 
   if (from && !fromlen)
     {
-      err = EINVAL;
+      errcode = EINVAL;
       goto errout;
     }
 
@@ -1866,7 +1876,7 @@ ssize_t psock_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len,
 
   if (!psock || psock->s_crefs <= 0)
     {
-      err = EBADF;
+      errcode = EBADF;
       goto errout;
     }
 
@@ -1908,13 +1918,13 @@ ssize_t psock_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len,
 
         default:
           DEBUGPANIC();
-          err = EINVAL;
+          errcode = EINVAL;
           goto errout;
         }
 
       if (*fromlen < minlen)
         {
-          err = EINVAL;
+          errcode = EINVAL;
           goto errout;
         }
     }
@@ -1988,7 +1998,7 @@ ssize_t psock_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len,
 
     default:
       {
-        ndbg("ERROR: Unsupported socket type: %d\n", psock->s_type);
+        nerr("ERROR: Unsupported socket type: %d\n", psock->s_type);
         ret = -ENOSYS;
       }
       break;
@@ -2002,16 +2012,18 @@ ssize_t psock_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len,
 
   if (ret < 0)
     {
-      err = -ret;
+      errcode = -ret;
       goto errout;
     }
 
   /* Success return */
 
+  leave_cancellation_point();
   return ret;
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
+  leave_cancellation_point();
   return ERROR;
 }
 
@@ -2071,6 +2083,11 @@ ssize_t recvfrom(int sockfd, FAR void *buf, size_t len, int flags,
                  FAR struct sockaddr *from, FAR socklen_t *fromlen)
 {
   FAR struct socket *psock;
+  ssize_t ret;
+
+  /* recvfrom() is a cancellation point */
+
+  (void)enter_cancellation_point();
 
   /* Get the underlying socket structure */
 
@@ -2078,7 +2095,9 @@ ssize_t recvfrom(int sockfd, FAR void *buf, size_t len, int flags,
 
   /* Then let psock_recvfrom() do all of the work */
 
-  return psock_recvfrom(psock, buf, len, flags, from, fromlen);
+  ret = psock_recvfrom(psock, buf, len, flags, from, fromlen);
+  leave_cancellation_point();
+  return ret;
 }
 
 #endif /* CONFIG_NET */
diff --git a/net/socket/send.c b/net/socket/send.c
index 60b19ab296fbff601bd7579bae48cbc4654bb24e..e90b27b116a314684937f1332d4ca9a21067acb9 100644
--- a/net/socket/send.c
+++ b/net/socket/send.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * net/socket/send.c
  *
- *   Copyright (C) 2007-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -43,6 +43,8 @@
 #include 
 #include 
 
+#include 
+
 #include "tcp/tcp.h"
 #include "udp/udp.h"
 #include "pkt/pkt.h"
@@ -122,6 +124,10 @@ ssize_t psock_send(FAR struct socket *psock, FAR const void *buf, size_t len,
 {
   int ret;
 
+  /* Treat as a cancellation point */
+
+  (void)enter_cancellation_point();
+
   switch (psock->s_type)
     {
 #if defined(CONFIG_NET_PKT)
@@ -192,6 +198,7 @@ ssize_t psock_send(FAR struct socket *psock, FAR const void *buf, size_t len,
         break;
     }
 
+  leave_cancellation_point();
   return ret;
 }
 
@@ -261,5 +268,20 @@ ssize_t psock_send(FAR struct socket *psock, FAR const void *buf, size_t len,
 
 ssize_t send(int sockfd, FAR const void *buf, size_t len, int flags)
 {
-  return psock_send(sockfd_socket(sockfd), buf, len, flags);
+  FAR struct socket *psock;
+  ssize_t ret;
+
+  /* send() is a cancellation point */
+
+  (void)enter_cancellation_point();
+
+  /* Get the underlying socket structure */
+
+  psock = sockfd_socket(sockfd);
+
+  /* And let psock_send do all of the work */
+
+  ret = psock_send(psock, buf, len, flags);
+  leave_cancellation_point();
+  return ret;
 }
diff --git a/net/socket/sendto.c b/net/socket/sendto.c
index 193e3ae4fe222b22fe421123abe127b28060f64a..db51b73c79a65b3f90ce7ba7064bd8ee1c1575d7 100644
--- a/net/socket/sendto.c
+++ b/net/socket/sendto.c
@@ -45,6 +45,7 @@
 #include 
 #include 
 
+#include 
 #include 
 
 #include "udp/udp.h"
@@ -128,7 +129,7 @@ ssize_t psock_sendto(FAR struct socket *psock, FAR const void *buf,
 #if defined(CONFIG_NET_UDP) || defined(CONFIG_NET_LOCAL_DGRAM)
   ssize_t nsent;
 #endif
-  int err;
+  int errcode;
 
   /* If to is NULL or tolen is zero, then this function is same as send (for
    * connected socket types)
@@ -139,8 +140,8 @@ ssize_t psock_sendto(FAR struct socket *psock, FAR const void *buf,
 #if defined(CONFIG_NET_TCP) || defined(CONFIG_NET_LOCAL_STREAM)
       return psock_send(psock, buf, len, flags);
 #else
-      ndbg("ERROR: No 'to' address\n");
-      err = EINVAL;
+      nerr("ERROR: No 'to' address\n");
+      errcode = EINVAL;
       goto errout;
 #endif
     }
@@ -168,15 +169,15 @@ ssize_t psock_sendto(FAR struct socket *psock, FAR const void *buf,
 #endif
 
     default:
-      ndbg("ERROR: Unrecognized address family: %d\n", to->sa_family);
-      err = EAFNOSUPPORT;
+      nerr("ERROR: Unrecognized address family: %d\n", to->sa_family);
+      errcode = EAFNOSUPPORT;
       goto errout;
     }
 
   if (tolen < minlen)
     {
-      ndbg("ERROR: Invalid address length: %d < %d\n", tolen, minlen);
-      err = EBADF;
+      nerr("ERROR: Invalid address length: %d < %d\n", tolen, minlen);
+      errcode = EBADF;
       goto errout;
     }
 
@@ -184,8 +185,8 @@ ssize_t psock_sendto(FAR struct socket *psock, FAR const void *buf,
 
   if (!psock || psock->s_crefs <= 0)
     {
-      ndbg("ERROR: Invalid socket\n");
-      err = EBADF;
+      nerr("ERROR: Invalid socket\n");
+      errcode = EBADF;
       goto errout;
     }
 
@@ -193,8 +194,8 @@ ssize_t psock_sendto(FAR struct socket *psock, FAR const void *buf,
 
   if (psock->s_type != SOCK_DGRAM)
     {
-      ndbg("ERROR: Connected socket\n");
-      err = EISCONN;
+      nerr("ERROR: Connected socket\n");
+      errcode = EISCONN;
       goto errout;
     }
 
@@ -225,18 +226,18 @@ ssize_t psock_sendto(FAR struct socket *psock, FAR const void *buf,
 
   if (nsent < 0)
     {
-      ndbg("ERROR: UDP or Unix domain sendto() failed: %ld\n", (long)nsent);
-      err = -nsent;
+      nerr("ERROR: UDP or Unix domain sendto() failed: %ld\n", (long)nsent);
+      errcode = -nsent;
       goto errout;
     }
 
   return nsent;
 #else
-  err = ENOSYS;
+  errcode = ENOSYS;
 #endif /* CONFIG_NET_UDP || CONFIG_NET_LOCAL_DGRAM */
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 }
 
@@ -309,6 +310,11 @@ ssize_t sendto(int sockfd, FAR const void *buf, size_t len, int flags,
                FAR const struct sockaddr *to, socklen_t tolen)
 {
   FAR struct socket *psock;
+  ssize_t ret;
+
+  /* sendto() is a cancellation point */
+
+  (void)enter_cancellation_point();
 
   /* Get the underlying socket structure */
 
@@ -316,5 +322,7 @@ ssize_t sendto(int sockfd, FAR const void *buf, size_t len, int flags,
 
   /* And let psock_sendto do all of the work */
 
-  return psock_sendto(psock, buf, len, flags, to, tolen);
+  ret = psock_sendto(psock, buf, len, flags, to, tolen);
+  leave_cancellation_point();
+  return ret;
 }
diff --git a/net/socket/setsockopt.c b/net/socket/setsockopt.c
index 99ec9378ed0a40b132c19d67a0e511b965dd8deb..cdcd8d2e851b7ecfd569672ef1a1b99cd731d7a8 100644
--- a/net/socket/setsockopt.c
+++ b/net/socket/setsockopt.c
@@ -105,14 +105,13 @@
 int psock_setsockopt(FAR struct socket *psock, int level, int option,
                      FAR const void *value, socklen_t value_len)
 {
-  net_lock_t flags;
-  int err;
+  int errcode;
 
   /* Verify that the socket option if valid (but might not be supported ) */
 
   if (!_SO_SETVALID(option) || !value)
     {
-      err = EINVAL;
+      errcode = EINVAL;
       goto errout;
     }
 
@@ -141,7 +140,7 @@ int psock_setsockopt(FAR struct socket *psock, int level, int option,
 
           if (value_len != sizeof(int))
             {
-              err = EINVAL;
+              errcode = EINVAL;
               goto errout;
             }
 
@@ -153,7 +152,7 @@ int psock_setsockopt(FAR struct socket *psock, int level, int option,
            * level access to options.
            */
 
-           flags = net_lock();
+           net_lock();
 
           /* Set or clear the option bit */
 
@@ -166,7 +165,7 @@ int psock_setsockopt(FAR struct socket *psock, int level, int option,
               _SO_CLROPT(psock->s_options, option);
             }
 
-          net_unlock(flags);
+          net_unlock();
         }
         break;
 
@@ -180,7 +179,7 @@ int psock_setsockopt(FAR struct socket *psock, int level, int option,
 
           if (tv == NULL || value_len != sizeof(struct timeval))
             {
-              err = EINVAL;
+              errcode = EINVAL;
               goto errout;
             }
 
@@ -223,7 +222,7 @@ int psock_setsockopt(FAR struct socket *psock, int level, int option,
 
           if (value_len < sizeof(FAR struct linger))
             {
-              err = EINVAL;
+              errcode = EINVAL;
               goto errout;
             }
 
@@ -235,7 +234,7 @@ int psock_setsockopt(FAR struct socket *psock, int level, int option,
            * level access to options.
            */
 
-           flags = net_lock();
+           net_lock();
 
           /* Set or clear the linger option bit and linger time (in deciseconds) */
 
@@ -250,7 +249,7 @@ int psock_setsockopt(FAR struct socket *psock, int level, int option,
               psock->s_linger = 0;
             }
 
-          net_unlock(flags);
+          net_unlock();
         }
         break;
 #endif
@@ -268,14 +267,14 @@ int psock_setsockopt(FAR struct socket *psock, int level, int option,
       case SO_TYPE:       /* Reports the socket type */
 
       default:
-        err = ENOPROTOOPT;
+        errcode = ENOPROTOOPT;
         goto errout;
     }
 
   return OK;
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 }
 
diff --git a/net/socket/socket.c b/net/socket/socket.c
index 93fd41a278db51d6f9aafd7cdb6d00ca3108afde..56f6ddfe9c29465cda15f8fac8adf6d8cf6af548 100644
--- a/net/socket/socket.c
+++ b/net/socket/socket.c
@@ -248,7 +248,7 @@ int psock_socket(int domain, int type, int protocol, FAR struct socket *psock)
 #endif
   bool dgramok  = false;
   int ret;
-  int err;
+  int errcode;
 
   /* Only PF_INET, PF_INET6 or PF_PACKET domains supported */
 
@@ -284,7 +284,7 @@ int psock_socket(int domain, int type, int protocol, FAR struct socket *psock)
 #endif
 
     default:
-      err = EAFNOSUPPORT;
+      errcode = EAFNOSUPPORT;
       goto errout;
     }
 
@@ -305,7 +305,7 @@ int psock_socket(int domain, int type, int protocol, FAR struct socket *psock)
           {
             if ((protocol != 0 && protocol != IPPROTO_TCP) || !dgramok)
               {
-                err = EPROTONOSUPPORT;
+                errcode = EPROTONOSUPPORT;
                 goto errout;
               }
           }
@@ -318,7 +318,7 @@ int psock_socket(int domain, int type, int protocol, FAR struct socket *psock)
           {
             if (protocol != 0 || !dgramok)
               {
-                err = EPROTONOSUPPORT;
+                errcode = EPROTONOSUPPORT;
                 goto errout;
               }
           }
@@ -336,7 +336,7 @@ int psock_socket(int domain, int type, int protocol, FAR struct socket *psock)
           {
             if ((protocol != 0 && protocol != IPPROTO_UDP) || !dgramok)
               {
-                err = EPROTONOSUPPORT;
+                errcode = EPROTONOSUPPORT;
                 goto errout;
               }
           }
@@ -349,7 +349,7 @@ int psock_socket(int domain, int type, int protocol, FAR struct socket *psock)
           {
             if (protocol != 0 || !dgramok)
               {
-                err = EPROTONOSUPPORT;
+                errcode = EPROTONOSUPPORT;
                 goto errout;
               }
           }
@@ -362,7 +362,7 @@ int psock_socket(int domain, int type, int protocol, FAR struct socket *psock)
       case SOCK_RAW:
         if (dgramok)
           {
-            err = EPROTONOSUPPORT;
+            errcode = EPROTONOSUPPORT;
             goto errout;
           }
 
@@ -370,7 +370,7 @@ int psock_socket(int domain, int type, int protocol, FAR struct socket *psock)
 #endif
 
       default:
-        err = EPROTONOSUPPORT;
+        errcode = EPROTONOSUPPORT;
         goto errout;
     }
 
@@ -389,7 +389,7 @@ int psock_socket(int domain, int type, int protocol, FAR struct socket *psock)
    * not actually be initialized until the socket is connected.
    */
 
-  err = ENOMEM; /* Assume failure to allocate connection instance */
+  errcode = ENOMEM; /* Assume failure to allocate connection instance */
   switch (type)
     {
 #if defined(CONFIG_NET_TCP) || defined(CONFIG_NET_LOCAL_STREAM)
@@ -423,7 +423,7 @@ int psock_socket(int domain, int type, int protocol, FAR struct socket *psock)
             {
               /* Failed to reserve a connection structure */
 
-              err = -ret;
+              errcode = -ret;
               goto errout;
             }
         }
@@ -461,7 +461,7 @@ int psock_socket(int domain, int type, int protocol, FAR struct socket *psock)
             {
               /* Failed to reserve a connection structure */
 
-              err = -ret;
+              errcode = -ret;
               goto errout;
             }
         }
@@ -476,7 +476,7 @@ int psock_socket(int domain, int type, int protocol, FAR struct socket *psock)
             {
               /* Failed to reserve a connection structure */
 
-              err = -ret;
+              errcode = -ret;
               goto errout;
             }
         }
@@ -490,7 +490,7 @@ int psock_socket(int domain, int type, int protocol, FAR struct socket *psock)
   return OK;
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 }
 
diff --git a/net/tcp/Kconfig b/net/tcp/Kconfig
index fccfba8feabd4a158c9a5fdc06937fb96e5782fc..59fa04d018bd8245aca9268b199f3e0aba932cf9 100644
--- a/net/tcp/Kconfig
+++ b/net/tcp/Kconfig
@@ -107,7 +107,7 @@ config NET_TCP_NWRBCHAINS
 config NET_TCP_WRBUFFER_DEBUG
 	bool "Force write buffer debug"
 	default n
-	depends on DEBUG
+	depends on DEBUG_FEATURES
 	select IOB_DEBUG
 	---help---
 		This option will force debug output from TCP write buffer logic,
diff --git a/net/tcp/Make.defs b/net/tcp/Make.defs
index 9581c626abf8596488dd91c35e654fca0e97f766..520e601f4c197b31c1c9510f63faf5113a708fcc 100644
--- a/net/tcp/Make.defs
+++ b/net/tcp/Make.defs
@@ -63,7 +63,7 @@ NET_CSRCS += tcp_callback.c tcp_backlog.c tcp_ipselect.c
 
 ifeq ($(CONFIG_NET_TCP_WRITE_BUFFERS),y)
 NET_CSRCS += tcp_wrbuffer.c
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
 NET_CSRCS += tcp_wrbuffer_dump.c
 endif
 endif
diff --git a/net/tcp/tcp.h b/net/tcp/tcp.h
index 0b3bd37ce5720537d7b6b26e1ff58350be37b01c..c53475d75a46e3103c701baf718d3e05c19d0e65 100644
--- a/net/tcp/tcp.h
+++ b/net/tcp/tcp.h
@@ -115,7 +115,7 @@
 #  define WRB_TRIM(wrb,n) \
   do { (wrb)->wb_iob = iob_trimhead((wrb)->wb_iob,(n)); } while (0)
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 #  define WRB_DUMP(msg,wrb,len,offset) \
      tcp_wrbuffer_dump(msg,wrb,len,offset)
 #else
@@ -206,6 +206,8 @@ struct tcp_conn_s
                            * it can only be updated at TCP_ESTABLISHED state */
   uint32_t   sent;        /* The number of bytes sent (ACKed and un-ACKed) */
   uint32_t   isn;         /* Initial sequence number */
+  uint32_t   sndseq_max;  /* The sequence number of next not-retransmitted
+                           * segment (next greater sndseq) */
 #endif
 
 #ifdef CONFIG_NET_TCPBACKLOG
@@ -665,7 +667,7 @@ void tcp_poll(FAR struct net_driver_s *dev, FAR struct tcp_conn_s *conn);
  * Parameters:
  *   dev  - The device driver structure to use in the send operation
  *   conn - The TCP "connection" to poll for TX data
- *   hsed - The polling interval in halves of a second
+ *   hsec - The polling interval in halves of a second
  *
  * Return:
  *   None
@@ -1251,7 +1253,7 @@ int tcp_wrbuffer_test(void);
  ****************************************************************************/
 
 #ifdef CONFIG_NET_TCP_WRITE_BUFFERS
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 void tcp_wrbuffer_dump(FAR const char *msg, FAR struct tcp_wrbuffer_s *wrb,
                        unsigned int len, unsigned int offset);
 #else
diff --git a/net/tcp/tcp_accept.c b/net/tcp/tcp_accept.c
index ced4f0d659fae34d9e062a14646d97f6bf3104e5..95d8bfbf4018b0f71eb726eb4f0160346350f920 100644
--- a/net/tcp/tcp_accept.c
+++ b/net/tcp/tcp_accept.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * net/tcp/tcp_accept.c
  *
- *   Copyright (C) 2007-2012, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2012, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -49,6 +49,7 @@
 #include 
 #include 
 
+#include 
 #include 
 
 #include "socket/socket.h"
@@ -246,7 +247,7 @@ int psock_tcp_accept(FAR struct socket *psock, FAR struct sockaddr *addr,
     {
       /* Yes... get the address of the connected client */
 
-      nvdbg("Pending conn=%p\n", state.acpt_newconn);
+      ninfo("Pending conn=%p\n", state.acpt_newconn);
       accept_tcpsender(psock, state.acpt_newconn, addr, addrlen);
     }
 
@@ -279,7 +280,13 @@ int psock_tcp_accept(FAR struct socket *psock, FAR struct sockaddr *addr,
       state.acpt_addrlen    = addrlen;
       state.acpt_newconn    = NULL;
       state.acpt_result     = OK;
+
+      /* This semaphore is used for signaling and, hence, should not have
+       * priority inheritance enabled.
+       */
+
       sem_init(&state.acpt_sem, 0, 0);
+      sem_setprotocol(&state.acpt_sem, SEM_PRIO_NONE);
 
       /* Set up the callback in the connection */
 
diff --git a/net/tcp/tcp_appsend.c b/net/tcp/tcp_appsend.c
index a56da75714f086c500b0a8423259c64bb7817a4f..e638bf18b764acfafbf6712ca51b543039cea371 100644
--- a/net/tcp/tcp_appsend.c
+++ b/net/tcp/tcp_appsend.c
@@ -87,8 +87,8 @@ void tcp_appsend(FAR struct net_driver_s *dev, FAR struct tcp_conn_s *conn,
 
   /* Handle the result based on the application response */
 
-  nllvdbg("result: %04x d_sndlen: %d conn->unacked: %d\n",
-          result, dev->d_sndlen, conn->unacked);
+  ninfo("result: %04x d_sndlen: %d conn->unacked: %d\n",
+        result, dev->d_sndlen, conn->unacked);
 
   /* Get the IP header length associated with the IP domain configured for
    * this TCP connection.
@@ -124,7 +124,7 @@ void tcp_appsend(FAR struct net_driver_s *dev, FAR struct tcp_conn_s *conn,
 
       dev->d_sndlen = 0;
       conn->tcpstateflags = TCP_CLOSED;
-      nllvdbg("TCP state: NETDEV_DOWN\n");
+      ninfo("TCP state: NETDEV_DOWN\n");
     }
 
   /* Check for connection aborted */
@@ -133,7 +133,7 @@ void tcp_appsend(FAR struct net_driver_s *dev, FAR struct tcp_conn_s *conn,
     {
       dev->d_sndlen = 0;
       conn->tcpstateflags = TCP_CLOSED;
-      nllvdbg("TCP state: TCP_CLOSED\n");
+      ninfo("TCP state: TCP_CLOSED\n");
 
       tcp_send(dev, conn, TCP_RST | TCP_ACK, hdrlen);
     }
@@ -145,7 +145,7 @@ void tcp_appsend(FAR struct net_driver_s *dev, FAR struct tcp_conn_s *conn,
       conn->tcpstateflags = TCP_FIN_WAIT_1;
       conn->unacked  = 1;
       conn->nrtx     = 0;
-      nllvdbg("TCP state: TCP_FIN_WAIT_1\n");
+      ninfo("TCP state: TCP_FIN_WAIT_1\n");
 
       dev->d_sndlen  = 0;
       tcp_send(dev, conn, TCP_FIN | TCP_ACK, hdrlen);
@@ -210,8 +210,8 @@ void tcp_rexmit(FAR struct net_driver_s *dev, FAR struct tcp_conn_s *conn,
 {
   uint8_t hdrlen;
 
-  nllvdbg("result: %04x d_sndlen: %d conn->unacked: %d\n",
-          result, dev->d_sndlen, conn->unacked);
+  ninfo("result: %04x d_sndlen: %d conn->unacked: %d\n",
+        result, dev->d_sndlen, conn->unacked);
 
   /* Get the IP header length associated with the IP domain configured for
    * this TCP connection.
diff --git a/net/tcp/tcp_backlog.c b/net/tcp/tcp_backlog.c
index f4bba6cbebc61c35c873979d83c98f0ef60e8cd2..252f04a0f8cf8d427ded3350a5a19ffd581cadfa 100644
--- a/net/tcp/tcp_backlog.c
+++ b/net/tcp/tcp_backlog.c
@@ -72,14 +72,13 @@ int tcp_backlogcreate(FAR struct tcp_conn_s *conn, int nblg)
 {
   FAR struct tcp_backlog_s     *bls = NULL;
   FAR struct tcp_blcontainer_s *blc;
-  net_lock_t flags;
   int size;
   int offset;
   int i;
 
-  nllvdbg("conn=%p nblg=%d\n", conn, nblg);
+  ninfo("conn=%p nblg=%d\n", conn, nblg);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!conn)
     {
       return -EINVAL;
@@ -109,7 +108,7 @@ int tcp_backlogcreate(FAR struct tcp_conn_s *conn, int nblg)
       bls = (FAR struct tcp_backlog_s *)kmm_zalloc(size);
       if (!bls)
         {
-          nlldbg("Failed to allocate backlog\n");
+          nerr("ERROR: Failed to allocate backlog\n");
           return -ENOMEM;
         }
 
@@ -125,7 +124,7 @@ int tcp_backlogcreate(FAR struct tcp_conn_s *conn, int nblg)
 
   /* Destroy any existing backlog (shouldn't be any) */
 
-  flags = net_lock();
+  net_lock();
   tcp_backlogdestroy(conn);
 
   /* Now install the backlog tear-off in the connection.  NOTE that bls may
@@ -135,7 +134,7 @@ int tcp_backlogcreate(FAR struct tcp_conn_s *conn, int nblg)
    */
 
   conn->backlog = bls;
-  net_unlock(flags);
+  net_unlock();
   return OK;
 }
 
@@ -161,9 +160,9 @@ int tcp_backlogdestroy(FAR struct tcp_conn_s *conn)
   FAR struct tcp_blcontainer_s *blc;
   FAR struct tcp_conn_s        *blconn;
 
-  nllvdbg("conn=%p\n", conn);
+  ninfo("conn=%p\n", conn);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!conn)
     {
       return -EINVAL;
@@ -222,9 +221,9 @@ int tcp_backlogadd(FAR struct tcp_conn_s *conn, FAR struct tcp_conn_s *blconn)
   FAR struct tcp_blcontainer_s *blc;
   int ret = -EINVAL;
 
-  nllvdbg("conn=%p blconn=%p\n", conn, blconn);
+  ninfo("conn=%p blconn=%p\n", conn, blconn);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!conn)
     {
       return -EINVAL;
@@ -239,7 +238,7 @@ int tcp_backlogadd(FAR struct tcp_conn_s *conn, FAR struct tcp_conn_s *blconn)
       blc = (FAR struct tcp_blcontainer_s *)sq_remfirst(&bls->bl_free);
       if (!blc)
         {
-          nlldbg("Failed to allocate container\n");
+          nerr("ERROR: Failed to allocate container\n");
           ret = -ENOMEM;
         }
       else
@@ -294,7 +293,7 @@ FAR struct tcp_conn_s *tcp_backlogremove(FAR struct tcp_conn_s *conn)
   FAR struct tcp_blcontainer_s *blc;
   FAR struct tcp_conn_s        *blconn = NULL;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!conn)
     {
       return NULL;
@@ -321,7 +320,7 @@ FAR struct tcp_conn_s *tcp_backlogremove(FAR struct tcp_conn_s *conn)
         }
     }
 
-  nllvdbg("conn=%p, returning %p\n", conn, blconn);
+  ninfo("conn=%p, returning %p\n", conn, blconn);
   return blconn;
 }
 
@@ -345,9 +344,9 @@ int tcp_backlogdelete(FAR struct tcp_conn_s *conn,
   FAR struct tcp_blcontainer_s *blc;
   FAR struct tcp_blcontainer_s *prev;
 
-  nllvdbg("conn=%p blconn=%p\n", conn, blconn);
+  ninfo("conn=%p blconn=%p\n", conn, blconn);
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!conn)
     {
       return -EINVAL;
@@ -390,7 +389,7 @@ int tcp_backlogdelete(FAR struct tcp_conn_s *conn,
             }
         }
 
-      nlldbg("Failed to find pending connection\n");
+      nerr("ERROR: Failed to find pending connection\n");
       return -EINVAL;
     }
 
diff --git a/net/tcp/tcp_callback.c b/net/tcp/tcp_callback.c
index ac4309192306ecf38859ef004e874e4282749db6..2ed5476d4f27a5c6b3f376ad5357a048423adfd0 100644
--- a/net/tcp/tcp_callback.c
+++ b/net/tcp/tcp_callback.c
@@ -95,7 +95,7 @@ tcp_data_event(FAR struct net_driver_s *dev, FAR struct tcp_conn_s *conn,
       uint16_t recvlen;
 #endif
 
-      nllvdbg("No listener on connection\n");
+      ninfo("No listener on connection\n");
 
 #ifdef CONFIG_NET_TCP_READAHEAD
       /* Save as the packet data as in the read-ahead buffer.  NOTE that
@@ -110,7 +110,7 @@ tcp_data_event(FAR struct net_driver_s *dev, FAR struct tcp_conn_s *conn,
            * read-ahead buffers to retain the data -- drop the packet.
            */
 
-         nllvdbg("Dropped %d bytes\n", dev->d_len);
+         ninfo("Dropped %d bytes\n", dev->d_len);
 
 #ifdef CONFIG_NET_STATISTICS
           g_netstats.tcp.syndrop++;
@@ -152,7 +152,7 @@ uint16_t tcp_callback(FAR struct net_driver_s *dev,
    * explicitly set in the callback.
    */
 
-  nllvdbg("flags: %04x\n", flags);
+  ninfo("flags: %04x\n", flags);
 
   /* Perform the data callback.  When a data callback is executed from 'list',
    * the input flags are normally returned, however, the implementation
@@ -245,7 +245,7 @@ uint16_t tcp_datahandler(FAR struct tcp_conn_s *conn, FAR uint8_t *buffer,
   iob = iob_tryalloc(true);
   if (iob == NULL)
     {
-      nlldbg("ERROR: Failed to create new I/O buffer chain\n");
+      nerr("ERROR: Failed to create new I/O buffer chain\n");
       return 0;
     }
 
@@ -258,7 +258,7 @@ uint16_t tcp_datahandler(FAR struct tcp_conn_s *conn, FAR uint8_t *buffer,
        * not free any I/O buffers.
        */
 
-      nlldbg("ERROR: Failed to add data to the I/O buffer chain: %d\n", ret);
+      nerr("ERROR: Failed to add data to the I/O buffer chain: %d\n", ret);
       (void)iob_free_chain(iob);
       return 0;
     }
@@ -270,12 +270,12 @@ uint16_t tcp_datahandler(FAR struct tcp_conn_s *conn, FAR uint8_t *buffer,
   ret = iob_tryadd_queue(iob, &conn->readahead);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to queue the I/O buffer chain: %d\n", ret);
+      nerr("ERROR: Failed to queue the I/O buffer chain: %d\n", ret);
       (void)iob_free_chain(iob);
       return 0;
     }
 
-  nllvdbg("Buffered %d bytes\n", buflen);
+  ninfo("Buffered %d bytes\n", buflen);
   return buflen;
 }
 #endif /* CONFIG_NET_TCP_READAHEAD */
diff --git a/net/tcp/tcp_conn.c b/net/tcp/tcp_conn.c
index efc6527cc5a501c36d5792871dc11f0f867f2862..8ca70aed79eda8d9865526dfa1f74a80721a03c4 100644
--- a/net/tcp/tcp_conn.c
+++ b/net/tcp/tcp_conn.c
@@ -273,7 +273,8 @@ static FAR struct tcp_conn_s *tcp_listener(uint16_t portno)
  *     selected.
  *
  * Return:
- *   0 on success, negated errno on failure:
+ *   Selected or verified port number in host order on success, a negated
+ *   errno on failure:
  *
  *   EADDRINUSE
  *     The given address is already in use.
@@ -305,6 +306,7 @@ static int tcp_selectport(uint16_t portno)
           /* Guess that the next available port number will be the one after
            * the last port number assigned.
            */
+
           portno = ++g_last_tcp_port;
 
           /* Make sure that the port number is within range */
@@ -338,7 +340,7 @@ static int tcp_selectport(uint16_t portno)
         }
     }
 
-  /* Return the selected or verified port number */
+  /* Return the selected or verified port number (host byte order) */
 
   return portno;
 }
@@ -512,15 +514,14 @@ static inline FAR struct tcp_conn_s *
 static inline int tcp_ipv4_bind(FAR struct tcp_conn_s *conn,
                                 FAR const struct sockaddr_in *addr)
 {
-  net_lock_t flags;
   int port;
   int ret;
 
   /* Verify or select a local port and address */
 
-  flags = net_lock();
+  net_lock();
 
-  /* Verify or select a local port */
+  /* Verify or select a local port (host byte order) */
 
 #ifdef CONFIG_NETDEV_MULTINIC
   port = tcp_selectport(PF_INET,
@@ -532,13 +533,13 @@ static inline int tcp_ipv4_bind(FAR struct tcp_conn_s *conn,
 
   if (port < 0)
     {
-      ndbg("tcp_selectport failed: %d\n", port);
+      nerr("ERROR: tcp_selectport failed: %d\n", port);
       return port;
     }
 
-  /* Save the local address in the connection structure. */
+  /* Save the local address in the connection structure (network byte order). */
 
-  conn->lport = addr->sin_port;
+  conn->lport = htons(port);
 #ifdef CONFIG_NETDEV_MULTINIC
   net_ipv4addr_copy(conn->u.ipv4.laddr, addr->sin_addr.s_addr);
 #endif
@@ -552,7 +553,7 @@ static inline int tcp_ipv4_bind(FAR struct tcp_conn_s *conn,
     {
       /* If no device is found, then the address is not reachable */
 
-      ndbg("tcp_local_ipv4_device failed: %d\n", ret);
+      nerr("ERROR: tcp_local_ipv4_device failed: %d\n", ret);
 
       /* Back out the local address setting */
 
@@ -563,7 +564,7 @@ static inline int tcp_ipv4_bind(FAR struct tcp_conn_s *conn,
       return ret;
     }
 
-  net_unlock(flags);
+  net_unlock();
   return OK;
 }
 #endif /* CONFIG_NET_IPv4 */
@@ -587,15 +588,14 @@ static inline int tcp_ipv4_bind(FAR struct tcp_conn_s *conn,
 static inline int tcp_ipv6_bind(FAR struct tcp_conn_s *conn,
                                 FAR const struct sockaddr_in6 *addr)
 {
-  net_lock_t flags;
   int port;
   int ret;
 
   /* Verify or select a local port and address */
 
-  flags = net_lock();
+  net_lock();
 
-  /* Verify or select a local port */
+  /* Verify or select a local port (host byte order) */
 
 #ifdef CONFIG_NETDEV_MULTINIC
   /* The port number must be unique for this address binding */
@@ -613,13 +613,13 @@ static inline int tcp_ipv6_bind(FAR struct tcp_conn_s *conn,
 
   if (port < 0)
     {
-      ndbg("tcp_selectport failed: %d\n", port);
+      nerr("ERROR: tcp_selectport failed: %d\n", port);
       return port;
     }
 
-  /* Save the local address in the connection structure. */
+  /* Save the local address in the connection structure (network byte order). */
 
-  conn->lport = addr->sin6_port;
+  conn->lport = htons(port);
 #ifdef CONFIG_NETDEV_MULTINIC
   net_ipv6addr_copy(conn->u.ipv6.laddr, addr->sin6_addr.in6_u.u6_addr16);
 #endif
@@ -633,7 +633,7 @@ static inline int tcp_ipv6_bind(FAR struct tcp_conn_s *conn,
     {
       /* If no device is found, then the address is not reachable */
 
-      ndbg("tcp_local_ipv6_device failed: %d\n", ret);
+      nerr("ERROR: tcp_local_ipv6_device failed: %d\n", ret);
 
       /* Back out the local address setting */
 
@@ -644,7 +644,7 @@ static inline int tcp_ipv6_bind(FAR struct tcp_conn_s *conn,
       return ret;
     }
 
-  net_unlock(flags);
+  net_unlock();
   return OK;
 }
 #endif /* CONFIG_NET_IPv6 */
@@ -698,14 +698,13 @@ void tcp_initialize(void)
 FAR struct tcp_conn_s *tcp_alloc(uint8_t domain)
 {
   FAR struct tcp_conn_s *conn;
-  net_lock_t flags;
 
   /* Because this routine is called from both interrupt level and
    * and from user level, we have not option but to disable interrupts
    * while accessing g_free_tcp_connections[];
    */
 
-  flags = net_lock();
+  net_lock();
 
   /* Return the entry from the head of the free list */
 
@@ -727,7 +726,7 @@ FAR struct tcp_conn_s *tcp_alloc(uint8_t domain)
 
       while (tmp)
         {
-          nllvdbg("conn: %p state: %02x\n", tmp, tmp->tcpstateflags);
+          ninfo("conn: %p state: %02x\n", tmp, tmp->tcpstateflags);
 
           /* Is this connection in a state we can sacrifice. */
 
@@ -760,7 +759,7 @@ FAR struct tcp_conn_s *tcp_alloc(uint8_t domain)
 
       if (conn != NULL)
         {
-          nlldbg("Closing unestablished connection: %p\n", conn);
+          nwarn("WARNING: Closing unestablished connection: %p\n", conn);
 
           /* Yes... free it.  This will remove the connection from the list
            * of active connections and release all resources held by the
@@ -784,7 +783,7 @@ FAR struct tcp_conn_s *tcp_alloc(uint8_t domain)
     }
 #endif
 
-  net_unlock(flags);
+  net_unlock();
 
   /* Mark the connection allocated */
 
@@ -816,7 +815,6 @@ void tcp_free(FAR struct tcp_conn_s *conn)
 #ifdef CONFIG_NET_TCP_WRITE_BUFFERS
   FAR struct tcp_wrbuffer_s *wrbuffer;
 #endif
-  net_lock_t flags;
 
   /* Because g_free_tcp_connections is accessed from user level and interrupt
    * level, code, it is necessary to keep interrupts disabled during this
@@ -824,7 +822,7 @@ void tcp_free(FAR struct tcp_conn_s *conn)
    */
 
   DEBUGASSERT(conn->crefs == 0);
-  flags = net_lock();
+  net_lock();
 
   /* Free remaining callbacks, actually there should be only the close callback
    * left.
@@ -889,7 +887,7 @@ void tcp_free(FAR struct tcp_conn_s *conn)
 
   conn->tcpstateflags = TCP_CLOSED;
   dq_addlast(&conn->node, &g_free_tcp_connections);
-  net_unlock(flags);
+  net_unlock();
 }
 
 /****************************************************************************
@@ -1066,7 +1064,7 @@ FAR struct tcp_conn_s *tcp_alloc_accept(FAR struct net_driver_s *dev,
            * probably really just assert here.
            */
 
-          ndbg("Failed to find network device: %d\n", ret);
+          nerr("ERROR: Failed to find network device: %d\n", ret);
           tcp_free(conn);
           return NULL;
         }
@@ -1083,11 +1081,12 @@ FAR struct tcp_conn_s *tcp_alloc_accept(FAR struct net_driver_s *dev,
       conn->tcpstateflags = TCP_SYN_RCVD;
 
       tcp_initsequence(conn->sndseq);
-      conn->unacked = 1;
+      conn->unacked       = 1;
 #ifdef CONFIG_NET_TCP_WRITE_BUFFERS
-      conn->expired = 0;
-      conn->isn     = 0;
-      conn->sent    = 0;
+      conn->expired       = 0;
+      conn->isn           = 0;
+      conn->sent          = 0;
+      conn->sndseq_max    = 0;
 #endif
 
       /* rcvseq should be the seqno from the incoming packet + 1. */
@@ -1181,7 +1180,6 @@ int tcp_bind(FAR struct tcp_conn_s *conn, FAR const struct sockaddr *addr)
 
 int tcp_connect(FAR struct tcp_conn_s *conn, FAR const struct sockaddr *addr)
 {
-  net_lock_t flags;
   int port;
   int ret;
 
@@ -1200,7 +1198,7 @@ int tcp_connect(FAR struct tcp_conn_s *conn, FAR const struct sockaddr *addr)
    * but the port may still be INPORT_ANY.
    */
 
-  flags = net_lock();
+  net_lock();
 
 #ifdef CONFIG_NETDEV_MULTINIC
   /* If there are multiple network devices, then we need to pass the local,
@@ -1216,7 +1214,9 @@ int tcp_connect(FAR struct tcp_conn_s *conn, FAR const struct sockaddr *addr)
   if (conn->domain == PF_INET)
 #endif
     {
-      /* Select a port that is unique for this IPv4 local address */
+      /* Select a port that is unique for this IPv4 local address (host
+       * order).
+       */
 
       port = tcp_selectport(PF_INET,
                             (FAR const union ip_addr_u *)&conn->u.ipv4.laddr,
@@ -1229,7 +1229,9 @@ int tcp_connect(FAR struct tcp_conn_s *conn, FAR const struct sockaddr *addr)
   else
 #endif
     {
-      /* Select a port that is unique for this IPv6 local address */
+      /* Select a port that is unique for this IPv6 local address (host
+       * order).
+       */
 
       port = tcp_selectport(PF_INET6,
                             (FAR const union ip_addr_u *)conn->u.ipv6.laddr,
@@ -1320,7 +1322,7 @@ int tcp_connect(FAR struct tcp_conn_s *conn, FAR const struct sockaddr *addr)
        * just assert here.
        */
 
-      ndbg("Failed to find network device: %d\n", ret);
+      nerr("ERROR: Failed to find network device: %d\n", ret);
       goto errout_with_lock;
     }
 
@@ -1344,6 +1346,7 @@ int tcp_connect(FAR struct tcp_conn_s *conn, FAR const struct sockaddr *addr)
   conn->expired    = 0;
   conn->isn        = 0;
   conn->sent       = 0;
+  conn->sndseq_max = 0;
 #endif
 
 #ifdef CONFIG_NET_TCP_READAHEAD
@@ -1365,7 +1368,7 @@ int tcp_connect(FAR struct tcp_conn_s *conn, FAR const struct sockaddr *addr)
   ret = OK;
 
 errout_with_lock:
-  net_unlock(flags);
+  net_unlock();
   return ret;
 }
 
diff --git a/net/tcp/tcp_devpoll.c b/net/tcp/tcp_devpoll.c
index 6fce807934ab85c7d573d950ab1bb07f3cb28a26..6a7f16c513bb8acc8d538bf2e26e28c2c5731e4a 100644
--- a/net/tcp/tcp_devpoll.c
+++ b/net/tcp/tcp_devpoll.c
@@ -2,7 +2,7 @@
  * net/tcp/tcp_devpoll.c
  * Driver poll for the availability of TCP TX data
  *
- *   Copyright (C) 2007-2009, 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Adapted for NuttX from logic in uIP which also has a BSD-like license:
@@ -105,8 +105,19 @@ void tcp_poll(FAR struct net_driver_s *dev, FAR struct tcp_conn_s *conn)
            * setup may not actually be used.
            */
 
-#if defined(CONFIG_NET_IPv4)
+#if defined(CONFIG_NET_IPv6) && defined(CONFIG_NET_IPv4)
+          if (conn->domain == PF_INET)
+            {
+              tcp_ipv4_select(dev);
+            }
+          else
+            {
+              tcp_ipv6_select(dev);
+            }
+
+#elif defined(CONFIG_NET_IPv4)
           tcp_ipv4_select(dev);
+
 #else /* if defined(CONFIG_NET_IPv6) */
           tcp_ipv6_select(dev);
 #endif
diff --git a/net/tcp/tcp_input.c b/net/tcp/tcp_input.c
index 19c207f6550afe9559f90a2b98378adef39801a3..184dfebb01c6b4a25e7015563bee9bf8c52b0759 100644
--- a/net/tcp/tcp_input.c
+++ b/net/tcp/tcp_input.c
@@ -71,9 +71,9 @@
  *   Handle incoming TCP input
  *
  * Parameters:
- *   dev      - The device driver structure containing the received TCP packet.
- *   tcp      - A pointer to the TCP header in the packet
- *   tcpiplen - Combined length of the IP and TCP headers
+ *   dev   - The device driver structure containing the received TCP packet.
+ *   tcp   - A pointer to the TCP header in the packet
+ *   iplen - Combined length of the IP and TCP headers
  *
  * Return:
  *   None
@@ -126,7 +126,7 @@ static void tcp_input(FAR struct net_driver_s *dev, unsigned int iplen)
       g_netstats.tcp.drop++;
       g_netstats.tcp.chkerr++;
 #endif
-      nlldbg("Bad TCP checksum\n");
+      nwarn("WARNING: Bad TCP checksum\n");
       goto drop;
     }
 
@@ -206,7 +206,7 @@ static void tcp_input(FAR struct net_driver_s *dev, unsigned int iplen)
 #ifdef CONFIG_NET_STATISTICS
               g_netstats.tcp.syndrop++;
 #endif
-              nlldbg("No free TCP connections\n");
+              nerr("ERROR: No free TCP connections\n");
               goto drop;
             }
 
@@ -308,7 +308,7 @@ found:
   if ((tcp->flags & TCP_RST) != 0)
     {
       conn->tcpstateflags = TCP_CLOSED;
-      nlldbg("RESET - TCP state: TCP_CLOSED\n");
+      nwarn("WARNING: RESET - TCP state: TCP_CLOSED\n");
 
       (void)tcp_callback(dev, conn, TCP_ABORT);
       goto drop;
@@ -364,7 +364,7 @@ found:
        */
 
 #ifdef CONFIG_NET_TCP_WRITE_BUFFERS
-      unackseq = conn->isn + conn->sent;
+      unackseq = conn->sndseq_max;
 #else
       unackseq = tcp_addsequence(conn->sndseq, conn->unacked);
 #endif
@@ -398,8 +398,8 @@ found:
 
           if ((conn->tcpstateflags & TCP_STATE_MASK) == TCP_ESTABLISHED)
             {
-              nlldbg("ERROR: conn->sndseq %d, conn->unacked %d\n",
-                     tcp_getsequence(conn->sndseq), conn->unacked);
+              nwarn("WARNING: conn->sndseq %d, conn->unacked %d\n",
+                    tcp_getsequence(conn->sndseq), conn->unacked);
               goto reset;
             }
         }
@@ -409,8 +409,8 @@ found:
        * be beyond ackseq.
        */
 
-      nllvdbg("sndseq: %08x->%08x unackseq: %08x new unacked: %d\n",
-              conn->sndseq, ackseq, unackseq, conn->unacked);
+      ninfo("sndseq: %08x->%08x unackseq: %08x new unacked: %d\n",
+            conn->sndseq, ackseq, unackseq, conn->unacked);
       tcp_setsequence(conn->sndseq, ackseq);
 
       /* Do RTT estimation, unless we have done retransmissions. */
@@ -468,10 +468,11 @@ found:
             conn->isn           = tcp_getsequence(tcp->ackno);
             tcp_setsequence(conn->sndseq, conn->isn);
             conn->sent          = 0;
+            conn->sndseq_max    = 0;
 #endif
             conn->unacked       = 0;
             flags               = TCP_CONNECTED;
-            nllvdbg("TCP state: TCP_ESTABLISHED\n");
+            ninfo("TCP state: TCP_ESTABLISHED\n");
 
             if (dev->d_len > 0)
               {
@@ -571,7 +572,7 @@ found:
             dev->d_len          = 0;
             dev->d_sndlen       = 0;
 
-            nllvdbg("TCP state: TCP_ESTABLISHED\n");
+            ninfo("TCP state: TCP_ESTABLISHED\n");
             result = tcp_callback(dev, conn, TCP_CONNECTED | TCP_NEWDATA);
             tcp_appsend(dev, conn, result);
             return;
@@ -584,7 +585,7 @@ found:
         /* The connection is closed after we send the RST */
 
         conn->tcpstateflags = TCP_CLOSED;
-        nllvdbg("Connection failed - TCP state: TCP_CLOSED\n");
+        ninfo("Connection failed - TCP state: TCP_CLOSED\n");
 
         /* We do not send resets in response to resets. */
 
@@ -640,7 +641,7 @@ found:
             conn->tcpstateflags = TCP_LAST_ACK;
             conn->unacked       = 1;
             conn->nrtx          = 0;
-            nllvdbg("TCP state: TCP_LAST_ACK\n");
+            ninfo("TCP state: TCP_LAST_ACK\n");
 
             tcp_send(dev, conn, TCP_FIN | TCP_ACK, tcpiplen);
             return;
@@ -748,7 +749,7 @@ found:
         if ((flags & TCP_ACKDATA) != 0)
           {
             conn->tcpstateflags = TCP_CLOSED;
-            nllvdbg("TCP_LAST_ACK TCP state: TCP_CLOSED\n");
+            ninfo("TCP_LAST_ACK TCP state: TCP_CLOSED\n");
 
             (void)tcp_callback(dev, conn, TCP_CLOSE);
           }
@@ -772,12 +773,12 @@ found:
                 conn->tcpstateflags = TCP_TIME_WAIT;
                 conn->timer         = 0;
                 conn->unacked       = 0;
-                nllvdbg("TCP state: TCP_TIME_WAIT\n");
+                ninfo("TCP state: TCP_TIME_WAIT\n");
               }
             else
               {
                 conn->tcpstateflags = TCP_CLOSING;
-                nllvdbg("TCP state: TCP_CLOSING\n");
+                ninfo("TCP state: TCP_CLOSING\n");
               }
 
             net_incr32(conn->rcvseq, 1);
@@ -789,7 +790,7 @@ found:
           {
             conn->tcpstateflags = TCP_FIN_WAIT_2;
             conn->unacked = 0;
-            nllvdbg("TCP state: TCP_FIN_WAIT_2\n");
+            ninfo("TCP state: TCP_FIN_WAIT_2\n");
             goto drop;
           }
 
@@ -811,7 +812,7 @@ found:
           {
             conn->tcpstateflags = TCP_TIME_WAIT;
             conn->timer         = 0;
-            nllvdbg("TCP state: TCP_TIME_WAIT\n");
+            ninfo("TCP state: TCP_TIME_WAIT\n");
 
             net_incr32(conn->rcvseq, 1);
             (void)tcp_callback(dev, conn, TCP_CLOSE);
@@ -836,7 +837,7 @@ found:
           {
             conn->tcpstateflags = TCP_TIME_WAIT;
             conn->timer        = 0;
-            nllvdbg("TCP state: TCP_TIME_WAIT\n");
+            ninfo("TCP state: TCP_TIME_WAIT\n");
           }
 
       default:
diff --git a/net/tcp/tcp_listen.c b/net/tcp/tcp_listen.c
index b4990ba1663eb068a0aa2ae0ce620a836efef5fc..8a10fd9b57f6583fac5146003ebd6b4b52f24427 100644
--- a/net/tcp/tcp_listen.c
+++ b/net/tcp/tcp_listen.c
@@ -141,11 +141,10 @@ void tcp_listen_initialize(void)
 
 int tcp_unlisten(FAR struct tcp_conn_s *conn)
 {
-  net_lock_t flags;
   int ndx;
   int ret = -EINVAL;
 
-  flags = net_lock();
+  net_lock();
   for (ndx = 0; ndx < CONFIG_NET_MAX_LISTENPORTS; ndx++)
     {
       if (tcp_listenports[ndx] == conn)
@@ -156,7 +155,7 @@ int tcp_unlisten(FAR struct tcp_conn_s *conn)
         }
     }
 
-  net_unlock(flags);
+  net_unlock();
   return ret;
 }
 
@@ -173,7 +172,6 @@ int tcp_unlisten(FAR struct tcp_conn_s *conn)
 
 int tcp_listen(FAR struct tcp_conn_s *conn)
 {
-  net_lock_t flags;
   int ndx;
   int ret;
 
@@ -181,7 +179,7 @@ int tcp_listen(FAR struct tcp_conn_s *conn)
    * is accessed from interrupt level as well.
    */
 
-  flags = net_lock();
+  net_lock();
 
   /* First, check if there is already a socket listening on this port */
 
@@ -216,7 +214,7 @@ int tcp_listen(FAR struct tcp_conn_s *conn)
         }
     }
 
-  net_unlock(flags);
+  net_unlock();
   return ret;
 }
 
diff --git a/net/tcp/tcp_netpoll.c b/net/tcp/tcp_netpoll.c
index 522c00986b82e2e0072a005e91f019a733a0a350..733c8c89e8d6d533570fca26af4f2207d4968100 100644
--- a/net/tcp/tcp_netpoll.c
+++ b/net/tcp/tcp_netpoll.c
@@ -93,7 +93,7 @@ static uint16_t tcp_poll_interrupt(FAR struct net_driver_s *dev, FAR void *conn,
 {
   FAR struct tcp_poll_s *info = (FAR struct tcp_poll_s *)pvpriv;
 
-  nllvdbg("flags: %04x\n", flags);
+  ninfo("flags: %04x\n", flags);
 
   DEBUGASSERT(!info || (info->psock && info->fds));
 
@@ -164,12 +164,11 @@ int tcp_pollsetup(FAR struct socket *psock, FAR struct pollfd *fds)
   FAR struct tcp_conn_s *conn = psock->s_conn;
   FAR struct tcp_poll_s *info;
   FAR struct devif_callback_s *cb;
-  net_lock_t flags;
   int ret;
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!conn || !fds)
     {
       return -EINVAL;
@@ -186,7 +185,7 @@ int tcp_pollsetup(FAR struct socket *psock, FAR struct pollfd *fds)
 
   /* Some of the  following must be atomic */
 
-  flags = net_lock();
+  net_lock();
 
   /* Allocate a TCP/IP callback structure */
 
@@ -296,12 +295,12 @@ int tcp_pollsetup(FAR struct socket *psock, FAR struct pollfd *fds)
       sem_post(fds->sem);
     }
 
-  net_unlock(flags);
+  net_unlock();
   return OK;
 
 errout_with_lock:
   kmm_free(info);
-  net_unlock(flags);
+  net_unlock();
   return ret;
 }
 
@@ -325,11 +324,10 @@ int tcp_pollteardown(FAR struct socket *psock, FAR struct pollfd *fds)
 {
   FAR struct tcp_conn_s *conn = psock->s_conn;
   FAR struct tcp_poll_s *info;
-  net_lock_t flags;
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!conn || !fds->priv)
     {
       return -EINVAL;
@@ -344,9 +342,9 @@ int tcp_pollteardown(FAR struct socket *psock, FAR struct pollfd *fds)
     {
       /* Release the callback */
 
-      flags = net_lock();
+      net_lock();
       tcp_callback_free(conn, info->cb);
-      net_unlock(flags);
+      net_unlock();
 
       /* Release the poll/select data slot */
 
diff --git a/net/tcp/tcp_send.c b/net/tcp/tcp_send.c
index 14affd53de92a05bd9d1347bd146d1756e7fe49d..edce06a196f30f4b9c2860863a03aa69f03e86be 100644
--- a/net/tcp/tcp_send.c
+++ b/net/tcp/tcp_send.c
@@ -167,7 +167,7 @@ static inline void tcp_ipv4_sendcomplete(FAR struct net_driver_s *dev,
   ipv4->ipchksum    = 0;
   ipv4->ipchksum    = ~ipv4_chksum(dev);
 
-  nllvdbg("IPv4 length: %d\n", ((int)ipv4->len[0] << 8) + ipv4->len[1]);
+  ninfo("IPv4 length: %d\n", ((int)ipv4->len[0] << 8) + ipv4->len[1]);
 
 #ifdef CONFIG_NET_STATISTICS
   g_netstats.ipv4.sent++;
@@ -230,7 +230,7 @@ static inline void tcp_ipv6_sendcomplete(FAR struct net_driver_s *dev,
   ipv6->tcf    = 0x00;
   ipv6->flow   = 0x00;
 
-  nllvdbg("IPv6 length: %d\n", ((int)ipv6->len[0] << 8) + ipv6->len[1]);
+  ninfo("IPv6 length: %d\n", ((int)ipv6->len[0] << 8) + ipv6->len[1]);
 
 #ifdef CONFIG_NET_STATISTICS
   g_netstats.ipv6.sent++;
@@ -277,7 +277,7 @@ static void tcp_sendcomplete(FAR struct net_driver_s *dev,
     }
 #endif /* CONFIG_NET_IPv4 */
 
-  nllvdbg("Outgoing TCP packet length: %d bytes\n", dev->d_len);
+  ninfo("Outgoing TCP packet length: %d bytes\n", dev->d_len);
 
 #ifdef CONFIG_NET_STATISTICS
   g_netstats.tcp.sent++;
diff --git a/net/tcp/tcp_send_buffered.c b/net/tcp/tcp_send_buffered.c
index af4766c30981d683fdbc5589d556461b2c6c2bef..e3c12aed7e6be9b8eb8bff9cce55f5e920ad8acc 100644
--- a/net/tcp/tcp_send_buffered.c
+++ b/net/tcp/tcp_send_buffered.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * net/tcp/tcp_send_buffered.c
  *
- *   Copyright (C) 2007-2014, 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2014, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *           Jason Jiang  
  *
@@ -43,7 +43,7 @@
 #if defined(CONFIG_NET) && defined(CONFIG_NET_TCP) && \
     defined(CONFIG_NET_TCP_WRITE_BUFFERS)
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_NET_TCP_WRBUFFER_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_NET_TCP_WRBUFFER_DEBUG)
 /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
@@ -201,7 +201,8 @@ static inline void psock_lost_connection(FAR struct socket *psock,
 
   sq_init(&conn->unacked_q);
   sq_init(&conn->write_q);
-  conn->sent = 0;
+  conn->sent       = 0;
+  conn->sndseq_max = 0;
 }
 
 /****************************************************************************
@@ -227,21 +228,21 @@ static inline void psock_lost_connection(FAR struct socket *psock,
 
 #ifdef NEED_IPDOMAIN_SUPPORT
 static inline void send_ipselect(FAR struct net_driver_s *dev,
-                                 FAR struct socket *psock)
+                                 FAR struct tcp_conn_s *conn)
 {
   /* Which domain the the socket support */
 
-  if (psock->s_domain == PF_INET)
+  if (conn->domain == PF_INET)
     {
       /* Select the IPv4 domain */
 
       tcp_ipv4_select(dev);
     }
-  else /* if (psock->s_domain == PF_INET6) */
+  else /* if (conn->domain == PF_INET6) */
     {
       /* Select the IPv6 domain */
 
-      DEBUGASSERT(psock->s_domain == PF_INET6);
+      DEBUGASSERT(conn->domain == PF_INET6);
       tcp_ipv4_select(dev);
     }
 }
@@ -349,7 +350,7 @@ static uint16_t psock_send_interrupt(FAR struct net_driver_s *dev,
     }
 #endif
 
-  nllvdbg("flags: %04x\n", flags);
+  ninfo("flags: %04x\n", flags);
 
   /* If this packet contains an acknowledgement, then update the count of
    * acknowledged bytes.
@@ -388,7 +389,7 @@ static uint16_t psock_send_interrupt(FAR struct net_driver_s *dev,
       /* Get the ACK number from the TCP header */
 
       ackno = tcp_getsequence(tcp->ackno);
-      nllvdbg("ACK: ackno=%u flags=%04x\n", ackno, flags);
+      ninfo("ACK: ackno=%u flags=%04x\n", ackno, flags);
 
       /* Look at every write buffer in the unacked_q.  The unacked_q
        * holds write buffers that have been entirely sent, but which
@@ -414,14 +415,14 @@ static uint16_t psock_send_interrupt(FAR struct net_driver_s *dev,
               /* Get the sequence number at the end of the data */
 
               lastseq = WRB_SEQNO(wrb) + WRB_PKTLEN(wrb);
-              nllvdbg("ACK: wrb=%p seqno=%u lastseq=%u pktlen=%u ackno=%u\n",
-                      wrb, WRB_SEQNO(wrb), lastseq, WRB_PKTLEN(wrb), ackno);
+              ninfo("ACK: wrb=%p seqno=%u lastseq=%u pktlen=%u ackno=%u\n",
+                    wrb, WRB_SEQNO(wrb), lastseq, WRB_PKTLEN(wrb), ackno);
 
               /* Has the entire buffer been ACKed? */
 
               if (ackno >= lastseq)
                 {
-                  nllvdbg("ACK: wrb=%p Freeing write buffer\n", wrb);
+                  ninfo("ACK: wrb=%p Freeing write buffer\n", wrb);
 
                   /* Yes... Remove the write buffer from ACK waiting queue */
 
@@ -449,7 +450,7 @@ static uint16_t psock_send_interrupt(FAR struct net_driver_s *dev,
                       trimlen = WRB_SENT(wrb);
                     }
 
-                  nllvdbg("ACK: wrb=%p trim %u bytes\n", wrb, trimlen);
+                  ninfo("ACK: wrb=%p trim %u bytes\n", wrb, trimlen);
 
                   WRB_TRIM(wrb, trimlen);
                   WRB_SEQNO(wrb) = ackno;
@@ -457,7 +458,7 @@ static uint16_t psock_send_interrupt(FAR struct net_driver_s *dev,
 
                   /* Set the new sequence number for what remains */
 
-                  nllvdbg("ACK: wrb=%p seqno=%u pktlen=%u\n",
+                  ninfo("ACK: wrb=%p seqno=%u pktlen=%u\n",
                           wrb, WRB_SEQNO(wrb), WRB_PKTLEN(wrb));
                 }
             }
@@ -483,8 +484,8 @@ static uint16_t psock_send_interrupt(FAR struct net_driver_s *dev,
               nacked = WRB_SENT(wrb);
             }
 
-          nllvdbg("ACK: wrb=%p seqno=%u nacked=%u sent=%u ackno=%u\n",
-                  wrb, WRB_SEQNO(wrb), nacked, WRB_SENT(wrb), ackno);
+          ninfo("ACK: wrb=%p seqno=%u nacked=%u sent=%u ackno=%u\n",
+                wrb, WRB_SEQNO(wrb), nacked, WRB_SENT(wrb), ackno);
 
           /* Trim the ACKed bytes from the beginning of the write buffer. */
 
@@ -492,8 +493,8 @@ static uint16_t psock_send_interrupt(FAR struct net_driver_s *dev,
           WRB_SEQNO(wrb) = ackno;
           WRB_SENT(wrb) -= nacked;
 
-          nllvdbg("ACK: wrb=%p seqno=%u pktlen=%u sent=%u\n",
-                  wrb, WRB_SEQNO(wrb), WRB_PKTLEN(wrb), WRB_SENT(wrb));
+          ninfo("ACK: wrb=%p seqno=%u pktlen=%u sent=%u\n",
+                wrb, WRB_SEQNO(wrb), WRB_PKTLEN(wrb), WRB_SENT(wrb));
         }
     }
 
@@ -501,7 +502,7 @@ static uint16_t psock_send_interrupt(FAR struct net_driver_s *dev,
 
   else if ((flags & TCP_DISCONN_EVENTS) != 0)
     {
-      nllvdbg("Lost connection: %04x\n", flags);
+      ninfo("Lost connection: %04x\n", flags);
 
       if (psock->s_conn != NULL)
         {
@@ -523,14 +524,14 @@ static uint16_t psock_send_interrupt(FAR struct net_driver_s *dev,
       FAR struct tcp_wrbuffer_s *wrb;
       FAR sq_entry_t *entry;
 
-      nllvdbg("REXMIT: %04x\n", flags);
+      ninfo("REXMIT: %04x\n", flags);
 
       /* If there is a partially sent write buffer at the head of the
        * write_q?  Has anything been sent from that write buffer?
        */
 
       wrb = (FAR struct tcp_wrbuffer_s *)sq_peek(&conn->write_q);
-      nllvdbg("REXMIT: wrb=%p sent=%u\n", wrb, wrb ? WRB_SENT(wrb) : 0);
+      ninfo("REXMIT: wrb=%p sent=%u\n", wrb, wrb ? WRB_SENT(wrb) : 0);
 
       if (wrb != NULL && WRB_SENT(wrb) > 0)
         {
@@ -559,14 +560,15 @@ static uint16_t psock_send_interrupt(FAR struct net_driver_s *dev,
             }
 
           WRB_SENT(wrb) = 0;
-          nllvdbg("REXMIT: wrb=%p sent=%u, conn unacked=%d sent=%d\n",
-                  wrb, WRB_SENT(wrb), conn->unacked, conn->sent);
+          ninfo("REXMIT: wrb=%p sent=%u, conn unacked=%d sent=%d\n",
+                wrb, WRB_SENT(wrb), conn->unacked, conn->sent);
 
           /* Increment the retransmit count on this write buffer. */
 
           if (++WRB_NRTX(wrb) >= TCP_MAXRTX)
             {
-              nlldbg("Expiring wrb=%p nrtx=%u\n", wrb, WRB_NRTX(wrb));
+              nwarn("WARNING: Expiring wrb=%p nrtx=%u\n",
+                    wrb, WRB_NRTX(wrb));
 
               /* The maximum retry count as been exhausted. Remove the write
                * buffer at the head of the queue.
@@ -624,14 +626,15 @@ static uint16_t psock_send_interrupt(FAR struct net_driver_s *dev,
             }
 
           WRB_SENT(wrb) = 0;
-          nllvdbg("REXMIT: wrb=%p sent=%u, conn unacked=%d sent=%d\n",
-                  wrb, WRB_SENT(wrb), conn->unacked, conn->sent);
+          ninfo("REXMIT: wrb=%p sent=%u, conn unacked=%d sent=%d\n",
+                wrb, WRB_SENT(wrb), conn->unacked, conn->sent);
 
           /* Free any write buffers that have exceed the retry count */
 
           if (++WRB_NRTX(wrb) >= TCP_MAXRTX)
             {
-              nlldbg("Expiring wrb=%p nrtx=%u\n", wrb, WRB_NRTX(wrb));
+              nwarn("WARNING: Expiring wrb=%p nrtx=%u\n",
+                    wrb, WRB_NRTX(wrb));
 
               /* Return the write buffer to the free list */
 
@@ -652,11 +655,11 @@ static uint16_t psock_send_interrupt(FAR struct net_driver_s *dev,
             {
               /* Insert the write buffer into the write_q (in sequence
                * number order).  The retransmission will occur below
-               * when the write buffer with the lowest sequenc number
+               * when the write buffer with the lowest sequence number
                * is pulled from the write_q again.
                */
 
-              nllvdbg("REXMIT: Moving wrb=%p nrtx=%u\n", wrb, WRB_NRTX(wrb));
+              ninfo("REXMIT: Moving wrb=%p nrtx=%u\n", wrb, WRB_NRTX(wrb));
 
               psock_insert_segment(wrb, &conn->write_q);
             }
@@ -694,6 +697,7 @@ static uint16_t psock_send_interrupt(FAR struct net_driver_s *dev,
       if (psock_send_addrchck(conn))
         {
           FAR struct tcp_wrbuffer_s *wrb;
+          uint32_t predicted_seqno;
           size_t sndlen;
 
           /* Peek at the head of the write queue (but don't remove anything
@@ -721,8 +725,8 @@ static uint16_t psock_send_interrupt(FAR struct net_driver_s *dev,
               sndlen = conn->winsize;
             }
 
-          nllvdbg("SEND: wrb=%p pktlen=%u sent=%u sndlen=%u\n",
-                  wrb, WRB_PKTLEN(wrb), WRB_SENT(wrb), sndlen);
+          ninfo("SEND: wrb=%p pktlen=%u sent=%u sndlen=%u\n",
+                wrb, WRB_PKTLEN(wrb), WRB_SENT(wrb), sndlen);
 
           /* Set the sequence number for this segment.  If we are
            * retransmitting, then the sequence number will already
@@ -750,7 +754,7 @@ static uint16_t psock_send_interrupt(FAR struct net_driver_s *dev,
            * place and we need do nothing.
            */
 
-          send_ipselect(dev, psock);
+          send_ipselect(dev, conn);
 #endif
           /* Then set-up to send that amount of data with the offset
            * corresponding to the amount of data already sent. (this
@@ -768,15 +772,25 @@ static uint16_t psock_send_interrupt(FAR struct net_driver_s *dev,
           conn->unacked += sndlen;
           conn->sent    += sndlen;
 
-          nllvdbg("SEND: wrb=%p nrtx=%u unacked=%u sent=%u\n",
-                  wrb, WRB_NRTX(wrb), conn->unacked, conn->sent);
+          /* Below prediction will become true, unless retransmission occurrence */
+
+          predicted_seqno = tcp_getsequence(conn->sndseq) + sndlen;
+
+          if ((predicted_seqno > conn->sndseq_max) ||
+              (tcp_getsequence(conn->sndseq) > predicted_seqno)) /* overflow */
+            {
+               conn->sndseq_max = predicted_seqno;
+            }
+
+          ninfo("SEND: wrb=%p nrtx=%u unacked=%u sent=%u\n",
+                wrb, WRB_NRTX(wrb), conn->unacked, conn->sent);
 
           /* Increment the count of bytes sent from this write buffer */
 
           WRB_SENT(wrb) += sndlen;
 
-          nllvdbg("SEND: wrb=%p sent=%u pktlen=%u\n",
-                  wrb, WRB_SENT(wrb), WRB_PKTLEN(wrb));
+          ninfo("SEND: wrb=%p sent=%u pktlen=%u\n",
+                wrb, WRB_SENT(wrb), WRB_PKTLEN(wrb));
 
           /* Remove the write buffer from the write queue if the
            * last of the data has been sent from the buffer.
@@ -787,7 +801,7 @@ static uint16_t psock_send_interrupt(FAR struct net_driver_s *dev,
             {
               FAR struct tcp_wrbuffer_s *tmp;
 
-              nllvdbg("SEND: wrb=%p Move to unacked_q\n", wrb);
+              ninfo("SEND: wrb=%p Move to unacked_q\n", wrb);
 
               tmp = (FAR struct tcp_wrbuffer_s *)sq_remfirst(&conn->write_q);
               DEBUGASSERT(tmp == wrb);
@@ -934,22 +948,21 @@ ssize_t psock_tcp_send(FAR struct socket *psock, FAR const void *buf,
 {
   FAR struct tcp_conn_s *conn;
   FAR struct tcp_wrbuffer_s *wrb;
-  net_lock_t save;
   ssize_t    result = 0;
-  int        err;
+  int        errcode;
   int        ret = OK;
 
   if (!psock || psock->s_crefs <= 0)
     {
-      ndbg("ERROR: Invalid socket\n");
-      err = EBADF;
+      nerr("ERROR: Invalid socket\n");
+      errcode = EBADF;
       goto errout;
     }
 
   if (psock->s_type != SOCK_STREAM || !_SS_ISCONNECTED(psock->s_flags))
     {
-      ndbg("ERROR: Not connected\n");
-      err = ENOTCONN;
+      nerr("ERROR: Not connected\n");
+      errcode = ENOTCONN;
       goto errout;
     }
 
@@ -985,8 +998,8 @@ ssize_t psock_tcp_send(FAR struct socket *psock, FAR const void *buf,
 
   if (ret < 0)
     {
-      ndbg("ERROR: Not reachable\n");
-      err = ENETUNREACH;
+      nerr("ERROR: Not reachable\n");
+      errcode = ENETUNREACH;
       goto errout;
     }
 #endif /* CONFIG_NET_ARP_SEND || CONFIG_NET_ICMPv6_NEIGHBOR */
@@ -1005,14 +1018,14 @@ ssize_t psock_tcp_send(FAR struct socket *psock, FAR const void *buf,
        * unlocked here.
        */
 
-      save = net_lock();
+      net_lock();
       wrb = tcp_wrbuffer_alloc();
       if (!wrb)
         {
           /* A buffer allocation error occurred */
 
-          ndbg("ERROR: Failed to allocate write buffer\n");
-          err = ENOMEM;
+          nerr("ERROR: Failed to allocate write buffer\n");
+          errcode = ENOMEM;
           goto errout_with_lock;
         }
 
@@ -1029,8 +1042,8 @@ ssize_t psock_tcp_send(FAR struct socket *psock, FAR const void *buf,
         {
           /* A buffer allocation error occurred */
 
-          ndbg("ERROR: Failed to allocate callback\n");
-          err = ENOMEM;
+          nerr("ERROR: Failed to allocate callback\n");
+          errcode = ENOMEM;
           goto errout_with_wrb;
         }
 
@@ -1056,14 +1069,14 @@ ssize_t psock_tcp_send(FAR struct socket *psock, FAR const void *buf,
        */
 
       sq_addlast(&wrb->wb_node, &conn->write_q);
-      nllvdbg("Queued WRB=%p pktlen=%u write_q(%p,%p)\n",
-              wrb, WRB_PKTLEN(wrb),
-              conn->write_q.head, conn->write_q.tail);
+      ninfo("Queued WRB=%p pktlen=%u write_q(%p,%p)\n",
+            wrb, WRB_PKTLEN(wrb),
+            conn->write_q.head, conn->write_q.tail);
 
       /* Notify the device driver of the availability of TX data */
 
       send_txnotify(psock, conn);
-      net_unlock(save);
+      net_unlock();
     }
 
   /* Set the socket state to idle */
@@ -1076,7 +1089,7 @@ ssize_t psock_tcp_send(FAR struct socket *psock, FAR const void *buf,
 
   if (result < 0)
     {
-      err = result;
+      errcode = result;
       goto errout;
     }
 
@@ -1086,7 +1099,7 @@ ssize_t psock_tcp_send(FAR struct socket *psock, FAR const void *buf,
 
   if (ret < 0)
     {
-      err = -ret;
+      errcode = -ret;
       goto errout;
     }
 
@@ -1098,10 +1111,10 @@ errout_with_wrb:
   tcp_wrbuffer_release(wrb);
 
 errout_with_lock:
-  net_unlock(save);
+  net_unlock();
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 }
 
@@ -1136,13 +1149,13 @@ int psock_tcp_cansend(FAR struct socket *psock)
 {
   if (!psock || psock->s_crefs <= 0)
     {
-      ndbg("ERROR: Invalid socket\n");
+      nerr("ERROR: Invalid socket\n");
       return -EBADF;
     }
 
   if (psock->s_type != SOCK_STREAM || !_SS_ISCONNECTED(psock->s_flags))
     {
-      ndbg("ERROR: Not connected\n");
+      nerr("ERROR: Not connected\n");
       return -ENOTCONN;
     }
 
diff --git a/net/tcp/tcp_send_unbuffered.c b/net/tcp/tcp_send_unbuffered.c
index 53365e3f68557c2f9296d209d7fb4ae3dd24135f..d6422437c8c41ad67fb404315c9d0562b30e933f 100644
--- a/net/tcp/tcp_send_unbuffered.c
+++ b/net/tcp/tcp_send_unbuffered.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * net/tcp/tcp_send_unbuffered.c
  *
- *   Copyright (C) 2007-2014, 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2014, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -52,7 +52,9 @@
 #include 
 
 #include 
+
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -177,24 +179,21 @@ static inline int send_timeout(FAR struct send_s *pstate)
 
 #ifdef NEED_IPDOMAIN_SUPPORT
 static inline void tcpsend_ipselect(FAR struct net_driver_s *dev,
-                                    FAR struct send_s *pstate)
+                                    FAR struct tcp_conn_s *conn)
 {
-  FAR struct socket *psock = pstate->snd_sock;
-  DEBUGASSERT(psock);
-
   /* Which domain the the socket support */
 
-  if (psock->s_domain == PF_INET)
+  if (conn->domain == PF_INET)
     {
       /* Select the IPv4 domain */
 
       tcp_ipv4_select(dev);
     }
-  else /* if (psock->s_domain == PF_INET6) */
+  else /* if (conn->domain == PF_INET6) */
     {
       /* Select the IPv6 domain */
 
-      DEBUGASSERT(psock->s_domain == PF_INET6);
+      DEBUGASSERT(conn->domain == PF_INET6);
       tcp_ipv4_select(dev);
     }
 }
@@ -302,8 +301,8 @@ static uint16_t tcpsend_interrupt(FAR struct net_driver_s *dev,
     }
 #endif
 
-  nllvdbg("flags: %04x acked: %d sent: %d\n",
-          flags, pstate->snd_acked, pstate->snd_sent);
+  ninfo("flags: %04x acked: %d sent: %d\n",
+        flags, pstate->snd_acked, pstate->snd_sent);
 
   /* If this packet contains an acknowledgement, then update the count of
    * acknowledged bytes.
@@ -348,8 +347,8 @@ static uint16_t tcpsend_interrupt(FAR struct net_driver_s *dev,
        */
 
       pstate->snd_acked = tcp_getsequence(tcp->ackno) - pstate->snd_isn;
-      nllvdbg("ACK: acked=%d sent=%d buflen=%d\n",
-              pstate->snd_acked, pstate->snd_sent, pstate->snd_buflen);
+      ninfo("ACK: acked=%d sent=%d buflen=%d\n",
+            pstate->snd_acked, pstate->snd_sent, pstate->snd_buflen);
 
       /* Have all of the bytes in the buffer been sent and acknowledged? */
 
@@ -392,7 +391,7 @@ static uint16_t tcpsend_interrupt(FAR struct net_driver_s *dev,
     {
       /* Report not connected */
 
-      nllvdbg("Lost connection\n");
+      ninfo("Lost connection\n");
 
       net_lostconnection(pstate->snd_sock, flags);
       pstate->snd_sent = -ENOTCONN;
@@ -526,7 +525,7 @@ static uint16_t tcpsend_interrupt(FAR struct net_driver_s *dev,
            */
 
           seqno = pstate->snd_sent + pstate->snd_isn;
-          nllvdbg("SEND: sndseq %08x->%08x\n", conn->sndseq, seqno);
+          ninfo("SEND: sndseq %08x->%08x\n", conn->sndseq, seqno);
           tcp_setsequence(conn->sndseq, seqno);
 
 #ifdef NEED_IPDOMAIN_SUPPORT
@@ -536,7 +535,7 @@ static uint16_t tcpsend_interrupt(FAR struct net_driver_s *dev,
            * place and we need do nothing.
            */
 
-          tcpsend_ipselect(dev, pstate);
+          tcpsend_ipselect(dev, conn);
 #endif
           /* Then set-up to send that amount of data. (this won't actually
            * happen until the polling cycle completes).
@@ -554,8 +553,8 @@ static uint16_t tcpsend_interrupt(FAR struct net_driver_s *dev,
               /* Update the amount of data sent (but not necessarily ACKed) */
 
               pstate->snd_sent += sndlen;
-              nllvdbg("SEND: acked=%d sent=%d buflen=%d\n",
-                      pstate->snd_acked, pstate->snd_sent, pstate->snd_buflen);
+              ninfo("SEND: acked=%d sent=%d buflen=%d\n",
+                    pstate->snd_acked, pstate->snd_sent, pstate->snd_buflen);
 
             }
         }
@@ -570,7 +569,7 @@ static uint16_t tcpsend_interrupt(FAR struct net_driver_s *dev,
     {
       /* Yes.. report the timeout */
 
-      nlldbg("SEND timeout\n");
+      nwarn("WARNING: SEND timeout\n");
       pstate->snd_sent = -ETIMEDOUT;
       goto end_wait;
     }
@@ -718,16 +717,15 @@ ssize_t psock_tcp_send(FAR struct socket *psock,
 {
   FAR struct tcp_conn_s *conn = (FAR struct tcp_conn_s *)psock->s_conn;
   struct send_s state;
-  net_lock_t save;
-  int err;
+  int errcode;
   int ret = OK;
 
   /* Verify that the sockfd corresponds to valid, allocated socket */
 
   if (!psock || psock->s_crefs <= 0)
     {
-      ndbg("ERROR: Invalid socket\n");
-      err = EBADF;
+      nerr("ERROR: Invalid socket\n");
+      errcode = EBADF;
       goto errout;
     }
 
@@ -735,8 +733,8 @@ ssize_t psock_tcp_send(FAR struct socket *psock,
 
   if (psock->s_type != SOCK_STREAM || !_SS_ISCONNECTED(psock->s_flags))
     {
-      ndbg("ERROR: Not connected\n");
-      err = ENOTCONN;
+      nerr("ERROR: Not connected\n");
+      errcode = ENOTCONN;
       goto errout;
     }
 
@@ -773,8 +771,8 @@ ssize_t psock_tcp_send(FAR struct socket *psock,
 
   if (ret < 0)
     {
-      ndbg("ERROR: Not reachable\n");
-      err = ENETUNREACH;
+      nerr("ERROR: Not reachable\n");
+      errcode = ENETUNREACH;
       goto errout;
     }
 #endif /* CONFIG_NET_ARP_SEND || CONFIG_NET_ICMPv6_NEIGHBOR */
@@ -790,9 +788,16 @@ ssize_t psock_tcp_send(FAR struct socket *psock,
    * are ready.
    */
 
-  save                = net_lock();
+  net_lock();
   memset(&state, 0, sizeof(struct send_s));
+
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   (void)sem_init(&state.snd_sem, 0, 0);    /* Doesn't really fail */
+  (void)sem_setprotocol(&state.snd_sem, SEM_PRIO_NONE);
+
   state.snd_sock      = psock;             /* Socket descriptor to use */
   state.snd_buflen    = len;               /* Number of bytes to send */
   state.snd_buffer    = buf;               /* Buffer to send from */
@@ -845,7 +850,7 @@ ssize_t psock_tcp_send(FAR struct socket *psock,
     }
 
   sem_destroy(&state.snd_sem);
-  net_unlock(save);
+  net_unlock();
 
   /* Set the socket state to idle */
 
@@ -857,7 +862,7 @@ ssize_t psock_tcp_send(FAR struct socket *psock,
 
   if (state.snd_sent < 0)
     {
-      err = state.snd_sent;
+      errcode = state.snd_sent;
       goto errout;
     }
 
@@ -867,7 +872,7 @@ ssize_t psock_tcp_send(FAR struct socket *psock,
 
   if (ret < 0)
     {
-      err = -ret;
+      errcode = -ret;
       goto errout;
     }
 
@@ -876,7 +881,7 @@ ssize_t psock_tcp_send(FAR struct socket *psock,
   return state.snd_sent;
 
 errout:
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 }
 
diff --git a/net/tcp/tcp_seqno.c b/net/tcp/tcp_seqno.c
index d2c5600107a35035ccf908ee3cf2f88a02f8aa6d..e3c6a75c0544bee3065098b3d70839312187a356 100644
--- a/net/tcp/tcp_seqno.c
+++ b/net/tcp/tcp_seqno.c
@@ -36,10 +36,6 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * Compilation Switches
- ****************************************************************************/
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/net/tcp/tcp_timer.c b/net/tcp/tcp_timer.c
index 0ba497bb2a143a0cd717297ed276a8d095b2f940..eeabb0910c4da4c735d6f3a3d044a52c28e04580 100644
--- a/net/tcp/tcp_timer.c
+++ b/net/tcp/tcp_timer.c
@@ -157,7 +157,7 @@ void tcp_timer(FAR struct net_driver_s *dev, FAR struct tcp_conn_s *conn,
           DEBUGASSERT(conn->dev != NULL);
           if (dev != conn->dev)
             {
-              nllvdbg("TCP: TCP_CLOSED pending\n");
+              ninfo("TCP: TCP_CLOSED pending\n");
             }
           else
 #endif
@@ -168,7 +168,7 @@ void tcp_timer(FAR struct net_driver_s *dev, FAR struct tcp_conn_s *conn,
 
               result = tcp_callback(dev, conn, TCP_TIMEDOUT);
 
-              nllvdbg("TCP state: TCP_CLOSED\n");
+              ninfo("TCP state: TCP_CLOSED\n");
             }
         }
       else
@@ -213,7 +213,7 @@ void tcp_timer(FAR struct net_driver_s *dev, FAR struct tcp_conn_s *conn,
               DEBUGASSERT(conn->dev != NULL);
               if (dev != conn->dev)
                 {
-                  nllvdbg("TCP: TCP_CLOSED pending\n");
+                  ninfo("TCP: TCP_CLOSED pending\n");
                   goto done;
                 }
 #endif
@@ -231,7 +231,7 @@ void tcp_timer(FAR struct net_driver_s *dev, FAR struct tcp_conn_s *conn,
                  )
                 {
                   conn->tcpstateflags = TCP_CLOSED;
-                  nllvdbg("TCP state: TCP_CLOSED\n");
+                  ninfo("TCP state: TCP_CLOSED\n");
 
                   /* We call tcp_callback() with TCP_TIMEDOUT to
                    * inform the application that the connection has
diff --git a/net/tcp/tcp_wrbuffer.c b/net/tcp/tcp_wrbuffer.c
index cb6c10e9d8d405c1be47d65a766b168ad8f1c2f4..149c83143d684db05059921b5efeb7f7777692f5 100644
--- a/net/tcp/tcp_wrbuffer.c
+++ b/net/tcp/tcp_wrbuffer.c
@@ -41,7 +41,7 @@
 #include 
 #if defined(CONFIG_NET) && defined(CONFIG_NET_TCP) && defined(CONFIG_NET_TCP_WRITE_BUFFERS)
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_NET_TCP_WRBUFFER_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_NET_TCP_WRBUFFER_DEBUG)
 /* Force debug output (from this file only) */
 
 #  undef  CONFIG_DEBUG_NET
@@ -160,7 +160,7 @@ FAR struct tcp_wrbuffer_s *tcp_wrbuffer_alloc(void)
   wrb->wb_iob = iob_alloc(false);
   if (!wrb->wb_iob)
     {
-      ndbg("ERROR: Failed to allocate I/O buffer\n");
+      nerr("ERROR: Failed to allocate I/O buffer\n");
       tcp_wrbuffer_release(wrb);
       return NULL;
     }
diff --git a/net/tcp/tcp_wrbuffer_dump.c b/net/tcp/tcp_wrbuffer_dump.c
index 5458519195d27158f53479b601dc63dddbf2ad34..6d1fbf85f6b8368ada55fb68ef117aeb066f006a 100644
--- a/net/tcp/tcp_wrbuffer_dump.c
+++ b/net/tcp/tcp_wrbuffer_dump.c
@@ -46,7 +46,7 @@
 
 #include "tcp/tcp.h"
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
 
 /****************************************************************************
  * Public Functions
@@ -63,9 +63,9 @@
 void tcp_wrbuffer_dump(FAR const char *msg, FAR struct tcp_wrbuffer_s *wrb,
                        unsigned int len, unsigned int offset)
 {
-  lowsyslog(LOG_DEBUG, "%s: wrb=%p segno=%d sent=%d nrtx=%d\n",
-            msg, wrb, WRB_SEQNO(wrb), WRB_SENT(wrb), WRB_NRTX(wrb));
+  syslog(LOG_DEBUG, "%s: wrb=%p segno=%d sent=%d nrtx=%d\n",
+         msg, wrb, WRB_SEQNO(wrb), WRB_SENT(wrb), WRB_NRTX(wrb));
   iob_dump("I/O Buffer Chain", WRB_IOB(wrb), len, offset);
 }
 
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_FEATURES */
diff --git a/net/udp/udp_callback.c b/net/udp/udp_callback.c
index 86b733f81a3de4da34f4bfb93425f8c01fe52d5c..74c0527fae8a4542a4d272b280b3fde69b114eb9 100644
--- a/net/udp/udp_callback.c
+++ b/net/udp/udp_callback.c
@@ -98,7 +98,7 @@ static uint16_t udp_datahandler(FAR struct net_driver_s *dev, FAR struct udp_con
   iob = iob_tryalloc(true);
   if (iob == NULL)
     {
-      nlldbg("ERROR: Failed to create new I/O buffer chain\n");
+      nerr("ERROR: Failed to create new I/O buffer chain\n");
       return 0;
     }
 
@@ -178,7 +178,7 @@ static uint16_t udp_datahandler(FAR struct net_driver_s *dev, FAR struct udp_con
        * not free any I/O buffers.
        */
 
-      nlldbg("ERROR: Failed to add data to the I/O buffer chain: %d\n", ret);
+      nerr("ERROR: Failed to add data to the I/O buffer chain: %d\n", ret);
       (void)iob_free_chain(iob);
       return 0;
     }
@@ -191,7 +191,7 @@ static uint16_t udp_datahandler(FAR struct net_driver_s *dev, FAR struct udp_con
        * not free any I/O buffers.
        */
 
-      nlldbg("ERROR: Failed to add data to the I/O buffer chain: %d\n", ret);
+      nerr("ERROR: Failed to add data to the I/O buffer chain: %d\n", ret);
       (void)iob_free_chain(iob);
       return 0;
     }
@@ -208,8 +208,8 @@ static uint16_t udp_datahandler(FAR struct net_driver_s *dev, FAR struct udp_con
            * does not free any I/O buffers.
            */
 
-          nlldbg("ERROR: Failed to add data to the I/O buffer chain: %d\n",
-                 ret);
+          nerr("ERROR: Failed to add data to the I/O buffer chain: %d\n",
+               ret);
           (void)iob_free_chain(iob);
           return 0;
         }
@@ -220,12 +220,12 @@ static uint16_t udp_datahandler(FAR struct net_driver_s *dev, FAR struct udp_con
   ret = iob_tryadd_queue(iob, &conn->readahead);
   if (ret < 0)
     {
-      nlldbg("ERROR: Failed to queue the I/O buffer chain: %d\n", ret);
+      nerr("ERROR: Failed to queue the I/O buffer chain: %d\n", ret);
       (void)iob_free_chain(iob);
       return 0;
     }
 
-  nllvdbg("Buffered %d bytes\n", buflen);
+  ninfo("Buffered %d bytes\n", buflen);
   return buflen;
 }
 #endif /* CONFIG_NET_UDP_READAHEAD */
@@ -255,7 +255,7 @@ net_dataevent(FAR struct net_driver_s *dev, FAR struct udp_conn_s *conn,
    * can have zero-length with UDP_NEWDATA set just to cause an ACK).
    */
 
-  nllvdbg("No receive on connection\n");
+  ninfo("No receive on connection\n");
 
 #ifdef CONFIG_NET_UDP_READAHEAD
   /* Save as the packet data as in the read-ahead buffer.  NOTE that
@@ -270,7 +270,7 @@ net_dataevent(FAR struct net_driver_s *dev, FAR struct udp_conn_s *conn,
        * read-ahead buffers to retain the data -- drop the packet.
        */
 
-     nllvdbg("Dropped %d bytes\n", dev->d_len);
+     ninfo("Dropped %d bytes\n", dev->d_len);
 
 #ifdef CONFIG_NET_STATISTICS
       g_netstats.udp.drop++;
@@ -304,7 +304,7 @@ net_dataevent(FAR struct net_driver_s *dev, FAR struct udp_conn_s *conn,
 uint16_t udp_callback(FAR struct net_driver_s *dev,
                       FAR struct udp_conn_s *conn, uint16_t flags)
 {
-  nllvdbg("flags: %04x\n", flags);
+  ninfo("flags: %04x\n", flags);
 
   /* Some sanity checking */
 
diff --git a/net/udp/udp_conn.c b/net/udp/udp_conn.c
index 1f5ecd095c6b997dad95c9f1b9ee677068709541..964846e91de3b2647ee28a8f48fa432bd4bdccb1 100644
--- a/net/udp/udp_conn.c
+++ b/net/udp/udp_conn.c
@@ -229,7 +229,7 @@ static uint16_t udp_select_port(void)
    * listen port number that is not being used by any other connection.
    */
 
-  net_lock_t flags = net_lock();
+  net_lock();
   do
     {
       /* Guess that the next available port number will be the one after
@@ -256,7 +256,7 @@ static uint16_t udp_select_port(void)
    */
 
   portno = g_last_udp_port;
-  net_unlock(flags);
+  net_unlock();
 
   return portno;
 }
@@ -576,7 +576,6 @@ FAR struct udp_conn_s *udp_nextconn(FAR struct udp_conn_s *conn)
 
 int udp_bind(FAR struct udp_conn_s *conn, FAR const struct sockaddr *addr)
 {
-  net_lock_t flags;
   uint16_t portno;
   int ret;
 
@@ -643,7 +642,7 @@ int udp_bind(FAR struct udp_conn_s *conn, FAR const struct sockaddr *addr)
     {
       /* Interrupts must be disabled while access the UDP connection list */
 
-      flags = net_lock();
+      net_lock();
 
       /* Is any other UDP connection already bound to this address and port? */
 
@@ -659,7 +658,7 @@ int udp_bind(FAR struct udp_conn_s *conn, FAR const struct sockaddr *addr)
           ret         = OK;
         }
 
-      net_unlock(flags);
+      net_unlock();
     }
 
   return ret;
diff --git a/net/udp/udp_input.c b/net/udp/udp_input.c
index 640fd617ad784081198c56db99e5c82d8fb55da9..6678e3e4b50194f6d89b6c63c7053ac676c5271e 100644
--- a/net/udp/udp_input.c
+++ b/net/udp/udp_input.c
@@ -67,9 +67,9 @@
  *   Handle incoming UDP input
  *
  * Parameters:
- *   dev      - The device driver structure containing the received UDP packet
- *   udp      - A pointer to the UDP header in the packet
- *   udpiplen - Length of the IP and UDP headers
+ *   dev   - The device driver structure containing the received UDP packet
+ *   udp   - A pointer to the UDP header in the packet
+ *   iplen - Length of the IP and UDP headers
  *
  * Return:
  *   OK  The packet has been processed  and can be deleted
@@ -149,7 +149,7 @@ static int udp_input(FAR struct net_driver_s *dev, unsigned int iplen)
       g_netstats.udp.drop++;
       g_netstats.udp.chkerr++;
 #endif
-      nlldbg("Bad UDP checksum\n");
+      nwarn("WARNING: Bad UDP checksum\n");
       dev->d_len = 0;
     }
   else
@@ -207,7 +207,7 @@ static int udp_input(FAR struct net_driver_s *dev, unsigned int iplen)
         }
       else
         {
-          nlldbg("No listener on UDP port\n");
+          nwarn("WARNING: No listener on UDP port\n");
           dev->d_len = 0;
         }
     }
diff --git a/net/udp/udp_netpoll.c b/net/udp/udp_netpoll.c
index 07772b6604453c4f28ca9b45789fa34d62b9801a..6dd873aaec0fe37162c35d1e599a90a6e0350296 100644
--- a/net/udp/udp_netpoll.c
+++ b/net/udp/udp_netpoll.c
@@ -93,7 +93,7 @@ static uint16_t udp_poll_interrupt(FAR struct net_driver_s *dev, FAR void *conn,
 {
   FAR struct udp_poll_s *info = (FAR struct udp_poll_s *)pvpriv;
 
-  nllvdbg("flags: %04x\n", flags);
+  ninfo("flags: %04x\n", flags);
 
   DEBUGASSERT(!info || (info->psock && info->fds));
 
@@ -161,12 +161,11 @@ int udp_pollsetup(FAR struct socket *psock, FAR struct pollfd *fds)
   FAR struct udp_conn_s *conn = psock->s_conn;
   FAR struct udp_poll_s *info;
   FAR struct devif_callback_s *cb;
-  net_lock_t flags;
   int ret;
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!conn || !fds)
     {
       return -EINVAL;
@@ -183,7 +182,7 @@ int udp_pollsetup(FAR struct socket *psock, FAR struct pollfd *fds)
 
   /* Some of the  following must be atomic */
 
-  flags = net_lock();
+  net_lock();
 
   /* Get the device that will provide the provide the NETDEV_DOWN event.
    * NOTE: in the event that the local socket is bound to INADDR_ANY, the
@@ -262,12 +261,12 @@ int udp_pollsetup(FAR struct socket *psock, FAR struct pollfd *fds)
       sem_post(fds->sem);
     }
 
-  net_unlock(flags);
+  net_unlock();
   return OK;
 
 errout_with_lock:
   kmm_free(info);
-  net_unlock(flags);
+  net_unlock();
   return ret;
 }
 
@@ -291,11 +290,10 @@ int udp_pollteardown(FAR struct socket *psock, FAR struct pollfd *fds)
 {
   FAR struct udp_conn_s *conn = psock->s_conn;
   FAR struct udp_poll_s *info;
-  net_lock_t flags;
 
   /* Sanity check */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!conn || !fds->priv)
     {
       return -EINVAL;
@@ -310,9 +308,9 @@ int udp_pollteardown(FAR struct socket *psock, FAR struct pollfd *fds)
     {
       /* Release the callback */
 
-      flags = net_lock();
+      net_lock();
       udp_callback_free(info->dev, conn, info->cb);
-      net_unlock(flags);
+      net_unlock();
 
       /* Release the poll/select data slot */
 
diff --git a/net/udp/udp_psock_sendto.c b/net/udp/udp_psock_sendto.c
index 71fbe55af186a569eee4040440ed648958e63d79..84564f8a7e2609e9466f4078eb2ac707154b9e9f 100644
--- a/net/udp/udp_psock_sendto.c
+++ b/net/udp/udp_psock_sendto.c
@@ -47,6 +47,7 @@
 #include 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -224,7 +225,7 @@ static uint16_t sendto_interrupt(FAR struct net_driver_s *dev, FAR void *conn,
 {
   FAR struct sendto_s *pstate = (FAR struct sendto_s *)pvpriv;
 
-  nllvdbg("flags: %04x\n", flags);
+  ninfo("flags: %04x\n", flags);
   if (pstate)
     {
       /* If the network device has gone down, then we will have terminate
@@ -235,7 +236,7 @@ static uint16_t sendto_interrupt(FAR struct net_driver_s *dev, FAR void *conn,
         {
           /* Terminate the transfer with an error. */
 
-          nlldbg("ERROR: Network is down\n");
+          nwarn("WARNING: Network is down\n");
           pstate->st_sndlen = -ENETUNREACH;
         }
 
@@ -257,7 +258,7 @@ static uint16_t sendto_interrupt(FAR struct net_driver_s *dev, FAR void *conn,
             {
               /* Yes.. report the timeout */
 
-              nlldbg("ERROR: SEND timeout\n");
+              nwarn("WARNING: SEND timeout\n");
               pstate->st_sndlen = -ETIMEDOUT;
             }
           else
@@ -339,7 +340,6 @@ ssize_t psock_udp_sendto(FAR struct socket *psock, FAR const void *buf,
   FAR struct udp_conn_s *conn;
   FAR struct net_driver_s *dev;
   struct sendto_s state;
-  net_lock_t save;
   int ret;
 
 #if defined(CONFIG_NET_ARP_SEND) || defined(CONFIG_NET_ICMPv6_NEIGHBOR)
@@ -375,7 +375,7 @@ ssize_t psock_udp_sendto(FAR struct socket *psock, FAR const void *buf,
 
   if (ret < 0)
     {
-      ndbg("ERROR: Peer not reachable\n");
+      nerr("ERROR: Peer not reachable\n");
       return -ENETUNREACH;
     }
 #endif /* CONFIG_NET_ARP_SEND || CONFIG_NET_ICMPv6_NEIGHBOR */
@@ -389,9 +389,16 @@ ssize_t psock_udp_sendto(FAR struct socket *psock, FAR const void *buf,
    * are ready.
    */
 
-  save = net_lock();
+  net_lock();
   memset(&state, 0, sizeof(struct sendto_s));
+
+  /* This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
   sem_init(&state.st_sem, 0, 0);
+  sem_setprotocol(&state.st_sem, SEM_PRIO_NONE);
+
   state.st_buflen = len;
   state.st_buffer = buf;
 
@@ -419,7 +426,7 @@ ssize_t psock_udp_sendto(FAR struct socket *psock, FAR const void *buf,
   ret = udp_connect(conn, to);
   if (ret < 0)
     {
-      ndbg("ERROR: udp_connect failed: %d\n", ret);
+      nerr("ERROR: udp_connect failed: %d\n", ret);
       goto errout_with_lock;
     }
 
@@ -430,7 +437,7 @@ ssize_t psock_udp_sendto(FAR struct socket *psock, FAR const void *buf,
   dev = udp_find_raddr_device(conn);
   if (dev == NULL)
     {
-      ndbg("ERROR: udp_find_raddr_device failed\n");
+      nerr("ERROR: udp_find_raddr_device failed\n");
       ret = -ENETUNREACH;
       goto errout_with_lock;
    }
@@ -476,7 +483,7 @@ errout_with_lock:
 
   /* Unlock the network and return the result of the sendto() operation */
 
-  net_unlock(save);
+  net_unlock();
   return ret;
 }
 
diff --git a/net/udp/udp_send.c b/net/udp/udp_send.c
index b764fade4204bdbe38de7b781a8a5ebff72dd4c5..f58bdf5a134f1c9275c5145acce1fa9777e24a10 100644
--- a/net/udp/udp_send.c
+++ b/net/udp/udp_send.c
@@ -100,7 +100,7 @@ void udp_send(FAR struct net_driver_s *dev, FAR struct udp_conn_s *conn)
 {
   FAR struct udp_hdr_s *udp;
 
-  nllvdbg("UDP payload: %d (%d) bytes\n", dev->d_sndlen, dev->d_len);
+  ninfo("UDP payload: %d (%d) bytes\n", dev->d_sndlen, dev->d_len);
 
   if (dev->d_sndlen > 0)
     {
@@ -252,7 +252,7 @@ void udp_send(FAR struct net_driver_s *dev, FAR struct udp_conn_s *conn)
         }
 #endif /* CONFIG_NET_UDP_CHECKSUMS */
 
-      nllvdbg("Outgoing UDP packet length: %d\n", dev->d_len);
+      ninfo("Outgoing UDP packet length: %d\n", dev->d_len);
 
 #ifdef CONFIG_NET_STATISTICS
       g_netstats.udp.sent++;
diff --git a/net/utils/Make.defs b/net/utils/Make.defs
index 5abcb9226c77dd2c082e24e43d731c650c057b76..270b80bbbe8fd4c5fedc39665c84d92783a88a5f 100644
--- a/net/utils/Make.defs
+++ b/net/utils/Make.defs
@@ -36,7 +36,7 @@
 # Common utilities
 
 NET_CSRCS += net_dsec2tick.c net_dsec2timeval.c net_timeval2dsec.c
-NET_CSRCS += net_chksum.c
+NET_CSRCS += net_chksum.c net_lock.c
 
 # IPv6 utilities
 
@@ -44,12 +44,6 @@ ifeq ($(CONFIG_NET_IPv6),y)
 NET_CSRCS += net_ipv6_maskcmp.c net_ipv6_mask2pref.c net_ipv6_pref2mask.c
 endif
 
-# Non-interrupt level support required?
-
-ifeq ($(CONFIG_NET_NOINTS),y)
-NET_CSRCS += net_lock.c
-endif
-
 # Include utility build support
 
 DEPPATH += --dep-path utils
diff --git a/net/utils/net_lock.c b/net/utils/net_lock.c
index 49ce834070f8714e9f5ae85877c30baad568d1b5..fbd42342aeee69957f877fcb22ac8f555829dec8 100644
--- a/net/utils/net_lock.c
+++ b/net/utils/net_lock.c
@@ -51,8 +51,6 @@
 
 #include "utils/utils.h"
 
-#if defined(CONFIG_NET) && defined(CONFIG_NET_NOINTS)
-
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
@@ -116,7 +114,7 @@ void net_lockinitialize(void)
  *
  ****************************************************************************/
 
-net_lock_t net_lock(void)
+void net_lock(void)
 {
   pid_t me = getpid();
 
@@ -139,8 +137,6 @@ net_lock_t net_lock(void)
       g_holder = me;
       g_count  = 1;
     }
-
-  return 0;
 }
 
 /****************************************************************************
@@ -151,7 +147,7 @@ net_lock_t net_lock(void)
  *
  ****************************************************************************/
 
-void net_unlock(net_lock_t flags)
+void net_unlock(void)
 {
   DEBUGASSERT(g_holder == getpid() && g_count > 0);
 
@@ -261,4 +257,3 @@ int net_lockedwait(sem_t *sem)
   return net_timedwait(sem, NULL);
 }
 
-#endif /* CONFIG_NET */
diff --git a/net/utils/utils.h b/net/utils/utils.h
index 355e75e51e78ea7d9cdae3b989357f9d7b4fd4d3..6e33b72a83b005287b4f0a7238ff9ceb2ba264ba 100644
--- a/net/utils/utils.h
+++ b/net/utils/utils.h
@@ -84,11 +84,7 @@ struct timeval;           /* Forward reference */
  *
  ****************************************************************************/
 
-#ifdef CONFIG_NET_NOINTS
 void net_lockinitialize(void);
-#else
-#  define net_lockinitialize()
-#endif
 
 /****************************************************************************
  * Function: net_dsec2timeval
diff --git a/sched/Kconfig b/sched/Kconfig
index 27ba4e43c0457419b84c1df4c092dfb958978f71..3dc0e91eba3e0304f04b84d20a6d6dd032d868e0 100644
--- a/sched/Kconfig
+++ b/sched/Kconfig
@@ -167,27 +167,40 @@ config CLOCK_MONOTONIC
 
 		The value of the CLOCK_MONOTONIC clock cannot be set via clock_settime().
 
+config ARCH_HAVE_TIMEKEEPING
+	bool
+	default n
+
+config CLOCK_TIMEKEEPING
+	bool "Support timekeeping algorithms"
+	default n
+	depends on EXPERIMENTAL && ARCH_HAVE_TIMEKEEPING
+	---help---
+		CLOCK_TIMEKEEPING enables experimental time management algorithms.
+
 config JULIAN_TIME
 	bool "Enables Julian time conversions"
 	default n
 	---help---
 		Enables Julian time conversions
 
-if !RTC
-
 config START_YEAR
 	int "Start year"
-	default 2014
+	default 2017
+	range 1970 2106
+	---help---
+		NuttX uses an unsigned 32-bit integer for time_t which provides a
+		range from 1970 to 2106.
 
 config START_MONTH
 	int "Start month"
 	default 1
+	range 1 12
 
 config START_DAY
 	int "Start day"
 	default 1
-
-endif # !RTC
+	range 1 31
 
 config MAX_WDOGPARMS
 	int "Maximum number of watchdog parameters"
@@ -232,7 +245,6 @@ menu "Tasks and Scheduling"
 config SPINLOCK
 	bool "Support Spinlocks"
 	default n
-	depends on EXPERIMENTAL
 	---help---
 		Enables suppport for spinlocks.  Spinlocks are current used only for
 		SMP suppport.
@@ -240,7 +252,7 @@ config SPINLOCK
 config SMP
 	bool "Symmetric Multi-Processing (SMP)"
 	default n
-	depends on ARCH_HAVE_MULTICPU && EXPERIMENTAL
+	depends on ARCH_HAVE_MULTICPU
 	select SPINLOCK
 	---help---
 		Enables support for Symmetric Multi-Processing (SMP) on a multi-CPU
@@ -484,7 +496,7 @@ config PREALLOC_CHILDSTATUS
 config DEBUG_CHILDSTATUS
 	bool "Enable Child Status Debug Output"
 	default n
-	depends on SCHED_CHILD_STATUS && DEBUG
+	depends on SCHED_CHILD_STATUS && DEBUG_FEATURES
 	---help---
 		Very detailed... I am sure that you do not want this.
 
@@ -520,8 +532,37 @@ config NPTHREAD_KEYS
 		The number of items of thread-
 		specific data that can be retained
 
+config PTHREAD_CLEANUP
+	bool "pthread cleanup stack"
+	default n
+	---help---
+		Select to enable support for pthread exit cleanup stacks.  This
+		enables the interfaces pthread_cleanup_push() and
+		pthread_cleanup_pop().
+
+config PTHREAD_CLEANUP_STACKSIZE
+	int "pthread cleanup stack size"
+	default 1
+	range 1 32
+	depends on PTHREAD_CLEANUP
+	---help---
+		The maximum number of cleanup actions that may be pushed by
+		pthread_clean_push().  This setting will increase the size of EVERY
+		pthread task control block by about n * CONFIG_PTHREAD_CLEANUP_STACKSIZE
+		where n is the size of a pointer, 2* sizeof(uintptr_t), this would be
+		8 for a CPU with 32-bit addressing and 4 for a CPU with 16-bit
+		addressing.
+
 endmenu # Pthread Options
 
+config CANCELLATION_POINTS
+	bool "Cancellation points"
+	default n
+	---help---
+		Enable POSIX cancellation points for pthread_cancel().  If selected,
+		cancellation points will also used with the () task_delete() API even if
+		pthreads are not enabled.
+
 menu "Performance Monitoring"
 
 config SCHED_CPULOAD
@@ -571,17 +612,62 @@ config SCHED_CPULOAD_EXTCLK
 		sched_process_cpuload() at each timer expiration with interrupts
 		disabled.
 
+if SCHED_CPULOAD_EXTCLK
+
 config SCHED_CPULOAD_TICKSPERSEC
 	int "External clock rate"
 	default 100
-	depends on SCHED_CPULOAD_EXTCLK
 	---help---
 		If an external clock is used to drive the sampling for the CPU load
 		calculations, then this value must be provided.  This value provides
-		the rate of the external clock in units of ticks per second.  The
-		default value of 100 corresponds to 100Hz clock.  NOTE: that 100Hz
-		is the default frequency of the system time and, hence, the worst
-		possible choice in most cases.
+		the rate of the external clock interrupts in units of ticks per
+		second.  The default value of 100 corresponds to a 100Hz clock.  NOTE:
+		that 100Hz is the default frequency of the system time and, hence,
+		the worst possible choice in most cases.
+
+config CPULOAD_ONESHOT
+	bool "Use Oneshot timer"
+	default n
+	---help---
+		Use an MCU-specific oneshot timer as the external clock.  The
+		oneshot timer must be configured by board specific logic which must
+		then call:
+
+			void sched_oneshot_extclk(FAR struct oneshot_lowerhalf_s *lower);
+
+		To start the CPU load measurement. See include/nuttx/clock.h
+
+		NOTE that in this configuration, CONFIG_SCHED_CPULOAD_TICKSPERSEC is
+		the sample rate that will be accomplished by programming the oneshot
+		time repeatedly.  If CPULOAD_ONESHOT_ENTROPY is also selected, then
+		the underly frequency driving the oneshote timer must be
+		significantly faster than CONFIG_SCHED_CPULOAD_TICKSPERSE to permit
+		precise modulation the sample periods.
+
+config CPULOAD_ONESHOT_ENTROPY
+	int "Bits of entropy"
+	default 6
+	range 0 30
+	---help---
+		This is the number of bits of entropy that will be applied. The
+		oneshot will be set to this interval:
+
+			CPULOAD_ONESHOT_NOMINAL - (CPULOAD_ONESHOT_ENTROPY / 2) +
+			error + nrand(CPULOAD_ONESHOT_ENTROPY)
+
+		Where
+
+			CPULOAD_ONESHOT_NOMINAL is the nominal sample internval implied
+			by CONFIG_SCHED_CPULOAD_TICKSPERSEC in units of microseconds.
+			CPULOAD_ONESHOT_ENTROPY is (1 << CONFIG_CPULOAD_ONESHOT_ENTROPY),
+			and
+			'error' is an error value that is retained from interval to
+			interval so that although individual intervals are randomized,
+			the average will still be CONFIG_SCHED_CPULOAD_TICKSPERSEC.
+
+		This special value of zero disables entropy.
+
+endif # SCHED_CPULOAD_EXTCLK
 
 config SCHED_CPULOAD_TIMECONSTANT
 	int "CPU load time constant"
@@ -606,6 +692,14 @@ config SCHED_INSTRUMENTATION
 			void sched_note_suspend(FAR struct tcb_s *tcb);
 			void sched_note_resume(FAR struct tcb_s *tcb);
 
+		If CONFIG_SMP is enabled, then these additional interfaces are
+		expected:
+
+			void sched_note_cpu_pause(FAR struct tcb_s *tcb, int cpu);
+			void sched_note_cpu_paused(FAR struct tcb_s *tcb);
+			void sched_note_cpu_resume(FAR struct tcb_s *tcb, int cpu);
+			void sched_note_cpu_resumed(FAR struct tcb_s *tcb);
+
 		NOTE: These are internal OS interfaces and are called at at very
 		critical locations in the OS. There is very little that can be
 		done in these interfaces.  For example, normal devices may not be
@@ -615,6 +709,13 @@ config SCHED_INSTRUMENTATION
 
 if SCHED_INSTRUMENTATION
 
+config SCHED_INSTRUMENTATION_CPUSET
+	hex "CPU bit set"
+	default 0xffff
+	depends on SMP
+	---help---
+		Monitor only CPUs in the bitset.  Bit 0=CPU0, Bit1=CPU1, etc.
+
 config SCHED_INSTRUMENTATION_PREEMPTION
 	bool "Preemption monitor hooks"
 	default n
@@ -627,7 +728,6 @@ config SCHED_INSTRUMENTATION_PREEMPTION
 config SCHED_INSTRUMENTATION_CSECTION
 	bool "Critical section monitor hooks"
 	default n
-	depends on EXPERIMENTAL || !SCHED_INSTRUMENTATION_BUFFER
 	---help---
 		Enables additional hooks for entry and exit from critical sections.
 		Interrupts are disabled while within a critical section.  Board-
@@ -635,13 +735,17 @@ config SCHED_INSTRUMENTATION_CSECTION
 
 			void sched_note_csection(FAR struct tcb_s *tcb, bool state);
 
-		NOTE: This option is marked EXPERIMENTAL because there is a logical
-		error in the design when this feature is used with
-		CONFIG_SCHED_INSTRUMENTATION_BUFFER.  That error is that
-		sched_note_get() calls enter_ and leave_critical_section.  That
-		means that each call to sched_note_get() causes two entries to be
-		added from the note buffer in order to remove one entry.  Not
-		very useful in its current state!
+config SCHED_INSTRUMENTATION_SPINLOCKS
+	bool "Spinlock monitor hooks"
+	default n
+	---help---
+		Enables additional hooks for spinlock state.  Board-specific logic
+		must provide this additional logic.
+
+			void sched_note_spinlock(FAR struct tcb_s *tcb, bool state);
+			void sched_note_spinlocked(FAR struct tcb_s *tcb, bool state);
+			void sched_note_spinunlock(FAR struct tcb_s *tcb, bool state);
+			void sched_note_spinabort(FAR struct tcb_s *tcb, bool state);
 
 config SCHED_INSTRUMENTATION_BUFFER
 	bool "Buffer instrumentation data in memory"
@@ -667,14 +771,35 @@ config SCHED_INSTRUMENTATION_BUFFER
 		does not occur.  See include/nuttx/sched_note.h for additional
 		information.
 
+if SCHED_INSTRUMENTATION_BUFFER
+
 config SCHED_NOTE_BUFSIZE
 	int "Instrumentation buffer size"
 	default 2048
-	depends on SCHED_INSTRUMENTATION_BUFFER
 	---help---
 		The size of the in-memory, circular instrumentation buffer (in
 		bytes).
 
+config SCHED_NOTE_GET
+	int "Callable interface to get instrumentatin data"
+	default 2048
+	depends on !SCHED_INSTRUMENTATION_CSECTION && (!SCHED_INSTRUMENTATION_SPINLOCK || !SMP)
+	---help---
+		Add support for interfaces to get the size of the next note and also
+		to extract the next note from the instrumentation buffer:
+
+			ssize_t sched_note_get(FAR uint8_t *buffer, size_t buflen);
+			ssize_t sched_note_size(void);
+
+		NOTE: This option is not available if critical sections are being
+		monitor (nor if spinlocks are being monitored in SMP configuration)
+		because there would be a logical error in the design in those cases.
+		That error is that these interfaces call enter_ and leave_critical_section
+		(and which us spinlocks in SMP mode).  That means that each call to
+		sched_note_get() causes several additional entries to be added from
+		the note buffer in order to remove one entry.
+
+endif # SCHED_INSTRUMENTATION_BUFFER
 endif # SCHED_INSTRUMENTATION
 endmenu # Performance Monitoring
 
@@ -748,6 +873,18 @@ menuconfig PRIORITY_INHERITANCE
 	default n
 	---help---
 		Set to enable support for priority inheritance on mutexes and semaphores.
+		When this option is enabled, the initial configuration of all seamphores
+		and mutexes will be with priority inheritance enabled.  That configuration
+		may not be appropriate in all cases (such as when the semaphore or mutex
+		is used for signaling).  In such cases, priority inheritance be be
+		disabled for individual semaphores by calling:
+
+			int ret = sem_setprotocol(&sem, SEM_PRIO_NONE);
+
+		And for individual pthread mutexes by setting the protocol attribute
+		before initializing the mutex:
+
+			int ret = pthread_mutexattr_setprotocol(&attr, PTHREAD_PRIO_NONE);
 
 if PRIORITY_INHERITANCE
 
@@ -978,47 +1115,14 @@ config MQ_MAXMSGSIZE
 
 endmenu # POSIX Message Queue Options
 
-menuconfig MODULE
+config MODULE
 	bool "Enable loadable OS modules"
 	default n
+	select LIBC_MODLIB
+	select LIBC_ARCH_ELF
 	---help---
 		Enable support for loadable OS modules.  Default: n
 
-if MODULE
-
-config MODULE_ALIGN_LOG2
-	int "Log2 Section Alignment"
-	default 2
-	---help---
-		Align all sections to this Log2 value:  0->1, 1->2, 2->4, etc.
-
-config MODULE_BUFFERSIZE
-	int "Module I/O Buffer Size"
-	default 128
-	---help---
-		This is an I/O buffer that is used to access the module file.
-		Variable length items will need to be read (such as symbol names).
-		This is really just this initial size of the buffer; it will be
-		reallocated as necessary to hold large symbol names).  Default: 128
-
-config MODULE_BUFFERINCR
-	int "Module I/O Buffer Realloc Increment"
-	default 32
-	---help---
-		This is an I/O buffer that is used to access the module file.
-		Variable length items will need to be read (such as symbol names).
-		This value specifies the size increment to use each time the
-		buffer is reallocated.  Default: 32
-
-config MODULE_DUMPBUFFER
-	bool "Dump module buffers"
-	default n
-	depends on DEBUG && DEBUG_VERBOSE
-	---help---
-		Dump various module buffers for debug purposes
-
-endif
-
 menu "Work queue support"
 
 config SCHED_WORKQUEUE
@@ -1116,7 +1220,17 @@ config SCHED_LPNTHREADS
 		This options is required to support, for example, I/O operations
 		that stall waiting for input.  If there is only a single thread,
 		then the entire low-priority queue processing stalls in such cases.
-		Such behavior is necessary to support asynchronous I/O, AIO (for example).
+		Such behavior is necessary to support asynchronous I/O, AIO (for
+		example).
+
+		CAUTION: Some drivers may use the work queue to serialize
+		operations.  The may also use the low-priority work queue if it is
+		available.  If there are multiple low-priority worker thread, then
+		this can result in the loss of that serialization.  There may be
+		concurrent driver operations running on different LP threads and
+		this could lead to a failure.  You may need to visit the use of the
+		LP work queue on your configuration is you select
+		CONFIG_SCHED_LPNTHREADS > 1
 
 config SCHED_LPWORKPRIORITY
 	int "Low priority worker thread priority"
diff --git a/sched/clock/Make.defs b/sched/clock/Make.defs
index c0bc23f51017f5b357b777e2efb80453a54d924b..20ddd3d03b39c9a24e8635d70fdb5820c0d9dc96 100644
--- a/sched/clock/Make.defs
+++ b/sched/clock/Make.defs
@@ -38,6 +38,10 @@ CSRCS += clock_time2ticks.c clock_abstime2ticks.c clock_ticks2time.c
 CSRCS += clock_systimer.c clock_systimespec.c clock_timespec_add.c
 CSRCS += clock_timespec_subtract.c
 
+ifeq ($(CONFIG_CLOCK_TIMEKEEPING),y)
+CSRCS += clock_timekeeping.c
+endif
+
 # Include clock build support
 
 DEPPATH += --dep-path clock
diff --git a/sched/clock/clock.h b/sched/clock/clock.h
index 8a5c55a3e767b162659a1ec3fea3b07c5660ff58..cd8066615b5858c925727320a09466a7606e9bb9 100644
--- a/sched/clock/clock.h
+++ b/sched/clock/clock.h
@@ -1,4 +1,4 @@
-/********************************************************************************
+/****************************************************************************
  * sched/clock/clock.h
  *
  *   Copyright (C) 2007-2009, 2014 Gregory Nutt. All rights reserved.
@@ -31,14 +31,14 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
 #ifndef __SCHED_CLOCK_CLOCK_H
 #define __SCHED_CLOCK_CLOCK_H
 
-/********************************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************************/
+ ****************************************************************************/
 
 #include 
 
@@ -47,9 +47,9 @@
 #include 
 #include 
 
-/********************************************************************************
+/****************************************************************************
  * Pre-processor Definitions
- ********************************************************************************/
+ ****************************************************************************/
 /* Configuration ************************************************************/
 /* If CONFIG_SYSTEM_TIME64 is selected and the CPU supports long long types,
  * then a 64-bit system time will be used.
@@ -59,13 +59,13 @@
 #  undef CONFIG_SYSTEM_TIME64
 #endif
 
-/********************************************************************************
+/****************************************************************************
  * Public Type Definitions
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Public Data
- ********************************************************************************/
+ ****************************************************************************/
 
 #if !defined(CONFIG_SCHED_TICKLESS) && !defined(__HAVE_KERNEL_GLOBALS)
   /* The system clock exists (CONFIG_SCHED_TICKLESS), but it not prototyped
@@ -79,11 +79,13 @@ extern volatile uint32_t g_system_timer;
 #  endif
 #endif
 
+#ifndef CONFIG_CLOCK_TIMEKEEPING
 extern struct timespec   g_basetime;
+#endif
 
-/********************************************************************************
+/****************************************************************************
  * Public Function Prototypes
- ********************************************************************************/
+ ****************************************************************************/
 
 void weak_function clock_initialize(void);
 #ifndef CONFIG_SCHED_TICKLESS
diff --git a/sched/clock/clock_abstime2ticks.c b/sched/clock/clock_abstime2ticks.c
index 24213dd07b29a80acbf500791fd0caa79c178b3a..d21e706e393eac9de59db679e1bb46208a4e6540 100644
--- a/sched/clock/clock_abstime2ticks.c
+++ b/sched/clock/clock_abstime2ticks.c
@@ -1,4 +1,4 @@
-/********************************************************************************
+/****************************************************************************
  * sched/clock/clock_abstime2ticks.c
  *
  *   Copyright (C) 2007, 2008, 2013-2014, 2016 Gregory Nutt. All rights reserved.
@@ -31,11 +31,11 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************************/
+ ****************************************************************************/
 
 #include 
 
@@ -44,11 +44,11 @@
 #include 
 #include "clock/clock.h"
 
-/********************************************************************************
+/****************************************************************************
  * Private Functions
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Name: compare_timespec
  *
  * Description:
@@ -56,7 +56,7 @@
  *    Return > 0 if time b is before time a
  *    Return 0 if time a is the same as time b
  *
- ********************************************************************************/
+ ****************************************************************************/
 
 static long compare_timespec(FAR const struct timespec *a,
                              FAR const struct timespec *b)
@@ -74,11 +74,11 @@ static long compare_timespec(FAR const struct timespec *a,
   return (long)a->tv_nsec -(long)b->tv_nsec;
 }
 
-/********************************************************************************
+/****************************************************************************
  * Public Functions
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Name: clock_abstime2ticks
  *
  * Description:
@@ -93,10 +93,10 @@ static long compare_timespec(FAR const struct timespec *a,
  *   OK on success; A non-zero error number on failure;
  *
  * Assumptions:
- *   Interrupts should be disabled so that the time is not changing during the
- *   calculation
+ *   Interrupts should be disabled so that the time is not changing during
+ *   the calculation
  *
- ********************************************************************************/
+ ****************************************************************************/
 
 int clock_abstime2ticks(clockid_t clockid, FAR const struct timespec *abstime,
                         FAR int *ticks)
diff --git a/sched/clock/clock_getres.c b/sched/clock/clock_getres.c
index aad5dec9c32a1deee788b75bd83fb2f1980e8ea2..54d666ae53623a4f31d73f4b87cee4013d0d60dd 100644
--- a/sched/clock/clock_getres.c
+++ b/sched/clock/clock_getres.c
@@ -62,13 +62,13 @@ int clock_getres(clockid_t clock_id, struct timespec *res)
 {
   int      ret = OK;
 
-  sdbg("clock_id=%d\n", clock_id);
+  sinfo("clock_id=%d\n", clock_id);
 
   /* Only CLOCK_REALTIME is supported */
 
   if (clock_id != CLOCK_REALTIME)
     {
-      sdbg("Returning ERROR\n");
+      serr("Returning ERROR\n");
       set_errno(EINVAL);
       ret = ERROR;
     }
@@ -79,7 +79,7 @@ int clock_getres(clockid_t clock_id, struct timespec *res)
       res->tv_sec  = 0;
       res->tv_nsec = NSEC_PER_TICK;
 
-      sdbg("Returning res=(%d,%d)\n", (int)res->tv_sec, (int)res->tv_nsec);
+      sinfo("Returning res=(%d,%d)\n", (int)res->tv_sec, (int)res->tv_nsec);
     }
 
   return ret;
diff --git a/sched/clock/clock_gettime.c b/sched/clock/clock_gettime.c
index 50e3c6e7c12781eb4a9d649547f3aae3d42766fa..74ffea5be8bcc06fc717b73cc959c500f3be898e 100644
--- a/sched/clock/clock_gettime.c
+++ b/sched/clock/clock_gettime.c
@@ -49,6 +49,9 @@
 #include 
 
 #include "clock/clock.h"
+#ifdef CONFIG_CLOCK_TIMEKEEPING
+#  include "clock/clock_timekeeping.h"
+#endif
 
 /****************************************************************************
  * Public Functions
@@ -68,7 +71,7 @@ int clock_gettime(clockid_t clock_id, struct timespec *tp)
   uint32_t carry;
   int ret = OK;
 
-  sdbg("clock_id=%d\n", clock_id);
+  sinfo("clock_id=%d\n", clock_id);
   DEBUGASSERT(tp != NULL);
 
 #ifdef CONFIG_CLOCK_MONOTONIC
@@ -90,7 +93,9 @@ int clock_gettime(clockid_t clock_id, struct timespec *tp)
        * reset.
        */
 
-#ifdef CONFIG_SCHED_TICKLESS
+#if defined(CONFIG_CLOCK_TIMEKEEPING)
+      ret = clock_timekeeping_get_monotonic_time(tp);
+#elif defined(CONFIG_SCHED_TICKLESS)
       ret = up_timer_gettime(tp);
 #else
       ret = clock_systimespec(tp);
@@ -113,7 +118,15 @@ int clock_gettime(clockid_t clock_id, struct timespec *tp)
        * last set.
        */
 
+#if defined(CONFIG_CLOCK_TIMEKEEPING)
+      ret = clock_timekeeping_get_wall_time(tp);
+#elif defined(CONFIG_SCHED_TICKLESS)
+      ret = up_timer_gettime(&ts);
+#else
       ret = clock_systimespec(&ts);
+#endif
+
+#ifndef CONFIG_CLOCK_TIMEKEEPING
       if (ret == OK)
         {
           /* Add the base time to this.  The base time is the time-of-day
@@ -138,6 +151,7 @@ int clock_gettime(clockid_t clock_id, struct timespec *tp)
           tp->tv_sec  = ts.tv_sec;
           tp->tv_nsec = ts.tv_nsec;
         }
+#endif /* CONFIG_CLOCK_TIMEKEEPING */
     }
   else
     {
@@ -148,14 +162,14 @@ int clock_gettime(clockid_t clock_id, struct timespec *tp)
 
   if (ret < 0)
     {
-      sdbg("Returning ERROR\n");
+      serr("Returning ERROR\n");
 
       set_errno(-ret);
       ret = ERROR;
     }
   else
     {
-      sdbg("Returning tp=(%d,%d)\n", (int)tp->tv_sec, (int)tp->tv_nsec);
+      sinfo("Returning tp=(%d,%d)\n", (int)tp->tv_sec, (int)tp->tv_nsec);
     }
 
   return ret;
diff --git a/sched/clock/clock_initialize.c b/sched/clock/clock_initialize.c
index 6e653e78e7f71a2fdb0b339027ea33cc0b6e8f60..0113e5e0fc838914d9816d771780a6a8d96e9721 100644
--- a/sched/clock/clock_initialize.c
+++ b/sched/clock/clock_initialize.c
@@ -54,10 +54,14 @@
 #include 
 
 #include "clock/clock.h"
+#ifdef CONFIG_CLOCK_TIMEKEEPING
+#  include "clock/clock_timekeeping.h"
+#endif
 
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
 /* Standard time definitions (in units of seconds) */
 
 #define SEC_PER_MIN  ((time_t)60)
@@ -148,7 +152,7 @@ static inline int clock_basetime(FAR struct timespec *tp)
    * month, and date
    */
 
-  jdn = clock_calendar2utc(CONFIG_START_YEAR, CONFIG_START_MONTH,
+  jdn = clock_calendar2utc(CONFIG_START_YEAR, CONFIG_START_MONTH - 1,
                            CONFIG_START_DAY);
 
   /* Set the base time as seconds into this julian day. */
@@ -172,10 +176,16 @@ static void clock_inittime(void)
 {
   /* (Re-)initialize the time value to match the RTC */
 
-  (void)clock_basetime(&g_basetime);
+#ifndef CONFIG_CLOCK_TIMEKEEPING
+#ifndef CONFIG_RTC_HIRES
+  clock_basetime(&g_basetime);
+#endif
 #ifndef CONFIG_SCHED_TICKLESS
   g_system_timer = 0;
 #endif
+#else
+  clock_inittimekeeping();
+#endif
 }
 
 /****************************************************************************
diff --git a/sched/clock/clock_settime.c b/sched/clock/clock_settime.c
index 640e375a63c1ad279fd6bf7bea844b5c1668bb79..ec0c1d85be9f70360087e9c40858e23d539ac34c 100644
--- a/sched/clock/clock_settime.c
+++ b/sched/clock/clock_settime.c
@@ -48,6 +48,9 @@
 #include 
 
 #include "clock/clock.h"
+#ifdef CONFIG_CLOCK_TIMEKEEPING
+#  include "clock/clock_timekeeping.h"
+#endif
 
 /****************************************************************************
  * Public Functions
@@ -67,7 +70,7 @@ int clock_settime(clockid_t clock_id, FAR const struct timespec *tp)
   irqstate_t flags;
   int ret = OK;
 
-  sdbg("clock_id=%d\n", clock_id);
+  sinfo("clock_id=%d\n", clock_id);
   DEBUGASSERT(tp != NULL);
 
   /* CLOCK_REALTIME - POSIX demands this to be present. This is the wall
@@ -76,6 +79,7 @@ int clock_settime(clockid_t clock_id, FAR const struct timespec *tp)
 
   if (clock_id == CLOCK_REALTIME)
     {
+#ifndef CONFIG_CLOCK_TIMEKEEPING
       /* Interrupts are disabled here so that the in-memory time
        * representation and the RTC setting will be as close as
        * possible.
@@ -120,13 +124,16 @@ int clock_settime(clockid_t clock_id, FAR const struct timespec *tp)
 #endif
       leave_critical_section(flags);
 
-      sdbg("basetime=(%ld,%lu) bias=(%ld,%lu)\n",
-          (long)g_basetime.tv_sec, (unsigned long)g_basetime.tv_nsec,
-          (long)bias.tv_sec, (unsigned long)bias.tv_nsec);
+      sinfo("basetime=(%ld,%lu) bias=(%ld,%lu)\n",
+            (long)g_basetime.tv_sec, (unsigned long)g_basetime.tv_nsec,
+            (long)bias.tv_sec, (unsigned long)bias.tv_nsec);
+#else
+      ret = clock_timekeeping_set_wall_time(tp);
+#endif
     }
   else
     {
-      sdbg("Returning ERROR\n");
+      serr("Returning ERROR\n");
       set_errno(EINVAL);
       ret = ERROR;
     }
diff --git a/sched/clock/clock_systimer.c b/sched/clock/clock_systimer.c
index 3e8e978ce994c16043f27d632f93788b29e6e8ca..1b13451092214a281f03e377d25feb130b4583a4 100644
--- a/sched/clock/clock_systimer.c
+++ b/sched/clock/clock_systimer.c
@@ -83,7 +83,11 @@ systime_t clock_systimer(void)
 
   /* Get the time from the platform specific hardware */
 
+#ifndef CONFIG_CLOCK_TIMEKEEPING
   (void)up_timer_gettime(&ts);
+#else
+  (void)clock_timekeeping_get_monotonic_time(&ts);
+#endif
 
   /* Convert to a 64-bit value in microseconds, then in clock tick units */
 
@@ -96,11 +100,15 @@ systime_t clock_systimer(void)
 
   /* Get the time from the platform specific hardware */
 
+#ifndef CONFIG_CLOCK_TIMEKEEPING
   (void)up_timer_gettime(&ts);
+#else
+  (void)clock_timekeeping_get_monotonic_time(&ts);
+#endif
 
   /* Convert to a 64- then a 32-bit value */
 
-  tmp = MSEC2TICK(1000 * (uint64_t)ts.tv_sec + (uint64_t)ts.tv_nsec / 1000000);
+  tmp = USEC2TICK(1000000 * (uint64_t)ts.tv_sec + (uint64_t)ts.tv_nsec / 1000);
   return (systime_t)(tmp & 0x00000000ffffffff);
 
 # endif /* CONFIG_SYSTEM_TIME64 */
diff --git a/sched/clock/clock_ticks2time.c b/sched/clock/clock_ticks2time.c
index b69379d827543f1c675ad55fe1bb85febca07a1f..33353193a82933125ef7c5af2a2a6fadee01c062 100644
--- a/sched/clock/clock_ticks2time.c
+++ b/sched/clock/clock_ticks2time.c
@@ -1,4 +1,4 @@
-/********************************************************************************
+/****************************************************************************
  * sched/clock/clock_ticks2time.c
  *
  *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
@@ -31,22 +31,22 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************************/
+ ****************************************************************************/
 
 #include 
 
 #include 
 #include "clock/clock.h"
 
-/********************************************************************************
+/****************************************************************************
  * Public Functions
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Name: clock_ticks2time
  *
  * Description:
@@ -61,7 +61,7 @@
  *
  * Assumptions:
  *
- ********************************************************************************/
+ ****************************************************************************/
 
 int clock_ticks2time(int ticks, FAR struct timespec *reltime)
 {
diff --git a/sched/clock/clock_time2ticks.c b/sched/clock/clock_time2ticks.c
index 8667e6bcd9dc1a94a5ff4413d7b26ba30608bfc5..5bb613b61de3db2a8600615a3e83a1a27910ed7d 100644
--- a/sched/clock/clock_time2ticks.c
+++ b/sched/clock/clock_time2ticks.c
@@ -1,4 +1,4 @@
-/********************************************************************************
+/****************************************************************************
  * sched/clock/clock_time2ticks.c
  *
  *   Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
@@ -31,11 +31,11 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************************/
+ ****************************************************************************/
 
 #include 
 
@@ -44,17 +44,17 @@
 
 #include "clock/clock.h"
 
-/********************************************************************************
+/****************************************************************************
  * Public Functions
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Name: clock_time2ticks
  *
  * Description:
- *   Convert a timespec delay to system timer ticks.  This function is suitable
- *   for calculating relative time delays and does not depend on the other
- *   clock_* logic.
+ *   Convert a timespec delay to system timer ticks.  This function is
+ *   suitable for calculating relative time delays and does not depend on
+ *   the other clock_* logic.
  *
  * Parameters:
  *   reltime - Convert this relative time to system clock ticks.
@@ -65,15 +65,15 @@
  *
  * Assumptions:
  *
- ********************************************************************************/
+ ****************************************************************************/
 
 int clock_time2ticks(FAR const struct timespec *reltime, FAR int *ticks)
 {
 #ifdef CONFIG_HAVE_LONG_LONG
   int64_t relnsec;
 
-  /* Convert the relative time into nanoseconds.  The range of the int64_t is
-   * sufficiently large that there is no real need for range checking.
+  /* Convert the relative time into nanoseconds.  The range of the int64_t
+   * is sufficiently large that there is no real need for range checking.
    */
 
   relnsec = (int64_t)reltime->tv_sec * NSEC_PER_SEC +
diff --git a/sched/clock/clock_timekeeping.c b/sched/clock/clock_timekeeping.c
new file mode 100644
index 0000000000000000000000000000000000000000..be83688f0152a667f347497e8203339e2a207669
--- /dev/null
+++ b/sched/clock/clock_timekeeping.c
@@ -0,0 +1,331 @@
+/****************************************************************************
+ * sched/clock/clock_timekeeping.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author:  Max Neklyudov 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#ifdef CONFIG_CLOCK_TIMEKEEPING
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "clock/clock.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define NTP_MAX_ADJUST 500
+
+/**********************************************************************
+ * Private Data
+ **********************************************************************/
+
+static struct timespec g_clock_wall_time;
+static struct timespec g_clock_monotonic_time;
+static uint64_t        g_clock_last_counter;
+static uint64_t        g_clock_mask;
+static long            g_clock_adjust;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: clock_get_current_time
+ ****************************************************************************/
+
+static int clock_get_current_time(FAR struct timespec *ts,
+                                  FAR struct timespec *base)
+{
+  irqstate_t flags;
+  uint64_t counter;
+  uint64_t offset;
+  uint64_t nsec;
+  time_t sec;
+  int ret;
+
+  flags = enter_critical_section();
+
+  ret = up_timer_getcounter(&counter);
+  if (ret < 0)
+    {
+      goto errout_in_critical_section;
+    }
+
+  offset = (counter - g_clock_last_counter) & g_clock_mask;
+  nsec   = offset * NSEC_PER_TICK;
+  sec    = nsec   / NSEC_PER_SEC;
+  nsec  -= sec    * NSEC_PER_SEC;
+
+  nsec  += base->tv_nsec;
+  if (nsec > NSEC_PER_SEC)
+    {
+      nsec -= NSEC_PER_SEC;
+      sec += 1;
+    }
+
+  ts->tv_nsec = nsec;
+  ts->tv_sec = base->tv_sec + sec;
+
+errout_in_critical_section:
+  leave_critical_section(flags);
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: clock_timekeeping_get_monotonic_time
+ ****************************************************************************/
+
+int clock_timekeeping_get_monotonic_time(FAR struct timespec *ts)
+{
+  return clock_get_current_time(ts, &g_clock_monotonic_time);
+}
+
+/****************************************************************************
+ * Name: clock_timekeeping_get_wall_time
+ ****************************************************************************/
+
+int clock_timekeeping_get_wall_time(FAR struct timespec *ts)
+{
+  return clock_get_current_time(ts, &g_clock_wall_time);
+}
+
+/****************************************************************************
+ * Name: clock_timekeeping_set_wall_time
+ ****************************************************************************/
+
+int clock_timekeeping_set_wall_time(FAR struct timespec *ts)
+{
+  irqstate_t flags;
+  uint64_t counter;
+  int ret;
+
+  flags = enter_critical_section();
+
+  ret = up_timer_getcounter(&counter);
+  if (ret < 0)
+    {
+      goto errout_in_critical_section;
+    }
+
+  g_clock_wall_time    = *ts;
+  g_clock_adjust       = 0;
+  g_clock_last_counter = counter;
+
+errout_in_critical_section:
+  leave_critical_section(flags);
+  return ret;
+}
+
+/********************************************************************************
+ * Name: adjtime
+ *
+ * Description:
+ *   The adjtime() function gradually adjusts the system clock (as returned
+ *   by gettimeofday(2)).  The amount of time by which the clock is to be
+ *   adjusted is specified in the structure pointed to by delta.
+ *
+ *   This structure has the following form:
+ *
+ *     struct timeval
+ *       {
+ *         time_t      tv_sec;     (seconds)
+ *         suseconds_t tv_usec;    (microseconds)
+ *       };
+ *
+ *   If the adjustment in delta is positive, then the system clock is
+ *   speeded up by some small percentage (i.e., by adding a small amount of
+ *   time to the clock value in each second) until the adjustment has been
+ *   completed.  If the adjustment in delta is negative, then the clock is
+ *   slowed down in a similar fashion.
+ *
+ *   If a clock adjustment from an earlier adjtime() call is already in
+ *   progress at the time of a later adjtime() call, and delta is not NULL
+ *   for the later call, then the earlier adjustment is stopped, but any
+ *   already completed part of that adjustment is not undone.
+ *
+ *   If olddelta is not NULL, then the buffer that it points to is used to
+ *   return the amount of time remaining from any previous adjustment that
+ *   has not yet been completed.
+ *
+ *   NOTE: This is not a POSIX interface but derives from 4.3BSD, System V.
+ *   It is also supported for Linux compatibility.
+ *
+ ****************************************************************************/
+
+int adjtime(FAR const struct timeval *delta, FAR struct timeval *olddelta)
+{
+  irqstate_t flags;
+  long adjust_usec;
+
+  if (!delta)
+    {
+      set_errno(EINVAL);
+      return -1;
+    }
+
+  flags = enter_critical_section();
+
+  adjust_usec = delta->tv_sec * USEC_PER_SEC + delta->tv_usec;
+
+  if (olddelta)
+    {
+      olddelta->tv_usec = g_clock_adjust;
+    }
+
+  g_clock_adjust = adjust_usec;
+
+  leave_critical_section(flags);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: clock_update_wall_time
+ ****************************************************************************/
+
+void clock_update_wall_time(void)
+{
+  irqstate_t flags;
+  uint64_t counter;
+  uint64_t offset;
+  int64_t nsec;
+  time_t sec;
+  int ret;
+
+  flags = enter_critical_section();
+
+  ret = up_timer_getcounter(&counter);
+  if (ret < 0)
+    {
+      goto errout_in_critical_section;
+    }
+
+  offset = (counter - g_clock_last_counter) & g_clock_mask;
+  if (offset == 0)
+    {
+      goto errout_in_critical_section;
+    }
+
+  nsec  = offset * NSEC_PER_TICK;
+  sec   = nsec / NSEC_PER_SEC;
+  nsec -= sec * NSEC_PER_SEC;
+
+  g_clock_monotonic_time.tv_sec += sec;
+  g_clock_monotonic_time.tv_nsec += nsec;
+  if (g_clock_monotonic_time.tv_nsec > NSEC_PER_SEC)
+    {
+      g_clock_monotonic_time.tv_nsec -= NSEC_PER_SEC;
+      g_clock_monotonic_time.tv_sec += 1;
+    }
+
+  nsec += g_clock_wall_time.tv_nsec;
+  if (nsec > NSEC_PER_SEC)
+    {
+      nsec -= NSEC_PER_SEC;
+      sec += 1;
+    }
+
+  if (g_clock_adjust != 0 && sec > 0)
+    {
+      long adjust = NTP_MAX_ADJUST * (long)sec;
+      if (g_clock_adjust < adjust && g_clock_adjust > -adjust)
+        {
+          adjust = g_clock_adjust;
+        }
+
+      nsec += adjust * NSEC_PER_USEC;
+
+      while (nsec < 0)
+        {
+          nsec += NSEC_PER_SEC;
+          sec -= 1;
+        }
+
+      while (nsec > NSEC_PER_SEC)
+        {
+          nsec -= NSEC_PER_SEC;
+          sec += 1;
+        }
+    }
+
+  g_clock_wall_time.tv_sec += sec;
+  g_clock_wall_time.tv_nsec = (long)nsec;
+
+  g_clock_last_counter = counter;
+
+errout_in_critical_section:
+  leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: clock_inittimekeeping
+ ****************************************************************************/
+
+void clock_inittimekeeping(void)
+{
+  struct tm rtctime;
+
+  up_timer_getmask(&g_clock_mask);
+
+  /* Get the broken-errout_in_critical_section time from the date/time RTC. */
+
+  (void)up_rtc_getdatetime(&rtctime);
+
+  /* And use the broken-errout_in_critical_section time to initialize the
+   * system time.
+   */
+
+  g_clock_wall_time.tv_sec  = mktime(&rtctime);
+  g_clock_wall_time.tv_nsec = 0;
+
+  memset(&g_clock_monotonic_time, 0, sizeof(g_clock_monotonic_time));
+}
+
+#endif /* CONFIG_CLOCK_TIMEKEEPING */
diff --git a/sched/clock/clock_timekeeping.h b/sched/clock/clock_timekeeping.h
new file mode 100644
index 0000000000000000000000000000000000000000..9bf21df743ca58d4711390f79c659a01969646fb
--- /dev/null
+++ b/sched/clock/clock_timekeeping.h
@@ -0,0 +1,62 @@
+/****************************************************************************
+ * sched/clock/clock_timekeeping.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author:  Max Neklyudov 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __SCHED_CLOCK_CLOCK_TIMEKEEPING_H
+#define __SCHED_CLOCK_CLOCK_TIMEKEEPING_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+#include 
+
+#include 
+
+#include 
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+int clock_timekeeping_get_monotonic_time(FAR struct timespec *ts);
+int clock_timekeeping_get_wall_time(FAR struct timespec *ts);
+int clock_timekeeping_set_wall_time(FAR struct timespec *ts);
+
+void clock_update_wall_time(void);
+
+void clock_inittimekeeping(void);
+
+#endif /* __SCHED_CLOCK_CLOCK_TIMEKEEPING_H */
diff --git a/sched/clock/clock_timespec_add.c b/sched/clock/clock_timespec_add.c
index f2eae0dac26dccadfdb8ee579ef643da83e45d13..0e0fb931dbb8912473268393e0722d8e7a0780f5 100644
--- a/sched/clock/clock_timespec_add.c
+++ b/sched/clock/clock_timespec_add.c
@@ -1,4 +1,4 @@
-/********************************************************************************
+/****************************************************************************
  * sched/clock/clock_timespec_add.c
  *
  *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
@@ -31,11 +31,11 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************************/
+ ****************************************************************************/
 
 #include 
 
@@ -44,9 +44,9 @@
 
 #include "clock/clock.h"
 
-/********************************************************************************
+/****************************************************************************
  * Public Functions
- ********************************************************************************/
+ ****************************************************************************/
 
 /****************************************************************************
  * Name:  clock_timespec_add
diff --git a/sched/clock/clock_timespec_subtract.c b/sched/clock/clock_timespec_subtract.c
index c02dc35538e57e8aa400676d9c6b5415e94fdba7..754c84d1cb57df1c4a0dbe75e11ca4dbca79a637 100644
--- a/sched/clock/clock_timespec_subtract.c
+++ b/sched/clock/clock_timespec_subtract.c
@@ -1,4 +1,4 @@
-/********************************************************************************
+/****************************************************************************
  * sched/clock/clock_timespec_subtract.c
  *
  *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
@@ -31,11 +31,11 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************************/
+ ****************************************************************************/
 
 #include 
 
@@ -44,9 +44,9 @@
 
 #include "clock/clock.h"
 
-/********************************************************************************
+/****************************************************************************
  * Public Functions
- ********************************************************************************/
+ ****************************************************************************/
 
 /****************************************************************************
  * Name:  clock_timespec_subtract
diff --git a/sched/environ/env_getenv.c b/sched/environ/env_getenv.c
index e5309be325a2f7088dea3a83f87104b82c966e35..6e92f90d3f14bc5d5cb42a26b400e7889caa715f 100644
--- a/sched/environ/env_getenv.c
+++ b/sched/environ/env_getenv.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * env_getenv.c
+ * sched/environ/env_getenv.c
  *
  *   Copyright (C) 2007, 2008, 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/sched/environ/env_getenvironptr.c b/sched/environ/env_getenvironptr.c
index d392777392abcb7f4e13ee4f3241fe6f366d239a..11c4f5368e11328884ca5cf62d334bad70625520 100644
--- a/sched/environ/env_getenvironptr.c
+++ b/sched/environ/env_getenvironptr.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * env_getenvironptr.c
+ * sched/environ/env_getenvironptr.c
  *
  *   Copyright (C) 2007, 2008, 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/sched/group/group_addrenv.c b/sched/group/group_addrenv.c
index ddc27a4153fd9d6557fe9bb4745f4748336b560f..596de965a6ec8bbe658f82a5bb576bd6b11e6054 100644
--- a/sched/group/group_addrenv.c
+++ b/sched/group/group_addrenv.c
@@ -163,7 +163,7 @@ int group_addrenv(FAR struct tcb_s *tcb)
       ret = up_addrenv_select(&group->tg_addrenv, NULL);
       if (ret < 0)
         {
-          bdbg("ERROR: up_addrenv_select failed: %d\n", ret);
+          berr("ERROR: up_addrenv_select failed: %d\n", ret);
         }
 
       /* Save the new, current group */
diff --git a/sched/group/group_childstatus.c b/sched/group/group_childstatus.c
index 00e78b4322dffb7187a55cacbbe997c030dd267d..729fb23ef7c825bfed3072467c0dd480442e2926 100644
--- a/sched/group/group_childstatus.c
+++ b/sched/group/group_childstatus.c
@@ -66,7 +66,7 @@
 #  define CONFIG_PREALLOC_CHILDSTATUS (2*CONFIG_MAX_TASKS)
 #endif
 
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_INFO
 #  undef CONFIG_DEBUG_CHILDSTATUS
 #endif
 
@@ -115,11 +115,11 @@ static void group_dumpchildren(FAR struct task_group_s *group,
   FAR struct child_status_s *child;
   int i;
 
-  dbg("Task group=%p: %s\n", group, msg);
+  _info("Task group=%p: %s\n", group, msg);
   for (i = 0, child = group->tg_children; child; i++, child = child->flink)
     {
-      dbg("  %d. ch_flags=%02x ch_pid=%d ch_status=%d\n",
-          i, child->ch_flags, child->ch_pid, child->ch_status);
+      _info("  %d. ch_flags=%02x ch_pid=%d ch_status=%d\n",
+           i, child->ch_flags, child->ch_pid, child->ch_status);
     }
 }
 #else
diff --git a/sched/group/group_create.c b/sched/group/group_create.c
index 3b3cb6be08e41d924f8d2c77c20ba159e35d0799..d5cee38002908c60863829b7a786297a05253f28 100644
--- a/sched/group/group_create.c
+++ b/sched/group/group_create.c
@@ -46,6 +46,7 @@
 
 #include 
 #include 
+#include 
 
 #include "environ/environ.h"
 #include "group/group.h"
@@ -241,12 +242,23 @@ int group_allocate(FAR struct task_tcb_s *tcb, uint8_t ttype)
       return ret;
     }
 
+#ifndef CONFIG_DISABLE_PTHREAD
   /* Initialize the pthread join semaphore */
 
-#ifndef CONFIG_DISABLE_PTHREAD
   (void)sem_init(&group->tg_joinsem, 0, 1);
 #endif
 
+#if defined(CONFIG_SCHED_WAITPID) && !defined(CONFIG_SCHED_HAVE_PARENT)
+  /* Initialize the exit/wait semaphores
+   *
+   * This semaphore is used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  (void)sem_init(&group->tg_exitsem, 0, 0);
+  (void)sem_setprotocol(&group->tg_exitsem, SEM_PRIO_NONE);
+#endif
+
   return OK;
 }
 
diff --git a/sched/group/group_join.c b/sched/group/group_join.c
index bdf2fc546d0e7ec9c45da343b65d216a48c2b3c4..5aecedebe711e0dc804e85ebf3820b2f2c14462a 100644
--- a/sched/group/group_join.c
+++ b/sched/group/group_join.c
@@ -110,7 +110,7 @@ static inline int group_addmember(FAR struct task_group_s *group, pid_t pid)
 
       if (!newmembers)
         {
-          sdbg("ERROR: Failed to reallocate tg_members\n");
+          serr("ERROR: Failed to reallocate tg_members\n");
           return -ENOMEM;
         }
 
diff --git a/sched/group/group_leave.c b/sched/group/group_leave.c
index 9c5cf0f50b0552ac1b8530d859496e35544c9821..7339e61cf0e726f5bd808350658c3121c8f93146 100644
--- a/sched/group/group_leave.c
+++ b/sched/group/group_leave.c
@@ -47,7 +47,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 #include "environ/environ.h"
 #include "signal/signal.h"
diff --git a/sched/group/group_setupidlefiles.c b/sched/group/group_setupidlefiles.c
index c5ed320f5e3fc571f4ffc146421f72dca81b5329..0d4eb19ca29410a0e8ced572f04bf5cd502062d4 100644
--- a/sched/group/group_setupidlefiles.c
+++ b/sched/group/group_setupidlefiles.c
@@ -120,13 +120,14 @@ int group_setupidlefiles(FAR struct task_tcb_s *tcb)
 
       if (fd > 0)
         {
-          slldbg("Open /dev/console fd: %d\n", fd);
+          sinfo("Open /dev/console fd: %d\n", fd);
           (void)close(fd);
         }
       else
         {
-          slldbg("Failed to open /dev/console: %d\n", errno);
+          serr("ERROR: Failed to open /dev/console: %d\n", errno);
         }
+
       return -ENFILE;
     }
 #endif
diff --git a/sched/group/group_setupstreams.c b/sched/group/group_setupstreams.c
index 02df7b7b53eb05b35abdc46f9a5af8d07675efd6..996b9cec7bf0dd932f4b15ae04ca7ece79b99ecc 100644
--- a/sched/group/group_setupstreams.c
+++ b/sched/group/group_setupstreams.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * group_setupstreams.c
+ * sched/group/group_setupstreams.c
  *
  *   Copyright (C) 2007-2008, 2010-2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -44,7 +44,7 @@
 
 #include 
 #include 
-#include 
+#include 
 
 #include "group/group.h"
 
diff --git a/sched/group/group_signal.c b/sched/group/group_signal.c
index ac8afca3e59bb3b688886f98a8018d3d69ac1fb6..363cccf92a27699a0887880ab98ca2722ded6561 100644
--- a/sched/group/group_signal.c
+++ b/sched/group/group_signal.c
@@ -93,12 +93,11 @@ static int group_signal_handler(pid_t pid, FAR void *arg)
   FAR sigactq_t *sigact;
   int ret;
 
-  DEBUGASSERT(tcb != NULL && tcb->group != NULL && info != NULL);
-
   /* Get the TCB associated with the group member */
 
   tcb = sched_gettcb(pid);
-  DEBUGASSERT(tcb ! = NULL);
+  DEBUGASSERT(tcb != NULL && tcb->group != NULL && info != NULL);
+
   if (tcb)
     {
       /* Set this one as the default if we have not already set the default. */
diff --git a/sched/init/os_bringup.c b/sched/init/os_bringup.c
index 1652a36b7fdb1a8e267fb349280a9189f448c173..7887ab8770c4446929a20205e1c31822710dccef 100644
--- a/sched/init/os_bringup.c
+++ b/sched/init/os_bringup.c
@@ -152,7 +152,7 @@ static inline void os_pgworker(void)
    * resolve page faults in other threads
    */
 
-  svdbg("Starting paging thread\n");
+  sinfo("Starting paging thread\n");
 
   g_pgworker = kernel_thread("pgfill", CONFIG_PAGING_DEFPRIO,
                              CONFIG_PAGING_STACKSIZE,
@@ -253,7 +253,7 @@ static inline void os_do_appstart(void)
    * entrypoint from the header at the beginning of the user-space blob.
    */
 
-  svdbg("Starting init thread\n");
+  sinfo("Starting init thread\n");
 
 #ifdef CONFIG_BUILD_PROTECTED
   DEBUGASSERT(USERSPACE->us_entrypoint != NULL);
@@ -287,7 +287,7 @@ static inline void os_do_appstart(void)
    * of the board_initialize() operation.
    */
 
-  svdbg("Starting init task: %s\n", CONFIG_USER_INITPATH);
+  sinfo("Starting init task: %s\n", CONFIG_USER_INITPATH);
 
   ret = exec(CONFIG_USER_INITPATH, NULL, CONFIG_INIT_SYMTAB,
              CONFIG_INIT_NEXPORTS);
diff --git a/sched/init/os_smpstart.c b/sched/init/os_smpstart.c
index da7852317c1bfcf5c989915aa52f5311777a6ffe..17316e5b6167e5c637a74bbb69b80b2ceec4427a 100644
--- a/sched/init/os_smpstart.c
+++ b/sched/init/os_smpstart.c
@@ -133,7 +133,7 @@ int os_idle_task(int argc, FAR char *argv[])
 {
   /* Enter the IDLE loop */
 
-  sdbg("CPU%d: Beginning Idle Loop\n", this_cpu());
+  sinfo("CPU%d: Beginning Idle Loop\n", this_cpu());
 
   for (; ; )
     {
@@ -207,7 +207,7 @@ int os_smp_start(void)
       ret = up_cpu_idlestack(cpu, tcb, CONFIG_SMP_IDLETHREAD_STACKSIZE);
       if (ret < 0)
         {
-          sdbg("ERROR: Failed to allocate stack for CPU%d\n", cpu);
+          serr("ERROR: Failed to allocate stack for CPU%d\n", cpu);
           return ret;
         }
 
@@ -218,6 +218,13 @@ int os_smp_start(void)
        */
 
       up_initial_state(tcb);
+
+      /* Set the task flags to indicate that this is a kernel thread and that
+       * this task is locked to this CPU.
+       */
+
+      tcb->flags = (TCB_FLAG_TTYPE_KERNEL | TCB_FLAG_NONCANCELABLE | TCB_FLAG_CPU_LOCKED);
+      tcb->cpu   = cpu;
     }
 
   /* Then start all of the other CPUs after we have completed the memory
@@ -231,7 +238,7 @@ int os_smp_start(void)
       ret = up_cpu_start(cpu);
       if (ret < 0)
         {
-          sdbg("ERROR: Failed to start CPU%d: %d\n", cpu, ret);
+          serr("ERROR: Failed to start CPU%d: %d\n", cpu, ret);
           return ret;
         }
     }
diff --git a/sched/init/os_start.c b/sched/init/os_start.c
index 5a50c1b2fc3a84890dc06e2d14a536b3792b59f1..00f932fd13b835312dcbc57f5d7f5bb0e7eaec10 100644
--- a/sched/init/os_start.c
+++ b/sched/init/os_start.c
@@ -49,11 +49,12 @@
 #include  
 #include  
 #include  
-#include  
+#include  
 #include  
 #include  
 #include  
 #include  
+#include  
 #include  
 
 #include  "sched/sched.h"
@@ -218,8 +219,8 @@ volatile pid_t g_lastpid;
  * 1. This hash table greatly speeds the determination of a new unique
  *    process ID for a task, and
  * 2. Is used to quickly map a process ID into a TCB.
- * It has the side effects of using more memory and limiting
  *
+ * It has the side effects of using more memory and limiting
  * the number of tasks to CONFIG_MAX_TASKS.
  */
 
@@ -372,7 +373,7 @@ void os_start(void)
 #endif
   int i;
 
-  slldbg("Entry\n");
+  sinfo("Entry\n");
 
   /* Boot up is complete */
 
@@ -441,7 +442,7 @@ void os_start(void)
        * that has pid == 0 and sched_priority == 0.
        */
 
-      bzero((void *)&g_idletcb[cpu], sizeof(struct task_tcb_s));
+      memset((void *)&g_idletcb[cpu], 0, sizeof(struct task_tcb_s));
       g_idletcb[cpu].cmn.pid        = g_lastpid;
       g_idletcb[cpu].cmn.task_state = TSTATE_TASK_RUNNING;
 
@@ -469,10 +470,11 @@ void os_start(void)
        */
 
 #ifdef CONFIG_SMP
-      g_idletcb[cpu].cmn.flags = (TCB_FLAG_TTYPE_KERNEL | TCB_FLAG_CPU_LOCKED);
+      g_idletcb[cpu].cmn.flags = (TCB_FLAG_TTYPE_KERNEL | TCB_FLAG_NONCANCELABLE |
+                                  TCB_FLAG_CPU_LOCKED);
       g_idletcb[cpu].cmn.cpu   = cpu;
 #else
-      g_idletcb[cpu].cmn.flags = TCB_FLAG_TTYPE_KERNEL;
+      g_idletcb[cpu].cmn.flags = (TCB_FLAG_TTYPE_KERNEL | TCB_FLAG_NONCANCELABLE);
 #endif
 
 #ifdef CONFIG_SMP
@@ -757,7 +759,15 @@ void os_start(void)
       DEBUGVERIFY(group_initialize(&g_idletcb[cpu]));
       g_idletcb[cpu].cmn.group->tg_flags = GROUP_FLAG_NOCLDWAIT;
 #endif
-}
+    }
+
+  /* Start SYSLOG ***********************************************************/
+  /* Late initialization of the system logging device.  Some SYSLOG channel
+   * must be initialized late in the initialization sequence because it may
+   * depend on having IDLE task file structures setup.
+   */
+
+  syslog_initialize(SYSLOG_INIT_LATE);
 
 #ifdef CONFIG_SMP
   /* Start all CPUs *********************************************************/
@@ -797,7 +807,7 @@ void os_start(void)
   /* The IDLE Loop **********************************************************/
   /* When control is return to this point, the system is idle. */
 
-  sdbg("CPU0: Beginning Idle Loop\n");
+  sinfo("CPU0: Beginning Idle Loop\n");
   for (; ; )
     {
       /* Perform garbage collection (if it is not being done by the worker
diff --git a/sched/irq/irq.h b/sched/irq/irq.h
index 544be675d2820d3a78b6dea436f5a7154a424b14..ffb6e9859aa0b2ebe406d313220f78d7170f9559 100644
--- a/sched/irq/irq.h
+++ b/sched/irq/irq.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * sched/irq/irq.h
  *
- *   Copyright (C) 2007, 2008, 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2008, 2013-2014, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -44,11 +44,37 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
 #include 
 
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if defined(CONFIG_ARCH_MINIMAL_VECTORTABLE) && \
+   !defined(CONFIG_ARCH_NUSER_INTERRUPTS)
+#  error CONFIG_ARCH_NUSER_INTERRUPTS is not defined
+#endif
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* This is the type of the list of interrupt handlers, one for each IRQ.
+ * This type provided all of the information necessary to irq_dispatch to
+ * transfer control to interrupt handlers after the occurrence of an
+ * interrupt.
+ */
+
+struct irq_info_s
+{
+  xcpt_t handler;  /* Address of the interrupt handler */
+  FAR void *arg;   /* The argument provided to the interrupt handler. */
+};
+
 /****************************************************************************
  * Public Data
  ****************************************************************************/
@@ -58,19 +84,40 @@
  * occurrence of an interrupt.
  */
 
-extern FAR xcpt_t g_irqvector[NR_IRQS+1];
+#ifdef CONFIG_ARCH_MINIMAL_VECTORTABLE
+extern struct irq_info_s g_irqvector[CONFIG_ARCH_NUSER_INTERRUPTS];
+#else
+extern struct irq_info_s g_irqvector[NR_IRQS];
+#endif
+
+#ifdef CONFIG_ARCH_MINIMAL_VECTORTABLE
+/* This is the interrupt vector mapping table.  This must be provided by
+ * architecture specific logic if CONFIG_ARCH_MINIMAL_VECTORTABLE is define
+ * in the configuration.
+ *
+ * REVISIT: This should be declared in include/nuttx/irq.h.  The declaration
+ * at that location, however, introduces a circular include dependency so the
+ * declaration is here for the time being.
+ */
+
+extern const irq_mapped_t g_irqmap[NR_IRQS];
+#endif
 
 #ifdef CONFIG_SMP
 /* This is the spinlock that enforces critical sections when interrupts are
  * disabled.
  */
 
-extern volatile spinlock_t g_cpu_irqlock;
+extern volatile spinlock_t g_cpu_irqlock SP_SECTION;
 
 /* Used to keep track of which CPU(s) hold the IRQ lock. */
 
-extern volatile spinlock_t g_cpu_irqsetlock;
-extern volatile cpu_set_t g_cpu_irqset;
+extern volatile spinlock_t g_cpu_irqsetlock SP_SECTION;
+extern volatile cpu_set_t g_cpu_irqset SP_SECTION;
+
+/* Handles nested calls to enter_critical section from interrupt handlers */
+
+extern volatile uint8_t g_cpu_nestcount[CONFIG_SMP_NCPUS];
 #endif
 
 /****************************************************************************
@@ -104,7 +151,34 @@ void weak_function irq_initialize(void);
  *
  ****************************************************************************/
 
-int irq_unexpected_isr(int irq, FAR void *context);
+int irq_unexpected_isr(int irq, FAR void *context, FAR void *arg);
+
+/****************************************************************************
+ * Name:  irq_cpu_locked
+ *
+ * Description:
+ *   Test if the IRQ lock set OR if this CPU holds the IRQ lock
+ *   There is an interaction with pre-emption controls and IRQ locking:
+ *   Even if the pre-emption is enabled, tasks will be forced to pend if
+ *   the IRQ lock is also set UNLESS the CPU starting the task is the
+ *   holder of the IRQ lock.
+ *
+ * Inputs:
+ *   rtcb - Points to the blocked TCB that is ready-to-run
+ *
+ * Return Value:
+ *   true  - IRQs are locked by a different CPU.
+ *   false - IRQs are unlocked OR if they are locked BUT this CPU
+ *           is the holder of the lock.
+ *
+ *   Warning: This values are volatile at only valid at the instance that
+ *   the CPU set was queried.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SMP
+bool irq_cpu_locked(int cpu);
+#endif
 
 #undef EXTERN
 #ifdef __cplusplus
diff --git a/sched/irq/irq_attach.c b/sched/irq/irq_attach.c
index d111eeb5c7874026afce141f8412fb9c797be896..9d45d9c6379eced538e07f7d6585511d8b8a5a4d 100644
--- a/sched/irq/irq_attach.c
+++ b/sched/irq/irq_attach.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * sched/irq/irq_attach.c
  *
- *   Copyright (C) 2007-2008, 2010, 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2008, 2010, 2012, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -43,26 +43,6 @@
 
 #include "irq/irq.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -76,7 +56,7 @@
  *
  ****************************************************************************/
 
-int irq_attach(int irq, xcpt_t isr)
+int irq_attach(int irq, xcpt_t isr, FAR void *arg)
 {
 #if NR_IRQS > 0
   int ret = ERROR;
@@ -84,6 +64,21 @@ int irq_attach(int irq, xcpt_t isr)
   if ((unsigned)irq < NR_IRQS)
     {
       irqstate_t flags;
+      int ndx;
+
+#ifdef CONFIG_ARCH_MINIMAL_VECTORTABLE
+      /* Is there a mapping for this IRQ number? */
+
+      ndx = g_irqmap[irq];
+      if ((unsigned)ndx >= CONFIG_ARCH_NUSER_INTERRUPTS)
+        {
+          /* No.. then return failure. */
+
+          return ret;
+        }
+#else
+      ndx = irq;
+#endif
 
       /* If the new ISR is NULL, then the ISR is being detached.
        * In this case, disable the ISR and direct any interrupts
@@ -111,11 +106,14 @@ int irq_attach(int irq, xcpt_t isr)
            */
 
            isr = irq_unexpected_isr;
+           arg = NULL;
         }
 
-      /* Save the new ISR in the table. */
+      /* Save the new ISR and its argument in the table. */
+
+      g_irqvector[ndx].handler = isr;
+      g_irqvector[ndx].arg     = arg;
 
-      g_irqvector[irq] = isr;
       leave_critical_section(flags);
       ret = OK;
     }
diff --git a/sched/irq/irq_csection.c b/sched/irq/irq_csection.c
index 4cc2412ae74a0a7bafa5b4c82b92023154063a4c..a67dbc16bf672250c5bdd3d8b5a5fce706062055 100644
--- a/sched/irq/irq_csection.c
+++ b/sched/irq/irq_csection.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * sched/irq/irq_csection.c
  *
- *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -60,12 +60,113 @@
  * disabled.
  */
 
-volatile spinlock_t g_cpu_irqlock = SP_UNLOCKED;
+volatile spinlock_t g_cpu_irqlock SP_SECTION = SP_UNLOCKED;
 
 /* Used to keep track of which CPU(s) hold the IRQ lock. */
 
-volatile spinlock_t g_cpu_irqsetlock;
-volatile cpu_set_t g_cpu_irqset;
+volatile spinlock_t g_cpu_irqsetlock SP_SECTION;
+volatile cpu_set_t g_cpu_irqset SP_SECTION;
+
+/* Handles nested calls to enter_critical section from interrupt handlers */
+
+volatile uint8_t g_cpu_nestcount[CONFIG_SMP_NCPUS];
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: irq_waitlock
+ *
+ * Description:
+ *   Spin to get g_irq_waitlock, handling a known deadlock condition:
+ *
+ *   A deadlock may occur if enter_critical_section is called from an
+ *   interrupt handler.  Suppose:
+ *
+ *   - CPUn is in a critical section and has the g_cpu_irqlock spinlock.
+ *   - CPUm takes an interrupt and attempts to enter the critical section.
+ *   - It spins waiting on g_cpu_irqlock with interrupts disabled.
+ *   - CPUn calls up_cpu_pause() to pause operation on CPUm.  This will
+ *     issue an inter-CPU interrupt to CPUm
+ *   - But interrupts are disabled on CPUm so the up_cpu_pause() is never
+ *     handled, causing the deadlock.
+ *
+ *   This same deadlock can occur in the normal tasking case:
+ *
+ *   - A task on CPUn enters a critical section and has the g_cpu_irqlock
+ *     spinlock.
+ *   - Another task on CPUm attempts to enter the critical section but has
+ *     to wait, spinning to get g_cpu_irqlock with interrupts disabled.
+ *   - The task on CPUn causes a new task to become ready-torun and the
+ *     scheduler selects CPUm.  CPUm is requested to pause via a pause
+ *     interrupt.
+ *   - But the task on CPUm is also attempting to enter the critical
+ *     section.  Since it is spinning with interrupts disabled, CPUm cannot
+ *     process the pending pause interrupt, causing the deadlock.
+ *
+ *   This function detects this deadlock condition while spinning with \
+ *   interrupts disabled.
+ *
+ * Input Parameters:
+ *   cpu - The index of CPU that is trying to enter the critical section.
+ *
+ * Returned Value:
+ *   True:  The g_cpu_irqlock spinlock has been taken.
+ *   False: The g_cpu_irqlock spinlock has not been taken yet, but there is
+ *          a pending pause interrupt request.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SMP
+static inline bool irq_waitlock(int cpu)
+{
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+  FAR struct tcb_s *tcb = this_task();
+
+  /* Notify that we are waiting for a spinlock */
+
+  sched_note_spinlock(tcb, &g_cpu_irqlock);
+#endif
+
+  /* Duplicate the spin_lock() logic from spinlock.c, but adding the check
+   * for the deadlock condition.
+   */
+
+  while (spin_trylock(&g_cpu_irqlock) == SP_LOCKED)
+    {
+      /* Is a pause request pending? */
+
+      if (up_cpu_pausereq(cpu))
+        {
+          /* Yes.. some other CPU is requesting to pause this CPU!
+           * Abort the wait and return false.
+           */
+
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+          /* Notify that we are waiting for a spinlock */
+
+          sched_note_spinabort(tcb, &g_cpu_irqlock);
+#endif
+
+          return false;
+        }
+
+      SP_DSB();
+    }
+
+  /* We have g_cpu_irqlock! */
+
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+  /* Notify that we have the spinlock */
+
+  sched_note_spinlocked(tcb, &g_cpu_irqlock);
+#endif
+
+  SP_DMB();
+  return true;
+}
 #endif
 
 /****************************************************************************
@@ -86,63 +187,213 @@ volatile cpu_set_t g_cpu_irqset;
 irqstate_t enter_critical_section(void)
 {
   FAR struct tcb_s *rtcb;
+  irqstate_t ret;
+  int cpu;
+
+  /* Disable interrupts.
+   *
+   * NOTE 1: Ideally this should disable interrupts on all CPUs, but most
+   * architectures only support disabling interrupts on the local CPU.
+   * NOTE 2: Interrupts may already be disabled, but we call up_irq_save()
+   * unconditionally because we need to return valid interrupt status in any
+   * event.
+   * NOTE 3: We disable local interrupts BEFORE taking the spinlock in order
+   * to prevent possible waits on the spinlock from interrupt handling on
+   * the local CPU.
+   */
 
-  /* Check if we were called from an interrupt handler and that the tasks
-   * lists have been initialized.
+try_again:
+
+  ret = up_irq_save();
+
+  /* Verify that the system has sufficiently initialized so that the task
+   * lists are valid.
    */
 
-  if (!up_interrupt_context() && g_os_initstate >= OSINIT_TASKLISTS)
+  if (g_os_initstate >= OSINIT_TASKLISTS)
     {
-      /* Do we already have interrupts disabled? */
-
-      rtcb = this_task();
-      DEBUGASSERT(rtcb != NULL);
+      /* If called from an interrupt handler, then just take the spinlock.
+       * If we are already in a critical section, this will lock the CPU
+       * in the interrupt handler.  Sounds worse than it is.
+       */
 
-      if (rtcb->irqcount > 0)
+      if (up_interrupt_context())
         {
-          /* Yes... make sure that the spinlock is set and increment the IRQ
-           * lock count.
+          /* We are in an interrupt handler.  How can this happen?
+           *
+           *   1. We were not in a critical section when the interrupt
+           *      occurred.  In this case, the interrupt was entered with:
+           *
+           *      g_cpu_irqlock = SP_UNLOCKED.
+           *      g_cpu_nestcount = 0
+           *      All CPU bits in g_cpu_irqset should be zero
+           *
+           *   2. We were in a critical section and interrupts on this
+           *      this CPU were disabled -- this is an impossible case.
+           *
+           *   3. We were in critical section, but up_irq_save() only
+           *      disabled local interrupts on a different CPU;
+           *      Interrupts could still be enabled on this CPU.
+           *
+           *      g_cpu_irqlock = SP_LOCKED.
+           *      g_cpu_nestcount = 0
+           *      The bit in g_cpu_irqset for this CPU should be zero
+           *
+           *   4. An extension of 3 is that we may be re-entered numerous
+           *      times from the same interrupt handler.  In that case:
+           *
+           *      g_cpu_irqlock = SP_LOCKED.
+           *      g_cpu_nestcount > 0
+           *      The bit in g_cpu_irqset for this CPU should be zero
+           *
+           * NOTE: However, the interrupt entry conditions can change due
+           * to previous processing by the interrupt handler that may
+           * instantiate a new thread that has irqcount > 0 and may then
+           * set the bit in g_cpu_irqset and g_cpu_irqlock = SP_LOCKED
+           */
+
+          /* Handle nested calls to enter_critical_section() from the same
+           * interrupt.
+           */
+
+          cpu = this_cpu();
+          if (g_cpu_nestcount[cpu] > 0)
+            {
+              DEBUGASSERT(spin_islocked(&g_cpu_irqlock) &&
+                          g_cpu_nestcount[cpu] < UINT8_MAX);
+              g_cpu_nestcount[cpu]++;
+            }
+
+          /* This is the first call to enter_critical_section from the
+           * interrupt handler.
            */
 
-          DEBUGASSERT(g_cpu_irqlock == SP_LOCKED && rtcb->irqcount < INT16_MAX);
-          rtcb->irqcount++;
+          else
+            {
+              /* Make sure that the g_cpu_irqlock() was not already set
+               * by previous logic on this CPU that was executed by the
+               * interrupt handler.  We know that the bit in g_cpu_irqset
+               * for this CPU was zero on entry into the interrupt handler,
+               * so if it is non-zero now then we know that was the case.
+               */
+
+              if ((g_cpu_irqset & (1 << cpu)) == 0)
+                {
+                  /* Wait until we can get the spinlock (meaning that we are
+                   * no longer blocked by the critical section).
+                   */
+
+                  if (!irq_waitlock(cpu))
+                    {
+                      /* We are in a deadlock condition due to a pending
+                       * pause request interrupt request.  Break the
+                       * deadlock by handling the pause interrupt now.
+                       */
+
+                      DEBUGVERIFY(up_cpu_paused(cpu));
+                    }
+                }
+
+              /* In any event, the nesting count is now one */
+
+              g_cpu_nestcount[cpu] = 1;
+
+              /* Also set the CPU bit so that other CPUs will be aware that this
+               * CPU holds the critical section.
+               */
+
+              spin_setbit(&g_cpu_irqset, cpu, &g_cpu_irqsetlock,
+                          &g_cpu_irqlock);
+            }
         }
       else
         {
-          /* NO.. Take the spinlock to get exclusive access and set the lock
-           * count to 1.
-           *
-           * We must avoid that case where a context occurs between taking the
-           * g_cpu_irqlock and disabling interrupts.  Also interrupts disables
-           * must follow a stacked order.  We cannot other context switches to
-           * re-order the enabling/disabling of interrupts.
-           *
-           * The scheduler accomplishes this by treating the irqcount like
-           * lockcount:  Both will disable pre-emption.
-           */
+          /* Normal tasking environment. */
+          /* Do we already have interrupts disabled? */
+
+           rtcb = this_task();
+           DEBUGASSERT(rtcb != NULL);
 
-          spin_setbit(&g_cpu_irqset, this_cpu(), &g_cpu_irqsetlock,
-                      &g_cpu_irqlock);
-          rtcb->irqcount = 1;
+           if (rtcb->irqcount > 0)
+            {
+              /* Yes... make sure that the spinlock is set and increment the
+               * IRQ lock count.
+               *
+               * NOTE: If irqcount > 0 then (1) we are in a critical section, and
+               * (2) this CPU should hold the lock.
+               */
+
+              DEBUGASSERT(spin_islocked(&g_cpu_irqlock) &&
+                          (g_cpu_irqset & (1 << this_cpu())) != 0 &&
+                          rtcb->irqcount < INT16_MAX);
+              rtcb->irqcount++;
+            }
+          else
+            {
+              /* If we get here with irqcount == 0, then we know that the
+               * current task running on this CPU is not in a critical
+               * section.  However other tasks on other CPUs may be in a
+               * critical section.  If so, we must wait until they release
+               * the spinlock.
+               */
+
+              cpu = this_cpu();
+              DEBUGASSERT((g_cpu_irqset & (1 << cpu)) == 0);
+
+              if (!irq_waitlock(cpu))
+                {
+                  /* We are in a deadlock condition due to a pending pause
+                   * request interrupt.  Re-enable interrupts on this CPU
+                   * and try again.  Briefly re-enabling interrupts should
+                   * be sufficient to permit processing the pending pause
+                   * request.
+                   *
+                   * NOTE: This should never happen on architectures like
+                   * the Cortex-A; the inter-CPU interrupt (SGI) is not
+                   * maskable.
+                   */
+
+                  up_irq_restore(ret);
+                  goto try_again;
+                }
+
+              /* The set the lock count to 1.
+               *
+               * Interrupts disables must follow a stacked order.  We
+               * cannot other context switches to re-order the enabling
+               * disabling of interrupts.
+               *
+               * The scheduler accomplishes this by treating the irqcount
+               * like lockcount:  Both will disable pre-emption.
+               */
+
+              spin_setbit(&g_cpu_irqset, cpu, &g_cpu_irqsetlock,
+                          &g_cpu_irqlock);
+              rtcb->irqcount = 1;
 
 #ifdef CONFIG_SCHED_INSTRUMENTATION_CSECTION
-          /* Note that we have entered the critical section */
+              /* Note that we have entered the critical section */
 
-          sched_note_csection(rtcb, true);
+              sched_note_csection(rtcb, true);
 #endif
+            }
         }
     }
 
-  /* Then disable interrupts (they may already be disabled, be we need to
-   * return valid interrupt status in any event).
-   */
+  /* Return interrupt status */
 
-  return up_irq_save();
+  return ret;
 }
 #else /* defined(CONFIG_SCHED_INSTRUMENTATION_CSECTION) */
 irqstate_t enter_critical_section(void)
 {
-  /* Check if we were called from an interrupt handler and that the tasks
+  irqstate_t ret;
+
+  /* Disable interrupts */
+
+  ret = up_irq_save();
+
+  /* Check if we were called from an interrupt handler and that the task
    * lists have been initialized.
    */
 
@@ -151,14 +402,14 @@ irqstate_t enter_critical_section(void)
       FAR struct tcb_s *rtcb = this_task();
       DEBUGASSERT(rtcb != NULL);
 
-      /* No.. note that we have entered the critical section */
+      /* Yes.. Note that we have entered the critical section */
 
       sched_note_csection(rtcb, true);
     }
 
-  /* And disable interrupts */
+  /* Return interrupt status */
 
-  return up_irq_save();
+  return ret;
 }
 #endif
 
@@ -174,60 +425,125 @@ irqstate_t enter_critical_section(void)
 #ifdef CONFIG_SMP
 void leave_critical_section(irqstate_t flags)
 {
-  /* Check if we were called from an interrupt handler and that the tasks
-   * lists have been initialized.
+  int cpu;
+
+  /* Verify that the system has sufficiently initialized so that the task
+   * lists are valid.
    */
 
-  if (!up_interrupt_context() && g_os_initstate >= OSINIT_TASKLISTS)
+  if (g_os_initstate >= OSINIT_TASKLISTS)
     {
-      FAR struct tcb_s *rtcb = this_task();
-      DEBUGASSERT(rtcb != 0 && rtcb->irqcount > 0);
-
-      /* Will we still have interrupts disabled after decrementing the
-       * count?
+      /* If called from an interrupt handler, then just release the
+       * spinlock.  The interrupt handling logic should already hold the
+       * spinlock if enter_critical_section() has been called.  Unlocking
+       * the spinlock will allow interrupt handlers on other CPUs to execute
+       * again.
        */
 
-      if (rtcb->irqcount > 1)
+      if (up_interrupt_context())
         {
-          /* Yes... make sure that the spinlock is set */
+          /* We are in an interrupt handler. Check if the last call to
+           * enter_critical_section() was nested.
+           */
+
+          cpu = this_cpu();
+          if (g_cpu_nestcount[cpu] > 1)
+            {
+              /* Yes.. then just decrement the nesting count */
+
+              DEBUGASSERT(spin_islocked(&g_cpu_irqlock));
+              g_cpu_nestcount[cpu]--;
+            }
+          else
+            {
+              /* No, not nested. Restore the g_cpu_irqset for this CPU
+               * and release the spinlock (if necessary).
+               */
 
-          DEBUGASSERT(g_cpu_irqlock == SP_LOCKED);
-          rtcb->irqcount--;
+              DEBUGASSERT(spin_islocked(&g_cpu_irqlock) &&
+                          g_cpu_nestcount[cpu] == 1);
+
+              FAR struct tcb_s *rtcb = this_task();
+              DEBUGASSERT(rtcb != NULL);
+
+              if (rtcb->irqcount <= 0)
+                {
+                  spin_clrbit(&g_cpu_irqset, cpu, &g_cpu_irqsetlock,
+                              &g_cpu_irqlock);
+                }
+
+              g_cpu_nestcount[cpu] = 0;
+            }
         }
       else
         {
-#ifdef CONFIG_SCHED_INSTRUMENTATION_CSECTION
-          /* No.. Note that we have entered the critical section */
+          FAR struct tcb_s *rtcb = this_task();
+          DEBUGASSERT(rtcb != NULL && rtcb->irqcount > 0);
 
-          sched_note_csection(rtcb, false);
-#endif
-          /* Decrement our count on the lock.  If all CPUs have released,
-           * then unlock the spinlock.
+          /* Normal tasking context.  We need to coordinate with other
+           * tasks.
+           *
+           * Will we still have interrupts disabled after decrementing the
+           * count?
            */
 
-          rtcb->irqcount = 0;
-          spin_clrbit(&g_cpu_irqset, this_cpu(), &g_cpu_irqsetlock,
-                      &g_cpu_irqlock);
-
-          /* Have all CPUs release the lock? */
+          if (rtcb->irqcount > 1)
+            {
+              /* Yes... the spinlock should remain set */
 
-          if (!spin_islocked(&g_cpu_irqlock))
+              DEBUGASSERT(spin_islocked(&g_cpu_irqlock));
+              rtcb->irqcount--;
+            }
+          else
             {
-              /* Check if there are pending tasks and that pre-emption is
-               * also enabled.
+ #ifdef CONFIG_SCHED_INSTRUMENTATION_CSECTION
+              /* No.. Note that we have left the critical section */
+
+              sched_note_csection(rtcb, false);
+#endif
+              /* Decrement our count on the lock.  If all CPUs have
+               * released, then unlock the spinlock.
+               */
+
+              cpu = this_cpu();
+              DEBUGASSERT(spin_islocked(&g_cpu_irqlock) &&
+                          (g_cpu_irqset & (1 << cpu)) != 0);
+
+              /* Check if releasing the lock held by this CPU will unlock the
+               * critical section.
                */
 
-              if (g_pendingtasks.head != NULL && !spin_islocked(&g_cpu_schedlock))
+              if ((g_cpu_irqset & ~(1 << cpu)) == 0)
                 {
-                  /* Release any ready-to-run tasks that have collected in
-                   * g_pendingtasks if the scheduler is not locked.
-                   *
-                   * NOTE: This operation has a very high likelihood of causing
-                   * this task to be switched out!
+                  /* Yes.. Check if there are pending tasks and that pre-emption
+                   * is also enabled.  This is necessary because we may have
+                   * deferred the up_release_pending() call in sched_unlock()
+                   * because we were within a critical section then.
                    */
 
-                  up_release_pending();
+                  if (g_pendingtasks.head != NULL &&
+                      !spin_islocked(&g_cpu_schedlock))
+                    {
+                      /* Release any ready-to-run tasks that have collected
+                       * in g_pendingtasks.  NOTE: This operation has a very
+                       * high likelihood of causing this task to be switched
+                       * out!
+                       */
+
+                      up_release_pending();
+                    }
                 }
+
+              /* Now, possibly on return from a context switch, clear our
+               * count on the lock.  If all CPUs have released the lock,
+               * then unlock the global IRQ spinlock.
+               */
+
+              rtcb->irqcount = 0;
+              spin_clrbit(&g_cpu_irqset, cpu, &g_cpu_irqsetlock,
+                          &g_cpu_irqlock);
+
+              /* Have all CPUs released the lock? */
             }
         }
     }
@@ -250,7 +566,7 @@ void leave_critical_section(irqstate_t flags)
       FAR struct tcb_s *rtcb = this_task();
       DEBUGASSERT(rtcb != NULL);
 
-      /* Note that we have left the critical section */
+      /* Yes.. Note that we have left the critical section */
 
       sched_note_csection(rtcb, false);
     }
@@ -261,4 +577,78 @@ void leave_critical_section(irqstate_t flags)
 }
 #endif
 
-#endif /* CONFIG_SMP || CONFIG_SCHED_INSTRUMENTATION_CSECTION*/
+/****************************************************************************
+ * Name:  irq_cpu_locked
+ *
+ * Description:
+ *   Test if the IRQ lock set OR if this CPU holds the IRQ lock
+ *   There is an interaction with pre-emption controls and IRQ locking:
+ *   Even if the pre-emption is enabled, tasks will be forced to pend if
+ *   the IRQ lock is also set UNLESS the CPU starting the task is the
+ *   holder of the IRQ lock.
+ *
+ * Inputs:
+ *   rtcb - Points to the blocked TCB that is ready-to-run
+ *
+ * Return Value:
+ *   true  - IRQs are locked by a different CPU.
+ *   false - IRQs are unlocked OR if they are locked BUT this CPU
+ *           is the holder of the lock.
+ *
+ *   Warning: This values are volatile at only valid at the instance that
+ *   the CPU set was queried.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SMP
+bool irq_cpu_locked(int cpu)
+{
+  cpu_set_t irqset;
+
+  /* g_cpu_irqset is not valid in early phases of initialization */
+
+  if (g_os_initstate < OSINIT_OSREADY)
+    {
+      /* We are still single threaded.  In either state of g_cpu_irqlock,
+       * the correct return value should always be false.
+       */
+
+      return false;
+    }
+
+  /* Test if g_cpu_irqlock is locked.  We don't really need to use check
+   * g_cpu_irqlock to do this, we can use the g_cpu_set.
+   *
+   * Sample the g_cpu_irqset once.  That is an atomic operation.  All
+   * subsequent operations will operate on the sampled cpu set.
+   */
+
+  irqset = (cpu_set_t)g_cpu_irqset;
+  if (irqset != 0)
+    {
+      /* Some CPU holds the lock.  So g_cpu_irqlock should be locked.
+       * Return false if the 'cpu' is the holder of the lock; return
+       * true if g_cpu_irqlock is locked, but this CPU is not the
+       * holder of the lock.
+       */
+
+      return ((irqset & (1 << cpu)) == 0);
+    }
+
+  /* No CPU holds the lock */
+
+  else
+    {
+      /* In this case g_cpu_irqlock should be unlocked.  However, if
+       * the lock was established in the interrupt handler AND there are
+       * no bits set in g_cpu_irqset, that probabaly means only that
+       * critical section was established from an interrupt handler.
+       * Return false in either case.
+       */
+
+      return false;
+    }
+}
+#endif
+
+#endif /* CONFIG_SMP || CONFIG_SCHED_INSTRUMENTATION_CSECTION */
diff --git a/sched/irq/irq_dispatch.c b/sched/irq/irq_dispatch.c
index becc5b09795c2551783207cd70a2b52f843e3339..b507c065b1da91600c297e6f811a6df7cff8eb77 100644
--- a/sched/irq/irq_dispatch.c
+++ b/sched/irq/irq_dispatch.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * sched/irq/irq_dispatch.c
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2008, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -62,23 +62,42 @@
 void irq_dispatch(int irq, FAR void *context)
 {
   xcpt_t vector;
+  FAR void *arg;
 
   /* Perform some sanity checks */
 
 #if NR_IRQS > 0
-  if ((unsigned)irq >= NR_IRQS || g_irqvector[irq] == NULL)
+  if ((unsigned)irq >= NR_IRQS)
     {
       vector = irq_unexpected_isr;
+      arg    = NULL;
     }
   else
     {
-      vector = g_irqvector[irq];
+#ifdef CONFIG_ARCH_MINIMAL_VECTORTABLE
+      irq_mapped_t ndx = g_irqmap[irq];
+      if (ndx >= CONFIG_ARCH_NUSER_INTERRUPTS)
+        {
+          vector = irq_unexpected_isr;
+          arg    = NULL;
+        }
+      else
+        {
+          vector = g_irqvector[ndx].handler;
+          arg    = g_irqvector[ndx].arg;
+        }
+#else
+      vector = g_irqvector[irq].handler;
+      arg    = g_irqvector[irq].arg;
+#endif
     }
+
 #else
   vector = irq_unexpected_isr;
+  arg    = NULL;
 #endif
 
   /* Then dispatch to the interrupt handler */
 
-  vector(irq, context);
+  vector(irq, context, arg);
 }
diff --git a/sched/irq/irq_initialize.c b/sched/irq/irq_initialize.c
index d558ff97e1874e6bb4b28fff01bd9461e2aa125d..18bbafc4b37ad6a955e86d120b268245534a0eb4 100644
--- a/sched/irq/irq_initialize.c
+++ b/sched/irq/irq_initialize.c
@@ -43,11 +43,29 @@
 
 #include "irq/irq.h"
 
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* This is the number of entries in the interrupt vector table */
+
+#ifdef CONFIG_ARCH_MINIMAL_VECTORTABLE
+#  define TAB_SIZE CONFIG_ARCH_NUSER_INTERRUPTS
+#else
+#  define TAB_SIZE NR_IRQS
+#endif
+
 /****************************************************************************
  * Public Data
  ****************************************************************************/
 
-FAR xcpt_t g_irqvector[NR_IRQS+1];
+/* This is the interrupt vector table */
+
+#ifdef CONFIG_ARCH_MINIMAL_VECTORTABLE
+struct irq_info_s g_irqvector[CONFIG_ARCH_NUSER_INTERRUPTS];
+#else
+struct irq_info_s g_irqvector[NR_IRQS];
+#endif
 
 /****************************************************************************
  * Public Functions
@@ -67,8 +85,9 @@ void irq_initialize(void)
 
   /* Point all interrupt vectors to the unexpected interrupt */
 
-  for (i = 0; i < NR_IRQS; i++)
+  for (i = 0; i < TAB_SIZE; i++)
     {
-      g_irqvector[i] = irq_unexpected_isr;
+      g_irqvector[i].handler = irq_unexpected_isr;
+      g_irqvector[i].arg     = NULL;
     }
 }
diff --git a/sched/irq/irq_unexpectedisr.c b/sched/irq/irq_unexpectedisr.c
index 191d0a21940c27fde966c770dd182086ed3cab1a..ae3097786f187629102045a3d52cb9ff68002496 100644
--- a/sched/irq/irq_unexpectedisr.c
+++ b/sched/irq/irq_unexpectedisr.c
@@ -58,10 +58,10 @@
  *
  ****************************************************************************/
 
-int irq_unexpected_isr(int irq, FAR void *context)
+int irq_unexpected_isr(int irq, FAR void *context, FAR void *arg)
 {
   (void)up_irq_save();
-  lldbg("irq: %d\n", irq);
+  _err("ERROR irq: %d\n", irq);
   PANIC();
   return OK; /* Won't get here */
 }
diff --git a/sched/module/Make.defs b/sched/module/Make.defs
index 00f8467560636fd54489180ba523621f4da63e2c..f774f42bb00d4b144749039dc7b3e02cd52a40d8 100644
--- a/sched/module/Make.defs
+++ b/sched/module/Make.defs
@@ -1,7 +1,7 @@
 ############################################################################
 # sched/module/Make.defs
 #
-#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -37,13 +37,7 @@ ifeq ($(CONFIG_MODULE),y)
 
 # OS module interfaces
 
-CSRCS += mod_insmod.c mod_rmmod.c
-
-# loadable module library
-
-CSRCS += mod_bind.c mod_init.c mod_iobuffer.c mod_load.c mod_read.c
-CSRCS += mod_registry.c mod_sections.c mod_symbols.c mod_symtab.c
-CSRCS += mod_uninit.c mod_unload.c mod_verify.c
+CSRCS += mod_insmod.c mod_rmmod.c mod_modsym.c mod_modhandle.c
 
 # procfs support
 
diff --git a/sched/module/mod_insmod.c b/sched/module/mod_insmod.c
index 9242c5419efbad38eef2ace7d14f067c9490ac60..c20cc7f3f6197b8035aa720614ed5562e1256215 100644
--- a/sched/module/mod_insmod.c
+++ b/sched/module/mod_insmod.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * sched/module/mod_insmod.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -43,14 +43,14 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
+#include 
 
 #include 
 #include 
 #include 
-
-#include "module/module.h"
+#include 
 
 #ifdef CONFIG_MODULE
 
@@ -58,20 +58,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, and CONFIG_DEBUG_BINFMT have to be
- * defined or CONFIG_MODULE_DUMPBUFFER does nothing.
- */
-
-#if !defined(CONFIG_DEBUG_VERBOSE) || !defined (CONFIG_DEBUG_BINFMT)
-#  undef CONFIG_MODULE_DUMPBUFFER
-#endif
-
-#ifdef CONFIG_MODULE_DUMPBUFFER
-# define mod_dumpbuffer(m,b,n) svdbgdumpbuffer(m,b,n)
-#else
-# define mod_dumpbuffer(m,b,n)
-#endif
-
 #ifndef MIN
 #  define MIN(a,b) (a < b ? a : b)
 #endif
@@ -84,55 +70,55 @@
  * Name: mod_dumploadinfo
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_BINFMT)
+#if defined(CONFIG_DEBUG_INFO) && defined(CONFIG_DEBUG_BINFMT)
 static void mod_dumploadinfo(FAR struct mod_loadinfo_s *loadinfo)
 {
   int i;
 
-  sdbg("LOAD_INFO:\n");
-  sdbg("  textalloc:    %08lx\n", (long)loadinfo->textalloc);
-  sdbg("  datastart:    %08lx\n", (long)loadinfo->datastart);
-  sdbg("  textsize:     %ld\n",   (long)loadinfo->textsize);
-  sdbg("  datasize:     %ld\n",   (long)loadinfo->datasize);
-  sdbg("  filelen:      %ld\n",   (long)loadinfo->filelen);
-  sdbg("  filfd:        %d\n",    loadinfo->filfd);
-  sdbg("  symtabidx:    %d\n",    loadinfo->symtabidx);
-  sdbg("  strtabidx:    %d\n",    loadinfo->strtabidx);
-
-  sdbg("ELF Header:\n");
-  sdbg("  e_ident:      %02x %02x %02x %02x\n",
+  binfo("LOAD_INFO:\n");
+  binfo("  textalloc:    %08lx\n", (long)loadinfo->textalloc);
+  binfo("  datastart:    %08lx\n", (long)loadinfo->datastart);
+  binfo("  textsize:     %ld\n",   (long)loadinfo->textsize);
+  binfo("  datasize:     %ld\n",   (long)loadinfo->datasize);
+  binfo("  filelen:      %ld\n",   (long)loadinfo->filelen);
+  binfo("  filfd:        %d\n",    loadinfo->filfd);
+  binfo("  symtabidx:    %d\n",    loadinfo->symtabidx);
+  binfo("  strtabidx:    %d\n",    loadinfo->strtabidx);
+
+  binfo("ELF Header:\n");
+  binfo("  e_ident:      %02x %02x %02x %02x\n",
     loadinfo->ehdr.e_ident[0], loadinfo->ehdr.e_ident[1],
     loadinfo->ehdr.e_ident[2], loadinfo->ehdr.e_ident[3]);
-  sdbg("  e_type:       %04x\n",  loadinfo->ehdr.e_type);
-  sdbg("  e_machine:    %04x\n",  loadinfo->ehdr.e_machine);
-  sdbg("  e_version:    %08x\n",  loadinfo->ehdr.e_version);
-  sdbg("  e_entry:      %08lx\n", (long)loadinfo->ehdr.e_entry);
-  sdbg("  e_phoff:      %d\n",    loadinfo->ehdr.e_phoff);
-  sdbg("  e_shoff:      %d\n",    loadinfo->ehdr.e_shoff);
-  sdbg("  e_flags:      %08x\n" , loadinfo->ehdr.e_flags);
-  sdbg("  e_ehsize:     %d\n",    loadinfo->ehdr.e_ehsize);
-  sdbg("  e_phentsize:  %d\n",    loadinfo->ehdr.e_phentsize);
-  sdbg("  e_phnum:      %d\n",    loadinfo->ehdr.e_phnum);
-  sdbg("  e_shentsize:  %d\n",    loadinfo->ehdr.e_shentsize);
-  sdbg("  e_shnum:      %d\n",    loadinfo->ehdr.e_shnum);
-  sdbg("  e_shstrndx:   %d\n",    loadinfo->ehdr.e_shstrndx);
+  binfo("  e_type:       %04x\n",  loadinfo->ehdr.e_type);
+  binfo("  e_machine:    %04x\n",  loadinfo->ehdr.e_machine);
+  binfo("  e_version:    %08x\n",  loadinfo->ehdr.e_version);
+  binfo("  e_entry:      %08lx\n", (long)loadinfo->ehdr.e_entry);
+  binfo("  e_phoff:      %d\n",    loadinfo->ehdr.e_phoff);
+  binfo("  e_shoff:      %d\n",    loadinfo->ehdr.e_shoff);
+  binfo("  e_flags:      %08x\n" , loadinfo->ehdr.e_flags);
+  binfo("  e_ehsize:     %d\n",    loadinfo->ehdr.e_ehsize);
+  binfo("  e_phentsize:  %d\n",    loadinfo->ehdr.e_phentsize);
+  binfo("  e_phnum:      %d\n",    loadinfo->ehdr.e_phnum);
+  binfo("  e_shentsize:  %d\n",    loadinfo->ehdr.e_shentsize);
+  binfo("  e_shnum:      %d\n",    loadinfo->ehdr.e_shnum);
+  binfo("  e_shstrndx:   %d\n",    loadinfo->ehdr.e_shstrndx);
 
   if (loadinfo->shdr && loadinfo->ehdr.e_shnum > 0)
     {
       for (i = 0; i < loadinfo->ehdr.e_shnum; i++)
         {
           FAR Elf32_Shdr *shdr = &loadinfo->shdr[i];
-          sdbg("Sections %d:\n", i);
-          sdbg("  sh_name:      %08x\n", shdr->sh_name);
-          sdbg("  sh_type:      %08x\n", shdr->sh_type);
-          sdbg("  sh_flags:     %08x\n", shdr->sh_flags);
-          sdbg("  sh_addr:      %08x\n", shdr->sh_addr);
-          sdbg("  sh_offset:    %d\n",   shdr->sh_offset);
-          sdbg("  sh_size:      %d\n",   shdr->sh_size);
-          sdbg("  sh_link:      %d\n",   shdr->sh_link);
-          sdbg("  sh_info:      %d\n",   shdr->sh_info);
-          sdbg("  sh_addralign: %d\n",   shdr->sh_addralign);
-          sdbg("  sh_entsize:   %d\n",   shdr->sh_entsize);
+          binfo("Sections %d:\n", i);
+          binfo("  sh_name:      %08x\n", shdr->sh_name);
+          binfo("  sh_type:      %08x\n", shdr->sh_type);
+          binfo("  sh_flags:     %08x\n", shdr->sh_flags);
+          binfo("  sh_addr:      %08x\n", shdr->sh_addr);
+          binfo("  sh_offset:    %d\n",   shdr->sh_offset);
+          binfo("  sh_size:      %d\n",   shdr->sh_size);
+          binfo("  sh_link:      %d\n",   shdr->sh_link);
+          binfo("  sh_info:      %d\n",   shdr->sh_info);
+          binfo("  sh_addralign: %d\n",   shdr->sh_addralign);
+          binfo("  sh_entsize:   %d\n",   shdr->sh_entsize);
         }
     }
 }
@@ -144,12 +130,12 @@ static void mod_dumploadinfo(FAR struct mod_loadinfo_s *loadinfo)
  * Name: mod_dumpinitializer
  ****************************************************************************/
 
-#ifdef CONFIG_MODULE_DUMPBUFFER
+#ifdef CONFIG_MODLIB_DUMPBUFFER
 static void mod_dumpinitializer(mod_initializer_t initializer,
                                 FAR struct mod_loadinfo_s *loadinfo)
 {
-  mod_dumpbuffer("Initializer code", (FAR const uint8_t *)initializer,
-                 MIN(loadinfo->textsize - loadinfo->ehdr.e_entry, 512));
+  modlib_dumpbuffer("Initializer code", (FAR const uint8_t *)initializer,
+                    MIN(loadinfo->textsize - loadinfo->ehdr.e_entry, 512));
 }
 #else
 # define mod_dumpinitializer(b,l)
@@ -166,53 +152,55 @@ static void mod_dumpinitializer(mod_initializer_t initializer,
  *   Verify that the file is an ELF module binary and, if so, load the
  *   module into kernel memory and initialize it for use.
  *
- *   NOTE: mod_setsymtab had to have been called in board-specific OS logic
- *   prior to calling this function from application logic (perhaps via
+ *   NOTE: modlib_setsymtab() had to have been called in board-specific OS
+ *   logic prior to calling this function from application logic (perhaps via
  *   boardctl(BOARDIOC_OS_SYMTAB).  Otherwise, insmod will be unable to
  *   resolve symbols in the OS module.
  *
  * Input Parameters:
  *
- *   filename   - Full path to the module binary to be loaded
- *   modulename - The name that can be used to refer to the module after
+ *   filename - Full path to the module binary to be loaded
+ *   modname  - The name that can be used to refer to the module after
  *     it has been loaded.
  *
  * Returned Value:
- *   Zero (OK) on success.  On any failure, -1 (ERROR) is returned the
- *   errno value is set appropriately.
+ *   A non-NULL module handle that can be used on subsequent calls to other
+ *   module interfaces is returned on success.  If insmod() was unable to
+ *   load the module insmod() will return a NULL handle and the errno
+ *   variable will be set appropriately.
  *
  ****************************************************************************/
 
-int insmod(FAR const char *filename, FAR const char *modulename)
+FAR void *insmod(FAR const char *filename, FAR const char *modname)
 {
   struct mod_loadinfo_s loadinfo;
   FAR struct module_s *modp;
   mod_initializer_t initializer;
   int ret;
 
-  DEBUGASSERT(filename != NULL && modulename != NULL);
-  svdbg("Loading file: %s\n", filename);
+  DEBUGASSERT(filename != NULL && modname != NULL);
+  binfo("Loading file: %s\n", filename);
 
   /* Get exclusive access to the module registry */
 
-  mod_registry_lock();
+  modlib_registry_lock();
 
   /* Check if this module is already installed */
 
-  if (mod_registry_find(modulename) != NULL)
+  if (modlib_registry_find(modname) != NULL)
     {
-      mod_registry_unlock();
+      modlib_registry_unlock();
       ret = -EEXIST;
       goto errout_with_lock;
     }
 
   /* Initialize the ELF library to load the program binary. */
 
-  ret = mod_initialize(filename, &loadinfo);
+  ret = modlib_initialize(filename, &loadinfo);
   mod_dumploadinfo(&loadinfo);
   if (ret != 0)
     {
-      sdbg("ERROR: Failed to initialize to load module: %d\n", ret);
+      serr("ERROR: Failed to initialize to load module: %d\n", ret);
       goto errout_with_lock;
     }
 
@@ -221,34 +209,34 @@ int insmod(FAR const char *filename, FAR const char *modulename)
   modp = (FAR struct module_s *)kmm_zalloc(sizeof(struct module_s));
   if (ret != 0)
     {
-      sdbg("Failed to initialize for load of ELF program: %d\n", ret);
+      binfo("Failed to initialize for load of ELF program: %d\n", ret);
       goto errout_with_loadinfo;
     }
 
   /* Save the module name in the registry entry */
 
-  strncpy(modp->modulename, modulename, MODULENAME_MAX);
+  strncpy(modp->modname, modname, MODLIB_NAMEMAX);
 
   /* Load the program binary */
 
-  ret = mod_load(&loadinfo);
+  ret = modlib_load(&loadinfo);
   mod_dumploadinfo(&loadinfo);
   if (ret != 0)
     {
-      sdbg("Failed to load ELF program binary: %d\n", ret);
+      binfo("Failed to load ELF program binary: %d\n", ret);
       goto errout_with_registry_entry;
     }
 
   /* Bind the program to the kernel symbol table */
 
-  ret = mod_bind(&loadinfo);
+  ret = modlib_bind(modp, &loadinfo);
   if (ret != 0)
     {
-      sdbg("Failed to bind symbols program binary: %d\n", ret);
+      binfo("Failed to bind symbols program binary: %d\n", ret);
       goto errout_with_load;
     }
 
-  /* Return the load information */
+  /* Save the load information */
 
   modp->alloc       = (FAR void *)loadinfo.textalloc;
 #if defined(CONFIG_FS_PROCFS) && !defined(CONFIG_FS_PROCFS_EXCLUDE_MODULE)
@@ -266,31 +254,32 @@ int insmod(FAR const char *filename, FAR const char *modulename)
 
   /* Call the module initializer */
 
-  ret = initializer(&modp->uninitializer, &modp->arg);
+  ret = initializer(&modp->modinfo);
   if (ret < 0)
     {
-      sdbg("Failed to initialize the module: %d\n", ret);
+      binfo("Failed to initialize the module: %d\n", ret);
       goto errout_with_load;
     }
 
   /* Add the new module entry to the registry */
 
-  mod_registry_add(modp);
+  modlib_registry_add(modp);
 
-  mod_uninitialize(&loadinfo);
-  mod_registry_unlock();
-  return OK;
+  modlib_uninitialize(&loadinfo);
+  modlib_registry_unlock();
+  return (FAR void *)modp;
 
 errout_with_load:
-  mod_unload(&loadinfo);
+  modlib_unload(&loadinfo);
+  (void)modlib_undepend(modp);
 errout_with_registry_entry:
   kmm_free(modp);
 errout_with_loadinfo:
-  mod_uninitialize(&loadinfo);
+  modlib_uninitialize(&loadinfo);
 errout_with_lock:
-  mod_registry_unlock();
+  modlib_registry_unlock();
   set_errno(-ret);
-  return ERROR;
+  return NULL;
 }
 
 #endif /* CONFIG_MODULE */
diff --git a/sched/module/mod_modhandle.c b/sched/module/mod_modhandle.c
new file mode 100644
index 0000000000000000000000000000000000000000..2ebf3a4b5eee355b2e3175a94a1dd6fd12041c72
--- /dev/null
+++ b/sched/module/mod_modhandle.c
@@ -0,0 +1,96 @@
+/****************************************************************************
+ * sched/module/mod_modhandle.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#ifdef CONFIG_MODULE
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: modhandle
+ *
+ * Description:
+ *   modhandle() returns the module handle for the installed module with the
+ *   provided name.  A secondary use of this function is to determin if a
+ *   module has been loaded or not.
+ *
+ * Input Parameters:
+ *   name   - A pointer to the module name string.
+ *
+ * Returned Value:
+ *   The non-NULL module handle previously returned by insmod() is returned
+ *   on success.  If no module with that name is installed, modhandle() will
+ *   return a NULL handle and the errno variable will be set appropriately.
+ *
+ ****************************************************************************/
+
+FAR void *modhandle(FAR const char *name)
+{
+  FAR struct module_s *modp;
+
+  DEBUGASSERT(name != NULL);
+
+  /* Get exclusive access to the module registry */
+
+  modlib_registry_lock();
+
+  /* Find the module entry for this name in the registry */
+
+  modp = modlib_registry_find(name);
+  if (modp == NULL)
+    {
+      serr("ERROR: Failed to find module %s: %d\n", name, ret);
+      set_errno(ENOENT);
+    }
+
+  modlib_registry_unlock();
+  return (FAR void *)modp;
+}
+
+#endif /* CONFIG_MODULE */
diff --git a/sched/module/mod_modsym.c b/sched/module/mod_modsym.c
new file mode 100644
index 0000000000000000000000000000000000000000..8aba9b1753caba26da628c358337115133717fad
--- /dev/null
+++ b/sched/module/mod_modsym.c
@@ -0,0 +1,131 @@
+/****************************************************************************
+ * sched/module/mod_modsym.c
+ *
+ *   Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: modsym
+ *
+ * Description:
+ *   modsym() returns the address of a symbol defined within the object that
+ *   was previously made accessible through a insmod() call.  handle is the
+ *   value returned from a call to insmod() (and which has not since been
+ *   released via a call to rmmod()), name is the symbol's name as a
+ *   character string.
+ *
+ *   The returned symbol address will remain valid until rmmod() is called.
+ *
+ * Input Parameters:
+ *   handle - The opaque, non-NULL value returned by a previous successful
+ *            call to insmod().
+ *   name   - A pointer to the symbol name string.
+ *
+ * Returned Value:
+ *   The address associated with the symbol is returned on success.
+ *   If handle does not refer to a valid module opened by insmod(), or if
+ *   the named symbol cannot be found within any of the objects associated
+ *   with handle, modsym() will return NULL and the errno variable will be
+ *   set appropriately.
+ *
+ *   NOTE: This means that the address zero can never be a valid return
+ *   value.
+ *
+ ****************************************************************************/
+
+FAR const void *modsym(FAR void *handle, FAR const char *name)
+{
+  FAR struct module_s *modp = (FAR struct module_s *)handle;
+  FAR const struct symtab_s *symbol;
+  int err;
+  int ret;
+
+  /* Verify that the module is in the registry */
+
+  modlib_registry_lock();
+  ret = modlib_registry_verify(modp);
+  if (ret < 0)
+    {
+      serr("ERROR: Failed to verify module: %d\n", ret);
+      err = -ret;
+      goto errout_with_lock;
+    }
+
+  /* Does the module have a symbol table? */
+
+  if (modp->modinfo.exports == NULL || modp->modinfo.nexports == 0)
+    {
+      serr("ERROR: Module has no symbol table\n");
+      err = ENOENT;
+      goto errout_with_lock;
+    }
+
+  /* Search the symbol table for the matching symbol */
+
+  symbol = symtab_findbyname(modp->modinfo.exports, name,
+                             modp->modinfo.nexports);
+  if (symbol == NULL)
+    {
+      serr("ERROR: Failed to find symbol in symbol \"$s\" in table\n", name);
+      err = ENOENT;
+      goto errout_with_lock;
+    }
+
+  /* Return the address within the module assoicated with the symbol */
+
+  modlib_registry_unlock();
+  DEBUGASSERT(symbol->sym_value != NULL);
+  return symbol->sym_value;
+
+errout_with_lock:
+  modlib_registry_unlock();
+  set_errno(err);
+  return NULL;
+}
diff --git a/sched/module/mod_procfs.c b/sched/module/mod_procfs.c
index 411cb1eccdee6450ce5ca686034c0b22c0fcfd33..d900165c9988e8fab4747d0545d00917ce67c04c 100644
--- a/sched/module/mod_procfs.c
+++ b/sched/module/mod_procfs.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * sched/module/mod_procfs.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -52,11 +52,10 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 
-#include "module.h"
-
 #if !defined(CONFIG_DISABLE_MOUNTPOINT) && defined(CONFIG_FS_PROCFS) && \
     !defined(CONFIG_FS_PROCFS_EXCLUDE_MODULE)
 
@@ -147,10 +146,11 @@ static int modprocfs_callback(FAR struct module_s *modp, FAR void *arg)
   DEBUGASSERT(modp != NULL && arg != NULL);
   priv = (FAR struct modprocfs_file_s *)arg;
 
-  linesize = snprintf(priv->line, MOD_LINELEN, "%s,%p,%p,%p,%p,%lu,%p,%lu\n",
-                      modp->modulename, modp->initializer,
-                      modp->uninitializer, modp->arg,
-                      modp->alloc, (unsigned long)modp->textsize,
+  linesize = snprintf(priv->line, MOD_LINELEN, "%s,%p,%p,%p,%u,%p,%lu,%p,%lu\n",
+                      modp->modname, modp->initializer,
+                      modp->modinfo.uninitializer, modp->modinfo.arg,
+                      modp->modinfo.nexports, modp->alloc,
+                      (unsigned long)modp->textsize,
                       (FAR uint8_t *)modp->alloc + modp->textsize,
                       (unsigned long)modp->datasize);
   copysize = procfs_memcpy(priv->line, linesize, priv->buffer,
@@ -171,7 +171,7 @@ static int modprocfs_open(FAR struct file *filep, FAR const char *relpath,
 {
   FAR struct modprocfs_file_s *priv;
 
-  fvdbg("Open '%s'\n", relpath);
+  finfo("Open '%s'\n", relpath);
 
   /* PROCFS is read-only.  Any attempt to open with any kind of write
    * access is not permitted.
@@ -181,7 +181,7 @@ static int modprocfs_open(FAR struct file *filep, FAR const char *relpath,
 
   if (((oflags & O_WRONLY) != 0 || (oflags & O_RDONLY) == 0))
     {
-      fdbg("ERROR: Only O_RDONLY supported\n");
+      ferr("ERROR: Only O_RDONLY supported\n");
       return -EACCES;
     }
 
@@ -190,7 +190,7 @@ static int modprocfs_open(FAR struct file *filep, FAR const char *relpath,
   priv = (FAR struct modprocfs_file_s *)kmm_zalloc(sizeof(struct modprocfs_file_s));
   if (!priv)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
@@ -232,7 +232,7 @@ static ssize_t modprocfs_read(FAR struct file *filep, FAR char *buffer,
   FAR struct modprocfs_file_s *priv;
   int ret;
 
-  fvdbg("buffer=%p buflen=%lu\n", buffer, (unsigned long)buflen);
+  finfo("buffer=%p buflen=%lu\n", buffer, (unsigned long)buflen);
 
   /* Recover our private data from the struct file instance */
 
@@ -247,7 +247,7 @@ static ssize_t modprocfs_read(FAR struct file *filep, FAR char *buffer,
   priv->buflen    = buflen;
   priv->offset    = filep->f_pos;
 
-  ret = mod_registry_foreach(modprocfs_callback, priv);
+  ret = modlib_registry_foreach(modprocfs_callback, priv);
   if (ret >= 0)
     {
       filep->f_pos += priv->totalsize;
@@ -270,7 +270,7 @@ static int modprocfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   FAR struct modprocfs_file_s *oldpriv;
   FAR struct modprocfs_file_s *newpriv;
 
-  fvdbg("Dup %p->%p\n", oldp, newp);
+  finfo("Dup %p->%p\n", oldp, newp);
 
   /* Recover our private data from the old struct file instance */
 
@@ -282,7 +282,7 @@ static int modprocfs_dup(FAR const struct file *oldp, FAR struct file *newp)
   newpriv = (FAR struct modprocfs_file_s *)kmm_zalloc(sizeof(struct modprocfs_file_s));
   if (!newpriv)
     {
-      fdbg("ERROR: Failed to allocate file attributes\n");
+      ferr("ERROR: Failed to allocate file attributes\n");
       return -ENOMEM;
     }
 
diff --git a/sched/module/mod_rmmod.c b/sched/module/mod_rmmod.c
index 76fff1c7aab14d55642a5cbf9e4fe347ca34b18b..cc47e7922008455746ec6e1616c5970d701711f5 100644
--- a/sched/module/mod_rmmod.c
+++ b/sched/module/mod_rmmod.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * sched/module/module.c
+ * sched/module/mod_rmmod.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,14 +40,12 @@
 #include 
 
 #include 
-#include 
-#include 
+#include 
 #include 
 
 #include 
 #include 
-
-#include "module/module.h"
+#include 
 
 #ifdef CONFIG_MODULE
 
@@ -62,9 +60,7 @@
  *   Remove a previously installed module from memory.
  *
  * Input Parameters:
- *
- *   modulename - The module name.  This is the name module name that was
- *     provided to insmod when the module was loaded.
+ *   handle - The module handler previously returned by insmod().
  *
  * Returned Value:
  *   Zero (OK) on success.  On any failure, -1 (ERROR) is returned the
@@ -72,50 +68,62 @@
  *
  ****************************************************************************/
 
-int rmmod(FAR const char *modulename)
+int rmmod(FAR void *handle)
 {
-  FAR struct module_s *modp;
-  int ret = OK;
+  FAR struct module_s *modp = (FAR struct module_s *)handle;
+  int ret;
 
-  DEBUGASSERT(modulename != NULL);
+  DEBUGASSERT(modp != NULL);
 
   /* Get exclusive access to the module registry */
 
-  mod_registry_lock();
+  modlib_registry_lock();
 
-  /* Find the module entry for this modulename in the registry */
+  /* Verify that the module is in the registry */
 
-  modp = mod_registry_find(modulename);
-  if (modp == NULL)
+  ret = modlib_registry_verify(modp);
+  if (ret < 0)
     {
-      sdbg("ERROR: Failed to find module %s: %d\n", modulename, ret);
-      ret = -ENOENT;
+      serr("ERROR: Failed to verify module: %d\n", ret);
       goto errout_with_lock;
     }
 
+#if CONFIG_MODLIB_MAXDEPEND > 0
+  /* Refuse to remove any module that other modules may depend upon. */
+
+  if (modp->dependents > 0)
+    {
+      serr("ERROR: Module has dependents: %d\n", modp->dependents);
+      ret = -EBUSY;
+      goto errout_with_lock;
+    }
+#endif
+
   /* Is there an uninitializer? */
 
-  if (modp->uninitializer != NULL)
+  if (modp->modinfo.uninitializer != NULL)
     {
-      /* Try to uninitializer the module */
+      /* Try to uninitialize the module */
 
-      ret = modp->uninitializer(modp->arg);
+      ret = modp->modinfo.uninitializer(modp->modinfo.arg);
 
       /* Did the module sucessfully uninitialize? */
 
       if (ret < 0)
         {
-          sdbg("ERROR: Failed to uninitialize the module: %d\n", ret);
+          serr("ERROR: Failed to uninitialize the module: %d\n", ret);
           goto errout_with_lock;
         }
 
       /* Nullify so that the uninitializer cannot be called again */
 
+      modp->modinfo.uninitializer = NULL;
 #if defined(CONFIG_FS_PROCFS) && !defined(CONFIG_FS_PROCFS_EXCLUDE_MODULE)
-      modp->initializer = NULL;
+      modp->initializer           = NULL;
+      modp->modinfo.arg           = NULL;
+      modp->modinfo.exports       = NULL;
+      modp->modinfo.nexports      = 0;
 #endif
-      modp->uninitializer = NULL;
-      modp->arg = NULL;
     }
 
   /* Release resources held by the module */
@@ -137,14 +145,19 @@ int rmmod(FAR const char *modulename)
 
   /* Remove the module from the registry */
 
-  ret = mod_registry_del(modp);
+  ret = modlib_registry_del(modp);
   if (ret < 0)
     {
-      sdbg("ERROR: Failed to remove the module from the registry: %d\n", ret);
+      serr("ERROR: Failed to remove the module from the registry: %d\n", ret);
       goto errout_with_lock;
     }
 
-  mod_registry_unlock();
+#if CONFIG_MODLIB_MAXDEPEND > 0
+  /* Eliminate any dependencies that this module has on other modules */
+
+  (void)modlib_undepend(modp);
+#endif
+  modlib_registry_unlock();
 
   /* And free the registry entry */
 
@@ -152,7 +165,7 @@ int rmmod(FAR const char *modulename)
   return OK;
 
 errout_with_lock:
-  mod_registry_unlock();
+  modlib_registry_unlock();
   set_errno(-ret);
   return ERROR;
 }
diff --git a/sched/mqueue/mq_rcvinternal.c b/sched/mqueue/mq_rcvinternal.c
index c260c1183dd1fb00006be5e5f32489c967901408..459004c4accff3df78846fb99f3e2914fea1d344 100644
--- a/sched/mqueue/mq_rcvinternal.c
+++ b/sched/mqueue/mq_rcvinternal.c
@@ -50,6 +50,7 @@
 
 #include 
 #include 
+#include 
 
 #include "sched/sched.h"
 #include "mqueue/mqueue.h"
@@ -141,6 +142,23 @@ FAR struct mqueue_msg_s *mq_waitreceive(mqd_t mqdes)
   FAR struct mqueue_inode_s *msgq;
   FAR struct mqueue_msg_s *rcvmsg;
 
+  /* mq_waitreceive() is not a cancellation point, but it is always called
+   * from a cancellation point.
+   */
+
+  if (enter_cancellation_point())
+    {
+#ifdef CONFIG_CANCELLATION_POINTS
+      /* If there is a pending cancellation, then do not perform
+       * the wait.  Exit now with ECANCELED.
+       */
+
+      set_errno(ECANCELED);
+      leave_cancellation_point();
+      return NULL;
+#endif
+    }
+
   /* Get a pointer to the message queue */
 
   msgq = mqdes->msgq;
@@ -195,6 +213,7 @@ FAR struct mqueue_msg_s *mq_waitreceive(mqd_t mqdes)
       msgq->nmsgs--;
     }
 
+  leave_cancellation_point();
   return rcvmsg;
 }
 
diff --git a/sched/mqueue/mq_receive.c b/sched/mqueue/mq_receive.c
index 4fed3b5afd2cc96701162fd0df34fabe39629f40..31878a29a5781f44e06563506fa3b6d341b74403 100644
--- a/sched/mqueue/mq_receive.c
+++ b/sched/mqueue/mq_receive.c
@@ -47,6 +47,7 @@
 
 #include 
 #include 
+#include 
 
 #include "mqueue/mqueue.h"
 
@@ -103,12 +104,17 @@ ssize_t mq_receive(mqd_t mqdes, FAR char *msg, size_t msglen,
 
   DEBUGASSERT(up_interrupt_context() == false);
 
+  /* mq_receive() is a cancellation point */
+
+  (void)enter_cancellation_point();
+
   /* Verify the input parameters and, in case of an error, set
    * errno appropriately.
    */
 
   if (mq_verifyreceive(mqdes, msg, msglen) != OK)
     {
+      leave_cancellation_point();
       return ERROR;
     }
 
@@ -145,5 +151,6 @@ ssize_t mq_receive(mqd_t mqdes, FAR char *msg, size_t msglen,
     }
 
   sched_unlock();
+  leave_cancellation_point();
   return ret;
 }
diff --git a/sched/mqueue/mq_send.c b/sched/mqueue/mq_send.c
index 84c22b5d765867d65bd4062a04e5ea90b220cccf..59e6eecebefa99deaf849dd468a5e53f95754a65 100644
--- a/sched/mqueue/mq_send.c
+++ b/sched/mqueue/mq_send.c
@@ -46,6 +46,7 @@
 
 #include  
 #include  
+#include  
 
 #include  "mqueue/mqueue.h"
 
@@ -84,7 +85,7 @@
  *   On success, mq_send() returns 0 (OK); on error, -1 (ERROR)
  *   is returned, with errno set to indicate the error:
  *
- *   EAGAIN   The queue was empty, and the O_NONBLOCK flag was set for the
+ *   EAGAIN   The queue was full and the O_NONBLOCK flag was set for the
  *            message queue description referred to by mqdes.
  *   EINVAL   Either msg or mqdes is NULL or the value of prio is invalid.
  *   EPERM    Message queue opened not opened for writing.
@@ -103,12 +104,17 @@ int mq_send(mqd_t mqdes, FAR const char *msg, size_t msglen, int prio)
   irqstate_t flags;
   int ret = ERROR;
 
+  /* mq_send() is a cancellation point */
+
+  (void)enter_cancellation_point();
+
   /* Verify the input parameters -- setting errno appropriately
    * on any failures to verify.
    */
 
   if (mq_verifysend(mqdes, msg, msglen, prio) != OK)
     {
+      leave_cancellation_point();
       return ERROR;
     }
 
@@ -133,6 +139,15 @@ int mq_send(mqd_t mqdes, FAR const char *msg, size_t msglen, int prio)
 
       leave_critical_section(flags);
       mqmsg = mq_msgalloc();
+
+      /* Check if the message was sucessfully allocated */
+
+      if (mqmsg == NULL)
+        {
+          /* No... mq_msgalloc() does not set the errno value */
+
+          set_errno(ENOMEM);
+        }
     }
   else
     {
@@ -141,6 +156,8 @@ int mq_send(mqd_t mqdes, FAR const char *msg, size_t msglen, int prio)
        * - We are not in an interrupt handler AND
        * - The message queue is full AND
        * - When we tried waiting, the wait was unsuccessful.
+       *
+       * In this case mq_waitsend() has already set the errno value.
        */
 
       leave_critical_section(flags);
@@ -151,9 +168,10 @@ int mq_send(mqd_t mqdes, FAR const char *msg, size_t msglen, int prio)
    * to allocate it) or because the allocation failed.
    */
 
-  if (mqmsg)
+  if (mqmsg != NULL)
     {
-      /* Yes, perform the message send.
+      /* The allocation was successful (implying that we can also send the
+       * message). Perform the message send.
        *
        * NOTE: There is a race condition here: What if a message is added by
        * interrupt related logic so that queue again becomes non-empty.
@@ -165,5 +183,6 @@ int mq_send(mqd_t mqdes, FAR const char *msg, size_t msglen, int prio)
     }
 
   sched_unlock();
+  leave_cancellation_point();
   return ret;
 }
diff --git a/sched/mqueue/mq_sndinternal.c b/sched/mqueue/mq_sndinternal.c
index 782eb84e33320308168ab58c7374b934dd91ad0d..12fb9948415b373838efe1a328feb9e8c058dcae 100644
--- a/sched/mqueue/mq_sndinternal.c
+++ b/sched/mqueue/mq_sndinternal.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- *  sched/mqueue/mq_send.c
+ *  sched/mqueue/mq_sndinternal.c
  *
  *   Copyright (C) 2007, 2009, 2013-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -53,6 +53,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "sched/sched.h"
 #ifndef CONFIG_DISABLE_SIGNALS
@@ -158,7 +159,7 @@ FAR struct mqueue_msg_s *mq_msgalloc(void)
       /* Try the general free list */
 
       mqmsg = (FAR struct mqueue_msg_s *)sq_remfirst(&g_msgfree);
-      if (!mqmsg)
+      if (mqmsg == NULL)
         {
           /* Try the free list reserved for interrupt handlers */
 
@@ -178,16 +179,23 @@ FAR struct mqueue_msg_s *mq_msgalloc(void)
       mqmsg = (FAR struct mqueue_msg_s *)sq_remfirst(&g_msgfree);
       leave_critical_section(flags);
 
-      /* If we cannot a message from the free list, then we will have to allocate one. */
+      /* If we cannot a message from the free list, then we will have to
+       * allocate one.
+       */
 
-      if (!mqmsg)
+      if (mqmsg == NULL)
         {
-          mqmsg = (FAR struct mqueue_msg_s *)kmm_malloc((sizeof (struct mqueue_msg_s)));
+          mqmsg = (FAR struct mqueue_msg_s *)
+            kmm_malloc((sizeof (struct mqueue_msg_s)));
+
+          /* Check if we allocated the message */
 
-          /* Check if we got an allocated message */
+          if (mqmsg != NULL)
+            {
+              /* Yes... remember that this message was dynamically allocated */
 
-          ASSERT(mqmsg);
-          mqmsg->type = MQ_ALLOC_DYN;
+              mqmsg->type = MQ_ALLOC_DYN;
+            }
         }
     }
 
@@ -208,7 +216,7 @@ FAR struct mqueue_msg_s *mq_msgalloc(void)
  *   On success, mq_send() returns 0 (OK); on error, -1 (ERROR) is
  *   returned, with errno set to indicate the error:
  *
- *   EAGAIN   The queue was empty, and the O_NONBLOCK flag was set for the
+ *   EAGAIN   The queue was full and the O_NONBLOCK flag was set for the
  *            message queue description referred to by mqdes.
  *   EINTR    The call was interrupted by a signal handler.
  *   ETIMEOUT A timeout expired before the message queue became non-full
@@ -216,7 +224,7 @@ FAR struct mqueue_msg_s *mq_msgalloc(void)
  *
  * Assumptions/restrictions:
  * - The caller has verified the input parameters using mq_verifysend().
- * - Interrupts are disabled.
+ * - Executes within a critical section established by the caller.
  *
  ****************************************************************************/
 
@@ -225,6 +233,23 @@ int mq_waitsend(mqd_t mqdes)
   FAR struct tcb_s *rtcb;
   FAR struct mqueue_inode_s *msgq;
 
+  /* mq_waitsend() is not a cancellation point, but it is always called from
+   * a cancellation point.
+   */
+
+  if (enter_cancellation_point())
+    {
+#ifdef CONFIG_CANCELLATION_POINTS
+      /* If there is a pending cancellation, then do not perform
+       * the wait.  Exit now with ECANCELED.
+       */
+
+      set_errno(ECANCELED);
+      leave_cancellation_point();
+      return ERROR;
+#endif
+    }
+
   /* Get a pointer to the message queue */
 
   msgq = mqdes->msgq;
@@ -242,6 +267,7 @@ int mq_waitsend(mqd_t mqdes)
           /* No... We will return an error to the caller. */
 
           set_errno(EAGAIN);
+          leave_cancellation_point();
           return ERROR;
         }
 
@@ -276,12 +302,14 @@ int mq_waitsend(mqd_t mqdes)
 
               if (get_errno() != OK)
                 {
+                  leave_cancellation_point();
                   return ERROR;
                 }
             }
         }
     }
 
+  leave_cancellation_point();
   return OK;
 }
 
diff --git a/sched/mqueue/mq_timedreceive.c b/sched/mqueue/mq_timedreceive.c
index b5bb100b89a0ddc0fb80fe02d2c1db9b7e5ef0ec..9df2a6ab61a11b986ebf2e4162ac7066b11fcacd 100644
--- a/sched/mqueue/mq_timedreceive.c
+++ b/sched/mqueue/mq_timedreceive.c
@@ -50,6 +50,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "sched/sched.h"
 #include "clock/clock.h"
@@ -174,18 +175,24 @@ ssize_t mq_timedreceive(mqd_t mqdes, FAR char *msg, size_t msglen,
 
   DEBUGASSERT(up_interrupt_context() == false && rtcb->waitdog == NULL);
 
+  /* mq_timedreceive() is a cancellation point */
+
+  (void)enter_cancellation_point();
+
   /* Verify the input parameters and, in case of an error, set
    * errno appropriately.
    */
 
   if (mq_verifyreceive(mqdes, msg, msglen) != OK)
     {
+      leave_cancellation_point();
       return ERROR;
     }
 
   if (!abstime || abstime->tv_nsec < 0 || abstime->tv_nsec >= 1000000000)
     {
       set_errno(EINVAL);
+      leave_cancellation_point();
       return ERROR;
     }
 
@@ -198,6 +205,7 @@ ssize_t mq_timedreceive(mqd_t mqdes, FAR char *msg, size_t msglen,
   if (!rtcb->waitdog)
     {
       set_errno(EINVAL);
+      leave_cancellation_point();
       return ERROR;
     }
 
@@ -250,6 +258,7 @@ ssize_t mq_timedreceive(mqd_t mqdes, FAR char *msg, size_t msglen,
           rtcb->waitdog = NULL;
 
           set_errno(result);
+          leave_cancellation_point();
           return ERROR;
         }
 
@@ -288,5 +297,6 @@ ssize_t mq_timedreceive(mqd_t mqdes, FAR char *msg, size_t msglen,
   sched_unlock();
   wd_delete(rtcb->waitdog);
   rtcb->waitdog = NULL;
+  leave_cancellation_point();
   return ret;
 }
diff --git a/sched/mqueue/mq_timedsend.c b/sched/mqueue/mq_timedsend.c
index 860e6223db893d404ba0f71af4276fe0ea488c2f..83e25515eb3694ef49ddcaaa2576101b3319cc37 100644
--- a/sched/mqueue/mq_timedsend.c
+++ b/sched/mqueue/mq_timedsend.c
@@ -50,6 +50,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "clock/clock.h"
 #include "sched/sched.h"
@@ -178,6 +179,10 @@ int mq_timedsend(mqd_t mqdes, FAR const char *msg, size_t msglen, int prio,
 
   DEBUGASSERT(up_interrupt_context() == false && rtcb->waitdog == NULL);
 
+  /* mq_timedsend() is a cancellation point */
+
+  (void)enter_cancellation_point();
+
   /* Verify the input parameters -- setting errno appropriately
    * on any failures to verify.
    */
@@ -186,17 +191,21 @@ int mq_timedsend(mqd_t mqdes, FAR const char *msg, size_t msglen, int prio,
     {
       /* mq_verifysend() will set the errno appropriately */
 
+      leave_cancellation_point();
       return ERROR;
     }
 
   /* Pre-allocate a message structure */
 
   mqmsg = mq_msgalloc();
-  if (!mqmsg)
+  if (mqmsg == NULL)
     {
-      /* Failed to allocate the message */
+      /* Failed to allocate the message. mq_msgalloc() does not set the
+       * errno value.
+       */
 
       set_errno(ENOMEM);
+      leave_cancellation_point();
       return ERROR;
     }
 
@@ -227,6 +236,7 @@ int mq_timedsend(mqd_t mqdes, FAR const char *msg, size_t msglen, int prio,
 
       ret = mq_dosend(mqdes, mqmsg, msg, msglen, prio);
       sched_unlock();
+      leave_cancellation_point();
       return ret;
     }
 
@@ -318,6 +328,7 @@ int mq_timedsend(mqd_t mqdes, FAR const char *msg, size_t msglen, int prio,
   sched_unlock();
   wd_delete(rtcb->waitdog);
   rtcb->waitdog = NULL;
+  leave_cancellation_point();
   return ret;
 
 /* Exit here with (1) the scheduler locked, (2) a message allocated, (3) a
@@ -339,5 +350,6 @@ errout_with_mqmsg:
   sched_unlock();
 
   set_errno(result);
+  leave_cancellation_point();
   return ERROR;
 }
diff --git a/sched/paging/pg_miss.c b/sched/paging/pg_miss.c
index 945678f99a98b11c7f8a4c01dc6999a441e39cdd..c3eb14cb7ca9333914de19f1da940f7d876a177e 100644
--- a/sched/paging/pg_miss.c
+++ b/sched/paging/pg_miss.c
@@ -132,7 +132,7 @@ void pg_miss(void)
    * always present in memory.
    */
 
-  pglldbg("Blocking TCB: %p PID: %d\n", ftcb, ftcb->pid);
+  pginfo("Blocking TCB: %p PID: %d\n", ftcb, ftcb->pid);
   DEBUGASSERT(g_pgworker != ftcb->pid);
 
   /* Block the currently executing task
@@ -159,8 +159,8 @@ void pg_miss(void)
     {
       /* Reprioritize the page fill worker thread */
 
-      pgllvdbg("New worker priority. %d->%d\n",
-               wtcb->sched_priority, ftcb->sched_priority);
+      pginfo("New worker priority. %d->%d\n",
+             wtcb->sched_priority, ftcb->sched_priority);
       sched_setpriority(wtcb, ftcb->sched_priority);
     }
 
@@ -171,7 +171,7 @@ void pg_miss(void)
 
   if (!g_pftcb)
     {
-      pglldbg("Signaling worker. PID: %d\n", g_pgworker);
+      pginfo("Signaling worker. PID: %d\n", g_pgworker);
       kill(g_pgworker, SIGWORK);
     }
 }
diff --git a/sched/paging/pg_worker.c b/sched/paging/pg_worker.c
index 08c94fd17c7f32fba45cf156e53dd4526c7e0bf9..003897e52f7d550f5b182b5b5d199ffa843850bf 100644
--- a/sched/paging/pg_worker.c
+++ b/sched/paging/pg_worker.c
@@ -155,7 +155,7 @@ static void pg_callback(FAR struct tcb_s *tcb, int result)
 {
   /* Verify that g_pftcb is non-NULL */
 
-  pgllvdbg("g_pftcb: %p\n", g_pftcb);
+  pginfo("g_pftcb: %p\n", g_pftcb);
   if (g_pftcb)
     {
       FAR struct tcb_s *htcb = (FAR struct tcb_s *)g_waitingforfill.head;
@@ -181,8 +181,8 @@ static void pg_callback(FAR struct tcb_s *tcb, int result)
 
       if (priority > wtcb->sched_priority)
         {
-          pgllvdbg("New worker priority. %d->%d\n",
-                   wtcb->sched_priority, priority);
+          pginfo("New worker priority. %d->%d\n",
+                 wtcb->sched_priority, priority);
           sched_setpriority(wtcb, priority);
         }
 
@@ -198,7 +198,7 @@ static void pg_callback(FAR struct tcb_s *tcb, int result)
 
   /* Signal the page fill worker thread (in any event) */
 
-  pglldbg("Signaling worker. PID: %d\n", g_pgworker);
+  pginfo("Signaling worker. PID: %d\n", g_pgworker);
   kill(g_pgworker, SIGWORK);
 }
 #endif
@@ -246,7 +246,7 @@ static inline bool pg_dequeue(void)
       /* Remove the TCB from the head of the list (if any) */
 
       g_pftcb = (FAR struct tcb_s *)dq_remfirst((dq_queue_t *)&g_waitingforfill);
-      pgllvdbg("g_pftcb: %p\n", g_pftcb);
+      pginfo("g_pftcb: %p\n", g_pftcb);
       if (g_pftcb != NULL)
         {
           /* Call the architecture-specific function up_checkmapping() to see if
@@ -292,8 +292,8 @@ static inline bool pg_dequeue(void)
 
                   /* Reduce the priority of the page fill worker thread */
 
-                  pgllvdbg("New worker priority. %d->%d\n",
-                           wtcb->sched_priority, priority);
+                  pginfo("New worker priority. %d->%d\n",
+                         wtcb->sched_priority, priority);
                   sched_setpriority(wtcb, priority);
                 }
 
@@ -308,7 +308,7 @@ static inline bool pg_dequeue(void)
            * virtual address space -- just restart it.
            */
 
-          pglldbg("Restarting TCB: %p\n", g_pftcb);
+          pginfo("Restarting TCB: %p\n", g_pftcb);
           up_unblock_task(g_pftcb);
         }
     }
@@ -365,7 +365,7 @@ static inline bool pg_startfill(void)
        * a page in-use, un-map it, and make it available.
        */
 
-      pgllvdbg("Call up_allocpage(%p)\n", g_pftcb);
+      pginfo("Call up_allocpage(%p)\n", g_pftcb);
       result = up_allocpage(g_pftcb, &vpage);
       DEBUGASSERT(result == OK);
 
@@ -382,7 +382,7 @@ static inline bool pg_startfill(void)
        * status of the fill will be provided by return value from up_fillpage().
        */
 
-      pgllvdbg("Call up_fillpage(%p)\n", g_pftcb);
+      pginfo("Call up_fillpage(%p)\n", g_pftcb);
       result = up_fillpage(g_pftcb, vpage);
       DEBUGASSERT(result == OK);
 #else
@@ -395,7 +395,7 @@ static inline bool pg_startfill(void)
        * This callback will probably from interrupt level.
        */
 
-      pgllvdbg("Call up_fillpage(%p)\n", g_pftcb);
+      pginfo("Call up_fillpage(%p)\n", g_pftcb);
       result = up_fillpage(g_pftcb, vpage, pg_callback);
       DEBUGASSERT(result == OK);
 
@@ -422,7 +422,7 @@ static inline bool pg_startfill(void)
       return true;
     }
 
-  pglldbg("Queue empty\n");
+  pginfo("Queue empty\n");
   return false;
 }
 
@@ -454,8 +454,8 @@ static inline void pg_alldone(void)
 {
   FAR struct tcb_s *wtcb = this_task();
   g_pftcb = NULL;
-  pgllvdbg("New worker priority. %d->%d\n",
-           wtcb->sched_priority, CONFIG_PAGING_DEFPRIO);
+  pginfo("New worker priority. %d->%d\n",
+         wtcb->sched_priority, CONFIG_PAGING_DEFPRIO);
   sched_setpriority(wtcb, CONFIG_PAGING_DEFPRIO);
 }
 
@@ -490,7 +490,7 @@ static inline void pg_fillcomplete(void)
    * received the fill ready-to-run.
    */
 
-  pglldbg("Restarting TCB: %p\n", g_pftcb);
+  pginfo("Restarting TCB: %p\n", g_pftcb);
   up_unblock_task(g_pftcb);
 }
 
@@ -532,7 +532,7 @@ int pg_worker(int argc, char *argv[])
    * fill completions should occur while this thread sleeps.
    */
 
-  pglldbg("Started\n");
+  pginfo("Started\n");
   (void)up_irq_save();
   for (; ; )
     {
@@ -580,7 +580,7 @@ int pg_worker(int argc, char *argv[])
                * task that was blocked waiting for this page fill.
                */
 
-              pglldbg("Restarting TCB: %p\n", g_pftcb);
+              pginfo("Restarting TCB: %p\n", g_pftcb);
               up_unblock_task(g_pftcb);
 
               /* Yes .. Start the next asynchronous fill.  Check the return
@@ -588,7 +588,7 @@ int pg_worker(int argc, char *argv[])
                * no fill was started).
                */
 
-              pgllvdbg("Calling pg_startfill\n");
+              pginfo("Calling pg_startfill\n");
               if (!pg_startfill())
                 {
                   /* No fill was started.  This can mean only that all queued
@@ -596,7 +596,7 @@ int pg_worker(int argc, char *argv[])
                    * nothing more to do.
                    */
 
-                  pgllvdbg("Call pg_alldone()\n");
+                  pginfo("Call pg_alldone()\n");
                   pg_alldone();
                 }
             }
@@ -608,7 +608,7 @@ int pg_worker(int argc, char *argv[])
 #ifdef CONFIG_PAGING_TIMEOUT_TICKS
           else
             {
-              lldbg("Timeout!\n");
+              pgerr("ERROR: Timeout!\n");
               ASSERT(clock_systimer() - g_starttime < CONFIG_PAGING_TIMEOUT_TICKS);
             }
 #endif
@@ -626,7 +626,7 @@ int pg_worker(int argc, char *argv[])
            * g_pftcb).
            */
 
-           pgllvdbg("Calling pg_startfill\n");
+           pginfo("Calling pg_startfill\n");
            (void)pg_startfill();
         }
 #else
@@ -641,7 +641,7 @@ int pg_worker(int argc, char *argv[])
            * (false means that no fill was perforemd).
            */
 
-          pgllvdbg("Calling pg_startfill\n");
+          pginfo("Calling pg_startfill\n");
           if (!pg_startfill())
             {
               /* Break out of the loop -- there is nothing more to do */
@@ -656,13 +656,13 @@ int pg_worker(int argc, char *argv[])
            * returns true.
            */
 
-          pgllvdbg("Restarting TCB: %p\n", g_pftcb);
+          pginfo("Restarting TCB: %p\n", g_pftcb);
           up_unblock_task(g_pftcb);
         }
 
       /* All queued fills have been processed */
 
-      pgllvdbg("Call pg_alldone()\n");
+      pginfo("Call pg_alldone()\n");
       pg_alldone();
 #endif
     }
diff --git a/sched/pthread/Make.defs b/sched/pthread/Make.defs
index d27938aa379220439ef47a96ad3da91c62ebd032..6156dd5411260a6e4884a82266edf6d4a4364945 100644
--- a/sched/pthread/Make.defs
+++ b/sched/pthread/Make.defs
@@ -42,8 +42,9 @@ CSRCS += pthread_mutexlock.c pthread_mutextrylock.c pthread_mutexunlock.c
 CSRCS += pthread_condinit.c pthread_conddestroy.c
 CSRCS += pthread_condwait.c pthread_condsignal.c pthread_condbroadcast.c
 CSRCS += pthread_barrierinit.c pthread_barrierdestroy.c pthread_barrierwait.c
-CSRCS += pthread_cancel.c pthread_setcancelstate.c
-CSRCS += pthread_keycreate.c pthread_setspecific.c pthread_getspecific.c pthread_keydelete.c
+CSRCS += pthread_cancel.c
+CSRCS += pthread_keycreate.c pthread_setspecific.c pthread_getspecific.c
+CSRCS += pthread_keydelete.c
 CSRCS += pthread_initialize.c pthread_completejoin.c pthread_findjoininfo.c
 CSRCS += pthread_once.c pthread_release.c pthread_setschedprio.c
 
@@ -55,6 +56,10 @@ ifeq ($(CONFIG_SMP),y)
 CSRCS += pthread_setaffinity.c pthread_getaffinity.c
 endif
 
+ifeq ($(CONFIG_PTHREAD_CLEANUP),y)
+CSRCS += pthread_cleanup.c
+endif
+
 # Include pthread build support
 
 DEPPATH += --dep-path pthread
diff --git a/sched/pthread/pthread.h b/sched/pthread/pthread.h
index 6371e9df330984f9312d0b6727823ac13c6567c1..be7a20de2eae2e71db3517cc8e5a0e59344d46c6 100644
--- a/sched/pthread/pthread.h
+++ b/sched/pthread/pthread.h
@@ -96,6 +96,11 @@ struct task_group_s;  /* Forward reference */
 void weak_function pthread_initialize(void);
 int pthread_schedsetup(FAR struct pthread_tcb_s *tcb, int priority, start_t start,
                        pthread_startroutine_t entry);
+
+#ifdef CONFIG_PTHREAD_CLEANUP
+void pthread_cleanup_popall(FAR struct pthread_tcb_s *tcb);
+#endif
+
 int pthread_completejoin(pid_t pid, FAR void *exit_value);
 void pthread_destroyjoin(FAR struct task_group_s *group,
                          FAR struct join_s *pjoin);
diff --git a/sched/pthread/pthread_barrierdestroy.c b/sched/pthread/pthread_barrierdestroy.c
index dbad57947a084be9314b11f405043fadc841da9e..6bf0270b13f214b8092b346dce7f5bdb09082b49 100644
--- a/sched/pthread/pthread_barrierdestroy.c
+++ b/sched/pthread/pthread_barrierdestroy.c
@@ -1,4 +1,4 @@
-/********************************************************************************
+/****************************************************************************
  * sched/pthread/pthread_barriedestroy.c
  *
  *   Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
@@ -31,11 +31,11 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************************/
+ ****************************************************************************/
 
 #include 
 
@@ -44,20 +44,21 @@
 #include 
 #include 
 
-/********************************************************************************
+/****************************************************************************
  * Public Functions
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Name: pthread_barrier_destroy
  *
  * Description:
- *   The pthread_barrier_destroy() function destroys the barrier referenced by
- *   'barrier' and releases any resources used by the barrier. The effect of
- *   subsequent use of the barrier is undefined until the barrier is
- *   reinitialized by another call to pthread_barrier_init(). The results are
- *   undefined if pthread_barrier_destroy() is called when any thread is blocked
- *   on the barrier, or if this function is called with an uninitialized barrier.
+ *   The pthread_barrier_destroy() function destroys the barrier referenced
+ *   by 'barrier' and releases any resources used by the barrier. The effect
+ *   of subsequent use of the barrier is undefined until the barrier is
+ *   reinitialized by another call to pthread_barrier_init(). The result
+ *   are undefined if pthread_barrier_destroy() is called when any thread is
+ *   blocked on the barrier, or if this function is called with an
+ *   uninitialized barrier.
  *
  * Parameters:
  *   barrier - barrier to be destroyed.
@@ -65,13 +66,13 @@
  * Return Value:
  *   0 (OK) on success or on of the following error numbers:
  *
- *   EBUSY  The implementation has detected an attempt to destroy a barrier while
- *           it is in use.
+ *   EBUSY  The implementation has detected an attempt to destroy a barrier
+ *          while it is in use.
  *   EINVAL The value specified by barrier is invalid.
  *
  * Assumptions:
  *
- ********************************************************************************/
+ ****************************************************************************/
 
 int pthread_barrier_destroy(FAR pthread_barrier_t *barrier)
 {
diff --git a/sched/pthread/pthread_barrierinit.c b/sched/pthread/pthread_barrierinit.c
index adaca2876c2c25a668ef96cca77b6ed07182c107..5051601417fe6ae3e47066c2036e0605cc39a541 100644
--- a/sched/pthread/pthread_barrierinit.c
+++ b/sched/pthread/pthread_barrierinit.c
@@ -1,4 +1,4 @@
-/********************************************************************************
+/****************************************************************************
  * sched/pthread/pthread_barrieinit.c
  *
  *   Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
@@ -31,11 +31,11 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************************/
+ ****************************************************************************/
 
 #include 
 
@@ -44,44 +44,45 @@
 #include 
 #include 
 
-/********************************************************************************
+/****************************************************************************
  * Public Functions
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Name: pthread_barrier_init
  *
  * Description:
- *   The pthread_barrier_init() function allocates any resources required to use
- *   the barrier referenced by 'barrier' and initialized the barrier with the
- *   attributes referenced by attr.  If attr is NULL, the default barrier
- *   attributes will be used. The results are undefined if pthread_barrier_init()
- *   is called when any thread is blocked on the barrier. The results are
- *   undefined if a barrier is used without first being initialized. The results
- *   are undefined if pthread_barrier_init() is called specifying an already
- *   initialized barrier.
+ *   The pthread_barrier_init() function allocates any resources required to
+ *   use the barrier referenced by 'barrier' and initialized the barrier
+ *   with the attributes referenced by attr.  If attr is NULL, the default
+ *   barrier attributes will be used. The results are undefined if
+ *   pthread_barrier_init() is called when any thread is blocked on the
+ *   barrier. The results are undefined if a barrier is used without first
+ *   being initialized. The results are undefined if pthread_barrier_init()
+ *   is called specifying an already initialized barrier.
  *
  * Parameters:
  *   barrier - the barrier to be initialized
  *   attr - barrier attributes to be used in the initialization.
- *   count - the count to be associated with the barrier.  The count argument
- *     specifies the number of threads that must call pthread_barrier_wait() before
- *     any of them successfully return from the call.  The value specified by
- *     count must be greater than zero.
+ *   count - the count to be associated with the barrier.  The count
+ *     argument specifies the number of threads that must call
+ *     pthread_barrier_wait() before any of them successfully return from
+ *     the call.  The value specified by count must be greater than zero.
  *
  * Return Value:
  *   0 (OK) on success or on of the following error numbers:
  *
- *   EAGAIN The system lacks the necessary resources to initialize another barrier.
- *   EINVAL The barrier reference is invalid, or the values specified by attr are
- *          invalid, or the value specified by count is equal to zero.
+ *   EAGAIN The system lacks the necessary resources to initialize another
+ *          barrier.  EINVAL The barrier reference is invalid, or the values
+ *          specified by attr are invalid, or the value specified by count
+ *          is equal to zero.
  *   ENOMEM Insufficient memory exists to initialize the barrier.
- *   EBUSY  The implementation has detected an attempt to reinitialize a barrier
- *          while it is in use.
+ *   EBUSY  The implementation has detected an attempt to reinitialize a
+ *          barrier while it is in use.
  *
  * Assumptions:
  *
- ********************************************************************************/
+ ****************************************************************************/
 
 int pthread_barrier_init(FAR pthread_barrier_t *barrier,
                          FAR const pthread_barrierattr_t *attr, unsigned int count)
diff --git a/sched/pthread/pthread_barrierwait.c b/sched/pthread/pthread_barrierwait.c
index 2d5a306df0aee5024aa5d8bd881066e0fd58e9fa..cf2f959c4e5f8bb977b30d444c3f59d1abb9b780 100644
--- a/sched/pthread/pthread_barrierwait.c
+++ b/sched/pthread/pthread_barrierwait.c
@@ -1,4 +1,4 @@
-/********************************************************************************
+/****************************************************************************
  * sched/pthread/pthread_barrierwait.c
  *
  *   Copyright (C) 2007, 2009, 2014 Gregory Nutt. All rights reserved.
@@ -31,11 +31,11 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************************/
+ ****************************************************************************/
 
 #include 
 
@@ -45,41 +45,43 @@
 #include 
 #include 
 
-/********************************************************************************
+/****************************************************************************
  * Public Functions
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Name: pthread_barrier_wait
  *
  * Description:
- *   The pthread_barrier_wait() function synchronizse participating threads at
- *   the barrier referenced by 'barrier'.  The calling thread is blocked until
- *   the required number of threads have called pthread_barrier_wait() specifying
- *   the same 'barrier'.  When the required number of threads have called
- *   pthread_barrier_wait() specifying the 'barrier', the constant
- *   PTHREAD_BARRIER_SERIAL_THREAD will be returned to one unspecified thread
- *   and zero will be returned to each of the remaining threads. At this point,
- *   the barrier will be reset to the state it had as a result of the most recent
- *   pthread_barrier_init() function that referenced it.
+ *   The pthread_barrier_wait() function synchronizse participating threads
+ *   at the barrier referenced by 'barrier'.  The calling thread is blocked
+ *   until the required number of threads have called pthread_barrier_wait()
+ *   specifying the same 'barrier'.  When the required number of threads
+ *   have called pthread_barrier_wait() specifying the 'barrier', the
+ *   constant PTHREAD_BARRIER_SERIAL_THREAD will be returned to one
+ *   unspecified thread and zero will be returned to each of the remaining
+ *   threads. At this point, the barrier will be reset to the state it had
+ *   as a result of the most recent pthread_barrier_init() function that
+ *   referenced it.
  *
- *   The constant PTHREAD_BARRIER_SERIAL_THREAD is defined in pthread.h and its
- *   value must be distinct from any other value returned by pthread_barrier_wait().
+ *   The constant PTHREAD_BARRIER_SERIAL_THREAD is defined in pthread.h and
+ *   its value must be distinct from any other value returned by
+ *   pthread_barrier_wait().
  *
- *   The results are undefined if this function is called with an uninitialized
- *   barrier.
+ *   The results are undefined if this function is called with an
+ *   uninitialized barrier.
  *
- *   If a signal is delivered to a thread blocked on a barrier, upon return from
- *   the signal handler the thread will resume waiting at the barrier if the barrier
- *   wait has not completed; otherwise, the thread will continue as normal from
- *   the completed barrier wait. Until the thread in the signal handler returns
- *   from it, it is unspecified whether other threads may proceed past the barrier
- *   once they have all reached it.
+ *   If a signal is delivered to a thread blocked on a barrier, upon return
+ *   from the signal handler the thread will resume waiting at the barrier
+ *   if the barrier wait has not completed; otherwise, the thread will
+ *   continue as normal from the completed barrier wait. Until the thread in
+ *   the signal handler returns from it, it is unspecified whether other
+ *   threads may proceed past the barrier once they have all reached it.
  *
- *   A thread that has blocked on a barrier will not prevent any unblocked thread
- *   that is eligible to use the same processing resources from eventually making
- *   forward progress in its execution.  Eligibility for processing resources will
- *   be determined by the scheduling policy.
+ *   A thread that has blocked on a barrier will not prevent any unblocked
+ *   thread that is eligible to use the same processing resources from
+ *   eventually making forward progress in its execution.  Eligibility for
+ *   processing resources will be determined by the scheduling policy.
  *
  * Parameters:
  *   barrier - the barrier to wait on
@@ -89,7 +91,7 @@
  *
  * Assumptions:
  *
- ********************************************************************************/
+ ****************************************************************************/
 
 int pthread_barrier_wait(FAR pthread_barrier_t *barrier)
 {
diff --git a/sched/pthread/pthread_cancel.c b/sched/pthread/pthread_cancel.c
index a8ba2ee4c9352290f8db65a24032a4ce16fca394..a9b7e8270b74e6304df95f12f9f4eac413d01256 100644
--- a/sched/pthread/pthread_cancel.c
+++ b/sched/pthread/pthread_cancel.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * sched/pthread/pthread_cancel.c
  *
- *   Copyright (C) 2007, 2009, 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2009, 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -45,6 +45,7 @@
 #include 
 
 #include "sched/sched.h"
+#include "task/task.h"
 #include "pthread/pthread.h"
 
 /****************************************************************************
@@ -53,11 +54,11 @@
 
 int pthread_cancel(pthread_t thread)
 {
-  FAR struct tcb_s *tcb;
+  FAR struct pthread_tcb_s *tcb;
 
   /* First, make sure that the handle references a valid thread */
 
-  if (!thread)
+  if (thread == 0)
     {
       /* pid == 0 is the IDLE task.  Callers cannot cancel the
        * IDLE task.
@@ -66,8 +67,8 @@ int pthread_cancel(pthread_t thread)
       return ESRCH;
     }
 
-  tcb = sched_gettcb((pid_t)thread);
-  if (!tcb)
+  tcb = (FAR struct pthread_tcb_s *)sched_gettcb((pid_t)thread);
+  if (tcb == NULL)
     {
       /* The pid does not correspond to any known thread.  The thread
        * has probably already exited.
@@ -76,13 +77,17 @@ int pthread_cancel(pthread_t thread)
       return ESRCH;
     }
 
+  /* Only pthreads should use this interface */
+
+  DEBUGASSERT((tcb->cmn.flags & TCB_FLAG_TTYPE_MASK) == TCB_FLAG_TTYPE_PTHREAD);
+
   /* Check to see if this thread has the non-cancelable bit set in its
    * flags. Suppress context changes for a bit so that the flags are stable.
-   * (the flags should not change in interrupt handling.
+   * (the flags should not change in interrupt handling).
    */
 
   sched_lock();
-  if ((tcb->flags & TCB_FLAG_NONCANCELABLE) != 0)
+  if ((tcb->cmn.flags & TCB_FLAG_NONCANCELABLE) != 0)
     {
       /* Then we cannot cancel the thread now.  Here is how this is
        * supposed to work:
@@ -97,29 +102,67 @@ int pthread_cancel(pthread_t thread)
        *  processing."
        */
 
-      tcb->flags |= TCB_FLAG_CANCEL_PENDING;
+      tcb->cmn.flags |= TCB_FLAG_CANCEL_PENDING;
       sched_unlock();
       return OK;
     }
 
+#ifdef CONFIG_CANCELLATION_POINTS
+  /* Check if this thread supports deferred cancellation */
+
+  if ((tcb->cmn.flags & TCB_FLAG_CANCEL_DEFERRED) != 0)
+    {
+      /* Then we cannot cancel the thread asynchronously.  Mark the cancellation
+       * as pending.
+       */
+
+      tcb->cmn.flags |= TCB_FLAG_CANCEL_PENDING;
+
+      /* If the thread is waiting at a cancellation point, then notify of the
+       * cancellation thereby waking the task up with an ECANCELED error.
+       */
+
+      if (tcb->cmn.cpcount > 0)
+        {
+          notify_cancellation(&tcb->cmn);
+        }
+
+      sched_unlock();
+      return OK;
+    }
+#endif
+
+  /* Otherwise, perform the asyncrhonous cancellation */
+
   sched_unlock();
 
   /* Check to see if the ID refers to ourselves.. this would be the
    * same as pthread_exit(PTHREAD_CANCELED).
    */
 
-  if (tcb == this_task())
+  if (tcb == (FAR struct pthread_tcb_s *)this_task())
     {
       pthread_exit(PTHREAD_CANCELED);
     }
 
+#ifdef CONFIG_PTHREAD_CLEANUP
+  /* Perform any stack pthread clean-up callbacks.
+   *
+   * REVISIT: In this case, the clean-up callback will execute on the
+   * thread of the caller of pthread cancel, not on the thread of
+   * the thread-to-be-canceled.  Is that an issue?  Presumably they
+   * are both within the same group and within the same process address
+   * space.
+   */
+
+  pthread_cleanup_popall(tcb);
+#endif
+
   /* Complete pending join operations */
 
   (void)pthread_completejoin((pid_t)thread, PTHREAD_CANCELED);
 
-  /* Then let pthread_delete do the real work */
+  /* Then let task_terminate do the real work */
 
-  task_delete((pid_t)thread);
-  return OK;
+  return task_terminate((pid_t)thread, false);
 }
-
diff --git a/sched/pthread/pthread_cleanup.c b/sched/pthread/pthread_cleanup.c
new file mode 100644
index 0000000000000000000000000000000000000000..6c71cd8c1380c8ce29ae1d4db1ad48a414449569
--- /dev/null
+++ b/sched/pthread/pthread_cleanup.c
@@ -0,0 +1,226 @@
+/****************************************************************************
+ * sched/pthread/pthread_cleanup.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include "sched/sched.h"
+#include "pthread/pthread.h"
+
+#ifdef CONFIG_PTHREAD_CLEANUP
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: pthread_cleanup_pop_tcb
+ *
+ * Description:
+ *   The pthread_cleanup_pop_tcb() function will remove the routine at the top
+ *   of the calling thread's cancellation cleanup stack and optionally
+ *   invoke it (if 'execute' is non-zero).
+ *
+ * Input Parameters:
+ *   tcb - The TCB of the pthread that is exiting or being canceled.
+ *
+ * Return Value:
+ *   None
+ *
+ * Assumptions:
+ *   The scheduler is locked.
+ *
+ ****************************************************************************/
+
+static void pthread_cleanup_pop_tcb(FAR struct pthread_tcb_s *tcb, int execute)
+{
+  if (tcb->tos > 0)
+    {
+      unsigned int ndx;
+
+      /* Get the index to the last cleaner function pushed onto the stack */
+
+      ndx = tcb->tos - 1;
+      DEBUGASSERT(ndx >= 0 && ndx < CONFIG_PTHREAD_CLEANUP_STACKSIZE);
+
+      /* Should we execute the cleanup routine at the top of the stack? */
+
+      if (execute != 0)
+        {
+          FAR struct pthread_cleanup_s *cb;
+
+          /* Yes..  Execute the clean-up routine.
+           *
+           * REVISIT: This is a security problem In the PROTECTED and KERNEL
+           * builds:  We must not call the registered function in supervisor
+           * mode!  See also on_exit() and atexit() callbacks.
+           */
+
+          cb  = &tcb->stack[ndx];
+          cb->pc_cleaner(cb->pc_arg);
+        }
+
+      tcb->tos = ndx;
+    }
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: pthread_cleanup_push
+ *       pthread_cleanup_pop
+ *
+ * Description:
+ *   The pthread_cleanup_pop() function will remove the routine at the top
+ *   of the calling thread's cancellation cleanup stack and optionally
+ *   invoke it (if 'execute' is non-zero).
+ *
+ *   The pthread_cleanup_push() function will push the specified cancellation
+ *   cleanup handler routine onto the calling thread's cancellation cleanup
+ *   stack. The cancellation cleanup handler will be popped from the
+ *   cancellation cleanup stack and invoked with the argument arg when:
+ *
+ *   - The thread exits (that is, calls pthread_exit()).
+ *   - The thread acts upon a cancellation request.
+ *   - The thread calls pthread_cleanup_pop() with a non-zero execute argument.
+ *
+ * Input Parameters:
+ *   routine - The cleanup routine to be pushed on the the cleanup stack.
+ *   arg     - An argument that will accompany the callback.
+ *   execute - Execute the popped cleanup function immediately.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void pthread_cleanup_pop(int execute)
+{
+  FAR struct pthread_tcb_s *tcb = (FAR struct pthread_tcb_s *)this_task();
+
+  /* We don't assert if called from a non-pthread; we just don't do anything */
+
+  DEBUGASSERT(tcb != NULL);
+
+  /* sched_lock() should provide sufficient protection.  We only need to
+   * have this TCB stationary; the pthread cleanup stack should never be
+   * modified by interrupt level logic.
+   */
+
+  sched_lock();
+  if ((tcb->cmn.flags & TCB_FLAG_TTYPE_MASK) == TCB_FLAG_TTYPE_PTHREAD)
+    {
+      pthread_cleanup_pop_tcb(tcb, execute);
+    }
+
+  sched_unlock();
+}
+
+void pthread_cleanup_push(pthread_cleanup_t routine, FAR void *arg)
+{
+  FAR struct pthread_tcb_s *tcb = (FAR struct pthread_tcb_s *)this_task();
+
+  /* We don't assert if called from a non-pthread; we just don't do anything */
+
+  DEBUGASSERT(tcb != NULL);
+  DEBUGASSERT(tcb->tos < CONFIG_PTHREAD_CLEANUP_STACKSIZE);
+
+  /* sched_lock() should provide sufficient protection.  We only need to
+   * have this TCB stationary; the pthread cleanup stack should never be
+   * modified by interrupt level logic.
+   */
+
+  sched_lock();
+  if ((tcb->cmn.flags & TCB_FLAG_TTYPE_MASK) == TCB_FLAG_TTYPE_PTHREAD &&
+       tcb->tos < CONFIG_PTHREAD_CLEANUP_STACKSIZE)
+    {
+      unsigned int ndx = tcb->tos;
+
+      tcb->tos++;
+      tcb->stack[ndx].pc_cleaner = routine;
+      tcb->stack[ndx].pc_arg = arg;
+    }
+
+  sched_unlock();
+}
+
+/****************************************************************************
+ * Name: pthread_cleanup_popall
+ *
+ * Description:
+ *   The pthread_cleanup_popall() is an internal function that will pop and
+ *   execute all clean-up functions.  This function is only called from within
+ *   the pthread_exit() and pthread_cancellation() logic
+ *
+ * Input Parameters:
+ *   tcb - The TCB of the pthread that is exiting or being canceled.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void pthread_cleanup_popall(FAR struct pthread_tcb_s *tcb)
+{
+  DEBUGASSERT(tcb != NULL);
+  DEBUGASSERT((tcb->cmn.flags & TCB_FLAG_TTYPE_MASK) == TCB_FLAG_TTYPE_PTHREAD);
+
+  /* Pop and execute each cleanup routine/
+   *
+   * sched_lock() should provide sufficient protection.  We only need to
+   * have this TCB stationary; the pthread cleanup stack should never be
+   * modified by interrupt level logic.
+   */
+
+  sched_lock();
+  while (tcb->tos > 0)
+    {
+      pthread_cleanup_pop_tcb(tcb, 1);
+    }
+
+  sched_unlock();
+}
+
+#endif /* CONFIG_PTHREAD_CLEANUP */
diff --git a/sched/pthread/pthread_completejoin.c b/sched/pthread/pthread_completejoin.c
index 2d9f3530e5987ac3a4bab672b1a42b53a4a85447..b516c9defd0f53c594815654e0b59e25e0410d1d 100644
--- a/sched/pthread/pthread_completejoin.c
+++ b/sched/pthread/pthread_completejoin.c
@@ -68,7 +68,7 @@ static bool pthread_notifywaiters(FAR struct join_s *pjoin)
   int ntasks_waiting;
   int status;
 
-  svdbg("pjoin=0x%p\n", pjoin);
+  sinfo("pjoin=0x%p\n", pjoin);
 
   /* Are any tasks waiting for our exit value? */
 
@@ -205,7 +205,7 @@ int pthread_completejoin(pid_t pid, FAR void *exit_value)
   FAR struct task_group_s *group = task_getgroup(pid);
   FAR struct join_s *pjoin;
 
-  svdbg("pid=%d exit_value=%p group=%p\n", pid, exit_value, group);
+  sinfo("pid=%d exit_value=%p group=%p\n", pid, exit_value, group);
   DEBUGASSERT(group);
 
   /* First, find thread's structure in the private data set. */
@@ -214,7 +214,7 @@ int pthread_completejoin(pid_t pid, FAR void *exit_value)
   pjoin = pthread_findjoininfo(group, pid);
   if (!pjoin)
     {
-      sdbg("Could not find join info, pid=%d\n", pid);
+      serr("ERROR: Could not find join info, pid=%d\n", pid);
       (void)pthread_givesemaphore(&group->tg_joinsem);
       return ERROR;
     }
@@ -271,7 +271,7 @@ int pthread_completejoin(pid_t pid, FAR void *exit_value)
 void pthread_destroyjoin(FAR struct task_group_s *group,
                          FAR struct join_s *pjoin)
 {
-  sdbg("pjoin=0x%p\n", pjoin);
+  sinfo("pjoin=0x%p\n", pjoin);
 
   /* Remove the join info from the set of joins */
 
diff --git a/sched/pthread/pthread_condbroadcast.c b/sched/pthread/pthread_condbroadcast.c
index a86c3a8a14681e9abcc99e603a0c943387fd86c8..35427ad48a41a2dbd413b2e04c88899f38812121 100644
--- a/sched/pthread/pthread_condbroadcast.c
+++ b/sched/pthread/pthread_condbroadcast.c
@@ -71,7 +71,7 @@ int pthread_cond_broadcast(FAR pthread_cond_t *cond)
   int ret = OK;
   int sval;
 
-  sdbg("cond=0x%p\n", cond);
+  sinfo("cond=0x%p\n", cond);
 
   if (!cond)
     {
@@ -118,7 +118,7 @@ int pthread_cond_broadcast(FAR pthread_cond_t *cond)
       sched_unlock();
     }
 
-  sdbg("Returning %d\n", ret);
+  sinfo("Returning %d\n", ret);
   return ret;
 }
 
diff --git a/sched/pthread/pthread_conddestroy.c b/sched/pthread/pthread_conddestroy.c
index 2584e8dbaee298d9f5d76223f510df0a3804ce6f..bff0c3c28b6c03dd84e9029d36561a8d34efe408 100644
--- a/sched/pthread/pthread_conddestroy.c
+++ b/sched/pthread/pthread_conddestroy.c
@@ -68,7 +68,7 @@ int pthread_cond_destroy(FAR pthread_cond_t *cond)
 {
   int ret = OK;
 
-  sdbg("cond=0x%p\n", cond);
+  sinfo("cond=0x%p\n", cond);
 
   if (!cond)
     {
@@ -82,7 +82,7 @@ int pthread_cond_destroy(FAR pthread_cond_t *cond)
       ret = EINVAL;
     }
 
-  sdbg("Returning %d\n", ret);
+  sinfo("Returning %d\n", ret);
   return ret;
 }
 
diff --git a/sched/pthread/pthread_condinit.c b/sched/pthread/pthread_condinit.c
index a73811e0782ac1e0580d1977d032d46226e157cb..7368e0fb5a5362a764264ea2aee111cc081aa94a 100644
--- a/sched/pthread/pthread_condinit.c
+++ b/sched/pthread/pthread_condinit.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * sched/pthread/pthread_condinit.c
  *
- *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,9 +40,12 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 
+#include 
+
 #include "pthread/pthread.h"
 
 /****************************************************************************
@@ -69,25 +72,30 @@ int pthread_cond_init(FAR pthread_cond_t *cond, FAR const pthread_condattr_t *at
 {
   int ret = OK;
 
-  sdbg("cond=0x%p attr=0x%p\n", cond, attr);
+  sinfo("cond=0x%p attr=0x%p\n", cond, attr);
 
-  if (!cond)
+  if (cond == NULL)
     {
       ret = EINVAL;
     }
 
-  /* Initialize the semaphore contained in the condition structure
-   * with initial count = 0
+  /* Initialize the semaphore contained in the condition structure with
+   * initial count = 0
    */
 
   else if (sem_init((FAR sem_t *)&cond->sem, 0, 0) != OK)
     {
       ret = EINVAL;
     }
+  else
+    {
+      /* The contained semaphore is used for signaling and, hence, should
+       * not have priority inheritance enabled.
+       */
+
+      sem_setprotocol(&cond->sem, SEM_PRIO_NONE);
+    }
 
-  sdbg("Returning %d\n", ret);
+  sinfo("Returning %d\n", ret);
   return ret;
 }
-
-
-
diff --git a/sched/pthread/pthread_condsignal.c b/sched/pthread/pthread_condsignal.c
index b84ef5d55ca8368952032b03d29597157d1122de..8936572ac5cac8bb355f6329676a883b5957ca0c 100644
--- a/sched/pthread/pthread_condsignal.c
+++ b/sched/pthread/pthread_condsignal.c
@@ -70,7 +70,7 @@ int pthread_cond_signal(FAR pthread_cond_t *cond)
   int ret = OK;
   int sval;
 
-  sdbg("cond=0x%p\n", cond);
+  sinfo("cond=0x%p\n", cond);
 
   if (!cond)
     {
@@ -101,16 +101,16 @@ int pthread_cond_signal(FAR pthread_cond_t *cond)
            * operation that will guarantee this to be so.
            */
 
-          sdbg("sval=%d\n", sval);
+          sinfo("sval=%d\n", sval);
           if (sval < 0)
             {
-              sdbg("Signalling...\n");
+              sinfo("Signalling...\n");
               ret = pthread_givesemaphore((FAR sem_t *)&cond->sem);
             }
         }
     }
 
-  sdbg("Returning %d\n", ret);
+  sinfo("Returning %d\n", ret);
   return ret;
 }
 
diff --git a/sched/pthread/pthread_condtimedwait.c b/sched/pthread/pthread_condtimedwait.c
index 0e8443b2fb160316a10ef0f5dad0252b9d16082d..9027c305ef940310377b6aaa6470314ede4d1126 100644
--- a/sched/pthread/pthread_condtimedwait.c
+++ b/sched/pthread/pthread_condtimedwait.c
@@ -51,6 +51,7 @@
 
 #include 
 #include 
+#include 
 
 #include "sched/sched.h"
 #include "pthread/pthread.h"
@@ -174,10 +175,14 @@ int pthread_cond_timedwait(FAR pthread_cond_t *cond, FAR pthread_mutex_t *mutex,
   int ret = OK;
   int status;
 
-  sdbg("cond=0x%p mutex=0x%p abstime=0x%p\n", cond, mutex, abstime);
+  sinfo("cond=0x%p mutex=0x%p abstime=0x%p\n", cond, mutex, abstime);
 
   DEBUGASSERT(rtcb->waitdog == NULL);
 
+  /* pthread_cond_timedwait() is a cancellation point */
+
+  (void)enter_cancellation_point();
+
   /* Make sure that non-NULL references were provided. */
 
   if (!cond || !mutex)
@@ -212,7 +217,7 @@ int pthread_cond_timedwait(FAR pthread_cond_t *cond, FAR pthread_mutex_t *mutex,
         }
       else
         {
-          sdbg("Give up mutex...\n");
+          sinfo("Give up mutex...\n");
 
           /* We must disable pre-emption and interrupts here so that
            * the time stays valid until the wait begins.   This adds
@@ -292,7 +297,7 @@ int pthread_cond_timedwait(FAR pthread_cond_t *cond, FAR pthread_mutex_t *mutex,
 
                           if (get_errno() == EINTR)
                             {
-                              sdbg("Timedout!\n");
+                              serr("ERROR: Timedout!\n");
                               ret = ETIMEDOUT;
                             }
                           else
@@ -312,7 +317,7 @@ int pthread_cond_timedwait(FAR pthread_cond_t *cond, FAR pthread_mutex_t *mutex,
 
                   /* Reacquire the mutex (retaining the ret). */
 
-                  sdbg("Re-locking...\n");
+                  sinfo("Re-locking...\n");
                   status = pthread_takesemaphore((FAR sem_t *)&mutex->sem);
                   if (!status)
                     {
@@ -338,7 +343,8 @@ int pthread_cond_timedwait(FAR pthread_cond_t *cond, FAR pthread_mutex_t *mutex,
         }
     }
 
-  sdbg("Returning %d\n", ret);
+  leave_cancellation_point();
+  sinfo("Returning %d\n", ret);
   return ret;
 }
 
diff --git a/sched/pthread/pthread_condwait.c b/sched/pthread/pthread_condwait.c
index d60aece8ef8071097e12740577eacb7dac4db260..e7c6a9af255056bebeb7eaaa0e1aaac8c07eeaa8 100644
--- a/sched/pthread/pthread_condwait.c
+++ b/sched/pthread/pthread_condwait.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * sched/pthread/pthread_condwait.c
  *
- *   Copyright (C) 2007-2009, 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -45,6 +45,8 @@
 #include 
 #include 
 
+#include 
+
 #include "pthread/pthread.h"
 
 /****************************************************************************
@@ -71,11 +73,15 @@ int pthread_cond_wait(FAR pthread_cond_t *cond, FAR pthread_mutex_t *mutex)
 {
   int ret;
 
-  sdbg("cond=0x%p mutex=0x%p\n", cond, mutex);
+  sinfo("cond=0x%p mutex=0x%p\n", cond, mutex);
+
+  /* pthread_cond_wait() is a cancellation point */
+
+  (void)enter_cancellation_point();
 
   /* Make sure that non-NULL references were provided. */
 
-  if (!cond || !mutex)
+  if (cond == NULL || mutex == NULL)
     {
       ret = EINVAL;
     }
@@ -90,7 +96,7 @@ int pthread_cond_wait(FAR pthread_cond_t *cond, FAR pthread_mutex_t *mutex)
     {
       /* Give up the mutex */
 
-      sdbg("Give up mutex / take cond\n");
+      sinfo("Give up mutex / take cond\n");
 
       sched_lock();
       mutex->pid = -1;
@@ -101,17 +107,22 @@ int pthread_cond_wait(FAR pthread_cond_t *cond, FAR pthread_mutex_t *mutex)
       ret |= pthread_takesemaphore((FAR sem_t *)&cond->sem);
       sched_unlock();
 
-      /* Reacquire the mutex */
+      /* Reacquire the mutex.
+       *
+       * REVISIT: When cancellation points are enabled, we will almost
+       * certainly hold the mutex when the pthread is canceled.
+       */
 
-      sdbg("Reacquire mutex...\n");
+      sinfo("Reacquire mutex...\n");
       ret |= pthread_takesemaphore((FAR sem_t *)&mutex->sem);
-      if (!ret)
+      if (ret == OK)
         {
           mutex->pid = getpid();
         }
     }
 
-  sdbg("Returning %d\n", ret);
+  leave_cancellation_point();
+  sinfo("Returning %d\n", ret);
   return ret;
 }
 
diff --git a/sched/pthread/pthread_create.c b/sched/pthread/pthread_create.c
index 0869c56ed895481bc6ebdb6fb8c675aa07ee5061..957936cd826f45fa8745e435a50e1e884a85f940 100644
--- a/sched/pthread/pthread_create.c
+++ b/sched/pthread/pthread_create.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * sched/pthread/pthread_create.c
  *
- *   Copyright (C) 2007-2009, 2011, 2013-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011, 2013-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -49,9 +49,10 @@
 #include 
 #include 
 
+#include 
+#include 
 #include 
 #include 
-#include 
 
 #include "sched/sched.h"
 #include "group/group.h"
@@ -74,9 +75,11 @@ const pthread_attr_t g_default_pthread_attr = PTHREAD_ATTR_INITIALIZER;
  * Private Data
  ****************************************************************************/
 
+#if CONFIG_TASK_NAME_SIZE > 0
 /* This is the name for name-less pthreads */
 
 static const char g_pthreadname[] = "";
+#endif
 
 /****************************************************************************
  * Private Functions
@@ -183,6 +186,16 @@ static void pthread_start(void)
   pjoin->started = true;
   (void)pthread_givesemaphore(&pjoin->data_sem);
 
+  /* The priority of this thread may have been boosted to avoid priority
+   * inversion problems.  If that is the case, then drop to the correct
+   * execution priority.
+   */
+
+  if (ptcb->cmn.sched_priority > ptcb->cmn.init_priority)
+    {
+      DEBUGVERIFY(sched_setpriority(&ptcb->cmn, ptcb->cmn.init_priority));
+    }
+
   /* Pass control to the thread entry point. In the kernel build this has to
    * be handled differently if we are starting a user-space pthread; we have
    * to switch to user-mode before calling into the pthread.
@@ -249,7 +262,7 @@ int pthread_create(FAR pthread_t *thread, FAR const pthread_attr_t *attr,
   ptcb = (FAR struct pthread_tcb_s *)kmm_zalloc(sizeof(struct pthread_tcb_s));
   if (!ptcb)
     {
-      sdbg("ERROR: Failed to allocate TCB\n");
+      serr("ERROR: Failed to allocate TCB\n");
       return ENOMEM;
     }
 
@@ -282,7 +295,7 @@ int pthread_create(FAR pthread_t *thread, FAR const pthread_attr_t *attr,
   pjoin = (FAR struct join_s *)kmm_zalloc(sizeof(struct join_s));
   if (!pjoin)
     {
-      sdbg("ERROR: Failed to allocate join\n");
+      serr("ERROR: Failed to allocate join\n");
       errcode = ENOMEM;
       goto errout_with_tcb;
     }
@@ -472,6 +485,12 @@ int pthread_create(FAR pthread_t *thread, FAR const pthread_attr_t *attr,
 #endif
     }
 
+#ifdef CONFIG_CANCELLATION_POINTS
+  /* Set the deferred cancellation type */
+
+  ptcb->cmn.flags |= TCB_FLAG_CANCEL_DEFERRED;
+#endif
+
   /* Get the assigned pid before we start the task (who knows what
    * could happen to ptcb after this!).  Copy this ID into the join structure
    * as well.
@@ -488,7 +507,41 @@ int pthread_create(FAR pthread_t *thread, FAR const pthread_attr_t *attr,
       ret = sem_init(&pjoin->exit_sem, 0, 0);
     }
 
-  /* Activate the task */
+  /* Thse semaphores are used for signaling and, hence, should not have
+   * priority inheritance enabled.
+   */
+
+  if (ret == OK)
+    {
+      ret = sem_setprotocol(&pjoin->data_sem, SEM_PRIO_NONE);
+    }
+
+  if (ret == OK)
+    {
+      ret = sem_setprotocol(&pjoin->exit_sem, SEM_PRIO_NONE);
+    }
+
+  /* If the priority of the new pthread is lower than the priority of the
+   * parent thread, then starting the pthread could result in both the
+   * parent and the pthread to be blocked.  This is a recipe for priority
+   * inversion issues.
+   *
+   * We avoid this here by boosting the priority of the (inactive) pthread
+   * so it has the same priority as the parent thread.
+   */
+
+  if (ret == OK)
+    {
+      FAR struct tcb_s *parent = this_task();
+      DEBUGASSERT(parent != NULL);
+
+      if (ptcb->cmn.sched_priority < parent->sched_priority)
+        {
+          ret = sched_setpriority(&ptcb->cmn, parent->sched_priority);
+        }
+    }
+
+  /* Then activate the task */
 
   sched_lock();
   if (ret == OK)
diff --git a/sched/pthread/pthread_detach.c b/sched/pthread/pthread_detach.c
index 6bc3585b487dbfddbfd531558882b268460e8091..0d165e2d23bf0773dc54dee271941cb65e52275b 100644
--- a/sched/pthread/pthread_detach.c
+++ b/sched/pthread/pthread_detach.c
@@ -82,7 +82,7 @@ int pthread_detach(pthread_t thread)
   FAR struct join_s *pjoin;
   int ret;
 
-  sdbg("Thread=%d group=%p\n", thread, group);
+  sinfo("Thread=%d group=%p\n", thread, group);
   DEBUGASSERT(group);
 
   /* Find the entry associated with this pthread. */
@@ -91,7 +91,7 @@ int pthread_detach(pthread_t thread)
   pjoin = pthread_findjoininfo(group, (pid_t)thread);
   if (!pjoin)
     {
-      sdbg("Could not find thread entry\n");
+      serr("ERROR: Could not find thread entry\n");
       ret = EINVAL;
     }
   else
@@ -121,6 +121,6 @@ int pthread_detach(pthread_t thread)
 
   (void)pthread_givesemaphore(&group->tg_joinsem);
 
-  sdbg("Returning %d\n", ret);
+  sinfo("Returning %d\n", ret);
   return ret;
 }
diff --git a/sched/pthread/pthread_exit.c b/sched/pthread/pthread_exit.c
index d742ef8fdd68e118f7beed9faf5beda44f08419b..40a5b7fb0de84b7be5fa554c05dccc2efa0dbb29 100644
--- a/sched/pthread/pthread_exit.c
+++ b/sched/pthread/pthread_exit.c
@@ -78,7 +78,10 @@ void pthread_exit(FAR void *exit_value)
   FAR struct tcb_s *tcb = this_task();
   int status;
 
-  sdbg("exit_value=%p\n", exit_value);
+  sinfo("exit_value=%p\n", exit_value);
+
+  DEBUGASSERT(tcb != NULL);
+  DEBUGASSERT((tcb->flags & TCB_FLAG_TTYPE_MASK) == TCB_FLAG_TTYPE_PTHREAD);
 
   /* Block any signal actions that would awaken us while were
    * are performing the JOIN handshake.
@@ -91,6 +94,23 @@ void pthread_exit(FAR void *exit_value)
   }
 #endif
 
+#ifdef CONFIG_CANCELLATION_POINTS
+   /* Mark the pthread as non-cancelable to avoid additional calls to
+    * pthread_exit() due to any cancellation point logic that might get
+    * kicked off by actions taken during pthread_exit processing.
+    */
+
+   tcb->flags  |=  TCB_FLAG_NONCANCELABLE;
+   tcb->flags  &= ~TCB_FLAG_CANCEL_PENDING;
+   tcb->cpcount = 0;
+#endif
+
+#ifdef CONFIG_PTHREAD_CLEANUP
+   /* Perform any stack pthread clean-up callbacks */
+
+   pthread_cleanup_popall((FAR struct pthread_tcb_s *)tcb);
+#endif
+
   /* Complete pending join operations */
 
   status = pthread_completejoin(getpid(), exit_value);
diff --git a/sched/pthread/pthread_findjoininfo.c b/sched/pthread/pthread_findjoininfo.c
index 60769bc16dd91de7ece6cacfc74e8bbce559906a..23fcc6a46d761e26e44bff7e7735aedc468cfd48 100644
--- a/sched/pthread/pthread_findjoininfo.c
+++ b/sched/pthread/pthread_findjoininfo.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * pthread_findjoininfo.c
+ * sched/pthread/pthread_findjoininfo.c
  *
  *   Copyright (C) 2007, 2009, 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/sched/pthread/pthread_getaffinity.c b/sched/pthread/pthread_getaffinity.c
index 04d19219105bb7c85996f95ba94f1b6cb0cdf8bd..f4d46f1976a38e492d69179e48e6cf8fcd7feb1e 100644
--- a/sched/pthread/pthread_getaffinity.c
+++ b/sched/pthread/pthread_getaffinity.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * pthread_getaffinity.c
+ * sched/pthread/pthread_getaffinity.c
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -80,8 +80,8 @@ int pthread_getaffinity_np(pthread_t thread, size_t cpusetsize,
 {
   int ret;
 
-  sdbg("thread ID=%d cpusetsize=%d cpuset=%p\n",
-       (int)thread, (int)cpusetsize, cpusetsize);
+  sinfo("thread ID=%d cpusetsize=%d cpuset=%p\n",
+        (int)thread, (int)cpusetsize, cpusetsize);
 
   DEBUGASSERT(thread > 0 && cpusetsize == sizeof(cpu_set_t) &&
               cpuset != NULL);
diff --git a/sched/pthread/pthread_getschedparam.c b/sched/pthread/pthread_getschedparam.c
index fbb1be26b0a256bc6ba6186696850ee55a6109dd..a71bc488cdb007aca78cd279a845c393311f0849 100644
--- a/sched/pthread/pthread_getschedparam.c
+++ b/sched/pthread/pthread_getschedparam.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * pthread_getschedparam.c
+ * sched/pthread/pthread_getschedparam.c
  *
  *   Copyright (C) 2007, 2008, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
@@ -88,7 +88,7 @@ int pthread_getschedparam(pthread_t thread, FAR int *policy,
 {
   int ret;
 
-  sdbg("Thread ID=%d policy=0x%p param=0x%p\n", thread, policy, param);
+  sinfo("Thread ID=%d policy=0x%p param=0x%p\n", thread, policy, param);
 
   if (!policy || !param)
     {
@@ -113,7 +113,7 @@ int pthread_getschedparam(pthread_t thread, FAR int *policy,
         }
     }
 
-  sdbg("Returning %d\n", ret);
+  sinfo("Returning %d\n", ret);
   return ret;
 }
 
diff --git a/sched/pthread/pthread_join.c b/sched/pthread/pthread_join.c
index 9bb9fa3fa0dde5f610e16d16e497b45d313b3458..01c1c713eaabb3ff23d78a0c946b2dcc34530967 100644
--- a/sched/pthread/pthread_join.c
+++ b/sched/pthread/pthread_join.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * pthread_join.c
+ * sched/pthread/pthread_join.c
  *
- *   Copyright (C) 2007, 2008, 2011, 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2008, 2011, 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -37,12 +37,16 @@
  * Included Files
  ****************************************************************************/
 
+#include 
+
 #include 
 #include 
 #include 
 #include 
 #include 
 
+#include 
+
 #include "sched/sched.h"
 #include "group/group.h"
 #include "pthread/pthread.h"
@@ -87,15 +91,20 @@ int pthread_join(pthread_t thread, FAR pthread_addr_t *pexit_value)
   FAR struct join_s *pjoin;
   int ret;
 
-  sdbg("thread=%d group=%p\n", thread, group);
+  sinfo("thread=%d group=%p\n", thread, group);
   DEBUGASSERT(group);
 
+  /* pthread_join() is a cancellation point */
+
+  (void)enter_cancellation_point();
+
   /* First make sure that this is not an attempt to join to
    * ourself.
    */
 
   if ((pid_t)thread == getpid())
     {
+      leave_cancellation_point();
       return EDEADLK;
     }
 
@@ -121,7 +130,7 @@ int pthread_join(pthread_t thread, FAR pthread_addr_t *pexit_value)
 
       FAR struct tcb_s *tcb = sched_gettcb((pthread_t)thread);
 
-      sdbg("Could not find thread data\n");
+      serr("ERROR: Could not find thread data\n");
 
       /* Case (1) or (3) -- we can't tell which.  Assume (3) */
 
@@ -159,19 +168,19 @@ int pthread_join(pthread_t thread, FAR pthread_addr_t *pexit_value)
 
       if (pjoin->terminated)
         {
-          sdbg("Thread has terminated\n");
+          sinfo("Thread has terminated\n");
 
           /* Get the thread exit value from the terminated thread. */
 
           if (pexit_value)
             {
-              sdbg("exit_value=0x%p\n", pjoin->exit_value);
+              sinfo("exit_value=0x%p\n", pjoin->exit_value);
               *pexit_value = pjoin->exit_value;
             }
         }
       else
         {
-          sdbg("Thread is still running\n");
+          sinfo("Thread is still running\n");
 
           /* Relinquish the data set semaphore.  Since pre-emption is
            * disabled, we can be certain that no task has the
@@ -195,7 +204,7 @@ int pthread_join(pthread_t thread, FAR pthread_addr_t *pexit_value)
           if (pexit_value)
             {
              *pexit_value = pjoin->exit_value;
-              sdbg("exit_value=0x%p\n", pjoin->exit_value);
+              sinfo("exit_value=0x%p\n", pjoin->exit_value);
             }
 
           /* Post the thread's data semaphore so that the exiting thread
@@ -230,6 +239,7 @@ int pthread_join(pthread_t thread, FAR pthread_addr_t *pexit_value)
       ret = OK;
     }
 
-  sdbg("Returning %d\n", ret);
+  leave_cancellation_point();
+  sinfo("Returning %d\n", ret);
   return ret;
 }
diff --git a/sched/pthread/pthread_kill.c b/sched/pthread/pthread_kill.c
index a53842308af7adf18961ae1f2f08e6c023bf8f0e..902cbcd78c26676db99b329e72f8d5efe08b2166 100644
--- a/sched/pthread/pthread_kill.c
+++ b/sched/pthread/pthread_kill.c
@@ -86,8 +86,8 @@
 int pthread_kill(pthread_t thread, int signo)
 {
 #ifdef HAVE_GROUP_MEMBERS
-  /* If group members are support then pthread_kill() differs from kill().
-   * kill(), in this case, must following the POSIX rules for delivery of
+  /* If group members are supported then pthread_kill() differs from kill().
+   * kill(), in this case, must follow the POSIX rules for delivery of
    * signals in the group environment.  Otherwise, kill(), like
    * pthread_kill() will just deliver the signal to the thread ID it is
    * requested to use.
diff --git a/sched/pthread/pthread_mutexdestroy.c b/sched/pthread/pthread_mutexdestroy.c
index d7d5e7c898ad67df811c8f5bd8b31e12bf741bd9..8bab62c4743a8417a68301b403391adb061c0f7f 100644
--- a/sched/pthread/pthread_mutexdestroy.c
+++ b/sched/pthread/pthread_mutexdestroy.c
@@ -41,6 +41,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -72,9 +73,9 @@ int pthread_mutex_destroy(FAR pthread_mutex_t *mutex)
   int ret = OK;
   int status;
 
-  sdbg("mutex=0x%p\n", mutex);
+  sinfo("mutex=0x%p\n", mutex);
 
-  if (!mutex)
+  if (mutex == NULL)
     {
       ret = EINVAL;
     }
@@ -90,7 +91,29 @@ int pthread_mutex_destroy(FAR pthread_mutex_t *mutex)
 
       if (mutex->pid != -1)
         {
-          ret = EBUSY;
+#ifndef CONFIG_DISABLE_SIGNALS
+          /* Verify that the PID still exists.  We may be destroying the
+           * mutex after cancelling a pthread and the mutex may have been
+           * in a bad state owned by the dead pthread.
+           */
+
+         ret = kill(mutex->pid, 0);
+         if (ret < 0)
+           {
+             /* The thread associated with the PID no longer exists */
+
+             mutex->pid = -1;
+
+             /* Destroy the semaphore */
+
+             status = sem_destroy((FAR sem_t *)&mutex->sem);
+             ret = (status != OK) ? get_errno() : OK;
+            }
+         else
+#endif
+           {
+             ret = EBUSY;
+           }
         }
       else
         {
@@ -99,13 +122,13 @@ int pthread_mutex_destroy(FAR pthread_mutex_t *mutex)
           status = sem_destroy((FAR sem_t *)&mutex->sem);
           if (status != OK)
             {
-              ret = EINVAL;
+              ret = get_errno();
             }
         }
 
       sched_unlock();
     }
 
-  sdbg("Returning %d\n", ret);
+  sinfo("Returning %d\n", ret);
   return ret;
 }
diff --git a/sched/pthread/pthread_mutexinit.c b/sched/pthread/pthread_mutexinit.c
index c4355d41bd949ebcfc8c569aa48d1dc7ef6e7bcd..fe9620da0b47e2373248cb9fe15a6faa4b1dfbcc 100644
--- a/sched/pthread/pthread_mutexinit.c
+++ b/sched/pthread/pthread_mutexinit.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * sched/pthread/pthread_mutexinit.c
  *
- *   Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -44,6 +44,8 @@
 #include 
 #include 
 
+#include 
+
 #include "pthread/pthread.h"
 
 /****************************************************************************
@@ -66,16 +68,20 @@
  *
  ****************************************************************************/
 
-int pthread_mutex_init(FAR pthread_mutex_t *mutex, FAR const pthread_mutexattr_t *attr)
+int pthread_mutex_init(FAR pthread_mutex_t *mutex,
+                       FAR const pthread_mutexattr_t *attr)
 {
   int pshared = 0;
 #ifdef CONFIG_MUTEX_TYPES
-  uint8_t type  = PTHREAD_MUTEX_DEFAULT;
+  uint8_t type = PTHREAD_MUTEX_DEFAULT;
+#endif
+#ifdef CONFIG_PRIORITY_INHERITANCE
+  uint8_t proto = PTHREAD_PRIO_INHERIT;
 #endif
-  int ret       = OK;
+  int ret = OK;
   int status;
 
-  sdbg("mutex=0x%p attr=0x%p\n", mutex, attr);
+  sinfo("mutex=0x%p attr=0x%p\n", mutex, attr);
 
   if (!mutex)
     {
@@ -88,6 +94,9 @@ int pthread_mutex_init(FAR pthread_mutex_t *mutex, FAR const pthread_mutexattr_t
       if (attr)
         {
           pshared = attr->pshared;
+#ifdef CONFIG_PRIORITY_INHERITANCE
+          proto   = attr->proto;
+#endif
 #ifdef CONFIG_MUTEX_TYPES
           type    = attr->type;
 #endif
@@ -102,9 +111,19 @@ int pthread_mutex_init(FAR pthread_mutex_t *mutex, FAR const pthread_mutexattr_t
       status = sem_init((FAR sem_t *)&mutex->sem, pshared, 1);
       if (status != OK)
         {
-          ret = EINVAL;
+          ret = get_errno();
         }
 
+#ifdef CONFIG_PRIORITY_INHERITANCE
+      /* Initialize the semaphore protocol */
+
+      status = sem_setprotocol((FAR sem_t *)&mutex->sem, proto);
+      if (status != OK)
+        {
+          ret = get_errno();
+        }
+#endif
+
       /* Set up attributes unique to the mutex type */
 
 #ifdef CONFIG_MUTEX_TYPES
@@ -113,6 +132,6 @@ int pthread_mutex_init(FAR pthread_mutex_t *mutex, FAR const pthread_mutexattr_t
 #endif
     }
 
-  sdbg("Returning %d\n", ret);
+  sinfo("Returning %d\n", ret);
   return ret;
 }
diff --git a/sched/pthread/pthread_mutexlock.c b/sched/pthread/pthread_mutexlock.c
index 85e16adc473f71322898e9488f4c457d9138b205..f94890505dfbe29c96d700bf7a9661babfe4dac1 100644
--- a/sched/pthread/pthread_mutexlock.c
+++ b/sched/pthread/pthread_mutexlock.c
@@ -106,7 +106,7 @@ int pthread_mutex_lock(FAR pthread_mutex_t *mutex)
   int mypid = (int)getpid();
   int ret = OK;
 
-  sdbg("mutex=0x%p\n", mutex);
+  sinfo("mutex=0x%p\n", mutex);
 
   if (!mutex)
     {
@@ -140,7 +140,7 @@ int pthread_mutex_lock(FAR pthread_mutex_t *mutex)
                * is like PTHREAD_MUTEX_ERRORCHECK)
                */
 
-              sdbg("Returning EDEADLK\n");
+              serr("ERROR: Returning EDEADLK\n");
               ret = EDEADLK;
             }
         }
@@ -150,7 +150,7 @@ int pthread_mutex_lock(FAR pthread_mutex_t *mutex)
 
           ret = pthread_takesemaphore((FAR sem_t *)&mutex->sem);
 
-          /* If we succussfully obtained the semaphore, then indicate
+          /* If we successfully obtained the semaphore, then indicate
            * that we own it.
            */
 
@@ -166,7 +166,7 @@ int pthread_mutex_lock(FAR pthread_mutex_t *mutex)
       sched_unlock();
     }
 
-  sdbg("Returning %d\n", ret);
+  sinfo("Returning %d\n", ret);
   return ret;
 }
 
diff --git a/sched/pthread/pthread_mutextrylock.c b/sched/pthread/pthread_mutextrylock.c
index 249dd28d8c770a4c69c17dde9b8920271aa41268..825cb992a143f903ef6bb058c09b274cea8adcdd 100644
--- a/sched/pthread/pthread_mutextrylock.c
+++ b/sched/pthread/pthread_mutextrylock.c
@@ -85,7 +85,7 @@ int pthread_mutex_trylock(FAR pthread_mutex_t *mutex)
 {
   int ret = OK;
 
-  sdbg("mutex=0x%p\n", mutex);
+  sinfo("mutex=0x%p\n", mutex);
 
   if (!mutex)
     {
@@ -149,7 +149,7 @@ int pthread_mutex_trylock(FAR pthread_mutex_t *mutex)
       sched_unlock();
     }
 
-  sdbg("Returning %d\n", ret);
+  sinfo("Returning %d\n", ret);
   return ret;
 }
 
diff --git a/sched/pthread/pthread_mutexunlock.c b/sched/pthread/pthread_mutexunlock.c
index 3b508940509d91f1394b288b01089235b7f8db92..078d9094b93bfa6fb2c52a64d081cc4b163bbc15 100644
--- a/sched/pthread/pthread_mutexunlock.c
+++ b/sched/pthread/pthread_mutexunlock.c
@@ -82,7 +82,7 @@ int pthread_mutex_unlock(FAR pthread_mutex_t *mutex)
 {
   int ret = OK;
 
-  sdbg("mutex=0x%p\n", mutex);
+  sinfo("mutex=0x%p\n", mutex);
 
   if (!mutex)
     {
@@ -102,7 +102,7 @@ int pthread_mutex_unlock(FAR pthread_mutex_t *mutex)
         {
           /* No... return an error (default behavior is like PTHREAD_MUTEX_ERRORCHECK) */
 
-          sdbg("Holder=%d returning EPERM\n", mutex->pid);
+          serr("ERROR: Holder=%d returning EPERM\n", mutex->pid);
           ret = EPERM;
         }
 
@@ -137,7 +137,7 @@ int pthread_mutex_unlock(FAR pthread_mutex_t *mutex)
       sched_unlock();
     }
 
-  sdbg("Returning %d\n", ret);
+  sinfo("Returning %d\n", ret);
   return ret;
 }
 
diff --git a/sched/pthread/pthread_once.c b/sched/pthread/pthread_once.c
index b8afe81112a880d70bb233d46fcc20e901fcac89..cd778a02d230cd7194c6979154103d115339a893 100644
--- a/sched/pthread/pthread_once.c
+++ b/sched/pthread/pthread_once.c
@@ -1,4 +1,4 @@
-/********************************************************************************
+/****************************************************************************
  * sched/pthread/pthread_once.c
  *
  *   Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
@@ -31,11 +31,11 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************************/
+ ****************************************************************************/
 
 #include 
 
@@ -45,26 +45,26 @@
 #include 
 #include 
 
-/********************************************************************************
+/****************************************************************************
  * Public Functions
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Name: pthread_once
  *
  * Description:
- *   The  first call to pthread_once() by any thread with a given once_control,
- *   will call the init_routine with no arguments. Subsequent calls to
- *   pthread_once() with the same once_control will have no effect.  On return
- *   from pthread_once(), init_routine will have completed.
+ *   The  first call to pthread_once() by any thread with a given
+ *   once_control, will call the init_routine with no arguments. Subsequent
+ *   calls to pthread_once() with the same once_control will have no effect.
+ *   On return from pthread_once(), init_routine will have completed.
  *
  * Parameters:
- *   once_control - Determines if init_routine should be called.  once_control
- *      should be declared and initializeed as follows:
+ *   once_control - Determines if init_routine should be called.
+ *     once_control should be declared and initializeed as follows:
  *
  *        pthread_once_t once_control = PTHREAD_ONCE_INIT;
  *
- *       PTHREAD_ONCE_INIT is defined in pthread.h
+ *     PTHREAD_ONCE_INIT is defined in pthread.h
  *   init_routine - The initialization routine that will be called once.
  *
  * Return Value:
@@ -73,7 +73,7 @@
  *
  * Assumptions:
  *
- ********************************************************************************/
+ ****************************************************************************/
 
 int pthread_once(FAR pthread_once_t *once_control,
                  CODE void (*init_routine)(void))
diff --git a/sched/pthread/pthread_setaffinity.c b/sched/pthread/pthread_setaffinity.c
index 3948bf9025833181f4375409e824d8a2a409cfd5..cf8ccf639fd4d3c90f5f3253bedd66affdc3a005 100644
--- a/sched/pthread/pthread_setaffinity.c
+++ b/sched/pthread/pthread_setaffinity.c
@@ -82,8 +82,8 @@ int pthread_setaffinity_np(pthread_t thread, size_t cpusetsize,
 {
   int ret;
 
-  sdbg("thread ID=%d cpusetsize=%d cpuset=%p\n",
-       (int)thread, (int)cpusetsize, cpusetsize);
+  sinfo("thread ID=%d cpusetsize=%d cpuset=%p\n",
+        (int)thread, (int)cpusetsize, cpusetsize);
 
   DEBUGASSERT(thread > 0 && cpusetsize == sizeof(cpu_set_t) &&
               cpuset != NULL);
diff --git a/sched/pthread/pthread_setschedparam.c b/sched/pthread/pthread_setschedparam.c
index fe7ee0cdb116d189c3aa1c5786dc79b3729f3cbe..3c04cfb0232029e86934f28c053c52f50c2c8413 100644
--- a/sched/pthread/pthread_setschedparam.c
+++ b/sched/pthread/pthread_setschedparam.c
@@ -103,7 +103,7 @@ int pthread_setschedparam(pthread_t thread, int policy,
 {
   int ret;
 
-  sdbg("thread ID=%d policy=%d param=0x%p\n", thread, policy, param);
+  sinfo("thread ID=%d policy=%d param=0x%p\n", thread, policy, param);
 
   /* Set the errno to some non-zero value (failsafe) */
 
diff --git a/sched/sched/Make.defs b/sched/sched/Make.defs
index dff73fdba210c7b25fdcd64bd903a732ac0a1537..0626d9e39b02c9a33f278d7b67b33f11e43e6b2a 100644
--- a/sched/sched/Make.defs
+++ b/sched/sched/Make.defs
@@ -42,14 +42,16 @@ CSRCS += sched_getsockets.c sched_getstreams.c
 CSRCS += sched_setparam.c sched_setpriority.c sched_getparam.c
 CSRCS += sched_setscheduler.c sched_getscheduler.c
 CSRCS += sched_yield.c sched_rrgetinterval.c sched_foreach.c
-CSRCS += sched_lock.c sched_unlock.c sched_lockcount.c sched_self.c
+CSRCS += sched_lock.c sched_unlock.c sched_lockcount.c
+CSRCS += sched_idletask.c sched_self.c
 
 ifeq ($(CONFIG_PRIORITY_INHERITANCE),y)
 CSRCS += sched_reprioritize.c
 endif
 
 ifeq ($(CONFIG_SMP),y)
-CSRCS += sched_getaffinity.c sched_setaffinity.c sched_cpuselect.c
+CSRCS += sched_cpuselect.c sched_cpupause.c
+CSRCS += sched_getaffinity.c sched_setaffinity.c
 endif
 
 ifeq ($(CONFIG_SCHED_WAITPID),y)
@@ -79,6 +81,9 @@ endif
 
 ifeq ($(CONFIG_SCHED_CPULOAD),y)
 CSRCS += sched_cpuload.c
+ifeq ($(CONFIG_CPULOAD_ONESHOT),y)
+CSRCS += sched_cpuload_oneshot.c
+endif
 endif
 
 ifeq ($(CONFIG_SCHED_TICKLESS),y)
diff --git a/sched/sched/sched.h b/sched/sched/sched.h
index 2b62e9f660e0c1bc2612bb697e2404371c45ed56..c8534e139950b5c95a62206b6299e6ff872c259b 100644
--- a/sched/sched/sched.h
+++ b/sched/sched/sched.h
@@ -353,12 +353,12 @@ extern volatile uint32_t g_cpuload_total;
  *    least one CPU has pre-emption disabled.
  */
 
-extern volatile spinlock_t g_cpu_schedlock;
+extern volatile spinlock_t g_cpu_schedlock SP_SECTION;
 
 /* Used to keep track of which CPU(s) hold the IRQ lock. */
 
-extern volatile spinlock_t g_cpu_locksetlock;
-extern volatile cpu_set_t g_cpu_lockset;
+extern volatile spinlock_t g_cpu_locksetlock SP_SECTION;
+extern volatile cpu_set_t g_cpu_lockset SP_SECTION;
 
 #endif /* CONFIG_SMP */
 
@@ -419,12 +419,13 @@ void sched_sporadic_lowpriority(FAR struct tcb_s *tcb);
 #endif
 
 #ifdef CONFIG_SMP
-int sched_cpu_select(cpu_set_t affinity);
+int  sched_cpu_select(cpu_set_t affinity);
+int  sched_cpu_pause(FAR struct tcb_s *tcb);
 #  define sched_islocked(tcb) spin_islocked(&g_cpu_schedlock)
 #else
-#  define sched_islocked(tcb) ((tcb)->lockcount > 0)
 #  define sched_cpu_select(a) (0)
-
+#  define sched_cpu_pause(t)  (-38)  /* -ENOSYS */
+#  define sched_islocked(tcb) ((tcb)->lockcount > 0)
 #endif
 
 /* CPU load measurement support */
diff --git a/sched/sched/sched_addreadytorun.c b/sched/sched/sched_addreadytorun.c
index 77b1492c5350e3ecf38d2a5d4b7cee87f4ec5229..3d9fc6179e25862eb40bb18867e49741fca91f89 100644
--- a/sched/sched/sched_addreadytorun.c
+++ b/sched/sched/sched_addreadytorun.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * sched/sched/sched_addreadytorun.c
  *
- *   Copyright (C) 2007-2009, 2014, 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2014, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -167,10 +167,11 @@ bool sched_addreadytorun(FAR struct tcb_s *btcb)
 {
   FAR struct tcb_s *rtcb;
   FAR dq_queue_t *tasklist;
-  int task_state;
-  int cpu;
   bool switched;
   bool doswitch;
+  int task_state;
+  int cpu;
+  int me;
 
   /* Check if the blocked TCB is locked to this CPU */
 
@@ -226,9 +227,17 @@ bool sched_addreadytorun(FAR struct tcb_s *btcb)
    * disabled.  If the selected state is TSTATE_TASK_READYTORUN, then it
    * should also go to the pending task list so that it will have a chance
    * to be restarted when the scheduler is unlocked.
+   *
+   * There is an interaction here with IRQ locking.  Even if the pre-
+   * emption is enabled, tasks will be forced to pend if the IRQ lock
+   * is also set UNLESS the CPU starting the thread is also the holder of
+   * the IRQ lock.  irq_cpu_locked() performs an atomic check for that
+   * situation.
    */
 
-  if (spin_islocked(&g_cpu_schedlock) && task_state != TSTATE_TASK_ASSIGNED)
+  me = this_cpu();
+  if ((spin_islocked(&g_cpu_schedlock) || irq_cpu_locked(me)) &&
+      task_state != TSTATE_TASK_ASSIGNED)
     {
       /* Add the new ready-to-run task to the g_pendingtasks task list for
        * now.
@@ -255,10 +264,8 @@ bool sched_addreadytorun(FAR struct tcb_s *btcb)
     }
   else /* (task_state == TSTATE_TASK_ASSIGNED || task_state == TSTATE_TASK_RUNNING) */
     {
-      int me = this_cpu();
-
-      /* If we are modifying some assigned task list other than our own, we will
-       * need to stop that CPU.
+      /* If we are modifying some assigned task list other than our own, we
+       * will need to stop that CPU.
        */
 
       if (cpu != me)
@@ -273,7 +280,8 @@ bool sched_addreadytorun(FAR struct tcb_s *btcb)
       tasklist = (FAR dq_queue_t *)&g_assignedtasks[cpu];
       switched = sched_addprioritized(btcb, tasklist);
 
-      /* If the selected task was the g_assignedtasks[] list, then a context
+      /* If the selected task list was the g_assignedtasks[] list and if the
+       * new tasks is the highest priority (RUNNING) task, then a context
        * switch will occur.
        */
 
@@ -314,13 +322,40 @@ bool sched_addreadytorun(FAR struct tcb_s *btcb)
 
           if (btcb->irqcount > 0)
             {
+              /* Yes... make sure that scheduling logic on other CPUs knows
+               * that we hold the IRQ lock.
+               */
+
               spin_setbit(&g_cpu_irqset, cpu, &g_cpu_irqsetlock,
                           &g_cpu_irqlock);
             }
-          else
+
+          /* No.. This CPU will be relinquishing the lock.  But this works
+           * differently if we are performing a context switch from an
+           * interrupt handler and the interrupt handler has established
+           * a critical section.  We can detect this case when
+           * g_cpu_nestcount[me] > 0.
+           */
+
+          else if (g_cpu_nestcount[me] <= 0)
             {
+              /* Release our hold on the IRQ lock. */
+
               spin_clrbit(&g_cpu_irqset, cpu, &g_cpu_irqsetlock,
-                          &g_cpu_irqlock);
+                         &g_cpu_irqlock);
+            }
+
+          /* Sanity check.  g_cpu_netcount should be greater than zero
+           * only while we are within the critical section and within
+           * an interrupt handler.  If we are not in an interrupt handler
+           * then there is a problem; perhaps some logic previously
+           * called enter_critical_section() with no matching call to
+           * leave_critical_section(), leaving the non-zero count.
+           */
+
+          else
+            {
+              DEBUGASSERT(up_interrupt_context());
             }
 
           /* If the following task is not locked to this CPU, then it must
@@ -367,7 +402,14 @@ bool sched_addreadytorun(FAR struct tcb_s *btcb)
         }
       else
         {
-          /* No context switch.  Assign the CPU and set the assigned state */
+          /* No context switch.  Assign the CPU and set the assigned state.
+           *
+           * REVISIT: I have seen this assertion fire.  Apparently another
+           * CPU may add another, higher prioirity task to the same
+           * g_assignedtasks[] list sometime after sched_cpu_select() was
+           * called above, leaving this TCB in the wrong task list if task_state
+           * is TSTATE_TASK_ASSIGNED).
+           */
 
           DEBUGASSERT(task_state == TSTATE_TASK_ASSIGNED);
 
diff --git a/sched/sched/sched_cpuload.c b/sched/sched/sched_cpuload.c
index 6cfe027bedbccf3c05338bb89d6e4288873802a9..af8f90c72a97a1c67e7e3a4ad15bec0112a71ddb 100644
--- a/sched/sched/sched_cpuload.c
+++ b/sched/sched/sched_cpuload.c
@@ -65,13 +65,21 @@
 #  define CPULOAD_TICKSPERSEC CLOCKS_PER_SEC
 #endif
 
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
+/* When g_cpuload_total exceeds the following time constant, the load and
+ * the counds will be scaled back by two.  In the CONFIG_SMP, g_cpuload_total
+ * will be incremented multiple times per tick.
+ */
 
-/****************************************************************************
- * Public Data
- ****************************************************************************/
+#ifdef CONFIG_SMP
+#  define CPULOAD_TIMECONSTANT \
+    (CONFIG_SMP_NCPUS * \
+     CONFIG_SCHED_CPULOAD_TIMECONSTANT * \
+     CPULOAD_TICKSPERSEC)
+#else
+#  define CPULOAD_TIMECONSTANT \
+    (CONFIG_SCHED_CPULOAD_TIMECONSTANT * \
+     CPULOAD_TICKSPERSEC)
+#endif
 
 /****************************************************************************
  * Private Data
@@ -79,6 +87,15 @@
 
 /* This is the total number of clock tick counts.  Essentially the
  * 'denominator' for all CPU load calculations.
+ *
+ * For a single CPU, this value is increment once per sample interval.  So,
+ * for example, if nothing is running but the IDLE thread, that IDLE thread
+ * will get 100% of the load.
+ *
+ * But for the case of multiple CPUs (with CONFIG_SMP=y), this value is
+ * incremented for each CPU on each sample interval. So, as an example, if
+ * there are four CPUs and is nothing is running but the IDLE threads, then
+ * each would have a load of 25% of the total.
  */
 
 volatile uint32_t g_cpuload_total;
@@ -88,17 +105,13 @@ volatile uint32_t g_cpuload_total;
  ****************************************************************************/
 
 /****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: sched_process_cpuload
+ * Name: sched_cpu_process_cpuload
  *
  * Description:
  *   Collect data that can be used for CPU load measurements.
  *
  * Inputs:
- *   None
+ *   cpu - The CPU that we are performing the load operations on.
  *
  * Return Value:
  *   None
@@ -109,11 +122,10 @@ volatile uint32_t g_cpuload_total;
  *
  ****************************************************************************/
 
-void weak_function sched_process_cpuload(void)
+static inline void sched_cpu_process_cpuload(int cpu)
 {
-  FAR struct tcb_s *rtcb  = this_task();
+  FAR struct tcb_s *rtcb  = current_task(cpu);
   int hash_index;
-  int i;
 
   /* Increment the count on the currently executing thread
    *
@@ -127,11 +139,62 @@ void weak_function sched_process_cpuload(void)
   hash_index = PIDHASH(rtcb->pid);
   g_pidhash[hash_index].ticks++;
 
-  /* Increment tick count.  If the accumulated tick value exceed a time
-   * constant, then shift the accumulators.
+  /* Increment tick count.  NOTE that the count is increment once for each
+   * CPU on each sample interval.
+   */
+
+  g_cpuload_total++;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sched_process_cpuload
+ *
+ * Description:
+ *   Collect data that can be used for CPU load measurements.
+ *
+ * Inputs:
+ *   None
+ *
+ * Return Value:
+ *   None
+ *
+ * Assumptions/Limitations:
+ *   This function is called from a timer interrupt handler with all
+ *   interrupts disabled.
+ *
+ ****************************************************************************/
+
+void weak_function sched_process_cpuload(void)
+{
+  int i;
+
+#ifdef CONFIG_SMP
+  irqstate_t flags;
+
+  /* Perform scheduler operations on all CPUs. */
+
+  flags = enter_critical_section();
+  for (i = 0; i < CONFIG_SMP_NCPUS; i++)
+    {
+      sched_cpu_process_cpuload(i);
+    }
+
+#else
+  /* Perform scheduler operations on the single CPU. */
+
+  sched_cpu_process_cpuload(0);
+
+#endif
+
+  /* If the accumulated tick value exceed a time constant, then shift the
+   * accumulators and recalculate the total.
    */
 
-  if (++g_cpuload_total > (CONFIG_SCHED_CPULOAD_TIMECONSTANT * CPULOAD_TICKSPERSEC))
+  if (g_cpuload_total > CPULOAD_TIMECONSTANT)
     {
       uint32_t total = 0;
 
@@ -149,6 +212,10 @@ void weak_function sched_process_cpuload(void)
 
       g_cpuload_total = total;
     }
+
+#ifdef CONFIG_SMP
+  leave_critical_section(flags);
+#endif
 }
 
 /****************************************************************************
diff --git a/sched/sched/sched_cpuload_oneshot.c b/sched/sched/sched_cpuload_oneshot.c
new file mode 100644
index 0000000000000000000000000000000000000000..e3076bbfb69e04ca60bf604d7d18f3d3a28362c9
--- /dev/null
+++ b/sched/sched/sched_cpuload_oneshot.c
@@ -0,0 +1,304 @@
+/****************************************************************************
+ * sched/sched/sched_cpuload_oneshot.c
+ *
+ *   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "clock/clock.h"
+
+#ifdef CONFIG_CPULOAD_ONESHOT
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+#if !defined(CONFIG_SCHED_CPULOAD) || !defined(CONFIG_SCHED_CPULOAD_EXTCLK)
+#  error CONFIG_SCHED_CPULOAD and CONFIG_SCHED_CPULOAD_EXTCLK must be defined
+#endif
+
+/* CONFIG_SCHED_CPULOAD_TICKSPERSEC is the frequency of the external clock
+ * source.
+ */
+
+#ifndef CONFIG_SCHED_CPULOAD_TICKSPERSEC
+#  error CONFIG_SCHED_CPULOAD_TICKSPERSEC not defined
+#endif
+
+/* CONFIG_CPULOAD_ONESHOT_ENTROPY determines that amount of random "jitter"
+ * that will be added to the nominal sample interval.  Specified as a number
+ * bits.
+ */
+
+#ifndef CONFIG_CPULOAD_ONESHOT_ENTROPY
+#  warning CONFIG_CPULOAD_ONESHOT_ENTROPY not defined
+#  define CONFIG_CPULOAD_ONESHOT_ENTROPY 0
+#endif
+
+/* Calculate the nomimal sample interval in microseconds:
+ *
+ * nominal = (1,000,000 usec/sec) / Frequency cycles/sec) = Period usec/cycle
+ */
+
+#define CPULOAD_ONESHOT_NOMINAL      (1000000 / CONFIG_SCHED_CPULOAD_TICKSPERSEC)
+
+#if CPULOAD_ONESHOT_NOMINAL < 1 || CPULOAD_ONESHOT_NOMINAL > 0x7fffffff
+#  error CPULOAD_ONESHOT_NOMINAL is out of range
+#endif
+
+/* Convert the entropy from number of bits to a numeric value */
+
+#define CPULOAD_ONESHOT_ENTROPY      (1 << CONFIG_CPULOAD_ONESHOT_ENTROPY)
+
+#if CPULOAD_ONESHOT_NOMINAL < CPULOAD_ONESHOT_ENTROPY
+#  error CPULOAD_ONESHOT_NOMINAL too small for CONFIG_CPULOAD_ONESHOT_ENTROPY
+#endif
+
+#define CPULOAD_ONESHOT_ENTROPY_MASK (CPULOAD_ONESHOT_ENTROPY - 1)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct sched_oneshot_s
+{
+  FAR struct oneshot_lowerhalf_s *oneshot;
+#if CONFIG_CPULOAD_ONESHOT_ENTROPY > 0
+  struct xorshift128_state_s prng;
+  int32_t maxdelay;
+  int32_t error;
+#endif
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static void sched_oneshot_start(void);
+static void sched_oneshot_callback(FAR struct oneshot_lowerhalf_s *lower,
+                                   FAR void *arg);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static struct sched_oneshot_s g_sched_oneshot;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name:  sched_oneshot_start
+ *
+ * Description:
+ *   [Re-]start the oneshot timer, applying entropy as configured
+ *
+ * Input Parameters:
+ *   None
+ *   lower - An instance of the lower half driver
+ *   arg   - The opaque argument provided when the interrupt was registered
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void sched_oneshot_start(void)
+{
+  struct timespec ts;
+#if CONFIG_CPULOAD_ONESHOT_ENTROPY > 0
+  uint32_t entropy;
+#endif
+  int32_t secs;
+  int32_t usecs;
+
+  /* Get the next delay */
+
+#if CONFIG_CPULOAD_ONESHOT_ENTROPY > 0
+  /* The one shot will be set to this interval:
+   *
+   *  CPULOAD_ONESHOT_NOMINAL - (CPULOAD_ONESHOT_ENTROPY / 2) + error
+   *    + nrand(CPULOAD_ONESHOT_ENTROPY)
+   */
+
+  usecs   = (CPULOAD_ONESHOT_NOMINAL - CPULOAD_ONESHOT_ENTROPY / 2) +
+            g_sched_oneshot.error;
+
+  /* Add the random value in the range 0..(CPULOAD_ONESHOT_ENTRY - 1) */
+
+  entropy = xorshift128(&g_sched_oneshot.prng);
+  usecs  += (int32_t)(entropy & CPULOAD_ONESHOT_ENTROPY_MASK);
+
+  DEBUGASSERT(usecs > 0); /* Check for overflow to negative or zero */
+
+  /* Make sure that the accumulated value does not exceed the maximum delay */
+
+  if (usecs > g_sched_oneshot.maxdelay)
+    {
+      tmrwarn("WARNING: Truncating\n");
+      usecs = g_sched_oneshot.maxdelay;
+    }
+
+  /* Save the new error value */
+
+  g_sched_oneshot.error = CPULOAD_ONESHOT_NOMINAL +
+                          g_sched_oneshot.error - usecs;
+#else
+  /* No entropy */
+
+  usecs = CPULOAD_ONESHOT_NOMINAL;
+#endif
+
+  /* Then re-start the oneshot timer */
+
+  secs       = usecs / 1000000;
+  usecs     -= 100000 * secs;
+
+  ts.tv_sec  = secs;
+  ts.tv_nsec = 1000 * usecs;
+
+  DEBUGVERIFY(ONESHOT_START(g_sched_oneshot.oneshot, sched_oneshot_callback,
+                            NULL, &ts));
+}
+
+/****************************************************************************
+ * Name:  sched_oneshot_callback
+ *
+ * Description:
+ *   This is the callback function that will be invoked when the oneshot
+ *   timer expires.
+ *
+ * Input Parameters:
+ *   lower - An instance of the lower half driver
+ *   arg   - The opaque argument provided when the interrupt was registered
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void sched_oneshot_callback(FAR struct oneshot_lowerhalf_s *lower,
+                                   FAR void *arg)
+{
+  /* Perform CPU load measurements */
+
+#ifdef CONFIG_HAVE_WEAKFUNCTIONS
+  if (sched_process_cpuload != NULL)
+#endif
+    {
+      sched_process_cpuload();
+    }
+#endif
+
+  /* Then restart the oneshot */
+
+  sched_oneshot_start();
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name:  sched_oneshot_extclk
+ *
+ * Description:
+ *   Configure to use a oneshot timer as described in
+ *   include/nuttx/timers/oneshot.h to provid external clocking to assess
+ *   the CPU load.
+ *
+ * Input Parameters:
+ *   lower - An instance of the oneshot timer interface as defined in
+ *           include/nuttx/timers/oneshot.h
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void sched_oneshot_extclk(FAR struct oneshot_lowerhalf_s *lower)
+{
+#if CONFIG_CPULOAD_ONESHOT_ENTROPY > 0
+  struct timespec ts;
+#endif
+
+  DEBUGASSERT(lower != NULL && lower->ops != NULL);
+  DEBUGASSERT(lower->ops->start != NULL);
+
+#if CONFIG_CPULOAD_ONESHOT_ENTROPY > 0
+  DEBUGASSERT(lower->ops->max_delay != NULL);
+
+  /* Get the maximum delay */
+
+  DEBUGVERIFY(ONESHOT_MAX_DELAY(lower, &ts));
+  if (ts.tv_sec >= 0)
+    {
+      g_sched_oneshot.maxdelay = INT32_MAX;
+    }
+  else
+    {
+      g_sched_oneshot.maxdelay = ts.tv_nsec / 1000;
+    }
+
+  tmrinfo("madelay = %ld usec\n", (long)g_sched_oneshot.maxdelay);
+  DEBUGASSERT(CPULOAD_ONESHOT_NOMINAL < g_sched_oneshot.maxdelay);
+
+  /* Seed the PRNG */
+
+  g_sched_oneshot.prng.w = 97;
+  g_sched_oneshot.prng.x = 101;
+  g_sched_oneshot.prng.y = g_sched_oneshot.prng.w << 17;
+  g_sched_oneshot.prng.z = g_sched_oneshot.prng.x << 25;
+#endif
+
+  /* Then start the oneshot */
+
+  g_sched_oneshot.oneshot = lower;
+  sched_oneshot_start();
+}
diff --git a/sched/sched/sched_cpupause.c b/sched/sched/sched_cpupause.c
new file mode 100644
index 0000000000000000000000000000000000000000..d2b14d187d7858070fccfa08ee7878debbc8513f
--- /dev/null
+++ b/sched/sched/sched_cpupause.c
@@ -0,0 +1,119 @@
+/****************************************************************************
+ * sched/sched/sched_cpupause.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "sched/sched.h"
+
+#ifdef CONFIG_SMP
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sched_cpu_pause
+ *
+ * Description:
+ *   Check if task associated with 'tcb' is running on a different CPU.  If
+ *   so then pause that CPU and return its CPU index.
+ *
+ * Input Parameters:
+ *   tcb - The TCB of the task to be conditionally paused.
+ *
+ * Returned Value:
+ *   If a CPU is pauses its non-negative CPU index is returned.  This index
+ *   may then be used to resume the CPU.  If the task is not running at all
+ *   (or if an error occurs), then a negated errno value is returned.  -ESRCH
+ *   is returned in the case where the task is not running on any CPU.
+ *
+ * Assumptions:
+ *   This function was called in a critical section.  In that case, no tasks
+ *   may started or may exit until the we leave the critical section.  This
+ *   critical section should extend until up_cpu_resume() is called in the
+ *   typical case.
+ *
+ ****************************************************************************/
+
+int sched_cpu_pause(FAR struct tcb_s *tcb)
+{
+  int cpu;
+  int ret;
+
+  DEBUGASSERT(tcb != NULL);
+
+  /* If the task is not running at all then our job is easy */
+
+  cpu = tcb->cpu;
+  if (tcb->task_state != TSTATE_TASK_RUNNING)
+    {
+      return -ESRCH;
+    }
+
+  /* Check the CPU that the task is running on */
+
+  DEBUGASSERT(cpu != this_cpu() && (unsigned int)cpu < CONFIG_SMP_NCPUS);
+  if (cpu == this_cpu())
+    {
+      /* We can't pause ourself */
+
+      return -EACCES;
+    }
+
+  /* Pause the CPU that the task is running on */
+
+  ret = up_cpu_pause(cpu);
+  if (ret < 0)
+    {
+      return ret;
+    }
+
+  /* Return the CPU that the task is running on */
+
+  return cpu;
+}
+
+#endif /* CONFIG_SMP */
diff --git a/sched/sched/sched_idletask.c b/sched/sched/sched_idletask.c
new file mode 100644
index 0000000000000000000000000000000000000000..9885aca1a7dfe13bed5e73c5ac8255fcf1bbca84
--- /dev/null
+++ b/sched/sched/sched_idletask.c
@@ -0,0 +1,95 @@
+/****************************************************************************
+ * sched/sched/sched_idletask.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+ #include 
+
+#include 
+
+#include 
+#include 
+
+#include "sched/sched.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sched_idletask
+ *
+ * Description:
+ *   Check if the caller is an IDLE thread.  For most implementations of
+ *   the SYSLOG output semaphore locking is required for mutual exclusion.
+ *   The idle threads are unable to lock semaphores because they cannot
+ *   want.  So IDLE thread output is a special case and is treated much as
+ *   we treat debug output from an interrupt handler.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   true if the calling task is and IDLE thread.
+ *
+ ****************************************************************************/
+
+bool sched_idletask(void)
+{
+  FAR struct tcb_s *rtcb = this_task();
+
+  /* If called early in the initialization sequence, the tasks lists may not
+   * have been initialized and, in that case, rtcb may be NULL.
+   */
+
+  DEBUGASSERT(rtcb != NULL || g_os_initstate < OSINIT_TASKLISTS);
+  if (rtcb != NULL)
+    {
+      /* The IDLE task TCB is distinguishable by a few things:
+       *
+       * (1) It always lies at the end of the task list,
+       * (2) It always has priority zero, and
+       * (3) It should have the TCB_FLAG_CPU_LOCKED flag set.
+       */
+
+      return (rtcb->flink == NULL);
+    }
+
+  /* We must be on the IDLE thread if we are early in initialization */
+
+  return true;
+}
diff --git a/sched/sched/sched_lock.c b/sched/sched/sched_lock.c
index 36b53775d21211ac1b588faf4b1f7a19f9bae878..5f389eed57f0ee518c0460a8da1965158a78a449 100644
--- a/sched/sched/sched_lock.c
+++ b/sched/sched/sched_lock.c
@@ -109,12 +109,12 @@
  *    least one CPU has pre-emption disabled.
  */
 
-volatile spinlock_t g_cpu_schedlock = SP_UNLOCKED;
+volatile spinlock_t g_cpu_schedlock SP_SECTION = SP_UNLOCKED;
 
 /* Used to keep track of which CPU(s) hold the IRQ lock. */
 
-volatile spinlock_t g_cpu_locksetlock;
-volatile cpu_set_t g_cpu_lockset;
+volatile spinlock_t g_cpu_locksetlock SP_SECTION;
+volatile cpu_set_t g_cpu_lockset SP_SECTION;
 
 #endif /* CONFIG_SMP */
 
diff --git a/sched/sched/sched_mergepending.c b/sched/sched/sched_mergepending.c
index 07a554ff068d4616e61df96616dbf48f737c8411..15e87ce99c67af4ab0951506289a88ca4b7bcb04 100644
--- a/sched/sched/sched_mergepending.c
+++ b/sched/sched/sched_mergepending.c
@@ -48,6 +48,7 @@
 #  include 
 #endif
 
+#include "irq/irq.h"
 #include "sched/sched.h"
 
 /****************************************************************************
@@ -196,15 +197,16 @@ bool sched_mergepending(void)
   FAR struct tcb_s *tcb;
   bool ret = false;
   int cpu;
+  int me;
 
   /* Remove and process every TCB in the g_pendingtasks list.
    *
-   * This function is only called in the context where locking is known to
-   * disabled on one CPU.  However, we must do nothing if pre-emption is
-   * still locked because of actions of other CPUs.
+   * Do nothing if (1) pre-emption is still disabled (by any CPU), or (2) if
+   * some CPU other than this one is in a critical section.
    */
 
-  if (!spin_islocked(&g_cpu_schedlock))
+  me = this_cpu();
+  if (!spin_islocked(&g_cpu_schedlock) && !irq_cpu_locked(me))
     {
       /* Find the CPU that is executing the lowest priority task */
 
@@ -243,7 +245,7 @@ bool sched_mergepending(void)
            * Check if that happened.
            */
 
-          if (spin_islocked(&g_cpu_schedlock))
+          if (spin_islocked(&g_cpu_schedlock) || irq_cpu_locked(me))
             {
               /* Yes.. then we may have incorrectly placed some TCBs in the
                * g_readytorun list (unlikely, but possible).  We will have to
@@ -271,11 +273,11 @@ bool sched_mergepending(void)
               return ret;
             }
 
-          cpu = sched_cpu_select(ALL_CPUS /* ptcb->affinity */);
+          cpu  = sched_cpu_select(ALL_CPUS /* ptcb->affinity */);
           rtcb = current_task(cpu);
         }
 
-      /* No more pending tasks can be made running.  Move any reamaining
+      /* No more pending tasks can be made running.  Move any remaining
        * tasks in the pending task list to the ready-to-run task list.
        */
 
diff --git a/sched/sched/sched_note.c b/sched/sched/sched_note.c
index 4dc1bd262ecbaac797eb0cc1c8617b2cb59915e0..bdc308fa91dc20af2501e05264aceb0fb7edd711 100644
--- a/sched/sched/sched_note.c
+++ b/sched/sched/sched_note.c
@@ -46,8 +46,11 @@
 
 #include 
 #include 
+#include 
 #include 
 
+#include "sched/sched.h"
+
 #ifdef CONFIG_SCHED_INSTRUMENTATION_BUFFER
 
 /****************************************************************************
@@ -60,8 +63,8 @@
 
 struct note_info_s
 {
-  unsigned int ni_head;
-  unsigned int ni_tail;
+  volatile unsigned int ni_head;
+  volatile unsigned int ni_tail;
   uint8_t ni_buffer[CONFIG_SCHED_NOTE_BUFSIZE];
 };
 
@@ -79,6 +82,12 @@ struct note_startalloc_s
 #  define SIZEOF_NOTE_START(n) (sizeof(struct note_start_s))
 #endif
 
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static void note_add(FAR const uint8_t *note, uint8_t notelen);
+
 /****************************************************************************
  * Private Data
  ****************************************************************************/
@@ -122,8 +131,10 @@ static inline unsigned int note_next(unsigned int ndx, unsigned int offset)
  *   Fill in some of the common fields in the note structure.
  *
  * Input Parameters:
- *   tcb  - The TCB containing the information
- *   note - The common note structure to use
+ *   tcb    - The TCB containing the information
+ *   note   - The common note structure to use
+ *   length - The total lengthof the note structure
+ *   type   - The type of the note
  *
  * Returned Value:
  *   None
@@ -154,6 +165,39 @@ static void note_common(FAR struct tcb_s *tcb, FAR struct note_common_s *note,
   note->nc_systime[3] = (uint8_t)((systime >> 24) & 0xff);
 }
 
+/****************************************************************************
+ * Name: note_spincommon
+ *
+ * Description:
+ *   Common logic for NOTE_SPINLOCK, NOTE_SPINLOCKED, and NOTE_SPINUNLOCK
+ *
+ * Input Parameters:
+ *   tcb  - The TCB containing the information
+ *   note - The common note structure to use
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+void note_spincommon(FAR struct tcb_s *tcb, FAR volatile spinlock_t *spinlock,
+                     int type)
+{
+  struct note_spinlock_s note;
+
+  /* Format the note */
+
+  note_common(tcb, ¬e.nsp_cmn, sizeof(struct note_spinlock_s), type);
+  note.nsp_spinlock = (FAR void *)spinlock;
+  note.nsp_value    = (uint8_t)*spinlock;
+
+  /* Add the note to circular buffer */
+
+  note_add((FAR const uint8_t *)¬e, sizeof(struct note_spinlock_s));
+}
+#endif
+
 /****************************************************************************
  * Name: note_length
  *
@@ -244,6 +288,33 @@ static void note_add(FAR const uint8_t *note, uint8_t notelen)
   unsigned int head;
   unsigned int next;
 
+#ifdef CONFIG_SMP
+  /* Ignore notes that are not in the set of monitored CPUs */
+
+  if ((CONFIG_SCHED_INSTRUMENTATION_CPUSET & (1 << this_cpu())) == 0)
+    {
+      /* Not in the set of monitored CPUs.  Do not log the note. */
+
+      return;
+    }
+#endif
+
+  /* REVISIT: In the single CPU case, the following should be safe because
+   * the logic is always called within a critical section, but in the SMP
+   * case we have protection.  One option would be to precalculate and
+   * advancing the new head entry before writing the data into the buffer.
+   * That will eliminate fatal race conditions (although could result in
+   * single notes being corrupted harmlessly).
+   *
+   * But there is a complexity: Advancing the head pointer where the note
+   * buffer is almost full could advance the head to wrap beyond the tail
+   * leaving the buffer in a bad state.  A solution to this would be to pre-
+   * remove entries at the tail of the buffer as necessary to make certain
+   * that there will be space for the new note at the beginning of the
+   * buffer.  I am less certain that this can be done safely in the SMP
+   * case.
+   */
+
   /* Get the index to the head of the circular buffer */
 
   DEBUGASSERT(note != NULL && notelen < CONFIG_SCHED_NOTE_BUFSIZE);
@@ -369,6 +440,89 @@ void sched_note_resume(FAR struct tcb_s *tcb)
   note_add((FAR const uint8_t *)¬e, sizeof(struct note_resume_s));
 }
 
+#ifdef CONFIG_SMP
+void sched_note_cpu_start(FAR struct tcb_s *tcb, int cpu)
+{
+  struct note_cpu_start_s note;
+
+  /* Format the note */
+
+  note_common(tcb, ¬e.ncs_cmn, sizeof(struct note_cpu_start_s), NOTE_CPU_START);
+  note.ncs_target = (uint8_t)cpu;
+
+  /* Add the note to circular buffer */
+
+  note_add((FAR const uint8_t *)¬e, sizeof(struct note_cpu_start_s));
+}
+
+void sched_note_cpu_started(FAR struct tcb_s *tcb)
+{
+  struct note_cpu_started_s note;
+
+  /* Format the note */
+
+  note_common(tcb, ¬e.ncs_cmn, sizeof(struct note_cpu_started_s), NOTE_CPU_STARTED);
+
+  /* Add the note to circular buffer */
+
+  note_add((FAR const uint8_t *)¬e, sizeof(struct note_cpu_started_s));
+}
+
+void sched_note_cpu_pause(FAR struct tcb_s *tcb, int cpu)
+{
+  struct note_cpu_pause_s note;
+
+  /* Format the note */
+
+  note_common(tcb, ¬e.ncp_cmn, sizeof(struct note_cpu_pause_s), NOTE_CPU_PAUSE);
+  note.ncp_target = (uint8_t)cpu;
+
+  /* Add the note to circular buffer */
+
+  note_add((FAR const uint8_t *)¬e, sizeof(struct note_cpu_pause_s));
+}
+
+void sched_note_cpu_paused(FAR struct tcb_s *tcb)
+{
+  struct note_cpu_paused_s note;
+
+  /* Format the note */
+
+  note_common(tcb, ¬e.ncp_cmn, sizeof(struct note_cpu_paused_s), NOTE_CPU_PAUSED);
+
+  /* Add the note to circular buffer */
+
+  note_add((FAR const uint8_t *)¬e, sizeof(struct note_cpu_paused_s));
+}
+
+void sched_note_cpu_resume(FAR struct tcb_s *tcb, int cpu)
+{
+  struct note_cpu_resume_s note;
+
+  /* Format the note */
+
+  note_common(tcb, ¬e.ncr_cmn, sizeof(struct note_cpu_resume_s), NOTE_CPU_RESUME);
+  note.ncr_target = (uint8_t)cpu;
+
+  /* Add the note to circular buffer */
+
+  note_add((FAR const uint8_t *)¬e, sizeof(struct note_cpu_resume_s));
+}
+
+void sched_note_cpu_resumed(FAR struct tcb_s *tcb)
+{
+  struct note_cpu_resumed_s note;
+
+  /* Format the note */
+
+  note_common(tcb, ¬e.ncr_cmn, sizeof(struct note_cpu_resumed_s), NOTE_CPU_RESUMED);
+
+  /* Add the note to circular buffer */
+
+  note_add((FAR const uint8_t *)¬e, sizeof(struct note_cpu_resumed_s));
+}
+#endif
+
 #ifdef CONFIG_SCHED_INSTRUMENTATION_PREEMPTION
 void sched_note_premption(FAR struct tcb_s *tcb, bool locked)
 {
@@ -407,6 +561,27 @@ void sched_note_csection(FAR struct tcb_s *tcb, bool enter)
 }
 #endif
 
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+void sched_note_spinlock(FAR struct tcb_s *tcb, FAR volatile void *spinlock)
+{
+  note_spincommon(tcb, spinlock, NOTE_SPINLOCK_LOCK);
+}
+
+void sched_note_spinlocked(FAR struct tcb_s *tcb, FAR volatile void *spinlock)
+{
+  note_spincommon(tcb, spinlock, NOTE_SPINLOCK_LOCKED);
+}
+
+void sched_note_spinunlock(FAR struct tcb_s *tcb, FAR volatile void *spinlock)
+{
+  note_spincommon(tcb, spinlock, NOTE_SPINLOCK_UNLOCK);
+}
+void sched_note_spinabort(FAR struct tcb_s *tcb, FAR volatile void *spinlock)
+{
+  note_spincommon(tcb, spinlock, NOTE_SPINLOCK_ABORT);
+}
+#endif
+
 /****************************************************************************
  * Name: sched_note_get
  *
@@ -425,6 +600,7 @@ void sched_note_csection(FAR struct tcb_s *tcb, bool enter)
  *
  ****************************************************************************/
 
+#ifdef CONFIG_SCHED_NOTE_GET
 ssize_t sched_note_get(FAR uint8_t *buffer, size_t buflen)
 {
   FAR struct note_common_s *note;
@@ -492,6 +668,7 @@ errout_with_csection:
   leave_critical_section(flags);
   return notelen;
 }
+#endif
 
 /****************************************************************************
  * Name: sched_note_size
@@ -508,6 +685,7 @@ errout_with_csection:
  *
  ****************************************************************************/
 
+#ifdef CONFIG_SCHED_NOTE_GET
 ssize_t sched_note_size(void)
 {
   FAR struct note_common_s *note;
@@ -542,5 +720,6 @@ errout_with_csection:
   leave_critical_section(flags);
   return notelen;
 }
+#endif
 
 #endif /* CONFIG_SCHED_INSTRUMENTATION_BUFFER */
diff --git a/sched/sched/sched_processtimer.c b/sched/sched/sched_processtimer.c
index 33c3f583ac87ea13e1efde53dc7c9a95d06003b5..d928d40649c46650fc4860bb67f66546cb41a8f7 100644
--- a/sched/sched/sched_processtimer.c
+++ b/sched/sched/sched_processtimer.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * sched/sched/sched_processtimer.c
  *
- *   Copyright (C) 2007, 2009, 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2009, 2014-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -50,37 +50,29 @@
 #include "wdog/wdog.h"
 #include "clock/clock.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-#ifndef CONFIG_SCHED_CPULOAD_TIMECONSTANT
-#  define CONFIG_SCHED_CPULOAD_TIMECONSTANT 2
-#endif
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name:  sched_process_scheduler
+ * Name:  sched_cpu_scheduler
  *
  * Description:
  *   Check for operations specific to scheduling policy of the currently
- *   active task.
+ *   active task on one CPU.
  *
- * Inputs:
- *   None
+ * Input Parameters:
+ *   cpu - The CPU that we are performing the scheduler operations on.
  *
- * Return Value:
+ * Returned Value:
  *   None
  *
  ****************************************************************************/
 
 #if CONFIG_RR_INTERVAL > 0 || defined(CONFIG_SCHED_SPORADIC)
-static inline void sched_process_scheduler(void)
+static inline void sched_cpu_scheduler(int cpu)
 {
-  FAR struct tcb_s *rtcb  = this_task();
+  FAR struct tcb_s *rtcb = current_task(cpu);
 
 #if CONFIG_RR_INTERVAL > 0
   /* Check if the currently executing task uses round robin scheduling. */
@@ -108,6 +100,55 @@ static inline void sched_process_scheduler(void)
     }
 #endif
 }
+#endif
+
+/****************************************************************************
+ * Name:  sched_process_scheduler
+ *
+ * Description:
+ *   Check for operations specific to scheduling policy of the currently
+ *   active task on all configured CPUs.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#if CONFIG_RR_INTERVAL > 0 || defined(CONFIG_SCHED_SPORADIC)
+static inline void sched_process_scheduler(void)
+{
+#ifdef CONFIG_SMP
+  irqstate_t flags;
+  int i;
+
+  /* If we are running on a single CPU architecture, then we know interrupts
+   * a disabled an there is no need to explicitly call
+   * enter_critical_section().  However, in the SMP case,
+   * enter_critical_section() does much more than just disable interrupts on
+   * the local CPU; it also manages spinlocks to assure the stability of the
+   * TCB that we are manipulating.
+   */
+
+  flags = enter_critical_section();
+
+  /* Perform scheduler operations on all CPUs */
+
+  for (i = 0; i < CONFIG_SMP_NCPUS; i++)
+    {
+      sched_cpu_scheduler(i);
+    }
+
+  leave_critical_section(flags);
+
+#else
+  /* Perform scheduler operations on the single CPUs */
+
+  sched_cpu_scheduler(0);
+#endif
+}
 #else
 #  define sched_process_scheduler()
 #endif
@@ -134,16 +175,22 @@ static inline void sched_process_scheduler(void)
  *   function periodically -- the calling interval must be
  *   USEC_PER_TICK
  *
- * Inputs:
+ * Input Parameters:
  *   None
  *
- * Return Value:
+ * Returned Value:
  *   None
  *
  ****************************************************************************/
 
 void sched_process_timer(void)
 {
+#ifdef CONFIG_CLOCK_TIMEKEEPING
+  /* Process wall time */
+
+  clock_update_wall_time();
+#endif
+
   /* Increment the system time (if in the link) */
 
 #ifdef CONFIG_HAVE_WEAKFUNCTIONS
diff --git a/sched/sched/sched_removereadytorun.c b/sched/sched/sched_removereadytorun.c
index 354bbc20e499461b08283e2d41614eb472c15fc9..2f5ec9295a5c389acdefc739505a3e8857e60ce0 100644
--- a/sched/sched/sched_removereadytorun.c
+++ b/sched/sched/sched_removereadytorun.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * shced/sched_removereadytorun.c
+ * sched/sched_removereadytorun.c
  *
- *   Copyright (C) 2007-2009, 2012, 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2012, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -145,7 +145,7 @@ bool sched_removereadytorun(FAR struct tcb_s *rtcb)
   cpu      = rtcb->cpu;
   tasklist = TLIST_HEAD(rtcb->task_state, cpu);
 
-  /* Check if the TCB to be removed is at the head of a ready to run list.
+  /* Check if the TCB to be removed is at the head of a ready-to-run list.
    * For the case of SMP, there are two lists involved:  (1) the
    * g_readytorun list that holds non-running tasks that have not been
    * assigned to a CPU, and (2) and the g_assignedtasks[] lists which hold
@@ -154,15 +154,18 @@ bool sched_removereadytorun(FAR struct tcb_s *rtcb)
    * only only removing the head of that list can result in a context
    * switch.
    *
-   * The tasklist RUNNABLE attribute will inform us if the list holds the
-   * currently executing and task and, hence, if a context switch could
-   * occur.
+   * rtcb->blink == NULL will tell us if the TCB is at the head of the
+   * ready-to-run list and, hence, a candidate for the new running task.
+   *
+   * If so, then the tasklist RUNNABLE attribute will inform us if the list
+   * holds the currently executing task and, hence, if a context switch
+   * should occur.
    */
 
   if (rtcb->blink == NULL && TLIST_ISRUNNABLE(rtcb->task_state))
     {
       FAR struct tcb_s *nxttcb;
-      FAR struct tcb_s *rtrtcb;
+      FAR struct tcb_s *rtrtcb = NULL;
       int me;
 
       /* There must always be at least one task in the list (the IDLE task)
@@ -195,17 +198,27 @@ bool sched_removereadytorun(FAR struct tcb_s *rtcb)
        * g_readytorun list.  We can only select a task from that list if
        * the affinity mask includes the current CPU.
        *
-       * REVISIT: What should we do, if anything, if pre-emption is locked
-       * by the another CPU?  Should just used nxttcb?  Should we select
-       * from the pending task list instead of the g_readytorun list?
+       * If pre-emption is locked or another CPU is in a critical section,
+       * then use the 'nxttcb' which will probably be the IDLE thread.
+       * REVISIT: What if it is not the IDLE thread?
        */
 
-      for (rtrtcb = (FAR struct tcb_s *)g_readytorun.head;
-           rtrtcb != NULL && !CPU_ISSET(cpu, &rtrtcb->affinity);
-           rtrtcb = (FAR struct tcb_s *)rtrtcb->flink);
+      if (!spin_islocked(&g_cpu_schedlock) && !irq_cpu_locked(me))
+        {
+          /* Search for the highest priority task that can run on this
+           * CPU.
+           */
+
+          for (rtrtcb = (FAR struct tcb_s *)g_readytorun.head;
+               rtrtcb != NULL && !CPU_ISSET(cpu, &rtrtcb->affinity);
+               rtrtcb = (FAR struct tcb_s *)rtrtcb->flink);
+        }
 
       /* Did we find a task in the g_readytorun list?  Which task should
-       * we use? We decide strictly by the priority of the two tasks.
+       * we use?  We decide strictly by the priority of the two tasks:
+       * Either (1) the task currently at the head of the g_assignedtasks[cpu]
+       * list (nexttcb) or (2) the highest priority task from the
+       * g_readytorun list with matching affinity (rtrtcb).
        */
 
       if (rtrtcb != NULL && rtrtcb->sched_priority >= nxttcb->sched_priority)
@@ -247,23 +260,46 @@ bool sched_removereadytorun(FAR struct tcb_s *rtcb)
                       &g_cpu_schedlock);
         }
 
-      /* Interrupts may be disabled after the switch.  If irqcount is greater
-       * than zero, then this task/this CPU holds the IRQ lock
+      /* Adjust global IRQ controls.  If irqcount is greater than zero,
+       * then this task/this CPU holds the IRQ lock
        */
 
       if (nxttcb->irqcount > 0)
         {
-          /* Yes... make sure that scheduling logic knows about this */
+          /* Yes... make sure that scheduling logic on other CPUs knows
+           * that we hold the IRQ lock.
+           */
 
           spin_setbit(&g_cpu_irqset, cpu, &g_cpu_irqsetlock,
                       &g_cpu_irqlock);
         }
-      else
+
+      /* No.. This CPU will be relinquishing the lock.  But this works
+       * differently if we are performing a context switch from an
+       * interrupt handler and the interrupt handler has established
+       * a critical section.  We can detect this case when
+       * g_cpu_nestcount[me] > 0.
+       */
+
+      else if (g_cpu_nestcount[me] <= 0)
         {
-          /* No.. we may need to perform release our hold on the irq state. */
+          /* Release our hold on the IRQ lock. */
 
           spin_clrbit(&g_cpu_irqset, cpu, &g_cpu_irqsetlock,
-                      &g_cpu_irqlock);
+                     &g_cpu_irqlock);
+        }
+
+      /* Sanity check.  g_cpu_netcount should be greater than zero
+       * only while we are within the critical section and within
+       * an interrupt handler.  If we are not in an interrupt handler
+       * then there is a problem; perhaps some logic previously
+       * called enter_critical_section() with no matching call to
+       * leave_critical_section(), leaving the non-zero count.
+       */
+
+      else
+        {
+          DEBUGASSERT(up_interrupt_context());
         }
 
       nxttcb->task_state = TSTATE_TASK_RUNNING;
diff --git a/sched/sched/sched_roundrobin.c b/sched/sched/sched_roundrobin.c
index bf856004d67024d5882e22e28af0cc83b6916ed5..9aa5a6b8edf30b74b0374e5801337f43b44fe76c 100644
--- a/sched/sched/sched_roundrobin.c
+++ b/sched/sched/sched_roundrobin.c
@@ -105,23 +105,20 @@ uint32_t sched_roundrobin_process(FAR struct tcb_s *tcb, uint32_t ticks,
   /* How much can we decrement the timeslice delay?  If 'ticks' is greater
    * than the timeslice value, then we ignore any excess amount.
    *
-   * 'ticks' should never be greater than the remaining timeslice.  We try
-   * to handle that gracefully but it would be an error in the scheduling
-   * if there ever were the case.
+   * 'ticks' should not be greater than the remaining timeslice.  But that
+   * event seems to be possible, perhaps in cases where pre-emption has been
+   * disabled or the noswitches flag is set.  This might cause jitter of a
+   * few ticks in the slicing because the excess amount is not handled.
    */
 
-  DEBUGASSERT(tcb != NULL && ticks <= tcb->timeslice);
+  DEBUGASSERT(tcb != NULL);
   decr = MIN(tcb->timeslice, ticks);
 
   /* Decrement the timeslice counter */
 
   tcb->timeslice -= decr;
 
-  /* Did decrementing the timeslice counter cause the timeslice to expire?
-   *
-   * If the task has pre-emption disabled. Then we will let the timeslice
-   * count go negative as a indication of this situation.
-   */
+  /* Did decrementing the timeslice counter cause the timeslice to expire? */
 
   ret = tcb->timeslice;
   if (tcb->timeslice <= 0 && !sched_islocked(tcb))
diff --git a/sched/sched/sched_setpriority.c b/sched/sched/sched_setpriority.c
index 9e2c9384aa9c434c7f067a15687d8a9b70f4c386..bf273e1e5b2e0af002ddfd97c38cc305cc72d1be 100644
--- a/sched/sched/sched_setpriority.c
+++ b/sched/sched/sched_setpriority.c
@@ -46,12 +46,71 @@
 #include 
 #include 
 
+#include "irq/irq.h"
 #include "sched/sched.h"
 
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
 
+/****************************************************************************
+ * Name: sched_nexttcb
+ *
+ * Description:
+ *   Get the next highest priority ready-to-run task.
+ *
+ * Inputs:
+ *   tcb - the TCB of task to reprioritize.
+ *
+ * Return Value:
+ *   TCB of the next highest priority ready-to-run task.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SMP
+static FAR struct tcb_s *sched_nexttcb(FAR struct tcb_s *tcb)
+{
+  FAR struct tcb_s *nxttcb = (FAR struct tcb_s *)tcb->flink;
+  FAR struct tcb_s *rtrtcb;
+  int cpu = this_cpu();
+
+  /* Which task should run next?  It will be either the next tcb in the
+   * assigned task list (nxttcb) or a TCB in the g_readytorun list.  We can
+   * only select a task from that list if the affinity mask includes the
+   * current CPU.
+   *
+   * If pre-emption is locked or another CPU is in a critical section,
+   * then use the 'nxttcb' which will probably be the IDLE thread.
+   */
+
+  if (!spin_islocked(&g_cpu_schedlock) && !irq_cpu_locked(cpu))
+    {
+      /* Search for the highest priority task that can run on this CPU. */
+
+      for (rtrtcb = (FAR struct tcb_s *)g_readytorun.head;
+           rtrtcb != NULL && !CPU_ISSET(cpu, &rtrtcb->affinity);
+           rtrtcb = (FAR struct tcb_s *)rtrtcb->flink);
+
+      /* Return the TCB from the readyt-to-run list if it is the next
+       * highest priority task.
+       */
+
+      if (rtrtcb != NULL &&
+          rtrtcb->sched_priority >= nxttcb->sched_priority)
+        {
+          return rtrtcb;
+        }
+    }
+
+  /* Otherwise, return the next TCB in the g_assignedtasks[] list...
+   * probably the TCB of the IDLE thread.
+   * REVISIT:  What if it is not the IDLE thread?
+   */
+
+  return nxttcb;
+}
+#endif
+
 /****************************************************************************
  * Name:  sched_running_setpriority
  *
@@ -77,12 +136,24 @@
 static inline void sched_running_setpriority(FAR struct tcb_s *tcb,
                                              int sched_priority)
 {
+  FAR struct tcb_s *nxttcb;
+
+  /* Get the TCB of the next highest priority, ready to run task */
+
+#ifdef CONFIG_SMP
+  nxttcb = sched_nexttcb(tcb);
+#else
+  nxttcb = (FAR struct tcb_s *)tcb->flink;
+#endif
+
+  DEBUGASSERT(nxttcb != NULL);
+
   /* A context switch will occur if the new priority of the running
    * task becomes less than OR EQUAL TO the next highest priority
    * ready to run task.
    */
 
-  if (sched_priority <= tcb->flink->sched_priority)
+  if (sched_priority <= nxttcb->sched_priority)
     {
       /* A context switch will occur. */
 
diff --git a/sched/sched/sched_sporadic.c b/sched/sched/sched_sporadic.c
index d31837d3f1af7e8f8d9f6288e4a5ba9349b94bae..086e27d44f69013c5a27ea58bc98112c08ce52fd 100644
--- a/sched/sched/sched_sporadic.c
+++ b/sched/sched/sched_sporadic.c
@@ -150,7 +150,7 @@ static int sporadic_set_lowpriority(FAR struct tcb_s *tcb)
   if (ret < 0)
     {
       int errcode = get_errno();
-      slldbg("ERROR: sched_reprioritize failed: %d\n", errcode);
+      serr("ERROR: sched_reprioritize failed: %d\n", errcode);
       return -errcode;
     }
 
@@ -218,7 +218,7 @@ static int sporadic_set_hipriority(FAR struct tcb_s *tcb)
   if (ret < 0)
     {
       int errcode = get_errno();
-      slldbg("ERROR: sched_reprioritize failed: %d\n", errcode);
+      serr("ERROR: sched_reprioritize failed: %d\n", errcode);
       return -errcode;
     }
 
@@ -771,7 +771,7 @@ int sched_sporadic_initialize(FAR struct tcb_s *tcb)
   sporadic = (FAR struct sporadic_s *)kmm_zalloc(sizeof(struct sporadic_s));
   if (sporadic == NULL)
     {
-      slldbg("ERROR: Failed to allocate sporadic data structure\n");
+      serr("ERROR: Failed to allocate sporadic data structure\n");
       return -ENOMEM;
     }
 
@@ -1078,8 +1078,8 @@ int sched_sporadic_resume(FAR struct tcb_s *tcb)
                * failure from the standpoint of higher level logic.
                */
 
-              slldbg("Failed to allocate timer, nrepls=%d\n",
-                     sporadic->nrepls);
+              serr("ERROR: Failed to allocate timer, nrepls=%d\n",
+                   sporadic->nrepls);
             }
         }
     }
diff --git a/sched/sched/sched_timerexpiration.c b/sched/sched/sched_timerexpiration.c
index ee340996870ba42e1ba0c2b2250605ffc266be6f..174ff1f7a70a39813eda036b4431533fad04cd2b 100644
--- a/sched/sched/sched_timerexpiration.c
+++ b/sched/sched/sched_timerexpiration.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * sched/sched/sched_timerexpiration.c
  *
- *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -53,6 +53,10 @@
 #include "wdog/wdog.h"
 #include "clock/clock.h"
 
+#ifdef CONFIG_CLOCK_TIMEKEEPING
+# include "clock/clock_timekeeping.h"
+#endif
+
 #ifdef CONFIG_SCHED_TICKLESS
 
 /****************************************************************************
@@ -108,9 +112,23 @@
 uint32_t g_oneshot_maxticks = UINT32_MAX;
 #endif
 
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+#if CONFIG_RR_INTERVAL > 0 || defined(CONFIG_SCHED_SPORADIC)
+static uint32_t sched_cpu_scheduler(int cpu, uint32_t ticks, bool noswitches);
+#endif
+#if CONFIG_RR_INTERVAL > 0 || defined(CONFIG_SCHED_SPORADIC)
+static uint32_t sched_process_scheduler(uint32_t ticks, bool noswitches);
+#endif
+static unsigned int sched_timer_process(unsigned int ticks, bool noswitches);
+static void sched_timer_start(unsigned int ticks);
+
 /****************************************************************************
  * Private Data
  ****************************************************************************/
+
 /* This is the duration of the currently active timer or, when
  * sched_timer_expiration() is called, the duration of interval timer
  * that just expired.  The value zero means that no timer was active.
@@ -138,13 +156,14 @@ static struct timespec g_stop_time;
  ****************************************************************************/
 
 /****************************************************************************
- * Name:  sched_process_scheduler
+ * Name:  sched_cpu_scheduler
  *
  * Description:
  *   Check for operations specific to scheduling policy of the currently
- *   active task.
+ *   active task on a single CPU.
  *
  * Inputs:
+ *   cpu - The CPU that we are performing the scheduler operations on.
  *   ticks - The number of ticks that have elapsed on the interval timer.
  *   noswitches - True: Can't do context switches now.
  *
@@ -162,10 +181,10 @@ static struct timespec g_stop_time;
  ****************************************************************************/
 
 #if CONFIG_RR_INTERVAL > 0 || defined(CONFIG_SCHED_SPORADIC)
-static inline uint32_t sched_process_scheduler(uint32_t ticks, bool noswitches)
+static uint32_t sched_cpu_scheduler(int cpu, uint32_t ticks, bool noswitches)
 {
-  FAR struct tcb_s *rtcb  = this_task();
-  FAR struct tcb_s *ntcb  = this_task();
+  FAR struct tcb_s *rtcb  = current_task(cpu);
+  FAR struct tcb_s *ntcb  = current_task(cpu);
   uint32_t ret = 0;
 
 #if CONFIG_RR_INTERVAL > 0
@@ -212,7 +231,7 @@ static inline uint32_t sched_process_scheduler(uint32_t ticks, bool noswitches)
    * the new task at the head of the ready to run list.
    */
 
-  ntcb = this_task();
+  ntcb = current_task(cpu);
 
   /* Check if the new task at the head of the ready-to-run has changed. */
 
@@ -236,6 +255,71 @@ static inline uint32_t sched_process_scheduler(uint32_t ticks, bool noswitches)
 
   return ret;
 }
+#endif
+
+/****************************************************************************
+ * Name: sched_process_scheduler
+ *
+ * Description:
+ *   Check for operations specific to scheduling policy of the currently
+ *   active task on a single CPU.
+ *
+ * Inputs:
+ *   ticks - The number of ticks that have elapsed on the interval timer.
+ *   noswitches - True: Can't do context switches now.
+ *
+ * Return Value:
+ *   The number if ticks remaining until the next time slice expires.
+ *   Zero is returned if there is no time slicing (i.e., the task at the
+ *   head of the ready-to-run list does not support round robin
+ *   scheduling).
+ *
+ *   The value one may returned under certain circumstances that probably
+ *   can't happen.  The value one is the minimal timer setup and it means
+ *   that a context switch is needed now, but cannot be performed because
+ *   noswitches == true.
+ *
+ ****************************************************************************/
+
+#if CONFIG_RR_INTERVAL > 0 || defined(CONFIG_SCHED_SPORADIC)
+static uint32_t sched_process_scheduler(uint32_t ticks, bool noswitches)
+{
+#ifdef CONFIG_SMP
+  uint32_t minslice = UINT32_MAX;
+  uint32_t timeslice;
+  irqstate_t flags;
+  int i;
+
+  /* If we are running on a single CPU architecture, then we know interrupts
+   * a disabled an there is no need to explicitly call
+   * enter_critical_section().  However, in the SMP case,
+   * enter_critical_section() does much more than just disable interrupts on
+   * the local CPU; it also manages spinlocks to assure the stability of the
+   * TCB that we are manipulating.
+   */
+
+  flags = enter_critical_section();
+
+  /* Perform scheduler operations on all CPUs */
+
+  for (i = 0; i < CONFIG_SMP_NCPUS; i++)
+    {
+      timeslice = sched_cpu_scheduler(i, ticks, noswitches);
+      if (timeslice > 0 && timeslice < minslice)
+        {
+          minslice = timeslice;
+        }
+    }
+
+  leave_critical_section(flags);
+  return minslice < UINT32_MAX ? minslice : 0;
+
+#else
+  /* Perform scheduler operations on the single CPUs */
+
+  return sched_cpu_scheduler(0, ticks, noswitches);
+#endif
+}
 #else
 #  define sched_process_scheduler(t,n) (0)
 #endif
@@ -262,6 +346,12 @@ static unsigned int sched_timer_process(unsigned int ticks, bool noswitches)
   unsigned int rettime  = 0;
   unsigned int tmp;
 
+#ifdef CONFIG_CLOCK_TIMEKEEPING
+  /* Process wall time */
+
+  clock_update_wall_time();
+#endif
+
   /* Process watchdogs */
 
   tmp = wd_timer(ticks);
@@ -362,7 +452,7 @@ static void sched_timer_start(unsigned int ticks)
 
       if (ret < 0)
         {
-          slldbg("ERROR: up_timer_start/up_alarm_start failed: %d\n");
+          serr("ERROR: up_timer_start/up_alarm_start failed: %d\n");
           UNUSED(ret);
         }
     }
@@ -646,4 +736,5 @@ void sched_timer_reassess(void)
   nexttime = sched_timer_cancel();
   sched_timer_start(nexttime);
 }
+
 #endif /* CONFIG_SCHED_TICKLESS */
diff --git a/sched/sched/sched_unlock.c b/sched/sched/sched_unlock.c
index 9a6ff5a924857fc7ad46c2b58de69cc92fe81c20..091ad7b1cb09b98af3e8271d71f4f597e9ba3834 100644
--- a/sched/sched/sched_unlock.c
+++ b/sched/sched/sched_unlock.c
@@ -44,6 +44,7 @@
 #include 
 #include 
 
+#include "irq/irq.h"
 #include "sched/sched.h"
 
 /****************************************************************************
@@ -66,6 +67,14 @@
 int sched_unlock(void)
 {
   FAR struct tcb_s *rtcb = this_task();
+#ifdef CONFIG_SMP
+  int cpu;
+
+  cpu  = this_cpu();
+  rtcb = current_task(cpu);
+#else
+  rtcb = this_task();
+#endif
 
   /* Check for some special cases:  (1) rtcb may be NULL only during
    * early boot-up phases, and (2) sched_unlock() should have no
@@ -106,23 +115,47 @@ int sched_unlock(void)
            */
 
           DEBUGASSERT(g_cpu_schedlock == SP_LOCKED &&
-                     (g_cpu_lockset & (1 << this_cpu())) != 0);
+                     (g_cpu_lockset & (1 << cpu)) != 0);
 
-          spin_clrbit(&g_cpu_lockset, this_cpu(), &g_cpu_locksetlock,
+          spin_clrbit(&g_cpu_lockset, cpu, &g_cpu_locksetlock,
                       &g_cpu_schedlock);
 #endif
 
           /* Release any ready-to-run tasks that have collected in
-           * g_pendingtasks.  In the SMP case, the scheduler remains
-           * locked if interrupts are disabled.
+           * g_pendingtasks.
            *
            * NOTE: This operation has a very high likelihood of causing
            * this task to be switched out!
            */
 
 #ifdef CONFIG_SMP
-          if (g_pendingtasks.head != NULL && rtcb->irqcount <= 0)
+          /* In the SMP case, the tasks remains pend(1) if we are
+           * in a critical section, i.e., g_cpu_irqlock is locked by other
+           * CPUs, or (2) other CPUs still have pre-emption disabled, i.e.,
+           * g_cpu_schedlock is locked.  In those cases, the release of the
+           * pending tasks must be deferred until those conditions are met.
+           *
+           * There are certain conditions that we must avoid by preventing
+           * releasing the pending tasks while within the critical section
+           * of other CPUs.  This logic does that and there is matching
+           * logic in sched_addreadytorun to avoid starting new tasks within
+           * the critical section (unless the CPU is the holder of the lock).
+           *
+           * REVISIT: If this CPU is only one that holds the IRQ lock, then
+           * we should go ahead and release the pending tasks.  See the logic
+           * leave_critical_section():  It will call up_release_pending()
+           * BEFORE it clears IRQ lock.
+           */
+
+          if (!spin_islocked(&g_cpu_schedlock) && !irq_cpu_locked(cpu) &&
+              g_pendingtasks.head != NULL)
 #else
+          /* In the single CPU case, decrementing irqcount to zero is
+           * sufficient to release the pending tasks.  Further, in that
+           * configuration, critical sections and pre-emption can operate
+           * fully independently.
+           */
+
           if (g_pendingtasks.head != NULL)
 #endif
             {
diff --git a/sched/sched/sched_wait.c b/sched/sched/sched_wait.c
index d1547e07cfa75c0784e1ff29f4fe4667bdb197e2..c558de50bf6ad341b9d92e111a3542e4081bf50d 100644
--- a/sched/sched/sched_wait.c
+++ b/sched/sched/sched_wait.c
@@ -80,8 +80,11 @@
 
 pid_t wait(FAR int *stat_loc)
 {
+  /* wait() is a cancellation point, but nothings needs to be done for this
+   * trivial case.
+   */
+
   return waitpid((pid_t)-1, stat_loc, 0);
 }
 
 #endif /* CONFIG_SCHED_WAITPID && CONFIG_SCHED_HAVE_PARENT */
-
diff --git a/sched/sched/sched_waitid.c b/sched/sched/sched_waitid.c
index c6fd8d4501c384201692cd7b50bff2d644cd5c67..dd3dd86211fa77ff2636698c28fddf44f6893cd1 100644
--- a/sched/sched/sched_waitid.c
+++ b/sched/sched/sched_waitid.c
@@ -44,6 +44,7 @@
 #include 
 
 #include 
+#include 
 
 #include "sched/sched.h"
 #include "group/group.h"
@@ -161,9 +162,13 @@ int waitid(idtype_t idtype, id_t id, FAR siginfo_t *info, int options)
   bool retains;
 #endif
   sigset_t set;
-  int err;
+  int errcode;
   int ret;
 
+  /* waitid() is a cancellation point */
+
+  (void)enter_cancellation_point();
+
   /* MISSING LOGIC:   If WNOHANG is provided in the options, then this function
    * should returned immediately.  However, there is no mechanism available now
    * know if the thread has child:  The children remember their parents (if
@@ -175,7 +180,7 @@ int waitid(idtype_t idtype, id_t id, FAR siginfo_t *info, int options)
    * distinguish any other events.
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (options != WEXITED)
     {
       set_errno(ENOSYS);
@@ -205,21 +210,24 @@ int waitid(idtype_t idtype, id_t id, FAR siginfo_t *info, int options)
     {
       /* There are no children */
 
-      err = ECHILD;
+      errcode = ECHILD;
       goto errout_with_errno;
     }
   else if (idtype == P_PID)
     {
-      /* Get the TCB corresponding to this PID and make sure it is our child. */
+      /* Get the TCB corresponding to this PID and make sure that the
+       * thread it is our child.
+       */
 
       ctcb = sched_gettcb((pid_t)id);
+
 #ifdef HAVE_GROUP_MEMBERS
-      if (!ctcb || ctcb->group->tg_pgid != rtcb->group->tg_gid)
+      if (ctcb == NULL || ctcb->group->tg_pgid != rtcb->group->tg_gid)
 #else
-      if (!ctcb || ctcb->ppid != rtcb->pid)
+      if (ctcb == NULL || ctcb->group>tg_ppid != rtcb->pid)
 #endif
         {
-          err = ECHILD;
+          errcode = ECHILD;
           goto errout_with_errno;
         }
 
@@ -233,31 +241,36 @@ int waitid(idtype_t idtype, id_t id, FAR siginfo_t *info, int options)
             {
               /* This specific pid is not a child */
 
-              err = ECHILD;
+              errcode = ECHILD;
               goto errout_with_errno;
             }
         }
     }
 #else
-  if (rtcb->nchildren == 0)
+  /* Child status is not retained. */
+
+  if (rtcb->group->tg_nchildren == 0)
     {
       /* There are no children */
 
-      err = ECHILD;
+      errcode = ECHILD;
       goto errout_with_errno;
     }
   else if (idtype == P_PID)
     {
-      /* Get the TCB corresponding to this PID and make sure it is our child. */
+      /* Get the TCB corresponding to this PID and make sure that the
+       * thread is our child.
+       */
 
       ctcb = sched_gettcb((pid_t)id);
+
 #ifdef HAVE_GROUP_MEMBERS
-      if (!ctcb || ctcb->group->tg_pgid != rtcb->group->tg_gid)
+      if (ctcb == NULL || ctcb->group->tg_pgid != rtcb->group->tg_gid)
 #else
-      if (!ctcb || ctcb->ppid != rtcb->pid)
+      if (ctcb == NULL || ctcb->group->tg_ppid != rtcb->pid)
 #endif
         {
-          err = ECHILD;
+          errcode = ECHILD;
           goto errout_with_errno;
         }
     }
@@ -327,7 +340,7 @@ int waitid(idtype_t idtype, id_t id, FAR siginfo_t *info, int options)
                * to reported ECHILD than bogus status.
                */
 
-              err = ECHILD;
+              errcode = ECHILD;
               goto errout_with_errno;
             }
         }
@@ -338,7 +351,7 @@ int waitid(idtype_t idtype, id_t id, FAR siginfo_t *info, int options)
        * instead).
        */
 
-      if (rtcb->nchildren == 0 ||
+      if (rtcb->group->tg_nchildren == 0 ||
           (idtype == P_PID && (ret = kill((pid_t)id, 0)) < 0))
         {
           /* We know that the child task was running okay we stared,
@@ -346,7 +359,7 @@ int waitid(idtype_t idtype, id_t id, FAR siginfo_t *info, int options)
            * Let's return ECHILD.. that is at least informative.
            */
 
-          err = ECHILD;
+          errcode = ECHILD;
           goto errout_with_errno;
         }
 #endif
@@ -396,12 +409,14 @@ int waitid(idtype_t idtype, id_t id, FAR siginfo_t *info, int options)
         }
     }
 
+  leave_cancellation_point();
   sched_unlock();
   return OK;
 
 errout_with_errno:
-  set_errno(err);
+  set_errno(errcode);
 errout:
+  leave_cancellation_point();
   sched_unlock();
   return ERROR;
 }
diff --git a/sched/sched/sched_waitpid.c b/sched/sched/sched_waitpid.c
index 4a669958c7ca2061e62aa54580bb4b390d88f645..aca86d093fe646a9a38d08d5eb31b4518e77e320 100644
--- a/sched/sched/sched_waitpid.c
+++ b/sched/sched/sched_waitpid.c
@@ -45,6 +45,7 @@
 #include 
 
 #include 
+#include 
 
 #include "sched/sched.h"
 #include "group/group.h"
@@ -180,17 +181,22 @@ pid_t waitpid(pid_t pid, int *stat_loc, int options)
   FAR struct tcb_s *ctcb;
   FAR struct task_group_s *group;
   bool mystat = false;
-  int err;
+  int errcode;
   int ret;
 
   DEBUGASSERT(stat_loc);
 
+  /* waitpid() is a cancellation point */
+
+  (void)enter_cancellation_point();
+
   /* None of the options are supported */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (options != 0)
     {
       set_errno(ENOSYS);
+      leave_cancellation_point();
       return ERROR;
     }
 #endif
@@ -202,9 +208,9 @@ pid_t waitpid(pid_t pid, int *stat_loc, int options)
   /* Get the TCB corresponding to this PID */
 
   ctcb = sched_gettcb(pid);
-  if (!ctcb)
+  if (ctcb == NULL)
     {
-      err = ECHILD;
+      errcode = ECHILD;
       goto errout_with_errno;
     }
 
@@ -268,12 +274,14 @@ pid_t waitpid(pid_t pid, int *stat_loc, int options)
 
   /* On success, return the PID */
 
+  leave_cancellation_point();
   sched_unlock();
   return pid;
 
 errout_with_errno:
-  set_errno(err);
+  set_errno(errcode);
 errout:
+  leave_cancellation_point();
   sched_unlock();
   return ERROR;
 }
@@ -302,17 +310,22 @@ pid_t waitpid(pid_t pid, int *stat_loc, int options)
 #endif
   FAR struct siginfo info;
   sigset_t set;
-  int err;
+  int errcode;
   int ret;
 
   DEBUGASSERT(stat_loc);
 
+  /* waitpid() is a cancellation point */
+
+  (void)enter_cancellation_point();
+
   /* None of the options are supported */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (options != 0)
     {
       set_errno(ENOSYS);
+      leave_cancellation_point();
       return ERROR;
     }
 #endif
@@ -337,21 +350,24 @@ pid_t waitpid(pid_t pid, int *stat_loc, int options)
 
   if (rtcb->group->tg_children == NULL && retains)
     {
-      err = ECHILD;
+      errcode = ECHILD;
       goto errout_with_errno;
     }
   else if (pid != (pid_t)-1)
     {
-      /* Get the TCB corresponding to this PID and make sure it is our child. */
+      /* Get the TCB corresponding to this PID and make sure that the
+       * thread it is our child.
+       */
 
       ctcb = sched_gettcb(pid);
+
 #ifdef HAVE_GROUP_MEMBERS
-      if (!ctcb || ctcb->group->tg_pgid != rtcb->group->tg_gid)
+      if (ctcb == NULL || ctcb->group->tg_pgid != rtcb->group->tg_gid)
 #else
-      if (!ctcb || ctcb->ppid != rtcb->pid)
+      if (ctcb == NULL || ctcb->group->tg_ppid != rtcb->pid)
 #endif
         {
-          err = ECHILD;
+          errcode = ECHILD;
           goto errout_with_errno;
         }
 
@@ -363,7 +379,7 @@ pid_t waitpid(pid_t pid, int *stat_loc, int options)
 
           if (group_findchild(rtcb->group, pid) == NULL)
             {
-              err = ECHILD;
+              errcode = ECHILD;
               goto errout_with_errno;
             }
         }
@@ -371,25 +387,28 @@ pid_t waitpid(pid_t pid, int *stat_loc, int options)
 
 #else /* CONFIG_SCHED_CHILD_STATUS */
 
-  if (rtcb->nchildren == 0)
+  if (rtcb->group->tg_nchildren == 0)
     {
       /* There are no children */
 
-      err = ECHILD;
+      errcode = ECHILD;
       goto errout_with_errno;
     }
   else if (pid != (pid_t)-1)
     {
-      /* Get the TCB corresponding to this PID and make sure it is our child. */
+      /* Get the TCB corresponding to this PID and make sure that the
+       * thread it is our child.
+       */
 
       ctcb = sched_gettcb(pid);
+
 #ifdef HAVE_GROUP_MEMBERS
-      if (!ctcb || ctcb->group->tg_pgid != rtcb->group->tg_gid)
+      if (ctcb == NULL || ctcb->group->tg_pgid != rtcb->group->tg_gid)
 #else
-      if (!ctcb || ctcb->ppid != rtcb->pid)
+      if (ctcb == NULL || ctcb->group->tg_ppid != rtcb->pid)
 #endif
         {
-          err = ECHILD;
+          errcode = ECHILD;
           goto errout_with_errno;
         }
     }
@@ -472,7 +491,7 @@ pid_t waitpid(pid_t pid, int *stat_loc, int options)
                * to reported ECHILD than bogus status.
                */
 
-              err = ECHILD;
+              errcode = ECHILD;
               goto errout_with_errno;
             }
         }
@@ -485,7 +504,7 @@ pid_t waitpid(pid_t pid, int *stat_loc, int options)
        * instead).
        */
 
-      if (rtcb->nchildren == 0 ||
+      if (rtcb->group->tg_nchildren == 0 ||
           (pid != (pid_t)-1 && (ret = kill(pid, 0)) < 0))
         {
           /* We know that the child task was running okay we stared,
@@ -493,7 +512,7 @@ pid_t waitpid(pid_t pid, int *stat_loc, int options)
            * Let's return ECHILD.. that is at least informative.
            */
 
-          err = ECHILD;
+          errcode = ECHILD;
           goto errout_with_errno;
         }
 
@@ -522,13 +541,15 @@ pid_t waitpid(pid_t pid, int *stat_loc, int options)
         }
     }
 
+  leave_cancellation_point();
   sched_unlock();
   return (int)pid;
 
 errout_with_errno:
-  set_errno(err);
+  set_errno(errcode);
 
 errout_with_lock:
+  leave_cancellation_point();
   sched_unlock();
   return ERROR;
 }
diff --git a/sched/semaphore/Make.defs b/sched/semaphore/Make.defs
index 39ba7cd2dc5345a5d41b98dbdc2031dd7c5fa2cb..7eb17404247ef394a9b41e7f54af6c4b32808de1 100644
--- a/sched/semaphore/Make.defs
+++ b/sched/semaphore/Make.defs
@@ -33,12 +33,14 @@
 #
 ############################################################################
 
+# Add semaphore-related files to the build
+
 CSRCS += sem_destroy.c sem_wait.c sem_trywait.c sem_tickwait.c
 CSRCS += sem_timedwait.c sem_timeout.c sem_post.c sem_recover.c
 CSRCS += sem_reset.c sem_waitirq.c
 
 ifeq ($(CONFIG_PRIORITY_INHERITANCE),y)
-CSRCS += sem_initialize.c sem_holder.c
+CSRCS += sem_initialize.c sem_holder.c sem_setprotocol.c
 endif
 
 ifeq ($(CONFIG_SPINLOCK),y)
diff --git a/sched/semaphore/sem_holder.c b/sched/semaphore/sem_holder.c
index 854747cb01205b61f16d70d6d15001bdba8da9bd..6b9f05af3ecd8c7539a3e44aa5a1e1890fc92f5f 100644
--- a/sched/semaphore/sem_holder.c
+++ b/sched/semaphore/sem_holder.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * sched/semaphore/sem_holder.c
  *
- *   Copyright (C) 2009-2011, 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009-2011, 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -116,7 +116,7 @@ static inline FAR struct semholder_s *sem_allocholder(sem_t *sem)
 #endif
   else
     {
-      sdbg("Insufficient pre-allocated holders\n");
+      serr("ERROR: Insufficient pre-allocated holders\n");
       pholder = NULL;
     }
 
@@ -283,7 +283,7 @@ static int sem_boostholderprio(FAR struct semholder_s *pholder,
 
   if (!sched_verifytcb(htcb))
     {
-      sdbg("TCB 0x%08x is a stale handle, counts lost\n", htcb);
+      serr("ERROR: TCB 0x%08x is a stale handle, counts lost\n", htcb);
       sem_freeholder(sem, pholder);
     }
 
@@ -321,7 +321,7 @@ static int sem_boostholderprio(FAR struct semholder_s *pholder,
                 }
               else
                 {
-                  sdbg("CONFIG_SEM_NNESTPRIO exceeded\n");
+                  serr("ERROR: CONFIG_SEM_NNESTPRIO exceeded\n");
                 }
             }
 
@@ -372,7 +372,7 @@ static int sem_boostholderprio(FAR struct semholder_s *pholder,
  * Name: sem_verifyholder
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ASSERTIONS
 static int sem_verifyholder(FAR struct semholder_s *pholder, FAR sem_t *sem,
                             FAR void *arg)
 {
@@ -397,15 +397,15 @@ static int sem_verifyholder(FAR struct semholder_s *pholder, FAR sem_t *sem,
  * Name: sem_dumpholder
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_SEM_PHDEBUG)
+#if defined(CONFIG_DEBUG_INFO) && defined(CONFIG_SEM_PHDEBUG)
 static int sem_dumpholder(FAR struct semholder_s *pholder, FAR sem_t *sem,
                           FAR void *arg)
 {
 #if CONFIG_SEM_PREALLOCHOLDERS > 0
-  dbg("  %08x: %08x %08x %04x\n",
+  _info("  %08x: %08x %08x %04x\n",
       pholder, pholder->flink, pholder->htcb, pholder->counts);
 #else
-  dbg("  %08x: %08x %04x\n", pholder, pholder->htcb, pholder->counts);
+  _info("  %08x: %08x %04x\n", pholder, pholder->htcb, pholder->counts);
 #endif
   return 0;
 }
@@ -434,7 +434,7 @@ static int sem_restoreholderprio(FAR struct semholder_s *pholder,
 
   if (!sched_verifytcb(htcb))
     {
-      sdbg("TCB 0x%08x is a stale handle, counts lost\n", htcb);
+      serr("ERROR: TCB 0x%08x is a stale handle, counts lost\n", htcb);
       sem_freeholder(sem, pholder);
     }
 
@@ -648,7 +648,7 @@ static inline void sem_restorebaseprio_irq(FAR struct tcb_s *stcb,
    * should be at their base priority.
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ASSERTIONS
   else
     {
       (void)sem_foreachholder(sem, sem_verifyholder, NULL);
@@ -723,7 +723,7 @@ static inline void sem_restorebaseprio_task(FAR struct tcb_s *stcb,
    * should be at their base priority.
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ASSERTIONS
   else
     {
       (void)sem_foreachholder(sem, sem_verifyholder, NULL);
@@ -790,7 +790,7 @@ void sem_initholders(void)
  * Name: sem_destroyholder
  *
  * Description:
- *   Called from sem_destroy() to handle any holders of a semaphore when
+ *   Called from sem_destroyholder() to handle any holders of a semaphore when
  *   it is destroyed.
  *
  * Parameters:
@@ -819,13 +819,13 @@ void sem_destroyholder(FAR sem_t *sem)
 #if CONFIG_SEM_PREALLOCHOLDERS > 0
   if (sem->hhead)
     {
-      sdbg("Semaphore destroyed with holders\n");
+      serr("ERROR: Semaphore destroyed with holders\n");
       (void)sem_foreachholder(sem, sem_recoverholders, NULL);
     }
 #else
   if (sem->holder.htcb)
     {
-      sdbg("Semaphore destroyed with holder\n");
+      serr("ERROR: Semaphore destroyed with holder\n");
     }
 
   sem->holder.htcb = NULL;
@@ -833,40 +833,72 @@ void sem_destroyholder(FAR sem_t *sem)
 }
 
 /****************************************************************************
- * Name: sem_addholder
+ * Name: sem_addholder_tcb
  *
  * Description:
- *   Called from sem_wait() when the calling thread obtains the semaphore
+ *   Called from sem_wait() when the calling thread obtains the semaphore;
+ *   Called from sem_post() when the waiting thread obtains the semaphore.
  *
  * Parameters:
- *   sem - A reference to the incremented semaphore
+ *   htcb - TCB of the thread that just obtained the semaphore
+ *   sem  - A reference to the incremented semaphore
  *
  * Return Value:
  *   0 (OK) or -1 (ERROR) if unsuccessful
  *
  * Assumptions:
+ *   Interrupts are disabled.
  *
  ****************************************************************************/
 
-void sem_addholder(FAR sem_t *sem)
+void sem_addholder_tcb(FAR struct tcb_s *htcb, FAR sem_t *sem)
 {
-  FAR struct tcb_s *rtcb = this_task();
   FAR struct semholder_s *pholder;
 
-  /* Find or allocate a container for this new holder */
+  /* If priority inheritance is disabled for this thread, then do not add
+   * the holder.  If there are never holders of the semaphore, the priority
+   * inheritance is effectively disabled.
+   */
 
-  pholder = sem_findorallocateholder(sem, rtcb);
-  if (pholder)
+  if ((sem->flags & PRIOINHERIT_FLAGS_DISABLE) == 0)
     {
-      /* Then set the holder and increment the number of counts held by this
-       * holder
-       */
+      /* Find or allocate a container for this new holder */
 
-      pholder->htcb = rtcb;
-      pholder->counts++;
+      pholder = sem_findorallocateholder(sem, htcb);
+      if (pholder != NULL)
+        {
+          /* Then set the holder and increment the number of counts held by this
+           * holder
+           */
+
+          pholder->htcb = htcb;
+          pholder->counts++;
+        }
     }
 }
 
+/****************************************************************************
+ * Name: sem_addholder
+ *
+ * Description:
+ *   Called from sem_wait() when the calling thread obtains the semaphore
+ *
+ * Parameters:
+ *   sem - A reference to the incremented semaphore
+ *
+ * Return Value:
+ *   0 (OK) or -1 (ERROR) if unsuccessful
+ *
+ * Assumptions:
+ *   Interrupts are disabled.
+ *
+ ****************************************************************************/
+
+void sem_addholder(FAR sem_t *sem)
+{
+  sem_addholder_tcb(this_task(), sem);
+}
+
 /****************************************************************************
  * Name: void sem_boostpriority(sem_t *sem)
  *
@@ -1036,10 +1068,12 @@ void sem_canceled(FAR struct tcb_s *stcb, FAR sem_t *sem)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_SEM_PHDEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_SEM_PHDEBUG)
 void sem_enumholders(FAR sem_t *sem)
 {
+#ifdef CONFIG_DEBUG_INFO
   (void)sem_foreachholder(sem, sem_dumpholder, NULL);
+#endif
 }
 #endif
 
@@ -1060,7 +1094,7 @@ void sem_enumholders(FAR sem_t *sem)
  *
  ****************************************************************************/
 
-#if defined(CONFIG_DEBUG) && defined(CONFIG_SEM_PHDEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_SEM_PHDEBUG)
 int sem_nfreeholders(void)
 {
 #if CONFIG_SEM_PREALLOCHOLDERS > 0
diff --git a/sched/semaphore/sem_post.c b/sched/semaphore/sem_post.c
index 97235de42818534b5eab7df1cd34617d4cfea57b..47487db42a80e1acee4db4a9e2d3fa668ec8ffdd 100644
--- a/sched/semaphore/sem_post.c
+++ b/sched/semaphore/sem_post.c
@@ -41,6 +41,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -97,7 +98,22 @@ int sem_post(FAR sem_t *sem)
 
       flags = enter_critical_section();
 
-      /* Perform the semaphore unlock operation. */
+      /* Perform the semaphore unlock operation, releasing this task as a
+       * holder then also incrementing the count on the semaphore.
+       *
+       * NOTE:  When semaphores are used for signaling purposes, the holder
+       * of the semaphore may not be this thread!  In this case,
+       * sem_releaseholder() will do nothing.
+       *
+       * In the case of a mutex this could be simply resolved since there is
+       * only one holder but for the case of counting semaphores, there may
+       * be many holders and if the holder is not this thread, then it is
+       * not possible to know which thread/holder should be released.
+       *
+       * For this reason, it is recommended that priority inheritance be
+       * disabled via sem_setprotocol(SEM_PRIO_NONE) when the semahore is
+       * initialixed if the semaphore is to used for signaling purposes.
+       */
 
       ASSERT(sem->semcount < SEM_VALUE_MAX);
       sem_releaseholder(sem);
@@ -130,8 +146,14 @@ int sem_post(FAR sem_t *sem)
                (stcb && stcb->waitsem != sem);
                stcb = stcb->flink);
 
-          if (stcb)
+          if (stcb != NULL)
             {
+              /* The task will be the new holder of the semaphore when
+               * it is awakened.
+               */
+
+              sem_addholder_tcb(stcb, sem);
+
               /* It is, let the task take the semaphore */
 
               stcb->waitsem = NULL;
@@ -157,6 +179,10 @@ int sem_post(FAR sem_t *sem)
 
       leave_critical_section(flags);
     }
+  else
+    {
+      set_errno(EINVAL);
+    }
 
   return ret;
 }
diff --git a/sched/semaphore/sem_setprotocol.c b/sched/semaphore/sem_setprotocol.c
new file mode 100644
index 0000000000000000000000000000000000000000..1350206941b5bd69678e317826896d55a0a601e0
--- /dev/null
+++ b/sched/semaphore/sem_setprotocol.c
@@ -0,0 +1,130 @@
+/****************************************************************************
+ * sched/semaphore/sem_setprotocol.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include "semaphore/semaphore.h"
+
+#ifdef CONFIG_PRIORITY_INHERITANCE
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function: sem_setprotocol
+ *
+ * Description:
+ *    Set semaphore protocol attribute.
+ *
+ *    One particularly important use of this furnction is when a semaphore
+ *    is used for inter-task communication like:
+ *
+ *      TASK A                 TASK B
+ *      sem_init(sem, 0, 0);
+ *      sem_wait(sem);
+ *                             sem_post(sem);
+ *      Awakens as holder
+ *
+ *    In this case priority inheritance can interfere with the operation of
+ *    the semaphore.  The problem is that when TASK A is restarted it is a
+ *    holder of the semaphore.  However, it never calls sem_post(sem) so it
+ *    becomes *permanently* a holder of the semaphore and may have its
+ *    priority boosted when any other task tries to acquire the semaphore.
+ *
+ *    The fix is to call sem_setprotocol(SEM_PRIO_NONE) immediately after
+ *    the sem_init() call so that there will be no priority inheritance
+ *    operations on this semaphore.
+ *
+ * Parameters:
+ *    sem      - A pointer to the semaphore whose attributes are to be
+ *               modified
+ *    protocol - The new protocol to use
+ *
+ * Return Value:
+ *   0 if successful.  Otherwise, -1 is returned and the errno value is set
+ *   appropriately.
+ *
+ ****************************************************************************/
+
+int sem_setprotocol(FAR sem_t *sem, int protocol)
+{
+  int errcode;
+
+  DEBUGASSERT(sem != NULL);
+
+  switch (protocol)
+    {
+      case SEM_PRIO_NONE:
+        /* Disable priority inheritance */
+
+        sem->flags |= PRIOINHERIT_FLAGS_DISABLE;
+
+        /* Remove any current holders */
+
+        sem_destroyholder(sem);
+        return OK;
+
+      case SEM_PRIO_INHERIT:
+        /* Enable priority inheritance (dangerous) */
+
+        sem->flags &= ~PRIOINHERIT_FLAGS_DISABLE;
+        return OK;
+
+      case SEM_PRIO_PROTECT:
+        /* Not yet supported */
+
+        errcode = ENOSYS;
+        break;
+
+      default:
+        errcode = EINVAL;
+        break;
+    }
+
+  set_errno(errcode);
+  return ERROR;
+}
+
+#endif /* CONFIG_PRIORITY_INHERITANCE */
diff --git a/sched/semaphore/sem_timedwait.c b/sched/semaphore/sem_timedwait.c
index f006268c5cffc48f092cd30cf96079ddc40f907d..23c16cc2d53b46c28e87824c9d3149b2e520f96f 100644
--- a/sched/semaphore/sem_timedwait.c
+++ b/sched/semaphore/sem_timedwait.c
@@ -49,6 +49,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "sched/sched.h"
 #include "clock/clock.h"
@@ -103,11 +104,15 @@ int sem_timedwait(FAR sem_t *sem, FAR const struct timespec *abstime)
 
   DEBUGASSERT(up_interrupt_context() == false && rtcb->waitdog == NULL);
 
+  /* sem_timedwait() is a cancellation point */
+
+  (void)enter_cancellation_point();
+
   /* Verify the input parameters and, in case of an error, set
    * errno appropriately.
    */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   if (!abstime || !sem)
     {
       errcode = EINVAL;
@@ -209,6 +214,7 @@ success_with_irqdisabled:
   leave_critical_section(flags);
   wd_delete(rtcb->waitdog);
   rtcb->waitdog = NULL;
+  leave_cancellation_point();
   return OK;
 
   /* Error exits */
@@ -220,5 +226,6 @@ errout_with_irqdisabled:
 
 errout:
   set_errno(errcode);
+  leave_cancellation_point();
   return ERROR;
 }
diff --git a/sched/semaphore/sem_trywait.c b/sched/semaphore/sem_trywait.c
index 37ba0d66e20034c37d13d71b68785cb8118dda2e..c55116a2b7e224e257bcc22272c85a5ec7c89493 100644
--- a/sched/semaphore/sem_trywait.c
+++ b/sched/semaphore/sem_trywait.c
@@ -84,13 +84,9 @@ int sem_trywait(FAR sem_t *sem)
 
   /* This API should not be called from interrupt handlers */
 
-  DEBUGASSERT(up_interrupt_context() == false);
+  DEBUGASSERT(sem != NULL && up_interrupt_context() == false);
 
-  /* Assume any errors reported are due to invalid arguments. */
-
-  set_errno(EINVAL);
-
-  if (sem)
+  if (sem != NULL)
     {
       /* The following operations must be performed with interrupts disabled
        * because sem_post() may be called from an interrupt handler.
@@ -98,12 +94,6 @@ int sem_trywait(FAR sem_t *sem)
 
       flags = enter_critical_section();
 
-      /* Any further errors could only occurr because the semaphore is not
-       * available.
-       */
-
-      set_errno(EAGAIN);
-
       /* If the semaphore is available, give it to the requesting task */
 
       if (sem->semcount > 0)
@@ -114,11 +104,21 @@ int sem_trywait(FAR sem_t *sem)
           rtcb->waitsem = NULL;
           ret = OK;
         }
+      else
+        {
+          /* Semaphore is not available */
+
+          set_errno(EAGAIN);
+        }
 
       /* Interrupts may now be enabled. */
 
       leave_critical_section(flags);
     }
+  else
+    {
+      set_errno(EINVAL);
+    }
 
   return ret;
 }
diff --git a/sched/semaphore/sem_wait.c b/sched/semaphore/sem_wait.c
index 86fb013696073248073bc176b0546782cbfd490f..c51cdcb1f076cdd76638c7657db9f86827bb8cb8 100644
--- a/sched/semaphore/sem_wait.c
+++ b/sched/semaphore/sem_wait.c
@@ -46,6 +46,7 @@
 
 #include 
 #include 
+#include 
 
 #include "sched/sched.h"
 #include "semaphore/semaphore.h"
@@ -84,21 +85,35 @@ int sem_wait(FAR sem_t *sem)
 
   /* This API should not be called from interrupt handlers */
 
-  DEBUGASSERT(up_interrupt_context() == false);
+  DEBUGASSERT(sem != NULL && up_interrupt_context() == false);
 
-  /* Assume any errors reported are due to invalid arguments. */
+  /* The following operations must be performed with interrupts
+   * disabled because sem_post() may be called from an interrupt
+   * handler.
+   */
 
-  set_errno(EINVAL);
+  flags = enter_critical_section();
 
-  if (sem)
+  /* sem_wait() is a cancellation point */
+
+  if (enter_cancellation_point())
     {
-      /* The following operations must be performed with interrupts
-       * disabled because sem_post() may be called from an interrupt
-       * handler.
+#ifdef CONFIG_CANCELLATION_POINTS
+      /* If there is a pending cancellation, then do not perform
+       * the wait.  Exit now with ECANCELED.
        */
 
-      flags = enter_critical_section();
+      set_errno(ECANCELED);
+      leave_cancellation_point();
+      leave_critical_section(flags);
+      return ERROR;
+#endif
+    }
+
+  /* Make sure we were supplied with a valid semaphore. */
 
+  if (sem != NULL)
+    {
       /* Check if the lock is available */
 
       if (sem->semcount > 0)
@@ -175,9 +190,12 @@ int sem_wait(FAR sem_t *sem)
 
           if (get_errno() != EINTR && get_errno() != ETIMEDOUT)
             {
-              /* Not awakened by a signal or a timeout... We hold the semaphore */
+              /* Not awakened by a signal or a timeout...
+               *
+               * NOTE that in this case sem_addholder() was called by logic
+               * in sem_wait() fore this thread was restarted.
+               */
 
-              sem_addholder(sem);
               ret = OK;
             }
 
@@ -185,11 +203,13 @@ int sem_wait(FAR sem_t *sem)
           sched_unlock();
 #endif
         }
-
-      /* Interrupts may now be enabled. */
-
-      leave_critical_section(flags);
+    }
+  else
+    {
+      set_errno(EINVAL);
     }
 
+  leave_cancellation_point();
+  leave_critical_section(flags);
   return ret;
 }
diff --git a/sched/semaphore/semaphore.h b/sched/semaphore/semaphore.h
index 85f4e6c876bad6aecd0bf1d8eceb0bc3a7a96cad..cc7a929816bde0611133b56cdfa69e6513beb6f4 100644
--- a/sched/semaphore/semaphore.h
+++ b/sched/semaphore/semaphore.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * sched/semaphore/semaphore.h
  *
- *   Copyright (C) 2007, 2009-2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2009-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -89,6 +89,7 @@ void sem_recover(FAR struct tcb_s *tcb);
 void sem_initholders(void);
 void sem_destroyholder(FAR sem_t *sem);
 void sem_addholder(FAR sem_t *sem);
+void sem_addholder_tcb(FAR struct tcb_s *htcb, FAR sem_t *sem);
 void sem_boostpriority(FAR sem_t *sem);
 void sem_releaseholder(FAR sem_t *sem);
 void sem_restorebaseprio(FAR struct tcb_s *stcb, FAR sem_t *sem);
@@ -101,10 +102,11 @@ void sem_canceled(FAR struct tcb_s *stcb, FAR sem_t *sem);
 #  define sem_initholders()
 #  define sem_destroyholder(sem)
 #  define sem_addholder(sem)
+#  define sem_addholder_tcb(htcb,sem)
 #  define sem_boostpriority(sem)
 #  define sem_releaseholder(sem)
 #  define sem_restorebaseprio(stcb,sem)
-#  define sem_canceled(stcb, sem)
+#  define sem_canceled(stcb,sem)
 #endif
 
 #undef EXTERN
diff --git a/sched/semaphore/spinlock.c b/sched/semaphore/spinlock.c
index 79d904e7efcb5a62bbf1eccee82c4e1322fc1e97..349cdec57fcc49e08f87d5ec18788751a9e4d3d9 100644
--- a/sched/semaphore/spinlock.c
+++ b/sched/semaphore/spinlock.c
@@ -44,6 +44,7 @@
 #include 
 
 #include 
+#include 
 #include 
 
 #include "sched/sched.h"
@@ -119,14 +120,56 @@ void spin_initializer(FAR struct spinlock_s *lock)
 
 void spin_lock(FAR volatile spinlock_t *lock)
 {
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+  /* Notify that we are waiting for a spinlock */
+
+  sched_note_spinlock(this_task(), lock);
+#endif
+
   while (up_testset(lock) == SP_LOCKED)
     {
-#if 0 /* Would recurse */
-      sched_yield();
-#endif
+      SP_DSB();
     }
+
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+  /* Notify that we have the spinlock */
+
+  sched_note_spinlocked(this_task(), lock);
+#endif
+  SP_DMB();
 }
 
+/****************************************************************************
+ * Name: spin_unlock
+ *
+ * Description:
+ *   Release one count on a non-reentrant spinlock.
+ *
+ * Input Parameters:
+ *   lock - A reference to the spinlock object to unlock.
+ *
+ * Returned Value:
+ *   None.
+ *
+ * Assumptions:
+ *   Not running at the interrupt level.
+ *
+ ****************************************************************************/
+
+#ifdef __SP_UNLOCK_FUNCTION
+void spin_unlock(FAR volatile spinlock_t *lock)
+{
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+  /* Notify that we are unlocking the spinlock */
+
+  sched_note_spinunlock(this_task(), lock);
+#endif
+
+  *lock = SP_UNLOCKED;
+  SP_DMB();
+}
+#endif
+
 /****************************************************************************
  * Name: spin_lockr
  *
@@ -183,6 +226,13 @@ void spin_lockr(FAR struct spinlock_s *lock)
 
 #  warning Missing logic
 #endif
+
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+      /* Notify that we are waiting for a spinlock */
+
+      sched_note_spinlock(this_task(), &lock->sp_lock);
+#endif
+
       /* Take the lock.  REVISIT:  We should set an indication in the TCB
        * that the thread is spinning.  This might be useful in determining
        * some scheduling actions?
@@ -193,8 +243,17 @@ void spin_lockr(FAR struct spinlock_s *lock)
           up_irq_restore(flags);
           sched_yield();
           flags = up_irq_save();
+          SP_DSB();
         }
 
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+      /* Notify that we have thespinlock */
+
+      sched_note_spinlocked(this_task(), &lock->sp_lock);
+#endif
+
+      SP_DMB();
+
       /* Take one count on the lock */
 
       lock->sp_cpu   = cpu;
@@ -205,6 +264,12 @@ void spin_lockr(FAR struct spinlock_s *lock)
 
 #else /* CONFIG_SMP */
 
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+  /* Notify that we are waiting for a spinlock */
+
+  sched_note_spinlock(this_task(), &lock->sp_lock);
+#endif
+
   /* Take the lock.  REVISIT:  We should set an indication in the TCB that
    * the thread is spinning.  This might be useful in determining some
    * scheduling actions?
@@ -213,8 +278,16 @@ void spin_lockr(FAR struct spinlock_s *lock)
   while (up_testset(&lock->sp_lock) == SP_LOCKED)
     {
       sched_yield();
+      SP_DSB()
     }
 
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+  /* Notify that we have thespinlock */
+
+  sched_note_spinlocked(this_task(), &lock->sp_lock);
+#endif
+
+  SP_DMB();
 #endif /* CONFIG_SMP */
 }
 
@@ -273,6 +346,11 @@ void spin_unlockr(FAR struct spinlock_s *lock)
 
       if (lock->sp_count <= 1)
         {
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+          /* Notify that we are unlocking the spinlock */
+
+          sched_note_spinunlock(this_task(), &lock->sp_lock);
+#endif
           /* The count must decremented to zero */
 
           lock->sp_count = 0;
@@ -288,6 +366,13 @@ void spin_unlockr(FAR struct spinlock_s *lock)
   up_irq_restore(flags);
 
 #else /* CONFIG_SMP */
+
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+  /* Notify that we are unlocking the spinlock */
+
+  sched_note_spinunlock(this_task(), &lock->sp_lock);
+#endif
+
   /* Just mark the spinlock unlocked */
 
   DEBUGASSERT(lock != NULL && lock->sp_lock == SP_LOCKED);
@@ -305,7 +390,7 @@ void spin_unlockr(FAR struct spinlock_s *lock)
  * Input Parameters:
  *   set     - A reference to the bitset to set the CPU bit in
  *   cpu     - The bit number to be set
- *   setlock - A reference to the lock lock protecting the set
+ *   setlock - A reference to the lock protecting the set
  *   orlock  - Will be set to SP_LOCKED while holding setlock
  *
  * Returned Value:
@@ -317,15 +402,31 @@ void spin_setbit(FAR volatile cpu_set_t *set, unsigned int cpu,
                  FAR volatile spinlock_t *setlock,
                  FAR volatile spinlock_t *orlock)
 {
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+  cpu_set_t prev;
+#endif
+
   /* First, get the 'setlock' spinlock */
 
   spin_lock(setlock);
 
   /* Then set the bit and mark the 'orlock' as locked */
 
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+  prev    = *set;
+#endif
   *set   |= (1 << cpu);
   *orlock = SP_LOCKED;
 
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+  if (prev == 0)
+    {
+      /* Notify that we have locked the spinlock */
+
+      sched_note_spinlocked(this_task(), orlock);
+    }
+#endif
+
   /* Release the 'setlock' */
 
   spin_unlock(setlock);
@@ -340,7 +441,7 @@ void spin_setbit(FAR volatile cpu_set_t *set, unsigned int cpu,
  * Input Parameters:
  *   set     - A reference to the bitset to set the CPU bit in
  *   cpu     - The bit number to be set
- *   setlock - A reference to the lock lock protecting the set
+ *   setlock - A reference to the lock protecting the set
  *   orlock  - Will be set to SP_UNLOCKED if all bits become cleared in set
  *
  * Returned Value:
@@ -352,6 +453,10 @@ void spin_clrbit(FAR volatile cpu_set_t *set, unsigned int cpu,
                  FAR volatile spinlock_t *setlock,
                  FAR volatile spinlock_t *orlock)
 {
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+  cpu_set_t prev;
+#endif
+
   /* First, get the 'setlock' spinlock */
 
   spin_lock(setlock);
@@ -360,9 +465,21 @@ void spin_clrbit(FAR volatile cpu_set_t *set, unsigned int cpu,
    * upon the resulting state of the CPU set.
    */
 
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+  prev    = *set;
+#endif
   *set   &= ~(1 << cpu);
   *orlock = (*set != 0) ? SP_LOCKED : SP_UNLOCKED;
 
+#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
+  if (prev != 0 && *set == 0)
+    {
+      /* Notify that we have unlocked the spinlock */
+
+      sched_note_spinunlock(this_task(), orlock);
+    }
+#endif
+
   /* Release the 'setlock' */
 
   spin_unlock(setlock);
diff --git a/sched/signal/sig_deliver.c b/sched/signal/sig_deliver.c
index 1f9c378b8a640dec0056b22e3a60b68c6b9d59e5..7f676a14a130b9771d81cd38a489f2e3b6035182 100644
--- a/sched/signal/sig_deliver.c
+++ b/sched/signal/sig_deliver.c
@@ -86,7 +86,7 @@ void sig_deliver(FAR struct tcb_s *stcb)
   for (sigq = (FAR sigq_t *)stcb->sigpendactionq.head; (sigq); sigq = next)
     {
       next = sigq->flink;
-      sdbg("Sending signal sigq=0x%x\n", sigq);
+      sinfo("Sending signal sigq=0x%x\n", sigq);
 
       /* Remove the signal structure from the sigpendactionq and place it
        * in the sigpostedq.  NOTE:  Since signals are processed one at a
diff --git a/sched/signal/sig_dispatch.c b/sched/signal/sig_dispatch.c
index 107982c59baef03c1570a02c31dab37ccf34429a..4399dc01f54c138a9f0e6c8b6f08e0e2d722c369 100644
--- a/sched/signal/sig_dispatch.c
+++ b/sched/signal/sig_dispatch.c
@@ -301,9 +301,9 @@ int sig_tcbdispatch(FAR struct tcb_s *stcb, siginfo_t *info)
   irqstate_t flags;
   int ret = OK;
 
-  sdbg("TCB=0x%08x signo=%d code=%d value=%d mask=%08x\n",
-       stcb, info->si_signo, info->si_code,
-       info->si_value.sival_int, stcb->sigprocmask);
+  sinfo("TCB=0x%08x signo=%d code=%d value=%d mask=%08x\n",
+        stcb, info->si_signo, info->si_code,
+        info->si_value.sival_int, stcb->sigprocmask);
 
   DEBUGASSERT(stcb != NULL && info != NULL);
 
@@ -345,22 +345,48 @@ int sig_tcbdispatch(FAR struct tcb_s *stcb, siginfo_t *info)
 
   else
     {
+#ifdef CONFIG_SMP
+      int cpu;
+#endif
       /* Queue any sigaction's requested by this task. */
 
       ret = sig_queueaction(stcb, info);
 
+      /* Deliver of the signal must be performed in a critical section */
+
+      flags = enter_critical_section();
+
+#ifdef CONFIG_SMP
+      /* If the thread is running on another CPU, then pause that CPU.  We can
+       * then setup the for signal delivery on the running thread.  When the
+       * CPU is resumed, the signal handler will then execute.
+       */
+
+      cpu = sched_cpu_pause(stcb);
+#endif /* CONFIG_SMP */
+
       /* Then schedule execution of the signal handling action on the
        * recipient's thread.
        */
 
       up_schedule_sigaction(stcb, sig_deliver);
 
+#ifdef CONFIG_SMP
+      /* Resume the paused CPU (if any) */
+
+      if (cpu >= 0)
+        {
+          /* I am not yet sure how to handle a failure here. */
+
+          DEBUGVERIFY(up_cpu_resume(cpu));
+        }
+#endif /* CONFIG_SMP */
+
       /* Check if the task is waiting for an unmasked signal.  If so, then
        * unblock it. This must be performed in a critical section because
        * signals can be queued from the interrupt level.
        */
 
-      flags = enter_critical_section();
       if (stcb->task_state == TSTATE_WAIT_SIG)
         {
           memcpy(&stcb->sigunbinfo, info, sizeof(siginfo_t));
diff --git a/sched/signal/sig_mqnotempty.c b/sched/signal/sig_mqnotempty.c
index 44b05b7aff70c8b413d7d0665c7f3ce13827d100..b183514c1aa025b793715f3e04025542ff4805b4 100644
--- a/sched/signal/sig_mqnotempty.c
+++ b/sched/signal/sig_mqnotempty.c
@@ -76,9 +76,9 @@ int sig_mqnotempty(int pid, int signo, void *sival_ptr)
   int ret;
 
 #ifdef CONFIG_CAN_PASS_STRUCTS
-  sdbg("pid=%p signo=%d value=%d\n", pid, signo, value.sival_int);
+  sinfo("pid=%p signo=%d value=%d\n", pid, signo, value.sival_int);
 #else
-  sdbg("pid=%p signo=%d sival_ptr=%p\n", pid, signo, sival_ptr);
+  sinfo("pid=%p signo=%d sival_ptr=%p\n", pid, signo, sival_ptr);
 #endif
 
   /* Verify that we can perform the signalling operation */
diff --git a/sched/signal/sig_nanosleep.c b/sched/signal/sig_nanosleep.c
index 9ffbcb52c764161dc6c378b8b17144949b90d75b..5b3a461b53b0ab00b905359137a25aea9b41ce30 100644
--- a/sched/signal/sig_nanosleep.c
+++ b/sched/signal/sig_nanosleep.c
@@ -46,6 +46,7 @@
 
 #include 
 #include 
+#include 
 
 #include "clock/clock.h"
 
@@ -106,12 +107,15 @@ int nanosleep(FAR const struct timespec *rqtp, FAR struct timespec *rmtp)
   irqstate_t flags;
   systime_t starttick;
   sigset_t set;
-  struct siginfo value;
   int errval;
-#ifdef CONFIG_DEBUG /* Warning avoidance */
+#ifdef CONFIG_DEBUG_ASSERTIONS /* Warning avoidance */
   int ret;
 #endif
 
+  /* nanosleep() is a cancellation point */
+
+  (void)enter_cancellation_point();
+
   if (!rqtp || rqtp->tv_nsec < 0 || rqtp->tv_nsec >= 1000000000)
     {
       errval = EINVAL;
@@ -135,10 +139,10 @@ int nanosleep(FAR const struct timespec *rqtp, FAR struct timespec *rmtp)
 
   /* nanosleep is a simple application of sigtimedwait. */
 
-#ifdef CONFIG_DEBUG /* Warning avoidance */
-  ret = sigtimedwait(&set, &value, rqtp);
+#ifdef CONFIG_DEBUG_ASSERTIONS /* Warning avoidance */
+  ret = sigtimedwait(&set, NULL, rqtp);
 #else
-  (void)sigtimedwait(&set, &value, rqtp);
+  (void)sigtimedwait(&set, NULL, rqtp);
 #endif
 
   /* sigtimedwait() cannot succeed.  It should always return error with
@@ -154,6 +158,7 @@ int nanosleep(FAR const struct timespec *rqtp, FAR struct timespec *rmtp)
       /* The timeout "error" is the normal, successful result */
 
       leave_critical_section(flags);
+      leave_cancellation_point();
       return OK;
     }
 
@@ -167,6 +172,11 @@ int nanosleep(FAR const struct timespec *rqtp, FAR struct timespec *rmtp)
       systime_t remaining;
       int ticks;
 
+      /* REVISIT: The conversion from time to ticks and back could
+       * be avoided.  clock_timespec_subtract() would be used instead
+       * to get the time difference.
+       */
+
       /* First get the number of clock ticks that we were requested to
        * wait.
        */
@@ -198,5 +208,6 @@ int nanosleep(FAR const struct timespec *rqtp, FAR struct timespec *rmtp)
 
 errout:
   set_errno(errval);
+  leave_cancellation_point();
   return ERROR;
 }
diff --git a/sched/signal/sig_pause.c b/sched/signal/sig_pause.c
index 80fc712cb7bbe56869e79d27af1ff3f4a7a3b4f1..62b90c2935c1af1680ac8e1422266635df12697a 100644
--- a/sched/signal/sig_pause.c
+++ b/sched/signal/sig_pause.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * sched/signal/sig_pause.c
  *
- *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,6 +42,8 @@
 #include 
 #include 
 
+#include 
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -73,7 +75,11 @@
 int pause(void)
 {
   sigset_t set;
-  struct siginfo value;
+  int ret;
+
+  /* pause() is a cancellation point */
+
+  (void)enter_cancellation_point();
 
   /* Set up for the sleep.  Using the empty set means that we are not
    * waiting for any particular signal.  However, any unmasked signal
@@ -86,5 +92,7 @@ int pause(void)
    * meaning that some unblocked signal was caught.
    */
 
-  return sigwaitinfo(&set, &value);
+  ret = sigwaitinfo(&set, NULL);
+  leave_cancellation_point();
+  return ret;
 }
diff --git a/sched/signal/sig_queue.c b/sched/signal/sig_queue.c
index 3daa59c155e3f2b67820a6ece9a9e0afa04d24f8..6662030b34fbddec6881287a54a942cb41e362ec 100644
--- a/sched/signal/sig_queue.c
+++ b/sched/signal/sig_queue.c
@@ -98,9 +98,9 @@ int sigqueue(int pid, int signo, void *sival_ptr)
   int ret;
 
 #ifdef CONFIG_CAN_PASS_STRUCTS
-  sdbg("pid=0x%08x signo=%d value=%d\n", pid, signo, value.sival_int);
+  sinfo("pid=0x%08x signo=%d value=%d\n", pid, signo, value.sival_int);
 #else
-  sdbg("pid=0x%08x signo=%d value=%p\n", pid, signo, sival_ptr);
+  sinfo("pid=0x%08x signo=%d value=%p\n", pid, signo, sival_ptr);
 #endif
 
   /* Sanity checks */
diff --git a/sched/signal/sig_suspend.c b/sched/signal/sig_suspend.c
index d3a4a9ba7190207afd25ec0f2de3ebe8636ae170..ab5cfd25fe7ecbc98fd1532c14a469b1fa261b89 100644
--- a/sched/signal/sig_suspend.c
+++ b/sched/signal/sig_suspend.c
@@ -46,6 +46,7 @@
 
 #include 
 #include 
+#include 
 
 #include "sched/sched.h"
 #include "signal/signal.h"
@@ -98,6 +99,10 @@ int sigsuspend(FAR const sigset_t *set)
   irqstate_t flags;
   int unblocksigno;
 
+  /* sigsuspend() is a cancellation point */
+
+  (void)enter_cancellation_point();
+
   /* Several operations must be performed below:  We must determine if any
    * signal is pending and, if not, wait for the signal.  Since signals can
    * be posted from the interrupt level, there is a race condition that
@@ -154,5 +159,6 @@ int sigsuspend(FAR const sigset_t *set)
     }
 
   sched_unlock();
-  return ERROR;
+  leave_cancellation_point();
+  return ERROR; /* ??REVISIT:  Always returns ERROR?? */
 }
diff --git a/sched/signal/sig_timedwait.c b/sched/signal/sig_timedwait.c
index 687884dcf9c48f3947bd420a3c04366916ebd864..40cf8b55e6acedbd132bdb10cb0e0237d6a3c4e2 100644
--- a/sched/signal/sig_timedwait.c
+++ b/sched/signal/sig_timedwait.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * sched/signal/sig_timedwait.c
  *
- *   Copyright (C) 2007-2009, 2012-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2012-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -52,6 +52,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "sched/sched.h"
 #include "signal/signal.h"
@@ -75,12 +76,20 @@
  * Name: sig_timeout
  *
  * Description:
- *  A timeout elapsed while waiting for signals to be queued.
+ *   A timeout elapsed while waiting for signals to be queued.
+ *
+ * Assumptions:
+ *   This function executes in the context of the timer interrupt handler.
+ *   Local interrupts are assumed to be disabled on entry.
  *
  ****************************************************************************/
 
 static void sig_timeout(int argc, wdparm_t itcb)
 {
+#ifdef CONFIG_SMP
+  irqstate_t flags;
+#endif
+
   /* On many small machines, pointers are encoded and cannot be simply cast
    * from uint32_t to struct tcb_s *.  The following union works around this
    * (see wdogparm_t).  This odd logic could be conditioned on
@@ -96,6 +105,19 @@ static void sig_timeout(int argc, wdparm_t itcb)
   u.itcb = itcb;
   ASSERT(u.wtcb);
 
+#ifdef CONFIG_SMP
+  /* We must be in a critical section in order to call up_unblock_task()
+   * below.  If we are running on a single CPU architecture, then we know
+   * interrupts a disabled an there is no need to explicitly call
+   * enter_critical_section().  However, in the SMP case,
+   * enter_critical_section() does much more than just disable interrupts on
+   * the local CPU; it also manages spinlocks to assure the stability of the
+   * TCB that we are manipulating.
+   */
+
+  flags = enter_critical_section();
+#endif
+
   /* There may be a race condition -- make sure the task is
    * still waiting for a signal
    */
@@ -112,6 +134,10 @@ static void sig_timeout(int argc, wdparm_t itcb)
 #endif
       up_unblock_task(u.wtcb);
     }
+
+#ifdef CONFIG_SMP
+  leave_critical_section(flags);
+#endif
 }
 
 /****************************************************************************
@@ -145,9 +171,9 @@ static void sig_timeout(int argc, wdparm_t itcb)
  *                  empty message queue.
  *
  * Parameters:
- *   set - The pending signal set.
- *   info - The returned value
- *   timeout - The amount of time to wait
+ *   set     - The pending signal set.
+ *   info    - The returned value (may be NULL).
+ *   timeout - The amount of time to wait (may be NULL)
  *
  * Return Value:
  *   Signal number that cause the wait to be terminated, otherwise -1 (ERROR)
@@ -173,6 +199,9 @@ int sigtimedwait(FAR const sigset_t *set, FAR struct siginfo *info,
 
   DEBUGASSERT(rtcb->waitdog == NULL);
 
+  /* sigtimedwait() is a cancellation point */
+
+  (void)enter_cancellation_point();
   sched_lock();  /* Not necessary */
 
   /* Several operations must be performed below:  We must determine if any
@@ -200,7 +229,7 @@ int sigtimedwait(FAR const sigset_t *set, FAR struct siginfo *info,
 
       /* Return the signal info to the caller if so requested */
 
-      if (info)
+      if (info != NULL)
         {
           memcpy(info, &sigpend->info, sizeof(struct siginfo));
         }
@@ -225,7 +254,7 @@ int sigtimedwait(FAR const sigset_t *set, FAR struct siginfo *info,
 
       /* Check if we should wait for the timeout */
 
-      if (timeout)
+      if (timeout != NULL)
         {
           /* Convert the timespec to system clock ticks, making sure that
            * the resulting delay is greater than or equal to the requested
@@ -343,5 +372,6 @@ int sigtimedwait(FAR const sigset_t *set, FAR struct siginfo *info,
     }
 
   sched_unlock();
+  leave_cancellation_point();
   return ret;
 }
diff --git a/sched/signal/sig_waitinfo.c b/sched/signal/sig_waitinfo.c
index d271dc9884cdbcf7163d2471805a7c3b4397fc40..73afb186de3d8d9daf369e89b11c34c34fd62bb0 100644
--- a/sched/signal/sig_waitinfo.c
+++ b/sched/signal/sig_waitinfo.c
@@ -38,8 +38,11 @@
  ****************************************************************************/
 
 #include 
+
 #include 
 
+#include 
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -65,5 +68,15 @@
 
 int sigwaitinfo(FAR const sigset_t *set, FAR struct siginfo *info)
 {
-  return sigtimedwait(set, info, NULL);
+  int ret;
+
+  /* sigwaitinfo() is a cancellation point */
+
+  (void)enter_cancellation_point();
+
+  /* Just a wrapper around sigtimedwait() */
+
+  ret = sigtimedwait(set, info, NULL);
+  leave_cancellation_point();
+  return ret;
 }
diff --git a/sched/task/Make.defs b/sched/task/Make.defs
index 32c21f33241afdf38ea5589a616ee9b8dc20c693..a5c2295692c6a007e27e464f3ffc8063058b0fef 100644
--- a/sched/task/Make.defs
+++ b/sched/task/Make.defs
@@ -35,9 +35,9 @@
 
 CSRCS += task_create.c task_init.c task_setup.c task_activate.c
 CSRCS += task_start.c task_delete.c task_exit.c task_exithook.c
-CSRCS += task_recover.c task_restart.c task_spawnparms.c
-CSRCS += task_terminate.c task_getgroup.c task_prctl.c task_getpid.c
-CSRCS += exit.c
+CSRCS += task_getgroup.c task_getpid.c task_prctl.c task_recover.c
+CSRCS += task_restart.c task_spawnparms.c task_setcancelstate.c
+CSRCS += task_terminate.c exit.c
 
 ifeq ($(CONFIG_ARCH_HAVE_VFORK),y)
 ifeq ($(CONFIG_SCHED_WAITPID),y)
@@ -49,6 +49,10 @@ ifneq ($(CONFIG_BUILD_KERNEL),y)
 CSRCS += task_spawn.c
 endif
 
+ifeq ($(CONFIG_CANCELLATION_POINTS),y)
+CSRCS += task_setcanceltype.c task_testcancel.c
+endif
+
 ifneq ($(CONFIG_BINFMT_DISABLE),y)
 ifeq ($(CONFIG_LIBC_EXECFUNCS),y)
 CSRCS += task_execv.c task_posixspawn.c
@@ -67,6 +71,10 @@ ifeq ($(CONFIG_SCHED_ONEXIT),y)
 CSRCS += task_onexit.c
 endif
 
+ifeq ($(CONFIG_CANCELLATION_POINTS),y)
+CSRCS += task_cancelpt.c
+endif
+
 # Include task build support
 
 DEPPATH += --dep-path task
diff --git a/sched/task/task.h b/sched/task/task.h
index b4967c799a620dc5a10bc9d0ec2e15dedcc8e274..83ce71d3f53c4621136c4a5f85b80d05be6815a0 100644
--- a/sched/task/task.h
+++ b/sched/task/task.h
@@ -80,8 +80,10 @@ int  task_terminate(pid_t pid, bool nonblocking);
 void task_exithook(FAR struct tcb_s *tcb, int status, bool nonblocking);
 void task_recover(FAR struct tcb_s *tcb);
 
-/* Misc. */
+/* Cancellation points */
 
-bool sched_addreadytorun(FAR struct tcb_s *rtrtcb);
+#ifdef CONFIG_CANCELLATION_POINTS
+void notify_cancellation(FAR struct tcb_s *tcb);
+#endif
 
 #endif /* __SCHED_TASK_TASK_H */
diff --git a/sched/task/task_cancelpt.c b/sched/task/task_cancelpt.c
new file mode 100644
index 0000000000000000000000000000000000000000..07b4a664c887afcbb9f2ee541c4a7e2165bc7303
--- /dev/null
+++ b/sched/task/task_cancelpt.c
@@ -0,0 +1,324 @@
+/****************************************************************************
+ * sched/task/task_cancelpt.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Cancellation Points.
+ *
+ * Cancellation points shall occur when a thread is executing the following
+ * functions:
+ *
+ * accept()          mq_timedsend()           putpmsg()       sigtimedwait()
+ * aio_suspend()     msgrcv()                 pwrite()        sigwait()
+ * clock_nanosleep() msgsnd()                 read()          sigwaitinfo()
+ * close()           msync()                  readv()         sleep()
+ * connect()         nanosleep()              recv()          system()
+ * creat()           open()                   recvfrom()      tcdrain()
+ * fcntl()           pause()                  recvmsg()       usleep()
+ * fdatasync()       poll()                   select()        wait()
+ * fsync()           pread()                  sem_timedwait() waitid()
+ * getmsg()          pselect()                sem_wait()      waitpid()
+ * getpmsg()         pthread_cond_timedwait() send()          write()
+ * lockf()           pthread_cond_wait()      sendmsg()       writev()
+ * mq_receive()      pthread_join()           sendto()
+ * mq_send()         pthread_testcancel()     sigpause()
+ * mq_timedreceive() putmsg()                 sigsuspend()
+ *
+ * Each of the above function must call enter_cancellation_point() on entry
+ * in order to establish the cancellation point and leave_cancellation_point()
+ * on exit.  These functions are described below.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "semaphore/semaphore.h"
+#include "mqueue/mqueue.h"
+#include "task/task.h"
+
+#ifdef CONFIG_CANCELLATION_POINTS
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: enter_cancellation_point
+ *
+ * Description:
+ *   Called at the beginning of the cancellation point to establish the
+ *   cancellation point.  This function does the following:
+ *
+ *   1. If deferred cancellation does not apply to this thread, nothing is
+ *      done, otherwise, it
+ *   2. Sets state information in the caller's TCB and increments a nesting
+ *      count.
+ *   3. If this is the outermost nesting level, it checks if there is a
+ *      pending cancellation and, if so, calls either exit() or
+ *      pthread_exit(), depending upon the type of the thread.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value
+ *   true is returned if a cancellation is pending but cannot be performed
+ *   now due to the nesting level.
+ *
+ ****************************************************************************/
+
+bool enter_cancellation_point(void)
+{
+  FAR struct tcb_s *tcb = this_task();
+  bool ret = false;
+
+  /* Disabling pre-emption should provide sufficient protection.  We only
+   * need the TCB to be stationary (no interrupt level modification is
+   * anticipated).
+   *
+   * REVISIT: is locking the scheduler sufficent in SMP mode?
+   */
+
+  sched_lock();
+
+  /* If cancellation is disabled on this thread or if this thread is using
+   * asynchronous cancellation, then do nothing.
+   *
+   * Special case: if the cpcount count is greater than zero, then we are
+   * nested and the above condition was certainly true at the outermost
+   * nesting level.
+   */
+
+  if (((tcb->flags & TCB_FLAG_NONCANCELABLE) == 0 &&
+       (tcb->flags & TCB_FLAG_CANCEL_DEFERRED) != 0) ||
+       tcb->cpcount > 0)
+    {
+      /* Check if there is a pending cancellation */
+
+      if ((tcb->flags & TCB_FLAG_CANCEL_PENDING) != 0)
+        {
+          /* Yes... return true (if we don't exit here) */
+
+          ret = true;
+
+          /* If there is a pending cancellation and we are at the outermost
+           * nesting level of cancellation function calls, then exit
+           * according to the type of the thread.
+           */
+
+          if (tcb->cpcount == 0)
+            {
+#ifndef CONFIG_DISABLE_PTHREAD
+               if ((tcb->flags & TCB_FLAG_TTYPE_MASK) == TCB_FLAG_TTYPE_PTHREAD)
+                 {
+                   pthread_exit(PTHREAD_CANCELED);
+                 }
+               else
+#endif
+                 {
+                   exit(EXIT_FAILURE);
+                 }
+            }
+        }
+
+      /* Otherwise, indicate that we are at a cancellation point by
+       * incrementing the nesting level of the cancellation point
+       * functions.
+       */
+
+      DEBUGASSERT(tcb->cpcount < INT16_MAX);
+      tcb->cpcount++;
+    }
+
+  sched_unlock();
+  return ret;
+}
+
+/****************************************************************************
+ * Name: leave_cancellation_point
+ *
+ * Description:
+ *   Called at the end of the cancellation point.  This function does the
+ *   following:
+ *
+ *   1. If deferred cancellation does not apply to this thread, nothing is
+ *      done, otherwise, it
+ *   2. Clears state information in the caller's TCB and decrements a
+ *      nesting count.
+ *   3. If this is the outermost nesting level, it checks if there is a
+ *      pending cancellation and, if so, calls either exit() or
+ *      pthread_exit(), depending upon the type of the thread.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value
+ *   None
+ *
+ ****************************************************************************/
+
+void leave_cancellation_point(void)
+{
+  FAR struct tcb_s *tcb = this_task();
+
+  /* Disabling pre-emption should provide sufficient protection.  We only
+   * need the TCB to be stationary (no interrupt level modification is
+   * anticipated).
+   *
+   * REVISIT: is locking the scheduler sufficent in SMP mode?
+   */
+
+  sched_lock();
+
+  /* If cancellation is disabled on this thread or if this thread is using
+   * asynchronous cancellation, then do nothing.  Here we check only the
+   * nesting level: if the cpcount count is greater than zero, then the
+   * required condition was certainly true at the outermost nesting level.
+   */
+
+  if (tcb->cpcount > 0)
+    {
+      /* Decrement the nesting level.  If if would decrement to zero, then
+       * we are at the outermost nesting level and may need to do more.
+       */
+
+      if (tcb->cpcount == 1)
+        {
+          /* We are no longer at the cancellation point */
+
+          tcb->cpcount = 0;
+
+          /* If there is a pending cancellation then just exit according to
+           * the type of the thread.
+           */
+
+          if ((tcb->flags & TCB_FLAG_CANCEL_PENDING) != 0)
+            {
+#ifndef CONFIG_DISABLE_PTHREAD
+               if ((tcb->flags & TCB_FLAG_TTYPE_MASK) == TCB_FLAG_TTYPE_PTHREAD)
+                 {
+                   pthread_exit(PTHREAD_CANCELED);
+                 }
+               else
+#endif
+                 {
+                   exit(EXIT_FAILURE);
+                 }
+            }
+        }
+      else
+        {
+           /* We are not at the outermost nesting level.  Just decrment the
+            * nesting level count.
+            */
+
+          tcb->cpcount--;
+        }
+    }
+
+  sched_unlock();
+}
+
+/****************************************************************************
+ * Name: notify_cancellation
+ *
+ * Description:
+ *   Called by task_delete() or pthread_cancel() if the cancellation occurs
+ *   while we the thread is within the cancellation point.  This logic
+ *   behaves much like sending a signal:  It will cause waiting threads
+ *   to wake up and terminated with ECANCELED.  A call to
+ *   leave_cancellation_point() whould then follow, causing the thread to
+ *   exit.
+ *
+ ****************************************************************************/
+
+void notify_cancellation(FAR struct tcb_s *tcb)
+{
+  irqstate_t flags;
+
+  /* We need perform the following operations from within a critical section
+   * because it can compete with interrupt level activity.
+   */
+
+  flags = enter_critical_section();
+
+  /* Make sure that the cancellation pending indication is set. */
+
+  tcb->flags |= TCB_FLAG_CANCEL_PENDING;
+
+  /* We only notify the cancellation if (1) the thread has not disabled
+   * cancellation, (2) the thread uses the deffered cancellation mode,
+   * (3) the thread is waiting within a cancellation point.
+   */
+
+  if (((tcb->flags & TCB_FLAG_NONCANCELABLE) == 0 &&
+       (tcb->flags & TCB_FLAG_CANCEL_DEFERRED) != 0) ||
+      tcb->cpcount > 0)
+    {
+      /* If the thread is blocked waiting for a semaphore, then the thread
+       * must be unblocked to handle the cancellation.
+       */
+
+      if (tcb->task_state == TSTATE_WAIT_SEM)
+        {
+          sem_waitirq(tcb, ECANCELED);
+        }
+
+      /* If the thread is blocked waiting on a message queue, then the
+       * thread must be unblocked to handle the cancellation.
+       */
+
+#ifndef CONFIG_DISABLE_MQUEUE
+      if (tcb->task_state == TSTATE_WAIT_MQNOTEMPTY ||
+          tcb->task_state == TSTATE_WAIT_MQNOTFULL)
+        {
+          mq_waitirq(tcb, ECANCELED);
+        }
+#endif
+    }
+
+  leave_critical_section(flags);
+}
+
+#endif /* CONFIG_CANCELLATION_POINTS */
diff --git a/sched/task/task_create.c b/sched/task/task_create.c
index c8dc768d5abc4bf7cda5f5614e5e75bb686ce3e9..520dd921fb16a077b93b88e3ed5795cabc0ba2c0 100644
--- a/sched/task/task_create.c
+++ b/sched/task/task_create.c
@@ -98,7 +98,7 @@ static int thread_create(FAR const char *name, uint8_t ttype, int priority,
   tcb = (FAR struct task_tcb_s *)kmm_zalloc(sizeof(struct task_tcb_s));
   if (!tcb)
     {
-      sdbg("ERROR: Failed to allocate TCB\n");
+      serr("ERROR: Failed to allocate TCB\n");
       errcode = ENOMEM;
       goto errout;
     }
diff --git a/sched/task/task_delete.c b/sched/task/task_delete.c
index 5b4c0f747dcc0d5e555cf0f57a98fbc26f199f15..ebf94c8bd813a481cf21fbf1b8f951f23fbcb2e2 100644
--- a/sched/task/task_delete.c
+++ b/sched/task/task_delete.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * sched/task/task_delete.c
  *
- *   Copyright (C) 2007-2009, 2011-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2011-2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 
@@ -64,37 +65,109 @@
  *   redirected to exit().  This can only happen if a task calls task_delete()
  *   in order to delete itself.
  *
- *   In fact, this function (and task_terminate) are the final functions
- *   called all task termination sequences.  task_delete may be called
- *   from:
- *
- *   - task_restart(),
- *   - pthread_cancel(),
- *   - and directly from user code.
- *
- *   Other exit paths (exit(), _eixt(), and pthread_exit()) will go through
- *   task_terminate()
+ *   This function obeys the semantics of pthread cancellation:  task
+ *   deletion is deferred if cancellation is disabled or if deferred
+ *   cancellation is supported (with cancellation points enabled).
  *
  * Inputs:
  *   pid - The task ID of the task to delete.  A pid of zero
  *         signifies the calling task.
  *
  * Return Value:
- *   OK on success; or ERROR on failure
- *
- *   This function can fail if the provided pid does not correspond to a
- *   task (errno is not set)
+ *   OK on success; or ERROR on failure with the errno variable set
+ *   appropriately.
  *
  ****************************************************************************/
 
 int task_delete(pid_t pid)
 {
+  FAR struct tcb_s *dtcb;
   FAR struct tcb_s *rtcb;
+  int ret;
 
-  /* Check if the task to delete is the calling task */
+  /* Check if the task to delete is the calling task:  PID=0 means to delete
+   * the calling task.  In this case, task_delete() is much like exit()
+   * except that it obeys the cancellation semantics.
+   */
 
   rtcb = this_task();
-  if (pid == 0 || pid == rtcb->pid)
+  if (pid == 0)
+    {
+      pid = rtcb->pid;
+    }
+
+  /* Get the TCB of the task to be deleted */
+
+  dtcb = (FAR struct tcb_s *)sched_gettcb(pid);
+  if (dtcb == NULL)
+    {
+      /* The pid does not correspond to any known thread.  The task
+       * has probably already exited.
+       */
+
+      set_errno(ESRCH);
+      return ERROR;
+    }
+
+  /* Only tasks and kernel threads should use this interface */
+
+  DEBUGASSERT((dtcb->flags & TCB_FLAG_TTYPE_MASK) != TCB_FLAG_TTYPE_PTHREAD);
+
+  /* Check to see if this task has the non-cancelable bit set in its
+   * flags. Suppress context changes for a bit so that the flags are stable.
+   * (the flags should not change in interrupt handling).
+   */
+
+  sched_lock();
+  if ((dtcb->flags & TCB_FLAG_NONCANCELABLE) != 0)
+    {
+      /* Then we cannot cancel the thread now.  Here is how this is
+       * supposed to work:
+       *
+       * "When cancelability is disabled, all cancels are held pending
+       *  in the target thread until the thread changes the cancelability.
+       *  When cancelability is deferred, all cancels are held pending in
+       *  the target thread until the thread changes the cancelability, calls
+       *  a function which is a cancellation point or calls pthread_testcancel(),
+       *  thus creating a cancellation point. When cancelability is asynchronous,
+       *  all cancels are acted upon immediately, interrupting the thread with its
+       *  processing."
+       */
+
+      dtcb->flags |= TCB_FLAG_CANCEL_PENDING;
+      sched_unlock();
+      return OK;
+    }
+
+#ifdef CONFIG_CANCELLATION_POINTS
+  /* Check if this task supports deferred cancellation */
+
+  if ((dtcb->flags & TCB_FLAG_CANCEL_DEFERRED) != 0)
+    {
+      /* Then we cannot cancel the task asynchronously.  Mark the cancellation
+       * as pending.
+       */
+
+      dtcb->flags |= TCB_FLAG_CANCEL_PENDING;
+
+      /* If the task is waiting at a cancellation point, then notify of the
+       * cancellation thereby waking the task up with an ECANCELED error.
+       */
+
+      if (dtcb->cpcount > 0)
+        {
+          notify_cancellation(dtcb);
+        }
+
+      sched_unlock();
+      return OK;
+    }
+#endif
+
+  /* Check if the task to delete is the calling task */
+
+  sched_unlock();
+  if (pid == rtcb->pid)
     {
       /* If it is, then what we really wanted to do was exit. Note that we
        * don't bother to unlock the TCB since it will be going away.
@@ -103,7 +176,16 @@ int task_delete(pid_t pid)
       exit(EXIT_SUCCESS);
     }
 
-  /* Then let task_terminate do the heavy lifting */
+  /* Otherwise, perform the asynchronous cancellation, letting
+   * task_terminate() do all of the heavy lifting.
+   */
+
+  ret = task_terminate(pid, false);
+  if (ret < 0)
+    {
+      set_errno(-ret);
+      return ERROR;
+    }
 
-  return task_terminate(pid, false);
+  return OK;
 }
diff --git a/sched/task/task_execv.c b/sched/task/task_execv.c
index c4457df537f26ff314c95e74d543fc535fb1d8f8..b6fa85c3e3e86f7d668dc316f92155819869ea33 100644
--- a/sched/task/task_execv.c
+++ b/sched/task/task_execv.c
@@ -134,7 +134,7 @@ int execv(FAR const char *path, FAR char * const argv[])
   ret = exec(path, (FAR char * const *)argv, symtab, nsymbols);
   if (ret < 0)
     {
-      sdbg("exec failed: %d\n", errno);
+      serr("ERROR: exec failed: %d\n", errno);
       return ERROR;
     }
 
diff --git a/sched/task/task_exit.c b/sched/task/task_exit.c
index 26d30ba3dbc1d4df79e28fe31e9e36f4ea406fdb..e8f3b9cd595c7527d563a840bec6de33427110fa 100644
--- a/sched/task/task_exit.c
+++ b/sched/task/task_exit.c
@@ -76,7 +76,7 @@
  *   OK on success; or ERROR on failure
  *
  * Assumeptions:
- *   Interrupts are disabled.
+ *   Executing within a critical section established by the caller.
  *
  ****************************************************************************/
 
diff --git a/sched/task/task_exithook.c b/sched/task/task_exithook.c
index aee8dc4242fa4578a8a41779c9f681a807ed2750..3c44135330c069c3a18b1d49a5e6fe5deb99db54 100644
--- a/sched/task/task_exithook.c
+++ b/sched/task/task_exithook.c
@@ -73,6 +73,14 @@ static inline void task_atexit(FAR struct tcb_s *tcb)
   /* Make sure that we have not already left the group.  Only the final
    * exiting thread in the task group should trigger the atexit()
    * callbacks.
+   *
+   * REVISIT: This is a security problem In the PROTECTED and KERNEL builds:
+   * We must not call the registered function in supervisor mode!  See also
+   * on_exit() and pthread_cleanup_pop() callbacks.
+   *
+   * REVISIT:  In the case of task_delete(), the callback would execute in
+   * the context the caller of task_delete() cancel, not in the context of
+   * the exiting task (or process).
    */
 
   if (group && group->tg_nmembers == 1)
@@ -133,6 +141,14 @@ static inline void task_onexit(FAR struct tcb_s *tcb, int status)
   /* Make sure that we have not already left the group.  Only the final
    * exiting thread in the task group should trigger the atexit()
    * callbacks.
+   *
+   * REVISIT: This is a security problem In the PROTECTED and KERNEL builds:
+   * We must not call the registered function in supervisor mode!  See also
+   * atexit() and pthread_cleanup_pop() callbacks.
+   *
+   * REVISIT:  In the case of task_delete(), the callback would execute in
+   * he context the caller of task_delete() cancel, not in the context of
+   * the exiting task (or process).
    */
 
   if (group && group->tg_nmembers == 1)
@@ -360,11 +376,12 @@ static inline void task_sigchild(FAR struct tcb_s *ptcb,
       task_exitstatus(ptcb->group, status);
 
 #else /* CONFIG_SCHED_CHILD_STATUS */
+      /* Exit status is not retained.  Just decrement the number of
+       * children from this parent.
+       */
 
-      /* Decrement the number of children from this parent */
-
-      DEBUGASSERT(ptcb->nchildren > 0);
-      ptcb->nchildren--;
+      DEBUGASSERT(ptcb->group != NULL && ptcb->group->tg_nchildren > 0);
+      ptcb->group->tg_nchildren--;
 
 #endif /* CONFIG_SCHED_CHILD_STATUS */
 
@@ -429,13 +446,13 @@ static inline void task_signalparent(FAR struct tcb_s *ctcb, int status)
   sched_lock();
 
   /* Get the TCB of the receiving, parent task.  We do this early to
-   * handle multiple calls to task_signalparent.  ctcb->ppid is set to an
-   * invalid value below and the following call will fail if we are
-   * called again.
+   * handle multiple calls to task_signalparent.  ctcb->group->tg_ppid is
+   * set to an invalid value below and the following call will fail if we
+   * are called again.
    */
 
-  ptcb = sched_gettcb(ctcb->ppid);
-  if (!ptcb)
+  ptcb = sched_gettcb(ctcb->group->tg_ppid);
+  if (ptcb == NULL)
     {
       /* The parent no longer exists... bail */
 
@@ -449,7 +466,7 @@ static inline void task_signalparent(FAR struct tcb_s *ctcb, int status)
 
   /* Forget who our parent was */
 
-  ctcb->ppid = INVALID_PROCESS_ID;
+  ctcb->group->tg_ppid = INVALID_PROCESS_ID;
   sched_unlock();
 #endif
 }
@@ -595,6 +612,17 @@ void task_exithook(FAR struct tcb_s *tcb, int status, bool nonblocking)
       return;
     }
 
+#ifdef CONFIG_CANCELLATION_POINTS
+   /* Mark the task as non-cancelable to avoid additional calls to exit()
+    * due to any cancellation point logic that might get kicked off by
+    * actions taken during exit processing.
+    */
+
+   tcb->flags  |= TCB_FLAG_NONCANCELABLE;
+   tcb->flags  &= ~TCB_FLAG_CANCEL_PENDING;
+   tcb->cpcount = 0;
+#endif
+
 #if defined(CONFIG_SCHED_ATEXIT) || defined(CONFIG_SCHED_ONEXIT)
   /* If exit function(s) were registered, call them now before we do any un-
    * initialization.
diff --git a/sched/task/task_getgroup.c b/sched/task/task_getgroup.c
index 6b18aaac14aa0a9f4f3215edbe401a5f8213c5b2..34f52c2c9cc283e8e3c7435f20812d42cfcfc4d6 100644
--- a/sched/task/task_getgroup.c
+++ b/sched/task/task_getgroup.c
@@ -47,26 +47,6 @@
 
 #ifdef HAVE_TASK_GROUP
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/sched/task/task_init.c b/sched/task/task_init.c
index 8583c1ecc3d0f6e3e77198824439237d22efaffa..42d4e31be45492e0f6e5016b1cd724f537e61833 100644
--- a/sched/task/task_init.c
+++ b/sched/task/task_init.c
@@ -50,30 +50,6 @@
 #include "group/group.h"
 #include "task/task.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/sched/task/task_posixspawn.c b/sched/task/task_posixspawn.c
index 17172086fc19c512ecee64cfc64fa57121ac0bd6..9a91ab963b54709f27e4adf30ff8b3a3357f6d3f 100644
--- a/sched/task/task_posixspawn.c
+++ b/sched/task/task_posixspawn.c
@@ -52,18 +52,6 @@
 #include "task/spawn.h"
 #include "task/task.h"
 
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -135,7 +123,7 @@ static int posix_spawn_exec(FAR pid_t *pidp, FAR const char *path,
   if (pid < 0)
     {
       ret = get_errno();
-      sdbg("ERROR: exec failed: %d\n", ret);
+      serr("ERROR: exec failed: %d\n", ret);
       goto errout;
     }
 
@@ -224,7 +212,7 @@ static int posix_spawn_proxy(int argc, FAR char *argv[])
           int tmp = task_reparent(0, *g_spawn_parms.pid);
           if (tmp < 0)
             {
-              sdbg("ERROR: task_reparent() failed: %d\n", tmp);
+              serr("ERROR: task_reparent() failed: %d\n", tmp);
             }
         }
 #endif
@@ -359,7 +347,7 @@ int posix_spawn(FAR pid_t *pid, FAR const char *path,
 
   DEBUGASSERT(path);
 
-  svdbg("pid=%p path=%s file_actions=%p attr=%p argv=%p\n",
+  sinfo("pid=%p path=%s file_actions=%p attr=%p argv=%p\n",
         pid, path, file_actions, attr, argv);
 
   /* If there are no file actions to be performed and there is no change to
@@ -407,7 +395,7 @@ int posix_spawn(FAR pid_t *pid, FAR const char *path,
     {
       int errcode = get_errno();
 
-      sdbg("ERROR: sched_getparam failed: %d\n", errcode);
+      serr("ERROR: sched_getparam failed: %d\n", errcode);
       spawn_semgive(&g_spawn_parmsem);
       return errcode;
     }
@@ -433,7 +421,7 @@ int posix_spawn(FAR pid_t *pid, FAR const char *path,
   if (proxy < 0)
     {
       ret = get_errno();
-      sdbg("ERROR: Failed to start posix_spawn_proxy: %d\n", ret);
+      serr("ERROR: Failed to start posix_spawn_proxy: %d\n", ret);
 
       goto errout_with_lock;
     }
@@ -444,7 +432,7 @@ int posix_spawn(FAR pid_t *pid, FAR const char *path,
   ret = waitpid(proxy, &status, 0);
   if (ret < 0)
     {
-      sdbg("ERROR: waitpid() failed: %d\n", errno);
+      serr("ERROR: waitpid() failed: %d\n", errno);
       goto errout_with_lock;
     }
 #else
diff --git a/sched/task/task_prctl.c b/sched/task/task_prctl.c
index 1908872536dbcfca5cc7ea5252f8b2ea8038a181..5c74ea09f0a18d81ed1b50ec097c9903e5ac0c0d 100644
--- a/sched/task/task_prctl.c
+++ b/sched/task/task_prctl.c
@@ -77,7 +77,7 @@
 int prctl(int option, ...)
 {
   va_list ap;
-  int err;
+  int errcode;
 
   va_start(ap, option);
   switch (option)
@@ -111,8 +111,8 @@ int prctl(int option, ...)
 
         if (!tcb)
           {
-            sdbg("Pid does not correspond to a task: %d\n", pid);
-            err = ESRCH;
+            serr("ERROR: Pid does not correspond to a task: %d\n", pid);
+            errcode = ESRCH;
             goto errout;
           }
 
@@ -120,8 +120,8 @@ int prctl(int option, ...)
 
         if (!name)
           {
-            sdbg("No name provide\n");
-            err = EFAULT;
+            serr("ERROR: No name provide\n");
+            errcode = EFAULT;
             goto errout;
           }
 
@@ -144,14 +144,14 @@ int prctl(int option, ...)
       }
       break;
 #else
-      sdbg("Option not enabled: %d\n", option);
-      err = ENOSYS;
+      serr("ERROR: Option not enabled: %d\n", option);
+      errcode = ENOSYS;
       goto errout;
 #endif
 
     default:
-      sdbg("Unrecognized option: %d\n", option);
-      err = EINVAL;
+      serr("ERROR: Unrecognized option: %d\n", option);
+      errcode = EINVAL;
       goto errout;
     }
 
@@ -166,6 +166,6 @@ int prctl(int option, ...)
 
 errout:
   va_end(ap);
-  set_errno(err);
+  set_errno(errcode);
   return ERROR;
 }
diff --git a/sched/task/task_reparent.c b/sched/task/task_reparent.c
index 690294ec024d7f4f99a80a7ad77e62f8ce84e24c..b7fe508badcd0f0164f173d90b458f7b2ef06ccb 100644
--- a/sched/task/task_reparent.c
+++ b/sched/task/task_reparent.c
@@ -190,11 +190,12 @@ int task_reparent(pid_t ppid, pid_t chpid)
     }
 
 #else /* CONFIG_SCHED_CHILD_STATUS */
+  /* Child task exit status is not retained */
 
-  DEBUGASSERT(otcb->nchildren > 0);
+  DEBUGASSERT(ogrp->tg_nchildren > 0);
 
-  otcb->nchildren--;     /* The orignal parent now has one few children */
-  ptcb->nchildren++;     /* The new parent has one additional child */
+  ogrp->tg_nchildren--;  /* The orignal parent now has one few children */
+  pgrp->tg_nchildren++;  /* The new parent has one additional child */
   ret = OK;
 
 #endif /* CONFIG_SCHED_CHILD_STATUS */
@@ -233,7 +234,7 @@ int task_reparent(pid_t ppid, pid_t chpid)
 
   /* Get the PID of the child task's parent (opid) */
 
-  opid = chtcb->ppid;
+  opid = chtcb->group->tg_ppid;
 
   /* Get the TCB of the child task's parent (otcb) */
 
@@ -244,14 +245,14 @@ int task_reparent(pid_t ppid, pid_t chpid)
       goto errout_with_ints;
     }
 
-  /* If new parent task's PID (ppid) is zero, then new parent is the
+  /* If new parent task's PID (tg_ppid) is zero, then new parent is the
    * grandparent will be the new parent, i.e., the parent of the current
    * parent task.
    */
 
   if (ppid == 0)
     {
-      ppid = otcb->ppid;
+      ppid = otcb->group->tg_ppid;
     }
 
   /* Get the new parent task's TCB (ptcb) */
@@ -263,9 +264,9 @@ int task_reparent(pid_t ppid, pid_t chpid)
       goto errout_with_ints;
     }
 
-  /* Then reparent the child */
+  /* Then reparent the child.  The task specified by ppid is the new parent. */
 
-  chtcb->ppid = ppid;  /* The task specified by ppid is the new parent */
+  chtcb->group->tg_ppid = ppid;
 
 #ifdef CONFIG_SCHED_CHILD_STATUS
   /* Remove the child status entry from old parent TCB */
@@ -302,11 +303,12 @@ int task_reparent(pid_t ppid, pid_t chpid)
     }
 
 #else /* CONFIG_SCHED_CHILD_STATUS */
+  /* Child task exit status is not retained */
 
-  DEBUGASSERT(otcb->nchildren > 0);
+  DEBUGASSERT(otcb->group != NULL && otcb->group->tg_nchildren > 0);
 
-  otcb->nchildren--;     /* The orignal parent now has one few children */
-  ptcb->nchildren++;     /* The new parent has one additional child */
+  otcb->group->tg_nchildren--;  /* The orignal parent now has one few children */
+  ptcb->group->tg_nchildren++;  /* The new parent has one additional child */
   ret = OK;
 
 #endif /* CONFIG_SCHED_CHILD_STATUS */
diff --git a/sched/task/task_restart.c b/sched/task/task_restart.c
index 9090d789cacbe8e52ff04a668faeb00042c64a1d..e499a6c598818bab9824a9ff8bafa9773427bbd5 100644
--- a/sched/task/task_restart.c
+++ b/sched/task/task_restart.c
@@ -83,14 +83,11 @@ int task_restart(pid_t pid)
   FAR struct task_tcb_s *tcb;
   FAR dq_queue_t *tasklist;
   irqstate_t flags;
-  int err;
-  int status;
-
-  /* Make sure this task does not become ready-to-run while we are futzing
-   * with its TCB
-   */
-
-  sched_lock();
+  int errcode;
+#ifdef CONFIG_SMP
+  int cpu;
+#endif
+  int ret;
 
   /* Check if the task to restart is the calling task */
 
@@ -99,11 +96,19 @@ int task_restart(pid_t pid)
     {
       /* Not implemented */
 
-      err = ENOSYS;
-      goto errout_with_lock;
+      errcode = ENOSYS;
+      goto errout;
     }
 
-  /* We are restarting some other task than ourselves */
+  /* We are restarting some other task than ourselves.  Make sure that the
+   * task does not change its state while we are executing.  In the single
+   * CPU state this could be done by disabling pre-emption.  But we will
+   * a little stronger medicine on the SMP case:  The task make be running
+   * on another CPU.
+   */
+
+  flags = enter_critical_section();
+
   /* Find for the TCB associated with matching pid  */
 
   tcb = (FAR struct task_tcb_s *)sched_gettcb(pid);
@@ -115,27 +120,17 @@ int task_restart(pid_t pid)
     {
       /* There is no TCB with this pid or, if there is, it is not a task. */
 
-      err = ESRCH;
+      errcode = ESRCH;
       goto errout_with_lock;
     }
 
 #ifdef CONFIG_SMP
-  /* There is currently no capability to restart a task that is actively
-   * running on another CPU.  This is not the calling task so if it is
-   * running, then it could only be running a a different CPU.
-   *
-   * Also, we will need some interlocks to assure that no tasks are
-   * rescheduled on any other CPU while we do this.
+  /* If the task is running on another CPU, then pause that CPU.  We can
+   * then manipulate the TCB of the restarted task and when we resume the
+   * that CPU, the restart take effect.
    */
 
-#warning Missing SMP logic
-  if (tcb->cmn.task_state == TSTATE_TASK_RUNNING)
-    {
-      /* Not implemented */
-
-      err = ENOSYS;
-      goto errout_with_lock;
-    }
+  cpu = sched_cpu_pause(&tcb->cmn);
 #endif /* CONFIG_SMP */
 
   /* Try to recover from any bad states */
@@ -158,10 +153,8 @@ int task_restart(pid_t pid)
   tasklist = TLIST_HEAD(tcb->cmn.task_state);
 #endif
 
-  flags = enter_critical_section();
   dq_rem((FAR dq_entry_t *)tcb, tasklist);
   tcb->cmn.task_state = TSTATE_TASK_INVALID;
-  leave_critical_section(flags);
 
   /* Deallocate anything left in the TCB's queues */
 
@@ -169,12 +162,21 @@ int task_restart(pid_t pid)
 
   /* Reset the current task priority  */
 
-  tcb->cmn.sched_priority = tcb->init_priority;
+  tcb->cmn.sched_priority = tcb->cmn.init_priority;
+
+  /* The task should restart with pre-emption disabled and not in a critical
+   * secton.
+   */
+
+  tcb->cmn.lockcount = 0;
+#ifdef CONFIG_SMP
+  tcb->cmn.irqcount  = 0;
+#endif
 
   /* Reset the base task priority and the number of pending reprioritizations */
 
 #ifdef CONFIG_PRIORITY_INHERITANCE
-  tcb->cmn.base_priority = tcb->init_priority;
+  tcb->cmn.base_priority = tcb->cmn.init_priority;
 #  if CONFIG_SEM_NNESTPRIO > 0
   tcb->cmn.npend_reprio = 0;
 #  endif
@@ -191,21 +193,37 @@ int task_restart(pid_t pid)
   dq_addfirst((FAR dq_entry_t *)tcb, (FAR dq_queue_t *)&g_inactivetasks);
   tcb->cmn.task_state = TSTATE_TASK_INACTIVE;
 
-  /* Activate the task */
+#ifdef CONFIG_SMP
+  /* Resume the paused CPU (if any) */
 
-  status = task_activate((FAR struct tcb_s *)tcb);
-  if (status != OK)
+  if (cpu >= 0)
     {
-      (void)task_delete(pid);
-      err = -status;
+      ret = up_cpu_resume(cpu);
+      if (ret < 0)
+        {
+          errcode = -ret;
+          goto errout_with_lock;
+        }
+    }
+#endif /* CONFIG_SMP */
+
+  leave_critical_section(flags);
+
+  /* Activate the task. */
+
+  ret = task_activate((FAR struct tcb_s *)tcb);
+  if (ret != OK)
+    {
+      (void)task_terminate(pid, true);
+      errcode = -ret;
       goto errout_with_lock;
     }
 
-  sched_unlock();
   return OK;
 
 errout_with_lock:
-  set_errno(err);
-  sched_unlock();
+  leave_critical_section(flags);
+errout:
+  set_errno(errcode);
   return ERROR;
 }
diff --git a/sched/task/task_setcancelstate.c b/sched/task/task_setcancelstate.c
new file mode 100644
index 0000000000000000000000000000000000000000..d7003f3af7eb3f2acb5d5dab56b9a12fca49a186
--- /dev/null
+++ b/sched/task/task_setcancelstate.c
@@ -0,0 +1,164 @@
+/****************************************************************************
+ * sched/task/task_setcancelstate.c
+ *
+ *   Copyright (C) 2007, 2008, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "sched/sched.h"
+#include "task/task.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: task_setcancelstate
+ *
+ * Description:
+ *   The task_setcancelstate() function atomically both sets the calling
+ *   task's cancelability state to the indicated state and returns the
+ *   previous cancelability state at the location referenced by oldstate.
+ *   Legal values for state are TASK_CANCEL_ENABLE and TASK_CANCEL_DISABLE.
+ *
+ *   The cancelability state and type of any newly created tasks are
+ *   TASK_CANCEL_ENABLE and TASK_CANCEL_DEFERRED respectively.
+ *
+ * Input Parameters:
+ *   state    - the new cancellability state, either TASK_CANCEL_ENABLE or
+ *              TASK_CANCEL_DISABLE
+ *   oldstate - The location to return the old cancellability state.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; ERROR is returned on any failure with the
+ *   errno value set appropriately.
+ *
+ ****************************************************************************/
+
+int task_setcancelstate(int state, FAR int *oldstate)
+{
+  FAR struct tcb_s *tcb = this_task();
+  int ret = OK;
+
+  /* Suppress context changes for a bit so that the flags are stable. (the
+   * flags should not change in interrupt handling).
+   */
+
+  sched_lock();
+
+  /* Return the current state if so requrested */
+
+  if (oldstate != NULL)
+    {
+      if ((tcb->flags & TCB_FLAG_NONCANCELABLE) != 0)
+        {
+          *oldstate = TASK_CANCEL_DISABLE;
+        }
+      else
+        {
+          *oldstate = TASK_CANCEL_ENABLE;
+        }
+    }
+
+  /* Set the new cancellation state */
+
+  if (state == TASK_CANCEL_ENABLE)
+    {
+      /* Clear the non-cancelable flag */
+
+      tcb->flags &= ~TCB_FLAG_NONCANCELABLE;
+
+      /* Check if a cancellation was pending */
+
+      if ((tcb->flags & TCB_FLAG_CANCEL_PENDING) != 0)
+        {
+#ifdef CONFIG_CANCELLATION_POINTS
+          /* If we are using deferred cancellation? */
+
+          if ((tcb->flags & TCB_FLAG_CANCEL_DEFERRED) != 0)
+            {
+              /* Yes.. If we are within a cancellation point, then
+               * notify of the cancellation.
+               */
+
+              if (tcb->cpcount > 0)
+                {
+                  notify_cancellation(tcb);
+                }
+            }
+          else
+#endif
+            {
+              /* No.. We are using asynchronous cancellation.  If the
+               * cancellation was pending in this case, then just exit.
+               */
+
+              tcb->flags &= ~TCB_FLAG_CANCEL_PENDING;
+
+#ifndef CONFIG_DISABLE_PTHREAD
+              if ((tcb->flags & TCB_FLAG_TTYPE_MASK) == TCB_FLAG_TTYPE_PTHREAD)
+                {
+                  pthread_exit(PTHREAD_CANCELED);
+                }
+              else
+#endif
+                {
+                  exit(EXIT_FAILURE);
+                }
+            }
+        }
+    }
+  else if (state == TASK_CANCEL_DISABLE)
+    {
+      /* Set the non-cancelable state */
+
+      tcb->flags |= TCB_FLAG_NONCANCELABLE;
+    }
+  else
+    {
+      set_errno(EINVAL);
+      ret = ERROR;
+    }
+
+  sched_unlock();
+  return ret;
+}
diff --git a/sched/pthread/pthread_setcancelstate.c b/sched/task/task_setcanceltype.c
similarity index 54%
rename from sched/pthread/pthread_setcancelstate.c
rename to sched/task/task_setcanceltype.c
index a17560224e93df5b65a6aafd1e0ea9b2783ba46a..b7536f46258def3500035d15679728cdd732939a 100644
--- a/sched/pthread/pthread_setcancelstate.c
+++ b/sched/task/task_setcanceltype.c
@@ -1,7 +1,7 @@
-/******************************************************************************************
- * sched/pthread/pthread_setcancelstate.c
+/****************************************************************************
+ * sched/task/task_setcanceltype.c
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -31,25 +31,43 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ******************************************************************************************/
+ ****************************************************************************/
 
-/******************************************************************************************
+/****************************************************************************
  * Included Files
- ******************************************************************************************/
+ ****************************************************************************/
 
+#include 
+
+#include 
 #include 
+#include 
 #include 
+
 #include "sched/sched.h"
+#include "task/task.h"
 
-/******************************************************************************************
+/****************************************************************************
  * Public Functions
- ******************************************************************************************/
+ ****************************************************************************/
 
-/******************************************************************************************
- * Name: pthread_setcancelstate
- ******************************************************************************************/
+/****************************************************************************
+ * Name: task_setcancelstate
+ *
+ * Description:
+ *   The task_setcanceltype() function atomically both sets the calling
+ *   thread's cancelability type to the indicated type and returns the
+ *   previous cancelability type at the location referenced by oldtype
+ *   Legal values for type are TASK_CANCEL_DEFERRED and
+ *   TASK_CANCEL_ASYNCHRONOUS.
+ *
+ *   The cancelability state and type of any newly created threads,
+ *   including the thread in which main() was first invoked, are
+ *   TASK_CANCEL_ENABLE and TASK_CANCEL_DEFERRED respectively.
+ *
+ ****************************************************************************/
 
-int pthread_setcancelstate(int state, FAR int *oldstate)
+int task_setcanceltype(int type, FAR int *oldtype)
 {
   FAR struct tcb_s *tcb = this_task();
   int ret = OK;
@@ -60,43 +78,61 @@ int pthread_setcancelstate(int state, FAR int *oldstate)
 
   sched_lock();
 
-  /* Return the current state if so requrested */
+  /* Return the current type if so requrested */
 
-  if (oldstate)
+  if (oldtype != NULL)
     {
-      if ((tcb->flags & TCB_FLAG_NONCANCELABLE) != 0)
+      if ((tcb->flags & TCB_FLAG_CANCEL_DEFERRED) != 0)
         {
-          *oldstate = PTHREAD_CANCEL_DISABLE;
+          *oldtype = TASK_CANCEL_DEFERRED;
         }
       else
         {
-          *oldstate = PTHREAD_CANCEL_ENABLE;
+          *oldtype = TASK_CANCEL_ASYNCHRONOUS;
         }
     }
 
-  /* Set the new cancellation state */
+  /* Set the new cancellation type */
 
-  if (state == PTHREAD_CANCEL_ENABLE)
+  if (type == TASK_CANCEL_ASYNCHRONOUS)
     {
-      unsigned flags = tcb->flags;
-
-      /* Clear the non-cancelable and cancel pending flags */
+      /* Clear the deferred cancellation bit */
 
-      tcb->flags &= ~(TCB_FLAG_NONCANCELABLE | TCB_FLAG_CANCEL_PENDING);
+      tcb->flags &= ~TCB_FLAG_CANCEL_DEFERRED;
 
-      /* If the cancel was pending, then just exit as requested */
+#ifdef CONFIG_CANCELLATION_POINTS
+      /* If we just switched from deferred to asynchronous type and if a
+       * cancellation is pending, then exit now.
+       */
 
-      if (flags & TCB_FLAG_CANCEL_PENDING)
+      if ((tcb->flags & TCB_FLAG_CANCEL_PENDING) != 0 &&
+          (tcb->flags & TCB_FLAG_NONCANCELABLE) == 0)
         {
-          pthread_exit(PTHREAD_CANCELED);
+          tcb->flags &= ~TCB_FLAG_CANCEL_PENDING;
+
+          /* Exit according to the type of the thread */
+
+#ifndef CONFIG_DISABLE_PTHREAD
+          if ((tcb->flags & TCB_FLAG_TTYPE_MASK) == TCB_FLAG_TTYPE_PTHREAD)
+            {
+              pthread_exit(PTHREAD_CANCELED);
+            }
+          else
+#endif
+            {
+              exit(EXIT_FAILURE);
+            }
         }
+#endif
     }
-  else if (state == PTHREAD_CANCEL_DISABLE)
+#ifdef CONFIG_CANCELLATION_POINTS
+  else if (type == TASK_CANCEL_DEFERRED)
     {
-      /* Set the non-cancelable state */
+      /* Set the deferred cancellation type */
 
-      tcb->flags |= TCB_FLAG_NONCANCELABLE;
+      tcb->flags |= TCB_FLAG_CANCEL_DEFERRED;
     }
+#endif
   else
     {
       ret = EINVAL;
diff --git a/sched/task/task_setup.c b/sched/task/task_setup.c
index 6d0ea9c2b2103511d505b4475cef055d850ff001..b3f89abb67b19d75886a876753727b260bd0efea 100644
--- a/sched/task/task_setup.c
+++ b/sched/task/task_setup.c
@@ -182,7 +182,7 @@ static inline void task_inherit_affinity(FAR struct tcb_s *tcb)
  * Name: task_saveparent
  *
  * Description:
- *   Save the task ID of the parent task in the child task's TCB and allocate
+ *   Save the task ID of the parent task in the child task's group and allocate
  *   a child status structure to catch the child task's exit status.
  *
  * Parameters:
@@ -201,83 +201,86 @@ static inline void task_inherit_affinity(FAR struct tcb_s *tcb)
 #ifdef CONFIG_SCHED_HAVE_PARENT
 static inline void task_saveparent(FAR struct tcb_s *tcb, uint8_t ttype)
 {
-  FAR struct tcb_s *rtcb = this_task();
-
-#if defined(HAVE_GROUP_MEMBERS) || defined(CONFIG_SCHED_CHILD_STATUS)
-  DEBUGASSERT(tcb && tcb->group && rtcb->group);
-#else
-#endif
+  DEBUGASSERT(tcb != NULL && tcb->group != NULL);
 
-#ifdef HAVE_GROUP_MEMBERS
-  /* Save the ID of the parent tasks' task group in the child's task group.
-   * Do nothing for pthreads.  The parent and the child are both members of
-   * the same task group.
+  /* Only newly created tasks (and kernel threads) have parents.  None of
+   * this logic applies to pthreads with reside in the same group as the
+   * parent and share that same child/parent relationships.
    */
 
 #ifndef CONFIG_DISABLE_PTHREAD
   if ((tcb->flags & TCB_FLAG_TTYPE_MASK) != TCB_FLAG_TTYPE_PTHREAD)
 #endif
     {
-      /* This is a new task in a new task group, we have to copy the ID from
-       * the parent's task group structure to child's task group.
+      /* Get the TCB of the parent task.  In this case, the calling task. */
+
+      FAR struct tcb_s *rtcb = this_task();
+
+      DEBUGASSERT(rtcb != NULL && rtcb->group != NULL);
+
+#ifdef HAVE_GROUP_MEMBERS
+      /* Save the ID of the parent tasks' task group in the child's task
+       * group.  Copy the ID from the parent's task group structure to
+       * child's task group.
        */
 
       tcb->group->tg_pgid = rtcb->group->tg_gid;
-    }
 
 #else
-  DEBUGASSERT(tcb);
-
-  /* Save the parent task's ID in the child task's TCB.  I am not sure if
-   * this makes sense for the case of pthreads or not, but I don't think it
-   * is harmful in any event.
-   */
+      /* Save the parent task's ID in the child task's group. */
 
-  tcb->ppid = rtcb->pid;
+      tcb->group->tg_ppid = rtcb->pid;
 #endif
 
 #ifdef CONFIG_SCHED_CHILD_STATUS
-  /* Tasks can also suppress retention of their child status by applying
-   * the SA_NOCLDWAIT flag with sigaction().
-   */
-
-  if ((rtcb->group->tg_flags && GROUP_FLAG_NOCLDWAIT) == 0)
-    {
-      FAR struct child_status_s *child;
-
-      /* Make sure that there is not already a structure for this PID in the
-       * parent TCB.  There should not be.
+      /* Tasks can also suppress retention of their child status by applying
+       * the SA_NOCLDWAIT flag with sigaction().
        */
 
-      child = group_findchild(rtcb->group, tcb->pid);
-      DEBUGASSERT(!child);
-      if (!child)
+      if ((rtcb->group->tg_flags && GROUP_FLAG_NOCLDWAIT) == 0)
         {
-          /* Allocate a new status structure  */
+          FAR struct child_status_s *child;
 
-          child = group_allocchild();
-        }
+          /* Make sure that there is not already a structure for this PID in
+           * the parent TCB.  There should not be.
+           */
 
-      /* Did we successfully find/allocate the child status structure? */
+          child = group_findchild(rtcb->group, tcb->pid);
+          DEBUGASSERT(child == NULL);
+          if (child == NULL)
+            {
+              /* Allocate a new status structure  */
 
-      DEBUGASSERT(child);
-      if (child)
-        {
-          /* Yes.. Initialize the structure */
+              child = group_allocchild();
+            }
 
-          child->ch_flags  = ttype;
-          child->ch_pid    = tcb->pid;
-          child->ch_status = 0;
+          /* Did we successfully find/allocate the child status structure? */
+
+          DEBUGASSERT(child != NULL);
+          if (child != NULL)
+            {
+              /* Yes.. Initialize the structure */
 
-          /* Add the entry into the TCB list of children */
+              child->ch_flags  = ttype;
+              child->ch_pid    = tcb->pid;
+              child->ch_status = 0;
 
-          group_addchild(rtcb->group, child);
+              /* Add the entry into the group's list of children */
+
+              group_addchild(rtcb->group, child);
+            }
         }
+
+#else /* CONFIG_SCHED_CHILD_STATUS */
+      /* Child status is not retained.  Simply keep track of the number
+       * child tasks created.
+       */
+
+      DEBUGASSERT(rtcb->group->tg_nchildren < UINT16_MAX);
+      rtcb->group->tg_nchildren++;
+
+#endif /* CONFIG_SCHED_CHILD_STATUS */
     }
-#else
-  DEBUGASSERT(rtcb->nchildren < UINT16_MAX);
-  rtcb->nchildren++;
-#endif
 }
 #else
 #  define task_saveparent(tcb,ttype)
@@ -360,6 +363,7 @@ static int thread_schedsetup(FAR struct tcb_s *tcb, int priority,
       /* Save task priority and entry point in the TCB */
 
       tcb->sched_priority = (uint8_t)priority;
+      tcb->init_priority  = (uint8_t)priority;
 #ifdef CONFIG_PRIORITY_INHERITANCE
       tcb->base_priority  = (uint8_t)priority;
 #endif
@@ -374,6 +378,12 @@ static int thread_schedsetup(FAR struct tcb_s *tcb, int priority,
       tcb->flags         &= ~TCB_FLAG_TTYPE_MASK;
       tcb->flags         |= ttype;
 
+#ifdef CONFIG_CANCELLATION_POINTS
+      /* Set the deferred cancellation type */
+
+      tcb->flags         |= TCB_FLAG_CANCEL_DEFERRED;
+#endif
+
       /* Save the task ID of the parent task in the TCB and allocate
        * a child status structure.
        */
@@ -514,7 +524,7 @@ static inline int task_stackargsetup(FAR struct task_tcb_s *tcb,
    */
 
   argc = 0;
-  if (argv)
+  if (argv != NULL)
     {
       /* A NULL argument terminates the list */
 
@@ -630,20 +640,10 @@ static inline int task_stackargsetup(FAR struct task_tcb_s *tcb,
 int task_schedsetup(FAR struct task_tcb_s *tcb, int priority, start_t start,
                     main_t main, uint8_t ttype)
 {
-  int ret;
-
   /* Perform common thread setup */
 
-  ret = thread_schedsetup((FAR struct tcb_s *)tcb, priority, start,
-                          (CODE void *)main, ttype);
-  if (ret == OK)
-    {
-      /* Save task restart priority */
-
-      tcb->init_priority  = (uint8_t)priority;
-    }
-
-  return ret;
+  return thread_schedsetup((FAR struct tcb_s *)tcb, priority, start,
+                           (CODE void *)main, ttype);
 }
 
 /****************************************************************************
diff --git a/sched/task/task_spawn.c b/sched/task/task_spawn.c
index ef686e03ade36d1a4a1cd10e4d38095fa341f955..af3051ac5c19797a4c395e770dc793f86c1fb8b6 100644
--- a/sched/task/task_spawn.c
+++ b/sched/task/task_spawn.c
@@ -51,22 +51,6 @@
 
 #ifndef CONFIG_BUILD_KERNEL
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -155,7 +139,7 @@ static int task_spawn_exec(FAR pid_t *pidp, FAR const char *name,
   if (pid < 0)
     {
       ret = get_errno();
-      sdbg("ERROR: task_create failed: %d\n", ret);
+      serr("ERROR: task_create failed: %d\n", ret);
       goto errout;
     }
 
@@ -252,7 +236,7 @@ static int task_spawn_proxy(int argc, FAR char *argv[])
           int tmp = task_reparent(0, *g_spawn_parms.pid);
           if (tmp < 0)
             {
-              sdbg("ERROR: task_reparent() failed: %d\n", tmp);
+              serr("ERROR: task_reparent() failed: %d\n", tmp);
             }
         }
 #endif
@@ -350,7 +334,7 @@ int task_spawn(FAR pid_t *pid, FAR const char *name, main_t entry,
 #endif
   int ret;
 
-  svdbg("pid=%p name=%s entry=%p file_actions=%p attr=%p argv=%p\n",
+  sinfo("pid=%p name=%s entry=%p file_actions=%p attr=%p argv=%p\n",
         pid, name, entry, file_actions, attr, argv);
 
   /* If there are no file actions to be performed and there is no change to
@@ -399,7 +383,7 @@ int task_spawn(FAR pid_t *pid, FAR const char *name, main_t entry,
     {
       int errcode = get_errno();
 
-      sdbg("ERROR: sched_getparam failed: %d\n", errcode);
+      serr("ERROR: sched_getparam failed: %d\n", errcode);
       spawn_semgive(&g_spawn_parmsem);
       return errcode;
     }
@@ -425,7 +409,7 @@ int task_spawn(FAR pid_t *pid, FAR const char *name, main_t entry,
   if (proxy < 0)
     {
       ret = get_errno();
-      sdbg("ERROR: Failed to start task_spawn_proxy: %d\n", ret);
+      serr("ERROR: Failed to start task_spawn_proxy: %d\n", ret);
 
       goto errout_with_lock;
     }
@@ -436,7 +420,7 @@ int task_spawn(FAR pid_t *pid, FAR const char *name, main_t entry,
   ret = waitpid(proxy, &status, 0);
   if (ret < 0)
     {
-      sdbg("ERROR: waitpid() failed: %d\n", errno);
+      serr("ERROR: waitpid() failed: %d\n", errno);
       goto errout_with_lock;
     }
 #else
diff --git a/sched/task/task_spawnparms.c b/sched/task/task_spawnparms.c
index df0946c2fb69a8ab6183770357d09f881c7ebe48..bb249e584abb926d51c77a3440beb402bc02edde 100644
--- a/sched/task/task_spawnparms.c
+++ b/sched/task/task_spawnparms.c
@@ -83,7 +83,7 @@ static inline int spawn_close(FAR struct spawn_close_file_action_s *action)
 {
   /* The return value from close() is ignored */
 
-  svdbg("Closing fd=%d\n", action->fd);
+  sinfo("Closing fd=%d\n", action->fd);
 
   (void)close(action->fd);
   return OK;
@@ -95,14 +95,14 @@ static inline int spawn_dup2(FAR struct spawn_dup2_file_action_s *action)
 
   /* Perform the dup */
 
-  svdbg("Dup'ing %d->%d\n", action->fd1, action->fd2);
+  sinfo("Dup'ing %d->%d\n", action->fd1, action->fd2);
 
   ret = dup2(action->fd1, action->fd2);
   if (ret < 0)
     {
       int errcode = get_errno();
 
-      sdbg("ERROR: dup2 failed: %d\n", errcode);
+      serr("ERROR: dup2 failed: %d\n", errcode);
       return -errcode;
     }
 
@@ -116,14 +116,14 @@ static inline int spawn_open(FAR struct spawn_open_file_action_s *action)
 
   /* Open the file */
 
-  svdbg("Open'ing path=%s oflags=%04x mode=%04x\n",
+  sinfo("Open'ing path=%s oflags=%04x mode=%04x\n",
         action->path, action->oflags, action->mode);
 
   fd = open(action->path, action->oflags, action->mode);
   if (fd < 0)
     {
       ret = get_errno();
-      sdbg("ERROR: open failed: %d\n", ret);
+      serr("ERROR: open failed: %d\n", ret);
     }
 
   /* Does the return file descriptor happen to match the required file
@@ -134,16 +134,16 @@ static inline int spawn_open(FAR struct spawn_open_file_action_s *action)
     {
       /* No.. dup2 to get the correct file number */
 
-      svdbg("Dup'ing %d->%d\n", fd, action->fd);
+      sinfo("Dup'ing %d->%d\n", fd, action->fd);
 
       ret = dup2(fd, action->fd);
       if (ret < 0)
         {
           ret = get_errno();
-          sdbg("ERROR: dup2 failed: %d\n", ret);
+          serr("ERROR: dup2 failed: %d\n", ret);
         }
 
-      svdbg("Closing fd=%d\n", fd);
+      sinfo("Closing fd=%d\n", fd);
       close(fd);
     }
 
@@ -246,7 +246,7 @@ int spawn_execattrs(pid_t pid, FAR const posix_spawnattr_t *attr)
 
       if ((attr->flags & POSIX_SPAWN_SETSCHEDULER) == 0)
         {
-          svdbg("Setting priority=%d for pid=%d\n",
+          sinfo("Setting priority=%d for pid=%d\n",
                 param.sched_priority, pid);
 
           (void)sched_setparam(pid, ¶m);
@@ -269,7 +269,7 @@ int spawn_execattrs(pid_t pid, FAR const posix_spawnattr_t *attr)
 
   if ((attr->flags & POSIX_SPAWN_SETSCHEDULER) != 0)
     {
-      svdbg("Setting policy=%d priority=%d for pid=%d\n",
+      sinfo("Setting policy=%d priority=%d for pid=%d\n",
             attr->policy, param.sched_priority, pid);
 
 #ifdef CONFIG_SCHED_SPORADIC
@@ -347,7 +347,7 @@ int spawn_proxyattrs(FAR const posix_spawnattr_t *attr,
 
             case SPAWN_FILE_ACTION_NONE:
             default:
-              sdbg("ERROR: Unknown action: %d\n", entry->action);
+              serr("ERROR: Unknown action: %d\n", entry->action);
               ret = EINVAL;
               break;
             }
diff --git a/sched/task/task_start.c b/sched/task/task_start.c
index acff33e66cd2ca7bf18f97c95ae982a138c80d07..262c8f0b729ea8331f1d7ae8573f0a7a0805e479 100644
--- a/sched/task/task_start.c
+++ b/sched/task/task_start.c
@@ -58,26 +58,6 @@
 
 #define MAX_START_ARGS 256
 
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/sched/task/task_starthook.c b/sched/task/task_starthook.c
index f102afc0a7cab30ca6f6b7d15f468f7254891d2e..cc021ca30b2c22c6c3ff001f678507fd913231a5 100644
--- a/sched/task/task_starthook.c
+++ b/sched/task/task_starthook.c
@@ -45,30 +45,6 @@
 
 #ifdef CONFIG_SCHED_STARTHOOK
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Type Declarations
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/sched/task/task_terminate.c b/sched/task/task_terminate.c
index f9b115f8e40bf4ac996d0cc4041aa3f5949c0ad5..4a42c8232ec0675edb594628039c86439c31db83 100644
--- a/sched/task/task_terminate.c
+++ b/sched/task/task_terminate.c
@@ -103,12 +103,17 @@ int task_terminate(pid_t pid, bool nonblocking)
   FAR struct tcb_s *dtcb;
   FAR dq_queue_t *tasklist;
   irqstate_t flags;
+#ifdef CONFIG_SMP
+  int cpu;
+#endif
+  int ret;
 
-  /* Make sure the task does not become ready-to-run while we are futzing with
-   * its TCB by locking ourselves as the executing task.
+  /* Make sure the task does not become ready-to-run while we are futzing
+   * with its TCB.  Within the critical section, no new task may be started
+   * or terminated (even in the SMP case).
    */
 
-  sched_lock();
+  flags = enter_critical_section();
 
   /* Find for the TCB associated with matching PID */
 
@@ -117,26 +122,60 @@ int task_terminate(pid_t pid, bool nonblocking)
     {
       /* This PID does not correspond to any known task */
 
-      sched_unlock();
-      return -ESRCH;
+      ret = -ESRCH;
+      goto errout_with_lock;
     }
 
+  /* Verify our internal sanity */
+
+#ifdef CONFIG_SMP
+  DEBUGASSERT(dtcb->task_state < NUM_TASK_STATES);
+#else
+  DEBUGASSERT(dtcb->task_state != TSTATE_TASK_RUNNING &&
+              dtcb->task_state < NUM_TASK_STATES);
+#endif
+
+  /* Remove the task from the OS's task lists.  We must be in a critical
+   * section and the must must not be running to do this.
+   */
+
 #ifdef CONFIG_SMP
-  /* We will need some interlocks to assure that no tasks are rescheduled
-   * on any other CPU while we do this.
+  /* In the SMP case, the thread may be running on another CPU.  If that is
+   * the case, then we will pause the CPU that the thread is running on.
    */
 
-#  warning Missing SMP logic
+  cpu = sched_cpu_pause(dtcb);
+
+  /* Get the task list associated with the the thread's state and CPU */
+
+  tasklist = TLIST_HEAD(dtcb->task_state, cpu);
+#else
+  /* In the non-SMP case, we can be assured that the task to be terminated
+   * is not running.  get the task list associated with the task state.
+   */
+
+  tasklist = TLIST_HEAD(dtcb->task_state);
 #endif
 
-  /* Verify our internal sanity */
+  /* Remove the task from the task list */
+
+  dq_rem((FAR dq_entry_t *)dtcb, tasklist);
+  dtcb->task_state = TSTATE_TASK_INVALID;
+
+  /* At this point, the TCB should no longer be accessible to the system */
+
+#ifdef CONFIG_SMP
+  /* Resume the paused CPU (if any) */
 
-  if (dtcb->task_state == TSTATE_TASK_RUNNING ||
-      dtcb->task_state >= NUM_TASK_STATES)
+  if (cpu >= 0)
     {
-      sched_unlock();
-      PANIC();
+      /* I am not yet sure how to handle a failure here. */
+
+      DEBUGVERIFY(up_cpu_resume(cpu));
     }
+#endif /* CONFIG_SMP */
+
+  leave_critical_section(flags);
 
   /* Perform common task termination logic (flushing streams, calling
    * functions registered by at_exit/on_exit, etc.).  We need to do
@@ -151,23 +190,6 @@ int task_terminate(pid_t pid, bool nonblocking)
 
   task_exithook(dtcb, EXIT_SUCCESS, nonblocking);
 
-  /* Remove the task from the OS's task lists. */
-
-#ifdef CONFIG_SMP
-  tasklist = TLIST_HEAD(dtcb->task_state, dtcb->cpu);
-#else
-  tasklist = TLIST_HEAD(dtcb->task_state);
-#endif
-
-  flags = enter_critical_section();
-  dq_rem((FAR dq_entry_t *)dtcb, tasklist);
-  dtcb->task_state = TSTATE_TASK_INVALID;
-  leave_critical_section(flags);
-
-  /* At this point, the TCB should no longer be accessible to the system */
-
-  sched_unlock();
-
   /* Since all tasks pass through this function as the final step in their
    * exit sequence, this is an appropriate place to inform any instrumentation
    * layer that the task no longer exists.
@@ -178,4 +200,8 @@ int task_terminate(pid_t pid, bool nonblocking)
   /* Deallocate its TCB */
 
   return sched_releasetcb(dtcb, dtcb->flags & TCB_FLAG_TTYPE_MASK);
+
+errout_with_lock:
+  leave_critical_section(flags);
+  return ret;
 }
diff --git a/sched/task/task_testcancel.c b/sched/task/task_testcancel.c
new file mode 100644
index 0000000000000000000000000000000000000000..b0407173e3da7adfb66ebf9875713fca3f400bca
--- /dev/null
+++ b/sched/task/task_testcancel.c
@@ -0,0 +1,67 @@
+/****************************************************************************
+ * sched/task/task_testcancel.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include "task/task.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: task_testcancel
+ *
+ * Description:
+ *   The task_testcancel() function creates a cancellation point in the
+ *   calling thread. The task_testcancel() function has no effect if
+ *   cancelability is disabled
+ *
+ ****************************************************************************/
+
+void task_testcancel(void)
+{
+  (void)enter_cancellation_point();
+  leave_cancellation_point();
+}
diff --git a/sched/task/task_vfork.c b/sched/task/task_vfork.c
index b2fef61d3675febe46a480382d9fdf79e0b9432c..73246ac76e6755dff7360889eb0c54e3a1c052b8 100644
--- a/sched/task/task_vfork.c
+++ b/sched/task/task_vfork.c
@@ -41,6 +41,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -268,7 +269,7 @@ FAR struct task_tcb_s *task_vforksetup(start_t retaddr)
   child = (FAR struct task_tcb_s *)kmm_zalloc(sizeof(struct task_tcb_s));
   if (!child)
     {
-      sdbg("ERROR: Failed to allocate TCB\n");
+      serr("ERROR: Failed to allocate TCB\n");
       set_errno(ENOMEM);
       return NULL;
     }
@@ -303,14 +304,14 @@ FAR struct task_tcb_s *task_vforksetup(start_t retaddr)
 
   /* Initialize the task control block.  This calls up_initial_state() */
 
-  svdbg("Child priority=%d start=%p\n", priority, retaddr);
+  sinfo("Child priority=%d start=%p\n", priority, retaddr);
   ret = task_schedsetup(child, priority, retaddr, parent->entry.main, ttype);
   if (ret < OK)
     {
       goto errout_with_tcb;
     }
 
-  svdbg("parent=%p, returning child=%p\n", parent, child);
+  sinfo("parent=%p, returning child=%p\n", parent, child);
   return child;
 
 errout_with_tcb:
@@ -369,7 +370,7 @@ pid_t task_vforkstart(FAR struct task_tcb_s *child)
   int rc;
   int ret;
 
-  svdbg("Starting Child TCB=%p, parent=%p\n", child, this_task());
+  sinfo("Starting Child TCB=%p, parent=%p\n", child, this_task());
   DEBUGASSERT(child);
 
   /* Duplicate the original argument list in the forked child TCB */
@@ -396,50 +397,54 @@ pid_t task_vforkstart(FAR struct task_tcb_s *child)
 
   pid = (int)child->cmn.pid;
 
+  /* Eliminate a race condition by disabling pre-emption.  The child task
+   * can be instantiated, but cannot run until we call waitpid().  This
+   * assures us that we cannot miss the the death-of-child signal (only
+   * needed in the SMP case).
+   */
+
+  sched_lock();
+
   /* Activate the task */
 
   ret = task_activate((FAR struct tcb_s *)child);
   if (ret < OK)
     {
       task_vforkabort(child, -ret);
+      sched_unlock();
       return ERROR;
     }
 
-  /* Since the child task has the same priority as the parent task, it is
-   * now ready to run, but has not yet ran.  It is a requirement that
-   * the parent environment be stable while vfork runs; the child thread
-   * is still dependent on things in the parent thread... like the pointers
-   * into parent thread's stack which will still appear in the child's
-   * registers and environment.
+  /* The child task has not yet ran because pre-emption is disabled.
+   * The child task has the same priority as the parent task, so that
+   * would typically be the case anyway.  However, in the SMP
+   * configuration, the child thread might have already ran on
+   * another CPU if pre-emption were not disabled.
    *
-   * We do not have SIG_CHILD, so we have to do some silly things here.
-   * The simplest way to make sure that the child thread runs to completion
-   * is simply to yield here.  Since the child can only do exit() or
-   * execv/l(), that should be all that is needed.
+   * It is a requirement that the parent environment be stable while
+   * vfork runs; the child thread is still dependent on things in the
+   * parent thread... like the pointers into parent thread's stack
+   * which will still appear in the child's registers and environment.
    *
-   * Hmmm.. this is probably not sufficient.  What if we are running
-   * SCHED_RR?  What if the child thread is suspended and rescheduled
-   * after the parent thread again?
-   */
-
-  /* We can also exploit a bug in the execv() implementation:  The PID
-   * of the task exec'ed by the child will not be the same as the PID of
-   * the child task.  Therefore, waitpid() on the child task's PID will
-   * accomplish what we need to do.
+   * We assure that by waiting for the child thread to exit before
+   * returning to the parent thread.  NOTE that pre-emption will be
+   * re-enabled while we are waiting, giving the child thread the
+   * opportunity to run.
    */
 
   rc = 0;
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   ret = waitpid(pid, &rc, 0);
   if (ret < 0)
     {
-      sdbg("ERROR: waitpid failed: %d\n", errno);
+      serr("ERROR: waitpid failed: %d\n", errno);
     }
 #else
   (void)waitpid(pid, &rc, 0);
 #endif
 
+  sched_unlock();
   return pid;
 }
 
diff --git a/sched/timer/timer.h b/sched/timer/timer.h
index 6165d9e847b3d69aedc8c89535455141836c034a..a700320a390c71935753ce8a961ce17433b6011f 100644
--- a/sched/timer/timer.h
+++ b/sched/timer/timer.h
@@ -1,4 +1,4 @@
-/********************************************************************************
+/****************************************************************************
  * sched/timer/timer.h
  *
  *   Copyright (C) 2007-2009, 2014-2015 Gregory Nutt. All rights reserved.
@@ -31,14 +31,14 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
 #ifndef __SCHED_TIMER_TIMER_H
 #define __SCHED_TIMER_TIMER_H
 
-/********************************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************************/
+ ****************************************************************************/
 
 #include 
 
@@ -49,15 +49,15 @@
 #include 
 #include 
 
-/********************************************************************************
+/****************************************************************************
  * Pre-processor Definitions
- ********************************************************************************/
+ ****************************************************************************/
 
 #define PT_FLAGS_PREALLOCATED 0x01 /* Timer comes from a pool of preallocated timers */
 
-/********************************************************************************
+/****************************************************************************
  * Public Types
- ********************************************************************************/
+ ****************************************************************************/
 
 /* This structure represents one POSIX timer */
 
@@ -74,13 +74,13 @@ struct posix_timer_s
   struct sigevent pt_event;        /* Notification information */
 };
 
-/********************************************************************************
+/****************************************************************************
  * Public Data
- ********************************************************************************/
+ ****************************************************************************/
 
+#if CONFIG_PREALLOC_TIMERS > 0
 /* This is a list of free, preallocated timer structures */
 
-#if CONFIG_PREALLOC_TIMERS > 0
 extern volatile sq_queue_t g_freetimers;
 #endif
 
@@ -91,12 +91,12 @@ extern volatile sq_queue_t g_freetimers;
 
 extern volatile sq_queue_t g_alloctimers;
 
-/********************************************************************************
+/****************************************************************************
  * Public Function Prototypes
- ********************************************************************************/
+ ****************************************************************************/
 
 void weak_function timer_initialize(void);
 void weak_function timer_deleteall(pid_t pid);
-int  timer_release(FAR struct posix_timer_s *timer);
+int timer_release(FAR struct posix_timer_s *timer);
 
 #endif /* __SCHED_TIMER_TIMER_H */
diff --git a/sched/timer/timer_create.c b/sched/timer/timer_create.c
index a573ff38ba2a07732ea61b63acb87562ed961e76..cff93c0a4bbaea299869210ad55dbb62c1bb172c 100644
--- a/sched/timer/timer_create.c
+++ b/sched/timer/timer_create.c
@@ -1,4 +1,4 @@
-/********************************************************************************
+/****************************************************************************
  * sched/timer/timer_create.c
  *
  *   Copyright (C) 2007-2009, 2011, 2014-2016 Gregory Nutt. All rights reserved.
@@ -31,11 +31,11 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************************/
+ ****************************************************************************/
 
 #include 
 
@@ -53,17 +53,17 @@
 
 #ifndef CONFIG_DISABLE_POSIX_TIMERS
 
-/********************************************************************************
+/****************************************************************************
  * Private Functions
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Name: timer_allocate
  *
  * Description:
  *   Allocate one POSIX timer and place it into the allocated timer list.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
 static FAR struct posix_timer_s *timer_allocate(void)
 {
@@ -112,32 +112,33 @@ static FAR struct posix_timer_s *timer_allocate(void)
   return ret;
 }
 
-/********************************************************************************
+/****************************************************************************
  * Public Functions
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Name: timer_create
  *
  * Description:
- *   The  timer_create() function creates per-thread timer using the specified
- *   clock, clock_id, as the timing base. The timer_create() function returns, in
- *   the location referenced by timerid, a timer ID of type timer_t used to identify
- *   the timer in timer requests. This timer ID is unique until the timer is
- *   deleted. The particular clock, clock_id, is defined in . The timer
- *   whose ID is returned will be in a disarmed state upon return from
- *   timer_create().
+ *   The  timer_create() function creates per-thread timer using the
+ *   specified clock, clock_id, as the timing base. The timer_create()
+ *   function returns, in the location referenced by timerid, a timer ID of
+ *   type timer_t used to identify the timer in timer requests. This timer
+ *   ID is unique until the timer is deleted. The particular clock, clock_id,
+ *   is defined in . The timer whose ID is returned will be in a
+ *   disarmed state upon return from timer_create().
  *
- *   The evp argument, if non-NULL, points to a sigevent structure. This structure
- *   is allocated by the called and defines the asynchronous notification to occur.
- *   If the evp argument is NULL, the effect is as if the evp argument pointed to
- *   a sigevent structure with the sigev_notify member having the value SIGEV_SIGNAL,
- *   the sigev_signo having a default signal number, and the sigev_value member
- *   having the value of the timer ID.
+ *   The evp argument, if non-NULL, points to a sigevent structure. This
+ *   structure is allocated by the called and defines the asynchronous
+ *   notification to occur.  If the evp argument is NULL, the effect is as
+ *   if the evp argument pointed to a sigevent structure with the
+ *   sigev_notify member having the value SIGEV_SIGNAL, the sigev_signo
+ *   having a default signal number, and the sigev_value member having the
+ *   value of the timer ID.
  *
- *   Each implementation defines a set of clocks that can be used as timing bases
- *   for per-thread timers. All implementations shall support a clock_id of
- *   CLOCK_REALTIME.
+ *   Each implementation defines a set of clocks that can be used as timing
+ *   bases for per-thread timers. All implementations shall support a
+ *   clock_id of CLOCK_REALTIME.
  *
  * Parameters:
  *   clockid - Specifies the clock to use as the timing base.
@@ -148,30 +149,31 @@ static FAR struct posix_timer_s *timer_allocate(void)
  * Return Value:
  *   If the call succeeds, timer_create() will return 0 (OK) and update the
  *   location referenced by timerid to a timer_t, which can be passed to the
- *   other per-thread timer calls.  If an error occurs, the function will return
- *   a value of -1 (ERROR) and set errno to indicate the error.
+ *   other per-thread timer calls.  If an error occurs, the function will
+ *   return a value of -1 (ERROR) and set errno to indicate the error.
  *
- *   EAGAIN - The system lacks sufficient signal queuing resources to honor the
- *    request.
- *   EAGAIN - The calling process has already created all of the timers it is
- *     allowed by this implementation.
+ *   EAGAIN - The system lacks sufficient signal queuing resources to honor
+ *     the request.
+ *   EAGAIN - The calling process has already created all of the timers it
+ *     is allowed by this implementation.
  *   EINVAL - The specified clock ID is not defined.
- *   ENOTSUP - The implementation does not support the creation of a timer attached
- *     to the CPU-time clock that is specified by clock_id and associated with a
- *     thread different thread invoking timer_create().
+ *   ENOTSUP - The implementation does not support the creation of a timer
+ *     attached to the CPU-time clock that is specified by clock_id and
+ *     associated with a thread different thread invoking timer_create().
  *
  * Assumptions:
  *
- ********************************************************************************/
+ ****************************************************************************/
 
-int timer_create(clockid_t clockid, FAR struct sigevent *evp, FAR timer_t *timerid)
+int timer_create(clockid_t clockid, FAR struct sigevent *evp,
+                 FAR timer_t *timerid)
 {
   FAR struct posix_timer_s *ret;
   WDOG_ID wdog;
 
   /* Sanity checks.  Also, we support only CLOCK_REALTIME */
 
-  if (!timerid || clockid != CLOCK_REALTIME)
+  if (timerid == NULL || clockid != CLOCK_REALTIME)
     {
       set_errno(EINVAL);
       return ERROR;
diff --git a/sched/timer/timer_delete.c b/sched/timer/timer_delete.c
index 495db81dc1da285246edb59e4094f02fd98e0d72..6d6e5bebc12fefcf0932c522a7efc5e29242eff5 100644
--- a/sched/timer/timer_delete.c
+++ b/sched/timer/timer_delete.c
@@ -1,4 +1,4 @@
-/********************************************************************************
+/****************************************************************************
  * sched/timer/timer_delete.c
  *
  *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
@@ -31,11 +31,11 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************************/
+ ****************************************************************************/
 
 #include 
 
@@ -46,34 +46,34 @@
 
 #ifndef CONFIG_DISABLE_POSIX_TIMERS
 
-/********************************************************************************
+/****************************************************************************
  * Public Functions
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Name: timer_delete
  *
  * Description:
- *   The timer_delete() function deletes the specified timer, timerid, previously
- *   created by the timer_create() function. If the timer is armed when
- *   timer_delete() is called, the timer will be automatically disarmed before
- *   removal. The disposition of pending signals for the deleted timer is
- *   unspecified.
+ *   The timer_delete() function deletes the specified timer, timerid,
+ *   previously created by the timer_create() function. If the timer is
+ *   armed when timer_delete() is called, the timer will be automatically
+ *   disarmed before removal. The disposition of pending signals for the
+ *   deleted timer is unspecified.
  *
  * Parameters:
  *   timerid - The per-thread timer, previously created by the call to
  *   timer_create(), to be deleted.
  *
  * Return Value:
- *   If the call succeeds, timer_create() will return 0 (OK).  Otherwise, the
- *   function will return a value of -1 (ERROR) and set errno to indicate the
- *   error.
+ *   If the call succeeds, timer_create() will return 0 (OK).  Otherwise,
+ *   the function will return a value of -1 (ERROR) and set errno to
+ *   indicate the error.
  *
  *   EINVAL - The timer specified timerid is not valid.
  *
  * Assumptions:
  *
- ********************************************************************************/
+ ****************************************************************************/
 
 int timer_delete(timer_t timerid)
 {
diff --git a/sched/timer/timer_getoverrun.c b/sched/timer/timer_getoverrun.c
index e92a81bef9b928925855a120eaa3928144c7f2e8..da07dcedcacc5936ebed171a04559cce88a8b443 100644
--- a/sched/timer/timer_getoverrun.c
+++ b/sched/timer/timer_getoverrun.c
@@ -1,4 +1,4 @@
-/********************************************************************************
+/****************************************************************************
  * sched/timer/timer_getoverrun.c
  *
  *   Copyright (C) 2007, 2008, 2011 Gregory Nutt. All rights reserved.
@@ -31,11 +31,11 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************************/
+ ****************************************************************************/
 
 #include 
 
@@ -46,30 +46,31 @@
 
 #ifndef CONFIG_DISABLE_POSIX_TIMERS
 
-/********************************************************************************
+/****************************************************************************
  * Public Functions
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Name: timer_getoverrun
  *
  * Description:
- *   Only a single signal will be queued to the process for a given timer at any
- *   point in time.  When a timer for which a signal is still pending expires, no
- *   signal will be queued, and a timer overrun will occur. When a timer
- *   expiration signal is delivered to or accepted by a process, if the
- *   implementation  supports  the  Realtime Signals Extension, the
- *   timer_getoverrun() function will return the timer expiration overrun count for
- *   the specified timer. The overrun count returned contains the number of extra
- *   timer expirations that occurred between the time the signal was generated
- *   (queued) and when it was delivered or accepted, up to but not including an
- *   implementation-defined  maximum of DELAYTIMER_MAX. If the number of such
- *   extra expirations is greater than or equal to DELAYTIMER_MAX, then the
- *   overrun count will be set to DELAYTIMER_MAX. The value returned by
- *   timer_getoverrun() will apply to the most recent expiration signal delivery
- *   or acceptance for the timer.  If no expiration signal has been delivered
- *   for the timer, or if the Realtime Signals Extension is not supported, the
- *   return value of timer_getoverrun() is unspecified.
+ *   Only a single signal will be queued to the process for a given timer at
+ *   any point in time.  When a timer for which a signal is still pending
+ *   expires, no signal will be queued, and a timer overrun will occur. When
+ *   a timer expiration signal is delivered to or accepted by a process, if
+ *   the implementation  supports  the  Realtime Signals Extension, the
+ *   timer_getoverrun() function will return the timer expiration overrun
+ *   count for the specified timer. The overrun count returned contains the
+ *   number of extra timer expirations that occurred between the time the
+ *   signal was generated (queued) and when it was delivered or accepted, up
+ *   to but not including an implementation-defined  maximum of
+ *   DELAYTIMER_MAX. If the number of such extra expirations is greater than
+ *   or equal to DELAYTIMER_MAX, then the overrun count will be set to
+ *   DELAYTIMER_MAX. The value returned by timer_getoverrun() will apply to
+ *   the most recent expiration signal delivery or acceptance for the timer.
+ *   If no expiration signal has been delivered for the timer, or if the
+ *   Realtime Signals Extension is not supported, the return value of
+ *   timer_getoverrun() is unspecified.
  *
  * Parameters:
  *   timerid - The pre-thread timer, previously created by the call to
@@ -77,14 +78,15 @@
  *
  * Return Value:
  *   If the timer_getoverrun() function succeeds, it will return the timer
- *   expiration overrun count as explained above. timer_getoverrun() will fail if:
+ *   expiration overrun count as explained above. timer_getoverrun() will
+ *   fail if:
  *
  *   EINVAL - The timerid argument does not correspond to an ID returned by
  *     timer_create() but not yet deleted by timer_delete().
  *
  * Assumptions:
  *
- ********************************************************************************/
+ ****************************************************************************/
 
 int timer_getoverrun(timer_t timerid)
 {
diff --git a/sched/timer/timer_gettime.c b/sched/timer/timer_gettime.c
index 44bf877c9f3c1557a89e382747371691349f252f..c1e58899b452f98f1927c337f32c85c22e8642ba 100644
--- a/sched/timer/timer_gettime.c
+++ b/sched/timer/timer_gettime.c
@@ -1,4 +1,4 @@
-/********************************************************************************
+/****************************************************************************
  * sched/timer/timer_gettime.c
  *
  *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
@@ -31,11 +31,11 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************************/
+ ****************************************************************************/
 
 #include 
 
@@ -47,21 +47,22 @@
 
 #ifndef CONFIG_DISABLE_POSIX_TIMERS
 
-/********************************************************************************
+/****************************************************************************
  * Public Functions
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Name: timer_gettime
  *
  * Description:
- *  The timer_gettime() function will store the amount of time until the
- *  specified timer, timerid, expires and the reload value of the timer into the
- *  space pointed to by the value argument. The it_value member of this structure
- *  will contain the amount of time before the timer expires, or zero if the timer
- *  is disarmed. This value is returned as the interval until timer expiration,
- *  even if the timer was armed with absolute time. The it_interval member of
- *  value will contain the reload value last set by timer_settime().
+ *   The timer_gettime() function will store the amount of time until the
+ *   specified timer, timerid, expires and the reload value of the timer
+ *   into the space pointed to by the value argument. The it_value member
+ *   of this structure will contain the amount of time before the timer
+ *   expires, or zero if the timer is disarmed. This value is returned as
+ *   the interval until timer expiration, even if the timer was armed with
+ *   absolute time. The it_interval member of value will contain the reload
+ *   value last set by timer_settime().
  *
  * Parameters:
  *   timerid - The pre-thread timer, previously created by the call to
@@ -69,8 +70,8 @@
  *
  * Return Value:
  *   If the timer_gettime() succeeds, a value of 0 (OK) will be returned.
- *   If an error occurs, the value -1 (ERROR) will be returned, and errno set to
- *   indicate the error.
+ *   If an error occurs, the value -1 (ERROR) will be returned, and errno
+ *   set to indicate the error.
  *
  *   EINVAL - The timerid argument does not correspond to an ID returned by
  *     timer_create() but not yet deleted by timer_delete().
@@ -80,7 +81,7 @@
  *   by this function could be significantly more than that actual time
  *   remaining on the timer at any time.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
 int timer_gettime(timer_t timerid, FAR struct itimerspec *value)
 {
diff --git a/sched/timer/timer_initialize.c b/sched/timer/timer_initialize.c
index 2a215c605cfac5584048d5756f5ad99de05ad0e7..25a64b1a51afef22525b569370b96694350f320b 100644
--- a/sched/timer/timer_initialize.c
+++ b/sched/timer/timer_initialize.c
@@ -1,4 +1,4 @@
-/********************************************************************************
+/****************************************************************************
  * sched/timer/timer_initialize.c
  *
  *   Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
@@ -31,11 +31,11 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************************/
+ ****************************************************************************/
 
 #include 
 #include 
@@ -51,9 +51,9 @@
 
 #ifndef CONFIG_DISABLE_POSIX_TIMERS
 
-/********************************************************************************
+/****************************************************************************
  * Private Data
- ********************************************************************************/
+ ****************************************************************************/
 
 /* These are the preallocated times */
 
@@ -61,28 +61,28 @@
 static struct posix_timer_s g_prealloctimers[CONFIG_PREALLOC_TIMERS];
 #endif
 
-/********************************************************************************
+/****************************************************************************
  * Public Data
- ********************************************************************************/
+ ****************************************************************************/
 
+#if CONFIG_PREALLOC_TIMERS > 0
 /* This is a list of free, preallocated timer structures */
 
-#if CONFIG_PREALLOC_TIMERS > 0
 volatile sq_queue_t g_freetimers;
 #endif
 
-/* This is a list of instantiated timer structures -- active and inactive.  The
- * timers are place on this list by timer_create() and removed from the list by
- * timer_delete() or when the owning thread exits.
+/* This is a list of instantiated timer structures -- active and inactive.
+ * The timers are place on this list by timer_create() and removed from the
+ * list by timer_delete() or when the owning thread exits.
  */
 
 volatile sq_queue_t g_alloctimers;
 
-/********************************************************************************
+/****************************************************************************
  * Public Functions
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Name: timer_initialize
  *
  * Description:
@@ -94,9 +94,7 @@ volatile sq_queue_t g_alloctimers;
  * Return Value:
  *   None
  *
- * Assumptions:
- *
- ********************************************************************************/
+ ****************************************************************************/
 
 void weak_function timer_initialize(void)
 {
@@ -120,12 +118,12 @@ void weak_function timer_initialize(void)
   sq_init((FAR sq_queue_t *)&g_alloctimers);
 }
 
-/********************************************************************************
+/****************************************************************************
  * Name: timer_deleteall
  *
  * Description:
- *   This function is called whenever a thread exits.  Any timers owned by that
- *   thread are deleted as though called by timer_delete().
+ *   This function is called whenever a thread exits.  Any timers owned by
+ *   that thread are deleted as though called by timer_delete().
  *
  *   It is provided in this file so that it can be weakly defined but also,
  *   like timer_intitialize(), be brought into the link whenever the timer
@@ -137,9 +135,7 @@ void weak_function timer_initialize(void)
  * Return Value:
  *   None
  *
- * Assumptions:
- *
- ********************************************************************************/
+ ****************************************************************************/
 
 void weak_function timer_deleteall(pid_t pid)
 {
@@ -148,7 +144,9 @@ void weak_function timer_deleteall(pid_t pid)
   irqstate_t flags;
 
   flags = enter_critical_section();
-  for (timer = (FAR struct posix_timer_s *)g_alloctimers.head; timer; timer = next)
+  for (timer = (FAR struct posix_timer_s *)g_alloctimers.head;
+       timer != NULL;
+       timer = next)
     {
       next = timer->flink;
       if (timer->pt_owner == pid)
diff --git a/sched/timer/timer_release.c b/sched/timer/timer_release.c
index 3ad62febbc11ab827d9df72892892262cb1688d1..2608092a16f9a2da6bd8f0bdca6eed5cdd9f99fc 100644
--- a/sched/timer/timer_release.c
+++ b/sched/timer/timer_release.c
@@ -1,4 +1,4 @@
-/********************************************************************************
+/****************************************************************************
  * sched/timer/timer_release.c
  *
  *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
@@ -31,11 +31,11 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************************/
+ ****************************************************************************/
 
 #include 
 
@@ -49,19 +49,19 @@
 
 #ifndef CONFIG_DISABLE_POSIX_TIMERS
 
-/********************************************************************************
+/****************************************************************************
  * Private Functions
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Name: timer_free
  *
  * Description:
- *   Remove the timer from the allocated timer list and free it or return it to
- *   the free list (depending on whether or not the timer is one of the
+ *   Remove the timer from the allocated timer list and free it or return it
+ *   to the free list (depending on whether or not the timer is one of the
  *   preallocated timers)
  *
- ********************************************************************************/
+ ****************************************************************************/
 
 static inline void timer_free(struct posix_timer_s *timer)
 {
@@ -90,29 +90,30 @@ static inline void timer_free(struct posix_timer_s *timer)
     }
 }
 
-/********************************************************************************
+/****************************************************************************
  * Public Functions
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Name: timer_release
  *
  * Description:
- *   timer_release implements the heart of timer_delete.  It is private to the
- *   the OS internals and differs only in that return value of 1 means that the
- *   timer was not actually deleted.
+ *   timer_release implements the heart of timer_delete.  It is private to
+ *   the OS internals and differs only in that return value of 1 means that
+ *   the timer was not actually deleted.
  *
  * Parameters:
  *   timer - The per-thread timer, previously created by the call to
  *     timer_create(), to be deleted.
  *
  * Return Value:
- *   If the call succeeds, timer_release() will return 0 (OK) or 1 (meaning that
- *   the timer is still valid).  Otherwise, the function will return a negated errno:
+ *   If the call succeeds, timer_release() will return 0 (OK) or 1 (meaning
+ *   that the timer is still valid).  Otherwise, the function will return a
+ *   negated errno value:
  *
  *   -EINVAL - The timer specified timerid is not valid.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
 int timer_release(FAR struct posix_timer_s *timer)
 {
diff --git a/sched/timer/timer_settime.c b/sched/timer/timer_settime.c
index d134441e3e8ed2d811b2a93dd989fe2efc236c0d..aa6007f95aa453df0967a4f7b59c2a12416b1654 100644
--- a/sched/timer/timer_settime.c
+++ b/sched/timer/timer_settime.c
@@ -1,4 +1,4 @@
-/********************************************************************************
+/****************************************************************************
  * sched/timer/timer_settime.c
  *
  *   Copyright (C) 2007-2010, 2013-2016 Gregory Nutt. All rights reserved.
@@ -31,11 +31,11 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************************/
+ ****************************************************************************/
 
 #include 
 
@@ -53,19 +53,20 @@
 
 #ifndef CONFIG_DISABLE_POSIX_TIMERS
 
-/********************************************************************************
+/****************************************************************************
  * Private Function Prototypes
- ********************************************************************************/
+ ****************************************************************************/
 
 static inline void timer_signotify(FAR struct posix_timer_s *timer);
-static inline void timer_restart(FAR struct posix_timer_s *timer, wdparm_t itimer);
+static inline void timer_restart(FAR struct posix_timer_s *timer,
+                                 wdparm_t itimer);
 static void timer_timeout(int argc, wdparm_t itimer);
 
-/********************************************************************************
+/****************************************************************************
  * Private Functions
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Name: timer_signotify
  *
  * Description:
@@ -81,7 +82,7 @@ static void timer_timeout(int argc, wdparm_t itimer);
  * Assumptions:
  *   This function executes in the context of the watchod timer interrupt.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
 static inline void timer_signotify(FAR struct posix_timer_s *timer)
 {
@@ -121,7 +122,7 @@ static inline void timer_signotify(FAR struct posix_timer_s *timer)
 #endif
 }
 
-/********************************************************************************
+/****************************************************************************
  * Name: timer_restart
  *
  * Description:
@@ -136,7 +137,7 @@ static inline void timer_signotify(FAR struct posix_timer_s *timer)
  * Assumptions:
  *   This function executes in the context of the watchdog timer interrupt.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
 static inline void timer_restart(FAR struct posix_timer_s *timer,
                                  wdparm_t itimer)
@@ -146,12 +147,12 @@ static inline void timer_restart(FAR struct posix_timer_s *timer,
   if (timer->pt_delay)
     {
       timer->pt_last = timer->pt_delay;
-      (void)wd_start(timer->pt_wdog, timer->pt_delay, (wdentry_t)timer_timeout,
-                     1, itimer);
+      (void)wd_start(timer->pt_wdog, timer->pt_delay,
+                     (wdentry_t)timer_timeout, 1, itimer);
     }
 }
 
-/********************************************************************************
+/****************************************************************************
  * Name: timer_timeout
  *
  * Description:
@@ -169,13 +170,14 @@ static inline void timer_restart(FAR struct posix_timer_s *timer,
  * Assumptions:
  *   This function executes in the context of the watchod timer interrupt.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
 static void timer_timeout(int argc, wdparm_t itimer)
 {
 #ifndef CONFIG_CAN_PASS_STRUCTS
-  /* On many small machines, pointers are encoded and cannot be simply cast from
-   * wdparm_t to struct tcb_s *.  The following union works around this (see wdogparm_t).
+  /* On many small machines, pointers are encoded and cannot be simply cast
+   * from wdparm_t to struct tcb_s *.  The following union works around this
+   * (see wdogparm_t).
    */
 
   union
@@ -186,9 +188,9 @@ static void timer_timeout(int argc, wdparm_t itimer)
 
   u.itimer = itimer;
 
-  /* Send the specified signal to the specified task.   Increment the reference
-   * count on the timer first so that will not be deleted until after the
-   * signal handler returns.
+  /* Send the specified signal to the specified task.   Increment the
+   * reference count on the timer first so that will not be deleted until
+   * after the signal handler returns.
    */
 
   u.timer->pt_crefs++;
@@ -207,9 +209,9 @@ static void timer_timeout(int argc, wdparm_t itimer)
 #else
   FAR struct posix_timer_s *timer = (FAR struct posix_timer_s *)itimer;
 
-  /* Send the specified signal to the specified task.   Increment the reference
-   * count on the timer first so that will not be deleted until after the
-   * signal handler returns.
+  /* Send the specified signal to the specified task.   Increment the
+   * reference count on the timer first so that will not be deleted until
+   * after the signal handler returns.
    */
 
   timer->pt_crefs++;
@@ -228,62 +230,63 @@ static void timer_timeout(int argc, wdparm_t itimer)
 #endif
 }
 
-/********************************************************************************
+/****************************************************************************
  * Public Functions
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Name: timer_settime
  *
  * Description:
- *   The timer_settime() function sets the time until the next expiration of the
- *   timer specified by timerid from the it_value member of the value argument
- *   and arm the timer if the it_value member of value is non-zero. If the
- *   specified timer was already armed when timer_settime() is called, this call
- *   will reset the time until next expiration to the value specified. If the
- *   it_value member of value is zero, the timer will be disarmed. The effect
- *   of disarming or resetting a timer with pending expiration notifications is
- *   unspecified.
+ *   The timer_settime() function sets the time until the next expiration of
+ *   the timer specified by timerid from the it_value member of the value
+ *   argument and arm the timer if the it_value member of value is non-zero.
+ *   If the specified timer was already armed when timer_settime() is
+ *   called, this call will reset the time until next expiration to the
+ *   value specified. If the it_value member of value is zero, the timer
+ *   will be disarmed. The effect of disarming or resetting a timer with
+ *   pending expiration notifications is unspecified.
  *
- *   If the flag TIMER_ABSTIME is not set in the argument flags, timer_settime()
- *   will behave as if the time until next expiration is set to be equal to the
- *   interval specified by the it_value member of value. That is, the timer will
- *   expire in it_value nanoseconds from when the call is made. If the flag
- *   TIMER_ABSTIME is set in the argument flags, timer_settime() will behave as
- *   if the time until next expiration is set to be equal to the difference between
- *   the absolute time specified by the it_value member of value and the current
- *   value of the clock associated with timerid.  That is, the timer will expire
- *   when the clock reaches the value specified by the it_value member of value.
- *   If the specified time has already passed, the function will succeed and the
+ *   If the flag TIMER_ABSTIME is not set in the argument flags,
+ *   timer_settime() will behave as if the time until next expiration is set
+ *   to be equal to the interval specified by the it_value member of value.
+ *   That is, the timer will expire in it_value nanoseconds from when the
+ *   call is made. If the flag TIMER_ABSTIME is set in the argument flags,
+ *   timer_settime() will behave as if the time until next expiration is set
+ *   to be equal to the difference between the absolute time specified by
+ *   the it_value member of value and the current value of the clock
+ *   associated with timerid.  That is, the timer will expire when the clock
+ *   reaches the value specified by the it_value member of value.  If the
+ *   specified time has already passed, the function will succeed and the
  *   expiration notification will be made.
  *
  *   The reload value of the timer will be set to the value specified by the
  *   it_interval member of value.  When a timer is armed with a non-zero
  *   it_interval, a periodic (or repetitive) timer is specified.
  *
- *   Time values that are between two consecutive non-negative integer multiples
- *   of the resolution of the specified timer will be rounded up to the larger
- *   multiple of the resolution. Quantization error will not cause the timer to
- *   expire earlier than the rounded time value.
+ *   Time values that are between two consecutive non-negative integer
+ *   multiples of the resolution of the specified timer will be rounded up
+ *   to the larger multiple of the resolution. Quantization error will not
+ *   cause the timer to expire earlier than the rounded time value.
  *
- *   If the argument ovalue is not NULL, the timer_settime() function will store,
- *   in the location referenced by ovalue, a value representing the previous
- *   amount of time before the timer would have expired, or zero if the timer was
- *   disarmed, together with the previous timer reload value. Timers will not
- *   expire before their scheduled time.
+ *   If the argument ovalue is not NULL, the timer_settime() function will
+ *   store, in the location referenced by ovalue, a value representing the
+ *   previous amount of time before the timer would have expired, or zero if
+ *   the timer was disarmed, together with the previous timer reload value.
+ *   Timers will not expire before their scheduled time.
  *
  * Parameters:
  *   timerid - The pre-thread timer, previously created by the call to
  *     timer_create(), to be be set.
  *   flags - Specifie characteristics of the timer (see above)
  *   value - Specifies the timer value to set
- *   ovalue - A location in which to return the time remaining from the previous
- *     timer setting. (ignored)
+ *   ovalue - A location in which to return the time remaining from the
+ *     previous timer setting. (ignored)
  *
  * Return Value:
  *   If the timer_settime() succeeds, a value of 0 (OK) will be returned.
- *   If an error occurs, the value -1 (ERROR) will be returned, and errno set to
- *   indicate the error.
+ *   If an error occurs, the value -1 (ERROR) will be returned, and errno set
+ *   to indicate the error.
  *
  *   EINVAL - The timerid argument does not correspond to an ID returned by
  *     timer_create() but not yet deleted by timer_delete().
@@ -293,9 +296,10 @@ static void timer_timeout(int argc, wdparm_t itimer)
  *
  * Assumptions:
  *
- ********************************************************************************/
+ ****************************************************************************/
 
-int timer_settime(timer_t timerid, int flags, FAR const struct itimerspec *value,
+int timer_settime(timer_t timerid, int flags,
+                  FAR const struct itimerspec *value,
                   FAR struct itimerspec *ovalue)
 {
   FAR struct posix_timer_s *timer = (FAR struct posix_timer_s *)timerid;
@@ -373,7 +377,6 @@ int timer_settime(timer_t timerid, int flags, FAR const struct itimerspec *value
 
   /* Then start the watchdog */
 
-
   if (delay > 0)
     {
       timer->pt_last = delay;
diff --git a/sched/wdog/wd_cancel.c b/sched/wdog/wd_cancel.c
index ac8db7ed3375e4f6a08fa868327877be83e7fc0b..040385d31d50c39abc556cc974fbe73ebdfbc379 100644
--- a/sched/wdog/wd_cancel.c
+++ b/sched/wdog/wd_cancel.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * sched/wdog/wd_cancel.c
  *
- *   Copyright (C) 2007-2009, 2014, 2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2014, 2016-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -41,6 +41,7 @@
 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -64,9 +65,8 @@
  *   wdog - ID of the watchdog to cancel.
  *
  * Return Value:
- *   OK or ERROR
- *
- * Assumptions:
+ *   Zero (OK) is returned on success;  A negated errno value is returned to
+ *   indicate the nature of any failure.
  *
  ****************************************************************************/
 
@@ -75,7 +75,7 @@ int wd_cancel(WDOG_ID wdog)
   FAR struct wdog_s *curr;
   FAR struct wdog_s *prev;
   irqstate_t flags;
-  int ret = ERROR;
+  int ret = -EINVAL;
 
   /* Prohibit timer interactions with the timer queue until the
    * cancellation is complete
@@ -87,7 +87,7 @@ int wd_cancel(WDOG_ID wdog)
    * active.
    */
 
-  if (wdog && WDOG_ISACTIVE(wdog))
+  if (wdog != NULL && WDOG_ISACTIVE(wdog))
     {
       /* Search the g_wdactivelist for the target FCB.  We can't use sq_rem
        * to do this because there are additional operations that need to be
diff --git a/sched/wdog/wd_create.c b/sched/wdog/wd_create.c
index 416da9c351f3a1234cecadf57acf859de8490c80..6b9f944cd9367e627641889008d138a5ea76ddb3 100644
--- a/sched/wdog/wd_create.c
+++ b/sched/wdog/wd_create.c
@@ -57,8 +57,8 @@
  * Name: wd_create
  *
  * Description:
- *   The wd_create function will create a watchdog by allocating it from the
- *   list of free watchdogs.
+ *   The wd_create function will create a watchdog timer by allocating one
+ *   from the list of free watchdog timers.
  *
  * Parameters:
  *   None
@@ -67,8 +67,6 @@
  *   Pointer to watchdog (i.e., the watchdog ID), or NULL if insufficient
  *   watchdogs are available.
  *
- * Assumptions:
- *
  ****************************************************************************/
 
 WDOG_ID wd_create (void)
diff --git a/sched/wdog/wd_delete.c b/sched/wdog/wd_delete.c
index d28252fce47e80277c9794a73b36d9b59fbd4b76..a497c1146e05dc15ca25f6fe232d7464d56ab07b 100644
--- a/sched/wdog/wd_delete.c
+++ b/sched/wdog/wd_delete.c
@@ -58,9 +58,9 @@
  * Name: wd_delete
  *
  * Description:
- *   The wd_delete function will deallocate a watchdog by returning it to
- *   the free pool of watchdogs.  The watchdog will be removed from the timer
- *   queue if has been started.
+ *   The wd_delete() function will deallocate a watchdog timer by returning
+ *   it to the free pool of watchdog timers.  The watchdog timer will be
+ *   removed from the active timer queue if had been started.
  *
  * Parameters:
  *   wdog - The watchdog ID to delete.  This is actually a pointer to a
diff --git a/sched/wdog/wd_gettime.c b/sched/wdog/wd_gettime.c
index f533f42f1ec2868c9122887700ea01f83e89fdd4..0e48dec2f3888b969b34284c4e2b8c8e213290dd 100644
--- a/sched/wdog/wd_gettime.c
+++ b/sched/wdog/wd_gettime.c
@@ -1,4 +1,4 @@
-/********************************************************************************
+/****************************************************************************
  * sched/wdog/wd_gettime.c
  *
  *   Copyright (C) 2007, 2009, 2014-2016 Gregory Nutt. All rights reserved.
@@ -31,11 +31,11 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************************/
+ ****************************************************************************/
 
 #include 
 
@@ -44,27 +44,26 @@
 
 #include "wdog/wdog.h"
 
-/********************************************************************************
+/****************************************************************************
  * Public Functions
- ********************************************************************************/
+ ****************************************************************************/
 
-/********************************************************************************
+/****************************************************************************
  * Name: wd_gettime
  *
  * Description:
  *   This function returns the time remaining before the specified watchdog
- *   expires.
+ *   timer expires.
  *
  * Parameters:
- *   wdog = watchdog ID
+ *   wdog - watchdog ID
  *
  * Return Value:
- *   The time in system ticks remaining until the watchdog time expires.  Zero
- *   means either that wdog is not valid or that the wdog has already expired.
+ *   The time in system ticks remaining until the watchdog time expires.
+ *   Zero means either that wdog is not valid or that the wdog has already
+ *   expired.
  *
- * Assumptions:
- *
- ********************************************************************************/
+ ****************************************************************************/
 
 int wd_gettime(WDOG_ID wdog)
 {
@@ -73,16 +72,18 @@ int wd_gettime(WDOG_ID wdog)
   /* Verify the wdog */
 
   flags = enter_critical_section();
-  if (wdog && WDOG_ISACTIVE(wdog))
+  if (wdog != NULL && WDOG_ISACTIVE(wdog))
     {
-      /* Traverse the watchdog list accumulating lag times until we find the wdog
-       * that we are looking for
+      /* Traverse the watchdog list accumulating lag times until we find the
+       * wdog that we are looking for
        */
 
       FAR struct wdog_s *curr;
       int delay = 0;
 
-      for (curr = (FAR struct wdog_s *)g_wdactivelist.head; curr; curr = curr->next)
+      for (curr = (FAR struct wdog_s *)g_wdactivelist.head;
+           curr != NULL;
+           curr = curr->next)
         {
           delay += curr->lag;
           if (curr == wdog)
diff --git a/sched/wdog/wd_start.c b/sched/wdog/wd_start.c
index 9e99d01277fb462f3258650f57d1b1663ae08575..227a7933bd93f6e379ffd08eede1a556f3027d88 100644
--- a/sched/wdog/wd_start.c
+++ b/sched/wdog/wd_start.c
@@ -190,10 +190,10 @@ static inline void wd_expiration(void)
  * Name: wd_start
  *
  * Description:
- *   This function adds a watchdog to the timer queue.  The specified
- *   watchdog function will be called from the interrupt level after the
- *   specified number of ticks has elapsed. Watchdog timers may be started
- *   from the interrupt level.
+ *   This function adds a watchdog timer to the actuve timer queue.  The
+ *   specified watchdog function at 'wdentry' will be called from the
+ *   interrupt level after the specified number of ticks has elapsed.
+ *   Watchdog timers may be started from the interrupt level.
  *
  *   Watchdog timers execute in the address environment that was in effect
  *   when wd_start() is called.
@@ -205,10 +205,10 @@ static inline void wd_expiration(void)
  *   on a given watchdog ID has any effect.
  *
  * Parameters:
- *   wdog     = watchdog ID
- *   delay    = Delay count in clock ticks
- *   wdentry  = function to call on timeout
- *   parm1..4 = parameters to pass to wdentry
+ *   wdog     - watchdog ID
+ *   delay    - Delay count in clock ticks
+ *   wdentry  - function to call on timeout
+ *   parm1..4 - parameters to pass to wdentry
  *
  * Return Value:
  *   OK or ERROR
@@ -260,7 +260,7 @@ int wd_start(WDOG_ID wdog, int32_t delay, wdentry_t wdentry,  int argc, ...)
     {
       wdog->parm[i] = va_arg(ap, wdparm_t);
     }
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
   for (; i < CONFIG_MAX_WDOGPARMS; i++)
     {
       wdog->parm[i] = 0;
@@ -421,11 +421,28 @@ int wd_start(WDOG_ID wdog, int32_t delay, wdentry_t wdentry,  int argc, ...)
 unsigned int wd_timer(int ticks)
 {
   FAR struct wdog_s *wdog;
+#ifdef CONFIG_SMP
+  irqstate_t flags;
+#endif
+  unsigned int ret;
   int decr;
 
+#ifdef CONFIG_SMP
+  /* We are in an interrupt handler as, as a consequence, interrupts are
+   * disabled.  But in the SMP case, interrupst MAY be disabled only on
+   * the local CPU since most architectures do not permit disabling
+   * interrupts on other CPUS.
+   *
+   * Hence, we must follow rules for critical sections even here in the
+   * SMP case.
+   */
+
+  flags = enter_critical_section();
+#endif
+
   /* Check if there are any active watchdogs to process */
 
-  while (g_wdactivelist.head && ticks > 0)
+  while (g_wdactivelist.head != NULL && ticks > 0)
     {
       /* Get the watchdog at the head of the list */
 
@@ -455,13 +472,36 @@ unsigned int wd_timer(int ticks)
 
   /* Return the delay for the next watchdog to expire */
 
-  return g_wdactivelist.head ?
-         ((FAR struct wdog_s *)g_wdactivelist.head)->lag : 0;
+  ret = g_wdactivelist.head ?
+          ((FAR struct wdog_s *)g_wdactivelist.head)->lag : 0;
+
+#ifdef CONFIG_SMP
+  leave_critical_section(flags);
+#endif
+
+  /* Return the delay for the next watchdog to expire */
+
+  return ret;
 }
 
 #else
 void wd_timer(void)
 {
+#ifdef CONFIG_SMP
+  irqstate_t flags;
+
+  /* We are in an interrupt handler as, as a consequence, interrupts are
+   * disabled.  But in the SMP case, interrupst MAY be disabled only on
+   * the local CPU since most architectures do not permit disabling
+   * interrupts on other CPUS.
+   *
+   * Hence, we must follow rules for critical sections even here in the
+   * SMP case.
+   */
+
+  flags = enter_critical_section();
+#endif
+
   /* Check if there are any active watchdogs to process */
 
   if (g_wdactivelist.head)
@@ -474,5 +514,9 @@ void wd_timer(void)
 
       wd_expiration();
     }
+
+#ifdef CONFIG_SMP
+  leave_critical_section(flags);
+#endif
 }
 #endif /* CONFIG_SCHED_TICKLESS */
diff --git a/sched/wqueue/kwork_hpthread.c b/sched/wqueue/kwork_hpthread.c
index ae3f518be56673ec37869221535b1bf857497a06..4ef84731eae38f746aa2fbad74ee1e5977131390 100644
--- a/sched/wqueue/kwork_hpthread.c
+++ b/sched/wqueue/kwork_hpthread.c
@@ -152,7 +152,7 @@ int work_hpstart(void)
 
   /* Start the high-priority, kernel mode worker thread */
 
-  svdbg("Starting high-priority kernel worker thread\n");
+  sinfo("Starting high-priority kernel worker thread\n");
 
   pid = kernel_thread(HPWORKNAME, CONFIG_SCHED_HPWORKPRIORITY,
                       CONFIG_SCHED_HPWORKSTACKSIZE,
@@ -165,7 +165,7 @@ int work_hpstart(void)
       int errcode = errno;
       DEBUGASSERT(errcode > 0);
 
-      slldbg("kernel_thread failed: %d\n", errcode);
+      serr("ERROR: kernel_thread failed: %d\n", errcode);
       return -errcode;
     }
 
diff --git a/sched/wqueue/kwork_lpthread.c b/sched/wqueue/kwork_lpthread.c
index 2a47fbca481cc40f7566a6131c3149bf1a53959c..84078c2751820bbc2cdaa8d9a8a36df33efd7f3c 100644
--- a/sched/wqueue/kwork_lpthread.c
+++ b/sched/wqueue/kwork_lpthread.c
@@ -197,7 +197,7 @@ int work_lpstart(void)
 
   /* Start the low-priority, kernel mode worker thread(s) */
 
-  svdbg("Starting low-priority kernel worker thread(s)\n");
+  sinfo("Starting low-priority kernel worker thread(s)\n");
 
   for (wndx = 0; wndx < CONFIG_SCHED_LPNTHREADS; wndx++)
     {
@@ -212,7 +212,7 @@ int work_lpstart(void)
           int errcode = errno;
           DEBUGASSERT(errcode > 0);
 
-          slldbg("kernel_thread %d failed: %d\n", wndx, errcode);
+          serr("ERROR: kernel_thread %d failed: %d\n", wndx, errcode);
           sched_unlock();
           return -errcode;
         }
diff --git a/sched/wqueue/kwork_process.c b/sched/wqueue/kwork_process.c
index f09735fd66529693a213d338a0eb8aead682dc33..8354a81fca1bb6e68aaff98c7f7ecef15b85540a 100644
--- a/sched/wqueue/kwork_process.c
+++ b/sched/wqueue/kwork_process.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * libc/wqueue/work_process.c
+ * sched/wqueue/work_process.c
  *
  *   Copyright (C) 2009-2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
diff --git a/sched/wqueue/kwork_queue.c b/sched/wqueue/kwork_queue.c
index 3c4acb2d00a0892e91036fcffd0d93e650c63653..0ac27a87b7a820fa873538e7425ab966b5ed0f25 100644
--- a/sched/wqueue/kwork_queue.c
+++ b/sched/wqueue/kwork_queue.c
@@ -152,7 +152,7 @@ int work_queue(int qid, FAR struct work_s *work, worker_t worker,
 #ifdef CONFIG_SCHED_HPWORK
   if (qid == HPWORK)
     {
-      /* Cancel high priority work */
+      /* Queue high priority work */
 
       work_qqueue((FAR struct kwork_wqueue_s *)&g_hpwork, work, worker, arg, delay);
       return work_signal(HPWORK);
@@ -162,7 +162,7 @@ int work_queue(int qid, FAR struct work_s *work, worker_t worker,
 #ifdef CONFIG_SCHED_LPWORK
   if (qid == LPWORK)
     {
-      /* Cancel low priority work */
+      /* Queue low priority work */
 
       work_qqueue((FAR struct kwork_wqueue_s *)&g_lpwork, work, worker, arg, delay);
       return work_signal(LPWORK);
diff --git a/sched/wqueue/kwork_signal.c b/sched/wqueue/kwork_signal.c
index 9359fb2e2a423eac59d43dedf4072b5a7ed8634a..9c5b9a8e97537397a2658867f12acd09ff801f1d 100644
--- a/sched/wqueue/kwork_signal.c
+++ b/sched/wqueue/kwork_signal.c
@@ -85,12 +85,11 @@ int work_signal(int qid)
 #ifdef CONFIG_SCHED_LPWORK
   if (qid == LPWORK)
     {
-      int wndx;
       int i;
 
       /* Find an IDLE worker thread */
 
-      for (wndx = 0, i = 0; i < CONFIG_SCHED_LPNTHREADS; i++)
+      for (i = 0; i < CONFIG_SCHED_LPNTHREADS; i++)
         {
           /* Is this worker thread busy? */
 
@@ -98,16 +97,20 @@ int work_signal(int qid)
             {
               /* No.. select this thread */
 
-              wndx = i;
               break;
             }
         }
 
-      /* Use the process ID of the IDLE worker thread (or the ID of worker
-       * thread 0 if all of the worker threads are busy).
-       */
+      /* If all of the IDLE threads are busy, then just return successfully */
 
-      pid = g_lpwork.worker[wndx].pid;
+      if (i >= CONFIG_SCHED_LPNTHREADS)
+        {
+          return OK;
+        }
+
+      /* Otherwise, signal the first IDLE thread found */
+
+      pid = g_lpwork.worker[i].pid;
     }
   else
 #endif
diff --git a/syscall/syscall.csv b/syscall/syscall.csv
index a7d81215358f217cd8dbbbbd7219b6994bd78515..18ff94fdc7aed0d56049ef665ab21309c62432c1 100644
--- a/syscall/syscall.csv
+++ b/syscall/syscall.csv
@@ -1,4 +1,5 @@
 "_exit","unistd.h","","void","int"
+"adjtime","sys/time.h","defined(CONFIG_CLOCK_TIMEKEEPING)","int","FAR const struct timeval *","FAR struct timeval *"
 "aio_cancel","aio.h","defined(CONFIG_FS_AIO)","int","int","FAR struct aiocb *"
 "aio_fsync","aio.h","defined(CONFIG_FS_AIO)","int","int","FAR struct aiocb *"
 "aio_read","aio.h","defined(CONFIG_FS_AIO)","int","FAR struct aiocb *"
@@ -22,20 +23,24 @@
 "fcntl","fcntl.h","CONFIG_NFILE_DESCRIPTORS > 0","int","int","int","..."
 "fs_fdopen","nuttx/fs/fs.h","CONFIG_NFILE_DESCRIPTORS > 0 && CONFIG_NFILE_STREAMS > 0","FAR struct file_struct*","int","int","FAR struct tcb_s*"
 "fs_ioctl","nuttx/fs/fs.h","defined(CONFIG_LIBC_IOCTL_VARIADIC) && (CONFIG_NSOCKET_DESCRIPTORS > 0 || CONFIG_NFILE_DESCRIPTORS > 0)","int","int","int","unsigned long"
+"fstat","sys/stat.h","CONFIG_NFILE_DESCRIPTORS > 0","int","int","FAR struct stat*"
+"fstatfs","sys/statfs.h","CONFIG_NFILE_DESCRIPTORS > 0","int","int","FAR struct statfs*"
 "fsync","unistd.h","CONFIG_NFILE_DESCRIPTORS > 0 && !defined(CONFIG_DISABLE_MOUNTPOINT)","int","int"
 "get_errno","errno.h","!defined(__DIRECT_ERRNO_ACCESS)","int"
 "get_errno_ptr","errno.h","defined(__DIRECT_ERRNO_ACCESS)","FAR int*"
 "getenv","stdlib.h","!defined(CONFIG_DISABLE_ENVIRON)","FAR char*","FAR const char*"
 "getpid","unistd.h","","pid_t"
 "getsockopt","sys/socket.h","CONFIG_NSOCKET_DESCRIPTORS > 0 && defined(CONFIG_NET)","int","int","int","int","FAR void*","FAR socklen_t*"
-"insmod","nuttx/module.h","defined(CONFIG_MODULE)","int","FAR const char *","FAR const char *"
+"insmod","nuttx/module.h","defined(CONFIG_MODULE)","FAR void *","FAR const char *","FAR const char *"
 "ioctl","sys/ioctl.h","!defined(CONFIG_LIBC_IOCTL_VARIADIC) && (CONFIG_NSOCKET_DESCRIPTORS > 0 || CONFIG_NFILE_DESCRIPTORS > 0)","int","int","int","unsigned long"
 "kill","signal.h","!defined(CONFIG_DISABLE_SIGNALS)","int","pid_t","int"
+"link","unistd.h","defined(CONFIG_PSEUDOFS_SOFTLINKS)","int","FAR const char *","FAR const char *"
 "listen","sys/socket.h","CONFIG_NSOCKET_DESCRIPTORS > 0 && defined(CONFIG_NET)","int","int","int"
 "lseek","unistd.h","CONFIG_NFILE_DESCRIPTORS > 0","off_t","int","off_t","int"
 "mkdir","sys/stat.h","CONFIG_NFILE_DESCRIPTORS > 0 && !defined(CONFIG_DISABLE_MOUNTPOINT)","int","FAR const char*","mode_t"
-"mkfifo","sys/stat.h","CONFIG_NFILE_DESCRIPTORS > 0","int","FAR const char*","mode_t"
+"mkfifo2","nuttx/drivers/drivers.h","defined(CONFIG_PIPES) && CONFIG_DEV_FIFO_SIZE > 0","int","FAR const char*","mode_t","size_t"
 "mmap","sys/mman.h","CONFIG_NFILE_DESCRIPTORS > 0","FAR void*","FAR void*","size_t","int","int","int","off_t"
+"modhandle","nuttx/module.h","defined(CONFIG_MODULE)","FAR void *","FAR const char *"
 "mount","sys/mount.h","CONFIG_NFILE_DESCRIPTORS > 0 && !defined(CONFIG_DISABLE_MOUNTPOINT) && defined(CONFIG_FS_READABLE)","int","const char*","const char*","const char*","unsigned long","const void*"
 "mq_close","mqueue.h","!defined(CONFIG_DISABLE_MQUEUE)","int","mqd_t"
 "mq_getattr","mqueue.h","!defined(CONFIG_DISABLE_MQUEUE)","int","mqd_t","struct mq_attr *"
@@ -52,7 +57,7 @@
 "open","fcntl.h","CONFIG_NFILE_DESCRIPTORS > 0","int","const char*","int","..."
 "opendir","dirent.h","CONFIG_NFILE_DESCRIPTORS > 0","FAR DIR*","FAR const char*"
 "pgalloc", "nuttx/arch.h", "defined(CONFIG_BUILD_KERNEL)", "uintptr_t", "uintptr_t", "unsigned int"
-"pipe","unistd.h","CONFIG_NFILE_DESCRIPTORS > 0","int","int [2]|int*"
+"pipe2","nuttx/drivers/drivers.h","defined(CONFIG_PIPES) && CONFIG_DEV_PIPE_SIZE > 0","int","int [2]|int*","size_t"
 "poll","poll.h","!defined(CONFIG_DISABLE_POLL) && (CONFIG_NSOCKET_DESCRIPTORS > 0 || CONFIG_NFILE_DESCRIPTORS > 0)","int","FAR struct pollfd*","nfds_t","int"
 "prctl","sys/prctl.h", "CONFIG_TASK_NAME_SIZE > 0","int","int","..."
 "pread","unistd.h","CONFIG_NSOCKET_DESCRIPTORS > 0 || CONFIG_NFILE_DESCRIPTORS > 0","ssize_t","int","FAR void*","size_t","off_t"
@@ -63,6 +68,8 @@
 "pthread_barrier_init","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","FAR pthread_barrier_t*","FAR const pthread_barrierattr_t*","unsigned int"
 "pthread_barrier_wait","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","FAR pthread_barrier_t*"
 "pthread_cancel","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","pthread_t"
+"pthread_cleanup_pop","pthread.h","defined(CONFIG_PTHREAD_CLEANUP)","void","int"
+"pthread_cleanup_push","pthread.h","defined(CONFIG_PTHREAD_CLEANUP)","void","pthread_cleanup_t","FAR void*"
 "pthread_cond_broadcast","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","FAR pthread_cond_t*"
 "pthread_cond_destroy","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","FAR pthread_cond_t*"
 "pthread_cond_init","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","FAR pthread_cond_t*","FAR const pthread_condattr_t*"
@@ -86,7 +93,6 @@
 "pthread_mutex_unlock","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","FAR pthread_mutex_t*"
 "pthread_once","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","FAR pthread_once_t*","CODE void (*)(void)"
 "pthread_setaffinity_np","pthread.h","!defined(CONFIG_DISABLE_PTHREAD) && defined(CONFIG_SMP)","int","pthread_t","size_t","FAR const cpu_set_t*"
-"pthread_setcancelstate","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","int","FAR int*"
 "pthread_setschedparam","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","pthread_t","int","FAR const struct sched_param*"
 "pthread_setschedprio","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","pthread_t","int"
 "pthread_setspecific","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","pthread_key_t","FAR const void*"
@@ -95,12 +101,13 @@
 "putenv","stdlib.h","!defined(CONFIG_DISABLE_ENVIRON)","int","FAR const char*"
 "read","unistd.h","CONFIG_NSOCKET_DESCRIPTORS > 0 || CONFIG_NFILE_DESCRIPTORS > 0","ssize_t","int","FAR void*","size_t"
 "readdir","dirent.h","CONFIG_NFILE_DESCRIPTORS > 0","FAR struct dirent*","FAR DIR*"
+"readlink","unistd.h","defined(CONFIG_PSEUDOFS_SOFTLINKS)","ssize_t","FAR const char *","FAR char *","size_t"
 "recv","sys/socket.h","CONFIG_NSOCKET_DESCRIPTORS > 0 && defined(CONFIG_NET)","ssize_t","int","FAR void*","size_t","int"
 "recvfrom","sys/socket.h","CONFIG_NSOCKET_DESCRIPTORS > 0 && defined(CONFIG_NET)","ssize_t","int","FAR void*","size_t","int","FAR struct sockaddr*","FAR socklen_t*"
 "rename","stdio.h","CONFIG_NFILE_DESCRIPTORS > 0 && !defined(CONFIG_DISABLE_MOUNTPOINT)","int","FAR const char*","FAR const char*"
 "rewinddir","dirent.h","CONFIG_NFILE_DESCRIPTORS > 0","void","FAR DIR*"
 "rmdir","unistd.h","CONFIG_NFILE_DESCRIPTORS > 0 && !defined(CONFIG_DISABLE_MOUNTPOINT)","int","FAR const char*"
-"rmmod","nuttx/module.h","defined(CONFIG_MODULE)","int","FAR const char *"
+"rmmod","nuttx/module.h","defined(CONFIG_MODULE)","int","FAR void *"
 "sched_getparam","sched.h","","int","pid_t","struct sched_param*"
 "sched_getscheduler","sched.h","","int","pid_t"
 "sched_getstreams","nuttx/sched.h","CONFIG_NFILE_DESCRIPTORS > 0 && CONFIG_NFILE_STREAMS > 0","FAR struct streamlist*"
@@ -117,6 +124,7 @@
 "sem_destroy","semaphore.h","","int","FAR sem_t*"
 "sem_open","semaphore.h","defined(CONFIG_FS_NAMED_SEMAPHORES)","FAR sem_t*","FAR const char*","int","..."
 "sem_post","semaphore.h","","int","FAR sem_t*"
+"sem_setprotocol","nuttx/semaphore.h","defined(CONFIG_PRIORITY_INHERITANCE)","int","FAR sem_t*","int"
 "sem_timedwait","semaphore.h","","int","FAR sem_t*","FAR const struct timespec *"
 "sem_trywait","semaphore.h","","int","FAR sem_t*"
 "sem_unlink","semaphore.h","defined(CONFIG_FS_NAMED_SEMAPHORES)","int","FAR const char*"
@@ -146,6 +154,9 @@
 #"task_create","sched.h","","int","const char*","int","main_t","FAR char * const []|FAR char * const *"
 "task_delete","sched.h","","int","pid_t"
 "task_restart","sched.h","","int","pid_t"
+"task_setcancelstate","sched.h","","int","int","FAR int*"
+"task_setcanceltype","sched.h","defined(CONFIG_CANCELLATION_POINTS)","int","int","FAR int*"
+"task_testcancel","pthread.h","defined(CONFIG_CANCELLATION_POINTS)","void"
 "telldir","dirent.h","CONFIG_NFILE_DESCRIPTORS > 0","off_t","FAR DIR*"
 "timer_create","time.h","!defined(CONFIG_DISABLE_POSIX_TIMERS)","int","clockid_t","FAR struct sigevent*","FAR timer_t*"
 "timer_delete","time.h","!defined(CONFIG_DISABLE_POSIX_TIMERS)","int","timer_t"
@@ -159,6 +170,7 @@
 "up_assert","assert.h","","void","FAR const uint8_t*","int"
 #"up_assert","assert.h","","void"
 "vfork","unistd.h","defined(CONFIG_ARCH_HAVE_VFORK)","pid_t"
+"_vsyslog","nuttx/syslog/syslog.h","","int","int","FAR const IPTR char*","FAR va_list*"
 "wait","sys/wait.h","defined(CONFIG_SCHED_WAITPID) && defined(CONFIG_SCHED_HAVE_PARENT)","pid_t","int*"
 "waitid","sys/wait.h","defined(CONFIG_SCHED_WAITPID) && defined(CONFIG_SCHED_HAVE_PARENT)","int","idtype_t","id_t"," FAR siginfo_t *","int"
 "waitpid","sys/wait.h","defined(CONFIG_SCHED_WAITPID)","pid_t","pid_t","int*","int"
diff --git a/syscall/syscall_lookup.h b/syscall/syscall_lookup.h
index 8fb2f507b04fffef6bd9d031039f2de83e81a9ab..f7f87487c65c885ff2b4e6845ad054f52a4653e6 100644
--- a/syscall/syscall_lookup.h
+++ b/syscall/syscall_lookup.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * syscall/syscall_lookup.h
  *
- *   Copyright (C) 2011, 2013-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011, 2013-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -61,12 +61,16 @@ SYSCALL_LOOKUP(uname,                     1, STUB_uname)
 
 /* Semaphores */
 
-SYSCALL_LOOKUP(sem_destroy,               2, STUB_sem_destroy)
+SYSCALL_LOOKUP(sem_destroy,               1, STUB_sem_destroy)
 SYSCALL_LOOKUP(sem_post,                  1, STUB_sem_post)
 SYSCALL_LOOKUP(sem_timedwait,             2, STUB_sem_timedwait)
 SYSCALL_LOOKUP(sem_trywait,               1, STUB_sem_trywait)
 SYSCALL_LOOKUP(sem_wait,                  1, STUB_sem_wait)
 
+#ifdef CONFIG_PRIORITY_INHERITANCE
+SYSCALL_LOOKUP(sem_setprotocol,           2, STUB_sem_setprotocol)
+#endif
+
 /* Named semaphores */
 
 #ifdef CONFIG_FS_NAMED_SEMAPHORES
@@ -82,8 +86,14 @@ SYSCALL_LOOKUP(pgalloc,                   2, STUB_pgalloc)
 #endif
 SYSCALL_LOOKUP(task_delete,               1, STUB_task_delete)
 SYSCALL_LOOKUP(task_restart,              1, STUB_task_restart)
+SYSCALL_LOOKUP(task_setcancelstate,       2, STUB_task_setcancelstate)
 SYSCALL_LOOKUP(up_assert,                 2, STUB_up_assert)
 
+#  ifdef CONFIG_CANCELLATION_POINTS
+  SYSCALL_LOOKUP(task_setcanceltype,      2, STUB_task_setcanceltype)
+  SYSCALL_LOOKUP(task_testcancel,         0, STUB_task_testcancel)
+#  endif
+
 /* The following can be individually enabled */
 
 #ifdef CONFIG_ARCH_HAVE_VFORK
@@ -113,6 +123,7 @@ SYSCALL_LOOKUP(up_assert,                 2, STUB_up_assert)
 #ifdef CONFIG_MODULE
   SYSCALL_LOOKUP(insmod,                  2, STUB_insmod)
   SYSCALL_LOOKUP(rmmod,                   1, STUB_rmmod)
+  SYSCALL_LOOKUP(modhandle,               1, STUB_modhandle)
 #endif
 
 /* The following can only be defined if we are configured to execute
@@ -152,6 +163,9 @@ SYSCALL_LOOKUP(up_assert,                 2, STUB_up_assert)
   SYSCALL_LOOKUP(clock_getres,            2, STUB_clock_getres)
   SYSCALL_LOOKUP(clock_gettime,           2, STUB_clock_gettime)
   SYSCALL_LOOKUP(clock_settime,           2, STUB_clock_settime)
+#ifdef CONFIG_CLOCK_TIMEKEEPING
+  SYSCALL_LOOKUP(adjtime,                 2, STUB_adjtime)
+#endif
 
 /* The following are defined only if POSIX timers are supported */
 
@@ -163,6 +177,10 @@ SYSCALL_LOOKUP(up_assert,                 2, STUB_up_assert)
   SYSCALL_LOOKUP(timer_settime,           4, STUB_timer_settime)
 #endif
 
+/* System logging */
+
+  SYSCALL_LOOKUP(_vsyslog,                3, STUB__vsyslog)
+
 /* The following are defined if either file or socket descriptor are
  * enabled.
  */
@@ -179,10 +197,10 @@ SYSCALL_LOOKUP(up_assert,                 2, STUB_up_assert)
   SYSCALL_LOOKUP(pread,                   4, STUB_pread)
   SYSCALL_LOOKUP(pwrite,                  4, STUB_pwrite)
 #  ifdef CONFIG_FS_AIO
-  SYSCALL_LOOKUP(aio_read,                1, SYS_aio_read)
-  SYSCALL_LOOKUP(aio_write,               1, SYS_aio_write)
-  SYSCALL_LOOKUP(aio_fsync,               2, SYS_aio_fsync)
-  SYSCALL_LOOKUP(aio_cancel,              2, SYS_aio_cancel)
+  SYSCALL_LOOKUP(aio_read,                1, STUB_aio_read)
+  SYSCALL_LOOKUP(aio_write,               1, STUB_aio_write)
+  SYSCALL_LOOKUP(aio_fsync,               2, STUB_aio_fsync)
+  SYSCALL_LOOKUP(aio_cancel,              2, STUB_aio_cancel)
 #  endif
 #  ifndef CONFIG_DISABLE_POLL
   SYSCALL_LOOKUP(poll,                    3, STUB_poll)
@@ -204,18 +222,31 @@ SYSCALL_LOOKUP(up_assert,                 2, STUB_up_assert)
   SYSCALL_LOOKUP(dup2,                    2, STUB_dup2)
   SYSCALL_LOOKUP(fcntl,                   6, STUB_fcntl)
   SYSCALL_LOOKUP(lseek,                   3, STUB_lseek)
-  SYSCALL_LOOKUP(mkfifo,                  2, STUB_mkfifo)
   SYSCALL_LOOKUP(mmap,                    6, STUB_mmap)
   SYSCALL_LOOKUP(open,                    6, STUB_open)
   SYSCALL_LOOKUP(opendir,                 1, STUB_opendir)
-  SYSCALL_LOOKUP(pipe,                    1, STUB_pipe)
   SYSCALL_LOOKUP(readdir,                 1, STUB_readdir)
   SYSCALL_LOOKUP(rewinddir,               1, STUB_rewinddir)
   SYSCALL_LOOKUP(seekdir,                 2, STUB_seekdir)
   SYSCALL_LOOKUP(stat,                    2, STUB_stat)
+  SYSCALL_LOOKUP(fstat,                   2, STUB_fstat)
   SYSCALL_LOOKUP(statfs,                  2, STUB_statfs)
+  SYSCALL_LOOKUP(fstatfs,                 2, STUB_fstatfs)
   SYSCALL_LOOKUP(telldir,                 1, STUB_telldir)
 
+#  if defined(CONFIG_PSEUDOFS_SOFTLINKS)
+  SYSCALL_LOOKUP(link,                    2, STUB_link)
+  SYSCALL_LOOKUP(readlink,                3, STUB_readlink)
+#  endif
+
+#  if defined(CONFIG_PIPES) && CONFIG_DEV_PIPE_SIZE > 0
+  SYSCALL_LOOKUP(pipe2,                   2, STUB_pipe2)
+#  endif
+
+#  if defined(CONFIG_PIPES) && CONFIG_DEV_FIFO_SIZE > 0
+  SYSCALL_LOOKUP(mkfifo2,                 3, STUB_mkfifo2)
+#  endif
+
 #  if CONFIG_NFILE_STREAMS > 0
   SYSCALL_LOOKUP(fdopen,                  3, STUB_fs_fdopen)
   SYSCALL_LOOKUP(sched_getstreams,        0, STUB_sched_getstreams)
@@ -273,7 +304,6 @@ SYSCALL_LOOKUP(up_assert,                 2, STUB_up_assert)
   SYSCALL_LOOKUP(pthread_mutex_trylock,   1, STUB_pthread_mutex_trylock)
   SYSCALL_LOOKUP(pthread_mutex_unlock,    1, STUB_pthread_mutex_unlock)
   SYSCALL_LOOKUP(pthread_once,            2, STUB_pthread_once)
-  SYSCALL_LOOKUP(pthread_setcancelstate,  2, STUB_pthread_setcancelstate)
   SYSCALL_LOOKUP(pthread_setschedparam,   3, STUB_pthread_setschedparam)
   SYSCALL_LOOKUP(pthread_setschedprio,    2, STUB_pthread_setschedprio)
   SYSCALL_LOOKUP(pthread_setspecific,     2, STUB_pthread_setspecific)
@@ -287,6 +317,10 @@ SYSCALL_LOOKUP(up_assert,                 2, STUB_up_assert)
   SYSCALL_LOOKUP(pthread_kill,            2, STUB_pthread_kill)
   SYSCALL_LOOKUP(pthread_sigmask,         3, STUB_pthread_sigmask)
 #  endif
+#  ifdef CONFIG_PTHREAD_CLEANUP
+  SYSCALL_LOOKUP(pthread_cleanup_push,    2, STUB_pthread_cleanup_push)
+  SYSCALL_LOOKUP(pthread_cleanup_pop,     1, STUB_pthread_cleanup_pop)
+#  endif
 #endif
 
 /* The following are defined only if message queues are enabled */
diff --git a/syscall/syscall_stublookup.c b/syscall/syscall_stublookup.c
index 63af75eb4095a89bf2a4750b5320dd9ca9bc2813..ab18f82878e11cbb2ea3ec441f6e1f4745221165 100644
--- a/syscall/syscall_stublookup.c
+++ b/syscall/syscall_stublookup.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * syscall/syscall_stublookup.c
  *
- *   Copyright (C) 2011-2013, 2015-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2013, 2015-2017 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -85,17 +85,25 @@ uintptr_t STUB_sem_destroy(int nbr, uintptr_t parm1);
 uintptr_t STUB_sem_open(int nbr, uintptr_t parm1, uintptr_t parm2,
             uintptr_t parm3, uintptr_t parm4, uintptr_t parm5, uintptr_t parm6);
 uintptr_t STUB_sem_post(int nbr, uintptr_t parm1);
+uintptr_t STUB_sem_setprotocol(int nbr, uintptr_t parm1, uintptr_t parm2);
 uintptr_t STUB_sem_timedwait(int nbr, uintptr_t parm1, uintptr_t parm2);
 uintptr_t STUB_sem_trywait(int nbr, uintptr_t parm1);
 uintptr_t STUB_sem_unlink(int nbr, uintptr_t parm1);
 uintptr_t STUB_sem_wait(int nbr, uintptr_t parm1);
+
 uintptr_t STUB_pgalloc(int nbr, uintptr_t parm1, uintptr_t parm2);
 uintptr_t STUB_task_create(int nbr, uintptr_t parm1, uintptr_t parm2,
             uintptr_t parm3, uintptr_t parm4, uintptr_t parm5);
 uintptr_t STUB_task_delete(int nbr, uintptr_t parm1);
 uintptr_t STUB_task_restart(int nbr, uintptr_t parm1);
+uintptr_t STUB_task_setcancelstate(int nbr, uintptr_t parm1,
+            uintptr_t parm2);
 uintptr_t STUB_up_assert(int nbr, uintptr_t parm1, uintptr_t parm2);
 
+uintptr_t STUB_task_setcanceltype(int nbr, uintptr_t parm1,
+            uintptr_t parm2);
+uintptr_t STUB_task_testcancel(int nbr);
+
 /* The following can be individually enabled */
 
 uintptr_t STUB_vfork(int nbr);
@@ -114,6 +122,7 @@ uintptr_t STUB_waitid(int nbr, uintptr_t parm1, uintptr_t parm2,
 #ifdef CONFIG_MODULE
 uintptr_t STUB_insmod(int nbr, uintptr_t parm1, uintptr_t parm2);
 uintptr_t STUB_rmmod(int nbr, uintptr_t parm1);
+uintptr_t STUB_modhandle(int nbr, uintptr_t parm1, uintptr_t parm2);
 #endif
 
 /* The following can only be defined if we are configured to execute
@@ -154,6 +163,7 @@ uintptr_t STUB_clock_systimer(int nbr);
 uintptr_t STUB_clock_getres(int nbr, uintptr_t parm1, uintptr_t parm2);
 uintptr_t STUB_clock_gettime(int nbr, uintptr_t parm1, uintptr_t parm2);
 uintptr_t STUB_clock_settime(int nbr, uintptr_t parm1, uintptr_t parm2);
+uintptr_t STUB_adjtime(int nbr, uintptr_t parm1, uintptr_t parm2);
 
 /* The following are defined only if POSIX timers are supported */
 
@@ -165,6 +175,11 @@ uintptr_t STUB_timer_gettime(int nbr, uintptr_t parm1, uintptr_t parm2);
 uintptr_t STUB_timer_settime(int nbr, uintptr_t parm1, uintptr_t parm2,
             uintptr_t parm3, uintptr_t parm4);
 
+/* System logging */
+
+uintptr_t STUB__vsyslog(int nbr, uintptr_t parm1, uintptr_t parm2,
+            uintptr_t parm3);
+
 /* The following are defined if either file or socket descriptor are
  * enabled.
  */
@@ -209,7 +224,6 @@ uintptr_t STUB_fcntl(int nbr, uintptr_t parm1, uintptr_t parm2,
             uintptr_t parm6);
 uintptr_t STUB_lseek(int nbr, uintptr_t parm1, uintptr_t parm2,
             uintptr_t parm3);
-uintptr_t STUB_mkfifo(int nbr, uintptr_t parm1, uintptr_t parm2);
 uintptr_t STUB_mmap(int nbr, uintptr_t parm1, uintptr_t parm2,
             uintptr_t parm3, uintptr_t parm4, uintptr_t parm5,
             uintptr_t parm6);
@@ -217,14 +231,23 @@ uintptr_t STUB_open(int nbr, uintptr_t parm1, uintptr_t parm2,
             uintptr_t parm3, uintptr_t parm4, uintptr_t parm5,
             uintptr_t parm6);
 uintptr_t STUB_opendir(int nbr, uintptr_t parm1);
-uintptr_t STUB_pipe(int nbr, uintptr_t parm1);
 uintptr_t STUB_readdir(int nbr, uintptr_t parm1);
 uintptr_t STUB_rewinddir(int nbr, uintptr_t parm1);
 uintptr_t STUB_seekdir(int nbr, uintptr_t parm1, uintptr_t parm2);
 uintptr_t STUB_stat(int nbr, uintptr_t parm1, uintptr_t parm2);
+uintptr_t STUB_fstat(int nbr, uintptr_t parm1, uintptr_t parm2);
 uintptr_t STUB_statfs(int nbr, uintptr_t parm1, uintptr_t parm2);
+uintptr_t STUB_fstatfs(int nbr, uintptr_t parm1, uintptr_t parm2);
 uintptr_t STUB_telldir(int nbr, uintptr_t parm1);
 
+uintptr_t STUB_link(int nbr, uintptr_t parm1, uintptr_t parm2);
+uintptr_t STUB_readlink(int nbr, uintptr_t parm1, uintptr_t parm2,
+            uintptr_t parm3);
+
+uintptr_t STUB_pipe2(int nbr, uintptr_t parm1, uintptr_t parm2);
+uintptr_t STUB_mkfifo2(int nbr, uintptr_t parm1, uintptr_t parm2,
+            uintptr_t parm3);
+
 uintptr_t STUB_fs_fdopen(int nbr, uintptr_t parm1, uintptr_t parm2,
             uintptr_t parm3);
 uintptr_t STUB_sched_getstreams(int nbr);
@@ -280,8 +303,6 @@ uintptr_t STUB_pthread_mutex_lock(int nbr, uintptr_t parm1);
 uintptr_t STUB_pthread_mutex_trylock(int nbr, uintptr_t parm1);
 uintptr_t STUB_pthread_mutex_unlock(int nbr, uintptr_t parm1);
 uintptr_t STUB_pthread_once(int nbr, uintptr_t parm1, uintptr_t parm2);
-uintptr_t STUB_pthread_setcancelstate(int nbr, uintptr_t parm1,
-            uintptr_t parm2);
 uintptr_t STUB_pthread_setschedparam(int nbr, uintptr_t parm1,
             uintptr_t parm2, uintptr_t parm3);
 uintptr_t STUB_pthread_setschedprio(int nbr, uintptr_t parm1,
@@ -301,6 +322,10 @@ uintptr_t STUB_pthread_kill(int nbr, uintptr_t parm1, uintptr_t parm2);
 uintptr_t STUB_pthread_sigmask(int nbr, uintptr_t parm1, uintptr_t parm2,
             uintptr_t parm3);
 
+uintptr_t STUB_pthread_cleanup_pop(int nbr, uintptr_t parm1);
+uintptr_t STUB_pthread_cleanup_push(int nbr, uintptr_t parm1,
+            uintptr_t parm2);
+
 /* The following are defined only if message queues are enabled */
 
 uintptr_t STUB_mq_close(int nbr, uintptr_t parm1);
diff --git a/tools/README.txt b/tools/README.txt
index 44b0427427fa52236adac5d99185d32fafc662b9..282be57b42ba7d8ba1bc5c97274f8037f7b10757 100644
--- a/tools/README.txt
+++ b/tools/README.txt
@@ -104,6 +104,16 @@ kconfig2html.c
      is the directory containing the root Kconfig file.
          Default : .
 
+  NOTE: In order to use this tool, some configuration must be in-place will
+  all necessary symbolic links.  You can establish the configured symbolic
+  links with:
+
+    make context
+
+  or more quickly with:
+
+    make dirlinks
+
 mkconfigvars.sh
 ---------------
 
@@ -259,7 +269,7 @@ bdf-convert.c
     2. Use the bdf-converter program to convert the BDF font to the NuttX
        font format.  This will result in a C header file containing
        definitions.  That header file should be installed at, for example,
-       graphics/nxfonts/nxfonts_myfont.h.
+       libnx/nxfonts/nxfonts_myfont.h.
 
   Create a new NuttX configuration variable.  For example, suppose
   you define the following variable:  CONFIG_NXFONT_MYFONT.  Then
@@ -314,7 +324,7 @@ bdf-convert.c
           @$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=2 EXTRADEFINES=$(EXTRADEFINES)
         endif
 
-    6. nuttx/graphics/nxfonts/Make.defs.  Set the make variable NXFSET_CSRCS.
+    6. nuttx/libnx/nxfonts/Make.defs.  Set the make variable NXFSET_CSRCS.
        NXFSET_CSRCS determines the name of the font C file to build when
        NXFONTS_FONTID=2:
 
@@ -325,12 +335,12 @@ bdf-convert.c
        NXFSET_CSRCS    += nxfonts_bitmaps_myfont.c
        endif
 
-    7. nuttx/graphics/nxfonts/Makefile.sources.  This is the Makefile used
+    7. nuttx/libnx/nxfonts/Makefile.sources.  This is the Makefile used
        in step 5 that will actually generate the font C file.  So, given
        your NXFONTS_FONTID=2, it needs to determine a prefix to use for
        auto-generated variable and function names and (again) the name of
        the auto-generated file to create (this must be the same name that
-       was used in nuttx/graphics/nxfonts/Make.defs):
+       was used in nuttx/libnx/nxfonts/Make.defs):
 
        ifeq ($(NXFONTS_FONTID),1)
        NXFONTS_PREFIX    := g_sans23x27_
@@ -341,9 +351,9 @@ bdf-convert.c
        GEN_CSRC    = nxfonts_bitmaps_myfont.c
        endif
 
-    8. graphics/nxfonts/nxfonts_bitmaps.c.  This is the file that contains
+    8. graphics/libnx/nxfonts_bitmaps.c.  This is the file that contains
        the generic font structures.  It is used as a "template" file by
-       nuttx/graphics/nxfonts/Makefile.sources to create your customized
+       nuttx/libnx/nxfonts/Makefile.sources to create your customized
        font data set.
 
        #if NXFONTS_FONTID == 1
@@ -357,7 +367,7 @@ bdf-convert.c
        Where nxfonts_myfont.h is the NuttX font file that we generated in
        step 2 using the bdf-converter tool.
 
-    9. graphics/nxfonts/nxfonts_getfont.c.  Finally, we need to extend the
+    9. libnx/nxfonts/nxfonts_getfont.c.  Finally, we need to extend the
        logic that does the run-time font lookups so that can find our new
        font.  The lookup function is NXHANDLE nxf_getfonthandle(enum nx_fontid_e fontid).
        The new font information needs to be added to data structures used by
@@ -554,8 +564,8 @@ indent.sh
 ---------
 
   This script can be used to indent .c and .h files in a manner similar
-  to my coding NuttX coding style.  It doesn't do a really good job,
-  however (see the comments at the top of the indent.sh file).
+  to the NuttX coding style.  It doesn't do a really good job, however
+  (see below and the comments at the top of the indent.sh file).
 
   USAGE:
     ./indent.sh [-d] -o  
@@ -575,12 +585,74 @@ indent.sh
     -h
       Show this help message and exit
 
+  The conversions make by the indent.sh script differs from the NuttX coding
+  style in that:
+
+    1. I normally put the trailing */ of a multi-line comment on a separate
+       line.  If your C file already has properly formatted comments then
+       using -nfca instead of -fca eliminates that bad behavior
+    2. I usually align things vertically (like '=' in assignments),
+    3. indent.sh puts a bogus blank line at the top of the file,
+    4. I don't like the way it handles nested conditional compilation
+       intermixed with code.  I prefer the preprocessor conditiona tests
+       be all right justified in that case.
+    5. I also indent brackets differently on structures than does this script.
+    6. I normally use no spaces in casts.  indent.sh adds spaces in casts like
+      "(FAR void *)&foo" becomes "(FAR void *) & foo".
+    7. When used with header files, the initial idempotence conditional test
+       causes all preprecessor directives to be indented in the file.  So for
+       header files, you will need to substitute "^#  " with "#" in the
+       converted header file.
+
+   You will manually need to check for the issues listed above after
+   performing the conversions.
+
+sethost.sh
+----------
+
+  Saved configurations may run on Linux, Cygwin (32- or 64-bit), or other
+  platforms.  The platform characteristics can be changed use 'make
+  menuconfig'.  Sometimes this can be confusing due to the differences
+  between the platforms.  Enter sethost.sh
+
+  sethost.sh is a simple script that changes a configuration to your
+  host platform.  This can greatly simplify life if you use many different
+  configurations.  For example, if you are running on Linux and you
+  configure like this:
+
+    $ cd tools
+    $ ./configure.sh board/configuration
+    $ cd ..
+
+  The you can use the following command to both (1) make sure that the
+  configuration is up to date, AND (2) the configuration is set up
+  correctly for Linux:
+
+    $ tools/sethost.sh -l
+
+  Or, if you are on a Windows/Cygwin 64-bit platform:
+
+    $ tools/sethost.sh -w
+
+  Other options are available:
+
+    $ tools/sethost.sh -h
+
+    USAGE: tools/sethost.sh [-w|l] [-c|n] [-32|64] []
+           tools/sethost.sh -h
+
+    Where:
+      -w|l selects Windows (w) or Linux (l).  Default: Linux
+      -c|n selects Windows native (n) or Cygwin (c).  Default Cygwin
+      -32|64 selects 32- or 64-bit host (Only for Cygwin).  Default 64
+      -h will show this help test and terminate
+
 refresh.sh
 ----------
 
   This is a bash script that automatics refreshing of board default
   configuration (defconfig) files.  It does not do anything special
-  thet you cannot do manually, but is useful for me when I have to
+  that you cannot do manually, but is useful for me when I have to
   update dozens of confuration files.
 
   Configuration files have to be updated because over time, the
@@ -638,6 +710,18 @@ refresh.sh
      refresh.sh will prompt you first to avoid overwriting the
      defconfig file with changes that you may not want.
 
+showsize.sh
+-----------
+
+  Show the top 10 biggest memory hogs in code and data spaces.  This
+  must be executed from the top-level NuttX directory like:
+
+    $ tools/showsize.sh
+    TOP 10 BIG DATA
+    ...
+    TOP 10 BIG CODE
+    ...
+
 testbuild.sh
 ------------
 
diff --git a/tools/cfgdefine.c b/tools/cfgdefine.c
index bb9a81eee2bd821ff6c658f7796e12eda5bd79b1..cd8816734ee3997bd8121eac94e1b13360f4ffd6 100644
--- a/tools/cfgdefine.c
+++ b/tools/cfgdefine.c
@@ -72,10 +72,6 @@ static const char *dequote_list[] =
   "CONFIG_INIT_SYMTAB",                /* Global symbol table */
   "CONFIG_INIT_NEXPORTS",              /* Global symbol table size */
 
-  /* RGMP */
-
-  "CONFIG_RGMP_SUBARCH",               /* RGMP sub-architecture */
-
   /* NxWidgets/NxWM */
 
   "CONFIG_NXWM_BACKGROUND_IMAGE",      /* Name of bitmap image class */
diff --git a/tools/ide_exporter.py b/tools/ide_exporter.py
index 2f139238dff6e4d9f806d6d185ab8578536a6814..f90da6f2e6e43da5de6783979b55839bab009055 100755
--- a/tools/ide_exporter.py
+++ b/tools/ide_exporter.py
@@ -130,7 +130,7 @@ UVISION_GCC_PRJ_SETTINGS = {'root_group':'',
                             'ext_remap' : UVISION_GCC_EXT_REMAP,
                             'uv_file_type' : UVISION_FILE_TYPE_MAP,
                             'c_misc' : ('.//Carm', '-fno-builtin -Wall -Wstrict-prototypes -Wshadow -Wundef -g'),
-                            'cxx_misc' : ('.//Carm', '-fno-builtin -fno-exceptions -fno-rtti -Wall -Wshadow -Wundef -g'),
+                            'cxx_misc' : ('.//Carm', '-fno-builtin -fno-exceptions -fcheck-new -fno-rtti -Wall -Wshadow -Wundef -g'),
                             'ld_misc' : ('.//LDarm', '--entry=__start -lgcc'),
                             'cxx_def' : ('.//Carm', ''),}
 
diff --git a/tools/indent.sh b/tools/indent.sh
index 4174fd5e4fd85d43d824395929027d7ce46a1774..76f7029d6324e34ac5f7c367a587843b6efa0f61 100755
--- a/tools/indent.sh
+++ b/tools/indent.sh
@@ -35,14 +35,27 @@
 ############################################################################
 #
 # This script uses the Linux 'indent' utility to re-format C source files
-# to match the coding style that I use.  It differs from my coding style in that
+# to match the coding style that I use.  It differs from the NuttX coding
+# style in that:
 #
-# - I normally put the trailing */ of a multi-line comment on a separate line,
-# - I usually align things vertically (like '=' in assignments),
-# - indent puts a bogus blank line at the top of the file,
-# - I don't like the way it handles nested conditional compilation intermixed with code.
-# - I also indent brackets differently on structures than does this script.
+# 1. I normally put the trailing */ of a multi-line comment on a separate
+#    line.  If your C file already has properly formatted comments then
+#    using -nfca instead of -fca eliminates that bad behavior
+# 2. I usually align things vertically (like '=' in assignments),
+# 3. indent.sh puts a bogus blank line at the top of the file,
+# 4. I don't like the way it handles nested conditional compilation
+#    intermixed with code.  I prefer the preprocessor conditiona tests
+#    be all right justified in that case.
+# 5. I also indent brackets differently on structures than does this script.
+# 6. I normally use no spaces in casts.  indent.sh adds spaces in casts like
+#   "(FAR void *)&foo" becomes "(FAR void *) & foo".
+# 7. When used with header files, the initial idempotence conditional test
+#    causes all preprecessor directives to be indented in the file.  So for
+#    header files, you will need to substitute "^#  " with "#" in the
+#    converted header file.
 #
+# You will manually need to check for the issues listed above after
+# performing the conversion.
 
 # Constants
 
diff --git a/tools/kconfig2html.c b/tools/kconfig2html.c
index 295d4814e8117af9f70d6a1b9842f6c4b70b1930..1f7ab898476fa081c3e4b7e8eecebafbaa94f73b 100644
--- a/tools/kconfig2html.c
+++ b/tools/kconfig2html.c
@@ -56,10 +56,10 @@
 
 #define LINE_SIZE        1024
 #define SCRATCH_SIZE     2048
-#define MAX_DEPENDENCIES 100
+#define MAX_DEPENDENCIES 128
 #define MAX_LEVELS       100
 #define MAX_SELECT       64
-#define MAX_DEFAULTS     128
+#define MAX_DEFAULTS     196
 #define TAB_SIZE         4
 #define VAR_SIZE         80
 #define HTML_VAR_SIZE    (2*VAR_SIZE + 64)
@@ -2245,33 +2245,44 @@ static char *parse_kconfigfile(FILE *stream, const char *kconfigdir)
                 {
                   /* Get the relative path from the Kconfig file line */
 
-                  char *relpath = get_token();
+                  char *source = get_token();
 
                   /* Remove optional quoting */
 
-                  relpath = dequote(relpath);
-                  if (relpath)
+                  source = dequote(source);
+                  if (source)
                     {
-                      char *subdir = dirname(relpath);
+                      char *subdir = dirname(source);
                       char *dirpath;
 
-                      /* Check if the directory path contains $APPSDIR */
+                      /* Check for an absolute path */
 
-                      char *appsdir = strstr(subdir, "$APPSDIR");
-                      if (appsdir)
+                      if (source[0] == '/')
                         {
-                          char *tmp = appsdir + strlen("$APPSDIR");
-
-                          *appsdir = '\0';
-                          asprintf(&dirpath, "%s/%s%s%s", g_kconfigroot, subdir, g_appsdir, tmp);
+                          dirpath = strdup(subdir);
                         }
                       else
                         {
-                          asprintf(&dirpath, "%s/%s", g_kconfigroot, subdir);
+                          /* Check if the directory path contains $APPSDIR */
+
+                          char *appsdir = strstr(subdir, "$APPSDIR");
+                          if (appsdir)
+                            {
+                              char *tmp = appsdir + strlen("$APPSDIR");
+
+                              *appsdir = '\0';
+                              asprintf(&dirpath, "%s/%s%s%s",
+                                       g_kconfigroot, subdir, g_appsdir, tmp);
+                            }
+                          else
+                            {
+                              asprintf(&dirpath, "%s/%s", g_kconfigroot, subdir);
+                            }
+
                         }
 
                       debug("parse_kconfigfile: Recursing for TOKEN_SOURCE\n");
-                      debug("  relpath:     %s\n", relpath);
+                      debug("  source:      %s\n", source);
                       debug("  subdir:      %s\n", subdir);
                       debug("  dirpath:     %s\n", dirpath);
 
diff --git a/tools/mkconfig.c b/tools/mkconfig.c
index 710a0926e28d0b98c6d508be4ee137409fd15c4a..6a949e7ea2ee6a44fefe528af01fea80116603ab 100644
--- a/tools/mkconfig.c
+++ b/tools/mkconfig.c
@@ -112,7 +112,7 @@ int main(int argc, char **argv, char **envp)
 
   printf("/* NXFLAT requires PIC support in the TCBs. */\n\n");
   printf("#if defined(CONFIG_NXFLAT)\n");
-  printf("#  undef CONFIG_PIC\n");
+  printf("#  undef  CONFIG_PIC\n");
   printf("#  define CONFIG_PIC 1\n");
   printf("#endif\n\n");
 
@@ -132,13 +132,28 @@ int main(int argc, char **argv, char **envp)
   printf("#  define CONFIG_RR_INTERVAL 0\n");
   printf("#endif\n\n");
 
-  printf("/* The correct way to disable filesystem supuport is to set the number of\n");
+  printf("/* The correct way to disable filesystem support is to set the number of\n");
   printf(" * file descriptors to zero.\n");
   printf(" */\n\n");
   printf("#ifndef CONFIG_NFILE_DESCRIPTORS\n");
   printf("#  define CONFIG_NFILE_DESCRIPTORS 0\n");
   printf("#endif\n\n");
 
+  printf("/* If no file descriptors are configured, then make certain no streams\n");
+  printf(" * are configured either.\n");
+  printf(" */\n\n");
+  printf("#if CONFIG_NFILE_DESCRIPTORS == 0\n");
+  printf("#  undef  CONFIG_NFILE_STREAMS\n");
+  printf("#  define CONFIG_NFILE_STREAMS 0\n");
+  printf("#endif\n\n");
+
+  printf("/* The correct way to disable stream support is to set the number of\n");
+  printf(" * streamd to zero.\n");
+  printf(" */\n\n");
+  printf("#ifndef CONFIG_NFILE_STREAMS\n");
+  printf("#  define CONFIG_NFILE_STREAMS 0\n");
+  printf("#endif\n\n");
+
   printf("/* If a console is selected, then make sure that there are resources for\n");
   printf(" * three file descriptors and, if any streams are selected, also for three\n");
   printf(" * file streams.\n");
@@ -164,6 +179,16 @@ int main(int argc, char **argv, char **envp)
   printf("#  undef CONFIG_RAMLOG_CONSOLE\n");
   printf("#endif\n\n");
 
+  printf("/* If no file streams are configured, then make certain that buffered I/O\n");
+  printf(" * support is disabled\n");
+  printf(" */\n\n");
+  printf("#if CONFIG_NFILE_STREAMS == 0\n");
+  printf("#  undef  CONFIG_STDIO_BUFFER_SIZE\n");
+  printf("#  undef  CONFIG_STDIO_LINEBUFFER\n");
+  printf("#  undef  CONFIG_STDIO_DISABLE_BUFFERING\n");
+  printf("#  define CONFIG_STDIO_DISABLE_BUFFERING 1\n");
+  printf("#endif\n\n");
+
   printf("/* If priority inheritance is disabled, then do not allocate any\n");
   printf(" * associated resources.\n");
   printf(" */\n\n");
@@ -172,23 +197,10 @@ int main(int argc, char **argv, char **envp)
   printf("#  define CONFIG_SEM_PREALLOCHOLDERS 0\n");
   printf("#endif\n\n");
   printf("#if !defined(CONFIG_PRIORITY_INHERITANCE) || !defined(CONFIG_SEM_NNESTPRIO)\n");
-  printf("#  undef CONFIG_SEM_NNESTPRIO\n");
+  printf("#  undef  CONFIG_SEM_NNESTPRIO\n");
   printf("#  define CONFIG_SEM_NNESTPRIO 0\n");
   printf("#endif\n\n");
 
-  printf("/* If no file descriptors are configured, then make certain no\n");
-  printf(" * streams are configured either.\n");
-  printf(" */\n\n");
-  printf("#if CONFIG_NFILE_DESCRIPTORS == 0\n");
-  printf("#  undef CONFIG_NFILE_STREAMS\n");
-  printf("#  define CONFIG_NFILE_STREAMS 0\n");
-  printf("#endif\n\n");
-
-  printf("/* There must be at least one memory region. */\n\n");
-  printf("#ifndef CONFIG_MM_REGIONS\n");
-  printf("#  define CONFIG_MM_REGIONS 1\n");
-  printf("#endif\n\n");
-
   printf("/* If the end of RAM is not specified then it is assumed to be the beginning\n");
   printf(" * of RAM plus the RAM size.\n");
   printf(" */\n\n");
@@ -206,21 +218,6 @@ int main(int argc, char **argv, char **envp)
   printf("#  define CONFIG_FLASH_END (CONFIG_FLASH_START+CONFIG_FLASH_SIZE)\n");
   printf("#endif\n\n");
 
-  printf("/* If no file streams are configured, then make certain that buffered I/O\n");
-  printf(" * support is disabled\n");
-  printf(" */\n\n");
-  printf("#if CONFIG_NFILE_STREAMS == 0\n");
-  printf("#  undef CONFIG_STDIO_BUFFER_SIZE\n");
-  printf("#  define CONFIG_STDIO_BUFFER_SIZE 0\n");
-  printf("#endif\n\n");
-
-  printf("/* If no standard C buffered I/O is not supported, then line-oriented buffering\n");
-  printf(" * cannot be supported.\n");
-  printf(" */\n\n");
-  printf("#if CONFIG_STDIO_BUFFER_SIZE == 0\n");
-  printf("#  undef CONFIG_STDIO_LINEBUFFER\n");
-  printf("#endif\n\n");
-
   printf("/* If the maximum message size is zero, then we assume that message queues\n");
   printf(" * support should be disabled\n");
   printf(" */\n\n");
@@ -232,80 +229,26 @@ int main(int argc, char **argv, char **envp)
   printf("#  define CONFIG_DISABLE_MQUEUE 1\n");
   printf("#endif\n\n");
 
-  printf("/* If mountpoint support in not included, then no filesystem can be supported */\n\n");
-  printf("#ifdef CONFIG_DISABLE_MOUNTPOINT\n");
-  printf("#  undef CONFIG_FS_BINFS\n");
-  printf("#  undef CONFIG_FS_FAT\n");
-  printf("#  undef CONFIG_FS_HOSTFS\n");
-  printf("#  undef CONFIG_NFS\n");
-  printf("#  undef CONFIG_FS_NXFFS\n");
-  printf("#  undef CONFIG_FS_PROCFS\n");
-  printf("#  undef CONFIG_FS_ROMFS\n");
-  printf("#  undef CONFIG_FS_SMARTFS\n");
-  printf("#  undef CONFIG_FS_TMPFS\n");
+  printf("/* The correct way to disable socket support is to set the number of\n");
+  printf(" * socket descriptors to zero.\n");
+  printf(" */\n\n");
+  printf("#ifndef CONFIG_NSOCKET_DESCRIPTORS\n");
+  printf("#  define CONFIG_NSOCKET_DESCRIPTORS 0\n");
   printf("#endif\n\n");
 
   printf("/* There can be no network support with no socket descriptors */\n\n");
   printf("#if CONFIG_NSOCKET_DESCRIPTORS <= 0\n");
   printf("#  undef CONFIG_NET\n");
   printf("#endif\n\n");
+
   printf("/* Conversely, if there is no network support, there is no need for\n");
   printf(" * socket descriptors\n");
   printf(" */\n\n");
   printf("#ifndef CONFIG_NET\n");
-  printf("#  undef CONFIG_NSOCKET_DESCRIPTORS\n");
+  printf("#  undef  CONFIG_NSOCKET_DESCRIPTORS\n");
   printf("#  define CONFIG_NSOCKET_DESCRIPTORS 0\n");
   printf("#endif\n\n");
 
-  printf("/* Protocol support can only be provided on top of basic network support */\n\n");
-  printf("#ifndef CONFIG_NET\n");
-  printf("#  undef CONFIG_NET_TCP\n");
-  printf("#  undef CONFIG_NET_UDP\n");
-  printf("#  undef CONFIG_NET_ICMP\n");
-  printf("#endif\n\n");
-
-  printf("/* NFS client can only be provided on top of UDP network support */\n\n");
-  printf("#if !defined(CONFIG_NET) || !defined(CONFIG_NET_UDP)\n");
-  printf("#  undef CONFIG_NFS\n");
-  printf("#endif\n\n");
-
-  printf("/* Verbose debug and sub-system debug only make sense if debug is enabled */\n\n");
-  printf("#ifndef CONFIG_DEBUG\n");
-  printf("#  undef CONFIG_DEBUG_VERBOSE\n");
-  printf("#  undef CONFIG_DEBUG_ANALOG\n");
-  printf("#  undef CONFIG_DEBUG_AUDIO\n");
-  printf("#  undef CONFIG_DEBUG_BINFMT\n");
-  printf("#  undef CONFIG_DEBUG_CRYPTO\n");
-  printf("#  undef CONFIG_DEBUG_CAN\n");
-  printf("#  undef CONFIG_DEBUG_DMA\n");
-  printf("#  undef CONFIG_DEBUG_FS\n");
-  printf("#  undef CONFIG_DEBUG_GPIO\n");
-  printf("#  undef CONFIG_DEBUG_GRAPHICS\n");
-  printf("#  undef CONFIG_DEBUG_HEAP\n");
-  printf("#  undef CONFIG_DEBUG_I2C\n");
-  printf("#  undef CONFIG_DEBUG_I2S\n");
-  printf("#  undef CONFIG_DEBUG_INPUT\n");
-  printf("#  undef CONFIG_DEBUG_IRQ\n");
-  printf("#  undef CONFIG_DEBUG_LCD\n");
-  printf("#  undef CONFIG_DEBUG_LEDS\n");
-  printf("#  undef CONFIG_DEBUG_LIB\n");
-  printf("#  undef CONFIG_DEBUG_MM\n");
-  printf("#  undef CONFIG_DEBUG_NET\n");
-  printf("#  undef CONFIG_DEBUG_PAGING\n");
-  printf("#  undef CONFIG_DEBUG_PWM\n");
-  printf("#  undef CONFIG_DEBUG_RTC\n");
-  printf("#  undef CONFIG_DEBUG_SCHED\n");
-  printf("#  undef CONFIG_DEBUG_SDIO\n");
-  printf("#  undef CONFIG_DEBUG_SENSORS\n");
-  printf("#  undef CONFIG_DEBUG_SHM\n");
-  printf("#  undef CONFIG_DEBUG_SPI\n");
-  printf("#  undef CONFIG_DEBUG_SYSCALL\n");
-  printf("#  undef CONFIG_DEBUG_TIMER\n");
-  printf("#  undef CONFIG_DEBUG_USB\n");
-  printf("#  undef CONFIG_DEBUG_WATCHDOG\n");
-  printf("#  undef CONFIG_DEBUG_WIRELESS\n");
-  printf("#endif\n\n");
-
   printf("#endif /* __INCLUDE_NUTTX_CONFIG_H */\n");
   fclose(stream);
 
diff --git a/tools/mkfsdata.pl b/tools/mkfsdata.pl
index db4b61524ebc0e9bd765e1dbdbe54102325607b4..9a94f175c3cb3b63892b291b850fefa83e839e02 100755
--- a/tools/mkfsdata.pl
+++ b/tools/mkfsdata.pl
@@ -41,7 +41,7 @@ opendir(DIR, ".");
 @files =  grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);
 closedir(DIR);
 
-print(OUTPUT "#include \n\n");
+print(OUTPUT "#include \"netutils/httpd.h\"\n\n");
 print(OUTPUT "#ifndef NULL\n#define NULL 0\n#endif\n\n");
 
 foreach $file (@files) {
diff --git a/tools/noteinfo.c b/tools/noteinfo.c
new file mode 100644
index 0000000000000000000000000000000000000000..54ebdc29c2dfa4dd17d28dfe6e8b903c4c9d8ca6
--- /dev/null
+++ b/tools/noteinfo.c
@@ -0,0 +1,896 @@
+#include 
+#include 
+
+/****************************************************************************
+ * The following is autogenerated and comes from:
+ *
+ *   (gdb) p &g_note_info.ni_buffer
+ *   $3 = (uint8_t (*)[2048]) 0x10831004
+ *   (gdb) dump binary memory noteinfo.bin 0x10831004 0x10831804
+ *
+ *   $ xxd -g 1 -i noteinfo.bin >noteinfo.h
+ *
+ ****************************************************************************/
+
+unsigned char noteinfo_bin[] = {
+  0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c, 0x64, 0x00,
+  0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0d, 0x64, 0x00,
+  0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c, 0x64, 0x00,
+  0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0b, 0x02, 0x64, 0x00,
+  0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x06, 0x0a, 0x03, 0x00, 0x00, 0x00,
+  0x00, 0xc0, 0x00, 0x00, 0x00, 0x0b, 0x02, 0x00, 0x00, 0x00, 0x00, 0xc0,
+  0x00, 0x00, 0x00, 0x03, 0x0a, 0x03, 0x64, 0x00, 0x06, 0x00, 0xc0, 0x00,
+  0x00, 0x00, 0x0c, 0x0d, 0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00,
+  0x01, 0x00, 0x0c, 0x0c, 0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00,
+  0x01, 0x00, 0x0b, 0x02, 0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00,
+  0x06, 0x0a, 0x03, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x0b,
+  0x02, 0x00, 0x00, 0x00, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x03, 0x0a, 0x03,
+  0x64, 0x00, 0x06, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0c, 0x0d, 0x64, 0x00,
+  0x06, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c, 0x64, 0x00,
+  0x06, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0d, 0x64, 0x00,
+  0x06, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c, 0x64, 0x00,
+  0x06, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0d, 0x64, 0x00,
+  0x06, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0a, 0x64, 0x00,
+  0x06, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c, 0x64, 0x00,
+  0x06, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0b, 0x64, 0x00,
+  0x06, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x0d, 0x64, 0x00,
+  0x06, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c, 0x64, 0x00,
+  0x06, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0d, 0x64, 0x00,
+  0x06, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c, 0x64, 0x00,
+  0x06, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0d, 0x64, 0x00,
+  0x06, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c, 0x64, 0x00,
+  0x06, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0b, 0x02, 0x64, 0x00,
+  0x06, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x06, 0x0a, 0x03, 0x00, 0x00, 0x00,
+  0x00, 0xc1, 0x00, 0x00, 0x00, 0x0b, 0x02, 0x00, 0x00, 0x00, 0x00, 0xc1,
+  0x00, 0x00, 0x00, 0x03, 0x0a, 0x03, 0x64, 0x00, 0x06, 0x00, 0xc1, 0x00,
+  0x00, 0x00, 0x0c, 0x0d, 0x64, 0x00, 0x06, 0x00, 0xc1, 0x00, 0x00, 0x00,
+  0x01, 0x00, 0x0c, 0x0c, 0x64, 0x00, 0x06, 0x00, 0xc1, 0x00, 0x00, 0x00,
+  0x01, 0x00, 0x0b, 0x02, 0x64, 0x00, 0x06, 0x00, 0xc1, 0x00, 0x00, 0x00,
+  0x06, 0x0a, 0x03, 0x00, 0x00, 0x00, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0b,
+  0x02, 0x00, 0x00, 0x00, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x03, 0x0a, 0x03,
+  0x64, 0x00, 0x06, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0c, 0x0d, 0x64, 0x00,
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+  0x64, 0x00, 0x06, 0x00, 0xbf, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0b,
+  0x64, 0x00, 0x06, 0x00, 0xbf, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x0d,
+  0x64, 0x00, 0x06, 0x00, 0xbf, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c,
+  0x64, 0x00, 0x06, 0x00, 0xbf, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0d,
+  0x64, 0x00, 0x06, 0x00, 0xbf, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c,
+  0x64, 0x00, 0x06, 0x00, 0xbf, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0d,
+  0x64, 0x00, 0x06, 0x00, 0xbf, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c,
+  0x64, 0x00, 0x06, 0x00, 0xbf, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0b, 0x02,
+  0x64, 0x00, 0x06, 0x00, 0xbf, 0x00, 0x00, 0x00, 0x06, 0x0a, 0x03, 0x00,
+  0x00, 0x00, 0x00, 0xbf, 0x00, 0x00, 0x00, 0x0b, 0x02, 0x00, 0x00, 0x00,
+  0x00, 0xbf, 0x00, 0x00, 0x00, 0x03, 0x0a, 0x03, 0x64, 0x00, 0x06, 0x00,
+  0xbf, 0x00, 0x00, 0x00, 0x0c, 0x0d, 0x64, 0x00, 0x06, 0x00, 0xbf, 0x00,
+  0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c, 0x64, 0x00, 0x06, 0x00, 0xbf, 0x00,
+  0x00, 0x00, 0x01, 0x00, 0x0b, 0x02, 0x64, 0x00, 0x06, 0x00, 0xbf, 0x00,
+  0x00, 0x00, 0x06, 0x0a, 0x03, 0x00, 0x00, 0x00, 0x00, 0xbf, 0x00, 0x00,
+  0x00, 0x0b, 0x02, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x03,
+  0x0a, 0x03, 0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x0c, 0x0d,
+  0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c,
+  0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0d,
+  0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c,
+  0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0d,
+  0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0a,
+  0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c,
+  0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0d,
+  0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c,
+  0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0d,
+  0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c,
+  0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0b,
+  0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x0d,
+  0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c,
+  0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0d,
+  0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c,
+  0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0d,
+  0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c,
+  0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0b, 0x02,
+  0x64, 0x00, 0x06, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x06, 0x0a, 0x03, 0x00,
+  0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x0b, 0x02, 0x00, 0x00, 0x00,
+  0x00, 0xc0, 0x00, 0x00, 0x00, 0x03, 0x0a, 0x03, 0x64, 0x00, 0x06, 0x00,
+  0xc0, 0x00, 0x00, 0x00, 0x0c, 0x0d, 0x64, 0x00, 0x06, 0x00, 0xc0, 0x00,
+  0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c, 0x64, 0x00, 0x06, 0x00, 0xc0, 0x00,
+  0x00, 0x00, 0x01, 0x00, 0x0c, 0x0d, 0x64, 0x00, 0x06, 0x00, 0xc0, 0x00,
+  0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c, 0x64, 0x00, 0x06, 0x00, 0xc0, 0x00,
+  0x00, 0x00, 0x01, 0x00, 0x0c, 0x0d, 0x64, 0x00, 0x06, 0x00, 0xc0, 0x00,
+  0x00, 0x00, 0x01, 0x00, 0x0c, 0x0a, 0x64, 0x00, 0x06, 0x00, 0xc0, 0x00,
+  0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c, 0x64, 0x00, 0x06, 0x00, 0xc0, 0x00,
+  0x00, 0x00, 0x01, 0x00, 0x0c, 0x0b, 0x64, 0x00, 0x06, 0x00, 0xc0, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x0c, 0x0d, 0x64, 0x00, 0x06, 0x00, 0xc0, 0x00,
+  0x00, 0x00, 0x01, 0x00, 0x0c, 0x0a, 0x64, 0x00, 0x06, 0x00, 0xc0, 0x00,
+  0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c, 0x64, 0x00, 0x06, 0x00, 0xc0, 0x00,
+  0x00, 0x00, 0x01, 0x00, 0x0c, 0x0b, 0x64, 0x00, 0x06, 0x00, 0xc0, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x0c, 0x0d, 0x64, 0x00, 0x06, 0x00, 0xc0, 0x00,
+  0x00, 0x00, 0x01, 0x00, 0x0c, 0x0c, 0x64, 0x00, 0x06, 0x00, 0xc0, 0x00,
+  0x00, 0x00, 0x01, 0x00, 0x0c, 0x0d, 0x64, 0x00
+};
+unsigned int noteinfo_bin_len = 8192;
+
+/****************************************************************************
+ * This comes from:
+ *
+ *   (gdb) p g_note_info
+ *   $1 = {ni_head = 915, ni_tail = 925,
+ *   ni_buffer = ...
+ *
+ ****************************************************************************/
+
+unsigned int ni_head = 1866;
+unsigned int ni_tail = 1868;
+
+/****************************************************************************
+ * The following does not change
+ ****************************************************************************/
+
+#define CONFIG_SMP 1
+struct note_common_s
+{
+  uint8_t nc_length;           /* Length of the note */
+  uint8_t nc_type;             /* See enum note_type_e */
+  uint8_t nc_priority;         /* Thread/task priority */
+#ifdef CONFIG_SMP
+  uint8_t nc_cpu;              /* CPU thread/task running on */
+#endif
+  uint8_t nc_pid[2];           /* ID of the thread/task */
+  uint8_t nc_systime[4];       /* Time when note buffered */
+};
+
+#define NTYPES 18
+static char *noteid[NTYPES] = 
+{
+  "NOTE_START",           /* type = 0 */
+  "NOTE_STOP",            /* type = 1 */
+  "NOTE_SUSPEND",         /* type = 2 */
+  "NOTE_RESUME",          /* type = 3 */
+
+  "NOTE_CPU_START",       /* type = 4 */
+  "NOTE_CPU_STARTED",     /* type = 5 */
+  "NOTE_CPU_PAUSE",       /* type = 6 */
+  "NOTE_CPU_PAUSED",      /* type = 7 */
+  "NOTE_CPU_RESUME",      /* type = 8 */
+  "NOTE_CPU_RESUMED",     /* type = 9 */
+
+  "NOTE_PREEMPT_LOCK",    /* type = 10 */
+  "NOTE_PREEMPT_UNLOCK",  /* type = 11 */
+
+  "NOTE_CSECTION_ENTER",  /* type = 12 */
+  "NOTE_CSECTION_LEAVE",  /* type = 13 */
+
+  "NOTE_SPINLOCK_LOCK",   /* type = 14 */
+  "NOTE_SPINLOCK_LOCKED", /* type = 15 */
+  "NOTE_SPINLOCK_UNLOCK", /* type = 16 */
+  "NOTE_SPINLOCK_ABORT"   /* type = 17 */
+};
+
+static unsigned int next_ndx(unsigned int ndx)
+{
+  if (++ndx >= noteinfo_bin_len)
+    {
+      ndx -= noteinfo_bin_len;
+    }
+
+  return ndx;
+}
+
+int main(int argc, char **argv)
+{
+  struct note_common_s *note;
+  unsigned int size;
+  unsigned int notndx;
+  unsigned int bufndx;
+  unsigned int remainder;
+  unsigned int value;
+  char buffer[64];
+  
+  notndx = ni_tail;
+  while (notndx != ni_head)
+    {
+      printf("%5u: ", notndx);
+
+      /* Copy the note into the buffer */
+
+      size = noteinfo_bin[notndx];
+      if (size > 64)
+        {
+           printf("ERROR: size to big: %u\n", size);
+           exit(1);
+        }
+
+      for (bufndx = 0; bufndx < size;)
+        {
+          buffer[bufndx] = noteinfo_bin[notndx];
+
+          bufndx++;
+          notndx = next_ndx(notndx);
+
+          if (notndx == ni_head && bufndx < size)
+            {
+               printf("Incomplete record\n");
+               exit(1);
+            }
+        }
+
+      note = (struct note_common_s *)buffer;
+      printf("CPU%1u PID%-3uprio=%-3u: %-20s time=%08lx",
+             note->nc_cpu,
+             (unsigned int) note->nc_pid[1] << 8 |
+             (unsigned int) note->nc_pid[0],
+             note->nc_priority,
+             note->nc_type < NTYPES ? noteid[note->nc_type] : "Unrecognized",
+             (unsigned long)note->nc_systime[3] << 24 |
+             (unsigned long)note->nc_systime[2] << 16 |
+             (unsigned long)note->nc_systime[1] << 8 |
+             (unsigned long)note->nc_systime[0]);
+
+      bufndx    = sizeof(struct note_common_s);
+      remainder = size - bufndx;
+      if (remainder > 0)
+        {
+          switch(note->nc_type)
+          {
+            /* Followed by a varible length, NULL terminated name */
+
+            case 0: /* NOTE_START */
+              buffer[size - 1] = '\0';
+              printf(" Name: %s", &buffer[bufndx]);
+              bufndx    = size;
+              remainder = 0;
+              break;
+
+            /* Followed by an 8-bit task state */
+
+            case 2: /* NOTE_SUSPEND */
+              printf(" State=%u", (unsigned int)buffer[bufndx]);
+              bufndx++;
+              remainder--;
+              break;
+
+            /* Followed by an 8-bit target CPU number */
+
+            case 4: /* NOTE_CPU_START */
+            case 6: /* NOTE_CPU_PAUSE */
+            case 8: /* NOTE_CPU_RESUME */
+              printf(" Target CPU%u", (unsigned int)buffer[bufndx]);
+              bufndx++;
+              remainder--;
+              break;
+
+            /* Followed by a 16-bit count */
+
+            case 10: /* NOTE_PREEMPT_LOCK */
+            case 11: /* NOTE_PREEMPT_UNLOCK */
+            case 12: /* NOTE_CSECTION_ENTER */
+            case 13: /* NOTE_CSECTION_LEAVE */
+              if (remainder >= 2)
+                {
+                  value = (unsigned int)buffer[bufndx] << 8 |
+                          (unsigned int)buffer[bufndx+1];
+                  bufndx += 2;
+                  remainder -= 2;
+                  break;
+                }
+
+            /* Followed by an 8-bit spinlock value */
+
+            case 14: /* NOTE_SPINLOCK_LOCK */
+            case 15: /* NOTE_SPINLOCK_LOCKED */
+            case 16: /* NOTE_SPINLOCK_UNLOCK */
+            case 17: /* NOTE_SPINLOCK_ABORT */
+              printf(" Spinlock=%u", (unsigned int)buffer[bufndx]);
+              bufndx++;
+              remainder--;
+              break;
+
+            /* Nothing addition shold follow these types */
+
+            case 1: /* NOTE_STOP */
+            case 3: /* NOTE_RESUME */
+            case 5: /* NOTE_CPU_STARTED */
+            case 7: /* NOTE_CPU_PAUSED */
+            case 9: /* NOTE_CPU_RESUMED */
+            default:
+              break;
+          }
+        }
+
+      for (; bufndx < size; bufndx++)
+        {
+          printf(" %02x", buffer[bufndx]);
+        }
+
+      printf("\n");
+    }
+}
diff --git a/tools/pic32mx/mkpichex.c b/tools/pic32mx/mkpichex.c
index 48cb02805f8fc973e239cc7be53b2b8bd9f9ea39..1562031bc855123849e2d18068c2d0fe8dc7ba54 100644
--- a/tools/pic32mx/mkpichex.c
+++ b/tools/pic32mx/mkpichex.c
@@ -239,7 +239,7 @@ int main(int argc, char **argv, char **envp)
   char *destfile;
   FILE *src;
   FILE *dest;
-  int err;
+  int errcode;
 
   if (argc != 2)
     {
@@ -258,7 +258,7 @@ int main(int argc, char **argv, char **envp)
   if (!destfile)
     {
       fprintf(stderr, "getfilepath failed\n");
-      err = 2;
+      errcode = 2;
       goto errout_with_srcfile;
     }
 
@@ -266,7 +266,7 @@ int main(int argc, char **argv, char **envp)
   if (!src)
     {
       fprintf(stderr, "open %s failed: %s\n", srcfile, strerror(errno));
-      err = 3;
+      errcode = 3;
       goto errout_with_destfile;
     }
 
@@ -274,7 +274,7 @@ int main(int argc, char **argv, char **envp)
   if (!dest)
     {
       fprintf(stderr, "open %s failed: %s\n", destfile, strerror(errno));
-      err = 3;
+      errcode = 3;
       goto errout_with_destfile;
     }
 
@@ -285,7 +285,7 @@ int main(int argc, char **argv, char **envp)
       if (parse_line(&hexline))
         {
           fprintf(stderr, "Failed to parse line\n");
-          err = 1;
+          errcode = 1;
           goto errout_with_destfile;
         }
 
@@ -325,5 +325,5 @@ errout_with_destfile:
   free(destfile);
 errout_with_srcfile:
   free(srcfile);
-  return err;
+  return errcode;
 }
diff --git a/tools/refresh.sh b/tools/refresh.sh
index a38eadaffd0b432b3c3ba31a19c6198ebb72f2e1..47df783263896932b7856a6a1df377fb97308cef 100755
--- a/tools/refresh.sh
+++ b/tools/refresh.sh
@@ -1,7 +1,7 @@
 #!/bin/bash
 # refresh.sh
 #
-#   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -32,7 +32,7 @@
 # POSSIBILITY OF SUCH DAMAGE.
 #
 
-USAGE="USAGE: $0 [--debug|--help] /"
+USAGE="USAGE: $0 [options] /"
 ADVICE="Try '$0 --help' for more information"
 
 unset CONFIG
@@ -51,7 +51,7 @@ while [ ! -z "$1" ]; do
         echo ""
         echo $USAGE
         echo ""
-        echo "Where:"
+        echo "Where [options] include:"
         echo "  --debug"
         echo "     Enable script debug"
         echo "  --silent"
@@ -104,6 +104,7 @@ WD=${PWD}
 BOARDDIR=configs/$BOARDSUBDIR
 CONFIGDIR=$BOARDDIR/$CONFIGSUBDIR
 DEFCONFIG=$CONFIGDIR/defconfig
+MAKEDEFS=$CONFIGDIR/Make.defs
 
 CMPCONFIG_TARGET=cmpconfig
 CMPCONFIG1=tools/cmpconfig
@@ -124,7 +125,12 @@ if [ ! -d "$CONFIGDIR" ]; then
 fi
 
 if [ ! -r "$DEFCONFIG" ]; then
-  echo "No readable defconfig file in $DEFCONFIG"
+  echo "No readable defconfig file at $DEFCONFIG"
+  exit 1
+fi
+
+if [ ! -r "$MAKEDEFS" ]; then
+  echo "No readable Make.defs file at $MAKEDEFS"
   exit 1
 fi
 
@@ -152,7 +158,7 @@ else
   fi
 fi
 
-# Copy the .config to the toplevel directory
+# Copy the .config and Make.defs to the toplevel directory
 
 rm -f SAVEconfig
 if [ -e .config ]; then
@@ -163,6 +169,15 @@ fi
 cp -a $DEFCONFIG .config || \
   { echo "ERROR: Failed to copy $DEFCONFIG to .config"; exit 1; }
 
+rm -f SAVEMake.defs
+if [ -e Make.defs ]; then
+  mv Make.defs SAVEMake.defs || \
+    { echo "ERROR: Failed to move Make.defs to SAVEMake.defs"; exit 1; }
+fi
+
+cp -a $MAKEDEFS Make.defs || \
+  { echo "ERROR: Failed to copy $MAKEDEFS to Make.defs"; exit 1; }
+
 # Then run oldconfig or oldefconfig
 
 if [ "X${silent}" == "Xy" ]; then
@@ -195,9 +210,14 @@ else
   fi
 fi
 
-# Restore any previous .config file
+# Restore any previous .config and Make.defs files
 
 if [ -e SAVEconfig ]; then
   mv SAVEconfig .config || \
     { echo "ERROR: Failed to move SAVEconfig to .config"; exit 1; }
 fi
+
+if [ -e SAVEMake.defs ]; then
+  mv SAVEMake.defs Make.defs || \
+    { echo "ERROR: Failed to move SAVEMake.defs to Make.defs"; exit 1; }
+fi
diff --git a/tools/sethost.sh b/tools/sethost.sh
new file mode 100755
index 0000000000000000000000000000000000000000..c8bc0e4f95ee9b7a5e54c2bf713a8ce225df78c6
--- /dev/null
+++ b/tools/sethost.sh
@@ -0,0 +1,249 @@
+#!/bin/bash
+# tools/sethost.sh
+#
+#   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt 
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+WD=$PWD
+
+progname=$0
+host=linux
+wenv=cygwin
+hsize=64
+unset configfile
+
+function showusage {
+    echo ""
+    echo "USAGE: $progname [-w|l] [-c|u|n] [-32|64] []"
+    echo "       $progname -h"
+    echo ""
+    echo "Where:"
+    echo "  -w|l selects Windows (w) or Linux (l).  Default: Linux"
+    echo "  -c|u|n selects Windows environment option:  Cygwin (c), Ubuntu under"
+    echo "     Windows 10 (u), or Windows native (n).  Default Cygwin"
+    echo "  -32|64 selects 32- or 64-bit host.  Default 64"
+    echo "  -h will show this help test and terminate"
+    echo "   selects configuration file.  Default: .config"
+    exit 1
+}
+
+# Parse command line
+
+while [ ! -z "$1" ]; do
+    case $1 in
+    -w )
+    host=windows
+    ;;
+    -l )
+    host=linux
+    ;;
+    -c )
+    host=windows
+    wenv=cygwin
+    ;;
+    -u )
+    host=windows
+    wenv=ubuntu
+    ;;
+    -n )
+    host=windows
+    wenv=native
+    ;;
+    -32 )
+    hsize=32
+    ;;
+    -64 )
+    hsize=32
+    ;;
+    -h )
+    showusage
+    ;;
+    * )
+    configfile="$1"
+    shift
+    break;
+    ;;
+  esac
+  shift
+done
+
+if [ ! -z "$1" ]; then
+   echo "ERROR: Garbage at the end of line"
+   showusage
+fi
+
+if [ -x sethost.sh ]; then
+  nuttx=$PWD/..
+else
+  if [ -x tools/sethost.sh ]; then
+    nuttx=$PWD
+  else
+    echo "This script must be execute in nuttx/ or nutts/tools directories"
+    exit 1
+  fi
+fi
+
+rm -f $nuttx/SAVEconfig
+rm -f $nuttx/SAVEMake.defs
+
+unset dotconfig
+if [ -z "$configfile" ]; then
+  dotconfig=y
+else
+  if [ "X$configfile" = "X.config" ]; then
+    dotconfig=y
+  else
+    if [ "X$configfile" = "X$nuttx/.config" ]; then
+      dotconfig=y
+    fi
+  fi
+fi
+
+if [ "X$dotconfig" = "Xy" ]; then
+  unset configfile
+  if [ -r $nuttx/.config ]; then
+    configfile=$nuttx/.config
+  else
+    echo "There is no .config at $nuttx"
+    exit 1
+  fi
+
+  if [ ! -r $nuttx/Make.defs ]; then
+    echo "ERROR: No readable Make.defs file exists at $nuttx"
+    exit 1
+  fi
+else
+  if [ ! -r "$configfile" ]; then
+    echo "ERROR: No readable configuration file exists at $configfile"
+    exit 1
+  fi
+
+  configdir=`dirname $configfile`
+  makedefs=$configdir/Make.defs
+
+  if [ ! -r $makedefs ]; then
+    echo "ERROR: No readable Make.defs file exists at $configdir"
+    exit 1
+  fi
+
+  if [ -f $nuttx/.config ]; then
+    mv $nuttx/.config $nuttx/SAVEconfig
+  fi
+  cp $configfile $nuttx/.config || \
+    { echo "ERROR: cp to $nuttx/.config failed"; exit 1; }
+
+  if [ -f $nuttx/Make.defs ]; then
+    mv $nuttx/Make.defs $nuttx/SAVEMake.defs
+  fi
+  cp $makedefs $nuttx/Make.defs || \
+    { echo "ERROR: cp to $nuttx/Make.defs failed"; exit 1; }
+fi
+
+# Modify the configuration
+
+if [ "X$host" == "Xlinux" ]; then
+    echo "  Select CONFIG_HOST_LINUX=y"
+
+    kconfig-tweak --file $nuttx/.config --enable CONFIG_HOST_LINUX
+    kconfig-tweak --file $nuttx/.config --disable CONFIG_HOST_WINDOWS
+
+    kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_NATIVE
+    kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_CYGWIN
+    kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_UBUNTU
+    kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_MSYS
+    kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_OTHER
+
+    kconfig-tweak --file $nuttx/.config --enable CONFIG_SIM_X8664_SYSTEMV
+    kconfig-tweak --file $nuttx/.config --disable CONFIG_SIM_X8664_MICROSOFT
+    kconfig-tweak --file $nuttx/.config --disable CONFIG_SIM_M32
+else
+    echo "  Select CONFIG_HOST_WINDOWS=y"
+    kconfig-tweak --file $nuttx/.config --enable CONFIG_HOST_WINDOWS
+    kconfig-tweak --file $nuttx/.config --disable CONFIG_HOST_LINUX
+
+    if [ "X$wenv" == "Xcygwin" ]; then
+      echo "  Select CONFIG_WINDOWS_CYGWIN=y"
+      kconfig-tweak --file $nuttx/.config --enable CONFIG_WINDOWS_CYGWIN
+      kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_UBUNTU
+      kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_NATIVE
+    else
+      kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_CYGWIN
+      if [ "X$wenv" == "Xubuntu" ]; then
+        echo "  Select CONFIG_WINDOWS_UBUNTU=y"
+        kconfig-tweak --file $nuttx/.config --enable CONFIG_WINDOWS_UBUNTU
+        kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_NATIVE
+      else
+        echo "  Select CONFIG_WINDOWS_NATIVE=y"
+        kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_UBUNTU
+        kconfig-tweak --file $nuttx/.config --enable CONFIG_WINDOWS_NATIVE
+      fi
+    fi
+
+    kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_MSYS
+    kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_OTHER
+
+    kconfig-tweak --file $nuttx/.config --enable CONFIG_SIM_X8664_MICROSOFT
+    kconfig-tweak --file $nuttx/.config --disable CONFIG_SIM_X8664_SYSTEMV
+
+    if [ "X$hsize" == "X32" ]; then
+      kconfig-tweak --file $nuttx/.config --enable CONFIG_SIM_M32
+    else
+      kconfig-tweak --file $nuttx/.config --disable CONFIG_SIM_M32
+    fi
+fi
+
+kconfig-tweak --file $nuttx/.config --disable CONFIG_HOST_OSX
+kconfig-tweak --file $nuttx/.config --disable CONFIG_HOST_OTHER
+
+echo "  Refreshing..."
+cd $nuttx || { echo "ERROR: failed to cd to $nuttx"; exit 1; }
+make clean_context 1>/dev/null 2>&1
+make olddefconfig 1>/dev/null 2>&1
+
+# Move config file to correct location and restore any previous .config
+# and Make.defs files
+
+if [ "X$dotconfig" != "Xy" ]; then
+  sed -i -e "s/^CONFIG_APPS_DIR/# CONFIG_APPS_DIR/g" .config
+
+  mv .config $configfile || \
+      { echo "ERROR: Failed to move .conig to $configfile"; exit 1; }
+
+  if [ -e SAVEconfig ]; then
+    mv SAVEconfig .config || \
+      { echo "ERROR: Failed to move SAVEconfig to .config"; exit 1; }
+  fi
+
+  if [ -e SAVEMake.defs ]; then
+    mv SAVEMake.defs Make.defs || \
+      { echo "ERROR: Failed to move SAVEMake.defs to Make.defs"; exit 1; }
+  fi
+fi
diff --git a/tools/showsize.sh b/tools/showsize.sh
new file mode 100644
index 0000000000000000000000000000000000000000..ec66d63184dcb6859662dde7b6794c77a7b8a436
--- /dev/null
+++ b/tools/showsize.sh
@@ -0,0 +1,71 @@
+#!/bin/bash
+############################################################################
+# tools/showsize.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Lorenz Meier (Original concept)
+#           Gregory Nutt (This instantiation)
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+# set -x
+
+# Host nm should always work
+# vs. NM=arm-none-eabi-nm
+
+NM=nm
+
+# This should be executed from the top-level NuttX directory
+
+if [ ! -x "tools/showsize.sh" ]; then
+  echo "This script must executed from the top-level NuttX directory"
+  exit 1
+fi
+
+# On the cywin simulation, the executable will be nuttx.exe
+
+if [ -f "nuttx" ]; then
+  NUTTX=nuttx
+else
+  if [ -x "nuttx.exe" ]; then
+    NUTTX=nuttx.exe
+  else
+    echo "Cannot find the NuttX executable"
+    exit 1
+  fi
+fi
+
+# Show what we were asked for
+
+echo "TOP 10 BIG DATA"
+$NM --print-size --size-sort --radix dec -C $NUTTX | grep ' [DdBb] ' | tail -20
+
+echo "TOP 10 BIG CODE"
+$NM --print-size --size-sort --radix dec -C $NUTTX | grep ' [TtWw] ' | tail -20
diff --git a/tools/testbuild.sh b/tools/testbuild.sh
index 9546c921447d0761af433a6772692cb8a498c780..0d10702c756650330242d2f87e689eed747ba4a7 100755
--- a/tools/testbuild.sh
+++ b/tools/testbuild.sh
@@ -1,7 +1,7 @@
 #!/bin/bash
 # testbuild.sh
 #
-#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt 
 #
 # Redistribution and use in source and binary forms, with or without
@@ -34,22 +34,29 @@
 
 WD=$PWD
 nuttx=$WD/../nuttx
+TOOLSDIR=$nuttx/tools
+UNLINK=$TOOLSDIR/unlink.sh
 
 progname=$0
 host=linux
 wenv=cygwin
 sizet=uint
+APPSDIR=../apps
+NXWDIR=../NxWidgets
 unset testfile
 
 function showusage {
     echo ""
-    echo "USAGE: $progname [-w|l] [-c|n] [-s] "
+    echo "USAGE: $progname [-w|l] [-c|u|n] [-s] [-a ] [-n ] "
     echo "       $progname -h"
     echo ""
     echo "Where:"
     echo "  -w|l selects Windows (w) or Linux (l).  Default: Linux"
-    echo "  -c|n selects Windows native (n) or Cygwin (c).  Default Cygwin"
+    echo "  -c|u|n selects Windows environment option:  Cygwin (c), Ubuntu under"
+    echo "     Windows 10 (u), or Windows native (n).  Default Cygwin"
     echo "  -s Use C++ unsigned long size_t in new operator. Default unsigned int"
+    echo "  -a  provides the relative path to the apps/ directory.  Default ../apps"
+    echo "  -n  provides the relative path to the NxWidgets/ directory.  Default ../NxWidgets"
     echo "  -h will show this help test and terminate"
     echo "   selects the list of configurations to test.  No default"
     echo ""
@@ -70,14 +77,29 @@ while [ ! -z "$1" ]; do
     host=linux
     ;;
     -c )
+    host=windows
     wenv=cygwin
     ;;
+    -u )
+    host=windows
+    wenv=ubuntu
+    ;;
     -n )
+    host=windows
     wenv=native
     ;;
     -s )
+    host=windows
     sizet=long
     ;;
+    -a )
+    shift
+    APPSDIR="$1"
+    ;;
+    -n )
+    shift
+    NXWDIR="$1"
+    ;;
     -h )
     showusage
     ;;
@@ -102,13 +124,11 @@ fi
 
 if [ ! -r "$testfile" ]; then
     echo "ERROR: No readable file exists at $testfile"
-    echo $USAGE
     showusage
 fi
 
 if [ ! -d "$nuttx" ]; then
     echo "ERROR: Expected to find nuttx/ at $nuttx"
-    echo $USAGE
     showusage
 fi
 
@@ -153,11 +173,19 @@ function configure {
         if [ "X$wenv" == "Xcygwin" ]; then
           echo "  Select CONFIG_WINDOWS_CYGWIN=y"
           kconfig-tweak --file $nuttx/.config --enable CONFIG_WINDOWS_CYGWIN
+          kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_UBUNTU
           kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_NATIVE
         else
-          echo "  Select CONFIG_WINDOWS_NATIVE=y"
-          kconfig-tweak --file $nuttx/.config --enable CONFIG_WINDOWS_NATIVE
           kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_CYGWIN
+          if [ "X$wenv" == "Xubuntu" ]; then
+            echo "  Select CONFIG_WINDOWS_UBUNTU=y"
+            kconfig-tweak --file $nuttx/.config --enable CONFIG_WINDOWS_UBUNTU
+            kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_NATIVE
+          else
+            echo "  Select CONFIG_WINDOWS_NATIVE=y"
+            kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_UBUNTU
+            kconfig-tweak --file $nuttx/.config --enable CONFIG_WINDOWS_NATIVE
+          fi
         fi
 
         kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_MSYS
@@ -196,11 +224,45 @@ function configure {
     make olddefconfig 1>/dev/null 2>&1
 }
 
+# Build the NxWidgets libraries
+
+function nxbuild {
+    if [ -e $APPSDIR/external ]; then
+        $UNLINK $APPSDIR/external
+    fi
+
+    unset nxconfig
+    if [ -d $NXWDIR ]; then
+        nxconfig=`grep CONFIG_NXWM=y $nuttx/.config`
+    fi
+
+    if [ ! -z "$nxconfig" ]; then
+        echo "  Building NxWidgets..."
+        echo "------------------------------------------------------------------------------------"
+
+        cd $nuttx/$NXTOOLS || { echo "Failed to CD to $NXTOOLS"; exit 1; }
+        ./install.sh $nuttx/$APPSDIR nxwm 1>/dev/null
+
+        make -C $nuttx/$APPSDIR/external TOPDIR=$nuttx APPDIR=$nuttx/$APPSDIR TOPDIR=$nuttx clean 1>/dev/null
+
+        cd $nuttx || { echo "Failed to CD to $nuttx"; exit 1; }
+        make -i context 1>/dev/null
+
+        cd $nuttx/$NXWIDGETSDIR || { echo "Failed to CD to $NXWIDGETSDIR"; exit 1; }
+        make -i TOPDIR=$nuttx clean 1>/dev/null
+        make -i TOPDIR=$nuttx  1>/dev/null
+
+        cd $nuttx/$NXWMDIR || { echo "Failed to CD to $NXWMDIR"; exit 1; }
+        make -i TOPDIR=$nuttx clean 1>/dev/null
+        make -i TOPDIR=$nuttx  1>/dev/null
+    fi
+}
+
 # Perform the next build
 
 function build {
     cd $nuttx || { echo "ERROR: failed to CD to $nuttx"; exit 1; }
-    echo "  Building..."
+    echo "  Building NuttX..."
     echo "------------------------------------------------------------------------------------"
     make -i 1>/dev/null
 }
@@ -211,12 +273,24 @@ function dotest {
     echo "------------------------------------------------------------------------------------"
     distclean
     configure
+    nxbuild
     build
 }
 
 # Perform the build test for each entry in the test list file
 
-export APPSDIR=../apps
+if [ ! -d $APPSDIR ]; then
+  export "ERROR: No directory found at $APPSDIR"
+  exit 1
+fi
+
+export APPSDIR
+
+if [ -d $NXWDIR ]; then
+    NXWIDGETSDIR=$NXWDIR/libnxwidgets
+    NXWMDIR=$NXWDIR/nxwm
+    NXTOOLS=$NXWDIR/tools
+fi
 
 # Shouldn't have to do this